diff --git a/patches/base/0003-pending-scripts-add-gen_config.py.patch b/patches/0001-pending-scripts-add-gen_config.py.patch
similarity index 98%
rename from patches/base/0003-pending-scripts-add-gen_config.py.patch
rename to patches/0001-pending-scripts-add-gen_config.py.patch
index 859416157..49e1db856 100644
--- a/patches/base/0003-pending-scripts-add-gen_config.py.patch
+++ b/patches/0001-pending-scripts-add-gen_config.py.patch
@@ -1,7 +1,7 @@
-From c4ce94a22a0e084bbbf9a787f078ec6f313f48da Mon Sep 17 00:00:00 2001
+From 9a11ccbc33db5068b1f567c3f7e45533c63c8b9a Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Fri, 19 Jun 2020 10:45:22 +0200
-Subject: [PATCH 001/114] pending: scripts: add gen_config.py
+Subject: [PATCH 01/43] pending: scripts: add gen_config.py
 
 This script is used to setup the tree based on the profiles/.
 
diff --git a/patches/base/0004-scripts-update-feed-script.patch b/patches/0002-scripts-update-feed-script.patch
similarity index 87%
rename from patches/base/0004-scripts-update-feed-script.patch
rename to patches/0002-scripts-update-feed-script.patch
index 5b2e7c025..4fe204464 100644
--- a/patches/base/0004-scripts-update-feed-script.patch
+++ b/patches/0002-scripts-update-feed-script.patch
@@ -1,7 +1,7 @@
-From 2abc67a0fbfbf50f4af2baaee07eb10d214973e4 Mon Sep 17 00:00:00 2001
+From d314f454cd4e7c4eec66c155d348eb6e421eb2fd Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Fri, 19 Jun 2020 13:25:27 +0200
-Subject: [PATCH 04/43] scripts: update feed script
+Subject: [PATCH 02/43] scripts: update feed script
 
 gen_config.py requires the latest version of the feeds script.
 
@@ -11,10 +11,10 @@ Signed-off-by: John Crispin <john@phrozen.org>
  1 file changed, 77 insertions(+)
 
 diff --git a/scripts/feeds b/scripts/feeds
-index eee0a50717..9d66ea5d98 100755
+index aee73e793f..94d6d91283 100755
 --- a/scripts/feeds
 +++ b/scripts/feeds
-@@ -647,6 +647,35 @@ sub refresh_config {
+@@ -667,6 +667,35 @@ sub refresh_config {
  	}
  }
  
@@ -50,7 +50,7 @@ index eee0a50717..9d66ea5d98 100755
  sub install {
  	my $name;
  	my %opts;
-@@ -679,6 +708,8 @@ sub install {
+@@ -699,6 +728,8 @@ sub install {
  					install_src($feed, $name, exists($opts{f})) == 0 or $ret = 1;
  					get_feed($f->[1]);
  				}
@@ -59,7 +59,7 @@ index eee0a50717..9d66ea5d98 100755
  			}
  		}
  	} else {
-@@ -849,6 +880,47 @@ sub update {
+@@ -856,6 +887,47 @@ sub update {
  	return $failed;
  }
  
@@ -107,7 +107,7 @@ index eee0a50717..9d66ea5d98 100755
  sub feed_config() {
  	foreach my $feed (@feeds) {
  		my $installed = (-f "feeds/$feed->[1].index");
-@@ -900,6 +972,10 @@ Commands:
+@@ -907,6 +979,10 @@ Commands:
  	    -i :           Recreate the index only. No feed update from repository is performed.
  	    -f :           Force updating feeds even if there are changed, uncommitted files.
  
@@ -118,14 +118,14 @@ index eee0a50717..9d66ea5d98 100755
  	clean:             Remove downloaded/generated files.
  
  EOF
-@@ -913,6 +989,7 @@ my %commands = (
+@@ -920,6 +996,7 @@ my %commands = (
  	'search' => \&search,
  	'uninstall' => \&uninstall,
  	'feed_config' => \&feed_config,
 +	'setup' => \&setup,
  	'clean' => sub {
- 		system("rm -rf ./feeds ./package/feeds");
+ 		system("rm -rf ./feeds ./package/feeds ./target/linux/feeds");
  	}
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/base/0005-scripts-ubinize-image.sh-allow-setting-the-rootfs-na.patch b/patches/0003-scripts-ubinize-image.sh-allow-setting-the-rootfs-na.patch
similarity index 63%
rename from patches/base/0005-scripts-ubinize-image.sh-allow-setting-the-rootfs-na.patch
rename to patches/0003-scripts-ubinize-image.sh-allow-setting-the-rootfs-na.patch
index 279207a61..cc16050ce 100644
--- a/patches/base/0005-scripts-ubinize-image.sh-allow-setting-the-rootfs-na.patch
+++ b/patches/0003-scripts-ubinize-image.sh-allow-setting-the-rootfs-na.patch
@@ -1,7 +1,7 @@
-From 41347924799ff4f16a12d8f740f5c66b10eb8c43 Mon Sep 17 00:00:00 2001
+From 8b71b30bb2bb5c6a98ae16b358887826246c444a Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
-Date: Sun, 9 Aug 2020 20:58:52 +0200
-Subject: [PATCH 05/43] scripts/ubinize-image.sh: allow setting the rootfs name
+Date: Sat, 15 Jul 2023 10:44:03 +0200
+Subject: [PATCH 03/43] scripts/ubinize-image.sh: allow setting the rootfs name
 
 This patch allows us to use a different rootfs name. Some QCA boards will
 require the in ubi rfs to be called ubi_rootfs.
@@ -13,19 +13,19 @@ Signed-off-by: John Crispin <john@phrozen.org>
  2 files changed, 9 insertions(+), 1 deletion(-)
 
 diff --git a/include/image-commands.mk b/include/image-commands.mk
-index c6e8eb0293..d4bce80e68 100644
+index dc6ee6e7c1..08adbb6454 100644
 --- a/include/image-commands.mk
 +++ b/include/image-commands.mk
-@@ -86,6 +86,7 @@ define Build/append-ubi
+@@ -137,6 +137,7 @@ define Build/append-ubi
  	sh $(TOPDIR)/scripts/ubinize-image.sh \
  		$(if $(UBOOTENV_IN_UBI),--uboot-env) \
  		$(if $(KERNEL_IN_UBI),--kernel $(IMAGE_KERNEL)) \
 +		$(if $(ROOTFSNAME_IN_UBI),--rootfs_name $(ROOTFSNAME_IN_UBI)) \
  		$(foreach part,$(UBINIZE_PARTS),--part $(part)) \
- 		$(IMAGE_ROOTFS) \
+ 		--rootfs $(IMAGE_ROOTFS) \
  		$@.tmp \
 diff --git a/scripts/ubinize-image.sh b/scripts/ubinize-image.sh
-index c6f8bcefe5..707cd38d47 100755
+index 323eae547a..6af035c1b1 100755
 --- a/scripts/ubinize-image.sh
 +++ b/scripts/ubinize-image.sh
 @@ -7,6 +7,7 @@ ubootenv=""
@@ -36,16 +36,16 @@ index c6f8bcefe5..707cd38d47 100755
  outfile=""
  err=""
  ubinize_seq=""
-@@ -76,7 +77,7 @@ ubilayout() {
- 		rootsize="$( round_up "$( stat -c%s "$2" )" 1024 )"
- 		;;
- 	esac
--	ubivol $vol_id rootfs "$2" "$autoresize" "$rootsize"
-+	ubivol $vol_id $rootfs_name "$2" "$autoresize" "$rootsize"
+@@ -77,7 +78,7 @@ ubilayout() {
+ 			rootsize="$( round_up "$( stat -c%s "$2" )" 1024 )"
+ 			;;
+ 		esac
+-		ubivol $vol_id rootfs "$2" "$autoresize" "$rootsize"
++		ubivol $vol_id $rootfs_name "$2" "$autoresize" "$rootsize"
  
- 	vol_id=$(( $vol_id + 1 ))
- 	[ "$rootfs_type" = "ubifs" ] || ubivol $vol_id rootfs_data "" 1
-@@ -101,6 +102,12 @@ while [ "$1" ]; do
+ 		vol_id=$(( $vol_id + 1 ))
+ 		[ "$rootfs_type" = "ubifs" ] || ubivol $vol_id rootfs_data "" 1
+@@ -109,6 +110,12 @@ while [ "$1" ]; do
  		shift
  		continue
  		;;
@@ -59,5 +59,5 @@ index c6f8bcefe5..707cd38d47 100755
  		parts="$parts $2"
  		shift
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/base/0014-feeds.conf.default-drop-luci.patch b/patches/0004-feeds.conf.default-drop-luci.patch
similarity index 65%
rename from patches/base/0014-feeds.conf.default-drop-luci.patch
rename to patches/0004-feeds.conf.default-drop-luci.patch
index c0742997e..1bc129d3e 100644
--- a/patches/base/0014-feeds.conf.default-drop-luci.patch
+++ b/patches/0004-feeds.conf.default-drop-luci.patch
@@ -1,7 +1,7 @@
-From a53506fd073dd451840c3c1974e579a8861f9205 Mon Sep 17 00:00:00 2001
+From 72d075fc52486aed50b107907999eab5a9be19ef Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
-Date: Tue, 4 May 2021 16:48:48 +0200
-Subject: [PATCH 33/43] feeds.conf.default: drop luci
+Date: Sat, 15 Jul 2023 10:48:09 +0200
+Subject: [PATCH 04/43] feeds.conf.default: drop luci
 
 we require luci-trunk for the gateway images.
 
@@ -11,15 +11,14 @@ Signed-off-by: John Crispin <john@phrozen.org>
  1 file changed, 1 deletion(-)
 
 diff --git a/feeds.conf.default b/feeds.conf.default
-index 98bf97232d..3d24cb7c27 100644
+index d467db5627..6fb7a14535 100644
 --- a/feeds.conf.default
 +++ b/feeds.conf.default
-@@ -1,5 +1,4 @@
- src-git packages https://git.openwrt.org/feed/packages.git;openwrt-21.02
--src-git luci https://git.openwrt.org/project/luci.git;openwrt-21.02
- src-git routing https://git.openwrt.org/feed/routing.git;openwrt-21.02
- src-git telephony https://git.openwrt.org/feed/telephony.git;openwrt-21.02
- #src-link custom /usr/src/openwrt/custom-feed
+@@ -1,4 +1,3 @@
+ src-git packages https://git.openwrt.org/feed/packages.git;openwrt-23.05
+-src-git luci https://git.openwrt.org/project/luci.git;openwrt-23.05
+ src-git routing https://git.openwrt.org/feed/routing.git;openwrt-23.05
+ src-git telephony https://git.openwrt.org/feed/telephony.git;openwrt-23.05
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/base/0011-busybox-enable-the-watchdog-tool.patch b/patches/0005-busybox-enable-the-watchdog-tool.patch
similarity index 66%
rename from patches/base/0011-busybox-enable-the-watchdog-tool.patch
rename to patches/0005-busybox-enable-the-watchdog-tool.patch
index 42cc3138a..b2278316f 100644
--- a/patches/base/0011-busybox-enable-the-watchdog-tool.patch
+++ b/patches/0005-busybox-enable-the-watchdog-tool.patch
@@ -1,7 +1,7 @@
-From 5c54120d8b707a1022052edd562cea1a358a9bce Mon Sep 17 00:00:00 2001
+From 050a312f34d425abc7ddb303f14913d737b45142 Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
-Date: Tue, 28 Jul 2020 09:21:04 +0200
-Subject: [PATCH 11/43] busybox: enable the watchdog tool
+Date: Sat, 15 Jul 2023 10:46:42 +0200
+Subject: [PATCH 05/43] busybox: enable the watchdog tool
 
 procd can currently only handle the main wdt. Enable the busybox
 applet until procd can handle multiple devices.
@@ -12,12 +12,12 @@ Signed-off-by: John Crispin <john@phrozen.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/package/utils/busybox/Config-defaults.in b/package/utils/busybox/Config-defaults.in
-index 168c73b24c..d35ce0b7b8 100644
+index b3c3f9a0b2..c22b20d8f2 100644
 --- a/package/utils/busybox/Config-defaults.in
 +++ b/package/utils/busybox/Config-defaults.in
-@@ -2182,7 +2182,7 @@ config BUSYBOX_DEFAULT_VOLNAME
+@@ -2236,7 +2236,7 @@ config BUSYBOX_DEFAULT_WATCHDOG
  	default n
- config BUSYBOX_DEFAULT_WATCHDOG
+ config BUSYBOX_DEFAULT_FEATURE_WATCHDOG_OPEN_TWICE
  	bool
 -	default n
 +	default y
@@ -25,5 +25,5 @@ index 168c73b24c..d35ce0b7b8 100644
  	bool
  	default y if IPV6
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/base/0006-base-files-set-default-password-to-openwifi.patch b/patches/0006-base-files-set-default-password-to-openwifi.patch
similarity index 86%
rename from patches/base/0006-base-files-set-default-password-to-openwifi.patch
rename to patches/0006-base-files-set-default-password-to-openwifi.patch
index 3d295ea22..a321a7079 100644
--- a/patches/base/0006-base-files-set-default-password-to-openwifi.patch
+++ b/patches/0006-base-files-set-default-password-to-openwifi.patch
@@ -1,6 +1,6 @@
-From 73116492498c07a2f9c45a7a66a4b03ac103d37d Mon Sep 17 00:00:00 2001
+From 23d6181abeb100726f2185077318eb5983111c00 Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
-Date: Thu, 30 Jul 2020 16:51:04 +0200
+Date: Sat, 15 Jul 2023 10:45:06 +0200
 Subject: [PATCH 06/43] base-files: set default password to "openwifi"
 
 Signed-off-by: John Crispin <john@phrozen.org>
@@ -11,10 +11,10 @@ Signed-off-by: John Crispin <john@phrozen.org>
  3 files changed, 3 insertions(+), 3 deletions(-)
 
 diff --git a/package/base-files/files/bin/config_generate b/package/base-files/files/bin/config_generate
-index 596fcf41fa..30e7c119f7 100755
+index be21d0079a..f494fe2de8 100755
 --- a/package/base-files/files/bin/config_generate
 +++ b/package/base-files/files/bin/config_generate
-@@ -303,7 +303,7 @@ generate_static_system() {
+@@ -313,7 +313,7 @@ generate_static_system() {
  		add system system
  		set system.@system[-1].hostname='OpenWrt'
  		set system.@system[-1].timezone='UTC'
@@ -24,11 +24,11 @@ index 596fcf41fa..30e7c119f7 100755
  		set system.@system[-1].urandom_seed='0'
  
 diff --git a/package/base-files/files/etc/shadow b/package/base-files/files/etc/shadow
-index 4b4154f21f..5b3f32ce64 100644
+index 39bdb9c90a..5b3f32ce64 100644
 --- a/package/base-files/files/etc/shadow
 +++ b/package/base-files/files/etc/shadow
 @@ -1,4 +1,4 @@
--root::0:0:99999:7:::
+-root:::0:99999:7:::
 +root:$1$Ev771IIe$RHpqhCLW3U6c5tg9MrkQD/:18473:0:99999:7:::
  daemon:*:0:0:99999:7:::
  ftp:*:0:0:99999:7:::
@@ -45,5 +45,5 @@ index 1fff39c6a0..2e8dbc0d90 100755
  
  exec /bin/login
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/base/0007-base-files-update-banner.patch b/patches/0007-base-files-update-banner.patch
similarity index 94%
rename from patches/base/0007-base-files-update-banner.patch
rename to patches/0007-base-files-update-banner.patch
index 610232c0b..4c2f7af3d 100644
--- a/patches/base/0007-base-files-update-banner.patch
+++ b/patches/0007-base-files-update-banner.patch
@@ -1,4 +1,4 @@
-From a819600041c0fade872c023637ba0c6c5890de78 Mon Sep 17 00:00:00 2001
+From fc2a78a9e8714989530e399d833407df472edd3e Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Fri, 31 Jul 2020 17:15:13 +0200
 Subject: [PATCH 07/43] base-files: update banner
@@ -30,5 +30,5 @@ index f3af3c014f..f73423bad4 100644
 - -----------------------------------------------------
 + ---------------------------------------------------
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/base/0008-base-files-add-the-wlan-ap-repo-hash.patch b/patches/0008-base-files-add-the-wlan-ap-repo-hash.patch
similarity index 93%
rename from patches/base/0008-base-files-add-the-wlan-ap-repo-hash.patch
rename to patches/0008-base-files-add-the-wlan-ap-repo-hash.patch
index a93b671e2..ef4eb2383 100644
--- a/patches/base/0008-base-files-add-the-wlan-ap-repo-hash.patch
+++ b/patches/0008-base-files-add-the-wlan-ap-repo-hash.patch
@@ -1,4 +1,4 @@
-From f887c60cee77011e009d87639560079b828a452a Mon Sep 17 00:00:00 2001
+From f36cff29ac40469f2a11065b4c4a00329dfab47e Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Sat, 29 Aug 2020 08:25:41 +0200
 Subject: [PATCH 08/43] base-files: add the wlan-ap repo hash
@@ -14,13 +14,12 @@ Signed-off-by: John Crispin <john@phrozen.org>
  package/base-files/files/etc/openwrt_release  |  2 ++
  package/base-files/files/etc/openwrt_version  |  1 +
  ...p-revision-info-to-system.board-call.patch | 28 +++++++++++++++++++
- scripts/gen_config.py                         |  2 +-
  scripts/getver.sh                             | 12 ++++++++
- 8 files changed, 53 insertions(+), 1 deletion(-)
+ 7 files changed, 52 insertions(+)
  create mode 100644 package/system/procd/patches/0001-procd-add-tip-revision-info-to-system.board-call.patch
 
 diff --git a/include/version.mk b/include/version.mk
-index a4b47c8a57..214f32974b 100644
+index 924bf83541..af7d9a1e32 100644
 --- a/include/version.mk
 +++ b/include/version.mk
 @@ -56,6 +56,11 @@ VERSION_PRODUCT:=$(if $(VERSION_PRODUCT),$(VERSION_PRODUCT),Generic)
@@ -44,10 +43,10 @@ index a4b47c8a57..214f32974b 100644
  	-e 's,%h,$(call sed_escape,$(VERSION_HWREV)),g'
  
 diff --git a/package/base-files/Makefile b/package/base-files/Makefile
-index 9db4812981..99cb5476f7 100644
+index 8732f82fb9..dc89de2035 100644
 --- a/package/base-files/Makefile
 +++ b/package/base-files/Makefile
-@@ -209,6 +209,7 @@ define Package/base-files/install
+@@ -239,6 +239,7 @@ endif
  
  	$(if $(CONFIG_TARGET_PREINIT_DISABLE_FAILSAFE), \
  		rm -f $(1)/etc/banner.failsafe,)
@@ -118,7 +117,7 @@ index 0000000000..4e8f05a700
 +2.25.1
 +
 diff --git a/scripts/getver.sh b/scripts/getver.sh
-index dc3d1bb1c3..cd4d7aedf4 100755
+index 49260a2260..8e8ee46f21 100755
 --- a/scripts/getver.sh
 +++ b/scripts/getver.sh
 @@ -3,6 +3,18 @@ export LANG=C
@@ -141,5 +140,5 @@ index dc3d1bb1c3..cd4d7aedf4 100755
  
  try_version() {
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/base/0013-base-files-sysupgrade-always-assume-n-if-f-is-not-pr.patch b/patches/0009-base-files-sysupgrade-always-assume-n-if-f-is-not-pr.patch
similarity index 80%
rename from patches/base/0013-base-files-sysupgrade-always-assume-n-if-f-is-not-pr.patch
rename to patches/0009-base-files-sysupgrade-always-assume-n-if-f-is-not-pr.patch
index a3efd1bfe..7f0640214 100644
--- a/patches/base/0013-base-files-sysupgrade-always-assume-n-if-f-is-not-pr.patch
+++ b/patches/0009-base-files-sysupgrade-always-assume-n-if-f-is-not-pr.patch
@@ -1,7 +1,7 @@
-From 60cf08fa4ce44d7c3d3c6264a933f4c6e5b2e831 Mon Sep 17 00:00:00 2001
+From 1e236f0c048be74a2ba83f7a8b469bfd8ee1b984 Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Mon, 23 Jan 2023 09:47:54 +0100
-Subject: [PATCH] base-files: sysupgrade: always assume -n if -f is not
+Subject: [PATCH 09/43] base-files: sysupgrade: always assume -n if -f is not
  provided
 
 Signed-off-by: John Crispin <john@phrozen.org>
@@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
  1 file changed, 1 insertion(+), 4 deletions(-)
 
 diff --git a/package/base-files/files/sbin/sysupgrade b/package/base-files/files/sbin/sysupgrade
-index 5a2d459013..f55237b935 100755
+index 9315091302..3fc4fcf25c 100755
 --- a/package/base-files/files/sbin/sysupgrade
 +++ b/package/base-files/files/sbin/sysupgrade
 @@ -9,7 +9,7 @@ export MTD_ARGS=""
@@ -22,7 +22,7 @@ index 5a2d459013..f55237b935 100755
  export SAVE_OVERLAY=0
  export SAVE_OVERLAY_PATH=
  export SAVE_PARTITIONS=1
-@@ -345,9 +345,6 @@ if [ -n "$CONF_IMAGE" ]; then
+@@ -349,9 +349,6 @@ if [ -n "$CONF_IMAGE" ]; then
  	esac
  	get_image "$CONF_IMAGE" "cat" > "$CONF_TAR"
  	export SAVE_CONFIG=1
diff --git a/patches/base/0016-base-files-add-a-turnoff-command-to-the-led-script.patch b/patches/0010-base-files-add-a-turnoff-command-to-the-led-script.patch
similarity index 85%
rename from patches/base/0016-base-files-add-a-turnoff-command-to-the-led-script.patch
rename to patches/0010-base-files-add-a-turnoff-command-to-the-led-script.patch
index 6f4c9de36..c0a85942d 100644
--- a/patches/base/0016-base-files-add-a-turnoff-command-to-the-led-script.patch
+++ b/patches/0010-base-files-add-a-turnoff-command-to-the-led-script.patch
@@ -1,7 +1,7 @@
-From bc2e9052af84664a2caae0581aa745d09240b160 Mon Sep 17 00:00:00 2001
+From 9bb541b1e6fab8cc3b1e59f823c6fb66cc341c0a Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Mon, 19 Apr 2021 13:49:20 +0200
-Subject: [PATCH 29/43] base-files: add a turnoff command to the led script
+Subject: [PATCH 10/43] base-files: add a turnoff command to the led script
 
 Signed-off-by: John Crispin <john@phrozen.org>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
  1 file changed, 29 insertions(+)
 
 diff --git a/package/base-files/files/etc/init.d/led b/package/base-files/files/etc/init.d/led
-index 8d97515d52..c402428e40 100755
+index 08a1e6df3b..3b3b934586 100755
 --- a/package/base-files/files/etc/init.d/led
 +++ b/package/base-files/files/etc/init.d/led
 @@ -3,6 +3,10 @@
@@ -23,7 +23,7 @@ index 8d97515d52..c402428e40 100755
  load_led() {
  	local name
  	local sysfs
-@@ -122,7 +126,32 @@ load_led() {
+@@ -125,7 +129,32 @@ load_led() {
  	}
  }
  
@@ -57,5 +57,5 @@ index 8d97515d52..c402428e40 100755
  		[ -s /var/run/led.state ] && {
  			local led trigger brightness
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/base/0054-base-files-add-wifi-scanning-radio-support-to-board_.patch b/patches/0011-base-files-add-wifi-scanning-radio-support-to-board_.patch
similarity index 83%
rename from patches/base/0054-base-files-add-wifi-scanning-radio-support-to-board_.patch
rename to patches/0011-base-files-add-wifi-scanning-radio-support-to-board_.patch
index 4d6499d65..2c3e34ac5 100644
--- a/patches/base/0054-base-files-add-wifi-scanning-radio-support-to-board_.patch
+++ b/patches/0011-base-files-add-wifi-scanning-radio-support-to-board_.patch
@@ -1,7 +1,7 @@
-From 47e7917bed8c23b1d2a92ea225aaee371bc8964a Mon Sep 17 00:00:00 2001
+From 6a1c3236fe645bced0af9f1394cfb71b1820c56a Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Sun, 5 Dec 2021 10:43:34 +0100
-Subject: [PATCH 38/38] base-files: add wifi scanning radio support to
+Subject: [PATCH 11/43] base-files: add wifi scanning radio support to
  board_detect
 
 Signed-off-by: John Crispin <john@phrozen.org>
@@ -12,7 +12,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
  3 files changed, 13 insertions(+)
 
 diff --git a/package/base-files/files/bin/board_detect b/package/base-files/files/bin/board_detect
-index 840bd0178d..dd28bc44dd 100755
+index 94f45bec53..86edc5be0c 100755
 --- a/package/base-files/files/bin/board_detect
 +++ b/package/base-files/files/bin/board_detect
 @@ -12,3 +12,4 @@ CFG=$1
@@ -21,10 +21,10 @@ index 840bd0178d..dd28bc44dd 100755
  [ -s "$CFG" ] || return 1
 +wifi config
 diff --git a/package/base-files/files/lib/functions/uci-defaults.sh b/package/base-files/files/lib/functions/uci-defaults.sh
-index 02882f43ca..ff3433a0a2 100644
+index a37e8cf824..c831469a24 100644
 --- a/package/base-files/files/lib/functions/uci-defaults.sh
 +++ b/package/base-files/files/lib/functions/uci-defaults.sh
-@@ -617,6 +617,16 @@ ucidef_set_hostname() {
+@@ -634,6 +634,16 @@ ucidef_set_hostname() {
  	json_select ..
  }
  
@@ -42,7 +42,7 @@ index 02882f43ca..ff3433a0a2 100644
  	local server
  
 diff --git a/package/base-files/files/sbin/wifi b/package/base-files/files/sbin/wifi
-index 6b9662fe93..b080e22770 100755
+index a3d3206ee7..861feb72e6 100755
 --- a/package/base-files/files/sbin/wifi
 +++ b/package/base-files/files/sbin/wifi
 @@ -1,6 +1,8 @@
@@ -55,5 +55,5 @@ index 6b9662fe93..b080e22770 100755
  . /usr/share/libubox/jshn.sh
  
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/base/0010-base-files-add-support-for-v4.4-style-netdev-led-tri.patch b/patches/0012-base-files-add-support-for-v4.4-style-netdev-led-tri.patch
similarity index 80%
rename from patches/base/0010-base-files-add-support-for-v4.4-style-netdev-led-tri.patch
rename to patches/0012-base-files-add-support-for-v4.4-style-netdev-led-tri.patch
index ed84164bd..af930d91a 100644
--- a/patches/base/0010-base-files-add-support-for-v4.4-style-netdev-led-tri.patch
+++ b/patches/0012-base-files-add-support-for-v4.4-style-netdev-led-tri.patch
@@ -1,7 +1,7 @@
-From db79fb81502c935be1295c258fb4738dfb2351bd Mon Sep 17 00:00:00 2001
+From ddaa9e7bb9ff4fe5e5d44a2b154fe9e2cdc6b140 Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Wed, 23 Sep 2020 17:34:44 +0200
-Subject: [PATCH 10/43] base-files: add support for v4.4 style netdev led
+Subject: [PATCH 12/43] base-files: add support for v4.4 style netdev led
  triggers
 
 Current owrt scripting cant handle the old v4.4 style sysfs API of led
@@ -13,10 +13,10 @@ Signed-off-by: John Crispin <john@phrozen.org>
  1 file changed, 2 insertions(+)
 
 diff --git a/package/base-files/files/etc/init.d/led b/package/base-files/files/etc/init.d/led
-index 277fb4e76f..8d97515d52 100755
+index 3b3b934586..db1cc4a3f1 100755
 --- a/package/base-files/files/etc/init.d/led
 +++ b/package/base-files/files/etc/init.d/led
-@@ -71,6 +71,8 @@ load_led() {
+@@ -80,6 +80,8 @@ load_led() {
  		"netdev")
  			[ -n "$dev" ] && {
  				echo $dev > /sys/class/leds/${sysfs}/device_name
@@ -26,5 +26,5 @@ index 277fb4e76f..8d97515d52 100755
  					[ -e "/sys/class/leds/${sysfs}/$m" ] && \
  						echo 1 > /sys/class/leds/${sysfs}/$m
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/base/0022-iwinfo-add-6E-support.patch b/patches/0013-iwinfo-add-6E-support.patch
similarity index 90%
rename from patches/base/0022-iwinfo-add-6E-support.patch
rename to patches/0013-iwinfo-add-6E-support.patch
index 7a71e26f5..1f726b9ba 100644
--- a/patches/base/0022-iwinfo-add-6E-support.patch
+++ b/patches/0013-iwinfo-add-6E-support.patch
@@ -1,7 +1,7 @@
-From f057826fed0208c369ca9483092c706bf5c9ae9e Mon Sep 17 00:00:00 2001
+From 53f86d4cd4399473090fec41d689ec8675d691ee Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Thu, 12 May 2022 09:31:11 +0200
-Subject: [PATCH] iwinfo: add 6E support
+Subject: [PATCH 13/43] iwinfo: add 6E support
 
 Signed-off-by: John Crispin <john@phrozen.org>
 ---
@@ -29,5 +29,5 @@ index 0000000000..45472e8ccf
 + 		return (freq - 5000) / 5;
 + }
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/base/0023-dnsmasq-ignore-dhcp-on-the-ifb-dhcp-interface.patch b/patches/0014-dnsmasq-ignore-dhcp-on-the-ifb-dhcp-interface.patch
similarity index 68%
rename from patches/base/0023-dnsmasq-ignore-dhcp-on-the-ifb-dhcp-interface.patch
rename to patches/0014-dnsmasq-ignore-dhcp-on-the-ifb-dhcp-interface.patch
index d56dd043e..e31ee6cf2 100644
--- a/patches/base/0023-dnsmasq-ignore-dhcp-on-the-ifb-dhcp-interface.patch
+++ b/patches/0014-dnsmasq-ignore-dhcp-on-the-ifb-dhcp-interface.patch
@@ -1,18 +1,18 @@
-From 65e3d7cb239d85ed3b3ac142a9a53523b7343fe2 Mon Sep 17 00:00:00 2001
+From db5e1b92b1537f2f38b016233d3de72c8a6ee96e Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Mon, 13 Jun 2022 13:33:31 +0200
-Subject: [PATCH] dnsmasq: ignore dhcp on the ifb-dhcp interface
+Subject: [PATCH 14/43] dnsmasq: ignore dhcp on the ifb-dhcp interface
 
 Signed-off-by: John Crispin <john@phrozen.org>
 ---
- package/network/services/dnsmasq/files/dnsmasq.init | 2 ++
- 1 file changed, 2 insertions(+)
+ package/network/services/dnsmasq/files/dnsmasq.init | 3 +++
+ 1 file changed, 3 insertions(+)
 
 diff --git a/package/network/services/dnsmasq/files/dnsmasq.init b/package/network/services/dnsmasq/files/dnsmasq.init
-index 205bfb4cf6..415a6b013d 100644
+index 2a3327b0c6..c6576b6f27 100755
 --- a/package/network/services/dnsmasq/files/dnsmasq.init
 +++ b/package/network/services/dnsmasq/files/dnsmasq.init
-@@ -1106,6 +1106,9 @@ dnsmasq_start()
+@@ -1167,6 +1167,9 @@ dnsmasq_start()
  		[ -n "$BOOT" ] || config_foreach filter_dnsmasq dhcp dhcp_add "$cfg"
  	fi
  
@@ -23,5 +23,5 @@ index 205bfb4cf6..415a6b013d 100644
  	echo >> $CONFIGFILE_TMP
  	config_foreach filter_dnsmasq cname dhcp_cname_add "$cfg"
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/base/0024-wireguard-tools-do-not-select-the-kernel-module.patch b/patches/0015-wireguard-tools-do-not-select-the-kernel-module.patch
similarity index 76%
rename from patches/base/0024-wireguard-tools-do-not-select-the-kernel-module.patch
rename to patches/0015-wireguard-tools-do-not-select-the-kernel-module.patch
index c5727ac81..4b54b38e5 100644
--- a/patches/base/0024-wireguard-tools-do-not-select-the-kernel-module.patch
+++ b/patches/0015-wireguard-tools-do-not-select-the-kernel-module.patch
@@ -1,7 +1,7 @@
-From fcea0e786c9311e3fc6ff256ba320aaa07b6ae05 Mon Sep 17 00:00:00 2001
+From 33d4a794f51e0f2f6ba4ef00cd403d9fb7ba7547 Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Mon, 13 Jun 2022 13:37:17 +0200
-Subject: [PATCH] wireguard-tools: do not select the kernel module
+Subject: [PATCH 15/43] wireguard-tools: do not select the kernel module
 
 unetd will select the correct kernel module.
 
@@ -11,10 +11,10 @@ Signed-off-by: John Crispin <john@phrozen.org>
  1 file changed, 1 insertion(+), 2 deletions(-)
 
 diff --git a/package/network/utils/wireguard-tools/Makefile b/package/network/utils/wireguard-tools/Makefile
-index 5f8da147c1..e0df0a6c67 100644
+index 5b1fab057d..2e5e1a7ed6 100644
 --- a/package/network/utils/wireguard-tools/Makefile
 +++ b/package/network/utils/wireguard-tools/Makefile
-@@ -38,8 +38,7 @@ define Package/wireguard-tools
+@@ -36,8 +36,7 @@ define Package/wireguard-tools
    TITLE:=WireGuard userspace control program (wg)
    DEPENDS:= \
  	  +@BUSYBOX_CONFIG_IP \
@@ -25,5 +25,5 @@ index 5f8da147c1..e0df0a6c67 100644
  
  define Package/wireguard-tools/description
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/base/0026-libubox-do-not-clear-the-cancled-flag-when-a-runqueu.patch b/patches/0016-libubox-do-not-clear-the-cancled-flag-when-a-runqueu.patch
similarity index 86%
rename from patches/base/0026-libubox-do-not-clear-the-cancled-flag-when-a-runqueu.patch
rename to patches/0016-libubox-do-not-clear-the-cancled-flag-when-a-runqueu.patch
index 7246ce818..f4e09da4e 100644
--- a/patches/base/0026-libubox-do-not-clear-the-cancled-flag-when-a-runqueu.patch
+++ b/patches/0016-libubox-do-not-clear-the-cancled-flag-when-a-runqueu.patch
@@ -1,8 +1,8 @@
-From 2d1e4a5142af4f82c4becb58cb7bedcec9067b41 Mon Sep 17 00:00:00 2001
+From cc8027b53b5cc7547d91eb93ac76d885274bad14 Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Wed, 7 Sep 2022 11:08:14 +0200
-Subject: [PATCH] libubox: do not clear the cancled flag when a runqueue task
- is aborted
+Subject: [PATCH 16/43] libubox: do not clear the cancled flag when a runqueue
+ task is aborted
 
 Signed-off-by: John Crispin <john@phrozen.org>
 ---
@@ -29,5 +29,5 @@ index 0000000000..623a474aca
 + 		t->complete(q, t);
 + 	runqueue_start_next(q);
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/base/0029-ugps-update-to-latest-HEAD.patch b/patches/0017-ugps-update-to-latest-HEAD.patch
similarity index 91%
rename from patches/base/0029-ugps-update-to-latest-HEAD.patch
rename to patches/0017-ugps-update-to-latest-HEAD.patch
index 8d53eeba1..641177cef 100644
--- a/patches/base/0029-ugps-update-to-latest-HEAD.patch
+++ b/patches/0017-ugps-update-to-latest-HEAD.patch
@@ -1,7 +1,7 @@
-From 11a8e36bf029d575ff7bfafe6226f91abc74ff5a Mon Sep 17 00:00:00 2001
+From 870473cd263bb21b37734765c091fd50e9cb6fde Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Fri, 27 Jan 2023 13:42:32 +0100
-Subject: [PATCH] ugps: update to latest HEAD
+Subject: [PATCH 17/43] ugps: update to latest HEAD
 
 Signed-off-by: John Crispin <john@phrozen.org>
 ---
@@ -11,10 +11,10 @@ Signed-off-by: John Crispin <john@phrozen.org>
  3 files changed, 6 insertions(+), 4 deletions(-)
 
 diff --git a/package/utils/ugps/Makefile b/package/utils/ugps/Makefile
-index c70a7b7ea6..ab3f852b0d 100644
+index 5afba4e0b0..0cd95576fb 100644
 --- a/package/utils/ugps/Makefile
 +++ b/package/utils/ugps/Makefile
-@@ -12,9 +12,8 @@ PKG_RELEASE:=$(AUTORELEASE)
+@@ -12,9 +12,8 @@ PKG_RELEASE:=2
  
  PKG_SOURCE_URL=$(PROJECT_GIT)/project/ugps.git
  PKG_SOURCE_PROTO:=git
diff --git a/patches/rest/0019-lldp-add-TIP-tweaks.patch b/patches/0018-lldp-add-TIP-tweaks.patch
similarity index 86%
rename from patches/rest/0019-lldp-add-TIP-tweaks.patch
rename to patches/0018-lldp-add-TIP-tweaks.patch
index 9bc522d66..e828dd0e2 100644
--- a/patches/rest/0019-lldp-add-TIP-tweaks.patch
+++ b/patches/0018-lldp-add-TIP-tweaks.patch
@@ -1,7 +1,7 @@
-From 58242d355b483e105affd0c69c681e46e88ad84c Mon Sep 17 00:00:00 2001
+From e0e35c5b940e2e821c6143ce995e7fe842b8b0c9 Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
-Date: Fri, 4 Dec 2020 16:29:35 +0100
-Subject: [PATCH 19/43] lldp: add TIP tweaks
+Date: Sat, 15 Jul 2023 15:40:38 +0200
+Subject: [PATCH 18/43] lldp: add TIP tweaks
 
 Signed-off-by: John Crispin <john@phrozen.org>
 ---
@@ -11,25 +11,25 @@ Signed-off-by: John Crispin <john@phrozen.org>
  3 files changed, 14 insertions(+), 37 deletions(-)
 
 diff --git a/package/network/services/lldpd/Makefile b/package/network/services/lldpd/Makefile
-index 74d6791091..fd55c94cf4 100644
+index 289adc55c9..f90bf0ad3d 100644
 --- a/package/network/services/lldpd/Makefile
 +++ b/package/network/services/lldpd/Makefile
 @@ -8,12 +8,12 @@
  include $(TOPDIR)/rules.mk
  
  PKG_NAME:=lldpd
--PKG_VERSION:=1.0.7
+-PKG_VERSION:=1.0.17
 +PKG_VERSION:=1.0.5
  PKG_RELEASE:=1
  
  PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
- PKG_SOURCE_URL:=https://media.luffy.cx/files/lldpd
--PKG_HASH:=1df79179d489c841b49265f2ab5ff05f284a647e95862d2f3c02b3fb079a87e1
+ PKG_SOURCE_URL:=https://github.com/lldpd/lldpd/releases/download/$(PKG_VERSION)/
+-PKG_HASH:=89ae691a4917ac9e0ec3b8b2c1e634cc402d43b804f98850c73bd1c7df380882
 +PKG_HASH:=2dd3b212f4dbabfcbb2794c0010b245f9f8e74b387984e757be6243a74c6cb99
  
  PKG_MAINTAINER:=Stijn Tintel <stijn@linux-ipv6.be>
  PKG_LICENSE:=ISC
-@@ -97,6 +97,7 @@ CONFIGURE_ARGS += \
+@@ -99,6 +99,7 @@ CONFIGURE_ARGS += \
  	--disable-hardening \
  	--without-xml \
  	--disable-doxygen-doc \
@@ -63,7 +63,7 @@ index 5e7c51ba7e..b37dda87bf 100644
 -	list interface "loopback"
 -	list interface "lan"
 diff --git a/package/network/services/lldpd/files/lldpd.init b/package/network/services/lldpd/files/lldpd.init
-index 7a5b25e016..e587bd7ebd 100644
+index 5b39144921..2650dcb329 100644
 --- a/package/network/services/lldpd/files/lldpd.init
 +++ b/package/network/services/lldpd/files/lldpd.init
 @@ -10,6 +10,10 @@ LLDPSOCKET=/var/run/lldpd.socket
@@ -86,7 +86,7 @@ index 7a5b25e016..e587bd7ebd 100644
  			append ifnames "${ifname:-$iface}" ","
  		fi
  	done
-@@ -58,6 +62,7 @@ write_lldpd_conf()
+@@ -62,6 +66,7 @@ service_triggers() {
  
  start_service() {
  
@@ -94,7 +94,7 @@ index 7a5b25e016..e587bd7ebd 100644
  	local enable_cdp
  	local enable_fdp
  	local enable_sonmp
-@@ -68,6 +73,10 @@ start_service() {
+@@ -72,6 +77,10 @@ start_service() {
  	local agentxsocket
  
  	config_load 'lldpd'
@@ -105,7 +105,7 @@ index 7a5b25e016..e587bd7ebd 100644
  	config_get_bool enable_cdp 'config' 'enable_cdp' 0
  	config_get_bool enable_fdp 'config' 'enable_fdp' 0
  	config_get_bool enable_sonmp 'config' 'enable_sonmp' 0
-@@ -101,24 +110,7 @@ start_service() {
+@@ -104,24 +113,7 @@ start_service() {
  }
  
  reload_service() {
@@ -132,5 +132,5 @@ index 7a5b25e016..e587bd7ebd 100644
  }
  
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/0019-firewall3-4-enable-ssh-on-wan-during-early-boot-stag.patch b/patches/0019-firewall3-4-enable-ssh-on-wan-during-early-boot-stag.patch
new file mode 100644
index 000000000..0d247a05f
--- /dev/null
+++ b/patches/0019-firewall3-4-enable-ssh-on-wan-during-early-boot-stag.patch
@@ -0,0 +1,47 @@
+From a360344ee35b1a2fe56a703f5e192c928f7108bd Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Sat, 15 Jul 2023 15:50:22 +0200
+Subject: [PATCH 19/43] firewall3/4: enable ssh on wan during early boot stage
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ .../network/config/firewall/files/firewall.config   |  2 +-
+ .../firewall4/patches/100-allow-input-wan.patch     | 13 +++++++++++++
+ 2 files changed, 14 insertions(+), 1 deletion(-)
+ create mode 100644 package/network/config/firewall4/patches/100-allow-input-wan.patch
+
+diff --git a/package/network/config/firewall/files/firewall.config b/package/network/config/firewall/files/firewall.config
+index b90ac7af0a..e332bcc7ca 100644
+--- a/package/network/config/firewall/files/firewall.config
++++ b/package/network/config/firewall/files/firewall.config
+@@ -17,7 +17,7 @@ config zone
+ 	option name		wan
+ 	list   network		'wan'
+ 	list   network		'wan6'
+-	option input		REJECT
++	option input		ACCEPT
+ 	option output		ACCEPT
+ 	option forward		REJECT
+ 	option masq		1
+diff --git a/package/network/config/firewall4/patches/100-allow-input-wan.patch b/package/network/config/firewall4/patches/100-allow-input-wan.patch
+new file mode 100644
+index 0000000000..f44a2987cf
+--- /dev/null
++++ b/package/network/config/firewall4/patches/100-allow-input-wan.patch
+@@ -0,0 +1,13 @@
++Index: firewall4-2023-03-23-04a06bd7/root/etc/config/firewall
++===================================================================
++--- firewall4-2023-03-23-04a06bd7.orig/root/etc/config/firewall
+++++ firewall4-2023-03-23-04a06bd7/root/etc/config/firewall
++@@ -17,7 +17,7 @@ config zone
++ 	option name		wan
++ 	list   network		'wan'
++ 	list   network		'wan6'
++-	option input		REJECT
+++	option input		ACCEPT
++ 	option output		ACCEPT
++ 	option forward		REJECT
++ 	option masq		1
+-- 
+2.34.1
+
diff --git a/patches/rest/0039-netifd-fix-compile-on-older-kernels.patch b/patches/0020-netifd-fix-compile-on-older-kernels.patch
similarity index 93%
rename from patches/rest/0039-netifd-fix-compile-on-older-kernels.patch
rename to patches/0020-netifd-fix-compile-on-older-kernels.patch
index a19e69cce..cf4fcac6c 100644
--- a/patches/rest/0039-netifd-fix-compile-on-older-kernels.patch
+++ b/patches/0020-netifd-fix-compile-on-older-kernels.patch
@@ -1,7 +1,7 @@
-From 4b7e51305fcbf27d8c447e165484f513f9ec7185 Mon Sep 17 00:00:00 2001
+From 5bc48fcccc56914a1231a4315852866831df33d5 Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Wed, 4 Aug 2021 08:36:30 +0200
-Subject: [PATCH 39/43] netifd: fix compile on older kernels
+Subject: [PATCH 20/43] netifd: fix compile on older kernels
 
 The ethtool features do not exist on ancient qualcomm kernels.
 Disable that feature if running on QCA.
@@ -50,5 +50,5 @@ index 0000000000..6aee86283e
 + 
 + int system_if_up(struct device *dev)
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/base/0055-support-dhcp-option138.patch b/patches/0021-netifd-Support-DHCP-option-138-and-store-values-in-t.patch
similarity index 93%
rename from patches/base/0055-support-dhcp-option138.patch
rename to patches/0021-netifd-Support-DHCP-option-138-and-store-values-in-t.patch
index 1fe98ddd1..dc0160b5d 100644
--- a/patches/base/0055-support-dhcp-option138.patch
+++ b/patches/0021-netifd-Support-DHCP-option-138-and-store-values-in-t.patch
@@ -1,7 +1,7 @@
-From 61a2e46d47dcd76dfd4b8d18036794dae4f4f212 Mon Sep 17 00:00:00 2001
+From d2bd7480d1306eecf97118487109de0ba5bff1ad Mon Sep 17 00:00:00 2001
 From: Tanya Singh <tanya_singh@accton.com>
 Date: Tue, 28 Jun 2022 17:11:52 +0800
-Subject: [PATCH] Support DHCP option 138 and store values in
+Subject: [PATCH 21/43] netifd: Support DHCP option 138 and store values in
  /tmp/capwap/dhcp_opt.txt
 
 Signed-off-by: Tanya Singh <tanya_singh@accton.com>
@@ -13,7 +13,7 @@ Signed-off-by: Tanya Singh <tanya_singh@accton.com>
  create mode 100644 package/utils/busybox/patches/531-dhcp_opt_capwap.patch
 
 diff --git a/package/network/config/netifd/files/lib/netifd/dhcp.script b/package/network/config/netifd/files/lib/netifd/dhcp.script
-index 6fcf139beb..d7c1324184 100755
+index 6fcf139beb..29de85f221 100755
 --- a/package/network/config/netifd/files/lib/netifd/dhcp.script
 +++ b/package/network/config/netifd/files/lib/netifd/dhcp.script
 @@ -4,6 +4,24 @@
@@ -53,7 +53,7 @@ index 6fcf139beb..d7c1324184 100755
  [ -f /etc/udhcpc.user ] && . /etc/udhcpc.user "$@"
  for f in /etc/udhcpc.user.d/*; do
 diff --git a/package/network/config/netifd/files/lib/netifd/proto/dhcp.sh b/package/network/config/netifd/files/lib/netifd/proto/dhcp.sh
-index 3034b2ba68..89908e5ca4 100755
+index 636b4654ff..18a9aaf2a3 100755
 --- a/package/network/config/netifd/files/lib/netifd/proto/dhcp.sh
 +++ b/package/network/config/netifd/files/lib/netifd/proto/dhcp.sh
 @@ -61,6 +61,7 @@ proto_dhcp_setup() {
@@ -66,7 +66,7 @@ index 3034b2ba68..89908e5ca4 100755
  	proto_run_command "$config" udhcpc \
 diff --git a/package/utils/busybox/patches/531-dhcp_opt_capwap.patch b/package/utils/busybox/patches/531-dhcp_opt_capwap.patch
 new file mode 100644
-index 0000000000..c705c0e40e
+index 0000000000..6c60159555
 --- /dev/null
 +++ b/package/utils/busybox/patches/531-dhcp_opt_capwap.patch
 @@ -0,0 +1,18 @@
@@ -89,4 +89,5 @@ index 0000000000..c705c0e40e
 + 	"tzdbstr" "\0"          /* DHCP_TCODE           */
 + #if ENABLE_FEATURE_UDHCP_RFC3397
 -- 
-2.17.1
+2.34.1
+
diff --git a/patches/base/0056-base-files-add-ucidef_set_wifi_country.patch b/patches/0022-base-files-add-ucidef_set_wifi_country.patch
similarity index 75%
rename from patches/base/0056-base-files-add-ucidef_set_wifi_country.patch
rename to patches/0022-base-files-add-ucidef_set_wifi_country.patch
index ed8f707e9..d5b97e949 100644
--- a/patches/base/0056-base-files-add-ucidef_set_wifi_country.patch
+++ b/patches/0022-base-files-add-ucidef_set_wifi_country.patch
@@ -1,7 +1,7 @@
-From aa0404504cff8bcdac40d8e9b3ec708d2079d705 Mon Sep 17 00:00:00 2001
+From d8e5a9690a26149b66bad9e97aa25f3deb63e48a Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Thu, 22 Sep 2022 15:12:20 +0200
-Subject: [PATCH] base-files: add ucidef_set_wifi_country
+Subject: [PATCH 22/43] base-files: add ucidef_set_wifi_country
 
 Signed-off-by: John Crispin <john@phrozen.org>
 ---
@@ -9,10 +9,10 @@ Signed-off-by: John Crispin <john@phrozen.org>
  1 file changed, 6 insertions(+)
 
 diff --git a/package/base-files/files/lib/functions/uci-defaults.sh b/package/base-files/files/lib/functions/uci-defaults.sh
-index ff3433a0a2..3bc8e6bb1c 100644
+index c831469a24..133181ed18 100644
 --- a/package/base-files/files/lib/functions/uci-defaults.sh
 +++ b/package/base-files/files/lib/functions/uci-defaults.sh
-@@ -627,6 +627,12 @@ ucidef_set_wifi_scanning() {
+@@ -644,6 +644,12 @@ ucidef_set_wifi_scanning() {
  	json_select ..
  }
  
@@ -26,5 +26,5 @@ index ff3433a0a2..3bc8e6bb1c 100644
  	local server
  
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/base/0057-dnsmasq-include-cpeid-subnet-in-edns-option.patch b/patches/0023-dnsmasq-enabled-EDNS-configuration-options-CPE-ID-an.patch
similarity index 64%
rename from patches/base/0057-dnsmasq-include-cpeid-subnet-in-edns-option.patch
rename to patches/0023-dnsmasq-enabled-EDNS-configuration-options-CPE-ID-an.patch
index dfe396376..a831f8c27 100644
--- a/patches/base/0057-dnsmasq-include-cpeid-subnet-in-edns-option.patch
+++ b/patches/0023-dnsmasq-enabled-EDNS-configuration-options-CPE-ID-an.patch
@@ -1,15 +1,19 @@
-From 7b703f7557779fa47bb17dc692bd6140d89a3cdc Mon Dec 5 02:58:36 2022 +0000
+From 132f222fe8bf0c0506db93ffc13a253bec0d8bce Mon Sep 17 00:00:00 2001
 From: Sohail Ahmad <sohail@indionetworks.com>
-Date: Mon Dec 5 02:58:36 2022 +0000
-Subject: [PATCH] dnsmasq: enabled EDNS configuration options- CPE ID and subnet
+Date: Mon, 5 Dec 2022 02:58:36 +0000
+Subject: [PATCH 23/43] dnsmasq: enabled EDNS configuration options- CPE ID and
+ subnet
 
 Signed-off-by: Sohail Ahmad <sohail@indionetworks.com>
+---
+ package/network/services/dnsmasq/files/dnsmasq.init | 4 ++++
+ 1 file changed, 4 insertions(+)
 
 diff --git a/package/network/services/dnsmasq/files/dnsmasq.init b/package/network/services/dnsmasq/files/dnsmasq.init
-index d154d2566d..bacb9cc669 100644
+index c6576b6f27..3df7950f4c 100755
 --- a/package/network/services/dnsmasq/files/dnsmasq.init
 +++ b/package/network/services/dnsmasq/files/dnsmasq.init
-@@ -964,6 +964,10 @@ dnsmasq_start()
+@@ -1023,6 +1023,10 @@ dnsmasq_start()
  	append_parm "$cfg" "max_cache_ttl" "--max-cache-ttl"
  	append_parm "$cfg" "pxe_prompt" "--pxe-prompt"
  	append_parm "$cfg" "tftp_unique_root" "--tftp-unique-root"
@@ -20,3 +24,6 @@ index d154d2566d..bacb9cc669 100644
  	config_list_foreach "$cfg" "pxe_service" append_pxe_service
  	config_get DOMAIN "$cfg" domain
  
+-- 
+2.34.1
+
diff --git a/patches/0024-elfutils-GCC5-compile-fix.patch b/patches/0024-elfutils-GCC5-compile-fix.patch
new file mode 100644
index 000000000..8afa13255
--- /dev/null
+++ b/patches/0024-elfutils-GCC5-compile-fix.patch
@@ -0,0 +1,26 @@
+From 5b61c5de9334f24302741c2c964580023ee3c611 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Sun, 16 Jul 2023 17:15:05 +0200
+Subject: [PATCH 24/43] elfutils: GCC5 compile fix
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ package/libs/elfutils/Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/package/libs/elfutils/Makefile b/package/libs/elfutils/Makefile
+index f7364c36be..1e7e86771f 100644
+--- a/package/libs/elfutils/Makefile
++++ b/package/libs/elfutils/Makefile
+@@ -87,7 +87,7 @@ TARGET_CFLAGS += \
+ 	-Wno-unused-result \
+ 	-Wno-format-nonliteral
+ 
+-ifneq ($(CONFIG_GCC_USE_VERSION_11),y)
++ifneq ($(CONFIG_GCC_USE_VERSION_11)$(CONFIG_GCC_VERSION_5),y)
+ TARGET_CFLAGS += \
+ 	-Wno-error=use-after-free
+ endif
+-- 
+2.34.1
+
diff --git a/patches/0025-generic-enable-pstore-support.patch b/patches/0025-generic-enable-pstore-support.patch
new file mode 100644
index 000000000..ee49072e4
--- /dev/null
+++ b/patches/0025-generic-enable-pstore-support.patch
@@ -0,0 +1,47 @@
+From 033837cb7e161710d2d1c2d0dfce504c75284888 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Sat, 15 Jul 2023 11:58:50 +0200
+Subject: [PATCH 25/43] generic: enable pstore support
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ target/linux/generic/config-5.15 | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/target/linux/generic/config-5.15 b/target/linux/generic/config-5.15
+index 637b845ac4..4bb77e224a 100644
+--- a/target/linux/generic/config-5.15
++++ b/target/linux/generic/config-5.15
+@@ -4838,21 +4838,21 @@ CONFIG_PROC_SYSCTL=y
+ # CONFIG_PSAMPLE is not set
+ # CONFIG_PSB6970_PHY is not set
+ # CONFIG_PSI is not set
+-# CONFIG_PSTORE is not set
++CONFIG_PSTORE=y
+ # CONFIG_PSTORE_842_COMPRESS is not set
+ # CONFIG_PSTORE_BLK is not set
+-# CONFIG_PSTORE_COMPRESS is not set
++CONFIG_PSTORE_COMPRESS=y
++CONFIG_PSTORE_COMPRESS_DEFAULT="deflate"
+ # CONFIG_PSTORE_CONSOLE is not set
+-CONFIG_PSTORE_DEFAULT_KMSG_BYTES=10240
+-# CONFIG_PSTORE_DEFLATE_COMPRESS is not set
+-# CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT is not set
+-# CONFIG_PSTORE_FTRACE is not set
++CONFIG_PSTORE_DEFLATE_COMPRESS=y
++CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y
++# CONFIG_PSTORE_ZSTD_COMPRESS is not set
+ # CONFIG_PSTORE_LZ4HC_COMPRESS is not set
+ # CONFIG_PSTORE_LZ4_COMPRESS is not set
+ # CONFIG_PSTORE_LZO_COMPRESS is not set
+ # CONFIG_PSTORE_PMSG is not set
+-# CONFIG_PSTORE_RAM is not set
+-# CONFIG_PSTORE_ZSTD_COMPRESS is not set
++CONFIG_PSTORE_RAM=y
++CONFIG_PSTORE_DEFAULT_KMSG_BYTES=10240
+ # CONFIG_PTDUMP_DEBUGFS is not set
+ # CONFIG_PTP_1588_CLOCK is not set
+ # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set
+-- 
+2.34.1
+
diff --git a/patches/base/0018-Revert-gpio-button-hotplug-convert-to-gpio-descripto.patch b/patches/0026-gpio-button-hotplug-use-ancient-version-of-the-drive.patch
similarity index 86%
rename from patches/base/0018-Revert-gpio-button-hotplug-convert-to-gpio-descripto.patch
rename to patches/0026-gpio-button-hotplug-use-ancient-version-of-the-drive.patch
index 581f81dd4..8b031286f 100644
--- a/patches/base/0018-Revert-gpio-button-hotplug-convert-to-gpio-descripto.patch
+++ b/patches/0026-gpio-button-hotplug-use-ancient-version-of-the-drive.patch
@@ -1,18 +1,26 @@
-From be7c703e5078abb5f39b9ad435c47db2f9c1f0ec Mon Sep 17 00:00:00 2001
+From 359d3bf3923274b1489c8a5b83fd774e091915e3 Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
-Date: Tue, 4 Jan 2022 05:22:04 +0100
-Subject: [PATCH] Revert "gpio-button-hotplug: convert to gpio descriptor
- (gpiod_) API"
+Date: Sat, 15 Jul 2023 17:49:12 +0200
+Subject: [PATCH 26/43] gpio-button-hotplug: use ancient version of the driver
 
-This reverts commit 6fe4b7aa2b00b4e93871454e6a6fc41eb192c784.
+Signed-off-by: John Crispin <john@phrozen.org>
 ---
- .../src/gpio-button-hotplug.c                 | 142 ++++++++++--------
- 1 file changed, 79 insertions(+), 63 deletions(-)
+ .../src/gpio-button-hotplug.c                 | 149 ++++++++++--------
+ 1 file changed, 79 insertions(+), 70 deletions(-)
 
 diff --git a/package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c b/package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c
-index fcaf7f59de..9575c6245b 100644
+index 522085bb2f..9575c6245b 100644
 --- a/package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c
 +++ b/package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c
+@@ -107,7 +107,7 @@ static struct bh_map button_map[] = {
+ static __printf(3, 4)
+ int bh_event_add_var(struct bh_event *event, int argv, const char *format, ...)
+ {
+-	char buf[128];
++	static char buf[128];
+ 	char *s;
+ 	va_list args;
+ 	int len;
 @@ -242,11 +242,11 @@ static int gpio_button_get_value(struct gpio_keys_button_data *bdata)
  	int val;
  
@@ -131,7 +139,7 @@ index fcaf7f59de..9575c6245b 100644
  	int i;
  
  	if (!pdata) {
-@@ -483,67 +514,46 @@ static int gpio_keys_button_probe(struct platform_device *pdev,
+@@ -483,74 +514,46 @@ static int gpio_keys_button_probe(struct platform_device *pdev,
  	for (i = 0; i < pdata->nbuttons; i++) {
  		struct gpio_keys_button *button = &buttons[i];
  		struct gpio_keys_button_data *bdata = &bdev->data[i];
@@ -160,8 +168,14 @@ index fcaf7f59de..9575c6245b 100644
 -			dev_err(dev, "only supports buttons or switches\n");
 -			error = -EINVAL;
 -			goto out;
+-		}
+-
+-		if (button->irq) {
+-			dev_err(dev, "skipping button %s (only gpio buttons supported)\n",
+-				button->desc);
+-			bdata->b = &pdata->buttons[i];
 +			dev_warn(dev, "only supports buttons or switches\n");
-+			continue;
+ 			continue;
  		}
  
 -		if (gpio_is_valid(button->gpio)) {
@@ -221,7 +235,7 @@ index fcaf7f59de..9575c6245b 100644
  		bdata->last_state = -1; /* Unknown state on boot */
  
  		if (bdev->polled) {
-@@ -574,11 +584,8 @@ static int gpio_keys_button_probe(struct platform_device *pdev,
+@@ -581,11 +584,8 @@ static int gpio_keys_button_probe(struct platform_device *pdev,
  	platform_set_drvdata(pdev, bdev);
  
  	*_bdev = bdev;
@@ -234,7 +248,7 @@ index fcaf7f59de..9575c6245b 100644
  }
  
  static int gpio_keys_probe(struct platform_device *pdev)
-@@ -587,7 +594,9 @@ static int gpio_keys_probe(struct platform_device *pdev)
+@@ -594,7 +594,9 @@ static int gpio_keys_probe(struct platform_device *pdev)
  	struct gpio_keys_button_dev *bdev;
  	int ret, i;
  
@@ -244,7 +258,7 @@ index fcaf7f59de..9575c6245b 100644
  	if (ret)
  		return ret;
  
-@@ -599,8 +608,12 @@ static int gpio_keys_probe(struct platform_device *pdev)
+@@ -606,8 +608,12 @@ static int gpio_keys_probe(struct platform_device *pdev)
  
  		INIT_DELAYED_WORK(&bdata->work, gpio_keys_irq_work_func);
  
@@ -258,7 +272,7 @@ index fcaf7f59de..9575c6245b 100644
  			if (bdata->irq < 0) {
  				dev_err(&pdev->dev, "failed to get irq for gpio:%d\n",
  					button->gpio);
-@@ -618,6 +631,7 @@ static int gpio_keys_probe(struct platform_device *pdev)
+@@ -625,6 +631,7 @@ static int gpio_keys_probe(struct platform_device *pdev)
  		ret = devm_request_threaded_irq(&pdev->dev,
  			bdata->irq, NULL, button_handle_irq,
  			irqflags, dev_name(&pdev->dev), bdata);
@@ -266,7 +280,7 @@ index fcaf7f59de..9575c6245b 100644
  		if (ret < 0) {
  			bdata->irq = 0;
  			dev_err(&pdev->dev, "failed to request irq:%d for gpio:%d\n",
-@@ -639,12 +653,14 @@ static int gpio_keys_polled_probe(struct platform_device *pdev)
+@@ -646,12 +653,14 @@ static int gpio_keys_polled_probe(struct platform_device *pdev)
  	int ret;
  
  	ret = gpio_keys_button_probe(pdev, &bdev, 1);
@@ -282,5 +296,5 @@ index fcaf7f59de..9575c6245b 100644
  		pdata->enable(bdev->dev);
  
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/ipq40xx/0002-ipq40xx-add-ath10k-ct-fw.cfg-stubs.patch b/patches/0027-ipq40xx-add-ath10k-ct-fw.cfg-stubs.patch
similarity index 55%
rename from patches/ipq40xx/0002-ipq40xx-add-ath10k-ct-fw.cfg-stubs.patch
rename to patches/0027-ipq40xx-add-ath10k-ct-fw.cfg-stubs.patch
index 2be30496e..8bc3ed776 100644
--- a/patches/ipq40xx/0002-ipq40xx-add-ath10k-ct-fw.cfg-stubs.patch
+++ b/patches/0027-ipq40xx-add-ath10k-ct-fw.cfg-stubs.patch
@@ -1,97 +1,24 @@
-From bda0e566a474677412cc3097e93b954b628c626b Mon Sep 17 00:00:00 2001
+From d79526cea79b1d38eaa2ea151835096bb6791856 Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Thu, 25 Mar 2021 08:03:48 +0100
-Subject: [PATCH 01/31] ipq40xx: add ath10k-ct fw.cfg stubs
+Subject: [PATCH 27/43] ipq40xx: add ath10k-ct fw.cfg stubs
 
 Signed-off-by: John Crispin <john@phrozen.org>
 ---
- ...the-dst-buffer-to-of_get_mac_address.patch | 29 -----------------
- ...ss-the-dst-buffer-to-of_get_mac_addr.patch | 26 ---------------
  .../etc/hotplug.d/firmware/40-ct-fw-cfg       | 32 +++++++++++++++++++
  .../lib/firmware/ath10k/fwcfg-ipq4019.txt     | 15 +++++++++
  .../lib/firmware/ath10k/fwcfg-qca9888.txt     | 16 ++++++++++
  .../lib/firmware/ath10k/fwcfg-qca9984.txt     | 16 ++++++++++
- .../etc/hotplug.d/firmware/40-ct-fw-cfg       | 32 +++++++++++++++++++
  .../lib/firmware/ath10k/fwcfg-qca9888.txt     | 16 ++++++++++
  .../lib/firmware/ath10k/fwcfg-qca9984.txt     | 16 ++++++++++
- 9 files changed, 143 insertions(+), 55 deletions(-)
- delete mode 100644 package/kernel/mac80211/patches/subsys/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch
- delete mode 100644 package/kernel/mt76/patches/100-Revert-of-net-pass-the-dst-buffer-to-of_get_mac_addr.patch
+ 6 files changed, 111 insertions(+)
  create mode 100644 target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/40-ct-fw-cfg
  create mode 100644 target/linux/ipq40xx/base-files/lib/firmware/ath10k/fwcfg-ipq4019.txt
  create mode 100644 target/linux/ipq40xx/base-files/lib/firmware/ath10k/fwcfg-qca9888.txt
  create mode 100644 target/linux/ipq40xx/base-files/lib/firmware/ath10k/fwcfg-qca9984.txt
- create mode 100644 target/linux/ipq806x/base-files/etc/hotplug.d/firmware/40-ct-fw-cfg
  create mode 100644 target/linux/ipq806x/base-files/lib/firmware/ath10k/fwcfg-qca9888.txt
  create mode 100644 target/linux/ipq806x/base-files/lib/firmware/ath10k/fwcfg-qca9984.txt
 
-diff --git a/package/kernel/mac80211/patches/subsys/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch b/package/kernel/mac80211/patches/subsys/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch
-deleted file mode 100644
-index 26af6a2fb9..0000000000
---- a/package/kernel/mac80211/patches/subsys/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch
-+++ /dev/null
-@@ -1,29 +0,0 @@
----- a/backport-include/linux/of_net.h
--+++ /dev/null
--@@ -1,26 +0,0 @@
---#ifndef _BP_OF_NET_H
---#define _BP_OF_NET_H
---#include_next <linux/of_net.h>
---#include <linux/version.h>
---#include <linux/etherdevice.h>
---
---/* The behavior of of_get_mac_address() changed in kernel 5.2, it now
--- * returns an error code and not NULL in case of an error.
--- */
---#if LINUX_VERSION_IS_LESS(5,13,0)
---static inline int backport_of_get_mac_address(struct device_node *np, u8 *mac_out)
---{
---	const void *mac = of_get_mac_address(np);
---
---	if (!mac)
---		return -ENODEV;
---	if (IS_ERR(mac))
---		return PTR_ERR(mac);
---	ether_addr_copy(mac_out, mac);
---	
---	return 0;
---}
---#define of_get_mac_address LINUX_BACKPORT(of_get_mac_address)
---#endif /* < 5.2 */
---
---#endif /* _BP_OF_NET_H */
-diff --git a/package/kernel/mt76/patches/100-Revert-of-net-pass-the-dst-buffer-to-of_get_mac_addr.patch b/package/kernel/mt76/patches/100-Revert-of-net-pass-the-dst-buffer-to-of_get_mac_addr.patch
-deleted file mode 100644
-index 24b1240548..0000000000
---- a/package/kernel/mt76/patches/100-Revert-of-net-pass-the-dst-buffer-to-of_get_mac_addr.patch
-+++ /dev/null
-@@ -1,26 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Tue, 23 Nov 2021 17:01:45 +0100
--Subject: [PATCH] Revert "of: net: pass the dst buffer to of_get_mac_address()"
--
--This reverts commit 4932c5d80153c336c77dbe8d7af9f8fdd879d01f.
-----
--
----- a/eeprom.c
--+++ b/eeprom.c
--@@ -105,9 +105,15 @@ mt76_eeprom_override(struct mt76_phy *ph
-- {
-- 	struct mt76_dev *dev = phy->dev;
-- 
--+#ifdef CONFIG_OF
-- 	struct device_node *np = dev->dev->of_node;
--+	const u8 *mac = NULL;
-- 
---	of_get_mac_address(np, phy->macaddr);
--+	if (np)
--+		mac = of_get_mac_address(np);
--+	if (!IS_ERR_OR_NULL(mac))
--+		ether_addr_copy(phy->macaddr, mac);
--+#endif
-- 
-- 	if (!is_valid_ether_addr(phy->macaddr)) {
-- 		eth_random_addr(phy->macaddr);
 diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/40-ct-fw-cfg b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/40-ct-fw-cfg
 new file mode 100644
 index 0000000000..7e22cbd4f5
@@ -195,44 +122,6 @@ index 0000000000..924a689000
 +tids = 450
 +skid_limit = 360
 +max_amsdus = 3 
-diff --git a/target/linux/ipq806x/base-files/etc/hotplug.d/firmware/40-ct-fw-cfg b/target/linux/ipq806x/base-files/etc/hotplug.d/firmware/40-ct-fw-cfg
-new file mode 100644
-index 0000000000..c33bbea506
---- /dev/null
-+++ b/target/linux/ipq806x/base-files/etc/hotplug.d/firmware/40-ct-fw-cfg
-@@ -0,0 +1,32 @@
-+#!/bin/sh
-+
-+[ -e /lib/firmware/$FIRMWARE ] && exit 0
-+
-+
-+fwcfg_symlink() {
-+	local chip=$1
-+	local path=$2
-+
-+	ln -s /lib/firmware/ath10k/fwcfg-${chip}.txt /lib/firmware/${FIRMWARE}
-+}
-+
-+case "$FIRMWARE" in                                                         
-+ath10k/fwcfg-pci-0001:01:00.0.txt)
-+	case "$(board_name)" in
-+	edgecore,ssw2ac2600|\
-+	edgecore,ecw5410)
-+		fwcfg_symlink qca9984
-+		;;
-+	esac
-+	;;
-+ath10k/fwcfg-pci-0002:01:00.0.txt)
-+	case "$(board_name)" in
-+	edgecore,ssw2ac2600|\
-+	edgecore,ecw5410)
-+		fwcfg_symlink qca9984
-+		;;	
-+	esac
-+	;;
-+esac
-+
-+exit 0
 diff --git a/target/linux/ipq806x/base-files/lib/firmware/ath10k/fwcfg-qca9888.txt b/target/linux/ipq806x/base-files/lib/firmware/ath10k/fwcfg-qca9888.txt
 new file mode 100644
 index 0000000000..560c8103d7
@@ -278,5 +167,5 @@ index 0000000000..924a689000
 +skid_limit = 360
 +max_amsdus = 3 
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/0028-ipq40xx-enable-pstore-support.patch b/patches/0028-ipq40xx-enable-pstore-support.patch
new file mode 100644
index 000000000..be81d6497
--- /dev/null
+++ b/patches/0028-ipq40xx-enable-pstore-support.patch
@@ -0,0 +1,37 @@
+From 951b9e4887b17cfab12402e941e3f732284028f3 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Sat, 15 Jul 2023 11:46:58 +0200
+Subject: [PATCH 28/43] ipq40xx: enable pstore support
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ .../linux/ipq40xx/patches-5.15/900-pstore.patch | 17 +++++++++++++++++
+ 1 file changed, 17 insertions(+)
+ create mode 100644 target/linux/ipq40xx/patches-5.15/900-pstore.patch
+
+diff --git a/target/linux/ipq40xx/patches-5.15/900-pstore.patch b/target/linux/ipq40xx/patches-5.15/900-pstore.patch
+new file mode 100644
+index 0000000000..940ee02020
+--- /dev/null
++++ b/target/linux/ipq40xx/patches-5.15/900-pstore.patch
+@@ -0,0 +1,17 @@
++Index: linux-5.15.120/arch/arm/boot/dts/qcom-ipq4019.dtsi
++===================================================================
++--- linux-5.15.120.orig/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++++ linux-5.15.120/arch/arm/boot/dts/qcom-ipq4019.dtsi
++@@ -32,6 +32,12 @@
++ 			reg = <0x87e80000 0x180000>;
++ 			no-map;
++ 		};
+++
+++		ramoops@87f00000 {
+++			compatible = "ramoops";
+++			reg = <0x87df0000 0x10000>;
+++			record-size = <0x1000>;
+++		};
++ 	};
++ 
++ 	aliases {
+-- 
+2.34.1
+
diff --git a/patches/ipq40xx/0018-ipq40xx-add-dual-boot-support-for-ecw5211.patch b/patches/0029-ipq40xx-enable-dualboot-on-ecw5211.patch
similarity index 66%
rename from patches/ipq40xx/0018-ipq40xx-add-dual-boot-support-for-ecw5211.patch
rename to patches/0029-ipq40xx-enable-dualboot-on-ecw5211.patch
index 347ac48de..74dc5aa41 100644
--- a/patches/ipq40xx/0018-ipq40xx-add-dual-boot-support-for-ecw5211.patch
+++ b/patches/0029-ipq40xx-enable-dualboot-on-ecw5211.patch
@@ -1,26 +1,24 @@
-From 86dc0a3f51da3440bc216d988c04b225ba169247 Mon Sep 17 00:00:00 2001
+From 97f0b48681010e9b6c4b224da5e28101dd9dd5a5 Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
-Date: Thu, 16 Jun 2022 12:46:08 +0200
-Subject: [PATCH] ipq40xx: add dual boot support for ecw5211
+Date: Sat, 15 Jul 2023 11:59:02 +0200
+Subject: [PATCH] ipq40xx: enable dualboot on ecw5211
 
 Signed-off-by: John Crispin <john@phrozen.org>
 ---
- .../ipq40xx/base-files/etc/init.d/bootcount   | 17 ++++++++++++++---
+ .../ipq40xx/base-files/etc/init.d/bootcount   | 11 +++++++++++
  .../base-files/lib/upgrade/platform.sh        | 19 ++++++++++++++++++-
  .../arm/boot/dts/qcom-ipq4018-ecw5211.dts     | 10 ++++++++++
- 3 files changed, 42 insertions(+), 4 deletions(-)
+ 3 files changed, 39 insertions(+), 1 deletion(-)
 
 diff --git a/target/linux/ipq40xx/base-files/etc/init.d/bootcount b/target/linux/ipq40xx/base-files/etc/init.d/bootcount
-index 36b5d56d0c..5cda1fc245 100755
+index df656c9b85..f6921089bd 100755
 --- a/target/linux/ipq40xx/base-files/etc/init.d/bootcount
 +++ b/target/linux/ipq40xx/base-files/etc/init.d/bootcount
-@@ -13,13 +13,24 @@ boot() {
- 	linksys,mr8300)
- 		mtd resetbc s_env || true
+@@ -8,6 +8,17 @@ boot() {
+ 		[ -n "$(fw_printenv bootcount changed 2>/dev/null)" ] &&\
+ 			echo -e "bootcount\nchanged\n" | /usr/sbin/fw_setenv -s -
  		;;
--	edgecore,spw2ac1200|\
--	edgecore,spw2ac1200-lan-poe|\
- 	edgecore,ecw5211)
++	edgecore,ecw5211)
 +		part="$(awk -F 'ubi.mtd=' '{printf $2}' /proc/cmdline | cut -d " " -f1)"
 +		case "$part" in
 +		rootfs1|\
@@ -31,31 +29,23 @@ index 36b5d56d0c..5cda1fc245 100755
 +			;;
 +		esac
 +		;;
-+	edgecore,spw2ac1200|\
-+	edgecore,spw2ac1200-lan-poe)
- 		avail=$(fw_printenv -n upgrade_available)
- 		[ ${avail} -eq 0 ] || {
--			fw_setenv bootcount 0
- 			fw_setenv upgrade_available 0
-+			fw_setenv bootcount 0
- 		}
-+		;;
- 	esac
- }
+ 	linksys,ea6350v3|\
+ 	linksys,ea8300|\
+ 	linksys,mr8300|\
 diff --git a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-index d44a57c62a..6f2bff527c 100644
+index e6e99b9d21..651ddb8177 100644
 --- a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
 +++ b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-@@ -66,7 +66,6 @@ platform_do_upgrade() {
+@@ -110,7 +110,6 @@ platform_do_upgrade() {
  	avm,fritzrepeater-3000 |\
  	buffalo,wtr-m2133hp |\
  	cilab,meshpoint-one |\
 -	edgecore,ecw5211 |\
  	edgecore,oap100 |\
  	engenius,eap2200 |\
- 	glinet,gl-ap1300 |\
-@@ -78,6 +77,24 @@ platform_do_upgrade() {
- 	tp-link,ec420-g1)
+ 	glinet,gl-a1300 |\
+@@ -157,6 +156,24 @@ platform_do_upgrade() {
+ 	compex,wpj419)
  		nand_do_upgrade "$1"
  		;;
 +	edgecore,ecw5211)
@@ -76,14 +66,14 @@ index d44a57c62a..6f2bff527c 100644
 +		esac
 +		nand_do_upgrade "$1"
 +		;;
- 	alfa-network,ap120c-ac)
- 		mkdir -p /var/lock/
- 		part="$(awk -F 'ubi.mtd=' '{printf $2}' /proc/cmdline | sed -e 's/ .*$//')"
+ 	google,wifi)
+ 		export_bootdevice
+ 		export_partdevice CI_ROOTDEV 0
 diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts
-index 0ee8d1a52e..d8c0853c58 100644
+index 3060b7bd1c..e3e1785e1f 100644
 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts
 +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts
-@@ -258,6 +258,16 @@
+@@ -255,6 +255,16 @@
  				label = "rootfs";
  				reg = <0x00000000 0x04000000>;
  			};
@@ -101,5 +91,5 @@ index 0ee8d1a52e..d8c0853c58 100644
  	};
  };
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/ath79/0001-ath79-add-Support-for-Indio-305AC.patch b/patches/0030-ath79-add-Support-for-Indio-305AC.patch
similarity index 86%
rename from patches/ath79/0001-ath79-add-Support-for-Indio-305AC.patch
rename to patches/0030-ath79-add-Support-for-Indio-305AC.patch
index f531f060b..9728ff6cd 100644
--- a/patches/ath79/0001-ath79-add-Support-for-Indio-305AC.patch
+++ b/patches/0030-ath79-add-Support-for-Indio-305AC.patch
@@ -1,7 +1,7 @@
-From bd7e19e3cc30bda8d0b0ae6f3d0c44425c6b7541 Mon Sep 17 00:00:00 2001
-From: Rohan Nathi <rohan.nathi@indionetworks.com>
-Date: Thu, 24 Jun 2021 13:48:45 +0000
-Subject: [PATCH 01/22] ath79: add Support for Indio 305AC
+From 1311b98f29ac98669ae243f4d793ad6500cf0b8b Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Sat, 15 Jul 2023 12:05:30 +0200
+Subject: [PATCH 30/43] ath79: add Support for Indio 305AC
 
 Signed-off-by: Rohan Nathi <rohan.nathi@indionetworks.com>
 ---
@@ -13,7 +13,7 @@ Signed-off-by: Rohan Nathi <rohan.nathi@indionetworks.com>
 
 diff --git a/target/linux/ath79/dts/qca9531_indio_um-305ac.dts b/target/linux/ath79/dts/qca9531_indio_um-305ac.dts
 new file mode 100755
-index 0000000000..3952c4ad2c
+index 0000000000..63633b7ecb
 --- /dev/null
 +++ b/target/linux/ath79/dts/qca9531_indio_um-305ac.dts
 @@ -0,0 +1,121 @@
@@ -139,22 +139,22 @@ index 0000000000..3952c4ad2c
 +	mtd-cal-data = <&art 0x1000>;
 +};
 diff --git a/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-index 783895525b..80f755b343 100644
+index f0a3755de9..d822f0bab8 100644
 --- a/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
 +++ b/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-@@ -44,6 +44,7 @@ case "$FIRMWARE" in
- 	ubnt,powerbeam-5ac-500|\
- 	ubnt,powerbeam-5ac-gen2|\
- 	ubnt,unifiac-pro|\
+@@ -25,6 +25,7 @@ case "$FIRMWARE" in
+ 	comfast,cf-wr650ac-v2|\
+ 	devolo,dlan-pro-1200plus-ac|\
+ 	devolo,magic-2-wifi|\
 +	indio,um-305ac|\
- 	yuncore,a770)
- 		caldata_extract "art" 0x5000 0x844
- 		;;
+ 	joyit,jt-or750i|\
+ 	qxwlan,e1700ac-v2-8m|\
+ 	qxwlan,e1700ac-v2-16m|\
 diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk
-index ce4e462a40..24778e8f1c 100644
+index 1a558c30a0..5882feafcb 100644
 --- a/target/linux/ath79/image/generic.mk
 +++ b/target/linux/ath79/image/generic.mk
-@@ -2209,6 +2209,17 @@ define Device/yuncore_a770
+@@ -2991,6 +2991,17 @@ define Device/yuncore_a770
  endef
  TARGET_DEVICES += yuncore_a770
  
@@ -173,5 +173,5 @@ index ce4e462a40..24778e8f1c 100644
    SOC := qca9563
    DEVICE_VENDOR := YunCore
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/0031-ath79-enable-bridge-vlan.patch b/patches/0031-ath79-enable-bridge-vlan.patch
new file mode 100644
index 000000000..d2ccf57ef
--- /dev/null
+++ b/patches/0031-ath79-enable-bridge-vlan.patch
@@ -0,0 +1,25 @@
+From 3fcc5230cb60daa8bd01bb1b781a9685643e8a49 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Sat, 15 Jul 2023 12:08:40 +0200
+Subject: [PATCH 31/43] ath79: enable bridge vlan
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ target/linux/ath79/generic/base-files/etc/board.d/02_network | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/target/linux/ath79/generic/base-files/etc/board.d/02_network b/target/linux/ath79/generic/base-files/etc/board.d/02_network
+index 4f535f8a64..5b98d50183 100644
+--- a/target/linux/ath79/generic/base-files/etc/board.d/02_network
++++ b/target/linux/ath79/generic/base-files/etc/board.d/02_network
+@@ -818,6 +818,7 @@ ath79_setup_macs()
+ 
+ board_config_update
+ board=$(board_name)
++ucidef_set_bridge_device bridge
+ ath79_setup_interfaces $board
+ ath79_setup_macs $board
+ board_config_flush
+-- 
+2.34.1
+
diff --git a/patches/0032-ramips-add-certificates-partitions.patch b/patches/0032-ramips-add-certificates-partitions.patch
new file mode 100644
index 000000000..5d772b7b4
--- /dev/null
+++ b/patches/0032-ramips-add-certificates-partitions.patch
@@ -0,0 +1,50 @@
+From b3177e08af3db3ddee379869450e35f810362d5c Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Sat, 15 Jul 2023 15:16:57 +0200
+Subject: [PATCH 01/15] ramips: add certificates partitions
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ target/linux/ramips/dts/mt7621_yuncore_ax820.dts  | 7 ++++++-
+ target/linux/ramips/dts/mt7621_yuncore_fap640.dts | 7 ++++++-
+ 2 files changed, 12 insertions(+), 2 deletions(-)
+
+diff --git a/target/linux/ramips/dts/mt7621_yuncore_ax820.dts b/target/linux/ramips/dts/mt7621_yuncore_ax820.dts
+index 1aba94a912..51fd358095 100644
+--- a/target/linux/ramips/dts/mt7621_yuncore_ax820.dts
++++ b/target/linux/ramips/dts/mt7621_yuncore_ax820.dts
+@@ -120,7 +120,12 @@
+ 			partition@90000 {
+ 				compatible = "denx,uimage";
+ 				label = "firmware";
+-				reg = <0x90000 0xf70000>;
++				reg = <0x90000 0xf60000>;
++			};
++
++			partition@ff0000 {
++				label = "certificates";
++				reg = <0xff0000 0x10000>;
+ 			};
+ 		};
+ 	};
+diff --git a/target/linux/ramips/dts/mt7621_yuncore_fap640.dts b/target/linux/ramips/dts/mt7621_yuncore_fap640.dts
+index d525dde385..754b7c23ea 100644
+--- a/target/linux/ramips/dts/mt7621_yuncore_fap640.dts
++++ b/target/linux/ramips/dts/mt7621_yuncore_fap640.dts
+@@ -128,7 +128,12 @@
+ 			partition@90000 {
+ 				compatible = "denx,uimage";
+ 				label = "firmware";
+-				reg = <0x90000 0xf70000>;
++				reg = <0x90000 0xf60000>;
++			};
++
++			partition@ff0000 {
++				label = "certificates";
++				reg = <0xff0000 0x10000>;
+ 			};
+ 		};
+ 	};
+-- 
+2.34.1
+
diff --git a/patches/ramips/0015-ramips-mt7621-indio-um-305ax-support.patch b/patches/0033-ramips-add-mt7621_indio_um-305ax.patch
similarity index 66%
rename from patches/ramips/0015-ramips-mt7621-indio-um-305ax-support.patch
rename to patches/0033-ramips-add-mt7621_indio_um-305ax.patch
index a5b3a3315..63cddbab6 100644
--- a/patches/ramips/0015-ramips-mt7621-indio-um-305ax-support.patch
+++ b/patches/0033-ramips-add-mt7621_indio_um-305ax.patch
@@ -1,18 +1,58 @@
-From abd6918dc1af8d411aacc333bbddbfdcce25d439 Mon Sep 17 00:00:00 2001
+From eeec43439f2f53cd88c03b73a6092d342d56bff6 Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
-Date: Wed, 20 Apr 2022 09:13:33 +0200
-Subject: [PATCH 01/35] ramips: add mt7621_indio_um-305ax
+Date: Sat, 15 Jul 2023 15:25:59 +0200
+Subject: [PATCH 33/43] ramips: add mt7621_indio_um-305ax
 
 Signed-off-by: John Crispin <john@phrozen.org>
 ---
+ target/linux/ath79/image/generic.mk           |  22 +--
  .../ramips/dts/mt7621_indio_um-305ax.dts      | 146 ++++++++++++++++++
- target/linux/ramips/image/mt7621.mk           |  12 ++
+ target/linux/ramips/image/mt7621.mk           |  11 ++
  .../mt7621/base-files/etc/board.d/02_network  |   6 +
  .../etc/hotplug.d/ieee80211/10_fix_wifi_mac   |   6 +
- target/linux/ramips/mt7621/config-5.4         |  11 +-
- 5 files changed, 176 insertions(+), 5 deletions(-)
+ 5 files changed, 180 insertions(+), 11 deletions(-)
  create mode 100644 target/linux/ramips/dts/mt7621_indio_um-305ax.dts
 
+diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk
+index 5882feafcb..a98a5e816f 100644
+--- a/target/linux/ath79/image/generic.mk
++++ b/target/linux/ath79/image/generic.mk
+@@ -1627,6 +1627,17 @@ define Device/hiwifi_hc6361
+ endef
+ TARGET_DEVICES += hiwifi_hc6361
+ 
++define Device/indio_um-305ac
++  SOC := qca9531
++  DEVICE_VENDOR := Indio Network
++  DEVICE_MODEL := UM-305AC
++  DEVICE_PACKAGES := kmod-ath10k ath10k-firmware-qca9887
++  IMAGE_SIZE := 16000k
++  IMAGES += tftp.bin
++  IMAGE/tftp.bin := $$(IMAGE/sysupgrade.bin) | yuncore-tftp-header-16m
++endef
++TARGET_DEVICES += indio_um-305ac
++
+ define Device/iodata_etg3-r
+   SOC := ar9342
+   DEVICE_VENDOR := I-O DATA
+@@ -2991,17 +3002,6 @@ define Device/yuncore_a770
+ endef
+ TARGET_DEVICES += yuncore_a770
+ 
+-define Device/indio_um-305ac
+-  SOC := qca9531
+-  DEVICE_VENDOR := Indio Network
+-  DEVICE_MODEL := UM-305AC
+-  DEVICE_PACKAGES := kmod-ath10k ath10k-firmware-qca9887
+-  IMAGE_SIZE := 16000k
+-  IMAGES += tftp.bin
+-  IMAGE/tftp.bin := $$(IMAGE/sysupgrade.bin) | yuncore-tftp-header-16m
+-endef
+-TARGET_DEVICES += indio_um-305ac
+-
+ define Device/yuncore_a782
+   SOC := qca9563
+   DEVICE_VENDOR := YunCore
 diff --git a/target/linux/ramips/dts/mt7621_indio_um-305ax.dts b/target/linux/ramips/dts/mt7621_indio_um-305ax.dts
 new file mode 100644
 index 0000000000..79cffbdec2
@@ -166,14 +206,13 @@ index 0000000000..79cffbdec2
 +};
 +
 diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
-index 81ef6bbd14..9e1eed024b 100644
+index fa4c83dbe1..97505c3504 100644
 --- a/target/linux/ramips/image/mt7621.mk
 +++ b/target/linux/ramips/image/mt7621.mk
-@@ -1736,3 +1736,15 @@ define Device/zyxel_wap6805
-   IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+@@ -1136,6 +1136,17 @@ define Device/huasifei_ws1208v2
  endef
- TARGET_DEVICES += zyxel_wap6805
-+
+ TARGET_DEVICES += huasifei_ws1208v2
+ 
 +define Device/indio_um-305ax
 +  $(Device/dsa-migration)
 +  DEVICE_VENDOR := INDIO
@@ -185,21 +224,24 @@ index 81ef6bbd14..9e1eed024b 100644
 +endef
 +TARGET_DEVICES += indio_um-305ax
 +
+ define Device/iodata_wn-ax1167gr
+   $(Device/dsa-migration)
+   $(Device/uimage-lzma-loader)
 diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
-index b88fac6f59..c0a6bc884a 100755
+index 6057c17192..405da43bdb 100644
 --- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
 +++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
-@@ -33,6 +33,7 @@ ramips_setup_interfaces()
+@@ -58,6 +58,7 @@ ramips_setup_interfaces()
  		;;
- 	actiontec,web7200|\
  	asiarf,ap7621-001|\
+ 	humax,e10|\
 +	indio,um-305ax|\
+ 	wavlink,ws-wn572hp3-4g|\
  	winstars,ws-wn583a6)
  		ucidef_set_interfaces_lan_wan "lan" "wan"
- 		;;
-@@ -173,6 +174,11 @@ ramips_setup_macs()
- 		wan_mac=$label_mac
- 		lan_mac=$(macaddr_add $label_mac 1)
+@@ -146,6 +147,11 @@ ramips_setup_interfaces()
+ 	*)
+ 		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
  		;;
 +	indio,um-305ax)
 +		label_mac=$(mtd_get_mac_binary factory 0x4)
@@ -207,15 +249,15 @@ index b88fac6f59..c0a6bc884a 100755
 +		lan_mac=$label_mac
 +		;;
  	esac
+ }
  
- 	[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
 diff --git a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
-index 7109a4647e..157e706534 100644
+index 3467e783f0..d5bd50fdf7 100644
 --- a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
 +++ b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
-@@ -15,6 +15,12 @@ case "$board" in
- 		[ "$PHYNBR" = "0" ] && macaddr_add $wan_mac 2 > /sys${DEVPATH}/macaddress
- 		[ "$PHYNBR" = "1" ] && macaddr_add $wan_mac 3 > /sys${DEVPATH}/macaddress
+@@ -60,6 +60,12 @@ case "$board" in
+ 			macaddr_setbit_la "$base_mac" > /sys${DEVPATH}/macaddress
+ 		fi
  		;;
 +	indio,um-305ax)
 +		[ "$PHYNBR" = "0" ] && \
@@ -226,56 +268,6 @@ index 7109a4647e..157e706534 100644
  	glinet,gl-mt1300)
  		[ "$PHYNBR" = "1" ] && \
  			macaddr_add "$(mtd_get_mac_binary factory 0x4)" 1 > /sys${DEVPATH}/macaddress
-diff --git a/target/linux/ramips/mt7621/config-5.4 b/target/linux/ramips/mt7621/config-5.4
-index eada0ff602..809baf5441 100644
---- a/target/linux/ramips/mt7621/config-5.4
-+++ b/target/linux/ramips/mt7621/config-5.4
-@@ -43,6 +43,7 @@ CONFIG_CRYPTO_AEAD2=y
- CONFIG_CRYPTO_DEFLATE=y
- CONFIG_CRYPTO_HASH2=y
- CONFIG_CRYPTO_HASH_INFO=y
-+CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
- CONFIG_CRYPTO_LZO=y
- CONFIG_CRYPTO_MANAGER=y
- CONFIG_CRYPTO_MANAGER2=y
-@@ -53,17 +54,12 @@ CONFIG_DEBUG_PINCTRL=y
- CONFIG_DIMLIB=y
- CONFIG_DMA_NONCOHERENT=y
- CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y
--# CONFIG_DMA_RALINK is not set
- # CONFIG_DTB_GNUBEE1 is not set
- # CONFIG_DTB_GNUBEE2 is not set
- CONFIG_DTB_RT_NONE=y
- CONFIG_DTC=y
- CONFIG_EARLY_PRINTK=y
--CONFIG_EFI_EARLYCON=y
- CONFIG_FIXED_PHY=y
--CONFIG_FONT_8x16=y
--CONFIG_FONT_AUTOSELECT=y
--CONFIG_FONT_SUPPORT=y
- CONFIG_FW_LOADER_PAGED_BUF=y
- CONFIG_GENERIC_ATOMIC64=y
- CONFIG_GENERIC_CLOCKEVENTS=y
-@@ -209,6 +205,7 @@ CONFIG_PHYLIB=y
- CONFIG_PHYLINK=y
- # CONFIG_PHY_RALINK_USB is not set
- CONFIG_PINCTRL=y
-+CONFIG_PINCTRL_AW9523=y
- CONFIG_PINCTRL_RT2880=y
- # CONFIG_PINCTRL_SINGLE is not set
- CONFIG_PINCTRL_SX150X=y
-@@ -222,7 +219,11 @@ CONFIG_RALINK=y
- CONFIG_RATIONAL=y
- CONFIG_RCU_NEED_SEGCBLIST=y
- CONFIG_RCU_STALL_COMMON=y
-+CONFIG_REED_SOLOMON=y
-+CONFIG_REED_SOLOMON_DEC8=y
-+CONFIG_REED_SOLOMON_ENC8=y
- CONFIG_REGMAP=y
-+CONFIG_REGMAP_I2C=y
- CONFIG_REGMAP_MMIO=y
- CONFIG_REGULATOR=y
- CONFIG_REGULATOR_FIXED_VOLTAGE=y
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/x86/0001-Set-eth0-as-WAN-interface-by-default-for-x86.patch b/patches/0034-x86-Set-eth0-as-WAN-interface-by-default-for-x86.patch
similarity index 75%
rename from patches/x86/0001-Set-eth0-as-WAN-interface-by-default-for-x86.patch
rename to patches/0034-x86-Set-eth0-as-WAN-interface-by-default-for-x86.patch
index 80ed9d319..191c938ae 100644
--- a/patches/x86/0001-Set-eth0-as-WAN-interface-by-default-for-x86.patch
+++ b/patches/0034-x86-Set-eth0-as-WAN-interface-by-default-for-x86.patch
@@ -1,7 +1,7 @@
-From 08d64888eca2337cd7562f7c84bebde3f8eca858 Mon Sep 17 00:00:00 2001
+From 87846201a8a268ac76f27a81830523d1ea75e56c Mon Sep 17 00:00:00 2001
 From: Johann Hoffmann <johann.hoffmann@mailbox.org>
 Date: Mon, 11 Apr 2022 17:25:43 +0000
-Subject: [PATCH] Set eth0 as WAN interface by default for x86
+Subject: [PATCH 34/43] x86: Set eth0 as WAN interface by default for x86
 
 Signed-off-by: Johann Hoffmann <johann.hoffmann@mailbox.org>
 ---
@@ -9,10 +9,10 @@ Signed-off-by: Johann Hoffmann <johann.hoffmann@mailbox.org>
  1 file changed, 3 insertions(+)
 
 diff --git a/target/linux/x86/base-files/etc/board.d/02_network b/target/linux/x86/base-files/etc/board.d/02_network
-index 21f054019a..40b0bba9f5 100755
+index e00e8c04dd..d924fa93e0 100644
 --- a/target/linux/x86/base-files/etc/board.d/02_network
 +++ b/target/linux/x86/base-files/etc/board.d/02_network
-@@ -22,6 +22,9 @@ traverse-technologies-geos)
+@@ -75,6 +75,9 @@ traverse-technologies-geos)
  	macaddr="$(cat /sys/class/net/eth0/address)" 2>/dev/null
  	[ -n "$macaddr" ] && ucidef_set_interface_macaddr "wan" "$macaddr"
  	;;
@@ -23,5 +23,5 @@ index 21f054019a..40b0bba9f5 100755
  board_config_flush
  
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/ipq807x/0005-include-image-commands.mk-build-mmc-qdsk-images.patch b/patches/0035-include-image-commands.mk-build-mmc-qdsk-images.patch
similarity index 75%
rename from patches/ipq807x/0005-include-image-commands.mk-build-mmc-qdsk-images.patch
rename to patches/0035-include-image-commands.mk-build-mmc-qdsk-images.patch
index b310ef0db..4ee076a29 100644
--- a/patches/ipq807x/0005-include-image-commands.mk-build-mmc-qdsk-images.patch
+++ b/patches/0035-include-image-commands.mk-build-mmc-qdsk-images.patch
@@ -1,7 +1,7 @@
-From 398ceb5dee1a6e1e7e30e02d4f77316a83fdc5b1 Mon Sep 17 00:00:00 2001
+From 633632f950423d7fcc588bb9d79fe6ca9d0fa516 Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Sun, 22 May 2022 16:56:10 +0200
-Subject: [PATCH] include/image-commands.mk: build mmc qdsk images
+Subject: [PATCH 35/43] include/image-commands.mk: build mmc qdsk images
 
 Signed-off-by: John Crispin <john@phrozen.org>
 ---
@@ -9,10 +9,10 @@ Signed-off-by: John Crispin <john@phrozen.org>
  1 file changed, 7 insertions(+)
 
 diff --git a/include/image-commands.mk b/include/image-commands.mk
-index d4bce80e68..541ec4f575 100644
+index 08adbb6454..bd20f9608c 100644
 --- a/include/image-commands.mk
 +++ b/include/image-commands.mk
-@@ -354,6 +354,13 @@ define Build/qsdk-ipq-factory-nor
+@@ -499,6 +499,13 @@ define Build/qsdk-ipq-factory-nor
  	@mv $@.new $@
  endef
  
@@ -27,5 +27,5 @@ index d4bce80e68..541ec4f575 100644
  	$(STAGING_DIR_HOST)/bin/seama -i $@ \
  		-m "dev=/dev/mtdblock/$(SEAMA_MTDBLOCK)" -m "type=firmware"
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/ipq807x/0001-Revert-toolchain-gcc-Remove-support-for-GCC-5.patch b/patches/0036-ipq807x-add-gcc-5-support.patch
similarity index 89%
rename from patches/ipq807x/0001-Revert-toolchain-gcc-Remove-support-for-GCC-5.patch
rename to patches/0036-ipq807x-add-gcc-5-support.patch
index fcbe0080b..c8fa38534 100644
--- a/patches/ipq807x/0001-Revert-toolchain-gcc-Remove-support-for-GCC-5.patch
+++ b/patches/0036-ipq807x-add-gcc-5-support.patch
@@ -1,102 +1,108 @@
-From 2947f1c2ac5e300d209b952979da30e92330a01f Mon Sep 17 00:00:00 2001
+From 5eb23f252c2d3cf754d98120f30c6b8a4e054671 Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
-Date: Mon, 25 Jan 2021 06:40:20 +0100
-Subject: [PATCH 02/43] Revert "toolchain: gcc: Remove support for GCC 5"
+Date: Sat, 15 Jul 2023 16:00:29 +0200
+Subject: [PATCH 36/43] ipq807x: add gcc-5 support
 
-This reverts commit 080dc619d4780a1f7b14082b77b28686e694f72d.
+Signed-off-by: John Crispin <john@phrozen.org>
 ---
- toolchain/gcc/Config.in                       |    5 +
- toolchain/gcc/Config.version                  |    7 +-
+ toolchain/gcc/Config.in                       |    9 +
+ toolchain/gcc/Config.version                  |    6 +
  toolchain/gcc/common.mk                       |    4 +
  .../001-revert_register_mode_search.patch     |   65 +
- .../patches/5.5.0/002-case_insensitive.patch  |   14 +
- .../gcc/patches/5.5.0/010-documentation.patch |   23 +
- .../patches/5.5.0/020-no-plt-backport.patch   |   28 +
- .../5.5.0/040-fix-mips-ICE-PR-68400.patch     |   23 +
+ .../patches-5.x/002-case_insensitive.patch    |   14 +
+ toolchain/gcc/patches-5.x/003-build_fix.patch |   11 +
+ .../gcc/patches-5.x/010-documentation.patch   |   23 +
+ .../gcc/patches-5.x/020-no-plt-backport.patch |   28 +
+ .../040-fix-mips-ICE-PR-68400.patch           |   23 +
  ...efine-__always_inline-in-local_atomi.patch | 1092 +++++++++++++++++
- .../gcc/patches/5.5.0/200-musl_config.patch   |  309 +++++
- .../gcc/patches/5.5.0/201-musl_arm.patch      |   43 +
- .../gcc/patches/5.5.0/202-musl_mips.patch     |   35 +
- .../gcc/patches/5.5.0/203-musl_powerpc.patch  |  209 ++++
- toolchain/gcc/patches/5.5.0/204-musl_sh.patch |   39 +
- .../gcc/patches/5.5.0/205-musl_x86.patch      |   41 +
- .../gcc/patches/5.5.0/206-musl_aarch64.patch  |   31 +
- .../patches/5.5.0/207-musl_fixincludes.patch  |   30 +
- .../patches/5.5.0/209-musl_libstdc++.patch    |   72 ++
- .../gcc/patches/5.5.0/230-musl_libssp.patch   |   13 +
- .../patches/5.5.0/240-musl-libitm-fixes.patch |   61 +
- .../gcc/patches/5.5.0/250-add-musl.patch      |  120 ++
- .../5.5.0/260-musl-add-unwind-fix.patch       |   34 +
+ .../gcc/patches-5.x/200-musl_config.patch     |  309 +++++
+ toolchain/gcc/patches-5.x/201-musl_arm.patch  |   43 +
+ toolchain/gcc/patches-5.x/202-musl_mips.patch |   35 +
+ .../gcc/patches-5.x/203-musl_powerpc.patch    |  209 ++++
+ toolchain/gcc/patches-5.x/204-musl_sh.patch   |   39 +
+ toolchain/gcc/patches-5.x/205-musl_x86.patch  |   41 +
+ .../gcc/patches-5.x/206-musl_aarch64.patch    |   31 +
+ .../patches-5.x/207-musl_fixincludes.patch    |   30 +
+ .../gcc/patches-5.x/209-musl_libstdc++.patch  |   72 ++
+ .../gcc/patches-5.x/230-musl_libssp.patch     |   13 +
+ .../patches-5.x/240-musl-libitm-fixes.patch   |   61 +
+ toolchain/gcc/patches-5.x/250-add-musl.patch  |  120 ++
+ .../patches-5.x/260-musl-add-unwind-fix.patch |   34 +
  .../270-musl-add-powerpc-softfloat-fix.patch  |   24 +
  .../280-musl-disable-ifunc-by-default.patch   |   36 +
  .../300-mips_Os_cpu_rtx_cost_model.patch      |   14 +
- .../5.5.0/800-arm_v5te_no_ldrd_strd.patch     |   11 +
- .../5.5.0/810-arm-softfloat-libgcc.patch      |   25 +
- .../gcc/patches/5.5.0/820-libgcc_pic.patch    |   36 +
- .../5.5.0/830-arm_unbreak_armv4t.patch        |   13 +
- .../5.5.0/840-armv4_pass_fix-v4bx_to_ld.patch |   19 +
- .../patches/5.5.0/850-use_shared_libgcc.patch |   47 +
- .../patches/5.5.0/851-libgcc_no_compat.patch  |   12 +
- .../patches/5.5.0/870-ppc_no_crtsavres.patch  |   11 +
- .../patches/5.5.0/880-no_java_section.patch   |   11 +
- .../gcc/patches/5.5.0/881-no_tm_section.patch |   11 +
- .../patches/5.5.0/900-bad-mips16-crt.patch    |    9 +
- .../gcc/patches/5.5.0/910-mbsd_multi.patch    |  222 ++++
- .../5.5.0/920-specs_nonfatal_getenv.patch     |   15 +
- .../5.5.0/930-fix-mips-noexecstack.patch      |  111 ++
+ .../800-arm_v5te_no_ldrd_strd.patch           |   11 +
+ .../810-arm-softfloat-libgcc.patch            |   25 +
+ .../gcc/patches-5.x/820-libgcc_pic.patch      |   36 +
+ .../patches-5.x/830-arm_unbreak_armv4t.patch  |   13 +
+ .../840-armv4_pass_fix-v4bx_to_ld.patch       |   19 +
+ .../patches-5.x/850-use_shared_libgcc.patch   |   47 +
+ .../patches-5.x/851-libgcc_no_compat.patch    |   12 +
+ .../patches-5.x/870-ppc_no_crtsavres.patch    |   11 +
+ .../gcc/patches-5.x/880-no_java_section.patch |   11 +
+ .../gcc/patches-5.x/881-no_tm_section.patch   |   11 +
+ .../gcc/patches-5.x/900-bad-mips16-crt.patch  |    9 +
+ .../gcc/patches-5.x/910-mbsd_multi.patch      |  222 ++++
+ .../920-specs_nonfatal_getenv.patch           |   15 +
+ .../930-fix-mips-noexecstack.patch            |  111 ++
  .../931-fix-MIPS-softfloat-build-issue.patch  |  167 +++
- .../5.5.0/940-no-clobber-stamp-bits.patch     |   11 +
- .../5.5.0/950-cpp_file_path_translation.patch |  182 +++
- toolchain/gcc/patches/5.5.0/960-go_libm.patch |   11 +
- .../gcc/patches/5.5.0/970-warn_bug.patch      |   11 +
- 44 files changed, 3306 insertions(+), 1 deletion(-)
- create mode 100644 toolchain/gcc/patches/5.5.0/001-revert_register_mode_search.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/002-case_insensitive.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/010-documentation.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/020-no-plt-backport.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/040-fix-mips-ICE-PR-68400.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/050-libitm-Don-t-redefine-__always_inline-in-local_atomi.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/200-musl_config.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/201-musl_arm.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/202-musl_mips.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/203-musl_powerpc.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/204-musl_sh.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/205-musl_x86.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/206-musl_aarch64.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/207-musl_fixincludes.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/209-musl_libstdc++.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/230-musl_libssp.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/240-musl-libitm-fixes.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/250-add-musl.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/260-musl-add-unwind-fix.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/270-musl-add-powerpc-softfloat-fix.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/280-musl-disable-ifunc-by-default.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/300-mips_Os_cpu_rtx_cost_model.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/800-arm_v5te_no_ldrd_strd.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/810-arm-softfloat-libgcc.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/820-libgcc_pic.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/830-arm_unbreak_armv4t.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/840-armv4_pass_fix-v4bx_to_ld.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/850-use_shared_libgcc.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/851-libgcc_no_compat.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/870-ppc_no_crtsavres.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/880-no_java_section.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/881-no_tm_section.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/900-bad-mips16-crt.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/910-mbsd_multi.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/920-specs_nonfatal_getenv.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/930-fix-mips-noexecstack.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/931-fix-MIPS-softfloat-build-issue.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/940-no-clobber-stamp-bits.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/950-cpp_file_path_translation.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/960-go_libm.patch
- create mode 100644 toolchain/gcc/patches/5.5.0/970-warn_bug.patch
+ .../940-no-clobber-stamp-bits.patch           |   11 +
+ .../950-cpp_file_path_translation.patch       |  182 +++
+ toolchain/gcc/patches-5.x/960-go_libm.patch   |   11 +
+ toolchain/gcc/patches-5.x/970-warn_bug.patch  |   11 +
+ 45 files changed, 3321 insertions(+)
+ create mode 100644 toolchain/gcc/patches-5.x/001-revert_register_mode_search.patch
+ create mode 100644 toolchain/gcc/patches-5.x/002-case_insensitive.patch
+ create mode 100644 toolchain/gcc/patches-5.x/003-build_fix.patch
+ create mode 100644 toolchain/gcc/patches-5.x/010-documentation.patch
+ create mode 100644 toolchain/gcc/patches-5.x/020-no-plt-backport.patch
+ create mode 100644 toolchain/gcc/patches-5.x/040-fix-mips-ICE-PR-68400.patch
+ create mode 100644 toolchain/gcc/patches-5.x/050-libitm-Don-t-redefine-__always_inline-in-local_atomi.patch
+ create mode 100644 toolchain/gcc/patches-5.x/200-musl_config.patch
+ create mode 100644 toolchain/gcc/patches-5.x/201-musl_arm.patch
+ create mode 100644 toolchain/gcc/patches-5.x/202-musl_mips.patch
+ create mode 100644 toolchain/gcc/patches-5.x/203-musl_powerpc.patch
+ create mode 100644 toolchain/gcc/patches-5.x/204-musl_sh.patch
+ create mode 100644 toolchain/gcc/patches-5.x/205-musl_x86.patch
+ create mode 100644 toolchain/gcc/patches-5.x/206-musl_aarch64.patch
+ create mode 100644 toolchain/gcc/patches-5.x/207-musl_fixincludes.patch
+ create mode 100644 toolchain/gcc/patches-5.x/209-musl_libstdc++.patch
+ create mode 100644 toolchain/gcc/patches-5.x/230-musl_libssp.patch
+ create mode 100644 toolchain/gcc/patches-5.x/240-musl-libitm-fixes.patch
+ create mode 100644 toolchain/gcc/patches-5.x/250-add-musl.patch
+ create mode 100644 toolchain/gcc/patches-5.x/260-musl-add-unwind-fix.patch
+ create mode 100644 toolchain/gcc/patches-5.x/270-musl-add-powerpc-softfloat-fix.patch
+ create mode 100644 toolchain/gcc/patches-5.x/280-musl-disable-ifunc-by-default.patch
+ create mode 100644 toolchain/gcc/patches-5.x/300-mips_Os_cpu_rtx_cost_model.patch
+ create mode 100644 toolchain/gcc/patches-5.x/800-arm_v5te_no_ldrd_strd.patch
+ create mode 100644 toolchain/gcc/patches-5.x/810-arm-softfloat-libgcc.patch
+ create mode 100644 toolchain/gcc/patches-5.x/820-libgcc_pic.patch
+ create mode 100644 toolchain/gcc/patches-5.x/830-arm_unbreak_armv4t.patch
+ create mode 100644 toolchain/gcc/patches-5.x/840-armv4_pass_fix-v4bx_to_ld.patch
+ create mode 100644 toolchain/gcc/patches-5.x/850-use_shared_libgcc.patch
+ create mode 100644 toolchain/gcc/patches-5.x/851-libgcc_no_compat.patch
+ create mode 100644 toolchain/gcc/patches-5.x/870-ppc_no_crtsavres.patch
+ create mode 100644 toolchain/gcc/patches-5.x/880-no_java_section.patch
+ create mode 100644 toolchain/gcc/patches-5.x/881-no_tm_section.patch
+ create mode 100644 toolchain/gcc/patches-5.x/900-bad-mips16-crt.patch
+ create mode 100644 toolchain/gcc/patches-5.x/910-mbsd_multi.patch
+ create mode 100644 toolchain/gcc/patches-5.x/920-specs_nonfatal_getenv.patch
+ create mode 100644 toolchain/gcc/patches-5.x/930-fix-mips-noexecstack.patch
+ create mode 100644 toolchain/gcc/patches-5.x/931-fix-MIPS-softfloat-build-issue.patch
+ create mode 100644 toolchain/gcc/patches-5.x/940-no-clobber-stamp-bits.patch
+ create mode 100644 toolchain/gcc/patches-5.x/950-cpp_file_path_translation.patch
+ create mode 100644 toolchain/gcc/patches-5.x/960-go_libm.patch
+ create mode 100644 toolchain/gcc/patches-5.x/970-warn_bug.patch
 
 diff --git a/toolchain/gcc/Config.in b/toolchain/gcc/Config.in
-index f0fc31d567..1aadae6839 100644
+index 9156f9c263..0e017bb0ad 100644
 --- a/toolchain/gcc/Config.in
 +++ b/toolchain/gcc/Config.in
-@@ -6,6 +6,10 @@ choice
+@@ -3,17 +3,25 @@
+ choice
+ 	prompt "GCC compiler Version" if TOOLCHAINOPTS
+ 	default GCC_USE_VERSION_12
++	default GCC_USE_VERSION_5 if LINUX_4_4
  	help
  	  Select the version of gcc you wish to use.
  
@@ -104,49 +110,54 @@ index f0fc31d567..1aadae6839 100644
 +		bool "gcc 5.x"
 +		depends on !arc
 +
- 	config GCC_USE_VERSION_7
- 		bool "gcc 7.x"
- 		depends on !arc
-@@ -34,6 +38,7 @@ config EXTRA_GCC_CONFIG_OPTIONS
+ 	config GCC_USE_VERSION_11
+ 		bool "gcc 11.x"
++		depends on !LINUX_4_4
+ 
+ 	config GCC_USE_VERSION_12
+ 		bool "gcc 12.x"
++		depends on !LINUX_4_4
+ 
+ 	config GCC_USE_VERSION_13
+ 		bool "gcc 13.x"
++		depends on !LINUX_4_4
+ endchoice
+ 
+ config GCC_USE_GRAPHITE
+@@ -30,6 +38,7 @@ config EXTRA_GCC_CONFIG_OPTIONS
  config GCC_DEFAULT_PIE
  	bool
  	prompt "Build executable with PIE enabled by default" if TOOLCHAINOPTS
 +	depends on !GCC_USE_VERSION_5
- 	default n
  	help
  	    Use gcc configure option --enable-default-pie to turn on -fPIE and -pie by default.
+ 
 diff --git a/toolchain/gcc/Config.version b/toolchain/gcc/Config.version
-index 967ce9e489..09deae3bf1 100644
+index 7126a0c883..e29c5b9aa8 100644
 --- a/toolchain/gcc/Config.version
 +++ b/toolchain/gcc/Config.version
-@@ -1,3 +1,7 @@
+@@ -1,3 +1,8 @@
 +config GCC_VERSION_5
 +	default y if GCC_USE_VERSION_5
++	default y if LINUX_4_4
 +	bool
 +
- config GCC_VERSION_7
- 	default y if GCC_USE_VERSION_7
+ config GCC_VERSION_11
+ 	default y if GCC_USE_VERSION_11
  	bool
-@@ -12,6 +16,7 @@ config GCC_VERSION_10
+@@ -8,6 +13,7 @@ config GCC_VERSION_13
  
  config GCC_VERSION
  	string
 +	default "5.5.0"		if GCC_VERSION_5
- 	default "7.5.0"		if GCC_VERSION_7
- 	default "9.3.0"		if GCC_VERSION_9
- 	default "10.2.0"	if GCC_VERSION_10
-@@ -19,5 +24,5 @@ config GCC_VERSION
- 
- config GCC_USE_IREMAP
- 	bool
--	default y if GCC_USE_VERSION_7
-+	default y if ( GCC_USE_VERSION_5 || GCC_USE_VERSION_7 )
- 	default n
+ 	default "11.3.0"	if GCC_VERSION_11
+ 	default "13.1.0"	if GCC_VERSION_13
+ 	default "12.3.0"
 diff --git a/toolchain/gcc/common.mk b/toolchain/gcc/common.mk
-index 55fad1fcc4..d9372f9961 100644
+index 677fb25381..00c908dd60 100644
 --- a/toolchain/gcc/common.mk
 +++ b/toolchain/gcc/common.mk
-@@ -28,6 +28,10 @@ GCC_DIR:=$(PKG_NAME)-$(PKG_VERSION)
+@@ -29,6 +29,10 @@ GCC_DIR:=$(PKG_NAME)-$(PKG_VERSION)
  PKG_SOURCE_URL:=@GNU/gcc/gcc-$(PKG_VERSION)
  PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
  
@@ -154,14 +165,14 @@ index 55fad1fcc4..d9372f9961 100644
 +  PKG_HASH:=530cea139d82fe542b358961130c69cfde8b3d14556370b65823d2f91f0ced87
 +endif
 +
- ifeq ($(PKG_VERSION),7.5.0)
-   PKG_HASH:=b81946e7f01f90528a1f7352ab08cc602b9ccc05d4e44da4bd501c5a189ee661
+ ifeq ($(PKG_VERSION),11.3.0)
+   PKG_HASH:=b47cf2818691f5b1e21df2bb38c795fac2cfbd640ede2d0a5e1c89e338a3ac39
  endif
-diff --git a/toolchain/gcc/patches/5.5.0/001-revert_register_mode_search.patch b/toolchain/gcc/patches/5.5.0/001-revert_register_mode_search.patch
+diff --git a/toolchain/gcc/patches-5.x/001-revert_register_mode_search.patch b/toolchain/gcc/patches-5.x/001-revert_register_mode_search.patch
 new file mode 100644
 index 0000000000..06373eb6a0
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/001-revert_register_mode_search.patch
++++ b/toolchain/gcc/patches-5.x/001-revert_register_mode_search.patch
 @@ -0,0 +1,65 @@
 +Revert of:
 +
@@ -228,11 +239,11 @@ index 0000000000..06373eb6a0
 +       found_mode = mode;
 + 
 +   if (found_mode != VOIDmode)
-diff --git a/toolchain/gcc/patches/5.5.0/002-case_insensitive.patch b/toolchain/gcc/patches/5.5.0/002-case_insensitive.patch
+diff --git a/toolchain/gcc/patches-5.x/002-case_insensitive.patch b/toolchain/gcc/patches-5.x/002-case_insensitive.patch
 new file mode 100644
 index 0000000000..b3d2dbe291
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/002-case_insensitive.patch
++++ b/toolchain/gcc/patches-5.x/002-case_insensitive.patch
 @@ -0,0 +1,14 @@
 +--- a/include/filenames.h
 ++++ b/include/filenames.h
@@ -248,11 +259,28 @@ index 0000000000..b3d2dbe291
 + #  define HAS_DRIVE_SPEC(f) (0)
 + #  define IS_DIR_SEPARATOR(c) IS_UNIX_DIR_SEPARATOR (c)
 + #  define IS_ABSOLUTE_PATH(f) IS_UNIX_ABSOLUTE_PATH (f)
-diff --git a/toolchain/gcc/patches/5.5.0/010-documentation.patch b/toolchain/gcc/patches/5.5.0/010-documentation.patch
+diff --git a/toolchain/gcc/patches-5.x/003-build_fix.patch b/toolchain/gcc/patches-5.x/003-build_fix.patch
+new file mode 100644
+index 0000000000..9602cd3b1c
+--- /dev/null
++++ b/toolchain/gcc/patches-5.x/003-build_fix.patch
+@@ -0,0 +1,11 @@
++--- a/gcc/reload.h
+++++ b/gcc/reload.h
++@@ -168,7 +168,7 @@ struct target_reload {
++      value indicates the level of indirect addressing supported, e.g., two
++      means that (MEM (MEM (REG n))) is also valid if (REG n) does not get
++      a hard register.  */
++-  bool x_spill_indirect_levels;
+++  unsigned char x_spill_indirect_levels;
++ 
++   /* True if caller-save has been reinitialized.  */
++   bool x_caller_save_initialized_p;
+diff --git a/toolchain/gcc/patches-5.x/010-documentation.patch b/toolchain/gcc/patches-5.x/010-documentation.patch
 new file mode 100644
 index 0000000000..d7166b24e7
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/010-documentation.patch
++++ b/toolchain/gcc/patches-5.x/010-documentation.patch
 @@ -0,0 +1,23 @@
 +--- a/gcc/Makefile.in
 ++++ b/gcc/Makefile.in
@@ -277,11 +305,11 @@ index 0000000000..d7166b24e7
 + 
 + doc/cpp.dvi: $(TEXI_CPP_FILES)
 + doc/gcc.dvi: $(TEXI_GCC_FILES)
-diff --git a/toolchain/gcc/patches/5.5.0/020-no-plt-backport.patch b/toolchain/gcc/patches/5.5.0/020-no-plt-backport.patch
+diff --git a/toolchain/gcc/patches-5.x/020-no-plt-backport.patch b/toolchain/gcc/patches-5.x/020-no-plt-backport.patch
 new file mode 100644
 index 0000000000..b9702c9520
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/020-no-plt-backport.patch
++++ b/toolchain/gcc/patches-5.x/020-no-plt-backport.patch
 @@ -0,0 +1,28 @@
 +--- a/gcc/calls.c
 ++++ b/gcc/calls.c
@@ -311,11 +339,11 @@ index 0000000000..b9702c9520
 + fplugin=
 + Common Joined RejectNegative Var(common_deferred_options) Defer
 + Specify a plugin to load
-diff --git a/toolchain/gcc/patches/5.5.0/040-fix-mips-ICE-PR-68400.patch b/toolchain/gcc/patches/5.5.0/040-fix-mips-ICE-PR-68400.patch
+diff --git a/toolchain/gcc/patches-5.x/040-fix-mips-ICE-PR-68400.patch b/toolchain/gcc/patches-5.x/040-fix-mips-ICE-PR-68400.patch
 new file mode 100644
 index 0000000000..e88af34032
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/040-fix-mips-ICE-PR-68400.patch
++++ b/toolchain/gcc/patches-5.x/040-fix-mips-ICE-PR-68400.patch
 @@ -0,0 +1,23 @@
 +--- a/gcc/config/mips/mips.c
 ++++ b/gcc/config/mips/mips.c
@@ -340,11 +368,11 @@ index 0000000000..e88af34032
 + }
 + 
 + /* The canonical form of a mask-low-and-shift-left operation is
-diff --git a/toolchain/gcc/patches/5.5.0/050-libitm-Don-t-redefine-__always_inline-in-local_atomi.patch b/toolchain/gcc/patches/5.5.0/050-libitm-Don-t-redefine-__always_inline-in-local_atomi.patch
+diff --git a/toolchain/gcc/patches-5.x/050-libitm-Don-t-redefine-__always_inline-in-local_atomi.patch b/toolchain/gcc/patches-5.x/050-libitm-Don-t-redefine-__always_inline-in-local_atomi.patch
 new file mode 100644
 index 0000000000..5ec93f5247
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/050-libitm-Don-t-redefine-__always_inline-in-local_atomi.patch
++++ b/toolchain/gcc/patches-5.x/050-libitm-Don-t-redefine-__always_inline-in-local_atomi.patch
 @@ -0,0 +1,1092 @@
 +From 55f12fce4ccf77513644a247f9c401a5b1fa2402 Mon Sep 17 00:00:00 2001
 +From: torvald <torvald@138bc75d-0d04-0410-961f-82ee72b054a4>
@@ -1438,11 +1466,11 @@ index 0000000000..5ec93f5247
 +-- 
 +2.19.2
 +
-diff --git a/toolchain/gcc/patches/5.5.0/200-musl_config.patch b/toolchain/gcc/patches/5.5.0/200-musl_config.patch
+diff --git a/toolchain/gcc/patches-5.x/200-musl_config.patch b/toolchain/gcc/patches-5.x/200-musl_config.patch
 new file mode 100644
 index 0000000000..178c25ce34
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/200-musl_config.patch
++++ b/toolchain/gcc/patches-5.x/200-musl_config.patch
 @@ -0,0 +1,309 @@
 +From: ktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
 +Date: Fri, 8 May 2015 08:25:47 +0000 (+0000)
@@ -1753,11 +1781,11 @@ index 0000000000..178c25ce34
 + @item -mbionic
 + @opindex mbionic
 + Use Bionic C library.  This is the default on
-diff --git a/toolchain/gcc/patches/5.5.0/201-musl_arm.patch b/toolchain/gcc/patches/5.5.0/201-musl_arm.patch
+diff --git a/toolchain/gcc/patches-5.x/201-musl_arm.patch b/toolchain/gcc/patches-5.x/201-musl_arm.patch
 new file mode 100644
 index 0000000000..27a26afc05
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/201-musl_arm.patch
++++ b/toolchain/gcc/patches-5.x/201-musl_arm.patch
 @@ -0,0 +1,43 @@
 +From: ktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
 +Date: Wed, 27 May 2015 13:17:11 +0000 (+0000)
@@ -1802,11 +1830,11 @@ index 0000000000..27a26afc05
 + /* At this point, bpabi.h will have clobbered LINK_SPEC.  We want to
 +    use the GNU/Linux version, not the generic BPABI version.  */
 + #undef  LINK_SPEC
-diff --git a/toolchain/gcc/patches/5.5.0/202-musl_mips.patch b/toolchain/gcc/patches/5.5.0/202-musl_mips.patch
+diff --git a/toolchain/gcc/patches-5.x/202-musl_mips.patch b/toolchain/gcc/patches-5.x/202-musl_mips.patch
 new file mode 100644
 index 0000000000..816dd8d101
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/202-musl_mips.patch
++++ b/toolchain/gcc/patches-5.x/202-musl_mips.patch
 @@ -0,0 +1,35 @@
 +From: ktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
 +Date: Fri, 8 May 2015 15:16:50 +0000 (+0000)
@@ -1843,11 +1871,11 @@ index 0000000000..816dd8d101
 +   CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKERN32, UCLIBC_DYNAMIC_LINKERN32, \
 +-                         BIONIC_DYNAMIC_LINKERN32)
 ++                         BIONIC_DYNAMIC_LINKERN32, MUSL_DYNAMIC_LINKERN32)
-diff --git a/toolchain/gcc/patches/5.5.0/203-musl_powerpc.patch b/toolchain/gcc/patches/5.5.0/203-musl_powerpc.patch
+diff --git a/toolchain/gcc/patches-5.x/203-musl_powerpc.patch b/toolchain/gcc/patches-5.x/203-musl_powerpc.patch
 new file mode 100644
 index 0000000000..073c834ce1
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/203-musl_powerpc.patch
++++ b/toolchain/gcc/patches-5.x/203-musl_powerpc.patch
 @@ -0,0 +1,209 @@
 +
 +gcc/Changelog:
@@ -2058,11 +2086,11 @@ index 0000000000..073c834ce1
 + 	if test x${enable_secureplt} = xyes; then
 + 		tm_file="rs6000/secureplt.h ${tm_file}"
 + 	fi
-diff --git a/toolchain/gcc/patches/5.5.0/204-musl_sh.patch b/toolchain/gcc/patches/5.5.0/204-musl_sh.patch
+diff --git a/toolchain/gcc/patches-5.x/204-musl_sh.patch b/toolchain/gcc/patches-5.x/204-musl_sh.patch
 new file mode 100644
 index 0000000000..8c3753d530
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/204-musl_sh.patch
++++ b/toolchain/gcc/patches-5.x/204-musl_sh.patch
 @@ -0,0 +1,39 @@
 +gcc/Changelog:
 +
@@ -2103,11 +2131,11 @@ index 0000000000..8c3753d530
 + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
 + 
 + #undef SUBTARGET_LINK_EMUL_SUFFIX
-diff --git a/toolchain/gcc/patches/5.5.0/205-musl_x86.patch b/toolchain/gcc/patches/5.5.0/205-musl_x86.patch
+diff --git a/toolchain/gcc/patches-5.x/205-musl_x86.patch b/toolchain/gcc/patches-5.x/205-musl_x86.patch
 new file mode 100644
 index 0000000000..8772328d64
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/205-musl_x86.patch
++++ b/toolchain/gcc/patches-5.x/205-musl_x86.patch
 @@ -0,0 +1,41 @@
 +From: ktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
 +Date: Fri, 15 May 2015 13:20:01 +0000 (+0000)
@@ -2150,11 +2178,11 @@ index 0000000000..8772328d64
 ++#define MUSL_DYNAMIC_LINKER64 "/lib/ld-musl-x86_64.so.1"
 ++#undef MUSL_DYNAMIC_LINKERX32
 ++#define MUSL_DYNAMIC_LINKERX32 "/lib/ld-musl-x32.so.1"
-diff --git a/toolchain/gcc/patches/5.5.0/206-musl_aarch64.patch b/toolchain/gcc/patches/5.5.0/206-musl_aarch64.patch
+diff --git a/toolchain/gcc/patches-5.x/206-musl_aarch64.patch b/toolchain/gcc/patches-5.x/206-musl_aarch64.patch
 new file mode 100644
 index 0000000000..6925a026e7
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/206-musl_aarch64.patch
++++ b/toolchain/gcc/patches-5.x/206-musl_aarch64.patch
 @@ -0,0 +1,31 @@
 +From: jgreenhalgh <jgreenhalgh@138bc75d-0d04-0410-961f-82ee72b054a4>
 +Date: Wed, 27 May 2015 16:46:39 +0000 (+0000)
@@ -2187,11 +2215,11 @@ index 0000000000..6925a026e7
 + #undef  ASAN_CC1_SPEC
 + #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
 + 
-diff --git a/toolchain/gcc/patches/5.5.0/207-musl_fixincludes.patch b/toolchain/gcc/patches/5.5.0/207-musl_fixincludes.patch
+diff --git a/toolchain/gcc/patches-5.x/207-musl_fixincludes.patch b/toolchain/gcc/patches-5.x/207-musl_fixincludes.patch
 new file mode 100644
 index 0000000000..0ff33d39d8
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/207-musl_fixincludes.patch
++++ b/toolchain/gcc/patches-5.x/207-musl_fixincludes.patch
 @@ -0,0 +1,30 @@
 +From: ktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
 +Date: Wed, 22 Apr 2015 14:18:16 +0000 (+0000)
@@ -2223,11 +2251,11 @@ index 0000000000..0ff33d39d8
 + 	#  IF there is no include fixing,
 + 	#  THEN create a no-op fixer and exit
 + 	(echo "#! /bin/sh" ; echo "exit 0" ) > ${target}
-diff --git a/toolchain/gcc/patches/5.5.0/209-musl_libstdc++.patch b/toolchain/gcc/patches/5.5.0/209-musl_libstdc++.patch
+diff --git a/toolchain/gcc/patches-5.x/209-musl_libstdc++.patch b/toolchain/gcc/patches-5.x/209-musl_libstdc++.patch
 new file mode 100644
 index 0000000000..d2414d0232
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/209-musl_libstdc++.patch
++++ b/toolchain/gcc/patches-5.x/209-musl_libstdc++.patch
 @@ -0,0 +1,72 @@
 +From: ktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
 +Date: Wed, 22 Apr 2015 14:24:11 +0000 (+0000)
@@ -2301,11 +2329,11 @@ index 0000000000..d2414d0232
 +   gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu)
 +     if [ "$uclibc" = "yes" ]; then
 +       os_include_dir="os/uclibc"
-diff --git a/toolchain/gcc/patches/5.5.0/230-musl_libssp.patch b/toolchain/gcc/patches/5.5.0/230-musl_libssp.patch
+diff --git a/toolchain/gcc/patches-5.x/230-musl_libssp.patch b/toolchain/gcc/patches-5.x/230-musl_libssp.patch
 new file mode 100644
 index 0000000000..30f42e9f7c
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/230-musl_libssp.patch
++++ b/toolchain/gcc/patches-5.x/230-musl_libssp.patch
 @@ -0,0 +1,13 @@
 +--- a/gcc/gcc.c
 ++++ b/gcc/gcc.c
@@ -2320,11 +2348,11 @@ index 0000000000..30f42e9f7c
 + #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \
 + 		       "|fstack-protector-strong|fstack-protector-explicit:}"
 + #else
-diff --git a/toolchain/gcc/patches/5.5.0/240-musl-libitm-fixes.patch b/toolchain/gcc/patches/5.5.0/240-musl-libitm-fixes.patch
+diff --git a/toolchain/gcc/patches-5.x/240-musl-libitm-fixes.patch b/toolchain/gcc/patches-5.x/240-musl-libitm-fixes.patch
 new file mode 100644
 index 0000000000..533cb68499
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/240-musl-libitm-fixes.patch
++++ b/toolchain/gcc/patches-5.x/240-musl-libitm-fixes.patch
 @@ -0,0 +1,61 @@
 +From: ktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
 +Date: Wed, 22 Apr 2015 14:11:25 +0000 (+0000)
@@ -2387,11 +2415,11 @@ index 0000000000..533cb68499
 ++#endif
 + 
 + #endif // LIBITM_X86_TLS_H
-diff --git a/toolchain/gcc/patches/5.5.0/250-add-musl.patch b/toolchain/gcc/patches/5.5.0/250-add-musl.patch
+diff --git a/toolchain/gcc/patches-5.x/250-add-musl.patch b/toolchain/gcc/patches-5.x/250-add-musl.patch
 new file mode 100644
 index 0000000000..8cbeddea33
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/250-add-musl.patch
++++ b/toolchain/gcc/patches-5.x/250-add-musl.patch
 @@ -0,0 +1,120 @@
 +From: ktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
 +Date: Fri, 8 May 2015 08:30:40 +0000 (+0000)
@@ -2513,11 +2541,11 @@ index 0000000000..8cbeddea33
 + #endif
 + 
 + /* Determine what functions are present at the runtime;
-diff --git a/toolchain/gcc/patches/5.5.0/260-musl-add-unwind-fix.patch b/toolchain/gcc/patches/5.5.0/260-musl-add-unwind-fix.patch
+diff --git a/toolchain/gcc/patches-5.x/260-musl-add-unwind-fix.patch b/toolchain/gcc/patches-5.x/260-musl-add-unwind-fix.patch
 new file mode 100644
 index 0000000000..a3b83e2074
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/260-musl-add-unwind-fix.patch
++++ b/toolchain/gcc/patches-5.x/260-musl-add-unwind-fix.patch
 @@ -0,0 +1,34 @@
 +From: ktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
 +Date: Wed, 22 Apr 2015 14:20:01 +0000 (+0000)
@@ -2553,11 +2581,11 @@ index 0000000000..a3b83e2074
 +     && (defined(__DragonFly__) || defined(__FreeBSD__))
 + # define ElfW __ElfN
 + # define USE_PT_GNU_EH_FRAME
-diff --git a/toolchain/gcc/patches/5.5.0/270-musl-add-powerpc-softfloat-fix.patch b/toolchain/gcc/patches/5.5.0/270-musl-add-powerpc-softfloat-fix.patch
+diff --git a/toolchain/gcc/patches-5.x/270-musl-add-powerpc-softfloat-fix.patch b/toolchain/gcc/patches-5.x/270-musl-add-powerpc-softfloat-fix.patch
 new file mode 100644
 index 0000000000..bdebf6c01f
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/270-musl-add-powerpc-softfloat-fix.patch
++++ b/toolchain/gcc/patches-5.x/270-musl-add-powerpc-softfloat-fix.patch
 @@ -0,0 +1,24 @@
 +--- a/gcc/config/rs6000/linux64.h
 ++++ b/gcc/config/rs6000/linux64.h
@@ -2583,11 +2611,11 @@ index 0000000000..bdebf6c01f
 + #if DEFAULT_LIBC == LIBC_UCLIBC
 + #define CHOOSE_DYNAMIC_LINKER(G, U, M) "%{mglibc:" G ";:%{mmusl:" M ";:" U "}}"
 + #elif DEFAULT_LIBC == LIBC_MUSL
-diff --git a/toolchain/gcc/patches/5.5.0/280-musl-disable-ifunc-by-default.patch b/toolchain/gcc/patches/5.5.0/280-musl-disable-ifunc-by-default.patch
+diff --git a/toolchain/gcc/patches-5.x/280-musl-disable-ifunc-by-default.patch b/toolchain/gcc/patches-5.x/280-musl-disable-ifunc-by-default.patch
 new file mode 100644
 index 0000000000..9a043eed3c
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/280-musl-disable-ifunc-by-default.patch
++++ b/toolchain/gcc/patches-5.x/280-musl-disable-ifunc-by-default.patch
 @@ -0,0 +1,36 @@
 +From 450fb05e2a7510d37744f044009f8237d902f65c Mon Sep 17 00:00:00 2001
 +From: nsz <nsz@138bc75d-0d04-0410-961f-82ee72b054a4>
@@ -2625,11 +2653,11 @@ index 0000000000..9a043eed3c
 + 		  ;;
 + 		*)
 + 		  default_gnu_indirect_function=yes
-diff --git a/toolchain/gcc/patches/5.5.0/300-mips_Os_cpu_rtx_cost_model.patch b/toolchain/gcc/patches/5.5.0/300-mips_Os_cpu_rtx_cost_model.patch
+diff --git a/toolchain/gcc/patches-5.x/300-mips_Os_cpu_rtx_cost_model.patch b/toolchain/gcc/patches-5.x/300-mips_Os_cpu_rtx_cost_model.patch
 new file mode 100644
 index 0000000000..1743658ac6
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/300-mips_Os_cpu_rtx_cost_model.patch
++++ b/toolchain/gcc/patches-5.x/300-mips_Os_cpu_rtx_cost_model.patch
 @@ -0,0 +1,14 @@
 +Use the proper rtx cost model for the selected CPU, even when optimizing
 +for size. This generates better code.
@@ -2645,11 +2673,11 @@ index 0000000000..1743658ac6
 +     mips_cost = &mips_rtx_cost_optimize_size;
 +   else
 +     mips_cost = &mips_rtx_cost_data[mips_tune];
-diff --git a/toolchain/gcc/patches/5.5.0/800-arm_v5te_no_ldrd_strd.patch b/toolchain/gcc/patches/5.5.0/800-arm_v5te_no_ldrd_strd.patch
+diff --git a/toolchain/gcc/patches-5.x/800-arm_v5te_no_ldrd_strd.patch b/toolchain/gcc/patches-5.x/800-arm_v5te_no_ldrd_strd.patch
 new file mode 100644
 index 0000000000..0edeb13c75
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/800-arm_v5te_no_ldrd_strd.patch
++++ b/toolchain/gcc/patches-5.x/800-arm_v5te_no_ldrd_strd.patch
 @@ -0,0 +1,11 @@
 +--- a/gcc/config/arm/arm.h
 ++++ b/gcc/config/arm/arm.h
@@ -2662,11 +2690,11 @@ index 0000000000..0edeb13c75
 +                                          && !TARGET_THUMB1)
 + 
 + #define TARGET_CRC32			(arm_arch_crc)
-diff --git a/toolchain/gcc/patches/5.5.0/810-arm-softfloat-libgcc.patch b/toolchain/gcc/patches/5.5.0/810-arm-softfloat-libgcc.patch
+diff --git a/toolchain/gcc/patches-5.x/810-arm-softfloat-libgcc.patch b/toolchain/gcc/patches-5.x/810-arm-softfloat-libgcc.patch
 new file mode 100644
 index 0000000000..1d06f5b2ec
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/810-arm-softfloat-libgcc.patch
++++ b/toolchain/gcc/patches-5.x/810-arm-softfloat-libgcc.patch
 @@ -0,0 +1,25 @@
 +--- a/libgcc/config/arm/t-linux
 ++++ b/libgcc/config/arm/t-linux
@@ -2693,11 +2721,11 @@ index 0000000000..1d06f5b2ec
 + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
 + 
 + #define LINUX_TARGET_LINK_SPEC  "%{h*} \
-diff --git a/toolchain/gcc/patches/5.5.0/820-libgcc_pic.patch b/toolchain/gcc/patches/5.5.0/820-libgcc_pic.patch
+diff --git a/toolchain/gcc/patches-5.x/820-libgcc_pic.patch b/toolchain/gcc/patches-5.x/820-libgcc_pic.patch
 new file mode 100644
 index 0000000000..42bf0c8ccc
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/820-libgcc_pic.patch
++++ b/toolchain/gcc/patches-5.x/820-libgcc_pic.patch
 @@ -0,0 +1,36 @@
 +--- a/libgcc/Makefile.in
 ++++ b/libgcc/Makefile.in
@@ -2735,11 +2763,11 @@ index 0000000000..42bf0c8ccc
 + 	$(subst @multilib_dir@,$(MULTIDIR),$(subst \
 + 		@shlib_base_name@,libgcc_s,$(subst \
 + 		@shlib_slibdir_qual@,$(MULTIOSSUBDIR),$(SHLIB_INSTALL))))
-diff --git a/toolchain/gcc/patches/5.5.0/830-arm_unbreak_armv4t.patch b/toolchain/gcc/patches/5.5.0/830-arm_unbreak_armv4t.patch
+diff --git a/toolchain/gcc/patches-5.x/830-arm_unbreak_armv4t.patch b/toolchain/gcc/patches-5.x/830-arm_unbreak_armv4t.patch
 new file mode 100644
 index 0000000000..37f8f2a54d
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/830-arm_unbreak_armv4t.patch
++++ b/toolchain/gcc/patches-5.x/830-arm_unbreak_armv4t.patch
 @@ -0,0 +1,13 @@
 +http://sourceware.org/ml/crossgcc/2008-05/msg00009.html
 +
@@ -2754,11 +2782,11 @@ index 0000000000..37f8f2a54d
 + 
 + /* TARGET_BIG_ENDIAN_DEFAULT is set in
 +    config.gcc for big endian configurations.  */
-diff --git a/toolchain/gcc/patches/5.5.0/840-armv4_pass_fix-v4bx_to_ld.patch b/toolchain/gcc/patches/5.5.0/840-armv4_pass_fix-v4bx_to_ld.patch
+diff --git a/toolchain/gcc/patches-5.x/840-armv4_pass_fix-v4bx_to_ld.patch b/toolchain/gcc/patches-5.x/840-armv4_pass_fix-v4bx_to_ld.patch
 new file mode 100644
 index 0000000000..cb1fb98235
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/840-armv4_pass_fix-v4bx_to_ld.patch
++++ b/toolchain/gcc/patches-5.x/840-armv4_pass_fix-v4bx_to_ld.patch
 @@ -0,0 +1,19 @@
 +--- a/gcc/config/arm/linux-eabi.h
 ++++ b/gcc/config/arm/linux-eabi.h
@@ -2779,11 +2807,11 @@ index 0000000000..cb1fb98235
 +   LINUX_OR_ANDROID_LD (LINUX_TARGET_LINK_SPEC,				\
 + 		       LINUX_TARGET_LINK_SPEC " " ANDROID_LINK_SPEC)
 + 
-diff --git a/toolchain/gcc/patches/5.5.0/850-use_shared_libgcc.patch b/toolchain/gcc/patches/5.5.0/850-use_shared_libgcc.patch
+diff --git a/toolchain/gcc/patches-5.x/850-use_shared_libgcc.patch b/toolchain/gcc/patches-5.x/850-use_shared_libgcc.patch
 new file mode 100644
 index 0000000000..5818cf4da0
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/850-use_shared_libgcc.patch
++++ b/toolchain/gcc/patches-5.x/850-use_shared_libgcc.patch
 @@ -0,0 +1,47 @@
 +--- a/gcc/config/arm/linux-eabi.h
 ++++ b/gcc/config/arm/linux-eabi.h
@@ -2832,11 +2860,11 @@ index 0000000000..5818cf4da0
 + #undef  LINK_SHLIB_SPEC
 + #define LINK_SHLIB_SPEC "%{shared:-shared} %{!shared: %{static:-static}}"
 + 
-diff --git a/toolchain/gcc/patches/5.5.0/851-libgcc_no_compat.patch b/toolchain/gcc/patches/5.5.0/851-libgcc_no_compat.patch
+diff --git a/toolchain/gcc/patches-5.x/851-libgcc_no_compat.patch b/toolchain/gcc/patches-5.x/851-libgcc_no_compat.patch
 new file mode 100644
 index 0000000000..80c3476841
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/851-libgcc_no_compat.patch
++++ b/toolchain/gcc/patches-5.x/851-libgcc_no_compat.patch
 @@ -0,0 +1,12 @@
 +--- a/libgcc/config/t-libunwind
 ++++ b/libgcc/config/t-libunwind
@@ -2850,11 +2878,11 @@ index 0000000000..80c3476841
 + LIB2ADDEHSTATIC = $(srcdir)/unwind-sjlj.c $(srcdir)/unwind-c.c
 + 
 + # Override the default value from t-slibgcc-elf-ver and mention -lunwind
-diff --git a/toolchain/gcc/patches/5.5.0/870-ppc_no_crtsavres.patch b/toolchain/gcc/patches/5.5.0/870-ppc_no_crtsavres.patch
+diff --git a/toolchain/gcc/patches-5.x/870-ppc_no_crtsavres.patch b/toolchain/gcc/patches-5.x/870-ppc_no_crtsavres.patch
 new file mode 100644
 index 0000000000..d06673efc2
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/870-ppc_no_crtsavres.patch
++++ b/toolchain/gcc/patches-5.x/870-ppc_no_crtsavres.patch
 @@ -0,0 +1,11 @@
 +--- a/gcc/config/rs6000/rs6000.c
 ++++ b/gcc/config/rs6000/rs6000.c
@@ -2867,11 +2895,11 @@ index 0000000000..d06673efc2
 + 	{
 + 	  strategy |= SAVE_INLINE_FPRS | REST_INLINE_FPRS;
 + 	  strategy |= SAVE_INLINE_GPRS | REST_INLINE_GPRS;
-diff --git a/toolchain/gcc/patches/5.5.0/880-no_java_section.patch b/toolchain/gcc/patches/5.5.0/880-no_java_section.patch
+diff --git a/toolchain/gcc/patches-5.x/880-no_java_section.patch b/toolchain/gcc/patches-5.x/880-no_java_section.patch
 new file mode 100644
 index 0000000000..def6c9f4a0
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/880-no_java_section.patch
++++ b/toolchain/gcc/patches-5.x/880-no_java_section.patch
 @@ -0,0 +1,11 @@
 +--- a/gcc/defaults.h
 ++++ b/gcc/defaults.h
@@ -2884,11 +2912,11 @@ index 0000000000..def6c9f4a0
 + #ifndef JCR_SECTION_NAME
 + #define JCR_SECTION_NAME ".jcr"
 + #endif
-diff --git a/toolchain/gcc/patches/5.5.0/881-no_tm_section.patch b/toolchain/gcc/patches/5.5.0/881-no_tm_section.patch
+diff --git a/toolchain/gcc/patches-5.x/881-no_tm_section.patch b/toolchain/gcc/patches-5.x/881-no_tm_section.patch
 new file mode 100644
 index 0000000000..fab5db3be5
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/881-no_tm_section.patch
++++ b/toolchain/gcc/patches-5.x/881-no_tm_section.patch
 @@ -0,0 +1,11 @@
 +--- a/libgcc/crtstuff.c
 ++++ b/libgcc/crtstuff.c
@@ -2901,11 +2929,11 @@ index 0000000000..fab5db3be5
 + #endif
 + 
 + /* We do not want to add the weak attribute to the declarations of these
-diff --git a/toolchain/gcc/patches/5.5.0/900-bad-mips16-crt.patch b/toolchain/gcc/patches/5.5.0/900-bad-mips16-crt.patch
+diff --git a/toolchain/gcc/patches-5.x/900-bad-mips16-crt.patch b/toolchain/gcc/patches-5.x/900-bad-mips16-crt.patch
 new file mode 100644
 index 0000000000..dd6e9dc889
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/900-bad-mips16-crt.patch
++++ b/toolchain/gcc/patches-5.x/900-bad-mips16-crt.patch
 @@ -0,0 +1,9 @@
 +--- a/libgcc/config/mips/t-mips16
 ++++ b/libgcc/config/mips/t-mips16
@@ -2916,11 +2944,11 @@ index 0000000000..dd6e9dc889
 ++
 ++CRTSTUFF_T_CFLAGS += -mno-mips16
 ++CRTSTUFF_T_CFLAGS_S += -mno-mips16
-diff --git a/toolchain/gcc/patches/5.5.0/910-mbsd_multi.patch b/toolchain/gcc/patches/5.5.0/910-mbsd_multi.patch
+diff --git a/toolchain/gcc/patches-5.x/910-mbsd_multi.patch b/toolchain/gcc/patches-5.x/910-mbsd_multi.patch
 new file mode 100644
 index 0000000000..88905f6f2f
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/910-mbsd_multi.patch
++++ b/toolchain/gcc/patches-5.x/910-mbsd_multi.patch
 @@ -0,0 +1,222 @@
 +
 +	This patch brings over a few features from MirBSD:
@@ -3144,11 +3172,11 @@ index 0000000000..88905f6f2f
 +   err = do_spec (jvgenmain_spec);
 +   if (err == 0)
 +     {
-diff --git a/toolchain/gcc/patches/5.5.0/920-specs_nonfatal_getenv.patch b/toolchain/gcc/patches/5.5.0/920-specs_nonfatal_getenv.patch
+diff --git a/toolchain/gcc/patches-5.x/920-specs_nonfatal_getenv.patch b/toolchain/gcc/patches-5.x/920-specs_nonfatal_getenv.patch
 new file mode 100644
 index 0000000000..4c705ad86b
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/920-specs_nonfatal_getenv.patch
++++ b/toolchain/gcc/patches-5.x/920-specs_nonfatal_getenv.patch
 @@ -0,0 +1,15 @@
 +--- a/gcc/gcc.c
 ++++ b/gcc/gcc.c
@@ -3165,11 +3193,11 @@ index 0000000000..4c705ad86b
 + 
 +   /* We have to escape every character of the environment variable so
 +      they are not interpreted as active spec characters.  A
-diff --git a/toolchain/gcc/patches/5.5.0/930-fix-mips-noexecstack.patch b/toolchain/gcc/patches/5.5.0/930-fix-mips-noexecstack.patch
+diff --git a/toolchain/gcc/patches-5.x/930-fix-mips-noexecstack.patch b/toolchain/gcc/patches-5.x/930-fix-mips-noexecstack.patch
 new file mode 100644
 index 0000000000..c05844d2e4
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/930-fix-mips-noexecstack.patch
++++ b/toolchain/gcc/patches-5.x/930-fix-mips-noexecstack.patch
 @@ -0,0 +1,111 @@
 +From da45b3fde60095756f5f6030f6012c23a3d34429 Mon Sep 17 00:00:00 2001
 +From: Andrew McDonnell <bugs@andrewmcdonnell.net>
@@ -3282,11 +3310,11 @@ index 0000000000..c05844d2e4
 + 	.set	nomips16
 + 
 + #define DIV								\
-diff --git a/toolchain/gcc/patches/5.5.0/931-fix-MIPS-softfloat-build-issue.patch b/toolchain/gcc/patches/5.5.0/931-fix-MIPS-softfloat-build-issue.patch
+diff --git a/toolchain/gcc/patches-5.x/931-fix-MIPS-softfloat-build-issue.patch b/toolchain/gcc/patches-5.x/931-fix-MIPS-softfloat-build-issue.patch
 new file mode 100644
 index 0000000000..9ac0939eb0
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/931-fix-MIPS-softfloat-build-issue.patch
++++ b/toolchain/gcc/patches-5.x/931-fix-MIPS-softfloat-build-issue.patch
 @@ -0,0 +1,167 @@
 +From 2b46f9187b6f994fc450628a7cd97fc703dd23e0 Mon Sep 17 00:00:00 2001
 +From: BangLang Huang <banglang.huang@foxmail.com>
@@ -3455,11 +3483,11 @@ index 0000000000..9ac0939eb0
 + 1:	
 + 	REG_L	$3, V1_OFF2($fp)
 + 	REG_L	$2, V0_OFF2($fp)
-diff --git a/toolchain/gcc/patches/5.5.0/940-no-clobber-stamp-bits.patch b/toolchain/gcc/patches/5.5.0/940-no-clobber-stamp-bits.patch
+diff --git a/toolchain/gcc/patches-5.x/940-no-clobber-stamp-bits.patch b/toolchain/gcc/patches-5.x/940-no-clobber-stamp-bits.patch
 new file mode 100644
 index 0000000000..21463a3055
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/940-no-clobber-stamp-bits.patch
++++ b/toolchain/gcc/patches-5.x/940-no-clobber-stamp-bits.patch
 @@ -0,0 +1,11 @@
 +--- a/libstdc++-v3/include/Makefile.in
 ++++ b/libstdc++-v3/include/Makefile.in
@@ -3472,11 +3500,11 @@ index 0000000000..21463a3055
 + 	@$(STAMP) stamp-bits-sup
 + 
 + stamp-c_base: ${c_base_headers}
-diff --git a/toolchain/gcc/patches/5.5.0/950-cpp_file_path_translation.patch b/toolchain/gcc/patches/5.5.0/950-cpp_file_path_translation.patch
+diff --git a/toolchain/gcc/patches-5.x/950-cpp_file_path_translation.patch b/toolchain/gcc/patches-5.x/950-cpp_file_path_translation.patch
 new file mode 100644
 index 0000000000..b67940897e
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/950-cpp_file_path_translation.patch
++++ b/toolchain/gcc/patches-5.x/950-cpp_file_path_translation.patch
 @@ -0,0 +1,182 @@
 +Forward ported from attachment to https://gcc.gnu.org/bugzilla/show_bug.cgi?id=47047
 +
@@ -3660,11 +3688,11 @@ index 0000000000..b67940897e
 +       }
 +       break;
 + 
-diff --git a/toolchain/gcc/patches/5.5.0/960-go_libm.patch b/toolchain/gcc/patches/5.5.0/960-go_libm.patch
+diff --git a/toolchain/gcc/patches-5.x/960-go_libm.patch b/toolchain/gcc/patches-5.x/960-go_libm.patch
 new file mode 100644
 index 0000000000..d16b0200c0
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/960-go_libm.patch
++++ b/toolchain/gcc/patches-5.x/960-go_libm.patch
 @@ -0,0 +1,11 @@
 +--- a/gcc/go/Make-lang.in
 ++++ b/gcc/go/Make-lang.in
@@ -3677,11 +3705,11 @@ index 0000000000..d16b0200c0
 + 
 + # Documentation.
 + 
-diff --git a/toolchain/gcc/patches/5.5.0/970-warn_bug.patch b/toolchain/gcc/patches/5.5.0/970-warn_bug.patch
+diff --git a/toolchain/gcc/patches-5.x/970-warn_bug.patch b/toolchain/gcc/patches-5.x/970-warn_bug.patch
 new file mode 100644
 index 0000000000..2c5cf9be20
 --- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/970-warn_bug.patch
++++ b/toolchain/gcc/patches-5.x/970-warn_bug.patch
 @@ -0,0 +1,11 @@
 +--- a/libgo/runtime/mprof.goc
 ++++ b/libgo/runtime/mprof.goc
@@ -3695,5 +3723,5 @@ index 0000000000..2c5cf9be20
 + 	sp = runtime_getcallersp(&b);
 + 	pc = (byte*)(uintptr)runtime_getcallerpc(&b);
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/0037-ipq807x-add-uboot-envtools-support.patch b/patches/0037-ipq807x-add-uboot-envtools-support.patch
new file mode 100644
index 000000000..49a4be22e
--- /dev/null
+++ b/patches/0037-ipq807x-add-uboot-envtools-support.patch
@@ -0,0 +1,257 @@
+From 9cfa8a26ef07293733d2d606d6e7b0912aba4ec5 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Sat, 15 Jul 2023 16:10:26 +0200
+Subject: [PATCH 37/43] ipq807x: add uboot-envtools support
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ package/base-files/files/lib/functions.sh | 13 ++++
+ package/boot/uboot-envtools/Makefile      |  6 --
+ package/boot/uboot-envtools/files/ipq50xx | 37 +++++++++++
+ package/boot/uboot-envtools/files/ipq60xx | 53 ++++++++++++++++
+ package/boot/uboot-envtools/files/ipq807x | 76 +++++++++++------------
+ 5 files changed, 141 insertions(+), 44 deletions(-)
+ create mode 100644 package/boot/uboot-envtools/files/ipq50xx
+ create mode 100644 package/boot/uboot-envtools/files/ipq60xx
+
+diff --git a/package/base-files/files/lib/functions.sh b/package/base-files/files/lib/functions.sh
+index 4b1b838572..87e2edee7a 100644
+--- a/package/base-files/files/lib/functions.sh
++++ b/package/base-files/files/lib/functions.sh
+@@ -32,6 +32,19 @@ xor() {
+ 	printf "%0${retlen}x" "$ret"
+ }
+ 
++find_mmc_part() {
++        local DEVNAME PARTNAME
++        if grep -q "$1" /proc/mtd; then
++                echo "" && return 0
++        fi
++
++        for DEVNAME in /sys/block/mmcblk*/mmcblk*p*; do
++                PARTNAME=$(grep PARTNAME ${DEVNAME}/uevent | cut -f2 -d'=')
++                [ "$PARTNAME" = "$1" ] && echo "/dev/$(basename $DEVNAME)" && return 0
++        done
++}
++
++
+ append() {
+ 	local var="$1"
+ 	local value="$2"
+diff --git a/package/boot/uboot-envtools/Makefile b/package/boot/uboot-envtools/Makefile
+index 2e4c1ac39e..b9d8895e76 100644
+--- a/package/boot/uboot-envtools/Makefile
++++ b/package/boot/uboot-envtools/Makefile
+@@ -58,12 +58,6 @@ MAKE_FLAGS += \
+ 	no-dot-config-targets=envtools \
+ 	envtools
+ 
+-define Package/uboot-envtools/conffiles
+-/etc/config/ubootenv
+-/etc/fw_env.config
+-/etc/fw_sys.config
+-endef
+-
+ define Package/uboot-envtools/install
+ 	$(INSTALL_DIR) $(1)/usr/sbin
+ 	$(INSTALL_BIN) $(PKG_BUILD_DIR)/tools/env/fw_printenv $(1)/usr/sbin
+diff --git a/package/boot/uboot-envtools/files/ipq50xx b/package/boot/uboot-envtools/files/ipq50xx
+new file mode 100644
+index 0000000000..84ed73f288
+--- /dev/null
++++ b/package/boot/uboot-envtools/files/ipq50xx
+@@ -0,0 +1,37 @@
++[ -e /etc/config/ubootenv ] && rm /etc/config/ubootenv
++
++touch /etc/config/ubootenv
++
++. /lib/uboot-envtools.sh
++. /lib/functions.sh
++
++board=$(board_name)
++
++ubootenv_mtdinfo () {
++	UBOOTENV_PART=$(cat /proc/mtd | grep APPSBLENV)
++	mtd_dev=$(echo $UBOOTENV_PART | awk '{print $1}' | sed 's/:$//')
++	mtd_size=$(echo $UBOOTENV_PART | awk '{print "0x"$2}')
++	mtd_erase=$(echo $UBOOTENV_PART | awk '{print "0x"$3}')
++	nor_flash=$(find /sys/bus/spi/devices/*/mtd -name ${mtd_dev})
++
++	if [ -n "$nor_flash" ]; then
++		ubootenv_size=$mtd_size
++	else
++		# size is fixed to 0x40000 in u-boot
++		ubootenv_size=0x40000
++	fi
++
++	sectors=$(( $ubootenv_size / $mtd_erase ))
++	echo /dev/$mtd_dev 0x0 $ubootenv_size $mtd_erase $sectors
++}
++
++case "$board" in
++*)
++	ubootenv_add_uci_config $(ubootenv_mtdinfo)
++	;;
++esac
++
++config_load ubootenv
++config_foreach ubootenv_add_app_config ubootenv
++
++exit 0
+diff --git a/package/boot/uboot-envtools/files/ipq60xx b/package/boot/uboot-envtools/files/ipq60xx
+new file mode 100644
+index 0000000000..8863df4225
+--- /dev/null
++++ b/package/boot/uboot-envtools/files/ipq60xx
+@@ -0,0 +1,53 @@
++[ -e /etc/config/ubootenv ] && rm /etc/config/ubootenv
++
++touch /etc/config/ubootenv
++
++. /lib/uboot-envtools.sh
++. /lib/functions.sh
++
++board=$(board_name)
++
++ubootenv_mtdinfo () {
++	UBOOTENV_PART=$(cat /proc/mtd | grep APPSBLENV)
++	mtd_dev=$(echo $UBOOTENV_PART | awk '{print $1}' | sed 's/:$//')
++	mtd_size=$(echo $UBOOTENV_PART | awk '{print "0x"$2}')
++	mtd_erase=$(echo $UBOOTENV_PART | awk '{print "0x"$3}')
++	nor_flash=$(find /sys/bus/spi/devices/*/mtd -name ${mtd_dev})
++    	found_emmc=0
++    
++         if [ -z "$UBOOTENV_PART" ]; then
++                mtd_dev=$(echo $(find_mmc_part "0:APPSBLENV") | sed 's/^.\{5\}//')
++                if [ -n "$mtd_dev" ]; then
++                        EMMC_UBOOTENV_PART=$(cat /proc/partitions | grep $mtd_dev)
++                        #convert block to bytes
++                        emmc_ubootenv_size=`expr $(echo $EMMC_UBOOTENV_PART | awk '{print $3}') \* 1024`
++                        ubootenv_size=0x`printf "%x" $emmc_ubootenv_size`
++			found_emmc=1
++                fi
++                mtd_erase=""
++        
++	elif [ -n "$nor_flash" ]; then
++		ubootenv_size=$mtd_size
++	else
++		# size is fixed to 0x40000 in u-boot
++		ubootenv_size=0x40000
++	fi
++	if [ $found_emmc -eq 0 ]; then
++                sectors=$(printf '0x%x' $(( $ubootenv_size / $mtd_erase )))
++                echo /dev/$mtd_dev 0x0 $ubootenv_size $mtd_erase $sectors
++	else
++                echo /dev/$mtd_dev 0x0 $ubootenv_size
++	fi
++
++}
++
++case "$board" in
++*)
++	ubootenv_add_uci_config $(ubootenv_mtdinfo)
++	;;
++esac
++
++config_load ubootenv
++config_foreach ubootenv_add_app_config ubootenv
++
++exit 0
+diff --git a/package/boot/uboot-envtools/files/ipq807x b/package/boot/uboot-envtools/files/ipq807x
+index 2064bfc6f2..8863df4225 100644
+--- a/package/boot/uboot-envtools/files/ipq807x
++++ b/package/boot/uboot-envtools/files/ipq807x
+@@ -1,4 +1,4 @@
+-[ -e /etc/config/ubootenv ] && exit 0
++[ -e /etc/config/ubootenv ] && rm /etc/config/ubootenv
+ 
+ touch /etc/config/ubootenv
+ 
+@@ -7,47 +7,47 @@ touch /etc/config/ubootenv
+ 
+ board=$(board_name)
+ 
++ubootenv_mtdinfo () {
++	UBOOTENV_PART=$(cat /proc/mtd | grep APPSBLENV)
++	mtd_dev=$(echo $UBOOTENV_PART | awk '{print $1}' | sed 's/:$//')
++	mtd_size=$(echo $UBOOTENV_PART | awk '{print "0x"$2}')
++	mtd_erase=$(echo $UBOOTENV_PART | awk '{print "0x"$3}')
++	nor_flash=$(find /sys/bus/spi/devices/*/mtd -name ${mtd_dev})
++    	found_emmc=0
++    
++         if [ -z "$UBOOTENV_PART" ]; then
++                mtd_dev=$(echo $(find_mmc_part "0:APPSBLENV") | sed 's/^.\{5\}//')
++                if [ -n "$mtd_dev" ]; then
++                        EMMC_UBOOTENV_PART=$(cat /proc/partitions | grep $mtd_dev)
++                        #convert block to bytes
++                        emmc_ubootenv_size=`expr $(echo $EMMC_UBOOTENV_PART | awk '{print $3}') \* 1024`
++                        ubootenv_size=0x`printf "%x" $emmc_ubootenv_size`
++			found_emmc=1
++                fi
++                mtd_erase=""
++        
++	elif [ -n "$nor_flash" ]; then
++		ubootenv_size=$mtd_size
++	else
++		# size is fixed to 0x40000 in u-boot
++		ubootenv_size=0x40000
++	fi
++	if [ $found_emmc -eq 0 ]; then
++                sectors=$(printf '0x%x' $(( $ubootenv_size / $mtd_erase )))
++                echo /dev/$mtd_dev 0x0 $ubootenv_size $mtd_erase $sectors
++	else
++                echo /dev/$mtd_dev 0x0 $ubootenv_size
++	fi
++
++}
++
+ case "$board" in
+-dynalink,dl-wrx36|\
+-netgear,wax218)
+-	idx="$(find_mtd_index 0:appsblenv)"
+-	[ -n "$idx" ] && \
+-		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x20000" "2"
+-	;;
+-edgecore,eap102|\
+-zyxel,nbg7815)
+-	idx="$(find_mtd_index 0:appsblenv)"
+-	[ -n "$idx" ] && \
+-		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x10000" "0x10000" "1"
+-	;;
+-edimax,cax1800)
+-	idx="$(find_mtd_index 0:appsblenv)"
+-	[ -n "$idx" ] && \
+-		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x10000" "0x20000"
+-	;;
+-redmi,ax6|\
+-xiaomi,ax3600|\
+-xiaomi,ax9000)
+-	idx="$(find_mtd_index 0:appsblenv)"
+-	[ -n "$idx" ] && \
+-		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x10000" "0x20000"
+-	idx2="$(find_mtd_index bdata)"
+-	[ -n "$idx2" ] && \
+-		ubootenv_add_uci_sys_config "/dev/mtd$idx2" "0x0" "0x10000" "0x20000"
+-	;;
+-prpl,haze)
+-	mmcpart="$(find_mmc_part 0:APPSBLENV)"
+-	[ -n "$mmcpart" ] && \
+-		ubootenv_add_uci_config "$mmcpart" "0x0" "0x40000" "0x400" "0x100"
+-	;;
+-qnap,301w)
+-	idx="$(find_mtd_index 0:appsblenv)"
+-	[ -n "$idx" ] && \
+-		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x20000" "0x20000" "1"
++*)
++	ubootenv_add_uci_config $(ubootenv_mtdinfo)
+ 	;;
+ esac
+ 
+ config_load ubootenv
+-config_foreach ubootenv_add_app_config
++config_foreach ubootenv_add_app_config ubootenv
+ 
+ exit 0
+-- 
+2.34.1
+
diff --git a/patches/ipq807x/0002-ipq807x-add-the-Qualcomm-AX-target-support.patch b/patches/0038-ipq807x-prepare-tree-for-old-v4.4-kernel.patch
similarity index 93%
rename from patches/ipq807x/0002-ipq807x-add-the-Qualcomm-AX-target-support.patch
rename to patches/0038-ipq807x-prepare-tree-for-old-v4.4-kernel.patch
index 7f30179d6..6ec7632ef 100644
--- a/patches/ipq807x/0002-ipq807x-add-the-Qualcomm-AX-target-support.patch
+++ b/patches/0038-ipq807x-prepare-tree-for-old-v4.4-kernel.patch
@@ -1,62 +1,55 @@
-From 16eb7167800a5d897e5090d25fba8fe22c88af4d Mon Sep 17 00:00:00 2001
+From 4c44057eb1873f0a0a34b6c598872fdd105b6e9c Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
-Date: Wed, 29 Mar 2023 07:49:25 +0200
-Subject: [PATCH 01/14] ipq807x: add the Qualcomm AX target support
+Date: Sat, 15 Jul 2023 16:11:26 +0200
+Subject: [PATCH 38/43] ipq807x: prepare tree for old v4.4 kernel
 
 Signed-off-by: John Crispin <john@phrozen.org>
 ---
- config/Config-images.in                    |    4 +
- config/Config-kernel.in                    |    9 +
+ config/Config-images.in                    |    5 +-
+ config/Config-kernel.in                    |   10 +
  include/image.mk                           |    8 +-
- include/kernel-version.mk                  |    7 +-
- include/kernel.mk                          |    8 +-
- include/netfilter.mk                       |   30 +-
+ include/kernel-4.4                         |    2 +
+ include/kernel.mk                          |    7 +-
+ include/netfilter-4.4.mk                   |  413 ++
+ include/netfilter.mk                       |   32 +-
  include/package.mk                         |    8 +-
  include/quilt.mk                           |    4 +
- include/target.mk                          |   16 +-
- package/boot/uboot-envtools/Makefile       |    5 -
- package/boot/uboot-envtools/files/ipq50xx  |   37 +
- package/boot/uboot-envtools/files/ipq60xx  |   37 +
- package/boot/uboot-envtools/files/ipq807x  |   37 +
+ include/target.mk                          |   27 +-
  package/kernel/linux/modules/can.mk        |    3 +-
- package/kernel/linux/modules/crypto.mk     |    9 +-
+ package/kernel/linux/modules/crypto.mk     |    3 +-
  package/kernel/linux/modules/fs.mk         |    3 +-
- package/kernel/linux/modules/iio.mk        |    4 +-
- package/kernel/linux/modules/netdevices.mk |    2 +-
- package/kernel/linux/modules/netfilter.mk  |   15 +-
- package/kernel/linux/modules/netsupport.mk |    6 +-
- package/kernel/linux/modules/other.mk      |   36 +-
- package/kernel/linux/modules/usb.mk        |   21 +-
+ package/kernel/linux/modules/netfilter.mk  |   11 +-
+ package/kernel/linux/modules/netsupport.mk |    4 +-
+ package/kernel/linux/modules/other.mk      |   16 +
  package/kernel/linux/modules/video.mk      |   16 +-
  target/linux/generic/config-4.4-qsdk       | 4794 +++++++++++++++
  target/linux/generic/config-5.4-qsdk       | 6189 ++++++++++++++++++++
- toolchain/gcc/Config.in                    |    5 +
- toolchain/gcc/Config.version               |    1 +
+ toolchain/gcc/common.mk                    |    4 +-
  toolchain/kernel-headers/Makefile          |   13 +-
- 28 files changed, 11280 insertions(+), 47 deletions(-)
- create mode 100644 package/boot/uboot-envtools/files/ipq50xx
- create mode 100644 package/boot/uboot-envtools/files/ipq60xx
- create mode 100644 package/boot/uboot-envtools/files/ipq807x
+ 21 files changed, 11539 insertions(+), 33 deletions(-)
+ create mode 100644 include/kernel-4.4
+ create mode 100644 include/netfilter-4.4.mk
  create mode 100644 target/linux/generic/config-4.4-qsdk
  create mode 100644 target/linux/generic/config-5.4-qsdk
 
 diff --git a/config/Config-images.in b/config/Config-images.in
-index 2921cd5bca..87d63a696a 100644
+index ea7b3d37c3..8413f218a6 100644
 --- a/config/Config-images.in
 +++ b/config/Config-images.in
-@@ -17,6 +17,10 @@ menu "Target Images"
+@@ -17,7 +17,10 @@ menu "Target Images"
  			default TARGET_INITRAMFS_COMPRESSION_LZMA if TARGET_lantiq
  			default TARGET_INITRAMFS_COMPRESSION_LZMA if TARGET_mpc85xx
  			default TARGET_INITRAMFS_COMPRESSION_LZMA if TARGET_ramips
+-			default TARGET_INITRAMFS_COMPRESSION_ZSTD if TARGET_ipq807x
 +			default TARGET_INITRAMFS_COMPRESSION_GZIP if TARGET_ipq807x
 +			default TARGET_INITRAMFS_COMPRESSION_GZIP if TARGET_ipq60xx
 +			default TARGET_INITRAMFS_COMPRESSION_GZIP if TARGET_ipq50xx
 +			default TARGET_INITRAMFS_COMPRESSION_LZMA if TARGET_ipq95xx
+ 			default TARGET_INITRAMFS_COMPRESSION_XZ if USES_SEPARATE_INITRAMFS
  			default TARGET_INITRAMFS_COMPRESSION_NONE
  			depends on TARGET_ROOTFS_INITRAMFS
- 			help
 diff --git a/config/Config-kernel.in b/config/Config-kernel.in
-index d4648a5064..444aa5c973 100644
+index 32524f5aed..5756da726f 100644
 --- a/config/Config-kernel.in
 +++ b/config/Config-kernel.in
 @@ -2,6 +2,15 @@
@@ -75,27 +68,35 @@ index d4648a5064..444aa5c973 100644
  config KERNEL_BUILD_USER
  	string "Custom Kernel Build User Name"
  	default "builder" if BUILDBOT
+@@ -671,6 +680,7 @@ endif
+ config KERNEL_KEYS
+ 	bool "Enable kernel access key retention support"
+ 	default !SMALL_FLASH
++	depends on !TARGET_ipq807x
+ 
+ config KERNEL_PERSISTENT_KEYRINGS
+ 	bool "Enable kernel persistent keyrings"
 diff --git a/include/image.mk b/include/image.mk
-index 7c2dcf0e8b..92b23321b1 100644
+index fae4d32a8b..74d2adafa7 100644
 --- a/include/image.mk
 +++ b/include/image.mk
-@@ -153,6 +153,7 @@ endif
+@@ -146,6 +146,7 @@ endif
  
  
  # Disable noisy checks by default as in upstream
 +ifeq ($(strip $(call kernel_patchver_ge,4.5.0)),1)
- DTC_FLAGS += \
+ DTC_WARN_FLAGS := \
    -Wno-unit_address_vs_reg \
    -Wno-simple_bus_reg \
-@@ -165,6 +166,7 @@ DTC_FLAGS += \
+@@ -158,6 +159,7 @@ DTC_WARN_FLAGS := \
    -Wno-graph_child_address \
    -Wno-graph_port \
    -Wno-unique_unit_address
 +endif
  
- define Image/pad-to
- 	dd if=$(1) of=$(1).new bs=$(2) conv=sync
-@@ -177,6 +179,10 @@ define Image/pad-root-squashfs
+ DTC_FLAGS += $(DTC_WARN_FLAGS)
+ DTCO_FLAGS += $(DTC_WARN_FLAGS)
+@@ -173,6 +175,10 @@ define Image/pad-root-squashfs
  	$(call Image/pad-to,$(KDIR)/root.squashfs,$(if $(1),$(1),$(ROOTFS_PARTSIZE)))
  endef
  
@@ -106,7 +107,7 @@ index 7c2dcf0e8b..92b23321b1 100644
  # $(1) source dts file
  # $(2) target dtb file
  # $(3) extra CPP flags
-@@ -186,7 +192,7 @@ define Image/BuildDTB
+@@ -183,7 +189,7 @@ define Image/BuildDTB/sub
  		-I$(DTS_DIR) \
  		-I$(DTS_DIR)/include \
  		-I$(LINUX_DIR)/include/ \
@@ -114,32 +115,17 @@ index 7c2dcf0e8b..92b23321b1 100644
 +		-undef -D__DTS__ $(DTC_CFLAGS) $(3) \
  		-o $(2).tmp $(1)
  	$(LINUX_DIR)/scripts/dtc/dtc -O dtb \
- 		-i$(dir $(1)) $(DTC_FLAGS) $(4) \
-diff --git a/include/kernel-version.mk b/include/kernel-version.mk
-index c7aba61cd7..d041819b08 100644
---- a/include/kernel-version.mk
-+++ b/include/kernel-version.mk
-@@ -8,12 +8,17 @@ endif
- 
- LINUX_VERSION-4.4 = .60
- LINUX_VERSION-4.14 = .193
-+ifeq ($(CONFIG_TARGET_ipq807x)$(CONFIG_TARGET_ipq60xx)$(CONFIG_TARGET_ipq50xx)$(CONFIG_TARGET_ipq95xx),y)
-+LINUX_VERSION-5.4 = .164
-+else
- LINUX_VERSION-5.4 = .158
-+endif
- LINUX_VERSION-5.10 = .27
- 
--LINUX_KERNEL_HASH-4.4.60 = 2cd8df6f1ac6a5329c5a286ec9b5956215977221a1b731597ed169fff74a9659
+ 		-i$(dir $(1)) $(4) \
+diff --git a/include/kernel-4.4 b/include/kernel-4.4
+new file mode 100644
+index 0000000000..c696ffd82d
+--- /dev/null
++++ b/include/kernel-4.4
+@@ -0,0 +1,2 @@
++LINUX_VERSION-4.4 = .60
 +LINUX_KERNEL_HASH-4.4.60 = e7f2f47acf17497d6ffd713eda65c025b3df0bce09faa8c04712bf1b3cfc9fdb
- LINUX_KERNEL_HASH-4.14.193 = 0b0fb41d4430e1a42738b341cbfd2f41951aa5cd02acabbd53f076119c8b9f03
- LINUX_KERNEL_HASH-5.4.158 = 6e018fecdc8fc24553756e582d83b82d65b10a6b03ef36262a24911f839b8d59
-+LINUX_KERNEL_HASH-5.4.164 = a8fdb27e0e7a871086e0c78b899088c21fbc8e16fb236d220926dc4c93e0fb2d
- LINUX_KERNEL_HASH-5.10.27 = d99dc9662951299c53a0a8d8c8d0a72a16ff861d20e927c0f9b14f63282d69d9
- 
- remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
 diff --git a/include/kernel.mk b/include/kernel.mk
-index e4074a48f4..4fc8f6c430 100644
+index 3012eb8993..d3f3015322 100644
 --- a/include/kernel.mk
 +++ b/include/kernel.mk
 @@ -44,7 +44,7 @@ else
@@ -160,20 +146,439 @@ index e4074a48f4..4fc8f6c430 100644
    endif
  
    ifneq (,$(findstring -rc,$(LINUX_VERSION)))
-@@ -100,8 +100,10 @@ endif
+@@ -101,9 +101,10 @@ else
+ endif
  
  KERNEL_MAKE = $(MAKE) $(KERNEL_MAKEOPTS)
++	
++#KCFLAGS="$(call iremap,$(BUILD_DIR),$(notdir $(BUILD_DIR))) $(filter-out -fno-plt,$(call qstrip,$(CONFIG_EXTRA_OPTIMIZATION))) $(call qstrip,$(CONFIG_KERNEL_CFLAGS))" \
  
-+
-+	#KCFLAGS="$(call iremap,$(BUILD_DIR),$(notdir $(BUILD_DIR)))" \
-+
  KERNEL_MAKE_FLAGS = \
--	KCFLAGS="$(call iremap,$(BUILD_DIR),$(notdir $(BUILD_DIR)))" \
+-	KCFLAGS="$(call iremap,$(BUILD_DIR),$(notdir $(BUILD_DIR))) $(filter-out -fno-plt,$(call qstrip,$(CONFIG_EXTRA_OPTIMIZATION))) $(call qstrip,$(CONFIG_KERNEL_CFLAGS))" \
  	HOSTCFLAGS="$(HOST_CFLAGS) -Wall -Wmissing-prototypes -Wstrict-prototypes" \
  	CROSS_COMPILE="$(KERNEL_CROSS)" \
  	ARCH="$(LINUX_KARCH)" \
+diff --git a/include/netfilter-4.4.mk b/include/netfilter-4.4.mk
+new file mode 100644
+index 0000000000..086c7f3dbe
+--- /dev/null
++++ b/include/netfilter-4.4.mk
+@@ -0,0 +1,413 @@
++# SPDX-License-Identifier: GPL-2.0-only
++#
++# Copyright (C) 2006-2020 OpenWrt.org
++
++ifneq ($(__inc_netfilter),1)
++__inc_netfilter:=1
++
++ifeq ($(NF_KMOD),1)
++P_V4:=ipv4/netfilter/
++P_V6:=ipv6/netfilter/
++P_XT:=netfilter/
++P_EBT:=bridge/netfilter/
++endif
++
++# 1: variable
++# 2: kconfig symbols
++# 3: file list
++# 4: version dependency
++define nf_add
++ $(if $(4),ifeq ($$(strip $$(call CompareKernelPatchVer,$$(KERNEL_PATCHVER),$(firstword $(4)),$(lastword $(4)))),1))
++  $(1)-$$($(2)) += $(3)
++ $(if $(4),endif)
++ KCONFIG_$(1) = $(filter-out $(2),$(KCONFIG_$(1))) $(2)
++endef
++
++
++# core
++
++# kernel only
++$(eval $(if $(NF_KMOD),$(call nf_add,NF_REJECT,CONFIG_NF_REJECT_IPV4, $(P_V4)nf_reject_ipv4),))
++
++$(eval $(if $(NF_KMOD),$(call nf_add,NF_IPT,CONFIG_IP_NF_IPTABLES, $(P_V4)ip_tables),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NF_IPT,CONFIG_NETFILTER_XTABLES, $(P_XT)x_tables),))
++
++$(eval $(if $(NF_KMOD),$(call nf_add,IPT_CORE,CONFIG_NETFILTER_XTABLES, $(P_XT)xt_tcpudp),))
++$(eval $(if $(NF_KMOD),$(call nf_add,IPT_CORE,CONFIG_IP_NF_FILTER, $(P_V4)iptable_filter),))
++$(eval $(if $(NF_KMOD),$(call nf_add,IPT_CORE,CONFIG_IP_NF_MANGLE, $(P_V4)iptable_mangle),))
++
++# userland only
++$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_CORE,CONFIG_IP_NF_IPTABLES, xt_standard ipt_icmp xt_tcp xt_udp xt_comment xt_set xt_SET)))
++
++$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MATCH_LIMIT, $(P_XT)xt_limit))
++$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MATCH_MAC, $(P_XT)xt_mac))
++$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MATCH_MULTIPORT, $(P_XT)xt_multiport))
++$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MATCH_COMMENT, $(P_XT)xt_comment))
++$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MATCH_ID, $(P_XT)xt_id))
++
++#cluster
++$(eval $(call nf_add,IPT_CLUSTER,CONFIG_NETFILTER_XT_MATCH_CLUSTER, $(P_XT)xt_cluster))
++
++$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_TARGET_LOG, $(P_XT)xt_LOG))
++$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_TARGET_LOG, $(P_XT)nf_log_common))
++$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_TARGET_LOG, $(P_V4)nf_log_ipv4))
++$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_TARGET_TCPMSS, $(P_XT)xt_TCPMSS))
++$(eval $(call nf_add,IPT_CORE,CONFIG_IP_NF_TARGET_REJECT, $(P_V4)ipt_REJECT))
++$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MATCH_TIME, $(P_XT)xt_time))
++$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MARK, $(P_XT)xt_mark))
++
++# kernel has xt_MARK.ko merged into xt_mark.ko, userspace is still separate
++# userland: xt_MARK.so
++$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MARK, $(P_XT)xt_MARK)))
++
++
++# conntrack
++
++# kernel only
++$(eval $(if $(NF_KMOD),$(call nf_add,NF_CONNTRACK,CONFIG_NF_CONNTRACK, $(P_XT)nf_conntrack),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NF_CONNTRACK,CONFIG_NF_CONNTRACK_RTCACHE, $(P_XT)nf_conntrack_rtcache),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NF_CONNTRACK,CONFIG_NF_DEFRAG_IPV4, $(P_V4)nf_defrag_ipv4),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NF_CONNTRACK,CONFIG_NF_CONNTRACK_IPV4, $(P_V4)nf_conntrack_ipv4),))
++
++$(eval $(call nf_add,IPT_CONNTRACK,CONFIG_NETFILTER_XT_MATCH_STATE, $(P_XT)xt_state))
++$(eval $(call nf_add,IPT_CONNTRACK,CONFIG_NETFILTER_XT_TARGET_CT, $(P_XT)xt_CT))
++$(eval $(call nf_add,IPT_CONNTRACK,CONFIG_NETFILTER_XT_MATCH_CONNTRACK, $(P_XT)xt_conntrack))
++
++
++# conntrack-extra
++
++$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_MATCH_CONNBYTES, $(P_XT)xt_connbytes))
++$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_MATCH_CONNLIMIT, $(P_XT)xt_connlimit))
++$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_CONNCOUNT, $(P_XT)nf_conncount))
++$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_CONNMARK, $(P_XT)xt_connmark))
++$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_MATCH_HELPER, $(P_XT)xt_helper))
++$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_MATCH_RECENT, $(P_XT)xt_recent))
++
++$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_CONNMARK, $(P_XT)xt_CONNMARK)))
++
++#conntrack-label
++
++$(eval $(call nf_add,IPT_CONNTRACK_LABEL,CONFIG_NETFILTER_XT_MATCH_CONNLABEL, $(P_XT)xt_connlabel))
++
++# extra
++
++$(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_ADDRTYPE, $(if $(NF_KMOD),$(P_XT)xt_addrtype,$(P_XT)ipt_addrtype)))
++$(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_OWNER, $(P_XT)xt_owner))
++$(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_PKTTYPE, $(P_XT)xt_pkttype))
++$(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_QUOTA, $(P_XT)xt_quota))
++
++#$(eval $(call nf_add,IPT_EXTRA,CONFIG_IP_NF_TARGET_ROUTE, $(P_V4)ipt_ROUTE))
++
++# physdev
++
++$(eval $(call nf_add,IPT_PHYSDEV,CONFIG_NETFILTER_XT_MATCH_PHYSDEV, $(P_XT)xt_physdev))
++
++# filter
++
++$(eval $(call nf_add,IPT_FILTER,CONFIG_NETFILTER_XT_MATCH_STRING, $(P_XT)xt_string))
++$(eval $(call nf_add,IPT_FILTER,CONFIG_NETFILTER_XT_MATCH_BPF, $(P_XT)xt_bpf))
++
++
++# ipopt
++
++$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_DSCP, $(P_XT)xt_dscp))
++$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_TARGET_DSCP, $(P_XT)xt_DSCP))
++$(eval $(call nf_add,IPT_HASHLIMIT,CONFIG_NETFILTER_XT_MATCH_HASHLIMIT, $(P_XT)xt_hashlimit))
++$(eval $(call nf_add,IPT_RPFILTER,CONFIG_IP_NF_MATCH_RPFILTER, $(P_V4)ipt_rpfilter))
++$(eval $(call nf_add,IPT_RPFILTER,CONFIG_IP6_NF_MATCH_RPFILTER, $(P_V6)ip6t_rpfilter))
++$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_LENGTH, $(P_XT)xt_length))
++$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_STATISTIC, $(P_XT)xt_statistic))
++$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_TCPMSS, $(P_XT)xt_tcpmss))
++
++$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_TARGET_CLASSIFY, $(P_XT)xt_CLASSIFY))
++$(eval $(call nf_add,IPT_IPOPT,CONFIG_IP_NF_MATCH_DSCP, $(P_V4)ipt_dscp))
++$(eval $(call nf_add,IPT_IPOPT,CONFIG_IP_NF_TARGET_ECN, $(P_V4)ipt_ECN))
++
++$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_ECN, $(P_XT)xt_ecn))
++
++# userland only
++$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_DSCP, xt_tos)))
++$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_TARGET_DSCP, xt_TOS)))
++$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_HL, ipt_ttl)))
++$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_TARGET_HL, ipt_TTL)))
++
++$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_HL, $(P_XT)xt_hl))
++$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_TARGET_HL, $(P_XT)xt_HL))
++
++# iprange
++$(eval $(call nf_add,IPT_IPRANGE,CONFIG_NETFILTER_XT_MATCH_IPRANGE, $(P_XT)xt_iprange))
++
++#clusterip
++$(eval $(call nf_add,IPT_CLUSTERIP,CONFIG_IP_NF_TARGET_CLUSTERIP, $(P_V4)ipt_CLUSTERIP))
++
++# ipsec
++$(eval $(call nf_add,IPT_IPSEC,CONFIG_IP_NF_MATCH_AH, $(P_V4)ipt_ah))
++$(eval $(call nf_add,IPT_IPSEC,CONFIG_NETFILTER_XT_MATCH_ESP, $(P_XT)xt_esp))
++$(eval $(call nf_add,IPT_IPSEC,CONFIG_NETFILTER_XT_MATCH_POLICY, $(P_XT)xt_policy))
++
++# flow offload support
++$(eval $(call nf_add,IPT_FLOW,CONFIG_NETFILTER_XT_TARGET_FLOWOFFLOAD, $(P_XT)xt_FLOWOFFLOAD))
++
++# IPv6
++
++# kernel only
++$(eval $(if $(NF_KMOD),$(call nf_add,NF_REJECT6,CONFIG_NF_REJECT_IPV6, $(P_V6)nf_reject_ipv6),))
++
++$(eval $(if $(NF_KMOD),$(call nf_add,NF_IPT6,CONFIG_IP6_NF_IPTABLES, $(P_V6)ip6_tables),))
++
++$(eval $(if $(NF_KMOD),$(call nf_add,NF_CONNTRACK,CONFIG_NF_DEFRAG_IPV6, $(P_V6)nf_defrag_ipv6, ge 4.19),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NF_CONNTRACK6,CONFIG_NF_DEFRAG_IPV6, $(P_V6)nf_defrag_ipv6, lt 4.19),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NF_CONNTRACK6,CONFIG_NF_CONNTRACK_IPV6, $(P_V6)nf_conntrack_ipv6),))
++
++$(eval $(if $(NF_KMOD),$(call nf_add,IPT_IPV6,CONFIG_IP6_NF_FILTER, $(P_V6)ip6table_filter),))
++$(eval $(if $(NF_KMOD),$(call nf_add,IPT_IPV6,CONFIG_IP6_NF_MANGLE, $(P_V6)ip6table_mangle),))
++$(eval $(if $(NF_KMOD),$(call nf_add,IPT_IPV6,CONFIG_IP6_NF_QUEUE, $(P_V6)ip6_queue),))
++$(eval $(if $(NF_KMOD),$(call nf_add,IPT_IPV6,CONFIG_NF_LOG_IPV6, $(P_V6)nf_log_ipv6),))
++
++$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_IPV6,CONFIG_IP6_NF_IPTABLES, ip6t_icmp6)))
++
++
++$(eval $(call nf_add,IPT_IPV6,CONFIG_IP6_NF_TARGET_LOG, $(P_V6)ip6t_LOG))
++$(eval $(call nf_add,IPT_IPV6,CONFIG_IP6_NF_TARGET_REJECT, $(P_V6)ip6t_REJECT))
++
++# ipv6 extra
++$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_IPV6HEADER, $(P_V6)ip6t_ipv6header))
++$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_AH, $(P_V6)ip6t_ah))
++$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_MH, $(P_V6)ip6t_mh))
++$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_EUI64, $(P_V6)ip6t_eui64))
++$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_OPTS, $(P_V6)ip6t_hbh))
++$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_FRAG, $(P_V6)ip6t_frag))
++$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_RT, $(P_V6)ip6t_rt))
++
++# nat
++
++# kernel only
++$(eval $(if $(NF_KMOD),$(call nf_add,NF_NAT,CONFIG_NF_NAT, $(P_XT)nf_nat),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NF_NAT,CONFIG_NF_NAT_REDIRECT, $(P_XT)nf_nat_redirect, lt 4.18),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NF_NAT,CONFIG_NF_NAT_IPV4, $(P_V4)nf_nat_ipv4, lt 4.18),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NF_NAT,CONFIG_NF_NAT_MASQUERADE_IPV4, $(P_V4)nf_nat_masquerade_ipv4, lt 4.18),))
++
++$(eval $(if $(NF_KMOD),$(call nf_add,IPT_NAT,CONFIG_NETFILTER_XT_NAT, $(P_XT)xt_nat),))
++$(eval $(if $(NF_KMOD),$(call nf_add,IPT_NAT,CONFIG_IP_NF_NAT, $(P_V4)iptable_nat),))
++$(eval $(if $(NF_KMOD),$(call nf_add,IPT_NAT6,CONFIG_IP6_NF_NAT, $(P_V6)ip6table_nat),))
++$(eval $(if $(NF_KMOD),$(call nf_add,IPT_NAT6,CONFIG_IP6_NF_TARGET_NPT, $(P_V6)ip6t_NPT),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NF_NAT6,CONFIG_NF_NAT_MASQUERADE_IPV6, $(P_V6)nf_nat_masquerade_ipv6, lt 4.18),))
++
++# userland only
++$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_NAT,CONFIG_NF_NAT, ipt_SNAT ipt_DNAT)))
++$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_NAT6,CONFIG_IP6_NF_TARGET_NPT, ip6t_DNPT ip6t_SNPT)))
++
++$(eval $(call nf_add,IPT_NAT,CONFIG_NETFILTER_XT_TARGET_MASQUERADE, $(P_XT)xt_MASQUERADE))
++$(eval $(call nf_add,IPT_NAT,CONFIG_NETFILTER_XT_TARGET_REDIRECT, $(P_XT)xt_REDIRECT))
++$(eval $(call nf_add,IPT_NAT,CONFIG_IP_NF_TARGET_MASQUERADE, $(P_V4)ipt_MASQUERADE, lt 4.18))
++$(eval $(call nf_add,IPT_NAT,CONFIG_IP_NF_TARGET_REDIRECT, $(P_XT)xt_REDIRECT, lt 4.18))
++
++
++# nat-extra
++
++$(eval $(call nf_add,IPT_NAT_EXTRA,CONFIG_IP_NF_TARGET_NETMAP, $(P_XT)xt_NETMAP))
++
++
++# nathelper
++
++$(eval $(call nf_add,NF_NATHELPER,CONFIG_NF_CONNTRACK_FTP, $(P_XT)nf_conntrack_ftp))
++$(eval $(call nf_add,NF_NATHELPER,CONFIG_NF_NAT_FTP, $(P_XT)nf_nat_ftp))
++
++
++# nathelper-extra
++
++$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_BROADCAST, $(P_XT)nf_conntrack_broadcast))
++$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_AMANDA, $(P_XT)nf_conntrack_amanda))
++$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_AMANDA, $(P_XT)nf_nat_amanda))
++$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_H323, $(P_XT)nf_conntrack_h323))
++$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_H323, $(P_V4)nf_nat_h323))
++$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_PPTP, $(P_XT)nf_conntrack_pptp))
++$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_PPTP, $(P_V4)nf_nat_pptp))
++$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_SIP, $(P_XT)nf_conntrack_sip))
++$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_SIP, $(P_XT)nf_nat_sip))
++$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_SNMP, $(P_XT)nf_conntrack_snmp))
++$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_SNMP_BASIC, $(P_V4)nf_nat_snmp_basic))
++$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_TFTP, $(P_XT)nf_conntrack_tftp))
++$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_TFTP, $(P_XT)nf_nat_tftp))
++$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_IRC, $(P_XT)nf_conntrack_irc))
++$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_IRC, $(P_XT)nf_nat_irc))
++
++
++# ulog
++
++$(eval $(call nf_add,IPT_ULOG,CONFIG_IP_NF_TARGET_ULOG, $(P_V4)ipt_ULOG))
++
++
++# nflog
++
++$(eval $(call nf_add,IPT_NFLOG,CONFIG_NETFILTER_XT_TARGET_NFLOG, $(P_XT)xt_NFLOG))
++
++
++# nfqueue
++
++$(eval $(call nf_add,IPT_NFQUEUE,CONFIG_NETFILTER_XT_TARGET_NFQUEUE, $(P_XT)xt_NFQUEUE))
++
++
++# debugging
++
++$(eval $(call nf_add,IPT_DEBUG,CONFIG_NETFILTER_XT_TARGET_TRACE, $(P_XT)xt_TRACE))
++
++# tproxy
++
++$(eval $(call nf_add,IPT_TPROXY,CONFIG_NETFILTER_XT_MATCH_SOCKET, $(P_XT)xt_socket))
++$(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_SOCKET_IPV4, $(P_V4)nf_socket_ipv4))
++$(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_SOCKET_IPV6, $(P_V6)nf_socket_ipv6))
++$(eval $(call nf_add,IPT_TPROXY,CONFIG_NETFILTER_XT_TARGET_TPROXY, $(P_XT)xt_TPROXY))
++$(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_TPROXY_IPV4, $(P_V4)nf_tproxy_ipv4, ge 4.18))
++$(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_TPROXY_IPV6, $(P_V6)nf_tproxy_ipv6, ge 4.18))
++
++# led
++$(eval $(call nf_add,IPT_LED,CONFIG_NETFILTER_XT_TARGET_LED, $(P_XT)xt_LED))
++
++# tee
++
++$(eval $(call nf_add,IPT_TEE,CONFIG_NETFILTER_XT_TARGET_TEE, $(P_XT)xt_TEE))
++$(eval $(if $(NF_KMOD),$(call nf_add,IPT_TEE,CONFIG_NF_DUP_IPV4, $(P_V4)nf_dup_ipv4),))
++$(eval $(if $(NF_KMOD),$(call nf_add,IPT_TEE,CONFIG_NF_DUP_IPV6, $(P_V6)nf_dup_ipv6),))
++
++# u32
++
++$(eval $(call nf_add,IPT_U32,CONFIG_NETFILTER_XT_MATCH_U32, $(P_XT)xt_u32))
++
++# checksum
++
++$(eval $(call nf_add,IPT_CHECKSUM,CONFIG_NETFILTER_XT_TARGET_CHECKSUM, $(P_XT)xt_CHECKSUM))
++
++
++# netlink
++
++$(eval $(call nf_add,NFNETLINK,CONFIG_NETFILTER_NETLINK, $(P_XT)nfnetlink))
++
++# nflog
++
++$(eval $(call nf_add,NFNETLINK_LOG,CONFIG_NETFILTER_NETLINK_LOG, $(P_XT)nfnetlink_log))
++
++# nfqueue
++
++$(eval $(call nf_add,NFNETLINK_QUEUE,CONFIG_NETFILTER_NETLINK_QUEUE, $(P_XT)nfnetlink_queue))
++
++#
++# ebtables
++#
++
++$(eval $(if $(NF_KMOD),$(call nf_add,EBTABLES,CONFIG_BRIDGE_NF_EBTABLES, $(P_EBT)ebtables),))
++
++# ebtables: tables
++$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_BROUTE, $(P_EBT)ebtable_broute))
++$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_T_FILTER, $(P_EBT)ebtable_filter))
++$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_T_NAT, $(P_EBT)ebtable_nat))
++
++# ebtables: matches
++$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_802_3, $(P_EBT)ebt_802_3))
++$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_AMONG, $(P_EBT)ebt_among))
++$(eval $(call nf_add,EBTABLES_IP4,CONFIG_BRIDGE_EBT_ARP, $(P_EBT)ebt_arp))
++$(eval $(call nf_add,EBTABLES_IP4,CONFIG_BRIDGE_EBT_IP, $(P_EBT)ebt_ip))
++$(eval $(call nf_add,EBTABLES_IP6,CONFIG_BRIDGE_EBT_IP6, $(P_EBT)ebt_ip6))
++$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_LIMIT, $(P_EBT)ebt_limit))
++$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_MARK, $(P_EBT)ebt_mark_m))
++$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_PKTTYPE, $(P_EBT)ebt_pkttype))
++$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_STP, $(P_EBT)ebt_stp))
++$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_VLAN, $(P_EBT)ebt_vlan))
++
++# targets
++$(eval $(call nf_add,EBTABLES_IP4,CONFIG_BRIDGE_EBT_ARPREPLY, $(P_EBT)ebt_arpreply))
++$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_MARK_T, $(P_EBT)ebt_mark))
++$(eval $(call nf_add,EBTABLES_IP4,CONFIG_BRIDGE_EBT_DNAT, $(P_EBT)ebt_dnat))
++$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_REDIRECT, $(P_EBT)ebt_redirect))
++$(eval $(call nf_add,EBTABLES_IP4,CONFIG_BRIDGE_EBT_SNAT, $(P_EBT)ebt_snat))
++
++# watchers
++$(eval $(call nf_add,EBTABLES_WATCHERS,CONFIG_BRIDGE_EBT_LOG, $(P_EBT)ebt_log))
++$(eval $(call nf_add,EBTABLES_WATCHERS,CONFIG_BRIDGE_EBT_ULOG, $(P_EBT)ebt_ulog))
++$(eval $(call nf_add,EBTABLES_WATCHERS,CONFIG_BRIDGE_EBT_NFLOG, $(P_EBT)ebt_nflog))
++$(eval $(call nf_add,EBTABLES_WATCHERS,CONFIG_BRIDGE_EBT_NFQUEUE, $(P_EBT)ebt_nfqueue))
++
++# nftables
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NF_TABLES, $(P_XT)nf_tables),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NF_TABLES_INET, $(P_XT)nf_tables_inet, lt 4.17),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NF_TABLES_IPV4, $(P_V4)nf_tables_ipv4, lt 4.17),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NF_TABLES_IPV6, $(P_V6)nf_tables_ipv6, lt 4.17),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NF_TABLES_SET, $(P_XT)nf_tables_set, ge 4.18),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_COUNTER, $(P_XT)nft_counter),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_CT, $(P_XT)nft_ct),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_HASH, $(P_XT)nft_hash),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_LIMIT, $(P_XT)nft_limit),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_LOG, $(P_XT)nft_log),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_META, $(P_XT)nft_meta),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_NUMGEN, $(P_XT)nft_numgen),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_OBJREF, $(P_XT)nft_objref),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_QUOTA, $(P_XT)nft_quota),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_REDIR, $(P_XT)nft_redir),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_REJECT, $(P_XT)nft_reject $(P_V4)nft_reject_ipv4 $(P_V6)nft_reject_ipv6),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_REJECT_INET, $(P_XT)nft_reject_inet),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_SET_HASH, $(P_XT)nft_set_hash, lt 4.18),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_SET_RBTREE, $(P_XT)nft_set_rbtree, lt 4.18),))
++
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_ARP,CONFIG_NF_TABLES_ARP, $(P_V4)nf_tables_arp, lt 4.17),))
++
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_BRIDGE,CONFIG_NF_TABLES_BRIDGE, $(P_EBT)nf_tables_bridge, lt 4.17),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_BRIDGE,CONFIG_NFT_BRIDGE_META, $(P_EBT)nft_meta_bridge),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_BRIDGE,CONFIG_NFT_BRIDGE_REJECT, $(P_EBT)nft_reject_bridge),))
++
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT,CONFIG_NFT_NAT, $(P_XT)nft_nat),))
++#$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT,CONFIG_NFT_NAT, $(P_XT)nft_chain_nat),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT,CONFIG_NFT_REDIR_IPV4, $(P_V4)nft_redir_ipv4),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT,CONFIG_NFT_MASQ, $(P_XT)nft_masq),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT,CONFIG_NFT_MASQ_IPV4, $(P_V4)nft_masq_ipv4),))
++
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT6,CONFIG_NFT_REDIR_IPV6, $(P_V6)nft_redir_ipv6),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT6,CONFIG_NFT_MASQ_IPV6, $(P_V6)nft_masq_ipv6),))
++
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_FIB,CONFIG_NFT_FIB, $(P_XT)nft_fib),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_FIB,CONFIG_NFT_FIB_INET, $(P_XT)nft_fib_inet),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_FIB,CONFIG_NFT_FIB_IPV4, $(P_V4)nft_fib_ipv4),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_FIB,CONFIG_NFT_FIB_IPV6, $(P_V6)nft_fib_ipv6),))
++
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_QUEUE,CONFIG_NFT_QUEUE, $(P_XT)nft_queue),))
++
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_EXTHDR, $(P_XT)nft_exthdr, lt 4.9.0),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_RBTREE, $(P_XT)nft_rbtree, lt 4.9.0),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_CHAIN_ROUTE_IPV4, $(P_V4)nft_chain_route_ipv4, lt 4.9.0),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT,CONFIG_NFT_CHAIN_NAT_IPV4, $(P_V4)nft_chain_nat_ipv4, lt 4.9.0),))
++$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_CHAIN_ROUTE_IPV6, $(P_V6)nft_chain_route_ipv6, lt 4.9.0),))
++
++# userland only
++IPT_BUILTIN += $(NF_IPT-y) $(NF_IPT-m)
++IPT_BUILTIN += $(IPT_CORE-y) $(IPT_CORE-m)
++IPT_BUILTIN += $(NF_CONNTRACK-y)
++IPT_BUILTIN += $(NF_CONNTRACK6-y)
++IPT_BUILTIN += $(IPT_CONNTRACK-y)
++IPT_BUILTIN += $(IPT_CONNTRACK_EXTRA-y)
++IPT_BUILTIN += $(IPT_EXTRA-y)
++IPT_BUILTIN += $(IPT_PHYSDEV-y)
++IPT_BUILTIN += $(IPT_FILTER-y)
++IPT_BUILTIN += $(IPT_FLOW-y) $(IPT_FLOW-m)
++IPT_BUILTIN += $(IPT_IPOPT-y)
++IPT_BUILTIN += $(IPT_IPRANGE-y)
++IPT_BUILTIN += $(IPT_CLUSTER-y)
++IPT_BUILTIN += $(IPT_CLUSTERIP-y)
++IPT_BUILTIN += $(IPT_IPSEC-y)
++IPT_BUILTIN += $(IPT_IPV6-y) $(IPT_IPV6-m)
++IPT_BUILTIN += $(NF_NAT-y)
++IPT_BUILTIN += $(NF_NAT6-y)
++IPT_BUILTIN += $(IPT_NAT-y)
++IPT_BUILTIN += $(IPT_NAT6-y)
++IPT_BUILTIN += $(IPT_NAT_EXTRA-y)
++IPT_BUILTIN += $(NF_NATHELPER-y)
++IPT_BUILTIN += $(NF_NATHELPER_EXTRA-y)
++IPT_BUILTIN += $(IPT_ULOG-y)
++IPT_BUILTIN += $(IPT_TPROXY-y)
++IPT_BUILTIN += $(NFNETLINK-y)
++IPT_BUILTIN += $(NFNETLINK_LOG-y)
++IPT_BUILTIN += $(NFNETLINK_QUEUE-y)
++IPT_BUILTIN += $(EBTABLES-y)
++IPT_BUILTIN += $(EBTABLES_IP4-y)
++IPT_BUILTIN += $(EBTABLES_IP6-y)
++IPT_BUILTIN += $(EBTABLES_WATCHERS-y)
++
++endif # __inc_netfilter
 diff --git a/include/netfilter.mk b/include/netfilter.mk
-index 60f031e9a7..cee40ee008 100644
+index 81488fe5c8..50fa470a4f 100644
 --- a/include/netfilter.mk
 +++ b/include/netfilter.mk
 @@ -43,6 +43,7 @@ $(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MATCH_LIMIT, $(P_XT)xt_limit))
@@ -184,17 +589,17 @@ index 60f031e9a7..cee40ee008 100644
  
  #cluster
  $(eval $(call nf_add,IPT_CLUSTER,CONFIG_NETFILTER_XT_MATCH_CLUSTER, $(P_XT)xt_cluster))
-@@ -154,7 +155,8 @@ $(eval $(if $(NF_KMOD),$(call nf_add,NF_REJECT6,CONFIG_NF_REJECT_IPV6, $(P_V6)nf
+@@ -149,7 +150,8 @@ $(eval $(if $(NF_KMOD),$(call nf_add,NF_REJECT6,CONFIG_NF_REJECT_IPV6, $(P_V6)nf
  
  $(eval $(if $(NF_KMOD),$(call nf_add,NF_IPT6,CONFIG_IP6_NF_IPTABLES, $(P_V6)ip6_tables),))
  
 -$(eval $(if $(NF_KMOD),$(call nf_add,NF_CONNTRACK,CONFIG_NF_DEFRAG_IPV6, $(P_V6)nf_defrag_ipv6),))
 +$(eval $(if $(NF_KMOD),$(call nf_add,NF_CONNTRACK,CONFIG_NF_DEFRAG_IPV6, $(P_V6)nf_defrag_ipv6, ge 4.19),))
 +$(eval $(if $(NF_KMOD),$(call nf_add,NF_CONNTRACK6,CONFIG_NF_DEFRAG_IPV6, $(P_V6)nf_defrag_ipv6, lt 4.19),))
- $(eval $(if $(NF_KMOD),$(call nf_add,NF_CONNTRACK6,CONFIG_NF_CONNTRACK_IPV6, $(P_V6)nf_conntrack_ipv6),))
  
  $(eval $(if $(NF_KMOD),$(call nf_add,IPT_IPV6,CONFIG_IP6_NF_FILTER, $(P_V6)ip6table_filter),))
-@@ -181,11 +183,15 @@ $(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_RT, $(P_V6)ip6t_rt))
+ $(eval $(if $(NF_KMOD),$(call nf_add,IPT_IPV6,CONFIG_IP6_NF_MANGLE, $(P_V6)ip6table_mangle),))
+@@ -179,11 +181,15 @@ $(eval $(if $(NF_KMOD),$(call nf_add,NF_LOG6,CONFIG_NF_LOG_IPV6, $(P_V6)nf_log_i
  
  # kernel only
  $(eval $(if $(NF_KMOD),$(call nf_add,NF_NAT,CONFIG_NF_NAT, $(P_XT)nf_nat),))
@@ -210,7 +615,7 @@ index 60f031e9a7..cee40ee008 100644
  
  # userland only
  $(eval $(if $(NF_KMOD),,$(call nf_add,IPT_NAT,CONFIG_NF_NAT, ipt_SNAT ipt_DNAT)))
-@@ -193,6 +199,8 @@ $(eval $(if $(NF_KMOD),,$(call nf_add,IPT_NAT6,CONFIG_IP6_NF_TARGET_NPT, ip6t_DN
+@@ -191,6 +197,8 @@ $(eval $(if $(NF_KMOD),,$(call nf_add,IPT_NAT6,CONFIG_IP6_NF_TARGET_NPT, ip6t_DN
  
  $(eval $(call nf_add,IPT_NAT,CONFIG_NETFILTER_XT_TARGET_MASQUERADE, $(P_XT)xt_MASQUERADE))
  $(eval $(call nf_add,IPT_NAT,CONFIG_NETFILTER_XT_TARGET_REDIRECT, $(P_XT)xt_REDIRECT))
@@ -219,18 +624,20 @@ index 60f031e9a7..cee40ee008 100644
  
  
  # nat-extra
-@@ -250,8 +258,8 @@ $(eval $(call nf_add,IPT_TPROXY,CONFIG_NETFILTER_XT_MATCH_SOCKET, $(P_XT)xt_sock
- $(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_SOCKET_IPV4, $(P_V4)nf_socket_ipv4))
- $(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_SOCKET_IPV6, $(P_V6)nf_socket_ipv6))
- $(eval $(call nf_add,IPT_TPROXY,CONFIG_NETFILTER_XT_TARGET_TPROXY, $(P_XT)xt_TPROXY))
--$(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_TPROXY_IPV4, $(P_V4)nf_tproxy_ipv4))
--$(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_TPROXY_IPV6, $(P_V6)nf_tproxy_ipv6))
+@@ -243,9 +251,9 @@ $(eval $(call nf_add,NF_SOCKET,CONFIG_NF_SOCKET_IPV6, $(P_V6)nf_socket_ipv6))
+ $(eval $(call nf_add,IPT_SOCKET,CONFIG_NETFILTER_XT_MATCH_SOCKET, $(P_XT)xt_socket))
+ 
+ # tproxy
+-$(eval $(call nf_add,NF_TPROXY,CONFIG_NF_TPROXY_IPV4, $(P_V4)nf_tproxy_ipv4))
+-$(eval $(call nf_add,NF_TPROXY,CONFIG_NF_TPROXY_IPV6, $(P_V6)nf_tproxy_ipv6))
+-$(eval $(call nf_add,IPT_TPROXY,CONFIG_NETFILTER_XT_TARGET_TPROXY, $(P_XT)xt_TPROXY))
 +$(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_TPROXY_IPV4, $(P_V4)nf_tproxy_ipv4, ge 4.18))
 +$(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_TPROXY_IPV6, $(P_V6)nf_tproxy_ipv6, ge 4.18))
++$(eval $(call nf_add,IPT_TPROXY,CONFIG_NETFILTER_XT_TARGET_TPROXY, $(P_XT)xt_TPROXY, ge 4.18))
  
  # led
  $(eval $(call nf_add,IPT_LED,CONFIG_NETFILTER_XT_TARGET_LED, $(P_XT)xt_LED))
-@@ -321,7 +329,10 @@ $(eval $(call nf_add,EBTABLES_WATCHERS,CONFIG_BRIDGE_EBT_NFQUEUE, $(P_EBT)ebt_nf
+@@ -318,7 +326,10 @@ $(eval $(call nf_add,EBTABLES_WATCHERS,CONFIG_BRIDGE_EBT_NFQUEUE, $(P_EBT)ebt_nf
  
  # nftables
  $(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NF_TABLES, $(P_XT)nf_tables),))
@@ -242,7 +649,7 @@ index 60f031e9a7..cee40ee008 100644
  $(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_COUNTER, $(P_XT)nft_counter),))
  $(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_CT, $(P_XT)nft_ct),))
  $(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_HASH, $(P_XT)nft_hash),))
-@@ -334,7 +345,12 @@ $(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_QUOTA, $(P_XT)nft_quota
+@@ -331,7 +342,12 @@ $(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_QUOTA, $(P_XT)nft_quota
  $(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_REDIR, $(P_XT)nft_redir),))
  $(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_REJECT, $(P_XT)nft_reject $(P_V4)nft_reject_ipv4 $(P_V6)nft_reject_ipv6),))
  $(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_REJECT_INET, $(P_XT)nft_reject_inet),))
@@ -254,10 +661,10 @@ index 60f031e9a7..cee40ee008 100644
 +$(eval $(if $(NF_KMOD),$(call nf_add,NFT_BRIDGE,CONFIG_NF_TABLES_BRIDGE, $(P_EBT)nf_tables_bridge, lt 4.17),))
  $(eval $(if $(NF_KMOD),$(call nf_add,NFT_BRIDGE,CONFIG_NFT_BRIDGE_META, $(P_EBT)nft_meta_bridge),))
  $(eval $(if $(NF_KMOD),$(call nf_add,NFT_BRIDGE,CONFIG_NFT_BRIDGE_REJECT, $(P_EBT)nft_reject_bridge),))
+ $(eval $(if $(NF_KMOD),$(call nf_add,NFT_BRIDGE,CONFIG_NF_CONNTRACK_BRIDGE, $(P_EBT)nf_conntrack_bridge),))
+@@ -357,6 +373,12 @@ $(eval $(if $(NF_KMOD),$(call nf_add,NFT_XFRM,CONFIG_NFT_XFRM, $(P_XT)nft_xfrm),
  
-@@ -354,6 +370,12 @@ $(eval $(if $(NF_KMOD),$(call nf_add,NFT_FIB,CONFIG_NFT_FIB_IPV6, $(P_V6)nft_fib
- 
- $(eval $(if $(NF_KMOD),$(call nf_add,NFT_QUEUE,CONFIG_NFT_QUEUE, $(P_XT)nft_queue),))
+ $(eval $(if $(NF_KMOD),$(call nf_add,NFT_CONNLIMIT,CONFIG_NFT_CONNLIMIT, $(P_XT)nft_connlimit),))
  
 +$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_EXTHDR, $(P_XT)nft_exthdr, lt 4.9.0),))
 +$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_RBTREE, $(P_XT)nft_rbtree, lt 4.9.0),))
@@ -269,26 +676,26 @@ index 60f031e9a7..cee40ee008 100644
  IPT_BUILTIN += $(NF_IPT-y) $(NF_IPT-m)
  IPT_BUILTIN += $(IPT_CORE-y) $(IPT_CORE-m)
 diff --git a/include/package.mk b/include/package.mk
-index db0a869dab..89ddcbc677 100644
+index c391d320aa..12ecb2cca6 100644
 --- a/include/package.mk
 +++ b/include/package.mk
-@@ -29,10 +29,10 @@ ifdef CONFIG_USE_MIPS16
-     TARGET_CFLAGS += -mips16 -minterlink-mips16
-   endif
- endif
--ifeq ($(strip $(PKG_IREMAP)),1)
+@@ -34,10 +34,10 @@ define pkg_build_flag
+ $(if $(filter no-$(1),$(PKG_BUILD_FLAGS)),0,$(if $(filter $(1),$(PKG_BUILD_FLAGS)),1,$(2)))
+ endef
+ 
+-ifeq ($(call pkg_build_flag,iremap,1),1)
 -  IREMAP_CFLAGS = $(call iremap,$(PKG_BUILD_DIR),$(notdir $(PKG_BUILD_DIR)))
 -  TARGET_CFLAGS += $(IREMAP_CFLAGS)
 -endif
-+#ifeq ($(strip $(PKG_IREMAP)),1)
++#ifeq ($(call pkg_build_flag,iremap,1),1)
 +#  IREMAP_CFLAGS = $(call iremap,$(PKG_BUILD_DIR),$(notdir $(PKG_BUILD_DIR)))
 +#  TARGET_CFLAGS += $(IREMAP_CFLAGS)
 +#endif
- 
- include $(INCLUDE_DIR)/hardening.mk
- include $(INCLUDE_DIR)/prereq.mk
+ ifdef CONFIG_USE_MIPS16
+   ifeq ($(call pkg_build_flag,mips16,1),1)
+     TARGET_ASFLAGS_DEFAULT = $(filter-out -mips16 -minterlink-mips16,$(TARGET_CFLAGS))
 diff --git a/include/quilt.mk b/include/quilt.mk
-index 00597ca0f2..ef7ce31955 100644
+index 18cafe60a2..a860c557de 100644
 --- a/include/quilt.mk
 +++ b/include/quilt.mk
 @@ -99,9 +99,11 @@ define Kernel/Patch/Default
@@ -316,10 +723,29 @@ index 00597ca0f2..ef7ce31955 100644
  endef
  
 diff --git a/include/target.mk b/include/target.mk
-index 7526224972..a3ad598ebc 100644
+index b5e3e7ff6f..36e1377617 100644
 --- a/include/target.mk
 +++ b/include/target.mk
-@@ -138,16 +138,30 @@ ifneq ($(TARGET_BUILD)$(if $(DUMP),,1),)
+@@ -62,6 +62,18 @@ DEFAULT_PACKAGES.router:=\
+ 	ppp \
+ 	ppp-mod-pppoe
+ 
++DEFAULT_PACKAGES.qsdk:=\
++        dnsmasq \
++        firewall \
++        ip6tables \
++        iptables \
++        kmod-ipt-offload \
++        odhcp6c \
++        odhcpd-ipv6only \
++        ppp \
++        ppp-mod-pppoe \
++	 -procd-ujail
++
+ ifneq ($(DUMP),)
+   all: dumpinfo
+ endif
+@@ -147,16 +158,30 @@ ifneq ($(TARGET_BUILD)$(if $(DUMP),,1),)
  endif
  
  GENERIC_PLATFORM_DIR := $(TOPDIR)/target/linux/generic
@@ -351,153 +777,8 @@ index 7526224972..a3ad598ebc 100644
  LINUX_TARGET_CONFIG = $(call find_kernel_config,$(PLATFORM_DIR))
  ifneq ($(PLATFORM_DIR),$(PLATFORM_SUBDIR))
    LINUX_SUBTARGET_CONFIG = $(call find_kernel_config,$(PLATFORM_SUBDIR))
-diff --git a/package/boot/uboot-envtools/Makefile b/package/boot/uboot-envtools/Makefile
-index a9eccec0ce..0696c81bea 100644
---- a/package/boot/uboot-envtools/Makefile
-+++ b/package/boot/uboot-envtools/Makefile
-@@ -58,11 +58,6 @@ MAKE_FLAGS += \
- 	no-dot-config-targets=envtools \
- 	envtools
- 
--define Package/uboot-envtools/conffiles
--/etc/config/ubootenv
--/etc/fw_env.config
--endef
--
- define Package/uboot-envtools/install
- 	$(INSTALL_DIR) $(1)/usr/sbin
- 	$(INSTALL_BIN) $(PKG_BUILD_DIR)/tools/env/fw_printenv $(1)/usr/sbin
-diff --git a/package/boot/uboot-envtools/files/ipq50xx b/package/boot/uboot-envtools/files/ipq50xx
-new file mode 100644
-index 0000000000..84ed73f288
---- /dev/null
-+++ b/package/boot/uboot-envtools/files/ipq50xx
-@@ -0,0 +1,37 @@
-+[ -e /etc/config/ubootenv ] && rm /etc/config/ubootenv
-+
-+touch /etc/config/ubootenv
-+
-+. /lib/uboot-envtools.sh
-+. /lib/functions.sh
-+
-+board=$(board_name)
-+
-+ubootenv_mtdinfo () {
-+	UBOOTENV_PART=$(cat /proc/mtd | grep APPSBLENV)
-+	mtd_dev=$(echo $UBOOTENV_PART | awk '{print $1}' | sed 's/:$//')
-+	mtd_size=$(echo $UBOOTENV_PART | awk '{print "0x"$2}')
-+	mtd_erase=$(echo $UBOOTENV_PART | awk '{print "0x"$3}')
-+	nor_flash=$(find /sys/bus/spi/devices/*/mtd -name ${mtd_dev})
-+
-+	if [ -n "$nor_flash" ]; then
-+		ubootenv_size=$mtd_size
-+	else
-+		# size is fixed to 0x40000 in u-boot
-+		ubootenv_size=0x40000
-+	fi
-+
-+	sectors=$(( $ubootenv_size / $mtd_erase ))
-+	echo /dev/$mtd_dev 0x0 $ubootenv_size $mtd_erase $sectors
-+}
-+
-+case "$board" in
-+*)
-+	ubootenv_add_uci_config $(ubootenv_mtdinfo)
-+	;;
-+esac
-+
-+config_load ubootenv
-+config_foreach ubootenv_add_app_config ubootenv
-+
-+exit 0
-diff --git a/package/boot/uboot-envtools/files/ipq60xx b/package/boot/uboot-envtools/files/ipq60xx
-new file mode 100644
-index 0000000000..84ed73f288
---- /dev/null
-+++ b/package/boot/uboot-envtools/files/ipq60xx
-@@ -0,0 +1,37 @@
-+[ -e /etc/config/ubootenv ] && rm /etc/config/ubootenv
-+
-+touch /etc/config/ubootenv
-+
-+. /lib/uboot-envtools.sh
-+. /lib/functions.sh
-+
-+board=$(board_name)
-+
-+ubootenv_mtdinfo () {
-+	UBOOTENV_PART=$(cat /proc/mtd | grep APPSBLENV)
-+	mtd_dev=$(echo $UBOOTENV_PART | awk '{print $1}' | sed 's/:$//')
-+	mtd_size=$(echo $UBOOTENV_PART | awk '{print "0x"$2}')
-+	mtd_erase=$(echo $UBOOTENV_PART | awk '{print "0x"$3}')
-+	nor_flash=$(find /sys/bus/spi/devices/*/mtd -name ${mtd_dev})
-+
-+	if [ -n "$nor_flash" ]; then
-+		ubootenv_size=$mtd_size
-+	else
-+		# size is fixed to 0x40000 in u-boot
-+		ubootenv_size=0x40000
-+	fi
-+
-+	sectors=$(( $ubootenv_size / $mtd_erase ))
-+	echo /dev/$mtd_dev 0x0 $ubootenv_size $mtd_erase $sectors
-+}
-+
-+case "$board" in
-+*)
-+	ubootenv_add_uci_config $(ubootenv_mtdinfo)
-+	;;
-+esac
-+
-+config_load ubootenv
-+config_foreach ubootenv_add_app_config ubootenv
-+
-+exit 0
-diff --git a/package/boot/uboot-envtools/files/ipq807x b/package/boot/uboot-envtools/files/ipq807x
-new file mode 100644
-index 0000000000..84ed73f288
---- /dev/null
-+++ b/package/boot/uboot-envtools/files/ipq807x
-@@ -0,0 +1,37 @@
-+[ -e /etc/config/ubootenv ] && rm /etc/config/ubootenv
-+
-+touch /etc/config/ubootenv
-+
-+. /lib/uboot-envtools.sh
-+. /lib/functions.sh
-+
-+board=$(board_name)
-+
-+ubootenv_mtdinfo () {
-+	UBOOTENV_PART=$(cat /proc/mtd | grep APPSBLENV)
-+	mtd_dev=$(echo $UBOOTENV_PART | awk '{print $1}' | sed 's/:$//')
-+	mtd_size=$(echo $UBOOTENV_PART | awk '{print "0x"$2}')
-+	mtd_erase=$(echo $UBOOTENV_PART | awk '{print "0x"$3}')
-+	nor_flash=$(find /sys/bus/spi/devices/*/mtd -name ${mtd_dev})
-+
-+	if [ -n "$nor_flash" ]; then
-+		ubootenv_size=$mtd_size
-+	else
-+		# size is fixed to 0x40000 in u-boot
-+		ubootenv_size=0x40000
-+	fi
-+
-+	sectors=$(( $ubootenv_size / $mtd_erase ))
-+	echo /dev/$mtd_dev 0x0 $ubootenv_size $mtd_erase $sectors
-+}
-+
-+case "$board" in
-+*)
-+	ubootenv_add_uci_config $(ubootenv_mtdinfo)
-+	;;
-+esac
-+
-+config_load ubootenv
-+config_foreach ubootenv_add_app_config ubootenv
-+
-+exit 0
 diff --git a/package/kernel/linux/modules/can.mk b/package/kernel/linux/modules/can.mk
-index 3060fc0966..5542c4fe0a 100644
+index 4ff85d1c01..2248af4ad4 100644
 --- a/package/kernel/linux/modules/can.mk
 +++ b/package/kernel/linux/modules/can.mk
 @@ -248,7 +248,8 @@ define KernelPackage/can-usb-kvaser
@@ -511,31 +792,10 @@ index 3060fc0966..5542c4fe0a 100644
    $(call AddDepends/can,+kmod-usb-core)
  endef
 diff --git a/package/kernel/linux/modules/crypto.mk b/package/kernel/linux/modules/crypto.mk
-index b50ed06824..a68459d989 100644
+index 248b4d68f9..53dcd24444 100644
 --- a/package/kernel/linux/modules/crypto.mk
 +++ b/package/kernel/linux/modules/crypto.mk
-@@ -387,7 +387,7 @@ $(eval $(call KernelPackage,crypto-hw-padlock))
- 
- define KernelPackage/crypto-hw-safexcel
-   TITLE:= MVEBU SafeXcel Crypto Engine module
--  DEPENDS:=@(TARGET_mvebu_cortexa53||TARGET_mvebu_cortexa72) +eip197-mini-firmware \
-+  DEPENDS:=@!LINUX_4_14 @(TARGET_mvebu_cortexa53||TARGET_mvebu_cortexa72) +eip197-mini-firmware \
- 	+kmod-crypto-authenc +kmod-crypto-md5 +kmod-crypto-hmac +kmod-crypto-sha256 +kmod-crypto-sha512
-   KCONFIG:= \
- 	CONFIG_CRYPTO_HW=y \
-@@ -710,8 +710,10 @@ ifndef CONFIG_TARGET_x86_64
- 	$(LINUX_DIR)/arch/x86/crypto/twofish-i586.ko \
- 	$(LINUX_DIR)/arch/x86/crypto/serpent-sse2-i586.ko \
- 	$(LINUX_DIR)/arch/x86/crypto/glue_helper.ko \
-+	$(LINUX_DIR)/crypto/ablk_helper.ko@lt4.17 \
- 	$(LINUX_DIR)/crypto/cryptd.ko \
--	$(LINUX_DIR)/crypto/crypto_simd.ko
-+	$(LINUX_DIR)/crypto/lrw.ko@lt4.17 \
-+	$(LINUX_DIR)/crypto/crypto_simd.ko@ge4.17
-     AUTOLOAD+= $(call AutoLoad,10,cryptd glue_helper \
- 	serpent-sse2-i586 twofish-i586 blowfish_generic)
-   endef
-@@ -730,7 +732,8 @@ define KernelPackage/crypto-misc/x86/64
+@@ -756,7 +756,8 @@ define KernelPackage/crypto-misc/x86_64
  	$(LINUX_DIR)/arch/x86/crypto/twofish-avx-x86_64.ko \
  	$(LINUX_DIR)/arch/x86/crypto/serpent-avx-x86_64.ko \
  	$(LINUX_DIR)/arch/x86/crypto/camellia-aesni-avx2.ko \
@@ -546,7 +806,7 @@ index b50ed06824..a68459d989 100644
  	camellia-aesni-avx-x86_64 camellia-aesni-avx2 cast5-avx-x86_64 \
  	cast6-avx-x86_64 twofish-x86_64 twofish-x86_64-3way \
 diff --git a/package/kernel/linux/modules/fs.mk b/package/kernel/linux/modules/fs.mk
-index a0db14ecfe..ff9990c59d 100644
+index 1dddebfed7..28caaa3a64 100644
 --- a/package/kernel/linux/modules/fs.mk
 +++ b/package/kernel/linux/modules/fs.mk
 @@ -53,7 +53,8 @@ define KernelPackage/fs-autofs4
@@ -559,46 +819,11 @@ index a0db14ecfe..ff9990c59d 100644
    AUTOLOAD:=$(call AutoLoad,30,autofs4)
  endef
  
-diff --git a/package/kernel/linux/modules/iio.mk b/package/kernel/linux/modules/iio.mk
-index 7bfbd38079..0ea7ba8bdd 100644
---- a/package/kernel/linux/modules/iio.mk
-+++ b/package/kernel/linux/modules/iio.mk
-@@ -159,7 +159,7 @@ $(eval $(call KernelPackage,iio-dht11))
- define KernelPackage/iio-bme680
-   SUBMENU:=$(IIO_MENU)
-   TITLE:=BME680 gas/humidity/pressure/temperature sensor
--  DEPENDS:=+kmod-iio-core +kmod-regmap-core
-+  DEPENDS:=@!LINUX_4_14 +kmod-iio-core +kmod-regmap-core
-   KCONFIG:=CONFIG_BME680
-   FILES:=$(LINUX_DIR)/drivers/iio/chemical/bme680_core.ko
- endef
-@@ -414,7 +414,7 @@ $(eval $(call KernelPackage,iio-lsm6dsx-spi))
- 
- define KernelPackage/iio-sps30
-   SUBMENU:=$(IIO_MENU)
--  DEPENDS:=+kmod-i2c-core +kmod-iio-core +kmod-industrialio-triggered-buffer +kmod-lib-crc8
-+  DEPENDS:=@!LINUX_4_14 +kmod-i2c-core +kmod-iio-core +kmod-industrialio-triggered-buffer +kmod-lib-crc8
-   TITLE:=Sensirion SPS30 particulate matter sensor
-   KCONFIG:=CONFIG_SPS30
-   FILES:=$(LINUX_DIR)/drivers/iio/chemical/sps30.ko
-diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk
-index 5f7a80bf22..0df00feed5 100644
---- a/package/kernel/linux/modules/netdevices.mk
-+++ b/package/kernel/linux/modules/netdevices.mk
-@@ -543,7 +543,7 @@ $(eval $(call KernelPackage,8139cp))
- define KernelPackage/r8169
-   SUBMENU:=$(NETWORK_DEVICES_MENU)
-   TITLE:=RealTek RTL-8169 PCI Gigabit Ethernet Adapter kernel support
--  DEPENDS:=@PCI_SUPPORT +kmod-mii +r8169-firmware +kmod-phy-realtek
-+  DEPENDS:=@PCI_SUPPORT +kmod-mii +r8169-firmware +!LINUX_4_14:kmod-phy-realtek
-   KCONFIG:=CONFIG_R8169 \
-     CONFIG_R8169_NAPI=y \
-     CONFIG_R8169_VLAN=n
 diff --git a/package/kernel/linux/modules/netfilter.mk b/package/kernel/linux/modules/netfilter.mk
-index e2bb1d0681..1be05e182a 100644
+index 0d2f8a9140..38a6dd316f 100644
 --- a/package/kernel/linux/modules/netfilter.mk
 +++ b/package/kernel/linux/modules/netfilter.mk
-@@ -259,7 +259,7 @@ define KernelPackage/ipt-ipopt
+@@ -314,7 +314,7 @@ define KernelPackage/ipt-ipopt
    KCONFIG:=$(KCONFIG_IPT_IPOPT)
    FILES:=$(foreach mod,$(IPT_IPOPT-m),$(LINUX_DIR)/net/$(mod).ko)
    AUTOLOAD:=$(call AutoProbe,$(notdir $(IPT_IPOPT-m)))
@@ -607,7 +832,7 @@ index e2bb1d0681..1be05e182a 100644
  endef
  
  define KernelPackage/ipt-ipopt/description
-@@ -368,7 +368,7 @@ IPVS_MODULES:= \
+@@ -424,7 +424,7 @@ IPVS_MODULES:= \
  define KernelPackage/nf-ipvs
    SUBMENU:=Netfilter Extensions
    TITLE:=IP Virtual Server modules
@@ -616,25 +841,7 @@ index e2bb1d0681..1be05e182a 100644
    KCONFIG:= \
  	CONFIG_IP_VS \
  	CONFIG_IP_VS_IPV6=y \
-@@ -542,7 +542,7 @@ define KernelPackage/nf-nathelper-extra
-   KCONFIG:=$(KCONFIG_NF_NATHELPER_EXTRA)
-   FILES:=$(foreach mod,$(NF_NATHELPER_EXTRA-m),$(LINUX_DIR)/net/$(mod).ko)
-   AUTOLOAD:=$(call AutoProbe,$(notdir $(NF_NATHELPER_EXTRA-m)))
--  DEPENDS:=+kmod-nf-nat +kmod-lib-textsearch +kmod-ipt-raw +kmod-asn1-decoder
-+  DEPENDS:=+kmod-nf-nat +kmod-lib-textsearch +kmod-ipt-raw +!LINUX_4_14:kmod-asn1-decoder
- endef
- 
- define KernelPackage/nf-nathelper-extra/description
-@@ -1052,7 +1052,7 @@ $(eval $(call KernelPackage,ipt-rpfilter))
- define KernelPackage/nft-core
-   SUBMENU:=$(NF_MENU)
-   TITLE:=Netfilter nf_tables support
--  DEPENDS:=+kmod-nfnetlink +kmod-nf-reject +IPV6:kmod-nf-reject6 +IPV6:kmod-nf-conntrack6 +kmod-nf-nat +kmod-lib-crc32c
-+  DEPENDS:=+kmod-nfnetlink +kmod-nf-reject +IPV6:kmod-nf-reject6 +IPV6:kmod-nf-conntrack6 +kmod-lib-crc32c +LINUX_5_4:kmod-nf-nat +LINUX_5_10:kmod-nf-nat
-   FILES:=$(foreach mod,$(NFT_CORE-m),$(LINUX_DIR)/net/$(mod).ko)
-   AUTOLOAD:=$(call AutoProbe,$(notdir $(NFT_CORE-m)))
-   KCONFIG:= \
-@@ -1148,9 +1148,10 @@ define KernelPackage/nft-netdev
+@@ -1210,9 +1210,10 @@ define KernelPackage/nft-netdev
  	CONFIG_NFT_DUP_NETDEV \
  	CONFIG_NFT_FWD_NETDEV
    FILES:= \
@@ -649,19 +856,10 @@ index e2bb1d0681..1be05e182a 100644
  endef
  
 diff --git a/package/kernel/linux/modules/netsupport.mk b/package/kernel/linux/modules/netsupport.mk
-index 1eec9f9b63..4343e850e9 100644
+index 7f1905311f..4ee7ecf8d5 100644
 --- a/package/kernel/linux/modules/netsupport.mk
 +++ b/package/kernel/linux/modules/netsupport.mk
-@@ -375,7 +375,7 @@ $(eval $(call KernelPackage,ip6-vti))
- define KernelPackage/xfrm-interface
-   SUBMENU:=$(NETWORK_SUPPORT_MENU)
-   TITLE:=IPsec XFRM Interface
--  DEPENDS:=+kmod-ipsec4 +IPV6:kmod-ipsec6
-+  DEPENDS:=+kmod-ipsec4 +IPV6:kmod-ipsec6 @!LINUX_4_14
-   KCONFIG:=CONFIG_XFRM_INTERFACE
-   FILES:=$(LINUX_DIR)/net/xfrm/xfrm_interface.ko
-   AUTOLOAD:=$(call AutoProbe,xfrm_interface)
-@@ -765,7 +765,7 @@ $(eval $(call KernelPackage,sched-core))
+@@ -809,7 +809,7 @@ $(eval $(call KernelPackage,sched-bpf))
  define KernelPackage/sched-cake
    SUBMENU:=$(NETWORK_SUPPORT_MENU)
    TITLE:=Cake fq_codel/blue derived shaper
@@ -670,7 +868,7 @@ index 1eec9f9b63..4343e850e9 100644
    KCONFIG:=CONFIG_NET_SCH_CAKE
    FILES:=$(LINUX_DIR)/net/sched/sch_cake.ko
    AUTOLOAD:=$(call AutoProbe,sch_cake)
-@@ -1154,7 +1154,7 @@ $(eval $(call KernelPackage,rxrpc))
+@@ -1285,7 +1285,7 @@ $(eval $(call KernelPackage,rxrpc))
  define KernelPackage/mpls
    SUBMENU:=$(NETWORK_SUPPORT_MENU)
    TITLE:=MPLS support
@@ -680,38 +878,10 @@ index 1eec9f9b63..4343e850e9 100644
  	CONFIG_MPLS=y \
  	CONFIG_LWTUNNEL=y \
 diff --git a/package/kernel/linux/modules/other.mk b/package/kernel/linux/modules/other.mk
-index 83d998c83a..784adcb744 100644
+index cd827725bd..1d6b9dfe9a 100644
 --- a/package/kernel/linux/modules/other.mk
 +++ b/package/kernel/linux/modules/other.mk
-@@ -1006,10 +1006,26 @@ endef
- $(eval $(call KernelPackage,ptp))
- 
- 
-+define KernelPackage/ptp-gianfar
-+  SUBMENU:=$(OTHER_MENU)
-+  TITLE:=Freescale Gianfar PTP support
-+  DEPENDS:=@TARGET_mpc85xx +kmod-ptp @LINUX_4_14
-+  KCONFIG:=CONFIG_PTP_1588_CLOCK_GIANFAR
-+  FILES:=$(LINUX_DIR)/drivers/net/ethernet/freescale/gianfar_ptp.ko
-+  AUTOLOAD:=$(call AutoProbe,gianfar_ptp)
-+endef
-+
-+define KernelPackage/ptp-gianfar/description
-+ Kernel module for IEEE 1588 support for Freescale
-+ Gianfar Ethernet drivers
-+endef
-+
-+$(eval $(call KernelPackage,ptp-gianfar))
-+
- define KernelPackage/ptp-qoriq
-   SUBMENU:=$(OTHER_MENU)
-   TITLE:=Freescale QorIQ PTP support
--  DEPENDS:=@TARGET_mpc85xx +kmod-ptp
-+  DEPENDS:=@TARGET_mpc85xx +kmod-ptp @!LINUX_4_14
-   KCONFIG:=CONFIG_PTP_1588_CLOCK_QORIQ
-   FILES:=$(LINUX_DIR)/drivers/ptp/ptp-qoriq.ko
-   AUTOLOAD:=$(call AutoProbe,ptp-qoriq)
-@@ -1037,6 +1053,22 @@ endef
+@@ -1144,6 +1144,22 @@ endef
  $(eval $(call KernelPackage,random-core))
  
  
@@ -734,54 +904,11 @@ index 83d998c83a..784adcb744 100644
  define KernelPackage/thermal
    SUBMENU:=$(OTHER_MENU)
    TITLE:=Thermal driver
-@@ -1144,7 +1176,7 @@ $(eval $(call KernelPackage,keys-trusted))
- define KernelPackage/tpm
-   SUBMENU:=$(OTHER_MENU)
-   TITLE:=TPM Hardware Support
--  DEPENDS:= +kmod-random-core
-+  DEPENDS:= +!LINUX_4_14:kmod-random-core
-   KCONFIG:= CONFIG_TCG_TPM
-   FILES:= $(LINUX_DIR)/drivers/char/tpm/tpm.ko
-   AUTOLOAD:=$(call AutoLoad,10,tpm,1)
-diff --git a/package/kernel/linux/modules/usb.mk b/package/kernel/linux/modules/usb.mk
-index 4191590ba7..5530a18379 100644
---- a/package/kernel/linux/modules/usb.mk
-+++ b/package/kernel/linux/modules/usb.mk
-@@ -458,9 +458,28 @@ endef
- $(eval $(call KernelPackage,usb-dwc3))
- 
- 
-+define KernelPackage/usb-dwc3-of-simple
-+  TITLE:=DWC3 USB simple OF driver
-+  DEPENDS:=@!LINUX_4_19 @(TARGET_ipq40xx||TARGET_ipq806x||TARGET_ipq807x) +kmod-usb-dwc3
-+  KCONFIG:= CONFIG_USB_DWC3_OF_SIMPLE
-+  FILES:= $(LINUX_DIR)/drivers/usb/dwc3/dwc3-of-simple.ko \
-+            $(LINUX_DIR)/drivers/usb/dwc3/dbm.ko
-+  AUTOLOAD:=$(call AutoLoad,53,dwc3-of-simple,1)
-+  $(call AddDepends/usb)
-+endef
-+
-+define KernelPackage/usb-dwc3-of-simple/description
-+ This driver provides generic platform glue for the integrated DesignWare
-+ USB3 IP Core.
-+endef
-+
-+
-+$(eval $(call KernelPackage,usb-dwc3-of-simple))
-+
-+
- define KernelPackage/usb-dwc3-qcom
-   TITLE:=DWC3 Qualcomm USB driver
--  DEPENDS:=@(TARGET_ipq40xx||TARGET_ipq806x) +kmod-usb-dwc3
-+  DEPENDS:=@(!LINUX_4_14) @(TARGET_ipq40xx||TARGET_ipq806x) +kmod-usb-dwc3
-   KCONFIG:= CONFIG_USB_DWC3_QCOM
-   FILES:= $(LINUX_DIR)/drivers/usb/dwc3/dwc3-qcom.ko
-   AUTOLOAD:=$(call AutoLoad,53,dwc3-qcom,1)
 diff --git a/package/kernel/linux/modules/video.mk b/package/kernel/linux/modules/video.mk
-index c71f0760a6..a50fdad57e 100644
+index f1e61f33a5..470d351b80 100644
 --- a/package/kernel/linux/modules/video.mk
 +++ b/package/kernel/linux/modules/video.mk
-@@ -229,7 +229,7 @@ define KernelPackage/drm
+@@ -230,7 +230,7 @@ define KernelPackage/drm
    KCONFIG:=CONFIG_DRM
    FILES:= \
  	$(LINUX_DIR)/drivers/gpu/drm/drm.ko \
@@ -790,7 +917,7 @@ index c71f0760a6..a50fdad57e 100644
    AUTOLOAD:=$(call AutoLoad,05,drm)
  endef
  
-@@ -437,10 +437,14 @@ define KernelPackage/video-videobuf2
+@@ -447,10 +447,14 @@ define KernelPackage/video-videobuf2
  	CONFIG_VIDEOBUF2_MEMOPS \
  	CONFIG_VIDEOBUF2_VMALLOC
    FILES:= \
@@ -809,7 +936,7 @@ index c71f0760a6..a50fdad57e 100644
    AUTOLOAD:=$(call AutoLoad,65,videobuf2-core videobuf-v4l2 videobuf2-memops videobuf2-vmalloc)
    $(call AddDepends/video)
  endef
-@@ -505,7 +509,7 @@ $(eval $(call KernelPackage,video-uvc))
+@@ -515,7 +519,7 @@ $(eval $(call KernelPackage,video-uvc))
  define KernelPackage/video-gspca-core
    MENU:=1
    TITLE:=GSPCA webcam core support framework
@@ -11813,51 +11940,23 @@ index 0000000000..e5e20c39cd
 +# CONFIG_QTI_BT_INTERFACE is not set
 +CONFIG_NF_CONNTRACK_DSCPREMARK_EXT=y
 +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
-diff --git a/toolchain/gcc/Config.in b/toolchain/gcc/Config.in
-index 1aadae6839..957ea28940 100644
---- a/toolchain/gcc/Config.in
-+++ b/toolchain/gcc/Config.in
-@@ -3,6 +3,7 @@
- choice
- 	prompt "GCC compiler Version" if TOOLCHAINOPTS
- 	default GCC_USE_VERSION_8
-+	default GCC_USE_VERSION_5 if LINUX_4_4
- 	help
- 	  Select the version of gcc you wish to use.
- 
-@@ -13,15 +14,19 @@ choice
- 	config GCC_USE_VERSION_7
- 		bool "gcc 7.x"
- 		depends on !arc
-+		depends on !LINUX_4_4
- 
- 	config GCC_USE_VERSION_8
- 		bool "gcc 8.x"
-+		depends on !LINUX_4_4
- 
- 	config GCC_USE_VERSION_9
- 		bool "gcc 9.x"
-+		depends on !LINUX_4_4
- 
- 	config GCC_USE_VERSION_10
- 		bool "gcc 10.x"
-+		depends on !LINUX_4_4
- endchoice
- 
- config GCC_USE_GRAPHITE
-diff --git a/toolchain/gcc/Config.version b/toolchain/gcc/Config.version
-index 09deae3bf1..d9c65d6a5b 100644
---- a/toolchain/gcc/Config.version
-+++ b/toolchain/gcc/Config.version
-@@ -1,5 +1,6 @@
- config GCC_VERSION_5
- 	default y if GCC_USE_VERSION_5
-+	default y if LINUX_4_4
- 	bool
- 
- config GCC_VERSION_7
+diff --git a/toolchain/gcc/common.mk b/toolchain/gcc/common.mk
+index 00c908dd60..3baf70b151 100644
+--- a/toolchain/gcc/common.mk
++++ b/toolchain/gcc/common.mk
+@@ -200,7 +200,9 @@ ifeq ($(GCC_MAJOR_VERSION),11)
+ else
+ 	GCC_VERSION_FILE:=gcc/genversion.cc
+ endif
+-
++ifeq ($(GCC_MAJOR_VERSION),5)
++	GCC_VERSION_FILE:=gcc/version.c
++endif
+ ifneq ($(GCC_PREPARE),)
+   define Host/Prepare
+ 	$(call Host/SetToolchainInfo)
 diff --git a/toolchain/kernel-headers/Makefile b/toolchain/kernel-headers/Makefile
-index eea0ffbde0..3bd0bfc266 100644
+index eea0ffbde0..faea9afab4 100644
 --- a/toolchain/kernel-headers/Makefile
 +++ b/toolchain/kernel-headers/Makefile
 @@ -14,6 +14,17 @@ override HOST_QUILT:=
@@ -11865,7 +11964,7 @@ index eea0ffbde0..3bd0bfc266 100644
  include $(INCLUDE_DIR)/kernel.mk
  
 +# TIP
-+KERNEL_PATCHVER := 5.10
++KERNEL_PATCHVER := 5.15
 +KERNEL_NAME_SUFFIX:=
 +GENERIC_BACKPORT_DIR := $(GENERIC_PLATFORM_DIR)/backport$(if $(wildcard $(GENERIC_PLATFORM_DIR)/backport-$(KERNEL_PATCHVER)),-$(KERNEL_PATCHVER))
 +GENERIC_PATCH_DIR := $(GENERIC_PLATFORM_DIR)/pending$(if $(wildcard $(GENERIC_PLATFORM_DIR)/pending-$(KERNEL_PATCHVER)),-$(KERNEL_PATCHVER))
diff --git a/patches/0039-ipq807x-drop-upstream-target.patch b/patches/0039-ipq807x-drop-upstream-target.patch
new file mode 100644
index 000000000..302d7d5ba
--- /dev/null
+++ b/patches/0039-ipq807x-drop-upstream-target.patch
@@ -0,0 +1,31098 @@
+From 2a47e049084cd27d3277056d488329f4d4c9cd4b Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Sat, 15 Jul 2023 16:11:53 +0200
+Subject: [PATCH 39/43] ipq807x: drop upstream target
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ target/linux/ipq807x/Makefile                 |    22 -
+ .../ipq807x/base-files/etc/board.d/01_leds    |    33 -
+ .../ipq807x/base-files/etc/board.d/02_network |    52 -
+ .../etc/hotplug.d/firmware/11-ath11k-caldata  |    43 -
+ .../ipq807x/base-files/etc/init.d/bootcount   |    13 -
+ .../ipq807x/base-files/lib/upgrade/buffalo.sh |    55 -
+ .../ipq807x/base-files/lib/upgrade/mmc.sh     |    83 -
+ .../base-files/lib/upgrade/platform.sh        |   116 -
+ target/linux/ipq807x/config-5.15              |   509 -
+ .../arm64/boot/dts/qcom/ipq8070-cax1800.dts   |   322 -
+ .../arm64/boot/dts/qcom/ipq8071-ax3600.dts    |    73 -
+ .../arm64/boot/dts/qcom/ipq8071-ax3600.dtsi   |   311 -
+ .../arch/arm64/boot/dts/qcom/ipq8071-ax6.dts  |    46 -
+ .../arm64/boot/dts/qcom/ipq8071-eap102.dts    |   389 -
+ .../arch/arm64/boot/dts/qcom/ipq8072-301w.dts |   410 -
+ .../arm64/boot/dts/qcom/ipq8072-ax9000.dts    |   522 -
+ .../arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts  |   243 -
+ .../arch/arm64/boot/dts/qcom/ipq8072-haze.dts |   308 -
+ .../arm64/boot/dts/qcom/ipq8072-wax218.dts    |   191 -
+ .../arm64/boot/dts/qcom/ipq8074-512m.dtsi     |    19 -
+ .../arm64/boot/dts/qcom/ipq8074-ac-cpu.dtsi   |   153 -
+ .../boot/dts/qcom/ipq8074-cpr-regulator.dtsi  |   228 -
+ .../arch/arm64/boot/dts/qcom/ipq8074-ess.dtsi |   531 -
+ .../arm64/boot/dts/qcom/ipq8074-hk-cpu.dtsi   |   218 -
+ .../arm64/boot/dts/qcom/ipq8074-nbg7815.dts   |   445 -
+ .../boot/dts/qcom/ipq8074-wxr-5950ax12.dts    |   376 -
+ target/linux/ipq807x/generic/target.mk        |     1 -
+ target/linux/ipq807x/image/Makefile           |    17 -
+ target/linux/ipq807x/image/generic.mk         |   175 -
+ ...-arm64-dts-qcom-ipq8074-add-SPMI-bus.patch |    43 -
+ ...pdate-BAM-DMA-node-name-per-DT-schem.patch |    26 -
+ ...4-dts-qcom-ipq8074-Add-QUP5-I2C-node.patch |    40 -
+ ...sm8996-Move-clock-cells-to-QMP-PHY-c.patch |    53 -
+ ...-arm64-dts-qcom-ipq8074-add-MDIO-bus.patch |    36 -
+ ...64-dts-qcom-ipq8074-add-SMEM-support.patch |    51 -
+ ...ipq8074-add-the-reserved-memory-node.patch |    30 -
+ ...om-ipq8074-enable-the-GICv2m-support.patch |    36 -
+ ...pq8074-drop-the-clock-frequency-prop.patch |    25 -
+ ...lign-dmas-in-I2C-SPI-UART-with-DT-sc.patch |    61 -
+ ...lign-clocks-in-I2C-SPI-with-DT-schem.patch |    68 -
+ ...orrect-DWC3-node-names-and-unit-addr.patch |    36 -
+ ...pq8074-add-dedicated-qcom-ipq8074-dw.patch |    36 -
+ ...align-DWC3-USB-clocks-with-DT-schema.patch |    39 -
+ ...64-dts-qcom-adjust-whitespace-around.patch |    36 -
+ ...ts-qcom-Fix-sdhci-node-names-use-mmc.patch |    34 -
+ ...ix-ordering-of-clocks-clock-names-fo.patch |    47 -
+ ...ck-qcom-ipq8074-add-PPE-crypto-clock.patch |    25 -
+ ...lk-qcom-ipq8074-add-PPE-crypto-clock.patch |    52 -
+ ...ngs-clock-qcom-ipq8074-add-USB-GDSCs.patch |    25 -
+ ...-v6.0-clk-qcom-ipq8074-add-USB-GDSCs.patch |    79 -
+ ...s-qcom-ipq8074-add-USB-power-domains.patch |    43 -
+ ...pq8074-move-ARMv8-timer-out-of-SoC-n.patch |    50 -
+ ...-dts-qcom-ipq8074-add-reset-to-SDHCI.patch |    27 -
+ ...com-ipq8074-drop-USB-PHY-clock-index.patch |    36 -
+ ...s-ipc-Consolidate-msm8994-type-apcs_.patch |    74 -
+ ...s-ipc-add-IPQ8074-APSS-clock-support.patch |    30 -
+ ...arm64-dts-qcom-ipq8074-add-APCS-node.patch |    37 -
+ ...pq8074-add-size-address-cells-to-DTS.patch |    54 -
+ ...ipq8074-add-interrupt-parent-to-DTSI.patch |    50 -
+ ...align-SDHCI-reg-names-with-DT-schema.patch |    28 -
+ ...q-pll-use-OF-match-data-for-Alpha-PL.patch |    70 -
+ ...q-pll-update-IPQ6018-Alpha-PLL-confi.patch |    40 -
+ ...apss-ipq-pll-add-support-for-IPQ8074.patch |    47 -
+ ...1-clk-qcom-clk-rcg2-add-rcg2-mux-ops.patch |    51 -
+ ...apss-ipq6018-fix-apcs_alias0_clk_src.patch |    63 -
+ ...64-dts-qcom-ipq8074-add-A53-PLL-node.patch |    32 -
+ ...pq8074-correct-APCS-register-space-s.patch |    32 -
+ ...tsens-Add-support-for-combined-inter.patch |   134 -
+ ...tsens-Allow-configuring-min-and-max-.patch |   101 -
+ ...al-drivers-tsens-Add-IPQ8074-support.patch |    74 -
+ ...4-dts-qcom-ipq8074-add-thermal-nodes.patch |   130 -
+ ...-dts-qcom-ipq8074-add-clocks-to-APCS.patch |    29 -
+ ...-qcom-ipq8074-convert-to-parent-data.patch |  3601 -----
+ ...-Allow-specifying-custom-reset-delay.patch |    54 -
+ ...eset-support-resetting-multiple-bits.patch |    59 -
+ ...k-qcom-ipq8074-add-missing-networkin.patch |    39 -
+ ...pq8074-add-missing-networking-resets.patch |    41 -
+ ...074-populate-fw_name-for-all-parents.patch |   152 -
+ ...pq8074-pass-XO-and-sleep-clocks-to-G.patch |    36 -
+ ...eplace-deprecated-perst-gpio-with-pe.patch |    52 -
+ ...r-to-look-up-an-SPMI-device-from-a-d.patch |    57 -
+ ...-pmic-Sort-compatibles-in-the-driver.patch |    60 -
+ ...ic-Add-missing-PMICs-supported-by-so.patch |    65 -
+ ...ic-expose-the-PMIC-revid-information.patch |   417 -
+ ...-pmic-read-fab-id-on-supported-PMICs.patch |    52 -
+ ...om-spmi-pmic-Add-support-for-PMP8074.patch |    27 -
+ ...or-qcom_spmi-add-support-for-HT_P150.patch |    58 -
+ ...or-qcom_spmi-add-support-for-HT_P600.patch |    59 -
+ ...pmi-add-support-for-PMP8074-regulato.patch |    68 -
+ ...om-pmic-gpio-add-support-for-PMP8074.patch |    25 -
+ ...i-adc5-add-ADC5_VREF_VADC-to-rev2-AD.patch |    26 -
+ ...v6.2-arm64-dts-qcom-add-PMP8074-DTSI.patch |   149 -
+ ...s-qcom-ipq8074-hk01-add-VQMMC-supply.patch |    37 -
+ ...ts-qcom-hk01-use-GPIO-flags-for-tlmm.patch |    42 -
+ ...m64-dts-qcom-ipq8074-Fix-up-comments.patch |    82 -
+ ...pq8074-align-TLMM-pin-configuration-.patch |    60 -
+ ...qcom-socinfo-Add-IPQ8074-family-ID-s.patch |    50 -
+ ...ie-make-pipe-clock-rate-configurable.patch |    47 -
+ ...e-add-IPQ8074-PCIe-Gen3-QMP-PHY-supp.patch |   200 -
+ ...3_RELATED-DBI-definitions-to-common-.patch |    46 -
+ ...slot-capabilities-using-PCI_EXP_SLTC.patch |    51 -
+ ...-ops-with-struct-pcie_cfg-in-pcie-ma.patch |   122 -
+ ...77-v6.0-PCI-qcom-Add-IPQ60xx-support.patch |   220 -
+ ...che-CFG-register-updates-for-parked-.patch |   288 -
+ ...qcom-document-qcom-msm-id-and-qcom-b.patch |   207 -
+ ...2-introduce-support-for-multiple-con.patch |   203 -
+ ...8074-rework-nss_port5-6-clock-to-mul.patch |   129 -
+ ...ts-ipq8074-add-reserved-memory-nodes.patch |    70 -
+ ...pq8074-set-Gen2-PCIe-pcie-max-link-s.patch |    24 -
+ ...om-Add-support-for-IPQ8074-Gen3-port.patch |    23 -
+ ...pq8074-pass-QMP-PCI-PHY-PIPE-clocks-.patch |    30 -
+ ...qcom-ipq8074-use-msi-parent-for-PCIe.patch |    43 -
+ ...remoteproc-qcom-Add-PRNG-proxy-clock.patch |   155 -
+ ...moteproc-qcom-Add-secure-PIL-support.patch |   143 -
+ ...Add-support-for-split-q6-m3-wlan-fir.patch |   103 -
+ ...oc-qcom-Add-ssr-subdevice-identifier.patch |    24 -
+ ...Update-regmap-offsets-for-halt-regis.patch |    79 -
+ ...ngs-clock-qcom-Add-reset-for-WCSSAON.patch |    26 -
+ .../0118-clk-qcom-Add-WCSSAON-reset.patch     |    25 -
+ ...c-wcss-disable-auto-boot-for-IPQ8074.patch |    48 -
+ ...com-Enable-Q6v5-WCSS-for-ipq8074-SoC.patch |   120 -
+ ...0121-arm64-dts-ipq8074-Add-WLAN-node.patch |   135 -
+ ...0122-arm64-dts-ipq8074-add-CPU-clock.patch |    59 -
+ ...q8074-add-cooling-cells-to-CPU-nodes.patch |    48 -
+ ...-move-SMEM-item-struct-and-defines-t.patch |   168 -
+ ...nvmem-reuse-socinfo-SMEM-item-struct.patch |    50 -
+ ...com-nvmem-use-SoC-ID-s-from-bindings.patch |    46 -
+ ...em-make-qcom_cpufreq_get_msm_id-retu.patch |   106 -
+ ...q-qcom-nvmem-add-support-for-IPQ8074.patch |   100 -
+ ...64-dts-qcom-ipq8074-add-QFPROM-fuses.patch |   128 -
+ ...4-dts-qcom-ipq8074-add-CPU-OPP-table.patch |   102 -
+ ...q8074-populate-fw_name-for-usb3phy-s.patch |    38 -
+ .../0900-power-Add-Qualcomm-APM.patch         |  1047 --
+ ...egulator-add-Qualcomm-CPR-regulators.patch | 12147 ----------------
+ ...rm64-dts-ipq8074-add-label-to-clocks.patch |    24 -
+ 135 files changed, 30006 deletions(-)
+ delete mode 100644 target/linux/ipq807x/Makefile
+ delete mode 100644 target/linux/ipq807x/base-files/etc/board.d/01_leds
+ delete mode 100644 target/linux/ipq807x/base-files/etc/board.d/02_network
+ delete mode 100644 target/linux/ipq807x/base-files/etc/hotplug.d/firmware/11-ath11k-caldata
+ delete mode 100755 target/linux/ipq807x/base-files/etc/init.d/bootcount
+ delete mode 100644 target/linux/ipq807x/base-files/lib/upgrade/buffalo.sh
+ delete mode 100644 target/linux/ipq807x/base-files/lib/upgrade/mmc.sh
+ delete mode 100644 target/linux/ipq807x/base-files/lib/upgrade/platform.sh
+ delete mode 100644 target/linux/ipq807x/config-5.15
+ delete mode 100644 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8070-cax1800.dts
+ delete mode 100644 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dts
+ delete mode 100644 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dtsi
+ delete mode 100644 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax6.dts
+ delete mode 100644 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-eap102.dts
+ delete mode 100644 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-301w.dts
+ delete mode 100644 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts
+ delete mode 100644 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts
+ delete mode 100644 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-haze.dts
+ delete mode 100644 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-wax218.dts
+ delete mode 100644 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-512m.dtsi
+ delete mode 100644 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-ac-cpu.dtsi
+ delete mode 100644 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-cpr-regulator.dtsi
+ delete mode 100644 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-ess.dtsi
+ delete mode 100644 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-hk-cpu.dtsi
+ delete mode 100644 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-nbg7815.dts
+ delete mode 100644 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-wxr-5950ax12.dts
+ delete mode 100644 target/linux/ipq807x/generic/target.mk
+ delete mode 100644 target/linux/ipq807x/image/Makefile
+ delete mode 100644 target/linux/ipq807x/image/generic.mk
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0001-v5.16-arm64-dts-qcom-ipq8074-add-SPMI-bus.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0002-v5.16-arm64-dts-qcom-Update-BAM-DMA-node-name-per-DT-schem.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0003-v5.16-arm64-dts-qcom-ipq8074-Add-QUP5-I2C-node.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0004-v5.16-arm64-dts-qcom-msm8996-Move-clock-cells-to-QMP-PHY-c.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0007-v5.17-arm64-dts-qcom-ipq8074-add-MDIO-bus.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0008-v5.18-arm64-dts-qcom-ipq8074-add-SMEM-support.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0009-v5.18-arm64-dts-qcom-ipq8074-add-the-reserved-memory-node.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0010-v5.18-arm64-dts-qcom-ipq8074-enable-the-GICv2m-support.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0011-v5.18-arm64-dts-qcom-ipq8074-drop-the-clock-frequency-prop.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0012-v5.19-arm64-dts-qcom-align-dmas-in-I2C-SPI-UART-with-DT-sc.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0013-v5.19-arm64-dts-qcom-align-clocks-in-I2C-SPI-with-DT-schem.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0014-v5.19-arm64-dts-qcom-correct-DWC3-node-names-and-unit-addr.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0015-v5.19-arm64-dts-qcom-ipq8074-add-dedicated-qcom-ipq8074-dw.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0016-v5.19-arm64-dts-qcom-align-DWC3-USB-clocks-with-DT-schema.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0017-v6.0-arm64-dts-qcom-adjust-whitespace-around.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0018-v6.0-arm64-dts-qcom-Fix-sdhci-node-names-use-mmc.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0019-v6.0-arm64-dts-qcom-Fix-ordering-of-clocks-clock-names-fo.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0020-v6.0-dt-bindings-clock-qcom-ipq8074-add-PPE-crypto-clock.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0021-v6.0-clk-qcom-ipq8074-add-PPE-crypto-clock.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0022-v6.0-dt-bindings-clock-qcom-ipq8074-add-USB-GDSCs.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0023-v6.0-clk-qcom-ipq8074-add-USB-GDSCs.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0024-v6.0-arm64-dts-qcom-ipq8074-add-USB-power-domains.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0025-v6.0-arm64-dts-qcom-ipq8074-move-ARMv8-timer-out-of-SoC-n.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0026-v6.0-arm64-dts-qcom-ipq8074-add-reset-to-SDHCI.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0027-v6.0-arm64-dts-qcom-ipq8074-drop-USB-PHY-clock-index.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0028-v5.16-mailbox-qcom-apcs-ipc-Consolidate-msm8994-type-apcs_.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0029-v6.1-mailbox-qcom-apcs-ipc-add-IPQ8074-APSS-clock-support.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0030-v6.0-arm64-dts-qcom-ipq8074-add-APCS-node.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0031-v6.0-arm64-dts-qcom-ipq8074-add-size-address-cells-to-DTS.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0032-v6.0-arm64-dts-qcom-ipq8074-add-interrupt-parent-to-DTSI.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0033-v6.1-arm64-dts-qcom-align-SDHCI-reg-names-with-DT-schema.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0035-v6.1-clk-qcom-apss-ipq-pll-use-OF-match-data-for-Alpha-PL.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0036-v6.1-clk-qcom-apss-ipq-pll-update-IPQ6018-Alpha-PLL-confi.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0037-v6.1-clk-qcom-apss-ipq-pll-add-support-for-IPQ8074.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0038-v6.1-clk-qcom-clk-rcg2-add-rcg2-mux-ops.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0039-v6.1-clk-qcom-apss-ipq6018-fix-apcs_alias0_clk_src.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0040-v6.2-arm64-dts-qcom-ipq8074-add-A53-PLL-node.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0041-v6.1-arm64-dts-qcom-ipq8074-correct-APCS-register-space-s.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0042-v6.2-thermal-drivers-tsens-Add-support-for-combined-inter.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0043-v6.2-thermal-drivers-tsens-Allow-configuring-min-and-max-.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0044-v6.2-thermal-drivers-tsens-Add-IPQ8074-support.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0045-v6.2-arm64-dts-qcom-ipq8074-add-thermal-nodes.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0046-v6.2-arm64-dts-qcom-ipq8074-add-clocks-to-APCS.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0047-v6.2-clk-qcom-ipq8074-convert-to-parent-data.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0048-v6.1-clk-qcom-reset-Allow-specifying-custom-reset-delay.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0049-v6.2-clk-qcom-reset-support-resetting-multiple-bits.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0050-v6.2-dt-bindings-clock-qcom-ipq8074-add-missing-networkin.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0051-v6.2-clk-qcom-ipq8074-add-missing-networking-resets.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0052-v6.2-clk-qcom-ipq8074-populate-fw_name-for-all-parents.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0053-v6.2-arm64-dts-qcom-ipq8074-pass-XO-and-sleep-clocks-to-G.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0054-v6.1-arm64-dts-qcom-replace-deprecated-perst-gpio-with-pe.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0055-v6.0-spmi-add-a-helper-to-look-up-an-SPMI-device-from-a-d.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0056-v5.16-mfd-qcom-spmi-pmic-Sort-compatibles-in-the-driver.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0057-v5.16-mfd-qcom-spmi-pmic-Add-missing-PMICs-supported-by-so.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0058-v6.0-mfd-qcom-spmi-pmic-expose-the-PMIC-revid-information.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0059-v6.0-mfd-qcom-spmi-pmic-read-fab-id-on-supported-PMICs.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0060-v6.1-mfd-qcom-spmi-pmic-Add-support-for-PMP8074.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0061-v6.0-regulator-qcom_spmi-add-support-for-HT_P150.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0062-v6.0-regulator-qcom_spmi-add-support-for-HT_P600.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0063-v6.0-regulator-qcom_spmi-add-support-for-PMP8074-regulato.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0064-v6.0-pinctrl-qcom-pmic-gpio-add-support-for-PMP8074.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0065-v6.1-iio-adc-qcom-spmi-adc5-add-ADC5_VREF_VADC-to-rev2-AD.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0066-v6.2-arm64-dts-qcom-add-PMP8074-DTSI.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0067-v6.2-arm64-dts-qcom-ipq8074-hk01-add-VQMMC-supply.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0068-v6.2-arm64-dts-qcom-hk01-use-GPIO-flags-for-tlmm.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0069-v6.2-arm64-dts-qcom-ipq8074-Fix-up-comments.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0070-v6.2-arm64-dts-qcom-ipq8074-align-TLMM-pin-configuration-.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0071-v5.16-soc-qcom-socinfo-Add-IPQ8074-family-ID-s.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0072-v6.0-phy-qcom-qmp-pcie-make-pipe-clock-rate-configurable.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0073-v6.0-phy-qcom-qmp-pcie-add-IPQ8074-PCIe-Gen3-QMP-PHY-supp.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0074-v6.0-PCI-dwc-Move-GEN3_RELATED-DBI-definitions-to-common-.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0075-v6.0-PCI-qcom-Define-slot-capabilities-using-PCI_EXP_SLTC.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0076-v5.16-PCI-qcom-Replace-ops-with-struct-pcie_cfg-in-pcie-ma.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0077-v6.0-PCI-qcom-Add-IPQ60xx-support.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0078-v5.19-clk-qcom-rcg2-Cache-CFG-register-updates-for-parked-.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0079-v6.2-dt-bindings-arm-qcom-document-qcom-msm-id-and-qcom-b.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0100-clk-qcom-clk-rcg2-introduce-support-for-multiple-con.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0101-clk-qcom-gcc-ipq8074-rework-nss_port5-6-clock-to-mul.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0102-arm64-dts-ipq8074-add-reserved-memory-nodes.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0106-arm64-dts-qcom-ipq8074-set-Gen2-PCIe-pcie-max-link-s.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0107-PCI-qcom-Add-support-for-IPQ8074-Gen3-port.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0110-arm64-dts-qcom-ipq8074-pass-QMP-PCI-PHY-PIPE-clocks-.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0111-arm64-dts-qcom-ipq8074-use-msi-parent-for-PCIe.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0112-remoteproc-qcom-Add-PRNG-proxy-clock.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0113-remoteproc-qcom-Add-secure-PIL-support.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0114-remoteproc-qcom-Add-support-for-split-q6-m3-wlan-fir.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0115-remoteproc-qcom-Add-ssr-subdevice-identifier.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0116-remoteproc-qcom-Update-regmap-offsets-for-halt-regis.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0117-dt-bindings-clock-qcom-Add-reset-for-WCSSAON.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0118-clk-qcom-Add-WCSSAON-reset.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0119-remoteproc-wcss-disable-auto-boot-for-IPQ8074.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0120-arm64-dts-qcom-Enable-Q6v5-WCSS-for-ipq8074-SoC.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0121-arm64-dts-ipq8074-Add-WLAN-node.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0122-arm64-dts-ipq8074-add-CPU-clock.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0123-arm64-dts-ipq8074-add-cooling-cells-to-CPU-nodes.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0124-soc-qcom-socinfo-move-SMEM-item-struct-and-defines-t.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0125-cpufreq-qcom-nvmem-reuse-socinfo-SMEM-item-struct.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0126-cpufreq-qcom-nvmem-use-SoC-ID-s-from-bindings.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0127-cpufreq-qcom-nvmem-make-qcom_cpufreq_get_msm_id-retu.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0128-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0129-arm64-dts-qcom-ipq8074-add-QFPROM-fuses.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0130-arm64-dts-qcom-ipq8074-add-CPU-OPP-table.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0131-clk-qcom-ipq8074-populate-fw_name-for-usb3phy-s.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0900-power-Add-Qualcomm-APM.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0901-regulator-add-Qualcomm-CPR-regulators.patch
+ delete mode 100644 target/linux/ipq807x/patches-5.15/0902-arm64-dts-ipq8074-add-label-to-clocks.patch
+
+diff --git a/target/linux/ipq807x/Makefile b/target/linux/ipq807x/Makefile
+deleted file mode 100644
+index f423acd76c..0000000000
+--- a/target/linux/ipq807x/Makefile
++++ /dev/null
+@@ -1,22 +0,0 @@
+-include $(TOPDIR)/rules.mk
+-
+-ARCH:=aarch64
+-BOARD:=ipq807x
+-BOARDNAME:=Qualcomm Atheros IPQ807x
+-FEATURES:=squashfs ramdisk fpu nand rtc emmc
+-KERNELNAME:=Image dtbs
+-CPU_TYPE:=cortex-a53
+-SUBTARGETS:=generic
+-
+-KERNEL_PATCHVER:=5.15
+-
+-include $(INCLUDE_DIR)/target.mk
+-DEFAULT_PACKAGES += \
+-	kmod-usb3 kmod-usb-dwc3 kmod-usb-dwc3-qcom \
+-	kmod-leds-gpio kmod-gpio-button-hotplug \
+-	kmod-phy-aquantia kmod-qca-nss-dp \
+-	ath11k-firmware-ipq8074 kmod-ath11k-ahb \
+-	wpad-basic-mbedtls uboot-envtools \
+-	e2fsprogs kmod-fs-ext4 losetup
+-
+-$(eval $(call BuildTarget))
+diff --git a/target/linux/ipq807x/base-files/etc/board.d/01_leds b/target/linux/ipq807x/base-files/etc/board.d/01_leds
+deleted file mode 100644
+index a89b4c1564..0000000000
+--- a/target/linux/ipq807x/base-files/etc/board.d/01_leds
++++ /dev/null
+@@ -1,33 +0,0 @@
+-
+-. /lib/functions/uci-defaults.sh
+-
+-board_config_update
+-
+-board=$(board_name)
+-
+-case "$board" in
+-edgecore,eap102)
+-	ucidef_set_led_netdev "wan" "WAN" "green:wanpoe" "wan"
+-	;;
+-netgear,wax218)
+-	ucidef_set_led_netdev "lan" "LAN" "blue:lan" "lan"
+-	ucidef_set_led_wlan "wlan5g" "WIFI 5GHz" "blue:wlan5g" "phy0radio"
+-	ucidef_set_led_wlan "wlan2g" "WIFI 2.4GHz" "blue:wlan2g" "phy1radio"
+-	;;
+-redmi,ax6|\
+-xiaomi,ax3600)
+-	ucidef_set_led_netdev "wan" "WAN" "blue:network" "wan"
+-	;;
+-qnap,301w)
+-	ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "lan1"
+-	ucidef_set_led_netdev "lan2" "LAN2" "green:lan2" "lan2"
+-	ucidef_set_led_netdev "lan3" "LAN3" "green:lan3" "lan3"
+-	ucidef_set_led_netdev "lan4" "LAN4" "green:lan4" "lan4"
+-	ucidef_set_led_netdev "10G_1" "10G_1" "green:10g_1" "10g-1"
+-	ucidef_set_led_netdev "10G_2" "10G_2" "green:10g_2" "10g-2"
+-	;;
+-esac
+-
+-board_config_flush
+-
+-exit 0
+diff --git a/target/linux/ipq807x/base-files/etc/board.d/02_network b/target/linux/ipq807x/base-files/etc/board.d/02_network
+deleted file mode 100644
+index 21364337fb..0000000000
+--- a/target/linux/ipq807x/base-files/etc/board.d/02_network
++++ /dev/null
+@@ -1,52 +0,0 @@
+-#
+-# Copyright (c) 2015 The Linux Foundation. All rights reserved.
+-# Copyright (c) 2011-2015 OpenWrt.org
+-#
+-
+-. /lib/functions/uci-defaults.sh
+-. /lib/functions/system.sh
+-
+-ipq807x_setup_interfaces()
+-{
+-	local board="$1"
+-
+-	case "$board" in
+-	buffalo,wxr-5950ax12|\
+-	dynalink,dl-wrx36|\
+-	xiaomi,ax9000)
+-		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
+-		;;
+-	edgecore,eap102)
+-		ucidef_set_interfaces_lan_wan "lan" "wan"
+-		;;
+-	edimax,cax1800)
+-		ucidef_set_interfaces_lan_wan "lan"
+-		;;
+-	netgear,wax218)
+-		ucidef_set_interface_lan "lan" "dhcp"
+-		;;
+-	prpl,haze)
+-		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
+-		;;
+-	qnap,301w)
+-		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 10g-2" "10g-1"
+-		;;
+-	redmi,ax6|\
+-	xiaomi,ax3600)
+-		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
+-		;;
+-	zyxel,nbg7815)
+-		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 10g" "wan"
+-		;;
+-	*)
+-		echo "Unsupported hardware. Network interfaces not initialized"
+-		;;
+-	esac
+-}
+-
+-board_config_update
+-board=$(board_name)
+-ipq807x_setup_interfaces $board
+-board_config_flush
+-
+-exit 0
+diff --git a/target/linux/ipq807x/base-files/etc/hotplug.d/firmware/11-ath11k-caldata b/target/linux/ipq807x/base-files/etc/hotplug.d/firmware/11-ath11k-caldata
+deleted file mode 100644
+index 13cb07477e..0000000000
+--- a/target/linux/ipq807x/base-files/etc/hotplug.d/firmware/11-ath11k-caldata
++++ /dev/null
+@@ -1,43 +0,0 @@
+-#!/bin/sh
+-
+-[ -e /lib/firmware/$FIRMWARE ] && exit 0
+-
+-. /lib/functions/caldata.sh
+-
+-board=$(board_name)
+-
+-case "$FIRMWARE" in
+-"ath11k/IPQ8074/hw2.0/cal-ahb-c000000.wifi.bin")
+-	case "$board" in
+-	buffalo,wxr-5950ax12|\
+-	edgecore,eap102|\
+-	edimax,cax1800|\
+-	dynalink,dl-wrx36|\
+-	netgear,wax218|\
+-	qnap,301w|\
+-	redmi,ax6|\
+-	xiaomi,ax3600|\
+-	xiaomi,ax9000|\
+-	zyxel,nbg7815)
+-		caldata_extract "0:art" 0x1000 0x20000
+-		;;
+-	prpl,haze)
+-                caldata_extract_mmc "0:ART" 0x1000 0x20000
+-		;;
+-	esac
+-	;;
+-"ath11k/QCN9074/hw1.0/cal-pci-0000:01:00.0.bin"|\
+-"ath11k/QCN9074/hw1.0/cal-pci-0001:01:00.0.bin")
+-	case "$board" in
+-	prpl,haze)
+-                caldata_extract_mmc "0:ART" 0x26800 0x20000
+-		;;
+-	xiaomi,ax9000)
+-		caldata_extract "0:art" 0x26800 0x20000
+-		;;
+-	esac
+-	;;
+-*)
+-	exit 1
+-	;;
+-esac
+diff --git a/target/linux/ipq807x/base-files/etc/init.d/bootcount b/target/linux/ipq807x/base-files/etc/init.d/bootcount
+deleted file mode 100755
+index 6917446a9b..0000000000
+--- a/target/linux/ipq807x/base-files/etc/init.d/bootcount
++++ /dev/null
+@@ -1,13 +0,0 @@
+-#!/bin/sh /etc/rc.common
+-
+-START=99
+-
+-boot() {
+-	case $(board_name) in
+-	edgecore,eap102)
+-		fw_setenv upgrade_available 0
+-		# Unset changed flag after sysupgrade complete
+-		fw_setenv changed
+-	;;
+-	esac
+-}
+diff --git a/target/linux/ipq807x/base-files/lib/upgrade/buffalo.sh b/target/linux/ipq807x/base-files/lib/upgrade/buffalo.sh
+deleted file mode 100644
+index d0ed258890..0000000000
+--- a/target/linux/ipq807x/base-files/lib/upgrade/buffalo.sh
++++ /dev/null
+@@ -1,55 +0,0 @@
+-. /lib/functions.sh
+-
+-# Prepare UBI devices for OpenWrt installation
+-# - rootfs (mtd22)
+-#   - remove "ubi_rootfs" volume (rootfs on stock)
+-#   - remove "fw_hash" volume (firmware hash)
+-# - user_property (mtd24)
+-#   - remove "user_property_ubi" volume (user configuration)
+-#   - remove "extra_property" volume (gzipped syslog)
+-buffalo_upgrade_prepare() {
+-	local ubi_rootdev ubi_propdev
+-
+-	if ! ubi_rootdev="$(nand_attach_ubi rootfs)" || \
+-	   ! ubi_propdev="$(nand_attach_ubi user_property)"; then
+-		echo "failed to attach UBI volume \"rootfs\" or \"user_property\", rebooting..."
+-		reboot -f
+-	fi
+-
+-	ubirmvol /dev/$ubi_rootdev -N ubi_rootfs &> /dev/null || true
+-	ubirmvol /dev/$ubi_rootdev -N fw_hash &> /dev/null || true
+-
+-	ubirmvol /dev/$ubi_propdev -N user_property_ubi &> /dev/null || true
+-	ubirmvol /dev/$ubi_propdev -N extra_property &> /dev/null || true
+-}
+-
+-# Re-create small dummy ubi_rootfs volume and update
+-# fw_hash volume to pass the checking by U-Boot
+-# - rootfs (mtd22)
+-#   - re-create "ubi_rootfs" volume
+-#   - re-create and update "fw_hash" volume
+-# - rootfs_recover (mtd23)
+-#   - update "fw_hash" volume
+-buffalo_upgrade_optvol() {
+-	local ubi_rootdev ubi_rcvrdev
+-	local hashvol_root hashvol_rcvr
+-
+-	if ! ubi_rootdev="$(nand_attach_ubi rootfs)" || \
+-	   ! ubi_rcvrdev="$(nand_attach_ubi rootfs_recover)"; then
+-		echo "failed to attach UBI volume \"rootfs\" or \"rootfs_recover\", rebooting..."
+-		reboot -f
+-	fi
+-
+-	ubimkvol /dev/$ubi_rootdev -N ubi_rootfs -S 1
+-	ubimkvol /dev/$ubi_rootdev -N fw_hash -S 1 -t static
+-
+-	if ! hashvol_root="$(nand_find_volume $ubi_rootdev fw_hash)" || \
+-	   ! hashvol_rcvr="$(nand_find_volume $ubi_rcvrdev fw_hash)"; then
+-		echo "\"fw_hash\" volume in \"rootfs\" or \"rootfs_recover\" not found, rebooting..."
+-		reboot -f
+-	fi
+-
+-	echo -n "00000000000000000000000000000000" > /tmp/dummyhash.txt
+-	ubiupdatevol /dev/$hashvol_root /tmp/dummyhash.txt
+-	ubiupdatevol /dev/$hashvol_rcvr /tmp/dummyhash.txt
+-}
+diff --git a/target/linux/ipq807x/base-files/lib/upgrade/mmc.sh b/target/linux/ipq807x/base-files/lib/upgrade/mmc.sh
+deleted file mode 100644
+index dac9ddd568..0000000000
+--- a/target/linux/ipq807x/base-files/lib/upgrade/mmc.sh
++++ /dev/null
+@@ -1,83 +0,0 @@
+-#
+-# Copyright (C) 2016 lede-project.org
+-#
+-
+-# this can be used as a generic mmc upgrade script
+-# just add a device entry in platform.sh, 
+-# define "kernelname" and "rootfsname" and call mmc_do_upgrade
+-# after the kernel and rootfs flash a loopdev (as overlay) is 
+-# setup on top of the rootfs partition
+-# for the proper function a padded rootfs image is needed, basically 
+-# append "pad-to 64k" to the image definition
+-# this is based on the ipq806x zyxel.sh mmc upgrade
+-
+-. /lib/functions.sh
+-
+-mmc_do_upgrade() {
+-	local tar_file="$1"
+-	local rootfs=
+-	local kernel=
+-
+-			[ -z "$kernel" ] && kernel=$(find_mmc_part ${kernelname})
+-			[ -z "$rootfs" ] && rootfs=$(find_mmc_part ${rootfsname})
+-
+-			[ -z "$kernel" ] && echo "Upgrade failed: kernel partition not found! Rebooting..." && reboot -f
+-			[ -z "$rootfs" ] && echo "Upgrade failed: rootfs partition not found! Rebooting..." && reboot -f
+-
+-	mmc_do_flash $tar_file $kernel $rootfs
+-
+-	return 0
+-}
+-
+-mmc_do_flash() {
+-	local tar_file=$1
+-	local kernel=$2
+-	local rootfs=$3
+-	
+-	# keep sure its unbound
+-	losetup --detach-all || {
+-		echo Failed to detach all loop devices. Skip this try.
+-		reboot -f
+-	}
+-
+-	# use the first found directory in the tar archive
+-	local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
+-	board_dir=${board_dir%/}
+-
+-	echo "flashing kernel to $kernel"
+-	tar xf $tar_file ${board_dir}/kernel -O >$kernel
+-
+-	echo "flashing rootfs to ${rootfs}"
+-	tar xf $tar_file ${board_dir}/root -O >"${rootfs}"
+-
+-	# a padded rootfs is needed for overlay fs creation
+-	local offset=$(tar xf $tar_file ${board_dir}/root -O | wc -c)
+-	[ $offset -lt 65536 ] && {
+-		echo Wrong size for rootfs: $offset
+-		sleep 10
+-		reboot -f
+-	}
+-
+-	# Mount loop for rootfs_data
+-	local loopdev="$(losetup -f)"
+-	losetup -o $offset $loopdev $rootfs || {
+-		echo "Failed to mount looped rootfs_data."
+-		sleep 10
+-		reboot -f
+-	}
+-
+-	echo "Format new rootfs_data at position ${offset}."
+-	mkfs.ext4 -F -L rootfs_data $loopdev
+-	mkdir /tmp/new_root
+-	mount -t ext4 $loopdev /tmp/new_root && {
+-		echo "Saving config to rootfs_data at position ${offset}."
+-		cp -v "$UPGRADE_BACKUP" "/tmp/new_root/$BACKUP_FILE"
+-		umount /tmp/new_root
+-	}
+-
+-	# Cleanup
+-	losetup -d $loopdev >/dev/null 2>&1
+-	sync
+-	umount -a
+-	reboot -f
+-}
+diff --git a/target/linux/ipq807x/base-files/lib/upgrade/platform.sh b/target/linux/ipq807x/base-files/lib/upgrade/platform.sh
+deleted file mode 100644
+index 346cc390f3..0000000000
+--- a/target/linux/ipq807x/base-files/lib/upgrade/platform.sh
++++ /dev/null
+@@ -1,116 +0,0 @@
+-PART_NAME=firmware
+-REQUIRE_IMAGE_METADATA=1
+-
+-RAMFS_COPY_BIN='fw_printenv fw_setenv head'
+-RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'
+-
+-xiaomi_initramfs_prepare() {
+-	# Wipe UBI if running initramfs
+-	[ "$(rootfs_type)" = "tmpfs" ] || return 0
+-
+-	local rootfs_mtdnum="$( find_mtd_index rootfs )"
+-	if [ ! "$rootfs_mtdnum" ]; then
+-		echo "unable to find mtd partition rootfs"
+-		return 1
+-	fi
+-
+-	local kern_mtdnum="$( find_mtd_index ubi_kernel )"
+-	if [ ! "$kern_mtdnum" ]; then
+-		echo "unable to find mtd partition ubi_kernel"
+-		return 1
+-	fi
+-
+-	ubidetach -m "$rootfs_mtdnum"
+-	ubiformat /dev/mtd$rootfs_mtdnum -y
+-
+-	ubidetach -m "$kern_mtdnum"
+-	ubiformat /dev/mtd$kern_mtdnum -y
+-}
+-
+-platform_check_image() {
+-	return 0;
+-}
+-
+-platform_pre_upgrade() {
+-	case "$(board_name)" in
+-	redmi,ax6|\
+-	xiaomi,ax3600|\
+-	xiaomi,ax9000)
+-		xiaomi_initramfs_prepare
+-		;;
+-	esac
+-}
+-
+-platform_do_upgrade() {
+-	case "$(board_name)" in
+-	buffalo,wxr-5950ax12)
+-		CI_KERN_UBIPART="rootfs"
+-		CI_ROOT_UBIPART="user_property"
+-		buffalo_upgrade_prepare
+-		nand_do_flash_file "$1" || nand_do_upgrade_failed
+-		nand_do_restore_config || nand_do_upgrade_failed
+-		buffalo_upgrade_optvol
+-		;;
+-	dynalink,dl-wrx36)
+-		nand_do_upgrade "$1"
+-		;;
+-	edgecore,eap102)
+-		active="$(fw_printenv -n active)"
+-		if [ "$active" -eq "1" ]; then
+-			CI_UBIPART="rootfs2"
+-		else
+-			CI_UBIPART="rootfs1"
+-		fi
+-		# force altbootcmd which handles partition change in u-boot
+-		fw_setenv bootcount 3
+-		fw_setenv upgrade_available 1
+-		nand_do_upgrade "$1"
+-		;;
+-	edimax,cax1800|\
+-	netgear,wax218)
+-		nand_do_upgrade "$1"
+-		;;
+-	prpl,haze|\
+-	qnap,301w)
+-		kernelname="0:HLOS"
+-		rootfsname="rootfs"
+-		mmc_do_upgrade "$1"
+-		;;
+-	zyxel,nbg7815)
+-		local config_mtdnum="$(find_mtd_index 0:bootconfig)"
+-		[ -z "$config_mtdnum" ] && reboot
+-		part_num="$(hexdump -e '1/1 "%01x|"' -n 1 -s 168 -C /dev/mtd$config_mtdnum | cut -f 1 -d "|" | head -n1)"
+-		if [ "$part_num" -eq "0" ]; then
+-			kernelname="0:HLOS"
+-			rootfsname="rootfs"
+-			mmc_do_upgrade "$1"
+-		else
+-			kernelname="0:HLOS_1"
+-			rootfsname="rootfs_1"
+-			mmc_do_upgrade "$1"
+-		fi
+-		;;
+-	redmi,ax6|\
+-	xiaomi,ax3600|\
+-	xiaomi,ax9000)
+-		# Make sure that UART is enabled
+-		fw_setenv boot_wait on
+-		fw_setenv uart_en 1
+-
+-		# Enforce single partition.
+-		fw_setenv flag_boot_rootfs 0
+-		fw_setenv flag_last_success 0
+-		fw_setenv flag_boot_success 1
+-		fw_setenv flag_try_sys1_failed 8
+-		fw_setenv flag_try_sys2_failed 8
+-
+-		# Kernel and rootfs are placed in 2 different UBI
+-		CI_KERN_UBIPART="ubi_kernel"
+-		CI_ROOT_UBIPART="rootfs"
+-		nand_do_upgrade "$1"
+-		;;
+-	*)
+-		default_do_upgrade "$1"
+-		;;
+-	esac
+-}
+diff --git a/target/linux/ipq807x/config-5.15 b/target/linux/ipq807x/config-5.15
+deleted file mode 100644
+index a3d0628be9..0000000000
+--- a/target/linux/ipq807x/config-5.15
++++ /dev/null
+@@ -1,509 +0,0 @@
+-CONFIG_64BIT=y
+-# CONFIG_APQ_GCC_8084 is not set
+-# CONFIG_APQ_MMCC_8084 is not set
+-CONFIG_ARCH_DMA_ADDR_T_64BIT=y
+-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+-CONFIG_ARCH_KEEP_MEMBLOCK=y
+-CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
+-CONFIG_ARCH_MMAP_RND_BITS=18
+-CONFIG_ARCH_MMAP_RND_BITS_MAX=24
+-CONFIG_ARCH_MMAP_RND_BITS_MIN=18
+-CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
+-CONFIG_ARCH_PROC_KCORE_TEXT=y
+-CONFIG_ARCH_QCOM=y
+-CONFIG_ARCH_SPARSEMEM_ENABLE=y
+-CONFIG_ARCH_STACKWALK=y
+-CONFIG_ARCH_SUSPEND_POSSIBLE=y
+-CONFIG_ARCH_WANTS_NO_INSTR=y
+-CONFIG_ARM64=y
+-CONFIG_ARM64_4K_PAGES=y
+-CONFIG_ARM64_CRYPTO=y
+-CONFIG_ARM64_ERRATUM_1165522=y
+-CONFIG_ARM64_ERRATUM_1286807=y
+-CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y
+-CONFIG_ARM64_PAGE_SHIFT=12
+-CONFIG_ARM64_PA_BITS=48
+-CONFIG_ARM64_PA_BITS_48=y
+-CONFIG_ARM64_PTR_AUTH=y
+-CONFIG_ARM64_PTR_AUTH_KERNEL=y
+-CONFIG_ARM64_SVE=y
+-CONFIG_ARM64_TAGGED_ADDR_ABI=y
+-CONFIG_ARM64_VA_BITS=39
+-CONFIG_ARM64_VA_BITS_39=y
+-CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y
+-CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y
+-CONFIG_ARM_AMBA=y
+-CONFIG_ARM_ARCH_TIMER=y
+-CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
+-CONFIG_ARM_CPUIDLE=y
+-CONFIG_ARM_GIC=y
+-CONFIG_ARM_GIC_V2M=y
+-CONFIG_ARM_GIC_V3=y
+-CONFIG_ARM_GIC_V3_ITS=y
+-CONFIG_ARM_GIC_V3_ITS_PCI=y
+-# CONFIG_ARM_MHU_V2 is not set
+-CONFIG_ARM_PSCI_CPUIDLE=y
+-CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y
+-CONFIG_ARM_PSCI_FW=y
+-# CONFIG_ARM_QCOM_CPUFREQ_HW is not set
+-CONFIG_ARM_QCOM_CPUFREQ_NVMEM=y
+-CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
+-CONFIG_BLK_DEV_LOOP=y
+-CONFIG_BLK_DEV_SD=y
+-CONFIG_BLK_MQ_PCI=y
+-CONFIG_BLK_MQ_VIRTIO=y
+-CONFIG_BLK_PM=y
+-CONFIG_CAVIUM_TX2_ERRATUM_219=y
+-CONFIG_CC_HAVE_SHADOW_CALL_STACK=y
+-CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
+-CONFIG_CLONE_BACKWARDS=y
+-CONFIG_COMMON_CLK=y
+-CONFIG_COMMON_CLK_QCOM=y
+-# CONFIG_COMPAT_32BIT_TIME is not set
+-CONFIG_COREDUMP=y
+-CONFIG_CPUFREQ_DT=y
+-CONFIG_CPUFREQ_DT_PLATDEV=y
+-CONFIG_CPU_FREQ=y
+-# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+-CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
+-CONFIG_CPU_FREQ_GOV_ATTR_SET=y
+-# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+-# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
+-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+-# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
+-CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
+-# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
+-CONFIG_CPU_FREQ_STAT=y
+-CONFIG_CPU_FREQ_THERMAL=y
+-CONFIG_CPU_IDLE=y
+-CONFIG_CPU_IDLE_GOV_MENU=y
+-CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
+-CONFIG_CPU_LITTLE_ENDIAN=y
+-CONFIG_CPU_PM=y
+-CONFIG_CPU_RMAP=y
+-CONFIG_CPU_THERMAL=y
+-CONFIG_CRC16=y
+-CONFIG_CRC8=y
+-CONFIG_CRYPTO_AUTHENC=y
+-CONFIG_CRYPTO_CBC=y
+-CONFIG_CRYPTO_DEFLATE=y
+-CONFIG_CRYPTO_DEV_QCE=y
+-CONFIG_CRYPTO_DEV_QCE_AEAD=y
+-# CONFIG_CRYPTO_DEV_QCE_ENABLE_AEAD is not set
+-CONFIG_CRYPTO_DEV_QCE_ENABLE_ALL=y
+-# CONFIG_CRYPTO_DEV_QCE_ENABLE_SHA is not set
+-# CONFIG_CRYPTO_DEV_QCE_ENABLE_SKCIPHER is not set
+-CONFIG_CRYPTO_DEV_QCE_SHA=y
+-CONFIG_CRYPTO_DEV_QCE_SKCIPHER=y
+-CONFIG_CRYPTO_DEV_QCE_SW_MAX_LEN=512
+-CONFIG_CRYPTO_DEV_QCOM_RNG=y
+-CONFIG_CRYPTO_ECB=y
+-CONFIG_CRYPTO_HASH_INFO=y
+-CONFIG_CRYPTO_HW=y
+-CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
+-CONFIG_CRYPTO_LIB_DES=y
+-CONFIG_CRYPTO_LIB_SHA256=y
+-CONFIG_CRYPTO_LZO=y
+-CONFIG_CRYPTO_RNG=y
+-CONFIG_CRYPTO_RNG2=y
+-CONFIG_CRYPTO_SHA1=y
+-CONFIG_CRYPTO_SHA256=y
+-CONFIG_CRYPTO_XTS=y
+-CONFIG_CRYPTO_ZSTD=y
+-CONFIG_DCACHE_WORD_ACCESS=y
+-CONFIG_DEV_COREDUMP=y
+-CONFIG_DMADEVICES=y
+-CONFIG_DMA_DIRECT_REMAP=y
+-CONFIG_DMA_ENGINE=y
+-CONFIG_DMA_OF=y
+-CONFIG_DMA_REMAP=y
+-CONFIG_DMA_VIRTUAL_CHANNELS=y
+-CONFIG_DTC=y
+-CONFIG_DT_IDLE_STATES=y
+-CONFIG_EDAC_SUPPORT=y
+-CONFIG_FIXED_PHY=y
+-CONFIG_FIX_EARLYCON_MEM=y
+-CONFIG_FRAME_POINTER=y
+-CONFIG_FUJITSU_ERRATUM_010001=y
+-CONFIG_FWNODE_MDIO=y
+-CONFIG_FW_LOADER_PAGED_BUF=y
+-CONFIG_GENERIC_ALLOCATOR=y
+-CONFIG_GENERIC_ARCH_TOPOLOGY=y
+-CONFIG_GENERIC_BUG=y
+-CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
+-CONFIG_GENERIC_CLOCKEVENTS=y
+-CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+-CONFIG_GENERIC_CPU_AUTOPROBE=y
+-CONFIG_GENERIC_CPU_VULNERABILITIES=y
+-CONFIG_GENERIC_CSUM=y
+-CONFIG_GENERIC_EARLY_IOREMAP=y
+-CONFIG_GENERIC_FIND_FIRST_BIT=y
+-CONFIG_GENERIC_GETTIMEOFDAY=y
+-CONFIG_GENERIC_IDLE_POLL_SETUP=y
+-CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
+-CONFIG_GENERIC_IRQ_SHOW=y
+-CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
+-CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
+-CONFIG_GENERIC_MSI_IRQ=y
+-CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
+-CONFIG_GENERIC_PCI_IOMAP=y
+-CONFIG_GENERIC_PHY=y
+-CONFIG_GENERIC_PINCONF=y
+-CONFIG_GENERIC_PINCTRL_GROUPS=y
+-CONFIG_GENERIC_PINMUX_FUNCTIONS=y
+-CONFIG_GENERIC_SCHED_CLOCK=y
+-CONFIG_GENERIC_SMP_IDLE_THREAD=y
+-CONFIG_GENERIC_STRNCPY_FROM_USER=y
+-CONFIG_GENERIC_STRNLEN_USER=y
+-CONFIG_GENERIC_TIME_VSYSCALL=y
+-CONFIG_GLOB=y
+-CONFIG_GPIOLIB_IRQCHIP=y
+-CONFIG_GPIO_CDEV=y
+-CONFIG_HANDLE_DOMAIN_IRQ=y
+-CONFIG_HARDIRQS_SW_RESEND=y
+-CONFIG_HAS_DMA=y
+-CONFIG_HAS_IOMEM=y
+-CONFIG_HAS_IOPORT_MAP=y
+-CONFIG_HWSPINLOCK=y
+-CONFIG_HWSPINLOCK_QCOM=y
+-CONFIG_I2C=y
+-CONFIG_I2C_BOARDINFO=y
+-CONFIG_I2C_CHARDEV=y
+-CONFIG_I2C_HELPER_AUTO=y
+-# CONFIG_I2C_QCOM_CCI is not set
+-CONFIG_I2C_QUP=y
+-CONFIG_IIO=y
+-CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
+-CONFIG_INITRAMFS_SOURCE=""
+-CONFIG_IPQ_APSS_6018=y
+-CONFIG_IPQ_APSS_PLL=y
+-# CONFIG_IPQ_GCC_4019 is not set
+-# CONFIG_IPQ_GCC_6018 is not set
+-# CONFIG_IPQ_GCC_806X is not set
+-CONFIG_IPQ_GCC_8074=y
+-# CONFIG_IPQ_LCC_806X is not set
+-CONFIG_IRQCHIP=y
+-CONFIG_IRQ_DOMAIN=y
+-CONFIG_IRQ_DOMAIN_HIERARCHY=y
+-CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y
+-CONFIG_IRQ_FORCED_THREADING=y
+-CONFIG_IRQ_WORK=y
+-# CONFIG_KPSS_XCC is not set
+-CONFIG_LIBFDT=y
+-CONFIG_LOCK_DEBUGGING_SUPPORT=y
+-CONFIG_LOCK_SPIN_ON_OWNER=y
+-CONFIG_LZO_COMPRESS=y
+-CONFIG_LZO_DECOMPRESS=y
+-CONFIG_MAILBOX=y
+-# CONFIG_MAILBOX_TEST is not set
+-CONFIG_MDIO_BUS=y
+-CONFIG_MDIO_DEVICE=y
+-CONFIG_MDIO_DEVRES=y
+-CONFIG_MDIO_IPQ4019=y
+-# CONFIG_MDM_GCC_9615 is not set
+-# CONFIG_MDM_LCC_9615 is not set
+-CONFIG_MEMFD_CREATE=y
+-# CONFIG_MFD_HI6421_SPMI is not set
+-# CONFIG_MFD_QCOM_RPM is not set
+-CONFIG_MFD_SPMI_PMIC=y
+-CONFIG_MFD_SYSCON=y
+-CONFIG_MIGRATION=y
+-CONFIG_MMC=y
+-CONFIG_MMC_BLOCK=y
+-CONFIG_MMC_BLOCK_MINORS=32
+-CONFIG_MMC_CQHCI=y
+-CONFIG_MMC_SDHCI=y
+-CONFIG_MMC_SDHCI_IO_ACCESSORS=y
+-CONFIG_MMC_SDHCI_MSM=y
+-# CONFIG_MMC_SDHCI_PCI is not set
+-CONFIG_MMC_SDHCI_PLTFM=y
+-CONFIG_MODULES_USE_ELF_RELA=y
+-# CONFIG_MSM_GCC_8660 is not set
+-# CONFIG_MSM_GCC_8916 is not set
+-# CONFIG_MSM_GCC_8939 is not set
+-# CONFIG_MSM_GCC_8960 is not set
+-# CONFIG_MSM_GCC_8974 is not set
+-# CONFIG_MSM_GCC_8994 is not set
+-# CONFIG_MSM_GCC_8996 is not set
+-# CONFIG_MSM_GCC_8998 is not set
+-# CONFIG_MSM_GPUCC_8998 is not set
+-# CONFIG_MSM_LCC_8960 is not set
+-# CONFIG_MSM_MMCC_8960 is not set
+-# CONFIG_MSM_MMCC_8974 is not set
+-# CONFIG_MSM_MMCC_8996 is not set
+-# CONFIG_MSM_MMCC_8998 is not set
+-CONFIG_MTD_NAND_CORE=y
+-CONFIG_MTD_NAND_ECC=y
+-CONFIG_MTD_NAND_ECC_SW_HAMMING=y
+-CONFIG_MTD_NAND_QCOM=y
+-CONFIG_MTD_QCOMSMEM_PARTS=y
+-CONFIG_MTD_RAW_NAND=y
+-CONFIG_MTD_SPI_NOR=y
+-CONFIG_MTD_UBI=y
+-CONFIG_MTD_UBI_BEB_LIMIT=20
+-CONFIG_MTD_UBI_BLOCK=y
+-CONFIG_MTD_UBI_WL_THRESHOLD=4096
+-CONFIG_MUTEX_SPIN_ON_OWNER=y
+-CONFIG_NEED_DMA_MAP_STATE=y
+-CONFIG_NEED_SG_DMA_LENGTH=y
+-CONFIG_NET_FLOW_LIMIT=y
+-CONFIG_NET_SELFTESTS=y
+-CONFIG_NET_SWITCHDEV=y
+-CONFIG_NLS=y
+-CONFIG_NO_HZ_COMMON=y
+-CONFIG_NO_HZ_IDLE=y
+-CONFIG_NR_CPUS=4
+-CONFIG_NVIDIA_CARMEL_CNP_ERRATUM=y
+-CONFIG_NVMEM=y
+-CONFIG_NVMEM_QCOM_QFPROM=y
+-# CONFIG_NVMEM_SPMI_SDAM is not set
+-CONFIG_NVMEM_SYSFS=y
+-CONFIG_NVMEM_U_BOOT_ENV=y
+-CONFIG_OF=y
+-CONFIG_OF_ADDRESS=y
+-CONFIG_OF_EARLY_FLATTREE=y
+-CONFIG_OF_FLATTREE=y
+-CONFIG_OF_GPIO=y
+-CONFIG_OF_IRQ=y
+-CONFIG_OF_KOBJ=y
+-CONFIG_OF_MDIO=y
+-CONFIG_PADATA=y
+-CONFIG_PARTITION_PERCPU=y
+-CONFIG_PCI=y
+-CONFIG_PCIEAER=y
+-CONFIG_PCIEASPM=y
+-CONFIG_PCIEASPM_DEFAULT=y
+-# CONFIG_PCIEASPM_PERFORMANCE is not set
+-# CONFIG_PCIEASPM_POWERSAVE is not set
+-# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
+-CONFIG_PCIEPORTBUS=y
+-CONFIG_PCIE_DW=y
+-CONFIG_PCIE_DW_HOST=y
+-CONFIG_PCIE_PME=y
+-CONFIG_PCIE_QCOM=y
+-CONFIG_PCI_DOMAINS=y
+-CONFIG_PCI_DOMAINS_GENERIC=y
+-CONFIG_PCI_MSI=y
+-CONFIG_PCI_MSI_IRQ_DOMAIN=y
+-CONFIG_PGTABLE_LEVELS=3
+-CONFIG_PHYLIB=y
+-CONFIG_PHYS_ADDR_T_64BIT=y
+-# CONFIG_PHY_QCOM_APQ8064_SATA is not set
+-# CONFIG_PHY_QCOM_IPQ4019_USB is not set
+-# CONFIG_PHY_QCOM_IPQ806X_SATA is not set
+-# CONFIG_PHY_QCOM_IPQ806X_USB is not set
+-# CONFIG_PHY_QCOM_PCIE2 is not set
+-CONFIG_PHY_QCOM_QMP=y
+-CONFIG_PHY_QCOM_QUSB2=y
+-# CONFIG_PHY_QCOM_USB_HS_28NM is not set
+-# CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2 is not set
+-# CONFIG_PHY_QCOM_USB_SS is not set
+-CONFIG_PINCTRL=y
+-# CONFIG_PINCTRL_APQ8064 is not set
+-# CONFIG_PINCTRL_APQ8084 is not set
+-# CONFIG_PINCTRL_IPQ4019 is not set
+-# CONFIG_PINCTRL_IPQ6018 is not set
+-# CONFIG_PINCTRL_IPQ8064 is not set
+-CONFIG_PINCTRL_IPQ8074=y
+-# CONFIG_PINCTRL_MDM9615 is not set
+-CONFIG_PINCTRL_MSM=y
+-# CONFIG_PINCTRL_MSM8226 is not set
+-# CONFIG_PINCTRL_MSM8660 is not set
+-# CONFIG_PINCTRL_MSM8916 is not set
+-# CONFIG_PINCTRL_MSM8960 is not set
+-# CONFIG_PINCTRL_MSM8976 is not set
+-# CONFIG_PINCTRL_MSM8994 is not set
+-# CONFIG_PINCTRL_MSM8996 is not set
+-# CONFIG_PINCTRL_MSM8998 is not set
+-CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
+-# CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set
+-# CONFIG_PINCTRL_QCS404 is not set
+-# CONFIG_PINCTRL_SC7180 is not set
+-# CONFIG_PINCTRL_SDM660 is not set
+-# CONFIG_PINCTRL_SDM845 is not set
+-# CONFIG_PINCTRL_SM8150 is not set
+-# CONFIG_PINCTRL_SM8250 is not set
+-CONFIG_PM=y
+-# CONFIG_PM8916_WATCHDOG is not set
+-CONFIG_PM_CLK=y
+-CONFIG_PM_GENERIC_DOMAINS=y
+-CONFIG_PM_GENERIC_DOMAINS_OF=y
+-CONFIG_PM_OPP=y
+-CONFIG_POWER_RESET=y
+-# CONFIG_POWER_RESET_MSM is not set
+-# CONFIG_POWER_RESET_QCOM_PON is not set
+-CONFIG_POWER_SUPPLY=y
+-CONFIG_PRINTK_TIME=y
+-CONFIG_PTP_1588_CLOCK_OPTIONAL=y
+-# CONFIG_QCOM_A53PLL is not set
+-# CONFIG_QCOM_AOSS_QMP is not set
+-CONFIG_QCOM_APCS_IPC=y
+-CONFIG_QCOM_APM=y
+-# CONFIG_QCOM_APR is not set
+-CONFIG_QCOM_BAM_DMA=y
+-# CONFIG_QCOM_CLK_APCC_MSM8996 is not set
+-# CONFIG_QCOM_CLK_APCS_MSM8916 is not set
+-# CONFIG_QCOM_CLK_APCS_SDX55 is not set
+-# CONFIG_QCOM_COINCELL is not set
+-# CONFIG_QCOM_COMMAND_DB is not set
+-# CONFIG_QCOM_CPR is not set
+-# CONFIG_QCOM_EBI2 is not set
+-# CONFIG_QCOM_FASTRPC is not set
+-CONFIG_QCOM_GDSC=y
+-# CONFIG_QCOM_GENI_SE is not set
+-# CONFIG_QCOM_GSBI is not set
+-# CONFIG_QCOM_HFPLL is not set
+-# CONFIG_QCOM_IPCC is not set
+-# CONFIG_QCOM_LLCC is not set
+-CONFIG_QCOM_MDT_LOADER=y
+-# CONFIG_QCOM_OCMEM is not set
+-# CONFIG_QCOM_PDC is not set
+-CONFIG_QCOM_PIL_INFO=y
+-# CONFIG_QCOM_Q6V5_ADSP is not set
+-CONFIG_QCOM_Q6V5_COMMON=y
+-# CONFIG_QCOM_Q6V5_MSS is not set
+-# CONFIG_QCOM_Q6V5_PAS is not set
+-CONFIG_QCOM_Q6V5_WCSS=y
+-# CONFIG_QCOM_RMTFS_MEM is not set
+-# CONFIG_QCOM_RPMH is not set
+-CONFIG_QCOM_RPROC_COMMON=y
+-CONFIG_QCOM_SCM=y
+-# CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is not set
+-# CONFIG_QCOM_SMD_RPM is not set
+-CONFIG_QCOM_SMEM=y
+-CONFIG_QCOM_SMEM_STATE=y
+-CONFIG_QCOM_SMP2P=y
+-# CONFIG_QCOM_SMSM is not set
+-CONFIG_QCOM_SOCINFO=y
+-CONFIG_QCOM_SPMI_ADC5=y
+-# CONFIG_QCOM_SYSMON is not set
+-CONFIG_QCOM_TSENS=y
+-CONFIG_QCOM_VADC_COMMON=y
+-# CONFIG_QCOM_WCNSS_CTRL is not set
+-# CONFIG_QCOM_WCNSS_PIL is not set
+-CONFIG_QCOM_WDT=y
+-# CONFIG_QCS_GCC_404 is not set
+-# CONFIG_QCS_Q6SSTOP_404 is not set
+-# CONFIG_QCS_TURING_404 is not set
+-CONFIG_QUEUED_RWLOCKS=y
+-CONFIG_QUEUED_SPINLOCKS=y
+-CONFIG_RAS=y
+-CONFIG_RATIONAL=y
+-CONFIG_REGMAP=y
+-CONFIG_REGMAP_MMIO=y
+-CONFIG_REGMAP_SPMI=y
+-CONFIG_REGULATOR=y
+-CONFIG_REGULATOR_CPR3=y
+-# CONFIG_REGULATOR_CPR3_NPU is not set
+-CONFIG_REGULATOR_CPR4_APSS=y
+-CONFIG_REGULATOR_FIXED_VOLTAGE=y
+-# CONFIG_REGULATOR_QCOM_LABIBB is not set
+-CONFIG_REGULATOR_QCOM_SPMI=y
+-# CONFIG_REGULATOR_QCOM_USB_VBUS is not set
+-# CONFIG_REGULATOR_VQMMC_IPQ4019 is not set
+-CONFIG_RELOCATABLE=y
+-CONFIG_REMOTEPROC=y
+-CONFIG_REMOTEPROC_CDEV=y
+-CONFIG_RESET_CONTROLLER=y
+-# CONFIG_RESET_QCOM_AOSS is not set
+-# CONFIG_RESET_QCOM_PDC is not set
+-CONFIG_RFS_ACCEL=y
+-CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
+-CONFIG_RPMSG=y
+-CONFIG_RPMSG_CHAR=y
+-# CONFIG_RPMSG_NS is not set
+-CONFIG_RPMSG_QCOM_GLINK=y
+-CONFIG_RPMSG_QCOM_GLINK_RPM=y
+-CONFIG_RPMSG_QCOM_GLINK_SMEM=y
+-CONFIG_RPMSG_QCOM_SMD=y
+-CONFIG_RPS=y
+-CONFIG_RTC_CLASS=y
+-CONFIG_RTC_DRV_PM8XXX=y
+-CONFIG_RTC_I2C_AND_SPI=y
+-CONFIG_RWSEM_SPIN_ON_OWNER=y
+-# CONFIG_SCHED_CORE is not set
+-CONFIG_SCHED_MC=y
+-CONFIG_SCHED_SMT=y
+-CONFIG_SCHED_THERMAL_PRESSURE=y
+-CONFIG_SCSI=y
+-CONFIG_SCSI_COMMON=y
+-# CONFIG_SCSI_LOWLEVEL is not set
+-# CONFIG_SCSI_PROC_FS is not set
+-# CONFIG_SC_DISPCC_7180 is not set
+-# CONFIG_SC_GCC_7180 is not set
+-# CONFIG_SC_GPUCC_7180 is not set
+-# CONFIG_SC_LPASS_CORECC_7180 is not set
+-# CONFIG_SC_MSS_7180 is not set
+-# CONFIG_SC_VIDEOCC_7180 is not set
+-# CONFIG_SDM_CAMCC_845 is not set
+-# CONFIG_SDM_DISPCC_845 is not set
+-# CONFIG_SDM_GCC_660 is not set
+-# CONFIG_SDM_GCC_845 is not set
+-# CONFIG_SDM_GPUCC_845 is not set
+-# CONFIG_SDM_LPASSCC_845 is not set
+-# CONFIG_SDM_VIDEOCC_845 is not set
+-CONFIG_SERIAL_8250_FSL=y
+-CONFIG_SERIAL_MCTRL_GPIO=y
+-CONFIG_SERIAL_MSM=y
+-CONFIG_SERIAL_MSM_CONSOLE=y
+-CONFIG_SGL_ALLOC=y
+-CONFIG_SG_POOL=y
+-CONFIG_SMP=y
+-# CONFIG_SM_GCC_8150 is not set
+-# CONFIG_SM_GCC_8250 is not set
+-# CONFIG_SM_GPUCC_8150 is not set
+-# CONFIG_SM_GPUCC_8250 is not set
+-# CONFIG_SM_VIDEOCC_8150 is not set
+-# CONFIG_SM_VIDEOCC_8250 is not set
+-CONFIG_SOCK_RX_QUEUE_MAPPING=y
+-CONFIG_SOC_BUS=y
+-CONFIG_SPARSEMEM=y
+-CONFIG_SPARSEMEM_EXTREME=y
+-CONFIG_SPARSEMEM_VMEMMAP=y
+-CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
+-CONFIG_SPARSE_IRQ=y
+-CONFIG_SPI=y
+-CONFIG_SPI_MASTER=y
+-CONFIG_SPI_MEM=y
+-CONFIG_SPI_QUP=y
+-CONFIG_SPMI=y
+-# CONFIG_SPMI_HISI3670 is not set
+-CONFIG_SPMI_MSM_PMIC_ARB=y
+-# CONFIG_SPMI_PMIC_CLKDIV is not set
+-CONFIG_SRCU=y
+-CONFIG_SWIOTLB=y
+-CONFIG_SWPHY=y
+-CONFIG_SYSCTL_EXCEPTION_TRACE=y
+-CONFIG_THERMAL=y
+-CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+-CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
+-CONFIG_THERMAL_GOV_STEP_WISE=y
+-CONFIG_THERMAL_OF=y
+-CONFIG_THREAD_INFO_IN_TASK=y
+-CONFIG_TICK_CPU_ACCOUNTING=y
+-CONFIG_TIMER_OF=y
+-CONFIG_TIMER_PROBE=y
+-CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y
+-CONFIG_TREE_RCU=y
+-CONFIG_TREE_SRCU=y
+-CONFIG_UBIFS_FS=y
+-CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+-# CONFIG_UCLAMP_TASK is not set
+-CONFIG_UNMAP_KERNEL_AT_EL0=y
+-CONFIG_USB=y
+-CONFIG_USB_COMMON=y
+-CONFIG_USB_SUPPORT=y
+-CONFIG_VIRTIO=y
+-# CONFIG_VIRTIO_BLK is not set
+-# CONFIG_VIRTIO_NET is not set
+-CONFIG_VMAP_STACK=y
+-CONFIG_WANT_DEV_COREDUMP=y
+-CONFIG_WATCHDOG_CORE=y
+-CONFIG_WATCHDOG_SYSFS=y
+-CONFIG_XPS=y
+-CONFIG_XXHASH=y
+-CONFIG_ZLIB_DEFLATE=y
+-CONFIG_ZLIB_INFLATE=y
+-CONFIG_ZONE_DMA32=y
+-CONFIG_ZSTD_COMPRESS=y
+-CONFIG_ZSTD_DECOMPRESS=y
+diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8070-cax1800.dts b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8070-cax1800.dts
+deleted file mode 100644
+index 2c9cbd5b3c..0000000000
+--- a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8070-cax1800.dts
++++ /dev/null
+@@ -1,322 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2021, Dirk Buchwalder <buchwalder@posteo.de> */
+-
+-/dts-v1/;
+-
+-#include "ipq8074-512m.dtsi"
+-#include "ipq8074-ac-cpu.dtsi"
+-#include "ipq8074-ess.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-
+-/ {
+-	model = "Edimax CAX1800";
+-	compatible = "edimax,cax1800", "qcom,ipq8074";
+-
+-	aliases {
+-		serial0 = &blsp1_uart5;
+-		led-boot = &led_system_red;
+-		led-failsafe = &led_system_red;
+-		led-running = &led_system_green;
+-		led-upgrade = &led_system_red;
+-		/* Aliases as required by u-boot to patch MAC addresses */
+-		ethernet0 = &dp5;
+-		label-mac-device = &dp5;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-		bootargs-append = " root=/dev/ubiblock0_1";
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_system_red: system-red {
+-			label = "red:system";
+-			gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_system_green: system-green {
+-			label = "green:system";
+-			gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_system_blue: system-blue {
+-			label = "blue:system";
+-			gpios = <&tlmm 27 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio-pins {
+-		mdc {
+-			pins = "gpio68";
+-			function = "mdc";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-
+-		mdio {
+-			pins = "gpio69";
+-			function = "mdio";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-	};
+-};
+-
+-&blsp1_uart5 {
+-	status = "okay";
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&qpic_nand {
+-	status = "okay";
+-
+-	nand@0 {
+-		reg = <0>;
+-		nand-ecc-strength = <4>;
+-		nand-ecc-step-size = <512>;
+-		nand-bus-width = <8>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "rootfs";
+-				reg = <0x0000000 0x3400000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	cs-select = <0>;
+-	status = "ok";
+-
+-	m25p80@0 {
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <50000000>;
+-		use-default-sizes;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:sbl1";
+-				reg = <0x0 0x50000>;
+-				read-only;
+-			};
+-
+-			partition@50000 {
+-				label = "0:mibib";
+-				reg = <0x50000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "0:bootconfig";
+-				reg = <0x60000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@80000 {
+-				label = "0:bootconfig1";
+-				reg = <0x80000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@a0000 {
+-				label = "0:qsee";
+-				reg = <0xa0000 0x180000>;
+-				read-only;
+-			};
+-
+-			partition@220000 {
+-				label = "0:qsee_1";
+-				reg = <0x220000 0x180000>;
+-				read-only;
+-			};
+-
+-			partition@3a0000 {
+-				label = "0:devcfg";
+-				reg = <0x3a0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3b0000 {
+-				label = "0:devcfg_1";
+-				reg = <0x3b0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3c0000 {
+-				label = "0:apdp";
+-				reg = <0x3c0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3d0000 {
+-				label = "0:apdp_1";
+-				reg = <0x3d0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3e0000 {
+-				label = "0:rpm";
+-				reg = <0x3e0000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@420000 {
+-				label = "0:rpm_1";
+-				reg = <0x420000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@460000 {
+-				label = "0:cdt";
+-				reg = <0x460000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@470000 {
+-				label = "0:cdt_1";
+-				reg = <0x470000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@480000 {
+-				label = "0:appsblenv";
+-				reg = <0x480000 0x10000>;
+-			};
+-
+-			partition@490000 {
+-				label = "0:appsbl";
+-				reg = <0x490000 0xa0000>;
+-				read-only;
+-			};
+-
+-			partition@530000 {
+-				label = "0:appsbl_1";
+-				reg = <0x530000 0xa0000>;
+-				read-only;
+-			};
+-
+-			partition@5d0000 {
+-				label = "0:art";
+-				reg = <0x5d0000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@610000 {
+-				label = "0:ethphyfw";
+-				reg = <0x610000 0x80000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&mdio {
+-	status = "okay";
+-
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-
+-	reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
+-
+-	qca8075: ethernet-phy@4 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <4>;
+-	};
+-};
+-
+-&switch {
+-	status = "okay";
+-
+-	switch_cpu_bmp = <0x1>;  /* cpu port bitmap */
+-	switch_lan_bmp = <0x1e>; /* lan port bitmap */
+-	switch_wan_bmp = <0x20>; /* wan port bitmap */
+-	switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
+-	switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
+-	switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
+-	bm_tick_mode = <0>; /* bm tick mode */
+-	tm_tick_mode = <0>; /* tm tick mode */
+-
+-	qcom,port_phyinfo {
+-		port@0 {
+-			port_id = <1>;
+-			phy_address = <0>;
+-		};
+-		port@1 {
+-			port_id = <2>;
+-			phy_address = <1>;
+-		};
+-		port@2 {
+-			port_id = <3>;
+-			phy_address = <2>;
+-		};
+-		port@3 {
+-			port_id = <4>;
+-			phy_address = <3>;
+-		};
+-		port@4 {
+-			port_id = <5>;
+-			phy_address = <4>;
+-		};
+-	};
+-};
+-
+-&edma {
+-	status = "okay";
+-};
+-
+-&dp5 {
+-	status = "okay";
+-	phy-handle = <&qca8075>;
+-	label = "lan";
+-};
+-
+-&wifi {
+-	status = "okay";
+-
+-	qcom,ath11k-calibration-variant = "Edimax-CAX1800";
+-	qcom,ath11k-fw-memory-mode = <1>;
+-};
+diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dts b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dts
+deleted file mode 100644
+index f3e82e2251..0000000000
+--- a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dts
++++ /dev/null
+@@ -1,73 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2021, Robert Marko <robimarko@gmail.com> */
+-
+-/dts-v1/;
+-
+-#include "ipq8071-ax3600.dtsi"
+-
+-/ {
+-	model = "Xiaomi AX3600";
+-	compatible = "xiaomi,ax3600", "qcom,ipq8074";
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_system_blue: system-blue {
+-			label = "blue:system";
+-			gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_system_yellow: system-yellow {
+-			label = "yellow:system";
+-			gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		network-yellow {
+-			label = "yellow:network";
+-			gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		network-blue {
+-			label = "blue:network";
+-			gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		aiot {
+-			label = "blue:aiot";
+-			gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-	};
+-};
+-
+-&pcie_qmp0 {
+-	status = "okay";
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-
+-	perst-gpio = <&tlmm 52 GPIO_ACTIVE_HIGH>;
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi0: wifi@1,0 {
+-			status = "okay";
+-
+-			compatible = "qcom,ath10k";
+-			reg = <0x00010000 0 0 0 0>;
+-
+-			qcom,ath10k-calibration-variant = "Xiaomi-AX3600";
+-			nvmem-cell-names = "calibration";
+-			nvmem-cells = <&caldata_qca9889>;
+-		};
+-	};
+-};
+-
+-&wifi {
+-	qcom,ath11k-calibration-variant = "Xiaomi-AX3600";
+-};
+diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dtsi b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dtsi
+deleted file mode 100644
+index c18cef52f3..0000000000
+--- a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dtsi
++++ /dev/null
+@@ -1,311 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2021, Robert Marko <robimarko@gmail.com> */
+-
+-#include "ipq8074-512m.dtsi"
+-#include "ipq8074-ac-cpu.dtsi"
+-#include "ipq8074-ess.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-
+-/ {
+-	aliases {
+-		serial0 = &blsp1_uart5;
+-		led-boot = &led_system_yellow;
+-		led-failsafe = &led_system_yellow;
+-		led-running = &led_system_blue;
+-		led-upgrade = &led_system_yellow;
+-		label-mac-device = &dp2;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-		bootargs-append = " root=/dev/ubiblock0_0";
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio-pins {
+-		mdc {
+-			pins = "gpio68";
+-			function = "mdc";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-
+-		mdio {
+-			pins = "gpio69";
+-			function = "mdio";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-	};
+-};
+-
+-&blsp1_uart5 {
+-	status = "okay";
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&qpic_nand {
+-	status = "okay";
+-
+-	/*
+-	 * Bootloader will find the NAND DT node by the compatible and
+-	 * then "fixup" it by adding the partitions from the SMEM table
+-	 * using the legacy bindings thus making it impossible for us
+-	 * to change the partition table or utilize NVMEM for calibration.
+-	 * So add a dummy partitions node that bootloader will populate
+-	 * and set it as disabled so the kernel ignores it instead of
+-	 * printing warnings due to the broken way bootloader adds the
+-	 * partitions.
+-	 */
+-	partitions {
+-		status = "disabled";
+-	};
+-
+-	nand@0 {
+-		reg = <0>;
+-		nand-ecc-strength = <4>;
+-		nand-ecc-step-size = <512>;
+-		nand-bus-width = <8>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:sbl1";
+-				reg = <0x0 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@100000 {
+-				label = "0:mibib";
+-				reg = <0x100000 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@200000 {
+-				label = "0:qsee";
+-				reg = <0x200000 0x300000>;
+-				read-only;
+-			};
+-
+-			partition@500000 {
+-				label = "0:devcfg";
+-				reg = <0x500000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@580000 {
+-				label = "0:rpm";
+-				reg = <0x580000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@600000 {
+-				label = "0:cdt";
+-				reg = <0x600000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@680000 {
+-				label = "0:appsblenv";
+-				reg = <0x680000 0x80000>;
+-			};
+-
+-			partition@700000 {
+-				label = "0:appsbl";
+-				reg = <0x700000 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@800000 {
+-				label = "0:art";
+-				reg = <0x800000 0x80000>;
+-				read-only;
+-
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				macaddr_dp2: macaddr@6 {
+-					reg = <0x6 0x6>;
+-				};
+-
+-				macaddr_dp3: macaddr@c {
+-					reg = <0xc 0x6>;
+-				};
+-
+-				macaddr_dp4: macaddr@12 {
+-					reg = <0x12 0x6>;
+-				};
+-
+-				macaddr_dp5: macaddr@18 {
+-					reg = <0x18 0x6>;
+-				};
+-
+-				caldata_qca9889: caldata@4d000 {
+-					reg = <0x33000 0x844>;
+-				};
+-			};
+-
+-			partition@880000 {
+-				label = "bdata";
+-				reg = <0x880000 0x80000>;
+-			};
+-
+-			partition@900000 {
+-				/* This is crash + crash_syslog parts combined */
+-				label = "pstore";
+-				reg = <0x900000 0x100000>;
+-			};
+-
+-			/* Make the first rootfs a dedicated ubi partition for kernel */
+-			partition@a00000 {
+-				label = "ubi_kernel";
+-				reg = <0xa00000 0x23c0000>;
+-			};
+-
+-			/* Place the real rootfs in the original second rootfs and
+-			 * expand it to the end of the nand
+-			 */
+-			rootfs: partition@2dc0000 {
+-				label = "rootfs";
+-				reg = <0x2dc0000 0xd240000>;
+-			};
+-		};
+-	};
+-};
+-
+-&mdio {
+-	status = "okay";
+-
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-	reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
+-
+-	qca8075_1: ethernet-phy@1 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <1>;
+-	};
+-
+-	qca8075_2: ethernet-phy@2 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <2>;
+-	};
+-
+-	qca8075_3: ethernet-phy@3 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <3>;
+-	};
+-
+-	qca8075_4: ethernet-phy@4 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <4>;
+-	};
+-};
+-
+-&switch {
+-	status = "okay";
+-
+-	switch_cpu_bmp = <0x1>;  /* cpu port bitmap */
+-	switch_lan_bmp = <0x1e>; /* lan port bitmap */
+-	switch_wan_bmp = <0x20>; /* wan port bitmap */
+-	switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
+-	switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
+-	switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
+-	bm_tick_mode = <0>; /* bm tick mode */
+-	tm_tick_mode = <0>; /* tm tick mode */
+-
+-	qcom,port_phyinfo {
+-		port@0 {
+-			port_id = <1>;
+-			phy_address = <0>;
+-		};
+-		port@1 {
+-			port_id = <2>;
+-			phy_address = <1>;
+-		};
+-		port@2 {
+-			port_id = <3>;
+-			phy_address = <2>;
+-		};
+-		port@3 {
+-			port_id = <4>;
+-			phy_address = <3>;
+-		};
+-		port@4 {
+-			port_id = <5>;
+-			phy_address = <4>;
+-		};
+-	};
+-};
+-
+-&edma {
+-	status = "okay";
+-};
+-
+-&dp2 {
+-	status = "okay";
+-	phy-handle = <&qca8075_1>;
+-	label = "wan";
+-	nvmem-cells = <&macaddr_dp2>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&dp3 {
+-	status = "okay";
+-	phy-handle = <&qca8075_2>;
+-	label = "lan1";
+-	nvmem-cells = <&macaddr_dp3>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&dp4 {
+-	status = "okay";
+-	phy-handle = <&qca8075_3>;
+-	label = "lan2";
+-	nvmem-cells = <&macaddr_dp4>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&dp5 {
+-	status = "okay";
+-	phy-handle = <&qca8075_4>;
+-	label = "lan3";
+-	nvmem-cells = <&macaddr_dp5>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&wifi {
+-	status = "okay";
+-
+-	qcom,ath11k-fw-memory-mode = <1>;
+-};
+diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax6.dts b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax6.dts
+deleted file mode 100644
+index 6611a8fe27..0000000000
+--- a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax6.dts
++++ /dev/null
+@@ -1,46 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2021, Zhijun You <hujy652@gmail.com> */
+-
+-/dts-v1/;
+-
+-#include "ipq8071-ax3600.dtsi"
+-
+-/ {
+-	model = "Redmi AX6";
+-	compatible = "redmi,ax6", "qcom,ipq8074";
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_system_blue: system-blue {
+-			label = "blue:system";
+-			gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_system_yellow: system-yellow {
+-			label = "yellow:system";
+-			gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		network-blue {
+-			label = "blue:network";
+-			gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		network-yellow {
+-			label = "yellow:network";
+-			gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-/* AX6 can both have NAND of 256MiB or 128MiB.
+- * To be on the safe side, assume 128MiB of NAND.
+- */
+-&rootfs {
+-	reg = <0x2dc0000 0x5220000>;
+-};
+-
+-&wifi {
+-	qcom,ath11k-calibration-variant = "Redmi-AX6";
+-};
+diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-eap102.dts b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-eap102.dts
+deleted file mode 100644
+index 357b6368d9..0000000000
+--- a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-eap102.dts
++++ /dev/null
+@@ -1,389 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2022, Matthew Hagan <mnhagan88@gmail.com> */
+-
+-/dts-v1/;
+-
+-#include "ipq8074.dtsi"
+-#include "ipq8074-ac-cpu.dtsi"
+-#include "ipq8074-ess.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-
+-/ {
+-	model = "Edgecore EAP102";
+-	compatible = "edgecore,eap102", "qcom,ipq8074";
+-
+-	aliases {
+-		serial0 = &blsp1_uart5;
+-		serial1 = &blsp1_uart3;
+-		led-boot = &led_system_green;
+-		led-failsafe = &led_system_green;
+-		led-running = &led_system_green;
+-		led-upgrade = &led_system_green;
+-		/* Aliases as required by u-boot to patch MAC addresses */
+-		ethernet0 = &dp5;
+-		ethernet1 = &dp6;
+-		label-mac-device = &dp5;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-		bootargs-append = " root=/dev/ubiblock0_1";
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-		pinctrl-0 = <&button_pins>;
+-		pinctrl-names = "default";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 66 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_wanpoe {
+-			label = "green:wanpoe";
+-			gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_wlan2g {
+-			label = "green:wlan2g";
+-			gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy1radio";
+-		};
+-
+-		led_wlan5g {
+-			label = "green:wlan5g";
+-			gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy0radio";
+-		};
+-
+-		led_system_green: led_system {
+-			label = "green:power";
+-			gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio-pins {
+-		mdc {
+-			pins = "gpio68";
+-			function = "mdc";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-
+-		mdio {
+-			pins = "gpio69";
+-			function = "mdio";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-	};
+-
+-	button_pins: button_pins {
+-		reset_button {
+-			pins = "gpio66";
+-			function = "gpio";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-	};
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	flash@0 {
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <50000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:sbl1";
+-				reg = <0x0 0x50000>;
+-				read-only;
+-			};
+-
+-			partition@50000 {
+-				label = "0:mibib";
+-				reg = <0x50000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "0:bootconfig";
+-				reg = <0x60000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@80000 {
+-				label = "0:bootconfig1";
+-				reg = <0x80000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@a0000 {
+-				label = "0:qsee";
+-				reg = <0xa0000 0x180000>;
+-				read-only;
+-			};
+-
+-			partition@220000 {
+-				label = "0:qsee_1";
+-				reg = <0x220000 0x180000>;
+-				read-only;
+-			};
+-
+-			partition@3a0000 {
+-				label = "0:devcfg";
+-				reg = <0x3a0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3b0000 {
+-				label = "0:devcfg_1";
+-				reg = <0x3b0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3c0000 {
+-				label = "0:apdp";
+-				reg = <0x3c0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3d0000 {
+-				label = "0:apdp_1";
+-				reg = <0x3d0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3e0000 {
+-				label = "0:rpm";
+-				reg = <0x3e0000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@420000 {
+-				label = "0:rpm_1";
+-				reg = <0x420000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@460000 {
+-				label = "0:cdt";
+-				reg = <0x460000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@470000 {
+-				label = "0:cdt_1";
+-				reg = <0x470000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@480000 {
+-				label = "0:appsblenv";
+-				reg = <0x480000 0x10000>;
+-			};
+-
+-			partition@490000 {
+-				label = "0:appsbl";
+-				reg = <0x490000 0xc0000>;
+-				read-only;
+-			};
+-
+-			partition@550000 {
+-				label = "0:appsbl_1";
+-				reg = <0x530000 0xc0000>;
+-				read-only;
+-			};
+-
+-			partition@610000 {
+-				label = "0:art";
+-				reg = <0x610000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@650000 {
+-				label = "0:ethphyfw";
+-				reg = <0x650000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@6d0000 {
+-				label = "0:product_info";
+-				reg = <0x6d0000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@750000 {
+-				label = "priv_data1";
+-				reg = <0x750000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@760000 {
+-				label = "priv_data2";
+-				reg = <0x760000 0x10000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart3 {
+-	status = "okay";
+-};
+-
+-&blsp1_uart5 {
+-	status = "okay";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&qusb_phy_0 {
+-	status = "okay";
+-};
+-
+-&ssphy_0 {
+-	status = "okay";
+-};
+-
+-&usb_0 {
+-	status = "okay";
+-};
+-
+-&qpic_nand {
+-	status = "okay";
+-
+-	nand@0 {
+-		reg = <0>;
+-		nand-ecc-strength = <8>;
+-		nand-ecc-step-size = <512>;
+-		nand-bus-width = <8>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "rootfs1";
+-				reg = <0x0000000 0x3400000>;
+-			};
+-
+-			partition@3400000 {
+-				label = "0:wififw";
+-				reg = <0x3400000 0x800000>;
+-				read-only;
+-			};
+-
+-			partition@3c00000 {
+-				label = "rootfs2";
+-				reg = <0x3c00000 0x3400000>;
+-			};
+-
+-			partition@7000000 {
+-				label = "0:wififw_1";
+-				reg = <0x7000000 0x800000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&mdio {
+-	status = "okay";
+-
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-
+-	qca8081_24: ethernet-phy@24 {
+-		compatible = "ethernet-phy-id004d.d101";
+-		reg = <24>;
+-		reset-gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
+-	};
+-
+-	qca8081_28: ethernet-phy@28 {
+-		compatible = "ethernet-phy-id004d.d101";
+-		reg = <28>;
+-		reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
+-	};
+-};
+-
+-&switch {
+-	status = "okay";
+-
+-	switch_cpu_bmp = <0x1>;  /* cpu port bitmap */
+-	switch_lan_bmp = <0x3e>; /* lan port bitmap */
+-	switch_wan_bmp = <0x40>; /* wan port bitmap */
+-	switch_mac_mode = <0xff>; /* mac mode for uniphy instance0*/
+-	switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/
+-	switch_mac_mode2 = <0xf>; /* mac mode for uniphy instance2*/
+-	bm_tick_mode = <0>; /* bm tick mode */
+-	tm_tick_mode = <0>; /* tm tick mode */
+-
+-	qcom,port_phyinfo {
+-		port@4 {
+-			port_id = <5>;
+-			phy_address = <24>;
+-			port_mac_sel = "QGMAC_PORT";
+-		};
+-		port@5 {
+-			port_id = <6>;
+-			phy_address = <28>;
+-			port_mac_sel = "QGMAC_PORT";
+-		};
+-	};
+-};
+-
+-&edma {
+-	status = "okay";
+-};
+-
+-&dp5 {
+-	status = "okay";
+-	phy-handle = <&qca8081_28>;
+-	label = "wan";
+-};
+-
+-&dp6 {
+-	status = "okay";
+-	phy-handle = <&qca8081_24>;
+-	label = "lan";
+-};
+-
+-&wifi {
+-	status = "okay";
+-
+-	qcom,ath11k-calibration-variant = "Edgecore-EAP102";
+-};
+diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-301w.dts b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-301w.dts
+deleted file mode 100644
+index 5521a480b8..0000000000
+--- a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-301w.dts
++++ /dev/null
+@@ -1,410 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2021, Dirk Buchwalder <buchwalder@posteo.de> */
+-
+-/dts-v1/;
+-
+-#include "ipq8074.dtsi"
+-#include "ipq8074-hk-cpu.dtsi"
+-#include "ipq8074-ess.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/leds/common.h>
+-
+-/ {
+-	model = "QNAP 301w";
+-	compatible = "qnap,301w", "qcom,ipq8074";
+-
+-	aliases {
+-		serial0 = &blsp1_uart5;
+-		/*
+-		 * Aliases as required by u-boot
+-		 * to patch MAC addresses
+-		 */
+-		led-boot = &led_system_red;
+-		led-failsafe = &led_system_red;
+-		led-running = &led_pwr_green;
+-		led-upgrade = &led_system_red;
+-		ethernet0 = &dp1;
+-		ethernet1 = &dp2;
+-		ethernet2 = &dp3;
+-		ethernet3 = &dp4;
+-		ethernet4 = &dp5;
+-		ethernet5 = &dp6_syn;
+-		label-mac-device = &dp1;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-		pinctrl-0 = <&button_pins>;
+-		pinctrl-names = "default";
+-
+-		wps-button {
+-			label = "wps";
+-			gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-
+-		reset-button {
+-			label = "reset";
+-			gpios = <&tlmm 67 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-		pinctrl-0 = <&leds_pins>;
+-		pinctrl-names = "default";
+-
+-		led_system_green: led-system-green {
+-			label = "green:system";
+-			gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_GREEN>;
+-		};
+-
+-		led_system_red: led-system-red {
+-			label = "red:system";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_RED>;
+-		};
+-
+-		led_pwr_green: led-pwr-green {
+-			label = "green:pwr";
+-			gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_GREEN>;
+-		};
+-
+-		led-wifi-green {
+-			label = "green:wifi";
+-			gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_GREEN>;
+-		};
+-
+-		led-lan4-green {
+-			label = "green:lan4";
+-			gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_GREEN>;
+-		};
+-
+-		led-lan4-amber {
+-			label = "amber:lan4";
+-			gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_AMBER>;
+-		};
+-
+-		led-lan3-green {
+-			label = "green:lan3";
+-			gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_GREEN>;
+-		};
+-
+-		led-lan3-amber {
+-			label = "amber:lan3";
+-			gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_AMBER>;
+-		};
+-
+-		led-lan2-green {
+-			label = "green:lan2";
+-			gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_GREEN>;
+-		};
+-
+-		led-lan2-amber {
+-			label = "amber:lan2";
+-			gpios = <&tlmm 13 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_AMBER>;
+-		};
+-
+-		led-lan1-green {
+-			label = "green:lan1";
+-			gpios = <&tlmm 14 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_GREEN>;
+-		};
+-
+-		led-lan1-amber {
+-			label = "amber:lan1";
+-			gpios = <&tlmm 15 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_AMBER>;
+-		};
+-
+-		led-10g-1-green {
+-			label = "green:10g_1";
+-			gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_GREEN>;
+-		};
+-
+-		led-10g-1-amber {
+-			label = "amber:10g_1";
+-			gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_AMBER>;
+-		};
+-
+-		led-10g-2-green {
+-			label = "green:10g_2";
+-			gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_GREEN>;
+-		};
+-
+-		led-10g-2-amber {
+-			label = "amber:10g_2";
+-			gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_AMBER>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-
+-	mdio_pins: mdio-state {
+-		mdc-pins {
+-			pins = "gpio68";
+-			function = "mdc";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-
+-		mdio-pins {
+-			pins = "gpio69";
+-			function = "mdio";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-	};
+-
+-	button_pins: button-state {
+-		wps-pins {
+-			pins = "gpio57";
+-			function = "gpio";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-
+-		rst-pins {
+-			pins = "gpio67";
+-			function = "gpio";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-	};
+-
+-	leds_pins: leds-state {
+-		pins = "gpio1", "gpio3", "gpio4", "gpio6", "gpio7", "gpio8",
+-		       "gpio11", "gpio12", "gpio13", "gpio14", "gpio15", "gpio42",
+-		       "gpio51", "gpio52", "gpio54", "gpio56";
+-		function = "gpio";
+-		drive-strength = <8>;
+-		bias-pull-down;
+-	};
+-};
+-
+-&blsp1_uart5 {
+-	status = "okay";
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+-
+-&ssphy_0 {
+-	status = "okay";
+-};
+-
+-&qusb_phy_0 {
+-	status = "okay";
+-};
+-
+-&ssphy_1 {
+-	status = "okay";
+-};
+-
+-&qusb_phy_1 {
+-	status = "okay";
+-};
+-
+-&usb_0 {
+-	status = "okay";
+-};
+-
+-&usb_1 {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 { /* BLSP1 QUP1 */
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <0>;
+-	status = "okay";
+-
+-	flash@0 {
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <50000000>;
+-
+-		partitions {
+-			compatible = "qcom,smem-part";
+-		};
+-	};
+-};
+-
+-&mdio {
+-	status = "okay";
+-
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-	reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
+-
+-	aqr113c_0: ethernet-phy@0 {
+-		compatible ="ethernet-phy-ieee802.3-c45";
+-		reg = <0>;
+-		reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
+-	};
+-
+-	aqr113c_8: ethernet-phy@8 {
+-		compatible ="ethernet-phy-ieee802.3-c45";
+-		reg = <8>;
+-		reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
+-	};
+-
+-	qca8075_16: ethernet-phy@16 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <16>;
+-	};
+-
+-	qca8075_17: ethernet-phy@17 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <17>;
+-	};
+-
+-	qca8075_18: ethernet-phy@18 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <18>;
+-	};
+-
+-	qca8075_19: ethernet-phy@19 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <19>;
+-	};
+-};
+-
+-&sdhc_1 {
+-	status = "okay";
+-
+-	/* According to the stock dts from the QNAP gpl drop
+-	 * the emmc has a problem with the hs400 > hs200 speed switch.
+-	 * Therefore remove the mmc-hs400-1_8v property
+-	*/
+-	/delete-property/ mmc-hs400-1_8v;
+-	mmc-hs200-1_8v;
+-	mmc-ddr-1_8v;
+-	vqmmc-supply = <&l11>;
+-};
+-
+-&switch {
+-	status = "okay";
+-
+-	switch_cpu_bmp = <0x1>;  /* cpu port bitmap */
+-	switch_lan_bmp = <0x3e>; /* lan port bitmap */
+-	switch_wan_bmp = <0xc0>; /* wan port bitmap */
+-	switch_mac_mode = <0xb>; /* mac mode for uniphy instance0*/
+-	switch_mac_mode1 = <0xd>; /* mac mode for uniphy instance1*/
+-	switch_mac_mode2 = <0xd>; /* mac mode for uniphy instance2*/
+-	bm_tick_mode = <0>; /* bm tick mode */
+-	tm_tick_mode = <0>; /* tm tick mode */
+-
+-	qcom,port_phyinfo {
+-		port@0 {
+-			port_id = <1>;
+-			phy_address = <16>;
+-		};
+-		port@1 {
+-			port_id = <2>;
+-			phy_address = <17>;
+-		};
+-		port@2 {
+-			port_id = <3>;
+-			phy_address = <18>;
+-		};
+-		port@3 {
+-			port_id = <4>;
+-			phy_address = <19>;
+-		};
+-		port@4 {
+-			port_id = <5>;
+-			phy_address = <8>;
+-			compatible = "ethernet-phy-ieee802.3-c45";
+-			ethernet-phy-ieee802.3-c45;
+-		};
+-		port@5 {
+-			port_id = <6>;
+-			phy_address = <0>;
+-			compatible = "ethernet-phy-ieee802.3-c45";
+-			ethernet-phy-ieee802.3-c45;
+-		};
+-	};
+-};
+-
+-&edma {
+-	status = "okay";
+-};
+-
+-&dp1 {
+-	status = "okay";
+-	phy-handle = <&qca8075_16>;
+-	label = "lan4";
+-};
+-
+-&dp2 {
+-	status = "okay";
+-	phy-handle = <&qca8075_17>;
+-	label = "lan3";
+-};
+-
+-&dp3 {
+-	status = "okay";
+-	phy-handle = <&qca8075_18>;
+-	label = "lan2";
+-};
+-
+-&dp4 {
+-	status = "okay";
+-	phy-handle = <&qca8075_19>;
+-	label = "lan1";
+-};
+-
+-&dp5 {
+-	status = "okay";
+-	qcom,mactype = <1>;
+-	phy-handle = <&aqr113c_8>;
+-	label = "10g-1";
+-};
+-
+-&dp6_syn {
+-	status = "okay";
+-	phy-handle = <&aqr113c_0>;
+-	label = "10g-2";
+-};
+-
+-&wifi {
+-	status = "okay";
+-
+-	qcom,ath11k-calibration-variant = "QNAP-301w";
+-};
+diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts
+deleted file mode 100644
+index 801aa05604..0000000000
+--- a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts
++++ /dev/null
+@@ -1,522 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2021, Robert Marko <robimarko@gmail.com> */
+-
+-/dts-v1/;
+-
+-#include "ipq8074.dtsi"
+-#include "ipq8074-hk-cpu.dtsi"
+-#include "ipq8074-ess.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/leds/common.h>
+-
+-/ {
+-	model = "Xiaomi AX9000";
+-	compatible = "xiaomi,ax9000", "qcom,ipq8074";
+-
+-	aliases {
+-		serial0 = &blsp1_uart5;
+-		led-boot = &led_system_yellow;
+-		led-failsafe = &led_system_yellow;
+-		led-running = &led_system_blue;
+-		led-upgrade = &led_system_yellow;
+-		label-mac-device = &dp5;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-		bootargs-append = " root=/dev/ubiblock0_0";
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-
+-		wps {
+-			label = "wps"; /* Labeled Mesh on the device */
+-			gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_system_blue: system-blue {
+-			label = "blue:system";
+-			gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_BLUE>;
+-		};
+-
+-		led_system_yellow: system-yellow {
+-			label = "yellow:system";
+-			gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_YELLOW>;
+-		};
+-
+-		network-yellow {
+-			label = "yellow:network";
+-			gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_YELLOW>;
+-		};
+-
+-		network-blue {
+-			label = "blue:network";
+-			gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_BLUE>;
+-		};
+-
+-		top-red {
+-			label = "red:top";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_RED>;
+-			default-state = "keep";
+-		};
+-
+-		top-green {
+-			label = "green:top";
+-			gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_GREEN>;
+-			default-state = "keep";
+-		};
+-
+-		top-blue {
+-			label = "blue:top";
+-			gpios = <&tlmm 66 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_BLUE>;
+-			default-state = "keep";
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio-pins {
+-		mdc {
+-			pins = "gpio68";
+-			function = "mdc";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-
+-		mdio {
+-			pins = "gpio69";
+-			function = "mdio";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-	};
+-
+-	i2c_pins: i2c-pins {
+-		pins = "gpio0", "gpio2";
+-		function = "blsp5_i2c";
+-		drive-strength = <8>;
+-		bias-disable;
+-	};
+-};
+-
+-&blsp1_uart5 {
+-	status = "okay";
+-};
+-
+-&blsp1_i2c6 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&i2c_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&qpic_nand {
+-	status = "okay";
+-
+-	/*
+-	 * Bootloader will find the NAND DT node by the compatible and
+-	 * then "fixup" it by adding the partitions from the SMEM table
+-	 * using the legacy bindings thus making it impossible for us
+-	 * to change the partition table or utilize NVMEM for calibration.
+-	 * So add a dummy partitions node that bootloader will populate
+-	 * and set it as disabled so the kernel ignores it instead of
+-	 * printing warnings due to the broken way bootloader adds the
+-	 * partitions.
+-	 */
+-	partitions {
+-		status = "disabled";
+-	};
+-
+-	nand@0 {
+-		reg = <0>;
+-		nand-ecc-strength = <4>;
+-		nand-ecc-step-size = <512>;
+-		nand-bus-width = <8>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:sbl1";
+-				reg = <0x0 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@100000 {
+-				label = "0:mibib";
+-				reg = <0x100000 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@200000 {
+-				label = "0:bootconfig";
+-				reg = <0x200000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@280000 {
+-				label = "0:bootconfig1";
+-				reg = <0x280000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@300000 {
+-				label = "0:qsee";
+-				reg = <0x300000 0x300000>;
+-				read-only;
+-			};
+-
+-			partition@600000 {
+-				label = "0:qsee_1";
+-				reg = <0x600000 0x300000>;
+-				read-only;
+-			};
+-
+-			partition@900000 {
+-				label = "0:devcfg";
+-				reg = <0x900000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@980000 {
+-				label = "0:devcfg_1";
+-				reg = <0x980000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@a00000 {
+-				label = "0:apdp";
+-				reg = <0xa00000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@a80000 {
+-				label = "0:apdp_1";
+-				reg = <0xa80000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@b00000 {
+-				label = "0:rpm";
+-				reg = <0xb00000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@b80000 {
+-				label = "0:rpm_1";
+-				reg = <0xb80000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@c00000 {
+-				label = "0:cdt";
+-				reg = <0xc00000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@c80000 {
+-				label = "0:cdt_1";
+-				reg = <0xc80000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@d00000 {
+-				label = "0:appsblenv";
+-				reg = <0xd00000 0x80000>;
+-			};
+-
+-			partition@d80000 {
+-				label = "0:appsbl";
+-				reg = <0xd80000 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@e80000 {
+-				label = "0:appsbl_1";
+-				reg = <0xe80000 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@f80000 {
+-				label = "0:art";
+-				reg = <0xf80000 0x80000>;
+-				read-only;
+-
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				macaddr_dp1: macaddr@0 {
+-					reg = <0x0 0x6>;
+-				};
+-
+-				macaddr_dp2: macaddr@6 {
+-					reg = <0x6 0x6>;
+-				};
+-
+-				macaddr_dp3: macaddr@c {
+-					reg = <0xc 0x6>;
+-				};
+-
+-				macaddr_dp4: macaddr@12 {
+-					reg = <0x12 0x6>;
+-				};
+-
+-				macaddr_dp5: macaddr@18 {
+-					reg = <0x18 0x6>;
+-				};
+-
+-				caldata_qca9889: caldata@4d000 {
+-					reg = <0x4d000 0x844>;
+-				};
+-			};
+-
+-			partition@1000000 {
+-				label = "bdata";
+-				reg = <0x1000000 0x80000>;
+-			};
+-
+-			partition@1080000 {
+-				/* This is crash + crash_syslog parts combined */
+-				label = "pstore";
+-				reg = <0x1080000 0x100000>;
+-			};
+-
+-			partition@1180000 {
+-				label = "ubi_kernel";
+-				reg = <0x1180000 0x3800000>;
+-			};
+-
+-			partition@4980000 {
+-				label = "rootfs";
+-				reg = <0x4980000 0xb680000>;
+-			};
+-		};
+-	};
+-};
+-
+-&qusb_phy_0 {
+-	status = "okay";
+-};
+-
+-&ssphy_0 {
+-	status = "okay";
+-};
+-
+-&usb_0 {
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-	reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
+-
+-	qca8075_0: ethernet-phy@0 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <0>;
+-	};
+-
+-	qca8075_1: ethernet-phy@1 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <1>;
+-	};
+-
+-	qca8075_2: ethernet-phy@2 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <2>;
+-	};
+-
+-	qca8075_3: ethernet-phy@3 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <3>;
+-	};
+-
+-	qca8081: ethernet-phy@24 {
+-		compatible = "ethernet-phy-id004d.d101";
+-		reg = <24>;
+-		reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
+-	};
+-};
+-
+-&switch {
+-	status = "okay";
+-
+-	switch_cpu_bmp = <0x1>;  /* cpu port bitmap */
+-	switch_lan_bmp = <0x1e>; /* lan port bitmap */
+-	switch_wan_bmp = <0x20>; /* wan port bitmap */
+-	switch_mac_mode = <0xb>; /* mac mode for uniphy instance0*/
+-	switch_mac_mode1 = <0xc>; /* mac mode for uniphy instance1*/
+-	switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
+-	bm_tick_mode = <0>; /* bm tick mode */
+-	tm_tick_mode = <0>; /* tm tick mode */
+-
+-	qcom,port_phyinfo {
+-		port@0 {
+-			port_id = <1>;
+-			phy_address = <0>;
+-		};
+-		port@1 {
+-			port_id = <2>;
+-			phy_address = <1>;
+-		};
+-		port@2 {
+-			port_id = <3>;
+-			phy_address = <2>;
+-		};
+-		port@3 {
+-			port_id = <4>;
+-			phy_address = <3>;
+-		};
+-		port@4 {
+-			port_id = <5>;
+-			phy_address = <24>;
+-			port_mac_sel = "QGMAC_PORT";
+-		};
+-	};
+-};
+-
+-&edma {
+-	status = "okay";
+-};
+-
+-&dp1 {
+-	status = "okay";
+-	phy-handle = <&qca8075_0>;
+-	label = "lan4";
+-	nvmem-cells = <&macaddr_dp1>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&dp2 {
+-	status = "okay";
+-	phy-handle = <&qca8075_1>;
+-	label = "lan3";
+-	nvmem-cells = <&macaddr_dp2>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&dp3 {
+-	status = "okay";
+-	phy-handle = <&qca8075_2>;
+-	label = "lan2";
+-	nvmem-cells = <&macaddr_dp3>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&dp4 {
+-	status = "okay";
+-	phy-handle = <&qca8075_3>;
+-	label = "lan1";
+-	nvmem-cells = <&macaddr_dp4>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&dp5 {
+-	status = "okay";
+-	phy-handle = <&qca8081>;
+-	label = "wan";
+-	nvmem-cells = <&macaddr_dp5>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&pcie_qmp0 {
+-	status = "okay";
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-
+-	perst-gpio = <&tlmm 58 GPIO_ACTIVE_LOW>;
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi@1,0 {
+-			status = "okay";
+-
+-			/* ath11k has no DT compatible for PCI cards */
+-			compatible = "pci17cb,1104";
+-			reg = <0x00010000 0 0 0 0>;
+-
+-			qcom,ath11k-calibration-variant = "Xiaomi-AX9000";
+-		};
+-	};
+-};
+-
+-&pcie_qmp1 {
+-	status = "okay";
+-};
+-
+-&pcie1 {
+-	status = "okay";
+-
+-	perst-gpio = <&tlmm 62 GPIO_ACTIVE_HIGH>;
+-
+-	bridge@1,0 {
+-		reg = <0x00010000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi@1,0 {
+-			status = "okay";
+-
+-			compatible = "qcom,ath10k";
+-			reg = <0x00010000 0 0 0 0>;
+-
+-			qcom,ath10k-calibration-variant = "Xiaomi-AX9000";
+-			nvmem-cell-names = "calibration";
+-			nvmem-cells = <&caldata_qca9889>;
+-		};
+-	};
+-};
+-
+-&wifi {
+-	status = "okay";
+-
+-	qcom,ath11k-calibration-variant = "Xiaomi-AX9000";
+-};
+diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts
+deleted file mode 100644
+index 5468e9e1fb..0000000000
+--- a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts
++++ /dev/null
+@@ -1,243 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2022, Robert Marko <robimarko@gmail.com> */
+-
+-/dts-v1/;
+-
+-#include "ipq8074.dtsi"
+-#include "ipq8074-hk-cpu.dtsi"
+-#include "ipq8074-ess.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/leds/common.h>
+-
+-/ {
+-	model = "Dynalink DL-WRX36";
+-	compatible = "dynalink,dl-wrx36", "qcom,ipq8074";
+-
+-	aliases {
+-		led-boot = &led_system_red;
+-		led-failsafe = &led_system_red;
+-		led-running = &led_system_blue;
+-		led-upgrade = &led_system_red;
+-		serial0 = &blsp1_uart5;
+-		/* Aliases as required by u-boot to patch MAC addresses */
+-		ethernet0 = &dp6_syn;
+-		ethernet1 = &dp4;
+-		ethernet2 = &dp3;
+-		ethernet3 = &dp2;
+-		ethernet4 = &dp1;
+-		label-mac-device = &dp6_syn;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-		bootargs-append = " root=/dev/ubiblock0_1";
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-
+-		wps {
+-			label = "wps";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_system_blue: system-blue {
+-			label = "blue:system";
+-			gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_BLUE>;
+-		};
+-
+-		led_system_red: system-red {
+-			label = "red:system";
+-			gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_RED>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio-pins {
+-		mdc {
+-			pins = "gpio68";
+-			function = "mdc";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-
+-		mdio {
+-			pins = "gpio69";
+-			function = "mdio";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-	};
+-};
+-
+-&blsp1_uart5 {
+-	status = "okay";
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&qpic_nand {
+-	status = "okay";
+-
+-	nand@0 {
+-		reg = <0>;
+-		nand-ecc-strength = <8>;
+-		nand-ecc-step-size = <512>;
+-		nand-bus-width = <8>;
+-
+-		partitions {
+-			compatible = "qcom,smem-part";
+-		};
+-	};
+-};
+-
+-&qusb_phy_0 {
+-	status = "okay";
+-};
+-
+-&ssphy_0 {
+-	status = "okay";
+-};
+-
+-&usb_0 {
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-	reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
+-
+-	qca8075_0: ethernet-phy@0 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <0>;
+-	};
+-
+-	qca8075_1: ethernet-phy@1 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <1>;
+-	};
+-
+-	qca8075_2: ethernet-phy@2 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <2>;
+-	};
+-
+-	qca8075_3: ethernet-phy@3 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <3>;
+-	};
+-
+-	qca8081: ethernet-phy@28 {
+-		compatible = "ethernet-phy-id004d.d101";
+-		reg = <28>;
+-		reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
+-	};
+-};
+-
+-&switch {
+-	status = "okay";
+-
+-	switch_cpu_bmp = <0x1>;  /* cpu port bitmap */
+-	switch_lan_bmp = <0x3e>; /* lan port bitmap */
+-	switch_wan_bmp = <0x40>; /* wan port bitmap */
+-	switch_mac_mode = <0xb>; /* mac mode for uniphy instance0*/
+-	switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
+-	switch_mac_mode2 = <0xc>; /* mac mode for uniphy instance2*/
+-	bm_tick_mode = <0>; /* bm tick mode */
+-	tm_tick_mode = <0>; /* tm tick mode */
+-
+-	qcom,port_phyinfo {
+-		port@0 {
+-			port_id = <1>;
+-			phy_address = <0>;
+-		};
+-		port@1 {
+-			port_id = <2>;
+-			phy_address = <1>;
+-		};
+-		port@2 {
+-			port_id = <3>;
+-			phy_address = <2>;
+-		};
+-		port@3 {
+-			port_id = <4>;
+-			phy_address = <3>;
+-		};
+-		port@5 {
+-			port_id = <6>;
+-			phy_address = <28>;
+-			port_mac_sel = "QGMAC_PORT";
+-		};
+-	};
+-};
+-
+-&edma {
+-	status = "okay";
+-};
+-
+-&dp1 {
+-	status = "okay";
+-	phy-handle = <&qca8075_0>;
+-	label = "lan4";
+-};
+-
+-&dp2 {
+-	status = "okay";
+-	phy-handle = <&qca8075_1>;
+-	label = "lan3";
+-};
+-
+-&dp3 {
+-	status = "okay";
+-	phy-handle = <&qca8075_2>;
+-	label = "lan2";
+-};
+-
+-&dp4 {
+-	status = "okay";
+-	phy-handle = <&qca8075_3>;
+-	label = "lan1";
+-};
+-
+-&dp6_syn {
+-	status = "okay";
+-	phy-handle = <&qca8081>;
+-	label = "wan";
+-};
+-
+-&wifi {
+-	status = "okay";
+-	qcom,ath11k-calibration-variant = "Dynalink-DL-WRX36";
+-};
+diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-haze.dts b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-haze.dts
+deleted file mode 100644
+index 8a5200b4eb..0000000000
+--- a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-haze.dts
++++ /dev/null
+@@ -1,308 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-/dts-v1/;
+-
+-#include "ipq8074.dtsi"
+-#include "ipq8074-hk-cpu.dtsi"
+-#include "ipq8074-ess.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/leds/common.h>
+-
+-/ {
+-	model = "prpl Foundation Haze";
+-	compatible = "prpl,haze", "qcom,ipq8074";
+-
+-	aliases {
+-		serial0 = &blsp1_uart5;
+-		/* Aliases are required by U-Boot to patch MAC addresses */
+-		ethernet0 = &dp6_syn;
+-		ethernet1 = &dp4;
+-		ethernet2 = &dp3;
+-		ethernet3 = &dp2;
+-		label-mac-device = &dp6_syn;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-		pinctrl-0 = <&button_pins>;
+-		pinctrl-names = "default";
+-
+-		wps-button {
+-			label = "wps";
+-			gpios = <&tlmm 42 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-
+-		reset-button {
+-			label = "reset";
+-			gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio-state {
+-		mdc-pins {
+-			pins = "gpio68";
+-			function = "mdc";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-
+-		mdio-pins {
+-			pins = "gpio69";
+-			function = "mdio";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-	};
+-
+-	button_pins: button-state {
+-		wps-pins {
+-			pins = "gpio42";
+-			function = "gpio";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-
+-		rst-pins {
+-			pins = "gpio44";
+-			function = "gpio";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-	};
+-};
+-
+-&blsp1_uart5 {
+-	status = "okay";
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+-
+-&ssphy_0 {
+-	status = "okay";
+-};
+-
+-&qusb_phy_0 {
+-	status = "okay";
+-};
+-
+-&ssphy_1 {
+-	status = "okay";
+-};
+-
+-&qusb_phy_1 {
+-	status = "okay";
+-};
+-
+-&usb_0 {
+-	status = "okay";
+-};
+-
+-&usb_1 {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 { /* BLSP1 QUP1 */
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <0>;
+-	status = "okay";
+-
+-	flash@0 {
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <50000000>;
+-
+-		partitions {
+-			compatible = "qcom,smem-part";
+-		};
+-	};
+-};
+-
+-&mdio {
+-	status = "okay";
+-
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-	reset-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
+-
+-	qca8075_1: ethernet-phy@0 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <0>;
+-	};
+-
+-	qca8075_2: ethernet-phy@1 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <1>;
+-	};
+-
+-	qca8075_3: ethernet-phy@2 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <2>;
+-	};
+-
+-	qca8075_4: ethernet-phy@3 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <3>;
+-	};
+-
+-	aqr113c: ethernet-phy@5 {
+-		compatible ="ethernet-phy-ieee802.3-c45";
+-		reg = <8>;
+-		reset-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
+-	};
+-};
+-
+-&sdhc_1 {
+-	status = "okay";
+-
+-	vqmmc-supply = <&l11>;
+-};
+-
+-&switch {
+-	status = "okay";
+-
+-	switch_cpu_bmp = <0x1>;  /* cpu port bitmap */
+-	switch_lan_bmp = <0x1e>; /* lan port bitmap */
+-	switch_wan_bmp = <0x60>; /* wan port bitmap */
+-	switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
+-	switch_mac_mode1 = <0xe>; /* mac mode for uniphy instance1*/
+-	switch_mac_mode2 = <0xd>; /* mac mode for uniphy instance2*/
+-	bm_tick_mode = <0>; /* bm tick mode */
+-	tm_tick_mode = <0>; /* tm tick mode */
+-
+-	qcom,port_phyinfo {
+-		port@0 {
+-			port_id = <1>;
+-			phy_address = <0>;
+-		};
+-		port@1 {
+-			port_id = <2>;
+-			phy_address = <1>;
+-		};
+-		port@2 {
+-			port_id = <3>;
+-			phy_address = <2>;
+-		};
+-		port@3 {
+-			port_id = <4>;
+-			phy_address = <3>;
+-		};
+-		port@4 {
+-			port_id = <6>;
+-			phy_address = <8>;
+-			compatible = "ethernet-phy-ieee802.3-c45";
+-			ethernet-phy-ieee802.3-c45;
+-		};
+-	};
+-};
+-
+-&edma {
+-	status = "okay";
+-};
+-
+-/* Dummy LAN port */
+-&dp1 {
+-	status = "disabled";
+-	phy-handle = <&qca8075_1>;
+-	label = "lan4";
+-};
+-
+-&dp2 {
+-	status = "okay";
+-	phy-handle = <&qca8075_2>;
+-	label = "lan3";
+-};
+-
+-&dp3 {
+-	status = "okay";
+-	phy-handle = <&qca8075_3>;
+-	label = "lan2";
+-};
+-
+-&dp4 {
+-	status = "okay";
+-	phy-handle = <&qca8075_4>;
+-	label = "lan1";
+-};
+-
+-&dp6_syn {
+-	status = "okay";
+-	qcom,mactype = <1>;
+-	phy-handle = <&aqr113c>;
+-	label = "wan";
+-};
+-
+-&pcie_qmp0 {
+-	status = "okay";
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-
+-	perst-gpio = <&tlmm 58 GPIO_ACTIVE_LOW>;
+-
+-	bridge@0,0 {
+-		reg = <0x00020000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-	};
+-};
+-
+-&pcie_qmp1 {
+-	status = "okay";
+-};
+-
+-&pcie1 {
+-	status = "okay";
+-
+-	perst-gpio = <&tlmm 61 GPIO_ACTIVE_LOW>;
+-
+-	bridge@1,0 {
+-		reg = <0x00010000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi@1,0 {
+-			status = "okay";
+-
+-			/* ath11k has no DT compatible for PCI cards */
+-			compatible = "pci17cb,1104";
+-			reg = <0x00010000 0 0 0 0>;
+-
+-			qcom,ath11k-calibration-variant = "prpl-Haze";
+-		};
+-	};
+-};
+-
+-&wifi {
+-	status = "okay";
+-
+-	qcom,ath11k-calibration-variant = "prpl-Haze";
+-};
+diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-wax218.dts b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-wax218.dts
+deleted file mode 100644
+index 5bfcdcc8ca..0000000000
+--- a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-wax218.dts
++++ /dev/null
+@@ -1,191 +0,0 @@
+-/dts-v1/;
+-
+-#include "ipq8074.dtsi"
+-#include "ipq8074-hk-cpu.dtsi"
+-#include "ipq8074-ess.dtsi"
+-
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/gpio/gpio.h>
+-
+-/ {
+-	model = "Netgear WAX218";
+-	compatible = "netgear,wax218", "qcom,ipq8074";
+-
+-	aliases {
+-		serial0 = &blsp1_uart5;
+-		led-boot = &led_power_amber;
+-		led-failsafe = &led_power_amber;
+-		led-running = &led_power_amber;
+-		led-upgrade = &led_power_amber;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-		/*
+-		 * Netgear's U-Boot adds "ubi.mtd=rootfs root=mtd:ubi_rootfs"
+-		 * That fails to create a UBI block device, so add it here.
+-		*/
+-		bootargs-append = " ubi.block=0,rootfs root=/dev/ubiblock0_1";
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 52 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	led_spi {
+-		compatible = "spi-gpio";
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+-		sck-gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>;
+-		mosi-gpios = <&tlmm 19 GPIO_ACTIVE_HIGH>;
+-
+-		led_gpio: led_gpio@0 {
+-			compatible = "fairchild,74hc595";
+-			reg = <0>;
+-			gpio-controller;
+-			#gpio-cells = <2>;
+-			registers-number = <1>;
+-			enable-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>;
+-			spi-max-frequency = <1000000>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_power_amber: led_power {
+-			label = "amber:power";
+-			gpios = <&led_gpio 1 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_lan {
+-			label = "blue:lan";
+-			gpios = <&led_gpio 2 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_wlan_2g {
+-			label = "blue:wlan2g";
+-			gpios = <&led_gpio 3 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_wlan_5g {
+-			label = "blue:wlan5g";
+-			gpios = <&led_gpio 4 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&edma {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-
+-	switch_cpu_bmp = <0x1>;
+-	switch_lan_bmp = <0x3e>;
+-	switch_wan_bmp = <0x40>;
+-	switch_mac_mode = <0x00>;
+-	switch_mac_mode1 = <0xff>;
+-	switch_mac_mode2 = <0x0f>;
+-	bm_tick_mode = <0>;
+-	tm_tick_mode = <0>;
+-
+-	qcom,port_phyinfo {
+-		port@5 {
+-			port_id = <6>;
+-			phy_address = <28>;
+-			port_mac_sel = "QGMAC_PORT";
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio-pins {
+-		mdc {
+-			pins = "gpio68";
+-			function = "mdc";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-
+-		mdio {
+-			pins = "gpio69";
+-			function = "mdio";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-	};
+-};
+-
+-&mdio {
+-	status = "okay";
+-
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-	reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
+-
+-	qca8081_28: ethernet-phy@28 {
+-		reg = <28>;
+-	};
+-};
+-
+-&dp6_syn {
+-	status = "okay";
+-	phy-handle = <&qca8081_28>;
+-	label = "lan";
+-	nvmem-cells = <&macaddr_ubootenv_ethaddr>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&qpic_nand {
+-	status = "okay";
+-
+-	nand@0 {
+-		reg = <0>;
+-		nand-ecc-strength = <4>;
+-		nand-ecc-step-size = <512>;
+-		nand-bus-width = <8>;
+-
+-		partitions {
+-			compatible = "qcom,smem-part";
+-
+-			partition-0-appsblenv {
+-				compatible = "fixed-partitions";
+-				label = "0:appsblenv";
+-				read-only;
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				partition@0 {
+-					compatible = "u-boot,env";
+-					label = "env-data";
+-					reg = <0x0 0x40000>;
+-
+-					macaddr_ubootenv_ethaddr: ethaddr {};
+-				};
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart5 {
+-	status = "okay";
+-};
+-
+-&wifi {
+-	status = "okay";
+-
+-	qcom,ath11k-calibration-variant = "Netgear-WAX218";
+-};
+diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-512m.dtsi b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-512m.dtsi
+deleted file mode 100644
+index dace4008b3..0000000000
+--- a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-512m.dtsi
++++ /dev/null
+@@ -1,19 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only
+-
+-#include "ipq8074.dtsi"
+-
+-&tzapp_region {
+-	reg = <0x0 0x4a400000 0x0 0x100000>;
+-};
+-
+-&q6_region {
+-	reg = <0x0 0x4b000000 0x0 0x3700000>;
+-};
+-
+-&q6_etr_region {
+-	reg = <0x0 0x4e700000 0x0 0x100000>;
+-};
+-
+-&m3_dump_region {
+-	reg = <0x0 0x4e800000 0x0 0x100000>;
+-};
+diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-ac-cpu.dtsi b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-ac-cpu.dtsi
+deleted file mode 100644
+index dbc9baa2b9..0000000000
+--- a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-ac-cpu.dtsi
++++ /dev/null
+@@ -1,153 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only
+-
+-#include <dt-bindings/thermal/thermal.h>
+-#include "ipq8074-cpr-regulator.dtsi"
+-
+-&CPU0 {
+-	cpu-supply = <&apc_vreg>;
+-	voltage-tolerance = <1>;
+-};
+-
+-&CPU1 {
+-	cpu-supply = <&apc_vreg>;
+-	voltage-tolerance = <1>;
+-};
+-
+-&CPU2 {
+-	cpu-supply = <&apc_vreg>;
+-	voltage-tolerance = <1>;
+-};
+-
+-&CPU3 {
+-	cpu-supply = <&apc_vreg>;
+-	voltage-tolerance = <1>;
+-};
+-&cpu0_thermal {
+-	trips {
+-		cpu0_passive: cpu-passive {
+-			temperature = <95000>;
+-			hysteresis = <2000>;
+-			type = "passive";
+-		};
+-
+-		cpu0_crit: cpu_crit {
+-			temperature = <110000>;
+-			hysteresis = <1000>;
+-			type = "critical";
+-		};
+-	};
+-
+-	cooling-maps {
+-		map0 {
+-			trip = <&cpu0_passive>;
+-			cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-		};
+-	};
+-};
+-
+-&cpu1_thermal {
+-	trips {
+-		cpu1_passive: cpu-passive {
+-			temperature = <95000>;
+-			hysteresis = <2000>;
+-			type = "passive";
+-		};
+-
+-		cpu1_crit: cpu_crit {
+-			temperature = <110000>;
+-			hysteresis = <1000>;
+-			type = "critical";
+-		};
+-	};
+-
+-	cooling-maps {
+-		map0 {
+-			trip = <&cpu1_passive>;
+-			cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-		};
+-	};
+-};
+-
+-&cpu2_thermal {
+-	trips {
+-		cpu2_passive: cpu-passive {
+-			temperature = <95000>;
+-			hysteresis = <2000>;
+-			type = "passive";
+-		};
+-
+-		cpu2_crit: cpu_crit {
+-			temperature = <110000>;
+-			hysteresis = <1000>;
+-			type = "critical";
+-		};
+-	};
+-
+-	cooling-maps {
+-		map0 {
+-			trip = <&cpu2_passive>;
+-			cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-		};
+-	};
+-};
+-
+-&cpu3_thermal {
+-	trips {
+-		cpu3_passive: cpu-passive {
+-			temperature = <95000>;
+-			hysteresis = <2000>;
+-			type = "passive";
+-		};
+-
+-		cpu3_crit: cpu_crit {
+-			temperature = <110000>;
+-			hysteresis = <1000>;
+-			type = "critical";
+-		};
+-	};
+-
+-	cooling-maps {
+-		map0 {
+-			trip = <&cpu3_passive>;
+-			cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-		};
+-	};
+-};
+-
+-&cluster_thermal {
+-	trips {
+-		cluster_passive: cluster-passive {
+-			temperature = <95000>;
+-			hysteresis = <2000>;
+-			type = "passive";
+-		};
+-
+-		cluster_crit: cluster_crit {
+-			temperature = <110000>;
+-			hysteresis = <1000>;
+-			type = "critical";
+-		};
+-	};
+-
+-	cooling-maps {
+-		map0 {
+-			trip = <&cluster_passive>;
+-			cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-		};
+-	};
+-};
+diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-cpr-regulator.dtsi b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-cpr-regulator.dtsi
+deleted file mode 100644
+index e351a2e759..0000000000
+--- a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-cpr-regulator.dtsi
++++ /dev/null
+@@ -1,228 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only
+-
+-#include "pmp8074.dtsi"
+-
+-&soc {
+-	apc_apm: apm@b111000 {
+-		compatible = "qcom,ipq807x-apm";
+-		reg = <0xb111000 0x1000>;
+-		reg-names = "pm-apcc-glb";
+-		qcom,apm-post-halt-delay = <0x2>;
+-		qcom,apm-halt-clk-delay = <0x11>;
+-		qcom,apm-resume-clk-delay = <0x10>;
+-		qcom,apm-sel-switch-delay = <0x01>;
+-	};
+-
+-	apc_cpr: cpr4-ctrl@b018000 {
+-		compatible = "qcom,cpr4-ipq807x-apss-regulator";
+-		reg = <0xb018000 0x4000>, <0xa4000 0x1000>, <0x0193d008 0x4>;
+-		reg-names = "cpr_ctrl", "fuse_base", "cpr_tcsr_reg";
+-		interrupts = <GIC_SPI 15 IRQ_TYPE_EDGE_RISING>;
+-		interrupt-names = "cpr";
+-		qcom,cpr-ctrl-name = "apc";
+-		qcom,cpr-sensor-time = <1000>;
+-		qcom,cpr-loop-time = <5000000>;
+-		qcom,cpr-idle-cycles = <15>;
+-		qcom,cpr-step-quot-init-min = <12>;
+-		qcom,cpr-step-quot-init-max = <14>;
+-		qcom,cpr-count-mode = <0>;		/* All-at-once */
+-		qcom,cpr-count-repeat = <14>;
+-		qcom,cpr-down-error-step-limit = <1>;
+-		qcom,cpr-up-error-step-limit = <1>;
+-		qcom,apm-ctrl = <&apc_apm>;
+-		qcom,apm-threshold-voltage = <848000>;
+-		vdd-supply = <&s3>;
+-		qcom,voltage-step = <8000>;
+-
+-		thread@0 {
+-			qcom,cpr-thread-id = <0>;
+-			qcom,cpr-consecutive-up = <0>;
+-			qcom,cpr-consecutive-down = <0>;
+-			qcom,cpr-up-threshold = <4>;
+-			qcom,cpr-down-threshold = <1>;
+-
+-			apc_vreg: regulator {
+-				regulator-name = "apc_corner";
+-				regulator-min-microvolt = <1>;
+-				regulator-max-microvolt = <6>;
+-				qcom,cpr-part-types = <2>;
+-				qcom,cpr-parts-voltage = <1048000>;
+-				qcom,cpr-parts-voltage-v2 = <992000>;
+-				qcom,cpr-fuse-corners = <4>;
+-				qcom,cpr-fuse-combos = <8>;
+-				qcom,cpr-corners = <6>;
+-				qcom,cpr-speed-bins = <1>;
+-				qcom,cpr-speed-bin-corners = <6>;
+-				qcom,cpr-corner-fmax-map = <1 3 5 6>;
+-				qcom,allow-voltage-interpolation;
+-				qcom,allow-quotient-interpolation;
+-				qcom,cpr-scaled-open-loop-voltage-as-ceiling;
+-				qcom,cpr-voltage-ceiling =
+-					<840000 904000 944000
+-					 984000 992000 1064000>;
+-				qcom,cpr-voltage-floor =
+-					<592000 648000 712000
+-					 744000 784000 848000>;
+-				qcom,corner-frequencies =
+-					<1017600000 1382400000 1651200000
+-					1843200000 1920000000 2208000000>;
+-
+-				/* TT/FF parts i.e. turbo L1 OL voltage < 1048 mV */
+-				qcom,cpr-open-loop-voltage-fuse-adjustment-0 =
+-					/* Speed bin 0; CPR rev 0..7 */
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0 12000>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>;
+-
+-				/* SS parts i.e turbo L1 OL voltage >= 1048 mV */
+-				qcom,cpr-open-loop-voltage-fuse-adjustment-1 =
+-					/* Speed bin 0; CPR rev 0..7 */
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					< 20000  26000      0 20000>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>;
+-
+-				/* v2 - FF parts i.e. turbo L1 OL voltage < 992 mV */
+-				qcom,cpr-open-loop-voltage-fuse-adjustment-v2-0 =
+-                                        /* Speed bin 0; CPR rev 0..7 */
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>;
+-
+-				/* v2 - SS/TT parts i.e turbo L1 OL voltage >= 992 mV */
+-				qcom,cpr-open-loop-voltage-fuse-adjustment-v2-1 =
+-					/* Speed bin 0; CPR rev 0..7 */
+-					<     0      0      0     0>,
+-					<     0   7000  36000  4000>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>;
+-
+-				/* v2 - FF parts i.e. turbo L1 OL voltage < 992 mV */
+-				qcom,cpr-closed-loop-voltage-adjustment-v2-0 =
+-					/* Speed bin 0; CPR rev 0..7 */
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>;
+-
+-				/* v2 - SS/TT parts i.e turbo L1 OL voltage >= 992 mV */
+-				qcom,cpr-closed-loop-voltage-adjustment-v2-1 =
+-					/* Speed bin 0; CPR rev 0..7 */
+-					<     0      0      0     0>,
+-					<     0      0      19000 0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>,
+-					<     0      0      0     0>;
+-
+-				qcom,cpr-ro-scaling-factor =
+-					< 3970 4150 0    2280 2520 2470 2250 2280
+-					  2390 2330 2530 2500  850 2900 2510 2170 >,
+-					< 3970 4150 0    2280 2520 2470 2250 2280
+-					  2390 2330 2530 2500  850 2900 2510 2170 >,
+-					< 3970 4150 0    2280 2520 2470 2250 2280
+-					  2390 2330 2530 2500  850 2900 2510 2170 >,
+-					< 3970 4150 0    2280 2520 2470 2250 2280
+-					  2390 2330 2530 2500  850 2900 2510 2170 >;
+-
+-				qcom,cpr-floor-to-ceiling-max-range =
+-					< 40000 40000 40000 40000 40000 40000>,
+-					< 40000 40000 40000 40000 40000 40000>,
+-					< 40000 40000 40000 40000 40000 40000>,
+-					< 40000 40000 40000 40000 40000 40000>,
+-					< 40000 40000 40000 40000 40000 40000>,
+-					< 40000 40000 40000 40000 40000 40000>,
+-					< 40000 40000 40000 40000 40000 40000>,
+-					< 40000 40000 40000 40000 40000 40000>;
+-				regulator-always-on;
+-			};
+-		};
+-	};
+-
+-	npu_cpr: npu-cpr {
+-		compatible = "qcom,cpr3-ipq807x-npu-regulator";
+-		reg = <0xa4000 0x1000>, <0x0193d008 0x4>;
+-		reg-names = "fuse_base", "cpr_tcsr_reg";
+-		qcom,cpr-ctrl-name = "npu";
+-		vdd-supply = <&s4>;
+-		qcom,voltage-step = <8000>;
+-		thread@0 {
+-			qcom,cpr-thread-id = <0>;
+-			qcom,cpr-consecutive-up = <0>;
+-			qcom,cpr-consecutive-down = <2>;
+-			qcom,cpr-up-threshold = <2>;
+-			qcom,cpr-down-threshold = <1>;
+-
+-			npu_vreg: regulator {
+-				regulator-name = "npu_corner";
+-				regulator-min-microvolt = <1>;
+-				regulator-max-microvolt = <3>;
+-				qcom,cpr-part-types = <2>;
+-				qcom,cpr-parts-voltage = <968000>;
+-				qcom,cpr-parts-voltage-v2 = <832001>;
+-				qcom,cpr-cold-temp-threshold-v2 = <30>;
+-				qcom,cpr-fuse-corners = <2>;
+-				qcom,cpr-fuse-combos = <1>;
+-				qcom,cpr-corners = <2>;
+-				qcom,cpr-speed-bins = <1>;
+-				qcom,cpr-speed-bin-corners = <2>;
+-				qcom,allow-voltage-interpolation;
+-				qcom,cpr-corner-fmax-map = <1 2>;
+-				qcom,cpr-voltage-ceiling =
+-					<912000 992000>;
+-				qcom,cpr-voltage-floor =
+-					<752000 792000>;
+-				qcom,corner-frequencies =
+-					<1497600000 1689600000>;
+-
+-				/* TT/FF parts i.e. turbo OL voltage < 968 mV */
+-				qcom,cpr-open-loop-voltage-fuse-adjustment-0 =
+-					< 40000   40000>;
+-
+-				/* SS parts i.e turbo OL voltage >= 968 mV */
+-				qcom,cpr-open-loop-voltage-fuse-adjustment-1 =
+-					< 24000   24000>;
+-
+-				/* FF parts i.e. turbo OL voltage <= 832 mV */
+-				qcom,cpr-open-loop-voltage-fuse-adjustment-v2-0=
+-					<40000   40000>;
+-
+-				 /* TT/SS parts i.e turbo OL voltage > 832 mV */
+-				qcom,cpr-open-loop-voltage-fuse-adjustment-v2-1=
+-					<40000   40000>;
+-
+-				/* FF parts i.e. turbo OL voltage <= 832 mV */
+-				qcom,cpr-cold-temp-voltage-adjustment-v2-0 =
+-					<0   0>;
+-
+-				/* TT/SS parts i.e turbo OL voltage > 832 mV */
+-				qcom,cpr-cold-temp-voltage-adjustment-v2-1 =
+-					<35000   27000>;
+-			};
+-		};
+-	};
+-};
+diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-ess.dtsi b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-ess.dtsi
+deleted file mode 100644
+index 129266c50d..0000000000
+--- a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-ess.dtsi
++++ /dev/null
+@@ -1,531 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only
+-
+-&clocks {
+-	bias_pll_cc_clk {
+-		compatible = "fixed-clock";
+-		clock-frequency = <300000000>;
+-		#clock-cells = <0>;
+-	};
+-
+-	bias_pll_nss_noc_clk {
+-		compatible = "fixed-clock";
+-		clock-frequency = <416500000>;
+-		#clock-cells = <0>;
+-	};
+-};
+-
+-&soc {
+-	switch: ess-switch@3a000000 {
+-		compatible = "qcom,ess-switch-ipq807x";
+-		reg = <0x3a000000 0x1000000>;
+-		switch_access_mode = "local bus";
+-		switch_cpu_bmp = <0x1>;  /* cpu port bitmap */
+-		switch_inner_bmp = <0x80>; /*inner port bitmap*/
+-		clocks = <&gcc GCC_CMN_12GPLL_AHB_CLK>,
+-			 <&gcc GCC_CMN_12GPLL_SYS_CLK>,
+-			 <&gcc GCC_UNIPHY0_AHB_CLK>,
+-			 <&gcc GCC_UNIPHY0_SYS_CLK>,
+-			 <&gcc GCC_UNIPHY1_AHB_CLK>,
+-			 <&gcc GCC_UNIPHY1_SYS_CLK>,
+-			 <&gcc GCC_UNIPHY2_AHB_CLK>,
+-			 <&gcc GCC_UNIPHY2_SYS_CLK>,
+-			 <&gcc GCC_PORT1_MAC_CLK>,
+-			 <&gcc GCC_PORT2_MAC_CLK>,
+-			 <&gcc GCC_PORT3_MAC_CLK>,
+-			 <&gcc GCC_PORT4_MAC_CLK>,
+-			 <&gcc GCC_PORT5_MAC_CLK>,
+-			 <&gcc GCC_PORT6_MAC_CLK>,
+-			 <&gcc GCC_NSS_PPE_CLK>,
+-			 <&gcc GCC_NSS_PPE_CFG_CLK>,
+-			 <&gcc GCC_NSSNOC_PPE_CLK>,
+-			 <&gcc GCC_NSSNOC_PPE_CFG_CLK>,
+-			 <&gcc GCC_NSS_EDMA_CLK>,
+-			 <&gcc GCC_NSS_EDMA_CFG_CLK>,
+-			 <&gcc GCC_NSS_PPE_IPE_CLK>,
+-			 <&gcc GCC_NSS_PPE_BTQ_CLK>,
+-			 <&gcc GCC_MDIO_AHB_CLK>,
+-			 <&gcc GCC_NSS_NOC_CLK>,
+-			 <&gcc GCC_NSSNOC_SNOC_CLK>,
+-			 <&gcc GCC_MEM_NOC_NSS_AXI_CLK>,
+-			 <&gcc GCC_NSS_CRYPTO_CLK>,
+-			 <&gcc GCC_NSS_IMEM_CLK>,
+-			 <&gcc GCC_NSS_PTP_REF_CLK>,
+-			 <&gcc GCC_NSS_PORT1_RX_CLK>,
+-			 <&gcc GCC_NSS_PORT1_TX_CLK>,
+-			 <&gcc GCC_NSS_PORT2_RX_CLK>,
+-			 <&gcc GCC_NSS_PORT2_TX_CLK>,
+-			 <&gcc GCC_NSS_PORT3_RX_CLK>,
+-			 <&gcc GCC_NSS_PORT3_TX_CLK>,
+-			 <&gcc GCC_NSS_PORT4_RX_CLK>,
+-			 <&gcc GCC_NSS_PORT4_TX_CLK>,
+-			 <&gcc GCC_NSS_PORT5_RX_CLK>,
+-			 <&gcc GCC_NSS_PORT5_TX_CLK>,
+-			 <&gcc GCC_NSS_PORT6_RX_CLK>,
+-			 <&gcc GCC_NSS_PORT6_TX_CLK>,
+-			 <&gcc GCC_UNIPHY0_PORT1_RX_CLK>,
+-			 <&gcc GCC_UNIPHY0_PORT1_TX_CLK>,
+-			 <&gcc GCC_UNIPHY0_PORT2_RX_CLK>,
+-			 <&gcc GCC_UNIPHY0_PORT2_TX_CLK>,
+-			 <&gcc GCC_UNIPHY0_PORT3_RX_CLK>,
+-			 <&gcc GCC_UNIPHY0_PORT3_TX_CLK>,
+-			 <&gcc GCC_UNIPHY0_PORT4_RX_CLK>,
+-			 <&gcc GCC_UNIPHY0_PORT4_TX_CLK>,
+-			 <&gcc GCC_UNIPHY0_PORT5_RX_CLK>,
+-			 <&gcc GCC_UNIPHY0_PORT5_TX_CLK>,
+-			 <&gcc GCC_UNIPHY1_PORT5_RX_CLK>,
+-			 <&gcc GCC_UNIPHY1_PORT5_TX_CLK>,
+-			 <&gcc GCC_UNIPHY2_PORT6_RX_CLK>,
+-			 <&gcc GCC_UNIPHY2_PORT6_TX_CLK>,
+-			 <&gcc NSS_PORT5_RX_CLK_SRC>,
+-			 <&gcc NSS_PORT5_TX_CLK_SRC>;
+-		clock-names = "cmn_ahb_clk", "cmn_sys_clk",
+-			      "uniphy0_ahb_clk", "uniphy0_sys_clk",
+-			      "uniphy1_ahb_clk", "uniphy1_sys_clk",
+-			      "uniphy2_ahb_clk", "uniphy2_sys_clk",
+-			      "port1_mac_clk", "port2_mac_clk",
+-			      "port3_mac_clk", "port4_mac_clk",
+-			      "port5_mac_clk", "port6_mac_clk",
+-			      "nss_ppe_clk", "nss_ppe_cfg_clk",
+-			      "nssnoc_ppe_clk", "nssnoc_ppe_cfg_clk",
+-			      "nss_edma_clk", "nss_edma_cfg_clk",
+-			      "nss_ppe_ipe_clk", "nss_ppe_btq_clk",
+-			      "gcc_mdio_ahb_clk", "gcc_nss_noc_clk",
+-			      "gcc_nssnoc_snoc_clk",
+-			      "gcc_mem_noc_nss_axi_clk",
+-			      "gcc_nss_crypto_clk",
+-			      "gcc_nss_imem_clk",
+-			      "gcc_nss_ptp_ref_clk",
+-			      "nss_port1_rx_clk", "nss_port1_tx_clk",
+-			      "nss_port2_rx_clk", "nss_port2_tx_clk",
+-			      "nss_port3_rx_clk", "nss_port3_tx_clk",
+-			      "nss_port4_rx_clk", "nss_port4_tx_clk",
+-			      "nss_port5_rx_clk", "nss_port5_tx_clk",
+-			      "nss_port6_rx_clk", "nss_port6_tx_clk",
+-			      "uniphy0_port1_rx_clk",
+-			      "uniphy0_port1_tx_clk",
+-			      "uniphy0_port2_rx_clk",
+-			      "uniphy0_port2_tx_clk",
+-			      "uniphy0_port3_rx_clk",
+-			      "uniphy0_port3_tx_clk",
+-			      "uniphy0_port4_rx_clk",
+-			      "uniphy0_port4_tx_clk",
+-			      "uniphy0_port5_rx_clk",
+-			      "uniphy0_port5_tx_clk",
+-			      "uniphy1_port5_rx_clk",
+-			      "uniphy1_port5_tx_clk",
+-			      "uniphy2_port6_rx_clk",
+-			      "uniphy2_port6_tx_clk",
+-			      "nss_port5_rx_clk_src",
+-			      "nss_port5_tx_clk_src";
+-		resets = <&gcc GCC_PPE_FULL_RESET>,
+-			 <&gcc GCC_UNIPHY0_SOFT_RESET>,
+-			 <&gcc GCC_UNIPHY0_XPCS_RESET>,
+-			 <&gcc GCC_UNIPHY1_SOFT_RESET>,
+-			 <&gcc GCC_UNIPHY1_XPCS_RESET>,
+-			 <&gcc GCC_UNIPHY2_SOFT_RESET>,
+-			 <&gcc GCC_UNIPHY2_XPCS_RESET>,
+-			 <&gcc GCC_NSSPORT1_RESET>,
+-			 <&gcc GCC_NSSPORT2_RESET>,
+-			 <&gcc GCC_NSSPORT3_RESET>,
+-			 <&gcc GCC_NSSPORT4_RESET>,
+-			 <&gcc GCC_NSSPORT5_RESET>,
+-			 <&gcc GCC_NSSPORT6_RESET>;
+-		reset-names = "ppe_rst", "uniphy0_soft_rst",
+-			      "uniphy0_xpcs_rst", "uniphy1_soft_rst",
+-			      "uniphy1_xpcs_rst", "uniphy2_soft_rst",
+-			      "uniphy2_xpcs_rst", "nss_port1_rst",
+-			      "nss_port2_rst", "nss_port3_rst",
+-			      "nss_port4_rst", "nss_port5_rst",
+-			      "nss_port6_rst";
+-		mdio-bus = <&mdio>;
+-		status = "disabled";
+-
+-		port_scheduler_resource {
+-			port@0 {
+-				port_id = <0>;
+-				ucast_queue = <0 143>;
+-				mcast_queue = <256 271>;
+-				l0sp = <0 35>;
+-				l0cdrr = <0 47>;
+-				l0edrr = <0 47>;
+-				l1cdrr = <0 7>;
+-				l1edrr = <0 7>;
+-			};
+-			port@1 {
+-				port_id = <1>;
+-				ucast_queue = <144 159>;
+-				mcast_queue = <272 275>;
+-				l0sp = <36 39>;
+-				l0cdrr = <48 63>;
+-				l0edrr = <48 63>;
+-				l1cdrr = <8 11>;
+-				l1edrr = <8 11>;
+-			};
+-			port@2 {
+-				port_id = <2>;
+-				ucast_queue = <160 175>;
+-				mcast_queue = <276 279>;
+-				l0sp = <40 43>;
+-				l0cdrr = <64 79>;
+-				l0edrr = <64 79>;
+-				l1cdrr = <12 15>;
+-				l1edrr = <12 15>;
+-			};
+-			port@3 {
+-				port_id = <3>;
+-				ucast_queue = <176 191>;
+-				mcast_queue = <280 283>;
+-				l0sp = <44 47>;
+-				l0cdrr = <80 95>;
+-				l0edrr = <80 95>;
+-				l1cdrr = <16 19>;
+-				l1edrr = <16 19>;
+-			};
+-			port@4 {
+-				port_id = <4>;
+-				ucast_queue = <192 207>;
+-				mcast_queue = <284 287>;
+-				l0sp = <48 51>;
+-				l0cdrr = <96 111>;
+-				l0edrr = <96 111>;
+-				l1cdrr = <20 23>;
+-				l1edrr = <20 23>;
+-			};
+-			port@5 {
+-				port_id = <5>;
+-				ucast_queue = <208 223>;
+-				mcast_queue = <288 291>;
+-				l0sp = <52 55>;
+-				l0cdrr = <112 127>;
+-				l0edrr = <112 127>;
+-				l1cdrr = <24 27>;
+-				l1edrr = <24 27>;
+-			};
+-			port@6 {
+-				port_id = <6>;
+-				ucast_queue = <224 239>;
+-				mcast_queue = <292 295>;
+-				l0sp = <56 59>;
+-				l0cdrr = <128 143>;
+-				l0edrr = <128 143>;
+-				l1cdrr = <28 31>;
+-				l1edrr = <28 31>;
+-			};
+-			port@7 {
+-				port_id = <7>;
+-				ucast_queue = <240 255>;
+-				mcast_queue = <296 299>;
+-				l0sp = <60 63>;
+-				l0cdrr = <144 159>;
+-				l0edrr = <144 159>;
+-				l1cdrr = <32 35>;
+-				l1edrr = <32 35>;
+-			};
+-		};
+-		port_scheduler_config {
+-			port@0 {
+-				port_id = <0>;
+-				l1scheduler {
+-					group@0 {
+-						sp = <0 1>; /*L0 SPs*/
+-						/*cpri cdrr epri edrr*/
+-						cfg = <0 0 0 0>;
+-					};
+-				};
+-				l0scheduler {
+-					group@0 {
+-						/*unicast queues*/
+-						ucast_queue = <0 4 8>;
+-						/*multicast queues*/
+-						mcast_queue = <256 260>;
+-						/*sp cpri cdrr epri edrr*/
+-						cfg = <0 0 0 0 0>;
+-					};
+-					group@1 {
+-						ucast_queue = <1 5 9>;
+-						mcast_queue = <257 261>;
+-						cfg = <0 1 1 1 1>;
+-					};
+-					group@2 {
+-						ucast_queue = <2 6 10>;
+-						mcast_queue = <258 262>;
+-						cfg = <0 2 2 2 2>;
+-					};
+-					group@3 {
+-						ucast_queue = <3 7 11>;
+-						mcast_queue = <259 263>;
+-						cfg = <0 3 3 3 3>;
+-					};
+-				};
+-			};
+-			port@1 {
+-				port_id = <1>;
+-				l1scheduler {
+-					group@0 {
+-						sp = <36>;
+-						cfg = <0 8 0 8>;
+-					};
+-					group@1 {
+-						sp = <37>;
+-						cfg = <1 9 1 9>;
+-					};
+-				};
+-				l0scheduler {
+-					group@0 {
+-						ucast_queue = <144>;
+-						ucast_loop_pri = <16>;
+-						mcast_queue = <272>;
+-						mcast_loop_pri = <4>;
+-						cfg = <36 0 48 0 48>;
+-					};
+-				};
+-			};
+-			port@2 {
+-				port_id = <2>;
+-				l1scheduler {
+-					group@0 {
+-						sp = <40>;
+-						cfg = <0 12 0 12>;
+-					};
+-					group@1 {
+-						sp = <41>;
+-						cfg = <1 13 1 13>;
+-					};
+-				};
+-				l0scheduler {
+-					group@0 {
+-						ucast_queue = <160>;
+-						ucast_loop_pri = <16>;
+-						mcast_queue = <276>;
+-						mcast_loop_pri = <4>;
+-						cfg = <40 0 64 0 64>;
+-					};
+-				};
+-			};
+-			port@3 {
+-				port_id = <3>;
+-				l1scheduler {
+-					group@0 {
+-						sp = <44>;
+-						cfg = <0 16 0 16>;
+-					};
+-					group@1 {
+-						sp = <45>;
+-						cfg = <1 17 1 17>;
+-					};
+-				};
+-				l0scheduler {
+-					group@0 {
+-						ucast_queue = <176>;
+-						ucast_loop_pri = <16>;
+-						mcast_queue = <280>;
+-						mcast_loop_pri = <4>;
+-						cfg = <44 0 80 0 80>;
+-					};
+-				};
+-			};
+-			port@4 {
+-				port_id = <4>;
+-				l1scheduler {
+-					group@0 {
+-						sp = <48>;
+-						cfg = <0 20 0 20>;
+-					};
+-					group@1 {
+-						sp = <49>;
+-						cfg = <1 21 1 21>;
+-					};
+-				};
+-				l0scheduler {
+-					group@0 {
+-						ucast_queue = <192>;
+-						ucast_loop_pri = <16>;
+-						mcast_queue = <284>;
+-						mcast_loop_pri = <4>;
+-						cfg = <48 0 96 0 96>;
+-					};
+-				};
+-			};
+-			port@5 {
+-				port_id = <5>;
+-				l1scheduler {
+-					group@0 {
+-						sp = <52>;
+-						cfg = <0 24 0 24>;
+-					};
+-					group@1 {
+-						sp = <53>;
+-						cfg = <1 25 1 25>;
+-					};
+-				};
+-				l0scheduler {
+-					group@0 {
+-						ucast_queue = <208>;
+-						ucast_loop_pri = <16>;
+-						mcast_queue = <288>;
+-						mcast_loop_pri = <4>;
+-						cfg = <52 0 112 0 112>;
+-					};
+-				};
+-			};
+-			port@6 {
+-				port_id = <6>;
+-				l1scheduler {
+-					group@0 {
+-						sp = <56>;
+-						cfg = <0 28 0 28>;
+-					};
+-					group@1 {
+-						sp = <57>;
+-						cfg = <1 29 1 29>;
+-					};
+-				};
+-				l0scheduler {
+-					group@0 {
+-						ucast_queue = <224>;
+-						ucast_loop_pri = <16>;
+-						mcast_queue = <292>;
+-						mcast_loop_pri = <4>;
+-						cfg = <56 0 128 0 128>;
+-					};
+-				};
+-			};
+-			port@7 {
+-				port_id = <7>;
+-				l1scheduler {
+-					group@0 {
+-						sp = <60>;
+-						cfg = <0 32 0 32>;
+-					};
+-					group@1 {
+-						sp = <61>;
+-						cfg = <1 33 1 33>;
+-					};
+-				};
+-				l0scheduler {
+-					group@0 {
+-						ucast_queue = <240>;
+-						ucast_loop_pri = <16>;
+-						mcast_queue = <296>;
+-						cfg = <60 0 144 0 144>;
+-					};
+-				};
+-			};
+-		};
+-	};
+-
+-	ess-uniphy@7a00000 {
+-		compatible = "qcom,ess-uniphy";
+-		reg = <0x7a00000 0x30000>;
+-		uniphy_access_mode = "local bus";
+-	};
+-
+-	edma: edma@3ab00000 {
+-		compatible = "qcom,edma";
+-		reg = <0x3ab00000 0x76900>;
+-		reg-names = "edma-reg-base";
+-		qcom,txdesc-ring-start = <23>;
+-		qcom,txdesc-rings = <1>;
+-		qcom,txcmpl-ring-start = <7>;
+-		qcom,txcmpl-rings = <1>;
+-		qcom,rxfill-ring-start = <7>;
+-		qcom,rxfill-rings = <1>;
+-		qcom,rxdesc-ring-start = <15>;
+-		qcom,rxdesc-rings = <1>;
+-		interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
+-			     <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
+-			     <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
+-			     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
+-		resets = <&gcc GCC_EDMA_HW_RESET>;
+-		reset-names = "edma_rst";
+-		status = "disabled";
+-	};
+-
+-	dp1: dp1 {
+-		device_type = "network";
+-		compatible = "qcom,nss-dp";
+-		qcom,id = <1>;
+-		reg = <0x3a001000 0x200>;
+-		qcom,mactype = <0>;
+-		local-mac-address = [000000000000];
+-		phy-mode = "sgmii";
+-		status = "disabled";
+-	};
+-
+-	dp2: dp2 {
+-		device_type = "network";
+-		compatible = "qcom,nss-dp";
+-		qcom,id = <2>;
+-		reg = <0x3a001200 0x200>;
+-		qcom,mactype = <0>;
+-		local-mac-address = [000000000000];
+-		phy-mode = "sgmii";
+-		status = "disabled";
+-	};
+-
+-	dp3: dp3 {
+-		device_type = "network";
+-		compatible = "qcom,nss-dp";
+-		qcom,id = <3>;
+-		reg = <0x3a001400 0x200>;
+-		qcom,mactype = <0>;
+-		local-mac-address = [000000000000];
+-		phy-mode = "sgmii";
+-		status = "disabled";
+-	};
+-
+-	dp4: dp4 {
+-		device_type = "network";
+-		compatible = "qcom,nss-dp";
+-		qcom,id = <4>;
+-		reg = <0x3a001600 0x200>;
+-		qcom,mactype = <0>;
+-		local-mac-address = [000000000000];
+-		phy-mode = "sgmii";
+-		status = "disabled";
+-	};
+-
+-	dp5: dp5 {
+-		device_type = "network";
+-		compatible = "qcom,nss-dp";
+-		qcom,id = <5>;
+-		reg = <0x3a001800 0x200>;
+-		qcom,mactype = <0>;
+-		local-mac-address = [000000000000];
+-		phy-mode = "sgmii";
+-		status = "disabled";
+-	};
+-
+-	dp6: dp6 {
+-		device_type = "network";
+-		compatible = "qcom,nss-dp";
+-		qcom,id = <6>;
+-		reg = <0x3a001a00 0x200>;
+-		qcom,mactype = <0>;
+-		local-mac-address = [000000000000];
+-		phy-mode = "sgmii";
+-		status = "disabled";
+-	};
+-
+-	dp5_syn: dp5-syn {
+-		device_type = "network";
+-		compatible = "qcom,nss-dp";
+-		qcom,id = <5>;
+-		reg = <0x3a003000 0x3fff>;
+-		qcom,mactype = <1>;
+-		local-mac-address = [000000000000];
+-		phy-mode = "sgmii";
+-		status = "disabled";
+-	};
+-
+-	dp6_syn: dp6-syn {
+-		device_type = "network";
+-		compatible = "qcom,nss-dp";
+-		qcom,id = <6>;
+-		reg = <0x3a007000 0x3fff>;
+-		qcom,mactype = <1>;
+-		local-mac-address = [000000000000];
+-		phy-mode = "sgmii";
+-		status = "disabled";
+-	};
+-};
+diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-hk-cpu.dtsi b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-hk-cpu.dtsi
+deleted file mode 100644
+index 8485814969..0000000000
+--- a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-hk-cpu.dtsi
++++ /dev/null
+@@ -1,218 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only
+-
+-#include <dt-bindings/thermal/thermal.h>
+-#include "ipq8074-cpr-regulator.dtsi"
+-
+-&CPU0 {
+-	cpu-supply = <&apc_vreg>;
+-	voltage-tolerance = <1>;
+-};
+-
+-&CPU1 {
+-	cpu-supply = <&apc_vreg>;
+-	voltage-tolerance = <1>;
+-};
+-
+-&CPU2 {
+-	cpu-supply = <&apc_vreg>;
+-	voltage-tolerance = <1>;
+-};
+-
+-&CPU3 {
+-	cpu-supply = <&apc_vreg>;
+-	voltage-tolerance = <1>;
+-};
+-&cpu0_thermal {
+-	trips {
+-		cpu0_passive_low: cpu-passive-low {
+-			temperature = <95000>;
+-			hysteresis = <2000>;
+-			type = "passive";
+-		};
+-
+-		cpu0_passive_high: cpu-passive-high {
+-			temperature = <100000>;
+-			hysteresis = <2000>;
+-			type = "passive";
+-		};
+-
+-		cpu0_crit: cpu_crit {
+-			temperature = <110000>;
+-			hysteresis = <1000>;
+-			type = "critical";
+-		};
+-	};
+-
+-	cooling-maps {
+-		map0 {
+-			trip = <&cpu0_passive_low>;
+-			cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-		};
+-		map1 {
+-			trip = <&cpu0_passive_high>;
+-			cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-		};
+-	};
+-};
+-
+-&cpu1_thermal {
+-	trips {
+-		cpu1_passive_low: cpu-passive-low {
+-			temperature = <95000>;
+-			hysteresis = <2000>;
+-			type = "passive";
+-		};
+-
+-		cpu1_passive_high: cpu-passive-high {
+-			temperature = <100000>;
+-			hysteresis = <2000>;
+-			type = "passive";
+-		};
+-
+-		cpu1_crit: cpu_crit {
+-			temperature = <110000>;
+-			hysteresis = <1000>;
+-			type = "critical";
+-		};
+-	};
+-
+-	cooling-maps {
+-		map0 {
+-			trip = <&cpu1_passive_low>;
+-			cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-		};
+-		map1 {
+-			trip = <&cpu1_passive_high>;
+-			cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-		};
+-	};
+-};
+-
+-&cpu2_thermal {
+-	trips {
+-		cpu2_passive_low: cpu-passive-low {
+-			temperature = <95000>;
+-			hysteresis = <2000>;
+-			type = "passive";
+-		};
+-
+-		cpu2_passive_high: cpu-passive-high {
+-			temperature = <100000>;
+-			hysteresis = <2000>;
+-			type = "passive";
+-		};
+-
+-		cpu2_crit: cpu_crit {
+-			temperature = <110000>;
+-			hysteresis = <1000>;
+-			type = "critical";
+-		};
+-	};
+-
+-	cooling-maps {
+-		map0 {
+-			trip = <&cpu2_passive_low>;
+-			cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-		};
+-		map1 {
+-			trip = <&cpu2_passive_high>;
+-			cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-		};
+-	};
+-};
+-
+-&cpu3_thermal {
+-	trips {
+-		cpu3_passive_low: cpu-passive-low {
+-			temperature = <95000>;
+-			hysteresis = <2000>;
+-			type = "passive";
+-		};
+-
+-		cpu3_passive_high: cpu-passive-high {
+-			temperature = <100000>;
+-			hysteresis = <2000>;
+-			type = "passive";
+-		};
+-
+-		cpu3_crit: cpu_crit {
+-			temperature = <110000>;
+-			hysteresis = <1000>;
+-			type = "critical";
+-		};
+-	};
+-
+-	cooling-maps {
+-		map0 {
+-			trip = <&cpu3_passive_low>;
+-			cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-		};
+-		map1 {
+-			trip = <&cpu3_passive_high>;
+-			cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-		};
+-	};
+-};
+-
+-&cluster_thermal {
+-	trips {
+-		cluster_passive_low: cluster-passive {
+-			temperature = <95000>;
+-			hysteresis = <2000>;
+-			type = "passive";
+-		};
+-
+-		cluster_passive_high: cluster-passive-high {
+-			temperature = <100000>;
+-			hysteresis = <2000>;
+-			type = "passive";
+-		};
+-
+-		cluster_crit: cluster_crit {
+-			temperature = <110000>;
+-			hysteresis = <1000>;
+-			type = "critical";
+-		};
+-	};
+-
+-	cooling-maps {
+-		map0 {
+-			trip = <&cluster_passive_low>;
+-			cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-		};
+-		map1 {
+-			trip = <&cluster_passive_high>;
+-			cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-					 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-		};
+-	};
+-};
+diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-nbg7815.dts b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-nbg7815.dts
+deleted file mode 100644
+index d113b233ec..0000000000
+--- a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-nbg7815.dts
++++ /dev/null
+@@ -1,445 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/*
+- * Copyright (c) 2022, Karol Przybylski <itor@o2.pl>
+- * Copyright (c) 2023, Andre Valentin <avalentin@marcant.net>
+- */
+-
+-/dts-v1/;
+-
+-#include "ipq8074.dtsi"
+-#include "ipq8074-hk-cpu.dtsi"
+-#include "ipq8074-ess.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/leds/common.h>
+-#include <dt-bindings/input/input.h>
+-
+-
+-/ {
+-	model = "Zyxel NBG7815";
+-	compatible = "zyxel,nbg7815", "qcom,ipq8074";
+-
+-	aliases {
+-		serial0 = &blsp1_uart5;
+-		serial1 = &blsp1_uart3;
+-		/* Alias as required by u-boot to patch MAC addresses */
+-		ethernet0 = &dp1;
+-		label-mac-device = &dp1;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			linux,code = <KEY_RESTART>;
+-			gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio-pins {
+-		mdc {
+-			pins = "gpio68";
+-			function = "mdc";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-
+-		mdio {
+-			pins = "gpio69";
+-			function = "mdio";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-	};
+-};
+-
+-
+-&blsp1_uart3 {
+-	status = "okay";
+-};
+-
+-&blsp1_uart5 {
+-	status = "okay";
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <0>;
+-	status = "okay";
+-
+-	/*
+-	 * Bootloader will find the NAND DT node by the compatible and
+-	 * then "fixup" it by adding the partitions from the SMEM table
+-	 * using the legacy bindings thus making it impossible for us
+-	 * to change the partition table or utilize NVMEM for calibration.
+-	 * So add a dummy partitions node that bootloader will populate
+-	 * and set it as disabled so the kernel ignores it instead of
+-	 * printing warnings due to the broken way bootloader adds the
+-	 * partitions.
+-	 */
+-	partitions {
+-		status = "disabled";
+-	};
+-
+-
+-	flash@0 {
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <50000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:sbl1";
+-				reg = <0x0 0x50000>;
+-				read-only;
+-			};
+-
+-			partition@50000 {
+-				label = "0:mibib";
+-				reg = <0x50000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "0:bootconfig";
+-				reg = <0x60000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@80000 {
+-				label = "0:bootconfig1";
+-				reg = <0x80000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@a0000 {
+-				label = "0:qsee";
+-				reg = <0xa0000 0x180000>;
+-				read-only;
+-			};
+-
+-			partition@220000 {
+-				label = "0:qsee_1";
+-				reg = <0x220000 0x180000>;
+-				read-only;
+-			};
+-
+-			partition@3a0000 {
+-				label = "0:devcfg";
+-				reg = <0x3a0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3b0000 {
+-				label = "0:devcfg_1";
+-				reg = <0x3b0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3c0000 {
+-				label = "0:apdp";
+-				reg = <0x3c0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3d0000 {
+-				label = "0:apdp_1";
+-				reg = <0x3d0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3e0000 {
+-				label = "0:rpm";
+-				reg = <0x3e0000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@420000 {
+-				label = "0:rpm_1";
+-				reg = <0x420000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@460000 {
+-				label = "0:cdt";
+-				reg = <0x460000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@470000 {
+-				label = "0:cdt_1";
+-				reg = <0x470000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@480000 {
+-				label = "0:appsbl";
+-				reg = <0x480000 0xc0000>;
+-				read-only;
+-			};
+-
+-			partition@540000 {
+-				label = "0:appsbl_1";
+-				reg = <0x540000 0xc0000>;
+-				read-only;
+-			};
+-
+-			partition@600000 {
+-				compatible = "u-boot,env";
+-				label = "0:appsblenv";
+-				reg = <0x600000 0x10000>;
+-
+-				macaddr_lan: ethaddr {
+-					#nvmem-cell-cells = <1>;
+-				};
+-			};
+-
+-			partition@610000 {
+-				label = "0:art";
+-				reg = <0x610000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@650000 {
+-				label = "0:ethphyfw";
+-				reg = <0x650000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@6d0000 {
+-				label = "0:crt";
+-				reg = <0x6d0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@6e0000 {
+-				label = "dual_flag";
+-				reg = <0x6e0000 0x10000>;
+-			};
+-
+-			partition@6f0000 {
+-				label = "reserved";
+-				reg = <0x6f0000 0x110000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&mdio {
+-	status = "okay";
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-	reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
+-
+-	qca8075_1: ethernet-phy@0 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <0>;
+-	};
+-
+-	qca8075_2: ethernet-phy@1 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <1>;
+-	};
+-
+-	qca8075_3: ethernet-phy@2 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <2>;
+-	};
+-
+-	qca8075_4: ethernet-phy@3 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <3>;
+-	};
+-
+-	qca8081: ethernet-phy@4{
+-		compatible = "ethernet-phy-id004d.d101";
+-		reg = <28>;
+-		reset-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;
+-	};
+-
+-	aqr113c: ethernet-phy@5 {
+-		compatible = "ethernet-phy-ieee802.3-c45";
+-		reg = <8>;
+-		reset-gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-	};
+-};
+-
+-&switch {
+-	status = "okay";
+-
+-	switch_cpu_bmp = <0x1>;
+-	switch_lan_bmp = <0x3e>;
+-	switch_wan_bmp = <0x40>;
+-	switch_mac_mode = <0x0>;
+-	switch_mac_mode1 = <0xf>;
+-	switch_mac_mode2 = <0xd>;
+-	bm_tick_mode = <0>;
+-	tm_tick_mode = <0>;
+-
+-	qcom,port_phyinfo {
+-		port@0 {
+-			port_id = <1>;
+-			phy_address = <0>;
+-		};
+-
+-		port@1 {
+-			port_id = <2>;
+-			phy_address = <1>;
+-		};
+-
+-		port@2 {
+-			port_id = <3>;
+-			phy_address = <2>;
+-		};
+-
+-		port@3 {
+-			port_id = <4>;
+-			phy_address = <3>;
+-		};
+-
+-		port@4 {
+-			port_id = <5>;
+-			phy_address = <28>;
+-			port_mac_sel = "QGMAC_PORT";
+-		};
+-
+-		port@5 {
+-			port_id = <6>;
+-			ethernet-phy-ieee802.3-c45;
+-			phy_address = <8>;
+-		};
+-	};
+-};
+-
+-&edma {
+-	status = "okay";
+-};
+-
+-&dp1 {
+-	status = "okay";
+-	phy-handle = <&qca8075_1>;
+-	label = "lan1";
+-	nvmem-cells = <&macaddr_lan 0>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&dp2 {
+-	status = "okay";
+-	phy-handle = <&qca8075_2>;
+-	label = "lan2";
+-	nvmem-cells = <&macaddr_lan 0>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&dp3 {
+-	status = "okay";
+-	phy-handle = <&qca8075_3>;
+-	label = "lan3";
+-	nvmem-cells = <&macaddr_lan 0>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&dp4 {
+-	status = "okay";
+-	phy-handle = <&qca8075_4>;
+-	label = "lan4";
+-	nvmem-cells = <&macaddr_lan 0>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&dp5 {
+-	status = "okay";
+-	phy-handle = <&qca8081>;
+-	label = "wan";
+-	nvmem-cells = <&macaddr_lan 1>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&dp6_syn {
+-	status = "okay";
+-	phy-handle = <&aqr113c>;
+-	label = "10g";
+-	nvmem-cells = <&macaddr_lan 0>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&blsp1_i2c2 {
+-	pinctrl-0 = <&i2c_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	tmp103@70 {
+-		compatible = "ti,tmp103";
+-		reg = <0x70>;
+-	};
+-};
+-
+-&sdhc_1 {
+-	status = "okay";
+-	/* unstable, problem with the hs400 > h200 speed switch */
+-	/delete-property/ mmc-hs400-1_8v;
+-	mmc-hs200-1_8v;
+-	mmc-ddr-1_8v;
+-	vqmmc-supply = <&l11>;
+-};
+-
+-&ssphy_0 {
+-	status = "okay";
+-};
+-
+-&qusb_phy_0 {
+-	status = "okay";
+-};
+-
+-&ssphy_1 {
+-	status = "okay";
+-};
+-
+-&qusb_phy_1 {
+-	status = "okay";
+-};
+-
+-&usb_0 {
+-	status = "okay";
+-};
+-
+-&usb_1 {
+-	status = "okay";
+-};
+-
+-&wifi {
+-	status = "okay";
+-
+-	qcom,ath11k-calibration-variant = "Zyxel-NBG7815";
+-};
+diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-wxr-5950ax12.dts b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-wxr-5950ax12.dts
+deleted file mode 100644
+index 32386dc93e..0000000000
+--- a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-wxr-5950ax12.dts
++++ /dev/null
+@@ -1,376 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-/dts-v1/;
+-
+-#include "ipq8074.dtsi"
+-#include "ipq8074-hk-cpu.dtsi"
+-#include "ipq8074-ess.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/leds/common.h>
+-#include <dt-bindings/input/input.h>
+-
+-/ {
+-	model = "Buffalo WXR-5950AX12";
+-	compatible = "buffalo,wxr-5950ax12", "qcom,ipq8074";
+-
+-	aliases {
+-		serial0 = &blsp1_uart5;
+-		led-boot = &led_power_white;
+-		led-failsafe = &led_power_red;
+-		led-running = &led_power_white;
+-		led-upgrade = &led_power_white;
+-		label-mac-device = &dp5_syn;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-		bootargs-append = " ubi.mtd=user_property root=/dev/ubiblock1_0";
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led-0 {
+-			label = "white:router";
+-			gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_WHITE>;
+-		};
+-
+-		led-1 {
+-			label = "red:router";
+-			gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_RED>;
+-		};
+-
+-		led_power_red: led-2 {
+-			label = "red:power";
+-			gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_RED>;
+-			function = LED_FUNCTION_POWER;
+-		};
+-
+-		led_power_white: led-3 {
+-			label = "white:power";
+-			gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_WHITE>;
+-			function = LED_FUNCTION_POWER;
+-		};
+-
+-		led-4 {
+-			label = "white:internet";
+-			gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_WHITE>;
+-		};
+-
+-		led-5 {
+-			label = "red:internet";
+-			gpios = <&tlmm 44 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_RED>;
+-		};
+-
+-		led-6 {
+-			label = "red:wireless";
+-			gpios = <&tlmm 55 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_RED>;
+-			function = LED_FUNCTION_WLAN;
+-		};
+-
+-		led-7 {
+-			label = "white:wireless";
+-			gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_WHITE>;
+-			function = LED_FUNCTION_WLAN;
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		/*
+-		 * mode: 3x position switch
+-		 *
+-		 * - ROUTER
+-		 * - AP
+-		 * - WB (Wireless Bridge)
+-		 */
+-		ap {
+-			label = "mode-ap";
+-			gpios = <&tlmm 29 GPIO_ACTIVE_LOW>;
+-			linux,code = <BTN_0>;
+-		};
+-
+-		bridge {
+-			label = "mode-wb";
+-			gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
+-			linux,code = <BTN_1>;
+-		};
+-
+-		/*
+-		 * op: 2x position switch
+-		 *
+-		 * - AUTO
+-		 * - MANUAL (select Router/AP/WB manually)
+-		 */
+-		manual {
+-			label = "op-manual";
+-			gpios = <&tlmm 52 GPIO_ACTIVE_LOW>;
+-			linux,code = <BTN_2>;
+-		};
+-
+-		wps {
+-			label = "wps";
+-			gpios = <&tlmm 51 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	reg_usb_vbus: regulator-5v-vbus {
+-		compatible = "regulator-fixed";
+-		regulator-name = "vbus";
+-		regulator-min-microvolt = <5000000>;
+-		regulator-max-microvolt = <5000000>;
+-		gpio = <&tlmm 64 GPIO_ACTIVE_HIGH>;
+-		enable-active-high;
+-		regulator-always-on;
+-	};
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio-pins {
+-		mdc {
+-			pins = "gpio68";
+-			function = "mdc";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-
+-		mdio {
+-			pins = "gpio69";
+-			function = "mdio";
+-			drive-strength = <8>;
+-			bias-pull-up;
+-		};
+-	};
+-};
+-
+-&blsp1_uart5 {
+-	status = "okay";
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&qpic_nand {
+-	status = "okay";
+-
+-	nand@0 {
+-		reg = <0>;
+-		nand-ecc-strength = <4>;
+-		nand-ecc-step-size = <512>;
+-		nand-bus-width = <8>;
+-
+-		partitions {
+-			compatible = "qcom,smem-part";
+-
+-			partition-0-appsblenv {
+-				compatible = "fixed-partitions";
+-				label = "0:appsblenv";
+-				read-only;
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				partition@0 {
+-					compatible = "u-boot,env";
+-					label = "env-data";
+-					reg = <0x0 0x40000>;
+-
+-					macaddr_appsblenv_ethaddr: ethaddr {
+-					};
+-				};
+-			};
+-		};
+-	};
+-};
+-
+-&mdio {
+-	status = "okay";
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-	/*
+-	 * RESET pins of phy chips
+-	 *
+-	 * WXR-5950AX12 has 2x RESET pins for QCA8075 and AQR113C.
+-	 * The pin of QCA8075 is for the chip and not phys in the chip, the
+-	 * pin of AQR113C is for 2x chips. So both pins are not appropriate
+-	 * to declare them as reset-gpios in phy nodes.
+-	 * Multiple entries in reset-gpios of mdio may not be supported, but
+-	 * leave the following as-is to show that the those reset pin exists.
+-	 */
+-	reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>, /* QCA8075 RESET */
+-		      <&tlmm 63 GPIO_ACTIVE_LOW>; /* AQR113C RESET (2x) */
+-
+-	aqr113c_1: ethernet-phy@0 {
+-		compatible = "ethernet-phy-ieee802.3-c45";
+-		reg = <0x0>;
+-	};
+-
+-	aqr113c_2: ethernet-phy@8 {
+-		compatible = "ethernet-phy-ieee802.3-c45";
+-		reg = <0x8>;
+-	};
+-
+-	qca8075_1: ethernet-phy@18 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <0x18>;
+-	};
+-
+-	qca8075_2: ethernet-phy@19 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <0x19>;
+-	};
+-
+-	qca8075_3: ethernet-phy@1a {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <0x1a>;
+-	};
+-
+-	qca8075_4: ethernet-phy@1b {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <0x1b>;
+-	};
+-
+-	qca8075_5: ethernet-phy@1c {
+-		compatible = "ethernet-phy-ieee802.3-c22";
+-		reg = <0x1c>;
+-	};
+-};
+-
+-&switch {
+-	status = "okay";
+-
+-	switch_cpu_bmp = <0x1>;
+-	switch_lan_bmp = <0x3e>;
+-	switch_wan_bmp = <0x40>;
+-	switch_mac_mode = <0xb>;
+-	switch_mac_mode1 = <0xd>;
+-	switch_mac_mode2 = <0xd>;
+-	bm_tick_mode = <0>;
+-	tm_tick_mode = <0>;
+-
+-	qcom,port_phyinfo {
+-		port@0 {
+-			port_id = <1>;
+-			phy_address = <0x18>;
+-		};
+-
+-		port@1 {
+-			port_id = <2>;
+-			phy_address = <0x19>;
+-		};
+-
+-		port@2 {
+-			port_id = <3>;
+-			phy_address = <0x1a>;
+-		};
+-
+-		port@3 {
+-			port_id = <4>;
+-			phy_address = <0x1b>;
+-		};
+-
+-		port@4 {
+-			port_id = <5>;
+-			ethernet-phy-ieee802.3-c45;
+-			phy_address = <0x0>;
+-		};
+-
+-		port@5 {
+-			port_id = <6>;
+-			ethernet-phy-ieee802.3-c45;
+-			phy_address = <0x8>;
+-		};
+-	};
+-};
+-
+-&edma {
+-	status = "okay";
+-};
+-
+-&dp2 {
+-	status = "okay";
+-	phy-handle = <&qca8075_2>;
+-	label = "lan4";
+-	nvmem-cells = <&macaddr_appsblenv_ethaddr>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&dp3 {
+-	status = "okay";
+-	phy-handle = <&qca8075_3>;
+-	label = "lan3";
+-	nvmem-cells = <&macaddr_appsblenv_ethaddr>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&dp4 {
+-	status = "okay";
+-	phy-handle = <&qca8075_4>;
+-	label = "lan2";
+-	nvmem-cells = <&macaddr_appsblenv_ethaddr>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&dp5_syn {
+-	status = "okay";
+-	phy-handle = <&aqr113c_1>;
+-	label = "wan";
+-	nvmem-cells = <&macaddr_appsblenv_ethaddr>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&dp6_syn {
+-	status = "okay";
+-	phy-handle = <&aqr113c_2>;
+-	label = "lan1";
+-	nvmem-cells = <&macaddr_appsblenv_ethaddr>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&ssphy_0 {
+-	status = "okay";
+-};
+-
+-&qusb_phy_0 {
+-	status = "okay";
+-};
+-
+-&usb_0 {
+-	status = "okay";
+-
+-	vbus-supply = <&reg_usb_vbus>;
+-};
+-
+-&wifi {
+-	status = "okay";
+-
+-	qcom,ath11k-calibration-variant = "Buffalo-WXR-5950AX12";
+-};
+diff --git a/target/linux/ipq807x/generic/target.mk b/target/linux/ipq807x/generic/target.mk
+deleted file mode 100644
+index f5cb1fb19b..0000000000
+--- a/target/linux/ipq807x/generic/target.mk
++++ /dev/null
+@@ -1 +0,0 @@
+-BOARDNAME:=Generic
+diff --git a/target/linux/ipq807x/image/Makefile b/target/linux/ipq807x/image/Makefile
+deleted file mode 100644
+index f59ad0c15f..0000000000
+--- a/target/linux/ipq807x/image/Makefile
++++ /dev/null
+@@ -1,17 +0,0 @@
+-include $(TOPDIR)/rules.mk
+-include $(INCLUDE_DIR)/image.mk
+-
+-define Device/Default
+-	PROFILES := Default
+-	KERNEL_LOADADDR := 0x41000000
+-	DEVICE_DTS = $$(SOC)-$(lastword $(subst _, ,$(1)))
+-	DEVICE_DTS_CONFIG := config@1
+-	DEVICE_DTS_DIR := $(DTS_DIR)/qcom
+-	IMAGES := sysupgrade.bin
+-	IMAGE/sysupgrade.bin = sysupgrade-tar | append-metadata
+-	IMAGE/sysupgrade.bin/squashfs :=
+-endef
+-
+-include $(SUBTARGET).mk
+-
+-$(eval $(call BuildImage))
+diff --git a/target/linux/ipq807x/image/generic.mk b/target/linux/ipq807x/image/generic.mk
+deleted file mode 100644
+index 124cdfc3b2..0000000000
+--- a/target/linux/ipq807x/image/generic.mk
++++ /dev/null
+@@ -1,175 +0,0 @@
+-define Device/FitImage
+-	KERNEL_SUFFIX := -uImage.itb
+-	KERNEL = kernel-bin | libdeflate-gzip | fit gzip $$(KDIR)/image-$$(DEVICE_DTS).dtb
+-	KERNEL_NAME := Image
+-endef
+-
+-define Device/FitImageLzma
+-	KERNEL_SUFFIX := -uImage.itb
+-	KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb
+-	KERNEL_NAME := Image
+-endef
+-
+-define Device/EmmcImage
+-	IMAGES += factory.bin sysupgrade.bin
+-	IMAGE/factory.bin := append-rootfs | pad-rootfs | pad-to 64k
+-	IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-to 64k | sysupgrade-tar rootfs=$$$$@ | append-metadata
+-endef
+-
+-define Device/UbiFit
+-	KERNEL_IN_UBI := 1
+-	IMAGES := factory.ubi sysupgrade.bin
+-	IMAGE/factory.ubi := append-ubi
+-	IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+-endef
+-
+-define Device/buffalo_wxr-5950ax12
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := Buffalo
+-	DEVICE_MODEL := WXR-5950AX12
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	DEVICE_DTS_CONFIG := config@hk01
+-	SOC := ipq8074
+-	IMAGES := sysupgrade.bin
+-	IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+-	DEVICE_PACKAGES := ipq-wifi-buffalo_wxr-5950ax12
+-endef
+-TARGET_DEVICES += buffalo_wxr-5950ax12
+-
+-define Device/dynalink_dl-wrx36
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := Dynalink
+-	DEVICE_MODEL := DL-WRX36
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	DEVICE_DTS_CONFIG := config@rt5010w-d350-rev0
+-	SOC := ipq8072
+-	DEVICE_PACKAGES := ipq-wifi-dynalink_dl-wrx36
+-endef
+-TARGET_DEVICES += dynalink_dl-wrx36
+-
+-define Device/edgecore_eap102
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := Edgecore
+-	DEVICE_MODEL := EAP102
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	DEVICE_DTS_CONFIG := config@ac02
+-	SOC := ipq8071
+-	DEVICE_PACKAGES := ipq-wifi-edgecore_eap102
+-	IMAGE/factory.ubi := append-ubi | qsdk-ipq-factory-nand
+-endef
+-TARGET_DEVICES += edgecore_eap102
+-
+-define Device/edimax_cax1800
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := Edimax
+-	DEVICE_MODEL := CAX1800
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	DEVICE_DTS_CONFIG := config@ac03
+-	SOC := ipq8070
+-	DEVICE_PACKAGES := ipq-wifi-edimax_cax1800
+-endef
+-TARGET_DEVICES += edimax_cax1800
+-
+-define Device/netgear_wax218
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	ARTIFACTS := web-ui-factory.fit
+-	DEVICE_VENDOR := Netgear
+-	DEVICE_MODEL := WAX218
+-	DEVICE_DTS_CONFIG := config@hk07
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	SOC := ipq8072
+-	ARTIFACT/web-ui-factory.fit := append-image initramfs-uImage.itb | \
+-		ubinize-kernel | qsdk-ipq-factory-nand
+-	DEVICE_PACKAGES := kmod-spi-gpio kmod-spi-bitbang kmod-gpio-nxp-74hc164 \
+-		ipq-wifi-netgear_wax218
+-endef
+-TARGET_DEVICES += netgear_wax218
+-
+-define Device/prpl_haze
+-	$(call Device/FitImage)
+-	$(call Device/EmmcImage)
+-	DEVICE_VENDOR := prpl Foundation
+-	DEVICE_MODEL := Haze
+-	DEVICE_DTS_CONFIG := config@hk09
+-	SOC := ipq8072
+-	DEVICE_PACKAGES += ath11k-firmware-qcn9074 ipq-wifi-prpl_haze kmod-ath11k-pci
+-endef
+-TARGET_DEVICES += prpl_haze
+-
+-define Device/qnap_301w
+-	$(call Device/FitImage)
+-	$(call Device/EmmcImage)
+-	DEVICE_VENDOR := QNAP
+-	DEVICE_MODEL := 301w
+-	DEVICE_DTS_CONFIG := config@hk01
+-	KERNEL_SIZE := 16384k
+-	SOC := ipq8072
+-	DEVICE_PACKAGES += ipq-wifi-qnap_301w
+-endef
+-TARGET_DEVICES += qnap_301w
+-
+-define Device/redmi_ax6
+-	$(call Device/xiaomi_ax3600)
+-	DEVICE_VENDOR := Redmi
+-	DEVICE_MODEL := AX6
+-	DEVICE_PACKAGES := ipq-wifi-redmi_ax6
+-endef
+-TARGET_DEVICES += redmi_ax6
+-
+-define Device/xiaomi_ax3600
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := Xiaomi
+-	DEVICE_MODEL := AX3600
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	DEVICE_DTS_CONFIG := config@ac04
+-	SOC := ipq8071
+-	KERNEL_SIZE := 36608k
+-	DEVICE_PACKAGES := ipq-wifi-xiaomi_ax3600 kmod-ath10k-ct-smallbuffers ath10k-firmware-qca9887-ct
+-ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
+-	ARTIFACTS := initramfs-factory.ubi
+-	ARTIFACT/initramfs-factory.ubi := append-image-stage initramfs-uImage.itb | ubinize-kernel
+-endif
+-endef
+-TARGET_DEVICES += xiaomi_ax3600
+-
+-define Device/xiaomi_ax9000
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := Xiaomi
+-	DEVICE_MODEL := AX9000
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	DEVICE_DTS_CONFIG := config@hk14
+-	SOC := ipq8072
+-	KERNEL_SIZE := 57344k
+-	DEVICE_PACKAGES := ipq-wifi-xiaomi_ax9000 kmod-ath11k-pci ath11k-firmware-qcn9074 \
+-	kmod-ath10k-ct ath10k-firmware-qca9887-ct
+-ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
+-	ARTIFACTS := initramfs-factory.ubi
+-	ARTIFACT/initramfs-factory.ubi := append-image-stage initramfs-uImage.itb | ubinize-kernel
+-endif
+-endef
+-TARGET_DEVICES += xiaomi_ax9000
+-
+-define Device/zyxel_nbg7815
+-	$(call Device/FitImage)
+-	$(call Device/EmmcImage)
+-	DEVICE_VENDOR := ZYXEL
+-	DEVICE_MODEL := NBG7815
+-	DEVICE_DTS_CONFIG := config@nbg7815
+-	SOC := ipq8074
+-	DEVICE_PACKAGES += ipq-wifi-zyxel_nbg7815 kmod-ath11k-pci kmod-hwmon-tmp103 \
+-		kmod-bluetooth
+-endef
+-TARGET_DEVICES += zyxel_nbg7815
+diff --git a/target/linux/ipq807x/patches-5.15/0001-v5.16-arm64-dts-qcom-ipq8074-add-SPMI-bus.patch b/target/linux/ipq807x/patches-5.15/0001-v5.16-arm64-dts-qcom-ipq8074-add-SPMI-bus.patch
+deleted file mode 100644
+index f1c0923301..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0001-v5.16-arm64-dts-qcom-ipq8074-add-SPMI-bus.patch
++++ /dev/null
+@@ -1,43 +0,0 @@
+-From adf62d2727d4aa2b587e2db59eafb5be776a653c Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Sun, 5 Sep 2021 18:58:16 +0200
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: add SPMI bus
+-
+-IPQ8074 uses SPMI for communication with the PMIC, so
+-since its already supported add the DT node for it.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20210905165816.655275-1-robimarko@gmail.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 19 +++++++++++++++++++
+- 1 file changed, 19 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -320,6 +320,25 @@
+- 			#reset-cells = <0x1>;
+- 		};
+- 
+-+		spmi_bus: spmi@200f000 {
+-+			compatible = "qcom,spmi-pmic-arb";
+-+			reg = <0x0200f000 0x001000>,
+-+			      <0x02400000 0x800000>,
+-+			      <0x02c00000 0x800000>,
+-+			      <0x03800000 0x200000>,
+-+			      <0x0200a000 0x000700>;
+-+			reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+-+			interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+-+			interrupt-names = "periph_irq";
+-+			qcom,ee = <0>;
+-+			qcom,channel = <0>;
+-+			#address-cells = <2>;
+-+			#size-cells = <0>;
+-+			interrupt-controller;
+-+			#interrupt-cells = <4>;
+-+			cell-index = <0>;
+-+		};
+-+
+- 		sdhc_1: sdhci@7824900 {
+- 			compatible = "qcom,sdhci-msm-v4";
+- 			reg = <0x7824900 0x500>, <0x7824000 0x800>;
+diff --git a/target/linux/ipq807x/patches-5.15/0002-v5.16-arm64-dts-qcom-Update-BAM-DMA-node-name-per-DT-schem.patch b/target/linux/ipq807x/patches-5.15/0002-v5.16-arm64-dts-qcom-Update-BAM-DMA-node-name-per-DT-schem.patch
+deleted file mode 100644
+index 0e31970a82..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0002-v5.16-arm64-dts-qcom-Update-BAM-DMA-node-name-per-DT-schem.patch
++++ /dev/null
+@@ -1,26 +0,0 @@
+-From 94343612f165fc8b4f95fcbe6fd044d6f63d4a28 Mon Sep 17 00:00:00 2001
+-From: Shawn Guo <shawn.guo@linaro.org>
+-Date: Tue, 31 Aug 2021 13:23:25 +0800
+-Subject: [PATCH] arm64: dts: qcom: Update BAM DMA node name per DT schema
+-
+-Follow dma-controller.yaml schema to use `dma-controller` as node name
+-of BAM DMA devices.
+-
+-Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20210831052325.21229-1-shawn.guo@linaro.org
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -239,7 +239,7 @@
+- 			status = "disabled";
+- 		};
+- 
+--		cryptobam: dma@704000 {
+-+		cryptobam: dma-controller@704000 {
+- 			compatible = "qcom,bam-v1.7.0";
+- 			reg = <0x00704000 0x20000>;
+- 			interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
+diff --git a/target/linux/ipq807x/patches-5.15/0003-v5.16-arm64-dts-qcom-ipq8074-Add-QUP5-I2C-node.patch b/target/linux/ipq807x/patches-5.15/0003-v5.16-arm64-dts-qcom-ipq8074-Add-QUP5-I2C-node.patch
+deleted file mode 100644
+index b20cbe1b37..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0003-v5.16-arm64-dts-qcom-ipq8074-Add-QUP5-I2C-node.patch
++++ /dev/null
+@@ -1,40 +0,0 @@
+-From ccc5b088058bccdf454bd296867c47e56c415cde Mon Sep 17 00:00:00 2001
+-From: Chukun Pan <amadeus@jmu.edu.cn>
+-Date: Fri, 1 Oct 2021 22:54:21 +0800
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: Add QUP5 I2C node
+-
+-Add node to support the QUP5 I2C controller inside of IPQ8074.
+-It is exactly the same as QUP2 controllers.
+-Some routers like ZTE MF269 use this bus.
+-
+-Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20211001145421.18302-1-amadeus@jmu.edu.cn
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 15 +++++++++++++++
+- 1 file changed, 15 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -457,6 +457,21 @@
+- 			status = "disabled";
+- 		};
+- 
+-+		blsp1_i2c5: i2c@78b9000 {
+-+			compatible = "qcom,i2c-qup-v2.2.1";
+-+			#address-cells = <1>;
+-+			#size-cells = <0>;
+-+			reg = <0x78b9000 0x600>;
+-+			interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
+-+			clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+-+				 <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>;
+-+			clock-names = "iface", "core";
+-+			clock-frequency = <400000>;
+-+			dmas = <&blsp_dma 21>, <&blsp_dma 20>;
+-+			dma-names = "rx", "tx";
+-+			status = "disabled";
+-+		};
+-+
+- 		blsp1_i2c6: i2c@78ba000 {
+- 			compatible = "qcom,i2c-qup-v2.2.1";
+- 			#address-cells = <1>;
+diff --git a/target/linux/ipq807x/patches-5.15/0004-v5.16-arm64-dts-qcom-msm8996-Move-clock-cells-to-QMP-PHY-c.patch b/target/linux/ipq807x/patches-5.15/0004-v5.16-arm64-dts-qcom-msm8996-Move-clock-cells-to-QMP-PHY-c.patch
+deleted file mode 100644
+index 94fc27750c..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0004-v5.16-arm64-dts-qcom-msm8996-Move-clock-cells-to-QMP-PHY-c.patch
++++ /dev/null
+@@ -1,53 +0,0 @@
+-From 1a82d7080001d395563ad8266d120d4cf63ad0a5 Mon Sep 17 00:00:00 2001
+-From: Shawn Guo <shawn.guo@linaro.org>
+-Date: Wed, 29 Sep 2021 11:42:46 +0800
+-Subject: [PATCH] arm64: dts: qcom: msm8996: Move '#clock-cells' to QMP PHY
+- child node
+-
+-'#clock-cells' is a required property of QMP PHY child node, not itself.
+-Move it to fix the dtbs_check warnings.
+-
+-There are only '#clock-cells' removal from SM8350 QMP PHY nodes, because
+-child nodes already have the property.
+-
+-Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20210929034253.24570-4-shawn.guo@linaro.org
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
+- 1 file changed, 2 insertions(+), 2 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -91,7 +91,6 @@
+- 		ssphy_1: phy@58000 {
+- 			compatible = "qcom,ipq8074-qmp-usb3-phy";
+- 			reg = <0x00058000 0x1c4>;
+--			#clock-cells = <1>;
+- 			#address-cells = <1>;
+- 			#size-cells = <1>;
+- 			ranges;
+-@@ -112,6 +111,7 @@
+- 				      <0x00058800 0x1f8>,     /* PCS  */
+- 				      <0x00058600 0x044>;     /* PCS misc*/
+- 				#phy-cells = <0>;
+-+				#clock-cells = <1>;
+- 				clocks = <&gcc GCC_USB1_PIPE_CLK>;
+- 				clock-names = "pipe0";
+- 				clock-output-names = "usb3phy_1_cc_pipe_clk";
+-@@ -134,7 +134,6 @@
+- 		ssphy_0: phy@78000 {
+- 			compatible = "qcom,ipq8074-qmp-usb3-phy";
+- 			reg = <0x00078000 0x1c4>;
+--			#clock-cells = <1>;
+- 			#address-cells = <1>;
+- 			#size-cells = <1>;
+- 			ranges;
+-@@ -155,6 +154,7 @@
+- 				      <0x00078800 0x1f8>,     /* PCS  */
+- 				      <0x00078600 0x044>;     /* PCS misc*/
+- 				#phy-cells = <0>;
+-+				#clock-cells = <1>;
+- 				clocks = <&gcc GCC_USB0_PIPE_CLK>;
+- 				clock-names = "pipe0";
+- 				clock-output-names = "usb3phy_0_cc_pipe_clk";
+diff --git a/target/linux/ipq807x/patches-5.15/0007-v5.17-arm64-dts-qcom-ipq8074-add-MDIO-bus.patch b/target/linux/ipq807x/patches-5.15/0007-v5.17-arm64-dts-qcom-ipq8074-add-MDIO-bus.patch
+deleted file mode 100644
+index b31c06cb58..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0007-v5.17-arm64-dts-qcom-ipq8074-add-MDIO-bus.patch
++++ /dev/null
+@@ -1,36 +0,0 @@
+-From 036e332e29ee24396ad877cc6a1275d86a1c4b3d Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Thu, 7 Oct 2021 13:58:46 +0200
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: add MDIO bus
+-
+-IPQ8074 uses an IPQ4019 compatible MDIO controller that is already
+-supported in the kernel, so add the DT node in order to use it.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20211007115846.26255-1-robimarko@gmail.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 12 ++++++++++++
+- 1 file changed, 12 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -231,6 +231,18 @@
+- 			};
+- 		};
+- 
+-+		mdio: mdio@90000 {
+-+			compatible = "qcom,ipq4019-mdio";
+-+			reg = <0x00090000 0x64>;
+-+			#address-cells = <1>;
+-+			#size-cells = <0>;
+-+
+-+			clocks = <&gcc GCC_MDIO_AHB_CLK>;
+-+			clock-names = "gcc_mdio_ahb_clk";
+-+
+-+			status = "disabled";
+-+		};
+-+
+- 		prng: rng@e3000 {
+- 			compatible = "qcom,prng-ee";
+- 			reg = <0x000e3000 0x1000>;
+diff --git a/target/linux/ipq807x/patches-5.15/0008-v5.18-arm64-dts-qcom-ipq8074-add-SMEM-support.patch b/target/linux/ipq807x/patches-5.15/0008-v5.18-arm64-dts-qcom-ipq8074-add-SMEM-support.patch
+deleted file mode 100644
+index afaa2bae82..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0008-v5.18-arm64-dts-qcom-ipq8074-add-SMEM-support.patch
++++ /dev/null
+@@ -1,51 +0,0 @@
+-From 29e135cf87900ac1da457bb27e98e30ca7f723ea Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Thu, 6 Jan 2022 22:25:12 +0100
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: add SMEM support
+-
+-IPQ8074 uses SMEM like other modern QCA SoC-s, so since its already
+-supported by the kernel add the required DT nodes.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220106212512.1970828-1-robimarko@gmail.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 20 ++++++++++++++++++++
+- 1 file changed, 20 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -76,6 +76,20 @@
+- 		method = "smc";
+- 	};
+- 
+-+	reserved-memory {
+-+		#address-cells = <2>;
+-+		#size-cells = <2>;
+-+		ranges;
+-+
+-+		smem@4ab00000 {
+-+			compatible = "qcom,smem";
+-+			reg = <0x0 0x4ab00000 0x0 0x00100000>;
+-+			no-map;
+-+
+-+			hwlocks = <&tcsr_mutex 0>;
+-+		};
+-+	};
+-+
+- 	firmware {
+- 		scm {
+- 			compatible = "qcom,scm-ipq8074", "qcom,scm";
+-@@ -332,6 +346,12 @@
+- 			#reset-cells = <0x1>;
+- 		};
+- 
+-+		tcsr_mutex: hwlock@1905000 {
+-+			compatible = "qcom,tcsr-mutex";
+-+			reg = <0x01905000 0x20000>;
+-+			#hwlock-cells = <1>;
+-+		};
+-+
+- 		spmi_bus: spmi@200f000 {
+- 			compatible = "qcom,spmi-pmic-arb";
+- 			reg = <0x0200f000 0x001000>,
+diff --git a/target/linux/ipq807x/patches-5.15/0009-v5.18-arm64-dts-qcom-ipq8074-add-the-reserved-memory-node.patch b/target/linux/ipq807x/patches-5.15/0009-v5.18-arm64-dts-qcom-ipq8074-add-the-reserved-memory-node.patch
+deleted file mode 100644
+index 6b0db7092d..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0009-v5.18-arm64-dts-qcom-ipq8074-add-the-reserved-memory-node.patch
++++ /dev/null
+@@ -1,30 +0,0 @@
+-From 0f1cdeea7f237de21f244c06f2c102f93dbd9c4e Mon Sep 17 00:00:00 2001
+-From: Kathiravan T <quic_kathirav@quicinc.com>
+-Date: Fri, 7 Jan 2022 18:24:38 +0530
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: add the reserved-memory node
+-
+-On IPQ8074, 4MB of memory is needed for TZ. So mark that region
+-as reserved.
+-
+-Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
+-[bjorn: Squash with existing reserved-memory node]
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/1641560078-860-1-git-send-email-quic_kathirav@quicinc.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 5 +++++
+- 1 file changed, 5 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -88,6 +88,11 @@
+- 
+- 			hwlocks = <&tcsr_mutex 0>;
+- 		};
+-+
+-+		memory@4ac00000 {
+-+			no-map;
+-+			reg = <0x0 0x4ac00000 0x0 0x00400000>;
+-+		};
+- 	};
+- 
+- 	firmware {
+diff --git a/target/linux/ipq807x/patches-5.15/0010-v5.18-arm64-dts-qcom-ipq8074-enable-the-GICv2m-support.patch b/target/linux/ipq807x/patches-5.15/0010-v5.18-arm64-dts-qcom-ipq8074-enable-the-GICv2m-support.patch
+deleted file mode 100644
+index 3d5372a6e6..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0010-v5.18-arm64-dts-qcom-ipq8074-enable-the-GICv2m-support.patch
++++ /dev/null
+@@ -1,36 +0,0 @@
+-From a505f23abf0c31f40a2c3070d82e961b7c045664 Mon Sep 17 00:00:00 2001
+-From: Kathiravan T <quic_kathirav@quicinc.com>
+-Date: Tue, 8 Feb 2022 21:05:24 +0530
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: enable the GICv2m support
+-
+-GIC used in the IPQ8074 SoCs has one instance of the GICv2m extension,
+-which supports upto 32 MSI interrupts. Lets add support for the same.
+-
+-Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/1644334525-11577-2-git-send-email-quic_kathirav@quicinc.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 9 +++++++++
+- 1 file changed, 9 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -635,9 +635,18 @@
+- 
+- 		intc: interrupt-controller@b000000 {
+- 			compatible = "qcom,msm-qgic2";
+-+			#address-cells = <1>;
+-+			#size-cells = <1>;
+- 			interrupt-controller;
+- 			#interrupt-cells = <0x3>;
+- 			reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
+-+			ranges = <0 0xb00a000 0xffd>;
+-+
+-+			v2m@0 {
+-+				compatible = "arm,gic-v2m-frame";
+-+				msi-controller;
+-+				reg = <0x0 0xffd>;
+-+			};
+- 		};
+- 
+- 		timer {
+diff --git a/target/linux/ipq807x/patches-5.15/0011-v5.18-arm64-dts-qcom-ipq8074-drop-the-clock-frequency-prop.patch b/target/linux/ipq807x/patches-5.15/0011-v5.18-arm64-dts-qcom-ipq8074-drop-the-clock-frequency-prop.patch
+deleted file mode 100644
+index 9018087e40..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0011-v5.18-arm64-dts-qcom-ipq8074-drop-the-clock-frequency-prop.patch
++++ /dev/null
+@@ -1,25 +0,0 @@
+-From 2a73fa24be1d5a263062696f55dcc90725f9159c Mon Sep 17 00:00:00 2001
+-From: Kathiravan T <quic_kathirav@quicinc.com>
+-Date: Wed, 2 Feb 2022 22:05:08 +0530
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: drop the clock-frequency property
+-
+-Drop the clock-frequency property from the MMIO timer node, since it
+-is already configured by the bootloader.
+-
+-Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/1643819709-5410-2-git-send-email-quic_kathirav@quicinc.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 1 -
+- 1 file changed, 1 deletion(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -671,7 +671,6 @@
+- 			ranges;
+- 			compatible = "arm,armv7-timer-mem";
+- 			reg = <0x0b120000 0x1000>;
+--			clock-frequency = <19200000>;
+- 
+- 			frame@b120000 {
+- 				frame-number = <0>;
+diff --git a/target/linux/ipq807x/patches-5.15/0012-v5.19-arm64-dts-qcom-align-dmas-in-I2C-SPI-UART-with-DT-sc.patch b/target/linux/ipq807x/patches-5.15/0012-v5.19-arm64-dts-qcom-align-dmas-in-I2C-SPI-UART-with-DT-sc.patch
+deleted file mode 100644
+index 19be9bd861..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0012-v5.19-arm64-dts-qcom-align-dmas-in-I2C-SPI-UART-with-DT-sc.patch
++++ /dev/null
+@@ -1,61 +0,0 @@
+-From 6f39b05b13e7be39919fd8d235bb0e63ecabf190 Mon Sep 17 00:00:00 2001
+-From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Date: Tue, 5 Apr 2022 08:34:43 +0200
+-Subject: [PATCH] arm64: dts: qcom: align dmas in I2C/SPI/UART with DT schema
+-
+-The DT schema expects dma channels in tx-rx order.  No functional
+-change.
+-
+-Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220405063451.12011-2-krzysztof.kozlowski@linaro.org
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 16 ++++++++--------
+- 1 file changed, 8 insertions(+), 8 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -472,8 +472,8 @@
+- 				<&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
+- 			clock-names = "iface", "core";
+- 			clock-frequency = <400000>;
+--			dmas = <&blsp_dma 15>, <&blsp_dma 14>;
+--			dma-names = "rx", "tx";
+-+			dmas = <&blsp_dma 14>, <&blsp_dma 15>;
+-+			dma-names = "tx", "rx";
+- 			pinctrl-0 = <&i2c_0_pins>;
+- 			pinctrl-names = "default";
+- 			status = "disabled";
+-@@ -489,8 +489,8 @@
+- 				<&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
+- 			clock-names = "iface", "core";
+- 			clock-frequency = <100000>;
+--			dmas = <&blsp_dma 17>, <&blsp_dma 16>;
+--			dma-names = "rx", "tx";
+-+			dmas = <&blsp_dma 16>, <&blsp_dma 17>;
+-+			dma-names = "tx", "rx";
+- 			status = "disabled";
+- 		};
+- 
+-@@ -504,8 +504,8 @@
+- 				 <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>;
+- 			clock-names = "iface", "core";
+- 			clock-frequency = <400000>;
+--			dmas = <&blsp_dma 21>, <&blsp_dma 20>;
+--			dma-names = "rx", "tx";
+-+			dmas = <&blsp_dma 20>, <&blsp_dma 21>;
+-+			dma-names = "tx", "rx";
+- 			status = "disabled";
+- 		};
+- 
+-@@ -519,8 +519,8 @@
+- 				 <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
+- 			clock-names = "iface", "core";
+- 			clock-frequency = <100000>;
+--			dmas = <&blsp_dma 23>, <&blsp_dma 22>;
+--			dma-names = "rx", "tx";
+-+			dmas = <&blsp_dma 22>, <&blsp_dma 23>;
+-+			dma-names = "tx", "rx";
+- 			status = "disabled";
+- 		};
+- 
+diff --git a/target/linux/ipq807x/patches-5.15/0013-v5.19-arm64-dts-qcom-align-clocks-in-I2C-SPI-with-DT-schem.patch b/target/linux/ipq807x/patches-5.15/0013-v5.19-arm64-dts-qcom-align-clocks-in-I2C-SPI-with-DT-schem.patch
+deleted file mode 100644
+index d1c214c2c7..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0013-v5.19-arm64-dts-qcom-align-clocks-in-I2C-SPI-with-DT-schem.patch
++++ /dev/null
+@@ -1,68 +0,0 @@
+-From 61d4a1751cfe5a22e5f18478fe16ffb1ee12607d Mon Sep 17 00:00:00 2001
+-From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Date: Tue, 5 Apr 2022 08:34:44 +0200
+-Subject: [PATCH] arm64: dts: qcom: align clocks in I2C/SPI with DT schema
+-
+-The DT schema expects clocks core-iface order.  No functional change.
+-
+-Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220405063451.12011-3-krzysztof.kozlowski@linaro.org
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 24 ++++++++++++------------
+- 1 file changed, 12 insertions(+), 12 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -468,9 +468,9 @@
+- 			#size-cells = <0>;
+- 			reg = <0x078b6000 0x600>;
+- 			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+--			clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+--				<&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
+--			clock-names = "iface", "core";
+-+			clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
+-+				 <&gcc GCC_BLSP1_AHB_CLK>;
+-+			clock-names = "core", "iface";
+- 			clock-frequency = <400000>;
+- 			dmas = <&blsp_dma 14>, <&blsp_dma 15>;
+- 			dma-names = "tx", "rx";
+-@@ -485,9 +485,9 @@
+- 			#size-cells = <0>;
+- 			reg = <0x078b7000 0x600>;
+- 			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+--			clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+--				<&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
+--			clock-names = "iface", "core";
+-+			clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
+-+				 <&gcc GCC_BLSP1_AHB_CLK>;
+-+			clock-names = "core", "iface";
+- 			clock-frequency = <100000>;
+- 			dmas = <&blsp_dma 16>, <&blsp_dma 17>;
+- 			dma-names = "tx", "rx";
+-@@ -500,9 +500,9 @@
+- 			#size-cells = <0>;
+- 			reg = <0x78b9000 0x600>;
+- 			interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
+--			clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+--				 <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>;
+--			clock-names = "iface", "core";
+-+			clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>,
+-+				 <&gcc GCC_BLSP1_AHB_CLK>;
+-+			clock-names = "core", "iface";
+- 			clock-frequency = <400000>;
+- 			dmas = <&blsp_dma 20>, <&blsp_dma 21>;
+- 			dma-names = "tx", "rx";
+-@@ -515,9 +515,9 @@
+- 			#size-cells = <0>;
+- 			reg = <0x078ba000 0x600>;
+- 			interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
+--			clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+--				 <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
+--			clock-names = "iface", "core";
+-+			clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
+-+				 <&gcc GCC_BLSP1_AHB_CLK>;
+-+			clock-names = "core", "iface";
+- 			clock-frequency = <100000>;
+- 			dmas = <&blsp_dma 22>, <&blsp_dma 23>;
+- 			dma-names = "tx", "rx";
+diff --git a/target/linux/ipq807x/patches-5.15/0014-v5.19-arm64-dts-qcom-correct-DWC3-node-names-and-unit-addr.patch b/target/linux/ipq807x/patches-5.15/0014-v5.19-arm64-dts-qcom-correct-DWC3-node-names-and-unit-addr.patch
+deleted file mode 100644
+index 1b41f97002..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0014-v5.19-arm64-dts-qcom-correct-DWC3-node-names-and-unit-addr.patch
++++ /dev/null
+@@ -1,36 +0,0 @@
+-From ee9002a825695b5dca76f758a9365ca7f7d18265 Mon Sep 17 00:00:00 2001
+-From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Date: Wed, 4 May 2022 15:19:16 +0200
+-Subject: [PATCH] arm64: dts: qcom: correct DWC3 node names and unit addresses
+-
+-Align DWC3 USB node names with DT schema ("usb" is expected) and correct
+-the unit addresses to match the "reg" property.  This also implies
+-overriding nodes by label, instead of full path.
+-
+-Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Link: https://lore.kernel.org/r/20220504131923.214367-7-krzysztof.kozlowski@linaro.org
+-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
+- 1 file changed, 2 insertions(+), 2 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -579,7 +579,7 @@
+- 			resets = <&gcc GCC_USB0_BCR>;
+- 			status = "disabled";
+- 
+--			dwc_0: dwc3@8a00000 {
+-+			dwc_0: usb@8a00000 {
+- 				compatible = "snps,dwc3";
+- 				reg = <0x8a00000 0xcd00>;
+- 				interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+-@@ -619,7 +619,7 @@
+- 			resets = <&gcc GCC_USB1_BCR>;
+- 			status = "disabled";
+- 
+--			dwc_1: dwc3@8c00000 {
+-+			dwc_1: usb@8c00000 {
+- 				compatible = "snps,dwc3";
+- 				reg = <0x8c00000 0xcd00>;
+- 				interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
+diff --git a/target/linux/ipq807x/patches-5.15/0015-v5.19-arm64-dts-qcom-ipq8074-add-dedicated-qcom-ipq8074-dw.patch b/target/linux/ipq807x/patches-5.15/0015-v5.19-arm64-dts-qcom-ipq8074-add-dedicated-qcom-ipq8074-dw.patch
+deleted file mode 100644
+index 68173e81d2..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0015-v5.19-arm64-dts-qcom-ipq8074-add-dedicated-qcom-ipq8074-dw.patch
++++ /dev/null
+@@ -1,36 +0,0 @@
+-From 71061acf1a9343317e4d34a2c4578ed9301112cc Mon Sep 17 00:00:00 2001
+-From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Date: Wed, 4 May 2022 15:19:17 +0200
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: add dedicated qcom,ipq8074-dwc3
+- compatible
+-
+-Add dedicated compatible for DWC3 USB node name to allow more accurate
+-DT schema matching.
+-
+-Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Link: https://lore.kernel.org/r/20220504131923.214367-8-krzysztof.kozlowski@linaro.org
+-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
+- 1 file changed, 2 insertions(+), 2 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -554,7 +554,7 @@
+- 		};
+- 
+- 		usb_0: usb@8af8800 {
+--			compatible = "qcom,dwc3";
+-+			compatible = "qcom,ipq8074-dwc3", "qcom,dwc3";
+- 			reg = <0x08af8800 0x400>;
+- 			#address-cells = <1>;
+- 			#size-cells = <1>;
+-@@ -594,7 +594,7 @@
+- 		};
+- 
+- 		usb_1: usb@8cf8800 {
+--			compatible = "qcom,dwc3";
+-+			compatible = "qcom,ipq8074-dwc3", "qcom,dwc3";
+- 			reg = <0x08cf8800 0x400>;
+- 			#address-cells = <1>;
+- 			#size-cells = <1>;
+diff --git a/target/linux/ipq807x/patches-5.15/0016-v5.19-arm64-dts-qcom-align-DWC3-USB-clocks-with-DT-schema.patch b/target/linux/ipq807x/patches-5.15/0016-v5.19-arm64-dts-qcom-align-DWC3-USB-clocks-with-DT-schema.patch
+deleted file mode 100644
+index de7c3eaffc..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0016-v5.19-arm64-dts-qcom-align-DWC3-USB-clocks-with-DT-schema.patch
++++ /dev/null
+@@ -1,39 +0,0 @@
+-From 159cbe595c1018a0172c637374ec69af643fa9f5 Mon Sep 17 00:00:00 2001
+-From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Date: Wed, 4 May 2022 15:19:22 +0200
+-Subject: [PATCH] arm64: dts: qcom: align DWC3 USB clocks with DT schema
+-
+-Align order of clocks and their names with Qualcomm DWC3 USB DT schema.
+-No functional impact expected.
+-
+-Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Link: https://lore.kernel.org/r/20220504131923.214367-13-krzysztof.kozlowski@linaro.org
+-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8 ++++----
+- 1 file changed, 4 insertions(+), 4 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -564,8 +564,8 @@
+- 				<&gcc GCC_USB0_MASTER_CLK>,
+- 				<&gcc GCC_USB0_SLEEP_CLK>,
+- 				<&gcc GCC_USB0_MOCK_UTMI_CLK>;
+--			clock-names = "sys_noc_axi",
+--				"master",
+-+			clock-names = "cfg_noc",
+-+				"core",
+- 				"sleep",
+- 				"mock_utmi";
+- 
+-@@ -604,8 +604,8 @@
+- 				<&gcc GCC_USB1_MASTER_CLK>,
+- 				<&gcc GCC_USB1_SLEEP_CLK>,
+- 				<&gcc GCC_USB1_MOCK_UTMI_CLK>;
+--			clock-names = "sys_noc_axi",
+--				"master",
+-+			clock-names = "cfg_noc",
+-+				"core",
+- 				"sleep",
+- 				"mock_utmi";
+- 
+diff --git a/target/linux/ipq807x/patches-5.15/0017-v6.0-arm64-dts-qcom-adjust-whitespace-around.patch b/target/linux/ipq807x/patches-5.15/0017-v6.0-arm64-dts-qcom-adjust-whitespace-around.patch
+deleted file mode 100644
+index 515582da5c..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0017-v6.0-arm64-dts-qcom-adjust-whitespace-around.patch
++++ /dev/null
+@@ -1,36 +0,0 @@
+-From a9f7dc27469ca9588d7aa572bdfdfd5f0f1aab6a Mon Sep 17 00:00:00 2001
+-From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Date: Thu, 26 May 2022 22:42:47 +0200
+-Subject: [PATCH] arm64: dts: qcom: adjust whitespace around '='
+-
+-Fix whitespace coding style: use single space instead of tabs or
+-multiple spaces around '=' sign in property assignment.  No functional
+-changes (same DTB).
+-
+-Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220526204248.832139-1-krzysztof.kozlowski@linaro.org
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
+- 1 file changed, 2 insertions(+), 2 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -119,7 +119,7 @@
+- 				<&xo>;
+- 			clock-names = "aux", "cfg_ahb", "ref";
+- 
+--			resets =  <&gcc GCC_USB1_PHY_BCR>,
+-+			resets = <&gcc GCC_USB1_PHY_BCR>,
+- 				<&gcc GCC_USB3PHY_1_PHY_BCR>;
+- 			reset-names = "phy","common";
+- 			status = "disabled";
+-@@ -162,7 +162,7 @@
+- 				<&xo>;
+- 			clock-names = "aux", "cfg_ahb", "ref";
+- 
+--			resets =  <&gcc GCC_USB0_PHY_BCR>,
+-+			resets = <&gcc GCC_USB0_PHY_BCR>,
+- 				<&gcc GCC_USB3PHY_0_PHY_BCR>;
+- 			reset-names = "phy","common";
+- 			status = "disabled";
+diff --git a/target/linux/ipq807x/patches-5.15/0018-v6.0-arm64-dts-qcom-Fix-sdhci-node-names-use-mmc.patch b/target/linux/ipq807x/patches-5.15/0018-v6.0-arm64-dts-qcom-Fix-sdhci-node-names-use-mmc.patch
+deleted file mode 100644
+index 20f7dc926d..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0018-v6.0-arm64-dts-qcom-Fix-sdhci-node-names-use-mmc.patch
++++ /dev/null
+@@ -1,34 +0,0 @@
+-From 2e9703ffe97a1c447c0d00c061526fbeeade6107 Mon Sep 17 00:00:00 2001
+-From: Bhupesh Sharma <bhupesh.sharma@linaro.org>
+-Date: Sun, 15 May 2022 03:24:19 +0530
+-Subject: [PATCH] arm64: dts: qcom: Fix sdhci node names - use 'mmc@'
+-
+-Since the Qualcomm sdhci-msm device-tree binding has been converted
+-to yaml format, 'make dtbs_check' reports issues with
+-inconsistent 'sdhci@' convention used for specifying the
+-sdhci nodes. The generic mmc bindings expect 'mmc@' format
+-instead.
+-
+-Fix the same.
+-
+-Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Cc: Rob Herring <robh@kernel.org>
+-Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
+-[bjorn: Moved non-arm64 changes to separate commit]
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220514215424.1007718-2-bhupesh.sharma@linaro.org
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -376,7 +376,7 @@
+- 			cell-index = <0>;
+- 		};
+- 
+--		sdhc_1: sdhci@7824900 {
+-+		sdhc_1: mmc@7824900 {
+- 			compatible = "qcom,sdhci-msm-v4";
+- 			reg = <0x7824900 0x500>, <0x7824000 0x800>;
+- 			reg-names = "hc_mem", "core_mem";
+diff --git a/target/linux/ipq807x/patches-5.15/0019-v6.0-arm64-dts-qcom-Fix-ordering-of-clocks-clock-names-fo.patch b/target/linux/ipq807x/patches-5.15/0019-v6.0-arm64-dts-qcom-Fix-ordering-of-clocks-clock-names-fo.patch
+deleted file mode 100644
+index 24fd7fc9f7..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0019-v6.0-arm64-dts-qcom-Fix-ordering-of-clocks-clock-names-fo.patch
++++ /dev/null
+@@ -1,47 +0,0 @@
+-From 18363f691e931abf0e9bdc9b5169fb15aa10224d Mon Sep 17 00:00:00 2001
+-From: Bhupesh Sharma <bhupesh.sharma@linaro.org>
+-Date: Sun, 15 May 2022 03:24:22 +0530
+-Subject: [PATCH] arm64: dts: qcom: Fix ordering of 'clocks' & 'clock-names'
+- for sdhci nodes
+-
+-Since the Qualcomm sdhci-msm device-tree binding has been converted
+-to yaml format, 'make dtbs_check' reports a number of issues with
+-ordering of 'clocks' & 'clock-names' for sdhci nodes:
+-
+- arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900:
+-  clock-names:0: 'iface' was expected
+-
+- arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900:
+-  clock-names:1: 'core' was expected
+-
+- arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900:
+-  clock-names:2: 'xo' was expected
+-
+-Fix the same by updating the offending 'dts' files.
+-
+-Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Cc: Rob Herring <robh@kernel.org>
+-Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220514215424.1007718-5-bhupesh.sharma@linaro.org
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8 ++++----
+- 1 file changed, 4 insertions(+), 4 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -385,10 +385,10 @@
+- 				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+- 			interrupt-names = "hc_irq", "pwr_irq";
+- 
+--			clocks = <&xo>,
+--				 <&gcc GCC_SDCC1_AHB_CLK>,
+--				 <&gcc GCC_SDCC1_APPS_CLK>;
+--			clock-names = "xo", "iface", "core";
+-+			clocks = <&gcc GCC_SDCC1_AHB_CLK>,
+-+				 <&gcc GCC_SDCC1_APPS_CLK>,
+-+				 <&xo>;
+-+			clock-names = "iface", "core", "xo";
+- 			max-frequency = <384000000>;
+- 			mmc-ddr-1_8v;
+- 			mmc-hs200-1_8v;
+diff --git a/target/linux/ipq807x/patches-5.15/0020-v6.0-dt-bindings-clock-qcom-ipq8074-add-PPE-crypto-clock.patch b/target/linux/ipq807x/patches-5.15/0020-v6.0-dt-bindings-clock-qcom-ipq8074-add-PPE-crypto-clock.patch
+deleted file mode 100644
+index f2055d94b1..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0020-v6.0-dt-bindings-clock-qcom-ipq8074-add-PPE-crypto-clock.patch
++++ /dev/null
+@@ -1,25 +0,0 @@
+-From aa14b0c11f6442cd489d33c2855941055a3d4fa6 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Sun, 15 May 2022 23:00:41 +0200
+-Subject: [PATCH] dt-bindings: clock: qcom: ipq8074: add PPE crypto clock
+-
+-Add binding for the PPE crypto clock in IPQ8074.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220515210048.483898-4-robimarko@gmail.com
+----
+- include/dt-bindings/clock/qcom,gcc-ipq8074.h | 1 +
+- 1 file changed, 1 insertion(+)
+-
+---- a/include/dt-bindings/clock/qcom,gcc-ipq8074.h
+-+++ b/include/dt-bindings/clock/qcom,gcc-ipq8074.h
+-@@ -233,6 +233,7 @@
+- #define GCC_PCIE0_AXI_S_BRIDGE_CLK		224
+- #define GCC_PCIE0_RCHNG_CLK_SRC			225
+- #define GCC_PCIE0_RCHNG_CLK			226
+-+#define GCC_CRYPTO_PPE_CLK			227
+- 
+- #define GCC_BLSP1_BCR				0
+- #define GCC_BLSP1_QUP1_BCR			1
+diff --git a/target/linux/ipq807x/patches-5.15/0021-v6.0-clk-qcom-ipq8074-add-PPE-crypto-clock.patch b/target/linux/ipq807x/patches-5.15/0021-v6.0-clk-qcom-ipq8074-add-PPE-crypto-clock.patch
+deleted file mode 100644
+index 71fd33331d..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0021-v6.0-clk-qcom-ipq8074-add-PPE-crypto-clock.patch
++++ /dev/null
+@@ -1,52 +0,0 @@
+-From f91d0e8bd6c1f812bc2589050c05a90ee886c749 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Sun, 15 May 2022 23:00:42 +0200
+-Subject: [PATCH] clk: qcom: ipq8074: add PPE crypto clock
+-
+-The built-in PPE engine has a dedicated clock for the EIP-197 crypto
+-engine.
+-
+-So, since the required clock currently missing add support for it.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220515210048.483898-5-robimarko@gmail.com
+----
+- drivers/clk/qcom/gcc-ipq8074.c | 19 +++++++++++++++++++
+- 1 file changed, 19 insertions(+)
+-
+---- a/drivers/clk/qcom/gcc-ipq8074.c
+-+++ b/drivers/clk/qcom/gcc-ipq8074.c
+-@@ -3183,6 +3183,24 @@ static struct clk_branch gcc_nss_ptp_ref
+- 	},
+- };
+- 
+-+static struct clk_branch gcc_crypto_ppe_clk = {
+-+	.halt_reg = 0x68310,
+-+	.halt_bit = 31,
+-+	.clkr = {
+-+		.enable_reg = 0x68310,
+-+		.enable_mask = BIT(0),
+-+		.hw.init = &(struct clk_init_data){
+-+			.name = "gcc_crypto_ppe_clk",
+-+			.parent_names = (const char *[]){
+-+				"nss_ppe_clk_src"
+-+			},
+-+			.num_parents = 1,
+-+			.flags = CLK_SET_RATE_PARENT,
+-+			.ops = &clk_branch2_ops,
+-+		},
+-+	},
+-+};
+-+
+- static struct clk_branch gcc_nssnoc_ce_apb_clk = {
+- 	.halt_reg = 0x6830c,
+- 	.clkr = {
+-@@ -4655,6 +4673,7 @@ static struct clk_regmap *gcc_ipq8074_cl
+- 	[GCC_PCIE0_RCHNG_CLK_SRC] = &pcie0_rchng_clk_src.clkr,
+- 	[GCC_PCIE0_RCHNG_CLK] = &gcc_pcie0_rchng_clk.clkr,
+- 	[GCC_PCIE0_AXI_S_BRIDGE_CLK] = &gcc_pcie0_axi_s_bridge_clk.clkr,
+-+	[GCC_CRYPTO_PPE_CLK] = &gcc_crypto_ppe_clk.clkr,
+- };
+- 
+- static const struct qcom_reset_map gcc_ipq8074_resets[] = {
+diff --git a/target/linux/ipq807x/patches-5.15/0022-v6.0-dt-bindings-clock-qcom-ipq8074-add-USB-GDSCs.patch b/target/linux/ipq807x/patches-5.15/0022-v6.0-dt-bindings-clock-qcom-ipq8074-add-USB-GDSCs.patch
+deleted file mode 100644
+index 908ed233b2..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0022-v6.0-dt-bindings-clock-qcom-ipq8074-add-USB-GDSCs.patch
++++ /dev/null
+@@ -1,25 +0,0 @@
+-From f5441c669d5442d247c69bab3eb27c074c0dd19a Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Sun, 15 May 2022 23:00:45 +0200
+-Subject: [PATCH] dt-bindings: clock: qcom: ipq8074: add USB GDSCs
+-
+-Add bindings for the USB GDSCs found in IPQ8074 GCC.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220515210048.483898-8-robimarko@gmail.com
+----
+- include/dt-bindings/clock/qcom,gcc-ipq8074.h | 3 +++
+- 1 file changed, 3 insertions(+)
+-
+---- a/include/dt-bindings/clock/qcom,gcc-ipq8074.h
+-+++ b/include/dt-bindings/clock/qcom,gcc-ipq8074.h
+-@@ -368,4 +368,7 @@
+- #define GCC_PCIE1_AXI_MASTER_STICKY_ARES	130
+- #define GCC_PCIE0_AXI_SLAVE_STICKY_ARES		131
+- 
+-+#define USB0_GDSC				0
+-+#define USB1_GDSC				1
+-+
+- #endif
+diff --git a/target/linux/ipq807x/patches-5.15/0023-v6.0-clk-qcom-ipq8074-add-USB-GDSCs.patch b/target/linux/ipq807x/patches-5.15/0023-v6.0-clk-qcom-ipq8074-add-USB-GDSCs.patch
+deleted file mode 100644
+index 7fcb190578..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0023-v6.0-clk-qcom-ipq8074-add-USB-GDSCs.patch
++++ /dev/null
+@@ -1,79 +0,0 @@
+-From ff35d239b7b64f71d7dd9d0ce887647de2cacfcc Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Sun, 15 May 2022 23:00:46 +0200
+-Subject: [PATCH] clk: qcom: ipq8074: add USB GDSCs
+-
+-Add GDSC-s for each of the two USB controllers built-in the IPQ8074.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220515210048.483898-9-robimarko@gmail.com
+----
+- drivers/clk/qcom/Kconfig       |  1 +
+- drivers/clk/qcom/gcc-ipq8074.c | 24 ++++++++++++++++++++++++
+- 2 files changed, 25 insertions(+)
+-
+---- a/drivers/clk/qcom/Kconfig
+-+++ b/drivers/clk/qcom/Kconfig
+-@@ -166,6 +166,7 @@ config IPQ_LCC_806X
+- 
+- config IPQ_GCC_8074
+- 	tristate "IPQ8074 Global Clock Controller"
+-+	select QCOM_GDSC
+- 	help
+- 	  Support for global clock controller on ipq8074 devices.
+- 	  Say Y if you want to use peripheral devices such as UART, SPI,
+---- a/drivers/clk/qcom/gcc-ipq8074.c
+-+++ b/drivers/clk/qcom/gcc-ipq8074.c
+-@@ -22,6 +22,7 @@
+- #include "clk-alpha-pll.h"
+- #include "clk-regmap-divider.h"
+- #include "clk-regmap-mux.h"
+-+#include "gdsc.h"
+- #include "reset.h"
+- 
+- enum {
+-@@ -4408,6 +4409,22 @@ static struct clk_branch gcc_pcie0_axi_s
+- 	},
+- };
+- 
+-+static struct gdsc usb0_gdsc = {
+-+	.gdscr = 0x3e078,
+-+	.pd = {
+-+		.name = "usb0_gdsc",
+-+	},
+-+	.pwrsts = PWRSTS_OFF_ON,
+-+};
+-+
+-+static struct gdsc usb1_gdsc = {
+-+	.gdscr = 0x3f078,
+-+	.pd = {
+-+		.name = "usb1_gdsc",
+-+	},
+-+	.pwrsts = PWRSTS_OFF_ON,
+-+};
+-+
+- static const struct alpha_pll_config ubi32_pll_config = {
+- 	.l = 0x4e,
+- 	.config_ctl_val = 0x200d4aa8,
+-@@ -4811,6 +4828,11 @@ static const struct qcom_reset_map gcc_i
+- 	[GCC_PCIE1_AXI_MASTER_STICKY_ARES] = { 0x76040, 6 },
+- };
+- 
+-+static struct gdsc *gcc_ipq8074_gdscs[] = {
+-+	[USB0_GDSC] = &usb0_gdsc,
+-+	[USB1_GDSC] = &usb1_gdsc,
+-+};
+-+
+- static const struct of_device_id gcc_ipq8074_match_table[] = {
+- 	{ .compatible = "qcom,gcc-ipq8074" },
+- 	{ }
+-@@ -4833,6 +4855,8 @@ static const struct qcom_cc_desc gcc_ipq
+- 	.num_resets = ARRAY_SIZE(gcc_ipq8074_resets),
+- 	.clk_hws = gcc_ipq8074_hws,
+- 	.num_clk_hws = ARRAY_SIZE(gcc_ipq8074_hws),
+-+	.gdscs = gcc_ipq8074_gdscs,
+-+	.num_gdscs = ARRAY_SIZE(gcc_ipq8074_gdscs),
+- };
+- 
+- static int gcc_ipq8074_probe(struct platform_device *pdev)
+diff --git a/target/linux/ipq807x/patches-5.15/0024-v6.0-arm64-dts-qcom-ipq8074-add-USB-power-domains.patch b/target/linux/ipq807x/patches-5.15/0024-v6.0-arm64-dts-qcom-ipq8074-add-USB-power-domains.patch
+deleted file mode 100644
+index d515ec9076..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0024-v6.0-arm64-dts-qcom-ipq8074-add-USB-power-domains.patch
++++ /dev/null
+@@ -1,43 +0,0 @@
+-From 53211e85006ebb9bf7fb4482288639612f3146e7 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Sun, 15 May 2022 23:00:48 +0200
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: add USB power domains
+-
+-Add USB power domains provided by GCC GDSCs.
+-Add the required #power-domain-cells to the GCC as well.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220515210048.483898-11-robimarko@gmail.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 5 +++++
+- 1 file changed, 5 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -348,6 +348,7 @@
+- 			compatible = "qcom,gcc-ipq8074";
+- 			reg = <0x01800000 0x80000>;
+- 			#clock-cells = <0x1>;
+-+			#power-domain-cells = <1>;
+- 			#reset-cells = <0x1>;
+- 		};
+- 
+-@@ -576,6 +577,8 @@
+- 						<133330000>,
+- 						<19200000>;
+- 
+-+			power-domains = <&gcc USB0_GDSC>;
+-+
+- 			resets = <&gcc GCC_USB0_BCR>;
+- 			status = "disabled";
+- 
+-@@ -616,6 +619,8 @@
+- 						<133330000>,
+- 						<19200000>;
+- 
+-+			power-domains = <&gcc USB1_GDSC>;
+-+
+- 			resets = <&gcc GCC_USB1_BCR>;
+- 			status = "disabled";
+- 
+diff --git a/target/linux/ipq807x/patches-5.15/0025-v6.0-arm64-dts-qcom-ipq8074-move-ARMv8-timer-out-of-SoC-n.patch b/target/linux/ipq807x/patches-5.15/0025-v6.0-arm64-dts-qcom-ipq8074-move-ARMv8-timer-out-of-SoC-n.patch
+deleted file mode 100644
+index 57fe73ae92..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0025-v6.0-arm64-dts-qcom-ipq8074-move-ARMv8-timer-out-of-SoC-n.patch
++++ /dev/null
+@@ -1,50 +0,0 @@
+-From 85a9cab9b9bb471eae016cdbfabd928585c23cce Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Mon, 4 Jul 2022 13:33:18 +0200
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: move ARMv8 timer out of SoC node
+-
+-The ARM timer is usually considered not part of SoC node, just like
+-other ARM designed blocks (PMU, PSCI).  This fixes dtbs_check warning:
+-
+-arch/arm64/boot/dts/qcom/ipq8072-ax9000.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'}
+-	From schema: dtschema/schemas/simple-bus.yaml
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-[bjorn: Moved node after "soc" for alphabetical ordering]
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220704113318.623102-1-robimarko@gmail.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 16 ++++++++--------
+- 1 file changed, 8 insertions(+), 8 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -654,14 +654,6 @@
+- 			};
+- 		};
+- 
+--		timer {
+--			compatible = "arm,armv8-timer";
+--			interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+--				     <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+--				     <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+--				     <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+--		};
+--
+- 		watchdog: watchdog@b017000 {
+- 			compatible = "qcom,kpss-wdt";
+- 			reg = <0xb017000 0x1000>;
+-@@ -853,4 +845,12 @@
+- 			status = "disabled";
+- 		};
+- 	};
+-+
+-+	timer {
+-+		compatible = "arm,armv8-timer";
+-+		interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+-+			     <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+-+			     <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+-+			     <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+-+	};
+- };
+diff --git a/target/linux/ipq807x/patches-5.15/0026-v6.0-arm64-dts-qcom-ipq8074-add-reset-to-SDHCI.patch b/target/linux/ipq807x/patches-5.15/0026-v6.0-arm64-dts-qcom-ipq8074-add-reset-to-SDHCI.patch
+deleted file mode 100644
+index b262a804b3..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0026-v6.0-arm64-dts-qcom-ipq8074-add-reset-to-SDHCI.patch
++++ /dev/null
+@@ -1,27 +0,0 @@
+-From 8e6af077ced3931ac18e37f0eb3fc6f1a20b0e4a Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Mon, 4 Jul 2022 16:35:54 +0200
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: add reset to SDHCI
+-
+-Add reset to SDHCI controller so it can be reset to avoid timeout issues
+-after software reset due to bootloader set configuration.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
+-Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220704143554.1180927-2-robimarko@gmail.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 1 +
+- 1 file changed, 1 insertion(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -390,6 +390,7 @@
+- 				 <&gcc GCC_SDCC1_APPS_CLK>,
+- 				 <&xo>;
+- 			clock-names = "iface", "core", "xo";
+-+			resets = <&gcc GCC_SDCC1_BCR>;
+- 			max-frequency = <384000000>;
+- 			mmc-ddr-1_8v;
+- 			mmc-hs200-1_8v;
+diff --git a/target/linux/ipq807x/patches-5.15/0027-v6.0-arm64-dts-qcom-ipq8074-drop-USB-PHY-clock-index.patch b/target/linux/ipq807x/patches-5.15/0027-v6.0-arm64-dts-qcom-ipq8074-drop-USB-PHY-clock-index.patch
+deleted file mode 100644
+index c058c5abe4..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0027-v6.0-arm64-dts-qcom-ipq8074-drop-USB-PHY-clock-index.patch
++++ /dev/null
+@@ -1,36 +0,0 @@
+-From 0171978734227bdd7813bc6d805f609126e3849e Mon Sep 17 00:00:00 2001
+-From: Johan Hovold <johan+linaro@kernel.org>
+-Date: Tue, 5 Jul 2022 13:40:22 +0200
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: drop USB PHY clock index
+-
+-The QMP USB PHY provides a single clock so drop the redundant clock
+-index.
+-
+-Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
+-Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220705114032.22787-5-johan+linaro@kernel.org
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
+- 1 file changed, 2 insertions(+), 2 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -130,7 +130,7 @@
+- 				      <0x00058800 0x1f8>,     /* PCS  */
+- 				      <0x00058600 0x044>;     /* PCS misc*/
+- 				#phy-cells = <0>;
+--				#clock-cells = <1>;
+-+				#clock-cells = <0>;
+- 				clocks = <&gcc GCC_USB1_PIPE_CLK>;
+- 				clock-names = "pipe0";
+- 				clock-output-names = "usb3phy_1_cc_pipe_clk";
+-@@ -173,7 +173,7 @@
+- 				      <0x00078800 0x1f8>,     /* PCS  */
+- 				      <0x00078600 0x044>;     /* PCS misc*/
+- 				#phy-cells = <0>;
+--				#clock-cells = <1>;
+-+				#clock-cells = <0>;
+- 				clocks = <&gcc GCC_USB0_PIPE_CLK>;
+- 				clock-names = "pipe0";
+- 				clock-output-names = "usb3phy_0_cc_pipe_clk";
+diff --git a/target/linux/ipq807x/patches-5.15/0028-v5.16-mailbox-qcom-apcs-ipc-Consolidate-msm8994-type-apcs_.patch b/target/linux/ipq807x/patches-5.15/0028-v5.16-mailbox-qcom-apcs-ipc-Consolidate-msm8994-type-apcs_.patch
+deleted file mode 100644
+index e50c66f531..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0028-v5.16-mailbox-qcom-apcs-ipc-Consolidate-msm8994-type-apcs_.patch
++++ /dev/null
+@@ -1,74 +0,0 @@
+-From a6e1d17fbfd41113bf47345e65953873e717ca63 Mon Sep 17 00:00:00 2001
+-From: Shawn Guo <shawn.guo@linaro.org>
+-Date: Tue, 14 Sep 2021 09:40:48 +0800
+-Subject: [PATCH] mailbox: qcom-apcs-ipc: Consolidate msm8994 type apcs_data
+-
+-The msm8994 type of apcs_data is defined multiple times with different
+-SoC name encoded.  Consolidate them on msm8994 and remove the data
+-duplication.
+-
+-Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
+-Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
+----
+- drivers/mailbox/qcom-apcs-ipc-mailbox.c | 26 +++++--------------------
+- 1 file changed, 5 insertions(+), 21 deletions(-)
+-
+---- a/drivers/mailbox/qcom-apcs-ipc-mailbox.c
+-+++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
+-@@ -33,10 +33,6 @@ static const struct qcom_apcs_ipc_data i
+- 	.offset = 8, .clk_name = "qcom,apss-ipq6018-clk"
+- };
+- 
+--static const struct qcom_apcs_ipc_data ipq8074_apcs_data = {
+--	.offset = 8, .clk_name = NULL
+--};
+--
+- static const struct qcom_apcs_ipc_data msm8916_apcs_data = {
+- 	.offset = 8, .clk_name = "qcom-apcs-msm8916-clk"
+- };
+-@@ -49,18 +45,6 @@ static const struct qcom_apcs_ipc_data m
+- 	.offset = 16, .clk_name = NULL
+- };
+- 
+--static const struct qcom_apcs_ipc_data msm8998_apcs_data = {
+--	.offset = 8, .clk_name = NULL
+--};
+--
+--static const struct qcom_apcs_ipc_data sdm660_apcs_data = {
+--	.offset = 8, .clk_name = NULL
+--};
+--
+--static const struct qcom_apcs_ipc_data sm6125_apcs_data = {
+--	.offset = 8, .clk_name = NULL
+--};
+--
+- static const struct qcom_apcs_ipc_data apps_shared_apcs_data = {
+- 	.offset = 12, .clk_name = NULL
+- };
+-@@ -160,21 +144,21 @@ static int qcom_apcs_ipc_remove(struct p
+- /* .data is the offset of the ipc register within the global block */
+- static const struct of_device_id qcom_apcs_ipc_of_match[] = {
+- 	{ .compatible = "qcom,ipq6018-apcs-apps-global", .data = &ipq6018_apcs_data },
+--	{ .compatible = "qcom,ipq8074-apcs-apps-global", .data = &ipq8074_apcs_data },
+-+	{ .compatible = "qcom,ipq8074-apcs-apps-global", .data = &msm8994_apcs_data },
+- 	{ .compatible = "qcom,msm8916-apcs-kpss-global", .data = &msm8916_apcs_data },
+- 	{ .compatible = "qcom,msm8939-apcs-kpss-global", .data = &msm8916_apcs_data },
+- 	{ .compatible = "qcom,msm8953-apcs-kpss-global", .data = &msm8994_apcs_data },
+- 	{ .compatible = "qcom,msm8994-apcs-kpss-global", .data = &msm8994_apcs_data },
+- 	{ .compatible = "qcom,msm8996-apcs-hmss-global", .data = &msm8996_apcs_data },
+--	{ .compatible = "qcom,msm8998-apcs-hmss-global", .data = &msm8998_apcs_data },
+-+	{ .compatible = "qcom,msm8998-apcs-hmss-global", .data = &msm8994_apcs_data },
+- 	{ .compatible = "qcom,qcs404-apcs-apps-global", .data = &msm8916_apcs_data },
+- 	{ .compatible = "qcom,sc7180-apss-shared", .data = &apps_shared_apcs_data },
+- 	{ .compatible = "qcom,sc8180x-apss-shared", .data = &apps_shared_apcs_data },
+--	{ .compatible = "qcom,sdm660-apcs-hmss-global", .data = &sdm660_apcs_data },
+-+	{ .compatible = "qcom,sdm660-apcs-hmss-global", .data = &msm8994_apcs_data },
+- 	{ .compatible = "qcom,sdm845-apss-shared", .data = &apps_shared_apcs_data },
+--	{ .compatible = "qcom,sm6125-apcs-hmss-global", .data = &sm6125_apcs_data },
+-+	{ .compatible = "qcom,sm6125-apcs-hmss-global", .data = &msm8994_apcs_data },
+- 	{ .compatible = "qcom,sm8150-apss-shared", .data = &apps_shared_apcs_data },
+--	{ .compatible = "qcom,sm6115-apcs-hmss-global", .data = &sdm660_apcs_data },
+-+	{ .compatible = "qcom,sm6115-apcs-hmss-global", .data = &msm8994_apcs_data },
+- 	{ .compatible = "qcom,sdx55-apcs-gcc", .data = &sdx55_apcs_data },
+- 	{}
+- };
+diff --git a/target/linux/ipq807x/patches-5.15/0029-v6.1-mailbox-qcom-apcs-ipc-add-IPQ8074-APSS-clock-support.patch b/target/linux/ipq807x/patches-5.15/0029-v6.1-mailbox-qcom-apcs-ipc-add-IPQ8074-APSS-clock-support.patch
+deleted file mode 100644
+index cd1dcf2ba2..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0029-v6.1-mailbox-qcom-apcs-ipc-add-IPQ8074-APSS-clock-support.patch
++++ /dev/null
+@@ -1,30 +0,0 @@
+-From 28e239ecd69a99748181bfdf5d2238ff1a8d0646 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 19 Aug 2022 00:08:48 +0200
+-Subject: [PATCH] mailbox: qcom-apcs-ipc: add IPQ8074 APSS clock support
+-
+-IPQ8074 has the APSS clock controller utilizing the same register space as
+-the APCS, so provide access to the APSS utilizing a child device like
+-IPQ6018.
+-
+-IPQ6018 and IPQ8074 use the same controller and driver, so just utilize
+-IPQ6018 match data for IPQ8074.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+-Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
+----
+- drivers/mailbox/qcom-apcs-ipc-mailbox.c | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+---- a/drivers/mailbox/qcom-apcs-ipc-mailbox.c
+-+++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
+-@@ -144,7 +144,7 @@ static int qcom_apcs_ipc_remove(struct p
+- /* .data is the offset of the ipc register within the global block */
+- static const struct of_device_id qcom_apcs_ipc_of_match[] = {
+- 	{ .compatible = "qcom,ipq6018-apcs-apps-global", .data = &ipq6018_apcs_data },
+--	{ .compatible = "qcom,ipq8074-apcs-apps-global", .data = &msm8994_apcs_data },
+-+	{ .compatible = "qcom,ipq8074-apcs-apps-global", .data = &ipq6018_apcs_data },
+- 	{ .compatible = "qcom,msm8916-apcs-kpss-global", .data = &msm8916_apcs_data },
+- 	{ .compatible = "qcom,msm8939-apcs-kpss-global", .data = &msm8916_apcs_data },
+- 	{ .compatible = "qcom,msm8953-apcs-kpss-global", .data = &msm8994_apcs_data },
+diff --git a/target/linux/ipq807x/patches-5.15/0030-v6.0-arm64-dts-qcom-ipq8074-add-APCS-node.patch b/target/linux/ipq807x/patches-5.15/0030-v6.0-arm64-dts-qcom-ipq8074-add-APCS-node.patch
+deleted file mode 100644
+index 87a1fe82e7..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0030-v6.0-arm64-dts-qcom-ipq8074-add-APCS-node.patch
++++ /dev/null
+@@ -1,37 +0,0 @@
+-From aea90e172420a062197849d7914b2fa032de0228 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Thu, 7 Jul 2022 19:37:33 +0200
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: add APCS node
+-
+-APCS now has support for providing the APSS clocks as the child device
+-for IPQ8074.
+-
+-So, add the required DT node for it as it will later be used as the CPU
+-clocksource.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+-[bjorn: Sorted node based on address]
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220707173733.404947-4-robimarko@gmail.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8 ++++++++
+- 1 file changed, 8 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -663,6 +663,14 @@
+- 			timeout-sec = <30>;
+- 		};
+- 
+-+		apcs_glb: mailbox@b111000 {
+-+			compatible = "qcom,ipq8074-apcs-apps-global";
+-+			reg = <0x0b111000 0x6000>;
+-+
+-+			#clock-cells = <1>;
+-+			#mbox-cells = <1>;
+-+		};
+-+
+- 		timer@b120000 {
+- 			#address-cells = <1>;
+- 			#size-cells = <1>;
+diff --git a/target/linux/ipq807x/patches-5.15/0031-v6.0-arm64-dts-qcom-ipq8074-add-size-address-cells-to-DTS.patch b/target/linux/ipq807x/patches-5.15/0031-v6.0-arm64-dts-qcom-ipq8074-add-size-address-cells-to-DTS.patch
+deleted file mode 100644
+index 8fae8ade75..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0031-v6.0-arm64-dts-qcom-ipq8074-add-size-address-cells-to-DTS.patch
++++ /dev/null
+@@ -1,54 +0,0 @@
+-From a3f36600fd758173c1ec315684e4ae72c6e85654 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 8 Jul 2022 15:38:45 +0200
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: add #size/address-cells to DTSI
+-
+-Add #size-cells and #address-cells to the SoC DTSI to avoid duplicating
+-the same properties in board DTS files.
+-
+-Remove the mentioned properties from current board DTS files.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220708133846.599735-1-robimarko@gmail.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074-hk01.dts  | 2 --
+- arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi | 3 ---
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi      | 3 +++
+- 3 files changed, 3 insertions(+), 5 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+-@@ -5,8 +5,6 @@
+- #include "ipq8074.dtsi"
+- 
+- / {
+--	#address-cells = <0x2>;
+--	#size-cells = <0x2>;
+- 	model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
+- 	compatible = "qcom,ipq8074-hk01", "qcom,ipq8074";
+- 	interrupt-parent = <&intc>;
+---- a/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi
+-@@ -7,9 +7,6 @@
+- #include "ipq8074.dtsi"
+- 
+- / {
+--	#address-cells = <0x2>;
+--	#size-cells = <0x2>;
+--
+- 	interrupt-parent = <&intc>;
+- 
+- 	aliases {
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -7,6 +7,9 @@
+- #include <dt-bindings/clock/qcom,gcc-ipq8074.h>
+- 
+- / {
+-+	#address-cells = <2>;
+-+	#size-cells = <2>;
+-+
+- 	model = "Qualcomm Technologies, Inc. IPQ8074";
+- 	compatible = "qcom,ipq8074";
+- 
+diff --git a/target/linux/ipq807x/patches-5.15/0032-v6.0-arm64-dts-qcom-ipq8074-add-interrupt-parent-to-DTSI.patch b/target/linux/ipq807x/patches-5.15/0032-v6.0-arm64-dts-qcom-ipq8074-add-interrupt-parent-to-DTSI.patch
+deleted file mode 100644
+index 27a43c43ea..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0032-v6.0-arm64-dts-qcom-ipq8074-add-interrupt-parent-to-DTSI.patch
++++ /dev/null
+@@ -1,50 +0,0 @@
+-From 7d57ca4d56856b7f7b97adda6e97cf5db4dcce93 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 8 Jul 2022 15:38:46 +0200
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: add interrupt-parent to DTSI
+-
+-Add interrupt-parent to the SoC DTSI to avoid duplicating it in each board
+-DTS file.
+-
+-Remove interrupt-parent from existing board DTS files.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220708133846.599735-2-robimarko@gmail.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074-hk01.dts  | 1 -
+- arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi | 2 --
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi      | 1 +
+- 3 files changed, 1 insertion(+), 3 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+-@@ -7,7 +7,6 @@
+- / {
+- 	model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
+- 	compatible = "qcom,ipq8074-hk01", "qcom,ipq8074";
+--	interrupt-parent = <&intc>;
+- 
+- 	aliases {
+- 		serial0 = &blsp1_uart5;
+---- a/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi
+-@@ -7,8 +7,6 @@
+- #include "ipq8074.dtsi"
+- 
+- / {
+--	interrupt-parent = <&intc>;
+--
+- 	aliases {
+- 		serial0 = &blsp1_uart5;
+- 	};
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -12,6 +12,7 @@
+- 
+- 	model = "Qualcomm Technologies, Inc. IPQ8074";
+- 	compatible = "qcom,ipq8074";
+-+	interrupt-parent = <&intc>;
+- 
+- 	clocks {
+- 		sleep_clk: sleep_clk {
+diff --git a/target/linux/ipq807x/patches-5.15/0033-v6.1-arm64-dts-qcom-align-SDHCI-reg-names-with-DT-schema.patch b/target/linux/ipq807x/patches-5.15/0033-v6.1-arm64-dts-qcom-align-SDHCI-reg-names-with-DT-schema.patch
+deleted file mode 100644
+index f2fce43e5e..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0033-v6.1-arm64-dts-qcom-align-SDHCI-reg-names-with-DT-schema.patch
++++ /dev/null
+@@ -1,28 +0,0 @@
+-From a19df563230af392f2e84e57d69367f96b4a8c56 Mon Sep 17 00:00:00 2001
+-From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Date: Tue, 12 Jul 2022 16:42:43 +0200
+-Subject: [PATCH] arm64: dts: qcom: align SDHCI reg-names with DT schema
+-
+-DT schema requires SDHCI reg names to be hc/core without "_mem" suffix,
+-just like TXT bindings were expecting before the conversion.
+-
+-Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Reviewed-by: Douglas Anderson <dianders@chromium.org>
+-Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20220712144245.17417-4-krzysztof.kozlowski@linaro.org
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -384,7 +384,7 @@
+- 		sdhc_1: mmc@7824900 {
+- 			compatible = "qcom,sdhci-msm-v4";
+- 			reg = <0x7824900 0x500>, <0x7824000 0x800>;
+--			reg-names = "hc_mem", "core_mem";
+-+			reg-names = "hc", "core";
+- 
+- 			interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+- 				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+diff --git a/target/linux/ipq807x/patches-5.15/0035-v6.1-clk-qcom-apss-ipq-pll-use-OF-match-data-for-Alpha-PL.patch b/target/linux/ipq807x/patches-5.15/0035-v6.1-clk-qcom-apss-ipq-pll-use-OF-match-data-for-Alpha-PL.patch
+deleted file mode 100644
+index 2faf82baeb..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0035-v6.1-clk-qcom-apss-ipq-pll-use-OF-match-data-for-Alpha-PL.patch
++++ /dev/null
+@@ -1,70 +0,0 @@
+-From 7bd608426c407a79debea54b2b243950f330c5b8 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 19 Aug 2022 00:06:24 +0200
+-Subject: [PATCH] clk: qcom: apss-ipq-pll: use OF match data for Alpha PLL
+- config
+-
+-Convert the driver to use OF match data for providing the Alpha PLL config
+-per compatible.
+-This is required for IPQ8074 support since it uses a different Alpha PLL
+-config.
+-
+-While we are here rename "ipq_pll_config" to "ipq6018_pll_config" to make
+-it clear that it is for IPQ6018 only.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20220818220628.339366-5-robimarko@gmail.com
+----
+- drivers/clk/qcom/apss-ipq-pll.c | 12 +++++++++---
+- 1 file changed, 9 insertions(+), 3 deletions(-)
+-
+---- a/drivers/clk/qcom/apss-ipq-pll.c
+-+++ b/drivers/clk/qcom/apss-ipq-pll.c
+-@@ -2,6 +2,7 @@
+- // Copyright (c) 2018, The Linux Foundation. All rights reserved.
+- #include <linux/clk-provider.h>
+- #include <linux/module.h>
+-+#include <linux/of_device.h>
+- #include <linux/platform_device.h>
+- #include <linux/regmap.h>
+- 
+-@@ -36,7 +37,7 @@ static struct clk_alpha_pll ipq_pll = {
+- 	},
+- };
+- 
+--static const struct alpha_pll_config ipq_pll_config = {
+-+static const struct alpha_pll_config ipq6018_pll_config = {
+- 	.l = 0x37,
+- 	.config_ctl_val = 0x04141200,
+- 	.config_ctl_hi_val = 0x0,
+-@@ -54,6 +55,7 @@ static const struct regmap_config ipq_pl
+- 
+- static int apss_ipq_pll_probe(struct platform_device *pdev)
+- {
+-+	const struct alpha_pll_config *ipq_pll_config;
+- 	struct device *dev = &pdev->dev;
+- 	struct regmap *regmap;
+- 	void __iomem *base;
+-@@ -67,7 +69,11 @@ static int apss_ipq_pll_probe(struct pla
+- 	if (IS_ERR(regmap))
+- 		return PTR_ERR(regmap);
+- 
+--	clk_alpha_pll_configure(&ipq_pll, regmap, &ipq_pll_config);
+-+	ipq_pll_config = of_device_get_match_data(&pdev->dev);
+-+	if (!ipq_pll_config)
+-+		return -ENODEV;
+-+
+-+	clk_alpha_pll_configure(&ipq_pll, regmap, ipq_pll_config);
+- 
+- 	ret = devm_clk_register_regmap(dev, &ipq_pll.clkr);
+- 	if (ret)
+-@@ -78,7 +84,7 @@ static int apss_ipq_pll_probe(struct pla
+- }
+- 
+- static const struct of_device_id apss_ipq_pll_match_table[] = {
+--	{ .compatible = "qcom,ipq6018-a53pll" },
+-+	{ .compatible = "qcom,ipq6018-a53pll", .data = &ipq6018_pll_config },
+- 	{ }
+- };
+- MODULE_DEVICE_TABLE(of, apss_ipq_pll_match_table);
+diff --git a/target/linux/ipq807x/patches-5.15/0036-v6.1-clk-qcom-apss-ipq-pll-update-IPQ6018-Alpha-PLL-confi.patch b/target/linux/ipq807x/patches-5.15/0036-v6.1-clk-qcom-apss-ipq-pll-update-IPQ6018-Alpha-PLL-confi.patch
+deleted file mode 100644
+index 4e1bb8aff2..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0036-v6.1-clk-qcom-apss-ipq-pll-update-IPQ6018-Alpha-PLL-confi.patch
++++ /dev/null
+@@ -1,40 +0,0 @@
+-From d22c8f1bd94602d1bf2b377c3befe54e749b963d Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 19 Aug 2022 00:06:25 +0200
+-Subject: [PATCH] clk: qcom: apss-ipq-pll: update IPQ6018 Alpha PLL config
+-
+-Update the IPQ6018 Alpha PLL config to the latest one from the downstream
+-5.4 kernel[1].
+-
+-This one should match the production SoC-s.
+-
+-Tested on IPQ6018 CP01-C1 reference board.
+-
+-[1] https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/blob/NHSS.QSDK.12.1.r4/drivers/clk/qcom/apss-ipq-pll.c#L41
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20220818220628.339366-6-robimarko@gmail.com
+----
+- drivers/clk/qcom/apss-ipq-pll.c | 8 ++++++--
+- 1 file changed, 6 insertions(+), 2 deletions(-)
+-
+---- a/drivers/clk/qcom/apss-ipq-pll.c
+-+++ b/drivers/clk/qcom/apss-ipq-pll.c
+-@@ -39,10 +39,14 @@ static struct clk_alpha_pll ipq_pll = {
+- 
+- static const struct alpha_pll_config ipq6018_pll_config = {
+- 	.l = 0x37,
+--	.config_ctl_val = 0x04141200,
+--	.config_ctl_hi_val = 0x0,
+-+	.config_ctl_val = 0x240d4828,
+-+	.config_ctl_hi_val = 0x6,
+- 	.early_output_mask = BIT(3),
+-+	.aux2_output_mask = BIT(2),
+-+	.aux_output_mask = BIT(1),
+- 	.main_output_mask = BIT(0),
+-+	.test_ctl_val = 0x1c0000C0,
+-+	.test_ctl_hi_val = 0x4000,
+- };
+- 
+- static const struct regmap_config ipq_pll_regmap_config = {
+diff --git a/target/linux/ipq807x/patches-5.15/0037-v6.1-clk-qcom-apss-ipq-pll-add-support-for-IPQ8074.patch b/target/linux/ipq807x/patches-5.15/0037-v6.1-clk-qcom-apss-ipq-pll-add-support-for-IPQ8074.patch
+deleted file mode 100644
+index f5f18acb1b..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0037-v6.1-clk-qcom-apss-ipq-pll-add-support-for-IPQ8074.patch
++++ /dev/null
+@@ -1,47 +0,0 @@
+-From e0a711bd88ba98f6ab5118d248ec84fcf495d313 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 19 Aug 2022 00:06:26 +0200
+-Subject: [PATCH] clk: qcom: apss-ipq-pll: add support for IPQ8074
+-
+-Add support for IPQ8074 since it uses the same PLL setup, however it uses
+-slightly different Alpha PLL config.
+-
+-Alpha PLL config was obtained by dumping PLL registers from a running
+-device.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20220818220628.339366-7-robimarko@gmail.com
+----
+- drivers/clk/qcom/apss-ipq-pll.c | 13 +++++++++++++
+- 1 file changed, 13 insertions(+)
+-
+---- a/drivers/clk/qcom/apss-ipq-pll.c
+-+++ b/drivers/clk/qcom/apss-ipq-pll.c
+-@@ -49,6 +49,18 @@ static const struct alpha_pll_config ipq
+- 	.test_ctl_hi_val = 0x4000,
+- };
+- 
+-+static const struct alpha_pll_config ipq8074_pll_config = {
+-+	.l = 0x48,
+-+	.config_ctl_val = 0x200d4828,
+-+	.config_ctl_hi_val = 0x6,
+-+	.early_output_mask = BIT(3),
+-+	.aux2_output_mask = BIT(2),
+-+	.aux_output_mask = BIT(1),
+-+	.main_output_mask = BIT(0),
+-+	.test_ctl_val = 0x1c000000,
+-+	.test_ctl_hi_val = 0x4000,
+-+};
+-+
+- static const struct regmap_config ipq_pll_regmap_config = {
+- 	.reg_bits		= 32,
+- 	.reg_stride		= 4,
+-@@ -89,6 +101,7 @@ static int apss_ipq_pll_probe(struct pla
+- 
+- static const struct of_device_id apss_ipq_pll_match_table[] = {
+- 	{ .compatible = "qcom,ipq6018-a53pll", .data = &ipq6018_pll_config },
+-+	{ .compatible = "qcom,ipq8074-a53pll", .data = &ipq8074_pll_config },
+- 	{ }
+- };
+- MODULE_DEVICE_TABLE(of, apss_ipq_pll_match_table);
+diff --git a/target/linux/ipq807x/patches-5.15/0038-v6.1-clk-qcom-clk-rcg2-add-rcg2-mux-ops.patch b/target/linux/ipq807x/patches-5.15/0038-v6.1-clk-qcom-clk-rcg2-add-rcg2-mux-ops.patch
+deleted file mode 100644
+index 451066099d..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0038-v6.1-clk-qcom-clk-rcg2-add-rcg2-mux-ops.patch
++++ /dev/null
+@@ -1,51 +0,0 @@
+-From f7fb35d540240889a8f45f3fd42363cbc1a448e2 Mon Sep 17 00:00:00 2001
+-From: Christian Marangi <ansuelsmth@gmail.com>
+-Date: Fri, 19 Aug 2022 00:06:20 +0200
+-Subject: [PATCH] clk: qcom: clk-rcg2: add rcg2 mux ops
+-
+-An RCG may act as a mux that switch between 2 parents.
+-This is the case on IPQ6018 and IPQ8074 where the APCS core clk that feeds
+-the CPU cluster clock just switches between XO and the PLL that feeds it.
+-
+-Add the required ops to add support for this special configuration and use
+-the generic mux function to determine the rate.
+-
+-This way we dont have to keep a essentially dummy frequency table to use
+-RCG2 as a mux.
+-
+-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20220818220628.339366-1-robimarko@gmail.com
+----
+- drivers/clk/qcom/clk-rcg.h  | 1 +
+- drivers/clk/qcom/clk-rcg2.c | 7 +++++++
+- 2 files changed, 8 insertions(+)
+-
+---- a/drivers/clk/qcom/clk-rcg.h
+-+++ b/drivers/clk/qcom/clk-rcg.h
+-@@ -164,6 +164,7 @@ struct clk_rcg2_gfx3d {
+- 
+- extern const struct clk_ops clk_rcg2_ops;
+- extern const struct clk_ops clk_rcg2_floor_ops;
+-+extern const struct clk_ops clk_rcg2_mux_closest_ops;
+- extern const struct clk_ops clk_edp_pixel_ops;
+- extern const struct clk_ops clk_byte_ops;
+- extern const struct clk_ops clk_byte2_ops;
+---- a/drivers/clk/qcom/clk-rcg2.c
+-+++ b/drivers/clk/qcom/clk-rcg2.c
+-@@ -477,6 +477,13 @@ const struct clk_ops clk_rcg2_floor_ops
+- };
+- EXPORT_SYMBOL_GPL(clk_rcg2_floor_ops);
+- 
+-+const struct clk_ops clk_rcg2_mux_closest_ops = {
+-+	.determine_rate = __clk_mux_determine_rate_closest,
+-+	.get_parent = clk_rcg2_get_parent,
+-+	.set_parent = clk_rcg2_set_parent,
+-+};
+-+EXPORT_SYMBOL_GPL(clk_rcg2_mux_closest_ops);
+-+
+- struct frac_entry {
+- 	int num;
+- 	int den;
+diff --git a/target/linux/ipq807x/patches-5.15/0039-v6.1-clk-qcom-apss-ipq6018-fix-apcs_alias0_clk_src.patch b/target/linux/ipq807x/patches-5.15/0039-v6.1-clk-qcom-apss-ipq6018-fix-apcs_alias0_clk_src.patch
+deleted file mode 100644
+index c279e2804e..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0039-v6.1-clk-qcom-apss-ipq6018-fix-apcs_alias0_clk_src.patch
++++ /dev/null
+@@ -1,63 +0,0 @@
+-From 6b9d5ecd2913758780a0529f9b95392f330b721b Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 19 Aug 2022 00:06:21 +0200
+-Subject: [PATCH] clk: qcom: apss-ipq6018: fix apcs_alias0_clk_src
+-
+-While working on IPQ8074 APSS driver it was discovered that IPQ6018 and
+-IPQ8074 use almost the same PLL and APSS clocks, however APSS driver is
+-currently broken.
+-
+-More precisely apcs_alias0_clk_src is broken, it was added as regmap_mux
+-clock.
+-However after debugging why it was always stuck at 800Mhz, it was figured
+-out that its not regmap_mux compatible at all.
+-It is a simple mux but it uses RCG2 register layout and control bits, so
+-utilize the new clk_rcg2_mux_closest_ops to correctly drive it while not
+-having to provide a dummy frequency table.
+-
+-While we are here, use ARRAY_SIZE for number of parents.
+-
+-Tested on IPQ6018-CP01-C1 reference board and multiple IPQ8074 boards.
+-
+-Fixes: 5e77b4ef1b19 ("clk: qcom: Add ipq6018 apss clock controller")
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20220818220628.339366-2-robimarko@gmail.com
+----
+- drivers/clk/qcom/apss-ipq6018.c | 13 ++++++-------
+- 1 file changed, 6 insertions(+), 7 deletions(-)
+-
+---- a/drivers/clk/qcom/apss-ipq6018.c
+-+++ b/drivers/clk/qcom/apss-ipq6018.c
+-@@ -16,7 +16,7 @@
+- #include "clk-regmap.h"
+- #include "clk-branch.h"
+- #include "clk-alpha-pll.h"
+--#include "clk-regmap-mux.h"
+-+#include "clk-rcg.h"
+- 
+- enum {
+- 	P_XO,
+-@@ -33,16 +33,15 @@ static const struct parent_map parents_a
+- 	{ P_APSS_PLL_EARLY, 5 },
+- };
+- 
+--static struct clk_regmap_mux apcs_alias0_clk_src = {
+--	.reg = 0x0050,
+--	.width = 3,
+--	.shift = 7,
+-+static struct clk_rcg2 apcs_alias0_clk_src = {
+-+	.cmd_rcgr = 0x0050,
+-+	.hid_width = 5,
+- 	.parent_map = parents_apcs_alias0_clk_src_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "apcs_alias0_clk_src",
+- 		.parent_data = parents_apcs_alias0_clk_src,
+--		.num_parents = 2,
+--		.ops = &clk_regmap_mux_closest_ops,
+-+		.num_parents = ARRAY_SIZE(parents_apcs_alias0_clk_src),
+-+		.ops = &clk_rcg2_mux_closest_ops,
+- 		.flags = CLK_SET_RATE_PARENT,
+- 	},
+- };
+diff --git a/target/linux/ipq807x/patches-5.15/0040-v6.2-arm64-dts-qcom-ipq8074-add-A53-PLL-node.patch b/target/linux/ipq807x/patches-5.15/0040-v6.2-arm64-dts-qcom-ipq8074-add-A53-PLL-node.patch
+deleted file mode 100644
+index dd57eae360..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0040-v6.2-arm64-dts-qcom-ipq8074-add-A53-PLL-node.patch
++++ /dev/null
+@@ -1,32 +0,0 @@
+-From 6463c10bfdbd684ec7ecfd408ea541283215a088 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 19 Aug 2022 00:06:28 +0200
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: add A53 PLL node
+-
+-Add the required node for A53 PLL which will be used to provide the CPU
+-clock via APCS for APSS scaling.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20220818220628.339366-9-robimarko@gmail.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8 ++++++++
+- 1 file changed, 8 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -675,6 +675,14 @@
+- 			#mbox-cells = <1>;
+- 		};
+- 
+-+		a53pll: clock@b116000 {
+-+			compatible = "qcom,ipq8074-a53pll";
+-+			reg = <0x0b116000 0x40>;
+-+			#clock-cells = <0>;
+-+			clocks = <&xo>;
+-+			clock-names = "xo";
+-+		};
+-+
+- 		timer@b120000 {
+- 			#address-cells = <1>;
+- 			#size-cells = <1>;
+diff --git a/target/linux/ipq807x/patches-5.15/0041-v6.1-arm64-dts-qcom-ipq8074-correct-APCS-register-space-s.patch b/target/linux/ipq807x/patches-5.15/0041-v6.1-arm64-dts-qcom-ipq8074-correct-APCS-register-space-s.patch
+deleted file mode 100644
+index 5c8ca8c547..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0041-v6.1-arm64-dts-qcom-ipq8074-correct-APCS-register-space-s.patch
++++ /dev/null
+@@ -1,32 +0,0 @@
+-From 23c5ff3143ce43a76eebdf60a93436de9db39a7a Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 19 Aug 2022 00:06:27 +0200
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: correct APCS register space size
+-
+-APCS DTS addition that was merged, was not supposed to get merged as it
+-was part of patch series that was superseded by 2 more patch series
+-that resolved issues with this one and greatly simplified things.
+-
+-Since it already got merged, start by correcting the register space
+-size as APCS will not be providing regmap for PLL and it will conflict
+-with the standalone A53 PLL node.
+-
+-Fixes: 50ed9fffec3a ("arm64: dts: qcom: ipq8074: add APCS node")
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20220818220628.339366-8-robimarko@gmail.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -669,7 +669,7 @@
+- 
+- 		apcs_glb: mailbox@b111000 {
+- 			compatible = "qcom,ipq8074-apcs-apps-global";
+--			reg = <0x0b111000 0x6000>;
+-+			reg = <0x0b111000 0x1000>;
+- 
+- 			#clock-cells = <1>;
+- 			#mbox-cells = <1>;
+diff --git a/target/linux/ipq807x/patches-5.15/0042-v6.2-thermal-drivers-tsens-Add-support-for-combined-inter.patch b/target/linux/ipq807x/patches-5.15/0042-v6.2-thermal-drivers-tsens-Add-support-for-combined-inter.patch
+deleted file mode 100644
+index 2c6e70b14d..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0042-v6.2-thermal-drivers-tsens-Add-support-for-combined-inter.patch
++++ /dev/null
+@@ -1,134 +0,0 @@
+-From e593e834fe8ba9bf314d8215ac05d8787f81efda Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 19 Aug 2022 00:02:42 +0200
+-Subject: [PATCH] thermal/drivers/tsens: Add support for combined interrupt
+-
+-Despite using tsens v2.3 IP, IPQ8074 and IPQ6018 only have one IRQ for
+-signaling both up/low and critical trips.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Reviewed-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20220818220245.338396-2-robimarko@gmail.com
+-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+----
+- drivers/thermal/qcom/tsens-8960.c |  1 +
+- drivers/thermal/qcom/tsens-v0_1.c |  1 +
+- drivers/thermal/qcom/tsens-v1.c   |  1 +
+- drivers/thermal/qcom/tsens-v2.c   |  1 +
+- drivers/thermal/qcom/tsens.c      | 38 ++++++++++++++++++++++++++-----
+- drivers/thermal/qcom/tsens.h      |  2 ++
+- 6 files changed, 38 insertions(+), 6 deletions(-)
+-
+---- a/drivers/thermal/qcom/tsens-8960.c
+-+++ b/drivers/thermal/qcom/tsens-8960.c
+-@@ -269,6 +269,7 @@ static const struct tsens_ops ops_8960 =
+- static struct tsens_features tsens_8960_feat = {
+- 	.ver_major	= VER_0,
+- 	.crit_int	= 0,
+-+	.combo_int	= 0,
+- 	.adc		= 1,
+- 	.srot_split	= 0,
+- 	.max_sensors	= 11,
+---- a/drivers/thermal/qcom/tsens-v0_1.c
+-+++ b/drivers/thermal/qcom/tsens-v0_1.c
+-@@ -549,6 +549,7 @@ static int __init init_8939(struct tsens
+- static struct tsens_features tsens_v0_1_feat = {
+- 	.ver_major	= VER_0_1,
+- 	.crit_int	= 0,
+-+	.combo_int	= 0,
+- 	.adc		= 1,
+- 	.srot_split	= 1,
+- 	.max_sensors	= 11,
+---- a/drivers/thermal/qcom/tsens-v1.c
+-+++ b/drivers/thermal/qcom/tsens-v1.c
+-@@ -273,6 +273,7 @@ static int calibrate_8976(struct tsens_p
+- static struct tsens_features tsens_v1_feat = {
+- 	.ver_major	= VER_1_X,
+- 	.crit_int	= 0,
+-+	.combo_int	= 0,
+- 	.adc		= 1,
+- 	.srot_split	= 1,
+- 	.max_sensors	= 11,
+---- a/drivers/thermal/qcom/tsens-v2.c
+-+++ b/drivers/thermal/qcom/tsens-v2.c
+-@@ -31,6 +31,7 @@
+- static struct tsens_features tsens_v2_feat = {
+- 	.ver_major	= VER_2_X,
+- 	.crit_int	= 1,
+-+	.combo_int	= 0,
+- 	.adc		= 0,
+- 	.srot_split	= 1,
+- 	.max_sensors	= 16,
+---- a/drivers/thermal/qcom/tsens.c
+-+++ b/drivers/thermal/qcom/tsens.c
+-@@ -531,6 +531,27 @@ static irqreturn_t tsens_irq_thread(int
+- 	return IRQ_HANDLED;
+- }
+- 
+-+/**
+-+ * tsens_combined_irq_thread() - Threaded interrupt handler for combined interrupts
+-+ * @irq: irq number
+-+ * @data: tsens controller private data
+-+ *
+-+ * Handle the combined interrupt as if it were 2 separate interrupts, so call the
+-+ * critical handler first and then the up/low one.
+-+ *
+-+ * Return: IRQ_HANDLED
+-+ */
+-+static irqreturn_t tsens_combined_irq_thread(int irq, void *data)
+-+{
+-+	irqreturn_t ret;
+-+
+-+	ret = tsens_critical_irq_thread(irq, data);
+-+	if (ret != IRQ_HANDLED)
+-+		return ret;
+-+
+-+	return tsens_irq_thread(irq, data);
+-+}
+-+
+- static int tsens_set_trips(void *_sensor, int low, int high)
+- {
+- 	struct tsens_sensor *s = _sensor;
+-@@ -1081,13 +1102,18 @@ static int tsens_register(struct tsens_p
+- 				   tsens_mC_to_hw(priv->sensor, 0));
+- 	}
+- 
+--	ret = tsens_register_irq(priv, "uplow", tsens_irq_thread);
+--	if (ret < 0)
+--		return ret;
+-+	if (priv->feat->combo_int) {
+-+		ret = tsens_register_irq(priv, "combined",
+-+					 tsens_combined_irq_thread);
+-+	} else {
+-+		ret = tsens_register_irq(priv, "uplow", tsens_irq_thread);
+-+		if (ret < 0)
+-+			return ret;
+- 
+--	if (priv->feat->crit_int)
+--		ret = tsens_register_irq(priv, "critical",
+--					 tsens_critical_irq_thread);
+-+		if (priv->feat->crit_int)
+-+			ret = tsens_register_irq(priv, "critical",
+-+						 tsens_critical_irq_thread);
+-+	}
+- 
+- 	return ret;
+- }
+---- a/drivers/thermal/qcom/tsens.h
+-+++ b/drivers/thermal/qcom/tsens.h
+-@@ -495,6 +495,7 @@ enum regfield_ids {
+-  * struct tsens_features - Features supported by the IP
+-  * @ver_major: Major number of IP version
+-  * @crit_int: does the IP support critical interrupts?
+-+ * @combo_int: does the IP use one IRQ for up, low and critical thresholds?
+-  * @adc:      do the sensors only output adc code (instead of temperature)?
+-  * @srot_split: does the IP neatly splits the register space into SROT and TM,
+-  *              with SROT only being available to secure boot firmware?
+-@@ -504,6 +505,7 @@ enum regfield_ids {
+- struct tsens_features {
+- 	unsigned int ver_major;
+- 	unsigned int crit_int:1;
+-+	unsigned int combo_int:1;
+- 	unsigned int adc:1;
+- 	unsigned int srot_split:1;
+- 	unsigned int has_watchdog:1;
+diff --git a/target/linux/ipq807x/patches-5.15/0043-v6.2-thermal-drivers-tsens-Allow-configuring-min-and-max-.patch b/target/linux/ipq807x/patches-5.15/0043-v6.2-thermal-drivers-tsens-Allow-configuring-min-and-max-.patch
+deleted file mode 100644
+index 5a571a36b6..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0043-v6.2-thermal-drivers-tsens-Allow-configuring-min-and-max-.patch
++++ /dev/null
+@@ -1,101 +0,0 @@
+-From 7805365fee582056b32c69cf35aafbb94b14a8ca Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 19 Aug 2022 00:02:43 +0200
+-Subject: [PATCH] thermal/drivers/tsens: Allow configuring min and max trips
+-
+-IPQ8074 and IPQ6018 dont support negative trip temperatures and support
+-up to 204 degrees C as the max trip temperature.
+-
+-So, instead of always setting the -40 as min and 120 degrees C as max
+-allow it to be configured as part of the features.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220818220245.338396-3-robimarko@gmail.com
+-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+----
+- drivers/thermal/qcom/tsens-8960.c | 2 ++
+- drivers/thermal/qcom/tsens-v0_1.c | 2 ++
+- drivers/thermal/qcom/tsens-v1.c   | 2 ++
+- drivers/thermal/qcom/tsens-v2.c   | 2 ++
+- drivers/thermal/qcom/tsens.c      | 4 ++--
+- drivers/thermal/qcom/tsens.h      | 4 ++++
+- 6 files changed, 14 insertions(+), 2 deletions(-)
+-
+---- a/drivers/thermal/qcom/tsens-8960.c
+-+++ b/drivers/thermal/qcom/tsens-8960.c
+-@@ -273,6 +273,8 @@ static struct tsens_features tsens_8960_
+- 	.adc		= 1,
+- 	.srot_split	= 0,
+- 	.max_sensors	= 11,
+-+	.trip_min_temp	= -40000,
+-+	.trip_max_temp	= 120000,
+- };
+- 
+- struct tsens_plat_data data_8960 = {
+---- a/drivers/thermal/qcom/tsens-v0_1.c
+-+++ b/drivers/thermal/qcom/tsens-v0_1.c
+-@@ -553,6 +553,8 @@ static struct tsens_features tsens_v0_1_
+- 	.adc		= 1,
+- 	.srot_split	= 1,
+- 	.max_sensors	= 11,
+-+	.trip_min_temp	= -40000,
+-+	.trip_max_temp	= 120000,
+- };
+- 
+- static const struct reg_field tsens_v0_1_regfields[MAX_REGFIELDS] = {
+---- a/drivers/thermal/qcom/tsens-v1.c
+-+++ b/drivers/thermal/qcom/tsens-v1.c
+-@@ -277,6 +277,8 @@ static struct tsens_features tsens_v1_fe
+- 	.adc		= 1,
+- 	.srot_split	= 1,
+- 	.max_sensors	= 11,
+-+	.trip_min_temp	= -40000,
+-+	.trip_max_temp	= 120000,
+- };
+- 
+- static const struct reg_field tsens_v1_regfields[MAX_REGFIELDS] = {
+---- a/drivers/thermal/qcom/tsens-v2.c
+-+++ b/drivers/thermal/qcom/tsens-v2.c
+-@@ -35,6 +35,8 @@ static struct tsens_features tsens_v2_fe
+- 	.adc		= 0,
+- 	.srot_split	= 1,
+- 	.max_sensors	= 16,
+-+	.trip_min_temp	= -40000,
+-+	.trip_max_temp	= 120000,
+- };
+- 
+- static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
+---- a/drivers/thermal/qcom/tsens.c
+-+++ b/drivers/thermal/qcom/tsens.c
+-@@ -572,8 +572,8 @@ static int tsens_set_trips(void *_sensor
+- 	dev_dbg(dev, "[%u] %s: proposed thresholds: (%d:%d)\n",
+- 		hw_id, __func__, low, high);
+- 
+--	cl_high = clamp_val(high, -40000, 120000);
+--	cl_low  = clamp_val(low, -40000, 120000);
+-+	cl_high = clamp_val(high, priv->feat->trip_min_temp, priv->feat->trip_max_temp);
+-+	cl_low  = clamp_val(low, priv->feat->trip_min_temp, priv->feat->trip_max_temp);
+- 
+- 	high_val = tsens_mC_to_hw(s, cl_high);
+- 	low_val  = tsens_mC_to_hw(s, cl_low);
+---- a/drivers/thermal/qcom/tsens.h
+-+++ b/drivers/thermal/qcom/tsens.h
+-@@ -501,6 +501,8 @@ enum regfield_ids {
+-  *              with SROT only being available to secure boot firmware?
+-  * @has_watchdog: does this IP support watchdog functionality?
+-  * @max_sensors: maximum sensors supported by this version of the IP
+-+ * @trip_min_temp: minimum trip temperature supported by this version of the IP
+-+ * @trip_max_temp: maximum trip temperature supported by this version of the IP
+-  */
+- struct tsens_features {
+- 	unsigned int ver_major;
+-@@ -510,6 +512,8 @@ struct tsens_features {
+- 	unsigned int srot_split:1;
+- 	unsigned int has_watchdog:1;
+- 	unsigned int max_sensors;
+-+	int trip_min_temp;
+-+	int trip_max_temp;
+- };
+- 
+- /**
+diff --git a/target/linux/ipq807x/patches-5.15/0044-v6.2-thermal-drivers-tsens-Add-IPQ8074-support.patch b/target/linux/ipq807x/patches-5.15/0044-v6.2-thermal-drivers-tsens-Add-IPQ8074-support.patch
+deleted file mode 100644
+index 3e3e77a0a8..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0044-v6.2-thermal-drivers-tsens-Add-IPQ8074-support.patch
++++ /dev/null
+@@ -1,74 +0,0 @@
+-From 0164d794cbc58488a7321272e95958d10cf103a4 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 19 Aug 2022 00:02:44 +0200
+-Subject: [PATCH] thermal/drivers/tsens: Add IPQ8074 support
+-
+-Qualcomm IPQ8074 uses tsens v2.3 IP, however unlike other tsens v2 IP
+-it only has one IRQ, that is used for up/low as well as critical.
+-It also does not support negative trip temperatures.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20220818220245.338396-4-robimarko@gmail.com
+-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+----
+- drivers/thermal/qcom/tsens-v2.c | 17 +++++++++++++++++
+- drivers/thermal/qcom/tsens.c    |  3 +++
+- drivers/thermal/qcom/tsens.h    |  2 +-
+- 3 files changed, 21 insertions(+), 1 deletion(-)
+-
+---- a/drivers/thermal/qcom/tsens-v2.c
+-+++ b/drivers/thermal/qcom/tsens-v2.c
+-@@ -39,6 +39,17 @@ static struct tsens_features tsens_v2_fe
+- 	.trip_max_temp	= 120000,
+- };
+- 
+-+static struct tsens_features ipq8074_feat = {
+-+	.ver_major	= VER_2_X,
+-+	.crit_int	= 1,
+-+	.combo_int	= 1,
+-+	.adc		= 0,
+-+	.srot_split	= 1,
+-+	.max_sensors	= 16,
+-+	.trip_min_temp	= 0,
+-+	.trip_max_temp	= 204000,
+-+};
+-+
+- static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
+- 	/* ----- SROT ------ */
+- 	/* VERSION */
+-@@ -104,6 +115,12 @@ struct tsens_plat_data data_tsens_v2 = {
+- 	.fields	= tsens_v2_regfields,
+- };
+- 
+-+struct tsens_plat_data data_ipq8074 = {
+-+	.ops		= &ops_generic_v2,
+-+	.feat		= &ipq8074_feat,
+-+	.fields	= tsens_v2_regfields,
+-+};
+-+
+- /* Kept around for backward compatibility with old msm8996.dtsi */
+- struct tsens_plat_data data_8996 = {
+- 	.num_sensors	= 13,
+---- a/drivers/thermal/qcom/tsens.c
+-+++ b/drivers/thermal/qcom/tsens.c
+-@@ -991,6 +991,9 @@ static const struct of_device_id tsens_t
+- 		.compatible = "qcom,ipq8064-tsens",
+- 		.data = &data_8960,
+- 	}, {
+-+		.compatible = "qcom,ipq8074-tsens",
+-+		.data = &data_ipq8074,
+-+	}, {
+- 		.compatible = "qcom,mdm9607-tsens",
+- 		.data = &data_9607,
+- 	}, {
+---- a/drivers/thermal/qcom/tsens.h
+-+++ b/drivers/thermal/qcom/tsens.h
+-@@ -599,6 +599,6 @@ extern struct tsens_plat_data data_8916,
+- extern struct tsens_plat_data data_tsens_v1, data_8976, data_8956;
+- 
+- /* TSENS v2 targets */
+--extern struct tsens_plat_data data_8996, data_tsens_v2;
+-+extern struct tsens_plat_data data_8996, data_ipq8074, data_tsens_v2;
+- 
+- #endif /* __QCOM_TSENS_H__ */
+diff --git a/target/linux/ipq807x/patches-5.15/0045-v6.2-arm64-dts-qcom-ipq8074-add-thermal-nodes.patch b/target/linux/ipq807x/patches-5.15/0045-v6.2-arm64-dts-qcom-ipq8074-add-thermal-nodes.patch
+deleted file mode 100644
+index bad75e4597..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0045-v6.2-arm64-dts-qcom-ipq8074-add-thermal-nodes.patch
++++ /dev/null
+@@ -1,130 +0,0 @@
+-From c3cc0c2a17f552be2426200e47a9e2c62cf449ce Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 19 Aug 2022 00:02:45 +0200
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: add thermal nodes
+-
+-IPQ8074 has a tsens v2.3.0 peripheral which monitors
+-temperatures around the various subsystems on the
+-die.
+-
+-So lets add the tsens and thermal zone nodes, passive
+-CPU cooling will come in later patches after CPU frequency
+-scaling is supported.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20220818220245.338396-5-robimarko@gmail.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 96 +++++++++++++++++++++++++++
+- 1 file changed, 96 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -274,6 +274,16 @@
+- 			status = "disabled";
+- 		};
+- 
+-+		tsens: thermal-sensor@4a9000 {
+-+			compatible = "qcom,ipq8074-tsens";
+-+			reg = <0x4a9000 0x1000>, /* TM */
+-+			      <0x4a8000 0x1000>; /* SROT */
+-+			interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+-+			interrupt-names = "combined";
+-+			#qcom,sensors = <16>;
+-+			#thermal-sensor-cells = <1>;
+-+		};
+-+
+- 		cryptobam: dma-controller@704000 {
+- 			compatible = "qcom,bam-v1.7.0";
+- 			reg = <0x00704000 0x20000>;
+-@@ -874,4 +884,90 @@
+- 			     <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+- 			     <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+- 	};
+-+
+-+	thermal-zones {
+-+		nss-top-thermal {
+-+			polling-delay-passive = <250>;
+-+			polling-delay = <1000>;
+-+
+-+			thermal-sensors = <&tsens 4>;
+-+		};
+-+
+-+		nss0-thermal {
+-+			polling-delay-passive = <250>;
+-+			polling-delay = <1000>;
+-+
+-+			thermal-sensors = <&tsens 5>;
+-+		};
+-+
+-+		nss1-thermal {
+-+			polling-delay-passive = <250>;
+-+			polling-delay = <1000>;
+-+
+-+			thermal-sensors = <&tsens 6>;
+-+		};
+-+
+-+		wcss-phya0-thermal {
+-+			polling-delay-passive = <250>;
+-+			polling-delay = <1000>;
+-+
+-+			thermal-sensors = <&tsens 7>;
+-+		};
+-+
+-+		wcss-phya1-thermal {
+-+			polling-delay-passive = <250>;
+-+			polling-delay = <1000>;
+-+
+-+			thermal-sensors = <&tsens 8>;
+-+		};
+-+
+-+		cpu0_thermal: cpu0-thermal {
+-+			polling-delay-passive = <250>;
+-+			polling-delay = <1000>;
+-+
+-+			thermal-sensors = <&tsens 9>;
+-+		};
+-+
+-+		cpu1_thermal: cpu1-thermal {
+-+			polling-delay-passive = <250>;
+-+			polling-delay = <1000>;
+-+
+-+			thermal-sensors = <&tsens 10>;
+-+		};
+-+
+-+		cpu2_thermal: cpu2-thermal {
+-+			polling-delay-passive = <250>;
+-+			polling-delay = <1000>;
+-+
+-+			thermal-sensors = <&tsens 11>;
+-+		};
+-+
+-+		cpu3_thermal: cpu3-thermal {
+-+			polling-delay-passive = <250>;
+-+			polling-delay = <1000>;
+-+
+-+			thermal-sensors = <&tsens 12>;
+-+		};
+-+
+-+		cluster_thermal: cluster-thermal {
+-+			polling-delay-passive = <250>;
+-+			polling-delay = <1000>;
+-+
+-+			thermal-sensors = <&tsens 13>;
+-+		};
+-+
+-+		wcss-phyb0-thermal {
+-+			polling-delay-passive = <250>;
+-+			polling-delay = <1000>;
+-+
+-+			thermal-sensors = <&tsens 14>;
+-+		};
+-+
+-+		wcss-phyb1-thermal {
+-+			polling-delay-passive = <250>;
+-+			polling-delay = <1000>;
+-+
+-+			thermal-sensors = <&tsens 15>;
+-+		};
+-+	};
+- };
+diff --git a/target/linux/ipq807x/patches-5.15/0046-v6.2-arm64-dts-qcom-ipq8074-add-clocks-to-APCS.patch b/target/linux/ipq807x/patches-5.15/0046-v6.2-arm64-dts-qcom-ipq8074-add-clocks-to-APCS.patch
+deleted file mode 100644
+index e229851649..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0046-v6.2-arm64-dts-qcom-ipq8074-add-clocks-to-APCS.patch
++++ /dev/null
+@@ -1,29 +0,0 @@
+-From 0df592a0a1a3fff9133977192677aa915afc174f Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 19 Aug 2022 00:08:49 +0200
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: add clocks to APCS
+-
+-APCS now has support for providing the APSS clocks as the child device
+-for IPQ8074.
+-
+-So, add the A53 PLL and XO clocks in order to use APCS as the CPU
+-clocksource for APSS scaling.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20220818220849.339732-4-robimarko@gmail.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 ++
+- 1 file changed, 2 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -680,6 +680,8 @@
+- 		apcs_glb: mailbox@b111000 {
+- 			compatible = "qcom,ipq8074-apcs-apps-global";
+- 			reg = <0x0b111000 0x1000>;
+-+			clocks = <&a53pll>, <&xo>;
+-+			clock-names = "pll", "xo";
+- 
+- 			#clock-cells = <1>;
+- 			#mbox-cells = <1>;
+diff --git a/target/linux/ipq807x/patches-5.15/0047-v6.2-clk-qcom-ipq8074-convert-to-parent-data.patch b/target/linux/ipq807x/patches-5.15/0047-v6.2-clk-qcom-ipq8074-convert-to-parent-data.patch
+deleted file mode 100644
+index 9162ea538d..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0047-v6.2-clk-qcom-ipq8074-convert-to-parent-data.patch
++++ /dev/null
+@@ -1,3601 +0,0 @@
+-From e6c5115d6845f25eda7e162dcd783a2044215867 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Sun, 30 Oct 2022 18:57:01 +0100
+-Subject: [PATCH] clk: qcom: ipq8074: convert to parent data
+-
+-Convert the IPQ8074 GCC driver to use parent data instead of global
+-name matching.
+-
+-Utilize ARRAY_SIZE for num_parents instead of hardcoding the value.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com
+----
+- drivers/clk/qcom/gcc-ipq8074.c | 1781 +++++++++++++++-----------------
+- 1 file changed, 813 insertions(+), 968 deletions(-)
+-
+---- a/drivers/clk/qcom/gcc-ipq8074.c
+-+++ b/drivers/clk/qcom/gcc-ipq8074.c
+-@@ -49,349 +49,6 @@ enum {
+- 	P_UNIPHY2_TX,
+- };
+- 
+--static const char * const gcc_xo_gpll0_gpll0_out_main_div2[] = {
+--	"xo",
+--	"gpll0",
+--	"gpll0_out_main_div2",
+--};
+--
+--static const struct parent_map gcc_xo_gpll0_gpll0_out_main_div2_map[] = {
+--	{ P_XO, 0 },
+--	{ P_GPLL0, 1 },
+--	{ P_GPLL0_DIV2, 4 },
+--};
+--
+--static const struct parent_map gcc_xo_gpll0_map[] = {
+--	{ P_XO, 0 },
+--	{ P_GPLL0, 1 },
+--};
+--
+--static const char * const gcc_xo_gpll0_gpll2_gpll0_out_main_div2[] = {
+--	"xo",
+--	"gpll0",
+--	"gpll2",
+--	"gpll0_out_main_div2",
+--};
+--
+--static const struct parent_map gcc_xo_gpll0_gpll2_gpll0_out_main_div2_map[] = {
+--	{ P_XO, 0 },
+--	{ P_GPLL0, 1 },
+--	{ P_GPLL2, 2 },
+--	{ P_GPLL0_DIV2, 4 },
+--};
+--
+--static const char * const gcc_xo_gpll0_sleep_clk[] = {
+--	"xo",
+--	"gpll0",
+--	"sleep_clk",
+--};
+--
+--static const struct parent_map gcc_xo_gpll0_sleep_clk_map[] = {
+--	{ P_XO, 0 },
+--	{ P_GPLL0, 2 },
+--	{ P_SLEEP_CLK, 6 },
+--};
+--
+--static const char * const gcc_xo_gpll6_gpll0_gpll0_out_main_div2[] = {
+--	"xo",
+--	"gpll6",
+--	"gpll0",
+--	"gpll0_out_main_div2",
+--};
+--
+--static const struct parent_map gcc_xo_gpll6_gpll0_gpll0_out_main_div2_map[] = {
+--	{ P_XO, 0 },
+--	{ P_GPLL6, 1 },
+--	{ P_GPLL0, 3 },
+--	{ P_GPLL0_DIV2, 4 },
+--};
+--
+--static const char * const gcc_xo_gpll0_out_main_div2_gpll0[] = {
+--	"xo",
+--	"gpll0_out_main_div2",
+--	"gpll0",
+--};
+--
+--static const struct parent_map gcc_xo_gpll0_out_main_div2_gpll0_map[] = {
+--	{ P_XO, 0 },
+--	{ P_GPLL0_DIV2, 2 },
+--	{ P_GPLL0, 1 },
+--};
+--
+--static const char * const gcc_usb3phy_0_cc_pipe_clk_xo[] = {
+--	"usb3phy_0_cc_pipe_clk",
+--	"xo",
+--};
+--
+--static const struct parent_map gcc_usb3phy_0_cc_pipe_clk_xo_map[] = {
+--	{ P_USB3PHY_0_PIPE, 0 },
+--	{ P_XO, 2 },
+--};
+--
+--static const char * const gcc_usb3phy_1_cc_pipe_clk_xo[] = {
+--	"usb3phy_1_cc_pipe_clk",
+--	"xo",
+--};
+--
+--static const struct parent_map gcc_usb3phy_1_cc_pipe_clk_xo_map[] = {
+--	{ P_USB3PHY_1_PIPE, 0 },
+--	{ P_XO, 2 },
+--};
+--
+--static const char * const gcc_pcie20_phy0_pipe_clk_xo[] = {
+--	"pcie20_phy0_pipe_clk",
+--	"xo",
+--};
+--
+--static const struct parent_map gcc_pcie20_phy0_pipe_clk_xo_map[] = {
+--	{ P_PCIE20_PHY0_PIPE, 0 },
+--	{ P_XO, 2 },
+--};
+--
+--static const char * const gcc_pcie20_phy1_pipe_clk_xo[] = {
+--	"pcie20_phy1_pipe_clk",
+--	"xo",
+--};
+--
+--static const struct parent_map gcc_pcie20_phy1_pipe_clk_xo_map[] = {
+--	{ P_PCIE20_PHY1_PIPE, 0 },
+--	{ P_XO, 2 },
+--};
+--
+--static const char * const gcc_xo_gpll0_gpll6_gpll0_div2[] = {
+--	"xo",
+--	"gpll0",
+--	"gpll6",
+--	"gpll0_out_main_div2",
+--};
+--
+--static const struct parent_map gcc_xo_gpll0_gpll6_gpll0_div2_map[] = {
+--	{ P_XO, 0 },
+--	{ P_GPLL0, 1 },
+--	{ P_GPLL6, 2 },
+--	{ P_GPLL0_DIV2, 4 },
+--};
+--
+--static const char * const gcc_xo_gpll0_gpll6_gpll0_out_main_div2[] = {
+--	"xo",
+--	"gpll0",
+--	"gpll6",
+--	"gpll0_out_main_div2",
+--};
+--
+--static const struct parent_map gcc_xo_gpll0_gpll6_gpll0_out_main_div2_map[] = {
+--	{ P_XO, 0 },
+--	{ P_GPLL0, 1 },
+--	{ P_GPLL6, 2 },
+--	{ P_GPLL0_DIV2, 3 },
+--};
+--
+--static const char * const gcc_xo_bias_pll_nss_noc_clk_gpll0_gpll2[] = {
+--	"xo",
+--	"bias_pll_nss_noc_clk",
+--	"gpll0",
+--	"gpll2",
+--};
+--
+--static const struct parent_map gcc_xo_bias_pll_nss_noc_clk_gpll0_gpll2_map[] = {
+--	{ P_XO, 0 },
+--	{ P_BIAS_PLL_NSS_NOC, 1 },
+--	{ P_GPLL0, 2 },
+--	{ P_GPLL2, 3 },
+--};
+--
+--static const char * const gcc_xo_nss_crypto_pll_gpll0[] = {
+--	"xo",
+--	"nss_crypto_pll",
+--	"gpll0",
+--};
+--
+--static const struct parent_map gcc_xo_nss_crypto_pll_gpll0_map[] = {
+--	{ P_XO, 0 },
+--	{ P_NSS_CRYPTO_PLL, 1 },
+--	{ P_GPLL0, 2 },
+--};
+--
+--static const char * const gcc_xo_ubi32_pll_gpll0_gpll2_gpll4_gpll6[] = {
+--	"xo",
+--	"ubi32_pll",
+--	"gpll0",
+--	"gpll2",
+--	"gpll4",
+--	"gpll6",
+--};
+--
+--static const struct parent_map gcc_xo_ubi32_gpll0_gpll2_gpll4_gpll6_map[] = {
+--	{ P_XO, 0 },
+--	{ P_UBI32_PLL, 1 },
+--	{ P_GPLL0, 2 },
+--	{ P_GPLL2, 3 },
+--	{ P_GPLL4, 4 },
+--	{ P_GPLL6, 5 },
+--};
+--
+--static const char * const gcc_xo_gpll0_out_main_div2[] = {
+--	"xo",
+--	"gpll0_out_main_div2",
+--};
+--
+--static const struct parent_map gcc_xo_gpll0_out_main_div2_map[] = {
+--	{ P_XO, 0 },
+--	{ P_GPLL0_DIV2, 1 },
+--};
+--
+--static const char * const gcc_xo_bias_gpll0_gpll4_nss_ubi32[] = {
+--	"xo",
+--	"bias_pll_cc_clk",
+--	"gpll0",
+--	"gpll4",
+--	"nss_crypto_pll",
+--	"ubi32_pll",
+--};
+--
+--static const struct parent_map gcc_xo_bias_gpll0_gpll4_nss_ubi32_map[] = {
+--	{ P_XO, 0 },
+--	{ P_BIAS_PLL, 1 },
+--	{ P_GPLL0, 2 },
+--	{ P_GPLL4, 3 },
+--	{ P_NSS_CRYPTO_PLL, 4 },
+--	{ P_UBI32_PLL, 5 },
+--};
+--
+--static const char * const gcc_xo_gpll0_gpll4[] = {
+--	"xo",
+--	"gpll0",
+--	"gpll4",
+--};
+--
+--static const struct parent_map gcc_xo_gpll0_gpll4_map[] = {
+--	{ P_XO, 0 },
+--	{ P_GPLL0, 1 },
+--	{ P_GPLL4, 2 },
+--};
+--
+--static const char * const gcc_xo_uniphy0_rx_tx_ubi32_bias[] = {
+--	"xo",
+--	"uniphy0_gcc_rx_clk",
+--	"uniphy0_gcc_tx_clk",
+--	"ubi32_pll",
+--	"bias_pll_cc_clk",
+--};
+--
+--static const struct parent_map gcc_xo_uniphy0_rx_tx_ubi32_bias_map[] = {
+--	{ P_XO, 0 },
+--	{ P_UNIPHY0_RX, 1 },
+--	{ P_UNIPHY0_TX, 2 },
+--	{ P_UBI32_PLL, 5 },
+--	{ P_BIAS_PLL, 6 },
+--};
+--
+--static const char * const gcc_xo_uniphy0_tx_rx_ubi32_bias[] = {
+--	"xo",
+--	"uniphy0_gcc_tx_clk",
+--	"uniphy0_gcc_rx_clk",
+--	"ubi32_pll",
+--	"bias_pll_cc_clk",
+--};
+--
+--static const struct parent_map gcc_xo_uniphy0_tx_rx_ubi32_bias_map[] = {
+--	{ P_XO, 0 },
+--	{ P_UNIPHY0_TX, 1 },
+--	{ P_UNIPHY0_RX, 2 },
+--	{ P_UBI32_PLL, 5 },
+--	{ P_BIAS_PLL, 6 },
+--};
+--
+--static const char * const gcc_xo_uniphy0_rx_tx_uniphy1_rx_tx_ubi32_bias[] = {
+--	"xo",
+--	"uniphy0_gcc_rx_clk",
+--	"uniphy0_gcc_tx_clk",
+--	"uniphy1_gcc_rx_clk",
+--	"uniphy1_gcc_tx_clk",
+--	"ubi32_pll",
+--	"bias_pll_cc_clk",
+--};
+--
+--static const struct parent_map
+--gcc_xo_uniphy0_rx_tx_uniphy1_rx_tx_ubi32_bias_map[] = {
+--	{ P_XO, 0 },
+--	{ P_UNIPHY0_RX, 1 },
+--	{ P_UNIPHY0_TX, 2 },
+--	{ P_UNIPHY1_RX, 3 },
+--	{ P_UNIPHY1_TX, 4 },
+--	{ P_UBI32_PLL, 5 },
+--	{ P_BIAS_PLL, 6 },
+--};
+--
+--static const char * const gcc_xo_uniphy0_tx_rx_uniphy1_tx_rx_ubi32_bias[] = {
+--	"xo",
+--	"uniphy0_gcc_tx_clk",
+--	"uniphy0_gcc_rx_clk",
+--	"uniphy1_gcc_tx_clk",
+--	"uniphy1_gcc_rx_clk",
+--	"ubi32_pll",
+--	"bias_pll_cc_clk",
+--};
+--
+--static const struct parent_map
+--gcc_xo_uniphy0_tx_rx_uniphy1_tx_rx_ubi32_bias_map[] = {
+--	{ P_XO, 0 },
+--	{ P_UNIPHY0_TX, 1 },
+--	{ P_UNIPHY0_RX, 2 },
+--	{ P_UNIPHY1_TX, 3 },
+--	{ P_UNIPHY1_RX, 4 },
+--	{ P_UBI32_PLL, 5 },
+--	{ P_BIAS_PLL, 6 },
+--};
+--
+--static const char * const gcc_xo_uniphy2_rx_tx_ubi32_bias[] = {
+--	"xo",
+--	"uniphy2_gcc_rx_clk",
+--	"uniphy2_gcc_tx_clk",
+--	"ubi32_pll",
+--	"bias_pll_cc_clk",
+--};
+--
+--static const struct parent_map gcc_xo_uniphy2_rx_tx_ubi32_bias_map[] = {
+--	{ P_XO, 0 },
+--	{ P_UNIPHY2_RX, 1 },
+--	{ P_UNIPHY2_TX, 2 },
+--	{ P_UBI32_PLL, 5 },
+--	{ P_BIAS_PLL, 6 },
+--};
+--
+--static const char * const gcc_xo_uniphy2_tx_rx_ubi32_bias[] = {
+--	"xo",
+--	"uniphy2_gcc_tx_clk",
+--	"uniphy2_gcc_rx_clk",
+--	"ubi32_pll",
+--	"bias_pll_cc_clk",
+--};
+--
+--static const struct parent_map gcc_xo_uniphy2_tx_rx_ubi32_bias_map[] = {
+--	{ P_XO, 0 },
+--	{ P_UNIPHY2_TX, 1 },
+--	{ P_UNIPHY2_RX, 2 },
+--	{ P_UBI32_PLL, 5 },
+--	{ P_BIAS_PLL, 6 },
+--};
+--
+--static const char * const gcc_xo_gpll0_gpll6_gpll0_sleep_clk[] = {
+--	"xo",
+--	"gpll0",
+--	"gpll6",
+--	"gpll0_out_main_div2",
+--	"sleep_clk",
+--};
+--
+--static const struct parent_map gcc_xo_gpll0_gpll6_gpll0_sleep_clk_map[] = {
+--	{ P_XO, 0 },
+--	{ P_GPLL0, 1 },
+--	{ P_GPLL6, 2 },
+--	{ P_GPLL0_DIV2, 4 },
+--	{ P_SLEEP_CLK, 6 },
+--};
+--
+- static struct clk_alpha_pll gpll0_main = {
+- 	.offset = 0x21000,
+- 	.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT],
+-@@ -400,8 +57,9 @@ static struct clk_alpha_pll gpll0_main =
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gpll0_main",
+--			.parent_names = (const char *[]){
+--				"xo"
+-+			.parent_data = &(const struct clk_parent_data){
+-+				.fw_name = "xo",
+-+				.name = "xo",
+- 			},
+- 			.num_parents = 1,
+- 			.ops = &clk_alpha_pll_ops,
+-@@ -414,9 +72,8 @@ static struct clk_fixed_factor gpll0_out
+- 	.div = 2,
+- 	.hw.init = &(struct clk_init_data){
+- 		.name = "gpll0_out_main_div2",
+--		.parent_names = (const char *[]){
+--			"gpll0_main"
+--		},
+-+		.parent_hws = (const struct clk_hw *[]){
+-+				&gpll0_main.clkr.hw },
+- 		.num_parents = 1,
+- 		.ops = &clk_fixed_factor_ops,
+- 		.flags = CLK_SET_RATE_PARENT,
+-@@ -429,9 +86,8 @@ static struct clk_alpha_pll_postdiv gpll
+- 	.width = 4,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "gpll0",
+--		.parent_names = (const char *[]){
+--			"gpll0_main"
+--		},
+-+		.parent_hws = (const struct clk_hw *[]){
+-+				&gpll0_main.clkr.hw },
+- 		.num_parents = 1,
+- 		.ops = &clk_alpha_pll_postdiv_ro_ops,
+- 	},
+-@@ -445,8 +101,9 @@ static struct clk_alpha_pll gpll2_main =
+- 		.enable_mask = BIT(2),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gpll2_main",
+--			.parent_names = (const char *[]){
+--				"xo"
+-+			.parent_data = &(const struct clk_parent_data){
+-+				.fw_name = "xo",
+-+				.name = "xo",
+- 			},
+- 			.num_parents = 1,
+- 			.ops = &clk_alpha_pll_ops,
+-@@ -461,9 +118,8 @@ static struct clk_alpha_pll_postdiv gpll
+- 	.width = 4,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "gpll2",
+--		.parent_names = (const char *[]){
+--			"gpll2_main"
+--		},
+-+		.parent_hws = (const struct clk_hw *[]){
+-+				&gpll2_main.clkr.hw },
+- 		.num_parents = 1,
+- 		.ops = &clk_alpha_pll_postdiv_ro_ops,
+- 		.flags = CLK_SET_RATE_PARENT,
+-@@ -478,8 +134,9 @@ static struct clk_alpha_pll gpll4_main =
+- 		.enable_mask = BIT(5),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gpll4_main",
+--			.parent_names = (const char *[]){
+--				"xo"
+-+			.parent_data = &(const struct clk_parent_data){
+-+				.fw_name = "xo",
+-+				.name = "xo",
+- 			},
+- 			.num_parents = 1,
+- 			.ops = &clk_alpha_pll_ops,
+-@@ -494,9 +151,8 @@ static struct clk_alpha_pll_postdiv gpll
+- 	.width = 4,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "gpll4",
+--		.parent_names = (const char *[]){
+--			"gpll4_main"
+--		},
+-+		.parent_hws = (const struct clk_hw *[]){
+-+				&gpll4_main.clkr.hw },
+- 		.num_parents = 1,
+- 		.ops = &clk_alpha_pll_postdiv_ro_ops,
+- 		.flags = CLK_SET_RATE_PARENT,
+-@@ -512,8 +168,9 @@ static struct clk_alpha_pll gpll6_main =
+- 		.enable_mask = BIT(7),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gpll6_main",
+--			.parent_names = (const char *[]){
+--				"xo"
+-+			.parent_data = &(const struct clk_parent_data){
+-+				.fw_name = "xo",
+-+				.name = "xo",
+- 			},
+- 			.num_parents = 1,
+- 			.ops = &clk_alpha_pll_ops,
+-@@ -528,9 +185,8 @@ static struct clk_alpha_pll_postdiv gpll
+- 	.width = 2,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "gpll6",
+--		.parent_names = (const char *[]){
+--			"gpll6_main"
+--		},
+-+		.parent_hws = (const struct clk_hw *[]){
+-+				&gpll6_main.clkr.hw },
+- 		.num_parents = 1,
+- 		.ops = &clk_alpha_pll_postdiv_ro_ops,
+- 		.flags = CLK_SET_RATE_PARENT,
+-@@ -542,9 +198,8 @@ static struct clk_fixed_factor gpll6_out
+- 	.div = 2,
+- 	.hw.init = &(struct clk_init_data){
+- 		.name = "gpll6_out_main_div2",
+--		.parent_names = (const char *[]){
+--			"gpll6_main"
+--		},
+-+		.parent_hws = (const struct clk_hw *[]){
+-+				&gpll6_main.clkr.hw },
+- 		.num_parents = 1,
+- 		.ops = &clk_fixed_factor_ops,
+- 		.flags = CLK_SET_RATE_PARENT,
+-@@ -560,8 +215,9 @@ static struct clk_alpha_pll ubi32_pll_ma
+- 		.enable_mask = BIT(6),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "ubi32_pll_main",
+--			.parent_names = (const char *[]){
+--				"xo"
+-+			.parent_data = &(const struct clk_parent_data){
+-+				.fw_name = "xo",
+-+				.name = "xo",
+- 			},
+- 			.num_parents = 1,
+- 			.ops = &clk_alpha_pll_huayra_ops,
+-@@ -575,9 +231,8 @@ static struct clk_alpha_pll_postdiv ubi3
+- 	.width = 2,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "ubi32_pll",
+--		.parent_names = (const char *[]){
+--			"ubi32_pll_main"
+--		},
+-+		.parent_hws = (const struct clk_hw *[]){
+-+				&ubi32_pll_main.clkr.hw },
+- 		.num_parents = 1,
+- 		.ops = &clk_alpha_pll_postdiv_ro_ops,
+- 		.flags = CLK_SET_RATE_PARENT,
+-@@ -592,8 +247,9 @@ static struct clk_alpha_pll nss_crypto_p
+- 		.enable_mask = BIT(4),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "nss_crypto_pll_main",
+--			.parent_names = (const char *[]){
+--				"xo"
+-+			.parent_data = &(const struct clk_parent_data){
+-+				.fw_name = "xo",
+-+				.name = "xo",
+- 			},
+- 			.num_parents = 1,
+- 			.ops = &clk_alpha_pll_ops,
+-@@ -607,9 +263,8 @@ static struct clk_alpha_pll_postdiv nss_
+- 	.width = 4,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_crypto_pll",
+--		.parent_names = (const char *[]){
+--			"nss_crypto_pll_main"
+--		},
+-+		.parent_hws = (const struct clk_hw *[]){
+-+				&nss_crypto_pll_main.clkr.hw },
+- 		.num_parents = 1,
+- 		.ops = &clk_alpha_pll_postdiv_ro_ops,
+- 		.flags = CLK_SET_RATE_PARENT,
+-@@ -623,6 +278,18 @@ static const struct freq_tbl ftbl_pcnoc_
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_gpll0_gpll0_out_main_div2[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .hw = &gpll0.clkr.hw},
+-+	{ .hw = &gpll0_out_main_div2.hw},
+-+};
+-+
+-+static const struct parent_map gcc_xo_gpll0_gpll0_out_main_div2_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_GPLL0, 1 },
+-+	{ P_GPLL0_DIV2, 4 },
+-+};
+-+
+- static struct clk_rcg2 pcnoc_bfdcd_clk_src = {
+- 	.cmd_rcgr = 0x27000,
+- 	.freq_tbl = ftbl_pcnoc_bfdcd_clk_src,
+-@@ -630,8 +297,8 @@ static struct clk_rcg2 pcnoc_bfdcd_clk_s
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "pcnoc_bfdcd_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 		.flags = CLK_IS_CRITICAL,
+- 	},
+-@@ -642,9 +309,8 @@ static struct clk_fixed_factor pcnoc_clk
+- 	.div = 1,
+- 	.hw.init = &(struct clk_init_data){
+- 		.name = "pcnoc_clk_src",
+--		.parent_names = (const char *[]){
+--			"pcnoc_bfdcd_clk_src"
+--		},
+-+		.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_bfdcd_clk_src.clkr.hw },
+- 		.num_parents = 1,
+- 		.ops = &clk_fixed_factor_ops,
+- 		.flags = CLK_SET_RATE_PARENT,
+-@@ -658,8 +324,9 @@ static struct clk_branch gcc_sleep_clk_s
+- 		.enable_mask = BIT(1),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_sleep_clk_src",
+--			.parent_names = (const char *[]){
+--				"sleep_clk"
+-+			.parent_data = &(const struct clk_parent_data){
+-+				.fw_name = "sleep_clk",
+-+				.name = "sleep_clk",
+- 			},
+- 			.num_parents = 1,
+- 			.ops = &clk_branch2_ops,
+-@@ -682,8 +349,8 @@ static struct clk_rcg2 blsp1_qup1_i2c_ap
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_qup1_i2c_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -708,8 +375,8 @@ static struct clk_rcg2 blsp1_qup1_spi_ap
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_qup1_spi_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -721,8 +388,8 @@ static struct clk_rcg2 blsp1_qup2_i2c_ap
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_qup2_i2c_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -735,8 +402,8 @@ static struct clk_rcg2 blsp1_qup2_spi_ap
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_qup2_spi_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -748,8 +415,8 @@ static struct clk_rcg2 blsp1_qup3_i2c_ap
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_qup3_i2c_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -762,8 +429,8 @@ static struct clk_rcg2 blsp1_qup3_spi_ap
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_qup3_spi_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -775,8 +442,8 @@ static struct clk_rcg2 blsp1_qup4_i2c_ap
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_qup4_i2c_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -789,8 +456,8 @@ static struct clk_rcg2 blsp1_qup4_spi_ap
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_qup4_spi_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -802,8 +469,8 @@ static struct clk_rcg2 blsp1_qup5_i2c_ap
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_qup5_i2c_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -816,8 +483,8 @@ static struct clk_rcg2 blsp1_qup5_spi_ap
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_qup5_spi_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -829,8 +496,8 @@ static struct clk_rcg2 blsp1_qup6_i2c_ap
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_qup6_i2c_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -843,8 +510,8 @@ static struct clk_rcg2 blsp1_qup6_spi_ap
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_qup6_spi_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -877,8 +544,8 @@ static struct clk_rcg2 blsp1_uart1_apps_
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_uart1_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -891,8 +558,8 @@ static struct clk_rcg2 blsp1_uart2_apps_
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_uart2_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -905,8 +572,8 @@ static struct clk_rcg2 blsp1_uart3_apps_
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_uart3_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -919,8 +586,8 @@ static struct clk_rcg2 blsp1_uart4_apps_
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_uart4_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -933,8 +600,8 @@ static struct clk_rcg2 blsp1_uart5_apps_
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_uart5_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -947,8 +614,8 @@ static struct clk_rcg2 blsp1_uart6_apps_
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "blsp1_uart6_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -958,6 +625,11 @@ static const struct clk_parent_data gcc_
+- 	{ .hw = &gpll0.clkr.hw },
+- };
+- 
+-+static const struct parent_map gcc_xo_gpll0_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_GPLL0, 1 },
+-+};
+-+
+- static const struct freq_tbl ftbl_pcie_axi_clk_src[] = {
+- 	F(19200000, P_XO, 1, 0, 0),
+- 	F(200000000, P_GPLL0, 4, 0, 0),
+-@@ -972,7 +644,7 @@ static struct clk_rcg2 pcie0_axi_clk_src
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "pcie0_axi_clk_src",
+- 		.parent_data = gcc_xo_gpll0,
+--		.num_parents = 2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -981,6 +653,18 @@ static const struct freq_tbl ftbl_pcie_a
+- 	F(19200000, P_XO, 1, 0, 0),
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_gpll0_sleep_clk[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .hw = &gpll0.clkr.hw },
+-+	{ .fw_name = "sleep_clk", .name = "sleep_clk" },
+-+};
+-+
+-+static const struct parent_map gcc_xo_gpll0_sleep_clk_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_GPLL0, 2 },
+-+	{ P_SLEEP_CLK, 6 },
+-+};
+-+
+- static struct clk_rcg2 pcie0_aux_clk_src = {
+- 	.cmd_rcgr = 0x75024,
+- 	.freq_tbl = ftbl_pcie_aux_clk_src,
+-@@ -989,12 +673,22 @@ static struct clk_rcg2 pcie0_aux_clk_src
+- 	.parent_map = gcc_xo_gpll0_sleep_clk_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "pcie0_aux_clk_src",
+--		.parent_names = gcc_xo_gpll0_sleep_clk,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_sleep_clk,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_sleep_clk),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+- 
+-+static const struct clk_parent_data gcc_pcie20_phy0_pipe_clk_xo[] = {
+-+	{ .name = "pcie20_phy0_pipe_clk" },
+-+	{ .fw_name = "xo", .name = "xo" },
+-+};
+-+
+-+static const struct parent_map gcc_pcie20_phy0_pipe_clk_xo_map[] = {
+-+	{ P_PCIE20_PHY0_PIPE, 0 },
+-+	{ P_XO, 2 },
+-+};
+-+
+- static struct clk_regmap_mux pcie0_pipe_clk_src = {
+- 	.reg = 0x7501c,
+- 	.shift = 8,
+-@@ -1003,8 +697,8 @@ static struct clk_regmap_mux pcie0_pipe_
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "pcie0_pipe_clk_src",
+--			.parent_names = gcc_pcie20_phy0_pipe_clk_xo,
+--			.num_parents = 2,
+-+			.parent_data = gcc_pcie20_phy0_pipe_clk_xo,
+-+			.num_parents = ARRAY_SIZE(gcc_pcie20_phy0_pipe_clk_xo),
+- 			.ops = &clk_regmap_mux_closest_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 		},
+-@@ -1019,7 +713,7 @@ static struct clk_rcg2 pcie1_axi_clk_src
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "pcie1_axi_clk_src",
+- 		.parent_data = gcc_xo_gpll0,
+--		.num_parents = 2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1032,12 +726,22 @@ static struct clk_rcg2 pcie1_aux_clk_src
+- 	.parent_map = gcc_xo_gpll0_sleep_clk_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "pcie1_aux_clk_src",
+--		.parent_names = gcc_xo_gpll0_sleep_clk,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_sleep_clk,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_sleep_clk),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+- 
+-+static const struct clk_parent_data gcc_pcie20_phy1_pipe_clk_xo[] = {
+-+	{ .name = "pcie20_phy1_pipe_clk" },
+-+	{ .fw_name = "xo", .name = "xo" },
+-+};
+-+
+-+static const struct parent_map gcc_pcie20_phy1_pipe_clk_xo_map[] = {
+-+	{ P_PCIE20_PHY1_PIPE, 0 },
+-+	{ P_XO, 2 },
+-+};
+-+
+- static struct clk_regmap_mux pcie1_pipe_clk_src = {
+- 	.reg = 0x7601c,
+- 	.shift = 8,
+-@@ -1046,8 +750,8 @@ static struct clk_regmap_mux pcie1_pipe_
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "pcie1_pipe_clk_src",
+--			.parent_names = gcc_pcie20_phy1_pipe_clk_xo,
+--			.num_parents = 2,
+-+			.parent_data = gcc_pcie20_phy1_pipe_clk_xo,
+-+			.num_parents = ARRAY_SIZE(gcc_pcie20_phy1_pipe_clk_xo),
+- 			.ops = &clk_regmap_mux_closest_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 		},
+-@@ -1066,6 +770,20 @@ static const struct freq_tbl ftbl_sdcc_a
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_gpll0_gpll2_gpll0_out_main_div2[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .hw = &gpll0.clkr.hw },
+-+	{ .hw = &gpll2.clkr.hw },
+-+	{ .hw = &gpll0_out_main_div2.hw },
+-+};
+-+
+-+static const struct parent_map gcc_xo_gpll0_gpll2_gpll0_out_main_div2_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_GPLL0, 1 },
+-+	{ P_GPLL2, 2 },
+-+	{ P_GPLL0_DIV2, 4 },
+-+};
+-+
+- static struct clk_rcg2 sdcc1_apps_clk_src = {
+- 	.cmd_rcgr = 0x42004,
+- 	.freq_tbl = ftbl_sdcc_apps_clk_src,
+-@@ -1074,8 +792,8 @@ static struct clk_rcg2 sdcc1_apps_clk_sr
+- 	.parent_map = gcc_xo_gpll0_gpll2_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "sdcc1_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll2_gpll0_out_main_div2,
+--		.num_parents = 4,
+-+		.parent_data = gcc_xo_gpll0_gpll2_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll2_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_floor_ops,
+- 	},
+- };
+-@@ -1086,6 +804,20 @@ static const struct freq_tbl ftbl_sdcc_i
+- 	F(308570000, P_GPLL6, 3.5, 0, 0),
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_gpll0_gpll6_gpll0_div2[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .hw = &gpll0.clkr.hw },
+-+	{ .hw = &gpll6.clkr.hw },
+-+	{ .hw = &gpll0_out_main_div2.hw },
+-+};
+-+
+-+static const struct parent_map gcc_xo_gpll0_gpll6_gpll0_div2_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_GPLL0, 1 },
+-+	{ P_GPLL6, 2 },
+-+	{ P_GPLL0_DIV2, 4 },
+-+};
+-+
+- static struct clk_rcg2 sdcc1_ice_core_clk_src = {
+- 	.cmd_rcgr = 0x5d000,
+- 	.freq_tbl = ftbl_sdcc_ice_core_clk_src,
+-@@ -1094,8 +826,8 @@ static struct clk_rcg2 sdcc1_ice_core_cl
+- 	.parent_map = gcc_xo_gpll0_gpll6_gpll0_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "sdcc1_ice_core_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll6_gpll0_div2,
+--		.num_parents = 4,
+-+		.parent_data = gcc_xo_gpll0_gpll6_gpll0_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll6_gpll0_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1108,8 +840,8 @@ static struct clk_rcg2 sdcc2_apps_clk_sr
+- 	.parent_map = gcc_xo_gpll0_gpll2_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "sdcc2_apps_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll2_gpll0_out_main_div2,
+--		.num_parents = 4,
+-+		.parent_data = gcc_xo_gpll0_gpll2_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll2_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_floor_ops,
+- 	},
+- };
+-@@ -1121,6 +853,18 @@ static const struct freq_tbl ftbl_usb_ma
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_gpll0_out_main_div2_gpll0[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .hw = &gpll0_out_main_div2.hw },
+-+	{ .hw = &gpll0.clkr.hw },
+-+};
+-+
+-+static const struct parent_map gcc_xo_gpll0_out_main_div2_gpll0_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_GPLL0_DIV2, 2 },
+-+	{ P_GPLL0, 1 },
+-+};
+-+
+- static struct clk_rcg2 usb0_master_clk_src = {
+- 	.cmd_rcgr = 0x3e00c,
+- 	.freq_tbl = ftbl_usb_master_clk_src,
+-@@ -1129,8 +873,8 @@ static struct clk_rcg2 usb0_master_clk_s
+- 	.parent_map = gcc_xo_gpll0_out_main_div2_gpll0_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "usb0_master_clk_src",
+--		.parent_names = gcc_xo_gpll0_out_main_div2_gpll0,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_out_main_div2_gpll0,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_out_main_div2_gpll0),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1148,8 +892,8 @@ static struct clk_rcg2 usb0_aux_clk_src
+- 	.parent_map = gcc_xo_gpll0_sleep_clk_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "usb0_aux_clk_src",
+--		.parent_names = gcc_xo_gpll0_sleep_clk,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_sleep_clk,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_sleep_clk),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1161,6 +905,20 @@ static const struct freq_tbl ftbl_usb_mo
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_gpll6_gpll0_gpll0_out_main_div2[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .hw = &gpll6.clkr.hw },
+-+	{ .hw = &gpll0.clkr.hw },
+-+	{ .hw = &gpll0_out_main_div2.hw },
+-+};
+-+
+-+static const struct parent_map gcc_xo_gpll6_gpll0_gpll0_out_main_div2_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_GPLL6, 1 },
+-+	{ P_GPLL0, 3 },
+-+	{ P_GPLL0_DIV2, 4 },
+-+};
+-+
+- static struct clk_rcg2 usb0_mock_utmi_clk_src = {
+- 	.cmd_rcgr = 0x3e020,
+- 	.freq_tbl = ftbl_usb_mock_utmi_clk_src,
+-@@ -1169,12 +927,22 @@ static struct clk_rcg2 usb0_mock_utmi_cl
+- 	.parent_map = gcc_xo_gpll6_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "usb0_mock_utmi_clk_src",
+--		.parent_names = gcc_xo_gpll6_gpll0_gpll0_out_main_div2,
+--		.num_parents = 4,
+-+		.parent_data = gcc_xo_gpll6_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll6_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+- 
+-+static const struct clk_parent_data gcc_usb3phy_0_cc_pipe_clk_xo[] = {
+-+	{ .name = "usb3phy_0_cc_pipe_clk" },
+-+	{ .fw_name = "xo", .name = "xo" },
+-+};
+-+
+-+static const struct parent_map gcc_usb3phy_0_cc_pipe_clk_xo_map[] = {
+-+	{ P_USB3PHY_0_PIPE, 0 },
+-+	{ P_XO, 2 },
+-+};
+-+
+- static struct clk_regmap_mux usb0_pipe_clk_src = {
+- 	.reg = 0x3e048,
+- 	.shift = 8,
+-@@ -1183,8 +951,8 @@ static struct clk_regmap_mux usb0_pipe_c
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "usb0_pipe_clk_src",
+--			.parent_names = gcc_usb3phy_0_cc_pipe_clk_xo,
+--			.num_parents = 2,
+-+			.parent_data = gcc_usb3phy_0_cc_pipe_clk_xo,
+-+			.num_parents = ARRAY_SIZE(gcc_usb3phy_0_cc_pipe_clk_xo),
+- 			.ops = &clk_regmap_mux_closest_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 		},
+-@@ -1199,8 +967,8 @@ static struct clk_rcg2 usb1_master_clk_s
+- 	.parent_map = gcc_xo_gpll0_out_main_div2_gpll0_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "usb1_master_clk_src",
+--		.parent_names = gcc_xo_gpll0_out_main_div2_gpll0,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_out_main_div2_gpll0,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_out_main_div2_gpll0),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1213,8 +981,8 @@ static struct clk_rcg2 usb1_aux_clk_src
+- 	.parent_map = gcc_xo_gpll0_sleep_clk_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "usb1_aux_clk_src",
+--		.parent_names = gcc_xo_gpll0_sleep_clk,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_sleep_clk,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_sleep_clk),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1227,12 +995,22 @@ static struct clk_rcg2 usb1_mock_utmi_cl
+- 	.parent_map = gcc_xo_gpll6_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "usb1_mock_utmi_clk_src",
+--		.parent_names = gcc_xo_gpll6_gpll0_gpll0_out_main_div2,
+--		.num_parents = 4,
+-+		.parent_data = gcc_xo_gpll6_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll6_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+- 
+-+static const struct clk_parent_data gcc_usb3phy_1_cc_pipe_clk_xo[] = {
+-+	{ .name = "usb3phy_1_cc_pipe_clk" },
+-+	{ .fw_name = "xo", .name = "xo" },
+-+};
+-+
+-+static const struct parent_map gcc_usb3phy_1_cc_pipe_clk_xo_map[] = {
+-+	{ P_USB3PHY_1_PIPE, 0 },
+-+	{ P_XO, 2 },
+-+};
+-+
+- static struct clk_regmap_mux usb1_pipe_clk_src = {
+- 	.reg = 0x3f048,
+- 	.shift = 8,
+-@@ -1241,8 +1019,8 @@ static struct clk_regmap_mux usb1_pipe_c
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "usb1_pipe_clk_src",
+--			.parent_names = gcc_usb3phy_1_cc_pipe_clk_xo,
+--			.num_parents = 2,
+-+			.parent_data = gcc_usb3phy_1_cc_pipe_clk_xo,
+-+			.num_parents = ARRAY_SIZE(gcc_usb3phy_1_cc_pipe_clk_xo),
+- 			.ops = &clk_regmap_mux_closest_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 		},
+-@@ -1256,8 +1034,9 @@ static struct clk_branch gcc_xo_clk_src
+- 		.enable_mask = BIT(1),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_xo_clk_src",
+--			.parent_names = (const char *[]){
+--				"xo"
+-+			.parent_data = &(const struct clk_parent_data){
+-+				.fw_name = "xo",
+-+				.name = "xo",
+- 			},
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
+-@@ -1271,9 +1050,8 @@ static struct clk_fixed_factor gcc_xo_di
+- 	.div = 4,
+- 	.hw.init = &(struct clk_init_data){
+- 		.name = "gcc_xo_div4_clk_src",
+--		.parent_names = (const char *[]){
+--			"gcc_xo_clk_src"
+--		},
+-+		.parent_hws = (const struct clk_hw *[]){
+-+				&gcc_xo_clk_src.clkr.hw },
+- 		.num_parents = 1,
+- 		.ops = &clk_fixed_factor_ops,
+- 		.flags = CLK_SET_RATE_PARENT,
+-@@ -1291,6 +1069,20 @@ static const struct freq_tbl ftbl_system
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_gpll0_gpll6_gpll0_out_main_div2[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .hw = &gpll0.clkr.hw },
+-+	{ .hw = &gpll6.clkr.hw },
+-+	{ .hw = &gpll0_out_main_div2.hw },
+-+};
+-+
+-+static const struct parent_map gcc_xo_gpll0_gpll6_gpll0_out_main_div2_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_GPLL0, 1 },
+-+	{ P_GPLL6, 2 },
+-+	{ P_GPLL0_DIV2, 3 },
+-+};
+-+
+- static struct clk_rcg2 system_noc_bfdcd_clk_src = {
+- 	.cmd_rcgr = 0x26004,
+- 	.freq_tbl = ftbl_system_noc_bfdcd_clk_src,
+-@@ -1298,8 +1090,8 @@ static struct clk_rcg2 system_noc_bfdcd_
+- 	.parent_map = gcc_xo_gpll0_gpll6_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "system_noc_bfdcd_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll6_gpll0_out_main_div2,
+--		.num_parents = 4,
+-+		.parent_data = gcc_xo_gpll0_gpll6_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll6_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 		.flags = CLK_IS_CRITICAL,
+- 	},
+-@@ -1310,9 +1102,8 @@ static struct clk_fixed_factor system_no
+- 	.div = 1,
+- 	.hw.init = &(struct clk_init_data){
+- 		.name = "system_noc_clk_src",
+--		.parent_names = (const char *[]){
+--			"system_noc_bfdcd_clk_src"
+--		},
+-+		.parent_hws = (const struct clk_hw *[]){
+-+				&system_noc_bfdcd_clk_src.clkr.hw },
+- 		.num_parents = 1,
+- 		.ops = &clk_fixed_factor_ops,
+- 		.flags = CLK_SET_RATE_PARENT,
+-@@ -1333,7 +1124,7 @@ static struct clk_rcg2 nss_ce_clk_src =
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_ce_clk_src",
+- 		.parent_data = gcc_xo_gpll0,
+--		.num_parents = 2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1344,6 +1135,20 @@ static const struct freq_tbl ftbl_nss_no
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_bias_pll_nss_noc_clk_gpll0_gpll2[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .name = "bias_pll_nss_noc_clk" },
+-+	{ .hw = &gpll0.clkr.hw },
+-+	{ .hw = &gpll2.clkr.hw },
+-+};
+-+
+-+static const struct parent_map gcc_xo_bias_pll_nss_noc_clk_gpll0_gpll2_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_BIAS_PLL_NSS_NOC, 1 },
+-+	{ P_GPLL0, 2 },
+-+	{ P_GPLL2, 3 },
+-+};
+-+
+- static struct clk_rcg2 nss_noc_bfdcd_clk_src = {
+- 	.cmd_rcgr = 0x68088,
+- 	.freq_tbl = ftbl_nss_noc_bfdcd_clk_src,
+-@@ -1351,8 +1156,8 @@ static struct clk_rcg2 nss_noc_bfdcd_clk
+- 	.parent_map = gcc_xo_bias_pll_nss_noc_clk_gpll0_gpll2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_noc_bfdcd_clk_src",
+--		.parent_names = gcc_xo_bias_pll_nss_noc_clk_gpll0_gpll2,
+--		.num_parents = 4,
+-+		.parent_data = gcc_xo_bias_pll_nss_noc_clk_gpll0_gpll2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_bias_pll_nss_noc_clk_gpll0_gpll2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1362,9 +1167,8 @@ static struct clk_fixed_factor nss_noc_c
+- 	.div = 1,
+- 	.hw.init = &(struct clk_init_data){
+- 		.name = "nss_noc_clk_src",
+--		.parent_names = (const char *[]){
+--			"nss_noc_bfdcd_clk_src"
+--		},
+-+		.parent_hws = (const struct clk_hw *[]){
+-+				&nss_noc_bfdcd_clk_src.clkr.hw },
+- 		.num_parents = 1,
+- 		.ops = &clk_fixed_factor_ops,
+- 		.flags = CLK_SET_RATE_PARENT,
+-@@ -1377,6 +1181,18 @@ static const struct freq_tbl ftbl_nss_cr
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_nss_crypto_pll_gpll0[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .hw = &nss_crypto_pll.clkr.hw },
+-+	{ .hw = &gpll0.clkr.hw },
+-+};
+-+
+-+static const struct parent_map gcc_xo_nss_crypto_pll_gpll0_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_NSS_CRYPTO_PLL, 1 },
+-+	{ P_GPLL0, 2 },
+-+};
+-+
+- static struct clk_rcg2 nss_crypto_clk_src = {
+- 	.cmd_rcgr = 0x68144,
+- 	.freq_tbl = ftbl_nss_crypto_clk_src,
+-@@ -1385,8 +1201,8 @@ static struct clk_rcg2 nss_crypto_clk_sr
+- 	.parent_map = gcc_xo_nss_crypto_pll_gpll0_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_crypto_clk_src",
+--		.parent_names = gcc_xo_nss_crypto_pll_gpll0,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_nss_crypto_pll_gpll0,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_nss_crypto_pll_gpll0),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1400,6 +1216,24 @@ static const struct freq_tbl ftbl_nss_ub
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_ubi32_pll_gpll0_gpll2_gpll4_gpll6[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .hw = &ubi32_pll.clkr.hw },
+-+	{ .hw = &gpll0.clkr.hw },
+-+	{ .hw = &gpll2.clkr.hw },
+-+	{ .hw = &gpll4.clkr.hw },
+-+	{ .hw = &gpll6.clkr.hw },
+-+};
+-+
+-+static const struct parent_map gcc_xo_ubi32_gpll0_gpll2_gpll4_gpll6_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_UBI32_PLL, 1 },
+-+	{ P_GPLL0, 2 },
+-+	{ P_GPLL2, 3 },
+-+	{ P_GPLL4, 4 },
+-+	{ P_GPLL6, 5 },
+-+};
+-+
+- static struct clk_rcg2 nss_ubi0_clk_src = {
+- 	.cmd_rcgr = 0x68104,
+- 	.freq_tbl = ftbl_nss_ubi_clk_src,
+-@@ -1407,8 +1241,8 @@ static struct clk_rcg2 nss_ubi0_clk_src
+- 	.parent_map = gcc_xo_ubi32_gpll0_gpll2_gpll4_gpll6_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_ubi0_clk_src",
+--		.parent_names = gcc_xo_ubi32_pll_gpll0_gpll2_gpll4_gpll6,
+--		.num_parents = 6,
+-+		.parent_data = gcc_xo_ubi32_pll_gpll0_gpll2_gpll4_gpll6,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_ubi32_pll_gpll0_gpll2_gpll4_gpll6),
+- 		.ops = &clk_rcg2_ops,
+- 		.flags = CLK_SET_RATE_PARENT,
+- 	},
+-@@ -1421,9 +1255,8 @@ static struct clk_regmap_div nss_ubi0_di
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "nss_ubi0_div_clk_src",
+--			.parent_names = (const char *[]){
+--				"nss_ubi0_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ubi0_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.ops = &clk_regmap_div_ro_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+-@@ -1438,8 +1271,8 @@ static struct clk_rcg2 nss_ubi1_clk_src
+- 	.parent_map = gcc_xo_ubi32_gpll0_gpll2_gpll4_gpll6_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_ubi1_clk_src",
+--		.parent_names = gcc_xo_ubi32_pll_gpll0_gpll2_gpll4_gpll6,
+--		.num_parents = 6,
+-+		.parent_data = gcc_xo_ubi32_pll_gpll0_gpll2_gpll4_gpll6,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_ubi32_pll_gpll0_gpll2_gpll4_gpll6),
+- 		.ops = &clk_rcg2_ops,
+- 		.flags = CLK_SET_RATE_PARENT,
+- 	},
+-@@ -1452,9 +1285,8 @@ static struct clk_regmap_div nss_ubi1_di
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "nss_ubi1_div_clk_src",
+--			.parent_names = (const char *[]){
+--				"nss_ubi1_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ubi1_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.ops = &clk_regmap_div_ro_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+-@@ -1468,6 +1300,16 @@ static const struct freq_tbl ftbl_ubi_mp
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_gpll0_out_main_div2[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .hw = &gpll0_out_main_div2.hw },
+-+};
+-+
+-+static const struct parent_map gcc_xo_gpll0_out_main_div2_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_GPLL0_DIV2, 1 },
+-+};
+-+
+- static struct clk_rcg2 ubi_mpt_clk_src = {
+- 	.cmd_rcgr = 0x68090,
+- 	.freq_tbl = ftbl_ubi_mpt_clk_src,
+-@@ -1475,8 +1317,8 @@ static struct clk_rcg2 ubi_mpt_clk_src =
+- 	.parent_map = gcc_xo_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "ubi_mpt_clk_src",
+--		.parent_names = gcc_xo_gpll0_out_main_div2,
+--		.num_parents = 2,
+-+		.parent_data = gcc_xo_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1487,6 +1329,18 @@ static const struct freq_tbl ftbl_nss_im
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_gpll0_gpll4[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .hw = &gpll0.clkr.hw },
+-+	{ .hw = &gpll4.clkr.hw },
+-+};
+-+
+-+static const struct parent_map gcc_xo_gpll0_gpll4_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_GPLL0, 1 },
+-+	{ P_GPLL4, 2 },
+-+};
+-+
+- static struct clk_rcg2 nss_imem_clk_src = {
+- 	.cmd_rcgr = 0x68158,
+- 	.freq_tbl = ftbl_nss_imem_clk_src,
+-@@ -1494,8 +1348,8 @@ static struct clk_rcg2 nss_imem_clk_src
+- 	.parent_map = gcc_xo_gpll0_gpll4_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_imem_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll4,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll4,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll4),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1506,6 +1360,24 @@ static const struct freq_tbl ftbl_nss_pp
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_bias_gpll0_gpll4_nss_ubi32[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .name = "bias_pll_cc_clk" },
+-+	{ .hw = &gpll0.clkr.hw },
+-+	{ .hw = &gpll4.clkr.hw },
+-+	{ .hw = &nss_crypto_pll.clkr.hw },
+-+	{ .hw = &ubi32_pll.clkr.hw },
+-+};
+-+
+-+static const struct parent_map gcc_xo_bias_gpll0_gpll4_nss_ubi32_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_BIAS_PLL, 1 },
+-+	{ P_GPLL0, 2 },
+-+	{ P_GPLL4, 3 },
+-+	{ P_NSS_CRYPTO_PLL, 4 },
+-+	{ P_UBI32_PLL, 5 },
+-+};
+-+
+- static struct clk_rcg2 nss_ppe_clk_src = {
+- 	.cmd_rcgr = 0x68080,
+- 	.freq_tbl = ftbl_nss_ppe_clk_src,
+-@@ -1513,8 +1385,8 @@ static struct clk_rcg2 nss_ppe_clk_src =
+- 	.parent_map = gcc_xo_bias_gpll0_gpll4_nss_ubi32_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_ppe_clk_src",
+--		.parent_names = gcc_xo_bias_gpll0_gpll4_nss_ubi32,
+--		.num_parents = 6,
+-+		.parent_data = gcc_xo_bias_gpll0_gpll4_nss_ubi32,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_bias_gpll0_gpll4_nss_ubi32),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1524,9 +1396,8 @@ static struct clk_fixed_factor nss_ppe_c
+- 	.div = 4,
+- 	.hw.init = &(struct clk_init_data){
+- 		.name = "nss_ppe_cdiv_clk_src",
+--		.parent_names = (const char *[]){
+--			"nss_ppe_clk_src"
+--		},
+-+		.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ppe_clk_src.clkr.hw },
+- 		.num_parents = 1,
+- 		.ops = &clk_fixed_factor_ops,
+- 		.flags = CLK_SET_RATE_PARENT,
+-@@ -1540,6 +1411,22 @@ static const struct freq_tbl ftbl_nss_po
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_uniphy0_rx_tx_ubi32_bias[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .name = "uniphy0_gcc_rx_clk" },
+-+	{ .name = "uniphy0_gcc_tx_clk" },
+-+	{ .hw = &ubi32_pll.clkr.hw },
+-+	{ .name = "bias_pll_cc_clk" },
+-+};
+-+
+-+static const struct parent_map gcc_xo_uniphy0_rx_tx_ubi32_bias_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_UNIPHY0_RX, 1 },
+-+	{ P_UNIPHY0_TX, 2 },
+-+	{ P_UBI32_PLL, 5 },
+-+	{ P_BIAS_PLL, 6 },
+-+};
+-+
+- static struct clk_rcg2 nss_port1_rx_clk_src = {
+- 	.cmd_rcgr = 0x68020,
+- 	.freq_tbl = ftbl_nss_port1_rx_clk_src,
+-@@ -1547,8 +1434,8 @@ static struct clk_rcg2 nss_port1_rx_clk_
+- 	.parent_map = gcc_xo_uniphy0_rx_tx_ubi32_bias_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_port1_rx_clk_src",
+--		.parent_names = gcc_xo_uniphy0_rx_tx_ubi32_bias,
+--		.num_parents = 5,
+-+		.parent_data = gcc_xo_uniphy0_rx_tx_ubi32_bias,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_uniphy0_rx_tx_ubi32_bias),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1560,9 +1447,8 @@ static struct clk_regmap_div nss_port1_r
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "nss_port1_rx_div_clk_src",
+--			.parent_names = (const char *[]){
+--				"nss_port1_rx_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port1_rx_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.ops = &clk_regmap_div_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+-@@ -1577,6 +1463,22 @@ static const struct freq_tbl ftbl_nss_po
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_uniphy0_tx_rx_ubi32_bias[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .name = "uniphy0_gcc_tx_clk" },
+-+	{ .name = "uniphy0_gcc_rx_clk" },
+-+	{ .hw = &ubi32_pll.clkr.hw },
+-+	{ .name = "bias_pll_cc_clk" },
+-+};
+-+
+-+static const struct parent_map gcc_xo_uniphy0_tx_rx_ubi32_bias_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_UNIPHY0_TX, 1 },
+-+	{ P_UNIPHY0_RX, 2 },
+-+	{ P_UBI32_PLL, 5 },
+-+	{ P_BIAS_PLL, 6 },
+-+};
+-+
+- static struct clk_rcg2 nss_port1_tx_clk_src = {
+- 	.cmd_rcgr = 0x68028,
+- 	.freq_tbl = ftbl_nss_port1_tx_clk_src,
+-@@ -1584,8 +1486,8 @@ static struct clk_rcg2 nss_port1_tx_clk_
+- 	.parent_map = gcc_xo_uniphy0_tx_rx_ubi32_bias_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_port1_tx_clk_src",
+--		.parent_names = gcc_xo_uniphy0_tx_rx_ubi32_bias,
+--		.num_parents = 5,
+-+		.parent_data = gcc_xo_uniphy0_tx_rx_ubi32_bias,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_uniphy0_tx_rx_ubi32_bias),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1597,9 +1499,8 @@ static struct clk_regmap_div nss_port1_t
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "nss_port1_tx_div_clk_src",
+--			.parent_names = (const char *[]){
+--				"nss_port1_tx_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port1_tx_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.ops = &clk_regmap_div_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+-@@ -1614,8 +1515,8 @@ static struct clk_rcg2 nss_port2_rx_clk_
+- 	.parent_map = gcc_xo_uniphy0_rx_tx_ubi32_bias_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_port2_rx_clk_src",
+--		.parent_names = gcc_xo_uniphy0_rx_tx_ubi32_bias,
+--		.num_parents = 5,
+-+		.parent_data = gcc_xo_uniphy0_rx_tx_ubi32_bias,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_uniphy0_rx_tx_ubi32_bias),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1627,9 +1528,8 @@ static struct clk_regmap_div nss_port2_r
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "nss_port2_rx_div_clk_src",
+--			.parent_names = (const char *[]){
+--				"nss_port2_rx_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port2_rx_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.ops = &clk_regmap_div_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+-@@ -1644,8 +1544,8 @@ static struct clk_rcg2 nss_port2_tx_clk_
+- 	.parent_map = gcc_xo_uniphy0_tx_rx_ubi32_bias_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_port2_tx_clk_src",
+--		.parent_names = gcc_xo_uniphy0_tx_rx_ubi32_bias,
+--		.num_parents = 5,
+-+		.parent_data = gcc_xo_uniphy0_tx_rx_ubi32_bias,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_uniphy0_tx_rx_ubi32_bias),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1657,9 +1557,8 @@ static struct clk_regmap_div nss_port2_t
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "nss_port2_tx_div_clk_src",
+--			.parent_names = (const char *[]){
+--				"nss_port2_tx_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port2_tx_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.ops = &clk_regmap_div_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+-@@ -1674,8 +1573,8 @@ static struct clk_rcg2 nss_port3_rx_clk_
+- 	.parent_map = gcc_xo_uniphy0_rx_tx_ubi32_bias_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_port3_rx_clk_src",
+--		.parent_names = gcc_xo_uniphy0_rx_tx_ubi32_bias,
+--		.num_parents = 5,
+-+		.parent_data = gcc_xo_uniphy0_rx_tx_ubi32_bias,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_uniphy0_rx_tx_ubi32_bias),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1687,9 +1586,8 @@ static struct clk_regmap_div nss_port3_r
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "nss_port3_rx_div_clk_src",
+--			.parent_names = (const char *[]){
+--				"nss_port3_rx_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port3_rx_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.ops = &clk_regmap_div_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+-@@ -1704,8 +1602,8 @@ static struct clk_rcg2 nss_port3_tx_clk_
+- 	.parent_map = gcc_xo_uniphy0_tx_rx_ubi32_bias_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_port3_tx_clk_src",
+--		.parent_names = gcc_xo_uniphy0_tx_rx_ubi32_bias,
+--		.num_parents = 5,
+-+		.parent_data = gcc_xo_uniphy0_tx_rx_ubi32_bias,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_uniphy0_tx_rx_ubi32_bias),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1717,9 +1615,8 @@ static struct clk_regmap_div nss_port3_t
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "nss_port3_tx_div_clk_src",
+--			.parent_names = (const char *[]){
+--				"nss_port3_tx_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port3_tx_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.ops = &clk_regmap_div_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+-@@ -1734,8 +1631,8 @@ static struct clk_rcg2 nss_port4_rx_clk_
+- 	.parent_map = gcc_xo_uniphy0_rx_tx_ubi32_bias_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_port4_rx_clk_src",
+--		.parent_names = gcc_xo_uniphy0_rx_tx_ubi32_bias,
+--		.num_parents = 5,
+-+		.parent_data = gcc_xo_uniphy0_rx_tx_ubi32_bias,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_uniphy0_rx_tx_ubi32_bias),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1747,9 +1644,8 @@ static struct clk_regmap_div nss_port4_r
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "nss_port4_rx_div_clk_src",
+--			.parent_names = (const char *[]){
+--				"nss_port4_rx_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port4_rx_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.ops = &clk_regmap_div_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+-@@ -1764,8 +1660,8 @@ static struct clk_rcg2 nss_port4_tx_clk_
+- 	.parent_map = gcc_xo_uniphy0_tx_rx_ubi32_bias_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_port4_tx_clk_src",
+--		.parent_names = gcc_xo_uniphy0_tx_rx_ubi32_bias,
+--		.num_parents = 5,
+-+		.parent_data = gcc_xo_uniphy0_tx_rx_ubi32_bias,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_uniphy0_tx_rx_ubi32_bias),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1777,9 +1673,8 @@ static struct clk_regmap_div nss_port4_t
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "nss_port4_tx_div_clk_src",
+--			.parent_names = (const char *[]){
+--				"nss_port4_tx_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port4_tx_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.ops = &clk_regmap_div_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+-@@ -1799,6 +1694,27 @@ static const struct freq_tbl ftbl_nss_po
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_uniphy0_rx_tx_uniphy1_rx_tx_ubi32_bias[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .name = "uniphy0_gcc_rx_clk" },
+-+	{ .name = "uniphy0_gcc_tx_clk" },
+-+	{ .name = "uniphy1_gcc_rx_clk" },
+-+	{ .name = "uniphy1_gcc_tx_clk" },
+-+	{ .hw = &ubi32_pll.clkr.hw },
+-+	{ .name = "bias_pll_cc_clk" },
+-+};
+-+
+-+static const struct parent_map
+-+gcc_xo_uniphy0_rx_tx_uniphy1_rx_tx_ubi32_bias_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_UNIPHY0_RX, 1 },
+-+	{ P_UNIPHY0_TX, 2 },
+-+	{ P_UNIPHY1_RX, 3 },
+-+	{ P_UNIPHY1_TX, 4 },
+-+	{ P_UBI32_PLL, 5 },
+-+	{ P_BIAS_PLL, 6 },
+-+};
+-+
+- static struct clk_rcg2 nss_port5_rx_clk_src = {
+- 	.cmd_rcgr = 0x68060,
+- 	.freq_tbl = ftbl_nss_port5_rx_clk_src,
+-@@ -1806,8 +1722,8 @@ static struct clk_rcg2 nss_port5_rx_clk_
+- 	.parent_map = gcc_xo_uniphy0_rx_tx_uniphy1_rx_tx_ubi32_bias_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_port5_rx_clk_src",
+--		.parent_names = gcc_xo_uniphy0_rx_tx_uniphy1_rx_tx_ubi32_bias,
+--		.num_parents = 7,
+-+		.parent_data = gcc_xo_uniphy0_rx_tx_uniphy1_rx_tx_ubi32_bias,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_uniphy0_rx_tx_uniphy1_rx_tx_ubi32_bias),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1819,9 +1735,8 @@ static struct clk_regmap_div nss_port5_r
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "nss_port5_rx_div_clk_src",
+--			.parent_names = (const char *[]){
+--				"nss_port5_rx_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port5_rx_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.ops = &clk_regmap_div_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+-@@ -1841,6 +1756,27 @@ static const struct freq_tbl ftbl_nss_po
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_uniphy0_tx_rx_uniphy1_tx_rx_ubi32_bias[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .name = "uniphy0_gcc_tx_clk" },
+-+	{ .name = "uniphy0_gcc_rx_clk" },
+-+	{ .name = "uniphy1_gcc_tx_clk" },
+-+	{ .name = "uniphy1_gcc_rx_clk" },
+-+	{ .hw = &ubi32_pll.clkr.hw },
+-+	{ .name = "bias_pll_cc_clk" },
+-+};
+-+
+-+static const struct parent_map
+-+gcc_xo_uniphy0_tx_rx_uniphy1_tx_rx_ubi32_bias_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_UNIPHY0_TX, 1 },
+-+	{ P_UNIPHY0_RX, 2 },
+-+	{ P_UNIPHY1_TX, 3 },
+-+	{ P_UNIPHY1_RX, 4 },
+-+	{ P_UBI32_PLL, 5 },
+-+	{ P_BIAS_PLL, 6 },
+-+};
+-+
+- static struct clk_rcg2 nss_port5_tx_clk_src = {
+- 	.cmd_rcgr = 0x68068,
+- 	.freq_tbl = ftbl_nss_port5_tx_clk_src,
+-@@ -1848,8 +1784,8 @@ static struct clk_rcg2 nss_port5_tx_clk_
+- 	.parent_map = gcc_xo_uniphy0_tx_rx_uniphy1_tx_rx_ubi32_bias_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_port5_tx_clk_src",
+--		.parent_names = gcc_xo_uniphy0_tx_rx_uniphy1_tx_rx_ubi32_bias,
+--		.num_parents = 7,
+-+		.parent_data = gcc_xo_uniphy0_tx_rx_uniphy1_tx_rx_ubi32_bias,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_uniphy0_tx_rx_uniphy1_tx_rx_ubi32_bias),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1861,9 +1797,8 @@ static struct clk_regmap_div nss_port5_t
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "nss_port5_tx_div_clk_src",
+--			.parent_names = (const char *[]){
+--				"nss_port5_tx_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port5_tx_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.ops = &clk_regmap_div_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+-@@ -1883,6 +1818,22 @@ static const struct freq_tbl ftbl_nss_po
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_uniphy2_rx_tx_ubi32_bias[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .name = "uniphy2_gcc_rx_clk" },
+-+	{ .name = "uniphy2_gcc_tx_clk" },
+-+	{ .hw = &ubi32_pll.clkr.hw },
+-+	{ .name = "bias_pll_cc_clk" },
+-+};
+-+
+-+static const struct parent_map gcc_xo_uniphy2_rx_tx_ubi32_bias_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_UNIPHY2_RX, 1 },
+-+	{ P_UNIPHY2_TX, 2 },
+-+	{ P_UBI32_PLL, 5 },
+-+	{ P_BIAS_PLL, 6 },
+-+};
+-+
+- static struct clk_rcg2 nss_port6_rx_clk_src = {
+- 	.cmd_rcgr = 0x68070,
+- 	.freq_tbl = ftbl_nss_port6_rx_clk_src,
+-@@ -1890,8 +1841,8 @@ static struct clk_rcg2 nss_port6_rx_clk_
+- 	.parent_map = gcc_xo_uniphy2_rx_tx_ubi32_bias_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_port6_rx_clk_src",
+--		.parent_names = gcc_xo_uniphy2_rx_tx_ubi32_bias,
+--		.num_parents = 5,
+-+		.parent_data = gcc_xo_uniphy2_rx_tx_ubi32_bias,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_uniphy2_rx_tx_ubi32_bias),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1903,9 +1854,8 @@ static struct clk_regmap_div nss_port6_r
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "nss_port6_rx_div_clk_src",
+--			.parent_names = (const char *[]){
+--				"nss_port6_rx_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port6_rx_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.ops = &clk_regmap_div_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+-@@ -1925,6 +1875,22 @@ static const struct freq_tbl ftbl_nss_po
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_uniphy2_tx_rx_ubi32_bias[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .name = "uniphy2_gcc_tx_clk" },
+-+	{ .name = "uniphy2_gcc_rx_clk" },
+-+	{ .hw = &ubi32_pll.clkr.hw },
+-+	{ .name = "bias_pll_cc_clk" },
+-+};
+-+
+-+static const struct parent_map gcc_xo_uniphy2_tx_rx_ubi32_bias_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_UNIPHY2_TX, 1 },
+-+	{ P_UNIPHY2_RX, 2 },
+-+	{ P_UBI32_PLL, 5 },
+-+	{ P_BIAS_PLL, 6 },
+-+};
+-+
+- static struct clk_rcg2 nss_port6_tx_clk_src = {
+- 	.cmd_rcgr = 0x68078,
+- 	.freq_tbl = ftbl_nss_port6_tx_clk_src,
+-@@ -1932,8 +1898,8 @@ static struct clk_rcg2 nss_port6_tx_clk_
+- 	.parent_map = gcc_xo_uniphy2_tx_rx_ubi32_bias_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "nss_port6_tx_clk_src",
+--		.parent_names = gcc_xo_uniphy2_tx_rx_ubi32_bias,
+--		.num_parents = 5,
+-+		.parent_data = gcc_xo_uniphy2_tx_rx_ubi32_bias,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_uniphy2_tx_rx_ubi32_bias),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1945,9 +1911,8 @@ static struct clk_regmap_div nss_port6_t
+- 	.clkr = {
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "nss_port6_tx_div_clk_src",
+--			.parent_names = (const char *[]){
+--				"nss_port6_tx_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port6_tx_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.ops = &clk_regmap_div_ops,
+- 			.flags = CLK_SET_RATE_PARENT,
+-@@ -1970,8 +1935,8 @@ static struct clk_rcg2 crypto_clk_src =
+- 	.parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "crypto_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll0_out_main_div2,
+--		.num_parents = 3,
+-+		.parent_data = gcc_xo_gpll0_gpll0_out_main_div2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -1981,6 +1946,22 @@ static struct freq_tbl ftbl_gp_clk_src[]
+- 	{ }
+- };
+- 
+-+static const struct clk_parent_data gcc_xo_gpll0_gpll6_gpll0_sleep_clk[] = {
+-+	{ .fw_name = "xo", .name = "xo" },
+-+	{ .hw = &gpll0.clkr.hw },
+-+	{ .hw = &gpll6.clkr.hw },
+-+	{ .hw = &gpll0_out_main_div2.hw },
+-+	{ .fw_name = "sleep_clk", .name = "sleep_clk" },
+-+};
+-+
+-+static const struct parent_map gcc_xo_gpll0_gpll6_gpll0_sleep_clk_map[] = {
+-+	{ P_XO, 0 },
+-+	{ P_GPLL0, 1 },
+-+	{ P_GPLL6, 2 },
+-+	{ P_GPLL0_DIV2, 4 },
+-+	{ P_SLEEP_CLK, 6 },
+-+};
+-+
+- static struct clk_rcg2 gp1_clk_src = {
+- 	.cmd_rcgr = 0x08004,
+- 	.freq_tbl = ftbl_gp_clk_src,
+-@@ -1989,8 +1970,8 @@ static struct clk_rcg2 gp1_clk_src = {
+- 	.parent_map = gcc_xo_gpll0_gpll6_gpll0_sleep_clk_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "gp1_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll6_gpll0_sleep_clk,
+--		.num_parents = 5,
+-+		.parent_data = gcc_xo_gpll0_gpll6_gpll0_sleep_clk,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll6_gpll0_sleep_clk),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -2003,8 +1984,8 @@ static struct clk_rcg2 gp2_clk_src = {
+- 	.parent_map = gcc_xo_gpll0_gpll6_gpll0_sleep_clk_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "gp2_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll6_gpll0_sleep_clk,
+--		.num_parents = 5,
+-+		.parent_data = gcc_xo_gpll0_gpll6_gpll0_sleep_clk,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll6_gpll0_sleep_clk),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -2017,8 +1998,8 @@ static struct clk_rcg2 gp3_clk_src = {
+- 	.parent_map = gcc_xo_gpll0_gpll6_gpll0_sleep_clk_map,
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "gp3_clk_src",
+--		.parent_names = gcc_xo_gpll0_gpll6_gpll0_sleep_clk,
+--		.num_parents = 5,
+-+		.parent_data = gcc_xo_gpll0_gpll6_gpll0_sleep_clk,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll6_gpll0_sleep_clk),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+-@@ -2030,9 +2011,8 @@ static struct clk_branch gcc_blsp1_ahb_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2047,9 +2027,8 @@ static struct clk_branch gcc_blsp1_qup1_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_qup1_i2c_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_qup1_i2c_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_qup1_i2c_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2064,9 +2043,8 @@ static struct clk_branch gcc_blsp1_qup1_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_qup1_spi_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_qup1_spi_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_qup1_spi_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2081,9 +2059,8 @@ static struct clk_branch gcc_blsp1_qup2_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_qup2_i2c_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_qup2_i2c_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_qup2_i2c_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2098,9 +2075,8 @@ static struct clk_branch gcc_blsp1_qup2_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_qup2_spi_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_qup2_spi_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_qup2_spi_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2115,9 +2091,8 @@ static struct clk_branch gcc_blsp1_qup3_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_qup3_i2c_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_qup3_i2c_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_qup3_i2c_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2132,9 +2107,8 @@ static struct clk_branch gcc_blsp1_qup3_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_qup3_spi_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_qup3_spi_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_qup3_spi_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2149,9 +2123,8 @@ static struct clk_branch gcc_blsp1_qup4_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_qup4_i2c_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_qup4_i2c_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_qup4_i2c_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2166,9 +2139,8 @@ static struct clk_branch gcc_blsp1_qup4_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_qup4_spi_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_qup4_spi_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_qup4_spi_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2183,9 +2155,8 @@ static struct clk_branch gcc_blsp1_qup5_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_qup5_i2c_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_qup5_i2c_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_qup5_i2c_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2200,9 +2171,8 @@ static struct clk_branch gcc_blsp1_qup5_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_qup5_spi_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_qup5_spi_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_qup5_spi_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2217,9 +2187,8 @@ static struct clk_branch gcc_blsp1_qup6_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_qup6_i2c_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_qup6_i2c_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_qup6_i2c_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2234,9 +2203,8 @@ static struct clk_branch gcc_blsp1_qup6_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_qup6_spi_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_qup6_spi_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_qup6_spi_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2251,9 +2219,8 @@ static struct clk_branch gcc_blsp1_uart1
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_uart1_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_uart1_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_uart1_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2268,9 +2235,8 @@ static struct clk_branch gcc_blsp1_uart2
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_uart2_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_uart2_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_uart2_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2285,9 +2251,8 @@ static struct clk_branch gcc_blsp1_uart3
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_uart3_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_uart3_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_uart3_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2302,9 +2267,8 @@ static struct clk_branch gcc_blsp1_uart4
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_uart4_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_uart4_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_uart4_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2319,9 +2283,8 @@ static struct clk_branch gcc_blsp1_uart5
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_uart5_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_uart5_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_uart5_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2336,9 +2299,8 @@ static struct clk_branch gcc_blsp1_uart6
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_blsp1_uart6_apps_clk",
+--			.parent_names = (const char *[]){
+--				"blsp1_uart6_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&blsp1_uart6_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2354,9 +2316,8 @@ static struct clk_branch gcc_prng_ahb_cl
+- 		.enable_mask = BIT(8),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_prng_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2371,9 +2332,8 @@ static struct clk_branch gcc_qpic_ahb_cl
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_qpic_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2388,9 +2348,8 @@ static struct clk_branch gcc_qpic_clk =
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_qpic_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2405,9 +2364,8 @@ static struct clk_branch gcc_pcie0_ahb_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_pcie0_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2422,9 +2380,8 @@ static struct clk_branch gcc_pcie0_aux_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_pcie0_aux_clk",
+--			.parent_names = (const char *[]){
+--				"pcie0_aux_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcie0_aux_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2439,9 +2396,8 @@ static struct clk_branch gcc_pcie0_axi_m
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_pcie0_axi_m_clk",
+--			.parent_names = (const char *[]){
+--				"pcie0_axi_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcie0_axi_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2456,9 +2412,8 @@ static struct clk_branch gcc_pcie0_axi_s
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_pcie0_axi_s_clk",
+--			.parent_names = (const char *[]){
+--				"pcie0_axi_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcie0_axi_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2474,9 +2429,8 @@ static struct clk_branch gcc_pcie0_pipe_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_pcie0_pipe_clk",
+--			.parent_names = (const char *[]){
+--				"pcie0_pipe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcie0_pipe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2491,9 +2445,8 @@ static struct clk_branch gcc_sys_noc_pci
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_sys_noc_pcie0_axi_clk",
+--			.parent_names = (const char *[]){
+--				"pcie0_axi_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcie0_axi_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2508,9 +2461,8 @@ static struct clk_branch gcc_pcie1_ahb_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_pcie1_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2525,9 +2477,8 @@ static struct clk_branch gcc_pcie1_aux_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_pcie1_aux_clk",
+--			.parent_names = (const char *[]){
+--				"pcie1_aux_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcie1_aux_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2542,9 +2493,8 @@ static struct clk_branch gcc_pcie1_axi_m
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_pcie1_axi_m_clk",
+--			.parent_names = (const char *[]){
+--				"pcie1_axi_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcie1_axi_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2559,9 +2509,8 @@ static struct clk_branch gcc_pcie1_axi_s
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_pcie1_axi_s_clk",
+--			.parent_names = (const char *[]){
+--				"pcie1_axi_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcie1_axi_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2577,9 +2526,8 @@ static struct clk_branch gcc_pcie1_pipe_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_pcie1_pipe_clk",
+--			.parent_names = (const char *[]){
+--				"pcie1_pipe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcie1_pipe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2594,9 +2542,8 @@ static struct clk_branch gcc_sys_noc_pci
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_sys_noc_pcie1_axi_clk",
+--			.parent_names = (const char *[]){
+--				"pcie1_axi_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcie1_axi_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2611,9 +2558,8 @@ static struct clk_branch gcc_usb0_aux_cl
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_usb0_aux_clk",
+--			.parent_names = (const char *[]){
+--				"usb0_aux_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&usb0_aux_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2628,9 +2574,8 @@ static struct clk_branch gcc_sys_noc_usb
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_sys_noc_usb0_axi_clk",
+--			.parent_names = (const char *[]){
+--				"usb0_master_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&usb0_master_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2645,9 +2590,8 @@ static struct clk_branch gcc_usb0_master
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_usb0_master_clk",
+--			.parent_names = (const char *[]){
+--				"usb0_master_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&usb0_master_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2662,9 +2606,8 @@ static struct clk_branch gcc_usb0_mock_u
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_usb0_mock_utmi_clk",
+--			.parent_names = (const char *[]){
+--				"usb0_mock_utmi_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&usb0_mock_utmi_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2679,9 +2622,8 @@ static struct clk_branch gcc_usb0_phy_cf
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_usb0_phy_cfg_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2697,9 +2639,8 @@ static struct clk_branch gcc_usb0_pipe_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_usb0_pipe_clk",
+--			.parent_names = (const char *[]){
+--				"usb0_pipe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&usb0_pipe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2714,9 +2655,8 @@ static struct clk_branch gcc_usb0_sleep_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_usb0_sleep_clk",
+--			.parent_names = (const char *[]){
+--				"gcc_sleep_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&gcc_sleep_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2731,9 +2671,8 @@ static struct clk_branch gcc_usb1_aux_cl
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_usb1_aux_clk",
+--			.parent_names = (const char *[]){
+--				"usb1_aux_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&usb1_aux_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2748,9 +2687,8 @@ static struct clk_branch gcc_sys_noc_usb
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_sys_noc_usb1_axi_clk",
+--			.parent_names = (const char *[]){
+--				"usb1_master_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&usb1_master_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2765,9 +2703,8 @@ static struct clk_branch gcc_usb1_master
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_usb1_master_clk",
+--			.parent_names = (const char *[]){
+--				"usb1_master_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&usb1_master_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2782,9 +2719,8 @@ static struct clk_branch gcc_usb1_mock_u
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_usb1_mock_utmi_clk",
+--			.parent_names = (const char *[]){
+--				"usb1_mock_utmi_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&usb1_mock_utmi_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2799,9 +2735,8 @@ static struct clk_branch gcc_usb1_phy_cf
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_usb1_phy_cfg_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2817,9 +2752,8 @@ static struct clk_branch gcc_usb1_pipe_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_usb1_pipe_clk",
+--			.parent_names = (const char *[]){
+--				"usb1_pipe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&usb1_pipe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2834,9 +2768,8 @@ static struct clk_branch gcc_usb1_sleep_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_usb1_sleep_clk",
+--			.parent_names = (const char *[]){
+--				"gcc_sleep_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&gcc_sleep_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2851,9 +2784,8 @@ static struct clk_branch gcc_sdcc1_ahb_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_sdcc1_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2868,9 +2800,8 @@ static struct clk_branch gcc_sdcc1_apps_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_sdcc1_apps_clk",
+--			.parent_names = (const char *[]){
+--				"sdcc1_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&sdcc1_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2885,9 +2816,8 @@ static struct clk_branch gcc_sdcc1_ice_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_sdcc1_ice_core_clk",
+--			.parent_names = (const char *[]){
+--				"sdcc1_ice_core_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&sdcc1_ice_core_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2902,9 +2832,8 @@ static struct clk_branch gcc_sdcc2_ahb_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_sdcc2_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2919,9 +2848,8 @@ static struct clk_branch gcc_sdcc2_apps_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_sdcc2_apps_clk",
+--			.parent_names = (const char *[]){
+--				"sdcc2_apps_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&sdcc2_apps_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2936,9 +2864,8 @@ static struct clk_branch gcc_mem_noc_nss
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_mem_noc_nss_axi_clk",
+--			.parent_names = (const char *[]){
+--				"nss_noc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_noc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2953,9 +2880,8 @@ static struct clk_branch gcc_nss_ce_apb_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_ce_apb_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ce_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ce_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2970,9 +2896,8 @@ static struct clk_branch gcc_nss_ce_axi_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_ce_axi_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ce_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ce_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -2987,9 +2912,8 @@ static struct clk_branch gcc_nss_cfg_clk
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_cfg_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3004,9 +2928,8 @@ static struct clk_branch gcc_nss_crypto_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_crypto_clk",
+--			.parent_names = (const char *[]){
+--				"nss_crypto_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_crypto_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3021,9 +2944,8 @@ static struct clk_branch gcc_nss_csr_clk
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_csr_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ce_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ce_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3038,9 +2960,8 @@ static struct clk_branch gcc_nss_edma_cf
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_edma_cfg_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ppe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ppe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3055,9 +2976,8 @@ static struct clk_branch gcc_nss_edma_cl
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_edma_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ppe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ppe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3072,9 +2992,8 @@ static struct clk_branch gcc_nss_imem_cl
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_imem_clk",
+--			.parent_names = (const char *[]){
+--				"nss_imem_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_imem_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3089,9 +3008,8 @@ static struct clk_branch gcc_nss_noc_clk
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_noc_clk",
+--			.parent_names = (const char *[]){
+--				"nss_noc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_noc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3106,9 +3024,8 @@ static struct clk_branch gcc_nss_ppe_btq
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_ppe_btq_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ppe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ppe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3123,9 +3040,8 @@ static struct clk_branch gcc_nss_ppe_cfg
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_ppe_cfg_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ppe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ppe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3140,9 +3056,8 @@ static struct clk_branch gcc_nss_ppe_clk
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_ppe_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ppe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ppe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3157,9 +3072,8 @@ static struct clk_branch gcc_nss_ppe_ipe
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_ppe_ipe_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ppe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ppe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3174,9 +3088,8 @@ static struct clk_branch gcc_nss_ptp_ref
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_ptp_ref_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ppe_cdiv_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ppe_cdiv_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3192,9 +3105,8 @@ static struct clk_branch gcc_crypto_ppe_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_crypto_ppe_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ppe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ppe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3209,9 +3121,8 @@ static struct clk_branch gcc_nssnoc_ce_a
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nssnoc_ce_apb_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ce_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ce_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3226,9 +3137,8 @@ static struct clk_branch gcc_nssnoc_ce_a
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nssnoc_ce_axi_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ce_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ce_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3243,9 +3153,8 @@ static struct clk_branch gcc_nssnoc_cryp
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nssnoc_crypto_clk",
+--			.parent_names = (const char *[]){
+--				"nss_crypto_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_crypto_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3260,9 +3169,8 @@ static struct clk_branch gcc_nssnoc_ppe_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nssnoc_ppe_cfg_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ppe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ppe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3277,9 +3185,8 @@ static struct clk_branch gcc_nssnoc_ppe_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nssnoc_ppe_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ppe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ppe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3294,9 +3201,8 @@ static struct clk_branch gcc_nssnoc_qosg
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nssnoc_qosgen_ref_clk",
+--			.parent_names = (const char *[]){
+--				"gcc_xo_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&gcc_xo_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3311,9 +3217,8 @@ static struct clk_branch gcc_nssnoc_snoc
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nssnoc_snoc_clk",
+--			.parent_names = (const char *[]){
+--				"system_noc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&system_noc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3328,9 +3233,8 @@ static struct clk_branch gcc_nssnoc_time
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nssnoc_timeout_ref_clk",
+--			.parent_names = (const char *[]){
+--				"gcc_xo_div4_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&gcc_xo_div4_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3345,9 +3249,8 @@ static struct clk_branch gcc_nssnoc_ubi0
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nssnoc_ubi0_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ce_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ce_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3362,9 +3265,8 @@ static struct clk_branch gcc_nssnoc_ubi1
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nssnoc_ubi1_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ce_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ce_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3380,9 +3282,8 @@ static struct clk_branch gcc_ubi0_ahb_cl
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_ubi0_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ce_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ce_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3398,9 +3299,8 @@ static struct clk_branch gcc_ubi0_axi_cl
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_ubi0_axi_clk",
+--			.parent_names = (const char *[]){
+--				"nss_noc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_noc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3416,9 +3316,8 @@ static struct clk_branch gcc_ubi0_nc_axi
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_ubi0_nc_axi_clk",
+--			.parent_names = (const char *[]){
+--				"nss_noc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_noc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3434,9 +3333,8 @@ static struct clk_branch gcc_ubi0_core_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_ubi0_core_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ubi0_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ubi0_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3452,9 +3350,8 @@ static struct clk_branch gcc_ubi0_mpt_cl
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_ubi0_mpt_clk",
+--			.parent_names = (const char *[]){
+--				"ubi_mpt_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&ubi_mpt_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3470,9 +3367,8 @@ static struct clk_branch gcc_ubi1_ahb_cl
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_ubi1_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ce_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ce_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3488,9 +3384,8 @@ static struct clk_branch gcc_ubi1_axi_cl
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_ubi1_axi_clk",
+--			.parent_names = (const char *[]){
+--				"nss_noc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_noc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3506,9 +3401,8 @@ static struct clk_branch gcc_ubi1_nc_axi
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_ubi1_nc_axi_clk",
+--			.parent_names = (const char *[]){
+--				"nss_noc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_noc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3524,9 +3418,8 @@ static struct clk_branch gcc_ubi1_core_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_ubi1_core_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ubi1_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ubi1_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3542,9 +3435,8 @@ static struct clk_branch gcc_ubi1_mpt_cl
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_ubi1_mpt_clk",
+--			.parent_names = (const char *[]){
+--				"ubi_mpt_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&ubi_mpt_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3559,9 +3451,8 @@ static struct clk_branch gcc_cmn_12gpll_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_cmn_12gpll_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3576,9 +3467,8 @@ static struct clk_branch gcc_cmn_12gpll_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_cmn_12gpll_sys_clk",
+--			.parent_names = (const char *[]){
+--				"gcc_xo_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&gcc_xo_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3593,9 +3483,8 @@ static struct clk_branch gcc_mdio_ahb_cl
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_mdio_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3610,9 +3499,8 @@ static struct clk_branch gcc_uniphy0_ahb
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy0_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3627,9 +3515,8 @@ static struct clk_branch gcc_uniphy0_sys
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy0_sys_clk",
+--			.parent_names = (const char *[]){
+--				"gcc_xo_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&gcc_xo_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3644,9 +3531,8 @@ static struct clk_branch gcc_uniphy1_ahb
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy1_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3661,9 +3547,8 @@ static struct clk_branch gcc_uniphy1_sys
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy1_sys_clk",
+--			.parent_names = (const char *[]){
+--				"gcc_xo_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&gcc_xo_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3678,9 +3563,8 @@ static struct clk_branch gcc_uniphy2_ahb
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy2_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3695,9 +3579,8 @@ static struct clk_branch gcc_uniphy2_sys
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy2_sys_clk",
+--			.parent_names = (const char *[]){
+--				"gcc_xo_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&gcc_xo_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3712,9 +3595,8 @@ static struct clk_branch gcc_nss_port1_r
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_port1_rx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port1_rx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port1_rx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3729,9 +3611,8 @@ static struct clk_branch gcc_nss_port1_t
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_port1_tx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port1_tx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port1_tx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3746,9 +3627,8 @@ static struct clk_branch gcc_nss_port2_r
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_port2_rx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port2_rx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port2_rx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3763,9 +3643,8 @@ static struct clk_branch gcc_nss_port2_t
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_port2_tx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port2_tx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port2_tx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3780,9 +3659,8 @@ static struct clk_branch gcc_nss_port3_r
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_port3_rx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port3_rx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port3_rx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3797,9 +3675,8 @@ static struct clk_branch gcc_nss_port3_t
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_port3_tx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port3_tx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port3_tx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3814,9 +3691,8 @@ static struct clk_branch gcc_nss_port4_r
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_port4_rx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port4_rx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port4_rx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3831,9 +3707,8 @@ static struct clk_branch gcc_nss_port4_t
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_port4_tx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port4_tx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port4_tx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3848,9 +3723,8 @@ static struct clk_branch gcc_nss_port5_r
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_port5_rx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port5_rx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port5_rx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3865,9 +3739,8 @@ static struct clk_branch gcc_nss_port5_t
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_port5_tx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port5_tx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port5_tx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3882,9 +3755,8 @@ static struct clk_branch gcc_nss_port6_r
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_port6_rx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port6_rx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port6_rx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3899,9 +3771,8 @@ static struct clk_branch gcc_nss_port6_t
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_nss_port6_tx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port6_tx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port6_tx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3916,9 +3787,8 @@ static struct clk_branch gcc_port1_mac_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_port1_mac_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ppe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ppe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3933,9 +3803,8 @@ static struct clk_branch gcc_port2_mac_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_port2_mac_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ppe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ppe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3950,9 +3819,8 @@ static struct clk_branch gcc_port3_mac_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_port3_mac_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ppe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ppe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3967,9 +3835,8 @@ static struct clk_branch gcc_port4_mac_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_port4_mac_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ppe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ppe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -3984,9 +3851,8 @@ static struct clk_branch gcc_port5_mac_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_port5_mac_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ppe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ppe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4001,9 +3867,8 @@ static struct clk_branch gcc_port6_mac_c
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_port6_mac_clk",
+--			.parent_names = (const char *[]){
+--				"nss_ppe_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_ppe_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4018,9 +3883,8 @@ static struct clk_branch gcc_uniphy0_por
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy0_port1_rx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port1_rx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port1_rx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4035,9 +3899,8 @@ static struct clk_branch gcc_uniphy0_por
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy0_port1_tx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port1_tx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port1_tx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4052,9 +3915,8 @@ static struct clk_branch gcc_uniphy0_por
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy0_port2_rx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port2_rx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port2_rx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4069,9 +3931,8 @@ static struct clk_branch gcc_uniphy0_por
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy0_port2_tx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port2_tx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port2_tx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4086,9 +3947,8 @@ static struct clk_branch gcc_uniphy0_por
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy0_port3_rx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port3_rx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port3_rx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4103,9 +3963,8 @@ static struct clk_branch gcc_uniphy0_por
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy0_port3_tx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port3_tx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port3_tx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4120,9 +3979,8 @@ static struct clk_branch gcc_uniphy0_por
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy0_port4_rx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port4_rx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port4_rx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4137,9 +3995,8 @@ static struct clk_branch gcc_uniphy0_por
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy0_port4_tx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port4_tx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port4_tx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4154,9 +4011,8 @@ static struct clk_branch gcc_uniphy0_por
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy0_port5_rx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port5_rx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port5_rx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4171,9 +4027,8 @@ static struct clk_branch gcc_uniphy0_por
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy0_port5_tx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port5_tx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port5_tx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4188,9 +4043,8 @@ static struct clk_branch gcc_uniphy1_por
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy1_port5_rx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port5_rx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port5_rx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4205,9 +4059,8 @@ static struct clk_branch gcc_uniphy1_por
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy1_port5_tx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port5_tx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port5_tx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4222,9 +4075,8 @@ static struct clk_branch gcc_uniphy2_por
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy2_port6_rx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port6_rx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port6_rx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4239,9 +4091,8 @@ static struct clk_branch gcc_uniphy2_por
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_uniphy2_port6_tx_clk",
+--			.parent_names = (const char *[]){
+--				"nss_port6_tx_div_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&nss_port6_tx_div_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4257,9 +4108,8 @@ static struct clk_branch gcc_crypto_ahb_
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_crypto_ahb_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4275,9 +4125,8 @@ static struct clk_branch gcc_crypto_axi_
+- 		.enable_mask = BIT(1),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_crypto_axi_clk",
+--			.parent_names = (const char *[]){
+--				"pcnoc_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&pcnoc_clk_src.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4293,9 +4142,8 @@ static struct clk_branch gcc_crypto_clk
+- 		.enable_mask = BIT(2),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_crypto_clk",
+--			.parent_names = (const char *[]){
+--				"crypto_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&crypto_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4310,9 +4158,8 @@ static struct clk_branch gcc_gp1_clk = {
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_gp1_clk",
+--			.parent_names = (const char *[]){
+--				"gp1_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&gp1_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4327,9 +4174,8 @@ static struct clk_branch gcc_gp2_clk = {
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_gp2_clk",
+--			.parent_names = (const char *[]){
+--				"gp2_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&gp2_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4344,9 +4190,8 @@ static struct clk_branch gcc_gp3_clk = {
+- 		.enable_mask = BIT(0),
+- 		.hw.init = &(struct clk_init_data){
+- 			.name = "gcc_gp3_clk",
+--			.parent_names = (const char *[]){
+--				"gp3_clk_src"
+--			},
+-+			.parent_hws = (const struct clk_hw *[]){
+-+				&gp3_clk_src.clkr.hw },
+- 			.num_parents = 1,
+- 			.flags = CLK_SET_RATE_PARENT,
+- 			.ops = &clk_branch2_ops,
+-@@ -4368,7 +4213,7 @@ static struct clk_rcg2 pcie0_rchng_clk_s
+- 	.clkr.hw.init = &(struct clk_init_data){
+- 		.name = "pcie0_rchng_clk_src",
+- 		.parent_data = gcc_xo_gpll0,
+--		.num_parents = 2,
+-+		.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
+- 		.ops = &clk_rcg2_ops,
+- 	},
+- };
+diff --git a/target/linux/ipq807x/patches-5.15/0048-v6.1-clk-qcom-reset-Allow-specifying-custom-reset-delay.patch b/target/linux/ipq807x/patches-5.15/0048-v6.1-clk-qcom-reset-Allow-specifying-custom-reset-delay.patch
+deleted file mode 100644
+index 6a525f2c3e..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0048-v6.1-clk-qcom-reset-Allow-specifying-custom-reset-delay.patch
++++ /dev/null
+@@ -1,54 +0,0 @@
+-From 72bc31aa621e21a7c36a7da8aa6f6a77bb234e0b Mon Sep 17 00:00:00 2001
+-From: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
+-Date: Wed, 6 Jul 2022 15:41:29 +0200
+-Subject: [PATCH] clk: qcom: reset: Allow specifying custom reset delay
+-
+-The amount of time required between asserting and deasserting the reset
+-signal can vary depending on the involved hardware component. Sometimes
+-1 us might not be enough and a larger delay is necessary to conform to
+-the specifications.
+-
+-Usually this is worked around in the consuming drivers, by replacing
+-reset_control_reset() with a sequence of reset_control_assert(), waiting
+-for a custom delay, followed by reset_control_deassert().
+-
+-However, in some cases the driver making use of the reset is generic and
+-can be used with different reset controllers. In this case the reset
+-time requirement is better handled directly by the reset controller
+-driver.
+-
+-Make this possible by adding an "udelay" field to the qcom_reset_map
+-that allows setting a different reset delay (in microseconds).
+-
+-Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20220706134132.3623415-4-stephan.gerhold@kernkonzept.com
+----
+- drivers/clk/qcom/reset.c | 4 +++-
+- drivers/clk/qcom/reset.h | 1 +
+- 2 files changed, 4 insertions(+), 1 deletion(-)
+-
+---- a/drivers/clk/qcom/reset.c
+-+++ b/drivers/clk/qcom/reset.c
+-@@ -13,8 +13,10 @@
+- 
+- static int qcom_reset(struct reset_controller_dev *rcdev, unsigned long id)
+- {
+-+	struct qcom_reset_controller *rst = to_qcom_reset_controller(rcdev);
+-+
+- 	rcdev->ops->assert(rcdev, id);
+--	udelay(1);
+-+	udelay(rst->reset_map[id].udelay ?: 1); /* use 1 us as default */
+- 	rcdev->ops->deassert(rcdev, id);
+- 	return 0;
+- }
+---- a/drivers/clk/qcom/reset.h
+-+++ b/drivers/clk/qcom/reset.h
+-@@ -11,6 +11,7 @@
+- struct qcom_reset_map {
+- 	unsigned int reg;
+- 	u8 bit;
+-+	u8 udelay;
+- };
+- 
+- struct regmap;
+diff --git a/target/linux/ipq807x/patches-5.15/0049-v6.2-clk-qcom-reset-support-resetting-multiple-bits.patch b/target/linux/ipq807x/patches-5.15/0049-v6.2-clk-qcom-reset-support-resetting-multiple-bits.patch
+deleted file mode 100644
+index e0725a6612..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0049-v6.2-clk-qcom-reset-support-resetting-multiple-bits.patch
++++ /dev/null
+@@ -1,59 +0,0 @@
+-From 813ba3e427671ba3ff35c825087b03f0ad91cf02 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Mon, 7 Nov 2022 14:28:59 +0100
+-Subject: [PATCH] clk: qcom: reset: support resetting multiple bits
+-
+-This patch adds the support for giving the complete bitmask
+-in reset structure and reset operation will use this bitmask
+-for all reset operations.
+-
+-Currently, reset structure only takes a single bit for each reset
+-and then calculates the bitmask by using the BIT() macro.
+-
+-However, this is not sufficient anymore for newer SoC-s like IPQ8074,
+-IPQ6018 and more, since their networking resets require multiple bits
+-to be asserted in order to properly reset the HW block completely.
+-
+-So, in order to allow asserting multiple bits add "bitmask" field to
+-qcom_reset_map, and then use that bitmask value if its populated in the
+-driver, if its not populated, then we just default to existing behaviour
+-and calculate the bitmask on the fly.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20221107132901.489240-1-robimarko@gmail.com
+----
+- drivers/clk/qcom/reset.c | 4 ++--
+- drivers/clk/qcom/reset.h | 1 +
+- 2 files changed, 3 insertions(+), 2 deletions(-)
+-
+---- a/drivers/clk/qcom/reset.c
+-+++ b/drivers/clk/qcom/reset.c
+-@@ -30,7 +30,7 @@ qcom_reset_assert(struct reset_controlle
+- 
+- 	rst = to_qcom_reset_controller(rcdev);
+- 	map = &rst->reset_map[id];
+--	mask = BIT(map->bit);
+-+	mask = map->bitmask ? map->bitmask : BIT(map->bit);
+- 
+- 	return regmap_update_bits(rst->regmap, map->reg, mask, mask);
+- }
+-@@ -44,7 +44,7 @@ qcom_reset_deassert(struct reset_control
+- 
+- 	rst = to_qcom_reset_controller(rcdev);
+- 	map = &rst->reset_map[id];
+--	mask = BIT(map->bit);
+-+	mask = map->bitmask ? map->bitmask : BIT(map->bit);
+- 
+- 	return regmap_update_bits(rst->regmap, map->reg, mask, 0);
+- }
+---- a/drivers/clk/qcom/reset.h
+-+++ b/drivers/clk/qcom/reset.h
+-@@ -12,6 +12,7 @@ struct qcom_reset_map {
+- 	unsigned int reg;
+- 	u8 bit;
+- 	u8 udelay;
+-+	u32 bitmask;
+- };
+- 
+- struct regmap;
+diff --git a/target/linux/ipq807x/patches-5.15/0050-v6.2-dt-bindings-clock-qcom-ipq8074-add-missing-networkin.patch b/target/linux/ipq807x/patches-5.15/0050-v6.2-dt-bindings-clock-qcom-ipq8074-add-missing-networkin.patch
+deleted file mode 100644
+index 75f16a1673..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0050-v6.2-dt-bindings-clock-qcom-ipq8074-add-missing-networkin.patch
++++ /dev/null
+@@ -1,39 +0,0 @@
+-From e78a40eb24187a8b4f9b89e2181f674df39c2013 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Mon, 7 Nov 2022 14:29:00 +0100
+-Subject: [PATCH] dt-bindings: clock: qcom: ipq8074: add missing networking
+- resets
+-
+-Add bindings for the missing networking resets found in IPQ8074 GCC.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20221107132901.489240-2-robimarko@gmail.com
+----
+- include/dt-bindings/clock/qcom,gcc-ipq8074.h | 14 ++++++++++++++
+- 1 file changed, 14 insertions(+)
+-
+---- a/include/dt-bindings/clock/qcom,gcc-ipq8074.h
+-+++ b/include/dt-bindings/clock/qcom,gcc-ipq8074.h
+-@@ -367,6 +367,20 @@
+- #define GCC_PCIE1_AHB_ARES			129
+- #define GCC_PCIE1_AXI_MASTER_STICKY_ARES	130
+- #define GCC_PCIE0_AXI_SLAVE_STICKY_ARES		131
+-+#define GCC_PPE_FULL_RESET			132
+-+#define GCC_UNIPHY0_SOFT_RESET			133
+-+#define GCC_UNIPHY0_XPCS_RESET			134
+-+#define GCC_UNIPHY1_SOFT_RESET			135
+-+#define GCC_UNIPHY1_XPCS_RESET			136
+-+#define GCC_UNIPHY2_SOFT_RESET			137
+-+#define GCC_UNIPHY2_XPCS_RESET			138
+-+#define GCC_EDMA_HW_RESET			139
+-+#define GCC_NSSPORT1_RESET			140
+-+#define GCC_NSSPORT2_RESET			141
+-+#define GCC_NSSPORT3_RESET			142
+-+#define GCC_NSSPORT4_RESET			143
+-+#define GCC_NSSPORT5_RESET			144
+-+#define GCC_NSSPORT6_RESET			145
+- 
+- #define USB0_GDSC				0
+- #define USB1_GDSC				1
+diff --git a/target/linux/ipq807x/patches-5.15/0051-v6.2-clk-qcom-ipq8074-add-missing-networking-resets.patch b/target/linux/ipq807x/patches-5.15/0051-v6.2-clk-qcom-ipq8074-add-missing-networking-resets.patch
+deleted file mode 100644
+index 212fc84869..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0051-v6.2-clk-qcom-ipq8074-add-missing-networking-resets.patch
++++ /dev/null
+@@ -1,41 +0,0 @@
+-From da76cb63d04dc22ed32123b8c1d084c006d67bfb Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Mon, 7 Nov 2022 14:29:01 +0100
+-Subject: [PATCH] clk: qcom: ipq8074: add missing networking resets
+-
+-Downstream QCA 5.4 kernel defines networking resets which are not present
+-in the mainline kernel but are required for the networking drivers.
+-
+-So, port the downstream resets and avoid using magic values for mask,
+-construct mask for resets which require multiple bits to be set/cleared.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20221107132901.489240-3-robimarko@gmail.com
+----
+- drivers/clk/qcom/gcc-ipq8074.c | 14 ++++++++++++++
+- 1 file changed, 14 insertions(+)
+-
+---- a/drivers/clk/qcom/gcc-ipq8074.c
+-+++ b/drivers/clk/qcom/gcc-ipq8074.c
+-@@ -4671,6 +4671,20 @@ static const struct qcom_reset_map gcc_i
+- 	[GCC_PCIE1_AXI_SLAVE_ARES] = { 0x76040, 4 },
+- 	[GCC_PCIE1_AHB_ARES] = { 0x76040, 5 },
+- 	[GCC_PCIE1_AXI_MASTER_STICKY_ARES] = { 0x76040, 6 },
+-+	[GCC_PPE_FULL_RESET] = { .reg = 0x68014, .bitmask = GENMASK(19, 16) },
+-+	[GCC_UNIPHY0_SOFT_RESET] = { .reg = 0x56004, .bitmask = GENMASK(13, 4) | BIT(1) },
+-+	[GCC_UNIPHY0_XPCS_RESET] = { 0x56004, 2 },
+-+	[GCC_UNIPHY1_SOFT_RESET] = { .reg = 0x56104, .bitmask = GENMASK(5, 4) | BIT(1) },
+-+	[GCC_UNIPHY1_XPCS_RESET] = { 0x56104, 2 },
+-+	[GCC_UNIPHY2_SOFT_RESET] = { .reg = 0x56204, .bitmask = GENMASK(5, 4) | BIT(1) },
+-+	[GCC_UNIPHY2_XPCS_RESET] = { 0x56204, 2 },
+-+	[GCC_EDMA_HW_RESET] = { .reg = 0x68014, .bitmask = GENMASK(21, 20) },
+-+	[GCC_NSSPORT1_RESET] = { .reg = 0x68014, .bitmask = BIT(24) | GENMASK(1, 0) },
+-+	[GCC_NSSPORT2_RESET] = { .reg = 0x68014, .bitmask = BIT(25) | GENMASK(3, 2) },
+-+	[GCC_NSSPORT3_RESET] = { .reg = 0x68014, .bitmask = BIT(26) | GENMASK(5, 4) },
+-+	[GCC_NSSPORT4_RESET] = { .reg = 0x68014, .bitmask = BIT(27) | GENMASK(9, 8) },
+-+	[GCC_NSSPORT5_RESET] = { .reg = 0x68014, .bitmask = BIT(28) | GENMASK(11, 10) },
+-+	[GCC_NSSPORT6_RESET] = { .reg = 0x68014, .bitmask = BIT(29) | GENMASK(13, 12) },
+- };
+- 
+- static struct gdsc *gcc_ipq8074_gdscs[] = {
+diff --git a/target/linux/ipq807x/patches-5.15/0052-v6.2-clk-qcom-ipq8074-populate-fw_name-for-all-parents.patch b/target/linux/ipq807x/patches-5.15/0052-v6.2-clk-qcom-ipq8074-populate-fw_name-for-all-parents.patch
+deleted file mode 100644
+index 7372b1da8e..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0052-v6.2-clk-qcom-ipq8074-populate-fw_name-for-all-parents.patch
++++ /dev/null
+@@ -1,152 +0,0 @@
+-From 78936d46470938caa9a7ea529deeb36777b4f98e Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Wed, 16 Nov 2022 22:46:55 +0100
+-Subject: [PATCH] clk: qcom: ipq8074: populate fw_name for all parents
+-
+-It appears that having only .name populated in parent_data for clocks
+-which are only globally searchable currently will not work as the clk core
+-won't copy that name if there is no .fw_name present as well.
+-
+-So, populate .fw_name for all parent clocks in parent_data.
+-
+-Fixes: ae55ad32e273 ("clk: qcom: ipq8074: convert to parent data")
+-
+-Co-developed-by: Christian Marangi <ansuelsmth@gmail.com>
+-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com
+----
+- drivers/clk/qcom/gcc-ipq8074.c | 52 +++++++++++++++++-----------------
+- 1 file changed, 26 insertions(+), 26 deletions(-)
+-
+---- a/drivers/clk/qcom/gcc-ipq8074.c
+-+++ b/drivers/clk/qcom/gcc-ipq8074.c
+-@@ -680,7 +680,7 @@ static struct clk_rcg2 pcie0_aux_clk_src
+- };
+- 
+- static const struct clk_parent_data gcc_pcie20_phy0_pipe_clk_xo[] = {
+--	{ .name = "pcie20_phy0_pipe_clk" },
+-+	{ .fw_name = "pcie0_pipe", .name = "pcie20_phy0_pipe_clk" },
+- 	{ .fw_name = "xo", .name = "xo" },
+- };
+- 
+-@@ -733,7 +733,7 @@ static struct clk_rcg2 pcie1_aux_clk_src
+- };
+- 
+- static const struct clk_parent_data gcc_pcie20_phy1_pipe_clk_xo[] = {
+--	{ .name = "pcie20_phy1_pipe_clk" },
+-+	{ .fw_name = "pcie1_pipe", .name = "pcie20_phy1_pipe_clk" },
+- 	{ .fw_name = "xo", .name = "xo" },
+- };
+- 
+-@@ -1137,7 +1137,7 @@ static const struct freq_tbl ftbl_nss_no
+- 
+- static const struct clk_parent_data gcc_xo_bias_pll_nss_noc_clk_gpll0_gpll2[] = {
+- 	{ .fw_name = "xo", .name = "xo" },
+--	{ .name = "bias_pll_nss_noc_clk" },
+-+	{ .fw_name = "bias_pll_nss_noc_clk", .name = "bias_pll_nss_noc_clk" },
+- 	{ .hw = &gpll0.clkr.hw },
+- 	{ .hw = &gpll2.clkr.hw },
+- };
+-@@ -1362,7 +1362,7 @@ static const struct freq_tbl ftbl_nss_pp
+- 
+- static const struct clk_parent_data gcc_xo_bias_gpll0_gpll4_nss_ubi32[] = {
+- 	{ .fw_name = "xo", .name = "xo" },
+--	{ .name = "bias_pll_cc_clk" },
+-+	{ .fw_name = "bias_pll_cc_clk", .name = "bias_pll_cc_clk" },
+- 	{ .hw = &gpll0.clkr.hw },
+- 	{ .hw = &gpll4.clkr.hw },
+- 	{ .hw = &nss_crypto_pll.clkr.hw },
+-@@ -1413,10 +1413,10 @@ static const struct freq_tbl ftbl_nss_po
+- 
+- static const struct clk_parent_data gcc_xo_uniphy0_rx_tx_ubi32_bias[] = {
+- 	{ .fw_name = "xo", .name = "xo" },
+--	{ .name = "uniphy0_gcc_rx_clk" },
+--	{ .name = "uniphy0_gcc_tx_clk" },
+-+	{ .fw_name = "uniphy0_gcc_rx_clk", .name = "uniphy0_gcc_rx_clk" },
+-+	{ .fw_name = "uniphy0_gcc_tx_clk", .name = "uniphy0_gcc_tx_clk" },
+- 	{ .hw = &ubi32_pll.clkr.hw },
+--	{ .name = "bias_pll_cc_clk" },
+-+	{ .fw_name = "bias_pll_cc_clk", .name = "bias_pll_cc_clk" },
+- };
+- 
+- static const struct parent_map gcc_xo_uniphy0_rx_tx_ubi32_bias_map[] = {
+-@@ -1465,10 +1465,10 @@ static const struct freq_tbl ftbl_nss_po
+- 
+- static const struct clk_parent_data gcc_xo_uniphy0_tx_rx_ubi32_bias[] = {
+- 	{ .fw_name = "xo", .name = "xo" },
+--	{ .name = "uniphy0_gcc_tx_clk" },
+--	{ .name = "uniphy0_gcc_rx_clk" },
+-+	{ .fw_name = "uniphy0_gcc_tx_clk", .name = "uniphy0_gcc_tx_clk" },
+-+	{ .fw_name = "uniphy0_gcc_rx_clk", .name = "uniphy0_gcc_rx_clk" },
+- 	{ .hw = &ubi32_pll.clkr.hw },
+--	{ .name = "bias_pll_cc_clk" },
+-+	{ .fw_name = "bias_pll_cc_clk", .name = "bias_pll_cc_clk" },
+- };
+- 
+- static const struct parent_map gcc_xo_uniphy0_tx_rx_ubi32_bias_map[] = {
+-@@ -1696,12 +1696,12 @@ static const struct freq_tbl ftbl_nss_po
+- 
+- static const struct clk_parent_data gcc_xo_uniphy0_rx_tx_uniphy1_rx_tx_ubi32_bias[] = {
+- 	{ .fw_name = "xo", .name = "xo" },
+--	{ .name = "uniphy0_gcc_rx_clk" },
+--	{ .name = "uniphy0_gcc_tx_clk" },
+--	{ .name = "uniphy1_gcc_rx_clk" },
+--	{ .name = "uniphy1_gcc_tx_clk" },
+-+	{ .fw_name = "uniphy0_gcc_rx_clk", .name = "uniphy0_gcc_rx_clk" },
+-+	{ .fw_name = "uniphy0_gcc_tx_clk", .name = "uniphy0_gcc_tx_clk" },
+-+	{ .fw_name = "uniphy1_gcc_rx_clk", .name = "uniphy1_gcc_rx_clk" },
+-+	{ .fw_name = "uniphy1_gcc_tx_clk", .name = "uniphy1_gcc_tx_clk" },
+- 	{ .hw = &ubi32_pll.clkr.hw },
+--	{ .name = "bias_pll_cc_clk" },
+-+	{ .fw_name = "bias_pll_cc_clk", .name = "bias_pll_cc_clk" },
+- };
+- 
+- static const struct parent_map
+-@@ -1758,12 +1758,12 @@ static const struct freq_tbl ftbl_nss_po
+- 
+- static const struct clk_parent_data gcc_xo_uniphy0_tx_rx_uniphy1_tx_rx_ubi32_bias[] = {
+- 	{ .fw_name = "xo", .name = "xo" },
+--	{ .name = "uniphy0_gcc_tx_clk" },
+--	{ .name = "uniphy0_gcc_rx_clk" },
+--	{ .name = "uniphy1_gcc_tx_clk" },
+--	{ .name = "uniphy1_gcc_rx_clk" },
+-+	{ .fw_name = "uniphy0_gcc_tx_clk", .name = "uniphy0_gcc_tx_clk" },
+-+	{ .fw_name = "uniphy0_gcc_rx_clk", .name = "uniphy0_gcc_rx_clk" },
+-+	{ .fw_name = "uniphy1_gcc_tx_clk", .name = "uniphy1_gcc_tx_clk" },
+-+	{ .fw_name = "uniphy1_gcc_rx_clk", .name = "uniphy1_gcc_rx_clk" },
+- 	{ .hw = &ubi32_pll.clkr.hw },
+--	{ .name = "bias_pll_cc_clk" },
+-+	{ .fw_name = "bias_pll_cc_clk", .name = "bias_pll_cc_clk" },
+- };
+- 
+- static const struct parent_map
+-@@ -1820,10 +1820,10 @@ static const struct freq_tbl ftbl_nss_po
+- 
+- static const struct clk_parent_data gcc_xo_uniphy2_rx_tx_ubi32_bias[] = {
+- 	{ .fw_name = "xo", .name = "xo" },
+--	{ .name = "uniphy2_gcc_rx_clk" },
+--	{ .name = "uniphy2_gcc_tx_clk" },
+-+	{ .fw_name = "uniphy2_gcc_rx_clk", .name = "uniphy2_gcc_rx_clk" },
+-+	{ .fw_name = "uniphy2_gcc_tx_clk", .name = "uniphy2_gcc_tx_clk" },
+- 	{ .hw = &ubi32_pll.clkr.hw },
+--	{ .name = "bias_pll_cc_clk" },
+-+	{ .fw_name = "bias_pll_cc_clk", .name = "bias_pll_cc_clk" },
+- };
+- 
+- static const struct parent_map gcc_xo_uniphy2_rx_tx_ubi32_bias_map[] = {
+-@@ -1877,10 +1877,10 @@ static const struct freq_tbl ftbl_nss_po
+- 
+- static const struct clk_parent_data gcc_xo_uniphy2_tx_rx_ubi32_bias[] = {
+- 	{ .fw_name = "xo", .name = "xo" },
+--	{ .name = "uniphy2_gcc_tx_clk" },
+--	{ .name = "uniphy2_gcc_rx_clk" },
+-+	{ .fw_name = "uniphy2_gcc_tx_clk", .name = "uniphy2_gcc_tx_clk" },
+-+	{ .fw_name = "uniphy2_gcc_rx_clk", .name = "uniphy2_gcc_rx_clk" },
+- 	{ .hw = &ubi32_pll.clkr.hw },
+--	{ .name = "bias_pll_cc_clk" },
+-+	{ .fw_name = "bias_pll_cc_clk", .name = "bias_pll_cc_clk" },
+- };
+- 
+- static const struct parent_map gcc_xo_uniphy2_tx_rx_ubi32_bias_map[] = {
+diff --git a/target/linux/ipq807x/patches-5.15/0053-v6.2-arm64-dts-qcom-ipq8074-pass-XO-and-sleep-clocks-to-G.patch b/target/linux/ipq807x/patches-5.15/0053-v6.2-arm64-dts-qcom-ipq8074-pass-XO-and-sleep-clocks-to-G.patch
+deleted file mode 100644
+index 1f99de002b..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0053-v6.2-arm64-dts-qcom-ipq8074-pass-XO-and-sleep-clocks-to-G.patch
++++ /dev/null
+@@ -1,36 +0,0 @@
+-From 9033c3c86ea0dd35bd2ab957317573b755967298 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Sun, 30 Oct 2022 18:57:03 +0100
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: pass XO and sleep clocks to GCC
+-
+-Pass XO and sleep clocks to the GCC controller so it does not have to
+-find them by matching globaly by name.
+-
+-If not passed directly, driver maintains backwards compatibility by then
+-falling back to global lookup.
+-
+-Since we are here, set cell numbers in decimal instead of hex.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20221030175703.1103224-3-robimarko@gmail.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 6 ++++--
+- 1 file changed, 4 insertions(+), 2 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -361,9 +361,11 @@
+- 		gcc: gcc@1800000 {
+- 			compatible = "qcom,gcc-ipq8074";
+- 			reg = <0x01800000 0x80000>;
+--			#clock-cells = <0x1>;
+-+			clocks = <&xo>, <&sleep_clk>;
+-+			clock-names = "xo", "sleep_clk";
+-+			#clock-cells = <1>;
+- 			#power-domain-cells = <1>;
+--			#reset-cells = <0x1>;
+-+			#reset-cells = <1>;
+- 		};
+- 
+- 		tcsr_mutex: hwlock@1905000 {
+diff --git a/target/linux/ipq807x/patches-5.15/0054-v6.1-arm64-dts-qcom-replace-deprecated-perst-gpio-with-pe.patch b/target/linux/ipq807x/patches-5.15/0054-v6.1-arm64-dts-qcom-replace-deprecated-perst-gpio-with-pe.patch
+deleted file mode 100644
+index 35f4676a15..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0054-v6.1-arm64-dts-qcom-replace-deprecated-perst-gpio-with-pe.patch
++++ /dev/null
+@@ -1,52 +0,0 @@
+-From 0afa47c1b57ba645225b38654869a6e5d2939da5 Mon Sep 17 00:00:00 2001
+-From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+-Date: Fri, 6 May 2022 18:21:07 +0300
+-Subject: [PATCH] arm64: dts: qcom: replace deprecated perst-gpio with
+- perst-gpios
+-
+-Replace deprecated perst-gpio and wake-gpio properties with up-to-date
+-perst-gpios and wake-gpios in the Qualcomm device trees.
+-
+-Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20220506152107.1527552-9-dmitry.baryshkov@linaro.org
+----
+- arch/arm64/boot/dts/qcom/ipq8074-hk01.dts  | 4 ++--
+- arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi | 4 ++--
+- 2 files changed, 4 insertions(+), 4 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+-@@ -49,12 +49,12 @@
+- 
+- &pcie0 {
+- 	status = "okay";
+--	perst-gpio = <&tlmm 61 0x1>;
+-+	perst-gpios = <&tlmm 61 0x1>;
+- };
+- 
+- &pcie1 {
+- 	status = "okay";
+--	perst-gpio = <&tlmm 58 0x1>;
+-+	perst-gpios = <&tlmm 58 0x1>;
+- };
+- 
+- &pcie_qmp0 {
+---- a/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi
+-@@ -39,12 +39,12 @@
+- 
+- &pcie0 {
+- 	status = "ok";
+--	perst-gpio = <&tlmm 58 0x1>;
+-+	perst-gpios = <&tlmm 58 0x1>;
+- };
+- 
+- &pcie1 {
+- 	status = "ok";
+--	perst-gpio = <&tlmm 61 0x1>;
+-+	perst-gpios = <&tlmm 61 0x1>;
+- };
+- 
+- &pcie_phy0 {
+diff --git a/target/linux/ipq807x/patches-5.15/0055-v6.0-spmi-add-a-helper-to-look-up-an-SPMI-device-from-a-d.patch b/target/linux/ipq807x/patches-5.15/0055-v6.0-spmi-add-a-helper-to-look-up-an-SPMI-device-from-a-d.patch
+deleted file mode 100644
+index 61aeb0b029..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0055-v6.0-spmi-add-a-helper-to-look-up-an-SPMI-device-from-a-d.patch
++++ /dev/null
+@@ -1,57 +0,0 @@
+-From 0eda4c5c7704363f665f4ccf0327349faad245a4 Mon Sep 17 00:00:00 2001
+-From: Caleb Connolly <caleb.connolly@linaro.org>
+-Date: Fri, 29 Apr 2022 23:08:56 +0100
+-Subject: [PATCH] spmi: add a helper to look up an SPMI device from a device
+- node
+-
+-The helper function spmi_device_from_of() takes a device node and
+-returns the SPMI device associated with it.
+-This is like of_find_device_by_node but for SPMI devices.
+-
+-Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
+-Acked-by: Stephen Boyd <sboyd@kernel.org>
+-Link: https://lore.kernel.org/r/20220429220904.137297-2-caleb.connolly@linaro.org
+-Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+----
+- drivers/spmi/spmi.c  | 17 +++++++++++++++++
+- include/linux/spmi.h |  3 +++
+- 2 files changed, 20 insertions(+)
+-
+---- a/drivers/spmi/spmi.c
+-+++ b/drivers/spmi/spmi.c
+-@@ -388,6 +388,23 @@ static struct bus_type spmi_bus_type = {
+- };
+- 
+- /**
+-+ * spmi_device_from_of() - get the associated SPMI device from a device node
+-+ *
+-+ * @np:		device node
+-+ *
+-+ * Returns the struct spmi_device associated with a device node or NULL.
+-+ */
+-+struct spmi_device *spmi_device_from_of(struct device_node *np)
+-+{
+-+	struct device *dev = bus_find_device_by_of_node(&spmi_bus_type, np);
+-+
+-+	if (dev)
+-+		return to_spmi_device(dev);
+-+	return NULL;
+-+}
+-+EXPORT_SYMBOL_GPL(spmi_device_from_of);
+-+
+-+/**
+-  * spmi_controller_alloc() - Allocate a new SPMI device
+-  * @ctrl:	associated controller
+-  *
+---- a/include/linux/spmi.h
+-+++ b/include/linux/spmi.h
+-@@ -164,6 +164,9 @@ static inline void spmi_driver_unregiste
+- 	module_driver(__spmi_driver, spmi_driver_register, \
+- 			spmi_driver_unregister)
+- 
+-+struct device_node;
+-+
+-+struct spmi_device *spmi_device_from_of(struct device_node *np);
+- int spmi_register_read(struct spmi_device *sdev, u8 addr, u8 *buf);
+- int spmi_ext_register_read(struct spmi_device *sdev, u8 addr, u8 *buf,
+- 			   size_t len);
+diff --git a/target/linux/ipq807x/patches-5.15/0056-v5.16-mfd-qcom-spmi-pmic-Sort-compatibles-in-the-driver.patch b/target/linux/ipq807x/patches-5.15/0056-v5.16-mfd-qcom-spmi-pmic-Sort-compatibles-in-the-driver.patch
+deleted file mode 100644
+index 02a37aa376..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0056-v5.16-mfd-qcom-spmi-pmic-Sort-compatibles-in-the-driver.patch
++++ /dev/null
+@@ -1,60 +0,0 @@
+-From 60df90d6829d16338e2971420220395cfc289247 Mon Sep 17 00:00:00 2001
+-From: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Date: Sun, 17 Oct 2021 09:12:16 -0700
+-Subject: [PATCH] mfd: qcom-spmi-pmic: Sort compatibles in the driver
+-
+-Sort the compatibles in the driver, to make it easier to validate that
+-the DT binding and driver are in sync.
+-
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Signed-off-by: Lee Jones <lee.jones@linaro.org>
+-Link: https://lore.kernel.org/r/20211017161218.2378176-2-bjorn.andersson@linaro.org
+----
+- drivers/mfd/qcom-spmi-pmic.c | 30 +++++++++++++++---------------
+- 1 file changed, 15 insertions(+), 15 deletions(-)
+-
+---- a/drivers/mfd/qcom-spmi-pmic.c
+-+++ b/drivers/mfd/qcom-spmi-pmic.c
+-@@ -40,27 +40,27 @@
+- #define PM660_SUBTYPE		0x1B
+- 
+- static const struct of_device_id pmic_spmi_id_table[] = {
+--	{ .compatible = "qcom,spmi-pmic", .data = (void *)COMMON_SUBTYPE },
+--	{ .compatible = "qcom,pm8941",    .data = (void *)PM8941_SUBTYPE },
+--	{ .compatible = "qcom,pm8841",    .data = (void *)PM8841_SUBTYPE },
+-+	{ .compatible = "qcom,pm660",     .data = (void *)PM660_SUBTYPE },
+-+	{ .compatible = "qcom,pm660l",    .data = (void *)PM660L_SUBTYPE },
+-+	{ .compatible = "qcom,pm8004",    .data = (void *)PM8004_SUBTYPE },
+-+	{ .compatible = "qcom,pm8005",    .data = (void *)PM8005_SUBTYPE },
+- 	{ .compatible = "qcom,pm8019",    .data = (void *)PM8019_SUBTYPE },
+--	{ .compatible = "qcom,pm8226",    .data = (void *)PM8226_SUBTYPE },
+- 	{ .compatible = "qcom,pm8110",    .data = (void *)PM8110_SUBTYPE },
+--	{ .compatible = "qcom,pma8084",   .data = (void *)PMA8084_SUBTYPE },
+--	{ .compatible = "qcom,pmi8962",   .data = (void *)PMI8962_SUBTYPE },
+--	{ .compatible = "qcom,pmd9635",   .data = (void *)PMD9635_SUBTYPE },
+--	{ .compatible = "qcom,pm8994",    .data = (void *)PM8994_SUBTYPE },
+--	{ .compatible = "qcom,pmi8994",   .data = (void *)PMI8994_SUBTYPE },
+--	{ .compatible = "qcom,pm8916",    .data = (void *)PM8916_SUBTYPE },
+--	{ .compatible = "qcom,pm8004",    .data = (void *)PM8004_SUBTYPE },
+-+	{ .compatible = "qcom,pm8226",    .data = (void *)PM8226_SUBTYPE },
+-+	{ .compatible = "qcom,pm8841",    .data = (void *)PM8841_SUBTYPE },
+- 	{ .compatible = "qcom,pm8909",    .data = (void *)PM8909_SUBTYPE },
+-+	{ .compatible = "qcom,pm8916",    .data = (void *)PM8916_SUBTYPE },
+-+	{ .compatible = "qcom,pm8941",    .data = (void *)PM8941_SUBTYPE },
+- 	{ .compatible = "qcom,pm8950",    .data = (void *)PM8950_SUBTYPE },
+--	{ .compatible = "qcom,pmi8950",   .data = (void *)PMI8950_SUBTYPE },
+-+	{ .compatible = "qcom,pm8994",    .data = (void *)PM8994_SUBTYPE },
+- 	{ .compatible = "qcom,pm8998",    .data = (void *)PM8998_SUBTYPE },
+-+	{ .compatible = "qcom,pma8084",   .data = (void *)PMA8084_SUBTYPE },
+-+	{ .compatible = "qcom,pmd9635",   .data = (void *)PMD9635_SUBTYPE },
+-+	{ .compatible = "qcom,pmi8950",   .data = (void *)PMI8950_SUBTYPE },
+-+	{ .compatible = "qcom,pmi8962",   .data = (void *)PMI8962_SUBTYPE },
+-+	{ .compatible = "qcom,pmi8994",   .data = (void *)PMI8994_SUBTYPE },
+- 	{ .compatible = "qcom,pmi8998",   .data = (void *)PMI8998_SUBTYPE },
+--	{ .compatible = "qcom,pm8005",    .data = (void *)PM8005_SUBTYPE },
+--	{ .compatible = "qcom,pm660l",    .data = (void *)PM660L_SUBTYPE },
+--	{ .compatible = "qcom,pm660",     .data = (void *)PM660_SUBTYPE },
+-+	{ .compatible = "qcom,spmi-pmic", .data = (void *)COMMON_SUBTYPE },
+- 	{ }
+- };
+- 
+diff --git a/target/linux/ipq807x/patches-5.15/0057-v5.16-mfd-qcom-spmi-pmic-Add-missing-PMICs-supported-by-so.patch b/target/linux/ipq807x/patches-5.15/0057-v5.16-mfd-qcom-spmi-pmic-Add-missing-PMICs-supported-by-so.patch
+deleted file mode 100644
+index c2b3e8304d..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0057-v5.16-mfd-qcom-spmi-pmic-Add-missing-PMICs-supported-by-so.patch
++++ /dev/null
+@@ -1,65 +0,0 @@
+-From 18921bfd81c88fb85a19683467f680897672f062 Mon Sep 17 00:00:00 2001
+-From: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Date: Sun, 17 Oct 2021 09:12:18 -0700
+-Subject: [PATCH] mfd: qcom-spmi-pmic: Add missing PMICs supported by socinfo
+-
+-The Qualcomm socinfo driver has eight more PMICs described, add these to
+-the SPMI PMIC driver as well.
+-
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Signed-off-by: Lee Jones <lee.jones@linaro.org>
+-Link: https://lore.kernel.org/r/20211017161218.2378176-4-bjorn.andersson@linaro.org
+----
+- drivers/mfd/qcom-spmi-pmic.c | 17 +++++++++++++++++
+- 1 file changed, 17 insertions(+)
+-
+---- a/drivers/mfd/qcom-spmi-pmic.c
+-+++ b/drivers/mfd/qcom-spmi-pmic.c
+-@@ -31,6 +31,8 @@
+- #define PM8916_SUBTYPE		0x0b
+- #define PM8004_SUBTYPE		0x0c
+- #define PM8909_SUBTYPE		0x0d
+-+#define PM8028_SUBTYPE		0x0e
+-+#define PM8901_SUBTYPE		0x0f
+- #define PM8950_SUBTYPE		0x10
+- #define PMI8950_SUBTYPE		0x11
+- #define PM8998_SUBTYPE		0x14
+-@@ -38,6 +40,13 @@
+- #define PM8005_SUBTYPE		0x18
+- #define PM660L_SUBTYPE		0x1A
+- #define PM660_SUBTYPE		0x1B
+-+#define PM8150_SUBTYPE		0x1E
+-+#define PM8150L_SUBTYPE		0x1f
+-+#define PM8150B_SUBTYPE		0x20
+-+#define PMK8002_SUBTYPE		0x21
+-+#define PM8009_SUBTYPE		0x24
+-+#define PM8150C_SUBTYPE		0x26
+-+#define SMB2351_SUBTYPE		0x29
+- 
+- static const struct of_device_id pmic_spmi_id_table[] = {
+- 	{ .compatible = "qcom,pm660",     .data = (void *)PM660_SUBTYPE },
+-@@ -45,9 +54,15 @@ static const struct of_device_id pmic_sp
+- 	{ .compatible = "qcom,pm8004",    .data = (void *)PM8004_SUBTYPE },
+- 	{ .compatible = "qcom,pm8005",    .data = (void *)PM8005_SUBTYPE },
+- 	{ .compatible = "qcom,pm8019",    .data = (void *)PM8019_SUBTYPE },
+-+	{ .compatible = "qcom,pm8028",    .data = (void *)PM8028_SUBTYPE },
+- 	{ .compatible = "qcom,pm8110",    .data = (void *)PM8110_SUBTYPE },
+-+	{ .compatible = "qcom,pm8150",    .data = (void *)PM8150_SUBTYPE },
+-+	{ .compatible = "qcom,pm8150b",   .data = (void *)PM8150B_SUBTYPE },
+-+	{ .compatible = "qcom,pm8150c",   .data = (void *)PM8150C_SUBTYPE },
+-+	{ .compatible = "qcom,pm8150l",   .data = (void *)PM8150L_SUBTYPE },
+- 	{ .compatible = "qcom,pm8226",    .data = (void *)PM8226_SUBTYPE },
+- 	{ .compatible = "qcom,pm8841",    .data = (void *)PM8841_SUBTYPE },
+-+	{ .compatible = "qcom,pm8901",    .data = (void *)PM8901_SUBTYPE },
+- 	{ .compatible = "qcom,pm8909",    .data = (void *)PM8909_SUBTYPE },
+- 	{ .compatible = "qcom,pm8916",    .data = (void *)PM8916_SUBTYPE },
+- 	{ .compatible = "qcom,pm8941",    .data = (void *)PM8941_SUBTYPE },
+-@@ -60,6 +75,8 @@ static const struct of_device_id pmic_sp
+- 	{ .compatible = "qcom,pmi8962",   .data = (void *)PMI8962_SUBTYPE },
+- 	{ .compatible = "qcom,pmi8994",   .data = (void *)PMI8994_SUBTYPE },
+- 	{ .compatible = "qcom,pmi8998",   .data = (void *)PMI8998_SUBTYPE },
+-+	{ .compatible = "qcom,pmk8002",   .data = (void *)PMK8002_SUBTYPE },
+-+	{ .compatible = "qcom,smb2351",   .data = (void *)SMB2351_SUBTYPE },
+- 	{ .compatible = "qcom,spmi-pmic", .data = (void *)COMMON_SUBTYPE },
+- 	{ }
+- };
+diff --git a/target/linux/ipq807x/patches-5.15/0058-v6.0-mfd-qcom-spmi-pmic-expose-the-PMIC-revid-information.patch b/target/linux/ipq807x/patches-5.15/0058-v6.0-mfd-qcom-spmi-pmic-expose-the-PMIC-revid-information.patch
+deleted file mode 100644
+index 35e0cc6725..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0058-v6.0-mfd-qcom-spmi-pmic-expose-the-PMIC-revid-information.patch
++++ /dev/null
+@@ -1,417 +0,0 @@
+-From 231f6a9f24a5e9b6e7af801ca2377970474cdf59 Mon Sep 17 00:00:00 2001
+-From: Caleb Connolly <caleb.connolly@linaro.org>
+-Date: Fri, 29 Apr 2022 23:08:57 +0100
+-Subject: [PATCH] mfd: qcom-spmi-pmic: expose the PMIC revid information to
+- clients
+-
+-Some PMIC functions such as the RRADC need to be aware of the PMIC
+-chip revision information to implement errata or otherwise adjust
+-behaviour, export the PMIC information to enable this.
+-
+-This is specifically required to enable the RRADC to adjust
+-coefficients based on which chip fab the PMIC was produced in,
+-this can vary per unique device and therefore has to be read at
+-runtime.
+-
+-Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
+-Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+-Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+-Acked-by: Lee Jones <lee.jones@linaro.org>
+-Link: https://lore.kernel.org/r/20220429220904.137297-3-caleb.connolly@linaro.org
+-Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+----
+- drivers/mfd/qcom-spmi-pmic.c      | 265 ++++++++++++++++++++----------
+- include/soc/qcom/qcom-spmi-pmic.h |  60 +++++++
+- 2 files changed, 235 insertions(+), 90 deletions(-)
+- create mode 100644 include/soc/qcom/qcom-spmi-pmic.h
+-
+---- a/drivers/mfd/qcom-spmi-pmic.c
+-+++ b/drivers/mfd/qcom-spmi-pmic.c
+-@@ -3,11 +3,16 @@
+-  * Copyright (c) 2014, The Linux Foundation. All rights reserved.
+-  */
+- 
+-+#include <linux/device.h>
+-+#include <linux/errno.h>
+-+#include <linux/gfp.h>
+- #include <linux/kernel.h>
+- #include <linux/module.h>
+- #include <linux/spmi.h>
+-+#include <linux/types.h>
+- #include <linux/regmap.h>
+- #include <linux/of_platform.h>
+-+#include <soc/qcom/qcom-spmi-pmic.h>
+- 
+- #define PMIC_REV2		0x101
+- #define PMIC_REV3		0x102
+-@@ -17,106 +22,140 @@
+- 
+- #define PMIC_TYPE_VALUE		0x51
+- 
+--#define COMMON_SUBTYPE		0x00
+--#define PM8941_SUBTYPE		0x01
+--#define PM8841_SUBTYPE		0x02
+--#define PM8019_SUBTYPE		0x03
+--#define PM8226_SUBTYPE		0x04
+--#define PM8110_SUBTYPE		0x05
+--#define PMA8084_SUBTYPE		0x06
+--#define PMI8962_SUBTYPE		0x07
+--#define PMD9635_SUBTYPE		0x08
+--#define PM8994_SUBTYPE		0x09
+--#define PMI8994_SUBTYPE		0x0a
+--#define PM8916_SUBTYPE		0x0b
+--#define PM8004_SUBTYPE		0x0c
+--#define PM8909_SUBTYPE		0x0d
+--#define PM8028_SUBTYPE		0x0e
+--#define PM8901_SUBTYPE		0x0f
+--#define PM8950_SUBTYPE		0x10
+--#define PMI8950_SUBTYPE		0x11
+--#define PM8998_SUBTYPE		0x14
+--#define PMI8998_SUBTYPE		0x15
+--#define PM8005_SUBTYPE		0x18
+--#define PM660L_SUBTYPE		0x1A
+--#define PM660_SUBTYPE		0x1B
+--#define PM8150_SUBTYPE		0x1E
+--#define PM8150L_SUBTYPE		0x1f
+--#define PM8150B_SUBTYPE		0x20
+--#define PMK8002_SUBTYPE		0x21
+--#define PM8009_SUBTYPE		0x24
+--#define PM8150C_SUBTYPE		0x26
+--#define SMB2351_SUBTYPE		0x29
+-+#define PMIC_REV4_V2		0x02
+-+
+-+struct qcom_spmi_dev {
+-+	int num_usids;
+-+	struct qcom_spmi_pmic pmic;
+-+};
+-+
+-+#define N_USIDS(n)		((void *)n)
+- 
+- static const struct of_device_id pmic_spmi_id_table[] = {
+--	{ .compatible = "qcom,pm660",     .data = (void *)PM660_SUBTYPE },
+--	{ .compatible = "qcom,pm660l",    .data = (void *)PM660L_SUBTYPE },
+--	{ .compatible = "qcom,pm8004",    .data = (void *)PM8004_SUBTYPE },
+--	{ .compatible = "qcom,pm8005",    .data = (void *)PM8005_SUBTYPE },
+--	{ .compatible = "qcom,pm8019",    .data = (void *)PM8019_SUBTYPE },
+--	{ .compatible = "qcom,pm8028",    .data = (void *)PM8028_SUBTYPE },
+--	{ .compatible = "qcom,pm8110",    .data = (void *)PM8110_SUBTYPE },
+--	{ .compatible = "qcom,pm8150",    .data = (void *)PM8150_SUBTYPE },
+--	{ .compatible = "qcom,pm8150b",   .data = (void *)PM8150B_SUBTYPE },
+--	{ .compatible = "qcom,pm8150c",   .data = (void *)PM8150C_SUBTYPE },
+--	{ .compatible = "qcom,pm8150l",   .data = (void *)PM8150L_SUBTYPE },
+--	{ .compatible = "qcom,pm8226",    .data = (void *)PM8226_SUBTYPE },
+--	{ .compatible = "qcom,pm8841",    .data = (void *)PM8841_SUBTYPE },
+--	{ .compatible = "qcom,pm8901",    .data = (void *)PM8901_SUBTYPE },
+--	{ .compatible = "qcom,pm8909",    .data = (void *)PM8909_SUBTYPE },
+--	{ .compatible = "qcom,pm8916",    .data = (void *)PM8916_SUBTYPE },
+--	{ .compatible = "qcom,pm8941",    .data = (void *)PM8941_SUBTYPE },
+--	{ .compatible = "qcom,pm8950",    .data = (void *)PM8950_SUBTYPE },
+--	{ .compatible = "qcom,pm8994",    .data = (void *)PM8994_SUBTYPE },
+--	{ .compatible = "qcom,pm8998",    .data = (void *)PM8998_SUBTYPE },
+--	{ .compatible = "qcom,pma8084",   .data = (void *)PMA8084_SUBTYPE },
+--	{ .compatible = "qcom,pmd9635",   .data = (void *)PMD9635_SUBTYPE },
+--	{ .compatible = "qcom,pmi8950",   .data = (void *)PMI8950_SUBTYPE },
+--	{ .compatible = "qcom,pmi8962",   .data = (void *)PMI8962_SUBTYPE },
+--	{ .compatible = "qcom,pmi8994",   .data = (void *)PMI8994_SUBTYPE },
+--	{ .compatible = "qcom,pmi8998",   .data = (void *)PMI8998_SUBTYPE },
+--	{ .compatible = "qcom,pmk8002",   .data = (void *)PMK8002_SUBTYPE },
+--	{ .compatible = "qcom,smb2351",   .data = (void *)SMB2351_SUBTYPE },
+--	{ .compatible = "qcom,spmi-pmic", .data = (void *)COMMON_SUBTYPE },
+-+	{ .compatible = "qcom,pm660", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm660l", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8004", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8005", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8019", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8028", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8110", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8150", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8150b", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8150c", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8150l", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8226", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8841", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8901", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8909", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8916", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8941", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8950", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8994", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pm8998", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pma8084", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pmd9635", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pmi8950", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pmi8962", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pmi8994", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pmi8998", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pmk8002", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,smb2351", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,spmi-pmic", .data = N_USIDS(1) },
+- 	{ }
+- };
+- 
+--static void pmic_spmi_show_revid(struct regmap *map, struct device *dev)
+-+/*
+-+ * A PMIC can be represented by multiple SPMI devices, but
+-+ * only the base PMIC device will contain a reference to
+-+ * the revision information.
+-+ *
+-+ * This function takes a pointer to a pmic device and
+-+ * returns a pointer to the base PMIC device.
+-+ *
+-+ * This only supports PMICs with 1 or 2 USIDs.
+-+ */
+-+static struct spmi_device *qcom_pmic_get_base_usid(struct device *dev)
+- {
+--	unsigned int rev2, minor, major, type, subtype;
+--	const char *name = "unknown";
+--	int ret, i;
+-+	struct spmi_device *sdev;
+-+	struct qcom_spmi_dev *ctx;
+-+	struct device_node *spmi_bus;
+-+	struct device_node *other_usid = NULL;
+-+	int function_parent_usid, ret;
+-+	u32 pmic_addr;
+- 
+--	ret = regmap_read(map, PMIC_TYPE, &type);
+--	if (ret < 0)
+--		return;
+-+	sdev = to_spmi_device(dev);
+-+	ctx = dev_get_drvdata(&sdev->dev);
+- 
+--	if (type != PMIC_TYPE_VALUE)
+--		return;
+-+	/*
+-+	 * Quick return if the function device is already in the base
+-+	 * USID. This will always be hit for PMICs with only 1 USID.
+-+	 */
+-+	if (sdev->usid % ctx->num_usids == 0)
+-+		return sdev;
+- 
+--	ret = regmap_read(map, PMIC_SUBTYPE, &subtype);
+-+	function_parent_usid = sdev->usid;
+-+
+-+	/*
+-+	 * Walk through the list of PMICs until we find the sibling USID.
+-+	 * The goal is to find the first USID which is less than the
+-+	 * number of USIDs in the PMIC array, e.g. for a PMIC with 2 USIDs
+-+	 * where the function device is under USID 3, we want to find the
+-+	 * device for USID 2.
+-+	 */
+-+	spmi_bus = of_get_parent(sdev->dev.of_node);
+-+	do {
+-+		other_usid = of_get_next_child(spmi_bus, other_usid);
+-+
+-+		ret = of_property_read_u32_index(other_usid, "reg", 0, &pmic_addr);
+-+		if (ret)
+-+			return ERR_PTR(ret);
+-+
+-+		sdev = spmi_device_from_of(other_usid);
+-+		if (pmic_addr == function_parent_usid - (ctx->num_usids - 1)) {
+-+			if (!sdev)
+-+				/*
+-+				 * If the base USID for this PMIC hasn't probed yet
+-+				 * but the secondary USID has, then we need to defer
+-+				 * the function driver so that it will attempt to
+-+				 * probe again when the base USID is ready.
+-+				 */
+-+				return ERR_PTR(-EPROBE_DEFER);
+-+			return sdev;
+-+		}
+-+	} while (other_usid->sibling);
+-+
+-+	return ERR_PTR(-ENODATA);
+-+}
+-+
+-+static int pmic_spmi_load_revid(struct regmap *map, struct device *dev,
+-+				 struct qcom_spmi_pmic *pmic)
+-+{
+-+	int ret;
+-+
+-+	ret = regmap_read(map, PMIC_TYPE, &pmic->type);
+- 	if (ret < 0)
+--		return;
+-+		return ret;
+- 
+--	for (i = 0; i < ARRAY_SIZE(pmic_spmi_id_table); i++) {
+--		if (subtype == (unsigned long)pmic_spmi_id_table[i].data)
+--			break;
+--	}
+-+	if (pmic->type != PMIC_TYPE_VALUE)
+-+		return ret;
+- 
+--	if (i != ARRAY_SIZE(pmic_spmi_id_table))
+--		name = pmic_spmi_id_table[i].compatible;
+-+	ret = regmap_read(map, PMIC_SUBTYPE, &pmic->subtype);
+-+	if (ret < 0)
+-+		return ret;
+- 
+--	ret = regmap_read(map, PMIC_REV2, &rev2);
+-+	pmic->name = of_match_device(pmic_spmi_id_table, dev)->compatible;
+-+
+-+	ret = regmap_read(map, PMIC_REV2, &pmic->rev2);
+- 	if (ret < 0)
+--		return;
+-+		return ret;
+- 
+--	ret = regmap_read(map, PMIC_REV3, &minor);
+-+	ret = regmap_read(map, PMIC_REV3, &pmic->minor);
+- 	if (ret < 0)
+--		return;
+-+		return ret;
+- 
+--	ret = regmap_read(map, PMIC_REV4, &major);
+-+	ret = regmap_read(map, PMIC_REV4, &pmic->major);
+- 	if (ret < 0)
+--		return;
+-+		return ret;
+- 
+- 	/*
+- 	 * In early versions of PM8941 and PM8226, the major revision number
+-@@ -124,15 +163,49 @@ static void pmic_spmi_show_revid(struct
+- 	 * Increment the major revision number here if the chip is an early
+- 	 * version of PM8941 or PM8226.
+- 	 */
+--	if ((subtype == PM8941_SUBTYPE || subtype == PM8226_SUBTYPE) &&
+--	    major < 0x02)
+--		major++;
+-+	if ((pmic->subtype == PM8941_SUBTYPE || pmic->subtype == PM8226_SUBTYPE) &&
+-+	    pmic->major < PMIC_REV4_V2)
+-+		pmic->major++;
+-+
+-+	if (pmic->subtype == PM8110_SUBTYPE)
+-+		pmic->minor = pmic->rev2;
+-+
+-+	dev_dbg(dev, "%x: %s v%d.%d\n",
+-+		pmic->subtype, pmic->name, pmic->major, pmic->minor);
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * qcom_pmic_get() - Get a pointer to the base PMIC device
+-+ *
+-+ * This function takes a struct device for a driver which is a child of a PMIC.
+-+ * And locates the PMIC revision information for it.
+-+ *
+-+ * @dev: the pmic function device
+-+ * @return: the struct qcom_spmi_pmic* pointer associated with the function device
+-+ */
+-+const struct qcom_spmi_pmic *qcom_pmic_get(struct device *dev)
+-+{
+-+	struct spmi_device *sdev;
+-+	struct qcom_spmi_dev *spmi;
+-+
+-+	/*
+-+	 * Make sure the device is actually a child of a PMIC
+-+	 */
+-+	if (!of_match_device(pmic_spmi_id_table, dev->parent))
+-+		return ERR_PTR(-EINVAL);
+-+
+-+	sdev = qcom_pmic_get_base_usid(dev->parent);
+- 
+--	if (subtype == PM8110_SUBTYPE)
+--		minor = rev2;
+-+	if (IS_ERR(sdev))
+-+		return ERR_CAST(sdev);
+- 
+--	dev_dbg(dev, "%x: %s v%d.%d\n", subtype, name, major, minor);
+-+	spmi = dev_get_drvdata(&sdev->dev);
+-+
+-+	return &spmi->pmic;
+- }
+-+EXPORT_SYMBOL(qcom_pmic_get);
+- 
+- static const struct regmap_config spmi_regmap_config = {
+- 	.reg_bits	= 16,
+-@@ -144,14 +217,26 @@ static const struct regmap_config spmi_r
+- static int pmic_spmi_probe(struct spmi_device *sdev)
+- {
+- 	struct regmap *regmap;
+-+	struct qcom_spmi_dev *ctx;
+-+	int ret;
+- 
+- 	regmap = devm_regmap_init_spmi_ext(sdev, &spmi_regmap_config);
+- 	if (IS_ERR(regmap))
+- 		return PTR_ERR(regmap);
+- 
+-+	ctx = devm_kzalloc(&sdev->dev, sizeof(*ctx), GFP_KERNEL);
+-+	if (!ctx)
+-+		return -ENOMEM;
+-+
+-+	ctx->num_usids = (uintptr_t)of_device_get_match_data(&sdev->dev);
+-+
+- 	/* Only the first slave id for a PMIC contains this information */
+--	if (sdev->usid % 2 == 0)
+--		pmic_spmi_show_revid(regmap, &sdev->dev);
+-+	if (sdev->usid % ctx->num_usids == 0) {
+-+		ret = pmic_spmi_load_revid(regmap, &sdev->dev, &ctx->pmic);
+-+		if (ret < 0)
+-+			return ret;
+-+	}
+-+	spmi_device_set_drvdata(sdev, ctx);
+- 
+- 	return devm_of_platform_populate(&sdev->dev);
+- }
+---- /dev/null
+-+++ b/include/soc/qcom/qcom-spmi-pmic.h
+-@@ -0,0 +1,60 @@
+-+/* SPDX-License-Identifier: GPL-2.0-only */
+-+/* Copyright (c) 2022 Linaro. All rights reserved.
+-+ * Author: Caleb Connolly <caleb.connolly@linaro.org>
+-+ */
+-+
+-+#ifndef __QCOM_SPMI_PMIC_H__
+-+#define __QCOM_SPMI_PMIC_H__
+-+
+-+#include <linux/device.h>
+-+
+-+#define COMMON_SUBTYPE		0x00
+-+#define PM8941_SUBTYPE		0x01
+-+#define PM8841_SUBTYPE		0x02
+-+#define PM8019_SUBTYPE		0x03
+-+#define PM8226_SUBTYPE		0x04
+-+#define PM8110_SUBTYPE		0x05
+-+#define PMA8084_SUBTYPE		0x06
+-+#define PMI8962_SUBTYPE		0x07
+-+#define PMD9635_SUBTYPE		0x08
+-+#define PM8994_SUBTYPE		0x09
+-+#define PMI8994_SUBTYPE		0x0a
+-+#define PM8916_SUBTYPE		0x0b
+-+#define PM8004_SUBTYPE		0x0c
+-+#define PM8909_SUBTYPE		0x0d
+-+#define PM8028_SUBTYPE		0x0e
+-+#define PM8901_SUBTYPE		0x0f
+-+#define PM8950_SUBTYPE		0x10
+-+#define PMI8950_SUBTYPE		0x11
+-+#define PM8998_SUBTYPE		0x14
+-+#define PMI8998_SUBTYPE		0x15
+-+#define PM8005_SUBTYPE		0x18
+-+#define PM660L_SUBTYPE		0x1A
+-+#define PM660_SUBTYPE		0x1B
+-+#define PM8150_SUBTYPE		0x1E
+-+#define PM8150L_SUBTYPE		0x1f
+-+#define PM8150B_SUBTYPE		0x20
+-+#define PMK8002_SUBTYPE		0x21
+-+#define PM8009_SUBTYPE		0x24
+-+#define PM8150C_SUBTYPE		0x26
+-+#define SMB2351_SUBTYPE		0x29
+-+
+-+#define PMI8998_FAB_ID_SMIC	0x11
+-+#define PMI8998_FAB_ID_GF	0x30
+-+
+-+#define PM660_FAB_ID_GF		0x0
+-+#define PM660_FAB_ID_TSMC	0x2
+-+#define PM660_FAB_ID_MX		0x3
+-+
+-+struct qcom_spmi_pmic {
+-+	unsigned int type;
+-+	unsigned int subtype;
+-+	unsigned int major;
+-+	unsigned int minor;
+-+	unsigned int rev2;
+-+	const char *name;
+-+};
+-+
+-+const struct qcom_spmi_pmic *qcom_pmic_get(struct device *dev);
+-+
+-+#endif /* __QCOM_SPMI_PMIC_H__ */
+diff --git a/target/linux/ipq807x/patches-5.15/0059-v6.0-mfd-qcom-spmi-pmic-read-fab-id-on-supported-PMICs.patch b/target/linux/ipq807x/patches-5.15/0059-v6.0-mfd-qcom-spmi-pmic-read-fab-id-on-supported-PMICs.patch
+deleted file mode 100644
+index ecf8772bfd..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0059-v6.0-mfd-qcom-spmi-pmic-read-fab-id-on-supported-PMICs.patch
++++ /dev/null
+@@ -1,52 +0,0 @@
+-From 0c309f4e86c827cd5fd2eb0e36d5d1f19927380d Mon Sep 17 00:00:00 2001
+-From: Caleb Connolly <caleb.connolly@linaro.org>
+-Date: Fri, 29 Apr 2022 23:08:58 +0100
+-Subject: [PATCH] mfd: qcom-spmi-pmic: read fab id on supported PMICs
+-
+-The PMI8998 and PM660 expose the fab_id, this is needed by drivers like
+-the RRADC to calibrate ADC values.
+-
+-Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
+-Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+-Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+-Acked-by: Lee Jones <lee.jones@linaro.org>
+-Link: https://lore.kernel.org/r/20220429220904.137297-4-caleb.connolly@linaro.org
+-Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+----
+- drivers/mfd/qcom-spmi-pmic.c      | 7 +++++++
+- include/soc/qcom/qcom-spmi-pmic.h | 1 +
+- 2 files changed, 8 insertions(+)
+-
+---- a/drivers/mfd/qcom-spmi-pmic.c
+-+++ b/drivers/mfd/qcom-spmi-pmic.c
+-@@ -19,6 +19,7 @@
+- #define PMIC_REV4		0x103
+- #define PMIC_TYPE		0x104
+- #define PMIC_SUBTYPE		0x105
+-+#define PMIC_FAB_ID		0x1f2
+- 
+- #define PMIC_TYPE_VALUE		0x51
+- 
+-@@ -157,6 +158,12 @@ static int pmic_spmi_load_revid(struct r
+- 	if (ret < 0)
+- 		return ret;
+- 
+-+	if (pmic->subtype == PMI8998_SUBTYPE || pmic->subtype == PM660_SUBTYPE) {
+-+		ret = regmap_read(map, PMIC_FAB_ID, &pmic->fab_id);
+-+		if (ret < 0)
+-+			return ret;
+-+	}
+-+
+- 	/*
+- 	 * In early versions of PM8941 and PM8226, the major revision number
+- 	 * started incrementing from 0 (eg 0 = v1.0, 1 = v2.0).
+---- a/include/soc/qcom/qcom-spmi-pmic.h
+-+++ b/include/soc/qcom/qcom-spmi-pmic.h
+-@@ -52,6 +52,7 @@ struct qcom_spmi_pmic {
+- 	unsigned int major;
+- 	unsigned int minor;
+- 	unsigned int rev2;
+-+	unsigned int fab_id;
+- 	const char *name;
+- };
+- 
+diff --git a/target/linux/ipq807x/patches-5.15/0060-v6.1-mfd-qcom-spmi-pmic-Add-support-for-PMP8074.patch b/target/linux/ipq807x/patches-5.15/0060-v6.1-mfd-qcom-spmi-pmic-Add-support-for-PMP8074.patch
+deleted file mode 100644
+index 109a08aea3..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0060-v6.1-mfd-qcom-spmi-pmic-Add-support-for-PMP8074.patch
++++ /dev/null
+@@ -1,27 +0,0 @@
+-From 46878413ba10170aaa9b7c797816e928a11923e3 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 19 Aug 2022 00:18:12 +0200
+-Subject: [PATCH] mfd: qcom-spmi-pmic: Add support for PMP8074
+-
+-Add support for PMP8074 PMIC which is a companion PMIC for the Qualcomm
+-IPQ8074 SoC-s.
+-
+-It shares the same subtype identifier as PM8901.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Lee Jones <lee@kernel.org>
+-Link: https://lore.kernel.org/r/20220818221815.346233-2-robimarko@gmail.com
+----
+- drivers/mfd/qcom-spmi-pmic.c | 1 +
+- 1 file changed, 1 insertion(+)
+-
+---- a/drivers/mfd/qcom-spmi-pmic.c
+-+++ b/drivers/mfd/qcom-spmi-pmic.c
+-@@ -60,6 +60,7 @@ static const struct of_device_id pmic_sp
+- 	{ .compatible = "qcom,pmi8994", .data = N_USIDS(2) },
+- 	{ .compatible = "qcom,pmi8998", .data = N_USIDS(2) },
+- 	{ .compatible = "qcom,pmk8002", .data = N_USIDS(2) },
+-+	{ .compatible = "qcom,pmp8074", .data = N_USIDS(2) },
+- 	{ .compatible = "qcom,smb2351", .data = N_USIDS(2) },
+- 	{ .compatible = "qcom,spmi-pmic", .data = N_USIDS(1) },
+- 	{ }
+diff --git a/target/linux/ipq807x/patches-5.15/0061-v6.0-regulator-qcom_spmi-add-support-for-HT_P150.patch b/target/linux/ipq807x/patches-5.15/0061-v6.0-regulator-qcom_spmi-add-support-for-HT_P150.patch
+deleted file mode 100644
+index b0dbe7d088..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0061-v6.0-regulator-qcom_spmi-add-support-for-HT_P150.patch
++++ /dev/null
+@@ -1,58 +0,0 @@
+-From dedc087d43013ab6043dd1da4cd585dd4242a6bb Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Mon, 4 Jul 2022 23:23:54 +0200
+-Subject: [PATCH] regulator: qcom_spmi: add support for HT_P150
+-
+-HT_P150 is a LDO PMOS regulator based on LV P150 using HFS430 layout
+-found in PMP8074 and PMS405 PMIC-s.
+-
+-Both PMP8074 and PMS405 define the programmable range as 1.616V to 3.304V
+-but the actual MAX output voltage depends on the exact LDO in each of
+-the PMIC-s.
+-
+-It has a max current of 150mA, voltage step of 8mV.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Link: https://lore.kernel.org/r/20220704212402.1715182-4-robimarko@gmail.com
+-Signed-off-by: Mark Brown <broonie@kernel.org>
+----
+- drivers/regulator/qcom_spmi-regulator.c | 7 +++++++
+- 1 file changed, 7 insertions(+)
+-
+---- a/drivers/regulator/qcom_spmi-regulator.c
+-+++ b/drivers/regulator/qcom_spmi-regulator.c
+-@@ -164,6 +164,7 @@ enum spmi_regulator_subtype {
+- 	SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3	= 0x0f,
+- 	SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4	= 0x10,
+- 	SPMI_REGULATOR_SUBTYPE_HFS430		= 0x0a,
+-+	SPMI_REGULATOR_SUBTYPE_HT_P150		= 0x35,
+- };
+- 
+- enum spmi_common_regulator_registers {
+-@@ -544,6 +545,10 @@ static struct spmi_voltage_range hfs430_
+- 	SPMI_VOLTAGE_RANGE(0, 320000, 320000, 2040000, 2040000, 8000),
+- };
+- 
+-+static struct spmi_voltage_range ht_p150_ranges[] = {
+-+	SPMI_VOLTAGE_RANGE(0, 1616000, 1616000, 3304000, 3304000, 8000),
+-+};
+-+
+- static DEFINE_SPMI_SET_POINTS(pldo);
+- static DEFINE_SPMI_SET_POINTS(nldo1);
+- static DEFINE_SPMI_SET_POINTS(nldo2);
+-@@ -564,6 +569,7 @@ static DEFINE_SPMI_SET_POINTS(nldo660);
+- static DEFINE_SPMI_SET_POINTS(ht_lvpldo);
+- static DEFINE_SPMI_SET_POINTS(ht_nldo);
+- static DEFINE_SPMI_SET_POINTS(hfs430);
+-+static DEFINE_SPMI_SET_POINTS(ht_p150);
+- 
+- static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf,
+- 				 int len)
+-@@ -1458,6 +1464,7 @@ static const struct regulator_ops spmi_h
+- 
+- static const struct spmi_regulator_mapping supported_regulators[] = {
+- 	/*           type subtype dig_min dig_max ltype ops setpoints hpm_min */
+-+	SPMI_VREG(LDO,   HT_P150,  0, INF, HFS430, hfs430, ht_p150, 10000),
+- 	SPMI_VREG(BUCK,  GP_CTL,   0, INF, SMPS,   smps,   smps,   100000),
+- 	SPMI_VREG(BUCK,  HFS430,   0, INF, HFS430, hfs430, hfs430,  10000),
+- 	SPMI_VREG(LDO,   N300,     0, INF, LDO,    ldo,    nldo1,   10000),
+diff --git a/target/linux/ipq807x/patches-5.15/0062-v6.0-regulator-qcom_spmi-add-support-for-HT_P600.patch b/target/linux/ipq807x/patches-5.15/0062-v6.0-regulator-qcom_spmi-add-support-for-HT_P600.patch
+deleted file mode 100644
+index 6b76f2c3fc..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0062-v6.0-regulator-qcom_spmi-add-support-for-HT_P600.patch
++++ /dev/null
+@@ -1,59 +0,0 @@
+-From 14789f38e03c42857613b69ff0f032e03653b246 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Mon, 4 Jul 2022 23:23:55 +0200
+-Subject: [PATCH] regulator: qcom_spmi: add support for HT_P600
+-
+-HT_P600 is a LDO PMOS regulator based on LV P600 using HFS430 layout
+-found in PMP8074 and PMS405 PMIC-s.
+-
+-Both PMP8074 and PMS405 define the programmable range as 1.704 to 1.896V
+-but the actual MAX output voltage depends on the exact LDO in each of
+-the PMIC-s.
+-Their usual voltage that they are used is 1.8V.
+-
+-It has a max current of 600mA, voltage step of 8mV.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Link: https://lore.kernel.org/r/20220704212402.1715182-5-robimarko@gmail.com
+-Signed-off-by: Mark Brown <broonie@kernel.org>
+----
+- drivers/regulator/qcom_spmi-regulator.c | 7 +++++++
+- 1 file changed, 7 insertions(+)
+-
+---- a/drivers/regulator/qcom_spmi-regulator.c
+-+++ b/drivers/regulator/qcom_spmi-regulator.c
+-@@ -165,6 +165,7 @@ enum spmi_regulator_subtype {
+- 	SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4	= 0x10,
+- 	SPMI_REGULATOR_SUBTYPE_HFS430		= 0x0a,
+- 	SPMI_REGULATOR_SUBTYPE_HT_P150		= 0x35,
+-+	SPMI_REGULATOR_SUBTYPE_HT_P600		= 0x3d,
+- };
+- 
+- enum spmi_common_regulator_registers {
+-@@ -549,6 +550,10 @@ static struct spmi_voltage_range ht_p150
+- 	SPMI_VOLTAGE_RANGE(0, 1616000, 1616000, 3304000, 3304000, 8000),
+- };
+- 
+-+static struct spmi_voltage_range ht_p600_ranges[] = {
+-+	SPMI_VOLTAGE_RANGE(0, 1704000, 1704000, 1896000, 1896000, 8000),
+-+};
+-+
+- static DEFINE_SPMI_SET_POINTS(pldo);
+- static DEFINE_SPMI_SET_POINTS(nldo1);
+- static DEFINE_SPMI_SET_POINTS(nldo2);
+-@@ -570,6 +575,7 @@ static DEFINE_SPMI_SET_POINTS(ht_lvpldo)
+- static DEFINE_SPMI_SET_POINTS(ht_nldo);
+- static DEFINE_SPMI_SET_POINTS(hfs430);
+- static DEFINE_SPMI_SET_POINTS(ht_p150);
+-+static DEFINE_SPMI_SET_POINTS(ht_p600);
+- 
+- static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf,
+- 				 int len)
+-@@ -1464,6 +1470,7 @@ static const struct regulator_ops spmi_h
+- 
+- static const struct spmi_regulator_mapping supported_regulators[] = {
+- 	/*           type subtype dig_min dig_max ltype ops setpoints hpm_min */
+-+	SPMI_VREG(LDO,   HT_P600,  0, INF, HFS430, hfs430, ht_p600, 10000),
+- 	SPMI_VREG(LDO,   HT_P150,  0, INF, HFS430, hfs430, ht_p150, 10000),
+- 	SPMI_VREG(BUCK,  GP_CTL,   0, INF, SMPS,   smps,   smps,   100000),
+- 	SPMI_VREG(BUCK,  HFS430,   0, INF, HFS430, hfs430, hfs430,  10000),
+diff --git a/target/linux/ipq807x/patches-5.15/0063-v6.0-regulator-qcom_spmi-add-support-for-PMP8074-regulato.patch b/target/linux/ipq807x/patches-5.15/0063-v6.0-regulator-qcom_spmi-add-support-for-PMP8074-regulato.patch
+deleted file mode 100644
+index ce6985b13b..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0063-v6.0-regulator-qcom_spmi-add-support-for-PMP8074-regulato.patch
++++ /dev/null
+@@ -1,68 +0,0 @@
+-From 3e3da8da25f81fa3f0f3a37f60d10b17d1166864 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Mon, 4 Jul 2022 23:23:57 +0200
+-Subject: [PATCH] regulator: qcom_spmi: add support for PMP8074 regulators
+-
+-PMP8074 is a companion PMIC for the Qualcomm IPQ8074 WiSoC-s.
+-
+-It features 5 HF-SMPS and 13 LDO regulators.
+-
+-HF-SMPS regulators are Buck HFS430 regulators.
+-L1, L2 and L3 are HT_N1200_ST subtype LDO regulators.
+-L4 is HT_N300_ST subtype LDO regulator.
+-L5 and L6 are HT_P600 subtype LDO regulators.
+-L7, L11, L12 and L13 are HT_P150 subtype LDO regulators.
+-L10 is HT_P50 subtype LDO regulator.
+-
+-This commit adds support for all of the buck regulators and LDO-s except
+-for L10 as I dont have documentation on its output voltage range.
+-
+-S3 is the CPU cluster voltage supply, S4 supplies the UBI32 NPU cores
+-and L11 is the SDIO/eMMC I/O voltage regulator required for high speeds.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Link: https://lore.kernel.org/r/20220704212402.1715182-7-robimarko@gmail.com
+-Signed-off-by: Mark Brown <broonie@kernel.org>
+----
+- drivers/regulator/qcom_spmi-regulator.c | 23 +++++++++++++++++++++++
+- 1 file changed, 23 insertions(+)
+-
+---- a/drivers/regulator/qcom_spmi-regulator.c
+-+++ b/drivers/regulator/qcom_spmi-regulator.c
+-@@ -2101,6 +2101,28 @@ static const struct spmi_regulator_data
+- 	{ }
+- };
+- 
+-+static const struct spmi_regulator_data pmp8074_regulators[] = {
+-+	{ "s1", 0x1400, "vdd_s1"},
+-+	{ "s2", 0x1700, "vdd_s2"},
+-+	{ "s3", 0x1a00, "vdd_s3"},
+-+	{ "s4", 0x1d00, "vdd_s4"},
+-+	{ "s5", 0x2000, "vdd_s5"},
+-+	{ "l1", 0x4000, "vdd_l1_l2"},
+-+	{ "l2", 0x4100, "vdd_l1_l2"},
+-+	{ "l3", 0x4200, "vdd_l3_l8"},
+-+	{ "l4", 0x4300, "vdd_l4"},
+-+	{ "l5", 0x4400, "vdd_l5_l6_l15"},
+-+	{ "l6", 0x4500, "vdd_l5_l6_l15"},
+-+	{ "l7", 0x4600, "vdd_l7"},
+-+	{ "l8", 0x4700, "vdd_l3_l8"},
+-+	{ "l9", 0x4800, "vdd_l9"},
+-+	/* l10 is currently unsupported HT_P50 */
+-+	{ "l11", 0x4a00, "vdd_l10_l11_l12_l13"},
+-+	{ "l12", 0x4b00, "vdd_l10_l11_l12_l13"},
+-+	{ "l13", 0x4c00, "vdd_l10_l11_l12_l13"},
+-+	{ }
+-+};
+-+
+- static const struct spmi_regulator_data pms405_regulators[] = {
+- 	{ "s3", 0x1a00, "vdd_s3"},
+- 	{ }
+-@@ -2117,6 +2139,7 @@ static const struct of_device_id qcom_sp
+- 	{ .compatible = "qcom,pmi8994-regulators", .data = &pmi8994_regulators },
+- 	{ .compatible = "qcom,pm660-regulators", .data = &pm660_regulators },
+- 	{ .compatible = "qcom,pm660l-regulators", .data = &pm660l_regulators },
+-+	{ .compatible = "qcom,pmp8074-regulators", .data = &pmp8074_regulators },
+- 	{ .compatible = "qcom,pms405-regulators", .data = &pms405_regulators },
+- 	{ }
+- };
+diff --git a/target/linux/ipq807x/patches-5.15/0064-v6.0-pinctrl-qcom-pmic-gpio-add-support-for-PMP8074.patch b/target/linux/ipq807x/patches-5.15/0064-v6.0-pinctrl-qcom-pmic-gpio-add-support-for-PMP8074.patch
+deleted file mode 100644
+index ba3d1750e1..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0064-v6.0-pinctrl-qcom-pmic-gpio-add-support-for-PMP8074.patch
++++ /dev/null
+@@ -1,25 +0,0 @@
+-From 204cd3516f59eb7040b814429187e674f49ba065 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Mon, 11 Jul 2022 22:34:05 +0200
+-Subject: [PATCH] pinctrl: qcom-pmic-gpio: add support for PMP8074
+-
+-PMP8074 has 12 GPIO-s with holes on GPIO1 and GPIO12.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Link: https://lore.kernel.org/r/20220711203408.2949888-4-robimarko@gmail.com
+-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+----
+- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 2 ++
+- 1 file changed, 2 insertions(+)
+-
+---- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
+-+++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
+-@@ -1167,6 +1167,8 @@ static const struct of_device_id pmic_gp
+- 	{ .compatible = "qcom,pmi8998-gpio", .data = (void *) 14 },
+- 	{ .compatible = "qcom,pmk8350-gpio", .data = (void *) 4 },
+- 	{ .compatible = "qcom,pmm8155au-gpio", .data = (void *) 10 },
+-+	/* pmp8074 has 12 GPIOs with holes on 1 and 12 */
+-+	{ .compatible = "qcom,pmp8074-gpio", .data = (void *) 12 },
+- 	{ .compatible = "qcom,pmr735a-gpio", .data = (void *) 4 },
+- 	{ .compatible = "qcom,pmr735b-gpio", .data = (void *) 4 },
+- 	/* pms405 has 12 GPIOs with holes on 1, 9, and 10 */
+diff --git a/target/linux/ipq807x/patches-5.15/0065-v6.1-iio-adc-qcom-spmi-adc5-add-ADC5_VREF_VADC-to-rev2-AD.patch b/target/linux/ipq807x/patches-5.15/0065-v6.1-iio-adc-qcom-spmi-adc5-add-ADC5_VREF_VADC-to-rev2-AD.patch
+deleted file mode 100644
+index 306f0dd253..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0065-v6.1-iio-adc-qcom-spmi-adc5-add-ADC5_VREF_VADC-to-rev2-AD.patch
++++ /dev/null
+@@ -1,26 +0,0 @@
+-From 41a02abb863edca0de0373bc3deaf0639b18c589 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 19 Aug 2022 00:18:13 +0200
+-Subject: [PATCH] iio: adc: qcom-spmi-adc5: add ADC5_VREF_VADC to rev2 ADC5
+-
+-Add support for ADC5_VREF_VADC channel to rev2 ADC5 channel list.
+-This channel measures the VADC reference LDO output.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Link: https://lore.kernel.org/r/20220818221815.346233-3-robimarko@gmail.com
+-Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+----
+- drivers/iio/adc/qcom-spmi-adc5.c | 2 ++
+- 1 file changed, 2 insertions(+)
+-
+---- a/drivers/iio/adc/qcom-spmi-adc5.c
+-+++ b/drivers/iio/adc/qcom-spmi-adc5.c
+-@@ -589,6 +589,8 @@ static const struct adc5_channels adc5_c
+- 					SCALE_HW_CALIB_DEFAULT)
+- 	[ADC5_1P25VREF]		= ADC5_CHAN_VOLT("vref_1p25", 0,
+- 					SCALE_HW_CALIB_DEFAULT)
+-+	[ADC5_VREF_VADC]	= ADC5_CHAN_VOLT("vref_vadc", 0,
+-+					SCALE_HW_CALIB_DEFAULT)
+- 	[ADC5_VPH_PWR]		= ADC5_CHAN_VOLT("vph_pwr", 1,
+- 					SCALE_HW_CALIB_DEFAULT)
+- 	[ADC5_VBAT_SNS]		= ADC5_CHAN_VOLT("vbat_sns", 1,
+diff --git a/target/linux/ipq807x/patches-5.15/0066-v6.2-arm64-dts-qcom-add-PMP8074-DTSI.patch b/target/linux/ipq807x/patches-5.15/0066-v6.2-arm64-dts-qcom-add-PMP8074-DTSI.patch
+deleted file mode 100644
+index cd146420cf..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0066-v6.2-arm64-dts-qcom-add-PMP8074-DTSI.patch
++++ /dev/null
+@@ -1,149 +0,0 @@
+-From fb76b808f8628215afebaf0f8af0bde635302590 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 19 Aug 2022 00:18:14 +0200
+-Subject: [PATCH] arm64: dts: qcom: add PMP8074 DTSI
+-
+-PMP8074 is a companion PMIC to the Qualcomm IPQ8074 series that is
+-controlled via SPMI.
+-
+-Add DTSI for it providing GPIO, regulator, RTC and VADC support.
+-
+-RTC is disabled by default as there is no built-in battery so it will
+-loose time unless board vendor added a battery, so make it optional.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20220818221815.346233-4-robimarko@gmail.com
+----
+- arch/arm64/boot/dts/qcom/pmp8074.dtsi | 125 ++++++++++++++++++++++++++
+- 1 file changed, 125 insertions(+)
+- create mode 100644 arch/arm64/boot/dts/qcom/pmp8074.dtsi
+-
+---- /dev/null
+-+++ b/arch/arm64/boot/dts/qcom/pmp8074.dtsi
+-@@ -0,0 +1,125 @@
+-+// SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause
+-+
+-+#include <dt-bindings/spmi/spmi.h>
+-+#include <dt-bindings/iio/qcom,spmi-vadc.h>
+-+
+-+&spmi_bus {
+-+	pmic@0 {
+-+		compatible = "qcom,pmp8074", "qcom,spmi-pmic";
+-+		reg = <0x0 SPMI_USID>;
+-+		#address-cells = <1>;
+-+		#size-cells = <0>;
+-+
+-+		pmp8074_adc: adc@3100 {
+-+			compatible = "qcom,spmi-adc-rev2";
+-+			reg = <0x3100>;
+-+			interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+-+			#address-cells = <1>;
+-+			#size-cells = <0>;
+-+			#io-channel-cells = <1>;
+-+
+-+			ref-gnd@0 {
+-+				reg = <ADC5_REF_GND>;
+-+				qcom,pre-scaling = <1 1>;
+-+			};
+-+
+-+			vref-1p25@1 {
+-+				reg = <ADC5_1P25VREF>;
+-+				qcom,pre-scaling = <1 1>;
+-+			};
+-+
+-+			vref-vadc@2 {
+-+				reg = <ADC5_VREF_VADC>;
+-+				qcom,pre-scaling = <1 1>;
+-+			};
+-+
+-+			pmic_die: die-temp@6 {
+-+				reg = <ADC5_DIE_TEMP>;
+-+				qcom,pre-scaling = <1 1>;
+-+			};
+-+
+-+			xo_therm: xo-temp@76 {
+-+				reg = <ADC5_XO_THERM_100K_PU>;
+-+				qcom,ratiometric;
+-+				qcom,hw-settle-time = <200>;
+-+				qcom,pre-scaling = <1 1>;
+-+			};
+-+
+-+			pa_therm1: thermistor1@77 {
+-+				reg = <ADC5_AMUX_THM1_100K_PU>;
+-+				qcom,ratiometric;
+-+				qcom,hw-settle-time = <200>;
+-+				qcom,pre-scaling = <1 1>;
+-+			};
+-+
+-+			pa_therm2: thermistor2@78 {
+-+				reg = <ADC5_AMUX_THM2_100K_PU>;
+-+				qcom,ratiometric;
+-+				qcom,hw-settle-time = <200>;
+-+				qcom,pre-scaling = <1 1>;
+-+			};
+-+
+-+			pa_therm3: thermistor3@79 {
+-+				reg = <ADC5_AMUX_THM3_100K_PU>;
+-+				qcom,ratiometric;
+-+				qcom,hw-settle-time = <200>;
+-+				qcom,pre-scaling = <1 1>;
+-+			};
+-+
+-+			vph-pwr@131 {
+-+				reg = <ADC5_VPH_PWR>;
+-+				qcom,pre-scaling = <1 3>;
+-+			};
+-+		};
+-+
+-+		pmp8074_rtc: rtc@6000 {
+-+			compatible = "qcom,pm8941-rtc";
+-+			reg = <0x6000>;
+-+			reg-names = "rtc", "alarm";
+-+			interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
+-+			allow-set-time;
+-+			status = "disabled";
+-+		};
+-+
+-+		pmp8074_gpios: gpio@c000 {
+-+			compatible = "qcom,pmp8074-gpio", "qcom,spmi-gpio";
+-+			reg = <0xc000>;
+-+			gpio-controller;
+-+			#gpio-cells = <2>;
+-+			gpio-ranges = <&pmp8074_gpios 0 0 12>;
+-+			interrupt-controller;
+-+			#interrupt-cells = <2>;
+-+		};
+-+	};
+-+
+-+	pmic@1 {
+-+		compatible = "qcom,pmp8074", "qcom,spmi-pmic";
+-+		reg = <0x1 SPMI_USID>;
+-+
+-+		regulators {
+-+			compatible = "qcom,pmp8074-regulators";
+-+
+-+			s3: s3 {
+-+				regulator-name = "vdd_s3";
+-+				regulator-min-microvolt = <592000>;
+-+				regulator-max-microvolt = <1064000>;
+-+				regulator-always-on;
+-+				regulator-boot-on;
+-+			};
+-+
+-+			s4: s4 {
+-+				regulator-name = "vdd_s4";
+-+				regulator-min-microvolt = <712000>;
+-+				regulator-max-microvolt = <992000>;
+-+				regulator-always-on;
+-+				regulator-boot-on;
+-+			};
+-+
+-+			l11: l11 {
+-+				regulator-name = "l11";
+-+				regulator-min-microvolt = <1800000>;
+-+				regulator-max-microvolt = <3300000>;
+-+			};
+-+		};
+-+	};
+-+};
+diff --git a/target/linux/ipq807x/patches-5.15/0067-v6.2-arm64-dts-qcom-ipq8074-hk01-add-VQMMC-supply.patch b/target/linux/ipq807x/patches-5.15/0067-v6.2-arm64-dts-qcom-ipq8074-hk01-add-VQMMC-supply.patch
+deleted file mode 100644
+index af65c0c979..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0067-v6.2-arm64-dts-qcom-ipq8074-hk01-add-VQMMC-supply.patch
++++ /dev/null
+@@ -1,37 +0,0 @@
+-From 2c394cfc1779886048feca7dc7f4075da5f6328c Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 19 Aug 2022 00:18:15 +0200
+-Subject: [PATCH] arm64: dts: qcom: ipq8074-hk01: add VQMMC supply
+-
+-Since now we have control over the PMP8074 PMIC providing various system
+-voltages including L11 which provides the SDIO/eMMC I/O voltage set it as
+-the SDHCI VQMMC supply.
+-
+-This allows SDHCI controller to switch to 1.8V I/O mode and support high
+-speed modes like HS200 and HS400.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20220818221815.346233-5-robimarko@gmail.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 2 ++
+- 1 file changed, 2 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+-@@ -3,6 +3,7 @@
+- /* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+-  */
+- #include "ipq8074.dtsi"
+-+#include "pmp8074.dtsi"
+- 
+- / {
+- 	model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
+-@@ -82,6 +83,7 @@
+- 
+- &sdhc_1 {
+- 	status = "okay";
+-+	vqmmc-supply = <&l11>;
+- };
+- 
+- &qusb_phy_0 {
+diff --git a/target/linux/ipq807x/patches-5.15/0068-v6.2-arm64-dts-qcom-hk01-use-GPIO-flags-for-tlmm.patch b/target/linux/ipq807x/patches-5.15/0068-v6.2-arm64-dts-qcom-hk01-use-GPIO-flags-for-tlmm.patch
+deleted file mode 100644
+index 93c57d9ea9..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0068-v6.2-arm64-dts-qcom-hk01-use-GPIO-flags-for-tlmm.patch
++++ /dev/null
+@@ -1,42 +0,0 @@
+-From 82ceb86227b1fc15c76d5fc691b2bf425f1a63b3 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Mon, 7 Nov 2022 10:29:30 +0100
+-Subject: [PATCH] arm64: dts: qcom: hk01: use GPIO flags for tlmm
+-
+-Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs instead of
+-harcoding the cell value.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20221107092930.33325-3-robimarko@gmail.com
+----
+- arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 5 +++--
+- 1 file changed, 3 insertions(+), 2 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+-@@ -4,6 +4,7 @@
+-  */
+- #include "ipq8074.dtsi"
+- #include "pmp8074.dtsi"
+-+#include <dt-bindings/gpio/gpio.h>
+- 
+- / {
+- 	model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
+-@@ -50,12 +51,12 @@
+- 
+- &pcie0 {
+- 	status = "okay";
+--	perst-gpios = <&tlmm 61 0x1>;
+-+	perst-gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
+- };
+- 
+- &pcie1 {
+- 	status = "okay";
+--	perst-gpios = <&tlmm 58 0x1>;
+-+	perst-gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
+- };
+- 
+- &pcie_qmp0 {
+diff --git a/target/linux/ipq807x/patches-5.15/0069-v6.2-arm64-dts-qcom-ipq8074-Fix-up-comments.patch b/target/linux/ipq807x/patches-5.15/0069-v6.2-arm64-dts-qcom-ipq8074-Fix-up-comments.patch
+deleted file mode 100644
+index a8bf2492f4..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0069-v6.2-arm64-dts-qcom-ipq8074-Fix-up-comments.patch
++++ /dev/null
+@@ -1,82 +0,0 @@
+-From 1b1c1423ca3e740984aa883512a72c4ea08fbe28 Mon Sep 17 00:00:00 2001
+-From: Konrad Dybcio <konrad.dybcio@linaro.org>
+-Date: Mon, 7 Nov 2022 15:55:17 +0100
+-Subject: [PATCH] arm64: dts: qcom: ipq8074-*: Fix up comments
+-
+-Make sure all multiline C-style commends begin with just '/*' with
+-the comment text starting on a new line.
+-
+-Also, fix up some whitespace within comments.
+-
+-Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20221107145522.6706-8-konrad.dybcio@linaro.org
+----
+- arch/arm64/boot/dts/qcom/ipq8074-hk01.dts    |  3 ++-
+- arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dts |  3 ++-
+- arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dts |  3 ++-
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi        | 12 ++++++------
+- 4 files changed, 12 insertions(+), 9 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+-@@ -1,6 +1,7 @@
+- // SPDX-License-Identifier: GPL-2.0-only
+- /dts-v1/;
+--/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+-+/*
+-+ * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+-  */
+- #include "ipq8074.dtsi"
+- #include "pmp8074.dtsi"
+---- a/arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dts
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dts
+-@@ -1,5 +1,6 @@
+- // SPDX-License-Identifier: GPL-2.0-only
+--/* Copyright (c) 2020 The Linux Foundation. All rights reserved.
+-+/*
+-+ * Copyright (c) 2020 The Linux Foundation. All rights reserved.
+-  */
+- /dts-v1/;
+- 
+---- a/arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dts
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dts
+-@@ -1,6 +1,7 @@
+- // SPDX-License-Identifier: GPL-2.0-only
+- /dts-v1/;
+--/* Copyright (c) 2020 The Linux Foundation. All rights reserved.
+-+/*
+-+ * Copyright (c) 2020 The Linux Foundation. All rights reserved.
+-  */
+- #include "ipq8074-hk10.dtsi"
+- 
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -129,10 +129,10 @@
+- 			status = "disabled";
+- 
+- 			usb1_ssphy: phy@58200 {
+--				reg = <0x00058200 0x130>,       /* Tx */
+-+				reg = <0x00058200 0x130>,     /* Tx */
+- 				      <0x00058400 0x200>,     /* Rx */
+--				      <0x00058800 0x1f8>,     /* PCS  */
+--				      <0x00058600 0x044>;     /* PCS misc*/
+-+				      <0x00058800 0x1f8>,     /* PCS */
+-+				      <0x00058600 0x044>;     /* PCS misc */
+- 				#phy-cells = <0>;
+- 				#clock-cells = <0>;
+- 				clocks = <&gcc GCC_USB1_PIPE_CLK>;
+-@@ -172,10 +172,10 @@
+- 			status = "disabled";
+- 
+- 			usb0_ssphy: phy@78200 {
+--				reg = <0x00078200 0x130>,       /* Tx */
+-+				reg = <0x00078200 0x130>,     /* Tx */
+- 				      <0x00078400 0x200>,     /* Rx */
+--				      <0x00078800 0x1f8>,     /* PCS  */
+--				      <0x00078600 0x044>;     /* PCS misc*/
+-+				      <0x00078800 0x1f8>,     /* PCS */
+-+				      <0x00078600 0x044>;     /* PCS misc */
+- 				#phy-cells = <0>;
+- 				#clock-cells = <0>;
+- 				clocks = <&gcc GCC_USB0_PIPE_CLK>;
+diff --git a/target/linux/ipq807x/patches-5.15/0070-v6.2-arm64-dts-qcom-ipq8074-align-TLMM-pin-configuration-.patch b/target/linux/ipq807x/patches-5.15/0070-v6.2-arm64-dts-qcom-ipq8074-align-TLMM-pin-configuration-.patch
+deleted file mode 100644
+index 1ce1140682..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0070-v6.2-arm64-dts-qcom-ipq8074-align-TLMM-pin-configuration-.patch
++++ /dev/null
+@@ -1,60 +0,0 @@
+-From 5f20690f77878b1ba24ec88df01b92d5131a6780 Mon Sep 17 00:00:00 2001
+-From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Date: Tue, 8 Nov 2022 15:23:57 +0100
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: align TLMM pin configuration with
+- DT schema
+-
+-DT schema expects TLMM pin configuration nodes to be named with
+-'-state' suffix and their optional children with '-pins' suffix.
+-
+-Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20221108142357.67202-2-krzysztof.kozlowski@linaro.org
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 10 +++++-----
+- 1 file changed, 5 insertions(+), 5 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -318,35 +318,35 @@
+- 			interrupt-controller;
+- 			#interrupt-cells = <0x2>;
+- 
+--			serial_4_pins: serial4-pinmux {
+-+			serial_4_pins: serial4-state {
+- 				pins = "gpio23", "gpio24";
+- 				function = "blsp4_uart1";
+- 				drive-strength = <8>;
+- 				bias-disable;
+- 			};
+- 
+--			i2c_0_pins: i2c-0-pinmux {
+-+			i2c_0_pins: i2c-0-state {
+- 				pins = "gpio42", "gpio43";
+- 				function = "blsp1_i2c";
+- 				drive-strength = <8>;
+- 				bias-disable;
+- 			};
+- 
+--			spi_0_pins: spi-0-pins {
+-+			spi_0_pins: spi-0-state {
+- 				pins = "gpio38", "gpio39", "gpio40", "gpio41";
+- 				function = "blsp0_spi";
+- 				drive-strength = <8>;
+- 				bias-disable;
+- 			};
+- 
+--			hsuart_pins: hsuart-pins {
+-+			hsuart_pins: hsuart-state {
+- 				pins = "gpio46", "gpio47", "gpio48", "gpio49";
+- 				function = "blsp2_uart";
+- 				drive-strength = <8>;
+- 				bias-disable;
+- 			};
+- 
+--			qpic_pins: qpic-pins {
+-+			qpic_pins: qpic-state {
+- 				pins = "gpio1", "gpio3", "gpio4",
+- 				       "gpio5", "gpio6", "gpio7",
+- 				       "gpio8", "gpio10", "gpio11",
+diff --git a/target/linux/ipq807x/patches-5.15/0071-v5.16-soc-qcom-socinfo-Add-IPQ8074-family-ID-s.patch b/target/linux/ipq807x/patches-5.15/0071-v5.16-soc-qcom-socinfo-Add-IPQ8074-family-ID-s.patch
+deleted file mode 100644
+index ed1b063972..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0071-v5.16-soc-qcom-socinfo-Add-IPQ8074-family-ID-s.patch
++++ /dev/null
+@@ -1,50 +0,0 @@
+-From a212eb94fc9f72a126df651c5d7898feaea29526 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Sun, 5 Sep 2021 19:11:31 +0200
+-Subject: [PATCH] soc: qcom: socinfo: Add IPQ8074 family ID-s
+-
+-IPQ8074 family SoC ID-s are missing, so lets add them based on
+-the downstream driver.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Reviewed-by: Kathiravan T <kathirav@codeaurora.org>
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Link: https://lore.kernel.org/r/20210905171131.660885-1-robimarko@gmail.com
+----
+- drivers/soc/qcom/socinfo.c | 12 ++++++++++++
+- 1 file changed, 12 insertions(+)
+-
+---- a/drivers/soc/qcom/socinfo.c
+-+++ b/drivers/soc/qcom/socinfo.c
+-@@ -281,19 +281,31 @@ static const struct soc_id soc_id[] = {
+- 	{ 319, "APQ8098" },
+- 	{ 321, "SDM845" },
+- 	{ 322, "MDM9206" },
+-+	{ 323, "IPQ8074" },
+- 	{ 324, "SDA660" },
+- 	{ 325, "SDM658" },
+- 	{ 326, "SDA658" },
+- 	{ 327, "SDA630" },
+- 	{ 338, "SDM450" },
+- 	{ 341, "SDA845" },
+-+	{ 342, "IPQ8072" },
+-+	{ 343, "IPQ8076" },
+-+	{ 344, "IPQ8078" },
+- 	{ 345, "SDM636" },
+- 	{ 346, "SDA636" },
+- 	{ 349, "SDM632" },
+- 	{ 350, "SDA632" },
+- 	{ 351, "SDA450" },
+- 	{ 356, "SM8250" },
+-+	{ 375, "IPQ8070" },
+-+	{ 376, "IPQ8071" },
+-+	{ 389, "IPQ8072A" },
+-+	{ 390, "IPQ8074A" },
+-+	{ 391, "IPQ8076A" },
+-+	{ 392, "IPQ8078A" },
+- 	{ 394, "SM6125" },
+-+	{ 395, "IPQ8070A" },
+-+	{ 396, "IPQ8071A" },
+- 	{ 402, "IPQ6018" },
+- 	{ 403, "IPQ6028" },
+- 	{ 421, "IPQ6000" },
+diff --git a/target/linux/ipq807x/patches-5.15/0072-v6.0-phy-qcom-qmp-pcie-make-pipe-clock-rate-configurable.patch b/target/linux/ipq807x/patches-5.15/0072-v6.0-phy-qcom-qmp-pcie-make-pipe-clock-rate-configurable.patch
+deleted file mode 100644
+index 667c0cf7c7..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0072-v6.0-phy-qcom-qmp-pcie-make-pipe-clock-rate-configurable.patch
++++ /dev/null
+@@ -1,47 +0,0 @@
+-From 2b0fe9137aa32d7fc367bf3a1cef4fa97ece6d58 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Tue, 23 Aug 2022 22:43:51 +0200
+-Subject: [PATCH] phy: qcom-qmp-pcie: make pipe clock rate configurable
+-
+-IPQ8074 Gen3 PCIe PHY uses 250MHz as the pipe clock rate instead of 125MHz
+-like every other PCIe QMP PHY does, so make it configurable as part of the
+-qmp_phy_cfg.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+-Link: https://lore.kernel.org/r/20220621195512.1760362-1-robimarko@gmail.com
+-Signed-off-by: Vinod Koul <vkoul@kernel.org>
+----
+- drivers/phy/qualcomm/phy-qcom-qmp.c | 14 ++++++++++++--
+- 1 file changed, 12 insertions(+), 2 deletions(-)
+-
+---- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+-+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
+-@@ -2842,6 +2842,9 @@ struct qmp_phy_cfg {
+- 	/* true, if PHY has secondary tx/rx lanes to be configured */
+- 	bool is_dual_lane_phy;
+- 
+-+	/* QMP PHY pipe clock interface rate */
+-+	unsigned long pipe_clock_rate;
+-+
+- 	/* true, if PCS block has no separate SW_RESET register */
+- 	bool no_pcs_sw_reset;
+- };
+-@@ -5139,8 +5142,15 @@ static int phy_pipe_clk_register(struct
+- 
+- 	init.ops = &clk_fixed_rate_ops;
+- 
+--	/* controllers using QMP phys use 125MHz pipe clock interface */
+--	fixed->fixed_rate = 125000000;
+-+	/*
+-+	 * Controllers using QMP PHY-s use 125MHz pipe clock interface
+-+	 * unless other frequency is specified in the PHY config.
+-+	 */
+-+	if (qmp->phys[0]->cfg->pipe_clock_rate)
+-+		fixed->fixed_rate = qmp->phys[0]->cfg->pipe_clock_rate;
+-+	else
+-+		fixed->fixed_rate = 125000000;
+-+
+- 	fixed->hw.init = &init;
+- 
+- 	ret = devm_clk_hw_register(qmp->dev, &fixed->hw);
+diff --git a/target/linux/ipq807x/patches-5.15/0073-v6.0-phy-qcom-qmp-pcie-add-IPQ8074-PCIe-Gen3-QMP-PHY-supp.patch b/target/linux/ipq807x/patches-5.15/0073-v6.0-phy-qcom-qmp-pcie-add-IPQ8074-PCIe-Gen3-QMP-PHY-supp.patch
+deleted file mode 100644
+index 72aeef974e..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0073-v6.0-phy-qcom-qmp-pcie-add-IPQ8074-PCIe-Gen3-QMP-PHY-supp.patch
++++ /dev/null
+@@ -1,200 +0,0 @@
+-From 23bd21d8c05109b57aa9508e88fbdbc2b6d33de7 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Tue, 23 Aug 2022 22:47:40 +0200
+-Subject: [PATCH] phy: qcom-qmp-pcie: add IPQ8074 PCIe Gen3 QMP PHY support
+-
+-IPQ8074 has 2 different single lane PCIe PHY-s, one Gen2 and one Gen3.
+-Gen2 one is already supported, so add the support for the Gen3 one.
+-It uses the same register layout as IPQ6018.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+-Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+-Link: https://lore.kernel.org/r/20220621195512.1760362-3-robimarko@gmail.com
+-Signed-off-by: Vinod Koul <vkoul@kernel.org>
+----
+- drivers/phy/qualcomm/phy-qcom-qmp.c | 160 ++++++++++++++++++++++++++++
+- 1 file changed, 160 insertions(+)
+-
+---- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+-+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
+-@@ -812,6 +812,133 @@ static const struct qmp_phy_init_tbl ipq
+- 	QMP_PHY_INIT_CFG_L(QPHY_START_CTRL, 0x3),
+- };
+- 
+-+static const struct qmp_phy_init_tbl ipq8074_pcie_gen3_serdes_tbl[] = {
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_BIAS_EN_CLKBUFLR_EN, 0x18),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_BIAS_EN_CTRL_BY_PSM, 0x01),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_SELECT, 0x31),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_PLL_IVCO, 0x0f),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_BG_TRIM, 0x0f),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_CMN_CONFIG, 0x06),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_LOCK_CMP_EN, 0x42),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_RESETSM_CNTRL, 0x20),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_SVS_MODE_CLK_SEL, 0x01),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE_MAP, 0x04),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_SVS_MODE_CLK_SEL, 0x05),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE_TIMER1, 0xff),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE_TIMER2, 0x3f),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_CORE_CLK_EN, 0x30),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_HSCLK_SEL, 0x21),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_DEC_START_MODE0, 0x82),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START3_MODE0, 0x03),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START2_MODE0, 0x355),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START1_MODE0, 0x35555),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_LOCK_CMP2_MODE0, 0x1a),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_LOCK_CMP1_MODE0, 0x1a0a),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_CP_CTRL_MODE0, 0xb),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_PLL_RCTRL_MODE0, 0x16),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_PLL_CCTRL_MODE0, 0x28),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_INTEGLOOP_GAIN1_MODE0, 0x0),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_INTEGLOOP_GAIN0_MODE0, 0x40),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE2_MODE0, 0x02),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE1_MODE0, 0x24),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_SVS_MODE_CLK_SEL, 0x05),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_CORE_CLK_EN, 0x20),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_CORECLK_DIV, 0xa),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_SELECT, 0x32),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_SYS_CLK_CTRL, 0x02),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_SYSCLK_BUF_ENABLE, 0x07),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_SYSCLK_EN_SEL, 0x08),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_BG_TIMER, 0xa),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_HSCLK_SEL, 0x1),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_DEC_START_MODE1, 0x68),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START3_MODE1, 0x2),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START2_MODE1, 0x2aa),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START1_MODE1, 0x2aaab),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_ENABLE1, 0x90),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_LOCK_CMP2_MODE1, 0x34),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_LOCK_CMP1_MODE1, 0x3414),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_CP_CTRL_MODE1, 0x0b),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_PLL_RCTRL_MODE1, 0x16),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_PLL_CCTRL_MODE1, 0x28),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_INTEGLOOP_GAIN1_MODE1, 0x0),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_INTEGLOOP_GAIN0_MODE1, 0x40),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE2_MODE1, 0x03),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE1_MODE1, 0xb4),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_SVS_MODE_CLK_SEL, 0x05),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_CORE_CLK_EN, 0x0),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_CORECLK_DIV_MODE1, 0x08),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_EP_DIV_MODE0, 0x19),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_EP_DIV_MODE1, 0x28),
+-+	QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_ENABLE1, 0x90),
+-+};
+-+
+-+static const struct qmp_phy_init_tbl ipq8074_pcie_gen3_tx_tbl[] = {
+-+	QMP_PHY_INIT_CFG(QSERDES_TX0_RES_CODE_LANE_OFFSET_TX, 0x02),
+-+	QMP_PHY_INIT_CFG(QSERDES_TX0_RCV_DETECT_LVL_2, 0x12),
+-+	QMP_PHY_INIT_CFG(QSERDES_TX0_HIGHZ_DRVR_EN, 0x10),
+-+	QMP_PHY_INIT_CFG(QSERDES_TX0_LANE_MODE_1, 0x06),
+-+};
+-+
+-+static const struct qmp_phy_init_tbl ipq8074_pcie_gen3_rx_tbl[] = {
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_SIGDET_CNTRL, 0x03),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_SIGDET_ENABLES, 0x1c),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_SIGDET_DEGLITCH_CNTRL, 0x14),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_EQU_ADAPTOR_CNTRL2, 0xe),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_EQU_ADAPTOR_CNTRL3, 0x4),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_EQU_ADAPTOR_CNTRL4, 0x1b),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_DFE_EN_TIMER, 0x04),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_UCDR_SO_SATURATION_AND_ENABLE, 0x7f),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_UCDR_PI_CONTROLS, 0x70),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_EQ_OFFSET_ADAPTOR_CNTRL1, 0x73),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_OFFSET_ADAPTOR_CNTRL2, 0x80),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_10_LOW, 0x00),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_10_HIGH, 0x02),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_10_HIGH2, 0xc8),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_10_HIGH3, 0x09),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_10_HIGH4, 0xb1),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_01_LOW, 0x01),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_01_HIGH, 0x02),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_01_HIGH2, 0xc8),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_01_HIGH3, 0x09),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_01_HIGH4, 0xb1),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_00_LOW, 0xf0),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_00_HIGH, 0x2),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_00_HIGH2, 0x2f),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_00_HIGH3, 0xd3),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_00_HIGH4, 0x40),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_IDAC_TSETTLE_HIGH, 0x00),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_RX_IDAC_TSETTLE_LOW, 0xc0),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_UCDR_FO_GAIN, 0x0c),
+-+	QMP_PHY_INIT_CFG(QSERDES_RX0_UCDR_SO_GAIN, 0x02),
+-+};
+-+
+-+static const struct qmp_phy_init_tbl ipq8074_pcie_gen3_pcs_tbl[] = {
+-+	QMP_PHY_INIT_CFG(PCS_COM_FLL_CNTRL2, 0x83),
+-+	QMP_PHY_INIT_CFG(PCS_COM_FLL_CNT_VAL_L, 0x9),
+-+	QMP_PHY_INIT_CFG(PCS_COM_FLL_CNT_VAL_H_TOL, 0x42),
+-+	QMP_PHY_INIT_CFG(PCS_COM_FLL_MAN_CODE, 0x40),
+-+	QMP_PHY_INIT_CFG(PCS_COM_FLL_CNTRL1, 0x01),
+-+	QMP_PHY_INIT_CFG(PCS_COM_P2U3_WAKEUP_DLY_TIME_AUXCLK_H, 0x0),
+-+	QMP_PHY_INIT_CFG(PCS_COM_P2U3_WAKEUP_DLY_TIME_AUXCLK_L, 0x1),
+-+	QMP_PHY_INIT_CFG(PCS_PCIE_OSC_DTCT_ACTIONS, 0x0),
+-+	QMP_PHY_INIT_CFG(PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_H, 0x00),
+-+	QMP_PHY_INIT_CFG(PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_L, 0x01),
+-+	QMP_PHY_INIT_CFG(PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_H, 0x00),
+-+	QMP_PHY_INIT_CFG(PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_L, 0x01),
+-+	QMP_PHY_INIT_CFG(PCS_PCIE_EQ_CONFIG1, 0x11),
+-+	QMP_PHY_INIT_CFG(PCS_PCIE_EQ_CONFIG2, 0xb),
+-+	QMP_PHY_INIT_CFG(PCS_PCIE_POWER_STATE_CONFIG4, 0x07),
+-+	QMP_PHY_INIT_CFG(PCS_PCIE_OSC_DTCT_CONFIG2, 0x52),
+-+	QMP_PHY_INIT_CFG(PCS_PCIE_OSC_DTCT_MODE2_CONFIG2, 0x50),
+-+	QMP_PHY_INIT_CFG(PCS_PCIE_OSC_DTCT_MODE2_CONFIG4, 0x1a),
+-+	QMP_PHY_INIT_CFG(PCS_PCIE_OSC_DTCT_MODE2_CONFIG5, 0x6),
+-+	QMP_PHY_INIT_CFG(PCS_COM_G12S1_TXDEEMPH_M3P5DB, 0x10),
+-+	QMP_PHY_INIT_CFG(PCS_PCIE_ENDPOINT_REFCLK_DRIVE, 0xc1),
+-+	QMP_PHY_INIT_CFG(PCS_COM_RX_DCC_CAL_CONFIG, 0x01),
+-+	QMP_PHY_INIT_CFG(PCS_COM_RX_SIGDET_LVL, 0xaa),
+-+	QMP_PHY_INIT_CFG(PCS_COM_REFGEN_REQ_CONFIG1, 0x0d),
+-+};
+-+
+- static const struct qmp_phy_init_tbl sdm845_qmp_pcie_serdes_tbl[] = {
+- 	QMP_PHY_INIT_CFG(QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN, 0x14),
+- 	QMP_PHY_INIT_CFG(QSERDES_V3_COM_CLK_SELECT, 0x30),
+-@@ -3168,6 +3295,36 @@ static const struct qmp_phy_cfg ipq8074_
+- 	.pwrdn_delay_max	= 1005,		/* us */
+- };
+- 
+-+static const struct qmp_phy_cfg ipq8074_pciephy_gen3_cfg = {
+-+	.type			= PHY_TYPE_PCIE,
+-+	.nlanes			= 1,
+-+
+-+	.serdes_tbl		= ipq8074_pcie_gen3_serdes_tbl,
+-+	.serdes_tbl_num		= ARRAY_SIZE(ipq8074_pcie_gen3_serdes_tbl),
+-+	.tx_tbl			= ipq8074_pcie_gen3_tx_tbl,
+-+	.tx_tbl_num		= ARRAY_SIZE(ipq8074_pcie_gen3_tx_tbl),
+-+	.rx_tbl			= ipq8074_pcie_gen3_rx_tbl,
+-+	.rx_tbl_num		= ARRAY_SIZE(ipq8074_pcie_gen3_rx_tbl),
+-+	.pcs_tbl		= ipq8074_pcie_gen3_pcs_tbl,
+-+	.pcs_tbl_num		= ARRAY_SIZE(ipq8074_pcie_gen3_pcs_tbl),
+-+	.clk_list		= ipq8074_pciephy_clk_l,
+-+	.num_clks		= ARRAY_SIZE(ipq8074_pciephy_clk_l),
+-+	.reset_list		= ipq8074_pciephy_reset_l,
+-+	.num_resets		= ARRAY_SIZE(ipq8074_pciephy_reset_l),
+-+	.vreg_list		= NULL,
+-+	.num_vregs		= 0,
+-+	.regs			= ipq_pciephy_gen3_regs_layout,
+-+
+-+	.start_ctrl		= SERDES_START | PCS_START,
+-+	.pwrdn_ctrl		= SW_PWRDN | REFCLK_DRV_DSBL,
+-+
+-+	.has_pwrdn_delay	= true,
+-+	.pwrdn_delay_min	= 995,		/* us */
+-+	.pwrdn_delay_max	= 1005,		/* us */
+-+
+-+	.pipe_clock_rate	= 250000000,
+-+};
+-+
+- static const struct qmp_phy_cfg ipq6018_pciephy_cfg = {
+- 	.type			= PHY_TYPE_PCIE,
+- 	.nlanes			= 1,
+-@@ -5571,6 +5728,9 @@ static const struct of_device_id qcom_qm
+- 		.compatible = "qcom,ipq8074-qmp-pcie-phy",
+- 		.data = &ipq8074_pciephy_cfg,
+- 	}, {
+-+		.compatible = "qcom,ipq8074-qmp-gen3-pcie-phy",
+-+		.data = &ipq8074_pciephy_gen3_cfg,
+-+	}, {
+- 		.compatible = "qcom,ipq6018-qmp-pcie-phy",
+- 		.data = &ipq6018_pciephy_cfg,
+- 	}, {
+diff --git a/target/linux/ipq807x/patches-5.15/0074-v6.0-PCI-dwc-Move-GEN3_RELATED-DBI-definitions-to-common-.patch b/target/linux/ipq807x/patches-5.15/0074-v6.0-PCI-dwc-Move-GEN3_RELATED-DBI-definitions-to-common-.patch
+deleted file mode 100644
+index 626507abb2..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0074-v6.0-PCI-dwc-Move-GEN3_RELATED-DBI-definitions-to-common-.patch
++++ /dev/null
+@@ -1,46 +0,0 @@
+-From 8df9fefd1d04f6f97f6015d7347104f69e6ea580 Mon Sep 17 00:00:00 2001
+-From: Baruch Siach <baruch.siach@siklu.com>
+-Date: Tue, 21 Jun 2022 11:54:52 +0300
+-Subject: [PATCH] PCI: dwc: Move GEN3_RELATED DBI definitions to common header
+-
+-These are common dwc macros that will be used for other platforms.
+-
+-Link: https://lore.kernel.org/r/1c2d5a7a139be81fa15f356b2380163dbdebdc09.1655799816.git.baruch@tkos.co.il
+-Signed-off-by: Baruch Siach <baruch.siach@siklu.com>
+-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+-Reviewed-by: Rob Herring <robh@kernel.org>
+----
+- drivers/pci/controller/dwc/pcie-designware.h | 6 ++++++
+- drivers/pci/controller/dwc/pcie-tegra194.c   | 6 ------
+- 2 files changed, 6 insertions(+), 6 deletions(-)
+-
+---- a/drivers/pci/controller/dwc/pcie-designware.h
+-+++ b/drivers/pci/controller/dwc/pcie-designware.h
+-@@ -74,6 +74,12 @@
+- #define PCIE_MSI_INTR0_MASK		0x82C
+- #define PCIE_MSI_INTR0_STATUS		0x830
+- 
+-+#define GEN3_RELATED_OFF			0x890
+-+#define GEN3_RELATED_OFF_GEN3_ZRXDC_NONCOMPL	BIT(0)
+-+#define GEN3_RELATED_OFF_GEN3_EQ_DISABLE	BIT(16)
+-+#define GEN3_RELATED_OFF_RATE_SHADOW_SEL_SHIFT	24
+-+#define GEN3_RELATED_OFF_RATE_SHADOW_SEL_MASK	GENMASK(25, 24)
+-+
+- #define PCIE_PORT_MULTI_LANE_CTRL	0x8C0
+- #define PORT_MLTI_UPCFG_SUPPORT		BIT(7)
+- 
+---- a/drivers/pci/controller/dwc/pcie-tegra194.c
+-+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
+-@@ -193,12 +193,6 @@
+- #define GEN3_EQ_CONTROL_OFF_PSET_REQ_VEC_MASK	GENMASK(23, 8)
+- #define GEN3_EQ_CONTROL_OFF_FB_MODE_MASK	GENMASK(3, 0)
+- 
+--#define GEN3_RELATED_OFF			0x890
+--#define GEN3_RELATED_OFF_GEN3_ZRXDC_NONCOMPL	BIT(0)
+--#define GEN3_RELATED_OFF_GEN3_EQ_DISABLE	BIT(16)
+--#define GEN3_RELATED_OFF_RATE_SHADOW_SEL_SHIFT	24
+--#define GEN3_RELATED_OFF_RATE_SHADOW_SEL_MASK	GENMASK(25, 24)
+--
+- #define PORT_LOGIC_AMBA_ERROR_RESPONSE_DEFAULT	0x8D0
+- #define AMBA_ERROR_RESPONSE_CRS_SHIFT		3
+- #define AMBA_ERROR_RESPONSE_CRS_MASK		GENMASK(1, 0)
+diff --git a/target/linux/ipq807x/patches-5.15/0075-v6.0-PCI-qcom-Define-slot-capabilities-using-PCI_EXP_SLTC.patch b/target/linux/ipq807x/patches-5.15/0075-v6.0-PCI-qcom-Define-slot-capabilities-using-PCI_EXP_SLTC.patch
+deleted file mode 100644
+index bc1464b126..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0075-v6.0-PCI-qcom-Define-slot-capabilities-using-PCI_EXP_SLTC.patch
++++ /dev/null
+@@ -1,51 +0,0 @@
+-From d568739f1c21e1768a887ff85611769f782eb64f Mon Sep 17 00:00:00 2001
+-From: Baruch Siach <baruch.siach@siklu.com>
+-Date: Tue, 21 Jun 2022 11:54:53 +0300
+-Subject: [PATCH] PCI: qcom: Define slot capabilities using PCI_EXP_SLTCAP_*
+-
+-The PCIE_CAP_LINK1_VAL macro actually defines slot capabilities. Use
+-PCI_EXP_SLTCAP_* macros to spell its value, and rename it to better
+-describe its meaning.
+-
+-Link: https://lore.kernel.org/r/3025d5e1d8da64798db6958f9780c4763fbcac47.1655799816.git.baruch@tkos.co.il
+-Signed-off-by: Baruch Siach <baruch.siach@siklu.com>
+-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+-Reviewed-by: Rob Herring <robh@kernel.org>
+-Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
+----
+- drivers/pci/controller/dwc/pcie-qcom.c | 17 +++++++++++++++--
+- 1 file changed, 15 insertions(+), 2 deletions(-)
+-
+---- a/drivers/pci/controller/dwc/pcie-qcom.c
+-+++ b/drivers/pci/controller/dwc/pcie-qcom.c
+-@@ -69,7 +69,20 @@
+- #define PCIE20_AXI_MSTR_RESP_COMP_CTRL1		0x81c
+- #define CFG_BRIDGE_SB_INIT			BIT(0)
+- 
+--#define PCIE_CAP_LINK1_VAL			0x2FD7F
+-+#define PCIE_CAP_SLOT_POWER_LIMIT_VAL		FIELD_PREP(PCI_EXP_SLTCAP_SPLV, \
+-+						250)
+-+#define PCIE_CAP_SLOT_POWER_LIMIT_SCALE		FIELD_PREP(PCI_EXP_SLTCAP_SPLS, \
+-+						1)
+-+#define PCIE_CAP_SLOT_VAL			(PCI_EXP_SLTCAP_ABP | \
+-+						PCI_EXP_SLTCAP_PCP | \
+-+						PCI_EXP_SLTCAP_MRLSP | \
+-+						PCI_EXP_SLTCAP_AIP | \
+-+						PCI_EXP_SLTCAP_PIP | \
+-+						PCI_EXP_SLTCAP_HPS | \
+-+						PCI_EXP_SLTCAP_HPC | \
+-+						PCI_EXP_SLTCAP_EIP | \
+-+						PCIE_CAP_SLOT_POWER_LIMIT_VAL | \
+-+						PCIE_CAP_SLOT_POWER_LIMIT_SCALE)
+- 
+- #define PCIE20_PARF_Q2A_FLUSH			0x1AC
+- 
+-@@ -1125,7 +1138,7 @@ static int qcom_pcie_post_init_2_3_3(str
+- 
+- 	writel(PCI_COMMAND_MASTER, pci->dbi_base + PCI_COMMAND);
+- 	writel(DBI_RO_WR_EN, pci->dbi_base + PCIE20_MISC_CONTROL_1_REG);
+--	writel(PCIE_CAP_LINK1_VAL, pci->dbi_base + offset + PCI_EXP_SLTCAP);
+-+	writel(PCIE_CAP_SLOT_VAL, pci->dbi_base + offset + PCI_EXP_SLTCAP);
+- 
+- 	val = readl(pci->dbi_base + offset + PCI_EXP_LNKCAP);
+- 	val &= ~PCI_EXP_LNKCAP_ASPMS;
+diff --git a/target/linux/ipq807x/patches-5.15/0076-v5.16-PCI-qcom-Replace-ops-with-struct-pcie_cfg-in-pcie-ma.patch b/target/linux/ipq807x/patches-5.15/0076-v5.16-PCI-qcom-Replace-ops-with-struct-pcie_cfg-in-pcie-ma.patch
+deleted file mode 100644
+index b29512fb76..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0076-v5.16-PCI-qcom-Replace-ops-with-struct-pcie_cfg-in-pcie-ma.patch
++++ /dev/null
+@@ -1,122 +0,0 @@
+-From 180ce25d5c3ccff206f084b7ab350778641d1b1c Mon Sep 17 00:00:00 2001
+-From: Prasad Malisetty <pmaliset@codeaurora.org>
+-Date: Thu, 7 Oct 2021 23:18:42 +0530
+-Subject: [PATCH] PCI: qcom: Replace ops with struct pcie_cfg in pcie match
+- data
+-
+-Add struct qcom_pcie_cfg as match data for all platforms.  Assign
+-appropriate platform ops into struct qcom_pcie_cfg and read using
+-of_device_get_match_data() in qcom_pcie_probe().
+-
+-Link: https://lore.kernel.org/r/1633628923-25047-5-git-send-email-pmaliset@codeaurora.org
+-Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org>
+-Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
+-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+-Reviewed-by: Stephen Boyd <swboyd@chromium.org>
+----
+- drivers/pci/controller/dwc/pcie-qcom.c | 66 +++++++++++++++++++++-----
+- 1 file changed, 55 insertions(+), 11 deletions(-)
+-
+---- a/drivers/pci/controller/dwc/pcie-qcom.c
+-+++ b/drivers/pci/controller/dwc/pcie-qcom.c
+-@@ -202,6 +202,10 @@ struct qcom_pcie_ops {
+- 	int (*config_sid)(struct qcom_pcie *pcie);
+- };
+- 
+-+struct qcom_pcie_cfg {
+-+	const struct qcom_pcie_ops *ops;
+-+};
+-+
+- struct qcom_pcie {
+- 	struct dw_pcie *pci;
+- 	void __iomem *parf;			/* DT parf */
+-@@ -1467,6 +1471,38 @@ static const struct qcom_pcie_ops ops_1_
+- 	.config_sid = qcom_pcie_config_sid_sm8250,
+- };
+- 
+-+static const struct qcom_pcie_cfg apq8084_cfg = {
+-+	.ops = &ops_1_0_0,
+-+};
+-+
+-+static const struct qcom_pcie_cfg ipq8064_cfg = {
+-+	.ops = &ops_2_1_0,
+-+};
+-+
+-+static const struct qcom_pcie_cfg msm8996_cfg = {
+-+	.ops = &ops_2_3_2,
+-+};
+-+
+-+static const struct qcom_pcie_cfg ipq8074_cfg = {
+-+	.ops = &ops_2_3_3,
+-+};
+-+
+-+static const struct qcom_pcie_cfg ipq4019_cfg = {
+-+	.ops = &ops_2_4_0,
+-+};
+-+
+-+static const struct qcom_pcie_cfg sdm845_cfg = {
+-+	.ops = &ops_2_7_0,
+-+};
+-+
+-+static const struct qcom_pcie_cfg sm8250_cfg = {
+-+	.ops = &ops_1_9_0,
+-+};
+-+
+-+static const struct qcom_pcie_cfg sc7280_cfg = {
+-+	.ops = &ops_1_9_0,
+-+};
+-+
+- static const struct dw_pcie_ops dw_pcie_ops = {
+- 	.link_up = qcom_pcie_link_up,
+- 	.start_link = qcom_pcie_start_link,
+-@@ -1478,6 +1514,7 @@ static int qcom_pcie_probe(struct platfo
+- 	struct pcie_port *pp;
+- 	struct dw_pcie *pci;
+- 	struct qcom_pcie *pcie;
+-+	const struct qcom_pcie_cfg *pcie_cfg;
+- 	int ret;
+- 
+- 	pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
+-@@ -1499,7 +1536,13 @@ static int qcom_pcie_probe(struct platfo
+- 
+- 	pcie->pci = pci;
+- 
+--	pcie->ops = of_device_get_match_data(dev);
+-+	pcie_cfg = of_device_get_match_data(dev);
+-+	if (!pcie_cfg || !pcie_cfg->ops) {
+-+		dev_err(dev, "Invalid platform data\n");
+-+		return -EINVAL;
+-+	}
+-+
+-+	pcie->ops = pcie_cfg->ops;
+- 
+- 	pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_HIGH);
+- 	if (IS_ERR(pcie->reset)) {
+-@@ -1555,16 +1598,17 @@ err_pm_runtime_put:
+- }
+- 
+- static const struct of_device_id qcom_pcie_match[] = {
+--	{ .compatible = "qcom,pcie-apq8084", .data = &ops_1_0_0 },
+--	{ .compatible = "qcom,pcie-ipq8064", .data = &ops_2_1_0 },
+--	{ .compatible = "qcom,pcie-ipq8064-v2", .data = &ops_2_1_0 },
+--	{ .compatible = "qcom,pcie-apq8064", .data = &ops_2_1_0 },
+--	{ .compatible = "qcom,pcie-msm8996", .data = &ops_2_3_2 },
+--	{ .compatible = "qcom,pcie-ipq8074", .data = &ops_2_3_3 },
+--	{ .compatible = "qcom,pcie-ipq4019", .data = &ops_2_4_0 },
+--	{ .compatible = "qcom,pcie-qcs404", .data = &ops_2_4_0 },
+--	{ .compatible = "qcom,pcie-sdm845", .data = &ops_2_7_0 },
+--	{ .compatible = "qcom,pcie-sm8250", .data = &ops_1_9_0 },
+-+	{ .compatible = "qcom,pcie-apq8084", .data = &apq8084_cfg },
+-+	{ .compatible = "qcom,pcie-ipq8064", .data = &ipq8064_cfg },
+-+	{ .compatible = "qcom,pcie-ipq8064-v2", .data = &ipq8064_cfg },
+-+	{ .compatible = "qcom,pcie-apq8064", .data = &ipq8064_cfg },
+-+	{ .compatible = "qcom,pcie-msm8996", .data = &msm8996_cfg },
+-+	{ .compatible = "qcom,pcie-ipq8074", .data = &ipq8074_cfg },
+-+	{ .compatible = "qcom,pcie-ipq4019", .data = &ipq4019_cfg },
+-+	{ .compatible = "qcom,pcie-qcs404", .data = &ipq4019_cfg },
+-+	{ .compatible = "qcom,pcie-sdm845", .data = &sdm845_cfg },
+-+	{ .compatible = "qcom,pcie-sm8250", .data = &sm8250_cfg },
+-+	{ .compatible = "qcom,pcie-sc7280", .data = &sc7280_cfg },
+- 	{ }
+- };
+- 
+diff --git a/target/linux/ipq807x/patches-5.15/0077-v6.0-PCI-qcom-Add-IPQ60xx-support.patch b/target/linux/ipq807x/patches-5.15/0077-v6.0-PCI-qcom-Add-IPQ60xx-support.patch
+deleted file mode 100644
+index af8ba2a4e1..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0077-v6.0-PCI-qcom-Add-IPQ60xx-support.patch
++++ /dev/null
+@@ -1,220 +0,0 @@
+-From a7d96ca20847ade9f29cff4521f43b8ae968b3df Mon Sep 17 00:00:00 2001
+-From: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
+-Date: Tue, 21 Jun 2022 11:54:54 +0300
+-Subject: [PATCH] PCI: qcom: Add IPQ60xx support
+-
+-IPQ60xx series of SoCs have one port of PCIe gen 3. Add support for that
+-platform.
+-
+-The code is based on downstream[1] Codeaurora kernel v5.4 (branch
+-win.linuxopenwrt.2.0).
+-
+-Split out the DBI registers access part from .init into .post_init. DBI
+-registers are only accessible after phy_power_on().
+-
+-[1] https://source.codeaurora.org/quic/qsdk/oss/kernel/linux-ipq-5.4/
+-
+-Link: https://lore.kernel.org/r/f7f848653c99abbf9a0f877949a44e52329543ae.1655799816.git.baruch@tkos.co.il
+-Tested-by: Robert Marko <robert.marko@sartura.hr>
+-Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
+-Signed-off-by: Baruch Siach <baruch.siach@siklu.com>
+-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+-Reviewed-by: Rob Herring <robh@kernel.org>
+-Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
+-Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
+----
+- drivers/pci/controller/dwc/pcie-designware.h |   1 +
+- drivers/pci/controller/dwc/pcie-qcom.c       | 130 +++++++++++++++++++
+- 2 files changed, 131 insertions(+)
+-
+---- a/drivers/pci/controller/dwc/pcie-designware.h
+-+++ b/drivers/pci/controller/dwc/pcie-designware.h
+-@@ -76,6 +76,7 @@
+- 
+- #define GEN3_RELATED_OFF			0x890
+- #define GEN3_RELATED_OFF_GEN3_ZRXDC_NONCOMPL	BIT(0)
+-+#define GEN3_RELATED_OFF_RXEQ_RGRDLESS_RXTS	BIT(13)
+- #define GEN3_RELATED_OFF_GEN3_EQ_DISABLE	BIT(16)
+- #define GEN3_RELATED_OFF_RATE_SHADOW_SEL_SHIFT	24
+- #define GEN3_RELATED_OFF_RATE_SHADOW_SEL_MASK	GENMASK(25, 24)
+---- a/drivers/pci/controller/dwc/pcie-qcom.c
+-+++ b/drivers/pci/controller/dwc/pcie-qcom.c
+-@@ -52,6 +52,10 @@
+- #define PCIE20_PARF_DBI_BASE_ADDR		0x168
+- #define PCIE20_PARF_SLV_ADDR_SPACE_SIZE		0x16C
+- #define PCIE20_PARF_MHI_CLOCK_RESET_CTRL	0x174
+-+#define AHB_CLK_EN				BIT(0)
+-+#define MSTR_AXI_CLK_EN				BIT(1)
+-+#define BYPASS					BIT(4)
+-+
+- #define PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT	0x178
+- #define PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2	0x1A8
+- #define PCIE20_PARF_LTSSM			0x1B0
+-@@ -181,6 +185,11 @@ struct qcom_pcie_resources_2_7_0 {
+- 	struct clk *pipe_clk;
+- };
+- 
+-+struct qcom_pcie_resources_2_9_0 {
+-+	struct clk_bulk_data clks[5];
+-+	struct reset_control *rst;
+-+};
+-+
+- union qcom_pcie_resources {
+- 	struct qcom_pcie_resources_1_0_0 v1_0_0;
+- 	struct qcom_pcie_resources_2_1_0 v2_1_0;
+-@@ -188,6 +197,7 @@ union qcom_pcie_resources {
+- 	struct qcom_pcie_resources_2_3_3 v2_3_3;
+- 	struct qcom_pcie_resources_2_4_0 v2_4_0;
+- 	struct qcom_pcie_resources_2_7_0 v2_7_0;
+-+	struct qcom_pcie_resources_2_9_0 v2_9_0;
+- };
+- 
+- struct qcom_pcie;
+-@@ -1280,6 +1290,112 @@ static void qcom_pcie_post_deinit_2_7_0(
+- 	clk_disable_unprepare(res->pipe_clk);
+- }
+- 
+-+static int qcom_pcie_get_resources_2_9_0(struct qcom_pcie *pcie)
+-+{
+-+	struct qcom_pcie_resources_2_9_0 *res = &pcie->res.v2_9_0;
+-+	struct dw_pcie *pci = pcie->pci;
+-+	struct device *dev = pci->dev;
+-+	int ret;
+-+
+-+	res->clks[0].id = "iface";
+-+	res->clks[1].id = "axi_m";
+-+	res->clks[2].id = "axi_s";
+-+	res->clks[3].id = "axi_bridge";
+-+	res->clks[4].id = "rchng";
+-+
+-+	ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks);
+-+	if (ret < 0)
+-+		return ret;
+-+
+-+	res->rst = devm_reset_control_array_get_exclusive(dev);
+-+	if (IS_ERR(res->rst))
+-+		return PTR_ERR(res->rst);
+-+
+-+	return 0;
+-+}
+-+
+-+static void qcom_pcie_deinit_2_9_0(struct qcom_pcie *pcie)
+-+{
+-+	struct qcom_pcie_resources_2_9_0 *res = &pcie->res.v2_9_0;
+-+
+-+	clk_bulk_disable_unprepare(ARRAY_SIZE(res->clks), res->clks);
+-+}
+-+
+-+static int qcom_pcie_init_2_9_0(struct qcom_pcie *pcie)
+-+{
+-+	struct qcom_pcie_resources_2_9_0 *res = &pcie->res.v2_9_0;
+-+	struct device *dev = pcie->pci->dev;
+-+	int ret;
+-+
+-+	ret = reset_control_assert(res->rst);
+-+	if (ret) {
+-+		dev_err(dev, "reset assert failed (%d)\n", ret);
+-+		return ret;
+-+	}
+-+
+-+	/*
+-+	 * Delay periods before and after reset deassert are working values
+-+	 * from downstream Codeaurora kernel
+-+	 */
+-+	usleep_range(2000, 2500);
+-+
+-+	ret = reset_control_deassert(res->rst);
+-+	if (ret) {
+-+		dev_err(dev, "reset deassert failed (%d)\n", ret);
+-+		return ret;
+-+	}
+-+
+-+	usleep_range(2000, 2500);
+-+
+-+	return clk_bulk_prepare_enable(ARRAY_SIZE(res->clks), res->clks);
+-+}
+-+
+-+static int qcom_pcie_post_init_2_9_0(struct qcom_pcie *pcie)
+-+{
+-+	struct dw_pcie *pci = pcie->pci;
+-+	u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
+-+	u32 val;
+-+	int i;
+-+
+-+	writel(SLV_ADDR_SPACE_SZ,
+-+		pcie->parf + PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE);
+-+
+-+	val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
+-+	val &= ~BIT(0);
+-+	writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
+-+
+-+	writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR);
+-+
+-+	writel(DEVICE_TYPE_RC, pcie->parf + PCIE20_PARF_DEVICE_TYPE);
+-+	writel(BYPASS | MSTR_AXI_CLK_EN | AHB_CLK_EN,
+-+		pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL);
+-+	writel(GEN3_RELATED_OFF_RXEQ_RGRDLESS_RXTS |
+-+		GEN3_RELATED_OFF_GEN3_ZRXDC_NONCOMPL,
+-+		pci->dbi_base + GEN3_RELATED_OFF);
+-+
+-+	writel(MST_WAKEUP_EN | SLV_WAKEUP_EN | MSTR_ACLK_CGC_DIS |
+-+		SLV_ACLK_CGC_DIS | CORE_CLK_CGC_DIS |
+-+		AUX_PWR_DET | L23_CLK_RMV_DIS | L1_CLK_RMV_DIS,
+-+		pcie->parf + PCIE20_PARF_SYS_CTRL);
+-+
+-+	writel(0, pcie->parf + PCIE20_PARF_Q2A_FLUSH);
+-+
+-+	dw_pcie_dbi_ro_wr_en(pci);
+-+	writel(PCIE_CAP_SLOT_VAL, pci->dbi_base + offset + PCI_EXP_SLTCAP);
+-+
+-+	val = readl(pci->dbi_base + offset + PCI_EXP_LNKCAP);
+-+	val &= ~PCI_EXP_LNKCAP_ASPMS;
+-+	writel(val, pci->dbi_base + offset + PCI_EXP_LNKCAP);
+-+
+-+	writel(PCI_EXP_DEVCTL2_COMP_TMOUT_DIS, pci->dbi_base + offset +
+-+			PCI_EXP_DEVCTL2);
+-+
+-+	for (i = 0; i < 256; i++)
+-+		writel(0, pcie->parf + PCIE20_PARF_BDF_TO_SID_TABLE_N + (4 * i));
+-+
+-+	return 0;
+-+}
+-+
+- static int qcom_pcie_link_up(struct dw_pcie *pci)
+- {
+- 	u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
+-@@ -1471,6 +1587,15 @@ static const struct qcom_pcie_ops ops_1_
+- 	.config_sid = qcom_pcie_config_sid_sm8250,
+- };
+- 
+-+/* Qcom IP rev.: 2.9.0  Synopsys IP rev.: 5.00a */
+-+static const struct qcom_pcie_ops ops_2_9_0 = {
+-+	.get_resources = qcom_pcie_get_resources_2_9_0,
+-+	.init = qcom_pcie_init_2_9_0,
+-+	.post_init = qcom_pcie_post_init_2_9_0,
+-+	.deinit = qcom_pcie_deinit_2_9_0,
+-+	.ltssm_enable = qcom_pcie_2_3_2_ltssm_enable,
+-+};
+-+
+- static const struct qcom_pcie_cfg apq8084_cfg = {
+- 	.ops = &ops_1_0_0,
+- };
+-@@ -1503,6 +1628,10 @@ static const struct qcom_pcie_cfg sc7280
+- 	.ops = &ops_1_9_0,
+- };
+- 
+-+static const struct qcom_pcie_cfg ipq6018_cfg = {
+-+	.ops = &ops_2_9_0,
+-+};
+-+
+- static const struct dw_pcie_ops dw_pcie_ops = {
+- 	.link_up = qcom_pcie_link_up,
+- 	.start_link = qcom_pcie_start_link,
+-@@ -1609,6 +1738,7 @@ static const struct of_device_id qcom_pc
+- 	{ .compatible = "qcom,pcie-sdm845", .data = &sdm845_cfg },
+- 	{ .compatible = "qcom,pcie-sm8250", .data = &sm8250_cfg },
+- 	{ .compatible = "qcom,pcie-sc7280", .data = &sc7280_cfg },
+-+	{ .compatible = "qcom,pcie-ipq6018", .data = &ipq6018_cfg },
+- 	{ }
+- };
+- 
+diff --git a/target/linux/ipq807x/patches-5.15/0078-v5.19-clk-qcom-rcg2-Cache-CFG-register-updates-for-parked-.patch b/target/linux/ipq807x/patches-5.15/0078-v5.19-clk-qcom-rcg2-Cache-CFG-register-updates-for-parked-.patch
+deleted file mode 100644
+index 5300c36dce..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0078-v5.19-clk-qcom-rcg2-Cache-CFG-register-updates-for-parked-.patch
++++ /dev/null
+@@ -1,288 +0,0 @@
+-From e8e7ce92a49dc87f0d006cfbfe419b8e0b25476d Mon Sep 17 00:00:00 2001
+-From: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Date: Tue, 26 Apr 2022 14:21:36 -0700
+-Subject: [PATCH] clk: qcom: rcg2: Cache CFG register updates for parked RCGs
+-
+-As GDSCs are turned on and off some associated clocks are momentarily
+-enabled for house keeping purposes. For this, and similar, purposes the
+-"shared RCGs" will park the RCG on a source clock which is known to be
+-available.
+-When the RCG is parked, a safe clock source will be selected and
+-committed, then the original source would be written back and upon enable
+-the change back to the unparked source would be committed.
+-
+-But starting with SM8350 this fails, as the value in CFG is committed by
+-the GDSC handshake and without a ticking parent the GDSC enablement will
+-time out.
+-
+-This becomes a concrete problem if the runtime supended state of a
+-device includes disabling such rcg's parent clock. As the device
+-attempts to power up the domain again the rcg will fail to enable and
+-hence the GDSC enablement will fail, preventing the device from
+-returning from the suspended state.
+-
+-This can be seen in e.g. the display stack during probe on SM8350.
+-
+-To avoid this problem, the software needs to ensure that the RCG is
+-configured to a active parent clock while it is disabled. This is done
+-by caching the CFG register content while the shared RCG is parked on
+-this safe source.
+-
+-Writes to M, N and D registers are committed as they are requested. New
+-helpers for get_parent() and recalc_rate() are extracted from their
+-previous implementations and __clk_rcg2_configure() is modified to allow
+-it to operate on the cached value.
+-
+-Fixes: 7ef6f11887bd ("clk: qcom: Configure the RCGs to a safe source as needed")
+-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+-Reviewed-by: Stephen Boyd <sboyd@kernel.org>
+-Link: https://lore.kernel.org/r/20220426212136.1543984-1-bjorn.andersson@linaro.org
+----
+- drivers/clk/qcom/clk-rcg.h  |   2 +
+- drivers/clk/qcom/clk-rcg2.c | 126 ++++++++++++++++++++++++++++--------
+- 2 files changed, 101 insertions(+), 27 deletions(-)
+-
+---- a/drivers/clk/qcom/clk-rcg.h
+-+++ b/drivers/clk/qcom/clk-rcg.h
+-@@ -139,6 +139,7 @@ extern const struct clk_ops clk_dyn_rcg_
+-  * @freq_tbl: frequency table
+-  * @clkr: regmap clock handle
+-  * @cfg_off: defines the cfg register offset from the CMD_RCGR + CFG_REG
+-+ * @parked_cfg: cached value of the CFG register for parked RCGs
+-  */
+- struct clk_rcg2 {
+- 	u32			cmd_rcgr;
+-@@ -149,6 +150,7 @@ struct clk_rcg2 {
+- 	const struct freq_tbl	*freq_tbl;
+- 	struct clk_regmap	clkr;
+- 	u8			cfg_off;
+-+	u32			parked_cfg;
+- };
+- 
+- #define to_clk_rcg2(_hw) container_of(to_clk_regmap(_hw), struct clk_rcg2, clkr)
+---- a/drivers/clk/qcom/clk-rcg2.c
+-+++ b/drivers/clk/qcom/clk-rcg2.c
+-@@ -74,16 +74,11 @@ static int clk_rcg2_is_enabled(struct cl
+- 	return (cmd & CMD_ROOT_OFF) == 0;
+- }
+- 
+--static u8 clk_rcg2_get_parent(struct clk_hw *hw)
+-+static u8 __clk_rcg2_get_parent(struct clk_hw *hw, u32 cfg)
+- {
+- 	struct clk_rcg2 *rcg = to_clk_rcg2(hw);
+- 	int num_parents = clk_hw_get_num_parents(hw);
+--	u32 cfg;
+--	int i, ret;
+--
+--	ret = regmap_read(rcg->clkr.regmap, RCG_CFG_OFFSET(rcg), &cfg);
+--	if (ret)
+--		goto err;
+-+	int i;
+- 
+- 	cfg &= CFG_SRC_SEL_MASK;
+- 	cfg >>= CFG_SRC_SEL_SHIFT;
+-@@ -92,12 +87,27 @@ static u8 clk_rcg2_get_parent(struct clk
+- 		if (cfg == rcg->parent_map[i].cfg)
+- 			return i;
+- 
+--err:
+- 	pr_debug("%s: Clock %s has invalid parent, using default.\n",
+- 		 __func__, clk_hw_get_name(hw));
+- 	return 0;
+- }
+- 
+-+static u8 clk_rcg2_get_parent(struct clk_hw *hw)
+-+{
+-+	struct clk_rcg2 *rcg = to_clk_rcg2(hw);
+-+	u32 cfg;
+-+	int ret;
+-+
+-+	ret = regmap_read(rcg->clkr.regmap, RCG_CFG_OFFSET(rcg), &cfg);
+-+	if (ret) {
+-+		pr_debug("%s: Unable to read CFG register for %s\n",
+-+			 __func__, clk_hw_get_name(hw));
+-+		return 0;
+-+	}
+-+
+-+	return __clk_rcg2_get_parent(hw, cfg);
+-+}
+-+
+- static int update_config(struct clk_rcg2 *rcg)
+- {
+- 	int count, ret;
+-@@ -164,12 +174,10 @@ calc_rate(unsigned long rate, u32 m, u32
+- }
+- 
+- static unsigned long
+--clk_rcg2_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
+-+__clk_rcg2_recalc_rate(struct clk_hw *hw, unsigned long parent_rate, u32 cfg)
+- {
+- 	struct clk_rcg2 *rcg = to_clk_rcg2(hw);
+--	u32 cfg, hid_div, m = 0, n = 0, mode = 0, mask;
+--
+--	regmap_read(rcg->clkr.regmap, RCG_CFG_OFFSET(rcg), &cfg);
+-+	u32 hid_div, m = 0, n = 0, mode = 0, mask;
+- 
+- 	if (rcg->mnd_width) {
+- 		mask = BIT(rcg->mnd_width) - 1;
+-@@ -190,6 +198,17 @@ clk_rcg2_recalc_rate(struct clk_hw *hw,
+- 	return calc_rate(parent_rate, m, n, mode, hid_div);
+- }
+- 
+-+static unsigned long
+-+clk_rcg2_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
+-+{
+-+	struct clk_rcg2 *rcg = to_clk_rcg2(hw);
+-+	u32 cfg;
+-+
+-+	regmap_read(rcg->clkr.regmap, RCG_CFG_OFFSET(rcg), &cfg);
+-+
+-+	return __clk_rcg2_recalc_rate(hw, parent_rate, cfg);
+-+}
+-+
+- static int _freq_tbl_determine_rate(struct clk_hw *hw, const struct freq_tbl *f,
+- 				    struct clk_rate_request *req,
+- 				    enum freq_policy policy)
+-@@ -263,7 +282,8 @@ static int clk_rcg2_determine_floor_rate
+- 	return _freq_tbl_determine_rate(hw, rcg->freq_tbl, req, FLOOR);
+- }
+- 
+--static int __clk_rcg2_configure(struct clk_rcg2 *rcg, const struct freq_tbl *f)
+-+static int __clk_rcg2_configure(struct clk_rcg2 *rcg, const struct freq_tbl *f,
+-+				u32 *_cfg)
+- {
+- 	u32 cfg, mask, d_val, not2d_val, n_minus_m;
+- 	struct clk_hw *hw = &rcg->clkr.hw;
+-@@ -305,15 +325,27 @@ static int __clk_rcg2_configure(struct c
+- 	cfg |= rcg->parent_map[index].cfg << CFG_SRC_SEL_SHIFT;
+- 	if (rcg->mnd_width && f->n && (f->m != f->n))
+- 		cfg |= CFG_MODE_DUAL_EDGE;
+--	return regmap_update_bits(rcg->clkr.regmap, RCG_CFG_OFFSET(rcg),
+--					mask, cfg);
+-+
+-+	*_cfg &= ~mask;
+-+	*_cfg |= cfg;
+-+
+-+	return 0;
+- }
+- 
+- static int clk_rcg2_configure(struct clk_rcg2 *rcg, const struct freq_tbl *f)
+- {
+-+	u32 cfg;
+- 	int ret;
+- 
+--	ret = __clk_rcg2_configure(rcg, f);
+-+	ret = regmap_read(rcg->clkr.regmap, RCG_CFG_OFFSET(rcg), &cfg);
+-+	if (ret)
+-+		return ret;
+-+
+-+	ret = __clk_rcg2_configure(rcg, f, &cfg);
+-+	if (ret)
+-+		return ret;
+-+
+-+	ret = regmap_write(rcg->clkr.regmap, RCG_CFG_OFFSET(rcg), cfg);
+- 	if (ret)
+- 		return ret;
+- 
+-@@ -994,11 +1026,12 @@ static int clk_rcg2_shared_set_rate(stru
+- 		return -EINVAL;
+- 
+- 	/*
+--	 * In case clock is disabled, update the CFG, M, N and D registers
+--	 * and don't hit the update bit of CMD register.
+-+	 * In case clock is disabled, update the M, N and D registers, cache
+-+	 * the CFG value in parked_cfg and don't hit the update bit of CMD
+-+	 * register.
+- 	 */
+--	if (!__clk_is_enabled(hw->clk))
+--		return __clk_rcg2_configure(rcg, f);
+-+	if (!clk_hw_is_enabled(hw))
+-+		return __clk_rcg2_configure(rcg, f, &rcg->parked_cfg);
+- 
+- 	return clk_rcg2_shared_force_enable_clear(hw, f);
+- }
+-@@ -1022,6 +1055,11 @@ static int clk_rcg2_shared_enable(struct
+- 	if (ret)
+- 		return ret;
+- 
+-+	/* Write back the stored configuration corresponding to current rate */
+-+	ret = regmap_write(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, rcg->parked_cfg);
+-+	if (ret)
+-+		return ret;
+-+
+- 	ret = update_config(rcg);
+- 	if (ret)
+- 		return ret;
+-@@ -1032,13 +1070,12 @@ static int clk_rcg2_shared_enable(struct
+- static void clk_rcg2_shared_disable(struct clk_hw *hw)
+- {
+- 	struct clk_rcg2 *rcg = to_clk_rcg2(hw);
+--	u32 cfg;
+- 
+- 	/*
+- 	 * Store current configuration as switching to safe source would clear
+- 	 * the SRC and DIV of CFG register
+- 	 */
+--	regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg);
+-+	regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &rcg->parked_cfg);
+- 
+- 	/*
+- 	 * Park the RCG at a safe configuration - sourced off of safe source.
+-@@ -1056,17 +1093,52 @@ static void clk_rcg2_shared_disable(stru
+- 	update_config(rcg);
+- 
+- 	clk_rcg2_clear_force_enable(hw);
+-+}
+- 
+--	/* Write back the stored configuration corresponding to current rate */
+--	regmap_write(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, cfg);
+-+static u8 clk_rcg2_shared_get_parent(struct clk_hw *hw)
+-+{
+-+	struct clk_rcg2 *rcg = to_clk_rcg2(hw);
+-+
+-+	/* If the shared rcg is parked use the cached cfg instead */
+-+	if (!clk_hw_is_enabled(hw))
+-+		return __clk_rcg2_get_parent(hw, rcg->parked_cfg);
+-+
+-+	return clk_rcg2_get_parent(hw);
+-+}
+-+
+-+static int clk_rcg2_shared_set_parent(struct clk_hw *hw, u8 index)
+-+{
+-+	struct clk_rcg2 *rcg = to_clk_rcg2(hw);
+-+
+-+	/* If the shared rcg is parked only update the cached cfg */
+-+	if (!clk_hw_is_enabled(hw)) {
+-+		rcg->parked_cfg &= ~CFG_SRC_SEL_MASK;
+-+		rcg->parked_cfg |= rcg->parent_map[index].cfg << CFG_SRC_SEL_SHIFT;
+-+
+-+		return 0;
+-+	}
+-+
+-+	return clk_rcg2_set_parent(hw, index);
+-+}
+-+
+-+static unsigned long
+-+clk_rcg2_shared_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
+-+{
+-+	struct clk_rcg2 *rcg = to_clk_rcg2(hw);
+-+
+-+	/* If the shared rcg is parked use the cached cfg instead */
+-+	if (!clk_hw_is_enabled(hw))
+-+		return __clk_rcg2_recalc_rate(hw, parent_rate, rcg->parked_cfg);
+-+
+-+	return clk_rcg2_recalc_rate(hw, parent_rate);
+- }
+- 
+- const struct clk_ops clk_rcg2_shared_ops = {
+- 	.enable = clk_rcg2_shared_enable,
+- 	.disable = clk_rcg2_shared_disable,
+--	.get_parent = clk_rcg2_get_parent,
+--	.set_parent = clk_rcg2_set_parent,
+--	.recalc_rate = clk_rcg2_recalc_rate,
+-+	.get_parent = clk_rcg2_shared_get_parent,
+-+	.set_parent = clk_rcg2_shared_set_parent,
+-+	.recalc_rate = clk_rcg2_shared_recalc_rate,
+- 	.determine_rate = clk_rcg2_determine_rate,
+- 	.set_rate = clk_rcg2_shared_set_rate,
+- 	.set_rate_and_parent = clk_rcg2_shared_set_rate_and_parent,
+diff --git a/target/linux/ipq807x/patches-5.15/0079-v6.2-dt-bindings-arm-qcom-document-qcom-msm-id-and-qcom-b.patch b/target/linux/ipq807x/patches-5.15/0079-v6.2-dt-bindings-arm-qcom-document-qcom-msm-id-and-qcom-b.patch
+deleted file mode 100644
+index 3319f431ba..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0079-v6.2-dt-bindings-arm-qcom-document-qcom-msm-id-and-qcom-b.patch
++++ /dev/null
+@@ -1,207 +0,0 @@
+-From 77faa07c185c969e742cbb3e6aa487a11b0b616c Mon Sep 17 00:00:00 2001
+-From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Date: Tue, 30 Aug 2022 09:57:42 +0300
+-Subject: [PATCH] dt-bindings: arm: qcom: document qcom,msm-id and
+- qcom,board-id
+-
+-The top level qcom,msm-id and qcom,board-id properties are utilized by
+-bootloaders on Qualcomm MSM platforms to determine which device tree
+-should be used and passed to the kernel.
+-
+-The commit b32e592d3c28 ("devicetree: bindings: Document qcom board
+-compatible format") from 2015 was a consensus during discussion about
+-upstreaming qcom,msm-id and qcom,board-id fields.  There are however still
+-problems with that consensus:
+-1. It was reached 7 years ago but it turned out its implementation did
+-   not reach all possible products.
+-
+-2. Initially additional tool (dtbTool) was needed for parsing these
+-   fields to create a QCDT image consisting of multiple DTBs, later the
+-   bootloaders were improved and they use these qcom,msm-id and
+-   qcom,board-id properties directly.
+-
+-3. Extracting relevant information from the board compatible requires
+-   this additional tool (dtbTool), which makes the build process more
+-   complicated and not easily reproducible (DTBs are modified after the
+-   kernel build).
+-
+-4. Some versions of Qualcomm bootloaders expect these properties even
+-   when booting with a single DTB.  The community is stuck with these
+-   bootloaders thus they require properties in the DTBs.
+-
+-Since several upstreamed Qualcomm SoC-based boards require these
+-properties to properly boot and the properties are reportedly used by
+-bootloaders, document them along with the bindings header with constants
+-used by: bootloader, some DTS and socinfo driver.
+-
+-Link: https://lore.kernel.org/r/a3c932d1-a102-ce18-deea-18cbbd05ecab@linaro.org/
+-Co-developed-by: Kumar Gala <galak@codeaurora.org>
+-Signed-off-by: Kumar Gala <galak@codeaurora.org>
+-Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+-Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+-Reviewed-by: Rob Herring <robh@kernel.org>
+-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+-Link: https://lore.kernel.org/r/20220830065744.161163-2-krzysztof.kozlowski@linaro.org
+----
+- include/dt-bindings/arm/qcom,ids.h | 155 +++++++++++++++++++++++++++++
+- 1 file changed, 155 insertions(+)
+- create mode 100644 include/dt-bindings/arm/qcom,ids.h
+-
+---- /dev/null
+-+++ b/include/dt-bindings/arm/qcom,ids.h
+-@@ -0,0 +1,155 @@
+-+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+-+/*
+-+ * Copyright (c) 2015, The Linux Foundation. All rights reserved.
+-+ * Copyright (c) 2022 Linaro Ltd
+-+ * Author: Krzysztof Kozlowski <krzk@kernel.org> based on previous work of Kumar Gala.
+-+ */
+-+#ifndef _DT_BINDINGS_ARM_QCOM_IDS_H
+-+#define _DT_BINDINGS_ARM_QCOM_IDS_H
+-+
+-+/*
+-+ * The MSM chipset and hardware revision used by Qualcomm bootloaders, DTS for
+-+ * older chipsets (qcom,msm-id) and in socinfo driver:
+-+ */
+-+#define QCOM_ID_MSM8960			87
+-+#define QCOM_ID_APQ8064			109
+-+#define QCOM_ID_MSM8660A		122
+-+#define QCOM_ID_MSM8260A		123
+-+#define QCOM_ID_APQ8060A		124
+-+#define QCOM_ID_MSM8974			126
+-+#define QCOM_ID_MPQ8064			130
+-+#define QCOM_ID_MSM8960AB		138
+-+#define QCOM_ID_APQ8060AB		139
+-+#define QCOM_ID_MSM8260AB		140
+-+#define QCOM_ID_MSM8660AB		141
+-+#define QCOM_ID_MSM8626			145
+-+#define QCOM_ID_MSM8610			147
+-+#define QCOM_ID_APQ8064AB		153
+-+#define QCOM_ID_MSM8226			158
+-+#define QCOM_ID_MSM8526			159
+-+#define QCOM_ID_MSM8110			161
+-+#define QCOM_ID_MSM8210			162
+-+#define QCOM_ID_MSM8810			163
+-+#define QCOM_ID_MSM8212			164
+-+#define QCOM_ID_MSM8612			165
+-+#define QCOM_ID_MSM8112			166
+-+#define QCOM_ID_MSM8225Q		168
+-+#define QCOM_ID_MSM8625Q		169
+-+#define QCOM_ID_MSM8125Q		170
+-+#define QCOM_ID_APQ8064AA		172
+-+#define QCOM_ID_APQ8084			178
+-+#define QCOM_ID_APQ8074			184
+-+#define QCOM_ID_MSM8274			185
+-+#define QCOM_ID_MSM8674			186
+-+#define QCOM_ID_MSM8974PRO_AC		194
+-+#define QCOM_ID_MSM8126			198
+-+#define QCOM_ID_APQ8026			199
+-+#define QCOM_ID_MSM8926			200
+-+#define QCOM_ID_MSM8326			205
+-+#define QCOM_ID_MSM8916			206
+-+#define QCOM_ID_MSM8994			207
+-+#define QCOM_ID_APQ8074PRO_AA		208
+-+#define QCOM_ID_APQ8074PRO_AB		209
+-+#define QCOM_ID_APQ8074PRO_AC		210
+-+#define QCOM_ID_MSM8274PRO_AA		211
+-+#define QCOM_ID_MSM8274PRO_AB		212
+-+#define QCOM_ID_MSM8274PRO_AC		213
+-+#define QCOM_ID_MSM8674PRO_AA		214
+-+#define QCOM_ID_MSM8674PRO_AB		215
+-+#define QCOM_ID_MSM8674PRO_AC		216
+-+#define QCOM_ID_MSM8974PRO_AA		217
+-+#define QCOM_ID_MSM8974PRO_AB		218
+-+#define QCOM_ID_APQ8028			219
+-+#define QCOM_ID_MSM8128			220
+-+#define QCOM_ID_MSM8228			221
+-+#define QCOM_ID_MSM8528			222
+-+#define QCOM_ID_MSM8628			223
+-+#define QCOM_ID_MSM8928			224
+-+#define QCOM_ID_MSM8510			225
+-+#define QCOM_ID_MSM8512			226
+-+#define QCOM_ID_MSM8936			233
+-+#define QCOM_ID_MSM8939			239
+-+#define QCOM_ID_APQ8036			240
+-+#define QCOM_ID_APQ8039			241
+-+#define QCOM_ID_MSM8996			246
+-+#define QCOM_ID_APQ8016			247
+-+#define QCOM_ID_MSM8216			248
+-+#define QCOM_ID_MSM8116			249
+-+#define QCOM_ID_MSM8616			250
+-+#define QCOM_ID_MSM8992			251
+-+#define QCOM_ID_APQ8094			253
+-+#define QCOM_ID_MDM9607			290
+-+#define QCOM_ID_APQ8096			291
+-+#define QCOM_ID_MSM8998			292
+-+#define QCOM_ID_MSM8953			293
+-+#define QCOM_ID_MDM8207			296
+-+#define QCOM_ID_MDM9207			297
+-+#define QCOM_ID_MDM9307			298
+-+#define QCOM_ID_MDM9628			299
+-+#define QCOM_ID_APQ8053			304
+-+#define QCOM_ID_MSM8996SG		305
+-+#define QCOM_ID_MSM8996AU		310
+-+#define QCOM_ID_APQ8096AU		311
+-+#define QCOM_ID_APQ8096SG		312
+-+#define QCOM_ID_SDM660			317
+-+#define QCOM_ID_SDM630			318
+-+#define QCOM_ID_APQ8098			319
+-+#define QCOM_ID_SDM845			321
+-+#define QCOM_ID_MDM9206			322
+-+#define QCOM_ID_IPQ8074			323
+-+#define QCOM_ID_SDA660			324
+-+#define QCOM_ID_SDM658			325
+-+#define QCOM_ID_SDA658			326
+-+#define QCOM_ID_SDA630			327
+-+#define QCOM_ID_SDM450			338
+-+#define QCOM_ID_SDA845			341
+-+#define QCOM_ID_IPQ8072			342
+-+#define QCOM_ID_IPQ8076			343
+-+#define QCOM_ID_IPQ8078			344
+-+#define QCOM_ID_SDM636			345
+-+#define QCOM_ID_SDA636			346
+-+#define QCOM_ID_SDM632			349
+-+#define QCOM_ID_SDA632			350
+-+#define QCOM_ID_SDA450			351
+-+#define QCOM_ID_SM8250			356
+-+#define QCOM_ID_IPQ8070			375
+-+#define QCOM_ID_IPQ8071			376
+-+#define QCOM_ID_IPQ8072A		389
+-+#define QCOM_ID_IPQ8074A		390
+-+#define QCOM_ID_IPQ8076A		391
+-+#define QCOM_ID_IPQ8078A		392
+-+#define QCOM_ID_SM6125			394
+-+#define QCOM_ID_IPQ8070A		395
+-+#define QCOM_ID_IPQ8071A		396
+-+#define QCOM_ID_IPQ6018			402
+-+#define QCOM_ID_IPQ6028			403
+-+#define QCOM_ID_IPQ6000			421
+-+#define QCOM_ID_IPQ6010			422
+-+#define QCOM_ID_SC7180			425
+-+#define QCOM_ID_SM6350			434
+-+#define QCOM_ID_SM8350			439
+-+#define QCOM_ID_SC8280XP		449
+-+#define QCOM_ID_IPQ6005			453
+-+#define QCOM_ID_QRB5165			455
+-+#define QCOM_ID_SM8450			457
+-+#define QCOM_ID_SM7225			459
+-+#define QCOM_ID_SA8295P			460
+-+#define QCOM_ID_SA8540P			461
+-+#define QCOM_ID_SM8450_2		480
+-+#define QCOM_ID_SM8450_3		482
+-+#define QCOM_ID_SC7280			487
+-+#define QCOM_ID_SC7180P			495
+-+#define QCOM_ID_SM6375			507
+-+
+-+/*
+-+ * The board type and revision information, used by Qualcomm bootloaders and
+-+ * DTS for older chipsets (qcom,board-id):
+-+ */
+-+#define QCOM_BOARD_ID(a, major, minor) \
+-+	(((major & 0xff) << 16) | ((minor & 0xff) << 8) | QCOM_BOARD_ID_##a)
+-+
+-+#define QCOM_BOARD_ID_MTP			8
+-+#define QCOM_BOARD_ID_DRAGONBOARD		10
+-+#define QCOM_BOARD_ID_SBC			24
+-+
+-+#endif /* _DT_BINDINGS_ARM_QCOM_IDS_H */
+diff --git a/target/linux/ipq807x/patches-5.15/0100-clk-qcom-clk-rcg2-introduce-support-for-multiple-con.patch b/target/linux/ipq807x/patches-5.15/0100-clk-qcom-clk-rcg2-introduce-support-for-multiple-con.patch
+deleted file mode 100644
+index 5713775948..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0100-clk-qcom-clk-rcg2-introduce-support-for-multiple-con.patch
++++ /dev/null
+@@ -1,203 +0,0 @@
+-From 032be4f49dda786fea9e1501212f6cd09a7ded96 Mon Sep 17 00:00:00 2001
+-From: Christian Marangi <ansuelsmth@gmail.com>
+-Date: Thu, 3 Nov 2022 14:49:43 +0100
+-Subject: [PATCH] clk: qcom: clk-rcg2: introduce support for multiple conf for
+- same freq
+-
+-Some RCG frequency can be reached by multiple configuration.
+-
+-We currently declare multiple configuration for the same frequency but
+-that is not supported and always the first configuration will be taken.
+-
+-These multiple configuration are needed as based on the current parent
+-configuration, it may be needed to use a different configuration to
+-reach the same frequency.
+-
+-To handle this introduce 2 new macro, FM and C.
+-
+-- FM is used to declare an empty freq_tbl with just the frequency and an
+-  array of confs to insert all the config for the provided frequency.
+-
+-- C is used to declare a fre_conf where src, pre_div, m and n are
+-  provided.
+-
+-The driver is changed to handle this special freq_tbl and select the
+-correct config by calculating the final rate and deciding based on the
+-one that is less different than the requested one.
+-
+-Tested-by: Robert Marko <robimarko@gmail.com>
+-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+----
+- drivers/clk/qcom/clk-rcg.h  | 14 ++++++-
+- drivers/clk/qcom/clk-rcg2.c | 84 +++++++++++++++++++++++++++++++++----
+- 2 files changed, 88 insertions(+), 10 deletions(-)
+-
+---- a/drivers/clk/qcom/clk-rcg.h
+-+++ b/drivers/clk/qcom/clk-rcg.h
+-@@ -7,7 +7,17 @@
+- #include <linux/clk-provider.h>
+- #include "clk-regmap.h"
+- 
+--#define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) }
+-+#define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n), 0, NULL }
+-+
+-+#define FM(_f, _confs) { .freq = (_f), .confs_num = ARRAY_SIZE(_confs), .confs = (_confs) }
+-+#define C(s, h, m, n) { (s), (2 * (h) - 1), (m), (n) }
+-+
+-+struct freq_conf {
+-+	u8 src;
+-+	u8 pre_div;
+-+	u16 m;
+-+	u16 n;
+-+};
+- 
+- struct freq_tbl {
+- 	unsigned long freq;
+-@@ -15,6 +25,8 @@ struct freq_tbl {
+- 	u8 pre_div;
+- 	u16 m;
+- 	u16 n;
+-+	int confs_num;
+-+	const struct freq_conf *confs;
+- };
+- 
+- /**
+---- a/drivers/clk/qcom/clk-rcg2.c
+-+++ b/drivers/clk/qcom/clk-rcg2.c
+-@@ -209,11 +209,60 @@ clk_rcg2_recalc_rate(struct clk_hw *hw,
+- 	return __clk_rcg2_recalc_rate(hw, parent_rate, cfg);
+- }
+- 
+-+static void
+-+clk_rcg2_select_conf(struct clk_hw *hw, struct freq_tbl *f_tbl,
+-+		     const struct freq_tbl *f, unsigned long req_rate)
+-+{
+-+	unsigned long best_rate = 0, parent_rate, rate;
+-+	const struct freq_conf *conf, *best_conf;
+-+	struct clk_rcg2 *rcg = to_clk_rcg2(hw);
+-+	struct clk_hw *p;
+-+	int index, i;
+-+
+-+	/* Search in each provided config the one that is near the wanted rate */
+-+	for (i = 0, conf = f->confs; i < f->confs_num; i++, conf++) {
+-+		index = qcom_find_src_index(hw, rcg->parent_map, conf->src);
+-+		if (index < 0)
+-+			continue;
+-+
+-+		p = clk_hw_get_parent_by_index(hw, index);
+-+		if (!p)
+-+			continue;
+-+
+-+		parent_rate =  clk_hw_get_rate(p);
+-+		rate = calc_rate(parent_rate, conf->n, conf->m, conf->n, conf->pre_div);
+-+
+-+		if (rate == req_rate) {
+-+			best_conf = conf;
+-+			break;
+-+		}
+-+
+-+		if (abs(req_rate - rate) < abs(best_rate - rate)) {
+-+			best_rate = rate;
+-+			best_conf = conf;
+-+		}
+-+	}
+-+
+-+	/*
+-+	 * Very unlikely.
+-+	 * Force the first conf if we can't find a correct config.
+-+	 */
+-+	if (unlikely(i == f->confs_num))
+-+		best_conf = f->confs;
+-+
+-+	/* Apply the config */
+-+	f_tbl->src = best_conf->src;
+-+	f_tbl->pre_div = best_conf->pre_div;
+-+	f_tbl->m = best_conf->m;
+-+	f_tbl->n = best_conf->n;
+-+}
+-+
+- static int _freq_tbl_determine_rate(struct clk_hw *hw, const struct freq_tbl *f,
+- 				    struct clk_rate_request *req,
+- 				    enum freq_policy policy)
+- {
+- 	unsigned long clk_flags, rate = req->rate;
+-+	struct freq_tbl f_tbl;
+- 	struct clk_hw *p;
+- 	struct clk_rcg2 *rcg = to_clk_rcg2(hw);
+- 	int index;
+-@@ -232,7 +281,15 @@ static int _freq_tbl_determine_rate(stru
+- 	if (!f)
+- 		return -EINVAL;
+- 
+--	index = qcom_find_src_index(hw, rcg->parent_map, f->src);
+-+	f_tbl = *f;
+-+	/*
+-+	 * A single freq may be reached by multiple configuration.
+-+	 * Try to find the bast one if we have this kind of freq_table.
+-+	 */
+-+	if (f->confs)
+-+		clk_rcg2_select_conf(hw, &f_tbl, f, rate);
+-+
+-+	index = qcom_find_src_index(hw, rcg->parent_map, f_tbl.src);
+- 	if (index < 0)
+- 		return index;
+- 
+-@@ -242,18 +299,18 @@ static int _freq_tbl_determine_rate(stru
+- 		return -EINVAL;
+- 
+- 	if (clk_flags & CLK_SET_RATE_PARENT) {
+--		rate = f->freq;
+--		if (f->pre_div) {
+-+		rate = f_tbl.freq;
+-+		if (f_tbl.pre_div) {
+- 			if (!rate)
+- 				rate = req->rate;
+- 			rate /= 2;
+--			rate *= f->pre_div + 1;
+-+			rate *= f_tbl.pre_div + 1;
+- 		}
+- 
+--		if (f->n) {
+-+		if (f_tbl.n) {
+- 			u64 tmp = rate;
+--			tmp = tmp * f->n;
+--			do_div(tmp, f->m);
+-+			tmp = tmp * f_tbl.n;
+-+			do_div(tmp, f_tbl.m);
+- 			rate = tmp;
+- 		}
+- 	} else {
+-@@ -261,7 +318,7 @@ static int _freq_tbl_determine_rate(stru
+- 	}
+- 	req->best_parent_hw = p;
+- 	req->best_parent_rate = rate;
+--	req->rate = f->freq;
+-+	req->rate = f_tbl.freq;
+- 
+- 	return 0;
+- }
+-@@ -357,6 +414,7 @@ static int __clk_rcg2_set_rate(struct cl
+- {
+- 	struct clk_rcg2 *rcg = to_clk_rcg2(hw);
+- 	const struct freq_tbl *f;
+-+	struct freq_tbl f_tbl;
+- 
+- 	switch (policy) {
+- 	case FLOOR:
+-@@ -372,7 +430,15 @@ static int __clk_rcg2_set_rate(struct cl
+- 	if (!f)
+- 		return -EINVAL;
+- 
+--	return clk_rcg2_configure(rcg, f);
+-+	f_tbl = *f;
+-+	/*
+-+	 * A single freq may be reached by multiple configuration.
+-+	 * Try to find the best one if we have this kind of freq_table.
+-+	 */
+-+	if (f->confs)
+-+		clk_rcg2_select_conf(hw, &f_tbl, f, rate);
+-+
+-+	return clk_rcg2_configure(rcg, &f_tbl);
+- }
+- 
+- static int clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate,
+diff --git a/target/linux/ipq807x/patches-5.15/0101-clk-qcom-gcc-ipq8074-rework-nss_port5-6-clock-to-mul.patch b/target/linux/ipq807x/patches-5.15/0101-clk-qcom-gcc-ipq8074-rework-nss_port5-6-clock-to-mul.patch
+deleted file mode 100644
+index 32fb2d9d87..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0101-clk-qcom-gcc-ipq8074-rework-nss_port5-6-clock-to-mul.patch
++++ /dev/null
+@@ -1,129 +0,0 @@
+-From f778553f296792f4d1e8b3552603ad6116ea3eb3 Mon Sep 17 00:00:00 2001
+-From: Christian Marangi <ansuelsmth@gmail.com>
+-Date: Thu, 3 Nov 2022 14:49:44 +0100
+-Subject: [PATCH] clk: qcom: gcc-ipq8074: rework nss_port5/6 clock to multiple
+- conf
+-
+-Rework nss_port5/6 to use the new multiple configuration implementation
+-and correctly fix the clocks for these port under some corner case.
+-
+-This is particularly relevant for device that have 2.5G or 10G port
+-connected to port5 or port 6 on ipq8074. As the parent are shared
+-across multiple port it may be required to select the correct
+-configuration to accomplish the desired clock. Without this patch such
+-port doesn't work in some specific ethernet speed as the clock will be
+-set to the wrong frequency as we just select the first configuration for
+-the related frequency instead of selecting the best one.
+-
+-Tested-by: Robert Marko <robimarko@gmail.com> # ipq8074 Qnap QHora-301W
+-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+----
+- drivers/clk/qcom/gcc-ipq8074.c | 64 +++++++++++++++++++++++++---------
+- 1 file changed, 48 insertions(+), 16 deletions(-)
+-
+---- a/drivers/clk/qcom/gcc-ipq8074.c
+-+++ b/drivers/clk/qcom/gcc-ipq8074.c
+-@@ -1682,13 +1682,21 @@ static struct clk_regmap_div nss_port4_t
+- 	},
+- };
+- 
+-+static const struct freq_conf ftbl_nss_port5_rx_clk_src_25[] = {
+-+	C(P_UNIPHY1_RX, 12.5, 0, 0),
+-+	C(P_UNIPHY0_RX, 5, 0, 0),
+-+};
+-+
+-+static const struct freq_conf ftbl_nss_port5_rx_clk_src_125[] = {
+-+	C(P_UNIPHY1_RX, 2.5, 0, 0),
+-+	C(P_UNIPHY0_RX, 1, 0, 0),
+-+};
+-+
+- static const struct freq_tbl ftbl_nss_port5_rx_clk_src[] = {
+- 	F(19200000, P_XO, 1, 0, 0),
+--	F(25000000, P_UNIPHY1_RX, 12.5, 0, 0),
+--	F(25000000, P_UNIPHY0_RX, 5, 0, 0),
+-+	FM(25000000, ftbl_nss_port5_rx_clk_src_25),
+- 	F(78125000, P_UNIPHY1_RX, 4, 0, 0),
+--	F(125000000, P_UNIPHY1_RX, 2.5, 0, 0),
+--	F(125000000, P_UNIPHY0_RX, 1, 0, 0),
+-+	FM(125000000, ftbl_nss_port5_rx_clk_src_125),
+- 	F(156250000, P_UNIPHY1_RX, 2, 0, 0),
+- 	F(312500000, P_UNIPHY1_RX, 1, 0, 0),
+- 	{ }
+-@@ -1744,13 +1752,21 @@ static struct clk_regmap_div nss_port5_r
+- 	},
+- };
+- 
+-+static struct freq_conf ftbl_nss_port5_tx_clk_src_25[] = {
+-+	C(P_UNIPHY1_TX, 12.5, 0, 0),
+-+	C(P_UNIPHY0_TX, 5, 0, 0),
+-+};
+-+
+-+static struct freq_conf ftbl_nss_port5_tx_clk_src_125[] = {
+-+	C(P_UNIPHY1_TX, 2.5, 0, 0),
+-+	C(P_UNIPHY0_TX, 1, 0, 0),
+-+};
+-+
+- static const struct freq_tbl ftbl_nss_port5_tx_clk_src[] = {
+- 	F(19200000, P_XO, 1, 0, 0),
+--	F(25000000, P_UNIPHY1_TX, 12.5, 0, 0),
+--	F(25000000, P_UNIPHY0_TX, 5, 0, 0),
+-+	FM(25000000, ftbl_nss_port5_tx_clk_src_25),
+- 	F(78125000, P_UNIPHY1_TX, 4, 0, 0),
+--	F(125000000, P_UNIPHY1_TX, 2.5, 0, 0),
+--	F(125000000, P_UNIPHY0_TX, 1, 0, 0),
+-+	FM(125000000, ftbl_nss_port5_tx_clk_src_125),
+- 	F(156250000, P_UNIPHY1_TX, 2, 0, 0),
+- 	F(312500000, P_UNIPHY1_TX, 1, 0, 0),
+- 	{ }
+-@@ -1806,13 +1822,21 @@ static struct clk_regmap_div nss_port5_t
+- 	},
+- };
+- 
+-+static struct freq_conf ftbl_nss_port6_rx_clk_src_25[] = {
+-+	C(P_UNIPHY2_RX, 5, 0, 0),
+-+	C(P_UNIPHY2_RX, 12.5, 0, 0),
+-+};
+-+
+-+static struct freq_conf ftbl_nss_port6_rx_clk_src_125[] = {
+-+	C(P_UNIPHY2_RX, 1, 0, 0),
+-+	C(P_UNIPHY2_RX, 2.5, 0, 0),
+-+};
+-+
+- static const struct freq_tbl ftbl_nss_port6_rx_clk_src[] = {
+- 	F(19200000, P_XO, 1, 0, 0),
+--	F(25000000, P_UNIPHY2_RX, 5, 0, 0),
+--	F(25000000, P_UNIPHY2_RX, 12.5, 0, 0),
+-+	FM(25000000, ftbl_nss_port6_rx_clk_src_25),
+- 	F(78125000, P_UNIPHY2_RX, 4, 0, 0),
+--	F(125000000, P_UNIPHY2_RX, 1, 0, 0),
+--	F(125000000, P_UNIPHY2_RX, 2.5, 0, 0),
+-+	FM(125000000, ftbl_nss_port6_rx_clk_src_125),
+- 	F(156250000, P_UNIPHY2_RX, 2, 0, 0),
+- 	F(312500000, P_UNIPHY2_RX, 1, 0, 0),
+- 	{ }
+-@@ -1863,13 +1887,21 @@ static struct clk_regmap_div nss_port6_r
+- 	},
+- };
+- 
+-+static struct freq_conf ftbl_nss_port6_tx_clk_src_25[] = {
+-+	C(P_UNIPHY2_TX, 5, 0, 0),
+-+	C(P_UNIPHY2_TX, 12.5, 0, 0),
+-+};
+-+
+-+static struct freq_conf ftbl_nss_port6_tx_clk_src_125[] = {
+-+	C(P_UNIPHY2_TX, 1, 0, 0),
+-+	C(P_UNIPHY2_TX, 2.5, 0, 0),
+-+};
+-+
+- static const struct freq_tbl ftbl_nss_port6_tx_clk_src[] = {
+- 	F(19200000, P_XO, 1, 0, 0),
+--	F(25000000, P_UNIPHY2_TX, 5, 0, 0),
+--	F(25000000, P_UNIPHY2_TX, 12.5, 0, 0),
+-+	FM(25000000, ftbl_nss_port6_tx_clk_src_25),
+- 	F(78125000, P_UNIPHY2_TX, 4, 0, 0),
+--	F(125000000, P_UNIPHY2_TX, 1, 0, 0),
+--	F(125000000, P_UNIPHY2_TX, 2.5, 0, 0),
+-+	FM(125000000, ftbl_nss_port6_tx_clk_src_125),
+- 	F(156250000, P_UNIPHY2_TX, 2, 0, 0),
+- 	F(312500000, P_UNIPHY2_TX, 1, 0, 0),
+- 	{ }
+diff --git a/target/linux/ipq807x/patches-5.15/0102-arm64-dts-ipq8074-add-reserved-memory-nodes.patch b/target/linux/ipq807x/patches-5.15/0102-arm64-dts-ipq8074-add-reserved-memory-nodes.patch
+deleted file mode 100644
+index af53c077ff..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0102-arm64-dts-ipq8074-add-reserved-memory-nodes.patch
++++ /dev/null
+@@ -1,70 +0,0 @@
+-From ad2d07f71739351eeea1d8a120c0918e2c4b265f Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Wed, 22 Dec 2021 12:23:34 +0100
+-Subject: [PATCH] arm64: dts: ipq8074: add reserved memory nodes
+-
+-IPQ8074 has multiple reserved memory ranges, if they are not defined
+-then weird things tend to happen, board hangs and resets when PCI or
+-WLAN is used etc.
+-
+-So, to avoid all of that add the reserved memory nodes from the downstream
+-5.4 kernel from QCA.
+-This is their default layout meant for devices with 1GB of RAM, but
+-devices with lower ammounts can override the Q6 node.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 35 +++++++++++++++++++++++++++
+- 1 file changed, 35 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -85,6 +85,26 @@
+- 		#size-cells = <2>;
+- 		ranges;
+- 
+-+		nss@40000000 {
+-+			no-map;
+-+			reg = <0x0 0x40000000 0x0 0x01000000>;
+-+		};
+-+
+-+		tzapp_region: tzapp@4a400000 {
+-+			no-map;
+-+			reg = <0x0 0x4a400000 0x0 0x00200000>;
+-+		};
+-+
+-+		uboot@4a600000 {
+-+			no-map;
+-+			reg = <0x0 0x4a600000 0x0 0x00400000>;
+-+		};
+-+
+-+		sbl@4aa00000 {
+-+			no-map;
+-+			reg = <0x0 0x4aa00000 0x0 0x00100000>;
+-+		};
+-+
+- 		smem@4ab00000 {
+- 			compatible = "qcom,smem";
+- 			reg = <0x0 0x4ab00000 0x0 0x00100000>;
+-@@ -97,6 +117,21 @@
+- 			no-map;
+- 			reg = <0x0 0x4ac00000 0x0 0x00400000>;
+- 		};
+-+
+-+		q6_region: wcnss@4b000000 {
+-+			no-map;
+-+			reg = <0x0 0x4b000000 0x0 0x05f00000>;
+-+		};
+-+
+-+		q6_etr_region: q6_etr_dump@50f00000 {
+-+			no-map;
+-+			reg = <0x0 0x50f00000 0x0 0x00100000>;
+-+		};
+-+
+-+		m3_dump_region: m3_dump@51000000 {
+-+			no-map;
+-+			reg = <0x0 0x51000000 0x0 0x100000>;
+-+		};
+- 	};
+- 
+- 	firmware {
+diff --git a/target/linux/ipq807x/patches-5.15/0106-arm64-dts-qcom-ipq8074-set-Gen2-PCIe-pcie-max-link-s.patch b/target/linux/ipq807x/patches-5.15/0106-arm64-dts-qcom-ipq8074-set-Gen2-PCIe-pcie-max-link-s.patch
+deleted file mode 100644
+index 0fa38394b9..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0106-arm64-dts-qcom-ipq8074-set-Gen2-PCIe-pcie-max-link-s.patch
++++ /dev/null
+@@ -1,24 +0,0 @@
+-From a4748d2850783d36f77ccf2b5fcc86ccf1800ef1 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Wed, 16 Nov 2022 22:48:36 +0100
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: set Gen2 PCIe pcie max-link-speed
+-
+-Add the generic 'max-link-speed' property to describe the Gen2 PCIe link
+-generation limit.
+-This allows the generic DWC code to configure the link speed correctly.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 1 +
+- 1 file changed, 1 insertion(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -801,6 +801,7 @@
+- 			linux,pci-domain = <1>;
+- 			bus-range = <0x00 0xff>;
+- 			num-lanes = <1>;
+-+			max-link-speed = <2>;
+- 			#address-cells = <3>;
+- 			#size-cells = <2>;
+- 
+diff --git a/target/linux/ipq807x/patches-5.15/0107-PCI-qcom-Add-support-for-IPQ8074-Gen3-port.patch b/target/linux/ipq807x/patches-5.15/0107-PCI-qcom-Add-support-for-IPQ8074-Gen3-port.patch
+deleted file mode 100644
+index c7a7e7ab49..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0107-PCI-qcom-Add-support-for-IPQ8074-Gen3-port.patch
++++ /dev/null
+@@ -1,23 +0,0 @@
+-From 76893579a74e7e5c79f0c717d95d13f4cbbb5f4d Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Sat, 24 Dec 2022 17:11:16 +0100
+-Subject: [PATCH] PCI: qcom: Add support for IPQ8074 Gen3 port
+-
+-IPQ8074 has one Gen2 and one Gen3 port, with Gen2 port already supported.
+-Add compatible for Gen3 port which uses the same controller as IPQ6018.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- drivers/pci/controller/dwc/pcie-qcom.c | 1 +
+- 1 file changed, 1 insertion(+)
+-
+---- a/drivers/pci/controller/dwc/pcie-qcom.c
+-+++ b/drivers/pci/controller/dwc/pcie-qcom.c
+-@@ -1733,6 +1733,7 @@ static const struct of_device_id qcom_pc
+- 	{ .compatible = "qcom,pcie-apq8064", .data = &ipq8064_cfg },
+- 	{ .compatible = "qcom,pcie-msm8996", .data = &msm8996_cfg },
+- 	{ .compatible = "qcom,pcie-ipq8074", .data = &ipq8074_cfg },
+-+	{ .compatible = "qcom,pcie-ipq8074-gen3", .data = &ipq6018_cfg },
+- 	{ .compatible = "qcom,pcie-ipq4019", .data = &ipq4019_cfg },
+- 	{ .compatible = "qcom,pcie-qcs404", .data = &ipq4019_cfg },
+- 	{ .compatible = "qcom,pcie-sdm845", .data = &sdm845_cfg },
+diff --git a/target/linux/ipq807x/patches-5.15/0110-arm64-dts-qcom-ipq8074-pass-QMP-PCI-PHY-PIPE-clocks-.patch b/target/linux/ipq807x/patches-5.15/0110-arm64-dts-qcom-ipq8074-pass-QMP-PCI-PHY-PIPE-clocks-.patch
+deleted file mode 100644
+index 69d4126f76..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0110-arm64-dts-qcom-ipq8074-pass-QMP-PCI-PHY-PIPE-clocks-.patch
++++ /dev/null
+@@ -1,30 +0,0 @@
+-From 8a576b5bc9f0555d1d970cacabcaa24a3b74fa57 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Wed, 16 Nov 2022 22:15:01 +0100
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: pass QMP PCI PHY PIPE clocks to
+- GCC
+-
+-Pass QMP PCI PHY PIPE clocks to the GCC controller so it does not have to
+-find them by matching globaly by name.
+-
+-If not passed directly, driver maintains backwards compatibility by then
+-falling back to global lookup.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
+- 1 file changed, 2 insertions(+), 2 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -396,8 +396,8 @@
+- 		gcc: gcc@1800000 {
+- 			compatible = "qcom,gcc-ipq8074";
+- 			reg = <0x01800000 0x80000>;
+--			clocks = <&xo>, <&sleep_clk>;
+--			clock-names = "xo", "sleep_clk";
+-+			clocks = <&xo>, <&sleep_clk>, <&pcie_phy0>, <&pcie_phy1>;
+-+			clock-names = "xo", "sleep_clk", "pcie0_pipe", "pcie1_pipe";
+- 			#clock-cells = <1>;
+- 			#power-domain-cells = <1>;
+- 			#reset-cells = <1>;
+diff --git a/target/linux/ipq807x/patches-5.15/0111-arm64-dts-qcom-ipq8074-use-msi-parent-for-PCIe.patch b/target/linux/ipq807x/patches-5.15/0111-arm64-dts-qcom-ipq8074-use-msi-parent-for-PCIe.patch
+deleted file mode 100644
+index 9fefd8852a..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0111-arm64-dts-qcom-ipq8074-use-msi-parent-for-PCIe.patch
++++ /dev/null
+@@ -1,43 +0,0 @@
+-From fb1f6850be00d8dd8a54017be4c1336e224069ac Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Wed, 16 Nov 2022 22:26:25 +0100
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: use msi-parent for PCIe
+-
+-Instead of hardcoding the IRQ, simply use msi-parent instead.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8 +++-----
+- 1 file changed, 3 insertions(+), 5 deletions(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -699,7 +699,7 @@
+- 			reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
+- 			ranges = <0 0xb00a000 0xffd>;
+- 
+--			v2m@0 {
+-+			gic_v2m0: v2m@0 {
+- 				compatible = "arm,gic-v2m-frame";
+- 				msi-controller;
+- 				reg = <0x0 0xffd>;
+-@@ -811,8 +811,7 @@
+- 			ranges = <0x81000000 0x0 0x00000000 0x10200000 0x0 0x10000>,   /* I/O */
+- 				 <0x82000000 0x0 0x10220000 0x10220000 0x0 0xfde0000>; /* MEM */
+- 
+--			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+--			interrupt-names = "msi";
+-+			msi-parent = <&gic_v2m0>;
+- 			#interrupt-cells = <1>;
+- 			interrupt-map-mask = <0 0 0 0x7>;
+- 			interrupt-map = <0 0 0 1 &intc 0 142
+-@@ -873,8 +872,7 @@
+- 			ranges = <0x81000000 0x0 0x00000000 0x20200000 0x0 0x10000>,   /* I/O */
+- 				 <0x82000000 0x0 0x20220000 0x20220000 0x0 0xfde0000>; /* MEM */
+- 
+--			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+--			interrupt-names = "msi";
+-+			msi-parent = <&gic_v2m0>;
+- 			#interrupt-cells = <1>;
+- 			interrupt-map-mask = <0 0 0 0x7>;
+- 			interrupt-map = <0 0 0 1 &intc 0 75
+diff --git a/target/linux/ipq807x/patches-5.15/0112-remoteproc-qcom-Add-PRNG-proxy-clock.patch b/target/linux/ipq807x/patches-5.15/0112-remoteproc-qcom-Add-PRNG-proxy-clock.patch
+deleted file mode 100644
+index 2124bfa3f1..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0112-remoteproc-qcom-Add-PRNG-proxy-clock.patch
++++ /dev/null
+@@ -1,155 +0,0 @@
+-From 125681433c8e526356947acf572fe8ca8ad32291 Mon Sep 17 00:00:00 2001
+-From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
+-Date: Sat, 30 Jan 2021 10:50:05 +0530
+-Subject: [PATCH] remoteproc: qcom: Add PRNG proxy clock
+-
+-PRNG clock is needed by the secure PIL, support for the same
+-is added in subsequent patches.
+-
+-Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
+-Signed-off-by: Sricharan R <sricharan@codeaurora.org>
+-Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
+----
+- drivers/remoteproc/qcom_q6v5_wcss.c | 65 +++++++++++++++++++++--------
+- 1 file changed, 47 insertions(+), 18 deletions(-)
+-
+---- a/drivers/remoteproc/qcom_q6v5_wcss.c
+-+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
+-@@ -91,19 +91,6 @@ enum {
+- 	WCSS_QCS404,
+- };
+- 
+--struct wcss_data {
+--	const char *firmware_name;
+--	unsigned int crash_reason_smem;
+--	u32 version;
+--	bool aon_reset_required;
+--	bool wcss_q6_reset_required;
+--	const char *ssr_name;
+--	const char *sysmon_name;
+--	int ssctl_id;
+--	const struct rproc_ops *ops;
+--	bool requires_force_stop;
+--};
+--
+- struct q6v5_wcss {
+- 	struct device *dev;
+- 
+-@@ -128,6 +115,7 @@ struct q6v5_wcss {
+- 	struct clk *qdsp6ss_xo_cbcr;
+- 	struct clk *qdsp6ss_core_gfmux;
+- 	struct clk *lcc_bcr_sleep;
+-+	struct clk *prng_clk;
+- 	struct regulator *cx_supply;
+- 	struct qcom_sysmon *sysmon;
+- 
+-@@ -151,6 +139,21 @@ struct q6v5_wcss {
+- 	struct qcom_rproc_ssr ssr_subdev;
+- };
+- 
+-+struct wcss_data {
+-+	int (*init_clock)(struct q6v5_wcss *wcss);
+-+	int (*init_regulator)(struct q6v5_wcss *wcss);
+-+	const char *firmware_name;
+-+	unsigned int crash_reason_smem;
+-+	u32 version;
+-+	bool aon_reset_required;
+-+	bool wcss_q6_reset_required;
+-+	const char *ssr_name;
+-+	const char *sysmon_name;
+-+	int ssctl_id;
+-+	const struct rproc_ops *ops;
+-+	bool requires_force_stop;
+-+};
+-+
+- static int q6v5_wcss_reset(struct q6v5_wcss *wcss)
+- {
+- 	int ret;
+-@@ -240,6 +243,12 @@ static int q6v5_wcss_start(struct rproc
+- 	struct q6v5_wcss *wcss = rproc->priv;
+- 	int ret;
+- 
+-+	ret = clk_prepare_enable(wcss->prng_clk);
+-+	if (ret) {
+-+		dev_err(wcss->dev, "prng clock enable failed\n");
+-+		return ret;
+-+	}
+-+
+- 	qcom_q6v5_prepare(&wcss->q6v5);
+- 
+- 	/* Release Q6 and WCSS reset */
+-@@ -733,6 +742,7 @@ static int q6v5_wcss_stop(struct rproc *
+- 			return ret;
+- 	}
+- 
+-+	clk_disable_unprepare(wcss->prng_clk);
+- 	qcom_q6v5_unprepare(&wcss->q6v5);
+- 
+- 	return 0;
+-@@ -900,7 +910,21 @@ static int q6v5_alloc_memory_region(stru
+- 	return 0;
+- }
+- 
+--static int q6v5_wcss_init_clock(struct q6v5_wcss *wcss)
+-+static int ipq8074_init_clock(struct q6v5_wcss *wcss)
+-+{
+-+	int ret;
+-+
+-+	wcss->prng_clk = devm_clk_get(wcss->dev, "prng");
+-+	if (IS_ERR(wcss->prng_clk)) {
+-+		ret = PTR_ERR(wcss->prng_clk);
+-+		if (ret != -EPROBE_DEFER)
+-+			dev_err(wcss->dev, "Failed to get prng clock\n");
+-+		return ret;
+-+	}
+-+	return 0;
+-+}
+-+
+-+static int qcs404_init_clock(struct q6v5_wcss *wcss)
+- {
+- 	int ret;
+- 
+-@@ -990,7 +1014,7 @@ static int q6v5_wcss_init_clock(struct q
+- 	return 0;
+- }
+- 
+--static int q6v5_wcss_init_regulator(struct q6v5_wcss *wcss)
+-+static int qcs404_init_regulator(struct q6v5_wcss *wcss)
+- {
+- 	wcss->cx_supply = devm_regulator_get(wcss->dev, "cx");
+- 	if (IS_ERR(wcss->cx_supply))
+-@@ -1034,12 +1058,14 @@ static int q6v5_wcss_probe(struct platfo
+- 	if (ret)
+- 		goto free_rproc;
+- 
+--	if (wcss->version == WCSS_QCS404) {
+--		ret = q6v5_wcss_init_clock(wcss);
+-+	if (desc->init_clock) {
+-+		ret = desc->init_clock(wcss);
+- 		if (ret)
+- 			goto free_rproc;
+-+	}
+- 
+--		ret = q6v5_wcss_init_regulator(wcss);
+-+	if (desc->init_regulator) {
+-+		ret = desc->init_regulator(wcss);
+- 		if (ret)
+- 			goto free_rproc;
+- 	}
+-@@ -1086,6 +1112,7 @@ static int q6v5_wcss_remove(struct platf
+- }
+- 
+- static const struct wcss_data wcss_ipq8074_res_init = {
+-+	.init_clock = ipq8074_init_clock,
+- 	.firmware_name = "IPQ8074/q6_fw.mdt",
+- 	.crash_reason_smem = WCSS_CRASH_REASON,
+- 	.aon_reset_required = true,
+-@@ -1095,6 +1122,8 @@ static const struct wcss_data wcss_ipq80
+- };
+- 
+- static const struct wcss_data wcss_qcs404_res_init = {
+-+	.init_clock = qcs404_init_clock,
+-+	.init_regulator = qcs404_init_regulator,
+- 	.crash_reason_smem = WCSS_CRASH_REASON,
+- 	.firmware_name = "wcnss.mdt",
+- 	.version = WCSS_QCS404,
+diff --git a/target/linux/ipq807x/patches-5.15/0113-remoteproc-qcom-Add-secure-PIL-support.patch b/target/linux/ipq807x/patches-5.15/0113-remoteproc-qcom-Add-secure-PIL-support.patch
+deleted file mode 100644
+index 1d415942e0..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0113-remoteproc-qcom-Add-secure-PIL-support.patch
++++ /dev/null
+@@ -1,143 +0,0 @@
+-From 7358d42dfbdfdb5d4f1d0d4c2e5c2bb4143a29b0 Mon Sep 17 00:00:00 2001
+-From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
+-Date: Sat, 30 Jan 2021 10:50:06 +0530
+-Subject: [PATCH] remoteproc: qcom: Add secure PIL support
+-
+-IPQ8074 uses secure PIL. Hence, adding the support for the same.
+-
+-Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
+-Signed-off-by: Sricharan R <sricharan@codeaurora.org>
+-Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
+----
+- drivers/remoteproc/qcom_q6v5_wcss.c | 43 +++++++++++++++++++++++++++--
+- 1 file changed, 40 insertions(+), 3 deletions(-)
+-
+---- a/drivers/remoteproc/qcom_q6v5_wcss.c
+-+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
+-@@ -18,6 +18,7 @@
+- #include <linux/regulator/consumer.h>
+- #include <linux/reset.h>
+- #include <linux/soc/qcom/mdt_loader.h>
+-+#include <linux/qcom_scm.h>
+- #include "qcom_common.h"
+- #include "qcom_pil_info.h"
+- #include "qcom_q6v5.h"
+-@@ -86,6 +87,9 @@
+- #define TCSR_WCSS_CLK_ENABLE	0x14
+- 
+- #define MAX_HALT_REG		3
+-+
+-+#define WCNSS_PAS_ID		6
+-+
+- enum {
+- 	WCSS_IPQ8074,
+- 	WCSS_QCS404,
+-@@ -134,6 +138,7 @@ struct q6v5_wcss {
+- 	unsigned int crash_reason_smem;
+- 	u32 version;
+- 	bool requires_force_stop;
+-+	bool need_mem_protection;
+- 
+- 	struct qcom_rproc_glink glink_subdev;
+- 	struct qcom_rproc_ssr ssr_subdev;
+-@@ -152,6 +157,7 @@ struct wcss_data {
+- 	int ssctl_id;
+- 	const struct rproc_ops *ops;
+- 	bool requires_force_stop;
+-+	bool need_mem_protection;
+- };
+- 
+- static int q6v5_wcss_reset(struct q6v5_wcss *wcss)
+-@@ -251,6 +257,15 @@ static int q6v5_wcss_start(struct rproc
+- 
+- 	qcom_q6v5_prepare(&wcss->q6v5);
+- 
+-+	if (wcss->need_mem_protection) {
+-+		ret = qcom_scm_pas_auth_and_reset(WCNSS_PAS_ID);
+-+		if (ret) {
+-+			dev_err(wcss->dev, "wcss_reset failed\n");
+-+			return ret;
+-+		}
+-+		goto wait_for_reset;
+-+	}
+-+
+- 	/* Release Q6 and WCSS reset */
+- 	ret = reset_control_deassert(wcss->wcss_reset);
+- 	if (ret) {
+-@@ -285,6 +300,7 @@ static int q6v5_wcss_start(struct rproc
+- 	if (ret)
+- 		goto wcss_q6_reset;
+- 
+-+wait_for_reset:
+- 	ret = qcom_q6v5_wait_for_start(&wcss->q6v5, 5 * HZ);
+- 	if (ret == -ETIMEDOUT)
+- 		dev_err(wcss->dev, "start timed out\n");
+-@@ -718,6 +734,15 @@ static int q6v5_wcss_stop(struct rproc *
+- 	struct q6v5_wcss *wcss = rproc->priv;
+- 	int ret;
+- 
+-+	if (wcss->need_mem_protection) {
+-+		ret = qcom_scm_pas_shutdown(WCNSS_PAS_ID);
+-+		if (ret) {
+-+			dev_err(wcss->dev, "not able to shutdown\n");
+-+			return ret;
+-+		}
+-+		goto pas_done;
+-+	}
+-+
+- 	/* WCSS powerdown */
+- 	if (wcss->requires_force_stop) {
+- 		ret = qcom_q6v5_request_stop(&wcss->q6v5, NULL);
+-@@ -742,6 +767,7 @@ static int q6v5_wcss_stop(struct rproc *
+- 			return ret;
+- 	}
+- 
+-+pas_done:
+- 	clk_disable_unprepare(wcss->prng_clk);
+- 	qcom_q6v5_unprepare(&wcss->q6v5);
+- 
+-@@ -765,9 +791,15 @@ static int q6v5_wcss_load(struct rproc *
+- 	struct q6v5_wcss *wcss = rproc->priv;
+- 	int ret;
+- 
+--	ret = qcom_mdt_load_no_init(wcss->dev, fw, rproc->firmware,
+--				    0, wcss->mem_region, wcss->mem_phys,
+--				    wcss->mem_size, &wcss->mem_reloc);
+-+	if (wcss->need_mem_protection)
+-+		ret = qcom_mdt_load(wcss->dev, fw, rproc->firmware,
+-+				    WCNSS_PAS_ID, wcss->mem_region,
+-+				    wcss->mem_phys, wcss->mem_size,
+-+				    &wcss->mem_reloc);
+-+	else
+-+		ret = qcom_mdt_load_no_init(wcss->dev, fw, rproc->firmware,
+-+					    0, wcss->mem_region, wcss->mem_phys,
+-+					    wcss->mem_size, &wcss->mem_reloc);
+- 	if (ret)
+- 		return ret;
+- 
+-@@ -1036,6 +1068,9 @@ static int q6v5_wcss_probe(struct platfo
+- 	if (!desc)
+- 		return -EINVAL;
+- 
+-+	if (desc->need_mem_protection && !qcom_scm_is_available())
+-+		return -EPROBE_DEFER;
+-+
+- 	rproc = rproc_alloc(&pdev->dev, pdev->name, desc->ops,
+- 			    desc->firmware_name, sizeof(*wcss));
+- 	if (!rproc) {
+-@@ -1049,6 +1084,7 @@ static int q6v5_wcss_probe(struct platfo
+- 
+- 	wcss->version = desc->version;
+- 	wcss->requires_force_stop = desc->requires_force_stop;
+-+	wcss->need_mem_protection = desc->need_mem_protection;
+- 
+- 	ret = q6v5_wcss_init_mmio(wcss, pdev);
+- 	if (ret)
+-@@ -1119,6 +1155,7 @@ static const struct wcss_data wcss_ipq80
+- 	.wcss_q6_reset_required = true,
+- 	.ops = &q6v5_wcss_ipq8074_ops,
+- 	.requires_force_stop = true,
+-+	.need_mem_protection = true,
+- };
+- 
+- static const struct wcss_data wcss_qcs404_res_init = {
+diff --git a/target/linux/ipq807x/patches-5.15/0114-remoteproc-qcom-Add-support-for-split-q6-m3-wlan-fir.patch b/target/linux/ipq807x/patches-5.15/0114-remoteproc-qcom-Add-support-for-split-q6-m3-wlan-fir.patch
+deleted file mode 100644
+index 1231824af0..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0114-remoteproc-qcom-Add-support-for-split-q6-m3-wlan-fir.patch
++++ /dev/null
+@@ -1,103 +0,0 @@
+-From b422c9d4f048b086ce83f44a7cfcddcce162897f Mon Sep 17 00:00:00 2001
+-From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
+-Date: Sat, 30 Jan 2021 10:50:07 +0530
+-Subject: [PATCH] remoteproc: qcom: Add support for split q6 + m3 wlan firmware
+-
+-IPQ8074 supports split firmware for q6 and m3 as well.
+-So add support for loading the m3 firmware before q6.
+-Now the drivers works fine for both split and unified
+-firmwares.
+-
+-Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
+-Signed-off-by: Sricharan R <sricharan@codeaurora.org>
+-Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
+----
+- drivers/remoteproc/qcom_q6v5_wcss.c | 33 +++++++++++++++++++++++++----
+- 1 file changed, 29 insertions(+), 4 deletions(-)
+-
+---- a/drivers/remoteproc/qcom_q6v5_wcss.c
+-+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
+-@@ -139,6 +139,7 @@ struct q6v5_wcss {
+- 	u32 version;
+- 	bool requires_force_stop;
+- 	bool need_mem_protection;
+-+	const char *m3_firmware_name;
+- 
+- 	struct qcom_rproc_glink glink_subdev;
+- 	struct qcom_rproc_ssr ssr_subdev;
+-@@ -147,7 +148,8 @@ struct q6v5_wcss {
+- struct wcss_data {
+- 	int (*init_clock)(struct q6v5_wcss *wcss);
+- 	int (*init_regulator)(struct q6v5_wcss *wcss);
+--	const char *firmware_name;
+-+	const char *q6_firmware_name;
+-+	const char *m3_firmware_name;
+- 	unsigned int crash_reason_smem;
+- 	u32 version;
+- 	bool aon_reset_required;
+-@@ -789,8 +791,29 @@ static void *q6v5_wcss_da_to_va(struct r
+- static int q6v5_wcss_load(struct rproc *rproc, const struct firmware *fw)
+- {
+- 	struct q6v5_wcss *wcss = rproc->priv;
+-+	const struct firmware *m3_fw;
+- 	int ret;
+- 
+-+	if (wcss->m3_firmware_name) {
+-+		ret = request_firmware(&m3_fw, wcss->m3_firmware_name,
+-+				       wcss->dev);
+-+		if (ret)
+-+			goto skip_m3;
+-+
+-+		ret = qcom_mdt_load_no_init(wcss->dev, m3_fw,
+-+					    wcss->m3_firmware_name, 0,
+-+					    wcss->mem_region, wcss->mem_phys,
+-+					    wcss->mem_size, &wcss->mem_reloc);
+-+
+-+		release_firmware(m3_fw);
+-+
+-+		if (ret) {
+-+			dev_err(wcss->dev, "can't load m3_fw.bXX\n");
+-+			return ret;
+-+		}
+-+	}
+-+
+-+skip_m3:
+- 	if (wcss->need_mem_protection)
+- 		ret = qcom_mdt_load(wcss->dev, fw, rproc->firmware,
+- 				    WCNSS_PAS_ID, wcss->mem_region,
+-@@ -1072,7 +1095,7 @@ static int q6v5_wcss_probe(struct platfo
+- 		return -EPROBE_DEFER;
+- 
+- 	rproc = rproc_alloc(&pdev->dev, pdev->name, desc->ops,
+--			    desc->firmware_name, sizeof(*wcss));
+-+			    desc->q6_firmware_name, sizeof(*wcss));
+- 	if (!rproc) {
+- 		dev_err(&pdev->dev, "failed to allocate rproc\n");
+- 		return -ENOMEM;
+-@@ -1085,6 +1108,7 @@ static int q6v5_wcss_probe(struct platfo
+- 	wcss->version = desc->version;
+- 	wcss->requires_force_stop = desc->requires_force_stop;
+- 	wcss->need_mem_protection = desc->need_mem_protection;
+-+	wcss->m3_firmware_name = desc->m3_firmware_name;
+- 
+- 	ret = q6v5_wcss_init_mmio(wcss, pdev);
+- 	if (ret)
+-@@ -1149,7 +1173,8 @@ static int q6v5_wcss_remove(struct platf
+- 
+- static const struct wcss_data wcss_ipq8074_res_init = {
+- 	.init_clock = ipq8074_init_clock,
+--	.firmware_name = "IPQ8074/q6_fw.mdt",
+-+	.q6_firmware_name = "IPQ8074/q6_fw.mdt",
+-+	.m3_firmware_name = "IPQ8074/m3_fw.mdt",
+- 	.crash_reason_smem = WCSS_CRASH_REASON,
+- 	.aon_reset_required = true,
+- 	.wcss_q6_reset_required = true,
+-@@ -1162,7 +1187,7 @@ static const struct wcss_data wcss_qcs40
+- 	.init_clock = qcs404_init_clock,
+- 	.init_regulator = qcs404_init_regulator,
+- 	.crash_reason_smem = WCSS_CRASH_REASON,
+--	.firmware_name = "wcnss.mdt",
+-+	.q6_firmware_name = "wcnss.mdt",
+- 	.version = WCSS_QCS404,
+- 	.aon_reset_required = false,
+- 	.wcss_q6_reset_required = false,
+diff --git a/target/linux/ipq807x/patches-5.15/0115-remoteproc-qcom-Add-ssr-subdevice-identifier.patch b/target/linux/ipq807x/patches-5.15/0115-remoteproc-qcom-Add-ssr-subdevice-identifier.patch
+deleted file mode 100644
+index 0ff2d0358b..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0115-remoteproc-qcom-Add-ssr-subdevice-identifier.patch
++++ /dev/null
+@@ -1,24 +0,0 @@
+-From 3a8f67b4770c817b04794c9a02e3f88f85d86280 Mon Sep 17 00:00:00 2001
+-From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
+-Date: Sat, 30 Jan 2021 10:50:08 +0530
+-Subject: [PATCH] remoteproc: qcom: Add ssr subdevice identifier
+-
+-Add name for ssr subdevice on IPQ8074 SoC.
+-
+-Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
+-Signed-off-by: Sricharan R <sricharan@codeaurora.org>
+-Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
+----
+- drivers/remoteproc/qcom_q6v5_wcss.c | 1 +
+- 1 file changed, 1 insertion(+)
+-
+---- a/drivers/remoteproc/qcom_q6v5_wcss.c
+-+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
+-@@ -1178,6 +1178,7 @@ static const struct wcss_data wcss_ipq80
+- 	.crash_reason_smem = WCSS_CRASH_REASON,
+- 	.aon_reset_required = true,
+- 	.wcss_q6_reset_required = true,
+-+	.ssr_name = "q6wcss",
+- 	.ops = &q6v5_wcss_ipq8074_ops,
+- 	.requires_force_stop = true,
+- 	.need_mem_protection = true,
+diff --git a/target/linux/ipq807x/patches-5.15/0116-remoteproc-qcom-Update-regmap-offsets-for-halt-regis.patch b/target/linux/ipq807x/patches-5.15/0116-remoteproc-qcom-Update-regmap-offsets-for-halt-regis.patch
+deleted file mode 100644
+index c8e5aceefc..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0116-remoteproc-qcom-Update-regmap-offsets-for-halt-regis.patch
++++ /dev/null
+@@ -1,79 +0,0 @@
+-From 8c73af6e8d78c66cfef0f551b00d375ec0b67ff3 Mon Sep 17 00:00:00 2001
+-From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
+-Date: Sat, 30 Jan 2021 10:50:09 +0530
+-Subject: [PATCH] remoteproc: qcom: Update regmap offsets for halt register
+-
+-Fixed issue in reading halt-regs parameter from device-tree.
+-
+-Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
+-Signed-off-by: Sricharan R <sricharan@codeaurora.org>
+----
+- drivers/remoteproc/qcom_q6v5_wcss.c | 22 ++++++++++++++--------
+- 1 file changed, 14 insertions(+), 8 deletions(-)
+-
+---- a/drivers/remoteproc/qcom_q6v5_wcss.c
+-+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
+-@@ -86,7 +86,7 @@
+- #define TCSR_WCSS_CLK_MASK	0x1F
+- #define TCSR_WCSS_CLK_ENABLE	0x14
+- 
+--#define MAX_HALT_REG		3
+-+#define MAX_HALT_REG		4
+- 
+- #define WCNSS_PAS_ID		6
+- 
+-@@ -154,6 +154,7 @@ struct wcss_data {
+- 	u32 version;
+- 	bool aon_reset_required;
+- 	bool wcss_q6_reset_required;
+-+	bool bcr_reset_required;
+- 	const char *ssr_name;
+- 	const char *sysmon_name;
+- 	int ssctl_id;
+-@@ -875,10 +876,13 @@ static int q6v5_wcss_init_reset(struct q
+- 		}
+- 	}
+- 
+--	wcss->wcss_q6_bcr_reset = devm_reset_control_get_exclusive(dev, "wcss_q6_bcr_reset");
+--	if (IS_ERR(wcss->wcss_q6_bcr_reset)) {
+--		dev_err(wcss->dev, "unable to acquire wcss_q6_bcr_reset\n");
+--		return PTR_ERR(wcss->wcss_q6_bcr_reset);
+-+	if (desc->bcr_reset_required) {
+-+		wcss->wcss_q6_bcr_reset = devm_reset_control_get_exclusive(dev,
+-+									   "wcss_q6_bcr_reset");
+-+		if (IS_ERR(wcss->wcss_q6_bcr_reset)) {
+-+			dev_err(wcss->dev, "unable to acquire wcss_q6_bcr_reset\n");
+-+			return PTR_ERR(wcss->wcss_q6_bcr_reset);
+-+		}
+- 	}
+- 
+- 	return 0;
+-@@ -929,9 +933,9 @@ static int q6v5_wcss_init_mmio(struct q6
+- 		return -EINVAL;
+- 	}
+- 
+--	wcss->halt_q6 = halt_reg[0];
+--	wcss->halt_wcss = halt_reg[1];
+--	wcss->halt_nc = halt_reg[2];
+-+	wcss->halt_q6 = halt_reg[1];
+-+	wcss->halt_wcss = halt_reg[2];
+-+	wcss->halt_nc = halt_reg[3];
+- 
+- 	return 0;
+- }
+-@@ -1178,6 +1182,7 @@ static const struct wcss_data wcss_ipq80
+- 	.crash_reason_smem = WCSS_CRASH_REASON,
+- 	.aon_reset_required = true,
+- 	.wcss_q6_reset_required = true,
+-+	.bcr_reset_required = false,
+- 	.ssr_name = "q6wcss",
+- 	.ops = &q6v5_wcss_ipq8074_ops,
+- 	.requires_force_stop = true,
+-@@ -1192,6 +1197,7 @@ static const struct wcss_data wcss_qcs40
+- 	.version = WCSS_QCS404,
+- 	.aon_reset_required = false,
+- 	.wcss_q6_reset_required = false,
+-+	.bcr_reset_required = true,
+- 	.ssr_name = "mpss",
+- 	.sysmon_name = "wcnss",
+- 	.ssctl_id = 0x12,
+diff --git a/target/linux/ipq807x/patches-5.15/0117-dt-bindings-clock-qcom-Add-reset-for-WCSSAON.patch b/target/linux/ipq807x/patches-5.15/0117-dt-bindings-clock-qcom-Add-reset-for-WCSSAON.patch
+deleted file mode 100644
+index fe0e0f9e0b..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0117-dt-bindings-clock-qcom-Add-reset-for-WCSSAON.patch
++++ /dev/null
+@@ -1,26 +0,0 @@
+-From ff7c6533ed8c4de58ed6c8aab03ea59c03eb4f31 Mon Sep 17 00:00:00 2001
+-From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
+-Date: Sat, 30 Jan 2021 10:50:10 +0530
+-Subject: [PATCH] dt-bindings: clock: qcom: Add reset for WCSSAON
+-
+-Add binding for WCSSAON reset required for Q6v5 reset on IPQ8074 SoC.
+-
+-Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
+-Signed-off-by: Sricharan R <sricharan@codeaurora.org>
+-Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
+-Acked-by: Rob Herring <robh@kernel.org>
+-Acked-by: Stephen Boyd <sboyd@kernel.org>
+----
+- include/dt-bindings/clock/qcom,gcc-ipq8074.h | 1 +
+- 1 file changed, 1 insertion(+)
+-
+---- a/include/dt-bindings/clock/qcom,gcc-ipq8074.h
+-+++ b/include/dt-bindings/clock/qcom,gcc-ipq8074.h
+-@@ -381,6 +381,7 @@
+- #define GCC_NSSPORT4_RESET			143
+- #define GCC_NSSPORT5_RESET			144
+- #define GCC_NSSPORT6_RESET			145
+-+#define GCC_WCSSAON_RESET			146
+- 
+- #define USB0_GDSC				0
+- #define USB1_GDSC				1
+diff --git a/target/linux/ipq807x/patches-5.15/0118-clk-qcom-Add-WCSSAON-reset.patch b/target/linux/ipq807x/patches-5.15/0118-clk-qcom-Add-WCSSAON-reset.patch
+deleted file mode 100644
+index 791531775e..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0118-clk-qcom-Add-WCSSAON-reset.patch
++++ /dev/null
+@@ -1,25 +0,0 @@
+-From 43d9788f546d24df22d8ba3fcc2497d7ccc198f3 Mon Sep 17 00:00:00 2001
+-From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
+-Date: Sat, 30 Jan 2021 10:50:11 +0530
+-Subject: [PATCH] clk: qcom: Add WCSSAON reset
+-
+-Add WCSSAON reset required for Q6v5 on IPQ8074 SoC.
+-
+-Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
+-Signed-off-by: Sricharan R <sricharan@codeaurora.org>
+-Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
+-Acked-by: Stephen Boyd <sboyd@kernel.org>
+----
+- drivers/clk/qcom/gcc-ipq8074.c | 1 +
+- 1 file changed, 1 insertion(+)
+-
+---- a/drivers/clk/qcom/gcc-ipq8074.c
+-+++ b/drivers/clk/qcom/gcc-ipq8074.c
+-@@ -4717,6 +4717,7 @@ static const struct qcom_reset_map gcc_i
+- 	[GCC_NSSPORT4_RESET] = { .reg = 0x68014, .bitmask = BIT(27) | GENMASK(9, 8) },
+- 	[GCC_NSSPORT5_RESET] = { .reg = 0x68014, .bitmask = BIT(28) | GENMASK(11, 10) },
+- 	[GCC_NSSPORT6_RESET] = { .reg = 0x68014, .bitmask = BIT(29) | GENMASK(13, 12) },
+-+	[GCC_WCSSAON_RESET] = { 0x59010, 0 },
+- };
+- 
+- static struct gdsc *gcc_ipq8074_gdscs[] = {
+diff --git a/target/linux/ipq807x/patches-5.15/0119-remoteproc-wcss-disable-auto-boot-for-IPQ8074.patch b/target/linux/ipq807x/patches-5.15/0119-remoteproc-wcss-disable-auto-boot-for-IPQ8074.patch
+deleted file mode 100644
+index a562f7864e..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0119-remoteproc-wcss-disable-auto-boot-for-IPQ8074.patch
++++ /dev/null
+@@ -1,48 +0,0 @@
+-From 406a332fd1bcc4e18d73cce390f56272fe9111d7 Mon Sep 17 00:00:00 2001
+-From: Sivaprakash Murugesan <sivaprak@codeaurora.org>
+-Date: Fri, 17 Apr 2020 16:37:10 +0530
+-Subject: [PATCH] remoteproc: wcss: disable auto boot for IPQ8074
+-
+-There is no need for remoteproc to boot automatically, ath11k will trigger
+-booting when its probing.
+-
+-Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- drivers/remoteproc/qcom_q6v5_wcss.c | 4 ++++
+- 1 file changed, 4 insertions(+)
+-
+---- a/drivers/remoteproc/qcom_q6v5_wcss.c
+-+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
+-@@ -161,6 +161,7 @@ struct wcss_data {
+- 	const struct rproc_ops *ops;
+- 	bool requires_force_stop;
+- 	bool need_mem_protection;
+-+	bool need_auto_boot;
+- };
+- 
+- static int q6v5_wcss_reset(struct q6v5_wcss *wcss)
+-@@ -1151,6 +1152,7 @@ static int q6v5_wcss_probe(struct platfo
+- 						      desc->sysmon_name,
+- 						      desc->ssctl_id);
+- 
+-+	rproc->auto_boot = desc->need_auto_boot;
+- 	ret = rproc_add(rproc);
+- 	if (ret)
+- 		goto free_rproc;
+-@@ -1187,6 +1189,7 @@ static const struct wcss_data wcss_ipq80
+- 	.ops = &q6v5_wcss_ipq8074_ops,
+- 	.requires_force_stop = true,
+- 	.need_mem_protection = true,
+-+	.need_auto_boot = false,
+- };
+- 
+- static const struct wcss_data wcss_qcs404_res_init = {
+-@@ -1203,6 +1206,7 @@ static const struct wcss_data wcss_qcs40
+- 	.ssctl_id = 0x12,
+- 	.ops = &q6v5_wcss_qcs404_ops,
+- 	.requires_force_stop = false,
+-+	.need_auto_boot = true,
+- };
+- 
+- static const struct of_device_id q6v5_wcss_of_match[] = {
+diff --git a/target/linux/ipq807x/patches-5.15/0120-arm64-dts-qcom-Enable-Q6v5-WCSS-for-ipq8074-SoC.patch b/target/linux/ipq807x/patches-5.15/0120-arm64-dts-qcom-Enable-Q6v5-WCSS-for-ipq8074-SoC.patch
+deleted file mode 100644
+index e37ba37e96..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0120-arm64-dts-qcom-Enable-Q6v5-WCSS-for-ipq8074-SoC.patch
++++ /dev/null
+@@ -1,120 +0,0 @@
+-From 7388400b8bd42f71d040dbf2fdbdcb834fcc0ede Mon Sep 17 00:00:00 2001
+-From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
+-Date: Sat, 30 Jan 2021 10:50:13 +0530
+-Subject: [PATCH] arm64: dts: qcom: Enable Q6v5 WCSS for ipq8074 SoC
+-
+-Enable remoteproc WCSS PIL driver with glink and ssr subdevices.
+-Also enables smp2p and mailboxes required for IPC.
+-
+-Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
+-Signed-off-by: Sricharan R <sricharan@codeaurora.org>
+-Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 81 +++++++++++++++++++++++++++
+- 1 file changed, 81 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -140,6 +140,32 @@
+- 		};
+- 	};
+- 
+-+	wcss: smp2p-wcss {
+-+		compatible = "qcom,smp2p";
+-+		qcom,smem = <435>, <428>;
+-+
+-+		interrupt-parent = <&intc>;
+-+		interrupts = <0 322 1>;
+-+
+-+		mboxes = <&apcs_glb 9>;
+-+
+-+		qcom,local-pid = <0>;
+-+		qcom,remote-pid = <1>;
+-+
+-+		wcss_smp2p_out: master-kernel {
+-+			qcom,entry-name = "master-kernel";
+-+			qcom,smp2p-feature-ssr-ack;
+-+			#qcom,smem-state-cells = <1>;
+-+		};
+-+
+-+		wcss_smp2p_in: slave-kernel {
+-+			qcom,entry-name = "slave-kernel";
+-+
+-+			interrupt-controller;
+-+			#interrupt-cells = <2>;
+-+		};
+-+	};
+-+
+- 	soc: soc {
+- 		#address-cells = <0x1>;
+- 		#size-cells = <0x1>;
+-@@ -409,6 +435,11 @@
+- 			#hwlock-cells = <1>;
+- 		};
+- 
+-+		tcsr_q6: syscon@1945000 {
+-+			compatible = "syscon";
+-+			reg = <0x01945000 0xe000>;
+-+		};
+-+
+- 		spmi_bus: spmi@200f000 {
+- 			compatible = "qcom,spmi-pmic-arb";
+- 			reg = <0x0200f000 0x001000>,
+-@@ -913,6 +944,56 @@
+- 				      "axi_s_sticky";
+- 			status = "disabled";
+- 		};
+-+
+-+		q6v5_wcss: q6v5_wcss@cd00000 {
+-+			compatible = "qcom,ipq8074-wcss-pil";
+-+			reg = <0x0cd00000 0x4040>,
+-+			      <0x004ab000 0x20>;
+-+			reg-names = "qdsp6",
+-+				    "rmb";
+-+			qca,auto-restart;
+-+			qca,extended-intc;
+-+			interrupts-extended = <&intc 0 325 1>,
+-+					      <&wcss_smp2p_in 0 0>,
+-+					      <&wcss_smp2p_in 1 0>,
+-+					      <&wcss_smp2p_in 2 0>,
+-+					      <&wcss_smp2p_in 3 0>;
+-+			interrupt-names = "wdog",
+-+					  "fatal",
+-+					  "ready",
+-+					  "handover",
+-+					  "stop-ack";
+-+
+-+			resets = <&gcc GCC_WCSSAON_RESET>,
+-+				 <&gcc GCC_WCSS_BCR>,
+-+				 <&gcc GCC_WCSS_Q6_BCR>;
+-+
+-+			reset-names = "wcss_aon_reset",
+-+				      "wcss_reset",
+-+				      "wcss_q6_reset";
+-+
+-+			clocks = <&gcc GCC_PRNG_AHB_CLK>;
+-+			clock-names = "prng";
+-+
+-+			qcom,halt-regs = <&tcsr_q6 0xa000 0xd000 0x0>;
+-+
+-+			qcom,smem-states = <&wcss_smp2p_out 0>,
+-+					   <&wcss_smp2p_out 1>;
+-+			qcom,smem-state-names = "shutdown",
+-+						"stop";
+-+
+-+			memory-region = <&q6_region>;
+-+
+-+			glink-edge {
+-+				interrupts = <GIC_SPI 321 IRQ_TYPE_EDGE_RISING>;
+-+				qcom,remote-pid = <1>;
+-+				mboxes = <&apcs_glb 8>;
+-+
+-+				rpm_requests {
+-+					qcom,glink-channels = "IPCRTR";
+-+				};
+-+			};
+-+		};
+- 	};
+- 
+- 	timer {
+diff --git a/target/linux/ipq807x/patches-5.15/0121-arm64-dts-ipq8074-Add-WLAN-node.patch b/target/linux/ipq807x/patches-5.15/0121-arm64-dts-ipq8074-Add-WLAN-node.patch
+deleted file mode 100644
+index bd5410c934..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0121-arm64-dts-ipq8074-Add-WLAN-node.patch
++++ /dev/null
+@@ -1,135 +0,0 @@
+-From a67d1901741c162645eda0dbdc3a2c0c2aff5cf4 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Tue, 21 Dec 2021 14:49:36 +0100
+-Subject: [PATCH] arm64: dts: ipq8074: Add WLAN node
+-
+-IPQ8074 has a AHB based Q6v5 802.11ax radios that are supported
+-by the ath11k.
+-
+-Add the required DT node to enable the built-in radios.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 111 ++++++++++++++++++++++++++
+- 1 file changed, 111 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -994,6 +994,117 @@
+- 				};
+- 			};
+- 		};
+-+
+-+		wifi: wifi@c0000000 {
+-+			compatible = "qcom,ipq8074-wifi";
+-+			reg = <0xc000000 0x2000000>;
+-+
+-+			interrupts = <GIC_SPI 320 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 319 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 316 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 314 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 311 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 310 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 411 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 410 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 40 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 302 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 301 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 295 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 294 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 293 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 291 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 290 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 288 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 239 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 236 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 235 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 234 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 233 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 232 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 231 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 230 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 229 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 228 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 224 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 223 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 183 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 180 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 179 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 160 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 157 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
+-+
+-+			interrupt-names = "misc-pulse1",
+-+					  "misc-latch",
+-+					  "sw-exception",
+-+					  "ce0",
+-+					  "ce1",
+-+					  "ce2",
+-+					  "ce3",
+-+					  "ce4",
+-+					  "ce5",
+-+					  "ce6",
+-+					  "ce7",
+-+					  "ce8",
+-+					  "ce9",
+-+					  "ce10",
+-+					  "ce11",
+-+					  "host2wbm-desc-feed",
+-+					  "host2reo-re-injection",
+-+					  "host2reo-command",
+-+					  "host2rxdma-monitor-ring3",
+-+					  "host2rxdma-monitor-ring2",
+-+					  "host2rxdma-monitor-ring1",
+-+					  "reo2ost-exception",
+-+					  "wbm2host-rx-release",
+-+					  "reo2host-status",
+-+					  "reo2host-destination-ring4",
+-+					  "reo2host-destination-ring3",
+-+					  "reo2host-destination-ring2",
+-+					  "reo2host-destination-ring1",
+-+					  "rxdma2host-monitor-destination-mac3",
+-+					  "rxdma2host-monitor-destination-mac2",
+-+					  "rxdma2host-monitor-destination-mac1",
+-+					  "ppdu-end-interrupts-mac3",
+-+					  "ppdu-end-interrupts-mac2",
+-+					  "ppdu-end-interrupts-mac1",
+-+					  "rxdma2host-monitor-status-ring-mac3",
+-+					  "rxdma2host-monitor-status-ring-mac2",
+-+					  "rxdma2host-monitor-status-ring-mac1",
+-+					  "host2rxdma-host-buf-ring-mac3",
+-+					  "host2rxdma-host-buf-ring-mac2",
+-+					  "host2rxdma-host-buf-ring-mac1",
+-+					  "rxdma2host-destination-ring-mac3",
+-+					  "rxdma2host-destination-ring-mac2",
+-+					  "rxdma2host-destination-ring-mac1",
+-+					  "host2tcl-input-ring4",
+-+					  "host2tcl-input-ring3",
+-+					  "host2tcl-input-ring2",
+-+					  "host2tcl-input-ring1",
+-+					  "wbm2host-tx-completions-ring3",
+-+					  "wbm2host-tx-completions-ring2",
+-+					  "wbm2host-tx-completions-ring1",
+-+					  "tcl2host-status-ring";
+-+			qcom,rproc = <&q6v5_wcss>;
+-+			status = "disabled";
+-+		};
+- 	};
+- 
+- 	timer {
+diff --git a/target/linux/ipq807x/patches-5.15/0122-arm64-dts-ipq8074-add-CPU-clock.patch b/target/linux/ipq807x/patches-5.15/0122-arm64-dts-ipq8074-add-CPU-clock.patch
+deleted file mode 100644
+index a3c5f344ab..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0122-arm64-dts-ipq8074-add-CPU-clock.patch
++++ /dev/null
+@@ -1,59 +0,0 @@
+-From cb3ef99c1553565e1dc0301ccd5c1c0fa2d15c15 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 31 Dec 2021 17:56:14 +0100
+-Subject: [PATCH] arm64: dts: ipq8074: add CPU clock
+-
+-Now that CPU clock is exposed and can be controlled, add the necessary
+-properties to the CPU nodes.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 9 +++++++++
+- 1 file changed, 9 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -5,6 +5,7 @@
+- 
+- #include <dt-bindings/interrupt-controller/arm-gic.h>
+- #include <dt-bindings/clock/qcom,gcc-ipq8074.h>
+-+#include <dt-bindings/clock/qcom,apss-ipq.h>
+- 
+- / {
+- 	#address-cells = <2>;
+-@@ -38,6 +39,8 @@
+- 			reg = <0x0>;
+- 			next-level-cache = <&L2_0>;
+- 			enable-method = "psci";
+-+			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
+-+			clock-names = "cpu";
+- 		};
+- 
+- 		CPU1: cpu@1 {
+-@@ -46,6 +49,8 @@
+- 			enable-method = "psci";
+- 			reg = <0x1>;
+- 			next-level-cache = <&L2_0>;
+-+			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
+-+			clock-names = "cpu";
+- 		};
+- 
+- 		CPU2: cpu@2 {
+-@@ -54,6 +59,8 @@
+- 			enable-method = "psci";
+- 			reg = <0x2>;
+- 			next-level-cache = <&L2_0>;
+-+			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
+-+			clock-names = "cpu";
+- 		};
+- 
+- 		CPU3: cpu@3 {
+-@@ -62,6 +69,8 @@
+- 			enable-method = "psci";
+- 			reg = <0x3>;
+- 			next-level-cache = <&L2_0>;
+-+			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
+-+			clock-names = "cpu";
+- 		};
+- 
+- 		L2_0: l2-cache {
+diff --git a/target/linux/ipq807x/patches-5.15/0123-arm64-dts-ipq8074-add-cooling-cells-to-CPU-nodes.patch b/target/linux/ipq807x/patches-5.15/0123-arm64-dts-ipq8074-add-cooling-cells-to-CPU-nodes.patch
+deleted file mode 100644
+index 3520b38134..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0123-arm64-dts-ipq8074-add-cooling-cells-to-CPU-nodes.patch
++++ /dev/null
+@@ -1,48 +0,0 @@
+-From 347ca56e86c99021fad059b9a8ef101245b8507e Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 31 Dec 2021 20:38:06 +0100
+-Subject: [PATCH] arm64: dts: ipq8074: add cooling cells to CPU nodes
+-
+-Since there is CPU Freq support as well as thermal sensor support
+-now for the IPQ8074, add cooling cells to CPU nodes so that they can
+-be used as cooling devices using CPU Freq.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++++
+- 1 file changed, 4 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -41,6 +41,7 @@
+- 			enable-method = "psci";
+- 			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
+- 			clock-names = "cpu";
+-+			#cooling-cells = <2>;
+- 		};
+- 
+- 		CPU1: cpu@1 {
+-@@ -51,6 +52,7 @@
+- 			next-level-cache = <&L2_0>;
+- 			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
+- 			clock-names = "cpu";
+-+			#cooling-cells = <2>;
+- 		};
+- 
+- 		CPU2: cpu@2 {
+-@@ -61,6 +63,7 @@
+- 			next-level-cache = <&L2_0>;
+- 			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
+- 			clock-names = "cpu";
+-+			#cooling-cells = <2>;
+- 		};
+- 
+- 		CPU3: cpu@3 {
+-@@ -71,6 +74,7 @@
+- 			next-level-cache = <&L2_0>;
+- 			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
+- 			clock-names = "cpu";
+-+			#cooling-cells = <2>;
+- 		};
+- 
+- 		L2_0: l2-cache {
+diff --git a/target/linux/ipq807x/patches-5.15/0124-soc-qcom-socinfo-move-SMEM-item-struct-and-defines-t.patch b/target/linux/ipq807x/patches-5.15/0124-soc-qcom-socinfo-move-SMEM-item-struct-and-defines-t.patch
+deleted file mode 100644
+index 30f6e988aa..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0124-soc-qcom-socinfo-move-SMEM-item-struct-and-defines-t.patch
++++ /dev/null
+@@ -1,168 +0,0 @@
+-From 97505f4c049fa2e8c86a53411a9e599033898533 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Sat, 31 Dec 2022 00:27:42 +0100
+-Subject: [PATCH] soc: qcom: socinfo: move SMEM item struct and defines to a
+- header
+-
+-Move SMEM item struct and related defines to a header in order to be able
+-to reuse them in the Qualcomm NVMEM CPUFreq driver instead of duplicating
+-them.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- drivers/soc/qcom/socinfo.c       | 58 +--------------------------
+- include/linux/soc/qcom/socinfo.h | 67 ++++++++++++++++++++++++++++++++
+- 2 files changed, 68 insertions(+), 57 deletions(-)
+- create mode 100644 include/linux/soc/qcom/socinfo.h
+-
+---- a/drivers/soc/qcom/socinfo.c
+-+++ b/drivers/soc/qcom/socinfo.c
+-@@ -11,6 +11,7 @@
+- #include <linux/random.h>
+- #include <linux/slab.h>
+- #include <linux/soc/qcom/smem.h>
+-+#include <linux/soc/qcom/socinfo.h>
+- #include <linux/string.h>
+- #include <linux/sys_soc.h>
+- #include <linux/types.h>
+-@@ -25,15 +26,6 @@
+- #define SOCINFO_MINOR(ver) ((ver) & 0xffff)
+- #define SOCINFO_VERSION(maj, min)  ((((maj) & 0xffff) << 16)|((min) & 0xffff))
+- 
+--#define SMEM_SOCINFO_BUILD_ID_LENGTH           32
+--#define SMEM_SOCINFO_CHIP_ID_LENGTH            32
+--
+--/*
+-- * SMEM item id, used to acquire handles to respective
+-- * SMEM region.
+-- */
+--#define SMEM_HW_SW_BUILD_ID            137
+--
+- #ifdef CONFIG_DEBUG_FS
+- #define SMEM_IMAGE_VERSION_BLOCKS_COUNT        32
+- #define SMEM_IMAGE_VERSION_SIZE                4096
+-@@ -105,54 +97,6 @@ static const char *const pmic_models[] =
+- };
+- #endif /* CONFIG_DEBUG_FS */
+- 
+--/* Socinfo SMEM item structure */
+--struct socinfo {
+--	__le32 fmt;
+--	__le32 id;
+--	__le32 ver;
+--	char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH];
+--	/* Version 2 */
+--	__le32 raw_id;
+--	__le32 raw_ver;
+--	/* Version 3 */
+--	__le32 hw_plat;
+--	/* Version 4 */
+--	__le32 plat_ver;
+--	/* Version 5 */
+--	__le32 accessory_chip;
+--	/* Version 6 */
+--	__le32 hw_plat_subtype;
+--	/* Version 7 */
+--	__le32 pmic_model;
+--	__le32 pmic_die_rev;
+--	/* Version 8 */
+--	__le32 pmic_model_1;
+--	__le32 pmic_die_rev_1;
+--	__le32 pmic_model_2;
+--	__le32 pmic_die_rev_2;
+--	/* Version 9 */
+--	__le32 foundry_id;
+--	/* Version 10 */
+--	__le32 serial_num;
+--	/* Version 11 */
+--	__le32 num_pmics;
+--	__le32 pmic_array_offset;
+--	/* Version 12 */
+--	__le32 chip_family;
+--	__le32 raw_device_family;
+--	__le32 raw_device_num;
+--	/* Version 13 */
+--	__le32 nproduct_id;
+--	char chip_id[SMEM_SOCINFO_CHIP_ID_LENGTH];
+--	/* Version 14 */
+--	__le32 num_clusters;
+--	__le32 ncluster_array_offset;
+--	__le32 num_defective_parts;
+--	__le32 ndefective_parts_array_offset;
+--	/* Version 15 */
+--	__le32 nmodem_supported;
+--};
+--
+- #ifdef CONFIG_DEBUG_FS
+- struct socinfo_params {
+- 	u32 raw_device_family;
+---- /dev/null
+-+++ b/include/linux/soc/qcom/socinfo.h
+-@@ -0,0 +1,67 @@
+-+// SPDX-License-Identifier: GPL-2.0
+-+/*
+-+ * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved.
+-+ * Copyright (c) 2017-2019, Linaro Ltd.
+-+ */
+-+
+-+#ifndef __QCOM_SOCINFO_H__
+-+#define __QCOM_SOCINFO_H__
+-+
+-+/*
+-+ * SMEM item id, used to acquire handles to respective
+-+ * SMEM region.
+-+ */
+-+#define SMEM_HW_SW_BUILD_ID		137
+-+
+-+#define SMEM_SOCINFO_BUILD_ID_LENGTH	32
+-+#define SMEM_SOCINFO_CHIP_ID_LENGTH	32
+-+
+-+/* Socinfo SMEM item structure */
+-+struct socinfo {
+-+	__le32 fmt;
+-+	__le32 id;
+-+	__le32 ver;
+-+	char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH];
+-+	/* Version 2 */
+-+	__le32 raw_id;
+-+	__le32 raw_ver;
+-+	/* Version 3 */
+-+	__le32 hw_plat;
+-+	/* Version 4 */
+-+	__le32 plat_ver;
+-+	/* Version 5 */
+-+	__le32 accessory_chip;
+-+	/* Version 6 */
+-+	__le32 hw_plat_subtype;
+-+	/* Version 7 */
+-+	__le32 pmic_model;
+-+	__le32 pmic_die_rev;
+-+	/* Version 8 */
+-+	__le32 pmic_model_1;
+-+	__le32 pmic_die_rev_1;
+-+	__le32 pmic_model_2;
+-+	__le32 pmic_die_rev_2;
+-+	/* Version 9 */
+-+	__le32 foundry_id;
+-+	/* Version 10 */
+-+	__le32 serial_num;
+-+	/* Version 11 */
+-+	__le32 num_pmics;
+-+	__le32 pmic_array_offset;
+-+	/* Version 12 */
+-+	__le32 chip_family;
+-+	__le32 raw_device_family;
+-+	__le32 raw_device_num;
+-+	/* Version 13 */
+-+	__le32 nproduct_id;
+-+	char chip_id[SMEM_SOCINFO_CHIP_ID_LENGTH];
+-+	/* Version 14 */
+-+	__le32 num_clusters;
+-+	__le32 ncluster_array_offset;
+-+	__le32 num_defective_parts;
+-+	__le32 ndefective_parts_array_offset;
+-+	/* Version 15 */
+-+	__le32 nmodem_supported;
+-+};
+-+
+-+#endif
+diff --git a/target/linux/ipq807x/patches-5.15/0125-cpufreq-qcom-nvmem-reuse-socinfo-SMEM-item-struct.patch b/target/linux/ipq807x/patches-5.15/0125-cpufreq-qcom-nvmem-reuse-socinfo-SMEM-item-struct.patch
+deleted file mode 100644
+index aa7fe5a868..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0125-cpufreq-qcom-nvmem-reuse-socinfo-SMEM-item-struct.patch
++++ /dev/null
+@@ -1,50 +0,0 @@
+-From b7b7ea3a0cab42d4f1d4c9ae9eb7c7a3d03e7982 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 30 Dec 2022 22:51:47 +0100
+-Subject: [PATCH] cpufreq: qcom-nvmem: reuse socinfo SMEM item struct
+-
+-Now that socinfo SMEM item struct and defines have been moved to a header
+-so we can utilize that instead.
+-
+-Now the SMEM value can be accesed directly, there is no need for defining
+-the ID for the SMEM request as well.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- drivers/cpufreq/qcom-cpufreq-nvmem.c | 14 +++++---------
+- 1 file changed, 5 insertions(+), 9 deletions(-)
+-
+---- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
+-+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
+-@@ -28,8 +28,7 @@
+- #include <linux/pm_opp.h>
+- #include <linux/slab.h>
+- #include <linux/soc/qcom/smem.h>
+--
+--#define MSM_ID_SMEM	137
+-+#include <linux/soc/qcom/socinfo.h>
+- 
+- enum _msm_id {
+- 	MSM8996V3 = 0xF6ul,
+-@@ -145,17 +144,14 @@ static void get_krait_bin_format_b(struc
+- static enum _msm8996_version qcom_cpufreq_get_msm_id(void)
+- {
+- 	size_t len;
+--	u32 *msm_id;
+-+	struct socinfo *info;
+- 	enum _msm8996_version version;
+- 
+--	msm_id = qcom_smem_get(QCOM_SMEM_HOST_ANY, MSM_ID_SMEM, &len);
+--	if (IS_ERR(msm_id))
+-+	info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID, &len);
+-+	if (IS_ERR(info))
+- 		return NUM_OF_MSM8996_VERSIONS;
+- 
+--	/* The first 4 bytes are format, next to them is the actual msm-id */
+--	msm_id++;
+--
+--	switch ((enum _msm_id)*msm_id) {
+-+	switch (info->id) {
+- 	case MSM8996V3:
+- 	case APQ8096V3:
+- 		version = MSM8996_V3;
+diff --git a/target/linux/ipq807x/patches-5.15/0126-cpufreq-qcom-nvmem-use-SoC-ID-s-from-bindings.patch b/target/linux/ipq807x/patches-5.15/0126-cpufreq-qcom-nvmem-use-SoC-ID-s-from-bindings.patch
+deleted file mode 100644
+index 3303b40277..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0126-cpufreq-qcom-nvmem-use-SoC-ID-s-from-bindings.patch
++++ /dev/null
+@@ -1,46 +0,0 @@
+-From 132b2f15b8ae3f848b3e6f2962f409cfab0ca759 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 30 Dec 2022 23:33:47 +0100
+-Subject: [PATCH] cpufreq: qcom-nvmem: use SoC ID-s from bindings
+-
+-SMEM SoC ID-s are now stored in DT bindings so lets use those instead of
+-defining them in the driver again.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- drivers/cpufreq/qcom-cpufreq-nvmem.c | 15 +++++----------
+- 1 file changed, 5 insertions(+), 10 deletions(-)
+-
+---- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
+-+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
+-@@ -30,12 +30,7 @@
+- #include <linux/soc/qcom/smem.h>
+- #include <linux/soc/qcom/socinfo.h>
+- 
+--enum _msm_id {
+--	MSM8996V3 = 0xF6ul,
+--	APQ8096V3 = 0x123ul,
+--	MSM8996SG = 0x131ul,
+--	APQ8096SG = 0x138ul,
+--};
+-+#include <dt-bindings/arm/qcom,ids.h>
+- 
+- enum _msm8996_version {
+- 	MSM8996_V3,
+-@@ -152,12 +147,12 @@ static enum _msm8996_version qcom_cpufre
+- 		return NUM_OF_MSM8996_VERSIONS;
+- 
+- 	switch (info->id) {
+--	case MSM8996V3:
+--	case APQ8096V3:
+-+	case QCOM_ID_MSM8996:
+-+	case QCOM_ID_APQ8096:
+- 		version = MSM8996_V3;
+- 		break;
+--	case MSM8996SG:
+--	case APQ8096SG:
+-+	case QCOM_ID_MSM8996SG:
+-+	case QCOM_ID_APQ8096SG:
+- 		version = MSM8996_SG;
+- 		break;
+- 	default:
+diff --git a/target/linux/ipq807x/patches-5.15/0127-cpufreq-qcom-nvmem-make-qcom_cpufreq_get_msm_id-retu.patch b/target/linux/ipq807x/patches-5.15/0127-cpufreq-qcom-nvmem-make-qcom_cpufreq_get_msm_id-retu.patch
+deleted file mode 100644
+index 768866b1b2..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0127-cpufreq-qcom-nvmem-make-qcom_cpufreq_get_msm_id-retu.patch
++++ /dev/null
+@@ -1,106 +0,0 @@
+-From 85bf71b130ab0e939f53ec9cf1131d67d148bc9a Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Sat, 31 Dec 2022 12:45:31 +0100
+-Subject: [PATCH] cpufreq: qcom-nvmem: make qcom_cpufreq_get_msm_id() return
+- the SoC ID
+-
+-Currently, qcom_cpufreq_get_msm_id() does not simply return the SoC ID
+-after getting it via SMEM call but instead uses an enum to encode the
+-matched SMEM ID to 2 variants of MSM8996 which are then used in
+-qcom_cpufreq_kryo_name_version() to set the supported version.
+-
+-This prevents qcom_cpufreq_get_msm_id() from being universal and its doing
+-more than its name suggests, so lets make it just return the SoC ID
+-directly which allows matching directly on the SoC ID and removes the need
+-for msm8996_version enum which simplifies the driver.
+-It also allows reusing the qcom_cpufreq_get_msm_id() for new SoC-s.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- drivers/cpufreq/qcom-cpufreq-nvmem.c | 44 ++++++++--------------------
+- 1 file changed, 12 insertions(+), 32 deletions(-)
+-
+---- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
+-+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
+-@@ -32,12 +32,6 @@
+- 
+- #include <dt-bindings/arm/qcom,ids.h>
+- 
+--enum _msm8996_version {
+--	MSM8996_V3,
+--	MSM8996_SG,
+--	NUM_OF_MSM8996_VERSIONS,
+--};
+--
+- struct qcom_cpufreq_drv;
+- 
+- struct qcom_cpufreq_match_data {
+-@@ -136,30 +130,16 @@ static void get_krait_bin_format_b(struc
+- 	dev_dbg(cpu_dev, "PVS version: %d\n", *pvs_ver);
+- }
+- 
+--static enum _msm8996_version qcom_cpufreq_get_msm_id(void)
+-+static int qcom_cpufreq_get_msm_id(void)
+- {
+- 	size_t len;
+- 	struct socinfo *info;
+--	enum _msm8996_version version;
+- 
+- 	info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID, &len);
+- 	if (IS_ERR(info))
+--		return NUM_OF_MSM8996_VERSIONS;
+--
+--	switch (info->id) {
+--	case QCOM_ID_MSM8996:
+--	case QCOM_ID_APQ8096:
+--		version = MSM8996_V3;
+--		break;
+--	case QCOM_ID_MSM8996SG:
+--	case QCOM_ID_APQ8096SG:
+--		version = MSM8996_SG;
+--		break;
+--	default:
+--		version = NUM_OF_MSM8996_VERSIONS;
+--	}
+-+		return PTR_ERR(info);
+- 
+--	return version;
+-+	return info->id;
+- }
+- 
+- static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
+-@@ -168,25 +148,25 @@ static int qcom_cpufreq_kryo_name_versio
+- 					  struct qcom_cpufreq_drv *drv)
+- {
+- 	size_t len;
+-+	int msm_id;
+- 	u8 *speedbin;
+--	enum _msm8996_version msm8996_version;
+- 	*pvs_name = NULL;
+- 
+--	msm8996_version = qcom_cpufreq_get_msm_id();
+--	if (NUM_OF_MSM8996_VERSIONS == msm8996_version) {
+--		dev_err(cpu_dev, "Not Snapdragon 820/821!");
+--		return -ENODEV;
+--	}
+-+	msm_id = qcom_cpufreq_get_msm_id();
+-+	if (msm_id < 0)
+-+		return msm_id;
+- 
+- 	speedbin = nvmem_cell_read(speedbin_nvmem, &len);
+- 	if (IS_ERR(speedbin))
+- 		return PTR_ERR(speedbin);
+- 
+--	switch (msm8996_version) {
+--	case MSM8996_V3:
+-+	switch (msm_id) {
+-+	case QCOM_ID_MSM8996:
+-+	case QCOM_ID_APQ8096:
+- 		drv->versions = 1 << (unsigned int)(*speedbin);
+- 		break;
+--	case MSM8996_SG:
+-+	case QCOM_ID_MSM8996SG:
+-+	case QCOM_ID_APQ8096SG:
+- 		drv->versions = 1 << ((unsigned int)(*speedbin) + 4);
+- 		break;
+- 	default:
+diff --git a/target/linux/ipq807x/patches-5.15/0128-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch b/target/linux/ipq807x/patches-5.15/0128-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch
+deleted file mode 100644
+index 49fd4e4cc0..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0128-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch
++++ /dev/null
+@@ -1,100 +0,0 @@
+-From 813f2b5ad002e691b92154037f154b4444eedd54 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Sat, 31 Dec 2022 13:03:41 +0100
+-Subject: [PATCH] cpufreq: qcom-nvmem: add support for IPQ8074
+-
+-IPQ8074 comes in 2 families:
+-* IPQ8070A/IPQ8071A (Acorn) up to 1.4GHz
+-* IPQ8072A/IPQ8074A/IPQ8076A/IPQ8078A (Hawkeye) up to 2.2GHz
+-
+-So, in order to be able to share one OPP table lets add support for IPQ8074
+-family based of SMEM SoC ID-s as speedbin fuse is always 0 on IPQ8074.
+-
+-IPQ8074 compatible is blacklisted from DT platdev as the cpufreq device
+-will get created by NVMEM CPUFreq driver.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- drivers/cpufreq/cpufreq-dt-platdev.c |  1 +
+- drivers/cpufreq/qcom-cpufreq-nvmem.c | 39 ++++++++++++++++++++++++++++
+- 2 files changed, 40 insertions(+)
+-
+---- a/drivers/cpufreq/cpufreq-dt-platdev.c
+-+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
+-@@ -159,6 +159,7 @@ static const struct of_device_id blockli
+- 	{ .compatible = "ti,omap3", },
+- 
+- 	{ .compatible = "qcom,ipq8064", },
+-+	{ .compatible = "qcom,ipq8074", },
+- 	{ .compatible = "qcom,apq8064", },
+- 	{ .compatible = "qcom,msm8974", },
+- 	{ .compatible = "qcom,msm8960", },
+---- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
+-+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
+-@@ -32,6 +32,9 @@
+- 
+- #include <dt-bindings/arm/qcom,ids.h>
+- 
+-+#define IPQ8074_HAWKEYE_VERSION		BIT(0)
+-+#define IPQ8074_ACORN_VERSION		BIT(1)
+-+
+- struct qcom_cpufreq_drv;
+- 
+- struct qcom_cpufreq_match_data {
+-@@ -218,6 +221,37 @@ len_error:
+- 	return ret;
+- }
+- 
+-+static int qcom_cpufreq_ipq8074_name_version(struct device *cpu_dev,
+-+					     struct nvmem_cell *speedbin_nvmem,
+-+					     char **pvs_name,
+-+					     struct qcom_cpufreq_drv *drv)
+-+{
+-+	int msm_id;
+-+	*pvs_name = NULL;
+-+
+-+	msm_id = qcom_cpufreq_get_msm_id();
+-+	if (msm_id < 0)
+-+		return msm_id;
+-+
+-+	switch (msm_id) {
+-+	case QCOM_ID_IPQ8070A:
+-+	case QCOM_ID_IPQ8071A:
+-+		drv->versions = IPQ8074_ACORN_VERSION;
+-+		break;
+-+	case QCOM_ID_IPQ8072A:
+-+	case QCOM_ID_IPQ8074A:
+-+	case QCOM_ID_IPQ8076A:
+-+	case QCOM_ID_IPQ8078A:
+-+		drv->versions = IPQ8074_HAWKEYE_VERSION;
+-+		break;
+-+	default:
+-+		BUG();
+-+		break;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+- static const struct qcom_cpufreq_match_data match_data_kryo = {
+- 	.get_version = qcom_cpufreq_kryo_name_version,
+- };
+-@@ -232,6 +266,10 @@ static const struct qcom_cpufreq_match_d
+- 	.genpd_names = qcs404_genpd_names,
+- };
+- 
+-+static const struct qcom_cpufreq_match_data match_data_ipq8074 = {
+-+	.get_version = qcom_cpufreq_ipq8074_name_version,
+-+};
+-+
+- static int qcom_cpufreq_probe(struct platform_device *pdev)
+- {
+- 	struct qcom_cpufreq_drv *drv;
+-@@ -431,6 +469,7 @@ static const struct of_device_id qcom_cp
+- 	{ .compatible = "qcom,msm8996", .data = &match_data_kryo },
+- 	{ .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
+- 	{ .compatible = "qcom,ipq8064", .data = &match_data_krait },
+-+	{ .compatible = "qcom,ipq8074", .data = &match_data_ipq8074 },
+- 	{ .compatible = "qcom,apq8064", .data = &match_data_krait },
+- 	{ .compatible = "qcom,msm8974", .data = &match_data_krait },
+- 	{ .compatible = "qcom,msm8960", .data = &match_data_krait },
+diff --git a/target/linux/ipq807x/patches-5.15/0129-arm64-dts-qcom-ipq8074-add-QFPROM-fuses.patch b/target/linux/ipq807x/patches-5.15/0129-arm64-dts-qcom-ipq8074-add-QFPROM-fuses.patch
+deleted file mode 100644
+index 3a6f4e9c87..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0129-arm64-dts-qcom-ipq8074-add-QFPROM-fuses.patch
++++ /dev/null
+@@ -1,128 +0,0 @@
+-From 04d2fc6a551bbd972a6428059b45ce79cb9de9d7 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 6 May 2022 22:38:24 +0200
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: add QFPROM fuses
+-
+-Add the QFPROM node and CPR fuses.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 107 ++++++++++++++++++++++++++
+- 1 file changed, 107 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -340,6 +340,113 @@
+- 			status = "disabled";
+- 		};
+- 
+-+		qfprom: efuse@a4000 {
+-+			compatible = "qcom,ipq8074-qfprom", "qcom,qfprom";
+-+			reg = <0x000a4000 0x1000>;
+-+			#address-cells = <1>;
+-+			#size-cells = <1>;
+-+
+-+			cpr_efuse_speedbin: speedbin@125 {
+-+				reg = <0x125 0x1>;
+-+				bits = <0 3>;
+-+			};
+-+
+-+			cpr_efuse_boost_cfg: boost_cfg@125 {
+-+				reg = <0x125 0x1>;
+-+				bits = <3 3>;
+-+			};
+-+
+-+			cpr_efuse_misc_volt_adj: misc_volt_adj@125 {
+-+				reg = <0x125 0x1>;
+-+				bits = <3 3>;
+-+			};
+-+
+-+			cpr_efuse_boost_volt: boost_volt@126 {
+-+				reg = <0x126 0x1>;
+-+				bits = <6 1>;
+-+			};
+-+
+-+			cpr_efuse_revision: revision@23e {
+-+				reg = <0x23e 0x1>;
+-+				bits = <5 3>;
+-+			};
+-+
+-+			cpr_efuse_ro_sel0: rosel0@249 {
+-+				reg = <0x249 0x1>;
+-+				bits = <0 4>;
+-+			};
+-+
+-+			cpr_efuse_ro_sel1: rosel1@248 {
+-+				reg = <0x248 0x1>;
+-+				bits = <4 4>;
+-+			};
+-+
+-+			cpr_efuse_ro_sel2: rosel2@248 {
+-+				reg = <0x248 0x2>;
+-+				bits = <0 4>;
+-+			};
+-+
+-+			cpr_efuse_ro_sel3: rosel3@249 {
+-+				reg = <0x249 0x1>;
+-+				bits = <4 4>;
+-+			};
+-+
+-+			cpr_efuse_init_voltage0: ivoltage0@23a {
+-+				reg = <0x23a 0x1>;
+-+				bits = <2 6>;
+-+			};
+-+
+-+			cpr_efuse_init_voltage1: ivoltage1@239 {
+-+				reg = <0x239 0x2>;
+-+				bits = <4 6>;
+-+			};
+-+
+-+			cpr_efuse_init_voltage2: ivoltage2@238 {
+-+				reg = <0x238 0x2>;
+-+				bits = <6 6>;
+-+			};
+-+
+-+			cpr_efuse_init_voltage3: ivoltage3@238 {
+-+				reg = <0x238 0x1>;
+-+				bits = <0 6>;
+-+			};
+-+
+-+			cpr_efuse_quot0: quot0@244 {
+-+				reg = <0x244 0x2>;
+-+				bits = <0 12>;
+-+			};
+-+
+-+			cpr_efuse_quot1: quot1@242 {
+-+				reg = <0x242 0x2>;
+-+				bits = <4 12>;
+-+			};
+-+
+-+			cpr_efuse_quot2: quot2@241 {
+-+				reg = <0x241 0x2>;
+-+				bits = <0 12>;
+-+			};
+-+
+-+			cpr_efuse_quot3: quot3@245 {
+-+				reg = <0x245 0x2>;
+-+				bits = <4 12>;
+-+			};
+-+
+-+			cpr_efuse_quot0_offset: quot0_offset@23d {
+-+				reg = <0x23d 0x2>;
+-+				bits = <6 7>;
+-+			};
+-+
+-+			cpr_efuse_quot1_offset: quot1_offset@23c {
+-+				reg = <0x23c 0x2>;
+-+				bits = <7 7>;
+-+			};
+-+
+-+			cpr_efuse_quot2_offset: quot2_offset@23c {
+-+				reg = <0x23c 0x1>;
+-+				bits = <0 7>;
+-+			};
+-+		};
+-+
+- 		prng: rng@e3000 {
+- 			compatible = "qcom,prng-ee";
+- 			reg = <0x000e3000 0x1000>;
+diff --git a/target/linux/ipq807x/patches-5.15/0130-arm64-dts-qcom-ipq8074-add-CPU-OPP-table.patch b/target/linux/ipq807x/patches-5.15/0130-arm64-dts-qcom-ipq8074-add-CPU-OPP-table.patch
+deleted file mode 100644
+index 9c1e7b9d29..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0130-arm64-dts-qcom-ipq8074-add-CPU-OPP-table.patch
++++ /dev/null
+@@ -1,102 +0,0 @@
+-From a20c4e8738a00087aa5d53fe5148ed484e23d229 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Sat, 31 Dec 2022 13:56:26 +0100
+-Subject: [PATCH] arm64: dts: qcom: ipq8074: add CPU OPP table
+-
+-Now that there is NVMEM CPUFreq support for IPQ8074, we can add the OPP
+-table for SoC.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 52 +++++++++++++++++++++++++++
+- 1 file changed, 52 insertions(+)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -42,6 +42,7 @@
+- 			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
+- 			clock-names = "cpu";
+- 			#cooling-cells = <2>;
+-+			operating-points-v2 = <&cpu_opp_table>;
+- 		};
+- 
+- 		CPU1: cpu@1 {
+-@@ -53,6 +54,7 @@
+- 			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
+- 			clock-names = "cpu";
+- 			#cooling-cells = <2>;
+-+			operating-points-v2 = <&cpu_opp_table>;
+- 		};
+- 
+- 		CPU2: cpu@2 {
+-@@ -64,6 +66,7 @@
+- 			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
+- 			clock-names = "cpu";
+- 			#cooling-cells = <2>;
+-+			operating-points-v2 = <&cpu_opp_table>;
+- 		};
+- 
+- 		CPU3: cpu@3 {
+-@@ -75,6 +78,7 @@
+- 			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
+- 			clock-names = "cpu";
+- 			#cooling-cells = <2>;
+-+			operating-points-v2 = <&cpu_opp_table>;
+- 		};
+- 
+- 		L2_0: l2-cache {
+-@@ -83,6 +87,54 @@
+- 		};
+- 	};
+- 
+-+	cpu_opp_table: opp-table {
+-+		compatible = "operating-points-v2-kryo-cpu";
+-+		nvmem-cells = <&cpr_efuse_speedbin>;
+-+		opp-shared;
+-+
+-+		opp-1017600000 {
+-+			opp-hz = /bits/ 64 <1017600000>;
+-+			opp-microvolt = <1>;
+-+			opp-supported-hw = <0xf>;
+-+			clock-latency-ns = <200000>;
+-+		};
+-+
+-+		opp-1382400000 {
+-+			opp-hz = /bits/ 64 <1382400000>;
+-+			opp-microvolt = <2>;
+-+			opp-supported-hw = <0xf>;
+-+			clock-latency-ns = <200000>;
+-+		};
+-+
+-+		opp-1651200000 {
+-+			opp-hz = /bits/ 64 <1651200000>;
+-+			opp-microvolt = <3>;
+-+			opp-supported-hw = <0x1>;
+-+			clock-latency-ns = <200000>;
+-+		};
+-+
+-+		opp-1843200000 {
+-+			opp-hz = /bits/ 64 <1843200000>;
+-+			opp-microvolt = <4>;
+-+			opp-supported-hw = <0x1>;
+-+			clock-latency-ns = <200000>;
+-+		};
+-+
+-+		opp-1920000000 {
+-+			opp-hz = /bits/ 64 <1920000000>;
+-+			opp-microvolt = <5>;
+-+			opp-supported-hw = <0x1>;
+-+			clock-latency-ns = <200000>;
+-+		};
+-+
+-+		opp-2208000000 {
+-+			opp-hz = /bits/ 64 <2208000000>;
+-+			opp-microvolt = <6>;
+-+			opp-supported-hw = <0x1>;
+-+			clock-latency-ns = <200000>;
+-+		};
+-+	};
+-+
+- 	pmu {
+- 		compatible = "arm,cortex-a53-pmu";
+- 		interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+diff --git a/target/linux/ipq807x/patches-5.15/0131-clk-qcom-ipq8074-populate-fw_name-for-usb3phy-s.patch b/target/linux/ipq807x/patches-5.15/0131-clk-qcom-ipq8074-populate-fw_name-for-usb3phy-s.patch
+deleted file mode 100644
+index eb772be4ce..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0131-clk-qcom-ipq8074-populate-fw_name-for-usb3phy-s.patch
++++ /dev/null
+@@ -1,38 +0,0 @@
+-From 614d31c231c7707322b643f409eeb7e28adc7f8c Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Sun, 8 Jan 2023 13:36:28 +0100
+-Subject: [PATCH] clk: qcom: ipq8074: populate fw_name for usb3phy-s
+-
+-Having only .name populated in parent_data for clocks which are only
+-globally searchable currently will not work as the clk core won't copy
+-that name if there is no .fw_name present as well.
+-
+-So, populate .fw_name for usb3phy clocks in parent_data as they were
+-missed by me in ("clk: qcom: ipq8074: populate fw_name for all parents").
+-
+-Fixes: ae55ad32e273 ("clk: qcom: ipq8074: convert to parent data")
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- drivers/clk/qcom/gcc-ipq8074.c | 4 ++--
+- 1 file changed, 2 insertions(+), 2 deletions(-)
+-
+---- a/drivers/clk/qcom/gcc-ipq8074.c
+-+++ b/drivers/clk/qcom/gcc-ipq8074.c
+-@@ -934,7 +934,7 @@ static struct clk_rcg2 usb0_mock_utmi_cl
+- };
+- 
+- static const struct clk_parent_data gcc_usb3phy_0_cc_pipe_clk_xo[] = {
+--	{ .name = "usb3phy_0_cc_pipe_clk" },
+-+	{ .fw_name = "usb3phy_0_cc_pipe_clk", .name = "usb3phy_0_cc_pipe_clk" },
+- 	{ .fw_name = "xo", .name = "xo" },
+- };
+- 
+-@@ -1002,7 +1002,7 @@ static struct clk_rcg2 usb1_mock_utmi_cl
+- };
+- 
+- static const struct clk_parent_data gcc_usb3phy_1_cc_pipe_clk_xo[] = {
+--	{ .name = "usb3phy_1_cc_pipe_clk" },
+-+	{ .fw_name = "usb3phy_1_cc_pipe_clk", .name = "usb3phy_1_cc_pipe_clk" },
+- 	{ .fw_name = "xo", .name = "xo" },
+- };
+- 
+diff --git a/target/linux/ipq807x/patches-5.15/0900-power-Add-Qualcomm-APM.patch b/target/linux/ipq807x/patches-5.15/0900-power-Add-Qualcomm-APM.patch
+deleted file mode 100644
+index 2e5c72b7d1..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0900-power-Add-Qualcomm-APM.patch
++++ /dev/null
+@@ -1,1047 +0,0 @@
+-From 6c98adf98236b8644b8f5e1aa7af9f1a88ea2766 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Mon, 11 Apr 2022 14:38:08 +0200
+-Subject: [PATCH] power: Add Qualcomm APM
+-
+-Add Qualcomm APM driver, which allows scaling cache and memory fabrics.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- drivers/power/Kconfig          |   1 +
+- drivers/power/Makefile         |   1 +
+- drivers/power/qcom/Kconfig     |   7 +
+- drivers/power/qcom/Makefile    |   1 +
+- drivers/power/qcom/apm.c       | 944 +++++++++++++++++++++++++++++++++
+- include/linux/power/qcom/apm.h |  48 ++
+- 6 files changed, 1002 insertions(+)
+- create mode 100644 drivers/power/qcom/Kconfig
+- create mode 100644 drivers/power/qcom/Makefile
+- create mode 100644 drivers/power/qcom/apm.c
+- create mode 100644 include/linux/power/qcom/apm.h
+-
+---- a/drivers/power/Kconfig
+-+++ b/drivers/power/Kconfig
+-@@ -1,3 +1,4 @@
+- # SPDX-License-Identifier: GPL-2.0-only
+- source "drivers/power/reset/Kconfig"
+- source "drivers/power/supply/Kconfig"
+-+source "drivers/power/qcom/Kconfig"
+---- a/drivers/power/Makefile
+-+++ b/drivers/power/Makefile
+-@@ -1,3 +1,4 @@
+- # SPDX-License-Identifier: GPL-2.0-only
+- obj-$(CONFIG_POWER_RESET)	+= reset/
+- obj-$(CONFIG_POWER_SUPPLY)	+= supply/
+-+obj-$(CONFIG_QCOM_APM)		+= qcom/
+---- /dev/null
+-+++ b/drivers/power/qcom/Kconfig
+-@@ -0,0 +1,7 @@
+-+config QCOM_APM
+-+       bool "Qualcomm Technologies Inc platform specific APM driver"
+-+       help
+-+	Platform specific driver to manage the power source of
+-+	memory arrays. Interfaces with regulator drivers to ensure
+-+	SRAM Vmin requirements are met across different performance
+-+	levels.
+---- /dev/null
+-+++ b/drivers/power/qcom/Makefile
+-@@ -0,0 +1 @@
+-+obj-$(CONFIG_QCOM_APM)		+= apm.o
+---- /dev/null
+-+++ b/drivers/power/qcom/apm.c
+-@@ -0,0 +1,944 @@
+-+/*
+-+ * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
+-+ *
+-+ * This program is free software; you can redistribute it and/or modify
+-+ * it under the terms of the GNU General Public License version 2 and
+-+ * only version 2 as published by the Free Software Foundation.
+-+ *
+-+ * This program is distributed in the hope that it will be useful,
+-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-+ * GNU General Public License for more details.
+-+ */
+-+
+-+#define pr_fmt(fmt) "%s: " fmt, __func__
+-+
+-+#include <linux/debugfs.h>
+-+#include <linux/delay.h>
+-+#include <linux/of_device.h>
+-+#include <linux/init.h>
+-+#include <linux/io.h>
+-+#include <linux/kernel.h>
+-+#include <linux/list.h>
+-+#include <linux/module.h>
+-+#include <linux/of.h>
+-+#include <linux/platform_device.h>
+-+#include <linux/slab.h>
+-+#include <linux/string.h>
+-+#include <linux/power/qcom/apm.h>
+-+
+-+/*
+-+ *        VDD_APCC
+-+ * =============================================================
+-+ *       |      VDD_MX                  |                    |
+-+ *       |    ==========================|=============       |
+-+ *    ___|___   ___|___    ___|___   ___|___    ___|___   ___|___
+-+ *   |       | |       |  |       | |       |  |       | |       |
+-+ *   | APCC  | | MX HS |  | MX HS | | APCC  |  | MX HS | | APCC  |
+-+ *   |  HS   | |       |  |       | |  HS   |  |       | |  HS   |
+-+ *   |_______| |_______|  |_______| |_______|  |_______| |_______|
+-+ *       |_________|          |_________|         |__________|
+-+ *            |                    |                    |
+-+ *      ______|_____         ______|_____        _______|_____
+-+ *     |            |       |            |      |             |
+-+ *     |            |       |            |      |             |
+-+ *     |  CPU MEM   |       |   L2 MEM   |      |    L3 MEM   |
+-+ *     |   Arrays   |       |   Arrays   |      |    Arrays   |
+-+ *     |            |       |            |      |             |
+-+ *     |____________|       |____________|      |_____________|
+-+ *
+-+ */
+-+
+-+/* Register value definitions */
+-+#define APCS_GFMUXA_SEL_VAL            0x13
+-+#define APCS_GFMUXA_DESEL_VAL          0x03
+-+#define MSM_APM_MX_MODE_VAL            0x00
+-+#define MSM_APM_APCC_MODE_VAL          0x10
+-+#define MSM_APM_MX_DONE_VAL            0x00
+-+#define MSM_APM_APCC_DONE_VAL          0x03
+-+#define MSM_APM_OVERRIDE_SEL_VAL       0xb0
+-+#define MSM_APM_SEC_CLK_SEL_VAL        0x30
+-+#define SPM_EVENT_SET_VAL              0x01
+-+#define SPM_EVENT_CLEAR_VAL            0x00
+-+
+-+/* Register bit mask definitions */
+-+#define MSM_APM_CTL_STS_MASK            0x0f
+-+
+-+/* Register offset definitions */
+-+#define APCC_APM_MODE              0x00000098
+-+#define APCC_APM_CTL_STS           0x000000a8
+-+#define APCS_SPARE                 0x00000068
+-+#define APCS_VERSION               0x00000fd0
+-+
+-+#define HMSS_VERSION_1P2           0x10020000
+-+
+-+#define MSM_APM_SWITCH_TIMEOUT_US  10
+-+#define SPM_WAKEUP_DELAY_US        2
+-+#define SPM_EVENT_NUM              6
+-+
+-+#define MSM_APM_DRIVER_NAME        "qcom,msm-apm"
+-+
+-+enum {
+-+	MSM8996_ID,
+-+	MSM8953_ID,
+-+	IPQ807x_ID,
+-+};
+-+
+-+struct msm_apm_ctrl_dev {
+-+	struct list_head	list;
+-+	struct device		*dev;
+-+	enum msm_apm_supply	supply;
+-+	spinlock_t		lock;
+-+	void __iomem		*reg_base;
+-+	void __iomem		*apcs_csr_base;
+-+	void __iomem		**apcs_spm_events_addr;
+-+	void __iomem		*apc0_pll_ctl_addr;
+-+	void __iomem		*apc1_pll_ctl_addr;
+-+	u32			version;
+-+	struct dentry		*debugfs;
+-+	u32			msm_id;
+-+};
+-+
+-+#if defined(CONFIG_DEBUG_FS)
+-+static struct dentry *apm_debugfs_base;
+-+#endif
+-+
+-+static DEFINE_MUTEX(apm_ctrl_list_mutex);
+-+static LIST_HEAD(apm_ctrl_list);
+-+
+-+/*
+-+ * Get the resources associated with the APM controller from device tree
+-+ * and remap all I/O addresses that are relevant to this HW revision.
+-+ */
+-+static int msm_apm_ctrl_devm_ioremap(struct platform_device *pdev,
+-+				     struct msm_apm_ctrl_dev *ctrl)
+-+{
+-+	struct device *dev = &pdev->dev;
+-+	struct resource *res;
+-+	static const char *res_name[SPM_EVENT_NUM] = {
+-+		"apc0-l2-spm",
+-+		"apc1-l2-spm",
+-+		"apc0-cpu0-spm",
+-+		"apc0-cpu1-spm",
+-+		"apc1-cpu0-spm",
+-+		"apc1-cpu1-spm"
+-+	};
+-+	int i, ret = 0;
+-+
+-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pm-apcc-glb");
+-+	if (!res) {
+-+		dev_err(dev, "Missing PM APCC Global register physical address");
+-+		return -EINVAL;
+-+	}
+-+	ctrl->reg_base = devm_ioremap(dev, res->start, resource_size(res));
+-+	if (!ctrl->reg_base) {
+-+		dev_err(dev, "Failed to map PM APCC Global registers\n");
+-+		return -ENOMEM;
+-+	}
+-+
+-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "apcs-csr");
+-+	if (!res) {
+-+		dev_err(dev, "Missing APCS CSR physical base address");
+-+		return -EINVAL;
+-+	}
+-+	ctrl->apcs_csr_base = devm_ioremap(dev, res->start, resource_size(res));
+-+	if (!ctrl->apcs_csr_base) {
+-+		dev_err(dev, "Failed to map APCS CSR registers\n");
+-+		return -ENOMEM;
+-+	}
+-+
+-+	ctrl->version = readl_relaxed(ctrl->apcs_csr_base + APCS_VERSION);
+-+
+-+	if (ctrl->version >= HMSS_VERSION_1P2)
+-+		return ret;
+-+
+-+	ctrl->apcs_spm_events_addr = devm_kzalloc(&pdev->dev,
+-+						  SPM_EVENT_NUM
+-+						  * sizeof(void __iomem *),
+-+						  GFP_KERNEL);
+-+	if (!ctrl->apcs_spm_events_addr) {
+-+		dev_err(dev, "Failed to allocate memory for APCS SPM event registers\n");
+-+		return -ENOMEM;
+-+	}
+-+
+-+	for (i = 0; i < SPM_EVENT_NUM; i++) {
+-+		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+-+						   res_name[i]);
+-+		if (!res) {
+-+			dev_err(dev, "Missing address for %s\n", res_name[i]);
+-+			ret = -EINVAL;
+-+			goto free_events;
+-+		}
+-+
+-+		ctrl->apcs_spm_events_addr[i] = devm_ioremap(dev, res->start,
+-+						resource_size(res));
+-+		if (!ctrl->apcs_spm_events_addr[i]) {
+-+			dev_err(dev, "Failed to map %s\n", res_name[i]);
+-+			ret = -ENOMEM;
+-+			goto free_events;
+-+		}
+-+
+-+		dev_dbg(dev, "%s event phys: %pa virt:0x%p\n", res_name[i],
+-+			&res->start, ctrl->apcs_spm_events_addr[i]);
+-+	}
+-+
+-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+-+					   "apc0-pll-ctl");
+-+	if (!res) {
+-+		dev_err(dev, "Missing APC0 PLL CTL physical address\n");
+-+		ret = -EINVAL;
+-+		goto free_events;
+-+	}
+-+
+-+	ctrl->apc0_pll_ctl_addr = devm_ioremap(dev,
+-+					   res->start,
+-+					   resource_size(res));
+-+	if (!ctrl->apc0_pll_ctl_addr) {
+-+		dev_err(dev, "Failed to map APC0 PLL CTL register\n");
+-+		ret = -ENOMEM;
+-+		goto free_events;
+-+	}
+-+
+-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+-+					   "apc1-pll-ctl");
+-+	if (!res) {
+-+		dev_err(dev, "Missing APC1 PLL CTL physical address\n");
+-+		ret = -EINVAL;
+-+		goto free_events;
+-+	}
+-+
+-+	ctrl->apc1_pll_ctl_addr = devm_ioremap(dev,
+-+					   res->start,
+-+					   resource_size(res));
+-+	if (!ctrl->apc1_pll_ctl_addr) {
+-+		dev_err(dev, "Failed to map APC1 PLL CTL register\n");
+-+		ret = -ENOMEM;
+-+		goto free_events;
+-+	}
+-+
+-+	return ret;
+-+
+-+free_events:
+-+	devm_kfree(dev, ctrl->apcs_spm_events_addr);
+-+	return ret;
+-+}
+-+
+-+/* 8953 register offset definition */
+-+#define MSM8953_APM_DLY_CNTR	0x2ac
+-+
+-+/* Register field shift definitions */
+-+#define APM_CTL_SEL_SWITCH_DLY_SHIFT	0
+-+#define APM_CTL_RESUME_CLK_DLY_SHIFT	8
+-+#define APM_CTL_HALT_CLK_DLY_SHIFT	16
+-+#define APM_CTL_POST_HALT_DLY_SHIFT	24
+-+
+-+/* Register field mask definitions */
+-+#define APM_CTL_SEL_SWITCH_DLY_MASK	GENMASK(7, 0)
+-+#define APM_CTL_RESUME_CLK_DLY_MASK	GENMASK(15, 8)
+-+#define APM_CTL_HALT_CLK_DLY_MASK	GENMASK(23, 16)
+-+#define APM_CTL_POST_HALT_DLY_MASK	GENMASK(31, 24)
+-+
+-+/*
+-+ * Get the resources associated with the msm8953 APM controller from
+-+ * device tree, remap all I/O addresses, and program the initial
+-+ * register configuration required for the 8953 APM controller device.
+-+ */
+-+static int msm8953_apm_ctrl_init(struct platform_device *pdev,
+-+				     struct msm_apm_ctrl_dev *ctrl)
+-+{
+-+	struct device *dev = &pdev->dev;
+-+	struct resource *res;
+-+	u32 delay_counter, val = 0, regval = 0;
+-+	int rc = 0;
+-+
+-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pm-apcc-glb");
+-+	if (!res) {
+-+		dev_err(dev, "Missing PM APCC Global register physical address\n");
+-+		return -ENODEV;
+-+	}
+-+	ctrl->reg_base = devm_ioremap(dev, res->start, resource_size(res));
+-+	if (!ctrl->reg_base) {
+-+		dev_err(dev, "Failed to map PM APCC Global registers\n");
+-+		return -ENOMEM;
+-+	}
+-+
+-+	/*
+-+	 * Initial APM register configuration required before starting
+-+	 * APM HW controller.
+-+	 */
+-+	regval = readl_relaxed(ctrl->reg_base + MSM8953_APM_DLY_CNTR);
+-+	val = regval;
+-+
+-+	if (of_find_property(dev->of_node, "qcom,apm-post-halt-delay", NULL)) {
+-+		rc = of_property_read_u32(dev->of_node,
+-+				"qcom,apm-post-halt-delay", &delay_counter);
+-+		if (rc < 0) {
+-+			dev_err(dev, "apm-post-halt-delay read failed, rc = %d",
+-+				rc);
+-+			return rc;
+-+		}
+-+
+-+		val &= ~APM_CTL_POST_HALT_DLY_MASK;
+-+		val |= (delay_counter << APM_CTL_POST_HALT_DLY_SHIFT)
+-+			& APM_CTL_POST_HALT_DLY_MASK;
+-+	}
+-+
+-+	if (of_find_property(dev->of_node, "qcom,apm-halt-clk-delay", NULL)) {
+-+		rc = of_property_read_u32(dev->of_node,
+-+				"qcom,apm-halt-clk-delay", &delay_counter);
+-+		if (rc < 0) {
+-+			dev_err(dev, "apm-halt-clk-delay read failed, rc = %d",
+-+				rc);
+-+			return rc;
+-+		}
+-+
+-+		val &= ~APM_CTL_HALT_CLK_DLY_MASK;
+-+		val |= (delay_counter << APM_CTL_HALT_CLK_DLY_SHIFT)
+-+			& APM_CTL_HALT_CLK_DLY_MASK;
+-+	}
+-+
+-+	if (of_find_property(dev->of_node, "qcom,apm-resume-clk-delay", NULL)) {
+-+		rc = of_property_read_u32(dev->of_node,
+-+				"qcom,apm-resume-clk-delay", &delay_counter);
+-+		if (rc < 0) {
+-+			dev_err(dev, "apm-resume-clk-delay read failed, rc = %d",
+-+				rc);
+-+			return rc;
+-+		}
+-+
+-+		val &= ~APM_CTL_RESUME_CLK_DLY_MASK;
+-+		val |= (delay_counter << APM_CTL_RESUME_CLK_DLY_SHIFT)
+-+			& APM_CTL_RESUME_CLK_DLY_MASK;
+-+	}
+-+
+-+	if (of_find_property(dev->of_node, "qcom,apm-sel-switch-delay", NULL)) {
+-+		rc = of_property_read_u32(dev->of_node,
+-+				"qcom,apm-sel-switch-delay", &delay_counter);
+-+		if (rc < 0) {
+-+			dev_err(dev, "apm-sel-switch-delay read failed, rc = %d",
+-+				rc);
+-+			return rc;
+-+		}
+-+
+-+		val &= ~APM_CTL_SEL_SWITCH_DLY_MASK;
+-+		val |= (delay_counter << APM_CTL_SEL_SWITCH_DLY_SHIFT)
+-+			& APM_CTL_SEL_SWITCH_DLY_MASK;
+-+	}
+-+
+-+	if (val != regval) {
+-+		writel_relaxed(val, ctrl->reg_base + MSM8953_APM_DLY_CNTR);
+-+		/* make sure write completes before return */
+-+		mb();
+-+	}
+-+
+-+	return rc;
+-+}
+-+
+-+static int msm8996_apm_switch_to_mx(struct msm_apm_ctrl_dev *ctrl_dev)
+-+{
+-+	int i, timeout = MSM_APM_SWITCH_TIMEOUT_US;
+-+	u32 regval;
+-+	int ret = 0;
+-+	unsigned long flags;
+-+
+-+	spin_lock_irqsave(&ctrl_dev->lock, flags);
+-+
+-+	/* Perform revision-specific programming steps */
+-+	if (ctrl_dev->version < HMSS_VERSION_1P2) {
+-+		/* Clear SPM events */
+-+		for (i = 0; i < SPM_EVENT_NUM; i++)
+-+			writel_relaxed(SPM_EVENT_CLEAR_VAL,
+-+				       ctrl_dev->apcs_spm_events_addr[i]);
+-+
+-+		udelay(SPM_WAKEUP_DELAY_US);
+-+
+-+		/* Switch APC/CBF to GPLL0 clock */
+-+		writel_relaxed(APCS_GFMUXA_SEL_VAL,
+-+			       ctrl_dev->apcs_csr_base + APCS_SPARE);
+-+		ndelay(200);
+-+		writel_relaxed(MSM_APM_OVERRIDE_SEL_VAL,
+-+			       ctrl_dev->apc0_pll_ctl_addr);
+-+		ndelay(200);
+-+		writel_relaxed(MSM_APM_OVERRIDE_SEL_VAL,
+-+			       ctrl_dev->apc1_pll_ctl_addr);
+-+
+-+		/* Ensure writes complete before proceeding */
+-+		mb();
+-+	}
+-+
+-+	/* Switch arrays to MX supply and wait for its completion */
+-+	writel_relaxed(MSM_APM_MX_MODE_VAL, ctrl_dev->reg_base +
+-+		       APCC_APM_MODE);
+-+
+-+	/* Ensure write above completes before delaying */
+-+	mb();
+-+
+-+	while (timeout > 0) {
+-+		regval = readl_relaxed(ctrl_dev->reg_base + APCC_APM_CTL_STS);
+-+		if ((regval & MSM_APM_CTL_STS_MASK) ==
+-+		    MSM_APM_MX_DONE_VAL)
+-+			break;
+-+
+-+		udelay(1);
+-+		timeout--;
+-+	}
+-+
+-+	if (timeout == 0) {
+-+		ret = -ETIMEDOUT;
+-+		dev_err(ctrl_dev->dev, "APCC to MX APM switch timed out. APCC_APM_CTL_STS=0x%x\n",
+-+			regval);
+-+	}
+-+
+-+	/* Perform revision-specific programming steps */
+-+	if (ctrl_dev->version < HMSS_VERSION_1P2) {
+-+		/* Switch APC/CBF clocks to original source */
+-+		writel_relaxed(APCS_GFMUXA_DESEL_VAL,
+-+			       ctrl_dev->apcs_csr_base + APCS_SPARE);
+-+		ndelay(200);
+-+		writel_relaxed(MSM_APM_SEC_CLK_SEL_VAL,
+-+			       ctrl_dev->apc0_pll_ctl_addr);
+-+		ndelay(200);
+-+		writel_relaxed(MSM_APM_SEC_CLK_SEL_VAL,
+-+			       ctrl_dev->apc1_pll_ctl_addr);
+-+
+-+		/* Complete clock source switch before SPM event sequence */
+-+		mb();
+-+
+-+		/* Set SPM events */
+-+		for (i = 0; i < SPM_EVENT_NUM; i++)
+-+			writel_relaxed(SPM_EVENT_SET_VAL,
+-+				       ctrl_dev->apcs_spm_events_addr[i]);
+-+	}
+-+
+-+	if (!ret) {
+-+		ctrl_dev->supply = MSM_APM_SUPPLY_MX;
+-+		dev_dbg(ctrl_dev->dev, "APM supply switched to MX\n");
+-+	}
+-+
+-+	spin_unlock_irqrestore(&ctrl_dev->lock, flags);
+-+
+-+	return ret;
+-+}
+-+
+-+static int msm8996_apm_switch_to_apcc(struct msm_apm_ctrl_dev *ctrl_dev)
+-+{
+-+	int i, timeout = MSM_APM_SWITCH_TIMEOUT_US;
+-+	u32 regval;
+-+	int ret = 0;
+-+	unsigned long flags;
+-+
+-+	spin_lock_irqsave(&ctrl_dev->lock, flags);
+-+
+-+	/* Perform revision-specific programming steps */
+-+	if (ctrl_dev->version < HMSS_VERSION_1P2) {
+-+		/* Clear SPM events */
+-+		for (i = 0; i < SPM_EVENT_NUM; i++)
+-+			writel_relaxed(SPM_EVENT_CLEAR_VAL,
+-+				       ctrl_dev->apcs_spm_events_addr[i]);
+-+
+-+		udelay(SPM_WAKEUP_DELAY_US);
+-+
+-+		/* Switch APC/CBF to GPLL0 clock */
+-+		writel_relaxed(APCS_GFMUXA_SEL_VAL,
+-+			       ctrl_dev->apcs_csr_base + APCS_SPARE);
+-+		ndelay(200);
+-+		writel_relaxed(MSM_APM_OVERRIDE_SEL_VAL,
+-+			       ctrl_dev->apc0_pll_ctl_addr);
+-+		ndelay(200);
+-+		writel_relaxed(MSM_APM_OVERRIDE_SEL_VAL,
+-+			       ctrl_dev->apc1_pll_ctl_addr);
+-+
+-+		/* Ensure previous writes complete before proceeding */
+-+		mb();
+-+	}
+-+
+-+	/* Switch arrays to APCC supply and wait for its completion */
+-+	writel_relaxed(MSM_APM_APCC_MODE_VAL, ctrl_dev->reg_base +
+-+		       APCC_APM_MODE);
+-+
+-+	/* Ensure write above completes before delaying */
+-+	mb();
+-+
+-+	while (timeout > 0) {
+-+		regval = readl_relaxed(ctrl_dev->reg_base + APCC_APM_CTL_STS);
+-+		if ((regval & MSM_APM_CTL_STS_MASK) ==
+-+		    MSM_APM_APCC_DONE_VAL)
+-+			break;
+-+
+-+		udelay(1);
+-+		timeout--;
+-+	}
+-+
+-+	if (timeout == 0) {
+-+		ret = -ETIMEDOUT;
+-+		dev_err(ctrl_dev->dev, "MX to APCC APM switch timed out. APCC_APM_CTL_STS=0x%x\n",
+-+			regval);
+-+	}
+-+
+-+	/* Perform revision-specific programming steps */
+-+	if (ctrl_dev->version < HMSS_VERSION_1P2) {
+-+		/* Set SPM events */
+-+		for (i = 0; i < SPM_EVENT_NUM; i++)
+-+			writel_relaxed(SPM_EVENT_SET_VAL,
+-+				       ctrl_dev->apcs_spm_events_addr[i]);
+-+
+-+		/* Complete SPM event sequence before clock source switch */
+-+		mb();
+-+
+-+		/* Switch APC/CBF clocks to original source */
+-+		writel_relaxed(APCS_GFMUXA_DESEL_VAL,
+-+			       ctrl_dev->apcs_csr_base + APCS_SPARE);
+-+		ndelay(200);
+-+		writel_relaxed(MSM_APM_SEC_CLK_SEL_VAL,
+-+			       ctrl_dev->apc0_pll_ctl_addr);
+-+		ndelay(200);
+-+		writel_relaxed(MSM_APM_SEC_CLK_SEL_VAL,
+-+			       ctrl_dev->apc1_pll_ctl_addr);
+-+	}
+-+
+-+	if (!ret) {
+-+		ctrl_dev->supply = MSM_APM_SUPPLY_APCC;
+-+		dev_dbg(ctrl_dev->dev, "APM supply switched to APCC\n");
+-+	}
+-+
+-+	spin_unlock_irqrestore(&ctrl_dev->lock, flags);
+-+
+-+	return ret;
+-+}
+-+
+-+/* 8953 register value definitions */
+-+#define MSM8953_APM_MX_MODE_VAL            0x00
+-+#define MSM8953_APM_APCC_MODE_VAL          0x02
+-+#define MSM8953_APM_MX_DONE_VAL            0x00
+-+#define MSM8953_APM_APCC_DONE_VAL          0x03
+-+
+-+/* 8953 register offset definitions */
+-+#define MSM8953_APCC_APM_MODE              0x000002a8
+-+#define MSM8953_APCC_APM_CTL_STS           0x000002b0
+-+
+-+/* 8953 constants */
+-+#define MSM8953_APM_SWITCH_TIMEOUT_US      500
+-+
+-+/* Register bit mask definitions */
+-+#define MSM8953_APM_CTL_STS_MASK           0x1f
+-+
+-+static int msm8953_apm_switch_to_mx(struct msm_apm_ctrl_dev *ctrl_dev)
+-+{
+-+	int timeout = MSM8953_APM_SWITCH_TIMEOUT_US;
+-+	u32 regval;
+-+	int ret = 0;
+-+	unsigned long flags;
+-+
+-+	spin_lock_irqsave(&ctrl_dev->lock, flags);
+-+
+-+	/* Switch arrays to MX supply and wait for its completion */
+-+	writel_relaxed(MSM8953_APM_MX_MODE_VAL, ctrl_dev->reg_base +
+-+		       MSM8953_APCC_APM_MODE);
+-+
+-+	/* Ensure write above completes before delaying */
+-+	mb();
+-+
+-+	while (timeout > 0) {
+-+		regval = readl_relaxed(ctrl_dev->reg_base +
+-+					MSM8953_APCC_APM_CTL_STS);
+-+		if ((regval & MSM8953_APM_CTL_STS_MASK) ==
+-+				MSM8953_APM_MX_DONE_VAL)
+-+			break;
+-+
+-+		udelay(1);
+-+		timeout--;
+-+	}
+-+
+-+	if (timeout == 0) {
+-+		ret = -ETIMEDOUT;
+-+		dev_err(ctrl_dev->dev, "APCC to MX APM switch timed out. APCC_APM_CTL_STS=0x%x\n",
+-+			regval);
+-+	} else {
+-+		ctrl_dev->supply = MSM_APM_SUPPLY_MX;
+-+		dev_dbg(ctrl_dev->dev, "APM supply switched to MX\n");
+-+	}
+-+
+-+	spin_unlock_irqrestore(&ctrl_dev->lock, flags);
+-+
+-+	return ret;
+-+}
+-+
+-+static int msm8953_apm_switch_to_apcc(struct msm_apm_ctrl_dev *ctrl_dev)
+-+{
+-+	int timeout = MSM8953_APM_SWITCH_TIMEOUT_US;
+-+	u32 regval;
+-+	int ret = 0;
+-+	unsigned long flags;
+-+
+-+	spin_lock_irqsave(&ctrl_dev->lock, flags);
+-+
+-+	/* Switch arrays to APCC supply and wait for its completion */
+-+	writel_relaxed(MSM8953_APM_APCC_MODE_VAL, ctrl_dev->reg_base +
+-+		       MSM8953_APCC_APM_MODE);
+-+
+-+	/* Ensure write above completes before delaying */
+-+	mb();
+-+
+-+	while (timeout > 0) {
+-+		regval = readl_relaxed(ctrl_dev->reg_base +
+-+					MSM8953_APCC_APM_CTL_STS);
+-+		if ((regval & MSM8953_APM_CTL_STS_MASK) ==
+-+				MSM8953_APM_APCC_DONE_VAL)
+-+			break;
+-+
+-+		udelay(1);
+-+		timeout--;
+-+	}
+-+
+-+	if (timeout == 0) {
+-+		ret = -ETIMEDOUT;
+-+		dev_err(ctrl_dev->dev, "MX to APCC APM switch timed out. APCC_APM_CTL_STS=0x%x\n",
+-+			regval);
+-+	} else {
+-+		ctrl_dev->supply = MSM_APM_SUPPLY_APCC;
+-+		dev_dbg(ctrl_dev->dev, "APM supply switched to APCC\n");
+-+	}
+-+
+-+	spin_unlock_irqrestore(&ctrl_dev->lock, flags);
+-+
+-+	return ret;
+-+}
+-+
+-+static int msm_apm_switch_to_mx(struct msm_apm_ctrl_dev *ctrl_dev)
+-+{
+-+	int ret = 0;
+-+
+-+	switch (ctrl_dev->msm_id) {
+-+	case MSM8996_ID:
+-+		ret = msm8996_apm_switch_to_mx(ctrl_dev);
+-+		break;
+-+	case MSM8953_ID:
+-+	case IPQ807x_ID:
+-+		ret = msm8953_apm_switch_to_mx(ctrl_dev);
+-+		break;
+-+	}
+-+
+-+	return ret;
+-+}
+-+
+-+static int msm_apm_switch_to_apcc(struct msm_apm_ctrl_dev *ctrl_dev)
+-+{
+-+	int ret = 0;
+-+
+-+	switch (ctrl_dev->msm_id) {
+-+	case MSM8996_ID:
+-+		ret = msm8996_apm_switch_to_apcc(ctrl_dev);
+-+		break;
+-+	case MSM8953_ID:
+-+	case IPQ807x_ID:
+-+		ret = msm8953_apm_switch_to_apcc(ctrl_dev);
+-+		break;
+-+	}
+-+
+-+	return ret;
+-+}
+-+
+-+/**
+-+ * msm_apm_get_supply() - Returns the supply that is currently
+-+ *			powering the memory arrays
+-+ * @ctrl_dev:                   Pointer to an MSM APM controller device
+-+ *
+-+ * Returns the supply currently selected by the APM.
+-+ */
+-+int msm_apm_get_supply(struct msm_apm_ctrl_dev *ctrl_dev)
+-+{
+-+	return ctrl_dev->supply;
+-+}
+-+EXPORT_SYMBOL(msm_apm_get_supply);
+-+
+-+/**
+-+ * msm_apm_set_supply() - Perform the necessary steps to switch the voltage
+-+ *                        source of the memory arrays to a given supply
+-+ * @ctrl_dev:                   Pointer to an MSM APM controller device
+-+ * @supply:                     Power rail to use as supply for the memory
+-+ *                              arrays
+-+ *
+-+ * Returns 0 on success, -ETIMEDOUT on APM switch timeout, or -EPERM if
+-+ * the supply is not supported.
+-+ */
+-+int msm_apm_set_supply(struct msm_apm_ctrl_dev *ctrl_dev,
+-+		       enum msm_apm_supply supply)
+-+{
+-+	int ret;
+-+
+-+	switch (supply) {
+-+	case MSM_APM_SUPPLY_APCC:
+-+		ret = msm_apm_switch_to_apcc(ctrl_dev);
+-+		break;
+-+	case MSM_APM_SUPPLY_MX:
+-+		ret = msm_apm_switch_to_mx(ctrl_dev);
+-+		break;
+-+	default:
+-+		ret = -EPERM;
+-+		break;
+-+	}
+-+
+-+	return ret;
+-+}
+-+EXPORT_SYMBOL(msm_apm_set_supply);
+-+
+-+/**
+-+ * msm_apm_ctrl_dev_get() - get a handle to the MSM APM controller linked to
+-+ *                          the device in device tree
+-+ * @dev:                    Pointer to the device
+-+ *
+-+ * The device must specify "qcom,apm-ctrl" property in its device tree
+-+ * node which points to an MSM APM controller device node.
+-+ *
+-+ * Returns an MSM APM controller handle if successful or ERR_PTR on any error.
+-+ * If the APM controller device hasn't probed yet, ERR_PTR(-EPROBE_DEFER) is
+-+ * returned.
+-+ */
+-+struct msm_apm_ctrl_dev *msm_apm_ctrl_dev_get(struct device *dev)
+-+{
+-+	struct msm_apm_ctrl_dev *ctrl_dev = NULL;
+-+	struct msm_apm_ctrl_dev *dev_found = ERR_PTR(-EPROBE_DEFER);
+-+	struct device_node *ctrl_node;
+-+
+-+	if (!dev || !dev->of_node) {
+-+		pr_err("Invalid device node\n");
+-+		return ERR_PTR(-EINVAL);
+-+	}
+-+
+-+	ctrl_node = of_parse_phandle(dev->of_node, "qcom,apm-ctrl", 0);
+-+	if (!ctrl_node) {
+-+		pr_err("Could not find qcom,apm-ctrl property in %s\n",
+-+		       dev->of_node->full_name);
+-+		return ERR_PTR(-ENXIO);
+-+	}
+-+
+-+	mutex_lock(&apm_ctrl_list_mutex);
+-+	list_for_each_entry(ctrl_dev, &apm_ctrl_list, list) {
+-+		if (ctrl_dev->dev && ctrl_dev->dev->of_node == ctrl_node) {
+-+			dev_found = ctrl_dev;
+-+			break;
+-+		}
+-+	}
+-+	mutex_unlock(&apm_ctrl_list_mutex);
+-+
+-+	of_node_put(ctrl_node);
+-+	return dev_found;
+-+}
+-+EXPORT_SYMBOL(msm_apm_ctrl_dev_get);
+-+
+-+#if defined(CONFIG_DEBUG_FS)
+-+
+-+static int apm_supply_dbg_open(struct inode *inode, struct file *filep)
+-+{
+-+	filep->private_data = inode->i_private;
+-+
+-+	return 0;
+-+}
+-+
+-+static ssize_t apm_supply_dbg_read(struct file *filep, char __user *ubuf,
+-+				   size_t count, loff_t *ppos)
+-+{
+-+	struct msm_apm_ctrl_dev *ctrl_dev = filep->private_data;
+-+	char buf[10];
+-+	int len;
+-+
+-+	if (!ctrl_dev) {
+-+		pr_err("invalid apm ctrl handle\n");
+-+		return -ENODEV;
+-+	}
+-+
+-+	if (ctrl_dev->supply == MSM_APM_SUPPLY_APCC)
+-+		len = snprintf(buf, sizeof(buf), "APCC\n");
+-+	else if (ctrl_dev->supply == MSM_APM_SUPPLY_MX)
+-+		len = snprintf(buf, sizeof(buf), "MX\n");
+-+	else
+-+		len = snprintf(buf, sizeof(buf), "ERR\n");
+-+
+-+	return simple_read_from_buffer(ubuf, count, ppos, buf, len);
+-+}
+-+
+-+static const struct file_operations apm_supply_fops = {
+-+	.open = apm_supply_dbg_open,
+-+	.read = apm_supply_dbg_read,
+-+};
+-+
+-+static void apm_debugfs_base_init(void)
+-+{
+-+	apm_debugfs_base = debugfs_create_dir("msm-apm", NULL);
+-+
+-+	if (IS_ERR_OR_NULL(apm_debugfs_base))
+-+		pr_err("msm-apm debugfs base directory creation failed\n");
+-+}
+-+
+-+static void apm_debugfs_init(struct msm_apm_ctrl_dev *ctrl_dev)
+-+{
+-+	struct dentry *temp;
+-+
+-+	if (IS_ERR_OR_NULL(apm_debugfs_base)) {
+-+		pr_err("Base directory missing, cannot create apm debugfs nodes\n");
+-+		return;
+-+	}
+-+
+-+	ctrl_dev->debugfs = debugfs_create_dir(dev_name(ctrl_dev->dev),
+-+					       apm_debugfs_base);
+-+	if (IS_ERR_OR_NULL(ctrl_dev->debugfs)) {
+-+		pr_err("%s debugfs directory creation failed\n",
+-+		       dev_name(ctrl_dev->dev));
+-+		return;
+-+	}
+-+
+-+	temp = debugfs_create_file("supply", S_IRUGO, ctrl_dev->debugfs,
+-+				   ctrl_dev, &apm_supply_fops);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		pr_err("supply mode creation failed\n");
+-+		return;
+-+	}
+-+}
+-+
+-+static void apm_debugfs_deinit(struct msm_apm_ctrl_dev *ctrl_dev)
+-+{
+-+	if (!IS_ERR_OR_NULL(ctrl_dev->debugfs))
+-+		debugfs_remove_recursive(ctrl_dev->debugfs);
+-+}
+-+
+-+static void apm_debugfs_base_remove(void)
+-+{
+-+	debugfs_remove_recursive(apm_debugfs_base);
+-+}
+-+#else
+-+
+-+static void apm_debugfs_base_init(void)
+-+{}
+-+
+-+static void apm_debugfs_init(struct msm_apm_ctrl_dev *ctrl_dev)
+-+{}
+-+
+-+static void apm_debugfs_deinit(struct msm_apm_ctrl_dev *ctrl_dev)
+-+{}
+-+
+-+static void apm_debugfs_base_remove(void)
+-+{}
+-+
+-+#endif
+-+
+-+static struct of_device_id msm_apm_match_table[] = {
+-+	{
+-+		.compatible = "qcom,msm-apm",
+-+		.data = (void *)(uintptr_t)MSM8996_ID,
+-+	},
+-+	{
+-+		.compatible = "qcom,msm8953-apm",
+-+		.data = (void *)(uintptr_t)MSM8953_ID,
+-+	},
+-+	{
+-+		.compatible = "qcom,ipq807x-apm",
+-+		.data = (void *)(uintptr_t)IPQ807x_ID,
+-+	},
+-+	{}
+-+};
+-+
+-+static int msm_apm_probe(struct platform_device *pdev)
+-+{
+-+	struct device *dev = &pdev->dev;
+-+	struct msm_apm_ctrl_dev *ctrl;
+-+	const struct of_device_id *match;
+-+	int ret = 0;
+-+
+-+	dev_dbg(dev, "probing MSM Array Power Mux driver\n");
+-+
+-+	if (!dev->of_node) {
+-+		dev_err(dev, "Device tree node is missing\n");
+-+		return -ENODEV;
+-+	}
+-+
+-+	match = of_match_device(msm_apm_match_table, dev);
+-+	if (!match)
+-+		return -ENODEV;
+-+
+-+	ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
+-+	if (!ctrl) {
+-+		dev_err(dev, "MSM APM controller memory allocation failed\n");
+-+		return -ENOMEM;
+-+	}
+-+
+-+	INIT_LIST_HEAD(&ctrl->list);
+-+	spin_lock_init(&ctrl->lock);
+-+	ctrl->dev = dev;
+-+	ctrl->msm_id = (uintptr_t)match->data;
+-+	platform_set_drvdata(pdev, ctrl);
+-+
+-+	switch (ctrl->msm_id) {
+-+	case MSM8996_ID:
+-+		ret = msm_apm_ctrl_devm_ioremap(pdev, ctrl);
+-+		if (ret) {
+-+			dev_err(dev, "Failed to add APM controller device\n");
+-+			return ret;
+-+		}
+-+		break;
+-+	case MSM8953_ID:
+-+	case IPQ807x_ID:
+-+		ret = msm8953_apm_ctrl_init(pdev, ctrl);
+-+		if (ret) {
+-+			dev_err(dev, "Failed to initialize APM controller device: ret=%d\n",
+-+				ret);
+-+			return ret;
+-+		}
+-+		break;
+-+	default:
+-+		dev_err(dev, "unable to add APM controller device for msm_id:%d\n",
+-+			ctrl->msm_id);
+-+		return -ENODEV;
+-+	}
+-+
+-+	apm_debugfs_init(ctrl);
+-+	mutex_lock(&apm_ctrl_list_mutex);
+-+	list_add_tail(&ctrl->list, &apm_ctrl_list);
+-+	mutex_unlock(&apm_ctrl_list_mutex);
+-+
+-+	dev_dbg(dev, "MSM Array Power Mux driver probe successful");
+-+
+-+	return ret;
+-+}
+-+
+-+static int msm_apm_remove(struct platform_device *pdev)
+-+{
+-+	struct msm_apm_ctrl_dev *ctrl_dev;
+-+
+-+	ctrl_dev = platform_get_drvdata(pdev);
+-+	if (ctrl_dev) {
+-+		mutex_lock(&apm_ctrl_list_mutex);
+-+		list_del(&ctrl_dev->list);
+-+		mutex_unlock(&apm_ctrl_list_mutex);
+-+		apm_debugfs_deinit(ctrl_dev);
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+static struct platform_driver msm_apm_driver = {
+-+	.driver		= {
+-+		.name		= MSM_APM_DRIVER_NAME,
+-+		.of_match_table	= msm_apm_match_table,
+-+		.owner		= THIS_MODULE,
+-+	},
+-+	.probe		= msm_apm_probe,
+-+	.remove		= msm_apm_remove,
+-+};
+-+
+-+static int __init msm_apm_init(void)
+-+{
+-+	apm_debugfs_base_init();
+-+	return platform_driver_register(&msm_apm_driver);
+-+}
+-+
+-+static void __exit msm_apm_exit(void)
+-+{
+-+	platform_driver_unregister(&msm_apm_driver);
+-+	apm_debugfs_base_remove();
+-+}
+-+
+-+arch_initcall(msm_apm_init);
+-+module_exit(msm_apm_exit);
+-+
+-+MODULE_DESCRIPTION("MSM Array Power Mux driver");
+-+MODULE_LICENSE("GPL v2");
+---- /dev/null
+-+++ b/include/linux/power/qcom/apm.h
+-@@ -0,0 +1,48 @@
+-+/*
+-+ * Copyright (c) 2015, The Linux Foundation. All rights reserved.
+-+ *
+-+ * This program is free software; you can redistribute it and/or modify
+-+ * it under the terms of the GNU General Public License version 2 and
+-+ * only version 2 as published by the Free Software Foundation.
+-+ *
+-+ * This program is distributed in the hope that it will be useful,
+-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-+ * GNU General Public License for more details.
+-+ */
+-+
+-+#ifndef __LINUX_POWER_QCOM_APM_H__
+-+#define __LINUX_POWER_QCOM_APM_H__
+-+
+-+#include <linux/device.h>
+-+#include <linux/err.h>
+-+
+-+/**
+-+ * enum msm_apm_supply - supported power rails to supply memory arrays
+-+ * %MSM_APM_SUPPLY_APCC:	to enable selection of VDD_APCC rail as supply
+-+ * %MSM_APM_SUPPLY_MX:		to enable selection of VDD_MX rail as supply
+-+ */
+-+enum msm_apm_supply {
+-+	MSM_APM_SUPPLY_APCC,
+-+	MSM_APM_SUPPLY_MX,
+-+};
+-+
+-+/* Handle used to identify an APM controller device  */
+-+struct msm_apm_ctrl_dev;
+-+
+-+#ifdef CONFIG_QCOM_APM
+-+struct msm_apm_ctrl_dev *msm_apm_ctrl_dev_get(struct device *dev);
+-+int msm_apm_set_supply(struct msm_apm_ctrl_dev *ctrl_dev,
+-+		       enum msm_apm_supply supply);
+-+int msm_apm_get_supply(struct msm_apm_ctrl_dev *ctrl_dev);
+-+
+-+#else
+-+static inline struct msm_apm_ctrl_dev *msm_apm_ctrl_dev_get(struct device *dev)
+-+{ return ERR_PTR(-EPERM); }
+-+static inline int msm_apm_set_supply(struct msm_apm_ctrl_dev *ctrl_dev,
+-+		       enum msm_apm_supply supply)
+-+{ return -EPERM; }
+-+static inline int msm_apm_get_supply(struct msm_apm_ctrl_dev *ctrl_dev)
+-+{ return -EPERM; }
+-+#endif
+-+#endif
+diff --git a/target/linux/ipq807x/patches-5.15/0901-regulator-add-Qualcomm-CPR-regulators.patch b/target/linux/ipq807x/patches-5.15/0901-regulator-add-Qualcomm-CPR-regulators.patch
+deleted file mode 100644
+index 3deadea139..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0901-regulator-add-Qualcomm-CPR-regulators.patch
++++ /dev/null
+@@ -1,12147 +0,0 @@
+-From 303fb163bb86f04432c93325ff8b9638c9e50641 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Mon, 11 Apr 2022 14:35:36 +0200
+-Subject: [PATCH] regulator: add Qualcomm CPR regulators
+-
+-Add Qualcomm CPR driver, which allows using the CPR HW to calculate the
+-correct OPP point voltage dynamically based on the system load.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- drivers/regulator/Kconfig               |   33 +
+- drivers/regulator/Makefile              |    3 +
+- drivers/regulator/cpr3-npu-regulator.c  |  695 +++
+- drivers/regulator/cpr3-regulator.c      | 5112 +++++++++++++++++++++++
+- drivers/regulator/cpr3-regulator.h      | 1211 ++++++
+- drivers/regulator/cpr3-util.c           | 2750 ++++++++++++
+- drivers/regulator/cpr4-apss-regulator.c | 1819 ++++++++
+- include/soc/qcom/socinfo.h              |  463 ++
+- 8 files changed, 12086 insertions(+)
+- create mode 100644 drivers/regulator/cpr3-npu-regulator.c
+- create mode 100644 drivers/regulator/cpr3-regulator.c
+- create mode 100644 drivers/regulator/cpr3-regulator.h
+- create mode 100644 drivers/regulator/cpr3-util.c
+- create mode 100644 drivers/regulator/cpr4-apss-regulator.c
+- create mode 100644 include/soc/qcom/socinfo.h
+-
+---- a/drivers/regulator/Kconfig
+-+++ b/drivers/regulator/Kconfig
+-@@ -1423,5 +1423,38 @@ config REGULATOR_QCOM_LABIBB
+- 	  boost regulator and IBB can be used as a negative boost regulator
+- 	  for LCD display panel.
+- 
+-+config REGULATOR_CPR3
+-+	bool "QCOM CPR3 regulator core support"
+-+	help
+-+	  This driver supports Core Power Reduction (CPR) version 3 controllers
+-+	  which are used by some Qualcomm Technologies, Inc. SoCs to
+-+	  manage important voltage regulators.  CPR3 controllers are capable of
+-+	  monitoring several ring oscillator sensing loops simultaneously.  The
+-+	  CPR3 controller informs software when the silicon conditions require
+-+	  the supply voltage to be increased or decreased.  On certain supply
+-+	  rails, the CPR3 controller is able to propagate the voltage increase
+-+	  or decrease requests all the way to the PMIC without software
+-+	  involvement.
+-+
+-+config REGULATOR_CPR3_NPU
+-+	bool "QCOM CPR3 regulator for NPU"
+-+	depends on OF && REGULATOR_CPR3
+-+	help
+-+	  This driver supports Qualcomm Technologies, Inc. NPU CPR3
+-+	  regulator Which will always operate in open loop.
+-+
+-+config REGULATOR_CPR4_APSS
+-+	bool "QCOM CPR4 regulator for APSS"
+-+	depends on OF && REGULATOR_CPR3
+-+	help
+-+	  This driver supports Qualcomm Technologies, Inc. APSS application
+-+	  processor specific features including memory array power mux (APM)
+-+	  switching, one CPR4 thread which monitor the two APSS clusters that
+-+	  are both powered by a shared supply, hardware closed-loop auto
+-+	  voltage stepping, voltage adjustments based on online core count,
+-+	  voltage adjustments based on temperature readings, and voltage
+-+	  adjustments for performance boost mode. This driver reads both initial
+-+	  voltage and CPR target quotient values out of hardware fuses.
+-+
+- endif
+- 
+---- a/drivers/regulator/Makefile
+-+++ b/drivers/regulator/Makefile
+-@@ -105,6 +105,9 @@ obj-$(CONFIG_REGULATOR_QCOM_RPMH) += qco
+- obj-$(CONFIG_REGULATOR_QCOM_SMD_RPM) += qcom_smd-regulator.o
+- obj-$(CONFIG_REGULATOR_QCOM_SPMI) += qcom_spmi-regulator.o
+- obj-$(CONFIG_REGULATOR_QCOM_USB_VBUS) += qcom_usb_vbus-regulator.o
+-+obj-$(CONFIG_REGULATOR_CPR3) += cpr3-regulator.o cpr3-util.o
+-+obj-$(CONFIG_REGULATOR_CPR3_NPU) += cpr3-npu-regulator.o
+-+obj-$(CONFIG_REGULATOR_CPR4_APSS) += cpr4-apss-regulator.o
+- obj-$(CONFIG_REGULATOR_PALMAS) += palmas-regulator.o
+- obj-$(CONFIG_REGULATOR_PCA9450) += pca9450-regulator.o
+- obj-$(CONFIG_REGULATOR_PF8X00) += pf8x00-regulator.o
+---- /dev/null
+-+++ b/drivers/regulator/cpr3-npu-regulator.c
+-@@ -0,0 +1,695 @@
+-+/*
+-+ * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+-+ *
+-+ * Permission to use, copy, modify, and/or distribute this software for any
+-+ * purpose with or without fee is hereby granted, provided that the above
+-+ * copyright notice and this permission notice appear in all copies.
+-+ *
+-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+-+ */
+-+
+-+#include <linux/err.h>
+-+#include <linux/platform_device.h>
+-+#include <linux/module.h>
+-+#include <linux/of.h>
+-+#include <linux/of_device.h>
+-+#include <linux/slab.h>
+-+#include <linux/thermal.h>
+-+
+-+#include "cpr3-regulator.h"
+-+
+-+#define IPQ807x_NPU_FUSE_CORNERS		2
+-+#define IPQ817x_NPU_FUSE_CORNERS		1
+-+#define IPQ807x_NPU_FUSE_STEP_VOLT		8000
+-+#define IPQ807x_NPU_VOLTAGE_FUSE_SIZE		6
+-+#define IPQ807x_NPU_CPR_CLOCK_RATE		19200000
+-+
+-+#define IPQ807x_NPU_CPR_TCSR_START		6
+-+#define IPQ807x_NPU_CPR_TCSR_END		7
+-+
+-+#define NPU_TSENS				5
+-+
+-+u32 g_valid_npu_fuse_count = IPQ807x_NPU_FUSE_CORNERS;
+-+/**
+-+ * struct cpr3_ipq807x_npu_fuses - NPU specific fuse data for IPQ807x
+-+ * @init_voltage:	Initial (i.e. open-loop) voltage fuse parameter value
+-+ *			for each fuse corner (raw, not converted to a voltage)
+-+ * This struct holds the values for all of the fuses read from memory.
+-+ */
+-+struct cpr3_ipq807x_npu_fuses {
+-+	u64	init_voltage[IPQ807x_NPU_FUSE_CORNERS];
+-+};
+-+
+-+/*
+-+ * Constants which define the name of each fuse corner.
+-+ */
+-+enum cpr3_ipq807x_npu_fuse_corner {
+-+	CPR3_IPQ807x_NPU_FUSE_CORNER_NOM	= 0,
+-+	CPR3_IPQ807x_NPU_FUSE_CORNER_TURBO	= 1,
+-+};
+-+
+-+static const char * const cpr3_ipq807x_npu_fuse_corner_name[] = {
+-+	[CPR3_IPQ807x_NPU_FUSE_CORNER_NOM]	= "NOM",
+-+	[CPR3_IPQ807x_NPU_FUSE_CORNER_TURBO]	= "TURBO",
+-+};
+-+
+-+/*
+-+ * IPQ807x NPU fuse parameter locations:
+-+ *
+-+ * Structs are organized with the following dimensions:
+-+ *	Outer: 0 to 1 for fuse corners from lowest to highest corner
+-+ *	Inner: large enough to hold the longest set of parameter segments which
+-+ *		fully defines a fuse parameter, +1 (for NULL termination).
+-+ *		Each segment corresponds to a contiguous group of bits from a
+-+ *		single fuse row.  These segments are concatentated together in
+-+ *		order to form the full fuse parameter value.  The segments for
+-+ *		a given parameter may correspond to different fuse rows.
+-+ */
+-+static struct cpr3_fuse_param
+-+ipq807x_npu_init_voltage_param[IPQ807x_NPU_FUSE_CORNERS][2] = {
+-+	{{73, 22, 27}, {} },
+-+	{{73, 16, 21}, {} },
+-+};
+-+
+-+/*
+-+ * Open loop voltage fuse reference voltages in microvolts for IPQ807x
+-+ */
+-+static int
+-+ipq807x_npu_fuse_ref_volt [IPQ807x_NPU_FUSE_CORNERS] = {
+-+	912000,
+-+	992000,
+-+};
+-+
+-+/*
+-+ * IPQ9574 (Few parameters are changed, remaining are same as IPQ807x)
+-+ */
+-+#define IPQ9574_NPU_FUSE_CORNERS		2
+-+#define IPQ9574_NPU_FUSE_STEP_VOLT		10000
+-+#define IPQ9574_NPU_CPR_CLOCK_RATE		24000000
+-+
+-+/*
+-+ * fues parameters for IPQ9574
+-+ */
+-+static struct cpr3_fuse_param
+-+ipq9574_npu_init_voltage_param[IPQ9574_NPU_FUSE_CORNERS][2] = {
+-+	{{105, 12, 17}, {} },
+-+	{{105,  6, 11}, {} },
+-+};
+-+
+-+/*
+-+ * Open loop voltage fuse reference voltages in microvolts for IPQ9574
+-+ */
+-+static int
+-+ipq9574_npu_fuse_ref_volt [IPQ9574_NPU_FUSE_CORNERS] = {
+-+	862500,
+-+	987500,
+-+};
+-+
+-+struct cpr3_controller *g_ctrl;
+-+
+-+void cpr3_npu_temp_notify(int sensor, int temp, int low_notif)
+-+{
+-+	u32 prev_sensor_state;
+-+
+-+	if (sensor != NPU_TSENS)
+-+		return;
+-+
+-+	prev_sensor_state = g_ctrl->cur_sensor_state;
+-+	if (low_notif)
+-+		g_ctrl->cur_sensor_state |= BIT(sensor);
+-+	else
+-+		g_ctrl->cur_sensor_state &= ~BIT(sensor);
+-+
+-+	if (!prev_sensor_state && g_ctrl->cur_sensor_state)
+-+		cpr3_handle_temp_open_loop_adjustment(g_ctrl, true);
+-+	else if (prev_sensor_state && !g_ctrl->cur_sensor_state)
+-+		cpr3_handle_temp_open_loop_adjustment(g_ctrl, false);
+-+}
+-+
+-+/**
+-+ * cpr3_ipq807x_npu_read_fuse_data() - load NPU specific fuse parameter values
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * This function allocates a cpr3_ipq807x_npu_fuses struct, fills it with
+-+ * values read out of hardware fuses, and finally copies common fuse values
+-+ * into the CPR3 regulator struct.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_ipq807x_npu_read_fuse_data(struct cpr3_regulator *vreg)
+-+{
+-+	void __iomem *base = vreg->thread->ctrl->fuse_base;
+-+	struct cpr3_ipq807x_npu_fuses *fuse;
+-+	int i, rc;
+-+
+-+	fuse = devm_kzalloc(vreg->thread->ctrl->dev, sizeof(*fuse), GFP_KERNEL);
+-+	if (!fuse)
+-+		return -ENOMEM;
+-+
+-+	for (i = 0; i < g_valid_npu_fuse_count; i++) {
+-+		rc = cpr3_read_fuse_param(base,
+-+					  vreg->cpr3_regulator_data->init_voltage_param[i],
+-+					  &fuse->init_voltage[i]);
+-+		if (rc) {
+-+			cpr3_err(vreg, "Unable to read fuse-corner %d initial voltage fuse, rc=%d\n",
+-+				 i, rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	vreg->fuse_corner_count	= g_valid_npu_fuse_count;
+-+	vreg->platform_fuses	= fuse;
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_npu_parse_corner_data() - parse NPU corner data from device tree
+-+ *		properties of the CPR3 regulator's device node
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_npu_parse_corner_data(struct cpr3_regulator *vreg)
+-+{
+-+	int rc;
+-+
+-+	rc = cpr3_parse_common_corner_data(vreg);
+-+	if (rc) {
+-+		cpr3_err(vreg, "error reading corner data, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_ipq807x_npu_calculate_open_loop_voltages() - calculate the open-loop
+-+ *		voltage for each corner of a CPR3 regulator
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @temp_correction:    Temperature based correction
+-+ *
+-+ * If open-loop voltage interpolation is allowed in device tree, then
+-+ * this function calculates the open-loop voltage for a given corner using
+-+ * linear interpolation.  This interpolation is performed using the processor
+-+ * frequencies of the lower and higher Fmax corners along with their fused
+-+ * open-loop voltages.
+-+ *
+-+ * If open-loop voltage interpolation is not allowed, then this function uses
+-+ * the Fmax fused open-loop voltage for all of the corners associated with a
+-+ * given fuse corner.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_ipq807x_npu_calculate_open_loop_voltages(
+-+			struct cpr3_regulator *vreg, bool temp_correction)
+-+{
+-+	struct cpr3_ipq807x_npu_fuses *fuse = vreg->platform_fuses;
+-+	struct cpr3_controller *ctrl = vreg->thread->ctrl;
+-+	int i, j, rc = 0;
+-+	u64 freq_low, volt_low, freq_high, volt_high;
+-+	int *fuse_volt;
+-+	int *fmax_corner;
+-+
+-+	fuse_volt = kcalloc(vreg->fuse_corner_count, sizeof(*fuse_volt),
+-+			    GFP_KERNEL);
+-+	fmax_corner = kcalloc(vreg->fuse_corner_count, sizeof(*fmax_corner),
+-+			      GFP_KERNEL);
+-+	if (!fuse_volt || !fmax_corner) {
+-+		rc = -ENOMEM;
+-+		goto done;
+-+	}
+-+
+-+	for (i = 0; i < vreg->fuse_corner_count; i++) {
+-+		if (ctrl->cpr_global_setting == CPR_DISABLED)
+-+			fuse_volt[i] = vreg->cpr3_regulator_data->fuse_ref_volt[i];
+-+		else
+-+			fuse_volt[i] = cpr3_convert_open_loop_voltage_fuse(
+-+				vreg->cpr3_regulator_data->fuse_ref_volt[i],
+-+				vreg->cpr3_regulator_data->fuse_step_volt,
+-+				fuse->init_voltage[i],
+-+				IPQ807x_NPU_VOLTAGE_FUSE_SIZE);
+-+
+-+		/* Log fused open-loop voltage values for debugging purposes. */
+-+		cpr3_info(vreg, "fused %8s: open-loop=%7d uV\n",
+-+			  cpr3_ipq807x_npu_fuse_corner_name[i],
+-+			  fuse_volt[i]);
+-+	}
+-+
+-+	rc = cpr3_determine_part_type(vreg,
+-+			fuse_volt[CPR3_IPQ807x_NPU_FUSE_CORNER_TURBO]);
+-+	if (rc) {
+-+		cpr3_err(vreg,
+-+			"fused part type detection failed failed, rc=%d\n", rc);
+-+		goto done;
+-+	}
+-+
+-+	rc = cpr3_adjust_fused_open_loop_voltages(vreg, fuse_volt);
+-+	if (rc) {
+-+		cpr3_err(vreg,
+-+			"fused open-loop voltage adjustment failed, rc=%d\n",
+-+			rc);
+-+		goto done;
+-+	}
+-+	if (temp_correction) {
+-+		rc = cpr3_determine_temp_base_open_loop_correction(vreg,
+-+								fuse_volt);
+-+		if (rc) {
+-+			cpr3_err(vreg,
+-+				"temp open-loop voltage adj. failed, rc=%d\n",
+-+				rc);
+-+			goto done;
+-+		}
+-+	}
+-+
+-+	for (i = 1; i < vreg->fuse_corner_count; i++) {
+-+		if (fuse_volt[i] < fuse_volt[i - 1]) {
+-+			cpr3_info(vreg,
+-+				"fuse corner %d voltage=%d uV < fuse corner %d \
+-+				voltage=%d uV; overriding: fuse corner %d \
+-+				voltage=%d\n",
+-+				  i, fuse_volt[i], i - 1, fuse_volt[i - 1],
+-+				  i, fuse_volt[i - 1]);
+-+			fuse_volt[i] = fuse_volt[i - 1];
+-+		}
+-+	}
+-+
+-+	/* Determine highest corner mapped to each fuse corner */
+-+	j = vreg->fuse_corner_count - 1;
+-+	for (i = vreg->corner_count - 1; i >= 0; i--) {
+-+		if (vreg->corner[i].cpr_fuse_corner == j) {
+-+			fmax_corner[j] = i;
+-+			j--;
+-+		}
+-+	}
+-+
+-+	if (j >= 0) {
+-+		cpr3_err(vreg, "invalid fuse corner mapping\n");
+-+		rc = -EINVAL;
+-+		goto done;
+-+	}
+-+
+-+	/*
+-+	 * Interpolation is not possible for corners mapped to the lowest fuse
+-+	 * corner so use the fuse corner value directly.
+-+	 */
+-+	for (i = 0; i <= fmax_corner[0]; i++)
+-+		vreg->corner[i].open_loop_volt = fuse_volt[0];
+-+
+-+	/* Interpolate voltages for the higher fuse corners. */
+-+	for (i = 1; i < vreg->fuse_corner_count; i++) {
+-+		freq_low = vreg->corner[fmax_corner[i - 1]].proc_freq;
+-+		volt_low = fuse_volt[i - 1];
+-+		freq_high = vreg->corner[fmax_corner[i]].proc_freq;
+-+		volt_high = fuse_volt[i];
+-+
+-+		for (j = fmax_corner[i - 1] + 1; j <= fmax_corner[i]; j++)
+-+			vreg->corner[j].open_loop_volt = cpr3_interpolate(
+-+				freq_low, volt_low, freq_high, volt_high,
+-+				vreg->corner[j].proc_freq);
+-+	}
+-+
+-+done:
+-+	if (rc == 0) {
+-+		cpr3_debug(vreg, "unadjusted per-corner open-loop voltages:\n");
+-+		for (i = 0; i < vreg->corner_count; i++)
+-+			cpr3_debug(vreg, "open-loop[%2d] = %d uV\n", i,
+-+				   vreg->corner[i].open_loop_volt);
+-+
+-+		rc = cpr3_adjust_open_loop_voltages(vreg);
+-+		if (rc)
+-+			cpr3_err(vreg,
+-+				"open-loop voltage adjustment failed, rc=%d\n",
+-+				 rc);
+-+	}
+-+
+-+	kfree(fuse_volt);
+-+	kfree(fmax_corner);
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_npu_print_settings() - print out NPU CPR configuration settings into
+-+ *		the kernel log for debugging purposes
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ */
+-+static void cpr3_npu_print_settings(struct cpr3_regulator *vreg)
+-+{
+-+	struct cpr3_corner *corner;
+-+	int i;
+-+
+-+	cpr3_debug(vreg,
+-+		"Corner: Frequency (Hz), Fuse Corner, Floor (uV), \
+-+		Open-Loop (uV), Ceiling (uV)\n");
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		corner = &vreg->corner[i];
+-+		cpr3_debug(vreg, "%3d: %10u, %2d, %7d, %7d, %7d\n",
+-+			   i, corner->proc_freq, corner->cpr_fuse_corner,
+-+			   corner->floor_volt, corner->open_loop_volt,
+-+			   corner->ceiling_volt);
+-+	}
+-+
+-+	if (vreg->thread->ctrl->apm)
+-+		cpr3_debug(vreg, "APM threshold = %d uV, APM adjust = %d uV\n",
+-+			   vreg->thread->ctrl->apm_threshold_volt,
+-+			   vreg->thread->ctrl->apm_adj_volt);
+-+}
+-+
+-+/**
+-+ * cpr3_ipq807x_npu_calc_temp_based_ol_voltages() - Calculate the open loop
+-+ * voltages based on temperature based correction margins
+-+ * @vreg:               Pointer to the CPR3 regulator
+-+ */
+-+
+-+static int
+-+cpr3_ipq807x_npu_calc_temp_based_ol_voltages(struct cpr3_regulator *vreg,
+-+						bool temp_correction)
+-+{
+-+	int rc, i;
+-+
+-+	rc = cpr3_ipq807x_npu_calculate_open_loop_voltages(vreg,
+-+							temp_correction);
+-+	if (rc) {
+-+		cpr3_err(vreg,
+-+			"unable to calculate open-loop voltages, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	rc = cpr3_limit_open_loop_voltages(vreg);
+-+	if (rc) {
+-+		cpr3_err(vreg, "unable to limit open-loop voltages, rc=%d\n",
+-+			 rc);
+-+		return rc;
+-+	}
+-+
+-+	cpr3_open_loop_voltage_as_ceiling(vreg);
+-+
+-+	rc = cpr3_limit_floor_voltages(vreg);
+-+	if (rc) {
+-+		cpr3_err(vreg, "unable to limit floor voltages, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		if (temp_correction)
+-+			vreg->corner[i].cold_temp_open_loop_volt =
+-+				vreg->corner[i].open_loop_volt;
+-+		else
+-+			vreg->corner[i].normal_temp_open_loop_volt =
+-+				vreg->corner[i].open_loop_volt;
+-+	}
+-+
+-+	cpr3_npu_print_settings(vreg);
+-+
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_npu_init_thread() - perform steps necessary to initialize the
+-+ *		configuration data for a CPR3 thread
+-+ * @thread:		Pointer to the CPR3 thread
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_npu_init_thread(struct cpr3_thread *thread)
+-+{
+-+	int rc;
+-+
+-+	rc = cpr3_parse_common_thread_data(thread);
+-+	if (rc) {
+-+		cpr3_err(thread->ctrl,
+-+			"thread %u CPR thread data from DT- failed, rc=%d\n",
+-+			 thread->thread_id, rc);
+-+		return rc;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_npu_init_regulator() - perform all steps necessary to initialize the
+-+ *		configuration data for a CPR3 regulator
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_npu_init_regulator(struct cpr3_regulator *vreg)
+-+{
+-+	struct cpr3_ipq807x_npu_fuses *fuse;
+-+	int rc, cold_temp = 0;
+-+	bool can_adj_cold_temp = cpr3_can_adjust_cold_temp(vreg);
+-+
+-+	rc = cpr3_ipq807x_npu_read_fuse_data(vreg);
+-+	if (rc) {
+-+		cpr3_err(vreg, "unable to read CPR fuse data, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	fuse = vreg->platform_fuses;
+-+
+-+	rc = cpr3_npu_parse_corner_data(vreg);
+-+	if (rc) {
+-+		cpr3_err(vreg,
+-+			"Cannot read CPR corner data from DT, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	rc = cpr3_mem_acc_init(vreg);
+-+	if (rc) {
+-+		if (rc != -EPROBE_DEFER)
+-+			cpr3_err(vreg,
+-+			"Cannot initialize mem-acc regulator settings, rc=%d\n",
+-+			 rc);
+-+		return rc;
+-+	}
+-+
+-+	if (can_adj_cold_temp) {
+-+		rc = cpr3_ipq807x_npu_calc_temp_based_ol_voltages(vreg, true);
+-+		if (rc) {
+-+			cpr3_err(vreg,
+-+			"unable to calculate open-loop voltages, rc=%d\n", rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	rc = cpr3_ipq807x_npu_calc_temp_based_ol_voltages(vreg, false);
+-+	if (rc) {
+-+		cpr3_err(vreg,
+-+			"unable to calculate open-loop voltages, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	if (can_adj_cold_temp) {
+-+		cpr3_info(vreg,
+-+		"Normal and Cold condition init done. Default to normal.\n");
+-+
+-+		rc = cpr3_get_cold_temp_threshold(vreg, &cold_temp);
+-+		if (rc) {
+-+			cpr3_err(vreg,
+-+			"Get cold temperature threshold failed, rc=%d\n", rc);
+-+			return rc;
+-+		}
+-+		register_low_temp_notif(NPU_TSENS, cold_temp,
+-+							cpr3_npu_temp_notify);
+-+	}
+-+
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_npu_init_controller() - perform NPU CPR3 controller specific
+-+ *		initializations
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_npu_init_controller(struct cpr3_controller *ctrl)
+-+{
+-+	int rc;
+-+
+-+	rc = cpr3_parse_open_loop_common_ctrl_data(ctrl);
+-+	if (rc) {
+-+		if (rc != -EPROBE_DEFER)
+-+			cpr3_err(ctrl, "unable to parse common controller data, rc=%d\n",
+-+				 rc);
+-+		return rc;
+-+	}
+-+
+-+	ctrl->ctrl_type = CPR_CTRL_TYPE_CPR3;
+-+	ctrl->supports_hw_closed_loop = false;
+-+
+-+	return 0;
+-+}
+-+
+-+static const struct cpr3_reg_data ipq807x_cpr_npu = {
+-+	.cpr_valid_fuse_count = IPQ807x_NPU_FUSE_CORNERS,
+-+	.init_voltage_param = ipq807x_npu_init_voltage_param,
+-+	.fuse_ref_volt = ipq807x_npu_fuse_ref_volt,
+-+	.fuse_step_volt = IPQ807x_NPU_FUSE_STEP_VOLT,
+-+	.cpr_clk_rate = IPQ807x_NPU_CPR_CLOCK_RATE,
+-+};
+-+
+-+static const struct cpr3_reg_data ipq817x_cpr_npu = {
+-+	.cpr_valid_fuse_count = IPQ817x_NPU_FUSE_CORNERS,
+-+	.init_voltage_param = ipq807x_npu_init_voltage_param,
+-+	.fuse_ref_volt = ipq807x_npu_fuse_ref_volt,
+-+	.fuse_step_volt = IPQ807x_NPU_FUSE_STEP_VOLT,
+-+	.cpr_clk_rate = IPQ807x_NPU_CPR_CLOCK_RATE,
+-+};
+-+
+-+static const struct cpr3_reg_data ipq9574_cpr_npu = {
+-+	.cpr_valid_fuse_count = IPQ9574_NPU_FUSE_CORNERS,
+-+	.init_voltage_param = ipq9574_npu_init_voltage_param,
+-+	.fuse_ref_volt = ipq9574_npu_fuse_ref_volt,
+-+	.fuse_step_volt = IPQ9574_NPU_FUSE_STEP_VOLT,
+-+	.cpr_clk_rate = IPQ9574_NPU_CPR_CLOCK_RATE,
+-+};
+-+
+-+static struct of_device_id cpr3_regulator_match_table[] = {
+-+	{
+-+		.compatible = "qcom,cpr3-ipq807x-npu-regulator",
+-+		.data = &ipq807x_cpr_npu
+-+	},
+-+	{
+-+		.compatible = "qcom,cpr3-ipq817x-npu-regulator",
+-+		.data = &ipq817x_cpr_npu
+-+	},
+-+	{
+-+		.compatible = "qcom,cpr3-ipq9574-npu-regulator",
+-+		.data = &ipq9574_cpr_npu
+-+	},
+-+	{}
+-+};
+-+
+-+static int cpr3_npu_regulator_probe(struct platform_device *pdev)
+-+{
+-+	struct device *dev = &pdev->dev;
+-+	struct cpr3_controller *ctrl;
+-+	int i, rc;
+-+	const struct of_device_id *match;
+-+	struct cpr3_reg_data *cpr_data;
+-+
+-+	if (!dev->of_node) {
+-+		dev_err(dev, "Device tree node is missing\n");
+-+		return -EINVAL;
+-+	}
+-+
+-+	ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
+-+	if (!ctrl)
+-+		return -ENOMEM;
+-+	g_ctrl = ctrl;
+-+
+-+	match = of_match_device(cpr3_regulator_match_table, &pdev->dev);
+-+	if (!match)
+-+		return -ENODEV;
+-+
+-+	cpr_data = (struct cpr3_reg_data *)match->data;
+-+	g_valid_npu_fuse_count = cpr_data->cpr_valid_fuse_count;
+-+	dev_info(dev, "NPU CPR valid fuse count: %d\n", g_valid_npu_fuse_count);
+-+	ctrl->cpr_clock_rate = cpr_data->cpr_clk_rate;
+-+
+-+	ctrl->dev = dev;
+-+	/* Set to false later if anything precludes CPR operation. */
+-+	ctrl->cpr_allowed_hw = true;
+-+
+-+	rc = of_property_read_string(dev->of_node, "qcom,cpr-ctrl-name",
+-+				     &ctrl->name);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "unable to read qcom,cpr-ctrl-name, rc=%d\n",
+-+			 rc);
+-+		return rc;
+-+	}
+-+
+-+	rc = cpr3_map_fuse_base(ctrl, pdev);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "could not map fuse base address\n");
+-+		return rc;
+-+	}
+-+
+-+	rc = cpr3_read_tcsr_setting(ctrl, pdev, IPQ807x_NPU_CPR_TCSR_START,
+-+				    IPQ807x_NPU_CPR_TCSR_END);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "could not read CPR tcsr rsetting\n");
+-+		return rc;
+-+	}
+-+
+-+	rc = cpr3_allocate_threads(ctrl, 0, 0);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "failed to allocate CPR thread array, rc=%d\n",
+-+			 rc);
+-+		return rc;
+-+	}
+-+
+-+	if (ctrl->thread_count != 1) {
+-+		cpr3_err(ctrl, "expected 1 thread but found %d\n",
+-+			 ctrl->thread_count);
+-+		return -EINVAL;
+-+	}
+-+
+-+	rc = cpr3_npu_init_controller(ctrl);
+-+	if (rc) {
+-+		if (rc != -EPROBE_DEFER)
+-+			cpr3_err(ctrl, "failed to initialize CPR controller parameters, rc=%d\n",
+-+				 rc);
+-+		return rc;
+-+	}
+-+
+-+	rc = cpr3_npu_init_thread(&ctrl->thread[0]);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "thread initialization failed, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	for (i = 0; i < ctrl->thread[0].vreg_count; i++) {
+-+		ctrl->thread[0].vreg[i].cpr3_regulator_data = cpr_data;
+-+		rc = cpr3_npu_init_regulator(&ctrl->thread[0].vreg[i]);
+-+		if (rc) {
+-+			cpr3_err(&ctrl->thread[0].vreg[i], "regulator initialization failed, rc=%d\n",
+-+				 rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	platform_set_drvdata(pdev, ctrl);
+-+
+-+	return cpr3_open_loop_regulator_register(pdev, ctrl);
+-+}
+-+
+-+static int cpr3_npu_regulator_remove(struct platform_device *pdev)
+-+{
+-+	struct cpr3_controller *ctrl = platform_get_drvdata(pdev);
+-+
+-+	return cpr3_open_loop_regulator_unregister(ctrl);
+-+}
+-+
+-+static struct platform_driver cpr3_npu_regulator_driver = {
+-+	.driver		= {
+-+		.name		= "qcom,cpr3-npu-regulator",
+-+		.of_match_table	= cpr3_regulator_match_table,
+-+		.owner		= THIS_MODULE,
+-+	},
+-+	.probe		= cpr3_npu_regulator_probe,
+-+	.remove		= cpr3_npu_regulator_remove,
+-+};
+-+
+-+static int cpr3_regulator_init(void)
+-+{
+-+	return platform_driver_register(&cpr3_npu_regulator_driver);
+-+}
+-+arch_initcall(cpr3_regulator_init);
+-+
+-+static void cpr3_regulator_exit(void)
+-+{
+-+	platform_driver_unregister(&cpr3_npu_regulator_driver);
+-+}
+-+module_exit(cpr3_regulator_exit);
+-+
+-+MODULE_DESCRIPTION("QCOM CPR3 NPU regulator driver");
+-+MODULE_LICENSE("Dual BSD/GPLv2");
+-+MODULE_ALIAS("platform:npu-ipq807x");
+---- /dev/null
+-+++ b/drivers/regulator/cpr3-regulator.c
+-@@ -0,0 +1,5112 @@
+-+/*
+-+ * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+-+ *
+-+ * This program is free software; you can redistribute it and/or modify
+-+ * it under the terms of the GNU General Public License version 2 and
+-+ * only version 2 as published by the Free Software Foundation.
+-+ *
+-+ * This program is distributed in the hope that it will be useful,
+-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-+ * GNU General Public License for more details.
+-+ */
+-+
+-+#define pr_fmt(fmt) "%s: " fmt, __func__
+-+
+-+#include <linux/bitops.h>
+-+#include <linux/debugfs.h>
+-+#include <linux/delay.h>
+-+#include <linux/err.h>
+-+#include <linux/init.h>
+-+#include <linux/interrupt.h>
+-+#include <linux/io.h>
+-+#include <linux/kernel.h>
+-+#include <linux/ktime.h>
+-+#include <linux/list.h>
+-+#include <linux/module.h>
+-+#include <linux/of.h>
+-+#include <linux/of_device.h>
+-+#include <linux/platform_device.h>
+-+#include <linux/pm_opp.h>
+-+#include <linux/slab.h>
+-+#include <linux/sort.h>
+-+#include <linux/string.h>
+-+#include <linux/uaccess.h>
+-+#include <linux/regulator/driver.h>
+-+#include <linux/regulator/machine.h>
+-+#include <linux/regulator/of_regulator.h>
+-+#include <linux/panic_notifier.h>
+-+
+-+#include "cpr3-regulator.h"
+-+
+-+#define CPR3_REGULATOR_CORNER_INVALID	(-1)
+-+#define CPR3_RO_MASK			GENMASK(CPR3_RO_COUNT - 1, 0)
+-+
+-+/* CPR3 registers */
+-+#define CPR3_REG_CPR_CTL			0x4
+-+#define CPR3_CPR_CTL_LOOP_EN_MASK		BIT(0)
+-+#define CPR3_CPR_CTL_LOOP_ENABLE		BIT(0)
+-+#define CPR3_CPR_CTL_LOOP_DISABLE		0
+-+#define CPR3_CPR_CTL_IDLE_CLOCKS_MASK		GENMASK(5, 1)
+-+#define CPR3_CPR_CTL_IDLE_CLOCKS_SHIFT		1
+-+#define CPR3_CPR_CTL_COUNT_MODE_MASK		GENMASK(7, 6)
+-+#define CPR3_CPR_CTL_COUNT_MODE_SHIFT		6
+-+#define CPR3_CPR_CTL_COUNT_MODE_ALL_AT_ONCE_MIN	0
+-+#define CPR3_CPR_CTL_COUNT_MODE_ALL_AT_ONCE_MAX	1
+-+#define CPR3_CPR_CTL_COUNT_MODE_STAGGERED	2
+-+#define CPR3_CPR_CTL_COUNT_MODE_ALL_AT_ONCE_AGE	3
+-+#define CPR3_CPR_CTL_COUNT_REPEAT_MASK		GENMASK(31, 9)
+-+#define CPR3_CPR_CTL_COUNT_REPEAT_SHIFT		9
+-+
+-+#define CPR3_REG_CPR_STATUS			0x8
+-+#define CPR3_CPR_STATUS_BUSY_MASK		BIT(0)
+-+#define CPR3_CPR_STATUS_AGING_MEASUREMENT_MASK	BIT(1)
+-+
+-+/*
+-+ * This register is not present on controllers that support HW closed-loop
+-+ * except CPR4 APSS controller.
+-+ */
+-+#define CPR3_REG_CPR_TIMER_AUTO_CONT		0xC
+-+
+-+#define CPR3_REG_CPR_STEP_QUOT			0x14
+-+#define CPR3_CPR_STEP_QUOT_MIN_MASK		GENMASK(5, 0)
+-+#define CPR3_CPR_STEP_QUOT_MIN_SHIFT		0
+-+#define CPR3_CPR_STEP_QUOT_MAX_MASK		GENMASK(11, 6)
+-+#define CPR3_CPR_STEP_QUOT_MAX_SHIFT		6
+-+
+-+#define CPR3_REG_GCNT(ro)			(0xA0 + 0x4 * (ro))
+-+
+-+#define CPR3_REG_SENSOR_BYPASS_WRITE(sensor)	(0xE0 + 0x4 * ((sensor) / 32))
+-+#define CPR3_REG_SENSOR_BYPASS_WRITE_BANK(bank)	(0xE0 + 0x4 * (bank))
+-+
+-+#define CPR3_REG_SENSOR_MASK_WRITE(sensor)	(0x120 + 0x4 * ((sensor) / 32))
+-+#define CPR3_REG_SENSOR_MASK_WRITE_BANK(bank)	(0x120 + 0x4 * (bank))
+-+#define CPR3_REG_SENSOR_MASK_READ(sensor)	(0x140 + 0x4 * ((sensor) / 32))
+-+
+-+#define CPR3_REG_SENSOR_OWNER(sensor)	(0x200 + 0x4 * (sensor))
+-+
+-+#define CPR3_REG_CONT_CMD		0x800
+-+#define CPR3_CONT_CMD_ACK		0x1
+-+#define CPR3_CONT_CMD_NACK		0x0
+-+
+-+#define CPR3_REG_THRESH(thread)		(0x808 + 0x440 * (thread))
+-+#define CPR3_THRESH_CONS_DOWN_MASK	GENMASK(3, 0)
+-+#define CPR3_THRESH_CONS_DOWN_SHIFT	0
+-+#define CPR3_THRESH_CONS_UP_MASK	GENMASK(7, 4)
+-+#define CPR3_THRESH_CONS_UP_SHIFT	4
+-+#define CPR3_THRESH_DOWN_THRESH_MASK	GENMASK(12, 8)
+-+#define CPR3_THRESH_DOWN_THRESH_SHIFT	8
+-+#define CPR3_THRESH_UP_THRESH_MASK	GENMASK(17, 13)
+-+#define CPR3_THRESH_UP_THRESH_SHIFT	13
+-+
+-+#define CPR3_REG_RO_MASK(thread)	(0x80C + 0x440 * (thread))
+-+
+-+#define CPR3_REG_RESULT0(thread)	(0x810 + 0x440 * (thread))
+-+#define CPR3_RESULT0_BUSY_MASK		BIT(0)
+-+#define CPR3_RESULT0_STEP_DN_MASK	BIT(1)
+-+#define CPR3_RESULT0_STEP_UP_MASK	BIT(2)
+-+#define CPR3_RESULT0_ERROR_STEPS_MASK	GENMASK(7, 3)
+-+#define CPR3_RESULT0_ERROR_STEPS_SHIFT	3
+-+#define CPR3_RESULT0_ERROR_MASK		GENMASK(19, 8)
+-+#define CPR3_RESULT0_ERROR_SHIFT	8
+-+#define CPR3_RESULT0_NEGATIVE_MASK	BIT(20)
+-+
+-+#define CPR3_REG_RESULT1(thread)	(0x814 + 0x440 * (thread))
+-+#define CPR3_RESULT1_QUOT_MIN_MASK	GENMASK(11, 0)
+-+#define CPR3_RESULT1_QUOT_MIN_SHIFT	0
+-+#define CPR3_RESULT1_QUOT_MAX_MASK	GENMASK(23, 12)
+-+#define CPR3_RESULT1_QUOT_MAX_SHIFT	12
+-+#define CPR3_RESULT1_RO_MIN_MASK	GENMASK(27, 24)
+-+#define CPR3_RESULT1_RO_MIN_SHIFT	24
+-+#define CPR3_RESULT1_RO_MAX_MASK	GENMASK(31, 28)
+-+#define CPR3_RESULT1_RO_MAX_SHIFT	28
+-+
+-+#define CPR3_REG_RESULT2(thread)		(0x818 + 0x440 * (thread))
+-+#define CPR3_RESULT2_STEP_QUOT_MIN_MASK		GENMASK(5, 0)
+-+#define CPR3_RESULT2_STEP_QUOT_MIN_SHIFT	0
+-+#define CPR3_RESULT2_STEP_QUOT_MAX_MASK		GENMASK(11, 6)
+-+#define CPR3_RESULT2_STEP_QUOT_MAX_SHIFT	6
+-+#define CPR3_RESULT2_SENSOR_MIN_MASK		GENMASK(23, 16)
+-+#define CPR3_RESULT2_SENSOR_MIN_SHIFT		16
+-+#define CPR3_RESULT2_SENSOR_MAX_MASK		GENMASK(31, 24)
+-+#define CPR3_RESULT2_SENSOR_MAX_SHIFT		24
+-+
+-+#define CPR3_REG_IRQ_EN			0x81C
+-+#define CPR3_REG_IRQ_CLEAR		0x820
+-+#define CPR3_REG_IRQ_STATUS		0x824
+-+#define CPR3_IRQ_UP			BIT(3)
+-+#define CPR3_IRQ_MID			BIT(2)
+-+#define CPR3_IRQ_DOWN			BIT(1)
+-+
+-+#define CPR3_REG_TARGET_QUOT(thread, ro) \
+-+					(0x840 + 0x440 * (thread) + 0x4 * (ro))
+-+
+-+/* Registers found only on controllers that support HW closed-loop. */
+-+#define CPR3_REG_PD_THROTTLE		0xE8
+-+#define CPR3_PD_THROTTLE_DISABLE	0x0
+-+
+-+#define CPR3_REG_HW_CLOSED_LOOP		0x3000
+-+#define CPR3_HW_CLOSED_LOOP_ENABLE	0x0
+-+#define CPR3_HW_CLOSED_LOOP_DISABLE	0x1
+-+
+-+#define CPR3_REG_CPR_TIMER_MID_CONT	0x3004
+-+#define CPR3_REG_CPR_TIMER_UP_DN_CONT	0x3008
+-+
+-+#define CPR3_REG_LAST_MEASUREMENT		0x7F8
+-+#define CPR3_LAST_MEASUREMENT_THREAD_DN_SHIFT	0
+-+#define CPR3_LAST_MEASUREMENT_THREAD_UP_SHIFT	4
+-+#define CPR3_LAST_MEASUREMENT_THREAD_DN(thread) \
+-+		(BIT(thread) << CPR3_LAST_MEASUREMENT_THREAD_DN_SHIFT)
+-+#define CPR3_LAST_MEASUREMENT_THREAD_UP(thread) \
+-+		(BIT(thread) << CPR3_LAST_MEASUREMENT_THREAD_UP_SHIFT)
+-+#define CPR3_LAST_MEASUREMENT_AGGR_DN		BIT(8)
+-+#define CPR3_LAST_MEASUREMENT_AGGR_MID		BIT(9)
+-+#define CPR3_LAST_MEASUREMENT_AGGR_UP		BIT(10)
+-+#define CPR3_LAST_MEASUREMENT_VALID		BIT(11)
+-+#define CPR3_LAST_MEASUREMENT_SAW_ERROR		BIT(12)
+-+#define CPR3_LAST_MEASUREMENT_PD_BYPASS_MASK	GENMASK(23, 16)
+-+#define CPR3_LAST_MEASUREMENT_PD_BYPASS_SHIFT	16
+-+
+-+/* CPR4 controller specific registers and bit definitions */
+-+#define CPR4_REG_CPR_TIMER_CLAMP			0x10
+-+#define CPR4_CPR_TIMER_CLAMP_THREAD_AGGREGATION_EN	BIT(27)
+-+
+-+#define CPR4_REG_MISC				0x700
+-+#define CPR4_MISC_MARGIN_TABLE_ROW_SELECT_MASK	GENMASK(23, 20)
+-+#define CPR4_MISC_MARGIN_TABLE_ROW_SELECT_SHIFT	20
+-+#define CPR4_MISC_TEMP_SENSOR_ID_START_MASK	GENMASK(27, 24)
+-+#define CPR4_MISC_TEMP_SENSOR_ID_START_SHIFT	24
+-+#define CPR4_MISC_TEMP_SENSOR_ID_END_MASK	GENMASK(31, 28)
+-+#define CPR4_MISC_TEMP_SENSOR_ID_END_SHIFT	28
+-+
+-+#define CPR4_REG_SAW_ERROR_STEP_LIMIT		0x7A4
+-+#define CPR4_SAW_ERROR_STEP_LIMIT_UP_MASK	GENMASK(4, 0)
+-+#define CPR4_SAW_ERROR_STEP_LIMIT_UP_SHIFT	0
+-+#define CPR4_SAW_ERROR_STEP_LIMIT_DN_MASK	GENMASK(9, 5)
+-+#define CPR4_SAW_ERROR_STEP_LIMIT_DN_SHIFT	5
+-+
+-+#define CPR4_REG_MARGIN_TEMP_CORE_TIMERS			0x7A8
+-+#define CPR4_MARGIN_TEMP_CORE_TIMERS_SETTLE_VOLTAGE_COUNT_MASK	GENMASK(28, 18)
+-+#define CPR4_MARGIN_TEMP_CORE_TIMERS_SETTLE_VOLTAGE_COUNT_SHIFT	18
+-+
+-+#define CPR4_REG_MARGIN_TEMP_CORE(core)		(0x7AC + 0x4 * (core))
+-+#define CPR4_MARGIN_TEMP_CORE_ADJ_MASK		GENMASK(7, 0)
+-+#define CPR4_MARGIN_TEMP_CORE_ADJ_SHIFT		8
+-+
+-+#define CPR4_REG_MARGIN_TEMP_POINT0N1		0x7F0
+-+#define CPR4_MARGIN_TEMP_POINT0_MASK		GENMASK(11, 0)
+-+#define CPR4_MARGIN_TEMP_POINT0_SHIFT		0
+-+#define CPR4_MARGIN_TEMP_POINT1_MASK		GENMASK(23, 12)
+-+#define CPR4_MARGIN_TEMP_POINT1_SHIFT		12
+-+#define CPR4_REG_MARGIN_TEMP_POINT2		0x7F4
+-+#define CPR4_MARGIN_TEMP_POINT2_MASK		GENMASK(11, 0)
+-+#define CPR4_MARGIN_TEMP_POINT2_SHIFT		0
+-+
+-+#define CPR4_REG_MARGIN_ADJ_CTL					0x7F8
+-+#define CPR4_MARGIN_ADJ_CTL_BOOST_EN				BIT(0)
+-+#define CPR4_MARGIN_ADJ_CTL_CORE_ADJ_EN				BIT(1)
+-+#define CPR4_MARGIN_ADJ_CTL_TEMP_ADJ_EN				BIT(2)
+-+#define CPR4_MARGIN_ADJ_CTL_TIMER_SETTLE_VOLTAGE_EN		BIT(3)
+-+#define CPR4_MARGIN_ADJ_CTL_HW_CLOSED_LOOP_EN_MASK		BIT(4)
+-+#define CPR4_MARGIN_ADJ_CTL_HW_CLOSED_LOOP_ENABLE		BIT(4)
+-+#define CPR4_MARGIN_ADJ_CTL_HW_CLOSED_LOOP_DISABLE		0
+-+#define CPR4_MARGIN_ADJ_CTL_PER_RO_KV_MARGIN_EN			BIT(7)
+-+#define CPR4_MARGIN_ADJ_CTL_KV_MARGIN_ADJ_EN			BIT(8)
+-+#define CPR4_MARGIN_ADJ_CTL_PMIC_STEP_SIZE_MASK			GENMASK(16, 12)
+-+#define CPR4_MARGIN_ADJ_CTL_PMIC_STEP_SIZE_SHIFT		12
+-+#define CPR4_MARGIN_ADJ_CTL_INITIAL_TEMP_BAND_MASK		GENMASK(21, 19)
+-+#define CPR4_MARGIN_ADJ_CTL_INITIAL_TEMP_BAND_SHIFT		19
+-+#define CPR4_MARGIN_ADJ_CTL_MAX_NUM_CORES_MASK			GENMASK(25, 22)
+-+#define CPR4_MARGIN_ADJ_CTL_MAX_NUM_CORES_SHIFT			22
+-+#define CPR4_MARGIN_ADJ_CTL_KV_MARGIN_ADJ_STEP_QUOT_MASK	GENMASK(31, 26)
+-+#define CPR4_MARGIN_ADJ_CTL_KV_MARGIN_ADJ_STEP_QUOT_SHIFT	26
+-+
+-+#define CPR4_REG_CPR_MASK_THREAD(thread)	(0x80C + 0x440 * (thread))
+-+#define CPR4_CPR_MASK_THREAD_DISABLE_THREAD		BIT(31)
+-+#define CPR4_CPR_MASK_THREAD_RO_MASK4THREAD_MASK	GENMASK(15, 0)
+-+
+-+/*
+-+ * The amount of time to wait for the CPR controller to become idle when
+-+ * performing an aging measurement.
+-+ */
+-+#define CPR3_AGING_MEASUREMENT_TIMEOUT_NS	5000000
+-+
+-+/*
+-+ * The number of individual aging measurements to perform which are then
+-+ * averaged together in order to determine the final aging adjustment value.
+-+ */
+-+#define CPR3_AGING_MEASUREMENT_ITERATIONS	16
+-+
+-+/*
+-+ * Aging measurements for the aged and unaged ring oscillators take place a few
+-+ * microseconds apart.  If the vdd-supply voltage fluctuates between the two
+-+ * measurements, then the difference between them will be incorrect.  The
+-+ * difference could end up too high or too low.  This constant defines the
+-+ * number of lowest and highest measurements to ignore when averaging.
+-+ */
+-+#define CPR3_AGING_MEASUREMENT_FILTER		3
+-+
+-+/*
+-+ * The number of times to attempt the full aging measurement sequence before
+-+ * declaring a measurement failure.
+-+ */
+-+#define CPR3_AGING_RETRY_COUNT			5
+-+
+-+/*
+-+ * The maximum time to wait in microseconds for a CPR register write to
+-+ * complete.
+-+ */
+-+#define CPR3_REGISTER_WRITE_DELAY_US		200
+-+
+-+static DEFINE_MUTEX(cpr3_controller_list_mutex);
+-+static LIST_HEAD(cpr3_controller_list);
+-+static struct dentry *cpr3_debugfs_base;
+-+
+-+/**
+-+ * cpr3_read() - read four bytes from the memory address specified
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ * @offset:		Offset in bytes from the CPR3 controller's base address
+-+ *
+-+ * Return: memory address value
+-+ */
+-+static inline u32 cpr3_read(struct cpr3_controller *ctrl, u32 offset)
+-+{
+-+	if (!ctrl->cpr_enabled) {
+-+		cpr3_err(ctrl, "CPR register reads are not possible when CPR clocks are disabled\n");
+-+		return 0;
+-+	}
+-+
+-+	return readl_relaxed(ctrl->cpr_ctrl_base + offset);
+-+}
+-+
+-+/**
+-+ * cpr3_write() - write four bytes to the memory address specified
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ * @offset:		Offset in bytes from the CPR3 controller's base address
+-+ * @value:		Value to write to the memory address
+-+ *
+-+ * Return: none
+-+ */
+-+static inline void cpr3_write(struct cpr3_controller *ctrl, u32 offset,
+-+				u32 value)
+-+{
+-+	if (!ctrl->cpr_enabled) {
+-+		cpr3_err(ctrl, "CPR register writes are not possible when CPR clocks are disabled\n");
+-+		return;
+-+	}
+-+
+-+	writel_relaxed(value, ctrl->cpr_ctrl_base + offset);
+-+}
+-+
+-+/**
+-+ * cpr3_masked_write() - perform a read-modify-write sequence so that only
+-+ *		masked bits are modified
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ * @offset:		Offset in bytes from the CPR3 controller's base address
+-+ * @mask:		Mask identifying the bits that should be modified
+-+ * @value:		Value to write to the memory address
+-+ *
+-+ * Return: none
+-+ */
+-+static inline void cpr3_masked_write(struct cpr3_controller *ctrl, u32 offset,
+-+				u32 mask, u32 value)
+-+{
+-+	u32 reg_val, orig_val;
+-+
+-+	if (!ctrl->cpr_enabled) {
+-+		cpr3_err(ctrl, "CPR register writes are not possible when CPR clocks are disabled\n");
+-+		return;
+-+	}
+-+
+-+	reg_val = orig_val = readl_relaxed(ctrl->cpr_ctrl_base + offset);
+-+	reg_val &= ~mask;
+-+	reg_val |= value & mask;
+-+
+-+	if (reg_val != orig_val)
+-+		writel_relaxed(reg_val, ctrl->cpr_ctrl_base + offset);
+-+}
+-+
+-+/**
+-+ * cpr3_ctrl_loop_enable() - enable the CPR sensing loop for a given controller
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: none
+-+ */
+-+static inline void cpr3_ctrl_loop_enable(struct cpr3_controller *ctrl)
+-+{
+-+	if (ctrl->cpr_enabled && !(ctrl->aggr_corner.sdelta
+-+		&& ctrl->aggr_corner.sdelta->allow_boost))
+-+		cpr3_masked_write(ctrl, CPR3_REG_CPR_CTL,
+-+			CPR3_CPR_CTL_LOOP_EN_MASK, CPR3_CPR_CTL_LOOP_ENABLE);
+-+}
+-+
+-+/**
+-+ * cpr3_ctrl_loop_disable() - disable the CPR sensing loop for a given
+-+ *		controller
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: none
+-+ */
+-+static inline void cpr3_ctrl_loop_disable(struct cpr3_controller *ctrl)
+-+{
+-+	if (ctrl->cpr_enabled)
+-+		cpr3_masked_write(ctrl, CPR3_REG_CPR_CTL,
+-+			CPR3_CPR_CTL_LOOP_EN_MASK, CPR3_CPR_CTL_LOOP_DISABLE);
+-+}
+-+
+-+/**
+-+ * cpr3_clock_enable() - prepare and enable all clocks used by this CPR3
+-+ *		controller
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_clock_enable(struct cpr3_controller *ctrl)
+-+{
+-+	int rc;
+-+
+-+	rc = clk_prepare_enable(ctrl->bus_clk);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "failed to enable bus clock, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	rc = clk_prepare_enable(ctrl->iface_clk);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "failed to enable interface clock, rc=%d\n", rc);
+-+		clk_disable_unprepare(ctrl->bus_clk);
+-+		return rc;
+-+	}
+-+
+-+	rc = clk_prepare_enable(ctrl->core_clk);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "failed to enable core clock, rc=%d\n", rc);
+-+		clk_disable_unprepare(ctrl->iface_clk);
+-+		clk_disable_unprepare(ctrl->bus_clk);
+-+		return rc;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_clock_disable() - disable and unprepare all clocks used by this CPR3
+-+ *		controller
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: none
+-+ */
+-+static void cpr3_clock_disable(struct cpr3_controller *ctrl)
+-+{
+-+	clk_disable_unprepare(ctrl->core_clk);
+-+	clk_disable_unprepare(ctrl->iface_clk);
+-+	clk_disable_unprepare(ctrl->bus_clk);
+-+}
+-+
+-+/**
+-+ * cpr3_ctrl_clear_cpr4_config() - clear the CPR4 register configuration
+-+ *		programmed for current aggregated corner of a given controller
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static inline int cpr3_ctrl_clear_cpr4_config(struct cpr3_controller *ctrl)
+-+{
+-+	struct cpr4_sdelta *aggr_sdelta = ctrl->aggr_corner.sdelta;
+-+	bool cpr_enabled = ctrl->cpr_enabled;
+-+	int i, rc = 0;
+-+
+-+	if (!aggr_sdelta || !(aggr_sdelta->allow_core_count_adj
+-+		|| aggr_sdelta->allow_temp_adj || aggr_sdelta->allow_boost))
+-+		/* cpr4 features are not enabled */
+-+		return 0;
+-+
+-+	/* Ensure that CPR clocks are enabled before writing to registers. */
+-+	if (!cpr_enabled) {
+-+		rc = cpr3_clock_enable(ctrl);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "clock enable failed, rc=%d\n", rc);
+-+			return rc;
+-+		}
+-+		ctrl->cpr_enabled = true;
+-+	}
+-+
+-+	/*
+-+	 * Clear feature enable configuration made for current
+-+	 * aggregated corner.
+-+	 */
+-+	cpr3_masked_write(ctrl, CPR4_REG_MARGIN_ADJ_CTL,
+-+		CPR4_MARGIN_ADJ_CTL_MAX_NUM_CORES_MASK
+-+		| CPR4_MARGIN_ADJ_CTL_CORE_ADJ_EN
+-+		| CPR4_MARGIN_ADJ_CTL_TEMP_ADJ_EN
+-+		| CPR4_MARGIN_ADJ_CTL_KV_MARGIN_ADJ_EN
+-+		| CPR4_MARGIN_ADJ_CTL_BOOST_EN
+-+		| CPR4_MARGIN_ADJ_CTL_HW_CLOSED_LOOP_EN_MASK, 0);
+-+
+-+	cpr3_masked_write(ctrl, CPR4_REG_MISC,
+-+			CPR4_MISC_MARGIN_TABLE_ROW_SELECT_MASK,
+-+			0 << CPR4_MISC_MARGIN_TABLE_ROW_SELECT_SHIFT);
+-+
+-+	for (i = 0; i <= aggr_sdelta->max_core_count; i++) {
+-+		/* Clear voltage margin adjustments programmed in TEMP_COREi */
+-+		cpr3_write(ctrl, CPR4_REG_MARGIN_TEMP_CORE(i), 0);
+-+	}
+-+
+-+	/* Turn off CPR clocks if they were off before this function call. */
+-+	if (!cpr_enabled) {
+-+		cpr3_clock_disable(ctrl);
+-+		ctrl->cpr_enabled = false;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_closed_loop_enable() - enable logical CPR closed-loop operation
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_closed_loop_enable(struct cpr3_controller *ctrl)
+-+{
+-+	int rc;
+-+
+-+	if (!ctrl->cpr_allowed_hw || !ctrl->cpr_allowed_sw) {
+-+		cpr3_err(ctrl, "cannot enable closed-loop CPR operation because it is disallowed\n");
+-+		return -EPERM;
+-+	} else if (ctrl->cpr_enabled) {
+-+		/* Already enabled */
+-+		return 0;
+-+	} else if (ctrl->cpr_suspended) {
+-+		/*
+-+		 * CPR must remain disabled as the system is entering suspend.
+-+		 */
+-+		return 0;
+-+	}
+-+
+-+	rc = cpr3_clock_enable(ctrl);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "unable to enable CPR clocks, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	ctrl->cpr_enabled = true;
+-+	cpr3_debug(ctrl, "CPR closed-loop operation enabled\n");
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_closed_loop_disable() - disable logical CPR closed-loop operation
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static inline int cpr3_closed_loop_disable(struct cpr3_controller *ctrl)
+-+{
+-+	if (!ctrl->cpr_enabled) {
+-+		/* Already disabled */
+-+		return 0;
+-+	}
+-+
+-+	cpr3_clock_disable(ctrl);
+-+	ctrl->cpr_enabled = false;
+-+	cpr3_debug(ctrl, "CPR closed-loop operation disabled\n");
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_get_gcnt() - returns the GCNT register value corresponding
+-+ *		to the clock rate and sensor time of the CPR3 controller
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: GCNT value
+-+ */
+-+static u32 cpr3_regulator_get_gcnt(struct cpr3_controller *ctrl)
+-+{
+-+	u64 temp;
+-+	unsigned int remainder;
+-+	u32 gcnt;
+-+
+-+	temp = (u64)ctrl->cpr_clock_rate * (u64)ctrl->sensor_time;
+-+	remainder = do_div(temp, 1000000000);
+-+	if (remainder)
+-+		temp++;
+-+	/*
+-+	 * GCNT == 0 corresponds to a single ref clock measurement interval so
+-+	 * offset GCNT values by 1.
+-+	 */
+-+	gcnt = temp - 1;
+-+
+-+	return gcnt;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_init_thread() - performs hardware initialization of CPR
+-+ *		thread registers
+-+ * @thread:		Pointer to the CPR3 thread
+-+ *
+-+ * CPR interface/bus clocks must be enabled before calling this function.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_regulator_init_thread(struct cpr3_thread *thread)
+-+{
+-+	u32 reg;
+-+
+-+	reg = (thread->consecutive_up << CPR3_THRESH_CONS_UP_SHIFT)
+-+		& CPR3_THRESH_CONS_UP_MASK;
+-+	reg |= (thread->consecutive_down << CPR3_THRESH_CONS_DOWN_SHIFT)
+-+		& CPR3_THRESH_CONS_DOWN_MASK;
+-+	reg |= (thread->up_threshold << CPR3_THRESH_UP_THRESH_SHIFT)
+-+		& CPR3_THRESH_UP_THRESH_MASK;
+-+	reg |= (thread->down_threshold << CPR3_THRESH_DOWN_THRESH_SHIFT)
+-+		& CPR3_THRESH_DOWN_THRESH_MASK;
+-+
+-+	cpr3_write(thread->ctrl, CPR3_REG_THRESH(thread->thread_id), reg);
+-+
+-+	/*
+-+	 * Mask all RO's initially so that unused thread doesn't contribute
+-+	 * to closed-loop voltage.
+-+	 */
+-+	cpr3_write(thread->ctrl, CPR3_REG_RO_MASK(thread->thread_id),
+-+		CPR3_RO_MASK);
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr4_regulator_init_temp_points() - performs hardware initialization of CPR4
+-+ *		registers to track tsen temperature data and also specify the
+-+ *		temperature band range values to apply different voltage margins
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * CPR interface/bus clocks must be enabled before calling this function.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr4_regulator_init_temp_points(struct cpr3_controller *ctrl)
+-+{
+-+	if (!ctrl->allow_temp_adj)
+-+		return 0;
+-+
+-+	cpr3_masked_write(ctrl, CPR4_REG_MISC,
+-+				CPR4_MISC_TEMP_SENSOR_ID_START_MASK,
+-+				ctrl->temp_sensor_id_start
+-+				<< CPR4_MISC_TEMP_SENSOR_ID_START_SHIFT);
+-+
+-+	cpr3_masked_write(ctrl, CPR4_REG_MISC,
+-+				CPR4_MISC_TEMP_SENSOR_ID_END_MASK,
+-+				ctrl->temp_sensor_id_end
+-+				<< CPR4_MISC_TEMP_SENSOR_ID_END_SHIFT);
+-+
+-+	cpr3_masked_write(ctrl, CPR4_REG_MARGIN_TEMP_POINT2,
+-+		CPR4_MARGIN_TEMP_POINT2_MASK,
+-+		(ctrl->temp_band_count == 4 ? ctrl->temp_points[2] : 0x7FF)
+-+		<< CPR4_MARGIN_TEMP_POINT2_SHIFT);
+-+
+-+	cpr3_masked_write(ctrl, CPR4_REG_MARGIN_TEMP_POINT0N1,
+-+		CPR4_MARGIN_TEMP_POINT1_MASK,
+-+		(ctrl->temp_band_count >= 3 ? ctrl->temp_points[1] : 0x7FF)
+-+		<< CPR4_MARGIN_TEMP_POINT1_SHIFT);
+-+
+-+	cpr3_masked_write(ctrl, CPR4_REG_MARGIN_TEMP_POINT0N1,
+-+		CPR4_MARGIN_TEMP_POINT0_MASK,
+-+		(ctrl->temp_band_count >= 2 ? ctrl->temp_points[0] : 0x7FF)
+-+		<< CPR4_MARGIN_TEMP_POINT0_SHIFT);
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_init_cpr4() - performs hardware initialization at the
+-+ *		controller and thread level required for CPR4 operation.
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * CPR interface/bus clocks must be enabled before calling this function.
+-+ * This function allocates sdelta structures and sdelta tables for aggregated
+-+ * corners of the controller and its threads.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_regulator_init_cpr4(struct cpr3_controller *ctrl)
+-+{
+-+	struct cpr3_thread *thread;
+-+	struct cpr3_regulator *vreg;
+-+	struct cpr4_sdelta *sdelta;
+-+	int i, j, ctrl_max_core_count, thread_max_core_count, rc = 0;
+-+	bool ctrl_valid_sdelta, thread_valid_sdelta;
+-+	u32 pmic_step_size = 1;
+-+	int thread_id = 0;
+-+	u64 temp;
+-+
+-+	if (ctrl->supports_hw_closed_loop) {
+-+		if (ctrl->saw_use_unit_mV)
+-+			pmic_step_size = ctrl->step_volt / 1000;
+-+		cpr3_masked_write(ctrl, CPR4_REG_MARGIN_ADJ_CTL,
+-+				  CPR4_MARGIN_ADJ_CTL_PMIC_STEP_SIZE_MASK,
+-+				  (pmic_step_size
+-+				  << CPR4_MARGIN_ADJ_CTL_PMIC_STEP_SIZE_SHIFT));
+-+
+-+		cpr3_masked_write(ctrl, CPR4_REG_SAW_ERROR_STEP_LIMIT,
+-+				  CPR4_SAW_ERROR_STEP_LIMIT_DN_MASK,
+-+				  (ctrl->down_error_step_limit
+-+					<< CPR4_SAW_ERROR_STEP_LIMIT_DN_SHIFT));
+-+
+-+		cpr3_masked_write(ctrl, CPR4_REG_SAW_ERROR_STEP_LIMIT,
+-+				  CPR4_SAW_ERROR_STEP_LIMIT_UP_MASK,
+-+				  (ctrl->up_error_step_limit
+-+					<< CPR4_SAW_ERROR_STEP_LIMIT_UP_SHIFT));
+-+
+-+		/*
+-+		 * Enable thread aggregation regardless of which threads are
+-+		 * enabled or disabled.
+-+		 */
+-+		cpr3_masked_write(ctrl, CPR4_REG_CPR_TIMER_CLAMP,
+-+				  CPR4_CPR_TIMER_CLAMP_THREAD_AGGREGATION_EN,
+-+				  CPR4_CPR_TIMER_CLAMP_THREAD_AGGREGATION_EN);
+-+
+-+		switch (ctrl->thread_count) {
+-+		case 0:
+-+			/* Disable both threads */
+-+			cpr3_masked_write(ctrl, CPR4_REG_CPR_MASK_THREAD(0),
+-+				CPR4_CPR_MASK_THREAD_DISABLE_THREAD
+-+				    | CPR4_CPR_MASK_THREAD_RO_MASK4THREAD_MASK,
+-+				CPR4_CPR_MASK_THREAD_DISABLE_THREAD
+-+				    | CPR4_CPR_MASK_THREAD_RO_MASK4THREAD_MASK);
+-+
+-+			cpr3_masked_write(ctrl, CPR4_REG_CPR_MASK_THREAD(1),
+-+				CPR4_CPR_MASK_THREAD_DISABLE_THREAD
+-+				    | CPR4_CPR_MASK_THREAD_RO_MASK4THREAD_MASK,
+-+				CPR4_CPR_MASK_THREAD_DISABLE_THREAD
+-+				    | CPR4_CPR_MASK_THREAD_RO_MASK4THREAD_MASK);
+-+			break;
+-+		case 1:
+-+			/* Disable unused thread */
+-+			thread_id = ctrl->thread[0].thread_id ? 0 : 1;
+-+			cpr3_masked_write(ctrl,
+-+				CPR4_REG_CPR_MASK_THREAD(thread_id),
+-+				CPR4_CPR_MASK_THREAD_DISABLE_THREAD
+-+				    | CPR4_CPR_MASK_THREAD_RO_MASK4THREAD_MASK,
+-+				CPR4_CPR_MASK_THREAD_DISABLE_THREAD
+-+				    | CPR4_CPR_MASK_THREAD_RO_MASK4THREAD_MASK);
+-+			break;
+-+		}
+-+	}
+-+
+-+	if (!ctrl->allow_core_count_adj && !ctrl->allow_temp_adj
+-+		&& !ctrl->allow_boost) {
+-+		/*
+-+		 * Skip below configuration as none of the features
+-+		 * are enabled.
+-+		 */
+-+		return rc;
+-+	}
+-+
+-+	if (ctrl->supports_hw_closed_loop)
+-+		cpr3_masked_write(ctrl, CPR4_REG_MARGIN_ADJ_CTL,
+-+				  CPR4_MARGIN_ADJ_CTL_TIMER_SETTLE_VOLTAGE_EN,
+-+				  CPR4_MARGIN_ADJ_CTL_TIMER_SETTLE_VOLTAGE_EN);
+-+
+-+	cpr3_masked_write(ctrl, CPR4_REG_MARGIN_ADJ_CTL,
+-+			CPR4_MARGIN_ADJ_CTL_KV_MARGIN_ADJ_STEP_QUOT_MASK,
+-+			ctrl->step_quot_fixed
+-+			<< CPR4_MARGIN_ADJ_CTL_KV_MARGIN_ADJ_STEP_QUOT_SHIFT);
+-+
+-+	cpr3_masked_write(ctrl, CPR4_REG_MARGIN_ADJ_CTL,
+-+			CPR4_MARGIN_ADJ_CTL_PER_RO_KV_MARGIN_EN,
+-+			(ctrl->use_dynamic_step_quot
+-+			? CPR4_MARGIN_ADJ_CTL_PER_RO_KV_MARGIN_EN : 0));
+-+
+-+	cpr3_masked_write(ctrl, CPR4_REG_MARGIN_ADJ_CTL,
+-+			CPR4_MARGIN_ADJ_CTL_INITIAL_TEMP_BAND_MASK,
+-+			ctrl->initial_temp_band
+-+			<< CPR4_MARGIN_ADJ_CTL_INITIAL_TEMP_BAND_SHIFT);
+-+
+-+	rc = cpr4_regulator_init_temp_points(ctrl);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "initialize temp points failed, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	if (ctrl->voltage_settling_time) {
+-+		/*
+-+		 * Configure the settling timer used to account for
+-+		 * one VDD supply step.
+-+		 */
+-+		temp = (u64)ctrl->cpr_clock_rate
+-+				* (u64)ctrl->voltage_settling_time;
+-+		do_div(temp, 1000000000);
+-+		cpr3_masked_write(ctrl, CPR4_REG_MARGIN_TEMP_CORE_TIMERS,
+-+			CPR4_MARGIN_TEMP_CORE_TIMERS_SETTLE_VOLTAGE_COUNT_MASK,
+-+			temp
+-+		    << CPR4_MARGIN_TEMP_CORE_TIMERS_SETTLE_VOLTAGE_COUNT_SHIFT);
+-+	}
+-+
+-+	/*
+-+	 * Allocate memory for cpr4_sdelta structure and sdelta table for
+-+	 * controller aggregated corner by finding the maximum core count
+-+	 * used by any cpr3 regulators.
+-+	 */
+-+	ctrl_max_core_count = 1;
+-+	ctrl_valid_sdelta = false;
+-+	for (i = 0; i < ctrl->thread_count; i++) {
+-+		thread = &ctrl->thread[i];
+-+
+-+		/*
+-+		 * Allocate memory for cpr4_sdelta structure and sdelta table
+-+		 * for thread aggregated corner by finding the maximum core
+-+		 * count used by any cpr3 regulators of the thread.
+-+		 */
+-+		thread_max_core_count = 1;
+-+		thread_valid_sdelta = false;
+-+		for (j = 0; j < thread->vreg_count; j++) {
+-+			vreg = &thread->vreg[j];
+-+			thread_max_core_count = max(thread_max_core_count,
+-+							vreg->max_core_count);
+-+			thread_valid_sdelta |= (vreg->allow_core_count_adj
+-+							| vreg->allow_temp_adj
+-+							| vreg->allow_boost);
+-+		}
+-+		if (thread_valid_sdelta) {
+-+			sdelta = devm_kzalloc(ctrl->dev, sizeof(*sdelta),
+-+					GFP_KERNEL);
+-+			if (!sdelta)
+-+				return -ENOMEM;
+-+
+-+			sdelta->table = devm_kcalloc(ctrl->dev,
+-+						thread_max_core_count
+-+						* ctrl->temp_band_count,
+-+						sizeof(*sdelta->table),
+-+						GFP_KERNEL);
+-+			if (!sdelta->table)
+-+				return -ENOMEM;
+-+
+-+			sdelta->boost_table = devm_kcalloc(ctrl->dev,
+-+						ctrl->temp_band_count,
+-+						sizeof(*sdelta->boost_table),
+-+						GFP_KERNEL);
+-+			if (!sdelta->boost_table)
+-+				return -ENOMEM;
+-+
+-+			thread->aggr_corner.sdelta = sdelta;
+-+		}
+-+
+-+		ctrl_valid_sdelta |= thread_valid_sdelta;
+-+		ctrl_max_core_count = max(ctrl_max_core_count,
+-+						thread_max_core_count);
+-+	}
+-+
+-+	if (ctrl_valid_sdelta) {
+-+		sdelta = devm_kzalloc(ctrl->dev, sizeof(*sdelta), GFP_KERNEL);
+-+		if (!sdelta)
+-+			return -ENOMEM;
+-+
+-+		sdelta->table = devm_kcalloc(ctrl->dev, ctrl_max_core_count
+-+					* ctrl->temp_band_count,
+-+					sizeof(*sdelta->table), GFP_KERNEL);
+-+		if (!sdelta->table)
+-+			return -ENOMEM;
+-+
+-+		sdelta->boost_table = devm_kcalloc(ctrl->dev,
+-+					ctrl->temp_band_count,
+-+					sizeof(*sdelta->boost_table),
+-+					GFP_KERNEL);
+-+		if (!sdelta->boost_table)
+-+			return -ENOMEM;
+-+
+-+		ctrl->aggr_corner.sdelta = sdelta;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_write_temp_core_margin() - programs hardware SDELTA registers with
+-+ *		the voltage margin adjustments that need to be applied for
+-+ *		different online core-count and temperature bands.
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ * @addr:		SDELTA register address
+-+ * @temp_core_adj:	Array of voltage margin values for different temperature
+-+ *			bands.
+-+ *
+-+ * CPR interface/bus clocks must be enabled before calling this function.
+-+ *
+-+ * Return: none
+-+ */
+-+static void cpr3_write_temp_core_margin(struct cpr3_controller *ctrl,
+-+				 int addr, int *temp_core_adj)
+-+{
+-+	int i, margin_steps;
+-+	u32 reg = 0;
+-+
+-+	for (i = 0; i < ctrl->temp_band_count; i++) {
+-+		margin_steps = max(min(temp_core_adj[i], 127), -128);
+-+		reg |= (margin_steps & CPR4_MARGIN_TEMP_CORE_ADJ_MASK) <<
+-+			(i * CPR4_MARGIN_TEMP_CORE_ADJ_SHIFT);
+-+	}
+-+
+-+	cpr3_write(ctrl, addr, reg);
+-+	cpr3_debug(ctrl, "sdelta offset=0x%08x, val=0x%08x\n", addr, reg);
+-+}
+-+
+-+/**
+-+ * cpr3_controller_program_sdelta() - programs hardware SDELTA registers with
+-+ *		the voltage margin adjustments that need to be applied at
+-+ *		different online core-count and temperature bands. Also,
+-+ *		programs hardware register configuration for per-online-core
+-+ *		and per-temperature based adjustments.
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * CPR interface/bus clocks must be enabled before calling this function.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_controller_program_sdelta(struct cpr3_controller *ctrl)
+-+{
+-+	struct cpr3_corner *corner = &ctrl->aggr_corner;
+-+	struct cpr4_sdelta *sdelta = corner->sdelta;
+-+	int i, index, max_core_count, rc = 0;
+-+	bool cpr_enabled = ctrl->cpr_enabled;
+-+
+-+	if (!sdelta)
+-+		/* cpr4_sdelta not defined for current aggregated corner */
+-+		return 0;
+-+
+-+	if (ctrl->supports_hw_closed_loop && ctrl->cpr_enabled) {
+-+		cpr3_masked_write(ctrl, CPR4_REG_MARGIN_ADJ_CTL,
+-+			CPR4_MARGIN_ADJ_CTL_HW_CLOSED_LOOP_EN_MASK,
+-+			(ctrl->use_hw_closed_loop && !sdelta->allow_boost)
+-+			? CPR4_MARGIN_ADJ_CTL_HW_CLOSED_LOOP_ENABLE : 0);
+-+	}
+-+
+-+	if (!sdelta->allow_core_count_adj && !sdelta->allow_temp_adj
+-+		&& !sdelta->allow_boost) {
+-+		/*
+-+		 * Per-online-core, per-temperature and voltage boost
+-+		 * adjustments are disabled for this aggregation corner.
+-+		 */
+-+		return 0;
+-+	}
+-+
+-+	/* Ensure that CPR clocks are enabled before writing to registers. */
+-+	if (!cpr_enabled) {
+-+		rc = cpr3_clock_enable(ctrl);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "clock enable failed, rc=%d\n", rc);
+-+			return rc;
+-+		}
+-+		ctrl->cpr_enabled = true;
+-+	}
+-+
+-+	max_core_count = sdelta->max_core_count;
+-+
+-+	if (sdelta->allow_core_count_adj || sdelta->allow_temp_adj) {
+-+		if (sdelta->allow_core_count_adj) {
+-+			/* Program TEMP_CORE0 to same margins as TEMP_CORE1 */
+-+			cpr3_write_temp_core_margin(ctrl,
+-+				CPR4_REG_MARGIN_TEMP_CORE(0),
+-+				&sdelta->table[0]);
+-+		}
+-+
+-+		for (i = 0; i < max_core_count; i++) {
+-+			index = i * sdelta->temp_band_count;
+-+			/*
+-+			 * Program TEMP_COREi with voltage margin adjustments
+-+			 * that need to be applied when the number of cores
+-+			 * becomes i.
+-+			 */
+-+			cpr3_write_temp_core_margin(ctrl,
+-+				CPR4_REG_MARGIN_TEMP_CORE(
+-+						sdelta->allow_core_count_adj
+-+						? i + 1 : max_core_count),
+-+						&sdelta->table[index]);
+-+		}
+-+	}
+-+
+-+	if (sdelta->allow_boost) {
+-+		/* Program only boost_num_cores row of SDELTA */
+-+		cpr3_write_temp_core_margin(ctrl,
+-+			CPR4_REG_MARGIN_TEMP_CORE(sdelta->boost_num_cores),
+-+					&sdelta->boost_table[0]);
+-+	}
+-+
+-+	if (!sdelta->allow_core_count_adj && !sdelta->allow_boost) {
+-+		cpr3_masked_write(ctrl, CPR4_REG_MISC,
+-+			CPR4_MISC_MARGIN_TABLE_ROW_SELECT_MASK,
+-+			max_core_count
+-+			<< CPR4_MISC_MARGIN_TABLE_ROW_SELECT_SHIFT);
+-+	}
+-+
+-+	cpr3_masked_write(ctrl, CPR4_REG_MARGIN_ADJ_CTL,
+-+		CPR4_MARGIN_ADJ_CTL_MAX_NUM_CORES_MASK
+-+		| CPR4_MARGIN_ADJ_CTL_CORE_ADJ_EN
+-+		| CPR4_MARGIN_ADJ_CTL_TEMP_ADJ_EN
+-+		| CPR4_MARGIN_ADJ_CTL_KV_MARGIN_ADJ_EN
+-+		| CPR4_MARGIN_ADJ_CTL_BOOST_EN,
+-+		max_core_count << CPR4_MARGIN_ADJ_CTL_MAX_NUM_CORES_SHIFT
+-+		| ((sdelta->allow_core_count_adj || sdelta->allow_boost)
+-+			? CPR4_MARGIN_ADJ_CTL_CORE_ADJ_EN : 0)
+-+		| ((sdelta->allow_temp_adj && ctrl->supports_hw_closed_loop)
+-+			? CPR4_MARGIN_ADJ_CTL_TEMP_ADJ_EN : 0)
+-+		| (((ctrl->use_hw_closed_loop && !sdelta->allow_boost)
+-+		    || !ctrl->supports_hw_closed_loop)
+-+			? CPR4_MARGIN_ADJ_CTL_KV_MARGIN_ADJ_EN : 0)
+-+		| (sdelta->allow_boost
+-+			?  CPR4_MARGIN_ADJ_CTL_BOOST_EN : 0));
+-+
+-+	/*
+-+	 * Ensure that all previous CPR register writes have completed before
+-+	 * continuing.
+-+	 */
+-+	mb();
+-+
+-+	/* Turn off CPR clocks if they were off before this function call. */
+-+	if (!cpr_enabled) {
+-+		cpr3_clock_disable(ctrl);
+-+		ctrl->cpr_enabled = false;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_init_ctrl() - performs hardware initialization of CPR
+-+ *		controller registers
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_regulator_init_ctrl(struct cpr3_controller *ctrl)
+-+{
+-+	int i, j, k, m, rc;
+-+	u32 ro_used = 0;
+-+	u32 gcnt, cont_dly, up_down_dly, val;
+-+	u64 temp;
+-+	char *mode;
+-+
+-+	if (ctrl->core_clk) {
+-+		rc = clk_set_rate(ctrl->core_clk, ctrl->cpr_clock_rate);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "clk_set_rate(core_clk, %u) failed, rc=%d\n",
+-+				ctrl->cpr_clock_rate, rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	rc = cpr3_clock_enable(ctrl);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "clock enable failed, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+	ctrl->cpr_enabled = true;
+-+
+-+	/* Find all RO's used by any corner of any regulator. */
+-+	for (i = 0; i < ctrl->thread_count; i++)
+-+		for (j = 0; j < ctrl->thread[i].vreg_count; j++)
+-+			for (k = 0; k < ctrl->thread[i].vreg[j].corner_count;
+-+			     k++)
+-+				for (m = 0; m < CPR3_RO_COUNT; m++)
+-+					if (ctrl->thread[i].vreg[j].corner[k].
+-+					    target_quot[m])
+-+						ro_used |= BIT(m);
+-+
+-+	/* Configure the GCNT of the RO's that will be used */
+-+	gcnt = cpr3_regulator_get_gcnt(ctrl);
+-+	for (i = 0; i < CPR3_RO_COUNT; i++)
+-+		if (ro_used & BIT(i))
+-+			cpr3_write(ctrl, CPR3_REG_GCNT(i), gcnt);
+-+
+-+	/* Configure the loop delay time */
+-+	temp = (u64)ctrl->cpr_clock_rate * (u64)ctrl->loop_time;
+-+	do_div(temp, 1000000000);
+-+	cont_dly = temp;
+-+	if (ctrl->supports_hw_closed_loop
+-+		&& ctrl->ctrl_type == CPR_CTRL_TYPE_CPR3)
+-+		cpr3_write(ctrl, CPR3_REG_CPR_TIMER_MID_CONT, cont_dly);
+-+	else
+-+		cpr3_write(ctrl, CPR3_REG_CPR_TIMER_AUTO_CONT, cont_dly);
+-+
+-+	if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR3) {
+-+		temp = (u64)ctrl->cpr_clock_rate *
+-+				(u64)ctrl->up_down_delay_time;
+-+		do_div(temp, 1000000000);
+-+		up_down_dly = temp;
+-+		if (ctrl->supports_hw_closed_loop)
+-+			cpr3_write(ctrl, CPR3_REG_CPR_TIMER_UP_DN_CONT,
+-+				up_down_dly);
+-+		cpr3_debug(ctrl, "up_down_dly=%u, up_down_delay_time=%u ns\n",
+-+			up_down_dly, ctrl->up_down_delay_time);
+-+	}
+-+
+-+	cpr3_debug(ctrl, "cpr_clock_rate=%u HZ, sensor_time=%u ns, loop_time=%u ns, gcnt=%u, cont_dly=%u\n",
+-+		ctrl->cpr_clock_rate, ctrl->sensor_time, ctrl->loop_time,
+-+		gcnt, cont_dly);
+-+
+-+	/* Configure CPR sensor operation */
+-+	val = (ctrl->idle_clocks << CPR3_CPR_CTL_IDLE_CLOCKS_SHIFT)
+-+		& CPR3_CPR_CTL_IDLE_CLOCKS_MASK;
+-+	val |= (ctrl->count_mode << CPR3_CPR_CTL_COUNT_MODE_SHIFT)
+-+		& CPR3_CPR_CTL_COUNT_MODE_MASK;
+-+	val |= (ctrl->count_repeat << CPR3_CPR_CTL_COUNT_REPEAT_SHIFT)
+-+		& CPR3_CPR_CTL_COUNT_REPEAT_MASK;
+-+	cpr3_write(ctrl, CPR3_REG_CPR_CTL, val);
+-+
+-+	cpr3_debug(ctrl, "idle_clocks=%u, count_mode=%u, count_repeat=%u; CPR_CTL=0x%08X\n",
+-+		ctrl->idle_clocks, ctrl->count_mode, ctrl->count_repeat, val);
+-+
+-+	/* Configure CPR default step quotients */
+-+	val = (ctrl->step_quot_init_min << CPR3_CPR_STEP_QUOT_MIN_SHIFT)
+-+		& CPR3_CPR_STEP_QUOT_MIN_MASK;
+-+	val |= (ctrl->step_quot_init_max << CPR3_CPR_STEP_QUOT_MAX_SHIFT)
+-+		& CPR3_CPR_STEP_QUOT_MAX_MASK;
+-+	cpr3_write(ctrl, CPR3_REG_CPR_STEP_QUOT, val);
+-+
+-+	cpr3_debug(ctrl, "step_quot_min=%u, step_quot_max=%u; STEP_QUOT=0x%08X\n",
+-+		ctrl->step_quot_init_min, ctrl->step_quot_init_max, val);
+-+
+-+	/* Configure the CPR sensor ownership */
+-+	for (i = 0; i < ctrl->sensor_count; i++)
+-+		cpr3_write(ctrl, CPR3_REG_SENSOR_OWNER(i),
+-+			   ctrl->sensor_owner[i]);
+-+
+-+	/* Configure per-thread registers */
+-+	for (i = 0; i < ctrl->thread_count; i++) {
+-+		rc = cpr3_regulator_init_thread(&ctrl->thread[i]);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "CPR thread register initialization failed, rc=%d\n",
+-+				rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	if (ctrl->supports_hw_closed_loop) {
+-+		if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4) {
+-+			cpr3_masked_write(ctrl, CPR4_REG_MARGIN_ADJ_CTL,
+-+				CPR4_MARGIN_ADJ_CTL_HW_CLOSED_LOOP_EN_MASK,
+-+				ctrl->use_hw_closed_loop
+-+				? CPR4_MARGIN_ADJ_CTL_HW_CLOSED_LOOP_ENABLE
+-+				: CPR4_MARGIN_ADJ_CTL_HW_CLOSED_LOOP_DISABLE);
+-+		} else if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR3) {
+-+			cpr3_write(ctrl, CPR3_REG_HW_CLOSED_LOOP,
+-+				ctrl->use_hw_closed_loop
+-+				? CPR3_HW_CLOSED_LOOP_ENABLE
+-+				: CPR3_HW_CLOSED_LOOP_DISABLE);
+-+
+-+			cpr3_debug(ctrl, "PD_THROTTLE=0x%08X\n",
+-+				ctrl->proc_clock_throttle);
+-+		}
+-+
+-+		if ((ctrl->use_hw_closed_loop ||
+-+		     ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4) &&
+-+		    ctrl->vdd_limit_regulator) {
+-+			rc = regulator_enable(ctrl->vdd_limit_regulator);
+-+			if (rc) {
+-+				cpr3_err(ctrl, "CPR limit regulator enable failed, rc=%d\n",
+-+					rc);
+-+				return rc;
+-+			}
+-+		}
+-+	}
+-+
+-+	if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4) {
+-+		rc = cpr3_regulator_init_cpr4(ctrl);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "CPR4-specific controller initialization failed, rc=%d\n",
+-+				rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	/* Ensure that all register writes complete before disabling clocks. */
+-+	wmb();
+-+
+-+	cpr3_clock_disable(ctrl);
+-+	ctrl->cpr_enabled = false;
+-+
+-+	if (!ctrl->cpr_allowed_sw || !ctrl->cpr_allowed_hw)
+-+		mode = "open-loop";
+-+	else if (ctrl->supports_hw_closed_loop)
+-+		mode = ctrl->use_hw_closed_loop
+-+			? "HW closed-loop" : "SW closed-loop";
+-+	else
+-+		mode = "closed-loop";
+-+
+-+	cpr3_info(ctrl, "Default CPR mode = %s", mode);
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_set_target_quot() - configure the target quotient for each
+-+ *		RO of the CPR3 thread and set the RO mask
+-+ * @thread:		Pointer to the CPR3 thread
+-+ *
+-+ * Return: none
+-+ */
+-+static void cpr3_regulator_set_target_quot(struct cpr3_thread *thread)
+-+{
+-+	u32 new_quot, last_quot;
+-+	int i;
+-+
+-+	if (thread->aggr_corner.ro_mask == CPR3_RO_MASK
+-+	    && thread->last_closed_loop_aggr_corner.ro_mask == CPR3_RO_MASK) {
+-+		/* Avoid writing target quotients since all RO's are masked. */
+-+		return;
+-+	} else if (thread->aggr_corner.ro_mask == CPR3_RO_MASK) {
+-+		cpr3_write(thread->ctrl, CPR3_REG_RO_MASK(thread->thread_id),
+-+			CPR3_RO_MASK);
+-+		thread->last_closed_loop_aggr_corner.ro_mask = CPR3_RO_MASK;
+-+		/*
+-+		 * Only the RO_MASK register needs to be written since all
+-+		 * RO's are masked.
+-+		 */
+-+		return;
+-+	} else if (thread->aggr_corner.ro_mask
+-+			!= thread->last_closed_loop_aggr_corner.ro_mask) {
+-+		cpr3_write(thread->ctrl, CPR3_REG_RO_MASK(thread->thread_id),
+-+			thread->aggr_corner.ro_mask);
+-+	}
+-+
+-+	for (i = 0; i < CPR3_RO_COUNT; i++) {
+-+		new_quot = thread->aggr_corner.target_quot[i];
+-+		last_quot = thread->last_closed_loop_aggr_corner.target_quot[i];
+-+		if (new_quot != last_quot)
+-+			cpr3_write(thread->ctrl,
+-+				CPR3_REG_TARGET_QUOT(thread->thread_id, i),
+-+				new_quot);
+-+	}
+-+
+-+	thread->last_closed_loop_aggr_corner = thread->aggr_corner;
+-+
+-+	return;
+-+}
+-+
+-+/**
+-+ * cpr3_update_vreg_closed_loop_volt() - update the last known settled
+-+ *		closed loop voltage for a CPR3 regulator
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @vdd_volt:		Last known settled voltage in microvolts for the
+-+ *			VDD supply
+-+ * @reg_last_measurement: Value read from the LAST_MEASUREMENT register
+-+ *
+-+ * Return: none
+-+ */
+-+static void cpr3_update_vreg_closed_loop_volt(struct cpr3_regulator *vreg,
+-+				int vdd_volt, u32 reg_last_measurement)
+-+{
+-+	bool step_dn, step_up, aggr_step_up, aggr_step_dn, aggr_step_mid;
+-+	bool valid, pd_valid, saw_error;
+-+	struct cpr3_controller *ctrl = vreg->thread->ctrl;
+-+	struct cpr3_corner *corner;
+-+	u32 id;
+-+
+-+	if (vreg->last_closed_loop_corner == CPR3_REGULATOR_CORNER_INVALID)
+-+		return;
+-+	else
+-+		corner = &vreg->corner[vreg->last_closed_loop_corner];
+-+
+-+	if (vreg->thread->last_closed_loop_aggr_corner.ro_mask
+-+	    == CPR3_RO_MASK  || !vreg->aggregated) {
+-+		return;
+-+	} else if (!ctrl->cpr_enabled || !ctrl->last_corner_was_closed_loop) {
+-+		return;
+-+	} else if (ctrl->thread_count == 1
+-+		 && vdd_volt >= corner->floor_volt
+-+		 && vdd_volt <= corner->ceiling_volt) {
+-+		corner->last_volt = vdd_volt;
+-+		cpr3_debug(vreg, "last_volt updated: last_volt[%d]=%d, ceiling_volt[%d]=%d, floor_volt[%d]=%d\n",
+-+			   vreg->last_closed_loop_corner, corner->last_volt,
+-+			   vreg->last_closed_loop_corner,
+-+			   corner->ceiling_volt,
+-+			   vreg->last_closed_loop_corner,
+-+			   corner->floor_volt);
+-+		return;
+-+	} else if (!ctrl->supports_hw_closed_loop) {
+-+		return;
+-+	} else if (ctrl->ctrl_type != CPR_CTRL_TYPE_CPR3) {
+-+		corner->last_volt = vdd_volt;
+-+		cpr3_debug(vreg, "last_volt updated: last_volt[%d]=%d, ceiling_volt[%d]=%d, floor_volt[%d]=%d\n",
+-+			   vreg->last_closed_loop_corner, corner->last_volt,
+-+			   vreg->last_closed_loop_corner,
+-+			   corner->ceiling_volt,
+-+			   vreg->last_closed_loop_corner,
+-+			   corner->floor_volt);
+-+		return;
+-+	}
+-+
+-+	/* CPR clocks are on and HW closed loop is supported */
+-+	valid = !!(reg_last_measurement & CPR3_LAST_MEASUREMENT_VALID);
+-+	if (!valid) {
+-+		cpr3_debug(vreg, "CPR_LAST_VALID_MEASUREMENT=0x%X valid bit not set\n",
+-+			   reg_last_measurement);
+-+		return;
+-+	}
+-+
+-+	id = vreg->thread->thread_id;
+-+
+-+	step_dn
+-+	       = !!(reg_last_measurement & CPR3_LAST_MEASUREMENT_THREAD_DN(id));
+-+	step_up
+-+	       = !!(reg_last_measurement & CPR3_LAST_MEASUREMENT_THREAD_UP(id));
+-+	aggr_step_dn = !!(reg_last_measurement & CPR3_LAST_MEASUREMENT_AGGR_DN);
+-+	aggr_step_mid
+-+		= !!(reg_last_measurement & CPR3_LAST_MEASUREMENT_AGGR_MID);
+-+	aggr_step_up = !!(reg_last_measurement & CPR3_LAST_MEASUREMENT_AGGR_UP);
+-+	saw_error = !!(reg_last_measurement & CPR3_LAST_MEASUREMENT_SAW_ERROR);
+-+	pd_valid
+-+	     = !((((reg_last_measurement & CPR3_LAST_MEASUREMENT_PD_BYPASS_MASK)
+-+		       >> CPR3_LAST_MEASUREMENT_PD_BYPASS_SHIFT)
+-+		      & vreg->pd_bypass_mask) == vreg->pd_bypass_mask);
+-+
+-+	if (!pd_valid) {
+-+		cpr3_debug(vreg, "CPR_LAST_VALID_MEASUREMENT=0x%X, all power domains bypassed\n",
+-+			   reg_last_measurement);
+-+		return;
+-+	} else if (step_dn && step_up) {
+-+		cpr3_err(vreg, "both up and down status bits set, CPR_LAST_VALID_MEASUREMENT=0x%X\n",
+-+			 reg_last_measurement);
+-+		return;
+-+	} else if (aggr_step_dn && step_dn && vdd_volt < corner->last_volt
+-+		   && vdd_volt >= corner->floor_volt) {
+-+		corner->last_volt = vdd_volt;
+-+	} else if (aggr_step_up && step_up && vdd_volt > corner->last_volt
+-+		   && vdd_volt <= corner->ceiling_volt) {
+-+		corner->last_volt = vdd_volt;
+-+	} else if (aggr_step_mid
+-+		   && vdd_volt >= corner->floor_volt
+-+		   && vdd_volt <= corner->ceiling_volt) {
+-+		corner->last_volt = vdd_volt;
+-+	} else if (saw_error && (vdd_volt == corner->ceiling_volt
+-+				 || vdd_volt == corner->floor_volt)) {
+-+		corner->last_volt = vdd_volt;
+-+	} else {
+-+		cpr3_debug(vreg, "last_volt not updated: last_volt[%d]=%d, ceiling_volt[%d]=%d, floor_volt[%d]=%d, vdd_volt=%d, CPR_LAST_VALID_MEASUREMENT=0x%X\n",
+-+			   vreg->last_closed_loop_corner, corner->last_volt,
+-+			   vreg->last_closed_loop_corner,
+-+			   corner->ceiling_volt,
+-+			   vreg->last_closed_loop_corner, corner->floor_volt,
+-+			   vdd_volt, reg_last_measurement);
+-+		return;
+-+	}
+-+
+-+	cpr3_debug(vreg, "last_volt updated: last_volt[%d]=%d, ceiling_volt[%d]=%d, floor_volt[%d]=%d, CPR_LAST_VALID_MEASUREMENT=0x%X\n",
+-+		   vreg->last_closed_loop_corner, corner->last_volt,
+-+		   vreg->last_closed_loop_corner, corner->ceiling_volt,
+-+		   vreg->last_closed_loop_corner, corner->floor_volt,
+-+		   reg_last_measurement);
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_mem_acc_bhs_used() - determines if mem-acc regulators powered
+-+ *		through a BHS are associated with the CPR3 controller or any of
+-+ *		the CPR3 regulators it controls.
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * This function determines if the CPR3 controller or any of its CPR3 regulators
+-+ * need to manage mem-acc regulators that are currently powered through a BHS
+-+ * and whose corner selection is based upon a particular voltage threshold.
+-+ *
+-+ * Return: true or false
+-+ */
+-+static bool cpr3_regulator_mem_acc_bhs_used(struct cpr3_controller *ctrl)
+-+{
+-+	struct cpr3_regulator *vreg;
+-+	int i, j;
+-+
+-+	if (!ctrl->mem_acc_threshold_volt)
+-+		return false;
+-+
+-+	if (ctrl->mem_acc_regulator)
+-+		return true;
+-+
+-+	for (i = 0; i < ctrl->thread_count; i++) {
+-+		for (j = 0; j < ctrl->thread[i].vreg_count; j++) {
+-+			vreg = &ctrl->thread[i].vreg[j];
+-+
+-+			if (vreg->mem_acc_regulator)
+-+				return true;
+-+		}
+-+	}
+-+
+-+	return false;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_config_bhs_mem_acc() - configure the mem-acc regulator
+-+ *		settings for hardware blocks currently powered through the BHS.
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ * @new_volt:		New voltage in microvolts that VDD supply needs to
+-+ *			end up at
+-+ * @last_volt:		Pointer to the last known voltage in microvolts for the
+-+ *			VDD supply
+-+ * @aggr_corner:	Pointer to the CPR3 corner which corresponds to the max
+-+ *			corner aggregated from all CPR3 threads managed by the
+-+ *			CPR3 controller
+-+ *
+-+ * This function programs the mem-acc regulator corners for CPR3 regulators
+-+ * whose LDO regulators are in bypassed state. The function also handles
+-+ * CPR3 controllers which utilize mem-acc regulators that operate independently
+-+ * from the LDO hardware and that must be programmed when the VDD supply
+-+ * crosses a particular voltage threshold.
+-+ *
+-+ * Return: 0 on success, errno on failure. If the VDD supply voltage is
+-+ * modified, last_volt is updated to reflect the new voltage setpoint.
+-+ */
+-+static int cpr3_regulator_config_bhs_mem_acc(struct cpr3_controller *ctrl,
+-+				     int new_volt, int *last_volt,
+-+				     struct cpr3_corner *aggr_corner)
+-+{
+-+	struct cpr3_regulator *vreg;
+-+	int i, j, rc, mem_acc_corn, safe_volt;
+-+	int mem_acc_volt = ctrl->mem_acc_threshold_volt;
+-+	int ref_volt;
+-+
+-+	if (!cpr3_regulator_mem_acc_bhs_used(ctrl))
+-+		return 0;
+-+
+-+	ref_volt = ctrl->use_hw_closed_loop ? aggr_corner->floor_volt :
+-+		new_volt;
+-+
+-+	if (((*last_volt < mem_acc_volt && mem_acc_volt <= ref_volt) ||
+-+	     (*last_volt >= mem_acc_volt && mem_acc_volt > ref_volt))) {
+-+		if (ref_volt < *last_volt)
+-+			safe_volt = max(mem_acc_volt, aggr_corner->last_volt);
+-+		else
+-+			safe_volt = max(mem_acc_volt, *last_volt);
+-+
+-+		rc = regulator_set_voltage(ctrl->vdd_regulator, safe_volt,
+-+					   new_volt < *last_volt ?
+-+					   ctrl->aggr_corner.ceiling_volt :
+-+					   new_volt);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "regulator_set_voltage(vdd) == %d failed, rc=%d\n",
+-+				 safe_volt, rc);
+-+			return rc;
+-+		}
+-+
+-+		*last_volt = safe_volt;
+-+
+-+		mem_acc_corn = ref_volt < mem_acc_volt ?
+-+			ctrl->mem_acc_corner_map[CPR3_MEM_ACC_LOW_CORNER] :
+-+			ctrl->mem_acc_corner_map[CPR3_MEM_ACC_HIGH_CORNER];
+-+
+-+		if (ctrl->mem_acc_regulator) {
+-+			rc = regulator_set_voltage(ctrl->mem_acc_regulator,
+-+						   mem_acc_corn, mem_acc_corn);
+-+			if (rc) {
+-+				cpr3_err(ctrl, "regulator_set_voltage(mem_acc) == %d failed, rc=%d\n",
+-+					 mem_acc_corn, rc);
+-+				return rc;
+-+			}
+-+		}
+-+
+-+		for (i = 0; i < ctrl->thread_count; i++) {
+-+			for (j = 0; j < ctrl->thread[i].vreg_count; j++) {
+-+				vreg = &ctrl->thread[i].vreg[j];
+-+
+-+				if (!vreg->mem_acc_regulator)
+-+					continue;
+-+
+-+				rc = regulator_set_voltage(
+-+					vreg->mem_acc_regulator, mem_acc_corn,
+-+					mem_acc_corn);
+-+				if (rc) {
+-+					cpr3_err(vreg, "regulator_set_voltage(mem_acc) == %d failed, rc=%d\n",
+-+						 mem_acc_corn, rc);
+-+					return rc;
+-+				}
+-+			}
+-+		}
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_switch_apm_mode() - switch the mode of the APM controller
+-+ *		associated with a given CPR3 controller
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ * @new_volt:		New voltage in microvolts that VDD supply needs to
+-+ *			end up at
+-+ * @last_volt:		Pointer to the last known voltage in microvolts for the
+-+ *			VDD supply
+-+ * @aggr_corner:	Pointer to the CPR3 corner which corresponds to the max
+-+ *			corner aggregated from all CPR3 threads managed by the
+-+ *			CPR3 controller
+-+ *
+-+ * This function requests a switch of the APM mode while guaranteeing
+-+ * any LDO regulator hardware requirements are satisfied. The function must
+-+ * be called once it is known a new VDD supply setpoint crosses the APM
+-+ * voltage threshold.
+-+ *
+-+ * Return: 0 on success, errno on failure. If the VDD supply voltage is
+-+ * modified, last_volt is updated to reflect the new voltage setpoint.
+-+ */
+-+static int cpr3_regulator_switch_apm_mode(struct cpr3_controller *ctrl,
+-+					  int new_volt, int *last_volt,
+-+					  struct cpr3_corner *aggr_corner)
+-+{
+-+	struct regulator *vdd = ctrl->vdd_regulator;
+-+	int apm_volt = ctrl->apm_threshold_volt;
+-+	int orig_last_volt = *last_volt;
+-+	int rc;
+-+
+-+	rc = regulator_set_voltage(vdd, apm_volt, apm_volt);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "regulator_set_voltage(vdd) == %d failed, rc=%d\n",
+-+			 apm_volt, rc);
+-+		return rc;
+-+	}
+-+
+-+	*last_volt = apm_volt;
+-+
+-+	rc = msm_apm_set_supply(ctrl->apm, new_volt >= apm_volt
+-+				? ctrl->apm_high_supply : ctrl->apm_low_supply);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "APM switch failed, rc=%d\n", rc);
+-+		/* Roll back the voltage. */
+-+		regulator_set_voltage(vdd, orig_last_volt, INT_MAX);
+-+		*last_volt = orig_last_volt;
+-+		return rc;
+-+	}
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_config_voltage_crossings() - configure APM and mem-acc
+-+ *		settings depending upon a new VDD supply setpoint
+-+ *
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ * @new_volt:		New voltage in microvolts that VDD supply needs to
+-+ *			end up at
+-+ * @last_volt:		Pointer to the last known voltage in microvolts for the
+-+ *			VDD supply
+-+ * @aggr_corner:	Pointer to the CPR3 corner which corresponds to the max
+-+ *			corner aggregated from all CPR3 threads managed by the
+-+ *			CPR3 controller
+-+ *
+-+ * This function handles the APM and mem-acc regulator reconfiguration if
+-+ * the new VDD supply voltage will result in crossing their respective voltage
+-+ * thresholds.
+-+ *
+-+ * Return: 0 on success, errno on failure. If the VDD supply voltage is
+-+ * modified, last_volt is updated to reflect the new voltage setpoint.
+-+ */
+-+static int cpr3_regulator_config_voltage_crossings(struct cpr3_controller *ctrl,
+-+				   int new_volt, int *last_volt,
+-+				   struct cpr3_corner *aggr_corner)
+-+{
+-+	bool apm_crossing = false, mem_acc_crossing = false;
+-+	bool mem_acc_bhs_used;
+-+	int apm_volt = ctrl->apm_threshold_volt;
+-+	int mem_acc_volt = ctrl->mem_acc_threshold_volt;
+-+	int ref_volt, rc;
+-+
+-+	if (ctrl->apm && apm_volt > 0
+-+	    && ((*last_volt < apm_volt && apm_volt <= new_volt)
+-+		|| (*last_volt >= apm_volt && apm_volt > new_volt)))
+-+		apm_crossing = true;
+-+
+-+	mem_acc_bhs_used = cpr3_regulator_mem_acc_bhs_used(ctrl);
+-+
+-+	ref_volt = ctrl->use_hw_closed_loop ? aggr_corner->floor_volt :
+-+		new_volt;
+-+
+-+	if (mem_acc_bhs_used &&
+-+	    (((*last_volt < mem_acc_volt && mem_acc_volt <= ref_volt) ||
+-+	      (*last_volt >= mem_acc_volt && mem_acc_volt > ref_volt))))
+-+		mem_acc_crossing = true;
+-+
+-+	if (apm_crossing && mem_acc_crossing) {
+-+		if ((new_volt < *last_volt && apm_volt >= mem_acc_volt) ||
+-+		    (new_volt >= *last_volt && apm_volt < mem_acc_volt)) {
+-+			rc = cpr3_regulator_switch_apm_mode(ctrl, new_volt,
+-+							    last_volt,
+-+							    aggr_corner);
+-+			if (rc) {
+-+				cpr3_err(ctrl, "unable to switch APM mode\n");
+-+				return rc;
+-+			}
+-+
+-+			rc = cpr3_regulator_config_bhs_mem_acc(ctrl, new_volt,
+-+						       last_volt, aggr_corner);
+-+			if (rc) {
+-+				cpr3_err(ctrl, "unable to configure BHS mem-acc settings\n");
+-+				return rc;
+-+			}
+-+		} else {
+-+			rc = cpr3_regulator_config_bhs_mem_acc(ctrl, new_volt,
+-+						       last_volt, aggr_corner);
+-+			if (rc) {
+-+				cpr3_err(ctrl, "unable to configure BHS mem-acc settings\n");
+-+				return rc;
+-+			}
+-+
+-+			rc = cpr3_regulator_switch_apm_mode(ctrl, new_volt,
+-+							    last_volt,
+-+							    aggr_corner);
+-+			if (rc) {
+-+				cpr3_err(ctrl, "unable to switch APM mode\n");
+-+				return rc;
+-+			}
+-+		}
+-+	} else if (apm_crossing) {
+-+		rc = cpr3_regulator_switch_apm_mode(ctrl, new_volt, last_volt,
+-+						    aggr_corner);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "unable to switch APM mode\n");
+-+			return rc;
+-+		}
+-+	} else if (mem_acc_crossing) {
+-+		rc = cpr3_regulator_config_bhs_mem_acc(ctrl, new_volt,
+-+						       last_volt, aggr_corner);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "unable to configure BHS mem-acc settings\n");
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_config_mem_acc() - configure the corner of the mem-acc
+-+ *			regulator associated with the CPR3 controller
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ * @aggr_corner:	Pointer to the CPR3 corner which corresponds to the max
+-+ *			corner aggregated from all CPR3 threads managed by the
+-+ *			CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_regulator_config_mem_acc(struct cpr3_controller *ctrl,
+-+					 struct cpr3_corner *aggr_corner)
+-+{
+-+	int rc;
+-+
+-+	if (ctrl->mem_acc_regulator && aggr_corner->mem_acc_volt) {
+-+		rc = regulator_set_voltage(ctrl->mem_acc_regulator,
+-+					   aggr_corner->mem_acc_volt,
+-+					   aggr_corner->mem_acc_volt);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "regulator_set_voltage(mem_acc) == %d failed, rc=%d\n",
+-+				 aggr_corner->mem_acc_volt, rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_scale_vdd_voltage() - scale the CPR controlled VDD supply
+-+ *		voltage to the new level while satisfying any other hardware
+-+ *		requirements
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ * @new_volt:		New voltage in microvolts that VDD supply needs to end
+-+ *			up at
+-+ * @last_volt:		Last known voltage in microvolts for the VDD supply
+-+ * @aggr_corner:	Pointer to the CPR3 corner which corresponds to the max
+-+ *			corner aggregated from all CPR3 threads managed by the
+-+ *			CPR3 controller
+-+ *
+-+ * This function scales the CPR controlled VDD supply voltage from its
+-+ * current level to the new voltage that is specified.  If the supply is
+-+ * configured to use the APM and the APM threshold is crossed as a result of
+-+ * the voltage scaling, then this function also stops at the APM threshold,
+-+ * switches the APM source, and finally sets the final new voltage.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_regulator_scale_vdd_voltage(struct cpr3_controller *ctrl,
+-+				int new_volt, int last_volt,
+-+				struct cpr3_corner *aggr_corner)
+-+{
+-+	struct regulator *vdd = ctrl->vdd_regulator;
+-+	int rc;
+-+
+-+	if (new_volt < last_volt) {
+-+			rc = cpr3_regulator_config_mem_acc(ctrl, aggr_corner);
+-+			if (rc)
+-+				return rc;
+-+	} else {
+-+		/* Increasing VDD voltage */
+-+		if (ctrl->system_regulator) {
+-+			rc = regulator_set_voltage(ctrl->system_regulator,
+-+				aggr_corner->system_volt, INT_MAX);
+-+			if (rc) {
+-+				cpr3_err(ctrl, "regulator_set_voltage(system) == %d failed, rc=%d\n",
+-+					aggr_corner->system_volt, rc);
+-+				return rc;
+-+			}
+-+		}
+-+	}
+-+
+-+	rc = cpr3_regulator_config_voltage_crossings(ctrl, new_volt, &last_volt,
+-+						     aggr_corner);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "unable to handle voltage threshold crossing configurations, rc=%d\n",
+-+			 rc);
+-+		return rc;
+-+	}
+-+
+-+	/*
+-+	 * Subtract a small amount from the min_uV parameter so that the
+-+	 * set voltage request is not dropped by the framework due to being
+-+	 * duplicate.  This is needed in order to switch from hardware
+-+	 * closed-loop to open-loop successfully.
+-+	 */
+-+	rc = regulator_set_voltage(vdd, new_volt - (ctrl->cpr_enabled ? 0 : 1),
+-+				   aggr_corner->ceiling_volt);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "regulator_set_voltage(vdd) == %d failed, rc=%d\n",
+-+			new_volt, rc);
+-+		return rc;
+-+	}
+-+
+-+	if (new_volt == last_volt && ctrl->supports_hw_closed_loop
+-+	    && ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4) {
+-+		/*
+-+		 * CPR4 features enforce voltage reprogramming when the last
+-+		 * set voltage and new set voltage are same. This way, we can
+-+		 * ensure that SAW PMIC STATUS register is updated with newly
+-+		 * programmed voltage.
+-+		 */
+-+		rc = regulator_sync_voltage(vdd);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "regulator_sync_voltage(vdd) == %d failed, rc=%d\n",
+-+				new_volt, rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	if (new_volt >= last_volt) {
+-+		rc = cpr3_regulator_config_mem_acc(ctrl, aggr_corner);
+-+		if (rc)
+-+			return rc;
+-+	} else {
+-+		/* Decreasing VDD voltage */
+-+		if (ctrl->system_regulator) {
+-+			rc = regulator_set_voltage(ctrl->system_regulator,
+-+				aggr_corner->system_volt, INT_MAX);
+-+			if (rc) {
+-+				cpr3_err(ctrl, "regulator_set_voltage(system) == %d failed, rc=%d\n",
+-+					aggr_corner->system_volt, rc);
+-+				return rc;
+-+			}
+-+		}
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_get_dynamic_floor_volt() - returns the current dynamic floor
+-+ *		voltage based upon static configurations and the state of all
+-+ *		power domains during the last CPR measurement
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ * @reg_last_measurement: Value read from the LAST_MEASUREMENT register
+-+ *
+-+ * When using HW closed-loop, the dynamic floor voltage is always returned
+-+ * regardless of the current state of the power domains.
+-+ *
+-+ * Return: dynamic floor voltage in microvolts or 0 if dynamic floor is not
+-+ *         currently required
+-+ */
+-+static int cpr3_regulator_get_dynamic_floor_volt(struct cpr3_controller *ctrl,
+-+		u32 reg_last_measurement)
+-+{
+-+	int dynamic_floor_volt = 0;
+-+	struct cpr3_regulator *vreg;
+-+	bool valid, pd_valid;
+-+	u32 bypass_bits;
+-+	int i, j;
+-+
+-+	if (!ctrl->supports_hw_closed_loop)
+-+		return 0;
+-+
+-+	if (likely(!ctrl->use_hw_closed_loop)) {
+-+		valid = !!(reg_last_measurement & CPR3_LAST_MEASUREMENT_VALID);
+-+		bypass_bits
+-+		 = (reg_last_measurement & CPR3_LAST_MEASUREMENT_PD_BYPASS_MASK)
+-+			>> CPR3_LAST_MEASUREMENT_PD_BYPASS_SHIFT;
+-+	} else {
+-+		/*
+-+		 * Ensure that the dynamic floor voltage is always used for
+-+		 * HW closed-loop since the conditions below cannot be evaluated
+-+		 * after each CPR measurement.
+-+		 */
+-+		valid = false;
+-+		bypass_bits = 0;
+-+	}
+-+
+-+	for (i = 0; i < ctrl->thread_count; i++) {
+-+		for (j = 0; j < ctrl->thread[i].vreg_count; j++) {
+-+			vreg = &ctrl->thread[i].vreg[j];
+-+
+-+			if (!vreg->uses_dynamic_floor)
+-+				continue;
+-+
+-+			pd_valid = !((bypass_bits & vreg->pd_bypass_mask)
+-+					== vreg->pd_bypass_mask);
+-+
+-+			if (!valid || !pd_valid)
+-+				dynamic_floor_volt = max(dynamic_floor_volt,
+-+					vreg->corner[
+-+					 vreg->dynamic_floor_corner].last_volt);
+-+		}
+-+	}
+-+
+-+	return dynamic_floor_volt;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_max_sdelta_diff() - returns the maximum voltage difference in
+-+ *		microvolts that can result from different operating conditions
+-+ *		for the specified sdelta struct
+-+ * @sdelta:		Pointer to the sdelta structure
+-+ * @step_volt:		Step size in microvolts between available set
+-+ *			points of the VDD supply.
+-+ *
+-+ * Return: voltage difference between the highest and lowest adjustments if
+-+ *	sdelta and sdelta->table are valid, else 0.
+-+ */
+-+static int cpr3_regulator_max_sdelta_diff(const struct cpr4_sdelta *sdelta,
+-+				int step_volt)
+-+{
+-+	int i, j, index, sdelta_min = INT_MAX, sdelta_max = INT_MIN;
+-+
+-+	if (!sdelta || !sdelta->table)
+-+		return 0;
+-+
+-+	for (i = 0; i < sdelta->max_core_count; i++) {
+-+		for (j = 0; j < sdelta->temp_band_count; j++) {
+-+			index = i * sdelta->temp_band_count + j;
+-+			sdelta_min = min(sdelta_min, sdelta->table[index]);
+-+			sdelta_max = max(sdelta_max, sdelta->table[index]);
+-+		}
+-+	}
+-+
+-+	return (sdelta_max - sdelta_min) * step_volt;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_aggregate_sdelta() - check open-loop voltages of current
+-+ *		aggregated corner and current corner of a given regulator
+-+ *		and adjust the sdelta strucuture data of aggregate corner.
+-+ * @aggr_corner:	Pointer to accumulated aggregated corner which
+-+ *			is both an input and an output
+-+ * @corner:		Pointer to the corner to be aggregated with
+-+ *			aggr_corner
+-+ * @step_volt:		Step size in microvolts between available set
+-+ *			points of the VDD supply.
+-+ *
+-+ * Return: none
+-+ */
+-+static void cpr3_regulator_aggregate_sdelta(
+-+				struct cpr3_corner *aggr_corner,
+-+				const struct cpr3_corner *corner, int step_volt)
+-+{
+-+	struct cpr4_sdelta *aggr_sdelta, *sdelta;
+-+	int aggr_core_count, core_count, temp_band_count;
+-+	u32 aggr_index, index;
+-+	int i, j, sdelta_size, cap_steps, adjust_sdelta;
+-+
+-+	aggr_sdelta = aggr_corner->sdelta;
+-+	sdelta = corner->sdelta;
+-+
+-+	if (aggr_corner->open_loop_volt < corner->open_loop_volt) {
+-+		/*
+-+		 * Found the new dominant regulator as its open-loop requirement
+-+		 * is higher than previous dominant regulator. Calculate cap
+-+		 * voltage to limit the SDELTA values to make sure the runtime
+-+		 * (Core-count/temp) adjustments do not violate other
+-+		 * regulators' voltage requirements. Use cpr4_sdelta values of
+-+		 * new dominant regulator.
+-+		 */
+-+		aggr_sdelta->cap_volt = min(aggr_sdelta->cap_volt,
+-+						(corner->open_loop_volt -
+-+						aggr_corner->open_loop_volt));
+-+
+-+		/* Clear old data in the sdelta table */
+-+		sdelta_size = aggr_sdelta->max_core_count
+-+					* aggr_sdelta->temp_band_count;
+-+
+-+		if (aggr_sdelta->allow_core_count_adj
+-+			|| aggr_sdelta->allow_temp_adj)
+-+			memset(aggr_sdelta->table, 0, sdelta_size
+-+					* sizeof(*aggr_sdelta->table));
+-+
+-+		if (sdelta->allow_temp_adj || sdelta->allow_core_count_adj) {
+-+			/* Copy new data in sdelta table */
+-+			sdelta_size = sdelta->max_core_count
+-+						* sdelta->temp_band_count;
+-+			if (sdelta->table)
+-+				memcpy(aggr_sdelta->table, sdelta->table,
+-+					sdelta_size * sizeof(*sdelta->table));
+-+		}
+-+
+-+		if (sdelta->allow_boost) {
+-+			memcpy(aggr_sdelta->boost_table, sdelta->boost_table,
+-+				sdelta->temp_band_count
+-+				* sizeof(*sdelta->boost_table));
+-+			aggr_sdelta->boost_num_cores = sdelta->boost_num_cores;
+-+		} else if (aggr_sdelta->allow_boost) {
+-+			for (i = 0; i < aggr_sdelta->temp_band_count; i++) {
+-+				adjust_sdelta = (corner->open_loop_volt
+-+						- aggr_corner->open_loop_volt)
+-+						/ step_volt;
+-+				aggr_sdelta->boost_table[i] += adjust_sdelta;
+-+				aggr_sdelta->boost_table[i]
+-+					= min(aggr_sdelta->boost_table[i], 0);
+-+			}
+-+		}
+-+
+-+		aggr_corner->open_loop_volt = corner->open_loop_volt;
+-+		aggr_sdelta->allow_temp_adj = sdelta->allow_temp_adj;
+-+		aggr_sdelta->allow_core_count_adj
+-+					= sdelta->allow_core_count_adj;
+-+		aggr_sdelta->max_core_count = sdelta->max_core_count;
+-+		aggr_sdelta->temp_band_count = sdelta->temp_band_count;
+-+	} else if (aggr_corner->open_loop_volt > corner->open_loop_volt) {
+-+		/*
+-+		 * Adjust the cap voltage if the open-loop requirement of new
+-+		 * regulator is the next highest.
+-+		 */
+-+		aggr_sdelta->cap_volt = min(aggr_sdelta->cap_volt,
+-+						(aggr_corner->open_loop_volt
+-+						- corner->open_loop_volt));
+-+
+-+		if (sdelta->allow_boost) {
+-+			for (i = 0; i < aggr_sdelta->temp_band_count; i++) {
+-+				adjust_sdelta = (aggr_corner->open_loop_volt
+-+						- corner->open_loop_volt)
+-+						/ step_volt;
+-+				aggr_sdelta->boost_table[i] =
+-+					sdelta->boost_table[i] + adjust_sdelta;
+-+				aggr_sdelta->boost_table[i]
+-+					= min(aggr_sdelta->boost_table[i], 0);
+-+			}
+-+			aggr_sdelta->boost_num_cores = sdelta->boost_num_cores;
+-+		}
+-+	} else {
+-+		/*
+-+		 * Found another dominant regulator with same open-loop
+-+		 * requirement. Make cap voltage to '0'. Disable core-count
+-+		 * adjustments as we couldn't support for both regulators.
+-+		 * Keep enable temp based adjustments if enabled for both
+-+		 * regulators and choose mininum margin adjustment values
+-+		 * between them.
+-+		 */
+-+		aggr_sdelta->cap_volt = 0;
+-+		aggr_sdelta->allow_core_count_adj = false;
+-+
+-+		if (aggr_sdelta->allow_temp_adj
+-+					&& sdelta->allow_temp_adj) {
+-+			aggr_core_count = aggr_sdelta->max_core_count - 1;
+-+			core_count = sdelta->max_core_count - 1;
+-+			temp_band_count = sdelta->temp_band_count;
+-+			for (j = 0; j < temp_band_count; j++) {
+-+				aggr_index = aggr_core_count * temp_band_count
+-+						+ j;
+-+				index = core_count * temp_band_count + j;
+-+				aggr_sdelta->table[aggr_index] =
+-+					min(aggr_sdelta->table[aggr_index],
+-+						sdelta->table[index]);
+-+			}
+-+		} else {
+-+			aggr_sdelta->allow_temp_adj = false;
+-+		}
+-+
+-+		if (sdelta->allow_boost) {
+-+			memcpy(aggr_sdelta->boost_table, sdelta->boost_table,
+-+				sdelta->temp_band_count
+-+				* sizeof(*sdelta->boost_table));
+-+			aggr_sdelta->boost_num_cores = sdelta->boost_num_cores;
+-+		}
+-+	}
+-+
+-+	/* Keep non-dominant clients boost enable state */
+-+	aggr_sdelta->allow_boost |= sdelta->allow_boost;
+-+	if (aggr_sdelta->allow_boost)
+-+		aggr_sdelta->allow_core_count_adj = false;
+-+
+-+	if (aggr_sdelta->cap_volt && !(aggr_sdelta->cap_volt == INT_MAX)) {
+-+		core_count = aggr_sdelta->max_core_count;
+-+		temp_band_count = aggr_sdelta->temp_band_count;
+-+		/*
+-+		 * Convert cap voltage from uV to PMIC steps and use to limit
+-+		 * sdelta margin adjustments.
+-+		 */
+-+		cap_steps = aggr_sdelta->cap_volt / step_volt;
+-+		for (i = 0; i < core_count; i++)
+-+			for (j = 0; j < temp_band_count; j++) {
+-+				index = i * temp_band_count + j;
+-+				aggr_sdelta->table[index] =
+-+						min(aggr_sdelta->table[index],
+-+							cap_steps);
+-+		}
+-+	}
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_aggregate_corners() - aggregate two corners together
+-+ * @aggr_corner:		Pointer to accumulated aggregated corner which
+-+ *				is both an input and an output
+-+ * @corner:			Pointer to the corner to be aggregated with
+-+ *				aggr_corner
+-+ * @aggr_quot:			Flag indicating that target quotients should be
+-+ *				aggregated as well.
+-+ * @step_volt:			Step size in microvolts between available set
+-+ *				points of the VDD supply.
+-+ *
+-+ * Return: none
+-+ */
+-+static void cpr3_regulator_aggregate_corners(struct cpr3_corner *aggr_corner,
+-+			const struct cpr3_corner *corner, bool aggr_quot,
+-+			int step_volt)
+-+{
+-+	int i;
+-+
+-+	aggr_corner->ceiling_volt
+-+		= max(aggr_corner->ceiling_volt, corner->ceiling_volt);
+-+	aggr_corner->floor_volt
+-+		= max(aggr_corner->floor_volt, corner->floor_volt);
+-+	aggr_corner->last_volt
+-+		= max(aggr_corner->last_volt, corner->last_volt);
+-+	aggr_corner->system_volt
+-+		= max(aggr_corner->system_volt, corner->system_volt);
+-+	aggr_corner->mem_acc_volt
+-+		= max(aggr_corner->mem_acc_volt, corner->mem_acc_volt);
+-+	aggr_corner->irq_en |= corner->irq_en;
+-+	aggr_corner->use_open_loop |= corner->use_open_loop;
+-+
+-+	if (aggr_quot) {
+-+		aggr_corner->ro_mask &= corner->ro_mask;
+-+
+-+		for (i = 0; i < CPR3_RO_COUNT; i++)
+-+			aggr_corner->target_quot[i]
+-+				= max(aggr_corner->target_quot[i],
+-+				      corner->target_quot[i]);
+-+	}
+-+
+-+	if (aggr_corner->sdelta && corner->sdelta
+-+		&& (aggr_corner->sdelta->table
+-+		|| aggr_corner->sdelta->boost_table)) {
+-+		cpr3_regulator_aggregate_sdelta(aggr_corner, corner, step_volt);
+-+	} else {
+-+		aggr_corner->open_loop_volt
+-+			= max(aggr_corner->open_loop_volt,
+-+				corner->open_loop_volt);
+-+	}
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_update_ctrl_state() - update the state of the CPR controller
+-+ *		to reflect the corners used by all CPR3 regulators as well as
+-+ *		the CPR operating mode
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * This function aggregates the CPR parameters for all CPR3 regulators
+-+ * associated with the VDD supply.  Upon success, it sets the aggregated last
+-+ * known good voltage.
+-+ *
+-+ * The VDD supply voltage will not be physically configured unless this
+-+ * condition is met by at least one of the regulators of the controller:
+-+ * regulator->vreg_enabled == true &&
+-+ * regulator->current_corner != CPR3_REGULATOR_CORNER_INVALID
+-+ *
+-+ * CPR registers for the controller and each thread are updated as long as
+-+ * ctrl->cpr_enabled == true.
+-+ *
+-+ * Note, CPR3 controller lock must be held by the caller.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int _cpr3_regulator_update_ctrl_state(struct cpr3_controller *ctrl)
+-+{
+-+	struct cpr3_corner aggr_corner = {};
+-+	struct cpr3_thread *thread;
+-+	struct cpr3_regulator *vreg;
+-+	struct cpr4_sdelta *sdelta;
+-+	bool valid = false;
+-+	bool thread_valid;
+-+	int i, j, rc, new_volt, vdd_volt, dynamic_floor_volt, last_corner_volt;
+-+	u32 reg_last_measurement = 0, sdelta_size;
+-+	int *sdelta_table, *boost_table;
+-+
+-+	last_corner_volt = 0;
+-+	if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4) {
+-+		rc = cpr3_ctrl_clear_cpr4_config(ctrl);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "failed to clear CPR4 configuration,rc=%d\n",
+-+				rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	cpr3_ctrl_loop_disable(ctrl);
+-+
+-+	vdd_volt = regulator_get_voltage(ctrl->vdd_regulator);
+-+	if (vdd_volt < 0) {
+-+		cpr3_err(ctrl, "regulator_get_voltage(vdd) failed, rc=%d\n",
+-+			 vdd_volt);
+-+		return vdd_volt;
+-+	}
+-+
+-+	if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4) {
+-+		/*
+-+		 * Save aggregated corner open-loop voltage which was programmed
+-+		 * during last corner switch which is used when programming new
+-+		 * aggregated corner open-loop voltage.
+-+		 */
+-+		last_corner_volt = ctrl->aggr_corner.open_loop_volt;
+-+	}
+-+
+-+	if (ctrl->cpr_enabled && ctrl->use_hw_closed_loop &&
+-+		ctrl->ctrl_type == CPR_CTRL_TYPE_CPR3)
+-+		reg_last_measurement
+-+			= cpr3_read(ctrl, CPR3_REG_LAST_MEASUREMENT);
+-+
+-+	aggr_corner.sdelta = ctrl->aggr_corner.sdelta;
+-+	if (aggr_corner.sdelta) {
+-+		sdelta = aggr_corner.sdelta;
+-+		sdelta_table = sdelta->table;
+-+		if (sdelta_table) {
+-+			sdelta_size = sdelta->max_core_count *
+-+					sdelta->temp_band_count;
+-+			memset(sdelta_table, 0, sdelta_size
+-+					* sizeof(*sdelta_table));
+-+		}
+-+
+-+		boost_table = sdelta->boost_table;
+-+		if (boost_table)
+-+			memset(boost_table, 0, sdelta->temp_band_count
+-+					* sizeof(*boost_table));
+-+
+-+		memset(sdelta, 0, sizeof(*sdelta));
+-+		sdelta->table = sdelta_table;
+-+		sdelta->cap_volt = INT_MAX;
+-+		sdelta->boost_table = boost_table;
+-+	}
+-+
+-+	/* Aggregate the requests of all threads */
+-+	for (i = 0; i < ctrl->thread_count; i++) {
+-+		thread = &ctrl->thread[i];
+-+		thread_valid = false;
+-+
+-+		sdelta = thread->aggr_corner.sdelta;
+-+		if (sdelta) {
+-+			sdelta_table = sdelta->table;
+-+			if (sdelta_table) {
+-+				sdelta_size = sdelta->max_core_count *
+-+						sdelta->temp_band_count;
+-+				memset(sdelta_table, 0, sdelta_size
+-+						* sizeof(*sdelta_table));
+-+			}
+-+
+-+			boost_table = sdelta->boost_table;
+-+			if (boost_table)
+-+				memset(boost_table, 0, sdelta->temp_band_count
+-+						* sizeof(*boost_table));
+-+
+-+			memset(sdelta, 0, sizeof(*sdelta));
+-+			sdelta->table = sdelta_table;
+-+			sdelta->cap_volt = INT_MAX;
+-+			sdelta->boost_table = boost_table;
+-+		}
+-+
+-+		memset(&thread->aggr_corner, 0, sizeof(thread->aggr_corner));
+-+		thread->aggr_corner.sdelta = sdelta;
+-+		thread->aggr_corner.ro_mask = CPR3_RO_MASK;
+-+
+-+		for (j = 0; j < thread->vreg_count; j++) {
+-+			vreg = &thread->vreg[j];
+-+
+-+			if (ctrl->cpr_enabled && ctrl->use_hw_closed_loop)
+-+				cpr3_update_vreg_closed_loop_volt(vreg,
+-+						vdd_volt, reg_last_measurement);
+-+
+-+			if (!vreg->vreg_enabled
+-+			    || vreg->current_corner
+-+					    == CPR3_REGULATOR_CORNER_INVALID) {
+-+				/* Cannot participate in aggregation. */
+-+				vreg->aggregated = false;
+-+				continue;
+-+			} else {
+-+				vreg->aggregated = true;
+-+				thread_valid = true;
+-+			}
+-+
+-+			cpr3_regulator_aggregate_corners(&thread->aggr_corner,
+-+					&vreg->corner[vreg->current_corner],
+-+					true, ctrl->step_volt);
+-+		}
+-+
+-+		valid |= thread_valid;
+-+
+-+		if (thread_valid)
+-+			cpr3_regulator_aggregate_corners(&aggr_corner,
+-+					&thread->aggr_corner,
+-+					false, ctrl->step_volt);
+-+	}
+-+
+-+	if (valid && ctrl->cpr_allowed_hw && ctrl->cpr_allowed_sw) {
+-+		rc = cpr3_closed_loop_enable(ctrl);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "could not enable CPR, rc=%d\n", rc);
+-+			return rc;
+-+		}
+-+	} else {
+-+		rc = cpr3_closed_loop_disable(ctrl);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "could not disable CPR, rc=%d\n", rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	/* No threads are enabled with a valid corner so exit. */
+-+	if (!valid)
+-+		return 0;
+-+
+-+	/*
+-+	 * When using CPR hardware closed-loop, the voltage may vary anywhere
+-+	 * between the floor and ceiling voltage without software notification.
+-+	 * Therefore, it is required that the floor to ceiling range for the
+-+	 * aggregated corner not intersect the APM threshold voltage.  Adjust
+-+	 * the floor to ceiling range if this requirement is violated.
+-+	 *
+-+	 * The following algorithm is applied in the case that
+-+	 * floor < threshold <= ceiling:
+-+	 *	if open_loop >= threshold - adj, then floor = threshold
+-+	 *	else ceiling = threshold - step
+-+	 * where adj = an adjustment factor to ensure sufficient voltage margin
+-+	 * and step = VDD output step size
+-+	 *
+-+	 * The open-loop and last known voltages are also bounded by the new
+-+	 * floor or ceiling value as needed.
+-+	 */
+-+	if (ctrl->use_hw_closed_loop
+-+	    && aggr_corner.ceiling_volt >= ctrl->apm_threshold_volt
+-+	    && aggr_corner.floor_volt < ctrl->apm_threshold_volt) {
+-+
+-+		if (aggr_corner.open_loop_volt
+-+		    >= ctrl->apm_threshold_volt - ctrl->apm_adj_volt)
+-+			aggr_corner.floor_volt = ctrl->apm_threshold_volt;
+-+		else
+-+			aggr_corner.ceiling_volt
+-+				= ctrl->apm_threshold_volt - ctrl->step_volt;
+-+
+-+		aggr_corner.last_volt
+-+		    = max(aggr_corner.last_volt, aggr_corner.floor_volt);
+-+		aggr_corner.last_volt
+-+		    = min(aggr_corner.last_volt, aggr_corner.ceiling_volt);
+-+		aggr_corner.open_loop_volt
+-+		    = max(aggr_corner.open_loop_volt, aggr_corner.floor_volt);
+-+		aggr_corner.open_loop_volt
+-+		    = min(aggr_corner.open_loop_volt, aggr_corner.ceiling_volt);
+-+	}
+-+
+-+	if (ctrl->use_hw_closed_loop
+-+	    && aggr_corner.ceiling_volt >= ctrl->mem_acc_threshold_volt
+-+	    && aggr_corner.floor_volt < ctrl->mem_acc_threshold_volt) {
+-+		aggr_corner.floor_volt = ctrl->mem_acc_threshold_volt;
+-+		aggr_corner.last_volt = max(aggr_corner.last_volt,
+-+					     aggr_corner.floor_volt);
+-+		aggr_corner.open_loop_volt = max(aggr_corner.open_loop_volt,
+-+						  aggr_corner.floor_volt);
+-+	}
+-+
+-+	if (ctrl->use_hw_closed_loop) {
+-+		dynamic_floor_volt
+-+			= cpr3_regulator_get_dynamic_floor_volt(ctrl,
+-+							reg_last_measurement);
+-+		if (aggr_corner.floor_volt < dynamic_floor_volt) {
+-+			aggr_corner.floor_volt = dynamic_floor_volt;
+-+			aggr_corner.last_volt = max(aggr_corner.last_volt,
+-+							aggr_corner.floor_volt);
+-+			aggr_corner.open_loop_volt
+-+				= max(aggr_corner.open_loop_volt,
+-+					aggr_corner.floor_volt);
+-+			aggr_corner.ceiling_volt = max(aggr_corner.ceiling_volt,
+-+							aggr_corner.floor_volt);
+-+		}
+-+	}
+-+
+-+	if (ctrl->cpr_enabled && ctrl->last_corner_was_closed_loop) {
+-+		/*
+-+		 * Always program open-loop voltage for CPR4 controllers which
+-+		 * support hardware closed-loop.  Storing the last closed loop
+-+		 * voltage in corner structure can still help with debugging.
+-+		 */
+-+		if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR3)
+-+			new_volt = aggr_corner.last_volt;
+-+		else if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4
+-+			 && ctrl->supports_hw_closed_loop)
+-+			new_volt = aggr_corner.open_loop_volt;
+-+		else
+-+			new_volt = min(aggr_corner.last_volt +
+-+			      cpr3_regulator_max_sdelta_diff(aggr_corner.sdelta,
+-+							     ctrl->step_volt),
+-+				       aggr_corner.ceiling_volt);
+-+
+-+		aggr_corner.last_volt = new_volt;
+-+	} else {
+-+		new_volt = aggr_corner.open_loop_volt;
+-+		aggr_corner.last_volt = aggr_corner.open_loop_volt;
+-+	}
+-+
+-+	if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4
+-+	    && ctrl->supports_hw_closed_loop) {
+-+		/*
+-+		 * Store last aggregated corner open-loop voltage in vdd_volt
+-+		 * which is used when programming current aggregated corner
+-+		 * required voltage.
+-+		 */
+-+		vdd_volt = last_corner_volt;
+-+	}
+-+
+-+	cpr3_debug(ctrl, "setting new voltage=%d uV\n", new_volt);
+-+	rc = cpr3_regulator_scale_vdd_voltage(ctrl, new_volt,
+-+					      vdd_volt, &aggr_corner);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "vdd voltage scaling failed, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	/* Only update registers if CPR is enabled. */
+-+	if (ctrl->cpr_enabled) {
+-+		if (ctrl->use_hw_closed_loop) {
+-+			/* Hardware closed-loop */
+-+
+-+			/* Set ceiling and floor limits in hardware */
+-+			rc = regulator_set_voltage(ctrl->vdd_limit_regulator,
+-+				aggr_corner.floor_volt,
+-+				aggr_corner.ceiling_volt);
+-+			if (rc) {
+-+				cpr3_err(ctrl, "could not configure HW closed-loop voltage limits, rc=%d\n",
+-+					rc);
+-+				return rc;
+-+			}
+-+		} else {
+-+			/* Software closed-loop */
+-+
+-+			/*
+-+			 * Disable UP or DOWN interrupts when at ceiling or
+-+			 * floor respectively.
+-+			 */
+-+			if (new_volt == aggr_corner.floor_volt)
+-+				aggr_corner.irq_en &= ~CPR3_IRQ_DOWN;
+-+			if (new_volt == aggr_corner.ceiling_volt)
+-+				aggr_corner.irq_en &= ~CPR3_IRQ_UP;
+-+
+-+			cpr3_write(ctrl, CPR3_REG_IRQ_CLEAR,
+-+				CPR3_IRQ_UP | CPR3_IRQ_DOWN);
+-+			cpr3_write(ctrl, CPR3_REG_IRQ_EN, aggr_corner.irq_en);
+-+		}
+-+
+-+		for (i = 0; i < ctrl->thread_count; i++) {
+-+			cpr3_regulator_set_target_quot(&ctrl->thread[i]);
+-+
+-+			for (j = 0; j < ctrl->thread[i].vreg_count; j++) {
+-+				vreg = &ctrl->thread[i].vreg[j];
+-+
+-+				if (vreg->vreg_enabled)
+-+					vreg->last_closed_loop_corner
+-+						= vreg->current_corner;
+-+			}
+-+		}
+-+
+-+		if (ctrl->proc_clock_throttle) {
+-+			if (aggr_corner.ceiling_volt > aggr_corner.floor_volt
+-+			    && (ctrl->use_hw_closed_loop
+-+					|| new_volt < aggr_corner.ceiling_volt))
+-+				cpr3_write(ctrl, CPR3_REG_PD_THROTTLE,
+-+						ctrl->proc_clock_throttle);
+-+			else
+-+				cpr3_write(ctrl, CPR3_REG_PD_THROTTLE,
+-+						CPR3_PD_THROTTLE_DISABLE);
+-+		}
+-+
+-+		/*
+-+		 * Ensure that all CPR register writes complete before
+-+		 * re-enabling CPR loop operation.
+-+		 */
+-+		wmb();
+-+	} else if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4
+-+		   && ctrl->vdd_limit_regulator) {
+-+		/* Set ceiling and floor limits in hardware */
+-+		rc = regulator_set_voltage(ctrl->vdd_limit_regulator,
+-+			aggr_corner.floor_volt,
+-+			aggr_corner.ceiling_volt);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "could not configure HW closed-loop voltage limits, rc=%d\n",
+-+				rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	ctrl->aggr_corner = aggr_corner;
+-+
+-+	if (ctrl->allow_core_count_adj || ctrl->allow_temp_adj
+-+		|| ctrl->allow_boost) {
+-+		rc = cpr3_controller_program_sdelta(ctrl);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "failed to program sdelta, rc=%d\n", rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	/*
+-+	 * Only enable the CPR controller if it is possible to set more than
+-+	 * one vdd-supply voltage.
+-+	 */
+-+	if (aggr_corner.ceiling_volt > aggr_corner.floor_volt &&
+-+			!aggr_corner.use_open_loop)
+-+		cpr3_ctrl_loop_enable(ctrl);
+-+
+-+	ctrl->last_corner_was_closed_loop = ctrl->cpr_enabled;
+-+	cpr3_debug(ctrl, "CPR configuration updated\n");
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_wait_for_idle() - wait for the CPR controller to no longer be
+-+ *		busy
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ * @max_wait_ns:	Max wait time in nanoseconds
+-+ *
+-+ * Return: 0 on success or -ETIMEDOUT if the controller was still busy after
+-+ *	   the maximum delay time
+-+ */
+-+static int cpr3_regulator_wait_for_idle(struct cpr3_controller *ctrl,
+-+					s64 max_wait_ns)
+-+{
+-+	ktime_t start, end;
+-+	s64 time_ns;
+-+	u32 reg;
+-+
+-+	/*
+-+	 * Ensure that all previous CPR register writes have completed before
+-+	 * checking the status register.
+-+	 */
+-+	mb();
+-+
+-+	start = ktime_get();
+-+	do {
+-+		end = ktime_get();
+-+		time_ns = ktime_to_ns(ktime_sub(end, start));
+-+		if (time_ns > max_wait_ns) {
+-+			cpr3_err(ctrl, "CPR controller still busy after %lld us\n",
+-+				div_s64(time_ns, 1000));
+-+			return -ETIMEDOUT;
+-+		}
+-+		usleep_range(50, 100);
+-+		reg = cpr3_read(ctrl, CPR3_REG_CPR_STATUS);
+-+	} while (reg & CPR3_CPR_STATUS_BUSY_MASK);
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cmp_int() - int comparison function to be passed into the sort() function
+-+ *		which leads to ascending sorting
+-+ * @a:			First int value
+-+ * @b:			Second int value
+-+ *
+-+ * Return: >0 if a > b, 0 if a == b, <0 if a < b
+-+ */
+-+static int cmp_int(const void *a, const void *b)
+-+{
+-+	return *(int *)a - *(int *)b;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_measure_aging() - measure the quotient difference for the
+-+ *		specified CPR aging sensor
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ * @aging_sensor:	Aging sensor to measure
+-+ *
+-+ * Note that vdd-supply must be configured to the aging reference voltage before
+-+ * calling this function.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_regulator_measure_aging(struct cpr3_controller *ctrl,
+-+				struct cpr3_aging_sensor_info *aging_sensor)
+-+{
+-+	u32 mask, reg, result, quot_min, quot_max, sel_min, sel_max;
+-+	u32 quot_min_scaled, quot_max_scaled;
+-+	u32 gcnt, gcnt_ref, gcnt0_restore, gcnt1_restore, irq_restore;
+-+	u32 ro_mask_restore, cont_dly_restore, up_down_dly_restore = 0;
+-+	int quot_delta, quot_delta_scaled, quot_delta_scaled_sum;
+-+	int *quot_delta_results;
+-+	int rc, rc2, i, aging_measurement_count, filtered_count;
+-+	bool is_aging_measurement;
+-+
+-+	quot_delta_results = kcalloc(CPR3_AGING_MEASUREMENT_ITERATIONS,
+-+			sizeof(*quot_delta_results), GFP_KERNEL);
+-+	if (!quot_delta_results)
+-+		return -ENOMEM;
+-+
+-+	if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4) {
+-+		rc = cpr3_ctrl_clear_cpr4_config(ctrl);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "failed to clear CPR4 configuration,rc=%d\n",
+-+				rc);
+-+			kfree(quot_delta_results);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	cpr3_ctrl_loop_disable(ctrl);
+-+
+-+	/* Enable up, down, and mid CPR interrupts */
+-+	irq_restore = cpr3_read(ctrl, CPR3_REG_IRQ_EN);
+-+	cpr3_write(ctrl, CPR3_REG_IRQ_EN,
+-+			CPR3_IRQ_UP | CPR3_IRQ_DOWN | CPR3_IRQ_MID);
+-+
+-+	/* Ensure that the aging sensor is assigned to CPR thread 0 */
+-+	cpr3_write(ctrl, CPR3_REG_SENSOR_OWNER(aging_sensor->sensor_id), 0);
+-+
+-+	/* Switch from HW to SW closed-loop if necessary */
+-+	if (ctrl->supports_hw_closed_loop) {
+-+		if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4) {
+-+			cpr3_masked_write(ctrl, CPR4_REG_MARGIN_ADJ_CTL,
+-+				CPR4_MARGIN_ADJ_CTL_HW_CLOSED_LOOP_EN_MASK,
+-+				CPR4_MARGIN_ADJ_CTL_HW_CLOSED_LOOP_DISABLE);
+-+		} else if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR3) {
+-+			cpr3_write(ctrl, CPR3_REG_HW_CLOSED_LOOP,
+-+				CPR3_HW_CLOSED_LOOP_DISABLE);
+-+		}
+-+	}
+-+
+-+	/* Configure the GCNT for RO0 and RO1 that are used for aging */
+-+	gcnt0_restore = cpr3_read(ctrl, CPR3_REG_GCNT(0));
+-+	gcnt1_restore = cpr3_read(ctrl, CPR3_REG_GCNT(1));
+-+	gcnt_ref = cpr3_regulator_get_gcnt(ctrl);
+-+	gcnt = gcnt_ref * 3 / 2;
+-+	cpr3_write(ctrl, CPR3_REG_GCNT(0), gcnt);
+-+	cpr3_write(ctrl, CPR3_REG_GCNT(1), gcnt);
+-+
+-+	/* Unmask all RO's */
+-+	ro_mask_restore = cpr3_read(ctrl, CPR3_REG_RO_MASK(0));
+-+	cpr3_write(ctrl, CPR3_REG_RO_MASK(0), 0);
+-+
+-+	/*
+-+	 * Mask all sensors except for the one to measure and bypass all
+-+	 * sensors in collapsible domains.
+-+	 */
+-+	for (i = 0; i <= ctrl->sensor_count / 32; i++) {
+-+		mask = GENMASK(min(31, ctrl->sensor_count - i * 32), 0);
+-+		if (aging_sensor->sensor_id / 32 >= i
+-+		    && aging_sensor->sensor_id / 32 < (i + 1))
+-+			mask &= ~BIT(aging_sensor->sensor_id % 32);
+-+		cpr3_write(ctrl, CPR3_REG_SENSOR_MASK_WRITE_BANK(i), mask);
+-+		cpr3_write(ctrl, CPR3_REG_SENSOR_BYPASS_WRITE_BANK(i),
+-+				aging_sensor->bypass_mask[i]);
+-+	}
+-+
+-+	/* Set CPR loop delays to 0 us */
+-+	if (ctrl->supports_hw_closed_loop
+-+		&& ctrl->ctrl_type == CPR_CTRL_TYPE_CPR3) {
+-+		cont_dly_restore = cpr3_read(ctrl, CPR3_REG_CPR_TIMER_MID_CONT);
+-+		up_down_dly_restore = cpr3_read(ctrl,
+-+						CPR3_REG_CPR_TIMER_UP_DN_CONT);
+-+		cpr3_write(ctrl, CPR3_REG_CPR_TIMER_MID_CONT, 0);
+-+		cpr3_write(ctrl, CPR3_REG_CPR_TIMER_UP_DN_CONT, 0);
+-+	} else {
+-+		cont_dly_restore = cpr3_read(ctrl,
+-+						CPR3_REG_CPR_TIMER_AUTO_CONT);
+-+		cpr3_write(ctrl, CPR3_REG_CPR_TIMER_AUTO_CONT, 0);
+-+	}
+-+
+-+	/* Set count mode to all-at-once min with no repeat */
+-+	cpr3_masked_write(ctrl, CPR3_REG_CPR_CTL,
+-+		CPR3_CPR_CTL_COUNT_MODE_MASK | CPR3_CPR_CTL_COUNT_REPEAT_MASK,
+-+		CPR3_CPR_CTL_COUNT_MODE_ALL_AT_ONCE_MIN
+-+			<< CPR3_CPR_CTL_COUNT_MODE_SHIFT);
+-+
+-+	cpr3_ctrl_loop_enable(ctrl);
+-+
+-+	rc = cpr3_regulator_wait_for_idle(ctrl,
+-+					CPR3_AGING_MEASUREMENT_TIMEOUT_NS);
+-+	if (rc)
+-+		goto cleanup;
+-+
+-+	/* Set count mode to all-at-once aging */
+-+	cpr3_masked_write(ctrl, CPR3_REG_CPR_CTL, CPR3_CPR_CTL_COUNT_MODE_MASK,
+-+			CPR3_CPR_CTL_COUNT_MODE_ALL_AT_ONCE_AGE
+-+				<< CPR3_CPR_CTL_COUNT_MODE_SHIFT);
+-+
+-+	aging_measurement_count = 0;
+-+	for (i = 0; i < CPR3_AGING_MEASUREMENT_ITERATIONS; i++) {
+-+		/* Send CONT_NACK */
+-+		cpr3_write(ctrl, CPR3_REG_CONT_CMD, CPR3_CONT_CMD_NACK);
+-+
+-+		rc = cpr3_regulator_wait_for_idle(ctrl,
+-+					CPR3_AGING_MEASUREMENT_TIMEOUT_NS);
+-+		if (rc)
+-+			goto cleanup;
+-+
+-+		/* Check for PAGE_IS_AGE flag in status register */
+-+		reg = cpr3_read(ctrl, CPR3_REG_CPR_STATUS);
+-+		is_aging_measurement
+-+			= reg & CPR3_CPR_STATUS_AGING_MEASUREMENT_MASK;
+-+
+-+		/* Read CPR measurement results */
+-+		result = cpr3_read(ctrl, CPR3_REG_RESULT1(0));
+-+		quot_min = (result & CPR3_RESULT1_QUOT_MIN_MASK)
+-+				>> CPR3_RESULT1_QUOT_MIN_SHIFT;
+-+		quot_max = (result & CPR3_RESULT1_QUOT_MAX_MASK)
+-+				>> CPR3_RESULT1_QUOT_MAX_SHIFT;
+-+		sel_min = (result & CPR3_RESULT1_RO_MIN_MASK)
+-+				>> CPR3_RESULT1_RO_MIN_SHIFT;
+-+		sel_max = (result & CPR3_RESULT1_RO_MAX_MASK)
+-+				>> CPR3_RESULT1_RO_MAX_SHIFT;
+-+
+-+		/*
+-+		 * Scale the quotients so that they are equivalent to the fused
+-+		 * values.  This accounts for the difference in measurement
+-+		 * interval times.
+-+		 */
+-+		quot_min_scaled = quot_min * (gcnt_ref + 1) / (gcnt + 1);
+-+		quot_max_scaled = quot_max * (gcnt_ref + 1) / (gcnt + 1);
+-+
+-+		if (sel_max == 1) {
+-+			quot_delta = quot_max - quot_min;
+-+			quot_delta_scaled = quot_max_scaled - quot_min_scaled;
+-+		} else {
+-+			quot_delta = quot_min - quot_max;
+-+			quot_delta_scaled = quot_min_scaled - quot_max_scaled;
+-+		}
+-+
+-+		if (is_aging_measurement)
+-+			quot_delta_results[aging_measurement_count++]
+-+				= quot_delta_scaled;
+-+
+-+		cpr3_debug(ctrl, "aging results: page_is_age=%u, sel_min=%u, sel_max=%u, quot_min=%u, quot_max=%u, quot_delta=%d, quot_min_scaled=%u, quot_max_scaled=%u, quot_delta_scaled=%d\n",
+-+			is_aging_measurement, sel_min, sel_max, quot_min,
+-+			quot_max, quot_delta, quot_min_scaled, quot_max_scaled,
+-+			quot_delta_scaled);
+-+	}
+-+
+-+	filtered_count
+-+		= aging_measurement_count - CPR3_AGING_MEASUREMENT_FILTER * 2;
+-+	if (filtered_count > 0) {
+-+		sort(quot_delta_results, aging_measurement_count,
+-+			sizeof(*quot_delta_results), cmp_int, NULL);
+-+
+-+		quot_delta_scaled_sum = 0;
+-+		for (i = 0; i < filtered_count; i++)
+-+			quot_delta_scaled_sum
+-+				+= quot_delta_results[i
+-+					+ CPR3_AGING_MEASUREMENT_FILTER];
+-+
+-+		aging_sensor->measured_quot_diff
+-+			= quot_delta_scaled_sum / filtered_count;
+-+		cpr3_info(ctrl, "average quotient delta=%d (count=%d)\n",
+-+			aging_sensor->measured_quot_diff,
+-+			filtered_count);
+-+	} else {
+-+		cpr3_err(ctrl, "%d aging measurements completed after %d iterations\n",
+-+			aging_measurement_count,
+-+			CPR3_AGING_MEASUREMENT_ITERATIONS);
+-+		rc = -EBUSY;
+-+	}
+-+
+-+cleanup:
+-+	kfree(quot_delta_results);
+-+
+-+	if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4) {
+-+		rc2 = cpr3_ctrl_clear_cpr4_config(ctrl);
+-+		if (rc2) {
+-+			cpr3_err(ctrl, "failed to clear CPR4 configuration,rc=%d\n",
+-+				rc2);
+-+			rc = rc2;
+-+		}
+-+	}
+-+
+-+	cpr3_ctrl_loop_disable(ctrl);
+-+
+-+	cpr3_write(ctrl, CPR3_REG_IRQ_EN, irq_restore);
+-+
+-+	cpr3_write(ctrl, CPR3_REG_RO_MASK(0), ro_mask_restore);
+-+
+-+	cpr3_write(ctrl, CPR3_REG_GCNT(0), gcnt0_restore);
+-+	cpr3_write(ctrl, CPR3_REG_GCNT(1), gcnt1_restore);
+-+
+-+	if (ctrl->supports_hw_closed_loop
+-+		&& ctrl->ctrl_type == CPR_CTRL_TYPE_CPR3) {
+-+		cpr3_write(ctrl, CPR3_REG_CPR_TIMER_MID_CONT, cont_dly_restore);
+-+		cpr3_write(ctrl, CPR3_REG_CPR_TIMER_UP_DN_CONT,
+-+				up_down_dly_restore);
+-+	} else {
+-+		cpr3_write(ctrl, CPR3_REG_CPR_TIMER_AUTO_CONT,
+-+				cont_dly_restore);
+-+	}
+-+
+-+	for (i = 0; i <= ctrl->sensor_count / 32; i++) {
+-+		cpr3_write(ctrl, CPR3_REG_SENSOR_MASK_WRITE_BANK(i), 0);
+-+		cpr3_write(ctrl, CPR3_REG_SENSOR_BYPASS_WRITE_BANK(i), 0);
+-+	}
+-+
+-+	cpr3_masked_write(ctrl, CPR3_REG_CPR_CTL,
+-+		CPR3_CPR_CTL_COUNT_MODE_MASK | CPR3_CPR_CTL_COUNT_REPEAT_MASK,
+-+		(ctrl->count_mode << CPR3_CPR_CTL_COUNT_MODE_SHIFT)
+-+		| (ctrl->count_repeat << CPR3_CPR_CTL_COUNT_REPEAT_SHIFT));
+-+
+-+	cpr3_write(ctrl, CPR3_REG_SENSOR_OWNER(aging_sensor->sensor_id),
+-+			ctrl->sensor_owner[aging_sensor->sensor_id]);
+-+
+-+	cpr3_write(ctrl, CPR3_REG_IRQ_CLEAR,
+-+			CPR3_IRQ_UP | CPR3_IRQ_DOWN | CPR3_IRQ_MID);
+-+
+-+	if (ctrl->supports_hw_closed_loop) {
+-+		if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4) {
+-+			cpr3_masked_write(ctrl, CPR4_REG_MARGIN_ADJ_CTL,
+-+				CPR4_MARGIN_ADJ_CTL_HW_CLOSED_LOOP_EN_MASK,
+-+				ctrl->use_hw_closed_loop
+-+				? CPR4_MARGIN_ADJ_CTL_HW_CLOSED_LOOP_ENABLE
+-+				: CPR4_MARGIN_ADJ_CTL_HW_CLOSED_LOOP_DISABLE);
+-+		} else if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR3) {
+-+			cpr3_write(ctrl, CPR3_REG_HW_CLOSED_LOOP,
+-+				ctrl->use_hw_closed_loop
+-+				? CPR3_HW_CLOSED_LOOP_ENABLE
+-+				: CPR3_HW_CLOSED_LOOP_DISABLE);
+-+		}
+-+	}
+-+
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_readjust_volt_and_quot() - readjust the target quotients as
+-+ *		well as the floor, ceiling, and open-loop voltages for the
+-+ *		regulator by removing the old adjustment and adding the new one
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @old_adjust_volt:	Old aging adjustment voltage in microvolts
+-+ * @new_adjust_volt:	New aging adjustment voltage in microvolts
+-+ *
+-+ * Also reset the cached closed loop voltage (last_volt) to equal the open-loop
+-+ * voltage for each corner.
+-+ *
+-+ * Return: None
+-+ */
+-+static void cpr3_regulator_readjust_volt_and_quot(struct cpr3_regulator *vreg,
+-+		int old_adjust_volt, int new_adjust_volt)
+-+{
+-+	unsigned long long temp;
+-+	int i, j, old_volt, new_volt, rounded_volt;
+-+
+-+	if (!vreg->aging_allowed)
+-+		return;
+-+
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		temp = (unsigned long long)old_adjust_volt
+-+			* (unsigned long long)vreg->corner[i].aging_derate;
+-+		do_div(temp, 1000);
+-+		old_volt = temp;
+-+
+-+		temp = (unsigned long long)new_adjust_volt
+-+			* (unsigned long long)vreg->corner[i].aging_derate;
+-+		do_div(temp, 1000);
+-+		new_volt = temp;
+-+
+-+		old_volt = min(vreg->aging_max_adjust_volt, old_volt);
+-+		new_volt = min(vreg->aging_max_adjust_volt, new_volt);
+-+
+-+		for (j = 0; j < CPR3_RO_COUNT; j++) {
+-+			if (vreg->corner[i].target_quot[j] != 0) {
+-+				vreg->corner[i].target_quot[j]
+-+					+= cpr3_quot_adjustment(
+-+						vreg->corner[i].ro_scale[j],
+-+						new_volt)
+-+					   - cpr3_quot_adjustment(
+-+						vreg->corner[i].ro_scale[j],
+-+						old_volt);
+-+			}
+-+		}
+-+
+-+		rounded_volt = CPR3_ROUND(new_volt,
+-+					vreg->thread->ctrl->step_volt);
+-+
+-+		if (!vreg->aging_allow_open_loop_adj)
+-+			rounded_volt = 0;
+-+
+-+		vreg->corner[i].ceiling_volt
+-+			= vreg->corner[i].unaged_ceiling_volt + rounded_volt;
+-+		vreg->corner[i].ceiling_volt = min(vreg->corner[i].ceiling_volt,
+-+					      vreg->corner[i].abs_ceiling_volt);
+-+		vreg->corner[i].floor_volt
+-+			= vreg->corner[i].unaged_floor_volt + rounded_volt;
+-+		vreg->corner[i].floor_volt = min(vreg->corner[i].floor_volt,
+-+						vreg->corner[i].ceiling_volt);
+-+		vreg->corner[i].open_loop_volt
+-+			= vreg->corner[i].unaged_open_loop_volt + rounded_volt;
+-+		vreg->corner[i].open_loop_volt
+-+			= min(vreg->corner[i].open_loop_volt,
+-+				vreg->corner[i].ceiling_volt);
+-+
+-+		vreg->corner[i].last_volt = vreg->corner[i].open_loop_volt;
+-+
+-+		cpr3_debug(vreg, "corner %d: applying %d uV closed-loop and %d uV open-loop voltage margin adjustment\n",
+-+			i, new_volt, rounded_volt);
+-+	}
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_set_aging_ref_adjustment() - adjust target quotients for the
+-+ *		regulators managed by this CPR controller to account for aging
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ * @ref_adjust_volt:	New aging reference adjustment voltage in microvolts to
+-+ *			apply to all regulators managed by this CPR controller
+-+ *
+-+ * The existing aging adjustment as defined by ctrl->aging_ref_adjust_volt is
+-+ * first removed and then the adjustment is applied.  Lastly, the value of
+-+ * ctrl->aging_ref_adjust_volt is updated to ref_adjust_volt.
+-+ */
+-+static void cpr3_regulator_set_aging_ref_adjustment(
+-+		struct cpr3_controller *ctrl, int ref_adjust_volt)
+-+{
+-+	struct cpr3_regulator *vreg;
+-+	int i, j;
+-+
+-+	for (i = 0; i < ctrl->thread_count; i++) {
+-+		for (j = 0; j < ctrl->thread[i].vreg_count; j++) {
+-+			vreg = &ctrl->thread[i].vreg[j];
+-+			cpr3_regulator_readjust_volt_and_quot(vreg,
+-+				ctrl->aging_ref_adjust_volt, ref_adjust_volt);
+-+		}
+-+	}
+-+
+-+	ctrl->aging_ref_adjust_volt = ref_adjust_volt;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_aging_adjust() - adjust the target quotients for regulators
+-+ *		based on the output of CPR aging sensors
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_regulator_aging_adjust(struct cpr3_controller *ctrl)
+-+{
+-+	struct cpr3_regulator *vreg;
+-+	struct cpr3_corner restore_aging_corner;
+-+	struct cpr3_corner *corner;
+-+	int *restore_current_corner;
+-+	bool *restore_vreg_enabled;
+-+	int i, j, id, rc, rc2, vreg_count, aging_volt, max_aging_volt = 0;
+-+	u32 reg;
+-+
+-+	if (!ctrl->aging_required || !ctrl->cpr_enabled
+-+	    || ctrl->aggr_corner.ceiling_volt == 0
+-+	    || ctrl->aggr_corner.ceiling_volt > ctrl->aging_ref_volt)
+-+		return 0;
+-+
+-+	for (i = 0, vreg_count = 0; i < ctrl->thread_count; i++) {
+-+		for (j = 0; j < ctrl->thread[i].vreg_count; j++) {
+-+			vreg = &ctrl->thread[i].vreg[j];
+-+			vreg_count++;
+-+
+-+			if (vreg->aging_allowed && vreg->vreg_enabled
+-+			    && vreg->current_corner > vreg->aging_corner)
+-+				return 0;
+-+		}
+-+	}
+-+
+-+	/* Verify that none of the aging sensors are currently masked. */
+-+	for (i = 0; i < ctrl->aging_sensor_count; i++) {
+-+		id = ctrl->aging_sensor[i].sensor_id;
+-+		reg = cpr3_read(ctrl, CPR3_REG_SENSOR_MASK_READ(id));
+-+		if (reg & BIT(id % 32))
+-+			return 0;
+-+	}
+-+
+-+	/*
+-+	 * Verify that the aging possible register (if specified) has an
+-+	 * acceptable value.
+-+	 */
+-+	if (ctrl->aging_possible_reg) {
+-+		reg = readl_relaxed(ctrl->aging_possible_reg);
+-+		reg &= ctrl->aging_possible_mask;
+-+		if (reg != ctrl->aging_possible_val)
+-+			return 0;
+-+	}
+-+
+-+	restore_current_corner = kcalloc(vreg_count,
+-+				sizeof(*restore_current_corner), GFP_KERNEL);
+-+	restore_vreg_enabled = kcalloc(vreg_count,
+-+				sizeof(*restore_vreg_enabled), GFP_KERNEL);
+-+	if (!restore_current_corner || !restore_vreg_enabled) {
+-+		kfree(restore_current_corner);
+-+		kfree(restore_vreg_enabled);
+-+		return -ENOMEM;
+-+	}
+-+
+-+	/* Force all regulators to the aging corner */
+-+	for (i = 0, vreg_count = 0; i < ctrl->thread_count; i++) {
+-+		for (j = 0; j < ctrl->thread[i].vreg_count; j++, vreg_count++) {
+-+			vreg = &ctrl->thread[i].vreg[j];
+-+
+-+			restore_current_corner[vreg_count]
+-+				= vreg->current_corner;
+-+			restore_vreg_enabled[vreg_count]
+-+				= vreg->vreg_enabled;
+-+
+-+			vreg->current_corner = vreg->aging_corner;
+-+			vreg->vreg_enabled = true;
+-+		}
+-+	}
+-+
+-+	/* Force one of the regulators to require the aging reference voltage */
+-+	vreg = &ctrl->thread[0].vreg[0];
+-+	corner = &vreg->corner[vreg->current_corner];
+-+	restore_aging_corner = *corner;
+-+	corner->ceiling_volt = ctrl->aging_ref_volt;
+-+	corner->floor_volt = ctrl->aging_ref_volt;
+-+	corner->open_loop_volt = ctrl->aging_ref_volt;
+-+	corner->last_volt = ctrl->aging_ref_volt;
+-+
+-+	/* Skip last_volt caching */
+-+	ctrl->last_corner_was_closed_loop = false;
+-+
+-+	/* Set the vdd supply voltage to the aging reference voltage */
+-+	rc = _cpr3_regulator_update_ctrl_state(ctrl);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "unable to force vdd-supply to the aging reference voltage=%d uV, rc=%d\n",
+-+			ctrl->aging_ref_volt, rc);
+-+		goto cleanup;
+-+	}
+-+
+-+	if (ctrl->aging_vdd_mode) {
+-+		rc = regulator_set_mode(ctrl->vdd_regulator,
+-+					ctrl->aging_vdd_mode);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "unable to configure vdd-supply for mode=%u, rc=%d\n",
+-+				ctrl->aging_vdd_mode, rc);
+-+			goto cleanup;
+-+		}
+-+	}
+-+
+-+	/* Perform aging measurement on all aging sensors */
+-+	for (i = 0; i < ctrl->aging_sensor_count; i++) {
+-+		for (j = 0; j < CPR3_AGING_RETRY_COUNT; j++) {
+-+			rc = cpr3_regulator_measure_aging(ctrl,
+-+					&ctrl->aging_sensor[i]);
+-+			if (!rc)
+-+				break;
+-+		}
+-+
+-+		if (!rc) {
+-+			aging_volt =
+-+				cpr3_voltage_adjustment(
+-+					ctrl->aging_sensor[i].ro_scale,
+-+					ctrl->aging_sensor[i].measured_quot_diff
+-+					- ctrl->aging_sensor[i].init_quot_diff);
+-+			max_aging_volt = max(max_aging_volt, aging_volt);
+-+		} else {
+-+			cpr3_err(ctrl, "CPR aging measurement failed after %d tries, rc=%d\n",
+-+				j, rc);
+-+			ctrl->aging_failed = true;
+-+			ctrl->aging_required = false;
+-+			goto cleanup;
+-+		}
+-+	}
+-+
+-+cleanup:
+-+	vreg = &ctrl->thread[0].vreg[0];
+-+	vreg->corner[vreg->current_corner] = restore_aging_corner;
+-+
+-+	for (i = 0, vreg_count = 0; i < ctrl->thread_count; i++) {
+-+		for (j = 0; j < ctrl->thread[i].vreg_count; j++, vreg_count++) {
+-+			vreg = &ctrl->thread[i].vreg[j];
+-+			vreg->current_corner
+-+				= restore_current_corner[vreg_count];
+-+			vreg->vreg_enabled = restore_vreg_enabled[vreg_count];
+-+		}
+-+	}
+-+
+-+	kfree(restore_current_corner);
+-+	kfree(restore_vreg_enabled);
+-+
+-+	/* Adjust the CPR target quotients according to the aging measurement */
+-+	if (!rc) {
+-+		cpr3_regulator_set_aging_ref_adjustment(ctrl, max_aging_volt);
+-+
+-+		cpr3_info(ctrl, "aging measurement successful; aging reference adjustment voltage=%d uV\n",
+-+			ctrl->aging_ref_adjust_volt);
+-+		ctrl->aging_succeeded = true;
+-+		ctrl->aging_required = false;
+-+	}
+-+
+-+	if (ctrl->aging_complete_vdd_mode) {
+-+		rc = regulator_set_mode(ctrl->vdd_regulator,
+-+					ctrl->aging_complete_vdd_mode);
+-+		if (rc)
+-+			cpr3_err(ctrl, "unable to configure vdd-supply for mode=%u, rc=%d\n",
+-+				ctrl->aging_complete_vdd_mode, rc);
+-+	}
+-+
+-+	/* Skip last_volt caching */
+-+	ctrl->last_corner_was_closed_loop = false;
+-+
+-+	/*
+-+	 * Restore vdd-supply to the voltage before the aging measurement and
+-+	 * restore the CPR3 controller hardware state.
+-+	 */
+-+	rc2 = _cpr3_regulator_update_ctrl_state(ctrl);
+-+
+-+	/* Stop last_volt caching on for the next request */
+-+	ctrl->last_corner_was_closed_loop = false;
+-+
+-+	return rc ? rc : rc2;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_update_ctrl_state() - update the state of the CPR controller
+-+ *		to reflect the corners used by all CPR3 regulators as well as
+-+ *		the CPR operating mode and perform aging adjustments if needed
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Note, CPR3 controller lock must be held by the caller.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_regulator_update_ctrl_state(struct cpr3_controller *ctrl)
+-+{
+-+	int rc;
+-+
+-+	rc = _cpr3_regulator_update_ctrl_state(ctrl);
+-+	if (rc)
+-+		return rc;
+-+
+-+	return cpr3_regulator_aging_adjust(ctrl);
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_set_voltage() - set the voltage corner for the CPR3 regulator
+-+ *			associated with the regulator device
+-+ * @rdev:		Regulator device pointer for the cpr3-regulator
+-+ * @corner:		New voltage corner to set (offset by CPR3_CORNER_OFFSET)
+-+ * @corner_max:		Maximum voltage corner allowed (offset by
+-+ *			CPR3_CORNER_OFFSET)
+-+ * @selector:		Pointer which is filled with the selector value for the
+-+ *			corner
+-+ *
+-+ * This function is passed as a callback function into the regulator ops that
+-+ * are registered for each cpr3-regulator device.  The VDD voltage will not be
+-+ * physically configured until both this function and cpr3_regulator_enable()
+-+ * are called.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_regulator_set_voltage(struct regulator_dev *rdev,
+-+		int corner, int corner_max, unsigned *selector)
+-+{
+-+	struct cpr3_regulator *vreg = rdev_get_drvdata(rdev);
+-+	struct cpr3_controller *ctrl = vreg->thread->ctrl;
+-+	int rc = 0;
+-+	int last_corner;
+-+
+-+	corner -= CPR3_CORNER_OFFSET;
+-+	corner_max -= CPR3_CORNER_OFFSET;
+-+	*selector = corner;
+-+
+-+	mutex_lock(&ctrl->lock);
+-+
+-+	if (!vreg->vreg_enabled) {
+-+		vreg->current_corner = corner;
+-+		cpr3_debug(vreg, "stored corner=%d\n", corner);
+-+		goto done;
+-+	} else if (vreg->current_corner == corner) {
+-+		goto done;
+-+	}
+-+
+-+	last_corner = vreg->current_corner;
+-+	vreg->current_corner = corner;
+-+
+-+	if (vreg->cpr4_regulator_data != NULL)
+-+		if (vreg->cpr4_regulator_data->mem_acc_funcs != NULL)
+-+			vreg->cpr4_regulator_data->mem_acc_funcs->set_mem_acc(rdev);
+-+
+-+	rc = cpr3_regulator_update_ctrl_state(ctrl);
+-+	if (rc) {
+-+		cpr3_err(vreg, "could not update CPR state, rc=%d\n", rc);
+-+		vreg->current_corner = last_corner;
+-+	}
+-+
+-+	if (vreg->cpr4_regulator_data != NULL)
+-+		if (vreg->cpr4_regulator_data->mem_acc_funcs != NULL)
+-+			vreg->cpr4_regulator_data->mem_acc_funcs->clear_mem_acc(rdev);
+-+
+-+	cpr3_debug(vreg, "set corner=%d\n", corner);
+-+done:
+-+	mutex_unlock(&ctrl->lock);
+-+
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_handle_temp_open_loop_adjustment() - voltage based cold temperature
+-+ *
+-+ * @rdev:		Regulator device pointer for the cpr3-regulator
+-+ * @is_cold:		Flag to denote enter/exit cold condition
+-+ *
+-+ * This function is adjusts voltage margin based on cold condition
+-+ *
+-+ * Return: 0 = success
+-+ */
+-+
+-+int cpr3_handle_temp_open_loop_adjustment(struct cpr3_controller *ctrl,
+-+								bool is_cold)
+-+{
+-+	int i ,j, k, rc;
+-+	struct cpr3_regulator *vreg;
+-+
+-+	mutex_lock(&ctrl->lock);
+-+	for (i = 0; i < ctrl->thread_count; i++) {
+-+		for (j = 0; j < ctrl->thread[i].vreg_count; j++) {
+-+			vreg = &ctrl->thread[i].vreg[j];
+-+			for (k = 0; k < vreg->corner_count; k++) {
+-+				vreg->corner[k].open_loop_volt = is_cold ?
+-+				    vreg->corner[k].cold_temp_open_loop_volt :
+-+				    vreg->corner[k].normal_temp_open_loop_volt;
+-+			}
+-+		}
+-+	}
+-+	rc = cpr3_regulator_update_ctrl_state(ctrl);
+-+	mutex_unlock(&ctrl->lock);
+-+
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_get_voltage() - get the voltage corner for the CPR3 regulator
+-+ *			associated with the regulator device
+-+ * @rdev:		Regulator device pointer for the cpr3-regulator
+-+ *
+-+ * This function is passed as a callback function into the regulator ops that
+-+ * are registered for each cpr3-regulator device.
+-+ *
+-+ * Return: voltage corner value offset by CPR3_CORNER_OFFSET
+-+ */
+-+static int cpr3_regulator_get_voltage(struct regulator_dev *rdev)
+-+{
+-+	struct cpr3_regulator *vreg = rdev_get_drvdata(rdev);
+-+
+-+	if (vreg->current_corner == CPR3_REGULATOR_CORNER_INVALID)
+-+		return CPR3_CORNER_OFFSET;
+-+	else
+-+		return vreg->current_corner + CPR3_CORNER_OFFSET;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_list_voltage() - return the voltage corner mapped to the
+-+ *			specified selector
+-+ * @rdev:		Regulator device pointer for the cpr3-regulator
+-+ * @selector:		Regulator selector
+-+ *
+-+ * This function is passed as a callback function into the regulator ops that
+-+ * are registered for each cpr3-regulator device.
+-+ *
+-+ * Return: voltage corner value offset by CPR3_CORNER_OFFSET
+-+ */
+-+static int cpr3_regulator_list_voltage(struct regulator_dev *rdev,
+-+		unsigned selector)
+-+{
+-+	struct cpr3_regulator *vreg = rdev_get_drvdata(rdev);
+-+
+-+	if (selector < vreg->corner_count)
+-+		return selector + CPR3_CORNER_OFFSET;
+-+	else
+-+		return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_is_enabled() - return the enable state of the CPR3 regulator
+-+ * @rdev:		Regulator device pointer for the cpr3-regulator
+-+ *
+-+ * This function is passed as a callback function into the regulator ops that
+-+ * are registered for each cpr3-regulator device.
+-+ *
+-+ * Return: true if regulator is enabled, false if regulator is disabled
+-+ */
+-+static int cpr3_regulator_is_enabled(struct regulator_dev *rdev)
+-+{
+-+	struct cpr3_regulator *vreg = rdev_get_drvdata(rdev);
+-+
+-+	return vreg->vreg_enabled;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_enable() - enable the CPR3 regulator
+-+ * @rdev:		Regulator device pointer for the cpr3-regulator
+-+ *
+-+ * This function is passed as a callback function into the regulator ops that
+-+ * are registered for each cpr3-regulator device.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_regulator_enable(struct regulator_dev *rdev)
+-+{
+-+	struct cpr3_regulator *vreg = rdev_get_drvdata(rdev);
+-+	struct cpr3_controller *ctrl = vreg->thread->ctrl;
+-+	int rc = 0;
+-+
+-+	if (vreg->vreg_enabled == true)
+-+		return 0;
+-+
+-+	mutex_lock(&ctrl->lock);
+-+
+-+	if (ctrl->system_regulator) {
+-+		rc = regulator_enable(ctrl->system_regulator);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "regulator_enable(system) failed, rc=%d\n",
+-+				rc);
+-+			goto done;
+-+		}
+-+	}
+-+
+-+	rc = regulator_enable(ctrl->vdd_regulator);
+-+	if (rc) {
+-+		cpr3_err(vreg, "regulator_enable(vdd) failed, rc=%d\n", rc);
+-+		goto done;
+-+	}
+-+
+-+	vreg->vreg_enabled = true;
+-+	rc = cpr3_regulator_update_ctrl_state(ctrl);
+-+	if (rc) {
+-+		cpr3_err(vreg, "could not update CPR state, rc=%d\n", rc);
+-+		regulator_disable(ctrl->vdd_regulator);
+-+		vreg->vreg_enabled = false;
+-+		goto done;
+-+	}
+-+
+-+	cpr3_debug(vreg, "Enabled\n");
+-+done:
+-+	mutex_unlock(&ctrl->lock);
+-+
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_disable() - disable the CPR3 regulator
+-+ * @rdev:		Regulator device pointer for the cpr3-regulator
+-+ *
+-+ * This function is passed as a callback function into the regulator ops that
+-+ * are registered for each cpr3-regulator device.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_regulator_disable(struct regulator_dev *rdev)
+-+{
+-+	struct cpr3_regulator *vreg = rdev_get_drvdata(rdev);
+-+	struct cpr3_controller *ctrl = vreg->thread->ctrl;
+-+	int rc, rc2;
+-+
+-+	if (vreg->vreg_enabled == false)
+-+		return 0;
+-+
+-+	mutex_lock(&ctrl->lock);
+-+	rc = regulator_disable(ctrl->vdd_regulator);
+-+	if (rc) {
+-+		cpr3_err(vreg, "regulator_disable(vdd) failed, rc=%d\n", rc);
+-+		goto done;
+-+	}
+-+
+-+	vreg->vreg_enabled = false;
+-+	rc = cpr3_regulator_update_ctrl_state(ctrl);
+-+	if (rc) {
+-+		cpr3_err(vreg, "could not update CPR state, rc=%d\n", rc);
+-+		rc2 = regulator_enable(ctrl->vdd_regulator);
+-+		vreg->vreg_enabled = true;
+-+		goto done;
+-+	}
+-+
+-+	if (ctrl->system_regulator) {
+-+		rc = regulator_disable(ctrl->system_regulator);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "regulator_disable(system) failed, rc=%d\n",
+-+				rc);
+-+			goto done;
+-+		}
+-+	}
+-+
+-+	cpr3_debug(vreg, "Disabled\n");
+-+done:
+-+	mutex_unlock(&ctrl->lock);
+-+
+-+	return rc;
+-+}
+-+
+-+static struct regulator_ops cpr3_regulator_ops = {
+-+	.enable			= cpr3_regulator_enable,
+-+	.disable		= cpr3_regulator_disable,
+-+	.is_enabled		= cpr3_regulator_is_enabled,
+-+	.set_voltage		= cpr3_regulator_set_voltage,
+-+	.get_voltage		= cpr3_regulator_get_voltage,
+-+	.list_voltage		= cpr3_regulator_list_voltage,
+-+};
+-+
+-+/**
+-+ * cpr3_print_result() - print CPR measurement results to the kernel log for
+-+ *		debugging purposes
+-+ * @thread:		Pointer to the CPR3 thread
+-+ *
+-+ * Return: None
+-+ */
+-+static void cpr3_print_result(struct cpr3_thread *thread)
+-+{
+-+	struct cpr3_controller *ctrl = thread->ctrl;
+-+	u32 result[3], busy, step_dn, step_up, error_steps, error, negative;
+-+	u32 quot_min, quot_max, ro_min, ro_max, step_quot_min, step_quot_max;
+-+	u32 sensor_min, sensor_max;
+-+	char *sign;
+-+
+-+	result[0] = cpr3_read(ctrl, CPR3_REG_RESULT0(thread->thread_id));
+-+	result[1] = cpr3_read(ctrl, CPR3_REG_RESULT1(thread->thread_id));
+-+	result[2] = cpr3_read(ctrl, CPR3_REG_RESULT2(thread->thread_id));
+-+
+-+	busy = !!(result[0] & CPR3_RESULT0_BUSY_MASK);
+-+	step_dn = !!(result[0] & CPR3_RESULT0_STEP_DN_MASK);
+-+	step_up = !!(result[0] & CPR3_RESULT0_STEP_UP_MASK);
+-+	error_steps = (result[0] & CPR3_RESULT0_ERROR_STEPS_MASK)
+-+			>> CPR3_RESULT0_ERROR_STEPS_SHIFT;
+-+	error = (result[0] & CPR3_RESULT0_ERROR_MASK)
+-+			>> CPR3_RESULT0_ERROR_SHIFT;
+-+	negative = !!(result[0] & CPR3_RESULT0_NEGATIVE_MASK);
+-+
+-+	quot_min = (result[1] & CPR3_RESULT1_QUOT_MIN_MASK)
+-+			>> CPR3_RESULT1_QUOT_MIN_SHIFT;
+-+	quot_max = (result[1] & CPR3_RESULT1_QUOT_MAX_MASK)
+-+			>> CPR3_RESULT1_QUOT_MAX_SHIFT;
+-+	ro_min = (result[1] & CPR3_RESULT1_RO_MIN_MASK)
+-+			>> CPR3_RESULT1_RO_MIN_SHIFT;
+-+	ro_max = (result[1] & CPR3_RESULT1_RO_MAX_MASK)
+-+			>> CPR3_RESULT1_RO_MAX_SHIFT;
+-+
+-+	step_quot_min = (result[2] & CPR3_RESULT2_STEP_QUOT_MIN_MASK)
+-+			>> CPR3_RESULT2_STEP_QUOT_MIN_SHIFT;
+-+	step_quot_max = (result[2] & CPR3_RESULT2_STEP_QUOT_MAX_MASK)
+-+			>> CPR3_RESULT2_STEP_QUOT_MAX_SHIFT;
+-+	sensor_min = (result[2] & CPR3_RESULT2_SENSOR_MIN_MASK)
+-+			>> CPR3_RESULT2_SENSOR_MIN_SHIFT;
+-+	sensor_max = (result[2] & CPR3_RESULT2_SENSOR_MAX_MASK)
+-+			>> CPR3_RESULT2_SENSOR_MAX_SHIFT;
+-+
+-+	sign = negative ? "-" : "";
+-+	cpr3_debug(ctrl, "thread %u: busy=%u, step_dn=%u, step_up=%u, error_steps=%s%u, error=%s%u\n",
+-+		thread->thread_id, busy, step_dn, step_up, sign, error_steps,
+-+		sign, error);
+-+	cpr3_debug(ctrl, "thread %u: quot_min=%u, quot_max=%u, ro_min=%u, ro_max=%u\n",
+-+		thread->thread_id, quot_min, quot_max, ro_min, ro_max);
+-+	cpr3_debug(ctrl, "thread %u: step_quot_min=%u, step_quot_max=%u, sensor_min=%u, sensor_max=%u\n",
+-+		thread->thread_id, step_quot_min, step_quot_max, sensor_min,
+-+		sensor_max);
+-+}
+-+
+-+/**
+-+ * cpr3_thread_busy() - returns if the specified CPR3 thread is busy taking
+-+ *		a measurement
+-+ * @thread:		Pointer to the CPR3 thread
+-+ *
+-+ * Return: CPR3 busy status
+-+ */
+-+static bool cpr3_thread_busy(struct cpr3_thread *thread)
+-+{
+-+	u32 result;
+-+
+-+	result = cpr3_read(thread->ctrl, CPR3_REG_RESULT0(thread->thread_id));
+-+
+-+	return !!(result & CPR3_RESULT0_BUSY_MASK);
+-+}
+-+
+-+/**
+-+ * cpr3_irq_handler() - CPR interrupt handler callback function used for
+-+ *		software closed-loop operation
+-+ * @irq:		CPR interrupt number
+-+ * @data:		Private data corresponding to the CPR3 controller
+-+ *			pointer
+-+ *
+-+ * This function increases or decreases the vdd supply voltage based upon the
+-+ * CPR controller recommendation.
+-+ *
+-+ * Return: IRQ_HANDLED
+-+ */
+-+static irqreturn_t cpr3_irq_handler(int irq, void *data)
+-+{
+-+	struct cpr3_controller *ctrl = data;
+-+	struct cpr3_corner *aggr = &ctrl->aggr_corner;
+-+	u32 cont = CPR3_CONT_CMD_NACK;
+-+	u32 reg_last_measurement = 0;
+-+	struct cpr3_regulator *vreg;
+-+	struct cpr3_corner *corner;
+-+	unsigned long flags;
+-+	int i, j, new_volt, last_volt, dynamic_floor_volt, rc;
+-+	u32 irq_en, status, cpr_status, ctl;
+-+	bool up, down;
+-+
+-+	mutex_lock(&ctrl->lock);
+-+
+-+	if (!ctrl->cpr_enabled) {
+-+		cpr3_debug(ctrl, "CPR interrupt received but CPR is disabled\n");
+-+		mutex_unlock(&ctrl->lock);
+-+		return IRQ_HANDLED;
+-+	} else if (ctrl->use_hw_closed_loop) {
+-+		cpr3_debug(ctrl, "CPR interrupt received but CPR is using HW closed-loop\n");
+-+		goto done;
+-+	}
+-+
+-+	/*
+-+	 * CPR IRQ status checking and CPR controller disabling must happen
+-+	 * atomically and without invening delay in order to avoid an interrupt
+-+	 * storm caused by the handler racing with the CPR controller.
+-+	 */
+-+	local_irq_save(flags);
+-+	preempt_disable();
+-+
+-+	status = cpr3_read(ctrl, CPR3_REG_IRQ_STATUS);
+-+	up = status & CPR3_IRQ_UP;
+-+	down = status & CPR3_IRQ_DOWN;
+-+
+-+	if (!up && !down) {
+-+		/*
+-+		 * Toggle the CPR controller off and then back on since the
+-+		 * hardware and software states are out of sync.  This condition
+-+		 * occurs after an aging measurement completes as the CPR IRQ
+-+		 * physically triggers during the aging measurement but the
+-+		 * handler is stuck waiting on the mutex lock.
+-+		 */
+-+		cpr3_ctrl_loop_disable(ctrl);
+-+
+-+		local_irq_restore(flags);
+-+		preempt_enable();
+-+
+-+		/* Wait for the loop disable write to complete */
+-+		mb();
+-+
+-+		/* Wait for BUSY=1 and LOOP_EN=0 in CPR controller registers. */
+-+		for (i = 0; i < CPR3_REGISTER_WRITE_DELAY_US / 10; i++) {
+-+			cpr_status = cpr3_read(ctrl, CPR3_REG_CPR_STATUS);
+-+			ctl = cpr3_read(ctrl, CPR3_REG_CPR_CTL);
+-+			if (cpr_status & CPR3_CPR_STATUS_BUSY_MASK
+-+			    && (ctl & CPR3_CPR_CTL_LOOP_EN_MASK)
+-+					== CPR3_CPR_CTL_LOOP_DISABLE)
+-+				break;
+-+			udelay(10);
+-+		}
+-+		if (i == CPR3_REGISTER_WRITE_DELAY_US / 10)
+-+			cpr3_debug(ctrl, "CPR controller not disabled after %d us\n",
+-+				CPR3_REGISTER_WRITE_DELAY_US);
+-+
+-+		/* Clear interrupt status */
+-+		cpr3_write(ctrl, CPR3_REG_IRQ_CLEAR,
+-+			CPR3_IRQ_UP | CPR3_IRQ_DOWN);
+-+
+-+		/* Wait for the interrupt clearing write to complete */
+-+		mb();
+-+
+-+		/* Wait for IRQ_STATUS register to be cleared. */
+-+		for (i = 0; i < CPR3_REGISTER_WRITE_DELAY_US / 10; i++) {
+-+			status = cpr3_read(ctrl, CPR3_REG_IRQ_STATUS);
+-+			if (!(status & (CPR3_IRQ_UP | CPR3_IRQ_DOWN)))
+-+				break;
+-+			udelay(10);
+-+		}
+-+		if (i == CPR3_REGISTER_WRITE_DELAY_US / 10)
+-+			cpr3_debug(ctrl, "CPR interrupts not cleared after %d us\n",
+-+				CPR3_REGISTER_WRITE_DELAY_US);
+-+
+-+		cpr3_ctrl_loop_enable(ctrl);
+-+
+-+		cpr3_debug(ctrl, "CPR interrupt received but no up or down status bit is set\n");
+-+
+-+		mutex_unlock(&ctrl->lock);
+-+		return IRQ_HANDLED;
+-+	} else if (up && down) {
+-+		cpr3_debug(ctrl, "both up and down status bits set\n");
+-+		/* The up flag takes precedence over the down flag. */
+-+		down = false;
+-+	}
+-+
+-+	if (ctrl->supports_hw_closed_loop)
+-+		reg_last_measurement
+-+			= cpr3_read(ctrl, CPR3_REG_LAST_MEASUREMENT);
+-+	dynamic_floor_volt = cpr3_regulator_get_dynamic_floor_volt(ctrl,
+-+							reg_last_measurement);
+-+
+-+	local_irq_restore(flags);
+-+	preempt_enable();
+-+
+-+	irq_en = aggr->irq_en;
+-+	last_volt = aggr->last_volt;
+-+
+-+	for (i = 0; i < ctrl->thread_count; i++) {
+-+		if (cpr3_thread_busy(&ctrl->thread[i])) {
+-+			cpr3_debug(ctrl, "CPR thread %u busy when it should be waiting for SW cont\n",
+-+				ctrl->thread[i].thread_id);
+-+			goto done;
+-+		}
+-+	}
+-+
+-+	new_volt = up ? last_volt + ctrl->step_volt
+-+		      : last_volt - ctrl->step_volt;
+-+
+-+	/* Re-enable UP/DOWN interrupt when its opposite is received. */
+-+	irq_en |= up ? CPR3_IRQ_DOWN : CPR3_IRQ_UP;
+-+
+-+	if (new_volt > aggr->ceiling_volt) {
+-+		new_volt = aggr->ceiling_volt;
+-+		irq_en &= ~CPR3_IRQ_UP;
+-+		cpr3_debug(ctrl, "limiting to ceiling=%d uV\n",
+-+			aggr->ceiling_volt);
+-+	} else if (new_volt < aggr->floor_volt) {
+-+		new_volt = aggr->floor_volt;
+-+		irq_en &= ~CPR3_IRQ_DOWN;
+-+		cpr3_debug(ctrl, "limiting to floor=%d uV\n", aggr->floor_volt);
+-+	}
+-+
+-+	if (down && new_volt < dynamic_floor_volt) {
+-+		/*
+-+		 * The vdd-supply voltage should not be decreased below the
+-+		 * dynamic floor voltage.  However, it is not necessary (and
+-+		 * counter productive) to force the voltage up to this level
+-+		 * if it happened to be below it since the closed-loop voltage
+-+		 * must have gotten there in a safe manner while the power
+-+		 * domains for the CPR3 regulator imposing the dynamic floor
+-+		 * were not bypassed.
+-+		 */
+-+		new_volt = last_volt;
+-+		irq_en &= ~CPR3_IRQ_DOWN;
+-+		cpr3_debug(ctrl, "limiting to dynamic floor=%d uV\n",
+-+			dynamic_floor_volt);
+-+	}
+-+
+-+	for (i = 0; i < ctrl->thread_count; i++)
+-+		cpr3_print_result(&ctrl->thread[i]);
+-+
+-+	cpr3_debug(ctrl, "%s: new_volt=%d uV, last_volt=%d uV\n",
+-+		up ? "UP" : "DN", new_volt, last_volt);
+-+
+-+	if (ctrl->proc_clock_throttle && last_volt == aggr->ceiling_volt
+-+	    && new_volt < last_volt)
+-+		cpr3_write(ctrl, CPR3_REG_PD_THROTTLE,
+-+				ctrl->proc_clock_throttle);
+-+
+-+	if (new_volt != last_volt) {
+-+		rc = cpr3_regulator_scale_vdd_voltage(ctrl, new_volt,
+-+						      last_volt,
+-+						      aggr);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "scale_vdd() failed to set vdd=%d uV, rc=%d\n",
+-+				 new_volt, rc);
+-+			goto done;
+-+		}
+-+		cont = CPR3_CONT_CMD_ACK;
+-+
+-+		/*
+-+		 * Update the closed-loop voltage for all regulators managed
+-+		 * by this CPR controller.
+-+		 */
+-+		for (i = 0; i < ctrl->thread_count; i++) {
+-+			for (j = 0; j < ctrl->thread[i].vreg_count; j++) {
+-+				vreg = &ctrl->thread[i].vreg[j];
+-+				cpr3_update_vreg_closed_loop_volt(vreg,
+-+					new_volt, reg_last_measurement);
+-+			}
+-+		}
+-+	}
+-+
+-+	if (ctrl->proc_clock_throttle && new_volt == aggr->ceiling_volt)
+-+		cpr3_write(ctrl, CPR3_REG_PD_THROTTLE,
+-+				CPR3_PD_THROTTLE_DISABLE);
+-+
+-+	corner = &ctrl->thread[0].vreg[0].corner[
+-+			ctrl->thread[0].vreg[0].current_corner];
+-+
+-+	if (irq_en != aggr->irq_en) {
+-+		aggr->irq_en = irq_en;
+-+		cpr3_write(ctrl, CPR3_REG_IRQ_EN, irq_en);
+-+	}
+-+
+-+	aggr->last_volt = new_volt;
+-+
+-+done:
+-+	/* Clear interrupt status */
+-+	cpr3_write(ctrl, CPR3_REG_IRQ_CLEAR, CPR3_IRQ_UP | CPR3_IRQ_DOWN);
+-+
+-+	/* ACK or NACK the CPR controller */
+-+	cpr3_write(ctrl, CPR3_REG_CONT_CMD, cont);
+-+
+-+	mutex_unlock(&ctrl->lock);
+-+	return IRQ_HANDLED;
+-+}
+-+
+-+/**
+-+ * cpr3_ceiling_irq_handler() - CPR ceiling reached interrupt handler callback
+-+ *		function used for hardware closed-loop operation
+-+ * @irq:		CPR ceiling interrupt number
+-+ * @data:		Private data corresponding to the CPR3 controller
+-+ *			pointer
+-+ *
+-+ * This function disables processor clock throttling and closed-loop operation
+-+ * when the ceiling voltage is reached.
+-+ *
+-+ * Return: IRQ_HANDLED
+-+ */
+-+static irqreturn_t cpr3_ceiling_irq_handler(int irq, void *data)
+-+{
+-+	struct cpr3_controller *ctrl = data;
+-+	int volt;
+-+
+-+	mutex_lock(&ctrl->lock);
+-+
+-+	if (!ctrl->cpr_enabled) {
+-+		cpr3_debug(ctrl, "CPR ceiling interrupt received but CPR is disabled\n");
+-+		goto done;
+-+	} else if (!ctrl->use_hw_closed_loop) {
+-+		cpr3_debug(ctrl, "CPR ceiling interrupt received but CPR is using SW closed-loop\n");
+-+		goto done;
+-+	}
+-+
+-+	volt = regulator_get_voltage(ctrl->vdd_regulator);
+-+	if (volt < 0) {
+-+		cpr3_err(ctrl, "could not get vdd voltage, rc=%d\n", volt);
+-+		goto done;
+-+	} else if (volt != ctrl->aggr_corner.ceiling_volt) {
+-+		cpr3_debug(ctrl, "CPR ceiling interrupt received but vdd voltage: %d uV != ceiling voltage: %d uV\n",
+-+			volt, ctrl->aggr_corner.ceiling_volt);
+-+		goto done;
+-+	}
+-+
+-+	if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR3) {
+-+		/*
+-+		 * Since the ceiling voltage has been reached, disable processor
+-+		 * clock throttling as well as CPR closed-loop operation.
+-+		 */
+-+		cpr3_write(ctrl, CPR3_REG_PD_THROTTLE,
+-+				CPR3_PD_THROTTLE_DISABLE);
+-+		cpr3_ctrl_loop_disable(ctrl);
+-+		cpr3_debug(ctrl, "CPR closed-loop and throttling disabled\n");
+-+	}
+-+
+-+done:
+-+	mutex_unlock(&ctrl->lock);
+-+	return IRQ_HANDLED;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_vreg_register() - register a regulator device for a CPR3
+-+ *		regulator
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * This function initializes all regulator framework related structures and then
+-+ * calls regulator_register() for the CPR3 regulator.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_regulator_vreg_register(struct cpr3_regulator *vreg)
+-+{
+-+	struct regulator_config config = {};
+-+	struct regulator_desc *rdesc;
+-+	struct regulator_init_data *init_data;
+-+	int rc;
+-+
+-+	init_data = of_get_regulator_init_data(vreg->thread->ctrl->dev,
+-+						vreg->of_node, &vreg->rdesc);
+-+	if (!init_data) {
+-+		cpr3_err(vreg, "regulator init data is missing\n");
+-+		return -EINVAL;
+-+	}
+-+
+-+	init_data->constraints.input_uV = init_data->constraints.max_uV;
+-+	rdesc			= &vreg->rdesc;
+-+	init_data->constraints.valid_ops_mask |=
+-+		REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS;
+-+	rdesc->ops = &cpr3_regulator_ops;
+-+
+-+	rdesc->n_voltages	= vreg->corner_count;
+-+	rdesc->name		= init_data->constraints.name;
+-+	rdesc->owner		= THIS_MODULE;
+-+	rdesc->type		= REGULATOR_VOLTAGE;
+-+
+-+	config.dev		= vreg->thread->ctrl->dev;
+-+	config.driver_data	= vreg;
+-+	config.init_data	= init_data;
+-+	config.of_node		= vreg->of_node;
+-+
+-+	vreg->rdev = regulator_register(rdesc, &config);
+-+	if (IS_ERR(vreg->rdev)) {
+-+		rc = PTR_ERR(vreg->rdev);
+-+		cpr3_err(vreg, "regulator_register failed, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+static int debugfs_int_set(void *data, u64 val)
+-+{
+-+	*(int *)data = val;
+-+	return 0;
+-+}
+-+
+-+static int debugfs_int_get(void *data, u64 *val)
+-+{
+-+	*val = *(int *)data;
+-+	return 0;
+-+}
+-+DEFINE_SIMPLE_ATTRIBUTE(fops_int, debugfs_int_get, debugfs_int_set, "%lld\n");
+-+DEFINE_SIMPLE_ATTRIBUTE(fops_int_ro, debugfs_int_get, NULL, "%lld\n");
+-+DEFINE_SIMPLE_ATTRIBUTE(fops_int_wo, NULL, debugfs_int_set, "%lld\n");
+-+
+-+/**
+-+ * debugfs_create_int - create a debugfs file that is used to read and write a
+-+ *		signed int value
+-+ * @name:		Pointer to a string containing the name of the file to
+-+ *			create
+-+ * @mode:		The permissions that the file should have
+-+ * @parent:		Pointer to the parent dentry for this file.  This should
+-+ *			be a directory dentry if set.  If this parameter is
+-+ *			%NULL, then the file will be created in the root of the
+-+ *			debugfs filesystem.
+-+ * @value:		Pointer to the variable that the file should read to and
+-+ *			write from
+-+ *
+-+ * This function creates a file in debugfs with the given name that
+-+ * contains the value of the variable @value.  If the @mode variable is so
+-+ * set, it can be read from, and written to.
+-+ *
+-+ * This function will return a pointer to a dentry if it succeeds.  This
+-+ * pointer must be passed to the debugfs_remove() function when the file is
+-+ * to be removed.  If an error occurs, %NULL will be returned.
+-+ */
+-+static struct dentry *debugfs_create_int(const char *name, umode_t mode,
+-+				struct dentry *parent, int *value)
+-+{
+-+	/* if there are no write bits set, make read only */
+-+	if (!(mode & S_IWUGO))
+-+		return debugfs_create_file(name, mode, parent, value,
+-+					   &fops_int_ro);
+-+	/* if there are no read bits set, make write only */
+-+	if (!(mode & S_IRUGO))
+-+		return debugfs_create_file(name, mode, parent, value,
+-+					   &fops_int_wo);
+-+
+-+	return debugfs_create_file(name, mode, parent, value, &fops_int);
+-+}
+-+
+-+static int debugfs_bool_get(void *data, u64 *val)
+-+{
+-+	*val = *(bool *)data;
+-+	return 0;
+-+}
+-+DEFINE_SIMPLE_ATTRIBUTE(fops_bool_ro, debugfs_bool_get, NULL, "%lld\n");
+-+
+-+/**
+-+ * struct cpr3_debug_corner_info - data structure used by the
+-+ *		cpr3_debugfs_create_corner_int function
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @index:		Pointer to the corner array index
+-+ * @member_offset:	Offset in bytes from the beginning of struct cpr3_corner
+-+ *			to the beginning of the value to be read from
+-+ * @corner:		Pointer to the CPR3 corner array
+-+ */
+-+struct cpr3_debug_corner_info {
+-+	struct cpr3_regulator	*vreg;
+-+	int			*index;
+-+	size_t			member_offset;
+-+	struct cpr3_corner	*corner;
+-+};
+-+
+-+static int cpr3_debug_corner_int_get(void *data, u64 *val)
+-+{
+-+	struct cpr3_debug_corner_info *info = data;
+-+	struct cpr3_controller *ctrl = info->vreg->thread->ctrl;
+-+	int i;
+-+
+-+	mutex_lock(&ctrl->lock);
+-+
+-+	i = *info->index;
+-+	if (i < 0)
+-+		i = 0;
+-+
+-+	*val = *(int *)((char *)&info->vreg->corner[i] + info->member_offset);
+-+
+-+	mutex_unlock(&ctrl->lock);
+-+
+-+	return 0;
+-+}
+-+DEFINE_SIMPLE_ATTRIBUTE(cpr3_debug_corner_int_fops, cpr3_debug_corner_int_get,
+-+			NULL, "%lld\n");
+-+
+-+/**
+-+ * cpr3_debugfs_create_corner_int - create a debugfs file that is used to read
+-+ *		a signed int value out of a CPR3 regulator's corner array
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @name:		Pointer to a string containing the name of the file to
+-+ *			create
+-+ * @mode:		The permissions that the file should have
+-+ * @parent:		Pointer to the parent dentry for this file.  This should
+-+ *			be a directory dentry if set.  If this parameter is
+-+ *			%NULL, then the file will be created in the root of the
+-+ *			debugfs filesystem.
+-+ * @index:		Pointer to the corner array index
+-+ * @member_offset:	Offset in bytes from the beginning of struct cpr3_corner
+-+ *			to the beginning of the value to be read from
+-+ *
+-+ * This function creates a file in debugfs with the given name that
+-+ * contains the value of the int type variable vreg->corner[index].member
+-+ * where member_offset == offsetof(struct cpr3_corner, member).
+-+ */
+-+static struct dentry *cpr3_debugfs_create_corner_int(
+-+		struct cpr3_regulator *vreg, const char *name, umode_t mode,
+-+		struct dentry *parent, int *index, size_t member_offset)
+-+{
+-+	struct cpr3_debug_corner_info *info;
+-+
+-+	info = devm_kzalloc(vreg->thread->ctrl->dev, sizeof(*info), GFP_KERNEL);
+-+	if (!info)
+-+		return NULL;
+-+
+-+	info->vreg = vreg;
+-+	info->index = index;
+-+	info->member_offset = member_offset;
+-+
+-+	return debugfs_create_file(name, mode, parent, info,
+-+				   &cpr3_debug_corner_int_fops);
+-+}
+-+
+-+static int cpr3_debug_quot_open(struct inode *inode, struct file *file)
+-+{
+-+	struct cpr3_debug_corner_info *info = inode->i_private;
+-+	struct cpr3_thread *thread = info->vreg->thread;
+-+	int size, i, pos;
+-+	u32 *quot;
+-+	char *buf;
+-+
+-+	/*
+-+	 * Max size:
+-+	 *  - 10 digits + ' ' or '\n' = 11 bytes per number
+-+	 *  - terminating '\0'
+-+	 */
+-+	size = CPR3_RO_COUNT * 11;
+-+	buf = kzalloc(size + 1, GFP_KERNEL);
+-+	if (!buf)
+-+		return -ENOMEM;
+-+
+-+	file->private_data = buf;
+-+
+-+	mutex_lock(&thread->ctrl->lock);
+-+
+-+	quot = info->corner[*info->index].target_quot;
+-+
+-+	for (i = 0, pos = 0; i < CPR3_RO_COUNT; i++)
+-+		pos += scnprintf(buf + pos, size - pos, "%u%c",
+-+			quot[i], i < CPR3_RO_COUNT - 1 ? ' ' : '\n');
+-+
+-+	mutex_unlock(&thread->ctrl->lock);
+-+
+-+	return nonseekable_open(inode, file);
+-+}
+-+
+-+static ssize_t cpr3_debug_quot_read(struct file *file, char __user *buf,
+-+		size_t len, loff_t *ppos)
+-+{
+-+	return simple_read_from_buffer(buf, len, ppos, file->private_data,
+-+					strlen(file->private_data));
+-+}
+-+
+-+static int cpr3_debug_quot_release(struct inode *inode, struct file *file)
+-+{
+-+	kfree(file->private_data);
+-+
+-+	return 0;
+-+}
+-+
+-+static const struct file_operations cpr3_debug_quot_fops = {
+-+	.owner	 = THIS_MODULE,
+-+	.open	 = cpr3_debug_quot_open,
+-+	.release = cpr3_debug_quot_release,
+-+	.read	 = cpr3_debug_quot_read,
+-+	.llseek  = no_llseek,
+-+};
+-+
+-+/**
+-+ * cpr3_regulator_debugfs_corner_add() - add debugfs files to expose
+-+ *		configuration data for the CPR corner
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @corner_dir:		Pointer to the parent corner dentry for the new files
+-+ * @index:		Pointer to the corner array index
+-+ *
+-+ * Return: none
+-+ */
+-+static void cpr3_regulator_debugfs_corner_add(struct cpr3_regulator *vreg,
+-+		struct dentry *corner_dir, int *index)
+-+{
+-+	struct cpr3_debug_corner_info *info;
+-+	struct dentry *temp;
+-+
+-+	temp = cpr3_debugfs_create_corner_int(vreg, "floor_volt", S_IRUGO,
+-+		corner_dir, index, offsetof(struct cpr3_corner, floor_volt));
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(vreg, "floor_volt debugfs file creation failed\n");
+-+		return;
+-+	}
+-+
+-+	temp = cpr3_debugfs_create_corner_int(vreg, "ceiling_volt", S_IRUGO,
+-+		corner_dir, index, offsetof(struct cpr3_corner, ceiling_volt));
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(vreg, "ceiling_volt debugfs file creation failed\n");
+-+		return;
+-+	}
+-+
+-+	temp = cpr3_debugfs_create_corner_int(vreg, "open_loop_volt", S_IRUGO,
+-+		corner_dir, index,
+-+		offsetof(struct cpr3_corner, open_loop_volt));
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(vreg, "open_loop_volt debugfs file creation failed\n");
+-+		return;
+-+	}
+-+
+-+	temp = cpr3_debugfs_create_corner_int(vreg, "last_volt", S_IRUGO,
+-+		corner_dir, index, offsetof(struct cpr3_corner, last_volt));
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(vreg, "last_volt debugfs file creation failed\n");
+-+		return;
+-+	}
+-+
+-+	info = devm_kzalloc(vreg->thread->ctrl->dev, sizeof(*info), GFP_KERNEL);
+-+	if (!info)
+-+		return;
+-+
+-+	info->vreg = vreg;
+-+	info->index = index;
+-+	info->corner = vreg->corner;
+-+
+-+	temp = debugfs_create_file("target_quots", S_IRUGO, corner_dir,
+-+				info, &cpr3_debug_quot_fops);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(vreg, "target_quots debugfs file creation failed\n");
+-+		return;
+-+	}
+-+}
+-+
+-+/**
+-+ * cpr3_debug_corner_index_set() - debugfs callback used to change the
+-+ *		value of the CPR3 regulator debug_corner index
+-+ * @data:		Pointer to private data which is equal to the CPR3
+-+ *			regulator pointer
+-+ * @val:		New value for debug_corner
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_debug_corner_index_set(void *data, u64 val)
+-+{
+-+	struct cpr3_regulator *vreg = data;
+-+
+-+	if (val < CPR3_CORNER_OFFSET || val > vreg->corner_count) {
+-+		cpr3_err(vreg, "invalid corner index %llu; allowed values: %d-%d\n",
+-+			val, CPR3_CORNER_OFFSET, vreg->corner_count);
+-+		return -EINVAL;
+-+	}
+-+
+-+	mutex_lock(&vreg->thread->ctrl->lock);
+-+	vreg->debug_corner = val - CPR3_CORNER_OFFSET;
+-+	mutex_unlock(&vreg->thread->ctrl->lock);
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_debug_corner_index_get() - debugfs callback used to retrieve
+-+ *		the value of the CPR3 regulator debug_corner index
+-+ * @data:		Pointer to private data which is equal to the CPR3
+-+ *			regulator pointer
+-+ * @val:		Output parameter written with the value of
+-+ *			debug_corner
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_debug_corner_index_get(void *data, u64 *val)
+-+{
+-+	struct cpr3_regulator *vreg = data;
+-+
+-+	*val = vreg->debug_corner + CPR3_CORNER_OFFSET;
+-+
+-+	return 0;
+-+}
+-+DEFINE_SIMPLE_ATTRIBUTE(cpr3_debug_corner_index_fops,
+-+			cpr3_debug_corner_index_get,
+-+			cpr3_debug_corner_index_set,
+-+			"%llu\n");
+-+
+-+/**
+-+ * cpr3_debug_current_corner_index_get() - debugfs callback used to retrieve
+-+ *		the value of the CPR3 regulator current_corner index
+-+ * @data:		Pointer to private data which is equal to the CPR3
+-+ *			regulator pointer
+-+ * @val:		Output parameter written with the value of
+-+ *			current_corner
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_debug_current_corner_index_get(void *data, u64 *val)
+-+{
+-+	struct cpr3_regulator *vreg = data;
+-+
+-+	*val = vreg->current_corner + CPR3_CORNER_OFFSET;
+-+
+-+	return 0;
+-+}
+-+DEFINE_SIMPLE_ATTRIBUTE(cpr3_debug_current_corner_index_fops,
+-+			cpr3_debug_current_corner_index_get,
+-+			NULL, "%llu\n");
+-+
+-+/**
+-+ * cpr3_regulator_debugfs_vreg_add() - add debugfs files to expose configuration
+-+ *		data for the CPR3 regulator
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @thread_dir		CPR3 thread debugfs directory handle
+-+ *
+-+ * Return: none
+-+ */
+-+static void cpr3_regulator_debugfs_vreg_add(struct cpr3_regulator *vreg,
+-+				struct dentry *thread_dir)
+-+{
+-+	struct dentry *temp, *corner_dir, *vreg_dir;
+-+
+-+	vreg_dir = debugfs_create_dir(vreg->name, thread_dir);
+-+	if (IS_ERR_OR_NULL(vreg_dir)) {
+-+		cpr3_err(vreg, "%s debugfs directory creation failed\n",
+-+			vreg->name);
+-+		return;
+-+	}
+-+
+-+	temp = debugfs_create_int("speed_bin_fuse", S_IRUGO, vreg_dir,
+-+				  &vreg->speed_bin_fuse);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(vreg, "speed_bin_fuse debugfs file creation failed\n");
+-+		return;
+-+	}
+-+
+-+	temp = debugfs_create_int("cpr_rev_fuse", S_IRUGO, vreg_dir,
+-+				  &vreg->cpr_rev_fuse);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(vreg, "cpr_rev_fuse debugfs file creation failed\n");
+-+		return;
+-+	}
+-+
+-+	temp = debugfs_create_int("fuse_combo", S_IRUGO, vreg_dir,
+-+				  &vreg->fuse_combo);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(vreg, "fuse_combo debugfs file creation failed\n");
+-+		return;
+-+	}
+-+
+-+	temp = debugfs_create_int("corner_count", S_IRUGO, vreg_dir,
+-+				  &vreg->corner_count);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(vreg, "corner_count debugfs file creation failed\n");
+-+		return;
+-+	}
+-+
+-+	corner_dir = debugfs_create_dir("corner", vreg_dir);
+-+	if (IS_ERR_OR_NULL(corner_dir)) {
+-+		cpr3_err(vreg, "corner debugfs directory creation failed\n");
+-+		return;
+-+	}
+-+
+-+	temp = debugfs_create_file("index", S_IRUGO | S_IWUSR, corner_dir,
+-+				vreg, &cpr3_debug_corner_index_fops);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(vreg, "index debugfs file creation failed\n");
+-+		return;
+-+	}
+-+
+-+	cpr3_regulator_debugfs_corner_add(vreg, corner_dir,
+-+					&vreg->debug_corner);
+-+
+-+	corner_dir = debugfs_create_dir("current_corner", vreg_dir);
+-+	if (IS_ERR_OR_NULL(corner_dir)) {
+-+		cpr3_err(vreg, "current_corner debugfs directory creation failed\n");
+-+		return;
+-+	}
+-+
+-+	temp = debugfs_create_file("index", S_IRUGO, corner_dir,
+-+				vreg, &cpr3_debug_current_corner_index_fops);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(vreg, "index debugfs file creation failed\n");
+-+		return;
+-+	}
+-+
+-+	cpr3_regulator_debugfs_corner_add(vreg, corner_dir,
+-+					  &vreg->current_corner);
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_debugfs_thread_add() - add debugfs files to expose
+-+ *		configuration data for the CPR thread
+-+ * @thread:		Pointer to the CPR3 thread
+-+ *
+-+ * Return: none
+-+ */
+-+static void cpr3_regulator_debugfs_thread_add(struct cpr3_thread *thread)
+-+{
+-+	struct cpr3_controller *ctrl = thread->ctrl;
+-+	struct dentry *aggr_dir, *temp, *thread_dir;
+-+	struct cpr3_debug_corner_info *info;
+-+	char buf[20];
+-+	int *index;
+-+	int i;
+-+
+-+	scnprintf(buf, sizeof(buf), "thread%u", thread->thread_id);
+-+	thread_dir = debugfs_create_dir(buf, thread->ctrl->debugfs);
+-+	if (IS_ERR_OR_NULL(thread_dir)) {
+-+		cpr3_err(ctrl, "thread %u %s debugfs directory creation failed\n",
+-+			thread->thread_id, buf);
+-+		return;
+-+	}
+-+
+-+	aggr_dir = debugfs_create_dir("max_aggregated_params", thread_dir);
+-+	if (IS_ERR_OR_NULL(aggr_dir)) {
+-+		cpr3_err(ctrl, "thread %u max_aggregated_params debugfs directory creation failed\n",
+-+			thread->thread_id);
+-+		return;
+-+	}
+-+
+-+	temp = debugfs_create_int("floor_volt", S_IRUGO, aggr_dir,
+-+				  &thread->aggr_corner.floor_volt);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(ctrl, "thread %u aggr floor_volt debugfs file creation failed\n",
+-+			thread->thread_id);
+-+		return;
+-+	}
+-+
+-+	temp = debugfs_create_int("ceiling_volt", S_IRUGO, aggr_dir,
+-+				  &thread->aggr_corner.ceiling_volt);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(ctrl, "thread %u aggr ceiling_volt debugfs file creation failed\n",
+-+			thread->thread_id);
+-+		return;
+-+	}
+-+
+-+	temp = debugfs_create_int("open_loop_volt", S_IRUGO, aggr_dir,
+-+				  &thread->aggr_corner.open_loop_volt);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(ctrl, "thread %u aggr open_loop_volt debugfs file creation failed\n",
+-+			thread->thread_id);
+-+		return;
+-+	}
+-+
+-+	temp = debugfs_create_int("last_volt", S_IRUGO, aggr_dir,
+-+				  &thread->aggr_corner.last_volt);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(ctrl, "thread %u aggr last_volt debugfs file creation failed\n",
+-+			thread->thread_id);
+-+		return;
+-+	}
+-+
+-+	info = devm_kzalloc(thread->ctrl->dev, sizeof(*info), GFP_KERNEL);
+-+	index = devm_kzalloc(thread->ctrl->dev, sizeof(*index), GFP_KERNEL);
+-+	if (!info || !index)
+-+		return;
+-+	*index = 0;
+-+	info->vreg = &thread->vreg[0];
+-+	info->index = index;
+-+	info->corner = &thread->aggr_corner;
+-+
+-+	temp = debugfs_create_file("target_quots", S_IRUGO, aggr_dir,
+-+				info, &cpr3_debug_quot_fops);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(ctrl, "thread %u target_quots debugfs file creation failed\n",
+-+			thread->thread_id);
+-+		return;
+-+	}
+-+
+-+	for (i = 0; i < thread->vreg_count; i++)
+-+		cpr3_regulator_debugfs_vreg_add(&thread->vreg[i], thread_dir);
+-+}
+-+
+-+/**
+-+ * cpr3_debug_closed_loop_enable_set() - debugfs callback used to change the
+-+ *		value of the CPR controller cpr_allowed_sw flag which enables or
+-+ *		disables closed-loop operation
+-+ * @data:		Pointer to private data which is equal to the CPR
+-+ *			controller pointer
+-+ * @val:		New value for cpr_allowed_sw
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_debug_closed_loop_enable_set(void *data, u64 val)
+-+{
+-+	struct cpr3_controller *ctrl = data;
+-+	bool enable = !!val;
+-+	int rc;
+-+
+-+	mutex_lock(&ctrl->lock);
+-+
+-+	if (ctrl->cpr_allowed_sw == enable)
+-+		goto done;
+-+
+-+	if (enable && !ctrl->cpr_allowed_hw) {
+-+		cpr3_err(ctrl, "CPR closed-loop operation is not allowed\n");
+-+		goto done;
+-+	}
+-+
+-+	ctrl->cpr_allowed_sw = enable;
+-+
+-+	rc = cpr3_regulator_update_ctrl_state(ctrl);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "could not change CPR enable state=%u, rc=%d\n",
+-+			 enable, rc);
+-+		goto done;
+-+	}
+-+
+-+	if (ctrl->proc_clock_throttle && !ctrl->cpr_enabled) {
+-+		rc = cpr3_clock_enable(ctrl);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "clock enable failed, rc=%d\n",
+-+				 rc);
+-+			goto done;
+-+		}
+-+		ctrl->cpr_enabled = true;
+-+
+-+		cpr3_write(ctrl, CPR3_REG_PD_THROTTLE,
+-+			   CPR3_PD_THROTTLE_DISABLE);
+-+
+-+		cpr3_clock_disable(ctrl);
+-+		ctrl->cpr_enabled = false;
+-+	}
+-+
+-+	cpr3_debug(ctrl, "closed-loop=%s\n", enable ? "enabled" : "disabled");
+-+done:
+-+	mutex_unlock(&ctrl->lock);
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_debug_closed_loop_enable_get() - debugfs callback used to retrieve
+-+ *		the value of the CPR controller cpr_allowed_sw flag which
+-+ *		indicates if closed-loop operation is enabled
+-+ * @data:		Pointer to private data which is equal to the CPR
+-+ *			controller pointer
+-+ * @val:		Output parameter written with the value of
+-+ *			cpr_allowed_sw
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_debug_closed_loop_enable_get(void *data, u64 *val)
+-+{
+-+	struct cpr3_controller *ctrl = data;
+-+
+-+	*val = ctrl->cpr_allowed_sw;
+-+
+-+	return 0;
+-+}
+-+DEFINE_SIMPLE_ATTRIBUTE(cpr3_debug_closed_loop_enable_fops,
+-+			cpr3_debug_closed_loop_enable_get,
+-+			cpr3_debug_closed_loop_enable_set,
+-+			"%llu\n");
+-+
+-+/**
+-+ * cpr3_debug_hw_closed_loop_enable_set() - debugfs callback used to change the
+-+ *		value of the CPR controller use_hw_closed_loop flag which
+-+ *		switches between software closed-loop and hardware closed-loop
+-+ *		operation for CPR3 and CPR4 controllers and between open-loop
+-+ *		and full hardware closed-loop operation for CPRh controllers.
+-+ * @data:		Pointer to private data which is equal to the CPR
+-+ *			controller pointer
+-+ * @val:		New value for use_hw_closed_loop
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_debug_hw_closed_loop_enable_set(void *data, u64 val)
+-+{
+-+	struct cpr3_controller *ctrl = data;
+-+	bool use_hw_closed_loop = !!val;
+-+	struct cpr3_regulator *vreg;
+-+	bool cpr_enabled;
+-+	int i, j, k, rc;
+-+
+-+	mutex_lock(&ctrl->lock);
+-+
+-+	if (ctrl->use_hw_closed_loop == use_hw_closed_loop)
+-+		goto done;
+-+
+-+	if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4) {
+-+		rc = cpr3_ctrl_clear_cpr4_config(ctrl);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "failed to clear CPR4 configuration,rc=%d\n",
+-+				rc);
+-+			goto done;
+-+		}
+-+	}
+-+
+-+	cpr3_ctrl_loop_disable(ctrl);
+-+
+-+	ctrl->use_hw_closed_loop = use_hw_closed_loop;
+-+
+-+	cpr_enabled = ctrl->cpr_enabled;
+-+
+-+	/* Ensure that CPR clocks are enabled before writing to registers. */
+-+	if (!cpr_enabled) {
+-+		rc = cpr3_clock_enable(ctrl);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "clock enable failed, rc=%d\n", rc);
+-+			goto done;
+-+		}
+-+		ctrl->cpr_enabled = true;
+-+	}
+-+
+-+	if (ctrl->use_hw_closed_loop)
+-+		cpr3_write(ctrl, CPR3_REG_IRQ_EN, 0);
+-+
+-+	if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4) {
+-+		cpr3_masked_write(ctrl, CPR4_REG_MARGIN_ADJ_CTL,
+-+			CPR4_MARGIN_ADJ_CTL_HW_CLOSED_LOOP_EN_MASK,
+-+			ctrl->use_hw_closed_loop
+-+			? CPR4_MARGIN_ADJ_CTL_HW_CLOSED_LOOP_ENABLE
+-+			: CPR4_MARGIN_ADJ_CTL_HW_CLOSED_LOOP_DISABLE);
+-+	} else if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR3) {
+-+		cpr3_write(ctrl, CPR3_REG_HW_CLOSED_LOOP,
+-+			ctrl->use_hw_closed_loop
+-+			? CPR3_HW_CLOSED_LOOP_ENABLE
+-+			: CPR3_HW_CLOSED_LOOP_DISABLE);
+-+	}
+-+
+-+	/* Turn off CPR clocks if they were off before this function call. */
+-+	if (!cpr_enabled) {
+-+		cpr3_clock_disable(ctrl);
+-+		ctrl->cpr_enabled = false;
+-+	}
+-+
+-+	if (ctrl->use_hw_closed_loop && ctrl->ctrl_type == CPR_CTRL_TYPE_CPR3) {
+-+		rc = regulator_enable(ctrl->vdd_limit_regulator);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "CPR limit regulator enable failed, rc=%d\n",
+-+				rc);
+-+			goto done;
+-+		}
+-+	} else if (!ctrl->use_hw_closed_loop
+-+			&& ctrl->ctrl_type == CPR_CTRL_TYPE_CPR3) {
+-+		rc = regulator_disable(ctrl->vdd_limit_regulator);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "CPR limit regulator disable failed, rc=%d\n",
+-+				rc);
+-+			goto done;
+-+		}
+-+	}
+-+
+-+	/*
+-+	 * Due to APM and mem-acc floor restriction constraints,
+-+	 * the closed-loop voltage may be different when using
+-+	 * software closed-loop vs hardware closed-loop.  Therefore,
+-+	 * reset the cached closed-loop voltage for all corners to the
+-+	 * corresponding open-loop voltage when switching between
+-+	 * SW and HW closed-loop mode.
+-+	 */
+-+	for (i = 0; i < ctrl->thread_count; i++) {
+-+		for (j = 0; j < ctrl->thread[i].vreg_count; j++) {
+-+			vreg = &ctrl->thread[i].vreg[j];
+-+			for (k = 0; k < vreg->corner_count; k++)
+-+				vreg->corner[k].last_volt
+-+				= vreg->corner[k].open_loop_volt;
+-+		}
+-+	}
+-+
+-+	/* Skip last_volt caching */
+-+	ctrl->last_corner_was_closed_loop = false;
+-+
+-+	rc = cpr3_regulator_update_ctrl_state(ctrl);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "could not change CPR HW closed-loop enable state=%u, rc=%d\n",
+-+			 use_hw_closed_loop, rc);
+-+		goto done;
+-+	}
+-+
+-+	cpr3_debug(ctrl, "CPR mode=%s\n",
+-+		   use_hw_closed_loop ?
+-+		   "HW closed-loop" : "SW closed-loop");
+-+done:
+-+	mutex_unlock(&ctrl->lock);
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_debug_hw_closed_loop_enable_get() - debugfs callback used to retrieve
+-+ *		the value of the CPR controller use_hw_closed_loop flag which
+-+ *		indicates if hardware closed-loop operation is being used in
+-+ *		place of software closed-loop operation
+-+ * @data:		Pointer to private data which is equal to the CPR
+-+ *			controller pointer
+-+ * @val:		Output parameter written with the value of
+-+ *			use_hw_closed_loop
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_debug_hw_closed_loop_enable_get(void *data, u64 *val)
+-+{
+-+	struct cpr3_controller *ctrl = data;
+-+
+-+	*val = ctrl->use_hw_closed_loop;
+-+
+-+	return 0;
+-+}
+-+DEFINE_SIMPLE_ATTRIBUTE(cpr3_debug_hw_closed_loop_enable_fops,
+-+			cpr3_debug_hw_closed_loop_enable_get,
+-+			cpr3_debug_hw_closed_loop_enable_set,
+-+			"%llu\n");
+-+
+-+/**
+-+ * cpr3_debug_trigger_aging_measurement_set() - debugfs callback used to trigger
+-+ *		another CPR measurement
+-+ * @data:		Pointer to private data which is equal to the CPR
+-+ *			controller pointer
+-+ * @val:		Unused
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_debug_trigger_aging_measurement_set(void *data, u64 val)
+-+{
+-+	struct cpr3_controller *ctrl = data;
+-+	int rc;
+-+
+-+	mutex_lock(&ctrl->lock);
+-+
+-+	if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4) {
+-+		rc = cpr3_ctrl_clear_cpr4_config(ctrl);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "failed to clear CPR4 configuration,rc=%d\n",
+-+				rc);
+-+			goto done;
+-+		}
+-+	}
+-+
+-+	cpr3_ctrl_loop_disable(ctrl);
+-+
+-+	cpr3_regulator_set_aging_ref_adjustment(ctrl, INT_MAX);
+-+	ctrl->aging_required = true;
+-+	ctrl->aging_succeeded = false;
+-+	ctrl->aging_failed = false;
+-+
+-+	rc = cpr3_regulator_update_ctrl_state(ctrl);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "could not update the CPR controller state, rc=%d\n",
+-+			rc);
+-+		goto done;
+-+	}
+-+
+-+done:
+-+	mutex_unlock(&ctrl->lock);
+-+	return 0;
+-+}
+-+DEFINE_SIMPLE_ATTRIBUTE(cpr3_debug_trigger_aging_measurement_fops,
+-+			NULL,
+-+			cpr3_debug_trigger_aging_measurement_set,
+-+			"%llu\n");
+-+
+-+/**
+-+ * cpr3_regulator_debugfs_ctrl_add() - add debugfs files to expose configuration
+-+ *		data for the CPR controller
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: none
+-+ */
+-+static void cpr3_regulator_debugfs_ctrl_add(struct cpr3_controller *ctrl)
+-+{
+-+	struct dentry *temp, *aggr_dir;
+-+	int i;
+-+
+-+	/* Add cpr3-regulator base directory if it isn't present already. */
+-+	if (cpr3_debugfs_base == NULL) {
+-+		cpr3_debugfs_base = debugfs_create_dir("cpr3-regulator", NULL);
+-+		if (IS_ERR_OR_NULL(cpr3_debugfs_base)) {
+-+			cpr3_err(ctrl, "cpr3-regulator debugfs base directory creation failed\n");
+-+			cpr3_debugfs_base = NULL;
+-+			return;
+-+		}
+-+	}
+-+
+-+	ctrl->debugfs = debugfs_create_dir(ctrl->name, cpr3_debugfs_base);
+-+	if (IS_ERR_OR_NULL(ctrl->debugfs)) {
+-+		cpr3_err(ctrl, "cpr3-regulator controller debugfs directory creation failed\n");
+-+		return;
+-+	}
+-+
+-+	temp = debugfs_create_file("cpr_closed_loop_enable", S_IRUGO | S_IWUSR,
+-+					ctrl->debugfs, ctrl,
+-+					&cpr3_debug_closed_loop_enable_fops);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(ctrl, "cpr_closed_loop_enable debugfs file creation failed\n");
+-+		return;
+-+	}
+-+
+-+	if (ctrl->supports_hw_closed_loop) {
+-+		temp = debugfs_create_file("use_hw_closed_loop",
+-+					S_IRUGO | S_IWUSR, ctrl->debugfs, ctrl,
+-+					&cpr3_debug_hw_closed_loop_enable_fops);
+-+		if (IS_ERR_OR_NULL(temp)) {
+-+			cpr3_err(ctrl, "use_hw_closed_loop debugfs file creation failed\n");
+-+			return;
+-+		}
+-+	}
+-+
+-+	temp = debugfs_create_int("thread_count", S_IRUGO, ctrl->debugfs,
+-+				  &ctrl->thread_count);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(ctrl, "thread_count debugfs file creation failed\n");
+-+		return;
+-+	}
+-+
+-+	if (ctrl->apm) {
+-+		temp = debugfs_create_int("apm_threshold_volt", S_IRUGO,
+-+				ctrl->debugfs, &ctrl->apm_threshold_volt);
+-+		if (IS_ERR_OR_NULL(temp)) {
+-+			cpr3_err(ctrl, "apm_threshold_volt debugfs file creation failed\n");
+-+			return;
+-+		}
+-+	}
+-+
+-+	if (ctrl->aging_required || ctrl->aging_succeeded
+-+	    || ctrl->aging_failed) {
+-+		temp = debugfs_create_int("aging_adj_volt", S_IRUGO,
+-+				ctrl->debugfs, &ctrl->aging_ref_adjust_volt);
+-+		if (IS_ERR_OR_NULL(temp)) {
+-+			cpr3_err(ctrl, "aging_adj_volt debugfs file creation failed\n");
+-+			return;
+-+		}
+-+
+-+		temp = debugfs_create_file("aging_succeeded", S_IRUGO,
+-+			ctrl->debugfs, &ctrl->aging_succeeded, &fops_bool_ro);
+-+		if (IS_ERR_OR_NULL(temp)) {
+-+			cpr3_err(ctrl, "aging_succeeded debugfs file creation failed\n");
+-+			return;
+-+		}
+-+
+-+		temp = debugfs_create_file("aging_failed", S_IRUGO,
+-+			ctrl->debugfs, &ctrl->aging_failed, &fops_bool_ro);
+-+		if (IS_ERR_OR_NULL(temp)) {
+-+			cpr3_err(ctrl, "aging_failed debugfs file creation failed\n");
+-+			return;
+-+		}
+-+
+-+		temp = debugfs_create_file("aging_trigger", S_IWUSR,
+-+			ctrl->debugfs, ctrl,
+-+			&cpr3_debug_trigger_aging_measurement_fops);
+-+		if (IS_ERR_OR_NULL(temp)) {
+-+			cpr3_err(ctrl, "aging_trigger debugfs file creation failed\n");
+-+			return;
+-+		}
+-+	}
+-+
+-+	aggr_dir = debugfs_create_dir("max_aggregated_voltages", ctrl->debugfs);
+-+	if (IS_ERR_OR_NULL(aggr_dir)) {
+-+		cpr3_err(ctrl, "max_aggregated_voltages debugfs directory creation failed\n");
+-+		return;
+-+	}
+-+
+-+	temp = debugfs_create_int("floor_volt", S_IRUGO, aggr_dir,
+-+				  &ctrl->aggr_corner.floor_volt);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(ctrl, "aggr floor_volt debugfs file creation failed\n");
+-+		return;
+-+	}
+-+
+-+	temp = debugfs_create_int("ceiling_volt", S_IRUGO, aggr_dir,
+-+				  &ctrl->aggr_corner.ceiling_volt);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(ctrl, "aggr ceiling_volt debugfs file creation failed\n");
+-+		return;
+-+	}
+-+
+-+	temp = debugfs_create_int("open_loop_volt", S_IRUGO, aggr_dir,
+-+				  &ctrl->aggr_corner.open_loop_volt);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(ctrl, "aggr open_loop_volt debugfs file creation failed\n");
+-+		return;
+-+	}
+-+
+-+	temp = debugfs_create_int("last_volt", S_IRUGO, aggr_dir,
+-+				  &ctrl->aggr_corner.last_volt);
+-+	if (IS_ERR_OR_NULL(temp)) {
+-+		cpr3_err(ctrl, "aggr last_volt debugfs file creation failed\n");
+-+		return;
+-+	}
+-+
+-+	for (i = 0; i < ctrl->thread_count; i++)
+-+		cpr3_regulator_debugfs_thread_add(&ctrl->thread[i]);
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_debugfs_ctrl_remove() - remove debugfs files for the CPR
+-+ *		controller
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Note, this function must be called after the controller has been removed from
+-+ * cpr3_controller_list and while the cpr3_controller_list_mutex lock is held.
+-+ *
+-+ * Return: none
+-+ */
+-+static void cpr3_regulator_debugfs_ctrl_remove(struct cpr3_controller *ctrl)
+-+{
+-+	if (list_empty(&cpr3_controller_list)) {
+-+		debugfs_remove_recursive(cpr3_debugfs_base);
+-+		cpr3_debugfs_base = NULL;
+-+	} else {
+-+		debugfs_remove_recursive(ctrl->debugfs);
+-+	}
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_init_ctrl_data() - performs initialization of CPR controller
+-+ *					elements
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_regulator_init_ctrl_data(struct cpr3_controller *ctrl)
+-+{
+-+	/* Read the initial vdd voltage from hardware. */
+-+	ctrl->aggr_corner.last_volt
+-+		= regulator_get_voltage(ctrl->vdd_regulator);
+-+	if (ctrl->aggr_corner.last_volt < 0) {
+-+		cpr3_err(ctrl, "regulator_get_voltage(vdd) failed, rc=%d\n",
+-+				ctrl->aggr_corner.last_volt);
+-+		return ctrl->aggr_corner.last_volt;
+-+	}
+-+	ctrl->aggr_corner.open_loop_volt = ctrl->aggr_corner.last_volt;
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_init_vreg_data() - performs initialization of common CPR3
+-+ *		regulator elements and validate aging configurations
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_regulator_init_vreg_data(struct cpr3_regulator *vreg)
+-+{
+-+	int i, j;
+-+	bool init_aging;
+-+
+-+	vreg->current_corner = CPR3_REGULATOR_CORNER_INVALID;
+-+	vreg->last_closed_loop_corner = CPR3_REGULATOR_CORNER_INVALID;
+-+
+-+	init_aging = vreg->aging_allowed && vreg->thread->ctrl->aging_required;
+-+
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		vreg->corner[i].last_volt = vreg->corner[i].open_loop_volt;
+-+		vreg->corner[i].irq_en = CPR3_IRQ_UP | CPR3_IRQ_DOWN;
+-+
+-+		vreg->corner[i].ro_mask = 0;
+-+		for (j = 0; j < CPR3_RO_COUNT; j++) {
+-+			if (vreg->corner[i].target_quot[j] == 0)
+-+				vreg->corner[i].ro_mask |= BIT(j);
+-+		}
+-+
+-+		if (init_aging) {
+-+			vreg->corner[i].unaged_floor_volt
+-+				= vreg->corner[i].floor_volt;
+-+			vreg->corner[i].unaged_ceiling_volt
+-+				= vreg->corner[i].ceiling_volt;
+-+			vreg->corner[i].unaged_open_loop_volt
+-+				= vreg->corner[i].open_loop_volt;
+-+		}
+-+
+-+		if (vreg->aging_allowed) {
+-+			if (vreg->corner[i].unaged_floor_volt <= 0) {
+-+				cpr3_err(vreg, "invalid unaged_floor_volt[%d] = %d\n",
+-+					i, vreg->corner[i].unaged_floor_volt);
+-+				return -EINVAL;
+-+			}
+-+			if (vreg->corner[i].unaged_ceiling_volt <= 0) {
+-+				cpr3_err(vreg, "invalid unaged_ceiling_volt[%d] = %d\n",
+-+					i, vreg->corner[i].unaged_ceiling_volt);
+-+				return -EINVAL;
+-+			}
+-+			if (vreg->corner[i].unaged_open_loop_volt <= 0) {
+-+				cpr3_err(vreg, "invalid unaged_open_loop_volt[%d] = %d\n",
+-+				      i, vreg->corner[i].unaged_open_loop_volt);
+-+				return -EINVAL;
+-+			}
+-+		}
+-+	}
+-+
+-+	if (vreg->aging_allowed && vreg->corner[vreg->aging_corner].ceiling_volt
+-+	    > vreg->thread->ctrl->aging_ref_volt) {
+-+		cpr3_err(vreg, "aging corner %d ceiling voltage = %d > aging ref voltage = %d uV\n",
+-+			vreg->aging_corner,
+-+			vreg->corner[vreg->aging_corner].ceiling_volt,
+-+			vreg->thread->ctrl->aging_ref_volt);
+-+		return -EINVAL;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_suspend() - perform common required CPR3 power down steps
+-+ *		before the system enters suspend
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_regulator_suspend(struct cpr3_controller *ctrl)
+-+{
+-+	int rc;
+-+
+-+	mutex_lock(&ctrl->lock);
+-+
+-+	if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4) {
+-+		rc = cpr3_ctrl_clear_cpr4_config(ctrl);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "failed to clear CPR4 configuration,rc=%d\n",
+-+				rc);
+-+			mutex_unlock(&ctrl->lock);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	cpr3_ctrl_loop_disable(ctrl);
+-+
+-+	rc = cpr3_closed_loop_disable(ctrl);
+-+	if (rc)
+-+		cpr3_err(ctrl, "could not disable CPR, rc=%d\n", rc);
+-+
+-+	ctrl->cpr_suspended = true;
+-+
+-+	mutex_unlock(&ctrl->lock);
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_resume() - perform common required CPR3 power up steps after
+-+ *		the system resumes from suspend
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_regulator_resume(struct cpr3_controller *ctrl)
+-+{
+-+	int rc;
+-+
+-+	mutex_lock(&ctrl->lock);
+-+
+-+	ctrl->cpr_suspended = false;
+-+	rc = cpr3_regulator_update_ctrl_state(ctrl);
+-+	if (rc)
+-+		cpr3_err(ctrl, "could not enable CPR, rc=%d\n", rc);
+-+
+-+	mutex_unlock(&ctrl->lock);
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_validate_controller() - verify the data passed in via the
+-+ *		cpr3_controller data structure
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_regulator_validate_controller(struct cpr3_controller *ctrl)
+-+{
+-+	struct cpr3_thread *thread;
+-+	struct cpr3_regulator *vreg;
+-+	int i, j, allow_boost_vreg_count = 0;
+-+
+-+	if (!ctrl->vdd_regulator) {
+-+		cpr3_err(ctrl, "vdd regulator missing\n");
+-+		return -EINVAL;
+-+	} else if (ctrl->sensor_count <= 0
+-+		   || ctrl->sensor_count > CPR3_MAX_SENSOR_COUNT) {
+-+		cpr3_err(ctrl, "invalid CPR sensor count=%d\n",
+-+			ctrl->sensor_count);
+-+		return -EINVAL;
+-+	} else if (!ctrl->sensor_owner) {
+-+		cpr3_err(ctrl, "CPR sensor ownership table missing\n");
+-+		return -EINVAL;
+-+	}
+-+
+-+	if (ctrl->aging_required) {
+-+		for (i = 0; i < ctrl->aging_sensor_count; i++) {
+-+			if (ctrl->aging_sensor[i].sensor_id
+-+			    >= ctrl->sensor_count) {
+-+				cpr3_err(ctrl, "aging_sensor[%d] id=%u is not in the value range 0-%d",
+-+					i, ctrl->aging_sensor[i].sensor_id,
+-+					ctrl->sensor_count - 1);
+-+				return -EINVAL;
+-+			}
+-+		}
+-+	}
+-+
+-+	for (i = 0; i < ctrl->thread_count; i++) {
+-+		thread = &ctrl->thread[i];
+-+		for (j = 0; j < thread->vreg_count; j++) {
+-+			vreg = &thread->vreg[j];
+-+			if (vreg->allow_boost)
+-+				allow_boost_vreg_count++;
+-+		}
+-+	}
+-+
+-+	if (allow_boost_vreg_count > 1) {
+-+		/*
+-+		 * Boost feature is not allowed to be used for more
+-+		 * than one CPR3 regulator of a CPR3 controller.
+-+		 */
+-+		cpr3_err(ctrl, "Boost feature is enabled for more than one regulator\n");
+-+		return -EINVAL;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_panic_callback() - panic notification callback function. This function
+-+ *		is invoked when a kernel panic occurs.
+-+ * @nfb:	Notifier block pointer of CPR3 controller
+-+ * @event:	Value passed unmodified to notifier function
+-+ * @data:	Pointer passed unmodified to notifier function
+-+ *
+-+ * Return: NOTIFY_OK
+-+ */
+-+static int cpr3_panic_callback(struct notifier_block *nfb,
+-+			unsigned long event, void *data)
+-+{
+-+	struct cpr3_controller *ctrl = container_of(nfb,
+-+				struct cpr3_controller, panic_notifier);
+-+	struct cpr3_panic_regs_info *regs_info = ctrl->panic_regs_info;
+-+	struct cpr3_reg_info *reg;
+-+	int i = 0;
+-+
+-+	for (i = 0; i < regs_info->reg_count; i++) {
+-+		reg = &(regs_info->regs[i]);
+-+		reg->value = readl_relaxed(reg->virt_addr);
+-+		pr_err("%s[0x%08x] = 0x%08x\n", reg->name, reg->addr,
+-+			reg->value);
+-+	}
+-+	/*
+-+	 * Barrier to ensure that the information has been updated in the
+-+	 * structure.
+-+	 */
+-+	mb();
+-+
+-+	return NOTIFY_OK;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_register() - register the regulators for a CPR3 controller and
+-+ *		perform CPR hardware initialization
+-+ * @pdev:		Platform device pointer for the CPR3 controller
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_regulator_register(struct platform_device *pdev,
+-+			struct cpr3_controller *ctrl)
+-+{
+-+	struct device *dev = &pdev->dev;
+-+	struct resource *res;
+-+	int i, j, rc;
+-+
+-+	if (!dev->of_node) {
+-+		dev_err(dev, "%s: Device tree node is missing\n", __func__);
+-+		return -EINVAL;
+-+	}
+-+
+-+	if (!ctrl || !ctrl->name) {
+-+		dev_err(dev, "%s: CPR controller data is missing\n", __func__);
+-+		return -EINVAL;
+-+	}
+-+
+-+	rc = cpr3_regulator_validate_controller(ctrl);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "controller validation failed, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	mutex_init(&ctrl->lock);
+-+
+-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cpr_ctrl");
+-+	if (!res || !res->start) {
+-+		cpr3_err(ctrl, "CPR controller address is missing\n");
+-+		return -ENXIO;
+-+	}
+-+	ctrl->cpr_ctrl_base = devm_ioremap(dev, res->start, resource_size(res));
+-+
+-+	if (ctrl->aging_possible_mask) {
+-+		/*
+-+		 * Aging possible register address is required if an aging
+-+		 * possible mask has been specified.
+-+		 */
+-+		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+-+						"aging_allowed");
+-+		if (!res || !res->start) {
+-+			cpr3_err(ctrl, "CPR aging allowed address is missing\n");
+-+			return -ENXIO;
+-+		}
+-+		ctrl->aging_possible_reg = devm_ioremap(dev, res->start,
+-+							resource_size(res));
+-+	}
+-+
+-+	ctrl->irq = platform_get_irq_byname(pdev, "cpr");
+-+	if (ctrl->irq < 0) {
+-+		cpr3_err(ctrl, "missing CPR interrupt\n");
+-+		return ctrl->irq;
+-+	}
+-+
+-+	if (ctrl->supports_hw_closed_loop) {
+-+		if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR3) {
+-+			ctrl->ceiling_irq = platform_get_irq_byname(pdev,
+-+						"ceiling");
+-+			if (ctrl->ceiling_irq < 0) {
+-+				cpr3_err(ctrl, "missing ceiling interrupt\n");
+-+				return ctrl->ceiling_irq;
+-+			}
+-+		}
+-+	}
+-+
+-+	rc = cpr3_regulator_init_ctrl_data(ctrl);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "CPR controller data initialization failed, rc=%d\n",
+-+			 rc);
+-+		return rc;
+-+	}
+-+
+-+	for (i = 0; i < ctrl->thread_count; i++) {
+-+		for (j = 0; j < ctrl->thread[i].vreg_count; j++) {
+-+			rc = cpr3_regulator_init_vreg_data(
+-+						&ctrl->thread[i].vreg[j]);
+-+			if (rc)
+-+				return rc;
+-+			cpr3_print_quots(&ctrl->thread[i].vreg[j]);
+-+		}
+-+	}
+-+
+-+	/*
+-+	 * Add the maximum possible aging voltage margin until it is possible
+-+	 * to perform an aging measurement.
+-+	 */
+-+	if (ctrl->aging_required)
+-+		cpr3_regulator_set_aging_ref_adjustment(ctrl, INT_MAX);
+-+
+-+	rc = cpr3_regulator_init_ctrl(ctrl);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "CPR controller initialization failed, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+
+-+	/* Register regulator devices for all threads. */
+-+	for (i = 0; i < ctrl->thread_count; i++) {
+-+		for (j = 0; j < ctrl->thread[i].vreg_count; j++) {
+-+			rc = cpr3_regulator_vreg_register(
+-+					&ctrl->thread[i].vreg[j]);
+-+			if (rc) {
+-+				cpr3_err(&ctrl->thread[i].vreg[j], "failed to register regulator, rc=%d\n",
+-+					rc);
+-+				goto free_regulators;
+-+			}
+-+		}
+-+	}
+-+
+-+	rc = devm_request_threaded_irq(dev, ctrl->irq, NULL,
+-+				       cpr3_irq_handler,
+-+				       IRQF_ONESHOT |
+-+				       IRQF_TRIGGER_RISING,
+-+				       "cpr3", ctrl);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "could not request IRQ %d, rc=%d\n",
+-+			 ctrl->irq, rc);
+-+		goto free_regulators;
+-+	}
+-+
+-+	if (ctrl->supports_hw_closed_loop &&
+-+	    ctrl->ctrl_type == CPR_CTRL_TYPE_CPR3) {
+-+		rc = devm_request_threaded_irq(dev, ctrl->ceiling_irq, NULL,
+-+			cpr3_ceiling_irq_handler,
+-+			IRQF_ONESHOT | IRQF_TRIGGER_RISING,
+-+			"cpr3_ceiling", ctrl);
+-+		if (rc) {
+-+			cpr3_err(ctrl, "could not request ceiling IRQ %d, rc=%d\n",
+-+				ctrl->ceiling_irq, rc);
+-+			goto free_regulators;
+-+		}
+-+	}
+-+
+-+	mutex_lock(&cpr3_controller_list_mutex);
+-+	cpr3_regulator_debugfs_ctrl_add(ctrl);
+-+	list_add(&ctrl->list, &cpr3_controller_list);
+-+	mutex_unlock(&cpr3_controller_list_mutex);
+-+
+-+	if (ctrl->panic_regs_info) {
+-+		/* Register panic notification call back */
+-+		ctrl->panic_notifier.notifier_call = cpr3_panic_callback;
+-+		atomic_notifier_chain_register(&panic_notifier_list,
+-+			&ctrl->panic_notifier);
+-+	}
+-+
+-+	return 0;
+-+
+-+free_regulators:
+-+	for (i = 0; i < ctrl->thread_count; i++)
+-+		for (j = 0; j < ctrl->thread[i].vreg_count; j++)
+-+			if (!IS_ERR_OR_NULL(ctrl->thread[i].vreg[j].rdev))
+-+				regulator_unregister(
+-+					ctrl->thread[i].vreg[j].rdev);
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_open_loop_regulator_register() - register the regulators for a CPR3
+-+ *			controller which will always work in Open loop and
+-+ *			won't support close loop.
+-+ * @pdev:		Platform device pointer for the CPR3 controller
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_open_loop_regulator_register(struct platform_device *pdev,
+-+				      struct cpr3_controller *ctrl)
+-+{
+-+	struct device *dev = &pdev->dev;
+-+	struct cpr3_regulator *vreg;
+-+	int i, j, rc;
+-+
+-+	if (!dev->of_node) {
+-+		dev_err(dev, "%s: Device tree node is missing\n", __func__);
+-+		return -EINVAL;
+-+	}
+-+
+-+	if (!ctrl || !ctrl->name) {
+-+		dev_err(dev, "%s: CPR controller data is missing\n", __func__);
+-+		return -EINVAL;
+-+	}
+-+
+-+	if (!ctrl->vdd_regulator) {
+-+		cpr3_err(ctrl, "vdd regulator missing\n");
+-+		return -EINVAL;
+-+	}
+-+
+-+	mutex_init(&ctrl->lock);
+-+
+-+	rc = cpr3_regulator_init_ctrl_data(ctrl);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "CPR controller data initialization failed, rc=%d\n",
+-+			 rc);
+-+		return rc;
+-+	}
+-+
+-+	for (i = 0; i < ctrl->thread_count; i++) {
+-+		for (j = 0; j < ctrl->thread[i].vreg_count; j++) {
+-+			vreg = &ctrl->thread[i].vreg[j];
+-+			vreg->corner[i].last_volt =
+-+				vreg->corner[i].open_loop_volt;
+-+		}
+-+	}
+-+
+-+	/* Register regulator devices for all threads. */
+-+	for (i = 0; i < ctrl->thread_count; i++) {
+-+		for (j = 0; j < ctrl->thread[i].vreg_count; j++) {
+-+			rc = cpr3_regulator_vreg_register(
+-+					&ctrl->thread[i].vreg[j]);
+-+			if (rc) {
+-+				cpr3_err(&ctrl->thread[i].vreg[j], "failed to register regulator, rc=%d\n",
+-+					 rc);
+-+				goto free_regulators;
+-+			}
+-+		}
+-+	}
+-+
+-+	mutex_lock(&cpr3_controller_list_mutex);
+-+	list_add(&ctrl->list, &cpr3_controller_list);
+-+	mutex_unlock(&cpr3_controller_list_mutex);
+-+
+-+	return 0;
+-+
+-+free_regulators:
+-+	for (i = 0; i < ctrl->thread_count; i++)
+-+		for (j = 0; j < ctrl->thread[i].vreg_count; j++)
+-+			if (!IS_ERR_OR_NULL(ctrl->thread[i].vreg[j].rdev))
+-+				regulator_unregister(
+-+					ctrl->thread[i].vreg[j].rdev);
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_regulator_unregister() - unregister the regulators for a CPR3 controller
+-+ *		and perform CPR hardware shutdown
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_regulator_unregister(struct cpr3_controller *ctrl)
+-+{
+-+	int i, j, rc = 0;
+-+
+-+	mutex_lock(&cpr3_controller_list_mutex);
+-+	list_del(&ctrl->list);
+-+	cpr3_regulator_debugfs_ctrl_remove(ctrl);
+-+	mutex_unlock(&cpr3_controller_list_mutex);
+-+
+-+	if (ctrl->ctrl_type == CPR_CTRL_TYPE_CPR4) {
+-+		rc = cpr3_ctrl_clear_cpr4_config(ctrl);
+-+		if (rc)
+-+			cpr3_err(ctrl, "failed to clear CPR4 configuration,rc=%d\n",
+-+				rc);
+-+	}
+-+
+-+	cpr3_ctrl_loop_disable(ctrl);
+-+
+-+	cpr3_closed_loop_disable(ctrl);
+-+
+-+	if (ctrl->vdd_limit_regulator) {
+-+		regulator_disable(ctrl->vdd_limit_regulator);
+-+	}
+-+
+-+	for (i = 0; i < ctrl->thread_count; i++)
+-+		for (j = 0; j < ctrl->thread[i].vreg_count; j++)
+-+			regulator_unregister(ctrl->thread[i].vreg[j].rdev);
+-+
+-+	if (ctrl->panic_notifier.notifier_call)
+-+		atomic_notifier_chain_unregister(&panic_notifier_list,
+-+			&ctrl->panic_notifier);
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_open_loop_regulator_unregister() - unregister the regulators for a CPR3
+-+ *			open loop controller and perform CPR hardware shutdown
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_open_loop_regulator_unregister(struct cpr3_controller *ctrl)
+-+{
+-+	int i, j;
+-+
+-+	mutex_lock(&cpr3_controller_list_mutex);
+-+	list_del(&ctrl->list);
+-+	mutex_unlock(&cpr3_controller_list_mutex);
+-+
+-+	if (ctrl->vdd_limit_regulator) {
+-+		regulator_disable(ctrl->vdd_limit_regulator);
+-+	}
+-+
+-+	for (i = 0; i < ctrl->thread_count; i++)
+-+		for (j = 0; j < ctrl->thread[i].vreg_count; j++)
+-+			regulator_unregister(ctrl->thread[i].vreg[j].rdev);
+-+
+-+	if (ctrl->panic_notifier.notifier_call)
+-+		atomic_notifier_chain_unregister(&panic_notifier_list,
+-+			&ctrl->panic_notifier);
+-+
+-+	return 0;
+-+}
+---- /dev/null
+-+++ b/drivers/regulator/cpr3-regulator.h
+-@@ -0,0 +1,1211 @@
+-+/*
+-+ * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+-+ *
+-+ * This program is free software; you can redistribute it and/or modify
+-+ * it under the terms of the GNU General Public License version 2 and
+-+ * only version 2 as published by the Free Software Foundation.
+-+ *
+-+ * This program is distributed in the hope that it will be useful,
+-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-+ * GNU General Public License for more details.
+-+ */
+-+
+-+#ifndef __REGULATOR_CPR3_REGULATOR_H__
+-+#define __REGULATOR_CPR3_REGULATOR_H__
+-+
+-+#include <linux/clk.h>
+-+#include <linux/mutex.h>
+-+#include <linux/of.h>
+-+#include <linux/platform_device.h>
+-+#include <linux/types.h>
+-+#include <linux/power/qcom/apm.h>
+-+#include <linux/regulator/driver.h>
+-+
+-+struct cpr3_controller;
+-+struct cpr3_thread;
+-+
+-+/**
+-+ * struct cpr3_fuse_param - defines one contiguous segment of a fuse parameter
+-+ *			    that is contained within a given row.
+-+ * @row:	Fuse row number
+-+ * @bit_start:	The first bit within the row of the fuse parameter segment
+-+ * @bit_end:	The last bit within the row of the fuse parameter segment
+-+ *
+-+ * Each fuse row is 64 bits in length.  bit_start and bit_end may take values
+-+ * from 0 to 63.  bit_start must be less than or equal to bit_end.
+-+ */
+-+struct cpr3_fuse_param {
+-+	unsigned		row;
+-+	unsigned		bit_start;
+-+	unsigned		bit_end;
+-+};
+-+
+-+/* Each CPR3 sensor has 16 ring oscillators */
+-+#define CPR3_RO_COUNT		16
+-+
+-+/* The maximum number of sensors that can be present on a single CPR loop. */
+-+#define CPR3_MAX_SENSOR_COUNT	256
+-+
+-+/* This constant is used when allocating array printing buffers. */
+-+#define MAX_CHARS_PER_INT	10
+-+
+-+/**
+-+ * struct cpr4_sdelta - CPR4 controller specific data structure for the sdelta
+-+ *			adjustment table which is used to adjust the VDD supply
+-+ *			voltage automatically based upon the temperature and/or
+-+ *			the number of online CPU cores.
+-+ * @allow_core_count_adj: Core count adjustments are allowed.
+-+ * @allow_temp_adj:	Temperature based adjustments are allowed.
+-+ * @max_core_count:	Maximum number of cores considered for core count
+-+ *			adjustment logic.
+-+ * @temp_band_count:	Number of temperature bands considered for temperature
+-+ *			based adjustment logic.
+-+ * @cap_volt:		CAP in uV to apply to SDELTA margins with multiple
+-+ *			cpr3-regulators defined for single controller.
+-+ * @table:		SDELTA table with per-online-core and temperature based
+-+ *			adjustments of size (max_core_count * temp_band_count)
+-+ *			Outer: core count
+-+ *			Inner: temperature band
+-+ *			Each element has units of VDD supply steps. Positive
+-+ *			values correspond to a reduction in voltage and negative
+-+ *			value correspond to an increase (this follows the SDELTA
+-+ *			register semantics).
+-+ * @allow_boost:	Voltage boost allowed.
+-+ * @boost_num_cores:	The number of online cores at which the boost voltage
+-+ *			adjustments will be applied
+-+ * @boost_table:	SDELTA table with boost voltage adjustments of size
+-+ *			temp_band_count. Each element has units of VDD supply
+-+ *			steps. Positive values correspond to a reduction in
+-+ *			voltage and negative value correspond to an increase
+-+ *			(this follows the SDELTA register semantics).
+-+ */
+-+struct cpr4_sdelta {
+-+	bool	allow_core_count_adj;
+-+	bool	allow_temp_adj;
+-+	int	max_core_count;
+-+	int	temp_band_count;
+-+	int	cap_volt;
+-+	int	*table;
+-+	bool	allow_boost;
+-+	int	boost_num_cores;
+-+	int	*boost_table;
+-+};
+-+
+-+/**
+-+ * struct cpr3_corner - CPR3 virtual voltage corner data structure
+-+ * @floor_volt:		CPR closed-loop floor voltage in microvolts
+-+ * @ceiling_volt:	CPR closed-loop ceiling voltage in microvolts
+-+ * @open_loop_volt:	CPR open-loop voltage (i.e. initial voltage) in
+-+ *			microvolts
+-+ * @last_volt:		Last known settled CPR closed-loop voltage which is used
+-+ *			when switching to a new corner
+-+ * @abs_ceiling_volt:	The absolute CPR closed-loop ceiling voltage in
+-+ *			microvolts.  This is used to limit the ceiling_volt
+-+ *			value when it is increased as a result of aging
+-+ *			adjustment.
+-+ * @unaged_floor_volt:	The CPR closed-loop floor voltage in microvolts before
+-+ *			any aging adjustment is performed
+-+ * @unaged_ceiling_volt: The CPR closed-loop ceiling voltage in microvolts
+-+ *			before any aging adjustment is performed
+-+ * @unaged_open_loop_volt: The CPR open-loop voltage (i.e. initial voltage) in
+-+ *			microvolts before any aging adjusment is performed
+-+ * @system_volt:	The system-supply voltage in microvolts or corners or
+-+ *			levels
+-+ * @mem_acc_volt:	The mem-acc-supply voltage in corners
+-+ * @proc_freq:		Processor frequency in Hertz. For CPR rev. 3 and 4
+-+ *			conrollers, this field is only used by platform specific
+-+ *			CPR3 driver for interpolation. For CPRh-compliant
+-+ *			controllers, this frequency is also utilized by the
+-+ *			clock driver to determine the corner to CPU clock
+-+ *			frequency mappings.
+-+ * @cpr_fuse_corner:	Fused corner index associated with this virtual corner
+-+ *			(only used by platform specific CPR3 driver for
+-+ *			mapping purposes)
+-+ * @target_quot:	Array of target quotient values to use for each ring
+-+ *			oscillator (RO) for this corner.  A value of 0 should be
+-+ *			specified as the target quotient for each RO that is
+-+ *			unused by this corner.
+-+ * @ro_scale:		Array of CPR ring oscillator (RO) scaling factors.  The
+-+ *			scaling factor for each RO is defined from RO0 to RO15
+-+ *			with units of QUOT/V.  A value of 0 may be specified for
+-+ *			an RO that is unused.
+-+ * @ro_mask:		Bitmap where each of the 16 LSBs indicate if the
+-+ *			corresponding ROs should be masked for this corner
+-+ * @irq_en:		Bitmap of the CPR interrupts to enable for this corner
+-+ * @aging_derate:	The amount to derate the aging voltage adjustment
+-+ *			determined for the reference corner in units of uV/mV.
+-+ *			E.g. a value of 900 would imply that the adjustment for
+-+ *			this corner should be 90% (900/1000) of that for the
+-+ *			reference corner.
+-+ * @use_open_loop:	Boolean indicating that open-loop (i.e CPR disabled) as
+-+ *			opposed to closed-loop operation must be used for this
+-+ *			corner on CPRh controllers.
+-+ * @sdelta:		The CPR4 controller specific data for this corner. This
+-+ *			field is applicable for CPR4 controllers.
+-+ *
+-+ * The value of last_volt is initialized inside of the cpr3_regulator_register()
+-+ * call with the open_loop_volt value.  It can later be updated to the settled
+-+ * VDD supply voltage.  The values for unaged_floor_volt, unaged_ceiling_volt,
+-+ * and unaged_open_loop_volt are initialized inside of cpr3_regulator_register()
+-+ * if ctrl->aging_required == true.  These three values must be pre-initialized
+-+ * if cpr3_regulator_register() is called with ctrl->aging_required == false and
+-+ * ctrl->aging_succeeded == true.
+-+ *
+-+ * The values of ro_mask and irq_en are initialized inside of the
+-+ * cpr3_regulator_register() call.
+-+ */
+-+struct cpr3_corner {
+-+	int			floor_volt;
+-+	int			ceiling_volt;
+-+	int			cold_temp_open_loop_volt;
+-+	int			normal_temp_open_loop_volt;
+-+	int			open_loop_volt;
+-+	int			last_volt;
+-+	int			abs_ceiling_volt;
+-+	int			unaged_floor_volt;
+-+	int			unaged_ceiling_volt;
+-+	int			unaged_open_loop_volt;
+-+	int			system_volt;
+-+	int			mem_acc_volt;
+-+	u32			proc_freq;
+-+	int			cpr_fuse_corner;
+-+	u32			target_quot[CPR3_RO_COUNT];
+-+	u32			ro_scale[CPR3_RO_COUNT];
+-+	u32			ro_mask;
+-+	u32			irq_en;
+-+	int			aging_derate;
+-+	bool			use_open_loop;
+-+	struct cpr4_sdelta	*sdelta;
+-+};
+-+
+-+/**
+-+ * struct cprh_corner_band - CPRh controller specific data structure which
+-+ *			encapsulates the range of corners and the SDELTA
+-+ *			adjustment table to be applied to the corners within
+-+ *			the min and max bounds of the corner band.
+-+ * @corner:		Corner number which defines the corner band boundary
+-+ * @sdelta:		The SDELTA adjustment table which contains core-count
+-+ *			and temp based margin adjustments that are applicable
+-+ *			to the corner band.
+-+ */
+-+struct cprh_corner_band {
+-+	int			corner;
+-+	struct cpr4_sdelta	*sdelta;
+-+};
+-+
+-+/**
+-+ * struct cpr3_fuse_parameters - CPR4 fuse specific data structure which has
+-+ * 			the required fuse parameters need for Close Loop CPR
+-+ * @(*apss_ro_sel_param)[2]:       Pointer to RO select fuse details
+-+ * @(*apss_init_voltage_param)[2]: Pointer to Target voltage fuse details
+-+ * @(*apss_target_quot_param)[2]:  Pointer to Target quot fuse details
+-+ * @(*apss_quot_offset_param)[2]:  Pointer to quot offset fuse details
+-+ * @cpr_fusing_rev_param:          Pointer to CPR revision fuse details
+-+ * @apss_speed_bin_param:          Pointer to Speed bin fuse details
+-+ * @cpr_boost_fuse_cfg_param:      Pointer to Boost fuse cfg details
+-+ * @apss_boost_fuse_volt_param:    Pointer to Boost fuse volt details
+-+ * @misc_fuse_volt_adj_param:      Pointer to Misc fuse volt fuse details
+-+ */
+-+struct cpr3_fuse_parameters {
+-+	struct cpr3_fuse_param (*apss_ro_sel_param)[2];
+-+	struct cpr3_fuse_param (*apss_init_voltage_param)[2];
+-+	struct cpr3_fuse_param (*apss_target_quot_param)[2];
+-+	struct cpr3_fuse_param (*apss_quot_offset_param)[2];
+-+	struct cpr3_fuse_param *cpr_fusing_rev_param;
+-+	struct cpr3_fuse_param *apss_speed_bin_param;
+-+	struct cpr3_fuse_param *cpr_boost_fuse_cfg_param;
+-+	struct cpr3_fuse_param *apss_boost_fuse_volt_param;
+-+	struct cpr3_fuse_param *misc_fuse_volt_adj_param;
+-+};
+-+
+-+struct cpr4_mem_acc_func {
+-+	void (*set_mem_acc)(struct regulator_dev *);
+-+	void (*clear_mem_acc)(struct regulator_dev *);
+-+};
+-+
+-+/**
+-+ * struct cpr4_reg_data - CPR4 regulator specific data structure which is
+-+ * target specific
+-+ * @cpr_valid_fuse_count: Number of valid fuse corners
+-+ * @fuse_ref_volt: 	  Pointer to fuse reference voltage
+-+ * @fuse_step_volt: 	  CPR step voltage available in fuse
+-+ * @cpr_clk_rate: 	  CPR clock rate
+-+ * @boost_fuse_ref_volt:  Boost fuse reference voltage
+-+ * @boost_ceiling_volt:   Boost ceiling voltage
+-+ * @boost_floor_volt: 	  Boost floor voltage
+-+ * @cpr3_fuse_params:     Pointer to CPR fuse parameters
+-+ * @mem_acc_funcs:        Pointer to MEM ACC set/clear functions
+-+ **/
+-+struct cpr4_reg_data {
+-+	u32 cpr_valid_fuse_count;
+-+	int *fuse_ref_volt;
+-+	u32 fuse_step_volt;
+-+	u32 cpr_clk_rate;
+-+	int boost_fuse_ref_volt;
+-+	int boost_ceiling_volt;
+-+	int boost_floor_volt;
+-+	struct cpr3_fuse_parameters *cpr3_fuse_params;
+-+	struct cpr4_mem_acc_func *mem_acc_funcs;
+-+};
+-+/**
+-+ * struct cpr3_reg_data - CPR3 regulator specific data structure which is
+-+ * target specific
+-+ * @cpr_valid_fuse_count: Number of valid fuse corners
+-+ * @(*init_voltage_param)[2]: Pointer to Target voltage fuse details
+-+ * @fuse_ref_volt: 	  Pointer to fuse reference voltage
+-+ * @fuse_step_volt: 	  CPR step voltage available in fuse
+-+ * @cpr_clk_rate: 	  CPR clock rate
+-+ * @cpr3_fuse_params:     Pointer to CPR fuse parameters
+-+ **/
+-+struct cpr3_reg_data {
+-+	u32 cpr_valid_fuse_count;
+-+	struct cpr3_fuse_param (*init_voltage_param)[2];
+-+	int *fuse_ref_volt;
+-+	u32 fuse_step_volt;
+-+	u32 cpr_clk_rate;
+-+};
+-+
+-+/**
+-+ * struct cpr3_regulator - CPR3 logical regulator instance associated with a
+-+ *			given CPR3 hardware thread
+-+ * @of_node:		Device node associated with the device tree child node
+-+ *			of this CPR3 regulator
+-+ * @thread:		Pointer to the CPR3 thread which manages this CPR3
+-+ *			regulator
+-+ * @name:		Unique name for this CPR3 regulator which is filled
+-+ *			using the device tree regulator-name property
+-+ * @rdesc:		Regulator description for this CPR3 regulator
+-+ * @rdev:		Regulator device pointer for the regulator registered
+-+ *			for this CPR3 regulator
+-+ * @mem_acc_regulator:	Pointer to the optional mem-acc supply regulator used
+-+ *			to manage memory circuitry settings based upon CPR3
+-+ *			regulator output voltage.
+-+ * @corner:		Array of all corners supported by this CPR3 regulator
+-+ * @corner_count:	The number of elements in the corner array
+-+ * @corner_band:	Array of all corner bands supported by CPRh compatible
+-+ *			controllers
+-+ * @cpr4_regulator_data Target specific cpr4 regulator data
+-+ * @cpr3_regulator_data Target specific cpr3 regulator data
+-+ * @corner_band_count:	The number of elements in the corner band array
+-+ * @platform_fuses:	Pointer to platform specific CPR fuse data (only used by
+-+ *			platform specific CPR3 driver)
+-+ * @speed_bin_fuse:	Value read from the speed bin fuse parameter
+-+ * @speed_bins_supported: The number of speed bins supported by the device tree
+-+ *			configuration for this CPR3 regulator
+-+ * @cpr_rev_fuse:	Value read from the CPR fusing revision fuse parameter
+-+ * @fuse_combo:		Platform specific enum value identifying the specific
+-+ *			combination of fuse values found on a given chip
+-+ * @fuse_combos_supported: The number of fuse combinations supported by the
+-+ *			device tree configuration for this CPR3 regulator
+-+ * @fuse_corner_count:	Number of corners defined by fuse parameters
+-+ * @fuse_corner_map:	Array of length fuse_corner_count which specifies the
+-+ *			highest corner associated with each fuse corner.  Note
+-+ *			that each element must correspond to a valid corner
+-+ *			and that element values must be strictly increasing.
+-+ *			Also, it is acceptable for the lowest fuse corner to map
+-+ *			to a corner other than the lowest.  Likewise, it is
+-+ *			acceptable for the highest fuse corner to map to a
+-+ *			corner other than the highest.
+-+ * @fuse_combo_corner_sum: The sum of the corner counts across all fuse combos
+-+ * @fuse_combo_offset:	The device tree property array offset for the selected
+-+ *			fuse combo
+-+ * @speed_bin_corner_sum: The sum of the corner counts across all speed bins
+-+ *			This may be specified as 0 if per speed bin parsing
+-+ *			support is not required.
+-+ * @speed_bin_offset:	The device tree property array offset for the selected
+-+ *			speed bin
+-+ * @fuse_combo_corner_band_sum: The sum of the corner band counts across all
+-+ *			fuse combos
+-+ * @fuse_combo_corner_band_offset: The device tree property array offset for
+-+ *			the corner band count corresponding to the selected
+-+ *			fuse combo
+-+ * @speed_bin_corner_band_sum: The sum of the corner band counts across all
+-+ *			speed bins. This may be specified as 0 if per speed bin
+-+ *			parsing support is not required
+-+ * @speed_bin_corner_band_offset: The device tree property array offset for the
+-+ *			corner band count corresponding to the selected speed
+-+ *			bin
+-+ * @pd_bypass_mask:	Bit mask of power domains associated with this CPR3
+-+ *			regulator
+-+ * @dynamic_floor_corner: Index identifying the voltage corner for the CPR3
+-+ *			regulator whose last_volt value should be used as the
+-+ *			global CPR floor voltage if all of the power domains
+-+ *			associated with this CPR3 regulator are bypassed
+-+ * @uses_dynamic_floor: Boolean flag indicating that dynamic_floor_corner should
+-+ *			be utilized for the CPR3 regulator
+-+ * @current_corner:	Index identifying the currently selected voltage corner
+-+ *			for the CPR3 regulator or less than 0 if no corner has
+-+ *			been requested
+-+ * @last_closed_loop_corner: Index identifying the last voltage corner for the
+-+ *			CPR3 regulator which was configured when operating in
+-+ *			CPR closed-loop mode or less than 0 if no corner has
+-+ *			been requested.  CPR registers are only written to when
+-+ *			using closed-loop mode.
+-+ * @aggregated:		Boolean flag indicating that this CPR3 regulator
+-+ *			participated in the last aggregation event
+-+ * @debug_corner:	Index identifying voltage corner used for displaying
+-+ *			corner configuration values in debugfs
+-+ * @vreg_enabled:	Boolean defining the enable state of the CPR3
+-+ *			regulator's regulator within the regulator framework.
+-+ * @aging_allowed:	Boolean defining if CPR aging adjustments are allowed
+-+ *			for this CPR3 regulator given the fuse combo of the
+-+ *			device
+-+ * @aging_allow_open_loop_adj: Boolean defining if the open-loop voltage of each
+-+ *			corner of this regulator should be adjusted as a result
+-+ *			of an aging measurement.  This flag can be set to false
+-+ *			when the open-loop voltage adjustments have been
+-+ *			specified such that they include the maximum possible
+-+ *			aging adjustment.  This flag is only used if
+-+ *			aging_allowed == true.
+-+ * @aging_corner:	The corner that should be configured for this regulator
+-+ *			when an aging measurement is performed.
+-+ * @aging_max_adjust_volt: The maximum aging voltage margin in microvolts that
+-+ *			may be added to the target quotients of this regulator.
+-+ *			A value of 0 may be specified if this regulator does not
+-+ *			require any aging adjustment.
+-+ * @allow_core_count_adj: Core count adjustments are allowed for this regulator.
+-+ * @allow_temp_adj:	Temperature based adjustments are allowed for this
+-+ *			regulator.
+-+ * @max_core_count:	Maximum number of cores considered for core count
+-+ *			adjustment logic.
+-+ * @allow_boost:	Voltage boost allowed for this regulator.
+-+ *
+-+ * This structure contains both configuration and runtime state data.  The
+-+ * elements current_corner, last_closed_loop_corner, aggregated, debug_corner,
+-+ * and vreg_enabled are state variables.
+-+ */
+-+struct cpr3_regulator {
+-+	struct device_node	*of_node;
+-+	struct cpr3_thread	*thread;
+-+	const char		*name;
+-+	struct regulator_desc	rdesc;
+-+	struct regulator_dev	*rdev;
+-+	struct regulator	*mem_acc_regulator;
+-+	struct cpr3_corner	*corner;
+-+	int			corner_count;
+-+	struct cprh_corner_band *corner_band;
+-+	struct cpr4_reg_data    *cpr4_regulator_data;
+-+	struct cpr3_reg_data    *cpr3_regulator_data;
+-+	u32			corner_band_count;
+-+
+-+	void			*platform_fuses;
+-+	int			speed_bin_fuse;
+-+	int			speed_bins_supported;
+-+	int			cpr_rev_fuse;
+-+	int			part_type;
+-+	int			part_type_supported;
+-+	int			fuse_combo;
+-+	int			fuse_combos_supported;
+-+	int			fuse_corner_count;
+-+	int			*fuse_corner_map;
+-+	int			fuse_combo_corner_sum;
+-+	int			fuse_combo_offset;
+-+	int			speed_bin_corner_sum;
+-+	int			speed_bin_offset;
+-+	int			fuse_combo_corner_band_sum;
+-+	int			fuse_combo_corner_band_offset;
+-+	int			speed_bin_corner_band_sum;
+-+	int			speed_bin_corner_band_offset;
+-+	u32			pd_bypass_mask;
+-+	int			dynamic_floor_corner;
+-+	bool			uses_dynamic_floor;
+-+
+-+	int			current_corner;
+-+	int			last_closed_loop_corner;
+-+	bool			aggregated;
+-+	int			debug_corner;
+-+	bool			vreg_enabled;
+-+
+-+	bool			aging_allowed;
+-+	bool			aging_allow_open_loop_adj;
+-+	int			aging_corner;
+-+	int			aging_max_adjust_volt;
+-+
+-+	bool			allow_core_count_adj;
+-+	bool			allow_temp_adj;
+-+	int			max_core_count;
+-+	bool			allow_boost;
+-+};
+-+
+-+/**
+-+ * struct cpr3_thread - CPR3 hardware thread data structure
+-+ * @thread_id:		Hardware thread ID
+-+ * @of_node:		Device node associated with the device tree child node
+-+ *			of this CPR3 thread
+-+ * @ctrl:		Pointer to the CPR3 controller which manages this thread
+-+ * @vreg:		Array of CPR3 regulators handled by the CPR3 thread
+-+ * @vreg_count:		Number of elements in the vreg array
+-+ * @aggr_corner:	CPR corner containing the in process aggregated voltage
+-+ *			and target quotient configurations which will be applied
+-+ * @last_closed_loop_aggr_corner: CPR corner containing the most recent
+-+ *			configurations which were written into hardware
+-+ *			registers when operating in closed loop mode (i.e. with
+-+ *			CPR enabled)
+-+ * @consecutive_up:	The number of consecutive CPR step up events needed to
+-+ *			to trigger an up interrupt
+-+ * @consecutive_down:	The number of consecutive CPR step down events needed to
+-+ *			to trigger a down interrupt
+-+ * @up_threshold:	The number CPR error steps required to generate an up
+-+ *			event
+-+ * @down_threshold:	The number CPR error steps required to generate a down
+-+ *			event
+-+ *
+-+ * This structure contains both configuration and runtime state data.  The
+-+ * elements aggr_corner and last_closed_loop_aggr_corner are state variables.
+-+ */
+-+struct cpr3_thread {
+-+	u32			thread_id;
+-+	struct device_node	*of_node;
+-+	struct cpr3_controller	*ctrl;
+-+	struct cpr3_regulator	*vreg;
+-+	int			vreg_count;
+-+	struct cpr3_corner	aggr_corner;
+-+	struct cpr3_corner	last_closed_loop_aggr_corner;
+-+
+-+	u32			consecutive_up;
+-+	u32			consecutive_down;
+-+	u32			up_threshold;
+-+	u32			down_threshold;
+-+};
+-+
+-+/* Per CPR controller data */
+-+/**
+-+ * enum cpr3_mem_acc_corners - Constants which define the number of mem-acc
+-+ *		regulator corners available in the mem-acc corner map array.
+-+ * %CPR3_MEM_ACC_LOW_CORNER:	Index in mem-acc corner map array mapping to the
+-+ *				mem-acc regulator corner
+-+ *				to be used for low voltage vdd supply
+-+ * %CPR3_MEM_ACC_HIGH_CORNER:	Index in mem-acc corner map array mapping to the
+-+ *				mem-acc regulator corner to be used for high
+-+ *				voltage vdd supply
+-+ * %CPR3_MEM_ACC_CORNERS:	Number of elements in the mem-acc corner map
+-+ *				array
+-+ */
+-+enum cpr3_mem_acc_corners {
+-+	CPR3_MEM_ACC_LOW_CORNER		= 0,
+-+	CPR3_MEM_ACC_HIGH_CORNER	= 1,
+-+	CPR3_MEM_ACC_CORNERS		= 2,
+-+};
+-+
+-+/**
+-+ * enum cpr3_count_mode - CPR3 controller count mode which defines the
+-+ *		method that CPR sensor data is acquired
+-+ * %CPR3_COUNT_MODE_ALL_AT_ONCE_MIN:	Capture all CPR sensor readings
+-+ *					simultaneously and report the minimum
+-+ *					value seen in successive measurements
+-+ * %CPR3_COUNT_MODE_ALL_AT_ONCE_MAX:	Capture all CPR sensor readings
+-+ *					simultaneously and report the maximum
+-+ *					value seen in successive measurements
+-+ * %CPR3_COUNT_MODE_STAGGERED:		Read one sensor at a time in a
+-+ *					sequential fashion
+-+ * %CPR3_COUNT_MODE_ALL_AT_ONCE_AGE:	Capture all CPR aging sensor readings
+-+ *					simultaneously.
+-+ */
+-+enum cpr3_count_mode {
+-+	CPR3_COUNT_MODE_ALL_AT_ONCE_MIN	= 0,
+-+	CPR3_COUNT_MODE_ALL_AT_ONCE_MAX	= 1,
+-+	CPR3_COUNT_MODE_STAGGERED	= 2,
+-+	CPR3_COUNT_MODE_ALL_AT_ONCE_AGE	= 3,
+-+};
+-+
+-+/**
+-+ * enum cpr_controller_type - supported CPR controller hardware types
+-+ * %CPR_CTRL_TYPE_CPR3:	HW has CPR3 controller
+-+ * %CPR_CTRL_TYPE_CPR4:	HW has CPR4 controller
+-+ */
+-+enum cpr_controller_type {
+-+	CPR_CTRL_TYPE_CPR3,
+-+	CPR_CTRL_TYPE_CPR4,
+-+};
+-+
+-+/**
+-+ * cpr_setting - supported CPR global settings
+-+ * %CPR_DEFAULT: default mode from dts will be used
+-+ * %CPR_DISABLED: ceiling voltage will be used for all the corners
+-+ * %CPR_OPEN_LOOP_EN: CPR will work in OL
+-+ * %CPR_CLOSED_LOOP_EN: CPR will work in CL, if supported
+-+ */
+-+enum cpr_setting {
+-+	CPR_DEFAULT		= 0,
+-+	CPR_DISABLED		= 1,
+-+	CPR_OPEN_LOOP_EN	= 2,
+-+	CPR_CLOSED_LOOP_EN	= 3,
+-+};
+-+
+-+/**
+-+ * struct cpr3_aging_sensor_info - CPR3 aging sensor information
+-+ * @sensor_id		The index of the CPR3 sensor to be used in the aging
+-+ *			measurement.
+-+ * @ro_scale		The CPR ring oscillator (RO) scaling factor for the
+-+ *			aging sensor with units of QUOT/V.
+-+ * @init_quot_diff:	The fused quotient difference between aged and un-aged
+-+ *			paths that was measured at manufacturing time.
+-+ * @measured_quot_diff: The quotient difference measured at runtime.
+-+ * @bypass_mask:	Bit mask of the CPR sensors that must be bypassed during
+-+ *			the aging measurement for this sensor
+-+ *
+-+ * This structure contains both configuration and runtime state data.  The
+-+ * element measured_quot_diff is a state variable.
+-+ */
+-+struct cpr3_aging_sensor_info {
+-+	u32			sensor_id;
+-+	u32			ro_scale;
+-+	int			init_quot_diff;
+-+	int			measured_quot_diff;
+-+	u32			bypass_mask[CPR3_MAX_SENSOR_COUNT / 32];
+-+};
+-+
+-+/**
+-+ * struct cpr3_reg_info - Register information data structure
+-+ * @name:	Register name
+-+ * @addr:	Register physical address
+-+ * @value:	Register content
+-+ * @virt_addr:	Register virtual address
+-+ *
+-+ * This data structure is used to dump some critical register contents
+-+ * when the device crashes due to a kernel panic.
+-+ */
+-+struct cpr3_reg_info {
+-+	const char	*name;
+-+	u32		addr;
+-+	u32		value;
+-+	void __iomem	*virt_addr;
+-+};
+-+
+-+/**
+-+ * struct cpr3_panic_regs_info - Data structure to dump critical register
+-+ *		contents.
+-+ * @reg_count:		Number of elements in the regs array
+-+ * @regs:		Array of critical registers information
+-+ *
+-+ * This data structure is used to dump critical register contents when
+-+ * the device crashes due to a kernel panic.
+-+ */
+-+struct cpr3_panic_regs_info {
+-+	int			reg_count;
+-+	struct cpr3_reg_info	*regs;
+-+};
+-+
+-+/**
+-+ * struct cpr3_controller - CPR3 controller data structure
+-+ * @dev:		Device pointer for the CPR3 controller device
+-+ * @name:		Unique name for the CPR3 controller
+-+ * @ctrl_id:		Controller ID corresponding to the VDD supply number
+-+ *			that this CPR3 controller manages.
+-+ * @cpr_ctrl_base:	Virtual address of the CPR3 controller base register
+-+ * @fuse_base:		Virtual address of fuse row 0
+-+ * @aging_possible_reg:	Virtual address of an optional platform-specific
+-+ *			register that must be ready to determine if it is
+-+ *			possible to perform an aging measurement.
+-+ * @list:		list head used in a global cpr3-regulator list so that
+-+ *			cpr3-regulator structs can be found easily in RAM dumps
+-+ * @thread:		Array of CPR3 threads managed by the CPR3 controller
+-+ * @thread_count:	Number of elements in the thread array
+-+ * @sensor_owner:	Array of thread IDs indicating which thread owns a given
+-+ *			CPR sensor
+-+ * @sensor_count:	The number of CPR sensors found on the CPR loop managed
+-+ *			by this CPR controller.  Must be equal to the number of
+-+ *			elements in the sensor_owner array
+-+ * @soc_revision:	Revision number of the SoC.  This may be unused by
+-+ *			platforms that do not have different behavior for
+-+ *			different SoC revisions.
+-+ * @lock:		Mutex lock used to ensure mutual exclusion between
+-+ *			all of the threads associated with the controller
+-+ * @vdd_regulator:	Pointer to the VDD supply regulator which this CPR3
+-+ *			controller manages
+-+ * @system_regulator:	Pointer to the optional system-supply regulator upon
+-+ *			which the VDD supply regulator depends.
+-+ * @mem_acc_regulator:	Pointer to the optional mem-acc supply regulator used
+-+ *			to manage memory circuitry settings based upon the
+-+ *			VDD supply output voltage.
+-+ * @vdd_limit_regulator: Pointer to the VDD supply limit regulator which is used
+-+ *			for hardware closed-loop in order specify ceiling and
+-+ *			floor voltage limits (platform specific)
+-+ * @system_supply_max_volt: Voltage in microvolts which corresponds to the
+-+ *			absolute ceiling voltage of the system-supply
+-+ * @mem_acc_threshold_volt: mem-acc threshold voltage in microvolts
+-+ * @mem_acc_corner_map: mem-acc regulator corners mapping to low and high
+-+ *			voltage mem-acc settings for the memories powered by
+-+ *			this CPR3 controller and its associated CPR3 regulators
+-+ * @mem_acc_crossover_volt: Voltage in microvolts corresponding to the voltage
+-+ *			that the VDD supply must be set to while a MEM ACC
+-+ *			switch is in progress. This element must be initialized
+-+ *			for CPRh controllers when a MEM ACC threshold voltage is
+-+ *			defined.
+-+ * @core_clk:		Pointer to the CPR3 controller core clock
+-+ * @iface_clk:		Pointer to the CPR3 interface clock (platform specific)
+-+ * @bus_clk:		Pointer to the CPR3 bus clock (platform specific)
+-+ * @irq:		CPR interrupt number
+-+ * @irq_affinity_mask:	The cpumask for the CPUs which the CPR interrupt should
+-+ *			have affinity for
+-+ * @cpu_hotplug_notifier: CPU hotplug notifier used to reset IRQ affinity when a
+-+ *			CPU is brought back online
+-+ * @ceiling_irq:	Interrupt number for the interrupt that is triggered
+-+ *			when hardware closed-loop attempts to exceed the ceiling
+-+ *			voltage
+-+ * @apm:		Handle to the array power mux (APM)
+-+ * @apm_threshold_volt:	Voltage in microvolts which defines the threshold
+-+ *			voltage to determine the APM supply selection for
+-+ *			each corner
+-+ * @apm_crossover_volt:	Voltage in microvolts corresponding to the voltage that
+-+ *			the VDD supply must be set to while an APM switch is in
+-+ *			progress. This element must be initialized for CPRh
+-+ *			controllers when an APM threshold voltage is defined
+-+ * @apm_adj_volt:	Minimum difference between APM threshold voltage and
+-+ *			open-loop voltage which allows the APM threshold voltage
+-+ *			to be used as a ceiling
+-+ * @apm_high_supply:	APM supply to configure if VDD voltage is greater than
+-+ *			or equal to the APM threshold voltage
+-+ * @apm_low_supply:	APM supply to configure if the VDD voltage is less than
+-+ *			the APM threshold voltage
+-+ * @base_volt:		Minimum voltage in microvolts supported by the VDD
+-+ *			supply managed by this CPR controller
+-+ * @corner_switch_delay_time: The delay time in nanoseconds used by the CPR
+-+ *			controller to wait for voltage settling before
+-+ *			acknowledging the OSM block after corner changes
+-+ * @cpr_clock_rate:	CPR reference clock frequency in Hz.
+-+ * @sensor_time:	The time in nanoseconds that each sensor takes to
+-+ *			perform a measurement.
+-+ * @loop_time:		The time in nanoseconds between consecutive CPR
+-+ *			measurements.
+-+ * @up_down_delay_time: The time to delay in nanoseconds between consecutive CPR
+-+ *			measurements when the last measurement recommended
+-+ *			increasing or decreasing the vdd-supply voltage.
+-+ *			(platform specific)
+-+ * @idle_clocks:	Number of CPR reference clock ticks that the CPR
+-+ *			controller waits in transitional states.
+-+ * @step_quot_init_min:	The default minimum CPR step quotient value.  The step
+-+ *			quotient is the number of additional ring oscillator
+-+ *			ticks observed when increasing one step in vdd-supply
+-+ *			output voltage.
+-+ * @step_quot_init_max:	The default maximum CPR step quotient value.
+-+ * @step_volt:		Step size in microvolts between available set points
+-+ *			of the VDD supply
+-+ * @down_error_step_limit: CPR4 hardware closed-loop down error step limit which
+-+ *			defines the maximum number of VDD supply regulator steps
+-+ *			that the voltage may be reduced as the result of a
+-+ *			single CPR measurement.
+-+ * @up_error_step_limit: CPR4 hardware closed-loop up error step limit which
+-+ *			defines the maximum number of VDD supply regulator steps
+-+ *			that the voltage may be increased as the result of a
+-+ *			single CPR measurement.
+-+ * @count_mode:		CPR controller count mode
+-+ * @count_repeat:	Number of times to perform consecutive sensor
+-+ *			measurements when using all-at-once count modes.
+-+ * @proc_clock_throttle: Defines the processor clock frequency throttling
+-+ *			register value to use.  This can be used to reduce the
+-+ *			clock frequency when a power domain exits a low power
+-+ *			mode until CPR settles at a new voltage.
+-+ *			(platform specific)
+-+ * @cpr_allowed_hw:	Boolean which indicates if closed-loop CPR operation is
+-+ *			permitted for a given chip based upon hardware fuse
+-+ *			values
+-+ * @cpr_allowed_sw:	Boolean which indicates if closed-loop CPR operation is
+-+ *			permitted based upon software policies
+-+ * @supports_hw_closed_loop: Boolean which indicates if this CPR3/4 controller
+-+ *			physically supports hardware closed-loop CPR operation
+-+ * @use_hw_closed_loop:	Boolean which indicates that this controller will be
+-+ *			using hardware closed-loop operation in place of
+-+ *			software closed-loop operation.
+-+ * @ctrl_type:		CPR controller type
+-+ * @saw_use_unit_mV:	Boolean which indicates the unit used in SAW PVC
+-+ *			interface is mV.
+-+ * @aggr_corner:	CPR corner containing the most recently aggregated
+-+ *			voltage configurations which are being used currently
+-+ * @cpr_enabled:	Boolean which indicates that the CPR controller is
+-+ *			enabled and operating in closed-loop mode.  CPR clocks
+-+ *			have been prepared and enabled whenever this flag is
+-+ *			true.
+-+ * @last_corner_was_closed_loop: Boolean indicating if the last known corners
+-+ *			were updated during closed loop operation.
+-+ * @cpr_suspended:	Boolean which indicates that CPR has been temporarily
+-+ *			disabled while enterring system suspend.
+-+ * @debugfs:		Pointer to the debugfs directory of this CPR3 controller
+-+ * @aging_ref_volt:	Reference voltage in microvolts to configure when
+-+ *			performing CPR aging measurements.
+-+ * @aging_vdd_mode:	vdd-supply regulator mode to configure before performing
+-+ *			a CPR aging measurement.  It should be one of
+-+ *			REGULATOR_MODE_*.
+-+ * @aging_complete_vdd_mode: vdd-supply regulator mode to configure after
+-+ *			performing a CPR aging measurement.  It should be one of
+-+ *			REGULATOR_MODE_*.
+-+ * @aging_ref_adjust_volt: The reference aging voltage margin in microvolts that
+-+ *			should be added to the target quotients of the
+-+ *			regulators managed by this controller after derating.
+-+ * @aging_required:	Flag which indicates that a CPR aging measurement still
+-+ *			needs to be performed for this CPR3 controller.
+-+ * @aging_succeeded:	Flag which indicates that a CPR aging measurement has
+-+ *			completed successfully.
+-+ * @aging_failed:	Flag which indicates that a CPR aging measurement has
+-+ *			failed to complete successfully.
+-+ * @aging_sensor:	Array of CPR3 aging sensors which are used to perform
+-+ *			aging measurements at a runtime.
+-+ * @aging_sensor_count:	Number of elements in the aging_sensor array
+-+ * @aging_possible_mask: Optional bitmask used to mask off the
+-+ *			aging_possible_reg register.
+-+ * @aging_possible_val:	Optional value that the masked aging_possible_reg
+-+ *			register must have in order for a CPR aging measurement
+-+ *			to be possible.
+-+ * @step_quot_fixed:	Fixed step quotient value used for target quotient
+-+ *			adjustment if use_dynamic_step_quot is not set.
+-+ *			This parameter is only relevant for CPR4 controllers
+-+ *			when using the per-online-core or per-temperature
+-+ *			adjustments.
+-+ * @initial_temp_band:	Temperature band used for calculation of base-line
+-+ *			target quotients (fused).
+-+ * @use_dynamic_step_quot: Boolean value which indicates that margin adjustment
+-+ *			of target quotient will be based on the step quotient
+-+ *			calculated dynamically in hardware for each RO.
+-+ * @allow_core_count_adj: Core count adjustments are allowed for this controller
+-+ * @allow_temp_adj:	Temperature based adjustments are allowed for
+-+ *			this controller
+-+ * @allow_boost:	Voltage boost allowed for this controller.
+-+ * @temp_band_count:	Number of temperature bands used for temperature based
+-+ *			adjustment logic
+-+ * @temp_points:	Array of temperature points in decidegrees Celsius used
+-+ *			to specify the ranges for selected temperature bands.
+-+ *			The array must have (temp_band_count - 1) elements
+-+ *			allocated.
+-+ * @temp_sensor_id_start: Start ID of temperature sensors used for temperature
+-+ *			based adjustments.
+-+ * @temp_sensor_id_end:	End ID of temperature sensors used for temperature
+-+ *			based adjustments.
+-+ * @voltage_settling_time: The time in nanoseconds that it takes for the
+-+ *			VDD supply voltage to settle after being increased or
+-+ *			decreased by step_volt microvolts which is used when
+-+ *			SDELTA voltage margin adjustments are applied.
+-+ * @cpr_global_setting:	Global setting for this CPR controller
+-+ * @panic_regs_info:	Array of panic registers information which provides the
+-+ *			list of registers to dump when the device crashes.
+-+ * @panic_notifier:	Notifier block registered to global panic notifier list.
+-+ *
+-+ * This structure contains both configuration and runtime state data.  The
+-+ * elements cpr_allowed_sw, use_hw_closed_loop, aggr_corner, cpr_enabled,
+-+ * last_corner_was_closed_loop, cpr_suspended, aging_ref_adjust_volt,
+-+ * aging_required, aging_succeeded, and aging_failed are state variables.
+-+ *
+-+ * The apm* elements do not need to be initialized if the VDD supply managed by
+-+ * the CPR3 controller does not utilize an APM.
+-+ *
+-+ * The elements step_quot_fixed, initial_temp_band, allow_core_count_adj,
+-+ * allow_temp_adj and temp* need to be initialized for CPR4 controllers which
+-+ * are using per-online-core or per-temperature adjustments.
+-+ */
+-+struct cpr3_controller {
+-+	struct device		*dev;
+-+	const char		*name;
+-+	int			ctrl_id;
+-+	void __iomem		*cpr_ctrl_base;
+-+	void __iomem		*fuse_base;
+-+	void __iomem		*aging_possible_reg;
+-+	struct list_head	list;
+-+	struct cpr3_thread	*thread;
+-+	int			thread_count;
+-+	u8			*sensor_owner;
+-+	int			sensor_count;
+-+	int			soc_revision;
+-+	struct mutex		lock;
+-+	struct regulator	*vdd_regulator;
+-+	struct regulator	*system_regulator;
+-+	struct regulator	*mem_acc_regulator;
+-+	struct regulator	*vdd_limit_regulator;
+-+	int			system_supply_max_volt;
+-+	int			mem_acc_threshold_volt;
+-+	int			mem_acc_corner_map[CPR3_MEM_ACC_CORNERS];
+-+	int			mem_acc_crossover_volt;
+-+	struct clk		*core_clk;
+-+	struct clk		*iface_clk;
+-+	struct clk		*bus_clk;
+-+	int			irq;
+-+	struct cpumask		irq_affinity_mask;
+-+	struct notifier_block	cpu_hotplug_notifier;
+-+	int			ceiling_irq;
+-+	struct msm_apm_ctrl_dev *apm;
+-+	int			apm_threshold_volt;
+-+	int			apm_crossover_volt;
+-+	int			apm_adj_volt;
+-+	enum msm_apm_supply	apm_high_supply;
+-+	enum msm_apm_supply	apm_low_supply;
+-+	int			base_volt;
+-+	u32			corner_switch_delay_time;
+-+	u32			cpr_clock_rate;
+-+	u32			sensor_time;
+-+	u32			loop_time;
+-+	u32			up_down_delay_time;
+-+	u32			idle_clocks;
+-+	u32			step_quot_init_min;
+-+	u32			step_quot_init_max;
+-+	int			step_volt;
+-+	u32			down_error_step_limit;
+-+	u32			up_error_step_limit;
+-+	enum cpr3_count_mode	count_mode;
+-+	u32			count_repeat;
+-+	u32			proc_clock_throttle;
+-+	bool			cpr_allowed_hw;
+-+	bool			cpr_allowed_sw;
+-+	bool			supports_hw_closed_loop;
+-+	bool			use_hw_closed_loop;
+-+	enum cpr_controller_type ctrl_type;
+-+	bool			saw_use_unit_mV;
+-+	struct cpr3_corner	aggr_corner;
+-+	bool			cpr_enabled;
+-+	bool			last_corner_was_closed_loop;
+-+	bool			cpr_suspended;
+-+	struct dentry		*debugfs;
+-+
+-+	int			aging_ref_volt;
+-+	unsigned int		aging_vdd_mode;
+-+	unsigned int		aging_complete_vdd_mode;
+-+	int			aging_ref_adjust_volt;
+-+	bool			aging_required;
+-+	bool			aging_succeeded;
+-+	bool			aging_failed;
+-+	struct cpr3_aging_sensor_info *aging_sensor;
+-+	int			aging_sensor_count;
+-+	u32			cur_sensor_state;
+-+	u32			aging_possible_mask;
+-+	u32			aging_possible_val;
+-+
+-+	u32			step_quot_fixed;
+-+	u32			initial_temp_band;
+-+	bool			use_dynamic_step_quot;
+-+	bool			allow_core_count_adj;
+-+	bool			allow_temp_adj;
+-+	bool			allow_boost;
+-+	int			temp_band_count;
+-+	int			*temp_points;
+-+	u32			temp_sensor_id_start;
+-+	u32			temp_sensor_id_end;
+-+	u32			voltage_settling_time;
+-+	enum cpr_setting	cpr_global_setting;
+-+	struct cpr3_panic_regs_info *panic_regs_info;
+-+	struct notifier_block	panic_notifier;
+-+};
+-+
+-+/* Used for rounding voltages to the closest physically available set point. */
+-+#define CPR3_ROUND(n, d) (DIV_ROUND_UP(n, d) * (d))
+-+
+-+#define cpr3_err(cpr3_thread, message, ...) \
+-+	pr_err("%s: " message, (cpr3_thread)->name, ##__VA_ARGS__)
+-+#define cpr3_info(cpr3_thread, message, ...) \
+-+	pr_info("%s: " message, (cpr3_thread)->name, ##__VA_ARGS__)
+-+#define cpr3_debug(cpr3_thread, message, ...) \
+-+	pr_debug("%s: " message, (cpr3_thread)->name, ##__VA_ARGS__)
+-+
+-+/*
+-+ * Offset subtracted from voltage corner values passed in from the regulator
+-+ * framework in order to get internal voltage corner values.  This is needed
+-+ * since the regulator framework treats 0 as an error value at regulator
+-+ * registration time.
+-+ */
+-+#define CPR3_CORNER_OFFSET	1
+-+
+-+#ifdef CONFIG_REGULATOR_CPR3
+-+
+-+int cpr3_regulator_register(struct platform_device *pdev,
+-+			struct cpr3_controller *ctrl);
+-+int cpr3_open_loop_regulator_register(struct platform_device *pdev,
+-+				      struct cpr3_controller *ctrl);
+-+int cpr3_regulator_unregister(struct cpr3_controller *ctrl);
+-+int cpr3_open_loop_regulator_unregister(struct cpr3_controller *ctrl);
+-+int cpr3_regulator_suspend(struct cpr3_controller *ctrl);
+-+int cpr3_regulator_resume(struct cpr3_controller *ctrl);
+-+
+-+int cpr3_allocate_threads(struct cpr3_controller *ctrl, u32 min_thread_id,
+-+			u32 max_thread_id);
+-+int cpr3_map_fuse_base(struct cpr3_controller *ctrl,
+-+			struct platform_device *pdev);
+-+int cpr3_read_tcsr_setting(struct cpr3_controller *ctrl,
+-+			   struct platform_device *pdev, u8 start, u8 end);
+-+int cpr3_read_fuse_param(void __iomem *fuse_base_addr,
+-+			const struct cpr3_fuse_param *param, u64 *param_value);
+-+int cpr3_convert_open_loop_voltage_fuse(int ref_volt, int step_volt, u32 fuse,
+-+			int fuse_len);
+-+u64 cpr3_interpolate(u64 x1, u64 y1, u64 x2, u64 y2, u64 x);
+-+int cpr3_parse_array_property(struct cpr3_regulator *vreg,
+-+			const char *prop_name, int tuple_size, u32 *out);
+-+int cpr3_parse_corner_array_property(struct cpr3_regulator *vreg,
+-+			const char *prop_name, int tuple_size, u32 *out);
+-+int cpr3_parse_corner_band_array_property(struct cpr3_regulator *vreg,
+-+			const char *prop_name, int tuple_size, u32 *out);
+-+int cpr3_parse_common_corner_data(struct cpr3_regulator *vreg);
+-+int cpr3_parse_thread_u32(struct cpr3_thread *thread, const char *propname,
+-+			u32 *out_value, u32 value_min, u32 value_max);
+-+int cpr3_parse_ctrl_u32(struct cpr3_controller *ctrl, const char *propname,
+-+			u32 *out_value, u32 value_min, u32 value_max);
+-+int cpr3_parse_common_thread_data(struct cpr3_thread *thread);
+-+int cpr3_parse_common_ctrl_data(struct cpr3_controller *ctrl);
+-+int cpr3_parse_open_loop_common_ctrl_data(struct cpr3_controller *ctrl);
+-+int cpr3_limit_open_loop_voltages(struct cpr3_regulator *vreg);
+-+void cpr3_open_loop_voltage_as_ceiling(struct cpr3_regulator *vreg);
+-+int cpr3_limit_floor_voltages(struct cpr3_regulator *vreg);
+-+void cpr3_print_quots(struct cpr3_regulator *vreg);
+-+int cpr3_determine_part_type(struct cpr3_regulator *vreg, int fuse_volt);
+-+int cpr3_determine_temp_base_open_loop_correction(struct cpr3_regulator *vreg,
+-+			int *fuse_volt);
+-+int cpr3_adjust_fused_open_loop_voltages(struct cpr3_regulator *vreg,
+-+			int *fuse_volt);
+-+int cpr3_adjust_open_loop_voltages(struct cpr3_regulator *vreg);
+-+int cpr3_quot_adjustment(int ro_scale, int volt_adjust);
+-+int cpr3_voltage_adjustment(int ro_scale, int quot_adjust);
+-+int cpr3_parse_closed_loop_voltage_adjustments(struct cpr3_regulator *vreg,
+-+			u64 *ro_sel, int *volt_adjust,
+-+			int *volt_adjust_fuse, int *ro_scale);
+-+int cpr4_parse_core_count_temp_voltage_adj(struct cpr3_regulator *vreg,
+-+			bool use_corner_band);
+-+int cpr3_apm_init(struct cpr3_controller *ctrl);
+-+int cpr3_mem_acc_init(struct cpr3_regulator *vreg);
+-+void cprh_adjust_voltages_for_apm(struct cpr3_regulator *vreg);
+-+void cprh_adjust_voltages_for_mem_acc(struct cpr3_regulator *vreg);
+-+int cpr3_adjust_target_quotients(struct cpr3_regulator *vreg,
+-+			int *fuse_volt_adjust);
+-+int cpr3_handle_temp_open_loop_adjustment(struct cpr3_controller *ctrl,
+-+			bool is_cold);
+-+int cpr3_get_cold_temp_threshold(struct cpr3_regulator *vreg, int *cold_temp);
+-+bool cpr3_can_adjust_cold_temp(struct cpr3_regulator *vreg);
+-+
+-+#else
+-+
+-+static inline int cpr3_regulator_register(struct platform_device *pdev,
+-+			struct cpr3_controller *ctrl)
+-+{
+-+	return -ENXIO;
+-+}
+-+
+-+static inline int
+-+cpr3_open_loop_regulator_register(struct platform_device *pdev,
+-+				  struct cpr3_controller *ctrl);
+-+{
+-+	return -ENXIO;
+-+}
+-+
+-+static inline int cpr3_regulator_unregister(struct cpr3_controller *ctrl)
+-+{
+-+	return -ENXIO;
+-+}
+-+
+-+static inline int
+-+cpr3_open_loop_regulator_unregister(struct cpr3_controller *ctrl)
+-+{
+-+	return -ENXIO;
+-+}
+-+
+-+static inline int cpr3_regulator_suspend(struct cpr3_controller *ctrl)
+-+{
+-+	return -ENXIO;
+-+}
+-+
+-+static inline int cpr3_regulator_resume(struct cpr3_controller *ctrl)
+-+{
+-+	return -ENXIO;
+-+}
+-+
+-+static inline int cpr3_get_thread_name(struct cpr3_thread *thread,
+-+			struct device_node *thread_node)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline int cpr3_allocate_threads(struct cpr3_controller *ctrl,
+-+			u32 min_thread_id, u32 max_thread_id)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline int cpr3_map_fuse_base(struct cpr3_controller *ctrl,
+-+			struct platform_device *pdev)
+-+{
+-+	return -ENXIO;
+-+}
+-+
+-+static inline int cpr3_read_tcsr_setting(struct cpr3_controller *ctrl,
+-+			   struct platform_device *pdev, u8 start, u8 end)
+-+{
+-+	return 0;
+-+}
+-+
+-+static inline int cpr3_read_fuse_param(void __iomem *fuse_base_addr,
+-+			const struct cpr3_fuse_param *param, u64 *param_value)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline int cpr3_convert_open_loop_voltage_fuse(int ref_volt,
+-+			int step_volt, u32 fuse, int fuse_len)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline u64 cpr3_interpolate(u64 x1, u64 y1, u64 x2, u64 y2, u64 x)
+-+{
+-+	return 0;
+-+}
+-+
+-+static inline int cpr3_parse_array_property(struct cpr3_regulator *vreg,
+-+			const char *prop_name, int tuple_size, u32 *out)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline int cpr3_parse_corner_array_property(struct cpr3_regulator *vreg,
+-+			const char *prop_name, int tuple_size, u32 *out)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline int cpr3_parse_corner_band_array_property(
+-+			struct cpr3_regulator *vreg, const char *prop_name,
+-+			int tuple_size, u32 *out)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline int cpr3_parse_common_corner_data(struct cpr3_regulator *vreg)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline int cpr3_parse_thread_u32(struct cpr3_thread *thread,
+-+			const char *propname, u32 *out_value, u32 value_min,
+-+			u32 value_max)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline int cpr3_parse_ctrl_u32(struct cpr3_controller *ctrl,
+-+			const char *propname, u32 *out_value, u32 value_min,
+-+			u32 value_max)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline int cpr3_parse_common_thread_data(struct cpr3_thread *thread)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline int cpr3_parse_common_ctrl_data(struct cpr3_controller *ctrl)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline int
+-+cpr3_parse_open_loop_common_ctrl_data(struct cpr3_controller *ctrl)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline int cpr3_limit_open_loop_voltages(struct cpr3_regulator *vreg)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline void cpr3_open_loop_voltage_as_ceiling(
+-+			struct cpr3_regulator *vreg)
+-+{
+-+	return;
+-+}
+-+
+-+static inline int cpr3_limit_floor_voltages(struct cpr3_regulator *vreg)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline void cpr3_print_quots(struct cpr3_regulator *vreg)
+-+{
+-+	return;
+-+}
+-+
+-+static inline int
+-+cpr3_determine_part_type(struct cpr3_regulator *vreg, int fuse_volt)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline int
+-+cpr3_determine_temp_base_open_loop_correction(struct cpr3_regulator *vreg,
+-+			int *fuse_volt)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline int cpr3_adjust_fused_open_loop_voltages(
+-+			struct cpr3_regulator *vreg, int *fuse_volt)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline int cpr3_adjust_open_loop_voltages(struct cpr3_regulator *vreg)
+-+{
+-+	return -EPERM;
+-+}
+-+
+-+static inline int cpr3_quot_adjustment(int ro_scale, int volt_adjust)
+-+{
+-+	return 0;
+-+}
+-+
+-+static inline int cpr3_voltage_adjustment(int ro_scale, int quot_adjust)
+-+{
+-+	return 0;
+-+}
+-+
+-+static inline int cpr3_parse_closed_loop_voltage_adjustments(
+-+			struct cpr3_regulator *vreg, u64 *ro_sel,
+-+			int *volt_adjust, int *volt_adjust_fuse, int *ro_scale)
+-+{
+-+	return 0;
+-+}
+-+
+-+static inline int cpr4_parse_core_count_temp_voltage_adj(
+-+			struct cpr3_regulator *vreg, bool use_corner_band)
+-+{
+-+	return 0;
+-+}
+-+
+-+static inline int cpr3_apm_init(struct cpr3_controller *ctrl)
+-+{
+-+	return 0;
+-+}
+-+
+-+static inline int cpr3_mem_acc_init(struct cpr3_regulator *vreg)
+-+{
+-+	return 0;
+-+}
+-+
+-+static inline void cprh_adjust_voltages_for_apm(struct cpr3_regulator *vreg)
+-+{
+-+}
+-+
+-+static inline void cprh_adjust_voltages_for_mem_acc(struct cpr3_regulator *vreg)
+-+{
+-+}
+-+
+-+static inline int cpr3_adjust_target_quotients(struct cpr3_regulator *vreg,
+-+			int *fuse_volt_adjust)
+-+{
+-+	return 0;
+-+}
+-+
+-+static inline int
+-+cpr3_handle_temp_open_loop_adjustment(struct cpr3_controller *ctrl,
+-+			bool is_cold)
+-+{
+-+	return 0;
+-+}
+-+
+-+static inline bool
+-+cpr3_can_adjust_cold_temp(struct cpr3_regulator *vreg)
+-+{
+-+	return false;
+-+}
+-+
+-+static inline int
+-+cpr3_get_cold_temp_threshold(struct cpr3_regulator *vreg, int *cold_temp)
+-+{
+-+	return 0;
+-+}
+-+#endif /* CONFIG_REGULATOR_CPR3 */
+-+
+-+#endif /* __REGULATOR_CPR_REGULATOR_H__ */
+---- /dev/null
+-+++ b/drivers/regulator/cpr3-util.c
+-@@ -0,0 +1,2750 @@
+-+/*
+-+ * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+-+ *
+-+ * This program is free software; you can redistribute it and/or modify
+-+ * it under the terms of the GNU General Public License version 2 and
+-+ * only version 2 as published by the Free Software Foundation.
+-+ *
+-+ * This program is distributed in the hope that it will be useful,
+-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-+ * GNU General Public License for more details.
+-+ */
+-+
+-+/*
+-+ * This file contains utility functions to be used by platform specific CPR3
+-+ * regulator drivers.
+-+ */
+-+
+-+#define pr_fmt(fmt) "%s: " fmt, __func__
+-+
+-+#include <linux/cpumask.h>
+-+#include <linux/device.h>
+-+#include <linux/io.h>
+-+#include <linux/kernel.h>
+-+#include <linux/of.h>
+-+#include <linux/platform_device.h>
+-+#include <linux/slab.h>
+-+#include <linux/types.h>
+-+
+-+#include <soc/qcom/socinfo.h>
+-+
+-+#include "cpr3-regulator.h"
+-+
+-+#define BYTES_PER_FUSE_ROW		8
+-+#define MAX_FUSE_ROW_BIT		63
+-+
+-+#define CPR3_CONSECUTIVE_UP_DOWN_MIN	0
+-+#define CPR3_CONSECUTIVE_UP_DOWN_MAX	15
+-+#define CPR3_UP_DOWN_THRESHOLD_MIN	0
+-+#define CPR3_UP_DOWN_THRESHOLD_MAX	31
+-+#define CPR3_STEP_QUOT_MIN		0
+-+#define CPR3_STEP_QUOT_MAX		63
+-+#define CPR3_IDLE_CLOCKS_MIN		0
+-+#define CPR3_IDLE_CLOCKS_MAX		31
+-+
+-+/* This constant has units of uV/mV so 1000 corresponds to 100%. */
+-+#define CPR3_AGING_DERATE_UNITY		1000
+-+
+-+/**
+-+ * cpr3_allocate_regulators() - allocate and initialize CPR3 regulators for a
+-+ *		given thread based upon device tree data
+-+ * @thread:		Pointer to the CPR3 thread
+-+ *
+-+ * This function allocates the thread->vreg array based upon the number of
+-+ * device tree regulator subnodes.  It also initializes generic elements of each
+-+ * regulator struct such as name, of_node, and thread.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_allocate_regulators(struct cpr3_thread *thread)
+-+{
+-+	struct device_node *node;
+-+	int i, rc;
+-+
+-+	thread->vreg_count = 0;
+-+
+-+	for_each_available_child_of_node(thread->of_node, node) {
+-+		thread->vreg_count++;
+-+	}
+-+
+-+	thread->vreg = devm_kcalloc(thread->ctrl->dev, thread->vreg_count,
+-+			sizeof(*thread->vreg), GFP_KERNEL);
+-+	if (!thread->vreg)
+-+		return -ENOMEM;
+-+
+-+	i = 0;
+-+	for_each_available_child_of_node(thread->of_node, node) {
+-+		thread->vreg[i].of_node = node;
+-+		thread->vreg[i].thread = thread;
+-+
+-+		rc = of_property_read_string(node, "regulator-name",
+-+						&thread->vreg[i].name);
+-+		if (rc) {
+-+			dev_err(thread->ctrl->dev, "could not find regulator name, rc=%d\n",
+-+				rc);
+-+			return rc;
+-+		}
+-+
+-+		i++;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_allocate_threads() - allocate and initialize CPR3 threads for a given
+-+ *			     controller based upon device tree data
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ * @min_thread_id:	Minimum allowed hardware thread ID for this controller
+-+ * @max_thread_id:	Maximum allowed hardware thread ID for this controller
+-+ *
+-+ * This function allocates the ctrl->thread array based upon the number of
+-+ * device tree thread subnodes.  It also initializes generic elements of each
+-+ * thread struct such as thread_id, of_node, ctrl, and vreg array.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_allocate_threads(struct cpr3_controller *ctrl, u32 min_thread_id,
+-+			u32 max_thread_id)
+-+{
+-+	struct device *dev = ctrl->dev;
+-+	struct device_node *thread_node;
+-+	int i, j, rc;
+-+
+-+	ctrl->thread_count = 0;
+-+
+-+	for_each_available_child_of_node(dev->of_node, thread_node) {
+-+		ctrl->thread_count++;
+-+	}
+-+
+-+	ctrl->thread = devm_kcalloc(dev, ctrl->thread_count,
+-+			sizeof(*ctrl->thread), GFP_KERNEL);
+-+	if (!ctrl->thread)
+-+		return -ENOMEM;
+-+
+-+	i = 0;
+-+	for_each_available_child_of_node(dev->of_node, thread_node) {
+-+		ctrl->thread[i].of_node = thread_node;
+-+		ctrl->thread[i].ctrl = ctrl;
+-+
+-+		rc = of_property_read_u32(thread_node, "qcom,cpr-thread-id",
+-+					  &ctrl->thread[i].thread_id);
+-+		if (rc) {
+-+			dev_err(dev, "could not read DT property qcom,cpr-thread-id, rc=%d\n",
+-+				rc);
+-+			return rc;
+-+		}
+-+
+-+		if (ctrl->thread[i].thread_id < min_thread_id ||
+-+				ctrl->thread[i].thread_id > max_thread_id) {
+-+			dev_err(dev, "invalid thread id = %u; not within [%u, %u]\n",
+-+				ctrl->thread[i].thread_id, min_thread_id,
+-+				max_thread_id);
+-+			return -EINVAL;
+-+		}
+-+
+-+		/* Verify that the thread ID is unique for all child nodes. */
+-+		for (j = 0; j < i; j++) {
+-+			if (ctrl->thread[j].thread_id
+-+					== ctrl->thread[i].thread_id) {
+-+				dev_err(dev, "duplicate thread id = %u found\n",
+-+					ctrl->thread[i].thread_id);
+-+				return -EINVAL;
+-+			}
+-+		}
+-+
+-+		rc = cpr3_allocate_regulators(&ctrl->thread[i]);
+-+		if (rc)
+-+			return rc;
+-+
+-+		i++;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_map_fuse_base() - ioremap the base address of the fuse region
+-+ * @ctrl:	Pointer to the CPR3 controller
+-+ * @pdev:	Platform device pointer for the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_map_fuse_base(struct cpr3_controller *ctrl,
+-+			struct platform_device *pdev)
+-+{
+-+	struct resource *res;
+-+
+-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fuse_base");
+-+	if (!res || !res->start) {
+-+		dev_err(&pdev->dev, "fuse base address is missing\n");
+-+		return -ENXIO;
+-+	}
+-+
+-+	ctrl->fuse_base = devm_ioremap(&pdev->dev, res->start,
+-+						resource_size(res));
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_read_tcsr_setting - reads the CPR setting bits from TCSR register
+-+ * @ctrl:	Pointer to the CPR3 controller
+-+ * @pdev:	Platform device pointer for the CPR3 controller
+-+ * @start:	start bit in TCSR register
+-+ * @end:	end bit in TCSR register
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_read_tcsr_setting(struct cpr3_controller *ctrl,
+-+			   struct platform_device *pdev, u8 start, u8 end)
+-+{
+-+	struct resource *res;
+-+	void __iomem *tcsr_reg;
+-+	u32 val;
+-+
+-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+-+					   "cpr_tcsr_reg");
+-+	if (!res || !res->start)
+-+		return 0;
+-+
+-+	tcsr_reg = ioremap(res->start, resource_size(res));
+-+	if (!tcsr_reg) {
+-+		dev_err(&pdev->dev, "tcsr ioremap failed\n");
+-+		return 0;
+-+	}
+-+
+-+	val = readl_relaxed(tcsr_reg);
+-+	val &= GENMASK(end, start);
+-+	val >>= start;
+-+
+-+	switch (val) {
+-+	case 1:
+-+		ctrl->cpr_global_setting = CPR_DISABLED;
+-+		break;
+-+	case 2:
+-+		ctrl->cpr_global_setting = CPR_OPEN_LOOP_EN;
+-+		break;
+-+	case 3:
+-+		ctrl->cpr_global_setting = CPR_CLOSED_LOOP_EN;
+-+		break;
+-+	default:
+-+		ctrl->cpr_global_setting = CPR_DEFAULT;
+-+	}
+-+
+-+	iounmap(tcsr_reg);
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_read_fuse_param() - reads a CPR3 fuse parameter out of eFuses
+-+ * @fuse_base_addr:	Virtual memory address of the eFuse base address
+-+ * @param:		Null terminated array of fuse param segments to read
+-+ *			from
+-+ * @param_value:	Output with value read from the eFuses
+-+ *
+-+ * This function reads from each of the parameter segments listed in the param
+-+ * array and concatenates their values together.  Reading stops when an element
+-+ * is reached which has all 0 struct values.  The total number of bits specified
+-+ * for the fuse parameter across all segments must be less than or equal to 64.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_read_fuse_param(void __iomem *fuse_base_addr,
+-+		const struct cpr3_fuse_param *param, u64 *param_value)
+-+{
+-+	u64 fuse_val, val;
+-+	int bits;
+-+	int bits_total = 0;
+-+
+-+	*param_value = 0;
+-+
+-+	while (param->row || param->bit_start || param->bit_end) {
+-+		if (param->bit_start > param->bit_end
+-+		    || param->bit_end > MAX_FUSE_ROW_BIT) {
+-+			pr_err("Invalid fuse parameter segment: row=%u, start=%u, end=%u\n",
+-+				param->row, param->bit_start, param->bit_end);
+-+			return -EINVAL;
+-+		}
+-+
+-+		bits = param->bit_end - param->bit_start + 1;
+-+		if (bits_total + bits > 64) {
+-+			pr_err("Invalid fuse parameter segments; total bits = %d\n",
+-+				bits_total + bits);
+-+			return -EINVAL;
+-+		}
+-+
+-+		fuse_val = readq_relaxed(fuse_base_addr
+-+					 + param->row * BYTES_PER_FUSE_ROW);
+-+		val = (fuse_val >> param->bit_start) & ((1ULL << bits) - 1);
+-+		*param_value |= val << bits_total;
+-+		bits_total += bits;
+-+
+-+		param++;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_convert_open_loop_voltage_fuse() - converts an open loop voltage fuse
+-+ *		value into an absolute voltage with units of microvolts
+-+ * @ref_volt:		Reference voltage in microvolts
+-+ * @step_volt:		The step size in microvolts of the fuse LSB
+-+ * @fuse:		Open loop voltage fuse value
+-+ * @fuse_len:		The bit length of the fuse value
+-+ *
+-+ * The MSB of the fuse parameter corresponds to a sign bit.  If it is set, then
+-+ * the lower bits correspond to the number of steps to go down from the
+-+ * reference voltage.  If it is not set, then the lower bits correspond to the
+-+ * number of steps to go up from the reference voltage.
+-+ */
+-+int cpr3_convert_open_loop_voltage_fuse(int ref_volt, int step_volt, u32 fuse,
+-+					int fuse_len)
+-+{
+-+	int sign, steps;
+-+
+-+	sign = (fuse & (1 << (fuse_len - 1))) ? -1 : 1;
+-+	steps = fuse & ((1 << (fuse_len - 1)) - 1);
+-+
+-+	return ref_volt + sign * steps * step_volt;
+-+}
+-+
+-+/**
+-+ * cpr3_interpolate() - performs linear interpolation
+-+ * @x1		Lower known x value
+-+ * @y1		Lower known y value
+-+ * @x2		Upper known x value
+-+ * @y2		Upper known y value
+-+ * @x		Intermediate x value
+-+ *
+-+ * Returns y where (x, y) falls on the line between (x1, y1) and (x2, y2).
+-+ * It is required that x1 < x2, y1 <= y2, and x1 <= x <= x2.  If these
+-+ * conditions are not met, then y2 will be returned.
+-+ */
+-+u64 cpr3_interpolate(u64 x1, u64 y1, u64 x2, u64 y2, u64 x)
+-+{
+-+	u64 temp;
+-+
+-+	if (x1 >= x2 || y1 > y2 || x1 > x || x > x2)
+-+		return y2;
+-+
+-+	temp = (x2 - x) * (y2 - y1);
+-+	do_div(temp, (u32)(x2 - x1));
+-+
+-+	return y2 - temp;
+-+}
+-+
+-+/**
+-+ * cpr3_parse_array_property() - fill an array from a portion of the values
+-+ *		specified for a device tree property
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @prop_name:		The name of the device tree property to read from
+-+ * @tuple_size:		The number of elements in each tuple
+-+ * @out:		Output data array which must be of size tuple_size
+-+ *
+-+ * cpr3_parse_common_corner_data() must be called for vreg before this function
+-+ * is called so that fuse combo and speed bin size elements are initialized.
+-+ *
+-+ * Three formats are supported for the device tree property:
+-+ * 1. Length == tuple_size
+-+ *	(reading begins at index 0)
+-+ * 2. Length == tuple_size * vreg->fuse_combos_supported
+-+ *	(reading begins at index tuple_size * vreg->fuse_combo)
+-+ * 3. Length == tuple_size * vreg->speed_bins_supported
+-+ *	(reading begins at index tuple_size * vreg->speed_bin_fuse)
+-+ *
+-+ * All other property lengths are treated as errors.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_parse_array_property(struct cpr3_regulator *vreg,
+-+		const char *prop_name, int tuple_size, u32 *out)
+-+{
+-+	struct device_node *node = vreg->of_node;
+-+	int len = 0;
+-+	int i, offset, rc;
+-+
+-+	if (!of_find_property(node, prop_name, &len)) {
+-+		cpr3_err(vreg, "property %s is missing\n", prop_name);
+-+		return -EINVAL;
+-+	}
+-+
+-+	if (len == tuple_size * sizeof(u32)) {
+-+		offset = 0;
+-+	} else if (len == tuple_size * vreg->fuse_combos_supported
+-+				     * sizeof(u32)) {
+-+		offset = tuple_size * vreg->fuse_combo;
+-+	} else if (vreg->speed_bins_supported > 0 &&
+-+		 len == tuple_size * vreg->speed_bins_supported * sizeof(u32)) {
+-+		offset = tuple_size * vreg->speed_bin_fuse;
+-+	} else {
+-+		if (vreg->speed_bins_supported > 0)
+-+			cpr3_err(vreg, "property %s has invalid length=%d, should be %zu, %zu, or %zu\n",
+-+				prop_name, len,
+-+				tuple_size * sizeof(u32),
+-+				tuple_size * vreg->speed_bins_supported
+-+					   * sizeof(u32),
+-+				tuple_size * vreg->fuse_combos_supported
+-+					   * sizeof(u32));
+-+		else
+-+			cpr3_err(vreg, "property %s has invalid length=%d, should be %zu or %zu\n",
+-+				prop_name, len,
+-+				tuple_size * sizeof(u32),
+-+				tuple_size * vreg->fuse_combos_supported
+-+					   * sizeof(u32));
+-+		return -EINVAL;
+-+	}
+-+
+-+	for (i = 0; i < tuple_size; i++) {
+-+		rc = of_property_read_u32_index(node, prop_name, offset + i,
+-+						&out[i]);
+-+		if (rc) {
+-+			cpr3_err(vreg, "error reading property %s, rc=%d\n",
+-+				prop_name, rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_parse_corner_array_property() - fill a per-corner array from a portion
+-+ *		of the values specified for a device tree property
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @prop_name:		The name of the device tree property to read from
+-+ * @tuple_size:		The number of elements in each per-corner tuple
+-+ * @out:		Output data array which must be of size:
+-+ *			tuple_size * vreg->corner_count
+-+ *
+-+ * cpr3_parse_common_corner_data() must be called for vreg before this function
+-+ * is called so that fuse combo and speed bin size elements are initialized.
+-+ *
+-+ * Three formats are supported for the device tree property:
+-+ * 1. Length == tuple_size * vreg->corner_count
+-+ *	(reading begins at index 0)
+-+ * 2. Length == tuple_size * vreg->fuse_combo_corner_sum
+-+ *	(reading begins at index tuple_size * vreg->fuse_combo_offset)
+-+ * 3. Length == tuple_size * vreg->speed_bin_corner_sum
+-+ *	(reading begins at index tuple_size * vreg->speed_bin_offset)
+-+ *
+-+ * All other property lengths are treated as errors.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_parse_corner_array_property(struct cpr3_regulator *vreg,
+-+		const char *prop_name, int tuple_size, u32 *out)
+-+{
+-+	struct device_node *node = vreg->of_node;
+-+	int len = 0;
+-+	int i, offset, rc;
+-+
+-+	if (!of_find_property(node, prop_name, &len)) {
+-+		cpr3_err(vreg, "property %s is missing\n", prop_name);
+-+		return -EINVAL;
+-+	}
+-+
+-+	if (len == tuple_size * vreg->corner_count * sizeof(u32)) {
+-+		offset = 0;
+-+	} else if (len == tuple_size * vreg->fuse_combo_corner_sum
+-+				     * sizeof(u32)) {
+-+		offset = tuple_size * vreg->fuse_combo_offset;
+-+	} else if (vreg->speed_bin_corner_sum > 0 &&
+-+		 len == tuple_size * vreg->speed_bin_corner_sum * sizeof(u32)) {
+-+		offset = tuple_size * vreg->speed_bin_offset;
+-+	} else {
+-+		if (vreg->speed_bin_corner_sum > 0)
+-+			cpr3_err(vreg, "property %s has invalid length=%d, should be %zu, %zu, or %zu\n",
+-+				prop_name, len,
+-+				tuple_size * vreg->corner_count * sizeof(u32),
+-+				tuple_size * vreg->speed_bin_corner_sum
+-+					   * sizeof(u32),
+-+				tuple_size * vreg->fuse_combo_corner_sum
+-+					   * sizeof(u32));
+-+		else
+-+			cpr3_err(vreg, "property %s has invalid length=%d, should be %zu or %zu\n",
+-+				prop_name, len,
+-+				tuple_size * vreg->corner_count * sizeof(u32),
+-+				tuple_size * vreg->fuse_combo_corner_sum
+-+					   * sizeof(u32));
+-+		return -EINVAL;
+-+	}
+-+
+-+	for (i = 0; i < tuple_size * vreg->corner_count; i++) {
+-+		rc = of_property_read_u32_index(node, prop_name, offset + i,
+-+						&out[i]);
+-+		if (rc) {
+-+			cpr3_err(vreg, "error reading property %s, rc=%d\n",
+-+				prop_name, rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_parse_corner_band_array_property() - fill a per-corner band array
+-+ *		from a portion of the values specified for a device tree
+-+ *		property
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @prop_name:		The name of the device tree property to read from
+-+ * @tuple_size:		The number of elements in each per-corner band tuple
+-+ * @out:		Output data array which must be of size:
+-+ *			tuple_size * vreg->corner_band_count
+-+ *
+-+ * cpr3_parse_common_corner_data() must be called for vreg before this function
+-+ * is called so that fuse combo and speed bin size elements are initialized.
+-+ * In addition, corner band fuse combo and speed bin sum and offset elements
+-+ * must be initialized prior to executing this function.
+-+ *
+-+ * Three formats are supported for the device tree property:
+-+ * 1. Length == tuple_size * vreg->corner_band_count
+-+ *	(reading begins at index 0)
+-+ * 2. Length == tuple_size * vreg->fuse_combo_corner_band_sum
+-+ *	(reading begins at index tuple_size *
+-+ *		vreg->fuse_combo_corner_band_offset)
+-+ * 3. Length == tuple_size * vreg->speed_bin_corner_band_sum
+-+ *	(reading begins at index tuple_size *
+-+ *		vreg->speed_bin_corner_band_offset)
+-+ *
+-+ * All other property lengths are treated as errors.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_parse_corner_band_array_property(struct cpr3_regulator *vreg,
+-+		const char *prop_name, int tuple_size, u32 *out)
+-+{
+-+	struct device_node *node = vreg->of_node;
+-+	int len = 0;
+-+	int i, offset, rc;
+-+
+-+	if (!of_find_property(node, prop_name, &len)) {
+-+		cpr3_err(vreg, "property %s is missing\n", prop_name);
+-+		return -EINVAL;
+-+	}
+-+
+-+	if (len == tuple_size * vreg->corner_band_count * sizeof(u32)) {
+-+		offset = 0;
+-+	} else if (len == tuple_size * vreg->fuse_combo_corner_band_sum
+-+				     * sizeof(u32)) {
+-+		offset = tuple_size * vreg->fuse_combo_corner_band_offset;
+-+	} else if (vreg->speed_bin_corner_band_sum > 0 &&
+-+		 len == tuple_size * vreg->speed_bin_corner_band_sum *
+-+		   sizeof(u32)) {
+-+		offset = tuple_size * vreg->speed_bin_corner_band_offset;
+-+	} else {
+-+		if (vreg->speed_bin_corner_band_sum > 0)
+-+			cpr3_err(vreg, "property %s has invalid length=%d, should be %zu, %zu, or %zu\n",
+-+				prop_name, len,
+-+				tuple_size * vreg->corner_band_count *
+-+				 sizeof(u32),
+-+				tuple_size * vreg->speed_bin_corner_band_sum
+-+					   * sizeof(u32),
+-+				tuple_size * vreg->fuse_combo_corner_band_sum
+-+					   * sizeof(u32));
+-+		else
+-+			cpr3_err(vreg, "property %s has invalid length=%d, should be %zu or %zu\n",
+-+				prop_name, len,
+-+				tuple_size * vreg->corner_band_count *
+-+				 sizeof(u32),
+-+				tuple_size * vreg->fuse_combo_corner_band_sum
+-+					   * sizeof(u32));
+-+		return -EINVAL;
+-+	}
+-+
+-+	for (i = 0; i < tuple_size * vreg->corner_band_count; i++) {
+-+		rc = of_property_read_u32_index(node, prop_name, offset + i,
+-+						&out[i]);
+-+		if (rc) {
+-+			cpr3_err(vreg, "error reading property %s, rc=%d\n",
+-+				prop_name, rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_parse_common_corner_data() - parse common CPR3 properties relating to
+-+ *		the corners supported by a CPR3 regulator from device tree
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * This function reads, validates, and utilizes the following device tree
+-+ * properties: qcom,cpr-fuse-corners, qcom,cpr-fuse-combos, qcom,cpr-speed-bins,
+-+ * qcom,cpr-speed-bin-corners, qcom,cpr-corners, qcom,cpr-voltage-ceiling,
+-+ * qcom,cpr-voltage-floor, qcom,corner-frequencies,
+-+ * and qcom,cpr-corner-fmax-map.
+-+ *
+-+ * It initializes these CPR3 regulator elements: corner, corner_count,
+-+ * fuse_combos_supported, fuse_corner_map, and speed_bins_supported.  It
+-+ * initializes these elements for each corner: ceiling_volt, floor_volt,
+-+ * proc_freq, and cpr_fuse_corner.
+-+ *
+-+ * It requires that the following CPR3 regulator elements be initialized before
+-+ * being called: fuse_corner_count, fuse_combo, and speed_bin_fuse.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_parse_common_corner_data(struct cpr3_regulator *vreg)
+-+{
+-+	struct device_node *node = vreg->of_node;
+-+	struct cpr3_controller *ctrl = vreg->thread->ctrl;
+-+	u32 max_fuse_combos, fuse_corners, aging_allowed = 0;
+-+	u32 max_speed_bins = 0;
+-+	u32 *combo_corners;
+-+	u32 *speed_bin_corners;
+-+	u32 *temp;
+-+	int i, j, rc;
+-+
+-+	rc = of_property_read_u32(node, "qcom,cpr-fuse-corners", &fuse_corners);
+-+	if (rc) {
+-+		cpr3_err(vreg, "error reading property qcom,cpr-fuse-corners, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+
+-+	if (vreg->fuse_corner_count != fuse_corners) {
+-+		cpr3_err(vreg, "device tree config supports %d fuse corners but the hardware has %d fuse corners\n",
+-+			fuse_corners, vreg->fuse_corner_count);
+-+		return -EINVAL;
+-+	}
+-+
+-+	rc = of_property_read_u32(node, "qcom,cpr-fuse-combos",
+-+				&max_fuse_combos);
+-+	if (rc) {
+-+		cpr3_err(vreg, "error reading property qcom,cpr-fuse-combos, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+
+-+	/*
+-+	 * Sanity check against arbitrarily large value to avoid excessive
+-+	 * memory allocation.
+-+	 */
+-+	if (max_fuse_combos > 100 || max_fuse_combos == 0) {
+-+		cpr3_err(vreg, "qcom,cpr-fuse-combos is invalid: %u\n",
+-+			max_fuse_combos);
+-+		return -EINVAL;
+-+	}
+-+
+-+	if (vreg->fuse_combo >= max_fuse_combos) {
+-+		cpr3_err(vreg, "device tree config supports fuse combos 0-%u but the hardware has combo %d\n",
+-+			max_fuse_combos - 1, vreg->fuse_combo);
+-+		BUG_ON(1);
+-+		return -EINVAL;
+-+	}
+-+
+-+	vreg->fuse_combos_supported = max_fuse_combos;
+-+
+-+	of_property_read_u32(node, "qcom,cpr-speed-bins", &max_speed_bins);
+-+
+-+	/*
+-+	 * Sanity check against arbitrarily large value to avoid excessive
+-+	 * memory allocation.
+-+	 */
+-+	if (max_speed_bins > 100) {
+-+		cpr3_err(vreg, "qcom,cpr-speed-bins is invalid: %u\n",
+-+			max_speed_bins);
+-+		return -EINVAL;
+-+	}
+-+
+-+	if (max_speed_bins && vreg->speed_bin_fuse >= max_speed_bins) {
+-+		cpr3_err(vreg, "device tree config supports speed bins 0-%u but the hardware has speed bin %d\n",
+-+			max_speed_bins - 1, vreg->speed_bin_fuse);
+-+		BUG();
+-+		return -EINVAL;
+-+	}
+-+
+-+	vreg->speed_bins_supported = max_speed_bins;
+-+
+-+	combo_corners = kcalloc(vreg->fuse_combos_supported,
+-+				sizeof(*combo_corners), GFP_KERNEL);
+-+	if (!combo_corners)
+-+		return -ENOMEM;
+-+
+-+	rc = of_property_read_u32_array(node, "qcom,cpr-corners", combo_corners,
+-+					vreg->fuse_combos_supported);
+-+	if (rc == -EOVERFLOW) {
+-+		/* Single value case */
+-+		rc = of_property_read_u32(node, "qcom,cpr-corners",
+-+					combo_corners);
+-+		for (i = 1; i < vreg->fuse_combos_supported; i++)
+-+			combo_corners[i] = combo_corners[0];
+-+	}
+-+	if (rc) {
+-+		cpr3_err(vreg, "error reading property qcom,cpr-corners, rc=%d\n",
+-+			rc);
+-+		kfree(combo_corners);
+-+		return rc;
+-+	}
+-+
+-+	vreg->fuse_combo_offset = 0;
+-+	vreg->fuse_combo_corner_sum = 0;
+-+	for (i = 0; i < vreg->fuse_combos_supported; i++) {
+-+		vreg->fuse_combo_corner_sum += combo_corners[i];
+-+		if (i < vreg->fuse_combo)
+-+			vreg->fuse_combo_offset += combo_corners[i];
+-+	}
+-+
+-+	vreg->corner_count = combo_corners[vreg->fuse_combo];
+-+
+-+	kfree(combo_corners);
+-+
+-+	vreg->speed_bin_offset = 0;
+-+	vreg->speed_bin_corner_sum = 0;
+-+	if (vreg->speed_bins_supported > 0) {
+-+		speed_bin_corners = kcalloc(vreg->speed_bins_supported,
+-+					sizeof(*speed_bin_corners), GFP_KERNEL);
+-+		if (!speed_bin_corners)
+-+			return -ENOMEM;
+-+
+-+		rc = of_property_read_u32_array(node,
+-+				"qcom,cpr-speed-bin-corners", speed_bin_corners,
+-+				vreg->speed_bins_supported);
+-+		if (rc) {
+-+			cpr3_err(vreg, "error reading property qcom,cpr-speed-bin-corners, rc=%d\n",
+-+				rc);
+-+			kfree(speed_bin_corners);
+-+			return rc;
+-+		}
+-+
+-+		for (i = 0; i < vreg->speed_bins_supported; i++) {
+-+			vreg->speed_bin_corner_sum += speed_bin_corners[i];
+-+			if (i < vreg->speed_bin_fuse)
+-+				vreg->speed_bin_offset += speed_bin_corners[i];
+-+		}
+-+
+-+		if (speed_bin_corners[vreg->speed_bin_fuse]
+-+		    != vreg->corner_count) {
+-+			cpr3_err(vreg, "qcom,cpr-corners and qcom,cpr-speed-bin-corners conflict on number of corners: %d vs %u\n",
+-+				vreg->corner_count,
+-+				speed_bin_corners[vreg->speed_bin_fuse]);
+-+			kfree(speed_bin_corners);
+-+			return -EINVAL;
+-+		}
+-+
+-+		kfree(speed_bin_corners);
+-+	}
+-+
+-+	vreg->corner = devm_kcalloc(ctrl->dev, vreg->corner_count,
+-+				    sizeof(*vreg->corner), GFP_KERNEL);
+-+	temp = kcalloc(vreg->corner_count, sizeof(*temp), GFP_KERNEL);
+-+	if (!vreg->corner || !temp)
+-+		return -ENOMEM;
+-+
+-+	rc = cpr3_parse_corner_array_property(vreg, "qcom,cpr-voltage-ceiling",
+-+			1, temp);
+-+	if (rc)
+-+		goto free_temp;
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		vreg->corner[i].ceiling_volt
+-+			= CPR3_ROUND(temp[i], ctrl->step_volt);
+-+		vreg->corner[i].abs_ceiling_volt = vreg->corner[i].ceiling_volt;
+-+	}
+-+
+-+	rc = cpr3_parse_corner_array_property(vreg, "qcom,cpr-voltage-floor",
+-+			1, temp);
+-+	if (rc)
+-+		goto free_temp;
+-+	for (i = 0; i < vreg->corner_count; i++)
+-+		vreg->corner[i].floor_volt
+-+			= CPR3_ROUND(temp[i], ctrl->step_volt);
+-+
+-+	/* Validate ceiling and floor values */
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		if (vreg->corner[i].floor_volt
+-+		    > vreg->corner[i].ceiling_volt) {
+-+			cpr3_err(vreg, "CPR floor[%d]=%d > ceiling[%d]=%d uV\n",
+-+				i, vreg->corner[i].floor_volt,
+-+				i, vreg->corner[i].ceiling_volt);
+-+			rc = -EINVAL;
+-+			goto free_temp;
+-+		}
+-+	}
+-+
+-+	/* Load optional system-supply voltages */
+-+	if (of_find_property(vreg->of_node, "qcom,system-voltage", NULL)) {
+-+		rc = cpr3_parse_corner_array_property(vreg,
+-+			"qcom,system-voltage", 1, temp);
+-+		if (rc)
+-+			goto free_temp;
+-+		for (i = 0; i < vreg->corner_count; i++)
+-+			vreg->corner[i].system_volt = temp[i];
+-+	}
+-+
+-+	rc = cpr3_parse_corner_array_property(vreg, "qcom,corner-frequencies",
+-+			1, temp);
+-+	if (rc)
+-+		goto free_temp;
+-+	for (i = 0; i < vreg->corner_count; i++)
+-+		vreg->corner[i].proc_freq = temp[i];
+-+
+-+	/* Validate frequencies */
+-+	for (i = 1; i < vreg->corner_count; i++) {
+-+		if (vreg->corner[i].proc_freq
+-+		    < vreg->corner[i - 1].proc_freq) {
+-+			cpr3_err(vreg, "invalid frequency: freq[%d]=%u < freq[%d]=%u\n",
+-+				i, vreg->corner[i].proc_freq, i - 1,
+-+				vreg->corner[i - 1].proc_freq);
+-+			rc = -EINVAL;
+-+			goto free_temp;
+-+		}
+-+	}
+-+
+-+	vreg->fuse_corner_map = devm_kcalloc(ctrl->dev, vreg->fuse_corner_count,
+-+				    sizeof(*vreg->fuse_corner_map), GFP_KERNEL);
+-+	if (!vreg->fuse_corner_map) {
+-+		rc = -ENOMEM;
+-+		goto free_temp;
+-+	}
+-+
+-+	rc = cpr3_parse_array_property(vreg, "qcom,cpr-corner-fmax-map",
+-+		vreg->fuse_corner_count, temp);
+-+	if (rc)
+-+		goto free_temp;
+-+	for (i = 0; i < vreg->fuse_corner_count; i++) {
+-+		vreg->fuse_corner_map[i] = temp[i] - CPR3_CORNER_OFFSET;
+-+		if (temp[i] < CPR3_CORNER_OFFSET
+-+		    || temp[i] > vreg->corner_count + CPR3_CORNER_OFFSET) {
+-+			cpr3_err(vreg, "invalid corner value specified in qcom,cpr-corner-fmax-map: %u\n",
+-+				temp[i]);
+-+			rc = -EINVAL;
+-+			goto free_temp;
+-+		} else if (i > 0 && temp[i - 1] >= temp[i]) {
+-+			cpr3_err(vreg, "invalid corner %u less than or equal to previous corner %u\n",
+-+				temp[i], temp[i - 1]);
+-+			rc = -EINVAL;
+-+			goto free_temp;
+-+		}
+-+	}
+-+	if (temp[vreg->fuse_corner_count - 1] != vreg->corner_count)
+-+		cpr3_debug(vreg, "Note: highest Fmax corner %u in qcom,cpr-corner-fmax-map does not match highest supported corner %d\n",
+-+			temp[vreg->fuse_corner_count - 1],
+-+			vreg->corner_count);
+-+
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		for (j = 0; j < vreg->fuse_corner_count; j++) {
+-+			if (i + CPR3_CORNER_OFFSET <= temp[j]) {
+-+				vreg->corner[i].cpr_fuse_corner = j;
+-+				break;
+-+			}
+-+		}
+-+		if (j == vreg->fuse_corner_count) {
+-+			/*
+-+			 * Handle the case where the highest fuse corner maps
+-+			 * to a corner below the highest corner.
+-+			 */
+-+			vreg->corner[i].cpr_fuse_corner
+-+				= vreg->fuse_corner_count - 1;
+-+		}
+-+	}
+-+
+-+	if (of_find_property(vreg->of_node,
+-+				"qcom,allow-aging-voltage-adjustment", NULL)) {
+-+		rc = cpr3_parse_array_property(vreg,
+-+			"qcom,allow-aging-voltage-adjustment",
+-+			1, &aging_allowed);
+-+		if (rc)
+-+			goto free_temp;
+-+
+-+		vreg->aging_allowed = aging_allowed;
+-+	}
+-+
+-+	if (of_find_property(vreg->of_node,
+-+		       "qcom,allow-aging-open-loop-voltage-adjustment", NULL)) {
+-+		rc = cpr3_parse_array_property(vreg,
+-+			"qcom,allow-aging-open-loop-voltage-adjustment",
+-+			1, &aging_allowed);
+-+		if (rc)
+-+			goto free_temp;
+-+
+-+		vreg->aging_allow_open_loop_adj = aging_allowed;
+-+	}
+-+
+-+	if (vreg->aging_allowed) {
+-+		if (ctrl->aging_ref_volt <= 0) {
+-+			cpr3_err(ctrl, "qcom,cpr-aging-ref-voltage must be specified\n");
+-+			rc = -EINVAL;
+-+			goto free_temp;
+-+		}
+-+
+-+		rc = cpr3_parse_array_property(vreg,
+-+			"qcom,cpr-aging-max-voltage-adjustment",
+-+			1, &vreg->aging_max_adjust_volt);
+-+		if (rc)
+-+			goto free_temp;
+-+
+-+		rc = cpr3_parse_array_property(vreg,
+-+			"qcom,cpr-aging-ref-corner", 1, &vreg->aging_corner);
+-+		if (rc) {
+-+			goto free_temp;
+-+		} else if (vreg->aging_corner < CPR3_CORNER_OFFSET
+-+			   || vreg->aging_corner > vreg->corner_count - 1
+-+							+ CPR3_CORNER_OFFSET) {
+-+			cpr3_err(vreg, "aging reference corner=%d not in range [%d, %d]\n",
+-+				vreg->aging_corner, CPR3_CORNER_OFFSET,
+-+				vreg->corner_count - 1 + CPR3_CORNER_OFFSET);
+-+			rc = -EINVAL;
+-+			goto free_temp;
+-+		}
+-+		vreg->aging_corner -= CPR3_CORNER_OFFSET;
+-+
+-+		if (of_find_property(vreg->of_node, "qcom,cpr-aging-derate",
+-+					NULL)) {
+-+			rc = cpr3_parse_corner_array_property(vreg,
+-+				"qcom,cpr-aging-derate", 1, temp);
+-+			if (rc)
+-+				goto free_temp;
+-+
+-+			for (i = 0; i < vreg->corner_count; i++)
+-+				vreg->corner[i].aging_derate = temp[i];
+-+		} else {
+-+			for (i = 0; i < vreg->corner_count; i++)
+-+				vreg->corner[i].aging_derate
+-+					= CPR3_AGING_DERATE_UNITY;
+-+		}
+-+	}
+-+
+-+free_temp:
+-+	kfree(temp);
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_parse_thread_u32() - parse the specified property from the CPR3 thread's
+-+ *		device tree node and verify that it is within the allowed limits
+-+ * @thread:		Pointer to the CPR3 thread
+-+ * @propname:		The name of the device tree property to read
+-+ * @out_value:		The output pointer to fill with the value read
+-+ * @value_min:		The minimum allowed property value
+-+ * @value_max:		The maximum allowed property value
+-+ *
+-+ * This function prints a verbose error message if the property is missing or
+-+ * has a value which is not within the specified range.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_parse_thread_u32(struct cpr3_thread *thread, const char *propname,
+-+		       u32 *out_value, u32 value_min, u32 value_max)
+-+{
+-+	int rc;
+-+
+-+	rc = of_property_read_u32(thread->of_node, propname, out_value);
+-+	if (rc) {
+-+		cpr3_err(thread->ctrl, "thread %u error reading property %s, rc=%d\n",
+-+			thread->thread_id, propname, rc);
+-+		return rc;
+-+	}
+-+
+-+	if (*out_value < value_min || *out_value > value_max) {
+-+		cpr3_err(thread->ctrl, "thread %u %s=%u is invalid; allowed range: [%u, %u]\n",
+-+			thread->thread_id, propname, *out_value, value_min,
+-+			value_max);
+-+		return -EINVAL;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_parse_ctrl_u32() - parse the specified property from the CPR3
+-+ *		controller's device tree node and verify that it is within the
+-+ *		allowed limits
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ * @propname:		The name of the device tree property to read
+-+ * @out_value:		The output pointer to fill with the value read
+-+ * @value_min:		The minimum allowed property value
+-+ * @value_max:		The maximum allowed property value
+-+ *
+-+ * This function prints a verbose error message if the property is missing or
+-+ * has a value which is not within the specified range.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_parse_ctrl_u32(struct cpr3_controller *ctrl, const char *propname,
+-+		       u32 *out_value, u32 value_min, u32 value_max)
+-+{
+-+	int rc;
+-+
+-+	rc = of_property_read_u32(ctrl->dev->of_node, propname, out_value);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "error reading property %s, rc=%d\n",
+-+			propname, rc);
+-+		return rc;
+-+	}
+-+
+-+	if (*out_value < value_min || *out_value > value_max) {
+-+		cpr3_err(ctrl, "%s=%u is invalid; allowed range: [%u, %u]\n",
+-+			propname, *out_value, value_min, value_max);
+-+		return -EINVAL;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_parse_common_thread_data() - parse common CPR3 thread properties from
+-+ *		device tree
+-+ * @thread:		Pointer to the CPR3 thread
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_parse_common_thread_data(struct cpr3_thread *thread)
+-+{
+-+	int rc;
+-+
+-+	rc = cpr3_parse_thread_u32(thread, "qcom,cpr-consecutive-up",
+-+			&thread->consecutive_up, CPR3_CONSECUTIVE_UP_DOWN_MIN,
+-+			CPR3_CONSECUTIVE_UP_DOWN_MAX);
+-+	if (rc)
+-+		return rc;
+-+
+-+	rc = cpr3_parse_thread_u32(thread, "qcom,cpr-consecutive-down",
+-+			&thread->consecutive_down, CPR3_CONSECUTIVE_UP_DOWN_MIN,
+-+			CPR3_CONSECUTIVE_UP_DOWN_MAX);
+-+	if (rc)
+-+		return rc;
+-+
+-+	rc = cpr3_parse_thread_u32(thread, "qcom,cpr-up-threshold",
+-+			&thread->up_threshold, CPR3_UP_DOWN_THRESHOLD_MIN,
+-+			CPR3_UP_DOWN_THRESHOLD_MAX);
+-+	if (rc)
+-+		return rc;
+-+
+-+	rc = cpr3_parse_thread_u32(thread, "qcom,cpr-down-threshold",
+-+			&thread->down_threshold, CPR3_UP_DOWN_THRESHOLD_MIN,
+-+			CPR3_UP_DOWN_THRESHOLD_MAX);
+-+	if (rc)
+-+		return rc;
+-+
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_parse_irq_affinity() - parse CPR IRQ affinity information
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_parse_irq_affinity(struct cpr3_controller *ctrl)
+-+{
+-+	struct device_node *cpu_node;
+-+	int i, cpu;
+-+	int len = 0;
+-+
+-+	if (!of_find_property(ctrl->dev->of_node, "qcom,cpr-interrupt-affinity",
+-+				&len)) {
+-+		/* No IRQ affinity required */
+-+		return 0;
+-+	}
+-+
+-+	len /= sizeof(u32);
+-+
+-+	for (i = 0; i < len; i++) {
+-+		cpu_node = of_parse_phandle(ctrl->dev->of_node,
+-+					    "qcom,cpr-interrupt-affinity", i);
+-+		if (!cpu_node) {
+-+			cpr3_err(ctrl, "could not find CPU node %d\n", i);
+-+			return -EINVAL;
+-+		}
+-+
+-+		for_each_possible_cpu(cpu) {
+-+			if (of_get_cpu_node(cpu, NULL) == cpu_node) {
+-+				cpumask_set_cpu(cpu, &ctrl->irq_affinity_mask);
+-+				break;
+-+			}
+-+		}
+-+		of_node_put(cpu_node);
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+static int cpr3_panic_notifier_init(struct cpr3_controller *ctrl)
+-+{
+-+	struct device_node *node = ctrl->dev->of_node;
+-+	struct cpr3_panic_regs_info *panic_regs_info;
+-+	struct cpr3_reg_info *regs;
+-+	int i, reg_count, len, rc = 0;
+-+
+-+	if (!of_find_property(node, "qcom,cpr-panic-reg-addr-list", &len)) {
+-+		/* panic register address list not specified */
+-+		return rc;
+-+	}
+-+
+-+	reg_count = len / sizeof(u32);
+-+	if (!reg_count) {
+-+		cpr3_err(ctrl, "qcom,cpr-panic-reg-addr-list has invalid len = %d\n",
+-+			len);
+-+		return -EINVAL;
+-+	}
+-+
+-+	if (!of_find_property(node, "qcom,cpr-panic-reg-name-list", NULL)) {
+-+		cpr3_err(ctrl, "property qcom,cpr-panic-reg-name-list not specified\n");
+-+		return -EINVAL;
+-+	}
+-+
+-+	len = of_property_count_strings(node, "qcom,cpr-panic-reg-name-list");
+-+	if (reg_count != len) {
+-+		cpr3_err(ctrl, "qcom,cpr-panic-reg-name-list should have %d strings\n",
+-+			reg_count);
+-+		return -EINVAL;
+-+	}
+-+
+-+	panic_regs_info = devm_kzalloc(ctrl->dev, sizeof(*panic_regs_info),
+-+					GFP_KERNEL);
+-+	if (!panic_regs_info)
+-+		return -ENOMEM;
+-+
+-+	regs = devm_kcalloc(ctrl->dev, reg_count, sizeof(*regs), GFP_KERNEL);
+-+	if (!regs)
+-+		return -ENOMEM;
+-+
+-+	for (i = 0; i < reg_count; i++) {
+-+		rc = of_property_read_string_index(node,
+-+				"qcom,cpr-panic-reg-name-list", i,
+-+				&(regs[i].name));
+-+		if (rc) {
+-+			cpr3_err(ctrl, "error reading property qcom,cpr-panic-reg-name-list, rc=%d\n",
+-+				rc);
+-+			return rc;
+-+		}
+-+
+-+		rc = of_property_read_u32_index(node,
+-+				"qcom,cpr-panic-reg-addr-list", i,
+-+				&(regs[i].addr));
+-+		if (rc) {
+-+			cpr3_err(ctrl, "error reading property qcom,cpr-panic-reg-addr-list, rc=%d\n",
+-+				rc);
+-+			return rc;
+-+		}
+-+		regs[i].virt_addr = devm_ioremap(ctrl->dev, regs[i].addr, 0x4);
+-+		if (!regs[i].virt_addr) {
+-+			pr_err("Unable to map panic register addr 0x%08x\n",
+-+				regs[i].addr);
+-+			return -EINVAL;
+-+		}
+-+		regs[i].value = 0xFFFFFFFF;
+-+	}
+-+
+-+	panic_regs_info->reg_count = reg_count;
+-+	panic_regs_info->regs = regs;
+-+	ctrl->panic_regs_info = panic_regs_info;
+-+
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_parse_common_ctrl_data() - parse common CPR3 controller properties from
+-+ *		device tree
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_parse_common_ctrl_data(struct cpr3_controller *ctrl)
+-+{
+-+	int rc;
+-+
+-+	rc = cpr3_parse_ctrl_u32(ctrl, "qcom,cpr-sensor-time",
+-+			&ctrl->sensor_time, 0, UINT_MAX);
+-+	if (rc)
+-+		return rc;
+-+
+-+	rc = cpr3_parse_ctrl_u32(ctrl, "qcom,cpr-loop-time",
+-+			&ctrl->loop_time, 0, UINT_MAX);
+-+	if (rc)
+-+		return rc;
+-+
+-+	rc = cpr3_parse_ctrl_u32(ctrl, "qcom,cpr-idle-cycles",
+-+			&ctrl->idle_clocks, CPR3_IDLE_CLOCKS_MIN,
+-+			CPR3_IDLE_CLOCKS_MAX);
+-+	if (rc)
+-+		return rc;
+-+
+-+	rc = cpr3_parse_ctrl_u32(ctrl, "qcom,cpr-step-quot-init-min",
+-+			&ctrl->step_quot_init_min, CPR3_STEP_QUOT_MIN,
+-+			CPR3_STEP_QUOT_MAX);
+-+	if (rc)
+-+		return rc;
+-+
+-+	rc = cpr3_parse_ctrl_u32(ctrl, "qcom,cpr-step-quot-init-max",
+-+			&ctrl->step_quot_init_max, CPR3_STEP_QUOT_MIN,
+-+			CPR3_STEP_QUOT_MAX);
+-+	if (rc)
+-+		return rc;
+-+
+-+	rc = of_property_read_u32(ctrl->dev->of_node, "qcom,voltage-step",
+-+				&ctrl->step_volt);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "error reading property qcom,voltage-step, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+	if (ctrl->step_volt <= 0) {
+-+		cpr3_err(ctrl, "qcom,voltage-step=%d is invalid\n",
+-+			ctrl->step_volt);
+-+		return -EINVAL;
+-+	}
+-+
+-+	rc = cpr3_parse_ctrl_u32(ctrl, "qcom,cpr-count-mode",
+-+			&ctrl->count_mode, CPR3_COUNT_MODE_ALL_AT_ONCE_MIN,
+-+			CPR3_COUNT_MODE_STAGGERED);
+-+	if (rc)
+-+		return rc;
+-+
+-+	/* Count repeat is optional */
+-+	ctrl->count_repeat = 0;
+-+	of_property_read_u32(ctrl->dev->of_node, "qcom,cpr-count-repeat",
+-+			&ctrl->count_repeat);
+-+
+-+	ctrl->cpr_allowed_sw =
+-+		of_property_read_bool(ctrl->dev->of_node, "qcom,cpr-enable") ||
+-+		ctrl->cpr_global_setting == CPR_CLOSED_LOOP_EN;
+-+
+-+	rc = cpr3_parse_irq_affinity(ctrl);
+-+	if (rc)
+-+		return rc;
+-+
+-+	/* Aging reference voltage is optional */
+-+	ctrl->aging_ref_volt = 0;
+-+	of_property_read_u32(ctrl->dev->of_node, "qcom,cpr-aging-ref-voltage",
+-+			&ctrl->aging_ref_volt);
+-+
+-+	/* Aging possible bitmask is optional */
+-+	ctrl->aging_possible_mask = 0;
+-+	of_property_read_u32(ctrl->dev->of_node,
+-+			"qcom,cpr-aging-allowed-reg-mask",
+-+			&ctrl->aging_possible_mask);
+-+
+-+	if (ctrl->aging_possible_mask) {
+-+		/*
+-+		 * Aging possible register value required if bitmask is
+-+		 * specified
+-+		 */
+-+		rc = cpr3_parse_ctrl_u32(ctrl,
+-+				"qcom,cpr-aging-allowed-reg-value",
+-+				&ctrl->aging_possible_val, 0, UINT_MAX);
+-+		if (rc)
+-+			return rc;
+-+	}
+-+
+-+	if (of_find_property(ctrl->dev->of_node, "clock-names", NULL)) {
+-+		ctrl->core_clk = devm_clk_get(ctrl->dev, "core_clk");
+-+		if (IS_ERR(ctrl->core_clk)) {
+-+			rc = PTR_ERR(ctrl->core_clk);
+-+			if (rc != -EPROBE_DEFER)
+-+				cpr3_err(ctrl, "unable request core clock, rc=%d\n",
+-+				rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	rc = cpr3_panic_notifier_init(ctrl);
+-+	if (rc)
+-+		return rc;
+-+
+-+	if (of_find_property(ctrl->dev->of_node, "vdd-supply", NULL)) {
+-+		ctrl->vdd_regulator = devm_regulator_get(ctrl->dev, "vdd");
+-+		if (IS_ERR(ctrl->vdd_regulator)) {
+-+			rc = PTR_ERR(ctrl->vdd_regulator);
+-+			if (rc != -EPROBE_DEFER)
+-+				cpr3_err(ctrl, "unable to request vdd regulator, rc=%d\n",
+-+					 rc);
+-+			return rc;
+-+		}
+-+	} else {
+-+		cpr3_err(ctrl, "vdd supply is not defined\n");
+-+		return -ENODEV;
+-+	}
+-+
+-+	ctrl->system_regulator = devm_regulator_get_optional(ctrl->dev,
+-+								"system");
+-+	if (IS_ERR(ctrl->system_regulator)) {
+-+		rc = PTR_ERR(ctrl->system_regulator);
+-+		if (rc != -EPROBE_DEFER) {
+-+			rc = 0;
+-+			ctrl->system_regulator = NULL;
+-+		} else {
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	ctrl->mem_acc_regulator = devm_regulator_get_optional(ctrl->dev,
+-+							      "mem-acc");
+-+	if (IS_ERR(ctrl->mem_acc_regulator)) {
+-+		rc = PTR_ERR(ctrl->mem_acc_regulator);
+-+		if (rc != -EPROBE_DEFER) {
+-+			rc = 0;
+-+			ctrl->mem_acc_regulator = NULL;
+-+		} else {
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_parse_open_loop_common_ctrl_data() - parse common open loop CPR3
+-+ *			controller properties from device tree
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_parse_open_loop_common_ctrl_data(struct cpr3_controller *ctrl)
+-+{
+-+	int rc;
+-+
+-+	rc = of_property_read_u32(ctrl->dev->of_node, "qcom,voltage-step",
+-+				  &ctrl->step_volt);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "error reading property qcom,voltage-step, rc=%d\n",
+-+			 rc);
+-+		return rc;
+-+	}
+-+
+-+	if (ctrl->step_volt <= 0) {
+-+		cpr3_err(ctrl, "qcom,voltage-step=%d is invalid\n",
+-+			 ctrl->step_volt);
+-+		return -EINVAL;
+-+	}
+-+
+-+	if (of_find_property(ctrl->dev->of_node, "vdd-supply", NULL)) {
+-+		ctrl->vdd_regulator = devm_regulator_get(ctrl->dev, "vdd");
+-+		if (IS_ERR(ctrl->vdd_regulator)) {
+-+			rc = PTR_ERR(ctrl->vdd_regulator);
+-+			if (rc != -EPROBE_DEFER)
+-+				cpr3_err(ctrl, "unable to request vdd regulator, rc=%d\n",
+-+					 rc);
+-+			return rc;
+-+		}
+-+	} else {
+-+		cpr3_err(ctrl, "vdd supply is not defined\n");
+-+		return -ENODEV;
+-+	}
+-+
+-+	ctrl->system_regulator = devm_regulator_get_optional(ctrl->dev,
+-+								"system");
+-+	if (IS_ERR(ctrl->system_regulator)) {
+-+		rc = PTR_ERR(ctrl->system_regulator);
+-+		if (rc != -EPROBE_DEFER) {
+-+			rc = 0;
+-+			ctrl->system_regulator = NULL;
+-+		} else {
+-+			return rc;
+-+		}
+-+	} else {
+-+		rc = regulator_enable(ctrl->system_regulator);
+-+	}
+-+
+-+	ctrl->mem_acc_regulator = devm_regulator_get_optional(ctrl->dev,
+-+							      "mem-acc");
+-+	if (IS_ERR(ctrl->mem_acc_regulator)) {
+-+		rc = PTR_ERR(ctrl->mem_acc_regulator);
+-+		if (rc != -EPROBE_DEFER) {
+-+			rc = 0;
+-+			ctrl->mem_acc_regulator = NULL;
+-+		} else {
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_limit_open_loop_voltages() - modify the open-loop voltage of each corner
+-+ *				so that it fits within the floor to ceiling
+-+ *				voltage range of the corner
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * This function clips the open-loop voltage for each corner so that it is
+-+ * limited to the floor to ceiling range.  It also rounds each open-loop voltage
+-+ * so that it corresponds to a set point available to the underlying regulator.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_limit_open_loop_voltages(struct cpr3_regulator *vreg)
+-+{
+-+	int i, volt;
+-+
+-+	cpr3_debug(vreg, "open-loop voltages after trimming and rounding:\n");
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		volt = CPR3_ROUND(vreg->corner[i].open_loop_volt,
+-+					vreg->thread->ctrl->step_volt);
+-+		if (volt < vreg->corner[i].floor_volt)
+-+			volt = vreg->corner[i].floor_volt;
+-+		else if (volt > vreg->corner[i].ceiling_volt)
+-+			volt = vreg->corner[i].ceiling_volt;
+-+		vreg->corner[i].open_loop_volt = volt;
+-+		cpr3_debug(vreg, "corner[%2d]: open-loop=%d uV\n", i, volt);
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_open_loop_voltage_as_ceiling() - configures the ceiling voltage for each
+-+ *		corner to equal the open-loop voltage if the relevant device
+-+ *		tree property is found for the CPR3 regulator
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * This function assumes that the the open-loop voltage for each corner has
+-+ * already been rounded to the nearest allowed set point and that it falls
+-+ * within the floor to ceiling range.
+-+ *
+-+ * Return: none
+-+ */
+-+void cpr3_open_loop_voltage_as_ceiling(struct cpr3_regulator *vreg)
+-+{
+-+	int i;
+-+
+-+	if (!of_property_read_bool(vreg->of_node,
+-+				"qcom,cpr-scaled-open-loop-voltage-as-ceiling"))
+-+		return;
+-+
+-+	for (i = 0; i < vreg->corner_count; i++)
+-+		vreg->corner[i].ceiling_volt
+-+			= vreg->corner[i].open_loop_volt;
+-+}
+-+
+-+/**
+-+ * cpr3_limit_floor_voltages() - raise the floor voltage of each corner so that
+-+ *		the optional maximum floor to ceiling voltage range specified in
+-+ *		device tree is satisfied
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * This function also ensures that the open-loop voltage for each corner falls
+-+ * within the final floor to ceiling voltage range and that floor voltages
+-+ * increase monotonically.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_limit_floor_voltages(struct cpr3_regulator *vreg)
+-+{
+-+	char *prop = "qcom,cpr-floor-to-ceiling-max-range";
+-+	int i, floor_new;
+-+	u32 *floor_range;
+-+	int rc = 0;
+-+
+-+	if (!of_find_property(vreg->of_node, prop, NULL))
+-+		goto enforce_monotonicity;
+-+
+-+	floor_range = kcalloc(vreg->corner_count, sizeof(*floor_range),
+-+				GFP_KERNEL);
+-+	if (!floor_range)
+-+		return -ENOMEM;
+-+
+-+	rc = cpr3_parse_corner_array_property(vreg, prop, 1, floor_range);
+-+	if (rc)
+-+		goto free_floor_adjust;
+-+
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		if ((s32)floor_range[i] >= 0) {
+-+			floor_new = CPR3_ROUND(vreg->corner[i].ceiling_volt
+-+							- floor_range[i],
+-+						vreg->thread->ctrl->step_volt);
+-+
+-+			vreg->corner[i].floor_volt = max(floor_new,
+-+						vreg->corner[i].floor_volt);
+-+			if (vreg->corner[i].open_loop_volt
+-+			    < vreg->corner[i].floor_volt)
+-+				vreg->corner[i].open_loop_volt
+-+					= vreg->corner[i].floor_volt;
+-+		}
+-+	}
+-+
+-+free_floor_adjust:
+-+	kfree(floor_range);
+-+
+-+enforce_monotonicity:
+-+	/* Ensure that floor voltages increase monotonically. */
+-+	for (i = 1; i < vreg->corner_count; i++) {
+-+		if (vreg->corner[i].floor_volt
+-+		    < vreg->corner[i - 1].floor_volt) {
+-+			cpr3_debug(vreg, "corner %d floor voltage=%d uV < corner %d voltage=%d uV; overriding: corner %d voltage=%d\n",
+-+				i, vreg->corner[i].floor_volt,
+-+				i - 1, vreg->corner[i - 1].floor_volt,
+-+				i, vreg->corner[i - 1].floor_volt);
+-+			vreg->corner[i].floor_volt
+-+				= vreg->corner[i - 1].floor_volt;
+-+
+-+			if (vreg->corner[i].open_loop_volt
+-+			    < vreg->corner[i].floor_volt)
+-+				vreg->corner[i].open_loop_volt
+-+					= vreg->corner[i].floor_volt;
+-+			if (vreg->corner[i].ceiling_volt
+-+			    < vreg->corner[i].floor_volt)
+-+				vreg->corner[i].ceiling_volt
+-+					= vreg->corner[i].floor_volt;
+-+		}
+-+	}
+-+
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_print_quots() - print CPR target quotients into the kernel log for
+-+ *		debugging purposes
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * Return: none
+-+ */
+-+void cpr3_print_quots(struct cpr3_regulator *vreg)
+-+{
+-+	int i, j, pos;
+-+	size_t buflen;
+-+	char *buf;
+-+
+-+	buflen = sizeof(*buf) * CPR3_RO_COUNT * (MAX_CHARS_PER_INT + 2);
+-+	buf = kzalloc(buflen, GFP_KERNEL);
+-+	if (!buf)
+-+		return;
+-+
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		for (j = 0, pos = 0; j < CPR3_RO_COUNT; j++)
+-+			pos += scnprintf(buf + pos, buflen - pos, " %u",
+-+				vreg->corner[i].target_quot[j]);
+-+		cpr3_debug(vreg, "target quots[%2d]:%s\n", i, buf);
+-+	}
+-+
+-+	kfree(buf);
+-+}
+-+
+-+/**
+-+ * cpr3_determine_part_type() - determine the part type (SS/TT/FF).
+-+ *
+-+ * qcom,cpr-part-types prop tells the number of part types for which correction
+-+ * voltages are different. Another prop qcom,cpr-parts-voltage will contain the
+-+ * open loop fuse voltage which will be compared with this part voltage
+-+ * and accordingly part type will de determined.
+-+ *
+-+ * if qcom,cpr-part-types has value n, then qcom,cpr-parts-voltage will be
+-+ * array of n - 1 elements which will contain the voltage in increasing order.
+-+ * This function compares the fused volatge with all these voltage and returns
+-+ * the first index for which the fused volatge is greater.
+-+ *
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @fuse_volt:		fused open loop voltage which will be compared with
+-+ *                      qcom,cpr-parts-voltage array
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_determine_part_type(struct cpr3_regulator *vreg, int fuse_volt)
+-+{
+-+	int i, rc, len;
+-+	u32 volt;
+-+	int soc_version_major;
+-+	char prop_name[100];
+-+	const char prop_name_def[] = "qcom,cpr-parts-voltage";
+-+	const char prop_name_v2[] = "qcom,cpr-parts-voltage-v2";
+-+
+-+	soc_version_major = read_ipq_soc_version_major();
+-+        BUG_ON(soc_version_major <= 0);
+-+
+-+	if (of_property_read_u32(vreg->of_node, "qcom,cpr-part-types",
+-+				  &vreg->part_type_supported))
+-+		return 0;
+-+
+-+	if (soc_version_major > 1)
+-+		strlcpy(prop_name, prop_name_v2, sizeof(prop_name_v2));
+-+	else
+-+		strlcpy(prop_name, prop_name_def, sizeof(prop_name_def));
+-+
+-+	if (!of_find_property(vreg->of_node, prop_name, &len)) {
+-+		cpr3_err(vreg, "property %s is missing\n", prop_name);
+-+		return -EINVAL;
+-+	}
+-+
+-+	if (len != (vreg->part_type_supported - 1) * sizeof(u32)) {
+-+		cpr3_err(vreg, "wrong len in qcom,cpr-parts-voltage\n");
+-+		return -EINVAL;
+-+	}
+-+
+-+	for (i = 0; i < vreg->part_type_supported - 1; i++) {
+-+		rc = of_property_read_u32_index(vreg->of_node,
+-+					prop_name, i, &volt);
+-+		if (rc) {
+-+			cpr3_err(vreg, "error reading property %s, rc=%d\n",
+-+				 prop_name, rc);
+-+			return rc;
+-+		}
+-+
+-+		if (fuse_volt < volt)
+-+			break;
+-+	}
+-+
+-+	vreg->part_type = i;
+-+	return 0;
+-+}
+-+
+-+int cpr3_determine_temp_base_open_loop_correction(struct cpr3_regulator *vreg,
+-+		int *fuse_volt)
+-+{
+-+	int i, rc, prev_volt;
+-+	int *volt_adjust;
+-+	char prop_str[75];
+-+	int soc_version_major = read_ipq_soc_version_major();
+-+
+-+	BUG_ON(soc_version_major <= 0);
+-+
+-+	if (vreg->part_type_supported) {
+-+		if (soc_version_major > 1)
+-+			snprintf(prop_str, sizeof(prop_str),
+-+			"qcom,cpr-cold-temp-voltage-adjustment-v2-%d",
+-+			vreg->part_type);
+-+		else
+-+			snprintf(prop_str, sizeof(prop_str),
+-+			"qcom,cpr-cold-temp-voltage-adjustment-%d",
+-+			vreg->part_type);
+-+	} else {
+-+		strlcpy(prop_str, "qcom,cpr-cold-temp-voltage-adjustment",
+-+			sizeof(prop_str));
+-+	}
+-+
+-+	if (!of_find_property(vreg->of_node, prop_str, NULL)) {
+-+		/* No adjustment required. */
+-+		cpr3_info(vreg, "No cold temperature adjustment required.\n");
+-+		return 0;
+-+	}
+-+
+-+	volt_adjust = kcalloc(vreg->fuse_corner_count, sizeof(*volt_adjust),
+-+	GFP_KERNEL);
+-+	if (!volt_adjust)
+-+		return -ENOMEM;
+-+
+-+	rc = cpr3_parse_array_property(vreg, prop_str,
+-+			vreg->fuse_corner_count, volt_adjust);
+-+	if (rc) {
+-+		cpr3_err(vreg, "could not load cold temp voltage adjustments, rc=%d\n",
+-+			rc);
+-+		goto done;
+-+	}
+-+
+-+	for (i = 0; i < vreg->fuse_corner_count; i++) {
+-+		if (volt_adjust[i]) {
+-+			prev_volt = fuse_volt[i];
+-+			fuse_volt[i] += volt_adjust[i];
+-+			cpr3_debug(vreg,
+-+				"adjusted fuse corner %d open-loop voltage: %d -> %d uV\n",
+-+				i, prev_volt, fuse_volt[i]);
+-+		}
+-+	}
+-+
+-+done:
+-+	kfree(volt_adjust);
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_can_adjust_cold_temp() - Is cold temperature adjustment available
+-+ *
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * This function checks the cold temperature threshold is available
+-+ *
+-+ * Return: true on cold temperature threshold is available, else false
+-+ */
+-+bool cpr3_can_adjust_cold_temp(struct cpr3_regulator *vreg)
+-+{
+-+	char prop_str[75];
+-+	int soc_version_major = read_ipq_soc_version_major();
+-+
+-+	BUG_ON(soc_version_major <= 0);
+-+
+-+	if (soc_version_major > 1)
+-+		strlcpy(prop_str, "qcom,cpr-cold-temp-threshold-v2",
+-+			sizeof(prop_str));
+-+	else
+-+		strlcpy(prop_str, "qcom,cpr-cold-temp-threshold",
+-+			sizeof(prop_str));
+-+
+-+	if (!of_find_property(vreg->of_node, prop_str, NULL)) {
+-+		/* No adjustment required. */
+-+		return false;
+-+	} else
+-+		return true;
+-+}
+-+
+-+/**
+-+ * cpr3_get_cold_temp_threshold() - get cold temperature threshold
+-+ *
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @cold_temp:		cold temperature read.
+-+ *
+-+ * This function reads the cold temperature threshold below which
+-+ * cold temperature adjustment margins will be applied.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_get_cold_temp_threshold(struct cpr3_regulator *vreg, int *cold_temp)
+-+{
+-+	int rc;
+-+	u32 temp;
+-+	char req_prop_str[75], prop_str[75];
+-+	int soc_version_major = read_ipq_soc_version_major();
+-+
+-+	BUG_ON(soc_version_major <= 0);
+-+
+-+	if (vreg->part_type_supported) {
+-+		if (soc_version_major > 1)
+-+			snprintf(req_prop_str, sizeof(req_prop_str),
+-+			"qcom,cpr-cold-temp-voltage-adjustment-v2-%d",
+-+			vreg->part_type);
+-+		else
+-+			snprintf(req_prop_str, sizeof(req_prop_str),
+-+			"qcom,cpr-cold-temp-voltage-adjustment-%d",
+-+			vreg->part_type);
+-+	} else {
+-+		strlcpy(req_prop_str, "qcom,cpr-cold-temp-voltage-adjustment",
+-+			sizeof(req_prop_str));
+-+	}
+-+
+-+	if (soc_version_major > 1)
+-+		strlcpy(prop_str, "qcom,cpr-cold-temp-threshold-v2",
+-+			sizeof(prop_str));
+-+	else
+-+		strlcpy(prop_str, "qcom,cpr-cold-temp-threshold",
+-+			sizeof(prop_str));
+-+
+-+	if (!of_find_property(vreg->of_node, req_prop_str, NULL)) {
+-+		/* No adjustment required. */
+-+		cpr3_info(vreg, "Cold temperature adjustment not required.\n");
+-+		return 0;
+-+	}
+-+
+-+	if (!of_find_property(vreg->of_node, prop_str, NULL)) {
+-+		/* No adjustment required. */
+-+                cpr3_err(vreg, "Missing %s required for %s\n",
+-+			prop_str, req_prop_str);
+-+		return -EINVAL;
+-+        }
+-+
+-+	rc = of_property_read_u32(vreg->of_node, prop_str, &temp);
+-+	if (rc) {
+-+		cpr3_err(vreg, "error reading property %s, rc=%d\n",
+-+			prop_str, rc);
+-+		return rc;
+-+	}
+-+
+-+	*cold_temp = temp;
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_adjust_fused_open_loop_voltages() - adjust the fused open-loop voltages
+-+ *		for each fuse corner according to device tree values
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @fuse_volt:		Pointer to an array of the fused open-loop voltage
+-+ *			values
+-+ *
+-+ * Voltage values in fuse_volt are modified in place.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_adjust_fused_open_loop_voltages(struct cpr3_regulator *vreg,
+-+		int *fuse_volt)
+-+{
+-+	int i, rc, prev_volt;
+-+	int *volt_adjust;
+-+	char prop_str[75];
+-+	int soc_version_major = read_ipq_soc_version_major();
+-+
+-+	BUG_ON(soc_version_major <= 0);
+-+
+-+	if (vreg->part_type_supported) {
+-+		if (soc_version_major > 1)
+-+			snprintf(prop_str, sizeof(prop_str),
+-+			"qcom,cpr-open-loop-voltage-fuse-adjustment-v2-%d",
+-+			vreg->part_type);
+-+		else
+-+		snprintf(prop_str, sizeof(prop_str),
+-+			 "qcom,cpr-open-loop-voltage-fuse-adjustment-%d",
+-+			 vreg->part_type);
+-+	} else {
+-+		strlcpy(prop_str, "qcom,cpr-open-loop-voltage-fuse-adjustment",
+-+			sizeof(prop_str));
+-+	}
+-+
+-+	if (!of_find_property(vreg->of_node, prop_str, NULL)) {
+-+		/* No adjustment required. */
+-+		return 0;
+-+	}
+-+
+-+	volt_adjust = kcalloc(vreg->fuse_corner_count, sizeof(*volt_adjust),
+-+				GFP_KERNEL);
+-+	if (!volt_adjust)
+-+		return -ENOMEM;
+-+
+-+	rc = cpr3_parse_array_property(vreg,
+-+		prop_str, vreg->fuse_corner_count, volt_adjust);
+-+	if (rc) {
+-+		cpr3_err(vreg, "could not load open-loop fused voltage adjustments, rc=%d\n",
+-+			rc);
+-+		goto done;
+-+	}
+-+
+-+	for (i = 0; i < vreg->fuse_corner_count; i++) {
+-+		if (volt_adjust[i]) {
+-+			prev_volt = fuse_volt[i];
+-+			fuse_volt[i] += volt_adjust[i];
+-+			cpr3_debug(vreg, "adjusted fuse corner %d open-loop voltage: %d --> %d uV\n",
+-+				i, prev_volt, fuse_volt[i]);
+-+		}
+-+	}
+-+
+-+done:
+-+	kfree(volt_adjust);
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_adjust_open_loop_voltages() - adjust the open-loop voltages for each
+-+ *		corner according to device tree values
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_adjust_open_loop_voltages(struct cpr3_regulator *vreg)
+-+{
+-+	int i, rc, prev_volt, min_volt;
+-+	int *volt_adjust, *volt_diff;
+-+
+-+	if (!of_find_property(vreg->of_node,
+-+			"qcom,cpr-open-loop-voltage-adjustment", NULL)) {
+-+		/* No adjustment required. */
+-+		return 0;
+-+	}
+-+
+-+	volt_adjust = kcalloc(vreg->corner_count, sizeof(*volt_adjust),
+-+				GFP_KERNEL);
+-+	volt_diff = kcalloc(vreg->corner_count, sizeof(*volt_diff), GFP_KERNEL);
+-+	if (!volt_adjust || !volt_diff) {
+-+		rc = -ENOMEM;
+-+		goto done;
+-+	}
+-+
+-+	rc = cpr3_parse_corner_array_property(vreg,
+-+		"qcom,cpr-open-loop-voltage-adjustment", 1, volt_adjust);
+-+	if (rc) {
+-+		cpr3_err(vreg, "could not load open-loop voltage adjustments, rc=%d\n",
+-+			rc);
+-+		goto done;
+-+	}
+-+
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		if (volt_adjust[i]) {
+-+			prev_volt = vreg->corner[i].open_loop_volt;
+-+			vreg->corner[i].open_loop_volt += volt_adjust[i];
+-+			cpr3_debug(vreg, "adjusted corner %d open-loop voltage: %d --> %d uV\n",
+-+				i, prev_volt, vreg->corner[i].open_loop_volt);
+-+		}
+-+	}
+-+
+-+	if (of_find_property(vreg->of_node,
+-+			"qcom,cpr-open-loop-voltage-min-diff", NULL)) {
+-+		rc = cpr3_parse_corner_array_property(vreg,
+-+			"qcom,cpr-open-loop-voltage-min-diff", 1, volt_diff);
+-+		if (rc) {
+-+			cpr3_err(vreg, "could not load minimum open-loop voltage differences, rc=%d\n",
+-+				rc);
+-+			goto done;
+-+		}
+-+	}
+-+
+-+	/*
+-+	 * Ensure that open-loop voltages increase monotonically with respect
+-+	 * to configurable minimum allowed differences.
+-+	 */
+-+	for (i = 1; i < vreg->corner_count; i++) {
+-+		min_volt = vreg->corner[i - 1].open_loop_volt + volt_diff[i];
+-+		if (vreg->corner[i].open_loop_volt < min_volt) {
+-+			cpr3_debug(vreg, "adjusted corner %d open-loop voltage=%d uV < corner %d voltage=%d uV + min diff=%d uV; overriding: corner %d voltage=%d\n",
+-+				i, vreg->corner[i].open_loop_volt,
+-+				i - 1, vreg->corner[i - 1].open_loop_volt,
+-+				volt_diff[i], i, min_volt);
+-+			vreg->corner[i].open_loop_volt = min_volt;
+-+		}
+-+	}
+-+
+-+done:
+-+	kfree(volt_diff);
+-+	kfree(volt_adjust);
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_quot_adjustment() - returns the quotient adjustment value resulting from
+-+ *		the specified voltage adjustment and RO scaling factor
+-+ * @ro_scale:		The CPR ring oscillator (RO) scaling factor with units
+-+ *			of QUOT/V
+-+ * @volt_adjust:	The amount to adjust the voltage by in units of
+-+ *			microvolts.  This value may be positive or negative.
+-+ */
+-+int cpr3_quot_adjustment(int ro_scale, int volt_adjust)
+-+{
+-+	unsigned long long temp;
+-+	int quot_adjust;
+-+	int sign = 1;
+-+
+-+	if (ro_scale < 0) {
+-+		sign = -sign;
+-+		ro_scale = -ro_scale;
+-+	}
+-+
+-+	if (volt_adjust < 0) {
+-+		sign = -sign;
+-+		volt_adjust = -volt_adjust;
+-+	}
+-+
+-+	temp = (unsigned long long)ro_scale * (unsigned long long)volt_adjust;
+-+	do_div(temp, 1000000);
+-+
+-+	quot_adjust = temp;
+-+	quot_adjust *= sign;
+-+
+-+	return quot_adjust;
+-+}
+-+
+-+/**
+-+ * cpr3_voltage_adjustment() - returns the voltage adjustment value resulting
+-+ *		from the specified quotient adjustment and RO scaling factor
+-+ * @ro_scale:		The CPR ring oscillator (RO) scaling factor with units
+-+ *			of QUOT/V
+-+ * @quot_adjust:	The amount to adjust the quotient by in units of
+-+ *			QUOT.  This value may be positive or negative.
+-+ */
+-+int cpr3_voltage_adjustment(int ro_scale, int quot_adjust)
+-+{
+-+	unsigned long long temp;
+-+	int volt_adjust;
+-+	int sign = 1;
+-+
+-+	if (ro_scale < 0) {
+-+		sign = -sign;
+-+		ro_scale = -ro_scale;
+-+	}
+-+
+-+	if (quot_adjust < 0) {
+-+		sign = -sign;
+-+		quot_adjust = -quot_adjust;
+-+	}
+-+
+-+	if (ro_scale == 0)
+-+		return 0;
+-+
+-+	temp = (unsigned long long)quot_adjust * 1000000;
+-+	do_div(temp, ro_scale);
+-+
+-+	volt_adjust = temp;
+-+	volt_adjust *= sign;
+-+
+-+	return volt_adjust;
+-+}
+-+
+-+/**
+-+ * cpr3_parse_closed_loop_voltage_adjustments() - load per-fuse-corner and
+-+ *		per-corner closed-loop adjustment values from device tree
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @ro_sel:		Array of ring oscillator values selected for each
+-+ *			fuse corner
+-+ * @volt_adjust:	Pointer to array which will be filled with the
+-+ *			per-corner closed-loop adjustment voltages
+-+ * @volt_adjust_fuse:	Pointer to array which will be filled with the
+-+ *			per-fuse-corner closed-loop adjustment voltages
+-+ * @ro_scale:		Pointer to array which will be filled with the
+-+ *			per-fuse-corner RO scaling factor values with units of
+-+ *			QUOT/V
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_parse_closed_loop_voltage_adjustments(
+-+			struct cpr3_regulator *vreg, u64 *ro_sel,
+-+			int *volt_adjust, int *volt_adjust_fuse, int *ro_scale)
+-+{
+-+	int i, rc;
+-+	u32 *ro_all_scale;
+-+
+-+	char volt_adj[] = "qcom,cpr-closed-loop-voltage-adjustment";
+-+	char volt_fuse_adj[] = "qcom,cpr-closed-loop-voltage-fuse-adjustment";
+-+	char ro_scaling[] = "qcom,cpr-ro-scaling-factor";
+-+
+-+	if (!of_find_property(vreg->of_node, volt_adj, NULL)
+-+	    && !of_find_property(vreg->of_node, volt_fuse_adj, NULL)
+-+	    && !vreg->aging_allowed) {
+-+		/* No adjustment required. */
+-+		return 0;
+-+	} else if (!of_find_property(vreg->of_node, ro_scaling, NULL)) {
+-+		cpr3_err(vreg, "Missing %s required for closed-loop voltage adjustment.\n",
+-+				ro_scaling);
+-+		return -EINVAL;
+-+	}
+-+
+-+	ro_all_scale = kcalloc(vreg->fuse_corner_count * CPR3_RO_COUNT,
+-+				sizeof(*ro_all_scale), GFP_KERNEL);
+-+	if (!ro_all_scale)
+-+		return -ENOMEM;
+-+
+-+	rc = cpr3_parse_array_property(vreg, ro_scaling,
+-+		vreg->fuse_corner_count * CPR3_RO_COUNT, ro_all_scale);
+-+	if (rc) {
+-+		cpr3_err(vreg, "could not load RO scaling factors, rc=%d\n",
+-+			rc);
+-+		goto done;
+-+	}
+-+
+-+	for (i = 0; i < vreg->fuse_corner_count; i++)
+-+		ro_scale[i] = ro_all_scale[i * CPR3_RO_COUNT + ro_sel[i]];
+-+
+-+	for (i = 0; i < vreg->corner_count; i++)
+-+		memcpy(vreg->corner[i].ro_scale,
+-+		 &ro_all_scale[vreg->corner[i].cpr_fuse_corner * CPR3_RO_COUNT],
+-+		 sizeof(*ro_all_scale) * CPR3_RO_COUNT);
+-+
+-+	if (of_find_property(vreg->of_node, volt_fuse_adj, NULL)) {
+-+		rc = cpr3_parse_array_property(vreg, volt_fuse_adj,
+-+			vreg->fuse_corner_count, volt_adjust_fuse);
+-+		if (rc) {
+-+			cpr3_err(vreg, "could not load closed-loop fused voltage adjustments, rc=%d\n",
+-+				rc);
+-+			goto done;
+-+		}
+-+	}
+-+
+-+	if (of_find_property(vreg->of_node, volt_adj, NULL)) {
+-+		rc = cpr3_parse_corner_array_property(vreg, volt_adj,
+-+			1, volt_adjust);
+-+		if (rc) {
+-+			cpr3_err(vreg, "could not load closed-loop voltage adjustments, rc=%d\n",
+-+				rc);
+-+			goto done;
+-+		}
+-+	}
+-+
+-+done:
+-+	kfree(ro_all_scale);
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_apm_init() - initialize APM data for a CPR3 controller
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * This function loads memory array power mux (APM) data from device tree
+-+ * if it is present and requests a handle to the appropriate APM controller
+-+ * device.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_apm_init(struct cpr3_controller *ctrl)
+-+{
+-+	struct device_node *node = ctrl->dev->of_node;
+-+	int rc;
+-+
+-+	if (!of_find_property(node, "qcom,apm-ctrl", NULL)) {
+-+		/* No APM used */
+-+		return 0;
+-+	}
+-+
+-+	ctrl->apm = msm_apm_ctrl_dev_get(ctrl->dev);
+-+	if (IS_ERR(ctrl->apm)) {
+-+		rc = PTR_ERR(ctrl->apm);
+-+		if (rc != -EPROBE_DEFER)
+-+			cpr3_err(ctrl, "APM get failed, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	rc = of_property_read_u32(node, "qcom,apm-threshold-voltage",
+-+				&ctrl->apm_threshold_volt);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "error reading qcom,apm-threshold-voltage, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+	ctrl->apm_threshold_volt
+-+		= CPR3_ROUND(ctrl->apm_threshold_volt, ctrl->step_volt);
+-+
+-+	/* No error check since this is an optional property. */
+-+	of_property_read_u32(node, "qcom,apm-hysteresis-voltage",
+-+				&ctrl->apm_adj_volt);
+-+	ctrl->apm_adj_volt = CPR3_ROUND(ctrl->apm_adj_volt, ctrl->step_volt);
+-+
+-+	ctrl->apm_high_supply = MSM_APM_SUPPLY_APCC;
+-+	ctrl->apm_low_supply = MSM_APM_SUPPLY_MX;
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr3_mem_acc_init() - initialize mem-acc regulator data for
+-+ *		a CPR3 regulator
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_mem_acc_init(struct cpr3_regulator *vreg)
+-+{
+-+	struct cpr3_controller *ctrl = vreg->thread->ctrl;
+-+	u32 *temp;
+-+	int i, rc;
+-+
+-+	if (!ctrl->mem_acc_regulator) {
+-+		cpr3_info(ctrl, "not using memory accelerator regulator\n");
+-+		return 0;
+-+	}
+-+
+-+	temp = kcalloc(vreg->corner_count, sizeof(*temp), GFP_KERNEL);
+-+	if (!temp)
+-+		return -ENOMEM;
+-+
+-+	rc = cpr3_parse_corner_array_property(vreg, "qcom,mem-acc-voltage",
+-+					      1, temp);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "could not load mem-acc corners, rc=%d\n", rc);
+-+	} else {
+-+		for (i = 0; i < vreg->corner_count; i++)
+-+			vreg->corner[i].mem_acc_volt = temp[i];
+-+	}
+-+
+-+	kfree(temp);
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr4_load_core_and_temp_adj() - parse amount of voltage adjustment for
+-+ *		per-online-core and per-temperature voltage adjustment for a
+-+ *		given corner or corner band from device tree.
+-+ * @vreg:	Pointer to the CPR3 regulator
+-+ * @num:	Corner number or corner band number
+-+ * @use_corner_band:	Boolean indicating if the CPR3 regulator supports
+-+ *			adjustments per corner band
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr4_load_core_and_temp_adj(struct cpr3_regulator *vreg,
+-+					int num, bool use_corner_band)
+-+{
+-+	struct cpr3_controller *ctrl = vreg->thread->ctrl;
+-+	struct cpr4_sdelta *sdelta;
+-+	int sdelta_size, i, j, pos, rc = 0;
+-+	char str[75];
+-+	size_t buflen;
+-+	char *buf;
+-+
+-+	sdelta = use_corner_band ? vreg->corner_band[num].sdelta :
+-+		vreg->corner[num].sdelta;
+-+
+-+	if (!sdelta->allow_core_count_adj && !sdelta->allow_temp_adj) {
+-+		/* corner doesn't need sdelta table */
+-+		sdelta->max_core_count = 0;
+-+		sdelta->temp_band_count = 0;
+-+		return rc;
+-+	}
+-+
+-+	sdelta_size = sdelta->max_core_count * sdelta->temp_band_count;
+-+	if (use_corner_band)
+-+		snprintf(str, sizeof(str),
+-+			 "corner_band=%d core_config_count=%d temp_band_count=%d sdelta_size=%d\n",
+-+			 num, sdelta->max_core_count,
+-+			 sdelta->temp_band_count, sdelta_size);
+-+	else
+-+		snprintf(str, sizeof(str),
+-+			 "corner=%d core_config_count=%d temp_band_count=%d sdelta_size=%d\n",
+-+			 num, sdelta->max_core_count,
+-+			 sdelta->temp_band_count, sdelta_size);
+-+
+-+	cpr3_debug(vreg, "%s", str);
+-+
+-+	sdelta->table = devm_kcalloc(ctrl->dev, sdelta_size,
+-+				sizeof(*sdelta->table), GFP_KERNEL);
+-+	if (!sdelta->table)
+-+		return -ENOMEM;
+-+
+-+	if (use_corner_band)
+-+		snprintf(str, sizeof(str),
+-+			 "qcom,cpr-corner-band%d-temp-core-voltage-adjustment",
+-+			 num + CPR3_CORNER_OFFSET);
+-+	else
+-+		snprintf(str, sizeof(str),
+-+			 "qcom,cpr-corner%d-temp-core-voltage-adjustment",
+-+			 num + CPR3_CORNER_OFFSET);
+-+
+-+	rc = cpr3_parse_array_property(vreg, str, sdelta_size,
+-+				sdelta->table);
+-+	if (rc) {
+-+		cpr3_err(vreg, "could not load %s, rc=%d\n", str, rc);
+-+		return rc;
+-+	}
+-+
+-+	/*
+-+	 * Convert sdelta margins from uV to PMIC steps and apply negation to
+-+	 * follow the SDELTA register semantics.
+-+	 */
+-+	for (i = 0; i < sdelta_size; i++)
+-+		sdelta->table[i] = -(sdelta->table[i] / ctrl->step_volt);
+-+
+-+	buflen = sizeof(*buf) * sdelta_size * (MAX_CHARS_PER_INT + 2);
+-+	buf = kzalloc(buflen, GFP_KERNEL);
+-+	if (!buf)
+-+		return rc;
+-+
+-+	for (i = 0; i < sdelta->max_core_count; i++) {
+-+		for (j = 0, pos = 0; j < sdelta->temp_band_count; j++)
+-+			pos += scnprintf(buf + pos, buflen - pos, " %u",
+-+			 sdelta->table[i * sdelta->temp_band_count + j]);
+-+		cpr3_debug(vreg, "sdelta[%d]:%s\n", i, buf);
+-+	}
+-+
+-+	kfree(buf);
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr4_parse_core_count_temp_voltage_adj() - parse configuration data for
+-+ *		per-online-core and per-temperature voltage adjustment for
+-+ *		a CPR3 regulator from device tree.
+-+ * @vreg:	Pointer to the CPR3 regulator
+-+ * @use_corner_band:	Boolean indicating if the CPR3 regulator supports
+-+ *			adjustments per corner band
+-+ *
+-+ * This function supports parsing of per-online-core and per-temperature
+-+ * adjustments per corner or per corner band. CPR controllers which support
+-+ * corner bands apply the same adjustments to all corners within a corner band.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr4_parse_core_count_temp_voltage_adj(
+-+			struct cpr3_regulator *vreg, bool use_corner_band)
+-+{
+-+	struct cpr3_controller *ctrl = vreg->thread->ctrl;
+-+	struct device_node *node = vreg->of_node;
+-+	struct cpr3_corner *corner;
+-+	struct cpr4_sdelta *sdelta;
+-+	int i, sdelta_table_count, rc = 0;
+-+	int *allow_core_count_adj = NULL, *allow_temp_adj = NULL;
+-+	char prop_str[75];
+-+
+-+	if (of_find_property(node, use_corner_band ?
+-+			     "qcom,corner-band-allow-temp-adjustment"
+-+			     : "qcom,corner-allow-temp-adjustment", NULL)) {
+-+		if (!ctrl->allow_temp_adj) {
+-+			cpr3_err(ctrl, "Temperature adjustment configurations missing\n");
+-+			return -EINVAL;
+-+		}
+-+
+-+		vreg->allow_temp_adj = true;
+-+	}
+-+
+-+	if (of_find_property(node, use_corner_band ?
+-+			     "qcom,corner-band-allow-core-count-adjustment"
+-+			     : "qcom,corner-allow-core-count-adjustment",
+-+			     NULL)) {
+-+		rc = of_property_read_u32(node, "qcom,max-core-count",
+-+				&vreg->max_core_count);
+-+		if (rc) {
+-+			cpr3_err(vreg, "error reading qcom,max-core-count, rc=%d\n",
+-+				rc);
+-+			return -EINVAL;
+-+		}
+-+
+-+		vreg->allow_core_count_adj = true;
+-+		ctrl->allow_core_count_adj = true;
+-+	}
+-+
+-+	if (!vreg->allow_temp_adj && !vreg->allow_core_count_adj) {
+-+		/*
+-+		 * Both per-online-core and temperature based adjustments are
+-+		 * disabled for this regulator.
+-+		 */
+-+		return 0;
+-+	} else if (!vreg->allow_core_count_adj) {
+-+		/*
+-+		 * Only per-temperature voltage adjusments are allowed.
+-+		 * Keep max core count value as 1 to allocate SDELTA.
+-+		 */
+-+		vreg->max_core_count = 1;
+-+	}
+-+
+-+	if (vreg->allow_core_count_adj) {
+-+		allow_core_count_adj = kcalloc(vreg->corner_count,
+-+					sizeof(*allow_core_count_adj),
+-+					GFP_KERNEL);
+-+		if (!allow_core_count_adj)
+-+			return -ENOMEM;
+-+
+-+		snprintf(prop_str, sizeof(prop_str), "%s", use_corner_band ?
+-+			 "qcom,corner-band-allow-core-count-adjustment" :
+-+			 "qcom,corner-allow-core-count-adjustment");
+-+
+-+		rc = use_corner_band ?
+-+			cpr3_parse_corner_band_array_property(vreg, prop_str,
+-+					      1, allow_core_count_adj) :
+-+			cpr3_parse_corner_array_property(vreg, prop_str,
+-+						 1, allow_core_count_adj);
+-+		if (rc) {
+-+			cpr3_err(vreg, "error reading %s, rc=%d\n", prop_str,
+-+				 rc);
+-+			goto done;
+-+		}
+-+	}
+-+
+-+	if (vreg->allow_temp_adj) {
+-+		allow_temp_adj = kcalloc(vreg->corner_count,
+-+					sizeof(*allow_temp_adj), GFP_KERNEL);
+-+		if (!allow_temp_adj) {
+-+			rc = -ENOMEM;
+-+			goto done;
+-+		}
+-+
+-+		snprintf(prop_str, sizeof(prop_str), "%s", use_corner_band ?
+-+			 "qcom,corner-band-allow-temp-adjustment" :
+-+			 "qcom,corner-allow-temp-adjustment");
+-+
+-+		rc = use_corner_band ?
+-+			cpr3_parse_corner_band_array_property(vreg, prop_str,
+-+						      1, allow_temp_adj) :
+-+			cpr3_parse_corner_array_property(vreg, prop_str,
+-+						 1, allow_temp_adj);
+-+		if (rc) {
+-+			cpr3_err(vreg, "error reading %s, rc=%d\n", prop_str,
+-+				 rc);
+-+			goto done;
+-+		}
+-+	}
+-+
+-+	sdelta_table_count = use_corner_band ? vreg->corner_band_count :
+-+		vreg->corner_count;
+-+
+-+	for (i = 0; i < sdelta_table_count; i++) {
+-+		sdelta = devm_kzalloc(ctrl->dev, sizeof(*corner->sdelta),
+-+				      GFP_KERNEL);
+-+		if (!sdelta) {
+-+			rc = -ENOMEM;
+-+			goto done;
+-+		}
+-+
+-+		if (allow_core_count_adj)
+-+			sdelta->allow_core_count_adj = allow_core_count_adj[i];
+-+		if (allow_temp_adj)
+-+			sdelta->allow_temp_adj = allow_temp_adj[i];
+-+		sdelta->max_core_count = vreg->max_core_count;
+-+		sdelta->temp_band_count = ctrl->temp_band_count;
+-+
+-+		if (use_corner_band)
+-+			vreg->corner_band[i].sdelta = sdelta;
+-+		else
+-+			vreg->corner[i].sdelta = sdelta;
+-+
+-+		rc = cpr4_load_core_and_temp_adj(vreg, i, use_corner_band);
+-+		if (rc) {
+-+			cpr3_err(vreg, "corner/band %d core and temp adjustment loading failed, rc=%d\n",
+-+				 i, rc);
+-+			goto done;
+-+		}
+-+	}
+-+
+-+done:
+-+	kfree(allow_core_count_adj);
+-+	kfree(allow_temp_adj);
+-+
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cprh_adjust_voltages_for_apm() - adjust per-corner floor and ceiling voltages
+-+ *		so that they do not overlap the APM threshold voltage.
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * The memory array power mux (APM) must be configured for a specific supply
+-+ * based upon where the VDD voltage lies with respect to the APM threshold
+-+ * voltage.  When using CPR hardware closed-loop, the voltage may vary anywhere
+-+ * between the floor and ceiling voltage without software notification.
+-+ * Therefore, it is required that the floor to ceiling range for every corner
+-+ * not intersect the APM threshold voltage.  This function adjusts the floor to
+-+ * ceiling range for each corner which violates this requirement.
+-+ *
+-+ * The following algorithm is applied:
+-+ *	if floor < threshold <= ceiling:
+-+ *		if open_loop >= threshold, then floor = threshold - adj
+-+ *		else ceiling = threshold - step
+-+ * where:
+-+ *	adj = APM hysteresis voltage established to minimize the number of
+-+ *	      corners with artificially increased floor voltages
+-+ *	step = voltage in microvolts of a single step of the VDD supply
+-+ *
+-+ * The open-loop voltage is also bounded by the new floor or ceiling value as
+-+ * needed.
+-+ *
+-+ * Return: none
+-+ */
+-+void cprh_adjust_voltages_for_apm(struct cpr3_regulator *vreg)
+-+{
+-+	struct cpr3_controller *ctrl = vreg->thread->ctrl;
+-+	struct cpr3_corner *corner;
+-+	int i, adj, threshold, prev_ceiling, prev_floor, prev_open_loop;
+-+
+-+	if (!ctrl->apm_threshold_volt) {
+-+		/* APM not being used. */
+-+		return;
+-+	}
+-+
+-+	ctrl->apm_threshold_volt = CPR3_ROUND(ctrl->apm_threshold_volt,
+-+						ctrl->step_volt);
+-+	ctrl->apm_adj_volt = CPR3_ROUND(ctrl->apm_adj_volt, ctrl->step_volt);
+-+
+-+	threshold = ctrl->apm_threshold_volt;
+-+	adj = ctrl->apm_adj_volt;
+-+
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		corner = &vreg->corner[i];
+-+
+-+		if (threshold <= corner->floor_volt
+-+		    || threshold > corner->ceiling_volt)
+-+			continue;
+-+
+-+		prev_floor = corner->floor_volt;
+-+		prev_ceiling = corner->ceiling_volt;
+-+		prev_open_loop = corner->open_loop_volt;
+-+
+-+		if (corner->open_loop_volt >= threshold) {
+-+			corner->floor_volt = max(corner->floor_volt,
+-+						 threshold - adj);
+-+			if (corner->open_loop_volt < corner->floor_volt)
+-+				corner->open_loop_volt = corner->floor_volt;
+-+		} else {
+-+			corner->ceiling_volt = threshold - ctrl->step_volt;
+-+		}
+-+
+-+		if (corner->floor_volt != prev_floor
+-+		    || corner->ceiling_volt != prev_ceiling
+-+		    || corner->open_loop_volt != prev_open_loop)
+-+			cpr3_debug(vreg, "APM threshold=%d, APM adj=%d changed corner %d voltages; prev: floor=%d, ceiling=%d, open-loop=%d; new: floor=%d, ceiling=%d, open-loop=%d\n",
+-+				threshold, adj, i, prev_floor, prev_ceiling,
+-+				prev_open_loop, corner->floor_volt,
+-+				corner->ceiling_volt, corner->open_loop_volt);
+-+	}
+-+}
+-+
+-+/**
+-+ * cprh_adjust_voltages_for_mem_acc() - adjust per-corner floor and ceiling
+-+ *		voltages so that they do not intersect the MEM ACC threshold
+-+ *		voltage
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * The following algorithm is applied:
+-+ *	if floor < threshold <= ceiling:
+-+ *		if open_loop >= threshold, then floor = threshold
+-+ *		else ceiling = threshold - step
+-+ * where:
+-+ *	step = voltage in microvolts of a single step of the VDD supply
+-+ *
+-+ * The open-loop voltage is also bounded by the new floor or ceiling value as
+-+ * needed.
+-+ *
+-+ * Return: none
+-+ */
+-+void cprh_adjust_voltages_for_mem_acc(struct cpr3_regulator *vreg)
+-+{
+-+	struct cpr3_controller *ctrl = vreg->thread->ctrl;
+-+	struct cpr3_corner *corner;
+-+	int i, threshold, prev_ceiling, prev_floor, prev_open_loop;
+-+
+-+	if (!ctrl->mem_acc_threshold_volt) {
+-+		/* MEM ACC not being used. */
+-+		return;
+-+	}
+-+
+-+	ctrl->mem_acc_threshold_volt = CPR3_ROUND(ctrl->mem_acc_threshold_volt,
+-+						ctrl->step_volt);
+-+
+-+	threshold = ctrl->mem_acc_threshold_volt;
+-+
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		corner = &vreg->corner[i];
+-+
+-+		if (threshold <= corner->floor_volt
+-+		    || threshold > corner->ceiling_volt)
+-+			continue;
+-+
+-+		prev_floor = corner->floor_volt;
+-+		prev_ceiling = corner->ceiling_volt;
+-+		prev_open_loop = corner->open_loop_volt;
+-+
+-+		if (corner->open_loop_volt >= threshold) {
+-+			corner->floor_volt = max(corner->floor_volt, threshold);
+-+			if (corner->open_loop_volt < corner->floor_volt)
+-+				corner->open_loop_volt = corner->floor_volt;
+-+		} else {
+-+			corner->ceiling_volt = threshold - ctrl->step_volt;
+-+		}
+-+
+-+		if (corner->floor_volt != prev_floor
+-+		    || corner->ceiling_volt != prev_ceiling
+-+		    || corner->open_loop_volt != prev_open_loop)
+-+			cpr3_debug(vreg, "MEM ACC threshold=%d changed corner %d voltages; prev: floor=%d, ceiling=%d, open-loop=%d; new: floor=%d, ceiling=%d, open-loop=%d\n",
+-+				threshold, i, prev_floor, prev_ceiling,
+-+				prev_open_loop, corner->floor_volt,
+-+				corner->ceiling_volt, corner->open_loop_volt);
+-+	}
+-+}
+-+
+-+/**
+-+ * cpr3_apply_closed_loop_offset_voltages() - modify the closed-loop voltage
+-+ *		adjustments by the amounts that are needed for this
+-+ *		fuse combo
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @volt_adjust:	Array of closed-loop voltage adjustment values of length
+-+ *			vreg->corner_count which is further adjusted based upon
+-+ *			offset voltage fuse values.
+-+ * @fuse_volt_adjust:	Fused closed-loop voltage adjustment values of length
+-+ *			vreg->fuse_corner_count.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr3_apply_closed_loop_offset_voltages(struct cpr3_regulator *vreg,
+-+			int *volt_adjust, int *fuse_volt_adjust)
+-+{
+-+	u32 *corner_map;
+-+	int rc = 0, i;
+-+
+-+	if (!of_find_property(vreg->of_node,
+-+		"qcom,cpr-fused-closed-loop-voltage-adjustment-map", NULL)) {
+-+		/* No closed-loop offset required. */
+-+		return 0;
+-+	}
+-+
+-+	corner_map = kcalloc(vreg->corner_count, sizeof(*corner_map),
+-+				GFP_KERNEL);
+-+	if (!corner_map)
+-+		return -ENOMEM;
+-+
+-+	rc = cpr3_parse_corner_array_property(vreg,
+-+		"qcom,cpr-fused-closed-loop-voltage-adjustment-map",
+-+		1, corner_map);
+-+	if (rc)
+-+		goto done;
+-+
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		if (corner_map[i] == 0) {
+-+			continue;
+-+		} else if (corner_map[i] > vreg->fuse_corner_count) {
+-+			cpr3_err(vreg, "corner %d mapped to invalid fuse corner: %u\n",
+-+				i, corner_map[i]);
+-+			rc = -EINVAL;
+-+			goto done;
+-+		}
+-+
+-+		volt_adjust[i] += fuse_volt_adjust[corner_map[i] - 1];
+-+	}
+-+
+-+done:
+-+	kfree(corner_map);
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr3_enforce_inc_quotient_monotonicity() - Ensure that target quotients
+-+ *		increase monotonically from lower to higher corners
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static void cpr3_enforce_inc_quotient_monotonicity(struct cpr3_regulator *vreg)
+-+{
+-+	int i, j;
+-+
+-+	for (i = 1; i < vreg->corner_count; i++) {
+-+		for (j = 0; j < CPR3_RO_COUNT; j++) {
+-+			if (vreg->corner[i].target_quot[j]
+-+			    && vreg->corner[i].target_quot[j]
+-+					< vreg->corner[i - 1].target_quot[j]) {
+-+				cpr3_debug(vreg, "corner %d RO%u target quot=%u < corner %d RO%u target quot=%u; overriding: corner %d RO%u target quot=%u\n",
+-+					i, j,
+-+					vreg->corner[i].target_quot[j],
+-+					i - 1, j,
+-+					vreg->corner[i - 1].target_quot[j],
+-+					i, j,
+-+					vreg->corner[i - 1].target_quot[j]);
+-+				vreg->corner[i].target_quot[j]
+-+					= vreg->corner[i - 1].target_quot[j];
+-+			}
+-+		}
+-+	}
+-+}
+-+
+-+/**
+-+ * cpr3_enforce_dec_quotient_monotonicity() - Ensure that target quotients
+-+ *		decrease monotonically from higher to lower corners
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static void cpr3_enforce_dec_quotient_monotonicity(struct cpr3_regulator *vreg)
+-+{
+-+	int i, j;
+-+
+-+	for (i = vreg->corner_count - 2; i >= 0; i--) {
+-+		for (j = 0; j < CPR3_RO_COUNT; j++) {
+-+			if (vreg->corner[i + 1].target_quot[j]
+-+			    && vreg->corner[i].target_quot[j]
+-+					> vreg->corner[i + 1].target_quot[j]) {
+-+				cpr3_debug(vreg, "corner %d RO%u target quot=%u > corner %d RO%u target quot=%u; overriding: corner %d RO%u target quot=%u\n",
+-+					i, j,
+-+					vreg->corner[i].target_quot[j],
+-+					i + 1, j,
+-+					vreg->corner[i + 1].target_quot[j],
+-+					i, j,
+-+					vreg->corner[i + 1].target_quot[j]);
+-+				vreg->corner[i].target_quot[j]
+-+					= vreg->corner[i + 1].target_quot[j];
+-+			}
+-+		}
+-+	}
+-+}
+-+
+-+/**
+-+ * _cpr3_adjust_target_quotients() - adjust the target quotients for each
+-+ *		corner of the regulator according to input adjustment and
+-+ *		scaling arrays
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @volt_adjust:	Pointer to an array of closed-loop voltage adjustments
+-+ *			with units of microvolts.  The array must have
+-+ *			vreg->corner_count number of elements.
+-+ * @ro_scale:		Pointer to a flattened 2D array of RO scaling factors.
+-+ *			The array must have an inner dimension of CPR3_RO_COUNT
+-+ *			and an outer dimension of vreg->corner_count
+-+ * @label:		Null terminated string providing a label for the type
+-+ *			of adjustment.
+-+ *
+-+ * Return: true if any corners received a positive voltage adjustment (> 0),
+-+ *	   else false
+-+ */
+-+static bool _cpr3_adjust_target_quotients(struct cpr3_regulator *vreg,
+-+		const int *volt_adjust, const int *ro_scale, const char *label)
+-+{
+-+	int i, j, quot_adjust;
+-+	bool is_increasing = false;
+-+	u32 prev_quot;
+-+
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		for (j = 0; j < CPR3_RO_COUNT; j++) {
+-+			if (vreg->corner[i].target_quot[j]) {
+-+				quot_adjust = cpr3_quot_adjustment(
+-+					ro_scale[i * CPR3_RO_COUNT + j],
+-+					volt_adjust[i]);
+-+				if (quot_adjust) {
+-+					prev_quot = vreg->corner[i].
+-+							target_quot[j];
+-+					vreg->corner[i].target_quot[j]
+-+						+= quot_adjust;
+-+					cpr3_debug(vreg, "adjusted corner %d RO%d target quot %s: %u --> %u (%d uV)\n",
+-+						i, j, label, prev_quot,
+-+						vreg->corner[i].target_quot[j],
+-+						volt_adjust[i]);
+-+				}
+-+			}
+-+		}
+-+		if (volt_adjust[i] > 0)
+-+			is_increasing = true;
+-+	}
+-+
+-+	return is_increasing;
+-+}
+-+
+-+/**
+-+ * cpr3_adjust_target_quotients() - adjust the target quotients for each
+-+ *			corner according to device tree values and fuse values
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @fuse_volt_adjust:	Fused closed-loop voltage adjustment values of length
+-+ *			vreg->fuse_corner_count. This parameter could be null
+-+ *			pointer when no fused adjustments are needed.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+int cpr3_adjust_target_quotients(struct cpr3_regulator *vreg,
+-+			int *fuse_volt_adjust)
+-+{
+-+	int i, rc;
+-+	int *volt_adjust, *ro_scale;
+-+	bool explicit_adjustment, fused_adjustment, is_increasing;
+-+
+-+	explicit_adjustment = of_find_property(vreg->of_node,
+-+		"qcom,cpr-closed-loop-voltage-adjustment", NULL);
+-+	fused_adjustment = of_find_property(vreg->of_node,
+-+		"qcom,cpr-fused-closed-loop-voltage-adjustment-map", NULL);
+-+
+-+	if (!explicit_adjustment && !fused_adjustment && !vreg->aging_allowed) {
+-+		/* No adjustment required. */
+-+		return 0;
+-+	} else if (!of_find_property(vreg->of_node,
+-+			"qcom,cpr-ro-scaling-factor", NULL)) {
+-+		cpr3_err(vreg, "qcom,cpr-ro-scaling-factor is required for closed-loop voltage adjustment, but is missing\n");
+-+		return -EINVAL;
+-+	}
+-+
+-+	volt_adjust = kcalloc(vreg->corner_count, sizeof(*volt_adjust),
+-+				GFP_KERNEL);
+-+	ro_scale = kcalloc(vreg->corner_count * CPR3_RO_COUNT,
+-+				sizeof(*ro_scale), GFP_KERNEL);
+-+	if (!volt_adjust || !ro_scale) {
+-+		rc = -ENOMEM;
+-+		goto done;
+-+	}
+-+
+-+	rc = cpr3_parse_corner_array_property(vreg,
+-+			"qcom,cpr-ro-scaling-factor", CPR3_RO_COUNT, ro_scale);
+-+	if (rc) {
+-+		cpr3_err(vreg, "could not load RO scaling factors, rc=%d\n",
+-+			rc);
+-+		goto done;
+-+	}
+-+
+-+	for (i = 0; i < vreg->corner_count; i++)
+-+		memcpy(vreg->corner[i].ro_scale, &ro_scale[i * CPR3_RO_COUNT],
+-+			sizeof(*ro_scale) * CPR3_RO_COUNT);
+-+
+-+	if (explicit_adjustment) {
+-+		rc = cpr3_parse_corner_array_property(vreg,
+-+			"qcom,cpr-closed-loop-voltage-adjustment",
+-+			1, volt_adjust);
+-+		if (rc) {
+-+			cpr3_err(vreg, "could not load closed-loop voltage adjustments, rc=%d\n",
+-+				rc);
+-+			goto done;
+-+		}
+-+
+-+		_cpr3_adjust_target_quotients(vreg, volt_adjust, ro_scale,
+-+			"from DT");
+-+		cpr3_enforce_inc_quotient_monotonicity(vreg);
+-+	}
+-+
+-+	if (fused_adjustment && fuse_volt_adjust) {
+-+		memset(volt_adjust, 0,
+-+			sizeof(*volt_adjust) * vreg->corner_count);
+-+
+-+		rc = cpr3_apply_closed_loop_offset_voltages(vreg, volt_adjust,
+-+				fuse_volt_adjust);
+-+		if (rc) {
+-+			cpr3_err(vreg, "could not apply fused closed-loop voltage reductions, rc=%d\n",
+-+				rc);
+-+			goto done;
+-+		}
+-+
+-+		is_increasing = _cpr3_adjust_target_quotients(vreg, volt_adjust,
+-+					ro_scale, "from fuse");
+-+		if (is_increasing)
+-+			cpr3_enforce_inc_quotient_monotonicity(vreg);
+-+		else
+-+			cpr3_enforce_dec_quotient_monotonicity(vreg);
+-+	}
+-+
+-+done:
+-+	kfree(volt_adjust);
+-+	kfree(ro_scale);
+-+	return rc;
+-+}
+---- /dev/null
+-+++ b/drivers/regulator/cpr4-apss-regulator.c
+-@@ -0,0 +1,1819 @@
+-+/*
+-+ * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
+-+ *
+-+ * This program is free software; you can redistribute it and/or modify
+-+ * it under the terms of the GNU General Public License version 2 and
+-+ * only version 2 as published by the Free Software Foundation.
+-+ *
+-+ * This program is distributed in the hope that it will be useful,
+-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-+ * GNU General Public License for more details.
+-+ */
+-+
+-+#define pr_fmt(fmt) "%s: " fmt, __func__
+-+
+-+#include <linux/bitops.h>
+-+#include <linux/debugfs.h>
+-+#include <linux/err.h>
+-+#include <linux/init.h>
+-+#include <linux/interrupt.h>
+-+#include <linux/io.h>
+-+#include <linux/kernel.h>
+-+#include <linux/list.h>
+-+#include <linux/module.h>
+-+#include <linux/of.h>
+-+#include <linux/of_device.h>
+-+#include <linux/platform_device.h>
+-+#include <linux/pm_opp.h>
+-+#include <linux/slab.h>
+-+#include <linux/string.h>
+-+#include <linux/uaccess.h>
+-+#include <linux/regulator/driver.h>
+-+#include <linux/regulator/machine.h>
+-+#include <linux/regulator/of_regulator.h>
+-+
+-+#include "cpr3-regulator.h"
+-+
+-+#define IPQ807x_APSS_FUSE_CORNERS	4
+-+#define IPQ817x_APPS_FUSE_CORNERS	2
+-+#define IPQ6018_APSS_FUSE_CORNERS 	4
+-+#define IPQ9574_APSS_FUSE_CORNERS       4
+-+
+-+u32 g_valid_fuse_count = IPQ807x_APSS_FUSE_CORNERS;
+-+
+-+/**
+-+ * struct cpr4_ipq807x_apss_fuses - APSS specific fuse data for IPQ807x
+-+ * @ro_sel:		Ring oscillator select fuse parameter value for each
+-+ *			fuse corner
+-+ * @init_voltage:	Initial (i.e. open-loop) voltage fuse parameter value
+-+ *			for each fuse corner (raw, not converted to a voltage)
+-+ * @target_quot:	CPR target quotient fuse parameter value for each fuse
+-+ *			corner
+-+ * @quot_offset:	CPR target quotient offset fuse parameter value for each
+-+ *			fuse corner (raw, not unpacked) used for target quotient
+-+ *			interpolation
+-+ * @speed_bin:		Application processor speed bin fuse parameter value for
+-+ *			the given chip
+-+ * @cpr_fusing_rev:	CPR fusing revision fuse parameter value
+-+ * @boost_cfg:		CPR boost configuration fuse parameter value
+-+ * @boost_voltage:	CPR boost voltage fuse parameter value (raw, not
+-+ *			converted to a voltage)
+-+ *
+-+ * This struct holds the values for all of the fuses read from memory.
+-+ */
+-+struct cpr4_ipq807x_apss_fuses {
+-+	u64	ro_sel[IPQ807x_APSS_FUSE_CORNERS];
+-+	u64	init_voltage[IPQ807x_APSS_FUSE_CORNERS];
+-+	u64	target_quot[IPQ807x_APSS_FUSE_CORNERS];
+-+	u64	quot_offset[IPQ807x_APSS_FUSE_CORNERS];
+-+	u64	speed_bin;
+-+	u64	cpr_fusing_rev;
+-+	u64	boost_cfg;
+-+	u64	boost_voltage;
+-+	u64	misc;
+-+};
+-+
+-+/*
+-+ * fuse combo = fusing revision + 8 * (speed bin)
+-+ * where: fusing revision = 0 - 7 and speed bin = 0 - 7
+-+ */
+-+#define CPR4_IPQ807x_APSS_FUSE_COMBO_COUNT	64
+-+
+-+/*
+-+ * Constants which define the name of each fuse corner.
+-+ */
+-+enum cpr4_ipq807x_apss_fuse_corner {
+-+	CPR4_IPQ807x_APSS_FUSE_CORNER_SVS	= 0,
+-+	CPR4_IPQ807x_APSS_FUSE_CORNER_NOM	= 1,
+-+	CPR4_IPQ807x_APSS_FUSE_CORNER_TURBO	= 2,
+-+	CPR4_IPQ807x_APSS_FUSE_CORNER_STURBO	= 3,
+-+};
+-+
+-+static const char * const cpr4_ipq807x_apss_fuse_corner_name[] = {
+-+	[CPR4_IPQ807x_APSS_FUSE_CORNER_SVS]	= "SVS",
+-+	[CPR4_IPQ807x_APSS_FUSE_CORNER_NOM]	= "NOM",
+-+	[CPR4_IPQ807x_APSS_FUSE_CORNER_TURBO]	= "TURBO",
+-+	[CPR4_IPQ807x_APSS_FUSE_CORNER_STURBO]	= "STURBO",
+-+};
+-+
+-+/*
+-+ * IPQ807x APSS fuse parameter locations:
+-+ *
+-+ * Structs are organized with the following dimensions:
+-+ *	Outer: 0 to 3 for fuse corners from lowest to highest corner
+-+ *	Inner: large enough to hold the longest set of parameter segments which
+-+ *		fully defines a fuse parameter, +1 (for NULL termination).
+-+ *		Each segment corresponds to a contiguous group of bits from a
+-+ *		single fuse row.  These segments are concatentated together in
+-+ *		order to form the full fuse parameter value.  The segments for
+-+ *		a given parameter may correspond to different fuse rows.
+-+ */
+-+static struct cpr3_fuse_param
+-+ipq807x_apss_ro_sel_param[IPQ807x_APSS_FUSE_CORNERS][2] = {
+-+	{{73,  8, 11}, {} },
+-+	{{73,  4,  7}, {} },
+-+	{{73,  0,  3}, {} },
+-+	{{73, 12, 15}, {} },
+-+};
+-+
+-+static struct cpr3_fuse_param
+-+ipq807x_apss_init_voltage_param[IPQ807x_APSS_FUSE_CORNERS][2] = {
+-+	{{71, 18, 23}, {} },
+-+	{{71, 12, 17}, {} },
+-+	{{71,  6, 11}, {} },
+-+	{{71,  0,  5}, {} },
+-+};
+-+
+-+static struct cpr3_fuse_param
+-+ipq807x_apss_target_quot_param[IPQ807x_APSS_FUSE_CORNERS][2] = {
+-+	{{72, 32, 43}, {} },
+-+	{{72, 20, 31}, {} },
+-+	{{72,  8, 19}, {} },
+-+	{{72, 44, 55}, {} },
+-+};
+-+
+-+static struct cpr3_fuse_param
+-+ipq807x_apss_quot_offset_param[IPQ807x_APSS_FUSE_CORNERS][2] = {
+-+	{{} },
+-+	{{71, 46, 52}, {} },
+-+	{{71, 39, 45}, {} },
+-+	{{71, 32, 38}, {} },
+-+};
+-+
+-+static struct cpr3_fuse_param ipq807x_cpr_fusing_rev_param[] = {
+-+	{71, 53, 55},
+-+	{},
+-+};
+-+
+-+static struct cpr3_fuse_param ipq807x_apss_speed_bin_param[] = {
+-+	{36, 40, 42},
+-+	{},
+-+};
+-+
+-+static struct cpr3_fuse_param ipq807x_cpr_boost_fuse_cfg_param[] = {
+-+	{36, 43, 45},
+-+	{},
+-+};
+-+
+-+static struct cpr3_fuse_param ipq807x_apss_boost_fuse_volt_param[] = {
+-+	{71, 0, 5},
+-+	{},
+-+};
+-+
+-+static struct cpr3_fuse_param ipq807x_misc_fuse_volt_adj_param[] = {
+-+	{36, 54, 54},
+-+	{},
+-+};
+-+
+-+static struct cpr3_fuse_parameters ipq807x_fuse_params = {
+-+	.apss_ro_sel_param = ipq807x_apss_ro_sel_param,
+-+	.apss_init_voltage_param = ipq807x_apss_init_voltage_param,
+-+	.apss_target_quot_param = ipq807x_apss_target_quot_param,
+-+	.apss_quot_offset_param = ipq807x_apss_quot_offset_param,
+-+	.cpr_fusing_rev_param = ipq807x_cpr_fusing_rev_param,
+-+	.apss_speed_bin_param = ipq807x_apss_speed_bin_param,
+-+	.cpr_boost_fuse_cfg_param = ipq807x_cpr_boost_fuse_cfg_param,
+-+	.apss_boost_fuse_volt_param = ipq807x_apss_boost_fuse_volt_param,
+-+	.misc_fuse_volt_adj_param = ipq807x_misc_fuse_volt_adj_param
+-+};
+-+
+-+/*
+-+ * The number of possible values for misc fuse is
+-+ * 2^(#bits defined for misc fuse)
+-+ */
+-+#define IPQ807x_MISC_FUSE_VAL_COUNT		BIT(1)
+-+
+-+/*
+-+ * Open loop voltage fuse reference voltages in microvolts for IPQ807x
+-+ */
+-+static int ipq807x_apss_fuse_ref_volt
+-+	[IPQ807x_APSS_FUSE_CORNERS] = {
+-+	720000,
+-+	864000,
+-+	992000,
+-+	1064000,
+-+};
+-+
+-+#define IPQ807x_APSS_FUSE_STEP_VOLT		8000
+-+#define IPQ807x_APSS_VOLTAGE_FUSE_SIZE	6
+-+#define IPQ807x_APSS_QUOT_OFFSET_SCALE	5
+-+
+-+#define IPQ807x_APSS_CPR_SENSOR_COUNT	6
+-+
+-+#define IPQ807x_APSS_CPR_CLOCK_RATE		19200000
+-+
+-+#define IPQ807x_APSS_MAX_TEMP_POINTS	3
+-+#define IPQ807x_APSS_TEMP_SENSOR_ID_START	4
+-+#define IPQ807x_APSS_TEMP_SENSOR_ID_END	13
+-+/*
+-+ * Boost voltage fuse reference and ceiling voltages in microvolts for
+-+ * IPQ807x.
+-+ */
+-+#define IPQ807x_APSS_BOOST_FUSE_REF_VOLT	1140000
+-+#define IPQ807x_APSS_BOOST_CEILING_VOLT	1140000
+-+#define IPQ807x_APSS_BOOST_FLOOR_VOLT	900000
+-+#define MAX_BOOST_CONFIG_FUSE_VALUE		8
+-+
+-+#define IPQ807x_APSS_CPR_SDELTA_CORE_COUNT	15
+-+
+-+#define IPQ807x_APSS_CPR_TCSR_START		8
+-+#define IPQ807x_APSS_CPR_TCSR_END		9
+-+
+-+/*
+-+ * Array of integer values mapped to each of the boost config fuse values to
+-+ * indicate boost enable/disable status.
+-+ */
+-+static bool boost_fuse[MAX_BOOST_CONFIG_FUSE_VALUE] = {0, 1, 1, 1, 1, 1, 1, 1};
+-+
+-+/*
+-+ * IPQ6018 (Few parameters are changed, remaining are same as IPQ807x)
+-+ */
+-+#define IPQ6018_APSS_FUSE_STEP_VOLT		12500
+-+#define IPQ6018_APSS_CPR_CLOCK_RATE		24000000
+-+
+-+static struct cpr3_fuse_param
+-+ipq6018_apss_ro_sel_param[IPQ6018_APSS_FUSE_CORNERS][2] = {
+-+	{{75,  8, 11}, {} },
+-+	{{75,  4,  7}, {} },
+-+	{{75,  0,  3}, {} },
+-+	{{75, 12, 15}, {} },
+-+};
+-+
+-+static struct cpr3_fuse_param
+-+ipq6018_apss_init_voltage_param[IPQ6018_APSS_FUSE_CORNERS][2] = {
+-+	{{73, 18, 23}, {} },
+-+	{{73, 12, 17}, {} },
+-+	{{73,  6, 11}, {} },
+-+	{{73,  0,  5}, {} },
+-+};
+-+
+-+static struct cpr3_fuse_param
+-+ipq6018_apss_target_quot_param[IPQ6018_APSS_FUSE_CORNERS][2] = {
+-+	{{74, 32, 43}, {} },
+-+	{{74, 20, 31}, {} },
+-+	{{74,  8, 19}, {} },
+-+	{{74, 44, 55}, {} },
+-+};
+-+
+-+static struct cpr3_fuse_param
+-+ipq6018_apss_quot_offset_param[IPQ6018_APSS_FUSE_CORNERS][2] = {
+-+	{{} },
+-+	{{73, 48, 55}, {} },
+-+	{{73, 40, 47}, {} },
+-+	{{73, 32, 39}, {} },
+-+};
+-+
+-+static struct cpr3_fuse_param ipq6018_cpr_fusing_rev_param[] = {
+-+	{75, 16, 18},
+-+	{},
+-+};
+-+
+-+static struct cpr3_fuse_param ipq6018_apss_speed_bin_param[] = {
+-+	{36, 40, 42},
+-+	{},
+-+};
+-+
+-+static struct cpr3_fuse_param ipq6018_cpr_boost_fuse_cfg_param[] = {
+-+	{36, 43, 45},
+-+	{},
+-+};
+-+
+-+static struct cpr3_fuse_param ipq6018_apss_boost_fuse_volt_param[] = {
+-+	{73, 0, 5},
+-+	{},
+-+};
+-+
+-+static struct cpr3_fuse_param ipq6018_misc_fuse_volt_adj_param[] = {
+-+	{36, 54, 54},
+-+	{},
+-+};
+-+
+-+static struct cpr3_fuse_parameters ipq6018_fuse_params = {
+-+	.apss_ro_sel_param = ipq6018_apss_ro_sel_param,
+-+	.apss_init_voltage_param = ipq6018_apss_init_voltage_param,
+-+	.apss_target_quot_param = ipq6018_apss_target_quot_param,
+-+	.apss_quot_offset_param = ipq6018_apss_quot_offset_param,
+-+	.cpr_fusing_rev_param = ipq6018_cpr_fusing_rev_param,
+-+	.apss_speed_bin_param = ipq6018_apss_speed_bin_param,
+-+	.cpr_boost_fuse_cfg_param = ipq6018_cpr_boost_fuse_cfg_param,
+-+	.apss_boost_fuse_volt_param = ipq6018_apss_boost_fuse_volt_param,
+-+	.misc_fuse_volt_adj_param = ipq6018_misc_fuse_volt_adj_param
+-+};
+-+
+-+
+-+/*
+-+ * Boost voltage fuse reference and ceiling voltages in microvolts for
+-+ * IPQ6018.
+-+ */
+-+#define IPQ6018_APSS_BOOST_FUSE_REF_VOLT	1140000
+-+#define IPQ6018_APSS_BOOST_CEILING_VOLT	1140000
+-+#define IPQ6018_APSS_BOOST_FLOOR_VOLT	900000
+-+
+-+/*
+-+ * Open loop voltage fuse reference voltages in microvolts for IPQ807x
+-+ */
+-+static int ipq6018_apss_fuse_ref_volt
+-+	[IPQ6018_APSS_FUSE_CORNERS] = {
+-+	725000,
+-+	862500,
+-+	987500,
+-+	1062500,
+-+};
+-+
+-+/*
+-+ * IPQ6018 Memory ACC settings on TCSR
+-+ *
+-+ * Turbo_L1: write TCSR_MEM_ACC_SW_OVERRIDE_LEGACY_APC0 0x10
+-+ *           write TCSR_CUSTOM_VDDAPC0_ACC_1            0x1
+-+ * Other modes: write TCSR_MEM_ACC_SW_OVERRIDE_LEGACY_APC0 0x0
+-+ *              write TCSR_CUSTOM_VDDAPC0_ACC_1            0x0
+-+ *
+-+ */
+-+#define IPQ6018_APSS_MEM_ACC_TCSR_COUNT         2
+-+#define TCSR_MEM_ACC_SW_OVERRIDE_LEGACY_APC0    0x1946178
+-+#define TCSR_CUSTOM_VDDAPC0_ACC_1               0x1946124
+-+
+-+struct mem_acc_tcsr {
+-+	u32 phy_addr;
+-+	void __iomem *ioremap_addr;
+-+	u32 value;
+-+};
+-+
+-+static struct mem_acc_tcsr ipq6018_mem_acc_tcsr[IPQ6018_APSS_MEM_ACC_TCSR_COUNT] = {
+-+	{TCSR_MEM_ACC_SW_OVERRIDE_LEGACY_APC0, NULL, 0x10},
+-+	{TCSR_CUSTOM_VDDAPC0_ACC_1, NULL, 0x1},
+-+};
+-+
+-+/*
+-+ * IPQ9574 (Few parameters are changed, remaining are same as IPQ6018)
+-+ */
+-+#define IPQ9574_APSS_FUSE_STEP_VOLT             10000
+-+
+-+static struct cpr3_fuse_param
+-+ipq9574_apss_ro_sel_param[IPQ9574_APSS_FUSE_CORNERS][2] = {
+-+	{{107, 4, 7}, {} },
+-+	{{107, 0, 3}, {} },
+-+	{{106, 4, 7}, {} },
+-+	{{106, 0, 3}, {} },
+-+};
+-+
+-+static struct cpr3_fuse_param
+-+ipq9574_apss_init_voltage_param[IPQ9574_APSS_FUSE_CORNERS][2] = {
+-+	{{104, 24, 29}, {} },
+-+	{{104, 18, 23}, {} },
+-+	{{104, 12, 17}, {} },
+-+	{{104,  6, 11}, {} },
+-+};
+-+
+-+static struct cpr3_fuse_param
+-+ipq9574_apss_target_quot_param[IPQ9574_APSS_FUSE_CORNERS][2] = {
+-+	{{106, 32, 43}, {} },
+-+	{{106, 20, 31}, {} },
+-+	{{106,  8, 19}, {} },
+-+	{{106, 44, 55}, {} },
+-+};
+-+
+-+static struct cpr3_fuse_param
+-+ipq9574_apss_quot_offset_param[IPQ9574_APSS_FUSE_CORNERS][2] = {
+-+	{{} },
+-+	{{105, 48, 55}, {} },
+-+	{{105, 40, 47}, {} },
+-+	{{105, 32, 39}, {} },
+-+};
+-+
+-+static struct cpr3_fuse_param ipq9574_cpr_fusing_rev_param[] = {
+-+	{107, 8, 10},
+-+	{},
+-+};
+-+
+-+static struct cpr3_fuse_param ipq9574_apss_speed_bin_param[] = {
+-+	{0, 40, 42},
+-+	{},
+-+};
+-+
+-+static struct cpr3_fuse_param ipq9574_cpr_boost_fuse_cfg_param[] = {
+-+	{0, 43, 45},
+-+	{},
+-+};
+-+
+-+static struct cpr3_fuse_param ipq9574_apss_boost_fuse_volt_param[] = {
+-+	{104, 0, 5},
+-+	{},
+-+};
+-+
+-+static struct cpr3_fuse_param ipq9574_misc_fuse_volt_adj_param[] = {
+-+	{0, 54, 54},
+-+	{},
+-+};
+-+
+-+static struct cpr3_fuse_parameters ipq9574_fuse_params = {
+-+	.apss_ro_sel_param = ipq9574_apss_ro_sel_param,
+-+	.apss_init_voltage_param = ipq9574_apss_init_voltage_param,
+-+	.apss_target_quot_param = ipq9574_apss_target_quot_param,
+-+	.apss_quot_offset_param = ipq9574_apss_quot_offset_param,
+-+	.cpr_fusing_rev_param = ipq9574_cpr_fusing_rev_param,
+-+	.apss_speed_bin_param = ipq9574_apss_speed_bin_param,
+-+	.cpr_boost_fuse_cfg_param = ipq9574_cpr_boost_fuse_cfg_param,
+-+	.apss_boost_fuse_volt_param = ipq9574_apss_boost_fuse_volt_param,
+-+	.misc_fuse_volt_adj_param = ipq9574_misc_fuse_volt_adj_param
+-+};
+-+
+-+/*
+-+ * Open loop voltage fuse reference voltages in microvolts for IPQ9574
+-+ */
+-+static int ipq9574_apss_fuse_ref_volt
+-+	[IPQ9574_APSS_FUSE_CORNERS] = {
+-+	725000,
+-+	862500,
+-+	987500,
+-+	1062500,
+-+};
+-+
+-+/**
+-+ * cpr4_ipq807x_apss_read_fuse_data() - load APSS specific fuse parameter values
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * This function allocates a cpr4_ipq807x_apss_fuses struct, fills it with
+-+ * values read out of hardware fuses, and finally copies common fuse values
+-+ * into the CPR3 regulator struct.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr4_ipq807x_apss_read_fuse_data(struct cpr3_regulator *vreg)
+-+{
+-+	void __iomem *base = vreg->thread->ctrl->fuse_base;
+-+	struct cpr4_ipq807x_apss_fuses *fuse;
+-+	int i, rc;
+-+
+-+	fuse = devm_kzalloc(vreg->thread->ctrl->dev, sizeof(*fuse), GFP_KERNEL);
+-+	if (!fuse)
+-+		return -ENOMEM;
+-+
+-+	rc = cpr3_read_fuse_param(base, vreg->cpr4_regulator_data->cpr3_fuse_params->apss_speed_bin_param,
+-+				  &fuse->speed_bin);
+-+	if (rc) {
+-+		cpr3_err(vreg, "Unable to read speed bin fuse, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+	cpr3_info(vreg, "speed bin = %llu\n", fuse->speed_bin);
+-+
+-+	rc = cpr3_read_fuse_param(base, vreg->cpr4_regulator_data->cpr3_fuse_params->cpr_fusing_rev_param,
+-+				  &fuse->cpr_fusing_rev);
+-+	if (rc) {
+-+		cpr3_err(vreg, "Unable to read CPR fusing revision fuse, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+	cpr3_info(vreg, "CPR fusing revision = %llu\n", fuse->cpr_fusing_rev);
+-+
+-+	rc = cpr3_read_fuse_param(base, vreg->cpr4_regulator_data->cpr3_fuse_params->misc_fuse_volt_adj_param,
+-+				  &fuse->misc);
+-+	if (rc) {
+-+		cpr3_err(vreg, "Unable to read misc voltage adjustment fuse, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+	cpr3_info(vreg, "CPR misc fuse value = %llu\n", fuse->misc);
+-+	if (fuse->misc >= IPQ807x_MISC_FUSE_VAL_COUNT) {
+-+		cpr3_err(vreg, "CPR misc fuse value = %llu, should be < %lu\n",
+-+			fuse->misc, IPQ807x_MISC_FUSE_VAL_COUNT);
+-+		return -EINVAL;
+-+	}
+-+
+-+	for (i = 0; i < g_valid_fuse_count; i++) {
+-+		rc = cpr3_read_fuse_param(base,
+-+				vreg->cpr4_regulator_data->cpr3_fuse_params->apss_init_voltage_param[i],
+-+				&fuse->init_voltage[i]);
+-+		if (rc) {
+-+			cpr3_err(vreg, "Unable to read fuse-corner %d initial voltage fuse, rc=%d\n",
+-+				i, rc);
+-+			return rc;
+-+		}
+-+
+-+		rc = cpr3_read_fuse_param(base,
+-+				vreg->cpr4_regulator_data->cpr3_fuse_params->apss_target_quot_param[i],
+-+				&fuse->target_quot[i]);
+-+		if (rc) {
+-+			cpr3_err(vreg, "Unable to read fuse-corner %d target quotient fuse, rc=%d\n",
+-+				i, rc);
+-+			return rc;
+-+		}
+-+
+-+		rc = cpr3_read_fuse_param(base,
+-+				vreg->cpr4_regulator_data->cpr3_fuse_params->apss_ro_sel_param[i],
+-+				&fuse->ro_sel[i]);
+-+		if (rc) {
+-+			cpr3_err(vreg, "Unable to read fuse-corner %d RO select fuse, rc=%d\n",
+-+				i, rc);
+-+			return rc;
+-+		}
+-+
+-+		rc = cpr3_read_fuse_param(base,
+-+				vreg->cpr4_regulator_data->cpr3_fuse_params->apss_quot_offset_param[i],
+-+				&fuse->quot_offset[i]);
+-+		if (rc) {
+-+			cpr3_err(vreg, "Unable to read fuse-corner %d quotient offset fuse, rc=%d\n",
+-+				i, rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	rc = cpr3_read_fuse_param(base, vreg->cpr4_regulator_data->cpr3_fuse_params->cpr_boost_fuse_cfg_param,
+-+				  &fuse->boost_cfg);
+-+	if (rc) {
+-+		cpr3_err(vreg, "Unable to read CPR boost config fuse, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+	cpr3_info(vreg, "Voltage boost fuse config = %llu boost = %s\n",
+-+			fuse->boost_cfg, boost_fuse[fuse->boost_cfg]
+-+			? "enable" : "disable");
+-+
+-+	rc = cpr3_read_fuse_param(base,
+-+				vreg->cpr4_regulator_data->cpr3_fuse_params->apss_boost_fuse_volt_param,
+-+				&fuse->boost_voltage);
+-+	if (rc) {
+-+		cpr3_err(vreg, "failed to read boost fuse voltage, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+
+-+	vreg->fuse_combo = fuse->cpr_fusing_rev + 8 * fuse->speed_bin;
+-+	if (vreg->fuse_combo >= CPR4_IPQ807x_APSS_FUSE_COMBO_COUNT) {
+-+		cpr3_err(vreg, "invalid CPR fuse combo = %d found\n",
+-+			vreg->fuse_combo);
+-+		return -EINVAL;
+-+	}
+-+
+-+	vreg->speed_bin_fuse	= fuse->speed_bin;
+-+	vreg->cpr_rev_fuse	= fuse->cpr_fusing_rev;
+-+	vreg->fuse_corner_count	= g_valid_fuse_count;
+-+	vreg->platform_fuses	= fuse;
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr4_apss_parse_corner_data() - parse APSS corner data from device tree
+-+ *		properties of the CPR3 regulator's device node
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr4_apss_parse_corner_data(struct cpr3_regulator *vreg)
+-+{
+-+	struct device_node *node = vreg->of_node;
+-+	struct cpr4_ipq807x_apss_fuses *fuse = vreg->platform_fuses;
+-+	u32 *temp = NULL;
+-+	int i, rc;
+-+
+-+	rc = cpr3_parse_common_corner_data(vreg);
+-+	if (rc) {
+-+		cpr3_err(vreg, "error reading corner data, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	/* If fuse has incorrect RO Select values and dtsi has "qcom,cpr-ro-sel"
+-+	 * entry with RO select values other than zero, then dtsi values will
+-+	 * be used.
+-+	 */
+-+	if (of_find_property(node, "qcom,cpr-ro-sel", NULL)) {
+-+		temp = kcalloc(vreg->fuse_corner_count, sizeof(*temp),
+-+				GFP_KERNEL);
+-+		if (!temp)
+-+			return -ENOMEM;
+-+
+-+		rc = cpr3_parse_array_property(vreg, "qcom,cpr-ro-sel",
+-+				vreg->fuse_corner_count, temp);
+-+		if (rc)
+-+			goto done;
+-+
+-+		for (i = 0; i < vreg->fuse_corner_count; i++) {
+-+			if (temp[i] != 0)
+-+				fuse->ro_sel[i] = temp[i];
+-+		}
+-+	}
+-+done:
+-+	kfree(temp);
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr4_apss_parse_misc_fuse_voltage_adjustments() - fill an array from a
+-+ *		portion of the voltage adjustments specified based on
+-+ *		miscellaneous fuse bits.
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @volt_adjust:	Voltage adjustment output data array which must be
+-+ *			of size vreg->corner_count
+-+ *
+-+ * cpr3_parse_common_corner_data() must be called for vreg before this function
+-+ * is called so that speed bin size elements are initialized.
+-+ *
+-+ * Two formats are supported for the device tree property:
+-+ * 1. Length == tuple_list_size * vreg->corner_count
+-+ *	(reading begins at index 0)
+-+ * 2. Length == tuple_list_size * vreg->speed_bin_corner_sum
+-+ *	(reading begins at index tuple_list_size * vreg->speed_bin_offset)
+-+ *
+-+ * Here, tuple_list_size is the number of possible values for misc fuse.
+-+ * All other property lengths are treated as errors.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr4_apss_parse_misc_fuse_voltage_adjustments(
+-+	struct cpr3_regulator *vreg, u32 *volt_adjust)
+-+{
+-+	struct device_node *node = vreg->of_node;
+-+	struct cpr4_ipq807x_apss_fuses *fuse = vreg->platform_fuses;
+-+	int tuple_list_size = IPQ807x_MISC_FUSE_VAL_COUNT;
+-+	int i, offset, rc, len = 0;
+-+	const char *prop_name = "qcom,cpr-misc-fuse-voltage-adjustment";
+-+
+-+	if (!of_find_property(node, prop_name, &len)) {
+-+		cpr3_err(vreg, "property %s is missing\n", prop_name);
+-+		return -EINVAL;
+-+	}
+-+
+-+	if (len == tuple_list_size * vreg->corner_count * sizeof(u32)) {
+-+		offset = 0;
+-+	} else if (vreg->speed_bin_corner_sum > 0 &&
+-+			len == tuple_list_size * vreg->speed_bin_corner_sum
+-+			* sizeof(u32)) {
+-+		offset = tuple_list_size * vreg->speed_bin_offset
+-+			+ fuse->misc * vreg->corner_count;
+-+	} else {
+-+		if (vreg->speed_bin_corner_sum > 0)
+-+			cpr3_err(vreg, "property %s has invalid length=%d, should be %zu or %zu\n",
+-+				prop_name, len,
+-+				tuple_list_size * vreg->corner_count
+-+					* sizeof(u32),
+-+				tuple_list_size * vreg->speed_bin_corner_sum
+-+					* sizeof(u32));
+-+		else
+-+			cpr3_err(vreg, "property %s has invalid length=%d, should be %zu\n",
+-+				prop_name, len,
+-+				tuple_list_size * vreg->corner_count
+-+				* sizeof(u32));
+-+		return -EINVAL;
+-+	}
+-+
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		rc = of_property_read_u32_index(node, prop_name, offset + i,
+-+						&volt_adjust[i]);
+-+		if (rc) {
+-+			cpr3_err(vreg, "error reading property %s, rc=%d\n",
+-+				prop_name, rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr4_ipq807x_apss_calculate_open_loop_voltages() - calculate the open-loop
+-+ *		voltage for each corner of a CPR3 regulator
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * If open-loop voltage interpolation is allowed in device tree, then
+-+ * this function calculates the open-loop voltage for a given corner using
+-+ * linear interpolation.  This interpolation is performed using the processor
+-+ * frequencies of the lower and higher Fmax corners along with their fused
+-+ * open-loop voltages.
+-+ *
+-+ * If open-loop voltage interpolation is not allowed, then this function uses
+-+ * the Fmax fused open-loop voltage for all of the corners associated with a
+-+ * given fuse corner.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr4_ipq807x_apss_calculate_open_loop_voltages(
+-+			struct cpr3_regulator *vreg)
+-+{
+-+	struct device_node *node = vreg->of_node;
+-+	struct cpr4_ipq807x_apss_fuses *fuse = vreg->platform_fuses;
+-+	struct cpr3_controller *ctrl = vreg->thread->ctrl;
+-+	int i, j, rc = 0;
+-+	bool allow_interpolation;
+-+	u64 freq_low, volt_low, freq_high, volt_high;
+-+	int *fuse_volt, *misc_adj_volt;
+-+	int *fmax_corner;
+-+
+-+	fuse_volt = kcalloc(vreg->fuse_corner_count, sizeof(*fuse_volt),
+-+				GFP_KERNEL);
+-+	fmax_corner = kcalloc(vreg->fuse_corner_count, sizeof(*fmax_corner),
+-+				GFP_KERNEL);
+-+	if (!fuse_volt || !fmax_corner) {
+-+		rc = -ENOMEM;
+-+		goto done;
+-+	}
+-+
+-+	for (i = 0; i < vreg->fuse_corner_count; i++) {
+-+		if (ctrl->cpr_global_setting == CPR_DISABLED)
+-+			fuse_volt[i] = vreg->cpr4_regulator_data->fuse_ref_volt[i];
+-+		else
+-+			fuse_volt[i] = cpr3_convert_open_loop_voltage_fuse(
+-+				vreg->cpr4_regulator_data->fuse_ref_volt[i],
+-+				vreg->cpr4_regulator_data->fuse_step_volt,
+-+				fuse->init_voltage[i],
+-+				IPQ807x_APSS_VOLTAGE_FUSE_SIZE);
+-+
+-+		/* Log fused open-loop voltage values for debugging purposes. */
+-+		cpr3_info(vreg, "fused %8s: open-loop=%7d uV\n",
+-+			  cpr4_ipq807x_apss_fuse_corner_name[i],
+-+			  fuse_volt[i]);
+-+	}
+-+
+-+	rc = cpr3_determine_part_type(vreg,
+-+			  fuse_volt[vreg->fuse_corner_count - 1]);
+-+	if (rc) {
+-+		cpr3_err(vreg, "fused part type detection failed failed, rc=%d\n",
+-+			rc);
+-+		goto done;
+-+	}
+-+
+-+	rc = cpr3_adjust_fused_open_loop_voltages(vreg, fuse_volt);
+-+	if (rc) {
+-+		cpr3_err(vreg, "fused open-loop voltage adjustment failed, rc=%d\n",
+-+			rc);
+-+		goto done;
+-+	}
+-+
+-+	allow_interpolation = of_property_read_bool(node,
+-+				"qcom,allow-voltage-interpolation");
+-+
+-+	for (i = 1; i < vreg->fuse_corner_count; i++) {
+-+		if (fuse_volt[i] < fuse_volt[i - 1]) {
+-+			cpr3_info(vreg, "fuse corner %d voltage=%d uV < fuse corner %d voltage=%d uV; overriding: fuse corner %d voltage=%d\n",
+-+				i, fuse_volt[i], i - 1, fuse_volt[i - 1],
+-+				i, fuse_volt[i - 1]);
+-+			fuse_volt[i] = fuse_volt[i - 1];
+-+		}
+-+	}
+-+
+-+	if (!allow_interpolation) {
+-+		/* Use fused open-loop voltage for lower frequencies. */
+-+		for (i = 0; i < vreg->corner_count; i++)
+-+			vreg->corner[i].open_loop_volt
+-+				= fuse_volt[vreg->corner[i].cpr_fuse_corner];
+-+		goto done;
+-+	}
+-+
+-+	/* Determine highest corner mapped to each fuse corner */
+-+	j = vreg->fuse_corner_count - 1;
+-+	for (i = vreg->corner_count - 1; i >= 0; i--) {
+-+		if (vreg->corner[i].cpr_fuse_corner == j) {
+-+			fmax_corner[j] = i;
+-+			j--;
+-+		}
+-+	}
+-+	if (j >= 0) {
+-+		cpr3_err(vreg, "invalid fuse corner mapping\n");
+-+		rc = -EINVAL;
+-+		goto done;
+-+	}
+-+
+-+	/*
+-+	 * Interpolation is not possible for corners mapped to the lowest fuse
+-+	 * corner so use the fuse corner value directly.
+-+	 */
+-+	for (i = 0; i <= fmax_corner[0]; i++)
+-+		vreg->corner[i].open_loop_volt = fuse_volt[0];
+-+
+-+	/* Interpolate voltages for the higher fuse corners. */
+-+	for (i = 1; i < vreg->fuse_corner_count; i++) {
+-+		freq_low = vreg->corner[fmax_corner[i - 1]].proc_freq;
+-+		volt_low = fuse_volt[i - 1];
+-+		freq_high = vreg->corner[fmax_corner[i]].proc_freq;
+-+		volt_high = fuse_volt[i];
+-+
+-+		for (j = fmax_corner[i - 1] + 1; j <= fmax_corner[i]; j++)
+-+			vreg->corner[j].open_loop_volt = cpr3_interpolate(
+-+				freq_low, volt_low, freq_high, volt_high,
+-+				vreg->corner[j].proc_freq);
+-+	}
+-+
+-+done:
+-+	if (rc == 0) {
+-+		cpr3_debug(vreg, "unadjusted per-corner open-loop voltages:\n");
+-+		for (i = 0; i < vreg->corner_count; i++)
+-+			cpr3_debug(vreg, "open-loop[%2d] = %d uV\n", i,
+-+				vreg->corner[i].open_loop_volt);
+-+
+-+		rc = cpr3_adjust_open_loop_voltages(vreg);
+-+		if (rc)
+-+			cpr3_err(vreg, "open-loop voltage adjustment failed, rc=%d\n",
+-+				rc);
+-+
+-+		if (of_find_property(node,
+-+			"qcom,cpr-misc-fuse-voltage-adjustment",
+-+			NULL)) {
+-+			misc_adj_volt = kcalloc(vreg->corner_count,
+-+					sizeof(*misc_adj_volt), GFP_KERNEL);
+-+			if (!misc_adj_volt) {
+-+				rc = -ENOMEM;
+-+				goto _exit;
+-+			}
+-+
+-+			rc = cpr4_apss_parse_misc_fuse_voltage_adjustments(vreg,
+-+				misc_adj_volt);
+-+			if (rc) {
+-+				cpr3_err(vreg, "qcom,cpr-misc-fuse-voltage-adjustment reading failed, rc=%d\n",
+-+					rc);
+-+				kfree(misc_adj_volt);
+-+				goto _exit;
+-+			}
+-+
+-+			for (i = 0; i < vreg->corner_count; i++)
+-+				vreg->corner[i].open_loop_volt
+-+						+= misc_adj_volt[i];
+-+			kfree(misc_adj_volt);
+-+		}
+-+	}
+-+
+-+_exit:
+-+	kfree(fuse_volt);
+-+	kfree(fmax_corner);
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr4_ipq807x_apss_set_no_interpolation_quotients() - use the fused target
+-+ *		quotient values for lower frequencies.
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ * @volt_adjust:	Pointer to array of per-corner closed-loop adjustment
+-+ *			voltages
+-+ * @volt_adjust_fuse:	Pointer to array of per-fuse-corner closed-loop
+-+ *			adjustment voltages
+-+ * @ro_scale:		Pointer to array of per-fuse-corner RO scaling factor
+-+ *			values with units of QUOT/V
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr4_ipq807x_apss_set_no_interpolation_quotients(
+-+			struct cpr3_regulator *vreg, int *volt_adjust,
+-+			int *volt_adjust_fuse, int *ro_scale)
+-+{
+-+	struct cpr4_ipq807x_apss_fuses *fuse = vreg->platform_fuses;
+-+	u32 quot, ro;
+-+	int quot_adjust;
+-+	int i, fuse_corner;
+-+
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		fuse_corner = vreg->corner[i].cpr_fuse_corner;
+-+		quot = fuse->target_quot[fuse_corner];
+-+		quot_adjust = cpr3_quot_adjustment(ro_scale[fuse_corner],
+-+					   volt_adjust_fuse[fuse_corner] +
+-+					   volt_adjust[i]);
+-+		ro = fuse->ro_sel[fuse_corner];
+-+		vreg->corner[i].target_quot[ro] = quot + quot_adjust;
+-+		cpr3_debug(vreg, "corner=%d RO=%u target quot=%u\n",
+-+			  i, ro, quot);
+-+
+-+		if (quot_adjust)
+-+			cpr3_debug(vreg, "adjusted corner %d RO%u target quot: %u --> %u (%d uV)\n",
+-+				  i, ro, quot, vreg->corner[i].target_quot[ro],
+-+				  volt_adjust_fuse[fuse_corner] +
+-+				  volt_adjust[i]);
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr4_ipq807x_apss_calculate_target_quotients() - calculate the CPR target
+-+ *		quotient for each corner of a CPR3 regulator
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * If target quotient interpolation is allowed in device tree, then this
+-+ * function calculates the target quotient for a given corner using linear
+-+ * interpolation.  This interpolation is performed using the processor
+-+ * frequencies of the lower and higher Fmax corners along with the fused
+-+ * target quotient and quotient offset of the higher Fmax corner.
+-+ *
+-+ * If target quotient interpolation is not allowed, then this function uses
+-+ * the Fmax fused target quotient for all of the corners associated with a
+-+ * given fuse corner.
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr4_ipq807x_apss_calculate_target_quotients(
+-+			struct cpr3_regulator *vreg)
+-+{
+-+	struct cpr4_ipq807x_apss_fuses *fuse = vreg->platform_fuses;
+-+	int rc;
+-+	bool allow_interpolation;
+-+	u64 freq_low, freq_high, prev_quot;
+-+	u64 *quot_low;
+-+	u64 *quot_high;
+-+	u32 quot, ro;
+-+	int i, j, fuse_corner, quot_adjust;
+-+	int *fmax_corner;
+-+	int *volt_adjust, *volt_adjust_fuse, *ro_scale;
+-+	int *voltage_adj_misc;
+-+
+-+	/* Log fused quotient values for debugging purposes. */
+-+	for (i = CPR4_IPQ807x_APSS_FUSE_CORNER_SVS;
+-+		i < vreg->fuse_corner_count; i++)
+-+		cpr3_info(vreg, "fused %8s: quot[%2llu]=%4llu, quot_offset[%2llu]=%4llu\n",
+-+			cpr4_ipq807x_apss_fuse_corner_name[i],
+-+			fuse->ro_sel[i], fuse->target_quot[i],
+-+			fuse->ro_sel[i], fuse->quot_offset[i] *
+-+			IPQ807x_APSS_QUOT_OFFSET_SCALE);
+-+
+-+	allow_interpolation = of_property_read_bool(vreg->of_node,
+-+					"qcom,allow-quotient-interpolation");
+-+
+-+	volt_adjust = kcalloc(vreg->corner_count, sizeof(*volt_adjust),
+-+					GFP_KERNEL);
+-+	volt_adjust_fuse = kcalloc(vreg->fuse_corner_count,
+-+					sizeof(*volt_adjust_fuse), GFP_KERNEL);
+-+	ro_scale = kcalloc(vreg->fuse_corner_count, sizeof(*ro_scale),
+-+					GFP_KERNEL);
+-+	fmax_corner = kcalloc(vreg->fuse_corner_count, sizeof(*fmax_corner),
+-+					GFP_KERNEL);
+-+	quot_low = kcalloc(vreg->fuse_corner_count, sizeof(*quot_low),
+-+					GFP_KERNEL);
+-+	quot_high = kcalloc(vreg->fuse_corner_count, sizeof(*quot_high),
+-+					GFP_KERNEL);
+-+	if (!volt_adjust || !volt_adjust_fuse || !ro_scale ||
+-+	    !fmax_corner || !quot_low || !quot_high) {
+-+		rc = -ENOMEM;
+-+		goto done;
+-+	}
+-+
+-+	rc = cpr3_parse_closed_loop_voltage_adjustments(vreg, &fuse->ro_sel[0],
+-+				volt_adjust, volt_adjust_fuse, ro_scale);
+-+	if (rc) {
+-+		cpr3_err(vreg, "could not load closed-loop voltage adjustments, rc=%d\n",
+-+			rc);
+-+		goto done;
+-+	}
+-+
+-+	if (of_find_property(vreg->of_node,
+-+		"qcom,cpr-misc-fuse-voltage-adjustment", NULL)) {
+-+		voltage_adj_misc = kcalloc(vreg->corner_count,
+-+				sizeof(*voltage_adj_misc), GFP_KERNEL);
+-+		if (!voltage_adj_misc) {
+-+			rc = -ENOMEM;
+-+			goto done;
+-+		}
+-+
+-+		rc = cpr4_apss_parse_misc_fuse_voltage_adjustments(vreg,
+-+			voltage_adj_misc);
+-+		if (rc) {
+-+			cpr3_err(vreg, "qcom,cpr-misc-fuse-voltage-adjustment reading failed, rc=%d\n",
+-+				rc);
+-+			kfree(voltage_adj_misc);
+-+			goto done;
+-+		}
+-+
+-+		for (i = 0; i < vreg->corner_count; i++)
+-+			volt_adjust[i] += voltage_adj_misc[i];
+-+
+-+		kfree(voltage_adj_misc);
+-+	}
+-+
+-+	if (!allow_interpolation) {
+-+		/* Use fused target quotients for lower frequencies. */
+-+		return cpr4_ipq807x_apss_set_no_interpolation_quotients(
+-+				vreg, volt_adjust, volt_adjust_fuse, ro_scale);
+-+	}
+-+
+-+	/* Determine highest corner mapped to each fuse corner */
+-+	j = vreg->fuse_corner_count - 1;
+-+	for (i = vreg->corner_count - 1; i >= 0; i--) {
+-+		if (vreg->corner[i].cpr_fuse_corner == j) {
+-+			fmax_corner[j] = i;
+-+			j--;
+-+		}
+-+	}
+-+	if (j >= 0) {
+-+		cpr3_err(vreg, "invalid fuse corner mapping\n");
+-+		rc = -EINVAL;
+-+		goto done;
+-+	}
+-+
+-+	/*
+-+	 * Interpolation is not possible for corners mapped to the lowest fuse
+-+	 * corner so use the fuse corner value directly.
+-+	 */
+-+	i = CPR4_IPQ807x_APSS_FUSE_CORNER_SVS;
+-+	quot_adjust = cpr3_quot_adjustment(ro_scale[i], volt_adjust_fuse[i]);
+-+	quot = fuse->target_quot[i] + quot_adjust;
+-+	quot_high[i] = quot_low[i] = quot;
+-+	ro = fuse->ro_sel[i];
+-+	if (quot_adjust)
+-+		cpr3_debug(vreg, "adjusted fuse corner %d RO%u target quot: %llu --> %u (%d uV)\n",
+-+			i, ro, fuse->target_quot[i], quot, volt_adjust_fuse[i]);
+-+
+-+	for (i = 0; i <= fmax_corner[CPR4_IPQ807x_APSS_FUSE_CORNER_SVS];
+-+		i++)
+-+		vreg->corner[i].target_quot[ro] = quot;
+-+
+-+	for (i = CPR4_IPQ807x_APSS_FUSE_CORNER_NOM;
+-+	     i < vreg->fuse_corner_count; i++) {
+-+		quot_high[i] = fuse->target_quot[i];
+-+		if (fuse->ro_sel[i] == fuse->ro_sel[i - 1])
+-+			quot_low[i] = quot_high[i - 1];
+-+		else
+-+			quot_low[i] = quot_high[i]
+-+					- fuse->quot_offset[i]
+-+					  * IPQ807x_APSS_QUOT_OFFSET_SCALE;
+-+		if (quot_high[i] < quot_low[i]) {
+-+			cpr3_debug(vreg, "quot_high[%d]=%llu < quot_low[%d]=%llu; overriding: quot_high[%d]=%llu\n",
+-+				i, quot_high[i], i, quot_low[i],
+-+				i, quot_low[i]);
+-+			quot_high[i] = quot_low[i];
+-+		}
+-+	}
+-+
+-+	/* Perform per-fuse-corner target quotient adjustment */
+-+	for (i = 1; i < vreg->fuse_corner_count; i++) {
+-+		quot_adjust = cpr3_quot_adjustment(ro_scale[i],
+-+						   volt_adjust_fuse[i]);
+-+		if (quot_adjust) {
+-+			prev_quot = quot_high[i];
+-+			quot_high[i] += quot_adjust;
+-+			cpr3_debug(vreg, "adjusted fuse corner %d RO%llu target quot: %llu --> %llu (%d uV)\n",
+-+				i, fuse->ro_sel[i], prev_quot, quot_high[i],
+-+				volt_adjust_fuse[i]);
+-+		}
+-+
+-+		if (fuse->ro_sel[i] == fuse->ro_sel[i - 1])
+-+			quot_low[i] = quot_high[i - 1];
+-+		else
+-+			quot_low[i] += cpr3_quot_adjustment(ro_scale[i],
+-+						    volt_adjust_fuse[i - 1]);
+-+
+-+		if (quot_high[i] < quot_low[i]) {
+-+			cpr3_debug(vreg, "quot_high[%d]=%llu < quot_low[%d]=%llu after adjustment; overriding: quot_high[%d]=%llu\n",
+-+				i, quot_high[i], i, quot_low[i],
+-+				i, quot_low[i]);
+-+			quot_high[i] = quot_low[i];
+-+		}
+-+	}
+-+
+-+	/* Interpolate voltages for the higher fuse corners. */
+-+	for (i = 1; i < vreg->fuse_corner_count; i++) {
+-+		freq_low = vreg->corner[fmax_corner[i - 1]].proc_freq;
+-+		freq_high = vreg->corner[fmax_corner[i]].proc_freq;
+-+
+-+		ro = fuse->ro_sel[i];
+-+		for (j = fmax_corner[i - 1] + 1; j <= fmax_corner[i]; j++)
+-+			vreg->corner[j].target_quot[ro] = cpr3_interpolate(
+-+				freq_low, quot_low[i], freq_high, quot_high[i],
+-+				vreg->corner[j].proc_freq);
+-+	}
+-+
+-+	/* Perform per-corner target quotient adjustment */
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		fuse_corner = vreg->corner[i].cpr_fuse_corner;
+-+		ro = fuse->ro_sel[fuse_corner];
+-+		quot_adjust = cpr3_quot_adjustment(ro_scale[fuse_corner],
+-+						   volt_adjust[i]);
+-+		if (quot_adjust) {
+-+			prev_quot = vreg->corner[i].target_quot[ro];
+-+			vreg->corner[i].target_quot[ro] += quot_adjust;
+-+			cpr3_debug(vreg, "adjusted corner %d RO%u target quot: %llu --> %u (%d uV)\n",
+-+				i, ro, prev_quot,
+-+				vreg->corner[i].target_quot[ro],
+-+				volt_adjust[i]);
+-+		}
+-+	}
+-+
+-+	/* Ensure that target quotients increase monotonically */
+-+	for (i = 1; i < vreg->corner_count; i++) {
+-+		ro = fuse->ro_sel[vreg->corner[i].cpr_fuse_corner];
+-+		if (fuse->ro_sel[vreg->corner[i - 1].cpr_fuse_corner] == ro
+-+		    && vreg->corner[i].target_quot[ro]
+-+				< vreg->corner[i - 1].target_quot[ro]) {
+-+			cpr3_debug(vreg, "adjusted corner %d RO%u target quot=%u < adjusted corner %d RO%u target quot=%u; overriding: corner %d RO%u target quot=%u\n",
+-+				i, ro, vreg->corner[i].target_quot[ro],
+-+				i - 1, ro, vreg->corner[i - 1].target_quot[ro],
+-+				i, ro, vreg->corner[i - 1].target_quot[ro]);
+-+			vreg->corner[i].target_quot[ro]
+-+				= vreg->corner[i - 1].target_quot[ro];
+-+		}
+-+	}
+-+
+-+done:
+-+	kfree(volt_adjust);
+-+	kfree(volt_adjust_fuse);
+-+	kfree(ro_scale);
+-+	kfree(fmax_corner);
+-+	kfree(quot_low);
+-+	kfree(quot_high);
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr4_apss_print_settings() - print out APSS CPR configuration settings into
+-+ *		the kernel log for debugging purposes
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ */
+-+static void cpr4_apss_print_settings(struct cpr3_regulator *vreg)
+-+{
+-+	struct cpr3_corner *corner;
+-+	int i;
+-+
+-+	cpr3_debug(vreg, "Corner: Frequency (Hz), Fuse Corner, Floor (uV), Open-Loop (uV), Ceiling (uV)\n");
+-+	for (i = 0; i < vreg->corner_count; i++) {
+-+		corner = &vreg->corner[i];
+-+		cpr3_debug(vreg, "%3d: %10u, %2d, %7d, %7d, %7d\n",
+-+			i, corner->proc_freq, corner->cpr_fuse_corner,
+-+			corner->floor_volt, corner->open_loop_volt,
+-+			corner->ceiling_volt);
+-+	}
+-+
+-+	if (vreg->thread->ctrl->apm)
+-+		cpr3_debug(vreg, "APM threshold = %d uV, APM adjust = %d uV\n",
+-+			vreg->thread->ctrl->apm_threshold_volt,
+-+			vreg->thread->ctrl->apm_adj_volt);
+-+}
+-+
+-+/**
+-+ * cpr4_apss_init_thread() - perform steps necessary to initialize the
+-+ *		configuration data for a CPR3 thread
+-+ * @thread:		Pointer to the CPR3 thread
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr4_apss_init_thread(struct cpr3_thread *thread)
+-+{
+-+	int rc;
+-+
+-+	rc = cpr3_parse_common_thread_data(thread);
+-+	if (rc) {
+-+		cpr3_err(thread->ctrl, "thread %u unable to read CPR thread data from device tree, rc=%d\n",
+-+			thread->thread_id, rc);
+-+		return rc;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-+ * cpr4_apss_parse_temp_adj_properties() - parse temperature based
+-+ *		adjustment properties from device tree.
+-+ * @ctrl:	Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr4_apss_parse_temp_adj_properties(struct cpr3_controller *ctrl)
+-+{
+-+	struct device_node *of_node = ctrl->dev->of_node;
+-+	int rc, i, len, temp_point_count;
+-+
+-+	if (!of_find_property(of_node, "qcom,cpr-temp-point-map", &len)) {
+-+		/*
+-+		 * Temperature based adjustments are not defined. Single
+-+		 * temperature band is still valid for per-online-core
+-+		 * adjustments.
+-+		 */
+-+		ctrl->temp_band_count = 1;
+-+		return 0;
+-+	}
+-+
+-+	temp_point_count = len / sizeof(u32);
+-+	if (temp_point_count <= 0 ||
+-+	    temp_point_count > IPQ807x_APSS_MAX_TEMP_POINTS) {
+-+		cpr3_err(ctrl, "invalid number of temperature points %d > %d (max)\n",
+-+			 temp_point_count, IPQ807x_APSS_MAX_TEMP_POINTS);
+-+		return -EINVAL;
+-+	}
+-+
+-+	ctrl->temp_points = devm_kcalloc(ctrl->dev, temp_point_count,
+-+					sizeof(*ctrl->temp_points), GFP_KERNEL);
+-+	if (!ctrl->temp_points)
+-+		return -ENOMEM;
+-+
+-+	rc = of_property_read_u32_array(of_node, "qcom,cpr-temp-point-map",
+-+					ctrl->temp_points, temp_point_count);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "error reading property qcom,cpr-temp-point-map, rc=%d\n",
+-+			 rc);
+-+		return rc;
+-+	}
+-+
+-+	for (i = 0; i < temp_point_count; i++)
+-+		cpr3_debug(ctrl, "Temperature Point %d=%d\n", i,
+-+				   ctrl->temp_points[i]);
+-+
+-+	/*
+-+	 * If t1, t2, and t3 are the temperature points, then the temperature
+-+	 * bands are: (-inf, t1], (t1, t2], (t2, t3], and (t3, inf).
+-+	 */
+-+	ctrl->temp_band_count = temp_point_count + 1;
+-+	cpr3_debug(ctrl, "Number of temp bands =%d\n", ctrl->temp_band_count);
+-+
+-+	rc = of_property_read_u32(of_node, "qcom,cpr-initial-temp-band",
+-+				  &ctrl->initial_temp_band);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "error reading qcom,cpr-initial-temp-band, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+
+-+	if (ctrl->initial_temp_band >= ctrl->temp_band_count) {
+-+		cpr3_err(ctrl, "Initial temperature band value %d should be in range [0 - %d]\n",
+-+			ctrl->initial_temp_band, ctrl->temp_band_count - 1);
+-+		return -EINVAL;
+-+	}
+-+
+-+	ctrl->temp_sensor_id_start = IPQ807x_APSS_TEMP_SENSOR_ID_START;
+-+	ctrl->temp_sensor_id_end = IPQ807x_APSS_TEMP_SENSOR_ID_END;
+-+	ctrl->allow_temp_adj = true;
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr4_apss_parse_boost_properties() - parse configuration data for boost
+-+ *		voltage adjustment for CPR3 regulator from device tree.
+-+ * @vreg:	Pointer to the CPR3 regulator
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr4_apss_parse_boost_properties(struct cpr3_regulator *vreg)
+-+{
+-+	struct cpr3_controller *ctrl = vreg->thread->ctrl;
+-+	struct cpr4_ipq807x_apss_fuses *fuse = vreg->platform_fuses;
+-+	struct cpr3_corner *corner;
+-+	int i, boost_voltage, final_boost_volt, rc = 0;
+-+	int *boost_table = NULL, *boost_temp_adj = NULL;
+-+	int boost_voltage_adjust = 0, boost_num_cores = 0;
+-+	u32 boost_allowed = 0;
+-+
+-+	if (!boost_fuse[fuse->boost_cfg])
+-+		/* Voltage boost is disabled in fuse */
+-+		return 0;
+-+
+-+	if (of_find_property(vreg->of_node, "qcom,allow-boost", NULL)) {
+-+		rc = cpr3_parse_array_property(vreg, "qcom,allow-boost", 1,
+-+				&boost_allowed);
+-+		if (rc)
+-+			return rc;
+-+	}
+-+
+-+	if (!boost_allowed) {
+-+		/* Voltage boost is not enabled for this regulator */
+-+		return 0;
+-+	}
+-+
+-+	boost_voltage = cpr3_convert_open_loop_voltage_fuse(
+-+				vreg->cpr4_regulator_data->boost_fuse_ref_volt,
+-+				vreg->cpr4_regulator_data->fuse_step_volt,
+-+				fuse->boost_voltage,
+-+				IPQ807x_APSS_VOLTAGE_FUSE_SIZE);
+-+
+-+	/* Log boost voltage value for debugging purposes. */
+-+	cpr3_info(vreg, "Boost open-loop=%7d uV\n", boost_voltage);
+-+
+-+	if (of_find_property(vreg->of_node,
+-+			"qcom,cpr-boost-voltage-fuse-adjustment", NULL)) {
+-+		rc = cpr3_parse_array_property(vreg,
+-+			"qcom,cpr-boost-voltage-fuse-adjustment",
+-+			1, &boost_voltage_adjust);
+-+		if (rc) {
+-+			cpr3_err(vreg, "qcom,cpr-boost-voltage-fuse-adjustment reading failed, rc=%d\n",
+-+				rc);
+-+			return rc;
+-+		}
+-+
+-+		boost_voltage += boost_voltage_adjust;
+-+		/* Log boost voltage value for debugging purposes. */
+-+		cpr3_info(vreg, "Adjusted boost open-loop=%7d uV\n",
+-+			boost_voltage);
+-+	}
+-+
+-+	/* Limit boost voltage value between ceiling and floor voltage limits */
+-+	boost_voltage = min(boost_voltage, vreg->cpr4_regulator_data->boost_ceiling_volt);
+-+	boost_voltage = max(boost_voltage, vreg->cpr4_regulator_data->boost_floor_volt);
+-+
+-+	/*
+-+	 * The boost feature can only be used for the highest voltage corner.
+-+	 * Also, keep core-count adjustments disabled when the boost feature
+-+	 * is enabled.
+-+	 */
+-+	corner = &vreg->corner[vreg->corner_count - 1];
+-+	if (!corner->sdelta) {
+-+		/*
+-+		 * If core-count/temp adjustments are not defined, the cpr4
+-+		 * sdelta for this corner will not be allocated. Allocate it
+-+		 * here for boost configuration.
+-+		 */
+-+		corner->sdelta = devm_kzalloc(ctrl->dev,
+-+					sizeof(*corner->sdelta), GFP_KERNEL);
+-+		if (!corner->sdelta)
+-+			return -ENOMEM;
+-+	}
+-+	corner->sdelta->temp_band_count = ctrl->temp_band_count;
+-+
+-+	rc = of_property_read_u32(vreg->of_node, "qcom,cpr-num-boost-cores",
+-+				&boost_num_cores);
+-+	if (rc) {
+-+		cpr3_err(vreg, "qcom,cpr-num-boost-cores reading failed, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+
+-+	if (boost_num_cores <= 0 ||
+-+	    boost_num_cores > IPQ807x_APSS_CPR_SDELTA_CORE_COUNT) {
+-+		cpr3_err(vreg, "Invalid boost number of cores = %d\n",
+-+			boost_num_cores);
+-+		return -EINVAL;
+-+	}
+-+	corner->sdelta->boost_num_cores = boost_num_cores;
+-+
+-+	boost_table = devm_kcalloc(ctrl->dev, corner->sdelta->temp_band_count,
+-+					sizeof(*boost_table), GFP_KERNEL);
+-+	if (!boost_table)
+-+		return -ENOMEM;
+-+
+-+	if (of_find_property(vreg->of_node,
+-+				"qcom,cpr-boost-temp-adjustment", NULL)) {
+-+		boost_temp_adj = kcalloc(corner->sdelta->temp_band_count,
+-+					sizeof(*boost_temp_adj), GFP_KERNEL);
+-+		if (!boost_temp_adj)
+-+			return -ENOMEM;
+-+
+-+		rc = cpr3_parse_array_property(vreg,
+-+				"qcom,cpr-boost-temp-adjustment",
+-+				corner->sdelta->temp_band_count,
+-+				boost_temp_adj);
+-+		if (rc) {
+-+			cpr3_err(vreg, "qcom,cpr-boost-temp-adjustment reading failed, rc=%d\n",
+-+				rc);
+-+			goto done;
+-+		}
+-+	}
+-+
+-+	for (i = 0; i < corner->sdelta->temp_band_count; i++) {
+-+		/* Apply static adjustments to boost voltage */
+-+		final_boost_volt = boost_voltage + (boost_temp_adj == NULL
+-+						? 0 : boost_temp_adj[i]);
+-+		/*
+-+		 * Limit final adjusted boost voltage value between ceiling
+-+		 * and floor voltage limits
+-+		 */
+-+		final_boost_volt = min(final_boost_volt,
+-+					vreg->cpr4_regulator_data->boost_ceiling_volt);
+-+		final_boost_volt = max(final_boost_volt,
+-+					vreg->cpr4_regulator_data->boost_floor_volt);
+-+
+-+		boost_table[i] = (corner->open_loop_volt - final_boost_volt)
+-+					/ ctrl->step_volt;
+-+		cpr3_debug(vreg, "Adjusted boost voltage margin for temp band %d = %d steps\n",
+-+			i, boost_table[i]);
+-+	}
+-+
+-+	corner->ceiling_volt = vreg->cpr4_regulator_data->boost_ceiling_volt;
+-+	corner->sdelta->boost_table = boost_table;
+-+	corner->sdelta->allow_boost = true;
+-+	corner->sdelta->allow_core_count_adj = false;
+-+	vreg->allow_boost = true;
+-+	ctrl->allow_boost = true;
+-+done:
+-+	kfree(boost_temp_adj);
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr4_apss_init_regulator() - perform all steps necessary to initialize the
+-+ *		configuration data for a CPR3 regulator
+-+ * @vreg:		Pointer to the CPR3 regulator
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr4_apss_init_regulator(struct cpr3_regulator *vreg)
+-+{
+-+	struct cpr4_ipq807x_apss_fuses *fuse;
+-+	int rc;
+-+
+-+	rc = cpr4_ipq807x_apss_read_fuse_data(vreg);
+-+	if (rc) {
+-+		cpr3_err(vreg, "unable to read CPR fuse data, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	fuse = vreg->platform_fuses;
+-+
+-+	rc = cpr4_apss_parse_corner_data(vreg);
+-+	if (rc) {
+-+		cpr3_err(vreg, "unable to read CPR corner data from device tree, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+
+-+	rc = cpr3_mem_acc_init(vreg);
+-+	if (rc) {
+-+		if (rc != -EPROBE_DEFER)
+-+			cpr3_err(vreg, "unable to initialize mem-acc regulator settings, rc=%d\n",
+-+				 rc);
+-+		return rc;
+-+	}
+-+
+-+	rc = cpr4_ipq807x_apss_calculate_open_loop_voltages(vreg);
+-+	if (rc) {
+-+		cpr3_err(vreg, "unable to calculate open-loop voltages, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+
+-+	rc = cpr3_limit_open_loop_voltages(vreg);
+-+	if (rc) {
+-+		cpr3_err(vreg, "unable to limit open-loop voltages, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+
+-+	cpr3_open_loop_voltage_as_ceiling(vreg);
+-+
+-+	rc = cpr3_limit_floor_voltages(vreg);
+-+	if (rc) {
+-+		cpr3_err(vreg, "unable to limit floor voltages, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	rc = cpr4_ipq807x_apss_calculate_target_quotients(vreg);
+-+	if (rc) {
+-+		cpr3_err(vreg, "unable to calculate target quotients, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+
+-+	rc = cpr4_parse_core_count_temp_voltage_adj(vreg, false);
+-+	if (rc) {
+-+		cpr3_err(vreg, "unable to parse temperature and core count voltage adjustments, rc=%d\n",
+-+			 rc);
+-+		return rc;
+-+	}
+-+
+-+	if (vreg->allow_core_count_adj && (vreg->max_core_count <= 0
+-+				   || vreg->max_core_count >
+-+				   IPQ807x_APSS_CPR_SDELTA_CORE_COUNT)) {
+-+		cpr3_err(vreg, "qcom,max-core-count has invalid value = %d\n",
+-+			 vreg->max_core_count);
+-+		return -EINVAL;
+-+	}
+-+
+-+	rc = cpr4_apss_parse_boost_properties(vreg);
+-+	if (rc) {
+-+		cpr3_err(vreg, "unable to parse boost adjustments, rc=%d\n",
+-+			 rc);
+-+		return rc;
+-+	}
+-+
+-+	cpr4_apss_print_settings(vreg);
+-+
+-+	return rc;
+-+}
+-+
+-+/**
+-+ * cpr4_apss_init_controller() - perform APSS CPR4 controller specific
+-+ *		initializations
+-+ * @ctrl:		Pointer to the CPR3 controller
+-+ *
+-+ * Return: 0 on success, errno on failure
+-+ */
+-+static int cpr4_apss_init_controller(struct cpr3_controller *ctrl)
+-+{
+-+	int rc;
+-+
+-+	rc = cpr3_parse_common_ctrl_data(ctrl);
+-+	if (rc) {
+-+		if (rc != -EPROBE_DEFER)
+-+			cpr3_err(ctrl, "unable to parse common controller data, rc=%d\n",
+-+				rc);
+-+		return rc;
+-+	}
+-+
+-+	rc = of_property_read_u32(ctrl->dev->of_node,
+-+				  "qcom,cpr-down-error-step-limit",
+-+				  &ctrl->down_error_step_limit);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "error reading qcom,cpr-down-error-step-limit, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+
+-+	rc = of_property_read_u32(ctrl->dev->of_node,
+-+				  "qcom,cpr-up-error-step-limit",
+-+				  &ctrl->up_error_step_limit);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "error reading qcom,cpr-up-error-step-limit, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+
+-+	/*
+-+	 * Use fixed step quotient if specified otherwise use dynamic
+-+	 * calculated per RO step quotient
+-+	 */
+-+	of_property_read_u32(ctrl->dev->of_node, "qcom,cpr-step-quot-fixed",
+-+			&ctrl->step_quot_fixed);
+-+	ctrl->use_dynamic_step_quot = ctrl->step_quot_fixed ? false : true;
+-+
+-+	ctrl->saw_use_unit_mV = of_property_read_bool(ctrl->dev->of_node,
+-+					"qcom,cpr-saw-use-unit-mV");
+-+
+-+	of_property_read_u32(ctrl->dev->of_node,
+-+			"qcom,cpr-voltage-settling-time",
+-+			&ctrl->voltage_settling_time);
+-+
+-+	if (of_find_property(ctrl->dev->of_node, "vdd-limit-supply", NULL)) {
+-+		ctrl->vdd_limit_regulator =
+-+			devm_regulator_get(ctrl->dev, "vdd-limit");
+-+		if (IS_ERR(ctrl->vdd_limit_regulator)) {
+-+			rc = PTR_ERR(ctrl->vdd_limit_regulator);
+-+			if (rc != -EPROBE_DEFER)
+-+				cpr3_err(ctrl, "unable to request vdd-limit regulator, rc=%d\n",
+-+					 rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	rc = cpr3_apm_init(ctrl);
+-+	if (rc) {
+-+		if (rc != -EPROBE_DEFER)
+-+			cpr3_err(ctrl, "unable to initialize APM settings, rc=%d\n",
+-+				rc);
+-+		return rc;
+-+	}
+-+
+-+	rc = cpr4_apss_parse_temp_adj_properties(ctrl);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "unable to parse temperature adjustment properties, rc=%d\n",
+-+			 rc);
+-+		return rc;
+-+	}
+-+
+-+	ctrl->sensor_count = IPQ807x_APSS_CPR_SENSOR_COUNT;
+-+
+-+	/*
+-+	 * APSS only has one thread (0) per controller so the zeroed
+-+	 * array does not need further modification.
+-+	 */
+-+	ctrl->sensor_owner = devm_kcalloc(ctrl->dev, ctrl->sensor_count,
+-+		sizeof(*ctrl->sensor_owner), GFP_KERNEL);
+-+	if (!ctrl->sensor_owner)
+-+		return -ENOMEM;
+-+
+-+	ctrl->ctrl_type = CPR_CTRL_TYPE_CPR4;
+-+	ctrl->supports_hw_closed_loop = false;
+-+	ctrl->use_hw_closed_loop = of_property_read_bool(ctrl->dev->of_node,
+-+						"qcom,cpr-hw-closed-loop");
+-+	return 0;
+-+}
+-+
+-+static int cpr4_apss_regulator_suspend(struct platform_device *pdev,
+-+				pm_message_t state)
+-+{
+-+	struct cpr3_controller *ctrl = platform_get_drvdata(pdev);
+-+
+-+	return cpr3_regulator_suspend(ctrl);
+-+}
+-+
+-+static int cpr4_apss_regulator_resume(struct platform_device *pdev)
+-+{
+-+	struct cpr3_controller *ctrl = platform_get_drvdata(pdev);
+-+
+-+	return cpr3_regulator_resume(ctrl);
+-+}
+-+
+-+static void ipq6018_set_mem_acc(struct regulator_dev *rdev)
+-+{
+-+	struct cpr3_regulator *vreg = rdev_get_drvdata(rdev);
+-+
+-+	ipq6018_mem_acc_tcsr[0].ioremap_addr =
+-+		ioremap(ipq6018_mem_acc_tcsr[0].phy_addr, 0x4);
+-+	ipq6018_mem_acc_tcsr[1].ioremap_addr =
+-+		ioremap(ipq6018_mem_acc_tcsr[1].phy_addr, 0x4);
+-+
+-+	if ((ipq6018_mem_acc_tcsr[0].ioremap_addr != NULL) &&
+-+			(ipq6018_mem_acc_tcsr[1].ioremap_addr != NULL) &&
+-+			(vreg->current_corner == (vreg->corner_count - CPR3_CORNER_OFFSET))) {
+-+
+-+		writel_relaxed(ipq6018_mem_acc_tcsr[0].value,
+-+				ipq6018_mem_acc_tcsr[0].ioremap_addr);
+-+		writel_relaxed(ipq6018_mem_acc_tcsr[1].value,
+-+				ipq6018_mem_acc_tcsr[1].ioremap_addr);
+-+	}
+-+}
+-+
+-+static void ipq6018_clr_mem_acc(struct regulator_dev *rdev)
+-+{
+-+	struct cpr3_regulator *vreg = rdev_get_drvdata(rdev);
+-+
+-+	if ((ipq6018_mem_acc_tcsr[0].ioremap_addr != NULL) &&
+-+			(ipq6018_mem_acc_tcsr[1].ioremap_addr != NULL) &&
+-+			(vreg->current_corner != vreg->corner_count - CPR3_CORNER_OFFSET)) {
+-+		writel_relaxed(0x0, ipq6018_mem_acc_tcsr[0].ioremap_addr);
+-+		writel_relaxed(0x0, ipq6018_mem_acc_tcsr[1].ioremap_addr);
+-+	}
+-+
+-+	iounmap(ipq6018_mem_acc_tcsr[0].ioremap_addr);
+-+	iounmap(ipq6018_mem_acc_tcsr[1].ioremap_addr);
+-+}
+-+
+-+static struct cpr4_mem_acc_func ipq6018_mem_acc_funcs = {
+-+	.set_mem_acc = ipq6018_set_mem_acc,
+-+	.clear_mem_acc = ipq6018_clr_mem_acc
+-+};
+-+
+-+static const struct cpr4_reg_data ipq807x_cpr_apss = {
+-+	.cpr_valid_fuse_count = IPQ807x_APSS_FUSE_CORNERS,
+-+	.fuse_ref_volt = ipq807x_apss_fuse_ref_volt,
+-+	.fuse_step_volt = IPQ807x_APSS_FUSE_STEP_VOLT,
+-+	.cpr_clk_rate = IPQ807x_APSS_CPR_CLOCK_RATE,
+-+	.boost_fuse_ref_volt= IPQ807x_APSS_BOOST_FUSE_REF_VOLT,
+-+	.boost_ceiling_volt= IPQ807x_APSS_BOOST_CEILING_VOLT,
+-+	.boost_floor_volt= IPQ807x_APSS_BOOST_FLOOR_VOLT,
+-+	.cpr3_fuse_params = &ipq807x_fuse_params,
+-+	.mem_acc_funcs = NULL,
+-+};
+-+
+-+static const struct cpr4_reg_data ipq817x_cpr_apss = {
+-+	.cpr_valid_fuse_count = IPQ817x_APPS_FUSE_CORNERS,
+-+	.fuse_ref_volt = ipq807x_apss_fuse_ref_volt,
+-+	.fuse_step_volt = IPQ807x_APSS_FUSE_STEP_VOLT,
+-+	.cpr_clk_rate = IPQ807x_APSS_CPR_CLOCK_RATE,
+-+	.boost_fuse_ref_volt= IPQ807x_APSS_BOOST_FUSE_REF_VOLT,
+-+	.boost_ceiling_volt= IPQ807x_APSS_BOOST_CEILING_VOLT,
+-+	.boost_floor_volt= IPQ807x_APSS_BOOST_FLOOR_VOLT,
+-+	.cpr3_fuse_params = &ipq807x_fuse_params,
+-+	.mem_acc_funcs = NULL,
+-+};
+-+
+-+static const struct cpr4_reg_data ipq6018_cpr_apss = {
+-+	.cpr_valid_fuse_count = IPQ6018_APSS_FUSE_CORNERS,
+-+	.fuse_ref_volt = ipq6018_apss_fuse_ref_volt,
+-+	.fuse_step_volt = IPQ6018_APSS_FUSE_STEP_VOLT,
+-+	.cpr_clk_rate = IPQ6018_APSS_CPR_CLOCK_RATE,
+-+	.boost_fuse_ref_volt = IPQ6018_APSS_BOOST_FUSE_REF_VOLT,
+-+	.boost_ceiling_volt = IPQ6018_APSS_BOOST_CEILING_VOLT,
+-+	.boost_floor_volt = IPQ6018_APSS_BOOST_FLOOR_VOLT,
+-+	.cpr3_fuse_params = &ipq6018_fuse_params,
+-+	.mem_acc_funcs = &ipq6018_mem_acc_funcs,
+-+};
+-+
+-+static const struct cpr4_reg_data ipq9574_cpr_apss = {
+-+	.cpr_valid_fuse_count = IPQ9574_APSS_FUSE_CORNERS,
+-+	.fuse_ref_volt = ipq9574_apss_fuse_ref_volt,
+-+	.fuse_step_volt = IPQ9574_APSS_FUSE_STEP_VOLT,
+-+	.cpr_clk_rate = IPQ6018_APSS_CPR_CLOCK_RATE,
+-+	.boost_fuse_ref_volt = IPQ6018_APSS_BOOST_FUSE_REF_VOLT,
+-+	.boost_ceiling_volt = IPQ6018_APSS_BOOST_CEILING_VOLT,
+-+	.boost_floor_volt = IPQ6018_APSS_BOOST_FLOOR_VOLT,
+-+	.cpr3_fuse_params = &ipq9574_fuse_params,
+-+	.mem_acc_funcs = NULL,
+-+};
+-+
+-+static struct of_device_id cpr4_regulator_match_table[] = {
+-+	{
+-+		.compatible = "qcom,cpr4-ipq807x-apss-regulator",
+-+		.data = &ipq807x_cpr_apss
+-+	},
+-+	{
+-+		.compatible = "qcom,cpr4-ipq817x-apss-regulator",
+-+		.data = &ipq817x_cpr_apss
+-+	},
+-+	{
+-+		.compatible = "qcom,cpr4-ipq6018-apss-regulator",
+-+		.data = &ipq6018_cpr_apss
+-+	},
+-+	{
+-+		.compatible = "qcom,cpr4-ipq9574-apss-regulator",
+-+		.data = &ipq9574_cpr_apss
+-+	},
+-+	{}
+-+};
+-+
+-+static int cpr4_apss_regulator_probe(struct platform_device *pdev)
+-+{
+-+	struct device *dev = &pdev->dev;
+-+	struct cpr3_controller *ctrl;
+-+	const struct of_device_id *match;
+-+	struct cpr4_reg_data *cpr_data;
+-+	int i, rc;
+-+
+-+	if (!dev->of_node) {
+-+		dev_err(dev, "Device tree node is missing\n");
+-+		return -EINVAL;
+-+	}
+-+
+-+	ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
+-+	if (!ctrl)
+-+		return -ENOMEM;
+-+
+-+	match = of_match_device(cpr4_regulator_match_table, &pdev->dev);
+-+	if (!match)
+-+		return -ENODEV;
+-+
+-+	cpr_data = (struct cpr4_reg_data *)match->data;
+-+	g_valid_fuse_count = cpr_data->cpr_valid_fuse_count;
+-+	dev_info(dev, "CPR valid fuse count: %d\n", g_valid_fuse_count);
+-+	ctrl->cpr_clock_rate = cpr_data->cpr_clk_rate;
+-+
+-+	ctrl->dev = dev;
+-+	/* Set to false later if anything precludes CPR operation. */
+-+	ctrl->cpr_allowed_hw = true;
+-+
+-+	rc = of_property_read_string(dev->of_node, "qcom,cpr-ctrl-name",
+-+					&ctrl->name);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "unable to read qcom,cpr-ctrl-name, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+
+-+	rc = cpr3_map_fuse_base(ctrl, pdev);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "could not map fuse base address\n");
+-+		return rc;
+-+	}
+-+
+-+	rc = cpr3_read_tcsr_setting(ctrl, pdev, IPQ807x_APSS_CPR_TCSR_START,
+-+				    IPQ807x_APSS_CPR_TCSR_END);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "could not read CPR tcsr setting\n");
+-+		return rc;
+-+	}
+-+
+-+	rc = cpr3_allocate_threads(ctrl, 0, 0);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "failed to allocate CPR thread array, rc=%d\n",
+-+			rc);
+-+		return rc;
+-+	}
+-+
+-+	if (ctrl->thread_count != 1) {
+-+		cpr3_err(ctrl, "expected 1 thread but found %d\n",
+-+			ctrl->thread_count);
+-+		return -EINVAL;
+-+	}
+-+
+-+	rc = cpr4_apss_init_controller(ctrl);
+-+	if (rc) {
+-+		if (rc != -EPROBE_DEFER)
+-+			cpr3_err(ctrl, "failed to initialize CPR controller parameters, rc=%d\n",
+-+				rc);
+-+		return rc;
+-+	}
+-+
+-+	rc = cpr4_apss_init_thread(&ctrl->thread[0]);
+-+	if (rc) {
+-+		cpr3_err(ctrl, "thread initialization failed, rc=%d\n", rc);
+-+		return rc;
+-+	}
+-+
+-+	for (i = 0; i < ctrl->thread[0].vreg_count; i++) {
+-+		ctrl->thread[0].vreg[i].cpr4_regulator_data = cpr_data;
+-+		rc = cpr4_apss_init_regulator(&ctrl->thread[0].vreg[i]);
+-+		if (rc) {
+-+			cpr3_err(&ctrl->thread[0].vreg[i], "regulator initialization failed, rc=%d\n",
+-+				 rc);
+-+			return rc;
+-+		}
+-+	}
+-+
+-+	platform_set_drvdata(pdev, ctrl);
+-+
+-+	return cpr3_regulator_register(pdev, ctrl);
+-+}
+-+
+-+static int cpr4_apss_regulator_remove(struct platform_device *pdev)
+-+{
+-+	struct cpr3_controller *ctrl = platform_get_drvdata(pdev);
+-+
+-+	return cpr3_regulator_unregister(ctrl);
+-+}
+-+
+-+static struct platform_driver cpr4_apss_regulator_driver = {
+-+	.driver		= {
+-+		.name		= "qcom,cpr4-apss-regulator",
+-+		.of_match_table	= cpr4_regulator_match_table,
+-+		.owner		= THIS_MODULE,
+-+	},
+-+	.probe		= cpr4_apss_regulator_probe,
+-+	.remove		= cpr4_apss_regulator_remove,
+-+	.suspend	= cpr4_apss_regulator_suspend,
+-+	.resume		= cpr4_apss_regulator_resume,
+-+};
+-+
+-+static int cpr4_regulator_init(void)
+-+{
+-+	return platform_driver_register(&cpr4_apss_regulator_driver);
+-+}
+-+
+-+static void cpr4_regulator_exit(void)
+-+{
+-+	platform_driver_unregister(&cpr4_apss_regulator_driver);
+-+}
+-+
+-+MODULE_DESCRIPTION("CPR4 APSS regulator driver");
+-+MODULE_LICENSE("GPL v2");
+-+
+-+arch_initcall(cpr4_regulator_init);
+-+module_exit(cpr4_regulator_exit);
+---- /dev/null
+-+++ b/include/soc/qcom/socinfo.h
+-@@ -0,0 +1,463 @@
+-+/* Copyright (c) 2009-2014, 2016, 2020, The Linux Foundation. All rights reserved.
+-+ *
+-+ * This program is free software; you can redistribute it and/or modify
+-+ * it under the terms of the GNU General Public License version 2 and
+-+ * only version 2 as published by the Free Software Foundation.
+-+ *
+-+ * This program is distributed in the hope that it will be useful,
+-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-+ * GNU General Public License for more details.
+-+ *
+-+ */
+-+
+-+#ifndef _ARCH_ARM_MACH_MSM_SOCINFO_H_
+-+#define _ARCH_ARM_MACH_MSM_SOCINFO_H_
+-+
+-+#include <linux/of.h>
+-+
+-+#define CPU_IPQ8074 323
+-+#define CPU_IPQ8072 342
+-+#define CPU_IPQ8076 343
+-+#define CPU_IPQ8078 344
+-+#define CPU_IPQ8070 375
+-+#define CPU_IPQ8071 376
+-+
+-+#define CPU_IPQ8072A 389
+-+#define CPU_IPQ8074A 390
+-+#define CPU_IPQ8076A 391
+-+#define CPU_IPQ8078A 392
+-+#define CPU_IPQ8070A 395
+-+#define CPU_IPQ8071A 396
+-+
+-+#define CPU_IPQ8172  397
+-+#define CPU_IPQ8173  398
+-+#define CPU_IPQ8174  399
+-+
+-+#define CPU_IPQ6018 402
+-+#define CPU_IPQ6028 403
+-+#define CPU_IPQ6000 421
+-+#define CPU_IPQ6010 422
+-+#define CPU_IPQ6005 453
+-+
+-+#define CPU_IPQ5010 446
+-+#define CPU_IPQ5018 447
+-+#define CPU_IPQ5028 448
+-+#define CPU_IPQ5000 503
+-+#define CPU_IPQ0509 504
+-+#define CPU_IPQ0518 505
+-+
+-+#define CPU_IPQ9514 510
+-+#define CPU_IPQ9554 512
+-+#define CPU_IPQ9570 513
+-+#define CPU_IPQ9574 514
+-+#define CPU_IPQ9550 511
+-+#define CPU_IPQ9510 521
+-+
+-+static inline int read_ipq_soc_version_major(void)
+-+{
+-+	const int *prop;
+-+	prop = of_get_property(of_find_node_by_path("/"), "soc_version_major",
+-+				NULL);
+-+
+-+	if (!prop)
+-+		return -EINVAL;
+-+
+-+	return le32_to_cpu(*prop);
+-+}
+-+
+-+static inline int read_ipq_cpu_type(void)
+-+{
+-+	const int *prop;
+-+	prop = of_get_property(of_find_node_by_path("/"), "cpu_type", NULL);
+-+	/*
+-+	 * Return Default CPU type if "cpu_type" property is not found in DTSI
+-+	 */
+-+	if (!prop)
+-+		return CPU_IPQ8074;
+-+
+-+	return le32_to_cpu(*prop);
+-+}
+-+
+-+static inline int cpu_is_ipq8070(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ8070;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq8071(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ8071;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq8072(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ8072;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq8074(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ8074;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq8076(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ8076;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq8078(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ8078;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq8072a(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ8072A;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq8074a(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ8074A;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq8076a(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ8076A;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq8078a(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ8078A;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq8070a(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ8070A;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq8071a(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ8071A;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq8172(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ8172;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq8173(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ8173;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq8174(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ8174;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq6018(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ6018;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq6028(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ6028;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq6000(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ6000;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq6010(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ6010;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq6005(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ6005;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq5010(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ5010;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq5018(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ5018;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq5028(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ5028;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq5000(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ5000;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq0509(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ0509;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq0518(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ0518;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq9514(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ9514;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq9554(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ9554;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq9570(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ9570;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq9574(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ9574;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq9550(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ9550;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq9510(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return read_ipq_cpu_type() == CPU_IPQ9510;
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq807x(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return  cpu_is_ipq8072() || cpu_is_ipq8074() ||
+-+		cpu_is_ipq8076() || cpu_is_ipq8078() ||
+-+		cpu_is_ipq8070() || cpu_is_ipq8071() ||
+-+		cpu_is_ipq8072a() || cpu_is_ipq8074a() ||
+-+		cpu_is_ipq8076a() || cpu_is_ipq8078a() ||
+-+		cpu_is_ipq8070a() || cpu_is_ipq8071a() ||
+-+		cpu_is_ipq8172() || cpu_is_ipq8173() ||
+-+		cpu_is_ipq8174();
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq60xx(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return  cpu_is_ipq6018() || cpu_is_ipq6028() ||
+-+		cpu_is_ipq6000() || cpu_is_ipq6010() ||
+-+		cpu_is_ipq6005();
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq50xx(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return  cpu_is_ipq5010() || cpu_is_ipq5018() ||
+-+		cpu_is_ipq5028() || cpu_is_ipq5000() ||
+-+		cpu_is_ipq0509() || cpu_is_ipq0518();
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_ipq95xx(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return  cpu_is_ipq9514() || cpu_is_ipq9554() ||
+-+		cpu_is_ipq9570() || cpu_is_ipq9574() ||
+-+		cpu_is_ipq9550() || cpu_is_ipq9510();
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_nss_crypto_enabled(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return  cpu_is_ipq807x() || cpu_is_ipq60xx() ||
+-+		cpu_is_ipq50xx() || cpu_is_ipq9570() ||
+-+		cpu_is_ipq9550() || cpu_is_ipq9574() ||
+-+		cpu_is_ipq9554();
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_internal_wifi_enabled(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return  cpu_is_ipq807x() || cpu_is_ipq60xx() ||
+-+		cpu_is_ipq50xx() || cpu_is_ipq9514() ||
+-+		cpu_is_ipq9554() || cpu_is_ipq9574();
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_uniphy1_enabled(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return  cpu_is_ipq807x() || cpu_is_ipq60xx() ||
+-+		cpu_is_ipq9554() || cpu_is_ipq9570() ||
+-+		cpu_is_ipq9574() || cpu_is_ipq9550();
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+static inline int cpu_is_uniphy2_enabled(void)
+-+{
+-+#ifdef CONFIG_ARCH_QCOM
+-+	return  cpu_is_ipq807x() || cpu_is_ipq9570() ||
+-+		cpu_is_ipq9574();
+-+#else
+-+	return 0;
+-+#endif
+-+}
+-+
+-+#endif /* _ARCH_ARM_MACH_MSM_SOCINFO_H_ */
+diff --git a/target/linux/ipq807x/patches-5.15/0902-arm64-dts-ipq8074-add-label-to-clocks.patch b/target/linux/ipq807x/patches-5.15/0902-arm64-dts-ipq8074-add-label-to-clocks.patch
+deleted file mode 100644
+index 9b8b4df12b..0000000000
+--- a/target/linux/ipq807x/patches-5.15/0902-arm64-dts-ipq8074-add-label-to-clocks.patch
++++ /dev/null
+@@ -1,24 +0,0 @@
+-From 6baf7e4abcea6f7ac21eccf072a20078b39d064c Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Wed, 9 Feb 2022 23:13:26 +0100
+-Subject: [PATCH] arm64: dts: ipq8074: add label to clocks
+-
+-Add label to clocks node as that makes it easy to add the NSS fixed
+-clocks that are required in their DTSI.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+---- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+-@@ -15,7 +15,7 @@
+- 	compatible = "qcom,ipq8074";
+- 	interrupt-parent = <&intc>;
+- 
+--	clocks {
+-+	clocks: clocks {
+- 		sleep_clk: sleep_clk {
+- 			compatible = "fixed-clock";
+- 			clock-frequency = <32768>;
+-- 
+2.34.1
+
diff --git a/patches/0040-ipq807x-package-linux-hack.patch b/patches/0040-ipq807x-package-linux-hack.patch
new file mode 100644
index 000000000..1691ef133
--- /dev/null
+++ b/patches/0040-ipq807x-package-linux-hack.patch
@@ -0,0 +1,29 @@
+From aebe1b77a68ee3e438651185916b6e6fe093bed9 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Sun, 16 Jul 2023 17:15:23 +0200
+Subject: [PATCH 40/43] ipq807x: package/linux hack
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ package/Makefile | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/package/Makefile b/package/Makefile
+index 4b8df7f484..128a0814a0 100644
+--- a/package/Makefile
++++ b/package/Makefile
+@@ -11,7 +11,11 @@ include $(INCLUDE_DIR)/feeds.mk
+ include $(INCLUDE_DIR)/rootfs.mk
+ 
+ -include $(TMP_DIR)/.packagedeps
++ifeq ($(CONFIG_TARGET_ipq807x_ipq807x)$(CONFIG_TARGET_ipq807x_ipq60xx)$(CONFIG_TARGET_ipq807x_ipq50xx),y)
++package-y +=feeds/ipq807x/linux
++else
+ package-y += kernel/linux
++endif
+ $(curdir)/autoremove:=1
+ $(curdir)/builddirs:=$(sort $(package-) $(package-y) $(package-m))
+ $(curdir)/builddirs-default:=. $(sort $(package-y) $(package-m))
+-- 
+2.34.1
+
diff --git a/patches/base/0009-base-files-make-sysupgrade-work-on-qcom-AX.patch b/patches/0041-ipq807x-add-ubi-force-detach-patch.patch
similarity index 77%
rename from patches/base/0009-base-files-make-sysupgrade-work-on-qcom-AX.patch
rename to patches/0041-ipq807x-add-ubi-force-detach-patch.patch
index f627784cd..ed9453453 100644
--- a/patches/base/0009-base-files-make-sysupgrade-work-on-qcom-AX.patch
+++ b/patches/0041-ipq807x-add-ubi-force-detach-patch.patch
@@ -1,65 +1,14 @@
-From dfc5ca4495315d293ccdb1c52d7d29a133ba596b Mon Sep 17 00:00:00 2001
+From 3dd22aa711f2f8c8e968d21cbac85beb713760af Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
-Date: Mon, 22 Jun 2020 14:32:45 +0200
-Subject: [PATCH 09/43] base-files: make sysupgrade work on qcom AX
-
-The qsdk v4.4 ubi layer does not detach the rootfs properly during
-sysupgrade. Pull in the ubu force detach patch from owrt-15.05.
+Date: Sun, 16 Jul 2023 17:21:04 +0200
+Subject: [PATCH 41/43] ipq807x: add ubi force detach patch
 
 Signed-off-by: John Crispin <john@phrozen.org>
 ---
- package/base-files/files/lib/upgrade/nand.sh  |  14 +-
  .../patches/131-add_ubi_force_detach.patch    | 185 ++++++++++++++++++
- 2 files changed, 195 insertions(+), 4 deletions(-)
+ 1 file changed, 185 insertions(+)
  create mode 100644 package/utils/mtd-utils/patches/131-add_ubi_force_detach.patch
 
-diff --git a/package/base-files/files/lib/upgrade/nand.sh b/package/base-files/files/lib/upgrade/nand.sh
-index e335d940ed..ab3db4cdf2 100644
---- a/package/base-files/files/lib/upgrade/nand.sh
-+++ b/package/base-files/files/lib/upgrade/nand.sh
-@@ -12,6 +12,9 @@ CI_UBIPART="${CI_UBIPART:-ubi}"
- # 'rootfs' UBI volume on NAND contains the rootfs
- CI_ROOTPART="${CI_ROOTPART:-rootfs}"
- 
-+# ipq807x qsdk kernel misbehaves
-+CI_IPQ807X=0
-+
- ubi_mknod() {
- 	local dir="$1"
- 	local dev="/dev/$(basename $dir)"
-@@ -131,6 +134,8 @@ nand_upgrade_prepare_ubi() {
- 		return 1
- 	fi
- 
-+	[ "$CI_IPQ807X" = 1 ] && ubidetach -f -m $mtdnum
-+
- 	local ubidev="$( nand_find_ubi "$CI_UBIPART" )"
- 	if [ ! "$ubidev" ]; then
- 		ubiattach -m "$mtdnum"
-@@ -213,7 +218,6 @@ nand_upgrade_prepare_ubi() {
- 
- nand_do_upgrade_success() {
- 	local conf_tar="/tmp/sysupgrade.tgz"
--
- 	sync
- 	[ -f "$conf_tar" ] && nand_restore_config "$conf_tar"
- 	echo "sysupgrade successful"
-@@ -292,10 +296,12 @@ nand_upgrade_tar() {
- 	local has_kernel=1
- 	local has_env=0
- 
--	[ "$kernel_length" != 0 -a -n "$kernel_mtd" ] && {
--		tar xf "$tar_file" ${board_dir}/kernel -O | mtd write - $CI_KERNPART
-+	[ "$CI_IPQ807X" = 0 -a "$kernel_length" != 0 -a -n "$kernel_mtd" ] && {
-+		tar xf $tar_file ${board_dir}/kernel -O | mtd write - $CI_KERNPART
-+	}
-+	[ "$CI_IPQ807X" = 0 ] && {
-+		[ "$kernel_length" = 0 -o ! -z "$kernel_mtd" ] && has_kernel=
- 	}
--	[ "$kernel_length" = 0 -o ! -z "$kernel_mtd" ] && has_kernel=
- 
- 	nand_upgrade_prepare_ubi "$rootfs_length" "$rootfs_type" "${has_kernel:+$kernel_length}" "$has_env"
- 
 diff --git a/package/utils/mtd-utils/patches/131-add_ubi_force_detach.patch b/package/utils/mtd-utils/patches/131-add_ubi_force_detach.patch
 new file mode 100644
 index 0000000000..f3cd6a6b28
@@ -252,5 +201,5 @@ index 0000000000..f3cd6a6b28
 + 				sys_errmsg("cannot detach mtd%d", args.mtdn);
 + 				goto out_libubi;
 -- 
-2.25.1
+2.34.1
 
diff --git a/patches/0042-ipq807x-drop-nand.sh-from-base-files.patch b/patches/0042-ipq807x-drop-nand.sh-from-base-files.patch
new file mode 100644
index 000000000..04f3fe8dd
--- /dev/null
+++ b/patches/0042-ipq807x-drop-nand.sh-from-base-files.patch
@@ -0,0 +1,38 @@
+From 2a53eaa80156c56a8ea7881ba6b4295613faf399 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Sun, 16 Jul 2023 17:30:49 +0200
+Subject: [PATCH 42/43] ipq807x: drop nand.sh from base-files
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ package/base-files/Makefile | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/package/base-files/Makefile b/package/base-files/Makefile
+index dc89de2035..dd1d0760f8 100644
+--- a/package/base-files/Makefile
++++ b/package/base-files/Makefile
+@@ -138,6 +138,12 @@ ifeq ($(CONFIG_NAND_SUPPORT),)
+   endef
+ endif
+ 
++ifeq ($(CONFIG_TARGET_ipq807x),y)
++  define Package/base-files/ipq807x-support
++	rm -f $(1)/lib/upgrade/nand.sh
++  endef
++endif
++
+ ifeq ($(CONFIG_EMMC_SUPPORT),)
+   define Package/base-files/emmc-support
+ 	rm -f $(1)/lib/upgrade/emmc.sh
+@@ -155,6 +161,7 @@ define Package/base-files/install
+ 	$(CP) ./files/* $(1)/
+ 	$(Package/base-files/install-key)
+ 	$(Package/base-files/nand-support)
++	$(Package/base-files/ipq807x-support)
+ 	$(Package/base-files/legacy-sdcard-support)
+ 	$(Package/base-files/emmc-support)
+ 	if [ -d $(GENERIC_PLATFORM_DIR)/base-files/. ]; then \
+-- 
+2.34.1
+
diff --git a/patches/0043-ipq95xx-add-kernel-version.patch b/patches/0043-ipq95xx-add-kernel-version.patch
new file mode 100644
index 000000000..079f50c2a
--- /dev/null
+++ b/patches/0043-ipq95xx-add-kernel-version.patch
@@ -0,0 +1,35 @@
+From 3b9fb627fbc38af82d04474a37f980f1e0095584 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Sun, 16 Jul 2023 17:34:10 +0200
+Subject: [PATCH 43/43] ipq95xx: add kernel version
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ include/kernel-5.4 | 2 ++
+ include/target.mk  | 1 +
+ 2 files changed, 3 insertions(+)
+ create mode 100644 include/kernel-5.4
+
+diff --git a/include/kernel-5.4 b/include/kernel-5.4
+new file mode 100644
+index 0000000000..f77eb5d0b8
+--- /dev/null
++++ b/include/kernel-5.4
+@@ -0,0 +1,2 @@
++LINUX_VERSION-5.4 = .164
++LINUX_KERNEL_HASH-5.4.164 = a8fdb27e0e7a871086e0c78b899088c21fbc8e16fb236d220926dc4c93e0fb2d
+diff --git a/include/target.mk b/include/target.mk
+index 36e1377617..d0fd1edd77 100644
+--- a/include/target.mk
++++ b/include/target.mk
+@@ -278,6 +278,7 @@ ifeq ($(DUMP),1)
+     CPU_TYPE ?= generic
+     CPU_CFLAGS_generic = -mcpu=generic
+     CPU_CFLAGS_cortex-a53 = -mcpu=cortex-a53
++    CPU_CFLAGS_cortex-a73 = -mcpu=cortex-a73+crypto
+   endif
+   ifeq ($(ARCH),arc)
+     CPU_TYPE ?= arc700
+-- 
+2.34.1
+
diff --git a/patches/0044-netifd-update-to-latest-HEAD.patch b/patches/0044-netifd-update-to-latest-HEAD.patch
new file mode 100644
index 000000000..16a74cce4
--- /dev/null
+++ b/patches/0044-netifd-update-to-latest-HEAD.patch
@@ -0,0 +1,144 @@
+From 5287669135980433cbcd1064c950aeca19f6f82c Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Fri, 28 Jul 2023 16:50:08 +0200
+Subject: [PATCH] netifd: update to latest HEAD
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ package/network/config/netifd/Makefile        | 13 ++--
+ .../etc/hotplug.d/net/20-smp-packet-steering  | 67 +++++++++++++++++++
+ .../netifd/patches/200-psk-radius.patch       | 12 ++++
+ 3 files changed, 86 insertions(+), 6 deletions(-)
+ create mode 100644 package/network/config/netifd/files/etc/hotplug.d/net/20-smp-packet-steering
+ create mode 100644 package/network/config/netifd/patches/200-psk-radius.patch
+
+diff --git a/package/network/config/netifd/Makefile b/package/network/config/netifd/Makefile
+index 31fd0838a4..f749d72eb9 100644
+--- a/package/network/config/netifd/Makefile
++++ b/package/network/config/netifd/Makefile
+@@ -5,16 +5,14 @@ PKG_RELEASE:=1
+ 
+ PKG_SOURCE_PROTO:=git
+ PKG_SOURCE_URL=$(PROJECT_GIT)/project/netifd.git
+-PKG_SOURCE_DATE:=2023-06-04
+-PKG_SOURCE_VERSION:=ec9dba72124597b7224bbfe75960386dc320f4bd
+-PKG_MIRROR_HASH:=baee39a3882a2b03fc83a3a6a8963c340fa8d884c7a8c9e80e7d2dddc50e24bd
++PKG_SOURCE_DATE:=2023-08-31
++PKG_SOURCE_VERSION:=1a07f1dff32b3af49e39533e33e8964b59535662
++PKG_MIRROR_HASH:=dc621dd04c3c9631002f929cf10a4620f57af8b0baf614c590bda17957fa6201
+ PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
+ 
+ PKG_LICENSE:=GPL-2.0
+ PKG_LICENSE_FILES:=
+ 
+-PKG_BUILD_FLAGS:=lto
+-
+ include $(INCLUDE_DIR)/package.mk
+ include $(INCLUDE_DIR)/cmake.mk
+ 
+@@ -32,7 +30,10 @@ endef
+ 
+ TARGET_CFLAGS += \
+ 	-I$(STAGING_DIR)/usr/include/libnl-tiny \
+-	-I$(STAGING_DIR)/usr/include
++	-I$(STAGING_DIR)/usr/include \
++	-flto
++
++TARGET_LDFLAGS += -flto -fuse-linker-plugin
+ 
+ CMAKE_OPTIONS += \
+ 	-DLIBNL_LIBS=-lnl-tiny \
+diff --git a/package/network/config/netifd/files/etc/hotplug.d/net/20-smp-packet-steering b/package/network/config/netifd/files/etc/hotplug.d/net/20-smp-packet-steering
+new file mode 100644
+index 0000000000..8a86bf75f6
+--- /dev/null
++++ b/package/network/config/netifd/files/etc/hotplug.d/net/20-smp-packet-steering
+@@ -0,0 +1,67 @@
++#!/bin/sh
++[ "$ACTION" = add ] || exit
++
++NPROCS="$(grep -c "^processor.*:" /proc/cpuinfo)"
++[ "$NPROCS" -gt 1 ] || exit
++
++PROC_MASK="$(( (1 << $NPROCS) - 1 ))"
++
++find_irq_cpu() {
++	local dev="$1"
++	local match="$(grep -m 1 "$dev\$" /proc/interrupts)"
++	local cpu=0
++
++	[ -n "$match" ] && {
++		set -- $match
++		shift
++		for cur in $(seq 1 $NPROCS); do
++			[ "$1" -gt 0 ] && {
++				cpu=$(($cur - 1))
++				break
++			}
++			shift
++		done
++	}
++
++	echo "$cpu"
++}
++
++set_hex_val() {
++	local file="$1"
++	local val="$2"
++	val="$(printf %x "$val")"
++	[ -n "$DEBUG" ] && echo "$file = $val"
++	echo "$val" > "$file"
++}
++
++packet_steering="$(uci get "network.@globals[0].packet_steering")"
++[ "$packet_steering" != 1 ] && exit 0
++
++exec 512>/var/lock/smp_tune.lock
++flock 512 || exit 1
++
++for dev in /sys/class/net/*; do
++	[ -d "$dev" ] || continue
++
++	# ignore virtual interfaces
++	[ -n "$(ls "${dev}/" | grep '^lower_')" ] && continue
++	[ -d "${dev}/device" ] || continue
++
++	device="$(readlink "${dev}/device")"
++	device="$(basename "$device")"
++	irq_cpu="$(find_irq_cpu "$device")"
++	irq_cpu_mask="$((1 << $irq_cpu))"
++
++	for q in ${dev}/queues/tx-*; do
++		set_hex_val "$q/xps_cpus" "$PROC_MASK"
++	done
++
++	# ignore dsa slave ports for RPS
++	subsys="$(readlink "${dev}/device/subsystem")"
++	subsys="$(basename "$subsys")"
++	[ "$subsys" = "mdio_bus" ] && continue
++
++	for q in ${dev}/queues/rx-*; do
++		set_hex_val "$q/rps_cpus" "$PROC_MASK"
++	done
++done
+diff --git a/package/network/config/netifd/patches/200-psk-radius.patch b/package/network/config/netifd/patches/200-psk-radius.patch
+new file mode 100644
+index 0000000000..cc1e7021c9
+--- /dev/null
++++ b/package/network/config/netifd/patches/200-psk-radius.patch
+@@ -0,0 +1,12 @@
++--- a/scripts/netifd-wireless.sh
+++++ b/scripts/netifd-wireless.sh
++@@ -260,6 +260,9 @@ wireless_vif_parse_encryption() {
++ 		wpa3*)
++ 			auth_type=eap256
++ 		;;
+++		psk2-radius*)
+++			auth_type=psk2-radius
+++		;;
++ 		psk3-mixed*|sae-mixed*)
++ 			auth_type=psk-sae
++ 		;;
+-- 
+2.34.1
+
diff --git a/patches/0045-ucode-add-TIP-specific-fixes.patch b/patches/0045-ucode-add-TIP-specific-fixes.patch
new file mode 100644
index 000000000..175ed13ea
--- /dev/null
+++ b/patches/0045-ucode-add-TIP-specific-fixes.patch
@@ -0,0 +1,164 @@
+From 2ea2419a492d7473a5cf84818bf4605885e91840 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Fri, 28 Jul 2023 16:51:13 +0200
+Subject: [PATCH 45/45] ucode: add TIP specific fixes
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ package/utils/ucode/Makefile                  |   6 +-
+ .../ucode/patches/000-nl80211_copy.patch      |  11 ++
+ package/utils/ucode/patches/0001-fixes.patch  | 100 ++++++++++++++++++
+ 3 files changed, 116 insertions(+), 1 deletion(-)
+ create mode 100644 package/utils/ucode/patches/000-nl80211_copy.patch
+ create mode 100644 package/utils/ucode/patches/0001-fixes.patch
+
+diff --git a/package/utils/ucode/Makefile b/package/utils/ucode/Makefile
+index e768acbae9..e3a33410c2 100644
+--- a/package/utils/ucode/Makefile
++++ b/package/utils/ucode/Makefile
+@@ -96,7 +96,7 @@ endef
+ define Package/ucode-mod-nl80211
+   $(Package/ucode/default)
+   TITLE+= (nl80211 module)
+-  DEPENDS:=ucode +libnl-tiny +libubox
++  DEPENDS:=ucode +libnl-tiny +libubox +kmod-mac80211
+ endef
+ 
+ define Package/ucode-mod-nl80211/description
+@@ -171,6 +171,10 @@ define Package/ucode-mod-uloop/description
+  loop implementation.
+ endef
+ 
++define Build/Prepare
++	$(Build/Prepare/Default)
++	$(CP) $(STAGING_DIR)/usr/include/mac80211/uapi/linux/nl80211.h $(PKG_BUILD_DIR)/nl80211_copy.h
++endef
+ 
+ define Build/InstallDev
+ 	$(INSTALL_DIR) $(1)/usr/lib $(1)/usr/include/ucode
+diff --git a/package/utils/ucode/patches/000-nl80211_copy.patch b/package/utils/ucode/patches/000-nl80211_copy.patch
+new file mode 100644
+index 0000000000..ff20e3e7e2
+--- /dev/null
++++ b/package/utils/ucode/patches/000-nl80211_copy.patch
+@@ -0,0 +1,11 @@
++--- a/lib/nl80211.c
+++++ b/lib/nl80211.c
++@@ -38,7 +38,7 @@ limitations under the License.
++ #include <netlink/genl/family.h>
++ #include <netlink/genl/ctrl.h>
++ 
++-#include <linux/nl80211.h>
+++#include "../nl80211_copy.h"
++ #include <linux/ieee80211.h>
++ #include <libubox/uloop.h>
++ 
+diff --git a/package/utils/ucode/patches/0001-fixes.patch b/package/utils/ucode/patches/0001-fixes.patch
+new file mode 100644
+index 0000000000..8ef37ecf1c
+--- /dev/null
++++ b/package/utils/ucode/patches/0001-fixes.patch
+@@ -0,0 +1,100 @@
++From 25df1c3e41f274f70e4fbf5fdc10e4290ba019f5 Mon Sep 17 00:00:00 2001
++From: John Crispin <john@phrozen.org>
++Date: Thu, 20 Jan 2022 10:48:35 +0100
++Subject: [PATCH] fixes
++
++---
++ lib/nl80211.c | 92 +++++++++++++++++++++++++++++++++++++++++++++++----
++ lib/rtnl.c    |  1 +
++ 2 files changed, 87 insertions(+), 6 deletions(-)
++
++--- a/lib/nl80211.c
+++++ b/lib/nl80211.c
++@@ -56,6 +56,8 @@ limitations under the License.
++ 
++ #define NL80211_CMDS_BITMAP_SIZE	DIV_ROUND_UP(NL80211_CMD_MAX + 1, 32)
++ 
+++#define NL80211_ATTR_NOT_IMPLEMENTED 0x10000
+++
++ static struct {
++ 	int code;
++ 	char *msg;
++@@ -277,6 +279,14 @@ static const uc_nl_nested_spec_t nl80211
++ 	}
++ };
++ 
+++#ifndef NL80211_MESHCONF_NOLEARN
+++#define NL80211_MESHCONF_NOLEARN NL80211_ATTR_NOT_IMPLEMENTED
+++#endif
+++
+++#ifndef NL80211_MESHCONF_CONNECTED_TO_AS
+++#define NL80211_MESHCONF_CONNECTED_TO_AS NL80211_ATTR_NOT_IMPLEMENTED
+++#endif
+++
++ static const uc_nl_nested_spec_t nl80211_mesh_params_nla = {
++ 	.headsize = 0,
++ 	.nattrs = 29,
++@@ -368,6 +378,14 @@ static const uc_nl_nested_spec_t nl80211
++ 	}
++ };
++ 
+++#ifndef NL80211_PMSR_FTM_REQ_ATTR_LMR_FEEDBACK
+++#define NL80211_PMSR_FTM_REQ_ATTR_LMR_FEEDBACK NL80211_ATTR_NOT_IMPLEMENTED
+++#endif
+++
+++#ifndef NL80211_PMSR_FTM_REQ_ATTR_BSS_COLOR
+++#define NL80211_PMSR_FTM_REQ_ATTR_BSS_COLOR NL80211_ATTR_NOT_IMPLEMENTED
+++#endif
+++
++ static const uc_nl_nested_spec_t nl80211_peer_measurements_peers_req_data_ftm_nla = {
++ 	.headsize = 0,
++ 	.nattrs = 13,
++@@ -517,6 +535,26 @@ static const uc_nl_nested_spec_t nl80211
++ 	}
++ };
++ 
+++#ifndef NL80211_FREQUENCY_ATTR_1MHZ
+++#define NL80211_FREQUENCY_ATTR_1MHZ NL80211_ATTR_NOT_IMPLEMENTED
+++#endif
+++
+++#ifndef NL80211_FREQUENCY_ATTR_2MHZ
+++#define NL80211_FREQUENCY_ATTR_2MHZ NL80211_ATTR_NOT_IMPLEMENTED
+++#endif
+++
+++#ifndef NL80211_FREQUENCY_ATTR_4MHZ
+++#define NL80211_FREQUENCY_ATTR_4MHZ NL80211_ATTR_NOT_IMPLEMENTED
+++#endif
+++
+++#ifndef NL80211_FREQUENCY_ATTR_8MHZ
+++#define NL80211_FREQUENCY_ATTR_8MHZ NL80211_ATTR_NOT_IMPLEMENTED
+++#endif
+++
+++#ifndef NL80211_FREQUENCY_ATTR_16MHZ
+++#define NL80211_FREQUENCY_ATTR_16MHZ NL80211_ATTR_NOT_IMPLEMENTED
+++#endif
+++
++ static const uc_nl_nested_spec_t nl80211_wiphy_bands_freqs_nla = {
++ 	.headsize = 0,
++ 	.nattrs = 25,
++@@ -558,6 +596,10 @@ static const uc_nl_nested_spec_t nl80211
++ 	}
++ };
++ 
+++#ifndef NL80211_BAND_IFTYPE_ATTR_VENDOR_ELEMS
+++#define NL80211_BAND_IFTYPE_ATTR_VENDOR_ELEMS NL80211_ATTR_NOT_IMPLEMENTED
+++#endif
+++
++ static const uc_nl_nested_spec_t nl80211_wiphy_bands_iftype_data_nla = {
++ 	.headsize = 0,
++ 	.nattrs = 7,
++@@ -728,6 +770,10 @@ static const uc_nl_nested_spec_t nl80211
++ 	}
++ };
++ 
+++#ifndef NL80211_STA_INFO_CONNECTED_TO_AS
+++#define NL80211_STA_INFO_CONNECTED_TO_AS NL80211_ATTR_NOT_IMPLEMENTED
+++#endif
+++
++ static const uc_nl_nested_spec_t nl80211_sta_info_nla = {
++ 	.headsize = 0,
++ 	.nattrs = 40,
+-- 
+2.34.1
+
diff --git a/patches/0046-ipq807x-fix-module-dependencies.patch b/patches/0046-ipq807x-fix-module-dependencies.patch
new file mode 100644
index 000000000..f155f1091
--- /dev/null
+++ b/patches/0046-ipq807x-fix-module-dependencies.patch
@@ -0,0 +1,40 @@
+From ff6d59ce79976176caaee181b2a75dc17fb4df41 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Sun, 6 Aug 2023 09:46:57 +0200
+Subject: [PATCH] ipq807x: fix usb dwc3 dependencies
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ package/kernel/linux/modules/usb.mk | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/package/kernel/linux/modules/usb.mk b/package/kernel/linux/modules/usb.mk
+index 2561f36aa3..721cc7893b 100644
+--- a/package/kernel/linux/modules/usb.mk
++++ b/package/kernel/linux/modules/usb.mk
+@@ -494,7 +494,7 @@ $(eval $(call KernelPackage,usb-dwc3))
+ 
+ define KernelPackage/usb-dwc3-qcom
+   TITLE:=DWC3 Qualcomm USB driver
+-  DEPENDS:=@(TARGET_ipq40xx||TARGET_ipq806x||TARGET_ipq807x) +kmod-usb-dwc3
++  DEPENDS:=@(TARGET_ipq40xx||TARGET_ipq806x) +kmod-usb-dwc3
+   KCONFIG:= CONFIG_USB_DWC3_QCOM
+   FILES:= $(LINUX_DIR)/drivers/usb/dwc3/dwc3-qcom.ko
+   AUTOLOAD:=$(call AutoLoad,53,dwc3-qcom,1)
+-- 
+2.34.1
+
+diff --git a/package/kernel/linux/modules/netsupport.mk b/package/kernel/linux/modules/netsupport.mk
+index 27ba55a22d..d6b28c51b7 100644
+--- a/package/kernel/linux/modules/netsupport.mk
++++ b/package/kernel/linux/modules/netsupport.mk
+@@ -93,7 +93,8 @@ define KernelPackage/vxlan
+ 	+IPV6:kmod-udptunnel6
+   KCONFIG:=CONFIG_VXLAN
+   FILES:= \
+-	$(LINUX_DIR)/drivers/net/vxlan/vxlan.ko
++	$(LINUX_DIR)/drivers/net/vxlan/vxlan.ko@ge5.5 \
++	$(LINUX_DIR)/drivers/net/vxlan.ko@le5.4
+   AUTOLOAD:=$(call AutoLoad,13,vxlan)
+ endef
+ 
diff --git a/patches/0047-ucode-update-to-latest-HEAD.patch b/patches/0047-ucode-update-to-latest-HEAD.patch
new file mode 100644
index 000000000..7961670d2
--- /dev/null
+++ b/patches/0047-ucode-update-to-latest-HEAD.patch
@@ -0,0 +1,30 @@
+From 8c587aa5eb6ec68769846cdcc68d44e4c629a981 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Fri, 1 Sep 2023 11:01:47 +0200
+Subject: [PATCH] ucode: update to latest HEAD
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ package/utils/ucode/Makefile | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/package/utils/ucode/Makefile b/package/utils/ucode/Makefile
+index e3a33410c2..c77da85349 100644
+--- a/package/utils/ucode/Makefile
++++ b/package/utils/ucode/Makefile
+@@ -12,9 +12,9 @@ PKG_RELEASE:=1
+ 
+ PKG_SOURCE_PROTO:=git
+ PKG_SOURCE_URL=https://github.com/jow-/ucode.git
+-PKG_SOURCE_DATE:=2023-04-03
+-PKG_SOURCE_VERSION:=5163867269fc04fa01ec5e9f8df3384c933339f2
+-PKG_MIRROR_HASH:=e82922ff59d6f899d9434bf79f2e6e4add0b7b0466355755fc83d4b5a0aeebfb
++PKG_SOURCE_DATE:=2023-06-06
++PKG_SOURCE_VERSION:=c7d84aae09691a99ae3db427c0b2463732ef84f4
++PKG_MIRROR_HASH:=38826ae70d886d1d7ada3fc6591ac807169aa28107f60f7f2e617520083525fb
+ PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
+ PKG_LICENSE:=ISC
+ 
+-- 
+2.34.1
+
diff --git a/patches/0048-hostapd-drop-current-version.patch b/patches/0048-hostapd-drop-current-version.patch
new file mode 100644
index 000000000..d3cf82533
--- /dev/null
+++ b/patches/0048-hostapd-drop-current-version.patch
@@ -0,0 +1,25266 @@
+From 1a41ef8793ededd0aea18c1c610cd88aa43fa5be Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Fri, 1 Sep 2023 11:50:41 +0200
+Subject: [PATCH 48/52] hostapd: drop current version
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ package/network/services/hostapd/Config.in    |  113 -
+ package/network/services/hostapd/Makefile     |  824 --
+ package/network/services/hostapd/README.md    |  419 -
+ .../services/hostapd/files/dhcp-get-server.sh |    2 -
+ .../hostapd/files/hostapd-basic.config        |  404 -
+ .../hostapd/files/hostapd-full.config         |  404 -
+ .../hostapd/files/hostapd-mini.config         |  404 -
+ .../network/services/hostapd/files/hostapd.sh | 1616 ----
+ .../services/hostapd/files/multicall.c        |   28 -
+ .../hostapd/files/wpa_supplicant-basic.config |  625 --
+ .../hostapd/files/wpa_supplicant-full.config  |  625 --
+ .../hostapd/files/wpa_supplicant-mini.config  |  625 --
+ .../hostapd/files/wpa_supplicant-p2p.config   |  625 --
+ .../network/services/hostapd/files/wpad.init  |   43 -
+ .../network/services/hostapd/files/wpad.json  |   22 -
+ .../services/hostapd/files/wpad_acl.json      |   10 -
+ .../services/hostapd/files/wps-hotplug.sh     |   69 -
+ .../001-wolfssl-init-RNG-with-ECC-key.patch   |   43 -
+ ...hannels-to-be-selected-if-dfs-is-ena.patch |  135 -
+ ...erministic-channel-on-channel-switch.patch |   81 -
+ ...ix-sta-add-after-previous-connection.patch |   26 -
+ ...use-of-uninitialized-stack-variables.patch |   25 -
+ ...-dl_list_del-before-freeing-ipv6-add.patch |   19 -
+ ...ewrite-neigh-code-to-not-depend-on-l.patch |  275 -
+ ...ssing-authentication-frames-in-block.patch |   34 -
+ .../hostapd/patches/050-build_fix.patch       |   20 -
+ .../hostapd/patches/100-daemonize_fix.patch   |   97 -
+ ...edtls-TLS-crypto-option-initial-port.patch | 8051 -----------------
+ .../patches/120-mbedtls-fips186_2_prf.patch   |  114 -
+ ...otate-with-TEST_FAIL-for-hwsim-tests.patch |  421 -
+ ...efile-make-run-tests-with-CONFIG_TLS.patch | 1358 ---
+ ...hecks-encountered-during-tests-hwsim.patch |   45 -
+ ...-dpp_pkex-EC-point-mul-w-value-prime.patch |   26 -
+ ...ix-compiling-without-IEEE8021X_EAPOL.patch |   41 -
+ .../hostapd/patches/200-multicall.patch       |  355 -
+ .../services/hostapd/patches/300-noscan.patch |   58 -
+ .../hostapd/patches/301-mesh-noscan.patch     |   71 -
+ .../patches/310-rescan_immediately.patch      |   11 -
+ .../hostapd/patches/320-optional_rfkill.patch |   61 -
+ .../patches/330-nl80211_fix_set_freq.patch    |   11 -
+ .../patches/340-reload_freq_change.patch      |   80 -
+ .../341-mesh-ctrl-iface-channel-switch.patch  |   39 -
+ .../patches/350-nl80211_del_beacon_bss.patch  |   35 -
+ .../patches/360-ctrl_iface_reload.patch       |  106 -
+ .../hostapd/patches/370-ap_sta_support.patch  |  392 -
+ .../patches/380-disable_ctrl_iface_mib.patch  |  239 -
+ .../381-hostapd_cli_UNKNOWN-COMMAND.patch     |   11 -
+ .../patches/390-wpa_ie_cap_workaround.patch   |   56 -
+ .../400-wps_single_auth_enc_type.patch        |   23 -
+ .../patches/410-limit_debug_messages.patch    |  210 -
+ .../patches/420-indicate-features.patch       |   63 -
+ .../patches/430-hostapd_cli_ifdef.patch       |   56 -
+ .../hostapd/patches/431-wpa_cli_ifdef.patch   |   18 -
+ .../hostapd/patches/432-missing-typedef.patch |   10 -
+ .../hostapd/patches/450-scan_wait.patch       |   73 -
+ ...dd-new-config-params-to-be-used-with.patch |  189 -
+ .../patches/463-add-mcast_rate-to-11s.patch   |   68 -
+ .../patches/464-fix-mesh-obss-check.patch     |   13 -
+ ...tapd-config-support-random-BSS-color.patch |   24 -
+ .../patches/470-survey_data_fallback.patch    |   30 -
+ .../patches/500-lto-jobserver-support.patch   |   59 -
+ .../patches/590-rrm-wnm-statistics.patch      |   92 -
+ .../599-wpa_supplicant-fix-warnings.patch     |   19 -
+ .../hostapd/patches/600-ubus_support.patch    |  624 --
+ .../610-hostapd_cli_ujail_permission.patch    |   33 -
+ .../hostapd/patches/700-wifi-reload.patch     |  194 -
+ .../hostapd/patches/710-vlan_no_bridge.patch  |   41 -
+ .../patches/711-wds_bridge_force.patch        |   22 -
+ .../patches/720-iface_max_num_sta.patch       |   82 -
+ .../hostapd/patches/730-ft_iface.patch        |   38 -
+ .../hostapd/patches/740-snoop_iface.patch     |   66 -
+ ...750-qos_map_set_without_interworking.patch |   97 -
+ .../751-qos_map_ignore_when_unsupported.patch |   12 -
+ .../hostapd/patches/760-dynamic_own_ip.patch  |  109 -
+ .../hostapd/patches/761-shared_das_port.patch |  298 -
+ ..._AP-functions-dependant-on-CONFIG_AP.patch |   33 -
+ .../services/hostapd/src/src/ap/ubus.c        | 2101 -----
+ .../services/hostapd/src/src/ap/ubus.h        |  154 -
+ .../hostapd/src/src/utils/build_features.h    |   65 -
+ .../hostapd/src/wpa_supplicant/ubus.c         |  430 -
+ .../hostapd/src/wpa_supplicant/ubus.h         |   66 -
+ 81 files changed, 24606 deletions(-)
+ delete mode 100644 package/network/services/hostapd/Config.in
+ delete mode 100644 package/network/services/hostapd/Makefile
+ delete mode 100644 package/network/services/hostapd/README.md
+ delete mode 100644 package/network/services/hostapd/files/dhcp-get-server.sh
+ delete mode 100644 package/network/services/hostapd/files/hostapd-basic.config
+ delete mode 100644 package/network/services/hostapd/files/hostapd-full.config
+ delete mode 100644 package/network/services/hostapd/files/hostapd-mini.config
+ delete mode 100644 package/network/services/hostapd/files/hostapd.sh
+ delete mode 100644 package/network/services/hostapd/files/multicall.c
+ delete mode 100644 package/network/services/hostapd/files/wpa_supplicant-basic.config
+ delete mode 100644 package/network/services/hostapd/files/wpa_supplicant-full.config
+ delete mode 100644 package/network/services/hostapd/files/wpa_supplicant-mini.config
+ delete mode 100644 package/network/services/hostapd/files/wpa_supplicant-p2p.config
+ delete mode 100644 package/network/services/hostapd/files/wpad.init
+ delete mode 100644 package/network/services/hostapd/files/wpad.json
+ delete mode 100644 package/network/services/hostapd/files/wpad_acl.json
+ delete mode 100644 package/network/services/hostapd/files/wps-hotplug.sh
+ delete mode 100644 package/network/services/hostapd/patches/001-wolfssl-init-RNG-with-ECC-key.patch
+ delete mode 100644 package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch
+ delete mode 100644 package/network/services/hostapd/patches/011-mesh-use-deterministic-channel-on-channel-switch.patch
+ delete mode 100644 package/network/services/hostapd/patches/021-fix-sta-add-after-previous-connection.patch
+ delete mode 100644 package/network/services/hostapd/patches/022-hostapd-fix-use-of-uninitialized-stack-variables.patch
+ delete mode 100644 package/network/services/hostapd/patches/023-ndisc_snoop-call-dl_list_del-before-freeing-ipv6-add.patch
+ delete mode 100644 package/network/services/hostapd/patches/030-driver_nl80211-rewrite-neigh-code-to-not-depend-on-l.patch
+ delete mode 100644 package/network/services/hostapd/patches/040-mesh-allow-processing-authentication-frames-in-block.patch
+ delete mode 100644 package/network/services/hostapd/patches/050-build_fix.patch
+ delete mode 100644 package/network/services/hostapd/patches/100-daemonize_fix.patch
+ delete mode 100644 package/network/services/hostapd/patches/110-mbedtls-TLS-crypto-option-initial-port.patch
+ delete mode 100644 package/network/services/hostapd/patches/120-mbedtls-fips186_2_prf.patch
+ delete mode 100644 package/network/services/hostapd/patches/130-mbedtls-annotate-with-TEST_FAIL-for-hwsim-tests.patch
+ delete mode 100644 package/network/services/hostapd/patches/140-tests-Makefile-make-run-tests-with-CONFIG_TLS.patch
+ delete mode 100644 package/network/services/hostapd/patches/150-add-NULL-checks-encountered-during-tests-hwsim.patch
+ delete mode 100644 package/network/services/hostapd/patches/160-dpp_pkex-EC-point-mul-w-value-prime.patch
+ delete mode 100644 package/network/services/hostapd/patches/170-wpa_supplicant-fix-compiling-without-IEEE8021X_EAPOL.patch
+ delete mode 100644 package/network/services/hostapd/patches/200-multicall.patch
+ delete mode 100644 package/network/services/hostapd/patches/300-noscan.patch
+ delete mode 100644 package/network/services/hostapd/patches/301-mesh-noscan.patch
+ delete mode 100644 package/network/services/hostapd/patches/310-rescan_immediately.patch
+ delete mode 100644 package/network/services/hostapd/patches/320-optional_rfkill.patch
+ delete mode 100644 package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch
+ delete mode 100644 package/network/services/hostapd/patches/340-reload_freq_change.patch
+ delete mode 100644 package/network/services/hostapd/patches/341-mesh-ctrl-iface-channel-switch.patch
+ delete mode 100644 package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch
+ delete mode 100644 package/network/services/hostapd/patches/360-ctrl_iface_reload.patch
+ delete mode 100644 package/network/services/hostapd/patches/370-ap_sta_support.patch
+ delete mode 100644 package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch
+ delete mode 100644 package/network/services/hostapd/patches/381-hostapd_cli_UNKNOWN-COMMAND.patch
+ delete mode 100644 package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch
+ delete mode 100644 package/network/services/hostapd/patches/400-wps_single_auth_enc_type.patch
+ delete mode 100644 package/network/services/hostapd/patches/410-limit_debug_messages.patch
+ delete mode 100644 package/network/services/hostapd/patches/420-indicate-features.patch
+ delete mode 100644 package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch
+ delete mode 100644 package/network/services/hostapd/patches/431-wpa_cli_ifdef.patch
+ delete mode 100644 package/network/services/hostapd/patches/432-missing-typedef.patch
+ delete mode 100644 package/network/services/hostapd/patches/450-scan_wait.patch
+ delete mode 100644 package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch
+ delete mode 100644 package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch
+ delete mode 100644 package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch
+ delete mode 100644 package/network/services/hostapd/patches/465-hostapd-config-support-random-BSS-color.patch
+ delete mode 100644 package/network/services/hostapd/patches/470-survey_data_fallback.patch
+ delete mode 100644 package/network/services/hostapd/patches/500-lto-jobserver-support.patch
+ delete mode 100644 package/network/services/hostapd/patches/590-rrm-wnm-statistics.patch
+ delete mode 100644 package/network/services/hostapd/patches/599-wpa_supplicant-fix-warnings.patch
+ delete mode 100644 package/network/services/hostapd/patches/600-ubus_support.patch
+ delete mode 100644 package/network/services/hostapd/patches/610-hostapd_cli_ujail_permission.patch
+ delete mode 100644 package/network/services/hostapd/patches/700-wifi-reload.patch
+ delete mode 100644 package/network/services/hostapd/patches/710-vlan_no_bridge.patch
+ delete mode 100644 package/network/services/hostapd/patches/711-wds_bridge_force.patch
+ delete mode 100644 package/network/services/hostapd/patches/720-iface_max_num_sta.patch
+ delete mode 100644 package/network/services/hostapd/patches/730-ft_iface.patch
+ delete mode 100644 package/network/services/hostapd/patches/740-snoop_iface.patch
+ delete mode 100644 package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch
+ delete mode 100644 package/network/services/hostapd/patches/751-qos_map_ignore_when_unsupported.patch
+ delete mode 100644 package/network/services/hostapd/patches/760-dynamic_own_ip.patch
+ delete mode 100644 package/network/services/hostapd/patches/761-shared_das_port.patch
+ delete mode 100644 package/network/services/hostapd/patches/990-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch
+ delete mode 100644 package/network/services/hostapd/src/src/ap/ubus.c
+ delete mode 100644 package/network/services/hostapd/src/src/ap/ubus.h
+ delete mode 100644 package/network/services/hostapd/src/src/utils/build_features.h
+ delete mode 100644 package/network/services/hostapd/src/wpa_supplicant/ubus.c
+ delete mode 100644 package/network/services/hostapd/src/wpa_supplicant/ubus.h
+
+diff --git a/package/network/services/hostapd/Config.in b/package/network/services/hostapd/Config.in
+deleted file mode 100644
+index 8f28eb2bd4..0000000000
+--- a/package/network/services/hostapd/Config.in
++++ /dev/null
+@@ -1,113 +0,0 @@
+-# wpa_supplicant config
+-config WPA_RFKILL_SUPPORT
+-	bool "Add rfkill support"
+-	depends on PACKAGE_wpa-supplicant || \
+-		   PACKAGE_wpa-supplicant-openssl || \
+-		   PACKAGE_wpa-supplicant-wolfssl || \
+-		   PACKAGE_wpa-supplicant-mbedtls || \
+-		   PACKAGE_wpa-supplicant-mesh-openssl || \
+-		   PACKAGE_wpa-supplicant-mesh-wolfssl || \
+-		   PACKAGE_wpa-supplicant-mesh-mbedtls || \
+-		   PACKAGE_wpa-supplicant-basic || \
+-		   PACKAGE_wpa-supplicant-mini || \
+-		   PACKAGE_wpa-supplicant-p2p || \
+-		   PACKAGE_wpad || \
+-		   PACKAGE_wpad-openssl || \
+-		   PACKAGE_wpad-wolfssl || \
+-		   PACKAGE_wpad-mbedtls || \
+-		   PACKAGE_wpad-basic || \
+-		   PACKAGE_wpad-basic-openssl || \
+-		   PACKAGE_wpad-basic-wolfssl || \
+-		   PACKAGE_wpad-basic-mbedtls || \
+-		   PACKAGE_wpad-mini || \
+-		   PACKAGE_wpad-mesh-openssl || \
+-		   PACKAGE_wpad-mesh-wolfssl || \
+-		   PACKAGE_wpad-mesh-mbedtls
+-	default n
+-
+-config WPA_MSG_MIN_PRIORITY
+-	int "Minimum debug message priority"
+-	depends on PACKAGE_wpa-supplicant || \
+-		   PACKAGE_wpa-supplicant-openssl || \
+-		   PACKAGE_wpa-supplicant-wolfssl || \
+-		   PACKAGE_wpa-supplicant-mbedtls || \
+-		   PACKAGE_wpa-supplicant-mesh-openssl || \
+-		   PACKAGE_wpa-supplicant-mesh-wolfssl || \
+-		   PACKAGE_wpa-supplicant-mesh-mbedtls || \
+-		   PACKAGE_wpa-supplicant-basic || \
+-		   PACKAGE_wpa-supplicant-mini || \
+-		   PACKAGE_wpa-supplicant-p2p || \
+-		   PACKAGE_wpad || \
+-		   PACKAGE_wpad-openssl || \
+-		   PACKAGE_wpad-wolfssl || \
+-		   PACKAGE_wpad-mbedtls || \
+-		   PACKAGE_wpad-basic || \
+-		   PACKAGE_wpad-basic-openssl || \
+-		   PACKAGE_wpad-basic-wolfssl || \
+-		   PACKAGE_wpad-basic-mbedtls || \
+-		   PACKAGE_wpad-mini || \
+-		   PACKAGE_wpad-mesh-openssl || \
+-		   PACKAGE_wpad-mesh-wolfssl || \
+-		   PACKAGE_wpad-mesh-mbedtls
+-	default 3
+-	help
+-	  Useful values are:
+-	    0 = all messages
+-		1 = raw message dumps
+-		2 = most debugging messages
+-		3 = info messages
+-		4 = warnings
+-		5 = errors
+-
+-config WPA_WOLFSSL
+-	bool
+-	default PACKAGE_wpa-supplicant-wolfssl ||\
+-	        PACKAGE_wpad-wolfssl ||\
+-	        PACKAGE_wpad-basic-wolfssl || \
+-	        PACKAGE_wpad-mesh-wolfssl ||\
+-	        PACKAGE_eapol-test-wolfssl
+-	select WOLFSSL_HAS_AES_CCM
+-	select WOLFSSL_HAS_ARC4
+-	select WOLFSSL_HAS_DH
+-	select WOLFSSL_HAS_OCSP
+-	select WOLFSSL_HAS_SESSION_TICKET
+-	select WOLFSSL_HAS_WPAS
+-
+-config DRIVER_WEXT_SUPPORT
+-	bool
+-	select KERNEL_WIRELESS_EXT
+-	default n
+-
+-config DRIVER_11AC_SUPPORT
+-	bool
+-	default n
+-
+-config DRIVER_11AX_SUPPORT
+-	bool
+-	default n
+-	select WPA_MBO_SUPPORT
+-
+-config WPA_ENABLE_WEP
+-	bool "Enable support for unsecure and obsolete WEP"
+-	help
+-	  Wired equivalent privacy (WEP) is an obsolete cryptographic data
+-	  confidentiality algorithm that is not considered secure. It should not be used
+-	  for anything anymore. The functionality needed to use WEP is available in the
+-	  current hostapd release under this optional build parameter and completely
+-	  removed in a future release.
+-
+-config WPA_MBO_SUPPORT
+-	bool "Multi Band Operation (Agile Multiband)"
+-	default PACKAGE_wpa-supplicant || \
+-		PACKAGE_wpa-supplicant-openssl || \
+-		PACKAGE_wpa-supplicant-wolfssl || \
+-		PACKAGE_wpa-supplicant-mbedtls || \
+-		PACKAGE_wpad || \
+-		PACKAGE_wpad-openssl || \
+-		PACKAGE_wpad-wolfssl || \
+-		PACKAGE_wpad-mbedtls
+-	help
+-	  Multi Band Operation aka (Agile Multiband) enables features
+-	  that facilitate efficient use of multiple frequency bands.
+-	  Enabling MBO on an AP using RSN requires 802.11w to be enabled.
+-	  Hostapd will refuse to start if MBO and RSN are enabled without 11w.
+diff --git a/package/network/services/hostapd/Makefile b/package/network/services/hostapd/Makefile
+deleted file mode 100644
+index b8921e8452..0000000000
+--- a/package/network/services/hostapd/Makefile
++++ /dev/null
+@@ -1,824 +0,0 @@
+-# SPDX-License-Identifier: GPL-2.0-only
+-#
+-# Copyright (C) 2006-2021 OpenWrt.org
+-
+-include $(TOPDIR)/rules.mk
+-
+-PKG_NAME:=hostapd
+-PKG_RELEASE:=1.2
+-
+-PKG_SOURCE_URL:=http://w1.fi/hostap.git
+-PKG_SOURCE_PROTO:=git
+-PKG_SOURCE_DATE:=2023-03-29
+-PKG_SOURCE_VERSION:=bb945b98fefc64887dffb40773a19d77585cee42
+-PKG_MIRROR_HASH:=1da8a39c7c81ce257994874402a86d00080a6145b5eb5c5fc44b2fae1853fe8d
+-
+-PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
+-PKG_LICENSE:=BSD-3-Clause
+-PKG_CPE_ID:=cpe:/a:w1.fi:hostapd
+-
+-PKG_BUILD_PARALLEL:=1
+-PKG_ASLR_PIE_REGULAR:=1
+-
+-PKG_CONFIG_DEPENDS:= \
+-	CONFIG_PACKAGE_kmod-ath9k \
+-	CONFIG_PACKAGE_kmod-cfg80211 \
+-	CONFIG_PACKAGE_hostapd \
+-	CONFIG_PACKAGE_hostapd-basic \
+-	CONFIG_PACKAGE_hostapd-mini \
+-	CONFIG_WPA_RFKILL_SUPPORT \
+-	CONFIG_DRIVER_WEXT_SUPPORT \
+-	CONFIG_DRIVER_11AC_SUPPORT \
+-	CONFIG_DRIVER_11AX_SUPPORT \
+-	CONFIG_WPA_ENABLE_WEP
+-
+-PKG_BUILD_FLAGS:=gc-sections lto
+-
+-EAPOL_TEST_PROVIDERS:=eapol-test eapol-test-openssl eapol-test-wolfssl
+-
+-SUPPLICANT_PROVIDERS:=
+-HOSTAPD_PROVIDERS:=
+-
+-LOCAL_TYPE=$(strip \
+-		$(if $(findstring wpad,$(BUILD_VARIANT)),wpad, \
+-		$(if $(findstring supplicant,$(BUILD_VARIANT)),supplicant, \
+-		hostapd \
+-		)))
+-
+-LOCAL_AND_LIB_VARIANT=$(patsubst hostapd-%,%,\
+-		      $(patsubst wpad-%,%,\
+-		      $(patsubst supplicant-%,%,\
+-		      $(BUILD_VARIANT)\
+-		      )))
+-
+-LOCAL_VARIANT=$(patsubst %-internal,%,\
+-	      $(patsubst %-openssl,%,\
+-	      $(patsubst %-wolfssl,%,\
+-	      $(patsubst %-mbedtls,%,\
+-	      $(LOCAL_AND_LIB_VARIANT)\
+-	      ))))
+-
+-SSL_VARIANT=$(strip \
+-		$(if $(findstring openssl,$(LOCAL_AND_LIB_VARIANT)),openssl,\
+-		$(if $(findstring wolfssl,$(LOCAL_AND_LIB_VARIANT)),wolfssl,\
+-		$(if $(findstring mbedtls,$(LOCAL_AND_LIB_VARIANT)),mbedtls,\
+-		internal\
+-		))))
+-
+-CONFIG_VARIANT:=$(LOCAL_VARIANT)
+-ifeq ($(LOCAL_VARIANT),mesh)
+-  CONFIG_VARIANT:=full
+-endif
+-
+-include $(INCLUDE_DIR)/package.mk
+-
+-STAMP_CONFIGURED:=$(STAMP_CONFIGURED)_$(CONFIG_WPA_MSG_MIN_PRIORITY)
+-
+-ifneq ($(CONFIG_DRIVER_11AC_SUPPORT),)
+-  HOSTAPD_IEEE80211AC:=y
+-endif
+-
+-ifneq ($(CONFIG_DRIVER_11AX_SUPPORT),)
+-  HOSTAPD_IEEE80211AX:=y
+-endif
+-
+-DRIVER_MAKEOPTS= \
+-	CONFIG_ACS=$(CONFIG_PACKAGE_kmod-cfg80211) \
+-	CONFIG_DRIVER_NL80211=$(CONFIG_PACKAGE_kmod-cfg80211) \
+-	CONFIG_IEEE80211AC=$(HOSTAPD_IEEE80211AC) \
+-	CONFIG_IEEE80211AX=$(HOSTAPD_IEEE80211AX) \
+-	CONFIG_DRIVER_WEXT=$(CONFIG_DRIVER_WEXT_SUPPORT) \
+-	CONFIG_MBO=$(CONFIG_WPA_MBO_SUPPORT)
+-
+-ifeq ($(SSL_VARIANT),openssl)
+-  DRIVER_MAKEOPTS += CONFIG_TLS=openssl CONFIG_SAE=y
+-  TARGET_LDFLAGS += -lcrypto -lssl
+-
+-  ifeq ($(LOCAL_VARIANT),basic)
+-    DRIVER_MAKEOPTS += CONFIG_OWE=y
+-  endif
+-  ifeq ($(LOCAL_VARIANT),mesh)
+-    DRIVER_MAKEOPTS += CONFIG_AP=y CONFIG_MESH=y
+-  endif
+-  ifeq ($(LOCAL_VARIANT),full)
+-    DRIVER_MAKEOPTS += CONFIG_OWE=y CONFIG_SUITEB192=y CONFIG_AP=y CONFIG_MESH=y
+-  endif
+-endif
+-
+-ifeq ($(SSL_VARIANT),wolfssl)
+-  DRIVER_MAKEOPTS += CONFIG_TLS=wolfssl CONFIG_SAE=y
+-  TARGET_LDFLAGS += -lwolfssl
+-
+-  ifeq ($(LOCAL_VARIANT),basic)
+-    DRIVER_MAKEOPTS += CONFIG_OWE=y
+-  endif
+-  ifeq ($(LOCAL_VARIANT),mesh)
+-    DRIVER_MAKEOPTS += CONFIG_AP=y CONFIG_MESH=y CONFIG_WPS_NFC=1
+-  endif
+-  ifeq ($(LOCAL_VARIANT),full)
+-    DRIVER_MAKEOPTS += CONFIG_OWE=y CONFIG_SUITEB192=y CONFIG_AP=y CONFIG_MESH=y CONFIG_WPS_NFC=1
+-  endif
+-endif
+-
+-ifeq ($(SSL_VARIANT),mbedtls)
+-  DRIVER_MAKEOPTS += CONFIG_TLS=mbedtls CONFIG_SAE=y
+-  TARGET_LDFLAGS += -lmbedcrypto -lmbedx509 -lmbedtls
+-
+-  ifeq ($(LOCAL_VARIANT),basic)
+-    DRIVER_MAKEOPTS += CONFIG_OWE=y
+-  endif
+-  ifeq ($(LOCAL_VARIANT),mesh)
+-    DRIVER_MAKEOPTS += CONFIG_AP=y CONFIG_MESH=y CONFIG_WPS_NFC=1
+-  endif
+-  ifeq ($(LOCAL_VARIANT),full)
+-    DRIVER_MAKEOPTS += CONFIG_OWE=y CONFIG_SUITEB192=y CONFIG_AP=y CONFIG_MESH=y CONFIG_WPS_NFC=1
+-  endif
+-endif
+-
+-ifneq ($(LOCAL_TYPE),hostapd)
+-  ifdef CONFIG_WPA_RFKILL_SUPPORT
+-    DRIVER_MAKEOPTS += NEED_RFKILL=y
+-  endif
+-endif
+-
+-DRV_DEPENDS:=+PACKAGE_kmod-cfg80211:libnl-tiny
+-
+-
+-define Package/hostapd/Default
+-  SECTION:=net
+-  CATEGORY:=Network
+-  SUBMENU:=WirelessAPD
+-  TITLE:=IEEE 802.1x Authenticator
+-  URL:=http://hostap.epitest.fi/
+-  DEPENDS:=$(DRV_DEPENDS) +hostapd-common +libubus
+-  EXTRA_DEPENDS:=hostapd-common (=$(PKG_VERSION)-$(PKG_RELEASE))
+-  USERID:=network=101:network=101
+-  PROVIDES:=hostapd
+-  CONFLICTS:=$(HOSTAPD_PROVIDERS)
+-  HOSTAPD_PROVIDERS+=$(1)
+-endef
+-
+-define Package/hostapd
+-$(call Package/hostapd/Default,$(1))
+-  TITLE+= (built-in full)
+-  VARIANT:=full-internal
+-endef
+-
+-define Package/hostapd/description
+- This package contains a full featured IEEE 802.1x/WPA/EAP/RADIUS
+- Authenticator.
+-endef
+-
+-define Package/hostapd-openssl
+-$(call Package/hostapd/Default,$(1))
+-  TITLE+= (OpenSSL full)
+-  VARIANT:=full-openssl
+-  DEPENDS+=+PACKAGE_hostapd-openssl:libopenssl
+-endef
+-
+-Package/hostapd-openssl/description = $(Package/hostapd/description)
+-
+-define Package/hostapd-wolfssl
+-$(call Package/hostapd/Default,$(1))
+-  TITLE+= (wolfSSL full)
+-  VARIANT:=full-wolfssl
+-  DEPENDS+=+PACKAGE_hostapd-wolfssl:libwolfssl
+-endef
+-
+-Package/hostapd-wolfssl/description = $(Package/hostapd/description)
+-
+-define Package/hostapd-mbedtls
+-$(call Package/hostapd/Default,$(1))
+-  TITLE+= (mbedTLS full)
+-  VARIANT:=full-mbedtls
+-  DEPENDS+=+PACKAGE_hostapd-mbedtls:libmbedtls
+-endef
+-
+-Package/hostapd-mbedtls/description = $(Package/hostapd/description)
+-
+-define Package/hostapd-basic
+-$(call Package/hostapd/Default,$(1))
+-  TITLE+= (WPA-PSK, 11r, 11w)
+-  VARIANT:=basic
+-endef
+-
+-define Package/hostapd-basic/description
+- This package contains a basic IEEE 802.1x/WPA Authenticator with WPA-PSK, 802.11r and 802.11w support.
+-endef
+-
+-define Package/hostapd-basic-openssl
+-$(call Package/hostapd/Default,$(1))
+-  TITLE+= (WPA-PSK, 11r and 11w)
+-  VARIANT:=basic-openssl
+-  DEPENDS+=+PACKAGE_hostapd-basic-openssl:libopenssl
+-endef
+-
+-define Package/hostapd-basic-openssl/description
+- This package contains a basic IEEE 802.1x/WPA Authenticator with WPA-PSK, 802.11r and 802.11w support.
+-endef
+-
+-define Package/hostapd-basic-wolfssl
+-$(call Package/hostapd/Default,$(1))
+-  TITLE+= (WPA-PSK, 11r and 11w)
+-  VARIANT:=basic-wolfssl
+-  DEPENDS+=+PACKAGE_hostapd-basic-wolfssl:libwolfssl
+-endef
+-
+-define Package/hostapd-basic-wolfssl/description
+- This package contains a basic IEEE 802.1x/WPA Authenticator with WPA-PSK, 802.11r and 802.11w support.
+-endef
+-
+-define Package/hostapd-basic-mbedtls
+-$(call Package/hostapd/Default,$(1))
+-  TITLE+= (WPA-PSK, 11r and 11w)
+-  VARIANT:=basic-mbedtls
+-  DEPENDS+=+PACKAGE_hostapd-basic-mbedtls:libmbedtls
+-endef
+-
+-define Package/hostapd-basic-mbedtls/description
+- This package contains a basic IEEE 802.1x/WPA Authenticator with WPA-PSK, 802.11r and 802.11w support.
+-endef
+-
+-define Package/hostapd-mini
+-$(call Package/hostapd/Default,$(1))
+-  TITLE+= (WPA-PSK only)
+-  VARIANT:=mini
+-endef
+-
+-define Package/hostapd-mini/description
+- This package contains a minimal IEEE 802.1x/WPA Authenticator (WPA-PSK only).
+-endef
+-
+-
+-define Package/wpad/Default
+-  SECTION:=net
+-  CATEGORY:=Network
+-  SUBMENU:=WirelessAPD
+-  TITLE:=IEEE 802.1x Auth/Supplicant
+-  DEPENDS:=$(DRV_DEPENDS) +hostapd-common +libubus
+-  EXTRA_DEPENDS:=hostapd-common (=$(PKG_VERSION)-$(PKG_RELEASE))
+-  USERID:=network=101:network=101
+-  URL:=http://hostap.epitest.fi/
+-  PROVIDES:=hostapd wpa-supplicant
+-  CONFLICTS:=$(HOSTAPD_PROVIDERS) $(SUPPLICANT_PROVIDERS)
+-  HOSTAPD_PROVIDERS+=$(1)
+-  SUPPLICANT_PROVIDERS+=$(1)
+-endef
+-
+-define Package/wpad
+-$(call Package/wpad/Default,$(1))
+-  TITLE+= (built-in full)
+-  VARIANT:=wpad-full-internal
+-endef
+-
+-define Package/wpad/description
+- This package contains a full featured IEEE 802.1x/WPA/EAP/RADIUS
+- Authenticator and Supplicant
+-endef
+-
+-define Package/wpad-openssl
+-$(call Package/wpad/Default,$(1))
+-  TITLE+= (OpenSSL full)
+-  VARIANT:=wpad-full-openssl
+-  DEPENDS+=+PACKAGE_wpad-openssl:libopenssl
+-endef
+-
+-Package/wpad-openssl/description = $(Package/wpad/description)
+-
+-define Package/wpad-wolfssl
+-$(call Package/wpad/Default,$(1))
+-  TITLE+= (wolfSSL full)
+-  VARIANT:=wpad-full-wolfssl
+-  DEPENDS+=+PACKAGE_wpad-wolfssl:libwolfssl
+-endef
+-
+-Package/wpad-wolfssl/description = $(Package/wpad/description)
+-
+-define Package/wpad-mbedtls
+-$(call Package/wpad/Default,$(1))
+-  TITLE+= (mbedTLS full)
+-  VARIANT:=wpad-full-mbedtls
+-  DEPENDS+=+PACKAGE_wpad-mbedtls:libmbedtls
+-endef
+-
+-Package/wpad-mbedtls/description = $(Package/wpad/description)
+-
+-define Package/wpad-basic
+-$(call Package/wpad/Default,$(1))
+-  TITLE+= (WPA-PSK, 11r, 11w)
+-  VARIANT:=wpad-basic
+-endef
+-
+-define Package/wpad-basic/description
+- This package contains a basic IEEE 802.1x/WPA Authenticator and Supplicant with WPA-PSK, 802.11r and 802.11w support.
+-endef
+-
+-define Package/wpad-basic-openssl
+-$(call Package/wpad/Default,$(1))
+-  TITLE+= (OpenSSL, 11r, 11w)
+-  VARIANT:=wpad-basic-openssl
+-  DEPENDS+=+PACKAGE_wpad-basic-openssl:libopenssl
+-endef
+-
+-define Package/wpad-basic-openssl/description
+- This package contains a basic IEEE 802.1x/WPA Authenticator and Supplicant with WPA-PSK, SAE (WPA3-Personal), 802.11r and 802.11w support.
+-endef
+-
+-define Package/wpad-basic-wolfssl
+-$(call Package/wpad/Default,$(1))
+-  TITLE+= (wolfSSL, 11r, 11w)
+-  VARIANT:=wpad-basic-wolfssl
+-  DEPENDS+=+PACKAGE_wpad-basic-wolfssl:libwolfssl
+-endef
+-
+-define Package/wpad-basic-wolfssl/description
+- This package contains a basic IEEE 802.1x/WPA Authenticator and Supplicant with WPA-PSK, SAE (WPA3-Personal), 802.11r and 802.11w support.
+-endef
+-
+-define Package/wpad-basic-mbedtls
+-$(call Package/wpad/Default,$(1))
+-  TITLE+= (mbedTLS, 11r, 11w)
+-  VARIANT:=wpad-basic-mbedtls
+-  DEPENDS+=+PACKAGE_wpad-basic-mbedtls:libmbedtls
+-endef
+-
+-define Package/wpad-basic-mbedtls/description
+- This package contains a basic IEEE 802.1x/WPA Authenticator and Supplicant with WPA-PSK, SAE (WPA3-Personal), 802.11r and 802.11w support.
+-endef
+-
+-define Package/wpad-mini
+-$(call Package/wpad/Default,$(1))
+-  TITLE+= (WPA-PSK only)
+-  VARIANT:=wpad-mini
+-endef
+-
+-define Package/wpad-mini/description
+- This package contains a minimal IEEE 802.1x/WPA Authenticator and Supplicant (WPA-PSK only).
+-endef
+-
+-define Package/wpad-mesh
+-$(call Package/wpad/Default,$(1))
+-  DEPENDS+=@PACKAGE_kmod-cfg80211 @(!TARGET_uml||BROKEN)
+-  PROVIDES+=wpa-supplicant-mesh wpad-mesh
+-endef
+-
+-define Package/wpad-mesh/description
+- This package contains a minimal IEEE 802.1x/WPA Authenticator and Supplicant (with 802.11s mesh and SAE support).
+-endef
+-
+-define Package/wpad-mesh-openssl
+-$(call Package/wpad-mesh,$(1))
+-  TITLE+= (OpenSSL, 11s, SAE)
+-  DEPENDS+=+PACKAGE_wpad-mesh-openssl:libopenssl
+-  VARIANT:=wpad-mesh-openssl
+-endef
+-
+-Package/wpad-mesh-openssl/description = $(Package/wpad-mesh/description)
+-
+-define Package/wpad-mesh-wolfssl
+-$(call Package/wpad-mesh,$(1))
+-  TITLE+= (wolfSSL, 11s, SAE)
+-  DEPENDS+=+PACKAGE_wpad-mesh-wolfssl:libwolfssl
+-  VARIANT:=wpad-mesh-wolfssl
+-endef
+-
+-Package/wpad-mesh-wolfssl/description = $(Package/wpad-mesh/description)
+-
+-define Package/wpad-mesh-mbedtls
+-$(call Package/wpad-mesh,$(1))
+-  TITLE+= (mbedTLS, 11s, SAE)
+-  DEPENDS+=+PACKAGE_wpad-mesh-mbedtls:libmbedtls
+-  VARIANT:=wpad-mesh-mbedtls
+-endef
+-
+-Package/wpad-mesh-mbedtls/description = $(Package/wpad-mesh/description)
+-
+-
+-define Package/wpa-supplicant/Default
+-  SECTION:=net
+-  CATEGORY:=Network
+-  SUBMENU:=WirelessAPD
+-  TITLE:=WPA Supplicant
+-  URL:=http://hostap.epitest.fi/wpa_supplicant/
+-  DEPENDS:=$(DRV_DEPENDS) +hostapd-common +libubus
+-  EXTRA_DEPENDS:=hostapd-common (=$(PKG_VERSION)-$(PKG_RELEASE))
+-  USERID:=network=101:network=101
+-  PROVIDES:=wpa-supplicant
+-  CONFLICTS:=$(SUPPLICANT_PROVIDERS)
+-  SUPPLICANT_PROVIDERS+=$(1)
+-endef
+-
+-define Package/wpa-supplicant
+-$(call Package/wpa-supplicant/Default,$(1))
+-  TITLE+= (built-in full)
+-  VARIANT:=supplicant-full-internal
+-endef
+-
+-define Package/wpa-supplicant-openssl
+-$(call Package/wpa-supplicant/Default,$(1))
+-  TITLE+= (OpenSSL full)
+-  VARIANT:=supplicant-full-openssl
+-  DEPENDS+=+PACKAGE_wpa-supplicant-openssl:libopenssl
+-endef
+-
+-define Package/wpa-supplicant-wolfssl
+-$(call Package/wpa-supplicant/Default,$(1))
+-  TITLE+= (wolfSSL full)
+-  VARIANT:=supplicant-full-wolfssl
+-  DEPENDS+=+PACKAGE_wpa-supplicant-wolfssl:libwolfssl
+-endef
+-
+-define Package/wpa-supplicant-mbedtls
+-$(call Package/wpa-supplicant/Default,$(1))
+-  TITLE+= (mbedTLS full)
+-  VARIANT:=supplicant-full-mbedtls
+-  DEPENDS+=+PACKAGE_wpa-supplicant-mbedtls:libmbedtls
+-endef
+-
+-define Package/wpa-supplicant/config
+-	source "$(SOURCE)/Config.in"
+-endef
+-
+-define Package/wpa-supplicant-p2p
+-$(call Package/wpa-supplicant/Default,$(1))
+-  TITLE+= (Wi-Fi P2P support)
+-  DEPENDS+=@PACKAGE_kmod-cfg80211
+-  VARIANT:=supplicant-p2p-internal
+-endef
+-
+-define Package/wpa-supplicant-mesh/Default
+-$(call Package/wpa-supplicant/Default,$(1))
+-  DEPENDS+=@PACKAGE_kmod-cfg80211 @(!TARGET_uml||BROKEN)
+-  PROVIDES+=wpa-supplicant-mesh
+-endef
+-
+-define Package/wpa-supplicant-mesh-openssl
+-$(call Package/wpa-supplicant-mesh/Default,$(1))
+-  TITLE+= (OpenSSL, 11s, SAE)
+-  VARIANT:=supplicant-mesh-openssl
+-  DEPENDS+=+PACKAGE_wpa-supplicant-mesh-openssl:libopenssl
+-endef
+-
+-define Package/wpa-supplicant-mesh-wolfssl
+-$(call Package/wpa-supplicant-mesh/Default,$(1))
+-  TITLE+= (wolfSSL, 11s, SAE)
+-  VARIANT:=supplicant-mesh-wolfssl
+-  DEPENDS+=+PACKAGE_wpa-supplicant-mesh-wolfssl:libwolfssl
+-endef
+-
+-define Package/wpa-supplicant-mesh-mbedtls
+-$(call Package/wpa-supplicant-mesh/Default,$(1))
+-  TITLE+= (mbedTLS, 11s, SAE)
+-  VARIANT:=supplicant-mesh-mbedtls
+-  DEPENDS+=+PACKAGE_wpa-supplicant-mesh-mbedtls:libmbedtls
+-endef
+-
+-define Package/wpa-supplicant-basic
+-$(call Package/wpa-supplicant/Default,$(1))
+-  TITLE+= (11r, 11w)
+-  VARIANT:=supplicant-basic
+-endef
+-
+-define Package/wpa-supplicant-mini
+-$(call Package/wpa-supplicant/Default,$(1))
+-  TITLE+= (minimal)
+-  VARIANT:=supplicant-mini
+-endef
+-
+-
+-define Package/hostapd-common
+-  TITLE:=hostapd/wpa_supplicant common support files
+-  SECTION:=net
+-  CATEGORY:=Network
+-  SUBMENU:=WirelessAPD
+-endef
+-
+-define Package/hostapd-utils
+-  SECTION:=net
+-  CATEGORY:=Network
+-  SUBMENU:=WirelessAPD
+-  TITLE:=IEEE 802.1x Authenticator (utils)
+-  URL:=http://hostap.epitest.fi/
+-  DEPENDS:=@$(subst $(space),||,$(foreach pkg,$(HOSTAPD_PROVIDERS),PACKAGE_$(pkg)))
+-  VARIANT:=*
+-endef
+-
+-define Package/hostapd-utils/description
+- This package contains a command line utility to control the
+- IEEE 802.1x/WPA/EAP/RADIUS Authenticator.
+-endef
+-
+-define Package/wpa-cli
+-  SECTION:=net
+-  CATEGORY:=Network
+-  SUBMENU:=WirelessAPD
+-  DEPENDS:=@$(subst $(space),||,$(foreach pkg,$(SUPPLICANT_PROVIDERS),PACKAGE_$(pkg)))
+-  TITLE:=WPA Supplicant command line control utility
+-  VARIANT:=*
+-endef
+-
+-define Package/eapol-test/Default
+-  TITLE:=802.1x auth test utility
+-  SECTION:=net
+-  SUBMENU:=WirelessAPD
+-  CATEGORY:=Network
+-  DEPENDS:=$(DRV_DEPENDS) +libubus
+-endef
+-
+-define Package/eapol-test
+-  $(call Package/eapol-test/Default,$(1))
+-  TITLE+= (built-in full)
+-  VARIANT:=supplicant-full-internal
+-endef
+-
+-define Package/eapol-test-openssl
+-  $(call Package/eapol-test/Default,$(1))
+-  TITLE+= (OpenSSL full)
+-  VARIANT:=supplicant-full-openssl
+-  CONFLICTS:=$(filter-out eapol-test-openssl ,$(EAPOL_TEST_PROVIDERS))
+-  DEPENDS+=+PACKAGE_eapol-test-openssl:libopenssl
+-  PROVIDES:=eapol-test
+-endef
+-
+-define Package/eapol-test-wolfssl
+-  $(call Package/eapol-test/Default,$(1))
+-  TITLE+= (wolfSSL full)
+-  VARIANT:=supplicant-full-wolfssl
+-  CONFLICTS:=$(filter-out eapol-test-openssl ,$(filter-out eapol-test-wolfssl ,$(EAPOL_TEST_PROVIDERS)))
+-  DEPENDS+=+PACKAGE_eapol-test-wolfssl:libwolfssl
+-  PROVIDES:=eapol-test
+-endef
+-
+-define Package/eapol-test-mbedtls
+-  $(call Package/eapol-test/Default,$(1))
+-  TITLE+= (mbedTLS full)
+-  VARIANT:=supplicant-full-mbedtls
+-  CONFLICTS:=$(filter-out eapol-test-openssl ,$(filter-out eapol-test-mbedtls ,$(EAPOL_TEST_PROVIDERS)))
+-  DEPENDS+=+PACKAGE_eapol-test-mbedtls:libmbedtls
+-  PROVIDES:=eapol-test
+-endef
+-
+-
+-ifneq ($(wildcard $(PKG_BUILD_DIR)/.config_*),$(subst .configured_,.config_,$(STAMP_CONFIGURED)))
+-  define Build/Configure/rebuild
+-	$(FIND) $(PKG_BUILD_DIR) -name \*.o -or -name \*.a | $(XARGS) rm -f
+-	rm -f $(PKG_BUILD_DIR)/hostapd/hostapd
+-	rm -f $(PKG_BUILD_DIR)/wpa_supplicant/wpa_supplicant
+-	rm -f $(PKG_BUILD_DIR)/.config_*
+-	touch $(subst .configured_,.config_,$(STAMP_CONFIGURED))
+-  endef
+-endif
+-
+-define Build/Configure
+-	$(Build/Configure/rebuild)
+-	$(if $(wildcard ./files/hostapd-$(CONFIG_VARIANT).config), \
+-		$(CP) ./files/hostapd-$(CONFIG_VARIANT).config $(PKG_BUILD_DIR)/hostapd/.config \
+-	)
+-	$(if $(wildcard ./files/wpa_supplicant-$(CONFIG_VARIANT).config), \
+-		$(CP) ./files/wpa_supplicant-$(CONFIG_VARIANT).config $(PKG_BUILD_DIR)/wpa_supplicant/.config
+-	)
+-endef
+-
+-TARGET_CPPFLAGS := \
+-	-I$(STAGING_DIR)/usr/include/libnl-tiny \
+-	-I$(PKG_BUILD_DIR)/src/crypto \
+-	$(TARGET_CPPFLAGS) \
+-	-DCONFIG_LIBNL20 \
+-	-D_GNU_SOURCE \
+-	$(if $(CONFIG_WPA_MSG_MIN_PRIORITY),-DCONFIG_MSG_MIN_PRIORITY=$(CONFIG_WPA_MSG_MIN_PRIORITY))
+-
+-TARGET_LDFLAGS += -lubox -lubus
+-
+-ifdef CONFIG_PACKAGE_kmod-cfg80211
+-  TARGET_LDFLAGS += -lm -lnl-tiny
+-endif
+-
+-ifdef CONFIG_WPA_ENABLE_WEP
+-    DRIVER_MAKEOPTS += CONFIG_WEP=y
+-endif
+-
+-define Build/RunMake
+-	CFLAGS="$(TARGET_CPPFLAGS) $(TARGET_CFLAGS)" \
+-	$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR)/$(1) \
+-		$(TARGET_CONFIGURE_OPTS) \
+-		$(DRIVER_MAKEOPTS) \
+-		LIBS="$(TARGET_LDFLAGS)" \
+-		LIBS_c="$(TARGET_LDFLAGS_C)" \
+-		AR="$(TARGET_CROSS)gcc-ar" \
+-		BCHECK= \
+-		$(if $(findstring s,$(OPENWRT_VERBOSE)),V=1) \
+-		$(2)
+-endef
+-
+-define Build/Compile/wpad
+-	echo ` \
+-		$(call Build/RunMake,hostapd,-s MULTICALL=1 dump_cflags); \
+-		$(call Build/RunMake,wpa_supplicant,-s MULTICALL=1 dump_cflags) | \
+-		sed -e 's,-n ,,g' -e 's^$(TARGET_CFLAGS)^^' \
+-	` > $(PKG_BUILD_DIR)/.cflags
+-	sed -i 's/"/\\"/g' $(PKG_BUILD_DIR)/.cflags
+-	+$(call Build/RunMake,hostapd, \
+-		CFLAGS="$$$$(cat $(PKG_BUILD_DIR)/.cflags)" \
+-		MULTICALL=1 \
+-		hostapd_cli hostapd_multi.a \
+-	)
+-	+$(call Build/RunMake,wpa_supplicant, \
+-		CFLAGS="$$$$(cat $(PKG_BUILD_DIR)/.cflags)" \
+-		MULTICALL=1 \
+-		wpa_cli wpa_supplicant_multi.a \
+-	)
+-	+export MAKEFLAGS="$(MAKE_JOBSERVER)"; $(TARGET_CC) -o $(PKG_BUILD_DIR)/wpad \
+-		$(TARGET_CFLAGS) \
+-		./files/multicall.c \
+-		$(PKG_BUILD_DIR)/hostapd/hostapd_multi.a \
+-		$(PKG_BUILD_DIR)/wpa_supplicant/wpa_supplicant_multi.a \
+-		$(TARGET_LDFLAGS)
+-endef
+-
+-define Build/Compile/hostapd
+-	+$(call Build/RunMake,hostapd, \
+-		hostapd hostapd_cli \
+-	)
+-endef
+-
+-define Build/Compile/supplicant
+-	+$(call Build/RunMake,wpa_supplicant, \
+-		wpa_cli wpa_supplicant \
+-	)
+-endef
+-
+-define Build/Compile/supplicant-full-internal
+-	+$(call Build/RunMake,wpa_supplicant, \
+-		eapol_test \
+-	)
+-endef
+-
+-define Build/Compile/supplicant-full-openssl
+-	+$(call Build/RunMake,wpa_supplicant, \
+-		eapol_test \
+-	)
+-endef
+-
+-define Build/Compile/supplicant-full-wolfssl
+-	+$(call Build/RunMake,wpa_supplicant, \
+-		eapol_test \
+-	)
+-endef
+-
+-define Build/Compile/supplicant-full-mbedtls
+-	+$(call Build/RunMake,wpa_supplicant, \
+-		eapol_test \
+-	)
+-endef
+-
+-define Build/Compile
+-	$(Build/Compile/$(LOCAL_TYPE))
+-	$(Build/Compile/$(BUILD_VARIANT))
+-endef
+-
+-define Install/hostapd
+-	$(INSTALL_DIR) $(1)/usr/sbin
+-endef
+-
+-define Install/supplicant
+-	$(INSTALL_DIR) $(1)/usr/sbin
+-endef
+-
+-define Package/hostapd-common/install
+-	$(INSTALL_DIR) $(1)/etc/capabilities $(1)/etc/rc.button $(1)/etc/hotplug.d/ieee80211 $(1)/etc/init.d $(1)/lib/netifd  $(1)/usr/share/acl.d
+-	$(INSTALL_BIN) ./files/dhcp-get-server.sh $(1)/lib/netifd/dhcp-get-server.sh
+-	$(INSTALL_DATA) ./files/hostapd.sh $(1)/lib/netifd/hostapd.sh
+-	$(INSTALL_BIN) ./files/wpad.init $(1)/etc/init.d/wpad
+-	$(INSTALL_BIN) ./files/wps-hotplug.sh $(1)/etc/rc.button/wps
+-	$(INSTALL_DATA) ./files/wpad_acl.json $(1)/usr/share/acl.d
+-	$(INSTALL_DATA) ./files/wpad.json $(1)/etc/capabilities
+-endef
+-
+-define Package/hostapd/install
+-	$(call Install/hostapd,$(1))
+-	$(INSTALL_BIN) $(PKG_BUILD_DIR)/hostapd/hostapd $(1)/usr/sbin/
+-endef
+-Package/hostapd-basic/install = $(Package/hostapd/install)
+-Package/hostapd-basic-openssl/install = $(Package/hostapd/install)
+-Package/hostapd-basic-wolfssl/install = $(Package/hostapd/install)
+-Package/hostapd-basic-mbedtls/install = $(Package/hostapd/install)
+-Package/hostapd-mini/install = $(Package/hostapd/install)
+-Package/hostapd-openssl/install = $(Package/hostapd/install)
+-Package/hostapd-wolfssl/install = $(Package/hostapd/install)
+-Package/hostapd-mbedtls/install = $(Package/hostapd/install)
+-
+-ifneq ($(LOCAL_TYPE),supplicant)
+-  define Package/hostapd-utils/install
+-	$(INSTALL_DIR) $(1)/usr/sbin
+-	$(INSTALL_BIN) $(PKG_BUILD_DIR)/hostapd/hostapd_cli $(1)/usr/sbin/
+-  endef
+-endif
+-
+-define Package/wpad/install
+-	$(call Install/hostapd,$(1))
+-	$(call Install/supplicant,$(1))
+-	$(INSTALL_BIN) $(PKG_BUILD_DIR)/wpad $(1)/usr/sbin/
+-	$(LN) wpad $(1)/usr/sbin/hostapd
+-	$(LN) wpad $(1)/usr/sbin/wpa_supplicant
+-endef
+-Package/wpad-basic/install = $(Package/wpad/install)
+-Package/wpad-basic-openssl/install = $(Package/wpad/install)
+-Package/wpad-basic-wolfssl/install = $(Package/wpad/install)
+-Package/wpad-basic-mbedtls/install = $(Package/wpad/install)
+-Package/wpad-mini/install = $(Package/wpad/install)
+-Package/wpad-openssl/install = $(Package/wpad/install)
+-Package/wpad-wolfssl/install = $(Package/wpad/install)
+-Package/wpad-mbedtls/install = $(Package/wpad/install)
+-Package/wpad-mesh-openssl/install = $(Package/wpad/install)
+-Package/wpad-mesh-wolfssl/install = $(Package/wpad/install)
+-Package/wpad-mesh-mbedtls/install = $(Package/wpad/install)
+-
+-define Package/wpa-supplicant/install
+-	$(call Install/supplicant,$(1))
+-	$(INSTALL_BIN) $(PKG_BUILD_DIR)/wpa_supplicant/wpa_supplicant $(1)/usr/sbin/
+-endef
+-Package/wpa-supplicant-basic/install = $(Package/wpa-supplicant/install)
+-Package/wpa-supplicant-mini/install = $(Package/wpa-supplicant/install)
+-Package/wpa-supplicant-p2p/install = $(Package/wpa-supplicant/install)
+-Package/wpa-supplicant-openssl/install = $(Package/wpa-supplicant/install)
+-Package/wpa-supplicant-wolfssl/install = $(Package/wpa-supplicant/install)
+-Package/wpa-supplicant-mbedtls/install = $(Package/wpa-supplicant/install)
+-Package/wpa-supplicant-mesh-openssl/install = $(Package/wpa-supplicant/install)
+-Package/wpa-supplicant-mesh-wolfssl/install = $(Package/wpa-supplicant/install)
+-Package/wpa-supplicant-mesh-mbedtls/install = $(Package/wpa-supplicant/install)
+-
+-ifneq ($(LOCAL_TYPE),hostapd)
+-  define Package/wpa-cli/install
+-	$(INSTALL_DIR) $(1)/usr/sbin
+-	$(CP) $(PKG_BUILD_DIR)/wpa_supplicant/wpa_cli $(1)/usr/sbin/
+-  endef
+-endif
+-
+-ifeq ($(BUILD_VARIANT),supplicant-full-internal)
+-  define Package/eapol-test/install
+-	$(INSTALL_DIR) $(1)/usr/sbin
+-	$(CP) $(PKG_BUILD_DIR)/wpa_supplicant/eapol_test $(1)/usr/sbin/
+-  endef
+-endif
+-
+-ifeq ($(BUILD_VARIANT),supplicant-full-openssl)
+-  define Package/eapol-test-openssl/install
+-	$(INSTALL_DIR) $(1)/usr/sbin
+-	$(CP) $(PKG_BUILD_DIR)/wpa_supplicant/eapol_test $(1)/usr/sbin/
+-  endef
+-endif
+-
+-ifeq ($(BUILD_VARIANT),supplicant-full-wolfssl)
+-  define Package/eapol-test-wolfssl/install
+-	$(INSTALL_DIR) $(1)/usr/sbin
+-	$(CP) $(PKG_BUILD_DIR)/wpa_supplicant/eapol_test $(1)/usr/sbin/
+-  endef
+-endif
+-
+-ifeq ($(BUILD_VARIANT),supplicant-full-mbedtls)
+-  define Package/eapol-test-mbedtls/install
+-	$(INSTALL_DIR) $(1)/usr/sbin
+-	$(CP) $(PKG_BUILD_DIR)/wpa_supplicant/eapol_test $(1)/usr/sbin/
+-  endef
+-endif
+-
+-# Build hostapd-common before its dependents, to avoid
+-# spurious rebuilds when building multiple variants.
+-$(eval $(call BuildPackage,hostapd-common))
+-$(eval $(call BuildPackage,hostapd))
+-$(eval $(call BuildPackage,hostapd-basic))
+-$(eval $(call BuildPackage,hostapd-basic-openssl))
+-$(eval $(call BuildPackage,hostapd-basic-wolfssl))
+-$(eval $(call BuildPackage,hostapd-basic-mbedtls))
+-$(eval $(call BuildPackage,hostapd-mini))
+-$(eval $(call BuildPackage,hostapd-openssl))
+-$(eval $(call BuildPackage,hostapd-wolfssl))
+-$(eval $(call BuildPackage,hostapd-mbedtls))
+-$(eval $(call BuildPackage,wpad))
+-$(eval $(call BuildPackage,wpad-mesh-openssl))
+-$(eval $(call BuildPackage,wpad-mesh-wolfssl))
+-$(eval $(call BuildPackage,wpad-mesh-mbedtls))
+-$(eval $(call BuildPackage,wpad-basic))
+-$(eval $(call BuildPackage,wpad-basic-openssl))
+-$(eval $(call BuildPackage,wpad-basic-wolfssl))
+-$(eval $(call BuildPackage,wpad-basic-mbedtls))
+-$(eval $(call BuildPackage,wpad-mini))
+-$(eval $(call BuildPackage,wpad-openssl))
+-$(eval $(call BuildPackage,wpad-wolfssl))
+-$(eval $(call BuildPackage,wpad-mbedtls))
+-$(eval $(call BuildPackage,wpa-supplicant))
+-$(eval $(call BuildPackage,wpa-supplicant-mesh-openssl))
+-$(eval $(call BuildPackage,wpa-supplicant-mesh-wolfssl))
+-$(eval $(call BuildPackage,wpa-supplicant-mesh-mbedtls))
+-$(eval $(call BuildPackage,wpa-supplicant-basic))
+-$(eval $(call BuildPackage,wpa-supplicant-mini))
+-$(eval $(call BuildPackage,wpa-supplicant-p2p))
+-$(eval $(call BuildPackage,wpa-supplicant-openssl))
+-$(eval $(call BuildPackage,wpa-supplicant-wolfssl))
+-$(eval $(call BuildPackage,wpa-supplicant-mbedtls))
+-$(eval $(call BuildPackage,wpa-cli))
+-$(eval $(call BuildPackage,hostapd-utils))
+-$(eval $(call BuildPackage,eapol-test))
+-$(eval $(call BuildPackage,eapol-test-openssl))
+-$(eval $(call BuildPackage,eapol-test-wolfssl))
+-$(eval $(call BuildPackage,eapol-test-mbedtls))
+diff --git a/package/network/services/hostapd/README.md b/package/network/services/hostapd/README.md
+deleted file mode 100644
+index 2150863306..0000000000
+--- a/package/network/services/hostapd/README.md
++++ /dev/null
+@@ -1,419 +0,0 @@
+-# UBUS methods - hostapd
+-
+-## bss_mgmt_enable
+-Enable 802.11k/v features.
+-
+-### arguments
+-| Name | Type | Required | Description |
+-|---|---|---|---|
+-| neighbor_report | bool | no | enable 802.11k neighbor reports |
+-| beacon_report | bool | no | enable 802.11k beacon reports |
+-| link_measurements | bool | no | enable 802.11k link measurements |
+-| bss_transition | bool | no | enable 802.11v BSS transition support |
+-
+-### example
+-`ubus call hostapd.wl5-fb bss_mgmt_enable '{ "neighbor_report": true, "beacon_report": true, "link_measurements": true, "bss_transition": true
+-}'`
+-
+-
+-## bss_transition_request
+-Initiate an 802.11v transition request.
+-
+-### arguments
+-| Name | Type | Required | Description |
+-|---|---|---|---|
+-| addr | string | yes | client MAC address |
+-| disassociation_imminent | bool | no | set Disassociation Imminent bit |
+-| disassociation_timer | int32 | no | disassociate client if it doesn't roam after this time |
+-| validity_period | int32 | no | validity of the BSS Transition Candiate List |
+-| neighbors | array | no | BSS Transition Candidate List |
+-| abridged | bool | no | prefer APs in the BSS Transition Candidate List |
+-| dialog_token | int32 | no | identifier for the request/report transaction |
+-| mbo_reason | int32 | no | MBO Transition Reason Code Attribute |
+-| cell_pref | int32 | no | MBO Cellular Data Connection Preference Attribute |
+-| reassoc_delay | int32 | no | MBO Re-association retry delay |
+-
+-### example
+-`ubus call hostapd.wl5-fb bss_transition_request '{ "addr": "68:2F:67:8B:98:ED", "disassociation_imminent": false, "disassociation_timer": 0, "validity_period": 30, "neighbors": ["b6a7b9cbeebabf5900008064090603026a00"], "abridged": 1 }'`
+-
+-
+-## config_add
+-Dynamically load a BSS configuration from a file. This is used by netifd's mac80211 support script to configure BSSes on multiple PHYs in a single hostapd instance.
+-
+-### arguments
+-| Name | Type | Required | Description |
+-|---|---|---|---|
+-| iface | string | yes | WiFi interface name |
+-| config | string | yes | path to hostapd config file |
+-
+-
+-## config_remove
+-Dynamically remove a BSS configuration.
+-
+-### arguments
+-| Name | Type | Required | Description |
+-|---|---|---|---|
+-| iface | string | yes | WiFi interface name |
+-
+-
+-## del_client
+-Kick a client off the network.
+-
+-### arguments
+-| Name | Type | Required | Description |
+-|---|---|---|---|
+-| addr | string | yes | client MAC address |
+-| reason | int32 | no | 802.11 reason code |
+-| deauth | bool | no | deauthenticates client instead of disassociating |
+-| ban_time | int32 | no | ban client for N milliseconds |
+-
+-### example
+-`ubus call hostapd.wl5-fb del_client '{ "addr": "68:2f:67:8b:98:ed", "reason": 5, "deauth": true, "ban_time": 10000 }'`
+-
+-
+-## get_clients
+-Show associated clients.
+-
+-### example
+-`ubus call hostapd.wl5-fb get_clients`
+-
+-### output
+-```json
+-{
+-        "freq": 5260,
+-        "clients": {
+-                "68:2f:67:8b:98:ed": {
+-                        "auth": true,
+-                        "assoc": true,
+-                        "authorized": true,
+-                        "preauth": false,
+-                        "wds": false,
+-                        "wmm": true,
+-                        "ht": true,
+-                        "vht": true,
+-                        "he": false,
+-                        "wps": false,
+-                        "mfp": true,
+-                        "rrm": [
+-                                0,
+-                                0,
+-                                0,
+-                                0,
+-                                0
+-                        ],
+-                        "extended_capabilities": [
+-                                0,
+-                                0,
+-                                0,
+-                                0,
+-                                0,
+-                                0,
+-                                0,
+-                                64
+-                        ],
+-                        "aid": 3,
+-                        "signature": "wifi4|probe:0,1,45,127,107,191,221(0017f2,10),221(001018,2),htcap:006f,htagg:1b,htmcs:0000ffff,vhtcap:0f825832,vhtrxmcs:0000ffea,vhttxmcs:0000ffea,extcap:0000008000000040|assoc:0,1,33,36,48,45,127,191,221(0017f2,10),221(001018,2),221(0050f2,2),htcap:006f,htagg:1b,htmcs:0000ffff,vhtcap:0f825832,vhtrxmcs:0000ffea,vhttxmcs:0000ffea,txpow:14f9,extcap:0000000000000040",
+-                        "bytes": {
+-                                "rx": 1933667,
+-                                "tx": 746805
+-                        },
+-                        "airtime": {
+-                                "rx": 208863,
+-                                "tx": 9037883
+-                        },
+-                        "packets": {
+-                                "rx": 3587,
+-                                "tx": 2185
+-                        },
+-                        "rate": {
+-                                "rx": 866700,
+-                                "tx": 866700
+-                        },
+-                        "signal": -50,
+-                        "capabilities": {
+-                                "vht": {
+-                                        "su_beamformee": true,
+-                                        "mu_beamformee": false,
+-                                        "mcs_map": {
+-                                                "rx": {
+-                                                        "1ss": 9,
+-                                                        "2ss": 9,
+-                                                        "3ss": 9,
+-                                                        "4ss": -1,
+-                                                        "5ss": -1,
+-                                                        "6ss": -1,
+-                                                        "7ss": -1,
+-                                                        "8ss": -1
+-                                                },
+-                                                "tx": {
+-                                                        "1ss": 9,
+-                                                        "2ss": 9,
+-                                                        "3ss": 9,
+-                                                        "4ss": -1,
+-                                                        "5ss": -1,
+-                                                        "6ss": -1,
+-                                                        "7ss": -1,
+-                                                        "8ss": -1
+-                                                }
+-                                        }
+-                                }
+-                        }
+-                }
+-        }
+-}
+-```
+-
+-
+-## get_features
+-Show HT/VHT support.
+-
+-### example
+-`ubus call hostapd.wl5-fb get_features`
+-
+-### output
+-```json
+-{
+-        "ht_supported": true,
+-        "vht_supported": true
+-}
+-```
+-
+-
+-## get_status
+-Get BSS status.
+-
+-### example
+-`ubus call hostapd.wl5-fb get_status`
+-
+-### output
+-```json
+-{
+-        "status": "ENABLED",
+-        "bssid": "b6:a7:b9:cb:ee:bc",
+-        "ssid": "fb",
+-        "freq": 5260,
+-        "channel": 52,
+-        "op_class": 128,
+-        "beacon_interval": 100,
+-        "phy": "wl5-lan",
+-        "rrm": {
+-                "neighbor_report_tx": 0
+-        },
+-        "wnm": {
+-                "bss_transition_query_rx": 0,
+-                "bss_transition_request_tx": 0,
+-                "bss_transition_response_rx": 0
+-        },
+-        "airtime": {
+-                "time": 259561738,
+-                "time_busy": 2844249,
+-                "utilization": 0
+-        },
+-        "dfs": {
+-                "cac_seconds": 60,
+-                "cac_active": false,
+-                "cac_seconds_left": 0
+-        }
+-}
+-```
+-
+-
+-## link_measurement_req
+-Initiate an 802.11k Link Measurement Request.
+-
+-### arguments
+-| Name | Type | Required | Description |
+-|---|---|---|---|
+-| addr | string | yes | client MAC address |
+-| tx-power-used | int32 | no | transmit power used to transmit the Link Measurement Request frame |
+-| tx-power-max | int32 | no | upper limit of transmit power to be used by the client |
+-
+-
+-## list_bans
+-List banned clients.
+-
+-### example
+-`ubus call hostapd.wl5-fb list_bans`
+-
+-### output
+-```json
+-{
+-        "clients": [
+-                "68:2f:67:8b:98:ed"
+-        ]
+-}
+-```
+-
+-
+-## notify_response
+-When enabled, hostapd will send a ubus notification and wait for a response before responding to various requests. This is used by e.g. usteer to make it possible to ignore probe requests.
+-
+-:warning: enabling this will cause hostapd to stop responding to probe requests unless a ubus subscriber responds to the ubus notifications.
+-
+-### arguments
+-| Name | Type | Required | Description |
+-|---|---|---|---|
+-| notify_response | int32 | yes | disable (0) or enable (!0) |
+-
+-### example
+-`ubus call hostapd.wl5-fb notify_response '{ "notify_response": 1 }'`
+-
+-## reload
+-Reload BSS configuration.
+-
+-:warning: this can cause problems for certain configurations:
+-
+-```
+-Mon May 16 16:09:08 2022 daemon.warn hostapd: Failed to check if DFS is required; ret=-1
+-Mon May 16 16:09:08 2022 daemon.warn hostapd: Failed to check if DFS is required; ret=-1
+-Mon May 16 16:09:08 2022 daemon.err hostapd: Wrong coupling between HT and VHT/HE channel setting
+-```
+-
+-### example
+-`ubus call hostapd.wl5-fb reload`
+-
+-
+-## rrm_beacon_req
+-Send a Beacon Measurement Request to a client.
+-
+-### arguments
+-| Name | Type | Required | Description |
+-|---|---|---|---|
+-| addr | string | yes | client MAC address |
+-| op_class | int32 | yes | the Regulatory Class for which this Measurement Request applies |
+-| channel | int32 | yes | channel to measure |
+-| duration | int32 | yes | compile Beacon Measurement Report after N TU |
+-| mode | int32 | yes | mode to be used for measurement (0: passive, 1: active, 2: beacon table) |
+-| bssid | string | no | filter BSSes in Beacon Measurement Report by BSSID |
+-| ssid | string | no | filter BSSes in Beacon Measurement Report by SSID|
+-
+-
+-## rrm_nr_get_own
+-Show Neighbor Report Element for this BSS.
+-
+-### example
+-`ubus call hostapd.wl5-fb rrm_nr_get_own`
+-
+-### output
+-```json
+-{
+-        "value": [
+-                "b6:a7:b9:cb:ee:bc",
+-                "fb",
+-                "b6a7b9cbeebcaf5900008095090603029b00"
+-        ]
+-}
+-```
+-
+-
+-## rrm_nr_list
+-Show Neighbor Report Elements for other BSSes in this ESS.
+-
+-### example
+-`ubus call hostapd.wl5-fb rrm_nr_list`
+-
+-### output
+-```json
+-{
+-        "list": [
+-                [
+-                        "b6:a7:b9:cb:ee:ba",
+-                        "fb",
+-                        "b6a7b9cbeebabf5900008064090603026a00"
+-                ]
+-        ]
+-}
+-```
+-
+-## rrm_nr_set
+-Set the Neighbor Report Elements. An element for the node on which this command is executed will always be added.
+-
+-### arguments
+-| Name | Type | Required | Description |
+-|---|---|---|---|
+-| list | array | yes | array of Neighbor Report Elements in the format of the rrm_nr_list output |
+-
+-### example
+-`ubus call hostapd.wl5-fb rrm_nr_set '{ "list": [ [ "b6:a7:b9:cb:ee:ba", "fb", "b6a7b9cbeebabf5900008064090603026a00" ] ] }'`
+-
+-
+-## set_vendor_elements
+-Configure Vendor-specific Information Elements for BSS.
+-
+-### arguments
+-| Name | Type | Required | Description |
+-|---|---|---|---|
+-| vendor_elements | string | yes | Vendor-specific Information Elements as hex string |
+-
+-### example
+-`ubus call hostapd.wl5-fb set_vendor_elements '{ "vendor_elements": "dd054857dd6662" }'`
+-
+-
+-## switch_chan
+-Initiate a channel switch.
+-
+-:warning: trying to switch to the channel that is currently in use will fail: `Command failed: Operation not supported`
+-
+-### arguments
+-| Name | Type | Required | Description |
+-|---|---|---|---|
+-| freq | int32 | yes | frequency in MHz to switch to |
+-| bcn_count | int32 | no | count in Beacon frames (TBTT) to perform the switch |
+-| center_freq1 | int32 | no | segment 0 center frequency in MHz (valid for HT and VHT) |
+-| center_freq2 | int32 | no | segment 1 center frequency in MHz (valid only for 80 MHz channel width and an 80+80 channel) |
+-| bandwidth | int32 | no | channel width to use |
+-| sec_channel_offset| int32 | no | secondary channel offset for HT40 (0 = disabled, 1 = HT40+, -1 = HT40-) |
+-| ht | bool | no | enable 802.11n |
+-| vht | bool | no | enable 802.11ac |
+-| he | bool | no | enable 802.11ax |
+-| block_tx | bool | no | block transmission during CSA period |
+-| csa_force | bool | no | restart the interface in case the CSA fails |
+-
+-## example
+-`ubus call hostapd.wl5-fb switch_chan '{ "freq": 5180, "bcn_count": 10, "center_freq1": 5210, "bandwidth": 80, "he": 1, "block_tx": 1, "csa_force": 0 }'`
+-
+-
+-## update_airtime
+-Set dynamic airtime weight for client.
+-
+-### arguments
+-| Name | Type | Required | Description |
+-|---|---|---|---|
+-| sta | string | yes | client MAC address |
+-| weight | int32 | yes | airtime weight |
+-
+-
+-## update_beacon
+-Force beacon frame content to be updated and to start beaconing on an interface that uses start_disabled=1.
+-
+-### example
+-`ubus call hostapd.wl5-fb update_beacon`
+-
+-
+-## wps_status
+-Get WPS status for BSS.
+-
+-### example
+-`ubus call hostapd.wl5-fb wps_status`
+-
+-### output
+-```json
+-{
+-        "pbc_status": "Disabled",
+-        "last_wps_result": "None"
+-}
+-```
+-
+-
+-## wps_cancel
+-Cancel WPS Push Button Configuration.
+-
+-### example
+-`ubus call hostapd.wl5-fb wps_cancel`
+-
+-
+-## wps_start
+-Start WPS Push Button Configuration.
+-
+-### example
+-`ubus call hostapd.wl5-fb wps_start`
+diff --git a/package/network/services/hostapd/files/dhcp-get-server.sh b/package/network/services/hostapd/files/dhcp-get-server.sh
+deleted file mode 100644
+index a1509ace2f..0000000000
+--- a/package/network/services/hostapd/files/dhcp-get-server.sh
++++ /dev/null
+@@ -1,2 +0,0 @@
+-#!/bin/sh
+-[ "$1" = bound ] && echo "$serverid"
+diff --git a/package/network/services/hostapd/files/hostapd-basic.config b/package/network/services/hostapd/files/hostapd-basic.config
+deleted file mode 100644
+index 3d19d8f902..0000000000
+--- a/package/network/services/hostapd/files/hostapd-basic.config
++++ /dev/null
+@@ -1,404 +0,0 @@
+-# Example hostapd build time configuration
+-#
+-# This file lists the configuration options that are used when building the
+-# hostapd binary. All lines starting with # are ignored. Configuration option
+-# lines must be commented out complete, if they are not to be included, i.e.,
+-# just setting VARIABLE=n is not disabling that variable.
+-#
+-# This file is included in Makefile, so variables like CFLAGS and LIBS can also
+-# be modified from here. In most cass, these lines should use += in order not
+-# to override previous values of the variables.
+-
+-# Driver interface for Host AP driver
+-#CONFIG_DRIVER_HOSTAP=y
+-
+-# Driver interface for wired authenticator
+-CONFIG_DRIVER_WIRED=y
+-
+-# Driver interface for drivers using the nl80211 kernel interface
+-CONFIG_DRIVER_NL80211=y
+-
+-# QCA vendor extensions to nl80211
+-#CONFIG_DRIVER_NL80211_QCA=y
+-
+-# driver_nl80211.c requires libnl. If you are compiling it yourself
+-# you may need to point hostapd to your version of libnl.
+-#
+-#CFLAGS += -I$<path to libnl include files>
+-#LIBS += -L$<path to libnl library files>
+-
+-# Use libnl v2.0 (or 3.0) libraries.
+-#CONFIG_LIBNL20=y
+-
+-# Use libnl 3.2 libraries (if this is selected, CONFIG_LIBNL20 is ignored)
+-#CONFIG_LIBNL32=y
+-
+-
+-# Driver interface for FreeBSD net80211 layer (e.g., Atheros driver)
+-#CONFIG_DRIVER_BSD=y
+-#CFLAGS += -I/usr/local/include
+-#LIBS += -L/usr/local/lib
+-#LIBS_p += -L/usr/local/lib
+-#LIBS_c += -L/usr/local/lib
+-
+-# Driver interface for no driver (e.g., RADIUS server only)
+-#CONFIG_DRIVER_NONE=y
+-
+-# IEEE 802.11F/IAPP
+-#CONFIG_IAPP=y
+-
+-# WPA2/IEEE 802.11i RSN pre-authentication
+-CONFIG_RSN_PREAUTH=y
+-
+-# IEEE 802.11w (management frame protection)
+-#CONFIG_IEEE80211W=y
+-
+-# Support Operating Channel Validation
+-CONFIG_OCV=y
+-
+-# Integrated EAP server
+-#CONFIG_EAP=y
+-
+-# EAP Re-authentication Protocol (ERP) in integrated EAP server
+-#CONFIG_ERP=y
+-
+-# EAP-MD5 for the integrated EAP server
+-#CONFIG_EAP_MD5=y
+-
+-# EAP-TLS for the integrated EAP server
+-#CONFIG_EAP_TLS=y
+-
+-# EAP-MSCHAPv2 for the integrated EAP server
+-#CONFIG_EAP_MSCHAPV2=y
+-
+-# EAP-PEAP for the integrated EAP server
+-#CONFIG_EAP_PEAP=y
+-
+-# EAP-GTC for the integrated EAP server
+-#CONFIG_EAP_GTC=y
+-
+-# EAP-TTLS for the integrated EAP server
+-#CONFIG_EAP_TTLS=y
+-
+-# EAP-SIM for the integrated EAP server
+-#CONFIG_EAP_SIM=y
+-
+-# EAP-AKA for the integrated EAP server
+-#CONFIG_EAP_AKA=y
+-
+-# EAP-AKA' for the integrated EAP server
+-# This requires CONFIG_EAP_AKA to be enabled, too.
+-#CONFIG_EAP_AKA_PRIME=y
+-
+-# EAP-PAX for the integrated EAP server
+-#CONFIG_EAP_PAX=y
+-
+-# EAP-PSK for the integrated EAP server (this is _not_ needed for WPA-PSK)
+-#CONFIG_EAP_PSK=y
+-
+-# EAP-pwd for the integrated EAP server (secure authentication with a password)
+-#CONFIG_EAP_PWD=y
+-
+-# EAP-SAKE for the integrated EAP server
+-#CONFIG_EAP_SAKE=y
+-
+-# EAP-GPSK for the integrated EAP server
+-#CONFIG_EAP_GPSK=y
+-# Include support for optional SHA256 cipher suite in EAP-GPSK
+-#CONFIG_EAP_GPSK_SHA256=y
+-
+-# EAP-FAST for the integrated EAP server
+-#CONFIG_EAP_FAST=y
+-
+-# EAP-TEAP for the integrated EAP server
+-# Note: The current EAP-TEAP implementation is experimental and should not be
+-# enabled for production use. The IETF RFC 7170 that defines EAP-TEAP has number
+-# of conflicting statements and missing details and the implementation has
+-# vendor specific workarounds for those and as such, may not interoperate with
+-# any other implementation. This should not be used for anything else than
+-# experimentation and interoperability testing until those issues has been
+-# resolved.
+-#CONFIG_EAP_TEAP=y
+-
+-# Wi-Fi Protected Setup (WPS)
+-#CONFIG_WPS=y
+-# Enable UPnP support for external WPS Registrars
+-#CONFIG_WPS_UPNP=y
+-# Enable WPS support with NFC config method
+-#CONFIG_WPS_NFC=y
+-
+-# EAP-IKEv2
+-#CONFIG_EAP_IKEV2=y
+-
+-# Trusted Network Connect (EAP-TNC)
+-#CONFIG_EAP_TNC=y
+-
+-# EAP-EKE for the integrated EAP server
+-#CONFIG_EAP_EKE=y
+-
+-# PKCS#12 (PFX) support (used to read private key and certificate file from
+-# a file that usually has extension .p12 or .pfx)
+-#CONFIG_PKCS12=y
+-
+-# RADIUS authentication server. This provides access to the integrated EAP
+-# server from external hosts using RADIUS.
+-#CONFIG_RADIUS_SERVER=y
+-
+-# Build IPv6 support for RADIUS operations
+-#CONFIG_IPV6=y
+-
+-# IEEE Std 802.11r-2008 (Fast BSS Transition)
+-CONFIG_IEEE80211R=y
+-
+-# Use the hostapd's IEEE 802.11 authentication (ACL), but without
+-# the IEEE 802.11 Management capability (e.g., FreeBSD/net80211)
+-#CONFIG_DRIVER_RADIUS_ACL=y
+-
+-# IEEE 802.11n (High Throughput) support
+-CONFIG_IEEE80211N=y
+-
+-# Wireless Network Management (IEEE Std 802.11v-2011)
+-# Note: This is experimental and not complete implementation.
+-#CONFIG_WNM=y
+-
+-# IEEE 802.11ac (Very High Throughput) support
+-CONFIG_IEEE80211AC=y
+-
+-# IEEE 802.11ax HE support
+-# Note: This is experimental and work in progress. The definitions are still
+-# subject to change and this should not be expected to interoperate with the
+-# final IEEE 802.11ax version.
+-#CONFIG_IEEE80211AX=y
+-
+-# Remove debugging code that is printing out debug messages to stdout.
+-# This can be used to reduce the size of the hostapd considerably if debugging
+-# code is not needed.
+-#CONFIG_NO_STDOUT_DEBUG=y
+-
+-# Add support for writing debug log to a file: -f /tmp/hostapd.log
+-# Disabled by default.
+-#CONFIG_DEBUG_FILE=y
+-
+-# Send debug messages to syslog instead of stdout
+-CONFIG_DEBUG_SYSLOG=y
+-
+-# Add support for sending all debug messages (regardless of debug verbosity)
+-# to the Linux kernel tracing facility. This helps debug the entire stack by
+-# making it easy to record everything happening from the driver up into the
+-# same file, e.g., using trace-cmd.
+-#CONFIG_DEBUG_LINUX_TRACING=y
+-
+-# Remove support for RADIUS accounting
+-CONFIG_NO_ACCOUNTING=y
+-
+-# Remove support for RADIUS
+-CONFIG_NO_RADIUS=y
+-
+-# Remove support for VLANs
+-#CONFIG_NO_VLAN=y
+-
+-# Enable support for fully dynamic VLANs. This enables hostapd to
+-# automatically create bridge and VLAN interfaces if necessary.
+-#CONFIG_FULL_DYNAMIC_VLAN=y
+-
+-# Use netlink-based kernel API for VLAN operations instead of ioctl()
+-# Note: This requires libnl 3.1 or newer.
+-#CONFIG_VLAN_NETLINK=y
+-
+-# Remove support for dumping internal state through control interface commands
+-# This can be used to reduce binary size at the cost of disabling a debugging
+-# option.
+-CONFIG_NO_DUMP_STATE=y
+-
+-# Enable tracing code for developer debugging
+-# This tracks use of memory allocations and other registrations and reports
+-# incorrect use with a backtrace of call (or allocation) location.
+-#CONFIG_WPA_TRACE=y
+-# For BSD, comment out these.
+-#LIBS += -lexecinfo
+-#LIBS_p += -lexecinfo
+-#LIBS_c += -lexecinfo
+-
+-# Use libbfd to get more details for developer debugging
+-# This enables use of libbfd to get more detailed symbols for the backtraces
+-# generated by CONFIG_WPA_TRACE=y.
+-#CONFIG_WPA_TRACE_BFD=y
+-# For BSD, comment out these.
+-#LIBS += -lbfd -liberty -lz
+-#LIBS_p += -lbfd -liberty -lz
+-#LIBS_c += -lbfd -liberty -lz
+-
+-# hostapd depends on strong random number generation being available from the
+-# operating system. os_get_random() function is used to fetch random data when
+-# needed, e.g., for key generation. On Linux and BSD systems, this works by
+-# reading /dev/urandom. It should be noted that the OS entropy pool needs to be
+-# properly initialized before hostapd is started. This is important especially
+-# on embedded devices that do not have a hardware random number generator and
+-# may by default start up with minimal entropy available for random number
+-# generation.
+-#
+-# As a safety net, hostapd is by default trying to internally collect
+-# additional entropy for generating random data to mix in with the data
+-# fetched from the OS. This by itself is not considered to be very strong, but
+-# it may help in cases where the system pool is not initialized properly.
+-# However, it is very strongly recommended that the system pool is initialized
+-# with enough entropy either by using hardware assisted random number
+-# generator or by storing state over device reboots.
+-#
+-# hostapd can be configured to maintain its own entropy store over restarts to
+-# enhance random number generation. This is not perfect, but it is much more
+-# secure than using the same sequence of random numbers after every reboot.
+-# This can be enabled with -e<entropy file> command line option. The specified
+-# file needs to be readable and writable by hostapd.
+-#
+-# If the os_get_random() is known to provide strong random data (e.g., on
+-# Linux/BSD, the board in question is known to have reliable source of random
+-# data from /dev/urandom), the internal hostapd random pool can be disabled.
+-# This will save some in binary size and CPU use. However, this should only be
+-# considered for builds that are known to be used on devices that meet the
+-# requirements described above.
+-CONFIG_NO_RANDOM_POOL=y
+-
+-# Should we attempt to use the getrandom(2) call that provides more reliable
+-# yet secure randomness source than /dev/random on Linux 3.17 and newer.
+-# Requires glibc 2.25 to build, falls back to /dev/random if unavailable.
+-CONFIG_GETRANDOM=y
+-
+-# Should we use poll instead of select? Select is used by default.
+-#CONFIG_ELOOP_POLL=y
+-
+-# Should we use epoll instead of select? Select is used by default.
+-CONFIG_ELOOP_EPOLL=y
+-
+-# Should we use kqueue instead of select? Select is used by default.
+-#CONFIG_ELOOP_KQUEUE=y
+-
+-# Select TLS implementation
+-# openssl = OpenSSL (default)
+-# gnutls = GnuTLS
+-# internal = Internal TLSv1 implementation (experimental)
+-# linux = Linux kernel AF_ALG and internal TLSv1 implementation (experimental)
+-# none = Empty template
+-CONFIG_TLS=internal
+-
+-# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.1)
+-# can be enabled to get a stronger construction of messages when block ciphers
+-# are used.
+-#CONFIG_TLSV11=y
+-
+-# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.2)
+-# can be enabled to enable use of stronger crypto algorithms.
+-#CONFIG_TLSV12=y
+-
+-# Select which ciphers to use by default with OpenSSL if the user does not
+-# specify them.
+-#CONFIG_TLS_DEFAULT_CIPHERS="DEFAULT:!EXP:!LOW"
+-
+-# If CONFIG_TLS=internal is used, additional library and include paths are
+-# needed for LibTomMath. Alternatively, an integrated, minimal version of
+-# LibTomMath can be used. See beginning of libtommath.c for details on benefits
+-# and drawbacks of this option.
+-#CONFIG_INTERNAL_LIBTOMMATH=y
+-#ifndef CONFIG_INTERNAL_LIBTOMMATH
+-#LTM_PATH=/usr/src/libtommath-0.39
+-#CFLAGS += -I$(LTM_PATH)
+-#LIBS += -L$(LTM_PATH)
+-#LIBS_p += -L$(LTM_PATH)
+-#endif
+-# At the cost of about 4 kB of additional binary size, the internal LibTomMath
+-# can be configured to include faster routines for exptmod, sqr, and div to
+-# speed up DH and RSA calculation considerably
+-#CONFIG_INTERNAL_LIBTOMMATH_FAST=y
+-
+-# Interworking (IEEE 802.11u)
+-# This can be used to enable functionality to improve interworking with
+-# external networks.
+-#CONFIG_INTERWORKING=y
+-
+-# Hotspot 2.0
+-#CONFIG_HS20=y
+-
+-# Enable SQLite database support in hlr_auc_gw, EAP-SIM DB, and eap_user_file
+-#CONFIG_SQLITE=y
+-
+-# Enable Fast Session Transfer (FST)
+-#CONFIG_FST=y
+-
+-# Enable CLI commands for FST testing
+-#CONFIG_FST_TEST=y
+-
+-# Testing options
+-# This can be used to enable some testing options (see also the example
+-# configuration file) that are really useful only for testing clients that
+-# connect to this hostapd. These options allow, for example, to drop a
+-# certain percentage of probe requests or auth/(re)assoc frames.
+-#
+-#CONFIG_TESTING_OPTIONS=y
+-
+-# Automatic Channel Selection
+-# This will allow hostapd to pick the channel automatically when channel is set
+-# to "acs_survey" or "0". Eventually, other ACS algorithms can be added in
+-# similar way.
+-#
+-# Automatic selection is currently only done through initialization, later on
+-# we hope to do background checks to keep us moving to more ideal channels as
+-# time goes by. ACS is currently only supported through the nl80211 driver and
+-# your driver must have survey dump capability that is filled by the driver
+-# during scanning.
+-#
+-# You can customize the ACS survey algorithm with the hostapd.conf variable
+-# acs_num_scans.
+-#
+-# Supported ACS drivers:
+-# * ath9k
+-# * ath5k
+-# * ath10k
+-#
+-# For more details refer to:
+-# http://wireless.kernel.org/en/users/Documentation/acs
+-#
+-#CONFIG_ACS=y
+-
+-# Multiband Operation support
+-# These extentions facilitate efficient use of multiple frequency bands
+-# available to the AP and the devices that may associate with it.
+-#CONFIG_MBO=y
+-
+-# Client Taxonomy
+-# Has the AP retain the Probe Request and (Re)Association Request frames from
+-# a client, from which a signature can be produced which can identify the model
+-# of client device like "Nexus 6P" or "iPhone 5s".
+-#CONFIG_TAXONOMY=y
+-
+-# Fast Initial Link Setup (FILS) (IEEE 802.11ai)
+-#CONFIG_FILS=y
+-# FILS shared key authentication with PFS
+-#CONFIG_FILS_SK_PFS=y
+-
+-# Include internal line edit mode in hostapd_cli. This can be used to provide
+-# limited command line editing and history support.
+-#CONFIG_WPA_CLI_EDIT=y
+-
+-# Opportunistic Wireless Encryption (OWE)
+-# Experimental implementation of draft-harkins-owe-07.txt
+-#CONFIG_OWE=y
+-
+-# Airtime policy support
+-CONFIG_AIRTIME_POLICY=y
+-
+-# Proxy ARP support
+-#CONFIG_PROXYARP=y
+-
+-# Override default value for the wpa_disable_eapol_key_retries configuration
+-# parameter. See that parameter in hostapd.conf for more details.
+-#CFLAGS += -DDEFAULT_WPA_DISABLE_EAPOL_KEY_RETRIES=1
+-
+-# uBus IPC/RPC System
+-# Services can connect to the bus and provide methods
+-# that can be called by other services or clients.
+-CONFIG_UBUS=y
+-
+-# OpenWrt patch 380-disable-ctrl-iface-mib.patch
+-# leads to the MIB only being compiled in if
+-# CONFIG_CTRL_IFACE_MIB is enabled.
+-#CONFIG_CTRL_IFACE_MIB=y
+diff --git a/package/network/services/hostapd/files/hostapd-full.config b/package/network/services/hostapd/files/hostapd-full.config
+deleted file mode 100644
+index 9076ebc44f..0000000000
+--- a/package/network/services/hostapd/files/hostapd-full.config
++++ /dev/null
+@@ -1,404 +0,0 @@
+-# Example hostapd build time configuration
+-#
+-# This file lists the configuration options that are used when building the
+-# hostapd binary. All lines starting with # are ignored. Configuration option
+-# lines must be commented out complete, if they are not to be included, i.e.,
+-# just setting VARIABLE=n is not disabling that variable.
+-#
+-# This file is included in Makefile, so variables like CFLAGS and LIBS can also
+-# be modified from here. In most cass, these lines should use += in order not
+-# to override previous values of the variables.
+-
+-# Driver interface for Host AP driver
+-#CONFIG_DRIVER_HOSTAP=y
+-
+-# Driver interface for wired authenticator
+-CONFIG_DRIVER_WIRED=y
+-
+-# Driver interface for drivers using the nl80211 kernel interface
+-CONFIG_DRIVER_NL80211=y
+-
+-# QCA vendor extensions to nl80211
+-#CONFIG_DRIVER_NL80211_QCA=y
+-
+-# driver_nl80211.c requires libnl. If you are compiling it yourself
+-# you may need to point hostapd to your version of libnl.
+-#
+-#CFLAGS += -I$<path to libnl include files>
+-#LIBS += -L$<path to libnl library files>
+-
+-# Use libnl v2.0 (or 3.0) libraries.
+-#CONFIG_LIBNL20=y
+-
+-# Use libnl 3.2 libraries (if this is selected, CONFIG_LIBNL20 is ignored)
+-#CONFIG_LIBNL32=y
+-
+-
+-# Driver interface for FreeBSD net80211 layer (e.g., Atheros driver)
+-#CONFIG_DRIVER_BSD=y
+-#CFLAGS += -I/usr/local/include
+-#LIBS += -L/usr/local/lib
+-#LIBS_p += -L/usr/local/lib
+-#LIBS_c += -L/usr/local/lib
+-
+-# Driver interface for no driver (e.g., RADIUS server only)
+-#CONFIG_DRIVER_NONE=y
+-
+-# IEEE 802.11F/IAPP
+-CONFIG_IAPP=y
+-
+-# WPA2/IEEE 802.11i RSN pre-authentication
+-CONFIG_RSN_PREAUTH=y
+-
+-# IEEE 802.11w (management frame protection)
+-#CONFIG_IEEE80211W=y
+-
+-# Support Operating Channel Validation
+-CONFIG_OCV=y
+-
+-# Integrated EAP server
+-CONFIG_EAP=y
+-
+-# EAP Re-authentication Protocol (ERP) in integrated EAP server
+-CONFIG_ERP=y
+-
+-# EAP-MD5 for the integrated EAP server
+-CONFIG_EAP_MD5=y
+-
+-# EAP-TLS for the integrated EAP server
+-CONFIG_EAP_TLS=y
+-
+-# EAP-MSCHAPv2 for the integrated EAP server
+-CONFIG_EAP_MSCHAPV2=y
+-
+-# EAP-PEAP for the integrated EAP server
+-CONFIG_EAP_PEAP=y
+-
+-# EAP-GTC for the integrated EAP server
+-CONFIG_EAP_GTC=y
+-
+-# EAP-TTLS for the integrated EAP server
+-CONFIG_EAP_TTLS=y
+-
+-# EAP-SIM for the integrated EAP server
+-#CONFIG_EAP_SIM=y
+-
+-# EAP-AKA for the integrated EAP server
+-#CONFIG_EAP_AKA=y
+-
+-# EAP-AKA' for the integrated EAP server
+-# This requires CONFIG_EAP_AKA to be enabled, too.
+-#CONFIG_EAP_AKA_PRIME=y
+-
+-# EAP-PAX for the integrated EAP server
+-#CONFIG_EAP_PAX=y
+-
+-# EAP-PSK for the integrated EAP server (this is _not_ needed for WPA-PSK)
+-#CONFIG_EAP_PSK=y
+-
+-# EAP-pwd for the integrated EAP server (secure authentication with a password)
+-#CONFIG_EAP_PWD=y
+-
+-# EAP-SAKE for the integrated EAP server
+-#CONFIG_EAP_SAKE=y
+-
+-# EAP-GPSK for the integrated EAP server
+-#CONFIG_EAP_GPSK=y
+-# Include support for optional SHA256 cipher suite in EAP-GPSK
+-#CONFIG_EAP_GPSK_SHA256=y
+-
+-# EAP-FAST for the integrated EAP server
+-CONFIG_EAP_FAST=y
+-
+-# EAP-TEAP for the integrated EAP server
+-# Note: The current EAP-TEAP implementation is experimental and should not be
+-# enabled for production use. The IETF RFC 7170 that defines EAP-TEAP has number
+-# of conflicting statements and missing details and the implementation has
+-# vendor specific workarounds for those and as such, may not interoperate with
+-# any other implementation. This should not be used for anything else than
+-# experimentation and interoperability testing until those issues has been
+-# resolved.
+-#CONFIG_EAP_TEAP=y
+-
+-# Wi-Fi Protected Setup (WPS)
+-CONFIG_WPS=y
+-# Enable UPnP support for external WPS Registrars
+-#CONFIG_WPS_UPNP=y
+-# Enable WPS support with NFC config method
+-#CONFIG_WPS_NFC=y
+-
+-# EAP-IKEv2
+-#CONFIG_EAP_IKEV2=y
+-
+-# Trusted Network Connect (EAP-TNC)
+-#CONFIG_EAP_TNC=y
+-
+-# EAP-EKE for the integrated EAP server
+-#CONFIG_EAP_EKE=y
+-
+-# PKCS#12 (PFX) support (used to read private key and certificate file from
+-# a file that usually has extension .p12 or .pfx)
+-CONFIG_PKCS12=y
+-
+-# RADIUS authentication server. This provides access to the integrated EAP
+-# server from external hosts using RADIUS.
+-CONFIG_RADIUS_SERVER=y
+-
+-# Build IPv6 support for RADIUS operations
+-CONFIG_IPV6=y
+-
+-# IEEE Std 802.11r-2008 (Fast BSS Transition)
+-CONFIG_IEEE80211R=y
+-
+-# Use the hostapd's IEEE 802.11 authentication (ACL), but without
+-# the IEEE 802.11 Management capability (e.g., FreeBSD/net80211)
+-#CONFIG_DRIVER_RADIUS_ACL=y
+-
+-# IEEE 802.11n (High Throughput) support
+-CONFIG_IEEE80211N=y
+-
+-# Wireless Network Management (IEEE Std 802.11v-2011)
+-# Note: This is experimental and not complete implementation.
+-CONFIG_WNM=y
+-
+-# IEEE 802.11ac (Very High Throughput) support
+-CONFIG_IEEE80211AC=y
+-
+-# IEEE 802.11ax HE support
+-# Note: This is experimental and work in progress. The definitions are still
+-# subject to change and this should not be expected to interoperate with the
+-# final IEEE 802.11ax version.
+-#CONFIG_IEEE80211AX=y
+-
+-# Remove debugging code that is printing out debug messages to stdout.
+-# This can be used to reduce the size of the hostapd considerably if debugging
+-# code is not needed.
+-#CONFIG_NO_STDOUT_DEBUG=y
+-
+-# Add support for writing debug log to a file: -f /tmp/hostapd.log
+-# Disabled by default.
+-#CONFIG_DEBUG_FILE=y
+-
+-# Send debug messages to syslog instead of stdout
+-CONFIG_DEBUG_SYSLOG=y
+-
+-# Add support for sending all debug messages (regardless of debug verbosity)
+-# to the Linux kernel tracing facility. This helps debug the entire stack by
+-# making it easy to record everything happening from the driver up into the
+-# same file, e.g., using trace-cmd.
+-#CONFIG_DEBUG_LINUX_TRACING=y
+-
+-# Remove support for RADIUS accounting
+-#CONFIG_NO_ACCOUNTING=y
+-
+-# Remove support for RADIUS
+-#CONFIG_NO_RADIUS=y
+-
+-# Remove support for VLANs
+-#CONFIG_NO_VLAN=y
+-
+-# Enable support for fully dynamic VLANs. This enables hostapd to
+-# automatically create bridge and VLAN interfaces if necessary.
+-CONFIG_FULL_DYNAMIC_VLAN=y
+-
+-# Use netlink-based kernel API for VLAN operations instead of ioctl()
+-# Note: This requires libnl 3.1 or newer.
+-#CONFIG_VLAN_NETLINK=y
+-
+-# Remove support for dumping internal state through control interface commands
+-# This can be used to reduce binary size at the cost of disabling a debugging
+-# option.
+-CONFIG_NO_DUMP_STATE=y
+-
+-# Enable tracing code for developer debugging
+-# This tracks use of memory allocations and other registrations and reports
+-# incorrect use with a backtrace of call (or allocation) location.
+-#CONFIG_WPA_TRACE=y
+-# For BSD, comment out these.
+-#LIBS += -lexecinfo
+-#LIBS_p += -lexecinfo
+-#LIBS_c += -lexecinfo
+-
+-# Use libbfd to get more details for developer debugging
+-# This enables use of libbfd to get more detailed symbols for the backtraces
+-# generated by CONFIG_WPA_TRACE=y.
+-#CONFIG_WPA_TRACE_BFD=y
+-# For BSD, comment out these.
+-#LIBS += -lbfd -liberty -lz
+-#LIBS_p += -lbfd -liberty -lz
+-#LIBS_c += -lbfd -liberty -lz
+-
+-# hostapd depends on strong random number generation being available from the
+-# operating system. os_get_random() function is used to fetch random data when
+-# needed, e.g., for key generation. On Linux and BSD systems, this works by
+-# reading /dev/urandom. It should be noted that the OS entropy pool needs to be
+-# properly initialized before hostapd is started. This is important especially
+-# on embedded devices that do not have a hardware random number generator and
+-# may by default start up with minimal entropy available for random number
+-# generation.
+-#
+-# As a safety net, hostapd is by default trying to internally collect
+-# additional entropy for generating random data to mix in with the data
+-# fetched from the OS. This by itself is not considered to be very strong, but
+-# it may help in cases where the system pool is not initialized properly.
+-# However, it is very strongly recommended that the system pool is initialized
+-# with enough entropy either by using hardware assisted random number
+-# generator or by storing state over device reboots.
+-#
+-# hostapd can be configured to maintain its own entropy store over restarts to
+-# enhance random number generation. This is not perfect, but it is much more
+-# secure than using the same sequence of random numbers after every reboot.
+-# This can be enabled with -e<entropy file> command line option. The specified
+-# file needs to be readable and writable by hostapd.
+-#
+-# If the os_get_random() is known to provide strong random data (e.g., on
+-# Linux/BSD, the board in question is known to have reliable source of random
+-# data from /dev/urandom), the internal hostapd random pool can be disabled.
+-# This will save some in binary size and CPU use. However, this should only be
+-# considered for builds that are known to be used on devices that meet the
+-# requirements described above.
+-CONFIG_NO_RANDOM_POOL=y
+-
+-# Should we attempt to use the getrandom(2) call that provides more reliable
+-# yet secure randomness source than /dev/random on Linux 3.17 and newer.
+-# Requires glibc 2.25 to build, falls back to /dev/random if unavailable.
+-CONFIG_GETRANDOM=y
+-
+-# Should we use poll instead of select? Select is used by default.
+-#CONFIG_ELOOP_POLL=y
+-
+-# Should we use epoll instead of select? Select is used by default.
+-CONFIG_ELOOP_EPOLL=y
+-
+-# Should we use kqueue instead of select? Select is used by default.
+-#CONFIG_ELOOP_KQUEUE=y
+-
+-# Select TLS implementation
+-# openssl = OpenSSL (default)
+-# gnutls = GnuTLS
+-# internal = Internal TLSv1 implementation (experimental)
+-# linux = Linux kernel AF_ALG and internal TLSv1 implementation (experimental)
+-# none = Empty template
+-CONFIG_TLS=internal
+-
+-# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.1)
+-# can be enabled to get a stronger construction of messages when block ciphers
+-# are used.
+-#CONFIG_TLSV11=y
+-
+-# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.2)
+-# can be enabled to enable use of stronger crypto algorithms.
+-#CONFIG_TLSV12=y
+-
+-# Select which ciphers to use by default with OpenSSL if the user does not
+-# specify them.
+-#CONFIG_TLS_DEFAULT_CIPHERS="DEFAULT:!EXP:!LOW"
+-
+-# If CONFIG_TLS=internal is used, additional library and include paths are
+-# needed for LibTomMath. Alternatively, an integrated, minimal version of
+-# LibTomMath can be used. See beginning of libtommath.c for details on benefits
+-# and drawbacks of this option.
+-CONFIG_INTERNAL_LIBTOMMATH=y
+-#ifndef CONFIG_INTERNAL_LIBTOMMATH
+-#LTM_PATH=/usr/src/libtommath-0.39
+-#CFLAGS += -I$(LTM_PATH)
+-#LIBS += -L$(LTM_PATH)
+-#LIBS_p += -L$(LTM_PATH)
+-#endif
+-# At the cost of about 4 kB of additional binary size, the internal LibTomMath
+-# can be configured to include faster routines for exptmod, sqr, and div to
+-# speed up DH and RSA calculation considerably
+-#CONFIG_INTERNAL_LIBTOMMATH_FAST=y
+-
+-# Interworking (IEEE 802.11u)
+-# This can be used to enable functionality to improve interworking with
+-# external networks.
+-CONFIG_INTERWORKING=y
+-
+-# Hotspot 2.0
+-CONFIG_HS20=y
+-
+-# Enable SQLite database support in hlr_auc_gw, EAP-SIM DB, and eap_user_file
+-#CONFIG_SQLITE=y
+-
+-# Enable Fast Session Transfer (FST)
+-#CONFIG_FST=y
+-
+-# Enable CLI commands for FST testing
+-#CONFIG_FST_TEST=y
+-
+-# Testing options
+-# This can be used to enable some testing options (see also the example
+-# configuration file) that are really useful only for testing clients that
+-# connect to this hostapd. These options allow, for example, to drop a
+-# certain percentage of probe requests or auth/(re)assoc frames.
+-#
+-#CONFIG_TESTING_OPTIONS=y
+-
+-# Automatic Channel Selection
+-# This will allow hostapd to pick the channel automatically when channel is set
+-# to "acs_survey" or "0". Eventually, other ACS algorithms can be added in
+-# similar way.
+-#
+-# Automatic selection is currently only done through initialization, later on
+-# we hope to do background checks to keep us moving to more ideal channels as
+-# time goes by. ACS is currently only supported through the nl80211 driver and
+-# your driver must have survey dump capability that is filled by the driver
+-# during scanning.
+-#
+-# You can customize the ACS survey algorithm with the hostapd.conf variable
+-# acs_num_scans.
+-#
+-# Supported ACS drivers:
+-# * ath9k
+-# * ath5k
+-# * ath10k
+-#
+-# For more details refer to:
+-# http://wireless.kernel.org/en/users/Documentation/acs
+-#
+-#CONFIG_ACS=y
+-
+-# Multiband Operation support
+-# These extentions facilitate efficient use of multiple frequency bands
+-# available to the AP and the devices that may associate with it.
+-#CONFIG_MBO=y
+-
+-# Client Taxonomy
+-# Has the AP retain the Probe Request and (Re)Association Request frames from
+-# a client, from which a signature can be produced which can identify the model
+-# of client device like "Nexus 6P" or "iPhone 5s".
+-CONFIG_TAXONOMY=y
+-
+-# Fast Initial Link Setup (FILS) (IEEE 802.11ai)
+-#CONFIG_FILS=y
+-# FILS shared key authentication with PFS
+-#CONFIG_FILS_SK_PFS=y
+-
+-# Include internal line edit mode in hostapd_cli. This can be used to provide
+-# limited command line editing and history support.
+-#CONFIG_WPA_CLI_EDIT=y
+-
+-# Opportunistic Wireless Encryption (OWE)
+-# Experimental implementation of draft-harkins-owe-07.txt
+-#CONFIG_OWE=y
+-
+-# Airtime policy support
+-CONFIG_AIRTIME_POLICY=y
+-
+-# Proxy ARP support
+-CONFIG_PROXYARP=y
+-
+-# Override default value for the wpa_disable_eapol_key_retries configuration
+-# parameter. See that parameter in hostapd.conf for more details.
+-#CFLAGS += -DDEFAULT_WPA_DISABLE_EAPOL_KEY_RETRIES=1
+-
+-# uBus IPC/RPC System
+-# Services can connect to the bus and provide methods
+-# that can be called by other services or clients.
+-CONFIG_UBUS=y
+-
+-# OpenWrt patch 380-disable-ctrl-iface-mib.patch
+-# leads to the MIB only being compiled in if
+-# CONFIG_CTRL_IFACE_MIB is enabled.
+-CONFIG_CTRL_IFACE_MIB=y
+diff --git a/package/network/services/hostapd/files/hostapd-mini.config b/package/network/services/hostapd/files/hostapd-mini.config
+deleted file mode 100644
+index f2ed071ec0..0000000000
+--- a/package/network/services/hostapd/files/hostapd-mini.config
++++ /dev/null
+@@ -1,404 +0,0 @@
+-# Example hostapd build time configuration
+-#
+-# This file lists the configuration options that are used when building the
+-# hostapd binary. All lines starting with # are ignored. Configuration option
+-# lines must be commented out complete, if they are not to be included, i.e.,
+-# just setting VARIABLE=n is not disabling that variable.
+-#
+-# This file is included in Makefile, so variables like CFLAGS and LIBS can also
+-# be modified from here. In most cass, these lines should use += in order not
+-# to override previous values of the variables.
+-
+-# Driver interface for Host AP driver
+-#CONFIG_DRIVER_HOSTAP=y
+-
+-# Driver interface for wired authenticator
+-CONFIG_DRIVER_WIRED=y
+-
+-# Driver interface for drivers using the nl80211 kernel interface
+-CONFIG_DRIVER_NL80211=y
+-
+-# QCA vendor extensions to nl80211
+-#CONFIG_DRIVER_NL80211_QCA=y
+-
+-# driver_nl80211.c requires libnl. If you are compiling it yourself
+-# you may need to point hostapd to your version of libnl.
+-#
+-#CFLAGS += -I$<path to libnl include files>
+-#LIBS += -L$<path to libnl library files>
+-
+-# Use libnl v2.0 (or 3.0) libraries.
+-#CONFIG_LIBNL20=y
+-
+-# Use libnl 3.2 libraries (if this is selected, CONFIG_LIBNL20 is ignored)
+-#CONFIG_LIBNL32=y
+-
+-
+-# Driver interface for FreeBSD net80211 layer (e.g., Atheros driver)
+-#CONFIG_DRIVER_BSD=y
+-#CFLAGS += -I/usr/local/include
+-#LIBS += -L/usr/local/lib
+-#LIBS_p += -L/usr/local/lib
+-#LIBS_c += -L/usr/local/lib
+-
+-# Driver interface for no driver (e.g., RADIUS server only)
+-#CONFIG_DRIVER_NONE=y
+-
+-# IEEE 802.11F/IAPP
+-#CONFIG_IAPP=y
+-
+-# WPA2/IEEE 802.11i RSN pre-authentication
+-CONFIG_RSN_PREAUTH=y
+-
+-# IEEE 802.11w (management frame protection)
+-#CONFIG_IEEE80211W=y
+-
+-# Support Operating Channel Validation
+-#CONFIG_OCV=y
+-
+-# Integrated EAP server
+-#CONFIG_EAP=y
+-
+-# EAP Re-authentication Protocol (ERP) in integrated EAP server
+-#CONFIG_ERP=y
+-
+-# EAP-MD5 for the integrated EAP server
+-#CONFIG_EAP_MD5=y
+-
+-# EAP-TLS for the integrated EAP server
+-#CONFIG_EAP_TLS=y
+-
+-# EAP-MSCHAPv2 for the integrated EAP server
+-#CONFIG_EAP_MSCHAPV2=y
+-
+-# EAP-PEAP for the integrated EAP server
+-#CONFIG_EAP_PEAP=y
+-
+-# EAP-GTC for the integrated EAP server
+-#CONFIG_EAP_GTC=y
+-
+-# EAP-TTLS for the integrated EAP server
+-#CONFIG_EAP_TTLS=y
+-
+-# EAP-SIM for the integrated EAP server
+-#CONFIG_EAP_SIM=y
+-
+-# EAP-AKA for the integrated EAP server
+-#CONFIG_EAP_AKA=y
+-
+-# EAP-AKA' for the integrated EAP server
+-# This requires CONFIG_EAP_AKA to be enabled, too.
+-#CONFIG_EAP_AKA_PRIME=y
+-
+-# EAP-PAX for the integrated EAP server
+-#CONFIG_EAP_PAX=y
+-
+-# EAP-PSK for the integrated EAP server (this is _not_ needed for WPA-PSK)
+-#CONFIG_EAP_PSK=y
+-
+-# EAP-pwd for the integrated EAP server (secure authentication with a password)
+-#CONFIG_EAP_PWD=y
+-
+-# EAP-SAKE for the integrated EAP server
+-#CONFIG_EAP_SAKE=y
+-
+-# EAP-GPSK for the integrated EAP server
+-#CONFIG_EAP_GPSK=y
+-# Include support for optional SHA256 cipher suite in EAP-GPSK
+-#CONFIG_EAP_GPSK_SHA256=y
+-
+-# EAP-FAST for the integrated EAP server
+-#CONFIG_EAP_FAST=y
+-
+-# EAP-TEAP for the integrated EAP server
+-# Note: The current EAP-TEAP implementation is experimental and should not be
+-# enabled for production use. The IETF RFC 7170 that defines EAP-TEAP has number
+-# of conflicting statements and missing details and the implementation has
+-# vendor specific workarounds for those and as such, may not interoperate with
+-# any other implementation. This should not be used for anything else than
+-# experimentation and interoperability testing until those issues has been
+-# resolved.
+-#CONFIG_EAP_TEAP=y
+-
+-# Wi-Fi Protected Setup (WPS)
+-#CONFIG_WPS=y
+-# Enable UPnP support for external WPS Registrars
+-#CONFIG_WPS_UPNP=y
+-# Enable WPS support with NFC config method
+-#CONFIG_WPS_NFC=y
+-
+-# EAP-IKEv2
+-#CONFIG_EAP_IKEV2=y
+-
+-# Trusted Network Connect (EAP-TNC)
+-#CONFIG_EAP_TNC=y
+-
+-# EAP-EKE for the integrated EAP server
+-#CONFIG_EAP_EKE=y
+-
+-# PKCS#12 (PFX) support (used to read private key and certificate file from
+-# a file that usually has extension .p12 or .pfx)
+-#CONFIG_PKCS12=y
+-
+-# RADIUS authentication server. This provides access to the integrated EAP
+-# server from external hosts using RADIUS.
+-#CONFIG_RADIUS_SERVER=y
+-
+-# Build IPv6 support for RADIUS operations
+-#CONFIG_IPV6=y
+-
+-# IEEE Std 802.11r-2008 (Fast BSS Transition)
+-#CONFIG_IEEE80211R=y
+-
+-# Use the hostapd's IEEE 802.11 authentication (ACL), but without
+-# the IEEE 802.11 Management capability (e.g., FreeBSD/net80211)
+-#CONFIG_DRIVER_RADIUS_ACL=y
+-
+-# IEEE 802.11n (High Throughput) support
+-CONFIG_IEEE80211N=y
+-
+-# Wireless Network Management (IEEE Std 802.11v-2011)
+-# Note: This is experimental and not complete implementation.
+-#CONFIG_WNM=y
+-
+-# IEEE 802.11ac (Very High Throughput) support
+-CONFIG_IEEE80211AC=y
+-
+-# IEEE 802.11ax HE support
+-# Note: This is experimental and work in progress. The definitions are still
+-# subject to change and this should not be expected to interoperate with the
+-# final IEEE 802.11ax version.
+-#CONFIG_IEEE80211AX=y
+-
+-# Remove debugging code that is printing out debug messages to stdout.
+-# This can be used to reduce the size of the hostapd considerably if debugging
+-# code is not needed.
+-#CONFIG_NO_STDOUT_DEBUG=y
+-
+-# Add support for writing debug log to a file: -f /tmp/hostapd.log
+-# Disabled by default.
+-#CONFIG_DEBUG_FILE=y
+-
+-# Send debug messages to syslog instead of stdout
+-CONFIG_DEBUG_SYSLOG=y
+-
+-# Add support for sending all debug messages (regardless of debug verbosity)
+-# to the Linux kernel tracing facility. This helps debug the entire stack by
+-# making it easy to record everything happening from the driver up into the
+-# same file, e.g., using trace-cmd.
+-#CONFIG_DEBUG_LINUX_TRACING=y
+-
+-# Remove support for RADIUS accounting
+-CONFIG_NO_ACCOUNTING=y
+-
+-# Remove support for RADIUS
+-CONFIG_NO_RADIUS=y
+-
+-# Remove support for VLANs
+-#CONFIG_NO_VLAN=y
+-
+-# Enable support for fully dynamic VLANs. This enables hostapd to
+-# automatically create bridge and VLAN interfaces if necessary.
+-#CONFIG_FULL_DYNAMIC_VLAN=y
+-
+-# Use netlink-based kernel API for VLAN operations instead of ioctl()
+-# Note: This requires libnl 3.1 or newer.
+-#CONFIG_VLAN_NETLINK=y
+-
+-# Remove support for dumping internal state through control interface commands
+-# This can be used to reduce binary size at the cost of disabling a debugging
+-# option.
+-CONFIG_NO_DUMP_STATE=y
+-
+-# Enable tracing code for developer debugging
+-# This tracks use of memory allocations and other registrations and reports
+-# incorrect use with a backtrace of call (or allocation) location.
+-#CONFIG_WPA_TRACE=y
+-# For BSD, comment out these.
+-#LIBS += -lexecinfo
+-#LIBS_p += -lexecinfo
+-#LIBS_c += -lexecinfo
+-
+-# Use libbfd to get more details for developer debugging
+-# This enables use of libbfd to get more detailed symbols for the backtraces
+-# generated by CONFIG_WPA_TRACE=y.
+-#CONFIG_WPA_TRACE_BFD=y
+-# For BSD, comment out these.
+-#LIBS += -lbfd -liberty -lz
+-#LIBS_p += -lbfd -liberty -lz
+-#LIBS_c += -lbfd -liberty -lz
+-
+-# hostapd depends on strong random number generation being available from the
+-# operating system. os_get_random() function is used to fetch random data when
+-# needed, e.g., for key generation. On Linux and BSD systems, this works by
+-# reading /dev/urandom. It should be noted that the OS entropy pool needs to be
+-# properly initialized before hostapd is started. This is important especially
+-# on embedded devices that do not have a hardware random number generator and
+-# may by default start up with minimal entropy available for random number
+-# generation.
+-#
+-# As a safety net, hostapd is by default trying to internally collect
+-# additional entropy for generating random data to mix in with the data
+-# fetched from the OS. This by itself is not considered to be very strong, but
+-# it may help in cases where the system pool is not initialized properly.
+-# However, it is very strongly recommended that the system pool is initialized
+-# with enough entropy either by using hardware assisted random number
+-# generator or by storing state over device reboots.
+-#
+-# hostapd can be configured to maintain its own entropy store over restarts to
+-# enhance random number generation. This is not perfect, but it is much more
+-# secure than using the same sequence of random numbers after every reboot.
+-# This can be enabled with -e<entropy file> command line option. The specified
+-# file needs to be readable and writable by hostapd.
+-#
+-# If the os_get_random() is known to provide strong random data (e.g., on
+-# Linux/BSD, the board in question is known to have reliable source of random
+-# data from /dev/urandom), the internal hostapd random pool can be disabled.
+-# This will save some in binary size and CPU use. However, this should only be
+-# considered for builds that are known to be used on devices that meet the
+-# requirements described above.
+-CONFIG_NO_RANDOM_POOL=y
+-
+-# Should we attempt to use the getrandom(2) call that provides more reliable
+-# yet secure randomness source than /dev/random on Linux 3.17 and newer.
+-# Requires glibc 2.25 to build, falls back to /dev/random if unavailable.
+-CONFIG_GETRANDOM=y
+-
+-# Should we use poll instead of select? Select is used by default.
+-#CONFIG_ELOOP_POLL=y
+-
+-# Should we use epoll instead of select? Select is used by default.
+-CONFIG_ELOOP_EPOLL=y
+-
+-# Should we use kqueue instead of select? Select is used by default.
+-#CONFIG_ELOOP_KQUEUE=y
+-
+-# Select TLS implementation
+-# openssl = OpenSSL (default)
+-# gnutls = GnuTLS
+-# internal = Internal TLSv1 implementation (experimental)
+-# linux = Linux kernel AF_ALG and internal TLSv1 implementation (experimental)
+-# none = Empty template
+-CONFIG_TLS=internal
+-
+-# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.1)
+-# can be enabled to get a stronger construction of messages when block ciphers
+-# are used.
+-#CONFIG_TLSV11=y
+-
+-# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.2)
+-# can be enabled to enable use of stronger crypto algorithms.
+-#CONFIG_TLSV12=y
+-
+-# Select which ciphers to use by default with OpenSSL if the user does not
+-# specify them.
+-#CONFIG_TLS_DEFAULT_CIPHERS="DEFAULT:!EXP:!LOW"
+-
+-# If CONFIG_TLS=internal is used, additional library and include paths are
+-# needed for LibTomMath. Alternatively, an integrated, minimal version of
+-# LibTomMath can be used. See beginning of libtommath.c for details on benefits
+-# and drawbacks of this option.
+-#CONFIG_INTERNAL_LIBTOMMATH=y
+-#ifndef CONFIG_INTERNAL_LIBTOMMATH
+-#LTM_PATH=/usr/src/libtommath-0.39
+-#CFLAGS += -I$(LTM_PATH)
+-#LIBS += -L$(LTM_PATH)
+-#LIBS_p += -L$(LTM_PATH)
+-#endif
+-# At the cost of about 4 kB of additional binary size, the internal LibTomMath
+-# can be configured to include faster routines for exptmod, sqr, and div to
+-# speed up DH and RSA calculation considerably
+-#CONFIG_INTERNAL_LIBTOMMATH_FAST=y
+-
+-# Interworking (IEEE 802.11u)
+-# This can be used to enable functionality to improve interworking with
+-# external networks.
+-#CONFIG_INTERWORKING=y
+-
+-# Hotspot 2.0
+-#CONFIG_HS20=y
+-
+-# Enable SQLite database support in hlr_auc_gw, EAP-SIM DB, and eap_user_file
+-#CONFIG_SQLITE=y
+-
+-# Enable Fast Session Transfer (FST)
+-#CONFIG_FST=y
+-
+-# Enable CLI commands for FST testing
+-#CONFIG_FST_TEST=y
+-
+-# Testing options
+-# This can be used to enable some testing options (see also the example
+-# configuration file) that are really useful only for testing clients that
+-# connect to this hostapd. These options allow, for example, to drop a
+-# certain percentage of probe requests or auth/(re)assoc frames.
+-#
+-#CONFIG_TESTING_OPTIONS=y
+-
+-# Automatic Channel Selection
+-# This will allow hostapd to pick the channel automatically when channel is set
+-# to "acs_survey" or "0". Eventually, other ACS algorithms can be added in
+-# similar way.
+-#
+-# Automatic selection is currently only done through initialization, later on
+-# we hope to do background checks to keep us moving to more ideal channels as
+-# time goes by. ACS is currently only supported through the nl80211 driver and
+-# your driver must have survey dump capability that is filled by the driver
+-# during scanning.
+-#
+-# You can customize the ACS survey algorithm with the hostapd.conf variable
+-# acs_num_scans.
+-#
+-# Supported ACS drivers:
+-# * ath9k
+-# * ath5k
+-# * ath10k
+-#
+-# For more details refer to:
+-# http://wireless.kernel.org/en/users/Documentation/acs
+-#
+-#CONFIG_ACS=y
+-
+-# Multiband Operation support
+-# These extentions facilitate efficient use of multiple frequency bands
+-# available to the AP and the devices that may associate with it.
+-#CONFIG_MBO=y
+-
+-# Client Taxonomy
+-# Has the AP retain the Probe Request and (Re)Association Request frames from
+-# a client, from which a signature can be produced which can identify the model
+-# of client device like "Nexus 6P" or "iPhone 5s".
+-#CONFIG_TAXONOMY=y
+-
+-# Fast Initial Link Setup (FILS) (IEEE 802.11ai)
+-#CONFIG_FILS=y
+-# FILS shared key authentication with PFS
+-#CONFIG_FILS_SK_PFS=y
+-
+-# Include internal line edit mode in hostapd_cli. This can be used to provide
+-# limited command line editing and history support.
+-#CONFIG_WPA_CLI_EDIT=y
+-
+-# Opportunistic Wireless Encryption (OWE)
+-# Experimental implementation of draft-harkins-owe-07.txt
+-#CONFIG_OWE=y
+-
+-# Airtime policy support
+-#CONFIG_AIRTIME_POLICY=y
+-
+-# Proxy ARP support
+-#CONFIG_PROXYARP=y
+-
+-# Override default value for the wpa_disable_eapol_key_retries configuration
+-# parameter. See that parameter in hostapd.conf for more details.
+-#CFLAGS += -DDEFAULT_WPA_DISABLE_EAPOL_KEY_RETRIES=1
+-
+-# uBus IPC/RPC System
+-# Services can connect to the bus and provide methods
+-# that can be called by other services or clients.
+-CONFIG_UBUS=y
+-
+-# OpenWrt patch 380-disable-ctrl-iface-mib.patch
+-# leads to the MIB only being compiled in if
+-# CONFIG_CTRL_IFACE_MIB is enabled.
+-#CONFIG_CTRL_IFACE_MIB=y
+diff --git a/package/network/services/hostapd/files/hostapd.sh b/package/network/services/hostapd/files/hostapd.sh
+deleted file mode 100644
+index 28bd210623..0000000000
+--- a/package/network/services/hostapd/files/hostapd.sh
++++ /dev/null
+@@ -1,1616 +0,0 @@
+-. /lib/functions/network.sh
+-. /lib/functions.sh
+-
+-wpa_supplicant_add_rate() {
+-	local var="$1"
+-	local val="$(($2 / 1000))"
+-	local sub="$((($2 / 100) % 10))"
+-	append $var "$val" ","
+-	[ $sub -gt 0 ] && append $var "."
+-}
+-
+-hostapd_add_rate() {
+-	local var="$1"
+-	local val="$(($2 / 100))"
+-	append $var "$val" " "
+-}
+-
+-hostapd_append_wep_key() {
+-	local var="$1"
+-
+-	wep_keyidx=0
+-	set_default key 1
+-	case "$key" in
+-		[1234])
+-			for idx in 1 2 3 4; do
+-				local zidx
+-				zidx="$(($idx - 1))"
+-				json_get_var ckey "key${idx}"
+-				[ -n "$ckey" ] && \
+-					append $var "wep_key${zidx}=$(prepare_key_wep "$ckey")" "$N$T"
+-			done
+-			wep_keyidx="$((key - 1))"
+-		;;
+-		*)
+-			append $var "wep_key0=$(prepare_key_wep "$key")" "$N$T"
+-		;;
+-	esac
+-}
+-
+-hostapd_append_wpa_key_mgmt() {
+-	local auth_type_l="$(echo $auth_type | tr 'a-z' 'A-Z')"
+-
+-	case "$auth_type" in
+-		psk|eap)
+-			append wpa_key_mgmt "WPA-$auth_type_l"
+-			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-${auth_type_l}"
+-			[ "${ieee80211w:-0}" -gt 0 ] && append wpa_key_mgmt "WPA-${auth_type_l}-SHA256"
+-		;;
+-		eap192)
+-			append wpa_key_mgmt "WPA-EAP-SUITE-B-192"
+-			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-EAP-SHA384"
+-		;;
+-		eap-eap192)
+-			append wpa_key_mgmt "WPA-EAP-SUITE-B-192"
+-			append wpa_key_mgmt "WPA-EAP"
+-			[ "${ieee80211r:-0}" -gt 0 ] && {
+-				append wpa_key_mgmt "FT-EAP-SHA384"
+-				append wpa_key_mgmt "FT-EAP"
+-			}
+-			[ "${ieee80211w:-0}" -gt 0 ] && append wpa_key_mgmt "WPA-EAP-SHA256"
+-		;;
+-		sae)
+-			append wpa_key_mgmt "SAE"
+-			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-SAE"
+-		;;
+-		psk-sae)
+-			append wpa_key_mgmt "WPA-PSK"
+-			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-PSK"
+-			[ "${ieee80211w:-0}" -gt 0 ] && append wpa_key_mgmt "WPA-PSK-SHA256"
+-			append wpa_key_mgmt "SAE"
+-			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-SAE"
+-		;;
+-		owe)
+-			append wpa_key_mgmt "OWE"
+-		;;
+-	esac
+-
+-	[ "$fils" -gt 0 ] && {
+-		case "$auth_type" in
+-			eap*)
+-				append wpa_key_mgmt FILS-SHA256
+-				[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt FT-FILS-SHA256
+-			;;
+-		esac
+-	}
+-
+-	[ "$auth_osen" = "1" ] && append wpa_key_mgmt "OSEN"
+-}
+-
+-hostapd_add_log_config() {
+-	config_add_boolean \
+-		log_80211 \
+-		log_8021x \
+-		log_radius \
+-		log_wpa \
+-		log_driver \
+-		log_iapp \
+-		log_mlme
+-
+-	config_add_int log_level
+-}
+-
+-hostapd_common_add_device_config() {
+-	config_add_array basic_rate
+-	config_add_array supported_rates
+-	config_add_string beacon_rate
+-
+-	config_add_string country country3
+-	config_add_boolean country_ie doth
+-	config_add_boolean spectrum_mgmt_required
+-	config_add_int local_pwr_constraint
+-	config_add_string require_mode
+-	config_add_boolean legacy_rates
+-	config_add_int cell_density
+-	config_add_int rts_threshold
+-	config_add_int rssi_reject_assoc_rssi
+-	config_add_int rssi_ignore_probe_request
+-	config_add_int maxassoc
+-
+-	config_add_string acs_chan_bias
+-	config_add_array hostapd_options
+-
+-	config_add_int airtime_mode
+-
+-	hostapd_add_log_config
+-}
+-
+-hostapd_prepare_device_config() {
+-	local config="$1"
+-	local driver="$2"
+-
+-	local base_cfg=
+-
+-	json_get_vars country country3 country_ie beacon_int:100 doth require_mode legacy_rates \
+-		acs_chan_bias local_pwr_constraint spectrum_mgmt_required airtime_mode cell_density \
+-		rts_threshold beacon_rate rssi_reject_assoc_rssi rssi_ignore_probe_request maxassoc
+-
+-	hostapd_set_log_options base_cfg
+-
+-	set_default country_ie 1
+-	set_default spectrum_mgmt_required 0
+-	set_default doth 1
+-	set_default legacy_rates 0
+-	set_default airtime_mode 0
+-	set_default cell_density 0
+-
+-	[ -n "$country" ] && {
+-		append base_cfg "country_code=$country" "$N"
+-		[ -n "$country3" ] && append base_cfg "country3=$country3" "$N"
+-
+-		[ "$country_ie" -gt 0 ] && {
+-			append base_cfg "ieee80211d=1" "$N"
+-			[ -n "$local_pwr_constraint" ] && append base_cfg "local_pwr_constraint=$local_pwr_constraint" "$N"
+-			[ "$spectrum_mgmt_required" -gt 0 ] && append base_cfg "spectrum_mgmt_required=$spectrum_mgmt_required" "$N"
+-		}
+-		[ "$hwmode" = "a" -a "$doth" -gt 0 ] && append base_cfg "ieee80211h=1" "$N"
+-	}
+-
+-	[ -n "$acs_chan_bias" ] && append base_cfg "acs_chan_bias=$acs_chan_bias" "$N"
+-
+-	local brlist= br
+-	json_get_values basic_rate_list basic_rate
+-	local rlist= r
+-	json_get_values rate_list supported_rates
+-
+-	[ -n "$hwmode" ] && append base_cfg "hw_mode=$hwmode" "$N"
+-	if [ "$hwmode" = "g" ] || [ "$hwmode" = "a" ]; then
+-		[ -n "$require_mode" ] && legacy_rates=0
+-		case "$require_mode" in
+-			n) append base_cfg "require_ht=1" "$N";;
+-			ac) append base_cfg "require_vht=1" "$N";;
+-		esac
+-	fi
+-	case "$hwmode" in
+-		b)
+-			if [ "$cell_density" -eq 1 ]; then
+-				set_default rate_list "5500 11000"
+-				set_default basic_rate_list "5500 11000"
+-			elif [ "$cell_density" -ge 2 ]; then
+-				set_default rate_list "11000"
+-				set_default basic_rate_list "11000"
+-			fi
+-		;;
+-		g)
+-			if [ "$cell_density" -eq 0 ] || [ "$cell_density" -eq 1 ]; then
+-				if [ "$legacy_rates" -eq 0 ]; then
+-					set_default rate_list "6000 9000 12000 18000 24000 36000 48000 54000"
+-					set_default basic_rate_list "6000 12000 24000"
+-				elif [ "$cell_density" -eq 1 ]; then
+-					set_default rate_list "5500 6000 9000 11000 12000 18000 24000 36000 48000 54000"
+-					set_default basic_rate_list "5500 11000"
+-				fi
+-			elif [ "$cell_density" -ge 3 ] && [ "$legacy_rates" -ne 0 ] || [ "$cell_density" -eq 2 ]; then
+-				if [ "$legacy_rates" -eq 0 ]; then
+-					set_default rate_list "12000 18000 24000 36000 48000 54000"
+-					set_default basic_rate_list "12000 24000"
+-				else
+-					set_default rate_list "11000 12000 18000 24000 36000 48000 54000"
+-					set_default basic_rate_list "11000"
+-				fi
+-			elif [ "$cell_density" -ge 3 ]; then
+-				set_default rate_list "24000 36000 48000 54000"
+-				set_default basic_rate_list "24000"
+-			fi
+-		;;
+-		a)
+-			if [ "$cell_density" -eq 1 ]; then
+-				set_default rate_list "6000 9000 12000 18000 24000 36000 48000 54000"
+-				set_default basic_rate_list "6000 12000 24000"
+-			elif [ "$cell_density" -eq 2 ]; then
+-				set_default rate_list "12000 18000 24000 36000 48000 54000"
+-				set_default basic_rate_list "12000 24000"
+-			elif [ "$cell_density" -ge 3 ]; then
+-				set_default rate_list "24000 36000 48000 54000"
+-				set_default basic_rate_list "24000"
+-			fi
+-		;;
+-	esac
+-
+-	for r in $rate_list; do
+-		hostapd_add_rate rlist "$r"
+-	done
+-
+-	for br in $basic_rate_list; do
+-		hostapd_add_rate brlist "$br"
+-	done
+-
+-	[ -n "$rssi_reject_assoc_rssi" ] && append base_cfg "rssi_reject_assoc_rssi=$rssi_reject_assoc_rssi" "$N"
+-	[ -n "$rssi_ignore_probe_request" ] && append base_cfg "rssi_ignore_probe_request=$rssi_ignore_probe_request" "$N"
+-	[ -n "$beacon_rate" ] && append base_cfg "beacon_rate=$beacon_rate" "$N"
+-	[ -n "$rlist" ] && append base_cfg "supported_rates=$rlist" "$N"
+-	[ -n "$brlist" ] && append base_cfg "basic_rates=$brlist" "$N"
+-	append base_cfg "beacon_int=$beacon_int" "$N"
+-	[ -n "$rts_threshold" ] && append base_cfg "rts_threshold=$rts_threshold" "$N"
+-	[ "$airtime_mode" -gt 0 ] && append base_cfg "airtime_mode=$airtime_mode" "$N"
+-	[ -n "$maxassoc" ] && append base_cfg "iface_max_num_sta=$maxassoc" "$N"
+-
+-	json_get_values opts hostapd_options
+-	for val in $opts; do
+-		append base_cfg "$val" "$N"
+-	done
+-
+-	cat > "$config" <<EOF
+-driver=$driver
+-$base_cfg
+-EOF
+-}
+-
+-hostapd_common_add_bss_config() {
+-	config_add_string 'bssid:macaddr' 'ssid:string'
+-	config_add_boolean wds wmm uapsd hidden utf8_ssid ppsk
+-
+-	config_add_int maxassoc max_inactivity
+-	config_add_boolean disassoc_low_ack isolate short_preamble skip_inactivity_poll
+-
+-	config_add_int \
+-		wep_rekey eap_reauth_period \
+-		wpa_group_rekey wpa_pair_rekey wpa_master_rekey
+-	config_add_boolean wpa_strict_rekey
+-	config_add_boolean wpa_disable_eapol_key_retries
+-
+-	config_add_boolean tdls_prohibit
+-
+-	config_add_boolean rsn_preauth auth_cache
+-	config_add_int ieee80211w
+-	config_add_int eapol_version
+-
+-	config_add_array auth_server acct_server
+-	config_add_string 'server:host'
+-	config_add_string auth_secret key
+-	config_add_int 'auth_port:port' 'port:port'
+-
+-	config_add_string acct_secret
+-	config_add_int acct_port
+-	config_add_int acct_interval
+-
+-	config_add_int bss_load_update_period chan_util_avg_period
+-
+-	config_add_string dae_client
+-	config_add_string dae_secret
+-	config_add_int dae_port
+-
+-	config_add_string nasid
+-	config_add_string ownip
+-	config_add_string radius_client_addr
+-	config_add_string iapp_interface
+-	config_add_string eap_type ca_cert client_cert identity anonymous_identity auth priv_key priv_key_pwd
+-	config_add_boolean ca_cert_usesystem ca_cert2_usesystem
+-	config_add_string subject_match subject_match2
+-	config_add_array altsubject_match altsubject_match2
+-	config_add_array domain_match domain_match2 domain_suffix_match domain_suffix_match2
+-	config_add_string ieee80211w_mgmt_cipher
+-
+-	config_add_int dynamic_vlan vlan_naming vlan_no_bridge
+-	config_add_string vlan_tagged_interface vlan_bridge
+-	config_add_string vlan_file
+-
+-	config_add_string 'key1:wepkey' 'key2:wepkey' 'key3:wepkey' 'key4:wepkey' 'password:wpakey'
+-
+-	config_add_string wpa_psk_file
+-
+-	config_add_int multi_ap
+-
+-	config_add_boolean wps_pushbutton wps_label ext_registrar wps_pbc_in_m1
+-	config_add_int wps_ap_setup_locked wps_independent
+-	config_add_string wps_device_type wps_device_name wps_manufacturer wps_pin
+-	config_add_string multi_ap_backhaul_ssid multi_ap_backhaul_key
+-
+-	config_add_boolean wnm_sleep_mode wnm_sleep_mode_no_keys bss_transition mbo
+-	config_add_int time_advertisement
+-	config_add_string time_zone
+-	config_add_string vendor_elements
+-
+-	config_add_boolean ieee80211k rrm_neighbor_report rrm_beacon_report
+-
+-	config_add_boolean ftm_responder stationary_ap
+-	config_add_string lci civic
+-
+-	config_add_boolean ieee80211r pmk_r1_push ft_psk_generate_local ft_over_ds
+-	config_add_int r0_key_lifetime reassociation_deadline
+-	config_add_string mobility_domain r1_key_holder
+-	config_add_array r0kh r1kh
+-
+-	config_add_int ieee80211w_max_timeout ieee80211w_retry_timeout
+-
+-	config_add_string macfilter 'macfile:file'
+-	config_add_array 'maclist:list(macaddr)'
+-
+-	config_add_array bssid_blacklist
+-	config_add_array bssid_whitelist
+-
+-	config_add_int mcast_rate
+-	config_add_array basic_rate
+-	config_add_array supported_rates
+-
+-	config_add_boolean sae_require_mfp
+-	config_add_int sae_pwe
+-
+-	config_add_string 'owe_transition_bssid:macaddr' 'owe_transition_ssid:string'
+-	config_add_string owe_transition_ifname
+-
+-	config_add_boolean iw_enabled iw_internet iw_asra iw_esr iw_uesa
+-	config_add_int iw_access_network_type iw_venue_group iw_venue_type
+-	config_add_int iw_ipaddr_type_availability iw_gas_address3
+-	config_add_string iw_hessid iw_network_auth_type iw_qos_map_set
+-	config_add_array iw_roaming_consortium iw_domain_name iw_anqp_3gpp_cell_net iw_nai_realm
+-	config_add_array iw_anqp_elem iw_venue_name iw_venue_url
+-
+-	config_add_boolean hs20 disable_dgaf osen
+-	config_add_int anqp_domain_id
+-	config_add_int hs20_deauth_req_timeout
+-	config_add_array hs20_oper_friendly_name
+-	config_add_array osu_provider
+-	config_add_array operator_icon
+-	config_add_array hs20_conn_capab
+-	config_add_string osu_ssid hs20_wan_metrics hs20_operating_class hs20_t_c_filename hs20_t_c_timestamp
+-
+-	config_add_string hs20_t_c_server_url
+-
+-	config_add_array airtime_sta_weight
+-	config_add_int airtime_bss_weight airtime_bss_limit
+-
+-	config_add_boolean multicast_to_unicast multicast_to_unicast_all proxy_arp per_sta_vif
+-
+-	config_add_array hostapd_bss_options
+-	config_add_boolean default_disabled
+-
+-	config_add_boolean request_cui
+-	config_add_array radius_auth_req_attr
+-	config_add_array radius_acct_req_attr
+-
+-	config_add_int eap_server
+-	config_add_string eap_user_file ca_cert server_cert private_key private_key_passwd server_id
+-
+-	config_add_boolean fils
+-	config_add_string fils_dhcp
+-
+-	config_add_int ocv
+-}
+-
+-hostapd_set_vlan_file() {
+-	local ifname="$1"
+-	local vlan="$2"
+-	json_get_vars name vid
+-	echo "${vid} ${ifname}-${name}" >> /var/run/hostapd-${ifname}.vlan
+-	wireless_add_vlan "${vlan}" "${ifname}-${name}"
+-}
+-
+-hostapd_set_vlan() {
+-	local ifname="$1"
+-
+-	rm -f /var/run/hostapd-${ifname}.vlan
+-	for_each_vlan hostapd_set_vlan_file ${ifname}
+-}
+-
+-hostapd_set_psk_file() {
+-	local ifname="$1"
+-	local vlan="$2"
+-	local vlan_id=""
+-
+-	json_get_vars mac vid key
+-	set_default mac "00:00:00:00:00:00"
+-	[ -n "$vid" ] && vlan_id="vlanid=$vid "
+-	echo "${vlan_id} ${mac} ${key}" >> /var/run/hostapd-${ifname}.psk
+-}
+-
+-hostapd_set_psk() {
+-	local ifname="$1"
+-
+-	rm -f /var/run/hostapd-${ifname}.psk
+-	for_each_station hostapd_set_psk_file ${ifname}
+-}
+-
+-append_iw_roaming_consortium() {
+-	[ -n "$1" ] && append bss_conf "roaming_consortium=$1" "$N"
+-}
+-
+-append_iw_domain_name() {
+-	if [ -z "$iw_domain_name_conf" ]; then
+-		iw_domain_name_conf="$1"
+-	else
+-		iw_domain_name_conf="$iw_domain_name_conf,$1"
+-	fi
+-}
+-
+-append_iw_anqp_3gpp_cell_net() {
+-	if [ -z "$iw_anqp_3gpp_cell_net_conf" ]; then
+-		iw_anqp_3gpp_cell_net_conf="$1"
+-	else
+-		iw_anqp_3gpp_cell_net_conf="$iw_anqp_3gpp_cell_net_conf:$1"
+-	fi
+-}
+-
+-append_iw_anqp_elem() {
+-	[ -n "$1" ] && append bss_conf "anqp_elem=$1" "$N"
+-}
+-
+-append_iw_nai_realm() {
+-	[ -n "$1" ] && append bss_conf "nai_realm=$1" "$N"
+-}
+-
+-append_iw_venue_name() {
+-	append bss_conf "venue_name=$1" "$N"
+-}
+-
+-append_iw_venue_url() {
+-	append bss_conf "venue_url=$1" "$N"
+-}
+-
+-append_hs20_oper_friendly_name() {
+-	append bss_conf "hs20_oper_friendly_name=$1" "$N"
+-}
+-
+-append_osu_provider_friendly_name() {
+-	append bss_conf "osu_friendly_name=$1" "$N"
+-}
+-
+-append_osu_provider_service_desc() {
+-	append bss_conf "osu_service_desc=$1" "$N"
+-}
+-
+-append_hs20_icon() {
+-	local width height lang type path
+-	config_get width "$1" width
+-	config_get height "$1" height
+-	config_get lang "$1" lang
+-	config_get type "$1" type
+-	config_get path "$1" path
+-
+-	append bss_conf "hs20_icon=$width:$height:$lang:$type:$1:$path" "$N"
+-}
+-
+-append_hs20_icons() {
+-	config_load wireless
+-	config_foreach append_hs20_icon hs20-icon
+-}
+-
+-append_operator_icon() {
+-	append bss_conf "operator_icon=$1" "$N"
+-}
+-
+-append_osu_icon() {
+-	append bss_conf "osu_icon=$1" "$N"
+-}
+-
+-append_osu_provider() {
+-	local cfgtype osu_server_uri osu_friendly_name osu_nai osu_nai2 osu_method_list
+-
+-	config_load wireless
+-	config_get cfgtype "$1" TYPE
+-	[ "$cfgtype" != "osu-provider" ] && return
+-
+-	append bss_conf "# provider $1" "$N"
+-	config_get osu_server_uri "$1" osu_server_uri
+-	config_get osu_nai "$1" osu_nai
+-	config_get osu_nai2 "$1" osu_nai2
+-	config_get osu_method_list "$1" osu_method
+-
+-	append bss_conf "osu_server_uri=$osu_server_uri" "$N"
+-	append bss_conf "osu_nai=$osu_nai" "$N"
+-	append bss_conf "osu_nai2=$osu_nai2" "$N"
+-	append bss_conf "osu_method_list=$osu_method_list" "$N"
+-
+-	config_list_foreach "$1" osu_service_desc append_osu_provider_service_desc
+-	config_list_foreach "$1" osu_friendly_name append_osu_friendly_name
+-	config_list_foreach "$1" osu_icon append_osu_icon
+-
+-	append bss_conf "$N"
+-}
+-
+-append_hs20_conn_capab() {
+-	[ -n "$1" ] && append bss_conf "hs20_conn_capab=$1" "$N"
+-}
+-
+-append_radius_acct_req_attr() {
+-	[ -n "$1" ] && append bss_conf "radius_acct_req_attr=$1" "$N"
+-}
+-
+-append_radius_auth_req_attr() {
+-	[ -n "$1" ] && append bss_conf "radius_auth_req_attr=$1" "$N"
+-}
+-
+-append_airtime_sta_weight() {
+-	[ -n "$1" ] && append bss_conf "airtime_sta_weight=$1" "$N"
+-}
+-
+-append_auth_server() {
+-	[ -n "$1" ] || return
+-	append bss_conf "auth_server_addr=$1" "$N"
+-	append bss_conf "auth_server_port=$auth_port" "$N"
+-	[ -n "$auth_secret" ] && append bss_conf "auth_server_shared_secret=$auth_secret" "$N"
+-}
+-
+-append_acct_server() {
+-	[ -n "$1" ] || return
+-	append bss_conf "acct_server_addr=$1" "$N"
+-	append bss_conf "acct_server_port=$acct_port" "$N"
+-	[ -n "$acct_secret" ] && append bss_conf "acct_server_shared_secret=$acct_secret" "$N"
+-}
+-
+-hostapd_set_bss_options() {
+-	local var="$1"
+-	local phy="$2"
+-	local vif="$3"
+-
+-	wireless_vif_parse_encryption
+-
+-	local bss_conf bss_md5sum ft_key
+-	local wep_rekey wpa_group_rekey wpa_pair_rekey wpa_master_rekey wpa_key_mgmt
+-
+-	json_get_vars \
+-		wep_rekey wpa_group_rekey wpa_pair_rekey wpa_master_rekey wpa_strict_rekey \
+-		wpa_disable_eapol_key_retries tdls_prohibit \
+-		maxassoc max_inactivity disassoc_low_ack isolate auth_cache \
+-		wps_pushbutton wps_label ext_registrar wps_pbc_in_m1 wps_ap_setup_locked \
+-		wps_independent wps_device_type wps_device_name wps_manufacturer wps_pin \
+-		macfilter ssid utf8_ssid wmm uapsd hidden short_preamble rsn_preauth \
+-		iapp_interface eapol_version dynamic_vlan ieee80211w nasid \
+-		acct_secret acct_port acct_interval \
+-		bss_load_update_period chan_util_avg_period sae_require_mfp sae_pwe \
+-		multi_ap multi_ap_backhaul_ssid multi_ap_backhaul_key skip_inactivity_poll \
+-		ppsk airtime_bss_weight airtime_bss_limit airtime_sta_weight \
+-		multicast_to_unicast_all proxy_arp per_sta_vif \
+-		eap_server eap_user_file ca_cert server_cert private_key private_key_passwd server_id \
+-		vendor_elements fils ocv
+-
+-	set_default fils 0
+-	set_default isolate 0
+-	set_default maxassoc 0
+-	set_default max_inactivity 0
+-	set_default short_preamble 1
+-	set_default disassoc_low_ack 1
+-	set_default skip_inactivity_poll 0
+-	set_default hidden 0
+-	set_default wmm 1
+-	set_default uapsd 1
+-	set_default wpa_disable_eapol_key_retries 0
+-	set_default tdls_prohibit 0
+-	set_default eapol_version $((wpa & 1))
+-	set_default acct_port 1813
+-	set_default bss_load_update_period 60
+-	set_default chan_util_avg_period 600
+-	set_default utf8_ssid 1
+-	set_default multi_ap 0
+-	set_default ppsk 0
+-	set_default airtime_bss_weight 0
+-	set_default airtime_bss_limit 0
+-	set_default eap_server 0
+-
+-	/usr/sbin/hostapd -vfils || fils=0
+-
+-	append bss_conf "ctrl_interface=/var/run/hostapd"
+-	if [ "$isolate" -gt 0 ]; then
+-		append bss_conf "ap_isolate=$isolate" "$N"
+-	fi
+-	if [ "$maxassoc" -gt 0 ]; then
+-		append bss_conf "max_num_sta=$maxassoc" "$N"
+-	fi
+-	if [ "$max_inactivity" -gt 0 ]; then
+-		append bss_conf "ap_max_inactivity=$max_inactivity" "$N"
+-	fi
+-
+-	[ "$airtime_bss_weight" -gt 0 ] && append bss_conf "airtime_bss_weight=$airtime_bss_weight" "$N"
+-	[ "$airtime_bss_limit" -gt 0 ] && append bss_conf "airtime_bss_limit=$airtime_bss_limit" "$N"
+-	json_for_each_item append_airtime_sta_weight airtime_sta_weight
+-
+-	append bss_conf "bss_load_update_period=$bss_load_update_period" "$N"
+-	append bss_conf "chan_util_avg_period=$chan_util_avg_period" "$N"
+-	append bss_conf "disassoc_low_ack=$disassoc_low_ack" "$N"
+-	append bss_conf "skip_inactivity_poll=$skip_inactivity_poll" "$N"
+-	append bss_conf "preamble=$short_preamble" "$N"
+-	append bss_conf "wmm_enabled=$wmm" "$N"
+-	append bss_conf "ignore_broadcast_ssid=$hidden" "$N"
+-	append bss_conf "uapsd_advertisement_enabled=$uapsd" "$N"
+-	append bss_conf "utf8_ssid=$utf8_ssid" "$N"
+-	append bss_conf "multi_ap=$multi_ap" "$N"
+-	[ -n "$vendor_elements" ] && append bss_conf "vendor_elements=$vendor_elements" "$N"
+-
+-	[ "$tdls_prohibit" -gt 0 ] && append bss_conf "tdls_prohibit=$tdls_prohibit" "$N"
+-
+-	[ "$wpa" -gt 0 ] && {
+-		[ -n "$wpa_group_rekey"  ] && append bss_conf "wpa_group_rekey=$wpa_group_rekey" "$N"
+-		[ -n "$wpa_pair_rekey"   ] && append bss_conf "wpa_ptk_rekey=$wpa_pair_rekey"    "$N"
+-		[ -n "$wpa_master_rekey" ] && append bss_conf "wpa_gmk_rekey=$wpa_master_rekey"  "$N"
+-		[ -n "$wpa_strict_rekey" ] && append bss_conf "wpa_strict_rekey=$wpa_strict_rekey" "$N"
+-	}
+-
+-	set_default nasid "${macaddr//\:}"
+-	append bss_conf "nas_identifier=$nasid" "$N"
+-
+-	[ -n "$acct_interval" ] && \
+-		append bss_conf "radius_acct_interim_interval=$acct_interval" "$N"
+-	json_for_each_item append_acct_server acct_server
+-	json_for_each_item append_radius_acct_req_attr radius_acct_req_attr
+-
+-	[ -n "$ocv" ] && append bss_conf "ocv=$ocv" "$N"
+-
+-	case "$auth_type" in
+-		sae|owe|eap192|eap-eap192)
+-			set_default ieee80211w 2
+-			set_default sae_require_mfp 1
+-			set_default sae_pwe 2
+-		;;
+-		psk-sae)
+-			set_default ieee80211w 1
+-			set_default sae_require_mfp 1
+-			set_default sae_pwe 2
+-		;;
+-	esac
+-	[ -n "$sae_require_mfp" ] && append bss_conf "sae_require_mfp=$sae_require_mfp" "$N"
+-	[ -n "$sae_pwe" ] && append bss_conf "sae_pwe=$sae_pwe" "$N"
+-
+-	local vlan_possible=""
+-
+-	case "$auth_type" in
+-		none|owe)
+-			json_get_vars owe_transition_bssid owe_transition_ssid owe_transition_ifname
+-
+-			[ -n "$owe_transition_ssid" ] && append bss_conf "owe_transition_ssid=\"$owe_transition_ssid\"" "$N"
+-			[ -n "$owe_transition_bssid" ] && append bss_conf "owe_transition_bssid=$owe_transition_bssid" "$N"
+-			[ -n "$owe_transition_ifname" ] && append bss_conf "owe_transition_ifname=$owe_transition_ifname" "$N"
+-
+-			wps_possible=1
+-			# Here we make the assumption that if we're in open mode
+-			# with WPS enabled, we got to be in unconfigured state.
+-			wps_not_configured=1
+-		;;
+-		psk|sae|psk-sae)
+-			json_get_vars key wpa_psk_file
+-			if [ "$auth_type" = "psk" ] && [ "$ppsk" -ne 0 ] ; then
+-				json_get_vars auth_secret auth_port
+-				set_default auth_port 1812
+-				json_for_each_item append_auth_server auth_server
+-				append bss_conf "macaddr_acl=2" "$N"
+-				append bss_conf "wpa_psk_radius=2" "$N"
+-			elif [ ${#key} -eq 64 ]; then
+-				append bss_conf "wpa_psk=$key" "$N"
+-			elif [ ${#key} -ge 8 ] && [ ${#key} -le 63 ]; then
+-				append bss_conf "wpa_passphrase=$key" "$N"
+-			elif [ -n "$key" ] || [ -z "$wpa_psk_file" ]; then
+-				wireless_setup_vif_failed INVALID_WPA_PSK
+-				return 1
+-			fi
+-			[ -z "$wpa_psk_file" ] && set_default wpa_psk_file /var/run/hostapd-$ifname.psk
+-			[ -n "$wpa_psk_file" ] && {
+-				[ -e "$wpa_psk_file" ] || touch "$wpa_psk_file"
+-				append bss_conf "wpa_psk_file=$wpa_psk_file" "$N"
+-			}
+-			[ "$eapol_version" -ge "1" -a "$eapol_version" -le "2" ] && append bss_conf "eapol_version=$eapol_version" "$N"
+-
+-			set_default dynamic_vlan 0
+-			vlan_possible=1
+-			wps_possible=1
+-		;;
+-		eap|eap192|eap-eap192)
+-			json_get_vars \
+-				auth_server auth_secret auth_port \
+-				dae_client dae_secret dae_port \
+-				dynamic_ownip ownip radius_client_addr \
+-				eap_reauth_period request_cui \
+-				erp_domain mobility_domain \
+-				fils_realm fils_dhcp
+-
+-			# radius can provide VLAN ID for clients
+-			vlan_possible=1
+-
+-			set_default dynamic_ownip 1
+-
+-			# legacy compatibility
+-			[ -n "$auth_server" ] || json_get_var auth_server server
+-			[ -n "$auth_port" ] || json_get_var auth_port port
+-			[ -n "$auth_secret" ] || json_get_var auth_secret key
+-
+-			[ "$fils" -gt 0 ] && {
+-				set_default erp_domain "$mobility_domain"
+-				set_default erp_domain "$(echo "$ssid" | md5sum | head -c 8)"
+-				set_default fils_realm "$erp_domain"
+-
+-				append bss_conf "erp_send_reauth_start=1" "$N"
+-				append bss_conf "erp_domain=$erp_domain" "$N"
+-				append bss_conf "fils_realm=$fils_realm" "$N"
+-				append bss_conf "fils_cache_id=$(echo "$fils_realm" | md5sum | head -c 4)" "$N"
+-
+-				[ "$fils_dhcp" = "*" ] && {
+-					json_get_values network network
+-					fils_dhcp=
+-					for net in $network; do
+-						fils_dhcp="$(ifstatus "$net" | jsonfilter -e '@.data.dhcpserver')"
+-						[ -n "$fils_dhcp" ] && break
+-					done
+-
+-					[ -z "$fils_dhcp" -a -n "$network_bridge" -a -n "$network_ifname" ] && \
+-						fils_dhcp="$(udhcpc -B -n -q -s /lib/netifd/dhcp-get-server.sh -t 1 -i "$network_ifname" 2>/dev/null)"
+-				}
+-				[ -n "$fils_dhcp" ] && append bss_conf "dhcp_server=$fils_dhcp" "$N"
+-			}
+-
+-			set_default auth_port 1812
+-			set_default dae_port 3799
+-			set_default request_cui 0
+-
+-			[ "$eap_server" -eq 0 ] && json_for_each_item append_auth_server auth_server
+-			[ "$request_cui" -gt 0 ] && append bss_conf "radius_request_cui=$request_cui" "$N"
+-			[ -n "$eap_reauth_period" ] && append bss_conf "eap_reauth_period=$eap_reauth_period" "$N"
+-
+-			[ -n "$dae_client" -a -n "$dae_secret" ] && {
+-				append bss_conf "radius_das_port=$dae_port" "$N"
+-				append bss_conf "radius_das_client=$dae_client $dae_secret" "$N"
+-			}
+-			json_for_each_item append_radius_auth_req_attr radius_auth_req_attr
+-
+-			if [ -n "$ownip" ]; then
+-				append bss_conf "own_ip_addr=$ownip" "$N"
+-			elif [ "$dynamic_ownip" -gt 0 ]; then
+-				append bss_conf "dynamic_own_ip_addr=$dynamic_ownip" "$N"
+-			fi
+-
+-			[ -n "$radius_client_addr" ] && append bss_conf "radius_client_addr=$radius_client_addr" "$N"
+-			append bss_conf "eapol_key_index_workaround=1" "$N"
+-			append bss_conf "ieee8021x=1" "$N"
+-
+-			[ "$eapol_version" -ge "1" -a "$eapol_version" -le "2" ] && append bss_conf "eapol_version=$eapol_version" "$N"
+-		;;
+-		wep)
+-			local wep_keyidx=0
+-			json_get_vars key
+-			hostapd_append_wep_key bss_conf
+-			append bss_conf "wep_default_key=$wep_keyidx" "$N"
+-			[ -n "$wep_rekey" ] && append bss_conf "wep_rekey_period=$wep_rekey" "$N"
+-		;;
+-	esac
+-
+-	case "$auth_type" in
+-		none|owe|psk|sae|psk-sae|wep)
+-			json_get_vars \
+-			auth_server auth_port auth_secret \
+-			ownip radius_client_addr
+-
+-			[ -n "$auth_server" ] &&  {
+-				set_default auth_port 1812
+-
+-				json_for_each_item append_auth_server auth_server
+-				[ -n "$ownip" ] && append bss_conf "own_ip_addr=$ownip" "$N"
+-				[ -n "$radius_client_addr" ] && append bss_conf "radius_client_addr=$radius_client_addr" "$N"
+-				append bss_conf "macaddr_acl=2" "$N"
+-			}
+-		;;
+-	esac
+-
+-	local auth_algs="$((($auth_mode_shared << 1) | $auth_mode_open))"
+-	append bss_conf "auth_algs=${auth_algs:-1}" "$N"
+-	append bss_conf "wpa=$wpa" "$N"
+-	[ -n "$wpa_pairwise" ] && append bss_conf "wpa_pairwise=$wpa_pairwise" "$N"
+-
+-	set_default wps_pushbutton 0
+-	set_default wps_label 0
+-	set_default wps_pbc_in_m1 0
+-
+-	config_methods=
+-	[ "$wps_pushbutton" -gt 0 ] && append config_methods push_button
+-	[ "$wps_label" -gt 0 ] && append config_methods label
+-
+-	# WPS not possible on Multi-AP backhaul-only SSID
+-	[ "$multi_ap" = 1 ] && wps_possible=
+-
+-	[ -n "$wps_possible" -a -n "$config_methods" ] && {
+-		set_default ext_registrar 0
+-		set_default wps_device_type "6-0050F204-1"
+-		set_default wps_device_name "OpenWrt AP"
+-		set_default wps_manufacturer "www.openwrt.org"
+-		set_default wps_independent 1
+-
+-		wps_state=2
+-		[ -n "$wps_not_configured" ] && wps_state=1
+-
+-		[ "$ext_registrar" -gt 0 -a -n "$network_bridge" ] && append bss_conf "upnp_iface=$network_bridge" "$N"
+-
+-		append bss_conf "eap_server=1" "$N"
+-		[ -n "$wps_pin" ] && append bss_conf "ap_pin=$wps_pin" "$N"
+-		append bss_conf "wps_state=$wps_state" "$N"
+-		append bss_conf "device_type=$wps_device_type" "$N"
+-		append bss_conf "device_name=$wps_device_name" "$N"
+-		append bss_conf "manufacturer=$wps_manufacturer" "$N"
+-		append bss_conf "config_methods=$config_methods" "$N"
+-		append bss_conf "wps_independent=$wps_independent" "$N"
+-		[ -n "$wps_ap_setup_locked" ] && append bss_conf "ap_setup_locked=$wps_ap_setup_locked" "$N"
+-		[ "$wps_pbc_in_m1" -gt 0 ] && append bss_conf "pbc_in_m1=$wps_pbc_in_m1" "$N"
+-		[ "$multi_ap" -gt 0 ] && [ -n "$multi_ap_backhaul_ssid" ] && {
+-			append bss_conf "multi_ap_backhaul_ssid=\"$multi_ap_backhaul_ssid\"" "$N"
+-			if [ -z "$multi_ap_backhaul_key" ]; then
+-				:
+-			elif [ ${#multi_ap_backhaul_key} -lt 8 ]; then
+-				wireless_setup_vif_failed INVALID_WPA_PSK
+-				return 1
+-			elif [ ${#multi_ap_backhaul_key} -eq 64 ]; then
+-				append bss_conf "multi_ap_backhaul_wpa_psk=$multi_ap_backhaul_key" "$N"
+-			else
+-				append bss_conf "multi_ap_backhaul_wpa_passphrase=$multi_ap_backhaul_key" "$N"
+-			fi
+-		}
+-	}
+-
+-	append bss_conf "ssid=$ssid" "$N"
+-	[ -n "$network_bridge" ] && append bss_conf "bridge=$network_bridge${N}wds_bridge=" "$N"
+-	[ -n "$network_ifname" ] && append bss_conf "snoop_iface=$network_ifname" "$N"
+-	[ -n "$iapp_interface" ] && {
+-		local ifname
+-		network_get_device ifname "$iapp_interface" || ifname="$iapp_interface"
+-		append bss_conf "iapp_interface=$ifname" "$N"
+-	}
+-
+-	json_get_vars time_advertisement time_zone wnm_sleep_mode wnm_sleep_mode_no_keys bss_transition mbo
+-	set_default bss_transition 0
+-	set_default wnm_sleep_mode 0
+-	set_default wnm_sleep_mode_no_keys 0
+-	set_default mbo 0
+-
+-	[ -n "$time_advertisement" ] && append bss_conf "time_advertisement=$time_advertisement" "$N"
+-	[ -n "$time_zone" ] && append bss_conf "time_zone=$time_zone" "$N"
+-	if [ "$wnm_sleep_mode" -eq "1" ]; then
+-		append bss_conf "wnm_sleep_mode=1" "$N"
+-		[ "$wnm_sleep_mode_no_keys" -eq "1" ] && append bss_conf "wnm_sleep_mode_no_keys=1" "$N"
+-	fi
+-	[ "$bss_transition" -eq "1" ] && append bss_conf "bss_transition=1" "$N"
+-	[ "$mbo" -eq 1 ] && append bss_conf "mbo=1" "$N"
+-
+-	json_get_vars ieee80211k rrm_neighbor_report rrm_beacon_report
+-	set_default ieee80211k 0
+-	if [ "$ieee80211k" -eq "1" ]; then
+-		set_default rrm_neighbor_report 1
+-		set_default rrm_beacon_report 1
+-	else
+-		set_default rrm_neighbor_report 0
+-		set_default rrm_beacon_report 0
+-	fi
+-
+-	[ "$rrm_neighbor_report" -eq "1" ] && append bss_conf "rrm_neighbor_report=1" "$N"
+-	[ "$rrm_beacon_report" -eq "1" ] && append bss_conf "rrm_beacon_report=1" "$N"
+-
+-	json_get_vars ftm_responder stationary_ap lci civic
+-	set_default ftm_responder 0
+-	if [ "$ftm_responder" -eq "1" ]; then
+-		set_default stationary_ap 0
+-		iw phy "$phy" info | grep -q "ENABLE_FTM_RESPONDER" && {
+-			append bss_conf "ftm_responder=1" "$N"
+-			[ "$stationary_ap" -eq "1" ] && append bss_conf "stationary_ap=1" "$N"
+-			[ -n "$lci" ] && append bss_conf "lci=$lci" "$N"
+-			[ -n "$civic" ] && append bss_conf "civic=$civic" "$N"
+-		}
+-	fi
+-
+-	if [ "$wpa" -ge "1" ]; then
+-		json_get_vars ieee80211r
+-		set_default ieee80211r 0
+-
+-		if [ "$ieee80211r" -gt "0" ]; then
+-			json_get_vars mobility_domain ft_psk_generate_local ft_over_ds reassociation_deadline
+-
+-			set_default mobility_domain "$(echo "$ssid" | md5sum | head -c 4)"
+-			set_default ft_over_ds 0
+-			set_default reassociation_deadline 1000
+-
+-			case "$auth_type" in
+-				psk|sae|psk-sae)
+-					set_default ft_psk_generate_local 1
+-				;;
+-				*)
+-					set_default ft_psk_generate_local 0
+-				;;
+-			esac
+-
+-			[ -n "$network_ifname" ] && append bss_conf "ft_iface=$network_ifname" "$N"
+-			append bss_conf "mobility_domain=$mobility_domain" "$N"
+-			append bss_conf "ft_psk_generate_local=$ft_psk_generate_local" "$N"
+-			append bss_conf "ft_over_ds=$ft_over_ds" "$N"
+-			append bss_conf "reassociation_deadline=$reassociation_deadline" "$N"
+-
+-			if [ "$ft_psk_generate_local" -eq "0" ]; then
+-				json_get_vars r0_key_lifetime r1_key_holder pmk_r1_push
+-				json_get_values r0kh r0kh
+-				json_get_values r1kh r1kh
+-
+-				set_default r0_key_lifetime 10000
+-				set_default pmk_r1_push 0
+-
+-				[ -n "$r0kh" -a -n "$r1kh" ] || {
+-					ft_key=`echo -n "$mobility_domain/${auth_secret:-${key}}" | md5sum | awk '{print $1}'`
+-
+-					set_default r0kh "ff:ff:ff:ff:ff:ff,*,$ft_key"
+-					set_default r1kh "00:00:00:00:00:00,00:00:00:00:00:00,$ft_key"
+-				}
+-
+-				[ -n "$r1_key_holder" ] && append bss_conf "r1_key_holder=$r1_key_holder" "$N"
+-				append bss_conf "r0_key_lifetime=$r0_key_lifetime" "$N"
+-				append bss_conf "pmk_r1_push=$pmk_r1_push" "$N"
+-
+-				for kh in $r0kh; do
+-					append bss_conf "r0kh=${kh//,/ }" "$N"
+-				done
+-				for kh in $r1kh; do
+-					append bss_conf "r1kh=${kh//,/ }" "$N"
+-				done
+-			fi
+-		fi
+-		if [ "$fils" -gt 0 ]; then
+-			json_get_vars fils_realm
+-			set_default fils_realm "$(echo "$ssid" | md5sum | head -c 8)"
+-		fi
+-
+-		append bss_conf "wpa_disable_eapol_key_retries=$wpa_disable_eapol_key_retries" "$N"
+-
+-		hostapd_append_wpa_key_mgmt
+-		[ -n "$wpa_key_mgmt" ] && append bss_conf "wpa_key_mgmt=$wpa_key_mgmt" "$N"
+-	fi
+-
+-	if [ "$wpa" -ge "2" ]; then
+-		if [ -n "$network_bridge" -a "$rsn_preauth" = 1 ]; then
+-			set_default auth_cache 1
+-			append bss_conf "rsn_preauth=1" "$N"
+-			append bss_conf "rsn_preauth_interfaces=$network_bridge" "$N"
+-		else
+-			case "$auth_type" in
+-			sae|psk-sae|owe)
+-				set_default auth_cache 1
+-			;;
+-			*)
+-				set_default auth_cache 0
+-			;;
+-			esac
+-		fi
+-
+-		append bss_conf "okc=$auth_cache" "$N"
+-		[ "$auth_cache" = 0 -a "$fils" = 0 ] && append bss_conf "disable_pmksa_caching=1" "$N"
+-
+-		# RSN -> allow management frame protection
+-		case "$ieee80211w" in
+-			[012])
+-				json_get_vars ieee80211w_mgmt_cipher ieee80211w_max_timeout ieee80211w_retry_timeout
+-				append bss_conf "ieee80211w=$ieee80211w" "$N"
+-				[ "$ieee80211w" -gt "0" ] && {
+-					if [ "$auth_type" = "eap192" ]; then
+-						append bss_conf "group_mgmt_cipher=BIP-GMAC-256" "$N"
+-					else
+-						append bss_conf "group_mgmt_cipher=${ieee80211w_mgmt_cipher:-AES-128-CMAC}" "$N"
+-					fi
+-					[ -n "$ieee80211w_max_timeout" ] && \
+-						append bss_conf "assoc_sa_query_max_timeout=$ieee80211w_max_timeout" "$N"
+-					[ -n "$ieee80211w_retry_timeout" ] && \
+-						append bss_conf "assoc_sa_query_retry_timeout=$ieee80211w_retry_timeout" "$N"
+-				}
+-			;;
+-		esac
+-	fi
+-
+-	_macfile="/var/run/hostapd-$ifname.maclist"
+-	case "$macfilter" in
+-		allow)
+-			append bss_conf "macaddr_acl=1" "$N"
+-			append bss_conf "accept_mac_file=$_macfile" "$N"
+-			# accept_mac_file can be used to set MAC to VLAN ID mapping
+-			vlan_possible=1
+-		;;
+-		deny)
+-			append bss_conf "macaddr_acl=0" "$N"
+-			append bss_conf "deny_mac_file=$_macfile" "$N"
+-		;;
+-		*)
+-			_macfile=""
+-		;;
+-	esac
+-
+-	[ -n "$_macfile" ] && {
+-		json_get_vars macfile
+-		json_get_values maclist maclist
+-
+-		rm -f "$_macfile"
+-		(
+-			for mac in $maclist; do
+-				echo "$mac"
+-			done
+-			[ -n "$macfile" -a -f "$macfile" ] && cat "$macfile"
+-		) > "$_macfile"
+-	}
+-
+-	[ -n "$vlan_possible" -a -n "$dynamic_vlan" ] && {
+-		json_get_vars vlan_naming vlan_tagged_interface vlan_bridge vlan_file vlan_no_bridge
+-		set_default vlan_naming 1
+-		[ -z "$vlan_file" ] && set_default vlan_file /var/run/hostapd-$ifname.vlan
+-		append bss_conf "dynamic_vlan=$dynamic_vlan" "$N"
+-		append bss_conf "vlan_naming=$vlan_naming" "$N"
+-		if [ -n "$vlan_bridge" ]; then
+-			append bss_conf "vlan_bridge=$vlan_bridge" "$N"
+-		else
+-			set_default vlan_no_bridge 1
+-		fi
+-		append bss_conf "vlan_no_bridge=$vlan_no_bridge" "$N"
+-		[ -n "$vlan_tagged_interface" ] && \
+-			append bss_conf "vlan_tagged_interface=$vlan_tagged_interface" "$N"
+-		[ -n "$vlan_file" ] && {
+-			[ -e "$vlan_file" ] || touch "$vlan_file"
+-			append bss_conf "vlan_file=$vlan_file" "$N"
+-		}
+-	}
+-
+-	json_get_vars iw_enabled iw_internet iw_asra iw_esr iw_uesa iw_access_network_type
+-	json_get_vars iw_hessid iw_venue_group iw_venue_type iw_network_auth_type
+-	json_get_vars iw_roaming_consortium iw_domain_name iw_anqp_3gpp_cell_net iw_nai_realm
+-	json_get_vars iw_anqp_elem iw_qos_map_set iw_ipaddr_type_availability iw_gas_address3
+-	json_get_vars iw_venue_name iw_venue_url
+-
+-	set_default iw_enabled 0
+-	if [ "$iw_enabled" = "1" ]; then
+-		append bss_conf "interworking=1" "$N"
+-		set_default iw_internet 1
+-		set_default iw_asra 0
+-		set_default iw_esr 0
+-		set_default iw_uesa 0
+-
+-		append bss_conf "internet=$iw_internet" "$N"
+-		append bss_conf "asra=$iw_asra" "$N"
+-		append bss_conf "esr=$iw_esr" "$N"
+-		append bss_conf "uesa=$iw_uesa" "$N"
+-
+-		[ -n "$iw_access_network_type" ] && \
+-			append bss_conf "access_network_type=$iw_access_network_type" "$N"
+-		[ -n "$iw_hessid" ] && append bss_conf "hessid=$iw_hessid" "$N"
+-		[ -n "$iw_venue_group" ] && \
+-			append bss_conf "venue_group=$iw_venue_group" "$N"
+-		[ -n "$iw_venue_type" ] && append bss_conf "venue_type=$iw_venue_type" "$N"
+-		[ -n "$iw_network_auth_type" ] && \
+-			append bss_conf "network_auth_type=$iw_network_auth_type" "$N"
+-		[ -n "$iw_gas_address3" ] && append bss_conf "gas_address3=$iw_gas_address3" "$N"
+-
+-		json_for_each_item append_iw_roaming_consortium iw_roaming_consortium
+-		json_for_each_item append_iw_anqp_elem iw_anqp_elem
+-		json_for_each_item append_iw_nai_realm iw_nai_realm
+-		json_for_each_item append_iw_venue_name iw_venue_name
+-		json_for_each_item append_iw_venue_url iw_venue_url
+-
+-		iw_domain_name_conf=
+-		json_for_each_item append_iw_domain_name iw_domain_name
+-		[ -n "$iw_domain_name_conf" ] && \
+-			append bss_conf "domain_name=$iw_domain_name_conf" "$N"
+-
+-		iw_anqp_3gpp_cell_net_conf=
+-		json_for_each_item append_iw_anqp_3gpp_cell_net iw_anqp_3gpp_cell_net
+-		[ -n "$iw_anqp_3gpp_cell_net_conf" ] && \
+-			append bss_conf "anqp_3gpp_cell_net=$iw_anqp_3gpp_cell_net_conf" "$N"
+-	fi
+-
+-	set_default iw_qos_map_set 0,0,2,16,1,1,255,255,18,22,24,38,40,40,44,46,48,56
+-	case "$iw_qos_map_set" in
+-		*,*);;
+-		*) iw_qos_map_set="";;
+-	esac
+-	[ -n "$iw_qos_map_set" ] && append bss_conf "qos_map_set=$iw_qos_map_set" "$N"
+-
+-	local hs20 disable_dgaf osen anqp_domain_id hs20_deauth_req_timeout \
+-		osu_ssid hs20_wan_metrics hs20_operating_class hs20_t_c_filename hs20_t_c_timestamp \
+-		hs20_t_c_server_url
+-	json_get_vars hs20 disable_dgaf osen anqp_domain_id hs20_deauth_req_timeout \
+-		osu_ssid hs20_wan_metrics hs20_operating_class hs20_t_c_filename hs20_t_c_timestamp \
+-		hs20_t_c_server_url
+-
+-	set_default hs20 0
+-	set_default disable_dgaf $hs20
+-	set_default osen 0
+-	set_default anqp_domain_id 0
+-	set_default hs20_deauth_req_timeout 60
+-	if [ "$hs20" = "1" ]; then
+-		append bss_conf "hs20=1" "$N"
+-		append_hs20_icons
+-		append bss_conf "disable_dgaf=$disable_dgaf" "$N"
+-		append bss_conf "osen=$osen" "$N"
+-		append bss_conf "anqp_domain_id=$anqp_domain_id" "$N"
+-		append bss_conf "hs20_deauth_req_timeout=$hs20_deauth_req_timeout" "$N"
+-		[ -n "$osu_ssid" ] && append bss_conf "osu_ssid=$osu_ssid" "$N"
+-		[ -n "$hs20_wan_metrics" ] && append bss_conf "hs20_wan_metrics=$hs20_wan_metrics" "$N"
+-		[ -n "$hs20_operating_class" ] && append bss_conf "hs20_operating_class=$hs20_operating_class" "$N"
+-		[ -n "$hs20_t_c_filename" ] && append bss_conf "hs20_t_c_filename=$hs20_t_c_filename" "$N"
+-		[ -n "$hs20_t_c_timestamp" ] && append bss_conf "hs20_t_c_timestamp=$hs20_t_c_timestamp" "$N"
+-		[ -n "$hs20_t_c_server_url" ] && append bss_conf "hs20_t_c_server_url=$hs20_t_c_server_url" "$N"
+-		json_for_each_item append_hs20_oper_friendly_name hs20_oper_friendly_name
+-		json_for_each_item append_hs20_conn_capab hs20_conn_capab
+-		json_for_each_item append_osu_provider osu_provider
+-		json_for_each_item append_operator_icon operator_icon
+-	fi
+-
+-	if [ "$eap_server" = "1" ]; then
+-		append bss_conf "eap_server=1" "$N"
+-		append bss_conf "eap_server_erp=1" "$N"
+-		[ -n "$eap_user_file" ] && append bss_conf "eap_user_file=$eap_user_file" "$N"
+-		[ -n "$ca_cert" ] && append bss_conf "ca_cert=$ca_cert" "$N"
+-		[ -n "$server_cert" ] && append bss_conf "server_cert=$server_cert" "$N"
+-		[ -n "$private_key" ] && append bss_conf "private_key=$private_key" "$N"
+-		[ -n "$private_key_passwd" ] && append bss_conf "private_key_passwd=$private_key_passwd" "$N"
+-		[ -n "$server_id" ] && append bss_conf "server_id=$server_id" "$N"
+-	fi
+-
+-	set_default multicast_to_unicast_all 0
+-	if [ "$multicast_to_unicast_all" -gt 0 ]; then
+-		append bss_conf "multicast_to_unicast=$multicast_to_unicast_all" "$N"
+-	fi
+-	set_default proxy_arp 0
+-	if [ "$proxy_arp" -gt 0 ]; then
+-		append bss_conf "proxy_arp=$proxy_arp" "$N"
+-	fi
+-
+-	set_default per_sta_vif 0
+-	if [ "$per_sta_vif" -gt 0 ]; then
+-		append bss_conf "per_sta_vif=$per_sta_vif" "$N"
+-	fi
+-
+-	json_get_values opts hostapd_bss_options
+-	for val in $opts; do
+-		append bss_conf "$val" "$N"
+-	done
+-
+-	bss_md5sum="$(echo $bss_conf | md5sum | cut -d" " -f1)"
+-	append bss_conf "config_id=$bss_md5sum" "$N"
+-
+-	append "$var" "$bss_conf" "$N"
+-	return 0
+-}
+-
+-hostapd_set_log_options() {
+-	local var="$1"
+-
+-	local log_level log_80211 log_8021x log_radius log_wpa log_driver log_iapp log_mlme
+-	json_get_vars log_level log_80211 log_8021x log_radius log_wpa log_driver log_iapp log_mlme
+-
+-	set_default log_level 2
+-	set_default log_80211  1
+-	set_default log_8021x  1
+-	set_default log_radius 1
+-	set_default log_wpa    1
+-	set_default log_driver 1
+-	set_default log_iapp   1
+-	set_default log_mlme   1
+-
+-	local log_mask="$(( \
+-		($log_80211  << 0) | \
+-		($log_8021x  << 1) | \
+-		($log_radius << 2) | \
+-		($log_wpa    << 3) | \
+-		($log_driver << 4) | \
+-		($log_iapp   << 5) | \
+-		($log_mlme   << 6)   \
+-	))"
+-
+-	append "$var" "logger_syslog=$log_mask" "$N"
+-	append "$var" "logger_syslog_level=$log_level" "$N"
+-	append "$var" "logger_stdout=$log_mask" "$N"
+-	append "$var" "logger_stdout_level=$log_level" "$N"
+-
+-	return 0
+-}
+-
+-_wpa_supplicant_common() {
+-	local ifname="$1"
+-
+-	_rpath="/var/run/wpa_supplicant"
+-	_config="${_rpath}-$ifname.conf"
+-}
+-
+-wpa_supplicant_teardown_interface() {
+-	_wpa_supplicant_common "$1"
+-	rm -rf "$_rpath/$1" "$_config"
+-}
+-
+-wpa_supplicant_prepare_interface() {
+-	local ifname="$1"
+-	_w_driver="$2"
+-
+-	_wpa_supplicant_common "$1"
+-
+-	json_get_vars mode wds multi_ap
+-
+-	[ -n "$network_bridge" ] && {
+-		fail=
+-		case "$mode" in
+-			adhoc)
+-				fail=1
+-			;;
+-			sta)
+-				[ "$wds" = 1 -o "$multi_ap" = 1 ] || fail=1
+-			;;
+-		esac
+-
+-		[ -n "$fail" ] && {
+-			wireless_setup_vif_failed BRIDGE_NOT_ALLOWED
+-			return 1
+-		}
+-	}
+-
+-	local ap_scan=
+-
+-	_w_mode="$mode"
+-
+-	[ "$mode" = adhoc ] && {
+-		ap_scan="ap_scan=2"
+-	}
+-
+-	local country_str=
+-	[ -n "$country" ] && {
+-		country_str="country=$country"
+-	}
+-
+-	multiap_flag_file="${_config}.is_multiap"
+-	if [ "$multi_ap" = "1" ]; then
+-		touch "$multiap_flag_file"
+-	else
+-		[ -e "$multiap_flag_file" ] && rm "$multiap_flag_file"
+-	fi
+-	wpa_supplicant_teardown_interface "$ifname"
+-	cat > "$_config" <<EOF
+-${scan_list:+freq_list=$scan_list}
+-$ap_scan
+-$country_str
+-EOF
+-	return 0
+-}
+-
+-wpa_supplicant_set_fixed_freq() {
+-	local freq="$1"
+-	local htmode="$2"
+-
+-	append network_data "fixed_freq=1" "$N$T"
+-	append network_data "frequency=$freq" "$N$T"
+-	case "$htmode" in
+-		NOHT) append network_data "disable_ht=1" "$N$T";;
+-		HE20|HT20|VHT20) append network_data "disable_ht40=1" "$N$T";;
+-		HT40*|VHT40|VHT80|VHT160|HE40|HE80|HE160) append network_data "ht40=1" "$N$T";;
+-	esac
+-	case "$htmode" in
+-		VHT*) append network_data "vht=1" "$N$T";;
+-	esac
+-	case "$htmode" in
+-		HE80|VHT80) append network_data "max_oper_chwidth=1" "$N$T";;
+-		HE160|VHT160) append network_data "max_oper_chwidth=2" "$N$T";;
+-		HE20|HE40|VHT20|VHT40) append network_data "max_oper_chwidth=0" "$N$T";;
+-		*) append network_data "disable_vht=1" "$N$T";;
+-	esac
+-}
+-
+-wpa_supplicant_add_network() {
+-	local ifname="$1"
+-	local freq="$2"
+-	local htmode="$3"
+-	local noscan="$4"
+-
+-	_wpa_supplicant_common "$1"
+-	wireless_vif_parse_encryption
+-
+-	json_get_vars \
+-		ssid bssid key \
+-		basic_rate mcast_rate \
+-		ieee80211w ieee80211r fils ocv \
+-		multi_ap \
+-		default_disabled
+-
+-	case "$auth_type" in
+-		sae|owe|eap192|eap-eap192)
+-			set_default ieee80211w 2
+-		;;
+-		psk-sae)
+-			set_default ieee80211w 1
+-		;;
+-	esac
+-
+-	set_default ieee80211r 0
+-	set_default multi_ap 0
+-	set_default default_disabled 0
+-
+-	local key_mgmt='NONE'
+-	local network_data=
+-	local T="	"
+-
+-	local scan_ssid="scan_ssid=1"
+-	local freq wpa_key_mgmt
+-
+-	[ "$_w_mode" = "adhoc" ] && {
+-		append network_data "mode=1" "$N$T"
+-		[ -n "$freq" ] && wpa_supplicant_set_fixed_freq "$freq" "$htmode"
+-		[ "$noscan" = "1" ] && append network_data "noscan=1" "$N$T"
+-
+-		scan_ssid="scan_ssid=0"
+-
+-		[ "$_w_driver" = "nl80211" ] ||	append wpa_key_mgmt "WPA-NONE"
+-	}
+-
+-	[ "$_w_mode" = "mesh" ] && {
+-		json_get_vars mesh_id mesh_fwding mesh_rssi_threshold encryption
+-		[ -n "$mesh_id" ] && ssid="${mesh_id}"
+-
+-		append network_data "mode=5" "$N$T"
+-		[ -n "$mesh_fwding" ] && append network_data "mesh_fwding=${mesh_fwding}" "$N$T"
+-		[ -n "$mesh_rssi_threshold" ] && append network_data "mesh_rssi_threshold=${mesh_rssi_threshold}" "$N$T"
+-		[ -n "$freq" ] && wpa_supplicant_set_fixed_freq "$freq" "$htmode"
+-		[ "$noscan" = "1" ] && append network_data "noscan=1" "$N$T"
+-		[ "$encryption" = "none" -o -z "$encryption" ] || append wpa_key_mgmt "SAE"
+-		scan_ssid=""
+-	}
+-
+-	[ "$_w_mode" = "sta" ] && {
+-		[ "$multi_ap" = 1 ] && append network_data "multi_ap_backhaul_sta=1" "$N$T"
+-		[ "$default_disabled" = 1 ] && append network_data "disabled=1" "$N$T"
+-	}
+-
+-	[ -n "$ocv" ] && append network_data "ocv=$ocv" "$N$T"
+-
+-	case "$auth_type" in
+-		none) ;;
+-		owe)
+-			hostapd_append_wpa_key_mgmt
+-			key_mgmt="$wpa_key_mgmt"
+-		;;
+-		wep)
+-			local wep_keyidx=0
+-			hostapd_append_wep_key network_data
+-			append network_data "wep_tx_keyidx=$wep_keyidx" "$N$T"
+-		;;
+-		wps)
+-			key_mgmt='WPS'
+-		;;
+-		psk|sae|psk-sae)
+-			local passphrase
+-
+-			if [ "$_w_mode" != "mesh" ]; then
+-				hostapd_append_wpa_key_mgmt
+-			fi
+-
+-			key_mgmt="$wpa_key_mgmt"
+-
+-			if [ "$_w_mode" = "mesh" ] || [ "$auth_type" = "sae" ]; then
+-				passphrase="sae_password=\"${key}\""
+-			else
+-				if [ ${#key} -eq 64 ]; then
+-					passphrase="psk=${key}"
+-				else
+-					passphrase="psk=\"${key}\""
+-				fi
+-			fi
+-			append network_data "$passphrase" "$N$T"
+-		;;
+-		eap|eap192|eap-eap192)
+-			hostapd_append_wpa_key_mgmt
+-			key_mgmt="$wpa_key_mgmt"
+-
+-			json_get_vars eap_type identity anonymous_identity ca_cert ca_cert_usesystem
+-
+-			[ "$fils" -gt 0 ] && append network_data "erp=1" "$N$T"
+-			if [ "$ca_cert_usesystem" -eq "1" -a -f "/etc/ssl/certs/ca-certificates.crt" ]; then
+-				append network_data "ca_cert=\"/etc/ssl/certs/ca-certificates.crt\"" "$N$T"
+-			else
+-				[ -n "$ca_cert" ] && append network_data "ca_cert=\"$ca_cert\"" "$N$T"
+-			fi
+-			[ -n "$identity" ] && append network_data "identity=\"$identity\"" "$N$T"
+-			[ -n "$anonymous_identity" ] && append network_data "anonymous_identity=\"$anonymous_identity\"" "$N$T"
+-			case "$eap_type" in
+-				tls)
+-					json_get_vars client_cert priv_key priv_key_pwd
+-					append network_data "client_cert=\"$client_cert\"" "$N$T"
+-					append network_data "private_key=\"$priv_key\"" "$N$T"
+-					append network_data "private_key_passwd=\"$priv_key_pwd\"" "$N$T"
+-
+-					json_get_vars subject_match
+-					[ -n "$subject_match" ] && append network_data "subject_match=\"$subject_match\"" "$N$T"
+-
+-					json_get_values altsubject_match altsubject_match
+-					if [ -n "$altsubject_match" ]; then
+-						local list=
+-						for x in $altsubject_match; do
+-							append list "$x" ";"
+-						done
+-						append network_data "altsubject_match=\"$list\"" "$N$T"
+-					fi
+-
+-					json_get_values domain_match domain_match
+-					if [ -n "$domain_match" ]; then
+-						local list=
+-						for x in $domain_match; do
+-							append list "$x" ";"
+-						done
+-						append network_data "domain_match=\"$list\"" "$N$T"
+-					fi
+-
+-					json_get_values domain_suffix_match domain_suffix_match
+-					if [ -n "$domain_suffix_match" ]; then
+-						local list=
+-						for x in $domain_suffix_match; do
+-							append list "$x" ";"
+-						done
+-						append network_data "domain_suffix_match=\"$list\"" "$N$T"
+-					fi
+-				;;
+-				fast|peap|ttls)
+-					json_get_vars auth password ca_cert2 ca_cert2_usesystem client_cert2 priv_key2 priv_key2_pwd
+-					set_default auth MSCHAPV2
+-
+-					if [ "$auth" = "EAP-TLS" ]; then
+-						if [ "$ca_cert2_usesystem" -eq "1" -a -f "/etc/ssl/certs/ca-certificates.crt" ]; then
+-							append network_data "ca_cert2=\"/etc/ssl/certs/ca-certificates.crt\"" "$N$T"
+-						else
+-							[ -n "$ca_cert2" ] && append network_data "ca_cert2=\"$ca_cert2\"" "$N$T"
+-						fi
+-						append network_data "client_cert2=\"$client_cert2\"" "$N$T"
+-						append network_data "private_key2=\"$priv_key2\"" "$N$T"
+-						append network_data "private_key2_passwd=\"$priv_key2_pwd\"" "$N$T"
+-					else
+-						append network_data "password=\"$password\"" "$N$T"
+-					fi
+-
+-					json_get_vars subject_match
+-					[ -n "$subject_match" ] && append network_data "subject_match=\"$subject_match\"" "$N$T"
+-
+-					json_get_values altsubject_match altsubject_match
+-					if [ -n "$altsubject_match" ]; then
+-						local list=
+-						for x in $altsubject_match; do
+-							append list "$x" ";"
+-						done
+-						append network_data "altsubject_match=\"$list\"" "$N$T"
+-					fi
+-
+-					json_get_values domain_match domain_match
+-					if [ -n "$domain_match" ]; then
+-						local list=
+-						for x in $domain_match; do
+-							append list "$x" ";"
+-						done
+-						append network_data "domain_match=\"$list\"" "$N$T"
+-					fi
+-
+-					json_get_values domain_suffix_match domain_suffix_match
+-					if [ -n "$domain_suffix_match" ]; then
+-						local list=
+-						for x in $domain_suffix_match; do
+-							append list "$x" ";"
+-						done
+-						append network_data "domain_suffix_match=\"$list\"" "$N$T"
+-					fi
+-
+-					phase2proto="auth="
+-					case "$auth" in
+-						"auth"*)
+-							phase2proto=""
+-						;;
+-						"EAP-"*)
+-							auth="$(echo $auth | cut -b 5- )"
+-							[ "$eap_type" = "ttls" ] &&
+-								phase2proto="autheap="
+-							json_get_vars subject_match2
+-							[ -n "$subject_match2" ] && append network_data "subject_match2=\"$subject_match2\"" "$N$T"
+-
+-							json_get_values altsubject_match2 altsubject_match2
+-							if [ -n "$altsubject_match2" ]; then
+-								local list=
+-								for x in $altsubject_match2; do
+-									append list "$x" ";"
+-								done
+-								append network_data "altsubject_match2=\"$list\"" "$N$T"
+-							fi
+-
+-							json_get_values domain_match2 domain_match2
+-							if [ -n "$domain_match2" ]; then
+-								local list=
+-								for x in $domain_match2; do
+-									append list "$x" ";"
+-								done
+-								append network_data "domain_match2=\"$list\"" "$N$T"
+-							fi
+-
+-							json_get_values domain_suffix_match2 domain_suffix_match2
+-							if [ -n "$domain_suffix_match2" ]; then
+-								local list=
+-								for x in $domain_suffix_match2; do
+-									append list "$x" ";"
+-								done
+-								append network_data "domain_suffix_match2=\"$list\"" "$N$T"
+-							fi
+-						;;
+-					esac
+-					append network_data "phase2=\"$phase2proto$auth\"" "$N$T"
+-				;;
+-			esac
+-			append network_data "eap=$(echo $eap_type | tr 'a-z' 'A-Z')" "$N$T"
+-		;;
+-	esac
+-
+-	[ "$wpa_cipher" = GCMP ] && {
+-		append network_data "pairwise=GCMP" "$N$T"
+-		append network_data "group=GCMP" "$N$T"
+-	}
+-
+-	[ "$mode" = mesh ] || {
+-		case "$wpa" in
+-			1)
+-				append network_data "proto=WPA" "$N$T"
+-			;;
+-			2)
+-				append network_data "proto=RSN" "$N$T"
+-			;;
+-		esac
+-
+-		case "$ieee80211w" in
+-			[012])
+-				[ "$wpa" -ge 2 ] && append network_data "ieee80211w=$ieee80211w" "$N$T"
+-			;;
+-		esac
+-	}
+-	[ -n "$bssid" ] && append network_data "bssid=$bssid" "$N$T"
+-	[ -n "$beacon_int" ] && append network_data "beacon_int=$beacon_int" "$N$T"
+-
+-	local bssid_blacklist bssid_whitelist
+-	json_get_values bssid_blacklist bssid_blacklist
+-	json_get_values bssid_whitelist bssid_whitelist
+-
+-	[ -n "$bssid_blacklist" ] && append network_data "bssid_blacklist=$bssid_blacklist" "$N$T"
+-	[ -n "$bssid_whitelist" ] && append network_data "bssid_whitelist=$bssid_whitelist" "$N$T"
+-
+-	[ -n "$basic_rate" ] && {
+-		local br rate_list=
+-		for br in $basic_rate; do
+-			wpa_supplicant_add_rate rate_list "$br"
+-		done
+-		[ -n "$rate_list" ] && append network_data "rates=$rate_list" "$N$T"
+-	}
+-
+-	[ -n "$mcast_rate" ] && {
+-		local mc_rate=
+-		wpa_supplicant_add_rate mc_rate "$mcast_rate"
+-		append network_data "mcast_rate=$mc_rate" "$N$T"
+-	}
+-
+-	if [ "$key_mgmt" = "WPS" ]; then
+-		echo "wps_cred_processing=1" >> "$_config"
+-	else
+-		cat >> "$_config" <<EOF
+-network={
+-	$scan_ssid
+-	ssid="$ssid"
+-	key_mgmt=$key_mgmt
+-	$network_data
+-}
+-EOF
+-	fi
+-	return 0
+-}
+-
+-wpa_supplicant_run() {
+-	local ifname="$1"
+-	local hostapd_ctrl="$2"
+-
+-	_wpa_supplicant_common "$ifname"
+-
+-	ubus wait_for wpa_supplicant
+-	local supplicant_res="$(ubus call wpa_supplicant config_add "{ \
+-		\"driver\": \"${_w_driver:-wext}\", \"ctrl\": \"$_rpath\", \
+-		\"iface\": \"$ifname\", \"config\": \"$_config\" \
+-		${network_bridge:+, \"bridge\": \"$network_bridge\"} \
+-		${hostapd_ctrl:+, \"hostapd_ctrl\": \"$hostapd_ctrl\"} \
+-		}")"
+-
+-	ret="$?"
+-
+-	[ "$ret" != 0 -o -z "$supplicant_res" ] && wireless_setup_vif_failed WPA_SUPPLICANT_FAILED
+-
+-	wireless_add_process "$(jsonfilter -s "$supplicant_res" -l 1 -e @.pid)" "/usr/sbin/wpa_supplicant" 1 1
+-
+-	return $ret
+-}
+-
+-hostapd_common_cleanup() {
+-	killall meshd-nl80211
+-}
+diff --git a/package/network/services/hostapd/files/multicall.c b/package/network/services/hostapd/files/multicall.c
+deleted file mode 100644
+index c8e814bb5c..0000000000
+--- a/package/network/services/hostapd/files/multicall.c
++++ /dev/null
+@@ -1,28 +0,0 @@
+-#include <stdio.h>
+-#include <string.h>
+-#include <stdbool.h>
+-
+-extern int hostapd_main(int argc, char **argv);
+-extern int wpa_supplicant_main(int argc, char **argv);
+-
+-int main(int argc, char **argv)
+-{
+-	bool restart = false;
+-	const char *prog = argv[0];
+-
+-restart:
+-	if (strstr(argv[0], "hostapd"))
+-		return hostapd_main(argc, argv);
+-	else if (strstr(argv[0], "wpa_supplicant"))
+-		return wpa_supplicant_main(argc, argv);
+-
+-	if (!restart && argc > 1) {
+-		argv++;
+-		argc--;
+-		restart = true;
+-		goto restart;
+-	}
+-
+-	fprintf(stderr, "Invalid command.\nUsage: %s wpa_supplicant|hostapd [<arguments>]\n", prog);
+-	return 255;
+-}
+diff --git a/package/network/services/hostapd/files/wpa_supplicant-basic.config b/package/network/services/hostapd/files/wpa_supplicant-basic.config
+deleted file mode 100644
+index 6abd8e2331..0000000000
+--- a/package/network/services/hostapd/files/wpa_supplicant-basic.config
++++ /dev/null
+@@ -1,625 +0,0 @@
+-# Example wpa_supplicant build time configuration
+-#
+-# This file lists the configuration options that are used when building the
+-# wpa_supplicant binary. All lines starting with # are ignored. Configuration
+-# option lines must be commented out complete, if they are not to be included,
+-# i.e., just setting VARIABLE=n is not disabling that variable.
+-#
+-# This file is included in Makefile, so variables like CFLAGS and LIBS can also
+-# be modified from here. In most cases, these lines should use += in order not
+-# to override previous values of the variables.
+-
+-
+-# Uncomment following two lines and fix the paths if you have installed OpenSSL
+-# or GnuTLS in non-default location
+-#CFLAGS += -I/usr/local/openssl/include
+-#LIBS += -L/usr/local/openssl/lib
+-
+-# Some Red Hat versions seem to include kerberos header files from OpenSSL, but
+-# the kerberos files are not in the default include path. Following line can be
+-# used to fix build issues on such systems (krb5.h not found).
+-#CFLAGS += -I/usr/include/kerberos
+-
+-# Driver interface for generic Linux wireless extensions
+-# Note: WEXT is deprecated in the current Linux kernel version and no new
+-# functionality is added to it. nl80211-based interface is the new
+-# replacement for WEXT and its use allows wpa_supplicant to properly control
+-# the driver to improve existing functionality like roaming and to support new
+-# functionality.
+-CONFIG_DRIVER_WEXT=y
+-
+-# Driver interface for Linux drivers using the nl80211 kernel interface
+-CONFIG_DRIVER_NL80211=y
+-
+-# QCA vendor extensions to nl80211
+-#CONFIG_DRIVER_NL80211_QCA=y
+-
+-# driver_nl80211.c requires libnl. If you are compiling it yourself
+-# you may need to point hostapd to your version of libnl.
+-#
+-#CFLAGS += -I$<path to libnl include files>
+-#LIBS += -L$<path to libnl library files>
+-
+-# Use libnl v2.0 (or 3.0) libraries.
+-#CONFIG_LIBNL20=y
+-
+-# Use libnl 3.2 libraries (if this is selected, CONFIG_LIBNL20 is ignored)
+-#CONFIG_LIBNL32=y
+-
+-
+-# Driver interface for FreeBSD net80211 layer (e.g., Atheros driver)
+-#CONFIG_DRIVER_BSD=y
+-#CFLAGS += -I/usr/local/include
+-#LIBS += -L/usr/local/lib
+-#LIBS_p += -L/usr/local/lib
+-#LIBS_c += -L/usr/local/lib
+-
+-# Driver interface for Windows NDIS
+-#CONFIG_DRIVER_NDIS=y
+-#CFLAGS += -I/usr/include/w32api/ddk
+-#LIBS += -L/usr/local/lib
+-# For native build using mingw
+-#CONFIG_NATIVE_WINDOWS=y
+-# Additional directories for cross-compilation on Linux host for mingw target
+-#CFLAGS += -I/opt/mingw/mingw32/include/ddk
+-#LIBS += -L/opt/mingw/mingw32/lib
+-#CC=mingw32-gcc
+-# By default, driver_ndis uses WinPcap for low-level operations. This can be
+-# replaced with the following option which replaces WinPcap calls with NDISUIO.
+-# However, this requires that WZC is disabled (net stop wzcsvc) before starting
+-# wpa_supplicant.
+-# CONFIG_USE_NDISUIO=y
+-
+-# Driver interface for wired Ethernet drivers
+-CONFIG_DRIVER_WIRED=y
+-
+-# Driver interface for MACsec capable Qualcomm Atheros drivers
+-#CONFIG_DRIVER_MACSEC_QCA=y
+-
+-# Driver interface for Linux MACsec drivers
+-#CONFIG_DRIVER_MACSEC_LINUX=y
+-
+-# Driver interface for the Broadcom RoboSwitch family
+-#CONFIG_DRIVER_ROBOSWITCH=y
+-
+-# Driver interface for no driver (e.g., WPS ER only)
+-#CONFIG_DRIVER_NONE=y
+-
+-# Solaris libraries
+-#LIBS += -lsocket -ldlpi -lnsl
+-#LIBS_c += -lsocket
+-
+-# Enable IEEE 802.1X Supplicant (automatically included if any EAP method or
+-# MACsec is included)
+-#CONFIG_IEEE8021X_EAPOL=y
+-
+-# EAP-MD5
+-#CONFIG_EAP_MD5=y
+-
+-# EAP-MSCHAPv2
+-#CONFIG_EAP_MSCHAPV2=y
+-
+-# EAP-TLS
+-#CONFIG_EAP_TLS=y
+-
+-# EAL-PEAP
+-#CONFIG_EAP_PEAP=y
+-
+-# EAP-TTLS
+-#CONFIG_EAP_TTLS=y
+-
+-# EAP-FAST
+-#CONFIG_EAP_FAST=y
+-
+-# EAP-TEAP
+-# Note: The current EAP-TEAP implementation is experimental and should not be
+-# enabled for production use. The IETF RFC 7170 that defines EAP-TEAP has number
+-# of conflicting statements and missing details and the implementation has
+-# vendor specific workarounds for those and as such, may not interoperate with
+-# any other implementation. This should not be used for anything else than
+-# experimentation and interoperability testing until those issues has been
+-# resolved.
+-#CONFIG_EAP_TEAP=y
+-
+-# EAP-GTC
+-#CONFIG_EAP_GTC=y
+-
+-# EAP-OTP
+-#CONFIG_EAP_OTP=y
+-
+-# EAP-SIM (enable CONFIG_PCSC, if EAP-SIM is used)
+-#CONFIG_EAP_SIM=y
+-
+-# Enable SIM simulator (Milenage) for EAP-SIM
+-#CONFIG_SIM_SIMULATOR=y
+-
+-# EAP-PSK (experimental; this is _not_ needed for WPA-PSK)
+-#CONFIG_EAP_PSK=y
+-
+-# EAP-pwd (secure authentication using only a password)
+-#CONFIG_EAP_PWD=y
+-
+-# EAP-PAX
+-#CONFIG_EAP_PAX=y
+-
+-# LEAP
+-#CONFIG_EAP_LEAP=y
+-
+-# EAP-AKA (enable CONFIG_PCSC, if EAP-AKA is used)
+-#CONFIG_EAP_AKA=y
+-
+-# EAP-AKA' (enable CONFIG_PCSC, if EAP-AKA' is used).
+-# This requires CONFIG_EAP_AKA to be enabled, too.
+-#CONFIG_EAP_AKA_PRIME=y
+-
+-# Enable USIM simulator (Milenage) for EAP-AKA
+-#CONFIG_USIM_SIMULATOR=y
+-
+-# EAP-SAKE
+-#CONFIG_EAP_SAKE=y
+-
+-# EAP-GPSK
+-#CONFIG_EAP_GPSK=y
+-# Include support for optional SHA256 cipher suite in EAP-GPSK
+-#CONFIG_EAP_GPSK_SHA256=y
+-
+-# EAP-TNC and related Trusted Network Connect support (experimental)
+-#CONFIG_EAP_TNC=y
+-
+-# Wi-Fi Protected Setup (WPS)
+-#CONFIG_WPS=y
+-# Enable WPS external registrar functionality
+-#CONFIG_WPS_ER=y
+-# Disable credentials for an open network by default when acting as a WPS
+-# registrar.
+-#CONFIG_WPS_REG_DISABLE_OPEN=y
+-# Enable WPS support with NFC config method
+-#CONFIG_WPS_NFC=y
+-
+-# EAP-IKEv2
+-#CONFIG_EAP_IKEV2=y
+-
+-# EAP-EKE
+-#CONFIG_EAP_EKE=y
+-
+-# MACsec
+-#CONFIG_MACSEC=y
+-
+-# PKCS#12 (PFX) support (used to read private key and certificate file from
+-# a file that usually has extension .p12 or .pfx)
+-#CONFIG_PKCS12=y
+-
+-# Smartcard support (i.e., private key on a smartcard), e.g., with openssl
+-# engine.
+-#CONFIG_SMARTCARD=y
+-
+-# PC/SC interface for smartcards (USIM, GSM SIM)
+-# Enable this if EAP-SIM or EAP-AKA is included
+-#CONFIG_PCSC=y
+-
+-# Support HT overrides (disable HT/HT40, mask MCS rates, etc.)
+-CONFIG_HT_OVERRIDES=y
+-
+-# Support VHT overrides (disable VHT, mask MCS rates, etc.)
+-CONFIG_VHT_OVERRIDES=y
+-
+-# Development testing
+-#CONFIG_EAPOL_TEST=y
+-
+-# Select control interface backend for external programs, e.g, wpa_cli:
+-# unix = UNIX domain sockets (default for Linux/*BSD)
+-# udp = UDP sockets using localhost (127.0.0.1)
+-# udp6 = UDP IPv6 sockets using localhost (::1)
+-# named_pipe = Windows Named Pipe (default for Windows)
+-# udp-remote = UDP sockets with remote access (only for tests systems/purpose)
+-# udp6-remote = UDP IPv6 sockets with remote access (only for tests purpose)
+-# y = use default (backwards compatibility)
+-# If this option is commented out, control interface is not included in the
+-# build.
+-CONFIG_CTRL_IFACE=y
+-
+-# Include support for GNU Readline and History Libraries in wpa_cli.
+-# When building a wpa_cli binary for distribution, please note that these
+-# libraries are licensed under GPL and as such, BSD license may not apply for
+-# the resulting binary.
+-#CONFIG_READLINE=y
+-
+-# Include internal line edit mode in wpa_cli. This can be used as a replacement
+-# for GNU Readline to provide limited command line editing and history support.
+-#CONFIG_WPA_CLI_EDIT=y
+-
+-# Remove debugging code that is printing out debug message to stdout.
+-# This can be used to reduce the size of the wpa_supplicant considerably
+-# if debugging code is not needed. The size reduction can be around 35%
+-# (e.g., 90 kB).
+-#CONFIG_NO_STDOUT_DEBUG=y
+-
+-# Remove WPA support, e.g., for wired-only IEEE 802.1X supplicant, to save
+-# 35-50 kB in code size.
+-#CONFIG_NO_WPA=y
+-
+-# Remove IEEE 802.11i/WPA-Personal ASCII passphrase support
+-# This option can be used to reduce code size by removing support for
+-# converting ASCII passphrases into PSK. If this functionality is removed, the
+-# PSK can only be configured as the 64-octet hexstring (e.g., from
+-# wpa_passphrase). This saves about 0.5 kB in code size.
+-#CONFIG_NO_WPA_PASSPHRASE=y
+-
+-# Simultaneous Authentication of Equals (SAE), WPA3-Personal
+-#CONFIG_SAE=y
+-
+-# Disable scan result processing (ap_mode=1) to save code size by about 1 kB.
+-# This can be used if ap_scan=1 mode is never enabled.
+-#CONFIG_NO_SCAN_PROCESSING=y
+-
+-# Select configuration backend:
+-# file = text file (e.g., wpa_supplicant.conf; note: the configuration file
+-#	path is given on command line, not here; this option is just used to
+-#	select the backend that allows configuration files to be used)
+-# winreg = Windows registry (see win_example.reg for an example)
+-CONFIG_BACKEND=file
+-
+-# Remove configuration write functionality (i.e., to allow the configuration
+-# file to be updated based on runtime configuration changes). The runtime
+-# configuration can still be changed, the changes are just not going to be
+-# persistent over restarts. This option can be used to reduce code size by
+-# about 3.5 kB.
+-CONFIG_NO_CONFIG_WRITE=y
+-
+-# Remove support for configuration blobs to reduce code size by about 1.5 kB.
+-#CONFIG_NO_CONFIG_BLOBS=y
+-
+-# Select program entry point implementation:
+-# main = UNIX/POSIX like main() function (default)
+-# main_winsvc = Windows service (read parameters from registry)
+-# main_none = Very basic example (development use only)
+-#CONFIG_MAIN=main
+-
+-# Select wrapper for operating system and C library specific functions
+-# unix = UNIX/POSIX like systems (default)
+-# win32 = Windows systems
+-# none = Empty template
+-#CONFIG_OS=unix
+-
+-# Select event loop implementation
+-# eloop = select() loop (default)
+-# eloop_win = Windows events and WaitForMultipleObject() loop
+-#CONFIG_ELOOP=eloop
+-
+-# Should we use poll instead of select? Select is used by default.
+-#CONFIG_ELOOP_POLL=y
+-
+-# Should we use epoll instead of select? Select is used by default.
+-CONFIG_ELOOP_EPOLL=y
+-
+-# Should we use kqueue instead of select? Select is used by default.
+-#CONFIG_ELOOP_KQUEUE=y
+-
+-# Select layer 2 packet implementation
+-# linux = Linux packet socket (default)
+-# pcap = libpcap/libdnet/WinPcap
+-# freebsd = FreeBSD libpcap
+-# winpcap = WinPcap with receive thread
+-# ndis = Windows NDISUIO (note: requires CONFIG_USE_NDISUIO=y)
+-# none = Empty template
+-#CONFIG_L2_PACKET=linux
+-
+-# Disable Linux packet socket workaround applicable for station interface
+-# in a bridge for EAPOL frames. This should be uncommented only if the kernel
+-# is known to not have the regression issue in packet socket behavior with
+-# bridge interfaces (commit 'bridge: respect RFC2863 operational state')').
+-CONFIG_NO_LINUX_PACKET_SOCKET_WAR=y
+-
+-# IEEE 802.11w (management frame protection), also known as PMF
+-# Driver support is also needed for IEEE 802.11w.
+-#CONFIG_IEEE80211W=y
+-
+-# Support Operating Channel Validation
+-CONFIG_OCV=y
+-
+-# Select TLS implementation
+-# openssl = OpenSSL (default)
+-# gnutls = GnuTLS
+-# internal = Internal TLSv1 implementation (experimental)
+-# linux = Linux kernel AF_ALG and internal TLSv1 implementation (experimental)
+-# none = Empty template
+-CONFIG_TLS=internal
+-
+-# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.1)
+-# can be enabled to get a stronger construction of messages when block ciphers
+-# are used. It should be noted that some existing TLS v1.0 -based
+-# implementation may not be compatible with TLS v1.1 message (ClientHello is
+-# sent prior to negotiating which version will be used)
+-#CONFIG_TLSV11=y
+-
+-# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.2)
+-# can be enabled to enable use of stronger crypto algorithms. It should be
+-# noted that some existing TLS v1.0 -based implementation may not be compatible
+-# with TLS v1.2 message (ClientHello is sent prior to negotiating which version
+-# will be used)
+-#CONFIG_TLSV12=y
+-
+-# Select which ciphers to use by default with OpenSSL if the user does not
+-# specify them.
+-#CONFIG_TLS_DEFAULT_CIPHERS="DEFAULT:!EXP:!LOW"
+-
+-# If CONFIG_TLS=internal is used, additional library and include paths are
+-# needed for LibTomMath. Alternatively, an integrated, minimal version of
+-# LibTomMath can be used. See beginning of libtommath.c for details on benefits
+-# and drawbacks of this option.
+-#CONFIG_INTERNAL_LIBTOMMATH=y
+-#ifndef CONFIG_INTERNAL_LIBTOMMATH
+-#LTM_PATH=/usr/src/libtommath-0.39
+-#CFLAGS += -I$(LTM_PATH)
+-#LIBS += -L$(LTM_PATH)
+-#LIBS_p += -L$(LTM_PATH)
+-#endif
+-# At the cost of about 4 kB of additional binary size, the internal LibTomMath
+-# can be configured to include faster routines for exptmod, sqr, and div to
+-# speed up DH and RSA calculation considerably
+-#CONFIG_INTERNAL_LIBTOMMATH_FAST=y
+-
+-# Include NDIS event processing through WMI into wpa_supplicant/wpasvc.
+-# This is only for Windows builds and requires WMI-related header files and
+-# WbemUuid.Lib from Platform SDK even when building with MinGW.
+-#CONFIG_NDIS_EVENTS_INTEGRATED=y
+-#PLATFORMSDKLIB="/opt/Program Files/Microsoft Platform SDK/Lib"
+-
+-# Add support for new DBus control interface
+-# (fi.w1.hostap.wpa_supplicant1)
+-#CONFIG_CTRL_IFACE_DBUS_NEW=y
+-
+-# Add introspection support for new DBus control interface
+-#CONFIG_CTRL_IFACE_DBUS_INTRO=y
+-
+-# Add support for loading EAP methods dynamically as shared libraries.
+-# When this option is enabled, each EAP method can be either included
+-# statically (CONFIG_EAP_<method>=y) or dynamically (CONFIG_EAP_<method>=dyn).
+-# Dynamic EAP methods are build as shared objects (eap_*.so) and they need to
+-# be loaded in the beginning of the wpa_supplicant configuration file
+-# (see load_dynamic_eap parameter in the example file) before being used in
+-# the network blocks.
+-#
+-# Note that some shared parts of EAP methods are included in the main program
+-# and in order to be able to use dynamic EAP methods using these parts, the
+-# main program must have been build with the EAP method enabled (=y or =dyn).
+-# This means that EAP-TLS/PEAP/TTLS/FAST cannot be added as dynamic libraries
+-# unless at least one of them was included in the main build to force inclusion
+-# of the shared code. Similarly, at least one of EAP-SIM/AKA must be included
+-# in the main build to be able to load these methods dynamically.
+-#
+-# Please also note that using dynamic libraries will increase the total binary
+-# size. Thus, it may not be the best option for targets that have limited
+-# amount of memory/flash.
+-#CONFIG_DYNAMIC_EAP_METHODS=y
+-
+-# IEEE Std 802.11r-2008 (Fast BSS Transition) for station mode
+-CONFIG_IEEE80211R=y
+-
+-# Add support for writing debug log to a file (/tmp/wpa_supplicant-log-#.txt)
+-#CONFIG_DEBUG_FILE=y
+-
+-# Send debug messages to syslog instead of stdout
+-CONFIG_DEBUG_SYSLOG=y
+-# Set syslog facility for debug messages
+-CONFIG_DEBUG_SYSLOG_FACILITY=LOG_DAEMON
+-
+-# Add support for sending all debug messages (regardless of debug verbosity)
+-# to the Linux kernel tracing facility. This helps debug the entire stack by
+-# making it easy to record everything happening from the driver up into the
+-# same file, e.g., using trace-cmd.
+-#CONFIG_DEBUG_LINUX_TRACING=y
+-
+-# Add support for writing debug log to Android logcat instead of standard
+-# output
+-#CONFIG_ANDROID_LOG=y
+-
+-# Enable privilege separation (see README 'Privilege separation' for details)
+-#CONFIG_PRIVSEP=y
+-
+-# Enable mitigation against certain attacks against TKIP by delaying Michael
+-# MIC error reports by a random amount of time between 0 and 60 seconds
+-#CONFIG_DELAYED_MIC_ERROR_REPORT=y
+-
+-# Enable tracing code for developer debugging
+-# This tracks use of memory allocations and other registrations and reports
+-# incorrect use with a backtrace of call (or allocation) location.
+-#CONFIG_WPA_TRACE=y
+-# For BSD, uncomment these.
+-#LIBS += -lexecinfo
+-#LIBS_p += -lexecinfo
+-#LIBS_c += -lexecinfo
+-
+-# Use libbfd to get more details for developer debugging
+-# This enables use of libbfd to get more detailed symbols for the backtraces
+-# generated by CONFIG_WPA_TRACE=y.
+-#CONFIG_WPA_TRACE_BFD=y
+-# For BSD, uncomment these.
+-#LIBS += -lbfd -liberty -lz
+-#LIBS_p += -lbfd -liberty -lz
+-#LIBS_c += -lbfd -liberty -lz
+-
+-# wpa_supplicant depends on strong random number generation being available
+-# from the operating system. os_get_random() function is used to fetch random
+-# data when needed, e.g., for key generation. On Linux and BSD systems, this
+-# works by reading /dev/urandom. It should be noted that the OS entropy pool
+-# needs to be properly initialized before wpa_supplicant is started. This is
+-# important especially on embedded devices that do not have a hardware random
+-# number generator and may by default start up with minimal entropy available
+-# for random number generation.
+-#
+-# As a safety net, wpa_supplicant is by default trying to internally collect
+-# additional entropy for generating random data to mix in with the data fetched
+-# from the OS. This by itself is not considered to be very strong, but it may
+-# help in cases where the system pool is not initialized properly. However, it
+-# is very strongly recommended that the system pool is initialized with enough
+-# entropy either by using hardware assisted random number generator or by
+-# storing state over device reboots.
+-#
+-# wpa_supplicant can be configured to maintain its own entropy store over
+-# restarts to enhance random number generation. This is not perfect, but it is
+-# much more secure than using the same sequence of random numbers after every
+-# reboot. This can be enabled with -e<entropy file> command line option. The
+-# specified file needs to be readable and writable by wpa_supplicant.
+-#
+-# If the os_get_random() is known to provide strong random data (e.g., on
+-# Linux/BSD, the board in question is known to have reliable source of random
+-# data from /dev/urandom), the internal wpa_supplicant random pool can be
+-# disabled. This will save some in binary size and CPU use. However, this
+-# should only be considered for builds that are known to be used on devices
+-# that meet the requirements described above.
+-CONFIG_NO_RANDOM_POOL=y
+-
+-# Should we attempt to use the getrandom(2) call that provides more reliable
+-# yet secure randomness source than /dev/random on Linux 3.17 and newer.
+-# Requires glibc 2.25 to build, falls back to /dev/random if unavailable.
+-CONFIG_GETRANDOM=y
+-
+-# IEEE 802.11n (High Throughput) support (mainly for AP mode)
+-#CONFIG_IEEE80211N=y
+-
+-# IEEE 802.11ac (Very High Throughput) support (mainly for AP mode)
+-# (depends on CONFIG_IEEE80211N)
+-#CONFIG_IEEE80211AC=y
+-
+-# Wireless Network Management (IEEE Std 802.11v-2011)
+-# Note: This is experimental and not complete implementation.
+-#CONFIG_WNM=y
+-
+-# Interworking (IEEE 802.11u)
+-# This can be used to enable functionality to improve interworking with
+-# external networks (GAS/ANQP to learn more about the networks and network
+-# selection based on available credentials).
+-#CONFIG_INTERWORKING=y
+-
+-# Hotspot 2.0
+-#CONFIG_HS20=y
+-
+-# Enable interface matching in wpa_supplicant
+-#CONFIG_MATCH_IFACE=y
+-
+-# Disable roaming in wpa_supplicant
+-#CONFIG_NO_ROAMING=y
+-
+-# AP mode operations with wpa_supplicant
+-# This can be used for controlling AP mode operations with wpa_supplicant. It
+-# should be noted that this is mainly aimed at simple cases like
+-# WPA2-Personal while more complex configurations like WPA2-Enterprise with an
+-# external RADIUS server can be supported with hostapd.
+-#CONFIG_AP=y
+-
+-# P2P (Wi-Fi Direct)
+-# This can be used to enable P2P support in wpa_supplicant. See README-P2P for
+-# more information on P2P operations.
+-#CONFIG_P2P=y
+-
+-# Enable TDLS support
+-#CONFIG_TDLS=y
+-
+-# Wi-Fi Display
+-# This can be used to enable Wi-Fi Display extensions for P2P using an external
+-# program to control the additional information exchanges in the messages.
+-#CONFIG_WIFI_DISPLAY=y
+-
+-# Autoscan
+-# This can be used to enable automatic scan support in wpa_supplicant.
+-# See wpa_supplicant.conf for more information on autoscan usage.
+-#
+-# Enabling directly a module will enable autoscan support.
+-# For exponential module:
+-#CONFIG_AUTOSCAN_EXPONENTIAL=y
+-# For periodic module:
+-#CONFIG_AUTOSCAN_PERIODIC=y
+-
+-# Password (and passphrase, etc.) backend for external storage
+-# These optional mechanisms can be used to add support for storing passwords
+-# and other secrets in external (to wpa_supplicant) location. This allows, for
+-# example, operating system specific key storage to be used
+-#
+-# External password backend for testing purposes (developer use)
+-#CONFIG_EXT_PASSWORD_TEST=y
+-
+-# Enable Fast Session Transfer (FST)
+-#CONFIG_FST=y
+-
+-# Enable CLI commands for FST testing
+-#CONFIG_FST_TEST=y
+-
+-# OS X builds. This is only for building eapol_test.
+-#CONFIG_OSX=y
+-
+-# Automatic Channel Selection
+-# This will allow wpa_supplicant to pick the channel automatically when channel
+-# is set to "0".
+-#
+-# TODO: Extend parser to be able to parse "channel=acs_survey" as an alternative
+-# to "channel=0". This would enable us to eventually add other ACS algorithms in
+-# similar way.
+-#
+-# Automatic selection is currently only done through initialization, later on
+-# we hope to do background checks to keep us moving to more ideal channels as
+-# time goes by. ACS is currently only supported through the nl80211 driver and
+-# your driver must have survey dump capability that is filled by the driver
+-# during scanning.
+-#
+-# TODO: In analogy to hostapd be able to customize the ACS survey algorithm with
+-# a newly to create wpa_supplicant.conf variable acs_num_scans.
+-#
+-# Supported ACS drivers:
+-# * ath9k
+-# * ath5k
+-# * ath10k
+-#
+-# For more details refer to:
+-# http://wireless.kernel.org/en/users/Documentation/acs
+-#CONFIG_ACS=y
+-
+-# Support Multi Band Operation
+-#CONFIG_MBO=y
+-
+-# Fast Initial Link Setup (FILS) (IEEE 802.11ai)
+-#CONFIG_FILS=y
+-# FILS shared key authentication with PFS
+-#CONFIG_FILS_SK_PFS=y
+-
+-# Support RSN on IBSS networks
+-# This is needed to be able to use mode=1 network profile with proto=RSN and
+-# key_mgmt=WPA-PSK (i.e., full key management instead of WPA-None).
+-#CONFIG_IBSS_RSN=y
+-
+-# External PMKSA cache control
+-# This can be used to enable control interface commands that allow the current
+-# PMKSA cache entries to be fetched and new entries to be added.
+-#CONFIG_PMKSA_CACHE_EXTERNAL=y
+-
+-# Mesh Networking (IEEE 802.11s)
+-#CONFIG_MESH=y
+-
+-# Background scanning modules
+-# These can be used to request wpa_supplicant to perform background scanning
+-# operations for roaming within an ESS (same SSID). See the bgscan parameter in
+-# the wpa_supplicant.conf file for more details.
+-# Periodic background scans based on signal strength
+-#CONFIG_BGSCAN_SIMPLE=y
+-# Learn channels used by the network and try to avoid bgscans on other
+-# channels (experimental)
+-#CONFIG_BGSCAN_LEARN=y
+-
+-# Opportunistic Wireless Encryption (OWE)
+-# Experimental implementation of draft-harkins-owe-07.txt
+-#CONFIG_OWE=y
+-
+-# Device Provisioning Protocol (DPP)
+-# This requires CONFIG_IEEE80211W=y to be enabled, too. (see
+-# wpa_supplicant/README-DPP for details)
+-#CONFIG_DPP=y
+-
+-# uBus IPC/RPC System
+-# Services can connect to the bus and provide methods
+-# that can be called by other services or clients.
+-CONFIG_UBUS=y
+-
+-# OpenWrt patch 380-disable-ctrl-iface-mib.patch
+-# leads to the MIB only being compiled in if
+-# CONFIG_CTRL_IFACE_MIB is enabled.
+-#CONFIG_CTRL_IFACE_MIB=y
+diff --git a/package/network/services/hostapd/files/wpa_supplicant-full.config b/package/network/services/hostapd/files/wpa_supplicant-full.config
+deleted file mode 100644
+index d24fbbb01f..0000000000
+--- a/package/network/services/hostapd/files/wpa_supplicant-full.config
++++ /dev/null
+@@ -1,625 +0,0 @@
+-# Example wpa_supplicant build time configuration
+-#
+-# This file lists the configuration options that are used when building the
+-# wpa_supplicant binary. All lines starting with # are ignored. Configuration
+-# option lines must be commented out complete, if they are not to be included,
+-# i.e., just setting VARIABLE=n is not disabling that variable.
+-#
+-# This file is included in Makefile, so variables like CFLAGS and LIBS can also
+-# be modified from here. In most cases, these lines should use += in order not
+-# to override previous values of the variables.
+-
+-
+-# Uncomment following two lines and fix the paths if you have installed OpenSSL
+-# or GnuTLS in non-default location
+-#CFLAGS += -I/usr/local/openssl/include
+-#LIBS += -L/usr/local/openssl/lib
+-
+-# Some Red Hat versions seem to include kerberos header files from OpenSSL, but
+-# the kerberos files are not in the default include path. Following line can be
+-# used to fix build issues on such systems (krb5.h not found).
+-#CFLAGS += -I/usr/include/kerberos
+-
+-# Driver interface for generic Linux wireless extensions
+-# Note: WEXT is deprecated in the current Linux kernel version and no new
+-# functionality is added to it. nl80211-based interface is the new
+-# replacement for WEXT and its use allows wpa_supplicant to properly control
+-# the driver to improve existing functionality like roaming and to support new
+-# functionality.
+-CONFIG_DRIVER_WEXT=y
+-
+-# Driver interface for Linux drivers using the nl80211 kernel interface
+-CONFIG_DRIVER_NL80211=y
+-
+-# QCA vendor extensions to nl80211
+-#CONFIG_DRIVER_NL80211_QCA=y
+-
+-# driver_nl80211.c requires libnl. If you are compiling it yourself
+-# you may need to point hostapd to your version of libnl.
+-#
+-#CFLAGS += -I$<path to libnl include files>
+-#LIBS += -L$<path to libnl library files>
+-
+-# Use libnl v2.0 (or 3.0) libraries.
+-#CONFIG_LIBNL20=y
+-
+-# Use libnl 3.2 libraries (if this is selected, CONFIG_LIBNL20 is ignored)
+-#CONFIG_LIBNL32=y
+-
+-
+-# Driver interface for FreeBSD net80211 layer (e.g., Atheros driver)
+-#CONFIG_DRIVER_BSD=y
+-#CFLAGS += -I/usr/local/include
+-#LIBS += -L/usr/local/lib
+-#LIBS_p += -L/usr/local/lib
+-#LIBS_c += -L/usr/local/lib
+-
+-# Driver interface for Windows NDIS
+-#CONFIG_DRIVER_NDIS=y
+-#CFLAGS += -I/usr/include/w32api/ddk
+-#LIBS += -L/usr/local/lib
+-# For native build using mingw
+-#CONFIG_NATIVE_WINDOWS=y
+-# Additional directories for cross-compilation on Linux host for mingw target
+-#CFLAGS += -I/opt/mingw/mingw32/include/ddk
+-#LIBS += -L/opt/mingw/mingw32/lib
+-#CC=mingw32-gcc
+-# By default, driver_ndis uses WinPcap for low-level operations. This can be
+-# replaced with the following option which replaces WinPcap calls with NDISUIO.
+-# However, this requires that WZC is disabled (net stop wzcsvc) before starting
+-# wpa_supplicant.
+-# CONFIG_USE_NDISUIO=y
+-
+-# Driver interface for wired Ethernet drivers
+-CONFIG_DRIVER_WIRED=y
+-
+-# Driver interface for MACsec capable Qualcomm Atheros drivers
+-#CONFIG_DRIVER_MACSEC_QCA=y
+-
+-# Driver interface for Linux MACsec drivers
+-#CONFIG_DRIVER_MACSEC_LINUX=y
+-
+-# Driver interface for the Broadcom RoboSwitch family
+-#CONFIG_DRIVER_ROBOSWITCH=y
+-
+-# Driver interface for no driver (e.g., WPS ER only)
+-#CONFIG_DRIVER_NONE=y
+-
+-# Solaris libraries
+-#LIBS += -lsocket -ldlpi -lnsl
+-#LIBS_c += -lsocket
+-
+-# Enable IEEE 802.1X Supplicant (automatically included if any EAP method or
+-# MACsec is included)
+-CONFIG_IEEE8021X_EAPOL=y
+-
+-# EAP-MD5
+-CONFIG_EAP_MD5=y
+-
+-# EAP-MSCHAPv2
+-CONFIG_EAP_MSCHAPV2=y
+-
+-# EAP-TLS
+-CONFIG_EAP_TLS=y
+-
+-# EAL-PEAP
+-CONFIG_EAP_PEAP=y
+-
+-# EAP-TTLS
+-CONFIG_EAP_TTLS=y
+-
+-# EAP-FAST
+-CONFIG_EAP_FAST=y
+-
+-# EAP-TEAP
+-# Note: The current EAP-TEAP implementation is experimental and should not be
+-# enabled for production use. The IETF RFC 7170 that defines EAP-TEAP has number
+-# of conflicting statements and missing details and the implementation has
+-# vendor specific workarounds for those and as such, may not interoperate with
+-# any other implementation. This should not be used for anything else than
+-# experimentation and interoperability testing until those issues has been
+-# resolved.
+-#CONFIG_EAP_TEAP=y
+-
+-# EAP-GTC
+-CONFIG_EAP_GTC=y
+-
+-# EAP-OTP
+-CONFIG_EAP_OTP=y
+-
+-# EAP-SIM (enable CONFIG_PCSC, if EAP-SIM is used)
+-#CONFIG_EAP_SIM=y
+-
+-# Enable SIM simulator (Milenage) for EAP-SIM
+-#CONFIG_SIM_SIMULATOR=y
+-
+-# EAP-PSK (experimental; this is _not_ needed for WPA-PSK)
+-#CONFIG_EAP_PSK=y
+-
+-# EAP-pwd (secure authentication using only a password)
+-#CONFIG_EAP_PWD=y
+-
+-# EAP-PAX
+-#CONFIG_EAP_PAX=y
+-
+-# LEAP
+-CONFIG_EAP_LEAP=y
+-
+-# EAP-AKA (enable CONFIG_PCSC, if EAP-AKA is used)
+-#CONFIG_EAP_AKA=y
+-
+-# EAP-AKA' (enable CONFIG_PCSC, if EAP-AKA' is used).
+-# This requires CONFIG_EAP_AKA to be enabled, too.
+-#CONFIG_EAP_AKA_PRIME=y
+-
+-# Enable USIM simulator (Milenage) for EAP-AKA
+-#CONFIG_USIM_SIMULATOR=y
+-
+-# EAP-SAKE
+-#CONFIG_EAP_SAKE=y
+-
+-# EAP-GPSK
+-#CONFIG_EAP_GPSK=y
+-# Include support for optional SHA256 cipher suite in EAP-GPSK
+-#CONFIG_EAP_GPSK_SHA256=y
+-
+-# EAP-TNC and related Trusted Network Connect support (experimental)
+-#CONFIG_EAP_TNC=y
+-
+-# Wi-Fi Protected Setup (WPS)
+-CONFIG_WPS=y
+-# Enable WPS external registrar functionality
+-#CONFIG_WPS_ER=y
+-# Disable credentials for an open network by default when acting as a WPS
+-# registrar.
+-#CONFIG_WPS_REG_DISABLE_OPEN=y
+-# Enable WPS support with NFC config method
+-#CONFIG_WPS_NFC=y
+-
+-# EAP-IKEv2
+-#CONFIG_EAP_IKEV2=y
+-
+-# EAP-EKE
+-#CONFIG_EAP_EKE=y
+-
+-# MACsec
+-#CONFIG_MACSEC=y
+-
+-# PKCS#12 (PFX) support (used to read private key and certificate file from
+-# a file that usually has extension .p12 or .pfx)
+-CONFIG_PKCS12=y
+-
+-# Smartcard support (i.e., private key on a smartcard), e.g., with openssl
+-# engine.
+-CONFIG_SMARTCARD=y
+-
+-# PC/SC interface for smartcards (USIM, GSM SIM)
+-# Enable this if EAP-SIM or EAP-AKA is included
+-#CONFIG_PCSC=y
+-
+-# Support HT overrides (disable HT/HT40, mask MCS rates, etc.)
+-CONFIG_HT_OVERRIDES=y
+-
+-# Support VHT overrides (disable VHT, mask MCS rates, etc.)
+-CONFIG_VHT_OVERRIDES=y
+-
+-# Development testing
+-#CONFIG_EAPOL_TEST=y
+-
+-# Select control interface backend for external programs, e.g, wpa_cli:
+-# unix = UNIX domain sockets (default for Linux/*BSD)
+-# udp = UDP sockets using localhost (127.0.0.1)
+-# udp6 = UDP IPv6 sockets using localhost (::1)
+-# named_pipe = Windows Named Pipe (default for Windows)
+-# udp-remote = UDP sockets with remote access (only for tests systems/purpose)
+-# udp6-remote = UDP IPv6 sockets with remote access (only for tests purpose)
+-# y = use default (backwards compatibility)
+-# If this option is commented out, control interface is not included in the
+-# build.
+-CONFIG_CTRL_IFACE=y
+-
+-# Include support for GNU Readline and History Libraries in wpa_cli.
+-# When building a wpa_cli binary for distribution, please note that these
+-# libraries are licensed under GPL and as such, BSD license may not apply for
+-# the resulting binary.
+-#CONFIG_READLINE=y
+-
+-# Include internal line edit mode in wpa_cli. This can be used as a replacement
+-# for GNU Readline to provide limited command line editing and history support.
+-#CONFIG_WPA_CLI_EDIT=y
+-
+-# Remove debugging code that is printing out debug message to stdout.
+-# This can be used to reduce the size of the wpa_supplicant considerably
+-# if debugging code is not needed. The size reduction can be around 35%
+-# (e.g., 90 kB).
+-#CONFIG_NO_STDOUT_DEBUG=y
+-
+-# Remove WPA support, e.g., for wired-only IEEE 802.1X supplicant, to save
+-# 35-50 kB in code size.
+-#CONFIG_NO_WPA=y
+-
+-# Remove IEEE 802.11i/WPA-Personal ASCII passphrase support
+-# This option can be used to reduce code size by removing support for
+-# converting ASCII passphrases into PSK. If this functionality is removed, the
+-# PSK can only be configured as the 64-octet hexstring (e.g., from
+-# wpa_passphrase). This saves about 0.5 kB in code size.
+-#CONFIG_NO_WPA_PASSPHRASE=y
+-
+-# Simultaneous Authentication of Equals (SAE), WPA3-Personal
+-#CONFIG_SAE=y
+-
+-# Disable scan result processing (ap_mode=1) to save code size by about 1 kB.
+-# This can be used if ap_scan=1 mode is never enabled.
+-#CONFIG_NO_SCAN_PROCESSING=y
+-
+-# Select configuration backend:
+-# file = text file (e.g., wpa_supplicant.conf; note: the configuration file
+-#	path is given on command line, not here; this option is just used to
+-#	select the backend that allows configuration files to be used)
+-# winreg = Windows registry (see win_example.reg for an example)
+-CONFIG_BACKEND=file
+-
+-# Remove configuration write functionality (i.e., to allow the configuration
+-# file to be updated based on runtime configuration changes). The runtime
+-# configuration can still be changed, the changes are just not going to be
+-# persistent over restarts. This option can be used to reduce code size by
+-# about 3.5 kB.
+-#CONFIG_NO_CONFIG_WRITE=y
+-
+-# Remove support for configuration blobs to reduce code size by about 1.5 kB.
+-#CONFIG_NO_CONFIG_BLOBS=y
+-
+-# Select program entry point implementation:
+-# main = UNIX/POSIX like main() function (default)
+-# main_winsvc = Windows service (read parameters from registry)
+-# main_none = Very basic example (development use only)
+-#CONFIG_MAIN=main
+-
+-# Select wrapper for operating system and C library specific functions
+-# unix = UNIX/POSIX like systems (default)
+-# win32 = Windows systems
+-# none = Empty template
+-#CONFIG_OS=unix
+-
+-# Select event loop implementation
+-# eloop = select() loop (default)
+-# eloop_win = Windows events and WaitForMultipleObject() loop
+-#CONFIG_ELOOP=eloop
+-
+-# Should we use poll instead of select? Select is used by default.
+-#CONFIG_ELOOP_POLL=y
+-
+-# Should we use epoll instead of select? Select is used by default.
+-CONFIG_ELOOP_EPOLL=y
+-
+-# Should we use kqueue instead of select? Select is used by default.
+-#CONFIG_ELOOP_KQUEUE=y
+-
+-# Select layer 2 packet implementation
+-# linux = Linux packet socket (default)
+-# pcap = libpcap/libdnet/WinPcap
+-# freebsd = FreeBSD libpcap
+-# winpcap = WinPcap with receive thread
+-# ndis = Windows NDISUIO (note: requires CONFIG_USE_NDISUIO=y)
+-# none = Empty template
+-#CONFIG_L2_PACKET=linux
+-
+-# Disable Linux packet socket workaround applicable for station interface
+-# in a bridge for EAPOL frames. This should be uncommented only if the kernel
+-# is known to not have the regression issue in packet socket behavior with
+-# bridge interfaces (commit 'bridge: respect RFC2863 operational state')').
+-CONFIG_NO_LINUX_PACKET_SOCKET_WAR=y
+-
+-# IEEE 802.11w (management frame protection), also known as PMF
+-# Driver support is also needed for IEEE 802.11w.
+-#CONFIG_IEEE80211W=y
+-
+-# Support Operating Channel Validation
+-CONFIG_OCV=y
+-
+-# Select TLS implementation
+-# openssl = OpenSSL (default)
+-# gnutls = GnuTLS
+-# internal = Internal TLSv1 implementation (experimental)
+-# linux = Linux kernel AF_ALG and internal TLSv1 implementation (experimental)
+-# none = Empty template
+-CONFIG_TLS=internal
+-
+-# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.1)
+-# can be enabled to get a stronger construction of messages when block ciphers
+-# are used. It should be noted that some existing TLS v1.0 -based
+-# implementation may not be compatible with TLS v1.1 message (ClientHello is
+-# sent prior to negotiating which version will be used)
+-#CONFIG_TLSV11=y
+-
+-# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.2)
+-# can be enabled to enable use of stronger crypto algorithms. It should be
+-# noted that some existing TLS v1.0 -based implementation may not be compatible
+-# with TLS v1.2 message (ClientHello is sent prior to negotiating which version
+-# will be used)
+-#CONFIG_TLSV12=y
+-
+-# Select which ciphers to use by default with OpenSSL if the user does not
+-# specify them.
+-#CONFIG_TLS_DEFAULT_CIPHERS="DEFAULT:!EXP:!LOW"
+-
+-# If CONFIG_TLS=internal is used, additional library and include paths are
+-# needed for LibTomMath. Alternatively, an integrated, minimal version of
+-# LibTomMath can be used. See beginning of libtommath.c for details on benefits
+-# and drawbacks of this option.
+-CONFIG_INTERNAL_LIBTOMMATH=y
+-#ifndef CONFIG_INTERNAL_LIBTOMMATH
+-#LTM_PATH=/usr/src/libtommath-0.39
+-#CFLAGS += -I$(LTM_PATH)
+-#LIBS += -L$(LTM_PATH)
+-#LIBS_p += -L$(LTM_PATH)
+-#endif
+-# At the cost of about 4 kB of additional binary size, the internal LibTomMath
+-# can be configured to include faster routines for exptmod, sqr, and div to
+-# speed up DH and RSA calculation considerably
+-CONFIG_INTERNAL_LIBTOMMATH_FAST=y
+-
+-# Include NDIS event processing through WMI into wpa_supplicant/wpasvc.
+-# This is only for Windows builds and requires WMI-related header files and
+-# WbemUuid.Lib from Platform SDK even when building with MinGW.
+-#CONFIG_NDIS_EVENTS_INTEGRATED=y
+-#PLATFORMSDKLIB="/opt/Program Files/Microsoft Platform SDK/Lib"
+-
+-# Add support for new DBus control interface
+-# (fi.w1.hostap.wpa_supplicant1)
+-#CONFIG_CTRL_IFACE_DBUS_NEW=y
+-
+-# Add introspection support for new DBus control interface
+-#CONFIG_CTRL_IFACE_DBUS_INTRO=y
+-
+-# Add support for loading EAP methods dynamically as shared libraries.
+-# When this option is enabled, each EAP method can be either included
+-# statically (CONFIG_EAP_<method>=y) or dynamically (CONFIG_EAP_<method>=dyn).
+-# Dynamic EAP methods are build as shared objects (eap_*.so) and they need to
+-# be loaded in the beginning of the wpa_supplicant configuration file
+-# (see load_dynamic_eap parameter in the example file) before being used in
+-# the network blocks.
+-#
+-# Note that some shared parts of EAP methods are included in the main program
+-# and in order to be able to use dynamic EAP methods using these parts, the
+-# main program must have been build with the EAP method enabled (=y or =dyn).
+-# This means that EAP-TLS/PEAP/TTLS/FAST cannot be added as dynamic libraries
+-# unless at least one of them was included in the main build to force inclusion
+-# of the shared code. Similarly, at least one of EAP-SIM/AKA must be included
+-# in the main build to be able to load these methods dynamically.
+-#
+-# Please also note that using dynamic libraries will increase the total binary
+-# size. Thus, it may not be the best option for targets that have limited
+-# amount of memory/flash.
+-#CONFIG_DYNAMIC_EAP_METHODS=y
+-
+-# IEEE Std 802.11r-2008 (Fast BSS Transition) for station mode
+-CONFIG_IEEE80211R=y
+-
+-# Add support for writing debug log to a file (/tmp/wpa_supplicant-log-#.txt)
+-#CONFIG_DEBUG_FILE=y
+-
+-# Send debug messages to syslog instead of stdout
+-CONFIG_DEBUG_SYSLOG=y
+-# Set syslog facility for debug messages
+-CONFIG_DEBUG_SYSLOG_FACILITY=LOG_DAEMON
+-
+-# Add support for sending all debug messages (regardless of debug verbosity)
+-# to the Linux kernel tracing facility. This helps debug the entire stack by
+-# making it easy to record everything happening from the driver up into the
+-# same file, e.g., using trace-cmd.
+-#CONFIG_DEBUG_LINUX_TRACING=y
+-
+-# Add support for writing debug log to Android logcat instead of standard
+-# output
+-#CONFIG_ANDROID_LOG=y
+-
+-# Enable privilege separation (see README 'Privilege separation' for details)
+-#CONFIG_PRIVSEP=y
+-
+-# Enable mitigation against certain attacks against TKIP by delaying Michael
+-# MIC error reports by a random amount of time between 0 and 60 seconds
+-#CONFIG_DELAYED_MIC_ERROR_REPORT=y
+-
+-# Enable tracing code for developer debugging
+-# This tracks use of memory allocations and other registrations and reports
+-# incorrect use with a backtrace of call (or allocation) location.
+-#CONFIG_WPA_TRACE=y
+-# For BSD, uncomment these.
+-#LIBS += -lexecinfo
+-#LIBS_p += -lexecinfo
+-#LIBS_c += -lexecinfo
+-
+-# Use libbfd to get more details for developer debugging
+-# This enables use of libbfd to get more detailed symbols for the backtraces
+-# generated by CONFIG_WPA_TRACE=y.
+-#CONFIG_WPA_TRACE_BFD=y
+-# For BSD, uncomment these.
+-#LIBS += -lbfd -liberty -lz
+-#LIBS_p += -lbfd -liberty -lz
+-#LIBS_c += -lbfd -liberty -lz
+-
+-# wpa_supplicant depends on strong random number generation being available
+-# from the operating system. os_get_random() function is used to fetch random
+-# data when needed, e.g., for key generation. On Linux and BSD systems, this
+-# works by reading /dev/urandom. It should be noted that the OS entropy pool
+-# needs to be properly initialized before wpa_supplicant is started. This is
+-# important especially on embedded devices that do not have a hardware random
+-# number generator and may by default start up with minimal entropy available
+-# for random number generation.
+-#
+-# As a safety net, wpa_supplicant is by default trying to internally collect
+-# additional entropy for generating random data to mix in with the data fetched
+-# from the OS. This by itself is not considered to be very strong, but it may
+-# help in cases where the system pool is not initialized properly. However, it
+-# is very strongly recommended that the system pool is initialized with enough
+-# entropy either by using hardware assisted random number generator or by
+-# storing state over device reboots.
+-#
+-# wpa_supplicant can be configured to maintain its own entropy store over
+-# restarts to enhance random number generation. This is not perfect, but it is
+-# much more secure than using the same sequence of random numbers after every
+-# reboot. This can be enabled with -e<entropy file> command line option. The
+-# specified file needs to be readable and writable by wpa_supplicant.
+-#
+-# If the os_get_random() is known to provide strong random data (e.g., on
+-# Linux/BSD, the board in question is known to have reliable source of random
+-# data from /dev/urandom), the internal wpa_supplicant random pool can be
+-# disabled. This will save some in binary size and CPU use. However, this
+-# should only be considered for builds that are known to be used on devices
+-# that meet the requirements described above.
+-CONFIG_NO_RANDOM_POOL=y
+-
+-# Should we attempt to use the getrandom(2) call that provides more reliable
+-# yet secure randomness source than /dev/random on Linux 3.17 and newer.
+-# Requires glibc 2.25 to build, falls back to /dev/random if unavailable.
+-CONFIG_GETRANDOM=y
+-
+-# IEEE 802.11n (High Throughput) support (mainly for AP mode)
+-#CONFIG_IEEE80211N=y
+-
+-# IEEE 802.11ac (Very High Throughput) support (mainly for AP mode)
+-# (depends on CONFIG_IEEE80211N)
+-#CONFIG_IEEE80211AC=y
+-
+-# Wireless Network Management (IEEE Std 802.11v-2011)
+-# Note: This is experimental and not complete implementation.
+-CONFIG_WNM=y
+-
+-# Interworking (IEEE 802.11u)
+-# This can be used to enable functionality to improve interworking with
+-# external networks (GAS/ANQP to learn more about the networks and network
+-# selection based on available credentials).
+-CONFIG_INTERWORKING=y
+-
+-# Hotspot 2.0
+-CONFIG_HS20=y
+-
+-# Enable interface matching in wpa_supplicant
+-#CONFIG_MATCH_IFACE=y
+-
+-# Disable roaming in wpa_supplicant
+-#CONFIG_NO_ROAMING=y
+-
+-# AP mode operations with wpa_supplicant
+-# This can be used for controlling AP mode operations with wpa_supplicant. It
+-# should be noted that this is mainly aimed at simple cases like
+-# WPA2-Personal while more complex configurations like WPA2-Enterprise with an
+-# external RADIUS server can be supported with hostapd.
+-#CONFIG_AP=y
+-
+-# P2P (Wi-Fi Direct)
+-# This can be used to enable P2P support in wpa_supplicant. See README-P2P for
+-# more information on P2P operations.
+-#CONFIG_P2P=y
+-
+-# Enable TDLS support
+-#CONFIG_TDLS=y
+-
+-# Wi-Fi Display
+-# This can be used to enable Wi-Fi Display extensions for P2P using an external
+-# program to control the additional information exchanges in the messages.
+-#CONFIG_WIFI_DISPLAY=y
+-
+-# Autoscan
+-# This can be used to enable automatic scan support in wpa_supplicant.
+-# See wpa_supplicant.conf for more information on autoscan usage.
+-#
+-# Enabling directly a module will enable autoscan support.
+-# For exponential module:
+-#CONFIG_AUTOSCAN_EXPONENTIAL=y
+-# For periodic module:
+-#CONFIG_AUTOSCAN_PERIODIC=y
+-
+-# Password (and passphrase, etc.) backend for external storage
+-# These optional mechanisms can be used to add support for storing passwords
+-# and other secrets in external (to wpa_supplicant) location. This allows, for
+-# example, operating system specific key storage to be used
+-#
+-# External password backend for testing purposes (developer use)
+-#CONFIG_EXT_PASSWORD_TEST=y
+-
+-# Enable Fast Session Transfer (FST)
+-#CONFIG_FST=y
+-
+-# Enable CLI commands for FST testing
+-#CONFIG_FST_TEST=y
+-
+-# OS X builds. This is only for building eapol_test.
+-#CONFIG_OSX=y
+-
+-# Automatic Channel Selection
+-# This will allow wpa_supplicant to pick the channel automatically when channel
+-# is set to "0".
+-#
+-# TODO: Extend parser to be able to parse "channel=acs_survey" as an alternative
+-# to "channel=0". This would enable us to eventually add other ACS algorithms in
+-# similar way.
+-#
+-# Automatic selection is currently only done through initialization, later on
+-# we hope to do background checks to keep us moving to more ideal channels as
+-# time goes by. ACS is currently only supported through the nl80211 driver and
+-# your driver must have survey dump capability that is filled by the driver
+-# during scanning.
+-#
+-# TODO: In analogy to hostapd be able to customize the ACS survey algorithm with
+-# a newly to create wpa_supplicant.conf variable acs_num_scans.
+-#
+-# Supported ACS drivers:
+-# * ath9k
+-# * ath5k
+-# * ath10k
+-#
+-# For more details refer to:
+-# http://wireless.kernel.org/en/users/Documentation/acs
+-#CONFIG_ACS=y
+-
+-# Support Multi Band Operation
+-#CONFIG_MBO=y
+-
+-# Fast Initial Link Setup (FILS) (IEEE 802.11ai)
+-CONFIG_FILS=y
+-# FILS shared key authentication with PFS
+-#CONFIG_FILS_SK_PFS=y
+-
+-# Support RSN on IBSS networks
+-# This is needed to be able to use mode=1 network profile with proto=RSN and
+-# key_mgmt=WPA-PSK (i.e., full key management instead of WPA-None).
+-CONFIG_IBSS_RSN=y
+-
+-# External PMKSA cache control
+-# This can be used to enable control interface commands that allow the current
+-# PMKSA cache entries to be fetched and new entries to be added.
+-#CONFIG_PMKSA_CACHE_EXTERNAL=y
+-
+-# Mesh Networking (IEEE 802.11s)
+-#CONFIG_MESH=y
+-
+-# Background scanning modules
+-# These can be used to request wpa_supplicant to perform background scanning
+-# operations for roaming within an ESS (same SSID). See the bgscan parameter in
+-# the wpa_supplicant.conf file for more details.
+-# Periodic background scans based on signal strength
+-#CONFIG_BGSCAN_SIMPLE=y
+-# Learn channels used by the network and try to avoid bgscans on other
+-# channels (experimental)
+-#CONFIG_BGSCAN_LEARN=y
+-
+-# Opportunistic Wireless Encryption (OWE)
+-# Experimental implementation of draft-harkins-owe-07.txt
+-#CONFIG_OWE=y
+-
+-# Device Provisioning Protocol (DPP)
+-# This requires CONFIG_IEEE80211W=y to be enabled, too. (see
+-# wpa_supplicant/README-DPP for details)
+-#CONFIG_DPP=y
+-
+-# uBus IPC/RPC System
+-# Services can connect to the bus and provide methods
+-# that can be called by other services or clients.
+-CONFIG_UBUS=y
+-
+-# OpenWrt patch 380-disable-ctrl-iface-mib.patch
+-# leads to the MIB only being compiled in if
+-# CONFIG_CTRL_IFACE_MIB is enabled.
+-CONFIG_CTRL_IFACE_MIB=y
+diff --git a/package/network/services/hostapd/files/wpa_supplicant-mini.config b/package/network/services/hostapd/files/wpa_supplicant-mini.config
+deleted file mode 100644
+index 9eb1111e52..0000000000
+--- a/package/network/services/hostapd/files/wpa_supplicant-mini.config
++++ /dev/null
+@@ -1,625 +0,0 @@
+-# Example wpa_supplicant build time configuration
+-#
+-# This file lists the configuration options that are used when building the
+-# wpa_supplicant binary. All lines starting with # are ignored. Configuration
+-# option lines must be commented out complete, if they are not to be included,
+-# i.e., just setting VARIABLE=n is not disabling that variable.
+-#
+-# This file is included in Makefile, so variables like CFLAGS and LIBS can also
+-# be modified from here. In most cases, these lines should use += in order not
+-# to override previous values of the variables.
+-
+-
+-# Uncomment following two lines and fix the paths if you have installed OpenSSL
+-# or GnuTLS in non-default location
+-#CFLAGS += -I/usr/local/openssl/include
+-#LIBS += -L/usr/local/openssl/lib
+-
+-# Some Red Hat versions seem to include kerberos header files from OpenSSL, but
+-# the kerberos files are not in the default include path. Following line can be
+-# used to fix build issues on such systems (krb5.h not found).
+-#CFLAGS += -I/usr/include/kerberos
+-
+-# Driver interface for generic Linux wireless extensions
+-# Note: WEXT is deprecated in the current Linux kernel version and no new
+-# functionality is added to it. nl80211-based interface is the new
+-# replacement for WEXT and its use allows wpa_supplicant to properly control
+-# the driver to improve existing functionality like roaming and to support new
+-# functionality.
+-CONFIG_DRIVER_WEXT=y
+-
+-# Driver interface for Linux drivers using the nl80211 kernel interface
+-CONFIG_DRIVER_NL80211=y
+-
+-# QCA vendor extensions to nl80211
+-#CONFIG_DRIVER_NL80211_QCA=y
+-
+-# driver_nl80211.c requires libnl. If you are compiling it yourself
+-# you may need to point hostapd to your version of libnl.
+-#
+-#CFLAGS += -I$<path to libnl include files>
+-#LIBS += -L$<path to libnl library files>
+-
+-# Use libnl v2.0 (or 3.0) libraries.
+-#CONFIG_LIBNL20=y
+-
+-# Use libnl 3.2 libraries (if this is selected, CONFIG_LIBNL20 is ignored)
+-#CONFIG_LIBNL32=y
+-
+-
+-# Driver interface for FreeBSD net80211 layer (e.g., Atheros driver)
+-#CONFIG_DRIVER_BSD=y
+-#CFLAGS += -I/usr/local/include
+-#LIBS += -L/usr/local/lib
+-#LIBS_p += -L/usr/local/lib
+-#LIBS_c += -L/usr/local/lib
+-
+-# Driver interface for Windows NDIS
+-#CONFIG_DRIVER_NDIS=y
+-#CFLAGS += -I/usr/include/w32api/ddk
+-#LIBS += -L/usr/local/lib
+-# For native build using mingw
+-#CONFIG_NATIVE_WINDOWS=y
+-# Additional directories for cross-compilation on Linux host for mingw target
+-#CFLAGS += -I/opt/mingw/mingw32/include/ddk
+-#LIBS += -L/opt/mingw/mingw32/lib
+-#CC=mingw32-gcc
+-# By default, driver_ndis uses WinPcap for low-level operations. This can be
+-# replaced with the following option which replaces WinPcap calls with NDISUIO.
+-# However, this requires that WZC is disabled (net stop wzcsvc) before starting
+-# wpa_supplicant.
+-# CONFIG_USE_NDISUIO=y
+-
+-# Driver interface for wired Ethernet drivers
+-CONFIG_DRIVER_WIRED=y
+-
+-# Driver interface for MACsec capable Qualcomm Atheros drivers
+-#CONFIG_DRIVER_MACSEC_QCA=y
+-
+-# Driver interface for Linux MACsec drivers
+-#CONFIG_DRIVER_MACSEC_LINUX=y
+-
+-# Driver interface for the Broadcom RoboSwitch family
+-#CONFIG_DRIVER_ROBOSWITCH=y
+-
+-# Driver interface for no driver (e.g., WPS ER only)
+-#CONFIG_DRIVER_NONE=y
+-
+-# Solaris libraries
+-#LIBS += -lsocket -ldlpi -lnsl
+-#LIBS_c += -lsocket
+-
+-# Enable IEEE 802.1X Supplicant (automatically included if any EAP method or
+-# MACsec is included)
+-#CONFIG_IEEE8021X_EAPOL=y
+-
+-# EAP-MD5
+-#CONFIG_EAP_MD5=y
+-
+-# EAP-MSCHAPv2
+-#CONFIG_EAP_MSCHAPV2=y
+-
+-# EAP-TLS
+-#CONFIG_EAP_TLS=y
+-
+-# EAL-PEAP
+-#CONFIG_EAP_PEAP=y
+-
+-# EAP-TTLS
+-#CONFIG_EAP_TTLS=y
+-
+-# EAP-FAST
+-#CONFIG_EAP_FAST=y
+-
+-# EAP-TEAP
+-# Note: The current EAP-TEAP implementation is experimental and should not be
+-# enabled for production use. The IETF RFC 7170 that defines EAP-TEAP has number
+-# of conflicting statements and missing details and the implementation has
+-# vendor specific workarounds for those and as such, may not interoperate with
+-# any other implementation. This should not be used for anything else than
+-# experimentation and interoperability testing until those issues has been
+-# resolved.
+-#CONFIG_EAP_TEAP=y
+-
+-# EAP-GTC
+-#CONFIG_EAP_GTC=y
+-
+-# EAP-OTP
+-#CONFIG_EAP_OTP=y
+-
+-# EAP-SIM (enable CONFIG_PCSC, if EAP-SIM is used)
+-#CONFIG_EAP_SIM=y
+-
+-# Enable SIM simulator (Milenage) for EAP-SIM
+-#CONFIG_SIM_SIMULATOR=y
+-
+-# EAP-PSK (experimental; this is _not_ needed for WPA-PSK)
+-#CONFIG_EAP_PSK=y
+-
+-# EAP-pwd (secure authentication using only a password)
+-#CONFIG_EAP_PWD=y
+-
+-# EAP-PAX
+-#CONFIG_EAP_PAX=y
+-
+-# LEAP
+-#CONFIG_EAP_LEAP=y
+-
+-# EAP-AKA (enable CONFIG_PCSC, if EAP-AKA is used)
+-#CONFIG_EAP_AKA=y
+-
+-# EAP-AKA' (enable CONFIG_PCSC, if EAP-AKA' is used).
+-# This requires CONFIG_EAP_AKA to be enabled, too.
+-#CONFIG_EAP_AKA_PRIME=y
+-
+-# Enable USIM simulator (Milenage) for EAP-AKA
+-#CONFIG_USIM_SIMULATOR=y
+-
+-# EAP-SAKE
+-#CONFIG_EAP_SAKE=y
+-
+-# EAP-GPSK
+-#CONFIG_EAP_GPSK=y
+-# Include support for optional SHA256 cipher suite in EAP-GPSK
+-#CONFIG_EAP_GPSK_SHA256=y
+-
+-# EAP-TNC and related Trusted Network Connect support (experimental)
+-#CONFIG_EAP_TNC=y
+-
+-# Wi-Fi Protected Setup (WPS)
+-#CONFIG_WPS=y
+-# Enable WPS external registrar functionality
+-#CONFIG_WPS_ER=y
+-# Disable credentials for an open network by default when acting as a WPS
+-# registrar.
+-#CONFIG_WPS_REG_DISABLE_OPEN=y
+-# Enable WPS support with NFC config method
+-#CONFIG_WPS_NFC=y
+-
+-# EAP-IKEv2
+-#CONFIG_EAP_IKEV2=y
+-
+-# EAP-EKE
+-#CONFIG_EAP_EKE=y
+-
+-# MACsec
+-#CONFIG_MACSEC=y
+-
+-# PKCS#12 (PFX) support (used to read private key and certificate file from
+-# a file that usually has extension .p12 or .pfx)
+-#CONFIG_PKCS12=y
+-
+-# Smartcard support (i.e., private key on a smartcard), e.g., with openssl
+-# engine.
+-#CONFIG_SMARTCARD=y
+-
+-# PC/SC interface for smartcards (USIM, GSM SIM)
+-# Enable this if EAP-SIM or EAP-AKA is included
+-#CONFIG_PCSC=y
+-
+-# Support HT overrides (disable HT/HT40, mask MCS rates, etc.)
+-CONFIG_HT_OVERRIDES=y
+-
+-# Support VHT overrides (disable VHT, mask MCS rates, etc.)
+-CONFIG_VHT_OVERRIDES=y
+-
+-# Development testing
+-#CONFIG_EAPOL_TEST=y
+-
+-# Select control interface backend for external programs, e.g, wpa_cli:
+-# unix = UNIX domain sockets (default for Linux/*BSD)
+-# udp = UDP sockets using localhost (127.0.0.1)
+-# udp6 = UDP IPv6 sockets using localhost (::1)
+-# named_pipe = Windows Named Pipe (default for Windows)
+-# udp-remote = UDP sockets with remote access (only for tests systems/purpose)
+-# udp6-remote = UDP IPv6 sockets with remote access (only for tests purpose)
+-# y = use default (backwards compatibility)
+-# If this option is commented out, control interface is not included in the
+-# build.
+-CONFIG_CTRL_IFACE=y
+-
+-# Include support for GNU Readline and History Libraries in wpa_cli.
+-# When building a wpa_cli binary for distribution, please note that these
+-# libraries are licensed under GPL and as such, BSD license may not apply for
+-# the resulting binary.
+-#CONFIG_READLINE=y
+-
+-# Include internal line edit mode in wpa_cli. This can be used as a replacement
+-# for GNU Readline to provide limited command line editing and history support.
+-#CONFIG_WPA_CLI_EDIT=y
+-
+-# Remove debugging code that is printing out debug message to stdout.
+-# This can be used to reduce the size of the wpa_supplicant considerably
+-# if debugging code is not needed. The size reduction can be around 35%
+-# (e.g., 90 kB).
+-#CONFIG_NO_STDOUT_DEBUG=y
+-
+-# Remove WPA support, e.g., for wired-only IEEE 802.1X supplicant, to save
+-# 35-50 kB in code size.
+-#CONFIG_NO_WPA=y
+-
+-# Remove IEEE 802.11i/WPA-Personal ASCII passphrase support
+-# This option can be used to reduce code size by removing support for
+-# converting ASCII passphrases into PSK. If this functionality is removed, the
+-# PSK can only be configured as the 64-octet hexstring (e.g., from
+-# wpa_passphrase). This saves about 0.5 kB in code size.
+-#CONFIG_NO_WPA_PASSPHRASE=y
+-
+-# Simultaneous Authentication of Equals (SAE), WPA3-Personal
+-#CONFIG_SAE=y
+-
+-# Disable scan result processing (ap_mode=1) to save code size by about 1 kB.
+-# This can be used if ap_scan=1 mode is never enabled.
+-#CONFIG_NO_SCAN_PROCESSING=y
+-
+-# Select configuration backend:
+-# file = text file (e.g., wpa_supplicant.conf; note: the configuration file
+-#	path is given on command line, not here; this option is just used to
+-#	select the backend that allows configuration files to be used)
+-# winreg = Windows registry (see win_example.reg for an example)
+-CONFIG_BACKEND=file
+-
+-# Remove configuration write functionality (i.e., to allow the configuration
+-# file to be updated based on runtime configuration changes). The runtime
+-# configuration can still be changed, the changes are just not going to be
+-# persistent over restarts. This option can be used to reduce code size by
+-# about 3.5 kB.
+-CONFIG_NO_CONFIG_WRITE=y
+-
+-# Remove support for configuration blobs to reduce code size by about 1.5 kB.
+-#CONFIG_NO_CONFIG_BLOBS=y
+-
+-# Select program entry point implementation:
+-# main = UNIX/POSIX like main() function (default)
+-# main_winsvc = Windows service (read parameters from registry)
+-# main_none = Very basic example (development use only)
+-#CONFIG_MAIN=main
+-
+-# Select wrapper for operating system and C library specific functions
+-# unix = UNIX/POSIX like systems (default)
+-# win32 = Windows systems
+-# none = Empty template
+-#CONFIG_OS=unix
+-
+-# Select event loop implementation
+-# eloop = select() loop (default)
+-# eloop_win = Windows events and WaitForMultipleObject() loop
+-#CONFIG_ELOOP=eloop
+-
+-# Should we use poll instead of select? Select is used by default.
+-#CONFIG_ELOOP_POLL=y
+-
+-# Should we use epoll instead of select? Select is used by default.
+-CONFIG_ELOOP_EPOLL=y
+-
+-# Should we use kqueue instead of select? Select is used by default.
+-#CONFIG_ELOOP_KQUEUE=y
+-
+-# Select layer 2 packet implementation
+-# linux = Linux packet socket (default)
+-# pcap = libpcap/libdnet/WinPcap
+-# freebsd = FreeBSD libpcap
+-# winpcap = WinPcap with receive thread
+-# ndis = Windows NDISUIO (note: requires CONFIG_USE_NDISUIO=y)
+-# none = Empty template
+-#CONFIG_L2_PACKET=linux
+-
+-# Disable Linux packet socket workaround applicable for station interface
+-# in a bridge for EAPOL frames. This should be uncommented only if the kernel
+-# is known to not have the regression issue in packet socket behavior with
+-# bridge interfaces (commit 'bridge: respect RFC2863 operational state')').
+-CONFIG_NO_LINUX_PACKET_SOCKET_WAR=y
+-
+-# IEEE 802.11w (management frame protection), also known as PMF
+-# Driver support is also needed for IEEE 802.11w.
+-#CONFIG_IEEE80211W=y
+-
+-# Support Operating Channel Validation
+-#CONFIG_OCV=y
+-
+-# Select TLS implementation
+-# openssl = OpenSSL (default)
+-# gnutls = GnuTLS
+-# internal = Internal TLSv1 implementation (experimental)
+-# linux = Linux kernel AF_ALG and internal TLSv1 implementation (experimental)
+-# none = Empty template
+-CONFIG_TLS=internal
+-
+-# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.1)
+-# can be enabled to get a stronger construction of messages when block ciphers
+-# are used. It should be noted that some existing TLS v1.0 -based
+-# implementation may not be compatible with TLS v1.1 message (ClientHello is
+-# sent prior to negotiating which version will be used)
+-#CONFIG_TLSV11=y
+-
+-# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.2)
+-# can be enabled to enable use of stronger crypto algorithms. It should be
+-# noted that some existing TLS v1.0 -based implementation may not be compatible
+-# with TLS v1.2 message (ClientHello is sent prior to negotiating which version
+-# will be used)
+-#CONFIG_TLSV12=y
+-
+-# Select which ciphers to use by default with OpenSSL if the user does not
+-# specify them.
+-#CONFIG_TLS_DEFAULT_CIPHERS="DEFAULT:!EXP:!LOW"
+-
+-# If CONFIG_TLS=internal is used, additional library and include paths are
+-# needed for LibTomMath. Alternatively, an integrated, minimal version of
+-# LibTomMath can be used. See beginning of libtommath.c for details on benefits
+-# and drawbacks of this option.
+-#CONFIG_INTERNAL_LIBTOMMATH=y
+-#ifndef CONFIG_INTERNAL_LIBTOMMATH
+-#LTM_PATH=/usr/src/libtommath-0.39
+-#CFLAGS += -I$(LTM_PATH)
+-#LIBS += -L$(LTM_PATH)
+-#LIBS_p += -L$(LTM_PATH)
+-#endif
+-# At the cost of about 4 kB of additional binary size, the internal LibTomMath
+-# can be configured to include faster routines for exptmod, sqr, and div to
+-# speed up DH and RSA calculation considerably
+-#CONFIG_INTERNAL_LIBTOMMATH_FAST=y
+-
+-# Include NDIS event processing through WMI into wpa_supplicant/wpasvc.
+-# This is only for Windows builds and requires WMI-related header files and
+-# WbemUuid.Lib from Platform SDK even when building with MinGW.
+-#CONFIG_NDIS_EVENTS_INTEGRATED=y
+-#PLATFORMSDKLIB="/opt/Program Files/Microsoft Platform SDK/Lib"
+-
+-# Add support for new DBus control interface
+-# (fi.w1.hostap.wpa_supplicant1)
+-#CONFIG_CTRL_IFACE_DBUS_NEW=y
+-
+-# Add introspection support for new DBus control interface
+-#CONFIG_CTRL_IFACE_DBUS_INTRO=y
+-
+-# Add support for loading EAP methods dynamically as shared libraries.
+-# When this option is enabled, each EAP method can be either included
+-# statically (CONFIG_EAP_<method>=y) or dynamically (CONFIG_EAP_<method>=dyn).
+-# Dynamic EAP methods are build as shared objects (eap_*.so) and they need to
+-# be loaded in the beginning of the wpa_supplicant configuration file
+-# (see load_dynamic_eap parameter in the example file) before being used in
+-# the network blocks.
+-#
+-# Note that some shared parts of EAP methods are included in the main program
+-# and in order to be able to use dynamic EAP methods using these parts, the
+-# main program must have been build with the EAP method enabled (=y or =dyn).
+-# This means that EAP-TLS/PEAP/TTLS/FAST cannot be added as dynamic libraries
+-# unless at least one of them was included in the main build to force inclusion
+-# of the shared code. Similarly, at least one of EAP-SIM/AKA must be included
+-# in the main build to be able to load these methods dynamically.
+-#
+-# Please also note that using dynamic libraries will increase the total binary
+-# size. Thus, it may not be the best option for targets that have limited
+-# amount of memory/flash.
+-#CONFIG_DYNAMIC_EAP_METHODS=y
+-
+-# IEEE Std 802.11r-2008 (Fast BSS Transition) for station mode
+-#CONFIG_IEEE80211R=y
+-
+-# Add support for writing debug log to a file (/tmp/wpa_supplicant-log-#.txt)
+-#CONFIG_DEBUG_FILE=y
+-
+-# Send debug messages to syslog instead of stdout
+-CONFIG_DEBUG_SYSLOG=y
+-# Set syslog facility for debug messages
+-CONFIG_DEBUG_SYSLOG_FACILITY=LOG_DAEMON
+-
+-# Add support for sending all debug messages (regardless of debug verbosity)
+-# to the Linux kernel tracing facility. This helps debug the entire stack by
+-# making it easy to record everything happening from the driver up into the
+-# same file, e.g., using trace-cmd.
+-#CONFIG_DEBUG_LINUX_TRACING=y
+-
+-# Add support for writing debug log to Android logcat instead of standard
+-# output
+-#CONFIG_ANDROID_LOG=y
+-
+-# Enable privilege separation (see README 'Privilege separation' for details)
+-#CONFIG_PRIVSEP=y
+-
+-# Enable mitigation against certain attacks against TKIP by delaying Michael
+-# MIC error reports by a random amount of time between 0 and 60 seconds
+-#CONFIG_DELAYED_MIC_ERROR_REPORT=y
+-
+-# Enable tracing code for developer debugging
+-# This tracks use of memory allocations and other registrations and reports
+-# incorrect use with a backtrace of call (or allocation) location.
+-#CONFIG_WPA_TRACE=y
+-# For BSD, uncomment these.
+-#LIBS += -lexecinfo
+-#LIBS_p += -lexecinfo
+-#LIBS_c += -lexecinfo
+-
+-# Use libbfd to get more details for developer debugging
+-# This enables use of libbfd to get more detailed symbols for the backtraces
+-# generated by CONFIG_WPA_TRACE=y.
+-#CONFIG_WPA_TRACE_BFD=y
+-# For BSD, uncomment these.
+-#LIBS += -lbfd -liberty -lz
+-#LIBS_p += -lbfd -liberty -lz
+-#LIBS_c += -lbfd -liberty -lz
+-
+-# wpa_supplicant depends on strong random number generation being available
+-# from the operating system. os_get_random() function is used to fetch random
+-# data when needed, e.g., for key generation. On Linux and BSD systems, this
+-# works by reading /dev/urandom. It should be noted that the OS entropy pool
+-# needs to be properly initialized before wpa_supplicant is started. This is
+-# important especially on embedded devices that do not have a hardware random
+-# number generator and may by default start up with minimal entropy available
+-# for random number generation.
+-#
+-# As a safety net, wpa_supplicant is by default trying to internally collect
+-# additional entropy for generating random data to mix in with the data fetched
+-# from the OS. This by itself is not considered to be very strong, but it may
+-# help in cases where the system pool is not initialized properly. However, it
+-# is very strongly recommended that the system pool is initialized with enough
+-# entropy either by using hardware assisted random number generator or by
+-# storing state over device reboots.
+-#
+-# wpa_supplicant can be configured to maintain its own entropy store over
+-# restarts to enhance random number generation. This is not perfect, but it is
+-# much more secure than using the same sequence of random numbers after every
+-# reboot. This can be enabled with -e<entropy file> command line option. The
+-# specified file needs to be readable and writable by wpa_supplicant.
+-#
+-# If the os_get_random() is known to provide strong random data (e.g., on
+-# Linux/BSD, the board in question is known to have reliable source of random
+-# data from /dev/urandom), the internal wpa_supplicant random pool can be
+-# disabled. This will save some in binary size and CPU use. However, this
+-# should only be considered for builds that are known to be used on devices
+-# that meet the requirements described above.
+-CONFIG_NO_RANDOM_POOL=y
+-
+-# Should we attempt to use the getrandom(2) call that provides more reliable
+-# yet secure randomness source than /dev/random on Linux 3.17 and newer.
+-# Requires glibc 2.25 to build, falls back to /dev/random if unavailable.
+-CONFIG_GETRANDOM=y
+-
+-# IEEE 802.11n (High Throughput) support (mainly for AP mode)
+-#CONFIG_IEEE80211N=y
+-
+-# IEEE 802.11ac (Very High Throughput) support (mainly for AP mode)
+-# (depends on CONFIG_IEEE80211N)
+-#CONFIG_IEEE80211AC=y
+-
+-# Wireless Network Management (IEEE Std 802.11v-2011)
+-# Note: This is experimental and not complete implementation.
+-#CONFIG_WNM=y
+-
+-# Interworking (IEEE 802.11u)
+-# This can be used to enable functionality to improve interworking with
+-# external networks (GAS/ANQP to learn more about the networks and network
+-# selection based on available credentials).
+-#CONFIG_INTERWORKING=y
+-
+-# Hotspot 2.0
+-#CONFIG_HS20=y
+-
+-# Enable interface matching in wpa_supplicant
+-#CONFIG_MATCH_IFACE=y
+-
+-# Disable roaming in wpa_supplicant
+-#CONFIG_NO_ROAMING=y
+-
+-# AP mode operations with wpa_supplicant
+-# This can be used for controlling AP mode operations with wpa_supplicant. It
+-# should be noted that this is mainly aimed at simple cases like
+-# WPA2-Personal while more complex configurations like WPA2-Enterprise with an
+-# external RADIUS server can be supported with hostapd.
+-#CONFIG_AP=y
+-
+-# P2P (Wi-Fi Direct)
+-# This can be used to enable P2P support in wpa_supplicant. See README-P2P for
+-# more information on P2P operations.
+-#CONFIG_P2P=y
+-
+-# Enable TDLS support
+-#CONFIG_TDLS=y
+-
+-# Wi-Fi Display
+-# This can be used to enable Wi-Fi Display extensions for P2P using an external
+-# program to control the additional information exchanges in the messages.
+-#CONFIG_WIFI_DISPLAY=y
+-
+-# Autoscan
+-# This can be used to enable automatic scan support in wpa_supplicant.
+-# See wpa_supplicant.conf for more information on autoscan usage.
+-#
+-# Enabling directly a module will enable autoscan support.
+-# For exponential module:
+-#CONFIG_AUTOSCAN_EXPONENTIAL=y
+-# For periodic module:
+-#CONFIG_AUTOSCAN_PERIODIC=y
+-
+-# Password (and passphrase, etc.) backend for external storage
+-# These optional mechanisms can be used to add support for storing passwords
+-# and other secrets in external (to wpa_supplicant) location. This allows, for
+-# example, operating system specific key storage to be used
+-#
+-# External password backend for testing purposes (developer use)
+-#CONFIG_EXT_PASSWORD_TEST=y
+-
+-# Enable Fast Session Transfer (FST)
+-#CONFIG_FST=y
+-
+-# Enable CLI commands for FST testing
+-#CONFIG_FST_TEST=y
+-
+-# OS X builds. This is only for building eapol_test.
+-#CONFIG_OSX=y
+-
+-# Automatic Channel Selection
+-# This will allow wpa_supplicant to pick the channel automatically when channel
+-# is set to "0".
+-#
+-# TODO: Extend parser to be able to parse "channel=acs_survey" as an alternative
+-# to "channel=0". This would enable us to eventually add other ACS algorithms in
+-# similar way.
+-#
+-# Automatic selection is currently only done through initialization, later on
+-# we hope to do background checks to keep us moving to more ideal channels as
+-# time goes by. ACS is currently only supported through the nl80211 driver and
+-# your driver must have survey dump capability that is filled by the driver
+-# during scanning.
+-#
+-# TODO: In analogy to hostapd be able to customize the ACS survey algorithm with
+-# a newly to create wpa_supplicant.conf variable acs_num_scans.
+-#
+-# Supported ACS drivers:
+-# * ath9k
+-# * ath5k
+-# * ath10k
+-#
+-# For more details refer to:
+-# http://wireless.kernel.org/en/users/Documentation/acs
+-#CONFIG_ACS=y
+-
+-# Support Multi Band Operation
+-#CONFIG_MBO=y
+-
+-# Fast Initial Link Setup (FILS) (IEEE 802.11ai)
+-#CONFIG_FILS=y
+-# FILS shared key authentication with PFS
+-#CONFIG_FILS_SK_PFS=y
+-
+-# Support RSN on IBSS networks
+-# This is needed to be able to use mode=1 network profile with proto=RSN and
+-# key_mgmt=WPA-PSK (i.e., full key management instead of WPA-None).
+-#CONFIG_IBSS_RSN=y
+-
+-# External PMKSA cache control
+-# This can be used to enable control interface commands that allow the current
+-# PMKSA cache entries to be fetched and new entries to be added.
+-#CONFIG_PMKSA_CACHE_EXTERNAL=y
+-
+-# Mesh Networking (IEEE 802.11s)
+-#CONFIG_MESH=y
+-
+-# Background scanning modules
+-# These can be used to request wpa_supplicant to perform background scanning
+-# operations for roaming within an ESS (same SSID). See the bgscan parameter in
+-# the wpa_supplicant.conf file for more details.
+-# Periodic background scans based on signal strength
+-#CONFIG_BGSCAN_SIMPLE=y
+-# Learn channels used by the network and try to avoid bgscans on other
+-# channels (experimental)
+-#CONFIG_BGSCAN_LEARN=y
+-
+-# Opportunistic Wireless Encryption (OWE)
+-# Experimental implementation of draft-harkins-owe-07.txt
+-#CONFIG_OWE=y
+-
+-# Device Provisioning Protocol (DPP)
+-# This requires CONFIG_IEEE80211W=y to be enabled, too. (see
+-# wpa_supplicant/README-DPP for details)
+-#CONFIG_DPP=y
+-
+-# uBus IPC/RPC System
+-# Services can connect to the bus and provide methods
+-# that can be called by other services or clients.
+-CONFIG_UBUS=y
+-
+-# OpenWrt patch 380-disable-ctrl-iface-mib.patch
+-# leads to the MIB only being compiled in if
+-# CONFIG_CTRL_IFACE_MIB is enabled.
+-#CONFIG_CTRL_IFACE_MIB=y
+diff --git a/package/network/services/hostapd/files/wpa_supplicant-p2p.config b/package/network/services/hostapd/files/wpa_supplicant-p2p.config
+deleted file mode 100644
+index 0dcc88e648..0000000000
+--- a/package/network/services/hostapd/files/wpa_supplicant-p2p.config
++++ /dev/null
+@@ -1,625 +0,0 @@
+-# Example wpa_supplicant build time configuration
+-#
+-# This file lists the configuration options that are used when building the
+-# wpa_supplicant binary. All lines starting with # are ignored. Configuration
+-# option lines must be commented out complete, if they are not to be included,
+-# i.e., just setting VARIABLE=n is not disabling that variable.
+-#
+-# This file is included in Makefile, so variables like CFLAGS and LIBS can also
+-# be modified from here. In most cases, these lines should use += in order not
+-# to override previous values of the variables.
+-
+-
+-# Uncomment following two lines and fix the paths if you have installed OpenSSL
+-# or GnuTLS in non-default location
+-#CFLAGS += -I/usr/local/openssl/include
+-#LIBS += -L/usr/local/openssl/lib
+-
+-# Some Red Hat versions seem to include kerberos header files from OpenSSL, but
+-# the kerberos files are not in the default include path. Following line can be
+-# used to fix build issues on such systems (krb5.h not found).
+-#CFLAGS += -I/usr/include/kerberos
+-
+-# Driver interface for generic Linux wireless extensions
+-# Note: WEXT is deprecated in the current Linux kernel version and no new
+-# functionality is added to it. nl80211-based interface is the new
+-# replacement for WEXT and its use allows wpa_supplicant to properly control
+-# the driver to improve existing functionality like roaming and to support new
+-# functionality.
+-CONFIG_DRIVER_WEXT=y
+-
+-# Driver interface for Linux drivers using the nl80211 kernel interface
+-CONFIG_DRIVER_NL80211=y
+-
+-# QCA vendor extensions to nl80211
+-#CONFIG_DRIVER_NL80211_QCA=y
+-
+-# driver_nl80211.c requires libnl. If you are compiling it yourself
+-# you may need to point hostapd to your version of libnl.
+-#
+-#CFLAGS += -I$<path to libnl include files>
+-#LIBS += -L$<path to libnl library files>
+-
+-# Use libnl v2.0 (or 3.0) libraries.
+-#CONFIG_LIBNL20=y
+-
+-# Use libnl 3.2 libraries (if this is selected, CONFIG_LIBNL20 is ignored)
+-#CONFIG_LIBNL32=y
+-
+-
+-# Driver interface for FreeBSD net80211 layer (e.g., Atheros driver)
+-#CONFIG_DRIVER_BSD=y
+-#CFLAGS += -I/usr/local/include
+-#LIBS += -L/usr/local/lib
+-#LIBS_p += -L/usr/local/lib
+-#LIBS_c += -L/usr/local/lib
+-
+-# Driver interface for Windows NDIS
+-#CONFIG_DRIVER_NDIS=y
+-#CFLAGS += -I/usr/include/w32api/ddk
+-#LIBS += -L/usr/local/lib
+-# For native build using mingw
+-#CONFIG_NATIVE_WINDOWS=y
+-# Additional directories for cross-compilation on Linux host for mingw target
+-#CFLAGS += -I/opt/mingw/mingw32/include/ddk
+-#LIBS += -L/opt/mingw/mingw32/lib
+-#CC=mingw32-gcc
+-# By default, driver_ndis uses WinPcap for low-level operations. This can be
+-# replaced with the following option which replaces WinPcap calls with NDISUIO.
+-# However, this requires that WZC is disabled (net stop wzcsvc) before starting
+-# wpa_supplicant.
+-# CONFIG_USE_NDISUIO=y
+-
+-# Driver interface for wired Ethernet drivers
+-CONFIG_DRIVER_WIRED=y
+-
+-# Driver interface for MACsec capable Qualcomm Atheros drivers
+-#CONFIG_DRIVER_MACSEC_QCA=y
+-
+-# Driver interface for Linux MACsec drivers
+-#CONFIG_DRIVER_MACSEC_LINUX=y
+-
+-# Driver interface for the Broadcom RoboSwitch family
+-#CONFIG_DRIVER_ROBOSWITCH=y
+-
+-# Driver interface for no driver (e.g., WPS ER only)
+-#CONFIG_DRIVER_NONE=y
+-
+-# Solaris libraries
+-#LIBS += -lsocket -ldlpi -lnsl
+-#LIBS_c += -lsocket
+-
+-# Enable IEEE 802.1X Supplicant (automatically included if any EAP method or
+-# MACsec is included)
+-CONFIG_IEEE8021X_EAPOL=y
+-
+-# EAP-MD5
+-CONFIG_EAP_MD5=y
+-
+-# EAP-MSCHAPv2
+-CONFIG_EAP_MSCHAPV2=y
+-
+-# EAP-TLS
+-CONFIG_EAP_TLS=y
+-
+-# EAL-PEAP
+-CONFIG_EAP_PEAP=y
+-
+-# EAP-TTLS
+-CONFIG_EAP_TTLS=y
+-
+-# EAP-FAST
+-CONFIG_EAP_FAST=y
+-
+-# EAP-TEAP
+-# Note: The current EAP-TEAP implementation is experimental and should not be
+-# enabled for production use. The IETF RFC 7170 that defines EAP-TEAP has number
+-# of conflicting statements and missing details and the implementation has
+-# vendor specific workarounds for those and as such, may not interoperate with
+-# any other implementation. This should not be used for anything else than
+-# experimentation and interoperability testing until those issues has been
+-# resolved.
+-#CONFIG_EAP_TEAP=y
+-
+-# EAP-GTC
+-CONFIG_EAP_GTC=y
+-
+-# EAP-OTP
+-CONFIG_EAP_OTP=y
+-
+-# EAP-SIM (enable CONFIG_PCSC, if EAP-SIM is used)
+-#CONFIG_EAP_SIM=y
+-
+-# Enable SIM simulator (Milenage) for EAP-SIM
+-#CONFIG_SIM_SIMULATOR=y
+-
+-# EAP-PSK (experimental; this is _not_ needed for WPA-PSK)
+-#CONFIG_EAP_PSK=y
+-
+-# EAP-pwd (secure authentication using only a password)
+-#CONFIG_EAP_PWD=y
+-
+-# EAP-PAX
+-#CONFIG_EAP_PAX=y
+-
+-# LEAP
+-CONFIG_EAP_LEAP=y
+-
+-# EAP-AKA (enable CONFIG_PCSC, if EAP-AKA is used)
+-#CONFIG_EAP_AKA=y
+-
+-# EAP-AKA' (enable CONFIG_PCSC, if EAP-AKA' is used).
+-# This requires CONFIG_EAP_AKA to be enabled, too.
+-#CONFIG_EAP_AKA_PRIME=y
+-
+-# Enable USIM simulator (Milenage) for EAP-AKA
+-#CONFIG_USIM_SIMULATOR=y
+-
+-# EAP-SAKE
+-#CONFIG_EAP_SAKE=y
+-
+-# EAP-GPSK
+-#CONFIG_EAP_GPSK=y
+-# Include support for optional SHA256 cipher suite in EAP-GPSK
+-#CONFIG_EAP_GPSK_SHA256=y
+-
+-# EAP-TNC and related Trusted Network Connect support (experimental)
+-#CONFIG_EAP_TNC=y
+-
+-# Wi-Fi Protected Setup (WPS)
+-CONFIG_WPS=y
+-# Enable WPS external registrar functionality
+-#CONFIG_WPS_ER=y
+-# Disable credentials for an open network by default when acting as a WPS
+-# registrar.
+-#CONFIG_WPS_REG_DISABLE_OPEN=y
+-# Enable WPS support with NFC config method
+-#CONFIG_WPS_NFC=y
+-
+-# EAP-IKEv2
+-#CONFIG_EAP_IKEV2=y
+-
+-# EAP-EKE
+-#CONFIG_EAP_EKE=y
+-
+-# MACsec
+-#CONFIG_MACSEC=y
+-
+-# PKCS#12 (PFX) support (used to read private key and certificate file from
+-# a file that usually has extension .p12 or .pfx)
+-CONFIG_PKCS12=y
+-
+-# Smartcard support (i.e., private key on a smartcard), e.g., with openssl
+-# engine.
+-CONFIG_SMARTCARD=y
+-
+-# PC/SC interface for smartcards (USIM, GSM SIM)
+-# Enable this if EAP-SIM or EAP-AKA is included
+-#CONFIG_PCSC=y
+-
+-# Support HT overrides (disable HT/HT40, mask MCS rates, etc.)
+-CONFIG_HT_OVERRIDES=y
+-
+-# Support VHT overrides (disable VHT, mask MCS rates, etc.)
+-CONFIG_VHT_OVERRIDES=y
+-
+-# Development testing
+-#CONFIG_EAPOL_TEST=y
+-
+-# Select control interface backend for external programs, e.g, wpa_cli:
+-# unix = UNIX domain sockets (default for Linux/*BSD)
+-# udp = UDP sockets using localhost (127.0.0.1)
+-# udp6 = UDP IPv6 sockets using localhost (::1)
+-# named_pipe = Windows Named Pipe (default for Windows)
+-# udp-remote = UDP sockets with remote access (only for tests systems/purpose)
+-# udp6-remote = UDP IPv6 sockets with remote access (only for tests purpose)
+-# y = use default (backwards compatibility)
+-# If this option is commented out, control interface is not included in the
+-# build.
+-CONFIG_CTRL_IFACE=y
+-
+-# Include support for GNU Readline and History Libraries in wpa_cli.
+-# When building a wpa_cli binary for distribution, please note that these
+-# libraries are licensed under GPL and as such, BSD license may not apply for
+-# the resulting binary.
+-#CONFIG_READLINE=y
+-
+-# Include internal line edit mode in wpa_cli. This can be used as a replacement
+-# for GNU Readline to provide limited command line editing and history support.
+-#CONFIG_WPA_CLI_EDIT=y
+-
+-# Remove debugging code that is printing out debug message to stdout.
+-# This can be used to reduce the size of the wpa_supplicant considerably
+-# if debugging code is not needed. The size reduction can be around 35%
+-# (e.g., 90 kB).
+-#CONFIG_NO_STDOUT_DEBUG=y
+-
+-# Remove WPA support, e.g., for wired-only IEEE 802.1X supplicant, to save
+-# 35-50 kB in code size.
+-#CONFIG_NO_WPA=y
+-
+-# Remove IEEE 802.11i/WPA-Personal ASCII passphrase support
+-# This option can be used to reduce code size by removing support for
+-# converting ASCII passphrases into PSK. If this functionality is removed, the
+-# PSK can only be configured as the 64-octet hexstring (e.g., from
+-# wpa_passphrase). This saves about 0.5 kB in code size.
+-#CONFIG_NO_WPA_PASSPHRASE=y
+-
+-# Simultaneous Authentication of Equals (SAE), WPA3-Personal
+-#CONFIG_SAE=y
+-
+-# Disable scan result processing (ap_mode=1) to save code size by about 1 kB.
+-# This can be used if ap_scan=1 mode is never enabled.
+-#CONFIG_NO_SCAN_PROCESSING=y
+-
+-# Select configuration backend:
+-# file = text file (e.g., wpa_supplicant.conf; note: the configuration file
+-#	path is given on command line, not here; this option is just used to
+-#	select the backend that allows configuration files to be used)
+-# winreg = Windows registry (see win_example.reg for an example)
+-CONFIG_BACKEND=file
+-
+-# Remove configuration write functionality (i.e., to allow the configuration
+-# file to be updated based on runtime configuration changes). The runtime
+-# configuration can still be changed, the changes are just not going to be
+-# persistent over restarts. This option can be used to reduce code size by
+-# about 3.5 kB.
+-#CONFIG_NO_CONFIG_WRITE=y
+-
+-# Remove support for configuration blobs to reduce code size by about 1.5 kB.
+-#CONFIG_NO_CONFIG_BLOBS=y
+-
+-# Select program entry point implementation:
+-# main = UNIX/POSIX like main() function (default)
+-# main_winsvc = Windows service (read parameters from registry)
+-# main_none = Very basic example (development use only)
+-#CONFIG_MAIN=main
+-
+-# Select wrapper for operating system and C library specific functions
+-# unix = UNIX/POSIX like systems (default)
+-# win32 = Windows systems
+-# none = Empty template
+-#CONFIG_OS=unix
+-
+-# Select event loop implementation
+-# eloop = select() loop (default)
+-# eloop_win = Windows events and WaitForMultipleObject() loop
+-#CONFIG_ELOOP=eloop
+-
+-# Should we use poll instead of select? Select is used by default.
+-#CONFIG_ELOOP_POLL=y
+-
+-# Should we use epoll instead of select? Select is used by default.
+-CONFIG_ELOOP_EPOLL=y
+-
+-# Should we use kqueue instead of select? Select is used by default.
+-#CONFIG_ELOOP_KQUEUE=y
+-
+-# Select layer 2 packet implementation
+-# linux = Linux packet socket (default)
+-# pcap = libpcap/libdnet/WinPcap
+-# freebsd = FreeBSD libpcap
+-# winpcap = WinPcap with receive thread
+-# ndis = Windows NDISUIO (note: requires CONFIG_USE_NDISUIO=y)
+-# none = Empty template
+-#CONFIG_L2_PACKET=linux
+-
+-# Disable Linux packet socket workaround applicable for station interface
+-# in a bridge for EAPOL frames. This should be uncommented only if the kernel
+-# is known to not have the regression issue in packet socket behavior with
+-# bridge interfaces (commit 'bridge: respect RFC2863 operational state')').
+-CONFIG_NO_LINUX_PACKET_SOCKET_WAR=y
+-
+-# IEEE 802.11w (management frame protection), also known as PMF
+-# Driver support is also needed for IEEE 802.11w.
+-CONFIG_IEEE80211W=y
+-
+-# Support Operating Channel Validation
+-#CONFIG_OCV=y
+-
+-# Select TLS implementation
+-# openssl = OpenSSL (default)
+-# gnutls = GnuTLS
+-# internal = Internal TLSv1 implementation (experimental)
+-# linux = Linux kernel AF_ALG and internal TLSv1 implementation (experimental)
+-# none = Empty template
+-CONFIG_TLS=internal
+-
+-# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.1)
+-# can be enabled to get a stronger construction of messages when block ciphers
+-# are used. It should be noted that some existing TLS v1.0 -based
+-# implementation may not be compatible with TLS v1.1 message (ClientHello is
+-# sent prior to negotiating which version will be used)
+-#CONFIG_TLSV11=y
+-
+-# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.2)
+-# can be enabled to enable use of stronger crypto algorithms. It should be
+-# noted that some existing TLS v1.0 -based implementation may not be compatible
+-# with TLS v1.2 message (ClientHello is sent prior to negotiating which version
+-# will be used)
+-#CONFIG_TLSV12=y
+-
+-# Select which ciphers to use by default with OpenSSL if the user does not
+-# specify them.
+-#CONFIG_TLS_DEFAULT_CIPHERS="DEFAULT:!EXP:!LOW"
+-
+-# If CONFIG_TLS=internal is used, additional library and include paths are
+-# needed for LibTomMath. Alternatively, an integrated, minimal version of
+-# LibTomMath can be used. See beginning of libtommath.c for details on benefits
+-# and drawbacks of this option.
+-CONFIG_INTERNAL_LIBTOMMATH=y
+-#ifndef CONFIG_INTERNAL_LIBTOMMATH
+-#LTM_PATH=/usr/src/libtommath-0.39
+-#CFLAGS += -I$(LTM_PATH)
+-#LIBS += -L$(LTM_PATH)
+-#LIBS_p += -L$(LTM_PATH)
+-#endif
+-# At the cost of about 4 kB of additional binary size, the internal LibTomMath
+-# can be configured to include faster routines for exptmod, sqr, and div to
+-# speed up DH and RSA calculation considerably
+-CONFIG_INTERNAL_LIBTOMMATH_FAST=y
+-
+-# Include NDIS event processing through WMI into wpa_supplicant/wpasvc.
+-# This is only for Windows builds and requires WMI-related header files and
+-# WbemUuid.Lib from Platform SDK even when building with MinGW.
+-#CONFIG_NDIS_EVENTS_INTEGRATED=y
+-#PLATFORMSDKLIB="/opt/Program Files/Microsoft Platform SDK/Lib"
+-
+-# Add support for new DBus control interface
+-# (fi.w1.hostap.wpa_supplicant1)
+-#CONFIG_CTRL_IFACE_DBUS_NEW=y
+-
+-# Add introspection support for new DBus control interface
+-#CONFIG_CTRL_IFACE_DBUS_INTRO=y
+-
+-# Add support for loading EAP methods dynamically as shared libraries.
+-# When this option is enabled, each EAP method can be either included
+-# statically (CONFIG_EAP_<method>=y) or dynamically (CONFIG_EAP_<method>=dyn).
+-# Dynamic EAP methods are build as shared objects (eap_*.so) and they need to
+-# be loaded in the beginning of the wpa_supplicant configuration file
+-# (see load_dynamic_eap parameter in the example file) before being used in
+-# the network blocks.
+-#
+-# Note that some shared parts of EAP methods are included in the main program
+-# and in order to be able to use dynamic EAP methods using these parts, the
+-# main program must have been build with the EAP method enabled (=y or =dyn).
+-# This means that EAP-TLS/PEAP/TTLS/FAST cannot be added as dynamic libraries
+-# unless at least one of them was included in the main build to force inclusion
+-# of the shared code. Similarly, at least one of EAP-SIM/AKA must be included
+-# in the main build to be able to load these methods dynamically.
+-#
+-# Please also note that using dynamic libraries will increase the total binary
+-# size. Thus, it may not be the best option for targets that have limited
+-# amount of memory/flash.
+-#CONFIG_DYNAMIC_EAP_METHODS=y
+-
+-# IEEE Std 802.11r-2008 (Fast BSS Transition) for station mode
+-#CONFIG_IEEE80211R=y
+-
+-# Add support for writing debug log to a file (/tmp/wpa_supplicant-log-#.txt)
+-#CONFIG_DEBUG_FILE=y
+-
+-# Send debug messages to syslog instead of stdout
+-CONFIG_DEBUG_SYSLOG=y
+-# Set syslog facility for debug messages
+-CONFIG_DEBUG_SYSLOG_FACILITY=LOG_DAEMON
+-
+-# Add support for sending all debug messages (regardless of debug verbosity)
+-# to the Linux kernel tracing facility. This helps debug the entire stack by
+-# making it easy to record everything happening from the driver up into the
+-# same file, e.g., using trace-cmd.
+-#CONFIG_DEBUG_LINUX_TRACING=y
+-
+-# Add support for writing debug log to Android logcat instead of standard
+-# output
+-#CONFIG_ANDROID_LOG=y
+-
+-# Enable privilege separation (see README 'Privilege separation' for details)
+-#CONFIG_PRIVSEP=y
+-
+-# Enable mitigation against certain attacks against TKIP by delaying Michael
+-# MIC error reports by a random amount of time between 0 and 60 seconds
+-#CONFIG_DELAYED_MIC_ERROR_REPORT=y
+-
+-# Enable tracing code for developer debugging
+-# This tracks use of memory allocations and other registrations and reports
+-# incorrect use with a backtrace of call (or allocation) location.
+-#CONFIG_WPA_TRACE=y
+-# For BSD, uncomment these.
+-#LIBS += -lexecinfo
+-#LIBS_p += -lexecinfo
+-#LIBS_c += -lexecinfo
+-
+-# Use libbfd to get more details for developer debugging
+-# This enables use of libbfd to get more detailed symbols for the backtraces
+-# generated by CONFIG_WPA_TRACE=y.
+-#CONFIG_WPA_TRACE_BFD=y
+-# For BSD, uncomment these.
+-#LIBS += -lbfd -liberty -lz
+-#LIBS_p += -lbfd -liberty -lz
+-#LIBS_c += -lbfd -liberty -lz
+-
+-# wpa_supplicant depends on strong random number generation being available
+-# from the operating system. os_get_random() function is used to fetch random
+-# data when needed, e.g., for key generation. On Linux and BSD systems, this
+-# works by reading /dev/urandom. It should be noted that the OS entropy pool
+-# needs to be properly initialized before wpa_supplicant is started. This is
+-# important especially on embedded devices that do not have a hardware random
+-# number generator and may by default start up with minimal entropy available
+-# for random number generation.
+-#
+-# As a safety net, wpa_supplicant is by default trying to internally collect
+-# additional entropy for generating random data to mix in with the data fetched
+-# from the OS. This by itself is not considered to be very strong, but it may
+-# help in cases where the system pool is not initialized properly. However, it
+-# is very strongly recommended that the system pool is initialized with enough
+-# entropy either by using hardware assisted random number generator or by
+-# storing state over device reboots.
+-#
+-# wpa_supplicant can be configured to maintain its own entropy store over
+-# restarts to enhance random number generation. This is not perfect, but it is
+-# much more secure than using the same sequence of random numbers after every
+-# reboot. This can be enabled with -e<entropy file> command line option. The
+-# specified file needs to be readable and writable by wpa_supplicant.
+-#
+-# If the os_get_random() is known to provide strong random data (e.g., on
+-# Linux/BSD, the board in question is known to have reliable source of random
+-# data from /dev/urandom), the internal wpa_supplicant random pool can be
+-# disabled. This will save some in binary size and CPU use. However, this
+-# should only be considered for builds that are known to be used on devices
+-# that meet the requirements described above.
+-CONFIG_NO_RANDOM_POOL=y
+-
+-# Should we attempt to use the getrandom(2) call that provides more reliable
+-# yet secure randomness source than /dev/random on Linux 3.17 and newer.
+-# Requires glibc 2.25 to build, falls back to /dev/random if unavailable.
+-CONFIG_GETRANDOM=y
+-
+-# IEEE 802.11n (High Throughput) support (mainly for AP mode)
+-#CONFIG_IEEE80211N=y
+-
+-# IEEE 802.11ac (Very High Throughput) support (mainly for AP mode)
+-# (depends on CONFIG_IEEE80211N)
+-#CONFIG_IEEE80211AC=y
+-
+-# Wireless Network Management (IEEE Std 802.11v-2011)
+-# Note: This is experimental and not complete implementation.
+-#CONFIG_WNM=y
+-
+-# Interworking (IEEE 802.11u)
+-# This can be used to enable functionality to improve interworking with
+-# external networks (GAS/ANQP to learn more about the networks and network
+-# selection based on available credentials).
+-#CONFIG_INTERWORKING=y
+-
+-# Hotspot 2.0
+-#CONFIG_HS20=y
+-
+-# Enable interface matching in wpa_supplicant
+-#CONFIG_MATCH_IFACE=y
+-
+-# Disable roaming in wpa_supplicant
+-#CONFIG_NO_ROAMING=y
+-
+-# AP mode operations with wpa_supplicant
+-# This can be used for controlling AP mode operations with wpa_supplicant. It
+-# should be noted that this is mainly aimed at simple cases like
+-# WPA2-Personal while more complex configurations like WPA2-Enterprise with an
+-# external RADIUS server can be supported with hostapd.
+-CONFIG_AP=y
+-
+-# P2P (Wi-Fi Direct)
+-# This can be used to enable P2P support in wpa_supplicant. See README-P2P for
+-# more information on P2P operations.
+-CONFIG_P2P=y
+-
+-# Enable TDLS support
+-#CONFIG_TDLS=y
+-
+-# Wi-Fi Display
+-# This can be used to enable Wi-Fi Display extensions for P2P using an external
+-# program to control the additional information exchanges in the messages.
+-#CONFIG_WIFI_DISPLAY=y
+-
+-# Autoscan
+-# This can be used to enable automatic scan support in wpa_supplicant.
+-# See wpa_supplicant.conf for more information on autoscan usage.
+-#
+-# Enabling directly a module will enable autoscan support.
+-# For exponential module:
+-#CONFIG_AUTOSCAN_EXPONENTIAL=y
+-# For periodic module:
+-#CONFIG_AUTOSCAN_PERIODIC=y
+-
+-# Password (and passphrase, etc.) backend for external storage
+-# These optional mechanisms can be used to add support for storing passwords
+-# and other secrets in external (to wpa_supplicant) location. This allows, for
+-# example, operating system specific key storage to be used
+-#
+-# External password backend for testing purposes (developer use)
+-#CONFIG_EXT_PASSWORD_TEST=y
+-
+-# Enable Fast Session Transfer (FST)
+-#CONFIG_FST=y
+-
+-# Enable CLI commands for FST testing
+-#CONFIG_FST_TEST=y
+-
+-# OS X builds. This is only for building eapol_test.
+-#CONFIG_OSX=y
+-
+-# Automatic Channel Selection
+-# This will allow wpa_supplicant to pick the channel automatically when channel
+-# is set to "0".
+-#
+-# TODO: Extend parser to be able to parse "channel=acs_survey" as an alternative
+-# to "channel=0". This would enable us to eventually add other ACS algorithms in
+-# similar way.
+-#
+-# Automatic selection is currently only done through initialization, later on
+-# we hope to do background checks to keep us moving to more ideal channels as
+-# time goes by. ACS is currently only supported through the nl80211 driver and
+-# your driver must have survey dump capability that is filled by the driver
+-# during scanning.
+-#
+-# TODO: In analogy to hostapd be able to customize the ACS survey algorithm with
+-# a newly to create wpa_supplicant.conf variable acs_num_scans.
+-#
+-# Supported ACS drivers:
+-# * ath9k
+-# * ath5k
+-# * ath10k
+-#
+-# For more details refer to:
+-# http://wireless.kernel.org/en/users/Documentation/acs
+-#CONFIG_ACS=y
+-
+-# Support Multi Band Operation
+-#CONFIG_MBO=y
+-
+-# Fast Initial Link Setup (FILS) (IEEE 802.11ai)
+-CONFIG_FILS=y
+-# FILS shared key authentication with PFS
+-#CONFIG_FILS_SK_PFS=y
+-
+-# Support RSN on IBSS networks
+-# This is needed to be able to use mode=1 network profile with proto=RSN and
+-# key_mgmt=WPA-PSK (i.e., full key management instead of WPA-None).
+-CONFIG_IBSS_RSN=y
+-
+-# External PMKSA cache control
+-# This can be used to enable control interface commands that allow the current
+-# PMKSA cache entries to be fetched and new entries to be added.
+-#CONFIG_PMKSA_CACHE_EXTERNAL=y
+-
+-# Mesh Networking (IEEE 802.11s)
+-#CONFIG_MESH=y
+-
+-# Background scanning modules
+-# These can be used to request wpa_supplicant to perform background scanning
+-# operations for roaming within an ESS (same SSID). See the bgscan parameter in
+-# the wpa_supplicant.conf file for more details.
+-# Periodic background scans based on signal strength
+-#CONFIG_BGSCAN_SIMPLE=y
+-# Learn channels used by the network and try to avoid bgscans on other
+-# channels (experimental)
+-#CONFIG_BGSCAN_LEARN=y
+-
+-# Opportunistic Wireless Encryption (OWE)
+-# Experimental implementation of draft-harkins-owe-07.txt
+-#CONFIG_OWE=y
+-
+-# Device Provisioning Protocol (DPP)
+-# This requires CONFIG_IEEE80211W=y to be enabled, too. (see
+-# wpa_supplicant/README-DPP for details)
+-#CONFIG_DPP=y
+-
+-# uBus IPC/RPC System
+-# Services can connect to the bus and provide methods
+-# that can be called by other services or clients.
+-CONFIG_UBUS=y
+-
+-# OpenWrt patch 380-disable-ctrl-iface-mib.patch
+-# leads to the MIB only being compiled in if
+-# CONFIG_CTRL_IFACE_MIB is enabled.
+-CONFIG_CTRL_IFACE_MIB=y
+diff --git a/package/network/services/hostapd/files/wpad.init b/package/network/services/hostapd/files/wpad.init
+deleted file mode 100644
+index 65d46df982..0000000000
+--- a/package/network/services/hostapd/files/wpad.init
++++ /dev/null
+@@ -1,43 +0,0 @@
+-#!/bin/sh /etc/rc.common
+-
+-START=19
+-STOP=21
+-
+-USE_PROCD=1
+-NAME=wpad
+-
+-start_service() {
+-	if [ -x "/usr/sbin/hostapd" ]; then
+-		mkdir -p /var/run/hostapd
+-		chown network:network /var/run/hostapd
+-		procd_open_instance hostapd
+-		procd_set_param command /usr/sbin/hostapd -s -g /var/run/hostapd/global
+-		procd_set_param respawn 3600 1 0
+-		procd_set_param limits core="unlimited"
+-		[ -x /sbin/ujail -a -e /etc/capabilities/wpad.json ] && {
+-			procd_add_jail hostapd
+-			procd_set_param capabilities /etc/capabilities/wpad.json
+-			procd_set_param user network
+-			procd_set_param group network
+-			procd_set_param no_new_privs 1
+-		}
+-		procd_close_instance
+-	fi
+-
+-	if [ -x "/usr/sbin/wpa_supplicant" ]; then
+-		mkdir -p /var/run/wpa_supplicant
+-		chown network:network /var/run/wpa_supplicant
+-		procd_open_instance supplicant
+-		procd_set_param command /usr/sbin/wpa_supplicant -n -s -g /var/run/wpa_supplicant/global
+-		procd_set_param respawn 3600 1 0
+-		procd_set_param limits core="unlimited"
+-		[ -x /sbin/ujail -a -e /etc/capabilities/wpad.json ] && {
+-			procd_add_jail wpa_supplicant
+-			procd_set_param capabilities /etc/capabilities/wpad.json
+-			procd_set_param user network
+-			procd_set_param group network
+-			procd_set_param no_new_privs 1
+-		}
+-		procd_close_instance
+-	fi
+-}
+diff --git a/package/network/services/hostapd/files/wpad.json b/package/network/services/hostapd/files/wpad.json
+deleted file mode 100644
+index c73f3d98bd..0000000000
+--- a/package/network/services/hostapd/files/wpad.json
++++ /dev/null
+@@ -1,22 +0,0 @@
+-{
+-	"bounding": [
+-		"CAP_NET_ADMIN",
+-		"CAP_NET_RAW"
+-	],
+-	"effective": [
+-		"CAP_NET_ADMIN",
+-		"CAP_NET_RAW"
+-	],
+-	"ambient": [
+-		"CAP_NET_ADMIN",
+-		"CAP_NET_RAW"
+-	],
+-	"permitted": [
+-		"CAP_NET_ADMIN",
+-		"CAP_NET_RAW"
+-	],
+-	"inheritable": [
+-		"CAP_NET_ADMIN",
+-		"CAP_NET_RAW"
+-	]
+-}
+diff --git a/package/network/services/hostapd/files/wpad_acl.json b/package/network/services/hostapd/files/wpad_acl.json
+deleted file mode 100644
+index c77ccd8ea0..0000000000
+--- a/package/network/services/hostapd/files/wpad_acl.json
++++ /dev/null
+@@ -1,10 +0,0 @@
+-{
+-	"user": "network",
+-	"access": {
+-		"service": {
+-			"methods": [ "event" ]
+-		}
+-	},
+-	"publish": [ "hostapd", "hostapd.*", "wpa_supplicant", "wpa_supplicant.*" ],
+-	"send": [ "bss.*", "wps_credentials" ]
+-}
+diff --git a/package/network/services/hostapd/files/wps-hotplug.sh b/package/network/services/hostapd/files/wps-hotplug.sh
+deleted file mode 100644
+index 073bdd1868..0000000000
+--- a/package/network/services/hostapd/files/wps-hotplug.sh
++++ /dev/null
+@@ -1,69 +0,0 @@
+-#!/bin/sh
+-
+-wps_catch_credentials() {
+-	local iface ifaces ifc ifname ssid encryption key radio radios
+-	local found=0
+-
+-	. /usr/share/libubox/jshn.sh
+-	ubus -S -t 30 listen wps_credentials | while read creds; do
+-		json_init
+-		json_load "$creds"
+-		json_select wps_credentials || continue
+-		json_get_vars ifname ssid key encryption
+-		local ifcname="$ifname"
+-		json_init
+-		json_load "$(ubus -S call network.wireless status)"
+-		json_get_keys radios
+-		for radio in $radios; do
+-			json_select $radio
+-			json_select interfaces
+-			json_get_keys ifaces
+-			for ifc in $ifaces; do
+-				json_select $ifc
+-				json_get_vars ifname
+-				[ "$ifname" = "$ifcname" ] && {
+-					ubus -S call uci set "{\"config\":\"wireless\", \"type\":\"wifi-iface\",		\
+-								\"match\": { \"device\": \"$radio\", \"encryption\": \"wps\" },	\
+-								\"values\": { \"encryption\": \"$encryption\", 			\
+-										\"ssid\": \"$ssid\", 				\
+-										\"key\": \"$key\" } }"
+-					ubus -S call uci commit '{"config": "wireless"}'
+-					ubus -S call uci apply
+-				}
+-				json_select ..
+-			done
+-			json_select ..
+-			json_select ..
+-		done
+-	done
+-}
+-
+-if [ "$ACTION" = "released" ] && [ "$BUTTON" = "wps" ]; then
+-	# If the button was pressed for 3 seconds or more, trigger WPS on
+-	# wpa_supplicant only, no matter if hostapd is running or not.  If
+-	# was pressed for less than 3 seconds, try triggering on
+-	# hostapd. If there is no hostapd instance to trigger it on or WPS
+-	# is not enabled on them, trigger it on wpa_supplicant.
+-	if [ "$SEEN" -lt 3 ] ; then
+-		wps_done=0
+-		ubusobjs="$( ubus -S list hostapd.* )"
+-		for ubusobj in $ubusobjs; do
+-			ubus -S call $ubusobj wps_start && wps_done=1
+-		done
+-		[ $wps_done = 0 ] || return 0
+-	fi
+-	wps_done=0
+-	ubusobjs="$( ubus -S list wpa_supplicant.* )"
+-	for ubusobj in $ubusobjs; do
+-		ifname="$(echo $ubusobj | cut -d'.' -f2 )"
+-		multi_ap=""
+-		if [ -e "/var/run/wpa_supplicant-${ifname}.conf.is_multiap" ]; then
+-			ubus -S call $ubusobj wps_start '{ "multi_ap": true }' && wps_done=1
+-		else
+-			ubus -S call $ubusobj wps_start && wps_done=1
+-		fi
+-	done
+-	[ $wps_done = 0 ] || wps_catch_credentials &
+-fi
+-
+-return 0
+diff --git a/package/network/services/hostapd/patches/001-wolfssl-init-RNG-with-ECC-key.patch b/package/network/services/hostapd/patches/001-wolfssl-init-RNG-with-ECC-key.patch
+deleted file mode 100644
+index 269dcaac75..0000000000
+--- a/package/network/services/hostapd/patches/001-wolfssl-init-RNG-with-ECC-key.patch
++++ /dev/null
+@@ -1,43 +0,0 @@
+-From 21ce83b4ae2b9563175fdb4fc4312096cc399cf8 Mon Sep 17 00:00:00 2001
+-From: David Bauer <mail@david-bauer.net>
+-Date: Wed, 5 May 2021 00:44:34 +0200
+-Subject: [PATCH] wolfssl: add RNG to EC key
+-
+-Since upstream commit 6467de5a8840 ("Randomize z ordinates in
+-scalar mult when timing resistant") WolfSSL requires a RNG for
+-the EC key when built hardened which is the default.
+-
+-Set the RNG for the EC key to fix connections for OWE clients.
+-
+-Signed-off-by: David Bauer <mail@david-bauer.net>
+----
+- src/crypto/crypto_wolfssl.c | 4 ++++
+- 1 file changed, 4 insertions(+)
+-
+---- a/src/crypto/crypto_wolfssl.c
+-+++ b/src/crypto/crypto_wolfssl.c
+-@@ -1340,6 +1340,7 @@ int ecc_projective_add_point(ecc_point *
+- 
+- struct crypto_ec {
+- 	ecc_key key;
+-+	WC_RNG rng;
+- 	mp_int a;
+- 	mp_int prime;
+- 	mp_int order;
+-@@ -1394,6 +1395,8 @@ struct crypto_ec * crypto_ec_init(int gr
+- 		return NULL;
+- 
+- 	if (wc_ecc_init(&e->key) != 0 ||
+-+	    wc_InitRng(&e->rng) != 0 ||
+-+	    wc_ecc_set_rng(&e->key, &e->rng) != 0 ||
+- 	    wc_ecc_set_curve(&e->key, 0, curve_id) != 0 ||
+- 	    mp_init(&e->a) != MP_OKAY ||
+- 	    mp_init(&e->prime) != MP_OKAY ||
+-@@ -1425,6 +1428,7 @@ void crypto_ec_deinit(struct crypto_ec*
+- 	mp_clear(&e->order);
+- 	mp_clear(&e->prime);
+- 	mp_clear(&e->a);
+-+	wc_FreeRng(&e->rng);
+- 	wc_ecc_free(&e->key);
+- 	os_free(e);
+- }
+diff --git a/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch b/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch
+deleted file mode 100644
+index 761fe368cd..0000000000
+--- a/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch
++++ /dev/null
+@@ -1,135 +0,0 @@
+-From 8de8cd8380af0c43d4fde67a668d79ef73b26b26 Mon Sep 17 00:00:00 2001
+-From: Peter Oh <peter.oh@bowerswilkins.com>
+-Date: Tue, 30 Jun 2020 14:18:58 +0200
+-Subject: [PATCH 10/19] mesh: Allow DFS channels to be selected if dfs is
+- enabled
+-
+-Note: DFS is assumed to be usable if a country code has been set
+-
+-Signed-off-by: Benjamin Berg <benjamin@sipsolutions.net>
+-Signed-off-by: Peter Oh <peter.oh@bowerswilkins.com>
+----
+- wpa_supplicant/wpa_supplicant.c | 25 +++++++++++++++++++------
+- 1 file changed, 19 insertions(+), 6 deletions(-)
+-
+---- a/wpa_supplicant/wpa_supplicant.c
+-+++ b/wpa_supplicant/wpa_supplicant.c
+-@@ -2621,7 +2621,7 @@ static int drv_supports_vht(struct wpa_s
+- }
+- 
+- 
+--static bool ibss_mesh_is_80mhz_avail(int channel, struct hostapd_hw_modes *mode)
+-+static bool ibss_mesh_is_80mhz_avail(int channel, struct hostapd_hw_modes *mode, bool dfs_enabled)
+- {
+- 	int i;
+- 
+-@@ -2630,7 +2630,10 @@ static bool ibss_mesh_is_80mhz_avail(int
+- 
+- 		chan = hw_get_channel_chan(mode, i, NULL);
+- 		if (!chan ||
+--		    chan->flag & (HOSTAPD_CHAN_DISABLED | HOSTAPD_CHAN_NO_IR))
+-+		    chan->flag & HOSTAPD_CHAN_DISABLED)
+-+			return false;
+-+		
+-+		if (!dfs_enabled && chan->flag & (HOSTAPD_CHAN_RADAR | HOSTAPD_CHAN_NO_IR))
+- 			return false;
+- 	}
+- 
+-@@ -2757,7 +2760,7 @@ static void ibss_mesh_select_40mhz(struc
+- 				   const struct wpa_ssid *ssid,
+- 				   struct hostapd_hw_modes *mode,
+- 				   struct hostapd_freq_params *freq,
+--				   int obss_scan) {
+-+				   int obss_scan, bool dfs_enabled) {
+- 	int chan_idx;
+- 	struct hostapd_channel_data *pri_chan = NULL, *sec_chan = NULL;
+- 	int i, res;
+-@@ -2781,8 +2784,11 @@ static void ibss_mesh_select_40mhz(struc
+- 		return;
+- 
+- 	/* Check primary channel flags */
+--	if (pri_chan->flag & (HOSTAPD_CHAN_DISABLED | HOSTAPD_CHAN_NO_IR))
+-+	if (pri_chan->flag & HOSTAPD_CHAN_DISABLED)
+- 		return;
+-+	if (pri_chan->flag & (HOSTAPD_CHAN_RADAR | HOSTAPD_CHAN_NO_IR))
+-+		if (!dfs_enabled)
+-+			return;
+- 
+- #ifdef CONFIG_HT_OVERRIDES
+- 	if (ssid->disable_ht40)
+-@@ -2808,8 +2814,11 @@ static void ibss_mesh_select_40mhz(struc
+- 		return;
+- 
+- 	/* Check secondary channel flags */
+--	if (sec_chan->flag & (HOSTAPD_CHAN_DISABLED | HOSTAPD_CHAN_NO_IR))
+-+	if (sec_chan->flag & HOSTAPD_CHAN_DISABLED)
+- 		return;
+-+	if (sec_chan->flag & (HOSTAPD_CHAN_RADAR | HOSTAPD_CHAN_NO_IR))
+-+		if (!dfs_enabled)
+-+			return;
+- 
+- 	if (ht40 == -1) {
+- 		if (!(pri_chan->flag & HOSTAPD_CHAN_HT40MINUS))
+-@@ -2863,7 +2872,7 @@ static bool ibss_mesh_select_80_160mhz(s
+- 				       const struct wpa_ssid *ssid,
+- 				       struct hostapd_hw_modes *mode,
+- 				       struct hostapd_freq_params *freq,
+--				       int ieee80211_mode, bool is_6ghz) {
+-+				       int ieee80211_mode, bool is_6ghz, bool dfs_enabled) {
+- 	static const int bw80[] = {
+- 		5180, 5260, 5500, 5580, 5660, 5745, 5825,
+- 		5955, 6035, 6115, 6195, 6275, 6355, 6435,
+-@@ -2908,7 +2917,7 @@ static bool ibss_mesh_select_80_160mhz(s
+- 		goto skip_80mhz;
+- 
+- 	/* Use 40 MHz if channel not usable */
+--	if (!ibss_mesh_is_80mhz_avail(channel, mode))
+-+	if (!ibss_mesh_is_80mhz_avail(channel, mode, dfs_enabled))
+- 		goto skip_80mhz;
+- 
+- 	chwidth = CONF_OPER_CHWIDTH_80MHZ;
+-@@ -2922,7 +2931,7 @@ static bool ibss_mesh_select_80_160mhz(s
+- 	if ((mode->he_capab[ieee80211_mode].phy_cap[
+- 		     HE_PHYCAP_CHANNEL_WIDTH_SET_IDX] &
+- 	     HE_PHYCAP_CHANNEL_WIDTH_SET_160MHZ_IN_5G) && is_6ghz &&
+--	    ibss_mesh_is_80mhz_avail(channel + 16, mode)) {
+-+	    ibss_mesh_is_80mhz_avail(channel + 16, mode, dfs_enabled)) {
+- 		for (j = 0; j < ARRAY_SIZE(bw160); j++) {
+- 			if (freq->freq == bw160[j]) {
+- 				chwidth = CONF_OPER_CHWIDTH_160MHZ;
+-@@ -2950,10 +2959,12 @@ static bool ibss_mesh_select_80_160mhz(s
+- 				if (!chan)
+- 					continue;
+- 
+--				if (chan->flag & (HOSTAPD_CHAN_DISABLED |
+--						  HOSTAPD_CHAN_NO_IR |
+--						  HOSTAPD_CHAN_RADAR))
+-+				if (chan->flag & HOSTAPD_CHAN_DISABLED)
+- 					continue;
+-+				if (chan->flag & (HOSTAPD_CHAN_RADAR |
+-+						  HOSTAPD_CHAN_NO_IR))
+-+					if (!dfs_enabled)
+-+						continue;
+- 
+- 				/* Found a suitable second segment for 80+80 */
+- 				chwidth = CONF_OPER_CHWIDTH_80P80MHZ;
+-@@ -3008,6 +3019,7 @@ void ibss_mesh_setup_freq(struct wpa_sup
+- 	int i, obss_scan = 1;
+- 	u8 channel;
+- 	bool is_6ghz;
+-+	bool dfs_enabled = wpa_s->conf->country[0] && (wpa_s->drv_flags & WPA_DRIVER_FLAGS_RADAR);
+- 
+- 	freq->freq = ssid->frequency;
+- 
+-@@ -3053,9 +3065,9 @@ void ibss_mesh_setup_freq(struct wpa_sup
+- 	freq->channel = channel;
+- 	/* Setup higher BW only for 5 GHz */
+- 	if (mode->mode == HOSTAPD_MODE_IEEE80211A) {
+--		ibss_mesh_select_40mhz(wpa_s, ssid, mode, freq, obss_scan);
+-+		ibss_mesh_select_40mhz(wpa_s, ssid, mode, freq, obss_scan, dfs_enabled);
+- 		if (!ibss_mesh_select_80_160mhz(wpa_s, ssid, mode, freq,
+--						ieee80211_mode, is_6ghz))
+-+						ieee80211_mode, is_6ghz, dfs_enabled))
+- 			freq->he_enabled = freq->vht_enabled = false;
+- 	}
+- 
+diff --git a/package/network/services/hostapd/patches/011-mesh-use-deterministic-channel-on-channel-switch.patch b/package/network/services/hostapd/patches/011-mesh-use-deterministic-channel-on-channel-switch.patch
+deleted file mode 100644
+index 20a8bee072..0000000000
+--- a/package/network/services/hostapd/patches/011-mesh-use-deterministic-channel-on-channel-switch.patch
++++ /dev/null
+@@ -1,81 +0,0 @@
+-From fc8ea40f6130ac18d9c66797de2cf1d5af55d496 Mon Sep 17 00:00:00 2001
+-From: Markus Theil <markus.theil@tu-ilmenau.de>
+-Date: Tue, 30 Jun 2020 14:19:07 +0200
+-Subject: [PATCH 19/19] mesh: use deterministic channel on channel switch
+-
+-This patch uses a deterministic channel on DFS channel switch
+-in mesh networks. Otherwise, when switching to a usable but not
+-available channel, no CSA can be sent and a random channel is choosen
+-without notification of other nodes. It is then quite likely, that
+-the mesh network gets disconnected.
+-
+-Fix this by using a deterministic number, based on the sha256 hash
+-of the mesh ID, in order to use at least a different number in each
+-mesh network.
+-
+-Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
+----
+- src/ap/dfs.c                 | 20 +++++++++++++++++++-
+- src/drivers/driver_nl80211.c |  4 ++++
+- 2 files changed, 23 insertions(+), 1 deletion(-)
+-
+---- a/src/ap/dfs.c
+-+++ b/src/ap/dfs.c
+-@@ -17,6 +17,7 @@
+- #include "ap_drv_ops.h"
+- #include "drivers/driver.h"
+- #include "dfs.h"
+-+#include "crypto/crypto.h"
+- 
+- 
+- enum dfs_channel_type {
+-@@ -521,9 +522,14 @@ dfs_get_valid_channel(struct hostapd_ifa
+- 	int num_available_chandefs;
+- 	int chan_idx, chan_idx2;
+- 	int sec_chan_idx_80p80 = -1;
+-+	bool is_mesh = false;
+- 	int i;
+- 	u32 _rand;
+- 
+-+#ifdef CONFIG_MESH
+-+	is_mesh = iface->mconf;
+-+#endif
+-+
+- 	wpa_printf(MSG_DEBUG, "DFS: Selecting random channel");
+- 	*secondary_channel = 0;
+- 	*oper_centr_freq_seg0_idx = 0;
+-@@ -543,8 +549,20 @@ dfs_get_valid_channel(struct hostapd_ifa
+- 	if (num_available_chandefs == 0)
+- 		return NULL;
+- 
+--	if (os_get_random((u8 *) &_rand, sizeof(_rand)) < 0)
+-+	/* try to use deterministic channel in mesh, so that both sides
+-+	 * have a chance to switch to the same channel */
+-+	if (is_mesh) {
+-+#ifdef CONFIG_MESH
+-+		u64 hash[4];
+-+		const u8 *meshid[1] = { &iface->mconf->meshid[0] };
+-+		const size_t meshid_len = iface->mconf->meshid_len;
+-+
+-+		sha256_vector(1, meshid, &meshid_len, (u8 *)&hash[0]);
+-+		_rand = hash[0] + hash[1] + hash[2] + hash[3];
+-+#endif
+-+	} else if (os_get_random((u8 *) &_rand, sizeof(_rand)) < 0)
+- 		return NULL;
+-+
+- 	chan_idx = _rand % num_available_chandefs;
+- 	dfs_find_channel(iface, &chan, chan_idx, type);
+- 	if (!chan) {
+---- a/src/drivers/driver_nl80211.c
+-+++ b/src/drivers/driver_nl80211.c
+-@@ -10739,6 +10739,10 @@ static int nl80211_switch_channel(void *
+- 	if (ret)
+- 		goto error;
+- 
+-+	if (drv->nlmode == NL80211_IFTYPE_MESH_POINT) {
+-+		nla_put_flag(msg, NL80211_ATTR_HANDLE_DFS);
+-+	}
+-+
+- 	/* beacon_csa params */
+- 	beacon_csa = nla_nest_start(msg, NL80211_ATTR_CSA_IES);
+- 	if (!beacon_csa)
+diff --git a/package/network/services/hostapd/patches/021-fix-sta-add-after-previous-connection.patch b/package/network/services/hostapd/patches/021-fix-sta-add-after-previous-connection.patch
+deleted file mode 100644
+index 827e122baf..0000000000
+--- a/package/network/services/hostapd/patches/021-fix-sta-add-after-previous-connection.patch
++++ /dev/null
+@@ -1,26 +0,0 @@
+---- a/src/ap/ieee802_11.c
+-+++ b/src/ap/ieee802_11.c
+-@@ -4168,6 +4168,13 @@ static int add_associated_sta(struct hos
+- 	 * drivers to accept the STA parameter configuration. Since this is
+- 	 * after a new FT-over-DS exchange, a new TK has been derived, so key
+- 	 * reinstallation is not a concern for this case.
+-+	 *
+-+	 * If the STA was associated and authorized earlier, but came for a new
+-+	 * connection (!added_unassoc + !reassoc), remove the existing STA entry
+-+	 * so that it can be re-added. This case is rarely seen when the AP could
+-+	 * not receive the deauth/disassoc frame from the STA. And the STA comes
+-+	 * back with new connection within a short period or before the inactive
+-+	 * STA entry is removed from the list.
+- 	 */
+- 	wpa_printf(MSG_DEBUG, "Add associated STA " MACSTR
+- 		   " (added_unassoc=%d auth_alg=%u ft_over_ds=%u reassoc=%d authorized=%d ft_tk=%d fils_tk=%d)",
+-@@ -4181,7 +4188,8 @@ static int add_associated_sta(struct hos
+- 	    (!(sta->flags & WLAN_STA_AUTHORIZED) ||
+- 	     (reassoc && sta->ft_over_ds && sta->auth_alg == WLAN_AUTH_FT) ||
+- 	     (!wpa_auth_sta_ft_tk_already_set(sta->wpa_sm) &&
+--	      !wpa_auth_sta_fils_tk_already_set(sta->wpa_sm)))) {
+-+	      !wpa_auth_sta_fils_tk_already_set(sta->wpa_sm)) ||
+-+	     (!reassoc && (sta->flags & WLAN_STA_AUTHORIZED)))) {
+- 		hostapd_drv_sta_remove(hapd, sta->addr);
+- 		wpa_auth_sm_event(sta->wpa_sm, WPA_DRV_STA_REMOVED);
+- 		set = 0;
+diff --git a/package/network/services/hostapd/patches/022-hostapd-fix-use-of-uninitialized-stack-variables.patch b/package/network/services/hostapd/patches/022-hostapd-fix-use-of-uninitialized-stack-variables.patch
+deleted file mode 100644
+index f4f56f5107..0000000000
+--- a/package/network/services/hostapd/patches/022-hostapd-fix-use-of-uninitialized-stack-variables.patch
++++ /dev/null
+@@ -1,25 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Thu, 8 Jul 2021 16:33:03 +0200
+-Subject: [PATCH] hostapd: fix use of uninitialized stack variables
+-
+-When a CSA is performed on an 80 MHz channel, hostapd_change_config_freq
+-unconditionally calls hostapd_set_oper_centr_freq_seg0/1_idx with seg0/1
+-filled by ieee80211_freq_to_chan.
+-However, if ieee80211_freq_to_chan fails (because the freq is 0 or invalid),
+-seg0/1 remains uninitialized and filled with stack garbage, causing errors
+-such as "hostapd: 80 MHz: center segment 1 configured"
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/src/ap/hostapd.c
+-+++ b/src/ap/hostapd.c
+-@@ -3562,7 +3562,7 @@ static int hostapd_change_config_freq(st
+- 				      struct hostapd_freq_params *old_params)
+- {
+- 	int channel;
+--	u8 seg0, seg1;
+-+	u8 seg0 = 0, seg1 = 0;
+- 	struct hostapd_hw_modes *mode;
+- 
+- 	if (!params->channel) {
+diff --git a/package/network/services/hostapd/patches/023-ndisc_snoop-call-dl_list_del-before-freeing-ipv6-add.patch b/package/network/services/hostapd/patches/023-ndisc_snoop-call-dl_list_del-before-freeing-ipv6-add.patch
+deleted file mode 100644
+index 9ff9b2398d..0000000000
+--- a/package/network/services/hostapd/patches/023-ndisc_snoop-call-dl_list_del-before-freeing-ipv6-add.patch
++++ /dev/null
+@@ -1,19 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Wed, 28 Jul 2021 05:43:29 +0200
+-Subject: [PATCH] ndisc_snoop: call dl_list_del before freeing ipv6 addresses
+-
+-Fixes a segmentation fault on sta disconnect
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/src/ap/ndisc_snoop.c
+-+++ b/src/ap/ndisc_snoop.c
+-@@ -61,6 +61,7 @@ void sta_ip6addr_del(struct hostapd_data
+- 	dl_list_for_each_safe(ip6addr, prev, &sta->ip6addr, struct ip6addr,
+- 			      list) {
+- 		hostapd_drv_br_delete_ip_neigh(hapd, 6, (u8 *) &ip6addr->addr);
+-+		dl_list_del(&ip6addr->list);
+- 		os_free(ip6addr);
+- 	}
+- }
+diff --git a/package/network/services/hostapd/patches/030-driver_nl80211-rewrite-neigh-code-to-not-depend-on-l.patch b/package/network/services/hostapd/patches/030-driver_nl80211-rewrite-neigh-code-to-not-depend-on-l.patch
+deleted file mode 100644
+index c02d4b497e..0000000000
+--- a/package/network/services/hostapd/patches/030-driver_nl80211-rewrite-neigh-code-to-not-depend-on-l.patch
++++ /dev/null
+@@ -1,275 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Wed, 28 Jul 2021 05:49:46 +0200
+-Subject: [PATCH] driver_nl80211: rewrite neigh code to not depend on
+- libnl3-route
+-
+-Removes an unnecessary dependency and also makes the code smaller
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/src/drivers/driver_nl80211.c
+-+++ b/src/drivers/driver_nl80211.c
+-@@ -16,9 +16,6 @@
+- #include <net/if.h>
+- #include <netlink/genl/genl.h>
+- #include <netlink/genl/ctrl.h>
+--#ifdef CONFIG_LIBNL3_ROUTE
+--#include <netlink/route/neighbour.h>
+--#endif /* CONFIG_LIBNL3_ROUTE */
+- #include <linux/rtnetlink.h>
+- #include <netpacket/packet.h>
+- #include <linux/errqueue.h>
+-@@ -5590,26 +5587,29 @@ fail:
+- 
+- static void rtnl_neigh_delete_fdb_entry(struct i802_bss *bss, const u8 *addr)
+- {
+--#ifdef CONFIG_LIBNL3_ROUTE
+- 	struct wpa_driver_nl80211_data *drv = bss->drv;
+--	struct rtnl_neigh *rn;
+--	struct nl_addr *nl_addr;
+-+	struct ndmsg nhdr = {
+-+		.ndm_state = NUD_PERMANENT,
+-+		.ndm_ifindex = bss->ifindex,
+-+		.ndm_family = AF_BRIDGE,
+-+	};
+-+	struct nl_msg *msg;
+- 	int err;
+- 
+--	rn = rtnl_neigh_alloc();
+--	if (!rn)
+-+	msg = nlmsg_alloc_simple(RTM_DELNEIGH, NLM_F_CREATE);
+-+	if (!msg)
+- 		return;
+- 
+--	rtnl_neigh_set_family(rn, AF_BRIDGE);
+--	rtnl_neigh_set_ifindex(rn, bss->ifindex);
+--	nl_addr = nl_addr_build(AF_BRIDGE, (void *) addr, ETH_ALEN);
+--	if (!nl_addr) {
+--		rtnl_neigh_put(rn);
+--		return;
+--	}
+--	rtnl_neigh_set_lladdr(rn, nl_addr);
+-+	if (nlmsg_append(msg, &nhdr, sizeof(nhdr), NLMSG_ALIGNTO) < 0)
+-+		goto errout;
+-+
+-+	if (nla_put(msg, NDA_LLADDR, ETH_ALEN, (void *)addr))
+-+		goto errout;
+-+
+-+	if (nl_send_auto_complete(drv->rtnl_sk, msg) < 0)
+-+		goto errout;
+- 
+--	err = rtnl_neigh_delete(drv->rtnl_sk, rn, 0);
+-+	err = nl_wait_for_ack(drv->rtnl_sk);
+- 	if (err < 0) {
+- 		wpa_printf(MSG_DEBUG, "nl80211: bridge FDB entry delete for "
+- 			   MACSTR " ifindex=%d failed: %s", MAC2STR(addr),
+-@@ -5619,9 +5619,8 @@ static void rtnl_neigh_delete_fdb_entry(
+- 			   MACSTR, MAC2STR(addr));
+- 	}
+- 
+--	nl_addr_put(nl_addr);
+--	rtnl_neigh_put(rn);
+--#endif /* CONFIG_LIBNL3_ROUTE */
+-+errout:
+-+	nlmsg_free(msg);
+- }
+- 
+- 
+-@@ -8275,7 +8274,6 @@ static void *i802_init(struct hostapd_da
+- 	    (params->num_bridge == 0 || !params->bridge[0]))
+- 		add_ifidx(drv, br_ifindex, drv->ifindex);
+- 
+--#ifdef CONFIG_LIBNL3_ROUTE
+- 	if (bss->added_if_into_bridge || bss->already_in_bridge) {
+- 		int err;
+- 
+-@@ -8292,7 +8290,6 @@ static void *i802_init(struct hostapd_da
+- 			goto failed;
+- 		}
+- 	}
+--#endif /* CONFIG_LIBNL3_ROUTE */
+- 
+- 	if (drv->capa.flags2 & WPA_DRIVER_FLAGS2_CONTROL_PORT_RX) {
+- 		wpa_printf(MSG_DEBUG,
+-@@ -11605,13 +11602,14 @@ static int wpa_driver_br_add_ip_neigh(vo
+- 				      const u8 *ipaddr, int prefixlen,
+- 				      const u8 *addr)
+- {
+--#ifdef CONFIG_LIBNL3_ROUTE
+- 	struct i802_bss *bss = priv;
+- 	struct wpa_driver_nl80211_data *drv = bss->drv;
+--	struct rtnl_neigh *rn;
+--	struct nl_addr *nl_ipaddr = NULL;
+--	struct nl_addr *nl_lladdr = NULL;
+--	int family, addrsize;
+-+	struct ndmsg nhdr = {
+-+		.ndm_state = NUD_PERMANENT,
+-+		.ndm_ifindex = bss->br_ifindex,
+-+	};
+-+	struct nl_msg *msg;
+-+	int addrsize;
+- 	int res;
+- 
+- 	if (!ipaddr || prefixlen == 0 || !addr)
+-@@ -11630,85 +11628,66 @@ static int wpa_driver_br_add_ip_neigh(vo
+- 	}
+- 
+- 	if (version == 4) {
+--		family = AF_INET;
+-+		nhdr.ndm_family = AF_INET;
+- 		addrsize = 4;
+- 	} else if (version == 6) {
+--		family = AF_INET6;
+-+		nhdr.ndm_family = AF_INET6;
+- 		addrsize = 16;
+- 	} else {
+- 		return -EINVAL;
+- 	}
+- 
+--	rn = rtnl_neigh_alloc();
+--	if (rn == NULL)
+-+	msg = nlmsg_alloc_simple(RTM_NEWNEIGH, NLM_F_CREATE);
+-+	if (!msg)
+- 		return -ENOMEM;
+- 
+--	/* set the destination ip address for neigh */
+--	nl_ipaddr = nl_addr_build(family, (void *) ipaddr, addrsize);
+--	if (nl_ipaddr == NULL) {
+--		wpa_printf(MSG_DEBUG, "nl80211: nl_ipaddr build failed");
+--		res = -ENOMEM;
+-+	res = -ENOMEM;
+-+	if (nlmsg_append(msg, &nhdr, sizeof(nhdr), NLMSG_ALIGNTO) < 0)
+- 		goto errout;
+--	}
+--	nl_addr_set_prefixlen(nl_ipaddr, prefixlen);
+--	res = rtnl_neigh_set_dst(rn, nl_ipaddr);
+--	if (res) {
+--		wpa_printf(MSG_DEBUG,
+--			   "nl80211: neigh set destination addr failed");
+-+
+-+	if (nla_put(msg, NDA_DST, addrsize, (void *)ipaddr))
+- 		goto errout;
+--	}
+- 
+--	/* set the corresponding lladdr for neigh */
+--	nl_lladdr = nl_addr_build(AF_BRIDGE, (u8 *) addr, ETH_ALEN);
+--	if (nl_lladdr == NULL) {
+--		wpa_printf(MSG_DEBUG, "nl80211: neigh set lladdr failed");
+--		res = -ENOMEM;
+-+	if (nla_put(msg, NDA_LLADDR, ETH_ALEN, (void *)addr))
+- 		goto errout;
+--	}
+--	rtnl_neigh_set_lladdr(rn, nl_lladdr);
+- 
+--	rtnl_neigh_set_ifindex(rn, bss->br_ifindex);
+--	rtnl_neigh_set_state(rn, NUD_PERMANENT);
+-+	res = nl_send_auto_complete(drv->rtnl_sk, msg);
+-+	if (res < 0)
+-+		goto errout;
+- 
+--	res = rtnl_neigh_add(drv->rtnl_sk, rn, NLM_F_CREATE);
+-+	res = nl_wait_for_ack(drv->rtnl_sk);
+- 	if (res) {
+- 		wpa_printf(MSG_DEBUG,
+- 			   "nl80211: Adding bridge ip neigh failed: %s",
+- 			   nl_geterror(res));
+- 	}
+- errout:
+--	if (nl_lladdr)
+--		nl_addr_put(nl_lladdr);
+--	if (nl_ipaddr)
+--		nl_addr_put(nl_ipaddr);
+--	if (rn)
+--		rtnl_neigh_put(rn);
+-+	nlmsg_free(msg);
+- 	return res;
+--#else /* CONFIG_LIBNL3_ROUTE */
+--	return -1;
+--#endif /* CONFIG_LIBNL3_ROUTE */
+- }
+- 
+- 
+- static int wpa_driver_br_delete_ip_neigh(void *priv, u8 version,
+- 					 const u8 *ipaddr)
+- {
+--#ifdef CONFIG_LIBNL3_ROUTE
+- 	struct i802_bss *bss = priv;
+- 	struct wpa_driver_nl80211_data *drv = bss->drv;
+--	struct rtnl_neigh *rn;
+--	struct nl_addr *nl_ipaddr;
+--	int family, addrsize;
+-+	struct ndmsg nhdr = {
+-+		.ndm_state = NUD_PERMANENT,
+-+		.ndm_ifindex = bss->br_ifindex,
+-+	};
+-+	struct nl_msg *msg;
+-+	int addrsize;
+- 	int res;
+- 
+- 	if (!ipaddr)
+- 		return -EINVAL;
+- 
+- 	if (version == 4) {
+--		family = AF_INET;
+-+		nhdr.ndm_family = AF_INET;
+- 		addrsize = 4;
+- 	} else if (version == 6) {
+--		family = AF_INET6;
+-+		nhdr.ndm_family = AF_INET6;
+- 		addrsize = 16;
+- 	} else {
+- 		return -EINVAL;
+-@@ -11726,41 +11705,30 @@ static int wpa_driver_br_delete_ip_neigh
+- 		return -1;
+- 	}
+- 
+--	rn = rtnl_neigh_alloc();
+--	if (rn == NULL)
+-+	msg = nlmsg_alloc_simple(RTM_DELNEIGH, NLM_F_CREATE);
+-+	if (!msg)
+- 		return -ENOMEM;
+- 
+--	/* set the destination ip address for neigh */
+--	nl_ipaddr = nl_addr_build(family, (void *) ipaddr, addrsize);
+--	if (nl_ipaddr == NULL) {
+--		wpa_printf(MSG_DEBUG, "nl80211: nl_ipaddr build failed");
+--		res = -ENOMEM;
+-+	res = -ENOMEM;
+-+	if (nlmsg_append(msg, &nhdr, sizeof(nhdr), NLMSG_ALIGNTO) < 0)
+- 		goto errout;
+--	}
+--	res = rtnl_neigh_set_dst(rn, nl_ipaddr);
+--	if (res) {
+--		wpa_printf(MSG_DEBUG,
+--			   "nl80211: neigh set destination addr failed");
+-+
+-+	if (nla_put(msg, NDA_DST, addrsize, (void *)ipaddr))
+- 		goto errout;
+--	}
+- 
+--	rtnl_neigh_set_ifindex(rn, bss->br_ifindex);
+-+	res = nl_send_auto_complete(drv->rtnl_sk, msg);
+-+	if (res < 0)
+-+		goto errout;
+- 
+--	res = rtnl_neigh_delete(drv->rtnl_sk, rn, 0);
+-+	res = nl_wait_for_ack(drv->rtnl_sk);
+- 	if (res) {
+- 		wpa_printf(MSG_DEBUG,
+- 			   "nl80211: Deleting bridge ip neigh failed: %s",
+- 			   nl_geterror(res));
+- 	}
+- errout:
+--	if (nl_ipaddr)
+--		nl_addr_put(nl_ipaddr);
+--	if (rn)
+--		rtnl_neigh_put(rn);
+-+	nlmsg_free(msg);
+- 	return res;
+--#else /* CONFIG_LIBNL3_ROUTE */
+--	return -1;
+--#endif /* CONFIG_LIBNL3_ROUTE */
+- }
+- 
+- 
+diff --git a/package/network/services/hostapd/patches/040-mesh-allow-processing-authentication-frames-in-block.patch b/package/network/services/hostapd/patches/040-mesh-allow-processing-authentication-frames-in-block.patch
+deleted file mode 100644
+index 179d47ecc4..0000000000
+--- a/package/network/services/hostapd/patches/040-mesh-allow-processing-authentication-frames-in-block.patch
++++ /dev/null
+@@ -1,34 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Mon, 18 Feb 2019 12:57:11 +0100
+-Subject: [PATCH] mesh: allow processing authentication frames in blocked state
+-
+-If authentication fails repeatedly e.g. because of a weak signal, the link
+-can end up in blocked state. If one of the nodes tries to establish a link
+-again before it is unblocked on the other side, it will block the link to
+-that other side. The same happens on the other side when it unblocks the
+-link. In that scenario, the link never recovers on its own.
+-
+-To fix this, allow restarting authentication even if the link is in blocked
+-state, but don't initiate the attempt until the blocked period is over.
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/src/ap/ieee802_11.c
+-+++ b/src/ap/ieee802_11.c
+-@@ -2948,15 +2948,6 @@ static void handle_auth(struct hostapd_d
+- 				       seq_ctrl);
+- 			return;
+- 		}
+--#ifdef CONFIG_MESH
+--		if ((hapd->conf->mesh & MESH_ENABLED) &&
+--		    sta->plink_state == PLINK_BLOCKED) {
+--			wpa_printf(MSG_DEBUG, "Mesh peer " MACSTR
+--				   " is blocked - drop Authentication frame",
+--				   MAC2STR(mgmt->sa));
+--			return;
+--		}
+--#endif /* CONFIG_MESH */
+- #ifdef CONFIG_PASN
+- 		if (auth_alg == WLAN_AUTH_PASN &&
+- 		    (sta->flags & WLAN_STA_ASSOC)) {
+diff --git a/package/network/services/hostapd/patches/050-build_fix.patch b/package/network/services/hostapd/patches/050-build_fix.patch
+deleted file mode 100644
+index 8680b07c66..0000000000
+--- a/package/network/services/hostapd/patches/050-build_fix.patch
++++ /dev/null
+@@ -1,20 +0,0 @@
+---- a/hostapd/Makefile
+-+++ b/hostapd/Makefile
+-@@ -324,6 +324,7 @@ ifdef CONFIG_FILS
+- CFLAGS += -DCONFIG_FILS
+- OBJS += ../src/ap/fils_hlp.o
+- NEED_SHA384=y
+-+NEED_HMAC_SHA384_KDF=y
+- NEED_AES_SIV=y
+- ifdef CONFIG_FILS_SK_PFS
+- CFLAGS += -DCONFIG_FILS_SK_PFS
+---- a/wpa_supplicant/Makefile
+-+++ b/wpa_supplicant/Makefile
+-@@ -331,6 +331,7 @@ endif
+- ifdef CONFIG_FILS
+- CFLAGS += -DCONFIG_FILS
+- NEED_SHA384=y
+-+NEED_HMAC_SHA384_KDF=y
+- NEED_AES_SIV=y
+- ifdef CONFIG_FILS_SK_PFS
+- CFLAGS += -DCONFIG_FILS_SK_PFS
+diff --git a/package/network/services/hostapd/patches/100-daemonize_fix.patch b/package/network/services/hostapd/patches/100-daemonize_fix.patch
+deleted file mode 100644
+index 687bd4082d..0000000000
+--- a/package/network/services/hostapd/patches/100-daemonize_fix.patch
++++ /dev/null
+@@ -1,97 +0,0 @@
+---- a/src/utils/os_unix.c
+-+++ b/src/utils/os_unix.c
+-@@ -10,6 +10,7 @@
+- 
+- #include <time.h>
+- #include <sys/wait.h>
+-+#include <fcntl.h>
+- 
+- #ifdef ANDROID
+- #include <sys/capability.h>
+-@@ -188,59 +189,46 @@ int os_gmtime(os_time_t t, struct os_tm
+- 	return 0;
+- }
+- 
+--
+--#ifdef __APPLE__
+--#include <fcntl.h>
+--static int os_daemon(int nochdir, int noclose)
+-+int os_daemonize(const char *pid_file)
+- {
+--	int devnull;
+-+	int pid = 0, i, devnull;
+- 
+--	if (chdir("/") < 0)
+--		return -1;
+-+#if defined(__uClinux__) || defined(__sun__)
+-+	return -1;
+-+#else /* defined(__uClinux__) || defined(__sun__) */
+- 
+--	devnull = open("/dev/null", O_RDWR);
+--	if (devnull < 0)
+-+#ifndef __APPLE__
+-+	pid = fork();
+-+	if (pid < 0)
+- 		return -1;
+-+#endif
+- 
+--	if (dup2(devnull, STDIN_FILENO) < 0) {
+--		close(devnull);
+--		return -1;
+-+	if (pid > 0) {
+-+		if (pid_file) {
+-+			FILE *f = fopen(pid_file, "w");
+-+			if (f) {
+-+				fprintf(f, "%u\n", pid);
+-+				fclose(f);
+-+			}
+-+		}
+-+		_exit(0);
+- 	}
+- 
+--	if (dup2(devnull, STDOUT_FILENO) < 0) {
+--		close(devnull);
+-+	if (setsid() < 0)
+- 		return -1;
+--	}
+- 
+--	if (dup2(devnull, STDERR_FILENO) < 0) {
+--		close(devnull);
+-+	if (chdir("/") < 0)
+- 		return -1;
+--	}
+--
+--	return 0;
+--}
+--#else /* __APPLE__ */
+--#define os_daemon daemon
+--#endif /* __APPLE__ */
+- 
+--
+--int os_daemonize(const char *pid_file)
+--{
+--#if defined(__uClinux__) || defined(__sun__)
+--	return -1;
+--#else /* defined(__uClinux__) || defined(__sun__) */
+--	if (os_daemon(0, 0)) {
+--		perror("daemon");
+-+	devnull = open("/dev/null", O_RDWR);
+-+	if (devnull < 0)
+- 		return -1;
+--	}
+- 
+--	if (pid_file) {
+--		FILE *f = fopen(pid_file, "w");
+--		if (f) {
+--			fprintf(f, "%u\n", getpid());
+--			fclose(f);
+--		}
+--	}
+-+	for (i = 0; i <= STDERR_FILENO; i++)
+-+		dup2(devnull, i);
+-+
+-+	if (devnull > 2)
+-+		close(devnull);
+- 
+- 	return -0;
+- #endif /* defined(__uClinux__) || defined(__sun__) */
+diff --git a/package/network/services/hostapd/patches/110-mbedtls-TLS-crypto-option-initial-port.patch b/package/network/services/hostapd/patches/110-mbedtls-TLS-crypto-option-initial-port.patch
+deleted file mode 100644
+index 22107944dc..0000000000
+--- a/package/network/services/hostapd/patches/110-mbedtls-TLS-crypto-option-initial-port.patch
++++ /dev/null
+@@ -1,8051 +0,0 @@
+-From e16f200dc1d2f69efc78c7c55af0d7b410a981f9 Mon Sep 17 00:00:00 2001
+-From: Glenn Strauss <gstrauss@gluelogic.com>
+-Date: Tue, 5 Jul 2022 02:49:50 -0400
+-Subject: [PATCH 1/7] mbedtls: TLS/crypto option (initial port)
+-
+-Signed-off-by: Glenn Strauss <gstrauss@gluelogic.com>
+----
+- hostapd/Makefile                              |   91 +
+- hostapd/defconfig                             |   15 +-
+- src/crypto/crypto_mbedtls.c                   | 4043 +++++++++++++++++
+- src/crypto/tls_mbedtls.c                      | 3313 ++++++++++++++
+- .../build/build-wpa_supplicant-mbedtls.config |   24 +
+- tests/hwsim/example-hostapd.config            |    4 +
+- tests/hwsim/example-wpa_supplicant.config     |    4 +
+- wpa_supplicant/Makefile                       |   74 +
+- wpa_supplicant/defconfig                      |    6 +-
+- 9 files changed, 7571 insertions(+), 3 deletions(-)
+- create mode 100644 src/crypto/crypto_mbedtls.c
+- create mode 100644 src/crypto/tls_mbedtls.c
+- create mode 100644 tests/build/build-wpa_supplicant-mbedtls.config
+-
+---- a/hostapd/Makefile
+-+++ b/hostapd/Makefile
+-@@ -745,6 +745,40 @@ endif
+- CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONFIG_TLS_DEFAULT_CIPHERS)\"
+- endif
+- 
+-+ifeq ($(CONFIG_TLS), mbedtls)
+-+ifndef CONFIG_CRYPTO
+-+CONFIG_CRYPTO=mbedtls
+-+endif
+-+ifdef TLS_FUNCS
+-+OBJS += ../src/crypto/tls_mbedtls.o
+-+LIBS += -lmbedtls
+-+ifndef CONFIG_DPP
+-+LIBS += -lmbedx509
+-+endif
+-+endif
+-+OBJS += ../src/crypto/crypto_$(CONFIG_CRYPTO).o
+-+HOBJS += ../src/crypto/crypto_$(CONFIG_CRYPTO).o
+-+SOBJS += ../src/crypto/crypto_$(CONFIG_CRYPTO).o
+-+ifdef NEED_FIPS186_2_PRF
+-+OBJS += ../src/crypto/fips_prf_internal.o
+-+SHA1OBJS += ../src/crypto/sha1-internal.o
+-+endif
+-+ifeq ($(CONFIG_CRYPTO), mbedtls)
+-+ifdef CONFIG_DPP
+-+LIBS += -lmbedx509
+-+LIBS_h += -lmbedx509
+-+LIBS_n += -lmbedx509
+-+LIBS_s += -lmbedx509
+-+endif
+-+LIBS += -lmbedcrypto
+-+LIBS_h += -lmbedcrypto
+-+LIBS_n += -lmbedcrypto
+-+LIBS_s += -lmbedcrypto
+-+# XXX: create a config option?
+-+CFLAGS += -DCRYPTO_RSA_OAEP_SHA256
+-+endif
+-+endif
+-+
+- ifeq ($(CONFIG_TLS), gnutls)
+- ifndef CONFIG_CRYPTO
+- # default to libgcrypt
+-@@ -924,9 +958,11 @@ endif
+- 
+- ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- AESOBJS += ../src/crypto/aes-wrap.o
+- endif
+- endif
+-+endif
+- ifdef NEED_AES_EAX
+- AESOBJS += ../src/crypto/aes-eax.o
+- NEED_AES_CTR=y
+-@@ -936,38 +972,48 @@ AESOBJS += ../src/crypto/aes-siv.o
+- NEED_AES_CTR=y
+- endif
+- ifdef NEED_AES_CTR
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- AESOBJS += ../src/crypto/aes-ctr.o
+- endif
+-+endif
+- ifdef NEED_AES_ENCBLOCK
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- AESOBJS += ../src/crypto/aes-encblock.o
+- endif
+-+endif
+- ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), linux)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- AESOBJS += ../src/crypto/aes-omac1.o
+- endif
+- endif
+- endif
+-+endif
+- ifdef NEED_AES_UNWRAP
+- ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), linux)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- NEED_AES_DEC=y
+- AESOBJS += ../src/crypto/aes-unwrap.o
+- endif
+- endif
+- endif
+- endif
+-+endif
+- ifdef NEED_AES_CBC
+- NEED_AES_DEC=y
+- ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), linux)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- AESOBJS += ../src/crypto/aes-cbc.o
+- endif
+- endif
+- endif
+- endif
+-+endif
+- ifdef NEED_AES_DEC
+- ifdef CONFIG_INTERNAL_AES
+- AESOBJS += ../src/crypto/aes-internal-dec.o
+-@@ -982,12 +1028,16 @@ ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), linux)
+- ifneq ($(CONFIG_TLS), gnutls)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- SHA1OBJS += ../src/crypto/sha1.o
+- endif
+- endif
+- endif
+- endif
+-+endif
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- SHA1OBJS += ../src/crypto/sha1-prf.o
+-+endif
+- ifdef CONFIG_INTERNAL_SHA1
+- SHA1OBJS += ../src/crypto/sha1-internal.o
+- ifdef NEED_FIPS186_2_PRF
+-@@ -996,16 +1046,22 @@ endif
+- endif
+- ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- SHA1OBJS += ../src/crypto/sha1-pbkdf2.o
+- endif
+- endif
+-+endif
+- ifdef NEED_T_PRF
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- SHA1OBJS += ../src/crypto/sha1-tprf.o
+- endif
+-+endif
+- ifdef NEED_TLS_PRF
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- SHA1OBJS += ../src/crypto/sha1-tlsprf.o
+- endif
+- endif
+-+endif
+- 
+- ifdef NEED_SHA1
+- OBJS += $(SHA1OBJS)
+-@@ -1015,11 +1071,13 @@ ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), linux)
+- ifneq ($(CONFIG_TLS), gnutls)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/md5.o
+- endif
+- endif
+- endif
+- endif
+-+endif
+- 
+- ifdef NEED_MD5
+- ifdef CONFIG_INTERNAL_MD5
+-@@ -1058,56 +1116,81 @@ ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), linux)
+- ifneq ($(CONFIG_TLS), gnutls)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha256.o
+- endif
+- endif
+- endif
+- endif
+-+endif
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha256-prf.o
+-+endif
+- ifdef CONFIG_INTERNAL_SHA256
+- OBJS += ../src/crypto/sha256-internal.o
+- endif
+- ifdef NEED_TLS_PRF_SHA256
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha256-tlsprf.o
+- endif
+-+endif
+- ifdef NEED_TLS_PRF_SHA384
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha384-tlsprf.o
+- endif
+-+endif
+- ifdef NEED_HMAC_SHA256_KDF
+-+CFLAGS += -DCONFIG_HMAC_SHA256_KDF
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha256-kdf.o
+- endif
+-+endif
+- ifdef NEED_HMAC_SHA384_KDF
+-+CFLAGS += -DCONFIG_HMAC_SHA384_KDF
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha384-kdf.o
+- endif
+-+endif
+- ifdef NEED_HMAC_SHA512_KDF
+-+CFLAGS += -DCONFIG_HMAC_SHA512_KDF
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha512-kdf.o
+- endif
+-+endif
+- ifdef NEED_SHA384
+- CFLAGS += -DCONFIG_SHA384
+- ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), linux)
+- ifneq ($(CONFIG_TLS), gnutls)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha384.o
+- endif
+- endif
+- endif
+- endif
+-+endif
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha384-prf.o
+- endif
+-+endif
+- ifdef NEED_SHA512
+- CFLAGS += -DCONFIG_SHA512
+- ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), linux)
+- ifneq ($(CONFIG_TLS), gnutls)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha512.o
+- endif
+- endif
+- endif
+- endif
+-+endif
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha512-prf.o
+- endif
+-+endif
+- 
+- ifdef CONFIG_INTERNAL_SHA384
+- CFLAGS += -DCONFIG_INTERNAL_SHA384
+-@@ -1152,11 +1235,13 @@ HOBJS += $(SHA1OBJS)
+- ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), linux)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- HOBJS += ../src/crypto/md5.o
+- endif
+- endif
+- endif
+- endif
+-+endif
+- 
+- ifdef CONFIG_RADIUS_SERVER
+- CFLAGS += -DRADIUS_SERVER
+-@@ -1329,7 +1414,9 @@ NOBJS += ../src/utils/trace.o
+- endif
+- 
+- HOBJS += hlr_auc_gw.o ../src/utils/common.o ../src/utils/wpa_debug.o ../src/utils/os_$(CONFIG_OS).o ../src/utils/wpabuf.o ../src/crypto/milenage.o
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- HOBJS += ../src/crypto/aes-encblock.o
+-+endif
+- ifdef CONFIG_INTERNAL_AES
+- HOBJS += ../src/crypto/aes-internal.o
+- HOBJS += ../src/crypto/aes-internal-enc.o
+-@@ -1352,13 +1439,17 @@ SOBJS += ../src/common/sae.o
+- SOBJS += ../src/common/sae_pk.o
+- SOBJS += ../src/common/dragonfly.o
+- SOBJS += $(AESOBJS)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- SOBJS += ../src/crypto/sha256-prf.o
+- SOBJS += ../src/crypto/sha384-prf.o
+- SOBJS += ../src/crypto/sha512-prf.o
+-+endif
+- SOBJS += ../src/crypto/dh_groups.o
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- SOBJS += ../src/crypto/sha256-kdf.o
+- SOBJS += ../src/crypto/sha384-kdf.o
+- SOBJS += ../src/crypto/sha512-kdf.o
+-+endif
+- 
+- _OBJS_VAR := NOBJS
+- include ../src/objs.mk
+---- a/hostapd/defconfig
+-+++ b/hostapd/defconfig
+-@@ -6,9 +6,21 @@
+- # just setting VARIABLE=n is not disabling that variable.
+- #
+- # This file is included in Makefile, so variables like CFLAGS and LIBS can also
+--# be modified from here. In most cass, these lines should use += in order not
+-+# be modified from here. In most cases, these lines should use += in order not
+- # to override previous values of the variables.
+- 
+-+
+-+# Uncomment following two lines and fix the paths if you have installed TLS
+-+# libraries in a non-default location
+-+#CFLAGS += -I/usr/local/openssl/include
+-+#LIBS += -L/usr/local/openssl/lib
+-+
+-+# Some Red Hat versions seem to include kerberos header files from OpenSSL, but
+-+# the kerberos files are not in the default include path. Following line can be
+-+# used to fix build issues on such systems (krb5.h not found).
+-+#CFLAGS += -I/usr/include/kerberos
+-+
+-+
+- # Driver interface for Host AP driver
+- CONFIG_DRIVER_HOSTAP=y
+- 
+-@@ -278,6 +290,7 @@ CONFIG_IPV6=y
+- # openssl = OpenSSL (default)
+- # gnutls = GnuTLS
+- # internal = Internal TLSv1 implementation (experimental)
+-+# mbedtls = mbed TLS
+- # linux = Linux kernel AF_ALG and internal TLSv1 implementation (experimental)
+- # none = Empty template
+- #CONFIG_TLS=openssl
+---- /dev/null
+-+++ b/src/crypto/crypto_mbedtls.c
+-@@ -0,0 +1,4043 @@
+-+/*
+-+ * crypto wrapper functions for mbed TLS
+-+ *
+-+ * SPDX-FileCopyrightText: 2022 Glenn Strauss <gstrauss@gluelogic.com>
+-+ * SPDX-License-Identifier: BSD-3-Clause
+-+ */
+-+
+-+#include "utils/includes.h"
+-+#include "utils/common.h"
+-+
+-+#include <mbedtls/version.h>
+-+#include <mbedtls/entropy.h>
+-+#include <mbedtls/ctr_drbg.h>
+-+#include <mbedtls/platform_util.h> /* mbedtls_platform_zeroize() */
+-+#include <mbedtls/asn1.h>
+-+#include <mbedtls/asn1write.h>
+-+#include <mbedtls/aes.h>
+-+#include <mbedtls/md.h>
+-+#include <mbedtls/md5.h>
+-+#include <mbedtls/sha1.h>
+-+#include <mbedtls/sha256.h>
+-+#include <mbedtls/sha512.h>
+-+
+-+#ifndef MBEDTLS_PRIVATE
+-+#define MBEDTLS_PRIVATE(x) x
+-+#endif
+-+
+-+/* hostapd/wpa_supplicant provides forced_memzero(),
+-+ * but prefer mbedtls_platform_zeroize() */
+-+#define forced_memzero(ptr,sz) mbedtls_platform_zeroize(ptr,sz)
+-+
+-+#ifndef __has_attribute
+-+#define __has_attribute(x) 0
+-+#endif
+-+
+-+#ifndef __GNUC_PREREQ
+-+#define __GNUC_PREREQ(maj,min) 0
+-+#endif
+-+
+-+#ifndef __attribute_cold__
+-+#if __has_attribute(cold) \
+-+ || __GNUC_PREREQ(4,3)
+-+#define __attribute_cold__  __attribute__((__cold__))
+-+#else
+-+#define __attribute_cold__
+-+#endif
+-+#endif
+-+
+-+#ifndef __attribute_noinline__
+-+#if __has_attribute(noinline) \
+-+ || __GNUC_PREREQ(3,1)
+-+#define __attribute_noinline__  __attribute__((__noinline__))
+-+#else
+-+#define __attribute_noinline__
+-+#endif
+-+#endif
+-+
+-+#include "crypto.h"
+-+#include "aes_wrap.h"
+-+#include "aes.h"
+-+#include "md5.h"
+-+#include "sha1.h"
+-+#include "sha256.h"
+-+#include "sha384.h"
+-+#include "sha512.h"
+-+
+-+
+-+/*
+-+ * selective code inclusion based on preprocessor defines
+-+ *
+-+ * future: additional code could be wrapped with preprocessor checks if
+-+ * wpa_supplicant/Makefile and hostap/Makefile were more consistent with
+-+ * setting preprocessor defines for named groups of functionality
+-+ */
+-+
+-+#if defined(CONFIG_FIPS)
+-+#undef MBEDTLS_MD4_C     /* omit md4_vector() */
+-+#undef MBEDTLS_MD5_C     /* omit md5_vector() hmac_md5_vector() hmac_md5() */
+-+#undef MBEDTLS_DES_C     /* omit des_encrypt() */
+-+#undef MBEDTLS_NIST_KW_C /* omit aes_wrap() aes_unwrap() */
+-+#define CRYPTO_MBEDTLS_CONFIG_FIPS
+-+#endif
+-+
+-+#if !defined(CONFIG_FIPS)
+-+#if defined(EAP_PWD) \
+-+ || defined(EAP_LEAP) || defined(EAP_LEAP_DYNAMIC) \
+-+ || defined(EAP_TTLS) || defined(EAP_TTLS_DYNAMIC) \
+-+ || defined(EAP_MSCHAPv2) || defined(EAP_MSCHAPv2_DYNAMIC) \
+-+ || defined(EAP_SERVER_MSCHAPV2)
+-+#ifndef MBEDTLS_MD4_C    /* (MD4 not in mbedtls 3.x) */
+-+#include "md4-internal.c"/* pull in hostap local implementation */
+-+#endif /* md4_vector() */
+-+#else
+-+#undef MBEDTLS_MD4_C     /* omit md4_vector() */
+-+#endif
+-+#endif
+-+
+-+#if !defined(CONFIG_NO_RC4) && !defined(CONFIG_NO_WPA)
+-+#ifndef MBEDTLS_ARC4_C   /* (RC4 not in mbedtls 3.x) */
+-+#include "rc4.c"         /* pull in hostap local implementation */
+-+#endif /* rc4_skip() */
+-+#else
+-+#undef MBEDTLS_ARC4_C    /* omit rc4_skip() */
+-+#endif
+-+
+-+#if defined(CONFIG_MACSEC)     \
+-+ || defined(CONFIG_NO_RADIUS)  \
+-+ || defined(CONFIG_IEEE80211R) \
+-+ || defined(EAP_SERVER_FAST)   \
+-+ || defined(EAP_SERVER_TEAP)   \
+-+ || !defined(CONFIG_NO_WPA)
+-+       /* aes_wrap() aes_unwrap() */
+-+#else
+-+#undef MBEDTLS_NIST_KW_C /* omit aes_wrap() aes_unwrap() */
+-+#endif
+-+
+-+#if !defined(CONFIG_SHA256)
+-+#undef MBEDTLS_SHA256_C
+-+#endif
+-+
+-+#if !defined(CONFIG_SHA384) && !defined(CONFIG_SHA512)
+-+#undef MBEDTLS_SHA512_C
+-+#endif
+-+
+-+#if defined(CONFIG_HMAC_SHA256_KDF)
+-+#define CRYPTO_MBEDTLS_HMAC_KDF_SHA256
+-+#endif
+-+#if defined(CONFIG_HMAC_SHA384_KDF)
+-+#define CRYPTO_MBEDTLS_HMAC_KDF_SHA384
+-+#endif
+-+#if defined(CONFIG_HMAC_SHA512_KDF)
+-+#define CRYPTO_MBEDTLS_HMAC_KDF_SHA512
+-+#endif
+-+
+-+#if defined(EAP_FAST) || defined(EAP_FAST_DYNAMIC) || defined(EAP_SERVER_FAST) \
+-+ || defined(EAP_TEAP) || defined(EAP_TEAP_DYNAMIC) || defined(EAP_SERVER_FAST)
+-+#define CRYPTO_MBEDTLS_SHA1_T_PRF
+-+#endif
+-+
+-+#if defined(CONFIG_DES)
+-+#define CRYPTO_MBEDTLS_DES_ENCRYPT
+-+#endif /* des_encrypt() */
+-+
+-+#if !defined(CONFIG_NO_PBKDF2)
+-+#define CRYPTO_MBEDTLS_PBKDF2_SHA1
+-+#endif /* pbkdf2_sha1() */
+-+
+-+#if defined(EAP_IKEV2) \
+-+ || defined(EAP_IKEV2_DYNAMIC) \
+-+ || defined(EAP_SERVER_IKEV2) /* CONFIG_EAP_IKEV2=y */
+-+#define CRYPTO_MBEDTLS_CRYPTO_CIPHER
+-+#endif /* crypto_cipher_*() */
+-+
+-+#if defined(EAP_PWD) || defined(EAP_SERVER_PWD) /* CONFIG_EAP_PWD=y */
+-+#define CRYPTO_MBEDTLS_CRYPTO_HASH
+-+#endif /* crypto_hash_*() */
+-+
+-+#if defined(EAP_PWD) || defined(EAP_SERVER_PWD) /* CONFIG_EAP_PWD=y */ \
+-+ || defined(CONFIG_SAE) /* CONFIG_SAE=y */
+-+#define CRYPTO_MBEDTLS_CRYPTO_BIGNUM
+-+#endif /* crypto_bignum_*() */
+-+
+-+#if defined(EAP_PWD)          /* CONFIG_EAP_PWD=y */    \
+-+ || defined(EAP_EKE)          /* CONFIG_EAP_EKE=y */    \
+-+ || defined(EAP_EKE_DYNAMIC)  /* CONFIG_EAP_EKE=y */    \
+-+ || defined(EAP_SERVER_EKE)   /* CONFIG_EAP_EKE=y */    \
+-+ || defined(EAP_IKEV2)        /* CONFIG_EAP_IKEV2y */   \
+-+ || defined(EAP_IKEV2_DYNAMIC)/* CONFIG_EAP_IKEV2=y */  \
+-+ || defined(EAP_SERVER_IKEV2) /* CONFIG_EAP_IKEV2=y */  \
+-+ || defined(CONFIG_SAE)       /* CONFIG_SAE=y */        \
+-+ || defined(CONFIG_WPS)       /* CONFIG_WPS=y */
+-+#define CRYPTO_MBEDTLS_CRYPTO_DH
+-+#if defined(CONFIG_WPS_NFC)
+-+#define CRYPTO_MBEDTLS_DH5_INIT_FIXED
+-+#endif /* dh5_init_fixed() */
+-+#endif /* crypto_dh_*() */
+-+
+-+#if !defined(CONFIG_NO_WPA) /* CONFIG_NO_WPA= */
+-+#define CRYPTO_MBEDTLS_CRYPTO_ECDH
+-+#endif /* crypto_ecdh_*() */
+-+
+-+#if defined(CONFIG_ECC)
+-+#define CRYPTO_MBEDTLS_CRYPTO_BIGNUM
+-+#define CRYPTO_MBEDTLS_CRYPTO_EC
+-+#endif /* crypto_ec_*() crypto_ec_key_*() */
+-+
+-+#if defined(CONFIG_DPP) /* CONFIG_DPP=y */
+-+#define CRYPTO_MBEDTLS_CRYPTO_EC_DPP /* extra for DPP */
+-+#define CRYPTO_MBEDTLS_CRYPTO_CSR
+-+#endif /* crypto_csr_*() */
+-+
+-+#if defined(CONFIG_DPP3) /* CONFIG_DPP3=y */
+-+#define CRYPTO_MBEDTLS_CRYPTO_HPKE
+-+#endif
+-+
+-+#if defined(CONFIG_DPP2) /* CONFIG_DPP2=y */
+-+#define CRYPTO_MBEDTLS_CRYPTO_PKCS7
+-+#endif /* crypto_pkcs7_*() */
+-+
+-+#if defined(EAP_SIM) || defined(EAP_SIM_DYNAMIC) || defined(EAP_SERVER_SIM) \
+-+ || defined(EAP_AKA) || defined(EAP_AKA_DYNAMIC) || defined(EAP_SERVER_AKA) \
+-+ || defined(CONFIG_AP) || defined(HOSTAPD)
+-+/* CONFIG_EAP_SIM=y CONFIG_EAP_AKA=y CONFIG_AP=y HOSTAPD */
+-+#if defined(CRYPTO_RSA_OAEP_SHA256)
+-+#define CRYPTO_MBEDTLS_CRYPTO_RSA
+-+#endif
+-+#endif /* crypto_rsa_*() */
+-+
+-+
+-+static int ctr_drbg_init_state;
+-+static mbedtls_ctr_drbg_context ctr_drbg;
+-+static mbedtls_entropy_context entropy;
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_BIGNUM
+-+#include <mbedtls/bignum.h>
+-+static mbedtls_mpi mpi_sw_A;
+-+#endif
+-+
+-+__attribute_cold__
+-+__attribute_noinline__
+-+static mbedtls_ctr_drbg_context * ctr_drbg_init(void)
+-+{
+-+	mbedtls_ctr_drbg_init(&ctr_drbg);
+-+	mbedtls_entropy_init(&entropy);
+-+	if (mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy,
+-+	                          NULL, 0)) {
+-+		wpa_printf(MSG_ERROR, "Init of random number generator failed");
+-+		/* XXX: abort? */
+-+	}
+-+	else
+-+		ctr_drbg_init_state = 1;
+-+
+-+	return &ctr_drbg;
+-+}
+-+
+-+__attribute_cold__
+-+void crypto_unload(void)
+-+{
+-+	if (ctr_drbg_init_state) {
+-+		mbedtls_ctr_drbg_free(&ctr_drbg);
+-+		mbedtls_entropy_free(&entropy);
+-+	  #ifdef CRYPTO_MBEDTLS_CRYPTO_BIGNUM
+-+		mbedtls_mpi_free(&mpi_sw_A);
+-+	  #endif
+-+		ctr_drbg_init_state = 0;
+-+	}
+-+}
+-+
+-+/* init ctr_drbg on first use
+-+ * crypto_global_init() and crypto_global_deinit() are not available here
+-+ * (available only when CONFIG_TLS=internal, which is not CONFIG_TLS=mbedtls) */
+-+mbedtls_ctr_drbg_context * crypto_mbedtls_ctr_drbg(void); /*(not in header)*/
+-+inline
+-+mbedtls_ctr_drbg_context * crypto_mbedtls_ctr_drbg(void)
+-+{
+-+	return ctr_drbg_init_state ? &ctr_drbg : ctr_drbg_init();
+-+}
+-+
+-+#ifdef CRYPTO_MBEDTLS_CONFIG_FIPS
+-+int crypto_get_random(void *buf, size_t len)
+-+{
+-+	return mbedtls_ctr_drbg_random(crypto_mbedtls_ctr_drbg(),buf,len) ? -1 : 0;
+-+}
+-+#endif
+-+
+-+
+-+#if 1
+-+
+-+/* tradeoff: slightly smaller code size here at cost of slight increase
+-+ * in instructions and function calls at runtime versus the expanded
+-+ * per-message-digest code that follows in #else (~0.5 kib .text larger) */
+-+
+-+__attribute_noinline__
+-+static int md_vector(size_t num_elem, const u8 *addr[], const size_t *len,
+-+                     u8 *mac, mbedtls_md_type_t md_type)
+-+{
+-+	mbedtls_md_context_t ctx;
+-+	mbedtls_md_init(&ctx);
+-+	if (mbedtls_md_setup(&ctx, mbedtls_md_info_from_type(md_type), 0) != 0){
+-+		mbedtls_md_free(&ctx);
+-+		return -1;
+-+	}
+-+	mbedtls_md_starts(&ctx);
+-+	for (size_t i = 0; i < num_elem; ++i)
+-+		mbedtls_md_update(&ctx, addr[i], len[i]);
+-+	mbedtls_md_finish(&ctx, mac);
+-+	mbedtls_md_free(&ctx);
+-+	return 0;
+-+}
+-+
+-+#ifdef MBEDTLS_SHA512_C
+-+int sha512_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac)
+-+{
+-+	return md_vector(num_elem, addr, len, mac, MBEDTLS_MD_SHA512);
+-+}
+-+
+-+int sha384_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac)
+-+{
+-+	return md_vector(num_elem, addr, len, mac, MBEDTLS_MD_SHA384);
+-+}
+-+#endif
+-+
+-+#ifdef MBEDTLS_SHA256_C
+-+int sha256_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac)
+-+{
+-+	return md_vector(num_elem, addr, len, mac, MBEDTLS_MD_SHA256);
+-+}
+-+#endif
+-+
+-+#ifdef MBEDTLS_SHA1_C
+-+int sha1_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac)
+-+{
+-+	return md_vector(num_elem, addr, len, mac, MBEDTLS_MD_SHA1);
+-+}
+-+#endif
+-+
+-+#ifdef MBEDTLS_MD5_C
+-+int md5_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac)
+-+{
+-+	return md_vector(num_elem, addr, len, mac, MBEDTLS_MD_MD5);
+-+}
+-+#endif
+-+
+-+#ifdef MBEDTLS_MD4_C
+-+#include <mbedtls/md4.h>
+-+int md4_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac)
+-+{
+-+	return md_vector(num_elem, addr, len, mac, MBEDTLS_MD_MD4);
+-+}
+-+#endif
+-+
+-+#else  /* expanded per-message-digest functions */
+-+
+-+#ifdef MBEDTLS_SHA512_C
+-+#include <mbedtls/sha512.h>
+-+__attribute_noinline__
+-+static int sha384_512_vector(size_t num_elem, const u8 *addr[],
+-+                             const size_t *len, u8 *mac, int is384)
+-+{
+-+	struct mbedtls_sha512_context ctx;
+-+	mbedtls_sha512_init(&ctx);
+-+  #if MBEDTLS_VERSION_MAJOR >= 3
+-+	mbedtls_sha512_starts(&ctx, is384);
+-+	for (size_t i = 0; i < num_elem; ++i)
+-+		mbedtls_sha512_update(&ctx, addr[i], len[i]);
+-+	mbedtls_sha512_finish(&ctx, mac);
+-+  #else
+-+	mbedtls_sha512_starts_ret(&ctx, is384);
+-+	for (size_t i = 0; i < num_elem; ++i)
+-+		mbedtls_sha512_update_ret(&ctx, addr[i], len[i]);
+-+	mbedtls_sha512_finish_ret(&ctx, mac);
+-+  #endif
+-+	mbedtls_sha512_free(&ctx);
+-+	return 0;
+-+}
+-+
+-+int sha512_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac)
+-+{
+-+	return sha384_512_vector(num_elem, addr, len, mac, 0);
+-+}
+-+
+-+int sha384_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac)
+-+{
+-+	return sha384_512_vector(num_elem, addr, len, mac, 1);
+-+}
+-+#endif
+-+
+-+#ifdef MBEDTLS_SHA256_C
+-+#include <mbedtls/sha256.h>
+-+int sha256_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac)
+-+{
+-+	struct mbedtls_sha256_context ctx;
+-+	mbedtls_sha256_init(&ctx);
+-+  #if MBEDTLS_VERSION_MAJOR >= 3
+-+	mbedtls_sha256_starts(&ctx, 0);
+-+	for (size_t i = 0; i < num_elem; ++i)
+-+		mbedtls_sha256_update(&ctx, addr[i], len[i]);
+-+	mbedtls_sha256_finish(&ctx, mac);
+-+  #else
+-+	mbedtls_sha256_starts_ret(&ctx, 0);
+-+	for (size_t i = 0; i < num_elem; ++i)
+-+		mbedtls_sha256_update_ret(&ctx, addr[i], len[i]);
+-+	mbedtls_sha256_finish_ret(&ctx, mac);
+-+  #endif
+-+	mbedtls_sha256_free(&ctx);
+-+	return 0;
+-+}
+-+#endif
+-+
+-+#ifdef MBEDTLS_SHA1_C
+-+#include <mbedtls/sha1.h>
+-+int sha1_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac)
+-+{
+-+	struct mbedtls_sha1_context ctx;
+-+	mbedtls_sha1_init(&ctx);
+-+  #if MBEDTLS_VERSION_MAJOR >= 3
+-+	mbedtls_sha1_starts(&ctx);
+-+	for (size_t i = 0; i < num_elem; ++i)
+-+		mbedtls_sha1_update(&ctx, addr[i], len[i]);
+-+	mbedtls_sha1_finish(&ctx, mac);
+-+  #else
+-+	mbedtls_sha1_starts_ret(&ctx);
+-+	for (size_t i = 0; i < num_elem; ++i)
+-+		mbedtls_sha1_update_ret(&ctx, addr[i], len[i]);
+-+	mbedtls_sha1_finish_ret(&ctx, mac);
+-+  #endif
+-+	mbedtls_sha1_free(&ctx);
+-+	return 0;
+-+}
+-+#endif
+-+
+-+#ifdef MBEDTLS_MD5_C
+-+#include <mbedtls/md5.h>
+-+int md5_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac)
+-+{
+-+	struct mbedtls_md5_context ctx;
+-+	mbedtls_md5_init(&ctx);
+-+  #if MBEDTLS_VERSION_MAJOR >= 3
+-+	mbedtls_md5_starts(&ctx);
+-+	for (size_t i = 0; i < num_elem; ++i)
+-+		mbedtls_md5_update(&ctx, addr[i], len[i]);
+-+	mbedtls_md5_finish(&ctx, mac);
+-+  #else
+-+	mbedtls_md5_starts_ret(&ctx);
+-+	for (size_t i = 0; i < num_elem; ++i)
+-+		mbedtls_md5_update_ret(&ctx, addr[i], len[i]);
+-+	mbedtls_md5_finish_ret(&ctx, mac);
+-+  #endif
+-+	mbedtls_md5_free(&ctx);
+-+	return 0;
+-+}
+-+#endif
+-+
+-+#ifdef MBEDTLS_MD4_C
+-+#include <mbedtls/md4.h>
+-+int md4_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac)
+-+{
+-+	struct mbedtls_md4_context ctx;
+-+	mbedtls_md4_init(&ctx);
+-+	mbedtls_md4_starts_ret(&ctx);
+-+	for (size_t i = 0; i < num_elem; ++i)
+-+		mbedtls_md4_update_ret(&ctx, addr[i], len[i]);
+-+	mbedtls_md4_finish_ret(&ctx, mac);
+-+	mbedtls_md4_free(&ctx);
+-+	return 0;
+-+}
+-+#endif
+-+
+-+#endif /* expanded per-message-digest functions */
+-+
+-+
+-+__attribute_noinline__
+-+static int hmac_vector(const u8 *key, size_t key_len, size_t num_elem,
+-+                       const u8 *addr[], const size_t *len, u8 *mac,
+-+                       mbedtls_md_type_t md_type)
+-+{
+-+	mbedtls_md_context_t ctx;
+-+	mbedtls_md_init(&ctx);
+-+	if (mbedtls_md_setup(&ctx, mbedtls_md_info_from_type(md_type), 1) != 0){
+-+		mbedtls_md_free(&ctx);
+-+		return -1;
+-+	}
+-+	mbedtls_md_hmac_starts(&ctx, key, key_len);
+-+	for (size_t i = 0; i < num_elem; ++i)
+-+		mbedtls_md_hmac_update(&ctx, addr[i], len[i]);
+-+	mbedtls_md_hmac_finish(&ctx, mac);
+-+	mbedtls_md_free(&ctx);
+-+	return 0;
+-+}
+-+
+-+#ifdef MBEDTLS_SHA512_C
+-+int hmac_sha512_vector(const u8 *key, size_t key_len, size_t num_elem,
+-+                       const u8 *addr[], const size_t *len, u8 *mac)
+-+{
+-+	return hmac_vector(key, key_len, num_elem, addr, len, mac,
+-+			   MBEDTLS_MD_SHA512);
+-+}
+-+
+-+int hmac_sha512(const u8 *key, size_t key_len, const u8 *data, size_t data_len,
+-+                u8 *mac)
+-+{
+-+	return hmac_vector(key, key_len, 1, &data, &data_len, mac,
+-+			   MBEDTLS_MD_SHA512);
+-+}
+-+
+-+int hmac_sha384_vector(const u8 *key, size_t key_len, size_t num_elem,
+-+                       const u8 *addr[], const size_t *len, u8 *mac)
+-+{
+-+	return hmac_vector(key, key_len, num_elem, addr, len, mac,
+-+			   MBEDTLS_MD_SHA384);
+-+}
+-+
+-+int hmac_sha384(const u8 *key, size_t key_len, const u8 *data, size_t data_len,
+-+                u8 *mac)
+-+{
+-+	return hmac_vector(key, key_len, 1, &data, &data_len, mac,
+-+			   MBEDTLS_MD_SHA384);
+-+}
+-+#endif
+-+
+-+#ifdef MBEDTLS_SHA256_C
+-+int hmac_sha256_vector(const u8 *key, size_t key_len, size_t num_elem,
+-+                       const u8 *addr[], const size_t *len, u8 *mac)
+-+{
+-+	return hmac_vector(key, key_len, num_elem, addr, len, mac,
+-+			   MBEDTLS_MD_SHA256);
+-+}
+-+
+-+int hmac_sha256(const u8 *key, size_t key_len, const u8 *data, size_t data_len,
+-+                u8 *mac)
+-+{
+-+	return hmac_vector(key, key_len, 1, &data, &data_len, mac,
+-+			   MBEDTLS_MD_SHA256);
+-+}
+-+#endif
+-+
+-+#ifdef MBEDTLS_SHA1_C
+-+int hmac_sha1_vector(const u8 *key, size_t key_len, size_t num_elem,
+-+                     const u8 *addr[], const size_t *len, u8 *mac)
+-+{
+-+	return hmac_vector(key, key_len, num_elem, addr, len, mac,
+-+			   MBEDTLS_MD_SHA1);
+-+}
+-+
+-+int hmac_sha1(const u8 *key, size_t key_len, const u8 *data, size_t data_len,
+-+              u8 *mac)
+-+{
+-+	return hmac_vector(key, key_len, 1, &data, &data_len, mac,
+-+			   MBEDTLS_MD_SHA1);
+-+}
+-+#endif
+-+
+-+#ifdef MBEDTLS_MD5_C
+-+int hmac_md5_vector(const u8 *key, size_t key_len, size_t num_elem,
+-+                    const u8 *addr[], const size_t *len, u8 *mac)
+-+{
+-+	return hmac_vector(key, key_len, num_elem, addr, len, mac,
+-+			   MBEDTLS_MD_MD5);
+-+}
+-+
+-+int hmac_md5(const u8 *key, size_t key_len, const u8 *data, size_t data_len,
+-+             u8 *mac)
+-+{
+-+	return hmac_vector(key, key_len, 1, &data, &data_len, mac,
+-+			   MBEDTLS_MD_MD5);
+-+}
+-+#endif
+-+
+-+
+-+#if defined(MBEDTLS_SHA256_C) || defined(MBEDTLS_SHA512_C)
+-+
+-+#if defined(CRYPTO_MBEDTLS_HMAC_KDF_SHA256) \
+-+ || defined(CRYPTO_MBEDTLS_HMAC_KDF_SHA384) \
+-+ || defined(CRYPTO_MBEDTLS_HMAC_KDF_SHA512)
+-+
+-+#include <mbedtls/hkdf.h>
+-+
+-+/* sha256-kdf.c sha384-kdf.c sha512-kdf.c */
+-+
+-+/* HMAC-SHA256 KDF (RFC 5295) and HKDF-Expand(SHA256) (RFC 5869) */
+-+/* HMAC-SHA384 KDF (RFC 5295) and HKDF-Expand(SHA384) (RFC 5869) */
+-+/* HMAC-SHA512 KDF (RFC 5295) and HKDF-Expand(SHA512) (RFC 5869) */
+-+__attribute_noinline__
+-+static int hmac_kdf_expand(const u8 *prk, size_t prk_len,
+-+                           const char *label, const u8 *info, size_t info_len,
+-+                           u8 *okm, size_t okm_len, mbedtls_md_type_t md_type)
+-+{
+-+	const mbedtls_md_info_t *md_info = mbedtls_md_info_from_type(md_type);
+-+  #ifdef MBEDTLS_HKDF_C
+-+	if (label == NULL)  /* RFC 5869 HKDF-Expand when (label == NULL) */
+-+		return mbedtls_hkdf_expand(md_info, prk, prk_len, info,
+-+		                           info_len, okm, okm_len) ? -1 : 0;
+-+  #endif
+-+
+-+	const size_t mac_len = mbedtls_md_get_size(md_info);
+-+	/* okm_len must not exceed 255 times hash len (RFC 5869 Section 2.3) */
+-+	if (okm_len > ((mac_len << 8) - mac_len))
+-+		return -1;
+-+
+-+	mbedtls_md_context_t ctx;
+-+	mbedtls_md_init(&ctx);
+-+	if (mbedtls_md_setup(&ctx, md_info, 1) != 0) {
+-+		mbedtls_md_free(&ctx);
+-+		return -1;
+-+	}
+-+	mbedtls_md_hmac_starts(&ctx, prk, prk_len);
+-+
+-+	u8 iter = 1;
+-+	const u8 *addr[4] = { okm, (const u8 *)label, info, &iter };
+-+	size_t len[4] = { 0, label ? os_strlen(label)+1 : 0, info_len, 1 };
+-+
+-+	for (; okm_len >= mac_len; okm_len -= mac_len, ++iter) {
+-+		for (size_t i = 0; i < ARRAY_SIZE(addr); ++i)
+-+			mbedtls_md_hmac_update(&ctx, addr[i], len[i]);
+-+		mbedtls_md_hmac_finish(&ctx, okm);
+-+		mbedtls_md_hmac_reset(&ctx);
+-+		addr[0] = okm;
+-+		okm += mac_len;
+-+		len[0] = mac_len; /*(include digest in subsequent rounds)*/
+-+	}
+-+
+-+	if (okm_len) {
+-+		u8 hash[MBEDTLS_MD_MAX_SIZE];
+-+		for (size_t i = 0; i < ARRAY_SIZE(addr); ++i)
+-+			mbedtls_md_hmac_update(&ctx, addr[i], len[i]);
+-+		mbedtls_md_hmac_finish(&ctx, hash);
+-+		os_memcpy(okm, hash, okm_len);
+-+		forced_memzero(hash, mac_len);
+-+	}
+-+
+-+	mbedtls_md_free(&ctx);
+-+	return 0;
+-+}
+-+
+-+#ifdef MBEDTLS_SHA512_C
+-+#ifdef CRYPTO_MBEDTLS_HMAC_KDF_SHA512
+-+int hmac_sha512_kdf(const u8 *secret, size_t secret_len,
+-+		    const char *label, const u8 *seed, size_t seed_len,
+-+		    u8 *out, size_t outlen)
+-+{
+-+	return hmac_kdf_expand(secret, secret_len, label, seed, seed_len,
+-+	                       out, outlen, MBEDTLS_MD_SHA512);
+-+}
+-+#endif
+-+
+-+#ifdef CRYPTO_MBEDTLS_HMAC_KDF_SHA384
+-+int hmac_sha384_kdf(const u8 *secret, size_t secret_len,
+-+		    const char *label, const u8 *seed, size_t seed_len,
+-+		    u8 *out, size_t outlen)
+-+{
+-+	return hmac_kdf_expand(secret, secret_len, label, seed, seed_len,
+-+	                       out, outlen, MBEDTLS_MD_SHA384);
+-+}
+-+#endif
+-+#endif
+-+
+-+#ifdef MBEDTLS_SHA256_C
+-+#ifdef CRYPTO_MBEDTLS_HMAC_KDF_SHA256
+-+int hmac_sha256_kdf(const u8 *secret, size_t secret_len,
+-+		    const char *label, const u8 *seed, size_t seed_len,
+-+		    u8 *out, size_t outlen)
+-+{
+-+	return hmac_kdf_expand(secret, secret_len, label, seed, seed_len,
+-+	                       out, outlen, MBEDTLS_MD_SHA256);
+-+}
+-+#endif
+-+#endif
+-+
+-+#endif /* CRYPTO_MBEDTLS_HMAC_KDF_* */
+-+
+-+
+-+/* sha256-prf.c sha384-prf.c sha512-prf.c */
+-+
+-+/* hmac_prf_bits - IEEE Std 802.11ac-2013, 11.6.1.7.2 Key derivation function */
+-+__attribute_noinline__
+-+static int hmac_prf_bits(const u8 *key, size_t key_len, const char *label,
+-+                         const u8 *data, size_t data_len, u8 *buf,
+-+                         size_t buf_len_bits, mbedtls_md_type_t md_type)
+-+{
+-+	mbedtls_md_context_t ctx;
+-+	mbedtls_md_init(&ctx);
+-+	const mbedtls_md_info_t *md_info = mbedtls_md_info_from_type(md_type);
+-+	if (mbedtls_md_setup(&ctx, md_info, 1) != 0) {
+-+		mbedtls_md_free(&ctx);
+-+		return -1;
+-+	}
+-+	mbedtls_md_hmac_starts(&ctx, key, key_len);
+-+
+-+	u16 ctr, n_le = host_to_le16(buf_len_bits);
+-+	const u8 * const addr[] = { (u8 *)&ctr,(u8 *)label,data,(u8 *)&n_le };
+-+	const size_t len[] =      { 2, os_strlen(label), data_len, 2 };
+-+	const size_t mac_len = mbedtls_md_get_size(md_info);
+-+	size_t buf_len = (buf_len_bits + 7) / 8;
+-+	for (ctr = 1; buf_len >= mac_len; buf_len -= mac_len, ++ctr) {
+-+	  #if __BYTE_ORDER == __BIG_ENDIAN
+-+		ctr = host_to_le16(ctr);
+-+	  #endif
+-+		for (size_t i = 0; i < ARRAY_SIZE(addr); ++i)
+-+			mbedtls_md_hmac_update(&ctx, addr[i], len[i]);
+-+		mbedtls_md_hmac_finish(&ctx, buf);
+-+		mbedtls_md_hmac_reset(&ctx);
+-+		buf += mac_len;
+-+	  #if __BYTE_ORDER == __BIG_ENDIAN
+-+		ctr = le_to_host16(ctr);
+-+	  #endif
+-+	}
+-+
+-+	if (buf_len) {
+-+		u8 hash[MBEDTLS_MD_MAX_SIZE];
+-+	  #if __BYTE_ORDER == __BIG_ENDIAN
+-+		ctr = host_to_le16(ctr);
+-+	  #endif
+-+		for (size_t i = 0; i < ARRAY_SIZE(addr); ++i)
+-+			mbedtls_md_hmac_update(&ctx, addr[i], len[i]);
+-+		mbedtls_md_hmac_finish(&ctx, hash);
+-+		os_memcpy(buf, hash, buf_len);
+-+		buf += buf_len;
+-+		forced_memzero(hash, mac_len);
+-+	}
+-+
+-+	/* Mask out unused bits in last octet if it does not use all the bits */
+-+	if ((buf_len_bits &= 0x7))
+-+		buf[-1] &= (u8)(0xff << (8 - buf_len_bits));
+-+
+-+	mbedtls_md_free(&ctx);
+-+	return 0;
+-+}
+-+
+-+#ifdef MBEDTLS_SHA512_C
+-+int sha512_prf(const u8 *key, size_t key_len, const char *label,
+-+               const u8 *data, size_t data_len, u8 *buf, size_t buf_len)
+-+{
+-+	return hmac_prf_bits(key, key_len, label, data, data_len, buf,
+-+	                     buf_len * 8, MBEDTLS_MD_SHA512);
+-+}
+-+
+-+int sha384_prf(const u8 *key, size_t key_len, const char *label,
+-+               const u8 *data, size_t data_len, u8 *buf, size_t buf_len)
+-+{
+-+	return hmac_prf_bits(key, key_len, label, data, data_len, buf,
+-+	                     buf_len * 8, MBEDTLS_MD_SHA384);
+-+}
+-+#endif
+-+
+-+#ifdef MBEDTLS_SHA256_C
+-+int sha256_prf(const u8 *key, size_t key_len, const char *label,
+-+               const u8 *data, size_t data_len, u8 *buf, size_t buf_len)
+-+{
+-+	return hmac_prf_bits(key, key_len, label, data, data_len, buf,
+-+	                     buf_len * 8, MBEDTLS_MD_SHA256);
+-+}
+-+
+-+int sha256_prf_bits(const u8 *key, size_t key_len, const char *label,
+-+                    const u8 *data, size_t data_len, u8 *buf,
+-+                    size_t buf_len_bits)
+-+{
+-+	return hmac_prf_bits(key, key_len, label, data, data_len, buf,
+-+	                     buf_len_bits, MBEDTLS_MD_SHA256);
+-+}
+-+#endif
+-+
+-+#endif /* MBEDTLS_SHA256_C || MBEDTLS_SHA512_C */
+-+
+-+
+-+#ifdef MBEDTLS_SHA1_C
+-+
+-+/* sha1-prf.c */
+-+
+-+/* sha1_prf - SHA1-based Pseudo-Random Function (PRF) (IEEE 802.11i, 8.5.1.1) */
+-+
+-+int sha1_prf(const u8 *key, size_t key_len, const char *label,
+-+	     const u8 *data, size_t data_len, u8 *buf, size_t buf_len)
+-+{
+-+	/*(note: algorithm differs from hmac_prf_bits() */
+-+	/*(note: smaller code size instead of expanding hmac_sha1_vector()
+-+	 * as is done in hmac_prf_bits(); not expecting large num of loops) */
+-+	u8 counter = 0;
+-+	const u8 *addr[] = { (u8 *)label, data, &counter };
+-+	const size_t len[] = { os_strlen(label)+1, data_len, 1 };
+-+
+-+	for (; buf_len >= SHA1_MAC_LEN; buf_len -= SHA1_MAC_LEN, ++counter) {
+-+		if (hmac_sha1_vector(key, key_len, 3, addr, len, buf))
+-+			return -1;
+-+		buf += SHA1_MAC_LEN;
+-+	}
+-+
+-+	if (buf_len) {
+-+		u8 hash[SHA1_MAC_LEN];
+-+		if (hmac_sha1_vector(key, key_len, 3, addr, len, hash))
+-+			return -1;
+-+		os_memcpy(buf, hash, buf_len);
+-+		forced_memzero(hash, sizeof(hash));
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+#ifdef CRYPTO_MBEDTLS_SHA1_T_PRF
+-+
+-+/* sha1-tprf.c */
+-+
+-+/* sha1_t_prf - EAP-FAST Pseudo-Random Function (T-PRF) (RFC 4851,Section 5.5)*/
+-+
+-+int sha1_t_prf(const u8 *key, size_t key_len, const char *label,
+-+	       const u8 *seed, size_t seed_len, u8 *buf, size_t buf_len)
+-+{
+-+	/*(note: algorithm differs from hmac_prf_bits() and hmac_kdf() above)*/
+-+	/*(note: smaller code size instead of expanding hmac_sha1_vector()
+-+	 * as is done in hmac_prf_bits(); not expecting large num of loops) */
+-+	u8 ctr;
+-+	u16 olen = host_to_be16(buf_len);
+-+	const u8 *addr[] = { buf, (u8 *)label, seed, (u8 *)&olen, &ctr };
+-+	size_t len[] = { 0, os_strlen(label)+1, seed_len, 2, 1 };
+-+
+-+	for (ctr = 1; buf_len >= SHA1_MAC_LEN; buf_len -= SHA1_MAC_LEN, ++ctr) {
+-+		if (hmac_sha1_vector(key, key_len, 5, addr, len, buf))
+-+			return -1;
+-+		addr[0] = buf;
+-+		buf += SHA1_MAC_LEN;
+-+		len[0] = SHA1_MAC_LEN; /*(include digest in subsequent rounds)*/
+-+	}
+-+
+-+	if (buf_len) {
+-+		u8 hash[SHA1_MAC_LEN];
+-+		if (hmac_sha1_vector(key, key_len, 5, addr, len, hash))
+-+			return -1;
+-+		os_memcpy(buf, hash, buf_len);
+-+		forced_memzero(hash, sizeof(hash));
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+#endif /* CRYPTO_MBEDTLS_SHA1_T_PRF */
+-+
+-+#endif /* MBEDTLS_SHA1_C */
+-+
+-+
+-+#ifdef CRYPTO_MBEDTLS_DES_ENCRYPT
+-+#ifdef MBEDTLS_DES_C
+-+#include <mbedtls/des.h>
+-+int des_encrypt(const u8 *clear, const u8 *key, u8 *cypher)
+-+{
+-+	u8 pkey[8], next, tmp;
+-+	int i;
+-+
+-+	/* Add parity bits to the key */
+-+	next = 0;
+-+	for (i = 0; i < 7; i++) {
+-+		tmp = key[i];
+-+		pkey[i] = (tmp >> i) | next | 1;
+-+		next = tmp << (7 - i);
+-+	}
+-+	pkey[i] = next | 1;
+-+
+-+	mbedtls_des_context des;
+-+	mbedtls_des_init(&des);
+-+	int ret = mbedtls_des_setkey_enc(&des, pkey)
+-+	       || mbedtls_des_crypt_ecb(&des, clear, cypher) ? -1 : 0;
+-+	mbedtls_des_free(&des);
+-+	return ret;
+-+}
+-+#else
+-+#include "des-internal.c"/* pull in hostap local implementation */
+-+#endif
+-+#endif
+-+
+-+
+-+#ifdef CRYPTO_MBEDTLS_PBKDF2_SHA1
+-+/* sha1-pbkdf2.c */
+-+#include <mbedtls/pkcs5.h>
+-+int pbkdf2_sha1(const char *passphrase, const u8 *ssid, size_t ssid_len,
+-+                int iterations, u8 *buf, size_t buflen)
+-+{
+-+  #if MBEDTLS_VERSION_NUMBER >= 0x03020200 /* mbedtls 3.2.2 */
+-+	return mbedtls_pkcs5_pbkdf2_hmac_ext(MBEDTLS_MD_SHA1,
+-+			(const u8 *)passphrase, os_strlen(passphrase),
+-+			ssid, ssid_len, iterations, 32, buf) ? -1 : 0;
+-+  #else
+-+	const mbedtls_md_info_t *md_info;
+-+	md_info = mbedtls_md_info_from_type(MBEDTLS_MD_SHA1);
+-+	if (md_info == NULL)
+-+		return -1;
+-+	mbedtls_md_context_t ctx;
+-+	mbedtls_md_init(&ctx);
+-+	int ret = mbedtls_md_setup(&ctx, md_info, 1)
+-+	       || mbedtls_pkcs5_pbkdf2_hmac(&ctx,
+-+			(const u8 *)passphrase, os_strlen(passphrase),
+-+			ssid, ssid_len, iterations, 32, buf) ? -1 : 0;
+-+	mbedtls_md_free(&ctx);
+-+	return ret;
+-+  #endif
+-+}
+-+#endif
+-+
+-+
+-+/*#include "aes.h"*/ /* prototypes also included in "crypto.h" */
+-+
+-+static void *aes_crypt_init_mode(const u8 *key, size_t len, int mode)
+-+{
+-+	mbedtls_aes_context *aes = os_malloc(sizeof(*aes));
+-+	if (!aes)
+-+		return NULL;
+-+
+-+	mbedtls_aes_init(aes);
+-+	if ((mode == MBEDTLS_AES_ENCRYPT
+-+	    ? mbedtls_aes_setkey_enc(aes, key, len * 8)
+-+	    : mbedtls_aes_setkey_dec(aes, key, len * 8)) == 0)
+-+		return aes;
+-+
+-+	mbedtls_aes_free(aes);
+-+	os_free(aes);
+-+	return NULL;
+-+}
+-+
+-+void *aes_encrypt_init(const u8 *key, size_t len)
+-+{
+-+	return aes_crypt_init_mode(key, len, MBEDTLS_AES_ENCRYPT);
+-+}
+-+
+-+int aes_encrypt(void *ctx, const u8 *plain, u8 *crypt)
+-+{
+-+	return mbedtls_aes_crypt_ecb(ctx, MBEDTLS_AES_ENCRYPT, plain, crypt);
+-+}
+-+
+-+void aes_encrypt_deinit(void *ctx)
+-+{
+-+	mbedtls_aes_free(ctx);
+-+	os_free(ctx);
+-+}
+-+
+-+void *aes_decrypt_init(const u8 *key, size_t len)
+-+{
+-+	return aes_crypt_init_mode(key, len, MBEDTLS_AES_DECRYPT);
+-+}
+-+
+-+int aes_decrypt(void *ctx, const u8 *crypt, u8 *plain)
+-+{
+-+	return mbedtls_aes_crypt_ecb(ctx, MBEDTLS_AES_DECRYPT, crypt, plain);
+-+}
+-+
+-+void aes_decrypt_deinit(void *ctx)
+-+{
+-+	mbedtls_aes_free(ctx);
+-+	os_free(ctx);
+-+}
+-+
+-+
+-+#include "aes_wrap.h"
+-+
+-+
+-+#ifdef MBEDTLS_NIST_KW_C
+-+
+-+#include <mbedtls/nist_kw.h>
+-+
+-+/* aes-wrap.c */
+-+int aes_wrap(const u8 *kek, size_t kek_len, int n, const u8 *plain, u8 *cipher)
+-+{
+-+	mbedtls_nist_kw_context ctx;
+-+	mbedtls_nist_kw_init(&ctx);
+-+	size_t olen;
+-+	int ret = mbedtls_nist_kw_setkey(&ctx, MBEDTLS_CIPHER_ID_AES,
+-+	                                 kek, kek_len*8, 1)
+-+	       || mbedtls_nist_kw_wrap(&ctx, MBEDTLS_KW_MODE_KW, plain, n*8,
+-+	                               cipher, &olen, (n+1)*8) ? -1 : 0;
+-+	mbedtls_nist_kw_free(&ctx);
+-+	return ret;
+-+}
+-+
+-+/* aes-unwrap.c */
+-+int aes_unwrap(const u8 *kek, size_t kek_len, int n, const u8 *cipher, u8 *plain)
+-+{
+-+	mbedtls_nist_kw_context ctx;
+-+	mbedtls_nist_kw_init(&ctx);
+-+	size_t olen;
+-+	int ret = mbedtls_nist_kw_setkey(&ctx, MBEDTLS_CIPHER_ID_AES,
+-+	                                 kek, kek_len*8, 0)
+-+	       || mbedtls_nist_kw_unwrap(&ctx, MBEDTLS_KW_MODE_KW, cipher,
+-+	                                 (n+1)*8, plain, &olen, n*8) ? -1 : 0;
+-+	mbedtls_nist_kw_free(&ctx);
+-+	return ret;
+-+}
+-+
+-+#else
+-+
+-+#ifndef CRYPTO_MBEDTLS_CONFIG_FIPS
+-+#include "aes-wrap.c"    /* pull in hostap local implementation */
+-+#include "aes-unwrap.c"  /* pull in hostap local implementation */
+-+#endif
+-+
+-+#endif /* MBEDTLS_NIST_KW_C */
+-+
+-+
+-+#ifdef MBEDTLS_CMAC_C
+-+
+-+/* aes-omac1.c */
+-+
+-+#include <mbedtls/cmac.h>
+-+
+-+int omac1_aes_vector(
+-+    const u8 *key, size_t key_len, size_t num_elem, const u8 *addr[],
+-+    const size_t *len, u8 *mac)
+-+{
+-+	mbedtls_cipher_type_t cipher_type;
+-+	switch (key_len) {
+-+	case 16: cipher_type = MBEDTLS_CIPHER_AES_128_ECB; break;
+-+	case 24: cipher_type = MBEDTLS_CIPHER_AES_192_ECB; break;
+-+	case 32: cipher_type = MBEDTLS_CIPHER_AES_256_ECB; break;
+-+	default: return -1;
+-+	}
+-+	const mbedtls_cipher_info_t *cipher_info;
+-+	cipher_info = mbedtls_cipher_info_from_type(cipher_type);
+-+	if (cipher_info == NULL)
+-+		return -1;
+-+
+-+	mbedtls_cipher_context_t ctx;
+-+	mbedtls_cipher_init(&ctx);
+-+	int ret = -1;
+-+	if (mbedtls_cipher_setup(&ctx, cipher_info) == 0
+-+	    && mbedtls_cipher_cmac_starts(&ctx, key, key_len*8) == 0) {
+-+		ret = 0;
+-+		for (size_t i = 0; i < num_elem && ret == 0; ++i)
+-+			ret = mbedtls_cipher_cmac_update(&ctx, addr[i], len[i]);
+-+	}
+-+	if (ret == 0)
+-+		ret = mbedtls_cipher_cmac_finish(&ctx, mac);
+-+	mbedtls_cipher_free(&ctx);
+-+	return ret ? -1 : 0;
+-+}
+-+
+-+int omac1_aes_128_vector(const u8 *key, size_t num_elem,
+-+			 const u8 *addr[], const size_t *len,
+-+			 u8 *mac)
+-+{
+-+	return omac1_aes_vector(key, 16, num_elem, addr, len, mac);
+-+}
+-+
+-+int omac1_aes_128(const u8 *key, const u8 *data, size_t data_len, u8 *mac)
+-+{
+-+	return omac1_aes_vector(key, 16, 1, &data, &data_len, mac);
+-+}
+-+
+-+int omac1_aes_256(const u8 *key, const u8 *data, size_t data_len, u8 *mac)
+-+{
+-+	return omac1_aes_vector(key, 32, 1, &data, &data_len, mac);
+-+}
+-+
+-+#else
+-+
+-+#include "aes-omac1.c"  /* pull in hostap local implementation */
+-+
+-+#ifndef MBEDTLS_AES_BLOCK_SIZE
+-+#define MBEDTLS_AES_BLOCK_SIZE 16
+-+#endif
+-+
+-+#endif /* MBEDTLS_CMAC_C */
+-+
+-+
+-+/* These interfaces can be inefficient when used in loops, as the overhead of
+-+ * initialization each call is large for each block input (e.g. 16 bytes) */
+-+
+-+
+-+/* aes-encblock.c */
+-+int aes_128_encrypt_block(const u8 *key, const u8 *in, u8 *out)
+-+{
+-+	mbedtls_aes_context aes;
+-+	mbedtls_aes_init(&aes);
+-+	int ret = mbedtls_aes_setkey_enc(&aes, key, 128)
+-+	       || mbedtls_aes_crypt_ecb(&aes, MBEDTLS_AES_ENCRYPT, in, out)
+-+	  ? -1
+-+	  : 0;
+-+	mbedtls_aes_free(&aes);
+-+	return ret;
+-+}
+-+
+-+
+-+/* aes-ctr.c */
+-+int aes_ctr_encrypt(const u8 *key, size_t key_len, const u8 *nonce,
+-+		    u8 *data, size_t data_len)
+-+{
+-+	unsigned char counter[MBEDTLS_AES_BLOCK_SIZE];
+-+	unsigned char stream_block[MBEDTLS_AES_BLOCK_SIZE];
+-+	os_memcpy(counter, nonce, MBEDTLS_AES_BLOCK_SIZE);/*(must be writable)*/
+-+
+-+	mbedtls_aes_context ctx;
+-+	mbedtls_aes_init(&ctx);
+-+	size_t nc_off = 0;
+-+	int ret = mbedtls_aes_setkey_enc(&ctx, key, key_len*8)
+-+	       || mbedtls_aes_crypt_ctr(&ctx, data_len, &nc_off,
+-+	                                counter, stream_block,
+-+	                                data, data) ? -1 : 0;
+-+	forced_memzero(stream_block, sizeof(stream_block));
+-+	mbedtls_aes_free(&ctx);
+-+	return ret;
+-+}
+-+
+-+int aes_128_ctr_encrypt(const u8 *key, const u8 *nonce,
+-+			u8 *data, size_t data_len)
+-+{
+-+	return aes_ctr_encrypt(key, 16, nonce, data, data_len);
+-+}
+-+
+-+
+-+/* aes-cbc.c */
+-+static int aes_128_cbc_oper(const u8 *key, const u8 *iv,
+-+                            u8 *data, size_t data_len, int mode)
+-+{
+-+	unsigned char ivec[MBEDTLS_AES_BLOCK_SIZE];
+-+	os_memcpy(ivec, iv, MBEDTLS_AES_BLOCK_SIZE); /*(must be writable)*/
+-+
+-+	mbedtls_aes_context ctx;
+-+	mbedtls_aes_init(&ctx);
+-+	int ret = (mode == MBEDTLS_AES_ENCRYPT
+-+	           ? mbedtls_aes_setkey_enc(&ctx, key, 128)
+-+	           : mbedtls_aes_setkey_dec(&ctx, key, 128))
+-+	       || mbedtls_aes_crypt_cbc(&ctx, mode, data_len, ivec, data, data);
+-+	mbedtls_aes_free(&ctx);
+-+	return ret ? -1 : 0;
+-+}
+-+
+-+int aes_128_cbc_encrypt(const u8 *key, const u8 *iv, u8 *data, size_t data_len)
+-+{
+-+	return aes_128_cbc_oper(key, iv, data, data_len, MBEDTLS_AES_ENCRYPT);
+-+}
+-+
+-+int aes_128_cbc_decrypt(const u8 *key, const u8 *iv, u8 *data, size_t data_len)
+-+{
+-+	return aes_128_cbc_oper(key, iv, data, data_len, MBEDTLS_AES_DECRYPT);
+-+}
+-+
+-+
+-+/*
+-+ * Much of the following is documented in crypto.h as for CONFIG_TLS=internal
+-+ * but such comments are not accurate:
+-+ *
+-+ * "This function is only used with internal TLSv1 implementation
+-+ *  (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
+-+ *  to implement this."
+-+ */
+-+
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_CIPHER
+-+
+-+#include <mbedtls/cipher.h>
+-+
+-+struct crypto_cipher
+-+{
+-+	mbedtls_cipher_context_t ctx_enc;
+-+	mbedtls_cipher_context_t ctx_dec;
+-+};
+-+
+-+struct crypto_cipher * crypto_cipher_init(enum crypto_cipher_alg alg,
+-+					  const u8 *iv, const u8 *key,
+-+					  size_t key_len)
+-+{
+-+	/* IKEv2 src/eap_common/ikev2_common.c:ikev2_{encr,decr}_encrypt()
+-+	 * uses one of CRYPTO_CIPHER_ALG_AES or CRYPTO_CIPHER_ALG_3DES */
+-+
+-+	mbedtls_cipher_type_t cipher_type;
+-+	size_t iv_len;
+-+	switch (alg) {
+-+  #ifdef MBEDTLS_ARC4_C
+-+  #if 0
+-+	case CRYPTO_CIPHER_ALG_RC4:
+-+		cipher_type = MBEDTLS_CIPHER_ARC4_128;
+-+		iv_len = 0;
+-+		break;
+-+  #endif
+-+  #endif
+-+  #ifdef MBEDTLS_AES_C
+-+	case CRYPTO_CIPHER_ALG_AES:
+-+		if (key_len == 16) cipher_type = MBEDTLS_CIPHER_AES_128_CTR;
+-+		if (key_len == 24) cipher_type = MBEDTLS_CIPHER_AES_192_CTR;
+-+		if (key_len == 32) cipher_type = MBEDTLS_CIPHER_AES_256_CTR;
+-+		iv_len = 16;
+-+		break;
+-+  #endif
+-+  #ifdef MBEDTLS_DES_C
+-+	case CRYPTO_CIPHER_ALG_3DES:
+-+		cipher_type = MBEDTLS_CIPHER_DES_EDE3_CBC;
+-+		iv_len = 8;
+-+		break;
+-+  #if 0
+-+	case CRYPTO_CIPHER_ALG_DES:
+-+		cipher_type = MBEDTLS_CIPHER_DES_CBC;
+-+		iv_len = 8;
+-+		break;
+-+  #endif
+-+  #endif
+-+	default:
+-+		return NULL;
+-+	}
+-+
+-+	const mbedtls_cipher_info_t *cipher_info;
+-+	cipher_info = mbedtls_cipher_info_from_type(cipher_type);
+-+	if (cipher_info == NULL)
+-+		return NULL;
+-+
+-+	key_len *= 8; /* key_bitlen */
+-+  #if 0 /*(were key_bitlen not already available)*/
+-+  #if MBEDTLS_VERSION_NUMBER >= 0x03010000 /* mbedtls 3.1.0 */
+-+	key_len = mbedtls_cipher_info_get_key_bitlen(cipher_info);
+-+  #else
+-+	key_len = cipher_info->MBEDTLS_PRIVATE(key_bitlen);
+-+  #endif
+-+  #endif
+-+
+-+  #if 0 /*(were iv_len not known above, would need MBEDTLS_PRIVATE(iv_size))*/
+-+	iv_len = cipher_info->MBEDTLS_PRIVATE(iv_size);
+-+  #endif
+-+
+-+	struct crypto_cipher *ctx = os_malloc(sizeof(*ctx));
+-+	if (!ctx)
+-+		return NULL;
+-+
+-+	mbedtls_cipher_init(&ctx->ctx_enc);
+-+	mbedtls_cipher_init(&ctx->ctx_dec);
+-+	if (   mbedtls_cipher_setup(&ctx->ctx_enc,cipher_info) == 0
+-+	    && mbedtls_cipher_setup(&ctx->ctx_dec,cipher_info) == 0
+-+	    && mbedtls_cipher_setkey(&ctx->ctx_enc,key,key_len,MBEDTLS_ENCRYPT) == 0
+-+	    && mbedtls_cipher_setkey(&ctx->ctx_dec,key,key_len,MBEDTLS_DECRYPT) == 0
+-+	    && mbedtls_cipher_set_iv(&ctx->ctx_enc,iv,iv_len) == 0
+-+	    && mbedtls_cipher_set_iv(&ctx->ctx_dec,iv,iv_len) == 0
+-+	    && mbedtls_cipher_reset(&ctx->ctx_enc) == 0
+-+	    && mbedtls_cipher_reset(&ctx->ctx_dec) == 0) {
+-+		return ctx;
+-+	}
+-+
+-+	mbedtls_cipher_free(&ctx->ctx_enc);
+-+	mbedtls_cipher_free(&ctx->ctx_dec);
+-+	os_free(ctx);
+-+	return NULL;
+-+}
+-+
+-+int crypto_cipher_encrypt(struct crypto_cipher *ctx,
+-+			  const u8 *plain, u8 *crypt, size_t len)
+-+{
+-+	size_t olen = 0; /*(poor interface above; unknown size of u8 *crypt)*/
+-+	return (mbedtls_cipher_update(&ctx->ctx_enc, plain, len, crypt, &olen)
+-+	        || mbedtls_cipher_finish(&ctx->ctx_enc, crypt + olen, &olen)) ? -1 : 0;
+-+}
+-+
+-+int crypto_cipher_decrypt(struct crypto_cipher *ctx,
+-+			  const u8 *crypt, u8 *plain, size_t len)
+-+{
+-+	size_t olen = 0; /*(poor interface above; unknown size of u8 *plain)*/
+-+	return (mbedtls_cipher_update(&ctx->ctx_dec, crypt, len, plain, &olen)
+-+	        || mbedtls_cipher_finish(&ctx->ctx_dec, plain + olen, &olen)) ? -1 : 0;
+-+}
+-+
+-+void crypto_cipher_deinit(struct crypto_cipher *ctx)
+-+{
+-+	mbedtls_cipher_free(&ctx->ctx_enc);
+-+	mbedtls_cipher_free(&ctx->ctx_dec);
+-+	os_free(ctx);
+-+}
+-+
+-+#endif /* CRYPTO_MBEDTLS_CRYPTO_CIPHER */
+-+
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_HASH
+-+
+-+struct crypto_hash * crypto_hash_init(enum crypto_hash_alg alg, const u8 *key,
+-+				      size_t key_len)
+-+{
+-+	mbedtls_md_type_t md_type;
+-+	int is_hmac = 0;
+-+
+-+	switch (alg) {
+-+  #ifdef MBEDTLS_MD5_C
+-+	case CRYPTO_HASH_ALG_MD5:
+-+		md_type = MBEDTLS_MD_MD5;
+-+		break;
+-+  #endif
+-+  #ifdef MBEDTLS_SHA1_C
+-+	case CRYPTO_HASH_ALG_SHA1:
+-+		md_type = MBEDTLS_MD_SHA1;
+-+		break;
+-+  #endif
+-+  #ifdef MBEDTLS_MD5_C
+-+	case CRYPTO_HASH_ALG_HMAC_MD5:
+-+		md_type = MBEDTLS_MD_MD5;
+-+		is_hmac = 1;
+-+		break;
+-+  #endif
+-+  #ifdef MBEDTLS_SHA1_C
+-+	case CRYPTO_HASH_ALG_HMAC_SHA1:
+-+		md_type = MBEDTLS_MD_SHA1;
+-+		is_hmac = 1;
+-+		break;
+-+  #endif
+-+  #ifdef MBEDTLS_SHA256_C
+-+	case CRYPTO_HASH_ALG_SHA256:
+-+		md_type = MBEDTLS_MD_SHA256;
+-+		break;
+-+	case CRYPTO_HASH_ALG_HMAC_SHA256:
+-+		md_type = MBEDTLS_MD_SHA256;
+-+		is_hmac = 1;
+-+		break;
+-+  #endif
+-+  #ifdef MBEDTLS_SHA512_C
+-+	case CRYPTO_HASH_ALG_SHA384:
+-+		md_type = MBEDTLS_MD_SHA384;
+-+		break;
+-+	case CRYPTO_HASH_ALG_SHA512:
+-+		md_type = MBEDTLS_MD_SHA512;
+-+		break;
+-+  #endif
+-+	default:
+-+		return NULL;
+-+	}
+-+
+-+	const mbedtls_md_info_t *md_info = mbedtls_md_info_from_type(md_type);
+-+	if (!md_info)
+-+		return NULL;
+-+
+-+	mbedtls_md_context_t *mctx = os_malloc(sizeof(*mctx));
+-+	if (mctx == NULL)
+-+		return NULL;
+-+
+-+	mbedtls_md_init(mctx);
+-+	if (mbedtls_md_setup(mctx, md_info, is_hmac) != 0) {
+-+		os_free(mctx);
+-+		return NULL;
+-+	}
+-+
+-+	if (is_hmac)
+-+		mbedtls_md_hmac_starts(mctx, key, key_len);
+-+	else
+-+		mbedtls_md_starts(mctx);
+-+	return (struct crypto_hash *)((uintptr_t)mctx | is_hmac);
+-+}
+-+
+-+void crypto_hash_update(struct crypto_hash *ctx, const u8 *data, size_t len)
+-+{
+-+	mbedtls_md_context_t *mctx = (mbedtls_md_context_t*)((uintptr_t)ctx & ~1uL);
+-+  #if 0
+-+	/*(mbedtls_md_hmac_update() and mbedtls_md_update()
+-+	 * make same modifications under the hood in mbedtls)*/
+-+	if ((uintptr_t)ctx & 1uL)
+-+		mbedtls_md_hmac_update(mctx, data, len);
+-+	else
+-+  #endif
+-+		mbedtls_md_update(mctx, data, len);
+-+}
+-+
+-+int crypto_hash_finish(struct crypto_hash *ctx, u8 *mac, size_t *len)
+-+{
+-+	mbedtls_md_context_t *mctx = (mbedtls_md_context_t*)((uintptr_t)ctx & ~1uL);
+-+	if (mac != NULL && len != NULL) { /*(NULL if caller just freeing context)*/
+-+	  #if MBEDTLS_VERSION_NUMBER >= 0x03020000 /* mbedtls 3.2.0 */
+-+		const mbedtls_md_info_t *md_info = mbedtls_md_info_from_ctx(mctx);
+-+	  #else
+-+		const mbedtls_md_info_t *md_info = mctx->MBEDTLS_PRIVATE(md_info);
+-+	  #endif
+-+		size_t maclen = mbedtls_md_get_size(md_info);
+-+		if (*len < maclen) {
+-+			*len = maclen;
+-+			/*(note: ctx not freed; can call again with larger *len)*/
+-+			return -1;
+-+		}
+-+		*len = maclen;
+-+		if ((uintptr_t)ctx & 1uL)
+-+			mbedtls_md_hmac_finish(mctx, mac);
+-+		else
+-+			mbedtls_md_finish(mctx, mac);
+-+	}
+-+	mbedtls_md_free(mctx);
+-+	os_free(mctx);
+-+	return 0;
+-+}
+-+
+-+#endif /* CRYPTO_MBEDTLS_CRYPTO_HASH */
+-+
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_BIGNUM
+-+
+-+#include <mbedtls/bignum.h>
+-+
+-+/* crypto.h bignum interfaces */
+-+
+-+struct crypto_bignum *crypto_bignum_init(void)
+-+{
+-+	mbedtls_mpi *bn = os_malloc(sizeof(*bn));
+-+	if (bn)
+-+		mbedtls_mpi_init(bn);
+-+	return (struct crypto_bignum *)bn;
+-+}
+-+
+-+struct crypto_bignum *crypto_bignum_init_set(const u8 *buf, size_t len)
+-+{
+-+	mbedtls_mpi *bn = os_malloc(sizeof(*bn));
+-+	if (bn) {
+-+		mbedtls_mpi_init(bn);
+-+		if (mbedtls_mpi_read_binary(bn, buf, len) == 0)
+-+			return (struct crypto_bignum *)bn;
+-+	}
+-+
+-+	os_free(bn);
+-+	return NULL;
+-+}
+-+
+-+struct crypto_bignum *crypto_bignum_init_uint(unsigned int val)
+-+{
+-+  #if 0 /*(hostap use of this interface passes int, not uint)*/
+-+	val = host_to_be32(val);
+-+	return crypto_bignum_init_set((const u8 *)&val, sizeof(val));
+-+  #else
+-+	mbedtls_mpi *bn = os_malloc(sizeof(*bn));
+-+	if (bn) {
+-+		mbedtls_mpi_init(bn);
+-+		if (mbedtls_mpi_lset(bn, (int)val) == 0)
+-+			return (struct crypto_bignum *)bn;
+-+	}
+-+
+-+	os_free(bn);
+-+	return NULL;
+-+  #endif
+-+}
+-+
+-+void crypto_bignum_deinit(struct crypto_bignum *n, int clear)
+-+{
+-+	mbedtls_mpi_free((mbedtls_mpi *)n);
+-+	os_free(n);
+-+}
+-+
+-+int crypto_bignum_to_bin(const struct crypto_bignum *a,
+-+			 u8 *buf, size_t buflen, size_t padlen)
+-+{
+-+	size_t n = mbedtls_mpi_size((mbedtls_mpi *)a);
+-+	if (n < padlen)
+-+		n = padlen;
+-+	return n > buflen || mbedtls_mpi_write_binary((mbedtls_mpi *)a, buf, n)
+-+	  ? -1
+-+	  : (int)(n);
+-+}
+-+
+-+int crypto_bignum_rand(struct crypto_bignum *r, const struct crypto_bignum *m)
+-+{
+-+	/*assert(r != m);*//* r must not be same as m for mbedtls_mpi_random()*/
+-+  #if MBEDTLS_VERSION_NUMBER >= 0x021B0000 /* mbedtls 2.27.0 */
+-+	return mbedtls_mpi_random((mbedtls_mpi *)r, 0, (mbedtls_mpi *)m,
+-+				  mbedtls_ctr_drbg_random,
+-+				  crypto_mbedtls_ctr_drbg()) ? -1 : 0;
+-+  #else
+-+	/* (needed by EAP_PWD, SAE, DPP) */
+-+	wpa_printf(MSG_ERROR,
+-+	           "mbedtls 2.27.0 or later required for mbedtls_mpi_random()");
+-+	return -1;
+-+  #endif
+-+}
+-+
+-+int crypto_bignum_add(const struct crypto_bignum *a,
+-+		      const struct crypto_bignum *b,
+-+		      struct crypto_bignum *c)
+-+{
+-+	return mbedtls_mpi_add_mpi((mbedtls_mpi *)c,
+-+				   (const mbedtls_mpi *)a,
+-+				   (const mbedtls_mpi *)b) ? -1 : 0;
+-+}
+-+
+-+int crypto_bignum_mod(const struct crypto_bignum *a,
+-+		      const struct crypto_bignum *b,
+-+		      struct crypto_bignum *c)
+-+{
+-+	return mbedtls_mpi_mod_mpi((mbedtls_mpi *)c,
+-+				   (const mbedtls_mpi *)a,
+-+				   (const mbedtls_mpi *)b) ? -1 : 0;
+-+}
+-+
+-+int crypto_bignum_exptmod(const struct crypto_bignum *a,
+-+			  const struct crypto_bignum *b,
+-+			  const struct crypto_bignum *c,
+-+			  struct crypto_bignum *d)
+-+{
+-+	/* (check if input params match d; d is the result) */
+-+	/* (a == d) is ok in current mbedtls implementation */
+-+	if (b == d || c == d) { /*(not ok; store result in intermediate)*/
+-+		mbedtls_mpi R;
+-+		mbedtls_mpi_init(&R);
+-+		int rc = mbedtls_mpi_exp_mod(&R,
+-+		                             (const mbedtls_mpi *)a,
+-+		                             (const mbedtls_mpi *)b,
+-+		                             (const mbedtls_mpi *)c,
+-+		                             NULL)
+-+		      || mbedtls_mpi_copy((mbedtls_mpi *)d, &R) ? -1 : 0;
+-+		mbedtls_mpi_free(&R);
+-+		return rc;
+-+	}
+-+	else {
+-+		return mbedtls_mpi_exp_mod((mbedtls_mpi *)d,
+-+		                           (const mbedtls_mpi *)a,
+-+		                           (const mbedtls_mpi *)b,
+-+		                           (const mbedtls_mpi *)c,
+-+		                           NULL) ? -1 : 0;
+-+	}
+-+}
+-+
+-+int crypto_bignum_inverse(const struct crypto_bignum *a,
+-+			  const struct crypto_bignum *b,
+-+			  struct crypto_bignum *c)
+-+{
+-+	return mbedtls_mpi_inv_mod((mbedtls_mpi *)c,
+-+				   (const mbedtls_mpi *)a,
+-+				   (const mbedtls_mpi *)b) ? -1 : 0;
+-+}
+-+
+-+int crypto_bignum_sub(const struct crypto_bignum *a,
+-+		      const struct crypto_bignum *b,
+-+		      struct crypto_bignum *c)
+-+{
+-+	return mbedtls_mpi_sub_mpi((mbedtls_mpi *)c,
+-+				   (const mbedtls_mpi *)a,
+-+				   (const mbedtls_mpi *)b) ? -1 : 0;
+-+}
+-+
+-+int crypto_bignum_div(const struct crypto_bignum *a,
+-+		      const struct crypto_bignum *b,
+-+		      struct crypto_bignum *c)
+-+{
+-+	/*(most current use of this crypto.h interface has a == c (result),
+-+	 * so store result in an intermediate to avoid overwritten input)*/
+-+	mbedtls_mpi R;
+-+	mbedtls_mpi_init(&R);
+-+	int rc = mbedtls_mpi_div_mpi(&R, NULL,
+-+				     (const mbedtls_mpi *)a,
+-+				     (const mbedtls_mpi *)b)
+-+	      || mbedtls_mpi_copy((mbedtls_mpi *)c, &R) ? -1 : 0;
+-+	mbedtls_mpi_free(&R);
+-+	return rc;
+-+}
+-+
+-+int crypto_bignum_addmod(const struct crypto_bignum *a,
+-+			 const struct crypto_bignum *b,
+-+			 const struct crypto_bignum *c,
+-+			 struct crypto_bignum *d)
+-+{
+-+	return mbedtls_mpi_add_mpi((mbedtls_mpi *)d,
+-+				   (const mbedtls_mpi *)a,
+-+				   (const mbedtls_mpi *)b)
+-+	    || mbedtls_mpi_mod_mpi((mbedtls_mpi *)d,
+-+				   (mbedtls_mpi *)d,
+-+				   (const mbedtls_mpi *)c) ? -1 : 0;
+-+}
+-+
+-+int crypto_bignum_mulmod(const struct crypto_bignum *a,
+-+			 const struct crypto_bignum *b,
+-+			 const struct crypto_bignum *c,
+-+			 struct crypto_bignum *d)
+-+{
+-+	return mbedtls_mpi_mul_mpi((mbedtls_mpi *)d,
+-+				   (const mbedtls_mpi *)a,
+-+				   (const mbedtls_mpi *)b)
+-+	    || mbedtls_mpi_mod_mpi((mbedtls_mpi *)d,
+-+				   (mbedtls_mpi *)d,
+-+				   (const mbedtls_mpi *)c) ? -1 : 0;
+-+}
+-+
+-+int crypto_bignum_sqrmod(const struct crypto_bignum *a,
+-+			 const struct crypto_bignum *b,
+-+			 struct crypto_bignum *c)
+-+{
+-+  #if 1
+-+	return crypto_bignum_mulmod(a, a, b, c);
+-+  #else
+-+	mbedtls_mpi bn;
+-+	mbedtls_mpi_init(&bn);
+-+	if (mbedtls_mpi_lset(&bn, 2)) /* alt?: mbedtls_mpi_set_bit(&bn, 1) */
+-+		return -1;
+-+	int ret = mbedtls_mpi_exp_mod((mbedtls_mpi *)c,
+-+				      (const mbedtls_mpi *)a, &bn,
+-+				      (const mbedtls_mpi *)b, NULL) ? -1 : 0;
+-+	mbedtls_mpi_free(&bn);
+-+	return ret;
+-+  #endif
+-+}
+-+
+-+int crypto_bignum_rshift(const struct crypto_bignum *a, int n,
+-+			 struct crypto_bignum *r)
+-+{
+-+	return mbedtls_mpi_copy((mbedtls_mpi *)r, (const mbedtls_mpi *)a)
+-+	    || mbedtls_mpi_shift_r((mbedtls_mpi *)r, n) ? -1 : 0;
+-+}
+-+
+-+int crypto_bignum_cmp(const struct crypto_bignum *a,
+-+		      const struct crypto_bignum *b)
+-+{
+-+	return mbedtls_mpi_cmp_mpi((const mbedtls_mpi *)a, (const mbedtls_mpi *)b);
+-+}
+-+
+-+int crypto_bignum_is_zero(const struct crypto_bignum *a)
+-+{
+-+	/* XXX: src/common/sae.c:sswu() contains comment:
+-+	 * "TODO: Make sure crypto_bignum_is_zero() is constant time"
+-+	 * Note: mbedtls_mpi_cmp_int() *is not* constant time */
+-+	return (mbedtls_mpi_cmp_int((const mbedtls_mpi *)a, 0) == 0);
+-+}
+-+
+-+int crypto_bignum_is_one(const struct crypto_bignum *a)
+-+{
+-+	return (mbedtls_mpi_cmp_int((const mbedtls_mpi *)a, 1) == 0);
+-+}
+-+
+-+int crypto_bignum_is_odd(const struct crypto_bignum *a)
+-+{
+-+	return mbedtls_mpi_get_bit((const mbedtls_mpi *)a, 0);
+-+}
+-+
+-+#include "utils/const_time.h"
+-+int crypto_bignum_legendre(const struct crypto_bignum *a,
+-+			   const struct crypto_bignum *p)
+-+{
+-+	/* Security Note:
+-+	 * mbedtls_mpi_exp_mod() is not documented to run in constant time,
+-+	 * though mbedtls/library/bignum.c uses constant_time_internal.h funcs.
+-+	 * Compare to crypto_openssl.c:crypto_bignum_legendre()
+-+	 * which uses openssl BN_mod_exp_mont_consttime()
+-+	 * mbedtls/library/ecp.c has further countermeasures to timing attacks,
+-+	 * (but ecp.c funcs are not used here) */
+-+
+-+	mbedtls_mpi exp, tmp;
+-+	mbedtls_mpi_init(&exp);
+-+	mbedtls_mpi_init(&tmp);
+-+
+-+	/* exp = (p-1) / 2 */
+-+	int res;
+-+	if (mbedtls_mpi_sub_int(&exp, (const mbedtls_mpi *)p, 1) == 0
+-+	    && mbedtls_mpi_shift_r(&exp, 1) == 0
+-+	    && mbedtls_mpi_exp_mod(&tmp, (const mbedtls_mpi *)a, &exp,
+-+	                           (const mbedtls_mpi *)p, NULL) == 0) {
+-+		/*(modified from crypto_openssl.c:crypto_bignum_legendre())*/
+-+		/* Return 1 if tmp == 1, 0 if tmp == 0, or -1 otherwise. Need
+-+		 * to use constant time selection to avoid branches here. */
+-+		unsigned int mask;
+-+		res = -1;
+-+		mask = const_time_eq((mbedtls_mpi_cmp_int(&tmp, 1) == 0), 1);
+-+		res = const_time_select_int(mask, 1, res);
+-+		mask = const_time_eq((mbedtls_mpi_cmp_int(&tmp, 0) == 0), 1);
+-+		res = const_time_select_int(mask, 0, res);
+-+	} else {
+-+		res = -2;
+-+	}
+-+
+-+	mbedtls_mpi_free(&tmp);
+-+	mbedtls_mpi_free(&exp);
+-+	return res;
+-+}
+-+
+-+#endif /* CRYPTO_MBEDTLS_CRYPTO_BIGNUM */
+-+
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_DH
+-+
+-+/* crypto_internal-modexp.c */
+-+
+-+#include <mbedtls/bignum.h>
+-+#include <mbedtls/dhm.h>
+-+
+-+#if 0 /* crypto_dh_init() and crypto_dh_derive_secret() prefer to use mbedtls */
+-+int crypto_mod_exp(const u8 *base, size_t base_len,
+-+		   const u8 *power, size_t power_len,
+-+		   const u8 *modulus, size_t modulus_len,
+-+		   u8 *result, size_t *result_len)
+-+{
+-+	mbedtls_mpi bn_base, bn_exp, bn_modulus, bn_result;
+-+	mbedtls_mpi_init(&bn_base);
+-+	mbedtls_mpi_init(&bn_exp);
+-+	mbedtls_mpi_init(&bn_modulus);
+-+	mbedtls_mpi_init(&bn_result);
+-+
+-+	size_t len;
+-+	int ret =  mbedtls_mpi_read_binary(&bn_base, base, base_len)
+-+	        || mbedtls_mpi_read_binary(&bn_exp, power, power_len)
+-+	        || mbedtls_mpi_read_binary(&bn_modulus, modulus, modulus_len)
+-+	        || mbedtls_mpi_exp_mod(&bn_result,&bn_base,&bn_exp,&bn_modulus,NULL)
+-+	        || (len = mbedtls_mpi_size(&bn_result)) > *result_len
+-+	        || mbedtls_mpi_write_binary(&bn_result, result, (*result_len = len))
+-+	  ? -1
+-+	  : 0;
+-+
+-+	mbedtls_mpi_free(&bn_base);
+-+	mbedtls_mpi_free(&bn_exp);
+-+	mbedtls_mpi_free(&bn_modulus);
+-+	mbedtls_mpi_free(&bn_result);
+-+	return ret;
+-+}
+-+#endif
+-+
+-+static int crypto_mbedtls_dh_set_bin_pg(mbedtls_dhm_context *ctx, u8 generator,
+-+                                        const u8 *prime, size_t prime_len)
+-+{
+-+	/*(could set these directly in MBEDTLS_PRIVATE members)*/
+-+	mbedtls_mpi P, G;
+-+	mbedtls_mpi_init(&P);
+-+	mbedtls_mpi_init(&G);
+-+	int ret = mbedtls_mpi_lset(&G, generator)
+-+	       || mbedtls_mpi_read_binary(&P, prime, prime_len)
+-+	       || mbedtls_dhm_set_group(ctx, &P, &G);
+-+	mbedtls_mpi_free(&P);
+-+	mbedtls_mpi_free(&G);
+-+	return ret;
+-+}
+-+
+-+__attribute_noinline__
+-+static int crypto_mbedtls_dh_init_public(mbedtls_dhm_context *ctx, u8 generator,
+-+                                         const u8 *prime, size_t prime_len,
+-+                                         u8 *privkey, u8 *pubkey)
+-+{
+-+	if (crypto_mbedtls_dh_set_bin_pg(ctx, generator, prime, prime_len)
+-+	    || mbedtls_dhm_make_public(ctx, (int)prime_len, pubkey, prime_len,
+-+	                               mbedtls_ctr_drbg_random,
+-+	                               crypto_mbedtls_ctr_drbg()))
+-+		return -1;
+-+
+-+  /*(enable later when upstream mbedtls interface changes require)*/
+-+  #if 0 && MBEDTLS_VERSION_NUMBER >= 0x03000000 /* mbedtls 3.0.0 */
+-+	mbedtls_mpi X;
+-+	mbedtls_mpi_init(&X);
+-+	int ret = mbedtls_dhm_get_value(ctx, MBEDTLS_DHM_PARAM_X, &X)
+-+	       || mbedtls_mpi_write_binary(&X, privkey, prime_len) ? -1 : 0;
+-+	mbedtls_mpi_free(&X);
+-+	return ret;
+-+  #else
+-+	return mbedtls_mpi_write_binary(&ctx->MBEDTLS_PRIVATE(X),
+-+	                                privkey, prime_len) ? -1 : 0;
+-+  #endif
+-+}
+-+
+-+int crypto_dh_init(u8 generator, const u8 *prime, size_t prime_len, u8 *privkey,
+-+		   u8 *pubkey)
+-+{
+-+  #if 0 /*(crypto_dh_init() duplicated (and identical) in crypto_*.c modules)*/
+-+	size_t pubkey_len, pad;
+-+
+-+	if (os_get_random(privkey, prime_len) < 0)
+-+		return -1;
+-+	if (os_memcmp(privkey, prime, prime_len) > 0) {
+-+		/* Make sure private value is smaller than prime */
+-+		privkey[0] = 0;
+-+	}
+-+
+-+	pubkey_len = prime_len;
+-+	if (crypto_mod_exp(&generator, 1, privkey, prime_len, prime, prime_len,
+-+			   pubkey, &pubkey_len) < 0)
+-+		return -1;
+-+	if (pubkey_len < prime_len) {
+-+		pad = prime_len - pubkey_len;
+-+		os_memmove(pubkey + pad, pubkey, pubkey_len);
+-+		os_memset(pubkey, 0, pad);
+-+	}
+-+
+-+	return 0;
+-+  #else
+-+	/* Prefer to use mbedtls to derive our public/private key, as doing so
+-+	 * leverages mbedtls to properly format output and to perform blinding*/
+-+	mbedtls_dhm_context ctx;
+-+	mbedtls_dhm_init(&ctx);
+-+	int ret = crypto_mbedtls_dh_init_public(&ctx, generator, prime,
+-+	                                        prime_len, privkey, pubkey);
+-+	mbedtls_dhm_free(&ctx);
+-+	return ret;
+-+  #endif
+-+}
+-+
+-+/*(crypto_dh_derive_secret() could be implemented using crypto.h APIs
+-+ * instead of being reimplemented in each crypto_*.c)*/
+-+int crypto_dh_derive_secret(u8 generator, const u8 *prime, size_t prime_len,
+-+			    const u8 *order, size_t order_len,
+-+			    const u8 *privkey, size_t privkey_len,
+-+			    const u8 *pubkey, size_t pubkey_len,
+-+			    u8 *secret, size_t *len)
+-+{
+-+  #if 0
+-+	if (pubkey_len > prime_len ||
+-+	    (pubkey_len == prime_len &&
+-+	     os_memcmp(pubkey, prime, prime_len) >= 0))
+-+		return -1;
+-+
+-+	int res = 0;
+-+	mbedtls_mpi pub;
+-+	mbedtls_mpi_init(&pub);
+-+	if (mbedtls_mpi_read_binary(&pub, pubkey, pubkey_len)
+-+	    || mbedtls_mpi_cmp_int(&pub, 1) <= 0) {
+-+		res = -1;
+-+	} else if (order) {
+-+		mbedtls_mpi p, q, tmp;
+-+		mbedtls_mpi_init(&p);
+-+		mbedtls_mpi_init(&q);
+-+		mbedtls_mpi_init(&tmp);
+-+
+-+		/* verify: pubkey^q == 1 mod p */
+-+		res = (mbedtls_mpi_read_binary(&p, prime, prime_len)
+-+		    || mbedtls_mpi_read_binary(&q, order, order_len)
+-+		    || mbedtls_mpi_exp_mod(&tmp, &pub, &q, &p, NULL)
+-+		    || mbedtls_mpi_cmp_int(&tmp, 1) != 0);
+-+
+-+		mbedtls_mpi_free(&p);
+-+		mbedtls_mpi_free(&q);
+-+		mbedtls_mpi_free(&tmp);
+-+	}
+-+	mbedtls_mpi_free(&pub);
+-+
+-+	return (res == 0)
+-+	  ? crypto_mod_exp(pubkey, pubkey_len, privkey, privkey_len,
+-+			   prime, prime_len, secret, len)
+-+	  : -1;
+-+  #else
+-+	/* Prefer to use mbedtls to derive DH shared secret, as doing so
+-+	 * leverages mbedtls to validate params and to perform blinding.
+-+	 *
+-+	 * Attempt to reconstitute DH context to derive shared secret
+-+	 * (due to limitations of the interface, which ought to pass context).
+-+	 * Force provided G (our private key) into context without validation.
+-+	 * Regenerating GX (our public key) not needed to derive shared secret.
+-+	 */
+-+	/*(older compilers might not support VLAs)*/
+-+	/*unsigned char buf[2+prime_len+2+1+2+pubkey_len];*/
+-+	unsigned char buf[2+MBEDTLS_MPI_MAX_SIZE+2+1+2+MBEDTLS_MPI_MAX_SIZE];
+-+	unsigned char *p = buf + 2 + prime_len;
+-+	if (2+prime_len+2+1+2+pubkey_len > sizeof(buf))
+-+		return -1;
+-+	WPA_PUT_BE16(buf, prime_len);  /*(2-byte big-endian size of prime)*/
+-+	p[0] = 0;                      /*(2-byte big-endian size of generator)*/
+-+	p[1] = 1;
+-+	p[2] = generator;
+-+	WPA_PUT_BE16(p+3, pubkey_len); /*(2-byte big-endian size of pubkey)*/
+-+	os_memcpy(p+5, pubkey, pubkey_len);
+-+	os_memcpy(buf+2, prime, prime_len);
+-+
+-+	mbedtls_dhm_context ctx;
+-+	mbedtls_dhm_init(&ctx);
+-+	p = buf;
+-+	int ret = mbedtls_dhm_read_params(&ctx, &p, p+2+prime_len+5+pubkey_len)
+-+	       || mbedtls_mpi_read_binary(&ctx.MBEDTLS_PRIVATE(X),
+-+	                                  privkey, privkey_len)
+-+	       || mbedtls_dhm_calc_secret(&ctx, secret, *len, len,
+-+	                                  mbedtls_ctr_drbg_random,
+-+	                                  crypto_mbedtls_ctr_drbg()) ? -1 : 0;
+-+	mbedtls_dhm_free(&ctx);
+-+	return ret;
+-+  #endif
+-+}
+-+
+-+/* dh_group5.c */
+-+
+-+#include "dh_group5.h"
+-+
+-+/* RFC3526_PRIME_1536[] and RFC3526_GENERATOR_1536[] from crypto_wolfssl.c */
+-+
+-+static const unsigned char RFC3526_PRIME_1536[] = {
+-+	0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xC9, 0x0F, 0xDA, 0xA2,
+-+	0x21, 0x68, 0xC2, 0x34, 0xC4, 0xC6, 0x62, 0x8B, 0x80, 0xDC, 0x1C, 0xD1,
+-+	0x29, 0x02, 0x4E, 0x08, 0x8A, 0x67, 0xCC, 0x74, 0x02, 0x0B, 0xBE, 0xA6,
+-+	0x3B, 0x13, 0x9B, 0x22, 0x51, 0x4A, 0x08, 0x79, 0x8E, 0x34, 0x04, 0xDD,
+-+	0xEF, 0x95, 0x19, 0xB3, 0xCD, 0x3A, 0x43, 0x1B, 0x30, 0x2B, 0x0A, 0x6D,
+-+	0xF2, 0x5F, 0x14, 0x37, 0x4F, 0xE1, 0x35, 0x6D, 0x6D, 0x51, 0xC2, 0x45,
+-+	0xE4, 0x85, 0xB5, 0x76, 0x62, 0x5E, 0x7E, 0xC6, 0xF4, 0x4C, 0x42, 0xE9,
+-+	0xA6, 0x37, 0xED, 0x6B, 0x0B, 0xFF, 0x5C, 0xB6, 0xF4, 0x06, 0xB7, 0xED,
+-+	0xEE, 0x38, 0x6B, 0xFB, 0x5A, 0x89, 0x9F, 0xA5, 0xAE, 0x9F, 0x24, 0x11,
+-+	0x7C, 0x4B, 0x1F, 0xE6, 0x49, 0x28, 0x66, 0x51, 0xEC, 0xE4, 0x5B, 0x3D,
+-+	0xC2, 0x00, 0x7C, 0xB8, 0xA1, 0x63, 0xBF, 0x05, 0x98, 0xDA, 0x48, 0x36,
+-+	0x1C, 0x55, 0xD3, 0x9A, 0x69, 0x16, 0x3F, 0xA8, 0xFD, 0x24, 0xCF, 0x5F,
+-+	0x83, 0x65, 0x5D, 0x23, 0xDC, 0xA3, 0xAD, 0x96, 0x1C, 0x62, 0xF3, 0x56,
+-+	0x20, 0x85, 0x52, 0xBB, 0x9E, 0xD5, 0x29, 0x07, 0x70, 0x96, 0x96, 0x6D,
+-+	0x67, 0x0C, 0x35, 0x4E, 0x4A, 0xBC, 0x98, 0x04, 0xF1, 0x74, 0x6C, 0x08,
+-+	0xCA, 0x23, 0x73, 0x27, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
+-+};
+-+
+-+static const unsigned char RFC3526_GENERATOR_1536[] = {
+-+	0x02
+-+};
+-+
+-+void * dh5_init(struct wpabuf **priv, struct wpabuf **publ)
+-+{
+-+	const unsigned char * const prime = RFC3526_PRIME_1536;
+-+	const size_t prime_len = sizeof(RFC3526_PRIME_1536);
+-+	const u8 generator = *RFC3526_GENERATOR_1536;
+-+	struct wpabuf *wpubl = NULL, *wpriv = NULL;
+-+
+-+	mbedtls_dhm_context *ctx = os_malloc(sizeof(*ctx));
+-+	if (ctx == NULL)
+-+		return NULL;
+-+	mbedtls_dhm_init(ctx);
+-+
+-+	if (   (wpubl = wpabuf_alloc(prime_len))
+-+	    && (wpriv = wpabuf_alloc(prime_len))
+-+	    && crypto_mbedtls_dh_init_public(ctx, generator, prime, prime_len,
+-+	                                     wpabuf_put(wpriv, prime_len),
+-+	                                     wpabuf_put(wpubl, prime_len))==0) {
+-+		wpabuf_free(*publ);
+-+		wpabuf_clear_free(*priv);
+-+		*publ = wpubl;
+-+		*priv = wpriv;
+-+		return ctx;
+-+	}
+-+
+-+	wpabuf_clear_free(wpriv);
+-+	wpabuf_free(wpubl);
+-+	mbedtls_dhm_free(ctx);
+-+	os_free(ctx);
+-+	return NULL;
+-+}
+-+
+-+#ifdef CRYPTO_MBEDTLS_DH5_INIT_FIXED
+-+void * dh5_init_fixed(const struct wpabuf *priv, const struct wpabuf *publ)
+-+{
+-+	const unsigned char * const prime = RFC3526_PRIME_1536;
+-+	const size_t prime_len = sizeof(RFC3526_PRIME_1536);
+-+	const u8 generator = *RFC3526_GENERATOR_1536;
+-+
+-+	mbedtls_dhm_context *ctx = os_malloc(sizeof(*ctx));
+-+	if (ctx == NULL)
+-+		return NULL;
+-+	mbedtls_dhm_init(ctx);
+-+
+-+	if (crypto_mbedtls_dh_set_bin_pg(ctx, generator, prime, prime_len)==0
+-+	   #if 0 /*(ignore; not required to derive shared secret)*/
+-+	    && mbedtls_mpi_read_binary(&ctx->MBEDTLS_PRIVATE(GX),
+-+				       wpabuf_head(publ),wpabuf_len(publ))==0
+-+	   #endif
+-+	    && mbedtls_mpi_read_binary(&ctx->MBEDTLS_PRIVATE(X),
+-+				       wpabuf_head(priv),wpabuf_len(priv))==0) {
+-+		return ctx;
+-+	}
+-+
+-+	mbedtls_dhm_free(ctx);
+-+	os_free(ctx);
+-+	return NULL;
+-+}
+-+#endif
+-+
+-+struct wpabuf * dh5_derive_shared(void *ctx, const struct wpabuf *peer_public,
+-+				  const struct wpabuf *own_private)
+-+{
+-+	/*((mbedtls_dhm_context *)ctx must already contain own_private)*/
+-+	/* mbedtls 2.x: prime_len = ctx->len; */
+-+	/* mbedtls 3.x: prime_len = mbedtls_dhm_get_len(ctx); */
+-+	size_t olen = sizeof(RFC3526_PRIME_1536); /*(sizeof(); prime known)*/
+-+	struct wpabuf *buf = wpabuf_alloc(olen);
+-+	if (buf == NULL)
+-+		return NULL;
+-+	if (mbedtls_dhm_read_public((mbedtls_dhm_context *)ctx,
+-+	                            wpabuf_head(peer_public),
+-+	                            wpabuf_len(peer_public)) == 0
+-+	    && mbedtls_dhm_calc_secret(ctx, wpabuf_mhead(buf), olen, &olen,
+-+	                               mbedtls_ctr_drbg_random,
+-+	                               crypto_mbedtls_ctr_drbg()) == 0) {
+-+		wpabuf_put(buf, olen);
+-+		return buf;
+-+	}
+-+
+-+	wpabuf_free(buf);
+-+	return NULL;
+-+}
+-+
+-+void dh5_free(void *ctx)
+-+{
+-+	mbedtls_dhm_free(ctx);
+-+	os_free(ctx);
+-+}
+-+
+-+#endif /* CRYPTO_MBEDTLS_CRYPTO_DH */
+-+
+-+
+-+#if defined(CRYPTO_MBEDTLS_CRYPTO_ECDH) || defined(CRYPTO_MBEDTLS_CRYPTO_EC)
+-+
+-+#include <mbedtls/ecp.h>
+-+
+-+#define CRYPTO_EC_pbits(e) (((mbedtls_ecp_group *)(e))->pbits)
+-+#define CRYPTO_EC_plen(e) ((((mbedtls_ecp_group *)(e))->pbits+7)>>3)
+-+#define CRYPTO_EC_P(e)    (&((mbedtls_ecp_group *)(e))->P)
+-+#define CRYPTO_EC_N(e)    (&((mbedtls_ecp_group *)(e))->N)
+-+#define CRYPTO_EC_A(e)    (&((mbedtls_ecp_group *)(e))->A)
+-+#define CRYPTO_EC_B(e)    (&((mbedtls_ecp_group *)(e))->B)
+-+#define CRYPTO_EC_G(e)    (&((mbedtls_ecp_group *)(e))->G)
+-+
+-+static mbedtls_ecp_group_id crypto_mbedtls_ecp_group_id_from_ike_id(int group)
+-+{
+-+	/* https://www.iana.org/assignments/ikev2-parameters/ikev2-parameters.xhtml */
+-+	switch (group) {
+-+  #ifdef MBEDTLS_ECP_DP_SECP256R1_ENABLED
+-+	case 19: return MBEDTLS_ECP_DP_SECP256R1;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_SECP384R1_ENABLED
+-+	case 20: return MBEDTLS_ECP_DP_SECP384R1;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_SECP521R1_ENABLED
+-+	case 21: return MBEDTLS_ECP_DP_SECP521R1;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_SECP192R1_ENABLED
+-+	case 25: return MBEDTLS_ECP_DP_SECP192R1;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_SECP224R1_ENABLED
+-+	case 26: return MBEDTLS_ECP_DP_SECP224R1;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_BP256R1_ENABLED
+-+	case 28: return MBEDTLS_ECP_DP_BP256R1;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_BP384R1_ENABLED
+-+	case 29: return MBEDTLS_ECP_DP_BP384R1;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_BP512R1_ENABLED
+-+	case 30: return MBEDTLS_ECP_DP_BP512R1;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_CURVE25519_ENABLED
+-+	case 31: return MBEDTLS_ECP_DP_CURVE25519;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_CURVE448_ENABLED
+-+	case 32: return MBEDTLS_ECP_DP_CURVE448;
+-+  #endif
+-+	default: return MBEDTLS_ECP_DP_NONE;
+-+	}
+-+}
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_EC
+-+static int crypto_mbedtls_ike_id_from_ecp_group_id(mbedtls_ecp_group_id grp_id)
+-+{
+-+	/* https://www.iana.org/assignments/ikev2-parameters/ikev2-parameters.xhtml */
+-+	/*(for crypto_ec_key_group())*/
+-+	switch (grp_id) {
+-+  #ifdef MBEDTLS_ECP_DP_SECP256R1_ENABLED
+-+	case MBEDTLS_ECP_DP_SECP256R1:  return 19;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_SECP384R1_ENABLED
+-+	case MBEDTLS_ECP_DP_SECP384R1:  return 20;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_SECP521R1_ENABLED
+-+	case MBEDTLS_ECP_DP_SECP521R1:  return 21;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_SECP192R1_ENABLED
+-+	case MBEDTLS_ECP_DP_SECP192R1:  return 25;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_SECP224R1_ENABLED
+-+	case MBEDTLS_ECP_DP_SECP224R1:  return 26;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_BP256R1_ENABLED
+-+	case MBEDTLS_ECP_DP_BP256R1:    return 28;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_BP384R1_ENABLED
+-+	case MBEDTLS_ECP_DP_BP384R1:    return 29;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_BP512R1_ENABLED
+-+	case MBEDTLS_ECP_DP_BP512R1:    return 30;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_CURVE25519_ENABLED
+-+	case MBEDTLS_ECP_DP_CURVE25519: return 31;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_CURVE448_ENABLED
+-+	case MBEDTLS_ECP_DP_CURVE448:   return 32;
+-+  #endif
+-+	default: return -1;
+-+	}
+-+}
+-+#endif
+-+
+-+#endif /* CRYPTO_MBEDTLS_CRYPTO_ECDH || CRYPTO_MBEDTLS_CRYPTO_EC */
+-+
+-+
+-+#if defined(CRYPTO_MBEDTLS_CRYPTO_ECDH) || defined(CRYPTO_MBEDTLS_CRYPTO_EC_DPP)
+-+
+-+#include <mbedtls/ecp.h>
+-+#include <mbedtls/pk.h>
+-+
+-+static int crypto_mbedtls_keypair_gen(int group, mbedtls_pk_context *pk)
+-+{
+-+	mbedtls_ecp_group_id grp_id =
+-+	  crypto_mbedtls_ecp_group_id_from_ike_id(group);
+-+	if (grp_id == MBEDTLS_ECP_DP_NONE)
+-+		return -1;
+-+	const mbedtls_pk_info_t *pk_info =
+-+	  mbedtls_pk_info_from_type(MBEDTLS_PK_ECKEY);
+-+	if (pk_info == NULL)
+-+		return -1;
+-+	return mbedtls_pk_setup(pk, pk_info)
+-+	    || mbedtls_ecp_gen_key(grp_id, mbedtls_pk_ec(*pk),
+-+	                           mbedtls_ctr_drbg_random,
+-+	                           crypto_mbedtls_ctr_drbg()) ? -1 : 0;
+-+}
+-+
+-+#endif
+-+
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_ECDH
+-+
+-+#include <mbedtls/ecdh.h>
+-+#include <mbedtls/ecdsa.h>
+-+#include <mbedtls/ecp.h>
+-+#include <mbedtls/pk.h>
+-+
+-+/* wrap mbedtls_ecdh_context for more future-proof direct access to components
+-+ * (mbedtls_ecdh_context internal implementation may change between releases)
+-+ *
+-+ * If mbedtls_pk_context -- specifically underlying mbedtls_ecp_keypair --
+-+ * lifetime were guaranteed to be longer than that of mbedtls_ecdh_context,
+-+ * then mbedtls_pk_context or mbedtls_ecp_keypair could be stored in crypto_ecdh
+-+ * (or crypto_ec_key could be stored in crypto_ecdh, and crypto_ec_key could
+-+ *  wrap mbedtls_ecp_keypair and components, to avoid MBEDTLS_PRIVATE access) */
+-+struct crypto_ecdh {
+-+	mbedtls_ecdh_context ctx;
+-+	mbedtls_ecp_group grp;
+-+	mbedtls_ecp_point Q;
+-+};
+-+
+-+struct crypto_ecdh * crypto_ecdh_init(int group)
+-+{
+-+	mbedtls_pk_context pk;
+-+	mbedtls_pk_init(&pk);
+-+	struct crypto_ecdh *ecdh = crypto_mbedtls_keypair_gen(group, &pk) == 0
+-+	  ? crypto_ecdh_init2(group, (struct crypto_ec_key *)&pk)
+-+	  : NULL;
+-+	mbedtls_pk_free(&pk);
+-+	return ecdh;
+-+}
+-+
+-+struct crypto_ecdh * crypto_ecdh_init2(int group,
+-+				       struct crypto_ec_key *own_key)
+-+{
+-+	mbedtls_ecp_group_id grp_id =
+-+	  crypto_mbedtls_ecp_group_id_from_ike_id(group);
+-+	if (grp_id == MBEDTLS_ECP_DP_NONE)
+-+		return NULL;
+-+	mbedtls_ecp_keypair *ecp_kp = mbedtls_pk_ec(*(mbedtls_pk_context *)own_key);
+-+	struct crypto_ecdh *ecdh = os_malloc(sizeof(*ecdh));
+-+	if (ecdh == NULL)
+-+		return NULL;
+-+	mbedtls_ecdh_init(&ecdh->ctx);
+-+	mbedtls_ecp_group_init(&ecdh->grp);
+-+	mbedtls_ecp_point_init(&ecdh->Q);
+-+	if (mbedtls_ecdh_setup(&ecdh->ctx, grp_id) == 0
+-+	    && mbedtls_ecdh_get_params(&ecdh->ctx,ecp_kp,MBEDTLS_ECDH_OURS) == 0) {
+-+		/* copy grp and Q for later use
+-+		 * (retrieving this info later is more convoluted
+-+		 *  even if mbedtls_ecdh_make_public() is considered)*/
+-+	  #if MBEDTLS_VERSION_NUMBER >= 0x03020000 /* mbedtls 3.2.0 */
+-+		mbedtls_mpi d;
+-+		mbedtls_mpi_init(&d);
+-+		if (mbedtls_ecp_export(ecp_kp, &ecdh->grp, &d, &ecdh->Q) == 0) {
+-+			mbedtls_mpi_free(&d);
+-+			return ecdh;
+-+		}
+-+		mbedtls_mpi_free(&d);
+-+	  #else
+-+		if (mbedtls_ecp_group_load(&ecdh->grp, grp_id) == 0
+-+		    && mbedtls_ecp_copy(&ecdh->Q, &ecp_kp->MBEDTLS_PRIVATE(Q)) == 0)
+-+			return ecdh;
+-+	  #endif
+-+	}
+-+
+-+	mbedtls_ecp_point_free(&ecdh->Q);
+-+	mbedtls_ecp_group_free(&ecdh->grp);
+-+	mbedtls_ecdh_free(&ecdh->ctx);
+-+	os_free(ecdh);
+-+	return NULL;
+-+}
+-+
+-+struct wpabuf * crypto_ecdh_get_pubkey(struct crypto_ecdh *ecdh, int inc_y)
+-+{
+-+	mbedtls_ecp_group *grp = &ecdh->grp;
+-+	size_t len = CRYPTO_EC_plen(grp);
+-+  #ifdef MBEDTLS_ECP_MONTGOMERY_ENABLED
+-+	/* len */
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED
+-+	if (mbedtls_ecp_get_type(grp) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS)
+-+		len = inc_y ? len*2+1 : len+1;
+-+  #endif
+-+	struct wpabuf *buf = wpabuf_alloc(len);
+-+	if (buf == NULL)
+-+		return NULL;
+-+	inc_y = inc_y ? MBEDTLS_ECP_PF_UNCOMPRESSED : MBEDTLS_ECP_PF_COMPRESSED;
+-+	if (mbedtls_ecp_point_write_binary(grp, &ecdh->Q, inc_y, &len,
+-+	                                   wpabuf_mhead_u8(buf), len) == 0) {
+-+		wpabuf_put(buf, len);
+-+		return buf;
+-+	}
+-+
+-+	wpabuf_free(buf);
+-+	return NULL;
+-+}
+-+
+-+#if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED)
+-+static int crypto_mbedtls_short_weierstrass_derive_y(mbedtls_ecp_group *grp,
+-+                                                     mbedtls_mpi *bn,
+-+                                                     int parity_bit)
+-+{
+-+	/* y^2 = x^3 + ax + b
+-+	 * sqrt(w) = w^((p+1)/4) mod p   (for prime p where p = 3 mod 4) */
+-+	mbedtls_mpi *cy2 = (mbedtls_mpi *)
+-+	  crypto_ec_point_compute_y_sqr((struct crypto_ec *)grp,
+-+	                                (const struct crypto_bignum *)bn); /*x*/
+-+	if (cy2 == NULL)
+-+		return -1;
+-+
+-+	/*mbedtls_mpi_free(bn);*/
+-+	/*(reuse bn to store result (y))*/
+-+
+-+	mbedtls_mpi exp;
+-+	mbedtls_mpi_init(&exp);
+-+	int ret = mbedtls_mpi_get_bit(&grp->P, 0) != 1 /*(p = 3 mod 4)*/
+-+	       || mbedtls_mpi_get_bit(&grp->P, 1) != 1 /*(p = 3 mod 4)*/
+-+	       || mbedtls_mpi_add_int(&exp, &grp->P, 1)
+-+	       || mbedtls_mpi_shift_r(&exp, 2)
+-+	       || mbedtls_mpi_exp_mod(bn, cy2, &exp, &grp->P, NULL)
+-+	       || (mbedtls_mpi_get_bit(bn, 0) != parity_bit
+-+	           && mbedtls_mpi_sub_mpi(bn, &grp->P, bn));
+-+	mbedtls_mpi_free(&exp);
+-+	mbedtls_mpi_free(cy2);
+-+	os_free(cy2);
+-+	return ret;
+-+}
+-+#endif
+-+
+-+struct wpabuf * crypto_ecdh_set_peerkey(struct crypto_ecdh *ecdh, int inc_y,
+-+					const u8 *key, size_t len)
+-+{
+-+	if (len == 0) /*(invalid peer key)*/
+-+		return NULL;
+-+
+-+	mbedtls_ecp_group *grp = &ecdh->grp;
+-+
+-+  #if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED)
+-+	if (mbedtls_ecp_get_type(grp) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS) {
+-+		/* add header for mbedtls_ecdh_read_public() */
+-+		u8 buf[256];
+-+		if (sizeof(buf)-1 < len)
+-+			return NULL;
+-+		buf[0] = (u8)(len);
+-+		os_memcpy(buf+1, key, len);
+-+
+-+		if (inc_y) {
+-+			if (!(len & 1)) { /*(dpp code/tests does not include tag?!?)*/
+-+				if (sizeof(buf)-2 < len)
+-+					return NULL;
+-+				buf[0] = (u8)(1+len);
+-+				buf[1] = 0x04;
+-+				os_memcpy(buf+2, key, len);
+-+			}
+-+			len >>= 1; /*(repurpose len to prime_len)*/
+-+		}
+-+		else if (key[0] == 0x02 || key[0] == 0x03) { /* (inc_y == 0) */
+-+			--len; /*(repurpose len to prime_len)*/
+-+
+-+			/* mbedtls_ecp_point_read_binary() does not currently support
+-+			 * MBEDTLS_ECP_PF_COMPRESSED format (buf[1] = 0x02 or 0x03)
+-+			 * (returns MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE) */
+-+
+-+			/* derive y, amend buf[] with y for UNCOMPRESSED format */
+-+			if (sizeof(buf)-2 < len*2 || len == 0)
+-+				return NULL;
+-+			buf[0] = (u8)(1+len*2);
+-+			buf[1] = 0x04;
+-+			mbedtls_mpi bn;
+-+			mbedtls_mpi_init(&bn);
+-+			int ret = mbedtls_mpi_read_binary(&bn, key+1, len)
+-+			       || crypto_mbedtls_short_weierstrass_derive_y(grp, &bn,
+-+			                                                    key[0] & 1)
+-+			       || mbedtls_mpi_write_binary(&bn, buf+2+len, len);
+-+			mbedtls_mpi_free(&bn);
+-+			if (ret != 0)
+-+				return NULL;
+-+		}
+-+
+-+		if (key[0] == 0) /*(repurpose len to prime_len)*/
+-+			len = CRYPTO_EC_plen(grp);
+-+
+-+		if (mbedtls_ecdh_read_public(&ecdh->ctx, buf, buf[0]+1))
+-+			return NULL;
+-+	}
+-+  #endif
+-+  #if defined(MBEDTLS_ECP_MONTGOMERY_ENABLED)
+-+	if (mbedtls_ecp_get_type(grp) == MBEDTLS_ECP_TYPE_MONTGOMERY) {
+-+		if (mbedtls_ecdh_read_public(&ecdh->ctx, key, len))
+-+			return NULL;
+-+	}
+-+  #endif
+-+
+-+	struct wpabuf *buf = wpabuf_alloc(len);
+-+	if (buf == NULL)
+-+		return NULL;
+-+
+-+	if (mbedtls_ecdh_calc_secret(&ecdh->ctx, &len,
+-+	                             wpabuf_mhead(buf), len,
+-+	                             mbedtls_ctr_drbg_random,
+-+	                             crypto_mbedtls_ctr_drbg()) == 0) {
+-+		wpabuf_put(buf, len);
+-+		return buf;
+-+	}
+-+
+-+	wpabuf_clear_free(buf);
+-+	return NULL;
+-+}
+-+
+-+void crypto_ecdh_deinit(struct crypto_ecdh *ecdh)
+-+{
+-+	if (ecdh == NULL)
+-+		return;
+-+	mbedtls_ecp_point_free(&ecdh->Q);
+-+	mbedtls_ecp_group_free(&ecdh->grp);
+-+	mbedtls_ecdh_free(&ecdh->ctx);
+-+	os_free(ecdh);
+-+}
+-+
+-+size_t crypto_ecdh_prime_len(struct crypto_ecdh *ecdh)
+-+{
+-+	return CRYPTO_EC_plen(&ecdh->grp);
+-+}
+-+
+-+#endif /* CRYPTO_MBEDTLS_CRYPTO_ECDH */
+-+
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_EC
+-+
+-+#include <mbedtls/ecp.h>
+-+
+-+struct crypto_ec *crypto_ec_init(int group)
+-+{
+-+	mbedtls_ecp_group_id grp_id =
+-+	  crypto_mbedtls_ecp_group_id_from_ike_id(group);
+-+	if (grp_id == MBEDTLS_ECP_DP_NONE)
+-+		return NULL;
+-+	mbedtls_ecp_group *e = os_malloc(sizeof(*e));
+-+	if (e == NULL)
+-+		return NULL;
+-+	mbedtls_ecp_group_init(e);
+-+	if (mbedtls_ecp_group_load(e, grp_id) == 0)
+-+		return (struct crypto_ec *)e;
+-+
+-+	mbedtls_ecp_group_free(e);
+-+	os_free(e);
+-+	return NULL;
+-+}
+-+
+-+void crypto_ec_deinit(struct crypto_ec *e)
+-+{
+-+	mbedtls_ecp_group_free((mbedtls_ecp_group *)e);
+-+	os_free(e);
+-+}
+-+
+-+size_t crypto_ec_prime_len(struct crypto_ec *e)
+-+{
+-+	return CRYPTO_EC_plen(e);
+-+}
+-+
+-+size_t crypto_ec_prime_len_bits(struct crypto_ec *e)
+-+{
+-+	return CRYPTO_EC_pbits(e);
+-+}
+-+
+-+size_t crypto_ec_order_len(struct crypto_ec *e)
+-+{
+-+	return (mbedtls_mpi_bitlen(CRYPTO_EC_N(e)) + 7) / 8;
+-+}
+-+
+-+const struct crypto_bignum *crypto_ec_get_prime(struct crypto_ec *e)
+-+{
+-+	return (const struct crypto_bignum *)CRYPTO_EC_P(e);
+-+}
+-+
+-+const struct crypto_bignum *crypto_ec_get_order(struct crypto_ec *e)
+-+{
+-+	return (const struct crypto_bignum *)CRYPTO_EC_N(e);
+-+}
+-+
+-+const struct crypto_bignum *crypto_ec_get_a(struct crypto_ec *e)
+-+{
+-+	static const uint8_t secp256r1_a[] =
+-+	  {0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x01,
+-+	   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+-+	   0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,
+-+	   0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc};
+-+	static const uint8_t secp384r1_a[] =
+-+	  {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+-+	   0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+-+	   0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+-+	   0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,
+-+	   0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,
+-+	   0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xfc};
+-+	static const uint8_t secp521r1_a[] =
+-+	  {0x01,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+-+	   0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+-+	   0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+-+	   0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+-+	   0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+-+	   0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+-+	   0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+-+	   0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+-+	   0xff,0xfc};
+-+	static const uint8_t secp192r1_a[] =
+-+	  {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+-+	   0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,
+-+	   0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc};
+-+	static const uint8_t secp224r1_a[] =
+-+	  {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+-+	   0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,
+-+	   0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+-+	   0xff,0xff,0xff,0xfe};
+-+
+-+	const uint8_t *bin = NULL;
+-+	size_t len = 0;
+-+
+-+	/* (mbedtls groups matching supported sswu_curve_param() IKE groups) */
+-+	switch (((mbedtls_ecp_group *)e)->id) {
+-+  #ifdef MBEDTLS_ECP_DP_SECP256R1_ENABLED
+-+	case MBEDTLS_ECP_DP_SECP256R1:
+-+		bin = secp256r1_a;
+-+		len = sizeof(secp256r1_a);
+-+		break;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_SECP384R1_ENABLED
+-+	case MBEDTLS_ECP_DP_SECP384R1:
+-+		bin = secp384r1_a;
+-+		len = sizeof(secp384r1_a);
+-+		break;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_SECP521R1_ENABLED
+-+	case MBEDTLS_ECP_DP_SECP521R1:
+-+		bin = secp521r1_a;
+-+		len = sizeof(secp521r1_a);
+-+		break;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_SECP192R1_ENABLED
+-+	case MBEDTLS_ECP_DP_SECP192R1:
+-+		bin = secp192r1_a;
+-+		len = sizeof(secp192r1_a);
+-+		break;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_SECP224R1_ENABLED
+-+	case MBEDTLS_ECP_DP_SECP224R1:
+-+		bin = secp224r1_a;
+-+		len = sizeof(secp224r1_a);
+-+		break;
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_BP256R1_ENABLED
+-+	case MBEDTLS_ECP_DP_BP256R1:
+-+		return (const struct crypto_bignum *)CRYPTO_EC_A(e);
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_BP384R1_ENABLED
+-+	case MBEDTLS_ECP_DP_BP384R1:
+-+		return (const struct crypto_bignum *)CRYPTO_EC_A(e);
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_BP512R1_ENABLED
+-+	case MBEDTLS_ECP_DP_BP512R1:
+-+		return (const struct crypto_bignum *)CRYPTO_EC_A(e);
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_CURVE25519_ENABLED
+-+	case MBEDTLS_ECP_DP_CURVE25519:
+-+		return (const struct crypto_bignum *)CRYPTO_EC_A(e);
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_DP_CURVE448_ENABLED
+-+	case MBEDTLS_ECP_DP_CURVE448:
+-+		return (const struct crypto_bignum *)CRYPTO_EC_A(e);
+-+  #endif
+-+	default:
+-+		return NULL;
+-+	}
+-+
+-+	/*(note: not thread-safe; returns file-scoped static storage)*/
+-+	if (mbedtls_mpi_read_binary(&mpi_sw_A, bin, len) == 0)
+-+		return (const struct crypto_bignum *)&mpi_sw_A;
+-+	return NULL;
+-+}
+-+
+-+const struct crypto_bignum *crypto_ec_get_b(struct crypto_ec *e)
+-+{
+-+	return (const struct crypto_bignum *)CRYPTO_EC_B(e);
+-+}
+-+
+-+const struct crypto_ec_point * crypto_ec_get_generator(struct crypto_ec *e)
+-+{
+-+	return (const struct crypto_ec_point *)CRYPTO_EC_G(e);
+-+}
+-+
+-+struct crypto_ec_point *crypto_ec_point_init(struct crypto_ec *e)
+-+{
+-+	mbedtls_ecp_point *p = os_malloc(sizeof(*p));
+-+	if (p != NULL)
+-+		mbedtls_ecp_point_init(p);
+-+	return (struct crypto_ec_point *)p;
+-+}
+-+
+-+void crypto_ec_point_deinit(struct crypto_ec_point *p, int clear)
+-+{
+-+	mbedtls_ecp_point_free((mbedtls_ecp_point *)p);
+-+	os_free(p);
+-+}
+-+
+-+int crypto_ec_point_x(struct crypto_ec *e, const struct crypto_ec_point *p,
+-+		      struct crypto_bignum *x)
+-+{
+-+	mbedtls_mpi *px = &((mbedtls_ecp_point *)p)->MBEDTLS_PRIVATE(X);
+-+	return mbedtls_mpi_copy((mbedtls_mpi *)x, px)
+-+	  ? -1
+-+	  : 0;
+-+}
+-+
+-+int crypto_ec_point_to_bin(struct crypto_ec *e,
+-+			   const struct crypto_ec_point *point, u8 *x, u8 *y)
+-+{
+-+	/* crypto.h documents crypto_ec_point_to_bin() output is big-endian */
+-+	size_t len = CRYPTO_EC_plen(e);
+-+	if (x) {
+-+		mbedtls_mpi *px = &((mbedtls_ecp_point *)point)->MBEDTLS_PRIVATE(X);
+-+		if (mbedtls_mpi_write_binary(px, x, len))
+-+			return -1;
+-+	}
+-+	if (y) {
+-+	  #if 0 /*(should not be necessary; py mpi should be in initial state)*/
+-+	  #ifdef MBEDTLS_ECP_MONTGOMERY_ENABLED
+-+		if (mbedtls_ecp_get_type((mbedtls_ecp_group *)e)
+-+		    == MBEDTLS_ECP_TYPE_MONTGOMERY) {
+-+			os_memset(y, 0, len);
+-+			return 0;
+-+		}
+-+	  #endif
+-+	  #endif
+-+		mbedtls_mpi *py = &((mbedtls_ecp_point *)point)->MBEDTLS_PRIVATE(Y);
+-+		if (mbedtls_mpi_write_binary(py, y, len))
+-+			return -1;
+-+	}
+-+	return 0;
+-+}
+-+
+-+struct crypto_ec_point * crypto_ec_point_from_bin(struct crypto_ec *e,
+-+						  const u8 *val)
+-+{
+-+	size_t len = CRYPTO_EC_plen(e);
+-+	mbedtls_ecp_point *p = os_malloc(sizeof(*p));
+-+	u8 buf[1+MBEDTLS_MPI_MAX_SIZE*2];
+-+	if (p == NULL)
+-+		return NULL;
+-+	mbedtls_ecp_point_init(p);
+-+
+-+  #ifdef MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED
+-+	if (mbedtls_ecp_get_type((mbedtls_ecp_group *)e)
+-+	    == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS) {
+-+	  #if 0 /* prefer alternative to MBEDTLS_PRIVATE() access */
+-+		mbedtls_mpi *px = &((mbedtls_ecp_point *)p)->MBEDTLS_PRIVATE(X);
+-+		mbedtls_mpi *py = &((mbedtls_ecp_point *)p)->MBEDTLS_PRIVATE(Y);
+-+		mbedtls_mpi *pz = &((mbedtls_ecp_point *)p)->MBEDTLS_PRIVATE(Z);
+-+
+-+		if (mbedtls_mpi_read_binary(px, val, len) == 0
+-+		    && mbedtls_mpi_read_binary(py, val + len, len) == 0
+-+		    && mbedtls_mpi_lset(pz, 1) == 0)
+-+			return (struct crypto_ec_point *)p;
+-+	  #else
+-+		buf[0] = 0x04;
+-+		os_memcpy(buf+1, val, len*2);
+-+		if (mbedtls_ecp_point_read_binary((mbedtls_ecp_group *)e, p,
+-+		                                  buf, 1+len*2) == 0)
+-+			return (struct crypto_ec_point *)p;
+-+	  #endif
+-+	}
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_MONTGOMERY_ENABLED
+-+	if (mbedtls_ecp_get_type((mbedtls_ecp_group *)e)
+-+	    == MBEDTLS_ECP_TYPE_MONTGOMERY) {
+-+		/* crypto.h interface documents crypto_ec_point_from_bin()
+-+		 * val is length: prime_len * 2 and is big-endian
+-+		 * (Short Weierstrass is assumed by hostap)
+-+		 * Reverse to little-endian format for Montgomery */
+-+		for (unsigned int i = 0; i < len; ++i)
+-+			buf[i] = val[len-1-i];
+-+		if (mbedtls_ecp_point_read_binary((mbedtls_ecp_group *)e, p,
+-+		                                  buf, len) == 0)
+-+			return (struct crypto_ec_point *)p;
+-+	}
+-+  #endif
+-+
+-+	mbedtls_ecp_point_free(p);
+-+	os_free(p);
+-+	return NULL;
+-+}
+-+
+-+int crypto_ec_point_add(struct crypto_ec *e, const struct crypto_ec_point *a,
+-+			const struct crypto_ec_point *b,
+-+			struct crypto_ec_point *c)
+-+{
+-+	/* mbedtls does not provide an mbedtls_ecp_point add function */
+-+	mbedtls_mpi one;
+-+	mbedtls_mpi_init(&one);
+-+	int ret = mbedtls_mpi_lset(&one, 1)
+-+	       || mbedtls_ecp_muladd(
+-+			(mbedtls_ecp_group *)e, (mbedtls_ecp_point *)c,
+-+			&one, (const mbedtls_ecp_point *)a,
+-+			&one, (const mbedtls_ecp_point *)b) ? -1 : 0;
+-+	mbedtls_mpi_free(&one);
+-+	return ret;
+-+}
+-+
+-+int crypto_ec_point_mul(struct crypto_ec *e, const struct crypto_ec_point *p,
+-+			const struct crypto_bignum *b,
+-+			struct crypto_ec_point *res)
+-+{
+-+	return mbedtls_ecp_mul(
+-+		(mbedtls_ecp_group *)e, (mbedtls_ecp_point *)res,
+-+		(const mbedtls_mpi *)b, (const mbedtls_ecp_point *)p,
+-+		mbedtls_ctr_drbg_random, crypto_mbedtls_ctr_drbg()) ? -1 : 0;
+-+}
+-+
+-+int crypto_ec_point_invert(struct crypto_ec *e, struct crypto_ec_point *p)
+-+{
+-+	if (mbedtls_ecp_get_type((mbedtls_ecp_group *)e)
+-+	    == MBEDTLS_ECP_TYPE_MONTGOMERY) {
+-+		/* e.g. MBEDTLS_ECP_DP_CURVE25519 and MBEDTLS_ECP_DP_CURVE448 */
+-+		wpa_printf(MSG_ERROR,
+-+		           "%s not implemented for Montgomery curves",__func__);
+-+		return -1;
+-+	}
+-+
+-+	/* mbedtls does not provide an mbedtls_ecp_point invert function */
+-+	/* below works for Short Weierstrass; incorrect for Montgomery curves */
+-+	mbedtls_mpi *py = &((mbedtls_ecp_point *)p)->MBEDTLS_PRIVATE(Y);
+-+	return mbedtls_ecp_is_zero((mbedtls_ecp_point *)p) /*point at infinity*/
+-+	    || mbedtls_mpi_cmp_int(py, 0) == 0      /*point is its own inverse*/
+-+	    || mbedtls_mpi_sub_abs(py, CRYPTO_EC_P(e), py) == 0 ? 0 : -1;
+-+}
+-+
+-+#ifdef MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED
+-+static int
+-+crypto_ec_point_y_sqr_weierstrass(mbedtls_ecp_group *e, const mbedtls_mpi *x,
+-+                                  mbedtls_mpi *y2)
+-+{
+-+	/* MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS  y^2 = x^3 + a x + b    */
+-+
+-+	/* Short Weierstrass elliptic curve group w/o A set treated as A = -3 */
+-+	/* Attempt to match mbedtls/library/ecp.c:ecp_check_pubkey_sw() behavior
+-+	 * and elsewhere in mbedtls/library/ecp.c where if A is not set, it is
+-+	 * treated as if A = -3. */
+-+
+-+  #if 0
+-+	/* y^2 = x^3 + ax + b */
+-+	mbedtls_mpi *A = &e->A;
+-+	mbedtls_mpi t, A_neg3;
+-+	if (&e->A.p == NULL) {
+-+		mbedtls_mpi_init(&A_neg3);
+-+		if (mbedtls_mpi_lset(&A_neg3, -3) != 0) {
+-+			mbedtls_mpi_free(&A_neg3);
+-+			return -1;
+-+		}
+-+		A = &A_neg3;
+-+	}
+-+	mbedtls_mpi_init(&t);
+-+	int ret = /* x^3 */
+-+	          mbedtls_mpi_lset(&t, 3)
+-+	       || mbedtls_mpi_exp_mod(y2,  x, &t, &e->P, NULL)
+-+		  /* ax */
+-+	       || mbedtls_mpi_mul_mpi(y2, y2, A)
+-+	       || mbedtls_mpi_mod_mpi(&t, &t, &e->P)
+-+		  /* ax + b */
+-+	       || mbedtls_mpi_add_mpi(&t, &t, &e->B)
+-+	       || mbedtls_mpi_mod_mpi(&t, &t, &e->P)
+-+		  /* x^3 + ax + b */
+-+	       || mbedtls_mpi_add_mpi(&t, &t, y2) /* ax + b + x^3 */
+-+	       || mbedtls_mpi_mod_mpi(y2, &t, &e->P);
+-+	mbedtls_mpi_free(&t);
+-+	if (A == &A_neg3)
+-+		mbedtls_mpi_free(&A_neg3);
+-+	return ret; /* 0: success, non-zero: failure */
+-+  #else
+-+	/* y^2 = x^3 + ax + b = (x^2 + a)x + b */
+-+	return    /* x^2 */
+-+	          mbedtls_mpi_mul_mpi(y2,  x, x)
+-+	       || mbedtls_mpi_mod_mpi(y2, y2, &e->P)
+-+		  /* x^2 + a */
+-+	       || (e->A.MBEDTLS_PRIVATE(p)
+-+	           ? mbedtls_mpi_add_mpi(y2, y2, &e->A)
+-+	           : mbedtls_mpi_sub_int(y2, y2, 3))
+-+	       || mbedtls_mpi_mod_mpi(y2, y2, &e->P)
+-+		  /* (x^2 + a)x */
+-+	       || mbedtls_mpi_mul_mpi(y2, y2, x)
+-+	       || mbedtls_mpi_mod_mpi(y2, y2, &e->P)
+-+		  /* (x^2 + a)x + b */
+-+	       || mbedtls_mpi_add_mpi(y2, y2, &e->B)
+-+	       || mbedtls_mpi_mod_mpi(y2, y2, &e->P);
+-+  #endif
+-+}
+-+#endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */
+-+
+-+#if 0 /* not used by hostap */
+-+#ifdef MBEDTLS_ECP_MONTGOMERY_ENABLED
+-+static int
+-+crypto_ec_point_y_sqr_montgomery(mbedtls_ecp_group *e, const mbedtls_mpi *x,
+-+                                 mbedtls_mpi *y2)
+-+{
+-+	/* XXX: !!! must be reviewed and audited for correctness !!! */
+-+
+-+	/* MBEDTLS_ECP_TYPE_MONTGOMERY         y^2 = x^3 + a x^2 + x  */
+-+
+-+	/* y^2 = x^3 + a x^2 + x = (x + a)x^2 + x */
+-+	mbedtls_mpi x2;
+-+	mbedtls_mpi_init(&x2);
+-+	int ret = /* x^2 */
+-+	          mbedtls_mpi_mul_mpi(&x2, x, x)
+-+	       || mbedtls_mpi_mod_mpi(&x2, &x2, &e->P)
+-+		  /* x + a */
+-+	       || mbedtls_mpi_add_mpi(y2,  x, &e->A)
+-+	       || mbedtls_mpi_mod_mpi(y2, y2, &e->P)
+-+		  /* (x + a)x^2 */
+-+	       || mbedtls_mpi_mul_mpi(y2, y2, &x2)
+-+	       || mbedtls_mpi_mod_mpi(y2, y2, &e->P)
+-+		  /* (x + a)x^2 + x */
+-+	       || mbedtls_mpi_add_mpi(y2, y2, x)
+-+	       || mbedtls_mpi_mod_mpi(y2, y2, &e->P);
+-+	mbedtls_mpi_free(&x2);
+-+	return ret; /* 0: success, non-zero: failure */
+-+}
+-+#endif /* MBEDTLS_ECP_MONTGOMERY_ENABLED */
+-+#endif
+-+
+-+struct crypto_bignum *
+-+crypto_ec_point_compute_y_sqr(struct crypto_ec *e,
+-+			      const struct crypto_bignum *x)
+-+{
+-+	mbedtls_mpi *y2 = os_malloc(sizeof(*y2));
+-+	if (y2 == NULL)
+-+		return NULL;
+-+	mbedtls_mpi_init(y2);
+-+
+-+  #ifdef MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED
+-+	if (mbedtls_ecp_get_type((mbedtls_ecp_group *)e)
+-+	      == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS
+-+	    && crypto_ec_point_y_sqr_weierstrass((mbedtls_ecp_group *)e,
+-+	                                         (const mbedtls_mpi *)x,
+-+	                                         y2) == 0)
+-+		return (struct crypto_bignum *)y2;
+-+  #endif
+-+  #if 0 /* not used by hostap */
+-+  #ifdef MBEDTLS_ECP_MONTGOMERY_ENABLED
+-+	if (mbedtls_ecp_get_type((mbedtls_ecp_group *)e)
+-+	      == MBEDTLS_ECP_TYPE_MONTGOMERY
+-+	    && crypto_ec_point_y_sqr_montgomery((mbedtls_ecp_group *)e,
+-+	                                        (const mbedtls_mpi *)x,
+-+	                                        y2) == 0)
+-+		return (struct crypto_bignum *)y2;
+-+  #endif
+-+  #endif
+-+
+-+	mbedtls_mpi_free(y2);
+-+	os_free(y2);
+-+	return NULL;
+-+}
+-+
+-+int crypto_ec_point_is_at_infinity(struct crypto_ec *e,
+-+				   const struct crypto_ec_point *p)
+-+{
+-+	return mbedtls_ecp_is_zero((mbedtls_ecp_point *)p);
+-+}
+-+
+-+int crypto_ec_point_is_on_curve(struct crypto_ec *e,
+-+				const struct crypto_ec_point *p)
+-+{
+-+  #if 1
+-+	return mbedtls_ecp_check_pubkey((const mbedtls_ecp_group *)e,
+-+	                                (const mbedtls_ecp_point *)p) == 0;
+-+  #else
+-+	/* compute y^2 mod P and compare to y^2 mod P */
+-+	/*(ref: src/eap_common/eap_pwd_common.c:compute_password_element())*/
+-+	const mbedtls_mpi *px = &((const mbedtls_ecp_point *)p)->MBEDTLS_PRIVATE(X);
+-+	mbedtls_mpi *cy2 = (mbedtls_mpi *)
+-+	  crypto_ec_point_compute_y_sqr(e, (const struct crypto_bignum *)px);
+-+	if (cy2 == NULL)
+-+		return 0;
+-+
+-+	mbedtls_mpi y2;
+-+	mbedtls_mpi_init(&y2);
+-+	const mbedtls_mpi *py = &((const mbedtls_ecp_point *)p)->MBEDTLS_PRIVATE(Y);
+-+	int is_on_curve = mbedtls_mpi_mul_mpi(&y2, py, py) /* y^2 mod P */
+-+	               || mbedtls_mpi_mod_mpi(&y2, &y2, CRYPTO_EC_P(e))
+-+	               || mbedtls_mpi_cmp_mpi(&y2, cy2) != 0 ? 0 : 1;
+-+
+-+	mbedtls_mpi_free(&y2);
+-+	mbedtls_mpi_free(cy2);
+-+	os_free(cy2);
+-+	return is_on_curve;
+-+  #endif
+-+}
+-+
+-+int crypto_ec_point_cmp(const struct crypto_ec *e,
+-+			const struct crypto_ec_point *a,
+-+			const struct crypto_ec_point *b)
+-+{
+-+	return mbedtls_ecp_point_cmp((const mbedtls_ecp_point *)a,
+-+	                             (const mbedtls_ecp_point *)b);
+-+}
+-+
+-+#if !defined(CONFIG_NO_STDOUT_DEBUG)
+-+void crypto_ec_point_debug_print(const struct crypto_ec *e,
+-+				 const struct crypto_ec_point *p,
+-+				 const char *title)
+-+{
+-+	u8 x[MBEDTLS_MPI_MAX_SIZE];
+-+	u8 y[MBEDTLS_MPI_MAX_SIZE];
+-+	size_t len = CRYPTO_EC_plen(e);
+-+	/* crypto_ec_point_to_bin ought to take (const struct crypto_ec *e) */
+-+	struct crypto_ec *ee;
+-+	*(const struct crypto_ec **)&ee = e; /*(cast away const)*/
+-+	if (crypto_ec_point_to_bin(ee, p, x, y) == 0) {
+-+		if (title)
+-+			wpa_printf(MSG_DEBUG, "%s", title);
+-+		wpa_hexdump(MSG_DEBUG, "x:", x, len);
+-+		wpa_hexdump(MSG_DEBUG, "y:", y, len);
+-+	}
+-+}
+-+#endif
+-+
+-+
+-+struct crypto_ec_key * crypto_ec_key_parse_priv(const u8 *der, size_t der_len)
+-+{
+-+	mbedtls_pk_context *ctx = os_malloc(sizeof(*ctx));
+-+	if (ctx == NULL)
+-+		return NULL;
+-+	mbedtls_pk_init(ctx);
+-+  #if MBEDTLS_VERSION_NUMBER < 0x03000000 /* mbedtls 3.0.0 */
+-+	if (mbedtls_pk_parse_key(ctx, der, der_len, NULL, 0) == 0)
+-+  #else
+-+	if (mbedtls_pk_parse_key(ctx, der, der_len, NULL, 0,
+-+	                         mbedtls_ctr_drbg_random,
+-+	                         crypto_mbedtls_ctr_drbg()) == 0)
+-+  #endif
+-+		return (struct crypto_ec_key *)ctx;
+-+
+-+	mbedtls_pk_free(ctx);
+-+	os_free(ctx);
+-+	return NULL;
+-+}
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_HPKE
+-+#ifdef CONFIG_MODULE_TESTS
+-+/*(for crypto_module_tests.c)*/
+-+struct crypto_ec_key * crypto_ec_key_set_priv(int group,
+-+					      const u8 *raw, size_t raw_len)
+-+{
+-+	mbedtls_ecp_group_id grp_id =
+-+	  crypto_mbedtls_ecp_group_id_from_ike_id(group);
+-+	if (grp_id == MBEDTLS_ECP_DP_NONE)
+-+		return NULL;
+-+	const mbedtls_pk_info_t *pk_info =
+-+	  mbedtls_pk_info_from_type(MBEDTLS_PK_ECKEY);
+-+	if (pk_info == NULL)
+-+		return NULL;
+-+	mbedtls_pk_context *ctx = os_malloc(sizeof(*ctx));
+-+	if (ctx == NULL)
+-+		return NULL;
+-+	mbedtls_pk_init(ctx);
+-+	if (mbedtls_pk_setup(ctx, pk_info) == 0
+-+	    && mbedtls_ecp_read_key(grp_id,mbedtls_pk_ec(*ctx),raw,raw_len) == 0) {
+-+		return (struct crypto_ec_key *)ctx;
+-+	}
+-+
+-+	mbedtls_pk_free(ctx);
+-+	os_free(ctx);
+-+	return NULL;
+-+}
+-+#endif
+-+#endif
+-+
+-+#include <mbedtls/error.h>
+-+#include <mbedtls/oid.h>
+-+static int crypto_mbedtls_pk_parse_subpubkey_compressed(mbedtls_pk_context *ctx, const u8 *der, size_t der_len)
+-+{
+-+    /* The following is modified from:
+-+     *   mbedtls/library/pkparse.c:mbedtls_pk_parse_subpubkey()
+-+     *   mbedtls/library/pkparse.c:pk_get_pk_alg()
+-+     *   mbedtls/library/pkparse.c:pk_use_ecparams()
+-+     */
+-+    mbedtls_pk_type_t pk_alg = MBEDTLS_PK_NONE;
+-+    const mbedtls_pk_info_t *pk_info;
+-+    int ret;
+-+    size_t len;
+-+    const unsigned char *end = der+der_len;
+-+    unsigned char *p;
+-+    *(const unsigned char **)&p = der;
+-+
+-+    if( ( ret = mbedtls_asn1_get_tag( &p, end, &len,
+-+                    MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 )
+-+    {
+-+        return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT, ret ) );
+-+    }
+-+
+-+    end = p + len;
+-+
+-+    /*
+-+    if( ( ret = pk_get_pk_alg( &p, end, &pk_alg, &alg_params ) ) != 0 )
+-+        return( ret );
+-+    */
+-+    mbedtls_asn1_buf alg_oid, params;
+-+    memset( &params, 0, sizeof(mbedtls_asn1_buf) );
+-+    if( ( ret = mbedtls_asn1_get_alg( &p, end, &alg_oid, &params ) ) != 0 )
+-+        return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_PK_INVALID_ALG, ret ) );
+-+    if( mbedtls_oid_get_pk_alg( &alg_oid, &pk_alg ) != 0 )
+-+        return( MBEDTLS_ERR_PK_UNKNOWN_PK_ALG );
+-+
+-+    if( ( ret = mbedtls_asn1_get_bitstring_null( &p, end, &len ) ) != 0 )
+-+        return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_PK_INVALID_PUBKEY, ret ) );
+-+
+-+    if( p + len != end )
+-+        return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_PK_INVALID_PUBKEY,
+-+                MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ) );
+-+
+-+    if( ( pk_info = mbedtls_pk_info_from_type( pk_alg ) ) == NULL )
+-+        return( MBEDTLS_ERR_PK_UNKNOWN_PK_ALG );
+-+
+-+    if( ( ret = mbedtls_pk_setup( ctx, pk_info ) ) != 0 )
+-+        return( ret );
+-+
+-+    /* assume mbedtls_pk_parse_subpubkey(&der, der+der_len, ctx)
+-+     * has already run with ctx initialized up to pk_get_ecpubkey(),
+-+     * and pk_get_ecpubkey() has returned MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE
+-+     *
+-+     * mbedtls mbedtls_ecp_point_read_binary()
+-+     * does not handle point in COMPRESSED format
+-+     *
+-+     * (validate assumption that algorithm is EC) */
+-+    mbedtls_ecp_keypair *ecp_kp = mbedtls_pk_ec(*ctx);
+-+    if (ecp_kp == NULL)
+-+        return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE );
+-+    mbedtls_ecp_group *ecp_kp_grp = &ecp_kp->MBEDTLS_PRIVATE(grp);
+-+    mbedtls_ecp_point *ecp_kp_Q = &ecp_kp->MBEDTLS_PRIVATE(Q);
+-+    mbedtls_ecp_group_id grp_id;
+-+
+-+
+-+    /* mbedtls/library/pkparse.c:pk_use_ecparams() */
+-+
+-+    if( params.tag == MBEDTLS_ASN1_OID )
+-+    {
+-+        if( mbedtls_oid_get_ec_grp( &params, &grp_id ) != 0 )
+-+            return( MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE );
+-+    }
+-+    else
+-+    {
+-+#if defined(MBEDTLS_PK_PARSE_EC_EXTENDED)
+-+        /*(large code block not copied from mbedtls; unsupported)*/
+-+      #if 0
+-+        if( ( ret = pk_group_id_from_specified( &params, &grp_id ) ) != 0 )
+-+            return( ret );
+-+      #endif
+-+#endif
+-+        return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT );
+-+    }
+-+
+-+    /*
+-+     * grp may already be initialized; if so, make sure IDs match
+-+     */
+-+    if( ecp_kp_grp->id != MBEDTLS_ECP_DP_NONE && ecp_kp_grp->id != grp_id )
+-+        return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT );
+-+
+-+    if( ( ret = mbedtls_ecp_group_load( ecp_kp_grp, grp_id ) ) != 0 )
+-+        return( ret );
+-+
+-+
+-+    /* (validate assumption that EC point is in COMPRESSED format) */
+-+    len = CRYPTO_EC_plen(ecp_kp_grp);
+-+    if( mbedtls_ecp_get_type(ecp_kp_grp) != MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS
+-+        || (end - p) != 1+len
+-+        || (*p != 0x02 && *p != 0x03) )
+-+        return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE );
+-+
+-+    /* Instead of calling mbedtls/library/pkparse.c:pk_get_ecpubkey() to call
+-+     * mbedtls_ecp_point_read_binary(), manually parse point into ecp_kp_Q */
+-+    mbedtls_mpi *X = &ecp_kp_Q->MBEDTLS_PRIVATE(X);
+-+    mbedtls_mpi *Y = &ecp_kp_Q->MBEDTLS_PRIVATE(Y);
+-+    mbedtls_mpi *Z = &ecp_kp_Q->MBEDTLS_PRIVATE(Z);
+-+    ret = mbedtls_mpi_lset(Z, 1);
+-+    if (ret != 0)
+-+        return( ret );
+-+    ret = mbedtls_mpi_read_binary(X, p+1, len);
+-+    if (ret != 0)
+-+        return( ret );
+-+    /* derive Y
+-+     * (similar derivation of Y in crypto_mbedtls.c:crypto_ecdh_set_peerkey())*/
+-+    ret = mbedtls_mpi_copy(Y, X) /*(Y is used as input and output obj below)*/
+-+       || crypto_mbedtls_short_weierstrass_derive_y(ecp_kp_grp, Y, (*p & 1));
+-+    if (ret != 0)
+-+        return( ret );
+-+
+-+    return mbedtls_ecp_check_pubkey( ecp_kp_grp, ecp_kp_Q );
+-+}
+-+
+-+struct crypto_ec_key * crypto_ec_key_parse_pub(const u8 *der, size_t der_len)
+-+{
+-+	mbedtls_pk_context *ctx = os_malloc(sizeof(*ctx));
+-+	if (ctx == NULL)
+-+		return NULL;
+-+	mbedtls_pk_init(ctx);
+-+	/*int rc = mbedtls_pk_parse_subpubkey(&der, der+der_len, ctx);*/
+-+	int rc = mbedtls_pk_parse_public_key(ctx, der, der_len);
+-+	if (rc == 0)
+-+		return (struct crypto_ec_key *)ctx;
+-+	else if (rc == MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE) {
+-+		/* mbedtls mbedtls_ecp_point_read_binary()
+-+		 * does not handle point in COMPRESSED format; parse internally */
+-+		rc = crypto_mbedtls_pk_parse_subpubkey_compressed(ctx,der,der_len);
+-+		if (rc == 0)
+-+			return (struct crypto_ec_key *)ctx;
+-+	}
+-+
+-+	mbedtls_pk_free(ctx);
+-+	os_free(ctx);
+-+	return NULL;
+-+}
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_EC_DPP
+-+
+-+static struct crypto_ec_key *
+-+crypto_ec_key_set_pub_point_for_group(mbedtls_ecp_group_id grp_id,
+-+                                      const mbedtls_ecp_point *pub,
+-+                                      const u8 *buf, size_t len)
+-+{
+-+	const mbedtls_pk_info_t *pk_info =
+-+	  mbedtls_pk_info_from_type(MBEDTLS_PK_ECKEY);
+-+	if (pk_info == NULL)
+-+		return NULL;
+-+	mbedtls_pk_context *ctx = os_malloc(sizeof(*ctx));
+-+	if (ctx == NULL)
+-+		return NULL;
+-+	mbedtls_pk_init(ctx);
+-+	if (mbedtls_pk_setup(ctx, pk_info) == 0) {
+-+		/* (Is private key generation necessary for callers?)
+-+		 * alt: gen key then overwrite Q
+-+		 *   mbedtls_ecp_gen_key(grp_id, ecp_kp,
+-+	         *                       mbedtls_ctr_drbg_random,
+-+	         *                       crypto_mbedtls_ctr_drbg()) == 0
+-+	         */
+-+		mbedtls_ecp_keypair *ecp_kp = mbedtls_pk_ec(*ctx);
+-+		mbedtls_ecp_group *ecp_kp_grp = &ecp_kp->MBEDTLS_PRIVATE(grp);
+-+		mbedtls_ecp_point *ecp_kp_Q = &ecp_kp->MBEDTLS_PRIVATE(Q);
+-+		mbedtls_mpi *ecp_kp_d = &ecp_kp->MBEDTLS_PRIVATE(d);
+-+		if (mbedtls_ecp_group_load(ecp_kp_grp, grp_id) == 0
+-+		    && (pub
+-+		         ? mbedtls_ecp_copy(ecp_kp_Q, pub) == 0
+-+		         : mbedtls_ecp_point_read_binary(ecp_kp_grp, ecp_kp_Q,
+-+		                                         buf, len) == 0)
+-+		    && mbedtls_ecp_gen_privkey(ecp_kp_grp, ecp_kp_d,
+-+		                               mbedtls_ctr_drbg_random,
+-+		                               crypto_mbedtls_ctr_drbg()) == 0){
+-+			return (struct crypto_ec_key *)ctx;
+-+		}
+-+	}
+-+
+-+	mbedtls_pk_free(ctx);
+-+	os_free(ctx);
+-+	return NULL;
+-+}
+-+
+-+struct crypto_ec_key * crypto_ec_key_set_pub(int group, const u8 *x,
+-+					     const u8 *y, size_t len)
+-+{
+-+	mbedtls_ecp_group_id grp_id =
+-+	  crypto_mbedtls_ecp_group_id_from_ike_id(group);
+-+	if (grp_id == MBEDTLS_ECP_DP_NONE)
+-+		return NULL;
+-+	if (len > MBEDTLS_MPI_MAX_SIZE)
+-+		return NULL;
+-+	u8 buf[1+MBEDTLS_MPI_MAX_SIZE*2];
+-+	buf[0] = 0x04; /* assume x,y for Short Weierstrass */
+-+	os_memcpy(buf+1, x, len);
+-+	os_memcpy(buf+1+len, y, len);
+-+
+-+	return crypto_ec_key_set_pub_point_for_group(grp_id,NULL,buf,1+len*2);
+-+}
+-+
+-+struct crypto_ec_key *
+-+crypto_ec_key_set_pub_point(struct crypto_ec *e,
+-+			    const struct crypto_ec_point *pub)
+-+{
+-+	mbedtls_ecp_group_id grp_id = ((mbedtls_ecp_group *)e)->id;
+-+	mbedtls_ecp_point *p = (mbedtls_ecp_point *)pub;
+-+	return crypto_ec_key_set_pub_point_for_group(grp_id, p, NULL, 0);
+-+}
+-+
+-+
+-+struct crypto_ec_key * crypto_ec_key_gen(int group)
+-+{
+-+	mbedtls_pk_context *ctx = os_malloc(sizeof(*ctx));
+-+	if (ctx == NULL)
+-+		return NULL;
+-+	mbedtls_pk_init(ctx);
+-+	if (crypto_mbedtls_keypair_gen(group, ctx) == 0)
+-+		return (struct crypto_ec_key *)ctx;
+-+	mbedtls_pk_free(ctx);
+-+	os_free(ctx);
+-+	return NULL;
+-+}
+-+
+-+#endif /* CRYPTO_MBEDTLS_CRYPTO_EC_DPP */
+-+
+-+void crypto_ec_key_deinit(struct crypto_ec_key *key)
+-+{
+-+	mbedtls_pk_free((mbedtls_pk_context *)key);
+-+	os_free(key);
+-+}
+-+
+-+struct wpabuf * crypto_ec_key_get_subject_public_key(struct crypto_ec_key *key)
+-+{
+-+	/* (similar to crypto_ec_key_get_pubkey_point(),
+-+	 *  but compressed point format and ASN.1 DER wrapping)*/
+-+#ifndef MBEDTLS_PK_ECP_PUB_DER_MAX_BYTES /*(mbedtls/library/pkwrite.h)*/
+-+#define MBEDTLS_PK_ECP_PUB_DER_MAX_BYTES    ( 30 + 2 * MBEDTLS_ECP_MAX_BYTES )
+-+#endif
+-+	unsigned char buf[MBEDTLS_PK_ECP_PUB_DER_MAX_BYTES];
+-+	int len = mbedtls_pk_write_pubkey_der((mbedtls_pk_context *)key,
+-+	                                      buf, sizeof(buf));
+-+	if (len < 0)
+-+		return NULL;
+-+	/*  Note: data is written at the end of the buffer! Use the
+-+	 *        return value to determine where you should start
+-+	 *        using the buffer */
+-+	unsigned char *p = buf+sizeof(buf)-len;
+-+
+-+  #ifdef MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED
+-+	mbedtls_ecp_keypair *ecp_kp = mbedtls_pk_ec(*(mbedtls_pk_context *)key);
+-+	if (ecp_kp == NULL)
+-+		return NULL;
+-+	mbedtls_ecp_group *grp = &ecp_kp->MBEDTLS_PRIVATE(grp);
+-+	/*  Note: sae_pk.c expects pubkey point in compressed format,
+-+	 *        but mbedtls_pk_write_pubkey_der() writes uncompressed format.
+-+	 *        Manually translate format and update lengths in DER format */
+-+	if (mbedtls_ecp_get_type(grp) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS) {
+-+		unsigned char *end = buf+sizeof(buf);
+-+		size_t n;
+-+		/* SubjectPublicKeyInfo SEQUENCE */
+-+		mbedtls_asn1_get_tag(&p, end, &n,
+-+		    MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE);
+-+		/* algorithm AlgorithmIdentifier */
+-+		unsigned char *a = p;
+-+		size_t alen;
+-+		mbedtls_asn1_get_tag(&p, end, &alen,
+-+		    MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE);
+-+		p += alen;
+-+		alen = (size_t)(p - a);
+-+		/* subjectPublicKey BIT STRING */
+-+		mbedtls_asn1_get_tag(&p, end, &n, MBEDTLS_ASN1_BIT_STRING);
+-+		/* rewrite into compressed point format and rebuild ASN.1 */
+-+		p[1] = (buf[sizeof(buf)-1] & 1) ? 0x03 : 0x02;
+-+		n = 1 + 1 + (n-2)/2;
+-+		len = mbedtls_asn1_write_len(&p, buf, n) + (int)n;
+-+		len += mbedtls_asn1_write_tag(&p, buf, MBEDTLS_ASN1_BIT_STRING);
+-+		os_memmove(p-alen, a, alen);
+-+		len += alen;
+-+		p -= alen;
+-+		len += mbedtls_asn1_write_len(&p, buf, (size_t)len);
+-+		len += mbedtls_asn1_write_tag(&p, buf,
+-+		    MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE);
+-+	}
+-+  #endif
+-+	return wpabuf_alloc_copy(p, (size_t)len);
+-+}
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_EC_DPP
+-+
+-+struct wpabuf * crypto_ec_key_get_ecprivate_key(struct crypto_ec_key *key,
+-+						bool include_pub)
+-+{
+-+#ifndef MBEDTLS_PK_ECP_PRV_DER_MAX_BYTES /*(mbedtls/library/pkwrite.h)*/
+-+#define MBEDTLS_PK_ECP_PRV_DER_MAX_BYTES    ( 29 + 3 * MBEDTLS_ECP_MAX_BYTES )
+-+#endif
+-+	unsigned char priv[MBEDTLS_PK_ECP_PRV_DER_MAX_BYTES];
+-+	int privlen = mbedtls_pk_write_key_der((mbedtls_pk_context *)key,
+-+	                                       priv, sizeof(priv));
+-+	if (privlen < 0)
+-+		return NULL;
+-+
+-+	struct wpabuf *wbuf;
+-+
+-+	/*  Note: data is written at the end of the buffer! Use the
+-+	 *        return value to determine where you should start
+-+	 *        using the buffer */
+-+	/* mbedtls_pk_write_key_der() includes publicKey in DER */
+-+	if (include_pub)
+-+		wbuf = wpabuf_alloc_copy(priv+sizeof(priv)-privlen, privlen);
+-+	else {
+-+		/* calculate publicKey offset and skip from end of buffer */
+-+		unsigned char *p = priv+sizeof(priv)-privlen;
+-+		unsigned char *end = priv+sizeof(priv);
+-+		size_t len;
+-+		/* ECPrivateKey SEQUENCE */
+-+		mbedtls_asn1_get_tag(&p, end, &len,
+-+		    MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE);
+-+		/* version INTEGER */
+-+		unsigned char *v = p;
+-+		mbedtls_asn1_get_tag(&p, end, &len, MBEDTLS_ASN1_INTEGER);
+-+		p += len;
+-+		/* privateKey OCTET STRING */
+-+		mbedtls_asn1_get_tag(&p, end, &len, MBEDTLS_ASN1_OCTET_STRING);
+-+		p += len;
+-+		/* parameters ECParameters */
+-+		mbedtls_asn1_get_tag(&p, end, &len,
+-+		    MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED);
+-+		p += len;
+-+
+-+		/* write new SEQUENCE header (we know that it fits in priv[]) */
+-+		len = (size_t)(p - v);
+-+		p = v;
+-+		len += mbedtls_asn1_write_len(&p, priv, len);
+-+		len += mbedtls_asn1_write_tag(&p, priv,
+-+		    MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE);
+-+		wbuf = wpabuf_alloc_copy(p, len);
+-+	}
+-+
+-+	forced_memzero(priv, sizeof(priv));
+-+	return wbuf;
+-+}
+-+
+-+struct wpabuf * crypto_ec_key_get_pubkey_point(struct crypto_ec_key *key,
+-+					       int prefix)
+-+{
+-+	/*(similarities to crypto_ecdh_get_pubkey(), but different struct)*/
+-+	mbedtls_ecp_keypair *ecp_kp = mbedtls_pk_ec(*(mbedtls_pk_context *)key);
+-+	if (ecp_kp == NULL)
+-+		return NULL;
+-+	mbedtls_ecp_group *grp = &ecp_kp->MBEDTLS_PRIVATE(grp);
+-+	size_t len = CRYPTO_EC_plen(grp);
+-+  #ifdef MBEDTLS_ECP_MONTGOMERY_ENABLED
+-+	/* len */
+-+  #endif
+-+  #ifdef MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED
+-+	if (mbedtls_ecp_get_type(grp) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS)
+-+		len = len*2+1;
+-+  #endif
+-+	struct wpabuf *buf = wpabuf_alloc(len);
+-+	if (buf == NULL)
+-+		return NULL;
+-+	mbedtls_ecp_point *ecp_kp_Q = &ecp_kp->MBEDTLS_PRIVATE(Q);
+-+	if (mbedtls_ecp_point_write_binary(grp, ecp_kp_Q,
+-+	                                   MBEDTLS_ECP_PF_UNCOMPRESSED, &len,
+-+	                                   wpabuf_mhead_u8(buf), len) == 0) {
+-+		if (!prefix) /* Remove 0x04 prefix if requested */
+-+			os_memmove(wpabuf_mhead(buf),wpabuf_mhead(buf)+1,--len);
+-+		wpabuf_put(buf, len);
+-+		return buf;
+-+	}
+-+
+-+	wpabuf_free(buf);
+-+	return NULL;
+-+}
+-+
+-+struct crypto_ec_point *
+-+crypto_ec_key_get_public_key(struct crypto_ec_key *key)
+-+{
+-+	mbedtls_ecp_keypair *ecp_kp = mbedtls_pk_ec(*(mbedtls_pk_context *)key);
+-+	if (ecp_kp == NULL)
+-+		return NULL;
+-+	mbedtls_ecp_point *p = os_malloc(sizeof(*p));
+-+	if (p != NULL) {
+-+		/*(mbedtls_ecp_export() uses &ecp_kp->MBEDTLS_PRIVATE(grp))*/
+-+		mbedtls_ecp_point_init(p);
+-+		mbedtls_ecp_point *ecp_kp_Q = &ecp_kp->MBEDTLS_PRIVATE(Q);
+-+		if (mbedtls_ecp_copy(p, ecp_kp_Q)) {
+-+			mbedtls_ecp_point_free(p);
+-+			os_free(p);
+-+			p = NULL;
+-+		}
+-+	}
+-+	return (struct crypto_ec_point *)p;
+-+}
+-+
+-+struct crypto_bignum *
+-+crypto_ec_key_get_private_key(struct crypto_ec_key *key)
+-+{
+-+	mbedtls_ecp_keypair *ecp_kp = mbedtls_pk_ec(*(mbedtls_pk_context *)key);
+-+	if (ecp_kp == NULL)
+-+		return NULL;
+-+	mbedtls_mpi *bn = os_malloc(sizeof(*bn));
+-+	if (bn) {
+-+		/*(mbedtls_ecp_export() uses &ecp_kp->MBEDTLS_PRIVATE(grp))*/
+-+		mbedtls_mpi_init(bn);
+-+		mbedtls_mpi *ecp_kp_d = &ecp_kp->MBEDTLS_PRIVATE(d);
+-+		if (mbedtls_mpi_copy(bn, ecp_kp_d)) {
+-+			mbedtls_mpi_free(bn);
+-+			os_free(bn);
+-+			bn = NULL;
+-+		}
+-+	}
+-+	return (struct crypto_bignum *)bn;
+-+}
+-+
+-+#endif /* CRYPTO_MBEDTLS_CRYPTO_EC_DPP */
+-+
+-+static mbedtls_md_type_t crypto_ec_key_sign_md(size_t len)
+-+{
+-+	/* get mbedtls_md_type_t from length of hash data to be signed */
+-+	switch (len) {
+-+	case 64: return MBEDTLS_MD_SHA512;
+-+	case 48: return MBEDTLS_MD_SHA384;
+-+	case 32: return MBEDTLS_MD_SHA256;
+-+	case 20: return MBEDTLS_MD_SHA1;
+-+	case 16: return MBEDTLS_MD_MD5;
+-+	default: return MBEDTLS_MD_NONE;
+-+	}
+-+}
+-+
+-+struct wpabuf * crypto_ec_key_sign(struct crypto_ec_key *key, const u8 *data,
+-+				   size_t len)
+-+{
+-+  #ifndef MBEDTLS_PK_SIGNATURE_MAX_SIZE /*(defined since mbedtls 2.20.0)*/
+-+  #if MBEDTLS_ECDSA_MAX_LEN > MBEDTLS_MPI_MAX_SIZE
+-+  #define MBEDTLS_PK_SIGNATURE_MAX_SIZE MBEDTLS_ECDSA_MAX_LEN
+-+  #else
+-+  #define MBEDTLS_PK_SIGNATURE_MAX_SIZE MBEDTLS_MPI_MAX_SIZE
+-+  #endif
+-+  #endif
+-+	size_t sig_len = MBEDTLS_PK_SIGNATURE_MAX_SIZE;
+-+	struct wpabuf *buf = wpabuf_alloc(sig_len);
+-+	if (buf == NULL)
+-+		return NULL;
+-+	if (mbedtls_pk_sign((mbedtls_pk_context *)key,
+-+	                    crypto_ec_key_sign_md(len), data, len,
+-+	                    wpabuf_mhead_u8(buf),
+-+  #if MBEDTLS_VERSION_NUMBER >= 0x03000000 /* mbedtls 3.0.0 */
+-+	                    sig_len,
+-+  #endif
+-+	                    &sig_len,
+-+	                    mbedtls_ctr_drbg_random,
+-+	                    crypto_mbedtls_ctr_drbg()) == 0) {
+-+		wpabuf_put(buf, sig_len);
+-+		return buf;
+-+	}
+-+
+-+	wpabuf_free(buf);
+-+	return NULL;
+-+}
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_EC_DPP
+-+struct wpabuf * crypto_ec_key_sign_r_s(struct crypto_ec_key *key,
+-+				       const u8 *data, size_t len)
+-+{
+-+	mbedtls_ecp_keypair *ecp_kp = mbedtls_pk_ec(*(mbedtls_pk_context *)key);
+-+	if (ecp_kp == NULL)
+-+		return NULL;
+-+
+-+	size_t sig_len = MBEDTLS_ECDSA_MAX_LEN;
+-+	u8 buf[MBEDTLS_ECDSA_MAX_LEN];
+-+	if (mbedtls_ecdsa_write_signature(ecp_kp, crypto_ec_key_sign_md(len),
+-+	                                  data, len, buf,
+-+  #if MBEDTLS_VERSION_NUMBER >= 0x03000000 /* mbedtls 3.0.0 */
+-+	                                  sig_len,
+-+  #endif
+-+	                                  &sig_len,
+-+	                                  mbedtls_ctr_drbg_random,
+-+	                                  crypto_mbedtls_ctr_drbg())) {
+-+		return NULL;
+-+	}
+-+
+-+	/*(mbedtls_ecdsa_write_signature() writes signature in ASN.1)*/
+-+	/* parse ASN.1 to get r and s and lengths */
+-+	u8 *p = buf, *r, *s;
+-+	u8 *end = p + sig_len;
+-+	size_t rlen, slen;
+-+	mbedtls_asn1_get_tag(&p, end, &rlen,
+-+	  MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE);
+-+	mbedtls_asn1_get_tag(&p, end, &rlen, MBEDTLS_ASN1_INTEGER);
+-+	r = p;
+-+	p += rlen;
+-+	mbedtls_asn1_get_tag(&p, end, &slen, MBEDTLS_ASN1_INTEGER);
+-+	s = p;
+-+
+-+	/* write raw r and s into out
+-+	 * (including removal of leading 0 if added for ASN.1 integer)
+-+	 * note: DPP caller expects raw r, s each padded to prime len */
+-+	mbedtls_ecp_group *ecp_kp_grp = &ecp_kp->MBEDTLS_PRIVATE(grp);
+-+	size_t plen = CRYPTO_EC_plen(ecp_kp_grp);
+-+	if (rlen > plen) {
+-+		r += (rlen - plen);
+-+		rlen = plen;
+-+	}
+-+	if (slen > plen) {
+-+		s += (slen - plen);
+-+		slen = plen;
+-+	}
+-+	struct wpabuf *out = wpabuf_alloc(plen*2);
+-+	if (out) {
+-+		wpabuf_put(out, plen*2);
+-+		p = wpabuf_mhead_u8(out);
+-+		os_memset(p, 0, plen*2);
+-+		os_memcpy(p+plen*1-rlen, r, rlen);
+-+		os_memcpy(p+plen*2-slen, s, slen);
+-+	}
+-+	return out;
+-+}
+-+#endif /* CRYPTO_MBEDTLS_CRYPTO_EC_DPP */
+-+
+-+int crypto_ec_key_verify_signature(struct crypto_ec_key *key, const u8 *data,
+-+				   size_t len, const u8 *sig, size_t sig_len)
+-+{
+-+	switch (mbedtls_pk_verify((mbedtls_pk_context *)key,
+-+	                          crypto_ec_key_sign_md(len), data, len,
+-+	                          sig, sig_len)) {
+-+	case 0:
+-+	/*case MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH:*//* XXX: allow? */
+-+		return 1;
+-+	case MBEDTLS_ERR_ECP_VERIFY_FAILED:
+-+		return 0;
+-+	default:
+-+		return -1;
+-+	}
+-+}
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_EC_DPP
+-+int crypto_ec_key_verify_signature_r_s(struct crypto_ec_key *key,
+-+				       const u8 *data, size_t len,
+-+				       const u8 *r, size_t r_len,
+-+				       const u8 *s, size_t s_len)
+-+{
+-+	/* reimplement mbedtls_ecdsa_read_signature() without encoding r and s
+-+	 * into ASN.1 just for mbedtls_ecdsa_read_signature() to decode ASN.1 */
+-+	mbedtls_ecp_keypair *ecp_kp = mbedtls_pk_ec(*(mbedtls_pk_context *)key);
+-+	if (ecp_kp == NULL)
+-+		return -1;
+-+	mbedtls_ecp_group *ecp_kp_grp = &ecp_kp->MBEDTLS_PRIVATE(grp);
+-+	mbedtls_ecp_point *ecp_kp_Q = &ecp_kp->MBEDTLS_PRIVATE(Q);
+-+
+-+	mbedtls_mpi mpi_r;
+-+	mbedtls_mpi mpi_s;
+-+	mbedtls_mpi_init(&mpi_r);
+-+	mbedtls_mpi_init(&mpi_s);
+-+	int ret = mbedtls_mpi_read_binary(&mpi_r, r, r_len)
+-+	       || mbedtls_mpi_read_binary(&mpi_s, s, s_len) ? -1 : 0;
+-+	if (ret == 0) {
+-+		ret = mbedtls_ecdsa_verify(ecp_kp_grp, data, len,
+-+		                           ecp_kp_Q, &mpi_r, &mpi_s);
+-+		ret = ret ? ret == MBEDTLS_ERR_ECP_BAD_INPUT_DATA ? 0 : -1 : 1;
+-+	}
+-+	mbedtls_mpi_free(&mpi_r);
+-+	mbedtls_mpi_free(&mpi_s);
+-+	return ret;
+-+}
+-+#endif /* CRYPTO_MBEDTLS_CRYPTO_EC_DPP */
+-+
+-+int crypto_ec_key_group(struct crypto_ec_key *key)
+-+{
+-+	mbedtls_ecp_keypair *ecp_kp = mbedtls_pk_ec(*(mbedtls_pk_context *)key);
+-+	if (ecp_kp == NULL)
+-+		return -1;
+-+	mbedtls_ecp_group *ecp_group = &ecp_kp->MBEDTLS_PRIVATE(grp);
+-+	return crypto_mbedtls_ike_id_from_ecp_group_id(ecp_group->id);
+-+}
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_EC_DPP
+-+
+-+int crypto_ec_key_cmp(struct crypto_ec_key *key1, struct crypto_ec_key *key2)
+-+{
+-+#if 0 /*(DPP is passing two public keys; unable to use pk_check_pair())*/
+-+  #if MBEDTLS_VERSION_NUMBER < 0x03000000 /* mbedtls 3.0.0 */
+-+	return mbedtls_pk_check_pair((const mbedtls_pk_context *)key1,
+-+	                             (const mbedtls_pk_context *)key2) ? -1 : 0;
+-+  #else
+-+	return mbedtls_pk_check_pair((const mbedtls_pk_context *)key1,
+-+	                             (const mbedtls_pk_context *)key2,
+-+	                             mbedtls_ctr_drbg_random,
+-+	                             crypto_mbedtls_ctr_drbg()) ? -1 : 0;
+-+  #endif
+-+#else
+-+	mbedtls_ecp_keypair *ecp_kp1=mbedtls_pk_ec(*(mbedtls_pk_context *)key1);
+-+	mbedtls_ecp_keypair *ecp_kp2=mbedtls_pk_ec(*(mbedtls_pk_context *)key2);
+-+	if (ecp_kp1 == NULL || ecp_kp2 == NULL)
+-+		return -1;
+-+	mbedtls_ecp_group *ecp_kp1_grp = &ecp_kp1->MBEDTLS_PRIVATE(grp);
+-+	mbedtls_ecp_group *ecp_kp2_grp = &ecp_kp2->MBEDTLS_PRIVATE(grp);
+-+	mbedtls_ecp_point *ecp_kp1_Q = &ecp_kp1->MBEDTLS_PRIVATE(Q);
+-+	mbedtls_ecp_point *ecp_kp2_Q = &ecp_kp2->MBEDTLS_PRIVATE(Q);
+-+	return ecp_kp1_grp->id != ecp_kp2_grp->id
+-+	    || mbedtls_ecp_point_cmp(ecp_kp1_Q, ecp_kp2_Q) ? -1 : 0;
+-+#endif
+-+}
+-+
+-+void crypto_ec_key_debug_print(const struct crypto_ec_key *key,
+-+			       const char *title)
+-+{
+-+	/* TBD: what info is desirable here and in what human readable format?*/
+-+	/*(crypto_openssl.c prints a human-readably public key and attributes)*/
+-+  #if 0
+-+	struct mbedtls_pk_debug_item debug_item;
+-+	if (mbedtls_pk_debug((const mbedtls_pk_context *)key, &debug_item))
+-+		return;
+-+	/* ... */
+-+  #endif
+-+	wpa_printf(MSG_DEBUG, "%s: %s not implemented", title, __func__);
+-+}
+-+
+-+#endif /* CRYPTO_MBEDTLS_CRYPTO_EC_DPP */
+-+
+-+#endif /* CRYPTO_MBEDTLS_CRYPTO_EC */
+-+
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_CSR
+-+
+-+#include <mbedtls/x509_csr.h>
+-+#include <mbedtls/oid.h>
+-+
+-+struct crypto_csr * crypto_csr_init(void)
+-+{
+-+	mbedtls_x509write_csr *csr = os_malloc(sizeof(*csr));
+-+	if (csr != NULL)
+-+		mbedtls_x509write_csr_init(csr);
+-+	return (struct crypto_csr *)csr;
+-+}
+-+
+-+struct crypto_csr * crypto_csr_verify(const struct wpabuf *req)
+-+{
+-+	/* future: look for alternatives to MBEDTLS_PRIVATE() access */
+-+
+-+	/* sole caller src/common/dpp_crypto.c:dpp_validate_csr()
+-+	 * uses (mbedtls_x509_csr *) to obtain CSR_ATTR_CHALLENGE_PASSWORD
+-+	 * so allocate different object (mbedtls_x509_csr *) and special-case
+-+	 * object when used in crypto_csr_get_attribute() and when free()d in
+-+	 * crypto_csr_deinit(). */
+-+
+-+	mbedtls_x509_csr *csr = os_malloc(sizeof(*csr));
+-+	if (csr == NULL)
+-+		return NULL;
+-+	mbedtls_x509_csr_init(csr);
+-+	const mbedtls_md_info_t *md_info;
+-+	unsigned char digest[MBEDTLS_MD_MAX_SIZE];
+-+	if (mbedtls_x509_csr_parse_der(csr,wpabuf_head(req),wpabuf_len(req))==0
+-+	    && (md_info=mbedtls_md_info_from_type(csr->MBEDTLS_PRIVATE(sig_md)))
+-+	       != NULL
+-+	    && mbedtls_md(md_info, csr->cri.p, csr->cri.len, digest) == 0) {
+-+		switch (mbedtls_pk_verify(&csr->pk,csr->MBEDTLS_PRIVATE(sig_md),
+-+		                          digest, mbedtls_md_get_size(md_info),
+-+		                          csr->MBEDTLS_PRIVATE(sig).p,
+-+		                          csr->MBEDTLS_PRIVATE(sig).len)) {
+-+		case 0:
+-+		/*case MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH:*//* XXX: allow? */
+-+			return (struct crypto_csr *)((uintptr_t)csr | 1uL);
+-+		default:
+-+			break;
+-+		}
+-+	}
+-+
+-+	mbedtls_x509_csr_free(csr);
+-+	os_free(csr);
+-+	return NULL;
+-+}
+-+
+-+void crypto_csr_deinit(struct crypto_csr *csr)
+-+{
+-+	if ((uintptr_t)csr & 1uL) {
+-+		csr = (struct crypto_csr *)((uintptr_t)csr & ~1uL);
+-+		mbedtls_x509_csr_free((mbedtls_x509_csr *)csr);
+-+	}
+-+	else
+-+		mbedtls_x509write_csr_free((mbedtls_x509write_csr *)csr);
+-+	os_free(csr);
+-+}
+-+
+-+int crypto_csr_set_ec_public_key(struct crypto_csr *csr,
+-+				 struct crypto_ec_key *key)
+-+{
+-+	mbedtls_x509write_csr_set_key((mbedtls_x509write_csr *)csr,
+-+	                              (mbedtls_pk_context *)key);
+-+	return 0;
+-+}
+-+
+-+int crypto_csr_set_name(struct crypto_csr *csr, enum crypto_csr_name type,
+-+			const char *name)
+-+{
+-+	/* specialized for src/common/dpp_crypto.c */
+-+
+-+	/* sole caller src/common/dpp_crypto.c:dpp_build_csr()
+-+	 * calls this function only once, using type == CSR_NAME_CN
+-+	 * (If called more than once, this code would need to append
+-+	 *  components to the subject name, which we could do by
+-+	 *  appending to (mbedtls_x509write_csr *) private member
+-+	 *  mbedtls_asn1_named_data *MBEDTLS_PRIVATE(subject)) */
+-+
+-+	const char *label;
+-+	switch (type) {
+-+	case CSR_NAME_CN: label = "CN="; break;
+-+	case CSR_NAME_SN: label = "SN="; break;
+-+	case CSR_NAME_C:  label = "C=";  break;
+-+	case CSR_NAME_O:  label = "O=";  break;
+-+	case CSR_NAME_OU: label = "OU="; break;
+-+	default: return -1;
+-+	}
+-+
+-+	size_t len = strlen(name);
+-+	struct wpabuf *buf = wpabuf_alloc(3+len+1);
+-+	if (buf == NULL)
+-+		return -1;
+-+	wpabuf_put_data(buf, label, strlen(label));
+-+	wpabuf_put_data(buf, name, len+1); /*(include trailing '\0')*/
+-+	/* Note: 'name' provided is set as given and should be backslash-escaped
+-+	 * by caller when necessary, e.g. literal ',' which are not separating
+-+	 * components should be backslash-escaped */
+-+
+-+	int ret =
+-+	  mbedtls_x509write_csr_set_subject_name((mbedtls_x509write_csr *)csr,
+-+	                                         wpabuf_head(buf)) ? -1 : 0;
+-+	wpabuf_free(buf);
+-+	return ret;
+-+}
+-+
+-+/* OBJ_pkcs9_challengePassword  1 2 840 113549 1 9 7 */
+-+static const char OBJ_pkcs9_challengePassword[] = MBEDTLS_OID_PKCS9 "\x07";
+-+
+-+int crypto_csr_set_attribute(struct crypto_csr *csr, enum crypto_csr_attr attr,
+-+			     int attr_type, const u8 *value, size_t len)
+-+{
+-+	/* specialized for src/common/dpp_crypto.c */
+-+	/* sole caller src/common/dpp_crypto.c:dpp_build_csr() passes
+-+	 *   attr      == CSR_ATTR_CHALLENGE_PASSWORD
+-+	 *   attr_type == ASN1_TAG_UTF8STRING */
+-+
+-+	const char *oid;
+-+	size_t oid_len;
+-+	switch (attr) {
+-+	case CSR_ATTR_CHALLENGE_PASSWORD:
+-+		oid = OBJ_pkcs9_challengePassword;
+-+		oid_len = sizeof(OBJ_pkcs9_challengePassword)-1;
+-+		break;
+-+	default:
+-+		return -1;
+-+	}
+-+
+-+  #if 0 /*(incorrect; sets an extension, not an attribute)*/
+-+	return mbedtls_x509write_csr_set_extension((mbedtls_x509write_csr *)csr,
+-+	                                           oid, oid_len,
+-+	  #if MBEDTLS_VERSION_NUMBER >= 0x03000000 /* mbedtls 3.0.0 */
+-+	                                           0, /*(critical flag)*/
+-+	  #endif
+-+	                                           value, len) ? -1 : 0;
+-+  #else
+-+	(void)oid;
+-+	(void)oid_len;
+-+  #endif
+-+
+-+	/* mbedtls does not currently provide way to set an attribute in a CSR:
+-+	 *   https://github.com/Mbed-TLS/mbedtls/issues/4886 */
+-+	wpa_printf(MSG_ERROR,
+-+	  "mbedtls does not currently support setting challengePassword "
+-+	  "attribute in CSR");
+-+	return -1;
+-+}
+-+
+-+const u8 * mbedtls_x509_csr_attr_oid_value(mbedtls_x509_csr *csr,
+-+                                           const char *oid, size_t oid_len,
+-+                                           size_t *vlen, int *vtype)
+-+{
+-+	/* Note: mbedtls_x509_csr_parse_der() has parsed and validated CSR,
+-+	 *	   so validation checks are not repeated here
+-+	 *
+-+	 * It would be nicer if (mbedtls_x509_csr *) had an mbedtls_x509_buf of
+-+	 * Attributes (or at least a pointer) since mbedtls_x509_csr_parse_der()
+-+	 * already parsed the rest of CertificationRequestInfo, some of which is
+-+	 * repeated here to step to Attributes.  Since csr->subject_raw.p points
+-+	 * into csr->cri.p, which points into csr->raw.p, step over version and
+-+	 * subject of CertificationRequestInfo (SEQUENCE) */
+-+	unsigned char *p = csr->subject_raw.p + csr->subject_raw.len;
+-+	unsigned char *end = csr->cri.p + csr->cri.len, *ext;
+-+	size_t len;
+-+
+-+	/* step over SubjectPublicKeyInfo */
+-+	mbedtls_asn1_get_tag(&p, end, &len,
+-+	    MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE);
+-+	p += len;
+-+
+-+	/* Attributes
+-+	 *   { ATTRIBUTE:IOSet } ::= SET OF { SEQUENCE { OID, value } }
+-+	 */
+-+	if (mbedtls_asn1_get_tag(&p, end, &len,
+-+	      MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_CONTEXT_SPECIFIC) != 0) {
+-+		return NULL;
+-+	}
+-+	while (p < end) {
+-+		if (mbedtls_asn1_get_tag(&p, end, &len,
+-+		      MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE) != 0) {
+-+			return NULL;
+-+		}
+-+		ext = p;
+-+		p += len;
+-+
+-+		if (mbedtls_asn1_get_tag(&ext,end,&len,MBEDTLS_ASN1_OID) != 0)
+-+			return NULL;
+-+		if (oid_len != len || 0 != memcmp(ext, oid, oid_len))
+-+			continue;
+-+
+-+		/* found oid; return value */
+-+		*vtype = *ext++; /* tag */
+-+		return (mbedtls_asn1_get_len(&ext,end,vlen) == 0) ? ext : NULL;
+-+	}
+-+
+-+	return NULL;
+-+}
+-+
+-+const u8 * crypto_csr_get_attribute(struct crypto_csr *csr,
+-+				    enum crypto_csr_attr attr,
+-+				    size_t *len, int *type)
+-+{
+-+	/* specialized for src/common/dpp_crypto.c */
+-+	/* sole caller src/common/dpp_crypto.c:dpp_build_csr() passes
+-+	 *   attr == CSR_ATTR_CHALLENGE_PASSWORD */
+-+
+-+	const char *oid;
+-+	size_t oid_len;
+-+	switch (attr) {
+-+	case CSR_ATTR_CHALLENGE_PASSWORD:
+-+		oid = OBJ_pkcs9_challengePassword;
+-+		oid_len = sizeof(OBJ_pkcs9_challengePassword)-1;
+-+		break;
+-+	default:
+-+		return NULL;
+-+	}
+-+
+-+	/* see crypto_csr_verify(); expecting (mbedtls_x509_csr *) tagged |=1 */
+-+	if (!((uintptr_t)csr & 1uL))
+-+		return NULL;
+-+	csr = (struct crypto_csr *)((uintptr_t)csr & ~1uL);
+-+
+-+	return mbedtls_x509_csr_attr_oid_value((mbedtls_x509_csr *)csr,
+-+	                                       oid, oid_len, len, type);
+-+}
+-+
+-+struct wpabuf * crypto_csr_sign(struct crypto_csr *csr,
+-+				struct crypto_ec_key *key,
+-+				enum crypto_hash_alg algo)
+-+{
+-+	mbedtls_md_type_t sig_md;
+-+	switch (algo) {
+-+  #ifdef MBEDTLS_SHA256_C
+-+	case CRYPTO_HASH_ALG_SHA256: sig_md = MBEDTLS_MD_SHA256; break;
+-+  #endif
+-+  #ifdef MBEDTLS_SHA512_C
+-+	case CRYPTO_HASH_ALG_SHA384: sig_md = MBEDTLS_MD_SHA384; break;
+-+	case CRYPTO_HASH_ALG_SHA512: sig_md = MBEDTLS_MD_SHA512; break;
+-+  #endif
+-+	default:
+-+		return NULL;
+-+	}
+-+	mbedtls_x509write_csr_set_md_alg((mbedtls_x509write_csr *)csr, sig_md);
+-+
+-+  #if 0
+-+	unsigned char key_usage = MBEDTLS_X509_KU_DIGITAL_SIGNATURE
+-+	                        | MBEDTLS_X509_KU_KEY_CERT_SIGN;
+-+	if (mbedtls_x509write_csr_set_key_usage((mbedtls_x509write_csr *)csr,
+-+	                                        key_usage))
+-+		return NULL;
+-+  #endif
+-+
+-+  #if 0
+-+	unsigned char ns_cert_type = MBEDTLS_X509_NS_CERT_TYPE_SSL_CLIENT
+-+	                           | MBEDTLS_X509_NS_CERT_TYPE_EMAIL;
+-+	if (mbedtls_x509write_csr_set_ns_cert_type((mbedtls_x509write_csr *)csr,
+-+	                                           ns_cert_type))
+-+		return NULL;
+-+  #endif
+-+
+-+  #if 0
+-+	/* mbedtls does not currently provide way to set an attribute in a CSR:
+-+	 *   https://github.com/Mbed-TLS/mbedtls/issues/4886
+-+	 * XXX: hwsim dpp_enterprise test fails due to this limitation.
+-+	 *
+-+	 * Current usage of this function is solely by dpp_build_csr(),
+-+	 * so as a kludge, might consider custom (struct crypto_csr *)
+-+	 * containing (mbedtls_x509write_csr *) and a list of attributes
+-+	 * (i.e. challengePassword).  Might have to totally reimplement
+-+	 * mbedtls_x509write_csr_der(); underlying x509write_csr_der_internal()
+-+	 * handles signing the CSR.  (This is more work that appending an
+-+	 * Attributes section to end of CSR and adjusting ASN.1 length of CSR.)
+-+	 */
+-+  #endif
+-+
+-+	unsigned char buf[4096]; /* XXX: large enough?  too large? */
+-+	int len = mbedtls_x509write_csr_der((mbedtls_x509write_csr *)csr,
+-+	                                    buf, sizeof(buf),
+-+	                                    mbedtls_ctr_drbg_random,
+-+	                                    crypto_mbedtls_ctr_drbg());
+-+	if (len < 0)
+-+		return NULL;
+-+	/*  Note: data is written at the end of the buffer! Use the
+-+	 *        return value to determine where you should start
+-+	 *        using the buffer */
+-+	return wpabuf_alloc_copy(buf+sizeof(buf)-len, (size_t)len);
+-+}
+-+
+-+#endif /* CRYPTO_MBEDTLS_CRYPTO_CSR */
+-+
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_PKCS7
+-+
+-+#if 0
+-+#include <mbedtls/pkcs7.h> /* PKCS7 is not currently supported in mbedtls */
+-+#include <mbedtls/pem.h>
+-+#endif
+-+
+-+struct wpabuf * crypto_pkcs7_get_certificates(const struct wpabuf *pkcs7)
+-+{
+-+	/* PKCS7 is not currently supported in mbedtls */
+-+	return NULL;
+-+
+-+#if 0
+-+	/* https://github.com/naynajain/mbedtls-1 branch: development-pkcs7
+-+	 * (??? potential future contribution to mbedtls ???) */
+-+
+-+	/* Note: PKCS7 signature *is not* verified by this function.
+-+	 * The function interface does not provide for passing a certificate */
+-+
+-+	mbedtls_pkcs7 mpkcs7;
+-+	mbedtls_pkcs7_init(&mpkcs7);
+-+	int pkcs7_type = mbedtls_pkcs7_parse_der(wpabuf_head(pkcs7),
+-+	                                         wpabuf_len(pkcs7),
+-+	                                         &mpkcs7);
+-+	wpabuf *buf = NULL;
+-+	do {
+-+		if (pkcs7_type < 0)
+-+			break;
+-+
+-+		/* src/common/dpp.c:dpp_parse_cred_dot1x() interested in certs
+-+		 * for wpa_supplicant/dpp_supplicant.c:wpas_dpp_add_network()
+-+		 * (? are adding certificate headers and footers desired ?) */
+-+
+-+		/* development-pkcs7 branch does not currently provide
+-+		 * additional interfaces to retrieve the parsed data */
+-+
+-+		mbedtls_x509_crt *certs =
+-+		  &mpkcs7.MBEDTLS_PRIVATE(signed_data).MBEDTLS_PRIVATE(certs);
+-+		int ncerts =
+-+		  mpkcs7.MBEDTLS_PRIVATE(signed_data).MBEDTLS_PRIVATE(no_of_certs);
+-+
+-+		/* allocate buffer for PEM (base64-encoded DER)
+-+		 * plus header, footer, newlines, and some extra */
+-+		buf = wpabuf_alloc((wpabuf_len(pkcs7)+2)/3*4 + ncerts*64);
+-+		if (buf == NULL)
+-+			break;
+-+
+-+		#define PEM_BEGIN_CRT "-----BEGIN CERTIFICATE-----\n"
+-+		#define PEM_END_CRT   "-----END CERTIFICATE-----\n"
+-+		size_t olen;
+-+		for (int i = 0; i < ncerts; ++i) {
+-+			int ret = mbedtls_pem_write_buffer(
+-+			            PEM_BEGIN_CRT, PEM_END_CRT,
+-+			            certs[i].raw.p, certs[i].raw.len,
+-+			            wpabuf_mhead(buf, 0), wpabuf_tailroom(buf),
+-+			            &olen));
+-+			if (ret == 0)
+-+				wpabuf_put(buf, olen);
+-+			} else {
+-+				if (ret == MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL)
+-+					ret = wpabuf_resize(
+-+					        &buf,olen-wpabuf_tailroom(buf));
+-+				if (ret == 0) {
+-+					--i;/*(adjust loop iterator for retry)*/
+-+					continue;
+-+				}
+-+				wpabuf_free(buf);
+-+				buf = NULL;
+-+				break;
+-+			}
+-+		}
+-+	} while (0);
+-+
+-+	mbedtls_pkcs7_free(&mpkcs7);
+-+	return buf;
+-+#endif
+-+}
+-+
+-+#endif /* CRYPTO_MBEDTLS_CRYPTO_PKCS7 */
+-+
+-+
+-+#ifdef MBEDTLS_ARC4_C
+-+#include <mbedtls/arc4.h>
+-+int rc4_skip(const u8 *key, size_t keylen, size_t skip,
+-+	     u8 *data, size_t data_len)
+-+{
+-+	mbedtls_arc4_context ctx;
+-+	mbedtls_arc4_init(&ctx);
+-+	mbedtls_arc4_setup(&ctx, key, keylen);
+-+
+-+	if (skip) {
+-+		/*(prefer [16] on ancient hardware with smaller cache lines)*/
+-+		unsigned char skip_buf[64]; /*('skip' is generally small)*/
+-+		/*os_memset(skip_buf, 0, sizeof(skip_buf));*/ /*(necessary?)*/
+-+		size_t len;
+-+		do {
+-+			len = skip > sizeof(skip_buf) ? sizeof(skip_buf) : skip;
+-+			mbedtls_arc4_crypt(&ctx, len, skip_buf, skip_buf);
+-+		} while ((skip -= len));
+-+	}
+-+
+-+	int ret = mbedtls_arc4_crypt(&ctx, data_len, data, data);
+-+	mbedtls_arc4_free(&ctx);
+-+	return ret;
+-+}
+-+#endif
+-+
+-+
+-+/* duplicated in tls_mbedtls.c:tls_mbedtls_readfile()*/
+-+__attribute_noinline__
+-+static int crypto_mbedtls_readfile(const char *path, u8 **buf, size_t *n)
+-+{
+-+  #if 0 /* #ifdef MBEDTLS_FS_IO */
+-+	/*(includes +1 for '\0' needed by mbedtls PEM parsing funcs)*/
+-+	if (mbedtls_pk_load_file(path, (unsigned char **)buf, n) != 0) {
+-+		wpa_printf(MSG_ERROR, "error: mbedtls_pk_load_file %s", path);
+-+		return -1;
+-+	}
+-+  #else
+-+	/*(use os_readfile() so that we can use os_free()
+-+	 *(if we use mbedtls_pk_load_file() above, macros prevent calling free()
+-+	 * directly #if defined(OS_REJECT_C_LIB_FUNCTIONS) and calling os_free()
+-+	 * on buf aborts in tests if buf not allocated via os_malloc())*/
+-+	*buf = (u8 *)os_readfile(path, n);
+-+	if (!*buf) {
+-+		wpa_printf(MSG_ERROR, "error: os_readfile %s", path);
+-+		return -1;
+-+	}
+-+	u8 *buf0 = os_realloc(*buf, *n+1);
+-+	if (!buf0) {
+-+		bin_clear_free(*buf, *n);
+-+		*buf = NULL;
+-+		return -1;
+-+	}
+-+	buf0[(*n)++] = '\0';
+-+	*buf = buf0;
+-+  #endif
+-+	return 0;
+-+}
+-+
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_RSA
+-+#ifdef MBEDTLS_RSA_C
+-+
+-+#include <mbedtls/pk.h>
+-+#include <mbedtls/rsa.h>
+-+
+-+struct crypto_rsa_key * crypto_rsa_key_read(const char *file, bool private_key)
+-+{
+-+	/* mbedtls_pk_parse_keyfile() and mbedtls_pk_parse_public_keyfile()
+-+	 * require #ifdef MBEDTLS_FS_IO in mbedtls library.  Prefer to use
+-+	 * crypto_mbedtls_readfile(), which wraps os_readfile() */
+-+	u8 *data;
+-+	size_t len;
+-+	if (crypto_mbedtls_readfile(file, &data, &len) != 0)
+-+		return NULL;
+-+
+-+	mbedtls_pk_context *ctx = os_malloc(sizeof(*ctx));
+-+	if (ctx == NULL) {
+-+		bin_clear_free(data, len);
+-+		return NULL;
+-+	}
+-+	mbedtls_pk_init(ctx);
+-+
+-+	int rc;
+-+	rc = (private_key
+-+	      ? mbedtls_pk_parse_key(ctx, data, len, NULL, 0
+-+	  #if MBEDTLS_VERSION_NUMBER >= 0x03000000 /* mbedtls 3.0.0 */
+-+	                            ,mbedtls_ctr_drbg_random,
+-+	                             crypto_mbedtls_ctr_drbg()
+-+	  #endif
+-+	                            )
+-+	      : mbedtls_pk_parse_public_key(ctx, data, len)) == 0
+-+	    && mbedtls_pk_can_do(ctx, MBEDTLS_PK_RSA);
+-+
+-+	bin_clear_free(data, len);
+-+
+-+	if (rc) {
+-+		/* use MBEDTLS_RSA_PKCS_V21 padding for RSAES-OAEP */
+-+		/* use MBEDTLS_MD_SHA256 for these hostap interfaces */
+-+	  #if MBEDTLS_VERSION_NUMBER < 0x03000000 /* mbedtls 3.0.0 */
+-+		/*(no return value in mbedtls 2.x)*/
+-+		mbedtls_rsa_set_padding(mbedtls_pk_rsa(*ctx),
+-+		                        MBEDTLS_RSA_PKCS_V21,
+-+		                        MBEDTLS_MD_SHA256);
+-+	  #else
+-+		if (mbedtls_rsa_set_padding(mbedtls_pk_rsa(*ctx),
+-+		                            MBEDTLS_RSA_PKCS_V21,
+-+		                            MBEDTLS_MD_SHA256) == 0)
+-+	  #endif
+-+			return (struct crypto_rsa_key *)ctx;
+-+	}
+-+
+-+	mbedtls_pk_free(ctx);
+-+	os_free(ctx);
+-+	return NULL;
+-+}
+-+
+-+struct wpabuf * crypto_rsa_oaep_sha256_encrypt(struct crypto_rsa_key *key,
+-+					       const struct wpabuf *in)
+-+{
+-+	mbedtls_rsa_context *pk_rsa = mbedtls_pk_rsa(*(mbedtls_pk_context*)key);
+-+	size_t olen = mbedtls_rsa_get_len(pk_rsa);
+-+	struct wpabuf *buf = wpabuf_alloc(olen);
+-+	if (buf == NULL)
+-+		return NULL;
+-+
+-+	/* mbedtls_pk_encrypt() takes a few more hops to get to same func */
+-+	if (mbedtls_rsa_rsaes_oaep_encrypt(pk_rsa,
+-+	                                   mbedtls_ctr_drbg_random,
+-+	                                   crypto_mbedtls_ctr_drbg(),
+-+	  #if MBEDTLS_VERSION_NUMBER < 0x03000000 /* mbedtls 3.0.0 */
+-+	                                   MBEDTLS_RSA_PRIVATE,
+-+	  #endif
+-+	                                   NULL, 0,
+-+	                                   wpabuf_len(in), wpabuf_head(in),
+-+	                                   wpabuf_put(buf, olen)) == 0) {
+-+		return buf;
+-+	}
+-+
+-+	wpabuf_clear_free(buf);
+-+	return NULL;
+-+}
+-+
+-+struct wpabuf * crypto_rsa_oaep_sha256_decrypt(struct crypto_rsa_key *key,
+-+					       const struct wpabuf *in)
+-+{
+-+	mbedtls_rsa_context *pk_rsa = mbedtls_pk_rsa(*(mbedtls_pk_context*)key);
+-+	size_t olen = mbedtls_rsa_get_len(pk_rsa);
+-+	struct wpabuf *buf = wpabuf_alloc(olen);
+-+	if (buf == NULL)
+-+		return NULL;
+-+
+-+	/* mbedtls_pk_decrypt() takes a few more hops to get to same func */
+-+	if (mbedtls_rsa_rsaes_oaep_decrypt(pk_rsa,
+-+	                                   mbedtls_ctr_drbg_random,
+-+	                                   crypto_mbedtls_ctr_drbg(),
+-+	  #if MBEDTLS_VERSION_NUMBER < 0x03000000 /* mbedtls 3.0.0 */
+-+	                                   MBEDTLS_RSA_PUBLIC,
+-+	  #endif
+-+	                                   NULL, 0, &olen, wpabuf_head(in),
+-+	                                   wpabuf_mhead(buf), olen) == 0) {
+-+		wpabuf_put(buf, olen);
+-+		return buf;
+-+	}
+-+
+-+	wpabuf_clear_free(buf);
+-+	return NULL;
+-+}
+-+
+-+void crypto_rsa_key_free(struct crypto_rsa_key *key)
+-+{
+-+	mbedtls_pk_free((mbedtls_pk_context *)key);
+-+	os_free(key);
+-+}
+-+
+-+#endif /* MBEDTLS_RSA_C */
+-+#endif /* CRYPTO_MBEDTLS_CRYPTO_RSA */
+-+
+-+#ifdef CRYPTO_MBEDTLS_CRYPTO_HPKE
+-+
+-+struct wpabuf * hpke_base_seal(enum hpke_kem_id kem_id,
+-+			       enum hpke_kdf_id kdf_id,
+-+			       enum hpke_aead_id aead_id,
+-+			       struct crypto_ec_key *peer_pub,
+-+			       const u8 *info, size_t info_len,
+-+			       const u8 *aad, size_t aad_len,
+-+			       const u8 *pt, size_t pt_len)
+-+{
+-+	/* not yet implemented */
+-+	return NULL;
+-+}
+-+
+-+struct wpabuf * hpke_base_open(enum hpke_kem_id kem_id,
+-+			       enum hpke_kdf_id kdf_id,
+-+			       enum hpke_aead_id aead_id,
+-+			       struct crypto_ec_key *own_priv,
+-+			       const u8 *info, size_t info_len,
+-+			       const u8 *aad, size_t aad_len,
+-+			       const u8 *enc_ct, size_t enc_ct_len)
+-+{
+-+	/* not yet implemented */
+-+	return NULL;
+-+}
+-+
+-+#endif
+---- /dev/null
+-+++ b/src/crypto/tls_mbedtls.c
+-@@ -0,0 +1,3313 @@
+-+/*
+-+ * SSL/TLS interface functions for mbed TLS
+-+ *
+-+ * SPDX-FileCopyrightText: 2022 Glenn Strauss <gstrauss@gluelogic.com>
+-+ * SPDX-License-Identifier: BSD-3-Clause
+-+ *
+-+ * This software may be distributed under the terms of the BSD license.
+-+ * See README for more details.
+-+ *
+-+ * template:  src/crypto/tls_none.c
+-+ * reference: src/crypto/tls_*.c
+-+ *
+-+ * Known Limitations:
+-+ * - no TLSv1.3 (not available in mbedtls 2.x; experimental in mbedtls 3.x)
+-+ * - no OCSP (not yet available in mbedtls)
+-+ * - mbedtls does not support all certificate encodings used by hwsim tests
+-+ *   PCKS#5 v1.5
+-+ *   PCKS#12
+-+ *   DH DSA
+-+ * - EAP-FAST, EAP-TEAP session ticket support not implemented in tls_mbedtls.c
+-+ * - mbedtls does not currently provide way to set an attribute in a CSR
+-+ *     https://github.com/Mbed-TLS/mbedtls/issues/4886
+-+ *   so tests/hwsim dpp_enterprise tests fail
+-+ * - DPP2 not supported
+-+ *   PKCS#7 parsing is not supported in mbedtls
+-+ *   See crypto_mbedtls.c:crypto_pkcs7_get_certificates() comments
+-+ * - DPP3 not supported
+-+ *   hpke_base_seal() and hpke_base_seal() not implemented in crypto_mbedtls.c
+-+ *
+-+ * Status:
+-+ * - code written to be compatible with mbedtls 2.x and mbedtls 3.x
+-+ *   (currently requires mbedtls >= 2.27.0 for mbedtls_mpi_random())
+-+ *   (currently requires mbedtls >= 2.18.0 for mbedtls_ssl_tls_prf())
+-+ * - builds with tests/build/build-wpa_supplicant-mbedtls.config
+-+ * - passes all tests/ crypto module tests (incomplete coverage)
+-+ *   ($ cd tests; make clean; make -j 4 run-tests CONFIG_TLS=mbedtls)
+-+ * - passes almost all tests/hwsim tests
+-+ *   (hwsim tests skipped for missing features)
+-+ *
+-+ * RFE:
+-+ * - EAP-FAST, EAP-TEAP session ticket support not implemented in tls_mbedtls.c
+-+ * - client/server session resumption, and/or save client session ticket
+-+ */
+-+
+-+#include "includes.h"
+-+#include "common.h"
+-+
+-+#include <mbedtls/version.h>
+-+#include <mbedtls/ctr_drbg.h>
+-+#include <mbedtls/error.h>
+-+#include <mbedtls/oid.h>
+-+#include <mbedtls/pem.h>
+-+#include <mbedtls/platform.h> /* mbedtls_calloc() mbedtls_free() */
+-+#include <mbedtls/platform_util.h> /* mbedtls_platform_zeroize() */
+-+#include <mbedtls/ssl.h>
+-+#include <mbedtls/ssl_ticket.h>
+-+#include <mbedtls/x509.h>
+-+#include <mbedtls/x509_crt.h>
+-+
+-+#if MBEDTLS_VERSION_NUMBER >= 0x02040000 /* mbedtls 2.4.0 */
+-+#include <mbedtls/net_sockets.h>
+-+#else
+-+#include <mbedtls/net.h>
+-+#endif
+-+
+-+#ifndef MBEDTLS_PRIVATE
+-+#define MBEDTLS_PRIVATE(x) x
+-+#endif
+-+
+-+#if MBEDTLS_VERSION_NUMBER < 0x03020000 /* mbedtls 3.2.0 */
+-+#define mbedtls_ssl_get_ciphersuite_id_from_ssl(ssl) \
+-+        ((ssl)->MBEDTLS_PRIVATE(session) \
+-+        ?(ssl)->MBEDTLS_PRIVATE(session)->MBEDTLS_PRIVATE(ciphersuite) \
+-+        : 0)
+-+#define mbedtls_ssl_ciphersuite_get_name(info) \
+-+        (info)->MBEDTLS_PRIVATE(name)
+-+#endif
+-+
+-+#include "crypto.h"     /* sha256_vector() */
+-+#include "tls.h"
+-+
+-+#ifndef SHA256_DIGEST_LENGTH
+-+#define SHA256_DIGEST_LENGTH 32
+-+#endif
+-+
+-+#ifndef MBEDTLS_EXPKEY_FIXED_SECRET_LEN
+-+#define MBEDTLS_EXPKEY_FIXED_SECRET_LEN 48
+-+#endif
+-+
+-+#ifndef MBEDTLS_EXPKEY_RAND_LEN
+-+#define MBEDTLS_EXPKEY_RAND_LEN 32
+-+#endif
+-+
+-+#if MBEDTLS_VERSION_NUMBER >= 0x03000000 /* mbedtls 3.0.0 */
+-+static mbedtls_ssl_export_keys_t tls_connection_export_keys_cb;
+-+#elif MBEDTLS_VERSION_NUMBER >= 0x02120000 /* mbedtls 2.18.0 */
+-+static mbedtls_ssl_export_keys_ext_t tls_connection_export_keys_cb;
+-+#else /*(not implemented; return error)*/
+-+#define mbedtls_ssl_tls_prf(a,b,c,d,e,f,g,h) (-1)
+-+typedef mbedtls_tls_prf_types int;
+-+#endif
+-+
+-+
+-+/* hostapd/wpa_supplicant provides forced_memzero(),
+-+ * but prefer mbedtls_platform_zeroize() */
+-+#define forced_memzero(ptr,sz) mbedtls_platform_zeroize(ptr,sz)
+-+
+-+
+-+#if defined(EAP_FAST) || defined(EAP_FAST_DYNAMIC) || defined(EAP_SERVER_FAST) \
+-+ || defined(EAP_TEAP) || defined(EAP_SERVER_TEAP)
+-+#ifdef MBEDTLS_SSL_SESSION_TICKETS
+-+#ifdef MBEDTLS_SSL_TICKET_C
+-+#define TLS_MBEDTLS_SESSION_TICKETS
+-+#if defined(EAP_TEAP) || defined(EAP_SERVER_TEAP)
+-+#define TLS_MBEDTLS_EAP_TEAP
+-+#endif
+-+#if !defined(CONFIG_FIPS) /* EAP-FAST keys cannot be exported in FIPS mode */
+-+#if defined(EAP_FAST) || defined(EAP_FAST_DYNAMIC) || defined(EAP_SERVER_FAST)
+-+#define TLS_MBEDTLS_EAP_FAST
+-+#endif
+-+#endif
+-+#endif
+-+#endif
+-+#endif
+-+
+-+
+-+struct tls_conf {
+-+	mbedtls_ssl_config conf;
+-+
+-+	unsigned int verify_peer:1;
+-+	unsigned int verify_depth0_only:1;
+-+	unsigned int check_crl:2;           /*(needs :2 bits for 0, 1, 2)*/
+-+	unsigned int check_crl_strict:1;    /*(needs :1 bit  for 0, 1)*/
+-+	unsigned int ca_cert_probe:1;
+-+	unsigned int has_ca_cert:1;
+-+	unsigned int has_client_cert:1;
+-+	unsigned int has_private_key:1;
+-+	unsigned int suiteb128:1;
+-+	unsigned int suiteb192:1;
+-+	mbedtls_x509_crl *crl;
+-+	mbedtls_x509_crt ca_cert;
+-+	mbedtls_x509_crt client_cert;
+-+	mbedtls_pk_context private_key;
+-+
+-+	uint32_t refcnt;
+-+
+-+	unsigned int flags;
+-+	char *subject_match;
+-+	char *altsubject_match;
+-+	char *suffix_match;
+-+	char *domain_match;
+-+	char *check_cert_subject;
+-+	u8 ca_cert_hash[SHA256_DIGEST_LENGTH];
+-+
+-+	int *ciphersuites;  /* list of ciphersuite ids for mbedtls_ssl_config */
+-+#if MBEDTLS_VERSION_NUMBER < 0x03010000 /* mbedtls 3.1.0 */
+-+	mbedtls_ecp_group_id *curves;
+-+#else
+-+	uint16_t *curves;   /* list of curve ids for mbedtls_ssl_config */
+-+#endif
+-+};
+-+
+-+
+-+struct tls_global {
+-+	struct tls_conf *tls_conf;
+-+	char *ocsp_stapling_response;
+-+	mbedtls_ctr_drbg_context *ctr_drbg; /*(see crypto_mbedtls.c)*/
+-+  #ifdef MBEDTLS_SSL_SESSION_TICKETS
+-+	mbedtls_ssl_ticket_context ticket_ctx;
+-+  #endif
+-+	char *ca_cert_file;
+-+	struct os_reltime crl_reload_previous;
+-+	unsigned int crl_reload_interval;
+-+	uint32_t refcnt;
+-+	struct tls_config init_conf;
+-+};
+-+
+-+static struct tls_global tls_ctx_global;
+-+
+-+
+-+struct tls_connection {
+-+	struct tls_conf *tls_conf;
+-+	struct wpabuf *push_buf;
+-+	struct wpabuf *pull_buf;
+-+	size_t pull_buf_offset;
+-+
+-+	unsigned int established:1;
+-+	unsigned int resumed:1;
+-+	unsigned int verify_peer:1;
+-+	unsigned int is_server:1;
+-+
+-+	mbedtls_ssl_context ssl;
+-+
+-+	mbedtls_tls_prf_types tls_prf_type;
+-+	size_t expkey_keyblock_size;
+-+	size_t expkey_secret_len;
+-+  #if MBEDTLS_VERSION_NUMBER < 0x03000000 /* mbedtls 3.0.0 */
+-+	unsigned char expkey_secret[MBEDTLS_EXPKEY_FIXED_SECRET_LEN];
+-+  #else
+-+	unsigned char expkey_secret[MBEDTLS_MD_MAX_SIZE];
+-+  #endif
+-+	unsigned char expkey_randbytes[MBEDTLS_EXPKEY_RAND_LEN*2];
+-+
+-+	int read_alerts, write_alerts, failed;
+-+
+-+  #ifdef TLS_MBEDTLS_SESSION_TICKETS
+-+	tls_session_ticket_cb session_ticket_cb;
+-+	void *session_ticket_cb_ctx;
+-+	unsigned char *clienthello_session_ticket;
+-+	size_t clienthello_session_ticket_len;
+-+  #endif
+-+	char *peer_subject; /* peer subject info for authenticated peer */
+-+	struct wpabuf *success_data;
+-+};
+-+
+-+
+-+#ifndef __has_attribute
+-+#define __has_attribute(x) 0
+-+#endif
+-+
+-+#ifndef __GNUC_PREREQ
+-+#define __GNUC_PREREQ(maj,min) 0
+-+#endif
+-+
+-+#ifndef __attribute_cold__
+-+#if __has_attribute(cold) \
+-+ || __GNUC_PREREQ(4,3)
+-+#define __attribute_cold__  __attribute__((__cold__))
+-+#else
+-+#define __attribute_cold__
+-+#endif
+-+#endif
+-+
+-+#ifndef __attribute_noinline__
+-+#if __has_attribute(noinline) \
+-+ || __GNUC_PREREQ(3,1)
+-+#define __attribute_noinline__  __attribute__((__noinline__))
+-+#else
+-+#define __attribute_noinline__
+-+#endif
+-+#endif
+-+
+-+
+-+__attribute_cold__
+-+__attribute_noinline__
+-+static void emsg(int level, const char * const msg)
+-+{
+-+	wpa_printf(level, "MTLS: %s", msg);
+-+}
+-+
+-+
+-+__attribute_cold__
+-+__attribute_noinline__
+-+static void emsgrc(int level, const char * const msg, int rc)
+-+{
+-+  #ifdef MBEDTLS_ERROR_C
+-+	/* error logging convenience function that decodes mbedtls result codes */
+-+	char buf[256];
+-+	mbedtls_strerror(rc, buf, sizeof(buf));
+-+	wpa_printf(level, "MTLS: %s: %s (-0x%04x)", msg, buf, -rc);
+-+  #else
+-+	wpa_printf(level, "MTLS: %s: (-0x%04x)", msg, -rc);
+-+  #endif
+-+}
+-+
+-+
+-+#define elog(rc, msg) emsgrc(MSG_ERROR, (msg), (rc))
+-+#define ilog(rc, msg) emsgrc(MSG_INFO,  (msg), (rc))
+-+
+-+
+-+struct tls_conf * tls_conf_init(void *tls_ctx)
+-+{
+-+	struct tls_conf *tls_conf = os_zalloc(sizeof(*tls_conf));
+-+	if (tls_conf == NULL)
+-+		return NULL;
+-+	tls_conf->refcnt = 1;
+-+
+-+	mbedtls_ssl_config_init(&tls_conf->conf);
+-+	mbedtls_ssl_conf_rng(&tls_conf->conf,
+-+			     mbedtls_ctr_drbg_random, tls_ctx_global.ctr_drbg);
+-+	mbedtls_x509_crt_init(&tls_conf->ca_cert);
+-+	mbedtls_x509_crt_init(&tls_conf->client_cert);
+-+	mbedtls_pk_init(&tls_conf->private_key);
+-+
+-+	return tls_conf;
+-+}
+-+
+-+
+-+void tls_conf_deinit(struct tls_conf *tls_conf)
+-+{
+-+	if (tls_conf == NULL || --tls_conf->refcnt != 0)
+-+		return;
+-+
+-+	mbedtls_x509_crt_free(&tls_conf->ca_cert);
+-+	mbedtls_x509_crt_free(&tls_conf->client_cert);
+-+	if (tls_conf->crl) {
+-+		mbedtls_x509_crl_free(tls_conf->crl);
+-+		os_free(tls_conf->crl);
+-+	}
+-+	mbedtls_pk_free(&tls_conf->private_key);
+-+	mbedtls_ssl_config_free(&tls_conf->conf);
+-+	os_free(tls_conf->curves);
+-+	os_free(tls_conf->ciphersuites);
+-+	os_free(tls_conf->subject_match);
+-+	os_free(tls_conf->altsubject_match);
+-+	os_free(tls_conf->suffix_match);
+-+	os_free(tls_conf->domain_match);
+-+	os_free(tls_conf->check_cert_subject);
+-+	os_free(tls_conf);
+-+}
+-+
+-+
+-+mbedtls_ctr_drbg_context * crypto_mbedtls_ctr_drbg(void); /*(not in header)*/
+-+
+-+__attribute_cold__
+-+void * tls_init(const struct tls_config *conf)
+-+{
+-+	/* RFE: review struct tls_config *conf (different from tls_conf) */
+-+
+-+	if (++tls_ctx_global.refcnt > 1)
+-+		return &tls_ctx_global;
+-+
+-+	tls_ctx_global.ctr_drbg = crypto_mbedtls_ctr_drbg();
+-+  #ifdef MBEDTLS_SSL_SESSION_TICKETS
+-+	mbedtls_ssl_ticket_init(&tls_ctx_global.ticket_ctx);
+-+	mbedtls_ssl_ticket_setup(&tls_ctx_global.ticket_ctx,
+-+	                         mbedtls_ctr_drbg_random,
+-+	                         tls_ctx_global.ctr_drbg,
+-+	                         MBEDTLS_CIPHER_AES_256_GCM,
+-+	                         43200); /* ticket timeout: 12 hours */
+-+  #endif
+-+	/* copy struct for future use */
+-+	tls_ctx_global.init_conf = *conf;
+-+	if (conf->openssl_ciphers)
+-+		tls_ctx_global.init_conf.openssl_ciphers =
+-+		  os_strdup(conf->openssl_ciphers);
+-+
+-+	tls_ctx_global.crl_reload_interval = conf->crl_reload_interval;
+-+	os_get_reltime(&tls_ctx_global.crl_reload_previous);
+-+
+-+	return &tls_ctx_global;
+-+}
+-+
+-+
+-+__attribute_cold__
+-+void tls_deinit(void *tls_ctx)
+-+{
+-+	if (tls_ctx == NULL || --tls_ctx_global.refcnt != 0)
+-+		return;
+-+
+-+	tls_conf_deinit(tls_ctx_global.tls_conf);
+-+	os_free(tls_ctx_global.ca_cert_file);
+-+	os_free(tls_ctx_global.ocsp_stapling_response);
+-+	char *openssl_ciphers; /*(allocated in tls_init())*/
+-+	*(const char **)&openssl_ciphers =
+-+	  tls_ctx_global.init_conf.openssl_ciphers;
+-+	os_free(openssl_ciphers);
+-+  #ifdef MBEDTLS_SSL_SESSION_TICKETS
+-+	mbedtls_ssl_ticket_free(&tls_ctx_global.ticket_ctx);
+-+  #endif
+-+	os_memset(&tls_ctx_global, 0, sizeof(tls_ctx_global));
+-+}
+-+
+-+
+-+int tls_get_errors(void *tls_ctx)
+-+{
+-+	return 0;
+-+}
+-+
+-+
+-+static void tls_connection_deinit_expkey(struct tls_connection *conn)
+-+{
+-+	conn->tls_prf_type = 0; /* MBEDTLS_SSL_TLS_PRF_NONE; */
+-+	conn->expkey_keyblock_size = 0;
+-+	conn->expkey_secret_len = 0;
+-+	forced_memzero(conn->expkey_secret, sizeof(conn->expkey_secret));
+-+	forced_memzero(conn->expkey_randbytes, sizeof(conn->expkey_randbytes));
+-+}
+-+
+-+
+-+#ifdef TLS_MBEDTLS_SESSION_TICKETS
+-+void tls_connection_deinit_clienthello_session_ticket(struct tls_connection *conn)
+-+{
+-+	if (conn->clienthello_session_ticket) {
+-+		mbedtls_platform_zeroize(conn->clienthello_session_ticket,
+-+		                         conn->clienthello_session_ticket_len);
+-+		mbedtls_free(conn->clienthello_session_ticket);
+-+		conn->clienthello_session_ticket = NULL;
+-+		conn->clienthello_session_ticket_len = 0;
+-+	}
+-+}
+-+#endif
+-+
+-+
+-+void tls_connection_deinit(void *tls_ctx, struct tls_connection *conn)
+-+{
+-+	if (conn == NULL)
+-+		return;
+-+
+-+  #if 0 /*(good intention, but never sent since we destroy self below)*/
+-+	if (conn->established)
+-+		mbedtls_ssl_close_notify(&conn->ssl);
+-+  #endif
+-+
+-+	if (conn->tls_prf_type)
+-+		tls_connection_deinit_expkey(conn);
+-+
+-+  #ifdef TLS_MBEDTLS_SESSION_TICKETS
+-+	if (conn->clienthello_session_ticket)
+-+		tls_connection_deinit_clienthello_session_ticket(conn);
+-+  #endif
+-+
+-+	os_free(conn->peer_subject);
+-+	wpabuf_free(conn->success_data);
+-+	wpabuf_free(conn->push_buf);
+-+	wpabuf_free(conn->pull_buf);
+-+	mbedtls_ssl_free(&conn->ssl);
+-+	tls_conf_deinit(conn->tls_conf);
+-+	os_free(conn);
+-+}
+-+
+-+
+-+static void tls_mbedtls_refresh_crl(void);
+-+static int tls_mbedtls_ssl_setup(struct tls_connection *conn);
+-+
+-+struct tls_connection * tls_connection_init(void *tls_ctx)
+-+{
+-+	struct tls_connection *conn = os_zalloc(sizeof(*conn));
+-+	if (conn == NULL)
+-+		return NULL;
+-+
+-+	mbedtls_ssl_init(&conn->ssl);
+-+
+-+	conn->tls_conf = tls_ctx_global.tls_conf; /*(inherit global conf, if set)*/
+-+	if (conn->tls_conf) {
+-+		++conn->tls_conf->refcnt;
+-+		/* check for CRL refresh if inheriting from global config */
+-+		tls_mbedtls_refresh_crl();
+-+
+-+		conn->verify_peer = conn->tls_conf->verify_peer;
+-+		if (tls_mbedtls_ssl_setup(conn) != 0) {
+-+			tls_connection_deinit(&tls_ctx_global, conn);
+-+			return NULL;
+-+		}
+-+	}
+-+
+-+	return conn;
+-+}
+-+
+-+
+-+int tls_connection_established(void *tls_ctx, struct tls_connection *conn)
+-+{
+-+	return conn ? conn->established : 0;
+-+}
+-+
+-+
+-+__attribute_noinline__
+-+char * tls_mbedtls_peer_serial_num(const mbedtls_x509_crt *crt, char *serial_num, size_t len)
+-+{
+-+	/* mbedtls_x509_serial_gets() inefficiently formats to hex separated by
+-+	 * colons, so generate the hex serial number here.  The func
+-+	 * wpa_snprintf_hex_uppercase() is similarly inefficient. */
+-+	size_t i = 0; /* skip leading 0's per Distinguished Encoding Rules (DER) */
+-+	while (i < crt->serial.len && crt->serial.p[i] == 0) ++i;
+-+	if (i == crt->serial.len) --i;
+-+
+-+	const unsigned char *s = crt->serial.p + i;
+-+	const size_t e = (crt->serial.len - i) * 2;
+-+	if (e >= len)
+-+		return NULL;
+-+  #if 0
+-+	wpa_snprintf_hex_uppercase(serial_num, len, s, crt->serial.len-i);
+-+  #else
+-+	for (i = 0; i < e; i+=2, ++s) {
+-+		serial_num[i+0] = "0123456789ABCDEF"[(*s >>  4)];
+-+		serial_num[i+1] = "0123456789ABCDEF"[(*s & 0xF)];
+-+	}
+-+	serial_num[e] = '\0';
+-+  #endif
+-+	return serial_num;
+-+}
+-+
+-+
+-+char * tls_connection_peer_serial_num(void *tls_ctx,
+-+				      struct tls_connection *conn)
+-+{
+-+	const mbedtls_x509_crt *crt = mbedtls_ssl_get_peer_cert(&conn->ssl);
+-+	if (crt == NULL)
+-+		return NULL;
+-+	size_t len = crt->serial.len * 2 + 1;
+-+	char *serial_num = os_malloc(len);
+-+	if (!serial_num)
+-+		return NULL;
+-+	return tls_mbedtls_peer_serial_num(crt, serial_num, len);
+-+}
+-+
+-+
+-+static void tls_pull_buf_reset(struct tls_connection *conn);
+-+
+-+int tls_connection_shutdown(void *tls_ctx, struct tls_connection *conn)
+-+{
+-+	/* Note: this function called from eap_peer_tls_reauth_init()
+-+	 * for session resumption, not for connection shutdown */
+-+
+-+	if (conn == NULL)
+-+		return -1;
+-+
+-+	tls_pull_buf_reset(conn);
+-+	wpabuf_free(conn->push_buf);
+-+	conn->push_buf = NULL;
+-+	conn->established = 0;
+-+	conn->resumed = 0;
+-+	if (conn->tls_prf_type)
+-+		tls_connection_deinit_expkey(conn);
+-+
+-+	/* RFE: prepare for session resumption? (see doc in crypto/tls.h) */
+-+
+-+	return mbedtls_ssl_session_reset(&conn->ssl);
+-+}
+-+
+-+
+-+static int tls_wpabuf_resize_put_data(struct wpabuf **buf,
+-+                                      const unsigned char *data, size_t dlen)
+-+{
+-+	if (wpabuf_resize(buf, dlen) < 0)
+-+		return 0;
+-+	wpabuf_put_data(*buf, data, dlen);
+-+	return 1;
+-+}
+-+
+-+
+-+static int tls_pull_buf_append(struct tls_connection *conn,
+-+                               const struct wpabuf *in_data)
+-+{
+-+	/*(interface does not lend itself to move semantics)*/
+-+	return tls_wpabuf_resize_put_data(&conn->pull_buf,
+-+	                                  wpabuf_head(in_data),
+-+	                                  wpabuf_len(in_data));
+-+}
+-+
+-+
+-+static void tls_pull_buf_reset(struct tls_connection *conn)
+-+{
+-+	/*(future: might consider reusing conn->pull_buf)*/
+-+	wpabuf_free(conn->pull_buf);
+-+	conn->pull_buf = NULL;
+-+	conn->pull_buf_offset = 0;
+-+}
+-+
+-+
+-+__attribute_cold__
+-+static void tls_pull_buf_discard(struct tls_connection *conn, const char *func)
+-+{
+-+	size_t discard = wpabuf_len(conn->pull_buf) - conn->pull_buf_offset;
+-+	if (discard)
+-+		wpa_printf(MSG_DEBUG,
+-+			   "%s - %zu bytes remaining in pull_buf; discarding",
+-+			   func, discard);
+-+	tls_pull_buf_reset(conn);
+-+}
+-+
+-+
+-+static int tls_pull_func(void *ptr, unsigned char *buf, size_t len)
+-+{
+-+	struct tls_connection *conn = (struct tls_connection *) ptr;
+-+	if (conn->pull_buf == NULL)
+-+		return MBEDTLS_ERR_SSL_WANT_READ;
+-+	const size_t dlen = wpabuf_len(conn->pull_buf) - conn->pull_buf_offset;
+-+	if (dlen == 0)
+-+		return MBEDTLS_ERR_SSL_WANT_READ;
+-+
+-+	if (len > dlen)
+-+		len = dlen;
+-+	os_memcpy(buf, wpabuf_head(conn->pull_buf)+conn->pull_buf_offset, len);
+-+
+-+	if (len == dlen) {
+-+		tls_pull_buf_reset(conn);
+-+		/*wpa_printf(MSG_DEBUG, "%s - emptied pull_buf", __func__);*/
+-+	}
+-+	else {
+-+		conn->pull_buf_offset += len;
+-+		/*wpa_printf(MSG_DEBUG, "%s - %zu bytes remaining in pull_buf",
+-+			   __func__, dlen - len);*/
+-+	}
+-+	return (int)len;
+-+}
+-+
+-+
+-+static int tls_push_func(void *ptr, const unsigned char *buf, size_t len)
+-+{
+-+	struct tls_connection *conn = (struct tls_connection *) ptr;
+-+	return tls_wpabuf_resize_put_data(&conn->push_buf, buf, len)
+-+	  ? (int)len
+-+	  : MBEDTLS_ERR_SSL_ALLOC_FAILED;
+-+}
+-+
+-+
+-+static int
+-+tls_mbedtls_verify_cb (void *arg, mbedtls_x509_crt *crt, int depth, uint32_t *flags);
+-+
+-+
+-+static int tls_mbedtls_ssl_setup(struct tls_connection *conn)
+-+{
+-+  #if 0
+-+	/* mbedtls_ssl_setup() must be called only once */
+-+	/* If this func might be called multiple times (e.g. via set_params),
+-+	 * then we should set a flag in conn that ssl was initialized */
+-+	if (conn->ssl_is_init) {
+-+		mbedtls_ssl_free(&conn->ssl);
+-+		mbedtls_ssl_init(&conn->ssl);
+-+	}
+-+  #endif
+-+
+-+	int ret = mbedtls_ssl_setup(&conn->ssl, &conn->tls_conf->conf);
+-+	if (ret != 0) {
+-+		elog(ret, "mbedtls_ssl_setup");
+-+		return -1;
+-+	}
+-+
+-+	mbedtls_ssl_set_bio(&conn->ssl, conn, tls_push_func, tls_pull_func, NULL);
+-+  #if MBEDTLS_VERSION_NUMBER >= 0x03000000 /* mbedtls 3.0.0 */
+-+	mbedtls_ssl_set_export_keys_cb(
+-+	    &conn->ssl, tls_connection_export_keys_cb, conn);
+-+  #elif MBEDTLS_VERSION_NUMBER >= 0x02120000 /* mbedtls 2.18.0 */
+-+	mbedtls_ssl_conf_export_keys_ext_cb(
+-+	    &conn->tls_conf->conf, tls_connection_export_keys_cb, conn);
+-+  #endif
+-+	if (conn->verify_peer)
+-+		mbedtls_ssl_set_verify(&conn->ssl, tls_mbedtls_verify_cb, conn);
+-+
+-+	return 0;
+-+}
+-+
+-+
+-+static int tls_mbedtls_data_is_pem(const u8 *data)
+-+{
+-+    return (NULL != os_strstr((char *)data, "-----"));
+-+}
+-+
+-+
+-+static void tls_mbedtls_set_allowed_tls_vers(struct tls_conf *tls_conf,
+-+                                             mbedtls_ssl_config *conf)
+-+{
+-+  #if !defined(MBEDTLS_SSL_PROTO_TLS1_3)
+-+	tls_conf->flags |= TLS_CONN_DISABLE_TLSv1_3;
+-+  #endif
+-+
+-+	/* unconditionally require TLSv1.2+ for TLS_CONN_SUITEB */
+-+	if (tls_conf->flags & TLS_CONN_SUITEB) {
+-+		tls_conf->flags |= TLS_CONN_DISABLE_TLSv1_0;
+-+		tls_conf->flags |= TLS_CONN_DISABLE_TLSv1_1;
+-+	}
+-+
+-+	const unsigned int flags = tls_conf->flags;
+-+
+-+	/* attempt to map flags to min and max TLS protocol version */
+-+
+-+	int min = (flags & TLS_CONN_DISABLE_TLSv1_0)
+-+		? (flags & TLS_CONN_DISABLE_TLSv1_1)
+-+		? (flags & TLS_CONN_DISABLE_TLSv1_2)
+-+		? (flags & TLS_CONN_DISABLE_TLSv1_3)
+-+		? 4
+-+		: 3
+-+		: 2
+-+		: 1
+-+		: 0;
+-+
+-+	int max = (flags & TLS_CONN_DISABLE_TLSv1_3)
+-+		? (flags & TLS_CONN_DISABLE_TLSv1_2)
+-+		? (flags & TLS_CONN_DISABLE_TLSv1_1)
+-+		? (flags & TLS_CONN_DISABLE_TLSv1_0)
+-+		? -1
+-+		: 0
+-+		: 1
+-+		: 2
+-+		: 3;
+-+
+-+	if ((flags & TLS_CONN_ENABLE_TLSv1_2) && min > 2) min = 2;
+-+	if ((flags & TLS_CONN_ENABLE_TLSv1_1) && min > 1) min = 1;
+-+	if ((flags & TLS_CONN_ENABLE_TLSv1_0) && min > 0) min = 0;
+-+	if (max < min) {
+-+		emsg(MSG_ERROR, "invalid tls_disable_tlsv* params; ignoring");
+-+		return;
+-+	}
+-+  #if MBEDTLS_VERSION_NUMBER >= 0x03000000 /* mbedtls 3.0.0 */
+-+	/* mbed TLS 3.0.0 removes support for protocols < TLSv1.2 */
+-+	if (min < 2 || max < 2) {
+-+		emsg(MSG_ERROR, "invalid tls_disable_tlsv* params; ignoring");
+-+		if (min < 2) min = 2;
+-+		if (max < 2) max = 2;
+-+	}
+-+  #endif
+-+
+-+  #if MBEDTLS_VERSION_NUMBER >= 0x03020000 /* mbedtls 3.2.0 */
+-+	/* MBEDTLS_SSL_VERSION_TLS1_2 = 0x0303 *//*!< (D)TLS 1.2 */
+-+	/* MBEDTLS_SSL_VERSION_TLS1_3 = 0x0304 *//*!< (D)TLS 1.3 */
+-+	min = (min == 2) ? MBEDTLS_SSL_VERSION_TLS1_2 : MBEDTLS_SSL_VERSION_TLS1_3;
+-+	max = (max == 2) ? MBEDTLS_SSL_VERSION_TLS1_2 : MBEDTLS_SSL_VERSION_TLS1_3;
+-+	mbedtls_ssl_conf_min_tls_version(conf, min);
+-+	mbedtls_ssl_conf_max_tls_version(conf, max);
+-+  #else
+-+   #ifndef MBEDTLS_SSL_MINOR_VERSION_4
+-+	if (min == 3) min = 2;
+-+	if (max == 3) max = 2;
+-+   #endif
+-+	/* MBEDTLS_SSL_MINOR_VERSION_0  0 *//*!< SSL v3.0 */
+-+	/* MBEDTLS_SSL_MINOR_VERSION_1  1 *//*!< TLS v1.0 */
+-+	/* MBEDTLS_SSL_MINOR_VERSION_2  2 *//*!< TLS v1.1 */
+-+	/* MBEDTLS_SSL_MINOR_VERSION_3  3 *//*!< TLS v1.2 */
+-+	/* MBEDTLS_SSL_MINOR_VERSION_4  4 *//*!< TLS v1.3 */
+-+	mbedtls_ssl_conf_min_version(conf, MBEDTLS_SSL_MAJOR_VERSION_3, min+1);
+-+	mbedtls_ssl_conf_max_version(conf, MBEDTLS_SSL_MAJOR_VERSION_3, max+1);
+-+  #endif
+-+}
+-+
+-+
+-+__attribute_noinline__
+-+static int tls_mbedtls_readfile(const char *path, u8 **buf, size_t *n);
+-+
+-+
+-+static int
+-+tls_mbedtls_set_dhparams(struct tls_conf *tls_conf, const char *dh_file)
+-+{
+-+    size_t len;
+-+    u8 *data;
+-+    if (tls_mbedtls_readfile(dh_file, &data, &len))
+-+        return 0;
+-+
+-+    /* parse only if DH parameters if in PEM format */
+-+    if (tls_mbedtls_data_is_pem(data)
+-+        && NULL == os_strstr((char *)data, "-----BEGIN DH PARAMETERS-----")) {
+-+        if (os_strstr((char *)data, "-----BEGIN DSA PARAMETERS-----"))
+-+            wpa_printf(MSG_WARNING, "DSA parameters not handled (%s)", dh_file);
+-+        else
+-+            wpa_printf(MSG_WARNING, "unexpected DH param content (%s)",dh_file);
+-+        forced_memzero(data, len);
+-+        os_free(data);
+-+        return 0;
+-+    }
+-+
+-+    /* mbedtls_dhm_parse_dhm() expects "-----BEGIN DH PARAMETERS-----" if PEM */
+-+    mbedtls_dhm_context dhm;
+-+    mbedtls_dhm_init(&dhm);
+-+    int rc = mbedtls_dhm_parse_dhm(&dhm, data, len);
+-+    if (0 == rc)
+-+        rc = mbedtls_ssl_conf_dh_param_ctx(&tls_conf->conf, &dhm);
+-+    if (0 != rc)
+-+        elog(rc, dh_file);
+-+    mbedtls_dhm_free(&dhm);
+-+
+-+    forced_memzero(data, len);
+-+    os_free(data);
+-+    return (0 == rc);
+-+}
+-+
+-+
+-+/* reference: lighttpd src/mod_mbedtls.c:mod_mbedtls_ssl_append_curve()
+-+ * (same author: gstrauss@gluelogic.com; same license: BSD-3-Clause) */
+-+#if MBEDTLS_VERSION_NUMBER < 0x03010000 /* mbedtls 3.1.0 */
+-+static int
+-+tls_mbedtls_append_curve (mbedtls_ecp_group_id *ids, int nids, int idsz, const mbedtls_ecp_group_id id)
+-+{
+-+    if (1 >= idsz - (nids + 1)) {
+-+        emsg(MSG_ERROR, "error: too many curves during list expand");
+-+        return -1;
+-+    }
+-+    ids[++nids] = id;
+-+    return nids;
+-+}
+-+
+-+
+-+static int
+-+tls_mbedtls_set_curves(struct tls_conf *tls_conf, const char *curvelist)
+-+{
+-+    mbedtls_ecp_group_id ids[512];
+-+    int nids = -1;
+-+    const int idsz = (int)(sizeof(ids)/sizeof(*ids)-1);
+-+    const mbedtls_ecp_curve_info * const curve_info = mbedtls_ecp_curve_list();
+-+
+-+    for (const char *e = curvelist-1; e; ) {
+-+        const char * const n = e+1;
+-+        e = os_strchr(n, ':');
+-+        size_t len = e ? (size_t)(e - n) : os_strlen(n);
+-+        mbedtls_ecp_group_id grp_id = MBEDTLS_ECP_DP_NONE;
+-+        switch (len) {
+-+          case 5:
+-+            if (0 == os_memcmp("P-521", n, 5))
+-+                grp_id = MBEDTLS_ECP_DP_SECP521R1;
+-+            else if (0 == os_memcmp("P-384", n, 5))
+-+                grp_id = MBEDTLS_ECP_DP_SECP384R1;
+-+            else if (0 == os_memcmp("P-256", n, 5))
+-+                grp_id = MBEDTLS_ECP_DP_SECP256R1;
+-+            break;
+-+          case 6:
+-+            if (0 == os_memcmp("BP-521", n, 6))
+-+                grp_id = MBEDTLS_ECP_DP_BP512R1;
+-+            else if (0 == os_memcmp("BP-384", n, 6))
+-+                grp_id = MBEDTLS_ECP_DP_BP384R1;
+-+            else if (0 == os_memcmp("BP-256", n, 6))
+-+                grp_id = MBEDTLS_ECP_DP_BP256R1;
+-+            break;
+-+          default:
+-+            break;
+-+        }
+-+        if (grp_id != MBEDTLS_ECP_DP_NONE) {
+-+            nids = tls_mbedtls_append_curve(ids, nids, idsz, grp_id);
+-+            if (-1 == nids) return 0;
+-+            continue;
+-+        }
+-+        /* similar to mbedtls_ecp_curve_info_from_name() */
+-+        const mbedtls_ecp_curve_info *info;
+-+        for (info = curve_info; info->grp_id != MBEDTLS_ECP_DP_NONE; ++info) {
+-+            if (0 == os_strncmp(info->name, n, len) && info->name[len] == '\0')
+-+                break;
+-+        }
+-+        if (info->grp_id == MBEDTLS_ECP_DP_NONE) {
+-+            wpa_printf(MSG_ERROR, "MTLS: unrecognized curve: %.*s",(int)len,n);
+-+            return 0;
+-+        }
+-+
+-+        nids = tls_mbedtls_append_curve(ids, nids, idsz, info->grp_id);
+-+        if (-1 == nids) return 0;
+-+    }
+-+
+-+    /* mod_openssl configures "prime256v1" if curve list not specified,
+-+     * but mbedtls provides a list of supported curves if not explicitly set */
+-+    if (-1 == nids) return 1; /* empty list; no-op */
+-+
+-+    ids[++nids] = MBEDTLS_ECP_DP_NONE; /* terminate list */
+-+    ++nids;
+-+
+-+    /* curves list must be persistent for lifetime of mbedtls_ssl_config */
+-+    tls_conf->curves = os_malloc(nids * sizeof(mbedtls_ecp_group_id));
+-+    if (tls_conf->curves == NULL)
+-+        return 0;
+-+    os_memcpy(tls_conf->curves, ids, nids * sizeof(mbedtls_ecp_group_id));
+-+
+-+    mbedtls_ssl_conf_curves(&tls_conf->conf, tls_conf->curves);
+-+    return 1;
+-+}
+-+#else
+-+static int
+-+tls_mbedtls_append_curve (uint16_t *ids, int nids, int idsz, const uint16_t id)
+-+{
+-+    if (1 >= idsz - (nids + 1)) {
+-+        emsg(MSG_ERROR, "error: too many curves during list expand");
+-+        return -1;
+-+    }
+-+    ids[++nids] = id;
+-+    return nids;
+-+}
+-+
+-+
+-+static int
+-+tls_mbedtls_set_curves(struct tls_conf *tls_conf, const char *curvelist)
+-+{
+-+    /* TLS Supported Groups (renamed from "EC Named Curve Registry")
+-+     * https://www.iana.org/assignments/tls-parameters/tls-parameters.xhtml#tls-parameters-8
+-+     */
+-+    uint16_t ids[512];
+-+    int nids = -1;
+-+    const int idsz = (int)(sizeof(ids)/sizeof(*ids)-1);
+-+    const mbedtls_ecp_curve_info * const curve_info = mbedtls_ecp_curve_list();
+-+
+-+    for (const char *e = curvelist-1; e; ) {
+-+        const char * const n = e+1;
+-+        e = os_strchr(n, ':');
+-+        size_t len = e ? (size_t)(e - n) : os_strlen(n);
+-+        uint16_t tls_id = 0;
+-+        switch (len) {
+-+          case 5:
+-+            if (0 == os_memcmp("P-521", n, 5))
+-+                tls_id = 25; /* mbedtls_ecp_group_id MBEDTLS_ECP_DP_SECP521R1 */
+-+            else if (0 == os_memcmp("P-384", n, 5))
+-+                tls_id = 24; /* mbedtls_ecp_group_id MBEDTLS_ECP_DP_SECP384R1 */
+-+            else if (0 == os_memcmp("P-256", n, 5))
+-+                tls_id = 23; /* mbedtls_ecp_group_id MBEDTLS_ECP_DP_SECP256R1 */
+-+            break;
+-+          case 6:
+-+            if (0 == os_memcmp("BP-521", n, 6))
+-+                tls_id = 28; /* mbedtls_ecp_group_id MBEDTLS_ECP_DP_BP512R1 */
+-+            else if (0 == os_memcmp("BP-384", n, 6))
+-+                tls_id = 27; /* mbedtls_ecp_group_id MBEDTLS_ECP_DP_BP384R1 */
+-+            else if (0 == os_memcmp("BP-256", n, 6))
+-+                tls_id = 26; /* mbedtls_ecp_group_id MBEDTLS_ECP_DP_BP256R1 */
+-+            break;
+-+          default:
+-+            break;
+-+        }
+-+        if (tls_id != 0) {
+-+            nids = tls_mbedtls_append_curve(ids, nids, idsz, tls_id);
+-+            if (-1 == nids) return 0;
+-+            continue;
+-+        }
+-+        /* similar to mbedtls_ecp_curve_info_from_name() */
+-+        const mbedtls_ecp_curve_info *info;
+-+        for (info = curve_info; info->tls_id != 0; ++info) {
+-+            if (0 == os_strncmp(info->name, n, len) && info->name[len] == '\0')
+-+                break;
+-+        }
+-+        if (info->tls_id == 0) {
+-+            wpa_printf(MSG_ERROR, "MTLS: unrecognized curve: %.*s",(int)len,n);
+-+            return 0;
+-+        }
+-+
+-+        nids = tls_mbedtls_append_curve(ids, nids, idsz, info->tls_id);
+-+        if (-1 == nids) return 0;
+-+    }
+-+
+-+    /* mod_openssl configures "prime256v1" if curve list not specified,
+-+     * but mbedtls provides a list of supported curves if not explicitly set */
+-+    if (-1 == nids) return 1; /* empty list; no-op */
+-+
+-+    ids[++nids] = 0; /* terminate list */
+-+    ++nids;
+-+
+-+    /* curves list must be persistent for lifetime of mbedtls_ssl_config */
+-+    tls_conf->curves = os_malloc(nids * sizeof(uint16_t));
+-+    if (tls_conf->curves == NULL)
+-+        return 0;
+-+    os_memcpy(tls_conf->curves, ids, nids * sizeof(uint16_t));
+-+
+-+    mbedtls_ssl_conf_groups(&tls_conf->conf, tls_conf->curves);
+-+    return 1;
+-+}
+-+#endif /* MBEDTLS_VERSION_NUMBER >= 0x03010000 */ /* mbedtls 3.1.0 */
+-+
+-+
+-+/* data copied from lighttpd src/mod_mbedtls.c (BSD-3-Clause) */
+-+static const int suite_AES_256_ephemeral[] = {
+-+    /* All AES-256 ephemeral suites */
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384,
+-+    MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384,
+-+    MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA,
+-+    MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM_8
+-+};
+-+
+-+/* data copied from lighttpd src/mod_mbedtls.c (BSD-3-Clause) */
+-+static const int suite_AES_128_ephemeral[] = {
+-+    /* All AES-128 ephemeral suites */
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256,
+-+    MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256,
+-+    MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA,
+-+    MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM_8
+-+};
+-+
+-+/* data copied from lighttpd src/mod_mbedtls.c (BSD-3-Clause) */
+-+/* HIGH cipher list (mapped from openssl list to mbedtls) */
+-+static const int suite_HIGH[] = {
+-+    MBEDTLS_TLS_ECDHE_RSA_WITH_CHACHA20_POLY1305_SHA256,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_CHACHA20_POLY1305_SHA256,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_CHACHA20_POLY1305_SHA256,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384,
+-+    MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384,
+-+    MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA,
+-+    MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM_8,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384,
+-+    MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_GCM_SHA384,
+-+    MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_GCM_SHA384,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_GCM_SHA384,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256,
+-+    MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256,
+-+    MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA,
+-+    MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM_8,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256,
+-+    MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA,
+-+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_GCM_SHA256,
+-+    MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_GCM_SHA256,
+-+    MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_GCM_SHA256,
+-+    MBEDTLS_TLS_ECDHE_PSK_WITH_CHACHA20_POLY1305_SHA256,
+-+    MBEDTLS_TLS_DHE_PSK_WITH_CHACHA20_POLY1305_SHA256,
+-+    MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384,
+-+    MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM,
+-+    MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384,
+-+    MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384,
+-+    MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA,
+-+    MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA,
+-+    MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384,
+-+    MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384,
+-+    MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM_8,
+-+    MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_GCM_SHA384,
+-+    MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256,
+-+    MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM,
+-+    MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256,
+-+    MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256,
+-+    MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA,
+-+    MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA,
+-+    MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256,
+-+    MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256,
+-+    MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM_8,
+-+    MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_GCM_SHA256,
+-+    MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384,
+-+    MBEDTLS_TLS_RSA_WITH_AES_256_CCM,
+-+    MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256,
+-+    MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA,
+-+    MBEDTLS_TLS_RSA_WITH_AES_256_CCM_8,
+-+    MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256,
+-+    MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA,
+-+    MBEDTLS_TLS_RSA_WITH_ARIA_256_GCM_SHA384,
+-+    MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256,
+-+    MBEDTLS_TLS_RSA_WITH_AES_128_CCM,
+-+    MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256,
+-+    MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA,
+-+    MBEDTLS_TLS_RSA_WITH_AES_128_CCM_8,
+-+    MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256,
+-+    MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA,
+-+    MBEDTLS_TLS_RSA_WITH_ARIA_128_GCM_SHA256,
+-+    MBEDTLS_TLS_RSA_PSK_WITH_CHACHA20_POLY1305_SHA256,
+-+    MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384,
+-+    MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384,
+-+    MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA,
+-+    MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384,
+-+    MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_GCM_SHA384,
+-+    MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256,
+-+    MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256,
+-+    MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA,
+-+    MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256,
+-+    MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_GCM_SHA256,
+-+    MBEDTLS_TLS_PSK_WITH_CHACHA20_POLY1305_SHA256,
+-+    MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384,
+-+    MBEDTLS_TLS_PSK_WITH_AES_256_CCM,
+-+    MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384,
+-+    MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA,
+-+    MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384,
+-+    MBEDTLS_TLS_PSK_WITH_AES_256_CCM_8,
+-+    MBEDTLS_TLS_PSK_WITH_ARIA_256_GCM_SHA384,
+-+    MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256,
+-+    MBEDTLS_TLS_PSK_WITH_AES_128_CCM,
+-+    MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256,
+-+    MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA,
+-+    MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256,
+-+    MBEDTLS_TLS_PSK_WITH_AES_128_CCM_8,
+-+    MBEDTLS_TLS_PSK_WITH_ARIA_128_GCM_SHA256
+-+};
+-+
+-+
+-+__attribute_noinline__
+-+static int
+-+tls_mbedtls_append_ciphersuite (int *ids, int nids, int idsz, const int *x, int xsz)
+-+{
+-+    if (xsz >= idsz - (nids + 1)) {
+-+        emsg(MSG_ERROR, "error: too many ciphers during list expand");
+-+        return -1;
+-+    }
+-+
+-+    for (int i = 0; i < xsz; ++i)
+-+        ids[++nids] = x[i];
+-+
+-+    return nids;
+-+}
+-+
+-+
+-+static int
+-+tls_mbedtls_translate_ciphername(int id, char *buf, size_t buflen)
+-+{
+-+    const mbedtls_ssl_ciphersuite_t *info =
+-+      mbedtls_ssl_ciphersuite_from_id(id);
+-+    if (info == NULL)
+-+        return 0;
+-+    const char *name = mbedtls_ssl_ciphersuite_get_name(info);
+-+    const size_t len = os_strlen(name);
+-+    if (len == 7 && 0 == os_memcmp(name, "unknown", 7))
+-+        return 0;
+-+    if (len >= buflen)
+-+        return 0;
+-+    os_strlcpy(buf, name, buflen);
+-+
+-+    /* attempt to translate mbedtls string to openssl string
+-+     * (some heuristics; incomplete) */
+-+    size_t i = 0, j = 0;
+-+    if (buf[0] == 'T') {
+-+        if (os_strncmp(buf, "TLS1-3-", 7) == 0) {
+-+            buf[3] = '-';
+-+            j = 4; /* remove "1-3" from "TLS1-3-" prefix */
+-+            i = 7;
+-+        }
+-+        else if (os_strncmp(buf, "TLS-", 4) == 0)
+-+            i = 4; /* remove "TLS-" prefix */
+-+    }
+-+    for (; buf[i]; ++i) {
+-+        if (buf[i] == '-') {
+-+            if (i >= 3) {
+-+                if (0 == os_memcmp(buf+i-3, "AES", 3))
+-+                    continue; /* "AES-" -> "AES" */
+-+            }
+-+            if (i >= 4) {
+-+                if (0 == os_memcmp(buf+i-4, "WITH", 4)) {
+-+                    j -= 4;   /* remove "WITH-" */
+-+                    continue;
+-+                }
+-+            }
+-+        }
+-+        buf[j++] = buf[i];
+-+    }
+-+    buf[j] = '\0';
+-+
+-+    return j;
+-+}
+-+
+-+
+-+__attribute_noinline__
+-+static int
+-+tls_mbedtls_set_ciphersuites(struct tls_conf *tls_conf, int *ids, int nids)
+-+{
+-+    /* ciphersuites list must be persistent for lifetime of mbedtls_ssl_config*/
+-+    os_free(tls_conf->ciphersuites);
+-+    tls_conf->ciphersuites = os_malloc(nids * sizeof(int));
+-+    if (tls_conf->ciphersuites == NULL)
+-+        return 0;
+-+    os_memcpy(tls_conf->ciphersuites, ids, nids * sizeof(int));
+-+    mbedtls_ssl_conf_ciphersuites(&tls_conf->conf, tls_conf->ciphersuites);
+-+    return 1;
+-+}
+-+
+-+
+-+static int
+-+tls_mbedtls_set_ciphers(struct tls_conf *tls_conf, const char *ciphers)
+-+{
+-+    char buf[64];
+-+    int ids[512];
+-+    int nids = -1;
+-+    const int idsz = (int)(sizeof(ids)/sizeof(*ids)-1);
+-+    const char *next;
+-+    size_t blen, clen;
+-+    do {
+-+        next = os_strchr(ciphers, ':');
+-+        clen = next ? (size_t)(next - ciphers) : os_strlen(ciphers);
+-+        if (!clen)
+-+            continue;
+-+
+-+        /* special-case a select set of openssl group names for hwsim tests */
+-+	/* (review; remove excess code if tests are not run for non-OpenSSL?) */
+-+        if (clen == 9 && os_memcmp(ciphers, "SUITEB192", 9) == 0) {
+-+            static int ssl_preset_suiteb192_ciphersuites[] = {
+-+                MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384,
+-+                0
+-+            };
+-+            return tls_mbedtls_set_ciphersuites(tls_conf,
+-+                                                ssl_preset_suiteb192_ciphersuites,
+-+                                                2);
+-+        }
+-+        if (clen == 9 && os_memcmp(ciphers, "SUITEB128", 9) == 0) {
+-+            static int ssl_preset_suiteb128_ciphersuites[] = {
+-+                MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256,
+-+                0
+-+            };
+-+            return tls_mbedtls_set_ciphersuites(tls_conf,
+-+                                                ssl_preset_suiteb128_ciphersuites,
+-+                                                2);
+-+        }
+-+        if (clen == 7 && os_memcmp(ciphers, "DEFAULT", 7) == 0)
+-+            continue;
+-+        if (clen == 6 && os_memcmp(ciphers, "AES128", 6) == 0) {
+-+            nids = tls_mbedtls_append_ciphersuite(ids, nids, idsz,
+-+                     suite_AES_128_ephemeral,
+-+                     (int)ARRAY_SIZE(suite_AES_128_ephemeral));
+-+            if (nids == -1)
+-+                return 0;
+-+            continue;
+-+        }
+-+        if (clen == 6 && os_memcmp(ciphers, "AES256", 6) == 0) {
+-+            nids = tls_mbedtls_append_ciphersuite(ids, nids, idsz,
+-+                     suite_AES_256_ephemeral,
+-+                     (int)ARRAY_SIZE(suite_AES_256_ephemeral));
+-+            if (nids == -1)
+-+                return 0;
+-+            continue;
+-+        }
+-+        if (clen == 4 && os_memcmp(ciphers, "HIGH", 4) == 0) {
+-+            nids = tls_mbedtls_append_ciphersuite(ids, nids, idsz, suite_HIGH,
+-+                                                  (int)ARRAY_SIZE(suite_HIGH));
+-+            if (nids == -1)
+-+                return 0;
+-+            continue;
+-+        }
+-+        /* ignore anonymous cipher group names (?not supported by mbedtls?) */
+-+        if (clen == 4 && os_memcmp(ciphers, "!ADH", 4) == 0)
+-+            continue;
+-+        if (clen == 6 && os_memcmp(ciphers, "-aECDH", 6) == 0)
+-+            continue;
+-+        if (clen == 7 && os_memcmp(ciphers, "-aECDSA", 7) == 0)
+-+            continue;
+-+
+-+        /* attempt to match mbedtls cipher names
+-+         * nb: does not support openssl group names or list manipulation syntax
+-+         *   (alt: could copy almost 1200 lines (!!!) of lighttpd mod_mbedtls.c
+-+         *    mod_mbedtls_ssl_conf_ciphersuites() to translate strings)
+-+         * note: not efficient to rewrite list for each ciphers entry,
+-+         *       but this code is expected to run only at startup
+-+         */
+-+        const int *list = mbedtls_ssl_list_ciphersuites();
+-+        for (; *list; ++list) {
+-+            blen = tls_mbedtls_translate_ciphername(*list,buf,sizeof(buf));
+-+            if (!blen)
+-+                continue;
+-+
+-+            /* matching heuristics additional to translate_ciphername above */
+-+            if (blen == clen+4) {
+-+                char *cbc = os_strstr(buf, "CBC-");
+-+                if (cbc) {
+-+                    os_memmove(cbc, cbc+4, blen-(cbc+4-buf)+1); /*(w/ '\0')*/
+-+                    blen -= 4;
+-+                }
+-+            }
+-+            if (blen >= clen && os_memcmp(ciphers, buf, clen) == 0
+-+                && (blen == clen
+-+                    || (blen == clen+7 && os_memcmp(buf+clen, "-SHA256", 7)))) {
+-+                if (1 >= idsz - (nids + 1)) {
+-+                    emsg(MSG_ERROR,
+-+                         "error: too many ciphers during list expand");
+-+                    return 0;
+-+                }
+-+                ids[++nids] = *list;
+-+                break;
+-+            }
+-+        }
+-+        if (*list == 0) {
+-+            wpa_printf(MSG_ERROR,
+-+                       "MTLS: unrecognized cipher: %.*s", (int)clen, ciphers);
+-+            return 0;
+-+        }
+-+    } while ((ciphers = next ? next+1 : NULL));
+-+
+-+    if (-1 == nids) return 1; /* empty list; no-op */
+-+
+-+    ids[++nids] = 0; /* terminate list */
+-+    ++nids;
+-+
+-+    return tls_mbedtls_set_ciphersuites(tls_conf, ids, nids);
+-+}
+-+
+-+
+-+__attribute_noinline__
+-+static int tls_mbedtls_set_item(char **config_item, const char *item)
+-+{
+-+	os_free(*config_item);
+-+	*config_item = NULL;
+-+	return item ? (*config_item = os_strdup(item)) != NULL : 1;
+-+}
+-+
+-+
+-+static int tls_connection_set_subject_match(struct tls_conf *tls_conf,
+-+                                            const struct tls_connection_params *params)
+-+{
+-+	int rc = 1;
+-+	rc &= tls_mbedtls_set_item(&tls_conf->subject_match,
+-+	                              params->subject_match);
+-+	rc &= tls_mbedtls_set_item(&tls_conf->altsubject_match,
+-+	                              params->altsubject_match);
+-+	rc &= tls_mbedtls_set_item(&tls_conf->suffix_match,
+-+	                              params->suffix_match);
+-+	rc &= tls_mbedtls_set_item(&tls_conf->domain_match,
+-+	                              params->domain_match);
+-+	rc &= tls_mbedtls_set_item(&tls_conf->check_cert_subject,
+-+	                              params->check_cert_subject);
+-+	return rc;
+-+}
+-+
+-+
+-+/* duplicated in crypto_mbedtls.c:crypto_mbedtls_readfile()*/
+-+__attribute_noinline__
+-+static int tls_mbedtls_readfile(const char *path, u8 **buf, size_t *n)
+-+{
+-+  #if 0 /* #ifdef MBEDTLS_FS_IO */
+-+	/*(includes +1 for '\0' needed by mbedtls PEM parsing funcs)*/
+-+	if (mbedtls_pk_load_file(path, (unsigned char **)buf, n) != 0) {
+-+		wpa_printf(MSG_ERROR, "error: mbedtls_pk_load_file %s", path);
+-+		return -1;
+-+	}
+-+  #else
+-+	/*(use os_readfile() so that we can use os_free()
+-+	 *(if we use mbedtls_pk_load_file() above, macros prevent calling free()
+-+	 * directly #if defined(OS_REJECT_C_LIB_FUNCTIONS) and calling os_free()
+-+	 * on buf aborts in tests if buf not allocated via os_malloc())*/
+-+	*buf = (u8 *)os_readfile(path, n);
+-+	if (!*buf) {
+-+		wpa_printf(MSG_ERROR, "error: os_readfile %s", path);
+-+		return -1;
+-+	}
+-+	u8 *buf0 = os_realloc(*buf, *n+1);
+-+	if (!buf0) {
+-+		bin_clear_free(*buf, *n);
+-+		*buf = NULL;
+-+		return -1;
+-+	}
+-+	buf0[(*n)++] = '\0';
+-+	*buf = buf0;
+-+  #endif
+-+	return 0;
+-+}
+-+
+-+
+-+static int tls_mbedtls_set_crl(struct tls_conf *tls_conf, const u8 *data, size_t len)
+-+{
+-+	/* do not use mbedtls_x509_crl_parse() on PEM unless it contains CRL */
+-+	if (len && data[len-1] == '\0'
+-+	    && NULL == os_strstr((const char *)data,"-----BEGIN X509 CRL-----")
+-+	    && tls_mbedtls_data_is_pem(data))
+-+		return 0;
+-+
+-+	mbedtls_x509_crl crl;
+-+	mbedtls_x509_crl_init(&crl);
+-+	int rc = mbedtls_x509_crl_parse(&crl, data, len);
+-+	if (rc < 0) {
+-+		mbedtls_x509_crl_free(&crl);
+-+		return rc == MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT ? 0 : rc;
+-+	}
+-+
+-+	mbedtls_x509_crl *crl_new = os_malloc(sizeof(crl));
+-+	if (crl_new == NULL) {
+-+		mbedtls_x509_crl_free(&crl);
+-+		return MBEDTLS_ERR_X509_ALLOC_FAILED;
+-+	}
+-+	os_memcpy(crl_new, &crl, sizeof(crl));
+-+
+-+	mbedtls_x509_crl *crl_old = tls_conf->crl;
+-+	tls_conf->crl = crl_new;
+-+	if (crl_old) {
+-+		mbedtls_x509_crl_free(crl_old);
+-+		os_free(crl_old);
+-+	}
+-+	return 0;
+-+}
+-+
+-+
+-+static int tls_mbedtls_set_ca(struct tls_conf *tls_conf, u8 *data, size_t len)
+-+{
+-+	/* load crt struct onto stack and then copy into tls_conf in
+-+	 * order to preserve existing tls_conf value if error occurs
+-+	 *
+-+	 * hostapd is not threaded, or else should allocate memory and swap in
+-+	 * pointer reduce race condition.  (If threaded, would also need to
+-+	 * keep reference count of use to avoid freeing while still in use.) */
+-+
+-+	mbedtls_x509_crt crt;
+-+	mbedtls_x509_crt_init(&crt);
+-+	int rc = mbedtls_x509_crt_parse(&crt, data, len);
+-+	if (rc < 0) {
+-+		mbedtls_x509_crt_free(&crt);
+-+		return rc;
+-+	}
+-+
+-+	mbedtls_x509_crt_free(&tls_conf->ca_cert);
+-+	os_memcpy(&tls_conf->ca_cert, &crt, sizeof(crt));
+-+	return 0;
+-+}
+-+
+-+
+-+static int tls_mbedtls_set_ca_and_crl(struct tls_conf *tls_conf, const char *ca_cert_file)
+-+{
+-+	size_t len;
+-+	u8 *data;
+-+	if (tls_mbedtls_readfile(ca_cert_file, &data, &len))
+-+		return -1;
+-+
+-+	int rc;
+-+	if (0 == (rc = tls_mbedtls_set_ca(tls_conf, data, len))
+-+	    && (!tls_mbedtls_data_is_pem(data) /*skip parse for CRL if not PEM*/
+-+	        || 0 == (rc = tls_mbedtls_set_crl(tls_conf, data, len)))) {
+-+		mbedtls_ssl_conf_ca_chain(&tls_conf->conf,
+-+		                          &tls_conf->ca_cert,
+-+		                          tls_conf->crl);
+-+	}
+-+	else {
+-+		elog(rc, __func__);
+-+		emsg(MSG_ERROR, ca_cert_file);
+-+	}
+-+
+-+	forced_memzero(data, len);
+-+	os_free(data);
+-+	return rc;
+-+}
+-+
+-+
+-+static void tls_mbedtls_refresh_crl(void)
+-+{
+-+	/* check for CRL refresh
+-+	 * continue even if error occurs; continue with previous cert, CRL */
+-+	unsigned int crl_reload_interval = tls_ctx_global.crl_reload_interval;
+-+	const char *ca_cert_file = tls_ctx_global.ca_cert_file;
+-+	if (!crl_reload_interval || !ca_cert_file)
+-+		return;
+-+
+-+	struct os_reltime *previous = &tls_ctx_global.crl_reload_previous;
+-+	struct os_reltime now;
+-+	if (os_get_reltime(&now) != 0
+-+	    || !os_reltime_expired(&now, previous, crl_reload_interval))
+-+		return;
+-+
+-+	/* Note: modifying global state is not thread-safe
+-+	 *       if in use by existing connections
+-+	 *
+-+	 * src/utils/os.h does not provide a portable stat()
+-+	 * or else it would be a good idea to check mtime and size,
+-+	 * and avoid reloading if file has not changed */
+-+
+-+	if (tls_mbedtls_set_ca_and_crl(tls_ctx_global.tls_conf, ca_cert_file) == 0)
+-+		*previous = now;
+-+}
+-+
+-+
+-+static int tls_mbedtls_set_ca_cert(struct tls_conf *tls_conf,
+-+				   const struct tls_connection_params *params)
+-+{
+-+	if (params->ca_cert) {
+-+		if (os_strncmp(params->ca_cert, "probe://", 8) == 0) {
+-+			tls_conf->ca_cert_probe = 1;
+-+			tls_conf->has_ca_cert = 1;
+-+			return 0;
+-+		}
+-+
+-+		if (os_strncmp(params->ca_cert, "hash://", 7) == 0) {
+-+			const char *pos = params->ca_cert + 7;
+-+			if (os_strncmp(pos, "server/sha256/", 14) != 0) {
+-+				emsg(MSG_ERROR, "unsupported ca_cert hash value");
+-+				return -1;
+-+			}
+-+			pos += 14;
+-+			if (os_strlen(pos) != SHA256_DIGEST_LENGTH*2) {
+-+				emsg(MSG_ERROR, "unexpected ca_cert hash length");
+-+				return -1;
+-+			}
+-+			if (hexstr2bin(pos, tls_conf->ca_cert_hash,
+-+			               SHA256_DIGEST_LENGTH) < 0) {
+-+				emsg(MSG_ERROR, "invalid ca_cert hash value");
+-+				return -1;
+-+			}
+-+			emsg(MSG_DEBUG, "checking only server certificate match");
+-+			tls_conf->verify_depth0_only = 1;
+-+			tls_conf->has_ca_cert = 1;
+-+			return 0;
+-+		}
+-+
+-+		if (tls_mbedtls_set_ca_and_crl(tls_conf, params->ca_cert) != 0)
+-+			return -1;
+-+	}
+-+	if (params->ca_cert_blob) {
+-+		size_t len = params->ca_cert_blob_len;
+-+		int is_pem = tls_mbedtls_data_is_pem(params->ca_cert_blob);
+-+		if (len && params->ca_cert_blob[len-1] != '\0' && is_pem)
+-+			++len; /*(include '\0' in len for PEM)*/
+-+		int ret = mbedtls_x509_crt_parse(&tls_conf->ca_cert,
+-+		                                 params->ca_cert_blob, len);
+-+		if (ret != 0) {
+-+			elog(ret, "mbedtls_x509_crt_parse");
+-+			return -1;
+-+		}
+-+		if (is_pem) { /*(ca_cert_blob in DER format contains ca cert only)*/
+-+			ret = tls_mbedtls_set_crl(tls_conf, params->ca_cert_blob, len);
+-+			if (ret != 0) {
+-+				elog(ret, "mbedtls_x509_crl_parse");
+-+				return -1;
+-+			}
+-+		}
+-+	}
+-+
+-+	if (mbedtls_x509_time_is_future(&tls_conf->ca_cert.valid_from)
+-+	    || mbedtls_x509_time_is_past(&tls_conf->ca_cert.valid_to)) {
+-+		emsg(MSG_WARNING, "ca_cert expired or not yet valid");
+-+		if (params->ca_cert)
+-+			emsg(MSG_WARNING, params->ca_cert);
+-+	}
+-+
+-+	tls_conf->has_ca_cert = 1;
+-+	return 0;
+-+}
+-+
+-+
+-+static int tls_mbedtls_set_certs(struct tls_conf *tls_conf,
+-+				 const struct tls_connection_params *params)
+-+{
+-+	int ret;
+-+
+-+	if (params->ca_cert || params->ca_cert_blob) {
+-+		if (tls_mbedtls_set_ca_cert(tls_conf, params) != 0)
+-+			return -1;
+-+	}
+-+	else if (params->ca_path) {
+-+		emsg(MSG_INFO, "ca_path support not implemented");
+-+		return -1;
+-+	}
+-+
+-+	if (!tls_conf->has_ca_cert)
+-+		mbedtls_ssl_conf_authmode(&tls_conf->conf, MBEDTLS_SSL_VERIFY_NONE);
+-+	else {
+-+		/* Initial setting: REQUIRED for client, OPTIONAL for server
+-+		 *   (see also tls_connection_set_verify()) */
+-+		tls_conf->verify_peer = (tls_ctx_global.tls_conf == NULL);
+-+		int authmode = tls_conf->verify_peer
+-+		  ? MBEDTLS_SSL_VERIFY_REQUIRED
+-+		  : MBEDTLS_SSL_VERIFY_OPTIONAL;
+-+		mbedtls_ssl_conf_authmode(&tls_conf->conf, authmode);
+-+		mbedtls_ssl_conf_ca_chain(&tls_conf->conf,
+-+		                          &tls_conf->ca_cert,
+-+		                          tls_conf->crl);
+-+
+-+		if (!tls_connection_set_subject_match(tls_conf, params))
+-+			return -1;
+-+	}
+-+
+-+	if (params->client_cert2) /*(yes, server_cert2 in msg below)*/
+-+		emsg(MSG_INFO, "server_cert2 support not implemented");
+-+
+-+	if (params->client_cert) {
+-+		size_t len;
+-+		u8 *data;
+-+		if (tls_mbedtls_readfile(params->client_cert, &data, &len))
+-+			return -1;
+-+		ret = mbedtls_x509_crt_parse(&tls_conf->client_cert, data, len);
+-+		forced_memzero(data, len);
+-+		os_free(data);
+-+	}
+-+	if (params->client_cert_blob) {
+-+		size_t len = params->client_cert_blob_len;
+-+		if (len && params->client_cert_blob[len-1] != '\0'
+-+		    && tls_mbedtls_data_is_pem(params->client_cert_blob))
+-+			++len; /*(include '\0' in len for PEM)*/
+-+		ret = mbedtls_x509_crt_parse(&tls_conf->client_cert,
+-+		                             params->client_cert_blob, len);
+-+	}
+-+	if (params->client_cert || params->client_cert_blob) {
+-+		if (ret < 0) {
+-+			elog(ret, "mbedtls_x509_crt_parse");
+-+			if (params->client_cert)
+-+				emsg(MSG_ERROR, params->client_cert);
+-+			return -1;
+-+		}
+-+		if (mbedtls_x509_time_is_future(&tls_conf->client_cert.valid_from)
+-+		    || mbedtls_x509_time_is_past(&tls_conf->client_cert.valid_to)) {
+-+			emsg(MSG_WARNING, "cert expired or not yet valid");
+-+			if (params->client_cert)
+-+				emsg(MSG_WARNING, params->client_cert);
+-+		}
+-+		tls_conf->has_client_cert = 1;
+-+	}
+-+
+-+	if (params->private_key || params->private_key_blob) {
+-+		size_t len = params->private_key_blob_len;
+-+		u8 *data;
+-+		*(const u8 **)&data = params->private_key_blob;
+-+		if (len && data[len-1] != '\0' && tls_mbedtls_data_is_pem(data))
+-+			++len; /*(include '\0' in len for PEM)*/
+-+		if (params->private_key
+-+		    && tls_mbedtls_readfile(params->private_key, &data, &len)) {
+-+			return -1;
+-+		}
+-+		const char *pwd = params->private_key_passwd;
+-+	  #if MBEDTLS_VERSION_NUMBER >= 0x03000000 /* mbedtls 3.0.0 */
+-+		ret = mbedtls_pk_parse_key(&tls_conf->private_key,
+-+			data, len,
+-+			(const unsigned char *)pwd,
+-+			pwd ? os_strlen(pwd) : 0,
+-+			mbedtls_ctr_drbg_random,
+-+			tls_ctx_global.ctr_drbg);
+-+	  #else
+-+		ret = mbedtls_pk_parse_key(&tls_conf->private_key,
+-+			data, len,
+-+			(const unsigned char *)pwd,
+-+			pwd ? os_strlen(pwd) : 0);
+-+	  #endif
+-+		if (params->private_key) {
+-+			forced_memzero(data, len);
+-+			os_free(data);
+-+		}
+-+		if (ret < 0) {
+-+			elog(ret, "mbedtls_pk_parse_key");
+-+			return -1;
+-+		}
+-+		tls_conf->has_private_key = 1;
+-+	}
+-+
+-+	if (tls_conf->has_client_cert && tls_conf->has_private_key) {
+-+		ret = mbedtls_ssl_conf_own_cert(
+-+		    &tls_conf->conf, &tls_conf->client_cert, &tls_conf->private_key);
+-+		if (ret < 0) {
+-+			elog(ret, "mbedtls_ssl_conf_own_cert");
+-+			return -1;
+-+		}
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+
+-+/* mbedtls_x509_crt_profile_suiteb plus rsa_min_bitlen 2048 */
+-+/* (reference: see also mbedtls_x509_crt_profile_next) */
+-+/* ??? should permit SHA-512, too, and additional curves ??? */
+-+static const mbedtls_x509_crt_profile tls_mbedtls_crt_profile_suiteb128 =
+-+{
+-+    /* Only SHA-256 and 384 */
+-+    MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA256 ) |
+-+    MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA384 ),
+-+    /* Only ECDSA */
+-+    MBEDTLS_X509_ID_FLAG( MBEDTLS_PK_ECDSA ) |
+-+    MBEDTLS_X509_ID_FLAG( MBEDTLS_PK_ECKEY ),
+-+#if defined(MBEDTLS_ECP_C)
+-+    /* Only NIST P-256 and P-384 */
+-+    MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP256R1 ) |
+-+    MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP384R1 ),
+-+#else
+-+    0,
+-+#endif
+-+    2048,
+-+};
+-+
+-+
+-+/* stricter than mbedtls_x509_crt_profile_suiteb */
+-+/* (reference: see also mbedtls_x509_crt_profile_next) */
+-+/* ??? should permit SHA-512, too, and additional curves ??? */
+-+static const mbedtls_x509_crt_profile tls_mbedtls_crt_profile_suiteb192 =
+-+{
+-+    /* Only SHA-384 */
+-+    MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA384 ),
+-+    /* Only ECDSA */
+-+    MBEDTLS_X509_ID_FLAG( MBEDTLS_PK_ECDSA ) |
+-+    MBEDTLS_X509_ID_FLAG( MBEDTLS_PK_ECKEY ),
+-+#if defined(MBEDTLS_ECP_C)
+-+    /* Only NIST P-384 */
+-+    MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP384R1 ),
+-+#else
+-+    0,
+-+#endif
+-+    3072,
+-+};
+-+
+-+
+-+/* stricter than mbedtls_x509_crt_profile_suiteb except allow any PK alg */
+-+/* (reference: see also mbedtls_x509_crt_profile_next) */
+-+/* ??? should permit SHA-512, too, and additional curves ??? */
+-+static const mbedtls_x509_crt_profile tls_mbedtls_crt_profile_suiteb192_anypk =
+-+{
+-+    /* Only SHA-384 */
+-+    MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA384 ),
+-+    0xFFFFFFF, /* Any PK alg    */
+-+#if defined(MBEDTLS_ECP_C)
+-+    /* Only NIST P-384 */
+-+    MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP384R1 ),
+-+#else
+-+    0,
+-+#endif
+-+    3072,
+-+};
+-+
+-+
+-+static int tls_mbedtls_set_params(struct tls_conf *tls_conf,
+-+				  const struct tls_connection_params *params)
+-+{
+-+	tls_conf->flags = params->flags;
+-+
+-+	if (tls_conf->flags & TLS_CONN_REQUIRE_OCSP_ALL) {
+-+		emsg(MSG_INFO, "ocsp=3 not supported");
+-+		return -1;
+-+	}
+-+
+-+	if (tls_conf->flags & TLS_CONN_REQUIRE_OCSP) {
+-+		emsg(MSG_INFO, "ocsp not supported");
+-+		return -1;
+-+	}
+-+
+-+	int suiteb128 = 0;
+-+	int suiteb192 = 0;
+-+	if (params->openssl_ciphers) {
+-+		if (os_strcmp(params->openssl_ciphers, "SUITEB192") == 0) {
+-+			suiteb192 = 1;
+-+			tls_conf->flags |= TLS_CONN_SUITEB;
+-+		}
+-+		if (os_strcmp(params->openssl_ciphers, "SUITEB128") == 0) {
+-+			suiteb128 = 1;
+-+			tls_conf->flags |= TLS_CONN_SUITEB;
+-+		}
+-+	}
+-+
+-+	int ret = mbedtls_ssl_config_defaults(
+-+	    &tls_conf->conf, tls_ctx_global.tls_conf ? MBEDTLS_SSL_IS_SERVER
+-+	                                             : MBEDTLS_SSL_IS_CLIENT,
+-+	    MBEDTLS_SSL_TRANSPORT_STREAM,
+-+	    (tls_conf->flags & TLS_CONN_SUITEB) ? MBEDTLS_SSL_PRESET_SUITEB
+-+	                                        : MBEDTLS_SSL_PRESET_DEFAULT);
+-+	if (ret != 0) {
+-+		elog(ret, "mbedtls_ssl_config_defaults");
+-+		return -1;
+-+	}
+-+
+-+	if (suiteb128) {
+-+		mbedtls_ssl_conf_cert_profile(&tls_conf->conf,
+-+		                              &tls_mbedtls_crt_profile_suiteb128);
+-+		mbedtls_ssl_conf_dhm_min_bitlen(&tls_conf->conf, 2048);
+-+	}
+-+	else if (suiteb192) {
+-+		mbedtls_ssl_conf_cert_profile(&tls_conf->conf,
+-+		                              &tls_mbedtls_crt_profile_suiteb192);
+-+		mbedtls_ssl_conf_dhm_min_bitlen(&tls_conf->conf, 3072);
+-+	}
+-+	else if (tls_conf->flags & TLS_CONN_SUITEB) {
+-+		/* treat as suiteb192 while allowing any PK algorithm */
+-+		mbedtls_ssl_conf_cert_profile(&tls_conf->conf,
+-+		                              &tls_mbedtls_crt_profile_suiteb192_anypk);
+-+		mbedtls_ssl_conf_dhm_min_bitlen(&tls_conf->conf, 3072);
+-+	}
+-+
+-+	tls_mbedtls_set_allowed_tls_vers(tls_conf, &tls_conf->conf);
+-+	ret = tls_mbedtls_set_certs(tls_conf, params);
+-+	if (ret != 0)
+-+		return -1;
+-+
+-+	if (params->dh_file
+-+	    && !tls_mbedtls_set_dhparams(tls_conf, params->dh_file)) {
+-+		return -1;
+-+	}
+-+
+-+	if (params->openssl_ecdh_curves
+-+	    && !tls_mbedtls_set_curves(tls_conf, params->openssl_ecdh_curves)) {
+-+		return -1;
+-+	}
+-+
+-+	if (params->openssl_ciphers) {
+-+		if (!tls_mbedtls_set_ciphers(tls_conf, params->openssl_ciphers))
+-+			return -1;
+-+	}
+-+	else if (tls_conf->flags & TLS_CONN_SUITEB) {
+-+		/* special-case a select set of ciphers for hwsim tests */
+-+		if (!tls_mbedtls_set_ciphers(tls_conf,
+-+		        (tls_conf->flags & TLS_CONN_SUITEB_NO_ECDH)
+-+		          ? "DHE-RSA-AES256-GCM-SHA384"
+-+		          : "ECDHE-RSA-AES256-GCM-SHA384:DHE-RSA-AES256-GCM-SHA384"))
+-+			return -1;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+
+-+int tls_connection_set_params(void *tls_ctx, struct tls_connection *conn,
+-+			      const struct tls_connection_params *params)
+-+{
+-+	if (conn == NULL || params == NULL)
+-+		return -1;
+-+
+-+	tls_conf_deinit(conn->tls_conf);
+-+	struct tls_conf *tls_conf = conn->tls_conf = tls_conf_init(tls_ctx);
+-+	if (tls_conf == NULL)
+-+		return -1;
+-+
+-+	if (tls_ctx_global.tls_conf) {
+-+		tls_conf->check_crl = tls_ctx_global.tls_conf->check_crl;
+-+		tls_conf->check_crl_strict = tls_ctx_global.tls_conf->check_crl_strict;
+-+		/*(tls_openssl.c inherits check_cert_subject from global conf)*/
+-+		if (tls_ctx_global.tls_conf->check_cert_subject) {
+-+			tls_conf->check_cert_subject =
+-+			  os_strdup(tls_ctx_global.tls_conf->check_cert_subject);
+-+			if (tls_conf->check_cert_subject == NULL)
+-+				return -1;
+-+		}
+-+	}
+-+
+-+	if (tls_mbedtls_set_params(tls_conf, params) != 0)
+-+		return -1;
+-+	conn->verify_peer = tls_conf->verify_peer;
+-+
+-+	return tls_mbedtls_ssl_setup(conn);
+-+}
+-+
+-+
+-+#ifdef TLS_MBEDTLS_SESSION_TICKETS
+-+
+-+static int tls_mbedtls_clienthello_session_ticket_prep (struct tls_connection *conn,
+-+                                                        const u8 *data, size_t len)
+-+{
+-+	if (conn->tls_conf->flags & TLS_CONN_DISABLE_SESSION_TICKET)
+-+		return -1;
+-+	if (conn->clienthello_session_ticket)
+-+		tls_connection_deinit_clienthello_session_ticket(conn);
+-+	if (len) {
+-+		conn->clienthello_session_ticket = mbedtls_calloc(1, len);
+-+		if (conn->clienthello_session_ticket == NULL)
+-+			return -1;
+-+		conn->clienthello_session_ticket_len = len;
+-+		os_memcpy(conn->clienthello_session_ticket, data, len);
+-+	}
+-+	return 0;
+-+}
+-+
+-+
+-+static void tls_mbedtls_clienthello_session_ticket_set (struct tls_connection *conn)
+-+{
+-+	mbedtls_ssl_session *sess = conn->ssl.MBEDTLS_PRIVATE(session_negotiate);
+-+	if (sess->MBEDTLS_PRIVATE(ticket)) {
+-+		mbedtls_platform_zeroize(sess->MBEDTLS_PRIVATE(ticket),
+-+		                         sess->MBEDTLS_PRIVATE(ticket_len));
+-+		mbedtls_free(sess->MBEDTLS_PRIVATE(ticket));
+-+	}
+-+	sess->MBEDTLS_PRIVATE(ticket) = conn->clienthello_session_ticket;
+-+	sess->MBEDTLS_PRIVATE(ticket_len) = conn->clienthello_session_ticket_len;
+-+	sess->MBEDTLS_PRIVATE(ticket_lifetime) = 86400;/* XXX: can hint be 0? */
+-+
+-+	conn->clienthello_session_ticket = NULL;
+-+	conn->clienthello_session_ticket_len = 0;
+-+}
+-+
+-+
+-+static int tls_mbedtls_ssl_ticket_write(void *p_ticket,
+-+                                        const mbedtls_ssl_session *session,
+-+                                        unsigned char *start,
+-+                                        const unsigned char *end,
+-+                                        size_t *tlen,
+-+                                        uint32_t *lifetime)
+-+{
+-+	struct tls_connection *conn = p_ticket;
+-+	if (conn && conn->session_ticket_cb) {
+-+		/* see tls_mbedtls_clienthello_session_ticket_prep() */
+-+		/* see tls_mbedtls_clienthello_session_ticket_set() */
+-+		return 0;
+-+	}
+-+
+-+	return mbedtls_ssl_ticket_write(&tls_ctx_global.ticket_ctx,
+-+	                                session, start, end, tlen, lifetime);
+-+}
+-+
+-+
+-+static int tls_mbedtls_ssl_ticket_parse(void *p_ticket,
+-+                                        mbedtls_ssl_session *session,
+-+                                        unsigned char *buf,
+-+                                        size_t len)
+-+{
+-+	/* XXX: TODO: not implemented in client;
+-+	 * mbedtls_ssl_conf_session_tickets_cb() callbacks only for TLS server*/
+-+
+-+	if (len == 0)
+-+		return MBEDTLS_ERR_SSL_BAD_INPUT_DATA;
+-+
+-+	struct tls_connection *conn = p_ticket;
+-+	if (conn && conn->session_ticket_cb) {
+-+		/* XXX: have random and secret been initialized yet?
+-+		 *      or must keys first be exported?
+-+		 *      EAP-FAST uses all args, EAP-TEAP only uses secret */
+-+		struct tls_random data;
+-+		if (tls_connection_get_random(NULL, conn, &data) != 0)
+-+			return MBEDTLS_ERR_SSL_INTERNAL_ERROR;
+-+		int ret =
+-+		  conn->session_ticket_cb(conn->session_ticket_cb_ctx,
+-+		                          buf, len,
+-+		                          data.client_random,
+-+		                          data.server_random,
+-+		                          conn->expkey_secret);
+-+		if (ret == 1) {
+-+			conn->resumed = 1;
+-+			return 0;
+-+		}
+-+		emsg(MSG_ERROR, "EAP session ticket ext not implemented");
+-+		return MBEDTLS_ERR_SSL_INVALID_MAC;
+-+		/*(non-zero return used for mbedtls debug logging)*/
+-+	}
+-+
+-+	/* XXX: TODO always use tls_mbedtls_ssl_ticket_parse() for callback? */
+-+	int rc = mbedtls_ssl_ticket_parse(&tls_ctx_global.ticket_ctx,
+-+	                                  session, buf, len);
+-+	if (conn)
+-+		conn->resumed = (rc == 0);
+-+	return rc;
+-+}
+-+
+-+#endif /* TLS_MBEDTLS_SESSION_TICKETS */
+-+
+-+
+-+__attribute_cold__
+-+int tls_global_set_params(void *tls_ctx,
+-+			  const struct tls_connection_params *params)
+-+{
+-+	/* XXX: why might global_set_params be called more than once? */
+-+	if (tls_ctx_global.tls_conf)
+-+		tls_conf_deinit(tls_ctx_global.tls_conf);
+-+	tls_ctx_global.tls_conf = tls_conf_init(tls_ctx);
+-+	if (tls_ctx_global.tls_conf == NULL)
+-+		return -1;
+-+
+-+  #ifdef MBEDTLS_SSL_SESSION_TICKETS
+-+  #ifdef MBEDTLS_SSL_TICKET_C
+-+	if (!(params->flags & TLS_CONN_DISABLE_SESSION_TICKET))
+-+	  #ifdef TLS_MBEDTLS_SESSION_TICKETS
+-+		mbedtls_ssl_conf_session_tickets_cb(&tls_ctx_global.tls_conf->conf,
+-+		                                    tls_mbedtls_ssl_ticket_write,
+-+		                                    tls_mbedtls_ssl_ticket_parse,
+-+		                                    NULL);
+-+	  #else
+-+		mbedtls_ssl_conf_session_tickets_cb(&tls_ctx_global.tls_conf->conf,
+-+		                                    mbedtls_ssl_ticket_write,
+-+		                                    mbedtls_ssl_ticket_parse,
+-+		                                    &tls_ctx_global.ticket_ctx);
+-+	  #endif
+-+  #endif
+-+  #endif
+-+
+-+	os_free(tls_ctx_global.ocsp_stapling_response);
+-+	tls_ctx_global.ocsp_stapling_response = NULL;
+-+	if (params->ocsp_stapling_response)
+-+		tls_ctx_global.ocsp_stapling_response =
+-+			os_strdup(params->ocsp_stapling_response);
+-+
+-+	os_free(tls_ctx_global.ca_cert_file);
+-+	tls_ctx_global.ca_cert_file = NULL;
+-+	if (params->ca_cert)
+-+		tls_ctx_global.ca_cert_file = os_strdup(params->ca_cert);
+-+	return tls_mbedtls_set_params(tls_ctx_global.tls_conf, params);
+-+}
+-+
+-+
+-+int tls_global_set_verify(void *tls_ctx, int check_crl, int strict)
+-+{
+-+	tls_ctx_global.tls_conf->check_crl = check_crl;
+-+	tls_ctx_global.tls_conf->check_crl_strict = strict; /*(time checks)*/
+-+	return 0;
+-+}
+-+
+-+
+-+int tls_connection_set_verify(void *tls_ctx, struct tls_connection *conn,
+-+			      int verify_peer, unsigned int flags,
+-+			      const u8 *session_ctx, size_t session_ctx_len)
+-+{
+-+	/*(EAP server-side calls this from eap_server_tls_ssl_init())*/
+-+	if (conn == NULL)
+-+		return -1;
+-+
+-+	conn->tls_conf->flags |= flags;/* TODO: reprocess flags, if necessary */
+-+
+-+	int authmode;
+-+	switch (verify_peer) {
+-+	case 2:  authmode = MBEDTLS_SSL_VERIFY_OPTIONAL; break;/*(eap_teap_init())*/
+-+	case 1:  authmode = MBEDTLS_SSL_VERIFY_REQUIRED; break;
+-+	default: authmode = MBEDTLS_SSL_VERIFY_NONE;     break;
+-+	}
+-+	mbedtls_ssl_set_hs_authmode(&conn->ssl, authmode);
+-+
+-+	if ((conn->verify_peer = (authmode != MBEDTLS_SSL_VERIFY_NONE)))
+-+		mbedtls_ssl_set_verify(&conn->ssl, tls_mbedtls_verify_cb, conn);
+-+	else
+-+		mbedtls_ssl_set_verify(&conn->ssl, NULL, NULL);
+-+
+-+	return 0;
+-+}
+-+
+-+
+-+#if MBEDTLS_VERSION_NUMBER >= 0x03000000 /* mbedtls 3.0.0 */
+-+static void tls_connection_export_keys_cb(
+-+    void *p_expkey, mbedtls_ssl_key_export_type secret_type,
+-+    const unsigned char *secret, size_t secret_len,
+-+    const unsigned char client_random[MBEDTLS_EXPKEY_RAND_LEN],
+-+    const unsigned char server_random[MBEDTLS_EXPKEY_RAND_LEN],
+-+    mbedtls_tls_prf_types tls_prf_type)
+-+{
+-+	struct tls_connection *conn = p_expkey;
+-+	conn->tls_prf_type = tls_prf_type;
+-+	if (!tls_prf_type)
+-+		return;
+-+	if (secret_len > sizeof(conn->expkey_secret)) {
+-+		emsg(MSG_ERROR, "tls_connection_export_keys_cb secret too long");
+-+		conn->tls_prf_type = MBEDTLS_SSL_TLS_PRF_NONE; /* 0 */
+-+		return;
+-+	}
+-+	conn->expkey_secret_len = secret_len;
+-+	os_memcpy(conn->expkey_secret, secret, secret_len);
+-+	os_memcpy(conn->expkey_randbytes,
+-+	          client_random, MBEDTLS_EXPKEY_RAND_LEN);
+-+	os_memcpy(conn->expkey_randbytes + MBEDTLS_EXPKEY_RAND_LEN,
+-+	          server_random, MBEDTLS_EXPKEY_RAND_LEN);
+-+}
+-+#elif MBEDTLS_VERSION_NUMBER >= 0x02120000 /* mbedtls 2.18.0 */
+-+static int tls_connection_export_keys_cb(
+-+    void *p_expkey,
+-+    const unsigned char *ms,
+-+    const unsigned char *kb,
+-+    size_t maclen,
+-+    size_t keylen,
+-+    size_t ivlen,
+-+    const unsigned char client_random[MBEDTLS_EXPKEY_RAND_LEN],
+-+    const unsigned char server_random[MBEDTLS_EXPKEY_RAND_LEN],
+-+    mbedtls_tls_prf_types tls_prf_type )
+-+{
+-+	struct tls_connection *conn = p_expkey;
+-+	conn->tls_prf_type = tls_prf_type;
+-+	if (!tls_prf_type)
+-+		return -1; /*(return value ignored by mbedtls)*/
+-+	conn->expkey_keyblock_size = maclen + keylen + ivlen;
+-+	conn->expkey_secret_len = MBEDTLS_EXPKEY_FIXED_SECRET_LEN;
+-+	os_memcpy(conn->expkey_secret, ms, MBEDTLS_EXPKEY_FIXED_SECRET_LEN);
+-+	os_memcpy(conn->expkey_randbytes,
+-+	          client_random, MBEDTLS_EXPKEY_RAND_LEN);
+-+	os_memcpy(conn->expkey_randbytes + MBEDTLS_EXPKEY_RAND_LEN,
+-+	          server_random, MBEDTLS_EXPKEY_RAND_LEN);
+-+	return 0;
+-+}
+-+#endif
+-+
+-+
+-+int tls_connection_get_random(void *tls_ctx, struct tls_connection *conn,
+-+			      struct tls_random *data)
+-+{
+-+	if (!conn || !conn->tls_prf_type)
+-+		return -1;
+-+	data->client_random = conn->expkey_randbytes;
+-+	data->client_random_len = MBEDTLS_EXPKEY_RAND_LEN;
+-+	data->server_random = conn->expkey_randbytes + MBEDTLS_EXPKEY_RAND_LEN;
+-+	data->server_random_len = MBEDTLS_EXPKEY_RAND_LEN;
+-+	return 0;
+-+}
+-+
+-+
+-+int tls_connection_export_key(void *tls_ctx, struct tls_connection *conn,
+-+			      const char *label, const u8 *context,
+-+			      size_t context_len, u8 *out, size_t out_len)
+-+{
+-+	/* (EAP-PEAP EAP-TLS EAP-TTLS) */
+-+  #if MBEDTLS_VERSION_NUMBER >= 0x02120000 /* mbedtls 2.18.0 */
+-+	return (conn && conn->established && conn->tls_prf_type)
+-+	  ? mbedtls_ssl_tls_prf(conn->tls_prf_type,
+-+				conn->expkey_secret, conn->expkey_secret_len, label,
+-+				conn->expkey_randbytes,
+-+				sizeof(conn->expkey_randbytes), out, out_len)
+-+	  : -1;
+-+  #else
+-+	/* not implemented here for mbedtls < 2.18.0 */
+-+	return -1;
+-+  #endif
+-+}
+-+
+-+
+-+#ifdef TLS_MBEDTLS_EAP_FAST
+-+
+-+#if MBEDTLS_VERSION_NUMBER >= 0x03000000 /* mbedtls 3.0.0 */
+-+/* keyblock size info is not exposed in mbed TLS 3.0.0 */
+-+/* extracted from mbedtls library/ssl_tls.c:ssl_tls12_populate_transform() */
+-+#include <mbedtls/ssl_ciphersuites.h>
+-+#include <mbedtls/cipher.h>
+-+static size_t tls_mbedtls_ssl_keyblock_size (mbedtls_ssl_context *ssl)
+-+{
+-+  #if !defined(MBEDTLS_USE_PSA_CRYPTO) /* XXX: (not extracted for PSA crypto) */
+-+  #if defined(MBEDTLS_SSL_PROTO_TLS1_3)
+-+    if (tls_version == MBEDTLS_SSL_VERSION_TLS1_3)
+-+        return 0; /* (calculation not extracted) */
+-+  #endif /* MBEDTLS_SSL_PROTO_TLS1_3 */
+-+
+-+    int ciphersuite = mbedtls_ssl_get_ciphersuite_id_from_ssl(ssl);
+-+    const mbedtls_ssl_ciphersuite_t *ciphersuite_info =
+-+      mbedtls_ssl_ciphersuite_from_id(ciphersuite);
+-+    if (ciphersuite_info == NULL)
+-+        return 0;
+-+
+-+    const mbedtls_cipher_info_t *cipher_info =
+-+      mbedtls_cipher_info_from_type(ciphersuite_info->MBEDTLS_PRIVATE(cipher));
+-+    if (cipher_info == NULL)
+-+        return 0;
+-+
+-+  #if MBEDTLS_VERSION_NUMBER >= 0x03010000 /* mbedtls 3.1.0 */
+-+    size_t keylen = mbedtls_cipher_info_get_key_bitlen(cipher_info) / 8;
+-+    mbedtls_cipher_mode_t mode = mbedtls_cipher_info_get_mode(cipher_info);
+-+  #else
+-+    size_t keylen = cipher_info->MBEDTLS_PRIVATE(key_bitlen) / 8;
+-+    mbedtls_cipher_mode_t mode = cipher_info->MBEDTLS_PRIVATE(mode);
+-+  #endif
+-+  #if defined(MBEDTLS_GCM_C) || \
+-+      defined(MBEDTLS_CCM_C) || \
+-+      defined(MBEDTLS_CHACHAPOLY_C)
+-+    if (mode == MBEDTLS_MODE_GCM || mode == MBEDTLS_MODE_CCM)
+-+        return keylen + 4;
+-+    else if (mode == MBEDTLS_MODE_CHACHAPOLY)
+-+        return keylen + 12;
+-+    else
+-+  #endif /* MBEDTLS_GCM_C || MBEDTLS_CCM_C || MBEDTLS_CHACHAPOLY_C */
+-+  #if defined(MBEDTLS_SSL_SOME_SUITES_USE_MAC)
+-+    {
+-+        const mbedtls_md_info_t *md_info =
+-+          mbedtls_md_info_from_type(ciphersuite_info->MBEDTLS_PRIVATE(mac));
+-+        if (md_info == NULL)
+-+            return 0;
+-+        size_t mac_key_len = mbedtls_md_get_size(md_info);
+-+        size_t ivlen = mbedtls_cipher_info_get_iv_size(cipher_info);
+-+        return keylen + mac_key_len + ivlen;
+-+    }
+-+  #endif /* MBEDTLS_SSL_SOME_SUITES_USE_MAC */
+-+  #endif /* !MBEDTLS_USE_PSA_CRYPTO *//* (not extracted for PSA crypto) */
+-+    return 0;
+-+}
+-+#endif /* MBEDTLS_VERSION_NUMBER >= 0x03000000 *//* mbedtls 3.0.0 */
+-+
+-+
+-+int tls_connection_get_eap_fast_key(void *tls_ctx, struct tls_connection *conn,
+-+				    u8 *out, size_t out_len)
+-+{
+-+	/* XXX: has export keys callback been run? */
+-+	if (!conn || !conn->tls_prf_type)
+-+		return -1;
+-+
+-+  #if MBEDTLS_VERSION_NUMBER >= 0x03000000 /* mbedtls 3.0.0 */
+-+	conn->expkey_keyblock_size = tls_mbedtls_ssl_keyblock_size(&conn->ssl);
+-+	if (conn->expkey_keyblock_size == 0)
+-+		return -1;
+-+  #endif
+-+	size_t skip = conn->expkey_keyblock_size * 2;
+-+	unsigned char *tmp_out = os_malloc(skip + out_len);
+-+	if (!tmp_out)
+-+		return -1;
+-+
+-+	/* server_random and then client_random */
+-+	unsigned char seed[MBEDTLS_EXPKEY_RAND_LEN*2];
+-+	os_memcpy(seed, conn->expkey_randbytes + MBEDTLS_EXPKEY_RAND_LEN,
+-+	          MBEDTLS_EXPKEY_RAND_LEN);
+-+	os_memcpy(seed + MBEDTLS_EXPKEY_RAND_LEN, conn->expkey_randbytes,
+-+	          MBEDTLS_EXPKEY_RAND_LEN);
+-+
+-+  #if MBEDTLS_VERSION_NUMBER >= 0x02120000 /* mbedtls 2.18.0 */
+-+	int ret = mbedtls_ssl_tls_prf(conn->tls_prf_type,
+-+				      conn->expkey_secret, conn->expkey_secret_len,
+-+				      "key expansion", seed, sizeof(seed),
+-+				      tmp_out, skip + out_len);
+-+	if (ret == 0)
+-+		os_memcpy(out, tmp_out + skip, out_len);
+-+  #else
+-+	int ret = -1; /*(not reached if not impl; return -1 at top of func)*/
+-+  #endif
+-+
+-+	bin_clear_free(tmp_out, skip + out_len);
+-+	forced_memzero(seed, sizeof(seed));
+-+	return ret;
+-+}
+-+
+-+#endif /* TLS_MBEDTLS_EAP_FAST */
+-+
+-+
+-+__attribute_cold__
+-+static void tls_mbedtls_suiteb_handshake_alert (struct tls_connection *conn)
+-+{
+-+	/* tests/hwsim/test_suite_b.py test_suite_b_192_rsa_insufficient_dh */
+-+	if (!(conn->tls_conf->flags & TLS_CONN_SUITEB))
+-+		return;
+-+	if (tls_ctx_global.tls_conf) /*(is server; want issue event on client)*/
+-+		return;
+-+  #if 0
+-+	/*(info not available on client;
+-+         * mbed TLS library enforces dhm min bitlen in ServerKeyExchange)*/
+-+	if (MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 ==
+-+	  #if MBEDTLS_VERSION_NUMBER < 0x03020000 /* mbedtls 3.2.0 */
+-+	          mbedtls_ssl_get_ciphersuite_id_from_ssl(&conn->ssl)
+-+	  #else
+-+	          mbedtls_ssl_get_ciphersuite_id(
+-+	            mbedtls_ssl_get_ciphersuite(&conn->ssl))
+-+	  #endif
+-+	    && mbedtls_mpi_size(&conn->tls_conf->conf.MBEDTLS_PRIVATE(dhm_P))
+-+	         < 384 /*(3072/8)*/)
+-+  #endif
+-+	{
+-+		struct tls_config *init_conf = &tls_ctx_global.init_conf;
+-+		if (init_conf->event_cb) {
+-+			union tls_event_data ev;
+-+			os_memset(&ev, 0, sizeof(ev));
+-+			ev.alert.is_local = 1;
+-+			ev.alert.type = "fatal";
+-+			/*"internal error" string for tests/hwsim/test_suiteb.py */
+-+			ev.alert.description = "internal error: handshake failure";
+-+			/*ev.alert.description = "insufficient security";*/
+-+			init_conf->event_cb(init_conf->cb_ctx, TLS_ALERT, &ev);
+-+		}
+-+	}
+-+}
+-+
+-+
+-+struct wpabuf * tls_connection_handshake(void *tls_ctx,
+-+					 struct tls_connection *conn,
+-+					 const struct wpabuf *in_data,
+-+					 struct wpabuf **appl_data)
+-+{
+-+	if (appl_data)
+-+		*appl_data = NULL;
+-+
+-+	if (in_data && wpabuf_len(in_data)) {
+-+		/*(unsure why tls_gnutls.c discards buffer contents; skip here)*/
+-+		if (conn->pull_buf && 0) /* disable; appears unwise */
+-+			tls_pull_buf_discard(conn, __func__);
+-+		if (!tls_pull_buf_append(conn, in_data))
+-+			return NULL;
+-+	}
+-+
+-+	if (conn->tls_conf == NULL) {
+-+		struct tls_connection_params params;
+-+		os_memset(&params, 0, sizeof(params));
+-+		params.openssl_ciphers =
+-+		  tls_ctx_global.init_conf.openssl_ciphers;
+-+		params.flags = tls_ctx_global.tls_conf->flags;
+-+		if (tls_connection_set_params(tls_ctx, conn, &params) != 0)
+-+			return NULL;
+-+	}
+-+
+-+	if (conn->verify_peer) /*(call here might be redundant; nbd)*/
+-+		mbedtls_ssl_set_verify(&conn->ssl, tls_mbedtls_verify_cb, conn);
+-+
+-+  #ifdef TLS_MBEDTLS_SESSION_TICKETS
+-+	if (conn->clienthello_session_ticket)
+-+		/*(starting handshake for EAP-FAST and EAP-TEAP)*/
+-+		tls_mbedtls_clienthello_session_ticket_set(conn);
+-+
+-+	/* (not thread-safe due to need to set userdata 'conn' for callback) */
+-+	/* (unable to use mbedtls_ssl_set_user_data_p() with mbedtls 3.2.0+
+-+	 *  since ticket write and parse callbacks take (mbedtls_ssl_session *)
+-+	 *  param instead of (mbedtls_ssl_context *) param) */
+-+	if (conn->tls_conf->flags & TLS_CONN_DISABLE_SESSION_TICKET)
+-+		mbedtls_ssl_conf_session_tickets_cb(&conn->tls_conf->conf,
+-+		                                    NULL, NULL, NULL);
+-+	else
+-+		mbedtls_ssl_conf_session_tickets_cb(&conn->tls_conf->conf,
+-+		                                    tls_mbedtls_ssl_ticket_write,
+-+		                                    tls_mbedtls_ssl_ticket_parse,
+-+		                                    conn);
+-+  #endif
+-+
+-+  #if MBEDTLS_VERSION_NUMBER >= 0x03020000 /* mbedtls 3.2.0 */
+-+	int ret = mbedtls_ssl_handshake(&conn->ssl);
+-+  #else
+-+	int ret = 0;
+-+	while (conn->ssl.MBEDTLS_PRIVATE(state) != MBEDTLS_SSL_HANDSHAKE_OVER) {
+-+		ret = mbedtls_ssl_handshake_step(&conn->ssl);
+-+		if (ret != 0)
+-+			break;
+-+	}
+-+  #endif
+-+
+-+  #ifdef TLS_MBEDTLS_SESSION_TICKETS
+-+	mbedtls_ssl_conf_session_tickets_cb(&conn->tls_conf->conf,
+-+	                                    tls_mbedtls_ssl_ticket_write,
+-+	                                    tls_mbedtls_ssl_ticket_parse,
+-+	                                    NULL);
+-+  #endif
+-+
+-+	switch (ret) {
+-+	case 0:
+-+		conn->established = 1;
+-+		if (conn->push_buf == NULL)
+-+			/* Need to return something to get final TLS ACK. */
+-+			conn->push_buf = wpabuf_alloc(0);
+-+
+-+		if (appl_data /*&& conn->pull_buf && wpabuf_len(conn->pull_buf)*/)
+-+			*appl_data = NULL; /* RFE: check for application data */
+-+		break;
+-+	case MBEDTLS_ERR_SSL_WANT_WRITE:
+-+	case MBEDTLS_ERR_SSL_WANT_READ:
+-+	case MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS:
+-+	case MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS:
+-+		if (tls_ctx_global.tls_conf /*(is server)*/
+-+		    && conn->established && conn->push_buf == NULL)
+-+			/* Need to return something to trigger completion of EAP-TLS. */
+-+			conn->push_buf = wpabuf_alloc(0);
+-+		break;
+-+	default:
+-+		++conn->failed;
+-+		switch (ret) {
+-+		case MBEDTLS_ERR_SSL_CLIENT_RECONNECT:
+-+		case MBEDTLS_ERR_NET_CONN_RESET:
+-+		case MBEDTLS_ERR_NET_SEND_FAILED:
+-+			++conn->write_alerts;
+-+			break;
+-+	      #if MBEDTLS_VERSION_NUMBER >= 0x03000000 /* mbedtls 3.0.0 */
+-+		case MBEDTLS_ERR_SSL_HANDSHAKE_FAILURE:
+-+	      #else
+-+		case MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE:
+-+	      #endif
+-+			tls_mbedtls_suiteb_handshake_alert(conn);
+-+			/* fall through */
+-+		case MBEDTLS_ERR_NET_RECV_FAILED:
+-+		case MBEDTLS_ERR_SSL_CONN_EOF:
+-+		case MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY:
+-+		case MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE:
+-+			++conn->read_alerts;
+-+			break;
+-+		default:
+-+			break;
+-+		}
+-+
+-+		ilog(ret, "mbedtls_ssl_handshake");
+-+		break;
+-+	}
+-+
+-+	struct wpabuf *out_data = conn->push_buf;
+-+	conn->push_buf = NULL;
+-+	return out_data;
+-+}
+-+
+-+
+-+struct wpabuf * tls_connection_server_handshake(void *tls_ctx,
+-+						struct tls_connection *conn,
+-+						const struct wpabuf *in_data,
+-+						struct wpabuf **appl_data)
+-+{
+-+	conn->is_server = 1;
+-+	return tls_connection_handshake(tls_ctx, conn, in_data, appl_data);
+-+}
+-+
+-+
+-+struct wpabuf * tls_connection_encrypt(void *tls_ctx,
+-+				       struct tls_connection *conn,
+-+				       const struct wpabuf *in_data)
+-+{
+-+	int res = mbedtls_ssl_write(&conn->ssl,
+-+	                            wpabuf_head_u8(in_data), wpabuf_len(in_data));
+-+	if (res < 0) {
+-+		elog(res, "mbedtls_ssl_write");
+-+		return NULL;
+-+	}
+-+
+-+	struct wpabuf *buf = conn->push_buf;
+-+	conn->push_buf = NULL;
+-+	return buf;
+-+}
+-+
+-+
+-+struct wpabuf * tls_connection_decrypt(void *tls_ctx,
+-+				       struct tls_connection *conn,
+-+				       const struct wpabuf *in_data)
+-+{
+-+	int res;
+-+	struct wpabuf *out;
+-+
+-+	/*assert(in_data != NULL);*/
+-+	if (!tls_pull_buf_append(conn, in_data))
+-+		return NULL;
+-+
+-+  #if defined(MBEDTLS_ZLIB_SUPPORT) /* removed in mbedtls 3.x */
+-+	/* Add extra buffer space to handle the possibility of decrypted
+-+	 * data being longer than input data due to TLS compression. */
+-+	out = wpabuf_alloc((wpabuf_len(in_data) + 500) * 3);
+-+  #else /* TLS compression is disabled in mbedtls 3.x */
+-+	out = wpabuf_alloc(wpabuf_len(in_data));
+-+  #endif
+-+	if (out == NULL)
+-+		return NULL;
+-+
+-+	res = mbedtls_ssl_read(&conn->ssl, wpabuf_mhead(out), wpabuf_size(out));
+-+	if (res < 0) {
+-+	  #if 1 /*(seems like a different error if wpabuf_len(in_data) == 0)*/
+-+		if (res == MBEDTLS_ERR_SSL_WANT_READ)
+-+			return out;
+-+	  #endif
+-+		elog(res, "mbedtls_ssl_read");
+-+		wpabuf_free(out);
+-+		return NULL;
+-+	}
+-+	wpabuf_put(out, res);
+-+
+-+	return out;
+-+}
+-+
+-+
+-+int tls_connection_resumed(void *tls_ctx, struct tls_connection *conn)
+-+{
+-+	/* XXX: might need to detect if session resumed from TLS session ticket
+-+	 * even if not special session ticket handling for EAP-FAST, EAP-TEAP */
+-+	/* (?ssl->handshake->resume during session ticket validation?) */
+-+	return conn && conn->resumed;
+-+}
+-+
+-+
+-+#ifdef TLS_MBEDTLS_EAP_FAST
+-+int tls_connection_set_cipher_list(void *tls_ctx, struct tls_connection *conn,
+-+				   u8 *ciphers)
+-+{
+-+	/* ciphers is list of TLS_CIPHER_* from hostap/src/crypto/tls.h */
+-+	int ids[7];
+-+	const int idsz = (int)sizeof(ids);
+-+	int nids = -1, id;
+-+	for ( ; *ciphers != TLS_CIPHER_NONE; ++ciphers) {
+-+		switch (*ciphers) {
+-+		case TLS_CIPHER_RC4_SHA:
+-+		  #ifdef MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+-+			id = MBEDTLS_TLS_RSA_WITH_RC4_128_SHA;
+-+			break;
+-+		  #else
+-+			continue; /*(not supported in mbedtls 3.x; ignore)*/
+-+		  #endif
+-+		case TLS_CIPHER_AES128_SHA:
+-+			id = MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA;
+-+			break;
+-+		case TLS_CIPHER_RSA_DHE_AES128_SHA:
+-+			id = MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA;
+-+			break;
+-+		case TLS_CIPHER_ANON_DH_AES128_SHA:
+-+			continue; /*(not supported in mbedtls; ignore)*/
+-+		case TLS_CIPHER_RSA_DHE_AES256_SHA:
+-+			id = MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA;
+-+			break;
+-+		case TLS_CIPHER_AES256_SHA:
+-+			id = MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA;
+-+			break;
+-+		default:
+-+			return -1; /* should not happen */
+-+		}
+-+		if (++nids == idsz)
+-+			return -1; /* should not happen */
+-+		ids[nids] = id;
+-+	}
+-+	if (nids < 0)
+-+		return 0; /* nothing to do */
+-+	if (++nids == idsz)
+-+		return -1; /* should not happen */
+-+	ids[nids] = 0; /* terminate list */
+-+	++nids;
+-+
+-+	return tls_mbedtls_set_ciphersuites(conn->tls_conf, ids, nids) ? 0 : -1;
+-+}
+-+#endif
+-+
+-+
+-+int tls_get_version(void *ssl_ctx, struct tls_connection *conn,
+-+		    char *buf, size_t buflen)
+-+{
+-+	if (conn == NULL)
+-+		return -1;
+-+	os_strlcpy(buf, mbedtls_ssl_get_version(&conn->ssl), buflen);
+-+	return buf[0] != 'u' ? 0 : -1; /*(-1 if "unknown")*/
+-+}
+-+
+-+
+-+#ifdef TLS_MBEDTLS_EAP_TEAP
+-+u16 tls_connection_get_cipher_suite(struct tls_connection *conn)
+-+{
+-+	if (conn == NULL)
+-+		return 0;
+-+	return (u16)mbedtls_ssl_get_ciphersuite_id_from_ssl(&conn->ssl);
+-+}
+-+#endif
+-+
+-+
+-+int tls_get_cipher(void *tls_ctx, struct tls_connection *conn,
+-+		   char *buf, size_t buflen)
+-+{
+-+	if (conn == NULL)
+-+		return -1;
+-+	const int id = mbedtls_ssl_get_ciphersuite_id_from_ssl(&conn->ssl);
+-+	return tls_mbedtls_translate_ciphername(id, buf, buflen) ? 0 : -1;
+-+}
+-+
+-+
+-+#ifdef TLS_MBEDTLS_SESSION_TICKETS
+-+
+-+int tls_connection_enable_workaround(void *tls_ctx,
+-+				     struct tls_connection *conn)
+-+{
+-+	/* (see comment in src/eap_peer/eap_fast.c:eap_fast_init()) */
+-+	/* XXX: is there a relevant setting for this in mbed TLS? */
+-+	/* (do we even care that much about older CBC ciphers?) */
+-+	return 0;
+-+}
+-+
+-+
+-+int tls_connection_client_hello_ext(void *tls_ctx, struct tls_connection *conn,
+-+				    int ext_type, const u8 *data,
+-+				    size_t data_len)
+-+{
+-+	/* (EAP-FAST and EAP-TEAP) */
+-+	if (ext_type == MBEDTLS_TLS_EXT_SESSION_TICKET) /*(ext_type == 35)*/
+-+		return tls_mbedtls_clienthello_session_ticket_prep(conn, data,
+-+		                                                   data_len);
+-+
+-+	return -1;
+-+}
+-+
+-+#endif /* TLS_MBEDTLS_SESSION_TICKETS */
+-+
+-+
+-+int tls_connection_get_failed(void *tls_ctx, struct tls_connection *conn)
+-+{
+-+	return conn ? conn->failed : -1;
+-+}
+-+
+-+
+-+int tls_connection_get_read_alerts(void *tls_ctx, struct tls_connection *conn)
+-+{
+-+	return conn ? conn->read_alerts : -1;
+-+}
+-+
+-+
+-+int tls_connection_get_write_alerts(void *tls_ctx,
+-+				    struct tls_connection *conn)
+-+{
+-+	return conn ? conn->write_alerts : -1;
+-+}
+-+
+-+
+-+#ifdef TLS_MBEDTLS_SESSION_TICKETS
+-+int tls_connection_set_session_ticket_cb(
+-+	void *tls_ctx, struct tls_connection *conn,
+-+	tls_session_ticket_cb cb, void *ctx)
+-+{
+-+	if (!(conn->tls_conf->flags & TLS_CONN_DISABLE_SESSION_TICKET)) {
+-+		/* (EAP-FAST and EAP-TEAP) */
+-+		conn->session_ticket_cb = cb;
+-+		conn->session_ticket_cb_ctx = ctx;
+-+		return 0;
+-+	}
+-+	return -1;
+-+}
+-+#endif
+-+
+-+
+-+int tls_get_library_version(char *buf, size_t buf_len)
+-+{
+-+  #ifndef MBEDTLS_VERSION_C
+-+	const char * const ver = "n/a";
+-+  #else
+-+	char ver[9];
+-+	mbedtls_version_get_string(ver);
+-+  #endif
+-+	return os_snprintf(buf, buf_len,
+-+	                   "mbed TLS build=" MBEDTLS_VERSION_STRING " run=%s", ver);
+-+}
+-+
+-+
+-+void tls_connection_set_success_data(struct tls_connection *conn,
+-+				     struct wpabuf *data)
+-+{
+-+	wpabuf_free(conn->success_data);
+-+	conn->success_data = data;
+-+}
+-+
+-+
+-+void tls_connection_set_success_data_resumed(struct tls_connection *conn)
+-+{
+-+}
+-+
+-+
+-+const struct wpabuf *
+-+tls_connection_get_success_data(struct tls_connection *conn)
+-+{
+-+	return conn->success_data;
+-+}
+-+
+-+
+-+void tls_connection_remove_session(struct tls_connection *conn)
+-+{
+-+}
+-+
+-+
+-+#ifdef TLS_MBEDTLS_EAP_TEAP
+-+int tls_get_tls_unique(struct tls_connection *conn, u8 *buf, size_t max_len)
+-+{
+-+  #if defined(MBEDTLS_SSL_RENEGOTIATION) /* XXX: renegotiation or resumption? */
+-+	/* data from TLS handshake Finished message */
+-+	size_t verify_len = conn->ssl.MBEDTLS_PRIVATE(verify_data_len);
+-+	char *verify_data = (conn->is_server ^ conn->resumed)
+-+	  ? conn->ssl.MBEDTLS_PRIVATE(peer_verify_data)
+-+	  : conn->ssl.MBEDTLS_PRIVATE(own_verify_data);
+-+	if (verify_len && verify_len <= max_len) {
+-+		os_memcpy(buf, verify_data, verify_len);
+-+		return (int)verify_len;
+-+	}
+-+  #endif
+-+	return -1;
+-+}
+-+#endif
+-+
+-+
+-+__attribute_noinline__
+-+static void tls_mbedtls_set_peer_subject(struct tls_connection *conn, const mbedtls_x509_crt *crt)
+-+{
+-+	if (conn->peer_subject)
+-+		return;
+-+	char buf[MBEDTLS_X509_MAX_DN_NAME_SIZE*2];
+-+	int buflen = mbedtls_x509_dn_gets(buf, sizeof(buf), &crt->subject);
+-+	if (buflen >= 0 && (conn->peer_subject = os_malloc((size_t)buflen+1)))
+-+		os_memcpy(conn->peer_subject, buf, (size_t)buflen+1);
+-+}
+-+
+-+
+-+#ifdef TLS_MBEDTLS_EAP_TEAP
+-+const char * tls_connection_get_peer_subject(struct tls_connection *conn)
+-+{
+-+	if (!conn)
+-+		return NULL;
+-+	if (!conn->peer_subject) { /*(if not set during cert verify)*/
+-+		const mbedtls_x509_crt *peer_cert =
+-+		  mbedtls_ssl_get_peer_cert(&conn->ssl);
+-+		if (peer_cert)
+-+			tls_mbedtls_set_peer_subject(conn, peer_cert);
+-+	}
+-+	return conn->peer_subject;
+-+}
+-+#endif
+-+
+-+
+-+#ifdef TLS_MBEDTLS_EAP_TEAP
+-+bool tls_connection_get_own_cert_used(struct tls_connection *conn)
+-+{
+-+	/* XXX: availability of cert does not necessary mean that client
+-+	 * received certificate request from server and then sent cert.
+-+	 * ? step handshake in tls_connection_handshake() looking for
+-+	 *   MBEDTLS_SSL_CERTIFICATE_REQUEST ? */
+-+	const struct tls_conf * const tls_conf = conn->tls_conf;
+-+	return (tls_conf->has_client_cert && tls_conf->has_private_key);
+-+}
+-+#endif
+-+
+-+
+-+#if defined(CONFIG_FIPS)
+-+#define TLS_MBEDTLS_CONFIG_FIPS
+-+#endif
+-+
+-+#if defined(CONFIG_SHA256)
+-+#define TLS_MBEDTLS_TLS_PRF_SHA256
+-+#endif
+-+
+-+#if defined(CONFIG_SHA384)
+-+#define TLS_MBEDTLS_TLS_PRF_SHA384
+-+#endif
+-+
+-+
+-+#ifndef TLS_MBEDTLS_CONFIG_FIPS
+-+#if defined(CONFIG_MODULE_TESTS)
+-+/* unused with CONFIG_TLS=mbedtls except in crypto_module_tests.c */
+-+#if MBEDTLS_VERSION_NUMBER >= 0x02120000 /* mbedtls 2.18.0 */ \
+-+ && MBEDTLS_VERSION_NUMBER <  0x03000000 /* mbedtls 3.0.0 */
+-+/* sha1-tlsprf.c */
+-+#include "sha1.h"
+-+int tls_prf_sha1_md5(const u8 *secret, size_t secret_len, const char *label,
+-+		     const u8 *seed, size_t seed_len, u8 *out, size_t outlen)
+-+{
+-+	return mbedtls_ssl_tls_prf(MBEDTLS_SSL_TLS_PRF_TLS1,
+-+				   secret, secret_len, label,
+-+				   seed, seed_len, out, outlen) ? -1 : 0;
+-+}
+-+#else
+-+#include "sha1-tlsprf.c" /* pull in hostap local implementation */
+-+#endif
+-+#endif
+-+#endif
+-+
+-+#ifdef TLS_MBEDTLS_TLS_PRF_SHA256
+-+/* sha256-tlsprf.c */
+-+#if MBEDTLS_VERSION_NUMBER >= 0x02120000 /* mbedtls 2.18.0 */
+-+#include "sha256.h"
+-+int tls_prf_sha256(const u8 *secret, size_t secret_len, const char *label,
+-+		   const u8 *seed, size_t seed_len, u8 *out, size_t outlen)
+-+{
+-+	return mbedtls_ssl_tls_prf(MBEDTLS_SSL_TLS_PRF_SHA256,
+-+				   secret, secret_len, label,
+-+				   seed, seed_len, out, outlen) ? -1 : 0;
+-+}
+-+#else
+-+#include "sha256-tlsprf.c" /* pull in hostap local implementation */
+-+#endif
+-+#endif
+-+
+-+#ifdef TLS_MBEDTLS_TLS_PRF_SHA384
+-+/* sha384-tlsprf.c */
+-+#if MBEDTLS_VERSION_NUMBER >= 0x02120000 /* mbedtls 2.18.0 */
+-+#include "sha384.h"
+-+int tls_prf_sha384(const u8 *secret, size_t secret_len, const char *label,
+-+		   const u8 *seed, size_t seed_len, u8 *out, size_t outlen)
+-+{
+-+	return mbedtls_ssl_tls_prf(MBEDTLS_SSL_TLS_PRF_SHA384,
+-+				   secret, secret_len, label,
+-+				   seed, seed_len, out, outlen) ? -1 : 0;
+-+}
+-+#else
+-+#include "sha384-tlsprf.c" /* pull in hostap local implementation */
+-+#endif
+-+#endif
+-+
+-+
+-+#if MBEDTLS_VERSION_NUMBER < 0x03020000 /* mbedtls 3.2.0 */
+-+#define mbedtls_x509_crt_has_ext_type(crt, ext_type) \
+-+        ((crt)->MBEDTLS_PRIVATE(ext_types) & (ext_type))
+-+#endif
+-+
+-+struct mlist { const char *p; size_t n; };
+-+
+-+
+-+static int
+-+tls_mbedtls_match_altsubject(mbedtls_x509_crt *crt, const char *match)
+-+{
+-+	/* RFE: this could be pre-parsed into structured data at config time */
+-+	struct mlist list[256]; /*(much larger than expected)*/
+-+	int nlist = 0;
+-+	if (   os_strncmp(match, "EMAIL:", 6) != 0
+-+	    && os_strncmp(match, "DNS:",   4) != 0
+-+	    && os_strncmp(match, "URI:",   4) != 0   ) {
+-+		wpa_printf(MSG_INFO, "MTLS: Invalid altSubjectName match '%s'", match);
+-+		return 0;
+-+	}
+-+	for (const char *s = match, *tok; *s; s = tok ? tok+1 : "") {
+-+		do { } while ((tok = os_strchr(s, ';'))
+-+		              && os_strncmp(tok+1, "EMAIL:", 6) != 0
+-+		              && os_strncmp(tok+1, "DNS:",   4) != 0
+-+		              && os_strncmp(tok+1, "URI:",   4) != 0);
+-+		list[nlist].p = s;
+-+		list[nlist].n = tok ? (size_t)(tok - s) : os_strlen(s);
+-+		if (list[nlist].n && ++nlist == sizeof(list)/sizeof(*list)) {
+-+			wpa_printf(MSG_INFO, "MTLS: excessive altSubjectName match '%s'",
+-+			           match);
+-+			break; /* truncate huge list and continue */
+-+		}
+-+	}
+-+
+-+	if (!mbedtls_x509_crt_has_ext_type(crt, MBEDTLS_X509_EXT_SUBJECT_ALT_NAME))
+-+		return 0;
+-+
+-+	const mbedtls_x509_sequence *cur = &crt->subject_alt_names;
+-+	for (; cur != NULL; cur = cur->next) {
+-+		const unsigned char san_type = (unsigned char)cur->buf.tag
+-+		                             & MBEDTLS_ASN1_TAG_VALUE_MASK;
+-+		char t;
+-+		size_t step = 4;
+-+		switch (san_type) {             /* "EMAIL:" or "DNS:" or "URI:" */
+-+		case MBEDTLS_X509_SAN_RFC822_NAME:       step = 6; t = 'E'; break;
+-+		case MBEDTLS_X509_SAN_DNS_NAME:                    t = 'D'; break;
+-+		case MBEDTLS_X509_SAN_UNIFORM_RESOURCE_IDENTIFIER: t = 'U'; break;
+-+		default: continue;
+-+		}
+-+
+-+		for (int i = 0; i < nlist; ++i) {
+-+			/* step over "EMAIL:" or "DNS:" or "URI:" in list[i].p */
+-+			/* Note: v is not '\0'-terminated, but is a known length vlen,
+-+			 * so okay to pass to os_strncasecmp() even though not z-string */
+-+			if (cur->buf.len == list[i].n - step && t == *list[i].p
+-+			    && 0 == os_strncasecmp((char *)cur->buf.p,
+-+			                           list[i].p+step, cur->buf.len)) {
+-+				return 1; /* match */
+-+			}
+-+		}
+-+	}
+-+	return 0; /* no match */
+-+}
+-+
+-+
+-+static int
+-+tls_mbedtls_match_suffix(const char *v, size_t vlen,
+-+                         const struct mlist *list, int nlist, int full)
+-+{
+-+	/* Note: v is not '\0'-terminated, but is a known length vlen,
+-+	 * so okay to pass to os_strncasecmp() even though not z-string */
+-+	for (int i = 0; i < nlist; ++i) {
+-+		size_t n = list[i].n;
+-+		if ((n == vlen || (n < vlen && v[vlen-n-1] == '.' && !full))
+-+		    && 0 == os_strncasecmp(v+vlen-n, list[i].p, n))
+-+			return 1; /* match */
+-+	}
+-+	return 0; /* no match */
+-+}
+-+
+-+
+-+static int
+-+tls_mbedtls_match_suffixes(mbedtls_x509_crt *crt, const char *match, int full)
+-+{
+-+	/* RFE: this could be pre-parsed into structured data at config time */
+-+	struct mlist list[256]; /*(much larger than expected)*/
+-+	int nlist = 0;
+-+	for (const char *s = match, *tok; *s; s = tok ? tok+1 : "") {
+-+		tok = os_strchr(s, ';');
+-+		list[nlist].p = s;
+-+		list[nlist].n = tok ? (size_t)(tok - s) : os_strlen(s);
+-+		if (list[nlist].n && ++nlist == sizeof(list)/sizeof(*list)) {
+-+			wpa_printf(MSG_INFO, "MTLS: excessive suffix match '%s'", match);
+-+			break; /* truncate huge list and continue */
+-+		}
+-+	}
+-+
+-+	/* check subjectAltNames */
+-+	if (mbedtls_x509_crt_has_ext_type(crt, MBEDTLS_X509_EXT_SUBJECT_ALT_NAME)) {
+-+		const mbedtls_x509_sequence *cur = &crt->subject_alt_names;
+-+		for (; cur != NULL; cur = cur->next) {
+-+			const unsigned char san_type = (unsigned char)cur->buf.tag
+-+			                             & MBEDTLS_ASN1_TAG_VALUE_MASK;
+-+			if (san_type == MBEDTLS_X509_SAN_DNS_NAME
+-+			    && tls_mbedtls_match_suffix((char *)cur->buf.p,
+-+			                                cur->buf.len,
+-+			                                list, nlist, full)) {
+-+				return 1; /* match */
+-+			}
+-+		}
+-+	}
+-+
+-+	/* check subject CN */
+-+	const mbedtls_x509_name *name = &crt->subject;
+-+	for (; name != NULL; name = name->next) {
+-+		if (name->oid.p && MBEDTLS_OID_CMP(MBEDTLS_OID_AT_CN, &name->oid) == 0)
+-+			break;
+-+	}
+-+	if (name && tls_mbedtls_match_suffix((char *)name->val.p, name->val.len,
+-+	                                     list, nlist, full)) {
+-+		return 1; /* match */
+-+	}
+-+
+-+	return 0; /* no match */
+-+}
+-+
+-+
+-+static int
+-+tls_mbedtls_match_dn_field(mbedtls_x509_crt *crt, const char *match)
+-+{
+-+	/* RFE: this could be pre-parsed into structured data at config time */
+-+	struct mlistoid { const char *p; size_t n;
+-+	                  const char *oid; size_t olen;
+-+	                  int prefix; };
+-+	struct mlistoid list[32]; /*(much larger than expected)*/
+-+	int nlist = 0;
+-+	for (const char *s = match, *tok, *e; *s; s = tok ? tok+1 : "") {
+-+		tok = os_strchr(s, '/');
+-+		list[nlist].oid = NULL;
+-+		list[nlist].olen = 0;
+-+		list[nlist].n = tok ? (size_t)(tok - s) : os_strlen(s);
+-+		e = memchr(s, '=', list[nlist].n);
+-+		if (e == NULL) {
+-+			if (list[nlist].n == 0)
+-+				continue; /* skip consecutive, repeated '/' */
+-+			if (list[nlist].n == 1 && *s == '*') {
+-+				/* special-case "*" to match any OID and value */
+-+				s = e = "=*";
+-+				list[nlist].n = 2;
+-+				list[nlist].oid = "";
+-+			}
+-+			else {
+-+				wpa_printf(MSG_INFO,
+-+				           "MTLS: invalid check_cert_subject '%s' missing '='",
+-+				           match);
+-+				return 0;
+-+			}
+-+		}
+-+		switch (e - s) {
+-+		case 1:
+-+			if (*s == 'C') {
+-+				list[nlist].oid  = MBEDTLS_OID_AT_COUNTRY;
+-+				list[nlist].olen = sizeof(MBEDTLS_OID_AT_COUNTRY)-1;
+-+			}
+-+			else if (*s == 'L') {
+-+				list[nlist].oid  = MBEDTLS_OID_AT_LOCALITY;
+-+				list[nlist].olen = sizeof(MBEDTLS_OID_AT_LOCALITY)-1;
+-+			}
+-+			else if (*s == 'O') {
+-+				list[nlist].oid  = MBEDTLS_OID_AT_ORGANIZATION;
+-+				list[nlist].olen = sizeof(MBEDTLS_OID_AT_ORGANIZATION)-1;
+-+			}
+-+			break;
+-+		case 2:
+-+			if (s[0] == 'C' && s[1] == 'N') {
+-+				list[nlist].oid  = MBEDTLS_OID_AT_CN;
+-+				list[nlist].olen = sizeof(MBEDTLS_OID_AT_CN)-1;
+-+			}
+-+			else if (s[0] == 'S' && s[1] == 'T') {
+-+				list[nlist].oid  = MBEDTLS_OID_AT_STATE;
+-+				list[nlist].olen = sizeof(MBEDTLS_OID_AT_STATE)-1;
+-+			}
+-+			else if (s[0] == 'O' && s[1] == 'U') {
+-+				list[nlist].oid  = MBEDTLS_OID_AT_ORG_UNIT;
+-+				list[nlist].olen = sizeof(MBEDTLS_OID_AT_ORG_UNIT)-1;
+-+			}
+-+			break;
+-+		case 12:
+-+			if (os_memcmp(s, "emailAddress", 12) == 0) {
+-+				list[nlist].oid  = MBEDTLS_OID_PKCS9_EMAIL;
+-+				list[nlist].olen = sizeof(MBEDTLS_OID_PKCS9_EMAIL)-1;
+-+			}
+-+			break;
+-+		default:
+-+			break;
+-+		}
+-+		if (list[nlist].oid == NULL) {
+-+			wpa_printf(MSG_INFO,
+-+			           "MTLS: Unknown field in check_cert_subject '%s'",
+-+			           match);
+-+			return 0;
+-+		}
+-+		list[nlist].n -= (size_t)(++e - s);
+-+		list[nlist].p = e;
+-+		if (list[nlist].n && e[list[nlist].n-1] == '*') {
+-+			--list[nlist].n;
+-+			list[nlist].prefix = 1;
+-+		}
+-+		/*(could easily add support for suffix matches if value begins with '*',
+-+		 * but suffix match is not currently supported by other TLS modules)*/
+-+
+-+		if (list[nlist].n && ++nlist == sizeof(list)/sizeof(*list)) {
+-+			wpa_printf(MSG_INFO,
+-+			           "MTLS: excessive check_cert_subject match '%s'",
+-+			           match);
+-+			break; /* truncate huge list and continue */
+-+		}
+-+	}
+-+
+-+	/* each component in match string must match cert Subject in order listed
+-+	 * The behavior below preserves ordering but is slightly different than
+-+	 * the grossly inefficient contortions implemented in tls_openssl.c */
+-+	const mbedtls_x509_name *name = &crt->subject;
+-+	for (int i = 0; i < nlist; ++i) {
+-+		int found = 0;
+-+		for (; name != NULL && !found; name = name->next) {
+-+			if (!name->oid.p)
+-+				continue;
+-+			/* special-case "*" to match any OID and value */
+-+			if (list[i].olen == 0) {
+-+				found = 1;
+-+				continue;
+-+			}
+-+			/* perform equalent of !MBEDTLS_OID_CMP() with oid ptr and len */
+-+			if (list[i].olen != name->oid.len
+-+			    || os_memcmp(list[i].oid, name->oid.p, name->oid.len) != 0)
+-+				continue;
+-+			/* Note: v is not '\0'-terminated, but is a known length vlen,
+-+			 * so okay to pass to os_strncasecmp() even though not z-string */
+-+			if ((list[i].prefix
+-+			      ? list[i].n <= name->val.len  /* prefix match */
+-+			      : list[i].n == name->val.len) /* full match */
+-+			    && 0 == os_strncasecmp((char *)name->val.p,
+-+			                           list[i].p, list[i].n)) {
+-+				found = 1;
+-+				continue;
+-+			}
+-+		}
+-+		if (!found)
+-+			return 0; /* no match */
+-+	}
+-+	return 1; /* match */
+-+}
+-+
+-+
+-+__attribute_cold__
+-+static void
+-+tls_mbedtls_verify_fail_event (mbedtls_x509_crt *crt, int depth,
+-+                               const char *errmsg, enum tls_fail_reason reason)
+-+{
+-+	struct tls_config *init_conf = &tls_ctx_global.init_conf;
+-+	if (init_conf->event_cb == NULL)
+-+		return;
+-+
+-+	struct wpabuf *certbuf = wpabuf_alloc_copy(crt->raw.p, crt->raw.len);
+-+	char subject[MBEDTLS_X509_MAX_DN_NAME_SIZE*2];
+-+	if (mbedtls_x509_dn_gets(subject, sizeof(subject), &crt->subject) < 0)
+-+		subject[0] = '\0';
+-+	union tls_event_data ev;
+-+	os_memset(&ev, 0, sizeof(ev));
+-+	ev.cert_fail.reason = reason;
+-+	ev.cert_fail.depth = depth;
+-+	ev.cert_fail.subject = subject;
+-+	ev.cert_fail.reason_txt = errmsg;
+-+	ev.cert_fail.cert = certbuf;
+-+
+-+	init_conf->event_cb(init_conf->cb_ctx, TLS_CERT_CHAIN_FAILURE, &ev);
+-+
+-+	wpabuf_free(certbuf);
+-+}
+-+
+-+
+-+__attribute_noinline__
+-+static void
+-+tls_mbedtls_verify_cert_event (struct tls_connection *conn,
+-+                               mbedtls_x509_crt *crt, int depth)
+-+{
+-+	struct tls_config *init_conf = &tls_ctx_global.init_conf;
+-+	if (init_conf->event_cb == NULL)
+-+		return;
+-+
+-+	struct wpabuf *certbuf = NULL;
+-+	union tls_event_data ev;
+-+	os_memset(&ev, 0, sizeof(ev));
+-+
+-+  #ifdef MBEDTLS_SHA256_C
+-+	u8 hash[SHA256_DIGEST_LENGTH];
+-+	const u8 *addr[] = { (u8 *)crt->raw.p };
+-+	if (sha256_vector(1, addr, &crt->raw.len, hash) == 0) {
+-+		ev.peer_cert.hash = hash;
+-+		ev.peer_cert.hash_len = sizeof(hash);
+-+	}
+-+  #endif
+-+	ev.peer_cert.depth = depth;
+-+	char subject[MBEDTLS_X509_MAX_DN_NAME_SIZE*2];
+-+	if (depth == 0)
+-+		ev.peer_cert.subject = conn->peer_subject;
+-+	if (ev.peer_cert.subject == NULL) {
+-+		ev.peer_cert.subject = subject;
+-+		if (mbedtls_x509_dn_gets(subject, sizeof(subject), &crt->subject) < 0)
+-+			subject[0] = '\0';
+-+	}
+-+
+-+	char serial_num[128+1];
+-+	ev.peer_cert.serial_num =
+-+	  tls_mbedtls_peer_serial_num(crt, serial_num, sizeof(serial_num));
+-+
+-+	const mbedtls_x509_sequence *cur;
+-+
+-+	cur = NULL;
+-+	if (mbedtls_x509_crt_has_ext_type(crt, MBEDTLS_X509_EXT_SUBJECT_ALT_NAME))
+-+		cur = &crt->subject_alt_names;
+-+	for (; cur != NULL; cur = cur->next) {
+-+		const unsigned char san_type = (unsigned char)cur->buf.tag
+-+		                             & MBEDTLS_ASN1_TAG_VALUE_MASK;
+-+		size_t prelen = 4;
+-+		const char *pre;
+-+		switch (san_type) {
+-+		case MBEDTLS_X509_SAN_RFC822_NAME:     prelen = 6; pre = "EMAIL:";break;
+-+		case MBEDTLS_X509_SAN_DNS_NAME:                    pre = "DNS:";  break;
+-+		case MBEDTLS_X509_SAN_UNIFORM_RESOURCE_IDENTIFIER: pre = "URI:";  break;
+-+		default: continue;
+-+		}
+-+
+-+		char *pos = os_malloc(prelen + cur->buf.len + 1);
+-+		if (pos == NULL)
+-+			break;
+-+		ev.peer_cert.altsubject[ev.peer_cert.num_altsubject] = pos;
+-+		os_memcpy(pos, pre, prelen);
+-+		/* data should be properly backslash-escaped if needed,
+-+		 * so code below does not re-escape, but does replace CTLs */
+-+		/*os_memcpy(pos+prelen, cur->buf.p, cur->buf.len);*/
+-+		/*pos[prelen+cur->buf.len] = '\0';*/
+-+		pos += prelen;
+-+		for (size_t i = 0; i < cur->buf.len; ++i) {
+-+			unsigned char c = cur->buf.p[i];
+-+			*pos++ = (c >= 32 && c != 127) ? c : '?';
+-+		}
+-+		*pos = '\0';
+-+
+-+		if (++ev.peer_cert.num_altsubject == TLS_MAX_ALT_SUBJECT)
+-+			break;
+-+	}
+-+
+-+	cur = NULL;
+-+	if (mbedtls_x509_crt_has_ext_type(crt, MBEDTLS_X509_EXT_CERTIFICATE_POLICIES))
+-+		cur = &crt->certificate_policies;
+-+	for (; cur != NULL; cur = cur->next) {
+-+		if (cur->buf.len != 11) /* len of OID_TOD_STRICT or OID_TOD_TOFU */
+-+			continue;
+-+		/* TOD-STRICT "1.3.6.1.4.1.40808.1.3.1" */
+-+		/* TOD-TOFU   "1.3.6.1.4.1.40808.1.3.2" */
+-+		#define OID_TOD_STRICT "\x2b\x06\x01\x04\x01\x82\xbe\x68\x01\x03\x01"
+-+		#define OID_TOD_TOFU   "\x2b\x06\x01\x04\x01\x82\xbe\x68\x01\x03\x02"
+-+		if (os_memcmp(cur->buf.p,
+-+		              OID_TOD_STRICT, sizeof(OID_TOD_STRICT)-1) == 0) {
+-+			ev.peer_cert.tod = 1; /* TOD-STRICT */
+-+			break;
+-+		}
+-+		if (os_memcmp(cur->buf.p,
+-+		              OID_TOD_TOFU, sizeof(OID_TOD_TOFU)-1) == 0) {
+-+			ev.peer_cert.tod = 2; /* TOD-TOFU */
+-+			break;
+-+		}
+-+	}
+-+
+-+	struct tls_conf *tls_conf = conn->tls_conf;
+-+	if (tls_conf->ca_cert_probe || (tls_conf->flags & TLS_CONN_EXT_CERT_CHECK)
+-+	    || init_conf->cert_in_cb) {
+-+		certbuf = wpabuf_alloc_copy(crt->raw.p, crt->raw.len);
+-+		ev.peer_cert.cert = certbuf;
+-+	}
+-+
+-+	init_conf->event_cb(init_conf->cb_ctx, TLS_PEER_CERTIFICATE, &ev);
+-+
+-+	wpabuf_free(certbuf);
+-+	char **altsubject;
+-+	*(const char ***)&altsubject = ev.peer_cert.altsubject;
+-+	for (size_t i = 0; i < ev.peer_cert.num_altsubject; ++i)
+-+		os_free(altsubject[i]);
+-+}
+-+
+-+
+-+static int
+-+tls_mbedtls_verify_cb (void *arg, mbedtls_x509_crt *crt, int depth, uint32_t *flags)
+-+{
+-+	/* XXX: N.B. verify code not carefully tested besides hwsim tests
+-+	 *
+-+	 * RFE: mbedtls_x509_crt_verify_info() and enhance log trace messages
+-+	 * RFE: review and add support for additional TLS_CONN_* flags
+-+	 * not handling OCSP (not available in mbedtls)
+-+	 * ... */
+-+
+-+	struct tls_connection *conn = (struct tls_connection *)arg;
+-+	struct tls_conf *tls_conf = conn->tls_conf;
+-+	uint32_t flags_in = *flags;
+-+
+-+	if (depth > 8) { /*(depth 8 picked as arbitrary limit)*/
+-+		emsg(MSG_WARNING, "client cert chain too long");
+-+		*flags |= MBEDTLS_X509_BADCERT_OTHER; /* cert chain too long */
+-+		tls_mbedtls_verify_fail_event(crt, depth,
+-+			                      "client cert chain too long",
+-+		                              TLS_FAIL_BAD_CERTIFICATE);
+-+	}
+-+	else if (tls_conf->verify_depth0_only) {
+-+		if (depth > 0)
+-+			*flags = 0;
+-+		else {
+-+		  #ifdef MBEDTLS_SHA256_C
+-+			u8 hash[SHA256_DIGEST_LENGTH];
+-+			const u8 *addr[] = { (u8 *)crt->raw.p };
+-+			if (sha256_vector(1, addr, &crt->raw.len, hash) < 0
+-+			    || os_memcmp(tls_conf->ca_cert_hash, hash, sizeof(hash)) != 0) {
+-+				*flags |= MBEDTLS_X509_BADCERT_NOT_TRUSTED;
+-+				tls_mbedtls_verify_fail_event(crt, depth,
+-+			                                      "cert hash mismatch",
+-+				                              TLS_FAIL_UNTRUSTED);
+-+			}
+-+			else /* hash matches; ignore other issues *except* if revoked)*/
+-+				*flags &= MBEDTLS_X509_BADCERT_REVOKED;
+-+		  #endif
+-+		}
+-+	}
+-+	else if (depth == 0) {
+-+		if (!conn->peer_subject)
+-+			tls_mbedtls_set_peer_subject(conn, crt);
+-+		/*(use same labels to tls_mbedtls_verify_fail_event() as used in
+-+		 * other TLS modules so that hwsim tests find exact string match)*/
+-+		if (!conn->peer_subject) { /* error copying subject string */
+-+			*flags |= MBEDTLS_X509_BADCERT_OTHER;
+-+			tls_mbedtls_verify_fail_event(crt, depth,
+-+			                              "internal error",
+-+			                              TLS_FAIL_UNSPECIFIED);
+-+		}
+-+		/*(use os_strstr() for subject match as is done in tls_mbedtls.c
+-+		 * to follow the same behavior, even though a suffix match would
+-+		 * make more sense.  Also, note that strstr match does not
+-+		 * normalize whitespace (between components) for comparison)*/
+-+		else if (tls_conf->subject_match
+-+		         && os_strstr(conn->peer_subject,
+-+		                      tls_conf->subject_match) == NULL) {
+-+			wpa_printf(MSG_WARNING,
+-+			           "MTLS: Subject '%s' did not match with '%s'",
+-+			           conn->peer_subject, tls_conf->subject_match);
+-+			*flags |= MBEDTLS_X509_BADCERT_CN_MISMATCH;
+-+			tls_mbedtls_verify_fail_event(crt, depth,
+-+			                              "Subject mismatch",
+-+			                              TLS_FAIL_SUBJECT_MISMATCH);
+-+		}
+-+		if (tls_conf->altsubject_match
+-+		    && !tls_mbedtls_match_altsubject(crt, tls_conf->altsubject_match)) {
+-+			wpa_printf(MSG_WARNING,
+-+				   "MTLS: altSubjectName match '%s' not found",
+-+			           tls_conf->altsubject_match);
+-+			*flags |= MBEDTLS_X509_BADCERT_CN_MISMATCH;
+-+			tls_mbedtls_verify_fail_event(crt, depth,
+-+			                              "AltSubject mismatch",
+-+			                              TLS_FAIL_ALTSUBJECT_MISMATCH);
+-+		}
+-+		if (tls_conf->suffix_match
+-+		    && !tls_mbedtls_match_suffixes(crt, tls_conf->suffix_match, 0)) {
+-+			wpa_printf(MSG_WARNING,
+-+			           "MTLS: Domain suffix match '%s' not found",
+-+				   tls_conf->suffix_match);
+-+			*flags |= MBEDTLS_X509_BADCERT_CN_MISMATCH;
+-+			tls_mbedtls_verify_fail_event(crt, depth,
+-+			                              "Domain suffix mismatch",
+-+			                              TLS_FAIL_DOMAIN_SUFFIX_MISMATCH);
+-+		}
+-+		if (tls_conf->domain_match
+-+		    && !tls_mbedtls_match_suffixes(crt, tls_conf->domain_match, 1)) {
+-+			wpa_printf(MSG_WARNING,
+-+			           "MTLS: Domain match '%s' not found",
+-+				   tls_conf->domain_match);
+-+			*flags |= MBEDTLS_X509_BADCERT_CN_MISMATCH;
+-+			tls_mbedtls_verify_fail_event(crt, depth,
+-+			                              "Domain mismatch",
+-+			                              TLS_FAIL_DOMAIN_MISMATCH);
+-+		}
+-+		if (tls_conf->check_cert_subject
+-+		    && !tls_mbedtls_match_dn_field(crt, tls_conf->check_cert_subject)) {
+-+			*flags |= MBEDTLS_X509_BADCERT_CN_MISMATCH;
+-+			tls_mbedtls_verify_fail_event(crt, depth,
+-+			                              "Distinguished Name",
+-+			                              TLS_FAIL_DN_MISMATCH);
+-+		}
+-+		if (tls_conf->flags & TLS_CONN_SUITEB) {
+-+			/* check RSA modulus size (public key bitlen) */
+-+			const mbedtls_pk_type_t pk_alg = mbedtls_pk_get_type(&crt->pk);
+-+			if ((pk_alg == MBEDTLS_PK_RSA || pk_alg == MBEDTLS_PK_RSASSA_PSS)
+-+			    && mbedtls_pk_get_bitlen(&crt->pk) < 3072) {
+-+				/* hwsim suite_b RSA tests expect 3072
+-+				 *   suite_b_192_rsa_ecdhe_radius_rsa2048_client
+-+				 *   suite_b_192_rsa_dhe_radius_rsa2048_client */
+-+				*flags |= MBEDTLS_X509_BADCERT_BAD_KEY;
+-+				tls_mbedtls_verify_fail_event(crt, depth,
+-+				                              "Insufficient RSA modulus size",
+-+				                              TLS_FAIL_INSUFFICIENT_KEY_LEN);
+-+			}
+-+		}
+-+		if (tls_conf->check_crl && tls_conf->crl == NULL) {
+-+			/* see tests/hwsim test_ap_eap.py ap_wpa2_eap_tls_check_crl */
+-+			emsg(MSG_WARNING, "check_crl set but no CRL loaded; reject all?");
+-+			*flags |= MBEDTLS_X509_BADCERT_OTHER;
+-+			tls_mbedtls_verify_fail_event(crt, depth,
+-+				                      "check_crl set but no CRL loaded; "
+-+			                              "reject all?",
+-+			                              TLS_FAIL_BAD_CERTIFICATE);
+-+		}
+-+	}
+-+	else {
+-+		if (tls_conf->check_crl != 2) /* 2 == verify CRLs for all certs */
+-+			*flags &= ~MBEDTLS_X509_BADCERT_REVOKED;
+-+	}
+-+
+-+	if (!tls_conf->check_crl_strict) {
+-+		*flags &= ~MBEDTLS_X509_BADCRL_EXPIRED;
+-+		*flags &= ~MBEDTLS_X509_BADCRL_FUTURE;
+-+	}
+-+
+-+	if (tls_conf->flags & TLS_CONN_DISABLE_TIME_CHECKS) {
+-+		*flags &= ~MBEDTLS_X509_BADCERT_EXPIRED;
+-+		*flags &= ~MBEDTLS_X509_BADCERT_FUTURE;
+-+	}
+-+
+-+	tls_mbedtls_verify_cert_event(conn, crt, depth);
+-+
+-+	if (*flags) {
+-+		if (*flags & (MBEDTLS_X509_BADCERT_NOT_TRUSTED
+-+		             |MBEDTLS_X509_BADCERT_CN_MISMATCH
+-+		             |MBEDTLS_X509_BADCERT_REVOKED)) {
+-+			emsg(MSG_WARNING, "client cert not trusted");
+-+		}
+-+		/* report event if flags set but no additional flags set above */
+-+		/* (could translate flags to more detailed TLS_FAIL_* if needed) */
+-+		if (!(*flags & ~flags_in)) {
+-+			enum tls_fail_reason reason = TLS_FAIL_UNSPECIFIED;
+-+			const char *errmsg = "cert verify fail unspecified";
+-+			if (*flags & MBEDTLS_X509_BADCERT_NOT_TRUSTED) {
+-+				reason = TLS_FAIL_UNTRUSTED;
+-+				errmsg = "certificate not trusted";
+-+			}
+-+			if (*flags & MBEDTLS_X509_BADCERT_REVOKED) {
+-+				reason = TLS_FAIL_REVOKED;
+-+				errmsg = "certificate has been revoked";
+-+			}
+-+			if (*flags & MBEDTLS_X509_BADCERT_FUTURE) {
+-+				reason = TLS_FAIL_NOT_YET_VALID;
+-+				errmsg = "certificate not yet valid";
+-+			}
+-+			if (*flags & MBEDTLS_X509_BADCERT_EXPIRED) {
+-+				reason = TLS_FAIL_EXPIRED;
+-+				errmsg = "certificate has expired";
+-+			}
+-+			if (*flags & MBEDTLS_X509_BADCERT_BAD_MD) {
+-+				reason = TLS_FAIL_BAD_CERTIFICATE;
+-+				errmsg = "certificate uses insecure algorithm";
+-+			}
+-+			tls_mbedtls_verify_fail_event(crt, depth, errmsg, reason);
+-+		}
+-+	  #if 0
+-+		/* ??? send (again) cert events for all certs in chain ???
+-+		 * (should already have been called for greater depths) */
+-+		/* tls_openssl.c:tls_verify_cb() sends cert events for all certs
+-+		 * in chain if certificate validation fails, but sends all events
+-+		 * with depth set to 0 (might be a bug) */
+-+		if (depth > 0) {
+-+			int pdepth = depth + 1;
+-+			for (mbedtls_x509_crt *pcrt; (pcrt = crt->next); ++pdepth) {
+-+				tls_mbedtls_verify_cert_event(conn, pcrt, pdepth);
+-+			}
+-+		}
+-+	  #endif
+-+		/*(do not preserve subject if verification failed but was optional)*/
+-+		if (depth == 0 && conn->peer_subject) {
+-+			os_free(conn->peer_subject);
+-+			conn->peer_subject = NULL;
+-+		}
+-+	}
+-+	else if (depth == 0) {
+-+		struct tls_config *init_conf = &tls_ctx_global.init_conf;
+-+		if (tls_conf->ca_cert_probe) {
+-+			/* reject server certificate on probe-only run */
+-+			*flags |= MBEDTLS_X509_BADCERT_OTHER;
+-+			tls_mbedtls_verify_fail_event(crt, depth,
+-+			                              "server chain probe",
+-+			                              TLS_FAIL_SERVER_CHAIN_PROBE);
+-+		}
+-+		else if (init_conf->event_cb) {
+-+			/* ??? send event as soon as depth == 0 is verified ???
+-+			 * What about rest of chain?
+-+			 * Follows tls_mbedtls.c behavior: */
+-+			init_conf->event_cb(init_conf->cb_ctx,
+-+			                    TLS_CERT_CHAIN_SUCCESS, NULL);
+-+		}
+-+	}
+-+
+-+	return 0;
+-+}
+---- /dev/null
+-+++ b/tests/build/build-wpa_supplicant-mbedtls.config
+-@@ -0,0 +1,24 @@
+-+CONFIG_TLS=mbedtls
+-+
+-+CONFIG_WPS=y
+-+CONFIG_EAP_TLS=y
+-+CONFIG_EAP_MSCHAPV2=y
+-+
+-+CONFIG_EAP_PSK=y
+-+CONFIG_EAP_GPSK=y
+-+CONFIG_EAP_AKA=y
+-+CONFIG_EAP_SIM=y
+-+CONFIG_EAP_SAKE=y
+-+CONFIG_EAP_PAX=y
+-+CONFIG_EAP_FAST=y
+-+CONFIG_EAP_IKEV2=y
+-+
+-+CONFIG_SAE=y
+-+CONFIG_FILS=y
+-+CONFIG_FILS_SK_PFS=y
+-+CONFIG_OWE=y
+-+CONFIG_DPP=y
+-+CONFIG_SUITEB=y
+-+CONFIG_SUITEB192=y
+-+
+-+CFLAGS += -Werror
+---- a/tests/hwsim/example-hostapd.config
+-+++ b/tests/hwsim/example-hostapd.config
+-@@ -4,6 +4,7 @@ CONFIG_DRIVER_NONE=y
+- CONFIG_DRIVER_NL80211=y
+- CONFIG_RSN_PREAUTH=y
+- 
+-+#CONFIG_TLS=mbedtls
+- #CONFIG_TLS=internal
+- #CONFIG_INTERNAL_LIBTOMMATH=y
+- #CONFIG_INTERNAL_LIBTOMMATH_FAST=y
+-@@ -39,6 +40,9 @@ endif
+- ifeq ($(CONFIG_TLS), wolfssl)
+- CONFIG_EAP_PWD=y
+- endif
+-+ifeq ($(CONFIG_TLS), mbedtls)
+-+CONFIG_EAP_PWD=y
+-+endif
+- CONFIG_EAP_EKE=y
+- CONFIG_PKCS12=y
+- CONFIG_RADIUS_SERVER=y
+---- a/tests/hwsim/example-wpa_supplicant.config
+-+++ b/tests/hwsim/example-wpa_supplicant.config
+-@@ -2,6 +2,7 @@
+- 
+- CONFIG_TLS=openssl
+- #CONFIG_TLS=wolfssl
+-+#CONFIG_TLS=mbedtls
+- #CONFIG_TLS=internal
+- #CONFIG_INTERNAL_LIBTOMMATH=y
+- #CONFIG_INTERNAL_LIBTOMMATH_FAST=y
+-@@ -41,6 +42,9 @@ endif
+- ifeq ($(CONFIG_TLS), wolfssl)
+- CONFIG_EAP_PWD=y
+- endif
+-+ifeq ($(CONFIG_TLS), mbedtls)
+-+CONFIG_EAP_PWD=y
+-+endif
+- 
+- CONFIG_USIM_SIMULATOR=y
+- CONFIG_SIM_SIMULATOR=y
+---- a/wpa_supplicant/Makefile
+-+++ b/wpa_supplicant/Makefile
+-@@ -1163,6 +1163,29 @@ endif
+- CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONFIG_TLS_DEFAULT_CIPHERS)\"
+- endif
+- 
+-+ifeq ($(CONFIG_TLS), mbedtls)
+-+ifndef CONFIG_CRYPTO
+-+CONFIG_CRYPTO=mbedtls
+-+endif
+-+ifdef TLS_FUNCS
+-+OBJS += ../src/crypto/tls_mbedtls.o
+-+LIBS += -lmbedtls -lmbedx509
+-+endif
+-+OBJS += ../src/crypto/crypto_$(CONFIG_CRYPTO).o
+-+OBJS_p += ../src/crypto/crypto_$(CONFIG_CRYPTO).o
+-+OBJS_priv += ../src/crypto/crypto_$(CONFIG_CRYPTO).o
+-+ifdef NEED_FIPS186_2_PRF
+-+OBJS += ../src/crypto/fips_prf_internal.o
+-+SHA1OBJS += ../src/crypto/sha1-internal.o
+-+endif
+-+ifeq ($(CONFIG_CRYPTO), mbedtls)
+-+LIBS += -lmbedcrypto
+-+LIBS_p += -lmbedcrypto
+-+# XXX: create a config option?
+-+CFLAGS += -DCRYPTO_RSA_OAEP_SHA256
+-+endif
+-+endif
+-+
+- ifeq ($(CONFIG_TLS), gnutls)
+- ifndef CONFIG_CRYPTO
+- # default to libgcrypt
+-@@ -1355,9 +1378,11 @@ endif
+- 
+- ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- NEED_INTERNAL_AES_WRAP=y
+- endif
+- endif
+-+endif
+- ifdef CONFIG_OPENSSL_INTERNAL_AES_WRAP
+- # Seems to be needed at least with BoringSSL
+- NEED_INTERNAL_AES_WRAP=y
+-@@ -1371,9 +1396,11 @@ endif
+- 
+- ifdef NEED_INTERNAL_AES_WRAP
+- ifneq ($(CONFIG_TLS), linux)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- AESOBJS += ../src/crypto/aes-unwrap.o
+- endif
+- endif
+-+endif
+- ifdef NEED_AES_EAX
+- AESOBJS += ../src/crypto/aes-eax.o
+- NEED_AES_CTR=y
+-@@ -1383,35 +1410,45 @@ AESOBJS += ../src/crypto/aes-siv.o
+- NEED_AES_CTR=y
+- endif
+- ifdef NEED_AES_CTR
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- AESOBJS += ../src/crypto/aes-ctr.o
+- endif
+-+endif
+- ifdef NEED_AES_ENCBLOCK
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- AESOBJS += ../src/crypto/aes-encblock.o
+- endif
+-+endif
+- NEED_AES_ENC=y
+- ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), linux)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- AESOBJS += ../src/crypto/aes-omac1.o
+- endif
+- endif
+- endif
+-+endif
+- ifdef NEED_AES_WRAP
+- NEED_AES_ENC=y
+- ifdef NEED_INTERNAL_AES_WRAP
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- AESOBJS += ../src/crypto/aes-wrap.o
+- endif
+- endif
+-+endif
+- ifdef NEED_AES_CBC
+- NEED_AES_ENC=y
+- ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), linux)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- AESOBJS += ../src/crypto/aes-cbc.o
+- endif
+- endif
+- endif
+- endif
+-+endif
+- ifdef NEED_AES_ENC
+- ifdef CONFIG_INTERNAL_AES
+- AESOBJS += ../src/crypto/aes-internal-enc.o
+-@@ -1426,12 +1463,16 @@ ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), linux)
+- ifneq ($(CONFIG_TLS), gnutls)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- SHA1OBJS += ../src/crypto/sha1.o
+- endif
+- endif
+- endif
+- endif
+-+endif
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- SHA1OBJS += ../src/crypto/sha1-prf.o
+-+endif
+- ifdef CONFIG_INTERNAL_SHA1
+- SHA1OBJS += ../src/crypto/sha1-internal.o
+- ifdef NEED_FIPS186_2_PRF
+-@@ -1443,29 +1484,37 @@ CFLAGS += -DCONFIG_NO_PBKDF2
+- else
+- ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- SHA1OBJS += ../src/crypto/sha1-pbkdf2.o
+- endif
+- endif
+- endif
+-+endif
+- ifdef NEED_T_PRF
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- SHA1OBJS += ../src/crypto/sha1-tprf.o
+- endif
+-+endif
+- ifdef NEED_TLS_PRF
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- SHA1OBJS += ../src/crypto/sha1-tlsprf.o
+- endif
+- endif
+-+endif
+- 
+- ifndef CONFIG_FIPS
+- ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), linux)
+- ifneq ($(CONFIG_TLS), gnutls)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- MD5OBJS += ../src/crypto/md5.o
+- endif
+- endif
+- endif
+- endif
+- endif
+-+endif
+- ifdef NEED_MD5
+- ifdef CONFIG_INTERNAL_MD5
+- MD5OBJS += ../src/crypto/md5-internal.o
+-@@ -1520,12 +1569,17 @@ ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), linux)
+- ifneq ($(CONFIG_TLS), gnutls)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- SHA256OBJS += ../src/crypto/sha256.o
+- endif
+- endif
+- endif
+- endif
+-+endif
+-+
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- SHA256OBJS += ../src/crypto/sha256-prf.o
+-+endif
+- ifdef CONFIG_INTERNAL_SHA256
+- SHA256OBJS += ../src/crypto/sha256-internal.o
+- endif
+-@@ -1538,50 +1592,68 @@ CFLAGS += -DCONFIG_INTERNAL_SHA512
+- SHA256OBJS += ../src/crypto/sha512-internal.o
+- endif
+- ifdef NEED_TLS_PRF_SHA256
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- SHA256OBJS += ../src/crypto/sha256-tlsprf.o
+- endif
+-+endif
+- ifdef NEED_TLS_PRF_SHA384
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- SHA256OBJS += ../src/crypto/sha384-tlsprf.o
+- endif
+-+endif
+- ifdef NEED_HMAC_SHA256_KDF
+- CFLAGS += -DCONFIG_HMAC_SHA256_KDF
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha256-kdf.o
+- endif
+-+endif
+- ifdef NEED_HMAC_SHA384_KDF
+- CFLAGS += -DCONFIG_HMAC_SHA384_KDF
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha384-kdf.o
+- endif
+-+endif
+- ifdef NEED_HMAC_SHA512_KDF
+- CFLAGS += -DCONFIG_HMAC_SHA512_KDF
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha512-kdf.o
+- endif
+-+endif
+- OBJS += $(SHA256OBJS)
+- ifdef NEED_SHA384
+- ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), linux)
+- ifneq ($(CONFIG_TLS), gnutls)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha384.o
+- endif
+- endif
+- endif
+- endif
+-+endif
+- CFLAGS += -DCONFIG_SHA384
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha384-prf.o
+- endif
+-+endif
+- ifdef NEED_SHA512
+- ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), linux)
+- ifneq ($(CONFIG_TLS), gnutls)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha512.o
+- endif
+- endif
+- endif
+- endif
+-+endif
+- CFLAGS += -DCONFIG_SHA512
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- OBJS += ../src/crypto/sha512-prf.o
+- endif
+-+endif
+- 
+- ifdef NEED_ASN1
+- OBJS += ../src/tls/asn1.o
+-@@ -1756,10 +1828,12 @@ ifdef CONFIG_FIPS
+- CFLAGS += -DCONFIG_FIPS
+- ifneq ($(CONFIG_TLS), openssl)
+- ifneq ($(CONFIG_TLS), wolfssl)
+-+ifneq ($(CONFIG_TLS), mbedtls)
+- $(error CONFIG_FIPS=y requires CONFIG_TLS=openssl)
+- endif
+- endif
+- endif
+-+endif
+- 
+- OBJS += $(SHA1OBJS) $(DESOBJS)
+- 
+---- a/wpa_supplicant/defconfig
+-+++ b/wpa_supplicant/defconfig
+-@@ -10,8 +10,8 @@
+- # to override previous values of the variables.
+- 
+- 
+--# Uncomment following two lines and fix the paths if you have installed OpenSSL
+--# or GnuTLS in non-default location
+-+# Uncomment following two lines and fix the paths if you have installed TLS
+-+# libraries in a non-default location
+- #CFLAGS += -I/usr/local/openssl/include
+- #LIBS += -L/usr/local/openssl/lib
+- 
+-@@ -20,6 +20,7 @@
+- # used to fix build issues on such systems (krb5.h not found).
+- #CFLAGS += -I/usr/include/kerberos
+- 
+-+
+- # Driver interface for generic Linux wireless extensions
+- # Note: WEXT is deprecated in the current Linux kernel version and no new
+- # functionality is added to it. nl80211-based interface is the new
+-@@ -326,6 +327,7 @@ CONFIG_BACKEND=file
+- # openssl = OpenSSL (default)
+- # gnutls = GnuTLS
+- # internal = Internal TLSv1 implementation (experimental)
+-+# mbedtls = mbed TLS
+- # linux = Linux kernel AF_ALG and internal TLSv1 implementation (experimental)
+- # none = Empty template
+- #CONFIG_TLS=openssl
+diff --git a/package/network/services/hostapd/patches/120-mbedtls-fips186_2_prf.patch b/package/network/services/hostapd/patches/120-mbedtls-fips186_2_prf.patch
+deleted file mode 100644
+index a48725264f..0000000000
+--- a/package/network/services/hostapd/patches/120-mbedtls-fips186_2_prf.patch
++++ /dev/null
+@@ -1,114 +0,0 @@
+-From c8dba4bd750269bcc80fed3d546e2077cb4cdf0e Mon Sep 17 00:00:00 2001
+-From: Glenn Strauss <gstrauss@gluelogic.com>
+-Date: Tue, 19 Jul 2022 20:02:21 -0400
+-Subject: [PATCH 2/7] mbedtls: fips186_2_prf()
+-
+-Signed-off-by: Glenn Strauss <gstrauss@gluelogic.com>
+----
+- hostapd/Makefile            |  4 ---
+- src/crypto/crypto_mbedtls.c | 60 +++++++++++++++++++++++++++++++++++++
+- wpa_supplicant/Makefile     |  4 ---
+- 3 files changed, 60 insertions(+), 8 deletions(-)
+-
+---- a/hostapd/Makefile
+-+++ b/hostapd/Makefile
+-@@ -759,10 +759,6 @@ endif
+- OBJS += ../src/crypto/crypto_$(CONFIG_CRYPTO).o
+- HOBJS += ../src/crypto/crypto_$(CONFIG_CRYPTO).o
+- SOBJS += ../src/crypto/crypto_$(CONFIG_CRYPTO).o
+--ifdef NEED_FIPS186_2_PRF
+--OBJS += ../src/crypto/fips_prf_internal.o
+--SHA1OBJS += ../src/crypto/sha1-internal.o
+--endif
+- ifeq ($(CONFIG_CRYPTO), mbedtls)
+- ifdef CONFIG_DPP
+- LIBS += -lmbedx509
+---- a/src/crypto/crypto_mbedtls.c
+-+++ b/src/crypto/crypto_mbedtls.c
+-@@ -132,6 +132,12 @@
+- #define CRYPTO_MBEDTLS_HMAC_KDF_SHA512
+- #endif
+- 
+-+#if defined(EAP_SIM) || defined(EAP_SIM_DYNAMIC) || defined(EAP_SERVER_SIM) \
+-+ || defined(EAP_AKA) || defined(EAP_AKA_DYNAMIC) || defined(EAP_SERVER_AKA)
+-+/* EAP_SIM=y EAP_AKA=y */
+-+#define CRYPTO_MBEDTLS_FIPS186_2_PRF
+-+#endif
+-+
+- #if defined(EAP_FAST) || defined(EAP_FAST_DYNAMIC) || defined(EAP_SERVER_FAST) \
+-  || defined(EAP_TEAP) || defined(EAP_TEAP_DYNAMIC) || defined(EAP_SERVER_FAST)
+- #define CRYPTO_MBEDTLS_SHA1_T_PRF
+-@@ -813,6 +819,60 @@ int sha1_t_prf(const u8 *key, size_t key
+- 
+- #endif /* CRYPTO_MBEDTLS_SHA1_T_PRF */
+- 
+-+#ifdef CRYPTO_MBEDTLS_FIPS186_2_PRF
+-+
+-+/* fips_prf_internal.c sha1-internal.c */
+-+
+-+/* used only by src/eap_common/eap_sim_common.c:eap_sim_prf()
+-+ * for eap_sim_derive_keys() and eap_sim_derive_keys_reauth()
+-+ * where xlen is 160 */
+-+
+-+int fips186_2_prf(const u8 *seed, size_t seed_len, u8 *x, size_t xlen)
+-+{
+-+	/* FIPS 186-2 + change notice 1 */
+-+
+-+	mbedtls_sha1_context ctx;
+-+	u8 * const xkey = ctx.MBEDTLS_PRIVATE(buffer);
+-+	u32 * const xstate = ctx.MBEDTLS_PRIVATE(state);
+-+	const u32 xstate_init[] =
+-+	  { 0x67452301, 0xEFCDAB89, 0x98BADCFE, 0x10325476, 0xC3D2E1F0 };
+-+
+-+	mbedtls_sha1_init(&ctx);
+-+	os_memcpy(xkey, seed, seed_len < 64 ? seed_len : 64);
+-+
+-+	/* note: does not fill extra bytes if (xlen % 20) (SHA1_MAC_LEN) */
+-+	for (; xlen >= 20; xlen -= 20) {
+-+		/* XSEED_j = 0 */
+-+		/* XVAL = (XKEY + XSEED_j) mod 2^b */
+-+
+-+		/* w_i = G(t, XVAL) */
+-+		os_memcpy(xstate, xstate_init, sizeof(xstate_init));
+-+		mbedtls_internal_sha1_process(&ctx, xkey);
+-+
+-+	  #if __BYTE_ORDER == __LITTLE_ENDIAN
+-+		xstate[0] = host_to_be32(xstate[0]);
+-+		xstate[1] = host_to_be32(xstate[1]);
+-+		xstate[2] = host_to_be32(xstate[2]);
+-+		xstate[3] = host_to_be32(xstate[3]);
+-+		xstate[4] = host_to_be32(xstate[4]);
+-+	  #endif
+-+		os_memcpy(x, xstate, 20);
+-+		if (xlen == 20) /*(done; skip prep for next loop)*/
+-+			break;
+-+
+-+		/* XKEY = (1 + XKEY + w_i) mod 2^b */
+-+		for (u32 carry = 1, k = 20; k-- > 0; carry >>= 8)
+-+			xkey[k] = (carry += xkey[k] + x[k]) & 0xff;
+-+		x += 20;
+-+		/* x_j = w_0|w_1 (each pair of iterations through loop)*/
+-+	}
+-+
+-+	mbedtls_sha1_free(&ctx);
+-+	return 0;
+-+}
+-+
+-+#endif /* CRYPTO_MBEDTLS_FIPS186_2_PRF */
+-+
+- #endif /* MBEDTLS_SHA1_C */
+- 
+- 
+---- a/wpa_supplicant/Makefile
+-+++ b/wpa_supplicant/Makefile
+-@@ -1174,10 +1174,6 @@ endif
+- OBJS += ../src/crypto/crypto_$(CONFIG_CRYPTO).o
+- OBJS_p += ../src/crypto/crypto_$(CONFIG_CRYPTO).o
+- OBJS_priv += ../src/crypto/crypto_$(CONFIG_CRYPTO).o
+--ifdef NEED_FIPS186_2_PRF
+--OBJS += ../src/crypto/fips_prf_internal.o
+--SHA1OBJS += ../src/crypto/sha1-internal.o
+--endif
+- ifeq ($(CONFIG_CRYPTO), mbedtls)
+- LIBS += -lmbedcrypto
+- LIBS_p += -lmbedcrypto
+diff --git a/package/network/services/hostapd/patches/130-mbedtls-annotate-with-TEST_FAIL-for-hwsim-tests.patch b/package/network/services/hostapd/patches/130-mbedtls-annotate-with-TEST_FAIL-for-hwsim-tests.patch
+deleted file mode 100644
+index ae7620b90c..0000000000
+--- a/package/network/services/hostapd/patches/130-mbedtls-annotate-with-TEST_FAIL-for-hwsim-tests.patch
++++ /dev/null
+@@ -1,421 +0,0 @@
+-From 31bd19e0e0254b910cccfd3ddc6a6a9222bbcfc0 Mon Sep 17 00:00:00 2001
+-From: Glenn Strauss <gstrauss@gluelogic.com>
+-Date: Sun, 9 Oct 2022 05:12:17 -0400
+-Subject: [PATCH 3/7] mbedtls: annotate with TEST_FAIL() for hwsim tests
+-
+-Signed-off-by: Glenn Strauss <gstrauss@gluelogic.com>
+----
+- src/crypto/crypto_mbedtls.c | 124 ++++++++++++++++++++++++++++++++++++
+- 1 file changed, 124 insertions(+)
+-
+---- a/src/crypto/crypto_mbedtls.c
+-+++ b/src/crypto/crypto_mbedtls.c
+-@@ -280,6 +280,9 @@ __attribute_noinline__
+- static int md_vector(size_t num_elem, const u8 *addr[], const size_t *len,
+-                      u8 *mac, mbedtls_md_type_t md_type)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	mbedtls_md_context_t ctx;
+- 	mbedtls_md_init(&ctx);
+- 	if (mbedtls_md_setup(&ctx, mbedtls_md_info_from_type(md_type), 0) != 0){
+-@@ -343,6 +346,9 @@ __attribute_noinline__
+- static int sha384_512_vector(size_t num_elem, const u8 *addr[],
+-                              const size_t *len, u8 *mac, int is384)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	struct mbedtls_sha512_context ctx;
+- 	mbedtls_sha512_init(&ctx);
+-   #if MBEDTLS_VERSION_MAJOR >= 3
+-@@ -375,6 +381,9 @@ int sha384_vector(size_t num_elem, const
+- #include <mbedtls/sha256.h>
+- int sha256_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	struct mbedtls_sha256_context ctx;
+- 	mbedtls_sha256_init(&ctx);
+-   #if MBEDTLS_VERSION_MAJOR >= 3
+-@@ -397,6 +406,9 @@ int sha256_vector(size_t num_elem, const
+- #include <mbedtls/sha1.h>
+- int sha1_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	struct mbedtls_sha1_context ctx;
+- 	mbedtls_sha1_init(&ctx);
+-   #if MBEDTLS_VERSION_MAJOR >= 3
+-@@ -419,6 +431,9 @@ int sha1_vector(size_t num_elem, const u
+- #include <mbedtls/md5.h>
+- int md5_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	struct mbedtls_md5_context ctx;
+- 	mbedtls_md5_init(&ctx);
+-   #if MBEDTLS_VERSION_MAJOR >= 3
+-@@ -441,6 +456,9 @@ int md5_vector(size_t num_elem, const u8
+- #include <mbedtls/md4.h>
+- int md4_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	struct mbedtls_md4_context ctx;
+- 	mbedtls_md4_init(&ctx);
+- 	mbedtls_md4_starts_ret(&ctx);
+-@@ -460,6 +478,9 @@ static int hmac_vector(const u8 *key, si
+-                        const u8 *addr[], const size_t *len, u8 *mac,
+-                        mbedtls_md_type_t md_type)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	mbedtls_md_context_t ctx;
+- 	mbedtls_md_init(&ctx);
+- 	if (mbedtls_md_setup(&ctx, mbedtls_md_info_from_type(md_type), 1) != 0){
+-@@ -571,6 +592,9 @@ static int hmac_kdf_expand(const u8 *prk
+-                            const char *label, const u8 *info, size_t info_len,
+-                            u8 *okm, size_t okm_len, mbedtls_md_type_t md_type)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	const mbedtls_md_info_t *md_info = mbedtls_md_info_from_type(md_type);
+-   #ifdef MBEDTLS_HKDF_C
+- 	if (label == NULL)  /* RFC 5869 HKDF-Expand when (label == NULL) */
+-@@ -663,6 +687,9 @@ static int hmac_prf_bits(const u8 *key,
+-                          const u8 *data, size_t data_len, u8 *buf,
+-                          size_t buf_len_bits, mbedtls_md_type_t md_type)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	mbedtls_md_context_t ctx;
+- 	mbedtls_md_init(&ctx);
+- 	const mbedtls_md_info_t *md_info = mbedtls_md_info_from_type(md_type);
+-@@ -938,6 +965,9 @@ int pbkdf2_sha1(const char *passphrase,
+- 
+- static void *aes_crypt_init_mode(const u8 *key, size_t len, int mode)
+- {
+-+	if (TEST_FAIL())
+-+		return NULL;
+-+
+- 	mbedtls_aes_context *aes = os_malloc(sizeof(*aes));
+- 	if (!aes)
+- 		return NULL;
+-@@ -996,6 +1026,9 @@ void aes_decrypt_deinit(void *ctx)
+- /* aes-wrap.c */
+- int aes_wrap(const u8 *kek, size_t kek_len, int n, const u8 *plain, u8 *cipher)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	mbedtls_nist_kw_context ctx;
+- 	mbedtls_nist_kw_init(&ctx);
+- 	size_t olen;
+-@@ -1010,6 +1043,9 @@ int aes_wrap(const u8 *kek, size_t kek_l
+- /* aes-unwrap.c */
+- int aes_unwrap(const u8 *kek, size_t kek_len, int n, const u8 *cipher, u8 *plain)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	mbedtls_nist_kw_context ctx;
+- 	mbedtls_nist_kw_init(&ctx);
+- 	size_t olen;
+-@@ -1041,6 +1077,9 @@ int omac1_aes_vector(
+-     const u8 *key, size_t key_len, size_t num_elem, const u8 *addr[],
+-     const size_t *len, u8 *mac)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	mbedtls_cipher_type_t cipher_type;
+- 	switch (key_len) {
+- 	case 16: cipher_type = MBEDTLS_CIPHER_AES_128_ECB; break;
+-@@ -1103,6 +1142,9 @@ int omac1_aes_256(const u8 *key, const u
+- /* aes-encblock.c */
+- int aes_128_encrypt_block(const u8 *key, const u8 *in, u8 *out)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	mbedtls_aes_context aes;
+- 	mbedtls_aes_init(&aes);
+- 	int ret = mbedtls_aes_setkey_enc(&aes, key, 128)
+-@@ -1118,6 +1160,9 @@ int aes_128_encrypt_block(const u8 *key,
+- int aes_ctr_encrypt(const u8 *key, size_t key_len, const u8 *nonce,
+- 		    u8 *data, size_t data_len)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	unsigned char counter[MBEDTLS_AES_BLOCK_SIZE];
+- 	unsigned char stream_block[MBEDTLS_AES_BLOCK_SIZE];
+- 	os_memcpy(counter, nonce, MBEDTLS_AES_BLOCK_SIZE);/*(must be writable)*/
+-@@ -1160,11 +1205,17 @@ static int aes_128_cbc_oper(const u8 *ke
+- 
+- int aes_128_cbc_encrypt(const u8 *key, const u8 *iv, u8 *data, size_t data_len)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	return aes_128_cbc_oper(key, iv, data, data_len, MBEDTLS_AES_ENCRYPT);
+- }
+- 
+- int aes_128_cbc_decrypt(const u8 *key, const u8 *iv, u8 *data, size_t data_len)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	return aes_128_cbc_oper(key, iv, data, data_len, MBEDTLS_AES_DECRYPT);
+- }
+- 
+-@@ -1407,6 +1458,10 @@ int crypto_hash_finish(struct crypto_has
+- 	}
+- 	mbedtls_md_free(mctx);
+- 	os_free(mctx);
+-+
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	return 0;
+- }
+- 
+-@@ -1421,6 +1476,9 @@ int crypto_hash_finish(struct crypto_has
+- 
+- struct crypto_bignum *crypto_bignum_init(void)
+- {
+-+	if (TEST_FAIL())
+-+		return NULL;
+-+
+- 	mbedtls_mpi *bn = os_malloc(sizeof(*bn));
+- 	if (bn)
+- 		mbedtls_mpi_init(bn);
+-@@ -1429,6 +1487,9 @@ struct crypto_bignum *crypto_bignum_init
+- 
+- struct crypto_bignum *crypto_bignum_init_set(const u8 *buf, size_t len)
+- {
+-+	if (TEST_FAIL())
+-+		return NULL;
+-+
+- 	mbedtls_mpi *bn = os_malloc(sizeof(*bn));
+- 	if (bn) {
+- 		mbedtls_mpi_init(bn);
+-@@ -1442,6 +1503,9 @@ struct crypto_bignum *crypto_bignum_init
+- 
+- struct crypto_bignum *crypto_bignum_init_uint(unsigned int val)
+- {
+-+	if (TEST_FAIL())
+-+		return NULL;
+-+
+-   #if 0 /*(hostap use of this interface passes int, not uint)*/
+- 	val = host_to_be32(val);
+- 	return crypto_bignum_init_set((const u8 *)&val, sizeof(val));
+-@@ -1467,6 +1531,9 @@ void crypto_bignum_deinit(struct crypto_
+- int crypto_bignum_to_bin(const struct crypto_bignum *a,
+- 			 u8 *buf, size_t buflen, size_t padlen)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	size_t n = mbedtls_mpi_size((mbedtls_mpi *)a);
+- 	if (n < padlen)
+- 		n = padlen;
+-@@ -1477,6 +1544,9 @@ int crypto_bignum_to_bin(const struct cr
+- 
+- int crypto_bignum_rand(struct crypto_bignum *r, const struct crypto_bignum *m)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	/*assert(r != m);*//* r must not be same as m for mbedtls_mpi_random()*/
+-   #if MBEDTLS_VERSION_NUMBER >= 0x021B0000 /* mbedtls 2.27.0 */
+- 	return mbedtls_mpi_random((mbedtls_mpi *)r, 0, (mbedtls_mpi *)m,
+-@@ -1513,6 +1583,9 @@ int crypto_bignum_exptmod(const struct c
+- 			  const struct crypto_bignum *c,
+- 			  struct crypto_bignum *d)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	/* (check if input params match d; d is the result) */
+- 	/* (a == d) is ok in current mbedtls implementation */
+- 	if (b == d || c == d) { /*(not ok; store result in intermediate)*/
+-@@ -1540,6 +1613,9 @@ int crypto_bignum_inverse(const struct c
+- 			  const struct crypto_bignum *b,
+- 			  struct crypto_bignum *c)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	return mbedtls_mpi_inv_mod((mbedtls_mpi *)c,
+- 				   (const mbedtls_mpi *)a,
+- 				   (const mbedtls_mpi *)b) ? -1 : 0;
+-@@ -1549,6 +1625,9 @@ int crypto_bignum_sub(const struct crypt
+- 		      const struct crypto_bignum *b,
+- 		      struct crypto_bignum *c)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	return mbedtls_mpi_sub_mpi((mbedtls_mpi *)c,
+- 				   (const mbedtls_mpi *)a,
+- 				   (const mbedtls_mpi *)b) ? -1 : 0;
+-@@ -1558,6 +1637,9 @@ int crypto_bignum_div(const struct crypt
+- 		      const struct crypto_bignum *b,
+- 		      struct crypto_bignum *c)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	/*(most current use of this crypto.h interface has a == c (result),
+- 	 * so store result in an intermediate to avoid overwritten input)*/
+- 	mbedtls_mpi R;
+-@@ -1575,6 +1657,9 @@ int crypto_bignum_addmod(const struct cr
+- 			 const struct crypto_bignum *c,
+- 			 struct crypto_bignum *d)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	return mbedtls_mpi_add_mpi((mbedtls_mpi *)d,
+- 				   (const mbedtls_mpi *)a,
+- 				   (const mbedtls_mpi *)b)
+-@@ -1588,6 +1673,9 @@ int crypto_bignum_mulmod(const struct cr
+- 			 const struct crypto_bignum *c,
+- 			 struct crypto_bignum *d)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	return mbedtls_mpi_mul_mpi((mbedtls_mpi *)d,
+- 				   (const mbedtls_mpi *)a,
+- 				   (const mbedtls_mpi *)b)
+-@@ -1600,6 +1688,9 @@ int crypto_bignum_sqrmod(const struct cr
+- 			 const struct crypto_bignum *b,
+- 			 struct crypto_bignum *c)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+-   #if 1
+- 	return crypto_bignum_mulmod(a, a, b, c);
+-   #else
+-@@ -1650,6 +1741,9 @@ int crypto_bignum_is_odd(const struct cr
+- int crypto_bignum_legendre(const struct crypto_bignum *a,
+- 			   const struct crypto_bignum *p)
+- {
+-+	if (TEST_FAIL())
+-+		return -2;
+-+
+- 	/* Security Note:
+- 	 * mbedtls_mpi_exp_mod() is not documented to run in constant time,
+- 	 * though mbedtls/library/bignum.c uses constant_time_internal.h funcs.
+-@@ -1702,6 +1796,9 @@ int crypto_mod_exp(const u8 *base, size_
+- 		   const u8 *modulus, size_t modulus_len,
+- 		   u8 *result, size_t *result_len)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	mbedtls_mpi bn_base, bn_exp, bn_modulus, bn_result;
+- 	mbedtls_mpi_init(&bn_base);
+- 	mbedtls_mpi_init(&bn_exp);
+-@@ -1769,6 +1866,9 @@ static int crypto_mbedtls_dh_init_public
+- int crypto_dh_init(u8 generator, const u8 *prime, size_t prime_len, u8 *privkey,
+- 		   u8 *pubkey)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+-   #if 0 /*(crypto_dh_init() duplicated (and identical) in crypto_*.c modules)*/
+- 	size_t pubkey_len, pad;
+- 
+-@@ -1810,6 +1910,9 @@ int crypto_dh_derive_secret(u8 generator
+- 			    const u8 *pubkey, size_t pubkey_len,
+- 			    u8 *secret, size_t *len)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+-   #if 0
+- 	if (pubkey_len > prime_len ||
+- 	    (pubkey_len == prime_len &&
+-@@ -2512,6 +2615,9 @@ const struct crypto_ec_point * crypto_ec
+- 
+- struct crypto_ec_point *crypto_ec_point_init(struct crypto_ec *e)
+- {
+-+	if (TEST_FAIL())
+-+		return NULL;
+-+
+- 	mbedtls_ecp_point *p = os_malloc(sizeof(*p));
+- 	if (p != NULL)
+- 		mbedtls_ecp_point_init(p);
+-@@ -2536,6 +2642,9 @@ int crypto_ec_point_x(struct crypto_ec *
+- int crypto_ec_point_to_bin(struct crypto_ec *e,
+- 			   const struct crypto_ec_point *point, u8 *x, u8 *y)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	/* crypto.h documents crypto_ec_point_to_bin() output is big-endian */
+- 	size_t len = CRYPTO_EC_plen(e);
+- 	if (x) {
+-@@ -2563,6 +2672,9 @@ int crypto_ec_point_to_bin(struct crypto
+- struct crypto_ec_point * crypto_ec_point_from_bin(struct crypto_ec *e,
+- 						  const u8 *val)
+- {
+-+	if (TEST_FAIL())
+-+		return NULL;
+-+
+- 	size_t len = CRYPTO_EC_plen(e);
+- 	mbedtls_ecp_point *p = os_malloc(sizeof(*p));
+- 	u8 buf[1+MBEDTLS_MPI_MAX_SIZE*2];
+-@@ -2615,6 +2727,9 @@ int crypto_ec_point_add(struct crypto_ec
+- 			const struct crypto_ec_point *b,
+- 			struct crypto_ec_point *c)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	/* mbedtls does not provide an mbedtls_ecp_point add function */
+- 	mbedtls_mpi one;
+- 	mbedtls_mpi_init(&one);
+-@@ -2631,6 +2746,9 @@ int crypto_ec_point_mul(struct crypto_ec
+- 			const struct crypto_bignum *b,
+- 			struct crypto_ec_point *res)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	return mbedtls_ecp_mul(
+- 		(mbedtls_ecp_group *)e, (mbedtls_ecp_point *)res,
+- 		(const mbedtls_mpi *)b, (const mbedtls_ecp_point *)p,
+-@@ -2639,6 +2757,9 @@ int crypto_ec_point_mul(struct crypto_ec
+- 
+- int crypto_ec_point_invert(struct crypto_ec *e, struct crypto_ec_point *p)
+- {
+-+	if (TEST_FAIL())
+-+		return -1;
+-+
+- 	if (mbedtls_ecp_get_type((mbedtls_ecp_group *)e)
+- 	    == MBEDTLS_ECP_TYPE_MONTGOMERY) {
+- 		/* e.g. MBEDTLS_ECP_DP_CURVE25519 and MBEDTLS_ECP_DP_CURVE448 */
+-@@ -2751,6 +2872,9 @@ struct crypto_bignum *
+- crypto_ec_point_compute_y_sqr(struct crypto_ec *e,
+- 			      const struct crypto_bignum *x)
+- {
+-+	if (TEST_FAIL())
+-+		return NULL;
+-+
+- 	mbedtls_mpi *y2 = os_malloc(sizeof(*y2));
+- 	if (y2 == NULL)
+- 		return NULL;
+diff --git a/package/network/services/hostapd/patches/140-tests-Makefile-make-run-tests-with-CONFIG_TLS.patch b/package/network/services/hostapd/patches/140-tests-Makefile-make-run-tests-with-CONFIG_TLS.patch
+deleted file mode 100644
+index 148c268f9c..0000000000
+--- a/package/network/services/hostapd/patches/140-tests-Makefile-make-run-tests-with-CONFIG_TLS.patch
++++ /dev/null
+@@ -1,1358 +0,0 @@
+-From f24933dc175e0faf44a3cce3330c256a59649ca6 Mon Sep 17 00:00:00 2001
+-From: Glenn Strauss <gstrauss@gluelogic.com>
+-Date: Tue, 19 Jul 2022 23:01:17 -0400
+-Subject: [PATCH 4/7] tests/Makefile make run-tests with CONFIG_TLS=...
+-
+-add test-crypto_module.c to run crypto_module_tests()
+-
+-adjust some tests/hwsim/*.py for mbed TLS (work in progress)
+-
+-option to build and run-tests with CONFIG_TLS=internal # (default)
+-$ cd tests; make clean
+-$ make run-tests
+-
+-option to build and run-tests with CONFIG_TLS=gnutls
+-$ cd tests; make clean CONFIG_TLS=gnutls
+-$ make run-tests CONFIG_TLS=gnutls
+-
+-option to build and run-tests with CONFIG_TLS=mbedtls
+-$ cd tests; make clean CONFIG_TLS=mbedtls
+-$ make run-tests CONFIG_TLS=mbedtls
+-
+-option to build and run-tests with CONFIG_TLS=openssl
+-$ cd tests; make clean CONFIG_TLS=openssl
+-$ make run-tests CONFIG_TLS=openssl
+-
+-option to build and run-tests with CONFIG_TLS=wolfssl
+-$ cd tests; make clean CONFIG_TLS=wolfssl
+-$ make run-tests CONFIG_TLS=wolfssl
+-
+-RFE: Makefile logic for crypto objects should be centralized
+-     instead of being duplicated in hostapd/Makefile,
+-     wpa_supplicant/Makefile, src/crypto/Makefile,
+-     tests/Makefile, ...
+-
+-Signed-off-by: Glenn Strauss <gstrauss@gluelogic.com>
+----
+- hostapd/Makefile                          |   6 +
+- src/crypto/Makefile                       | 129 ++++++++++++++++++++-
+- src/crypto/crypto_module_tests.c          | 134 ++++++++++++++++++++++
+- src/tls/Makefile                          |  11 ++
+- tests/Makefile                            |  75 +++++++++---
+- tests/hwsim/example-hostapd.config        |  11 +-
+- tests/hwsim/example-wpa_supplicant.config |  12 +-
+- tests/hwsim/test_ap_eap.py                | 114 +++++++++++++-----
+- tests/hwsim/test_ap_ft.py                 |   4 +-
+- tests/hwsim/test_authsrv.py               |   9 +-
+- tests/hwsim/test_dpp.py                   |  19 ++-
+- tests/hwsim/test_erp.py                   |  16 +--
+- tests/hwsim/test_fils.py                  |   5 +-
+- tests/hwsim/test_pmksa_cache.py           |   4 +-
+- tests/hwsim/test_sae.py                   |   7 ++
+- tests/hwsim/test_suite_b.py               |   3 +
+- tests/hwsim/test_wpas_ctrl.py             |   2 +-
+- tests/hwsim/utils.py                      |   8 +-
+- tests/test-crypto_module.c                |  16 +++
+- tests/test-https.c                        |  12 +-
+- tests/test-https_server.c                 |  12 +-
+- wpa_supplicant/Makefile                   |   6 +
+- 22 files changed, 524 insertions(+), 91 deletions(-)
+- create mode 100644 tests/test-crypto_module.c
+-
+---- a/hostapd/Makefile
+-+++ b/hostapd/Makefile
+-@@ -696,6 +696,7 @@ CFLAGS += -DCONFIG_TLSV12
+- endif
+- 
+- ifeq ($(CONFIG_TLS), wolfssl)
+-+CFLAGS += -DCONFIG_TLS_WOLFSSL
+- CONFIG_CRYPTO=wolfssl
+- ifdef TLS_FUNCS
+- OBJS += ../src/crypto/tls_wolfssl.o
+-@@ -716,6 +717,7 @@ endif
+- endif
+- 
+- ifeq ($(CONFIG_TLS), openssl)
+-+CFLAGS += -DCONFIG_TLS_OPENSSL
+- CFLAGS += -DCRYPTO_RSA_OAEP_SHA256
+- CONFIG_CRYPTO=openssl
+- ifdef TLS_FUNCS
+-@@ -746,6 +748,7 @@ CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONF
+- endif
+- 
+- ifeq ($(CONFIG_TLS), mbedtls)
+-+CFLAGS += -DCONFIG_TLS_MBEDTLS
+- ifndef CONFIG_CRYPTO
+- CONFIG_CRYPTO=mbedtls
+- endif
+-@@ -776,6 +779,7 @@ endif
+- endif
+- 
+- ifeq ($(CONFIG_TLS), gnutls)
+-+CFLAGS += -DCONFIG_TLS_GNUTLS
+- ifndef CONFIG_CRYPTO
+- # default to libgcrypt
+- CONFIG_CRYPTO=gnutls
+-@@ -806,6 +810,7 @@ endif
+- endif
+- 
+- ifeq ($(CONFIG_TLS), internal)
+-+CFLAGS += -DCONFIG_TLS_INTERNAL
+- ifndef CONFIG_CRYPTO
+- CONFIG_CRYPTO=internal
+- endif
+-@@ -884,6 +889,7 @@ endif
+- endif
+- 
+- ifeq ($(CONFIG_TLS), linux)
+-+CFLAGS += -DCONFIG_TLS_INTERNAL
+- OBJS += ../src/crypto/crypto_linux.o
+- ifdef TLS_FUNCS
+- OBJS += ../src/crypto/crypto_internal-rsa.o
+---- a/src/crypto/Makefile
+-+++ b/src/crypto/Makefile
+-@@ -1,10 +1,121 @@
+--CFLAGS += -DCONFIG_CRYPTO_INTERNAL
+--CFLAGS += -DCONFIG_TLS_INTERNAL_CLIENT
+--CFLAGS += -DCONFIG_TLS_INTERNAL_SERVER
+- #CFLAGS += -DALL_DH_GROUPS
+- CFLAGS += -DCONFIG_SHA256
+- CFLAGS += -DCONFIG_SHA384
+-+CFLAGS += -DCONFIG_HMAC_SHA256_KDF
+- CFLAGS += -DCONFIG_HMAC_SHA384_KDF
+-+
+-+# crypto_module_tests.c
+-+CFLAGS += -DCONFIG_MODULE_TESTS
+-+CFLAGS += -DCONFIG_DPP
+-+#CFLAGS += -DCONFIG_DPP2
+-+#CFLAGS += -DCONFIG_DPP3
+-+CFLAGS += -DCONFIG_ECC
+-+CFLAGS += -DCONFIG_MESH
+-+CFLAGS += -DEAP_PSK
+-+CFLAGS += -DEAP_FAST
+-+
+-+ifeq ($(CONFIG_TLS),mbedtls)
+-+
+-+# (enable features for 'cd tests; make run-tests CONFIG_TLS=mbedtls')
+-+CFLAGS += -DCRYPTO_RSA_OAEP_SHA256
+-+CFLAGS += -DCONFIG_DES
+-+CFLAGS += -DEAP_IKEV2
+-+CFLAGS += -DEAP_MSCHAPv2
+-+CFLAGS += -DEAP_SIM
+-+
+-+LIB_OBJS = tls_mbedtls.o crypto_mbedtls.o
+-+LIB_OBJS+= \
+-+	aes-eax.o \
+-+	aes-siv.o \
+-+	dh_groups.o \
+-+	milenage.o \
+-+	ms_funcs.o
+-+
+-+else
+-+ifeq ($(CONFIG_TLS),openssl)
+-+
+-+# (enable features for 'cd tests; make run-tests CONFIG_TLS=openssl')
+-+ifndef CONFIG_TLS_DEFAULT_CIPHERS
+-+CONFIG_TLS_DEFAULT_CIPHERS = "DEFAULT:!EXP:!LOW"
+-+endif
+-+CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONFIG_TLS_DEFAULT_CIPHERS)\"
+-+CFLAGS += -DCRYPTO_RSA_OAEP_SHA256
+-+CFLAGS += -DEAP_TLS_OPENSSL
+-+
+-+LIB_OBJS = tls_openssl.o fips_prf_openssl.o crypto_openssl.o
+-+LIB_OBJS+= \
+-+	aes-ctr.o \
+-+	aes-eax.o \
+-+	aes-encblock.o \
+-+	aes-siv.o \
+-+	dh_groups.o \
+-+	milenage.o \
+-+	ms_funcs.o \
+-+	sha1-prf.o \
+-+	sha1-tlsprf.o \
+-+	sha1-tprf.o \
+-+	sha256-kdf.o \
+-+	sha256-prf.o \
+-+	sha256-tlsprf.o
+-+
+-+else
+-+ifeq ($(CONFIG_TLS),wolfssl)
+-+
+-+# (wolfssl libraries must be built with ./configure --enable-wpas)
+-+# (enable features for 'cd tests; make run-tests CONFIG_TLS=wolfssl')
+-+CFLAGS += -DWOLFSSL_DER_LOAD
+-+CFLAGS += -DCONFIG_DES
+-+
+-+LIB_OBJS = tls_wolfssl.o fips_prf_wolfssl.o crypto_wolfssl.o
+-+LIB_OBJS+= \
+-+	aes-ctr.o \
+-+	aes-eax.o \
+-+	aes-encblock.o \
+-+	aes-siv.o \
+-+	dh_groups.o \
+-+	milenage.o \
+-+	ms_funcs.o \
+-+	sha1-prf.o \
+-+	sha1-tlsprf.o \
+-+	sha1-tprf.o \
+-+	sha256-kdf.o \
+-+	sha256-prf.o \
+-+	sha256-tlsprf.o
+-+
+-+else
+-+ifeq ($(CONFIG_TLS),gnutls)
+-+
+-+# (enable features for 'cd tests; make run-tests CONFIG_TLS=gnutls')
+-+LIB_OBJS = tls_gnutls.o crypto_gnutls.o
+-+LIB_OBJS+= \
+-+	aes-cbc.o \
+-+	aes-ctr.o \
+-+	aes-eax.o \
+-+	aes-encblock.o \
+-+	aes-omac1.o \
+-+	aes-siv.o \
+-+	aes-unwrap.o \
+-+	aes-wrap.o \
+-+	dh_group5.o \
+-+	dh_groups.o \
+-+	milenage.o \
+-+	ms_funcs.o \
+-+	rc4.o \
+-+	sha1-pbkdf2.o \
+-+	sha1-prf.o \
+-+	fips_prf_internal.o \
+-+	sha1-internal.o \
+-+	sha1-tlsprf.o \
+-+	sha1-tprf.o \
+-+	sha256-kdf.o \
+-+	sha256-prf.o \
+-+	sha256-tlsprf.o
+-+
+-+else
+-+
+-+CFLAGS += -DCONFIG_CRYPTO_INTERNAL
+-+CFLAGS += -DCONFIG_TLS_INTERNAL_CLIENT
+-+CFLAGS += -DCONFIG_TLS_INTERNAL_SERVER
+- CFLAGS += -DCONFIG_INTERNAL_SHA384
+- 
+- LIB_OBJS= \
+-@@ -13,7 +124,6 @@ LIB_OBJS= \
+- 	aes-ctr.o \
+- 	aes-eax.o \
+- 	aes-encblock.o \
+--	aes-gcm.o \
+- 	aes-internal.o \
+- 	aes-internal-dec.o \
+- 	aes-internal-enc.o \
+-@@ -37,6 +147,7 @@ LIB_OBJS= \
+- 	sha1-tlsprf.o \
+- 	sha1-tprf.o \
+- 	sha256.o \
+-+	sha256-kdf.o \
+- 	sha256-prf.o \
+- 	sha256-tlsprf.o \
+- 	sha256-internal.o \
+-@@ -53,6 +164,16 @@ LIB_OBJS += crypto_internal-modexp.o
+- LIB_OBJS += crypto_internal-rsa.o
+- LIB_OBJS += tls_internal.o
+- LIB_OBJS += fips_prf_internal.o
+-+
+-+endif
+-+endif
+-+endif
+-+endif
+-+
+-+
+-+# (used by wlantest/{bip,gcmp,rx_mgmt}.c and tests/test-aes.c)
+-+LIB_OBJS += aes-gcm.o
+-+
+- ifndef TEST_FUZZ
+- LIB_OBJS += random.o
+- endif
+---- a/src/crypto/crypto_module_tests.c
+-+++ b/src/crypto/crypto_module_tests.c
+-@@ -2469,6 +2469,139 @@ static int test_hpke(void)
+- }
+- 
+- 
+-+static int test_ecc(void)
+-+{
+-+#ifdef CONFIG_ECC
+-+#ifndef CONFIG_TLS_INTERNAL
+-+#ifndef CONFIG_TLS_GNUTLS
+-+#if defined(CONFIG_TLS_MBEDTLS) \
+-+ || defined(CONFIG_TLS_OPENSSL) \
+-+ || defined(CONFIG_TLS_WOLFSSL)
+-+	wpa_printf(MSG_INFO, "Testing ECC");
+-+	/* Note: some tests below are valid on supported Short Weierstrass
+-+	 * curves, but not on Montgomery curves (e.g. IKE groups 31 and 32)
+-+	 * (e.g. deriving and comparing y^2 test below not valid on Montgomery)
+-+	 */
+-+#ifdef CONFIG_TLS_MBEDTLS
+-+	const int grps[] = {19, 20, 21, 25, 26, 28};
+-+#endif
+-+#ifdef CONFIG_TLS_OPENSSL
+-+	const int grps[] = {19, 20, 21, 26};
+-+#endif
+-+#ifdef CONFIG_TLS_WOLFSSL
+-+	const int grps[] = {19, 20, 21, 26};
+-+#endif
+-+	uint32_t i;
+-+	struct crypto_ec *e = NULL;
+-+	struct crypto_ec_point *p = NULL, *q = NULL;
+-+	struct crypto_bignum *x = NULL, *y = NULL;
+-+#ifdef CONFIG_DPP
+-+	u8 bin[4096];
+-+#endif
+-+	for (i = 0; i < ARRAY_SIZE(grps); ++i) {
+-+		e = crypto_ec_init(grps[i]);
+-+		if (e == NULL
+-+		    || crypto_ec_prime_len(e) == 0
+-+		    || crypto_ec_prime_len_bits(e) == 0
+-+		    || crypto_ec_order_len(e) == 0
+-+		    || crypto_ec_get_prime(e) == NULL
+-+		    || crypto_ec_get_order(e) == NULL
+-+		    || crypto_ec_get_a(e) == NULL
+-+		    || crypto_ec_get_b(e) == NULL
+-+		    || crypto_ec_get_generator(e) == NULL) {
+-+			break;
+-+		}
+-+#ifdef CONFIG_DPP
+-+		struct crypto_ec_key *key = crypto_ec_key_gen(grps[i]);
+-+		if (key == NULL)
+-+			break;
+-+		p = crypto_ec_key_get_public_key(key);
+-+		q = crypto_ec_key_get_public_key(key);
+-+		crypto_ec_key_deinit(key);
+-+		if (p == NULL || q == NULL)
+-+			break;
+-+		if (!crypto_ec_point_is_on_curve(e, p))
+-+			break;
+-+
+-+		/* inverted point should not match original;
+-+		 * double-invert should match */
+-+		if (crypto_ec_point_invert(e, q) != 0
+-+		    || crypto_ec_point_cmp(e, p, q) == 0
+-+		    || crypto_ec_point_invert(e, q) != 0
+-+		    || crypto_ec_point_cmp(e, p, q) != 0) {
+-+			break;
+-+		}
+-+
+-+		/* crypto_ec_point_to_bin() and crypto_ec_point_from_bin()
+-+		 * imbalanced interfaces? */
+-+		size_t prime_len = crypto_ec_prime_len(e);
+-+		if (prime_len * 2 > sizeof(bin))
+-+			break;
+-+		if (crypto_ec_point_to_bin(e, p, bin, bin+prime_len) != 0)
+-+			break;
+-+		struct crypto_ec_point *tmp = crypto_ec_point_from_bin(e, bin);
+-+		if (tmp == NULL)
+-+			break;
+-+		if (crypto_ec_point_cmp(e, p, tmp) != 0) {
+-+			crypto_ec_point_deinit(tmp, 0);
+-+			break;
+-+		}
+-+		crypto_ec_point_deinit(tmp, 0);
+-+
+-+		x = crypto_bignum_init();
+-+		y = crypto_bignum_init_set(bin+prime_len, prime_len);
+-+		if (x == NULL || y == NULL || crypto_ec_point_x(e, p, x) != 0)
+-+			break;
+-+		struct crypto_bignum *y2 = crypto_ec_point_compute_y_sqr(e, x);
+-+		if (y2 == NULL)
+-+			break;
+-+		if (crypto_bignum_sqrmod(y, crypto_ec_get_prime(e), y) != 0
+-+		    || crypto_bignum_cmp(y, y2) != 0) {
+-+			crypto_bignum_deinit(y2, 0);
+-+			break;
+-+		}
+-+		crypto_bignum_deinit(y2, 0);
+-+		crypto_bignum_deinit(x, 0);
+-+		crypto_bignum_deinit(y, 0);
+-+		x = NULL;
+-+		y = NULL;
+-+
+-+		x = crypto_bignum_init();
+-+		if (x == NULL)
+-+			break;
+-+		if (crypto_bignum_rand(x, crypto_ec_get_prime(e)) != 0)
+-+			break;
+-+		crypto_bignum_deinit(x, 0);
+-+		x = NULL;
+-+
+-+		crypto_ec_point_deinit(p, 0);
+-+		p = NULL;
+-+		crypto_ec_point_deinit(q, 0);
+-+		q = NULL;
+-+#endif /* CONFIG_DPP */
+-+		crypto_ec_deinit(e);
+-+		e = NULL;
+-+	}
+-+	if (i != ARRAY_SIZE(grps)) {
+-+		crypto_bignum_deinit(x, 0);
+-+		crypto_bignum_deinit(y, 0);
+-+		crypto_ec_point_deinit(p, 0);
+-+		crypto_ec_point_deinit(q, 0);
+-+		crypto_ec_deinit(e);
+-+		wpa_printf(MSG_INFO,
+-+		           "ECC test case failed tls_id:%d", grps[i]);
+-+		return -1;
+-+	}
+-+
+-+	wpa_printf(MSG_INFO, "ECC test cases passed");
+-+#endif
+-+#endif /* !CONFIG_TLS_GNUTLS */
+-+#endif /* !CONFIG_TLS_INTERNAL */
+-+#endif /* CONFIG_ECC */
+-+	return 0;
+-+}
+-+
+-+
+- static int test_ms_funcs(void)
+- {
+- #ifndef CONFIG_FIPS
+-@@ -2590,6 +2723,7 @@ int crypto_module_tests(void)
+- 	    test_fips186_2_prf() ||
+- 	    test_extract_expand_hkdf() ||
+- 	    test_hpke() ||
+-+	    test_ecc() ||
+- 	    test_ms_funcs())
+- 		ret = -1;
+- 
+---- a/src/tls/Makefile
+-+++ b/src/tls/Makefile
+-@@ -1,3 +1,10 @@
+-+LIB_OBJS= asn1.o
+-+
+-+ifneq ($(CONFIG_TLS),gnutls)
+-+ifneq ($(CONFIG_TLS),mbedtls)
+-+ifneq ($(CONFIG_TLS),openssl)
+-+ifneq ($(CONFIG_TLS),wolfssl)
+-+
+- CFLAGS += -DCONFIG_INTERNAL_LIBTOMMATH
+- CFLAGS += -DCONFIG_CRYPTO_INTERNAL
+- CFLAGS += -DCONFIG_TLSV11
+-@@ -21,5 +28,9 @@ LIB_OBJS= \
+- 	tlsv1_server_read.o \
+- 	tlsv1_server_write.o \
+- 	x509v3.o
+-+endif
+-+endif
+-+endif
+-+endif
+- 
+- include ../lib.rules
+---- a/tests/Makefile
+-+++ b/tests/Makefile
+-@@ -1,8 +1,10 @@
+--ALL=test-base64 test-md4 test-milenage \
+--	test-rsa-sig-ver \
+--	test-sha1 \
+--	test-https test-https_server \
+--	test-sha256 test-aes test-x509v3 test-list test-rc4
+-+RUN_TESTS= \
+-+	test-list \
+-+	test-md4 test-rc4 test-sha1 test-sha256 \
+-+	test-milenage test-aes \
+-+	test-crypto_module
+-+
+-+ALL=$(RUN_TESTS) test-base64 test-https test-https_server
+- 
+- include ../src/build.rules
+- 
+-@@ -24,13 +26,27 @@ CFLAGS += -DCONFIG_IEEE80211R_AP
+- CFLAGS += -DCONFIG_IEEE80211R
+- CFLAGS += -DCONFIG_TDLS
+- 
+-+# test-crypto_module
+-+CFLAGS += -DCONFIG_MODULE_TESTS
+-+CFLAGS += -DCONFIG_DPP
+-+#CFLAGS += -DCONFIG_DPP2
+-+#CFLAGS += -DCONFIG_DPP3
+-+CFLAGS += -DCONFIG_ECC
+-+CFLAGS += -DCONFIG_HMAC_SHA256_KDF
+-+CFLAGS += -DCONFIG_HMAC_SHA384_KDF
+-+CFLAGS += -DCONFIG_MESH
+-+CFLAGS += -DCONFIG_SHA256
+-+CFLAGS += -DCONFIG_SHA384
+-+CFLAGS += -DEAP_PSK
+-+CFLAGS += -DEAP_FAST
+-+
+- CFLAGS += -I../src
+- CFLAGS += -I../src/utils
+- 
+- SLIBS = ../src/utils/libutils.a
+- 
+--DLIBS = ../src/crypto/libcrypto.a \
+--	../src/tls/libtls.a
+-+DLIBS = ../src/tls/libtls.a \
+-+	../src/crypto/libcrypto.a
+- 
+- _OBJS_VAR := LLIBS
+- include ../src/objs.mk
+-@@ -42,12 +58,43 @@ include ../src/objs.mk
+- LIBS = $(SLIBS) $(DLIBS)
+- LLIBS = -Wl,--start-group $(DLIBS) -Wl,--end-group $(SLIBS)
+- 
+-+ifeq ($(CONFIG_TLS),mbedtls)
+-+CFLAGS += -DCONFIG_TLS_MBEDTLS
+-+LLIBS += -lmbedtls -lmbedx509 -lmbedcrypto
+-+else
+-+ifeq ($(CONFIG_TLS),openssl)
+-+CFLAGS += -DCONFIG_TLS_OPENSSL
+-+LLIBS += -lssl -lcrypto
+-+else
+-+ifeq ($(CONFIG_TLS),gnutls)
+-+CFLAGS += -DCONFIG_TLS_GNUTLS
+-+LLIBS += -lgnutls -lgpg-error -lgcrypt
+-+else
+-+ifeq ($(CONFIG_TLS),wolfssl)
+-+CFLAGS += -DCONFIG_TLS_WOLFSSL
+-+LLIBS += -lwolfssl -lm
+-+else
+-+CFLAGS += -DCONFIG_TLS_INTERNAL
+-+CFLAGS += -DCONFIG_TLS_INTERNAL_SERVER
+-+ALL += test-rsa-sig-ver
+-+ALL += test-x509v3
+-+clean-config_tls_internal:
+-+	rm -f test_x509v3_nist.out.*
+-+	rm -f test_x509v3_nist2.out.*
+-+endif
+-+endif
+-+endif
+-+endif
+-+
+- # glibc < 2.17 needs -lrt for clock_gettime()
+- LLIBS += -lrt
+- 
+- test-aes: $(call BUILDOBJ,test-aes.o) $(LIBS)
+- 	$(LDO) $(LDFLAGS) -o $@ $^ $(LLIBS)
+- 
+-+test-crypto_module: $(call BUILDOBJ,test-crypto_module.o) $(LIBS)
+-+	$(LDO) $(LDFLAGS) -o $@ $< $(LLIBS)
+-+
+- test-base64: $(call BUILDOBJ,test-base64.o) $(LIBS)
+- 	$(LDO) $(LDFLAGS) -o $@ $^ $(LLIBS)
+- 
+-@@ -83,17 +130,11 @@ test-x509v3: $(call BUILDOBJ,test-x509v3
+- 
+- 
+- run-tests: $(ALL)
+--	./test-aes
+--	./test-list
+--	./test-md4
+--	./test-milenage
+--	./test-rsa-sig-ver
+--	./test-sha1
+--	./test-sha256
+-+	@set -ex; for i in $(RUN_TESTS); do ./$$i; done
+- 	@echo
+- 	@echo All tests completed successfully.
+- 
+--clean: common-clean
+-+clean: common-clean clean-config_tls_internal
+- 	rm -f *~
+--	rm -f test_x509v3_nist.out.*
+--	rm -f test_x509v3_nist2.out.*
+-+
+-+.PHONY: run-tests clean-config_tls_internal
+---- a/tests/hwsim/example-hostapd.config
+-+++ b/tests/hwsim/example-hostapd.config
+-@@ -34,15 +34,7 @@ CONFIG_EAP_TNC=y
+- CFLAGS += -DTNC_CONFIG_FILE=\"tnc/tnc_config\"
+- LIBS += -rdynamic
+- CONFIG_EAP_UNAUTH_TLS=y
+--ifeq ($(CONFIG_TLS), openssl)
+--CONFIG_EAP_PWD=y
+--endif
+--ifeq ($(CONFIG_TLS), wolfssl)
+--CONFIG_EAP_PWD=y
+--endif
+--ifeq ($(CONFIG_TLS), mbedtls)
+--CONFIG_EAP_PWD=y
+--endif
+-+CONFIG_EAP_PWD=$(if $(filter openssl wolfssl mbedtls,$(CONFIG_TLS)),y,)
+- CONFIG_EAP_EKE=y
+- CONFIG_PKCS12=y
+- CONFIG_RADIUS_SERVER=y
+-@@ -89,6 +81,7 @@ CFLAGS += -DCONFIG_RADIUS_TEST
+- CONFIG_MODULE_TESTS=y
+- 
+- CONFIG_SUITEB=y
+-+CONFIG_SUITEB192=$(if $(filter openssl mbedtls,$(CONFIG_TLS)),y,)
+- 
+- # AddressSanitizer (ASan) can be enabled by uncommenting the following lines.
+- # This can be used as a more efficient memory error detector than valgrind
+---- a/tests/hwsim/example-wpa_supplicant.config
+-+++ b/tests/hwsim/example-wpa_supplicant.config
+-@@ -35,16 +35,7 @@ LIBS += -rdynamic
+- CONFIG_EAP_FAST=y
+- CONFIG_EAP_TEAP=y
+- CONFIG_EAP_IKEV2=y
+--
+--ifeq ($(CONFIG_TLS), openssl)
+--CONFIG_EAP_PWD=y
+--endif
+--ifeq ($(CONFIG_TLS), wolfssl)
+--CONFIG_EAP_PWD=y
+--endif
+--ifeq ($(CONFIG_TLS), mbedtls)
+--CONFIG_EAP_PWD=y
+--endif
+-+CONFIG_EAP_PWD=$(if $(filter openssl wolfssl mbedtls,$(CONFIG_TLS)),y,)
+- 
+- CONFIG_USIM_SIMULATOR=y
+- CONFIG_SIM_SIMULATOR=y
+-@@ -137,6 +128,7 @@ CONFIG_TESTING_OPTIONS=y
+- CONFIG_MODULE_TESTS=y
+- 
+- CONFIG_SUITEB=y
+-+CONFIG_SUITEB192=$(if $(filter openssl mbedtls,$(CONFIG_TLS)),y,)
+- 
+- # AddressSanitizer (ASan) can be enabled by uncommenting the following lines.
+- # This can be used as a more efficient memory error detector than valgrind
+---- a/tests/hwsim/test_ap_eap.py
+-+++ b/tests/hwsim/test_ap_eap.py
+-@@ -42,20 +42,42 @@ def check_eap_capa(dev, method):
+-     res = dev.get_capability("eap")
+-     if method not in res:
+-         raise HwsimSkip("EAP method %s not supported in the build" % method)
+-+    if method == "FAST" or method == "TEAP":
+-+        tls = dev.request("GET tls_library")
+-+        if tls.startswith("mbed TLS"):
+-+            raise HwsimSkip("EAP-%s not supported with this TLS library: " % method + tls)
+- 
+- def check_subject_match_support(dev):
+-     tls = dev.request("GET tls_library")
+--    if not tls.startswith("OpenSSL") and not tls.startswith("wolfSSL"):
+-+    if tls.startswith("OpenSSL"):
+-+        return
+-+    elif tls.startswith("wolfSSL"):
+-+        return
+-+    elif tls.startswith("mbed TLS"):
+-+        return
+-+    else:
+-         raise HwsimSkip("subject_match not supported with this TLS library: " + tls)
+- 
+- def check_check_cert_subject_support(dev):
+-     tls = dev.request("GET tls_library")
+--    if not tls.startswith("OpenSSL") and not tls.startswith("wolfSSL"):
+-+    if tls.startswith("OpenSSL"):
+-+        return
+-+    elif tls.startswith("wolfSSL"):
+-+        return
+-+    elif tls.startswith("mbed TLS"):
+-+        return
+-+    else:
+-         raise HwsimSkip("check_cert_subject not supported with this TLS library: " + tls)
+- 
+- def check_altsubject_match_support(dev):
+-     tls = dev.request("GET tls_library")
+--    if not tls.startswith("OpenSSL") and not tls.startswith("wolfSSL"):
+-+    if tls.startswith("OpenSSL"):
+-+        return
+-+    elif tls.startswith("wolfSSL"):
+-+        return
+-+    elif tls.startswith("mbed TLS"):
+-+        return
+-+    else:
+-         raise HwsimSkip("altsubject_match not supported with this TLS library: " + tls)
+- 
+- def check_domain_match(dev):
+-@@ -70,7 +92,13 @@ def check_domain_suffix_match(dev):
+- 
+- def check_domain_match_full(dev):
+-     tls = dev.request("GET tls_library")
+--    if not tls.startswith("OpenSSL") and not tls.startswith("wolfSSL"):
+-+    if tls.startswith("OpenSSL"):
+-+        return
+-+    elif tls.startswith("wolfSSL"):
+-+        return
+-+    elif tls.startswith("mbed TLS"):
+-+        return
+-+    else:
+-         raise HwsimSkip("domain_suffix_match requires full match with this TLS library: " + tls)
+- 
+- def check_cert_probe_support(dev):
+-@@ -79,8 +107,15 @@ def check_cert_probe_support(dev):
+-         raise HwsimSkip("Certificate probing not supported with this TLS library: " + tls)
+- 
+- def check_ext_cert_check_support(dev):
+-+    if not openssl_imported:
+-+        raise HwsimSkip("OpenSSL python method not available")
+-+
+-     tls = dev.request("GET tls_library")
+--    if not tls.startswith("OpenSSL"):
+-+    if tls.startswith("OpenSSL"):
+-+        return
+-+    elif tls.startswith("mbed TLS"):
+-+        return
+-+    else:
+-         raise HwsimSkip("ext_cert_check not supported with this TLS library: " + tls)
+- 
+- def check_ocsp_support(dev):
+-@@ -91,14 +126,18 @@ def check_ocsp_support(dev):
+-     #    raise HwsimSkip("OCSP not supported with this TLS library: " + tls)
+-     #if tls.startswith("wolfSSL"):
+-     #    raise HwsimSkip("OCSP not supported with this TLS library: " + tls)
+-+    if tls.startswith("mbed TLS"):
+-+        raise HwsimSkip("OCSP not supported with this TLS library: " + tls)
+- 
+- def check_pkcs5_v15_support(dev):
+-     tls = dev.request("GET tls_library")
+--    if "BoringSSL" in tls or "GnuTLS" in tls:
+-+    if "BoringSSL" in tls or "GnuTLS" in tls or "mbed TLS" in tls:
+-         raise HwsimSkip("PKCS#5 v1.5 not supported with this TLS library: " + tls)
+- 
+- def check_tls13_support(dev):
+-     tls = dev.request("GET tls_library")
+-+    if tls.startswith("mbed TLS"):
+-+        raise HwsimSkip("TLS v1.3 not supported")
+-     if "run=OpenSSL 1.1.1" not in tls and "run=OpenSSL 3.0" not in tls and "wolfSSL" not in tls:
+-         raise HwsimSkip("TLS v1.3 not supported")
+- 
+-@@ -118,11 +157,15 @@ def check_pkcs12_support(dev):
+-     #    raise HwsimSkip("PKCS#12 not supported with this TLS library: " + tls)
+-     if tls.startswith("wolfSSL"):
+-         raise HwsimSkip("PKCS#12 not supported with this TLS library: " + tls)
+-+    if tls.startswith("mbed TLS"):
+-+        raise HwsimSkip("PKCS#12 not supported with this TLS library: " + tls)
+- 
+- def check_dh_dsa_support(dev):
+-     tls = dev.request("GET tls_library")
+-     if tls.startswith("internal"):
+-         raise HwsimSkip("DH DSA not supported with this TLS library: " + tls)
+-+    if tls.startswith("mbed TLS"):
+-+        raise HwsimSkip("DH DSA not supported with this TLS library: " + tls)
+- 
+- def check_ec_support(dev):
+-     tls = dev.request("GET tls_library")
+-@@ -1595,7 +1638,7 @@ def test_ap_wpa2_eap_ttls_pap_subject_ma
+-     eap_connect(dev[0], hapd, "TTLS", "pap user",
+-                 anonymous_identity="ttls", password="password",
+-                 ca_cert="auth_serv/ca.pem", phase2="auth=PAP",
+--                subject_match="/C=FI/O=w1.fi/CN=server.w1.fi",
+-+                check_cert_subject="/C=FI/O=w1.fi/CN=server.w1.fi",
+-                 altsubject_match="EMAIL:noone@example.com;DNS:server.w1.fi;URI:http://example.com/")
+-     eap_reauth(dev[0], "TTLS")
+- 
+-@@ -2830,6 +2873,7 @@ def test_ap_wpa2_eap_tls_neg_domain_matc
+- 
+- def test_ap_wpa2_eap_tls_neg_subject_match(dev, apdev):
+-     """WPA2-Enterprise negative test - subject mismatch"""
+-+    check_subject_match_support(dev[0])
+-     params = hostapd.wpa2_eap_params(ssid="test-wpa2-eap")
+-     hostapd.add_ap(apdev[0], params)
+-     dev[0].connect("test-wpa2-eap", key_mgmt="WPA-EAP", eap="TTLS",
+-@@ -2890,6 +2934,7 @@ def test_ap_wpa2_eap_tls_neg_subject_mat
+- 
+- def test_ap_wpa2_eap_tls_neg_altsubject_match(dev, apdev):
+-     """WPA2-Enterprise negative test - altsubject mismatch"""
+-+    check_altsubject_match_support(dev[0])
+-     params = hostapd.wpa2_eap_params(ssid="test-wpa2-eap")
+-     hostapd.add_ap(apdev[0], params)
+- 
+-@@ -3430,7 +3475,7 @@ def test_ap_wpa2_eap_ikev2_oom(dev, apde
+-             dev[0].request("REMOVE_NETWORK all")
+- 
+-     tls = dev[0].request("GET tls_library")
+--    if not tls.startswith("wolfSSL"):
+-+    if not tls.startswith("wolfSSL") and not tls.startswith("mbed TLS"):
+-         tests = [(1, "os_get_random;dh_init")]
+-     else:
+-         tests = [(1, "crypto_dh_init;dh_init")]
+-@@ -4744,7 +4789,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca
+-     params["private_key"] = "auth_serv/iCA-server/server.key"
+-     hostapd.add_ap(apdev[0], params)
+-     tls = dev[0].request("GET tls_library")
+--    if "GnuTLS" in tls or "wolfSSL" in tls:
+-+    if "GnuTLS" in tls or "wolfSSL" in tls or "mbed TLS" in tls:
+-         ca_cert = "auth_serv/iCA-user/ca-and-root.pem"
+-         client_cert = "auth_serv/iCA-user/user_and_ica.pem"
+-     else:
+-@@ -4810,6 +4855,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca
+-     run_ap_wpa2_eap_tls_intermediate_ca_ocsp(dev, apdev, params, "-sha1")
+- 
+- def run_ap_wpa2_eap_tls_intermediate_ca_ocsp(dev, apdev, params, md):
+-+    check_ocsp_support(dev[0])
+-     params = int_eap_server_params()
+-     params["ca_cert"] = "auth_serv/iCA-server/ca-and-root.pem"
+-     params["server_cert"] = "auth_serv/iCA-server/server.pem"
+-@@ -4819,7 +4865,7 @@ def run_ap_wpa2_eap_tls_intermediate_ca_
+-     try:
+-         hostapd.add_ap(apdev[0], params)
+-         tls = dev[0].request("GET tls_library")
+--        if "GnuTLS" in tls or "wolfSSL" in tls:
+-+        if "GnuTLS" in tls or "wolfSSL" in tls or "mbed TLS" in tls:
+-             ca_cert = "auth_serv/iCA-user/ca-and-root.pem"
+-             client_cert = "auth_serv/iCA-user/user_and_ica.pem"
+-         else:
+-@@ -4855,7 +4901,7 @@ def run_ap_wpa2_eap_tls_intermediate_ca_
+-     try:
+-         hostapd.add_ap(apdev[0], params)
+-         tls = dev[0].request("GET tls_library")
+--        if "GnuTLS" in tls or "wolfSSL" in tls:
+-+        if "GnuTLS" in tls or "wolfSSL" in tls or "mbed TLS" in tls:
+-             ca_cert = "auth_serv/iCA-user/ca-and-root.pem"
+-             client_cert = "auth_serv/iCA-user/user_and_ica.pem"
+-         else:
+-@@ -4905,7 +4951,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca
+-     try:
+-         hostapd.add_ap(apdev[0], params)
+-         tls = dev[0].request("GET tls_library")
+--        if "GnuTLS" in tls or "wolfSSL" in tls:
+-+        if "GnuTLS" in tls or "wolfSSL" in tls or "mbed TLS" in tls:
+-             ca_cert = "auth_serv/iCA-user/ca-and-root.pem"
+-             client_cert = "auth_serv/iCA-user/user_and_ica.pem"
+-         else:
+-@@ -4972,7 +5018,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca
+- 
+-         hostapd.add_ap(apdev[0], params)
+-         tls = dev[0].request("GET tls_library")
+--        if "GnuTLS" in tls or "wolfSSL" in tls:
+-+        if "GnuTLS" in tls or "wolfSSL" in tls or "mbed TLS" in tls:
+-             ca_cert = "auth_serv/iCA-user/ca-and-root.pem"
+-             client_cert = "auth_serv/iCA-user/user_and_ica.pem"
+-         else:
+-@@ -5230,6 +5276,7 @@ def test_ap_wpa2_eap_ttls_server_cert_ek
+- 
+- def test_ap_wpa2_eap_ttls_server_pkcs12(dev, apdev):
+-     """WPA2-Enterprise using EAP-TTLS and server PKCS#12 file"""
+-+    check_pkcs12_support(dev[0])
+-     skip_with_fips(dev[0])
+-     params = int_eap_server_params()
+-     del params["server_cert"]
+-@@ -5242,6 +5289,7 @@ def test_ap_wpa2_eap_ttls_server_pkcs12(
+- 
+- def test_ap_wpa2_eap_ttls_server_pkcs12_extra(dev, apdev):
+-     """EAP-TTLS and server PKCS#12 file with extra certs"""
+-+    check_pkcs12_support(dev[0])
+-     skip_with_fips(dev[0])
+-     params = int_eap_server_params()
+-     del params["server_cert"]
+-@@ -5264,6 +5312,7 @@ def test_ap_wpa2_eap_ttls_dh_params_serv
+- 
+- def test_ap_wpa2_eap_ttls_dh_params_dsa_server(dev, apdev):
+-     """WPA2-Enterprise using EAP-TTLS and alternative server dhparams (DSA)"""
+-+    check_dh_dsa_support(dev[0])
+-     params = int_eap_server_params()
+-     params["dh_file"] = "auth_serv/dsaparam.pem"
+-     hapd = hostapd.add_ap(apdev[0], params)
+-@@ -5575,8 +5624,8 @@ def test_ap_wpa2_eap_non_ascii_identity2
+- def test_openssl_cipher_suite_config_wpas(dev, apdev):
+-     """OpenSSL cipher suite configuration on wpa_supplicant"""
+-     tls = dev[0].request("GET tls_library")
+--    if not tls.startswith("OpenSSL"):
+--        raise HwsimSkip("TLS library is not OpenSSL: " + tls)
+-+    if not tls.startswith("OpenSSL") and not tls.startswith("mbed TLS"):
+-+        raise HwsimSkip("TLS library is not OpenSSL or mbed TLS: " + tls)
+-     params = hostapd.wpa2_eap_params(ssid="test-wpa2-eap")
+-     hapd = hostapd.add_ap(apdev[0], params)
+-     eap_connect(dev[0], hapd, "TTLS", "pap user",
+-@@ -5602,14 +5651,14 @@ def test_openssl_cipher_suite_config_wpa
+- def test_openssl_cipher_suite_config_hapd(dev, apdev):
+-     """OpenSSL cipher suite configuration on hostapd"""
+-     tls = dev[0].request("GET tls_library")
+--    if not tls.startswith("OpenSSL"):
+--        raise HwsimSkip("wpa_supplicant TLS library is not OpenSSL: " + tls)
+-+    if not tls.startswith("OpenSSL") and not tls.startswith("mbed TLS"):
+-+        raise HwsimSkip("wpa_supplicant TLS library is not OpenSSL or mbed TLS: " + tls)
+-     params = int_eap_server_params()
+-     params['openssl_ciphers'] = "AES256"
+-     hapd = hostapd.add_ap(apdev[0], params)
+-     tls = hapd.request("GET tls_library")
+--    if not tls.startswith("OpenSSL"):
+--        raise HwsimSkip("hostapd TLS library is not OpenSSL: " + tls)
+-+    if not tls.startswith("OpenSSL") and not tls.startswith("mbed TLS"):
+-+        raise HwsimSkip("hostapd TLS library is not OpenSSL or mbed TLS: " + tls)
+-     eap_connect(dev[0], hapd, "TTLS", "pap user",
+-                 anonymous_identity="ttls", password="password",
+-                 ca_cert="auth_serv/ca.pem", phase2="auth=PAP")
+-@@ -6051,13 +6100,17 @@ def test_ap_wpa2_eap_tls_versions(dev, a
+-             check_tls_ver(dev[0], hapd,
+-                           "tls_disable_tlsv1_0=1 tls_disable_tlsv1_1=1",
+-                           "TLSv1.2")
+--    elif tls.startswith("internal"):
+-+    elif tls.startswith("internal") or tls.startswith("mbed TLS"):
+-         check_tls_ver(dev[0], hapd,
+-                       "tls_disable_tlsv1_0=1 tls_disable_tlsv1_1=1", "TLSv1.2")
+--    check_tls_ver(dev[1], hapd,
+--                  "tls_disable_tlsv1_0=1 tls_disable_tlsv1_1=0 tls_disable_tlsv1_2=1", "TLSv1.1")
+--    check_tls_ver(dev[2], hapd,
+--                  "tls_disable_tlsv1_0=0 tls_disable_tlsv1_1=1 tls_disable_tlsv1_2=1", "TLSv1")
+-+    if tls.startswith("mbed TLS"):
+-+        check_tls_ver(dev[2], hapd,
+-+                      "tls_disable_tlsv1_0=0 tls_disable_tlsv1_1=1 tls_disable_tlsv1_2=1", "TLSv1.0")
+-+    else:
+-+        check_tls_ver(dev[1], hapd,
+-+                      "tls_disable_tlsv1_0=1 tls_disable_tlsv1_1=0 tls_disable_tlsv1_2=1", "TLSv1.1")
+-+        check_tls_ver(dev[2], hapd,
+-+                      "tls_disable_tlsv1_0=0 tls_disable_tlsv1_1=1 tls_disable_tlsv1_2=1", "TLSv1")
+-     if "run=OpenSSL 1.1.1" in tls or "run=OpenSSL 3.0" in tls:
+-         check_tls_ver(dev[0], hapd,
+-                       "tls_disable_tlsv1_0=1 tls_disable_tlsv1_1=1 tls_disable_tlsv1_2=1 tls_disable_tlsv1_3=0", "TLSv1.3")
+-@@ -6079,6 +6132,11 @@ def test_ap_wpa2_eap_tls_versions_server
+-     tests = [("TLSv1", "[ENABLE-TLSv1.0][DISABLE-TLSv1.1][DISABLE-TLSv1.2][DISABLE-TLSv1.3]"),
+-              ("TLSv1.1", "[ENABLE-TLSv1.0][ENABLE-TLSv1.1][DISABLE-TLSv1.2][DISABLE-TLSv1.3]"),
+-              ("TLSv1.2", "[ENABLE-TLSv1.0][ENABLE-TLSv1.1][ENABLE-TLSv1.2][DISABLE-TLSv1.3]")]
+-+    tls = dev[0].request("GET tls_library")
+-+    if tls.startswith("mbed TLS"):
+-+        tests = [#("TLSv1.0", "[ENABLE-TLSv1.0][DISABLE-TLSv1.1][DISABLE-TLSv1.2][DISABLE-TLSv1.3]"),
+-+                 #("TLSv1.1", "[ENABLE-TLSv1.0][ENABLE-TLSv1.1][DISABLE-TLSv1.2][DISABLE-TLSv1.3]"),
+-+                 ("TLSv1.2", "[ENABLE-TLSv1.0][ENABLE-TLSv1.1][ENABLE-TLSv1.2][DISABLE-TLSv1.3]")]
+-     for exp, flags in tests:
+-         hapd.disable()
+-         hapd.set("tls_flags", flags)
+-@@ -7115,6 +7173,7 @@ def test_ap_wpa2_eap_assoc_rsn(dev, apde
+- def test_eap_tls_ext_cert_check(dev, apdev):
+-     """EAP-TLS and external server certification validation"""
+-     # With internal server certificate chain validation
+-+    check_ext_cert_check_support(dev[0])
+-     id = dev[0].connect("test-wpa2-eap", key_mgmt="WPA-EAP", eap="TLS",
+-                         identity="tls user",
+-                         ca_cert="auth_serv/ca.pem",
+-@@ -7127,6 +7186,7 @@ def test_eap_tls_ext_cert_check(dev, apd
+- def test_eap_ttls_ext_cert_check(dev, apdev):
+-     """EAP-TTLS and external server certification validation"""
+-     # Without internal server certificate chain validation
+-+    check_ext_cert_check_support(dev[0])
+-     id = dev[0].connect("test-wpa2-eap", key_mgmt="WPA-EAP", eap="TTLS",
+-                         identity="pap user", anonymous_identity="ttls",
+-                         password="password", phase2="auth=PAP",
+-@@ -7137,6 +7197,7 @@ def test_eap_ttls_ext_cert_check(dev, ap
+- def test_eap_peap_ext_cert_check(dev, apdev):
+-     """EAP-PEAP and external server certification validation"""
+-     # With internal server certificate chain validation
+-+    check_ext_cert_check_support(dev[0])
+-     id = dev[0].connect("test-wpa2-eap", key_mgmt="WPA-EAP", eap="PEAP",
+-                         identity="user", anonymous_identity="peap",
+-                         ca_cert="auth_serv/ca.pem",
+-@@ -7147,6 +7208,7 @@ def test_eap_peap_ext_cert_check(dev, ap
+- 
+- def test_eap_fast_ext_cert_check(dev, apdev):
+-     """EAP-FAST and external server certification validation"""
+-+    check_ext_cert_check_support(dev[0])
+-     check_eap_capa(dev[0], "FAST")
+-     # With internal server certificate chain validation
+-     dev[0].request("SET blob fast_pac_auth_ext ")
+-@@ -7161,10 +7223,6 @@ def test_eap_fast_ext_cert_check(dev, ap
+-     run_ext_cert_check(dev, apdev, id)
+- 
+- def run_ext_cert_check(dev, apdev, net_id):
+--    check_ext_cert_check_support(dev[0])
+--    if not openssl_imported:
+--        raise HwsimSkip("OpenSSL python method not available")
+--
+-     params = hostapd.wpa2_eap_params(ssid="test-wpa2-eap")
+-     hapd = hostapd.add_ap(apdev[0], params)
+- 
+---- a/tests/hwsim/test_ap_ft.py
+-+++ b/tests/hwsim/test_ap_ft.py
+-@@ -2471,11 +2471,11 @@ def test_ap_ft_ap_oom5(dev, apdev):
+-         # This will fail to roam
+-         dev[0].roam(bssid1, check_bssid=False)
+- 
+--    with fail_test(hapd1, 1, "sha256_prf_bits;wpa_pmk_r1_to_ptk;wpa_ft_process_auth_req"):
+-+    with fail_test(hapd1, 1, "sha256_prf;wpa_pmk_r1_to_ptk;wpa_ft_process_auth_req"):
+-         # This will fail to roam
+-         dev[0].roam(bssid1, check_bssid=False)
+- 
+--    with fail_test(hapd1, 3, "wpa_pmk_r1_to_ptk;wpa_ft_process_auth_req"):
+-+    with fail_test(hapd1, 2, "wpa_pmk_r1_to_ptk;wpa_ft_process_auth_req"):
+-         # This will fail to roam
+-         dev[0].roam(bssid1, check_bssid=False)
+- 
+---- a/tests/hwsim/test_authsrv.py
+-+++ b/tests/hwsim/test_authsrv.py
+-@@ -156,9 +156,12 @@ def test_authsrv_oom(dev, apdev):
+-         if "FAIL" not in authsrv.request("ENABLE"):
+-             raise Exception("ENABLE succeeded during OOM")
+- 
+--    with alloc_fail(authsrv, 1, "tls_init;authsrv_init"):
+--        if "FAIL" not in authsrv.request("ENABLE"):
+--            raise Exception("ENABLE succeeded during OOM")
+-+    # tls_mbedtls.c:tls_init() does not alloc memory (no alloc fail trigger)
+-+    tls = dev[0].request("GET tls_library")
+-+    if not tls.startswith("mbed TLS"):
+-+        with alloc_fail(authsrv, 1, "tls_init;authsrv_init"):
+-+            if "FAIL" not in authsrv.request("ENABLE"):
+-+                raise Exception("ENABLE succeeded during OOM")
+- 
+-     for count in range(1, 3):
+-         with alloc_fail(authsrv, count, "eap_sim_db_init;authsrv_init"):
+---- a/tests/hwsim/test_dpp.py
+-+++ b/tests/hwsim/test_dpp.py
+-@@ -39,7 +39,8 @@ def check_dpp_capab(dev, brainpool=False
+-         raise HwsimSkip("DPP not supported")
+-     if brainpool:
+-         tls = dev.request("GET tls_library")
+--        if (not tls.startswith("OpenSSL") or "run=BoringSSL" in tls) and not tls.startswith("wolfSSL"):
+-+        if (not tls.startswith("OpenSSL") or "run=BoringSSL" in tls) and not tls.startswith("wolfSSL") \
+-+                                                                     and not tls.startswith("mbed TLS"):
+-             raise HwsimSkip("Crypto library does not support Brainpool curves: " + tls)
+-     capa = dev.request("GET_CAPABILITY dpp")
+-     ver = 1
+-@@ -3892,6 +3893,9 @@ def test_dpp_proto_auth_req_no_i_proto_k
+- 
+- def test_dpp_proto_auth_req_invalid_i_proto_key(dev, apdev):
+-     """DPP protocol testing - invalid I-proto key in Auth Req"""
+-+    tls = dev[0].request("GET tls_library")
+-+    if tls.startswith("mbed TLS"):
+-+        raise HwsimSkip("mbed TLS crypto_ecdh_set_peerkey() properly detects invalid key; no response")
+-     run_dpp_proto_auth_req_missing(dev, 66, "Invalid Initiator Protocol Key")
+- 
+- def test_dpp_proto_auth_req_no_i_nonce(dev, apdev):
+-@@ -3987,7 +3991,12 @@ def test_dpp_proto_auth_resp_no_r_proto_
+- 
+- def test_dpp_proto_auth_resp_invalid_r_proto_key(dev, apdev):
+-     """DPP protocol testing - invalid R-Proto Key in Auth Resp"""
+--    run_dpp_proto_auth_resp_missing(dev, 67, "Invalid Responder Protocol Key")
+-+    tls = dev[0].request("GET tls_library")
+-+    if tls.startswith("mbed TLS"):
+-+        # mbed TLS crypto_ecdh_set_peerkey() properly detects invalid key
+-+        run_dpp_proto_auth_resp_missing(dev, 67, "Failed to derive ECDH shared secret")
+-+    else:
+-+        run_dpp_proto_auth_resp_missing(dev, 67, "Invalid Responder Protocol Key")
+- 
+- def test_dpp_proto_auth_resp_no_r_nonce(dev, apdev):
+-     """DPP protocol testing - no R-nonce in Auth Resp"""
+-@@ -4349,11 +4358,17 @@ def test_dpp_proto_pkex_exchange_resp_in
+- 
+- def test_dpp_proto_pkex_cr_req_invalid_bootstrap_key(dev, apdev):
+-     """DPP protocol testing - invalid Bootstrap Key in PKEX Commit-Reveal Request"""
+-+    tls = dev[0].request("GET tls_library")
+-+    if tls.startswith("mbed TLS"):
+-+        raise HwsimSkip("mbed TLS crypto_ecdh_set_peerkey() properly detects invalid key; no response")
+-     run_dpp_proto_pkex_req_missing(dev, 47,
+-                                    "Peer bootstrapping key is invalid")
+- 
+- def test_dpp_proto_pkex_cr_resp_invalid_bootstrap_key(dev, apdev):
+-     """DPP protocol testing - invalid Bootstrap Key in PKEX Commit-Reveal Response"""
+-+    tls = dev[0].request("GET tls_library")
+-+    if tls.startswith("mbed TLS"):
+-+        raise HwsimSkip("mbed TLS crypto_ecdh_set_peerkey() properly detects invalid key; no response")
+-     run_dpp_proto_pkex_resp_missing(dev, 48,
+-                                     "Peer bootstrapping key is invalid")
+- 
+---- a/tests/hwsim/test_erp.py
+-+++ b/tests/hwsim/test_erp.py
+-@@ -12,7 +12,7 @@ import time
+- 
+- import hostapd
+- from utils import *
+--from test_ap_eap import int_eap_server_params, check_tls13_support
+-+from test_ap_eap import int_eap_server_params, check_tls13_support, check_eap_capa
+- from test_ap_psk import find_wpas_process, read_process_memory, verify_not_present, get_key_locations
+- 
+- def test_erp_initiate_reauth_start(dev, apdev):
+-@@ -276,6 +276,7 @@ def test_erp_radius_eap_methods(dev, apd
+-     params['erp_domain'] = 'example.com'
+-     params['disable_pmksa_caching'] = '1'
+-     hapd = hostapd.add_ap(apdev[0], params)
+-+    tls = dev[0].request("GET tls_library")
+- 
+-     erp_test(dev[0], hapd, eap="AKA", identity="0232010000000000@example.com",
+-              password="90dca4eda45b53cf0f12d7c9c3bc6a89:cb9cccc4b9258e6dca4760379fb82581:000000000123")
+-@@ -289,7 +290,7 @@ def test_erp_radius_eap_methods(dev, apd
+-              password="5122250214c33e723a5dd523fc145fc0:981d464c7c52eb6e5036234984ad0bcf:000000000123")
+-     erp_test(dev[0], hapd, eap="EKE", identity="erp-eke@example.com",
+-              password="hello")
+--    if "FAST" in eap_methods:
+-+    if "FAST" in eap_methods and check_eap_capa(dev[0], "FAST"):
+-         erp_test(dev[0], hapd, eap="FAST", identity="erp-fast@example.com",
+-                  password="password", ca_cert="auth_serv/ca.pem",
+-                  phase2="auth=GTC",
+-@@ -301,13 +302,14 @@ def test_erp_radius_eap_methods(dev, apd
+-              password="password")
+-     erp_test(dev[0], hapd, eap="PAX", identity="erp-pax@example.com",
+-              password_hex="0123456789abcdef0123456789abcdef")
+--    if "MSCHAPV2" in eap_methods:
+-+    if "MSCHAPV2" in eap_methods and check_eap_capa(dev[0], "MSCHAPV2"):
+-         erp_test(dev[0], hapd, eap="PEAP", identity="erp-peap@example.com",
+-                  password="password", ca_cert="auth_serv/ca.pem",
+-                  phase2="auth=MSCHAPV2")
+--        erp_test(dev[0], hapd, eap="TEAP", identity="erp-teap@example.com",
+--                 password="password", ca_cert="auth_serv/ca.pem",
+--                 phase2="auth=MSCHAPV2", pac_file="blob://teap_pac")
+-+        if check_eap_capa(dev[0], "TEAP"):
+-+            erp_test(dev[0], hapd, eap="TEAP", identity="erp-teap@example.com",
+-+                     password="password", ca_cert="auth_serv/ca.pem",
+-+                     phase2="auth=MSCHAPV2", pac_file="blob://teap_pac")
+-     erp_test(dev[0], hapd, eap="PSK", identity="erp-psk@example.com",
+-              password_hex="0123456789abcdef0123456789abcdef")
+-     if "PWD" in eap_methods:
+-@@ -640,7 +642,7 @@ def test_erp_local_errors(dev, apdev):
+-         dev[0].request("REMOVE_NETWORK all")
+-         dev[0].wait_disconnected()
+- 
+--    for count in range(1, 6):
+-+    for count in range(1, 4):
+-         dev[0].request("ERP_FLUSH")
+-         with fail_test(dev[0], count, "hmac_sha256_kdf;eap_peer_erp_init"):
+-             dev[0].connect("test-wpa2-eap", key_mgmt="WPA-EAP", eap="TTLS",
+---- a/tests/hwsim/test_fils.py
+-+++ b/tests/hwsim/test_fils.py
+-@@ -1422,7 +1422,10 @@ def run_fils_sk_pfs(dev, apdev, group, p
+-     check_erp_capa(dev[0])
+- 
+-     tls = dev[0].request("GET tls_library")
+--    if not tls.startswith("wolfSSL"):
+-+    if tls.startswith("mbed TLS"):
+-+        if int(group) == 27:
+-+            raise HwsimSkip("Brainpool EC group 27 not supported by mbed TLS")
+-+    elif not tls.startswith("wolfSSL"):
+-         if int(group) in [25]:
+-             if not (tls.startswith("OpenSSL") and ("build=OpenSSL 1.0.2" in tls or "build=OpenSSL 1.1" in tls or "build=OpenSSL 3.0" in tls) and ("run=OpenSSL 1.0.2" in tls or "run=OpenSSL 1.1" in tls or "run=OpenSSL 3.0" in tls)):
+-                 raise HwsimSkip("EC group not supported")
+---- a/tests/hwsim/test_pmksa_cache.py
+-+++ b/tests/hwsim/test_pmksa_cache.py
+-@@ -955,7 +955,7 @@ def test_pmksa_cache_preauth_wpas_oom(de
+-     eap_connect(dev[0], hapd, "PAX", "pax.user@example.com",
+-                 password_hex="0123456789abcdef0123456789abcdef",
+-                 bssid=apdev[0]['bssid'])
+--    for i in range(1, 11):
+-+    for i in range(1, 10):
+-         with alloc_fail(dev[0], i, "rsn_preauth_init"):
+-             res = dev[0].request("PREAUTH f2:11:22:33:44:55").strip()
+-             logger.info("Iteration %d - PREAUTH command results: %s" % (i, res))
+-@@ -963,7 +963,7 @@ def test_pmksa_cache_preauth_wpas_oom(de
+-                 state = dev[0].request('GET_ALLOC_FAIL')
+-                 if state.startswith('0:'):
+-                     break
+--                time.sleep(0.05)
+-+                time.sleep(0.10)
+- 
+- def test_pmksa_cache_ctrl(dev, apdev):
+-     """PMKSA cache control interface operations"""
+---- a/tests/hwsim/test_sae.py
+-+++ b/tests/hwsim/test_sae.py
+-@@ -177,6 +177,11 @@ def test_sae_groups(dev, apdev):
+-     if tls.startswith("OpenSSL") and "run=OpenSSL 1." in tls:
+-         logger.info("Add Brainpool EC groups since OpenSSL is new enough")
+-         sae_groups += [27, 28, 29, 30]
+-+    if tls.startswith("mbed TLS"):
+-+        # secp224k1 and secp224r1 (26) have prime p = 1 mod 4, and mbedtls
+-+        # does not have code to derive y from compressed format for those curves
+-+        sae_groups = [19, 25, 20, 21, 1, 2, 5, 14, 15, 16, 22, 23, 24]
+-+        sae_groups += [27, 28, 29, 30]
+-     heavy_groups = [14, 15, 16]
+-     suitable_groups = [15, 16, 17, 18, 19, 20, 21]
+-     groups = [str(g) for g in sae_groups]
+-@@ -2188,6 +2193,8 @@ def run_sae_pwe_group(dev, apdev, group)
+-             logger.info("Add Brainpool EC groups since OpenSSL is new enough")
+-         elif tls.startswith("wolfSSL"):
+-             logger.info("Make sure Brainpool EC groups were enabled when compiling wolfSSL")
+-+        elif tls.startswith("mbed TLS"):
+-+            logger.info("Make sure Brainpool EC groups were enabled when compiling mbed TLS")
+-         else:
+-             raise HwsimSkip("Brainpool curve not supported")
+-     start_sae_pwe_ap(apdev[0], group, 2)
+---- a/tests/hwsim/test_suite_b.py
+-+++ b/tests/hwsim/test_suite_b.py
+-@@ -27,6 +27,8 @@ def check_suite_b_tls_lib(dev, dhe=False
+-         return
+-     if tls.startswith("wolfSSL"):
+-         return
+-+    if tls.startswith("mbed TLS"):
+-+        return
+-     if not tls.startswith("OpenSSL"):
+-         raise HwsimSkip("TLS library not supported for Suite B: " + tls)
+-     supported = False
+-@@ -520,6 +522,7 @@ def test_suite_b_192_rsa_insufficient_dh
+- 
+-     dev[0].connect("test-suite-b", key_mgmt="WPA-EAP-SUITE-B-192",
+-                    ieee80211w="2",
+-+                   openssl_ciphers="DHE-RSA-AES256-GCM-SHA384",
+-                    phase1="tls_suiteb=1",
+-                    eap="TLS", identity="tls user",
+-                    ca_cert="auth_serv/rsa3072-ca.pem",
+---- a/tests/hwsim/test_wpas_ctrl.py
+-+++ b/tests/hwsim/test_wpas_ctrl.py
+-@@ -1842,7 +1842,7 @@ def _test_wpas_ctrl_oom(dev):
+-     tls = dev[0].request("GET tls_library")
+-     if not tls.startswith("internal"):
+-         tests.append(('NFC_GET_HANDOVER_SEL NDEF P2P-CR-TAG', 'FAIL',
+--                      4, 'wpas_ctrl_nfc_get_handover_sel_p2p'))
+-+                      3, 'wpas_ctrl_nfc_get_handover_sel_p2p'))
+-     for cmd, exp, count, func in tests:
+-         with alloc_fail(dev[0], count, func):
+-             res = dev[0].request(cmd)
+---- a/tests/hwsim/utils.py
+-+++ b/tests/hwsim/utils.py
+-@@ -141,7 +141,13 @@ def check_imsi_privacy_support(dev):
+- 
+- def check_tls_tod(dev):
+-     tls = dev.request("GET tls_library")
+--    if not tls.startswith("OpenSSL") and not tls.startswith("internal"):
+-+    if tls.startswith("OpenSSL"):
+-+        return
+-+    elif tls.startswith("internal"):
+-+        return
+-+    elif tls.startswith("mbed TLS"):
+-+        return
+-+    else:
+-         raise HwsimSkip("TLS TOD-TOFU/STRICT not supported with this TLS library: " + tls)
+- 
+- def vht_supported():
+---- /dev/null
+-+++ b/tests/test-crypto_module.c
+-@@ -0,0 +1,16 @@
+-+/*
+-+ * crypto module tests - test program
+-+ * Copyright (c) 2022, Glenn Strauss <gstrauss@gluelogic.com>
+-+ *
+-+ * This software may be distributed under the terms of the BSD license.
+-+ * See README for more details.
+-+ */
+-+
+-+#include "utils/includes.h"
+-+#include "utils/module_tests.h"
+-+#include "crypto/crypto_module_tests.c"
+-+
+-+int main(int argc, char *argv[])
+-+{
+-+	return crypto_module_tests();
+-+}
+---- a/tests/test-https.c
+-+++ b/tests/test-https.c
+-@@ -75,7 +75,7 @@ static int https_client(int s, const cha
+- 	struct tls_connection *conn;
+- 	struct wpabuf *in, *out, *appl;
+- 	int res = -1;
+--	int need_more_data;
+-+	int need_more_data = 0;
+- 
+- 	os_memset(&conf, 0, sizeof(conf));
+- 	conf.event_cb = https_tls_event_cb;
+-@@ -93,8 +93,12 @@ static int https_client(int s, const cha
+- 
+- 	for (;;) {
+- 		appl = NULL;
+-+#ifdef CONFIG_TLS_INTERNAL_SERVER
+- 		out = tls_connection_handshake2(tls, conn, in, &appl,
+- 						&need_more_data);
+-+#else
+-+		out = tls_connection_handshake(tls, conn, in, &appl);
+-+#endif
+- 		wpabuf_free(in);
+- 		in = NULL;
+- 		if (out == NULL) {
+-@@ -152,11 +156,15 @@ static int https_client(int s, const cha
+- 
+- 	wpa_printf(MSG_INFO, "Reading HTTP response");
+- 	for (;;) {
+--		int need_more_data;
+-+		int need_more_data = 0;
+- 		in = https_recv(s);
+- 		if (in == NULL)
+- 			goto done;
+-+#ifdef CONFIG_TLS_INTERNAL_SERVER
+- 		out = tls_connection_decrypt2(tls, conn, in, &need_more_data);
+-+#else
+-+		out = tls_connection_decrypt(tls, conn, in);
+-+#endif
+- 		if (need_more_data)
+- 			wpa_printf(MSG_DEBUG, "HTTP: Need more data");
+- 		wpabuf_free(in);
+---- a/tests/test-https_server.c
+-+++ b/tests/test-https_server.c
+-@@ -67,10 +67,12 @@ static struct wpabuf * https_recv(int s,
+- }
+- 
+- 
+-+#ifdef CONFIG_TLS_INTERNAL_SERVER
+- static void https_tls_log_cb(void *ctx, const char *msg)
+- {
+- 	wpa_printf(MSG_DEBUG, "TLS: %s", msg);
+- }
+-+#endif
+- 
+- 
+- static int https_server(int s)
+-@@ -79,7 +81,7 @@ static int https_server(int s)
+- 	void *tls;
+- 	struct tls_connection_params params;
+- 	struct tls_connection *conn;
+--	struct wpabuf *in, *out, *appl;
+-+	struct wpabuf *in = NULL, *out = NULL, *appl = NULL;
+- 	int res = -1;
+- 
+- 	os_memset(&conf, 0, sizeof(conf));
+-@@ -106,7 +108,9 @@ static int https_server(int s)
+- 		return -1;
+- 	}
+- 
+-+#ifdef CONFIG_TLS_INTERNAL_SERVER
+- 	tls_connection_set_log_cb(conn, https_tls_log_cb, NULL);
+-+#endif
+- 
+- 	for (;;) {
+- 		in = https_recv(s, 5000);
+-@@ -147,12 +151,16 @@ static int https_server(int s)
+- 
+- 	wpa_printf(MSG_INFO, "Reading HTTP request");
+- 	for (;;) {
+--		int need_more_data;
+-+		int need_more_data = 0;
+- 
+- 		in = https_recv(s, 5000);
+- 		if (!in)
+- 			goto done;
+-+#ifdef CONFIG_TLS_INTERNAL_SERVER
+- 		out = tls_connection_decrypt2(tls, conn, in, &need_more_data);
+-+#else
+-+		out = tls_connection_decrypt(tls, conn, in);
+-+#endif
+- 		wpabuf_free(in);
+- 		in = NULL;
+- 		if (need_more_data) {
+---- a/wpa_supplicant/Makefile
+-+++ b/wpa_supplicant/Makefile
+-@@ -1122,6 +1122,7 @@ CFLAGS += -DCONFIG_TLSV12
+- endif
+- 
+- ifeq ($(CONFIG_TLS), wolfssl)
+-+CFLAGS += -DCONFIG_TLS_WOLFSSL
+- ifdef TLS_FUNCS
+- CFLAGS += -DWOLFSSL_DER_LOAD
+- OBJS += ../src/crypto/tls_wolfssl.o
+-@@ -1137,6 +1138,7 @@ LIBS_p += -lwolfssl -lm
+- endif
+- 
+- ifeq ($(CONFIG_TLS), openssl)
+-+CFLAGS += -DCONFIG_TLS_OPENSSL
+- CFLAGS += -DCRYPTO_RSA_OAEP_SHA256
+- ifdef TLS_FUNCS
+- CFLAGS += -DEAP_TLS_OPENSSL
+-@@ -1164,6 +1166,7 @@ CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONF
+- endif
+- 
+- ifeq ($(CONFIG_TLS), mbedtls)
+-+CFLAGS += -DCONFIG_TLS_MBEDTLS
+- ifndef CONFIG_CRYPTO
+- CONFIG_CRYPTO=mbedtls
+- endif
+-@@ -1183,6 +1186,7 @@ endif
+- endif
+- 
+- ifeq ($(CONFIG_TLS), gnutls)
+-+CFLAGS += -DCONFIG_TLS_GNUTLS
+- ifndef CONFIG_CRYPTO
+- # default to libgcrypt
+- CONFIG_CRYPTO=gnutls
+-@@ -1213,6 +1217,7 @@ endif
+- endif
+- 
+- ifeq ($(CONFIG_TLS), internal)
+-+CFLAGS += -DCONFIG_TLS_INTERNAL
+- ifndef CONFIG_CRYPTO
+- CONFIG_CRYPTO=internal
+- endif
+-@@ -1293,6 +1298,7 @@ endif
+- endif
+- 
+- ifeq ($(CONFIG_TLS), linux)
+-+CFLAGS += -DCONFIG_TLS_INTERNAL
+- OBJS += ../src/crypto/crypto_linux.o
+- OBJS_p += ../src/crypto/crypto_linux.o
+- ifdef TLS_FUNCS
+diff --git a/package/network/services/hostapd/patches/150-add-NULL-checks-encountered-during-tests-hwsim.patch b/package/network/services/hostapd/patches/150-add-NULL-checks-encountered-during-tests-hwsim.patch
+deleted file mode 100644
+index c8c3ff33f4..0000000000
+--- a/package/network/services/hostapd/patches/150-add-NULL-checks-encountered-during-tests-hwsim.patch
++++ /dev/null
+@@ -1,45 +0,0 @@
+-From 33afce36c54b0cad38643629ded10ff5d727f077 Mon Sep 17 00:00:00 2001
+-From: Glenn Strauss <gstrauss@gluelogic.com>
+-Date: Fri, 12 Aug 2022 05:34:47 -0400
+-Subject: [PATCH 5/7] add NULL checks (encountered during tests/hwsim)
+-
+-sae_derive_commit_element_ecc NULL pwe_ecc check
+-dpp_gen_keypair() NULL curve check
+-
+-Signed-off-by: Glenn Strauss <gstrauss@gluelogic.com>
+----
+- src/common/dpp_crypto.c | 6 ++++++
+- src/common/sae.c        | 7 +++++++
+- 2 files changed, 13 insertions(+)
+-
+---- a/src/common/dpp_crypto.c
+-+++ b/src/common/dpp_crypto.c
+-@@ -269,6 +269,12 @@ int dpp_get_pubkey_hash(struct crypto_ec
+- 
+- struct crypto_ec_key * dpp_gen_keypair(const struct dpp_curve_params *curve)
+- {
+-+	if (curve == NULL) {
+-+		wpa_printf(MSG_DEBUG,
+-+		           "DPP: %s curve must be initialized", __func__);
+-+		return NULL;
+-+	}
+-+
+- 	struct crypto_ec_key *key;
+- 
+- 	wpa_printf(MSG_DEBUG, "DPP: Generating a keypair");
+---- a/src/common/sae.c
+-+++ b/src/common/sae.c
+-@@ -1278,6 +1278,13 @@ void sae_deinit_pt(struct sae_pt *pt)
+- static int sae_derive_commit_element_ecc(struct sae_data *sae,
+- 					 struct crypto_bignum *mask)
+- {
+-+	if (sae->tmp->pwe_ecc == NULL) {
+-+		wpa_printf(MSG_DEBUG,
+-+		           "SAE: %s sae->tmp->pwe_ecc must be initialized",
+-+		           __func__);
+-+		return -1;
+-+	}
+-+
+- 	/* COMMIT-ELEMENT = inverse(scalar-op(mask, PWE)) */
+- 	if (!sae->tmp->own_commit_element_ecc) {
+- 		sae->tmp->own_commit_element_ecc =
+diff --git a/package/network/services/hostapd/patches/160-dpp_pkex-EC-point-mul-w-value-prime.patch b/package/network/services/hostapd/patches/160-dpp_pkex-EC-point-mul-w-value-prime.patch
+deleted file mode 100644
+index db4fcfe235..0000000000
+--- a/package/network/services/hostapd/patches/160-dpp_pkex-EC-point-mul-w-value-prime.patch
++++ /dev/null
+@@ -1,26 +0,0 @@
+-From 54211caa2e0e5163aefef390daf88a971367a702 Mon Sep 17 00:00:00 2001
+-From: Glenn Strauss <gstrauss@gluelogic.com>
+-Date: Tue, 4 Oct 2022 17:09:24 -0400
+-Subject: [PATCH 6/7] dpp_pkex: EC point mul w/ value < prime
+-
+-crypto_ec_point_mul() with mbedtls requires point
+-be multiplied by a multiplicand with value < prime
+-
+-Signed-off-by: Glenn Strauss <gstrauss@gluelogic.com>
+----
+- src/common/dpp_crypto.c | 4 +++-
+- 1 file changed, 3 insertions(+), 1 deletion(-)
+-
+---- a/src/common/dpp_crypto.c
+-+++ b/src/common/dpp_crypto.c
+-@@ -1588,7 +1588,9 @@ dpp_pkex_derive_Qr(const struct dpp_curv
+- 	Pr = crypto_ec_key_get_public_key(Pr_key);
+- 	Qr = crypto_ec_point_init(ec);
+- 	hash_bn = crypto_bignum_init_set(hash, curve->hash_len);
+--	if (!Pr || !Qr || !hash_bn || crypto_ec_point_mul(ec, Pr, hash_bn, Qr))
+-+	if (!Pr || !Qr || !hash_bn ||
+-+	    crypto_bignum_mod(hash_bn, crypto_ec_get_prime(ec), hash_bn) ||
+-+	    crypto_ec_point_mul(ec, Pr, hash_bn, Qr))
+- 		goto fail;
+- 
+- 	if (crypto_ec_point_is_at_infinity(ec, Qr)) {
+diff --git a/package/network/services/hostapd/patches/170-wpa_supplicant-fix-compiling-without-IEEE8021X_EAPOL.patch b/package/network/services/hostapd/patches/170-wpa_supplicant-fix-compiling-without-IEEE8021X_EAPOL.patch
+deleted file mode 100644
+index 7724f1ae8d..0000000000
+--- a/package/network/services/hostapd/patches/170-wpa_supplicant-fix-compiling-without-IEEE8021X_EAPOL.patch
++++ /dev/null
+@@ -1,41 +0,0 @@
+-From c85ce84d942e1eabde33e120b18e5b1f1637b76e Mon Sep 17 00:00:00 2001
+-From: Nick Hainke <vincent@systemli.org>
+-Date: Tue, 14 Mar 2023 21:40:53 +0100
+-Subject: [PATCH] wpa_supplicant: fix compiling without IEEE8021X_EAPOL
+-
+-If IEEE8021X_EAPOL is not defined wpa_supplicant will not compile with
+-following error:
+-
+-  events.c: In function 'wpa_supplicant_connect':
+-  events.c:1827:14: warning: implicit declaration of function 'eap_is_wps_pbc_enrollee' [-Wimplicit-function-declaration]
+-   1827 |         if ((eap_is_wps_pbc_enrollee(&ssid->eap) &&
+-        |              ^~~~~~~~~~~~~~~~~~~~~~~
+-  events.c:1827:43: error: 'struct wpa_ssid' has no member named 'eap'
+-   1827 |         if ((eap_is_wps_pbc_enrollee(&ssid->eap) &&
+-        |                                           ^~
+-
+-Adding ifdef statements around the calling function fixes the issue.
+-
+-Signed-off-by: Nick Hainke <vincent@systemli.org>
+----
+- wpa_supplicant/events.c | 2 ++
+- 1 file changed, 2 insertions(+)
+-
+---- a/wpa_supplicant/events.c
+-+++ b/wpa_supplicant/events.c
+-@@ -1824,6 +1824,7 @@ int wpa_supplicant_connect(struct wpa_su
+- 			   struct wpa_bss *selected,
+- 			   struct wpa_ssid *ssid)
+- {
+-+#ifdef IEEE8021X_EAPOL
+- 	if ((eap_is_wps_pbc_enrollee(&ssid->eap) &&
+- 	     wpas_wps_partner_link_overlap_detect(wpa_s)) ||
+- 	    wpas_wps_scan_pbc_overlap(wpa_s, selected, ssid)) {
+-@@ -1846,6 +1847,7 @@ int wpa_supplicant_connect(struct wpa_su
+- #endif /* CONFIG_WPS */
+- 		return -1;
+- 	}
+-+#endif /* IEEE8021X_EAPOL */
+- 
+- 	wpa_msg(wpa_s, MSG_DEBUG,
+- 		"Considering connect request: reassociate: %d  selected: "
+diff --git a/package/network/services/hostapd/patches/200-multicall.patch b/package/network/services/hostapd/patches/200-multicall.patch
+deleted file mode 100644
+index f12aeb0ca9..0000000000
+--- a/package/network/services/hostapd/patches/200-multicall.patch
++++ /dev/null
+@@ -1,355 +0,0 @@
+---- a/hostapd/Makefile
+-+++ b/hostapd/Makefile
+-@@ -1,6 +1,7 @@
+- ALL=hostapd hostapd_cli
+- CONFIG_FILE = .config
+- 
+-+-include $(if $(MULTICALL), ../wpa_supplicant/.config)
+- include ../src/build.rules
+- 
+- ifdef LIBS
+-@@ -199,7 +200,8 @@ endif
+- 
+- ifdef CONFIG_NO_VLAN
+- CFLAGS += -DCONFIG_NO_VLAN
+--else
+-+endif
+-+ifneq ($(findstring CONFIG_NO_VLAN,$(CFLAGS)), CONFIG_NO_VLAN)
+- OBJS += ../src/ap/vlan_init.o
+- OBJS += ../src/ap/vlan_ifconfig.o
+- OBJS += ../src/ap/vlan.o
+-@@ -357,10 +359,14 @@ CFLAGS += -DCONFIG_MBO
+- OBJS += ../src/ap/mbo_ap.o
+- endif
+- 
+-+ifndef MULTICALL
+-+CFLAGS += -DNO_SUPPLICANT
+-+endif
+-+
+- include ../src/drivers/drivers.mak
+--OBJS += $(DRV_AP_OBJS)
+--CFLAGS += $(DRV_AP_CFLAGS)
+--LDFLAGS += $(DRV_AP_LDFLAGS)
+-+OBJS += $(sort $(DRV_AP_OBJS) $(if $(MULTICALL),$(DRV_WPA_OBJS)))
+-+CFLAGS += $(DRV_AP_CFLAGS) $(if $(MULTICALL),$(DRV_WPA_CFLAGS))
+-+LDFLAGS += $(DRV_AP_LDFLAGS) $(if $(MULTICALL),$(DRV_WPA_LDFLAGS))
+- LIBS += $(DRV_AP_LIBS)
+- 
+- ifdef CONFIG_L2_PACKET
+-@@ -1380,6 +1386,12 @@ install: $(addprefix $(DESTDIR)$(BINDIR)
+- _OBJS_VAR := OBJS
+- include ../src/objs.mk
+- 
+-+hostapd_multi.a: $(BCHECK) $(OBJS)
+-+	$(Q)$(CC) -c -o hostapd_multi.o -Dmain=hostapd_main $(CFLAGS) main.c
+-+	@$(E) "  CC " $<
+-+	@rm -f $@
+-+	@$(AR) cr $@ hostapd_multi.o $(OBJS)
+-+
+- hostapd: $(OBJS)
+- 	$(Q)$(CC) $(LDFLAGS) -o hostapd $(OBJS) $(LIBS)
+- 	@$(E) "  LD " $@
+-@@ -1460,6 +1472,12 @@ include ../src/objs.mk
+- _OBJS_VAR := SOBJS
+- include ../src/objs.mk
+- 
+-+dump_cflags:
+-+	@printf "%s " "$(CFLAGS)"
+-+
+-+dump_ldflags:
+-+	@printf "%s " "$(LDFLAGS) $(LIBS) $(EXTRALIBS)"
+-+
+- nt_password_hash: $(NOBJS)
+- 	$(Q)$(CC) $(LDFLAGS) -o nt_password_hash $(NOBJS) $(LIBS_n)
+- 	@$(E) "  LD " $@
+---- a/wpa_supplicant/Makefile
+-+++ b/wpa_supplicant/Makefile
+-@@ -10,6 +10,7 @@ ALL += dbus/fi.w1.wpa_supplicant1.servic
+- EXTRA_TARGETS=dynamic_eap_methods
+- 
+- CONFIG_FILE=.config
+-+-include $(if $(MULTICALL),../hostapd/.config)
+- include ../src/build.rules
+- 
+- ifdef CONFIG_BUILD_PASN_SO
+-@@ -382,7 +383,9 @@ endif
+- ifdef CONFIG_IBSS_RSN
+- NEED_RSN_AUTHENTICATOR=y
+- CFLAGS += -DCONFIG_IBSS_RSN
+-+ifndef MULTICALL
+- CFLAGS += -DCONFIG_NO_VLAN
+-+endif
+- OBJS += ibss_rsn.o
+- endif
+- 
+-@@ -924,6 +927,10 @@ ifdef CONFIG_DYNAMIC_EAP_METHODS
+- CFLAGS += -DCONFIG_DYNAMIC_EAP_METHODS
+- LIBS += -ldl -rdynamic
+- endif
+-+else
+-+  ifdef MULTICALL
+-+    OBJS += ../src/eap_common/eap_common.o
+-+  endif
+- endif
+- 
+- ifdef CONFIG_AP
+-@@ -931,9 +938,11 @@ NEED_EAP_COMMON=y
+- NEED_RSN_AUTHENTICATOR=y
+- CFLAGS += -DCONFIG_AP
+- OBJS += ap.o
+-+ifndef MULTICALL
+- CFLAGS += -DCONFIG_NO_RADIUS
+- CFLAGS += -DCONFIG_NO_ACCOUNTING
+- CFLAGS += -DCONFIG_NO_VLAN
+-+endif
+- OBJS += ../src/ap/hostapd.o
+- OBJS += ../src/ap/wpa_auth_glue.o
+- OBJS += ../src/ap/utils.o
+-@@ -1022,6 +1031,12 @@ endif
+- ifdef CONFIG_HS20
+- OBJS += ../src/ap/hs20.o
+- endif
+-+else
+-+  ifdef MULTICALL
+-+    OBJS += ../src/eap_server/eap_server.o
+-+    OBJS += ../src/eap_server/eap_server_identity.o
+-+    OBJS += ../src/eap_server/eap_server_methods.o
+-+  endif
+- endif
+- 
+- ifdef CONFIG_MBO
+-@@ -1030,7 +1045,9 @@ CFLAGS += -DCONFIG_MBO
+- endif
+- 
+- ifdef NEED_RSN_AUTHENTICATOR
+-+ifndef MULTICALL
+- CFLAGS += -DCONFIG_NO_RADIUS
+-+endif
+- NEED_AES_WRAP=y
+- OBJS += ../src/ap/wpa_auth.o
+- OBJS += ../src/ap/wpa_auth_ie.o
+-@@ -2010,6 +2027,12 @@ wpa_priv: $(BCHECK) $(OBJS_priv)
+- 
+- _OBJS_VAR := OBJS
+- include ../src/objs.mk
+-+wpa_supplicant_multi.a: .config $(BCHECK) $(OBJS) $(EXTRA_progs)
+-+	$(Q)$(CC) -c -o wpa_supplicant_multi.o -Dmain=wpa_supplicant_main $(CFLAGS) main.c
+-+	@$(E) "  CC " $<
+-+	@rm -f $@
+-+	@$(AR) cr $@ wpa_supplicant_multi.o $(OBJS)
+-+
+- wpa_supplicant: $(BCHECK) $(OBJS) $(EXTRA_progs)
+- 	$(Q)$(LDO) $(LDFLAGS) -o wpa_supplicant $(OBJS) $(LIBS) $(EXTRALIBS)
+- 	@$(E) "  LD " $@
+-@@ -2142,6 +2165,12 @@ eap_gpsk.so: $(SRC_EAP_GPSK)
+- 	$(Q)sed -e 's|\@BINDIR\@|$(BINDIR)|g' $< >$@
+- 	@$(E) "  sed" $<
+- 
+-+dump_cflags:
+-+	@printf "%s " "$(CFLAGS)"
+-+
+-+dump_ldflags:
+-+	@printf "%s " "$(LDFLAGS) $(LIBS) $(EXTRALIBS)"
+-+
+- wpa_supplicant.exe: wpa_supplicant
+- 	mv -f $< $@
+- wpa_cli.exe: wpa_cli
+---- a/src/drivers/driver.h
+-+++ b/src/drivers/driver.h
+-@@ -6544,8 +6544,8 @@ union wpa_event_data {
+-  * Driver wrapper code should call this function whenever an event is received
+-  * from the driver.
+-  */
+--void wpa_supplicant_event(void *ctx, enum wpa_event_type event,
+--			  union wpa_event_data *data);
+-+extern void (*wpa_supplicant_event)(void *ctx, enum wpa_event_type event,
+-+				    union wpa_event_data *data);
+- 
+- /**
+-  * wpa_supplicant_event_global - Report a driver event for wpa_supplicant
+-@@ -6557,7 +6557,7 @@ void wpa_supplicant_event(void *ctx, enu
+-  * Same as wpa_supplicant_event(), but we search for the interface in
+-  * wpa_global.
+-  */
+--void wpa_supplicant_event_global(void *ctx, enum wpa_event_type event,
+-+extern void (*wpa_supplicant_event_global)(void *ctx, enum wpa_event_type event,
+- 				 union wpa_event_data *data);
+- 
+- /*
+---- a/src/ap/drv_callbacks.c
+-+++ b/src/ap/drv_callbacks.c
+-@@ -1887,8 +1887,8 @@ err:
+- #endif /* CONFIG_OWE */
+- 
+- 
+--void wpa_supplicant_event(void *ctx, enum wpa_event_type event,
+--			  union wpa_event_data *data)
+-+void hostapd_wpa_event(void *ctx, enum wpa_event_type event,
+-+		       union wpa_event_data *data)
+- {
+- 	struct hostapd_data *hapd = ctx;
+- #ifndef CONFIG_NO_STDOUT_DEBUG
+-@@ -2161,7 +2161,7 @@ void wpa_supplicant_event(void *ctx, enu
+- }
+- 
+- 
+--void wpa_supplicant_event_global(void *ctx, enum wpa_event_type event,
+-+void hostapd_wpa_event_global(void *ctx, enum wpa_event_type event,
+- 				 union wpa_event_data *data)
+- {
+- 	struct hapd_interfaces *interfaces = ctx;
+---- a/wpa_supplicant/wpa_priv.c
+-+++ b/wpa_supplicant/wpa_priv.c
+-@@ -1039,8 +1039,8 @@ static void wpa_priv_send_ft_response(st
+- }
+- 
+- 
+--void wpa_supplicant_event(void *ctx, enum wpa_event_type event,
+--			  union wpa_event_data *data)
+-+static void supplicant_event(void *ctx, enum wpa_event_type event,
+-+			     union wpa_event_data *data)
+- {
+- 	struct wpa_priv_interface *iface = ctx;
+- 
+-@@ -1103,7 +1103,7 @@ void wpa_supplicant_event(void *ctx, enu
+- }
+- 
+- 
+--void wpa_supplicant_event_global(void *ctx, enum wpa_event_type event,
+-+void supplicant_event_global(void *ctx, enum wpa_event_type event,
+- 				 union wpa_event_data *data)
+- {
+- 	struct wpa_priv_global *global = ctx;
+-@@ -1217,6 +1217,8 @@ int main(int argc, char *argv[])
+- 	if (os_program_init())
+- 		return -1;
+- 
+-+	wpa_supplicant_event = supplicant_event;
+-+	wpa_supplicant_event_global = supplicant_event_global;
+- 	wpa_priv_fd_workaround();
+- 
+- 	os_memset(&global, 0, sizeof(global));
+---- a/wpa_supplicant/events.c
+-+++ b/wpa_supplicant/events.c
+-@@ -5237,8 +5237,8 @@ static void wpas_event_unprot_beacon(str
+- }
+- 
+- 
+--void wpa_supplicant_event(void *ctx, enum wpa_event_type event,
+--			  union wpa_event_data *data)
+-+void supplicant_event(void *ctx, enum wpa_event_type event,
+-+		      union wpa_event_data *data)
+- {
+- 	struct wpa_supplicant *wpa_s = ctx;
+- 	int resched;
+-@@ -6149,7 +6149,7 @@ void wpa_supplicant_event(void *ctx, enu
+- }
+- 
+- 
+--void wpa_supplicant_event_global(void *ctx, enum wpa_event_type event,
+-+void supplicant_event_global(void *ctx, enum wpa_event_type event,
+- 				 union wpa_event_data *data)
+- {
+- 	struct wpa_supplicant *wpa_s;
+---- a/wpa_supplicant/wpa_supplicant.c
+-+++ b/wpa_supplicant/wpa_supplicant.c
+-@@ -7408,7 +7408,6 @@ struct wpa_interface * wpa_supplicant_ma
+- 	return NULL;
+- }
+- 
+--
+- /**
+-  * wpa_supplicant_match_existing - Match existing interfaces
+-  * @global: Pointer to global data from wpa_supplicant_init()
+-@@ -7443,6 +7442,11 @@ static int wpa_supplicant_match_existing
+- 
+- #endif /* CONFIG_MATCH_IFACE */
+- 
+-+extern void supplicant_event(void *ctx, enum wpa_event_type event,
+-+			     union wpa_event_data *data);
+-+
+-+extern void supplicant_event_global(void *ctx, enum wpa_event_type event,
+-+ 				 union wpa_event_data *data);
+- 
+- /**
+-  * wpa_supplicant_add_iface - Add a new network interface
+-@@ -7699,6 +7703,8 @@ struct wpa_global * wpa_supplicant_init(
+- #ifndef CONFIG_NO_WPA_MSG
+- 	wpa_msg_register_ifname_cb(wpa_supplicant_msg_ifname_cb);
+- #endif /* CONFIG_NO_WPA_MSG */
+-+	wpa_supplicant_event = supplicant_event;
+-+	wpa_supplicant_event_global = supplicant_event_global;
+- 
+- 	if (params->wpa_debug_file_path)
+- 		wpa_debug_open_file(params->wpa_debug_file_path);
+---- a/hostapd/main.c
+-+++ b/hostapd/main.c
+-@@ -595,6 +595,11 @@ fail:
+- 	return -1;
+- }
+- 
+-+void hostapd_wpa_event(void *ctx, enum wpa_event_type event,
+-+                       union wpa_event_data *data);
+-+
+-+void hostapd_wpa_event_global(void *ctx, enum wpa_event_type event,
+-+ 				 union wpa_event_data *data);
+- 
+- #ifdef CONFIG_WPS
+- static int gen_uuid(const char *txt_addr)
+-@@ -688,6 +693,8 @@ int main(int argc, char *argv[])
+- 		return -1;
+- #endif /* CONFIG_DPP */
+- 
+-+	wpa_supplicant_event = hostapd_wpa_event;
+-+	wpa_supplicant_event_global = hostapd_wpa_event_global;
+- 	for (;;) {
+- 		c = getopt(argc, argv, "b:Bde:f:hi:KP:sSTtu:vg:G:q");
+- 		if (c < 0)
+---- a/src/drivers/drivers.c
+-+++ b/src/drivers/drivers.c
+-@@ -10,6 +10,10 @@
+- #include "utils/common.h"
+- #include "driver.h"
+- 
+-+void (*wpa_supplicant_event)(void *ctx, enum wpa_event_type event,
+-+			     union wpa_event_data *data);
+-+void (*wpa_supplicant_event_global)(void *ctx, enum wpa_event_type event,
+-+			     union wpa_event_data *data);
+- 
+- const struct wpa_driver_ops *const wpa_drivers[] =
+- {
+---- a/wpa_supplicant/eapol_test.c
+-+++ b/wpa_supplicant/eapol_test.c
+-@@ -31,7 +31,12 @@
+- #include "ctrl_iface.h"
+- #include "pcsc_funcs.h"
+- #include "wpas_glue.h"
+-+#include "drivers/driver.h"
+- 
+-+void (*wpa_supplicant_event)(void *ctx, enum wpa_event_type event,
+-+			     union wpa_event_data *data);
+-+void (*wpa_supplicant_event_global)(void *ctx, enum wpa_event_type event,
+-+			     union wpa_event_data *data);
+- 
+- const struct wpa_driver_ops *const wpa_drivers[] = { NULL };
+- 
+-@@ -1303,6 +1308,10 @@ static void usage(void)
+- 	       "option several times.\n");
+- }
+- 
+-+extern void supplicant_event(void *ctx, enum wpa_event_type event,
+-+			     union wpa_event_data *data);
+-+extern void supplicant_event_global(void *ctx, enum wpa_event_type event,
+-+			     union wpa_event_data *data);
+- 
+- int main(int argc, char *argv[])
+- {
+-@@ -1323,6 +1332,8 @@ int main(int argc, char *argv[])
+- 	if (os_program_init())
+- 		return -1;
+- 
+-+	wpa_supplicant_event = supplicant_event;
+-+	wpa_supplicant_event_global = supplicant_event_global;
+- 	hostapd_logger_register_cb(hostapd_logger_cb);
+- 
+- 	os_memset(&eapol_test, 0, sizeof(eapol_test));
+diff --git a/package/network/services/hostapd/patches/300-noscan.patch b/package/network/services/hostapd/patches/300-noscan.patch
+deleted file mode 100644
+index 91e1aaad83..0000000000
+--- a/package/network/services/hostapd/patches/300-noscan.patch
++++ /dev/null
+@@ -1,58 +0,0 @@
+---- a/hostapd/config_file.c
+-+++ b/hostapd/config_file.c
+-@@ -3446,6 +3446,10 @@ static int hostapd_config_fill(struct ho
+- 		if (bss->ocv && !bss->ieee80211w)
+- 			bss->ieee80211w = 1;
+- #endif /* CONFIG_OCV */
+-+	} else if (os_strcmp(buf, "noscan") == 0) {
+-+		conf->noscan = atoi(pos);
+-+	} else if (os_strcmp(buf, "ht_coex") == 0) {
+-+		conf->no_ht_coex = !atoi(pos);
+- 	} else if (os_strcmp(buf, "ieee80211n") == 0) {
+- 		conf->ieee80211n = atoi(pos);
+- 	} else if (os_strcmp(buf, "ht_capab") == 0) {
+---- a/src/ap/ap_config.h
+-+++ b/src/ap/ap_config.h
+-@@ -1061,6 +1061,8 @@ struct hostapd_config {
+- 
+- 	int ht_op_mode_fixed;
+- 	u16 ht_capab;
+-+	int noscan;
+-+	int no_ht_coex;
+- 	int ieee80211n;
+- 	int secondary_channel;
+- 	int no_pri_sec_switch;
+---- a/src/ap/hw_features.c
+-+++ b/src/ap/hw_features.c
+-@@ -517,7 +517,8 @@ static int ieee80211n_check_40mhz(struct
+- 	int ret;
+- 
+- 	/* Check that HT40 is used and PRI / SEC switch is allowed */
+--	if (!iface->conf->secondary_channel || iface->conf->no_pri_sec_switch)
+-+	if (!iface->conf->secondary_channel || iface->conf->no_pri_sec_switch ||
+-+		iface->conf->noscan)
+- 		return 0;
+- 
+- 	hostapd_set_state(iface, HAPD_IFACE_HT_SCAN);
+---- a/src/ap/ieee802_11_ht.c
+-+++ b/src/ap/ieee802_11_ht.c
+-@@ -230,6 +230,9 @@ void hostapd_2040_coex_action(struct hos
+- 		return;
+- 	}
+- 
+-+	if (iface->conf->noscan || iface->conf->no_ht_coex)
+-+		return;
+-+
+- 	if (len < IEEE80211_HDRLEN + 2 + sizeof(*bc_ie)) {
+- 		wpa_printf(MSG_DEBUG,
+- 			   "Ignore too short 20/40 BSS Coexistence Management frame");
+-@@ -390,6 +393,9 @@ void ht40_intolerant_add(struct hostapd_
+- 	if (iface->current_mode->mode != HOSTAPD_MODE_IEEE80211G)
+- 		return;
+- 
+-+	if (iface->conf->noscan || iface->conf->no_ht_coex)
+-+		return;
+-+
+- 	wpa_printf(MSG_INFO, "HT: Forty MHz Intolerant is set by STA " MACSTR
+- 		   " in Association Request", MAC2STR(sta->addr));
+- 
+diff --git a/package/network/services/hostapd/patches/301-mesh-noscan.patch b/package/network/services/hostapd/patches/301-mesh-noscan.patch
+deleted file mode 100644
+index 8a1bdaa185..0000000000
+--- a/package/network/services/hostapd/patches/301-mesh-noscan.patch
++++ /dev/null
+@@ -1,71 +0,0 @@
+---- a/wpa_supplicant/config.c
+-+++ b/wpa_supplicant/config.c
+-@@ -2599,6 +2599,7 @@ static const struct parse_data ssid_fiel
+- #else /* CONFIG_MESH */
+- 	{ INT_RANGE(mode, 0, 4) },
+- #endif /* CONFIG_MESH */
+-+	{ INT_RANGE(noscan, 0, 1) },
+- 	{ INT_RANGE(proactive_key_caching, 0, 1) },
+- 	{ INT_RANGE(disabled, 0, 2) },
+- 	{ STR(id_str) },
+---- a/wpa_supplicant/config_file.c
+-+++ b/wpa_supplicant/config_file.c
+-@@ -775,6 +775,7 @@ static void wpa_config_write_network(FIL
+- #endif /* IEEE8021X_EAPOL */
+- 	INT(mode);
+- 	INT(no_auto_peer);
+-+	INT(noscan);
+- 	INT(mesh_fwding);
+- 	INT(frequency);
+- 	INT(enable_edmg);
+---- a/wpa_supplicant/mesh.c
+-+++ b/wpa_supplicant/mesh.c
+-@@ -506,6 +506,8 @@ static int wpa_supplicant_mesh_init(stru
+- 			   frequency);
+- 		goto out_free;
+- 	}
+-+	if (ssid->noscan)
+-+		conf->noscan = 1;
+- 
+- 	if (ssid->mesh_basic_rates == NULL) {
+- 		/*
+---- a/wpa_supplicant/wpa_supplicant.c
+-+++ b/wpa_supplicant/wpa_supplicant.c
+-@@ -2693,7 +2693,7 @@ static bool ibss_mesh_can_use_vht(struct
+- 				  const struct wpa_ssid *ssid,
+- 				  struct hostapd_hw_modes *mode)
+- {
+--	if (mode->mode != HOSTAPD_MODE_IEEE80211A)
+-+	if (mode->mode != HOSTAPD_MODE_IEEE80211A && !(ssid->noscan))
+- 		return false;
+- 
+- 	if (!drv_supports_vht(wpa_s, ssid))
+-@@ -2766,7 +2766,7 @@ static void ibss_mesh_select_40mhz(struc
+- 	int i, res;
+- 	unsigned int j;
+- 	static const int ht40plus[] = {
+--		36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157, 165, 173,
+-+		1, 2, 3, 4, 5, 6, 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157, 165, 173,
+- 		184, 192
+- 	};
+- 	int ht40 = -1;
+-@@ -3016,7 +3016,7 @@ void ibss_mesh_setup_freq(struct wpa_sup
+- 	int ieee80211_mode = wpas_mode_to_ieee80211_mode(ssid->mode);
+- 	enum hostapd_hw_mode hw_mode;
+- 	struct hostapd_hw_modes *mode = NULL;
+--	int i, obss_scan = 1;
+-+	int i, obss_scan = !(ssid->noscan);
+- 	u8 channel;
+- 	bool is_6ghz;
+- 	bool dfs_enabled = wpa_s->conf->country[0] && (wpa_s->drv_flags & WPA_DRIVER_FLAGS_RADAR);
+---- a/wpa_supplicant/config_ssid.h
+-+++ b/wpa_supplicant/config_ssid.h
+-@@ -1035,6 +1035,8 @@ struct wpa_ssid {
+- 	 */
+- 	int no_auto_peer;
+- 
+-+	int noscan;
+-+
+- 	/**
+- 	 * mesh_rssi_threshold - Set mesh parameter mesh_rssi_threshold (dBm)
+- 	 *
+diff --git a/package/network/services/hostapd/patches/310-rescan_immediately.patch b/package/network/services/hostapd/patches/310-rescan_immediately.patch
+deleted file mode 100644
+index 033f763094..0000000000
+--- a/package/network/services/hostapd/patches/310-rescan_immediately.patch
++++ /dev/null
+@@ -1,11 +0,0 @@
+---- a/wpa_supplicant/wpa_supplicant.c
+-+++ b/wpa_supplicant/wpa_supplicant.c
+-@@ -5713,7 +5713,7 @@ wpa_supplicant_alloc(struct wpa_supplica
+- 	if (wpa_s == NULL)
+- 		return NULL;
+- 	wpa_s->scan_req = INITIAL_SCAN_REQ;
+--	wpa_s->scan_interval = 5;
+-+	wpa_s->scan_interval = 1;
+- 	wpa_s->new_connection = 1;
+- 	wpa_s->parent = parent ? parent : wpa_s;
+- 	wpa_s->p2pdev = wpa_s->parent;
+diff --git a/package/network/services/hostapd/patches/320-optional_rfkill.patch b/package/network/services/hostapd/patches/320-optional_rfkill.patch
+deleted file mode 100644
+index 01537790e0..0000000000
+--- a/package/network/services/hostapd/patches/320-optional_rfkill.patch
++++ /dev/null
+@@ -1,61 +0,0 @@
+---- a/src/drivers/drivers.mak
+-+++ b/src/drivers/drivers.mak
+-@@ -54,7 +54,6 @@ NEED_SME=y
+- NEED_AP_MLME=y
+- NEED_NETLINK=y
+- NEED_LINUX_IOCTL=y
+--NEED_RFKILL=y
+- NEED_RADIOTAP=y
+- NEED_LIBNL=y
+- endif
+-@@ -111,7 +110,6 @@ DRV_WPA_CFLAGS += -DCONFIG_DRIVER_WEXT
+- CONFIG_WIRELESS_EXTENSION=y
+- NEED_NETLINK=y
+- NEED_LINUX_IOCTL=y
+--NEED_RFKILL=y
+- endif
+- 
+- ifdef CONFIG_DRIVER_NDIS
+-@@ -137,7 +135,6 @@ endif
+- ifdef CONFIG_WIRELESS_EXTENSION
+- DRV_WPA_CFLAGS += -DCONFIG_WIRELESS_EXTENSION
+- DRV_WPA_OBJS += ../src/drivers/driver_wext.o
+--NEED_RFKILL=y
+- endif
+- 
+- ifdef NEED_NETLINK
+-@@ -146,6 +143,7 @@ endif
+- 
+- ifdef NEED_RFKILL
+- DRV_OBJS += ../src/drivers/rfkill.o
+-+DRV_WPA_CFLAGS += -DCONFIG_RFKILL
+- endif
+- 
+- ifdef NEED_RADIOTAP
+---- a/src/drivers/rfkill.h
+-+++ b/src/drivers/rfkill.h
+-@@ -18,8 +18,24 @@ struct rfkill_config {
+- 	void (*unblocked_cb)(void *ctx);
+- };
+- 
+-+#ifdef CONFIG_RFKILL
+- struct rfkill_data * rfkill_init(struct rfkill_config *cfg);
+- void rfkill_deinit(struct rfkill_data *rfkill);
+- int rfkill_is_blocked(struct rfkill_data *rfkill);
+-+#else
+-+static inline struct rfkill_data * rfkill_init(struct rfkill_config *cfg)
+-+{
+-+	return (void *) 1;
+-+}
+-+
+-+static inline void rfkill_deinit(struct rfkill_data *rfkill)
+-+{
+-+}
+-+
+-+static inline int rfkill_is_blocked(struct rfkill_data *rfkill)
+-+{
+-+	return 0;
+-+}
+-+#endif
+- 
+- #endif /* RFKILL_H */
+diff --git a/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch b/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch
+deleted file mode 100644
+index 93a03a6db6..0000000000
+--- a/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch
++++ /dev/null
+@@ -1,11 +0,0 @@
+---- a/src/drivers/driver_nl80211.c
+-+++ b/src/drivers/driver_nl80211.c
+-@@ -5224,7 +5224,7 @@ static int nl80211_set_channel(struct i8
+- 		   freq->he_enabled, freq->eht_enabled, freq->bandwidth,
+- 		   freq->center_freq1, freq->center_freq2);
+- 
+--	msg = nl80211_drv_msg(drv, 0, set_chan ? NL80211_CMD_SET_CHANNEL :
+-+	msg = nl80211_bss_msg(bss, 0, set_chan ? NL80211_CMD_SET_CHANNEL :
+- 			      NL80211_CMD_SET_WIPHY);
+- 	if (!msg || nl80211_put_freq_params(msg, freq) < 0) {
+- 		nlmsg_free(msg);
+diff --git a/package/network/services/hostapd/patches/340-reload_freq_change.patch b/package/network/services/hostapd/patches/340-reload_freq_change.patch
+deleted file mode 100644
+index 9a468079d1..0000000000
+--- a/package/network/services/hostapd/patches/340-reload_freq_change.patch
++++ /dev/null
+@@ -1,80 +0,0 @@
+---- a/src/ap/hostapd.c
+-+++ b/src/ap/hostapd.c
+-@@ -142,6 +142,29 @@ static void hostapd_reload_bss(struct ho
+- #endif /* CONFIG_NO_RADIUS */
+- 
+- 	ssid = &hapd->conf->ssid;
+-+
+-+	hostapd_set_freq(hapd, hapd->iconf->hw_mode, hapd->iface->freq,
+-+			 hapd->iconf->channel,
+-+			 hapd->iconf->enable_edmg,
+-+			 hapd->iconf->edmg_channel,
+-+			 hapd->iconf->ieee80211n,
+-+			 hapd->iconf->ieee80211ac,
+-+			 hapd->iconf->ieee80211ax,
+-+			 hapd->iconf->ieee80211be,
+-+			 hapd->iconf->secondary_channel,
+-+			 hostapd_get_oper_chwidth(hapd->iconf),
+-+			 hostapd_get_oper_centr_freq_seg0_idx(hapd->iconf),
+-+			 hostapd_get_oper_centr_freq_seg1_idx(hapd->iconf));
+-+
+-+	if (hapd->iface->current_mode) {
+-+		if (hostapd_prepare_rates(hapd->iface, hapd->iface->current_mode)) {
+-+			wpa_printf(MSG_ERROR, "Failed to prepare rates table.");
+-+			hostapd_logger(hapd, NULL, HOSTAPD_MODULE_IEEE80211,
+-+				       HOSTAPD_LEVEL_WARNING,
+-+				       "Failed to prepare rates table.");
+-+		}
+-+	}
+-+
+- 	if (!ssid->wpa_psk_set && ssid->wpa_psk && !ssid->wpa_psk->next &&
+- 	    ssid->wpa_passphrase_set && ssid->wpa_passphrase) {
+- 		/*
+-@@ -250,6 +273,7 @@ int hostapd_reload_config(struct hostapd
+- 	struct hostapd_data *hapd = iface->bss[0];
+- 	struct hostapd_config *newconf, *oldconf;
+- 	size_t j;
+-+	int i;
+- 
+- 	if (iface->config_fname == NULL) {
+- 		/* Only in-memory config in use - assume it has been updated */
+-@@ -300,6 +324,17 @@ int hostapd_reload_config(struct hostapd
+- 	}
+- 	iface->conf = newconf;
+- 
+-+	for (i = 0; i < iface->num_hw_features; i++) {
+-+		struct hostapd_hw_modes *mode = &iface->hw_features[i];
+-+		if (mode->mode == iface->conf->hw_mode) {
+-+			iface->current_mode = mode;
+-+			break;
+-+		}
+-+	}
+-+
+-+	if (iface->conf->channel)
+-+		iface->freq = hostapd_hw_get_freq(hapd, iface->conf->channel);
+-+
+- 	for (j = 0; j < iface->num_bss; j++) {
+- 		hapd = iface->bss[j];
+- 		if (!hapd->conf->config_id || !newconf->bss[j]->config_id ||
+-@@ -307,21 +342,6 @@ int hostapd_reload_config(struct hostapd
+- 			      newconf->bss[j]->config_id) != 0)
+- 			hostapd_clear_old_bss(hapd);
+- 		hapd->iconf = newconf;
+--		hapd->iconf->channel = oldconf->channel;
+--		hapd->iconf->acs = oldconf->acs;
+--		hapd->iconf->secondary_channel = oldconf->secondary_channel;
+--		hapd->iconf->ieee80211n = oldconf->ieee80211n;
+--		hapd->iconf->ieee80211ac = oldconf->ieee80211ac;
+--		hapd->iconf->ht_capab = oldconf->ht_capab;
+--		hapd->iconf->vht_capab = oldconf->vht_capab;
+--		hostapd_set_oper_chwidth(hapd->iconf,
+--					 hostapd_get_oper_chwidth(oldconf));
+--		hostapd_set_oper_centr_freq_seg0_idx(
+--			hapd->iconf,
+--			hostapd_get_oper_centr_freq_seg0_idx(oldconf));
+--		hostapd_set_oper_centr_freq_seg1_idx(
+--			hapd->iconf,
+--			hostapd_get_oper_centr_freq_seg1_idx(oldconf));
+- 		hapd->conf = newconf->bss[j];
+- 		hostapd_reload_bss(hapd);
+- 	}
+diff --git a/package/network/services/hostapd/patches/341-mesh-ctrl-iface-channel-switch.patch b/package/network/services/hostapd/patches/341-mesh-ctrl-iface-channel-switch.patch
+deleted file mode 100644
+index 8784452876..0000000000
+--- a/package/network/services/hostapd/patches/341-mesh-ctrl-iface-channel-switch.patch
++++ /dev/null
+@@ -1,39 +0,0 @@
+---- a/wpa_supplicant/ap.c
+-+++ b/wpa_supplicant/ap.c
+-@@ -1825,15 +1825,35 @@ int ap_switch_channel(struct wpa_supplic
+- 
+- 
+- #ifdef CONFIG_CTRL_IFACE
+-+
+-+static int __ap_ctrl_iface_chanswitch(struct hostapd_iface *iface,
+-+				      struct csa_settings *settings)
+-+{
+-+#ifdef NEED_AP_MLME
+-+	if (!iface || !iface->bss[0])
+-+		return 0;
+-+
+-+	return hostapd_switch_channel(iface->bss[0], settings);
+-+#else
+-+	return -1;
+-+#endif
+-+}
+-+
+-+
+- int ap_ctrl_iface_chanswitch(struct wpa_supplicant *wpa_s, const char *pos)
+- {
+- 	struct csa_settings settings;
+- 	int ret = hostapd_parse_csa_settings(pos, &settings);
+- 
+-+	if (!(wpa_s->ap_iface && wpa_s->ap_iface->bss[0]) &&
+-+	    !(wpa_s->ifmsh && wpa_s->ifmsh->bss[0]))
+-+		return -1;
+-+
+-+	ret = __ap_ctrl_iface_chanswitch(wpa_s->ap_iface, &settings);
+- 	if (ret)
+- 		return ret;
+- 
+--	return ap_switch_channel(wpa_s, &settings);
+-+	return __ap_ctrl_iface_chanswitch(wpa_s->ifmsh, &settings);
+- }
+- #endif /* CONFIG_CTRL_IFACE */
+- 
+diff --git a/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch b/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch
+deleted file mode 100644
+index a943395b56..0000000000
+--- a/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch
++++ /dev/null
+@@ -1,35 +0,0 @@
+---- a/src/drivers/driver_nl80211.c
+-+++ b/src/drivers/driver_nl80211.c
+-@@ -3006,12 +3006,12 @@ static int wpa_driver_nl80211_del_beacon
+- 		return 0;
+- 
+- 	wpa_printf(MSG_DEBUG, "nl80211: Remove beacon (ifindex=%d)",
+--		   drv->ifindex);
+-+		   bss->ifindex);
+- 	link->beacon_set = 0;
+- 	link->freq = 0;
+- 
+- 	nl80211_put_wiphy_data_ap(bss);
+--	msg = nl80211_drv_msg(drv, 0, NL80211_CMD_DEL_BEACON);
+-+	msg = nl80211_bss_msg(bss, 0, NL80211_CMD_DEL_BEACON);
+- 	if (!msg)
+- 		return -ENOBUFS;
+- 
+-@@ -5907,7 +5907,7 @@ static void nl80211_teardown_ap(struct i
+- 		nl80211_mgmt_unsubscribe(bss, "AP teardown");
+- 
+- 	nl80211_put_wiphy_data_ap(bss);
+--	bss->flink->beacon_set = 0;
+-+	wpa_driver_nl80211_del_beacon_all(bss);
+- }
+- 
+- 
+-@@ -8642,8 +8642,6 @@ static int wpa_driver_nl80211_if_remove(
+- 	} else {
+- 		wpa_printf(MSG_DEBUG, "nl80211: First BSS - reassign context");
+- 		nl80211_teardown_ap(bss);
+--		if (!bss->added_if && !drv->first_bss->next)
+--			wpa_driver_nl80211_del_beacon_all(bss);
+- 		nl80211_destroy_bss(bss);
+- 		if (!bss->added_if)
+- 			i802_set_iface_flags(bss, 0);
+diff --git a/package/network/services/hostapd/patches/360-ctrl_iface_reload.patch b/package/network/services/hostapd/patches/360-ctrl_iface_reload.patch
+deleted file mode 100644
+index e9f46ce9d3..0000000000
+--- a/package/network/services/hostapd/patches/360-ctrl_iface_reload.patch
++++ /dev/null
+@@ -1,106 +0,0 @@
+---- a/hostapd/ctrl_iface.c
+-+++ b/hostapd/ctrl_iface.c
+-@@ -68,6 +68,7 @@
+- #include "fst/fst_ctrl_iface.h"
+- #include "config_file.h"
+- #include "ctrl_iface.h"
+-+#include "config_file.h"
+- 
+- 
+- #define HOSTAPD_CLI_DUP_VALUE_MAX_LEN 256
+-@@ -83,6 +84,7 @@ static void hostapd_ctrl_iface_send(stru
+- 				    enum wpa_msg_type type,
+- 				    const char *buf, size_t len);
+- 
+-+static char *reload_opts = NULL;
+- 
+- static int hostapd_ctrl_iface_attach(struct hostapd_data *hapd,
+- 				     struct sockaddr_storage *from,
+-@@ -134,6 +136,61 @@ static int hostapd_ctrl_iface_new_sta(st
+- 	return 0;
+- }
+- 
+-+static char *get_option(char *opt, char *str)
+-+{
+-+	int len = strlen(str);
+-+
+-+	if (!strncmp(opt, str, len))
+-+		return opt + len;
+-+	else
+-+		return NULL;
+-+}
+-+
+-+static struct hostapd_config *hostapd_ctrl_iface_config_read(const char *fname)
+-+{
+-+	struct hostapd_config *conf;
+-+	char *opt, *val;
+-+
+-+	conf = hostapd_config_read(fname);
+-+	if (!conf)
+-+		return NULL;
+-+
+-+	for (opt = strtok(reload_opts, " ");
+-+	     opt;
+-+		 opt = strtok(NULL, " ")) {
+-+
+-+		if ((val = get_option(opt, "channel=")))
+-+			conf->channel = atoi(val);
+-+		else if ((val = get_option(opt, "ht_capab=")))
+-+			conf->ht_capab = atoi(val);
+-+		else if ((val = get_option(opt, "ht_capab_mask=")))
+-+			conf->ht_capab &= atoi(val);
+-+		else if ((val = get_option(opt, "sec_chan=")))
+-+			conf->secondary_channel = atoi(val);
+-+		else if ((val = get_option(opt, "hw_mode=")))
+-+			conf->hw_mode = atoi(val);
+-+		else if ((val = get_option(opt, "ieee80211n=")))
+-+			conf->ieee80211n = atoi(val);
+-+		else
+-+			break;
+-+	}
+-+
+-+	return conf;
+-+}
+-+
+-+static int hostapd_ctrl_iface_update(struct hostapd_data *hapd, char *txt)
+-+{
+-+	struct hostapd_config * (*config_read_cb)(const char *config_fname);
+-+	struct hostapd_iface *iface = hapd->iface;
+-+
+-+	config_read_cb = iface->interfaces->config_read_cb;
+-+	iface->interfaces->config_read_cb = hostapd_ctrl_iface_config_read;
+-+	reload_opts = txt;
+-+
+-+	hostapd_reload_config(iface);
+-+
+-+	iface->interfaces->config_read_cb = config_read_cb;
+-+}
+- 
+- #ifdef NEED_AP_MLME
+- static int hostapd_ctrl_iface_sa_query(struct hostapd_data *hapd,
+-@@ -3529,6 +3586,8 @@ static int hostapd_ctrl_iface_receive_pr
+- 	} else if (os_strncmp(buf, "VENDOR ", 7) == 0) {
+- 		reply_len = hostapd_ctrl_iface_vendor(hapd, buf + 7, reply,
+- 						      reply_size);
+-+	} else if (os_strncmp(buf, "UPDATE ", 7) == 0) {
+-+		hostapd_ctrl_iface_update(hapd, buf + 7);
+- 	} else if (os_strcmp(buf, "ERP_FLUSH") == 0) {
+- 		ieee802_1x_erp_flush(hapd);
+- #ifdef RADIUS_SERVER
+---- a/src/ap/ctrl_iface_ap.c
+-+++ b/src/ap/ctrl_iface_ap.c
+-@@ -1008,7 +1008,13 @@ int hostapd_parse_csa_settings(const cha
+- 
+- int hostapd_ctrl_iface_stop_ap(struct hostapd_data *hapd)
+- {
+--	return hostapd_drv_stop_ap(hapd);
+-+	struct hostapd_iface *iface = hapd->iface;
+-+	int i;
+-+
+-+	for (i = 0; i < iface->num_bss; i++)
+-+		hostapd_drv_stop_ap(iface->bss[i]);
+-+
+-+	return 0;
+- }
+- 
+- 
+diff --git a/package/network/services/hostapd/patches/370-ap_sta_support.patch b/package/network/services/hostapd/patches/370-ap_sta_support.patch
+deleted file mode 100644
+index 24064839f1..0000000000
+--- a/package/network/services/hostapd/patches/370-ap_sta_support.patch
++++ /dev/null
+@@ -1,392 +0,0 @@
+---- a/wpa_supplicant/Makefile
+-+++ b/wpa_supplicant/Makefile
+-@@ -126,6 +126,8 @@ OBJS_c += ../src/utils/common.o
+- OBJS_c += ../src/common/cli.o
+- OBJS += wmm_ac.o
+- 
+-+OBJS += ../src/common/wpa_ctrl.o
+-+
+- ifndef CONFIG_OS
+- ifdef CONFIG_NATIVE_WINDOWS
+- CONFIG_OS=win32
+---- a/wpa_supplicant/bss.c
+-+++ b/wpa_supplicant/bss.c
+-@@ -11,6 +11,7 @@
+- #include "utils/common.h"
+- #include "utils/eloop.h"
+- #include "common/ieee802_11_defs.h"
+-+#include "common/ieee802_11_common.h"
+- #include "drivers/driver.h"
+- #include "eap_peer/eap.h"
+- #include "wpa_supplicant_i.h"
+-@@ -283,6 +284,10 @@ void calculate_update_time(const struct
+- static void wpa_bss_copy_res(struct wpa_bss *dst, struct wpa_scan_res *src,
+- 			     struct os_reltime *fetch_time)
+- {
+-+	struct ieee80211_ht_capabilities *capab;
+-+	struct ieee80211_ht_operation *oper;
+-+	struct ieee802_11_elems elems;
+-+
+- 	dst->flags = src->flags;
+- 	os_memcpy(dst->bssid, src->bssid, ETH_ALEN);
+- 	dst->freq = src->freq;
+-@@ -296,6 +301,15 @@ static void wpa_bss_copy_res(struct wpa_
+- 	dst->est_throughput = src->est_throughput;
+- 	dst->snr = src->snr;
+- 
+-+	memset(&elems, 0, sizeof(elems));
+-+	ieee802_11_parse_elems((u8 *) (src + 1), src->ie_len, &elems, 0);
+-+	capab = (struct ieee80211_ht_capabilities *) elems.ht_capabilities;
+-+	oper = (struct ieee80211_ht_operation *) elems.ht_operation;
+-+	if (capab)
+-+		dst->ht_capab = le_to_host16(capab->ht_capabilities_info);
+-+	if (oper)
+-+		dst->ht_param = oper->ht_param;
+-+
+- 	calculate_update_time(fetch_time, src->age, &dst->last_update);
+- }
+- 
+---- a/wpa_supplicant/bss.h
+-+++ b/wpa_supplicant/bss.h
+-@@ -94,6 +94,10 @@ struct wpa_bss {
+- 	u8 ssid[SSID_MAX_LEN];
+- 	/** Length of SSID */
+- 	size_t ssid_len;
+-+	/** HT capabilities */
+-+	u16 ht_capab;
+-+	/* Five octets of HT Operation Information */
+-+	u8 ht_param;
+- 	/** Frequency of the channel in MHz (e.g., 2412 = channel 1) */
+- 	int freq;
+- 	/** Beacon interval in TUs (host byte order) */
+---- a/wpa_supplicant/main.c
+-+++ b/wpa_supplicant/main.c
+-@@ -35,7 +35,7 @@ static void usage(void)
+- 	       "vW] [-P<pid file>] "
+- 	       "[-g<global ctrl>] \\\n"
+- 	       "        [-G<group>] \\\n"
+--	       "        -i<ifname> -c<config file> [-C<ctrl>] [-D<driver>] "
+-+	       "        -i<ifname> -c<config file> [-C<ctrl>] [-D<driver>] [-H<hostapd path>] "
+- 	       "[-p<driver_param>] \\\n"
+- 	       "        [-b<br_ifname>] [-e<entropy file>]"
+- #ifdef CONFIG_DEBUG_FILE
+-@@ -75,6 +75,7 @@ static void usage(void)
+- 	       "  -g = global ctrl_interface\n"
+- 	       "  -G = global ctrl_interface group\n"
+- 	       "  -h = show this help text\n"
+-+	       "  -H = connect to a hostapd instance to manage state changes\n"
+- 	       "  -i = interface name\n"
+- 	       "  -I = additional configuration file\n"
+- 	       "  -K = include keys (passwords, etc.) in debug output\n"
+-@@ -202,7 +203,7 @@ int main(int argc, char *argv[])
+- 
+- 	for (;;) {
+- 		c = getopt(argc, argv,
+--			   "b:Bc:C:D:de:f:g:G:hi:I:KLMm:No:O:p:P:qsTtuvW");
+-+			   "b:Bc:C:D:de:f:g:G:hH:i:I:KLMm:No:O:p:P:qsTtuvW");
+- 		if (c < 0)
+- 			break;
+- 		switch (c) {
+-@@ -249,6 +250,9 @@ int main(int argc, char *argv[])
+- 			usage();
+- 			exitcode = 0;
+- 			goto out;
+-+		case 'H':
+-+			iface->hostapd_ctrl = optarg;
+-+			break;
+- 		case 'i':
+- 			iface->ifname = optarg;
+- 			break;
+---- a/wpa_supplicant/wpa_supplicant.c
+-+++ b/wpa_supplicant/wpa_supplicant.c
+-@@ -131,6 +131,54 @@ static void wpas_update_fils_connect_par
+- static void wpas_update_owe_connect_params(struct wpa_supplicant *wpa_s);
+- #endif /* CONFIG_OWE */
+- 
+-+static int hostapd_stop(struct wpa_supplicant *wpa_s)
+-+{
+-+	const char *cmd = "STOP_AP";
+-+	char buf[256];
+-+	size_t len = sizeof(buf);
+-+
+-+	if (wpa_ctrl_request(wpa_s->hostapd, cmd, os_strlen(cmd), buf, &len, NULL) < 0) {
+-+		wpa_printf(MSG_ERROR, "\nFailed to stop hostapd AP interfaces\n");
+-+		return -1;
+-+	}
+-+	return 0;
+-+}
+-+
+-+static int hostapd_reload(struct wpa_supplicant *wpa_s, struct wpa_bss *bss)
+-+{
+-+	char *cmd = NULL;
+-+	char buf[256];
+-+	size_t len = sizeof(buf);
+-+	enum hostapd_hw_mode hw_mode;
+-+	u8 channel;
+-+	int sec_chan = 0;
+-+	int ret;
+-+
+-+	if (!bss)
+-+		return -1;
+-+
+-+	if (bss->ht_param & HT_INFO_HT_PARAM_STA_CHNL_WIDTH) {
+-+		int sec = bss->ht_param & HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK;
+-+		if (sec == HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE)
+-+			sec_chan = 1;
+-+		else if (sec ==  HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW)
+-+			sec_chan = -1;
+-+	}
+-+
+-+	hw_mode = ieee80211_freq_to_chan(bss->freq, &channel);
+-+	if (asprintf(&cmd, "UPDATE channel=%d sec_chan=%d hw_mode=%d",
+-+		     channel, sec_chan, hw_mode) < 0)
+-+		return -1;
+-+
+-+	ret = wpa_ctrl_request(wpa_s->hostapd, cmd, os_strlen(cmd), buf, &len, NULL);
+-+	free(cmd);
+-+
+-+	if (ret < 0) {
+-+		wpa_printf(MSG_ERROR, "\nFailed to reload hostapd AP interfaces\n");
+-+		return -1;
+-+	}
+-+	return 0;
+-+}
+- 
+- #ifdef CONFIG_WEP
+- /* Configure default/group WEP keys for static WEP */
+-@@ -1026,6 +1074,8 @@ void wpa_supplicant_set_state(struct wpa
+- 
+- 		sme_sched_obss_scan(wpa_s, 1);
+- 
+-+		if (wpa_s->hostapd)
+-+			hostapd_reload(wpa_s, wpa_s->current_bss);
+- #if defined(CONFIG_FILS) && defined(IEEE8021X_EAPOL)
+- 		if (!fils_hlp_sent && ssid && ssid->eap.erp)
+- 			update_fils_connect_params = true;
+-@@ -1036,6 +1086,8 @@ void wpa_supplicant_set_state(struct wpa
+- #endif /* CONFIG_OWE */
+- 	} else if (state == WPA_DISCONNECTED || state == WPA_ASSOCIATING ||
+- 		   state == WPA_ASSOCIATED) {
+-+		if (wpa_s->hostapd)
+-+			hostapd_stop(wpa_s);
+- 		wpa_s->new_connection = 1;
+- 		wpa_drv_set_operstate(wpa_s, 0);
+- #ifndef IEEE8021X_EAPOL
+-@@ -2520,6 +2572,8 @@ void wpa_supplicant_associate(struct wpa
+- 			return;
+- 		}
+- 		wpa_s->current_bss = bss;
+-+		if (wpa_s->hostapd)
+-+			hostapd_reload(wpa_s, wpa_s->current_bss);
+- #else /* CONFIG_MESH */
+- 		wpa_msg(wpa_s, MSG_ERROR,
+- 			"mesh mode support not included in the build");
+-@@ -7010,6 +7064,16 @@ static int wpa_supplicant_init_iface(str
+- 			   sizeof(wpa_s->bridge_ifname));
+- 	}
+- 
+-+	if (iface->hostapd_ctrl) {
+-+		wpa_s->hostapd = wpa_ctrl_open(iface->hostapd_ctrl);
+-+		if (!wpa_s->hostapd) {
+-+			wpa_printf(MSG_ERROR, "\nFailed to connect to hostapd\n");
+-+			return -1;
+-+		}
+-+		if (hostapd_stop(wpa_s) < 0)
+-+			return -1;
+-+	}
+-+
+- 	/* RSNA Supplicant Key Management - INITIALIZE */
+- 	eapol_sm_notify_portEnabled(wpa_s->eapol, false);
+- 	eapol_sm_notify_portValid(wpa_s->eapol, false);
+-@@ -7352,6 +7416,11 @@ static void wpa_supplicant_deinit_iface(
+- 	if (terminate)
+- 		wpa_msg(wpa_s, MSG_INFO, WPA_EVENT_TERMINATING);
+- 
+-+	if (wpa_s->hostapd) {
+-+		wpa_ctrl_close(wpa_s->hostapd);
+-+		wpa_s->hostapd = NULL;
+-+	}
+-+
+- 	wpa_supplicant_ctrl_iface_deinit(wpa_s, wpa_s->ctrl_iface);
+- 	wpa_s->ctrl_iface = NULL;
+- 
+---- a/wpa_supplicant/wpa_supplicant_i.h
+-+++ b/wpa_supplicant/wpa_supplicant_i.h
+-@@ -106,6 +106,11 @@ struct wpa_interface {
+- 	const char *ifname;
+- 
+- 	/**
+-+	 * hostapd_ctrl - path to hostapd control socket for notification
+-+	 */
+-+	const char *hostapd_ctrl;
+-+
+-+	/**
+- 	 * bridge_ifname - Optional bridge interface name
+- 	 *
+- 	 * If the driver interface (ifname) is included in a Linux bridge
+-@@ -665,6 +670,8 @@ struct wpa_supplicant {
+- #endif /* CONFIG_CTRL_IFACE_BINDER */
+- 	char bridge_ifname[16];
+- 
+-+	struct wpa_ctrl *hostapd;
+-+
+- 	char *confname;
+- 	char *confanother;
+- 
+---- a/hostapd/ctrl_iface.c
+-+++ b/hostapd/ctrl_iface.c
+-@@ -2716,6 +2716,12 @@ static int hostapd_ctrl_iface_chan_switc
+- 		return 0;
+- 	}
+- 
+-+	if (os_strstr(pos, " auto-ht")) {
+-+		settings.freq_params.ht_enabled = iface->conf->ieee80211n;
+-+		settings.freq_params.vht_enabled = iface->conf->ieee80211ac;
+-+		settings.freq_params.he_enabled = iface->conf->ieee80211ax;
+-+	}
+-+
+- 	for (i = 0; i < iface->num_bss; i++) {
+- 
+- 		/* Save CHAN_SWITCH VHT, HE, and EHT config */
+---- a/src/ap/beacon.c
+-+++ b/src/ap/beacon.c
+-@@ -2052,11 +2052,6 @@ static int __ieee802_11_set_beacon(struc
+- 		return -1;
+- 	}
+- 
+--	if (hapd->csa_in_progress) {
+--		wpa_printf(MSG_ERROR, "Cannot set beacons during CSA period");
+--		return -1;
+--	}
+--
+- 	hapd->beacon_set_done = 1;
+- 
+- 	if (ieee802_11_build_ap_params(hapd, &params) < 0)
+---- a/wpa_supplicant/events.c
+-+++ b/wpa_supplicant/events.c
+-@@ -5237,6 +5237,60 @@ static void wpas_event_unprot_beacon(str
+- }
+- 
+- 
+-+static void
+-+supplicant_ch_switch_started(struct wpa_supplicant *wpa_s,
+-+			    union wpa_event_data *data)
+-+{
+-+	char buf[256];
+-+	size_t len = sizeof(buf);
+-+	char *cmd = NULL;
+-+	int width = 20;
+-+	int ret;
+-+
+-+	if (!wpa_s->hostapd)
+-+		return;
+-+
+-+	wpa_msg(wpa_s, MSG_INFO, WPA_EVENT_CHANNEL_SWITCH
+-+		"count=%d freq=%d ht_enabled=%d ch_offset=%d ch_width=%s cf1=%d cf2=%d",
+-+		data->ch_switch.count,
+-+		data->ch_switch.freq,
+-+		data->ch_switch.ht_enabled,
+-+		data->ch_switch.ch_offset,
+-+		channel_width_to_string(data->ch_switch.ch_width),
+-+		data->ch_switch.cf1,
+-+		data->ch_switch.cf2);
+-+
+-+	switch (data->ch_switch.ch_width) {
+-+	case CHAN_WIDTH_20_NOHT:
+-+	case CHAN_WIDTH_20:
+-+		width = 20;
+-+		break;
+-+	case CHAN_WIDTH_40:
+-+		width = 40;
+-+		break;
+-+	case CHAN_WIDTH_80:
+-+		width = 80;
+-+		break;
+-+	case CHAN_WIDTH_160:
+-+	case CHAN_WIDTH_80P80:
+-+		width = 160;
+-+		break;
+-+	}
+-+
+-+	asprintf(&cmd, "CHAN_SWITCH %d %d sec_channel_offset=%d center_freq1=%d center_freq2=%d, bandwidth=%d auto-ht\n",
+-+		data->ch_switch.count - 1,
+-+		data->ch_switch.freq,
+-+		data->ch_switch.ch_offset,
+-+		data->ch_switch.cf1,
+-+		data->ch_switch.cf2,
+-+		width);
+-+	ret = wpa_ctrl_request(wpa_s->hostapd, cmd, os_strlen(cmd), buf, &len, NULL);
+-+	free(cmd);
+-+
+-+	if (ret < 0)
+-+		wpa_printf(MSG_ERROR, "\nFailed to reload hostapd AP interfaces\n");
+-+}
+-+
+- void supplicant_event(void *ctx, enum wpa_event_type event,
+- 		      union wpa_event_data *data)
+- {
+-@@ -5586,8 +5640,10 @@ void supplicant_event(void *ctx, enum wp
+- 			channel_width_to_string(data->ch_switch.ch_width),
+- 			data->ch_switch.cf1,
+- 			data->ch_switch.cf2);
+--		if (event == EVENT_CH_SWITCH_STARTED)
+-+		if (event == EVENT_CH_SWITCH_STARTED) {
+-+			supplicant_ch_switch_started(wpa_s, data);
+- 			break;
+-+		}
+- 
+- 		wpa_s->assoc_freq = data->ch_switch.freq;
+- 		wpa_s->current_ssid->frequency = data->ch_switch.freq;
+---- a/src/drivers/driver.h
+-+++ b/src/drivers/driver.h
+-@@ -6324,6 +6324,7 @@ union wpa_event_data {
+- 
+- 	/**
+- 	 * struct ch_switch
+-+	 * @count: Count until channel switch activates
+- 	 * @freq: Frequency of new channel in MHz
+- 	 * @ht_enabled: Whether this is an HT channel
+- 	 * @ch_offset: Secondary channel offset
+-@@ -6334,6 +6335,7 @@ union wpa_event_data {
+- 	 * @punct_bitmap: Puncturing bitmap
+- 	 */
+- 	struct ch_switch {
+-+		int count;
+- 		int freq;
+- 		int ht_enabled;
+- 		int ch_offset;
+---- a/src/drivers/driver_nl80211_event.c
+-+++ b/src/drivers/driver_nl80211_event.c
+-@@ -997,6 +997,7 @@ static void mlme_event_ch_switch(struct
+- 				 struct nlattr *bw, struct nlattr *cf1,
+- 				 struct nlattr *cf2,
+- 				 struct nlattr *punct_bitmap,
+-+				 struct nlattr *count,
+- 				 int finished)
+- {
+- 	struct i802_bss *bss;
+-@@ -1060,6 +1061,8 @@ static void mlme_event_ch_switch(struct
+- 		data.ch_switch.cf1 = nla_get_u32(cf1);
+- 	if (cf2)
+- 		data.ch_switch.cf2 = nla_get_u32(cf2);
+-+	if (count)
+-+		data.ch_switch.count = nla_get_u32(count);
+- 
+- 	if (finished)
+- 		bss->flink->freq = data.ch_switch.freq;
+-@@ -3604,6 +3607,7 @@ static void do_process_drv_event(struct
+- 				     tb[NL80211_ATTR_CENTER_FREQ1],
+- 				     tb[NL80211_ATTR_CENTER_FREQ2],
+- 				     tb[NL80211_ATTR_PUNCT_BITMAP],
+-+				     tb[NL80211_ATTR_CH_SWITCH_COUNT],
+- 				     0);
+- 		break;
+- 	case NL80211_CMD_CH_SWITCH_NOTIFY:
+-@@ -3616,6 +3620,7 @@ static void do_process_drv_event(struct
+- 				     tb[NL80211_ATTR_CENTER_FREQ1],
+- 				     tb[NL80211_ATTR_CENTER_FREQ2],
+- 				     tb[NL80211_ATTR_PUNCT_BITMAP],
+-+				     NULL,
+- 				     1);
+- 		break;
+- 	case NL80211_CMD_DISCONNECT:
+diff --git a/package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch b/package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch
+deleted file mode 100644
+index b886ab7492..0000000000
+--- a/package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch
++++ /dev/null
+@@ -1,239 +0,0 @@
+---- a/hostapd/Makefile
+-+++ b/hostapd/Makefile
+-@@ -221,6 +221,9 @@ endif
+- ifdef CONFIG_NO_CTRL_IFACE
+- CFLAGS += -DCONFIG_NO_CTRL_IFACE
+- else
+-+ifdef CONFIG_CTRL_IFACE_MIB
+-+CFLAGS += -DCONFIG_CTRL_IFACE_MIB
+-+endif
+- ifeq ($(CONFIG_CTRL_IFACE), udp)
+- CFLAGS += -DCONFIG_CTRL_IFACE_UDP
+- else
+---- a/hostapd/ctrl_iface.c
+-+++ b/hostapd/ctrl_iface.c
+-@@ -3342,6 +3342,7 @@ static int hostapd_ctrl_iface_receive_pr
+- 						      reply_size);
+- 	} else if (os_strcmp(buf, "STATUS-DRIVER") == 0) {
+- 		reply_len = hostapd_drv_status(hapd, reply, reply_size);
+-+#ifdef CONFIG_CTRL_IFACE_MIB
+- 	} else if (os_strcmp(buf, "MIB") == 0) {
+- 		reply_len = ieee802_11_get_mib(hapd, reply, reply_size);
+- 		if (reply_len >= 0) {
+-@@ -3383,6 +3384,7 @@ static int hostapd_ctrl_iface_receive_pr
+- 	} else if (os_strncmp(buf, "STA-NEXT ", 9) == 0) {
+- 		reply_len = hostapd_ctrl_iface_sta_next(hapd, buf + 9, reply,
+- 							reply_size);
+-+#endif
+- 	} else if (os_strcmp(buf, "ATTACH") == 0) {
+- 		if (hostapd_ctrl_iface_attach(hapd, from, fromlen, NULL))
+- 			reply_len = -1;
+---- a/wpa_supplicant/Makefile
+-+++ b/wpa_supplicant/Makefile
+-@@ -985,6 +985,9 @@ ifdef CONFIG_FILS
+- OBJS += ../src/ap/fils_hlp.o
+- endif
+- ifdef CONFIG_CTRL_IFACE
+-+ifdef CONFIG_CTRL_IFACE_MIB
+-+CFLAGS += -DCONFIG_CTRL_IFACE_MIB
+-+endif
+- OBJS += ../src/ap/ctrl_iface_ap.o
+- endif
+- 
+---- a/wpa_supplicant/ctrl_iface.c
+-+++ b/wpa_supplicant/ctrl_iface.c
+-@@ -2326,7 +2326,7 @@ static int wpa_supplicant_ctrl_iface_sta
+- 			pos += ret;
+- 		}
+- 
+--#ifdef CONFIG_AP
+-+#if defined(CONFIG_AP) && defined(CONFIG_CTRL_IFACE_MIB)
+- 		if (wpa_s->ap_iface) {
+- 			pos += ap_ctrl_iface_wpa_get_status(wpa_s, pos,
+- 							    end - pos,
+-@@ -11964,6 +11964,7 @@ char * wpa_supplicant_ctrl_iface_process
+- 			reply_len = -1;
+- 	} else if (os_strncmp(buf, "NOTE ", 5) == 0) {
+- 		wpa_printf(MSG_INFO, "NOTE: %s", buf + 5);
+-+#ifdef CONFIG_CTRL_IFACE_MIB
+- 	} else if (os_strcmp(buf, "MIB") == 0) {
+- 		reply_len = wpa_sm_get_mib(wpa_s->wpa, reply, reply_size);
+- 		if (reply_len >= 0) {
+-@@ -11976,6 +11977,7 @@ char * wpa_supplicant_ctrl_iface_process
+- 				reply_size - reply_len);
+- #endif /* CONFIG_MACSEC */
+- 		}
+-+#endif
+- 	} else if (os_strncmp(buf, "STATUS", 6) == 0) {
+- 		reply_len = wpa_supplicant_ctrl_iface_status(
+- 			wpa_s, buf + 6, reply, reply_size);
+-@@ -12464,6 +12466,7 @@ char * wpa_supplicant_ctrl_iface_process
+- 		reply_len = wpa_supplicant_ctrl_iface_bss(
+- 			wpa_s, buf + 4, reply, reply_size);
+- #ifdef CONFIG_AP
+-+#ifdef CONFIG_CTRL_IFACE_MIB
+- 	} else if (os_strcmp(buf, "STA-FIRST") == 0) {
+- 		reply_len = ap_ctrl_iface_sta_first(wpa_s, reply, reply_size);
+- 	} else if (os_strncmp(buf, "STA ", 4) == 0) {
+-@@ -12472,12 +12475,15 @@ char * wpa_supplicant_ctrl_iface_process
+- 	} else if (os_strncmp(buf, "STA-NEXT ", 9) == 0) {
+- 		reply_len = ap_ctrl_iface_sta_next(wpa_s, buf + 9, reply,
+- 						   reply_size);
+-+#endif
+-+#ifdef CONFIG_CTRL_IFACE_MIB
+- 	} else if (os_strncmp(buf, "DEAUTHENTICATE ", 15) == 0) {
+- 		if (ap_ctrl_iface_sta_deauthenticate(wpa_s, buf + 15))
+- 			reply_len = -1;
+- 	} else if (os_strncmp(buf, "DISASSOCIATE ", 13) == 0) {
+- 		if (ap_ctrl_iface_sta_disassociate(wpa_s, buf + 13))
+- 			reply_len = -1;
+-+#endif
+- 	} else if (os_strncmp(buf, "CHAN_SWITCH ", 12) == 0) {
+- 		if (ap_ctrl_iface_chanswitch(wpa_s, buf + 12))
+- 			reply_len = -1;
+---- a/src/ap/ctrl_iface_ap.c
+-+++ b/src/ap/ctrl_iface_ap.c
+-@@ -26,6 +26,26 @@
+- #include "taxonomy.h"
+- #include "wnm_ap.h"
+- 
+-+static const char * hw_mode_str(enum hostapd_hw_mode mode)
+-+{
+-+	switch (mode) {
+-+	case HOSTAPD_MODE_IEEE80211B:
+-+		return "b";
+-+	case HOSTAPD_MODE_IEEE80211G:
+-+		return "g";
+-+	case HOSTAPD_MODE_IEEE80211A:
+-+		return "a";
+-+	case HOSTAPD_MODE_IEEE80211AD:
+-+		return "ad";
+-+	case HOSTAPD_MODE_IEEE80211ANY:
+-+		return "any";
+-+	case NUM_HOSTAPD_MODES:
+-+		return "invalid";
+-+	}
+-+	return "unknown";
+-+}
+-+
+-+#ifdef CONFIG_CTRL_IFACE_MIB
+- 
+- static size_t hostapd_write_ht_mcs_bitmask(char *buf, size_t buflen,
+- 					   size_t curr_len, const u8 *mcs_set)
+-@@ -212,26 +232,6 @@ static const char * timeout_next_str(int
+- }
+- 
+- 
+--static const char * hw_mode_str(enum hostapd_hw_mode mode)
+--{
+--	switch (mode) {
+--	case HOSTAPD_MODE_IEEE80211B:
+--		return "b";
+--	case HOSTAPD_MODE_IEEE80211G:
+--		return "g";
+--	case HOSTAPD_MODE_IEEE80211A:
+--		return "a";
+--	case HOSTAPD_MODE_IEEE80211AD:
+--		return "ad";
+--	case HOSTAPD_MODE_IEEE80211ANY:
+--		return "any";
+--	case NUM_HOSTAPD_MODES:
+--		return "invalid";
+--	}
+--	return "unknown";
+--}
+--
+--
+- static int hostapd_ctrl_iface_sta_mib(struct hostapd_data *hapd,
+- 				      struct sta_info *sta,
+- 				      char *buf, size_t buflen)
+-@@ -493,6 +493,7 @@ int hostapd_ctrl_iface_sta_next(struct h
+- 	return hostapd_ctrl_iface_sta_mib(hapd, sta->next, buf, buflen);
+- }
+- 
+-+#endif
+- 
+- #ifdef CONFIG_P2P_MANAGER
+- static int p2p_manager_disconnect(struct hostapd_data *hapd, u16 stype,
+-@@ -884,12 +885,12 @@ int hostapd_ctrl_iface_status(struct hos
+- 			return len;
+- 		len += ret;
+- 	}
+--
+-+#ifdef CONFIG_CTRL_IFACE_MIB
+- 	if (iface->conf->ieee80211n && !hapd->conf->disable_11n && mode) {
+- 		len = hostapd_write_ht_mcs_bitmask(buf, buflen, len,
+- 						   mode->mcs_set);
+- 	}
+--
+-+#endif /* CONFIG_CTRL_IFACE_MIB */
+- 	if (iface->current_rates && iface->num_rates) {
+- 		ret = os_snprintf(buf + len, buflen - len, "supported_rates=");
+- 		if (os_snprintf_error(buflen - len, ret))
+---- a/src/ap/ieee802_1x.c
+-+++ b/src/ap/ieee802_1x.c
+-@@ -2753,6 +2753,7 @@ static const char * bool_txt(bool val)
+- 	return val ? "TRUE" : "FALSE";
+- }
+- 
+-+#ifdef CONFIG_CTRL_IFACE_MIB
+- 
+- int ieee802_1x_get_mib(struct hostapd_data *hapd, char *buf, size_t buflen)
+- {
+-@@ -2939,6 +2940,7 @@ int ieee802_1x_get_mib_sta(struct hostap
+- 	return len;
+- }
+- 
+-+#endif
+- 
+- #ifdef CONFIG_HS20
+- static void ieee802_1x_wnm_notif_send(void *eloop_ctx, void *timeout_ctx)
+---- a/src/ap/wpa_auth.c
+-+++ b/src/ap/wpa_auth.c
+-@@ -4786,6 +4786,7 @@ static const char * wpa_bool_txt(int val
+- 	return val ? "TRUE" : "FALSE";
+- }
+- 
+-+#ifdef CONFIG_CTRL_IFACE_MIB
+- 
+- #define RSN_SUITE "%02x-%02x-%02x-%d"
+- #define RSN_SUITE_ARG(s) \
+-@@ -4938,7 +4939,7 @@ int wpa_get_mib_sta(struct wpa_state_mac
+- 
+- 	return len;
+- }
+--
+-+#endif
+- 
+- void wpa_auth_countermeasures_start(struct wpa_authenticator *wpa_auth)
+- {
+---- a/src/rsn_supp/wpa.c
+-+++ b/src/rsn_supp/wpa.c
+-@@ -3834,6 +3834,8 @@ static u32 wpa_key_mgmt_suite(struct wpa
+- }
+- 
+- 
+-+#ifdef CONFIG_CTRL_IFACE_MIB
+-+
+- #define RSN_SUITE "%02x-%02x-%02x-%d"
+- #define RSN_SUITE_ARG(s) \
+- ((s) >> 24) & 0xff, ((s) >> 16) & 0xff, ((s) >> 8) & 0xff, (s) & 0xff
+-@@ -3915,6 +3917,7 @@ int wpa_sm_get_mib(struct wpa_sm *sm, ch
+- 
+- 	return (int) len;
+- }
+-+#endif
+- #endif /* CONFIG_CTRL_IFACE */
+- 
+- 
+---- a/wpa_supplicant/ap.c
+-+++ b/wpa_supplicant/ap.c
+-@@ -1499,7 +1499,7 @@ int wpas_ap_wps_nfc_report_handover(stru
+- #endif /* CONFIG_WPS */
+- 
+- 
+--#ifdef CONFIG_CTRL_IFACE
+-+#if defined(CONFIG_CTRL_IFACE) && defined(CONFIG_CTRL_IFACE_MIB)
+- 
+- int ap_ctrl_iface_sta_first(struct wpa_supplicant *wpa_s,
+- 			    char *buf, size_t buflen)
+diff --git a/package/network/services/hostapd/patches/381-hostapd_cli_UNKNOWN-COMMAND.patch b/package/network/services/hostapd/patches/381-hostapd_cli_UNKNOWN-COMMAND.patch
+deleted file mode 100644
+index e9083f6ecc..0000000000
+--- a/package/network/services/hostapd/patches/381-hostapd_cli_UNKNOWN-COMMAND.patch
++++ /dev/null
+@@ -1,11 +0,0 @@
+---- a/hostapd/hostapd_cli.c
+-+++ b/hostapd/hostapd_cli.c
+-@@ -757,7 +757,7 @@ static int wpa_ctrl_command_sta(struct w
+- 	}
+- 
+- 	buf[len] = '\0';
+--	if (memcmp(buf, "FAIL", 4) == 0)
+-+	if (memcmp(buf, "FAIL", 4) == 0 || memcmp(buf, "UNKNOWN COMMAND", 15) == 0)
+- 		return -1;
+- 	if (print)
+- 		printf("%s", buf);
+diff --git a/package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch b/package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch
+deleted file mode 100644
+index 40c39ff29c..0000000000
+--- a/package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch
++++ /dev/null
+@@ -1,56 +0,0 @@
+---- a/src/common/wpa_common.c
+-+++ b/src/common/wpa_common.c
+-@@ -2719,6 +2719,31 @@ u32 wpa_akm_to_suite(int akm)
+- }
+- 
+- 
+-+static void wpa_fixup_wpa_ie_rsn(u8 *assoc_ie, const u8 *wpa_msg_ie,
+-+				 size_t rsn_ie_len)
+-+{
+-+	int pos, count;
+-+
+-+	pos = sizeof(struct rsn_ie_hdr) + RSN_SELECTOR_LEN;
+-+	if (rsn_ie_len < pos + 2)
+-+		return;
+-+
+-+	count = WPA_GET_LE16(wpa_msg_ie + pos);
+-+	pos += 2 + count * RSN_SELECTOR_LEN;
+-+	if (rsn_ie_len < pos + 2)
+-+		return;
+-+
+-+	count = WPA_GET_LE16(wpa_msg_ie + pos);
+-+	pos += 2 + count * RSN_SELECTOR_LEN;
+-+	if (rsn_ie_len < pos + 2)
+-+		return;
+-+
+-+	if (!assoc_ie[pos] && !assoc_ie[pos + 1] &&
+-+	    (wpa_msg_ie[pos] || wpa_msg_ie[pos + 1]))
+-+		memcpy(&assoc_ie[pos], &wpa_msg_ie[pos], 2);
+-+}
+-+
+-+
+- int wpa_compare_rsn_ie(int ft_initial_assoc,
+- 		       const u8 *ie1, size_t ie1len,
+- 		       const u8 *ie2, size_t ie2len)
+-@@ -2726,8 +2751,19 @@ int wpa_compare_rsn_ie(int ft_initial_as
+- 	if (ie1 == NULL || ie2 == NULL)
+- 		return -1;
+- 
+--	if (ie1len == ie2len && os_memcmp(ie1, ie2, ie1len) == 0)
+--		return 0; /* identical IEs */
+-+	if (ie1len == ie2len) {
+-+		u8 *ie_tmp;
+-+
+-+		if (os_memcmp(ie1, ie2, ie1len) == 0)
+-+			return 0; /* identical IEs */
+-+
+-+		ie_tmp = alloca(ie1len);
+-+		memcpy(ie_tmp, ie1, ie1len);
+-+		wpa_fixup_wpa_ie_rsn(ie_tmp, ie2, ie1len);
+-+
+-+		if (os_memcmp(ie_tmp, ie2, ie1len) == 0)
+-+			return 0; /* only mismatch in RSN capabilties */
+-+	}
+- 
+- #ifdef CONFIG_IEEE80211R
+- 	if (ft_initial_assoc) {
+diff --git a/package/network/services/hostapd/patches/400-wps_single_auth_enc_type.patch b/package/network/services/hostapd/patches/400-wps_single_auth_enc_type.patch
+deleted file mode 100644
+index edcd985257..0000000000
+--- a/package/network/services/hostapd/patches/400-wps_single_auth_enc_type.patch
++++ /dev/null
+@@ -1,23 +0,0 @@
+---- a/src/ap/wps_hostapd.c
+-+++ b/src/ap/wps_hostapd.c
+-@@ -394,9 +394,8 @@ static int hapd_wps_reconfig_in_memory(s
+- 				bss->wpa_pairwise |= WPA_CIPHER_GCMP;
+- 			else
+- 				bss->wpa_pairwise |= WPA_CIPHER_CCMP;
+--		}
+- #ifndef CONFIG_NO_TKIP
+--		if (cred->encr_type & WPS_ENCR_TKIP)
+-+		} else if (cred->encr_type & WPS_ENCR_TKIP)
+- 			bss->wpa_pairwise |= WPA_CIPHER_TKIP;
+- #endif /* CONFIG_NO_TKIP */
+- 		bss->rsn_pairwise = bss->wpa_pairwise;
+-@@ -1181,8 +1180,7 @@ int hostapd_init_wps(struct hostapd_data
+- 					  WPA_CIPHER_GCMP_256)) {
+- 			wps->encr_types |= WPS_ENCR_AES;
+- 			wps->encr_types_rsn |= WPS_ENCR_AES;
+--		}
+--		if (conf->rsn_pairwise & WPA_CIPHER_TKIP) {
+-+		} else if (conf->rsn_pairwise & WPA_CIPHER_TKIP) {
+- #ifdef CONFIG_NO_TKIP
+- 			wpa_printf(MSG_INFO, "WPS: TKIP not supported");
+- 			goto fail;
+diff --git a/package/network/services/hostapd/patches/410-limit_debug_messages.patch b/package/network/services/hostapd/patches/410-limit_debug_messages.patch
+deleted file mode 100644
+index 48a5589200..0000000000
+--- a/package/network/services/hostapd/patches/410-limit_debug_messages.patch
++++ /dev/null
+@@ -1,210 +0,0 @@
+---- a/src/utils/wpa_debug.c
+-+++ b/src/utils/wpa_debug.c
+-@@ -206,7 +206,7 @@ void wpa_debug_close_linux_tracing(void)
+-  *
+-  * Note: New line '\n' is added to the end of the text when printing to stdout.
+-  */
+--void wpa_printf(int level, const char *fmt, ...)
+-+void _wpa_printf(int level, const char *fmt, ...)
+- {
+- 	va_list ap;
+- 
+-@@ -255,7 +255,7 @@ void wpa_printf(int level, const char *f
+- }
+- 
+- 
+--static void _wpa_hexdump(int level, const char *title, const u8 *buf,
+-+void _wpa_hexdump(int level, const char *title, const u8 *buf,
+- 			 size_t len, int show, int only_syslog)
+- {
+- 	size_t i;
+-@@ -382,19 +382,7 @@ static void _wpa_hexdump(int level, cons
+- #endif /* CONFIG_ANDROID_LOG */
+- }
+- 
+--void wpa_hexdump(int level, const char *title, const void *buf, size_t len)
+--{
+--	_wpa_hexdump(level, title, buf, len, 1, 0);
+--}
+--
+--
+--void wpa_hexdump_key(int level, const char *title, const void *buf, size_t len)
+--{
+--	_wpa_hexdump(level, title, buf, len, wpa_debug_show_keys, 0);
+--}
+--
+--
+--static void _wpa_hexdump_ascii(int level, const char *title, const void *buf,
+-+void _wpa_hexdump_ascii(int level, const char *title, const void *buf,
+- 			       size_t len, int show)
+- {
+- 	size_t i, llen;
+-@@ -507,20 +495,6 @@ file_done:
+- }
+- 
+- 
+--void wpa_hexdump_ascii(int level, const char *title, const void *buf,
+--		       size_t len)
+--{
+--	_wpa_hexdump_ascii(level, title, buf, len, 1);
+--}
+--
+--
+--void wpa_hexdump_ascii_key(int level, const char *title, const void *buf,
+--			   size_t len)
+--{
+--	_wpa_hexdump_ascii(level, title, buf, len, wpa_debug_show_keys);
+--}
+--
+--
+- #ifdef CONFIG_DEBUG_FILE
+- static char *last_path = NULL;
+- #endif /* CONFIG_DEBUG_FILE */
+-@@ -644,7 +618,7 @@ void wpa_msg_register_ifname_cb(wpa_msg_
+- }
+- 
+- 
+--void wpa_msg(void *ctx, int level, const char *fmt, ...)
+-+void _wpa_msg(void *ctx, int level, const char *fmt, ...)
+- {
+- 	va_list ap;
+- 	char *buf;
+-@@ -682,7 +656,7 @@ void wpa_msg(void *ctx, int level, const
+- }
+- 
+- 
+--void wpa_msg_ctrl(void *ctx, int level, const char *fmt, ...)
+-+void _wpa_msg_ctrl(void *ctx, int level, const char *fmt, ...)
+- {
+- 	va_list ap;
+- 	char *buf;
+---- a/src/utils/wpa_debug.h
+-+++ b/src/utils/wpa_debug.h
+-@@ -51,6 +51,17 @@ void wpa_debug_close_file(void);
+- void wpa_debug_setup_stdout(void);
+- void wpa_debug_stop_log(void);
+- 
+-+/* internal */
+-+void _wpa_hexdump(int level, const char *title, const u8 *buf,
+-+		  size_t len, int show, int only_syslog);
+-+void _wpa_hexdump_ascii(int level, const char *title, const void *buf,
+-+			size_t len, int show);
+-+extern int wpa_debug_show_keys;
+-+
+-+#ifndef CONFIG_MSG_MIN_PRIORITY
+-+#define CONFIG_MSG_MIN_PRIORITY 0
+-+#endif
+-+
+- /**
+-  * wpa_debug_printf_timestamp - Print timestamp for debug output
+-  *
+-@@ -71,9 +82,15 @@ void wpa_debug_print_timestamp(void);
+-  *
+-  * Note: New line '\n' is added to the end of the text when printing to stdout.
+-  */
+--void wpa_printf(int level, const char *fmt, ...)
+-+void _wpa_printf(int level, const char *fmt, ...)
+- PRINTF_FORMAT(2, 3);
+- 
+-+#define wpa_printf(level, ...)						\
+-+	do {								\
+-+		if (level >= CONFIG_MSG_MIN_PRIORITY)			\
+-+			_wpa_printf(level, __VA_ARGS__);		\
+-+	} while(0)
+-+
+- /**
+-  * wpa_hexdump - conditional hex dump
+-  * @level: priority level (MSG_*) of the message
+-@@ -85,7 +102,13 @@ PRINTF_FORMAT(2, 3);
+-  * output may be directed to stdout, stderr, and/or syslog based on
+-  * configuration. The contents of buf is printed out has hex dump.
+-  */
+--void wpa_hexdump(int level, const char *title, const void *buf, size_t len);
+-+static inline void wpa_hexdump(int level, const char *title, const void *buf, size_t len)
+-+{
+-+	if (level < CONFIG_MSG_MIN_PRIORITY)
+-+		return;
+-+
+-+	_wpa_hexdump(level, title, buf, len, 1, 1);
+-+}
+- 
+- static inline void wpa_hexdump_buf(int level, const char *title,
+- 				   const struct wpabuf *buf)
+-@@ -107,7 +130,13 @@ static inline void wpa_hexdump_buf(int l
+-  * like wpa_hexdump(), but by default, does not include secret keys (passwords,
+-  * etc.) in debug output.
+-  */
+--void wpa_hexdump_key(int level, const char *title, const void *buf, size_t len);
+-+static inline void wpa_hexdump_key(int level, const char *title, const u8 *buf, size_t len)
+-+{
+-+	if (level < CONFIG_MSG_MIN_PRIORITY)
+-+		return;
+-+
+-+	_wpa_hexdump(level, title, buf, len, wpa_debug_show_keys, 1);
+-+}
+- 
+- static inline void wpa_hexdump_buf_key(int level, const char *title,
+- 				       const struct wpabuf *buf)
+-@@ -129,8 +158,14 @@ static inline void wpa_hexdump_buf_key(i
+-  * the hex numbers and ASCII characters (for printable range) are shown. 16
+-  * bytes per line will be shown.
+-  */
+--void wpa_hexdump_ascii(int level, const char *title, const void *buf,
+--		       size_t len);
+-+static inline void wpa_hexdump_ascii(int level, const char *title,
+-+				     const u8 *buf, size_t len)
+-+{
+-+	if (level < CONFIG_MSG_MIN_PRIORITY)
+-+		return;
+-+
+-+	_wpa_hexdump_ascii(level, title, buf, len, 1);
+-+}
+- 
+- /**
+-  * wpa_hexdump_ascii_key - conditional hex dump, hide keys
+-@@ -146,8 +181,14 @@ void wpa_hexdump_ascii(int level, const
+-  * bytes per line will be shown. This works like wpa_hexdump_ascii(), but by
+-  * default, does not include secret keys (passwords, etc.) in debug output.
+-  */
+--void wpa_hexdump_ascii_key(int level, const char *title, const void *buf,
+--			   size_t len);
+-+static inline void wpa_hexdump_ascii_key(int level, const char *title,
+-+					 const u8 *buf, size_t len)
+-+{
+-+	if (level < CONFIG_MSG_MIN_PRIORITY)
+-+		return;
+-+
+-+	_wpa_hexdump_ascii(level, title, buf, len, wpa_debug_show_keys);
+-+}
+- 
+- /*
+-  * wpa_dbg() behaves like wpa_msg(), but it can be removed from build to reduce
+-@@ -184,7 +225,12 @@ void wpa_hexdump_ascii_key(int level, co
+-  *
+-  * Note: New line '\n' is added to the end of the text when printing to stdout.
+-  */
+--void wpa_msg(void *ctx, int level, const char *fmt, ...) PRINTF_FORMAT(3, 4);
+-+void _wpa_msg(void *ctx, int level, const char *fmt, ...) PRINTF_FORMAT(3, 4);
+-+#define wpa_msg(ctx, level, ...)					\
+-+	do {								\
+-+		if (level >= CONFIG_MSG_MIN_PRIORITY)			\
+-+			_wpa_msg(ctx, level, __VA_ARGS__);		\
+-+	} while(0)
+- 
+- /**
+-  * wpa_msg_ctrl - Conditional printf for ctrl_iface monitors
+-@@ -198,8 +244,13 @@ void wpa_msg(void *ctx, int level, const
+-  * attached ctrl_iface monitors. In other words, it can be used for frequent
+-  * events that do not need to be sent to syslog.
+-  */
+--void wpa_msg_ctrl(void *ctx, int level, const char *fmt, ...)
+-+void _wpa_msg_ctrl(void *ctx, int level, const char *fmt, ...)
+- PRINTF_FORMAT(3, 4);
+-+#define wpa_msg_ctrl(ctx, level, ...)					\
+-+	do {								\
+-+		if (level >= CONFIG_MSG_MIN_PRIORITY)			\
+-+			_wpa_msg_ctrl(ctx, level, __VA_ARGS__);		\
+-+	} while(0)
+- 
+- /**
+-  * wpa_msg_global - Global printf for ctrl_iface monitors
+diff --git a/package/network/services/hostapd/patches/420-indicate-features.patch b/package/network/services/hostapd/patches/420-indicate-features.patch
+deleted file mode 100644
+index 356d5f8c68..0000000000
+--- a/package/network/services/hostapd/patches/420-indicate-features.patch
++++ /dev/null
+@@ -1,63 +0,0 @@
+---- a/hostapd/main.c
+-+++ b/hostapd/main.c
+-@@ -31,7 +31,7 @@
+- #include "config_file.h"
+- #include "eap_register.h"
+- #include "ctrl_iface.h"
+--
+-+#include "build_features.h"
+- 
+- struct hapd_global {
+- 	void **drv_priv;
+-@@ -696,7 +696,7 @@ int main(int argc, char *argv[])
+- 	wpa_supplicant_event = hostapd_wpa_event;
+- 	wpa_supplicant_event_global = hostapd_wpa_event_global;
+- 	for (;;) {
+--		c = getopt(argc, argv, "b:Bde:f:hi:KP:sSTtu:vg:G:q");
+-+		c = getopt(argc, argv, "b:Bde:f:hi:KP:sSTtu:g:G:qv::");
+- 		if (c < 0)
+- 			break;
+- 		switch (c) {
+-@@ -733,6 +733,8 @@ int main(int argc, char *argv[])
+- 			break;
+- #endif /* CONFIG_DEBUG_LINUX_TRACING */
+- 		case 'v':
+-+			if (optarg)
+-+				exit(!has_feature(optarg));
+- 			show_version();
+- 			exit(1);
+- 		case 'g':
+---- a/wpa_supplicant/main.c
+-+++ b/wpa_supplicant/main.c
+-@@ -12,6 +12,7 @@
+- #endif /* __linux__ */
+- 
+- #include "common.h"
+-+#include "build_features.h"
+- #include "crypto/crypto.h"
+- #include "fst/fst.h"
+- #include "wpa_supplicant_i.h"
+-@@ -203,7 +204,7 @@ int main(int argc, char *argv[])
+- 
+- 	for (;;) {
+- 		c = getopt(argc, argv,
+--			   "b:Bc:C:D:de:f:g:G:hH:i:I:KLMm:No:O:p:P:qsTtuvW");
+-+			   "b:Bc:C:D:de:f:g:G:hH:i:I:KLMm:No:O:p:P:qsTtuv::W");
+- 		if (c < 0)
+- 			break;
+- 		switch (c) {
+-@@ -306,8 +307,12 @@ int main(int argc, char *argv[])
+- 			break;
+- #endif /* CONFIG_CTRL_IFACE_DBUS_NEW */
+- 		case 'v':
+--			printf("%s\n", wpa_supplicant_version);
+--			exitcode = 0;
+-+			if (optarg) {
+-+				exitcode = !has_feature(optarg);
+-+			} else {
+-+				printf("%s\n", wpa_supplicant_version);
+-+				exitcode = 0;
+-+			}
+- 			goto out;
+- 		case 'W':
+- 			params.wait_for_monitor++;
+diff --git a/package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch b/package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch
+deleted file mode 100644
+index a21f0bf7ce..0000000000
+--- a/package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch
++++ /dev/null
+@@ -1,56 +0,0 @@
+---- a/hostapd/hostapd_cli.c
+-+++ b/hostapd/hostapd_cli.c
+-@@ -401,7 +401,6 @@ static int hostapd_cli_cmd_disassociate(
+- }
+- 
+- 
+--#ifdef CONFIG_TAXONOMY
+- static int hostapd_cli_cmd_signature(struct wpa_ctrl *ctrl, int argc,
+- 				     char *argv[])
+- {
+-@@ -414,7 +413,6 @@ static int hostapd_cli_cmd_signature(str
+- 	os_snprintf(buf, sizeof(buf), "SIGNATURE %s", argv[0]);
+- 	return wpa_ctrl_command(ctrl, buf);
+- }
+--#endif /* CONFIG_TAXONOMY */
+- 
+- 
+- static int hostapd_cli_cmd_sa_query(struct wpa_ctrl *ctrl, int argc,
+-@@ -431,7 +429,6 @@ static int hostapd_cli_cmd_sa_query(stru
+- }
+- 
+- 
+--#ifdef CONFIG_WPS
+- static int hostapd_cli_cmd_wps_pin(struct wpa_ctrl *ctrl, int argc,
+- 				   char *argv[])
+- {
+-@@ -657,7 +654,6 @@ static int hostapd_cli_cmd_wps_config(st
+- 			 ssid_hex, argv[1]);
+- 	return wpa_ctrl_command(ctrl, buf);
+- }
+--#endif /* CONFIG_WPS */
+- 
+- 
+- static int hostapd_cli_cmd_disassoc_imminent(struct wpa_ctrl *ctrl, int argc,
+-@@ -1610,13 +1606,10 @@ static const struct hostapd_cli_cmd host
+- 	{ "disassociate", hostapd_cli_cmd_disassociate,
+- 	  hostapd_complete_stations,
+- 	  "<addr> = disassociate a station" },
+--#ifdef CONFIG_TAXONOMY
+- 	{ "signature", hostapd_cli_cmd_signature, hostapd_complete_stations,
+- 	  "<addr> = get taxonomy signature for a station" },
+--#endif /* CONFIG_TAXONOMY */
+- 	{ "sa_query", hostapd_cli_cmd_sa_query, hostapd_complete_stations,
+- 	  "<addr> = send SA Query to a station" },
+--#ifdef CONFIG_WPS
+- 	{ "wps_pin", hostapd_cli_cmd_wps_pin, NULL,
+- 	  "<uuid> <pin> [timeout] [addr] = add WPS Enrollee PIN" },
+- 	{ "wps_check_pin", hostapd_cli_cmd_wps_check_pin, NULL,
+-@@ -1641,7 +1634,6 @@ static const struct hostapd_cli_cmd host
+- 	  "<SSID> <auth> <encr> <key> = configure AP" },
+- 	{ "wps_get_status", hostapd_cli_cmd_wps_get_status, NULL,
+- 	  "= show current WPS status" },
+--#endif /* CONFIG_WPS */
+- 	{ "disassoc_imminent", hostapd_cli_cmd_disassoc_imminent, NULL,
+- 	  "= send Disassociation Imminent notification" },
+- 	{ "ess_disassoc", hostapd_cli_cmd_ess_disassoc, NULL,
+diff --git a/package/network/services/hostapd/patches/431-wpa_cli_ifdef.patch b/package/network/services/hostapd/patches/431-wpa_cli_ifdef.patch
+deleted file mode 100644
+index 65c31c567f..0000000000
+--- a/package/network/services/hostapd/patches/431-wpa_cli_ifdef.patch
++++ /dev/null
+@@ -1,18 +0,0 @@
+---- a/wpa_supplicant/wpa_cli.c
+-+++ b/wpa_supplicant/wpa_cli.c
+-@@ -26,6 +26,15 @@
+- #include <cutils/properties.h>
+- #endif /* ANDROID */
+- 
+-+#ifndef CONFIG_P2P
+-+#define CONFIG_P2P
+-+#endif
+-+#ifndef CONFIG_AP
+-+#define CONFIG_AP
+-+#endif
+-+#ifndef CONFIG_MESH
+-+#define CONFIG_MESH
+-+#endif
+- 
+- static const char *const wpa_cli_version =
+- "wpa_cli v" VERSION_STR "\n"
+diff --git a/package/network/services/hostapd/patches/432-missing-typedef.patch b/package/network/services/hostapd/patches/432-missing-typedef.patch
+deleted file mode 100644
+index 7a100f1a0d..0000000000
+--- a/package/network/services/hostapd/patches/432-missing-typedef.patch
++++ /dev/null
+@@ -1,10 +0,0 @@
+---- a/src/drivers/linux_wext.h
+-+++ b/src/drivers/linux_wext.h
+-@@ -26,6 +26,7 @@ typedef int32_t __s32;
+- typedef uint16_t __u16;
+- typedef int16_t __s16;
+- typedef uint8_t __u8;
+-+typedef int8_t __s8;
+- #ifndef __user
+- #define __user
+- #endif /* __user */
+diff --git a/package/network/services/hostapd/patches/450-scan_wait.patch b/package/network/services/hostapd/patches/450-scan_wait.patch
+deleted file mode 100644
+index e265d1ac7c..0000000000
+--- a/package/network/services/hostapd/patches/450-scan_wait.patch
++++ /dev/null
+@@ -1,73 +0,0 @@
+---- a/hostapd/main.c
+-+++ b/hostapd/main.c
+-@@ -39,6 +39,8 @@ struct hapd_global {
+- };
+- 
+- static struct hapd_global global;
+-+static int daemonize = 0;
+-+static char *pid_file = NULL;
+- 
+- 
+- #ifndef CONFIG_NO_HOSTAPD_LOGGER
+-@@ -146,6 +148,14 @@ static void hostapd_logger_cb(void *ctx,
+- }
+- #endif /* CONFIG_NO_HOSTAPD_LOGGER */
+- 
+-+static void hostapd_setup_complete_cb(void *ctx)
+-+{
+-+	if (daemonize && os_daemonize(pid_file)) {
+-+		perror("daemon");
+-+		return;
+-+	}
+-+	daemonize = 0;
+-+}
+- 
+- /**
+-  * hostapd_driver_init - Preparate driver interface
+-@@ -164,6 +174,8 @@ static int hostapd_driver_init(struct ho
+- 		return -1;
+- 	}
+- 
+-+	hapd->setup_complete_cb = hostapd_setup_complete_cb;
+-+
+- 	/* Initialize the driver interface */
+- 	if (!(b[0] | b[1] | b[2] | b[3] | b[4] | b[5]))
+- 		b = NULL;
+-@@ -407,8 +419,6 @@ static void hostapd_global_deinit(const
+- #endif /* CONFIG_NATIVE_WINDOWS */
+- 
+- 	eap_server_unregister_methods();
+--
+--	os_daemonize_terminate(pid_file);
+- }
+- 
+- 
+-@@ -434,18 +444,6 @@ static int hostapd_global_run(struct hap
+- 	}
+- #endif /* EAP_SERVER_TNC */
+- 
+--	if (daemonize) {
+--		if (os_daemonize(pid_file)) {
+--			wpa_printf(MSG_ERROR, "daemon: %s", strerror(errno));
+--			return -1;
+--		}
+--		if (eloop_sock_requeue()) {
+--			wpa_printf(MSG_ERROR, "eloop_sock_requeue: %s",
+--				   strerror(errno));
+--			return -1;
+--		}
+--	}
+--
+- 	eloop_run();
+- 
+- 	return 0;
+-@@ -649,8 +647,7 @@ int main(int argc, char *argv[])
+- 	struct hapd_interfaces interfaces;
+- 	int ret = 1;
+- 	size_t i, j;
+--	int c, debug = 0, daemonize = 0;
+--	char *pid_file = NULL;
+-+	int c, debug = 0;
+- 	const char *log_file = NULL;
+- 	const char *entropy_file = NULL;
+- 	char **bss_config = NULL, **tmp_bss;
+diff --git a/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch b/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch
+deleted file mode 100644
+index 8098777459..0000000000
+--- a/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch
++++ /dev/null
+@@ -1,189 +0,0 @@
+-From 4bb69d15477e0f2b00e166845341dc933de47c58 Mon Sep 17 00:00:00 2001
+-From: Antonio Quartulli <ordex@autistici.org>
+-Date: Sun, 3 Jun 2012 18:22:56 +0200
+-Subject: [PATCHv2 601/602] wpa_supplicant: add new config params to be used
+- with the ibss join command
+-
+-Signed-hostap: Antonio Quartulli <ordex@autistici.org>
+----
+- src/drivers/driver.h            |    6 +++
+- wpa_supplicant/config.c         |   96 +++++++++++++++++++++++++++++++++++++++
+- wpa_supplicant/config_ssid.h    |    6 +++
+- wpa_supplicant/wpa_supplicant.c |   23 +++++++---
+- 4 files changed, 124 insertions(+), 7 deletions(-)
+-
+---- a/src/drivers/driver.h
+-+++ b/src/drivers/driver.h
+-@@ -19,6 +19,7 @@
+- 
+- #define WPA_SUPPLICANT_DRIVER_VERSION 4
+- 
+-+#include "ap/sta_info.h"
+- #include "common/defs.h"
+- #include "common/ieee802_11_defs.h"
+- #include "common/wpa_common.h"
+-@@ -936,6 +937,9 @@ struct wpa_driver_associate_params {
+- 	 * responsible for selecting with which BSS to associate. */
+- 	const u8 *bssid;
+- 
+-+	unsigned char rates[WLAN_SUPP_RATES_MAX];
+-+	int mcast_rate;
+-+
+- 	/**
+- 	 * bssid_hint - BSSID of a proposed AP
+- 	 *
+---- a/wpa_supplicant/config.c
+-+++ b/wpa_supplicant/config.c
+-@@ -18,6 +18,7 @@
+- #include "eap_peer/eap.h"
+- #include "p2p/p2p.h"
+- #include "fst/fst.h"
+-+#include "ap/sta_info.h"
+- #include "config.h"
+- 
+- 
+-@@ -2389,6 +2390,97 @@ static char * wpa_config_write_mac_value
+- #endif /* NO_CONFIG_WRITE */
+- 
+- 
+-+static int wpa_config_parse_mcast_rate(const struct parse_data *data,
+-+				       struct wpa_ssid *ssid, int line,
+-+				       const char *value)
+-+{
+-+	ssid->mcast_rate = (int)(strtod(value, NULL) * 10);
+-+
+-+	return 0;
+-+}
+-+
+-+#ifndef NO_CONFIG_WRITE
+-+static char * wpa_config_write_mcast_rate(const struct parse_data *data,
+-+					  struct wpa_ssid *ssid)
+-+{
+-+	char *value;
+-+	int res;
+-+
+-+	if (!ssid->mcast_rate == 0)
+-+		return NULL;
+-+
+-+	value = os_malloc(6); /* longest: 300.0 */
+-+	if (value == NULL)
+-+		return NULL;
+-+	res = os_snprintf(value, 5, "%.1f", (double)ssid->mcast_rate / 10);
+-+	if (res < 0) {
+-+		os_free(value);
+-+		return NULL;
+-+	}
+-+	return value;
+-+}
+-+#endif /* NO_CONFIG_WRITE */
+-+
+-+static int wpa_config_parse_rates(const struct parse_data *data,
+-+				  struct wpa_ssid *ssid, int line,
+-+				  const char *value)
+-+{
+-+	int i;
+-+	char *pos, *r, *sptr, *end;
+-+	double rate;
+-+
+-+	pos = (char *)value;
+-+	r = strtok_r(pos, ",", &sptr);
+-+	i = 0;
+-+	while (pos && i < WLAN_SUPP_RATES_MAX) {
+-+		rate = 0.0;
+-+		if (r)
+-+			rate = strtod(r, &end);
+-+		ssid->rates[i] = rate * 2;
+-+		if (*end != '\0' || rate * 2 != ssid->rates[i])
+-+			return 1;
+-+
+-+		i++;
+-+		r = strtok_r(NULL, ",", &sptr);
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+#ifndef NO_CONFIG_WRITE
+-+static char * wpa_config_write_rates(const struct parse_data *data,
+-+				     struct wpa_ssid *ssid)
+-+{
+-+	char *value, *pos;
+-+	int res, i;
+-+
+-+	if (ssid->rates[0] <= 0)
+-+		return NULL;
+-+
+-+	value = os_malloc(6 * WLAN_SUPP_RATES_MAX + 1);
+-+	if (value == NULL)
+-+		return NULL;
+-+	pos = value;
+-+	for (i = 0; i < WLAN_SUPP_RATES_MAX - 1; i++) {
+-+		res = os_snprintf(pos, 6, "%.1f,", (double)ssid->rates[i] / 2);
+-+		if (res < 0) {
+-+			os_free(value);
+-+			return NULL;
+-+		}
+-+		pos += res;
+-+	}
+-+	res = os_snprintf(pos, 6, "%.1f",
+-+			  (double)ssid->rates[WLAN_SUPP_RATES_MAX - 1] / 2);
+-+	if (res < 0) {
+-+		os_free(value);
+-+		return NULL;
+-+	}
+-+
+-+	value[6 * WLAN_SUPP_RATES_MAX] = '\0';
+-+	return value;
+-+}
+-+#endif /* NO_CONFIG_WRITE */
+-+
+- /* Helper macros for network block parser */
+- 
+- #ifdef OFFSET
+-@@ -2673,6 +2765,8 @@ static const struct parse_data ssid_fiel
+- 	{ INT(ap_max_inactivity) },
+- 	{ INT(dtim_period) },
+- 	{ INT(beacon_int) },
+-+	{ FUNC(rates) },
+-+	{ FUNC(mcast_rate) },
+- #ifdef CONFIG_MACSEC
+- 	{ INT_RANGE(macsec_policy, 0, 1) },
+- 	{ INT_RANGE(macsec_integ_only, 0, 1) },
+---- a/wpa_supplicant/config_ssid.h
+-+++ b/wpa_supplicant/config_ssid.h
+-@@ -10,8 +10,10 @@
+- #define CONFIG_SSID_H
+- 
+- #include "common/defs.h"
+-+#include "ap/sta_info.h"
+- #include "utils/list.h"
+- #include "eap_peer/eap_config.h"
+-+#include "drivers/nl80211_copy.h"
+- 
+- 
+- #define DEFAULT_EAP_WORKAROUND ((unsigned int) -1)
+-@@ -879,6 +881,9 @@ struct wpa_ssid {
+- 	 */
+- 	void *parent_cred;
+- 
+-+	unsigned char rates[WLAN_SUPP_RATES_MAX];
+-+	double mcast_rate;
+-+
+- #ifdef CONFIG_MACSEC
+- 	/**
+- 	 * macsec_policy - Determines the policy for MACsec secure session
+---- a/wpa_supplicant/wpa_supplicant.c
+-+++ b/wpa_supplicant/wpa_supplicant.c
+-@@ -4177,6 +4177,12 @@ static void wpas_start_assoc_cb(struct w
+- 			params.beacon_int = ssid->beacon_int;
+- 		else
+- 			params.beacon_int = wpa_s->conf->beacon_int;
+-+		int i = 0;
+-+		while (i < WLAN_SUPP_RATES_MAX) {
+-+			params.rates[i] = ssid->rates[i];
+-+			i++;
+-+		}
+-+		params.mcast_rate = ssid->mcast_rate;
+- 	}
+- 
+- 	if (bss && ssid->enable_edmg)
+diff --git a/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch b/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch
+deleted file mode 100644
+index e738ea1316..0000000000
+--- a/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch
++++ /dev/null
+@@ -1,68 +0,0 @@
+-From: Sven Eckelmann <sven.eckelmann@openmesh.com>
+-Date: Thu, 11 May 2017 08:21:45 +0200
+-Subject: [PATCH] set mcast_rate in mesh mode
+-
+-The wpa_supplicant code for IBSS allows to set the mcast rate. It is
+-recommended to increase this value from 1 or 6 Mbit/s to something higher
+-when using a mesh protocol on top which uses the multicast packet loss as
+-indicator for the link quality.
+-
+-This setting was unfortunately not applied for mesh mode. But it would be
+-beneficial when wpa_supplicant would behave similar to IBSS mode and set
+-this argument during mesh join like authsae already does. At least it is
+-helpful for companies/projects which are currently switching to 802.11s
+-(without mesh_fwding and with mesh_ttl set to 1) as replacement for IBSS
+-because newer drivers seem to support 802.11s but not IBSS anymore.
+-
+-Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
+-Tested-by: Simon Wunderlich <simon.wunderlich@openmesh.com>
+-
+---- a/src/drivers/driver.h
+-+++ b/src/drivers/driver.h
+-@@ -1768,6 +1768,7 @@ struct wpa_driver_mesh_join_params {
+- #define WPA_DRIVER_MESH_FLAG_AMPE	0x00000008
+- 	unsigned int flags;
+- 	bool handle_dfs;
+-+	int mcast_rate;
+- };
+- 
+- struct wpa_driver_set_key_params {
+---- a/src/drivers/driver_nl80211.c
+-+++ b/src/drivers/driver_nl80211.c
+-@@ -11388,6 +11388,18 @@ static int nl80211_put_mesh_id(struct nl
+- }
+- 
+- 
+-+static int nl80211_put_mcast_rate(struct nl_msg *msg, int mcast_rate)
+-+{
+-+	if (mcast_rate > 0) {
+-+		wpa_printf(MSG_DEBUG, "  * mcast_rate=%.1f",
+-+			   (double)mcast_rate / 10);
+-+		return nla_put_u32(msg, NL80211_ATTR_MCAST_RATE, mcast_rate);
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+
+- static int nl80211_put_mesh_config(struct nl_msg *msg,
+- 				   struct wpa_driver_mesh_bss_params *params)
+- {
+-@@ -11449,6 +11461,7 @@ static int nl80211_join_mesh(struct i802
+- 	    nl80211_put_basic_rates(msg, params->basic_rates) ||
+- 	    nl80211_put_mesh_id(msg, params->meshid, params->meshid_len) ||
+- 	    nl80211_put_beacon_int(msg, params->beacon_int) ||
+-+	    nl80211_put_mcast_rate(msg, params->mcast_rate) ||
+- 	    nl80211_put_dtim_period(msg, params->dtim_period))
+- 		goto fail;
+- 
+---- a/wpa_supplicant/mesh.c
+-+++ b/wpa_supplicant/mesh.c
+-@@ -632,6 +632,7 @@ int wpa_supplicant_join_mesh(struct wpa_
+- 
+- 	params->meshid = ssid->ssid;
+- 	params->meshid_len = ssid->ssid_len;
+-+	params->mcast_rate = ssid->mcast_rate;
+- 	ibss_mesh_setup_freq(wpa_s, ssid, &params->freq);
+- 	wpa_s->mesh_ht_enabled = !!params->freq.ht_enabled;
+- 	wpa_s->mesh_vht_enabled = !!params->freq.vht_enabled;
+diff --git a/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch b/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch
+deleted file mode 100644
+index 73ccc65ad9..0000000000
+--- a/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch
++++ /dev/null
+@@ -1,13 +0,0 @@
+---- a/wpa_supplicant/wpa_supplicant.c
+-+++ b/wpa_supplicant/wpa_supplicant.c
+-@@ -3077,6 +3077,10 @@ void ibss_mesh_setup_freq(struct wpa_sup
+- 
+- 	freq->freq = ssid->frequency;
+- 
+-+	if (ssid->fixed_freq) {
+-+		obss_scan = 0;
+-+	}
+-+
+- 	if (ssid->mode == WPAS_MODE_IBSS && !ssid->fixed_freq) {
+- 		struct wpa_bss *bss = ibss_find_existing_bss(wpa_s, ssid);
+- 
+diff --git a/package/network/services/hostapd/patches/465-hostapd-config-support-random-BSS-color.patch b/package/network/services/hostapd/patches/465-hostapd-config-support-random-BSS-color.patch
+deleted file mode 100644
+index ada77853fe..0000000000
+--- a/package/network/services/hostapd/patches/465-hostapd-config-support-random-BSS-color.patch
++++ /dev/null
+@@ -1,24 +0,0 @@
+-From c9304d3303d563ad6d2619f4e07864ed12f96889 Mon Sep 17 00:00:00 2001
+-From: David Bauer <mail@david-bauer.net>
+-Date: Sat, 14 May 2022 21:41:03 +0200
+-Subject: [PATCH] hostapd: config: support random BSS color
+-
+-Configure the HE BSS color to a random value in case the config defines
+-a BSS color which exceeds the max BSS color (63).
+-
+-Signed-off-by: David Bauer <mail@david-bauer.net>
+----
+- hostapd/config_file.c | 2 ++
+- 1 file changed, 2 insertions(+)
+-
+---- a/hostapd/config_file.c
+-+++ b/hostapd/config_file.c
+-@@ -3498,6 +3498,8 @@ static int hostapd_config_fill(struct ho
+- 	} else if (os_strcmp(buf, "he_bss_color") == 0) {
+- 		conf->he_op.he_bss_color = atoi(pos) & 0x3f;
+- 		conf->he_op.he_bss_color_disabled = 0;
+-+		if (atoi(pos) > 63)
+-+			conf->he_op.he_bss_color = os_random() % 63 + 1;
+- 	} else if (os_strcmp(buf, "he_bss_color_partial") == 0) {
+- 		conf->he_op.he_bss_color_partial = atoi(pos);
+- 	} else if (os_strcmp(buf, "he_default_pe_duration") == 0) {
+diff --git a/package/network/services/hostapd/patches/470-survey_data_fallback.patch b/package/network/services/hostapd/patches/470-survey_data_fallback.patch
+deleted file mode 100644
+index 79ab48c5c2..0000000000
+--- a/package/network/services/hostapd/patches/470-survey_data_fallback.patch
++++ /dev/null
+@@ -1,30 +0,0 @@
+---- a/src/ap/acs.c
+-+++ b/src/ap/acs.c
+-@@ -455,17 +455,17 @@ static int acs_get_bw_center_chan(int fr
+- static int acs_survey_is_sufficient(struct freq_survey *survey)
+- {
+- 	if (!(survey->filled & SURVEY_HAS_NF)) {
+-+		survey->nf = -95;
+- 		wpa_printf(MSG_INFO,
+- 			   "ACS: Survey for freq %d is missing noise floor",
+- 			   survey->freq);
+--		return 0;
+- 	}
+- 
+- 	if (!(survey->filled & SURVEY_HAS_CHAN_TIME)) {
+-+		survey->channel_time = 0;
+- 		wpa_printf(MSG_INFO,
+- 			   "ACS: Survey for freq %d is missing channel time",
+- 			   survey->freq);
+--		return 0;
+- 	}
+- 
+- 	if (!(survey->filled & SURVEY_HAS_CHAN_TIME_BUSY) &&
+-@@ -473,7 +473,6 @@ static int acs_survey_is_sufficient(stru
+- 		wpa_printf(MSG_INFO,
+- 			   "ACS: Survey for freq %d is missing RX and busy time (at least one is required)",
+- 			   survey->freq);
+--		return 0;
+- 	}
+- 
+- 	return 1;
+diff --git a/package/network/services/hostapd/patches/500-lto-jobserver-support.patch b/package/network/services/hostapd/patches/500-lto-jobserver-support.patch
+deleted file mode 100644
+index 046da42ab8..0000000000
+--- a/package/network/services/hostapd/patches/500-lto-jobserver-support.patch
++++ /dev/null
+@@ -1,59 +0,0 @@
+---- a/hostapd/Makefile
+-+++ b/hostapd/Makefile
+-@@ -1396,7 +1396,7 @@ hostapd_multi.a: $(BCHECK) $(OBJS)
+- 	@$(AR) cr $@ hostapd_multi.o $(OBJS)
+- 
+- hostapd: $(OBJS)
+--	$(Q)$(CC) $(LDFLAGS) -o hostapd $(OBJS) $(LIBS)
+-+	+$(Q)$(CC) $(LDFLAGS) -o hostapd $(OBJS) $(LIBS)
+- 	@$(E) "  LD " $@
+- 
+- ifdef CONFIG_WPA_TRACE
+-@@ -1407,7 +1407,7 @@ _OBJS_VAR := OBJS_c
+- include ../src/objs.mk
+- 
+- hostapd_cli: $(OBJS_c)
+--	$(Q)$(CC) $(LDFLAGS) -o hostapd_cli $(OBJS_c) $(LIBS_c)
+-+	+$(Q)$(CC) $(LDFLAGS) -o hostapd_cli $(OBJS_c) $(LIBS_c)
+- 	@$(E) "  LD " $@
+- 
+- NOBJS = nt_password_hash.o ../src/crypto/ms_funcs.o $(SHA1OBJS)
+---- a/wpa_supplicant/Makefile
+-+++ b/wpa_supplicant/Makefile
+-@@ -2039,31 +2039,31 @@ wpa_supplicant_multi.a: .config $(BCHECK
+- 	@$(AR) cr $@ wpa_supplicant_multi.o $(OBJS)
+- 
+- wpa_supplicant: $(BCHECK) $(OBJS) $(EXTRA_progs)
+--	$(Q)$(LDO) $(LDFLAGS) -o wpa_supplicant $(OBJS) $(LIBS) $(EXTRALIBS)
+-+	+$(Q)$(LDO) $(LDFLAGS) -o wpa_supplicant $(OBJS) $(LIBS) $(EXTRALIBS)
+- 	@$(E) "  LD " $@
+- 
+- _OBJS_VAR := OBJS_t
+- include ../src/objs.mk
+- eapol_test: $(OBJS_t)
+--	$(Q)$(LDO) $(LDFLAGS) -o eapol_test $(OBJS_t) $(LIBS)
+-+	+$(Q)$(LDO) $(LDFLAGS) -o eapol_test $(OBJS_t) $(LIBS)
+- 	@$(E) "  LD " $@
+- 
+- _OBJS_VAR := OBJS_t2
+- include ../src/objs.mk
+- preauth_test: $(OBJS_t2)
+--	$(Q)$(LDO) $(LDFLAGS) -o preauth_test $(OBJS_t2) $(LIBS)
+-+	+$(Q)$(LDO) $(LDFLAGS) -o preauth_test $(OBJS_t2) $(LIBS)
+- 	@$(E) "  LD " $@
+- 
+- _OBJS_VAR := OBJS_p
+- include ../src/objs.mk
+- wpa_passphrase: $(OBJS_p)
+--	$(Q)$(LDO) $(LDFLAGS) -o wpa_passphrase $(OBJS_p) $(LIBS_p) $(LIBS)
+-+	+$(Q)$(LDO) $(LDFLAGS) -o wpa_passphrase $(OBJS_p) $(LIBS_p) $(LIBS)
+- 	@$(E) "  LD " $@
+- 
+- _OBJS_VAR := OBJS_c
+- include ../src/objs.mk
+- wpa_cli: $(OBJS_c)
+--	$(Q)$(LDO) $(LDFLAGS) -o wpa_cli $(OBJS_c) $(LIBS_c)
+-+	+$(Q)$(LDO) $(LDFLAGS) -o wpa_cli $(OBJS_c) $(LIBS_c)
+- 	@$(E) "  LD " $@
+- 
+- LIBCTRL += ../src/common/wpa_ctrl.o
+diff --git a/package/network/services/hostapd/patches/590-rrm-wnm-statistics.patch b/package/network/services/hostapd/patches/590-rrm-wnm-statistics.patch
+deleted file mode 100644
+index a6f43171cc..0000000000
+--- a/package/network/services/hostapd/patches/590-rrm-wnm-statistics.patch
++++ /dev/null
+@@ -1,92 +0,0 @@
+---- a/src/ap/hostapd.h
+-+++ b/src/ap/hostapd.h
+-@@ -162,6 +162,21 @@ struct hostapd_sae_commit_queue {
+- };
+- 
+- /**
+-+ * struct hostapd_openwrt_stats - OpenWrt custom STA/AP statistics
+-+ */
+-+struct hostapd_openwrt_stats {
+-+	struct {
+-+		u64 neighbor_report_tx;
+-+	} rrm;
+-+
+-+	struct {
+-+		u64 bss_transition_query_rx;
+-+		u64 bss_transition_request_tx;
+-+		u64 bss_transition_response_rx;
+-+	} wnm;
+-+};
+-+
+-+/**
+-  * struct hostapd_data - hostapd per-BSS data structure
+-  */
+- struct hostapd_data {
+-@@ -175,6 +190,9 @@ struct hostapd_data {
+- 
+- 	u8 own_addr[ETH_ALEN];
+- 
+-+	/* OpenWrt specific statistics */
+-+	struct hostapd_openwrt_stats openwrt_stats;
+-+
+- 	int num_sta; /* number of entries in sta_list */
+- 	struct sta_info *sta_list; /* STA info list head */
+- #define STA_HASH_SIZE 256
+---- a/src/ap/wnm_ap.c
+-+++ b/src/ap/wnm_ap.c
+-@@ -386,6 +386,7 @@ static int ieee802_11_send_bss_trans_mgm
+- 	mgmt->u.action.u.bss_tm_req.validity_interval = 1;
+- 	pos = mgmt->u.action.u.bss_tm_req.variable;
+- 
+-+	hapd->openwrt_stats.wnm.bss_transition_request_tx++;
+- 	wpa_printf(MSG_DEBUG, "WNM: Send BSS Transition Management Request to "
+- 		   MACSTR " dialog_token=%u req_mode=0x%x disassoc_timer=%u "
+- 		   "validity_interval=%u",
+-@@ -790,10 +791,12 @@ int ieee802_11_rx_wnm_action_ap(struct h
+- 					       plen);
+- 		return 0;
+- 	case WNM_BSS_TRANS_MGMT_QUERY:
+-+		hapd->openwrt_stats.wnm.bss_transition_query_rx++;
+- 		ieee802_11_rx_bss_trans_mgmt_query(hapd, mgmt->sa, payload,
+- 						   plen);
+- 		return 0;
+- 	case WNM_BSS_TRANS_MGMT_RESP:
+-+		hapd->openwrt_stats.wnm.bss_transition_response_rx++;
+- 		ieee802_11_rx_bss_trans_mgmt_resp(hapd, mgmt->sa, payload,
+- 						  plen);
+- 		return 0;
+-@@ -840,6 +843,7 @@ int wnm_send_disassoc_imminent(struct ho
+- 
+- 	pos = mgmt->u.action.u.bss_tm_req.variable;
+- 
+-+	hapd->openwrt_stats.wnm.bss_transition_request_tx++;
+- 	wpa_printf(MSG_DEBUG, "WNM: Send BSS Transition Management Request frame to indicate imminent disassociation (disassoc_timer=%d) to "
+- 		   MACSTR, disassoc_timer, MAC2STR(sta->addr));
+- 	if (hostapd_drv_send_mlme(hapd, buf, pos - buf, 0, NULL, 0, 0) < 0) {
+-@@ -921,6 +925,7 @@ int wnm_send_ess_disassoc_imminent(struc
+- 		return -1;
+- 	}
+- 
+-+	hapd->openwrt_stats.wnm.bss_transition_request_tx++;
+- 	if (disassoc_timer) {
+- 		/* send disassociation frame after time-out */
+- 		set_disassoc_timer(hapd, sta, disassoc_timer);
+-@@ -1001,6 +1006,7 @@ int wnm_send_bss_tm_req(struct hostapd_d
+- 	}
+- 	os_free(buf);
+- 
+-+	hapd->openwrt_stats.wnm.bss_transition_request_tx++;
+- 	if (disassoc_timer) {
+- 		/* send disassociation frame after time-out */
+- 		set_disassoc_timer(hapd, sta, disassoc_timer);
+---- a/src/ap/rrm.c
+-+++ b/src/ap/rrm.c
+-@@ -269,6 +269,8 @@ static void hostapd_send_nei_report_resp
+- 		}
+- 	}
+- 
+-+	hapd->openwrt_stats.rrm.neighbor_report_tx++;
+-+
+- 	hostapd_drv_send_action(hapd, hapd->iface->freq, 0, addr,
+- 				wpabuf_head(buf), wpabuf_len(buf));
+- 	wpabuf_free(buf);
+diff --git a/package/network/services/hostapd/patches/599-wpa_supplicant-fix-warnings.patch b/package/network/services/hostapd/patches/599-wpa_supplicant-fix-warnings.patch
+deleted file mode 100644
+index e70dc61419..0000000000
+--- a/package/network/services/hostapd/patches/599-wpa_supplicant-fix-warnings.patch
++++ /dev/null
+@@ -1,19 +0,0 @@
+---- a/wpa_supplicant/wps_supplicant.h
+-+++ b/wpa_supplicant/wps_supplicant.h
+-@@ -9,6 +9,7 @@
+- #ifndef WPS_SUPPLICANT_H
+- #define WPS_SUPPLICANT_H
+- 
+-+struct wpa_bss;
+- struct wpa_scan_results;
+- 
+- #ifdef CONFIG_WPS
+-@@ -16,8 +17,6 @@ struct wpa_scan_results;
+- #include "wps/wps.h"
+- #include "wps/wps_defs.h"
+- 
+--struct wpa_bss;
+--
+- struct wps_new_ap_settings {
+- 	const char *ssid_hex;
+- 	const char *auth;
+diff --git a/package/network/services/hostapd/patches/600-ubus_support.patch b/package/network/services/hostapd/patches/600-ubus_support.patch
+deleted file mode 100644
+index aa68079fb2..0000000000
+--- a/package/network/services/hostapd/patches/600-ubus_support.patch
++++ /dev/null
+@@ -1,624 +0,0 @@
+---- a/hostapd/Makefile
+-+++ b/hostapd/Makefile
+-@@ -166,6 +166,11 @@ OBJS += ../src/common/hw_features_common
+- 
+- OBJS += ../src/eapol_auth/eapol_auth_sm.o
+- 
+-+ifdef CONFIG_UBUS
+-+CFLAGS += -DUBUS_SUPPORT
+-+OBJS += ../src/ap/ubus.o
+-+LIBS += -lubox -lubus
+-+endif
+- 
+- ifdef CONFIG_CODE_COVERAGE
+- CFLAGS += -O0 -fprofile-arcs -ftest-coverage
+---- a/src/ap/hostapd.h
+-+++ b/src/ap/hostapd.h
+-@@ -18,6 +18,7 @@
+- #include "utils/list.h"
+- #include "ap_config.h"
+- #include "drivers/driver.h"
+-+#include "ubus.h"
+- 
+- #define OCE_STA_CFON_ENABLED(hapd) \
+- 	((hapd->conf->oce & OCE_STA_CFON) && \
+-@@ -92,7 +93,7 @@ struct hapd_interfaces {
+- #ifdef CONFIG_CTRL_IFACE_UDP
+-        unsigned char ctrl_iface_cookie[CTRL_IFACE_COOKIE_LEN];
+- #endif /* CONFIG_CTRL_IFACE_UDP */
+--
+-+	struct ubus_object ubus;
+- };
+- 
+- enum hostapd_chan_status {
+-@@ -183,6 +184,7 @@ struct hostapd_data {
+- 	struct hostapd_iface *iface;
+- 	struct hostapd_config *iconf;
+- 	struct hostapd_bss_config *conf;
+-+	struct hostapd_ubus_bss ubus;
+- 	int interface_added; /* virtual interface added for this BSS */
+- 	unsigned int started:1;
+- 	unsigned int disabled:1;
+-@@ -682,6 +684,7 @@ hostapd_alloc_bss_data(struct hostapd_if
+- 		       struct hostapd_bss_config *bss);
+- int hostapd_setup_interface(struct hostapd_iface *iface);
+- int hostapd_setup_interface_complete(struct hostapd_iface *iface, int err);
+-+void hostapd_set_own_neighbor_report(struct hostapd_data *hapd);
+- void hostapd_interface_deinit(struct hostapd_iface *iface);
+- void hostapd_interface_free(struct hostapd_iface *iface);
+- struct hostapd_iface * hostapd_alloc_iface(void);
+---- a/src/ap/hostapd.c
+-+++ b/src/ap/hostapd.c
+-@@ -435,6 +435,7 @@ void hostapd_free_hapd_data(struct hosta
+- 	hapd->beacon_set_done = 0;
+- 
+- 	wpa_printf(MSG_DEBUG, "%s(%s)", __func__, hapd->conf->iface);
+-+	hostapd_ubus_free_bss(hapd);
+- 	accounting_deinit(hapd);
+- 	hostapd_deinit_wpa(hapd);
+- 	vlan_deinit(hapd);
+-@@ -1185,6 +1186,8 @@ static int hostapd_start_beacon(struct h
+- 	if (hapd->driver && hapd->driver->set_operstate)
+- 		hapd->driver->set_operstate(hapd->drv_priv, 1);
+- 
+-+	hostapd_ubus_add_bss(hapd);
+-+
+- 	return 0;
+- }
+- 
+-@@ -2126,6 +2129,7 @@ static int hostapd_setup_interface_compl
+- 	if (err)
+- 		goto fail;
+- 
+-+	hostapd_ubus_add_iface(iface);
+- 	wpa_printf(MSG_DEBUG, "Completing interface initialization");
+- 	if (iface->freq) {
+- #ifdef NEED_AP_MLME
+-@@ -2342,6 +2346,7 @@ dfs_offload:
+- 
+- fail:
+- 	wpa_printf(MSG_ERROR, "Interface initialization failed");
+-+	hostapd_ubus_free_iface(iface);
+- 	hostapd_set_state(iface, HAPD_IFACE_DISABLED);
+- 	wpa_msg(hapd->msg_ctx, MSG_INFO, AP_EVENT_DISABLED);
+- #ifdef CONFIG_FST
+-@@ -2817,6 +2822,7 @@ void hostapd_interface_deinit_free(struc
+- 		   (unsigned int) iface->conf->num_bss);
+- 	driver = iface->bss[0]->driver;
+- 	drv_priv = iface->bss[0]->drv_priv;
+-+	hostapd_ubus_free_iface(iface);
+- 	hostapd_interface_deinit(iface);
+- 	wpa_printf(MSG_DEBUG, "%s: driver=%p drv_priv=%p -> hapd_deinit",
+- 		   __func__, driver, drv_priv);
+---- a/src/ap/ieee802_11.c
+-+++ b/src/ap/ieee802_11.c
+-@@ -2740,13 +2740,18 @@ static void handle_auth(struct hostapd_d
+- 	u16 auth_alg, auth_transaction, status_code;
+- 	u16 resp = WLAN_STATUS_SUCCESS;
+- 	struct sta_info *sta = NULL;
+--	int res, reply_res;
+-+	int res, reply_res, ubus_resp;
+- 	u16 fc;
+- 	const u8 *challenge = NULL;
+- 	u8 resp_ies[2 + WLAN_AUTH_CHALLENGE_LEN];
+- 	size_t resp_ies_len = 0;
+- 	u16 seq_ctrl;
+- 	struct radius_sta rad_info;
+-+	struct hostapd_ubus_request req = {
+-+		.type = HOSTAPD_UBUS_AUTH_REQ,
+-+		.mgmt_frame = mgmt,
+-+		.ssi_signal = rssi,
+-+	};
+- 
+- 	if (len < IEEE80211_HDRLEN + sizeof(mgmt->u.auth)) {
+- 		wpa_printf(MSG_INFO, "handle_auth - too short payload (len=%lu)",
+-@@ -2914,6 +2919,13 @@ static void handle_auth(struct hostapd_d
+- 		resp = WLAN_STATUS_UNSPECIFIED_FAILURE;
+- 		goto fail;
+- 	}
+-+	ubus_resp = hostapd_ubus_handle_event(hapd, &req);
+-+	if (ubus_resp) {
+-+		wpa_printf(MSG_DEBUG, "Station " MACSTR " rejected by ubus handler.\n",
+-+			MAC2STR(mgmt->sa));
+-+		resp = ubus_resp > 0 ? (u16) ubus_resp : WLAN_STATUS_UNSPECIFIED_FAILURE;
+-+		goto fail;
+-+	}
+- 	if (res == HOSTAPD_ACL_PENDING)
+- 		return;
+- 
+-@@ -4695,7 +4707,7 @@ static void handle_assoc(struct hostapd_
+- 	int resp = WLAN_STATUS_SUCCESS;
+- 	u16 reply_res = WLAN_STATUS_UNSPECIFIED_FAILURE;
+- 	const u8 *pos;
+--	int left, i;
+-+	int left, i, ubus_resp;
+- 	struct sta_info *sta;
+- 	u8 *tmp = NULL;
+- #ifdef CONFIG_FILS
+-@@ -4908,6 +4920,11 @@ static void handle_assoc(struct hostapd_
+- 		left = res;
+- 	}
+- #endif /* CONFIG_FILS */
+-+	struct hostapd_ubus_request req = {
+-+		.type = HOSTAPD_UBUS_ASSOC_REQ,
+-+		.mgmt_frame = mgmt,
+-+		.ssi_signal = rssi,
+-+	};
+- 
+- 	/* followed by SSID and Supported rates; and HT capabilities if 802.11n
+- 	 * is used */
+-@@ -5006,6 +5023,13 @@ static void handle_assoc(struct hostapd_
+- 	}
+- #endif /* CONFIG_FILS */
+- 
+-+	ubus_resp = hostapd_ubus_handle_event(hapd, &req);
+-+	if (ubus_resp) {
+-+		wpa_printf(MSG_DEBUG, "Station " MACSTR " assoc rejected by ubus handler.\n",
+-+		       MAC2STR(mgmt->sa));
+-+		resp = ubus_resp > 0 ? (u16) ubus_resp : WLAN_STATUS_UNSPECIFIED_FAILURE;
+-+		goto fail;
+-+	}
+-  fail:
+- 
+- 	/*
+-@@ -5099,6 +5123,7 @@ static void handle_disassoc(struct hosta
+- 	wpa_printf(MSG_DEBUG, "disassocation: STA=" MACSTR " reason_code=%d",
+- 		   MAC2STR(mgmt->sa),
+- 		   le_to_host16(mgmt->u.disassoc.reason_code));
+-+	hostapd_ubus_notify(hapd, "disassoc", mgmt->sa);
+- 
+- 	sta = ap_get_sta(hapd, mgmt->sa);
+- 	if (sta == NULL) {
+-@@ -5168,6 +5193,8 @@ static void handle_deauth(struct hostapd
+- 	/* Clear the PTKSA cache entries for PASN */
+- 	ptksa_cache_flush(hapd->ptksa, mgmt->sa, WPA_CIPHER_NONE);
+- 
+-+	hostapd_ubus_notify(hapd, "deauth", mgmt->sa);
+-+
+- 	sta = ap_get_sta(hapd, mgmt->sa);
+- 	if (sta == NULL) {
+- 		wpa_msg(hapd->msg_ctx, MSG_DEBUG, "Station " MACSTR " trying "
+---- a/src/ap/beacon.c
+-+++ b/src/ap/beacon.c
+-@@ -1006,6 +1006,12 @@ void handle_probe_req(struct hostapd_dat
+- 	u16 csa_offs[2];
+- 	size_t csa_offs_len;
+- 	struct radius_sta rad_info;
+-+	struct hostapd_ubus_request req = {
+-+		.type = HOSTAPD_UBUS_PROBE_REQ,
+-+		.mgmt_frame = mgmt,
+-+		.ssi_signal = ssi_signal,
+-+		.elems = &elems,
+-+	};
+- 
+- 	if (hapd->iconf->rssi_ignore_probe_request && ssi_signal &&
+- 	    ssi_signal < hapd->iconf->rssi_ignore_probe_request)
+-@@ -1192,6 +1198,12 @@ void handle_probe_req(struct hostapd_dat
+- 	}
+- #endif /* CONFIG_P2P */
+- 
+-+	if (hostapd_ubus_handle_event(hapd, &req)) {
+-+		wpa_printf(MSG_DEBUG, "Probe request for " MACSTR " rejected by ubus handler.\n",
+-+		       MAC2STR(mgmt->sa));
+-+		return;
+-+	}
+-+
+- 	/* TODO: verify that supp_rates contains at least one matching rate
+- 	 * with AP configuration */
+- 
+---- a/src/ap/drv_callbacks.c
+-+++ b/src/ap/drv_callbacks.c
+-@@ -145,6 +145,10 @@ int hostapd_notif_assoc(struct hostapd_d
+- 	u16 reason = WLAN_REASON_UNSPECIFIED;
+- 	int status = WLAN_STATUS_SUCCESS;
+- 	const u8 *p2p_dev_addr = NULL;
+-+	struct hostapd_ubus_request req = {
+-+		.type = HOSTAPD_UBUS_ASSOC_REQ,
+-+		.addr = addr,
+-+	};
+- 
+- 	if (addr == NULL) {
+- 		/*
+-@@ -237,6 +241,12 @@ int hostapd_notif_assoc(struct hostapd_d
+- 		goto fail;
+- 	}
+- 
+-+	if (hostapd_ubus_handle_event(hapd, &req)) {
+-+		wpa_printf(MSG_DEBUG, "Station " MACSTR " assoc rejected by ubus handler.\n",
+-+			   MAC2STR(req.addr));
+-+		goto fail;
+-+	}
+-+
+- #ifdef CONFIG_P2P
+- 	if (elems.p2p) {
+- 		wpabuf_free(sta->p2p_ie);
+---- a/src/ap/sta_info.c
+-+++ b/src/ap/sta_info.c
+-@@ -460,6 +460,7 @@ void ap_handle_timer(void *eloop_ctx, vo
+- 		hostapd_logger(hapd, sta->addr, HOSTAPD_MODULE_IEEE80211,
+- 			       HOSTAPD_LEVEL_INFO, "deauthenticated due to "
+- 			       "local deauth request");
+-+		hostapd_ubus_notify(hapd, "local-deauth", sta->addr);
+- 		ap_free_sta(hapd, sta);
+- 		return;
+- 	}
+-@@ -615,6 +616,7 @@ skip_poll:
+- 		mlme_deauthenticate_indication(
+- 			hapd, sta,
+- 			WLAN_REASON_PREV_AUTH_NOT_VALID);
+-+		hostapd_ubus_notify(hapd, "inactive-deauth", sta->addr);
+- 		ap_free_sta(hapd, sta);
+- 		break;
+- 	}
+-@@ -1305,15 +1307,28 @@ void ap_sta_set_authorized(struct hostap
+- 					sta->addr, authorized, dev_addr);
+- 
+- 	if (authorized) {
+-+		static const char * const auth_algs[] = {
+-+			[WLAN_AUTH_OPEN] = "open",
+-+			[WLAN_AUTH_SHARED_KEY] = "shared",
+-+			[WLAN_AUTH_FT] = "ft",
+-+			[WLAN_AUTH_SAE] = "sae",
+-+			[WLAN_AUTH_FILS_SK] = "fils-sk",
+-+			[WLAN_AUTH_FILS_SK_PFS] = "fils-sk-pfs",
+-+			[WLAN_AUTH_FILS_PK] = "fils-pk",
+-+			[WLAN_AUTH_PASN] = "pasn",
+-+		};
+-+		const char *auth_alg = NULL;
+- 		const u8 *dpp_pkhash;
+- 		const char *keyid;
+- 		char dpp_pkhash_buf[100];
+- 		char keyid_buf[100];
+- 		char ip_addr[100];
+-+		char alg_buf[100];
+- 
+- 		dpp_pkhash_buf[0] = '\0';
+- 		keyid_buf[0] = '\0';
+- 		ip_addr[0] = '\0';
+-+		alg_buf[0] = '\0';
+- #ifdef CONFIG_P2P
+- 		if (wpa_auth_get_ip_addr(sta->wpa_sm, ip_addr_buf) == 0) {
+- 			os_snprintf(ip_addr, sizeof(ip_addr),
+-@@ -1323,6 +1338,13 @@ void ap_sta_set_authorized(struct hostap
+- 		}
+- #endif /* CONFIG_P2P */
+- 
+-+		if (sta->auth_alg < ARRAY_SIZE(auth_algs))
+-+			auth_alg = auth_algs[sta->auth_alg];
+-+
+-+		if (auth_alg)
+-+			os_snprintf(alg_buf, sizeof(alg_buf),
+-+				" auth_alg=%s", auth_alg);
+-+
+- 		keyid = ap_sta_wpa_get_keyid(hapd, sta);
+- 		if (keyid) {
+- 			os_snprintf(keyid_buf, sizeof(keyid_buf),
+-@@ -1341,17 +1363,19 @@ void ap_sta_set_authorized(struct hostap
+- 					 dpp_pkhash, SHA256_MAC_LEN);
+- 		}
+- 
+--		wpa_msg(hapd->msg_ctx, MSG_INFO, AP_STA_CONNECTED "%s%s%s%s",
+--			buf, ip_addr, keyid_buf, dpp_pkhash_buf);
+-+		hostapd_ubus_notify_authorized(hapd, sta, auth_alg);
+-+		wpa_msg(hapd->msg_ctx, MSG_INFO, AP_STA_CONNECTED "%s%s%s%s%s",
+-+			buf, ip_addr, keyid_buf, dpp_pkhash_buf, alg_buf);
+- 
+- 		if (hapd->msg_ctx_parent &&
+- 		    hapd->msg_ctx_parent != hapd->msg_ctx)
+- 			wpa_msg_no_global(hapd->msg_ctx_parent, MSG_INFO,
+--					  AP_STA_CONNECTED "%s%s%s%s",
+-+					  AP_STA_CONNECTED "%s%s%s%s%s",
+- 					  buf, ip_addr, keyid_buf,
+--					  dpp_pkhash_buf);
+-+					  dpp_pkhash_buf, alg_buf);
+- 	} else {
+- 		wpa_msg(hapd->msg_ctx, MSG_INFO, AP_STA_DISCONNECTED "%s", buf);
+-+		hostapd_ubus_notify(hapd, "disassoc", sta->addr);
+- 
+- 		if (hapd->msg_ctx_parent &&
+- 		    hapd->msg_ctx_parent != hapd->msg_ctx)
+---- a/src/ap/wpa_auth_glue.c
+-+++ b/src/ap/wpa_auth_glue.c
+-@@ -269,6 +269,7 @@ static void hostapd_wpa_auth_psk_failure
+- 	struct hostapd_data *hapd = ctx;
+- 	wpa_msg(hapd->msg_ctx, MSG_INFO, AP_STA_POSSIBLE_PSK_MISMATCH MACSTR,
+- 		MAC2STR(addr));
+-+	hostapd_ubus_notify(hapd, "key-mismatch", addr);
+- }
+- 
+- 
+---- a/wpa_supplicant/Makefile
+-+++ b/wpa_supplicant/Makefile
+-@@ -194,6 +194,12 @@ ifdef CONFIG_EAPOL_TEST
+- CFLAGS += -Werror -DEAPOL_TEST
+- endif
+- 
+-+ifdef CONFIG_UBUS
+-+CFLAGS += -DUBUS_SUPPORT
+-+OBJS += ubus.o
+-+LIBS += -lubox -lubus
+-+endif
+-+
+- ifdef CONFIG_CODE_COVERAGE
+- CFLAGS += -O0 -fprofile-arcs -ftest-coverage
+- LIBS += -lgcov
+-@@ -989,6 +995,9 @@ ifdef CONFIG_CTRL_IFACE_MIB
+- CFLAGS += -DCONFIG_CTRL_IFACE_MIB
+- endif
+- OBJS += ../src/ap/ctrl_iface_ap.o
+-+ifdef CONFIG_UBUS
+-+OBJS += ../src/ap/ubus.o
+-+endif
+- endif
+- 
+- CFLAGS += -DEAP_SERVER -DEAP_SERVER_IDENTITY
+---- a/wpa_supplicant/wpa_supplicant.c
+-+++ b/wpa_supplicant/wpa_supplicant.c
+-@@ -7608,6 +7608,8 @@ struct wpa_supplicant * wpa_supplicant_a
+- 	}
+- #endif /* CONFIG_P2P */
+- 
+-+	wpas_ubus_add_bss(wpa_s);
+-+
+- 	return wpa_s;
+- }
+- 
+-@@ -7634,6 +7636,8 @@ int wpa_supplicant_remove_iface(struct w
+- 	struct wpa_supplicant *parent = wpa_s->parent;
+- #endif /* CONFIG_MESH */
+- 
+-+	wpas_ubus_free_bss(wpa_s);
+-+
+- 	/* Remove interface from the global list of interfaces */
+- 	prev = global->ifaces;
+- 	if (prev == wpa_s) {
+-@@ -7980,8 +7984,12 @@ int wpa_supplicant_run(struct wpa_global
+- 	eloop_register_signal_terminate(wpa_supplicant_terminate, global);
+- 	eloop_register_signal_reconfig(wpa_supplicant_reconfig, global);
+- 
+-+	wpas_ubus_add(global);
+-+
+- 	eloop_run();
+- 
+-+	wpas_ubus_free(global);
+-+
+- 	return 0;
+- }
+- 
+---- a/wpa_supplicant/wpa_supplicant_i.h
+-+++ b/wpa_supplicant/wpa_supplicant_i.h
+-@@ -21,6 +21,7 @@
+- #include "config_ssid.h"
+- #include "wmm_ac.h"
+- #include "pasn/pasn_common.h"
+-+#include "ubus.h"
+- 
+- extern const char *const wpa_supplicant_version;
+- extern const char *const wpa_supplicant_license;
+-@@ -324,6 +325,8 @@ struct wpa_global {
+- #endif /* CONFIG_WIFI_DISPLAY */
+- 
+- 	struct psk_list_entry *add_psk; /* From group formation */
+-+
+-+	struct ubus_object ubus_global;
+- };
+- 
+- 
+-@@ -655,6 +658,7 @@ struct wpa_supplicant {
+- 	unsigned char own_addr[ETH_ALEN];
+- 	unsigned char perm_addr[ETH_ALEN];
+- 	char ifname[100];
+-+	struct wpas_ubus_bss ubus;
+- #ifdef CONFIG_MATCH_IFACE
+- 	int matched;
+- #endif /* CONFIG_MATCH_IFACE */
+---- a/wpa_supplicant/wps_supplicant.c
+-+++ b/wpa_supplicant/wps_supplicant.c
+-@@ -33,6 +33,7 @@
+- #include "p2p/p2p.h"
+- #include "p2p_supplicant.h"
+- #include "wps_supplicant.h"
+-+#include "ubus.h"
+- 
+- 
+- #ifndef WPS_PIN_SCAN_IGNORE_SEL_REG
+-@@ -402,6 +403,8 @@ static int wpa_supplicant_wps_cred(void
+- 	wpa_hexdump_key(MSG_DEBUG, "WPS: Received Credential attribute",
+- 			cred->cred_attr, cred->cred_attr_len);
+- 
+-+	wpas_ubus_notify(wpa_s, cred);
+-+
+- 	if (wpa_s->conf->wps_cred_processing == 1)
+- 		return 0;
+- 
+---- a/hostapd/main.c
+-+++ b/hostapd/main.c
+-@@ -901,6 +901,7 @@ int main(int argc, char *argv[])
+- 	}
+- 
+- 	hostapd_global_ctrl_iface_init(&interfaces);
+-+	hostapd_ubus_add(&interfaces);
+- 
+- 	if (hostapd_global_run(&interfaces, daemonize, pid_file)) {
+- 		wpa_printf(MSG_ERROR, "Failed to start eloop");
+-@@ -910,6 +911,7 @@ int main(int argc, char *argv[])
+- 	ret = 0;
+- 
+-  out:
+-+	hostapd_ubus_free(&interfaces);
+- 	hostapd_global_ctrl_iface_deinit(&interfaces);
+- 	/* Deinitialize all interfaces */
+- 	for (i = 0; i < interfaces.count; i++) {
+---- a/wpa_supplicant/main.c
+-+++ b/wpa_supplicant/main.c
+-@@ -204,7 +204,7 @@ int main(int argc, char *argv[])
+- 
+- 	for (;;) {
+- 		c = getopt(argc, argv,
+--			   "b:Bc:C:D:de:f:g:G:hH:i:I:KLMm:No:O:p:P:qsTtuv::W");
+-+			   "b:Bc:C:D:de:f:g:G:hH:i:I:KLMm:nNo:O:p:P:qsTtuv::W");
+- 		if (c < 0)
+- 			break;
+- 		switch (c) {
+-@@ -272,6 +272,9 @@ int main(int argc, char *argv[])
+- 			params.conf_p2p_dev = optarg;
+- 			break;
+- #endif /* CONFIG_P2P */
+-+		case 'n':
+-+			iface_count = 0;
+-+			break;
+- 		case 'o':
+- 			params.override_driver = optarg;
+- 			break;
+---- a/src/ap/rrm.c
+-+++ b/src/ap/rrm.c
+-@@ -89,6 +89,9 @@ static void hostapd_handle_beacon_report
+- 		return;
+- 	wpa_msg(hapd->msg_ctx, MSG_INFO, BEACON_RESP_RX MACSTR " %u %02x %s",
+- 		MAC2STR(addr), token, rep_mode, report);
+-+	if (len < sizeof(struct rrm_measurement_beacon_report))
+-+		return;
+-+	hostapd_ubus_notify_beacon_report(hapd, addr, token, rep_mode, (struct rrm_measurement_beacon_report*) pos, len);
+- }
+- 
+- 
+-@@ -352,6 +355,9 @@ void hostapd_handle_radio_measurement(st
+- 		   mgmt->u.action.u.rrm.action, MAC2STR(mgmt->sa));
+- 
+- 	switch (mgmt->u.action.u.rrm.action) {
+-+	case WLAN_RRM_LINK_MEASUREMENT_REPORT:
+-+		hostapd_ubus_handle_link_measurement(hapd, buf, len);
+-+		break;
+- 	case WLAN_RRM_RADIO_MEASUREMENT_REPORT:
+- 		hostapd_handle_radio_msmt_report(hapd, buf, len);
+- 		break;
+---- a/src/ap/vlan_init.c
+-+++ b/src/ap/vlan_init.c
+-@@ -22,6 +22,7 @@
+- static int vlan_if_add(struct hostapd_data *hapd, struct hostapd_vlan *vlan,
+- 		       int existsok)
+- {
+-+	bool vlan_exists = iface_exists(vlan->ifname);
+- 	int ret;
+- #ifdef CONFIG_WEP
+- 	int i;
+-@@ -36,7 +37,7 @@ static int vlan_if_add(struct hostapd_da
+- 	}
+- #endif /* CONFIG_WEP */
+- 
+--	if (!iface_exists(vlan->ifname))
+-+	if (!vlan_exists)
+- 		ret = hostapd_vlan_if_add(hapd, vlan->ifname);
+- 	else if (!existsok)
+- 		return -1;
+-@@ -51,6 +52,9 @@ static int vlan_if_add(struct hostapd_da
+- 	if (hapd->wpa_auth)
+- 		ret = wpa_auth_ensure_group(hapd->wpa_auth, vlan->vlan_id);
+- 
+-+	if (!ret && !vlan_exists)
+-+		hostapd_ubus_add_vlan(hapd, vlan);
+-+
+- 	if (ret == 0)
+- 		return ret;
+- 
+-@@ -77,6 +81,8 @@ int vlan_if_remove(struct hostapd_data *
+- 			   "WPA deinitialization for VLAN %d failed (%d)",
+- 			   vlan->vlan_id, ret);
+- 
+-+	hostapd_ubus_remove_vlan(hapd, vlan);
+-+
+- 	return hostapd_vlan_if_remove(hapd, vlan->ifname);
+- }
+- 
+---- a/src/ap/dfs.c
+-+++ b/src/ap/dfs.c
+-@@ -1211,6 +1211,8 @@ int hostapd_dfs_pre_cac_expired(struct h
+- 		"freq=%d ht_enabled=%d chan_offset=%d chan_width=%d cf1=%d cf2=%d",
+- 		freq, ht_enabled, chan_offset, chan_width, cf1, cf2);
+- 
+-+	hostapd_ubus_notify_radar_detected(iface, freq, chan_width, cf1, cf2);
+-+
+- 	/* Proceed only if DFS is not offloaded to the driver */
+- 	if (iface->drv_flags & WPA_DRIVER_FLAGS_DFS_OFFLOAD)
+- 		return 0;
+---- a/src/ap/airtime_policy.c
+-+++ b/src/ap/airtime_policy.c
+-@@ -112,8 +112,14 @@ static void set_sta_weights(struct hosta
+- {
+- 	struct sta_info *sta;
+- 
+--	for (sta = hapd->sta_list; sta; sta = sta->next)
+--		sta_set_airtime_weight(hapd, sta, weight);
+-+	for (sta = hapd->sta_list; sta; sta = sta->next) {
+-+		unsigned int sta_weight = weight;
+-+
+-+		if (sta->dyn_airtime_weight)
+-+			sta_weight = (weight * sta->dyn_airtime_weight) / 256;
+-+
+-+		sta_set_airtime_weight(hapd, sta, sta_weight);
+-+	}
+- }
+- 
+- 
+-@@ -244,7 +250,10 @@ int airtime_policy_new_sta(struct hostap
+- 	unsigned int weight;
+- 
+- 	if (hapd->iconf->airtime_mode == AIRTIME_MODE_STATIC) {
+--		weight = get_weight_for_sta(hapd, sta->addr);
+-+		if (sta->dyn_airtime_weight)
+-+			weight = sta->dyn_airtime_weight;
+-+		else
+-+			weight = get_weight_for_sta(hapd, sta->addr);
+- 		if (weight)
+- 			return sta_set_airtime_weight(hapd, sta, weight);
+- 	}
+---- a/src/ap/sta_info.h
+-+++ b/src/ap/sta_info.h
+-@@ -293,6 +293,7 @@ struct sta_info {
+- #endif /* CONFIG_TESTING_OPTIONS */
+- #ifdef CONFIG_AIRTIME_POLICY
+- 	unsigned int airtime_weight;
+-+	unsigned int dyn_airtime_weight;
+- 	struct os_reltime backlogged_until;
+- #endif /* CONFIG_AIRTIME_POLICY */
+- 
+---- a/src/ap/wnm_ap.c
+-+++ b/src/ap/wnm_ap.c
+-@@ -455,7 +455,8 @@ static void ieee802_11_rx_bss_trans_mgmt
+- 		MAC2STR(addr), reason, hex ? " neighbor=" : "", hex);
+- 	os_free(hex);
+- 
+--	ieee802_11_send_bss_trans_mgmt_request(hapd, addr, dialog_token);
+-+	if (!hostapd_ubus_notify_bss_transition_query(hapd, addr, dialog_token, reason, pos, end - pos))
+-+		ieee802_11_send_bss_trans_mgmt_request(hapd, addr, dialog_token);
+- }
+- 
+- 
+-@@ -477,7 +478,7 @@ static void ieee802_11_rx_bss_trans_mgmt
+- 					      size_t len)
+- {
+- 	u8 dialog_token, status_code, bss_termination_delay;
+--	const u8 *pos, *end;
+-+	const u8 *pos, *end, *target_bssid = NULL;
+- 	int enabled = hapd->conf->bss_transition;
+- 	struct sta_info *sta;
+- 
+-@@ -524,6 +525,7 @@ static void ieee802_11_rx_bss_trans_mgmt
+- 			wpa_printf(MSG_DEBUG, "WNM: not enough room for Target BSSID field");
+- 			return;
+- 		}
+-+		target_bssid = pos;
+- 		sta->agreed_to_steer = 1;
+- 		eloop_cancel_timeout(ap_sta_reset_steer_flag_timer, hapd, sta);
+- 		eloop_register_timeout(2, 0, ap_sta_reset_steer_flag_timer,
+-@@ -543,6 +545,10 @@ static void ieee802_11_rx_bss_trans_mgmt
+- 			MAC2STR(addr), status_code, bss_termination_delay);
+- 	}
+- 
+-+	hostapd_ubus_notify_bss_transition_response(hapd, sta->addr, dialog_token,
+-+						    status_code, bss_termination_delay,
+-+						    target_bssid, pos, end - pos);
+-+
+- 	wpa_hexdump(MSG_DEBUG, "WNM: BSS Transition Candidate List Entries",
+- 		    pos, end - pos);
+- }
+diff --git a/package/network/services/hostapd/patches/610-hostapd_cli_ujail_permission.patch b/package/network/services/hostapd/patches/610-hostapd_cli_ujail_permission.patch
+deleted file mode 100644
+index a03fcc9f92..0000000000
+--- a/package/network/services/hostapd/patches/610-hostapd_cli_ujail_permission.patch
++++ /dev/null
+@@ -1,33 +0,0 @@
+---- a/src/common/wpa_ctrl.c
+-+++ b/src/common/wpa_ctrl.c
+-@@ -135,7 +135,7 @@ try_again:
+- 		return NULL;
+- 	}
+- 	tries++;
+--#ifdef ANDROID
+-+
+- 	/* Set client socket file permissions so that bind() creates the client
+- 	 * socket with these permissions and there is no need to try to change
+- 	 * them with chmod() after bind() which would have potential issues with
+-@@ -147,7 +147,7 @@ try_again:
+- 	 * operations to allow the response to go through. Those are using the
+- 	 * no-deference-symlinks version to avoid races. */
+- 	fchmod(ctrl->s, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP);
+--#endif /* ANDROID */
+-+
+- 	if (bind(ctrl->s, (struct sockaddr *) &ctrl->local,
+- 		    sizeof(ctrl->local)) < 0) {
+- 		if (errno == EADDRINUSE && tries < 2) {
+-@@ -165,7 +165,11 @@ try_again:
+- 		return NULL;
+- 	}
+- 
+--#ifdef ANDROID
+-+#ifndef ANDROID
+-+	/* Set group even if we do not have privileges to change owner */
+-+	lchown(ctrl->local.sun_path, -1, 101);
+-+	lchown(ctrl->local.sun_path, 101, 101);
+-+#else
+- 	/* Set group even if we do not have privileges to change owner */
+- 	lchown(ctrl->local.sun_path, -1, AID_WIFI);
+- 	lchown(ctrl->local.sun_path, AID_SYSTEM, AID_WIFI);
+diff --git a/package/network/services/hostapd/patches/700-wifi-reload.patch b/package/network/services/hostapd/patches/700-wifi-reload.patch
+deleted file mode 100644
+index 5ac7f711a5..0000000000
+--- a/package/network/services/hostapd/patches/700-wifi-reload.patch
++++ /dev/null
+@@ -1,194 +0,0 @@
+---- a/hostapd/config_file.c
+-+++ b/hostapd/config_file.c
+-@@ -2418,6 +2418,8 @@ static int hostapd_config_fill(struct ho
+- 		bss->isolate = atoi(pos);
+- 	} else if (os_strcmp(buf, "ap_max_inactivity") == 0) {
+- 		bss->ap_max_inactivity = atoi(pos);
+-+	} else if (os_strcmp(buf, "config_id") == 0) {
+-+		bss->config_id = os_strdup(pos);
+- 	} else if (os_strcmp(buf, "skip_inactivity_poll") == 0) {
+- 		bss->skip_inactivity_poll = atoi(pos);
+- 	} else if (os_strcmp(buf, "config_id") == 0) {
+-@@ -3128,6 +3130,8 @@ static int hostapd_config_fill(struct ho
+- 		}
+- 	} else if (os_strcmp(buf, "acs_exclude_dfs") == 0) {
+- 		conf->acs_exclude_dfs = atoi(pos);
+-+	} else if (os_strcmp(buf, "radio_config_id") == 0) {
+-+			conf->config_id = os_strdup(pos);
+- 	} else if (os_strcmp(buf, "op_class") == 0) {
+- 		conf->op_class = atoi(pos);
+- 	} else if (os_strcmp(buf, "channel") == 0) {
+---- a/src/ap/ap_config.c
+-+++ b/src/ap/ap_config.c
+-@@ -997,6 +997,7 @@ void hostapd_config_free(struct hostapd_
+- 
+- 	for (i = 0; i < conf->num_bss; i++)
+- 		hostapd_config_free_bss(conf->bss[i]);
+-+	os_free(conf->config_id);
+- 	os_free(conf->bss);
+- 	os_free(conf->supported_rates);
+- 	os_free(conf->basic_rates);
+---- a/src/ap/ap_config.h
+-+++ b/src/ap/ap_config.h
+-@@ -987,6 +987,7 @@ struct eht_phy_capabilities_info {
+- struct hostapd_config {
+- 	struct hostapd_bss_config **bss, *last_bss;
+- 	size_t num_bss;
+-+	char *config_id;
+- 
+- 	u16 beacon_int;
+- 	int rts_threshold;
+---- a/src/ap/hostapd.c
+-+++ b/src/ap/hostapd.c
+-@@ -254,6 +254,10 @@ static int hostapd_iface_conf_changed(st
+- {
+- 	size_t i;
+- 
+-+	if (newconf->config_id != oldconf->config_id)
+-+		if (strcmp(newconf->config_id, oldconf->config_id))
+-+			return 1;
+-+
+- 	if (newconf->num_bss != oldconf->num_bss)
+- 		return 1;
+- 
+-@@ -267,7 +271,7 @@ static int hostapd_iface_conf_changed(st
+- }
+- 
+- 
+--int hostapd_reload_config(struct hostapd_iface *iface)
+-+int hostapd_reload_config(struct hostapd_iface *iface, int reconf)
+- {
+- 	struct hapd_interfaces *interfaces = iface->interfaces;
+- 	struct hostapd_data *hapd = iface->bss[0];
+-@@ -295,6 +299,9 @@ int hostapd_reload_config(struct hostapd
+- 		char *fname;
+- 		int res;
+- 
+-+		if (reconf)
+-+			return -1;
+-+
+- 		hostapd_clear_old(iface);
+- 
+- 		wpa_printf(MSG_DEBUG,
+-@@ -321,6 +328,24 @@ int hostapd_reload_config(struct hostapd
+- 			wpa_printf(MSG_ERROR,
+- 				   "Failed to enable interface on config reload");
+- 		return res;
+-+	} else {
+-+		for (j = 0; j < iface->num_bss; j++) {
+-+			hapd = iface->bss[j];
+-+			if (!hapd->config_id || strcmp(hapd->config_id, newconf->bss[j]->config_id)) {
+-+				hostapd_flush_old_stations(iface->bss[j],
+-+							   WLAN_REASON_PREV_AUTH_NOT_VALID);
+-+#ifdef CONFIG_WEP
+-+				hostapd_broadcast_wep_clear(iface->bss[j]);
+-+#endif
+-+
+-+#ifndef CONFIG_NO_RADIUS
+-+				/* TODO: update dynamic data based on changed configuration
+-+				 * items (e.g., open/close sockets, etc.) */
+-+				radius_client_flush(iface->bss[j]->radius, 0);
+-+#endif /* CONFIG_NO_RADIUS */
+-+				wpa_printf(MSG_INFO, "bss %zu changed", j);
+-+			}
+-+		}
+- 	}
+- 	iface->conf = newconf;
+- 
+-@@ -337,6 +362,12 @@ int hostapd_reload_config(struct hostapd
+- 
+- 	for (j = 0; j < iface->num_bss; j++) {
+- 		hapd = iface->bss[j];
+-+		if (hapd->config_id) {
+-+			os_free(hapd->config_id);
+-+			hapd->config_id = NULL;
+-+		}
+-+		if (newconf->bss[j]->config_id)
+-+			hapd->config_id = strdup(newconf->bss[j]->config_id);
+- 		if (!hapd->conf->config_id || !newconf->bss[j]->config_id ||
+- 		    os_strcmp(hapd->conf->config_id,
+- 			      newconf->bss[j]->config_id) != 0)
+-@@ -2514,6 +2545,10 @@ hostapd_alloc_bss_data(struct hostapd_if
+- 	hapd->iconf = conf;
+- 	hapd->conf = bss;
+- 	hapd->iface = hapd_iface;
+-+	if (bss && bss->config_id)
+-+		hapd->config_id = strdup(bss->config_id);
+-+	else
+-+		hapd->config_id = NULL;
+- 	if (conf)
+- 		hapd->driver = conf->driver;
+- 	hapd->ctrl_sock = -1;
+---- a/src/ap/hostapd.h
+-+++ b/src/ap/hostapd.h
+-@@ -47,7 +47,7 @@ struct mesh_conf;
+- struct hostapd_iface;
+- 
+- struct hapd_interfaces {
+--	int (*reload_config)(struct hostapd_iface *iface);
+-+	int (*reload_config)(struct hostapd_iface *iface, int reconf);
+- 	struct hostapd_config * (*config_read_cb)(const char *config_fname);
+- 	int (*ctrl_iface_init)(struct hostapd_data *hapd);
+- 	void (*ctrl_iface_deinit)(struct hostapd_data *hapd);
+-@@ -185,6 +185,7 @@ struct hostapd_data {
+- 	struct hostapd_config *iconf;
+- 	struct hostapd_bss_config *conf;
+- 	struct hostapd_ubus_bss ubus;
+-+	char *config_id;
+- 	int interface_added; /* virtual interface added for this BSS */
+- 	unsigned int started:1;
+- 	unsigned int disabled:1;
+-@@ -676,7 +677,7 @@ struct hostapd_iface {
+- int hostapd_for_each_interface(struct hapd_interfaces *interfaces,
+- 			       int (*cb)(struct hostapd_iface *iface,
+- 					 void *ctx), void *ctx);
+--int hostapd_reload_config(struct hostapd_iface *iface);
+-+int hostapd_reload_config(struct hostapd_iface *iface, int reconf);
+- void hostapd_reconfig_encryption(struct hostapd_data *hapd);
+- struct hostapd_data *
+- hostapd_alloc_bss_data(struct hostapd_iface *hapd_iface,
+---- a/src/drivers/driver_nl80211.c
+-+++ b/src/drivers/driver_nl80211.c
+-@@ -5054,6 +5054,9 @@ static int wpa_driver_nl80211_set_ap(voi
+- 	if (ret) {
+- 		wpa_printf(MSG_DEBUG, "nl80211: Beacon set failed: %d (%s)",
+- 			   ret, strerror(-ret));
+-+		if (!bss->flink->beacon_set)
+-+			ret = 0;
+-+		bss->flink->beacon_set = 0;
+- 	} else {
+- 		bss->flink->beacon_set = 1;
+- 		nl80211_set_bss(bss, params->cts_protect, params->preamble,
+---- a/hostapd/ctrl_iface.c
+-+++ b/hostapd/ctrl_iface.c
+-@@ -187,7 +187,7 @@ static int hostapd_ctrl_iface_update(str
+- 	iface->interfaces->config_read_cb = hostapd_ctrl_iface_config_read;
+- 	reload_opts = txt;
+- 
+--	hostapd_reload_config(iface);
+-+	hostapd_reload_config(iface, 0);
+- 
+- 	iface->interfaces->config_read_cb = config_read_cb;
+- }
+---- a/hostapd/main.c
+-+++ b/hostapd/main.c
+-@@ -320,7 +320,7 @@ static void handle_term(int sig, void *s
+- 
+- static int handle_reload_iface(struct hostapd_iface *iface, void *ctx)
+- {
+--	if (hostapd_reload_config(iface) < 0) {
+-+	if (hostapd_reload_config(iface, 0) < 0) {
+- 		wpa_printf(MSG_WARNING, "Failed to read new configuration "
+- 			   "file - continuing with old.");
+- 	}
+---- a/src/ap/wps_hostapd.c
+-+++ b/src/ap/wps_hostapd.c
+-@@ -315,7 +315,7 @@ static void wps_reload_config(void *eloo
+- 
+- 	wpa_printf(MSG_DEBUG, "WPS: Reload configuration data");
+- 	if (iface->interfaces == NULL ||
+--	    iface->interfaces->reload_config(iface) < 0) {
+-+	    iface->interfaces->reload_config(iface, 1) < 0) {
+- 		wpa_printf(MSG_WARNING, "WPS: Failed to reload the updated "
+- 			   "configuration");
+- 	}
+diff --git a/package/network/services/hostapd/patches/710-vlan_no_bridge.patch b/package/network/services/hostapd/patches/710-vlan_no_bridge.patch
+deleted file mode 100644
+index f625f4bda4..0000000000
+--- a/package/network/services/hostapd/patches/710-vlan_no_bridge.patch
++++ /dev/null
+@@ -1,41 +0,0 @@
+---- a/src/ap/ap_config.h
+-+++ b/src/ap/ap_config.h
+-@@ -121,6 +121,7 @@ struct hostapd_ssid {
+- #define DYNAMIC_VLAN_OPTIONAL 1
+- #define DYNAMIC_VLAN_REQUIRED 2
+- 	int dynamic_vlan;
+-+	int vlan_no_bridge;
+- #define DYNAMIC_VLAN_NAMING_WITHOUT_DEVICE 0
+- #define DYNAMIC_VLAN_NAMING_WITH_DEVICE 1
+- #define DYNAMIC_VLAN_NAMING_END 2
+---- a/src/ap/vlan_full.c
+-+++ b/src/ap/vlan_full.c
+-@@ -475,6 +475,9 @@ void vlan_newlink(const char *ifname, st
+- 	if (!vlan)
+- 		return;
+- 
+-+	if (hapd->conf->ssid.vlan_no_bridge)
+-+		goto out;
+-+
+- 	vlan->configured = 1;
+- 
+- 	notempty = vlan->vlan_desc.notempty;
+-@@ -506,6 +509,7 @@ void vlan_newlink(const char *ifname, st
+- 				    ifname, br_name, tagged[i], hapd);
+- 	}
+- 
+-+out:
+- 	ifconfig_up(ifname);
+- }
+- 
+---- a/hostapd/config_file.c
+-+++ b/hostapd/config_file.c
+-@@ -3353,6 +3353,8 @@ static int hostapd_config_fill(struct ho
+- #ifndef CONFIG_NO_VLAN
+- 	} else if (os_strcmp(buf, "dynamic_vlan") == 0) {
+- 		bss->ssid.dynamic_vlan = atoi(pos);
+-+	} else if (os_strcmp(buf, "vlan_no_bridge") == 0) {
+-+		bss->ssid.vlan_no_bridge = atoi(pos);
+- 	} else if (os_strcmp(buf, "per_sta_vif") == 0) {
+- 		bss->ssid.per_sta_vif = atoi(pos);
+- 	} else if (os_strcmp(buf, "vlan_file") == 0) {
+diff --git a/package/network/services/hostapd/patches/711-wds_bridge_force.patch b/package/network/services/hostapd/patches/711-wds_bridge_force.patch
+deleted file mode 100644
+index e04ae62538..0000000000
+--- a/package/network/services/hostapd/patches/711-wds_bridge_force.patch
++++ /dev/null
+@@ -1,22 +0,0 @@
+---- a/hostapd/config_file.c
+-+++ b/hostapd/config_file.c
+-@@ -2316,6 +2316,8 @@ static int hostapd_config_fill(struct ho
+- 			   sizeof(conf->bss[0]->iface));
+- 	} else if (os_strcmp(buf, "bridge") == 0) {
+- 		os_strlcpy(bss->bridge, pos, sizeof(bss->bridge));
+-+		if (!bss->wds_bridge[0])
+-+			os_strlcpy(bss->wds_bridge, pos, sizeof(bss->wds_bridge));
+- 	} else if (os_strcmp(buf, "bridge_hairpin") == 0) {
+- 		bss->bridge_hairpin = atoi(pos);
+- 	} else if (os_strcmp(buf, "vlan_bridge") == 0) {
+---- a/src/ap/ap_drv_ops.c
+-+++ b/src/ap/ap_drv_ops.c
+-@@ -348,8 +348,6 @@ int hostapd_set_wds_sta(struct hostapd_d
+- 		return -1;
+- 	if (hapd->conf->wds_bridge[0])
+- 		bridge = hapd->conf->wds_bridge;
+--	else if (hapd->conf->bridge[0])
+--		bridge = hapd->conf->bridge;
+- 	return hapd->driver->set_wds_sta(hapd->drv_priv, addr, aid, val,
+- 					 bridge, ifname_wds);
+- }
+diff --git a/package/network/services/hostapd/patches/720-iface_max_num_sta.patch b/package/network/services/hostapd/patches/720-iface_max_num_sta.patch
+deleted file mode 100644
+index a06f141c83..0000000000
+--- a/package/network/services/hostapd/patches/720-iface_max_num_sta.patch
++++ /dev/null
+@@ -1,82 +0,0 @@
+---- a/hostapd/config_file.c
+-+++ b/hostapd/config_file.c
+-@@ -2848,6 +2848,14 @@ static int hostapd_config_fill(struct ho
+- 				   line, bss->max_num_sta, MAX_STA_COUNT);
+- 			return 1;
+- 		}
+-+	} else if (os_strcmp(buf, "iface_max_num_sta") == 0) {
+-+		conf->max_num_sta = atoi(pos);
+-+		if (conf->max_num_sta < 0 ||
+-+		    conf->max_num_sta > MAX_STA_COUNT) {
+-+			wpa_printf(MSG_ERROR, "Line %d: Invalid max_num_sta=%d; allowed range 0..%d",
+-+				   line, conf->max_num_sta, MAX_STA_COUNT);
+-+			return 1;
+-+		}
+- 	} else if (os_strcmp(buf, "wpa") == 0) {
+- 		bss->wpa = atoi(pos);
+- 	} else if (os_strcmp(buf, "extended_key_id") == 0) {
+---- a/src/ap/hostapd.h
+-+++ b/src/ap/hostapd.h
+-@@ -721,6 +721,7 @@ void hostapd_cleanup_cs_params(struct ho
+- void hostapd_periodic_iface(struct hostapd_iface *iface);
+- int hostapd_owe_trans_get_info(struct hostapd_data *hapd);
+- void hostapd_ocv_check_csa_sa_query(void *eloop_ctx, void *timeout_ctx);
+-+int hostapd_check_max_sta(struct hostapd_data *hapd);
+- 
+- void hostapd_switch_color(struct hostapd_data *hapd, u64 bitmap);
+- void hostapd_cleanup_cca_params(struct hostapd_data *hapd);
+---- a/src/ap/hostapd.c
+-+++ b/src/ap/hostapd.c
+-@@ -271,6 +271,30 @@ static int hostapd_iface_conf_changed(st
+- }
+- 
+- 
+-+static inline int hostapd_iface_num_sta(struct hostapd_iface *iface)
+-+{
+-+	int num_sta = 0;
+-+	int i;
+-+
+-+	for (i = 0; i < iface->num_bss; i++)
+-+		num_sta += iface->bss[i]->num_sta;
+-+
+-+	return num_sta;
+-+}
+-+
+-+
+-+int hostapd_check_max_sta(struct hostapd_data *hapd)
+-+{
+-+	if (hapd->num_sta >= hapd->conf->max_num_sta)
+-+		return 1;
+-+
+-+	if (hapd->iconf->max_num_sta &&
+-+	    hostapd_iface_num_sta(hapd->iface) >= hapd->iconf->max_num_sta)
+-+		return 1;
+-+
+-+	return 0;
+-+}
+-+
+- int hostapd_reload_config(struct hostapd_iface *iface, int reconf)
+- {
+- 	struct hapd_interfaces *interfaces = iface->interfaces;
+---- a/src/ap/beacon.c
+-+++ b/src/ap/beacon.c
+-@@ -1222,7 +1222,7 @@ void handle_probe_req(struct hostapd_dat
+- 	if (hapd->conf->no_probe_resp_if_max_sta &&
+- 	    is_multicast_ether_addr(mgmt->da) &&
+- 	    is_multicast_ether_addr(mgmt->bssid) &&
+--	    hapd->num_sta >= hapd->conf->max_num_sta &&
+-+	    hostapd_check_max_sta(hapd) &&
+- 	    !ap_get_sta(hapd, mgmt->sa)) {
+- 		wpa_printf(MSG_MSGDUMP, "%s: Ignore Probe Request from " MACSTR
+- 			   " since no room for additional STA",
+---- a/src/ap/ap_config.h
+-+++ b/src/ap/ap_config.h
+-@@ -1026,6 +1026,8 @@ struct hostapd_config {
+- 	unsigned int track_sta_max_num;
+- 	unsigned int track_sta_max_age;
+- 
+-+	int max_num_sta;
+-+
+- 	char country[3]; /* first two octets: country code as described in
+- 			  * ISO/IEC 3166-1. Third octet:
+- 			  * ' ' (ascii 32): all environments
+diff --git a/package/network/services/hostapd/patches/730-ft_iface.patch b/package/network/services/hostapd/patches/730-ft_iface.patch
+deleted file mode 100644
+index 1826c97623..0000000000
+--- a/package/network/services/hostapd/patches/730-ft_iface.patch
++++ /dev/null
+@@ -1,38 +0,0 @@
+---- a/hostapd/config_file.c
+-+++ b/hostapd/config_file.c
+-@@ -3007,6 +3007,8 @@ static int hostapd_config_fill(struct ho
+- 		wpa_printf(MSG_INFO,
+- 			   "Line %d: Obsolete peerkey parameter ignored", line);
+- #ifdef CONFIG_IEEE80211R_AP
+-+	} else if (os_strcmp(buf, "ft_iface") == 0) {
+-+		os_strlcpy(bss->ft_iface, pos, sizeof(bss->ft_iface));
+- 	} else if (os_strcmp(buf, "mobility_domain") == 0) {
+- 		if (os_strlen(pos) != 2 * MOBILITY_DOMAIN_ID_LEN ||
+- 		    hexstr2bin(pos, bss->mobility_domain,
+---- a/src/ap/ap_config.h
+-+++ b/src/ap/ap_config.h
+-@@ -283,6 +283,7 @@ struct airtime_sta_weight {
+- struct hostapd_bss_config {
+- 	char iface[IFNAMSIZ + 1];
+- 	char bridge[IFNAMSIZ + 1];
+-+	char ft_iface[IFNAMSIZ + 1];
+- 	char vlan_bridge[IFNAMSIZ + 1];
+- 	char wds_bridge[IFNAMSIZ + 1];
+- 	int bridge_hairpin; /* hairpin_mode on bridge members */
+---- a/src/ap/wpa_auth_glue.c
+-+++ b/src/ap/wpa_auth_glue.c
+-@@ -1616,8 +1616,12 @@ int hostapd_setup_wpa(struct hostapd_dat
+- 	    wpa_key_mgmt_ft(hapd->conf->wpa_key_mgmt)) {
+- 		const char *ft_iface;
+- 
+--		ft_iface = hapd->conf->bridge[0] ? hapd->conf->bridge :
+--			   hapd->conf->iface;
+-+		if (hapd->conf->ft_iface[0])
+-+			ft_iface = hapd->conf->ft_iface;
+-+		else if (hapd->conf->bridge[0])
+-+			ft_iface = hapd->conf->bridge;
+-+		else
+-+			ft_iface = hapd->conf->iface;
+- 		hapd->l2 = l2_packet_init(ft_iface, NULL, ETH_P_RRB,
+- 					  hostapd_rrb_receive, hapd, 1);
+- 		if (!hapd->l2) {
+diff --git a/package/network/services/hostapd/patches/740-snoop_iface.patch b/package/network/services/hostapd/patches/740-snoop_iface.patch
+deleted file mode 100644
+index a116644736..0000000000
+--- a/package/network/services/hostapd/patches/740-snoop_iface.patch
++++ /dev/null
+@@ -1,66 +0,0 @@
+---- a/src/ap/ap_config.h
+-+++ b/src/ap/ap_config.h
+-@@ -284,6 +284,7 @@ struct hostapd_bss_config {
+- 	char iface[IFNAMSIZ + 1];
+- 	char bridge[IFNAMSIZ + 1];
+- 	char ft_iface[IFNAMSIZ + 1];
+-+	char snoop_iface[IFNAMSIZ + 1];
+- 	char vlan_bridge[IFNAMSIZ + 1];
+- 	char wds_bridge[IFNAMSIZ + 1];
+- 	int bridge_hairpin; /* hairpin_mode on bridge members */
+---- a/src/ap/x_snoop.c
+-+++ b/src/ap/x_snoop.c
+-@@ -33,14 +33,16 @@ int x_snoop_init(struct hostapd_data *ha
+- 
+- 	hapd->x_snoop_initialized = true;
+- 
+--	if (hostapd_drv_br_port_set_attr(hapd, DRV_BR_PORT_ATTR_HAIRPIN_MODE,
+-+	if (!conf->snoop_iface[0] &&
+-+	    hostapd_drv_br_port_set_attr(hapd, DRV_BR_PORT_ATTR_HAIRPIN_MODE,
+- 					 1)) {
+- 		wpa_printf(MSG_DEBUG,
+- 			   "x_snoop: Failed to enable hairpin_mode on the bridge port");
+- 		return -1;
+- 	}
+- 
+--	if (hostapd_drv_br_port_set_attr(hapd, DRV_BR_PORT_ATTR_PROXYARP, 1)) {
+-+	if (!conf->snoop_iface[0] &&
+-+	    hostapd_drv_br_port_set_attr(hapd, DRV_BR_PORT_ATTR_PROXYARP, 1)) {
+- 		wpa_printf(MSG_DEBUG,
+- 			   "x_snoop: Failed to enable proxyarp on the bridge port");
+- 		return -1;
+-@@ -54,7 +56,8 @@ int x_snoop_init(struct hostapd_data *ha
+- 	}
+- 
+- #ifdef CONFIG_IPV6
+--	if (hostapd_drv_br_set_net_param(hapd, DRV_BR_MULTICAST_SNOOPING, 1)) {
+-+	if (!conf->snoop_iface[0] &&
+-+	    hostapd_drv_br_set_net_param(hapd, DRV_BR_MULTICAST_SNOOPING, 1)) {
+- 		wpa_printf(MSG_DEBUG,
+- 			   "x_snoop: Failed to enable multicast snooping on the bridge");
+- 		return -1;
+-@@ -73,8 +76,12 @@ x_snoop_get_l2_packet(struct hostapd_dat
+- {
+- 	struct hostapd_bss_config *conf = hapd->conf;
+- 	struct l2_packet_data *l2;
+-+	const char *ifname = conf->bridge;
+- 
+--	l2 = l2_packet_init(conf->bridge, NULL, ETH_P_ALL, handler, hapd, 1);
+-+	if (conf->snoop_iface[0])
+-+		ifname = conf->snoop_iface;
+-+
+-+	l2 = l2_packet_init(ifname, NULL, ETH_P_ALL, handler, hapd, 1);
+- 	if (l2 == NULL) {
+- 		wpa_printf(MSG_DEBUG,
+- 			   "x_snoop: Failed to initialize L2 packet processing %s",
+---- a/hostapd/config_file.c
+-+++ b/hostapd/config_file.c
+-@@ -2320,6 +2320,8 @@ static int hostapd_config_fill(struct ho
+- 			os_strlcpy(bss->wds_bridge, pos, sizeof(bss->wds_bridge));
+- 	} else if (os_strcmp(buf, "bridge_hairpin") == 0) {
+- 		bss->bridge_hairpin = atoi(pos);
+-+	} else if (os_strcmp(buf, "snoop_iface") == 0) {
+-+		os_strlcpy(bss->snoop_iface, pos, sizeof(bss->snoop_iface));
+- 	} else if (os_strcmp(buf, "vlan_bridge") == 0) {
+- 		os_strlcpy(bss->vlan_bridge, pos, sizeof(bss->vlan_bridge));
+- 	} else if (os_strcmp(buf, "wds_bridge") == 0) {
+diff --git a/package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch b/package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch
+deleted file mode 100644
+index c3a77bc653..0000000000
+--- a/package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch
++++ /dev/null
+@@ -1,97 +0,0 @@
+---- a/hostapd/config_file.c
+-+++ b/hostapd/config_file.c
+-@@ -1602,6 +1602,8 @@ static int parse_anqp_elem(struct hostap
+- 	return 0;
+- }
+- 
+-+#endif /* CONFIG_INTERWORKING */
+-+
+- 
+- static int parse_qos_map_set(struct hostapd_bss_config *bss,
+- 			     char *buf, int line)
+-@@ -1643,8 +1645,6 @@ static int parse_qos_map_set(struct host
+- 	return 0;
+- }
+- 
+--#endif /* CONFIG_INTERWORKING */
+--
+- 
+- #ifdef CONFIG_HS20
+- static int hs20_parse_conn_capab(struct hostapd_bss_config *bss, char *buf,
+-@@ -4064,10 +4064,10 @@ static int hostapd_config_fill(struct ho
+- 		bss->gas_frag_limit = val;
+- 	} else if (os_strcmp(buf, "gas_comeback_delay") == 0) {
+- 		bss->gas_comeback_delay = atoi(pos);
+-+#endif /* CONFIG_INTERWORKING */
+- 	} else if (os_strcmp(buf, "qos_map_set") == 0) {
+- 		if (parse_qos_map_set(bss, pos, line) < 0)
+- 			return 1;
+--#endif /* CONFIG_INTERWORKING */
+- #ifdef CONFIG_RADIUS_TEST
+- 	} else if (os_strcmp(buf, "dump_msk_file") == 0) {
+- 		os_free(bss->dump_msk_file);
+---- a/src/ap/hostapd.c
+-+++ b/src/ap/hostapd.c
+-@@ -1499,6 +1499,7 @@ static int hostapd_setup_bss(struct host
+- 		wpa_printf(MSG_ERROR, "GAS server initialization failed");
+- 		return -1;
+- 	}
+-+#endif /* CONFIG_INTERWORKING */
+- 
+- 	if (conf->qos_map_set_len &&
+- 	    hostapd_drv_set_qos_map(hapd, conf->qos_map_set,
+-@@ -1506,7 +1507,6 @@ static int hostapd_setup_bss(struct host
+- 		wpa_printf(MSG_ERROR, "Failed to initialize QoS Map");
+- 		return -1;
+- 	}
+--#endif /* CONFIG_INTERWORKING */
+- 
+- 	if (conf->bss_load_update_period && bss_load_update_init(hapd)) {
+- 		wpa_printf(MSG_ERROR, "BSS Load initialization failed");
+---- a/wpa_supplicant/events.c
+-+++ b/wpa_supplicant/events.c
+-@@ -2672,8 +2672,6 @@ void wnm_bss_keep_alive_deinit(struct wp
+- }
+- 
+- 
+--#ifdef CONFIG_INTERWORKING
+--
+- static int wpas_qos_map_set(struct wpa_supplicant *wpa_s, const u8 *qos_map,
+- 			    size_t len)
+- {
+-@@ -2706,8 +2704,6 @@ static void interworking_process_assoc_r
+- 	}
+- }
+- 
+--#endif /* CONFIG_INTERWORKING */
+--
+- 
+- static void wpa_supplicant_set_4addr_mode(struct wpa_supplicant *wpa_s)
+- {
+-@@ -3087,10 +3083,8 @@ static int wpa_supplicant_event_associnf
+- 		wnm_process_assoc_resp(wpa_s, data->assoc_info.resp_ies,
+- 				       data->assoc_info.resp_ies_len);
+- #endif /* CONFIG_WNM */
+--#ifdef CONFIG_INTERWORKING
+- 		interworking_process_assoc_resp(wpa_s, data->assoc_info.resp_ies,
+- 						data->assoc_info.resp_ies_len);
+--#endif /* CONFIG_INTERWORKING */
+- 		if (wpa_s->hw_capab == CAPAB_VHT &&
+- 		    get_ie(data->assoc_info.resp_ies,
+- 			   data->assoc_info.resp_ies_len, WLAN_EID_VHT_CAP))
+---- a/src/ap/ieee802_11_shared.c
+-+++ b/src/ap/ieee802_11_shared.c
+-@@ -1116,13 +1116,11 @@ u8 * hostapd_eid_rsnxe(struct hostapd_da
+- u16 check_ext_capab(struct hostapd_data *hapd, struct sta_info *sta,
+- 		    const u8 *ext_capab_ie, size_t ext_capab_ie_len)
+- {
+--#ifdef CONFIG_INTERWORKING
+- 	/* check for QoS Map support */
+- 	if (ext_capab_ie_len >= 5) {
+- 		if (ext_capab_ie[4] & 0x01)
+- 			sta->qos_map_enabled = 1;
+- 	}
+--#endif /* CONFIG_INTERWORKING */
+- 
+- 	if (ext_capab_ie_len > 0) {
+- 		sta->ecsa_supported = !!(ext_capab_ie[0] & BIT(2));
+diff --git a/package/network/services/hostapd/patches/751-qos_map_ignore_when_unsupported.patch b/package/network/services/hostapd/patches/751-qos_map_ignore_when_unsupported.patch
+deleted file mode 100644
+index 1fc4e8a77c..0000000000
+--- a/package/network/services/hostapd/patches/751-qos_map_ignore_when_unsupported.patch
++++ /dev/null
+@@ -1,12 +0,0 @@
+---- a/src/ap/ap_drv_ops.c
+-+++ b/src/ap/ap_drv_ops.c
+-@@ -874,7 +874,8 @@ int hostapd_start_dfs_cac(struct hostapd
+- int hostapd_drv_set_qos_map(struct hostapd_data *hapd,
+- 			    const u8 *qos_map_set, u8 qos_map_set_len)
+- {
+--	if (!hapd->driver || !hapd->driver->set_qos_map || !hapd->drv_priv)
+-+	if (!hapd->driver || !hapd->driver->set_qos_map || !hapd->drv_priv ||
+-+	    !(hapd->iface->drv_flags & WPA_DRIVER_FLAGS_QOS_MAPPING))
+- 		return 0;
+- 	return hapd->driver->set_qos_map(hapd->drv_priv, qos_map_set,
+- 					 qos_map_set_len);
+diff --git a/package/network/services/hostapd/patches/760-dynamic_own_ip.patch b/package/network/services/hostapd/patches/760-dynamic_own_ip.patch
+deleted file mode 100644
+index 2f5015892b..0000000000
+--- a/package/network/services/hostapd/patches/760-dynamic_own_ip.patch
++++ /dev/null
+@@ -1,109 +0,0 @@
+---- a/src/ap/ap_config.h
+-+++ b/src/ap/ap_config.h
+-@@ -310,6 +310,7 @@ struct hostapd_bss_config {
+- 	unsigned int eap_sim_db_timeout;
+- 	int eap_server_erp; /* Whether ERP is enabled on internal EAP server */
+- 	struct hostapd_ip_addr own_ip_addr;
+-+	int dynamic_own_ip_addr;
+- 	char *nas_identifier;
+- 	struct hostapd_radius_servers *radius;
+- 	int acct_interim_interval;
+---- a/src/radius/radius_client.c
+-+++ b/src/radius/radius_client.c
+-@@ -163,6 +163,8 @@ struct radius_client_data {
+- 	 */
+- 	void *ctx;
+- 
+-+	struct hostapd_ip_addr local_ip;
+-+
+- 	/**
+- 	 * conf - RADIUS client configuration (list of RADIUS servers to use)
+- 	 */
+-@@ -720,6 +722,30 @@ static void radius_client_list_add(struc
+- 
+- 
+- /**
+-+ * radius_client_send - Get local address for the RADIUS auth socket
+-+ * @radius: RADIUS client context from radius_client_init()
+-+ * @addr: pointer to store the address
+-+ *
+-+ * This function returns the local address for the connection to the RADIUS
+-+ * auth server. It also opens the socket if it's not available yet.
+-+ */
+-+int radius_client_get_local_addr(struct radius_client_data *radius,
+-+				 struct hostapd_ip_addr *addr)
+-+{
+-+	struct hostapd_radius_servers *conf = radius->conf;
+-+
+-+	if (conf->auth_server && radius->auth_sock < 0)
+-+		radius_client_init_auth(radius);
+-+
+-+	if (radius->auth_sock < 0)
+-+		return -1;
+-+
+-+	memcpy(addr, &radius->local_ip, sizeof(*addr));
+-+
+-+	return 0;
+-+}
+-+
+-+/**
+-  * radius_client_send - Send a RADIUS request
+-  * @radius: RADIUS client context from radius_client_init()
+-  * @msg: RADIUS message to be sent
+-@@ -1238,6 +1264,10 @@ radius_change_server(struct radius_clien
+- 			wpa_printf(MSG_DEBUG, "RADIUS local address: %s:%u",
+- 				   inet_ntoa(claddr.sin_addr),
+- 				   ntohs(claddr.sin_port));
+-+			if (auth) {
+-+				radius->local_ip.af = AF_INET;
+-+				radius->local_ip.u.v4 = claddr.sin_addr;
+-+			}
+- 		}
+- 		break;
+- #ifdef CONFIG_IPV6
+-@@ -1249,6 +1279,10 @@ radius_change_server(struct radius_clien
+- 				   inet_ntop(AF_INET6, &claddr6.sin6_addr,
+- 					     abuf, sizeof(abuf)),
+- 				   ntohs(claddr6.sin6_port));
+-+			if (auth) {
+-+				radius->local_ip.af = AF_INET6;
+-+				radius->local_ip.u.v6 = claddr6.sin6_addr;
+-+			}
+- 		}
+- 		break;
+- 	}
+---- a/src/radius/radius_client.h
+-+++ b/src/radius/radius_client.h
+-@@ -249,6 +249,8 @@ int radius_client_register(struct radius
+- void radius_client_set_interim_error_cb(struct radius_client_data *radius,
+- 					void (*cb)(const u8 *addr, void *ctx),
+- 					void *ctx);
+-+int radius_client_get_local_addr(struct radius_client_data *radius,
+-+				 struct hostapd_ip_addr * addr);
+- int radius_client_send(struct radius_client_data *radius,
+- 		       struct radius_msg *msg,
+- 		       RadiusType msg_type, const u8 *addr);
+---- a/src/ap/ieee802_1x.c
+-+++ b/src/ap/ieee802_1x.c
+-@@ -535,6 +535,10 @@ int add_common_radius_attr(struct hostap
+- 	struct hostapd_radius_attr *attr;
+- 	int len;
+- 
+-+	if (hapd->conf->dynamic_own_ip_addr)
+-+		radius_client_get_local_addr(hapd->radius,
+-+					     &hapd->conf->own_ip_addr);
+-+
+- 	if (!hostapd_config_get_radius_attr(req_attr,
+- 					    RADIUS_ATTR_NAS_IP_ADDRESS) &&
+- 	    hapd->conf->own_ip_addr.af == AF_INET &&
+---- a/hostapd/config_file.c
+-+++ b/hostapd/config_file.c
+-@@ -2688,6 +2688,8 @@ static int hostapd_config_fill(struct ho
+- 	} else if (os_strcmp(buf, "iapp_interface") == 0) {
+- 		wpa_printf(MSG_INFO, "DEPRECATED: iapp_interface not used");
+- #endif /* CONFIG_IAPP */
+-+	} else if (os_strcmp(buf, "dynamic_own_ip_addr") == 0) {
+-+		bss->dynamic_own_ip_addr = atoi(pos);
+- 	} else if (os_strcmp(buf, "own_ip_addr") == 0) {
+- 		if (hostapd_parse_ip_addr(pos, &bss->own_ip_addr)) {
+- 			wpa_printf(MSG_ERROR,
+diff --git a/package/network/services/hostapd/patches/761-shared_das_port.patch b/package/network/services/hostapd/patches/761-shared_das_port.patch
+deleted file mode 100644
+index 59c2a96795..0000000000
+--- a/package/network/services/hostapd/patches/761-shared_das_port.patch
++++ /dev/null
+@@ -1,298 +0,0 @@
+---- a/src/radius/radius_das.h
+-+++ b/src/radius/radius_das.h
+-@@ -44,6 +44,7 @@ struct radius_das_attrs {
+- struct radius_das_conf {
+- 	int port;
+- 	const u8 *shared_secret;
+-+	const u8 *nas_identifier;
+- 	size_t shared_secret_len;
+- 	const struct hostapd_ip_addr *client_addr;
+- 	unsigned int time_window;
+---- a/src/ap/hostapd.c
+-+++ b/src/ap/hostapd.c
+-@@ -1442,6 +1442,7 @@ static int hostapd_setup_bss(struct host
+- 		struct radius_das_conf das_conf;
+- 		os_memset(&das_conf, 0, sizeof(das_conf));
+- 		das_conf.port = conf->radius_das_port;
+-+		das_conf.nas_identifier = conf->nas_identifier;
+- 		das_conf.shared_secret = conf->radius_das_shared_secret;
+- 		das_conf.shared_secret_len =
+- 			conf->radius_das_shared_secret_len;
+---- a/src/radius/radius_das.c
+-+++ b/src/radius/radius_das.c
+-@@ -12,13 +12,26 @@
+- #include "utils/common.h"
+- #include "utils/eloop.h"
+- #include "utils/ip_addr.h"
+-+#include "utils/list.h"
+- #include "radius.h"
+- #include "radius_das.h"
+- 
+- 
+--struct radius_das_data {
+-+static struct dl_list das_ports = DL_LIST_HEAD_INIT(das_ports);
+-+
+-+struct radius_das_port {
+-+	struct dl_list list;
+-+	struct dl_list das_data;
+-+
+-+	int port;
+- 	int sock;
+-+};
+-+
+-+struct radius_das_data {
+-+	struct dl_list list;
+-+	struct radius_das_port *port;
+- 	u8 *shared_secret;
+-+	u8 *nas_identifier;
+- 	size_t shared_secret_len;
+- 	struct hostapd_ip_addr client_addr;
+- 	unsigned int time_window;
+-@@ -378,56 +391,17 @@ fail:
+- }
+- 
+- 
+--static void radius_das_receive(int sock, void *eloop_ctx, void *sock_ctx)
+-+static void
+-+radius_das_receive_msg(struct radius_das_data *das, struct radius_msg *msg,
+-+		       struct sockaddr *from, socklen_t fromlen,
+-+		       char *abuf, int from_port)
+- {
+--	struct radius_das_data *das = eloop_ctx;
+--	u8 buf[1500];
+--	union {
+--		struct sockaddr_storage ss;
+--		struct sockaddr_in sin;
+--#ifdef CONFIG_IPV6
+--		struct sockaddr_in6 sin6;
+--#endif /* CONFIG_IPV6 */
+--	} from;
+--	char abuf[50];
+--	int from_port = 0;
+--	socklen_t fromlen;
+--	int len;
+--	struct radius_msg *msg, *reply = NULL;
+-+	struct radius_msg *reply = NULL;
+- 	struct radius_hdr *hdr;
+- 	struct wpabuf *rbuf;
+-+	struct os_time now;
+- 	u32 val;
+- 	int res;
+--	struct os_time now;
+--
+--	fromlen = sizeof(from);
+--	len = recvfrom(sock, buf, sizeof(buf), 0,
+--		       (struct sockaddr *) &from.ss, &fromlen);
+--	if (len < 0) {
+--		wpa_printf(MSG_ERROR, "DAS: recvfrom: %s", strerror(errno));
+--		return;
+--	}
+--
+--	os_strlcpy(abuf, inet_ntoa(from.sin.sin_addr), sizeof(abuf));
+--	from_port = ntohs(from.sin.sin_port);
+--
+--	wpa_printf(MSG_DEBUG, "DAS: Received %d bytes from %s:%d",
+--		   len, abuf, from_port);
+--	if (das->client_addr.u.v4.s_addr &&
+--	    das->client_addr.u.v4.s_addr != from.sin.sin_addr.s_addr) {
+--		wpa_printf(MSG_DEBUG, "DAS: Drop message from unknown client");
+--		return;
+--	}
+--
+--	msg = radius_msg_parse(buf, len);
+--	if (msg == NULL) {
+--		wpa_printf(MSG_DEBUG, "DAS: Parsing incoming RADIUS packet "
+--			   "from %s:%d failed", abuf, from_port);
+--		return;
+--	}
+--
+--	if (wpa_debug_level <= MSG_MSGDUMP)
+--		radius_msg_dump(msg);
+- 
+- 	if (radius_msg_verify_das_req(msg, das->shared_secret,
+- 				       das->shared_secret_len,
+-@@ -494,9 +468,8 @@ static void radius_das_receive(int sock,
+- 			radius_msg_dump(reply);
+- 
+- 		rbuf = radius_msg_get_buf(reply);
+--		res = sendto(das->sock, wpabuf_head(rbuf),
+--			     wpabuf_len(rbuf), 0,
+--			     (struct sockaddr *) &from.ss, fromlen);
+-+		res = sendto(das->port->sock, wpabuf_head(rbuf),
+-+			     wpabuf_len(rbuf), 0, from, fromlen);
+- 		if (res < 0) {
+- 			wpa_printf(MSG_ERROR, "DAS: sendto(to %s:%d): %s",
+- 				   abuf, from_port, strerror(errno));
+-@@ -508,6 +481,72 @@ fail:
+- 	radius_msg_free(reply);
+- }
+- 
+-+static void radius_das_receive(int sock, void *eloop_ctx, void *sock_ctx)
+-+{
+-+	struct radius_das_port *p = eloop_ctx;
+-+	struct radius_das_data *das;
+-+	u8 buf[1500];
+-+	union {
+-+		struct sockaddr_storage ss;
+-+		struct sockaddr_in sin;
+-+#ifdef CONFIG_IPV6
+-+		struct sockaddr_in6 sin6;
+-+#endif /* CONFIG_IPV6 */
+-+	} from;
+-+	struct radius_msg *msg;
+-+	size_t nasid_len = 0;
+-+	u8 *nasid_buf = NULL;
+-+	char abuf[50];
+-+	int from_port = 0;
+-+	socklen_t fromlen;
+-+	int found = 0;
+-+	int len;
+-+
+-+	fromlen = sizeof(from);
+-+	len = recvfrom(sock, buf, sizeof(buf), 0,
+-+		       (struct sockaddr *) &from.ss, &fromlen);
+-+	if (len < 0) {
+-+		wpa_printf(MSG_ERROR, "DAS: recvfrom: %s", strerror(errno));
+-+		return;
+-+	}
+-+
+-+	os_strlcpy(abuf, inet_ntoa(from.sin.sin_addr), sizeof(abuf));
+-+	from_port = ntohs(from.sin.sin_port);
+-+
+-+	msg = radius_msg_parse(buf, len);
+-+	if (msg == NULL) {
+-+		wpa_printf(MSG_DEBUG, "DAS: Parsing incoming RADIUS packet "
+-+			   "from %s:%d failed", abuf, from_port);
+-+		return;
+-+	}
+-+
+-+	wpa_printf(MSG_DEBUG, "DAS: Received %d bytes from %s:%d",
+-+		   len, abuf, from_port);
+-+
+-+	if (wpa_debug_level <= MSG_MSGDUMP)
+-+		radius_msg_dump(msg);
+-+
+-+	radius_msg_get_attr_ptr(msg, RADIUS_ATTR_NAS_IDENTIFIER,
+-+				&nasid_buf, &nasid_len, NULL);
+-+	dl_list_for_each(das, &p->das_data, struct radius_das_data, list) {
+-+		if (das->client_addr.u.v4.s_addr &&
+-+		    das->client_addr.u.v4.s_addr != from.sin.sin_addr.s_addr)
+-+			continue;
+-+
+-+		if (das->nas_identifier && nasid_buf &&
+-+		    (nasid_len != os_strlen(das->nas_identifier) ||
+-+		     os_memcmp(das->nas_identifier, nasid_buf, nasid_len) != 0))
+-+			continue;
+-+
+-+		found = 1;
+-+		radius_das_receive_msg(das, msg, (struct sockaddr *)&from.ss,
+-+				       fromlen, abuf, from_port);
+-+	}
+-+
+-+	if (!found)
+-+		wpa_printf(MSG_DEBUG, "DAS: Drop message from unknown client");
+-+}
+-+
+- 
+- static int radius_das_open_socket(int port)
+- {
+-@@ -533,6 +572,49 @@ static int radius_das_open_socket(int po
+- }
+- 
+- 
+-+static struct radius_das_port *
+-+radius_das_open_port(int port)
+-+{
+-+	struct radius_das_port *p;
+-+
+-+	dl_list_for_each(p, &das_ports, struct radius_das_port, list) {
+-+		if (p->port == port)
+-+			return p;
+-+	}
+-+
+-+	p = os_zalloc(sizeof(*p));
+-+	if (p == NULL)
+-+		return NULL;
+-+
+-+	dl_list_init(&p->das_data);
+-+	p->port = port;
+-+	p->sock = radius_das_open_socket(port);
+-+	if (p->sock < 0)
+-+		goto free_port;
+-+
+-+	if (eloop_register_read_sock(p->sock, radius_das_receive, p, NULL))
+-+		goto close_port;
+-+
+-+	dl_list_add(&das_ports, &p->list);
+-+
+-+	return p;
+-+
+-+close_port:
+-+	close(p->sock);
+-+free_port:
+-+	os_free(p);
+-+
+-+	return NULL;
+-+}
+-+
+-+static void radius_das_close_port(struct radius_das_port *p)
+-+{
+-+	dl_list_del(&p->list);
+-+	eloop_unregister_read_sock(p->sock);
+-+	close(p->sock);
+-+	free(p);
+-+}
+-+
+- struct radius_das_data *
+- radius_das_init(struct radius_das_conf *conf)
+- {
+-@@ -553,6 +635,8 @@ radius_das_init(struct radius_das_conf *
+- 	das->ctx = conf->ctx;
+- 	das->disconnect = conf->disconnect;
+- 	das->coa = conf->coa;
+-+	if (conf->nas_identifier)
+-+		das->nas_identifier = os_strdup(conf->nas_identifier);
+- 
+- 	os_memcpy(&das->client_addr, conf->client_addr,
+- 		  sizeof(das->client_addr));
+-@@ -565,19 +649,15 @@ radius_das_init(struct radius_das_conf *
+- 	}
+- 	das->shared_secret_len = conf->shared_secret_len;
+- 
+--	das->sock = radius_das_open_socket(conf->port);
+--	if (das->sock < 0) {
+-+	das->port = radius_das_open_port(conf->port);
+-+	if (!das->port) {
+- 		wpa_printf(MSG_ERROR, "Failed to open UDP socket for RADIUS "
+- 			   "DAS");
+- 		radius_das_deinit(das);
+- 		return NULL;
+- 	}
+- 
+--	if (eloop_register_read_sock(das->sock, radius_das_receive, das, NULL))
+--	{
+--		radius_das_deinit(das);
+--		return NULL;
+--	}
+-+	dl_list_add(&das->port->das_data, &das->list);
+- 
+- 	return das;
+- }
+-@@ -588,11 +668,14 @@ void radius_das_deinit(struct radius_das
+- 	if (das == NULL)
+- 		return;
+- 
+--	if (das->sock >= 0) {
+--		eloop_unregister_read_sock(das->sock);
+--		close(das->sock);
+-+	if (das->port) {
+-+		dl_list_del(&das->list);
+-+
+-+		if (dl_list_empty(&das->port->das_data))
+-+			radius_das_close_port(das->port);
+- 	}
+- 
+-+	os_free(das->nas_identifier);
+- 	os_free(das->shared_secret);
+- 	os_free(das);
+- }
+diff --git a/package/network/services/hostapd/patches/990-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch b/package/network/services/hostapd/patches/990-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch
+deleted file mode 100644
+index 51690def09..0000000000
+--- a/package/network/services/hostapd/patches/990-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch
++++ /dev/null
+@@ -1,33 +0,0 @@
+-From f0e9f5aab52b3eab85d28338cc996972ced4c39c Mon Sep 17 00:00:00 2001
+-From: David Bauer <mail@david-bauer.net>
+-Date: Tue, 17 May 2022 23:07:59 +0200
+-Subject: [PATCH] ctrl: make WNM_AP functions dependant on CONFIG_AP
+-
+-This fixes linking errors found when compiling wpa_supplicant with
+-CONFIG_WNM_AP enabled but CONFIG_AP disabled.
+-
+-Signed-off-by: David Bauer <mail@david-bauer.net>
+----
+- wpa_supplicant/ctrl_iface.c | 4 ++--
+- 1 file changed, 2 insertions(+), 2 deletions(-)
+-
+---- a/wpa_supplicant/ctrl_iface.c
+-+++ b/wpa_supplicant/ctrl_iface.c
+-@@ -12640,7 +12640,7 @@ char * wpa_supplicant_ctrl_iface_process
+- 		if (wpas_ctrl_iface_coloc_intf_report(wpa_s, buf + 18))
+- 			reply_len = -1;
+- #endif /* CONFIG_WNM */
+--#ifdef CONFIG_WNM_AP
+-+#if defined(CONFIG_AP) && defined(CONFIG_WNM_AP)
+- 	} else if (os_strncmp(buf, "DISASSOC_IMMINENT ", 18) == 0) {
+- 		if (ap_ctrl_iface_disassoc_imminent(wpa_s, buf + 18))
+- 			reply_len = -1;
+-@@ -12650,7 +12650,7 @@ char * wpa_supplicant_ctrl_iface_process
+- 	} else if (os_strncmp(buf, "BSS_TM_REQ ", 11) == 0) {
+- 		if (ap_ctrl_iface_bss_tm_req(wpa_s, buf + 11))
+- 			reply_len = -1;
+--#endif /* CONFIG_WNM_AP */
+-+#endif /* CONFIG_AP && CONFIG_WNM_AP */
+- 	} else if (os_strcmp(buf, "FLUSH") == 0) {
+- 		wpa_supplicant_ctrl_iface_flush(wpa_s);
+- 	} else if (os_strncmp(buf, "RADIO_WORK ", 11) == 0) {
+diff --git a/package/network/services/hostapd/src/src/ap/ubus.c b/package/network/services/hostapd/src/src/ap/ubus.c
+deleted file mode 100644
+index ddd86447eb..0000000000
+--- a/package/network/services/hostapd/src/src/ap/ubus.c
++++ /dev/null
+@@ -1,2101 +0,0 @@
+-/*
+- * hostapd / ubus support
+- * Copyright (c) 2013, Felix Fietkau <nbd@nbd.name>
+- *
+- * This software may be distributed under the terms of the BSD license.
+- * See README for more details.
+- */
+-
+-#include "utils/includes.h"
+-#include "utils/common.h"
+-#include "utils/eloop.h"
+-#include "utils/wpabuf.h"
+-#include "common/ieee802_11_defs.h"
+-#include "common/hw_features_common.h"
+-#include "hostapd.h"
+-#include "neighbor_db.h"
+-#include "wps_hostapd.h"
+-#include "sta_info.h"
+-#include "ubus.h"
+-#include "ap_drv_ops.h"
+-#include "beacon.h"
+-#include "rrm.h"
+-#include "wnm_ap.h"
+-#include "taxonomy.h"
+-#include "airtime_policy.h"
+-#include "hw_features.h"
+-
+-static struct ubus_context *ctx;
+-static struct blob_buf b;
+-static int ctx_ref;
+-
+-static inline struct hapd_interfaces *get_hapd_interfaces_from_object(struct ubus_object *obj)
+-{
+-	return container_of(obj, struct hapd_interfaces, ubus);
+-}
+-
+-static inline struct hostapd_data *get_hapd_from_object(struct ubus_object *obj)
+-{
+-	return container_of(obj, struct hostapd_data, ubus.obj);
+-}
+-
+-struct ubus_banned_client {
+-	struct avl_node avl;
+-	u8 addr[ETH_ALEN];
+-};
+-
+-static void ubus_receive(int sock, void *eloop_ctx, void *sock_ctx)
+-{
+-	struct ubus_context *ctx = eloop_ctx;
+-	ubus_handle_event(ctx);
+-}
+-
+-static void ubus_reconnect_timeout(void *eloop_data, void *user_ctx)
+-{
+-	if (ubus_reconnect(ctx, NULL)) {
+-		eloop_register_timeout(1, 0, ubus_reconnect_timeout, ctx, NULL);
+-		return;
+-	}
+-
+-	eloop_register_read_sock(ctx->sock.fd, ubus_receive, ctx, NULL);
+-}
+-
+-static void hostapd_ubus_connection_lost(struct ubus_context *ctx)
+-{
+-	eloop_unregister_read_sock(ctx->sock.fd);
+-	eloop_register_timeout(1, 0, ubus_reconnect_timeout, ctx, NULL);
+-}
+-
+-static bool hostapd_ubus_init(void)
+-{
+-	if (ctx)
+-		return true;
+-
+-	ctx = ubus_connect(NULL);
+-	if (!ctx)
+-		return false;
+-
+-	ctx->connection_lost = hostapd_ubus_connection_lost;
+-	eloop_register_read_sock(ctx->sock.fd, ubus_receive, ctx, NULL);
+-	return true;
+-}
+-
+-static void hostapd_ubus_ref_inc(void)
+-{
+-	ctx_ref++;
+-}
+-
+-static void hostapd_ubus_ref_dec(void)
+-{
+-	ctx_ref--;
+-	if (!ctx)
+-		return;
+-
+-	if (ctx_ref)
+-		return;
+-
+-	eloop_unregister_read_sock(ctx->sock.fd);
+-	ubus_free(ctx);
+-	ctx = NULL;
+-}
+-
+-void hostapd_ubus_add_iface(struct hostapd_iface *iface)
+-{
+-	if (!hostapd_ubus_init())
+-		return;
+-}
+-
+-void hostapd_ubus_free_iface(struct hostapd_iface *iface)
+-{
+-	if (!ctx)
+-		return;
+-}
+-
+-static void hostapd_notify_ubus(struct ubus_object *obj, char *bssname, char *event)
+-{
+-	char *event_type;
+-
+-	if (!ctx || !obj)
+-		return;
+-
+-	if (asprintf(&event_type, "bss.%s", event) < 0)
+-		return;
+-
+-	blob_buf_init(&b, 0);
+-	blobmsg_add_string(&b, "name", bssname);
+-	ubus_notify(ctx, obj, event_type, b.head, -1);
+-	free(event_type);
+-}
+-
+-static void hostapd_send_procd_event(char *bssname, char *event)
+-{
+-	char *name, *s;
+-	uint32_t id;
+-	void *v;
+-
+-	if (!ctx || ubus_lookup_id(ctx, "service", &id))
+-		return;
+-
+-	if (asprintf(&name, "hostapd.%s.%s", bssname, event) < 0)
+-		return;
+-
+-	blob_buf_init(&b, 0);
+-
+-	s = blobmsg_alloc_string_buffer(&b, "type", strlen(name) + 1);
+-	sprintf(s, "%s", name);
+-	blobmsg_add_string_buffer(&b);
+-
+-	v = blobmsg_open_table(&b, "data");
+-	blobmsg_close_table(&b, v);
+-
+-	ubus_invoke(ctx, id, "event", b.head, NULL, NULL, 1000);
+-
+-	free(name);
+-}
+-
+-static void hostapd_send_shared_event(struct ubus_object *obj, char *bssname, char *event)
+-{
+-	hostapd_send_procd_event(bssname, event);
+-	hostapd_notify_ubus(obj, bssname, event);
+-}
+-
+-static void
+-hostapd_bss_del_ban(void *eloop_data, void *user_ctx)
+-{
+-	struct ubus_banned_client *ban = eloop_data;
+-	struct hostapd_data *hapd = user_ctx;
+-
+-	avl_delete(&hapd->ubus.banned, &ban->avl);
+-	free(ban);
+-}
+-
+-static void
+-hostapd_bss_ban_client(struct hostapd_data *hapd, u8 *addr, int time)
+-{
+-	struct ubus_banned_client *ban;
+-
+-	if (time < 0)
+-		time = 0;
+-
+-	ban = avl_find_element(&hapd->ubus.banned, addr, ban, avl);
+-	if (!ban) {
+-		if (!time)
+-			return;
+-
+-		ban = os_zalloc(sizeof(*ban));
+-		memcpy(ban->addr, addr, sizeof(ban->addr));
+-		ban->avl.key = ban->addr;
+-		avl_insert(&hapd->ubus.banned, &ban->avl);
+-	} else {
+-		eloop_cancel_timeout(hostapd_bss_del_ban, ban, hapd);
+-		if (!time) {
+-			hostapd_bss_del_ban(ban, hapd);
+-			return;
+-		}
+-	}
+-
+-	eloop_register_timeout(0, time * 1000, hostapd_bss_del_ban, ban, hapd);
+-}
+-
+-static int
+-hostapd_bss_reload(struct ubus_context *ctx, struct ubus_object *obj,
+-		   struct ubus_request_data *req, const char *method,
+-		   struct blob_attr *msg)
+-{
+-	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
+-	int ret = hostapd_reload_config(hapd->iface, 1);
+-
+-	hostapd_send_shared_event(&hapd->iface->interfaces->ubus, hapd->conf->iface, "reload");
+-	return ret;
+-}
+-
+-
+-static void
+-hostapd_parse_vht_map_blobmsg(uint16_t map)
+-{
+-	char label[4];
+-	int16_t val;
+-	int i;
+-
+-	for (i = 0; i < 8; i++) {
+-		snprintf(label, 4, "%dss", i + 1);
+-
+-		val = (map & (BIT(1) | BIT(0))) + 7;
+-		blobmsg_add_u16(&b, label, val == 10 ? -1 : val);
+-		map = map >> 2;
+-	}
+-}
+-
+-static void
+-hostapd_parse_vht_capab_blobmsg(struct ieee80211_vht_capabilities *vhtc)
+-{
+-	void *supported_mcs;
+-	void *map;
+-	int i;
+-
+-	static const struct {
+-		const char *name;
+-		uint32_t flag;
+-	} vht_capas[] = {
+-		{ "su_beamformee", VHT_CAP_SU_BEAMFORMEE_CAPABLE },
+-		{ "mu_beamformee", VHT_CAP_MU_BEAMFORMEE_CAPABLE },
+-	};
+-
+-	for (i = 0; i < ARRAY_SIZE(vht_capas); i++)
+-		blobmsg_add_u8(&b, vht_capas[i].name,
+-				!!(vhtc->vht_capabilities_info & vht_capas[i].flag));
+-
+-	supported_mcs = blobmsg_open_table(&b, "mcs_map");
+-
+-	/* RX map */
+-	map = blobmsg_open_table(&b, "rx");
+-	hostapd_parse_vht_map_blobmsg(le_to_host16(vhtc->vht_supported_mcs_set.rx_map));
+-	blobmsg_close_table(&b, map);
+-
+-	/* TX map */
+-	map = blobmsg_open_table(&b, "tx");
+-	hostapd_parse_vht_map_blobmsg(le_to_host16(vhtc->vht_supported_mcs_set.tx_map));
+-	blobmsg_close_table(&b, map);
+-
+-	blobmsg_close_table(&b, supported_mcs);
+-}
+-
+-static void
+-hostapd_parse_capab_blobmsg(struct sta_info *sta)
+-{
+-	void *r, *v;
+-
+-	v = blobmsg_open_table(&b, "capabilities");
+-
+-	if (sta->vht_capabilities) {
+-		r = blobmsg_open_table(&b, "vht");
+-		hostapd_parse_vht_capab_blobmsg(sta->vht_capabilities);
+-		blobmsg_close_table(&b, r);
+-	}
+-
+-	/* ToDo: Add HT / HE capability parsing */
+-
+-	blobmsg_close_table(&b, v);
+-}
+-
+-static int
+-hostapd_bss_get_clients(struct ubus_context *ctx, struct ubus_object *obj,
+-			struct ubus_request_data *req, const char *method,
+-			struct blob_attr *msg)
+-{
+-	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
+-	struct hostap_sta_driver_data sta_driver_data;
+-	struct sta_info *sta;
+-	void *list, *c;
+-	char mac_buf[20];
+-	static const struct {
+-		const char *name;
+-		uint32_t flag;
+-	} sta_flags[] = {
+-		{ "auth", WLAN_STA_AUTH },
+-		{ "assoc", WLAN_STA_ASSOC },
+-		{ "authorized", WLAN_STA_AUTHORIZED },
+-		{ "preauth", WLAN_STA_PREAUTH },
+-		{ "wds", WLAN_STA_WDS },
+-		{ "wmm", WLAN_STA_WMM },
+-		{ "ht", WLAN_STA_HT },
+-		{ "vht", WLAN_STA_VHT },
+-		{ "he", WLAN_STA_HE },
+-		{ "wps", WLAN_STA_WPS },
+-		{ "mfp", WLAN_STA_MFP },
+-	};
+-
+-	blob_buf_init(&b, 0);
+-	blobmsg_add_u32(&b, "freq", hapd->iface->freq);
+-	list = blobmsg_open_table(&b, "clients");
+-	for (sta = hapd->sta_list; sta; sta = sta->next) {
+-		void *r;
+-		int i;
+-
+-		sprintf(mac_buf, MACSTR, MAC2STR(sta->addr));
+-		c = blobmsg_open_table(&b, mac_buf);
+-		for (i = 0; i < ARRAY_SIZE(sta_flags); i++)
+-			blobmsg_add_u8(&b, sta_flags[i].name,
+-				       !!(sta->flags & sta_flags[i].flag));
+-
+-#ifdef CONFIG_MBO
+-		blobmsg_add_u8(&b, "mbo", !!(sta->cell_capa));
+-#endif
+-
+-		r = blobmsg_open_array(&b, "rrm");
+-		for (i = 0; i < ARRAY_SIZE(sta->rrm_enabled_capa); i++)
+-			blobmsg_add_u32(&b, "", sta->rrm_enabled_capa[i]);
+-		blobmsg_close_array(&b, r);
+-
+-		r = blobmsg_open_array(&b, "extended_capabilities");
+-		/* Check if client advertises extended capabilities */
+-		if (sta->ext_capability && sta->ext_capability[0] > 0) {
+-			for (i = 0; i < sta->ext_capability[0]; i++) {
+-				blobmsg_add_u32(&b, "", sta->ext_capability[1 + i]);
+-			}
+-		}
+-		blobmsg_close_array(&b, r);
+-
+-		blobmsg_add_u32(&b, "aid", sta->aid);
+-#ifdef CONFIG_TAXONOMY
+-		r = blobmsg_alloc_string_buffer(&b, "signature", 1024);
+-		if (retrieve_sta_taxonomy(hapd, sta, r, 1024) > 0)
+-			blobmsg_add_string_buffer(&b);
+-#endif
+-
+-		/* Driver information */
+-		if (hostapd_drv_read_sta_data(hapd, &sta_driver_data, sta->addr) >= 0) {
+-			r = blobmsg_open_table(&b, "bytes");
+-			blobmsg_add_u64(&b, "rx", sta_driver_data.rx_bytes);
+-			blobmsg_add_u64(&b, "tx", sta_driver_data.tx_bytes);
+-			blobmsg_close_table(&b, r);
+-			r = blobmsg_open_table(&b, "airtime");
+-			blobmsg_add_u64(&b, "rx", sta_driver_data.rx_airtime);
+-			blobmsg_add_u64(&b, "tx", sta_driver_data.tx_airtime);
+-			blobmsg_close_table(&b, r);
+-			r = blobmsg_open_table(&b, "packets");
+-			blobmsg_add_u32(&b, "rx", sta_driver_data.rx_packets);
+-			blobmsg_add_u32(&b, "tx", sta_driver_data.tx_packets);
+-			blobmsg_close_table(&b, r);
+-			r = blobmsg_open_table(&b, "rate");
+-			/* Rate in kbits */
+-			blobmsg_add_u32(&b, "rx", sta_driver_data.current_rx_rate * 100);
+-			blobmsg_add_u32(&b, "tx", sta_driver_data.current_tx_rate * 100);
+-			blobmsg_close_table(&b, r);
+-			blobmsg_add_u32(&b, "signal", sta_driver_data.signal);
+-		}
+-
+-		hostapd_parse_capab_blobmsg(sta);
+-
+-		blobmsg_close_table(&b, c);
+-	}
+-	blobmsg_close_array(&b, list);
+-	ubus_send_reply(ctx, req, b.head);
+-
+-	return 0;
+-}
+-
+-static int
+-hostapd_bss_get_features(struct ubus_context *ctx, struct ubus_object *obj,
+-			struct ubus_request_data *req, const char *method,
+-			struct blob_attr *msg)
+-{
+-	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
+-
+-	blob_buf_init(&b, 0);
+-	blobmsg_add_u8(&b, "ht_supported", ht_supported(hapd->iface->hw_features));
+-	blobmsg_add_u8(&b, "vht_supported", vht_supported(hapd->iface->hw_features));
+-	ubus_send_reply(ctx, req, b.head);
+-
+-	return 0;
+-}
+-
+-static int
+-hostapd_bss_get_status(struct ubus_context *ctx, struct ubus_object *obj,
+-		       struct ubus_request_data *req, const char *method,
+-		       struct blob_attr *msg)
+-{
+-	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
+-	void *airtime_table, *dfs_table, *rrm_table, *wnm_table;
+-	struct os_reltime now;
+-	char ssid[SSID_MAX_LEN + 1];
+-	char phy_name[17];
+-	size_t ssid_len = SSID_MAX_LEN;
+-	u8 channel = 0, op_class = 0;
+-
+-	if (hapd->conf->ssid.ssid_len < SSID_MAX_LEN)
+-		ssid_len = hapd->conf->ssid.ssid_len;
+-	
+-	ieee80211_freq_to_channel_ext(hapd->iface->freq,
+-				      hapd->iconf->secondary_channel,
+-				      hostapd_get_oper_chwidth(hapd->iconf),
+-				      &op_class, &channel);
+-
+-	blob_buf_init(&b, 0);
+-	blobmsg_add_string(&b, "status", hostapd_state_text(hapd->iface->state));
+-	blobmsg_printf(&b, "bssid", MACSTR, MAC2STR(hapd->conf->bssid));
+-
+-	memset(ssid, 0, SSID_MAX_LEN + 1);
+-	memcpy(ssid, hapd->conf->ssid.ssid, ssid_len);
+-	blobmsg_add_string(&b, "ssid", ssid);
+-
+-	blobmsg_add_u32(&b, "freq", hapd->iface->freq);
+-	blobmsg_add_u32(&b, "channel", channel);
+-	blobmsg_add_u32(&b, "op_class", op_class);
+-	blobmsg_add_u32(&b, "beacon_interval", hapd->iconf->beacon_int);
+-#ifdef CONFIG_IEEE80211AX
+-	blobmsg_add_u32(&b, "bss_color", hapd->iface->conf->he_op.he_bss_color_disabled ? -1 :
+-					 hapd->iface->conf->he_op.he_bss_color);
+-#else
+-	blobmsg_add_u32(&b, "bss_color", -1);
+-#endif
+-
+-	snprintf(phy_name, 17, "%s", hapd->iface->phy);
+-	blobmsg_add_string(&b, "phy", phy_name);
+-
+-	/* RRM */
+-	rrm_table = blobmsg_open_table(&b, "rrm");
+-	blobmsg_add_u64(&b, "neighbor_report_tx", hapd->openwrt_stats.rrm.neighbor_report_tx);
+-	blobmsg_close_table(&b, rrm_table);
+-
+-	/* WNM */
+-	wnm_table = blobmsg_open_table(&b, "wnm");
+-	blobmsg_add_u64(&b, "bss_transition_query_rx", hapd->openwrt_stats.wnm.bss_transition_query_rx);
+-	blobmsg_add_u64(&b, "bss_transition_request_tx", hapd->openwrt_stats.wnm.bss_transition_request_tx);
+-	blobmsg_add_u64(&b, "bss_transition_response_rx", hapd->openwrt_stats.wnm.bss_transition_response_rx);
+-	blobmsg_close_table(&b, wnm_table);
+-
+-	/* Airtime */
+-	airtime_table = blobmsg_open_table(&b, "airtime");
+-	blobmsg_add_u64(&b, "time", hapd->iface->last_channel_time);
+-	blobmsg_add_u64(&b, "time_busy", hapd->iface->last_channel_time_busy);
+-	blobmsg_add_u16(&b, "utilization", hapd->iface->channel_utilization);
+-	blobmsg_close_table(&b, airtime_table);
+-
+-	/* DFS */
+-	dfs_table = blobmsg_open_table(&b, "dfs");
+-	blobmsg_add_u32(&b, "cac_seconds", hapd->iface->dfs_cac_ms / 1000);
+-	blobmsg_add_u8(&b, "cac_active", !!(hapd->iface->cac_started));
+-	os_reltime_age(&hapd->iface->dfs_cac_start, &now);
+-	blobmsg_add_u32(&b, "cac_seconds_left",
+-			hapd->iface->cac_started ? hapd->iface->dfs_cac_ms / 1000 - now.sec : 0);
+-	blobmsg_close_table(&b, dfs_table);
+-
+-	ubus_send_reply(ctx, req, b.head);
+-
+-	return 0;
+-}
+-
+-enum {
+-	NOTIFY_RESPONSE,
+-	__NOTIFY_MAX
+-};
+-
+-static const struct blobmsg_policy notify_policy[__NOTIFY_MAX] = {
+-	[NOTIFY_RESPONSE] = { "notify_response", BLOBMSG_TYPE_INT32 },
+-};
+-
+-static int
+-hostapd_notify_response(struct ubus_context *ctx, struct ubus_object *obj,
+-			struct ubus_request_data *req, const char *method,
+-			struct blob_attr *msg)
+-{
+-	struct blob_attr *tb[__NOTIFY_MAX];
+-	struct hostapd_data *hapd = get_hapd_from_object(obj);
+-	struct wpabuf *elems;
+-	const char *pos;
+-	size_t len;
+-
+-	blobmsg_parse(notify_policy, __NOTIFY_MAX, tb,
+-		      blob_data(msg), blob_len(msg));
+-
+-	if (!tb[NOTIFY_RESPONSE])
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	hapd->ubus.notify_response = blobmsg_get_u32(tb[NOTIFY_RESPONSE]);
+-
+-	return UBUS_STATUS_OK;
+-}
+-
+-enum {
+-	DEL_CLIENT_ADDR,
+-	DEL_CLIENT_REASON,
+-	DEL_CLIENT_DEAUTH,
+-	DEL_CLIENT_BAN_TIME,
+-	__DEL_CLIENT_MAX
+-};
+-
+-static const struct blobmsg_policy del_policy[__DEL_CLIENT_MAX] = {
+-	[DEL_CLIENT_ADDR] = { "addr", BLOBMSG_TYPE_STRING },
+-	[DEL_CLIENT_REASON] = { "reason", BLOBMSG_TYPE_INT32 },
+-	[DEL_CLIENT_DEAUTH] = { "deauth", BLOBMSG_TYPE_INT8 },
+-	[DEL_CLIENT_BAN_TIME] = { "ban_time", BLOBMSG_TYPE_INT32 },
+-};
+-
+-static int
+-hostapd_bss_del_client(struct ubus_context *ctx, struct ubus_object *obj,
+-			struct ubus_request_data *req, const char *method,
+-			struct blob_attr *msg)
+-{
+-	struct blob_attr *tb[__DEL_CLIENT_MAX];
+-	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
+-	struct sta_info *sta;
+-	bool deauth = false;
+-	int reason;
+-	u8 addr[ETH_ALEN];
+-
+-	blobmsg_parse(del_policy, __DEL_CLIENT_MAX, tb, blob_data(msg), blob_len(msg));
+-
+-	if (!tb[DEL_CLIENT_ADDR])
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	if (hwaddr_aton(blobmsg_data(tb[DEL_CLIENT_ADDR]), addr))
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	if (tb[DEL_CLIENT_REASON])
+-		reason = blobmsg_get_u32(tb[DEL_CLIENT_REASON]);
+-
+-	if (tb[DEL_CLIENT_DEAUTH])
+-		deauth = blobmsg_get_bool(tb[DEL_CLIENT_DEAUTH]);
+-
+-	sta = ap_get_sta(hapd, addr);
+-	if (sta) {
+-		if (deauth) {
+-			hostapd_drv_sta_deauth(hapd, addr, reason);
+-			ap_sta_deauthenticate(hapd, sta, reason);
+-		} else {
+-			hostapd_drv_sta_disassoc(hapd, addr, reason);
+-			ap_sta_disassociate(hapd, sta, reason);
+-		}
+-	}
+-
+-	if (tb[DEL_CLIENT_BAN_TIME])
+-		hostapd_bss_ban_client(hapd, addr, blobmsg_get_u32(tb[DEL_CLIENT_BAN_TIME]));
+-
+-	return 0;
+-}
+-
+-static void
+-blobmsg_add_macaddr(struct blob_buf *buf, const char *name, const u8 *addr)
+-{
+-	char *s;
+-
+-	s = blobmsg_alloc_string_buffer(buf, name, 20);
+-	sprintf(s, MACSTR, MAC2STR(addr));
+-	blobmsg_add_string_buffer(buf);
+-}
+-
+-static int
+-hostapd_bss_list_bans(struct ubus_context *ctx, struct ubus_object *obj,
+-		      struct ubus_request_data *req, const char *method,
+-		      struct blob_attr *msg)
+-{
+-	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
+-	struct ubus_banned_client *ban;
+-	void *c;
+-
+-	blob_buf_init(&b, 0);
+-	c = blobmsg_open_array(&b, "clients");
+-	avl_for_each_element(&hapd->ubus.banned, ban, avl)
+-		blobmsg_add_macaddr(&b, NULL, ban->addr);
+-	blobmsg_close_array(&b, c);
+-	ubus_send_reply(ctx, req, b.head);
+-
+-	return 0;
+-}
+-
+-#ifdef CONFIG_WPS
+-static int
+-hostapd_bss_wps_start(struct ubus_context *ctx, struct ubus_object *obj,
+-			struct ubus_request_data *req, const char *method,
+-			struct blob_attr *msg)
+-{
+-	int rc;
+-	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
+-
+-	rc = hostapd_wps_button_pushed(hapd, NULL);
+-
+-	if (rc != 0)
+-		return UBUS_STATUS_NOT_SUPPORTED;
+-
+-	return 0;
+-}
+-
+-
+-static const char * pbc_status_enum_str(enum pbc_status status)
+-{
+-	switch (status) {
+-	case WPS_PBC_STATUS_DISABLE:
+-		return "Disabled";
+-	case WPS_PBC_STATUS_ACTIVE:
+-		return "Active";
+-	case WPS_PBC_STATUS_TIMEOUT:
+-		return "Timed-out";
+-	case WPS_PBC_STATUS_OVERLAP:
+-		return "Overlap";
+-	default:
+-		return "Unknown";
+-	}
+-}
+-
+-static int
+-hostapd_bss_wps_status(struct ubus_context *ctx, struct ubus_object *obj,
+-			struct ubus_request_data *req, const char *method,
+-			struct blob_attr *msg)
+-{
+-	int rc;
+-	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
+-
+-	blob_buf_init(&b, 0);
+-
+-	blobmsg_add_string(&b, "pbc_status", pbc_status_enum_str(hapd->wps_stats.pbc_status));
+-	blobmsg_add_string(&b, "last_wps_result",
+-			   (hapd->wps_stats.status == WPS_STATUS_SUCCESS ?
+-			    "Success":
+-			    (hapd->wps_stats.status == WPS_STATUS_FAILURE ?
+-			     "Failed" : "None")));
+-
+-	/* If status == Failure - Add possible Reasons */
+-	if(hapd->wps_stats.status == WPS_STATUS_FAILURE &&
+-	   hapd->wps_stats.failure_reason > 0)
+-		blobmsg_add_string(&b, "reason", wps_ei_str(hapd->wps_stats.failure_reason));
+-
+-	if (hapd->wps_stats.status)
+-		blobmsg_printf(&b, "peer_address", MACSTR, MAC2STR(hapd->wps_stats.peer_addr));
+-
+-	ubus_send_reply(ctx, req, b.head);
+-
+-	return 0;
+-}
+-
+-static int
+-hostapd_bss_wps_cancel(struct ubus_context *ctx, struct ubus_object *obj,
+-			struct ubus_request_data *req, const char *method,
+-			struct blob_attr *msg)
+-{
+-	int rc;
+-	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
+-
+-	rc = hostapd_wps_cancel(hapd);
+-
+-	if (rc != 0)
+-		return UBUS_STATUS_NOT_SUPPORTED;
+-
+-	return 0;
+-}
+-#endif /* CONFIG_WPS */
+-
+-static int
+-hostapd_bss_update_beacon(struct ubus_context *ctx, struct ubus_object *obj,
+-			struct ubus_request_data *req, const char *method,
+-			struct blob_attr *msg)
+-{
+-	int rc;
+-	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
+-
+-	rc = ieee802_11_set_beacon(hapd);
+-
+-	if (rc != 0)
+-		return UBUS_STATUS_NOT_SUPPORTED;
+-
+-	return 0;
+-}
+-
+-enum {
+-	CONFIG_IFACE,
+-	CONFIG_FILE,
+-	__CONFIG_MAX
+-};
+-
+-static const struct blobmsg_policy config_add_policy[__CONFIG_MAX] = {
+-	[CONFIG_IFACE] = { "iface", BLOBMSG_TYPE_STRING },
+-	[CONFIG_FILE] = { "config", BLOBMSG_TYPE_STRING },
+-};
+-
+-static int
+-hostapd_config_add(struct ubus_context *ctx, struct ubus_object *obj,
+-		   struct ubus_request_data *req, const char *method,
+-		   struct blob_attr *msg)
+-{
+-	struct blob_attr *tb[__CONFIG_MAX];
+-	struct hapd_interfaces *interfaces = get_hapd_interfaces_from_object(obj);
+-	char buf[128];
+-
+-	blobmsg_parse(config_add_policy, __CONFIG_MAX, tb, blob_data(msg), blob_len(msg));
+-
+-	if (!tb[CONFIG_FILE] || !tb[CONFIG_IFACE])
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	snprintf(buf, sizeof(buf), "bss_config=%s:%s",
+-		blobmsg_get_string(tb[CONFIG_IFACE]),
+-		blobmsg_get_string(tb[CONFIG_FILE]));
+-
+-	if (hostapd_add_iface(interfaces, buf))
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	blob_buf_init(&b, 0);
+-	blobmsg_add_u32(&b, "pid", getpid());
+-	ubus_send_reply(ctx, req, b.head);
+-
+-	return UBUS_STATUS_OK;
+-}
+-
+-enum {
+-	CONFIG_REM_IFACE,
+-	__CONFIG_REM_MAX
+-};
+-
+-static const struct blobmsg_policy config_remove_policy[__CONFIG_REM_MAX] = {
+-	[CONFIG_REM_IFACE] = { "iface", BLOBMSG_TYPE_STRING },
+-};
+-
+-static int
+-hostapd_config_remove(struct ubus_context *ctx, struct ubus_object *obj,
+-		      struct ubus_request_data *req, const char *method,
+-		      struct blob_attr *msg)
+-{
+-	struct blob_attr *tb[__CONFIG_REM_MAX];
+-	struct hapd_interfaces *interfaces = get_hapd_interfaces_from_object(obj);
+-	char buf[128];
+-
+-	blobmsg_parse(config_remove_policy, __CONFIG_REM_MAX, tb, blob_data(msg), blob_len(msg));
+-
+-	if (!tb[CONFIG_REM_IFACE])
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	if (hostapd_remove_iface(interfaces, blobmsg_get_string(tb[CONFIG_REM_IFACE])))
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	return UBUS_STATUS_OK;
+-}
+-
+-enum {
+-	CSA_FREQ,
+-	CSA_BCN_COUNT,
+-	CSA_CENTER_FREQ1,
+-	CSA_CENTER_FREQ2,
+-	CSA_BANDWIDTH,
+-	CSA_SEC_CHANNEL_OFFSET,
+-	CSA_HT,
+-	CSA_VHT,
+-	CSA_HE,
+-	CSA_BLOCK_TX,
+-	CSA_FORCE,
+-	__CSA_MAX
+-};
+-
+-static const struct blobmsg_policy csa_policy[__CSA_MAX] = {
+-	[CSA_FREQ] = { "freq", BLOBMSG_TYPE_INT32 },
+-	[CSA_BCN_COUNT] = { "bcn_count", BLOBMSG_TYPE_INT32 },
+-	[CSA_CENTER_FREQ1] = { "center_freq1", BLOBMSG_TYPE_INT32 },
+-	[CSA_CENTER_FREQ2] = { "center_freq2", BLOBMSG_TYPE_INT32 },
+-	[CSA_BANDWIDTH] = { "bandwidth", BLOBMSG_TYPE_INT32 },
+-	[CSA_SEC_CHANNEL_OFFSET] = { "sec_channel_offset", BLOBMSG_TYPE_INT32 },
+-	[CSA_HT] = { "ht", BLOBMSG_TYPE_BOOL },
+-	[CSA_VHT] = { "vht", BLOBMSG_TYPE_BOOL },
+-	[CSA_HE] = { "he", BLOBMSG_TYPE_BOOL },
+-	[CSA_BLOCK_TX] = { "block_tx", BLOBMSG_TYPE_BOOL },
+-	[CSA_FORCE] = { "force", BLOBMSG_TYPE_BOOL },
+-};
+-
+-
+-static void switch_chan_fallback_cb(void *eloop_data, void *user_ctx)
+-{
+-	struct hostapd_iface *iface = eloop_data;
+-	struct hostapd_freq_params *freq_params = user_ctx;
+-
+-	hostapd_switch_channel_fallback(iface, freq_params);
+-}
+-
+-#ifdef NEED_AP_MLME
+-static int
+-hostapd_switch_chan(struct ubus_context *ctx, struct ubus_object *obj,
+-		    struct ubus_request_data *req, const char *method,
+-		    struct blob_attr *msg)
+-{
+-	struct blob_attr *tb[__CSA_MAX];
+-	struct hostapd_data *hapd = get_hapd_from_object(obj);
+-	struct hostapd_config *iconf = hapd->iface->conf;
+-	struct hostapd_freq_params *freq_params;
+-	struct hostapd_hw_modes *mode = hapd->iface->current_mode;
+-	struct csa_settings css = {
+-		.freq_params = {
+-			.ht_enabled = iconf->ieee80211n,
+-			.vht_enabled = iconf->ieee80211ac,
+-			.he_enabled = iconf->ieee80211ax,
+-			.sec_channel_offset = iconf->secondary_channel,
+-		}
+-	};
+-	u8 chwidth = hostapd_get_oper_chwidth(iconf);
+-	u8 seg0 = 0, seg1 = 0;
+-	int ret = UBUS_STATUS_OK;
+-	int i;
+-
+-	blobmsg_parse(csa_policy, __CSA_MAX, tb, blob_data(msg), blob_len(msg));
+-
+-	if (!tb[CSA_FREQ])
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	switch (iconf->vht_oper_chwidth) {
+-	case CHANWIDTH_USE_HT:
+-		if (iconf->secondary_channel)
+-			css.freq_params.bandwidth = 40;
+-		else
+-			css.freq_params.bandwidth = 20;
+-		break;
+-	case CHANWIDTH_160MHZ:
+-		css.freq_params.bandwidth = 160;
+-		break;
+-	default:
+-		css.freq_params.bandwidth = 80;
+-		break;
+-	}
+-
+-	css.freq_params.freq = blobmsg_get_u32(tb[CSA_FREQ]);
+-
+-#define SET_CSA_SETTING(name, field, type) \
+-	do { \
+-		if (tb[name]) \
+-			css.field = blobmsg_get_ ## type(tb[name]); \
+-	} while(0)
+-
+-	SET_CSA_SETTING(CSA_BCN_COUNT, cs_count, u32);
+-	SET_CSA_SETTING(CSA_CENTER_FREQ1, freq_params.center_freq1, u32);
+-	SET_CSA_SETTING(CSA_CENTER_FREQ2, freq_params.center_freq2, u32);
+-	SET_CSA_SETTING(CSA_BANDWIDTH, freq_params.bandwidth, u32);
+-	SET_CSA_SETTING(CSA_SEC_CHANNEL_OFFSET, freq_params.sec_channel_offset, u32);
+-	SET_CSA_SETTING(CSA_HT, freq_params.ht_enabled, bool);
+-	SET_CSA_SETTING(CSA_VHT, freq_params.vht_enabled, bool);
+-	SET_CSA_SETTING(CSA_HE, freq_params.he_enabled, bool);
+-	SET_CSA_SETTING(CSA_BLOCK_TX, block_tx, bool);
+-
+-	css.freq_params.channel = hostapd_hw_get_channel(hapd, css.freq_params.freq);
+-	if (!css.freq_params.channel)
+-		return UBUS_STATUS_NOT_SUPPORTED;
+-
+-	switch (css.freq_params.bandwidth) {
+-	case 160:
+-		chwidth = CHANWIDTH_160MHZ;
+-		break;
+-	case 80:
+-		chwidth = css.freq_params.center_freq2 ? CHANWIDTH_80P80MHZ : CHANWIDTH_80MHZ;
+-		break;
+-	default:
+-		chwidth = CHANWIDTH_USE_HT;
+-		break;
+-	}
+-
+-	hostapd_set_freq_params(&css.freq_params, iconf->hw_mode,
+-				css.freq_params.freq,
+-				css.freq_params.channel, iconf->enable_edmg,
+-				iconf->edmg_channel,
+-				css.freq_params.ht_enabled,
+-				css.freq_params.vht_enabled,
+-				css.freq_params.he_enabled,
+-				css.freq_params.eht_enabled,
+-				css.freq_params.sec_channel_offset,
+-				chwidth, seg0, seg1,
+-				iconf->vht_capab,
+-				mode ? &mode->he_capab[IEEE80211_MODE_AP] :
+-				NULL,
+-				mode ? &mode->eht_capab[IEEE80211_MODE_AP] :
+-				NULL);
+-
+-	for (i = 0; i < hapd->iface->num_bss; i++) {
+-		struct hostapd_data *bss = hapd->iface->bss[i];
+-
+-		if (hostapd_switch_channel(bss, &css) != 0)
+-			ret = UBUS_STATUS_NOT_SUPPORTED;
+-	}
+-
+-	if (!ret || !tb[CSA_FORCE] || !blobmsg_get_bool(tb[CSA_FORCE]))
+-		return ret;
+-
+-	freq_params = malloc(sizeof(*freq_params));
+-	memcpy(freq_params, &css.freq_params, sizeof(*freq_params));
+-	eloop_register_timeout(0, 1, switch_chan_fallback_cb,
+-			       hapd->iface, freq_params);
+-
+-	return 0;
+-#undef SET_CSA_SETTING
+-}
+-#endif
+-
+-enum {
+-	VENDOR_ELEMENTS,
+-	__VENDOR_ELEMENTS_MAX
+-};
+-
+-static const struct blobmsg_policy ve_policy[__VENDOR_ELEMENTS_MAX] = {
+-	/* vendor elements are provided as hex-string */
+-	[VENDOR_ELEMENTS] = { "vendor_elements", BLOBMSG_TYPE_STRING },
+-};
+-
+-static int
+-hostapd_vendor_elements(struct ubus_context *ctx, struct ubus_object *obj,
+-			struct ubus_request_data *req, const char *method,
+-			struct blob_attr *msg)
+-{
+-	struct blob_attr *tb[__VENDOR_ELEMENTS_MAX];
+-	struct hostapd_data *hapd = get_hapd_from_object(obj);
+-	struct hostapd_bss_config *bss = hapd->conf;
+-	struct wpabuf *elems;
+-	const char *pos;
+-	size_t len;
+-
+-	blobmsg_parse(ve_policy, __VENDOR_ELEMENTS_MAX, tb,
+-		      blob_data(msg), blob_len(msg));
+-
+-	if (!tb[VENDOR_ELEMENTS])
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	pos = blobmsg_data(tb[VENDOR_ELEMENTS]);
+-	len = os_strlen(pos);
+-	if (len & 0x01)
+-			return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	len /= 2;
+-	if (len == 0) {
+-		wpabuf_free(bss->vendor_elements);
+-		bss->vendor_elements = NULL;
+-		return 0;
+-	}
+-
+-	elems = wpabuf_alloc(len);
+-	if (elems == NULL)
+-		return 1;
+-
+-	if (hexstr2bin(pos, wpabuf_put(elems, len), len)) {
+-		wpabuf_free(elems);
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-	}
+-
+-	wpabuf_free(bss->vendor_elements);
+-	bss->vendor_elements = elems;
+-
+-	/* update beacons if vendor elements were set successfully */
+-	if (ieee802_11_update_beacons(hapd->iface) != 0)
+-		return UBUS_STATUS_NOT_SUPPORTED;
+-	return UBUS_STATUS_OK;
+-}
+-
+-static void
+-hostapd_rrm_print_nr(struct hostapd_neighbor_entry *nr)
+-{
+-	const u8 *data;
+-	char *str;
+-	int len;
+-
+-	blobmsg_printf(&b, "", MACSTR, MAC2STR(nr->bssid));
+-
+-	str = blobmsg_alloc_string_buffer(&b, "", nr->ssid.ssid_len + 1);
+-	memcpy(str, nr->ssid.ssid, nr->ssid.ssid_len);
+-	str[nr->ssid.ssid_len] = 0;
+-	blobmsg_add_string_buffer(&b);
+-
+-	len = wpabuf_len(nr->nr);
+-	str = blobmsg_alloc_string_buffer(&b, "", 2 * len + 1);
+-	wpa_snprintf_hex(str, 2 * len + 1, wpabuf_head_u8(nr->nr), len);
+-	blobmsg_add_string_buffer(&b);
+-}
+-
+-enum {
+-	BSS_MGMT_EN_NEIGHBOR,
+-	BSS_MGMT_EN_BEACON,
+-	BSS_MGMT_EN_LINK_MEASUREMENT,
+-#ifdef CONFIG_WNM_AP
+-	BSS_MGMT_EN_BSS_TRANSITION,
+-#endif
+-	__BSS_MGMT_EN_MAX
+-};
+-
+-static bool
+-__hostapd_bss_mgmt_enable_f(struct hostapd_data *hapd, int flag)
+-{
+-	struct hostapd_bss_config *bss = hapd->conf;
+-	uint32_t flags;
+-
+-	switch (flag) {
+-	case BSS_MGMT_EN_NEIGHBOR:
+-		if (bss->radio_measurements[0] &
+-		    WLAN_RRM_CAPS_NEIGHBOR_REPORT)
+-			return false;
+-
+-		bss->radio_measurements[0] |=
+-			WLAN_RRM_CAPS_NEIGHBOR_REPORT;
+-		hostapd_neighbor_set_own_report(hapd);
+-		return true;
+-	case BSS_MGMT_EN_BEACON:
+-		flags = WLAN_RRM_CAPS_BEACON_REPORT_PASSIVE |
+-			WLAN_RRM_CAPS_BEACON_REPORT_ACTIVE |
+-			WLAN_RRM_CAPS_BEACON_REPORT_TABLE;
+-
+-		if (bss->radio_measurements[0] & flags == flags)
+-			return false;
+-
+-		bss->radio_measurements[0] |= (u8) flags;
+-		return true;
+-	case BSS_MGMT_EN_LINK_MEASUREMENT:
+-		flags = WLAN_RRM_CAPS_LINK_MEASUREMENT;
+-
+-		if (bss->radio_measurements[0] & flags == flags)
+-			return false;
+-
+-		bss->radio_measurements[0] |= (u8) flags;
+-		return true;
+-#ifdef CONFIG_WNM_AP
+-	case BSS_MGMT_EN_BSS_TRANSITION:
+-		if (bss->bss_transition)
+-			return false;
+-
+-		bss->bss_transition = 1;
+-		return true;
+-#endif
+-	}
+-}
+-
+-static void
+-__hostapd_bss_mgmt_enable(struct hostapd_data *hapd, uint32_t flags)
+-{
+-	bool update = false;
+-	int i;
+-
+-	for (i = 0; i < __BSS_MGMT_EN_MAX; i++) {
+-		if (!(flags & (1 << i)))
+-			continue;
+-
+-		update |= __hostapd_bss_mgmt_enable_f(hapd, i);
+-	}
+-
+-	if (update)
+-		ieee802_11_update_beacons(hapd->iface);
+-}
+-
+-
+-static const struct blobmsg_policy bss_mgmt_enable_policy[__BSS_MGMT_EN_MAX] = {
+-	[BSS_MGMT_EN_NEIGHBOR] = { "neighbor_report", BLOBMSG_TYPE_BOOL },
+-	[BSS_MGMT_EN_BEACON] = { "beacon_report", BLOBMSG_TYPE_BOOL },
+-	[BSS_MGMT_EN_LINK_MEASUREMENT] = { "link_measurement", BLOBMSG_TYPE_BOOL },
+-#ifdef CONFIG_WNM_AP
+-	[BSS_MGMT_EN_BSS_TRANSITION] = { "bss_transition", BLOBMSG_TYPE_BOOL },
+-#endif
+-};
+-
+-static int
+-hostapd_bss_mgmt_enable(struct ubus_context *ctx, struct ubus_object *obj,
+-		   struct ubus_request_data *req, const char *method,
+-		   struct blob_attr *msg)
+-
+-{
+-	struct hostapd_data *hapd = get_hapd_from_object(obj);
+-	struct blob_attr *tb[__BSS_MGMT_EN_MAX];
+-	struct blob_attr *cur;
+-	uint32_t flags = 0;
+-	int i;
+-	bool neigh = false, beacon = false;
+-
+-	blobmsg_parse(bss_mgmt_enable_policy, __BSS_MGMT_EN_MAX, tb, blob_data(msg), blob_len(msg));
+-
+-	for (i = 0; i < ARRAY_SIZE(tb); i++) {
+-		if (!tb[i] || !blobmsg_get_bool(tb[i]))
+-			continue;
+-
+-		flags |= (1 << i);
+-	}
+-
+-	__hostapd_bss_mgmt_enable(hapd, flags);
+-
+-	return 0;
+-}
+-
+-
+-static void
+-hostapd_rrm_nr_enable(struct hostapd_data *hapd)
+-{
+-	__hostapd_bss_mgmt_enable(hapd, 1 << BSS_MGMT_EN_NEIGHBOR);
+-}
+-
+-static int
+-hostapd_rrm_nr_get_own(struct ubus_context *ctx, struct ubus_object *obj,
+-		       struct ubus_request_data *req, const char *method,
+-		       struct blob_attr *msg)
+-{
+-	struct hostapd_data *hapd = get_hapd_from_object(obj);
+-	struct hostapd_neighbor_entry *nr;
+-	void *c;
+-
+-	hostapd_rrm_nr_enable(hapd);
+-
+-	nr = hostapd_neighbor_get(hapd, hapd->own_addr, NULL);
+-	if (!nr)
+-		return UBUS_STATUS_NOT_FOUND;
+-
+-	blob_buf_init(&b, 0);
+-
+-	c = blobmsg_open_array(&b, "value");
+-	hostapd_rrm_print_nr(nr);
+-	blobmsg_close_array(&b, c);
+-
+-	ubus_send_reply(ctx, req, b.head);
+-
+-	return 0;
+-}
+-
+-static int
+-hostapd_rrm_nr_list(struct ubus_context *ctx, struct ubus_object *obj,
+-		    struct ubus_request_data *req, const char *method,
+-		    struct blob_attr *msg)
+-{
+-	struct hostapd_data *hapd = get_hapd_from_object(obj);
+-	struct hostapd_neighbor_entry *nr;
+-	void *c;
+-
+-	hostapd_rrm_nr_enable(hapd);
+-	blob_buf_init(&b, 0);
+-
+-	c = blobmsg_open_array(&b, "list");
+-	dl_list_for_each(nr, &hapd->nr_db, struct hostapd_neighbor_entry, list) {
+-		void *cur;
+-
+-		if (!memcmp(nr->bssid, hapd->own_addr, ETH_ALEN))
+-			continue;
+-
+-		cur = blobmsg_open_array(&b, NULL);
+-		hostapd_rrm_print_nr(nr);
+-		blobmsg_close_array(&b, cur);
+-	}
+-	blobmsg_close_array(&b, c);
+-
+-	ubus_send_reply(ctx, req, b.head);
+-
+-	return 0;
+-}
+-
+-enum {
+-	NR_SET_LIST,
+-	__NR_SET_LIST_MAX
+-};
+-
+-static const struct blobmsg_policy nr_set_policy[__NR_SET_LIST_MAX] = {
+-	[NR_SET_LIST] = { "list", BLOBMSG_TYPE_ARRAY },
+-};
+-
+-
+-static void
+-hostapd_rrm_nr_clear(struct hostapd_data *hapd)
+-{
+-	struct hostapd_neighbor_entry *nr;
+-
+-restart:
+-	dl_list_for_each(nr, &hapd->nr_db, struct hostapd_neighbor_entry, list) {
+-		if (!memcmp(nr->bssid, hapd->own_addr, ETH_ALEN))
+-			continue;
+-
+-		hostapd_neighbor_remove(hapd, nr->bssid, &nr->ssid);
+-		goto restart;
+-	}
+-}
+-
+-static int
+-hostapd_rrm_nr_set(struct ubus_context *ctx, struct ubus_object *obj,
+-		   struct ubus_request_data *req, const char *method,
+-		   struct blob_attr *msg)
+-{
+-	static const struct blobmsg_policy nr_e_policy[] = {
+-		{ .type = BLOBMSG_TYPE_STRING },
+-		{ .type = BLOBMSG_TYPE_STRING },
+-		{ .type = BLOBMSG_TYPE_STRING },
+-	};
+-	struct hostapd_data *hapd = get_hapd_from_object(obj);
+-	struct blob_attr *tb_l[__NR_SET_LIST_MAX];
+-	struct blob_attr *tb[ARRAY_SIZE(nr_e_policy)];
+-	struct blob_attr *cur;
+-	int rem;
+-
+-	hostapd_rrm_nr_enable(hapd);
+-
+-	blobmsg_parse(nr_set_policy, __NR_SET_LIST_MAX, tb_l, blob_data(msg), blob_len(msg));
+-	if (!tb_l[NR_SET_LIST])
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	hostapd_rrm_nr_clear(hapd);
+-	blobmsg_for_each_attr(cur, tb_l[NR_SET_LIST], rem) {
+-		struct wpa_ssid_value ssid;
+-		struct wpabuf *data;
+-		u8 bssid[ETH_ALEN];
+-		char *s, *nr_s;
+-
+-		blobmsg_parse_array(nr_e_policy, ARRAY_SIZE(nr_e_policy), tb, blobmsg_data(cur), blobmsg_data_len(cur));
+-		if (!tb[0] || !tb[1] || !tb[2])
+-			goto invalid;
+-
+-		/* Neighbor Report binary */
+-		nr_s = blobmsg_get_string(tb[2]);
+-		data = wpabuf_parse_bin(nr_s);
+-		if (!data)
+-			goto invalid;
+-
+-		/* BSSID */
+-		s = blobmsg_get_string(tb[0]);
+-		if (strlen(s) == 0) {
+-			/* Copy BSSID from neighbor report */
+-			if (hwaddr_compact_aton(nr_s, bssid))
+-				goto invalid;
+-		} else if (hwaddr_aton(s, bssid)) {
+-			goto invalid;
+-		}
+-
+-		/* SSID */
+-		s = blobmsg_get_string(tb[1]);
+-		if (strlen(s) == 0) {
+-			/* Copy SSID from hostapd BSS conf */
+-			memcpy(&ssid, &hapd->conf->ssid, sizeof(ssid));
+-		} else {
+-			ssid.ssid_len = strlen(s);
+-			if (ssid.ssid_len > sizeof(ssid.ssid))
+-				goto invalid;
+-
+-			memcpy(&ssid, s, ssid.ssid_len);
+-		}
+-
+-		hostapd_neighbor_set(hapd, bssid, &ssid, data, NULL, NULL, 0, 0);
+-		wpabuf_free(data);
+-		continue;
+-
+-invalid:
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-	}
+-
+-	return 0;
+-}
+-
+-enum {
+-	BEACON_REQ_ADDR,
+-	BEACON_REQ_MODE,
+-	BEACON_REQ_OP_CLASS,
+-	BEACON_REQ_CHANNEL,
+-	BEACON_REQ_DURATION,
+-	BEACON_REQ_BSSID,
+-	BEACON_REQ_SSID,
+-	__BEACON_REQ_MAX,
+-};
+-
+-static const struct blobmsg_policy beacon_req_policy[__BEACON_REQ_MAX] = {
+-	[BEACON_REQ_ADDR] = { "addr", BLOBMSG_TYPE_STRING },
+-	[BEACON_REQ_OP_CLASS] { "op_class", BLOBMSG_TYPE_INT32 },
+-	[BEACON_REQ_CHANNEL] { "channel", BLOBMSG_TYPE_INT32 },
+-	[BEACON_REQ_DURATION] { "duration", BLOBMSG_TYPE_INT32 },
+-	[BEACON_REQ_MODE] { "mode", BLOBMSG_TYPE_INT32 },
+-	[BEACON_REQ_BSSID] { "bssid", BLOBMSG_TYPE_STRING },
+-	[BEACON_REQ_SSID] { "ssid", BLOBMSG_TYPE_STRING },
+-};
+-
+-static int
+-hostapd_rrm_beacon_req(struct ubus_context *ctx, struct ubus_object *obj,
+-		       struct ubus_request_data *ureq, const char *method,
+-		       struct blob_attr *msg)
+-{
+-	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
+-	struct blob_attr *tb[__BEACON_REQ_MAX];
+-	struct blob_attr *cur;
+-	struct wpabuf *req;
+-	u8 bssid[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+-	u8 addr[ETH_ALEN];
+-	int mode, rem, ret;
+-	int buf_len = 13;
+-
+-	blobmsg_parse(beacon_req_policy, __BEACON_REQ_MAX, tb, blob_data(msg), blob_len(msg));
+-
+-	if (!tb[BEACON_REQ_ADDR] || !tb[BEACON_REQ_MODE] || !tb[BEACON_REQ_DURATION] ||
+-	    !tb[BEACON_REQ_OP_CLASS] || !tb[BEACON_REQ_CHANNEL])
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	if (tb[BEACON_REQ_SSID])
+-		buf_len += blobmsg_data_len(tb[BEACON_REQ_SSID]) + 2 - 1;
+-
+-	mode = blobmsg_get_u32(tb[BEACON_REQ_MODE]);
+-	if (hwaddr_aton(blobmsg_data(tb[BEACON_REQ_ADDR]), addr))
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	if (tb[BEACON_REQ_BSSID] &&
+-	    hwaddr_aton(blobmsg_data(tb[BEACON_REQ_BSSID]), bssid))
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	req = wpabuf_alloc(buf_len);
+-	if (!req)
+-		return UBUS_STATUS_UNKNOWN_ERROR;
+-
+-	/* 1: regulatory class */
+-	wpabuf_put_u8(req, blobmsg_get_u32(tb[BEACON_REQ_OP_CLASS]));
+-
+-	/* 2: channel number */
+-	wpabuf_put_u8(req, blobmsg_get_u32(tb[BEACON_REQ_CHANNEL]));
+-
+-	/* 3-4: randomization interval */
+-	wpabuf_put_le16(req, 0);
+-
+-	/* 5-6: duration */
+-	wpabuf_put_le16(req, blobmsg_get_u32(tb[BEACON_REQ_DURATION]));
+-
+-	/* 7: mode */
+-	wpabuf_put_u8(req, blobmsg_get_u32(tb[BEACON_REQ_MODE]));
+-
+-	/* 8-13: BSSID */
+-	wpabuf_put_data(req, bssid, ETH_ALEN);
+-
+-	if ((cur = tb[BEACON_REQ_SSID]) != NULL) {
+-		wpabuf_put_u8(req, WLAN_EID_SSID);
+-		wpabuf_put_u8(req, blobmsg_data_len(cur) - 1);
+-		wpabuf_put_data(req, blobmsg_data(cur), blobmsg_data_len(cur) - 1);
+-	}
+-
+-	ret = hostapd_send_beacon_req(hapd, addr, 0, req);
+-	if (ret < 0)
+-		return -ret;
+-
+-	return 0;
+-}
+-
+-enum {
+-	LM_REQ_ADDR,
+-	LM_REQ_TX_POWER_USED,
+-	LM_REQ_TX_POWER_MAX,
+-	__LM_REQ_MAX,
+-};
+-
+-static const struct blobmsg_policy lm_req_policy[__LM_REQ_MAX] = {
+-	[LM_REQ_ADDR] = { "addr", BLOBMSG_TYPE_STRING },
+-	[LM_REQ_TX_POWER_USED] = { "tx-power-used", BLOBMSG_TYPE_INT32 },
+-	[LM_REQ_TX_POWER_MAX] = { "tx-power-max", BLOBMSG_TYPE_INT32 },
+-};
+-
+-static int
+-hostapd_rrm_lm_req(struct ubus_context *ctx, struct ubus_object *obj,
+-		   struct ubus_request_data *ureq, const char *method,
+-		   struct blob_attr *msg)
+-{
+-	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
+-	struct blob_attr *tb[__LM_REQ_MAX];
+-	struct wpabuf *buf;
+-	u8 addr[ETH_ALEN];
+-	int ret;
+-	int8_t txp_used, txp_max;
+-
+-	txp_used = 0;
+-	txp_max = 0;
+-
+-	blobmsg_parse(lm_req_policy, __LM_REQ_MAX, tb, blob_data(msg), blob_len(msg));
+-
+-	if (!tb[LM_REQ_ADDR])
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	if (tb[LM_REQ_TX_POWER_USED])
+-		txp_used = (int8_t) blobmsg_get_u32(tb[LM_REQ_TX_POWER_USED]);
+-
+-	if (tb[LM_REQ_TX_POWER_MAX])
+-		txp_max = (int8_t) blobmsg_get_u32(tb[LM_REQ_TX_POWER_MAX]);
+-
+-	if (hwaddr_aton(blobmsg_data(tb[LM_REQ_ADDR]), addr))
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	buf = wpabuf_alloc(5);
+-	if (!buf)
+-		return UBUS_STATUS_UNKNOWN_ERROR;
+-
+-	wpabuf_put_u8(buf, WLAN_ACTION_RADIO_MEASUREMENT);
+-	wpabuf_put_u8(buf, WLAN_RRM_LINK_MEASUREMENT_REQUEST);
+-	wpabuf_put_u8(buf, 1);
+-	/* TX-Power used */
+-	wpabuf_put_u8(buf, txp_used);
+-	/* Max TX Power */
+-	wpabuf_put_u8(buf, txp_max);
+-
+-	ret = hostapd_drv_send_action(hapd, hapd->iface->freq, 0, addr,
+-				      wpabuf_head(buf), wpabuf_len(buf));
+-
+-	wpabuf_free(buf);
+-	if (ret < 0)
+-		return -ret;
+-
+-	return 0;
+-}
+-
+-
+-void hostapd_ubus_handle_link_measurement(struct hostapd_data *hapd, const u8 *data, size_t len)
+-{
+-	const struct ieee80211_mgmt *mgmt = (const struct ieee80211_mgmt *) data;
+-	const u8 *pos, *end;
+-	u8 token;
+-
+-	end = data + len;
+-	token = mgmt->u.action.u.rrm.dialog_token;
+-	pos = mgmt->u.action.u.rrm.variable;
+-
+-	if (end - pos < 8)
+-		return;
+-
+-	if (!hapd->ubus.obj.has_subscribers)
+-		return;
+-
+-	blob_buf_init(&b, 0);
+-	blobmsg_add_macaddr(&b, "address", mgmt->sa);
+-	blobmsg_add_u16(&b, "dialog-token", token);
+-	blobmsg_add_u16(&b, "rx-antenna-id", pos[4]);
+-	blobmsg_add_u16(&b, "tx-antenna-id", pos[5]);
+-	blobmsg_add_u16(&b, "rcpi", pos[6]);
+-	blobmsg_add_u16(&b, "rsni", pos[7]);
+-
+-	ubus_notify(ctx, &hapd->ubus.obj, "link-measurement-report", b.head, -1);
+-}
+-
+-
+-#ifdef CONFIG_WNM_AP
+-
+-static int
+-hostapd_bss_tr_send(struct hostapd_data *hapd, u8 *addr, bool disassoc_imminent, bool abridged,
+-		    u16 disassoc_timer, u8 validity_period, u8 dialog_token,
+-		    struct blob_attr *neighbors, u8 mbo_reason, u8 cell_pref, u8 reassoc_delay)
+-{
+-	struct blob_attr *cur;
+-	struct sta_info *sta;
+-	int nr_len = 0;
+-	int rem;
+-	u8 *nr = NULL;
+-	u8 req_mode = 0;
+-	u8 mbo[10];
+-	size_t mbo_len = 0;
+-
+-	sta = ap_get_sta(hapd, addr);
+-	if (!sta)
+-		return UBUS_STATUS_NOT_FOUND;
+-
+-	if (neighbors) {
+-		u8 *nr_cur;
+-
+-		if (blobmsg_check_array(neighbors,
+-					BLOBMSG_TYPE_STRING) < 0)
+-			return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-		blobmsg_for_each_attr(cur, neighbors, rem) {
+-			int len = strlen(blobmsg_get_string(cur));
+-
+-			if (len % 2)
+-				return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-			nr_len += (len / 2) + 2;
+-		}
+-
+-		if (nr_len) {
+-			nr = os_zalloc(nr_len);
+-			if (!nr)
+-				return UBUS_STATUS_UNKNOWN_ERROR;
+-		}
+-
+-		nr_cur = nr;
+-		blobmsg_for_each_attr(cur, neighbors, rem) {
+-			int len = strlen(blobmsg_get_string(cur)) / 2;
+-
+-			*nr_cur++ = WLAN_EID_NEIGHBOR_REPORT;
+-			*nr_cur++ = (u8) len;
+-			if (hexstr2bin(blobmsg_data(cur), nr_cur, len)) {
+-				free(nr);
+-				return UBUS_STATUS_INVALID_ARGUMENT;
+-			}
+-
+-			nr_cur += len;
+-		}
+-	}
+-
+-	if (nr)
+-		req_mode |= WNM_BSS_TM_REQ_PREF_CAND_LIST_INCLUDED;
+-
+-	if (abridged)
+-		req_mode |= WNM_BSS_TM_REQ_ABRIDGED;
+-
+-	if (disassoc_imminent)
+-		req_mode |= WNM_BSS_TM_REQ_DISASSOC_IMMINENT;
+-
+-#ifdef CONFIG_MBO
+-	u8 *mbo_pos = mbo;
+-
+-	if (mbo_reason > MBO_TRANSITION_REASON_PREMIUM_AP)
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	if (cell_pref != 0 && cell_pref != 1 && cell_pref != 255)
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	if (reassoc_delay > 65535 || (reassoc_delay && !disassoc_imminent))
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	*mbo_pos++ = MBO_ATTR_ID_TRANSITION_REASON;
+-	*mbo_pos++ = 1;
+-	*mbo_pos++ = mbo_reason;
+-	*mbo_pos++ = MBO_ATTR_ID_CELL_DATA_PREF;
+-	*mbo_pos++ = 1;
+-	*mbo_pos++ = cell_pref;
+-
+-	if (reassoc_delay) {
+-		*mbo_pos++ = MBO_ATTR_ID_ASSOC_RETRY_DELAY;
+-		*mbo_pos++ = 2;
+-		WPA_PUT_LE16(mbo_pos, reassoc_delay);
+-		mbo_pos += 2;
+-	}
+-
+-	mbo_len = mbo_pos - mbo;
+-#endif
+-
+-	if (wnm_send_bss_tm_req(hapd, sta, req_mode, disassoc_timer, validity_period, NULL,
+-				dialog_token, NULL, nr, nr_len, mbo_len ? mbo : NULL, mbo_len))
+-		return UBUS_STATUS_UNKNOWN_ERROR;
+-
+-	return 0;
+-}
+-
+-enum {
+-	BSS_TR_ADDR,
+-	BSS_TR_DA_IMMINENT,
+-	BSS_TR_DA_TIMER,
+-	BSS_TR_VALID_PERIOD,
+-	BSS_TR_NEIGHBORS,
+-	BSS_TR_ABRIDGED,
+-	BSS_TR_DIALOG_TOKEN,
+-#ifdef CONFIG_MBO
+-	BSS_TR_MBO_REASON,
+-	BSS_TR_CELL_PREF,
+-	BSS_TR_REASSOC_DELAY,
+-#endif
+-	__BSS_TR_DISASSOC_MAX
+-};
+-
+-static const struct blobmsg_policy bss_tr_policy[__BSS_TR_DISASSOC_MAX] = {
+-	[BSS_TR_ADDR] = { "addr", BLOBMSG_TYPE_STRING },
+-	[BSS_TR_DA_IMMINENT] = { "disassociation_imminent", BLOBMSG_TYPE_BOOL },
+-	[BSS_TR_DA_TIMER] = { "disassociation_timer", BLOBMSG_TYPE_INT32 },
+-	[BSS_TR_VALID_PERIOD] = { "validity_period", BLOBMSG_TYPE_INT32 },
+-	[BSS_TR_NEIGHBORS] = { "neighbors", BLOBMSG_TYPE_ARRAY },
+-	[BSS_TR_ABRIDGED] = { "abridged", BLOBMSG_TYPE_BOOL },
+-	[BSS_TR_DIALOG_TOKEN] = { "dialog_token", BLOBMSG_TYPE_INT32 },
+-#ifdef CONFIG_MBO
+-	[BSS_TR_MBO_REASON] = { "mbo_reason", BLOBMSG_TYPE_INT32 },
+-	[BSS_TR_CELL_PREF] = { "cell_pref", BLOBMSG_TYPE_INT32 },
+-	[BSS_TR_REASSOC_DELAY] = { "reassoc_delay", BLOBMSG_TYPE_INT32 },
+-#endif
+-};
+-
+-static int
+-hostapd_bss_transition_request(struct ubus_context *ctx, struct ubus_object *obj,
+-			       struct ubus_request_data *ureq, const char *method,
+-			       struct blob_attr *msg)
+-{
+-	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
+-	struct blob_attr *tb[__BSS_TR_DISASSOC_MAX];
+-	struct sta_info *sta;
+-	u32 da_timer = 0;
+-	u32 valid_period = 0;
+-	u8 addr[ETH_ALEN];
+-	u32 dialog_token = 1;
+-	bool abridged;
+-	bool da_imminent;
+-	u8 mbo_reason;
+-	u8 cell_pref;
+-	u8 reassoc_delay;
+-
+-	blobmsg_parse(bss_tr_policy, __BSS_TR_DISASSOC_MAX, tb, blob_data(msg), blob_len(msg));
+-
+-	if (!tb[BSS_TR_ADDR])
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	if (hwaddr_aton(blobmsg_data(tb[BSS_TR_ADDR]), addr))
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	if (tb[BSS_TR_DA_TIMER])
+-		da_timer = blobmsg_get_u32(tb[BSS_TR_DA_TIMER]);
+-
+-	if (tb[BSS_TR_VALID_PERIOD])
+-		valid_period = blobmsg_get_u32(tb[BSS_TR_VALID_PERIOD]);
+-
+-	if (tb[BSS_TR_DIALOG_TOKEN])
+-		dialog_token = blobmsg_get_u32(tb[BSS_TR_DIALOG_TOKEN]);
+-
+-	da_imminent = !!(tb[BSS_TR_DA_IMMINENT] && blobmsg_get_bool(tb[BSS_TR_DA_IMMINENT]));
+-	abridged = !!(tb[BSS_TR_ABRIDGED] && blobmsg_get_bool(tb[BSS_TR_ABRIDGED]));
+-
+-#ifdef CONFIG_MBO
+-	if (tb[BSS_TR_MBO_REASON])
+-		mbo_reason = blobmsg_get_u32(tb[BSS_TR_MBO_REASON]);
+-
+-	if (tb[BSS_TR_CELL_PREF])
+-		cell_pref = blobmsg_get_u32(tb[BSS_TR_CELL_PREF]);
+-
+-	if (tb[BSS_TR_REASSOC_DELAY])
+-		reassoc_delay = blobmsg_get_u32(tb[BSS_TR_REASSOC_DELAY]);
+-#endif
+-
+-	return hostapd_bss_tr_send(hapd, addr, da_imminent, abridged, da_timer, valid_period,
+-				   dialog_token, tb[BSS_TR_NEIGHBORS], mbo_reason, cell_pref, reassoc_delay);
+-}
+-#endif
+-
+-#ifdef CONFIG_AIRTIME_POLICY
+-enum {
+-	UPDATE_AIRTIME_STA,
+-	UPDATE_AIRTIME_WEIGHT,
+-	__UPDATE_AIRTIME_MAX,
+-};
+-
+-
+-static const struct blobmsg_policy airtime_policy[__UPDATE_AIRTIME_MAX] = {
+-	[UPDATE_AIRTIME_STA] = { "sta", BLOBMSG_TYPE_STRING },
+-	[UPDATE_AIRTIME_WEIGHT] = { "weight", BLOBMSG_TYPE_INT32 },
+-};
+-
+-static int
+-hostapd_bss_update_airtime(struct ubus_context *ctx, struct ubus_object *obj,
+-			   struct ubus_request_data *ureq, const char *method,
+-			   struct blob_attr *msg)
+-{
+-	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
+-	struct blob_attr *tb[__UPDATE_AIRTIME_MAX];
+-	struct sta_info *sta = NULL;
+-	u8 addr[ETH_ALEN];
+-	int weight;
+-
+-	blobmsg_parse(airtime_policy, __UPDATE_AIRTIME_MAX, tb, blob_data(msg), blob_len(msg));
+-
+-	if (!tb[UPDATE_AIRTIME_WEIGHT])
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	weight = blobmsg_get_u32(tb[UPDATE_AIRTIME_WEIGHT]);
+-
+-	if (!tb[UPDATE_AIRTIME_STA]) {
+-		if (!weight)
+-			return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-		hapd->conf->airtime_weight = weight;
+-		return 0;
+-	}
+-
+-	if (hwaddr_aton(blobmsg_data(tb[UPDATE_AIRTIME_STA]), addr))
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	sta = ap_get_sta(hapd, addr);
+-	if (!sta)
+-		return UBUS_STATUS_NOT_FOUND;
+-
+-	sta->dyn_airtime_weight = weight;
+-	airtime_policy_new_sta(hapd, sta);
+-
+-	return 0;
+-}
+-#endif
+-
+-
+-static const struct ubus_method bss_methods[] = {
+-	UBUS_METHOD_NOARG("reload", hostapd_bss_reload),
+-	UBUS_METHOD_NOARG("get_clients", hostapd_bss_get_clients),
+-	UBUS_METHOD_NOARG("get_status", hostapd_bss_get_status),
+-	UBUS_METHOD("del_client", hostapd_bss_del_client, del_policy),
+-#ifdef CONFIG_AIRTIME_POLICY
+-	UBUS_METHOD("update_airtime", hostapd_bss_update_airtime, airtime_policy),
+-#endif
+-	UBUS_METHOD_NOARG("list_bans", hostapd_bss_list_bans),
+-#ifdef CONFIG_WPS
+-	UBUS_METHOD_NOARG("wps_start", hostapd_bss_wps_start),
+-	UBUS_METHOD_NOARG("wps_status", hostapd_bss_wps_status),
+-	UBUS_METHOD_NOARG("wps_cancel", hostapd_bss_wps_cancel),
+-#endif
+-	UBUS_METHOD_NOARG("update_beacon", hostapd_bss_update_beacon),
+-	UBUS_METHOD_NOARG("get_features", hostapd_bss_get_features),
+-#ifdef NEED_AP_MLME
+-	UBUS_METHOD("switch_chan", hostapd_switch_chan, csa_policy),
+-#endif
+-	UBUS_METHOD("set_vendor_elements", hostapd_vendor_elements, ve_policy),
+-	UBUS_METHOD("notify_response", hostapd_notify_response, notify_policy),
+-	UBUS_METHOD("bss_mgmt_enable", hostapd_bss_mgmt_enable, bss_mgmt_enable_policy),
+-	UBUS_METHOD_NOARG("rrm_nr_get_own", hostapd_rrm_nr_get_own),
+-	UBUS_METHOD_NOARG("rrm_nr_list", hostapd_rrm_nr_list),
+-	UBUS_METHOD("rrm_nr_set", hostapd_rrm_nr_set, nr_set_policy),
+-	UBUS_METHOD("rrm_beacon_req", hostapd_rrm_beacon_req, beacon_req_policy),
+-	UBUS_METHOD("link_measurement_req", hostapd_rrm_lm_req, lm_req_policy),
+-#ifdef CONFIG_WNM_AP
+-	UBUS_METHOD("bss_transition_request", hostapd_bss_transition_request, bss_tr_policy),
+-#endif
+-};
+-
+-static struct ubus_object_type bss_object_type =
+-	UBUS_OBJECT_TYPE("hostapd_bss", bss_methods);
+-
+-static int avl_compare_macaddr(const void *k1, const void *k2, void *ptr)
+-{
+-	return memcmp(k1, k2, ETH_ALEN);
+-}
+-
+-void hostapd_ubus_add_bss(struct hostapd_data *hapd)
+-{
+-	struct ubus_object *obj = &hapd->ubus.obj;
+-	char *name;
+-	int ret;
+-
+-#ifdef CONFIG_MESH
+-	if (hapd->conf->mesh & MESH_ENABLED)
+-		return;
+-#endif
+-
+-	if (!hostapd_ubus_init())
+-		return;
+-
+-	if (asprintf(&name, "hostapd.%s", hapd->conf->iface) < 0)
+-		return;
+-
+-	avl_init(&hapd->ubus.banned, avl_compare_macaddr, false, NULL);
+-	obj->name = name;
+-	obj->type = &bss_object_type;
+-	obj->methods = bss_object_type.methods;
+-	obj->n_methods = bss_object_type.n_methods;
+-	ret = ubus_add_object(ctx, obj);
+-	hostapd_ubus_ref_inc();
+-
+-	hostapd_send_shared_event(&hapd->iface->interfaces->ubus, hapd->conf->iface, "add");
+-}
+-
+-void hostapd_ubus_free_bss(struct hostapd_data *hapd)
+-{
+-	struct ubus_object *obj = &hapd->ubus.obj;
+-	char *name = (char *) obj->name;
+-
+-#ifdef CONFIG_MESH
+-	if (hapd->conf->mesh & MESH_ENABLED)
+-		return;
+-#endif
+-
+-	if (!ctx)
+-		return;
+-
+-	hostapd_send_shared_event(&hapd->iface->interfaces->ubus, hapd->conf->iface, "remove");
+-
+-	if (obj->id) {
+-		ubus_remove_object(ctx, obj);
+-		hostapd_ubus_ref_dec();
+-	}
+-
+-	free(name);
+-}
+-
+-static void
+-hostapd_ubus_vlan_action(struct hostapd_data *hapd, struct hostapd_vlan *vlan,
+-			 const char *action)
+-{
+-	struct vlan_description *desc = &vlan->vlan_desc;
+-	void *c;
+-	int i;
+-
+-	if (!hapd->ubus.obj.has_subscribers)
+-		return;
+-
+-	blob_buf_init(&b, 0);
+-	blobmsg_add_string(&b, "ifname", vlan->ifname);
+-	blobmsg_add_string(&b, "bridge", vlan->bridge);
+-	blobmsg_add_u32(&b, "vlan_id", vlan->vlan_id);
+-
+-	if (desc->notempty) {
+-		blobmsg_add_u32(&b, "untagged", desc->untagged);
+-		c = blobmsg_open_array(&b, "tagged");
+-		for (i = 0; i < ARRAY_SIZE(desc->tagged) && desc->tagged[i]; i++)
+-			blobmsg_add_u32(&b, "", desc->tagged[i]);
+-		blobmsg_close_array(&b, c);
+-	}
+-
+-	ubus_notify(ctx, &hapd->ubus.obj, action, b.head, -1);
+-}
+-
+-void hostapd_ubus_add_vlan(struct hostapd_data *hapd, struct hostapd_vlan *vlan)
+-{
+-	hostapd_ubus_vlan_action(hapd, vlan, "vlan_add");
+-}
+-
+-void hostapd_ubus_remove_vlan(struct hostapd_data *hapd, struct hostapd_vlan *vlan)
+-{
+-	hostapd_ubus_vlan_action(hapd, vlan, "vlan_remove");
+-}
+-
+-static const struct ubus_method daemon_methods[] = {
+-	UBUS_METHOD("config_add", hostapd_config_add, config_add_policy),
+-	UBUS_METHOD("config_remove", hostapd_config_remove, config_remove_policy),
+-};
+-
+-static struct ubus_object_type daemon_object_type =
+-	UBUS_OBJECT_TYPE("hostapd", daemon_methods);
+-
+-void hostapd_ubus_add(struct hapd_interfaces *interfaces)
+-{
+-	struct ubus_object *obj = &interfaces->ubus;
+-	int ret;
+-
+-	if (!hostapd_ubus_init())
+-		return;
+-
+-	obj->name = strdup("hostapd");
+-
+-	obj->type = &daemon_object_type;
+-	obj->methods = daemon_object_type.methods;
+-	obj->n_methods = daemon_object_type.n_methods;
+-	ret = ubus_add_object(ctx, obj);
+-	hostapd_ubus_ref_inc();
+-}
+-
+-void hostapd_ubus_free(struct hapd_interfaces *interfaces)
+-{
+-	struct ubus_object *obj = &interfaces->ubus;
+-	char *name = (char *) obj->name;
+-
+-	if (!ctx)
+-		return;
+-
+-	if (obj->id) {
+-		ubus_remove_object(ctx, obj);
+-		hostapd_ubus_ref_dec();
+-	}
+-
+-	free(name);
+-}
+-
+-struct ubus_event_req {
+-	struct ubus_notify_request nreq;
+-	int resp;
+-};
+-
+-static void
+-ubus_event_cb(struct ubus_notify_request *req, int idx, int ret)
+-{
+-	struct ubus_event_req *ureq = container_of(req, struct ubus_event_req, nreq);
+-
+-	ureq->resp = ret;
+-}
+-
+-int hostapd_ubus_handle_event(struct hostapd_data *hapd, struct hostapd_ubus_request *req)
+-{
+-	struct ubus_banned_client *ban;
+-	const char *types[HOSTAPD_UBUS_TYPE_MAX] = {
+-		[HOSTAPD_UBUS_PROBE_REQ] = "probe",
+-		[HOSTAPD_UBUS_AUTH_REQ] = "auth",
+-		[HOSTAPD_UBUS_ASSOC_REQ] = "assoc",
+-	};
+-	const char *type = "mgmt";
+-	struct ubus_event_req ureq = {};
+-	const u8 *addr;
+-
+-	if (req->mgmt_frame)
+-		addr = req->mgmt_frame->sa;
+-	else
+-		addr = req->addr;
+-
+-	ban = avl_find_element(&hapd->ubus.banned, addr, ban, avl);
+-	if (ban)
+-		return WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA;
+-
+-	if (!hapd->ubus.obj.has_subscribers)
+-		return WLAN_STATUS_SUCCESS;
+-
+-	if (req->type < ARRAY_SIZE(types))
+-		type = types[req->type];
+-
+-	blob_buf_init(&b, 0);
+-	blobmsg_add_macaddr(&b, "address", addr);
+-	if (req->mgmt_frame)
+-		blobmsg_add_macaddr(&b, "target", req->mgmt_frame->da);
+-	if (req->ssi_signal)
+-		blobmsg_add_u32(&b, "signal", req->ssi_signal);
+-	blobmsg_add_u32(&b, "freq", hapd->iface->freq);
+-
+-	if (req->elems) {
+-		if(req->elems->ht_capabilities)
+-		{
+-			struct ieee80211_ht_capabilities *ht_capabilities;
+-			void *ht_cap, *ht_cap_mcs_set, *mcs_set;
+-
+-
+-			ht_capabilities = (struct ieee80211_ht_capabilities*) req->elems->ht_capabilities;
+-			ht_cap = blobmsg_open_table(&b, "ht_capabilities");
+-			blobmsg_add_u16(&b, "ht_capabilities_info", ht_capabilities->ht_capabilities_info);
+-			ht_cap_mcs_set = blobmsg_open_table(&b, "supported_mcs_set");
+-			blobmsg_add_u16(&b, "a_mpdu_params", ht_capabilities->a_mpdu_params);
+-			blobmsg_add_u16(&b, "ht_extended_capabilities", ht_capabilities->ht_extended_capabilities);
+-			blobmsg_add_u32(&b, "tx_bf_capability_info", ht_capabilities->tx_bf_capability_info);
+-			blobmsg_add_u16(&b, "asel_capabilities", ht_capabilities->asel_capabilities);
+-			mcs_set = blobmsg_open_array(&b, "supported_mcs_set");
+-			for (int i = 0; i < 16; i++) {
+-				blobmsg_add_u16(&b, NULL, (u16) ht_capabilities->supported_mcs_set[i]);
+-			}
+-			blobmsg_close_array(&b, mcs_set);
+-			blobmsg_close_table(&b, ht_cap_mcs_set);
+-			blobmsg_close_table(&b, ht_cap);
+-		}
+-		if(req->elems->vht_capabilities)
+-		{
+-			struct ieee80211_vht_capabilities *vht_capabilities;
+-			void *vht_cap, *vht_cap_mcs_set;
+-
+-			vht_capabilities = (struct ieee80211_vht_capabilities*) req->elems->vht_capabilities;
+-			vht_cap = blobmsg_open_table(&b, "vht_capabilities");
+-			blobmsg_add_u32(&b, "vht_capabilities_info", vht_capabilities->vht_capabilities_info);
+-			vht_cap_mcs_set = blobmsg_open_table(&b, "vht_supported_mcs_set");
+-			blobmsg_add_u16(&b, "rx_map", vht_capabilities->vht_supported_mcs_set.rx_map);
+-			blobmsg_add_u16(&b, "rx_highest", vht_capabilities->vht_supported_mcs_set.rx_highest);
+-			blobmsg_add_u16(&b, "tx_map", vht_capabilities->vht_supported_mcs_set.tx_map);
+-			blobmsg_add_u16(&b, "tx_highest", vht_capabilities->vht_supported_mcs_set.tx_highest);
+-			blobmsg_close_table(&b, vht_cap_mcs_set);
+-			blobmsg_close_table(&b, vht_cap);
+-		}
+-	}
+-
+-	if (!hapd->ubus.notify_response) {
+-		ubus_notify(ctx, &hapd->ubus.obj, type, b.head, -1);
+-		return WLAN_STATUS_SUCCESS;
+-	}
+-
+-	if (ubus_notify_async(ctx, &hapd->ubus.obj, type, b.head, &ureq.nreq))
+-		return WLAN_STATUS_SUCCESS;
+-
+-	ureq.nreq.status_cb = ubus_event_cb;
+-	ubus_complete_request(ctx, &ureq.nreq.req, 100);
+-
+-	if (ureq.resp)
+-		return ureq.resp;
+-
+-	return WLAN_STATUS_SUCCESS;
+-}
+-
+-void hostapd_ubus_notify(struct hostapd_data *hapd, const char *type, const u8 *addr)
+-{
+-	if (!hapd->ubus.obj.has_subscribers)
+-		return;
+-
+-	if (!addr)
+-		return;
+-
+-	blob_buf_init(&b, 0);
+-	blobmsg_add_macaddr(&b, "address", addr);
+-
+-	ubus_notify(ctx, &hapd->ubus.obj, type, b.head, -1);
+-}
+-
+-void hostapd_ubus_notify_authorized(struct hostapd_data *hapd, struct sta_info *sta,
+-				    const char *auth_alg)
+-{
+-	if (!hapd->ubus.obj.has_subscribers)
+-		return;
+-
+-	blob_buf_init(&b, 0);
+-	blobmsg_add_macaddr(&b, "address", sta->addr);
+-	if (auth_alg)
+-		blobmsg_add_string(&b, "auth-alg", auth_alg);
+-
+-	ubus_notify(ctx, &hapd->ubus.obj, "sta-authorized", b.head, -1);
+-}
+-
+-void hostapd_ubus_notify_beacon_report(
+-	struct hostapd_data *hapd, const u8 *addr, u8 token, u8 rep_mode,
+-	struct rrm_measurement_beacon_report *rep, size_t len)
+-{
+-	if (!hapd->ubus.obj.has_subscribers)
+-		return;
+-
+-	if (!addr || !rep)
+-		return;
+-
+-	blob_buf_init(&b, 0);
+-	blobmsg_add_macaddr(&b, "address", addr);
+-	blobmsg_add_u16(&b, "op-class", rep->op_class);
+-	blobmsg_add_u16(&b, "channel", rep->channel);
+-	blobmsg_add_u64(&b, "start-time", rep->start_time);
+-	blobmsg_add_u16(&b, "duration", rep->duration);
+-	blobmsg_add_u16(&b, "report-info", rep->report_info);
+-	blobmsg_add_u16(&b, "rcpi", rep->rcpi);
+-	blobmsg_add_u16(&b, "rsni", rep->rsni);
+-	blobmsg_add_macaddr(&b, "bssid", rep->bssid);
+-	blobmsg_add_u16(&b, "antenna-id", rep->antenna_id);
+-	blobmsg_add_u16(&b, "parent-tsf", rep->parent_tsf);
+-	blobmsg_add_u16(&b, "rep-mode", rep_mode);
+-
+-	ubus_notify(ctx, &hapd->ubus.obj, "beacon-report", b.head, -1);
+-}
+-
+-void hostapd_ubus_notify_radar_detected(struct hostapd_iface *iface, int frequency,
+-					int chan_width, int cf1, int cf2)
+-{
+-	struct hostapd_data *hapd;
+-	int i;
+-
+-	blob_buf_init(&b, 0);
+-	blobmsg_add_u16(&b, "frequency", frequency);
+-	blobmsg_add_u16(&b, "width", chan_width);
+-	blobmsg_add_u16(&b, "center1", cf1);
+-	blobmsg_add_u16(&b, "center2", cf2);
+-
+-	for (i = 0; i < iface->num_bss; i++) {
+-		hapd = iface->bss[i];
+-		ubus_notify(ctx, &hapd->ubus.obj, "radar-detected", b.head, -1);
+-	}
+-}
+-
+-#ifdef CONFIG_WNM_AP
+-static void hostapd_ubus_notify_bss_transition_add_candidate_list(
+-	const u8 *candidate_list, u16 candidate_list_len)
+-{
+-	char *cl_str;
+-	int i;
+-
+-	if (candidate_list_len == 0)
+-		return;
+-
+-	cl_str = blobmsg_alloc_string_buffer(&b, "candidate-list", candidate_list_len * 2 + 1);
+-	for (i = 0; i < candidate_list_len; i++)
+-		snprintf(&cl_str[i*2], 3, "%02X", candidate_list[i]);
+-	blobmsg_add_string_buffer(&b);
+-
+-}
+-#endif
+-
+-void hostapd_ubus_notify_bss_transition_response(
+-	struct hostapd_data *hapd, const u8 *addr, u8 dialog_token, u8 status_code,
+-	u8 bss_termination_delay, const u8 *target_bssid,
+-	const u8 *candidate_list, u16 candidate_list_len)
+-{
+-#ifdef CONFIG_WNM_AP
+-	u16 i;
+-
+-	if (!hapd->ubus.obj.has_subscribers)
+-		return;
+-
+-	if (!addr)
+-		return;
+-
+-	blob_buf_init(&b, 0);
+-	blobmsg_add_macaddr(&b, "address", addr);
+-	blobmsg_add_u8(&b, "dialog-token", dialog_token);
+-	blobmsg_add_u8(&b, "status-code", status_code);
+-	blobmsg_add_u8(&b, "bss-termination-delay", bss_termination_delay);
+-	if (target_bssid)
+-		blobmsg_add_macaddr(&b, "target-bssid", target_bssid);
+-	
+-	hostapd_ubus_notify_bss_transition_add_candidate_list(candidate_list, candidate_list_len);
+-
+-	ubus_notify(ctx, &hapd->ubus.obj, "bss-transition-response", b.head, -1);
+-#endif
+-}
+-
+-int hostapd_ubus_notify_bss_transition_query(
+-	struct hostapd_data *hapd, const u8 *addr, u8 dialog_token, u8 reason,
+-	const u8 *candidate_list, u16 candidate_list_len)
+-{
+-#ifdef CONFIG_WNM_AP
+-	struct ubus_event_req ureq = {};
+-	char *cl_str;
+-	u16 i;
+-
+-	if (!hapd->ubus.obj.has_subscribers)
+-		return 0;
+-
+-	if (!addr)
+-		return 0;
+-
+-	blob_buf_init(&b, 0);
+-	blobmsg_add_macaddr(&b, "address", addr);
+-	blobmsg_add_u8(&b, "dialog-token", dialog_token);
+-	blobmsg_add_u8(&b, "reason", reason);
+-	hostapd_ubus_notify_bss_transition_add_candidate_list(candidate_list, candidate_list_len);
+-
+-	if (!hapd->ubus.notify_response) {
+-		ubus_notify(ctx, &hapd->ubus.obj, "bss-transition-query", b.head, -1);
+-		return 0;
+-	}
+-
+-	if (ubus_notify_async(ctx, &hapd->ubus.obj, "bss-transition-query", b.head, &ureq.nreq))
+-		return 0;
+-
+-	ureq.nreq.status_cb = ubus_event_cb;
+-	ubus_complete_request(ctx, &ureq.nreq.req, 100);
+-
+-	return ureq.resp;
+-#endif
+-}
+diff --git a/package/network/services/hostapd/src/src/ap/ubus.h b/package/network/services/hostapd/src/src/ap/ubus.h
+deleted file mode 100644
+index b0f7c44ab5..0000000000
+--- a/package/network/services/hostapd/src/src/ap/ubus.h
++++ /dev/null
+@@ -1,154 +0,0 @@
+-/*
+- * hostapd / ubus support
+- * Copyright (c) 2013, Felix Fietkau <nbd@nbd.name>
+- *
+- * This software may be distributed under the terms of the BSD license.
+- * See README for more details.
+- */
+-#ifndef __HOSTAPD_UBUS_H
+-#define __HOSTAPD_UBUS_H
+-
+-enum hostapd_ubus_event_type {
+-	HOSTAPD_UBUS_PROBE_REQ,
+-	HOSTAPD_UBUS_AUTH_REQ,
+-	HOSTAPD_UBUS_ASSOC_REQ,
+-	HOSTAPD_UBUS_TYPE_MAX
+-};
+-
+-struct hostapd_ubus_request {
+-	enum hostapd_ubus_event_type type;
+-	const struct ieee80211_mgmt *mgmt_frame;
+-	const struct ieee802_11_elems *elems;
+-	int ssi_signal; /* dBm */
+-	const u8 *addr;
+-};
+-
+-struct hostapd_iface;
+-struct hostapd_data;
+-struct hapd_interfaces;
+-struct rrm_measurement_beacon_report;
+-
+-#ifdef UBUS_SUPPORT
+-
+-#include <libubox/avl.h>
+-#include <libubus.h>
+-
+-struct hostapd_ubus_bss {
+-	struct ubus_object obj;
+-	struct avl_tree banned;
+-	int notify_response;
+-};
+-
+-void hostapd_ubus_add_iface(struct hostapd_iface *iface);
+-void hostapd_ubus_free_iface(struct hostapd_iface *iface);
+-void hostapd_ubus_add_bss(struct hostapd_data *hapd);
+-void hostapd_ubus_free_bss(struct hostapd_data *hapd);
+-void hostapd_ubus_add_vlan(struct hostapd_data *hapd, struct hostapd_vlan *vlan);
+-void hostapd_ubus_remove_vlan(struct hostapd_data *hapd, struct hostapd_vlan *vlan);
+-
+-int hostapd_ubus_handle_event(struct hostapd_data *hapd, struct hostapd_ubus_request *req);
+-void hostapd_ubus_handle_link_measurement(struct hostapd_data *hapd, const u8 *data, size_t len);
+-void hostapd_ubus_notify(struct hostapd_data *hapd, const char *type, const u8 *mac);
+-void hostapd_ubus_notify_beacon_report(struct hostapd_data *hapd,
+-				       const u8 *addr, u8 token, u8 rep_mode,
+-				       struct rrm_measurement_beacon_report *rep,
+-				       size_t len);
+-void hostapd_ubus_notify_radar_detected(struct hostapd_iface *iface, int frequency,
+-					int chan_width, int cf1, int cf2);
+-
+-void hostapd_ubus_notify_bss_transition_response(
+-	struct hostapd_data *hapd, const u8 *addr, u8 dialog_token, u8 status_code,
+-	u8 bss_termination_delay, const u8 *target_bssid,
+-	const u8 *candidate_list, u16 candidate_list_len);
+-void hostapd_ubus_add(struct hapd_interfaces *interfaces);
+-void hostapd_ubus_free(struct hapd_interfaces *interfaces);
+-int hostapd_ubus_notify_bss_transition_query(
+-	struct hostapd_data *hapd, const u8 *addr, u8 dialog_token, u8 reason,
+-	const u8 *candidate_list, u16 candidate_list_len);
+-void hostapd_ubus_notify_authorized(struct hostapd_data *hapd, struct sta_info *sta,
+-				    const char *auth_alg);
+-
+-#else
+-
+-struct hostapd_ubus_bss {};
+-
+-static inline void hostapd_ubus_add_iface(struct hostapd_iface *iface)
+-{
+-}
+-
+-static inline void hostapd_ubus_free_iface(struct hostapd_iface *iface)
+-{
+-}
+-
+-static inline void hostapd_ubus_add_bss(struct hostapd_data *hapd)
+-{
+-}
+-
+-static inline void hostapd_ubus_free_bss(struct hostapd_data *hapd)
+-{
+-}
+-
+-static inline void hostapd_ubus_add_vlan(struct hostapd_data *hapd, struct hostapd_vlan *vlan)
+-{
+-}
+-
+-static inline void hostapd_ubus_remove_vlan(struct hostapd_data *hapd, struct hostapd_vlan *vlan)
+-{
+-}
+-
+-static inline int hostapd_ubus_handle_event(struct hostapd_data *hapd, struct hostapd_ubus_request *req)
+-{
+-	return 0;
+-}
+-
+-static inline void hostapd_ubus_handle_link_measurement(struct hostapd_data *hapd, const u8 *data, size_t len)
+-{
+-}
+-
+-static inline void hostapd_ubus_notify(struct hostapd_data *hapd, const char *type, const u8 *mac)
+-{
+-}
+-
+-static inline void hostapd_ubus_notify_beacon_report(struct hostapd_data *hapd,
+-						     const u8 *addr, u8 token,
+-						     u8 rep_mode,
+-						     struct rrm_measurement_beacon_report *rep,
+-						     size_t len)
+-{
+-}
+-static inline void hostapd_ubus_notify_radar_detected(struct hostapd_iface *iface, int frequency,
+-						      int chan_width, int cf1, int cf2)
+-{
+-}
+-
+-static inline void hostapd_ubus_notify_bss_transition_response(
+-	struct hostapd_data *hapd, const u8 *addr, u8 dialog_token, u8 status_code,
+-	u8 bss_termination_delay, const u8 *target_bssid,
+-	const u8 *candidate_list, u16 candidate_list_len)
+-{
+-}
+-
+-static inline void hostapd_ubus_add(struct hapd_interfaces *interfaces)
+-{
+-}
+-
+-static inline void hostapd_ubus_free(struct hapd_interfaces *interfaces)
+-{
+-}
+-
+-static inline int hostapd_ubus_notify_bss_transition_query(
+-	struct hostapd_data *hapd, const u8 *addr, u8 dialog_token, u8 reason,
+-	const u8 *candidate_list, u16 candidate_list_len)
+-{
+-	return 0;
+-}
+-
+-static inline void
+-hostapd_ubus_notify_authorized(struct hostapd_data *hapd, struct sta_info *sta,
+-			       const char *auth_alg)
+-{
+-}
+-
+-#endif
+-
+-#endif
+diff --git a/package/network/services/hostapd/src/src/utils/build_features.h b/package/network/services/hostapd/src/src/utils/build_features.h
+deleted file mode 100644
+index 553769eceb..0000000000
+--- a/package/network/services/hostapd/src/src/utils/build_features.h
++++ /dev/null
+@@ -1,65 +0,0 @@
+-#ifndef BUILD_FEATURES_H
+-#define BUILD_FEATURES_H
+-
+-static inline int has_feature(const char *feat)
+-{
+-#if defined(IEEE8021X_EAPOL) || (defined(HOSTAPD) && !defined(CONFIG_NO_RADIUS))
+-	if (!strcmp(feat, "eap"))
+-		return 1;
+-#endif
+-#ifdef CONFIG_IEEE80211AC
+-	if (!strcmp(feat, "11ac"))
+-		return 1;
+-#endif
+-#ifdef CONFIG_IEEE80211AX
+-	if (!strcmp(feat, "11ax"))
+-		return 1;
+-#endif
+-#ifdef CONFIG_IEEE80211R
+-	if (!strcmp(feat, "11r"))
+-		return 1;
+-#endif
+-#ifdef CONFIG_ACS
+-	if (!strcmp(feat, "acs"))
+-		return 1;
+-#endif
+-#ifdef CONFIG_SAE
+-	if (!strcmp(feat, "sae"))
+-		return 1;
+-#endif
+-#ifdef CONFIG_OWE
+-	if (!strcmp(feat, "owe"))
+-		return 1;
+-#endif
+-#ifdef CONFIG_SUITEB192
+-	if (!strcmp(feat, "suiteb192"))
+-		return 1;
+-#endif
+-#ifdef CONFIG_WEP
+-	if (!strcmp(feat, "wep"))
+-		return 1;
+-#endif
+-#ifdef CONFIG_HS20
+-	if (!strcmp(feat, "hs20"))
+-		return 1;
+-#endif
+-#ifdef CONFIG_WPS
+-	if (!strcmp(feat, "wps"))
+-		return 1;
+-#endif
+-#ifdef CONFIG_FILS
+-	if (!strcmp(feat, "fils"))
+-		return 1;
+-#endif
+-#ifdef CONFIG_OCV
+-	if (!strcmp(feat, "ocv"))
+-		return 1;
+-#endif
+-#ifdef CONFIG_MESH
+-	if (!strcmp(feat, "mesh"))
+-		return 1;
+-#endif
+-	return 0;
+-}
+-
+-#endif /* BUILD_FEATURES_H */
+diff --git a/package/network/services/hostapd/src/wpa_supplicant/ubus.c b/package/network/services/hostapd/src/wpa_supplicant/ubus.c
+deleted file mode 100644
+index 16a68c5073..0000000000
+--- a/package/network/services/hostapd/src/wpa_supplicant/ubus.c
++++ /dev/null
+@@ -1,430 +0,0 @@
+-/*
+- * wpa_supplicant / ubus support
+- * Copyright (c) 2018, Daniel Golle <daniel@makrotopia.org>
+- * Copyright (c) 2013, Felix Fietkau <nbd@nbd.name>
+- *
+- * This software may be distributed under the terms of the BSD license.
+- * See README for more details.
+- */
+-
+-#include "utils/includes.h"
+-#include "utils/common.h"
+-#include "utils/eloop.h"
+-#include "utils/wpabuf.h"
+-#include "common/ieee802_11_defs.h"
+-#include "wpa_supplicant_i.h"
+-#include "wps_supplicant.h"
+-#include "ubus.h"
+-
+-static struct ubus_context *ctx;
+-static struct blob_buf b;
+-static int ctx_ref;
+-
+-static inline struct wpa_global *get_wpa_global_from_object(struct ubus_object *obj)
+-{
+-	return container_of(obj, struct wpa_global, ubus_global);
+-}
+-
+-static inline struct wpa_supplicant *get_wpas_from_object(struct ubus_object *obj)
+-{
+-	return container_of(obj, struct wpa_supplicant, ubus.obj);
+-}
+-
+-static void ubus_receive(int sock, void *eloop_ctx, void *sock_ctx)
+-{
+-	struct ubus_context *ctx = eloop_ctx;
+-	ubus_handle_event(ctx);
+-}
+-
+-static void ubus_reconnect_timeout(void *eloop_data, void *user_ctx)
+-{
+-	if (ubus_reconnect(ctx, NULL)) {
+-		eloop_register_timeout(1, 0, ubus_reconnect_timeout, ctx, NULL);
+-		return;
+-	}
+-
+-	eloop_register_read_sock(ctx->sock.fd, ubus_receive, ctx, NULL);
+-}
+-
+-static void wpas_ubus_connection_lost(struct ubus_context *ctx)
+-{
+-	eloop_unregister_read_sock(ctx->sock.fd);
+-	eloop_register_timeout(1, 0, ubus_reconnect_timeout, ctx, NULL);
+-}
+-
+-static bool wpas_ubus_init(void)
+-{
+-	if (ctx)
+-		return true;
+-
+-	ctx = ubus_connect(NULL);
+-	if (!ctx)
+-		return false;
+-
+-	ctx->connection_lost = wpas_ubus_connection_lost;
+-	eloop_register_read_sock(ctx->sock.fd, ubus_receive, ctx, NULL);
+-	return true;
+-}
+-
+-static void wpas_ubus_ref_inc(void)
+-{
+-	ctx_ref++;
+-}
+-
+-static void wpas_ubus_ref_dec(void)
+-{
+-	ctx_ref--;
+-	if (!ctx)
+-		return;
+-
+-	if (ctx_ref)
+-		return;
+-
+-	eloop_unregister_read_sock(ctx->sock.fd);
+-	ubus_free(ctx);
+-	ctx = NULL;
+-}
+-
+-static int
+-wpas_bss_get_features(struct ubus_context *ctx, struct ubus_object *obj,
+-			struct ubus_request_data *req, const char *method,
+-			struct blob_attr *msg)
+-{
+-	struct wpa_supplicant *wpa_s = get_wpas_from_object(obj);
+-
+-	blob_buf_init(&b, 0);
+-	blobmsg_add_u8(&b, "ht_supported", ht_supported(wpa_s->hw.modes));
+-	blobmsg_add_u8(&b, "vht_supported", vht_supported(wpa_s->hw.modes));
+-	ubus_send_reply(ctx, req, b.head);
+-
+-	return 0;
+-}
+-
+-static int
+-wpas_bss_reload(struct ubus_context *ctx, struct ubus_object *obj,
+-		struct ubus_request_data *req, const char *method,
+-		struct blob_attr *msg)
+-{
+-	struct wpa_supplicant *wpa_s = get_wpas_from_object(obj);
+-
+-	if (wpa_supplicant_reload_configuration(wpa_s))
+-		return UBUS_STATUS_UNKNOWN_ERROR;
+-	else
+-		return 0;
+-}
+-
+-#ifdef CONFIG_WPS
+-enum {
+-	WPS_START_MULTI_AP,
+-	__WPS_START_MAX
+-};
+-
+-static const struct blobmsg_policy wps_start_policy[] = {
+-	[WPS_START_MULTI_AP] = { "multi_ap", BLOBMSG_TYPE_BOOL },
+-};
+-
+-static int
+-wpas_bss_wps_start(struct ubus_context *ctx, struct ubus_object *obj,
+-			struct ubus_request_data *req, const char *method,
+-			struct blob_attr *msg)
+-{
+-	int rc;
+-	struct wpa_supplicant *wpa_s = get_wpas_from_object(obj);
+-	struct blob_attr *tb[__WPS_START_MAX], *cur;
+-	int multi_ap = 0;
+-
+-	blobmsg_parse(wps_start_policy, __WPS_START_MAX, tb, blobmsg_data(msg), blobmsg_data_len(msg));
+-
+-	if (tb[WPS_START_MULTI_AP])
+-		multi_ap = blobmsg_get_bool(tb[WPS_START_MULTI_AP]);
+-
+-	rc = wpas_wps_start_pbc(wpa_s, NULL, 0, multi_ap);
+-
+-	if (rc != 0)
+-		return UBUS_STATUS_NOT_SUPPORTED;
+-
+-	return 0;
+-}
+-
+-static int
+-wpas_bss_wps_cancel(struct ubus_context *ctx, struct ubus_object *obj,
+-			struct ubus_request_data *req, const char *method,
+-			struct blob_attr *msg)
+-{
+-	int rc;
+-	struct wpa_supplicant *wpa_s = get_wpas_from_object(obj);
+-
+-	rc = wpas_wps_cancel(wpa_s);
+-
+-	if (rc != 0)
+-		return UBUS_STATUS_NOT_SUPPORTED;
+-
+-	return 0;
+-}
+-#endif
+-
+-static const struct ubus_method bss_methods[] = {
+-	UBUS_METHOD_NOARG("reload", wpas_bss_reload),
+-	UBUS_METHOD_NOARG("get_features", wpas_bss_get_features),
+-#ifdef CONFIG_WPS
+-	UBUS_METHOD_NOARG("wps_start", wpas_bss_wps_start),
+-	UBUS_METHOD_NOARG("wps_cancel", wpas_bss_wps_cancel),
+-#endif
+-};
+-
+-static struct ubus_object_type bss_object_type =
+-	UBUS_OBJECT_TYPE("wpas_bss", bss_methods);
+-
+-void wpas_ubus_add_bss(struct wpa_supplicant *wpa_s)
+-{
+-	struct ubus_object *obj = &wpa_s->ubus.obj;
+-	char *name;
+-	int ret;
+-
+-	if (!wpas_ubus_init())
+-		return;
+-
+-	if (asprintf(&name, "wpa_supplicant.%s", wpa_s->ifname) < 0)
+-		return;
+-
+-	obj->name = name;
+-	obj->type = &bss_object_type;
+-	obj->methods = bss_object_type.methods;
+-	obj->n_methods = bss_object_type.n_methods;
+-	ret = ubus_add_object(ctx, obj);
+-	wpas_ubus_ref_inc();
+-}
+-
+-void wpas_ubus_free_bss(struct wpa_supplicant *wpa_s)
+-{
+-	struct ubus_object *obj = &wpa_s->ubus.obj;
+-	char *name = (char *) obj->name;
+-
+-	if (!ctx)
+-		return;
+-
+-	if (obj->id) {
+-		ubus_remove_object(ctx, obj);
+-		wpas_ubus_ref_dec();
+-	}
+-
+-	free(name);
+-}
+-
+-enum {
+-	WPAS_CONFIG_DRIVER,
+-	WPAS_CONFIG_IFACE,
+-	WPAS_CONFIG_BRIDGE,
+-	WPAS_CONFIG_HOSTAPD_CTRL,
+-	WPAS_CONFIG_CTRL,
+-	WPAS_CONFIG_FILE,
+-	__WPAS_CONFIG_MAX
+-};
+-
+-static const struct blobmsg_policy wpas_config_add_policy[__WPAS_CONFIG_MAX] = {
+-	[WPAS_CONFIG_DRIVER] = { "driver", BLOBMSG_TYPE_STRING },
+-	[WPAS_CONFIG_IFACE] = { "iface", BLOBMSG_TYPE_STRING },
+-	[WPAS_CONFIG_BRIDGE] = { "bridge", BLOBMSG_TYPE_STRING },
+-	[WPAS_CONFIG_HOSTAPD_CTRL] = { "hostapd_ctrl", BLOBMSG_TYPE_STRING },
+-	[WPAS_CONFIG_CTRL] = { "ctrl", BLOBMSG_TYPE_STRING },
+-	[WPAS_CONFIG_FILE] = { "config", BLOBMSG_TYPE_STRING },
+-};
+-
+-static int
+-wpas_config_add(struct ubus_context *ctx, struct ubus_object *obj,
+-		struct ubus_request_data *req, const char *method,
+-		struct blob_attr *msg)
+-{
+-	struct blob_attr *tb[__WPAS_CONFIG_MAX];
+-	struct wpa_global *global = get_wpa_global_from_object(obj);
+-	struct wpa_interface *iface;
+-
+-	blobmsg_parse(wpas_config_add_policy, __WPAS_CONFIG_MAX, tb, blob_data(msg), blob_len(msg));
+-
+-	if (!tb[WPAS_CONFIG_FILE] || !tb[WPAS_CONFIG_IFACE] || !tb[WPAS_CONFIG_DRIVER])
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	iface = os_zalloc(sizeof(struct wpa_interface));
+-	if (iface == NULL)
+-		return UBUS_STATUS_UNKNOWN_ERROR;
+-
+-	iface->driver = blobmsg_get_string(tb[WPAS_CONFIG_DRIVER]);
+-	iface->ifname = blobmsg_get_string(tb[WPAS_CONFIG_IFACE]);
+-	iface->confname = blobmsg_get_string(tb[WPAS_CONFIG_FILE]);
+-
+-	if (tb[WPAS_CONFIG_BRIDGE])
+-		iface->bridge_ifname = blobmsg_get_string(tb[WPAS_CONFIG_BRIDGE]);
+-
+-	if (tb[WPAS_CONFIG_CTRL])
+-		iface->ctrl_interface = blobmsg_get_string(tb[WPAS_CONFIG_CTRL]);
+-
+-	if (tb[WPAS_CONFIG_HOSTAPD_CTRL])
+-		iface->hostapd_ctrl = blobmsg_get_string(tb[WPAS_CONFIG_HOSTAPD_CTRL]);
+-
+-	if (!wpa_supplicant_add_iface(global, iface, NULL))
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	blob_buf_init(&b, 0);
+-	blobmsg_add_u32(&b, "pid", getpid());
+-	ubus_send_reply(ctx, req, b.head);
+-
+-	return UBUS_STATUS_OK;
+-}
+-
+-enum {
+-	WPAS_CONFIG_REM_IFACE,
+-	__WPAS_CONFIG_REM_MAX
+-};
+-
+-static const struct blobmsg_policy wpas_config_remove_policy[__WPAS_CONFIG_REM_MAX] = {
+-	[WPAS_CONFIG_REM_IFACE] = { "iface", BLOBMSG_TYPE_STRING },
+-};
+-
+-static int
+-wpas_config_remove(struct ubus_context *ctx, struct ubus_object *obj,
+-		   struct ubus_request_data *req, const char *method,
+-		   struct blob_attr *msg)
+-{
+-	struct blob_attr *tb[__WPAS_CONFIG_REM_MAX];
+-	struct wpa_global *global = get_wpa_global_from_object(obj);
+-	struct wpa_supplicant *wpa_s = NULL;
+-	unsigned int found = 0;
+-
+-	blobmsg_parse(wpas_config_remove_policy, __WPAS_CONFIG_REM_MAX, tb, blob_data(msg), blob_len(msg));
+-
+-	if (!tb[WPAS_CONFIG_REM_IFACE])
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	/* find wpa_s object for to-be-removed interface */
+-	for (wpa_s = global->ifaces; wpa_s; wpa_s = wpa_s->next) {
+-		if (!strncmp(wpa_s->ifname,
+-			     blobmsg_get_string(tb[WPAS_CONFIG_REM_IFACE]),
+-			     sizeof(wpa_s->ifname)))
+-		{
+-			found = 1;
+-			break;
+-		}
+-	}
+-
+-	if (!found)
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	if (wpa_supplicant_remove_iface(global, wpa_s, 0))
+-		return UBUS_STATUS_INVALID_ARGUMENT;
+-
+-	return UBUS_STATUS_OK;
+-}
+-
+-static const struct ubus_method wpas_daemon_methods[] = {
+-	UBUS_METHOD("config_add", wpas_config_add, wpas_config_add_policy),
+-	UBUS_METHOD("config_remove", wpas_config_remove, wpas_config_remove_policy),
+-};
+-
+-static struct ubus_object_type wpas_daemon_object_type =
+-	UBUS_OBJECT_TYPE("wpa_supplicant", wpas_daemon_methods);
+-
+-void wpas_ubus_add(struct wpa_global *global)
+-{
+-	struct ubus_object *obj = &global->ubus_global;
+-	int ret;
+-
+-	if (!wpas_ubus_init())
+-		return;
+-
+-	obj->name = strdup("wpa_supplicant");
+-
+-	obj->type = &wpas_daemon_object_type;
+-	obj->methods = wpas_daemon_object_type.methods;
+-	obj->n_methods = wpas_daemon_object_type.n_methods;
+-	ret = ubus_add_object(ctx, obj);
+-	wpas_ubus_ref_inc();
+-}
+-
+-void wpas_ubus_free(struct wpa_global *global)
+-{
+-	struct ubus_object *obj = &global->ubus_global;
+-	char *name = (char *) obj->name;
+-
+-	if (!ctx)
+-		return;
+-
+-	if (obj->id) {
+-		ubus_remove_object(ctx, obj);
+-		wpas_ubus_ref_dec();
+-	}
+-
+-	free(name);
+-}
+-
+-
+-#ifdef CONFIG_WPS
+-void wpas_ubus_notify(struct wpa_supplicant *wpa_s, const struct wps_credential *cred)
+-{
+-	u16 auth_type;
+-	char *ifname, *encryption, *ssid, *key;
+-	size_t ifname_len;
+-
+-	if (!cred)
+-		return;
+-
+-	auth_type = cred->auth_type;
+-
+-	if (auth_type == (WPS_AUTH_WPAPSK | WPS_AUTH_WPA2PSK))
+-		auth_type = WPS_AUTH_WPA2PSK;
+-
+-	if (auth_type != WPS_AUTH_OPEN &&
+-	    auth_type != WPS_AUTH_WPAPSK &&
+-	    auth_type != WPS_AUTH_WPA2PSK) {
+-		wpa_printf(MSG_DEBUG, "WPS: Ignored credentials for "
+-			   "unsupported authentication type 0x%x",
+-			   auth_type);
+-		return;
+-	}
+-
+-	if (auth_type == WPS_AUTH_WPAPSK || auth_type == WPS_AUTH_WPA2PSK) {
+-		if (cred->key_len < 8 || cred->key_len > 2 * PMK_LEN) {
+-			wpa_printf(MSG_ERROR, "WPS: Reject PSK credential with "
+-				   "invalid Network Key length %lu",
+-				   (unsigned long) cred->key_len);
+-			return;
+-		}
+-	}
+-
+-	blob_buf_init(&b, 0);
+-
+-	ifname_len = strlen(wpa_s->ifname);
+-	ifname = blobmsg_alloc_string_buffer(&b, "ifname", ifname_len + 1);
+-	memcpy(ifname, wpa_s->ifname, ifname_len + 1);
+-	ifname[ifname_len] = '\0';
+-	blobmsg_add_string_buffer(&b);
+-
+-	switch (auth_type) {
+-		case WPS_AUTH_WPA2PSK:
+-			encryption = "psk2";
+-			break;
+-		case WPS_AUTH_WPAPSK:
+-			encryption = "psk";
+-			break;
+-		default:
+-			encryption = "none";
+-			break;
+-	}
+-
+-	blobmsg_add_string(&b, "encryption", encryption);
+-
+-	ssid = blobmsg_alloc_string_buffer(&b, "ssid", cred->ssid_len + 1);
+-	memcpy(ssid, cred->ssid, cred->ssid_len);
+-	ssid[cred->ssid_len] = '\0';
+-	blobmsg_add_string_buffer(&b);
+-
+-	if (cred->key_len > 0) {
+-		key = blobmsg_alloc_string_buffer(&b, "key", cred->key_len + 1);
+-		memcpy(key, cred->key, cred->key_len);
+-		key[cred->key_len] = '\0';
+-		blobmsg_add_string_buffer(&b);
+-	}
+-
+-//	ubus_notify(ctx, &wpa_s->ubus.obj, "wps_credentials", b.head, -1);
+-	ubus_send_event(ctx, "wps_credentials", b.head);
+-}
+-#endif /* CONFIG_WPS */
+diff --git a/package/network/services/hostapd/src/wpa_supplicant/ubus.h b/package/network/services/hostapd/src/wpa_supplicant/ubus.h
+deleted file mode 100644
+index bf92b98c01..0000000000
+--- a/package/network/services/hostapd/src/wpa_supplicant/ubus.h
++++ /dev/null
+@@ -1,66 +0,0 @@
+-/*
+- * wpa_supplicant / ubus support
+- * Copyright (c) 2018, Daniel Golle <daniel@makrotopia.org>
+- * Copyright (c) 2013, Felix Fietkau <nbd@nbd.name>
+- *
+- * This software may be distributed under the terms of the BSD license.
+- * See README for more details.
+- */
+-#ifndef __WPAS_UBUS_H
+-#define __WPAS_UBUS_H
+-
+-struct wpa_supplicant;
+-struct wpa_global;
+-
+-#include "wps_supplicant.h"
+-
+-#ifdef UBUS_SUPPORT
+-#include <libubus.h>
+-
+-struct wpas_ubus_bss {
+-	struct ubus_object obj;
+-};
+-
+-void wpas_ubus_add_bss(struct wpa_supplicant *wpa_s);
+-void wpas_ubus_free_bss(struct wpa_supplicant *wpa_s);
+-
+-void wpas_ubus_add(struct wpa_global *global);
+-void wpas_ubus_free(struct wpa_global *global);
+-
+-#ifdef CONFIG_WPS
+-void wpas_ubus_notify(struct wpa_supplicant *wpa_s, const struct wps_credential *cred);
+-#endif
+-
+-#else
+-struct wpas_ubus_bss {};
+-
+-static inline void wpas_ubus_add_iface(struct wpa_supplicant *wpa_s)
+-{
+-}
+-
+-static inline void wpas_ubus_free_iface(struct wpa_supplicant *wpa_s)
+-{
+-}
+-
+-static inline void wpas_ubus_add_bss(struct wpa_supplicant *wpa_s)
+-{
+-}
+-
+-static inline void wpas_ubus_free_bss(struct wpa_supplicant *wpa_s)
+-{
+-}
+-
+-static inline void wpas_ubus_notify(struct wpa_supplicant *wpa_s, struct wps_credential *cred)
+-{
+-}
+-
+-static inline void wpas_ubus_add(struct wpa_global *global)
+-{
+-}
+-
+-static inline void wpas_ubus_free(struct wpa_global *global)
+-{
+-}
+-#endif
+-
+-#endif
+-- 
+2.34.1
+
diff --git a/patches/wifi/0004-hostapd-add-upstream-version.patch b/patches/0049-hostapd-add-upstream-version.patch
similarity index 94%
rename from patches/wifi/0004-hostapd-add-upstream-version.patch
rename to patches/0049-hostapd-add-upstream-version.patch
index f7d39084f..d3f162b9d 100644
--- a/patches/wifi/0004-hostapd-add-upstream-version.patch
+++ b/patches/0049-hostapd-add-upstream-version.patch
@@ -1,7 +1,7 @@
-From 1c40c80af8d3713cd601fcb7f3b68747d0dadda3 Mon Sep 17 00:00:00 2001
+From 8a37e576b5f0a3171e6f17b3df395cad33a0be07 Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Thu, 17 Aug 2023 15:54:00 +0200
-Subject: [PATCH 4/6] hostapd: add upstream version
+Subject: [PATCH 49/52] hostapd: add upstream version
 
 Signed-off-by: John Crispin <john@phrozen.org>
 ---
@@ -3010,1605 +3010,6 @@ index 0000000000..f2ed071ec0
 +# leads to the MIB only being compiled in if
 +# CONFIG_CTRL_IFACE_MIB is enabled.
 +#CONFIG_CTRL_IFACE_MIB=y
-diff --git a/package/network/services/hostapd/files/hostapd.sh b/package/network/services/hostapd/files/hostapd.sh
-new file mode 100644
-index 0000000000..65ae662c4d
---- /dev/null
-+++ b/package/network/services/hostapd/files/hostapd.sh
-@@ -0,0 +1,1593 @@
-+. /lib/functions/network.sh
-+. /lib/functions.sh
-+
-+wpa_supplicant_add_rate() {
-+	local var="$1"
-+	local val="$(($2 / 1000))"
-+	local sub="$((($2 / 100) % 10))"
-+	append $var "$val" ","
-+	[ $sub -gt 0 ] && append $var "."
-+}
-+
-+hostapd_add_rate() {
-+	local var="$1"
-+	local val="$(($2 / 100))"
-+	append $var "$val" " "
-+}
-+
-+hostapd_append_wep_key() {
-+	local var="$1"
-+
-+	wep_keyidx=0
-+	set_default key 1
-+	case "$key" in
-+		[1234])
-+			for idx in 1 2 3 4; do
-+				local zidx
-+				zidx="$(($idx - 1))"
-+				json_get_var ckey "key${idx}"
-+				[ -n "$ckey" ] && \
-+					append $var "wep_key${zidx}=$(prepare_key_wep "$ckey")" "$N$T"
-+			done
-+			wep_keyidx="$((key - 1))"
-+		;;
-+		*)
-+			append $var "wep_key0=$(prepare_key_wep "$key")" "$N$T"
-+		;;
-+	esac
-+}
-+
-+hostapd_append_wpa_key_mgmt() {
-+	local auth_type_l="$(echo $auth_type | tr 'a-z' 'A-Z')"
-+
-+	case "$auth_type" in
-+		psk|eap)
-+			append wpa_key_mgmt "WPA-$auth_type_l"
-+			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-${auth_type_l}"
-+			[ "${ieee80211w:-0}" -gt 0 ] && append wpa_key_mgmt "WPA-${auth_type_l}-SHA256"
-+		;;
-+		eap192)
-+			append wpa_key_mgmt "WPA-EAP-SUITE-B-192"
-+			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-EAP-SHA384"
-+		;;
-+		eap-eap192)
-+			append wpa_key_mgmt "WPA-EAP-SUITE-B-192"
-+			append wpa_key_mgmt "WPA-EAP"
-+			[ "${ieee80211r:-0}" -gt 0 ] && {
-+				append wpa_key_mgmt "FT-EAP-SHA384"
-+				append wpa_key_mgmt "FT-EAP"
-+			}
-+			[ "${ieee80211w:-0}" -gt 0 ] && append wpa_key_mgmt "WPA-EAP-SHA256"
-+		;;
-+		sae)
-+			append wpa_key_mgmt "SAE"
-+			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-SAE"
-+		;;
-+		psk-sae)
-+			append wpa_key_mgmt "WPA-PSK"
-+			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-PSK"
-+			[ "${ieee80211w:-0}" -gt 0 ] && append wpa_key_mgmt "WPA-PSK-SHA256"
-+			append wpa_key_mgmt "SAE"
-+			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-SAE"
-+		;;
-+		owe)
-+			append wpa_key_mgmt "OWE"
-+		;;
-+	esac
-+
-+	[ "$fils" -gt 0 ] && {
-+		case "$auth_type" in
-+			eap*)
-+				append wpa_key_mgmt FILS-SHA256
-+				[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt FT-FILS-SHA256
-+			;;
-+		esac
-+	}
-+
-+	[ "$auth_osen" = "1" ] && append wpa_key_mgmt "OSEN"
-+}
-+
-+hostapd_add_log_config() {
-+	config_add_boolean \
-+		log_80211 \
-+		log_8021x \
-+		log_radius \
-+		log_wpa \
-+		log_driver \
-+		log_iapp \
-+		log_mlme
-+
-+	config_add_int log_level
-+}
-+
-+hostapd_common_add_device_config() {
-+	config_add_array basic_rate
-+	config_add_array supported_rates
-+	config_add_string beacon_rate
-+
-+	config_add_string country country3
-+	config_add_boolean country_ie doth
-+	config_add_boolean spectrum_mgmt_required
-+	config_add_int local_pwr_constraint
-+	config_add_string require_mode
-+	config_add_boolean legacy_rates
-+	config_add_int cell_density
-+	config_add_int rts_threshold
-+	config_add_int rssi_reject_assoc_rssi
-+	config_add_int rssi_ignore_probe_request
-+	config_add_int maxassoc
-+
-+	config_add_string acs_chan_bias
-+	config_add_array hostapd_options
-+
-+	config_add_int airtime_mode
-+	config_add_int mbssid
-+
-+	hostapd_add_log_config
-+}
-+
-+hostapd_prepare_device_config() {
-+	local config="$1"
-+	local driver="$2"
-+
-+	local base_cfg=
-+
-+	json_get_vars country country3 country_ie beacon_int:100 doth require_mode legacy_rates \
-+		acs_chan_bias local_pwr_constraint spectrum_mgmt_required airtime_mode cell_density \
-+		rts_threshold beacon_rate rssi_reject_assoc_rssi rssi_ignore_probe_request maxassoc \
-+		mbssid:0
-+
-+	hostapd_set_log_options base_cfg
-+
-+	set_default country_ie 1
-+	set_default spectrum_mgmt_required 0
-+	set_default doth 1
-+	set_default legacy_rates 0
-+	set_default airtime_mode 0
-+	set_default cell_density 0
-+
-+	[ -n "$country" ] && {
-+		append base_cfg "country_code=$country" "$N"
-+		[ -n "$country3" ] && append base_cfg "country3=$country3" "$N"
-+
-+		[ "$country_ie" -gt 0 ] && {
-+			append base_cfg "ieee80211d=1" "$N"
-+			[ -n "$local_pwr_constraint" ] && append base_cfg "local_pwr_constraint=$local_pwr_constraint" "$N"
-+			[ "$spectrum_mgmt_required" -gt 0 ] && append base_cfg "spectrum_mgmt_required=$spectrum_mgmt_required" "$N"
-+		}
-+		[ "$hwmode" = "a" -a "$doth" -gt 0 ] && append base_cfg "ieee80211h=1" "$N"
-+	}
-+
-+	[ -n "$acs_chan_bias" ] && append base_cfg "acs_chan_bias=$acs_chan_bias" "$N"
-+
-+	local brlist= br
-+	json_get_values basic_rate_list basic_rate
-+	local rlist= r
-+	json_get_values rate_list supported_rates
-+
-+	[ -n "$hwmode" ] && append base_cfg "hw_mode=$hwmode" "$N"
-+	if [ "$hwmode" = "g" ] || [ "$hwmode" = "a" ]; then
-+		[ -n "$require_mode" ] && legacy_rates=0
-+		case "$require_mode" in
-+			n) append base_cfg "require_ht=1" "$N";;
-+			ac) append base_cfg "require_vht=1" "$N";;
-+		esac
-+	fi
-+	case "$hwmode" in
-+		b)
-+			if [ "$cell_density" -eq 1 ]; then
-+				set_default rate_list "5500 11000"
-+				set_default basic_rate_list "5500 11000"
-+			elif [ "$cell_density" -ge 2 ]; then
-+				set_default rate_list "11000"
-+				set_default basic_rate_list "11000"
-+			fi
-+		;;
-+		g)
-+			if [ "$cell_density" -eq 0 ] || [ "$cell_density" -eq 1 ]; then
-+				if [ "$legacy_rates" -eq 0 ]; then
-+					set_default rate_list "6000 9000 12000 18000 24000 36000 48000 54000"
-+					set_default basic_rate_list "6000 12000 24000"
-+				elif [ "$cell_density" -eq 1 ]; then
-+					set_default rate_list "5500 6000 9000 11000 12000 18000 24000 36000 48000 54000"
-+					set_default basic_rate_list "5500 11000"
-+				fi
-+			elif [ "$cell_density" -ge 3 ] && [ "$legacy_rates" -ne 0 ] || [ "$cell_density" -eq 2 ]; then
-+				if [ "$legacy_rates" -eq 0 ]; then
-+					set_default rate_list "12000 18000 24000 36000 48000 54000"
-+					set_default basic_rate_list "12000 24000"
-+				else
-+					set_default rate_list "11000 12000 18000 24000 36000 48000 54000"
-+					set_default basic_rate_list "11000"
-+				fi
-+			elif [ "$cell_density" -ge 3 ]; then
-+				set_default rate_list "24000 36000 48000 54000"
-+				set_default basic_rate_list "24000"
-+			fi
-+		;;
-+		a)
-+			if [ "$cell_density" -eq 1 ]; then
-+				set_default rate_list "6000 9000 12000 18000 24000 36000 48000 54000"
-+				set_default basic_rate_list "6000 12000 24000"
-+			elif [ "$cell_density" -eq 2 ]; then
-+				set_default rate_list "12000 18000 24000 36000 48000 54000"
-+				set_default basic_rate_list "12000 24000"
-+			elif [ "$cell_density" -ge 3 ]; then
-+				set_default rate_list "24000 36000 48000 54000"
-+				set_default basic_rate_list "24000"
-+			fi
-+		;;
-+	esac
-+
-+	for r in $rate_list; do
-+		hostapd_add_rate rlist "$r"
-+	done
-+
-+	for br in $basic_rate_list; do
-+		hostapd_add_rate brlist "$br"
-+	done
-+
-+	[ -n "$rssi_reject_assoc_rssi" ] && append base_cfg "rssi_reject_assoc_rssi=$rssi_reject_assoc_rssi" "$N"
-+	[ -n "$rssi_ignore_probe_request" ] && append base_cfg "rssi_ignore_probe_request=$rssi_ignore_probe_request" "$N"
-+	[ -n "$beacon_rate" ] && append base_cfg "beacon_rate=$beacon_rate" "$N"
-+	[ -n "$rlist" ] && append base_cfg "supported_rates=$rlist" "$N"
-+	[ -n "$brlist" ] && append base_cfg "basic_rates=$brlist" "$N"
-+	append base_cfg "beacon_int=$beacon_int" "$N"
-+	[ -n "$rts_threshold" ] && append base_cfg "rts_threshold=$rts_threshold" "$N"
-+	[ "$airtime_mode" -gt 0 ] && append base_cfg "airtime_mode=$airtime_mode" "$N"
-+	[ -n "$maxassoc" ] && append base_cfg "iface_max_num_sta=$maxassoc" "$N"
-+	[ "$mbssid" -gt 0 ] && [ "$mbssid" -le 2 ] && append base_cfg "mbssid=$mbssid" "$N"
-+
-+	json_get_values opts hostapd_options
-+	for val in $opts; do
-+		append base_cfg "$val" "$N"
-+	done
-+
-+	cat > "$config" <<EOF
-+driver=$driver
-+$base_cfg
-+EOF
-+}
-+
-+hostapd_common_add_bss_config() {
-+	config_add_string 'bssid:macaddr' 'ssid:string'
-+	config_add_boolean wds wmm uapsd hidden utf8_ssid ppsk
-+
-+	config_add_int maxassoc max_inactivity
-+	config_add_boolean disassoc_low_ack isolate short_preamble skip_inactivity_poll
-+
-+	config_add_int \
-+		wep_rekey eap_reauth_period \
-+		wpa_group_rekey wpa_pair_rekey wpa_master_rekey
-+	config_add_boolean wpa_strict_rekey
-+	config_add_boolean wpa_disable_eapol_key_retries
-+
-+	config_add_boolean tdls_prohibit
-+
-+	config_add_boolean rsn_preauth auth_cache
-+	config_add_int ieee80211w
-+	config_add_int eapol_version
-+
-+	config_add_array auth_server acct_server
-+	config_add_string 'server:host'
-+	config_add_string auth_secret key
-+	config_add_int 'auth_port:port' 'port:port'
-+
-+	config_add_string acct_secret
-+	config_add_int acct_port
-+	config_add_int acct_interval
-+
-+	config_add_int bss_load_update_period chan_util_avg_period
-+
-+	config_add_string dae_client
-+	config_add_string dae_secret
-+	config_add_int dae_port
-+
-+	config_add_string nasid
-+	config_add_string ownip
-+	config_add_string radius_client_addr
-+	config_add_string iapp_interface
-+	config_add_string eap_type ca_cert client_cert identity anonymous_identity auth priv_key priv_key_pwd
-+	config_add_boolean ca_cert_usesystem ca_cert2_usesystem
-+	config_add_string subject_match subject_match2
-+	config_add_array altsubject_match altsubject_match2
-+	config_add_array domain_match domain_match2 domain_suffix_match domain_suffix_match2
-+	config_add_string ieee80211w_mgmt_cipher
-+
-+	config_add_int dynamic_vlan vlan_naming vlan_no_bridge
-+	config_add_string vlan_tagged_interface vlan_bridge
-+	config_add_string vlan_file
-+
-+	config_add_string 'key1:wepkey' 'key2:wepkey' 'key3:wepkey' 'key4:wepkey' 'password:wpakey'
-+
-+	config_add_string wpa_psk_file
-+
-+	config_add_int multi_ap
-+
-+	config_add_boolean wps_pushbutton wps_label ext_registrar wps_pbc_in_m1
-+	config_add_int wps_ap_setup_locked wps_independent
-+	config_add_string wps_device_type wps_device_name wps_manufacturer wps_pin
-+	config_add_string multi_ap_backhaul_ssid multi_ap_backhaul_key
-+
-+	config_add_boolean wnm_sleep_mode wnm_sleep_mode_no_keys bss_transition mbo
-+	config_add_int time_advertisement
-+	config_add_string time_zone
-+	config_add_string vendor_elements
-+
-+	config_add_boolean ieee80211k rrm_neighbor_report rrm_beacon_report
-+
-+	config_add_boolean ftm_responder stationary_ap
-+	config_add_string lci civic
-+
-+	config_add_boolean ieee80211r pmk_r1_push ft_psk_generate_local ft_over_ds
-+	config_add_int r0_key_lifetime reassociation_deadline
-+	config_add_string mobility_domain r1_key_holder
-+	config_add_array r0kh r1kh
-+
-+	config_add_int ieee80211w_max_timeout ieee80211w_retry_timeout
-+
-+	config_add_string macfilter 'macfile:file'
-+	config_add_array 'maclist:list(macaddr)'
-+
-+	config_add_array bssid_blacklist
-+	config_add_array bssid_whitelist
-+
-+	config_add_int mcast_rate
-+	config_add_array basic_rate
-+	config_add_array supported_rates
-+
-+	config_add_boolean sae_require_mfp
-+	config_add_int sae_pwe
-+
-+	config_add_string 'owe_transition_bssid:macaddr' 'owe_transition_ssid:string'
-+	config_add_string owe_transition_ifname
-+
-+	config_add_boolean iw_enabled iw_internet iw_asra iw_esr iw_uesa
-+	config_add_int iw_access_network_type iw_venue_group iw_venue_type
-+	config_add_int iw_ipaddr_type_availability iw_gas_address3
-+	config_add_string iw_hessid iw_network_auth_type iw_qos_map_set
-+	config_add_array iw_roaming_consortium iw_domain_name iw_anqp_3gpp_cell_net iw_nai_realm
-+	config_add_array iw_anqp_elem iw_venue_name iw_venue_url
-+
-+	config_add_boolean hs20 disable_dgaf osen
-+	config_add_int anqp_domain_id
-+	config_add_int hs20_deauth_req_timeout
-+	config_add_array hs20_oper_friendly_name
-+	config_add_array osu_provider
-+	config_add_array operator_icon
-+	config_add_array hs20_conn_capab
-+	config_add_string osu_ssid hs20_wan_metrics hs20_operating_class hs20_t_c_filename hs20_t_c_timestamp
-+
-+	config_add_string hs20_t_c_server_url
-+
-+	config_add_array airtime_sta_weight
-+	config_add_int airtime_bss_weight airtime_bss_limit
-+
-+	config_add_boolean multicast_to_unicast multicast_to_unicast_all proxy_arp per_sta_vif
-+
-+	config_add_array hostapd_bss_options
-+	config_add_boolean default_disabled
-+
-+	config_add_boolean request_cui
-+	config_add_array radius_auth_req_attr
-+	config_add_array radius_acct_req_attr
-+
-+	config_add_int eap_server
-+	config_add_string eap_user_file ca_cert server_cert private_key private_key_passwd server_id
-+
-+	config_add_boolean fils
-+	config_add_string fils_dhcp
-+
-+	config_add_int ocv
-+}
-+
-+hostapd_set_vlan_file() {
-+	local ifname="$1"
-+	local vlan="$2"
-+	json_get_vars name vid
-+	echo "${vid} ${ifname}-${name}" >> /var/run/hostapd-${ifname}.vlan
-+	wireless_add_vlan "${vlan}" "${ifname}-${name}"
-+}
-+
-+hostapd_set_vlan() {
-+	local ifname="$1"
-+
-+	rm -f /var/run/hostapd-${ifname}.vlan
-+	for_each_vlan hostapd_set_vlan_file ${ifname}
-+}
-+
-+hostapd_set_psk_file() {
-+	local ifname="$1"
-+	local vlan="$2"
-+	local vlan_id=""
-+
-+	json_get_vars mac vid key
-+	set_default mac "00:00:00:00:00:00"
-+	[ -n "$vid" ] && vlan_id="vlanid=$vid "
-+	echo "${vlan_id} ${mac} ${key}" >> /var/run/hostapd-${ifname}.psk
-+}
-+
-+hostapd_set_psk() {
-+	local ifname="$1"
-+
-+	rm -f /var/run/hostapd-${ifname}.psk
-+	for_each_station hostapd_set_psk_file ${ifname}
-+}
-+
-+append_iw_roaming_consortium() {
-+	[ -n "$1" ] && append bss_conf "roaming_consortium=$1" "$N"
-+}
-+
-+append_iw_domain_name() {
-+	if [ -z "$iw_domain_name_conf" ]; then
-+		iw_domain_name_conf="$1"
-+	else
-+		iw_domain_name_conf="$iw_domain_name_conf,$1"
-+	fi
-+}
-+
-+append_iw_anqp_3gpp_cell_net() {
-+	if [ -z "$iw_anqp_3gpp_cell_net_conf" ]; then
-+		iw_anqp_3gpp_cell_net_conf="$1"
-+	else
-+		iw_anqp_3gpp_cell_net_conf="$iw_anqp_3gpp_cell_net_conf:$1"
-+	fi
-+}
-+
-+append_iw_anqp_elem() {
-+	[ -n "$1" ] && append bss_conf "anqp_elem=$1" "$N"
-+}
-+
-+append_iw_nai_realm() {
-+	[ -n "$1" ] && append bss_conf "nai_realm=$1" "$N"
-+}
-+
-+append_iw_venue_name() {
-+	append bss_conf "venue_name=$1" "$N"
-+}
-+
-+append_iw_venue_url() {
-+	append bss_conf "venue_url=$1" "$N"
-+}
-+
-+append_hs20_oper_friendly_name() {
-+	append bss_conf "hs20_oper_friendly_name=$1" "$N"
-+}
-+
-+append_osu_provider_friendly_name() {
-+	append bss_conf "osu_friendly_name=$1" "$N"
-+}
-+
-+append_osu_provider_service_desc() {
-+	append bss_conf "osu_service_desc=$1" "$N"
-+}
-+
-+append_hs20_icon() {
-+	local width height lang type path
-+	config_get width "$1" width
-+	config_get height "$1" height
-+	config_get lang "$1" lang
-+	config_get type "$1" type
-+	config_get path "$1" path
-+
-+	append bss_conf "hs20_icon=$width:$height:$lang:$type:$1:$path" "$N"
-+}
-+
-+append_hs20_icons() {
-+	config_load wireless
-+	config_foreach append_hs20_icon hs20-icon
-+}
-+
-+append_operator_icon() {
-+	append bss_conf "operator_icon=$1" "$N"
-+}
-+
-+append_osu_icon() {
-+	append bss_conf "osu_icon=$1" "$N"
-+}
-+
-+append_osu_provider() {
-+	local cfgtype osu_server_uri osu_friendly_name osu_nai osu_nai2 osu_method_list
-+
-+	config_load wireless
-+	config_get cfgtype "$1" TYPE
-+	[ "$cfgtype" != "osu-provider" ] && return
-+
-+	append bss_conf "# provider $1" "$N"
-+	config_get osu_server_uri "$1" osu_server_uri
-+	config_get osu_nai "$1" osu_nai
-+	config_get osu_nai2 "$1" osu_nai2
-+	config_get osu_method_list "$1" osu_method
-+
-+	append bss_conf "osu_server_uri=$osu_server_uri" "$N"
-+	append bss_conf "osu_nai=$osu_nai" "$N"
-+	append bss_conf "osu_nai2=$osu_nai2" "$N"
-+	append bss_conf "osu_method_list=$osu_method_list" "$N"
-+
-+	config_list_foreach "$1" osu_service_desc append_osu_provider_service_desc
-+	config_list_foreach "$1" osu_friendly_name append_osu_friendly_name
-+	config_list_foreach "$1" osu_icon append_osu_icon
-+
-+	append bss_conf "$N"
-+}
-+
-+append_hs20_conn_capab() {
-+	[ -n "$1" ] && append bss_conf "hs20_conn_capab=$1" "$N"
-+}
-+
-+append_radius_acct_req_attr() {
-+	[ -n "$1" ] && append bss_conf "radius_acct_req_attr=$1" "$N"
-+}
-+
-+append_radius_auth_req_attr() {
-+	[ -n "$1" ] && append bss_conf "radius_auth_req_attr=$1" "$N"
-+}
-+
-+append_airtime_sta_weight() {
-+	[ -n "$1" ] && append bss_conf "airtime_sta_weight=$1" "$N"
-+}
-+
-+append_auth_server() {
-+	[ -n "$1" ] || return
-+	append bss_conf "auth_server_addr=$1" "$N"
-+	append bss_conf "auth_server_port=$auth_port" "$N"
-+	[ -n "$auth_secret" ] && append bss_conf "auth_server_shared_secret=$auth_secret" "$N"
-+}
-+
-+append_acct_server() {
-+	[ -n "$1" ] || return
-+	append bss_conf "acct_server_addr=$1" "$N"
-+	append bss_conf "acct_server_port=$acct_port" "$N"
-+	[ -n "$acct_secret" ] && append bss_conf "acct_server_shared_secret=$acct_secret" "$N"
-+}
-+
-+hostapd_set_bss_options() {
-+	local var="$1"
-+	local phy="$2"
-+	local vif="$3"
-+
-+	wireless_vif_parse_encryption
-+
-+	local bss_conf bss_md5sum ft_key
-+	local wep_rekey wpa_group_rekey wpa_pair_rekey wpa_master_rekey wpa_key_mgmt
-+
-+	json_get_vars \
-+		wep_rekey wpa_group_rekey wpa_pair_rekey wpa_master_rekey wpa_strict_rekey \
-+		wpa_disable_eapol_key_retries tdls_prohibit \
-+		maxassoc max_inactivity disassoc_low_ack isolate auth_cache \
-+		wps_pushbutton wps_label ext_registrar wps_pbc_in_m1 wps_ap_setup_locked \
-+		wps_independent wps_device_type wps_device_name wps_manufacturer wps_pin \
-+		macfilter ssid utf8_ssid wmm uapsd hidden short_preamble rsn_preauth \
-+		iapp_interface eapol_version dynamic_vlan ieee80211w nasid \
-+		acct_secret acct_port acct_interval \
-+		bss_load_update_period chan_util_avg_period sae_require_mfp sae_pwe \
-+		multi_ap multi_ap_backhaul_ssid multi_ap_backhaul_key skip_inactivity_poll \
-+		ppsk airtime_bss_weight airtime_bss_limit airtime_sta_weight \
-+		multicast_to_unicast_all proxy_arp per_sta_vif \
-+		eap_server eap_user_file ca_cert server_cert private_key private_key_passwd server_id \
-+		vendor_elements fils ocv
-+
-+	set_default fils 0
-+	set_default isolate 0
-+	set_default maxassoc 0
-+	set_default max_inactivity 0
-+	set_default short_preamble 1
-+	set_default disassoc_low_ack 1
-+	set_default skip_inactivity_poll 0
-+	set_default hidden 0
-+	set_default wmm 1
-+	set_default uapsd 1
-+	set_default wpa_disable_eapol_key_retries 0
-+	set_default tdls_prohibit 0
-+	set_default eapol_version $((wpa & 1))
-+	set_default acct_port 1813
-+	set_default bss_load_update_period 60
-+	set_default chan_util_avg_period 600
-+	set_default utf8_ssid 1
-+	set_default multi_ap 0
-+	set_default ppsk 0
-+	set_default airtime_bss_weight 0
-+	set_default airtime_bss_limit 0
-+	set_default eap_server 0
-+
-+	/usr/sbin/hostapd -vfils || fils=0
-+
-+	append bss_conf "ctrl_interface=/var/run/hostapd"
-+	if [ "$isolate" -gt 0 ]; then
-+		append bss_conf "ap_isolate=$isolate" "$N"
-+	fi
-+	if [ "$maxassoc" -gt 0 ]; then
-+		append bss_conf "max_num_sta=$maxassoc" "$N"
-+	fi
-+	if [ "$max_inactivity" -gt 0 ]; then
-+		append bss_conf "ap_max_inactivity=$max_inactivity" "$N"
-+	fi
-+
-+	[ "$airtime_bss_weight" -gt 0 ] && append bss_conf "airtime_bss_weight=$airtime_bss_weight" "$N"
-+	[ "$airtime_bss_limit" -gt 0 ] && append bss_conf "airtime_bss_limit=$airtime_bss_limit" "$N"
-+	json_for_each_item append_airtime_sta_weight airtime_sta_weight
-+
-+	append bss_conf "bss_load_update_period=$bss_load_update_period" "$N"
-+	append bss_conf "chan_util_avg_period=$chan_util_avg_period" "$N"
-+	append bss_conf "disassoc_low_ack=$disassoc_low_ack" "$N"
-+	append bss_conf "skip_inactivity_poll=$skip_inactivity_poll" "$N"
-+	append bss_conf "preamble=$short_preamble" "$N"
-+	append bss_conf "wmm_enabled=$wmm" "$N"
-+	append bss_conf "ignore_broadcast_ssid=$hidden" "$N"
-+	append bss_conf "uapsd_advertisement_enabled=$uapsd" "$N"
-+	append bss_conf "utf8_ssid=$utf8_ssid" "$N"
-+	append bss_conf "multi_ap=$multi_ap" "$N"
-+	[ -n "$vendor_elements" ] && append bss_conf "vendor_elements=$vendor_elements" "$N"
-+
-+	[ "$tdls_prohibit" -gt 0 ] && append bss_conf "tdls_prohibit=$tdls_prohibit" "$N"
-+
-+	[ "$wpa" -gt 0 ] && {
-+		[ -n "$wpa_group_rekey"  ] && append bss_conf "wpa_group_rekey=$wpa_group_rekey" "$N"
-+		[ -n "$wpa_pair_rekey"   ] && append bss_conf "wpa_ptk_rekey=$wpa_pair_rekey"    "$N"
-+		[ -n "$wpa_master_rekey" ] && append bss_conf "wpa_gmk_rekey=$wpa_master_rekey"  "$N"
-+		[ -n "$wpa_strict_rekey" ] && append bss_conf "wpa_strict_rekey=$wpa_strict_rekey" "$N"
-+	}
-+
-+	set_default nasid "${macaddr//\:}"
-+	append bss_conf "nas_identifier=$nasid" "$N"
-+
-+	[ -n "$acct_interval" ] && \
-+		append bss_conf "radius_acct_interim_interval=$acct_interval" "$N"
-+	json_for_each_item append_acct_server acct_server
-+	json_for_each_item append_radius_acct_req_attr radius_acct_req_attr
-+
-+	[ -n "$ocv" ] && append bss_conf "ocv=$ocv" "$N"
-+
-+	case "$auth_type" in
-+		sae|owe|eap192|eap-eap192)
-+			set_default ieee80211w 2
-+			set_default sae_require_mfp 1
-+			set_default sae_pwe 2
-+		;;
-+		psk-sae)
-+			set_default ieee80211w 1
-+			set_default sae_require_mfp 1
-+			set_default sae_pwe 2
-+		;;
-+	esac
-+	[ -n "$sae_require_mfp" ] && append bss_conf "sae_require_mfp=$sae_require_mfp" "$N"
-+	[ -n "$sae_pwe" ] && append bss_conf "sae_pwe=$sae_pwe" "$N"
-+
-+	local vlan_possible=""
-+
-+	case "$auth_type" in
-+		none|owe)
-+			json_get_vars owe_transition_bssid owe_transition_ssid owe_transition_ifname
-+
-+			[ -n "$owe_transition_ssid" ] && append bss_conf "owe_transition_ssid=\"$owe_transition_ssid\"" "$N"
-+			[ -n "$owe_transition_bssid" ] && append bss_conf "owe_transition_bssid=$owe_transition_bssid" "$N"
-+			[ -n "$owe_transition_ifname" ] && append bss_conf "owe_transition_ifname=$owe_transition_ifname" "$N"
-+
-+			wps_possible=1
-+			# Here we make the assumption that if we're in open mode
-+			# with WPS enabled, we got to be in unconfigured state.
-+			wps_not_configured=1
-+		;;
-+		psk|sae|psk-sae)
-+			json_get_vars key wpa_psk_file
-+			if [ "$auth_type" = "psk" ] && [ "$ppsk" -ne 0 ] ; then
-+				json_get_vars auth_secret auth_port
-+				set_default auth_port 1812
-+				json_for_each_item append_auth_server auth_server
-+				append bss_conf "macaddr_acl=2" "$N"
-+				append bss_conf "wpa_psk_radius=2" "$N"
-+			elif [ ${#key} -eq 64 ]; then
-+				append bss_conf "wpa_psk=$key" "$N"
-+			elif [ ${#key} -ge 8 ] && [ ${#key} -le 63 ]; then
-+				append bss_conf "wpa_passphrase=$key" "$N"
-+			elif [ -n "$key" ] || [ -z "$wpa_psk_file" ]; then
-+				wireless_setup_vif_failed INVALID_WPA_PSK
-+				return 1
-+			fi
-+			[ -z "$wpa_psk_file" ] && set_default wpa_psk_file /var/run/hostapd-$ifname.psk
-+			[ -n "$wpa_psk_file" ] && {
-+				[ -e "$wpa_psk_file" ] || touch "$wpa_psk_file"
-+				append bss_conf "wpa_psk_file=$wpa_psk_file" "$N"
-+			}
-+			[ "$eapol_version" -ge "1" -a "$eapol_version" -le "2" ] && append bss_conf "eapol_version=$eapol_version" "$N"
-+
-+			set_default dynamic_vlan 0
-+			vlan_possible=1
-+			wps_possible=1
-+		;;
-+		eap|eap192|eap-eap192)
-+			json_get_vars \
-+				auth_server auth_secret auth_port \
-+				dae_client dae_secret dae_port \
-+				dynamic_ownip ownip radius_client_addr \
-+				eap_reauth_period request_cui \
-+				erp_domain mobility_domain \
-+				fils_realm fils_dhcp
-+
-+			# radius can provide VLAN ID for clients
-+			vlan_possible=1
-+
-+			set_default dynamic_ownip 1
-+
-+			# legacy compatibility
-+			[ -n "$auth_server" ] || json_get_var auth_server server
-+			[ -n "$auth_port" ] || json_get_var auth_port port
-+			[ -n "$auth_secret" ] || json_get_var auth_secret key
-+
-+			[ "$fils" -gt 0 ] && {
-+				set_default erp_domain "$mobility_domain"
-+				set_default erp_domain "$(echo "$ssid" | md5sum | head -c 8)"
-+				set_default fils_realm "$erp_domain"
-+
-+				append bss_conf "erp_send_reauth_start=1" "$N"
-+				append bss_conf "erp_domain=$erp_domain" "$N"
-+				append bss_conf "fils_realm=$fils_realm" "$N"
-+				append bss_conf "fils_cache_id=$(echo "$fils_realm" | md5sum | head -c 4)" "$N"
-+
-+				[ "$fils_dhcp" = "*" ] && {
-+					json_get_values network network
-+					fils_dhcp=
-+					for net in $network; do
-+						fils_dhcp="$(ifstatus "$net" | jsonfilter -e '@.data.dhcpserver')"
-+						[ -n "$fils_dhcp" ] && break
-+					done
-+
-+					[ -z "$fils_dhcp" -a -n "$network_bridge" -a -n "$network_ifname" ] && \
-+						fils_dhcp="$(udhcpc -B -n -q -s /lib/netifd/dhcp-get-server.sh -t 1 -i "$network_ifname" 2>/dev/null)"
-+				}
-+				[ -n "$fils_dhcp" ] && append bss_conf "dhcp_server=$fils_dhcp" "$N"
-+			}
-+
-+			set_default auth_port 1812
-+			set_default dae_port 3799
-+			set_default request_cui 0
-+
-+			[ "$eap_server" -eq 0 ] && json_for_each_item append_auth_server auth_server
-+			[ "$request_cui" -gt 0 ] && append bss_conf "radius_request_cui=$request_cui" "$N"
-+			[ -n "$eap_reauth_period" ] && append bss_conf "eap_reauth_period=$eap_reauth_period" "$N"
-+
-+			[ -n "$dae_client" -a -n "$dae_secret" ] && {
-+				append bss_conf "radius_das_port=$dae_port" "$N"
-+				append bss_conf "radius_das_client=$dae_client $dae_secret" "$N"
-+			}
-+			json_for_each_item append_radius_auth_req_attr radius_auth_req_attr
-+
-+			if [ -n "$ownip" ]; then
-+				append bss_conf "own_ip_addr=$ownip" "$N"
-+			elif [ "$dynamic_ownip" -gt 0 ]; then
-+				append bss_conf "dynamic_own_ip_addr=$dynamic_ownip" "$N"
-+			fi
-+
-+			[ -n "$radius_client_addr" ] && append bss_conf "radius_client_addr=$radius_client_addr" "$N"
-+			append bss_conf "eapol_key_index_workaround=1" "$N"
-+			append bss_conf "ieee8021x=1" "$N"
-+
-+			[ "$eapol_version" -ge "1" -a "$eapol_version" -le "2" ] && append bss_conf "eapol_version=$eapol_version" "$N"
-+		;;
-+		wep)
-+			local wep_keyidx=0
-+			json_get_vars key
-+			hostapd_append_wep_key bss_conf
-+			append bss_conf "wep_default_key=$wep_keyidx" "$N"
-+			[ -n "$wep_rekey" ] && append bss_conf "wep_rekey_period=$wep_rekey" "$N"
-+		;;
-+	esac
-+
-+	case "$auth_type" in
-+		none|owe|psk|sae|psk-sae|wep)
-+			json_get_vars \
-+			auth_server auth_port auth_secret \
-+			ownip radius_client_addr
-+
-+			[ -n "$auth_server" ] &&  {
-+				set_default auth_port 1812
-+
-+				json_for_each_item append_auth_server auth_server
-+				[ -n "$ownip" ] && append bss_conf "own_ip_addr=$ownip" "$N"
-+				[ -n "$radius_client_addr" ] && append bss_conf "radius_client_addr=$radius_client_addr" "$N"
-+				append bss_conf "macaddr_acl=2" "$N"
-+			}
-+		;;
-+	esac
-+
-+	local auth_algs="$((($auth_mode_shared << 1) | $auth_mode_open))"
-+	append bss_conf "auth_algs=${auth_algs:-1}" "$N"
-+	append bss_conf "wpa=$wpa" "$N"
-+	[ -n "$wpa_pairwise" ] && append bss_conf "wpa_pairwise=$wpa_pairwise" "$N"
-+
-+	set_default wps_pushbutton 0
-+	set_default wps_label 0
-+	set_default wps_pbc_in_m1 0
-+
-+	config_methods=
-+	[ "$wps_pushbutton" -gt 0 ] && append config_methods push_button
-+	[ "$wps_label" -gt 0 ] && append config_methods label
-+
-+	# WPS not possible on Multi-AP backhaul-only SSID
-+	[ "$multi_ap" = 1 ] && wps_possible=
-+
-+	[ -n "$wps_possible" -a -n "$config_methods" ] && {
-+		set_default ext_registrar 0
-+		set_default wps_device_type "6-0050F204-1"
-+		set_default wps_device_name "OpenWrt AP"
-+		set_default wps_manufacturer "www.openwrt.org"
-+		set_default wps_independent 1
-+
-+		wps_state=2
-+		[ -n "$wps_not_configured" ] && wps_state=1
-+
-+		[ "$ext_registrar" -gt 0 -a -n "$network_bridge" ] && append bss_conf "upnp_iface=$network_bridge" "$N"
-+
-+		append bss_conf "eap_server=1" "$N"
-+		[ -n "$wps_pin" ] && append bss_conf "ap_pin=$wps_pin" "$N"
-+		append bss_conf "wps_state=$wps_state" "$N"
-+		append bss_conf "device_type=$wps_device_type" "$N"
-+		append bss_conf "device_name=$wps_device_name" "$N"
-+		append bss_conf "manufacturer=$wps_manufacturer" "$N"
-+		append bss_conf "config_methods=$config_methods" "$N"
-+		append bss_conf "wps_independent=$wps_independent" "$N"
-+		[ -n "$wps_ap_setup_locked" ] && append bss_conf "ap_setup_locked=$wps_ap_setup_locked" "$N"
-+		[ "$wps_pbc_in_m1" -gt 0 ] && append bss_conf "pbc_in_m1=$wps_pbc_in_m1" "$N"
-+		[ "$multi_ap" -gt 0 ] && [ -n "$multi_ap_backhaul_ssid" ] && {
-+			append bss_conf "multi_ap_backhaul_ssid=\"$multi_ap_backhaul_ssid\"" "$N"
-+			if [ -z "$multi_ap_backhaul_key" ]; then
-+				:
-+			elif [ ${#multi_ap_backhaul_key} -lt 8 ]; then
-+				wireless_setup_vif_failed INVALID_WPA_PSK
-+				return 1
-+			elif [ ${#multi_ap_backhaul_key} -eq 64 ]; then
-+				append bss_conf "multi_ap_backhaul_wpa_psk=$multi_ap_backhaul_key" "$N"
-+			else
-+				append bss_conf "multi_ap_backhaul_wpa_passphrase=$multi_ap_backhaul_key" "$N"
-+			fi
-+		}
-+	}
-+
-+	append bss_conf "ssid=$ssid" "$N"
-+	[ -n "$network_bridge" ] && append bss_conf "bridge=$network_bridge${N}wds_bridge=" "$N"
-+	[ -n "$network_ifname" ] && append bss_conf "snoop_iface=$network_ifname" "$N"
-+	[ -n "$iapp_interface" ] && {
-+		local ifname
-+		network_get_device ifname "$iapp_interface" || ifname="$iapp_interface"
-+		append bss_conf "iapp_interface=$ifname" "$N"
-+	}
-+
-+	json_get_vars time_advertisement time_zone wnm_sleep_mode wnm_sleep_mode_no_keys bss_transition mbo
-+	set_default bss_transition 0
-+	set_default wnm_sleep_mode 0
-+	set_default wnm_sleep_mode_no_keys 0
-+	set_default mbo 0
-+
-+	[ -n "$time_advertisement" ] && append bss_conf "time_advertisement=$time_advertisement" "$N"
-+	[ -n "$time_zone" ] && append bss_conf "time_zone=$time_zone" "$N"
-+	if [ "$wnm_sleep_mode" -eq "1" ]; then
-+		append bss_conf "wnm_sleep_mode=1" "$N"
-+		[ "$wnm_sleep_mode_no_keys" -eq "1" ] && append bss_conf "wnm_sleep_mode_no_keys=1" "$N"
-+	fi
-+	[ "$bss_transition" -eq "1" ] && append bss_conf "bss_transition=1" "$N"
-+	[ "$mbo" -eq 1 ] && append bss_conf "mbo=1" "$N"
-+
-+	json_get_vars ieee80211k rrm_neighbor_report rrm_beacon_report
-+	set_default ieee80211k 0
-+	if [ "$ieee80211k" -eq "1" ]; then
-+		set_default rrm_neighbor_report 1
-+		set_default rrm_beacon_report 1
-+	else
-+		set_default rrm_neighbor_report 0
-+		set_default rrm_beacon_report 0
-+	fi
-+
-+	[ "$rrm_neighbor_report" -eq "1" ] && append bss_conf "rrm_neighbor_report=1" "$N"
-+	[ "$rrm_beacon_report" -eq "1" ] && append bss_conf "rrm_beacon_report=1" "$N"
-+
-+	json_get_vars ftm_responder stationary_ap lci civic
-+	set_default ftm_responder 0
-+	if [ "$ftm_responder" -eq "1" ]; then
-+		set_default stationary_ap 0
-+		iw phy "$phy" info | grep -q "ENABLE_FTM_RESPONDER" && {
-+			append bss_conf "ftm_responder=1" "$N"
-+			[ "$stationary_ap" -eq "1" ] && append bss_conf "stationary_ap=1" "$N"
-+			[ -n "$lci" ] && append bss_conf "lci=$lci" "$N"
-+			[ -n "$civic" ] && append bss_conf "civic=$civic" "$N"
-+		}
-+	fi
-+
-+	if [ "$wpa" -ge "1" ]; then
-+		json_get_vars ieee80211r
-+		set_default ieee80211r 0
-+
-+		if [ "$ieee80211r" -gt "0" ]; then
-+			json_get_vars mobility_domain ft_psk_generate_local ft_over_ds reassociation_deadline
-+
-+			set_default mobility_domain "$(echo "$ssid" | md5sum | head -c 4)"
-+			set_default ft_over_ds 0
-+			set_default reassociation_deadline 1000
-+
-+			case "$auth_type" in
-+				psk|sae|psk-sae)
-+					set_default ft_psk_generate_local 1
-+				;;
-+				*)
-+					set_default ft_psk_generate_local 0
-+				;;
-+			esac
-+
-+			[ -n "$network_ifname" ] && append bss_conf "ft_iface=$network_ifname" "$N"
-+			append bss_conf "mobility_domain=$mobility_domain" "$N"
-+			append bss_conf "ft_psk_generate_local=$ft_psk_generate_local" "$N"
-+			append bss_conf "ft_over_ds=$ft_over_ds" "$N"
-+			append bss_conf "reassociation_deadline=$reassociation_deadline" "$N"
-+
-+			if [ "$ft_psk_generate_local" -eq "0" ]; then
-+				json_get_vars r0_key_lifetime r1_key_holder pmk_r1_push
-+				json_get_values r0kh r0kh
-+				json_get_values r1kh r1kh
-+
-+				set_default r0_key_lifetime 10000
-+				set_default pmk_r1_push 0
-+
-+				[ -n "$r0kh" -a -n "$r1kh" ] || {
-+					ft_key=`echo -n "$mobility_domain/${auth_secret:-${key}}" | md5sum | awk '{print $1}'`
-+
-+					set_default r0kh "ff:ff:ff:ff:ff:ff,*,$ft_key"
-+					set_default r1kh "00:00:00:00:00:00,00:00:00:00:00:00,$ft_key"
-+				}
-+
-+				[ -n "$r1_key_holder" ] && append bss_conf "r1_key_holder=$r1_key_holder" "$N"
-+				append bss_conf "r0_key_lifetime=$r0_key_lifetime" "$N"
-+				append bss_conf "pmk_r1_push=$pmk_r1_push" "$N"
-+
-+				for kh in $r0kh; do
-+					append bss_conf "r0kh=${kh//,/ }" "$N"
-+				done
-+				for kh in $r1kh; do
-+					append bss_conf "r1kh=${kh//,/ }" "$N"
-+				done
-+			fi
-+		fi
-+		if [ "$fils" -gt 0 ]; then
-+			json_get_vars fils_realm
-+			set_default fils_realm "$(echo "$ssid" | md5sum | head -c 8)"
-+		fi
-+
-+		append bss_conf "wpa_disable_eapol_key_retries=$wpa_disable_eapol_key_retries" "$N"
-+
-+		hostapd_append_wpa_key_mgmt
-+		[ -n "$wpa_key_mgmt" ] && append bss_conf "wpa_key_mgmt=$wpa_key_mgmt" "$N"
-+	fi
-+
-+	if [ "$wpa" -ge "2" ]; then
-+		if [ -n "$network_bridge" -a "$rsn_preauth" = 1 ]; then
-+			set_default auth_cache 1
-+			append bss_conf "rsn_preauth=1" "$N"
-+			append bss_conf "rsn_preauth_interfaces=$network_bridge" "$N"
-+		else
-+			case "$auth_type" in
-+			sae|psk-sae|owe)
-+				set_default auth_cache 1
-+			;;
-+			*)
-+				set_default auth_cache 0
-+			;;
-+			esac
-+		fi
-+
-+		append bss_conf "okc=$auth_cache" "$N"
-+		[ "$auth_cache" = 0 -a "$fils" = 0 ] && append bss_conf "disable_pmksa_caching=1" "$N"
-+
-+		# RSN -> allow management frame protection
-+		case "$ieee80211w" in
-+			[012])
-+				json_get_vars ieee80211w_mgmt_cipher ieee80211w_max_timeout ieee80211w_retry_timeout
-+				append bss_conf "ieee80211w=$ieee80211w" "$N"
-+				[ "$ieee80211w" -gt "0" ] && {
-+					if [ "$auth_type" = "eap192" ]; then
-+						append bss_conf "group_mgmt_cipher=BIP-GMAC-256" "$N"
-+					else
-+						append bss_conf "group_mgmt_cipher=${ieee80211w_mgmt_cipher:-AES-128-CMAC}" "$N"
-+					fi
-+					[ -n "$ieee80211w_max_timeout" ] && \
-+						append bss_conf "assoc_sa_query_max_timeout=$ieee80211w_max_timeout" "$N"
-+					[ -n "$ieee80211w_retry_timeout" ] && \
-+						append bss_conf "assoc_sa_query_retry_timeout=$ieee80211w_retry_timeout" "$N"
-+				}
-+			;;
-+		esac
-+	fi
-+
-+	_macfile="/var/run/hostapd-$ifname.maclist"
-+	case "$macfilter" in
-+		allow)
-+			append bss_conf "macaddr_acl=1" "$N"
-+			append bss_conf "accept_mac_file=$_macfile" "$N"
-+			# accept_mac_file can be used to set MAC to VLAN ID mapping
-+			vlan_possible=1
-+		;;
-+		deny)
-+			append bss_conf "macaddr_acl=0" "$N"
-+			append bss_conf "deny_mac_file=$_macfile" "$N"
-+		;;
-+		*)
-+			_macfile=""
-+		;;
-+	esac
-+
-+	[ -n "$_macfile" ] && {
-+		json_get_vars macfile
-+		json_get_values maclist maclist
-+
-+		rm -f "$_macfile"
-+		(
-+			for mac in $maclist; do
-+				echo "$mac"
-+			done
-+			[ -n "$macfile" -a -f "$macfile" ] && cat "$macfile"
-+		) > "$_macfile"
-+	}
-+
-+	[ -n "$vlan_possible" -a -n "$dynamic_vlan" ] && {
-+		json_get_vars vlan_naming vlan_tagged_interface vlan_bridge vlan_file vlan_no_bridge
-+		set_default vlan_naming 1
-+		[ -z "$vlan_file" ] && set_default vlan_file /var/run/hostapd-$ifname.vlan
-+		append bss_conf "dynamic_vlan=$dynamic_vlan" "$N"
-+		append bss_conf "vlan_naming=$vlan_naming" "$N"
-+		if [ -n "$vlan_bridge" ]; then
-+			append bss_conf "vlan_bridge=$vlan_bridge" "$N"
-+		else
-+			set_default vlan_no_bridge 1
-+		fi
-+		append bss_conf "vlan_no_bridge=$vlan_no_bridge" "$N"
-+		[ -n "$vlan_tagged_interface" ] && \
-+			append bss_conf "vlan_tagged_interface=$vlan_tagged_interface" "$N"
-+		[ -n "$vlan_file" ] && {
-+			[ -e "$vlan_file" ] || touch "$vlan_file"
-+			append bss_conf "vlan_file=$vlan_file" "$N"
-+		}
-+	}
-+
-+	json_get_vars iw_enabled iw_internet iw_asra iw_esr iw_uesa iw_access_network_type
-+	json_get_vars iw_hessid iw_venue_group iw_venue_type iw_network_auth_type
-+	json_get_vars iw_roaming_consortium iw_domain_name iw_anqp_3gpp_cell_net iw_nai_realm
-+	json_get_vars iw_anqp_elem iw_qos_map_set iw_ipaddr_type_availability iw_gas_address3
-+	json_get_vars iw_venue_name iw_venue_url
-+
-+	set_default iw_enabled 0
-+	if [ "$iw_enabled" = "1" ]; then
-+		append bss_conf "interworking=1" "$N"
-+		set_default iw_internet 1
-+		set_default iw_asra 0
-+		set_default iw_esr 0
-+		set_default iw_uesa 0
-+
-+		append bss_conf "internet=$iw_internet" "$N"
-+		append bss_conf "asra=$iw_asra" "$N"
-+		append bss_conf "esr=$iw_esr" "$N"
-+		append bss_conf "uesa=$iw_uesa" "$N"
-+
-+		[ -n "$iw_access_network_type" ] && \
-+			append bss_conf "access_network_type=$iw_access_network_type" "$N"
-+		[ -n "$iw_hessid" ] && append bss_conf "hessid=$iw_hessid" "$N"
-+		[ -n "$iw_venue_group" ] && \
-+			append bss_conf "venue_group=$iw_venue_group" "$N"
-+		[ -n "$iw_venue_type" ] && append bss_conf "venue_type=$iw_venue_type" "$N"
-+		[ -n "$iw_network_auth_type" ] && \
-+			append bss_conf "network_auth_type=$iw_network_auth_type" "$N"
-+		[ -n "$iw_gas_address3" ] && append bss_conf "gas_address3=$iw_gas_address3" "$N"
-+
-+		json_for_each_item append_iw_roaming_consortium iw_roaming_consortium
-+		json_for_each_item append_iw_anqp_elem iw_anqp_elem
-+		json_for_each_item append_iw_nai_realm iw_nai_realm
-+		json_for_each_item append_iw_venue_name iw_venue_name
-+		json_for_each_item append_iw_venue_url iw_venue_url
-+
-+		iw_domain_name_conf=
-+		json_for_each_item append_iw_domain_name iw_domain_name
-+		[ -n "$iw_domain_name_conf" ] && \
-+			append bss_conf "domain_name=$iw_domain_name_conf" "$N"
-+
-+		iw_anqp_3gpp_cell_net_conf=
-+		json_for_each_item append_iw_anqp_3gpp_cell_net iw_anqp_3gpp_cell_net
-+		[ -n "$iw_anqp_3gpp_cell_net_conf" ] && \
-+			append bss_conf "anqp_3gpp_cell_net=$iw_anqp_3gpp_cell_net_conf" "$N"
-+	fi
-+
-+	set_default iw_qos_map_set 0,0,2,16,1,1,255,255,18,22,24,38,40,40,44,46,48,56
-+	case "$iw_qos_map_set" in
-+		*,*);;
-+		*) iw_qos_map_set="";;
-+	esac
-+	[ -n "$iw_qos_map_set" ] && append bss_conf "qos_map_set=$iw_qos_map_set" "$N"
-+
-+	local hs20 disable_dgaf osen anqp_domain_id hs20_deauth_req_timeout \
-+		osu_ssid hs20_wan_metrics hs20_operating_class hs20_t_c_filename hs20_t_c_timestamp \
-+		hs20_t_c_server_url
-+	json_get_vars hs20 disable_dgaf osen anqp_domain_id hs20_deauth_req_timeout \
-+		osu_ssid hs20_wan_metrics hs20_operating_class hs20_t_c_filename hs20_t_c_timestamp \
-+		hs20_t_c_server_url
-+
-+	set_default hs20 0
-+	set_default disable_dgaf $hs20
-+	set_default osen 0
-+	set_default anqp_domain_id 0
-+	set_default hs20_deauth_req_timeout 60
-+	if [ "$hs20" = "1" ]; then
-+		append bss_conf "hs20=1" "$N"
-+		append_hs20_icons
-+		append bss_conf "disable_dgaf=$disable_dgaf" "$N"
-+		append bss_conf "osen=$osen" "$N"
-+		append bss_conf "anqp_domain_id=$anqp_domain_id" "$N"
-+		append bss_conf "hs20_deauth_req_timeout=$hs20_deauth_req_timeout" "$N"
-+		[ -n "$osu_ssid" ] && append bss_conf "osu_ssid=$osu_ssid" "$N"
-+		[ -n "$hs20_wan_metrics" ] && append bss_conf "hs20_wan_metrics=$hs20_wan_metrics" "$N"
-+		[ -n "$hs20_operating_class" ] && append bss_conf "hs20_operating_class=$hs20_operating_class" "$N"
-+		[ -n "$hs20_t_c_filename" ] && append bss_conf "hs20_t_c_filename=$hs20_t_c_filename" "$N"
-+		[ -n "$hs20_t_c_timestamp" ] && append bss_conf "hs20_t_c_timestamp=$hs20_t_c_timestamp" "$N"
-+		[ -n "$hs20_t_c_server_url" ] && append bss_conf "hs20_t_c_server_url=$hs20_t_c_server_url" "$N"
-+		json_for_each_item append_hs20_oper_friendly_name hs20_oper_friendly_name
-+		json_for_each_item append_hs20_conn_capab hs20_conn_capab
-+		json_for_each_item append_osu_provider osu_provider
-+		json_for_each_item append_operator_icon operator_icon
-+	fi
-+
-+	if [ "$eap_server" = "1" ]; then
-+		append bss_conf "eap_server=1" "$N"
-+		append bss_conf "eap_server_erp=1" "$N"
-+		[ -n "$eap_user_file" ] && append bss_conf "eap_user_file=$eap_user_file" "$N"
-+		[ -n "$ca_cert" ] && append bss_conf "ca_cert=$ca_cert" "$N"
-+		[ -n "$server_cert" ] && append bss_conf "server_cert=$server_cert" "$N"
-+		[ -n "$private_key" ] && append bss_conf "private_key=$private_key" "$N"
-+		[ -n "$private_key_passwd" ] && append bss_conf "private_key_passwd=$private_key_passwd" "$N"
-+		[ -n "$server_id" ] && append bss_conf "server_id=$server_id" "$N"
-+	fi
-+
-+	set_default multicast_to_unicast_all 0
-+	if [ "$multicast_to_unicast_all" -gt 0 ]; then
-+		append bss_conf "multicast_to_unicast=$multicast_to_unicast_all" "$N"
-+	fi
-+	set_default proxy_arp 0
-+	if [ "$proxy_arp" -gt 0 ]; then
-+		append bss_conf "proxy_arp=$proxy_arp" "$N"
-+	fi
-+
-+	set_default per_sta_vif 0
-+	if [ "$per_sta_vif" -gt 0 ]; then
-+		append bss_conf "per_sta_vif=$per_sta_vif" "$N"
-+	fi
-+
-+	json_get_values opts hostapd_bss_options
-+	for val in $opts; do
-+		append bss_conf "$val" "$N"
-+	done
-+
-+	append "$var" "$bss_conf" "$N"
-+	return 0
-+}
-+
-+hostapd_set_log_options() {
-+	local var="$1"
-+
-+	local log_level log_80211 log_8021x log_radius log_wpa log_driver log_iapp log_mlme
-+	json_get_vars log_level log_80211 log_8021x log_radius log_wpa log_driver log_iapp log_mlme
-+
-+	set_default log_level 2
-+	set_default log_80211  1
-+	set_default log_8021x  1
-+	set_default log_radius 1
-+	set_default log_wpa    1
-+	set_default log_driver 1
-+	set_default log_iapp   1
-+	set_default log_mlme   1
-+
-+	local log_mask="$(( \
-+		($log_80211  << 0) | \
-+		($log_8021x  << 1) | \
-+		($log_radius << 2) | \
-+		($log_wpa    << 3) | \
-+		($log_driver << 4) | \
-+		($log_iapp   << 5) | \
-+		($log_mlme   << 6)   \
-+	))"
-+
-+	append "$var" "logger_syslog=$log_mask" "$N"
-+	append "$var" "logger_syslog_level=$log_level" "$N"
-+	append "$var" "logger_stdout=$log_mask" "$N"
-+	append "$var" "logger_stdout_level=$log_level" "$N"
-+
-+	return 0
-+}
-+
-+_wpa_supplicant_common() {
-+	local ifname="$1"
-+
-+	_rpath="/var/run/wpa_supplicant"
-+	_config="${_rpath}-$ifname.conf"
-+}
-+
-+wpa_supplicant_teardown_interface() {
-+	_wpa_supplicant_common "$1"
-+	rm -rf "$_rpath/$1" "$_config"
-+}
-+
-+wpa_supplicant_prepare_interface() {
-+	local ifname="$1"
-+	_w_driver="$2"
-+
-+	_wpa_supplicant_common "$1"
-+
-+	json_get_vars mode wds multi_ap
-+
-+	[ -n "$network_bridge" ] && {
-+		fail=
-+		case "$mode" in
-+			adhoc)
-+				fail=1
-+			;;
-+			sta)
-+				[ "$wds" = 1 -o "$multi_ap" = 1 ] || fail=1
-+			;;
-+		esac
-+
-+		[ -n "$fail" ] && {
-+			wireless_setup_vif_failed BRIDGE_NOT_ALLOWED
-+			return 1
-+		}
-+	}
-+
-+	local ap_scan=
-+
-+	_w_mode="$mode"
-+
-+	[ "$mode" = adhoc ] && {
-+		ap_scan="ap_scan=2"
-+	}
-+
-+	local country_str=
-+	[ -n "$country" ] && {
-+		country_str="country=$country"
-+	}
-+
-+	multiap_flag_file="${_config}.is_multiap"
-+	if [ "$multi_ap" = "1" ]; then
-+		touch "$multiap_flag_file"
-+	else
-+		[ -e "$multiap_flag_file" ] && rm "$multiap_flag_file"
-+	fi
-+	wpa_supplicant_teardown_interface "$ifname"
-+	cat > "$_config" <<EOF
-+${scan_list:+freq_list=$scan_list}
-+$ap_scan
-+$country_str
-+EOF
-+	return 0
-+}
-+
-+wpa_supplicant_set_fixed_freq() {
-+	local freq="$1"
-+	local htmode="$2"
-+
-+	append network_data "fixed_freq=1" "$N$T"
-+	append network_data "frequency=$freq" "$N$T"
-+	case "$htmode" in
-+		NOHT) append network_data "disable_ht=1" "$N$T";;
-+		HE20|HT20|VHT20) append network_data "disable_ht40=1" "$N$T";;
-+		HT40*|VHT40|VHT80|VHT160|HE40|HE80|HE160) append network_data "ht40=1" "$N$T";;
-+	esac
-+	case "$htmode" in
-+		VHT*) append network_data "vht=1" "$N$T";;
-+	esac
-+	case "$htmode" in
-+		HE80|VHT80) append network_data "max_oper_chwidth=1" "$N$T";;
-+		HE160|VHT160) append network_data "max_oper_chwidth=2" "$N$T";;
-+		HE20|HE40|VHT20|VHT40) append network_data "max_oper_chwidth=0" "$N$T";;
-+		*) append network_data "disable_vht=1" "$N$T";;
-+	esac
-+}
-+
-+wpa_supplicant_add_network() {
-+	local ifname="$1"
-+	local freq="$2"
-+	local htmode="$3"
-+	local noscan="$4"
-+
-+	_wpa_supplicant_common "$1"
-+	wireless_vif_parse_encryption
-+
-+	json_get_vars \
-+		ssid bssid key \
-+		basic_rate mcast_rate \
-+		ieee80211w ieee80211r fils ocv \
-+		multi_ap \
-+		default_disabled
-+
-+	case "$auth_type" in
-+		sae|owe|eap192|eap-eap192)
-+			set_default ieee80211w 2
-+		;;
-+		psk-sae)
-+			set_default ieee80211w 1
-+		;;
-+	esac
-+
-+	set_default ieee80211r 0
-+	set_default multi_ap 0
-+	set_default default_disabled 0
-+
-+	local key_mgmt='NONE'
-+	local network_data=
-+	local T="	"
-+
-+	local scan_ssid="scan_ssid=1"
-+	local freq wpa_key_mgmt
-+
-+	[ "$_w_mode" = "adhoc" ] && {
-+		append network_data "mode=1" "$N$T"
-+		[ -n "$freq" ] && wpa_supplicant_set_fixed_freq "$freq" "$htmode"
-+		[ "$noscan" = "1" ] && append network_data "noscan=1" "$N$T"
-+
-+		scan_ssid="scan_ssid=0"
-+
-+		[ "$_w_driver" = "nl80211" ] ||	append wpa_key_mgmt "WPA-NONE"
-+	}
-+
-+	[ "$_w_mode" = "mesh" ] && {
-+		json_get_vars mesh_id mesh_fwding mesh_rssi_threshold encryption
-+		[ -n "$mesh_id" ] && ssid="${mesh_id}"
-+
-+		append network_data "mode=5" "$N$T"
-+		[ -n "$mesh_fwding" ] && append network_data "mesh_fwding=${mesh_fwding}" "$N$T"
-+		[ -n "$mesh_rssi_threshold" ] && append network_data "mesh_rssi_threshold=${mesh_rssi_threshold}" "$N$T"
-+		[ -n "$freq" ] && wpa_supplicant_set_fixed_freq "$freq" "$htmode"
-+		[ "$noscan" = "1" ] && append network_data "noscan=1" "$N$T"
-+		[ "$encryption" = "none" -o -z "$encryption" ] || append wpa_key_mgmt "SAE"
-+		scan_ssid=""
-+	}
-+
-+	[ "$_w_mode" = "sta" ] && {
-+		[ "$multi_ap" = 1 ] && append network_data "multi_ap_backhaul_sta=1" "$N$T"
-+		[ "$default_disabled" = 1 ] && append network_data "disabled=1" "$N$T"
-+	}
-+
-+	[ -n "$ocv" ] && append network_data "ocv=$ocv" "$N$T"
-+
-+	case "$auth_type" in
-+		none) ;;
-+		owe)
-+			hostapd_append_wpa_key_mgmt
-+			key_mgmt="$wpa_key_mgmt"
-+		;;
-+		wep)
-+			local wep_keyidx=0
-+			hostapd_append_wep_key network_data
-+			append network_data "wep_tx_keyidx=$wep_keyidx" "$N$T"
-+		;;
-+		wps)
-+			key_mgmt='WPS'
-+		;;
-+		psk|sae|psk-sae)
-+			local passphrase
-+
-+			if [ "$_w_mode" != "mesh" ]; then
-+				hostapd_append_wpa_key_mgmt
-+			fi
-+
-+			key_mgmt="$wpa_key_mgmt"
-+
-+			if [ "$_w_mode" = "mesh" ] || [ "$auth_type" = "sae" ]; then
-+				passphrase="sae_password=\"${key}\""
-+			else
-+				if [ ${#key} -eq 64 ]; then
-+					passphrase="psk=${key}"
-+				else
-+					passphrase="psk=\"${key}\""
-+				fi
-+			fi
-+			append network_data "$passphrase" "$N$T"
-+		;;
-+		eap|eap192|eap-eap192)
-+			hostapd_append_wpa_key_mgmt
-+			key_mgmt="$wpa_key_mgmt"
-+
-+			json_get_vars eap_type identity anonymous_identity ca_cert ca_cert_usesystem
-+
-+			[ "$fils" -gt 0 ] && append network_data "erp=1" "$N$T"
-+			if [ "$ca_cert_usesystem" -eq "1" -a -f "/etc/ssl/certs/ca-certificates.crt" ]; then
-+				append network_data "ca_cert=\"/etc/ssl/certs/ca-certificates.crt\"" "$N$T"
-+			else
-+				[ -n "$ca_cert" ] && append network_data "ca_cert=\"$ca_cert\"" "$N$T"
-+			fi
-+			[ -n "$identity" ] && append network_data "identity=\"$identity\"" "$N$T"
-+			[ -n "$anonymous_identity" ] && append network_data "anonymous_identity=\"$anonymous_identity\"" "$N$T"
-+			case "$eap_type" in
-+				tls)
-+					json_get_vars client_cert priv_key priv_key_pwd
-+					append network_data "client_cert=\"$client_cert\"" "$N$T"
-+					append network_data "private_key=\"$priv_key\"" "$N$T"
-+					append network_data "private_key_passwd=\"$priv_key_pwd\"" "$N$T"
-+
-+					json_get_vars subject_match
-+					[ -n "$subject_match" ] && append network_data "subject_match=\"$subject_match\"" "$N$T"
-+
-+					json_get_values altsubject_match altsubject_match
-+					if [ -n "$altsubject_match" ]; then
-+						local list=
-+						for x in $altsubject_match; do
-+							append list "$x" ";"
-+						done
-+						append network_data "altsubject_match=\"$list\"" "$N$T"
-+					fi
-+
-+					json_get_values domain_match domain_match
-+					if [ -n "$domain_match" ]; then
-+						local list=
-+						for x in $domain_match; do
-+							append list "$x" ";"
-+						done
-+						append network_data "domain_match=\"$list\"" "$N$T"
-+					fi
-+
-+					json_get_values domain_suffix_match domain_suffix_match
-+					if [ -n "$domain_suffix_match" ]; then
-+						local list=
-+						for x in $domain_suffix_match; do
-+							append list "$x" ";"
-+						done
-+						append network_data "domain_suffix_match=\"$list\"" "$N$T"
-+					fi
-+				;;
-+				fast|peap|ttls)
-+					json_get_vars auth password ca_cert2 ca_cert2_usesystem client_cert2 priv_key2 priv_key2_pwd
-+					set_default auth MSCHAPV2
-+
-+					if [ "$auth" = "EAP-TLS" ]; then
-+						if [ "$ca_cert2_usesystem" -eq "1" -a -f "/etc/ssl/certs/ca-certificates.crt" ]; then
-+							append network_data "ca_cert2=\"/etc/ssl/certs/ca-certificates.crt\"" "$N$T"
-+						else
-+							[ -n "$ca_cert2" ] && append network_data "ca_cert2=\"$ca_cert2\"" "$N$T"
-+						fi
-+						append network_data "client_cert2=\"$client_cert2\"" "$N$T"
-+						append network_data "private_key2=\"$priv_key2\"" "$N$T"
-+						append network_data "private_key2_passwd=\"$priv_key2_pwd\"" "$N$T"
-+					else
-+						append network_data "password=\"$password\"" "$N$T"
-+					fi
-+
-+					json_get_vars subject_match
-+					[ -n "$subject_match" ] && append network_data "subject_match=\"$subject_match\"" "$N$T"
-+
-+					json_get_values altsubject_match altsubject_match
-+					if [ -n "$altsubject_match" ]; then
-+						local list=
-+						for x in $altsubject_match; do
-+							append list "$x" ";"
-+						done
-+						append network_data "altsubject_match=\"$list\"" "$N$T"
-+					fi
-+
-+					json_get_values domain_match domain_match
-+					if [ -n "$domain_match" ]; then
-+						local list=
-+						for x in $domain_match; do
-+							append list "$x" ";"
-+						done
-+						append network_data "domain_match=\"$list\"" "$N$T"
-+					fi
-+
-+					json_get_values domain_suffix_match domain_suffix_match
-+					if [ -n "$domain_suffix_match" ]; then
-+						local list=
-+						for x in $domain_suffix_match; do
-+							append list "$x" ";"
-+						done
-+						append network_data "domain_suffix_match=\"$list\"" "$N$T"
-+					fi
-+
-+					phase2proto="auth="
-+					case "$auth" in
-+						"auth"*)
-+							phase2proto=""
-+						;;
-+						"EAP-"*)
-+							auth="$(echo $auth | cut -b 5- )"
-+							[ "$eap_type" = "ttls" ] &&
-+								phase2proto="autheap="
-+							json_get_vars subject_match2
-+							[ -n "$subject_match2" ] && append network_data "subject_match2=\"$subject_match2\"" "$N$T"
-+
-+							json_get_values altsubject_match2 altsubject_match2
-+							if [ -n "$altsubject_match2" ]; then
-+								local list=
-+								for x in $altsubject_match2; do
-+									append list "$x" ";"
-+								done
-+								append network_data "altsubject_match2=\"$list\"" "$N$T"
-+							fi
-+
-+							json_get_values domain_match2 domain_match2
-+							if [ -n "$domain_match2" ]; then
-+								local list=
-+								for x in $domain_match2; do
-+									append list "$x" ";"
-+								done
-+								append network_data "domain_match2=\"$list\"" "$N$T"
-+							fi
-+
-+							json_get_values domain_suffix_match2 domain_suffix_match2
-+							if [ -n "$domain_suffix_match2" ]; then
-+								local list=
-+								for x in $domain_suffix_match2; do
-+									append list "$x" ";"
-+								done
-+								append network_data "domain_suffix_match2=\"$list\"" "$N$T"
-+							fi
-+						;;
-+					esac
-+					append network_data "phase2=\"$phase2proto$auth\"" "$N$T"
-+				;;
-+			esac
-+			append network_data "eap=$(echo $eap_type | tr 'a-z' 'A-Z')" "$N$T"
-+		;;
-+	esac
-+
-+	[ "$wpa_cipher" = GCMP ] && {
-+		append network_data "pairwise=GCMP" "$N$T"
-+		append network_data "group=GCMP" "$N$T"
-+	}
-+
-+	[ "$mode" = mesh ] || {
-+		case "$wpa" in
-+			1)
-+				append network_data "proto=WPA" "$N$T"
-+			;;
-+			2)
-+				append network_data "proto=RSN" "$N$T"
-+			;;
-+		esac
-+
-+		case "$ieee80211w" in
-+			[012])
-+				[ "$wpa" -ge 2 ] && append network_data "ieee80211w=$ieee80211w" "$N$T"
-+			;;
-+		esac
-+	}
-+	[ -n "$bssid" ] && append network_data "bssid=$bssid" "$N$T"
-+	[ -n "$beacon_int" ] && append network_data "beacon_int=$beacon_int" "$N$T"
-+
-+	local bssid_blacklist bssid_whitelist
-+	json_get_values bssid_blacklist bssid_blacklist
-+	json_get_values bssid_whitelist bssid_whitelist
-+
-+	[ -n "$bssid_blacklist" ] && append network_data "bssid_blacklist=$bssid_blacklist" "$N$T"
-+	[ -n "$bssid_whitelist" ] && append network_data "bssid_whitelist=$bssid_whitelist" "$N$T"
-+
-+	[ -n "$basic_rate" ] && {
-+		local br rate_list=
-+		for br in $basic_rate; do
-+			wpa_supplicant_add_rate rate_list "$br"
-+		done
-+		[ -n "$rate_list" ] && append network_data "rates=$rate_list" "$N$T"
-+	}
-+
-+	[ -n "$mcast_rate" ] && {
-+		local mc_rate=
-+		wpa_supplicant_add_rate mc_rate "$mcast_rate"
-+		append network_data "mcast_rate=$mc_rate" "$N$T"
-+	}
-+
-+	if [ "$key_mgmt" = "WPS" ]; then
-+		echo "wps_cred_processing=1" >> "$_config"
-+	else
-+		cat >> "$_config" <<EOF
-+network={
-+	$scan_ssid
-+	ssid="$ssid"
-+	key_mgmt=$key_mgmt
-+	$network_data
-+}
-+EOF
-+	fi
-+	return 0
-+}
-+
-+hostapd_common_cleanup() {
-+	killall meshd-nl80211
-+}
 diff --git a/package/network/services/hostapd/files/hostapd.uc b/package/network/services/hostapd/files/hostapd.uc
 new file mode 100644
 index 0000000000..f9f0c31bab
diff --git a/patches/wifi/0005-hostapd-add-TIP-hostapd.sh-version.patch b/patches/0050-hostapd-add-TIP-hostapd.sh-version.patch
similarity index 99%
rename from patches/wifi/0005-hostapd-add-TIP-hostapd.sh-version.patch
rename to patches/0050-hostapd-add-TIP-hostapd.sh-version.patch
index 8b91d8576..1f7478aae 100644
--- a/patches/wifi/0005-hostapd-add-TIP-hostapd.sh-version.patch
+++ b/patches/0050-hostapd-add-TIP-hostapd.sh-version.patch
@@ -1,7 +1,7 @@
-From e8d4adc4f6398b0c139bcfc3da0c878f57b09865 Mon Sep 17 00:00:00 2001
+From f144ecc68e6b3abf3bf2d7ad14ac7a70fb3d76aa Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Thu, 17 Aug 2023 15:54:39 +0200
-Subject: [PATCH 5/6] hostapd: add TIP hostapd.sh version
+Subject: [PATCH 50/52] hostapd: add TIP hostapd.sh version
 
 Signed-off-by: John Crispin <john@phrozen.org>
 ---
diff --git a/patches/wifi/0006-hostapd-add-TIP-extensions.patch b/patches/0051-hostapd-add-TIP-extensions.patch
similarity index 99%
rename from patches/wifi/0006-hostapd-add-TIP-extensions.patch
rename to patches/0051-hostapd-add-TIP-extensions.patch
index a5d963e50..a7e05bb52 100644
--- a/patches/wifi/0006-hostapd-add-TIP-extensions.patch
+++ b/patches/0051-hostapd-add-TIP-extensions.patch
@@ -1,7 +1,7 @@
-From 65341e2202bd136efe898a7679982d35a3c1f10f Mon Sep 17 00:00:00 2001
+From 71c65e4fc9fc7fca9a0288acd23b746937af750d Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Thu, 17 Aug 2023 19:53:52 +0200
-Subject: [PATCH 6/6] hostapd: add TIP extensions
+Subject: [PATCH 51/52] hostapd: add TIP extensions
 
 Signed-off-by: John Crispin <john@phrozen.org>
 ---
diff --git a/patches/0051-hostapd-add-TIP-shell-script.patch b/patches/0051-hostapd-add-TIP-shell-script.patch
new file mode 100644
index 000000000..8e30136d5
--- /dev/null
+++ b/patches/0051-hostapd-add-TIP-shell-script.patch
@@ -0,0 +1,1678 @@
+From 31bf503eee22ad86d154598bcefb0a8d3db7b5ba Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Mon, 11 Sep 2023 08:27:50 +0200
+Subject: [PATCH] hostapd: add TIP shell script
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ .../network/services/hostapd/files/hostapd.sh | 1658 +++++++++++++++++
+ 1 file changed, 1658 insertions(+)
+ create mode 100644 package/network/services/hostapd/files/hostapd.sh
+
+diff --git a/package/network/services/hostapd/files/hostapd.sh b/package/network/services/hostapd/files/hostapd.sh
+new file mode 100644
+index 0000000000..145848189d
+--- /dev/null
++++ b/package/network/services/hostapd/files/hostapd.sh
+@@ -0,0 +1,1658 @@
++. /lib/functions/network.sh
++. /lib/functions.sh
++
++wpa_supplicant_add_rate() {
++	local var="$1"
++	local val="$(($2 / 1000))"
++	local sub="$((($2 / 100) % 10))"
++	append $var "$val" ","
++	[ $sub -gt 0 ] && append $var "."
++}
++
++hostapd_add_rate() {
++	local var="$1"
++	local val="$(($2 / 100))"
++	append $var "$val" " "
++}
++
++hostapd_append_wep_key() {
++	local var="$1"
++
++	wep_keyidx=0
++	set_default key 1
++	case "$key" in
++		[1234])
++			for idx in 1 2 3 4; do
++				local zidx
++				zidx=$(($idx - 1))
++				json_get_var ckey "key${idx}"
++				[ -n "$ckey" ] && \
++					append $var "wep_key${zidx}=$(prepare_key_wep "$ckey")" "$N$T"
++			done
++			wep_keyidx=$((key - 1))
++		;;
++		*)
++			append $var "wep_key0=$(prepare_key_wep "$key")" "$N$T"
++		;;
++	esac
++}
++
++hostapd_append_wpa_key_mgmt() {
++	local auth_type_l="$(echo $auth_type | tr 'a-z' 'A-Z')"
++
++	case "$auth_type" in
++		psk|eap)
++			append wpa_key_mgmt "WPA-$auth_type_l"
++			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-${auth_type_l}"
++			[ "${ieee80211w:-0}" -gt 0 ] && append wpa_key_mgmt "WPA-${auth_type_l}-SHA256"
++		;;
++		eap192)
++			append wpa_key_mgmt "WPA-EAP-SUITE-B-192"
++			append wpa_key_mgmt "WPA-EAP-SHA256"
++			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-EAP"
++		;;
++		eap-eap256)
++			append wpa_key_mgmt "WPA-EAP"
++			append wpa_key_mgmt "WPA-EAP-SHA256"
++			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-EAP"
++		;;
++		eap256)
++			append wpa_key_mgmt "WPA-EAP-SHA256"
++			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-EAP"
++		;;
++		sae)
++			append wpa_key_mgmt "SAE"
++			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-SAE"
++		;;
++		psk-sae)
++			append wpa_key_mgmt "WPA-PSK"
++			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-PSK"
++			[ "${ieee80211w:-0}" -gt 0 ] && append wpa_key_mgmt "WPA-PSK-SHA256"
++			append wpa_key_mgmt "SAE"
++			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-SAE"
++		;;
++		owe)
++			append wpa_key_mgmt "OWE"
++		;;
++	esac
++
++	[ "$fils" -gt 0 ] && {
++		case "$auth_type" in
++			eap*)
++				append wpa_key_mgmt FILS-SHA256
++				[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt FT-FILS-SHA256
++			;;
++		esac
++	}
++
++	[ "$auth_osen" = "1" ] && append wpa_key_mgmt "OSEN"
++}
++
++hostapd_add_log_config() {
++	config_add_boolean \
++		log_80211 \
++		log_8021x \
++		log_radius \
++		log_wpa \
++		log_driver \
++		log_iapp \
++		log_mlme
++
++	config_add_int log_level
++}
++
++hostapd_common_add_device_config() {
++	config_add_array basic_rate
++	config_add_array supported_rates
++	config_add_string beacon_rate
++
++	config_add_string country country3
++	config_add_boolean country_ie doth
++	config_add_boolean spectrum_mgmt_required
++	config_add_int local_pwr_constraint
++	config_add_string require_mode
++	config_add_boolean legacy_rates
++	config_add_int cell_density
++	config_add_int rts_threshold
++	config_add_int rssi_reject_assoc_rssi
++	config_add_int rssi_ignore_probe_request
++	config_add_int maxassoc
++	config_add_boolean maxassoc_ignore_probe
++
++	config_add_string acs_chan_bias
++	config_add_boolean acs_exclude_dfs
++	config_add_array hostapd_options
++
++	config_add_int airtime_mode
++
++	config_add_boolean multiple_bssid rnr_beacon he_co_locate ema
++
++	hostapd_add_log_config
++}
++
++hostapd_prepare_device_config() {
++	local config="$1"
++	local driver="$2"
++
++	local base_cfg=
++
++	json_get_vars country country3 country_ie beacon_int:100 dtim_period:2 doth require_mode legacy_rates \
++		acs_chan_bias local_pwr_constraint spectrum_mgmt_required airtime_mode cell_density \
++		rts_threshold beacon_rate rssi_reject_assoc_rssi rssi_ignore_probe_request maxassoc \
++		multiple_bssid he_co_locate rnr_beacon ema acs_exclude_dfs \
++		maxassoc_ignore_probe
++
++	hostapd_set_log_options base_cfg
++
++	set_default country_ie 1
++	set_default spectrum_mgmt_required 0
++	set_default doth 1
++	set_default legacy_rates 0
++	set_default airtime_mode 0
++	set_default cell_density 0
++	set_default he_co_locate 0
++	set_default rnr_beacon 0
++	set_default multiple_bssid 0
++	set_default ema 0
++	set_default acs_exclude_dfs 0
++
++	[ -n "$country" ] && {
++		append base_cfg "country_code=$country" "$N"
++		[ -n "$country3" ] && append base_cfg "country3=$country3" "$N"
++
++		[ "$country_ie" -gt 0 ] && {
++			append base_cfg "ieee80211d=1" "$N"
++			[ -n "$local_pwr_constraint" ] && append base_cfg "local_pwr_constraint=$local_pwr_constraint" "$N"
++			[ "$spectrum_mgmt_required" -gt 0 ] && append base_cfg "spectrum_mgmt_required=$spectrum_mgmt_required" "$N"
++		}
++		[ "$hwmode" = "a" -a "$doth" -gt 0 ] && append base_cfg "ieee80211h=1" "$N"
++	}
++
++	[ -n "$acs_chan_bias" ] && append base_cfg "acs_chan_bias=$acs_chan_bias" "$N"
++
++	local brlist= br
++	json_get_values basic_rate_list basic_rate
++	local rlist= r
++	json_get_values rate_list supported_rates
++
++	[ -n "$hwmode" ] && append base_cfg "hw_mode=$hwmode" "$N"
++	if [ "$hwmode" = "g" ] || [ "$hwmode" = "a" ]; then
++		[ -n "$require_mode" ] && legacy_rates=0
++		case "$require_mode" in
++			n) append base_cfg "require_ht=1" "$N";;
++			ac) append base_cfg "require_vht=1" "$N";;
++		esac
++	fi
++	case "$hwmode" in
++		b)
++			if [ "$cell_density" -eq 1 ]; then
++				set_default rate_list "5500 11000"
++				set_default basic_rate_list "5500 11000"
++			elif [ "$cell_density" -ge 2 ]; then
++				set_default rate_list "11000"
++				set_default basic_rate_list "11000"
++			fi
++		;;
++		g)
++			if [ "$cell_density" -eq 0 ] || [ "$cell_density" -eq 1 ]; then
++				if [ "$legacy_rates" -eq 0 ]; then
++					set_default rate_list "6000 9000 12000 18000 24000 36000 48000 54000"
++					set_default basic_rate_list "6000 12000 24000"
++				elif [ "$cell_density" -eq 1 ]; then
++					set_default rate_list "5500 6000 9000 11000 12000 18000 24000 36000 48000 54000"
++					set_default basic_rate_list "5500 11000"
++				fi
++			elif [ "$cell_density" -ge 3 ] && [ "$legacy_rates" -ne 0 ] || [ "$cell_density" -eq 2 ]; then
++				if [ "$legacy_rates" -eq 0 ]; then
++					set_default rate_list "12000 18000 24000 36000 48000 54000"
++					set_default basic_rate_list "12000 24000"
++				else
++					set_default rate_list "11000 12000 18000 24000 36000 48000 54000"
++					set_default basic_rate_list "11000"
++				fi
++			elif [ "$cell_density" -ge 3 ]; then
++				set_default rate_list "24000 36000 48000 54000"
++				set_default basic_rate_list "24000"
++			fi
++		;;
++		a)
++			if [ "$cell_density" -eq 1 ]; then
++				set_default rate_list "6000 9000 12000 18000 24000 36000 48000 54000"
++				set_default basic_rate_list "6000 12000 24000"
++			elif [ "$cell_density" -eq 2 ]; then
++				set_default rate_list "12000 18000 24000 36000 48000 54000"
++				set_default basic_rate_list "12000 24000"
++			elif [ "$cell_density" -ge 3 ]; then
++				set_default rate_list "24000 36000 48000 54000"
++				set_default basic_rate_list "24000"
++			fi
++		;;
++	esac
++
++	for r in $rate_list; do
++		hostapd_add_rate rlist "$r"
++	done
++
++	for br in $basic_rate_list; do
++		hostapd_add_rate brlist "$br"
++	done
++
++	[ -n "$rssi_reject_assoc_rssi" ] && append base_cfg "rssi_reject_assoc_rssi=$rssi_reject_assoc_rssi" "$N"
++	[ -n "$rssi_ignore_probe_request" ] && append base_cfg "rssi_ignore_probe_request=$rssi_ignore_probe_request" "$N"
++	[ -n "$beacon_rate" ] && append base_cfg "beacon_rate=$beacon_rate" "$N"
++	[ -n "$rlist" ] && append base_cfg "supported_rates=$rlist" "$N"
++	[ -n "$brlist" ] && append base_cfg "basic_rates=$brlist" "$N"
++	append base_cfg "beacon_int=$beacon_int" "$N"
++	[ -n "$rts_threshold" ] && append base_cfg "rts_threshold=$rts_threshold" "$N"
++	append base_cfg "dtim_period=$dtim_period" "$N"
++	[ "$airtime_mode" -gt 0 ] && append base_cfg "airtime_mode=$airtime_mode" "$N"
++	[ -n "$maxassoc" ] && append base_cfg "iface_max_num_sta=$maxassoc" "$N"
++	[ "$maxassoc_ignore_probe" -gt 0 ] && append base_cfg "no_probe_resp_if_max_sta=1" "$N"
++	[ "$rnr_beacon" -gt 0 ] && append base_cfg "rnr_beacon=$rnr_beacon" "$N"
++	[ "$he_co_locate" -gt 0 ] && append base_cfg "he_co_locate=$he_co_locate" "$N"
++	[ "$multiple_bssid" -gt 0 ] && append base_cfg "multiple_bssid=$multiple_bssid" "$N"
++	[ "$ema" -gt 0 ] && append base_cfg "ema=$ema" "$N"
++	[ "$acs_exclude_dfs" -gt 0 ] && append base_cfg "acs_exclude_dfs=$acs_exclude_dfs" "$N"
++
++	json_get_values opts hostapd_options
++	for val in $opts; do
++		append base_cfg "$val" "$N"
++	done
++
++	cat > "$config" <<EOF
++driver=$driver
++$base_cfg
++EOF
++}
++
++hostapd_common_add_bss_config() {
++	config_add_string 'bssid:macaddr' 'ssid:string'
++	config_add_boolean wds wmm uapsd hidden utf8_ssid
++
++	config_add_int maxassoc max_inactivity
++	config_add_boolean disassoc_low_ack isolate short_preamble skip_inactivity_poll
++
++	config_add_int \
++		wep_rekey eap_reauth_period \
++		wpa_group_rekey wpa_pair_rekey wpa_master_rekey
++	config_add_boolean wpa_strict_rekey
++	config_add_boolean wpa_disable_eapol_key_retries
++
++	config_add_boolean tdls_prohibit
++
++	config_add_boolean rsn_preauth auth_cache
++	config_add_int ieee80211w
++	config_add_int eapol_version
++
++	config_add_string 'auth_server:host' 'server:host'
++	config_add_string auth_secret key
++	config_add_int 'auth_port:port' 'port:port'
++
++	config_add_string acct_server
++	config_add_string acct_secret
++	config_add_int acct_port
++
++	config_add_string acct_server_secondary
++	config_add_string acct_secret_secondary
++	config_add_int acct_port_secondary
++
++	config_add_int acct_interval
++
++	config_add_string auth_server_secondary
++	config_add_string auth_secret_secondary
++	config_add_int auth_port_secondary
++
++	config_add_int bss_load_update_period chan_util_avg_period
++
++	config_add_string dae_client
++	config_add_string dae_secret
++	config_add_int dae_port
++
++	config_add_string nasid
++	config_add_string ownip
++	config_add_string radius_client_addr
++	config_add_string iapp_interface
++	config_add_string eap_type ca_cert client_cert identity anonymous_identity auth priv_key priv_key_pwd
++	config_add_boolean ca_cert_usesystem ca_cert2_usesystem
++	config_add_string subject_match subject_match2
++	config_add_array altsubject_match altsubject_match2
++	config_add_array domain_match domain_match2 domain_suffix_match domain_suffix_match2
++	config_add_string ieee80211w_mgmt_cipher
++
++	config_add_int dynamic_vlan vlan_naming vlan_no_bridge
++	config_add_string vlan_tagged_interface vlan_bridge
++	config_add_string vlan_file
++
++	config_add_string 'key1:wepkey' 'key2:wepkey' 'key3:wepkey' 'key4:wepkey' 'password:wpakey'
++
++	config_add_string wpa_psk_file
++
++	config_add_int multi_ap
++
++	config_add_boolean wps_pushbutton wps_label ext_registrar wps_pbc_in_m1
++	config_add_int wps_ap_setup_locked wps_independent
++	config_add_string wps_device_type wps_device_name wps_manufacturer wps_pin
++	config_add_string multi_ap_backhaul_ssid multi_ap_backhaul_key
++
++	config_add_boolean wnm_sleep_mode wnm_sleep_mode_no_keys bss_transition
++	config_add_int time_advertisement
++	config_add_string time_zone
++	config_add_string vendor_elements
++
++	config_add_boolean ieee80211k rrm_neighbor_report rrm_beacon_report
++
++	config_add_boolean ftm_responder stationary_ap
++	config_add_string lci civic
++
++	config_add_boolean ieee80211r pmk_r1_push ft_psk_generate_local ft_over_ds
++	config_add_int r0_key_lifetime reassociation_deadline
++	config_add_string mobility_domain r1_key_holder
++	config_add_array r0kh r1kh
++
++	config_add_int ieee80211w_max_timeout ieee80211w_retry_timeout
++
++	config_add_string macfilter 'macfile:file'
++	config_add_array 'maclist:list(macaddr)'
++
++	config_add_array bssid_blacklist
++	config_add_array bssid_whitelist
++
++	config_add_int mcast_rate
++	config_add_array basic_rate
++	config_add_array supported_rates
++
++	config_add_boolean sae_require_mfp
++	config_add_int sae_pwe
++
++	config_add_string 'owe_transition_bssid:macaddr' 'owe_transition_ssid:string'
++	config_add_string owe_transition_ifname
++
++	config_add_boolean iw_enabled iw_internet iw_asra iw_esr iw_uesa
++	config_add_int iw_access_network_type iw_venue_group iw_venue_type
++	config_add_int iw_ipaddr_type_availability iw_gas_address3
++	config_add_string iw_hessid iw_network_auth_type iw_qos_map_set
++	config_add_array iw_roaming_consortium iw_domain_name iw_anqp_3gpp_cell_net iw_nai_realm
++	config_add_array iw_anqp_elem iw_venue_name iw_venue_url
++
++	config_add_boolean hs20 disable_dgaf osen
++	config_add_int anqp_domain_id
++	config_add_int hs20_deauth_req_timeout hs20_release
++	config_add_array hs20_oper_friendly_name
++	config_add_array osu_provider
++	config_add_array operator_icon
++	config_add_array hs20_conn_capab
++	config_add_string osu_ssid hs20_wan_metrics hs20_operating_class hs20_t_c_filename hs20_t_c_timestamp
++
++	config_add_string hs20_t_c_server_url
++
++	config_add_array airtime_sta_weight
++	config_add_int airtime_bss_weight airtime_bss_limit
++
++	config_add_boolean multicast_to_unicast multicast_to_unicast_all proxy_arp per_sta_vif
++
++	config_add_array hostapd_bss_options
++	config_add_boolean default_disabled
++
++	config_add_boolean request_cui
++	config_add_array radius_auth_req_attr
++	config_add_array radius_acct_req_attr
++
++	config_add_int eap_server
++	config_add_string eap_user_file ca_cert server_cert private_key private_key_passwd server_id
++
++	config_add_boolean fils
++	config_add_string fils_dhcp
++
++	config_add_boolean ratelimit
++
++	config_add_string uci_section
++
++	config_add_boolean dynamic_probe_resp
++}
++
++hostapd_set_vlan_file() {
++	local ifname="$1"
++	local vlan="$2"
++	json_get_vars name vid
++	echo "${vid} ${ifname}-${name}" >> /var/run/hostapd-${ifname}.vlan
++	wireless_add_vlan "${vlan}" "${ifname}-${name}"
++}
++
++hostapd_set_vlan() {
++	local ifname="$1"
++
++	rm -f /var/run/hostapd-${ifname}.vlan
++	for_each_vlan hostapd_set_vlan_file ${ifname}
++}
++
++hostapd_set_psk_file() {
++	local ifname="$1"
++	local vlan="$2"
++	local vlan_id=""
++
++	json_get_vars mac vid key
++	set_default mac "00:00:00:00:00:00"
++	[ -n "$vid" ] && vlan_id="vlanid=$vid "
++	echo "${vlan_id} ${mac} ${key}" >> /var/run/hostapd-${ifname}.psk
++}
++
++hostapd_set_psk() {
++	local ifname="$1"
++
++	rm -f /var/run/hostapd-${ifname}.psk
++	for_each_station hostapd_set_psk_file ${ifname}
++}
++
++append_iw_roaming_consortium() {
++	[ -n "$1" ] && append bss_conf "roaming_consortium=$1" "$N"
++}
++
++append_iw_domain_name() {
++	if [ -z "$iw_domain_name_conf" ]; then
++		iw_domain_name_conf="$1"
++	else
++		iw_domain_name_conf="$iw_domain_name_conf,$1"
++	fi
++}
++
++append_iw_anqp_3gpp_cell_net() {
++	if [ -z "$iw_anqp_3gpp_cell_net_conf" ]; then
++		iw_anqp_3gpp_cell_net_conf="$1"
++	else
++		iw_anqp_3gpp_cell_net_conf="$iw_anqp_3gpp_cell_net_conf;$1"
++	fi
++}
++
++append_iw_anqp_elem() {
++	[ -n "$1" ] && append bss_conf "anqp_elem=$1" "$N"
++}
++
++append_iw_nai_realm() {
++	[ -n "$1" ] && append bss_conf "nai_realm=$1" "$N"
++}
++
++append_iw_venue_name() {
++	append bss_conf "venue_name=$1" "$N"
++}
++
++append_iw_venue_url() {
++	append bss_conf "venue_url=$1" "$N"
++}
++
++append_hs20_oper_friendly_name() {
++	append bss_conf "hs20_oper_friendly_name=$1" "$N"
++}
++
++append_osu_provider_friendly_name() {
++	append bss_conf "osu_friendly_name=$1" "$N"
++}
++
++append_osu_provider_service_desc() {
++	append bss_conf "osu_service_desc=$1" "$N"
++}
++
++append_hs20_icon() {
++	local width height lang type path
++	config_get width "$1" width
++	config_get height "$1" height
++	config_get lang "$1" lang
++	config_get type "$1" type
++	config_get path "$1" path
++
++	append bss_conf "hs20_icon=$width:$height:$lang:$type:$1:$path" "$N"
++}
++
++append_hs20_icons() {
++	config_load wireless
++	config_foreach append_hs20_icon hs20-icon
++}
++
++append_operator_icon() {
++	append bss_conf "operator_icon=$1" "$N"
++}
++
++append_osu_icon() {
++	append bss_conf "osu_icon=$1" "$N"
++}
++
++append_osu_provider() {
++	local cfgtype osu_server_uri osu_friendly_name osu_nai osu_nai2 osu_method_list
++
++	config_load wireless
++	config_get cfgtype "$1" TYPE
++	[ "$cfgtype" != "osu-provider" ] && return
++
++	append bss_conf "# provider $1" "$N"
++	config_get osu_server_uri "$1" osu_server_uri
++	config_get osu_nai "$1" osu_nai
++	config_get osu_nai2 "$1" osu_nai2
++	config_get osu_method_list "$1" osu_method
++
++	append bss_conf "osu_server_uri=$osu_server_uri" "$N"
++	append bss_conf "osu_nai=$osu_nai" "$N"
++	append bss_conf "osu_nai2=$osu_nai2" "$N"
++	append bss_conf "osu_method_list=$osu_method_list" "$N"
++
++	config_list_foreach "$1" osu_service_desc append_osu_provider_service_desc
++	config_list_foreach "$1" osu_friendly_name append_osu_friendly_name
++	config_list_foreach "$1" osu_icon append_osu_icon
++
++	append bss_conf "$N"
++}
++
++append_hs20_conn_capab() {
++	[ -n "$1" ] && append bss_conf "hs20_conn_capab=$1" "$N"
++}
++
++append_radius_acct_req_attr() {
++	[ -n "$1" ] && append bss_conf "radius_acct_req_attr=$1" "$N"
++}
++
++append_radius_auth_req_attr() {
++	[ -n "$1" ] && append bss_conf "radius_auth_req_attr=$1" "$N"
++}
++
++append_airtime_sta_weight() {
++	[ -n "$1" ] && append bss_conf "airtime_sta_weight=$1" "$N"
++}
++
++append_radius_server() {
++
++	json_get_vars \
++		auth_server auth_secret auth_port \
++		auth_server_secondary auth_secret_secondary auth_port_secondary \
++		dae_client dae_secret dae_port \
++		dynamic_ownip ownip radius_client_addr \
++		eap_reauth_period request_cui \
++		erp_domain mobility_domain \
++		fils_realm fils_dhcp
++
++	set_default dynamic_ownip 1
++
++	# legacy compatibility
++	[ -n "$auth_server" ] || json_get_var auth_server server
++	[ -n "$auth_port" ] || json_get_var auth_port port
++	[ -n "$auth_secret" ] || json_get_var auth_secret key
++
++	[ "$fils" -gt 0 ] && {
++		set_default erp_domain "$mobility_domain"
++		set_default erp_domain "$(echo "$ssid" | md5sum | head -c 8)"
++		set_default fils_realm "$erp_domain"
++
++		append bss_conf "erp_send_reauth_start=1" "$N"
++		append bss_conf "erp_domain=$erp_domain" "$N"
++		append bss_conf "fils_realm=$fils_realm" "$N"
++		append bss_conf "fils_cache_id=$(echo "$fils_realm" | md5sum | head -c 4)" "$N"
++
++		[ "$fils_dhcp" = "*" ] && {
++			json_get_values network network
++			fils_dhcp=
++			for net in $network; do
++				fils_dhcp="$(ifstatus "$net" | jsonfilter -e '@.data.dhcpserver')"
++				[ -n "$fils_dhcp" ] && break
++			done
++
++			[ -z "$fils_dhcp" -a -n "$network_bridge" -a -n "$network_ifname" ] && \
++				fils_dhcp="$(udhcpc -B -n -q -s /lib/netifd/dhcp-get-server.sh -t 1 -i "$network_ifname" 2>/dev/null)"
++		}
++		[ -n "$fils_dhcp" ] && append bss_conf "dhcp_server=$fils_dhcp" "$N"
++	}
++
++	set_default auth_port 1812
++	set_default auth_port_secondary 1812
++	set_default dae_port 3799
++	set_default request_cui 0
++
++	[ "$eap_server" -eq 0 ] && {
++		append bss_conf "auth_server_addr=$auth_server" "$N"
++		append bss_conf "auth_server_port=$auth_port" "$N"
++		append bss_conf "auth_server_shared_secret=$auth_secret" "$N"
++	}
++
++	[ -n "$auth_server_secondary" ] && {
++		append bss_conf "auth_server_addr=$auth_server_secondary" "$N"
++		append bss_conf "auth_server_port=$auth_port_secondary" "$N"
++		[ -n "$auth_secret_secondary" ] && \
++			append bss_conf "auth_server_shared_secret=$auth_secret_secondary" "$N"
++	}
++
++	[ "$request_cui" -gt 0 ] && append bss_conf "radius_request_cui=$request_cui" "$N"
++	[ -n "$eap_reauth_period" ] && append bss_conf "eap_reauth_period=$eap_reauth_period" "$N"
++
++	[ -n "$dae_client" -a -n "$dae_secret" ] && {
++		append bss_conf "radius_das_port=$dae_port" "$N"
++		append bss_conf "radius_das_client=$dae_client $dae_secret" "$N"
++	}
++	json_for_each_item append_radius_auth_req_attr radius_auth_req_attr
++
++	if [ -n "$ownip" ]; then
++		append bss_conf "own_ip_addr=$ownip" "$N"
++	elif [ "$dynamic_ownip" -gt 0 ]; then
++		append bss_conf "dynamic_own_ip_addr=$dynamic_ownip" "$N"
++	fi
++
++	[ -n "$radius_client_addr" ] && append bss_conf "radius_client_addr=$radius_client_addr" "$N"
++	[ "$macfilter" = radius ] && append bss_conf "macaddr_acl=2" "$N"
++}
++
++hostapd_set_bss_options() {
++	local var="$1"
++	local phy="$2"
++	local vif="$3"
++
++	wireless_vif_parse_encryption
++
++	local bss_conf bss_md5sum
++	local wep_rekey wpa_group_rekey wpa_pair_rekey wpa_master_rekey wpa_key_mgmt
++
++	json_get_vars \
++		wep_rekey wpa_group_rekey wpa_pair_rekey wpa_master_rekey wpa_strict_rekey \
++		wpa_disable_eapol_key_retries tdls_prohibit \
++		maxassoc max_inactivity disassoc_low_ack isolate auth_cache \
++		wps_pushbutton wps_label ext_registrar wps_pbc_in_m1 wps_ap_setup_locked \
++		wps_independent wps_device_type wps_device_name wps_manufacturer wps_pin \
++		macfilter ssid utf8_ssid wmm uapsd hidden short_preamble rsn_preauth \
++		iapp_interface eapol_version dynamic_vlan ieee80211w nasid \
++		acct_server acct_secret acct_port acct_interval \
++		acct_server_secondary acct_secret_secondary acct_port_secondary \
++		bss_load_update_period chan_util_avg_period sae_require_mfp sae_pwe \
++		multi_ap multi_ap_backhaul_ssid multi_ap_backhaul_key skip_inactivity_poll \
++		airtime_bss_weight airtime_bss_limit airtime_sta_weight \
++		multicast_to_unicast_all proxy_arp per_sta_vif \
++		eap_server eap_user_file ca_cert server_cert private_key private_key_passwd server_id \
++		vendor_elements fils uci_section dynamic_probe_resp
++
++	set_default fils 0
++	set_default isolate 0
++	set_default maxassoc 0
++	set_default max_inactivity 0
++	set_default short_preamble 1
++	set_default disassoc_low_ack 1
++	set_default skip_inactivity_poll 0
++	set_default hidden 0
++	set_default wmm 1
++	set_default uapsd 1
++	set_default wpa_disable_eapol_key_retries 0
++	set_default tdls_prohibit 0
++	set_default eapol_version $((wpa & 1))
++	set_default acct_port 1813
++	set_default acct_port_secondary 1813
++	set_default bss_load_update_period 60
++	set_default chan_util_avg_period 600
++	set_default utf8_ssid 1
++	set_default multi_ap 0
++	set_default airtime_bss_weight 0
++	set_default airtime_bss_limit 0
++	set_default eap_server 0
++	set_default dynamic_probe_resp 0
++
++	/usr/sbin/hostapd -vfils || fils=0
++
++	append bss_conf "ctrl_interface=/var/run/hostapd"
++	if [ "$isolate" -gt 0 ]; then
++		append bss_conf "ap_isolate=$isolate" "$N"
++	fi
++	if [ "$maxassoc" -gt 0 ]; then
++		append bss_conf "max_num_sta=$maxassoc" "$N"
++	fi
++	if [ "$max_inactivity" -gt 0 ]; then
++		append bss_conf "ap_max_inactivity=$max_inactivity" "$N"
++	fi
++
++	[ "$airtime_bss_weight" -gt 0 ] && append bss_conf "airtime_bss_weight=$airtime_bss_weight" "$N"
++	[ "$airtime_bss_limit" -gt 0 ] && append bss_conf "airtime_bss_limit=$airtime_bss_limit" "$N"
++	json_for_each_item append_airtime_sta_weight airtime_sta_weight
++
++	append bss_conf "bss_load_update_period=$bss_load_update_period" "$N"
++	append bss_conf "chan_util_avg_period=$chan_util_avg_period" "$N"
++	append bss_conf "disassoc_low_ack=$disassoc_low_ack" "$N"
++	append bss_conf "skip_inactivity_poll=$skip_inactivity_poll" "$N"
++	append bss_conf "preamble=$short_preamble" "$N"
++	append bss_conf "wmm_enabled=$wmm" "$N"
++	append bss_conf "ignore_broadcast_ssid=$hidden" "$N"
++	append bss_conf "dynamic_probe_resp=$dynamic_probe_resp" "$N"
++	append bss_conf "uapsd_advertisement_enabled=$uapsd" "$N"
++	append bss_conf "utf8_ssid=$utf8_ssid" "$N"
++	append bss_conf "multi_ap=$multi_ap" "$N"
++	[ -n "$vendor_elements" ] && append bss_conf "vendor_elements=$vendor_elements" "$N"
++
++	[ "$tdls_prohibit" -gt 0 ] && append bss_conf "tdls_prohibit=$tdls_prohibit" "$N"
++
++	[ "$wpa" -gt 0 ] && {
++		[ -n "$wpa_group_rekey"  ] && append bss_conf "wpa_group_rekey=$wpa_group_rekey" "$N"
++		[ -n "$wpa_pair_rekey"   ] && append bss_conf "wpa_ptk_rekey=$wpa_pair_rekey"    "$N"
++		[ -n "$wpa_master_rekey" ] && append bss_conf "wpa_gmk_rekey=$wpa_master_rekey"  "$N"
++		[ -n "$wpa_strict_rekey" ] && append bss_conf "wpa_strict_rekey=$wpa_strict_rekey" "$N"
++	}
++
++	set_default nasid "${macaddr//\:}"
++	append bss_conf "nas_identifier=$nasid" "$N"
++
++	[ -n "$acct_server" ] && {
++		append bss_conf "acct_server_addr=$acct_server" "$N"
++		append bss_conf "acct_server_port=$acct_port" "$N"
++		[ -n "$acct_secret" ] && \
++			append bss_conf "acct_server_shared_secret=$acct_secret" "$N"
++		[ -n "$acct_interval" ] && \
++			append bss_conf "radius_acct_interim_interval=$acct_interval" "$N"
++		json_for_each_item append_radius_acct_req_attr radius_acct_req_attr
++	}
++
++	[ -n "$acct_server_secondary" ] && {
++		append bss_conf "acct_server_addr=$acct_server_secondary" "$N"
++		append bss_conf "acct_server_port=$acct_port_secondary" "$N"
++		[ -n "$acct_secret_secondary" ] && \
++			append bss_conf "acct_server_shared_secret=$acct_secret_secondary" "$N"
++	}
++
++	case "$auth_type" in
++		sae|owe|eap192|eap256)
++			set_default ieee80211w 2
++			set_default sae_require_mfp 1
++		;;
++		psk-sae|psk2-radius|eap-eap256)
++			set_default ieee80211w 1
++			set_default sae_require_mfp 1
++		;;
++	esac
++	[ -n "$sae_require_mfp" ] && append bss_conf "sae_require_mfp=$sae_require_mfp" "$N"
++	[ -n "$sae_pwe" ] && append bss_conf "sae_pwe=$sae_pwe" "$N"
++
++	local vlan_possible=""
++
++	case "$auth_type" in
++		none|owe)
++			json_get_vars owe_transition_bssid owe_transition_ssid owe_transition_ifname
++
++			[ -n "$owe_transition_ssid" ] && append bss_conf "owe_transition_ssid=\"$owe_transition_ssid\"" "$N"
++			[ -n "$owe_transition_bssid" ] && append bss_conf "owe_transition_bssid=$owe_transition_bssid" "$N"
++			[ -n "$owe_transition_ifname" ] && append bss_conf "owe_transition_ifname=$owe_transition_ifname" "$N"
++
++			wps_possible=1
++			# Here we make the assumption that if we're in open mode
++			# with WPS enabled, we got to be in unconfigured state.
++			wps_not_configured=1
++			vlan_possible=1
++			[ "$macfilter" = radius ] && {
++				append_radius_server
++			}
++		;;
++		psk|sae|psk-sae)
++			json_get_vars key wpa_psk_file
++			if [ ${#key} -eq 64 ]; then
++				append bss_conf "wpa_psk=$key" "$N"
++			elif [ ${#key} -ge 8 ] && [ ${#key} -le 63 ]; then
++				append bss_conf "wpa_passphrase=$key" "$N"
++			elif [ -n "$key" ] || [ -z "$wpa_psk_file" ]; then
++				wireless_setup_vif_failed INVALID_WPA_PSK
++				return 1
++			fi
++			[ -z "$wpa_psk_file" ] && set_default wpa_psk_file /var/run/hostapd-$ifname.psk
++			[ -n "$wpa_psk_file" ] && {
++				[ -e "$wpa_psk_file" ] || touch "$wpa_psk_file"
++				append bss_conf "wpa_psk_file=$wpa_psk_file" "$N"
++			}
++			[ "$eapol_version" -ge "1" -a "$eapol_version" -le "2" ] && append bss_conf "eapol_version=$eapol_version" "$N"
++
++			set_default dynamic_vlan 0
++			vlan_possible=1
++			wps_possible=1
++		;;
++		eap|eap192|eap-eap256|eap256)
++			append_radius_server
++			# radius can provide VLAN ID for clients
++			vlan_possible=1
++			append bss_conf "eapol_key_index_workaround=1" "$N"
++			append bss_conf "ieee8021x=1" "$N"
++
++			[ "$eapol_version" -ge "1" -a "$eapol_version" -le "2" ] && append bss_conf "eapol_version=$eapol_version" "$N"
++		;;
++		wep)
++			local wep_keyidx=0
++			json_get_vars key
++			hostapd_append_wep_key bss_conf
++			append bss_conf "wep_default_key=$wep_keyidx" "$N"
++			[ -n "$wep_rekey" ] && append bss_conf "wep_rekey_period=$wep_rekey" "$N"
++		;;
++		psk2-radius)
++			append bss_conf "wpa_psk_radius=3" "$N"
++			append_radius_server
++			vlan_possible=1
++		;;
++	esac
++
++	local auth_algs=$((($auth_mode_shared << 1) | $auth_mode_open))
++	append bss_conf "auth_algs=${auth_algs:-1}" "$N"
++	append bss_conf "wpa=$wpa" "$N"
++	[ -n "$wpa_pairwise" ] && append bss_conf "wpa_pairwise=$wpa_pairwise" "$N"
++
++	set_default wps_pushbutton 0
++	set_default wps_label 0
++	set_default wps_pbc_in_m1 0
++
++	config_methods=
++	[ "$wps_pushbutton" -gt 0 ] && append config_methods push_button
++	[ "$wps_label" -gt 0 ] && append config_methods label
++
++	# WPS not possible on Multi-AP backhaul-only SSID
++	[ "$multi_ap" = 1 ] && wps_possible=
++
++	[ -n "$wps_possible" -a -n "$config_methods" ] && {
++		set_default ext_registrar 0
++		set_default wps_device_type "6-0050F204-1"
++		set_default wps_device_name "OpenWrt AP"
++		set_default wps_manufacturer "www.openwrt.org"
++		set_default wps_independent 1
++
++		wps_state=2
++		[ -n "$wps_not_configured" ] && wps_state=1
++
++		[ "$ext_registrar" -gt 0 -a -n "$network_bridge" ] && append bss_conf "upnp_iface=$network_bridge" "$N"
++
++		append bss_conf "eap_server=1" "$N"
++		[ -n "$wps_pin" ] && append bss_conf "ap_pin=$wps_pin" "$N"
++		append bss_conf "wps_state=$wps_state" "$N"
++		append bss_conf "device_type=$wps_device_type" "$N"
++		append bss_conf "device_name=$wps_device_name" "$N"
++		append bss_conf "manufacturer=$wps_manufacturer" "$N"
++		append bss_conf "config_methods=$config_methods" "$N"
++		append bss_conf "wps_independent=$wps_independent" "$N"
++		[ -n "$wps_ap_setup_locked" ] && append bss_conf "ap_setup_locked=$wps_ap_setup_locked" "$N"
++		[ "$wps_pbc_in_m1" -gt 0 ] && append bss_conf "pbc_in_m1=$wps_pbc_in_m1" "$N"
++		[ "$multi_ap" -gt 0 ] && [ -n "$multi_ap_backhaul_ssid" ] && {
++			append bss_conf "multi_ap_backhaul_ssid=\"$multi_ap_backhaul_ssid\"" "$N"
++			if [ -z "$multi_ap_backhaul_key" ]; then
++				:
++			elif [ ${#multi_ap_backhaul_key} -lt 8 ]; then
++				wireless_setup_vif_failed INVALID_WPA_PSK
++				return 1
++			elif [ ${#multi_ap_backhaul_key} -eq 64 ]; then
++				append bss_conf "multi_ap_backhaul_wpa_psk=$multi_ap_backhaul_key" "$N"
++			else
++				append bss_conf "multi_ap_backhaul_wpa_passphrase=$multi_ap_backhaul_key" "$N"
++			fi
++		}
++	}
++
++	append bss_conf "ssid=$ssid" "$N"
++	[ -n "$network_bridge" ] && append bss_conf "bridge=$network_bridge${N}wds_bridge=" "$N"
++	[ -n "$network_ifname" ] && append bss_conf "snoop_iface=$network_ifname" "$N"
++	[ -n "$iapp_interface" ] && {
++		local ifname
++		network_get_device ifname "$iapp_interface" || ifname="$iapp_interface"
++		append bss_conf "iapp_interface=$ifname" "$N"
++	}
++
++	json_get_vars time_advertisement time_zone wnm_sleep_mode wnm_sleep_mode_no_keys bss_transition
++	set_default bss_transition 0
++	set_default wnm_sleep_mode 0
++	set_default wnm_sleep_mode_no_keys 0
++
++	[ -n "$time_advertisement" ] && append bss_conf "time_advertisement=$time_advertisement" "$N"
++	[ -n "$time_zone" ] && append bss_conf "time_zone=$time_zone" "$N"
++	if [ "$wnm_sleep_mode" -eq "1" ]; then
++		append bss_conf "wnm_sleep_mode=1" "$N"
++		[ "$wnm_sleep_mode_no_keys" -eq "1" ] && append bss_conf "wnm_sleep_mode_no_keys=1" "$N"
++	fi
++	[ "$bss_transition" -eq "1" ] && append bss_conf "bss_transition=1" "$N"
++
++	json_get_vars ieee80211k rrm_neighbor_report rrm_beacon_report
++	set_default ieee80211k 0
++	if [ "$ieee80211k" -eq "1" ]; then
++		set_default rrm_neighbor_report 1
++		set_default rrm_beacon_report 1
++	else
++		set_default rrm_neighbor_report 0
++		set_default rrm_beacon_report 0
++	fi
++
++	[ "$rrm_neighbor_report" -eq "1" ] && append bss_conf "rrm_neighbor_report=1" "$N"
++	[ "$rrm_beacon_report" -eq "1" ] && append bss_conf "rrm_beacon_report=1" "$N"
++
++	json_get_vars ftm_responder stationary_ap lci civic
++	set_default ftm_responder 0
++	if [ "$ftm_responder" -eq "1" ]; then
++		set_default stationary_ap 0
++		iw phy "$phy" info | grep -q "ENABLE_FTM_RESPONDER" && {
++			append bss_conf "ftm_responder=1" "$N"
++			[ "$stationary_ap" -eq "1" ] && append bss_conf "stationary_ap=1" "$N"
++			[ -n "$lci" ] && append bss_conf "lci=$lci" "$N"
++			[ -n "$civic" ] && append bss_conf "civic=$civic" "$N"
++		}
++	fi
++
++	if [ "$wpa" -ge "1" ]; then
++		json_get_vars ieee80211r
++		set_default ieee80211r 0
++
++		if [ "$ieee80211r" -gt "0" ]; then
++			json_get_vars mobility_domain ft_psk_generate_local ft_over_ds reassociation_deadline
++
++			set_default mobility_domain "$(echo "$ssid" | md5sum | head -c 4)"
++			set_default ft_over_ds 1
++			set_default reassociation_deadline 1000
++			skip_kh_setup=0
++
++			case "$auth_type" in
++				psk|psk-sae)
++					set_default ft_psk_generate_local 1
++					skip_kh_setup="$ft_psk_generate_local"
++				;;
++				*)
++					set_default ft_psk_generate_local 0
++				;;
++			esac
++
++			case "$auth_type" in
++				*sae*) skip_kh_setup=0;;
++			esac
++
++			[ -n "$network_ifname" ] && append bss_conf "ft_iface=$network_ifname" "$N"
++			append bss_conf "mobility_domain=$mobility_domain" "$N"
++			append bss_conf "ft_psk_generate_local=$ft_psk_generate_local" "$N"
++			append bss_conf "ft_over_ds=$ft_over_ds" "$N"
++			append bss_conf "reassociation_deadline=$reassociation_deadline" "$N"
++
++			if [ "$skip_kh_setup" -eq "0" ]; then
++				json_get_vars r0_key_lifetime r1_key_holder pmk_r1_push
++				json_get_values r0kh r0kh
++				json_get_values r1kh r1kh
++
++				set_default r0_key_lifetime 10000
++				set_default pmk_r1_push 0
++
++				[ -n "$r0kh" -a -n "$r1kh" ] || {
++					key=`echo -n "$mobility_domain/$auth_secret" | md5sum | awk '{print $1}'`
++
++					set_default r0kh "ff:ff:ff:ff:ff:ff,*,$key"
++					set_default r1kh "00:00:00:00:00:00,00:00:00:00:00:00,$key"
++				}
++
++				[ -n "$r1_key_holder" ] && append bss_conf "r1_key_holder=$r1_key_holder" "$N"
++				append bss_conf "r0_key_lifetime=$r0_key_lifetime" "$N"
++				append bss_conf "pmk_r1_push=$pmk_r1_push" "$N"
++
++				for kh in $r0kh; do
++					append bss_conf "r0kh=${kh//,/ }" "$N"
++				done
++				for kh in $r1kh; do
++					append bss_conf "r1kh=${kh//,/ }" "$N"
++				done
++			fi
++		fi
++		if [ "$fils" -gt 0 ]; then
++			json_get_vars fils_realm
++			set_default fils_realm "$(echo "$ssid" | md5sum | head -c 8)"
++		fi
++
++		append bss_conf "wpa_disable_eapol_key_retries=$wpa_disable_eapol_key_retries" "$N"
++
++		hostapd_append_wpa_key_mgmt
++		[ -n "$wpa_key_mgmt" ] && append bss_conf "wpa_key_mgmt=$wpa_key_mgmt" "$N"
++	fi
++
++	if [ "$wpa" -ge "2" ]; then
++		if [ -n "$network_bridge" -a "$rsn_preauth" = 1 ]; then
++			set_default auth_cache 1
++			append bss_conf "rsn_preauth=1" "$N"
++			append bss_conf "rsn_preauth_interfaces=$network_bridge" "$N"
++		else
++			case "$auth_type" in
++			sae|psk-sae|owe)
++				set_default auth_cache 1
++			;;
++			*)
++				set_default auth_cache 0
++			;;
++			esac
++		fi
++
++		append bss_conf "okc=$auth_cache" "$N"
++		[ "$auth_cache" = 0 -a "$fils" = 0 ] && append bss_conf "disable_pmksa_caching=1" "$N"
++
++		# RSN -> allow management frame protection
++		case "$ieee80211w" in
++			[012])
++				json_get_vars ieee80211w_mgmt_cipher ieee80211w_max_timeout ieee80211w_retry_timeout
++				append bss_conf "ieee80211w=$ieee80211w" "$N"
++				[ "$ieee80211w" -gt "0" ] && {
++					case "$auth_type" in
++					eap192)
++						append bss_conf "group_mgmt_cipher=BIP-GMAC-256" "$N"
++						append bss_conf "group_cipher=GCMP-256" "$N"
++						;;
++					*)
++						append bss_conf "group_mgmt_cipher=${ieee80211w_mgmt_cipher:-AES-128-CMAC}" "$N"
++						;;
++					esac
++
++					[ -n "$ieee80211w_max_timeout" ] && \
++						append bss_conf "assoc_sa_query_max_timeout=$ieee80211w_max_timeout" "$N"
++					[ -n "$ieee80211w_retry_timeout" ] && \
++						append bss_conf "assoc_sa_query_retry_timeout=$ieee80211w_retry_timeout" "$N"
++				}
++			;;
++		esac
++	fi
++
++	_macfile="/var/run/hostapd-$ifname.maclist"
++	case "$macfilter" in
++		allow)
++			append bss_conf "macaddr_acl=1" "$N"
++			append bss_conf "accept_mac_file=$_macfile" "$N"
++			# accept_mac_file can be used to set MAC to VLAN ID mapping
++			vlan_possible=1
++		;;
++		deny)
++			append bss_conf "macaddr_acl=0" "$N"
++			append bss_conf "deny_mac_file=$_macfile" "$N"
++		;;
++		*)
++			_macfile=""
++		;;
++	esac
++
++	[ -n "$_macfile" ] && {
++		json_get_vars macfile
++		json_get_values maclist maclist
++
++		rm -f "$_macfile"
++		(
++			for mac in $maclist; do
++				echo "$mac"
++			done
++			[ -n "$macfile" -a -f "$macfile" ] && cat "$macfile"
++		) > "$_macfile"
++	}
++
++	[ -n "$vlan_possible" -a -n "$dynamic_vlan" ] && {
++		json_get_vars vlan_naming vlan_tagged_interface vlan_bridge vlan_file vlan_no_bridge
++		set_default vlan_naming 1
++		[ -z "$vlan_file" ] && set_default vlan_file /var/run/hostapd-$ifname.vlan
++		append bss_conf "dynamic_vlan=$dynamic_vlan" "$N"
++		append bss_conf "vlan_naming=$vlan_naming" "$N"
++		if [ -n "$vlan_bridge" ]; then
++			append bss_conf "vlan_bridge=$vlan_bridge" "$N"
++		else
++			set_default vlan_no_bridge 1
++		fi
++		append bss_conf "vlan_no_bridge=$vlan_no_bridge" "$N"
++		[ -n "$vlan_tagged_interface" ] && \
++			append bss_conf "vlan_tagged_interface=$vlan_tagged_interface" "$N"
++		[ -n "$vlan_file" ] && {
++			[ -e "$vlan_file" ] || touch "$vlan_file"
++			append bss_conf "vlan_file=$vlan_file" "$N"
++		}
++	}
++
++	json_get_vars iw_enabled iw_internet iw_asra iw_esr iw_uesa iw_access_network_type
++	json_get_vars iw_hessid iw_venue_group iw_venue_type iw_network_auth_type
++	json_get_vars iw_roaming_consortium iw_domain_name iw_anqp_3gpp_cell_net iw_nai_realm
++	json_get_vars iw_anqp_elem iw_qos_map_set iw_ipaddr_type_availability iw_gas_address3
++	json_get_vars iw_venue_name iw_venue_url
++
++	set_default iw_enabled 0
++	if [ "$iw_enabled" = "1" ]; then
++		append bss_conf "interworking=1" "$N"
++		set_default iw_internet 1
++		set_default iw_asra 0
++		set_default iw_esr 0
++		set_default iw_uesa 0
++
++		append bss_conf "internet=$iw_internet" "$N"
++		append bss_conf "asra=$iw_asra" "$N"
++		append bss_conf "esr=$iw_esr" "$N"
++		append bss_conf "uesa=$iw_uesa" "$N"
++
++		[ -n "$iw_access_network_type" ] && \
++			append bss_conf "access_network_type=$iw_access_network_type" "$N"
++		[ -n "$iw_hessid" ] && append bss_conf "hessid=$iw_hessid" "$N"
++		[ -n "$iw_venue_group" ] && \
++			append bss_conf "venue_group=$iw_venue_group" "$N"
++		[ -n "$iw_venue_type" ] && append bss_conf "venue_type=$iw_venue_type" "$N"
++		[ -n "$iw_network_auth_type" ] && \
++			append bss_conf "network_auth_type=$iw_network_auth_type" "$N"
++		[ -n "$iw_gas_address3" ] && append bss_conf "gas_address3=$iw_gas_address3" "$N"
++
++		json_for_each_item append_iw_roaming_consortium iw_roaming_consortium
++		json_for_each_item append_iw_anqp_elem iw_anqp_elem
++		json_for_each_item append_iw_nai_realm iw_nai_realm
++		json_for_each_item append_iw_venue_name iw_venue_name
++		json_for_each_item append_iw_venue_url iw_venue_url
++
++		iw_domain_name_conf=
++		json_for_each_item append_iw_domain_name iw_domain_name
++		[ -n "$iw_domain_name_conf" ] && \
++			append bss_conf "domain_name=$iw_domain_name_conf" "$N"
++
++		iw_anqp_3gpp_cell_net_conf=
++		json_for_each_item append_iw_anqp_3gpp_cell_net iw_anqp_3gpp_cell_net
++		[ -n "$iw_anqp_3gpp_cell_net_conf" ] && \
++			append bss_conf "anqp_3gpp_cell_net=$iw_anqp_3gpp_cell_net_conf" "$N"
++	fi
++
++	set_default iw_qos_map_set 0,0,2,16,1,1,255,255,18,22,24,38,40,40,44,46,48,56
++	case "$iw_qos_map_set" in
++		*,*);;
++		*) iw_qos_map_set="";;
++	esac
++	[ -n "$iw_qos_map_set" ] && append bss_conf "qos_map_set=$iw_qos_map_set" "$N"
++
++	local hs20 disable_dgaf osen anqp_domain_id hs20_deauth_req_timeout \
++		osu_ssid hs20_wan_metrics hs20_operating_class hs20_t_c_filename hs20_t_c_timestamp \
++		hs20_t_c_server_url hs20_release
++	json_get_vars hs20 disable_dgaf osen anqp_domain_id hs20_deauth_req_timeout \
++		osu_ssid hs20_wan_metrics hs20_operating_class hs20_t_c_filename hs20_t_c_timestamp \
++		hs20_t_c_server_url hs20_release
++
++	set_default hs20 0
++	set_default hs20_release  1
++	set_default disable_dgaf $hs20
++	set_default osen 0
++	set_default anqp_domain_id 0
++	set_default hs20_deauth_req_timeout 60
++	if [ "$hs20" = "1" ]; then
++		append bss_conf "hs20=1" "$N"
++		append_hs20_icons
++		append bss_conf "hs20_release=$hs20_release" "$N"
++		append bss_conf "disable_dgaf=$disable_dgaf" "$N"
++		append bss_conf "osen=$osen" "$N"
++		append bss_conf "anqp_domain_id=$anqp_domain_id" "$N"
++		append bss_conf "hs20_deauth_req_timeout=$hs20_deauth_req_timeout" "$N"
++		[ -n "$osu_ssid" ] && append bss_conf "osu_ssid=$osu_ssid" "$N"
++		[ -n "$hs20_wan_metrics" ] && append bss_conf "hs20_wan_metrics=$hs20_wan_metrics" "$N"
++		[ -n "$hs20_operating_class" ] && append bss_conf "hs20_operating_class=$hs20_operating_class" "$N"
++		[ -n "$hs20_t_c_filename" ] && append bss_conf "hs20_t_c_filename=$hs20_t_c_filename" "$N"
++		[ -n "$hs20_t_c_timestamp" ] && append bss_conf "hs20_t_c_timestamp=$hs20_t_c_timestamp" "$N"
++		[ -n "$hs20_t_c_server_url" ] && append bss_conf "hs20_t_c_server_url=$hs20_t_c_server_url" "$N"
++		json_for_each_item append_hs20_oper_friendly_name hs20_oper_friendly_name
++		json_for_each_item append_hs20_conn_capab hs20_conn_capab
++		json_for_each_item append_osu_provider osu_provider
++		json_for_each_item append_operator_icon operator_icon
++	fi
++
++	if [ "$eap_server" = "1" ]; then
++		append bss_conf "eap_server=1" "$N"
++		append bss_conf "eap_server_erp=1" "$N"
++		[ -n "$eap_user_file" ] && append bss_conf "eap_user_file=$eap_user_file" "$N"
++		[ -n "$ca_cert" ] && append bss_conf "ca_cert=$ca_cert" "$N"
++		[ -n "$server_cert" ] && append bss_conf "server_cert=$server_cert" "$N"
++		[ -n "$private_key" ] && append bss_conf "private_key=$private_key" "$N"
++		[ -n "$private_key_passwd" ] && append bss_conf "private_key_passwd=$private_key_passwd" "$N"
++		[ -n "$server_id" ] && append bss_conf "server_id=$server_id" "$N"
++	fi
++
++	set_default multicast_to_unicast_all 0
++	if [ "$multicast_to_unicast_all" -gt 0 ]; then
++		append bss_conf "multicast_to_unicast=$multicast_to_unicast_all" "$N"
++	fi
++	set_default proxy_arp 0
++	if [ "$proxy_arp" -gt 0 ]; then
++		append bss_conf "proxy_arp=$proxy_arp" "$N"
++	fi
++
++	set_default per_sta_vif 0
++	if [ "$per_sta_vif" -gt 0 ]; then
++		append bss_conf "per_sta_vif=$per_sta_vif" "$N"
++	fi
++
++	[ -n "$uci_section" ] && append bss_conf "uci_section=$uci_section" "$N"
++
++	json_get_values opts hostapd_bss_options
++	for val in $opts; do
++		append bss_conf "$val" "$N"
++	done
++
++	append "$var" "$bss_conf" "$N"
++	return 0
++}
++
++hostapd_set_log_options() {
++	local var="$1"
++
++	local log_level log_80211 log_8021x log_radius log_wpa log_driver log_iapp log_mlme
++	json_get_vars log_level log_80211 log_8021x log_radius log_wpa log_driver log_iapp log_mlme
++
++	set_default log_level 2
++	set_default log_80211  1
++	set_default log_8021x  1
++	set_default log_radius 1
++	set_default log_wpa    1
++	set_default log_driver 1
++	set_default log_iapp   1
++	set_default log_mlme   1
++
++	local log_mask=$(( \
++		($log_80211  << 0) | \
++		($log_8021x  << 1) | \
++		($log_radius << 2) | \
++		($log_wpa    << 3) | \
++		($log_driver << 4) | \
++		($log_iapp   << 5) | \
++		($log_mlme   << 6)   \
++	))
++
++	append "$var" "logger_syslog=$log_mask" "$N"
++	append "$var" "logger_syslog_level=$log_level" "$N"
++	append "$var" "logger_stdout=$log_mask" "$N"
++	append "$var" "logger_stdout_level=$log_level" "$N"
++
++	return 0
++}
++
++_wpa_supplicant_common() {
++	local ifname="$1"
++
++	_rpath="/var/run/wpa_supplicant"
++	_config="${_rpath}-$ifname.conf"
++}
++
++wpa_supplicant_teardown_interface() {
++	_wpa_supplicant_common "$1"
++	rm -rf "$_rpath/$1" "$_config"
++}
++
++wpa_supplicant_prepare_interface() {
++	local ifname="$1"
++	_w_driver="$2"
++
++	_wpa_supplicant_common "$1"
++
++	json_get_vars mode wds multi_ap
++
++	[ -n "$network_bridge" ] && {
++		fail=
++		case "$mode" in
++			adhoc)
++				fail=1
++			;;
++			sta)
++				[ "$wds" = 1 -o "$multi_ap" = 1 ] || fail=1
++			;;
++		esac
++
++		[ -n "$fail" ] && {
++			wireless_setup_vif_failed BRIDGE_NOT_ALLOWED
++			return 1
++		}
++	}
++
++	local ap_scan=
++
++	_w_mode="$mode"
++
++	[ "$mode" = adhoc ] && {
++		ap_scan="ap_scan=2"
++	}
++
++	local country_str=
++	[ -n "$country" ] && {
++		country_str="country=$country"
++	}
++
++	multiap_flag_file="${_config}.is_multiap"
++	if [ "$multi_ap" = "1" ]; then
++		touch "$multiap_flag_file"
++	else
++		[ -e "$multiap_flag_file" ] && rm "$multiap_flag_file"
++	fi
++	wpa_supplicant_teardown_interface "$ifname"
++	cat > "$_config" <<EOF
++${scan_list:+freq_list=$scan_list}
++$ap_scan
++$country_str
++EOF
++	return 0
++}
++
++wpa_supplicant_set_fixed_freq() {
++	local freq="$1"
++	local htmode="$2"
++
++	append network_data "fixed_freq=1" "$N$T"
++	append network_data "frequency=$freq" "$N$T"
++	case "$htmode" in
++		NOHT) append network_data "disable_ht=1" "$N$T";;
++		HE20|HT20|VHT20) append network_data "disable_ht40=1" "$N$T";;
++		HT40*|VHT40|VHT80|VHT160|HE40|HE80|HE160) append network_data "ht40=1" "$N$T";;
++	esac
++	case "$htmode" in
++		VHT*) append network_data "vht=1" "$N$T";;
++	esac
++	case "$htmode" in
++		HE80|VHT80) append network_data "max_oper_chwidth=1" "$N$T";;
++		HE160|VHT160) append network_data "max_oper_chwidth=2" "$N$T";;
++		HE20|HE40|VHT20|VHT40) append network_data "max_oper_chwidth=0" "$N$T";;
++		*) append network_data "disable_vht=1" "$N$T";;
++	esac
++}
++
++wpa_supplicant_add_network() {
++	local ifname="$1"
++	local freq="$2"
++	local htmode="$3"
++	local noscan="$4"
++
++	_wpa_supplicant_common "$1"
++	wireless_vif_parse_encryption
++
++	json_get_vars \
++		ssid bssid key \
++		basic_rate mcast_rate \
++		ieee80211w ieee80211r fils \
++		multi_ap \
++		default_disabled
++
++	case "$auth_type" in
++		sae|owe|eap-eap256)
++			set_default ieee80211w 2
++		;;
++		psk-sae|eap192|eap256)
++			set_default ieee80211w 1
++		;;
++	esac
++
++	set_default ieee80211r 0
++	set_default multi_ap 0
++	set_default default_disabled 0
++
++	local key_mgmt='NONE'
++	local network_data=
++	local T="	"
++
++	local scan_ssid="scan_ssid=1"
++	local freq wpa_key_mgmt
++
++	[ "$_w_mode" = "adhoc" ] && {
++		append network_data "mode=1" "$N$T"
++		[ -n "$freq" ] && wpa_supplicant_set_fixed_freq "$freq" "$htmode"
++		[ "$noscan" = "1" ] && append network_data "noscan=1" "$N$T"
++
++		scan_ssid="scan_ssid=0"
++
++		[ "$_w_driver" = "nl80211" ] ||	append wpa_key_mgmt "WPA-NONE"
++	}
++
++	[ "$_w_mode" = "mesh" ] && {
++		json_get_vars mesh_id mesh_fwding mesh_rssi_threshold
++		[ -n "$mesh_id" ] && ssid="${mesh_id}"
++
++		append network_data "mode=5" "$N$T"
++		[ -n "$mesh_fwding" ] && append network_data "mesh_fwding=${mesh_fwding}" "$N$T"
++		[ -n "$mesh_rssi_threshold" ] && append network_data "mesh_rssi_threshold=${mesh_rssi_threshold}" "$N$T"
++		[ -n "$freq" ] && wpa_supplicant_set_fixed_freq "$freq" "$htmode"
++		[ "$noscan" = "1" ] && append network_data "noscan=1" "$N$T"
++		append wpa_key_mgmt "SAE"
++		scan_ssid=""
++	}
++
++	[ "$_w_mode" = "sta" ] && {
++		[ "$multi_ap" = 1 ] && append network_data "multi_ap_backhaul_sta=1" "$N$T"
++		[ "$default_disabled" = 1 ] && append network_data "disabled=1" "$N$T"
++	}
++
++	case "$auth_type" in
++		none) ;;
++		owe)
++			hostapd_append_wpa_key_mgmt
++			key_mgmt="$wpa_key_mgmt"
++		;;
++		wep)
++			local wep_keyidx=0
++			hostapd_append_wep_key network_data
++			append network_data "wep_tx_keyidx=$wep_keyidx" "$N$T"
++		;;
++		wps)
++			key_mgmt='WPS'
++		;;
++		psk|sae|psk-sae)
++			local passphrase
++
++			if [ "$_w_mode" != "mesh" ]; then
++				hostapd_append_wpa_key_mgmt
++			fi
++
++			key_mgmt="$wpa_key_mgmt"
++
++			if [ ${#key} -eq 64 ]; then
++				passphrase="psk=${key}"
++			else
++				if [ "$_w_mode" = "mesh" ]; then
++					passphrase="sae_password=\"${key}\""
++				else
++					passphrase="psk=\"${key}\""
++				fi
++			fi
++			append network_data "$passphrase" "$N$T"
++		;;
++		eap|eap192|eap-eap256|eap256)
++			hostapd_append_wpa_key_mgmt
++			key_mgmt="$wpa_key_mgmt"
++
++			json_get_vars eap_type identity anonymous_identity ca_cert ca_cert_usesystem
++
++			[ "$fils" -gt 0 ] && append network_data "erp=1" "$N$T"
++			if [ "$ca_cert_usesystem" -eq "1" -a -f "/etc/ssl/certs/ca-certificates.crt" ]; then
++				append network_data "ca_cert=\"/etc/ssl/certs/ca-certificates.crt\"" "$N$T"
++			else
++				[ -n "$ca_cert" ] && append network_data "ca_cert=\"$ca_cert\"" "$N$T"
++			fi
++			[ -n "$identity" ] && append network_data "identity=\"$identity\"" "$N$T"
++			[ -n "$anonymous_identity" ] && append network_data "anonymous_identity=\"$anonymous_identity\"" "$N$T"
++			case "$eap_type" in
++				tls)
++					json_get_vars client_cert priv_key priv_key_pwd
++					append network_data "client_cert=\"$client_cert\"" "$N$T"
++					append network_data "private_key=\"$priv_key\"" "$N$T"
++					append network_data "private_key_passwd=\"$priv_key_pwd\"" "$N$T"
++
++					json_get_vars subject_match
++					[ -n "$subject_match" ] && append network_data "subject_match=\"$subject_match\"" "$N$T"
++
++					json_get_values altsubject_match altsubject_match
++					if [ -n "$altsubject_match" ]; then
++						local list=
++						for x in $altsubject_match; do
++							append list "$x" ";"
++						done
++						append network_data "altsubject_match=\"$list\"" "$N$T"
++					fi
++
++					json_get_values domain_match domain_match
++					if [ -n "$domain_match" ]; then
++						local list=
++						for x in $domain_match; do
++							append list "$x" ";"
++						done
++						append network_data "domain_match=\"$list\"" "$N$T"
++					fi
++
++					json_get_values domain_suffix_match domain_suffix_match
++					if [ -n "$domain_suffix_match" ]; then
++						local list=
++						for x in $domain_suffix_match; do
++							append list "$x" ";"
++						done
++						append network_data "domain_suffix_match=\"$list\"" "$N$T"
++					fi
++				;;
++				fast|peap|ttls)
++					json_get_vars auth password ca_cert2 ca_cert2_usesystem client_cert2 priv_key2 priv_key2_pwd
++					set_default auth MSCHAPV2
++
++					if [ "$auth" = "EAP-TLS" ]; then
++						if [ "$ca_cert2_usesystem" -eq "1" -a -f "/etc/ssl/certs/ca-certificates.crt" ]; then
++							append network_data "ca_cert2=\"/etc/ssl/certs/ca-certificates.crt\"" "$N$T"
++						else
++							[ -n "$ca_cert2" ] && append network_data "ca_cert2=\"$ca_cert2\"" "$N$T"
++						fi
++						append network_data "client_cert2=\"$client_cert2\"" "$N$T"
++						append network_data "private_key2=\"$priv_key2\"" "$N$T"
++						append network_data "private_key2_passwd=\"$priv_key2_pwd\"" "$N$T"
++					else
++						append network_data "password=\"$password\"" "$N$T"
++					fi
++
++					json_get_vars subject_match
++					[ -n "$subject_match" ] && append network_data "subject_match=\"$subject_match\"" "$N$T"
++
++					json_get_values altsubject_match altsubject_match
++					if [ -n "$altsubject_match" ]; then
++						local list=
++						for x in $altsubject_match; do
++							append list "$x" ";"
++						done
++						append network_data "altsubject_match=\"$list\"" "$N$T"
++					fi
++
++					json_get_values domain_match domain_match
++					if [ -n "$domain_match" ]; then
++						local list=
++						for x in $domain_match; do
++							append list "$x" ";"
++						done
++						append network_data "domain_match=\"$list\"" "$N$T"
++					fi
++
++					json_get_values domain_suffix_match domain_suffix_match
++					if [ -n "$domain_suffix_match" ]; then
++						local list=
++						for x in $domain_suffix_match; do
++							append list "$x" ";"
++						done
++						append network_data "domain_suffix_match=\"$list\"" "$N$T"
++					fi
++
++					phase2proto="auth="
++					case "$auth" in
++						"auth"*)
++							phase2proto=""
++						;;
++						"EAP-"*)
++							auth="$(echo $auth | cut -b 5- )"
++							[ "$eap_type" = "ttls" ] &&
++								phase2proto="autheap="
++							json_get_vars subject_match2
++							[ -n "$subject_match2" ] && append network_data "subject_match2=\"$subject_match2\"" "$N$T"
++
++							json_get_values altsubject_match2 altsubject_match2
++							if [ -n "$altsubject_match2" ]; then
++								local list=
++								for x in $altsubject_match2; do
++									append list "$x" ";"
++								done
++								append network_data "altsubject_match2=\"$list\"" "$N$T"
++							fi
++
++							json_get_values domain_match2 domain_match2
++							if [ -n "$domain_match2" ]; then
++								local list=
++								for x in $domain_match2; do
++									append list "$x" ";"
++								done
++								append network_data "domain_match2=\"$list\"" "$N$T"
++							fi
++
++							json_get_values domain_suffix_match2 domain_suffix_match2
++							if [ -n "$domain_suffix_match2" ]; then
++								local list=
++								for x in $domain_suffix_match2; do
++									append list "$x" ";"
++								done
++								append network_data "domain_suffix_match2=\"$list\"" "$N$T"
++							fi
++						;;
++					esac
++					append network_data "phase2=\"$phase2proto$auth\"" "$N$T"
++				;;
++			esac
++			append network_data "eap=$(echo $eap_type | tr 'a-z' 'A-Z')" "$N$T"
++		;;
++	esac
++
++	[ "$wpa_cipher" = GCMP ] && {
++		append network_data "pairwise=GCMP" "$N$T"
++		append network_data "group=GCMP" "$N$T"
++	}
++
++	[ "$mode" = mesh ] || {
++		case "$wpa" in
++			1)
++				append network_data "proto=WPA" "$N$T"
++			;;
++			2)
++				append network_data "proto=RSN" "$N$T"
++			;;
++		esac
++
++		case "$ieee80211w" in
++			[012])
++				[ "$wpa" -ge 2 ] && append network_data "ieee80211w=$ieee80211w" "$N$T"
++			;;
++		esac
++	}
++	[ -n "$bssid" ] && append network_data "bssid=$bssid" "$N$T"
++	[ -n "$beacon_int" ] && append network_data "beacon_int=$beacon_int" "$N$T"
++
++	local bssid_blacklist bssid_whitelist
++	json_get_values bssid_blacklist bssid_blacklist
++	json_get_values bssid_whitelist bssid_whitelist
++
++	[ -n "$bssid_blacklist" ] && append network_data "bssid_blacklist=$bssid_blacklist" "$N$T"
++	[ -n "$bssid_whitelist" ] && append network_data "bssid_whitelist=$bssid_whitelist" "$N$T"
++
++	[ -n "$basic_rate" ] && {
++		local br rate_list=
++		for br in $basic_rate; do
++			wpa_supplicant_add_rate rate_list "$br"
++		done
++		[ -n "$rate_list" ] && append network_data "rates=$rate_list" "$N$T"
++	}
++
++	[ -n "$mcast_rate" ] && {
++		local mc_rate=
++		wpa_supplicant_add_rate mc_rate "$mcast_rate"
++		append network_data "mcast_rate=$mc_rate" "$N$T"
++	}
++
++	if [ "$key_mgmt" = "WPS" ]; then
++		echo "wps_cred_processing=1" >> "$_config"
++	else
++		cat >> "$_config" <<EOF
++network={
++	$scan_ssid
++	ssid="$ssid"
++	key_mgmt=$key_mgmt
++	$network_data
++}
++EOF
++	fi
++	return 0
++}
++
++wpa_supplicant_run() {
++	local ifname="$1"
++	local hostapd_ctrl="$2"
++
++	_wpa_supplicant_common "$ifname"
++
++	ubus wait_for wpa_supplicant
++	local supplicant_res="$(ubus call wpa_supplicant config_add "{ \
++		\"driver\": \"${_w_driver:-wext}\", \"ctrl\": \"$_rpath\", \
++		\"iface\": \"$ifname\", \"config\": \"$_config\" \
++		${network_bridge:+, \"bridge\": \"$network_bridge\"} \
++		${hostapd_ctrl:+, \"hostapd_ctrl\": \"$hostapd_ctrl\"} \
++		}")"
++
++	ret="$?"
++
++	[ "$ret" != 0 -o -z "$supplicant_res" ] && wireless_setup_vif_failed WPA_SUPPLICANT_FAILED
++
++	wireless_add_process "$(jsonfilter -s "$supplicant_res" -l 1 -e @.pid)" "/usr/sbin/wpa_supplicant" 1 1
++
++	return $ret
++}
++
++hostapd_common_cleanup() {
++	killall meshd-nl80211
++}
+-- 
+2.34.1
+
diff --git a/patches/0052-mac80211-drop-23.05-version.patch b/patches/0052-mac80211-drop-23.05-version.patch
new file mode 100644
index 000000000..cee2a978b
--- /dev/null
+++ b/patches/0052-mac80211-drop-23.05-version.patch
@@ -0,0 +1,29225 @@
+From 7858898ed5f8ce1bde570c9a5970f975fb03990f Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Mon, 4 Sep 2023 09:07:33 +0200
+Subject: [PATCH 52/55] mac80211: drop 23.05 version
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ package/kernel/mac80211/Makefile              |  397 -----
+ package/kernel/mac80211/ath.mk                |  391 -----
+ package/kernel/mac80211/broadcom.mk           |  491 ------
+ .../files/lib/netifd/wireless/mac80211.sh     | 1321 -----------------
+ .../mac80211/files/lib/wifi/mac80211.sh       |  217 ---
+ .../kernel/mac80211/files/mac80211.hotplug    |    5 -
+ package/kernel/mac80211/intel.mk              |   77 -
+ package/kernel/mac80211/marvell.mk            |   51 -
+ .../patches/ath/070-ath_common_config.patch   |   10 -
+ .../patches/ath/400-ath_move_debug_code.patch |   31 -
+ .../patches/ath/402-ath_regd_optional.patch   |   92 --
+ .../patches/ath/403-world_regd_fixup.patch    |   84 --
+ .../patches/ath/404-regd_no_assoc_hints.patch |   19 -
+ .../patches/ath/405-ath_regd_us.patch         |   26 -
+ .../ath/406-ath_relax_default_regd.patch      |   51 -
+ ...add_platform_eeprom_support_to_ath5k.patch |   56 -
+ .../ath10k/080-ath10k_thermal_config.patch    |   47 -
+ ...21-ath10k_init_devices_synchronously.patch |   33 -
+ .../930-ath10k_add_tpt_led_trigger.patch      |   37 -
+ ...rolling-support-for-various-chipsets.patch |  609 --------
+ ...75-ath10k-use-tpt-trigger-by-default.patch |   53 -
+ ...-power-reduction-for-US-regulatory-d.patch |  101 --
+ ...h10k-Try-to-get-mac-address-from-dts.patch |   37 -
+ .../ath10k/990-ath10k-small-buffers.patch     |   64 -
+ ...-tx-queues-immediately-upon-firmware.patch |   78 -
+ ...-ath11k-Don-t-exit-on-wakeup-failure.patch |   45 -
+ ...-Fix-spelling-mistake-chnange-change.patch |   25 -
+ ...-ath11k-suppress-add-interface-error.patch |   52 -
+ ...support-to-configure-channel-dwell-t.patch |  102 --
+ ...firmware-crash-on-vdev-delete-race-c.patch |  116 --
+ ...monitor-vdev-creation-with-firmware-.patch |   40 -
+ ...qmi_msg_handler-data-structure-initi.patch |   33 -
+ ...hronize-ath11k_mac_he_gi_to_nl80211_.patch |   42 -
+ ...-ath11k-Make-QMI-message-rules-const.patch |  341 -----
+ ...ger-sta-disconnect-on-hardware-resta.patch |  119 --
+ ...race-condition-with-struct-htt_ppdu_.patch |  103 --
+ ...-ath11k-update-hw-params-for-IPQ5018.patch |  125 --
+ ...update-ce-configurations-for-IPQ5018.patch |  246 ---
+ ...-remap-ce-register-space-for-IPQ5018.patch |  351 -----
+ ...11k-update-hal-srng-regs-for-IPQ5018.patch |  130 --
+ ...ath11k-initialize-hw_ops-for-IPQ5018.patch |   90 --
+ ...new-hw-ops-for-IPQ5018-to-get-rx-des.patch |   84 --
+ ...fi-ath11k-add-ipq5018-device-support.patch |   31 -
+ ...scan-request-param-frame-size-warnin.patch |  161 --
+ ...support-to-configure-FTM-responder-r.patch |  169 ---
+ ...-channel-177-into-5-GHz-channel-list.patch |   41 -
+ ...ix-ce-memory-mapping-for-ahb-devices.patch |  114 --
+ ...ext-passive-scan-flag-to-adjust-pass.patch |   73 -
+ ...return-value-check-in-ath11k_ahb_pro.patch |   27 -
+ ...platform_get_irq-to-get-the-interrup.patch |   50 -
+ ...SAC-bug-on-peer-addition-with-sta-ba.patch |   53 -
+ ...low-system-suspend-to-survive-ath11k.patch |   43 -
+ ...fy-accessor-macros-to-match-index-si.patch |   61 -
+ ...-MU-MIMO-params-from-hostapd-to-hard.patch |  300 ----
+ ...-HE-MCS-mapper-to-a-separate-functio.patch |   67 -
+ ...rate-rx-and-tx-mcs-maps-for-supporte.patch |   64 -
+ ...tx-ack-signal-support-for-management.patch |  150 --
+ ...proper-regulatory-reference-for-band.patch |  216 ---
+ ...support-to-parse-new-WMI-event-for-6.patch |  844 -----------
+ ...debug-prints-in-regulatory-WMI-event.patch |  567 -------
+ ...ace-fake-flex-array-with-flexible-ar.patch |  246 ---
+ ...deinitialization-of-firmware-resourc.patch |   79 -
+ ...BUFFER_DONE-read-on-monitor-ring-rx-.patch |  130 --
+ ...wifi-ath11k-Optimize-6-GHz-scan-time.patch |  101 --
+ ...igure-the-FTM-responder-role-using-f.patch |  117 --
+ ...rssi-station-dump-not-updated-in-QCN.patch |  158 --
+ ...invalid-management-rx-frame-length-i.patch |  115 --
+ ...-writing-to-unintended-memory-region.patch |   43 -
+ ...-11d-scan-start-before-WMI_START_SCA.patch |   61 -
+ ...1k-Remove-redundant-pci_clear_master.patch |   58 -
+ ...ble-Spectral-scan-upon-removing-inte.patch |   36 -
+ ...ath11k-enable-SAR-support-on-WCN6750.patch |   29 -
+ ...pci-Add-more-MODULE_FIRMWARE-entries.patch |   36 -
+ ...t-a-warning-when-crypto_alloc_shash-.patch |   34 -
+ ...re-frags-from-uninitialized-peer-in-.patch |  104 --
+ ...-undefined-behavior-with-__fls-in-dp.patch |   29 -
+ ...double-free-of-peer-rx_tid-during-re.patch |  144 --
+ ...wifi-ath11k-Prevent-REO-cmd-failures.patch |   43 -
+ ...peer-mac-information-in-failure-case.patch |   74 -
+ ...tx-status-reporting-in-encap-offload.patch |  119 --
+ ...-incorrect-update-of-radiotap-fields.patch |   49 -
+ ...SKB-corruption-in-REO-destination-ri.patch |   70 -
+ ...emove-disabling-of-80-80-and-160-MHz.patch |   49 -
+ ...registration-of-6Ghz-only-phy-withou.patch |   61 -
+ ...ound-false-positive-stringop-overrea.patch |   84 --
+ ...k-driver-settings-for-MBSSID-and-EMA.patch |  133 --
+ ...ID-configuration-during-vdev-create-.patch |  215 ---
+ ...ame-MBSSID-fields-in-wmi_vdev_up_cmd.patch |   52 -
+ ...ID-parameter-configuration-in-AP-mod.patch |  138 --
+ ...efactor-vif-parameter-configurations.patch |   86 --
+ ...76-wifi-ath11k-MBSSID-beacon-support.patch |  190 ---
+ .../0077-wifi-ath11k-EMA-beacon-support.patch |  156 --
+ ...cate-the-func-ath11k_mac_bitrate_mas.patch |   75 -
+ ...-HT-fixed-rate-in-WMI-peer-fixed-par.patch |  141 --
+ ...support-default-regdb-while-searchin.patch |  127 --
+ ...ve-unused-function-ath11k_tm_event_w.patch |  128 --
+ ...ifi-ath11k-factory-test-mode-support.patch |  850 -----------
+ ...w-ath11k-to-boot-without-caldata-in-.patch |   47 -
+ ...11k-Add-HTT-stats-for-PHY-reset-case.patch |  261 ----
+ ...i-ath11k-use-unique-QRTR-instance-ID.patch |  162 --
+ ...k-control-thermal-support-via-symbol.patch |   66 -
+ ...ci-fix-compilation-in-5.16-and-older.patch |   29 -
+ ...ble-coldboot-calibration-for-IPQ8074.patch |   24 -
+ ...upport-setting-FW-memory-mode-via-DT.patch |   74 -
+ ...tersection-support-for-regulatory-ru.patch |  317 ----
+ .../201-ath5k-WAR-for-AR71xx-PCI-bug.patch    |   38 -
+ .../ath5k/411-ath5k_allow_adhoc_and_ap.patch  |   46 -
+ .../ath5k/420-ath5k_disable_fast_cc.patch     |   18 -
+ .../ath5k/430-add_ath5k_platform.patch        |   33 -
+ .../patches/ath5k/432-ath5k_add_pciids.patch  |   11 -
+ .../ath5k/440-ath5k_channel_bw_debugfs.patch  |  142 --
+ ...w-reset-AHB-WMAC-interface-on-AR91xx.patch |   25 -
+ ..._hw-issue-external-reset-for-QCA955x.patch |  129 --
+ ...h9k-force-rx_clear-when-disabling-rx.patch |   35 -
+ ...erpret-requested-txpower-in-EIRP-dom.patch |   36 -
+ ...power-reduction-for-US-regulatory-do.patch |   24 -
+ .../ath9k/401-ath9k_blink_default.patch       |   11 -
+ .../ath9k/410-ath9k_allow_adhoc_and_ap.patch  |   10 -
+ ...abled-MFP-capability-unconditionally.patch |   34 -
+ .../ath9k/500-ath9k_eeprom_debugfs.patch      |   66 -
+ .../patches/ath9k/501-ath9k_ahb_init.patch    |   34 -
+ .../510-ath9k_intr_mitigation_tweak.patch     |   18 -
+ .../ath9k/511-ath9k_reduce_rxbuf.patch        |   11 -
+ .../ath9k/512-ath9k_channelbw_debugfs.patch   |  125 --
+ .../patches/ath9k/513-ath9k_add_pci_ids.patch |   30 -
+ .../patches/ath9k/530-ath9k_extra_leds.patch  |  267 ----
+ .../ath9k/531-ath9k_extra_platform_leds.patch |   76 -
+ .../ath9k/540-ath9k_reduce_ani_interval.patch |   11 -
+ .../ath9k/542-ath9k_debugfs_diag.patch        |  139 --
+ .../ath9k/543-ath9k_entropy_from_adc.patch    |  186 ---
+ ...544-ath9k-ar933x-usb-hang-workaround.patch |   79 -
+ .../ath9k/545-ath9k_ani_ws_detect.patch       |  155 --
+ .../ath9k/547-ath9k_led_defstate_fix.patch    |   29 -
+ .../ath9k/548-ath9k_enable_gpio_chip.patch    |  251 ----
+ .../ath9k/549-ath9k_enable_gpio_buttons.patch |  143 --
+ .../ath9k/551-ath9k_ubnt_uap_plus_hsr.patch   |  403 -----
+ .../patches/ath9k/552-ath9k-ahb_of.patch      |  331 -----
+ .../ath9k/553-ath9k_of_gpio_mask.patch        |   25 -
+ .../patches/brcm/040-brcmutil_option.patch    |   10 -
+ .../810-b43-gpio-mask-module-option.patch     |   37 -
+ .../patches/brcm/811-b43_no_pio.patch         |   86 --
+ .../brcm/812-b43-add-antenna-control.patch    |  131 --
+ .../813-b43-reduce-number-of-RX-slots.patch   |   11 -
+ .../814-b43-only-use-gpio-0-1-for-led.patch   |   17 -
+ ...815-b43-always-take-overlapping-devs.patch |   11 -
+ ...-remove-extra-regulation-restriction.patch |   27 -
+ ...und-bug-with-some-inconsistent-BSSes.patch |   49 -
+ ...62-brcmfmac-Disable-power-management.patch |   27 -
+ ...-in-driver-tables-with-country-codes.patch |   60 -
+ ...e-internal-roaming-engine-by-default.patch |   23 -
+ ...d-alternative-firmware-names-from-DT.patch |  191 ---
+ .../patches/build/000-fix_kconfig.patch       |   14 -
+ .../patches/build/001-fix_build.patch         |  169 ---
+ .../patches/build/002-change_allconfig.patch  |   64 -
+ .../build/003-remove_bogus_modparams.patch    |   34 -
+ .../build/012-kernel_build_check.patch        |   11 -
+ .../patches/build/050-lib80211_option.patch   |   34 -
+ .../patches/build/060-no_local_ssb_bcma.patch |  314 ----
+ .../build/070-remove-broken-wext-select.patch |   10 -
+ .../patches/build/080-resv_start_op.patch     |   24 -
+ .../mac80211/patches/build/090-bcma-otp.patch |   13 -
+ .../100-backports-drop-QRTR-and-MHI.patch     |   76 -
+ .../build/110-backport_napi_build_skb.patch   |   11 -
+ ...01-wifi-mt7601u-update-firmware-path.patch |   55 -
+ ...700-mwl8k-missing-pci-id-for-WNR854T.patch |   10 -
+ .../801-libertas-configure-sysfs-links.patch  |   21 -
+ .../802-libertas-set-wireless-macaddr.patch   |   11 -
+ ...crease-the-global-limit-up-to-4-SSID.patch |   41 -
+ ...940-mwl8k_init_devices_synchronously.patch |   20 -
+ ...ringified-name-of-command-in-error-l.patch |  189 ---
+ .../patches/rt2x00/100-rt2x00_options.patch   |   47 -
+ ...to-build-rt2800soc-module-for-RT3883.patch |   30 -
+ ...1-rt2x00-introduce-rt2x00_platform_h.patch |   32 -
+ .../602-rt2x00-introduce-rt2x00eeprom.patch   |  296 ----
+ .../603-rt2x00-of_load_eeprom_filename.patch  |   31 -
+ ...om-on-SoC-from-a-mtd-device-defines-.patch |  113 --
+ ...isabling_bands_through_platform_data.patch |   47 -
+ ...07-rt2x00-add_platform_data_mac_addr.patch |   25 -
+ ...00-allow_disabling_bands_through_dts.patch |   19 -
+ ...c-loadable-via-OF-on-rt288x-305x-SoC.patch |   33 -
+ ...0-rt2x00-change-led-polarity-from-OF.patch |   40 -
+ .../611-rt2x00-add-AP+STA-support.patch       |   11 -
+ ...t-support-for-external-LNA-on-MT7620.patch |  161 --
+ ...duce-accessors-for-CHIP_VER-register.patch |  139 --
+ ...-differentiate-based-on-SoC-CHIP_VER.patch |  408 -----
+ .../110-mac80211_keep_keys_on_stop_ap.patch   |   19 -
+ .../120-cfg80211_allow_perm_addr_change.patch |   52 -
+ .../mac80211/patches/subsys/210-ap_scan.patch |   19 -
+ ...domize-BA-session-dialog-token-alloc.patch |   38 -
+ ...-minstrel_ht-fix-MINSTREL_FRAC-macro.patch |   21 -
+ ...l_ht-reduce-fluctuations-in-rate-pro.patch |   30 -
+ ...l_ht-rework-rate-downgrade-code-and-.patch |  151 --
+ ...crease-quantum-for-airtime-scheduler.patch |   53 -
+ ...d-internal-handler-for-wake_tx_queue.patch |  183 ---
+ ...dd-wake_tx_queue-callback-to-drivers.patch |  396 -----
+ ...c80211-Drop-support-for-TX-push-path.patch |  683 ---------
+ ...ltek-remove-duplicated-wake_tx_queue.patch |   32 -
+ ...port-for-restricting-netdev-features.patch |  506 -------
+ ...x-and-simplify-unencrypted-drop-chec.patch |   87 --
+ ...ve-A-MSDU-check-in-ieee80211_data_to.patch |   25 -
+ ...ctor-out-bridge-tunnel-RFC1042-heade.patch |   76 -
+ ...move-mesh-forwarding-congestion-chec.patch |   54 -
+ ...x-receiving-A-MSDU-frames-on-mesh-in.patch |  753 ----------
+ ...d-a-workaround-for-receiving-non-sta.patch |  145 --
+ ...x-race-in-mesh-sequence-number-assig.patch |   37 -
+ ...wifi-mac80211-mesh-fast-xmit-support.patch |  850 -----------
+ ...e-mesh-header-cache-to-speed-up-mesh.patch |  132 --
+ .../321-mac80211-fix-mesh-forwarding.patch    |   32 -
+ ...x-mesh-path-discovery-based-on-unica.patch |   52 -
+ ...d-VHT-MU-MIMO-related-flags-in-ieee8.patch |   68 -
+ ...d-HE-MU-MIMO-related-flags-in-ieee80.patch |   68 -
+ ...troduce-ieee80211_refresh_tx_agg_ses.patch |   60 -
+ ...fi-mac80211-add-mesh-fast-rx-support.patch |   77 -
+ ...d-support-for-letting-drivers-regist.patch |  149 --
+ ...x-receiving-mesh-packets-in-forwardi.patch |   50 -
+ ...orrectly-mark-FTM-frames-non-buffera.patch |  134 --
+ ...mac80211-flush-queues-on-STA-removal.patch |   36 -
+ ...i-mvm-support-flush-on-AP-interfaces.patch |   34 -
+ ...3-wifi-mac80211-add-flush_sta-method.patch |   91 --
+ ...ifi-mvm-support-new-flush_sta-method.patch |   53 -
+ ...d-LDPC-related-flags-in-ieee80211_bs.patch |   62 -
+ ...0211-generate-EMA-beacons-in-AP-mode.patch |  372 -----
+ ...1-always-use-mac80211-loss-detection.patch |   36 -
+ .../patches/subsys/400-allow-ibss-mixed.patch |   40 -
+ .../500-mac80211_configure_antenna_gain.patch |  162 --
+ ...the-dst-buffer-to-of_get_mac_address.patch |   29 -
+ package/kernel/mac80211/ralink.mk             |  131 --
+ package/kernel/mac80211/realtek.mk            |  197 ---
+ .../mac80211/scripts/import-backports.sh      |  109 --
+ 229 files changed, 27381 deletions(-)
+ delete mode 100644 package/kernel/mac80211/Makefile
+ delete mode 100644 package/kernel/mac80211/ath.mk
+ delete mode 100644 package/kernel/mac80211/broadcom.mk
+ delete mode 100644 package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh
+ delete mode 100644 package/kernel/mac80211/files/lib/wifi/mac80211.sh
+ delete mode 100644 package/kernel/mac80211/files/mac80211.hotplug
+ delete mode 100644 package/kernel/mac80211/intel.mk
+ delete mode 100644 package/kernel/mac80211/marvell.mk
+ delete mode 100644 package/kernel/mac80211/patches/ath/070-ath_common_config.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath/400-ath_move_debug_code.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath/402-ath_regd_optional.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath/403-world_regd_fixup.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath/404-regd_no_assoc_hints.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath/405-ath_regd_us.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath/406-ath_relax_default_regd.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath/431-add_platform_eeprom_support_to_ath5k.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath10k/080-ath10k_thermal_config.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath10k/930-ath10k_add_tpt_led_trigger.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath10k/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath10k/975-ath10k-use-tpt-trigger-by-default.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath10k/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath10k/984-ath10k-Try-to-get-mac-address-from-dts.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0001-wifi-ath11k-stop-tx-queues-immediately-upon-firmware.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0002-wifi-ath11k-Don-t-exit-on-wakeup-failure.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0005-wifi-ath11k-Fix-spelling-mistake-chnange-change.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0007-wifi-ath11k-suppress-add-interface-error.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0008-wifi-ath11k-add-support-to-configure-channel-dwell-t.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0010-wifi-ath11k-Fix-firmware-crash-on-vdev-delete-race-c.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0011-wifi-ath11k-fix-monitor-vdev-creation-with-firmware-.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0012-wifi-ath11k-Fix-qmi_msg_handler-data-structure-initi.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0013-wifi-ath11k-synchronize-ath11k_mac_he_gi_to_nl80211_.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0016-wifi-ath11k-Make-QMI-message-rules-const.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0017-wifi-ath11k-Trigger-sta-disconnect-on-hardware-resta.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0018-wifi-ath11k-Fix-race-condition-with-struct-htt_ppdu_.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0019-wifi-ath11k-update-hw-params-for-IPQ5018.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0020-wifi-ath11k-update-ce-configurations-for-IPQ5018.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0021-wifi-ath11k-remap-ce-register-space-for-IPQ5018.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0022-wifi-ath11k-update-hal-srng-regs-for-IPQ5018.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0023-wifi-ath11k-initialize-hw_ops-for-IPQ5018.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0024-wifi-ath11k-add-new-hw-ops-for-IPQ5018-to-get-rx-des.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0025-wifi-ath11k-add-ipq5018-device-support.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0026-wifi-ath11k-Fix-scan-request-param-frame-size-warnin.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0029-wifi-ath11k-Add-support-to-configure-FTM-responder-r.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0030-wifi-ath11k-add-channel-177-into-5-GHz-channel-list.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0031-wifi-ath11k-fix-ce-memory-mapping-for-ahb-devices.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0033-wifi-ath11k-Set-ext-passive-scan-flag-to-adjust-pass.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0034-wifi-ath11k-fix-return-value-check-in-ath11k_ahb_pro.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0035-wifi-ath11k-Use-platform_get_irq-to-get-the-interrup.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0036-wifi-ath11k-fix-SAC-bug-on-peer-addition-with-sta-ba.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0037-wifi-ath11k-allow-system-suspend-to-survive-ath11k.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0038-wifi-ath11k-modify-accessor-macros-to-match-index-si.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0039-wifi-ath11k-push-MU-MIMO-params-from-hostapd-to-hard.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0040-wifi-ath11k-move-HE-MCS-mapper-to-a-separate-functio.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0041-wifi-ath11k-generate-rx-and-tx-mcs-maps-for-supporte.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0042-wifi-ath11k-Add-tx-ack-signal-support-for-management.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0043-wifi-ath11k-use-proper-regulatory-reference-for-band.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0044-wifi-ath11k-add-support-to-parse-new-WMI-event-for-6.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0045-wifi-ath11k-add-debug-prints-in-regulatory-WMI-event.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0046-wifi-ath11k-Replace-fake-flex-array-with-flexible-ar.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0047-wifi-ath11k-fix-deinitialization-of-firmware-resourc.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0048-wifi-ath11k-fix-BUFFER_DONE-read-on-monitor-ring-rx-.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0049-wifi-ath11k-Optimize-6-GHz-scan-time.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0050-wifi-ath11k-Configure-the-FTM-responder-role-using-f.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0051-wifi-ath11k-fix-rssi-station-dump-not-updated-in-QCN.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0052-wifi-ath11k-Fix-invalid-management-rx-frame-length-i.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0053-wifi-ath11k-fix-writing-to-unintended-memory-region.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0054-wifi-ath11k-Send-11d-scan-start-before-WMI_START_SCA.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0055-wifi-ath11k-Remove-redundant-pci_clear_master.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0056-wifi-ath11k-Disable-Spectral-scan-upon-removing-inte.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0057-wifi-ath11k-enable-SAR-support-on-WCN6750.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0058-wifi-ath11k-pci-Add-more-MODULE_FIRMWARE-entries.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0059-wifi-ath11k-print-a-warning-when-crypto_alloc_shash-.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0060-wifi-ath11k-Ignore-frags-from-uninitialized-peer-in-.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0061-wifi-ath11k-fix-undefined-behavior-with-__fls-in-dp.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0062-wifi-ath11k-fix-double-free-of-peer-rx_tid-during-re.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0063-wifi-ath11k-Prevent-REO-cmd-failures.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0064-wifi-ath11k-add-peer-mac-information-in-failure-case.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0065-wifi-ath11k-fix-tx-status-reporting-in-encap-offload.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0066-wifi-ath11k-Fix-incorrect-update-of-radiotap-fields.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0067-wifi-ath11k-Fix-SKB-corruption-in-REO-destination-ri.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0068-wifi-ath11k-Remove-disabling-of-80-80-and-160-MHz.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0069-wifi-ath11k-fix-registration-of-6Ghz-only-phy-withou.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0070-wifi-ath-work-around-false-positive-stringop-overrea.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0071-wifi-ath11k-driver-settings-for-MBSSID-and-EMA.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0072-wifi-ath11k-MBSSID-configuration-during-vdev-create-.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0073-wifi-ath11k-rename-MBSSID-fields-in-wmi_vdev_up_cmd.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0074-wifi-ath11k-MBSSID-parameter-configuration-in-AP-mod.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0075-wifi-ath11k-refactor-vif-parameter-configurations.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0076-wifi-ath11k-MBSSID-beacon-support.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0077-wifi-ath11k-EMA-beacon-support.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0078-wifi-ath11k-Relocate-the-func-ath11k_mac_bitrate_mas.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0079-wifi-ath11k-Send-HT-fixed-rate-in-WMI-peer-fixed-par.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0080-wifi-ath11k-add-support-default-regdb-while-searchin.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0081-wifi-ath11k-remove-unused-function-ath11k_tm_event_w.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0082-wifi-ath11k-factory-test-mode-support.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0083-wifi-ath11k-Allow-ath11k-to-boot-without-caldata-in-.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/0084-wifi-ath11k-Add-HTT-stats-for-PHY-reset-case.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/100-wifi-ath11k-use-unique-QRTR-instance-ID.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/900-ath11k-control-thermal-support-via-symbol.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/901-wifi-ath11k-pci-fix-compilation-in-5.16-and-older.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/902-ath11k-Disable-coldboot-calibration-for-IPQ8074.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/903-ath11k-support-setting-FW-memory-mode-via-DT.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath11k/905-ath11k-remove-intersection-support-for-regulatory-ru.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath5k/201-ath5k-WAR-for-AR71xx-PCI-bug.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath5k/411-ath5k_allow_adhoc_and_ap.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath5k/420-ath5k_disable_fast_cc.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath5k/430-add_ath5k_platform.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath5k/432-ath5k_add_pciids.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath5k/440-ath5k_channel_bw_debugfs.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/350-ath9k_hw-reset-AHB-WMAC-interface-on-AR91xx.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/351-ath9k_hw-issue-external-reset-for-QCA955x.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/354-ath9k-force-rx_clear-when-disabling-rx.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/401-ath9k_blink_default.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/410-ath9k_allow_adhoc_and_ap.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/450-ath9k-enabled-MFP-capability-unconditionally.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/500-ath9k_eeprom_debugfs.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/501-ath9k_ahb_init.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/510-ath9k_intr_mitigation_tweak.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/511-ath9k_reduce_rxbuf.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/513-ath9k_add_pci_ids.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/540-ath9k_reduce_ani_interval.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/544-ath9k-ar933x-usb-hang-workaround.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/545-ath9k_ani_ws_detect.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/547-ath9k_led_defstate_fix.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/551-ath9k_ubnt_uap_plus_hsr.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch
+ delete mode 100644 package/kernel/mac80211/patches/ath9k/553-ath9k_of_gpio_mask.patch
+ delete mode 100644 package/kernel/mac80211/patches/brcm/040-brcmutil_option.patch
+ delete mode 100644 package/kernel/mac80211/patches/brcm/810-b43-gpio-mask-module-option.patch
+ delete mode 100644 package/kernel/mac80211/patches/brcm/811-b43_no_pio.patch
+ delete mode 100644 package/kernel/mac80211/patches/brcm/812-b43-add-antenna-control.patch
+ delete mode 100644 package/kernel/mac80211/patches/brcm/813-b43-reduce-number-of-RX-slots.patch
+ delete mode 100644 package/kernel/mac80211/patches/brcm/814-b43-only-use-gpio-0-1-for-led.patch
+ delete mode 100644 package/kernel/mac80211/patches/brcm/815-b43-always-take-overlapping-devs.patch
+ delete mode 100644 package/kernel/mac80211/patches/brcm/850-brcmsmac-remove-extra-regulation-restriction.patch
+ delete mode 100644 package/kernel/mac80211/patches/brcm/861-brcmfmac-workaround-bug-with-some-inconsistent-BSSes.patch
+ delete mode 100644 package/kernel/mac80211/patches/brcm/862-brcmfmac-Disable-power-management.patch
+ delete mode 100644 package/kernel/mac80211/patches/brcm/863-brcmfmac-add-in-driver-tables-with-country-codes.patch
+ delete mode 100644 package/kernel/mac80211/patches/brcm/864-brcmfmac-do-not-use-internal-roaming-engine-by-default.patch
+ delete mode 100644 package/kernel/mac80211/patches/brcm/865-brcmfmac-Read-alternative-firmware-names-from-DT.patch
+ delete mode 100644 package/kernel/mac80211/patches/build/000-fix_kconfig.patch
+ delete mode 100644 package/kernel/mac80211/patches/build/001-fix_build.patch
+ delete mode 100644 package/kernel/mac80211/patches/build/002-change_allconfig.patch
+ delete mode 100644 package/kernel/mac80211/patches/build/003-remove_bogus_modparams.patch
+ delete mode 100644 package/kernel/mac80211/patches/build/012-kernel_build_check.patch
+ delete mode 100644 package/kernel/mac80211/patches/build/050-lib80211_option.patch
+ delete mode 100644 package/kernel/mac80211/patches/build/060-no_local_ssb_bcma.patch
+ delete mode 100644 package/kernel/mac80211/patches/build/070-remove-broken-wext-select.patch
+ delete mode 100644 package/kernel/mac80211/patches/build/080-resv_start_op.patch
+ delete mode 100644 package/kernel/mac80211/patches/build/090-bcma-otp.patch
+ delete mode 100644 package/kernel/mac80211/patches/build/100-backports-drop-QRTR-and-MHI.patch
+ delete mode 100644 package/kernel/mac80211/patches/build/110-backport_napi_build_skb.patch
+ delete mode 100644 package/kernel/mac80211/patches/mt7601u/001-wifi-mt7601u-update-firmware-path.patch
+ delete mode 100644 package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch
+ delete mode 100644 package/kernel/mac80211/patches/mwl/801-libertas-configure-sysfs-links.patch
+ delete mode 100644 package/kernel/mac80211/patches/mwl/802-libertas-set-wireless-macaddr.patch
+ delete mode 100644 package/kernel/mac80211/patches/mwl/900-mwifiex-increase-the-global-limit-up-to-4-SSID.patch
+ delete mode 100644 package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch
+ delete mode 100644 package/kernel/mac80211/patches/mwl/950-mwifiex-Print-stringified-name-of-command-in-error-l.patch
+ delete mode 100644 package/kernel/mac80211/patches/rt2x00/100-rt2x00_options.patch
+ delete mode 100644 package/kernel/mac80211/patches/rt2x00/501-rt2x00-allow-to-build-rt2800soc-module-for-RT3883.patch
+ delete mode 100644 package/kernel/mac80211/patches/rt2x00/601-rt2x00-introduce-rt2x00_platform_h.patch
+ delete mode 100644 package/kernel/mac80211/patches/rt2x00/602-rt2x00-introduce-rt2x00eeprom.patch
+ delete mode 100644 package/kernel/mac80211/patches/rt2x00/603-rt2x00-of_load_eeprom_filename.patch
+ delete mode 100644 package/kernel/mac80211/patches/rt2x00/604-rt2x00-load-eeprom-on-SoC-from-a-mtd-device-defines-.patch
+ delete mode 100644 package/kernel/mac80211/patches/rt2x00/606-rt2x00-allow_disabling_bands_through_platform_data.patch
+ delete mode 100644 package/kernel/mac80211/patches/rt2x00/607-rt2x00-add_platform_data_mac_addr.patch
+ delete mode 100644 package/kernel/mac80211/patches/rt2x00/608-rt2x00-allow_disabling_bands_through_dts.patch
+ delete mode 100644 package/kernel/mac80211/patches/rt2x00/609-rt2x00-make-wmac-loadable-via-OF-on-rt288x-305x-SoC.patch
+ delete mode 100644 package/kernel/mac80211/patches/rt2x00/610-rt2x00-change-led-polarity-from-OF.patch
+ delete mode 100644 package/kernel/mac80211/patches/rt2x00/611-rt2x00-add-AP+STA-support.patch
+ delete mode 100644 package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
+ delete mode 100644 package/kernel/mac80211/patches/rt2x00/995-rt2x00-mt7620-introduce-accessors-for-CHIP_VER-register.patch
+ delete mode 100644 package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/110-mac80211_keep_keys_on_stop_ap.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/120-cfg80211_allow_perm_addr_change.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/210-ap_scan.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/301-mac80211-sta-randomize-BA-session-dialog-token-alloc.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/302-mac80211-minstrel_ht-fix-MINSTREL_FRAC-macro.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/303-mac80211-minstrel_ht-reduce-fluctuations-in-rate-pro.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/304-mac80211-minstrel_ht-rework-rate-downgrade-code-and-.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/305-mac80211-increase-quantum-for-airtime-scheduler.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/306-01-v6.2-wifi-mac80211-add-internal-handler-for-wake_tx_queue.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/306-02-v6.2-wifi-mac80211-add-wake_tx_queue-callback-to-drivers.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/306-03-v6.2-wifi-mac80211-Drop-support-for-TX-push-path.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/306-04-v6.2-wifi-realtek-remove-duplicated-wake_tx_queue.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/310-v6.2-mac80211-add-support-for-restricting-netdev-features.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/311-v6.2-wifi-mac80211-fix-and-simplify-unencrypted-drop-chec.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/312-v6.3-wifi-cfg80211-move-A-MSDU-check-in-ieee80211_data_to.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/313-v6.3-wifi-cfg80211-factor-out-bridge-tunnel-RFC1042-heade.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/314-v6.3-wifi-mac80211-remove-mesh-forwarding-congestion-chec.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/315-v6.3-wifi-mac80211-fix-receiving-A-MSDU-frames-on-mesh-in.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/316-v6.3-wifi-mac80211-add-a-workaround-for-receiving-non-sta.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/318-wifi-mac80211-fix-race-in-mesh-sequence-number-assig.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/319-wifi-mac80211-mesh-fast-xmit-support.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/320-wifi-mac80211-use-mesh-header-cache-to-speed-up-mesh.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/321-mac80211-fix-mesh-forwarding.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/322-wifi-mac80211-fix-mesh-path-discovery-based-on-unica.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/323-v6.3-wifi-mac80211-Add-VHT-MU-MIMO-related-flags-in-ieee8.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/324-v6.3-wifi-mac80211-Add-HE-MU-MIMO-related-flags-in-ieee80.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/325-wifi-mac80211-introduce-ieee80211_refresh_tx_agg_ses.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/326-wifi-mac80211-add-mesh-fast-rx-support.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/327-wifi-mac80211-add-support-for-letting-drivers-regist.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/329-wifi-mac80211-fix-receiving-mesh-packets-in-forwardi.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/330-wifi-ieee80211-correctly-mark-FTM-frames-non-buffera.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/331-wifi-mac80211-flush-queues-on-STA-removal.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/332-wifi-iwlwifi-mvm-support-flush-on-AP-interfaces.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/333-wifi-mac80211-add-flush_sta-method.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/334-wifi-iwlwifi-mvm-support-new-flush_sta-method.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/335-wifi-mac80211-add-LDPC-related-flags-in-ieee80211_bs.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/336-v6.4-wifi-mac80211-generate-EMA-beacons-in-AP-mode.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/340-mac80211-always-use-mac80211-loss-detection.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/400-allow-ibss-mixed.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/500-mac80211_configure_antenna_gain.patch
+ delete mode 100644 package/kernel/mac80211/patches/subsys/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch
+ delete mode 100644 package/kernel/mac80211/ralink.mk
+ delete mode 100644 package/kernel/mac80211/realtek.mk
+ delete mode 100755 package/kernel/mac80211/scripts/import-backports.sh
+
+diff --git a/package/kernel/mac80211/Makefile b/package/kernel/mac80211/Makefile
+deleted file mode 100644
+index 248b48c3c1..0000000000
+--- a/package/kernel/mac80211/Makefile
++++ /dev/null
+@@ -1,397 +0,0 @@
+-#
+-# Copyright (C) 2007-2015 OpenWrt.org
+-#
+-# This is free software, licensed under the GNU General Public License v2.
+-# See /LICENSE for more information.
+-#
+-
+-include $(TOPDIR)/rules.mk
+-include $(INCLUDE_DIR)/kernel.mk
+-
+-PKG_NAME:=mac80211
+-
+-PKG_VERSION:=6.1.24
+-PKG_RELEASE:=3
+-# PKG_SOURCE_URL:=@KERNEL/linux/kernel/projects/backports/stable/v5.15.58/
+-PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources/
+-PKG_HASH:=5d39aca7e34c33cb9b3e366117b2e86841b7bdd37933679d6b1e61be6b150648
+-
+-PKG_SOURCE:=backports-$(PKG_VERSION).tar.xz
+-PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/backports-$(PKG_VERSION)
+-PKG_BUILD_PARALLEL:=1
+-
+-PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
+-
+-PKG_DRIVERS = \
+-	mac80211-hwsim \
+-	mt7601u \
+-	rsi91x rsi91x-usb rsi91x-sdio\
+-	wlcore wl12xx wl18xx
+-
+-PKG_CONFIG_DEPENDS:= \
+-	CONFIG_PACKAGE_kmod-mac80211 \
+-	CONFIG_PACKAGE_CFG80211_TESTMODE \
+-	CONFIG_PACKAGE_MAC80211_DEBUGFS \
+-	CONFIG_PACKAGE_MAC80211_MESH \
+-	CONFIG_PACKAGE_MAC80211_TRACING \
+-	CONFIG_PACKAGE_IWLWIFI_DEBUG \
+-	CONFIG_PACKAGE_IWLWIFI_DEBUGFS \
+-	CONFIG_PACKAGE_RTLWIFI_DEBUG \
+-
+-include $(INCLUDE_DIR)/package.mk
+-
+-WMENU:=Wireless Drivers
+-
+-define KernelPackage/mac80211/Default
+-  SUBMENU:=$(WMENU)
+-  URL:=https://wireless.wiki.kernel.org/
+-  MAINTAINER:=Felix Fietkau <nbd@nbd.name>
+-endef
+-
+-config_package=$(if $(CONFIG_PACKAGE_kmod-$(1)),m)
+-
+-config-y:= \
+-	WLAN \
+-	CFG80211_CERTIFICATION_ONUS \
+-	MAC80211_RC_MINSTREL \
+-	MAC80211_RC_MINSTREL_HT \
+-	MAC80211_RC_MINSTREL_VHT \
+-	MAC80211_RC_DEFAULT_MINSTREL \
+-	WLAN_VENDOR_ADMTEK \
+-	WLAN_VENDOR_ATH \
+-	WLAN_VENDOR_ATMEL \
+-	WLAN_VENDOR_BROADCOM \
+-	WLAN_VENDOR_CISCO \
+-	WLAN_VENDOR_INTEL \
+-	WLAN_VENDOR_INTERSIL \
+-	WLAN_VENDOR_MARVELL \
+-	WLAN_VENDOR_MEDIATEK \
+-	WLAN_VENDOR_RALINK \
+-	WLAN_VENDOR_REALTEK \
+-	WLAN_VENDOR_RSI \
+-	WLAN_VENDOR_ST \
+-	WLAN_VENDOR_TI \
+-	WLAN_VENDOR_ZYDAS \
+-
+-config-$(call config_package,cfg80211) += CFG80211
+-config-$(CONFIG_PACKAGE_CFG80211_TESTMODE) += NL80211_TESTMODE
+-
+-config-$(call config_package,mac80211) += MAC80211
+-config-$(CONFIG_PACKAGE_MAC80211_MESH) += MAC80211_MESH
+-
+-include ath.mk
+-include broadcom.mk
+-include intel.mk
+-include marvell.mk
+-include ralink.mk
+-include realtek.mk
+-
+-PKG_CONFIG_DEPENDS += \
+-	$(patsubst %,CONFIG_PACKAGE_kmod-%,$(PKG_DRIVERS))
+-
+-define KernelPackage/cfg80211
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=cfg80211 - wireless configuration API
+-  DEPENDS+= +iw +iwinfo +wireless-regdb +USE_RFKILL:kmod-rfkill
+-  ABI_VERSION:=$(PKG_VERSION)-$(PKG_RELEASE)
+-  FILES:= \
+-	$(PKG_BUILD_DIR)/compat/compat.ko \
+-	$(PKG_BUILD_DIR)/net/wireless/cfg80211.ko
+-endef
+-
+-define KernelPackage/cfg80211/description
+-cfg80211 is the Linux wireless LAN (802.11) configuration API.
+-endef
+-
+-define KernelPackage/cfg80211/config
+-  if PACKAGE_kmod-cfg80211
+-
+-	config PACKAGE_CFG80211_TESTMODE
+-		bool "Enable testmode command support"
+-		default n
+-		help
+-		  This is typically used for tests and calibration during
+-		  manufacturing, or vendor specific debugging features
+-
+-  endif
+-endef
+-
+-
+-define KernelPackage/mac80211
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Linux 802.11 Wireless Networking Stack
+-  # +kmod-crypto-cmac is a runtime only dependency of net/mac80211/aes_cmac.c
+-  DEPENDS+= +kmod-cfg80211 +kmod-crypto-cmac +kmod-crypto-ccm +kmod-crypto-gcm +hostapd-common
+-  KCONFIG:=\
+-	CONFIG_AVERAGE=y
+-  FILES:= $(PKG_BUILD_DIR)/net/mac80211/mac80211.ko
+-  ABI_VERSION:=$(PKG_VERSION)-$(PKG_RELEASE)
+-  MENU:=1
+-endef
+-
+-define KernelPackage/mac80211/config
+-  if PACKAGE_kmod-mac80211
+-
+-	config PACKAGE_MAC80211_DEBUGFS
+-		bool "Export mac80211 internals in DebugFS"
+-		select KERNEL_DEBUG_FS
+-		default y
+-		help
+-		  Select this to see extensive information about
+-		  the internal state of mac80211 in debugfs.
+-
+-	config PACKAGE_MAC80211_TRACING
+-		bool "Enable tracing (mac80211 and supported drivers)"
+-		select KERNEL_FTRACE
+-		select KERNEL_ENABLE_DEFAULT_TRACERS
+-		default n
+-		help
+-		  Select this to enable tracing of mac80211 and
+-		  related wifi drivers (using trace-cmd).
+-
+-	config PACKAGE_MAC80211_MESH
+-		bool "Enable 802.11s mesh support"
+-		default y
+-
+-  endif
+-endef
+-
+-define KernelPackage/mac80211/description
+-Generic IEEE 802.11 Networking Stack (mac80211)
+-endef
+-
+-define KernelPackage/mac80211-hwsim
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=mac80211 HW simulation device
+-  DEPENDS+= +kmod-mac80211 +@DRIVER_11AX_SUPPORT +@DRIVER_11AC_SUPPORT
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/mac80211_hwsim.ko
+-  AUTOLOAD:=$(call AutoProbe,mac80211_hwsim)
+-endef
+-
+-
+-define KernelPackage/mt7601u
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=MT7601U-based USB dongles Wireless Driver
+-  DEPENDS+= +kmod-mac80211 @USB_SUPPORT +kmod-usb-core +mt7601u-firmware
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/mediatek/mt7601u/mt7601u.ko
+-  AUTOLOAD:=$(call AutoProbe,mt7601u)
+-endef
+-
+-define KernelPackage/rsi91x
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Redpine Signals Inc 91x WLAN driver support
+-  DEPENDS+= +kmod-mac80211 +rs9113-firmware
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/rsi/rsi_91x.ko
+-endef
+-
+-define KernelPackage/rsi91x-usb
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Redpine Signals USB bus support
+-  DEPENDS+=@USB_SUPPORT +kmod-usb-core +kmod-mac80211 +kmod-rsi91x +rs9113-firmware
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/rsi/rsi_usb.ko
+-  AUTOLOAD:=$(call AutoProbe,rsi_usb)
+-endef
+-
+-define KernelPackage/rsi91x-sdio
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Redpine Signals SDIO bus support
+-  DEPENDS+= +kmod-mac80211 +kmod-mmc +kmod-rsi91x +rs9113-firmware
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/rsi/rsi_sdio.ko
+-  AUTOLOAD:=$(call AutoProbe,rsi_sdio)
+-endef
+-
+-
+-define KernelPackage/wlcore
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=TI common driver part
+-  DEPENDS+= +kmod-mmc +kmod-mac80211
+-  FILES:= \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/ti/wlcore/wlcore.ko \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/ti/wlcore/wlcore_sdio.ko
+-  AUTOLOAD:=$(call AutoProbe,wlcore wlcore_sdio)
+-endef
+-
+-define KernelPackage/wlcore/description
+- This module contains some common parts needed by TI Wireless drivers.
+-endef
+-
+-define KernelPackage/wl12xx
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Driver for TI WL12xx
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/wl12xx
+-  DEPENDS+= +kmod-wlcore +wl12xx-firmware
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ti/wl12xx/wl12xx.ko
+-  AUTOLOAD:=$(call AutoProbe,wl12xx)
+-endef
+-
+-define KernelPackage/wl12xx/description
+- Kernel modules for TI WL12xx
+-endef
+-
+-define KernelPackage/wl18xx
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Driver for TI WL18xx
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/wl18xx
+-  DEPENDS+= +kmod-wlcore +wl18xx-firmware
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ti/wl18xx/wl18xx.ko
+-  AUTOLOAD:=$(call AutoProbe,wl18xx)
+-endef
+-
+-define KernelPackage/wl18xx/description
+- Kernel modules for TI WL18xx
+-endef
+-
+-
+-ifdef CONFIG_PACKAGE_MAC80211_DEBUGFS
+-  config-y += \
+-	CFG80211_DEBUGFS \
+-	MAC80211_DEBUGFS
+-endif
+-
+-ifdef CONFIG_PACKAGE_MAC80211_TRACING
+-  config-y += \
+-	IWLWIFI_DEVICE_TRACING
+-endif
+-
+-config-$(call config_package,mac80211-hwsim) += MAC80211_HWSIM
+-config-$(call config_package,mt7601u) += MT7601U
+-config-y += WL_MEDIATEK
+-
+-config-$(call config_package,wlcore) += WLCORE WLCORE_SDIO
+-config-$(call config_package,wl12xx) += WL12XX
+-config-$(call config_package,wl18xx) += WL18XX
+-config-y += WL_TI WILINK_PLATFORM_DATA
+-config-$(call config_package,rsi91x) += RSI_91X
+-config-$(call config_package,rsi91x-usb) += RSI_USB
+-config-$(call config_package,rsi91x-sdio) += RSI_SDIO
+-
+-config-$(CONFIG_LEDS_TRIGGERS) += MAC80211_LEDS
+-
+-C_DEFINES=
+-
+-ifeq ($(BUILD_VARIANT),smallbuffers)
+-	C_DEFINES+= -DCONFIG_ATH10K_SMALLBUFFERS
+-endif
+-
+-MAKE_OPTS:= \
+-	$(subst -C $(LINUX_DIR),-C "$(PKG_BUILD_DIR)",$(KERNEL_MAKEOPTS)) \
+-	EXTRA_CFLAGS="-I$(PKG_BUILD_DIR)/include $(IREMAP_CFLAGS) $(C_DEFINES)" \
+-	KLIB_BUILD="$(LINUX_DIR)" \
+-	MODPROBE=true \
+-	KLIB=$(TARGET_MODULES_DIR) \
+-	KERNEL_SUBLEVEL=$(lastword $(subst ., ,$(KERNEL_PATCHVER))) \
+-	KBUILD_LDFLAGS_MODULE_PREREQ=
+-
+-define ConfigVars
+-$(subst $(space),,$(foreach opt,$(config-$(1)),CPTCFG_$(opt)=$(1)
+-))
+-endef
+-
+-define mac80211_config
+-$(call ConfigVars,m)$(call ConfigVars,y)
+-endef
+-$(eval $(call shexport,mac80211_config))
+-
+-define Build/Prepare
+-	rm -rf $(PKG_BUILD_DIR)
+-	mkdir -p $(PKG_BUILD_DIR)
+-	$(PKG_UNPACK)
+-	$(Build/Patch)
+-	rm -rf \
+-		$(PKG_BUILD_DIR)/include/linux/ssb \
+-		$(PKG_BUILD_DIR)/include/linux/bcma \
+-		$(PKG_BUILD_DIR)/include/net/bluetooth
+-
+-	rm -f \
+-		$(PKG_BUILD_DIR)/include/linux/cordic.h \
+-		$(PKG_BUILD_DIR)/include/linux/crc8.h \
+-		$(PKG_BUILD_DIR)/include/linux/eeprom_93cx6.h \
+-		$(PKG_BUILD_DIR)/include/linux/wl12xx.h \
+-		$(PKG_BUILD_DIR)/include/linux/mhi.h \
+-		$(PKG_BUILD_DIR)/include/net/ieee80211.h \
+-		$(PKG_BUILD_DIR)/backport-include/linux/bcm47xx_nvram.h
+-
+-	echo 'compat-wireless-$(PKG_VERSION)-$(PKG_RELEASE)-$(REVISION)' > $(PKG_BUILD_DIR)/compat_version
+-endef
+-
+-ifneq ($(CONFIG_PACKAGE_kmod-cfg80211),)
+- define Build/Compile/kmod
+-	rm -rf $(PKG_BUILD_DIR)/modules
+-	+$(MAKE) $(PKG_JOBS) $(MAKE_OPTS) modules
+- endef
+-endif
+-
+-#do not Build/Configure for EXTERNAL KERNEL
+-ifeq ($(strip $(CONFIG_EXTERNAL_KERNEL_TREE)),"")
+-  ifeq ($(strip $(CONFIG_KERNEL_GIT_CLONE_URI)),"")
+-    define Build/Configure
+-	  cmp $(PKG_BUILD_DIR)/include/linux/ath9k_platform.h $(LINUX_DIR)/include/linux/ath9k_platform.h
+-	  cmp $(PKG_BUILD_DIR)/include/linux/ath5k_platform.h $(LINUX_DIR)/include/linux/ath5k_platform.h
+-	  cmp $(PKG_BUILD_DIR)/include/linux/rt2x00_platform.h $(LINUX_DIR)/include/linux/rt2x00_platform.h
+-    endef
+-  endif
+-endif
+-
+-define Build/Patch
+-	$(if $(QUILT),rm -rf $(PKG_BUILD_DIR)/patches; mkdir -p $(PKG_BUILD_DIR)/patches)
+-	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/build,build/)
+-	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/subsys,subsys/)
+-	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath,ath/)
+-	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath5k,ath5k/)
+-	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath9k,ath9k/)
+-	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath10k,ath10k/)
+-	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath11k,ath11k/)
+-	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/rt2x00,rt2x00/)
+-	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/mt7601u,mt7601u/)
+-	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/mwl,mwl/)
+-	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/brcm,brcm/)
+-	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/rtl,rtl/)
+-	$(if $(QUILT),touch $(PKG_BUILD_DIR)/.quilt_used)
+-endef
+-
+-define Quilt/Refresh/Package
+-	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/build,build/)
+-	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/subsys,subsys/)
+-	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath,ath/)
+-	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath5k,ath5k/)
+-	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath9k,ath9k/)
+-	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath10k,ath10k/)
+-	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath11k,ath11k/)
+-	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/rt2x00,rt2x00/)
+-	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/mt7601u,mt7601u/)
+-	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/mwl,mwl/)
+-	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/brcm,brcm/)
+-	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/rtl,rtl/)
+-endef
+-
+-define Build/Compile
+-	$(SH_FUNC) var2file "$(call shvar,mac80211_config)" $(PKG_BUILD_DIR)/.config
+-	$(MAKE) $(MAKE_OPTS) allnoconfig
+-	$(call Build/Compile/kmod)
+-endef
+-
+-define Build/InstallDev
+-	mkdir -p \
+-		$(1)/usr/include/mac80211 \
+-		$(1)/usr/include/mac80211-backport \
+-		$(1)/usr/include/mac80211/ath \
+-		$(1)/usr/include/net/mac80211
+-	$(CP) $(PKG_BUILD_DIR)/net/mac80211/*.h $(PKG_BUILD_DIR)/include/* $(1)/usr/include/mac80211/
+-	$(CP) $(PKG_BUILD_DIR)/backport-include/* $(1)/usr/include/mac80211-backport/
+-	$(CP) $(PKG_BUILD_DIR)/net/mac80211/rate.h $(1)/usr/include/net/mac80211/
+-	$(CP) $(PKG_BUILD_DIR)/drivers/net/wireless/ath/*.h $(1)/usr/include/mac80211/ath/
+-	rm -f $(1)/usr/include/mac80211-backport/linux/module.h
+-endef
+-
+-
+-define KernelPackage/cfg80211/install
+-	$(INSTALL_DIR) $(1)/lib/wifi $(1)/lib/netifd/wireless
+-	$(INSTALL_DATA) ./files/lib/wifi/mac80211.sh $(1)/lib/wifi
+-	$(INSTALL_BIN) ./files/lib/netifd/wireless/mac80211.sh $(1)/lib/netifd/wireless
+-	$(INSTALL_DIR) $(1)/etc/hotplug.d/ieee80211
+-	$(INSTALL_DATA) ./files/mac80211.hotplug $(1)/etc/hotplug.d/ieee80211/10-wifi-detect
+-endef
+-
+-$(eval $(foreach drv,$(PKG_DRIVERS),$(call KernelPackage,$(drv))))
+-$(eval $(call KernelPackage,cfg80211))
+-$(eval $(call KernelPackage,mac80211))
+diff --git a/package/kernel/mac80211/ath.mk b/package/kernel/mac80211/ath.mk
+deleted file mode 100644
+index dc08df4f6f..0000000000
+--- a/package/kernel/mac80211/ath.mk
++++ /dev/null
+@@ -1,391 +0,0 @@
+-PKG_DRIVERS += \
+-	ath ath5k ath6kl ath6kl-sdio ath6kl-usb ath9k ath9k-common ath9k-htc ath10k ath10k-smallbuffers \
+-	ath11k ath11k-ahb ath11k-pci carl9170 owl-loader ar5523 wil6210
+-
+-PKG_CONFIG_DEPENDS += \
+-	CONFIG_PACKAGE_ATH_DEBUG \
+-	CONFIG_PACKAGE_ATH_DFS \
+-	CONFIG_PACKAGE_ATH_SPECTRAL \
+-	CONFIG_PACKAGE_ATH_DYNACK \
+-	CONFIG_ATH9K_HWRNG \
+-	CONFIG_ATH9K_SUPPORT_PCOEM \
+-	CONFIG_ATH9K_TX99 \
+-	CONFIG_ATH10K_LEDS \
+-	CONFIG_ATH10K_THERMAL \
+-	CONFIG_ATH11K_THERMAL \
+-	CONFIG_ATH_USER_REGD
+-
+-ifdef CONFIG_PACKAGE_MAC80211_DEBUGFS
+-  config-y += \
+-	ATH9K_DEBUGFS \
+-	ATH9K_HTC_DEBUGFS \
+-	ATH10K_DEBUGFS \
+-	ATH11K_DEBUGFS \
+-	CARL9170_DEBUGFS \
+-	ATH5K_DEBUG \
+-	ATH6KL_DEBUG \
+-	WIL6210_DEBUGFS
+-endif
+-
+-ifdef CONFIG_PACKAGE_MAC80211_TRACING
+-  config-y += \
+-	ATH10K_TRACING \
+-	ATH11K_TRACING \
+-	ATH6KL_TRACING \
+-	ATH_TRACEPOINTS \
+-	ATH5K_TRACER \
+-	WIL6210_TRACING
+-endif
+-
+-config-$(call config_package,ath) += ATH_CARDS ATH_COMMON
+-config-$(CONFIG_PACKAGE_ATH_DEBUG) += ATH_DEBUG ATH10K_DEBUG ATH11K_DEBUG ATH9K_STATION_STATISTICS
+-config-$(CONFIG_PACKAGE_ATH_DFS) += ATH9K_DFS_CERTIFIED ATH10K_DFS_CERTIFIED
+-config-$(CONFIG_PACKAGE_ATH_SPECTRAL) += ATH9K_COMMON_SPECTRAL ATH10K_SPECTRAL ATH11K_SPECTRAL
+-config-$(CONFIG_PACKAGE_ATH_DYNACK) += ATH9K_DYNACK
+-config-$(call config_package,ath9k) += ATH9K
+-config-$(call config_package,ath9k-common) += ATH9K_COMMON
+-config-$(call config_package,owl-loader) += ATH9K_PCI_NO_EEPROM
+-config-$(CONFIG_TARGET_ath79) += ATH9K_AHB
+-config-$(CONFIG_TARGET_ipq40xx) += ATH10K_AHB
+-config-$(CONFIG_PCI) += ATH9K_PCI
+-config-$(CONFIG_ATH_USER_REGD) += ATH_USER_REGD ATH_REG_DYNAMIC_USER_REG_HINTS
+-config-$(CONFIG_ATH9K_HWRNG) += ATH9K_HWRNG
+-config-$(CONFIG_ATH9K_SUPPORT_PCOEM) += ATH9K_PCOEM
+-config-$(CONFIG_ATH9K_TX99) += ATH9K_TX99
+-config-$(CONFIG_ATH9K_UBNTHSR) += ATH9K_UBNTHSR
+-config-$(CONFIG_ATH10K_LEDS) += ATH10K_LEDS
+-config-$(CONFIG_ATH10K_THERMAL) += ATH10K_THERMAL
+-config-$(CONFIG_ATH11K_THERMAL) += ATH11K_THERMAL
+-
+-config-$(call config_package,ath9k-htc) += ATH9K_HTC
+-config-$(call config_package,ath10k) += ATH10K ATH10K_PCI
+-config-$(call config_package,ath10k-smallbuffers) += ATH10K ATH10K_PCI ATH10K_SMALLBUFFERS
+-config-$(call config_package,ath11k) += ATH11K
+-config-$(call config_package,ath11k-ahb) += ATH11K_AHB
+-config-$(call config_package,ath11k-pci) += ATH11K_PCI
+-
+-config-$(call config_package,ath5k) += ATH5K
+-ifdef CONFIG_TARGET_ath25
+-  config-y += ATH5K_AHB
+-else
+-  config-y += ATH5K_PCI
+-endif
+-
+-config-$(call config_package,ath6kl) += ATH6KL
+-config-$(call config_package,ath6kl-sdio) += ATH6KL_SDIO
+-config-$(call config_package,ath6kl-usb) += ATH6KL_USB
+-
+-config-$(call config_package,carl9170) += CARL9170
+-config-$(call config_package,ar5523) += AR5523
+-
+-config-$(call config_package,wil6210) += WIL6210
+-
+-define KernelPackage/ath/config
+-  if PACKAGE_kmod-ath
+-	config ATH_USER_REGD
+-		bool "Force Atheros drivers to respect the user's regdomain settings"
+-		default y
+-		help
+-		  Atheros' idea of regulatory handling is that the EEPROM of the card defines
+-		  the regulatory limits and the user is only allowed to restrict the settings
+-		  even further, even if the country allows frequencies or power levels that
+-		  are forbidden by the EEPROM settings.
+-
+-		  Select this option if you want the driver to respect the user's decision about
+-		  regulatory settings.
+-
+-	config PACKAGE_ATH_DEBUG
+-		bool "Atheros wireless debugging"
+-		help
+-		  Say Y, if you want to debug atheros wireless drivers.
+-		  Only ath9k & ath10k make use of this.
+-
+-	config PACKAGE_ATH_DFS
+-		bool "Enable DFS support"
+-		default y
+-		help
+-		  Dynamic frequency selection (DFS) is required for most of the 5 GHz band
+-		  channels in Europe, US, and Japan.
+-
+-		  Select this option if you want to use such channels.
+-
+-	config PACKAGE_ATH_SPECTRAL
+-		bool "Atheros spectral scan support"
+-		depends on PACKAGE_ATH_DEBUG
+-		select KERNEL_RELAY
+-		help
+-		  Say Y to enable access to the FFT/spectral data via debugfs.
+-
+-	config PACKAGE_ATH_DYNACK
+-		bool "Enable Dynack support"
+-		depends on PACKAGE_kmod-ath9k-common
+-		help
+-		  Enables support for Dynamic ACK estimation, which allows the fastest possible speed
+-		  at any distance automatically by increasing/decreasing the max frame ACK time for
+-		  the most remote station detected.  It can be enabled by using iw (iw phy0 set distance auto),
+-		  or by sending the NL80211_ATTR_WIPHY_DYN_ACK flag to mac80211 driver using netlink.
+-
+-		  Select this option if you want to enable this feature
+-
+-  endif
+-endef
+-
+-define KernelPackage/ath
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Atheros common driver part
+-  DEPENDS+= @PCI_SUPPORT||USB_SUPPORT||TARGET_ath79||TARGET_ath25 +kmod-mac80211
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath.ko
+-  MENU:=1
+-endef
+-
+-define KernelPackage/ath/description
+- This module contains some common parts needed by Atheros Wireless drivers.
+-endef
+-
+-define KernelPackage/ath5k
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Atheros 5xxx wireless cards support
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath5k
+-  DEPENDS+= @(PCI_SUPPORT||TARGET_ath25) +kmod-ath
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath5k/ath5k.ko
+-  AUTOLOAD:=$(call AutoProbe,ath5k)
+-endef
+-
+-define KernelPackage/ath5k/description
+- This module adds support for wireless adapters based on
+- Atheros 5xxx chipset.
+-endef
+-
+-define KernelPackage/ath6kl
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Atheros FullMAC wireless devices (common code for ath6kl_sdio and ath6kl_usb)
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath6kl
+-  HIDDEN:=1
+-  DEPENDS+= +kmod-ath
+-  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath6kl/ath6kl_core.ko
+-endef
+-
+-define KernelPackage/ath6kl-sdio
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Atheros 802.11n SDIO wireless cards support
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath6kl
+-  DEPENDS+= +kmod-mmc +kmod-ath6kl
+-  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath6kl/ath6kl_sdio.ko
+-  AUTOLOAD:=$(call AutoProbe,ath6kl_sdio)
+-endef
+-
+-define KernelPackage/ath6kl-sdio/description
+-This module adds support for wireless adapters based on
+-Atheros IEEE 802.11n AR6003 and AR6004 family of chipsets.
+-endef
+-
+-define KernelPackage/ath6kl-usb
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Atheros 802.11n USB wireless cards support
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath6kl
+-  DEPENDS+= @USB_SUPPORT +kmod-usb-core +kmod-ath6kl
+-  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath6kl/ath6kl_usb.ko
+-  AUTOLOAD:=$(call AutoProbe,ath6kl_usb)
+-endef
+-
+-define KernelPackage/ath6kl-usb/description
+-This module adds support for wireless adapters based on the
+-Atheros IEEE 802.11n AR6004 chipset.
+-endef
+-
+-define KernelPackage/ath9k-common
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Atheros 802.11n wireless devices (common code for ath9k and ath9k_htc)
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath9k
+-  HIDDEN:=1
+-  DEPENDS+= @PCI_SUPPORT||USB_SUPPORT||TARGET_ath79 +kmod-ath +kmod-random-core
+-  FILES:= \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath9k/ath9k_common.ko \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath9k/ath9k_hw.ko
+-endef
+-
+-define KernelPackage/ath9k
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Atheros 802.11n PCI wireless cards support
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath9k
+-  DEPENDS+= @PCI_SUPPORT||TARGET_ath79 +kmod-ath9k-common
+-  FILES:= \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath9k/ath9k.ko
+-  AUTOLOAD:=$(call AutoProbe,ath9k)
+-endef
+-
+-define KernelPackage/ath9k/description
+-This module adds support for wireless adapters based on
+-Atheros IEEE 802.11n AR5008 and AR9001 family of chipsets.
+-endef
+-
+-define KernelPackage/ath9k/config
+-
+-	config ATH9K_HWRNG
+-		bool "Add wireless noise as source of randomness to kernel entropy pool"
+-		depends on PACKAGE_kmod-ath9k
+-		select PACKAGE_kmod-random-core
+-		default y
+-
+-	config ATH9K_SUPPORT_PCOEM
+-		bool "Support chips used in PC OEM cards"
+-		depends on PACKAGE_kmod-ath9k
+-		default y if (x86_64 || i386)
+-
+-       config ATH9K_TX99
+-               bool "Enable TX99 support (WARNING: testing only, breaks normal operation!)"
+-               depends on PACKAGE_kmod-ath9k
+-
+-	config ATH9K_UBNTHSR
+-		bool "Support for Ubiquiti UniFi Outdoor+ access point"
+-		depends on PACKAGE_kmod-ath9k && TARGET_ath79
+-		default y
+-
+-endef
+-
+-define KernelPackage/ath9k-htc
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Atheros 802.11n USB device support
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath9k
+-  DEPENDS+= @USB_SUPPORT +kmod-ath9k-common +kmod-usb-core +ath9k-htc-firmware
+-  FILES:= \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath9k/ath9k_htc.ko
+-  AUTOLOAD:=$(call AutoProbe,ath9k_htc)
+-endef
+-
+-define KernelPackage/ath9k-htc/description
+-This module adds support for wireless adapters based on
+-Atheros USB AR9271 and AR7010 family of chipsets.
+-endef
+-
+-define KernelPackage/ath10k
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Atheros 802.11ac wireless cards support
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath10k
+-  DEPENDS+= @PCI_SUPPORT +kmod-ath +@DRIVER_11AC_SUPPORT \
+-	+ATH10K_THERMAL:kmod-hwmon-core +ATH10K_THERMAL:kmod-thermal
+-  FILES:= \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath10k/ath10k_core.ko \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath10k/ath10k_pci.ko
+-  AUTOLOAD:=$(call AutoProbe,ath10k_core ath10k_pci)
+-  MODPARAMS.ath10k_core:=frame_mode=2
+-  VARIANT:=regular
+-endef
+-
+-define KernelPackage/ath10k/description
+-This module adds support for wireless adapters based on
+-Atheros IEEE 802.11ac family of chipsets. For now only
+-PCI is supported.
+-endef
+-
+-define KernelPackage/ath10k/config
+-
+-       config ATH10K_LEDS
+-               bool "Enable LED support"
+-               default y
+-               depends on PACKAGE_kmod-ath10k || PACKAGE_kmod-ath10k-smallbuffers
+-
+-       config ATH10K_THERMAL
+-               bool "Enable thermal sensors and throttling support"
+-               depends on PACKAGE_kmod-ath10k || PACKAGE_kmod-ath10k-smallbuffers
+-
+-endef
+-
+-define KernelPackage/ath10k-smallbuffers
+-  $(call KernelPackage/ath10k)
+-  TITLE+= (small buffers for low-RAM devices)
+-  VARIANT:=smallbuffers
+-endef
+-
+-define KernelPackage/ath11k
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Qualcomm 802.11ax wireless chipset support (common code)
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath11k
+-  DEPENDS+= +kmod-ath +@DRIVER_11AC_SUPPORT +@DRIVER_11AX_SUPPORT \
+-  +kmod-crypto-michael-mic +ATH11K_THERMAL:kmod-hwmon-core +ATH11K_THERMAL:kmod-thermal
+-  FILES:=$(PKG_BUILD_DIR)/drivers/soc/qcom/qmi_helpers.ko \
+-  $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath11k/ath11k.ko
+-endef
+-
+-define KernelPackage/ath11k/description
+-This module adds support for Qualcomm Technologies 802.11ax family of
+-chipsets.
+-endef
+-
+-define KernelPackage/ath11k/config
+-
+-       config ATH11K_THERMAL
+-               bool "Enable thermal sensors and throttling support"
+-               depends on PACKAGE_kmod-ath11k
+-               default y if TARGET_ipq807x
+-
+-endef
+-
+-define KernelPackage/ath11k-ahb
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Qualcomm 802.11ax AHB wireless chipset support
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath11k
+-  DEPENDS+= @TARGET_ipq807x +kmod-ath11k +kmod-qrtr-smd
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath11k/ath11k_ahb.ko
+-  AUTOLOAD:=$(call AutoProbe,ath11k_ahb)
+-endef
+-
+-define KernelPackage/ath11k-ahb/description
+-This module adds support for Qualcomm Technologies 802.11ax family of
+-chipsets with AHB bus.
+-endef
+-
+-define KernelPackage/ath11k-pci
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Qualcomm 802.11ax PCI wireless chipset support
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath11k
+-  DEPENDS+= @PCI_SUPPORT +kmod-qrtr-mhi +kmod-ath11k
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath11k/ath11k_pci.ko
+-  AUTOLOAD:=$(call AutoProbe,ath11k_pci)
+-endef
+-
+-define KernelPackage/ath11k-pci/description
+-This module adds support for Qualcomm Technologies 802.11ax family of
+-chipsets with PCI bus.
+-endef
+-
+-define KernelPackage/carl9170
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Driver for Atheros AR9170 USB sticks
+-  DEPENDS:=@USB_SUPPORT +kmod-mac80211 +kmod-ath +kmod-usb-core +kmod-input-core +carl9170-firmware
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/carl9170/carl9170.ko
+-  AUTOLOAD:=$(call AutoProbe,carl9170)
+-endef
+-
+-define KernelPackage/owl-loader
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Owl loader for initializing Atheros PCI(e) Wifi chips
+-  DEPENDS:=@PCI_SUPPORT +kmod-ath9k
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath9k/ath9k_pci_owl_loader.ko
+-  AUTOLOAD:=$(call AutoProbe,ath9k_pci_owl_loader)
+-endef
+-
+-define KernelPackage/owl-loader/description
+-  Kernel module that helps to initialize certain Qualcomm
+-  Atheros' PCI(e) Wifi chips, which have the init data
+-  (which contains the PCI device ID for example) stored
+-  together with the calibration data in the file system.
+-
+-  This is necessary for devices like the Cisco Meraki Z1.
+-endef
+-
+-define KernelPackage/ar5523
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Driver for Atheros AR5523 USB sticks
+-  DEPENDS:=@USB_SUPPORT +kmod-mac80211 +kmod-ath +kmod-usb-core +kmod-input-core
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ar5523/ar5523.ko
+-  AUTOLOAD:=$(call AutoProbe,ar5523)
+-endef
+-
+-define KernelPackage/wil6210
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=QCA/Wilocity 60g WiFi card wil6210 support
+-  DEPENDS+= @PCI_SUPPORT +kmod-mac80211 +wil6210-firmware
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/wil6210/wil6210.ko
+-  AUTOLOAD:=$(call AutoProbe,wil6210)
+-endef
+diff --git a/package/kernel/mac80211/broadcom.mk b/package/kernel/mac80211/broadcom.mk
+deleted file mode 100644
+index cf80ad2d32..0000000000
+--- a/package/kernel/mac80211/broadcom.mk
++++ /dev/null
+@@ -1,491 +0,0 @@
+-PKG_DRIVERS += \
+-	b43 brcmsmac brcmfmac brcmutil
+-
+-PKG_CONFIG_DEPENDS += \
+-	CONFIG_PACKAGE_B43_DEBUG \
+-	CONFIG_PACKAGE_B43_PIO \
+-	CONFIG_PACKAGE_B43_PHY_G \
+-	CONFIG_PACKAGE_B43_PHY_N \
+-	CONFIG_PACKAGE_B43_PHY_LP \
+-	CONFIG_PACKAGE_B43_PHY_HT \
+-	CONFIG_PACKAGE_B43_BUSES_BCMA_AND_SSB \
+-	CONFIG_PACKAGE_B43_BUSES_BCMA \
+-	CONFIG_PACKAGE_B43_BUSES_SSB \
+-	CONFIG_PACKAGE_BRCM80211_DEBUG
+-
+-config-$(call config_package,b43) += B43
+-config-$(CONFIG_PACKAGE_B43_BUSES_BCMA_AND_SSB) += B43_BUSES_BCMA_AND_SSB
+-config-$(CONFIG_PACKAGE_B43_BUSES_BCMA) += B43_BUSES_BCMA
+-config-$(CONFIG_PACKAGE_B43_BUSES_SSB) += B43_BUSES_SSB
+-config-$(CONFIG_PACKAGE_B43_PHY_G) += B43_PHY_G
+-config-$(CONFIG_PACKAGE_B43_PHY_N) += B43_PHY_N
+-config-$(CONFIG_PACKAGE_B43_PHY_LP) += B43_PHY_LP
+-config-$(CONFIG_PACKAGE_B43_PHY_HT) += B43_PHY_HT
+-config-$(CONFIG_PACKAGE_B43_PIO) += B43_PIO
+-config-$(CONFIG_PACKAGE_B43_DEBUG) += B43_DEBUG
+-
+-config-$(call config_package,brcmutil) += BRCMUTIL
+-config-$(call config_package,brcmsmac) += BRCMSMAC
+-config-$(call config_package,brcmfmac) += BRCMFMAC
+-config-$(CONFIG_BRCMFMAC_SDIO) += BRCMFMAC_SDIO
+-config-$(CONFIG_BRCMFMAC_USB) += BRCMFMAC_USB
+-config-$(CONFIG_BRCMFMAC_PCIE) += BRCMFMAC_PCIE
+-config-$(CONFIG_PACKAGE_BRCM80211_DEBUG) += BRCMDBG
+-
+-config-$(CONFIG_LEDS_TRIGGERS) += B43_LEDS B43LEGACY_LEDS
+-
+-#Broadcom firmware
+-ifneq ($(CONFIG_B43_FW_6_30),)
+-  PKG_B43_FWV4_NAME:=broadcom-wl
+-  PKG_B43_FWV4_VERSION:=6.30.163.46
+-  PKG_B43_FWV4_OBJECT:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION).wl_apsta.o
+-  PKG_B43_FWV4_SOURCE:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION).tar.bz2
+-  PKG_B43_FWV4_SOURCE_URL:=http://www.lwfinger.com/b43-firmware/
+-  PKG_B43_FWV4_HASH:=a07c3b6b277833c7dbe61daa511f908cd66c5e2763eb7a0859abc36cd9335c2d
+-else
+-ifneq ($(CONFIG_B43_FW_5_10),)
+-  PKG_B43_FWV4_NAME:=broadcom-wl
+-  PKG_B43_FWV4_VERSION:=5.10.56.27.3
+-  PKG_B43_FWV4_OBJECT:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION)/driver/wl_apsta/wl_prebuilt.o
+-  PKG_B43_FWV4_SOURCE:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION)_mipsel.tar.bz2
+-  PKG_B43_FWV4_SOURCE_URL:=@OPENWRT
+-  PKG_B43_FWV4_HASH:=26a8c370f48fc129d0731cfd751c36cae1419b0bc8ca35781126744e60eae009
+-else
+-ifneq ($(CONFIG_B43_FW_4_178),)
+-  PKG_B43_FWV4_NAME:=broadcom-wl
+-  PKG_B43_FWV4_VERSION:=4.178.10.4
+-  PKG_B43_FWV4_OBJECT:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION)/linux/wl_apsta.o
+-  PKG_B43_FWV4_SOURCE:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION).tar.bz2
+-  PKG_B43_FWV4_SOURCE_URL:=@OPENWRT
+-  PKG_B43_FWV4_HASH:=32f6ad98facbb9045646fdc8b54bb03086d204153253f9c65d0234a5d90ae53f
+-else
+-ifneq ($(CONFIG_B43_FW_5_100_138),)
+-  PKG_B43_FWV4_NAME:=broadcom-wl
+-  PKG_B43_FWV4_VERSION:=5.100.138
+-  PKG_B43_FWV4_OBJECT:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION)/linux/wl_apsta.o
+-  PKG_B43_FWV4_SOURCE:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION).tar.bz2
+-  PKG_B43_FWV4_SOURCE_URL:=http://www.lwfinger.com/b43-firmware/
+-  PKG_B43_FWV4_HASH:=f1e7067aac5b62b67b8b6e4c517990277804339ac16065eb13c731ff909ae46f
+-else
+-  PKG_B43_FWV4_NAME:=broadcom-wl
+-  PKG_B43_FWV4_VERSION:=4.150.10.5
+-  PKG_B43_FWV4_OBJECT:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION)/driver/wl_apsta_mimo.o
+-  PKG_B43_FWV4_SOURCE:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION).tar.bz2
+-  PKG_B43_FWV4_SOURCE_URL:=@OPENWRT
+-  PKG_B43_FWV4_HASH:=a9f4e276a4d8d3a1cd0f2eb87080ae89b77f0a7140f06d4e9e2135fc44fdd533
+-endif
+-endif
+-endif
+-endif
+-ifneq ($(CONFIG_B43_OPENFIRMWARE),)
+-  PKG_B43_FWV4_NAME:=broadcom-wl
+-  PKG_B43_FWV4_VERSION:=5.2
+-  PKG_B43_FWV4_OBJECT:=openfwwf-$(PKG_B43_FWV4_VERSION)
+-  PKG_B43_FWV4_SOURCE:=openfwwf-$(PKG_B43_FWV4_VERSION).tar.gz
+-  PKG_B43_FWV4_SOURCE_URL:=http://netweb.ing.unibs.it/~openfwwf/firmware
+-  PKG_B43_FWV4_HASH:=9de03320083201080b2e94b81637ac07a159cf4e6f3481383e1a217e627bc0dc
+-endif
+-
+-
+-define Download/b43
+-  FILE:=$(PKG_B43_FWV4_SOURCE)
+-  URL:=$(PKG_B43_FWV4_SOURCE_URL)
+-  HASH:=$(PKG_B43_FWV4_HASH)
+-endef
+-$(eval $(call Download,b43))
+-
+-define KernelPackage/b43
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Broadcom 43xx wireless support
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/b43
+-  KCONFIG:= \
+-  	CONFIG_HW_RANDOM=y
+-  # Depend on PCI_SUPPORT to make sure we can select kmod-bcma or kmod-ssb
+-  DEPENDS += \
+-	@PCI_SUPPORT +kmod-mac80211 +kmod-lib-cordic \
+-	$(if $(CONFIG_PACKAGE_B43_USE_SSB),+kmod-ssb) \
+-	$(if $(CONFIG_PACKAGE_B43_USE_BCMA),+kmod-bcma)
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/broadcom/b43/b43.ko
+-  AUTOLOAD:=$(call AutoProbe,b43)
+-  MENU:=1
+-endef
+-
+-define KernelPackage/b43/config
+-
+-config PACKAGE_B43_USE_SSB
+-	select PACKAGE_kmod-ssb
+-	tristate
+-	depends on !TARGET_bcm47xx && !TARGET_bcm63xx
+-	default PACKAGE_kmod-b43 if PACKAGE_B43_BUSES_BCMA_AND_SSB
+-	default PACKAGE_kmod-b43 if PACKAGE_B43_BUSES_SSB
+-
+-config PACKAGE_B43_USE_BCMA
+-	select PACKAGE_kmod-bcma
+-	tristate
+-	depends on !TARGET_bcm47xx && !TARGET_bcm53xx
+-	default PACKAGE_kmod-b43 if PACKAGE_B43_BUSES_BCMA_AND_SSB
+-	default PACKAGE_kmod-b43 if PACKAGE_B43_BUSES_BCMA
+-
+-  if PACKAGE_kmod-b43
+-
+-	choice
+-		prompt "b43 firmware version"
+-		default B43_FW_5_100_138
+-		help
+-		  This option allows you to select the version of the b43 firmware.
+-
+-	config B43_FW_4_150
+-		bool "Firmware 410.2160 from driver 4.150.10.5 (old stable)"
+-		help
+-		  Old stable firmware for BCM43xx devices.
+-
+-		  If unsure, select this.
+-
+-	config B43_FW_4_178
+-		bool "Firmware 478.104 from driver 4.178.10.4"
+-		help
+-		  Older firmware for BCM43xx devices.
+-
+-		  If unsure, select the "stable" firmware.
+-
+-	config B43_FW_5_10
+-		bool "Firmware 508.1084 from driver 5.10.56.27"
+-		help
+-		  Older firmware for BCM43xx devices.
+-
+-		  If unsure, select the "stable" firmware.
+-
+-	config B43_FW_5_100_138
+-		bool "Firmware 666.2 from driver 5.100.138 (stable)"
+-		help
+-		  The currently default firmware for BCM43xx devices.
+-
+-		  This firmware currently gets most of the testing and is needed for some N-PHY devices.
+-
+-		  If unsure, select the this firmware.
+-
+-	config B43_FW_6_30
+-		bool "Firmware 784.2 from driver 6.30.163.46 (experimental)"
+-		help
+-		  Newer experimental firmware for BCM43xx devices.
+-
+-		  This firmware is mostly untested.
+-
+-		  If unsure, select the "stable" firmware.
+-
+-	config B43_OPENFIRMWARE
+-		bool "Open FirmWare for WiFi networks"
+-		help
+-		  Opensource firmware for BCM43xx devices.
+-
+-		  Do _not_ select this, unless you know what you are doing.
+-		  The Opensource firmware is not suitable for embedded devices, yet.
+-		  It does not support QoS, which is bad for AccessPoints.
+-		  It does not support hardware crypto acceleration, which is a showstopper
+-		  for embedded devices with low CPU resources.
+-
+-		  If unsure, select the "stable" firmware.
+-
+-	endchoice
+-
+-	config B43_FW_SQUASH
+-		bool "Remove unnecessary firmware files"
+-		depends on !B43_OPENFIRMWARE
+-		default y
+-		help
+-		  This options allows you to remove unnecessary b43 firmware files
+-		  from the final rootfs image. This can reduce the rootfs size by
+-		  up to 200k.
+-
+-		  If unsure, say Y.
+-
+-	config B43_FW_SQUASH_COREREVS
+-		string "Core revisions to include"
+-		depends on B43_FW_SQUASH
+-		default "5,6,7,8,9,10,11,13,15" if TARGET_bcm47xx_legacy
+-		default "16,28,29,30" if TARGET_bcm47xx_mips74k
+-		default "5,6,7,8,9,10,11,13,15,16,28,29,30"
+-		help
+-		  This is a comma separated list of core revision numbers.
+-
+-		  Example (keep files for rev5 only):
+-		    5
+-
+-		  Example (keep files for rev5 and rev11):
+-		    5,11
+-
+-	config B43_FW_SQUASH_PHYTYPES
+-		string "PHY types to include"
+-		depends on B43_FW_SQUASH
+-		default "G,N,LP" if TARGET_bcm47xx_legacy
+-		default "N,HT" if TARGET_bcm47xx_mips74k
+-		default "G,N,LP,HT"
+-		help
+-		  This is a comma separated list of PHY types:
+-		    A  => A-PHY
+-		    AG => Dual A-PHY G-PHY
+-		    G  => G-PHY
+-		    LP => LP-PHY
+-		    N  => N-PHY
+-		    HT  => HT-PHY
+-		    LCN  => LCN-PHY
+-		    LCN40  => LCN40-PHY
+-		    AC  => AC-PHY
+-
+-		  Example (keep files for G-PHY only):
+-		    G
+-
+-		  Example (keep files for G-PHY and N-PHY):
+-		    G,N
+-
+-	choice
+-		prompt "Supported buses"
+-		default PACKAGE_B43_BUSES_BCMA_AND_SSB
+-		help
+-		  This allows choosing buses that b43 should support.
+-
+-	config PACKAGE_B43_BUSES_BCMA_AND_SSB
+-		depends on !TARGET_bcm47xx_legacy && !TARGET_bcm47xx_mips74k && !TARGET_bcm53xx && !TARGET_bmips
+-		bool "BCMA and SSB"
+-
+-	config PACKAGE_B43_BUSES_BCMA
+-		depends on !TARGET_bcm47xx_legacy && !TARGET_bmips_bcm6358 && !TARGET_bmips_bcm6368
+-		bool "BCMA only"
+-
+-	config PACKAGE_B43_BUSES_SSB
+-		depends on !TARGET_bcm47xx_mips74k && !TARGET_bcm53xx
+-		bool "SSB only"
+-
+-	endchoice
+-
+-	config PACKAGE_B43_DEBUG
+-		bool "Enable debug output and debugfs for b43"
+-		default n
+-		help
+-		  Enable additional debug output and runtime sanity checks for b43
+-		  and enables the debugfs interface.
+-
+-		  If unsure, say N.
+-
+-	config PACKAGE_B43_PIO
+-		bool "Enable support for PIO transfer mode"
+-		default n
+-		help
+-		  Enable support for using PIO instead of DMA. Unless you have DMA
+-		  transfer problems you don't need this.
+-
+-		  If unsure, say N.
+-
+-	config PACKAGE_B43_PHY_G
+-		bool "Enable support for G-PHYs"
+-		default n if TARGET_bcm47xx_mips74k
+-		default y
+-		help
+-		  Enable support for G-PHY. This includes support for the following devices:
+-		  PCI: BCM4306, BCM4311, BCM4318
+-		  SoC: BCM5352E, BCM4712
+-
+-		  If unsure, say Y.
+-
+-	config PACKAGE_B43_PHY_N
+-		bool "Enable support for N-PHYs"
+-		default y
+-		help
+-		  Enable support for N-PHY. This includes support for the following devices:
+-		  PCI: BCM4321, BCM4322, BCM43222, BCM43224, BCM43225
+-		  SoC: BCM4716, BCM4717, BCM4718
+-
+-		  Currently only 11g speed is available.
+-
+-		  If unsure, say Y.
+-
+-	config PACKAGE_B43_PHY_LP
+-		bool "Enable support for LP-PHYs"
+-		default n if TARGET_bcm47xx_mips74k
+-		default y
+-		help
+-		  Enable support for LP-PHY. This includes support for the following devices:
+-		  PCI: BCM4312
+-		  SoC: BCM5354
+-
+-		  If unsure, say Y.
+-
+-	config PACKAGE_B43_PHY_HT
+-		bool "Enable support for HT-PHYs"
+-		default n if TARGET_bcm47xx_legacy
+-		default y
+-		help
+-		  Enable support for HT-PHY. This includes support for the following devices:
+-		  PCI: BCM4331
+-
+-		  Currently only 11g speed is available.
+-
+-		  If unsure, say Y.
+-
+-	config PACKAGE_B43_PHY_LCN
+-		bool "Enable support for LCN-PHYs"
+-		depends on BROKEN
+-		default n
+-		help
+-		  Currently broken.
+-
+-		  If unsure, say N.
+-
+-  endif
+-endef
+-
+-define KernelPackage/b43/description
+-Kernel module for Broadcom 43xx wireless support (mac80211 stack) new
+-endef
+-
+-define KernelPackage/brcmutil
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Broadcom IEEE802.11n common driver parts
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/brcm80211
+-  DEPENDS+=@PCI_SUPPORT||USB_SUPPORT
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/broadcom/brcm80211/brcmutil/brcmutil.ko
+-  AUTOLOAD:=$(call AutoProbe,brcmutil)
+-  MENU:=1
+-endef
+-
+-define KernelPackage/brcmutil/description
+- This module contains some common parts needed by Broadcom Wireless drivers brcmsmac and brcmfmac.
+-endef
+-
+-define KernelPackage/brcmutil/config
+-  if PACKAGE_kmod-brcmutil
+-
+-	config PACKAGE_BRCM80211_DEBUG
+-		bool "Broadcom wireless driver debugging"
+-		help
+-		  Say Y, if you want to debug brcmsmac and brcmfmac wireless driver.
+-
+-  endif
+-endef
+-
+-PKG_BRCMSMAC_FW_NAME:=broadcom-wl
+-PKG_BRCMSMAC_FW_VERSION:=5.100.138
+-PKG_BRCMSMAC_FW_OBJECT:=$(PKG_BRCMSMAC_FW_NAME)-$(PKG_BRCMSMAC_FW_VERSION)/linux/wl_apsta.o
+-PKG_BRCMSMAC_FW_SOURCE:=$(PKG_BRCMSMAC_FW_NAME)-$(PKG_BRCMSMAC_FW_VERSION).tar.bz2
+-PKG_BRCMSMAC_FW_SOURCE_URL:=http://www.lwfinger.com/b43-firmware/
+-PKG_BRCMSMAC_FW_HASH:=f1e7067aac5b62b67b8b6e4c517990277804339ac16065eb13c731ff909ae46f
+-
+-define Download/brcmsmac
+-  FILE:=$(PKG_BRCMSMAC_FW_SOURCE)
+-  URL:=$(PKG_BRCMSMAC_FW_SOURCE_URL)
+-  HASH:=$(PKG_BRCMSMAC_FW_HASH)
+-endef
+-$(eval $(call Download,brcmsmac))
+-
+-define KernelPackage/brcmsmac
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Broadcom IEEE802.11n PCIe SoftMAC WLAN driver
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/brcm80211
+-  DEPENDS+=@!TARGET_bcm47xx_legacy +kmod-mac80211 +!TARGET_bcm47xx:kmod-bcma +kmod-lib-cordic +kmod-lib-crc8 +kmod-brcmutil +!BRCMSMAC_USE_FW_FROM_WL:brcmsmac-firmware
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcmsmac.ko
+-  AUTOLOAD:=$(call AutoProbe,brcmsmac)
+-  MENU:=1
+-endef
+-
+-define KernelPackage/brcmsmac/description
+- Kernel module for Broadcom IEEE802.11n PCIe Wireless cards
+-endef
+-
+-define KernelPackage/brcmsmac/config
+-  if PACKAGE_kmod-brcmsmac
+-
+-	config BRCMSMAC_USE_FW_FROM_WL
+-		bool "Use firmware extracted from broadcom proprietary driver"
+-		default y
+-		help
+-		  Instead of using the official brcmsmac firmware a firmware
+-		  version 666.2 extracted from the proprietary Broadcom driver
+-		  is used. This is needed to get core rev 17 used in bcm4716
+-		  to work.
+-
+-		  If unsure, say Y.
+-
+-  endif
+-endef
+-
+-
+-define KernelPackage/brcmfmac
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Broadcom IEEE802.11n USB FullMAC WLAN driver
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/brcm80211
+-  DEPENDS+= @USB_SUPPORT +kmod-cfg80211 +@DRIVER_11AC_SUPPORT \
+-  	+kmod-brcmutil +BRCMFMAC_SDIO:kmod-mmc @!TARGET_uml \
+-	+BRCMFMAC_USB:kmod-usb-core +BRCMFMAC_USB:brcmfmac-firmware-usb
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/broadcom/brcm80211/brcmfmac/brcmfmac.ko
+-  AUTOLOAD:=$(call AutoProbe,brcmfmac)
+-endef
+-
+-define KernelPackage/brcmfmac/description
+- Kernel module for Broadcom IEEE802.11n USB Wireless cards
+-endef
+-
+-define KernelPackage/brcmfmac/config
+-  if PACKAGE_kmod-brcmfmac
+-
+-	config BRCMFMAC_SDIO
+-		bool "Enable SDIO bus interface support"
+-		default y if TARGET_bcm27xx
+-		default y if TARGET_imx_cortexa7
+-		default y if TARGET_sunxi
+-		default n
+-		help
+-		  Enable support for cards attached to an SDIO bus.
+-		  Select this option only if you are sure that your
+-		  board has a Broadcom wireless chip atacched to
+-		  that bus.
+-
+-	config BRCMFMAC_USB
+-		bool "Enable USB bus interface support"
+-		depends on USB_SUPPORT
+-		default y
+-		help
+-		  Supported USB connected chipsets:
+-		  BCM43235, BCM43236, BCM43238 (all in revision 3 only)
+-		  BCM43143, BCM43242, BCM43566, BCM43569
+-
+-	config BRCMFMAC_PCIE
+-		bool "Enable PCIE bus interface support"
+-		depends on PCI_SUPPORT
+-		default y
+-		help
+-		  Supported PCIe connected chipsets:
+-		  BCM4354, BCM4356, BCM43567, BCM43570, BCM43602
+-
+-  endif
+-endef
+-
+-
+-define KernelPackage/b43/install
+-	rm -rf $(1)/lib/firmware/
+-ifeq ($(CONFIG_B43_OPENFIRMWARE),y)
+-	tar xzf "$(DL_DIR)/$(PKG_B43_FWV4_SOURCE)" -C "$(PKG_BUILD_DIR)"
+-else
+-	tar xjf "$(DL_DIR)/$(PKG_B43_FWV4_SOURCE)" -C "$(PKG_BUILD_DIR)"
+-endif
+-	$(INSTALL_DIR) $(1)/lib/firmware/
+-ifeq ($(CONFIG_B43_OPENFIRMWARE),y)
+-	$(MAKE) -C "$(PKG_BUILD_DIR)/$(PKG_B43_FWV4_OBJECT)/"
+-	$(INSTALL_DIR) $(1)/lib/firmware/b43-open/
+-	$(INSTALL_DATA) $(PKG_BUILD_DIR)/$(PKG_B43_FWV4_OBJECT)/ucode5.fw $(1)/lib/firmware/b43-open/ucode5.fw
+-	$(INSTALL_DATA) $(PKG_BUILD_DIR)/$(PKG_B43_FWV4_OBJECT)/b0g0bsinitvals5.fw $(1)/lib/firmware/b43-open/b0g0bsinitvals5.fw
+-	$(INSTALL_DATA) $(PKG_BUILD_DIR)/$(PKG_B43_FWV4_OBJECT)/b0g0initvals5.fw $(1)/lib/firmware/b43-open/b0g0initvals5.fw
+-else
+-	b43-fwcutter -w $(1)/lib/firmware/ $(PKG_BUILD_DIR)/$(PKG_B43_FWV4_OBJECT)
+-endif
+-ifneq ($(CONFIG_B43_FW_SQUASH),)
+-	b43-fwsquash.py "$(CONFIG_B43_FW_SQUASH_PHYTYPES)" "$(CONFIG_B43_FW_SQUASH_COREREVS)" "$(1)/lib/firmware/b43"
+-endif
+-endef
+-
+-define KernelPackage/brcmsmac/install
+-	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+-ifeq ($(CONFIG_BRCMSMAC_USE_FW_FROM_WL),y)
+-	tar xjf "$(DL_DIR)/$(PKG_BRCMSMAC_FW_SOURCE)" -C "$(PKG_BUILD_DIR)"
+-	b43-fwcutter --brcmsmac -w $(1)/lib/firmware/ $(PKG_BUILD_DIR)/$(PKG_BRCMSMAC_FW_OBJECT)
+-endif
+-endef
+diff --git a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh
+deleted file mode 100644
+index 5aaba9af26..0000000000
+--- a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh
++++ /dev/null
+@@ -1,1321 +0,0 @@
+-#!/bin/sh
+-. /lib/netifd/netifd-wireless.sh
+-. /lib/netifd/hostapd.sh
+-. /lib/functions/system.sh
+-
+-init_wireless_driver "$@"
+-
+-MP_CONFIG_INT="mesh_retry_timeout mesh_confirm_timeout mesh_holding_timeout mesh_max_peer_links
+-	       mesh_max_retries mesh_ttl mesh_element_ttl mesh_hwmp_max_preq_retries
+-	       mesh_path_refresh_time mesh_min_discovery_timeout mesh_hwmp_active_path_timeout
+-	       mesh_hwmp_preq_min_interval mesh_hwmp_net_diameter_traversal_time mesh_hwmp_rootmode
+-	       mesh_hwmp_rann_interval mesh_gate_announcements mesh_sync_offset_max_neighor
+-	       mesh_rssi_threshold mesh_hwmp_active_path_to_root_timeout mesh_hwmp_root_interval
+-	       mesh_hwmp_confirmation_interval mesh_awake_window mesh_plink_timeout"
+-MP_CONFIG_BOOL="mesh_auto_open_plinks mesh_fwding"
+-MP_CONFIG_STRING="mesh_power_mode"
+-
+-NEWAPLIST=
+-OLDAPLIST=
+-NEWSPLIST=
+-OLDSPLIST=
+-NEWUMLIST=
+-OLDUMLIST=
+-
+-drv_mac80211_init_device_config() {
+-	hostapd_common_add_device_config
+-
+-	config_add_string path phy 'macaddr:macaddr'
+-	config_add_string tx_burst
+-	config_add_string distance
+-	config_add_int beacon_int chanbw frag rts
+-	config_add_int rxantenna txantenna antenna_gain txpower min_tx_power
+-	config_add_boolean noscan ht_coex acs_exclude_dfs background_radar
+-	config_add_array ht_capab
+-	config_add_array channels
+-	config_add_array scan_list
+-	config_add_boolean \
+-		rxldpc \
+-		short_gi_80 \
+-		short_gi_160 \
+-		tx_stbc_2by1 \
+-		su_beamformer \
+-		su_beamformee \
+-		mu_beamformer \
+-		mu_beamformee \
+-		he_su_beamformer \
+-		he_su_beamformee \
+-		he_mu_beamformer \
+-		vht_txop_ps \
+-		htc_vht \
+-		rx_antenna_pattern \
+-		tx_antenna_pattern \
+-		he_spr_sr_control \
+-		he_spr_psr_enabled \
+-		he_bss_color_enabled \
+-		he_twt_required
+-	config_add_int \
+-		beamformer_antennas \
+-		beamformee_antennas \
+-		vht_max_a_mpdu_len_exp \
+-		vht_max_mpdu \
+-		vht_link_adapt \
+-		vht160 \
+-		rx_stbc \
+-		tx_stbc \
+-		he_bss_color \
+-		he_spr_non_srg_obss_pd_max_offset
+-	config_add_boolean \
+-		ldpc \
+-		greenfield \
+-		short_gi_20 \
+-		short_gi_40 \
+-		max_amsdu \
+-		dsss_cck_40
+-}
+-
+-drv_mac80211_init_iface_config() {
+-	hostapd_common_add_bss_config
+-
+-	config_add_string 'macaddr:macaddr' ifname
+-
+-	config_add_boolean wds powersave enable
+-	config_add_string wds_bridge
+-	config_add_int maxassoc
+-	config_add_int max_listen_int
+-	config_add_int dtim_period
+-	config_add_int start_disabled
+-
+-	# mesh
+-	config_add_string mesh_id
+-	config_add_int $MP_CONFIG_INT
+-	config_add_boolean $MP_CONFIG_BOOL
+-	config_add_string $MP_CONFIG_STRING
+-}
+-
+-mac80211_add_capabilities() {
+-	local __var="$1"; shift
+-	local __mask="$1"; shift
+-	local __out= oifs
+-
+-	oifs="$IFS"
+-	IFS=:
+-	for capab in "$@"; do
+-		set -- $capab
+-
+-		[ "$(($4))" -gt 0 ] || continue
+-		[ "$(($__mask & $2))" -eq "$((${3:-$2}))" ] || continue
+-		__out="$__out[$1]"
+-	done
+-	IFS="$oifs"
+-
+-	export -n -- "$__var=$__out"
+-}
+-
+-mac80211_add_he_capabilities() {
+-	local __out= oifs
+-
+-	oifs="$IFS"
+-	IFS=:
+-	for capab in "$@"; do
+-		set -- $capab
+-		[ "$(($4))" -gt 0 ] || continue
+-		[ "$(((0x$2) & $3))" -gt 0 ] || {
+-			eval "$1=0"
+-			continue
+-		}
+-		append base_cfg "$1=1" "$N"
+-	done
+-	IFS="$oifs"
+-}
+-
+-mac80211_hostapd_setup_base() {
+-	local phy="$1"
+-
+-	json_select config
+-
+-	[ "$auto_channel" -gt 0 ] && channel=acs_survey
+-
+-	[ "$auto_channel" -gt 0 ] && json_get_vars acs_exclude_dfs
+-	[ -n "$acs_exclude_dfs" ] && [ "$acs_exclude_dfs" -gt 0 ] &&
+-		append base_cfg "acs_exclude_dfs=1" "$N"
+-
+-	json_get_vars noscan ht_coex min_tx_power:0 tx_burst
+-	json_get_values ht_capab_list ht_capab
+-	json_get_values channel_list channels
+-
+-	[ "$auto_channel" = 0 ] && [ -z "$channel_list" ] && \
+-		channel_list="$channel"
+-
+-	[ "$min_tx_power" -gt 0 ] && append base_cfg "min_tx_power=$min_tx_power"
+-
+-	set_default noscan 0
+-
+-	[ "$noscan" -gt 0 ] && hostapd_noscan=1
+-	[ "$tx_burst" = 0 ] && tx_burst=
+-
+-	chan_ofs=0
+-	[ "$band" = "6g" ] && chan_ofs=1
+-
+-	ieee80211n=1
+-	ht_capab=
+-	case "$htmode" in
+-		VHT20|HT20|HE20) ;;
+-		HT40*|VHT40|VHT80|VHT160|HE40|HE80|HE160)
+-			case "$hwmode" in
+-				a)
+-					case "$(( (($channel / 4) + $chan_ofs) % 2 ))" in
+-						1) ht_capab="[HT40+]";;
+-						0) ht_capab="[HT40-]";;
+-					esac
+-				;;
+-				*)
+-					case "$htmode" in
+-						HT40+) ht_capab="[HT40+]";;
+-						HT40-) ht_capab="[HT40-]";;
+-						*)
+-							if [ "$channel" -lt 7 ]; then
+-								ht_capab="[HT40+]"
+-							else
+-								ht_capab="[HT40-]"
+-							fi
+-						;;
+-					esac
+-				;;
+-			esac
+-			[ "$auto_channel" -gt 0 ] && ht_capab="[HT40+]"
+-		;;
+-		*) ieee80211n= ;;
+-	esac
+-
+-	[ -n "$ieee80211n" ] && {
+-		append base_cfg "ieee80211n=1" "$N"
+-
+-		set_default ht_coex 0
+-		append base_cfg "ht_coex=$ht_coex" "$N"
+-
+-		json_get_vars \
+-			ldpc:1 \
+-			greenfield:0 \
+-			short_gi_20:1 \
+-			short_gi_40:1 \
+-			tx_stbc:1 \
+-			rx_stbc:3 \
+-			max_amsdu:1 \
+-			dsss_cck_40:1
+-
+-		ht_cap_mask=0
+-		for cap in $(iw phy "$phy" info | grep 'Capabilities:' | cut -d: -f2); do
+-			ht_cap_mask="$(($ht_cap_mask | $cap))"
+-		done
+-
+-		cap_rx_stbc=$((($ht_cap_mask >> 8) & 3))
+-		[ "$rx_stbc" -lt "$cap_rx_stbc" ] && cap_rx_stbc="$rx_stbc"
+-		ht_cap_mask="$(( ($ht_cap_mask & ~(0x300)) | ($cap_rx_stbc << 8) ))"
+-
+-		mac80211_add_capabilities ht_capab_flags $ht_cap_mask \
+-			LDPC:0x1::$ldpc \
+-			GF:0x10::$greenfield \
+-			SHORT-GI-20:0x20::$short_gi_20 \
+-			SHORT-GI-40:0x40::$short_gi_40 \
+-			TX-STBC:0x80::$tx_stbc \
+-			RX-STBC1:0x300:0x100:1 \
+-			RX-STBC12:0x300:0x200:1 \
+-			RX-STBC123:0x300:0x300:1 \
+-			MAX-AMSDU-7935:0x800::$max_amsdu \
+-			DSSS_CCK-40:0x1000::$dsss_cck_40
+-
+-		ht_capab="$ht_capab$ht_capab_flags"
+-		[ -n "$ht_capab" ] && append base_cfg "ht_capab=$ht_capab" "$N"
+-	}
+-
+-	# 802.11ac
+-	enable_ac=0
+-	vht_oper_chwidth=0
+-	vht_center_seg0=
+-
+-	idx="$channel"
+-	case "$htmode" in
+-		VHT20|HE20) enable_ac=1;;
+-		VHT40|HE40)
+-			case "$(( (($channel / 4) + $chan_ofs) % 2 ))" in
+-				1) idx=$(($channel + 2));;
+-				0) idx=$(($channel - 2));;
+-			esac
+-			enable_ac=1
+-			vht_center_seg0=$idx
+-		;;
+-		VHT80|HE80)
+-			case "$(( (($channel / 4) + $chan_ofs) % 4 ))" in
+-				1) idx=$(($channel + 6));;
+-				2) idx=$(($channel + 2));;
+-				3) idx=$(($channel - 2));;
+-				0) idx=$(($channel - 6));;
+-			esac
+-			enable_ac=1
+-			vht_oper_chwidth=1
+-			vht_center_seg0=$idx
+-		;;
+-		VHT160|HE160)
+-			if [ "$band" = "6g" ]; then
+-				case "$channel" in
+-					1|5|9|13|17|21|25|29) idx=15;;
+-					33|37|41|45|49|53|57|61) idx=47;;
+-					65|69|73|77|81|85|89|93) idx=79;;
+-					97|101|105|109|113|117|121|125) idx=111;;
+-					129|133|137|141|145|149|153|157) idx=143;;
+-					161|165|169|173|177|181|185|189) idx=175;;
+-					193|197|201|205|209|213|217|221) idx=207;;
+-				esac
+-			else
+-				case "$channel" in
+-					36|40|44|48|52|56|60|64) idx=50;;
+-					100|104|108|112|116|120|124|128) idx=114;;
+-				esac
+-			fi
+-			enable_ac=1
+-			vht_oper_chwidth=2
+-			vht_center_seg0=$idx
+-		;;
+-	esac
+-	[ "$band" = "5g" ] && {
+-		json_get_vars background_radar:0
+-
+-		[ "$background_radar" -eq 1 ] && append base_cfg "enable_background_radar=1" "$N"
+-	}
+-	[ "$band" = "6g" ] && {
+-		op_class=
+-		case "$htmode" in
+-			HE20) op_class=131;;
+-			HE*) op_class=$((132 + $vht_oper_chwidth))
+-		esac
+-		[ -n "$op_class" ] && append base_cfg "op_class=$op_class" "$N"
+-	}
+-	[ "$hwmode" = "a" ] || enable_ac=0
+-
+-	if [ "$enable_ac" != "0" ]; then
+-		json_get_vars \
+-			rxldpc:1 \
+-			short_gi_80:1 \
+-			short_gi_160:1 \
+-			tx_stbc_2by1:1 \
+-			su_beamformer:1 \
+-			su_beamformee:1 \
+-			mu_beamformer:1 \
+-			mu_beamformee:1 \
+-			vht_txop_ps:1 \
+-			htc_vht:1 \
+-			beamformee_antennas:4 \
+-			beamformer_antennas:4 \
+-			rx_antenna_pattern:1 \
+-			tx_antenna_pattern:1 \
+-			vht_max_a_mpdu_len_exp:7 \
+-			vht_max_mpdu:11454 \
+-			rx_stbc:4 \
+-			vht_link_adapt:3 \
+-			vht160:2
+-
+-		set_default tx_burst 2.0
+-		append base_cfg "ieee80211ac=1" "$N"
+-		vht_cap=0
+-		for cap in $(iw phy "$phy" info | awk -F "[()]" '/VHT Capabilities/ { print $2 }'); do
+-			vht_cap="$(($vht_cap | $cap))"
+-		done
+-
+-		append base_cfg "vht_oper_chwidth=$vht_oper_chwidth" "$N"
+-		append base_cfg "vht_oper_centr_freq_seg0_idx=$vht_center_seg0" "$N"
+-
+-		cap_rx_stbc=$((($vht_cap >> 8) & 7))
+-		[ "$rx_stbc" -lt "$cap_rx_stbc" ] && cap_rx_stbc="$rx_stbc"
+-		vht_cap="$(( ($vht_cap & ~(0x700)) | ($cap_rx_stbc << 8) ))"
+-
+-		mac80211_add_capabilities vht_capab $vht_cap \
+-			RXLDPC:0x10::$rxldpc \
+-			SHORT-GI-80:0x20::$short_gi_80 \
+-			SHORT-GI-160:0x40::$short_gi_160 \
+-			TX-STBC-2BY1:0x80::$tx_stbc_2by1 \
+-			SU-BEAMFORMER:0x800::$su_beamformer \
+-			SU-BEAMFORMEE:0x1000::$su_beamformee \
+-			MU-BEAMFORMER:0x80000::$mu_beamformer \
+-			MU-BEAMFORMEE:0x100000::$mu_beamformee \
+-			VHT-TXOP-PS:0x200000::$vht_txop_ps \
+-			HTC-VHT:0x400000::$htc_vht \
+-			RX-ANTENNA-PATTERN:0x10000000::$rx_antenna_pattern \
+-			TX-ANTENNA-PATTERN:0x20000000::$tx_antenna_pattern \
+-			RX-STBC-1:0x700:0x100:1 \
+-			RX-STBC-12:0x700:0x200:1 \
+-			RX-STBC-123:0x700:0x300:1 \
+-			RX-STBC-1234:0x700:0x400:1 \
+-
+-		[ "$(($vht_cap & 0x800))" -gt 0 -a "$su_beamformer" -gt 0 ] && {
+-			cap_ant="$(( ( ($vht_cap >> 16) & 3 ) + 1 ))"
+-			[ "$cap_ant" -gt "$beamformer_antennas" ] && cap_ant="$beamformer_antennas"
+-			[ "$cap_ant" -gt 1 ] && vht_capab="$vht_capab[SOUNDING-DIMENSION-$cap_ant]"
+-		}
+-
+-		[ "$(($vht_cap & 0x1000))" -gt 0 -a "$su_beamformee" -gt 0 ] && {
+-			cap_ant="$(( ( ($vht_cap >> 13) & 3 ) + 1 ))"
+-			[ "$cap_ant" -gt "$beamformee_antennas" ] && cap_ant="$beamformee_antennas"
+-			[ "$cap_ant" -gt 1 ] && vht_capab="$vht_capab[BF-ANTENNA-$cap_ant]"
+-		}
+-
+-		# supported Channel widths
+-		vht160_hw=0
+-		[ "$(($vht_cap & 12))" -eq 4 -a 1 -le "$vht160" ] && \
+-			vht160_hw=1
+-		[ "$(($vht_cap & 12))" -eq 8 -a 2 -le "$vht160" ] && \
+-			vht160_hw=2
+-		[ "$vht160_hw" = 1 ] && vht_capab="$vht_capab[VHT160]"
+-		[ "$vht160_hw" = 2 ] && vht_capab="$vht_capab[VHT160-80PLUS80]"
+-
+-		# maximum MPDU length
+-		vht_max_mpdu_hw=3895
+-		[ "$(($vht_cap & 3))" -ge 1 -a 7991 -le "$vht_max_mpdu" ] && \
+-			vht_max_mpdu_hw=7991
+-		[ "$(($vht_cap & 3))" -ge 2 -a 11454 -le "$vht_max_mpdu" ] && \
+-			vht_max_mpdu_hw=11454
+-		[ "$vht_max_mpdu_hw" != 3895 ] && \
+-			vht_capab="$vht_capab[MAX-MPDU-$vht_max_mpdu_hw]"
+-
+-		# maximum A-MPDU length exponent
+-		vht_max_a_mpdu_len_exp_hw=0
+-		[ "$(($vht_cap & 58720256))" -ge 8388608 -a 1 -le "$vht_max_a_mpdu_len_exp" ] && \
+-			vht_max_a_mpdu_len_exp_hw=1
+-		[ "$(($vht_cap & 58720256))" -ge 16777216 -a 2 -le "$vht_max_a_mpdu_len_exp" ] && \
+-			vht_max_a_mpdu_len_exp_hw=2
+-		[ "$(($vht_cap & 58720256))" -ge 25165824 -a 3 -le "$vht_max_a_mpdu_len_exp" ] && \
+-			vht_max_a_mpdu_len_exp_hw=3
+-		[ "$(($vht_cap & 58720256))" -ge 33554432 -a 4 -le "$vht_max_a_mpdu_len_exp" ] && \
+-			vht_max_a_mpdu_len_exp_hw=4
+-		[ "$(($vht_cap & 58720256))" -ge 41943040 -a 5 -le "$vht_max_a_mpdu_len_exp" ] && \
+-			vht_max_a_mpdu_len_exp_hw=5
+-		[ "$(($vht_cap & 58720256))" -ge 50331648 -a 6 -le "$vht_max_a_mpdu_len_exp" ] && \
+-			vht_max_a_mpdu_len_exp_hw=6
+-		[ "$(($vht_cap & 58720256))" -ge 58720256 -a 7 -le "$vht_max_a_mpdu_len_exp" ] && \
+-			vht_max_a_mpdu_len_exp_hw=7
+-		vht_capab="$vht_capab[MAX-A-MPDU-LEN-EXP$vht_max_a_mpdu_len_exp_hw]"
+-
+-		# whether or not the STA supports link adaptation using VHT variant
+-		vht_link_adapt_hw=0
+-		[ "$(($vht_cap & 201326592))" -ge 134217728 -a 2 -le "$vht_link_adapt" ] && \
+-			vht_link_adapt_hw=2
+-		[ "$(($vht_cap & 201326592))" -ge 201326592 -a 3 -le "$vht_link_adapt" ] && \
+-			vht_link_adapt_hw=3
+-		[ "$vht_link_adapt_hw" != 0 ] && \
+-			vht_capab="$vht_capab[VHT-LINK-ADAPT-$vht_link_adapt_hw]"
+-
+-		[ -n "$vht_capab" ] && append base_cfg "vht_capab=$vht_capab" "$N"
+-	fi
+-
+-	# 802.11ax
+-	enable_ax=0
+-	case "$htmode" in
+-		HE*) enable_ax=1 ;;
+-	esac
+-
+-	if [ "$enable_ax" != "0" ]; then
+-		json_get_vars \
+-			he_su_beamformer:1 \
+-			he_su_beamformee:1 \
+-			he_mu_beamformer:1 \
+-			he_twt_required:0 \
+-			he_spr_sr_control:3 \
+-			he_spr_psr_enabled:0 \
+-			he_spr_non_srg_obss_pd_max_offset:0 \
+-			he_bss_color:128 \
+-			he_bss_color_enabled:1
+-
+-		he_phy_cap=$(iw phy "$phy" info | sed -n '/HE Iftypes: AP/,$p' | awk -F "[()]" '/HE PHY Capabilities/ { print $2 }' | head -1)
+-		he_phy_cap=${he_phy_cap:2}
+-		he_mac_cap=$(iw phy "$phy" info | sed -n '/HE Iftypes: AP/,$p' | awk -F "[()]" '/HE MAC Capabilities/ { print $2 }' | head -1)
+-		he_mac_cap=${he_mac_cap:2}
+-
+-		append base_cfg "ieee80211ax=1" "$N"
+-		[ "$hwmode" = "a" ] && {
+-			append base_cfg "he_oper_chwidth=$vht_oper_chwidth" "$N"
+-			append base_cfg "he_oper_centr_freq_seg0_idx=$vht_center_seg0" "$N"
+-		}
+-
+-		mac80211_add_he_capabilities \
+-			he_su_beamformer:${he_phy_cap:6:2}:0x80:$he_su_beamformer \
+-			he_su_beamformee:${he_phy_cap:8:2}:0x1:$he_su_beamformee \
+-			he_mu_beamformer:${he_phy_cap:8:2}:0x2:$he_mu_beamformer \
+-			he_spr_psr_enabled:${he_phy_cap:14:2}:0x1:$he_spr_psr_enabled \
+-			he_twt_required:${he_mac_cap:0:2}:0x6:$he_twt_required
+-
+-		if [ "$he_bss_color_enabled" -gt 0 ]; then
+-			append base_cfg "he_bss_color=$he_bss_color" "$N"
+-			[ "$he_spr_non_srg_obss_pd_max_offset" -gt 0 ] && { \
+-				append base_cfg "he_spr_non_srg_obss_pd_max_offset=$he_spr_non_srg_obss_pd_max_offset" "$N"
+-				he_spr_sr_control=$((he_spr_sr_control | (1 << 2)))
+-			}
+-			[ "$he_spr_psr_enabled" -gt 0 ] || he_spr_sr_control=$((he_spr_sr_control | (1 << 0)))
+-			append base_cfg "he_spr_sr_control=$he_spr_sr_control" "$N"
+-		else
+-			append base_cfg "he_bss_color_disabled=1" "$N"
+-		fi
+-
+-
+-		append base_cfg "he_default_pe_duration=4" "$N"
+-		append base_cfg "he_rts_threshold=1023" "$N"
+-		append base_cfg "he_mu_edca_qos_info_param_count=0" "$N"
+-		append base_cfg "he_mu_edca_qos_info_q_ack=0" "$N"
+-		append base_cfg "he_mu_edca_qos_info_queue_request=0" "$N"
+-		append base_cfg "he_mu_edca_qos_info_txop_request=0" "$N"
+-		append base_cfg "he_mu_edca_ac_be_aifsn=8" "$N"
+-		append base_cfg "he_mu_edca_ac_be_aci=0" "$N"
+-		append base_cfg "he_mu_edca_ac_be_ecwmin=9" "$N"
+-		append base_cfg "he_mu_edca_ac_be_ecwmax=10" "$N"
+-		append base_cfg "he_mu_edca_ac_be_timer=255" "$N"
+-		append base_cfg "he_mu_edca_ac_bk_aifsn=15" "$N"
+-		append base_cfg "he_mu_edca_ac_bk_aci=1" "$N"
+-		append base_cfg "he_mu_edca_ac_bk_ecwmin=9" "$N"
+-		append base_cfg "he_mu_edca_ac_bk_ecwmax=10" "$N"
+-		append base_cfg "he_mu_edca_ac_bk_timer=255" "$N"
+-		append base_cfg "he_mu_edca_ac_vi_ecwmin=5" "$N"
+-		append base_cfg "he_mu_edca_ac_vi_ecwmax=7" "$N"
+-		append base_cfg "he_mu_edca_ac_vi_aifsn=5" "$N"
+-		append base_cfg "he_mu_edca_ac_vi_aci=2" "$N"
+-		append base_cfg "he_mu_edca_ac_vi_timer=255" "$N"
+-		append base_cfg "he_mu_edca_ac_vo_aifsn=5" "$N"
+-		append base_cfg "he_mu_edca_ac_vo_aci=3" "$N"
+-		append base_cfg "he_mu_edca_ac_vo_ecwmin=5" "$N"
+-		append base_cfg "he_mu_edca_ac_vo_ecwmax=7" "$N"
+-		append base_cfg "he_mu_edca_ac_vo_timer=255" "$N"
+-	fi
+-
+-	hostapd_prepare_device_config "$hostapd_conf_file" nl80211
+-	cat >> "$hostapd_conf_file" <<EOF
+-${channel:+channel=$channel}
+-${channel_list:+chanlist=$channel_list}
+-${hostapd_noscan:+noscan=1}
+-${tx_burst:+tx_queue_data2_burst=$tx_burst}
+-$base_cfg
+-
+-EOF
+-	json_select ..
+-	radio_md5sum=$(md5sum $hostapd_conf_file | cut -d" " -f1)
+-	echo "radio_config_id=${radio_md5sum}" >> $hostapd_conf_file
+-}
+-
+-mac80211_hostapd_setup_bss() {
+-	local phy="$1"
+-	local ifname="$2"
+-	local macaddr="$3"
+-	local type="$4"
+-
+-	hostapd_cfg=
+-	append hostapd_cfg "$type=$ifname" "$N"
+-
+-	hostapd_set_bss_options hostapd_cfg "$phy" "$vif" || return 1
+-	json_get_vars wds wds_bridge dtim_period max_listen_int start_disabled
+-
+-	set_default wds 0
+-	set_default start_disabled 0
+-
+-	[ "$wds" -gt 0 ] && {
+-		append hostapd_cfg "wds_sta=1" "$N"
+-		[ -n "$wds_bridge" ] && append hostapd_cfg "wds_bridge=$wds_bridge" "$N"
+-	}
+-	[ "$staidx" -gt 0 -o "$start_disabled" -eq 1 ] && append hostapd_cfg "start_disabled=1" "$N"
+-
+-	cat >> /var/run/hostapd-$phy.conf <<EOF
+-$hostapd_cfg
+-bssid=$macaddr
+-${dtim_period:+dtim_period=$dtim_period}
+-${max_listen_int:+max_listen_interval=$max_listen_int}
+-EOF
+-}
+-
+-mac80211_get_addr() {
+-	local phy="$1"
+-	local idx="$(($2 + 1))"
+-
+-	head -n $idx /sys/class/ieee80211/${phy}/addresses | tail -n1
+-}
+-
+-mac80211_generate_mac() {
+-	local phy="$1"
+-	local id="${macidx:-0}"
+-
+-	local ref="$(cat /sys/class/ieee80211/${phy}/macaddress)"
+-	local mask="$(cat /sys/class/ieee80211/${phy}/address_mask)"
+-
+-	[ "$mask" = "00:00:00:00:00:00" ] && {
+-		mask="ff:ff:ff:ff:ff:ff";
+-
+-		[ "$(wc -l < /sys/class/ieee80211/${phy}/addresses)" -gt $id ] && {
+-			addr="$(mac80211_get_addr "$phy" "$id")"
+-			[ -n "$addr" ] && {
+-				echo "$addr"
+-				return
+-			}
+-		}
+-	}
+-
+-	local oIFS="$IFS"; IFS=":"; set -- $mask; IFS="$oIFS"
+-
+-	local mask1=$1
+-	local mask6=$6
+-
+-	local oIFS="$IFS"; IFS=":"; set -- $ref; IFS="$oIFS"
+-
+-	macidx=$(($id + 1))
+-	[ "$((0x$mask1))" -gt 0 ] && {
+-		b1="0x$1"
+-		[ "$id" -gt 0 ] && \
+-			b1=$(($b1 ^ ((($id - !($b1 & 2)) << 2)) | 0x2))
+-		printf "%02x:%s:%s:%s:%s:%s" $b1 $2 $3 $4 $5 $6
+-		return
+-	}
+-
+-	[ "$((0x$mask6))" -lt 255 ] && {
+-		printf "%s:%s:%s:%s:%s:%02x" $1 $2 $3 $4 $5 $(( 0x$6 ^ $id ))
+-		return
+-	}
+-
+-	off2=$(( (0x$6 + $id) / 0x100 ))
+-	printf "%s:%s:%s:%s:%02x:%02x" \
+-		$1 $2 $3 $4 \
+-		$(( (0x$5 + $off2) % 0x100 )) \
+-		$(( (0x$6 + $id) % 0x100 ))
+-}
+-
+-get_board_phy_name() (
+-	local path="$1"
+-	local fallback_phy=""
+-
+-	__check_phy() {
+-		local val="$1"
+-		local key="$2"
+-		local ref_path="$3"
+-
+-		json_select "$key"
+-		json_get_values path
+-		json_select ..
+-
+-		[ "${ref_path%+*}" = "$path" ] && fallback_phy=$key
+-		[ "$ref_path" = "$path" ] || return 0
+-
+-		echo "$key"
+-		exit
+-	}
+-
+-	json_load_file /etc/board.json
+-	json_for_each_item __check_phy wlan "$path"
+-	[ -n "$fallback_phy" ] && echo "${fallback_phy}.${path##*+}"
+-)
+-
+-rename_board_phy_by_path() {
+-	local path="$1"
+-
+-	local new_phy="$(get_board_phy_name "$path")"
+-	[ -z "$new_phy" -o "$new_phy" = "$phy" ] && return
+-
+-	iw "$phy" set name "$new_phy" && phy="$new_phy"
+-}
+-
+-rename_board_phy_by_name() (
+-	local phy="$1"
+-	local suffix="${phy##*.}"
+-	[ "$suffix" = "$phy" ] && suffix=
+-
+-	json_load_file /etc/board.json
+-	json_select wlan
+-	json_select "${phy%.*}" || return 0
+-	json_get_values path
+-
+-	prev_phy="$(iwinfo nl80211 phyname "path=$path${suffix:++$suffix}")"
+-	[ -n "$prev_phy" ] || return 0
+-
+-	[ "$prev_phy" = "$phy" ] && return 0
+-
+-	iw "$prev_phy" set name "$phy"
+-)
+-
+-find_phy() {
+-	[ -n "$phy" ] && {
+-		rename_board_phy_by_name "$phy"
+-		[ -d /sys/class/ieee80211/$phy ] && return 0
+-	}
+-	[ -n "$path" ] && {
+-		phy="$(iwinfo nl80211 phyname "path=$path")"
+-		[ -n "$phy" ] && {
+-			rename_board_phy_by_path "$path"
+-			return 0
+-		}
+-	}
+-	[ -n "$macaddr" ] && {
+-		for phy in $(ls /sys/class/ieee80211 2>/dev/null); do
+-			grep -i -q "$macaddr" "/sys/class/ieee80211/${phy}/macaddress" && {
+-				path="$(iwinfo nl80211 path "$phy")"
+-				rename_board_phy_by_path "$path"
+-				return 0
+-			}
+-		done
+-	}
+-	return 1
+-}
+-
+-mac80211_check_ap() {
+-	has_ap=1
+-}
+-
+-mac80211_iw_interface_add() {
+-	local phy="$1"
+-	local ifname="$2"
+-	local type="$3"
+-	local wdsflag="$4"
+-	local rc
+-	local oldifname
+-
+-	iw phy "$phy" interface add "$ifname" type "$type" $wdsflag >/dev/null 2>&1
+-	rc="$?"
+-
+-	[ "$rc" = 233 ] && {
+-		# Device might have just been deleted, give the kernel some time to finish cleaning it up
+-		sleep 1
+-
+-		iw phy "$phy" interface add "$ifname" type "$type" $wdsflag >/dev/null 2>&1
+-		rc="$?"
+-	}
+-
+-	[ "$rc" = 233 ] && {
+-		# Keep matching pre-existing interface
+-		[ -d "/sys/class/ieee80211/${phy}/device/net/${ifname}" ] && \
+-		case "$(iw dev $ifname info | grep "^\ttype" | cut -d' ' -f2- 2>/dev/null)" in
+-			"AP")
+-				[ "$type" = "__ap" ] && rc=0
+-				;;
+-			"IBSS")
+-				[ "$type" = "adhoc" ] && rc=0
+-				;;
+-			"managed")
+-				[ "$type" = "managed" ] && rc=0
+-				;;
+-			"mesh point")
+-				[ "$type" = "mp" ] && rc=0
+-				;;
+-			"monitor")
+-				[ "$type" = "monitor" ] && rc=0
+-				;;
+-		esac
+-	}
+-
+-	[ "$rc" = 233 ] && {
+-		iw dev "$ifname" del >/dev/null 2>&1
+-		[ "$?" = 0 ] && {
+-			sleep 1
+-
+-			iw phy "$phy" interface add "$ifname" type "$type" $wdsflag >/dev/null 2>&1
+-			rc="$?"
+-		}
+-	}
+-
+-	[ "$rc" != 0 ] && {
+-		# Device might not support virtual interfaces, so the interface never got deleted in the first place.
+-		# Check if the interface already exists, and avoid failing in this case.
+-		[ -d "/sys/class/ieee80211/${phy}/device/net/${ifname}" ] && rc=0
+-	}
+-
+-	[ "$rc" != 0 ] && {
+-		# Device doesn't support virtual interfaces and may have existing interface other than ifname.
+-		oldifname="$(basename "/sys/class/ieee80211/${phy}/device/net"/* 2>/dev/null)"
+-		[ "$oldifname" ] && ip link set "$oldifname" name "$ifname" 1>/dev/null 2>&1
+-		rc="$?"
+-	}
+-
+-	[ "$rc" != 0 ] && echo "Failed to create interface $ifname"
+-	return $rc
+-}
+-
+-mac80211_set_ifname() {
+-	local phy="$1"
+-	local prefix="$2"
+-	eval "ifname=\"$phy-$prefix\${idx_$prefix:-0}\"; idx_$prefix=\$((\${idx_$prefix:-0 } + 1))"
+-}
+-
+-mac80211_prepare_vif() {
+-	json_select config
+-
+-	json_get_vars ifname mode ssid wds powersave macaddr enable wpa_psk_file vlan_file
+-
+-	[ -n "$ifname" ] || {
+-		local prefix;
+-
+-		case "$mode" in
+-		ap|sta|mesh) prefix=$mode;;
+-		adhoc) prefix=ibss;;
+-		monitor) prefix=mon;;
+-		esac
+-
+-		mac80211_set_ifname "$phy" "$prefix"
+-	}
+-
+-	set_default wds 0
+-	set_default powersave 0
+-
+-	json_select ..
+-
+-	if [ -z "$macaddr" ]; then
+-		macaddr="$(mac80211_generate_mac $phy)"
+-		macidx="$(($macidx + 1))"
+-	elif [ "$macaddr" = 'random' ]; then
+-		macaddr="$(macaddr_random)"
+-	fi
+-
+-	json_add_object data
+-	json_add_string ifname "$ifname"
+-	json_close_object
+-
+-	[ "$mode" == "ap" ] && {
+-		[ -z "$wpa_psk_file" ] && hostapd_set_psk "$ifname"
+-		[ -z "$vlan_file" ] && hostapd_set_vlan "$ifname"
+-	}
+-
+-	json_select config
+-
+-	# It is far easier to delete and create the desired interface
+-	case "$mode" in
+-		adhoc)
+-			mac80211_iw_interface_add "$phy" "$ifname" adhoc || return
+-		;;
+-		ap)
+-			# Hostapd will handle recreating the interface and
+-			# subsequent virtual APs belonging to the same PHY
+-			if [ -n "$hostapd_ctrl" ]; then
+-				type=bss
+-			else
+-				type=interface
+-			fi
+-
+-			mac80211_hostapd_setup_bss "$phy" "$ifname" "$macaddr" "$type" || return
+-
+-			NEWAPLIST="${NEWAPLIST}$ifname "
+-			[ -n "$hostapd_ctrl" ] || {
+-				ap_ifname="${ifname}"
+-				hostapd_ctrl="${hostapd_ctrl:-/var/run/hostapd/$ifname}"
+-			}
+-		;;
+-		mesh)
+-			mac80211_iw_interface_add "$phy" "$ifname" mp || return
+-		;;
+-		monitor)
+-			mac80211_iw_interface_add "$phy" "$ifname" monitor || return
+-		;;
+-		sta)
+-			local wdsflag=
+-			[ "$enable" = 0 ] || staidx="$(($staidx + 1))"
+-			[ "$wds" -gt 0 ] && wdsflag="4addr on"
+-			mac80211_iw_interface_add "$phy" "$ifname" managed "$wdsflag" || return
+-			if [ "$wds" -gt 0 ]; then
+-				iw "$ifname" set 4addr on
+-			else
+-				iw "$ifname" set 4addr off
+-			fi
+-			[ "$powersave" -gt 0 ] && powersave="on" || powersave="off"
+-			iw "$ifname" set power_save "$powersave"
+-		;;
+-	esac
+-
+-	case "$mode" in
+-		monitor|mesh)
+-			[ "$auto_channel" -gt 0 ] || iw dev "$ifname" set channel "$channel" $iw_htmode
+-		;;
+-	esac
+-
+-	if [ "$mode" != "ap" ]; then
+-		# ALL ap functionality will be passed to hostapd
+-		# All interfaces must have unique mac addresses
+-		# which can either be explicitly set in the device
+-		# section, or automatically generated
+-		ip link set dev "$ifname" address "$macaddr"
+-	fi
+-
+-	json_select ..
+-}
+-
+-mac80211_setup_supplicant() {
+-	local enable=$1
+-	local add_sp=0
+-	local spobj="$(ubus -S list | grep wpa_supplicant.${ifname})"
+-
+-	[ "$enable" = 0 ] && {
+-		ubus call wpa_supplicant.${phy} config_remove "{\"iface\":\"$ifname\"}"
+-		ip link set dev "$ifname" down
+-		iw dev "$ifname" del
+-		return 0
+-	}
+-
+-	wpa_supplicant_prepare_interface "$ifname" nl80211 || {
+-		iw dev "$ifname" del
+-		return 1
+-	}
+-	if [ "$mode" = "sta" ]; then
+-		wpa_supplicant_add_network "$ifname"
+-	else
+-		wpa_supplicant_add_network "$ifname" "$freq" "$htmode" "$noscan"
+-	fi
+-
+-	NEWSPLIST="${NEWSPLIST}$ifname "
+-
+-	if [ "${NEWAPLIST%% *}" != "${OLDAPLIST%% *}" ]; then
+-		[ "$spobj" ] && ubus call wpa_supplicant config_remove "{\"iface\":\"$ifname\"}"
+-		add_sp=1
+-	fi
+-	[ -z "$spobj" ] && add_sp=1
+-
+-	NEW_MD5_SP=$(test -e "${_config}" && md5sum ${_config})
+-	OLD_MD5_SP=$(uci -q -P /var/state get wireless._${phy}.md5_${ifname})
+-	if [ "$add_sp" = "1" ]; then
+-		wpa_supplicant_run "$ifname" "$hostapd_ctrl"
+-	else
+-		[ "${NEW_MD5_SP}" == "${OLD_MD5_SP}" ] || ubus call $spobj reload
+-	fi
+-	uci -q -P /var/state set wireless._${phy}.md5_${ifname}="${NEW_MD5_SP}"
+-	return 0
+-}
+-
+-mac80211_setup_supplicant_noctl() {
+-	local enable=$1
+-	local spobj="$(ubus -S list | grep wpa_supplicant.${ifname})"
+-	wpa_supplicant_prepare_interface "$ifname" nl80211 || {
+-		iw dev "$ifname" del
+-		return 1
+-	}
+-
+-	wpa_supplicant_add_network "$ifname" "$freq" "$htmode" "$noscan"
+-
+-	NEWSPLIST="${NEWSPLIST}$ifname "
+-	[ "$enable" = 0 ] && {
+-		ubus call wpa_supplicant config_remove "{\"iface\":\"$ifname\"}"
+-		ip link set dev "$ifname" down
+-		return 0
+-	}
+-	if [ -z "$spobj" ]; then
+-		wpa_supplicant_run "$ifname"
+-	else
+-		ubus call $spobj reload
+-	fi
+-}
+-
+-mac80211_prepare_iw_htmode() {
+-	case "$htmode" in
+-		VHT20|HT20|HE20) iw_htmode=HT20;;
+-		HT40*|VHT40|VHT160|HE40)
+-			case "$band" in
+-				2g)
+-					case "$htmode" in
+-						HT40+) iw_htmode="HT40+";;
+-						HT40-) iw_htmode="HT40-";;
+-						*)
+-							if [ "$channel" -lt 7 ]; then
+-								iw_htmode="HT40+"
+-							else
+-								iw_htmode="HT40-"
+-							fi
+-						;;
+-					esac
+-				;;
+-				*)
+-					case "$(( ($channel / 4) % 2 ))" in
+-						1) iw_htmode="HT40+" ;;
+-						0) iw_htmode="HT40-";;
+-					esac
+-				;;
+-			esac
+-			[ "$auto_channel" -gt 0 ] && iw_htmode="HT40+"
+-		;;
+-		VHT80|HE80)
+-			iw_htmode="80MHZ"
+-		;;
+-		NONE|NOHT)
+-			iw_htmode="NOHT"
+-		;;
+-		*) iw_htmode="" ;;
+-	esac
+-}
+-
+-mac80211_setup_adhoc() {
+-	local enable=$1
+-	json_get_vars bssid ssid key mcast_rate
+-
+-	NEWUMLIST="${NEWUMLIST}$ifname "
+-
+-	[ "$enable" = 0 ] && {
+-		ip link set dev "$ifname" down
+-		return 0
+-	}
+-
+-	keyspec=
+-	[ "$auth_type" = "wep" ] && {
+-		set_default key 1
+-		case "$key" in
+-			[1234])
+-				local idx
+-				for idx in 1 2 3 4; do
+-					json_get_var ikey "key$idx"
+-
+-					[ -n "$ikey" ] && {
+-						ikey="$(($idx - 1)):$(prepare_key_wep "$ikey")"
+-						[ $idx -eq $key ] && ikey="d:$ikey"
+-						append keyspec "$ikey"
+-					}
+-				done
+-			;;
+-			*)
+-				append keyspec "d:0:$(prepare_key_wep "$key")"
+-			;;
+-		esac
+-	}
+-
+-	brstr=
+-	for br in $basic_rate_list; do
+-		wpa_supplicant_add_rate brstr "$br"
+-	done
+-
+-	mcval=
+-	[ -n "$mcast_rate" ] && wpa_supplicant_add_rate mcval "$mcast_rate"
+-
+-	iw dev "$ifname" set type ibss
+-	iw dev "$ifname" ibss join "$ssid" $freq $iw_htmode fixed-freq $bssid \
+-		beacon-interval $beacon_int \
+-		${brstr:+basic-rates $brstr} \
+-		${mcval:+mcast-rate $mcval} \
+-		${keyspec:+keys $keyspec}
+-}
+-
+-mac80211_setup_mesh() {
+-	local enable=$1
+-	json_get_vars ssid mesh_id mcast_rate
+-
+-	NEWUMLIST="${NEWUMLIST}$ifname "
+-
+-	[ "$enable" = 0 ] && {
+-		ip link set dev "$ifname" down
+-		return 0
+-	}
+-
+-	mcval=
+-	[ -n "$mcast_rate" ] && wpa_supplicant_add_rate mcval "$mcast_rate"
+-	[ -n "$mesh_id" ] && ssid="$mesh_id"
+-
+-	iw dev "$ifname" mesh join "$ssid" freq $freq $iw_htmode \
+-		${mcval:+mcast-rate $mcval} \
+-		beacon-interval $beacon_int
+-}
+-
+-mac80211_setup_vif() {
+-	local name="$1"
+-	local failed
+-	local action=up
+-
+-	json_select data
+-	json_get_vars ifname
+-	json_select ..
+-
+-	json_select config
+-	json_get_vars mode
+-	json_get_var vif_txpower
+-	json_get_var vif_enable enable 1
+-
+-	[ "$vif_enable" = 1 ] || action=down
+-	if [ "$mode" != "ap" ] || [ "$ifname" = "$ap_ifname" ]; then
+-		ip link set dev "$ifname" "$action" || {
+-			wireless_setup_vif_failed IFUP_ERROR
+-			json_select ..
+-			return
+-		}
+-		[ -z "$vif_txpower" ] || iw dev "$ifname" set txpower fixed "${vif_txpower%%.*}00"
+-	fi
+-
+-	case "$mode" in
+-		mesh)
+-			wireless_vif_parse_encryption
+-			[ -z "$htmode" ] && htmode="NOHT";
+-			if wpa_supplicant -vmesh || [ "$wpa" -gt 0 -o "$auto_channel" -gt 0 ] || chan_is_dfs "$phy" "$channel"; then
+-				mac80211_setup_supplicant $vif_enable || failed=1
+-			else
+-				mac80211_setup_mesh $vif_enable
+-			fi
+-			for var in $MP_CONFIG_INT $MP_CONFIG_BOOL $MP_CONFIG_STRING; do
+-				json_get_var mp_val "$var"
+-				[ -n "$mp_val" ] && iw dev "$ifname" set mesh_param "$var" "$mp_val"
+-			done
+-		;;
+-		adhoc)
+-			wireless_vif_parse_encryption
+-			if [ "$wpa" -gt 0 -o "$auto_channel" -gt 0 ]; then
+-				mac80211_setup_supplicant_noctl $vif_enable || failed=1
+-			else
+-				mac80211_setup_adhoc $vif_enable
+-			fi
+-		;;
+-		sta)
+-			mac80211_setup_supplicant $vif_enable || failed=1
+-		;;
+-	esac
+-
+-	json_select ..
+-	[ -n "$failed" ] || wireless_add_vif "$name" "$ifname"
+-}
+-
+-get_freq() {
+-	local phy="$1"
+-	local channel="$2"
+-	local band="$3"
+-
+-	case "$band" in
+-		2g) band="1:";;
+-		5g) band="2:";;
+-		60g) band="3:";;
+-		6g) band="4:";;
+-	esac
+-
+-	iw "$phy" info | awk -v band="$band" -v channel="[$channel]" '
+-
+-$1 ~ /Band/ {
+-	band_match = band == $2
+-}
+-
+-band_match && $3 == "MHz" && $4 == channel {
+-	print $2
+-	exit
+-}
+-'
+-}
+-
+-
+-chan_is_dfs() {
+-	local phy="$1"
+-	local chan="$2"
+-	iw "$phy" info | grep -E -m1 "(\* ${chan:-....} MHz${chan:+|\\[$chan\\]})" | grep -q "MHz.*radar detection"
+-	return $!
+-}
+-
+-mac80211_vap_cleanup() {
+-	local service="$1"
+-	local vaps="$2"
+-
+-	for wdev in $vaps; do
+-		[ "$service" != "none" ] && ubus call ${service} config_remove "{\"iface\":\"$wdev\"}"
+-		ip link set dev "$wdev" down 2>/dev/null
+-		iw dev "$wdev" del
+-	done
+-}
+-
+-mac80211_interface_cleanup() {
+-	local phy="$1"
+-	local primary_ap=$(uci -q -P /var/state get wireless._${phy}.aplist)
+-	primary_ap=${primary_ap%% *}
+-
+-	mac80211_vap_cleanup hostapd "${primary_ap}"
+-	mac80211_vap_cleanup wpa_supplicant "$(uci -q -P /var/state get wireless._${phy}.splist)"
+-	mac80211_vap_cleanup none "$(uci -q -P /var/state get wireless._${phy}.umlist)"
+-}
+-
+-mac80211_set_noscan() {
+-	hostapd_noscan=1
+-}
+-
+-drv_mac80211_cleanup() {
+-	hostapd_common_cleanup
+-}
+-
+-drv_mac80211_setup() {
+-	json_select config
+-	json_get_vars \
+-		phy macaddr path \
+-		country chanbw distance \
+-		txpower antenna_gain \
+-		rxantenna txantenna \
+-		frag rts beacon_int:100 htmode
+-	json_get_values basic_rate_list basic_rate
+-	json_get_values scan_list scan_list
+-	json_select ..
+-
+-	find_phy || {
+-		echo "Could not find PHY for device '$1'"
+-		wireless_set_retry 0
+-		return 1
+-	}
+-
+-	wireless_set_data phy="$phy"
+-	[ -z "$(uci -q -P /var/state show wireless._${phy})" ] && uci -q -P /var/state set wireless._${phy}=phy
+-
+-	OLDAPLIST=$(uci -q -P /var/state get wireless._${phy}.aplist)
+-	OLDSPLIST=$(uci -q -P /var/state get wireless._${phy}.splist)
+-	OLDUMLIST=$(uci -q -P /var/state get wireless._${phy}.umlist)
+-
+-	local wdev
+-	local cwdev
+-	local found
+-
+-	for wdev in $(list_phy_interfaces "$phy"); do
+-		found=0
+-		for cwdev in $OLDAPLIST $OLDSPLIST $OLDUMLIST; do
+-			if [ "$wdev" = "$cwdev" ]; then
+-				found=1
+-				break
+-			fi
+-		done
+-		if [ "$found" = "0" ]; then
+-			ip link set dev "$wdev" down
+-			iw dev "$wdev" del
+-		fi
+-	done
+-
+-	# convert channel to frequency
+-	[ "$auto_channel" -gt 0 ] || freq="$(get_freq "$phy" "$channel" "$band")"
+-
+-	[ -n "$country" ] && {
+-		iw reg get | grep -q "^country $country:" || {
+-			iw reg set "$country"
+-			sleep 1
+-		}
+-	}
+-
+-	hostapd_conf_file="/var/run/hostapd-$phy.conf"
+-
+-	no_ap=1
+-	macidx=0
+-	staidx=0
+-
+-	[ -n "$chanbw" ] && {
+-		for file in /sys/kernel/debug/ieee80211/$phy/ath9k*/chanbw /sys/kernel/debug/ieee80211/$phy/ath5k/bwmode; do
+-			[ -f "$file" ] && echo "$chanbw" > "$file"
+-		done
+-	}
+-
+-	set_default rxantenna 0xffffffff
+-	set_default txantenna 0xffffffff
+-	set_default distance 0
+-	set_default antenna_gain 0
+-
+-	[ "$txantenna" = "all" ] && txantenna=0xffffffff
+-	[ "$rxantenna" = "all" ] && rxantenna=0xffffffff
+-
+-	iw phy "$phy" set antenna $txantenna $rxantenna >/dev/null 2>&1
+-	iw phy "$phy" set antenna_gain $antenna_gain >/dev/null 2>&1
+-	iw phy "$phy" set distance "$distance" >/dev/null 2>&1
+-
+-	if [ -n "$txpower" ]; then
+-		iw phy "$phy" set txpower fixed "${txpower%%.*}00"
+-	else
+-		iw phy "$phy" set txpower auto
+-	fi
+-
+-	[ -n "$frag" ] && iw phy "$phy" set frag "${frag%%.*}"
+-	[ -n "$rts" ] && iw phy "$phy" set rts "${rts%%.*}"
+-
+-	has_ap=
+-	hostapd_ctrl=
+-	ap_ifname=
+-	hostapd_noscan=
+-	for_each_interface "ap" mac80211_check_ap
+-
+-	rm -f "$hostapd_conf_file"
+-
+-	for_each_interface "sta adhoc mesh" mac80211_set_noscan
+-	[ -n "$has_ap" ] && mac80211_hostapd_setup_base "$phy"
+-
+-	mac80211_prepare_iw_htmode
+-	for_each_interface "sta adhoc mesh monitor" mac80211_prepare_vif
+-	NEWAPLIST=
+-	for_each_interface "ap" mac80211_prepare_vif
+-	NEW_MD5=$(test -e "${hostapd_conf_file}" && md5sum ${hostapd_conf_file})
+-	OLD_MD5=$(uci -q -P /var/state get wireless._${phy}.md5)
+-	if [ "${NEWAPLIST}" != "${OLDAPLIST}" ]; then
+-		mac80211_vap_cleanup hostapd "${OLDAPLIST}"
+-	fi
+-	[ -n "${NEWAPLIST}" ] && mac80211_iw_interface_add "$phy" "${NEWAPLIST%% *}" __ap
+-	local add_ap=0
+-	local primary_ap=${NEWAPLIST%% *}
+-	[ -n "$hostapd_ctrl" ] && {
+-		local no_reload=1
+-		if [ -n "$(ubus list | grep hostapd.$primary_ap)" ]; then
+-			no_reload=0
+-			[ "${NEW_MD5}" = "${OLD_MD5}" ] || {
+-				ubus call hostapd.$primary_ap reload
+-				no_reload=$?
+-				if [ "$no_reload" != "0" ]; then
+-					mac80211_vap_cleanup hostapd "${OLDAPLIST}"
+-					mac80211_vap_cleanup wpa_supplicant "$(uci -q -P /var/state get wireless._${phy}.splist)"
+-					mac80211_vap_cleanup none "$(uci -q -P /var/state get wireless._${phy}.umlist)"
+-					sleep 2
+-					mac80211_iw_interface_add "$phy" "${NEWAPLIST%% *}" __ap
+-					for_each_interface "sta adhoc mesh monitor" mac80211_prepare_vif
+-				fi
+-			}
+-		fi
+-		if [ "$no_reload" != "0" ]; then
+-			add_ap=1
+-			ubus wait_for hostapd
+-			local hostapd_res="$(ubus call hostapd config_add "{\"iface\":\"$primary_ap\", \"config\":\"${hostapd_conf_file}\"}")"
+-			ret="$?"
+-			[ "$ret" != 0 -o -z "$hostapd_res" ] && {
+-				wireless_setup_failed HOSTAPD_START_FAILED
+-				return
+-			}
+-			wireless_add_process "$(jsonfilter -s "$hostapd_res" -l 1 -e @.pid)" "/usr/sbin/hostapd" 1 1
+-		fi
+-	}
+-	uci -q -P /var/state set wireless._${phy}.aplist="${NEWAPLIST}"
+-	uci -q -P /var/state set wireless._${phy}.md5="${NEW_MD5}"
+-
+-	[ "${add_ap}" = 1 ] && sleep 1
+-	for_each_interface "ap" mac80211_setup_vif
+-
+-	NEWSPLIST=
+-	NEWUMLIST=
+-
+-	for_each_interface "sta adhoc mesh monitor" mac80211_setup_vif
+-
+-	uci -q -P /var/state set wireless._${phy}.splist="${NEWSPLIST}"
+-	uci -q -P /var/state set wireless._${phy}.umlist="${NEWUMLIST}"
+-
+-	local foundvap
+-	local dropvap=""
+-	for oldvap in $OLDSPLIST; do
+-		foundvap=0
+-		for newvap in $NEWSPLIST; do
+-			[ "$oldvap" = "$newvap" ] && foundvap=1
+-		done
+-		[ "$foundvap" = "0" ] && dropvap="$dropvap $oldvap"
+-	done
+-	[ -n "$dropvap" ] && mac80211_vap_cleanup wpa_supplicant "$dropvap"
+-	wireless_set_up
+-}
+-
+-_list_phy_interfaces() {
+-	local phy="$1"
+-	if [ -d "/sys/class/ieee80211/${phy}/device/net" ]; then
+-		ls "/sys/class/ieee80211/${phy}/device/net" 2>/dev/null;
+-	else
+-		ls "/sys/class/ieee80211/${phy}/device" 2>/dev/null | grep net: | sed -e 's,net:,,g'
+-	fi
+-}
+-
+-list_phy_interfaces() {
+-	local phy="$1"
+-
+-	for dev in $(_list_phy_interfaces "$phy"); do
+-		readlink "/sys/class/net/${dev}/phy80211" | grep -q "/${phy}\$" || continue
+-		echo "$dev"
+-	done
+-}
+-
+-drv_mac80211_teardown() {
+-	json_select data
+-	json_get_vars phy
+-	json_select ..
+-	[ -n "$phy" ] || {
+-		echo "Bug: PHY is undefined for device '$1'"
+-		return 1
+-	}
+-
+-	mac80211_interface_cleanup "$phy"
+-	uci -q -P /var/state revert wireless._${phy}
+-}
+-
+-add_driver mac80211
+diff --git a/package/kernel/mac80211/files/lib/wifi/mac80211.sh b/package/kernel/mac80211/files/lib/wifi/mac80211.sh
+deleted file mode 100644
+index e24a2a634e..0000000000
+--- a/package/kernel/mac80211/files/lib/wifi/mac80211.sh
++++ /dev/null
+@@ -1,217 +0,0 @@
+-#!/bin/sh
+-
+-append DRIVERS "mac80211"
+-
+-check_mac80211_device() {
+-	local device="$1"
+-	local path="$2"
+-	local macaddr="$3"
+-
+-	[ -n "$found" ] && return 0
+-
+-	phy_path=
+-	config_get phy "$device" phy
+-	json_select wlan
+-	[ -n "$phy" ] && case "$phy" in
+-		phy*)
+-			[ -d /sys/class/ieee80211/$phy ] && \
+-				phy_path="$(iwinfo nl80211 path "$dev")"
+-		;;
+-		*)
+-			if json_is_a "$phy" object; then
+-				json_select "$phy"
+-				json_get_var phy_path path
+-				json_select ..
+-			elif json_is_a "${phy%.*}" object; then
+-				json_select "${phy%.*}"
+-				json_get_var phy_path path
+-				json_select ..
+-				phy_path="$phy_path+${phy##*.}"
+-			fi
+-		;;
+-	esac
+-	json_select ..
+-	[ -n "$phy_path" ] || config_get phy_path "$device" path
+-	[ -n "$path" -a "$phy_path" = "$path" ] && {
+-		found=1
+-		return 0
+-	}
+-
+-	config_get dev_macaddr "$device" macaddr
+-
+-	[ -n "$macaddr" -a "$dev_macaddr" = "$macaddr" ] && found=1
+-
+-	return 0
+-}
+-
+-
+-__get_band_defaults() {
+-	local phy="$1"
+-
+-	( iw phy "$phy" info; echo ) | awk '
+-BEGIN {
+-        bands = ""
+-}
+-
+-($1 == "Band" || $1 == "") && band {
+-        if (channel) {
+-		mode="NOHT"
+-		if (ht) mode="HT20"
+-		if (vht && band != "1:") mode="VHT80"
+-		if (he) mode="HE80"
+-		if (he && band == "1:") mode="HE20"
+-                sub("\\[", "", channel)
+-                sub("\\]", "", channel)
+-                bands = bands band channel ":" mode " "
+-        }
+-        band=""
+-}
+-
+-$1 == "Band" {
+-        band = $2
+-        channel = ""
+-	vht = ""
+-	ht = ""
+-	he = ""
+-}
+-
+-$0 ~ "Capabilities:" {
+-	ht=1
+-}
+-
+-$0 ~ "VHT Capabilities" {
+-	vht=1
+-}
+-
+-$0 ~ "HE Iftypes" {
+-	he=1
+-}
+-
+-$1 == "*" && $3 == "MHz" && $0 !~ /disabled/ && band && !channel {
+-        channel = $4
+-}
+-
+-END {
+-        print bands
+-}'
+-}
+-
+-get_band_defaults() {
+-	local phy="$1"
+-
+-	for c in $(__get_band_defaults "$phy"); do
+-		local band="${c%%:*}"
+-		c="${c#*:}"
+-		local chan="${c%%:*}"
+-		c="${c#*:}"
+-		local mode="${c%%:*}"
+-
+-		case "$band" in
+-			1) band=2g;;
+-			2) band=5g;;
+-			3) band=60g;;
+-			4) band=6g;;
+-			*) band="";;
+-		esac
+-
+-		[ -n "$band" ] || continue
+-		[ -n "$mode_band" -a "$band" = "6g" ] && return
+-
+-		mode_band="$band"
+-		channel="$chan"
+-		htmode="$mode"
+-	done
+-}
+-
+-check_devidx() {
+-	case "$1" in
+-	radio[0-9]*)
+-		local idx="${1#radio}"
+-		[ "$devidx" -ge "${1#radio}" ] && devidx=$((idx + 1))
+-		;;
+-	esac
+-}
+-
+-check_board_phy() {
+-	local name="$2"
+-
+-	json_select "$name"
+-	json_get_var phy_path path
+-	json_select ..
+-
+-	if [ "$path" = "$phy_path" ]; then
+-		board_dev="$name"
+-	elif [ "${path%+*}" = "$phy_path" ]; then
+-		fallback_board_dev="$name.${path#*+}"
+-	fi
+-}
+-
+-detect_mac80211() {
+-	devidx=0
+-	config_load wireless
+-	config_foreach check_devidx wifi-device
+-
+-	json_load_file /etc/board.json
+-
+-	for _dev in /sys/class/ieee80211/*; do
+-		[ -e "$_dev" ] || continue
+-
+-		dev="${_dev##*/}"
+-
+-		mode_band=""
+-		channel=""
+-		htmode=""
+-		ht_capab=""
+-
+-		get_band_defaults "$dev"
+-
+-		path="$(iwinfo nl80211 path "$dev")"
+-		macaddr="$(cat /sys/class/ieee80211/${dev}/macaddress)"
+-
+-		# work around phy rename related race condition
+-		[ -n "$path" -o -n "$macaddr" ] || continue
+-
+-		board_dev=
+-		fallback_board_dev=
+-		json_for_each_item check_board_phy wlan
+-		[ -n "$board_dev" ] || board_dev="$fallback_board_dev"
+-		[ -n "$board_dev" ] && dev="$board_dev"
+-
+-		found=
+-		config_foreach check_mac80211_device wifi-device "$path" "$macaddr"
+-		[ -n "$found" ] && continue
+-
+-		name="radio${devidx}"
+-		devidx=$(($devidx + 1))
+-		case "$dev" in
+-			phy*)
+-				if [ -n "$path" ]; then
+-					dev_id="set wireless.${name}.path='$path'"
+-				else
+-					dev_id="set wireless.${name}.macaddr='$macaddr'"
+-				fi
+-				;;
+-			*)
+-				dev_id="set wireless.${name}.phy='$dev'"
+-				;;
+-		esac
+-
+-		uci -q batch <<-EOF
+-			set wireless.${name}=wifi-device
+-			set wireless.${name}.type=mac80211
+-			${dev_id}
+-			set wireless.${name}.channel=${channel}
+-			set wireless.${name}.band=${mode_band}
+-			set wireless.${name}.htmode=$htmode
+-			set wireless.${name}.disabled=1
+-
+-			set wireless.default_${name}=wifi-iface
+-			set wireless.default_${name}.device=${name}
+-			set wireless.default_${name}.network=lan
+-			set wireless.default_${name}.mode=ap
+-			set wireless.default_${name}.ssid=OpenWrt
+-			set wireless.default_${name}.encryption=none
+-EOF
+-		uci -q commit wireless
+-	done
+-}
+diff --git a/package/kernel/mac80211/files/mac80211.hotplug b/package/kernel/mac80211/files/mac80211.hotplug
+deleted file mode 100644
+index b865552661..0000000000
+--- a/package/kernel/mac80211/files/mac80211.hotplug
++++ /dev/null
+@@ -1,5 +0,0 @@
+-#!/bin/sh
+-
+-[ "${ACTION}" = "add" ] && {
+-	/sbin/wifi config
+-}
+diff --git a/package/kernel/mac80211/intel.mk b/package/kernel/mac80211/intel.mk
+deleted file mode 100644
+index 8d374d73e7..0000000000
+--- a/package/kernel/mac80211/intel.mk
++++ /dev/null
+@@ -1,77 +0,0 @@
+-PKG_DRIVERS += iwlwifi
+-
+-config-$(call config_package,iwlwifi) += IWLWIFI IWLDVM IWLMVM
+-config-$(CONFIG_PACKAGE_IWLWIFI_DEBUG)+= IWLWIFI_DEBUG
+-config-$(CONFIG_PACKAGE_IWLWIFI_DEBUGFS)+= IWLWIFI_DEBUGFS
+-
+-define KernelPackage/iwlwifi
+-  $(call KernelPackage/mac80211/Default)
+-  DEPENDS:= +kmod-mac80211 @PCI_SUPPORT +@DRIVER_11AC_SUPPORT +@DRIVER_11AX_SUPPORT
+-  TITLE:=Intel AGN Wireless support
+-  FILES:= \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/intel/iwlwifi/iwlwifi.ko \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/intel/iwlwifi/dvm/iwldvm.ko \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/intel/iwlwifi/mvm/iwlmvm.ko
+-  AUTOLOAD:=$(call AutoProbe,iwlwifi iwldvm iwlmvm)
+-  MENU:=1
+-endef
+-
+-define KernelPackage/iwlwifi/description
+- iwlwifi kernel module for
+- Intel Wireless WiFi Link 6250AGN Adapter
+- Intel 6000 Series Wi-Fi Adapters (6200AGN and 6300AGN)
+- Intel WiFi Link 1000BGN
+- Intel Wireless WiFi 5150AGN
+- Intel Wireless WiFi 5100AGN, 5300AGN, and 5350AGN
+- Intel 6005 Series Wi-Fi Adapters
+- Intel 6030 Series Wi-Fi Adapters
+- Intel Wireless WiFi Link 6150BGN 2 Adapter
+- Intel 100 Series Wi-Fi Adapters (100BGN and 130BGN)
+- Intel 2000 Series Wi-Fi Adapters
+- Intel 7260 Wi-Fi Adapter
+- Intel 3160 Wi-Fi Adapter
+- Intel 7265 Wi-Fi Adapter
+- Intel 8260 Wi-Fi Adapter
+- Intel 3165 Wi-Fi Adapter
+-endef
+-
+-define KernelPackage/iwlwifi/config
+-  if PACKAGE_kmod-iwlwifi
+-
+-	config PACKAGE_IWLWIFI_DEBUG
+-		bool "Enable full debugging output in the iwlwifi driver"
+-		default n
+-		help
+-		  This option will enable debug tracing output for the iwlwifi drivers
+-
+-		  This will result in the kernel module being ~100k larger.  You can
+-		  control which debug output is sent to the kernel log by setting the
+-		  value in
+-
+-			/sys/module/iwlwifi/parameters/debug
+-
+-		  This entry will only exist if this option is enabled.
+-
+-		  To set a value, simply echo an 8-byte hex value to the same file:
+-
+-			  % echo 0x43fff > /sys/module/iwlwifi/parameters/debug
+-
+-		  You can find the list of debug mask values in:
+-			  drivers/net/wireless/intel/iwlwifi/iwl-debug.h
+-
+-		  If this is your first time using this driver, you should say Y here
+-		  as the debug information can assist others in helping you resolve
+-		  any problems you may encounter.
+-
+-	config PACKAGE_IWLWIFI_DEBUGFS
+-	        bool "iwlwifi debugfs support"
+-		depends on PACKAGE_MAC80211_DEBUGFS
+-		default n
+-		help
+-		  Enable creation of debugfs files for the iwlwifi drivers. This
+-		  is a low-impact option that allows getting insight into the
+-		  driver's state at runtime.
+-
+-  endif
+-endef
+-
+diff --git a/package/kernel/mac80211/marvell.mk b/package/kernel/mac80211/marvell.mk
+deleted file mode 100644
+index dbd07a80da..0000000000
+--- a/package/kernel/mac80211/marvell.mk
++++ /dev/null
+@@ -1,51 +0,0 @@
+-PKG_DRIVERS += \
+-	mwl8k mwifiex-pcie mwifiex-sdio
+-
+-config-$(call config_package,mwl8k) += MWL8K
+-config-$(call config_package,mwifiex-pcie) += MWIFIEX MWIFIEX_PCIE
+-config-$(call config_package,mwifiex-sdio) += MWIFIEX MWIFIEX_SDIO
+-
+-define KernelPackage/mwl8k
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Driver for Marvell TOPDOG 802.11 Wireless cards
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/mwl8k
+-  DEPENDS+= @PCI_SUPPORT +kmod-mac80211 +mwl8k-firmware
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/marvell/mwl8k.ko
+-  AUTOLOAD:=$(call AutoProbe,mwl8k)
+-endef
+-
+-define KernelPackage/mwl8k/description
+- Kernel modules for Marvell TOPDOG 802.11 Wireless cards
+-endef
+-
+-
+-define KernelPackage/mwifiex-pcie
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Driver for Marvell 802.11n/802.11ac PCIe Wireless cards
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/mwifiex
+-  DEPENDS+= @PCI_SUPPORT +kmod-mac80211 +@DRIVER_11AC_SUPPORT +mwifiex-pcie-firmware
+-  FILES:= \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/marvell/mwifiex/mwifiex.ko \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/marvell/mwifiex/mwifiex_pcie.ko
+-  AUTOLOAD:=$(call AutoProbe,mwifiex_pcie)
+-endef
+-
+-define KernelPackage/mwifiex-pcie/description
+- Kernel modules for Marvell 802.11n/802.11ac PCIe Wireless cards
+-endef
+-
+-define KernelPackage/mwifiex-sdio
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Driver for Marvell 802.11n/802.11ac SDIO Wireless cards
+-  URL:=https://wireless.wiki.kernel.org/en/users/drivers/mwifiex
+-  DEPENDS+= +kmod-mmc +kmod-mac80211 +@DRIVER_11AC_SUPPORT +mwifiex-sdio-firmware
+-  FILES:= \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/marvell/mwifiex/mwifiex.ko \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/marvell/mwifiex/mwifiex_sdio.ko
+-  AUTOLOAD:=$(call AutoProbe,mwifiex_sdio)
+-endef
+-
+-define KernelPackage/mwifiex-sdio/description
+- Kernel modules for Marvell 802.11n/802.11ac SDIO Wireless cards
+-endef
+-
+diff --git a/package/kernel/mac80211/patches/ath/070-ath_common_config.patch b/package/kernel/mac80211/patches/ath/070-ath_common_config.patch
+deleted file mode 100644
+index 3d0b4d6b1a..0000000000
+--- a/package/kernel/mac80211/patches/ath/070-ath_common_config.patch
++++ /dev/null
+@@ -1,10 +0,0 @@
+---- a/drivers/net/wireless/ath/Kconfig
+-+++ b/drivers/net/wireless/ath/Kconfig
+-@@ -1,6 +1,6 @@
+- # SPDX-License-Identifier: ISC
+- config ATH_COMMON
+--	tristate
+-+	tristate "ath.ko"
+- 	depends on m
+- 
+- config WLAN_VENDOR_ATH
+diff --git a/package/kernel/mac80211/patches/ath/400-ath_move_debug_code.patch b/package/kernel/mac80211/patches/ath/400-ath_move_debug_code.patch
+deleted file mode 100644
+index eacc72776e..0000000000
+--- a/package/kernel/mac80211/patches/ath/400-ath_move_debug_code.patch
++++ /dev/null
+@@ -1,31 +0,0 @@
+---- a/drivers/net/wireless/ath/Makefile
+-+++ b/drivers/net/wireless/ath/Makefile
+-@@ -15,10 +15,10 @@ ath-objs :=	main.o \
+- 		regd.o \
+- 		hw.o \
+- 		key.o \
+-+		debug.o \
+- 		dfs_pattern_detector.o \
+- 		dfs_pri_detector.o
+- 
+--ath-$(CPTCFG_ATH_DEBUG) += debug.o
+- ath-$(CPTCFG_ATH_TRACEPOINTS) += trace.o
+- 
+- CFLAGS_trace.o := -I$(src)
+---- a/drivers/net/wireless/ath/ath.h
+-+++ b/drivers/net/wireless/ath/ath.h
+-@@ -317,14 +317,7 @@ void _ath_dbg(struct ath_common *common,
+- #endif /* CPTCFG_ATH_DEBUG */
+- 
+- /** Returns string describing opmode, or NULL if unknown mode. */
+--#ifdef CPTCFG_ATH_DEBUG
+- const char *ath_opmode_to_string(enum nl80211_iftype opmode);
+--#else
+--static inline const char *ath_opmode_to_string(enum nl80211_iftype opmode)
+--{
+--	return "UNKNOWN";
+--}
+--#endif
+- 
+- extern const char *ath_bus_type_strings[];
+- static inline const char *ath_bus_type_to_string(enum ath_bus_type bustype)
+diff --git a/package/kernel/mac80211/patches/ath/402-ath_regd_optional.patch b/package/kernel/mac80211/patches/ath/402-ath_regd_optional.patch
+deleted file mode 100644
+index fd5493de71..0000000000
+--- a/package/kernel/mac80211/patches/ath/402-ath_regd_optional.patch
++++ /dev/null
+@@ -1,92 +0,0 @@
+---- a/drivers/net/wireless/ath/regd.c
+-+++ b/drivers/net/wireless/ath/regd.c
+-@@ -24,6 +24,7 @@
+- #include "regd_common.h"
+- 
+- static int __ath_regd_init(struct ath_regulatory *reg);
+-+static struct reg_dmn_pair_mapping *ath_get_regpair(int regdmn);
+- 
+- /*
+-  * This is a set of common rules used by our world regulatory domains.
+-@@ -116,6 +117,9 @@ static const struct ieee80211_regdomain
+- 
+- static bool dynamic_country_user_possible(struct ath_regulatory *reg)
+- {
+-+	if (IS_ENABLED(CPTCFG_ATH_USER_REGD))
+-+		return true;
+-+
+- 	if (IS_ENABLED(CPTCFG_ATH_REG_DYNAMIC_USER_CERT_TESTING))
+- 		return true;
+- 
+-@@ -188,6 +192,8 @@ static bool dynamic_country_user_possibl
+- 
+- static bool ath_reg_dyn_country_user_allow(struct ath_regulatory *reg)
+- {
+-+	if (IS_ENABLED(CPTCFG_ATH_USER_REGD))
+-+		return true;
+- 	if (!IS_ENABLED(CPTCFG_ATH_REG_DYNAMIC_USER_REG_HINTS))
+- 		return false;
+- 	if (!dynamic_country_user_possible(reg))
+-@@ -345,6 +351,9 @@ ath_reg_apply_beaconing_flags(struct wip
+- 	struct ieee80211_channel *ch;
+- 	unsigned int i;
+- 
+-+	if (IS_ENABLED(CPTCFG_ATH_USER_REGD))
+-+		return;
+-+
+- 	for (band = 0; band < NUM_NL80211_BANDS; band++) {
+- 		if (!wiphy->bands[band])
+- 			continue;
+-@@ -379,6 +388,9 @@ ath_reg_apply_ir_flags(struct wiphy *wip
+- {
+- 	struct ieee80211_supported_band *sband;
+- 
+-+	if (IS_ENABLED(CPTCFG_ATH_USER_REGD))
+-+		return;
+-+
+- 	sband = wiphy->bands[NL80211_BAND_2GHZ];
+- 	if (!sband)
+- 		return;
+-@@ -408,6 +420,9 @@ static void ath_reg_apply_radar_flags(st
+- 	struct ieee80211_channel *ch;
+- 	unsigned int i;
+- 
+-+	if (IS_ENABLED(CPTCFG_ATH_USER_REGD))
+-+		return;
+-+
+- 	if (!wiphy->bands[NL80211_BAND_5GHZ])
+- 		return;
+- 
+-@@ -640,6 +655,10 @@ ath_regd_init_wiphy(struct ath_regulator
+- 	const struct ieee80211_regdomain *regd;
+- 
+- 	wiphy->reg_notifier = reg_notifier;
+-+
+-+	if (IS_ENABLED(CPTCFG_ATH_USER_REGD))
+-+		return 0;
+-+
+- 	wiphy->regulatory_flags |= REGULATORY_STRICT_REG |
+- 				   REGULATORY_CUSTOM_REG;
+- 
+---- a/drivers/net/wireless/ath/Kconfig
+-+++ b/drivers/net/wireless/ath/Kconfig
+-@@ -24,6 +24,9 @@ config WLAN_VENDOR_ATH
+- 
+- if WLAN_VENDOR_ATH
+- 
+-+config ATH_USER_REGD
+-+	bool "Do not enforce EEPROM regulatory restrictions"
+-+
+- config ATH_DEBUG
+- 	bool "Atheros wireless debugging"
+- 	help
+---- a/local-symbols
+-+++ b/local-symbols
+-@@ -102,6 +102,7 @@ ADM8211=
+- ATH_COMMON=
+- WLAN_VENDOR_ATH=
+- ATH_DEBUG=
+-+ATH_USER_REGD=
+- ATH_TRACEPOINTS=
+- ATH_REG_DYNAMIC_USER_REG_HINTS=
+- ATH_REG_DYNAMIC_USER_CERT_TESTING=
+diff --git a/package/kernel/mac80211/patches/ath/403-world_regd_fixup.patch b/package/kernel/mac80211/patches/ath/403-world_regd_fixup.patch
+deleted file mode 100644
+index ed616b7532..0000000000
+--- a/package/kernel/mac80211/patches/ath/403-world_regd_fixup.patch
++++ /dev/null
+@@ -1,84 +0,0 @@
+---- a/drivers/net/wireless/ath/regd.c
+-+++ b/drivers/net/wireless/ath/regd.c
+-@@ -44,7 +44,8 @@ static struct reg_dmn_pair_mapping *ath_
+- 					 NL80211_RRF_NO_OFDM)
+- 
+- /* We allow IBSS on these on a case by case basis by regulatory domain */
+--#define ATH_5GHZ_5150_5350	REG_RULE(5150-10, 5350+10, 80, 0, 30,\
+-+#define ATH_5GHZ_5150_5350	REG_RULE(5150-10, 5240+10, 80, 0, 30, 0),\
+-+				REG_RULE(5260-10, 5350+10, 80, 0, 30,\
+- 					 NL80211_RRF_NO_IR)
+- #define ATH_5GHZ_5470_5850	REG_RULE(5470-10, 5850+10, 80, 0, 30,\
+- 					 NL80211_RRF_NO_IR)
+-@@ -62,57 +63,56 @@ static struct reg_dmn_pair_mapping *ath_
+- #define ATH_5GHZ_NO_MIDBAND	ATH_5GHZ_5150_5350, \
+- 				ATH_5GHZ_5725_5850
+- 
+-+#define REGD_RULES(...) \
+-+	.reg_rules = { __VA_ARGS__ }, \
+-+	.n_reg_rules = ARRAY_SIZE(((struct ieee80211_reg_rule[]) { __VA_ARGS__ }))
+-+
+- /* Can be used for:
+-  * 0x60, 0x61, 0x62 */
+- static const struct ieee80211_regdomain ath_world_regdom_60_61_62 = {
+--	.n_reg_rules = 5,
+- 	.alpha2 =  "99",
+--	.reg_rules = {
+-+	REGD_RULES(
+- 		ATH_2GHZ_ALL,
+- 		ATH_5GHZ_ALL,
+--	}
+-+	)
+- };
+- 
+- /* Can be used by 0x63 and 0x65 */
+- static const struct ieee80211_regdomain ath_world_regdom_63_65 = {
+--	.n_reg_rules = 4,
+- 	.alpha2 =  "99",
+--	.reg_rules = {
+-+	REGD_RULES(
+- 		ATH_2GHZ_CH01_11,
+- 		ATH_2GHZ_CH12_13,
+- 		ATH_5GHZ_NO_MIDBAND,
+--	}
+-+	)
+- };
+- 
+- /* Can be used by 0x64 only */
+- static const struct ieee80211_regdomain ath_world_regdom_64 = {
+--	.n_reg_rules = 3,
+- 	.alpha2 =  "99",
+--	.reg_rules = {
+-+	REGD_RULES(
+- 		ATH_2GHZ_CH01_11,
+- 		ATH_5GHZ_NO_MIDBAND,
+--	}
+-+	)
+- };
+- 
+- /* Can be used by 0x66 and 0x69 */
+- static const struct ieee80211_regdomain ath_world_regdom_66_69 = {
+--	.n_reg_rules = 3,
+- 	.alpha2 =  "99",
+--	.reg_rules = {
+-+	REGD_RULES(
+- 		ATH_2GHZ_CH01_11,
+- 		ATH_5GHZ_ALL,
+--	}
+-+	)
+- };
+- 
+- /* Can be used by 0x67, 0x68, 0x6A and 0x6C */
+- static const struct ieee80211_regdomain ath_world_regdom_67_68_6A_6C = {
+--	.n_reg_rules = 4,
+- 	.alpha2 =  "99",
+--	.reg_rules = {
+-+	REGD_RULES(
+- 		ATH_2GHZ_CH01_11,
+- 		ATH_2GHZ_CH12_13,
+- 		ATH_5GHZ_ALL,
+--	}
+-+	)
+- };
+- 
+- static bool dynamic_country_user_possible(struct ath_regulatory *reg)
+diff --git a/package/kernel/mac80211/patches/ath/404-regd_no_assoc_hints.patch b/package/kernel/mac80211/patches/ath/404-regd_no_assoc_hints.patch
+deleted file mode 100644
+index 8d83921a3b..0000000000
+--- a/package/kernel/mac80211/patches/ath/404-regd_no_assoc_hints.patch
++++ /dev/null
+@@ -1,19 +0,0 @@
+---- a/net/wireless/reg.c
+-+++ b/net/wireless/reg.c
+-@@ -3370,6 +3370,8 @@ void regulatory_hint_country_ie(struct w
+- 	enum environment_cap env = ENVIRON_ANY;
+- 	struct regulatory_request *request = NULL, *lr;
+- 
+-+	return;
+-+
+- 	/* IE len must be evenly divisible by 2 */
+- 	if (country_ie_len & 0x01)
+- 		return;
+-@@ -3621,6 +3623,7 @@ static bool is_wiphy_all_set_reg_flag(en
+- 
+- void regulatory_hint_disconnect(void)
+- {
+-+	return;
+- 	/* Restore of regulatory settings is not required when wiphy(s)
+- 	 * ignore IE from connected access point but clearance of beacon hints
+- 	 * is required when wiphy(s) supports beacon hints.
+diff --git a/package/kernel/mac80211/patches/ath/405-ath_regd_us.patch b/package/kernel/mac80211/patches/ath/405-ath_regd_us.patch
+deleted file mode 100644
+index 6723721a47..0000000000
+--- a/package/kernel/mac80211/patches/ath/405-ath_regd_us.patch
++++ /dev/null
+@@ -1,26 +0,0 @@
+---- a/drivers/net/wireless/ath/regd_common.h
+-+++ b/drivers/net/wireless/ath/regd_common.h
+-@@ -32,6 +32,7 @@ enum EnumRd {
+- 	FCC2_WORLD = 0x21,
+- 	FCC2_ETSIC = 0x22,
+- 	FCC6_WORLD = 0x23,
+-+	FCC3_FCCA_2 = 0x2A,
+- 	FRANCE_RES = 0x31,
+- 	FCC3_FCCA = 0x3A,
+- 	FCC3_WORLD = 0x3B,
+-@@ -173,6 +174,7 @@ static struct reg_dmn_pair_mapping regDo
+- 	{FCC2_WORLD, CTL_FCC, CTL_ETSI},
+- 	{FCC2_ETSIC, CTL_FCC, CTL_ETSI},
+- 	{FCC3_FCCA, CTL_FCC, CTL_FCC},
+-+	{FCC3_FCCA_2, CTL_FCC, CTL_FCC},
+- 	{FCC3_WORLD, CTL_FCC, CTL_ETSI},
+- 	{FCC3_ETSIC, CTL_FCC, CTL_ETSI},
+- 	{FCC4_FCCA, CTL_FCC, CTL_FCC},
+-@@ -486,6 +488,7 @@ static struct country_code_to_enum_rd al
+- 	{CTRY_UAE, NULL1_WORLD, "AE"},
+- 	{CTRY_UNITED_KINGDOM, ETSI1_WORLD, "GB"},
+- 	{CTRY_UNITED_STATES, FCC3_FCCA, "US"},
+-+	{CTRY_UNITED_STATES, FCC3_FCCA_2, "US"},
+- 	{CTRY_UNITED_STATES2, FCC3_FCCA, "US"},
+- 	{CTRY_UNITED_STATES3, FCC3_FCCA, "US"},
+- 	/* This "PS" is for US public safety actually... to support this we
+diff --git a/package/kernel/mac80211/patches/ath/406-ath_relax_default_regd.patch b/package/kernel/mac80211/patches/ath/406-ath_relax_default_regd.patch
+deleted file mode 100644
+index ee4e461342..0000000000
+--- a/package/kernel/mac80211/patches/ath/406-ath_relax_default_regd.patch
++++ /dev/null
+@@ -1,51 +0,0 @@
+---- a/drivers/net/wireless/ath/regd.c
+-+++ b/drivers/net/wireless/ath/regd.c
+-@@ -115,6 +115,16 @@ static const struct ieee80211_regdomain
+- 	)
+- };
+- 
+-+static u16 ath_regd_get_eepromRD(struct ath_regulatory *reg)
+-+{
+-+	return reg->current_rd & ~WORLDWIDE_ROAMING_FLAG;
+-+}
+-+
+-+static bool is_default_regd(struct ath_regulatory *reg)
+-+{
+-+	return ath_regd_get_eepromRD(reg) == CTRY_DEFAULT;
+-+}
+-+
+- static bool dynamic_country_user_possible(struct ath_regulatory *reg)
+- {
+- 	if (IS_ENABLED(CPTCFG_ATH_USER_REGD))
+-@@ -123,6 +133,9 @@ static bool dynamic_country_user_possibl
+- 	if (IS_ENABLED(CPTCFG_ATH_REG_DYNAMIC_USER_CERT_TESTING))
+- 		return true;
+- 
+-+	if (is_default_regd(reg))
+-+		return true;
+-+
+- 	switch (reg->country_code) {
+- 	case CTRY_UNITED_STATES:
+- 	case CTRY_JAPAN1:
+-@@ -208,11 +221,6 @@ static inline bool is_wwr_sku(u16 regd)
+- 		(regd == WORLD));
+- }
+- 
+--static u16 ath_regd_get_eepromRD(struct ath_regulatory *reg)
+--{
+--	return reg->current_rd & ~WORLDWIDE_ROAMING_FLAG;
+--}
+--
+- bool ath_is_world_regd(struct ath_regulatory *reg)
+- {
+- 	return is_wwr_sku(ath_regd_get_eepromRD(reg));
+-@@ -659,6 +667,9 @@ ath_regd_init_wiphy(struct ath_regulator
+- 	if (IS_ENABLED(CPTCFG_ATH_USER_REGD))
+- 		return 0;
+- 
+-+	if (is_default_regd(reg))
+-+		return 0;
+-+
+- 	wiphy->regulatory_flags |= REGULATORY_STRICT_REG |
+- 				   REGULATORY_CUSTOM_REG;
+- 
+diff --git a/package/kernel/mac80211/patches/ath/431-add_platform_eeprom_support_to_ath5k.patch b/package/kernel/mac80211/patches/ath/431-add_platform_eeprom_support_to_ath5k.patch
+deleted file mode 100644
+index 136be19894..0000000000
+--- a/package/kernel/mac80211/patches/ath/431-add_platform_eeprom_support_to_ath5k.patch
++++ /dev/null
+@@ -1,56 +0,0 @@
+---- a/drivers/net/wireless/ath/ath5k/pci.c
+-+++ b/drivers/net/wireless/ath/ath5k/pci.c
+-@@ -20,6 +20,7 @@
+- #include <linux/pci.h>
+- #include <linux/etherdevice.h>
+- #include <linux/module.h>
+-+#include <linux/ath5k_platform.h>
+- #include "../ath.h"
+- #include "ath5k.h"
+- #include "debug.h"
+-@@ -71,7 +72,7 @@ static void ath5k_pci_read_cachesize(str
+- }
+- 
+- /*
+-- * Read from eeprom
+-+ * Read from eeprom or platform_data
+-  */
+- static bool
+- ath5k_pci_eeprom_read(struct ath_common *common, u32 offset, u16 *data)
+-@@ -79,6 +80,19 @@ ath5k_pci_eeprom_read(struct ath_common
+- 	struct ath5k_hw *ah = (struct ath5k_hw *) common->ah;
+- 	u32 status, timeout;
+- 
+-+	struct ath5k_platform_data *pdata = NULL;
+-+
+-+	if (ah->pdev)
+-+		pdata = ah->pdev->dev.platform_data;
+-+
+-+	if (pdata && pdata->eeprom_data && pdata->eeprom_data[61] == AR5K_EEPROM_MAGIC_VALUE) {
+-+		if (offset >= ATH5K_PLAT_EEP_MAX_WORDS)
+-+			return false;
+-+
+-+		*data = pdata->eeprom_data[offset];
+-+		return true;
+-+	}
+-+
+- 	/*
+- 	 * Initialize EEPROM access
+- 	 */
+-@@ -122,6 +136,16 @@ static int ath5k_pci_eeprom_read_mac(str
+- 	u16 data;
+- 	int octet;
+- 
+-+	struct ath5k_platform_data *pdata = NULL;
+-+
+-+	if (ah->pdev)
+-+		pdata = ah->pdev->dev.platform_data;
+-+
+-+	if (pdata && pdata->macaddr) {
+-+		memcpy(mac, pdata->macaddr, ETH_ALEN);
+-+		return 0;
+-+	}
+-+
+- 	AR5K_EEPROM_READ(0x20, data);
+- 
+- 	for (offset = 0x1f, octet = 0, total = 0; offset >= 0x1d; offset--) {
+diff --git a/package/kernel/mac80211/patches/ath10k/080-ath10k_thermal_config.patch b/package/kernel/mac80211/patches/ath10k/080-ath10k_thermal_config.patch
+deleted file mode 100644
+index 41ad6006b5..0000000000
+--- a/package/kernel/mac80211/patches/ath10k/080-ath10k_thermal_config.patch
++++ /dev/null
+@@ -1,47 +0,0 @@
+---- a/drivers/net/wireless/ath/ath10k/Kconfig
+-+++ b/drivers/net/wireless/ath/ath10k/Kconfig
+-@@ -86,6 +86,12 @@ config ATH10K_TRACING
+- 	help
+- 	  Select this to ath10k use tracing infrastructure.
+- 
+-+config ATH10K_THERMAL
+-+	bool "Atheros ath10k thermal monitoring support"
+-+	depends on THERMAL
+-+	---help---
+-+	  Select this to ath10k use hwmon for thermal measurement.
+-+
+- config ATH10K_DFS_CERTIFIED
+- 	bool "Atheros DFS support for certified platforms"
+- 	depends on ATH10K && CFG80211_CERTIFICATION_ONUS
+---- a/drivers/net/wireless/ath/ath10k/Makefile
+-+++ b/drivers/net/wireless/ath/ath10k/Makefile
+-@@ -18,7 +18,7 @@ ath10k_core-y += mac.o \
+- ath10k_core-$(CPTCFG_ATH10K_SPECTRAL) += spectral.o
+- ath10k_core-$(CPTCFG_NL80211_TESTMODE) += testmode.o
+- ath10k_core-$(CPTCFG_ATH10K_TRACING) += trace.o
+--ath10k_core-$(CONFIG_THERMAL) += thermal.o
+-+ath10k_core-$(CPTCFG_ATH10K_THERMAL) += thermal.o
+- ath10k_core-$(CPTCFG_MAC80211_DEBUGFS) += debugfs_sta.o
+- ath10k_core-$(CONFIG_PM) += wow.o
+- ath10k_core-$(CONFIG_DEV_COREDUMP) += coredump.o
+---- a/drivers/net/wireless/ath/ath10k/thermal.h
+-+++ b/drivers/net/wireless/ath/ath10k/thermal.h
+-@@ -25,7 +25,7 @@ struct ath10k_thermal {
+- 	int temperature;
+- };
+- 
+--#if IS_REACHABLE(CONFIG_THERMAL)
+-+#if IS_REACHABLE(CPTCFG_ATH10K_THERMAL)
+- int ath10k_thermal_register(struct ath10k *ar);
+- void ath10k_thermal_unregister(struct ath10k *ar);
+- void ath10k_thermal_event_temperature(struct ath10k *ar, int temperature);
+---- a/local-symbols
+-+++ b/local-symbols
+-@@ -161,6 +161,7 @@ ATH10K_SNOC=
+- ATH10K_DEBUG=
+- ATH10K_DEBUGFS=
+- ATH10K_SPECTRAL=
+-+ATH10K_THERMAL=
+- ATH10K_TRACING=
+- ATH10K_DFS_CERTIFIED=
+- WCN36XX=
+diff --git a/package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch b/package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch
+deleted file mode 100644
+index 7a38cf3e4e..0000000000
+--- a/package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch
++++ /dev/null
+@@ -1,33 +0,0 @@
+-From: Sven Eckelmann <sven@open-mesh.com>
+-Date: Tue, 18 Nov 2014 12:29:28 +0100
+-Subject: [PATCH] ath10k: Don't initialize devices asynchronously
+-
+-OpenWrt requires all PHYs to be initialized to create the configuration files
+-during bootup. ath10k violates this because it delays the creation of the PHY
+-to a not well defined point in the future.
+-
+-Forcing the work to be done immediately works around this problem but may also
+-delay the boot when firmware images cannot be found.
+-
+-Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
+----
+-
+---- a/drivers/net/wireless/ath/ath10k/core.c
+-+++ b/drivers/net/wireless/ath/ath10k/core.c
+-@@ -3516,6 +3516,16 @@ int ath10k_core_register(struct ath10k *
+- 
+- 	queue_work(ar->workqueue, &ar->register_work);
+- 
+-+	/* OpenWrt requires all PHYs to be initialized to create the
+-+	 * configuration files during bootup. ath10k violates this
+-+	 * because it delays the creation of the PHY to a not well defined
+-+	 * point in the future.
+-+	 *
+-+	 * Forcing the work to be done immediately works around this problem
+-+	 * but may also delay the boot when firmware images cannot be found.
+-+	 */
+-+	flush_workqueue(ar->workqueue);
+-+
+- 	return 0;
+- }
+- EXPORT_SYMBOL(ath10k_core_register);
+diff --git a/package/kernel/mac80211/patches/ath10k/930-ath10k_add_tpt_led_trigger.patch b/package/kernel/mac80211/patches/ath10k/930-ath10k_add_tpt_led_trigger.patch
+deleted file mode 100644
+index e8beed17e8..0000000000
+--- a/package/kernel/mac80211/patches/ath10k/930-ath10k_add_tpt_led_trigger.patch
++++ /dev/null
+@@ -1,37 +0,0 @@
+---- a/drivers/net/wireless/ath/ath10k/mac.c
+-+++ b/drivers/net/wireless/ath/ath10k/mac.c
+-@@ -9909,6 +9909,21 @@ static int ath10k_mac_init_rd(struct ath
+- 	return 0;
+- }
+- 
+-+#ifdef CPTCFG_MAC80211_LEDS
+-+static const struct ieee80211_tpt_blink ath10k_tpt_blink[] = {
+-+	{ .throughput = 0 * 1024, .blink_time = 334 },
+-+	{ .throughput = 1 * 1024, .blink_time = 260 },
+-+	{ .throughput = 2 * 1024, .blink_time = 220 },
+-+	{ .throughput = 5 * 1024, .blink_time = 190 },
+-+	{ .throughput = 10 * 1024, .blink_time = 170 },
+-+	{ .throughput = 25 * 1024, .blink_time = 150 },
+-+	{ .throughput = 54 * 1024, .blink_time = 130 },
+-+	{ .throughput = 120 * 1024, .blink_time = 110 },
+-+	{ .throughput = 265 * 1024, .blink_time = 80 },
+-+	{ .throughput = 586 * 1024, .blink_time = 50 },
+-+};
+-+#endif
+-+
+- int ath10k_mac_register(struct ath10k *ar)
+- {
+- 	static const u32 cipher_suites[] = {
+-@@ -10267,6 +10282,12 @@ int ath10k_mac_register(struct ath10k *a
+- 
+- 	ar->hw->weight_multiplier = ATH10K_AIRTIME_WEIGHT_MULTIPLIER;
+- 
+-+#ifdef CPTCFG_MAC80211_LEDS
+-+	ieee80211_create_tpt_led_trigger(ar->hw,
+-+		IEEE80211_TPT_LEDTRIG_FL_RADIO, ath10k_tpt_blink,
+-+		ARRAY_SIZE(ath10k_tpt_blink));
+-+#endif
+-+
+- 	ret = ieee80211_register_hw(ar->hw);
+- 	if (ret) {
+- 		ath10k_err(ar, "failed to register ieee80211: %d\n", ret);
+diff --git a/package/kernel/mac80211/patches/ath10k/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch b/package/kernel/mac80211/patches/ath10k/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch
+deleted file mode 100644
+index 1c1630c051..0000000000
+--- a/package/kernel/mac80211/patches/ath10k/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch
++++ /dev/null
+@@ -1,609 +0,0 @@
+-From: Sebastian Gottschall <s.gottschall@newmedia-net.de>
+-
+-Adds LED and GPIO Control support for 988x, 9887, 9888, 99x0, 9984 based
+-chipsets with on chipset connected led's using WMI Firmware API.  The LED
+-device will get available named as "ath10k-phyX" at sysfs and can be controlled
+-with various triggers.  adds also debugfs interface for gpio control.
+-
+-This patch is specific for OpenWRt base, as is use old backported package
+-with old wireless source. Support for QCA9984 is removed and a simbol
+-is added to local-simbol file to export the actually compile the code 
+-with the ATH10K_LEDS simbol.
+-
+-
+-Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
+-Reviewed-by: Steve deRosier <derosier@cal-sierra.com>
+-[kvalo: major reorg and cleanup]
+-Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
+-Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
+----
+-
+-v13:
+-
+-* only compile tested!
+-
+-* fix all checkpatch warnings
+-
+-* fix commit log
+-
+-* sizeof(struct ath10k_gpiocontrol) -> sizeof(*gpio)
+-
+-* unsigned -> unsigned int
+-
+-* remove GPIOLIB code, that should be added in a separate patch
+-
+-* rename gpio.c to leds.c
+-
+-* add leds.h
+-
+-* rename some functions:
+-
+-  ath10k_attach_led() -> ath10k_leds_register()
+-  ath10k_unregister_led() -> ath10k_leds_unregister()
+-  ath10k_reset_led_pin() -> ath10k_leds_start()
+-
+-* call ath10k_leds_unregister() before ath10k_thermal_unregister() to preserve ordering
+-
+-* call ath10k_leds_start() only from ath10k_core_start() and not from mac.c
+-
+-* rename struct ath10k_gpiocontrol as anonymous function under struct
+-  ath10k::leds, no need for memory allocation
+-
+-* merge ath10k_add_led() to ath10k_attach_led(), which is it's only caller
+-
+-* remove #if IS_ENABLED() checks from most of places, memory savings from those were not worth it
+-
+-* Kconfig help text improvement and move it lower in the menu, also don't enable it by default
+-
+-* switch to set_brightness_blocking() so that the callback can sleep,
+-  then no need to use ath10k_wmi_cmd_send_nowait() and can take mutex
+-  to access ar->state
+-
+-* don't touch ath10k_wmi_pdev_get_temperature()
+-
+-* as QCA6174/QCA9377 are not (yet) supported don't add the command to WMI-TLV interface
+-
+-* remove debugfs interface, that should be added in another patch
+-
+-* cleanup includes
+-
+-
+- drivers/net/wireless/ath/ath10k/Kconfig   |  10 +++
+- drivers/net/wireless/ath/ath10k/Makefile  |   1 +
+- drivers/net/wireless/ath/ath10k/core.c    |  22 +++++++
+- drivers/net/wireless/ath/ath10k/core.h    |   9 ++-
+- drivers/net/wireless/ath/ath10k/hw.h      |   1 +
+- drivers/net/wireless/ath/ath10k/leds.c    | 103 ++++++++++++++++++++++++++++++
+- drivers/net/wireless/ath/ath10k/leds.h    |  45 +++++++++++++
+- drivers/net/wireless/ath/ath10k/mac.c     |   1 +
+- drivers/net/wireless/ath/ath10k/wmi-ops.h |  32 ++++++++++
+- drivers/net/wireless/ath/ath10k/wmi-tlv.c |   2 +
+- drivers/net/wireless/ath/ath10k/wmi.c     |  54 ++++++++++++++++
+- drivers/net/wireless/ath/ath10k/wmi.h     |  35 ++++++++++
+- 12 files changed, 314 insertions(+), 1 deletion(-)
+- create mode 100644 drivers/net/wireless/ath/ath10k/leds.c
+- create mode 100644 drivers/net/wireless/ath/ath10k/leds.h
+---- a/drivers/net/wireless/ath/ath10k/Kconfig
+-+++ b/drivers/net/wireless/ath/ath10k/Kconfig
+-@@ -71,6 +71,16 @@ config ATH10K_DEBUGFS
+- 
+- 	  If unsure, say Y to make it easier to debug problems.
+- 
+-+config ATH10K_LEDS
+-+	bool "Atheros ath10k LED support"
+-+	depends on ATH10K
+-+	select MAC80211_LEDS
+-+	select LEDS_CLASS
+-+	select NEW_LEDS
+-+	default y
+-+	---help---
+-+	  This option is necessary, if you want LED support for chipset connected led pins. If unsure, say N.
+-+
+- config ATH10K_SPECTRAL
+- 	bool "Atheros ath10k spectral scan support"
+- 	depends on ATH10K_DEBUGFS
+---- a/drivers/net/wireless/ath/ath10k/Makefile
+-+++ b/drivers/net/wireless/ath/ath10k/Makefile
+-@@ -19,6 +19,7 @@ ath10k_core-$(CPTCFG_ATH10K_SPECTRAL) +=
+- ath10k_core-$(CPTCFG_NL80211_TESTMODE) += testmode.o
+- ath10k_core-$(CPTCFG_ATH10K_TRACING) += trace.o
+- ath10k_core-$(CPTCFG_ATH10K_THERMAL) += thermal.o
+-+ath10k_core-$(CPTCFG_ATH10K_LEDS) += leds.o
+- ath10k_core-$(CPTCFG_MAC80211_DEBUGFS) += debugfs_sta.o
+- ath10k_core-$(CONFIG_PM) += wow.o
+- ath10k_core-$(CONFIG_DEV_COREDUMP) += coredump.o
+---- a/local-symbols
+-+++ b/local-symbols
+-@@ -162,6 +162,7 @@ ATH10K_DEBUG=
+- ATH10K_DEBUGFS=
+- ATH10K_SPECTRAL=
+- ATH10K_THERMAL=
+-+ATH10K_LEDS=
+- ATH10K_TRACING=
+- ATH10K_DFS_CERTIFIED=
+- WCN36XX=
+---- a/drivers/net/wireless/ath/ath10k/core.c
+-+++ b/drivers/net/wireless/ath/ath10k/core.c
+-@@ -26,6 +26,7 @@
+- #include "testmode.h"
+- #include "wmi-ops.h"
+- #include "coredump.h"
+-+#include "leds.h"
+- 
+- unsigned int ath10k_debug_mask;
+- EXPORT_SYMBOL(ath10k_debug_mask);
+-@@ -65,6 +66,7 @@ static const struct ath10k_hw_params ath
+- 		.dev_id = QCA988X_2_0_DEVICE_ID,
+- 		.bus = ATH10K_BUS_PCI,
+- 		.name = "qca988x hw2.0",
+-+		.led_pin = 1,
+- 		.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
+- 		.uart_pin = 7,
+- 		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
+-@@ -146,6 +148,7 @@ static const struct ath10k_hw_params ath
+- 		.dev_id = QCA9887_1_0_DEVICE_ID,
+- 		.bus = ATH10K_BUS_PCI,
+- 		.name = "qca9887 hw1.0",
+-+		.led_pin = 1,
+- 		.patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
+- 		.uart_pin = 7,
+- 		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
+-@@ -387,6 +390,7 @@ static const struct ath10k_hw_params ath
+- 		.dev_id = QCA99X0_2_0_DEVICE_ID,
+- 		.bus = ATH10K_BUS_PCI,
+- 		.name = "qca99x0 hw2.0",
+-+		.led_pin = 17,
+- 		.patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
+- 		.uart_pin = 7,
+- 		.otp_exe_param = 0x00000700,
+-@@ -433,6 +437,7 @@ static const struct ath10k_hw_params ath
+- 		.dev_id = QCA9984_1_0_DEVICE_ID,
+- 		.bus = ATH10K_BUS_PCI,
+- 		.name = "qca9984/qca9994 hw1.0",
+-+		.led_pin = 17,
+- 		.patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
+- 		.uart_pin = 7,
+- 		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
+-@@ -486,6 +491,7 @@ static const struct ath10k_hw_params ath
+- 		.dev_id = QCA9888_2_0_DEVICE_ID,
+- 		.bus = ATH10K_BUS_PCI,
+- 		.name = "qca9888 hw2.0",
+-+		.led_pin = 17,
+- 		.patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
+- 		.uart_pin = 7,
+- 		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
+-@@ -3231,6 +3237,10 @@ int ath10k_core_start(struct ath10k *ar,
+- 		goto err_hif_stop;
+- 	}
+- 
+-+	status = ath10k_leds_start(ar);
+-+	if (status)
+-+		goto err_hif_stop;
+-+
+- 	return 0;
+- 
+- err_hif_stop:
+-@@ -3489,9 +3499,18 @@ static void ath10k_core_register_work(st
+- 		goto err_spectral_destroy;
+- 	}
+- 
+-+	status = ath10k_leds_register(ar);
+-+	if (status) {
+-+		ath10k_err(ar, "could not register leds: %d\n",
+-+			   status);
+-+		goto err_thermal_unregister;
+-+	}
+-+
+- 	set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
+- 	return;
+- 
+-+err_thermal_unregister:
+-+	ath10k_thermal_unregister(ar);
+- err_spectral_destroy:
+- 	ath10k_spectral_destroy(ar);
+- err_debug_destroy:
+-@@ -3537,6 +3556,8 @@ void ath10k_core_unregister(struct ath10
+- 	if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
+- 		return;
+- 
+-+	ath10k_leds_unregister(ar);
+-+
+- 	ath10k_thermal_unregister(ar);
+- 	/* Stop spectral before unregistering from mac80211 to remove the
+- 	 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
+---- a/drivers/net/wireless/ath/ath10k/core.h
+-+++ b/drivers/net/wireless/ath/ath10k/core.h
+-@@ -14,6 +14,7 @@
+- #include <linux/pci.h>
+- #include <linux/uuid.h>
+- #include <linux/time.h>
+-+#include <linux/leds.h>
+- 
+- #include "htt.h"
+- #include "htc.h"
+-@@ -1253,6 +1254,13 @@ struct ath10k {
+- 	} testmode;
+- 
+- 	struct {
+-+		struct gpio_led wifi_led;
+-+		struct led_classdev cdev;
+-+		char label[48];
+-+		u32 gpio_state_pin;
+-+	} leds;
+-+
+-+	struct {
+- 		/* protected by data_lock */
+- 		u32 rx_crc_err_drop;
+- 		u32 fw_crash_counter;
+---- a/drivers/net/wireless/ath/ath10k/hw.h
+-+++ b/drivers/net/wireless/ath/ath10k/hw.h
+-@@ -519,6 +519,7 @@ struct ath10k_hw_params {
+- 	const char *name;
+- 	u32 patch_load_addr;
+- 	int uart_pin;
+-+	int led_pin;
+- 	u32 otp_exe_param;
+- 
+- 	/* Type of hw cycle counter wraparound logic, for more info
+---- /dev/null
+-+++ b/drivers/net/wireless/ath/ath10k/leds.c
+-@@ -0,0 +1,103 @@
+-+/*
+-+ * Copyright (c) 2005-2011 Atheros Communications Inc.
+-+ * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
+-+ * Copyright (c) 2018 Sebastian Gottschall <s.gottschall@dd-wrt.com>
+-+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
+-+ *
+-+ * Permission to use, copy, modify, and/or distribute this software for any
+-+ * purpose with or without fee is hereby granted, provided that the above
+-+ * copyright notice and this permission notice appear in all copies.
+-+ *
+-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+-+ */
+-+
+-+#include <linux/leds.h>
+-+
+-+#include "core.h"
+-+#include "wmi.h"
+-+#include "wmi-ops.h"
+-+
+-+#include "leds.h"
+-+
+-+static int ath10k_leds_set_brightness_blocking(struct led_classdev *led_cdev,
+-+					       enum led_brightness brightness)
+-+{
+-+	struct ath10k *ar = container_of(led_cdev, struct ath10k,
+-+					 leds.cdev);
+-+	struct gpio_led *led = &ar->leds.wifi_led;
+-+
+-+	mutex_lock(&ar->conf_mutex);
+-+
+-+	if (ar->state != ATH10K_STATE_ON)
+-+		goto out;
+-+
+-+	ar->leds.gpio_state_pin = (brightness != LED_OFF) ^ led->active_low;
+-+	ath10k_wmi_gpio_output(ar, led->gpio, ar->leds.gpio_state_pin);
+-+
+-+out:
+-+	mutex_unlock(&ar->conf_mutex);
+-+
+-+	return 0;
+-+}
+-+
+-+int ath10k_leds_start(struct ath10k *ar)
+-+{
+-+	if (ar->hw_params.led_pin == 0)
+-+		/* leds not supported */
+-+		return 0;
+-+
+-+	/* under some circumstances, the gpio pin gets reconfigured
+-+	 * to default state by the firmware, so we need to
+-+	 * reconfigure it this behaviour has only ben seen on
+-+	 * QCA9984 and QCA99XX devices so far
+-+	 */
+-+	ath10k_wmi_gpio_config(ar, ar->hw_params.led_pin, 0,
+-+			       WMI_GPIO_PULL_NONE, WMI_GPIO_INTTYPE_DISABLE);
+-+	ath10k_wmi_gpio_output(ar, ar->hw_params.led_pin, 1);
+-+
+-+	return 0;
+-+}
+-+
+-+int ath10k_leds_register(struct ath10k *ar)
+-+{
+-+	int ret;
+-+
+-+	if (ar->hw_params.led_pin == 0)
+-+		/* leds not supported */
+-+		return 0;
+-+
+-+	snprintf(ar->leds.label, sizeof(ar->leds.label), "ath10k-%s",
+-+		 wiphy_name(ar->hw->wiphy));
+-+	ar->leds.wifi_led.active_low = 1;
+-+	ar->leds.wifi_led.gpio = ar->hw_params.led_pin;
+-+	ar->leds.wifi_led.name = ar->leds.label;
+-+	ar->leds.wifi_led.default_state = LEDS_GPIO_DEFSTATE_KEEP;
+-+
+-+	ar->leds.cdev.name = ar->leds.label;
+-+	ar->leds.cdev.brightness_set_blocking = ath10k_leds_set_brightness_blocking;
+-+
+-+	/* FIXME: this assignment doesn't make sense as it's NULL, remove it? */
+-+	ar->leds.cdev.default_trigger = ar->leds.wifi_led.default_trigger;
+-+
+-+	ret = led_classdev_register(wiphy_dev(ar->hw->wiphy), &ar->leds.cdev);
+-+	if (ret)
+-+		return ret;
+-+
+-+	return 0;
+-+}
+-+
+-+void ath10k_leds_unregister(struct ath10k *ar)
+-+{
+-+	if (ar->hw_params.led_pin == 0)
+-+		/* leds not supported */
+-+		return;
+-+
+-+	led_classdev_unregister(&ar->leds.cdev);
+-+}
+-+
+---- /dev/null
+-+++ b/drivers/net/wireless/ath/ath10k/leds.h
+-@@ -0,0 +1,41 @@
+-+/*
+-+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
+-+ *
+-+ * Permission to use, copy, modify, and/or distribute this software for any
+-+ * purpose with or without fee is hereby granted, provided that the above
+-+ * copyright notice and this permission notice appear in all copies.
+-+ *
+-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+-+ */
+-+#ifndef _LEDS_H_
+-+#define _LEDS_H_
+-+
+-+#include "core.h"
+-+
+-+#ifdef CPTCFG_ATH10K_LEDS
+-+void ath10k_leds_unregister(struct ath10k *ar);
+-+int ath10k_leds_start(struct ath10k *ar);
+-+int ath10k_leds_register(struct ath10k *ar);
+-+#else
+-+static inline void ath10k_leds_unregister(struct ath10k *ar)
+-+{
+-+}
+-+
+-+static inline int ath10k_leds_start(struct ath10k *ar)
+-+{
+-+	return 0;
+-+}
+-+
+-+static inline int ath10k_leds_register(struct ath10k *ar)
+-+{
+-+	return 0;
+-+}
+-+
+-+#endif
+-+#endif /* _LEDS_H_ */
+---- a/drivers/net/wireless/ath/ath10k/mac.c
+-+++ b/drivers/net/wireless/ath/ath10k/mac.c
+-@@ -24,6 +24,7 @@
+- #include "wmi-tlv.h"
+- #include "wmi-ops.h"
+- #include "wow.h"
+-+#include "leds.h"
+- 
+- /*********/
+- /* Rates */
+---- a/drivers/net/wireless/ath/ath10k/wmi-ops.h
+-+++ b/drivers/net/wireless/ath/ath10k/wmi-ops.h
+-@@ -226,7 +226,10 @@ struct wmi_ops {
+- 			 const struct wmi_bb_timing_cfg_arg *arg);
+- 	struct sk_buff *(*gen_per_peer_per_tid_cfg)(struct ath10k *ar,
+- 						    const struct wmi_per_peer_per_tid_cfg_arg *arg);
+-+	struct sk_buff *(*gen_gpio_config)(struct ath10k *ar, u32 gpio_num,
+-+					   u32 input, u32 pull_type, u32 intr_mode);
+- 
+-+	struct sk_buff *(*gen_gpio_output)(struct ath10k *ar, u32 gpio_num, u32 set);
+- };
+- 
+- int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id);
+-@@ -1122,6 +1125,35 @@ ath10k_wmi_force_fw_hang(struct ath10k *
+- 	return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->force_fw_hang_cmdid);
+- }
+- 
+-+static inline int ath10k_wmi_gpio_config(struct ath10k *ar, u32 gpio_num,
+-+					 u32 input, u32 pull_type, u32 intr_mode)
+-+{
+-+	struct sk_buff *skb;
+-+
+-+	if (!ar->wmi.ops->gen_gpio_config)
+-+		return -EOPNOTSUPP;
+-+
+-+	skb = ar->wmi.ops->gen_gpio_config(ar, gpio_num, input, pull_type, intr_mode);
+-+	if (IS_ERR(skb))
+-+		return PTR_ERR(skb);
+-+
+-+	return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->gpio_config_cmdid);
+-+}
+-+
+-+static inline int ath10k_wmi_gpio_output(struct ath10k *ar, u32 gpio_num, u32 set)
+-+{
+-+	struct sk_buff *skb;
+-+
+-+	if (!ar->wmi.ops->gen_gpio_config)
+-+		return -EOPNOTSUPP;
+-+
+-+	skb = ar->wmi.ops->gen_gpio_output(ar, gpio_num, set);
+-+	if (IS_ERR(skb))
+-+		return PTR_ERR(skb);
+-+
+-+	return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->gpio_output_cmdid);
+-+}
+-+
+- static inline int
+- ath10k_wmi_dbglog_cfg(struct ath10k *ar, u64 module_enable, u32 log_level)
+- {
+---- a/drivers/net/wireless/ath/ath10k/wmi-tlv.c
+-+++ b/drivers/net/wireless/ath/ath10k/wmi-tlv.c
+-@@ -4594,6 +4594,8 @@ static const struct wmi_ops wmi_tlv_ops
+- 	.gen_echo = ath10k_wmi_tlv_op_gen_echo,
+- 	.gen_vdev_spectral_conf = ath10k_wmi_tlv_op_gen_vdev_spectral_conf,
+- 	.gen_vdev_spectral_enable = ath10k_wmi_tlv_op_gen_vdev_spectral_enable,
+-+	/* .gen_gpio_config not implemented */
+-+	/* .gen_gpio_output not implemented */
+- };
+- 
+- static const struct wmi_peer_flags_map wmi_tlv_peer_flags_map = {
+---- a/drivers/net/wireless/ath/ath10k/wmi.c
+-+++ b/drivers/net/wireless/ath/ath10k/wmi.c
+-@@ -7472,6 +7472,49 @@ ath10k_wmi_op_gen_peer_set_param(struct
+- 	return skb;
+- }
+- 
+-+static struct sk_buff *ath10k_wmi_op_gen_gpio_config(struct ath10k *ar,
+-+						     u32 gpio_num, u32 input,
+-+						     u32 pull_type, u32 intr_mode)
+-+{
+-+	struct wmi_gpio_config_cmd *cmd;
+-+	struct sk_buff *skb;
+-+
+-+	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
+-+	if (!skb)
+-+		return ERR_PTR(-ENOMEM);
+-+
+-+	cmd = (struct wmi_gpio_config_cmd *)skb->data;
+-+	cmd->pull_type = __cpu_to_le32(pull_type);
+-+	cmd->gpio_num = __cpu_to_le32(gpio_num);
+-+	cmd->input = __cpu_to_le32(input);
+-+	cmd->intr_mode = __cpu_to_le32(intr_mode);
+-+
+-+	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi gpio_config gpio_num 0x%08x input 0x%08x pull_type 0x%08x intr_mode 0x%08x\n",
+-+		   gpio_num, input, pull_type, intr_mode);
+-+
+-+	return skb;
+-+}
+-+
+-+static struct sk_buff *ath10k_wmi_op_gen_gpio_output(struct ath10k *ar,
+-+						     u32 gpio_num, u32 set)
+-+{
+-+	struct wmi_gpio_output_cmd *cmd;
+-+	struct sk_buff *skb;
+-+
+-+	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
+-+	if (!skb)
+-+		return ERR_PTR(-ENOMEM);
+-+
+-+	cmd = (struct wmi_gpio_output_cmd *)skb->data;
+-+	cmd->gpio_num = __cpu_to_le32(gpio_num);
+-+	cmd->set = __cpu_to_le32(set);
+-+
+-+	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi gpio_output gpio_num 0x%08x set 0x%08x\n",
+-+		   gpio_num, set);
+-+
+-+	return skb;
+-+}
+-+
+- static struct sk_buff *
+- ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
+- 			     enum wmi_sta_ps_mode psmode)
+-@@ -9160,6 +9203,9 @@ static const struct wmi_ops wmi_ops = {
+- 	.fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
+- 	.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
+- 	.gen_echo = ath10k_wmi_op_gen_echo,
+-+	.gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
+-+	.gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
+-+
+- 	/* .gen_bcn_tmpl not implemented */
+- 	/* .gen_prb_tmpl not implemented */
+- 	/* .gen_p2p_go_bcn_ie not implemented */
+-@@ -9230,6 +9276,8 @@ static const struct wmi_ops wmi_10_1_ops
+- 	.fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
+- 	.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
+- 	.gen_echo = ath10k_wmi_op_gen_echo,
+-+	.gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
+-+	.gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
+- 	/* .gen_bcn_tmpl not implemented */
+- 	/* .gen_prb_tmpl not implemented */
+- 	/* .gen_p2p_go_bcn_ie not implemented */
+-@@ -9302,6 +9350,8 @@ static const struct wmi_ops wmi_10_2_ops
+- 	.gen_delba_send = ath10k_wmi_op_gen_delba_send,
+- 	.fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
+- 	.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
+-+	.gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
+-+	.gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
+- 	/* .gen_pdev_enable_adaptive_cca not implemented */
+- };
+- 
+-@@ -9373,6 +9423,8 @@ static const struct wmi_ops wmi_10_2_4_o
+- 		ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
+- 	.get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
+- 	.gen_bb_timing = ath10k_wmi_10_2_4_op_gen_bb_timing,
+-+	.gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
+-+	.gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
+- 	/* .gen_bcn_tmpl not implemented */
+- 	/* .gen_prb_tmpl not implemented */
+- 	/* .gen_p2p_go_bcn_ie not implemented */
+-@@ -9454,6 +9506,8 @@ static const struct wmi_ops wmi_10_4_ops
+- 	.gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
+- 	.gen_echo = ath10k_wmi_op_gen_echo,
+- 	.gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
+-+	.gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
+-+	.gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
+- };
+- 
+- int ath10k_wmi_attach(struct ath10k *ar)
+---- a/drivers/net/wireless/ath/ath10k/wmi.h
+-+++ b/drivers/net/wireless/ath/ath10k/wmi.h
+-@@ -3030,6 +3030,41 @@ enum wmi_10_4_feature_mask {
+- 
+- };
+- 
+-+/* WMI_GPIO_CONFIG_CMDID */
+-+enum {
+-+	WMI_GPIO_PULL_NONE,
+-+	WMI_GPIO_PULL_UP,
+-+	WMI_GPIO_PULL_DOWN,
+-+};
+-+
+-+enum {
+-+	WMI_GPIO_INTTYPE_DISABLE,
+-+	WMI_GPIO_INTTYPE_RISING_EDGE,
+-+	WMI_GPIO_INTTYPE_FALLING_EDGE,
+-+	WMI_GPIO_INTTYPE_BOTH_EDGE,
+-+	WMI_GPIO_INTTYPE_LEVEL_LOW,
+-+	WMI_GPIO_INTTYPE_LEVEL_HIGH
+-+};
+-+
+-+/* WMI_GPIO_CONFIG_CMDID */
+-+struct wmi_gpio_config_cmd {
+-+	__le32 gpio_num;             /* GPIO number to be setup */
+-+	__le32 input;                /* 0 - Output/ 1 - Input */
+-+	__le32 pull_type;            /* Pull type defined above */
+-+	__le32 intr_mode;            /* Interrupt mode defined above (Input) */
+-+} __packed;
+-+
+-+/* WMI_GPIO_OUTPUT_CMDID */
+-+struct wmi_gpio_output_cmd {
+-+	__le32 gpio_num;    /* GPIO number to be setup */
+-+	__le32 set;         /* Set the GPIO pin*/
+-+} __packed;
+-+
+-+/* WMI_GPIO_INPUT_EVENTID */
+-+struct wmi_gpio_input_event {
+-+	__le32 gpio_num;    /* GPIO number which changed state */
+-+} __packed;
+-+
+- struct wmi_ext_resource_config_10_4_cmd {
+- 	/* contains enum wmi_host_platform_type */
+- 	__le32 host_platform_config;
+diff --git a/package/kernel/mac80211/patches/ath10k/975-ath10k-use-tpt-trigger-by-default.patch b/package/kernel/mac80211/patches/ath10k/975-ath10k-use-tpt-trigger-by-default.patch
+deleted file mode 100644
+index 4c1f9aa815..0000000000
+--- a/package/kernel/mac80211/patches/ath10k/975-ath10k-use-tpt-trigger-by-default.patch
++++ /dev/null
+@@ -1,53 +0,0 @@
+-From 79c9d7aabae1d1da9eea97d83b61e1517a8a2221 Mon Sep 17 00:00:00 2001
+-From: Mathias Kresin <dev@kresin.me>
+-Date: Fri, 22 Jun 2018 18:59:44 +0200
+-Subject: [PATCH] ath10k: use tpt LED trigger by default
+-
+-Use the tpt LED trigger for each created phy led. Ths way LEDs attached
+-to the ath10k GPIO pins are indicating the phy status and blink on
+-traffic.
+-
+-Signed-off-by: Mathias Kresin <dev@kresin.me>
+----
+- drivers/net/wireless/ath/ath10k/core.h | 4 ++++
+- drivers/net/wireless/ath/ath10k/leds.c | 4 +---
+- drivers/net/wireless/ath/ath10k/mac.c  | 2 +-
+- 3 files changed, 6 insertions(+), 4 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath10k/core.h
+-+++ b/drivers/net/wireless/ath/ath10k/core.h
+-@@ -1309,6 +1309,10 @@ struct ath10k {
+- 	s32 tx_power_2g_limit;
+- 	s32 tx_power_5g_limit;
+- 
+-+#ifdef CPTCFG_MAC80211_LEDS
+-+	const char *led_default_trigger;
+-+#endif
+-+
+- 	/* must be last */
+- 	u8 drv_priv[] __aligned(sizeof(void *));
+- };
+---- a/drivers/net/wireless/ath/ath10k/leds.c
+-+++ b/drivers/net/wireless/ath/ath10k/leds.c
+-@@ -81,9 +81,7 @@ int ath10k_leds_register(struct ath10k *
+- 
+- 	ar->leds.cdev.name = ar->leds.label;
+- 	ar->leds.cdev.brightness_set_blocking = ath10k_leds_set_brightness_blocking;
+--
+--	/* FIXME: this assignment doesn't make sense as it's NULL, remove it? */
+--	ar->leds.cdev.default_trigger = ar->leds.wifi_led.default_trigger;
+-+	ar->leds.cdev.default_trigger = ar->led_default_trigger;
+- 
+- 	ret = led_classdev_register(wiphy_dev(ar->hw->wiphy), &ar->leds.cdev);
+- 	if (ret)
+---- a/drivers/net/wireless/ath/ath10k/mac.c
+-+++ b/drivers/net/wireless/ath/ath10k/mac.c
+-@@ -10284,7 +10284,7 @@ int ath10k_mac_register(struct ath10k *a
+- 	ar->hw->weight_multiplier = ATH10K_AIRTIME_WEIGHT_MULTIPLIER;
+- 
+- #ifdef CPTCFG_MAC80211_LEDS
+--	ieee80211_create_tpt_led_trigger(ar->hw,
+-+	ar->led_default_trigger = ieee80211_create_tpt_led_trigger(ar->hw,
+- 		IEEE80211_TPT_LEDTRIG_FL_RADIO, ath10k_tpt_blink,
+- 		ARRAY_SIZE(ath10k_tpt_blink));
+- #endif
+diff --git a/package/kernel/mac80211/patches/ath10k/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch b/package/kernel/mac80211/patches/ath10k/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch
+deleted file mode 100644
+index 3626debf19..0000000000
+--- a/package/kernel/mac80211/patches/ath10k/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch
++++ /dev/null
+@@ -1,101 +0,0 @@
+-From: Sven Eckelmann <seckelmann@datto.com>
+-Date: Wed, 28 Nov 2018 16:16:27 +0100
+-Subject: ath10k: adjust tx power reduction for US regulatory domain
+-
+-FCC allows maximum antenna gain of 6 dBi. 15.247(b)(4):
+-
+-> (4) The conducted output power limit
+-> specified in paragraph (b) of this section
+-> is based on the use of antennas
+-> with directional gains that do not exceed
+-> 6 dBi. Except as shown in paragraph
+-> (c) of this section, if transmitting
+-> antennas of directional gain greater
+-> than 6 dBi are used, the conducted
+-> output power from the intentional radiator
+-> shall be reduced below the stated
+-> values in paragraphs (b)(1), (b)(2),
+-> and (b)(3) of this section, as appropriate,
+-> by the amount in dB that the
+-> directional gain of the antenna exceeds
+-> 6 dBi.
+-
+-https://www.gpo.gov/fdsys/pkg/CFR-2013-title47-vol1/pdf/CFR-2013-title47-vol1-sec15-247.pdf
+-
+-Signed-off-by: Sven Eckelmann <seckelmann@datto.com>
+-
+-Forwarded: no
+-
+---- a/drivers/net/wireless/ath/ath10k/mac.c
+-+++ b/drivers/net/wireless/ath/ath10k/mac.c
+-@@ -1028,6 +1028,40 @@ static inline int ath10k_vdev_setup_sync
+- 	return ar->last_wmi_vdev_start_status;
+- }
+- 
+-+static u32 ath10k_get_max_antenna_gain(struct ath10k *ar,
+-+				       u32 ch_max_antenna_gain)
+-+{
+-+	u32 max_antenna_gain;
+-+
+-+	if (ar->dfs_detector && ar->dfs_detector->region == NL80211_DFS_FCC) {
+-+		/* FCC allows maximum antenna gain of 6 dBi. 15.247(b)(4):
+-+		 *
+-+		 * > (4) The conducted output power limit
+-+		 * > specified in paragraph (b) of this section
+-+		 * > is based on the use of antennas
+-+		 * > with directional gains that do not exceed
+-+		 * > 6 dBi. Except as shown in paragraph
+-+		 * > (c) of this section, if transmitting
+-+		 * > antennas of directional gain greater
+-+		 * > than 6 dBi are used, the conducted
+-+		 * > output power from the intentional radiator
+-+		 * > shall be reduced below the stated
+-+		 * > values in paragraphs (b)(1), (b)(2),
+-+		 * > and (b)(3) of this section, as appropriate,
+-+		 * > by the amount in dB that the
+-+		 * > directional gain of the antenna exceeds
+-+		 * > 6 dBi.
+-+		 *
+-+		 * https://www.gpo.gov/fdsys/pkg/CFR-2013-title47-vol1/pdf/CFR-2013-title47-vol1-sec15-247.pdf
+-+		 */
+-+		max_antenna_gain = 6;
+-+	} else {
+-+		max_antenna_gain = 0;
+-+	}
+-+
+-+	return max(ch_max_antenna_gain, max_antenna_gain);
+-+}
+-+
+- static int ath10k_monitor_vdev_start(struct ath10k *ar, int vdev_id)
+- {
+- 	struct cfg80211_chan_def *chandef = NULL;
+-@@ -1060,7 +1094,8 @@ static int ath10k_monitor_vdev_start(str
+- 	arg.channel.min_power = 0;
+- 	arg.channel.max_power = channel->max_power * 2;
+- 	arg.channel.max_reg_power = channel->max_reg_power * 2;
+--	arg.channel.max_antenna_gain = channel->max_antenna_gain;
+-+	arg.channel.max_antenna_gain = ath10k_get_max_antenna_gain(ar,
+-+						channel->max_antenna_gain);
+- 
+- 	reinit_completion(&ar->vdev_setup_done);
+- 	reinit_completion(&ar->vdev_delete_done);
+-@@ -1506,7 +1541,8 @@ static int ath10k_vdev_start_restart(str
+- 	arg.channel.min_power = 0;
+- 	arg.channel.max_power = chandef->chan->max_power * 2;
+- 	arg.channel.max_reg_power = chandef->chan->max_reg_power * 2;
+--	arg.channel.max_antenna_gain = chandef->chan->max_antenna_gain;
+-+	arg.channel.max_antenna_gain = ath10k_get_max_antenna_gain(ar,
+-+					chandef->chan->max_antenna_gain);
+- 
+- 	if (arvif->vdev_type == WMI_VDEV_TYPE_AP) {
+- 		arg.ssid = arvif->u.ap.ssid;
+-@@ -3437,7 +3473,8 @@ static int ath10k_update_channel_list(st
+- 			ch->min_power = 0;
+- 			ch->max_power = channel->max_power * 2;
+- 			ch->max_reg_power = channel->max_reg_power * 2;
+--			ch->max_antenna_gain = channel->max_antenna_gain;
+-+			ch->max_antenna_gain = ath10k_get_max_antenna_gain(ar,
+-+						channel->max_antenna_gain);
+- 			ch->reg_class_id = 0; /* FIXME */
+- 
+- 			/* FIXME: why use only legacy modes, why not any
+diff --git a/package/kernel/mac80211/patches/ath10k/984-ath10k-Try-to-get-mac-address-from-dts.patch b/package/kernel/mac80211/patches/ath10k/984-ath10k-Try-to-get-mac-address-from-dts.patch
+deleted file mode 100644
+index 084e28a2d9..0000000000
+--- a/package/kernel/mac80211/patches/ath10k/984-ath10k-Try-to-get-mac-address-from-dts.patch
++++ /dev/null
+@@ -1,37 +0,0 @@
+-From 22fb5991a44c78ff18ec0082dc90c809356eb893 Mon Sep 17 00:00:00 2001
+-From: Ansuel Smith <ansuelsmth@gmail.com>
+-Date: Sun, 27 Sep 2020 19:23:35 +0200
+-Subject: [PATCH 1/2] ath10k: Try to get mac-address from dts
+-
+-Most of embedded device that have the ath10k wifi integrated store the
+-mac-address in nvmem partitions. Try to fetch the mac-address using the
+-standard 'of_get_mac_address' than in all the check also try to fetch the
+-address using the nvmem api searching for a defined 'mac-address' cell.
+-Mac-address defined in the dts have priority than any other address found.
+-
+-Tested-on: QCA9984 hw1.0 PCI 10.4
+-
+-Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
+----
+- drivers/net/wireless/ath/ath10k/core.c | 10 ++++++++++
+- 1 file changed, 10 insertions(+)
+-
+---- a/drivers/net/wireless/ath/ath10k/core.c
+-+++ b/drivers/net/wireless/ath/ath10k/core.c
+-@@ -8,6 +8,7 @@
+- #include <linux/module.h>
+- #include <linux/firmware.h>
+- #include <linux/of.h>
+-+#include <linux/of_net.h>
+- #include <linux/property.h>
+- #include <linux/dmi.h>
+- #include <linux/ctype.h>
+-@@ -3407,6 +3408,8 @@ static int ath10k_core_probe_fw(struct a
+- 
+- 	device_get_mac_address(ar->dev, ar->mac_addr);
+- 
+-+	of_get_mac_address(ar->dev->of_node, ar->mac_addr);
+-+
+- 	ret = ath10k_core_init_firmware_features(ar);
+- 	if (ret) {
+- 		ath10k_err(ar, "fatal problem with firmware features: %d\n",
+diff --git a/package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch b/package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch
+deleted file mode 100644
+index 2f560c70a0..0000000000
+--- a/package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch
++++ /dev/null
+@@ -1,64 +0,0 @@
+---- a/drivers/net/wireless/ath/ath10k/htt.h
+-+++ b/drivers/net/wireless/ath/ath10k/htt.h
+-@@ -235,7 +235,11 @@ enum htt_rx_ring_flags {
+- };
+- 
+- #define HTT_RX_RING_SIZE_MIN 128
+-+#ifndef CONFIG_ATH10K_SMALLBUFFERS
+- #define HTT_RX_RING_SIZE_MAX 2048
+-+#else
+-+#define HTT_RX_RING_SIZE_MAX 512
+-+#endif
+- #define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX
+- #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
+- #define HTT_RX_RING_FILL_LEVEL_DUAL_MAC (HTT_RX_RING_SIZE - 1)
+---- a/drivers/net/wireless/ath/ath10k/pci.c
+-+++ b/drivers/net/wireless/ath/ath10k/pci.c
+-@@ -131,7 +131,11 @@ static const struct ce_attr pci_host_ce_
+- 		.flags = CE_ATTR_FLAGS,
+- 		.src_nentries = 0,
+- 		.src_sz_max = 2048,
+-+#ifndef CONFIG_ATH10K_SMALLBUFFERS
+- 		.dest_nentries = 512,
+-+#else
+-+		.dest_nentries = 128,
+-+#endif
+- 		.recv_cb = ath10k_pci_htt_htc_rx_cb,
+- 	},
+- 
+-@@ -140,7 +144,11 @@ static const struct ce_attr pci_host_ce_
+- 		.flags = CE_ATTR_FLAGS,
+- 		.src_nentries = 0,
+- 		.src_sz_max = 2048,
+-+#ifndef CONFIG_ATH10K_SMALLBUFFERS
+- 		.dest_nentries = 128,
+-+#else
+-+		.dest_nentries = 64,
+-+#endif
+- 		.recv_cb = ath10k_pci_htc_rx_cb,
+- 	},
+- 
+-@@ -167,7 +175,11 @@ static const struct ce_attr pci_host_ce_
+- 		.flags = CE_ATTR_FLAGS,
+- 		.src_nentries = 0,
+- 		.src_sz_max = 512,
+-+#ifndef CONFIG_ATH10K_SMALLBUFFERS
+- 		.dest_nentries = 512,
+-+#else
+-+		.dest_nentries = 128,
+-+#endif
+- 		.recv_cb = ath10k_pci_htt_rx_cb,
+- 	},
+- 
+-@@ -192,7 +204,11 @@ static const struct ce_attr pci_host_ce_
+- 		.flags = CE_ATTR_FLAGS,
+- 		.src_nentries = 0,
+- 		.src_sz_max = 2048,
+-+#ifndef CONFIG_ATH10K_SMALLBUFFERS
+- 		.dest_nentries = 128,
+-+#else
+-+		.dest_nentries = 96,
+-+#endif
+- 		.recv_cb = ath10k_pci_pktlog_rx_cb,
+- 	},
+- 
+diff --git a/package/kernel/mac80211/patches/ath11k/0001-wifi-ath11k-stop-tx-queues-immediately-upon-firmware.patch b/package/kernel/mac80211/patches/ath11k/0001-wifi-ath11k-stop-tx-queues-immediately-upon-firmware.patch
+deleted file mode 100644
+index d0dc04febf..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0001-wifi-ath11k-stop-tx-queues-immediately-upon-firmware.patch
++++ /dev/null
+@@ -1,78 +0,0 @@
+-From 81e60b2dfb2744ab6642c4aa62534b4f711fdc5d Mon Sep 17 00:00:00 2001
+-From: Aditya Kumar Singh <quic_adisi@quicinc.com>
+-Date: Tue, 27 Sep 2022 09:18:54 +0300
+-Subject: [PATCH] wifi: ath11k: stop tx queues immediately upon firmware exit
+-
+-Currently, recovery flag is set immediately upon firmware
+-exit but tx queues are stopped once firmware arrives back
+-and is ready which is during ath11k_core_restart. Once
+-ieee80211 hw restart is completed, tx queues are resumed.
+-If during the time delta between firmware exit and firmware
+-ready, mac80211 send packets, currently ath11k will drop it
+-since recovery flag will be set. But warning prints will
+-come -
+-  "ath11k c000000.wifi: failed to transmit frame -108"
+-
+-If more tx packets are there, this could lead to flooding
+-of above print.
+-
+-However, actually tx queues should be stopped immediately
+-when firmware leaves. This will prevent packets to get
+-dropped when firmware is recovering.
+-
+-Add fix to stop tx queues immediately after firmware exit.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20220923170235.18873-1-quic_adisi@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/core.c | 5 +----
+- drivers/net/wireless/ath/ath11k/core.h | 1 +
+- drivers/net/wireless/ath/ath11k/qmi.c  | 3 +++
+- 3 files changed, 5 insertions(+), 4 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/core.c
+-+++ b/drivers/net/wireless/ath/ath11k/core.c
+-@@ -1641,7 +1641,7 @@ static void ath11k_update_11d(struct wor
+- 	}
+- }
+- 
+--static void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab)
+-+void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab)
+- {
+- 	struct ath11k *ar;
+- 	struct ath11k_pdev *pdev;
+-@@ -1730,9 +1730,6 @@ static void ath11k_core_restart(struct w
+- 	struct ath11k_base *ab = container_of(work, struct ath11k_base, restart_work);
+- 	int ret;
+- 
+--	if (!ab->is_reset)
+--		ath11k_core_pre_reconfigure_recovery(ab);
+--
+- 	ret = ath11k_core_reconfigure_on_crash(ab);
+- 	if (ret) {
+- 		ath11k_err(ab, "failed to reconfigure driver on crash recovery\n");
+---- a/drivers/net/wireless/ath/ath11k/core.h
+-+++ b/drivers/net/wireless/ath/ath11k/core.h
+-@@ -1158,6 +1158,7 @@ int ath11k_core_check_smbios(struct ath1
+- void ath11k_core_halt(struct ath11k *ar);
+- int ath11k_core_resume(struct ath11k_base *ab);
+- int ath11k_core_suspend(struct ath11k_base *ab);
+-+void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab);
+- 
+- const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
+- 						    const char *filename);
+---- a/drivers/net/wireless/ath/ath11k/qmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/qmi.c
+-@@ -3164,6 +3164,9 @@ static void ath11k_qmi_driver_event_work
+- 		case ATH11K_QMI_EVENT_SERVER_EXIT:
+- 			set_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags);
+- 			set_bit(ATH11K_FLAG_RECOVERY, &ab->dev_flags);
+-+
+-+			if (!ab->is_reset)
+-+				ath11k_core_pre_reconfigure_recovery(ab);
+- 			break;
+- 		case ATH11K_QMI_EVENT_REQUEST_MEM:
+- 			ret = ath11k_qmi_event_mem_request(qmi);
+diff --git a/package/kernel/mac80211/patches/ath11k/0002-wifi-ath11k-Don-t-exit-on-wakeup-failure.patch b/package/kernel/mac80211/patches/ath11k/0002-wifi-ath11k-Don-t-exit-on-wakeup-failure.patch
+deleted file mode 100644
+index 47385e0458..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0002-wifi-ath11k-Don-t-exit-on-wakeup-failure.patch
++++ /dev/null
+@@ -1,45 +0,0 @@
+-From 45d2e268369b0c768d5a644f319758bcfd370521 Mon Sep 17 00:00:00 2001
+-From: Baochen Qiang <quic_bqiang@quicinc.com>
+-Date: Wed, 28 Sep 2022 09:51:40 +0800
+-Subject: [PATCH] wifi: ath11k: Don't exit on wakeup failure
+-
+-Currently, ath11k_pcic_read() returns an error if wakeup()
+-fails, this makes firmware crash debug quite hard because we can
+-get nothing.
+-
+-Change to go ahead on wakeup failure, in that case we still may
+-get something valid to check. There should be no mislead due
+-to incorrect content because we are aware of the failure with the
+-log printed.
+-
+-Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
+-
+-Signed-off-by: Baochen Qiang <quic_bqiang@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20220928015140.5431-1-quic_bqiang@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/pcic.c | 13 ++++++++++---
+- 1 file changed, 10 insertions(+), 3 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/pcic.c
+-+++ b/drivers/net/wireless/ath/ath11k/pcic.c
+-@@ -218,9 +218,16 @@ int ath11k_pcic_read(struct ath11k_base
+- 	if (wakeup_required && ab->pci.ops->wakeup) {
+- 		ret = ab->pci.ops->wakeup(ab);
+- 		if (ret) {
+--			ath11k_warn(ab, "failed to wakeup for read from 0x%x: %d\n",
+--				    start, ret);
+--			return ret;
+-+			ath11k_warn(ab,
+-+				    "wakeup failed, data may be invalid: %d",
+-+				    ret);
+-+			/* Even though wakeup() failed, continue processing rather
+-+			 * than returning because some parts of the data may still
+-+			 * be valid and useful in some cases, e.g. could give us
+-+			 * some clues on firmware crash.
+-+			 * Mislead due to invalid data could be avoided because we
+-+			 * are aware of the wakeup failure.
+-+			 */
+- 		}
+- 	}
+- 
+diff --git a/package/kernel/mac80211/patches/ath11k/0005-wifi-ath11k-Fix-spelling-mistake-chnange-change.patch b/package/kernel/mac80211/patches/ath11k/0005-wifi-ath11k-Fix-spelling-mistake-chnange-change.patch
+deleted file mode 100644
+index 4b52252ef3..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0005-wifi-ath11k-Fix-spelling-mistake-chnange-change.patch
++++ /dev/null
+@@ -1,25 +0,0 @@
+-From a797f479bf3e02c6d179c2e6aeace7f9b22b0acd Mon Sep 17 00:00:00 2001
+-From: Colin Ian King <colin.i.king@gmail.com>
+-Date: Wed, 28 Sep 2022 15:38:34 +0100
+-Subject: [PATCH] wifi: ath11k: Fix spelling mistake "chnange" -> "change"
+-
+-There is a spelling mistake in an ath11k_dbg debug message. Fix it.
+-
+-Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20220928143834.35189-1-colin.i.king@gmail.com
+----
+- drivers/net/wireless/ath/ath11k/wmi.c | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/wmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
+-@@ -6829,7 +6829,7 @@ static void ath11k_wmi_event_peer_sta_ps
+- 	}
+- 
+- 	ath11k_dbg(ab, ATH11K_DBG_WMI,
+--		   "peer sta ps chnange ev addr %pM state %u sup_bitmap %x ps_valid %u ts %u\n",
+-+		   "peer sta ps change ev addr %pM state %u sup_bitmap %x ps_valid %u ts %u\n",
+- 		   ev->peer_macaddr.addr, ev->peer_ps_state,
+- 		   ev->ps_supported_bitmap, ev->peer_ps_valid,
+- 		   ev->peer_ps_timestamp);
+diff --git a/package/kernel/mac80211/patches/ath11k/0007-wifi-ath11k-suppress-add-interface-error.patch b/package/kernel/mac80211/patches/ath11k/0007-wifi-ath11k-suppress-add-interface-error.patch
+deleted file mode 100644
+index fbef0abb8d..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0007-wifi-ath11k-suppress-add-interface-error.patch
++++ /dev/null
+@@ -1,52 +0,0 @@
+-From 638b26652b0438563a76ec90014c8cba34db982b Mon Sep 17 00:00:00 2001
+-From: Karthikeyan Periyasamy <quic_periyasa@quicinc.com>
+-Date: Thu, 6 Oct 2022 06:28:42 +0530
+-Subject: [PATCH 7/9] wifi: ath11k: suppress add interface error
+-
+-In the VIF (other than monitor type) creation request, we should not
+-throw the error code when the monitor VIF creation fails, since the
+-actual VIF creation succeeds. If we throw the error code from driver
+-then the actual VIF creation get fail. So suppress the monitor VIF
+-creation error by throwing warning message instead of error code.
+-
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.6.0.1-00760-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Karthikeyan Periyasamy <quic_periyasa@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221006005842.8599-1-quic_periyasa@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 9 +++------
+- 1 file changed, 3 insertions(+), 6 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -6421,18 +6421,16 @@ static int ath11k_mac_op_add_interface(s
+- 
+- 	ath11k_dp_vdev_tx_attach(ar, arvif);
+- 
+-+	ath11k_debugfs_add_interface(arvif);
+-+
+- 	if (vif->type != NL80211_IFTYPE_MONITOR &&
+- 	    test_bit(ATH11K_FLAG_MONITOR_CONF_ENABLED, &ar->monitor_flags)) {
+- 		ret = ath11k_mac_monitor_vdev_create(ar);
+--		if (ret) {
+-+		if (ret)
+- 			ath11k_warn(ar->ab, "failed to create monitor vdev during add interface: %d",
+- 				    ret);
+--			goto err_peer_del;
+--		}
+- 	}
+- 
+--	ath11k_debugfs_add_interface(arvif);
+--
+- 	mutex_unlock(&ar->conf_mutex);
+- 
+- 	return 0;
+-@@ -6457,7 +6455,6 @@ err_vdev_del:
+- 	spin_unlock_bh(&ar->data_lock);
+- 
+- err:
+--	ath11k_debugfs_remove_interface(arvif);
+- 	mutex_unlock(&ar->conf_mutex);
+- 
+- 	return ret;
+diff --git a/package/kernel/mac80211/patches/ath11k/0008-wifi-ath11k-add-support-to-configure-channel-dwell-t.patch b/package/kernel/mac80211/patches/ath11k/0008-wifi-ath11k-add-support-to-configure-channel-dwell-t.patch
+deleted file mode 100644
+index d0b19fe59f..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0008-wifi-ath11k-add-support-to-configure-channel-dwell-t.patch
++++ /dev/null
+@@ -1,102 +0,0 @@
+-From c362daa213cdeb0a9e7c2ed84849544c24505720 Mon Sep 17 00:00:00 2001
+-From: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
+-Date: Fri, 7 Oct 2022 10:41:30 +0530
+-Subject: [PATCH 8/9] wifi: ath11k: add support to configure channel dwell time
+-
+-Add support to configure channel dwell time during scan.
+-Dwell time help to stay on the channel for a specified duration
+-during scan and aid userspace in finding WiFi networks. Very
+-useful in passive scans where longer dwell times are needed
+-to find the WiFi networks.
+-
+-Configure channel dwell time from duration of the scan request
+-received from mac80211 when the duration is non-zero. When the
+-scan request does not have duration value, use the default ones,
+-the current implementation.
+-
+-Advertise corresponding feature flag NL80211_EXT_FEATURE_SET_SCAN_DWELL
+-to enable the feature.
+-
+-Change is applicable for all ath11k hardware.
+-
+-Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
+-
+-Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
+-Reviewed-by: Jeff Johnson <quic_jjohnson@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221007051130.6067-1-quic_mpubbise@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 33 +++++++++++++++++++++++----
+- 1 file changed, 29 insertions(+), 4 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -241,7 +241,10 @@ const struct htt_rx_ring_tlv_filter ath1
+- #define ath11k_a_rates (ath11k_legacy_rates + 4)
+- #define ath11k_a_rates_size (ARRAY_SIZE(ath11k_legacy_rates) - 4)
+- 
+--#define ATH11K_MAC_SCAN_TIMEOUT_MSECS 200 /* in msecs */
+-+#define ATH11K_MAC_SCAN_CMD_EVT_OVERHEAD		200 /* in msecs */
+-+
+-+/* Overhead due to the processing of channel switch events from FW */
+-+#define ATH11K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD	10 /* in msecs */
+- 
+- static const u32 ath11k_smps_map[] = {
+- 	[WLAN_HT_CAP_SM_PS_STATIC] = WMI_PEER_SMPS_STATIC,
+-@@ -3612,6 +3615,7 @@ static int ath11k_mac_op_hw_scan(struct
+- 	struct scan_req_params arg;
+- 	int ret = 0;
+- 	int i;
+-+	u32 scan_timeout;
+- 
+- 	mutex_lock(&ar->conf_mutex);
+- 
+-@@ -3681,6 +3685,26 @@ static int ath11k_mac_op_hw_scan(struct
+- 		ether_addr_copy(arg.mac_mask.addr, req->mac_addr_mask);
+- 	}
+- 
+-+	/* if duration is set, default dwell times will be overwritten */
+-+	if (req->duration) {
+-+		arg.dwell_time_active = req->duration;
+-+		arg.dwell_time_active_2g = req->duration;
+-+		arg.dwell_time_active_6g = req->duration;
+-+		arg.dwell_time_passive = req->duration;
+-+		arg.dwell_time_passive_6g = req->duration;
+-+		arg.burst_duration = req->duration;
+-+
+-+		scan_timeout = min_t(u32, arg.max_rest_time *
+-+				(arg.num_chan - 1) + (req->duration +
+-+				ATH11K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD) *
+-+				arg.num_chan, arg.max_scan_time);
+-+	} else {
+-+		scan_timeout = arg.max_scan_time;
+-+	}
+-+
+-+	/* Add a margin to account for event/command processing */
+-+	scan_timeout += ATH11K_MAC_SCAN_CMD_EVT_OVERHEAD;
+-+
+- 	ret = ath11k_start_scan(ar, &arg);
+- 	if (ret) {
+- 		ath11k_warn(ar->ab, "failed to start hw scan: %d\n", ret);
+-@@ -3689,10 +3713,8 @@ static int ath11k_mac_op_hw_scan(struct
+- 		spin_unlock_bh(&ar->data_lock);
+- 	}
+- 
+--	/* Add a 200ms margin to account for event/command processing */
+- 	ieee80211_queue_delayed_work(ar->hw, &ar->scan.timeout,
+--				     msecs_to_jiffies(arg.max_scan_time +
+--						      ATH11K_MAC_SCAN_TIMEOUT_MSECS));
+-+				     msecs_to_jiffies(scan_timeout));
+- 
+- exit:
+- 	kfree(arg.chan_list);
+-@@ -9060,6 +9082,9 @@ static int __ath11k_mac_register(struct
+- 				      NL80211_EXT_FEATURE_UNSOL_BCAST_PROBE_RESP);
+- 	}
+- 
+-+	wiphy_ext_feature_set(ar->hw->wiphy,
+-+			      NL80211_EXT_FEATURE_SET_SCAN_DWELL);
+-+
+- 	ath11k_reg_init(ar);
+- 
+- 	if (!test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags)) {
+diff --git a/package/kernel/mac80211/patches/ath11k/0010-wifi-ath11k-Fix-firmware-crash-on-vdev-delete-race-c.patch b/package/kernel/mac80211/patches/ath11k/0010-wifi-ath11k-Fix-firmware-crash-on-vdev-delete-race-c.patch
+deleted file mode 100644
+index 7275af06ea..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0010-wifi-ath11k-Fix-firmware-crash-on-vdev-delete-race-c.patch
++++ /dev/null
+@@ -1,116 +0,0 @@
+-From 3811fa1f231f1a3e29759efef4992116604aab8b Mon Sep 17 00:00:00 2001
+-From: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
+-Date: Tue, 11 Oct 2022 15:23:46 +0530
+-Subject: [PATCH] wifi: ath11k: Fix firmware crash on vdev delete race
+- condition
+-
+-Current code does not wait for vdev delete completion on vdev create
+-failures and tries to send another vdev create followed by vdev set
+-param to firmware with same vdev id. This causes firmware crash.
+-Fix this crash by waiting for vdev delete completion on vdev
+-create failures.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.6.0.1-00905-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221011095346.3901-1-quic_ssreeela@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 60 +++++++++++++++++----------
+- 1 file changed, 37 insertions(+), 23 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -6233,6 +6233,40 @@ void ath11k_mac_11d_scan_stop_all(struct
+- 	}
+- }
+- 
+-+static int ath11k_mac_vdev_delete(struct ath11k *ar, struct ath11k_vif *arvif)
+-+{
+-+	unsigned long time_left;
+-+	struct ieee80211_vif *vif = arvif->vif;
+-+	int ret = 0;
+-+
+-+	lockdep_assert_held(&ar->conf_mutex);
+-+
+-+	reinit_completion(&ar->vdev_delete_done);
+-+
+-+	ret = ath11k_wmi_vdev_delete(ar, arvif->vdev_id);
+-+	if (ret) {
+-+		ath11k_warn(ar->ab, "failed to delete WMI vdev %d: %d\n",
+-+			    arvif->vdev_id, ret);
+-+		return ret;
+-+	}
+-+
+-+	time_left = wait_for_completion_timeout(&ar->vdev_delete_done,
+-+						ATH11K_VDEV_DELETE_TIMEOUT_HZ);
+-+	if (time_left == 0) {
+-+		ath11k_warn(ar->ab, "Timeout in receiving vdev delete response\n");
+-+		return -ETIMEDOUT;
+-+	}
+-+
+-+	ar->ab->free_vdev_map |= 1LL << (arvif->vdev_id);
+-+	ar->allocated_vdev_map &= ~(1LL << arvif->vdev_id);
+-+	ar->num_created_vdevs--;
+-+
+-+	ath11k_dbg(ar->ab, ATH11K_DBG_MAC, "vdev %pM deleted, vdev_id %d\n",
+-+		   vif->addr, arvif->vdev_id);
+-+
+-+	return ret;
+-+}
+-+
+- static int ath11k_mac_op_add_interface(struct ieee80211_hw *hw,
+- 				       struct ieee80211_vif *vif)
+- {
+-@@ -6468,10 +6502,7 @@ err_peer_del:
+- 	}
+- 
+- err_vdev_del:
+--	ath11k_wmi_vdev_delete(ar, arvif->vdev_id);
+--	ar->num_created_vdevs--;
+--	ar->allocated_vdev_map &= ~(1LL << arvif->vdev_id);
+--	ab->free_vdev_map |= 1LL << arvif->vdev_id;
+-+	ath11k_mac_vdev_delete(ar, arvif);
+- 	spin_lock_bh(&ar->data_lock);
+- 	list_del(&arvif->list);
+- 	spin_unlock_bh(&ar->data_lock);
+-@@ -6499,7 +6530,6 @@ static void ath11k_mac_op_remove_interfa
+- 	struct ath11k *ar = hw->priv;
+- 	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
+- 	struct ath11k_base *ab = ar->ab;
+--	unsigned long time_left;
+- 	int ret;
+- 	int i;
+- 
+-@@ -6520,29 +6550,13 @@ static void ath11k_mac_op_remove_interfa
+- 				    arvif->vdev_id, ret);
+- 	}
+- 
+--	reinit_completion(&ar->vdev_delete_done);
+--
+--	ret = ath11k_wmi_vdev_delete(ar, arvif->vdev_id);
+-+	ret = ath11k_mac_vdev_delete(ar, arvif);
+- 	if (ret) {
+--		ath11k_warn(ab, "failed to delete WMI vdev %d: %d\n",
+-+		ath11k_warn(ab, "failed to delete vdev %d: %d\n",
+- 			    arvif->vdev_id, ret);
+- 		goto err_vdev_del;
+- 	}
+- 
+--	time_left = wait_for_completion_timeout(&ar->vdev_delete_done,
+--						ATH11K_VDEV_DELETE_TIMEOUT_HZ);
+--	if (time_left == 0) {
+--		ath11k_warn(ab, "Timeout in receiving vdev delete response\n");
+--		goto err_vdev_del;
+--	}
+--
+--	ab->free_vdev_map |= 1LL << (arvif->vdev_id);
+--	ar->allocated_vdev_map &= ~(1LL << arvif->vdev_id);
+--	ar->num_created_vdevs--;
+--
+--	ath11k_dbg(ab, ATH11K_DBG_MAC, "vdev %pM deleted, vdev_id %d\n",
+--		   vif->addr, arvif->vdev_id);
+--
+- 	if (arvif->vdev_type == WMI_VDEV_TYPE_MONITOR) {
+- 		clear_bit(ATH11K_FLAG_MONITOR_VDEV_CREATED, &ar->monitor_flags);
+- 		ar->monitor_vdev_id = -1;
+diff --git a/package/kernel/mac80211/patches/ath11k/0011-wifi-ath11k-fix-monitor-vdev-creation-with-firmware-.patch b/package/kernel/mac80211/patches/ath11k/0011-wifi-ath11k-fix-monitor-vdev-creation-with-firmware-.patch
+deleted file mode 100644
+index 2f066d0a56..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0011-wifi-ath11k-fix-monitor-vdev-creation-with-firmware-.patch
++++ /dev/null
+@@ -1,40 +0,0 @@
+-From f3ca72b0327101a074a871539e61775d43908ca4 Mon Sep 17 00:00:00 2001
+-From: Nagarajan Maran <quic_nmaran@quicinc.com>
+-Date: Fri, 14 Oct 2022 21:20:54 +0530
+-Subject: [PATCH] wifi: ath11k: fix monitor vdev creation with firmware
+- recovery
+-
+-During firmware recovery, the monitor interface is not
+-getting created in the driver and firmware since
+-the respective flags are not updated properly.
+-
+-So after firmware recovery is successful, when monitor
+-interface is brought down manually, firmware assertion
+-is observed, since we are trying to bring down the
+-interface which is not yet created in the firmware.
+-
+-Fix this by updating the monitor flags properly per
+-phy#, during firmware recovery.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Nagarajan Maran <quic_nmaran@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221014155054.11471-1-quic_nmaran@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/core.c | 4 ++++
+- 1 file changed, 4 insertions(+)
+-
+---- a/drivers/net/wireless/ath/ath11k/core.c
+-+++ b/drivers/net/wireless/ath/ath11k/core.c
+-@@ -1677,6 +1677,10 @@ void ath11k_core_pre_reconfigure_recover
+- 			     ath11k_mac_tx_mgmt_pending_free, ar);
+- 		idr_destroy(&ar->txmgmt_idr);
+- 		wake_up(&ar->txmgmt_empty_waitq);
+-+
+-+		ar->monitor_vdev_id = -1;
+-+		clear_bit(ATH11K_FLAG_MONITOR_STARTED, &ar->monitor_flags);
+-+		clear_bit(ATH11K_FLAG_MONITOR_VDEV_CREATED, &ar->monitor_flags);
+- 	}
+- 
+- 	wake_up(&ab->wmi_ab.tx_credits_wq);
+diff --git a/package/kernel/mac80211/patches/ath11k/0012-wifi-ath11k-Fix-qmi_msg_handler-data-structure-initi.patch b/package/kernel/mac80211/patches/ath11k/0012-wifi-ath11k-Fix-qmi_msg_handler-data-structure-initi.patch
+deleted file mode 100644
+index fccfa4385a..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0012-wifi-ath11k-Fix-qmi_msg_handler-data-structure-initi.patch
++++ /dev/null
+@@ -1,33 +0,0 @@
+-From ed3725e15a154ebebf44e0c34806c57525483f92 Mon Sep 17 00:00:00 2001
+-From: Rahul Bhattacharjee <quic_rbhattac@quicinc.com>
+-Date: Fri, 21 Oct 2022 14:31:26 +0530
+-Subject: [PATCH] wifi: ath11k: Fix qmi_msg_handler data structure
+- initialization
+-
+-qmi_msg_handler is required to be null terminated by QMI module.
+-There might be a case where a handler for a msg id is not present in the
+-handlers array which can lead to infinite loop while searching the handler
+-and therefore out of bound access in qmi_invoke_handler().
+-Hence update the initialization in qmi_msg_handler data structure.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Rahul Bhattacharjee <quic_rbhattac@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221021090126.28626-1-quic_rbhattac@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/qmi.c | 3 +++
+- 1 file changed, 3 insertions(+)
+-
+---- a/drivers/net/wireless/ath/ath11k/qmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/qmi.c
+-@@ -1702,6 +1702,9 @@ static struct qmi_elem_info qmi_wlfw_fw_
+- 		.data_type = QMI_EOTI,
+- 		.array_type = NO_ARRAY,
+- 	},
+-+
+-+	/* end of list */
+-+	{},
+- };
+- 
+- static int ath11k_qmi_host_cap_send(struct ath11k_base *ab)
+diff --git a/package/kernel/mac80211/patches/ath11k/0013-wifi-ath11k-synchronize-ath11k_mac_he_gi_to_nl80211_.patch b/package/kernel/mac80211/patches/ath11k/0013-wifi-ath11k-synchronize-ath11k_mac_he_gi_to_nl80211_.patch
+deleted file mode 100644
+index 1e89b4d4f2..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0013-wifi-ath11k-synchronize-ath11k_mac_he_gi_to_nl80211_.patch
++++ /dev/null
+@@ -1,42 +0,0 @@
+-From dd1c2322694522f674c874f5fa02ac5ae39135dd Mon Sep 17 00:00:00 2001
+-From: "Jiri Slaby (SUSE)" <jirislaby@kernel.org>
+-Date: Mon, 31 Oct 2022 12:43:41 +0100
+-Subject: [PATCH] wifi: ath11k: synchronize
+- ath11k_mac_he_gi_to_nl80211_he_gi()'s return type
+-
+-ath11k_mac_he_gi_to_nl80211_he_gi() generates a valid warning with gcc-13:
+-  drivers/net/wireless/ath/ath11k/mac.c:321:20: error: conflicting types for 'ath11k_mac_he_gi_to_nl80211_he_gi' due to enum/integer mismatch; have 'enum nl80211_he_gi(u8)'
+-  drivers/net/wireless/ath/ath11k/mac.h:166:5: note: previous declaration of 'ath11k_mac_he_gi_to_nl80211_he_gi' with type 'u32(u8)'
+-
+-I.e. the type of the return value ath11k_mac_he_gi_to_nl80211_he_gi() in
+-the declaration is u32, while the definition spells enum nl80211_he_gi.
+-Synchronize them to the latter.
+-
+-Cc: Martin Liska <mliska@suse.cz>
+-Cc: Kalle Valo <kvalo@kernel.org>
+-Cc: "David S. Miller" <davem@davemloft.net>
+-Cc: Eric Dumazet <edumazet@google.com>
+-Cc: Jakub Kicinski <kuba@kernel.org>
+-Cc: Paolo Abeni <pabeni@redhat.com>
+-Cc: ath11k@lists.infradead.org
+-Cc: linux-wireless@vger.kernel.org
+-Cc: netdev@vger.kernel.org
+-Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org>
+-Reviewed-by: Jeff Johnson <quic_jjohnson@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221031114341.10377-1-jirislaby@kernel.org
+----
+- drivers/net/wireless/ath/ath11k/mac.h | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.h
+-+++ b/drivers/net/wireless/ath/ath11k/mac.h
+-@@ -163,7 +163,7 @@ void ath11k_mac_drain_tx(struct ath11k *
+- void ath11k_mac_peer_cleanup_all(struct ath11k *ar);
+- int ath11k_mac_tx_mgmt_pending_free(int buf_id, void *skb, void *ctx);
+- u8 ath11k_mac_bw_to_mac80211_bw(u8 bw);
+--u32 ath11k_mac_he_gi_to_nl80211_he_gi(u8 sgi);
+-+enum nl80211_he_gi ath11k_mac_he_gi_to_nl80211_he_gi(u8 sgi);
+- enum nl80211_he_ru_alloc ath11k_mac_phy_he_ru_to_nl80211_he_ru_alloc(u16 ru_phy);
+- enum nl80211_he_ru_alloc ath11k_mac_he_ru_tones_to_nl80211_he_ru_alloc(u16 ru_tones);
+- enum ath11k_supported_bw ath11k_mac_mac80211_bw_to_ath11k_bw(enum rate_info_bw bw);
+diff --git a/package/kernel/mac80211/patches/ath11k/0016-wifi-ath11k-Make-QMI-message-rules-const.patch b/package/kernel/mac80211/patches/ath11k/0016-wifi-ath11k-Make-QMI-message-rules-const.patch
+deleted file mode 100644
+index 1f48df73f7..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0016-wifi-ath11k-Make-QMI-message-rules-const.patch
++++ /dev/null
+@@ -1,341 +0,0 @@
+-From 93c1592889fca46d09d833455628bab05516cdbf Mon Sep 17 00:00:00 2001
+-From: Jeff Johnson <quic_jjohnson@quicinc.com>
+-Date: Wed, 14 Sep 2022 17:23:03 -0700
+-Subject: [PATCH] wifi: ath11k: Make QMI message rules const
+-
+-Commit ff6d365898d4 ("soc: qcom: qmi: use const for struct
+-qmi_elem_info") allows QMI message encoding/decoding rules to be
+-const, so do that for ath11k.
+-
+-Compile tested only.
+-
+-Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20220915002303.12206-1-quic_jjohnson@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/qmi.c | 72 +++++++++++++--------------
+- 1 file changed, 36 insertions(+), 36 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/qmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/qmi.c
+-@@ -29,7 +29,7 @@ module_param_named(cold_boot_cal, ath11k
+- MODULE_PARM_DESC(cold_boot_cal,
+- 		 "Decrease the channel switch time but increase the driver load time (Default: true)");
+- 
+--static struct qmi_elem_info qmi_wlanfw_host_cap_req_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_host_cap_req_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_OPT_FLAG,
+- 		.elem_len	= 1,
+-@@ -280,7 +280,7 @@ static struct qmi_elem_info qmi_wlanfw_h
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_host_cap_resp_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_host_cap_resp_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_STRUCT,
+- 		.elem_len	= 1,
+-@@ -297,7 +297,7 @@ static struct qmi_elem_info qmi_wlanfw_h
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_ind_register_req_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_ind_register_req_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_OPT_FLAG,
+- 		.elem_len	= 1,
+-@@ -522,7 +522,7 @@ static struct qmi_elem_info qmi_wlanfw_i
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_ind_register_resp_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_ind_register_resp_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_STRUCT,
+- 		.elem_len	= 1,
+-@@ -558,7 +558,7 @@ static struct qmi_elem_info qmi_wlanfw_i
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_mem_cfg_s_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_mem_cfg_s_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_UNSIGNED_8_BYTE,
+- 		.elem_len	= 1,
+-@@ -590,7 +590,7 @@ static struct qmi_elem_info qmi_wlanfw_m
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_mem_seg_s_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_mem_seg_s_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_UNSIGNED_4_BYTE,
+- 		.elem_len	= 1,
+-@@ -632,7 +632,7 @@ static struct qmi_elem_info qmi_wlanfw_m
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_request_mem_ind_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_request_mem_ind_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_DATA_LEN,
+- 		.elem_len	= 1,
+-@@ -659,7 +659,7 @@ static struct qmi_elem_info qmi_wlanfw_r
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_mem_seg_resp_s_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_mem_seg_resp_s_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_UNSIGNED_8_BYTE,
+- 		.elem_len	= 1,
+-@@ -699,7 +699,7 @@ static struct qmi_elem_info qmi_wlanfw_m
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_respond_mem_req_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_respond_mem_req_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_DATA_LEN,
+- 		.elem_len	= 1,
+-@@ -726,7 +726,7 @@ static struct qmi_elem_info qmi_wlanfw_r
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_respond_mem_resp_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_respond_mem_resp_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_STRUCT,
+- 		.elem_len	= 1,
+-@@ -744,7 +744,7 @@ static struct qmi_elem_info qmi_wlanfw_r
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_cap_req_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_cap_req_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_EOTI,
+- 		.array_type	= NO_ARRAY,
+-@@ -752,7 +752,7 @@ static struct qmi_elem_info qmi_wlanfw_c
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_device_info_req_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_device_info_req_msg_v01_ei[] = {
+- 	{
+- 		.data_type      = QMI_EOTI,
+- 		.array_type     = NO_ARRAY,
+-@@ -760,7 +760,7 @@ static struct qmi_elem_info qmi_wlanfw_d
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlfw_device_info_resp_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlfw_device_info_resp_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_STRUCT,
+- 		.elem_len	= 1,
+-@@ -814,7 +814,7 @@ static struct qmi_elem_info qmi_wlfw_dev
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_rf_chip_info_s_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_rf_chip_info_s_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_UNSIGNED_4_BYTE,
+- 		.elem_len	= 1,
+-@@ -840,7 +840,7 @@ static struct qmi_elem_info qmi_wlanfw_r
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_rf_board_info_s_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_rf_board_info_s_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_UNSIGNED_4_BYTE,
+- 		.elem_len	= 1,
+-@@ -857,7 +857,7 @@ static struct qmi_elem_info qmi_wlanfw_r
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_soc_info_s_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_soc_info_s_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_UNSIGNED_4_BYTE,
+- 		.elem_len	= 1,
+-@@ -873,7 +873,7 @@ static struct qmi_elem_info qmi_wlanfw_s
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_fw_version_info_s_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_fw_version_info_s_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_UNSIGNED_4_BYTE,
+- 		.elem_len	= 1,
+-@@ -899,7 +899,7 @@ static struct qmi_elem_info qmi_wlanfw_f
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_cap_resp_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_cap_resp_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_STRUCT,
+- 		.elem_len	= 1,
+-@@ -1100,7 +1100,7 @@ static struct qmi_elem_info qmi_wlanfw_c
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_bdf_download_req_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_bdf_download_req_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_UNSIGNED_1_BYTE,
+- 		.elem_len	= 1,
+-@@ -1235,7 +1235,7 @@ static struct qmi_elem_info qmi_wlanfw_b
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_bdf_download_resp_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_bdf_download_resp_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_STRUCT,
+- 		.elem_len	= 1,
+-@@ -1253,7 +1253,7 @@ static struct qmi_elem_info qmi_wlanfw_b
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_m3_info_req_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_m3_info_req_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_UNSIGNED_8_BYTE,
+- 		.elem_len	= 1,
+-@@ -1277,7 +1277,7 @@ static struct qmi_elem_info qmi_wlanfw_m
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_m3_info_resp_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_m3_info_resp_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_STRUCT,
+- 		.elem_len	= 1,
+-@@ -1294,7 +1294,7 @@ static struct qmi_elem_info qmi_wlanfw_m
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_UNSIGNED_4_BYTE,
+- 		.elem_len	= 1,
+-@@ -1347,7 +1347,7 @@ static struct qmi_elem_info qmi_wlanfw_c
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_UNSIGNED_4_BYTE,
+- 		.elem_len	= 1,
+-@@ -1382,7 +1382,7 @@ static struct qmi_elem_info qmi_wlanfw_c
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_shadow_reg_cfg_s_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_shadow_reg_cfg_s_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_UNSIGNED_2_BYTE,
+- 		.elem_len	= 1,
+-@@ -1406,7 +1406,7 @@ static struct qmi_elem_info qmi_wlanfw_s
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_shadow_reg_v2_cfg_s_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_shadow_reg_v2_cfg_s_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_UNSIGNED_4_BYTE,
+- 		.elem_len	= 1,
+-@@ -1423,7 +1423,7 @@ static struct qmi_elem_info qmi_wlanfw_s
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_wlan_mode_req_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_wlan_mode_req_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_UNSIGNED_4_BYTE,
+- 		.elem_len	= 1,
+-@@ -1458,7 +1458,7 @@ static struct qmi_elem_info qmi_wlanfw_w
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_wlan_mode_resp_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_wlan_mode_resp_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_STRUCT,
+- 		.elem_len	= 1,
+-@@ -1476,7 +1476,7 @@ static struct qmi_elem_info qmi_wlanfw_w
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_wlan_cfg_req_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_wlan_cfg_req_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_OPT_FLAG,
+- 		.elem_len	= 1,
+-@@ -1615,7 +1615,7 @@ static struct qmi_elem_info qmi_wlanfw_w
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_wlan_cfg_resp_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_wlan_cfg_resp_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_STRUCT,
+- 		.elem_len	= 1,
+-@@ -1632,28 +1632,28 @@ static struct qmi_elem_info qmi_wlanfw_w
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_mem_ready_ind_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_mem_ready_ind_msg_v01_ei[] = {
+- 	{
+- 		.data_type = QMI_EOTI,
+- 		.array_type = NO_ARRAY,
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_fw_ready_ind_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_fw_ready_ind_msg_v01_ei[] = {
+- 	{
+- 		.data_type = QMI_EOTI,
+- 		.array_type = NO_ARRAY,
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_cold_boot_cal_done_ind_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_cold_boot_cal_done_ind_msg_v01_ei[] = {
+- 	{
+- 		.data_type = QMI_EOTI,
+- 		.array_type = NO_ARRAY,
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_wlan_ini_req_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_wlan_ini_req_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_OPT_FLAG,
+- 		.elem_len	= 1,
+-@@ -1679,7 +1679,7 @@ static struct qmi_elem_info qmi_wlanfw_w
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlanfw_wlan_ini_resp_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlanfw_wlan_ini_resp_msg_v01_ei[] = {
+- 	{
+- 		.data_type	= QMI_STRUCT,
+- 		.elem_len	= 1,
+-@@ -1697,7 +1697,7 @@ static struct qmi_elem_info qmi_wlanfw_w
+- 	},
+- };
+- 
+--static struct qmi_elem_info qmi_wlfw_fw_init_done_ind_msg_v01_ei[] = {
+-+static const struct qmi_elem_info qmi_wlfw_fw_init_done_ind_msg_v01_ei[] = {
+- 	{
+- 		.data_type = QMI_EOTI,
+- 		.array_type = NO_ARRAY,
+diff --git a/package/kernel/mac80211/patches/ath11k/0017-wifi-ath11k-Trigger-sta-disconnect-on-hardware-resta.patch b/package/kernel/mac80211/patches/ath11k/0017-wifi-ath11k-Trigger-sta-disconnect-on-hardware-resta.patch
+deleted file mode 100644
+index f95e5027b2..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0017-wifi-ath11k-Trigger-sta-disconnect-on-hardware-resta.patch
++++ /dev/null
+@@ -1,119 +0,0 @@
+-From a018750a2cceaf4427c4ee3d9ce3e83a171d5bd6 Mon Sep 17 00:00:00 2001
+-From: Youghandhar Chintala <quic_youghand@quicinc.com>
+-Date: Fri, 4 Nov 2022 14:24:03 +0530
+-Subject: [PATCH] wifi: ath11k: Trigger sta disconnect on hardware restart
+-
+-Currently after the hardware restart triggered from the driver, the
+-station interface connection remains intact, since a disconnect trigger
+-is not sent to userspace. This can lead to a problem in targets where
+-the wifi mac sequence is added by the firmware.
+-
+-After the target restart, its wifi mac sequence number gets reset to
+-zero. Hence AP to which our device is connected will receive frames with
+-a  wifi mac sequence number jump to the past, thereby resulting in the
+-AP dropping all these frames, until the frame arrives with a wifi mac
+-sequence number which AP was expecting.
+-
+-To avoid such frame drops, its better to trigger a station disconnect
+-upon target hardware restart which can be done with API
+-ieee80211_reconfig_disconnect exposed to mac80211.
+-
+-The other targets are not affected by this change, since the hardware
+-params flag is not set.
+-
+-Reported-by: kernel test robot <lkp@intel.com>
+-
+-Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
+-
+-Signed-off-by: Youghandhar Chintala <quic_youghand@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221104085403.11025-1-quic_youghand@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/core.c | 6 ++++++
+- drivers/net/wireless/ath/ath11k/hw.h   | 1 +
+- drivers/net/wireless/ath/ath11k/mac.c  | 7 +++++++
+- 3 files changed, 14 insertions(+)
+-
+---- a/drivers/net/wireless/ath/ath11k/core.c
+-+++ b/drivers/net/wireless/ath/ath11k/core.c
+-@@ -195,6 +195,7 @@ static const struct ath11k_hw_params ath
+- 		.tcl_ring_retry = true,
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+-+		.support_fw_mac_sequence = false,
+- 	},
+- 	{
+- 		.name = "qca6390 hw2.0",
+-@@ -277,6 +278,7 @@ static const struct ath11k_hw_params ath
+- 		.tcl_ring_retry = true,
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+-+		.support_fw_mac_sequence = true,
+- 	},
+- 	{
+- 		.name = "qcn9074 hw1.0",
+-@@ -356,6 +358,7 @@ static const struct ath11k_hw_params ath
+- 		.tcl_ring_retry = true,
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+-+		.support_fw_mac_sequence = false,
+- 	},
+- 	{
+- 		.name = "wcn6855 hw2.0",
+-@@ -438,6 +441,7 @@ static const struct ath11k_hw_params ath
+- 		.tcl_ring_retry = true,
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+-+		.support_fw_mac_sequence = true,
+- 	},
+- 	{
+- 		.name = "wcn6855 hw2.1",
+-@@ -519,6 +523,7 @@ static const struct ath11k_hw_params ath
+- 		.tcl_ring_retry = true,
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+-+		.support_fw_mac_sequence = true,
+- 	},
+- 	{
+- 		.name = "wcn6750 hw1.0",
+-@@ -597,6 +602,7 @@ static const struct ath11k_hw_params ath
+- 		.tcl_ring_retry = false,
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE_WCN6750,
+- 		.smp2p_wow_exit = true,
+-+		.support_fw_mac_sequence = true,
+- 	},
+- };
+- 
+---- a/drivers/net/wireless/ath/ath11k/hw.h
+-+++ b/drivers/net/wireless/ath/ath11k/hw.h
+-@@ -219,6 +219,7 @@ struct ath11k_hw_params {
+- 	bool tcl_ring_retry;
+- 	u32 tx_ring_size;
+- 	bool smp2p_wow_exit;
+-+	bool support_fw_mac_sequence;
+- };
+- 
+- struct ath11k_hw_ops {
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -8010,6 +8010,7 @@ ath11k_mac_op_reconfig_complete(struct i
+- 	struct ath11k *ar = hw->priv;
+- 	struct ath11k_base *ab = ar->ab;
+- 	int recovery_count;
+-+	struct ath11k_vif *arvif;
+- 
+- 	if (reconfig_type != IEEE80211_RECONFIG_TYPE_RESTART)
+- 		return;
+-@@ -8045,6 +8046,12 @@ ath11k_mac_op_reconfig_complete(struct i
+- 				ath11k_dbg(ab, ATH11K_DBG_BOOT, "reset success\n");
+- 			}
+- 		}
+-+		if (ar->ab->hw_params.support_fw_mac_sequence) {
+-+			list_for_each_entry(arvif, &ar->arvifs, list) {
+-+				if (arvif->is_up && arvif->vdev_type == WMI_VDEV_TYPE_STA)
+-+					ieee80211_hw_restart_disconnect(arvif->vif);
+-+			}
+-+		}
+- 	}
+- 
+- 	mutex_unlock(&ar->conf_mutex);
+diff --git a/package/kernel/mac80211/patches/ath11k/0018-wifi-ath11k-Fix-race-condition-with-struct-htt_ppdu_.patch b/package/kernel/mac80211/patches/ath11k/0018-wifi-ath11k-Fix-race-condition-with-struct-htt_ppdu_.patch
+deleted file mode 100644
+index cef61ee344..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0018-wifi-ath11k-Fix-race-condition-with-struct-htt_ppdu_.patch
++++ /dev/null
+@@ -1,103 +0,0 @@
+-From e44de90453bb2b46a523df78c39eb896bab35dcd Mon Sep 17 00:00:00 2001
+-From: Govindaraj Saminathan <quic_gsaminat@quicinc.com>
+-Date: Tue, 29 Nov 2022 13:04:02 +0200
+-Subject: [PATCH] wifi: ath11k: Fix race condition with struct
+- htt_ppdu_stats_info
+-
+-A crash happens when running the traffic with multiple clients:
+-
+-Crash Signature : Unable to handle kernel paging request at
+-virtual address ffffffd700970918 During the crash, PC points to
+-"ieee80211_tx_rate_update+0x30/0x68 [mac80211]"
+-LR points to "ath11k_dp_htt_htc_t2h_msg_handler+0x5a8/0x8a0 [ath11k]".
+-
+-Struct ppdu_stats_info is allocated and accessed from event callback via copy
+-engine tasklet, this has a problem when freeing it from ath11k_mac_op_stop().
+-
+-Use data_lock during entire ath11k_dp_htt_get_ppdu_desc() call to protect
+-struct htt_ppdu_stats_info access and to avoid race condition when accessing it
+-from ath11k_mac_op_stop().
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Govindaraj Saminathan <quic_gsaminat@quicinc.com>
+-Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221124071104.22506-1-quic_kathirve@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/dp_rx.c | 22 +++++++++++-----------
+- 1 file changed, 11 insertions(+), 11 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/dp_rx.c
+-+++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
+-@@ -1535,13 +1535,12 @@ struct htt_ppdu_stats_info *ath11k_dp_ht
+- {
+- 	struct htt_ppdu_stats_info *ppdu_info;
+- 
+--	spin_lock_bh(&ar->data_lock);
+-+	lockdep_assert_held(&ar->data_lock);
+-+
+- 	if (!list_empty(&ar->ppdu_stats_info)) {
+- 		list_for_each_entry(ppdu_info, &ar->ppdu_stats_info, list) {
+--			if (ppdu_info->ppdu_id == ppdu_id) {
+--				spin_unlock_bh(&ar->data_lock);
+-+			if (ppdu_info->ppdu_id == ppdu_id)
+- 				return ppdu_info;
+--			}
+- 		}
+- 
+- 		if (ar->ppdu_stat_list_depth > HTT_PPDU_DESC_MAX_DEPTH) {
+-@@ -1553,16 +1552,13 @@ struct htt_ppdu_stats_info *ath11k_dp_ht
+- 			kfree(ppdu_info);
+- 		}
+- 	}
+--	spin_unlock_bh(&ar->data_lock);
+- 
+- 	ppdu_info = kzalloc(sizeof(*ppdu_info), GFP_ATOMIC);
+- 	if (!ppdu_info)
+- 		return NULL;
+- 
+--	spin_lock_bh(&ar->data_lock);
+- 	list_add_tail(&ppdu_info->list, &ar->ppdu_stats_info);
+- 	ar->ppdu_stat_list_depth++;
+--	spin_unlock_bh(&ar->data_lock);
+- 
+- 	return ppdu_info;
+- }
+-@@ -1586,16 +1582,17 @@ static int ath11k_htt_pull_ppdu_stats(st
+- 	ar = ath11k_mac_get_ar_by_pdev_id(ab, pdev_id);
+- 	if (!ar) {
+- 		ret = -EINVAL;
+--		goto exit;
+-+		goto out;
+- 	}
+- 
+- 	if (ath11k_debugfs_is_pktlog_lite_mode_enabled(ar))
+- 		trace_ath11k_htt_ppdu_stats(ar, skb->data, len);
+- 
+-+	spin_lock_bh(&ar->data_lock);
+- 	ppdu_info = ath11k_dp_htt_get_ppdu_desc(ar, ppdu_id);
+- 	if (!ppdu_info) {
+- 		ret = -EINVAL;
+--		goto exit;
+-+		goto out_unlock_data;
+- 	}
+- 
+- 	ppdu_info->ppdu_id = ppdu_id;
+-@@ -1604,10 +1601,13 @@ static int ath11k_htt_pull_ppdu_stats(st
+- 				     (void *)ppdu_info);
+- 	if (ret) {
+- 		ath11k_warn(ab, "Failed to parse tlv %d\n", ret);
+--		goto exit;
+-+		goto out_unlock_data;
+- 	}
+- 
+--exit:
+-+out_unlock_data:
+-+	spin_unlock_bh(&ar->data_lock);
+-+
+-+out:
+- 	rcu_read_unlock();
+- 
+- 	return ret;
+diff --git a/package/kernel/mac80211/patches/ath11k/0019-wifi-ath11k-update-hw-params-for-IPQ5018.patch b/package/kernel/mac80211/patches/ath11k/0019-wifi-ath11k-update-hw-params-for-IPQ5018.patch
+deleted file mode 100644
+index 25d39ddb0d..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0019-wifi-ath11k-update-hw-params-for-IPQ5018.patch
++++ /dev/null
+@@ -1,125 +0,0 @@
+-From 8dfe875aa24aec68baf6702018633c84c2c1feca Mon Sep 17 00:00:00 2001
+-From: Sriram R <quic_srirrama@quicinc.com>
+-Date: Fri, 2 Dec 2022 23:37:13 +0200
+-Subject: [PATCH] wifi: ath11k: update hw params for IPQ5018
+-
+-Add new compatible string for IPQ5018 and add
+-required hw params for IPQ5018. The hw descriptors size and
+-datapath ops are similar to QCN9074, hence reuse the same.
+-
+-Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
+-Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221122132152.17771-3-quic_kathirve@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/core.c | 71 ++++++++++++++++++++++++++
+- drivers/net/wireless/ath/ath11k/core.h |  8 +++
+- 2 files changed, 79 insertions(+)
+-
+---- a/drivers/net/wireless/ath/ath11k/core.c
+-+++ b/drivers/net/wireless/ath/ath11k/core.c
+-@@ -604,6 +604,77 @@ static const struct ath11k_hw_params ath
+- 		.smp2p_wow_exit = true,
+- 		.support_fw_mac_sequence = true,
+- 	},
+-+	{
+-+		.hw_rev = ATH11K_HW_IPQ5018_HW10,
+-+		.name = "ipq5018 hw1.0",
+-+		.fw = {
+-+			.dir = "IPQ5018/hw1.0",
+-+			.board_size = 256 * 1024,
+-+			.cal_offset = 128 * 1024,
+-+		},
+-+		.max_radios = MAX_RADIOS_5018,
+-+		.bdf_addr = 0x4BA00000,
+-+		/* hal_desc_sz and hw ops are similar to qcn9074 */
+-+		.hal_desc_sz = sizeof(struct hal_rx_desc_qcn9074),
+-+		.qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074,
+-+		.ring_mask = &ath11k_hw_ring_mask_ipq8074,
+-+		.credit_flow = false,
+-+		.max_tx_ring = 1,
+-+		.spectral = {
+-+			.fft_sz = 2,
+-+			.fft_pad_sz = 0,
+-+			.summary_pad_sz = 16,
+-+			.fft_hdr_len = 24,
+-+			.max_fft_bins = 1024,
+-+		},
+-+		.internal_sleep_clock = false,
+-+		.host_ce_config = ath11k_host_ce_config_qcn9074,
+-+		.ce_count = CE_CNT_5018,
+-+		.rxdma1_enable = true,
+-+		.num_rxmda_per_pdev = RXDMA_PER_PDEV_5018,
+-+		.rx_mac_buf_ring = false,
+-+		.vdev_start_delay = false,
+-+		.htt_peer_map_v2 = true,
+-+		.interface_modes = BIT(NL80211_IFTYPE_STATION) |
+-+			BIT(NL80211_IFTYPE_AP) |
+-+			BIT(NL80211_IFTYPE_MESH_POINT),
+-+		.supports_monitor = false,
+-+		.supports_sta_ps = false,
+-+		.supports_shadow_regs = false,
+-+		.fw_mem_mode = 0,
+-+		.num_vdevs = 16 + 1,
+-+		.num_peers = 512,
+-+		.supports_regdb = false,
+-+		.idle_ps = false,
+-+		.supports_suspend = false,
+-+		.hal_params = &ath11k_hw_hal_params_ipq8074,
+-+		.single_pdev_only = false,
+-+		.cold_boot_calib = true,
+-+		.fix_l1ss = true,
+-+		.supports_dynamic_smps_6ghz = false,
+-+		.alloc_cacheable_memory = true,
+-+		.supports_rssi_stats = false,
+-+		.fw_wmi_diag_event = false,
+-+		.current_cc_support = false,
+-+		.dbr_debug_support = true,
+-+		.global_reset = false,
+-+		.bios_sar_capa = NULL,
+-+		.m3_fw_support = false,
+-+		.fixed_bdf_addr = true,
+-+		.fixed_mem_region = true,
+-+		.static_window_map = false,
+-+		.hybrid_bus_type = false,
+-+		.fixed_fw_mem = false,
+-+		.support_off_channel_tx = false,
+-+		.supports_multi_bssid = false,
+-+
+-+		.sram_dump = {},
+-+
+-+		.tcl_ring_retry = true,
+-+		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+-+		.smp2p_wow_exit = false,
+-+		.support_fw_mac_sequence = false,
+-+	},
+- };
+- 
+- static inline struct ath11k_pdev *ath11k_core_get_single_pdev(struct ath11k_base *ab)
+---- a/drivers/net/wireless/ath/ath11k/core.h
+-+++ b/drivers/net/wireless/ath/ath11k/core.h
+-@@ -142,6 +142,7 @@ enum ath11k_hw_rev {
+- 	ATH11K_HW_WCN6855_HW20,
+- 	ATH11K_HW_WCN6855_HW21,
+- 	ATH11K_HW_WCN6750_HW10,
+-+	ATH11K_HW_IPQ5018_HW10,
+- };
+- 
+- enum ath11k_firmware_mode {
+-@@ -230,6 +231,13 @@ struct ath11k_he {
+- 
+- #define MAX_RADIOS 3
+- 
+-+/* ipq5018 hw param macros */
+-+#define MAX_RADIOS_5018	1
+-+#define CE_CNT_5018	6
+-+#define TARGET_CE_CNT_5018	9
+-+#define SVC_CE_MAP_LEN_5018	17
+-+#define RXDMA_PER_PDEV_5018	1
+-+
+- enum {
+- 	WMI_HOST_TP_SCALE_MAX   = 0,
+- 	WMI_HOST_TP_SCALE_50    = 1,
+diff --git a/package/kernel/mac80211/patches/ath11k/0020-wifi-ath11k-update-ce-configurations-for-IPQ5018.patch b/package/kernel/mac80211/patches/ath11k/0020-wifi-ath11k-update-ce-configurations-for-IPQ5018.patch
+deleted file mode 100644
+index 95643a95fe..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0020-wifi-ath11k-update-ce-configurations-for-IPQ5018.patch
++++ /dev/null
+@@ -1,246 +0,0 @@
+-From 26af7aabd2d8225c6b2056234626ba5099610871 Mon Sep 17 00:00:00 2001
+-From: Sriram R <quic_srirrama@quicinc.com>
+-Date: Fri, 2 Dec 2022 23:37:14 +0200
+-Subject: [PATCH] wifi: ath11k: update ce configurations for IPQ5018
+-
+-IPQ5018 is a single pdev device. Update host
+-and target CE configurations accordingly.
+-
+-Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
+-Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221122132152.17771-4-quic_kathirve@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/core.c |   4 +
+- drivers/net/wireless/ath/ath11k/core.h |   3 +
+- drivers/net/wireless/ath/ath11k/hw.c   | 191 +++++++++++++++++++++++++
+- 3 files changed, 198 insertions(+)
+-
+---- a/drivers/net/wireless/ath/ath11k/core.c
+-+++ b/drivers/net/wireless/ath/ath11k/core.c
+-@@ -630,6 +630,10 @@ static const struct ath11k_hw_params ath
+- 		.internal_sleep_clock = false,
+- 		.host_ce_config = ath11k_host_ce_config_qcn9074,
+- 		.ce_count = CE_CNT_5018,
+-+		.target_ce_config = ath11k_target_ce_config_wlan_ipq5018,
+-+		.target_ce_count = TARGET_CE_CNT_5018,
+-+		.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq5018,
+-+		.svc_to_ce_map_len = SVC_CE_MAP_LEN_5018,
+- 		.rxdma1_enable = true,
+- 		.num_rxmda_per_pdev = RXDMA_PER_PDEV_5018,
+- 		.rx_mac_buf_ring = false,
+---- a/drivers/net/wireless/ath/ath11k/core.h
+-+++ b/drivers/net/wireless/ath/ath11k/core.h
+-@@ -1145,6 +1145,9 @@ extern const struct service_to_pipe ath1
+- extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[];
+- extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[];
+- 
+-+extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq5018[];
+-+extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq5018[];
+-+
+- extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[];
+- extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[];
+- int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
+---- a/drivers/net/wireless/ath/ath11k/hw.c
+-+++ b/drivers/net/wireless/ath/ath11k/hw.c
+-@@ -1972,6 +1972,197 @@ const struct ath11k_hw_ring_mask ath11k_
+- 	},
+- };
+- 
+-+/* Target firmware's Copy Engine configuration for IPQ5018 */
+-+const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq5018[] = {
+-+	/* CE0: host->target HTC control and raw streams */
+-+	{
+-+		.pipenum = __cpu_to_le32(0),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_OUT),
+-+		.nentries = __cpu_to_le32(32),
+-+		.nbytes_max = __cpu_to_le32(2048),
+-+		.flags = __cpu_to_le32(CE_ATTR_FLAGS),
+-+		.reserved = __cpu_to_le32(0),
+-+	},
+-+
+-+	/* CE1: target->host HTT + HTC control */
+-+	{
+-+		.pipenum = __cpu_to_le32(1),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_IN),
+-+		.nentries = __cpu_to_le32(32),
+-+		.nbytes_max = __cpu_to_le32(2048),
+-+		.flags = __cpu_to_le32(CE_ATTR_FLAGS),
+-+		.reserved = __cpu_to_le32(0),
+-+	},
+-+
+-+	/* CE2: target->host WMI */
+-+	{
+-+		.pipenum = __cpu_to_le32(2),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_IN),
+-+		.nentries = __cpu_to_le32(32),
+-+		.nbytes_max = __cpu_to_le32(2048),
+-+		.flags = __cpu_to_le32(CE_ATTR_FLAGS),
+-+		.reserved = __cpu_to_le32(0),
+-+	},
+-+
+-+	/* CE3: host->target WMI */
+-+	{
+-+		.pipenum = __cpu_to_le32(3),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_OUT),
+-+		.nentries = __cpu_to_le32(32),
+-+		.nbytes_max = __cpu_to_le32(2048),
+-+		.flags = __cpu_to_le32(CE_ATTR_FLAGS),
+-+		.reserved = __cpu_to_le32(0),
+-+	},
+-+
+-+	/* CE4: host->target HTT */
+-+	{
+-+		.pipenum = __cpu_to_le32(4),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_OUT),
+-+		.nentries = __cpu_to_le32(256),
+-+		.nbytes_max = __cpu_to_le32(256),
+-+		.flags = __cpu_to_le32(CE_ATTR_FLAGS | CE_ATTR_DIS_INTR),
+-+		.reserved = __cpu_to_le32(0),
+-+	},
+-+
+-+	/* CE5: target->host Pktlog */
+-+	{
+-+		.pipenum = __cpu_to_le32(5),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_IN),
+-+		.nentries = __cpu_to_le32(32),
+-+		.nbytes_max = __cpu_to_le32(2048),
+-+		.flags = __cpu_to_le32(CE_ATTR_FLAGS),
+-+		.reserved = __cpu_to_le32(0),
+-+	},
+-+
+-+	/* CE6: Reserved for target autonomous hif_memcpy */
+-+	{
+-+		.pipenum = __cpu_to_le32(6),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_INOUT),
+-+		.nentries = __cpu_to_le32(32),
+-+		.nbytes_max = __cpu_to_le32(16384),
+-+		.flags = __cpu_to_le32(CE_ATTR_FLAGS),
+-+		.reserved = __cpu_to_le32(0),
+-+	},
+-+
+-+	/* CE7 used only by Host */
+-+	{
+-+		.pipenum = __cpu_to_le32(7),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_OUT),
+-+		.nentries = __cpu_to_le32(32),
+-+		.nbytes_max = __cpu_to_le32(2048),
+-+		.flags = __cpu_to_le32(0x2000),
+-+		.reserved = __cpu_to_le32(0),
+-+	},
+-+
+-+	/* CE8 target->host used only by IPA */
+-+	{
+-+		.pipenum = __cpu_to_le32(8),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_INOUT),
+-+		.nentries = __cpu_to_le32(32),
+-+		.nbytes_max = __cpu_to_le32(16384),
+-+		.flags = __cpu_to_le32(CE_ATTR_FLAGS),
+-+		.reserved = __cpu_to_le32(0),
+-+	},
+-+};
+-+
+-+/* Map from service/endpoint to Copy Engine for IPQ5018.
+-+ * This table is derived from the CE TABLE, above.
+-+ * It is passed to the Target at startup for use by firmware.
+-+ */
+-+const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq5018[] = {
+-+	{
+-+		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VO),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_OUT),	/* out = UL = host -> target */
+-+		.pipenum = __cpu_to_le32(3),
+-+	},
+-+	{
+-+		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VO),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+-+		.pipenum = __cpu_to_le32(2),
+-+	},
+-+	{
+-+		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BK),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_OUT),	/* out = UL = host -> target */
+-+		.pipenum = __cpu_to_le32(3),
+-+	},
+-+	{
+-+		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BK),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+-+		.pipenum = __cpu_to_le32(2),
+-+	},
+-+	{
+-+		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BE),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_OUT),	/* out = UL = host -> target */
+-+		.pipenum = __cpu_to_le32(3),
+-+	},
+-+	{
+-+		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BE),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+-+		.pipenum = __cpu_to_le32(2),
+-+	},
+-+	{
+-+		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VI),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_OUT),	/* out = UL = host -> target */
+-+		.pipenum = __cpu_to_le32(3),
+-+	},
+-+	{
+-+		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VI),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+-+		.pipenum = __cpu_to_le32(2),
+-+	},
+-+	{
+-+		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_CONTROL),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_OUT),	/* out = UL = host -> target */
+-+		.pipenum = __cpu_to_le32(3),
+-+	},
+-+	{
+-+		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_CONTROL),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+-+		.pipenum = __cpu_to_le32(2),
+-+	},
+-+
+-+	{
+-+		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_RSVD_CTRL),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_OUT),	/* out = UL = host -> target */
+-+		.pipenum = __cpu_to_le32(0),
+-+	},
+-+	{
+-+		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_RSVD_CTRL),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+-+		.pipenum = __cpu_to_le32(1),
+-+	},
+-+
+-+	{
+-+		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_TEST_RAW_STREAMS),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_OUT),	/* out = UL = host -> target */
+-+		.pipenum = __cpu_to_le32(0),
+-+	},
+-+	{
+-+		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_TEST_RAW_STREAMS),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+-+		.pipenum = __cpu_to_le32(1),
+-+	},
+-+	{
+-+		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_HTT_DATA_MSG),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_OUT),	/* out = UL = host -> target */
+-+		.pipenum = __cpu_to_le32(4),
+-+	},
+-+	{
+-+		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_HTT_DATA_MSG),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+-+		.pipenum = __cpu_to_le32(1),
+-+	},
+-+	{
+-+		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_PKT_LOG),
+-+		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+-+		.pipenum = __cpu_to_le32(5),
+-+	},
+-+
+-+       /* (Additions here) */
+-+
+-+	{ /* terminator entry */ }
+-+};
+-+
+- const struct ath11k_hw_regs ipq8074_regs = {
+- 	/* SW2TCL(x) R0 ring configuration address */
+- 	.hal_tcl1_ring_base_lsb = 0x00000510,
+diff --git a/package/kernel/mac80211/patches/ath11k/0021-wifi-ath11k-remap-ce-register-space-for-IPQ5018.patch b/package/kernel/mac80211/patches/ath11k/0021-wifi-ath11k-remap-ce-register-space-for-IPQ5018.patch
+deleted file mode 100644
+index d07a258ac2..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0021-wifi-ath11k-remap-ce-register-space-for-IPQ5018.patch
++++ /dev/null
+@@ -1,351 +0,0 @@
+-From b42b3678c91f3ca6e0888bf5a15c1e8678fd5f2d Mon Sep 17 00:00:00 2001
+-From: Sriram R <quic_srirrama@quicinc.com>
+-Date: Fri, 2 Dec 2022 23:37:14 +0200
+-Subject: [PATCH] wifi: ath11k: remap ce register space for IPQ5018
+-
+-In IPQ5018 ce register space is moved out of wcss unlike
+-ipq8074 or ipq6018 and the space is not contiguous,
+-hence remap the CE registers to a new space to access them.
+-
+-Register read/write is modified to check if the register to be written
+-falls in the CE register space and corresponding register is written.
+-Also adjust the interrupt register address to ce irq enable/disable.
+-
+-Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
+-Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221122132152.17771-5-quic_kathirve@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/ahb.c  | 44 ++++++++++++++++++++++----
+- drivers/net/wireless/ath/ath11k/ce.h   | 16 ++++++++++
+- drivers/net/wireless/ath/ath11k/core.c |  8 +++++
+- drivers/net/wireless/ath/ath11k/core.h |  1 +
+- drivers/net/wireless/ath/ath11k/hal.c  | 17 ++++++----
+- drivers/net/wireless/ath/ath11k/hal.h  |  5 +++
+- drivers/net/wireless/ath/ath11k/hw.c   | 17 ++++++++++
+- drivers/net/wireless/ath/ath11k/hw.h   |  9 ++++++
+- drivers/net/wireless/ath/ath11k/pci.c  |  2 ++
+- 9 files changed, 107 insertions(+), 12 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/ahb.c
+-+++ b/drivers/net/wireless/ath/ath11k/ahb.c
+-@@ -267,30 +267,42 @@ static void ath11k_ahb_clearbit32(struct
+- static void ath11k_ahb_ce_irq_enable(struct ath11k_base *ab, u16 ce_id)
+- {
+- 	const struct ce_attr *ce_attr;
+-+	const struct ce_ie_addr *ce_ie_addr = ab->hw_params.ce_ie_addr;
+-+	u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr;
+-+
+-+	ie1_reg_addr = ce_ie_addr->ie1_reg_addr + ATH11K_CE_OFFSET(ab);
+-+	ie2_reg_addr = ce_ie_addr->ie2_reg_addr + ATH11K_CE_OFFSET(ab);
+-+	ie3_reg_addr = ce_ie_addr->ie3_reg_addr + ATH11K_CE_OFFSET(ab);
+- 
+- 	ce_attr = &ab->hw_params.host_ce_config[ce_id];
+- 	if (ce_attr->src_nentries)
+--		ath11k_ahb_setbit32(ab, ce_id, CE_HOST_IE_ADDRESS);
+-+		ath11k_ahb_setbit32(ab, ce_id, ie1_reg_addr);
+- 
+- 	if (ce_attr->dest_nentries) {
+--		ath11k_ahb_setbit32(ab, ce_id, CE_HOST_IE_2_ADDRESS);
+-+		ath11k_ahb_setbit32(ab, ce_id, ie2_reg_addr);
+- 		ath11k_ahb_setbit32(ab, ce_id + CE_HOST_IE_3_SHIFT,
+--				    CE_HOST_IE_3_ADDRESS);
+-+				    ie3_reg_addr);
+- 	}
+- }
+- 
+- static void ath11k_ahb_ce_irq_disable(struct ath11k_base *ab, u16 ce_id)
+- {
+- 	const struct ce_attr *ce_attr;
+-+	const struct ce_ie_addr *ce_ie_addr = ab->hw_params.ce_ie_addr;
+-+	u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr;
+-+
+-+	ie1_reg_addr = ce_ie_addr->ie1_reg_addr + ATH11K_CE_OFFSET(ab);
+-+	ie2_reg_addr = ce_ie_addr->ie2_reg_addr + ATH11K_CE_OFFSET(ab);
+-+	ie3_reg_addr = ce_ie_addr->ie3_reg_addr + ATH11K_CE_OFFSET(ab);
+- 
+- 	ce_attr = &ab->hw_params.host_ce_config[ce_id];
+- 	if (ce_attr->src_nentries)
+--		ath11k_ahb_clearbit32(ab, ce_id, CE_HOST_IE_ADDRESS);
+-+		ath11k_ahb_clearbit32(ab, ce_id, ie1_reg_addr);
+- 
+- 	if (ce_attr->dest_nentries) {
+--		ath11k_ahb_clearbit32(ab, ce_id, CE_HOST_IE_2_ADDRESS);
+-+		ath11k_ahb_clearbit32(ab, ce_id, ie2_reg_addr);
+- 		ath11k_ahb_clearbit32(ab, ce_id + CE_HOST_IE_3_SHIFT,
+--				      CE_HOST_IE_3_ADDRESS);
+-+				      ie3_reg_addr);
+- 	}
+- }
+- 
+-@@ -1142,10 +1154,26 @@ static int ath11k_ahb_probe(struct platf
+- 		goto err_core_free;
+- 	}
+- 
+-+	ab->mem_ce = ab->mem;
+-+
+- 	ret = ath11k_core_pre_init(ab);
+- 	if (ret)
+- 		goto err_core_free;
+- 
+-+	if (ab->hw_params.ce_remap) {
+-+		const struct ce_remap *ce_remap = ab->hw_params.ce_remap;
+-+		/* ce register space is moved out of wcss unlike ipq8074 or ipq6018
+-+		 * and the space is not contiguous, hence remapping the CE registers
+-+		 * to a new space for accessing them.
+-+		 */
+-+		ab->mem_ce = ioremap(ce_remap->base, ce_remap->size);
+-+		if (IS_ERR(ab->mem_ce)) {
+-+			dev_err(&pdev->dev, "ce ioremap error\n");
+-+			ret = -ENOMEM;
+-+			goto err_core_free;
+-+		}
+-+	}
+-+
+- 	ret = ath11k_ahb_setup_resources(ab);
+- 	if (ret)
+- 		goto err_core_free;
+-@@ -1236,6 +1264,10 @@ static void ath11k_ahb_free_resources(st
+- 	ath11k_ahb_release_smp2p_handle(ab);
+- 	ath11k_ahb_fw_resource_deinit(ab);
+- 	ath11k_ce_free_pipes(ab);
+-+
+-+	if (ab->hw_params.ce_remap)
+-+		iounmap(ab->mem_ce);
+-+
+- 	ath11k_core_free(ab);
+- 	platform_set_drvdata(pdev, NULL);
+- }
+---- a/drivers/net/wireless/ath/ath11k/ce.h
+-+++ b/drivers/net/wireless/ath/ath11k/ce.h
+-@@ -49,6 +49,11 @@ void ath11k_ce_byte_swap(void *mem, u32
+- #define CE_HOST_IE_2_ADDRESS	0x00A18040
+- #define CE_HOST_IE_3_ADDRESS	CE_HOST_IE_ADDRESS
+- 
+-+/* CE IE registers are different for IPQ5018 */
+-+#define CE_HOST_IPQ5018_IE_ADDRESS		0x0841804C
+-+#define CE_HOST_IPQ5018_IE_2_ADDRESS		0x08418050
+-+#define CE_HOST_IPQ5018_IE_3_ADDRESS		CE_HOST_IPQ5018_IE_ADDRESS
+-+
+- #define CE_HOST_IE_3_SHIFT	0xC
+- 
+- #define CE_RING_IDX_INCR(nentries_mask, idx) (((idx) + 1) & (nentries_mask))
+-@@ -84,6 +89,17 @@ struct ce_pipe_config {
+- 	__le32 reserved;
+- };
+- 
+-+struct ce_ie_addr {
+-+	u32 ie1_reg_addr;
+-+	u32 ie2_reg_addr;
+-+	u32 ie3_reg_addr;
+-+};
+-+
+-+struct ce_remap {
+-+	u32 base;
+-+	u32 size;
+-+};
+-+
+- struct ce_attr {
+- 	/* CE_ATTR_* values */
+- 	unsigned int flags;
+---- a/drivers/net/wireless/ath/ath11k/core.c
+-+++ b/drivers/net/wireless/ath/ath11k/core.c
+-@@ -54,6 +54,7 @@ static const struct ath11k_hw_params ath
+- 		.target_ce_count = 11,
+- 		.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq8074,
+- 		.svc_to_ce_map_len = 21,
+-+		.ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
+- 		.single_pdev_only = false,
+- 		.rxdma1_enable = true,
+- 		.num_rxmda_per_pdev = 1,
+-@@ -137,6 +138,7 @@ static const struct ath11k_hw_params ath
+- 		.target_ce_count = 11,
+- 		.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq6018,
+- 		.svc_to_ce_map_len = 19,
+-+		.ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
+- 		.single_pdev_only = false,
+- 		.rxdma1_enable = true,
+- 		.num_rxmda_per_pdev = 1,
+-@@ -218,6 +220,7 @@ static const struct ath11k_hw_params ath
+- 		.target_ce_count = 9,
+- 		.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
+- 		.svc_to_ce_map_len = 14,
+-+		.ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
+- 		.single_pdev_only = true,
+- 		.rxdma1_enable = false,
+- 		.num_rxmda_per_pdev = 2,
+-@@ -301,6 +304,7 @@ static const struct ath11k_hw_params ath
+- 		.target_ce_count = 9,
+- 		.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qcn9074,
+- 		.svc_to_ce_map_len = 18,
+-+		.ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
+- 		.rxdma1_enable = true,
+- 		.num_rxmda_per_pdev = 1,
+- 		.rx_mac_buf_ring = false,
+-@@ -381,6 +385,7 @@ static const struct ath11k_hw_params ath
+- 		.target_ce_count = 9,
+- 		.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
+- 		.svc_to_ce_map_len = 14,
+-+		.ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
+- 		.single_pdev_only = true,
+- 		.rxdma1_enable = false,
+- 		.num_rxmda_per_pdev = 2,
+-@@ -546,6 +551,7 @@ static const struct ath11k_hw_params ath
+- 		.target_ce_count = 9,
+- 		.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
+- 		.svc_to_ce_map_len = 14,
+-+		.ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
+- 		.single_pdev_only = true,
+- 		.rxdma1_enable = false,
+- 		.num_rxmda_per_pdev = 1,
+-@@ -634,6 +640,8 @@ static const struct ath11k_hw_params ath
+- 		.target_ce_count = TARGET_CE_CNT_5018,
+- 		.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq5018,
+- 		.svc_to_ce_map_len = SVC_CE_MAP_LEN_5018,
+-+		.ce_ie_addr = &ath11k_ce_ie_addr_ipq5018,
+-+		.ce_remap = &ath11k_ce_remap_ipq5018,
+- 		.rxdma1_enable = true,
+- 		.num_rxmda_per_pdev = RXDMA_PER_PDEV_5018,
+- 		.rx_mac_buf_ring = false,
+---- a/drivers/net/wireless/ath/ath11k/core.h
+-+++ b/drivers/net/wireless/ath/ath11k/core.h
+-@@ -851,6 +851,7 @@ struct ath11k_base {
+- 	struct ath11k_dp dp;
+- 
+- 	void __iomem *mem;
+-+	void __iomem *mem_ce;
+- 	unsigned long mem_len;
+- 
+- 	struct {
+---- a/drivers/net/wireless/ath/ath11k/hal.c
+-+++ b/drivers/net/wireless/ath/ath11k/hal.c
+-@@ -1220,16 +1220,20 @@ static int ath11k_hal_srng_create_config
+- 	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_STATUS_RING_HP;
+- 
+- 	s = &hal->srng_config[HAL_CE_SRC];
+--	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
+--	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP;
+-+	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB +
+-+		ATH11K_CE_OFFSET(ab);
+-+	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP +
+-+		ATH11K_CE_OFFSET(ab);
+- 	s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
+- 		HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
+- 	s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
+- 		HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
+- 
+- 	s = &hal->srng_config[HAL_CE_DST];
+--	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
+--	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP;
+-+	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB +
+-+		ATH11K_CE_OFFSET(ab);
+-+	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP +
+-+		ATH11K_CE_OFFSET(ab);
+- 	s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+- 		HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
+- 	s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+-@@ -1237,8 +1241,9 @@ static int ath11k_hal_srng_create_config
+- 
+- 	s = &hal->srng_config[HAL_CE_DST_STATUS];
+- 	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) +
+--		HAL_CE_DST_STATUS_RING_BASE_LSB;
+--	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP;
+-+		HAL_CE_DST_STATUS_RING_BASE_LSB + ATH11K_CE_OFFSET(ab);
+-+	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP +
+-+		ATH11K_CE_OFFSET(ab);
+- 	s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+- 		HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
+- 	s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+---- a/drivers/net/wireless/ath/ath11k/hal.h
+-+++ b/drivers/net/wireless/ath/ath11k/hal.h
+-@@ -321,6 +321,10 @@ struct ath11k_base;
+- #define HAL_WBM2SW_RELEASE_RING_BASE_MSB_RING_SIZE	0x000fffff
+- #define HAL_RXDMA_RING_MAX_SIZE				0x0000ffff
+- 
+-+/* IPQ5018 ce registers */
+-+#define HAL_IPQ5018_CE_WFSS_REG_BASE		0x08400000
+-+#define HAL_IPQ5018_CE_SIZE			0x200000
+-+
+- /* Add any other errors here and return them in
+-  * ath11k_hal_rx_desc_get_err().
+-  */
+-@@ -519,6 +523,7 @@ enum hal_srng_dir {
+- #define HAL_SRNG_FLAGS_MSI_INTR			0x00020000
+- #define HAL_SRNG_FLAGS_CACHED                   0x20000000
+- #define HAL_SRNG_FLAGS_LMAC_RING		0x80000000
+-+#define HAL_SRNG_FLAGS_REMAP_CE_RING        0x10000000
+- 
+- #define HAL_SRNG_TLV_HDR_TAG		GENMASK(9, 1)
+- #define HAL_SRNG_TLV_HDR_LEN		GENMASK(25, 10)
+---- a/drivers/net/wireless/ath/ath11k/hw.c
+-+++ b/drivers/net/wireless/ath/ath11k/hw.c
+-@@ -2163,6 +2163,23 @@ const struct service_to_pipe ath11k_targ
+- 	{ /* terminator entry */ }
+- };
+- 
+-+const struct ce_ie_addr ath11k_ce_ie_addr_ipq8074 = {
+-+	.ie1_reg_addr = CE_HOST_IE_ADDRESS,
+-+	.ie2_reg_addr = CE_HOST_IE_2_ADDRESS,
+-+	.ie3_reg_addr = CE_HOST_IE_3_ADDRESS,
+-+};
+-+
+-+const struct ce_ie_addr ath11k_ce_ie_addr_ipq5018 = {
+-+	.ie1_reg_addr = CE_HOST_IPQ5018_IE_ADDRESS - HAL_IPQ5018_CE_WFSS_REG_BASE,
+-+	.ie2_reg_addr = CE_HOST_IPQ5018_IE_2_ADDRESS - HAL_IPQ5018_CE_WFSS_REG_BASE,
+-+	.ie3_reg_addr = CE_HOST_IPQ5018_IE_3_ADDRESS - HAL_IPQ5018_CE_WFSS_REG_BASE,
+-+};
+-+
+-+const struct ce_remap ath11k_ce_remap_ipq5018 = {
+-+	.base = HAL_IPQ5018_CE_WFSS_REG_BASE,
+-+	.size = HAL_IPQ5018_CE_SIZE,
+-+};
+-+
+- const struct ath11k_hw_regs ipq8074_regs = {
+- 	/* SW2TCL(x) R0 ring configuration address */
+- 	.hal_tcl1_ring_base_lsb = 0x00000510,
+---- a/drivers/net/wireless/ath/ath11k/hw.h
+-+++ b/drivers/net/wireless/ath/ath11k/hw.h
+-@@ -80,6 +80,8 @@
+- #define ATH11K_M3_FILE			"m3.bin"
+- #define ATH11K_REGDB_FILE_NAME		"regdb.bin"
+- 
+-+#define ATH11K_CE_OFFSET(ab)	(ab->mem_ce - ab->mem)
+-+
+- enum ath11k_hw_rate_cck {
+- 	ATH11K_HW_RATE_CCK_LP_11M = 0,
+- 	ATH11K_HW_RATE_CCK_LP_5_5M,
+-@@ -158,6 +160,8 @@ struct ath11k_hw_params {
+- 	u32 target_ce_count;
+- 	const struct service_to_pipe *svc_to_ce_map;
+- 	u32 svc_to_ce_map_len;
+-+	const struct ce_ie_addr *ce_ie_addr;
+-+	const struct ce_remap *ce_remap;
+- 
+- 	bool single_pdev_only;
+- 
+-@@ -277,6 +281,11 @@ extern const struct ath11k_hw_ring_mask
+- extern const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_qcn9074;
+- extern const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_wcn6750;
+- 
+-+extern const struct ce_ie_addr ath11k_ce_ie_addr_ipq8074;
+-+extern const struct ce_ie_addr ath11k_ce_ie_addr_ipq5018;
+-+
+-+extern const struct ce_remap ath11k_ce_remap_ipq5018;
+-+
+- extern const struct ath11k_hw_hal_params ath11k_hw_hal_params_ipq8074;
+- extern const struct ath11k_hw_hal_params ath11k_hw_hal_params_qca6390;
+- extern const struct ath11k_hw_hal_params ath11k_hw_hal_params_wcn6750;
+---- a/drivers/net/wireless/ath/ath11k/pci.c
+-+++ b/drivers/net/wireless/ath/ath11k/pci.c
+-@@ -543,6 +543,8 @@ static int ath11k_pci_claim(struct ath11
+- 		goto clear_master;
+- 	}
+- 
+-+	ab->mem_ce = ab->mem;
+-+
+- 	ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot pci_mem 0x%pK\n", ab->mem);
+- 	return 0;
+- 
+diff --git a/package/kernel/mac80211/patches/ath11k/0022-wifi-ath11k-update-hal-srng-regs-for-IPQ5018.patch b/package/kernel/mac80211/patches/ath11k/0022-wifi-ath11k-update-hal-srng-regs-for-IPQ5018.patch
+deleted file mode 100644
+index 35ea20a3c4..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0022-wifi-ath11k-update-hal-srng-regs-for-IPQ5018.patch
++++ /dev/null
+@@ -1,130 +0,0 @@
+-From 711b80acbdfb9667a9cf8374e13320a6e624ce73 Mon Sep 17 00:00:00 2001
+-From: Sriram R <quic_srirrama@quicinc.com>
+-Date: Fri, 2 Dec 2022 23:37:14 +0200
+-Subject: [PATCH] wifi: ath11k: update hal srng regs for IPQ5018
+-
+-IPQ5018 hal srng register address & offsets are not
+-similar to IPQ8074/IPQ6018/QCN9074, hence define a
+-new set of srng register group data for IPQ5018.
+-
+-Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
+-Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221122132152.17771-6-quic_kathirve@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/core.c |  1 +
+- drivers/net/wireless/ath/ath11k/hw.c   | 79 ++++++++++++++++++++++++++
+- drivers/net/wireless/ath/ath11k/hw.h   |  1 +
+- 3 files changed, 81 insertions(+)
+-
+---- a/drivers/net/wireless/ath/ath11k/core.c
+-+++ b/drivers/net/wireless/ath/ath11k/core.c
+-@@ -634,6 +634,7 @@ static const struct ath11k_hw_params ath
+- 			.max_fft_bins = 1024,
+- 		},
+- 		.internal_sleep_clock = false,
+-+		.regs = &ipq5018_regs,
+- 		.host_ce_config = ath11k_host_ce_config_qcn9074,
+- 		.ce_count = CE_CNT_5018,
+- 		.target_ce_config = ath11k_target_ce_config_wlan_ipq5018,
+---- a/drivers/net/wireless/ath/ath11k/hw.c
+-+++ b/drivers/net/wireless/ath/ath11k/hw.c
+-@@ -2645,6 +2645,85 @@ static const struct ath11k_hw_tcl2wbm_rb
+- 	},
+- };
+- 
+-+const struct ath11k_hw_regs ipq5018_regs = {
+-+	/* SW2TCL(x) R0 ring configuration address */
+-+	.hal_tcl1_ring_base_lsb = 0x00000694,
+-+	.hal_tcl1_ring_base_msb = 0x00000698,
+-+	.hal_tcl1_ring_id =	0x0000069c,
+-+	.hal_tcl1_ring_misc = 0x000006a4,
+-+	.hal_tcl1_ring_tp_addr_lsb = 0x000006b0,
+-+	.hal_tcl1_ring_tp_addr_msb = 0x000006b4,
+-+	.hal_tcl1_ring_consumer_int_setup_ix0 = 0x000006c4,
+-+	.hal_tcl1_ring_consumer_int_setup_ix1 = 0x000006c8,
+-+	.hal_tcl1_ring_msi1_base_lsb = 0x000006dc,
+-+	.hal_tcl1_ring_msi1_base_msb = 0x000006e0,
+-+	.hal_tcl1_ring_msi1_data = 0x000006e4,
+-+	.hal_tcl2_ring_base_lsb = 0x000006ec,
+-+	.hal_tcl_ring_base_lsb = 0x0000079c,
+-+
+-+	/* TCL STATUS ring address */
+-+	.hal_tcl_status_ring_base_lsb = 0x000008a4,
+-+
+-+	/* REO2SW(x) R0 ring configuration address */
+-+	.hal_reo1_ring_base_lsb = 0x000001ec,
+-+	.hal_reo1_ring_base_msb = 0x000001f0,
+-+	.hal_reo1_ring_id = 0x000001f4,
+-+	.hal_reo1_ring_misc = 0x000001fc,
+-+	.hal_reo1_ring_hp_addr_lsb = 0x00000200,
+-+	.hal_reo1_ring_hp_addr_msb = 0x00000204,
+-+	.hal_reo1_ring_producer_int_setup = 0x00000210,
+-+	.hal_reo1_ring_msi1_base_lsb = 0x00000234,
+-+	.hal_reo1_ring_msi1_base_msb = 0x00000238,
+-+	.hal_reo1_ring_msi1_data = 0x0000023c,
+-+	.hal_reo2_ring_base_lsb = 0x00000244,
+-+	.hal_reo1_aging_thresh_ix_0 = 0x00000564,
+-+	.hal_reo1_aging_thresh_ix_1 = 0x00000568,
+-+	.hal_reo1_aging_thresh_ix_2 = 0x0000056c,
+-+	.hal_reo1_aging_thresh_ix_3 = 0x00000570,
+-+
+-+	/* REO2SW(x) R2 ring pointers (head/tail) address */
+-+	.hal_reo1_ring_hp = 0x00003028,
+-+	.hal_reo1_ring_tp = 0x0000302c,
+-+	.hal_reo2_ring_hp = 0x00003030,
+-+
+-+	/* REO2TCL R0 ring configuration address */
+-+	.hal_reo_tcl_ring_base_lsb = 0x000003fc,
+-+	.hal_reo_tcl_ring_hp = 0x00003058,
+-+
+-+	/* SW2REO ring address */
+-+	.hal_sw2reo_ring_base_lsb = 0x0000013c,
+-+	.hal_sw2reo_ring_hp = 0x00003018,
+-+
+-+	/* REO CMD ring address */
+-+	.hal_reo_cmd_ring_base_lsb = 0x000000e4,
+-+	.hal_reo_cmd_ring_hp = 0x00003010,
+-+
+-+	/* REO status address */
+-+	.hal_reo_status_ring_base_lsb = 0x00000504,
+-+	.hal_reo_status_hp = 0x00003070,
+-+
+-+	/* WCSS relative address */
+-+	.hal_seq_wcss_umac_ce0_src_reg = 0x08400000
+-+		- HAL_IPQ5018_CE_WFSS_REG_BASE,
+-+	.hal_seq_wcss_umac_ce0_dst_reg = 0x08401000
+-+		- HAL_IPQ5018_CE_WFSS_REG_BASE,
+-+	.hal_seq_wcss_umac_ce1_src_reg = 0x08402000
+-+		- HAL_IPQ5018_CE_WFSS_REG_BASE,
+-+	.hal_seq_wcss_umac_ce1_dst_reg = 0x08403000
+-+		- HAL_IPQ5018_CE_WFSS_REG_BASE,
+-+
+-+	/* WBM Idle address */
+-+	.hal_wbm_idle_link_ring_base_lsb = 0x00000874,
+-+	.hal_wbm_idle_link_ring_misc = 0x00000884,
+-+
+-+	/* SW2WBM release address */
+-+	.hal_wbm_release_ring_base_lsb = 0x000001ec,
+-+
+-+	/* WBM2SW release address */
+-+	.hal_wbm0_release_ring_base_lsb = 0x00000924,
+-+	.hal_wbm1_release_ring_base_lsb = 0x0000097c,
+-+};
+-+
+- const struct ath11k_hw_hal_params ath11k_hw_hal_params_ipq8074 = {
+- 	.rx_buf_rbm = HAL_RX_BUF_RBM_SW3_BM,
+- 	.tcl2wbm_rbm_map = ath11k_hw_tcl2wbm_rbm_map_ipq8074,
+---- a/drivers/net/wireless/ath/ath11k/hw.h
+-+++ b/drivers/net/wireless/ath/ath11k/hw.h
+-@@ -415,6 +415,7 @@ extern const struct ath11k_hw_regs qca63
+- extern const struct ath11k_hw_regs qcn9074_regs;
+- extern const struct ath11k_hw_regs wcn6855_regs;
+- extern const struct ath11k_hw_regs wcn6750_regs;
+-+extern const struct ath11k_hw_regs ipq5018_regs;
+- 
+- static inline const char *ath11k_bd_ie_type_str(enum ath11k_bd_ie_type type)
+- {
+diff --git a/package/kernel/mac80211/patches/ath11k/0023-wifi-ath11k-initialize-hw_ops-for-IPQ5018.patch b/package/kernel/mac80211/patches/ath11k/0023-wifi-ath11k-initialize-hw_ops-for-IPQ5018.patch
+deleted file mode 100644
+index 5ef701a445..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0023-wifi-ath11k-initialize-hw_ops-for-IPQ5018.patch
++++ /dev/null
+@@ -1,90 +0,0 @@
+-From ba60f2793d3a37a00da14bb56a26558a902d2831 Mon Sep 17 00:00:00 2001
+-From: Sriram R <quic_srirrama@quicinc.com>
+-Date: Fri, 2 Dec 2022 23:37:14 +0200
+-Subject: [PATCH] wifi: ath11k: initialize hw_ops for IPQ5018
+-
+-The ipq5018_ops is initialized for IPQ5018. This is different from
+-other platforms.
+-
+-Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
+-Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221122132152.17771-7-quic_kathirve@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/core.c |  1 +
+- drivers/net/wireless/ath/ath11k/hw.c   | 40 ++++++++++++++++++++++++++
+- drivers/net/wireless/ath/ath11k/hw.h   |  1 +
+- 3 files changed, 42 insertions(+)
+-
+---- a/drivers/net/wireless/ath/ath11k/core.c
+-+++ b/drivers/net/wireless/ath/ath11k/core.c
+-@@ -635,6 +635,7 @@ static const struct ath11k_hw_params ath
+- 		},
+- 		.internal_sleep_clock = false,
+- 		.regs = &ipq5018_regs,
+-+		.hw_ops = &ipq5018_ops,
+- 		.host_ce_config = ath11k_host_ce_config_qcn9074,
+- 		.ce_count = CE_CNT_5018,
+- 		.target_ce_config = ath11k_target_ce_config_wlan_ipq5018,
+---- a/drivers/net/wireless/ath/ath11k/hw.c
+-+++ b/drivers/net/wireless/ath/ath11k/hw.c
+-@@ -1084,6 +1084,46 @@ const struct ath11k_hw_ops wcn6750_ops =
+- 	.get_ring_selector = ath11k_hw_wcn6750_get_tcl_ring_selector,
+- };
+- 
+-+/* IPQ5018 hw ops is similar to QCN9074 except for the dest ring remap */
+-+const struct ath11k_hw_ops ipq5018_ops = {
+-+	.get_hw_mac_from_pdev_id = ath11k_hw_ipq6018_mac_from_pdev_id,
+-+	.wmi_init_config = ath11k_init_wmi_config_ipq8074,
+-+	.mac_id_to_pdev_id = ath11k_hw_mac_id_to_pdev_id_ipq8074,
+-+	.mac_id_to_srng_id = ath11k_hw_mac_id_to_srng_id_ipq8074,
+-+	.tx_mesh_enable = ath11k_hw_qcn9074_tx_mesh_enable,
+-+	.rx_desc_get_first_msdu = ath11k_hw_qcn9074_rx_desc_get_first_msdu,
+-+	.rx_desc_get_last_msdu = ath11k_hw_qcn9074_rx_desc_get_last_msdu,
+-+	.rx_desc_get_l3_pad_bytes = ath11k_hw_qcn9074_rx_desc_get_l3_pad_bytes,
+-+	.rx_desc_get_hdr_status = ath11k_hw_qcn9074_rx_desc_get_hdr_status,
+-+	.rx_desc_encrypt_valid = ath11k_hw_qcn9074_rx_desc_encrypt_valid,
+-+	.rx_desc_get_encrypt_type = ath11k_hw_qcn9074_rx_desc_get_encrypt_type,
+-+	.rx_desc_get_decap_type = ath11k_hw_qcn9074_rx_desc_get_decap_type,
+-+	.rx_desc_get_mesh_ctl = ath11k_hw_qcn9074_rx_desc_get_mesh_ctl,
+-+	.rx_desc_get_ldpc_support = ath11k_hw_qcn9074_rx_desc_get_ldpc_support,
+-+	.rx_desc_get_mpdu_seq_ctl_vld = ath11k_hw_qcn9074_rx_desc_get_mpdu_seq_ctl_vld,
+-+	.rx_desc_get_mpdu_fc_valid = ath11k_hw_qcn9074_rx_desc_get_mpdu_fc_valid,
+-+	.rx_desc_get_mpdu_start_seq_no = ath11k_hw_qcn9074_rx_desc_get_mpdu_start_seq_no,
+-+	.rx_desc_get_msdu_len = ath11k_hw_qcn9074_rx_desc_get_msdu_len,
+-+	.rx_desc_get_msdu_sgi = ath11k_hw_qcn9074_rx_desc_get_msdu_sgi,
+-+	.rx_desc_get_msdu_rate_mcs = ath11k_hw_qcn9074_rx_desc_get_msdu_rate_mcs,
+-+	.rx_desc_get_msdu_rx_bw = ath11k_hw_qcn9074_rx_desc_get_msdu_rx_bw,
+-+	.rx_desc_get_msdu_freq = ath11k_hw_qcn9074_rx_desc_get_msdu_freq,
+-+	.rx_desc_get_msdu_pkt_type = ath11k_hw_qcn9074_rx_desc_get_msdu_pkt_type,
+-+	.rx_desc_get_msdu_nss = ath11k_hw_qcn9074_rx_desc_get_msdu_nss,
+-+	.rx_desc_get_mpdu_tid = ath11k_hw_qcn9074_rx_desc_get_mpdu_tid,
+-+	.rx_desc_get_mpdu_peer_id = ath11k_hw_qcn9074_rx_desc_get_mpdu_peer_id,
+-+	.rx_desc_copy_attn_end_tlv = ath11k_hw_qcn9074_rx_desc_copy_attn_end,
+-+	.rx_desc_get_mpdu_start_tag = ath11k_hw_qcn9074_rx_desc_get_mpdu_start_tag,
+-+	.rx_desc_get_mpdu_ppdu_id = ath11k_hw_qcn9074_rx_desc_get_mpdu_ppdu_id,
+-+	.rx_desc_set_msdu_len = ath11k_hw_qcn9074_rx_desc_set_msdu_len,
+-+	.rx_desc_get_attention = ath11k_hw_qcn9074_rx_desc_get_attention,
+-+	.rx_desc_get_msdu_payload = ath11k_hw_qcn9074_rx_desc_get_msdu_payload,
+-+	.mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid,
+-+	.rx_desc_mac_addr2_valid = ath11k_hw_ipq9074_rx_desc_mac_addr2_valid,
+-+	.rx_desc_mpdu_start_addr2 = ath11k_hw_ipq9074_rx_desc_mpdu_start_addr2,
+-+
+-+};
+-+
+- #define ATH11K_TX_RING_MASK_0 BIT(0)
+- #define ATH11K_TX_RING_MASK_1 BIT(1)
+- #define ATH11K_TX_RING_MASK_2 BIT(2)
+---- a/drivers/net/wireless/ath/ath11k/hw.h
+-+++ b/drivers/net/wireless/ath/ath11k/hw.h
+-@@ -275,6 +275,7 @@ extern const struct ath11k_hw_ops qca639
+- extern const struct ath11k_hw_ops qcn9074_ops;
+- extern const struct ath11k_hw_ops wcn6855_ops;
+- extern const struct ath11k_hw_ops wcn6750_ops;
+-+extern const struct ath11k_hw_ops ipq5018_ops;
+- 
+- extern const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_ipq8074;
+- extern const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_qca6390;
+diff --git a/package/kernel/mac80211/patches/ath11k/0024-wifi-ath11k-add-new-hw-ops-for-IPQ5018-to-get-rx-des.patch b/package/kernel/mac80211/patches/ath11k/0024-wifi-ath11k-add-new-hw-ops-for-IPQ5018-to-get-rx-des.patch
+deleted file mode 100644
+index 64531f13f8..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0024-wifi-ath11k-add-new-hw-ops-for-IPQ5018-to-get-rx-des.patch
++++ /dev/null
+@@ -1,84 +0,0 @@
+-From 69968f88f1770d61cae0febef805fd00d66cf6a1 Mon Sep 17 00:00:00 2001
+-From: Sriram R <quic_srirrama@quicinc.com>
+-Date: Fri, 2 Dec 2022 23:37:15 +0200
+-Subject: [PATCH] wifi: ath11k: add new hw ops for IPQ5018 to get rx dest ring
+- hashmap
+-
+-The Destination ring control register is different
+-for IPQ5018 when compared to IPQ8074/IPQ6018/QCN9074.
+-Hence create a new hw ops to fetch the hash ring map
+-for different device variants. ipq5018 hw ops
+-is similar to qcn9074 except for this change, so reuse
+-all the qcn9074 ops for ipq5018.
+-
+-Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
+-Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221122132152.17771-8-quic_kathirve@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/hw.c | 44 ++++++++++++++++++++++++++++
+- 1 file changed, 44 insertions(+)
+-
+---- a/drivers/net/wireless/ath/ath11k/hw.c
+-+++ b/drivers/net/wireless/ath/ath11k/hw.c
+-@@ -791,6 +791,49 @@ static void ath11k_hw_wcn6855_reo_setup(
+- 			   ring_hash_map);
+- }
+- 
+-+static void ath11k_hw_ipq5018_reo_setup(struct ath11k_base *ab)
+-+{
+-+	u32 reo_base = HAL_SEQ_WCSS_UMAC_REO_REG;
+-+	u32 val;
+-+
+-+	/* Each hash entry uses three bits to map to a particular ring. */
+-+	u32 ring_hash_map = HAL_HASH_ROUTING_RING_SW1 << 0 |
+-+		HAL_HASH_ROUTING_RING_SW2 << 4 |
+-+		HAL_HASH_ROUTING_RING_SW3 << 8 |
+-+		HAL_HASH_ROUTING_RING_SW4 << 12 |
+-+		HAL_HASH_ROUTING_RING_SW1 << 16 |
+-+		HAL_HASH_ROUTING_RING_SW2 << 20 |
+-+		HAL_HASH_ROUTING_RING_SW3 << 24 |
+-+		HAL_HASH_ROUTING_RING_SW4 << 28;
+-+
+-+	val = ath11k_hif_read32(ab, reo_base + HAL_REO1_GEN_ENABLE);
+-+
+-+	val &= ~HAL_REO1_GEN_ENABLE_FRAG_DST_RING;
+-+	val |= FIELD_PREP(HAL_REO1_GEN_ENABLE_FRAG_DST_RING,
+-+			HAL_SRNG_RING_ID_REO2SW1) |
+-+		FIELD_PREP(HAL_REO1_GEN_ENABLE_AGING_LIST_ENABLE, 1) |
+-+		FIELD_PREP(HAL_REO1_GEN_ENABLE_AGING_FLUSH_ENABLE, 1);
+-+	ath11k_hif_write32(ab, reo_base + HAL_REO1_GEN_ENABLE, val);
+-+
+-+	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_0(ab),
+-+			   HAL_DEFAULT_REO_TIMEOUT_USEC);
+-+	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_1(ab),
+-+			   HAL_DEFAULT_REO_TIMEOUT_USEC);
+-+	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_2(ab),
+-+			   HAL_DEFAULT_REO_TIMEOUT_USEC);
+-+	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_3(ab),
+-+			   HAL_DEFAULT_REO_TIMEOUT_USEC);
+-+
+-+	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_0,
+-+			   ring_hash_map);
+-+	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_1,
+-+			   ring_hash_map);
+-+	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_2,
+-+			   ring_hash_map);
+-+	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_3,
+-+			   ring_hash_map);
+-+}
+-+
+- static u16 ath11k_hw_ipq8074_mpdu_info_get_peerid(u8 *tlv_data)
+- {
+- 	u16 peer_id = 0;
+-@@ -1117,6 +1160,7 @@ const struct ath11k_hw_ops ipq5018_ops =
+- 	.rx_desc_get_mpdu_ppdu_id = ath11k_hw_qcn9074_rx_desc_get_mpdu_ppdu_id,
+- 	.rx_desc_set_msdu_len = ath11k_hw_qcn9074_rx_desc_set_msdu_len,
+- 	.rx_desc_get_attention = ath11k_hw_qcn9074_rx_desc_get_attention,
+-+	.reo_setup = ath11k_hw_ipq5018_reo_setup,
+- 	.rx_desc_get_msdu_payload = ath11k_hw_qcn9074_rx_desc_get_msdu_payload,
+- 	.mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid,
+- 	.rx_desc_mac_addr2_valid = ath11k_hw_ipq9074_rx_desc_mac_addr2_valid,
+diff --git a/package/kernel/mac80211/patches/ath11k/0025-wifi-ath11k-add-ipq5018-device-support.patch b/package/kernel/mac80211/patches/ath11k/0025-wifi-ath11k-add-ipq5018-device-support.patch
+deleted file mode 100644
+index 5b930e8d4f..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0025-wifi-ath11k-add-ipq5018-device-support.patch
++++ /dev/null
+@@ -1,31 +0,0 @@
+-From 25edca7bb18a2a40cc7e54c6f522e9b3c917e2c5 Mon Sep 17 00:00:00 2001
+-From: Sriram R <quic_srirrama@quicinc.com>
+-Date: Fri, 2 Dec 2022 23:37:15 +0200
+-Subject: [PATCH] wifi: ath11k: add ipq5018 device support
+-
+-ipq5018 is a ahb 2ghz device, enable the compatible support for
+-ipq5018 in ahb.
+-
+-Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
+-Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221122132152.17771-9-quic_kathirve@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/ahb.c | 3 +++
+- 1 file changed, 3 insertions(+)
+-
+---- a/drivers/net/wireless/ath/ath11k/ahb.c
+-+++ b/drivers/net/wireless/ath/ath11k/ahb.c
+-@@ -32,6 +32,9 @@ static const struct of_device_id ath11k_
+- 	{ .compatible = "qcom,wcn6750-wifi",
+- 	  .data = (void *)ATH11K_HW_WCN6750_HW10,
+- 	},
+-+	{ .compatible = "qcom,ipq5018-wifi",
+-+	  .data = (void *)ATH11K_HW_IPQ5018_HW10,
+-+	},
+- 	{ }
+- };
+- 
+diff --git a/package/kernel/mac80211/patches/ath11k/0026-wifi-ath11k-Fix-scan-request-param-frame-size-warnin.patch b/package/kernel/mac80211/patches/ath11k/0026-wifi-ath11k-Fix-scan-request-param-frame-size-warnin.patch
+deleted file mode 100644
+index 50c14e7b98..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0026-wifi-ath11k-Fix-scan-request-param-frame-size-warnin.patch
++++ /dev/null
+@@ -1,161 +0,0 @@
+-From d45daa6d1a8da080f1b516c570a8428a7b9225e4 Mon Sep 17 00:00:00 2001
+-From: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Date: Tue, 6 Dec 2022 00:51:25 +0530
+-Subject: [PATCH] wifi: ath11k: Fix scan request param frame size warning
+-
+-Following warning was observed
+-
+-drivers/net/wireless/ath/ath11k/mac.c:2351:1: warning: the frame
+-size of 1184 bytes is larger than 1024 bytes [-Wframe-larger-than=]
+-
+-A local variable is declared with a size larger than 1024 bytes
+-this causing a compilation warning. Change the local variable to
+-heap memory to fix the warning.
+-
+-Tested-on: IPQ8074 AHB WLAN.HK.2.7.0.1-01701-QCAHKSWPL_SILICONZ-1 v2
+-
+-Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221205192125.13533-1-quic_kathirve@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 83 +++++++++++++++------------
+- 1 file changed, 45 insertions(+), 38 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -3612,7 +3612,7 @@ static int ath11k_mac_op_hw_scan(struct
+- 	struct ath11k *ar = hw->priv;
+- 	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
+- 	struct cfg80211_scan_request *req = &hw_req->req;
+--	struct scan_req_params arg;
+-+	struct scan_req_params *arg = NULL;
+- 	int ret = 0;
+- 	int i;
+- 	u32 scan_timeout;
+-@@ -3640,72 +3640,78 @@ static int ath11k_mac_op_hw_scan(struct
+- 	if (ret)
+- 		goto exit;
+- 
+--	memset(&arg, 0, sizeof(arg));
+--	ath11k_wmi_start_scan_init(ar, &arg);
+--	arg.vdev_id = arvif->vdev_id;
+--	arg.scan_id = ATH11K_SCAN_ID;
+-+	arg = kzalloc(sizeof(*arg), GFP_KERNEL);
+-+
+-+	if (!arg) {
+-+		ret = -ENOMEM;
+-+		goto exit;
+-+	}
+-+
+-+	ath11k_wmi_start_scan_init(ar, arg);
+-+	arg->vdev_id = arvif->vdev_id;
+-+	arg->scan_id = ATH11K_SCAN_ID;
+- 
+- 	if (req->ie_len) {
+--		arg.extraie.ptr = kmemdup(req->ie, req->ie_len, GFP_KERNEL);
+--		if (!arg.extraie.ptr) {
+-+		arg->extraie.ptr = kmemdup(req->ie, req->ie_len, GFP_KERNEL);
+-+		if (!arg->extraie.ptr) {
+- 			ret = -ENOMEM;
+- 			goto exit;
+- 		}
+--		arg.extraie.len = req->ie_len;
+-+		arg->extraie.len = req->ie_len;
+- 	}
+- 
+- 	if (req->n_ssids) {
+--		arg.num_ssids = req->n_ssids;
+--		for (i = 0; i < arg.num_ssids; i++) {
+--			arg.ssid[i].length  = req->ssids[i].ssid_len;
+--			memcpy(&arg.ssid[i].ssid, req->ssids[i].ssid,
+-+		arg->num_ssids = req->n_ssids;
+-+		for (i = 0; i < arg->num_ssids; i++) {
+-+			arg->ssid[i].length  = req->ssids[i].ssid_len;
+-+			memcpy(&arg->ssid[i].ssid, req->ssids[i].ssid,
+- 			       req->ssids[i].ssid_len);
+- 		}
+- 	} else {
+--		arg.scan_flags |= WMI_SCAN_FLAG_PASSIVE;
+-+		arg->scan_flags |= WMI_SCAN_FLAG_PASSIVE;
+- 	}
+- 
+- 	if (req->n_channels) {
+--		arg.num_chan = req->n_channels;
+--		arg.chan_list = kcalloc(arg.num_chan, sizeof(*arg.chan_list),
+--					GFP_KERNEL);
+-+		arg->num_chan = req->n_channels;
+-+		arg->chan_list = kcalloc(arg->num_chan, sizeof(*arg->chan_list),
+-+					 GFP_KERNEL);
+- 
+--		if (!arg.chan_list) {
+-+		if (!arg->chan_list) {
+- 			ret = -ENOMEM;
+- 			goto exit;
+- 		}
+- 
+--		for (i = 0; i < arg.num_chan; i++)
+--			arg.chan_list[i] = req->channels[i]->center_freq;
+-+		for (i = 0; i < arg->num_chan; i++)
+-+			arg->chan_list[i] = req->channels[i]->center_freq;
+- 	}
+- 
+- 	if (req->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) {
+--		arg.scan_f_add_spoofed_mac_in_probe = 1;
+--		ether_addr_copy(arg.mac_addr.addr, req->mac_addr);
+--		ether_addr_copy(arg.mac_mask.addr, req->mac_addr_mask);
+-+		arg->scan_f_add_spoofed_mac_in_probe = 1;
+-+		ether_addr_copy(arg->mac_addr.addr, req->mac_addr);
+-+		ether_addr_copy(arg->mac_mask.addr, req->mac_addr_mask);
+- 	}
+- 
+- 	/* if duration is set, default dwell times will be overwritten */
+- 	if (req->duration) {
+--		arg.dwell_time_active = req->duration;
+--		arg.dwell_time_active_2g = req->duration;
+--		arg.dwell_time_active_6g = req->duration;
+--		arg.dwell_time_passive = req->duration;
+--		arg.dwell_time_passive_6g = req->duration;
+--		arg.burst_duration = req->duration;
+-+		arg->dwell_time_active = req->duration;
+-+		arg->dwell_time_active_2g = req->duration;
+-+		arg->dwell_time_active_6g = req->duration;
+-+		arg->dwell_time_passive = req->duration;
+-+		arg->dwell_time_passive_6g = req->duration;
+-+		arg->burst_duration = req->duration;
+- 
+--		scan_timeout = min_t(u32, arg.max_rest_time *
+--				(arg.num_chan - 1) + (req->duration +
+-+		scan_timeout = min_t(u32, arg->max_rest_time *
+-+				(arg->num_chan - 1) + (req->duration +
+- 				ATH11K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD) *
+--				arg.num_chan, arg.max_scan_time);
+-+				arg->num_chan, arg->max_scan_time);
+- 	} else {
+--		scan_timeout = arg.max_scan_time;
+-+		scan_timeout = arg->max_scan_time;
+- 	}
+- 
+- 	/* Add a margin to account for event/command processing */
+- 	scan_timeout += ATH11K_MAC_SCAN_CMD_EVT_OVERHEAD;
+- 
+--	ret = ath11k_start_scan(ar, &arg);
+-+	ret = ath11k_start_scan(ar, arg);
+- 	if (ret) {
+- 		ath11k_warn(ar->ab, "failed to start hw scan: %d\n", ret);
+- 		spin_lock_bh(&ar->data_lock);
+-@@ -3717,10 +3723,11 @@ static int ath11k_mac_op_hw_scan(struct
+- 				     msecs_to_jiffies(scan_timeout));
+- 
+- exit:
+--	kfree(arg.chan_list);
+--
+--	if (req->ie_len)
+--		kfree(arg.extraie.ptr);
+-+	if (arg) {
+-+		kfree(arg->chan_list);
+-+		kfree(arg->extraie.ptr);
+-+		kfree(arg);
+-+	}
+- 
+- 	mutex_unlock(&ar->conf_mutex);
+- 
+diff --git a/package/kernel/mac80211/patches/ath11k/0029-wifi-ath11k-Add-support-to-configure-FTM-responder-r.patch b/package/kernel/mac80211/patches/ath11k/0029-wifi-ath11k-Add-support-to-configure-FTM-responder-r.patch
+deleted file mode 100644
+index f652d689b5..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0029-wifi-ath11k-Add-support-to-configure-FTM-responder-r.patch
++++ /dev/null
+@@ -1,169 +0,0 @@
+-From a27c6a5853eb9d4f293b99be73a6891fe88263c7 Mon Sep 17 00:00:00 2001
+-From: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
+-Date: Tue, 10 Jan 2023 15:30:57 +0200
+-Subject: [PATCH] wifi: ath11k: Add support to configure FTM responder role
+-
+-Fine Timing Measurement(FTM) support is used to measure round trip
+-time between two nodes.
+-
+-Enable FTM responder feature using hw_params on supported device.
+-Since FTM functionality is offloaded to firmware, adding the
+-interface allows user space to enable or disable FTM responder.
+-Also add support for advertising the same in extended capabilities.
+-
+-QCA6390, WCN6855 and WCN6750 do not support this feature.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
+-Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221220044435.10506-1-quic_rajkbhag@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/core.c |  8 ++++++++
+- drivers/net/wireless/ath/ath11k/core.h |  1 +
+- drivers/net/wireless/ath/ath11k/hw.h   |  1 +
+- drivers/net/wireless/ath/ath11k/mac.c  | 20 +++++++++++++++++++-
+- drivers/net/wireless/ath/ath11k/wmi.h  |  1 +
+- 5 files changed, 30 insertions(+), 1 deletion(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/core.c
+-+++ b/drivers/net/wireless/ath/ath11k/core.c
+-@@ -116,6 +116,7 @@ static const struct ath11k_hw_params ath
+- 		.tcl_ring_retry = true,
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+-+		.ftm_responder = true,
+- 	},
+- 	{
+- 		.hw_rev = ATH11K_HW_IPQ6018_HW10,
+-@@ -198,6 +199,7 @@ static const struct ath11k_hw_params ath
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+- 		.support_fw_mac_sequence = false,
+-+		.ftm_responder = true,
+- 	},
+- 	{
+- 		.name = "qca6390 hw2.0",
+-@@ -282,6 +284,7 @@ static const struct ath11k_hw_params ath
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+- 		.support_fw_mac_sequence = true,
+-+		.ftm_responder = false,
+- 	},
+- 	{
+- 		.name = "qcn9074 hw1.0",
+-@@ -363,6 +366,7 @@ static const struct ath11k_hw_params ath
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+- 		.support_fw_mac_sequence = false,
+-+		.ftm_responder = true,
+- 	},
+- 	{
+- 		.name = "wcn6855 hw2.0",
+-@@ -447,6 +451,7 @@ static const struct ath11k_hw_params ath
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+- 		.support_fw_mac_sequence = true,
+-+		.ftm_responder = false,
+- 	},
+- 	{
+- 		.name = "wcn6855 hw2.1",
+-@@ -529,6 +534,7 @@ static const struct ath11k_hw_params ath
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+- 		.support_fw_mac_sequence = true,
+-+		.ftm_responder = false,
+- 	},
+- 	{
+- 		.name = "wcn6750 hw1.0",
+-@@ -609,6 +615,7 @@ static const struct ath11k_hw_params ath
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE_WCN6750,
+- 		.smp2p_wow_exit = true,
+- 		.support_fw_mac_sequence = true,
+-+		.ftm_responder = false,
+- 	},
+- 	{
+- 		.hw_rev = ATH11K_HW_IPQ5018_HW10,
+-@@ -688,6 +695,7 @@ static const struct ath11k_hw_params ath
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+- 		.support_fw_mac_sequence = false,
+-+		.ftm_responder = true,
+- 	},
+- };
+- 
+---- a/drivers/net/wireless/ath/ath11k/core.h
+-+++ b/drivers/net/wireless/ath/ath11k/core.h
+-@@ -346,6 +346,7 @@ struct ath11k_vif {
+- 
+- 	bool is_started;
+- 	bool is_up;
+-+	bool ftm_responder;
+- 	bool spectral_enabled;
+- 	bool ps;
+- 	u32 aid;
+---- a/drivers/net/wireless/ath/ath11k/hw.h
+-+++ b/drivers/net/wireless/ath/ath11k/hw.h
+-@@ -224,6 +224,7 @@ struct ath11k_hw_params {
+- 	u32 tx_ring_size;
+- 	bool smp2p_wow_exit;
+- 	bool support_fw_mac_sequence;
+-+	bool ftm_responder;
+- };
+- 
+- struct ath11k_hw_ops {
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -3110,7 +3110,7 @@ static void ath11k_mac_op_bss_info_chang
+- 	u16 bitrate;
+- 	int ret = 0;
+- 	u8 rateidx;
+--	u32 rate;
+-+	u32 rate, param;
+- 	u32 ipv4_cnt;
+- 
+- 	mutex_lock(&ar->conf_mutex);
+-@@ -3412,6 +3412,20 @@ static void ath11k_mac_op_bss_info_chang
+- 		}
+- 	}
+- 
+-+	if (changed & BSS_CHANGED_FTM_RESPONDER &&
+-+	    arvif->ftm_responder != info->ftm_responder &&
+-+	    ar->ab->hw_params.ftm_responder &&
+-+	    (vif->type == NL80211_IFTYPE_AP ||
+-+	     vif->type == NL80211_IFTYPE_MESH_POINT)) {
+-+		arvif->ftm_responder = info->ftm_responder;
+-+		param = WMI_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE;
+-+		ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id, param,
+-+						    arvif->ftm_responder);
+-+		if (ret)
+-+			ath11k_warn(ar->ab, "Failed to set ftm responder %i: %d\n",
+-+				    arvif->vdev_id, ret);
+-+	}
+-+
+- 	if (changed & BSS_CHANGED_FILS_DISCOVERY ||
+- 	    changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP)
+- 		ath11k_mac_fils_discovery(arvif, info);
+-@@ -9113,6 +9127,10 @@ static int __ath11k_mac_register(struct
+- 	wiphy_ext_feature_set(ar->hw->wiphy,
+- 			      NL80211_EXT_FEATURE_SET_SCAN_DWELL);
+- 
+-+	if (ab->hw_params.ftm_responder)
+-+		wiphy_ext_feature_set(ar->hw->wiphy,
+-+				      NL80211_EXT_FEATURE_ENABLE_FTM_RESPONDER);
+-+
+- 	ath11k_reg_init(ar);
+- 
+- 	if (!test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags)) {
+---- a/drivers/net/wireless/ath/ath11k/wmi.h
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.h
+-@@ -1073,6 +1073,7 @@ enum wmi_tlv_vdev_param {
+- 	WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE,
+- 	WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME,
+- 	WMI_VDEV_PARAM_HE_LTF = 0x74,
+-+	WMI_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE = 0x7d,
+- 	WMI_VDEV_PARAM_BA_MODE = 0x7e,
+- 	WMI_VDEV_PARAM_AUTORATE_MISC_CFG = 0x80,
+- 	WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87,
+diff --git a/package/kernel/mac80211/patches/ath11k/0030-wifi-ath11k-add-channel-177-into-5-GHz-channel-list.patch b/package/kernel/mac80211/patches/ath11k/0030-wifi-ath11k-add-channel-177-into-5-GHz-channel-list.patch
+deleted file mode 100644
+index d0ed9c54b8..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0030-wifi-ath11k-add-channel-177-into-5-GHz-channel-list.patch
++++ /dev/null
+@@ -1,41 +0,0 @@
+-From e5e94d10c85653609a2893c8d0ef24a27471b68f Mon Sep 17 00:00:00 2001
+-From: Wen Gong <quic_wgong@quicinc.com>
+-Date: Tue, 10 Jan 2023 15:30:58 +0200
+-Subject: [PATCH] wifi: ath11k: add channel 177 into 5 GHz channel list
+-
+-Add support for the 5 GHz channel 177 with center frequency 5885 MHz and
+-operating class 125 per IEEE Std 802.11ax-2021, Table E-4.
+-
+-Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3
+-
+-Signed-off-by: Wen Gong <quic_wgong@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221220101912.30816-1-quic_wgong@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/core.h | 4 ++--
+- drivers/net/wireless/ath/ath11k/mac.c  | 1 +
+- 2 files changed, 3 insertions(+), 2 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/core.h
+-+++ b/drivers/net/wireless/ath/ath11k/core.h
+-@@ -521,8 +521,8 @@ struct ath11k_sta {
+- #define ATH11K_MIN_5G_FREQ 4150
+- #define ATH11K_MIN_6G_FREQ 5925
+- #define ATH11K_MAX_6G_FREQ 7115
+--#define ATH11K_NUM_CHANS 101
+--#define ATH11K_MAX_5G_CHAN 173
+-+#define ATH11K_NUM_CHANS 102
+-+#define ATH11K_MAX_5G_CHAN 177
+- 
+- enum ath11k_state {
+- 	ATH11K_STATE_OFF,
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -96,6 +96,7 @@ static const struct ieee80211_channel at
+- 	CHAN5G(165, 5825, 0),
+- 	CHAN5G(169, 5845, 0),
+- 	CHAN5G(173, 5865, 0),
+-+	CHAN5G(177, 5885, 0),
+- };
+- 
+- static const struct ieee80211_channel ath11k_6ghz_channels[] = {
+diff --git a/package/kernel/mac80211/patches/ath11k/0031-wifi-ath11k-fix-ce-memory-mapping-for-ahb-devices.patch b/package/kernel/mac80211/patches/ath11k/0031-wifi-ath11k-fix-ce-memory-mapping-for-ahb-devices.patch
+deleted file mode 100644
+index 2786799972..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0031-wifi-ath11k-fix-ce-memory-mapping-for-ahb-devices.patch
++++ /dev/null
+@@ -1,114 +0,0 @@
+-From 53a998c4d7284debd77734d01e1466e59a1d03b2 Mon Sep 17 00:00:00 2001
+-From: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
+-Date: Fri, 13 Jan 2023 12:02:09 +0530
+-Subject: [PATCH] wifi: ath11k: fix ce memory mapping for ahb devices
+-
+-Currently ath11k_ahb module is not loaded successfully and the wifi
+-interface is not created. Kernel trace is seen while loading the
+-ath11k_ahb module. The issue is seen in all ath11k AHB devices except
+-in IPQ5018.
+-
+-This happens because in ath11k_ahb_probe(), ab->mem_ce is initialized
+-with the value of ab->mem. However, at this instant ab->mem is not
+-yet set.
+-
+-Later, during write to a particular memory via ath11k_ahb_write32()
+-this ab->mem_ce is used with particular offset. Since ab->mem_ce is
+-not set properly this possibly leads to memory conflict to handle
+-kernel paging request and the below trace is seen.
+-
+-[   93.035047] Unable to handle kernel paging request at virtual address ffff800100a00000
+-[   93.035083] Mem abort info:
+-[   93.041869]   ESR = 0x0000000096000045
+-[   93.044561]   EC = 0x25: DABT (current EL), IL = 32 bits
+-[   93.048377]   SET = 0, FnV = 0
+-[   93.053840]   EA = 0, S1PTW = 0
+-[   93.056704]   FSC = 0x05: level 1 translation fault
+-[   93.059745] Data abort info:
+-[   93.064603]   ISV = 0, ISS = 0x00000045
+-[   93.067729]   CM = 0, WnR = 1
+-[   93.071287] swapper pgtable: 4k pages, 48-bit VAs, pgdp=0000000042219000
+-[   93.074409] [ffff800100a00000] pgd=100000007ffff003, p4d=100000007ffff003, pud=0000000000000000
+-[   93.081195] Internal error: Oops: 0000000096000045 [#1] PREEMPT SMP
+-[   93.089598] Modules linked in: ath11k_ahb ath11k_pci ath11k qmi_helpers
+-[   93.095851] CPU: 2 PID: 66 Comm: kworker/u8:3 Not tainted 6.1.0-rc8-wt-ath-658126-g58e4b9df840c-dirty #2
+-[   93.102454] Hardware name: Qualcomm Technologies, Inc. IPQ8074/AP-HK14 (DT)
+-[   93.112171] Workqueue: ath11k_qmi_driver_event ath11k_qmi_driver_event_work [ath11k]
+-[   93.118856] pstate: 40000005 (nZcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
+-[   93.126838] pc : ath11k_ahb_write32+0xc/0x18 [ath11k_ahb]
+-[   93.133520] lr : ath11k_hal_srng_setup+0x860/0x8f0 [ath11k]
+-[   93.139075] sp : ffff80000aaebb70
+-[   93.144452] x29: ffff80000aaebb70 x28: 0000000000000020 x27: ffff80000aaebc50
+-[   93.147934] x26: ffff000004923750 x25: ffff000004921200 x24: ffff000004928000
+-[   93.155051] x23: 0000000000000020 x22: ffff000004930000 x21: ffff000004923200
+-[   93.162170] x20: ffff000004920000 x19: 00000000eea00000 x18: ffff0000049200f0
+-[   93.169288] x17: 0000000000000000 x16: 0000000000000000 x15: 000000000000025e
+-[   93.176405] x14: ffff000003c414f0 x13: 0000000000000000 x12: 0000000000000008
+-[   93.183524] x11: ffff000003c41488 x10: 0000000000000040 x9 : 0000000000000000
+-[   93.190641] x8 : ffff80000a9dd100 x7 : 0000000000000000 x6 : 000000000000003f
+-[   93.197759] x5 : ffff800100a00400 x4 : ffff8000031f4018 x3 : 0000000000000004
+-[   93.204877] x2 : 0000000047b62000 x1 : ffff800100a00000 x0 : ffff800012000000
+-[   93.211996] Call trace:
+-[   93.219104]  ath11k_ahb_write32+0xc/0x18 [ath11k_ahb]
+-[   93.221366]  ath11k_ce_init_ring+0x184/0x278 [ath11k]
+-[   93.226576]  ath11k_ce_init_pipes+0x4c/0x1a0 [ath11k]
+-[   93.231610]  ath11k_core_qmi_firmware_ready+0x3c/0x568 [ath11k]
+-[   93.236646]  ath11k_qmi_driver_event_work+0x168/0x4f8 [ath11k]
+-[   93.242376]  process_one_work+0x144/0x350
+-[   93.248275]  worker_thread+0x120/0x430
+-[   93.252352]  kthread+0xf4/0x110
+-[   93.255997]  ret_from_fork+0x10/0x20
+-[   93.259043] Code: d503201f f94e1c00 8b214001 d50332bf (b9000022)
+-[   93.262863] ---[ end trace 0000000000000000 ]---
+-
+-However, for the device IPQ5018 ath11k_hw_params .ce_remap is
+-defined. This parameter is used to recalculate ab->mem_ce and hence,
+-this issue is not seen in IPQ5018.
+-
+-Hence, fix this by initializing ab->mem_ce after ab->mem is set.
+-ab->mem is set inside the ath11k_ahb_setup_resources() therefore
+-initialize ab->mem_ce after ath11k_ahb_setup_resources().
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Fixes: b42b3678c91f ("wifi: ath11k: remap ce register space for IPQ5018")
+-
+-Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230113063209.7256-1-quic_rajkbhag@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/ahb.c | 12 ++++++------
+- 1 file changed, 6 insertions(+), 6 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/ahb.c
+-+++ b/drivers/net/wireless/ath/ath11k/ahb.c
+-@@ -1157,12 +1157,16 @@ static int ath11k_ahb_probe(struct platf
+- 		goto err_core_free;
+- 	}
+- 
+--	ab->mem_ce = ab->mem;
+--
+- 	ret = ath11k_core_pre_init(ab);
+- 	if (ret)
+- 		goto err_core_free;
+- 
+-+	ret = ath11k_ahb_setup_resources(ab);
+-+	if (ret)
+-+		goto err_core_free;
+-+
+-+	ab->mem_ce = ab->mem;
+-+
+- 	if (ab->hw_params.ce_remap) {
+- 		const struct ce_remap *ce_remap = ab->hw_params.ce_remap;
+- 		/* ce register space is moved out of wcss unlike ipq8074 or ipq6018
+-@@ -1177,10 +1181,6 @@ static int ath11k_ahb_probe(struct platf
+- 		}
+- 	}
+- 
+--	ret = ath11k_ahb_setup_resources(ab);
+--	if (ret)
+--		goto err_core_free;
+--
+- 	ret = ath11k_ahb_fw_resources_init(ab);
+- 	if (ret)
+- 		goto err_core_free;
+diff --git a/package/kernel/mac80211/patches/ath11k/0033-wifi-ath11k-Set-ext-passive-scan-flag-to-adjust-pass.patch b/package/kernel/mac80211/patches/ath11k/0033-wifi-ath11k-Set-ext-passive-scan-flag-to-adjust-pass.patch
+deleted file mode 100644
+index 79b79e1053..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0033-wifi-ath11k-Set-ext-passive-scan-flag-to-adjust-pass.patch
++++ /dev/null
+@@ -1,73 +0,0 @@
+-From cf8f3d4deb02a8fdc806c46d4112b69868544697 Mon Sep 17 00:00:00 2001
+-From: Tamizh Chelvam Raja <quic_tamizhr@quicinc.com>
+-Date: Wed, 15 Feb 2023 20:31:36 +0200
+-Subject: [PATCH] wifi: ath11k: Set ext passive scan flag to adjust passive
+- scan start time
+-
+-Set the WMI_SCAN_FLAG_EXT_PASSIVE_SCAN_START_TIME_ENHANCE flag
+-while sending the scan command.  If this flag is enabled when the
+-incoming scan request comes with a strict start time and its duration
+-overlaps with next TBTT, then target adjust the start time accordingly
+-for passive scan. Target supporting this feature will advertise
+-WMI_TLV_SERVICE_PASSIVE_SCAN_START_TIME_ENHANCE.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-01467-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Tamizh Chelvam Raja <quic_tamizhr@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221222131720.11368-1-quic_tamizhr@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/wmi.c | 8 ++++++++
+- drivers/net/wireless/ath/ath11k/wmi.h | 3 +++
+- 2 files changed, 11 insertions(+)
+-
+---- a/drivers/net/wireless/ath/ath11k/wmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
+-@@ -2068,6 +2068,12 @@ void ath11k_wmi_start_scan_init(struct a
+- 				  WMI_SCAN_EVENT_FOREIGN_CHAN |
+- 				  WMI_SCAN_EVENT_DEQUEUED;
+- 	arg->scan_flags |= WMI_SCAN_CHAN_STAT_EVENT;
+-+
+-+	if (test_bit(WMI_TLV_SERVICE_PASSIVE_SCAN_START_TIME_ENHANCE,
+-+		     ar->ab->wmi_ab.svc_map))
+-+		arg->scan_ctrl_flags_ext |=
+-+			WMI_SCAN_FLAG_EXT_PASSIVE_SCAN_START_TIME_ENHANCE;
+-+
+- 	arg->num_bssid = 1;
+- 
+- 	/* fill bssid_list[0] with 0xff, otherwise bssid and RA will be
+-@@ -2149,6 +2155,8 @@ ath11k_wmi_copy_scan_event_cntrl_flags(s
+- 	/* for adaptive scan mode using 3 bits (21 - 23 bits) */
+- 	WMI_SCAN_SET_DWELL_MODE(cmd->scan_ctrl_flags,
+- 				param->adaptive_dwell_time_mode);
+-+
+-+	cmd->scan_ctrl_flags_ext = param->scan_ctrl_flags_ext;
+- }
+- 
+- int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar,
+---- a/drivers/net/wireless/ath/ath11k/wmi.h
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.h
+-@@ -2093,6 +2093,7 @@ enum wmi_tlv_service {
+- 	WMI_TLV_SERVICE_EXT2_MSG = 220,
+- 	WMI_TLV_SERVICE_PEER_POWER_SAVE_DURATION_SUPPORT = 246,
+- 	WMI_TLV_SERVICE_SRG_SRP_SPATIAL_REUSE_SUPPORT = 249,
+-+	WMI_TLV_SERVICE_PASSIVE_SCAN_START_TIME_ENHANCE = 263,
+- 
+- 	/* The second 128 bits */
+- 	WMI_MAX_EXT_SERVICE = 256,
+-@@ -3223,6 +3224,7 @@ struct  wmi_start_scan_cmd {
+- 
+- #define WMI_SCAN_DWELL_MODE_MASK 0x00E00000
+- #define WMI_SCAN_DWELL_MODE_SHIFT        21
+-+#define WMI_SCAN_FLAG_EXT_PASSIVE_SCAN_START_TIME_ENHANCE   0x00000800
+- 
+- enum {
+- 	WMI_SCAN_DWELL_MODE_DEFAULT      = 0,
+-@@ -3270,6 +3272,7 @@ struct scan_req_params {
+- 		};
+- 		u32 scan_events;
+- 	};
+-+	u32 scan_ctrl_flags_ext;
+- 	u32 dwell_time_active;
+- 	u32 dwell_time_active_2g;
+- 	u32 dwell_time_passive;
+diff --git a/package/kernel/mac80211/patches/ath11k/0034-wifi-ath11k-fix-return-value-check-in-ath11k_ahb_pro.patch b/package/kernel/mac80211/patches/ath11k/0034-wifi-ath11k-fix-return-value-check-in-ath11k_ahb_pro.patch
+deleted file mode 100644
+index 59132913bd..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0034-wifi-ath11k-fix-return-value-check-in-ath11k_ahb_pro.patch
++++ /dev/null
+@@ -1,27 +0,0 @@
+-From 342fcde9d91460f01f65707e16368a1571271a3a Mon Sep 17 00:00:00 2001
+-From: Yang Yingliang <yangyingliang@huawei.com>
+-Date: Fri, 17 Feb 2023 11:00:31 +0800
+-Subject: [PATCH] wifi: ath11k: fix return value check in ath11k_ahb_probe()
+-
+-ioremap() returns NULL pointer not PTR_ERR() when it fails,
+-so replace the IS_ERR() check with NULL pointer check.
+-
+-Fixes: b42b3678c91f ("wifi: ath11k: remap ce register space for IPQ5018")
+-Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230217030031.4021289-1-yangyingliang@huawei.com
+----
+- drivers/net/wireless/ath/ath11k/ahb.c | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/ahb.c
+-+++ b/drivers/net/wireless/ath/ath11k/ahb.c
+-@@ -1174,7 +1174,7 @@ static int ath11k_ahb_probe(struct platf
+- 		 * to a new space for accessing them.
+- 		 */
+- 		ab->mem_ce = ioremap(ce_remap->base, ce_remap->size);
+--		if (IS_ERR(ab->mem_ce)) {
+-+		if (!ab->mem_ce) {
+- 			dev_err(&pdev->dev, "ce ioremap error\n");
+- 			ret = -ENOMEM;
+- 			goto err_core_free;
+diff --git a/package/kernel/mac80211/patches/ath11k/0035-wifi-ath11k-Use-platform_get_irq-to-get-the-interrup.patch b/package/kernel/mac80211/patches/ath11k/0035-wifi-ath11k-Use-platform_get_irq-to-get-the-interrup.patch
+deleted file mode 100644
+index 93a9da8fc2..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0035-wifi-ath11k-Use-platform_get_irq-to-get-the-interrup.patch
++++ /dev/null
+@@ -1,50 +0,0 @@
+-From f117276638b7600b981b3fe28550823cfbe1ef23 Mon Sep 17 00:00:00 2001
+-From: Douglas Anderson <dianders@chromium.org>
+-Date: Wed, 1 Feb 2023 08:54:42 -0800
+-Subject: [PATCH] wifi: ath11k: Use platform_get_irq() to get the interrupt
+-
+-As of commit a1a2b7125e10 ("of/platform: Drop static setup of IRQ
+-resource from DT core"), we need to use platform_get_irq() instead of
+-platform_get_resource() to get our IRQs because
+-platform_get_resource() simply won't get them anymore.
+-
+-This was already fixed in several other Atheros WiFi drivers,
+-apparently in response to Zeal Robot reports. An example of another
+-fix is commit 9503a1fc123d ("ath9k: Use platform_get_irq() to get the
+-interrupt"). ath11k seems to have been missed in this effort, though.
+-
+-Without this change, WiFi wasn't coming up on my Qualcomm sc7280-based
+-hardware. Specifically, "platform_get_resource(pdev, IORESOURCE_IRQ,
+-i)" was failing even for i=0.
+-
+-Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
+-
+-Fixes: a1a2b7125e10 ("of/platform: Drop static setup of IRQ resource from DT core")
+-Fixes: 00402f49d26f ("ath11k: Add support for WCN6750 device")
+-Signed-off-by: Douglas Anderson <dianders@chromium.org>
+-Tested-by: Jun Yu <junyuu@chromium.org>
+-Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230201084131.v2.1.I69cf3d56c97098287fe3a70084ee515098390b70@changeid
+----
+- drivers/net/wireless/ath/ath11k/ahb.c | 8 ++++----
+- 1 file changed, 4 insertions(+), 4 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/ahb.c
+-+++ b/drivers/net/wireless/ath/ath11k/ahb.c
+-@@ -874,11 +874,11 @@ static int ath11k_ahb_setup_msi_resource
+- 	ab->pci.msi.ep_base_data = int_prop + 32;
+- 
+- 	for (i = 0; i < ab->pci.msi.config->total_vectors; i++) {
+--		res = platform_get_resource(pdev, IORESOURCE_IRQ, i);
+--		if (!res)
+--			return -ENODEV;
+-+		ret = platform_get_irq(pdev, i);
+-+		if (ret < 0)
+-+			return ret;
+- 
+--		ab->pci.msi.irqs[i] = res->start;
+-+		ab->pci.msi.irqs[i] = ret;
+- 	}
+- 
+- 	set_bit(ATH11K_FLAG_MULTI_MSI_VECTORS, &ab->dev_flags);
+diff --git a/package/kernel/mac80211/patches/ath11k/0036-wifi-ath11k-fix-SAC-bug-on-peer-addition-with-sta-ba.patch b/package/kernel/mac80211/patches/ath11k/0036-wifi-ath11k-fix-SAC-bug-on-peer-addition-with-sta-ba.patch
+deleted file mode 100644
+index b37f070ba6..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0036-wifi-ath11k-fix-SAC-bug-on-peer-addition-with-sta-ba.patch
++++ /dev/null
+@@ -1,53 +0,0 @@
+-From 60b7d62ba8cdbd073997bff0f1cdae8d844002c0 Mon Sep 17 00:00:00 2001
+-From: Christian Marangi <ansuelsmth@gmail.com>
+-Date: Thu, 9 Feb 2023 23:26:22 +0100
+-Subject: [PATCH] wifi: ath11k: fix SAC bug on peer addition with sta band
+- migration
+-
+-Fix sleep in atomic context warning detected by Smatch static checker
+-analyzer.
+-
+-Following the locking pattern for peer_rhash_add lock tbl_mtx_lock mutex
+-always even if sta is not transitioning to another band.
+-This is peer_add function and a more secure locking should not cause
+-performance regression.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.5.0.1-01208-QCAHKSWPL_SILICONZ-1
+-
+-Fixes: d673cb6fe6c0 ("wifi: ath11k: fix peer addition/deletion error on sta band migration")
+-Reported-by: Dan Carpenter <error27@gmail.com>
+-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230209222622.1751-1-ansuelsmth@gmail.com
+----
+- drivers/net/wireless/ath/ath11k/peer.c | 5 +++--
+- 1 file changed, 3 insertions(+), 2 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/peer.c
+-+++ b/drivers/net/wireless/ath/ath11k/peer.c
+-@@ -382,22 +382,23 @@ int ath11k_peer_create(struct ath11k *ar
+- 		return -ENOBUFS;
+- 	}
+- 
+-+	mutex_lock(&ar->ab->tbl_mtx_lock);
+- 	spin_lock_bh(&ar->ab->base_lock);
+- 	peer = ath11k_peer_find_by_addr(ar->ab, param->peer_addr);
+- 	if (peer) {
+- 		if (peer->vdev_id == param->vdev_id) {
+- 			spin_unlock_bh(&ar->ab->base_lock);
+-+			mutex_unlock(&ar->ab->tbl_mtx_lock);
+- 			return -EINVAL;
+- 		}
+- 
+- 		/* Assume sta is transitioning to another band.
+- 		 * Remove here the peer from rhash.
+- 		 */
+--		mutex_lock(&ar->ab->tbl_mtx_lock);
+- 		ath11k_peer_rhash_delete(ar->ab, peer);
+--		mutex_unlock(&ar->ab->tbl_mtx_lock);
+- 	}
+- 	spin_unlock_bh(&ar->ab->base_lock);
+-+	mutex_unlock(&ar->ab->tbl_mtx_lock);
+- 
+- 	ret = ath11k_wmi_send_peer_create_cmd(ar, param);
+- 	if (ret) {
+diff --git a/package/kernel/mac80211/patches/ath11k/0037-wifi-ath11k-allow-system-suspend-to-survive-ath11k.patch b/package/kernel/mac80211/patches/ath11k/0037-wifi-ath11k-allow-system-suspend-to-survive-ath11k.patch
+deleted file mode 100644
+index fa680954e6..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0037-wifi-ath11k-allow-system-suspend-to-survive-ath11k.patch
++++ /dev/null
+@@ -1,43 +0,0 @@
+-From 7c15430822e71e90203d87e6d0cfe83fa058b0dc Mon Sep 17 00:00:00 2001
+-From: Len Brown <len.brown@intel.com>
+-Date: Wed, 1 Feb 2023 12:32:01 -0600
+-Subject: [PATCH] wifi: ath11k: allow system suspend to survive ath11k
+-
+-When ath11k runs into internal errors upon suspend,
+-it returns an error code to pci_pm_suspend, which
+-aborts the entire system suspend.
+-
+-The driver should not abort system suspend, but should
+-keep its internal errors to itself, and allow the system
+-to suspend.  Otherwise, a user can suspend a laptop
+-by closing the lid and sealing it into a case, assuming
+-that is will suspend, rather than heating up and draining
+-the battery when in transit.
+-
+-In practice, the ath11k device seems to have plenty of transient
+-errors, and subsequent suspend cycles after this failure
+-often succeed.
+-
+-https://bugzilla.kernel.org/show_bug.cgi?id=216968
+-
+-Fixes: d1b0c33850d29 ("ath11k: implement suspend for QCA6390 PCI devices")
+-
+-Signed-off-by: Len Brown <len.brown@intel.com>
+-Cc: stable@vger.kernel.org
+-Signed-off-by: Kalle Valo <kvalo@kernel.org>
+-Link: https://lore.kernel.org/r/20230201183201.14431-1-len.brown@intel.com
+----
+- drivers/net/wireless/ath/ath11k/pci.c | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/pci.c
+-+++ b/drivers/net/wireless/ath/ath11k/pci.c
+-@@ -998,7 +998,7 @@ static __maybe_unused int ath11k_pci_pm_
+- 	if (ret)
+- 		ath11k_warn(ab, "failed to resume core: %d\n", ret);
+- 
+--	return ret;
+-+	return 0;
+- }
+- 
+- static SIMPLE_DEV_PM_OPS(ath11k_pci_pm_ops,
+diff --git a/package/kernel/mac80211/patches/ath11k/0038-wifi-ath11k-modify-accessor-macros-to-match-index-si.patch b/package/kernel/mac80211/patches/ath11k/0038-wifi-ath11k-modify-accessor-macros-to-match-index-si.patch
+deleted file mode 100644
+index 42bf170a03..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0038-wifi-ath11k-modify-accessor-macros-to-match-index-si.patch
++++ /dev/null
+@@ -1,61 +0,0 @@
+-From a96f10422e74cde27c100b321b127ec32ae75747 Mon Sep 17 00:00:00 2001
+-From: Muna Sinada <quic_msinada@quicinc.com>
+-Date: Fri, 24 Feb 2023 12:28:03 +0200
+-Subject: [PATCH] wifi: ath11k: modify accessor macros to match index size
+-
+-HE PHY is only 11 bytes, therefore it should be using byte indexes
+-instead of dword. Change corresponding macros to reflect this.
+-
+-Signed-off-by: Muna Sinada <quic_msinada@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/1666128501-12364-2-git-send-email-quic_msinada@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/wmi.h | 24 +++++++++++++-----------
+- 1 file changed, 13 insertions(+), 11 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/wmi.h
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.h
+-@@ -2859,30 +2859,32 @@ struct rx_reorder_queue_remove_params {
+- #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
+- #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
+- 
+--#define HECAP_PHYDWORD_0	0
+--#define HECAP_PHYDWORD_1	1
+--#define HECAP_PHYDWORD_2	2
+-+#define HE_PHYCAP_BYTE_0	0
+-+#define HE_PHYCAP_BYTE_1	1
+-+#define HE_PHYCAP_BYTE_2	2
+-+#define HE_PHYCAP_BYTE_3	3
+-+#define HE_PHYCAP_BYTE_4	4
+- 
+--#define HECAP_PHY_SU_BFER		BIT(31)
+-+#define HECAP_PHY_SU_BFER		BIT(7)
+- #define HECAP_PHY_SU_BFEE		BIT(0)
+- #define HECAP_PHY_MU_BFER		BIT(1)
+--#define HECAP_PHY_UL_MUMIMO		BIT(22)
+--#define HECAP_PHY_UL_MUOFDMA		BIT(23)
+-+#define HECAP_PHY_UL_MUMIMO		BIT(6)
+-+#define HECAP_PHY_UL_MUOFDMA		BIT(7)
+- 
+- #define HECAP_PHY_SUBFMR_GET(hecap_phy) \
+--	FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HECAP_PHYDWORD_0])
+-+	FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HE_PHYCAP_BYTE_3])
+- 
+- #define HECAP_PHY_SUBFME_GET(hecap_phy) \
+--	FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HECAP_PHYDWORD_1])
+-+	FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HE_PHYCAP_BYTE_4])
+- 
+- #define HECAP_PHY_MUBFMR_GET(hecap_phy) \
+--	FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HECAP_PHYDWORD_1])
+-+	FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HE_PHYCAP_BYTE_4])
+- 
+- #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \
+--	FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HECAP_PHYDWORD_0])
+-+	FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HE_PHYCAP_BYTE_2])
+- 
+- #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \
+--	FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HECAP_PHYDWORD_0])
+-+	FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HE_PHYCAP_BYTE_2])
+- 
+- #define HE_MODE_SU_TX_BFEE	BIT(0)
+- #define HE_MODE_SU_TX_BFER	BIT(1)
+diff --git a/package/kernel/mac80211/patches/ath11k/0039-wifi-ath11k-push-MU-MIMO-params-from-hostapd-to-hard.patch b/package/kernel/mac80211/patches/ath11k/0039-wifi-ath11k-push-MU-MIMO-params-from-hostapd-to-hard.patch
+deleted file mode 100644
+index 298ce1a612..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0039-wifi-ath11k-push-MU-MIMO-params-from-hostapd-to-hard.patch
++++ /dev/null
+@@ -1,300 +0,0 @@
+-From 38dfe775d0abf511341f37c1cb77b919a3ad410b Mon Sep 17 00:00:00 2001
+-From: Muna Sinada <quic_msinada@quicinc.com>
+-Date: Fri, 24 Feb 2023 12:28:04 +0200
+-Subject: [PATCH] wifi: ath11k: push MU-MIMO params from hostapd to hardware
+-
+-In the previous behaviour only HE IE in management frames are changed
+-regarding MU-MIMO configurations and not in hardware. Adding push of
+-MU-MIMO configurations to the hardware as well.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00356-QCAHKSWPL_SILICONZ-1
+-
+-Co-developed-by: Anilkumar Kolli <quic_akolli@quicinc.com>
+-Signed-off-by: Anilkumar Kolli <quic_akolli@quicinc.com>
+-Signed-off-by: Muna Sinada <quic_msinada@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/1666128501-12364-3-git-send-email-quic_msinada@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 200 ++++++++++++++++----------
+- drivers/net/wireless/ath/ath11k/wmi.h |   3 +
+- 2 files changed, 130 insertions(+), 73 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -2699,6 +2699,117 @@ static int ath11k_setup_peer_smps(struct
+- 					 ath11k_smps_map[smps]);
+- }
+- 
+-+static bool ath11k_mac_set_he_txbf_conf(struct ath11k_vif *arvif)
+-+{
+-+	struct ath11k *ar = arvif->ar;
+-+	u32 param, value;
+-+	int ret;
+-+
+-+	if (!arvif->vif->bss_conf.he_support)
+-+		return true;
+-+
+-+	param = WMI_VDEV_PARAM_SET_HEMU_MODE;
+-+	value = 0;
+-+	if (arvif->vif->bss_conf.he_su_beamformer) {
+-+		value |= FIELD_PREP(HE_MODE_SU_TX_BFER, HE_SU_BFER_ENABLE);
+-+		if (arvif->vif->bss_conf.he_mu_beamformer &&
+-+		    arvif->vdev_type == WMI_VDEV_TYPE_AP)
+-+			value |= FIELD_PREP(HE_MODE_MU_TX_BFER, HE_MU_BFER_ENABLE);
+-+	}
+-+
+-+	if (arvif->vif->type != NL80211_IFTYPE_MESH_POINT) {
+-+		value |= FIELD_PREP(HE_MODE_DL_OFDMA, HE_DL_MUOFDMA_ENABLE) |
+-+			 FIELD_PREP(HE_MODE_UL_OFDMA, HE_UL_MUOFDMA_ENABLE);
+-+
+-+		if (arvif->vif->bss_conf.he_full_ul_mumimo)
+-+			value |= FIELD_PREP(HE_MODE_UL_MUMIMO, HE_UL_MUMIMO_ENABLE);
+-+
+-+		if (arvif->vif->bss_conf.he_su_beamformee)
+-+			value |= FIELD_PREP(HE_MODE_SU_TX_BFEE, HE_SU_BFEE_ENABLE);
+-+	}
+-+
+-+	ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id, param, value);
+-+	if (ret) {
+-+		ath11k_warn(ar->ab, "failed to set vdev %d HE MU mode: %d\n",
+-+			    arvif->vdev_id, ret);
+-+		return false;
+-+	}
+-+
+-+	param = WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE;
+-+	value =	FIELD_PREP(HE_VHT_SOUNDING_MODE, HE_VHT_SOUNDING_MODE_ENABLE) |
+-+		FIELD_PREP(HE_TRIG_NONTRIG_SOUNDING_MODE,
+-+			   HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE);
+-+	ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id,
+-+					    param, value);
+-+	if (ret) {
+-+		ath11k_warn(ar->ab, "failed to set vdev %d sounding mode: %d\n",
+-+			    arvif->vdev_id, ret);
+-+		return false;
+-+	}
+-+	return true;
+-+}
+-+
+-+static bool ath11k_mac_vif_recalc_sta_he_txbf(struct ath11k *ar,
+-+					      struct ieee80211_vif *vif,
+-+					      struct ieee80211_sta_he_cap *he_cap)
+-+{
+-+	struct ath11k_vif *arvif = (void *)vif->drv_priv;
+-+	struct ieee80211_he_cap_elem he_cap_elem = {0};
+-+	struct ieee80211_sta_he_cap *cap_band = NULL;
+-+	struct cfg80211_chan_def def;
+-+	u32 param = WMI_VDEV_PARAM_SET_HEMU_MODE;
+-+	u32 hemode = 0;
+-+	int ret;
+-+
+-+	if (!vif->bss_conf.he_support)
+-+		return true;
+-+
+-+	if (vif->type != NL80211_IFTYPE_STATION)
+-+		return false;
+-+
+-+	if (WARN_ON(ath11k_mac_vif_chan(vif, &def)))
+-+		return false;
+-+
+-+	if (def.chan->band == NL80211_BAND_2GHZ)
+-+		cap_band = &ar->mac.iftype[NL80211_BAND_2GHZ][vif->type].he_cap;
+-+	else
+-+		cap_band = &ar->mac.iftype[NL80211_BAND_5GHZ][vif->type].he_cap;
+-+
+-+	memcpy(&he_cap_elem, &cap_band->he_cap_elem, sizeof(he_cap_elem));
+-+
+-+	if (HECAP_PHY_SUBFME_GET(he_cap_elem.phy_cap_info)) {
+-+		if (HECAP_PHY_SUBFMR_GET(he_cap->he_cap_elem.phy_cap_info))
+-+			hemode |= FIELD_PREP(HE_MODE_SU_TX_BFEE, HE_SU_BFEE_ENABLE);
+-+		if (HECAP_PHY_MUBFMR_GET(he_cap->he_cap_elem.phy_cap_info))
+-+			hemode |= FIELD_PREP(HE_MODE_MU_TX_BFEE, HE_MU_BFEE_ENABLE);
+-+	}
+-+
+-+	if (vif->type != NL80211_IFTYPE_MESH_POINT) {
+-+		hemode |= FIELD_PREP(HE_MODE_DL_OFDMA, HE_DL_MUOFDMA_ENABLE) |
+-+			  FIELD_PREP(HE_MODE_UL_OFDMA, HE_UL_MUOFDMA_ENABLE);
+-+
+-+		if (HECAP_PHY_ULMUMIMO_GET(he_cap_elem.phy_cap_info))
+-+			if (HECAP_PHY_ULMUMIMO_GET(he_cap->he_cap_elem.phy_cap_info))
+-+				hemode |= FIELD_PREP(HE_MODE_UL_MUMIMO,
+-+						     HE_UL_MUMIMO_ENABLE);
+-+
+-+		if (FIELD_GET(HE_MODE_MU_TX_BFEE, hemode))
+-+			hemode |= FIELD_PREP(HE_MODE_SU_TX_BFEE, HE_SU_BFEE_ENABLE);
+-+
+-+		if (FIELD_GET(HE_MODE_MU_TX_BFER, hemode))
+-+			hemode |= FIELD_PREP(HE_MODE_SU_TX_BFER, HE_SU_BFER_ENABLE);
+-+	}
+-+
+-+	ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id, param, hemode);
+-+	if (ret) {
+-+		ath11k_warn(ar->ab, "failed to submit vdev param txbf 0x%x: %d\n",
+-+			    hemode, ret);
+-+		return false;
+-+	}
+-+
+-+	return true;
+-+}
+-+
+- static void ath11k_bss_assoc(struct ieee80211_hw *hw,
+- 			     struct ieee80211_vif *vif,
+- 			     struct ieee80211_bss_conf *bss_conf)
+-@@ -2709,6 +2820,7 @@ static void ath11k_bss_assoc(struct ieee
+- 	struct ieee80211_sta *ap_sta;
+- 	struct ath11k_peer *peer;
+- 	bool is_auth = false;
+-+	struct ieee80211_sta_he_cap  he_cap;
+- 	int ret;
+- 
+- 	lockdep_assert_held(&ar->conf_mutex);
+-@@ -2726,6 +2838,9 @@ static void ath11k_bss_assoc(struct ieee
+- 		return;
+- 	}
+- 
+-+	/* he_cap here is updated at assoc success for sta mode only */
+-+	he_cap  = ap_sta->deflink.he_cap;
+-+
+- 	ath11k_peer_assoc_prepare(ar, vif, ap_sta, &peer_arg, false);
+- 
+- 	rcu_read_unlock();
+-@@ -2753,6 +2868,12 @@ static void ath11k_bss_assoc(struct ieee
+- 		return;
+- 	}
+- 
+-+	if (!ath11k_mac_vif_recalc_sta_he_txbf(ar, vif, &he_cap)) {
+-+		ath11k_warn(ar->ab, "failed to recalc he txbf for vdev %i on bss %pM\n",
+-+			    arvif->vdev_id, bss_conf->bssid);
+-+		return;
+-+	}
+-+
+- 	WARN_ON(arvif->is_up);
+- 
+- 	arvif->aid = vif->cfg.aid;
+-@@ -3202,6 +3323,8 @@ static void ath11k_mac_op_bss_info_chang
+- 		ether_addr_copy(arvif->bssid, info->bssid);
+- 
+- 	if (changed & BSS_CHANGED_BEACON_ENABLED) {
+-+		if (info->enable_beacon)
+-+			ath11k_mac_set_he_txbf_conf(arvif);
+- 		ath11k_control_beaconing(arvif, info);
+- 
+- 		if (arvif->is_up && vif->bss_conf.he_support &&
+-@@ -5392,6 +5515,10 @@ static int ath11k_mac_copy_he_cap(struct
+- 
+- 		he_cap_elem->mac_cap_info[1] &=
+- 			IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_MASK;
+-+		he_cap_elem->phy_cap_info[0] &=
+-+			~IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
+-+		he_cap_elem->phy_cap_info[0] &=
+-+			~IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G;
+- 
+- 		he_cap_elem->phy_cap_info[5] &=
+- 			~IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK;
+-@@ -6026,69 +6153,6 @@ ath11k_mac_setup_vdev_create_params(stru
+- 	}
+- }
+- 
+--static u32
+--ath11k_mac_prepare_he_mode(struct ath11k_pdev *pdev, u32 viftype)
+--{
+--	struct ath11k_pdev_cap *pdev_cap = &pdev->cap;
+--	struct ath11k_band_cap *cap_band = NULL;
+--	u32 *hecap_phy_ptr = NULL;
+--	u32 hemode = 0;
+--
+--	if (pdev->cap.supported_bands & WMI_HOST_WLAN_2G_CAP)
+--		cap_band = &pdev_cap->band[NL80211_BAND_2GHZ];
+--	else
+--		cap_band = &pdev_cap->band[NL80211_BAND_5GHZ];
+--
+--	hecap_phy_ptr = &cap_band->he_cap_phy_info[0];
+--
+--	hemode = FIELD_PREP(HE_MODE_SU_TX_BFEE, HE_SU_BFEE_ENABLE) |
+--		 FIELD_PREP(HE_MODE_SU_TX_BFER, HECAP_PHY_SUBFMR_GET(hecap_phy_ptr)) |
+--		 FIELD_PREP(HE_MODE_UL_MUMIMO, HECAP_PHY_ULMUMIMO_GET(hecap_phy_ptr));
+--
+--	/* TODO WDS and other modes */
+--	if (viftype == NL80211_IFTYPE_AP) {
+--		hemode |= FIELD_PREP(HE_MODE_MU_TX_BFER,
+--			  HECAP_PHY_MUBFMR_GET(hecap_phy_ptr)) |
+--			  FIELD_PREP(HE_MODE_DL_OFDMA, HE_DL_MUOFDMA_ENABLE) |
+--			  FIELD_PREP(HE_MODE_UL_OFDMA, HE_UL_MUOFDMA_ENABLE);
+--	} else {
+--		hemode |= FIELD_PREP(HE_MODE_MU_TX_BFEE, HE_MU_BFEE_ENABLE);
+--	}
+--
+--	return hemode;
+--}
+--
+--static int ath11k_set_he_mu_sounding_mode(struct ath11k *ar,
+--					  struct ath11k_vif *arvif)
+--{
+--	u32 param_id, param_value;
+--	struct ath11k_base *ab = ar->ab;
+--	int ret = 0;
+--
+--	param_id = WMI_VDEV_PARAM_SET_HEMU_MODE;
+--	param_value = ath11k_mac_prepare_he_mode(ar->pdev, arvif->vif->type);
+--	ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id,
+--					    param_id, param_value);
+--	if (ret) {
+--		ath11k_warn(ab, "failed to set vdev %d HE MU mode: %d param_value %x\n",
+--			    arvif->vdev_id, ret, param_value);
+--		return ret;
+--	}
+--	param_id = WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE;
+--	param_value =
+--		FIELD_PREP(HE_VHT_SOUNDING_MODE, HE_VHT_SOUNDING_MODE_ENABLE) |
+--		FIELD_PREP(HE_TRIG_NONTRIG_SOUNDING_MODE,
+--			   HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE);
+--	ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id,
+--					    param_id, param_value);
+--	if (ret) {
+--		ath11k_warn(ab, "failed to set vdev %d HE MU mode: %d\n",
+--			    arvif->vdev_id, ret);
+--		return ret;
+--	}
+--	return ret;
+--}
+--
+- static void ath11k_mac_op_update_vif_offload(struct ieee80211_hw *hw,
+- 					     struct ieee80211_vif *vif)
+- {
+-@@ -6757,7 +6821,6 @@ ath11k_mac_vdev_start_restart(struct ath
+- 	struct ath11k_base *ab = ar->ab;
+- 	struct wmi_vdev_start_req_arg arg = {};
+- 	const struct cfg80211_chan_def *chandef = &ctx->def;
+--	int he_support = arvif->vif->bss_conf.he_support;
+- 	int ret = 0;
+- 
+- 	lockdep_assert_held(&ar->conf_mutex);
+-@@ -6798,15 +6861,6 @@ ath11k_mac_vdev_start_restart(struct ath
+- 		spin_lock_bh(&ab->base_lock);
+- 		arg.regdomain = ar->ab->dfs_region;
+- 		spin_unlock_bh(&ab->base_lock);
+--
+--		if (he_support) {
+--			ret = ath11k_set_he_mu_sounding_mode(ar, arvif);
+--			if (ret) {
+--				ath11k_warn(ar->ab, "failed to set he mode vdev %i\n",
+--					    arg.vdev_id);
+--				return ret;
+--			}
+--		}
+- 	}
+- 
+- 	arg.channel.passive |= !!(chandef->chan->flags & IEEE80211_CHAN_NO_IR);
+---- a/drivers/net/wireless/ath/ath11k/wmi.h
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.h
+-@@ -2897,8 +2897,11 @@ struct rx_reorder_queue_remove_params {
+- #define HE_DL_MUOFDMA_ENABLE	1
+- #define HE_UL_MUOFDMA_ENABLE	1
+- #define HE_DL_MUMIMO_ENABLE	1
+-+#define HE_UL_MUMIMO_ENABLE	1
+- #define HE_MU_BFEE_ENABLE	1
+- #define HE_SU_BFEE_ENABLE	1
+-+#define HE_MU_BFER_ENABLE	1
+-+#define HE_SU_BFER_ENABLE	1
+- 
+- #define HE_VHT_SOUNDING_MODE_ENABLE		1
+- #define HE_SU_MU_SOUNDING_MODE_ENABLE		1
+diff --git a/package/kernel/mac80211/patches/ath11k/0040-wifi-ath11k-move-HE-MCS-mapper-to-a-separate-functio.patch b/package/kernel/mac80211/patches/ath11k/0040-wifi-ath11k-move-HE-MCS-mapper-to-a-separate-functio.patch
+deleted file mode 100644
+index 6bc9880e10..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0040-wifi-ath11k-move-HE-MCS-mapper-to-a-separate-functio.patch
++++ /dev/null
+@@ -1,67 +0,0 @@
+-From 8077c1bbbc28e527fb29143c46f32c6a9d6cadf0 Mon Sep 17 00:00:00 2001
+-From: Muna Sinada <quic_msinada@quicinc.com>
+-Date: Fri, 24 Feb 2023 12:28:04 +0200
+-Subject: [PATCH] wifi: ath11k: move HE MCS mapper to a separate function
+-
+-Move HE MCS mapper to a separate function and call new function
+-in ath11k_mac_copy_he_cap().
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00356-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Muna Sinada <quic_msinada@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/1666128501-12364-4-git-send-email-quic_msinada@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 34 +++++++++++++++++----------
+- 1 file changed, 22 insertions(+), 12 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -5483,6 +5483,27 @@ static __le16 ath11k_mac_setup_he_6ghz_c
+- 	return cpu_to_le16(bcap->he_6ghz_capa);
+- }
+- 
+-+static void ath11k_mac_set_hemcsmap(struct ath11k *ar,
+-+				    struct ath11k_pdev_cap *cap,
+-+				    struct ieee80211_sta_he_cap *he_cap,
+-+				    int band)
+-+{
+-+	struct ath11k_band_cap *band_cap = &cap->band[band];
+-+
+-+	he_cap->he_mcs_nss_supp.rx_mcs_80 =
+-+		cpu_to_le16(band_cap->he_mcs & 0xffff);
+-+	he_cap->he_mcs_nss_supp.tx_mcs_80 =
+-+		cpu_to_le16(band_cap->he_mcs & 0xffff);
+-+	he_cap->he_mcs_nss_supp.rx_mcs_160 =
+-+		cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+-+	he_cap->he_mcs_nss_supp.tx_mcs_160 =
+-+		cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+-+	he_cap->he_mcs_nss_supp.rx_mcs_80p80 =
+-+		cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+-+	he_cap->he_mcs_nss_supp.tx_mcs_80p80 =
+-+		cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+-+}
+-+
+- static int ath11k_mac_copy_he_cap(struct ath11k *ar,
+- 				  struct ath11k_pdev_cap *cap,
+- 				  struct ieee80211_sband_iftype_data *data,
+-@@ -5544,18 +5565,7 @@ static int ath11k_mac_copy_he_cap(struct
+- 			break;
+- 		}
+- 
+--		he_cap->he_mcs_nss_supp.rx_mcs_80 =
+--			cpu_to_le16(band_cap->he_mcs & 0xffff);
+--		he_cap->he_mcs_nss_supp.tx_mcs_80 =
+--			cpu_to_le16(band_cap->he_mcs & 0xffff);
+--		he_cap->he_mcs_nss_supp.rx_mcs_160 =
+--			cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+--		he_cap->he_mcs_nss_supp.tx_mcs_160 =
+--			cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+--		he_cap->he_mcs_nss_supp.rx_mcs_80p80 =
+--			cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+--		he_cap->he_mcs_nss_supp.tx_mcs_80p80 =
+--			cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+-+		ath11k_mac_set_hemcsmap(ar, cap, he_cap, band);
+- 
+- 		memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres));
+- 		if (he_cap_elem->phy_cap_info[6] &
+diff --git a/package/kernel/mac80211/patches/ath11k/0041-wifi-ath11k-generate-rx-and-tx-mcs-maps-for-supporte.patch b/package/kernel/mac80211/patches/ath11k/0041-wifi-ath11k-generate-rx-and-tx-mcs-maps-for-supporte.patch
+deleted file mode 100644
+index 5cb7801b29..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0041-wifi-ath11k-generate-rx-and-tx-mcs-maps-for-supporte.patch
++++ /dev/null
+@@ -1,64 +0,0 @@
+-From ebf82988f844dd98e6b007cffcc5e95986056995 Mon Sep 17 00:00:00 2001
+-From: Muna Sinada <quic_msinada@quicinc.com>
+-Date: Fri, 24 Feb 2023 12:28:04 +0200
+-Subject: [PATCH] wifi: ath11k: generate rx and tx mcs maps for supported HE
+- mcs
+-
+-Generate rx and tx mcs maps in ath11k_mac_set_hemcsmap() and set them
+-in supported mcs/nss for HE capabilities.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00356-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Muna Sinada <quic_msinada@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/1666128501-12364-5-git-send-email-quic_msinada@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 30 ++++++++++++++++++++-------
+- 1 file changed, 23 insertions(+), 7 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -5488,20 +5488,36 @@ static void ath11k_mac_set_hemcsmap(stru
+- 				    struct ieee80211_sta_he_cap *he_cap,
+- 				    int band)
+- {
+--	struct ath11k_band_cap *band_cap = &cap->band[band];
+-+	u16 txmcs_map, rxmcs_map;
+-+	u32 i;
+- 
+-+	rxmcs_map = 0;
+-+	txmcs_map = 0;
+-+	for (i = 0; i < 8; i++) {
+-+		if (i < ar->num_tx_chains &&
+-+		    (ar->cfg_tx_chainmask >> cap->tx_chain_mask_shift) & BIT(i))
+-+			txmcs_map |= IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2);
+-+		else
+-+			txmcs_map |= IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2);
+-+
+-+		if (i < ar->num_rx_chains &&
+-+		    (ar->cfg_rx_chainmask >> cap->tx_chain_mask_shift) & BIT(i))
+-+			rxmcs_map |= IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2);
+-+		else
+-+			rxmcs_map |= IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2);
+-+	}
+- 	he_cap->he_mcs_nss_supp.rx_mcs_80 =
+--		cpu_to_le16(band_cap->he_mcs & 0xffff);
+-+		cpu_to_le16(rxmcs_map & 0xffff);
+- 	he_cap->he_mcs_nss_supp.tx_mcs_80 =
+--		cpu_to_le16(band_cap->he_mcs & 0xffff);
+-+		cpu_to_le16(txmcs_map & 0xffff);
+- 	he_cap->he_mcs_nss_supp.rx_mcs_160 =
+--		cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+-+		cpu_to_le16(rxmcs_map & 0xffff);
+- 	he_cap->he_mcs_nss_supp.tx_mcs_160 =
+--		cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+-+		cpu_to_le16(txmcs_map & 0xffff);
+- 	he_cap->he_mcs_nss_supp.rx_mcs_80p80 =
+--		cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+-+		cpu_to_le16(rxmcs_map & 0xffff);
+- 	he_cap->he_mcs_nss_supp.tx_mcs_80p80 =
+--		cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+-+		cpu_to_le16(txmcs_map & 0xffff);
+- }
+- 
+- static int ath11k_mac_copy_he_cap(struct ath11k *ar,
+diff --git a/package/kernel/mac80211/patches/ath11k/0042-wifi-ath11k-Add-tx-ack-signal-support-for-management.patch b/package/kernel/mac80211/patches/ath11k/0042-wifi-ath11k-Add-tx-ack-signal-support-for-management.patch
+deleted file mode 100644
+index 8d41657311..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0042-wifi-ath11k-Add-tx-ack-signal-support-for-management.patch
++++ /dev/null
+@@ -1,150 +0,0 @@
+-From 01c6c9fccbd51c1d9eab0f5794b0271b026178df Mon Sep 17 00:00:00 2001
+-From: Abinaya Kalaiselvan <quic_akalaise@quicinc.com>
+-Date: Mon, 19 Dec 2022 11:08:44 +0530
+-Subject: [PATCH] wifi: ath11k: Add tx ack signal support for management
+- packets
+-
+-Add support to notify tx ack signal values for management
+-packets to userspace through nl80211 interface.
+-
+-Advertise NL80211_EXT_FEATURE_ACK_SIGNAL_SUPPORT flag
+-to enable this feature and it will be used for data
+-packets as well.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Abinaya Kalaiselvan <quic_akalaise@quicinc.com>
+-Signed-off-by: Maharaja Kennadyrajan <quic_mkenna@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20221219053844.4084486-1-quic_mkenna@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/hw.c  |  1 +
+- drivers/net/wireless/ath/ath11k/mac.c |  5 +++++
+- drivers/net/wireless/ath/ath11k/wmi.c | 27 ++++++++++++++++-----------
+- drivers/net/wireless/ath/ath11k/wmi.h |  3 +++
+- 4 files changed, 25 insertions(+), 11 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/hw.c
+-+++ b/drivers/net/wireless/ath/ath11k/hw.c
+-@@ -201,6 +201,7 @@ static void ath11k_init_wmi_config_ipq80
+- 	config->twt_ap_pdev_count = ab->num_radios;
+- 	config->twt_ap_sta_count = 1000;
+- 	config->flag1 |= WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64;
+-+	config->flag1 |= WMI_RSRC_CFG_FLAG1_ACK_RSSI;
+- }
+- 
+- static int ath11k_hw_mac_id_to_pdev_id_ipq8074(struct ath11k_hw_params *hw,
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -9174,6 +9174,11 @@ static int __ath11k_mac_register(struct
+- 		goto err_free_if_combs;
+- 	}
+- 
+-+	if (test_bit(WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI,
+-+		     ar->ab->wmi_ab.svc_map))
+-+		wiphy_ext_feature_set(ar->hw->wiphy,
+-+				      NL80211_EXT_FEATURE_ACK_SIGNAL_SUPPORT);
+-+
+- 	ar->hw->queues = ATH11K_HW_MAX_QUEUES;
+- 	ar->hw->wiphy->tx_queue_len = ATH11K_QUEUE_LEN;
+- 	ar->hw->offchannel_tx_hw_queue = ATH11K_HW_MAX_QUEUES - 1;
+---- a/drivers/net/wireless/ath/ath11k/wmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
+-@@ -5229,8 +5229,8 @@ static int ath11k_pull_mgmt_rx_params_tl
+- 	return 0;
+- }
+- 
+--static int wmi_process_mgmt_tx_comp(struct ath11k *ar, u32 desc_id,
+--				    u32 status)
+-+static int wmi_process_mgmt_tx_comp(struct ath11k *ar,
+-+				    struct wmi_mgmt_tx_compl_event *tx_compl_param)
+- {
+- 	struct sk_buff *msdu;
+- 	struct ieee80211_tx_info *info;
+-@@ -5238,24 +5238,29 @@ static int wmi_process_mgmt_tx_comp(stru
+- 	int num_mgmt;
+- 
+- 	spin_lock_bh(&ar->txmgmt_idr_lock);
+--	msdu = idr_find(&ar->txmgmt_idr, desc_id);
+-+	msdu = idr_find(&ar->txmgmt_idr, tx_compl_param->desc_id);
+- 
+- 	if (!msdu) {
+- 		ath11k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n",
+--			    desc_id);
+-+			    tx_compl_param->desc_id);
+- 		spin_unlock_bh(&ar->txmgmt_idr_lock);
+- 		return -ENOENT;
+- 	}
+- 
+--	idr_remove(&ar->txmgmt_idr, desc_id);
+-+	idr_remove(&ar->txmgmt_idr, tx_compl_param->desc_id);
+- 	spin_unlock_bh(&ar->txmgmt_idr_lock);
+- 
+- 	skb_cb = ATH11K_SKB_CB(msdu);
+- 	dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
+- 
+- 	info = IEEE80211_SKB_CB(msdu);
+--	if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status)
+-+	if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) &&
+-+	    !tx_compl_param->status) {
+- 		info->flags |= IEEE80211_TX_STAT_ACK;
+-+		if (test_bit(WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI,
+-+			     ar->ab->wmi_ab.svc_map))
+-+			info->status.ack_signal = tx_compl_param->ack_rssi;
+-+	}
+- 
+- 	ieee80211_tx_status_irqsafe(ar->hw, msdu);
+- 
+-@@ -5267,7 +5272,7 @@ static int wmi_process_mgmt_tx_comp(stru
+- 
+- 	ath11k_dbg(ar->ab, ATH11K_DBG_WMI,
+- 		   "wmi mgmt tx comp pending %d desc id %d\n",
+--		   num_mgmt, desc_id);
+-+		   num_mgmt, tx_compl_param->desc_id);
+- 
+- 	if (!num_mgmt)
+- 		wake_up(&ar->txmgmt_empty_waitq);
+-@@ -5300,6 +5305,7 @@ static int ath11k_pull_mgmt_tx_compl_par
+- 	param->pdev_id = ev->pdev_id;
+- 	param->desc_id = ev->desc_id;
+- 	param->status = ev->status;
+-+	param->ack_rssi = ev->ack_rssi;
+- 
+- 	kfree(tb);
+- 	return 0;
+-@@ -7070,13 +7076,12 @@ static void ath11k_mgmt_tx_compl_event(s
+- 		goto exit;
+- 	}
+- 
+--	wmi_process_mgmt_tx_comp(ar, tx_compl_param.desc_id,
+--				 tx_compl_param.status);
+-+	wmi_process_mgmt_tx_comp(ar, &tx_compl_param);
+- 
+- 	ath11k_dbg(ab, ATH11K_DBG_MGMT,
+--		   "mgmt tx compl ev pdev_id %d, desc_id %d, status %d",
+-+		   "mgmt tx compl ev pdev_id %d, desc_id %d, status %d ack_rssi %d",
+- 		   tx_compl_param.pdev_id, tx_compl_param.desc_id,
+--		   tx_compl_param.status);
+-+		   tx_compl_param.status, tx_compl_param.ack_rssi);
+- 
+- exit:
+- 	rcu_read_unlock();
+---- a/drivers/net/wireless/ath/ath11k/wmi.h
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.h
+-@@ -2311,6 +2311,7 @@ struct wmi_init_cmd {
+- } __packed;
+- 
+- #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5)
+-+#define WMI_RSRC_CFG_FLAG1_ACK_RSSI BIT(18)
+- 
+- struct wmi_resource_config {
+- 	u32 tlv_header;
+-@@ -4550,6 +4551,8 @@ struct wmi_mgmt_tx_compl_event {
+- 	u32 desc_id;
+- 	u32 status;
+- 	u32 pdev_id;
+-+	u32 ppdu_id;
+-+	u32 ack_rssi;
+- } __packed;
+- 
+- struct wmi_scan_event {
+diff --git a/package/kernel/mac80211/patches/ath11k/0043-wifi-ath11k-use-proper-regulatory-reference-for-band.patch b/package/kernel/mac80211/patches/ath11k/0043-wifi-ath11k-use-proper-regulatory-reference-for-band.patch
+deleted file mode 100644
+index 5bc195528e..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0043-wifi-ath11k-use-proper-regulatory-reference-for-band.patch
++++ /dev/null
+@@ -1,216 +0,0 @@
+-From 25e289e1f52e1f4fb1d07622c6a24f8d8a8e420d Mon Sep 17 00:00:00 2001
+-From: Aditya Kumar Singh <quic_adisi@quicinc.com>
+-Date: Wed, 1 Mar 2023 16:20:58 +0200
+-Subject: [PATCH] wifi: ath11k: use proper regulatory reference for bands
+-
+-Currently, during regulatory event, 2 GHz/5 GHz is referred
+-to as 2G/5G including variable names. However, there is no
+-such entity as 2G or 5G.
+-
+-Re-name such occurences to its proper name. No functional changes.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230110121024.14051-2-quic_adisi@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/reg.c | 20 ++++-----
+- drivers/net/wireless/ath/ath11k/wmi.c | 58 ++++++++++++++-------------
+- drivers/net/wireless/ath/ath11k/wmi.h | 28 ++++++-------
+- 3 files changed, 54 insertions(+), 52 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/reg.c
+-+++ b/drivers/net/wireless/ath/ath11k/reg.c
+-@@ -619,7 +619,7 @@ ath11k_reg_build_regd(struct ath11k_base
+- 	u32 flags;
+- 	char alpha2[3];
+- 
+--	num_rules = reg_info->num_5g_reg_rules + reg_info->num_2g_reg_rules;
+-+	num_rules = reg_info->num_5ghz_reg_rules + reg_info->num_2ghz_reg_rules;
+- 
+- 	if (!num_rules)
+- 		goto ret;
+-@@ -644,20 +644,20 @@ ath11k_reg_build_regd(struct ath11k_base
+- 		   alpha2, ath11k_reg_get_regdom_str(tmp_regd->dfs_region),
+- 		   reg_info->dfs_region, num_rules);
+- 	/* Update reg_rules[] below. Firmware is expected to
+--	 * send these rules in order(2G rules first and then 5G)
+-+	 * send these rules in order(2 GHz rules first and then 5 GHz)
+- 	 */
+- 	for (; i < num_rules; i++) {
+--		if (reg_info->num_2g_reg_rules &&
+--		    (i < reg_info->num_2g_reg_rules)) {
+--			reg_rule = reg_info->reg_rules_2g_ptr + i;
+-+		if (reg_info->num_2ghz_reg_rules &&
+-+		    (i < reg_info->num_2ghz_reg_rules)) {
+-+			reg_rule = reg_info->reg_rules_2ghz_ptr + i;
+- 			max_bw = min_t(u16, reg_rule->max_bw,
+--				       reg_info->max_bw_2g);
+-+				       reg_info->max_bw_2ghz);
+- 			flags = 0;
+--		} else if (reg_info->num_5g_reg_rules &&
+--			   (j < reg_info->num_5g_reg_rules)) {
+--			reg_rule = reg_info->reg_rules_5g_ptr + j++;
+-+		} else if (reg_info->num_5ghz_reg_rules &&
+-+			   (j < reg_info->num_5ghz_reg_rules)) {
+-+			reg_rule = reg_info->reg_rules_5ghz_ptr + j++;
+- 			max_bw = min_t(u16, reg_rule->max_bw,
+--				       reg_info->max_bw_5g);
+-+				       reg_info->max_bw_5ghz);
+- 
+- 			/* FW doesn't pass NL80211_RRF_AUTO_BW flag for
+- 			 * BW Auto correction, we can enable this by default
+---- a/drivers/net/wireless/ath/ath11k/wmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
+-@@ -4959,7 +4959,7 @@ static int ath11k_pull_reg_chan_list_upd
+- 	const void **tb;
+- 	const struct wmi_reg_chan_list_cc_event *chan_list_event_hdr;
+- 	struct wmi_regulatory_rule_struct *wmi_reg_rule;
+--	u32 num_2g_reg_rules, num_5g_reg_rules;
+-+	u32 num_2ghz_reg_rules, num_5ghz_reg_rules;
+- 	int ret;
+- 
+- 	ath11k_dbg(ab, ATH11K_DBG_WMI, "processing regulatory channel list\n");
+-@@ -4978,10 +4978,10 @@ static int ath11k_pull_reg_chan_list_upd
+- 		return -EPROTO;
+- 	}
+- 
+--	reg_info->num_2g_reg_rules = chan_list_event_hdr->num_2g_reg_rules;
+--	reg_info->num_5g_reg_rules = chan_list_event_hdr->num_5g_reg_rules;
+-+	reg_info->num_2ghz_reg_rules = chan_list_event_hdr->num_2ghz_reg_rules;
+-+	reg_info->num_5ghz_reg_rules = chan_list_event_hdr->num_5ghz_reg_rules;
+- 
+--	if (!(reg_info->num_2g_reg_rules + reg_info->num_5g_reg_rules)) {
+-+	if (!(reg_info->num_2ghz_reg_rules + reg_info->num_5ghz_reg_rules)) {
+- 		ath11k_warn(ab, "No regulatory rules available in the event info\n");
+- 		kfree(tb);
+- 		return -EINVAL;
+-@@ -5008,46 +5008,48 @@ static int ath11k_pull_reg_chan_list_upd
+- 	else if (chan_list_event_hdr->status_code == WMI_REG_SET_CC_STATUS_FAIL)
+- 		reg_info->status_code = REG_SET_CC_STATUS_FAIL;
+- 
+--	reg_info->min_bw_2g = chan_list_event_hdr->min_bw_2g;
+--	reg_info->max_bw_2g = chan_list_event_hdr->max_bw_2g;
+--	reg_info->min_bw_5g = chan_list_event_hdr->min_bw_5g;
+--	reg_info->max_bw_5g = chan_list_event_hdr->max_bw_5g;
+-+	reg_info->min_bw_2ghz = chan_list_event_hdr->min_bw_2ghz;
+-+	reg_info->max_bw_2ghz = chan_list_event_hdr->max_bw_2ghz;
+-+	reg_info->min_bw_5ghz = chan_list_event_hdr->min_bw_5ghz;
+-+	reg_info->max_bw_5ghz = chan_list_event_hdr->max_bw_5ghz;
+- 
+--	num_2g_reg_rules = reg_info->num_2g_reg_rules;
+--	num_5g_reg_rules = reg_info->num_5g_reg_rules;
+-+	num_2ghz_reg_rules = reg_info->num_2ghz_reg_rules;
+-+	num_5ghz_reg_rules = reg_info->num_5ghz_reg_rules;
+- 
+- 	ath11k_dbg(ab, ATH11K_DBG_WMI,
+--		   "%s:cc %s dsf %d BW: min_2g %d max_2g %d min_5g %d max_5g %d",
+-+		   "%s:cc %s dsf %d BW: min_2ghz %d max_2ghz %d min_5ghz %d max_5ghz %d",
+- 		   __func__, reg_info->alpha2, reg_info->dfs_region,
+--		   reg_info->min_bw_2g, reg_info->max_bw_2g,
+--		   reg_info->min_bw_5g, reg_info->max_bw_5g);
+-+		   reg_info->min_bw_2ghz, reg_info->max_bw_2ghz,
+-+		   reg_info->min_bw_5ghz, reg_info->max_bw_5ghz);
+- 
+- 	ath11k_dbg(ab, ATH11K_DBG_WMI,
+--		   "%s: num_2g_reg_rules %d num_5g_reg_rules %d", __func__,
+--		   num_2g_reg_rules, num_5g_reg_rules);
+-+		   "%s: num_2ghz_reg_rules %d num_5ghz_reg_rules %d", __func__,
+-+		   num_2ghz_reg_rules, num_5ghz_reg_rules);
+- 
+- 	wmi_reg_rule =
+- 		(struct wmi_regulatory_rule_struct *)((u8 *)chan_list_event_hdr
+- 						+ sizeof(*chan_list_event_hdr)
+- 						+ sizeof(struct wmi_tlv));
+- 
+--	if (num_2g_reg_rules) {
+--		reg_info->reg_rules_2g_ptr = create_reg_rules_from_wmi(num_2g_reg_rules,
+--								       wmi_reg_rule);
+--		if (!reg_info->reg_rules_2g_ptr) {
+-+	if (num_2ghz_reg_rules) {
+-+		reg_info->reg_rules_2ghz_ptr =
+-+				create_reg_rules_from_wmi(num_2ghz_reg_rules,
+-+							  wmi_reg_rule);
+-+		if (!reg_info->reg_rules_2ghz_ptr) {
+- 			kfree(tb);
+--			ath11k_warn(ab, "Unable to Allocate memory for 2g rules\n");
+-+			ath11k_warn(ab, "Unable to Allocate memory for 2 GHz rules\n");
+- 			return -ENOMEM;
+- 		}
+- 	}
+- 
+--	if (num_5g_reg_rules) {
+--		wmi_reg_rule += num_2g_reg_rules;
+--		reg_info->reg_rules_5g_ptr = create_reg_rules_from_wmi(num_5g_reg_rules,
+--								       wmi_reg_rule);
+--		if (!reg_info->reg_rules_5g_ptr) {
+-+	if (num_5ghz_reg_rules) {
+-+		wmi_reg_rule += num_2ghz_reg_rules;
+-+		reg_info->reg_rules_5ghz_ptr =
+-+				create_reg_rules_from_wmi(num_5ghz_reg_rules,
+-+							  wmi_reg_rule);
+-+		if (!reg_info->reg_rules_5ghz_ptr) {
+- 			kfree(tb);
+--			ath11k_warn(ab, "Unable to Allocate memory for 5g rules\n");
+-+			ath11k_warn(ab, "Unable to Allocate memory for 5 GHz rules\n");
+- 			return -ENOMEM;
+- 		}
+- 	}
+-@@ -6619,8 +6621,8 @@ fallback:
+- 	WARN_ON(1);
+- mem_free:
+- 	if (reg_info) {
+--		kfree(reg_info->reg_rules_2g_ptr);
+--		kfree(reg_info->reg_rules_5g_ptr);
+-+		kfree(reg_info->reg_rules_2ghz_ptr);
+-+		kfree(reg_info->reg_rules_5ghz_ptr);
+- 		kfree(reg_info);
+- 	}
+- 	return ret;
+---- a/drivers/net/wireless/ath/ath11k/wmi.h
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.h
+-@@ -4129,14 +4129,14 @@ struct cur_regulatory_info {
+- 	u8 alpha2[REG_ALPHA2_LEN + 1];
+- 	u32 dfs_region;
+- 	u32 phybitmap;
+--	u32 min_bw_2g;
+--	u32 max_bw_2g;
+--	u32 min_bw_5g;
+--	u32 max_bw_5g;
+--	u32 num_2g_reg_rules;
+--	u32 num_5g_reg_rules;
+--	struct cur_reg_rule *reg_rules_2g_ptr;
+--	struct cur_reg_rule *reg_rules_5g_ptr;
+-+	u32 min_bw_2ghz;
+-+	u32 max_bw_2ghz;
+-+	u32 min_bw_5ghz;
+-+	u32 max_bw_5ghz;
+-+	u32 num_2ghz_reg_rules;
+-+	u32 num_5ghz_reg_rules;
+-+	struct cur_reg_rule *reg_rules_2ghz_ptr;
+-+	struct cur_reg_rule *reg_rules_5ghz_ptr;
+- };
+- 
+- struct wmi_reg_chan_list_cc_event {
+-@@ -4148,12 +4148,12 @@ struct wmi_reg_chan_list_cc_event {
+- 	u32 domain_code;
+- 	u32 dfs_region;
+- 	u32 phybitmap;
+--	u32 min_bw_2g;
+--	u32 max_bw_2g;
+--	u32 min_bw_5g;
+--	u32 max_bw_5g;
+--	u32 num_2g_reg_rules;
+--	u32 num_5g_reg_rules;
+-+	u32 min_bw_2ghz;
+-+	u32 max_bw_2ghz;
+-+	u32 min_bw_5ghz;
+-+	u32 max_bw_5ghz;
+-+	u32 num_2ghz_reg_rules;
+-+	u32 num_5ghz_reg_rules;
+- } __packed;
+- 
+- struct wmi_regulatory_rule_struct {
+diff --git a/package/kernel/mac80211/patches/ath11k/0044-wifi-ath11k-add-support-to-parse-new-WMI-event-for-6.patch b/package/kernel/mac80211/patches/ath11k/0044-wifi-ath11k-add-support-to-parse-new-WMI-event-for-6.patch
+deleted file mode 100644
+index e165c09dc4..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0044-wifi-ath11k-add-support-to-parse-new-WMI-event-for-6.patch
++++ /dev/null
+@@ -1,844 +0,0 @@
+-From 91fa00fa69224aae5afb720c5e68b22e4c4f7333 Mon Sep 17 00:00:00 2001
+-From: Aditya Kumar Singh <quic_adisi@quicinc.com>
+-Date: Wed, 1 Mar 2023 16:20:59 +0200
+-Subject: [PATCH] wifi: ath11k: add support to parse new WMI event for 6 GHz
+-
+-In order to support different power levels of 6 GHz AP and client,
+-new WMI event for regulatory - WMI_REG_CHAN_LIST_CC_EXT_EVENTID is
+-added in firmware. This event provides new parameters required for
+-6 GHz regulatory rules.
+-
+-Add support for parsing 2.4 GHz, 5 GHz and 6 GHz reg rules and other
+-parameters from WMI_REG_CHAN_LIST_CC_EXT_EVENTID.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Lavanya Suresh <quic_lavaks@quicinc.com>
+-Signed-off-by: Wen Gong <quic_wgong@quicinc.com>
+-Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230110121024.14051-3-quic_adisi@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/reg.c |  37 ++-
+- drivers/net/wireless/ath/ath11k/wmi.c | 418 +++++++++++++++++++++++++-
+- drivers/net/wireless/ath/ath11k/wmi.h | 163 +++++++++-
+- 3 files changed, 584 insertions(+), 34 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/reg.c
+-+++ b/drivers/net/wireless/ath/ath11k/reg.c
+-@@ -613,7 +613,7 @@ ath11k_reg_build_regd(struct ath11k_base
+- {
+- 	struct ieee80211_regdomain *tmp_regd, *default_regd, *new_regd = NULL;
+- 	struct cur_reg_rule *reg_rule;
+--	u8 i = 0, j = 0;
+-+	u8 i = 0, j = 0, k = 0;
+- 	u8 num_rules;
+- 	u16 max_bw;
+- 	u32 flags;
+-@@ -621,6 +621,12 @@ ath11k_reg_build_regd(struct ath11k_base
+- 
+- 	num_rules = reg_info->num_5ghz_reg_rules + reg_info->num_2ghz_reg_rules;
+- 
+-+	/* FIXME: Currently taking reg rules for 6 GHz only from Indoor AP mode list.
+-+	 * This can be updated after complete 6 GHz regulatory support is added.
+-+	 */
+-+	if (reg_info->is_ext_reg_event)
+-+		num_rules += reg_info->num_6ghz_rules_ap[WMI_REG_INDOOR_AP];
+-+
+- 	if (!num_rules)
+- 		goto ret;
+- 
+-@@ -666,6 +672,14 @@ ath11k_reg_build_regd(struct ath11k_base
+- 			 * per other BW rule flags we pass from here
+- 			 */
+- 			flags = NL80211_RRF_AUTO_BW;
+-+		} else if (reg_info->is_ext_reg_event &&
+-+			   reg_info->num_6ghz_rules_ap[WMI_REG_INDOOR_AP] &&
+-+			   (k < reg_info->num_6ghz_rules_ap[WMI_REG_INDOOR_AP])) {
+-+			reg_rule = reg_info->reg_rules_6ghz_ap_ptr[WMI_REG_INDOOR_AP] +
+-+				   k++;
+-+			max_bw = min_t(u16, reg_rule->max_bw,
+-+				       reg_info->max_bw_6ghz_ap[WMI_REG_INDOOR_AP]);
+-+			flags = NL80211_RRF_AUTO_BW;
+- 		} else {
+- 			break;
+- 		}
+-@@ -693,12 +707,21 @@ ath11k_reg_build_regd(struct ath11k_base
+- 			continue;
+- 		}
+- 
+--		ath11k_dbg(ab, ATH11K_DBG_REG,
+--			   "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d)\n",
+--			   i + 1, reg_rule->start_freq, reg_rule->end_freq,
+--			   max_bw, reg_rule->ant_gain, reg_rule->reg_power,
+--			   tmp_regd->reg_rules[i].dfs_cac_ms,
+--			   flags);
+-+		if (reg_info->is_ext_reg_event) {
+-+			ath11k_dbg(ab, ATH11K_DBG_REG,
+-+				   "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d) (%d, %d)\n",
+-+				   i + 1, reg_rule->start_freq, reg_rule->end_freq,
+-+				   max_bw, reg_rule->ant_gain, reg_rule->reg_power,
+-+				   tmp_regd->reg_rules[i].dfs_cac_ms, flags,
+-+				   reg_rule->psd_flag, reg_rule->psd_eirp);
+-+		} else {
+-+			ath11k_dbg(ab, ATH11K_DBG_REG,
+-+				   "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d)\n",
+-+				   i + 1, reg_rule->start_freq, reg_rule->end_freq,
+-+				   max_bw, reg_rule->ant_gain, reg_rule->reg_power,
+-+				   tmp_regd->reg_rules[i].dfs_cac_ms,
+-+				   flags);
+-+		}
+- 	}
+- 
+- 	tmp_regd->n_reg_rules = i;
+---- a/drivers/net/wireless/ath/ath11k/wmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
+-@@ -105,6 +105,8 @@ static const struct wmi_tlv_policy wmi_t
+- 		= { .min_len = sizeof(struct wmi_vdev_stopped_event) },
+- 	[WMI_TAG_REG_CHAN_LIST_CC_EVENT]
+- 		= { .min_len = sizeof(struct wmi_reg_chan_list_cc_event) },
+-+	[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT]
+-+		= { .min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) },
+- 	[WMI_TAG_MGMT_RX_HDR]
+- 		= { .min_len = sizeof(struct wmi_mgmt_rx_hdr) },
+- 	[WMI_TAG_MGMT_TX_COMPL_EVENT]
+-@@ -3974,6 +3976,10 @@ ath11k_wmi_copy_resource_config(struct w
+- 	wmi_cfg->sched_params = tg_cfg->sched_params;
+- 	wmi_cfg->twt_ap_pdev_count = tg_cfg->twt_ap_pdev_count;
+- 	wmi_cfg->twt_ap_sta_count = tg_cfg->twt_ap_sta_count;
+-+	wmi_cfg->host_service_flags &=
+-+		~(1 << WMI_CFG_HOST_SERVICE_FLAG_REG_CC_EXT);
+-+	wmi_cfg->host_service_flags |= (tg_cfg->is_reg_cc_ext_event_supported <<
+-+					WMI_CFG_HOST_SERVICE_FLAG_REG_CC_EXT);
+- }
+- 
+- static int ath11k_init_cmd_send(struct ath11k_pdev_wmi *wmi,
+-@@ -4192,6 +4198,10 @@ int ath11k_wmi_cmd_init(struct ath11k_ba
+- 
+- 	ab->hw_params.hw_ops->wmi_init_config(ab, &config);
+- 
+-+	if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT,
+-+		     ab->wmi_ab.svc_map))
+-+		config.is_reg_cc_ext_event_supported = 1;
+-+
+- 	memcpy(&wmi_sc->wlan_resource_config, &config, sizeof(config));
+- 
+- 	init_param.res_cfg = &wmi_sc->wlan_resource_config;
+-@@ -4995,18 +5005,11 @@ static int ath11k_pull_reg_chan_list_upd
+- 	reg_info->phy_id = chan_list_event_hdr->phy_id;
+- 	reg_info->ctry_code = chan_list_event_hdr->country_id;
+- 	reg_info->reg_dmn_pair = chan_list_event_hdr->domain_code;
+--	if (chan_list_event_hdr->status_code == WMI_REG_SET_CC_STATUS_PASS)
+--		reg_info->status_code = REG_SET_CC_STATUS_PASS;
+--	else if (chan_list_event_hdr->status_code == WMI_REG_CURRENT_ALPHA2_NOT_FOUND)
+--		reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND;
+--	else if (chan_list_event_hdr->status_code == WMI_REG_INIT_ALPHA2_NOT_FOUND)
+--		reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND;
+--	else if (chan_list_event_hdr->status_code == WMI_REG_SET_CC_CHANGE_NOT_ALLOWED)
+--		reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED;
+--	else if (chan_list_event_hdr->status_code == WMI_REG_SET_CC_STATUS_NO_MEMORY)
+--		reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY;
+--	else if (chan_list_event_hdr->status_code == WMI_REG_SET_CC_STATUS_FAIL)
+--		reg_info->status_code = REG_SET_CC_STATUS_FAIL;
+-+
+-+	reg_info->status_code =
+-+		ath11k_wmi_cc_setting_code_to_reg(chan_list_event_hdr->status_code);
+-+
+-+	reg_info->is_ext_reg_event = false;
+- 
+- 	reg_info->min_bw_2ghz = chan_list_event_hdr->min_bw_2ghz;
+- 	reg_info->max_bw_2ghz = chan_list_event_hdr->max_bw_2ghz;
+-@@ -5060,6 +5063,372 @@ static int ath11k_pull_reg_chan_list_upd
+- 	return 0;
+- }
+- 
+-+static struct cur_reg_rule
+-+*create_ext_reg_rules_from_wmi(u32 num_reg_rules,
+-+			       struct wmi_regulatory_ext_rule *wmi_reg_rule)
+-+{
+-+	struct cur_reg_rule *reg_rule_ptr;
+-+	u32 count;
+-+
+-+	reg_rule_ptr =  kcalloc(num_reg_rules, sizeof(*reg_rule_ptr), GFP_ATOMIC);
+-+
+-+	if (!reg_rule_ptr)
+-+		return NULL;
+-+
+-+	for (count = 0; count < num_reg_rules; count++) {
+-+		reg_rule_ptr[count].start_freq =
+-+			u32_get_bits(wmi_reg_rule[count].freq_info,
+-+				     REG_RULE_START_FREQ);
+-+		reg_rule_ptr[count].end_freq =
+-+			u32_get_bits(wmi_reg_rule[count].freq_info,
+-+				     REG_RULE_END_FREQ);
+-+		reg_rule_ptr[count].max_bw =
+-+			u32_get_bits(wmi_reg_rule[count].bw_pwr_info,
+-+				     REG_RULE_MAX_BW);
+-+		reg_rule_ptr[count].reg_power =
+-+			u32_get_bits(wmi_reg_rule[count].bw_pwr_info,
+-+				     REG_RULE_REG_PWR);
+-+		reg_rule_ptr[count].ant_gain =
+-+			u32_get_bits(wmi_reg_rule[count].bw_pwr_info,
+-+				     REG_RULE_ANT_GAIN);
+-+		reg_rule_ptr[count].flags =
+-+			u32_get_bits(wmi_reg_rule[count].flag_info,
+-+				     REG_RULE_FLAGS);
+-+		reg_rule_ptr[count].psd_flag =
+-+			u32_get_bits(wmi_reg_rule[count].psd_power_info,
+-+				     REG_RULE_PSD_INFO);
+-+		reg_rule_ptr[count].psd_eirp =
+-+			u32_get_bits(wmi_reg_rule[count].psd_power_info,
+-+				     REG_RULE_PSD_EIRP);
+-+	}
+-+
+-+	return reg_rule_ptr;
+-+}
+-+
+-+static u8
+-+ath11k_invalid_5ghz_reg_ext_rules_from_wmi(u32 num_reg_rules,
+-+					   const struct wmi_regulatory_ext_rule *rule)
+-+{
+-+	u8 num_invalid_5ghz_rules = 0;
+-+	u32 count, start_freq;
+-+
+-+	for (count = 0; count < num_reg_rules; count++) {
+-+		start_freq = u32_get_bits(rule[count].freq_info,
+-+					  REG_RULE_START_FREQ);
+-+
+-+		if (start_freq >= ATH11K_MIN_6G_FREQ)
+-+			num_invalid_5ghz_rules++;
+-+	}
+-+
+-+	return num_invalid_5ghz_rules;
+-+}
+-+
+-+static int ath11k_pull_reg_chan_list_ext_update_ev(struct ath11k_base *ab,
+-+						   struct sk_buff *skb,
+-+						   struct cur_regulatory_info *reg_info)
+-+{
+-+	const void **tb;
+-+	const struct wmi_reg_chan_list_cc_ext_event *ext_chan_list_event_hdr;
+-+	struct wmi_regulatory_ext_rule *ext_wmi_reg_rule;
+-+	u32 num_2ghz_reg_rules, num_5ghz_reg_rules;
+-+	u32 num_6ghz_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
+-+	u32 num_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
+-+	u32 total_reg_rules = 0;
+-+	int ret, i, j, num_invalid_5ghz_ext_rules = 0;
+-+
+-+	ath11k_dbg(ab, ATH11K_DBG_WMI, "processing regulatory ext channel list\n");
+-+
+-+	tb = ath11k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
+-+	if (IS_ERR(tb)) {
+-+		ret = PTR_ERR(tb);
+-+		ath11k_warn(ab, "failed to parse tlv: %d\n", ret);
+-+		return ret;
+-+	}
+-+
+-+	ext_chan_list_event_hdr = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT];
+-+	if (!ext_chan_list_event_hdr) {
+-+		ath11k_warn(ab, "failed to fetch reg chan list ext update ev\n");
+-+		kfree(tb);
+-+		return -EPROTO;
+-+	}
+-+
+-+	reg_info->num_2ghz_reg_rules =
+-+			ext_chan_list_event_hdr->num_2ghz_reg_rules;
+-+	reg_info->num_5ghz_reg_rules =
+-+			ext_chan_list_event_hdr->num_5ghz_reg_rules;
+-+	reg_info->num_6ghz_rules_ap[WMI_REG_INDOOR_AP] =
+-+			ext_chan_list_event_hdr->num_6ghz_reg_rules_ap_lpi;
+-+	reg_info->num_6ghz_rules_ap[WMI_REG_STANDARD_POWER_AP] =
+-+			ext_chan_list_event_hdr->num_6ghz_reg_rules_ap_sp;
+-+	reg_info->num_6ghz_rules_ap[WMI_REG_VERY_LOW_POWER_AP] =
+-+			ext_chan_list_event_hdr->num_6ghz_reg_rules_ap_vlp;
+-+
+-+	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
+-+		reg_info->num_6ghz_rules_client[WMI_REG_INDOOR_AP][i] =
+-+			ext_chan_list_event_hdr->num_6ghz_reg_rules_client_lpi[i];
+-+		reg_info->num_6ghz_rules_client[WMI_REG_STANDARD_POWER_AP][i] =
+-+			ext_chan_list_event_hdr->num_6ghz_reg_rules_client_sp[i];
+-+		reg_info->num_6ghz_rules_client[WMI_REG_VERY_LOW_POWER_AP][i] =
+-+			ext_chan_list_event_hdr->num_6ghz_reg_rules_client_vlp[i];
+-+	}
+-+
+-+	num_2ghz_reg_rules = reg_info->num_2ghz_reg_rules;
+-+	num_5ghz_reg_rules = reg_info->num_5ghz_reg_rules;
+-+
+-+	total_reg_rules += num_2ghz_reg_rules;
+-+	total_reg_rules += num_5ghz_reg_rules;
+-+
+-+	if ((num_2ghz_reg_rules > MAX_REG_RULES) ||
+-+	    (num_5ghz_reg_rules > MAX_REG_RULES)) {
+-+		ath11k_warn(ab, "Num reg rules for 2.4 GHz/5 GHz exceeds max limit (num_2ghz_reg_rules: %d num_5ghz_reg_rules: %d max_rules: %d)\n",
+-+			    num_2ghz_reg_rules, num_5ghz_reg_rules, MAX_REG_RULES);
+-+		kfree(tb);
+-+		return -EINVAL;
+-+	}
+-+
+-+	for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
+-+		num_6ghz_reg_rules_ap[i] = reg_info->num_6ghz_rules_ap[i];
+-+
+-+		if (num_6ghz_reg_rules_ap[i] > MAX_6GHZ_REG_RULES) {
+-+			ath11k_warn(ab, "Num 6 GHz reg rules for AP mode(%d) exceeds max limit (num_6ghz_reg_rules_ap: %d, max_rules: %d)\n",
+-+				    i, num_6ghz_reg_rules_ap[i], MAX_6GHZ_REG_RULES);
+-+			kfree(tb);
+-+			return -EINVAL;
+-+		}
+-+
+-+		total_reg_rules += num_6ghz_reg_rules_ap[i];
+-+	}
+-+
+-+	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
+-+		num_6ghz_client[WMI_REG_INDOOR_AP][i] =
+-+			reg_info->num_6ghz_rules_client[WMI_REG_INDOOR_AP][i];
+-+		total_reg_rules += num_6ghz_client[WMI_REG_INDOOR_AP][i];
+-+
+-+		num_6ghz_client[WMI_REG_STANDARD_POWER_AP][i] =
+-+			reg_info->num_6ghz_rules_client[WMI_REG_STANDARD_POWER_AP][i];
+-+		total_reg_rules += num_6ghz_client[WMI_REG_STANDARD_POWER_AP][i];
+-+
+-+		num_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i] =
+-+			reg_info->num_6ghz_rules_client[WMI_REG_VERY_LOW_POWER_AP][i];
+-+		total_reg_rules += num_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i];
+-+
+-+		if ((num_6ghz_client[WMI_REG_INDOOR_AP][i] > MAX_6GHZ_REG_RULES) ||
+-+		    (num_6ghz_client[WMI_REG_STANDARD_POWER_AP][i] >
+-+							     MAX_6GHZ_REG_RULES) ||
+-+		    (num_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i] >
+-+							     MAX_6GHZ_REG_RULES)) {
+-+			ath11k_warn(ab,
+-+				    "Num 6 GHz client reg rules exceeds max limit, for client(type: %d)\n",
+-+				    i);
+-+			kfree(tb);
+-+			return -EINVAL;
+-+		}
+-+	}
+-+
+-+	if (!total_reg_rules) {
+-+		ath11k_warn(ab, "No reg rules available\n");
+-+		kfree(tb);
+-+		return -EINVAL;
+-+	}
+-+
+-+	memcpy(reg_info->alpha2, &ext_chan_list_event_hdr->alpha2,
+-+	       REG_ALPHA2_LEN);
+-+
+-+	reg_info->dfs_region = ext_chan_list_event_hdr->dfs_region;
+-+	reg_info->phybitmap = ext_chan_list_event_hdr->phybitmap;
+-+	reg_info->num_phy = ext_chan_list_event_hdr->num_phy;
+-+	reg_info->phy_id = ext_chan_list_event_hdr->phy_id;
+-+	reg_info->ctry_code = ext_chan_list_event_hdr->country_id;
+-+	reg_info->reg_dmn_pair = ext_chan_list_event_hdr->domain_code;
+-+
+-+	reg_info->status_code =
+-+		ath11k_wmi_cc_setting_code_to_reg(ext_chan_list_event_hdr->status_code);
+-+
+-+	reg_info->is_ext_reg_event = true;
+-+
+-+	reg_info->min_bw_2ghz = ext_chan_list_event_hdr->min_bw_2ghz;
+-+	reg_info->max_bw_2ghz = ext_chan_list_event_hdr->max_bw_2ghz;
+-+	reg_info->min_bw_5ghz = ext_chan_list_event_hdr->min_bw_5ghz;
+-+	reg_info->max_bw_5ghz = ext_chan_list_event_hdr->max_bw_5ghz;
+-+
+-+	reg_info->min_bw_6ghz_ap[WMI_REG_INDOOR_AP] =
+-+			ext_chan_list_event_hdr->min_bw_6ghz_ap_lpi;
+-+	reg_info->max_bw_6ghz_ap[WMI_REG_INDOOR_AP] =
+-+			 ext_chan_list_event_hdr->max_bw_6ghz_ap_lpi;
+-+	reg_info->min_bw_6ghz_ap[WMI_REG_STANDARD_POWER_AP] =
+-+			ext_chan_list_event_hdr->min_bw_6ghz_ap_sp;
+-+	reg_info->max_bw_6ghz_ap[WMI_REG_STANDARD_POWER_AP] =
+-+			ext_chan_list_event_hdr->max_bw_6ghz_ap_sp;
+-+	reg_info->min_bw_6ghz_ap[WMI_REG_VERY_LOW_POWER_AP] =
+-+			ext_chan_list_event_hdr->min_bw_6ghz_ap_vlp;
+-+	reg_info->max_bw_6ghz_ap[WMI_REG_VERY_LOW_POWER_AP] =
+-+			ext_chan_list_event_hdr->max_bw_6ghz_ap_vlp;
+-+
+-+	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
+-+		reg_info->min_bw_6ghz_client[WMI_REG_INDOOR_AP][i] =
+-+				ext_chan_list_event_hdr->min_bw_6ghz_client_lpi[i];
+-+		reg_info->max_bw_6ghz_client[WMI_REG_INDOOR_AP][i] =
+-+				ext_chan_list_event_hdr->max_bw_6ghz_client_lpi[i];
+-+		reg_info->min_bw_6ghz_client[WMI_REG_STANDARD_POWER_AP][i] =
+-+				ext_chan_list_event_hdr->min_bw_6ghz_client_sp[i];
+-+		reg_info->max_bw_6ghz_client[WMI_REG_STANDARD_POWER_AP][i] =
+-+				ext_chan_list_event_hdr->max_bw_6ghz_client_sp[i];
+-+		reg_info->min_bw_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i] =
+-+				ext_chan_list_event_hdr->min_bw_6ghz_client_vlp[i];
+-+		reg_info->max_bw_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i] =
+-+				ext_chan_list_event_hdr->max_bw_6ghz_client_vlp[i];
+-+	}
+-+
+-+	ath11k_dbg(ab, ATH11K_DBG_WMI,
+-+		   "%s:cc_ext %s dsf %d BW: min_2ghz %d max_2ghz %d min_5ghz %d max_5ghz %d",
+-+		   __func__, reg_info->alpha2, reg_info->dfs_region,
+-+		   reg_info->min_bw_2ghz, reg_info->max_bw_2ghz,
+-+		   reg_info->min_bw_5ghz, reg_info->max_bw_5ghz);
+-+
+-+	ath11k_dbg(ab, ATH11K_DBG_WMI,
+-+		   "num_2ghz_reg_rules %d num_5ghz_reg_rules %d",
+-+		   num_2ghz_reg_rules, num_5ghz_reg_rules);
+-+
+-+	ath11k_dbg(ab, ATH11K_DBG_WMI,
+-+		   "num_6ghz_reg_rules_ap_lpi: %d num_6ghz_reg_rules_ap_sp: %d num_6ghz_reg_rules_ap_vlp: %d",
+-+		   num_6ghz_reg_rules_ap[WMI_REG_INDOOR_AP],
+-+		   num_6ghz_reg_rules_ap[WMI_REG_STANDARD_POWER_AP],
+-+		   num_6ghz_reg_rules_ap[WMI_REG_VERY_LOW_POWER_AP]);
+-+
+-+	j = WMI_REG_DEFAULT_CLIENT;
+-+	ath11k_dbg(ab, ATH11K_DBG_WMI,
+-+		   "6 GHz Regular client: num_6ghz_reg_rules_lpi: %d num_6ghz_reg_rules_sp: %d num_6ghz_reg_rules_vlp: %d",
+-+		   num_6ghz_client[WMI_REG_INDOOR_AP][j],
+-+		   num_6ghz_client[WMI_REG_STANDARD_POWER_AP][j],
+-+		   num_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][j]);
+-+
+-+	j = WMI_REG_SUBORDINATE_CLIENT;
+-+	ath11k_dbg(ab, ATH11K_DBG_WMI,
+-+		   "6 GHz Subordinate client: num_6ghz_reg_rules_lpi: %d num_6ghz_reg_rules_sp: %d num_6ghz_reg_rules_vlp: %d",
+-+		   num_6ghz_client[WMI_REG_INDOOR_AP][j],
+-+		   num_6ghz_client[WMI_REG_STANDARD_POWER_AP][j],
+-+		   num_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][j]);
+-+
+-+	ext_wmi_reg_rule =
+-+		(struct wmi_regulatory_ext_rule *)((u8 *)ext_chan_list_event_hdr
+-+						   + sizeof(*ext_chan_list_event_hdr)
+-+						   + sizeof(struct wmi_tlv));
+-+	if (num_2ghz_reg_rules) {
+-+		reg_info->reg_rules_2ghz_ptr =
+-+			create_ext_reg_rules_from_wmi(num_2ghz_reg_rules,
+-+						      ext_wmi_reg_rule);
+-+
+-+		if (!reg_info->reg_rules_2ghz_ptr) {
+-+			kfree(tb);
+-+			ath11k_warn(ab, "Unable to Allocate memory for 2 GHz rules\n");
+-+			return -ENOMEM;
+-+		}
+-+	}
+-+
+-+	ext_wmi_reg_rule += num_2ghz_reg_rules;
+-+
+-+	/* Firmware might include 6 GHz reg rule in 5 GHz rule list
+-+	 * for few countries along with separate 6 GHz rule.
+-+	 * Having same 6 GHz reg rule in 5 GHz and 6 GHz rules list
+-+	 * causes intersect check to be true, and same rules will be
+-+	 * shown multiple times in iw cmd.
+-+	 * Hence, avoid parsing 6 GHz rule from 5 GHz reg rule list
+-+	 */
+-+	num_invalid_5ghz_ext_rules =
+-+		ath11k_invalid_5ghz_reg_ext_rules_from_wmi(num_5ghz_reg_rules,
+-+							   ext_wmi_reg_rule);
+-+
+-+	if (num_invalid_5ghz_ext_rules) {
+-+		ath11k_dbg(ab, ATH11K_DBG_WMI,
+-+			   "CC: %s 5 GHz reg rules number %d from fw, %d number of invalid 5 GHz rules",
+-+			   reg_info->alpha2, reg_info->num_5ghz_reg_rules,
+-+			   num_invalid_5ghz_ext_rules);
+-+
+-+		num_5ghz_reg_rules = num_5ghz_reg_rules - num_invalid_5ghz_ext_rules;
+-+		reg_info->num_5ghz_reg_rules = num_5ghz_reg_rules;
+-+	}
+-+
+-+	if (num_5ghz_reg_rules) {
+-+		reg_info->reg_rules_5ghz_ptr =
+-+			create_ext_reg_rules_from_wmi(num_5ghz_reg_rules,
+-+						      ext_wmi_reg_rule);
+-+
+-+		if (!reg_info->reg_rules_5ghz_ptr) {
+-+			kfree(tb);
+-+			ath11k_warn(ab, "Unable to Allocate memory for 5 GHz rules\n");
+-+			return -ENOMEM;
+-+		}
+-+	}
+-+
+-+	/* We have adjusted the number of 5 GHz reg rules above. But still those
+-+	 * many rules needs to be adjusted in ext_wmi_reg_rule.
+-+	 *
+-+	 * NOTE: num_invalid_5ghz_ext_rules will be 0 for rest other cases.
+-+	 */
+-+	ext_wmi_reg_rule += (num_5ghz_reg_rules + num_invalid_5ghz_ext_rules);
+-+
+-+	for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
+-+		reg_info->reg_rules_6ghz_ap_ptr[i] =
+-+			create_ext_reg_rules_from_wmi(num_6ghz_reg_rules_ap[i],
+-+						      ext_wmi_reg_rule);
+-+
+-+		if (!reg_info->reg_rules_6ghz_ap_ptr[i]) {
+-+			kfree(tb);
+-+			ath11k_warn(ab, "Unable to Allocate memory for 6 GHz AP rules\n");
+-+			return -ENOMEM;
+-+		}
+-+
+-+		ext_wmi_reg_rule += num_6ghz_reg_rules_ap[i];
+-+	}
+-+
+-+	for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) {
+-+		for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
+-+			reg_info->reg_rules_6ghz_client_ptr[j][i] =
+-+				create_ext_reg_rules_from_wmi(num_6ghz_client[j][i],
+-+							      ext_wmi_reg_rule);
+-+
+-+			if (!reg_info->reg_rules_6ghz_client_ptr[j][i]) {
+-+				kfree(tb);
+-+				ath11k_warn(ab, "Unable to Allocate memory for 6 GHz client rules\n");
+-+				return -ENOMEM;
+-+			}
+-+
+-+			ext_wmi_reg_rule += num_6ghz_client[j][i];
+-+		}
+-+	}
+-+
+-+	reg_info->client_type = ext_chan_list_event_hdr->client_type;
+-+	reg_info->rnr_tpe_usable = ext_chan_list_event_hdr->rnr_tpe_usable;
+-+	reg_info->unspecified_ap_usable =
+-+			ext_chan_list_event_hdr->unspecified_ap_usable;
+-+	reg_info->domain_code_6ghz_ap[WMI_REG_INDOOR_AP] =
+-+			ext_chan_list_event_hdr->domain_code_6ghz_ap_lpi;
+-+	reg_info->domain_code_6ghz_ap[WMI_REG_STANDARD_POWER_AP] =
+-+			ext_chan_list_event_hdr->domain_code_6ghz_ap_sp;
+-+	reg_info->domain_code_6ghz_ap[WMI_REG_VERY_LOW_POWER_AP] =
+-+			ext_chan_list_event_hdr->domain_code_6ghz_ap_vlp;
+-+
+-+	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
+-+		reg_info->domain_code_6ghz_client[WMI_REG_INDOOR_AP][i] =
+-+				ext_chan_list_event_hdr->domain_code_6ghz_client_lpi[i];
+-+		reg_info->domain_code_6ghz_client[WMI_REG_STANDARD_POWER_AP][i] =
+-+				ext_chan_list_event_hdr->domain_code_6ghz_client_sp[i];
+-+		reg_info->domain_code_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i] =
+-+				ext_chan_list_event_hdr->domain_code_6ghz_client_vlp[i];
+-+	}
+-+
+-+	reg_info->domain_code_6ghz_super_id =
+-+			ext_chan_list_event_hdr->domain_code_6ghz_super_id;
+-+
+-+	ath11k_dbg(ab, ATH11K_DBG_WMI, "6 GHz client_type: %d domain_code_6ghz_super_id: %d",
+-+		   reg_info->client_type, reg_info->domain_code_6ghz_super_id);
+-+
+-+	ath11k_dbg(ab, ATH11K_DBG_WMI, "processed regulatory ext channel list\n");
+-+
+-+	kfree(tb);
+-+	return 0;
+-+}
+-+
+- static int ath11k_pull_peer_del_resp_ev(struct ath11k_base *ab, struct sk_buff *skb,
+- 					struct wmi_peer_delete_resp_event *peer_del_resp)
+- {
+-@@ -6507,12 +6876,14 @@ static bool ath11k_reg_is_world_alpha(ch
+- 	return false;
+- }
+- 
+--static int ath11k_reg_chan_list_event(struct ath11k_base *ab, struct sk_buff *skb)
+-+static int ath11k_reg_chan_list_event(struct ath11k_base *ab,
+-+				      struct sk_buff *skb,
+-+				      enum wmi_reg_chan_list_cmd_type id)
+- {
+- 	struct cur_regulatory_info *reg_info = NULL;
+- 	struct ieee80211_regdomain *regd = NULL;
+- 	bool intersect = false;
+--	int ret = 0, pdev_idx;
+-+	int ret = 0, pdev_idx, i, j;
+- 	struct ath11k *ar;
+- 
+- 	reg_info = kzalloc(sizeof(*reg_info), GFP_ATOMIC);
+-@@ -6521,7 +6892,11 @@ static int ath11k_reg_chan_list_event(st
+- 		goto fallback;
+- 	}
+- 
+--	ret = ath11k_pull_reg_chan_list_update_ev(ab, skb, reg_info);
+-+	if (id == WMI_REG_CHAN_LIST_CC_ID)
+-+		ret = ath11k_pull_reg_chan_list_update_ev(ab, skb, reg_info);
+-+	else
+-+		ret = ath11k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info);
+-+
+- 	if (ret) {
+- 		ath11k_warn(ab, "failed to extract regulatory info from received event\n");
+- 		goto fallback;
+-@@ -6623,6 +6998,14 @@ mem_free:
+- 	if (reg_info) {
+- 		kfree(reg_info->reg_rules_2ghz_ptr);
+- 		kfree(reg_info->reg_rules_5ghz_ptr);
+-+		if (reg_info->is_ext_reg_event) {
+-+			for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++)
+-+				kfree(reg_info->reg_rules_6ghz_ap_ptr[i]);
+-+
+-+			for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++)
+-+				for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++)
+-+					kfree(reg_info->reg_rules_6ghz_client_ptr[j][i]);
+-+		}
+- 		kfree(reg_info);
+- 	}
+- 	return ret;
+-@@ -8054,7 +8437,10 @@ static void ath11k_wmi_tlv_op_rx(struct
+- 		ath11k_service_ready_ext2_event(ab, skb);
+- 		break;
+- 	case WMI_REG_CHAN_LIST_CC_EVENTID:
+--		ath11k_reg_chan_list_event(ab, skb);
+-+		ath11k_reg_chan_list_event(ab, skb, WMI_REG_CHAN_LIST_CC_ID);
+-+		break;
+-+	case WMI_REG_CHAN_LIST_CC_EXT_EVENTID:
+-+		ath11k_reg_chan_list_event(ab, skb, WMI_REG_CHAN_LIST_CC_EXT_ID);
+- 		break;
+- 	case WMI_READY_EVENTID:
+- 		ath11k_ready_event(ab, skb);
+---- a/drivers/net/wireless/ath/ath11k/wmi.h
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.h
+-@@ -797,6 +797,7 @@ enum wmi_tlv_event_id {
+- 	WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC),
+- 	WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
+- 	WMI_11D_NEW_COUNTRY_EVENTID,
+-+	WMI_REG_CHAN_LIST_CC_EXT_EVENTID,
+- 	WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
+- 	WMI_NDP_INITIATOR_RSP_EVENTID,
+- 	WMI_NDP_RESPONDER_RSP_EVENTID,
+-@@ -1865,6 +1866,8 @@ enum wmi_tlv_tag {
+- 	WMI_TAG_PDEV_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
+- 	WMI_TAG_PDEV_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD,
+- 	WMI_TAG_PDEV_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
+-+	WMI_TAG_REGULATORY_RULE_EXT_STRUCT = 0x3A9,
+-+	WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT,
+- 	WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD = 0x3D8,
+- 	WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD,
+- 	WMI_TAG_MAX
+-@@ -2097,6 +2100,7 @@ enum wmi_tlv_service {
+- 
+- 	/* The second 128 bits */
+- 	WMI_MAX_EXT_SERVICE = 256,
+-+	WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281,
+- 	WMI_TLV_SERVICE_BIOS_SAR_SUPPORT = 326,
+- 
+- 	/* The third 128 bits */
+-@@ -2313,6 +2317,8 @@ struct wmi_init_cmd {
+- #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5)
+- #define WMI_RSRC_CFG_FLAG1_ACK_RSSI BIT(18)
+- 
+-+#define WMI_CFG_HOST_SERVICE_FLAG_REG_CC_EXT 4
+-+
+- struct wmi_resource_config {
+- 	u32 tlv_header;
+- 	u32 num_vdevs;
+-@@ -2372,6 +2378,15 @@ struct wmi_resource_config {
+- 	u32 sched_params;
+- 	u32 twt_ap_pdev_count;
+- 	u32 twt_ap_sta_count;
+-+	u32 max_nlo_ssids;
+-+	u32 num_pkt_filters;
+-+	u32 num_max_sta_vdevs;
+-+	u32 max_bssid_indicator;
+-+	u32 ul_resp_config;
+-+	u32 msdu_flow_override_config0;
+-+	u32 msdu_flow_override_config1;
+-+	u32 flags2;
+-+	u32 host_service_flags;
+- } __packed;
+- 
+- struct wmi_service_ready_event {
+-@@ -2854,6 +2869,8 @@ struct rx_reorder_queue_remove_params {
+- #define REG_RULE_MAX_BW				0x0000ffff
+- #define REG_RULE_REG_PWR			0x00ff0000
+- #define REG_RULE_ANT_GAIN			0xff000000
+-+#define REG_RULE_PSD_INFO			BIT(0)
+-+#define REG_RULE_PSD_EIRP			0xff0000
+- 
+- #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
+- #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
+-@@ -4049,6 +4066,7 @@ struct wmi_he_rate_set {
+- 
+- #define MAX_REG_RULES 10
+- #define REG_ALPHA2_LEN 2
+-+#define MAX_6GHZ_REG_RULES 5
+- 
+- enum wmi_start_event_param {
+- 	WMI_VDEV_START_RESP_EVENT = 0,
+-@@ -4079,16 +4097,6 @@ enum wmi_vdev_start_resp_status_code {
+- 	WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4,
+- };
+- 
+--;
+--enum cc_setting_code {
+--	REG_SET_CC_STATUS_PASS = 0,
+--	REG_CURRENT_ALPHA2_NOT_FOUND = 1,
+--	REG_INIT_ALPHA2_NOT_FOUND = 2,
+--	REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
+--	REG_SET_CC_STATUS_NO_MEMORY = 4,
+--	REG_SET_CC_STATUS_FAIL = 5,
+--};
+--
+- /* Regaulatory Rule Flags Passed by FW */
+- #define REGULATORY_CHAN_DISABLED     BIT(0)
+- #define REGULATORY_CHAN_NO_IR        BIT(1)
+-@@ -4102,13 +4110,72 @@ enum cc_setting_code {
+- #define REGULATORY_CHAN_NO_20MHZ     BIT(11)
+- #define REGULATORY_CHAN_NO_10MHZ     BIT(12)
+- 
+--enum {
+-+enum wmi_reg_chan_list_cmd_type {
+-+	WMI_REG_CHAN_LIST_CC_ID = 0,
+-+	WMI_REG_CHAN_LIST_CC_EXT_ID = 1,
+-+};
+-+
+-+enum wmi_reg_cc_setting_code {
+- 	WMI_REG_SET_CC_STATUS_PASS = 0,
+- 	WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1,
+- 	WMI_REG_INIT_ALPHA2_NOT_FOUND = 2,
+- 	WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
+- 	WMI_REG_SET_CC_STATUS_NO_MEMORY = 4,
+- 	WMI_REG_SET_CC_STATUS_FAIL = 5,
+-+
+-+	/* add new setting code above, update in
+-+	 * @enum cc_setting_code as well.
+-+	 * Also handle it in ath11k_wmi_cc_setting_code_to_reg()
+-+	 */
+-+};
+-+
+-+enum cc_setting_code {
+-+	REG_SET_CC_STATUS_PASS = 0,
+-+	REG_CURRENT_ALPHA2_NOT_FOUND = 1,
+-+	REG_INIT_ALPHA2_NOT_FOUND = 2,
+-+	REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
+-+	REG_SET_CC_STATUS_NO_MEMORY = 4,
+-+	REG_SET_CC_STATUS_FAIL = 5,
+-+
+-+	/* add new setting code above, update in
+-+	 * @enum wmi_reg_cc_setting_code as well.
+-+	 */
+-+};
+-+
+-+static inline enum cc_setting_code
+-+ath11k_wmi_cc_setting_code_to_reg(enum wmi_reg_cc_setting_code status_code)
+-+{
+-+	switch (status_code) {
+-+	case WMI_REG_SET_CC_STATUS_PASS:
+-+		return REG_SET_CC_STATUS_PASS;
+-+	case WMI_REG_CURRENT_ALPHA2_NOT_FOUND:
+-+		return REG_CURRENT_ALPHA2_NOT_FOUND;
+-+	case WMI_REG_INIT_ALPHA2_NOT_FOUND:
+-+		return REG_INIT_ALPHA2_NOT_FOUND;
+-+	case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED:
+-+		return REG_SET_CC_CHANGE_NOT_ALLOWED;
+-+	case WMI_REG_SET_CC_STATUS_NO_MEMORY:
+-+		return REG_SET_CC_STATUS_NO_MEMORY;
+-+	case WMI_REG_SET_CC_STATUS_FAIL:
+-+		return REG_SET_CC_STATUS_FAIL;
+-+	}
+-+
+-+	return REG_SET_CC_STATUS_FAIL;
+-+}
+-+
+-+enum wmi_reg_6ghz_ap_type {
+-+	WMI_REG_INDOOR_AP = 0,
+-+	WMI_REG_STANDARD_POWER_AP = 1,
+-+	WMI_REG_VERY_LOW_POWER_AP = 2,
+-+
+-+	WMI_REG_CURRENT_MAX_AP_TYPE,
+-+	WMI_REG_MAX_AP_TYPE = 7,
+-+};
+-+
+-+enum wmi_reg_6ghz_client_type {
+-+	WMI_REG_DEFAULT_CLIENT = 0,
+-+	WMI_REG_SUBORDINATE_CLIENT = 1,
+-+	WMI_REG_MAX_CLIENT_TYPE = 2,
+- };
+- 
+- struct cur_reg_rule {
+-@@ -4118,6 +4185,8 @@ struct cur_reg_rule {
+- 	u8 reg_power;
+- 	u8 ant_gain;
+- 	u16 flags;
+-+	bool psd_flag;
+-+	s8 psd_eirp;
+- };
+- 
+- struct cur_regulatory_info {
+-@@ -4137,6 +4206,22 @@ struct cur_regulatory_info {
+- 	u32 num_5ghz_reg_rules;
+- 	struct cur_reg_rule *reg_rules_2ghz_ptr;
+- 	struct cur_reg_rule *reg_rules_5ghz_ptr;
+-+	bool is_ext_reg_event;
+-+	enum wmi_reg_6ghz_client_type client_type;
+-+	bool rnr_tpe_usable;
+-+	bool unspecified_ap_usable;
+-+	u8 domain_code_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
+-+	u8 domain_code_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
+-+	u32 domain_code_6ghz_super_id;
+-+	u32 min_bw_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
+-+	u32 max_bw_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
+-+	u32 min_bw_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
+-+	u32 max_bw_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
+-+	u32 num_6ghz_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
+-+	u32 num_6ghz_rules_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
+-+	struct cur_reg_rule *reg_rules_6ghz_ap_ptr[WMI_REG_CURRENT_MAX_AP_TYPE];
+-+	struct cur_reg_rule *reg_rules_6ghz_client_ptr
+-+		[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
+- };
+- 
+- struct wmi_reg_chan_list_cc_event {
+-@@ -4163,6 +4248,61 @@ struct wmi_regulatory_rule_struct {
+- 	u32  flag_info;
+- };
+- 
+-+#define WMI_REG_CLIENT_MAX 4
+-+
+-+struct wmi_reg_chan_list_cc_ext_event {
+-+	u32 status_code;
+-+	u32 phy_id;
+-+	u32 alpha2;
+-+	u32 num_phy;
+-+	u32 country_id;
+-+	u32 domain_code;
+-+	u32 dfs_region;
+-+	u32 phybitmap;
+-+	u32 min_bw_2ghz;
+-+	u32 max_bw_2ghz;
+-+	u32 min_bw_5ghz;
+-+	u32 max_bw_5ghz;
+-+	u32 num_2ghz_reg_rules;
+-+	u32 num_5ghz_reg_rules;
+-+	u32 client_type;
+-+	u32 rnr_tpe_usable;
+-+	u32 unspecified_ap_usable;
+-+	u32 domain_code_6ghz_ap_lpi;
+-+	u32 domain_code_6ghz_ap_sp;
+-+	u32 domain_code_6ghz_ap_vlp;
+-+	u32 domain_code_6ghz_client_lpi[WMI_REG_CLIENT_MAX];
+-+	u32 domain_code_6ghz_client_sp[WMI_REG_CLIENT_MAX];
+-+	u32 domain_code_6ghz_client_vlp[WMI_REG_CLIENT_MAX];
+-+	u32 domain_code_6ghz_super_id;
+-+	u32 min_bw_6ghz_ap_sp;
+-+	u32 max_bw_6ghz_ap_sp;
+-+	u32 min_bw_6ghz_ap_lpi;
+-+	u32 max_bw_6ghz_ap_lpi;
+-+	u32 min_bw_6ghz_ap_vlp;
+-+	u32 max_bw_6ghz_ap_vlp;
+-+	u32 min_bw_6ghz_client_sp[WMI_REG_CLIENT_MAX];
+-+	u32 max_bw_6ghz_client_sp[WMI_REG_CLIENT_MAX];
+-+	u32 min_bw_6ghz_client_lpi[WMI_REG_CLIENT_MAX];
+-+	u32 max_bw_6ghz_client_lpi[WMI_REG_CLIENT_MAX];
+-+	u32 min_bw_6ghz_client_vlp[WMI_REG_CLIENT_MAX];
+-+	u32 max_bw_6ghz_client_vlp[WMI_REG_CLIENT_MAX];
+-+	u32 num_6ghz_reg_rules_ap_sp;
+-+	u32 num_6ghz_reg_rules_ap_lpi;
+-+	u32 num_6ghz_reg_rules_ap_vlp;
+-+	u32 num_6ghz_reg_rules_client_sp[WMI_REG_CLIENT_MAX];
+-+	u32 num_6ghz_reg_rules_client_lpi[WMI_REG_CLIENT_MAX];
+-+	u32 num_6ghz_reg_rules_client_vlp[WMI_REG_CLIENT_MAX];
+-+} __packed;
+-+
+-+struct wmi_regulatory_ext_rule {
+-+	u32 tlv_header;
+-+	u32 freq_info;
+-+	u32 bw_pwr_info;
+-+	u32 flag_info;
+-+	u32 psd_power_info;
+-+} __packed;
+-+
+- struct wmi_vdev_delete_resp_event {
+- 	u32 vdev_id;
+- } __packed;
+-@@ -5358,6 +5498,7 @@ struct target_resource_config {
+- 	u32 sched_params;
+- 	u32 twt_ap_pdev_count;
+- 	u32 twt_ap_sta_count;
+-+	u8 is_reg_cc_ext_event_supported;
+- };
+- 
+- enum wmi_debug_log_param {
+diff --git a/package/kernel/mac80211/patches/ath11k/0045-wifi-ath11k-add-debug-prints-in-regulatory-WMI-event.patch b/package/kernel/mac80211/patches/ath11k/0045-wifi-ath11k-add-debug-prints-in-regulatory-WMI-event.patch
+deleted file mode 100644
+index b88e51928f..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0045-wifi-ath11k-add-debug-prints-in-regulatory-WMI-event.patch
++++ /dev/null
+@@ -1,567 +0,0 @@
+-From e238e62ba8868a784e485eb94451c87cd1b85cee Mon Sep 17 00:00:00 2001
+-From: Aditya Kumar Singh <quic_adisi@quicinc.com>
+-Date: Wed, 1 Mar 2023 16:20:59 +0200
+-Subject: [PATCH] wifi: ath11k: add debug prints in regulatory WMI event
+- processing
+-
+-Add some more debug prints in processing regulatory WMI event in order to
+-increase more debuggability.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230110121024.14051-4-quic_adisi@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/reg.c |   2 +-
+- drivers/net/wireless/ath/ath11k/wmi.c | 207 ++++++++++++++++++--------
+- drivers/net/wireless/ath/ath11k/wmi.h | 142 ++++++++++++++++++
+- 3 files changed, 291 insertions(+), 60 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/reg.c
+-+++ b/drivers/net/wireless/ath/ath11k/reg.c
+-@@ -646,7 +646,7 @@ ath11k_reg_build_regd(struct ath11k_base
+- 	tmp_regd->dfs_region = ath11k_map_fw_dfs_region(reg_info->dfs_region);
+- 
+- 	ath11k_dbg(ab, ATH11K_DBG_REG,
+--		   "\r\nCountry %s, CFG Regdomain %s FW Regdomain %d, num_reg_rules %d\n",
+-+		   "Country %s, CFG Regdomain %s FW Regdomain %d, num_reg_rules %d\n",
+- 		   alpha2, ath11k_reg_get_regdom_str(tmp_regd->dfs_region),
+- 		   reg_info->dfs_region, num_rules);
+- 	/* Update reg_rules[] below. Firmware is expected to
+---- a/drivers/net/wireless/ath/ath11k/wmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
+-@@ -4925,6 +4925,26 @@ static int ath11k_pull_vdev_start_resp_t
+- 	return 0;
+- }
+- 
+-+static void ath11k_print_reg_rule(struct ath11k_base *ab, const char *band,
+-+				  u32 num_reg_rules,
+-+				  struct cur_reg_rule *reg_rule_ptr)
+-+{
+-+	struct cur_reg_rule *reg_rule = reg_rule_ptr;
+-+	u32 count;
+-+
+-+	ath11k_dbg(ab, ATH11K_DBG_WMI, "number of reg rules in %s band: %d\n",
+-+		   band, num_reg_rules);
+-+
+-+	for (count = 0; count < num_reg_rules; count++) {
+-+		ath11k_dbg(ab, ATH11K_DBG_WMI,
+-+			   "reg rule %d: (%d - %d @ %d) (%d, %d) (FLAGS %d)\n",
+-+			   count + 1, reg_rule->start_freq, reg_rule->end_freq,
+-+			   reg_rule->max_bw, reg_rule->ant_gain,
+-+			   reg_rule->reg_power, reg_rule->flags);
+-+		reg_rule++;
+-+	}
+-+}
+-+
+- static struct cur_reg_rule
+- *create_reg_rules_from_wmi(u32 num_reg_rules,
+- 			   struct wmi_regulatory_rule_struct *wmi_reg_rule)
+-@@ -5006,6 +5026,10 @@ static int ath11k_pull_reg_chan_list_upd
+- 	reg_info->ctry_code = chan_list_event_hdr->country_id;
+- 	reg_info->reg_dmn_pair = chan_list_event_hdr->domain_code;
+- 
+-+	ath11k_dbg(ab, ATH11K_DBG_WMI,
+-+		   "status_code %s",
+-+		   ath11k_cc_status_to_str(reg_info->status_code));
+-+
+- 	reg_info->status_code =
+- 		ath11k_wmi_cc_setting_code_to_reg(chan_list_event_hdr->status_code);
+- 
+-@@ -5020,13 +5044,13 @@ static int ath11k_pull_reg_chan_list_upd
+- 	num_5ghz_reg_rules = reg_info->num_5ghz_reg_rules;
+- 
+- 	ath11k_dbg(ab, ATH11K_DBG_WMI,
+--		   "%s:cc %s dsf %d BW: min_2ghz %d max_2ghz %d min_5ghz %d max_5ghz %d",
+--		   __func__, reg_info->alpha2, reg_info->dfs_region,
+-+		   "cc %s dsf %d BW: min_2ghz %d max_2ghz %d min_5ghz %d max_5ghz %d",
+-+		   reg_info->alpha2, reg_info->dfs_region,
+- 		   reg_info->min_bw_2ghz, reg_info->max_bw_2ghz,
+- 		   reg_info->min_bw_5ghz, reg_info->max_bw_5ghz);
+- 
+- 	ath11k_dbg(ab, ATH11K_DBG_WMI,
+--		   "%s: num_2ghz_reg_rules %d num_5ghz_reg_rules %d", __func__,
+-+		   "num_2ghz_reg_rules %d num_5ghz_reg_rules %d",
+- 		   num_2ghz_reg_rules, num_5ghz_reg_rules);
+- 
+- 	wmi_reg_rule =
+-@@ -5043,6 +5067,10 @@ static int ath11k_pull_reg_chan_list_upd
+- 			ath11k_warn(ab, "Unable to Allocate memory for 2 GHz rules\n");
+- 			return -ENOMEM;
+- 		}
+-+
+-+		ath11k_print_reg_rule(ab, "2 GHz",
+-+				      num_2ghz_reg_rules,
+-+				      reg_info->reg_rules_2ghz_ptr);
+- 	}
+- 
+- 	if (num_5ghz_reg_rules) {
+-@@ -5055,6 +5083,10 @@ static int ath11k_pull_reg_chan_list_upd
+- 			ath11k_warn(ab, "Unable to Allocate memory for 5 GHz rules\n");
+- 			return -ENOMEM;
+- 		}
+-+
+-+		ath11k_print_reg_rule(ab, "5 GHz",
+-+				      num_5ghz_reg_rules,
+-+				      reg_info->reg_rules_5ghz_ptr);
+- 	}
+- 
+- 	ath11k_dbg(ab, ATH11K_DBG_WMI, "processed regulatory channel list\n");
+-@@ -5128,7 +5160,7 @@ static int ath11k_pull_reg_chan_list_ext
+- 						   struct cur_regulatory_info *reg_info)
+- {
+- 	const void **tb;
+--	const struct wmi_reg_chan_list_cc_ext_event *ext_chan_list_event_hdr;
+-+	const struct wmi_reg_chan_list_cc_ext_event *ev;
+- 	struct wmi_regulatory_ext_rule *ext_wmi_reg_rule;
+- 	u32 num_2ghz_reg_rules, num_5ghz_reg_rules;
+- 	u32 num_6ghz_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
+-@@ -5145,31 +5177,29 @@ static int ath11k_pull_reg_chan_list_ext
+- 		return ret;
+- 	}
+- 
+--	ext_chan_list_event_hdr = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT];
+--	if (!ext_chan_list_event_hdr) {
+-+	ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT];
+-+	if (!ev) {
+- 		ath11k_warn(ab, "failed to fetch reg chan list ext update ev\n");
+- 		kfree(tb);
+- 		return -EPROTO;
+- 	}
+- 
+--	reg_info->num_2ghz_reg_rules =
+--			ext_chan_list_event_hdr->num_2ghz_reg_rules;
+--	reg_info->num_5ghz_reg_rules =
+--			ext_chan_list_event_hdr->num_5ghz_reg_rules;
+-+	reg_info->num_2ghz_reg_rules = ev->num_2ghz_reg_rules;
+-+	reg_info->num_5ghz_reg_rules = ev->num_5ghz_reg_rules;
+- 	reg_info->num_6ghz_rules_ap[WMI_REG_INDOOR_AP] =
+--			ext_chan_list_event_hdr->num_6ghz_reg_rules_ap_lpi;
+-+			ev->num_6ghz_reg_rules_ap_lpi;
+- 	reg_info->num_6ghz_rules_ap[WMI_REG_STANDARD_POWER_AP] =
+--			ext_chan_list_event_hdr->num_6ghz_reg_rules_ap_sp;
+-+			ev->num_6ghz_reg_rules_ap_sp;
+- 	reg_info->num_6ghz_rules_ap[WMI_REG_VERY_LOW_POWER_AP] =
+--			ext_chan_list_event_hdr->num_6ghz_reg_rules_ap_vlp;
+-+			ev->num_6ghz_reg_rules_ap_vlp;
+- 
+- 	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
+- 		reg_info->num_6ghz_rules_client[WMI_REG_INDOOR_AP][i] =
+--			ext_chan_list_event_hdr->num_6ghz_reg_rules_client_lpi[i];
+-+			ev->num_6ghz_reg_rules_client_lpi[i];
+- 		reg_info->num_6ghz_rules_client[WMI_REG_STANDARD_POWER_AP][i] =
+--			ext_chan_list_event_hdr->num_6ghz_reg_rules_client_sp[i];
+-+			ev->num_6ghz_reg_rules_client_sp[i];
+- 		reg_info->num_6ghz_rules_client[WMI_REG_VERY_LOW_POWER_AP][i] =
+--			ext_chan_list_event_hdr->num_6ghz_reg_rules_client_vlp[i];
+-+			ev->num_6ghz_reg_rules_client_vlp[i];
+- 	}
+- 
+- 	num_2ghz_reg_rules = reg_info->num_2ghz_reg_rules;
+-@@ -5231,57 +5261,79 @@ static int ath11k_pull_reg_chan_list_ext
+- 		return -EINVAL;
+- 	}
+- 
+--	memcpy(reg_info->alpha2, &ext_chan_list_event_hdr->alpha2,
+--	       REG_ALPHA2_LEN);
+-+	memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN);
+-+
+-+	reg_info->dfs_region = ev->dfs_region;
+-+	reg_info->phybitmap = ev->phybitmap;
+-+	reg_info->num_phy = ev->num_phy;
+-+	reg_info->phy_id = ev->phy_id;
+-+	reg_info->ctry_code = ev->country_id;
+-+	reg_info->reg_dmn_pair = ev->domain_code;
+- 
+--	reg_info->dfs_region = ext_chan_list_event_hdr->dfs_region;
+--	reg_info->phybitmap = ext_chan_list_event_hdr->phybitmap;
+--	reg_info->num_phy = ext_chan_list_event_hdr->num_phy;
+--	reg_info->phy_id = ext_chan_list_event_hdr->phy_id;
+--	reg_info->ctry_code = ext_chan_list_event_hdr->country_id;
+--	reg_info->reg_dmn_pair = ext_chan_list_event_hdr->domain_code;
+-+	ath11k_dbg(ab, ATH11K_DBG_WMI,
+-+		   "status_code %s",
+-+		   ath11k_cc_status_to_str(reg_info->status_code));
+- 
+- 	reg_info->status_code =
+--		ath11k_wmi_cc_setting_code_to_reg(ext_chan_list_event_hdr->status_code);
+-+		ath11k_wmi_cc_setting_code_to_reg(ev->status_code);
+- 
+- 	reg_info->is_ext_reg_event = true;
+- 
+--	reg_info->min_bw_2ghz = ext_chan_list_event_hdr->min_bw_2ghz;
+--	reg_info->max_bw_2ghz = ext_chan_list_event_hdr->max_bw_2ghz;
+--	reg_info->min_bw_5ghz = ext_chan_list_event_hdr->min_bw_5ghz;
+--	reg_info->max_bw_5ghz = ext_chan_list_event_hdr->max_bw_5ghz;
+-+	reg_info->min_bw_2ghz = ev->min_bw_2ghz;
+-+	reg_info->max_bw_2ghz = ev->max_bw_2ghz;
+-+	reg_info->min_bw_5ghz = ev->min_bw_5ghz;
+-+	reg_info->max_bw_5ghz = ev->max_bw_5ghz;
+- 
+- 	reg_info->min_bw_6ghz_ap[WMI_REG_INDOOR_AP] =
+--			ext_chan_list_event_hdr->min_bw_6ghz_ap_lpi;
+-+			ev->min_bw_6ghz_ap_lpi;
+- 	reg_info->max_bw_6ghz_ap[WMI_REG_INDOOR_AP] =
+--			 ext_chan_list_event_hdr->max_bw_6ghz_ap_lpi;
+-+			ev->max_bw_6ghz_ap_lpi;
+- 	reg_info->min_bw_6ghz_ap[WMI_REG_STANDARD_POWER_AP] =
+--			ext_chan_list_event_hdr->min_bw_6ghz_ap_sp;
+-+			ev->min_bw_6ghz_ap_sp;
+- 	reg_info->max_bw_6ghz_ap[WMI_REG_STANDARD_POWER_AP] =
+--			ext_chan_list_event_hdr->max_bw_6ghz_ap_sp;
+-+			ev->max_bw_6ghz_ap_sp;
+- 	reg_info->min_bw_6ghz_ap[WMI_REG_VERY_LOW_POWER_AP] =
+--			ext_chan_list_event_hdr->min_bw_6ghz_ap_vlp;
+-+			ev->min_bw_6ghz_ap_vlp;
+- 	reg_info->max_bw_6ghz_ap[WMI_REG_VERY_LOW_POWER_AP] =
+--			ext_chan_list_event_hdr->max_bw_6ghz_ap_vlp;
+-+			ev->max_bw_6ghz_ap_vlp;
+-+
+-+	ath11k_dbg(ab, ATH11K_DBG_WMI,
+-+		   "6 GHz AP BW: LPI (%d - %d), SP (%d - %d), VLP (%d - %d)\n",
+-+		   reg_info->min_bw_6ghz_ap[WMI_REG_INDOOR_AP],
+-+		   reg_info->max_bw_6ghz_ap[WMI_REG_INDOOR_AP],
+-+		   reg_info->min_bw_6ghz_ap[WMI_REG_STANDARD_POWER_AP],
+-+		   reg_info->max_bw_6ghz_ap[WMI_REG_STANDARD_POWER_AP],
+-+		   reg_info->min_bw_6ghz_ap[WMI_REG_VERY_LOW_POWER_AP],
+-+		   reg_info->max_bw_6ghz_ap[WMI_REG_VERY_LOW_POWER_AP]);
+- 
+- 	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
+- 		reg_info->min_bw_6ghz_client[WMI_REG_INDOOR_AP][i] =
+--				ext_chan_list_event_hdr->min_bw_6ghz_client_lpi[i];
+-+				ev->min_bw_6ghz_client_lpi[i];
+- 		reg_info->max_bw_6ghz_client[WMI_REG_INDOOR_AP][i] =
+--				ext_chan_list_event_hdr->max_bw_6ghz_client_lpi[i];
+-+				ev->max_bw_6ghz_client_lpi[i];
+- 		reg_info->min_bw_6ghz_client[WMI_REG_STANDARD_POWER_AP][i] =
+--				ext_chan_list_event_hdr->min_bw_6ghz_client_sp[i];
+-+				ev->min_bw_6ghz_client_sp[i];
+- 		reg_info->max_bw_6ghz_client[WMI_REG_STANDARD_POWER_AP][i] =
+--				ext_chan_list_event_hdr->max_bw_6ghz_client_sp[i];
+-+				ev->max_bw_6ghz_client_sp[i];
+- 		reg_info->min_bw_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i] =
+--				ext_chan_list_event_hdr->min_bw_6ghz_client_vlp[i];
+-+				ev->min_bw_6ghz_client_vlp[i];
+- 		reg_info->max_bw_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i] =
+--				ext_chan_list_event_hdr->max_bw_6ghz_client_vlp[i];
+-+				ev->max_bw_6ghz_client_vlp[i];
+-+
+-+		ath11k_dbg(ab, ATH11K_DBG_WMI,
+-+			   "6 GHz %s BW: LPI (%d - %d), SP (%d - %d), VLP (%d - %d)\n",
+-+			   ath11k_6ghz_client_type_to_str(i),
+-+			   reg_info->min_bw_6ghz_client[WMI_REG_INDOOR_AP][i],
+-+			   reg_info->max_bw_6ghz_client[WMI_REG_INDOOR_AP][i],
+-+			   reg_info->min_bw_6ghz_client[WMI_REG_STANDARD_POWER_AP][i],
+-+			   reg_info->max_bw_6ghz_client[WMI_REG_STANDARD_POWER_AP][i],
+-+			   reg_info->min_bw_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i],
+-+			   reg_info->max_bw_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i]);
+- 	}
+- 
+- 	ath11k_dbg(ab, ATH11K_DBG_WMI,
+--		   "%s:cc_ext %s dsf %d BW: min_2ghz %d max_2ghz %d min_5ghz %d max_5ghz %d",
+--		   __func__, reg_info->alpha2, reg_info->dfs_region,
+-+		   "cc_ext %s dsf %d BW: min_2ghz %d max_2ghz %d min_5ghz %d max_5ghz %d",
+-+		   reg_info->alpha2, reg_info->dfs_region,
+- 		   reg_info->min_bw_2ghz, reg_info->max_bw_2ghz,
+- 		   reg_info->min_bw_5ghz, reg_info->max_bw_5ghz);
+- 
+-@@ -5310,9 +5362,8 @@ static int ath11k_pull_reg_chan_list_ext
+- 		   num_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][j]);
+- 
+- 	ext_wmi_reg_rule =
+--		(struct wmi_regulatory_ext_rule *)((u8 *)ext_chan_list_event_hdr
+--						   + sizeof(*ext_chan_list_event_hdr)
+--						   + sizeof(struct wmi_tlv));
+-+		(struct wmi_regulatory_ext_rule *)((u8 *)ev + sizeof(*ev) +
+-+						   sizeof(struct wmi_tlv));
+- 	if (num_2ghz_reg_rules) {
+- 		reg_info->reg_rules_2ghz_ptr =
+- 			create_ext_reg_rules_from_wmi(num_2ghz_reg_rules,
+-@@ -5323,6 +5374,10 @@ static int ath11k_pull_reg_chan_list_ext
+- 			ath11k_warn(ab, "Unable to Allocate memory for 2 GHz rules\n");
+- 			return -ENOMEM;
+- 		}
+-+
+-+		ath11k_print_reg_rule(ab, "2 GHz",
+-+				      num_2ghz_reg_rules,
+-+				      reg_info->reg_rules_2ghz_ptr);
+- 	}
+- 
+- 	ext_wmi_reg_rule += num_2ghz_reg_rules;
+-@@ -5358,6 +5413,10 @@ static int ath11k_pull_reg_chan_list_ext
+- 			ath11k_warn(ab, "Unable to Allocate memory for 5 GHz rules\n");
+- 			return -ENOMEM;
+- 		}
+-+
+-+		ath11k_print_reg_rule(ab, "5 GHz",
+-+				      num_5ghz_reg_rules,
+-+				      reg_info->reg_rules_5ghz_ptr);
+- 	}
+- 
+- 	/* We have adjusted the number of 5 GHz reg rules above. But still those
+-@@ -5378,10 +5437,17 @@ static int ath11k_pull_reg_chan_list_ext
+- 			return -ENOMEM;
+- 		}
+- 
+-+		ath11k_print_reg_rule(ab, ath11k_6ghz_ap_type_to_str(i),
+-+				      num_6ghz_reg_rules_ap[i],
+-+				      reg_info->reg_rules_6ghz_ap_ptr[i]);
+-+
+- 		ext_wmi_reg_rule += num_6ghz_reg_rules_ap[i];
+- 	}
+- 
+- 	for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) {
+-+		ath11k_dbg(ab, ATH11K_DBG_WMI,
+-+			   "6 GHz AP type %s", ath11k_6ghz_ap_type_to_str(j));
+-+
+- 		for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
+- 			reg_info->reg_rules_6ghz_client_ptr[j][i] =
+- 				create_ext_reg_rules_from_wmi(num_6ghz_client[j][i],
+-@@ -5393,35 +5459,58 @@ static int ath11k_pull_reg_chan_list_ext
+- 				return -ENOMEM;
+- 			}
+- 
+-+			ath11k_print_reg_rule(ab,
+-+					      ath11k_6ghz_client_type_to_str(i),
+-+					      num_6ghz_client[j][i],
+-+					      reg_info->reg_rules_6ghz_client_ptr[j][i]);
+-+
+- 			ext_wmi_reg_rule += num_6ghz_client[j][i];
+- 		}
+- 	}
+- 
+--	reg_info->client_type = ext_chan_list_event_hdr->client_type;
+--	reg_info->rnr_tpe_usable = ext_chan_list_event_hdr->rnr_tpe_usable;
+-+	reg_info->client_type = ev->client_type;
+-+	reg_info->rnr_tpe_usable = ev->rnr_tpe_usable;
+- 	reg_info->unspecified_ap_usable =
+--			ext_chan_list_event_hdr->unspecified_ap_usable;
+-+			ev->unspecified_ap_usable;
+- 	reg_info->domain_code_6ghz_ap[WMI_REG_INDOOR_AP] =
+--			ext_chan_list_event_hdr->domain_code_6ghz_ap_lpi;
+-+			ev->domain_code_6ghz_ap_lpi;
+- 	reg_info->domain_code_6ghz_ap[WMI_REG_STANDARD_POWER_AP] =
+--			ext_chan_list_event_hdr->domain_code_6ghz_ap_sp;
+-+			ev->domain_code_6ghz_ap_sp;
+- 	reg_info->domain_code_6ghz_ap[WMI_REG_VERY_LOW_POWER_AP] =
+--			ext_chan_list_event_hdr->domain_code_6ghz_ap_vlp;
+-+			ev->domain_code_6ghz_ap_vlp;
+-+
+-+	ath11k_dbg(ab, ATH11K_DBG_WMI,
+-+		   "6 GHz reg info client type %s rnr_tpe_usable %d unspecified_ap_usable %d AP sub domain: lpi %s, sp %s, vlp %s\n",
+-+		   ath11k_6ghz_client_type_to_str(reg_info->client_type),
+-+		   reg_info->rnr_tpe_usable,
+-+		   reg_info->unspecified_ap_usable,
+-+		   ath11k_sub_reg_6ghz_to_str(ev->domain_code_6ghz_ap_lpi),
+-+		   ath11k_sub_reg_6ghz_to_str(ev->domain_code_6ghz_ap_sp),
+-+		   ath11k_sub_reg_6ghz_to_str(ev->domain_code_6ghz_ap_vlp));
+- 
+- 	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
+- 		reg_info->domain_code_6ghz_client[WMI_REG_INDOOR_AP][i] =
+--				ext_chan_list_event_hdr->domain_code_6ghz_client_lpi[i];
+-+				ev->domain_code_6ghz_client_lpi[i];
+- 		reg_info->domain_code_6ghz_client[WMI_REG_STANDARD_POWER_AP][i] =
+--				ext_chan_list_event_hdr->domain_code_6ghz_client_sp[i];
+-+				ev->domain_code_6ghz_client_sp[i];
+- 		reg_info->domain_code_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i] =
+--				ext_chan_list_event_hdr->domain_code_6ghz_client_vlp[i];
+-+				ev->domain_code_6ghz_client_vlp[i];
+-+
+-+		ath11k_dbg(ab, ATH11K_DBG_WMI,
+-+			   "6 GHz client type %s client sub domain: lpi %s, sp %s, vlp %s\n",
+-+			   ath11k_6ghz_client_type_to_str(i),
+-+			   ath11k_sub_reg_6ghz_to_str(ev->domain_code_6ghz_client_lpi[i]),
+-+			   ath11k_sub_reg_6ghz_to_str(ev->domain_code_6ghz_client_sp[i]),
+-+			   ath11k_sub_reg_6ghz_to_str(ev->domain_code_6ghz_client_vlp[i])
+-+			  );
+- 	}
+- 
+--	reg_info->domain_code_6ghz_super_id =
+--			ext_chan_list_event_hdr->domain_code_6ghz_super_id;
+-+	reg_info->domain_code_6ghz_super_id = ev->domain_code_6ghz_super_id;
+- 
+--	ath11k_dbg(ab, ATH11K_DBG_WMI, "6 GHz client_type: %d domain_code_6ghz_super_id: %d",
+--		   reg_info->client_type, reg_info->domain_code_6ghz_super_id);
+-+	ath11k_dbg(ab, ATH11K_DBG_WMI,
+-+		   "6 GHz client_type %s 6 GHz super domain %s",
+-+		   ath11k_6ghz_client_type_to_str(reg_info->client_type),
+-+		   ath11k_super_reg_6ghz_to_str(reg_info->domain_code_6ghz_super_id));
+- 
+- 	ath11k_dbg(ab, ATH11K_DBG_WMI, "processed regulatory ext channel list\n");
+- 
+---- a/drivers/net/wireless/ath/ath11k/wmi.h
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.h
+-@@ -4139,6 +4139,7 @@ enum cc_setting_code {
+- 
+- 	/* add new setting code above, update in
+- 	 * @enum wmi_reg_cc_setting_code as well.
+-+	 * Also handle it in ath11k_cc_status_to_str()
+- 	 */
+- };
+- 
+-@@ -4163,21 +4164,162 @@ ath11k_wmi_cc_setting_code_to_reg(enum w
+- 	return REG_SET_CC_STATUS_FAIL;
+- }
+- 
+-+static inline const char *ath11k_cc_status_to_str(enum cc_setting_code code)
+-+{
+-+	switch (code) {
+-+	case REG_SET_CC_STATUS_PASS:
+-+		return "REG_SET_CC_STATUS_PASS";
+-+	case REG_CURRENT_ALPHA2_NOT_FOUND:
+-+		return "REG_CURRENT_ALPHA2_NOT_FOUND";
+-+	case REG_INIT_ALPHA2_NOT_FOUND:
+-+		return "REG_INIT_ALPHA2_NOT_FOUND";
+-+	case REG_SET_CC_CHANGE_NOT_ALLOWED:
+-+		return "REG_SET_CC_CHANGE_NOT_ALLOWED";
+-+	case REG_SET_CC_STATUS_NO_MEMORY:
+-+		return "REG_SET_CC_STATUS_NO_MEMORY";
+-+	case REG_SET_CC_STATUS_FAIL:
+-+		return "REG_SET_CC_STATUS_FAIL";
+-+	}
+-+
+-+	return "Unknown CC status";
+-+}
+-+
+- enum wmi_reg_6ghz_ap_type {
+- 	WMI_REG_INDOOR_AP = 0,
+- 	WMI_REG_STANDARD_POWER_AP = 1,
+- 	WMI_REG_VERY_LOW_POWER_AP = 2,
+- 
+-+	/* add AP type above, handle in ath11k_6ghz_ap_type_to_str()
+-+	 */
+- 	WMI_REG_CURRENT_MAX_AP_TYPE,
+- 	WMI_REG_MAX_AP_TYPE = 7,
+- };
+- 
+-+static inline const char *
+-+ath11k_6ghz_ap_type_to_str(enum wmi_reg_6ghz_ap_type type)
+-+{
+-+	switch (type) {
+-+	case WMI_REG_INDOOR_AP:
+-+		return "INDOOR AP";
+-+	case WMI_REG_STANDARD_POWER_AP:
+-+		return "STANDARD POWER AP";
+-+	case WMI_REG_VERY_LOW_POWER_AP:
+-+		return "VERY LOW POWER AP";
+-+	case WMI_REG_CURRENT_MAX_AP_TYPE:
+-+		return "CURRENT_MAX_AP_TYPE";
+-+	case WMI_REG_MAX_AP_TYPE:
+-+		return "MAX_AP_TYPE";
+-+	}
+-+
+-+	return "unknown 6 GHz AP type";
+-+}
+-+
+- enum wmi_reg_6ghz_client_type {
+- 	WMI_REG_DEFAULT_CLIENT = 0,
+- 	WMI_REG_SUBORDINATE_CLIENT = 1,
+- 	WMI_REG_MAX_CLIENT_TYPE = 2,
+-+
+-+	/* add client type above, handle it in
+-+	 * ath11k_6ghz_client_type_to_str()
+-+	 */
+-+};
+-+
+-+static inline const char *
+-+ath11k_6ghz_client_type_to_str(enum wmi_reg_6ghz_client_type type)
+-+{
+-+	switch (type) {
+-+	case WMI_REG_DEFAULT_CLIENT:
+-+		return "DEFAULT CLIENT";
+-+	case WMI_REG_SUBORDINATE_CLIENT:
+-+		return "SUBORDINATE CLIENT";
+-+	case WMI_REG_MAX_CLIENT_TYPE:
+-+		return "MAX_CLIENT_TYPE";
+-+	}
+-+
+-+	return "unknown 6 GHz client type";
+-+}
+-+
+-+enum reg_subdomains_6ghz {
+-+	EMPTY_6GHZ = 0x0,
+-+	FCC1_CLIENT_LPI_REGULAR_6GHZ = 0x01,
+-+	FCC1_CLIENT_SP_6GHZ = 0x02,
+-+	FCC1_AP_LPI_6GHZ = 0x03,
+-+	FCC1_CLIENT_LPI_SUBORDINATE = FCC1_AP_LPI_6GHZ,
+-+	FCC1_AP_SP_6GHZ = 0x04,
+-+	ETSI1_LPI_6GHZ = 0x10,
+-+	ETSI1_VLP_6GHZ = 0x11,
+-+	ETSI2_LPI_6GHZ = 0x12,
+-+	ETSI2_VLP_6GHZ = 0x13,
+-+	APL1_LPI_6GHZ = 0x20,
+-+	APL1_VLP_6GHZ = 0x21,
+-+
+-+	/* add sub-domain above, handle it in
+-+	 * ath11k_sub_reg_6ghz_to_str()
+-+	 */
+-+};
+-+
+-+static inline const char *
+-+ath11k_sub_reg_6ghz_to_str(enum reg_subdomains_6ghz sub_id)
+-+{
+-+	switch (sub_id) {
+-+	case EMPTY_6GHZ:
+-+		return "N/A";
+-+	case FCC1_CLIENT_LPI_REGULAR_6GHZ:
+-+		return "FCC1_CLIENT_LPI_REGULAR_6GHZ";
+-+	case FCC1_CLIENT_SP_6GHZ:
+-+		return "FCC1_CLIENT_SP_6GHZ";
+-+	case FCC1_AP_LPI_6GHZ:
+-+		return "FCC1_AP_LPI_6GHZ/FCC1_CLIENT_LPI_SUBORDINATE";
+-+	case FCC1_AP_SP_6GHZ:
+-+		return "FCC1_AP_SP_6GHZ";
+-+	case ETSI1_LPI_6GHZ:
+-+		return "ETSI1_LPI_6GHZ";
+-+	case ETSI1_VLP_6GHZ:
+-+		return "ETSI1_VLP_6GHZ";
+-+	case ETSI2_LPI_6GHZ:
+-+		return "ETSI2_LPI_6GHZ";
+-+	case ETSI2_VLP_6GHZ:
+-+		return "ETSI2_VLP_6GHZ";
+-+	case APL1_LPI_6GHZ:
+-+		return "APL1_LPI_6GHZ";
+-+	case APL1_VLP_6GHZ:
+-+		return "APL1_VLP_6GHZ";
+-+	}
+-+
+-+	return "unknown sub reg id";
+-+}
+-+
+-+enum reg_super_domain_6ghz {
+-+	FCC1_6GHZ = 0x01,
+-+	ETSI1_6GHZ = 0x02,
+-+	ETSI2_6GHZ = 0x03,
+-+	APL1_6GHZ = 0x04,
+-+	FCC1_6GHZ_CL = 0x05,
+-+
+-+	/* add super domain above, handle it in
+-+	 * ath11k_super_reg_6ghz_to_str()
+-+	 */
+- };
+- 
+-+static inline const char *
+-+ath11k_super_reg_6ghz_to_str(enum reg_super_domain_6ghz domain_id)
+-+{
+-+	switch (domain_id) {
+-+	case FCC1_6GHZ:
+-+		return "FCC1_6GHZ";
+-+	case ETSI1_6GHZ:
+-+		return "ETSI1_6GHZ";
+-+	case ETSI2_6GHZ:
+-+		return "ETSI2_6GHZ";
+-+	case APL1_6GHZ:
+-+		return "APL1_6GHZ";
+-+	case FCC1_6GHZ_CL:
+-+		return "FCC1_6GHZ_CL";
+-+	}
+-+
+-+	return "unknown domain id";
+-+}
+-+
+- struct cur_reg_rule {
+- 	u16 start_freq;
+- 	u16 end_freq;
+diff --git a/package/kernel/mac80211/patches/ath11k/0046-wifi-ath11k-Replace-fake-flex-array-with-flexible-ar.patch b/package/kernel/mac80211/patches/ath11k/0046-wifi-ath11k-Replace-fake-flex-array-with-flexible-ar.patch
+deleted file mode 100644
+index bd16178564..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0046-wifi-ath11k-Replace-fake-flex-array-with-flexible-ar.patch
++++ /dev/null
+@@ -1,246 +0,0 @@
+-From 3b1088a09ec9438523c251d8435e78988824bc0d Mon Sep 17 00:00:00 2001
+-From: "Gustavo A. R. Silva" <gustavoars@kernel.org>
+-Date: Tue, 7 Mar 2023 16:22:39 -0600
+-Subject: [PATCH] wifi: ath11k: Replace fake flex-array with flexible-array
+- member
+-MIME-Version: 1.0
+-Content-Type: text/plain; charset=UTF-8
+-Content-Transfer-Encoding: 8bit
+-
+-Zero-length arrays as fake flexible arrays are deprecated and we are
+-moving towards adopting C99 flexible-array members instead.
+-
+-Address 25 of the following warnings found with GCC-13 and
+--fstrict-flex-arrays=3 enabled:
+-drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c:30:51: warning: array subscript <unknown> is outside array bounds of ‘const u32[0]’ {aka ‘const unsigned int[]’} [-Warray-bounds=]
+-
+-This helps with the ongoing efforts to tighten the FORTIFY_SOURCE
+-routines on memcpy() and help us make progress towards globally
+-enabling -fstrict-flex-arrays=3 [1].
+-
+-Link: https://github.com/KSPP/linux/issues/21
+-Link: https://github.com/KSPP/linux/issues/266
+-Link: https://gcc.gnu.org/pipermail/gcc-patches/2022-October/602902.html [1]
+-Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
+-Reviewed-by: Simon Horman <simon.horman@corigine.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/ZAe5L5DtmsQxzqRH@work
+----
+- .../wireless/ath/ath11k/debugfs_htt_stats.h   | 73 +++++++++++--------
+- 1 file changed, 43 insertions(+), 30 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.h
+-+++ b/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.h
+-@@ -143,7 +143,8 @@ enum htt_tx_pdev_underrun_enum {
+- /* Bytes stored in little endian order */
+- /* Length should be multiple of DWORD */
+- struct htt_stats_string_tlv {
+--	u32 data[0]; /* Can be variable length */
+-+	 /* Can be variable length */
+-+	DECLARE_FLEX_ARRAY(u32, data);
+- } __packed;
+- 
+- #define HTT_STATS_MAC_ID	GENMASK(7, 0)
+-@@ -205,27 +206,32 @@ struct htt_tx_pdev_stats_cmn_tlv {
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_tx_pdev_stats_urrn_tlv_v {
+--	u32 urrn_stats[0]; /* HTT_TX_PDEV_MAX_URRN_STATS */
+-+	/* HTT_TX_PDEV_MAX_URRN_STATS */
+-+	DECLARE_FLEX_ARRAY(u32, urrn_stats);
+- };
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_tx_pdev_stats_flush_tlv_v {
+--	u32 flush_errs[0]; /* HTT_TX_PDEV_MAX_FLUSH_REASON_STATS */
+-+	/* HTT_TX_PDEV_MAX_FLUSH_REASON_STATS */
+-+	DECLARE_FLEX_ARRAY(u32, flush_errs);
+- };
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_tx_pdev_stats_sifs_tlv_v {
+--	u32 sifs_status[0]; /* HTT_TX_PDEV_MAX_SIFS_BURST_STATS */
+-+	/* HTT_TX_PDEV_MAX_SIFS_BURST_STATS */
+-+	DECLARE_FLEX_ARRAY(u32, sifs_status);
+- };
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_tx_pdev_stats_phy_err_tlv_v {
+--	u32  phy_errs[0]; /* HTT_TX_PDEV_MAX_PHY_ERR_STATS */
+-+	/* HTT_TX_PDEV_MAX_PHY_ERR_STATS */
+-+	DECLARE_FLEX_ARRAY(u32, phy_errs);
+- };
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_tx_pdev_stats_sifs_hist_tlv_v {
+--	u32 sifs_hist_status[0]; /* HTT_TX_PDEV_SIFS_BURST_HIST_STATS */
+-+	/* HTT_TX_PDEV_SIFS_BURST_HIST_STATS */
+-+	DECLARE_FLEX_ARRAY(u32, sifs_hist_status);
+- };
+- 
+- struct htt_tx_pdev_stats_tx_ppdu_stats_tlv_v {
+-@@ -590,20 +596,20 @@ struct htt_tx_hwq_difs_latency_stats_tlv
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_tx_hwq_cmd_result_stats_tlv_v {
+--	/* Histogram of sched cmd result */
+--	u32 cmd_result[0]; /* HTT_TX_HWQ_MAX_CMD_RESULT_STATS */
+-+	/* Histogram of sched cmd result, HTT_TX_HWQ_MAX_CMD_RESULT_STATS */
+-+	DECLARE_FLEX_ARRAY(u32, cmd_result);
+- };
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_tx_hwq_cmd_stall_stats_tlv_v {
+--	/* Histogram of various pause conitions */
+--	u32 cmd_stall_status[0]; /* HTT_TX_HWQ_MAX_CMD_STALL_STATS */
+-+	/* Histogram of various pause conitions, HTT_TX_HWQ_MAX_CMD_STALL_STATS */
+-+	DECLARE_FLEX_ARRAY(u32, cmd_stall_status);
+- };
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_tx_hwq_fes_result_stats_tlv_v {
+--	/* Histogram of number of user fes result */
+--	u32 fes_result[0]; /* HTT_TX_HWQ_MAX_FES_RESULT_STATS */
+-+	/* Histogram of number of user fes result, HTT_TX_HWQ_MAX_FES_RESULT_STATS */
+-+	DECLARE_FLEX_ARRAY(u32, fes_result);
+- };
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size
+-@@ -635,8 +641,8 @@ struct htt_tx_hwq_tried_mpdu_cnt_hist_tl
+-  * #define WAL_TXOP_USED_HISTOGRAM_INTERVAL 1000 ( 1 ms )
+-  */
+- struct htt_tx_hwq_txop_used_cnt_hist_tlv_v {
+--	/* Histogram of txop used cnt */
+--	u32 txop_used_cnt_hist[0]; /* HTT_TX_HWQ_TXOP_USED_CNT_HIST */
+-+	/* Histogram of txop used cnt,  HTT_TX_HWQ_TXOP_USED_CNT_HIST */
+-+	DECLARE_FLEX_ARRAY(u32, txop_used_cnt_hist);
+- };
+- 
+- /* == TX SELFGEN STATS == */
+-@@ -804,17 +810,20 @@ struct htt_tx_pdev_mpdu_stats_tlv {
+- /* == TX SCHED STATS == */
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_sched_txq_cmd_posted_tlv_v {
+--	u32 sched_cmd_posted[0]; /* HTT_TX_PDEV_SCHED_TX_MODE_MAX */
+-+	/* HTT_TX_PDEV_SCHED_TX_MODE_MAX */
+-+	DECLARE_FLEX_ARRAY(u32, sched_cmd_posted);
+- };
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_sched_txq_cmd_reaped_tlv_v {
+--	u32 sched_cmd_reaped[0]; /* HTT_TX_PDEV_SCHED_TX_MODE_MAX */
+-+	/* HTT_TX_PDEV_SCHED_TX_MODE_MAX */
+-+	DECLARE_FLEX_ARRAY(u32, sched_cmd_reaped);
+- };
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_sched_txq_sched_order_su_tlv_v {
+--	u32 sched_order_su[0]; /* HTT_TX_PDEV_NUM_SCHED_ORDER_LOG */
+-+	/* HTT_TX_PDEV_NUM_SCHED_ORDER_LOG */
+-+	DECLARE_FLEX_ARRAY(u32, sched_order_su);
+- };
+- 
+- enum htt_sched_txq_sched_ineligibility_tlv_enum {
+-@@ -842,7 +851,7 @@ enum htt_sched_txq_sched_ineligibility_t
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_sched_txq_sched_ineligibility_tlv_v {
+- 	/* indexed by htt_sched_txq_sched_ineligibility_tlv_enum */
+--	u32 sched_ineligibility[0];
+-+	DECLARE_FLEX_ARRAY(u32, sched_ineligibility);
+- };
+- 
+- #define	HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID	GENMASK(7, 0)
+-@@ -888,18 +897,20 @@ struct htt_stats_tx_sched_cmn_tlv {
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_tx_tqm_gen_mpdu_stats_tlv_v {
+--	u32 gen_mpdu_end_reason[0]; /* HTT_TX_TQM_MAX_GEN_MPDU_END_REASON */
+-+	/* HTT_TX_TQM_MAX_GEN_MPDU_END_REASON */
+-+	DECLARE_FLEX_ARRAY(u32, gen_mpdu_end_reason);
+- };
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_tx_tqm_list_mpdu_stats_tlv_v {
+--	u32 list_mpdu_end_reason[0]; /* HTT_TX_TQM_MAX_LIST_MPDU_END_REASON */
+-+	 /* HTT_TX_TQM_MAX_LIST_MPDU_END_REASON */
+-+	DECLARE_FLEX_ARRAY(u32, list_mpdu_end_reason);
+- };
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_tx_tqm_list_mpdu_cnt_tlv_v {
+--	u32 list_mpdu_cnt_hist[0];
+--			/* HTT_TX_TQM_MAX_LIST_MPDU_CNT_HISTOGRAM_BINS */
+-+	/* HTT_TX_TQM_MAX_LIST_MPDU_CNT_HISTOGRAM_BINS */
+-+	DECLARE_FLEX_ARRAY(u32, list_mpdu_cnt_hist);
+- };
+- 
+- struct htt_tx_tqm_pdev_stats_tlv_v {
+-@@ -1098,7 +1109,7 @@ struct htt_tx_de_compl_stats_tlv {
+-  *                               ENTRIES_PER_BIN_COUNT)
+-  */
+- struct htt_tx_de_fw2wbm_ring_full_hist_tlv {
+--	u32 fw2wbm_ring_full_hist[0];
+-+	DECLARE_FLEX_ARRAY(u32, fw2wbm_ring_full_hist);
+- };
+- 
+- struct htt_tx_de_cmn_stats_tlv {
+-@@ -1151,7 +1162,7 @@ struct htt_ring_if_cmn_tlv {
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_sfm_client_user_tlv_v {
+- 	/* Number of DWORDS used per user and per client */
+--	u32 dwords_used_by_user_n[0];
+-+	DECLARE_FLEX_ARRAY(u32, dwords_used_by_user_n);
+- };
+- 
+- struct htt_sfm_client_tlv {
+-@@ -1436,12 +1447,14 @@ struct htt_rx_soc_fw_stats_tlv {
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_rx_soc_fw_refill_ring_empty_tlv_v {
+--	u32 refill_ring_empty_cnt[0]; /* HTT_RX_STATS_REFILL_MAX_RING */
+-+	/* HTT_RX_STATS_REFILL_MAX_RING */
+-+	DECLARE_FLEX_ARRAY(u32, refill_ring_empty_cnt);
+- };
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_rx_soc_fw_refill_ring_num_refill_tlv_v {
+--	u32 refill_ring_num_refill[0]; /* HTT_RX_STATS_REFILL_MAX_RING */
+-+	/* HTT_RX_STATS_REFILL_MAX_RING */
+-+	DECLARE_FLEX_ARRAY(u32, refill_ring_num_refill);
+- };
+- 
+- /* RXDMA error code from WBM released packets */
+-@@ -1473,7 +1486,7 @@ enum htt_rx_rxdma_error_code_enum {
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_rx_soc_fw_refill_ring_num_rxdma_err_tlv_v {
+--	u32 rxdma_err[0]; /* HTT_RX_RXDMA_MAX_ERR_CODE */
+-+	DECLARE_FLEX_ARRAY(u32, rxdma_err); /* HTT_RX_RXDMA_MAX_ERR_CODE */
+- };
+- 
+- /* REO error code from WBM released packets */
+-@@ -1505,7 +1518,7 @@ enum htt_rx_reo_error_code_enum {
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_rx_soc_fw_refill_ring_num_reo_err_tlv_v {
+--	u32 reo_err[0]; /* HTT_RX_REO_MAX_ERR_CODE */
+-+	DECLARE_FLEX_ARRAY(u32, reo_err); /* HTT_RX_REO_MAX_ERR_CODE */
+- };
+- 
+- /* == RX PDEV STATS == */
+-@@ -1622,13 +1635,13 @@ struct htt_rx_pdev_fw_stats_phy_err_tlv
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_rx_pdev_fw_ring_mpdu_err_tlv_v {
+- 	/* Num error MPDU for each RxDMA error type  */
+--	u32 fw_ring_mpdu_err[0]; /* HTT_RX_STATS_RXDMA_MAX_ERR */
+-+	DECLARE_FLEX_ARRAY(u32, fw_ring_mpdu_err); /* HTT_RX_STATS_RXDMA_MAX_ERR */
+- };
+- 
+- /* NOTE: Variable length TLV, use length spec to infer array size */
+- struct htt_rx_pdev_fw_mpdu_drop_tlv_v {
+- 	/* Num MPDU dropped  */
+--	u32 fw_mpdu_drop[0]; /* HTT_RX_STATS_FW_DROP_REASON_MAX */
+-+	DECLARE_FLEX_ARRAY(u32, fw_mpdu_drop); /* HTT_RX_STATS_FW_DROP_REASON_MAX */
+- };
+- 
+- #define HTT_PDEV_CCA_STATS_TX_FRAME_INFO_PRESENT               (0x1)
+diff --git a/package/kernel/mac80211/patches/ath11k/0047-wifi-ath11k-fix-deinitialization-of-firmware-resourc.patch b/package/kernel/mac80211/patches/ath11k/0047-wifi-ath11k-fix-deinitialization-of-firmware-resourc.patch
+deleted file mode 100644
+index eec11f50e3..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0047-wifi-ath11k-fix-deinitialization-of-firmware-resourc.patch
++++ /dev/null
+@@ -1,79 +0,0 @@
+-From 5a78ac33e3cb8822da64dd1af196e83664b332b0 Mon Sep 17 00:00:00 2001
+-From: Aditya Kumar Singh <quic_adisi@quicinc.com>
+-Date: Thu, 9 Mar 2023 15:23:08 +0530
+-Subject: [PATCH] wifi: ath11k: fix deinitialization of firmware resources
+-
+-Currently, in ath11k_ahb_fw_resources_init(), iommu domain
+-mapping is done only for the chipsets having fixed firmware
+-memory. Also, for such chipsets, mapping is done only if it
+-does not have TrustZone support.
+-
+-During deinitialization, only if TrustZone support is not there,
+-iommu is unmapped back. However, for non fixed firmware memory
+-chipsets, TrustZone support is not there and this makes the
+-condition check to true and it tries to unmap the memory which
+-was not mapped during initialization.
+-
+-This leads to the following trace -
+-
+-[   83.198790] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000008
+-[   83.259537] Modules linked in: ath11k_ahb ath11k qmi_helpers
+-.. snip ..
+-[   83.280286] pstate: 20000005 (nzCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
+-[   83.287228] pc : __iommu_unmap+0x30/0x140
+-[   83.293907] lr : iommu_unmap+0x5c/0xa4
+-[   83.298072] sp : ffff80000b3abad0
+-.. snip ..
+-[   83.369175] Call trace:
+-[   83.376282]  __iommu_unmap+0x30/0x140
+-[   83.378541]  iommu_unmap+0x5c/0xa4
+-[   83.382360]  ath11k_ahb_fw_resource_deinit.part.12+0x2c/0xac [ath11k_ahb]
+-[   83.385666]  ath11k_ahb_free_resources+0x140/0x17c [ath11k_ahb]
+-[   83.392521]  ath11k_ahb_shutdown+0x34/0x40 [ath11k_ahb]
+-[   83.398248]  platform_shutdown+0x20/0x2c
+-[   83.403455]  device_shutdown+0x16c/0x1c4
+-[   83.407621]  kernel_restart_prepare+0x34/0x3c
+-[   83.411529]  kernel_restart+0x14/0x74
+-[   83.415781]  __do_sys_reboot+0x1c4/0x22c
+-[   83.419427]  __arm64_sys_reboot+0x1c/0x24
+-[   83.423420]  invoke_syscall+0x44/0xfc
+-[   83.427326]  el0_svc_common.constprop.3+0xac/0xe8
+-[   83.430974]  do_el0_svc+0xa0/0xa8
+-[   83.435659]  el0_svc+0x1c/0x44
+-[   83.438957]  el0t_64_sync_handler+0x60/0x144
+-[   83.441910]  el0t_64_sync+0x15c/0x160
+-[   83.446343] Code: aa0103f4 f9400001 f90027a1 d2800001 (f94006a0)
+-[   83.449903] ---[ end trace 0000000000000000 ]---
+-
+-This can be reproduced by probing an AHB chipset which is not
+-having a fixed memory region. During reboot (or rmmod) trace
+-can be seen.
+-
+-Fix this issue by adding a condition check on firmware fixed memory
+-hw_param as done in the counter initialization function.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Fixes: f9eec4947add ("ath11k: Add support for targets without trustzone")
+-Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230309095308.24937-1-quic_adisi@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/ahb.c | 6 ++++++
+- 1 file changed, 6 insertions(+)
+-
+---- a/drivers/net/wireless/ath/ath11k/ahb.c
+-+++ b/drivers/net/wireless/ath/ath11k/ahb.c
+-@@ -1078,6 +1078,12 @@ static int ath11k_ahb_fw_resource_deinit
+- 	struct iommu_domain *iommu;
+- 	size_t unmapped_size;
+- 
+-+	/* Chipsets not requiring MSA would have not initialized
+-+	 * MSA resources, return success in such cases.
+-+	 */
+-+	if (!ab->hw_params.fixed_fw_mem)
+-+		return 0;
+-+
+- 	if (ab_ahb->fw.use_tz)
+- 		return 0;
+- 
+diff --git a/package/kernel/mac80211/patches/ath11k/0048-wifi-ath11k-fix-BUFFER_DONE-read-on-monitor-ring-rx-.patch b/package/kernel/mac80211/patches/ath11k/0048-wifi-ath11k-fix-BUFFER_DONE-read-on-monitor-ring-rx-.patch
+deleted file mode 100644
+index 3e22645331..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0048-wifi-ath11k-fix-BUFFER_DONE-read-on-monitor-ring-rx-.patch
++++ /dev/null
+@@ -1,130 +0,0 @@
+-From 68e93ac5a31d4975b25f819b2dfe914c72abc3bb Mon Sep 17 00:00:00 2001
+-From: Harshitha Prem <quic_hprem@quicinc.com>
+-Date: Wed, 15 Mar 2023 12:24:43 +0200
+-Subject: [PATCH] wifi: ath11k: fix BUFFER_DONE read on monitor ring rx  buffer
+-
+-Perform dma_sync_single_for_cpu() on monitor ring rx buffer before
+-reading BUFFER_DONE tag and do dma_unmap_single() only after device
+-had set BUFFER_DONE tag to the buffer.
+-
+-Also when BUFFER_DONE tag is not set, allow the buffer to get read
+-next time without freeing skb.
+-
+-This helps to fix AP+Monitor VAP with flood traffic scenario to see
+-monitor ring rx buffer overrun missing BUFFER_DONE tag to be set.
+-
+-Also remove redundant rx dma buf free performed on DP
+-rx_mon_status_refill_ring.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Sathishkumar Muruganandam <quic_murugana@quicinc.com>
+-Signed-off-by: Harshitha Prem <quic_hprem@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230309164434.32660-1-quic_hprem@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/dp_rx.c | 57 ++++++++++---------------
+- 1 file changed, 23 insertions(+), 34 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/dp_rx.c
+-+++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
+-@@ -435,7 +435,6 @@ fail_free_skb:
+- static int ath11k_dp_rxdma_buf_ring_free(struct ath11k *ar,
+- 					 struct dp_rxdma_ring *rx_ring)
+- {
+--	struct ath11k_pdev_dp *dp = &ar->dp;
+- 	struct sk_buff *skb;
+- 	int buf_id;
+- 
+-@@ -453,28 +452,6 @@ static int ath11k_dp_rxdma_buf_ring_free
+- 	idr_destroy(&rx_ring->bufs_idr);
+- 	spin_unlock_bh(&rx_ring->idr_lock);
+- 
+--	/* if rxdma1_enable is false, mon_status_refill_ring
+--	 * isn't setup, so don't clean.
+--	 */
+--	if (!ar->ab->hw_params.rxdma1_enable)
+--		return 0;
+--
+--	rx_ring = &dp->rx_mon_status_refill_ring[0];
+--
+--	spin_lock_bh(&rx_ring->idr_lock);
+--	idr_for_each_entry(&rx_ring->bufs_idr, skb, buf_id) {
+--		idr_remove(&rx_ring->bufs_idr, buf_id);
+--		/* XXX: Understand where internal driver does this dma_unmap
+--		 * of rxdma_buffer.
+--		 */
+--		dma_unmap_single(ar->ab->dev, ATH11K_SKB_RXCB(skb)->paddr,
+--				 skb->len + skb_tailroom(skb), DMA_BIDIRECTIONAL);
+--		dev_kfree_skb_any(skb);
+--	}
+--
+--	idr_destroy(&rx_ring->bufs_idr);
+--	spin_unlock_bh(&rx_ring->idr_lock);
+--
+- 	return 0;
+- }
+- 
+-@@ -3029,39 +3006,51 @@ static int ath11k_dp_rx_reap_mon_status_
+- 
+- 			spin_lock_bh(&rx_ring->idr_lock);
+- 			skb = idr_find(&rx_ring->bufs_idr, buf_id);
+-+			spin_unlock_bh(&rx_ring->idr_lock);
+-+
+- 			if (!skb) {
+- 				ath11k_warn(ab, "rx monitor status with invalid buf_id %d\n",
+- 					    buf_id);
+--				spin_unlock_bh(&rx_ring->idr_lock);
+- 				pmon->buf_state = DP_MON_STATUS_REPLINISH;
+- 				goto move_next;
+- 			}
+- 
+--			idr_remove(&rx_ring->bufs_idr, buf_id);
+--			spin_unlock_bh(&rx_ring->idr_lock);
+--
+- 			rxcb = ATH11K_SKB_RXCB(skb);
+- 
+--			dma_unmap_single(ab->dev, rxcb->paddr,
+--					 skb->len + skb_tailroom(skb),
+--					 DMA_FROM_DEVICE);
+-+			dma_sync_single_for_cpu(ab->dev, rxcb->paddr,
+-+						skb->len + skb_tailroom(skb),
+-+						DMA_FROM_DEVICE);
+- 
+- 			tlv = (struct hal_tlv_hdr *)skb->data;
+- 			if (FIELD_GET(HAL_TLV_HDR_TAG, tlv->tl) !=
+- 					HAL_RX_STATUS_BUFFER_DONE) {
+--				ath11k_warn(ab, "mon status DONE not set %lx\n",
+-+				ath11k_warn(ab, "mon status DONE not set %lx, buf_id %d\n",
+- 					    FIELD_GET(HAL_TLV_HDR_TAG,
+--						      tlv->tl));
+--				dev_kfree_skb_any(skb);
+-+						      tlv->tl), buf_id);
+-+				/* If done status is missing, hold onto status
+-+				 * ring until status is done for this status
+-+				 * ring buffer.
+-+				 * Keep HP in mon_status_ring unchanged,
+-+				 * and break from here.
+-+				 * Check status for same buffer for next time
+-+				 */
+- 				pmon->buf_state = DP_MON_STATUS_NO_DMA;
+--				goto move_next;
+-+				break;
+- 			}
+- 
+-+			spin_lock_bh(&rx_ring->idr_lock);
+-+			idr_remove(&rx_ring->bufs_idr, buf_id);
+-+			spin_unlock_bh(&rx_ring->idr_lock);
+- 			if (ab->hw_params.full_monitor_mode) {
+- 				ath11k_dp_rx_mon_update_status_buf_state(pmon, tlv);
+- 				if (paddr == pmon->mon_status_paddr)
+- 					pmon->buf_state = DP_MON_STATUS_MATCH;
+- 			}
+-+
+-+			dma_unmap_single(ab->dev, rxcb->paddr,
+-+					 skb->len + skb_tailroom(skb),
+-+					 DMA_FROM_DEVICE);
+-+
+- 			__skb_queue_tail(skb_list, skb);
+- 		} else {
+- 			pmon->buf_state = DP_MON_STATUS_REPLINISH;
+diff --git a/package/kernel/mac80211/patches/ath11k/0049-wifi-ath11k-Optimize-6-GHz-scan-time.patch b/package/kernel/mac80211/patches/ath11k/0049-wifi-ath11k-Optimize-6-GHz-scan-time.patch
+deleted file mode 100644
+index f468990feb..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0049-wifi-ath11k-Optimize-6-GHz-scan-time.patch
++++ /dev/null
+@@ -1,101 +0,0 @@
+-From 8b4d2f080afbd4280ecca0f4b3ceea943a7a86d0 Mon Sep 17 00:00:00 2001
+-From: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
+-Date: Thu, 23 Mar 2023 11:39:13 +0530
+-Subject: [PATCH] wifi: ath11k: Optimize 6 GHz scan time
+-
+-Currently, time taken to scan all supported channels on WCN6750
+-is ~8 seconds and connection time is almost 10 seconds. WCN6750
+-supports three Wi-Fi bands (i.e., 2.4/5/6 GHz) and the numbers of
+-channels for scan come around ~100 channels (default case).
+-Since the chip doesn't have support for DBS (Dual Band Simultaneous),
+-scans cannot be parallelized resulting in longer scan times.
+-
+-Among the 100 odd channels, ~60 channels are in 6 GHz band. Therefore,
+-optimizing the scan for 6 GHz channels will bring down the overall
+-scan time.
+-
+-WCN6750 firmware has support to scan a 6 GHz channel based on co-located
+-AP information i.e., RNR IE which is found in the legacy 2.4/5 GHz scan
+-results. When a scan request with all supported channel list is enqueued
+-to the firmware, then based on WMI_SCAN_CHAN_FLAG_SCAN_ONLY_IF_RNR_FOUND
+-scan channel flag, firmware will scan only those 6 GHz channels for which
+-RNR IEs are found in the legacy scan results.
+-
+-In the proposed design, based on NL80211_SCAN_FLAG_COLOCATED_6GHZ scan
+-flag, driver will set the WMI_SCAN_CHAN_FLAG_SCAN_ONLY_IF_RNR_FOUND flag
+-for non-PSC channels. Since there is high probability to find 6 GHz APs
+-on PSC channels, these channels are always scanned. Only non-PSC channels
+-are selectively scanned based on cached RNR information from the legacy
+-scan results.
+-
+-If NL80211_SCAN_FLAG_COLOCATED_6GHZ is not set in the scan flags,
+-then scan will happen on all supported channels (default behavior).
+-
+-With these optimizations, scan time is improved by 1.5-1.8 seconds on
+-WCN6750. Similar savings have been observed on WCN6855.
+-
+-Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
+-Tested-on: WCN6855 hw2.1 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3.6510.16
+-
+-Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230323060913.10097-1-quic_mpubbise@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 25 +++++++++++++++++++++++--
+- drivers/net/wireless/ath/ath11k/wmi.h |  4 ++++
+- 2 files changed, 27 insertions(+), 2 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -3819,8 +3819,29 @@ static int ath11k_mac_op_hw_scan(struct
+- 			goto exit;
+- 		}
+- 
+--		for (i = 0; i < arg->num_chan; i++)
+--			arg->chan_list[i] = req->channels[i]->center_freq;
+-+		for (i = 0; i < arg->num_chan; i++) {
+-+			if (test_bit(WMI_TLV_SERVICE_SCAN_CONFIG_PER_CHANNEL,
+-+				     ar->ab->wmi_ab.svc_map)) {
+-+				arg->chan_list[i] =
+-+					u32_encode_bits(req->channels[i]->center_freq,
+-+							WMI_SCAN_CONFIG_PER_CHANNEL_MASK);
+-+
+-+				/* If NL80211_SCAN_FLAG_COLOCATED_6GHZ is set in scan
+-+				 * flags, then scan all PSC channels in 6 GHz band and
+-+				 * those non-PSC channels where RNR IE is found during
+-+				 * the legacy 2.4/5 GHz scan.
+-+				 * If NL80211_SCAN_FLAG_COLOCATED_6GHZ is not set,
+-+				 * then all channels in 6 GHz will be scanned.
+-+				 */
+-+				if (req->channels[i]->band == NL80211_BAND_6GHZ &&
+-+				    req->flags & NL80211_SCAN_FLAG_COLOCATED_6GHZ &&
+-+				    !cfg80211_channel_is_psc(req->channels[i]))
+-+					arg->chan_list[i] |=
+-+						WMI_SCAN_CH_FLAG_SCAN_ONLY_IF_RNR_FOUND;
+-+			} else {
+-+				arg->chan_list[i] = req->channels[i]->center_freq;
+-+			}
+-+		}
+- 	}
+- 
+- 	if (req->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) {
+---- a/drivers/net/wireless/ath/ath11k/wmi.h
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.h
+-@@ -2100,6 +2100,7 @@ enum wmi_tlv_service {
+- 
+- 	/* The second 128 bits */
+- 	WMI_MAX_EXT_SERVICE = 256,
+-+	WMI_TLV_SERVICE_SCAN_CONFIG_PER_CHANNEL = 265,
+- 	WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281,
+- 	WMI_TLV_SERVICE_BIOS_SAR_SUPPORT = 326,
+- 
+-@@ -3249,6 +3250,9 @@ struct  wmi_start_scan_cmd {
+- #define WMI_SCAN_DWELL_MODE_SHIFT        21
+- #define WMI_SCAN_FLAG_EXT_PASSIVE_SCAN_START_TIME_ENHANCE   0x00000800
+- 
+-+#define WMI_SCAN_CONFIG_PER_CHANNEL_MASK	GENMASK(19, 0)
+-+#define WMI_SCAN_CH_FLAG_SCAN_ONLY_IF_RNR_FOUND	BIT(20)
+-+
+- enum {
+- 	WMI_SCAN_DWELL_MODE_DEFAULT      = 0,
+- 	WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1,
+diff --git a/package/kernel/mac80211/patches/ath11k/0050-wifi-ath11k-Configure-the-FTM-responder-role-using-f.patch b/package/kernel/mac80211/patches/ath11k/0050-wifi-ath11k-Configure-the-FTM-responder-role-using-f.patch
+deleted file mode 100644
+index bca08b177f..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0050-wifi-ath11k-Configure-the-FTM-responder-role-using-f.patch
++++ /dev/null
+@@ -1,117 +0,0 @@
+-From 813968c24126cc5c8320cd5db0e262069a535063 Mon Sep 17 00:00:00 2001
+-From: Ganesh Babu Jothiram <quic_gjothira@quicinc.com>
+-Date: Fri, 24 Mar 2023 16:57:00 +0200
+-Subject: [PATCH] wifi: ath11k: Configure the FTM responder role using firmware
+- capability flag
+-
+-Fine Time Measurement(FTM) is offloaded feature to firmware.
+-Hence, the configuration of FTM responder role is done using
+-firmware capability flag instead of hw param.
+-
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Ganesh Babu Jothiram <quic_gjothira@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230317072034.8217-1-quic_gjothira@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/core.c | 8 --------
+- drivers/net/wireless/ath/ath11k/hw.h   | 1 -
+- drivers/net/wireless/ath/ath11k/mac.c  | 4 ++--
+- 3 files changed, 2 insertions(+), 11 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/core.c
+-+++ b/drivers/net/wireless/ath/ath11k/core.c
+-@@ -116,7 +116,6 @@ static const struct ath11k_hw_params ath
+- 		.tcl_ring_retry = true,
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+--		.ftm_responder = true,
+- 	},
+- 	{
+- 		.hw_rev = ATH11K_HW_IPQ6018_HW10,
+-@@ -199,7 +198,6 @@ static const struct ath11k_hw_params ath
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+- 		.support_fw_mac_sequence = false,
+--		.ftm_responder = true,
+- 	},
+- 	{
+- 		.name = "qca6390 hw2.0",
+-@@ -284,7 +282,6 @@ static const struct ath11k_hw_params ath
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+- 		.support_fw_mac_sequence = true,
+--		.ftm_responder = false,
+- 	},
+- 	{
+- 		.name = "qcn9074 hw1.0",
+-@@ -366,7 +363,6 @@ static const struct ath11k_hw_params ath
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+- 		.support_fw_mac_sequence = false,
+--		.ftm_responder = true,
+- 	},
+- 	{
+- 		.name = "wcn6855 hw2.0",
+-@@ -451,7 +447,6 @@ static const struct ath11k_hw_params ath
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+- 		.support_fw_mac_sequence = true,
+--		.ftm_responder = false,
+- 	},
+- 	{
+- 		.name = "wcn6855 hw2.1",
+-@@ -534,7 +529,6 @@ static const struct ath11k_hw_params ath
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+- 		.support_fw_mac_sequence = true,
+--		.ftm_responder = false,
+- 	},
+- 	{
+- 		.name = "wcn6750 hw1.0",
+-@@ -615,7 +609,6 @@ static const struct ath11k_hw_params ath
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE_WCN6750,
+- 		.smp2p_wow_exit = true,
+- 		.support_fw_mac_sequence = true,
+--		.ftm_responder = false,
+- 	},
+- 	{
+- 		.hw_rev = ATH11K_HW_IPQ5018_HW10,
+-@@ -695,7 +688,6 @@ static const struct ath11k_hw_params ath
+- 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+- 		.smp2p_wow_exit = false,
+- 		.support_fw_mac_sequence = false,
+--		.ftm_responder = true,
+- 	},
+- };
+- 
+---- a/drivers/net/wireless/ath/ath11k/hw.h
+-+++ b/drivers/net/wireless/ath/ath11k/hw.h
+-@@ -224,7 +224,6 @@ struct ath11k_hw_params {
+- 	u32 tx_ring_size;
+- 	bool smp2p_wow_exit;
+- 	bool support_fw_mac_sequence;
+--	bool ftm_responder;
+- };
+- 
+- struct ath11k_hw_ops {
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -3538,7 +3538,7 @@ static void ath11k_mac_op_bss_info_chang
+- 
+- 	if (changed & BSS_CHANGED_FTM_RESPONDER &&
+- 	    arvif->ftm_responder != info->ftm_responder &&
+--	    ar->ab->hw_params.ftm_responder &&
+-+	    test_bit(WMI_TLV_SERVICE_RTT, ar->ab->wmi_ab.svc_map) &&
+- 	    (vif->type == NL80211_IFTYPE_AP ||
+- 	     vif->type == NL80211_IFTYPE_MESH_POINT)) {
+- 		arvif->ftm_responder = info->ftm_responder;
+-@@ -9234,7 +9234,7 @@ static int __ath11k_mac_register(struct
+- 	wiphy_ext_feature_set(ar->hw->wiphy,
+- 			      NL80211_EXT_FEATURE_SET_SCAN_DWELL);
+- 
+--	if (ab->hw_params.ftm_responder)
+-+	if (test_bit(WMI_TLV_SERVICE_RTT, ar->ab->wmi_ab.svc_map))
+- 		wiphy_ext_feature_set(ar->hw->wiphy,
+- 				      NL80211_EXT_FEATURE_ENABLE_FTM_RESPONDER);
+- 
+diff --git a/package/kernel/mac80211/patches/ath11k/0051-wifi-ath11k-fix-rssi-station-dump-not-updated-in-QCN.patch b/package/kernel/mac80211/patches/ath11k/0051-wifi-ath11k-fix-rssi-station-dump-not-updated-in-QCN.patch
+deleted file mode 100644
+index 835dece1fe..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0051-wifi-ath11k-fix-rssi-station-dump-not-updated-in-QCN.patch
++++ /dev/null
+@@ -1,158 +0,0 @@
+-From 031ffa6c2cd305a57ccc6d610f2decd956b2e7f6 Mon Sep 17 00:00:00 2001
+-From: P Praneesh <quic_ppranees@quicinc.com>
+-Date: Fri, 24 Mar 2023 16:57:00 +0200
+-Subject: [PATCH] wifi: ath11k: fix rssi station dump not updated in QCN9074
+-
+-In QCN9074, station dump signal values display default value which
+-is -95 dbm, since there is firmware header change for HAL_RX_MPDU_START
+-between QCN9074 and IPQ8074 which cause wrong peer_id fetch from msdu.
+-Fix this by updating hal_rx_mpdu_info with corresponding QCN9074 tlv
+-format.
+-
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-01695-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230320110312.20639-1-quic_ppranees@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/hal_rx.c | 10 ++++++++-
+- drivers/net/wireless/ath/ath11k/hal_rx.h | 18 +++++++++++++++-
+- drivers/net/wireless/ath/ath11k/hw.c     | 27 ++++++++++++++++--------
+- drivers/net/wireless/ath/ath11k/hw.h     |  2 +-
+- 4 files changed, 45 insertions(+), 12 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/hal_rx.c
+-+++ b/drivers/net/wireless/ath/ath11k/hal_rx.c
+-@@ -865,6 +865,12 @@ ath11k_hal_rx_populate_mu_user_info(void
+- 	ath11k_hal_rx_populate_byte_count(rx_tlv, ppdu_info, rx_user_status);
+- }
+- 
+-+static u16 ath11k_hal_rx_mpduinfo_get_peerid(struct ath11k_base *ab,
+-+					     struct hal_rx_mpdu_info *mpdu_info)
+-+{
+-+	return ab->hw_params.hw_ops->mpdu_info_get_peerid(mpdu_info);
+-+}
+-+
+- static enum hal_rx_mon_status
+- ath11k_hal_rx_parse_mon_status_tlv(struct ath11k_base *ab,
+- 				   struct hal_rx_mon_ppdu_info *ppdu_info,
+-@@ -1459,9 +1465,11 @@ ath11k_hal_rx_parse_mon_status_tlv(struc
+- 		break;
+- 	}
+- 	case HAL_RX_MPDU_START: {
+-+		struct hal_rx_mpdu_info *mpdu_info =
+-+				(struct hal_rx_mpdu_info *)tlv_data;
+- 		u16 peer_id;
+- 
+--		peer_id = ab->hw_params.hw_ops->mpdu_info_get_peerid(tlv_data);
+-+		peer_id = ath11k_hal_rx_mpduinfo_get_peerid(ab, mpdu_info);
+- 		if (peer_id)
+- 			ppdu_info->peer_id = peer_id;
+- 		break;
+---- a/drivers/net/wireless/ath/ath11k/hal_rx.h
+-+++ b/drivers/net/wireless/ath/ath11k/hal_rx.h
+-@@ -405,7 +405,7 @@ struct hal_rx_phyrx_rssi_legacy_info {
+- #define HAL_RX_MPDU_INFO_INFO0_PEERID_WCN6855	GENMASK(15, 0)
+- #define HAL_RX_MPDU_INFO_INFO1_MPDU_LEN		GENMASK(13, 0)
+- 
+--struct hal_rx_mpdu_info {
+-+struct hal_rx_mpdu_info_ipq8074 {
+- 	__le32 rsvd0;
+- 	__le32 info0;
+- 	__le32 rsvd1[11];
+-@@ -413,12 +413,28 @@ struct hal_rx_mpdu_info {
+- 	__le32 rsvd2[9];
+- } __packed;
+- 
+-+struct hal_rx_mpdu_info_qcn9074 {
+-+	__le32 rsvd0[10];
+-+	__le32 info0;
+-+	__le32 rsvd1[2];
+-+	__le32 info1;
+-+	__le32 rsvd2[9];
+-+} __packed;
+-+
+- struct hal_rx_mpdu_info_wcn6855 {
+- 	__le32 rsvd0[8];
+- 	__le32 info0;
+- 	__le32 rsvd1[14];
+- } __packed;
+- 
+-+struct hal_rx_mpdu_info {
+-+	union {
+-+		struct hal_rx_mpdu_info_ipq8074 ipq8074;
+-+		struct hal_rx_mpdu_info_qcn9074 qcn9074;
+-+		struct hal_rx_mpdu_info_wcn6855 wcn6855;
+-+	} u;
+-+} __packed;
+-+
+- #define HAL_RX_PPDU_END_DURATION	GENMASK(23, 0)
+- struct hal_rx_ppdu_end_duration {
+- 	__le32 rsvd0[9];
+---- a/drivers/net/wireless/ath/ath11k/hw.c
+-+++ b/drivers/net/wireless/ath/ath11k/hw.c
+-@@ -835,26 +835,35 @@ static void ath11k_hw_ipq5018_reo_setup(
+- 			   ring_hash_map);
+- }
+- 
+--static u16 ath11k_hw_ipq8074_mpdu_info_get_peerid(u8 *tlv_data)
+-+static u16
+-+ath11k_hw_ipq8074_mpdu_info_get_peerid(struct hal_rx_mpdu_info *mpdu_info)
+- {
+- 	u16 peer_id = 0;
+--	struct hal_rx_mpdu_info *mpdu_info =
+--		(struct hal_rx_mpdu_info *)tlv_data;
+- 
+- 	peer_id = FIELD_GET(HAL_RX_MPDU_INFO_INFO0_PEERID,
+--			    __le32_to_cpu(mpdu_info->info0));
+-+			    __le32_to_cpu(mpdu_info->u.ipq8074.info0));
+- 
+- 	return peer_id;
+- }
+- 
+--static u16 ath11k_hw_wcn6855_mpdu_info_get_peerid(u8 *tlv_data)
+-+static u16
+-+ath11k_hw_qcn9074_mpdu_info_get_peerid(struct hal_rx_mpdu_info *mpdu_info)
+-+{
+-+	u16 peer_id = 0;
+-+
+-+	peer_id = FIELD_GET(HAL_RX_MPDU_INFO_INFO0_PEERID,
+-+			    __le32_to_cpu(mpdu_info->u.qcn9074.info0));
+-+
+-+	return peer_id;
+-+}
+-+
+-+static u16
+-+ath11k_hw_wcn6855_mpdu_info_get_peerid(struct hal_rx_mpdu_info *mpdu_info)
+- {
+- 	u16 peer_id = 0;
+--	struct hal_rx_mpdu_info_wcn6855 *mpdu_info =
+--		(struct hal_rx_mpdu_info_wcn6855 *)tlv_data;
+- 
+- 	peer_id = FIELD_GET(HAL_RX_MPDU_INFO_INFO0_PEERID_WCN6855,
+--			    __le32_to_cpu(mpdu_info->info0));
+-+			    __le32_to_cpu(mpdu_info->u.wcn6855.info0));
+- 	return peer_id;
+- }
+- 
+-@@ -1042,7 +1051,7 @@ const struct ath11k_hw_ops qcn9074_ops =
+- 	.rx_desc_get_attention = ath11k_hw_qcn9074_rx_desc_get_attention,
+- 	.rx_desc_get_msdu_payload = ath11k_hw_qcn9074_rx_desc_get_msdu_payload,
+- 	.reo_setup = ath11k_hw_ipq8074_reo_setup,
+--	.mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid,
+-+	.mpdu_info_get_peerid = ath11k_hw_qcn9074_mpdu_info_get_peerid,
+- 	.rx_desc_mac_addr2_valid = ath11k_hw_ipq9074_rx_desc_mac_addr2_valid,
+- 	.rx_desc_mpdu_start_addr2 = ath11k_hw_ipq9074_rx_desc_mpdu_start_addr2,
+- 	.get_ring_selector = ath11k_hw_ipq8074_get_tcl_ring_selector,
+---- a/drivers/net/wireless/ath/ath11k/hw.h
+-+++ b/drivers/net/wireless/ath/ath11k/hw.h
+-@@ -263,7 +263,7 @@ struct ath11k_hw_ops {
+- 	struct rx_attention *(*rx_desc_get_attention)(struct hal_rx_desc *desc);
+- 	u8 *(*rx_desc_get_msdu_payload)(struct hal_rx_desc *desc);
+- 	void (*reo_setup)(struct ath11k_base *ab);
+--	u16 (*mpdu_info_get_peerid)(u8 *tlv_data);
+-+	u16 (*mpdu_info_get_peerid)(struct hal_rx_mpdu_info *mpdu_info);
+- 	bool (*rx_desc_mac_addr2_valid)(struct hal_rx_desc *desc);
+- 	u8* (*rx_desc_mpdu_start_addr2)(struct hal_rx_desc *desc);
+- 	u32 (*get_ring_selector)(struct sk_buff *skb);
+diff --git a/package/kernel/mac80211/patches/ath11k/0052-wifi-ath11k-Fix-invalid-management-rx-frame-length-i.patch b/package/kernel/mac80211/patches/ath11k/0052-wifi-ath11k-Fix-invalid-management-rx-frame-length-i.patch
+deleted file mode 100644
+index 0c1637fb04..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0052-wifi-ath11k-Fix-invalid-management-rx-frame-length-i.patch
++++ /dev/null
+@@ -1,115 +0,0 @@
+-From 447b0398a9cd41ca343dfd43e555af92d6214487 Mon Sep 17 00:00:00 2001
+-From: Bhagavathi Perumal S <quic_bperumal@quicinc.com>
+-Date: Fri, 24 Mar 2023 16:57:00 +0200
+-Subject: [PATCH] wifi: ath11k: Fix invalid management rx frame length issue
+-
+-The WMI management rx event has multiple arrays of TLVs, however the common
+-WMI TLV parser won't handle multiple TLV tags of same type.
+-So the multiple array tags of WMI management rx TLV is parsed incorrectly
+-and the length calculated becomes wrong when the target sends multiple
+-array tags.
+-
+-Add separate TLV parser to handle multiple arrays for WMI management rx
+-TLV. This fixes invalid length issue when the target sends multiple array
+-tags.
+-
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Bhagavathi Perumal S <quic_bperumal@quicinc.com>
+-Co-developed-by: Nagarajan Maran <quic_nmaran@quicinc.com>
+-Signed-off-by: Nagarajan Maran <quic_nmaran@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230320133840.30162-1-quic_nmaran@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/wmi.c | 45 +++++++++++++++++++++------
+- 1 file changed, 35 insertions(+), 10 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/wmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
+-@@ -82,6 +82,12 @@ struct wmi_tlv_fw_stats_parse {
+- 	bool chain_rssi_done;
+- };
+- 
+-+struct wmi_tlv_mgmt_rx_parse {
+-+	const struct wmi_mgmt_rx_hdr *fixed;
+-+	const u8 *frame_buf;
+-+	bool frame_buf_done;
+-+};
+-+
+- static const struct wmi_tlv_policy wmi_tlv_policies[] = {
+- 	[WMI_TAG_ARRAY_BYTE]
+- 		= { .min_len = 0 },
+-@@ -5633,28 +5639,49 @@ static int ath11k_pull_vdev_stopped_para
+- 	return 0;
+- }
+- 
+-+static int ath11k_wmi_tlv_mgmt_rx_parse(struct ath11k_base *ab,
+-+					u16 tag, u16 len,
+-+					const void *ptr, void *data)
+-+{
+-+	struct wmi_tlv_mgmt_rx_parse *parse = data;
+-+
+-+	switch (tag) {
+-+	case WMI_TAG_MGMT_RX_HDR:
+-+		parse->fixed = ptr;
+-+		break;
+-+	case WMI_TAG_ARRAY_BYTE:
+-+		if (!parse->frame_buf_done) {
+-+			parse->frame_buf = ptr;
+-+			parse->frame_buf_done = true;
+-+		}
+-+		break;
+-+	}
+-+	return 0;
+-+}
+-+
+- static int ath11k_pull_mgmt_rx_params_tlv(struct ath11k_base *ab,
+- 					  struct sk_buff *skb,
+- 					  struct mgmt_rx_event_params *hdr)
+- {
+--	const void **tb;
+-+	struct wmi_tlv_mgmt_rx_parse parse = { };
+- 	const struct wmi_mgmt_rx_hdr *ev;
+- 	const u8 *frame;
+- 	int ret;
+- 
+--	tb = ath11k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
+--	if (IS_ERR(tb)) {
+--		ret = PTR_ERR(tb);
+--		ath11k_warn(ab, "failed to parse tlv: %d\n", ret);
+-+	ret = ath11k_wmi_tlv_iter(ab, skb->data, skb->len,
+-+				  ath11k_wmi_tlv_mgmt_rx_parse,
+-+				  &parse);
+-+	if (ret) {
+-+		ath11k_warn(ab, "failed to parse mgmt rx tlv %d\n",
+-+			    ret);
+- 		return ret;
+- 	}
+- 
+--	ev = tb[WMI_TAG_MGMT_RX_HDR];
+--	frame = tb[WMI_TAG_ARRAY_BYTE];
+-+	ev = parse.fixed;
+-+	frame = parse.frame_buf;
+- 
+- 	if (!ev || !frame) {
+- 		ath11k_warn(ab, "failed to fetch mgmt rx hdr");
+--		kfree(tb);
+- 		return -EPROTO;
+- 	}
+- 
+-@@ -5673,7 +5700,6 @@ static int ath11k_pull_mgmt_rx_params_tl
+- 
+- 	if (skb->len < (frame - skb->data) + hdr->buf_len) {
+- 		ath11k_warn(ab, "invalid length in mgmt rx hdr ev");
+--		kfree(tb);
+- 		return -EPROTO;
+- 	}
+- 
+-@@ -5685,7 +5711,6 @@ static int ath11k_pull_mgmt_rx_params_tl
+- 
+- 	ath11k_ce_byte_swap(skb->data, hdr->buf_len);
+- 
+--	kfree(tb);
+- 	return 0;
+- }
+- 
+diff --git a/package/kernel/mac80211/patches/ath11k/0053-wifi-ath11k-fix-writing-to-unintended-memory-region.patch b/package/kernel/mac80211/patches/ath11k/0053-wifi-ath11k-fix-writing-to-unintended-memory-region.patch
+deleted file mode 100644
+index 7b8a7d4543..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0053-wifi-ath11k-fix-writing-to-unintended-memory-region.patch
++++ /dev/null
+@@ -1,43 +0,0 @@
+-From 756a7f90878f0866fd2fe167ef37e90b47326b96 Mon Sep 17 00:00:00 2001
+-From: P Praneesh <quic_ppranees@quicinc.com>
+-Date: Fri, 24 Mar 2023 16:57:01 +0200
+-Subject: [PATCH] wifi: ath11k: fix writing to unintended memory region
+-
+-While initializing spectral, the magic value is getting written to the
+-invalid memory address leading to random boot-up crash. This occurs
+-due to the incorrect index increment in ath11k_dbring_fill_magic_value
+-function. Fix it by replacing the existing logic with memset32 to ensure
+-there is no invalid memory access.
+-
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.4.0.1-01838-QCAHKSWPL_SILICONZ-1
+-
+-Fixes: d3d358efc553 ("ath11k: add spectral/CFR buffer validation support")
+-Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230321052900.16895-1-quic_ppranees@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/dbring.c | 12 ++++++------
+- 1 file changed, 6 insertions(+), 6 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/dbring.c
+-+++ b/drivers/net/wireless/ath/ath11k/dbring.c
+-@@ -26,13 +26,13 @@ int ath11k_dbring_validate_buffer(struct
+- static void ath11k_dbring_fill_magic_value(struct ath11k *ar,
+- 					   void *buffer, u32 size)
+- {
+--	u32 *temp;
+--	int idx;
+-+	/* memset32 function fills buffer payload with the ATH11K_DB_MAGIC_VALUE
+-+	 * and the variable size is expected to be the number of u32 values
+-+	 * to be stored, not the number of bytes.
+-+	 */
+-+	size = size / sizeof(u32);
+- 
+--	size = size >> 2;
+--
+--	for (idx = 0, temp = buffer; idx < size; idx++, temp++)
+--		*temp++ = ATH11K_DB_MAGIC_VALUE;
+-+	memset32(buffer, ATH11K_DB_MAGIC_VALUE, size);
+- }
+- 
+- static int ath11k_dbring_bufs_replenish(struct ath11k *ar,
+diff --git a/package/kernel/mac80211/patches/ath11k/0054-wifi-ath11k-Send-11d-scan-start-before-WMI_START_SCA.patch b/package/kernel/mac80211/patches/ath11k/0054-wifi-ath11k-Send-11d-scan-start-before-WMI_START_SCA.patch
+deleted file mode 100644
+index 0f8e637592..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0054-wifi-ath11k-Send-11d-scan-start-before-WMI_START_SCA.patch
++++ /dev/null
+@@ -1,61 +0,0 @@
+-From e89a51aedf380bc60219dc9afa96c36507060fb3 Mon Sep 17 00:00:00 2001
+-From: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
+-Date: Wed, 15 Mar 2023 21:48:17 +0530
+-Subject: [PATCH] wifi: ath11k: Send 11d scan start before WMI_START_SCAN_CMDID
+-
+-Firmwares advertising the support of triggering 11d algorithm on the
+-scan results of a regular scan expects driver to send
+-WMI_11D_SCAN_START_CMDID before sending WMI_START_SCAN_CMDID.
+-Triggering 11d algorithm on the scan results of a normal scan helps
+-in completely avoiding a separate 11d scan for determining regdomain.
+-This indirectly helps in speeding up connections on station
+-interfaces on the chipsets supporting 11D scan.
+-
+-To enable this feature, send WMI_11D_SCAN_START_CMDID just before
+-sending WMI_START_SCAN_CMDID if the firmware advertises
+-WMI_TLV_SERVICE_SUPPORT_11D_FOR_HOST_SCAN service flag.
+-
+-WCN6750 & WCN6855 supports this feature.
+-
+-Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-01160-QCAMSLSWPLZ-1
+-Tested-on: WCN6855 hw2.1 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3.6510.23
+-
+-Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230315161817.29627-1-quic_mpubbise@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 12 ++++++++++++
+- drivers/net/wireless/ath/ath11k/wmi.h |  1 +
+- 2 files changed, 13 insertions(+)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -3755,6 +3755,18 @@ static int ath11k_mac_op_hw_scan(struct
+- 	int i;
+- 	u32 scan_timeout;
+- 
+-+	/* Firmwares advertising the support of triggering 11D algorithm
+-+	 * on the scan results of a regular scan expects driver to send
+-+	 * WMI_11D_SCAN_START_CMDID before sending WMI_START_SCAN_CMDID.
+-+	 * With this feature, separate 11D scan can be avoided since
+-+	 * regdomain can be determined with the scan results of the
+-+	 * regular scan.
+-+	 */
+-+	if (ar->state_11d == ATH11K_11D_PREPARING &&
+-+	    test_bit(WMI_TLV_SERVICE_SUPPORT_11D_FOR_HOST_SCAN,
+-+		     ar->ab->wmi_ab.svc_map))
+-+		ath11k_mac_11d_scan_start(ar, arvif->vdev_id);
+-+
+- 	mutex_lock(&ar->conf_mutex);
+- 
+- 	spin_lock_bh(&ar->data_lock);
+---- a/drivers/net/wireless/ath/ath11k/wmi.h
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.h
+-@@ -2103,6 +2103,7 @@ enum wmi_tlv_service {
+- 	WMI_TLV_SERVICE_SCAN_CONFIG_PER_CHANNEL = 265,
+- 	WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281,
+- 	WMI_TLV_SERVICE_BIOS_SAR_SUPPORT = 326,
+-+	WMI_TLV_SERVICE_SUPPORT_11D_FOR_HOST_SCAN = 357,
+- 
+- 	/* The third 128 bits */
+- 	WMI_MAX_EXT2_SERVICE = 384
+diff --git a/package/kernel/mac80211/patches/ath11k/0055-wifi-ath11k-Remove-redundant-pci_clear_master.patch b/package/kernel/mac80211/patches/ath11k/0055-wifi-ath11k-Remove-redundant-pci_clear_master.patch
+deleted file mode 100644
+index 0439727e72..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0055-wifi-ath11k-Remove-redundant-pci_clear_master.patch
++++ /dev/null
+@@ -1,58 +0,0 @@
+-From f812e2a9f85d6bea78957ccb5197e4491316848b Mon Sep 17 00:00:00 2001
+-From: Cai Huoqing <cai.huoqing@linux.dev>
+-Date: Thu, 23 Mar 2023 19:26:09 +0800
+-Subject: [PATCH] wifi: ath11k: Remove redundant pci_clear_master
+-
+-Remove pci_clear_master to simplify the code,
+-the bus-mastering is also cleared in do_pci_disable_device,
+-like this:
+-./drivers/pci/pci.c:2197
+-static void do_pci_disable_device(struct pci_dev *dev)
+-{
+-	u16 pci_command;
+-
+-	pci_read_config_word(dev, PCI_COMMAND, &pci_command);
+-	if (pci_command & PCI_COMMAND_MASTER) {
+-		pci_command &= ~PCI_COMMAND_MASTER;
+-		pci_write_config_word(dev, PCI_COMMAND, pci_command);
+-	}
+-
+-	pcibios_disable_device(dev);
+-}.
+-And dev->is_busmaster is set to 0 in pci_disable_device.
+-
+-Signed-off-by: Cai Huoqing <cai.huoqing@linux.dev>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230323112613.7550-1-cai.huoqing@linux.dev
+----
+- drivers/net/wireless/ath/ath11k/pci.c | 5 +----
+- 1 file changed, 1 insertion(+), 4 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/pci.c
+-+++ b/drivers/net/wireless/ath/ath11k/pci.c
+-@@ -540,7 +540,7 @@ static int ath11k_pci_claim(struct ath11
+- 	if (!ab->mem) {
+- 		ath11k_err(ab, "failed to map pci bar %d\n", ATH11K_PCI_BAR_NUM);
+- 		ret = -EIO;
+--		goto clear_master;
+-+		goto release_region;
+- 	}
+- 
+- 	ab->mem_ce = ab->mem;
+-@@ -548,8 +548,6 @@ static int ath11k_pci_claim(struct ath11
+- 	ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot pci_mem 0x%pK\n", ab->mem);
+- 	return 0;
+- 
+--clear_master:
+--	pci_clear_master(pdev);
+- release_region:
+- 	pci_release_region(pdev, ATH11K_PCI_BAR_NUM);
+- disable_device:
+-@@ -565,7 +563,6 @@ static void ath11k_pci_free_region(struc
+- 
+- 	pci_iounmap(pci_dev, ab->mem);
+- 	ab->mem = NULL;
+--	pci_clear_master(pci_dev);
+- 	pci_release_region(pci_dev, ATH11K_PCI_BAR_NUM);
+- 	if (pci_is_enabled(pci_dev))
+- 		pci_disable_device(pci_dev);
+diff --git a/package/kernel/mac80211/patches/ath11k/0056-wifi-ath11k-Disable-Spectral-scan-upon-removing-inte.patch b/package/kernel/mac80211/patches/ath11k/0056-wifi-ath11k-Disable-Spectral-scan-upon-removing-inte.patch
+deleted file mode 100644
+index 44532a4d72..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0056-wifi-ath11k-Disable-Spectral-scan-upon-removing-inte.patch
++++ /dev/null
+@@ -1,36 +0,0 @@
+-From 5c690db63b45c6c4c4932b13173af71df369dba5 Mon Sep 17 00:00:00 2001
+-From: Tamizh Chelvam Raja <quic_tamizhr@quicinc.com>
+-Date: Tue, 28 Mar 2023 12:41:50 +0530
+-Subject: [PATCH] wifi: ath11k: Disable Spectral scan upon removing interface
+-
+-Host might receive spectral events during interface
+-down sequence and this might create below errors.
+-
+-failed to handle dma buf release event -22
+-failed to handle dma buf release event -22
+-
+-Fix this by disabling spectral config during remove interface.
+-
+-Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Tamizh Chelvam Raja <quic_tamizhr@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230328071150.29645-1-quic_tamizhr@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 5 +++++
+- 1 file changed, 5 insertions(+)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -6685,6 +6685,11 @@ static void ath11k_mac_op_remove_interfa
+- 	ath11k_dbg(ab, ATH11K_DBG_MAC, "mac remove interface (vdev %d)\n",
+- 		   arvif->vdev_id);
+- 
+-+	ret = ath11k_spectral_vif_stop(arvif);
+-+	if (ret)
+-+		ath11k_warn(ab, "failed to stop spectral for vdev %i: %d\n",
+-+			    arvif->vdev_id, ret);
+-+
+- 	if (arvif->vdev_type == WMI_VDEV_TYPE_STA)
+- 		ath11k_mac_11d_scan_stop(ar);
+- 
+diff --git a/package/kernel/mac80211/patches/ath11k/0057-wifi-ath11k-enable-SAR-support-on-WCN6750.patch b/package/kernel/mac80211/patches/ath11k/0057-wifi-ath11k-enable-SAR-support-on-WCN6750.patch
+deleted file mode 100644
+index 5e64e552c1..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0057-wifi-ath11k-enable-SAR-support-on-WCN6750.patch
++++ /dev/null
+@@ -1,29 +0,0 @@
+-From abf57d84973ce1abcb67504ac0df8aea1fe09a76 Mon Sep 17 00:00:00 2001
+-From: Youghandhar Chintala <quic_youghand@quicinc.com>
+-Date: Tue, 28 Mar 2023 17:04:55 +0530
+-Subject: [PATCH] wifi: ath11k: enable SAR support on WCN6750
+-
+-Currently, SAR is enabled only on WCN6855, enable this for WCN6750 too. This
+-functionality gets triggered, when the user space application calls
+-NL80211_CMD_SET_SAR_SPECS.
+-
+-Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
+-
+-Signed-off-by: Youghandhar Chintala <quic_youghand@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230328113455.11252-1-quic_youghand@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/core.c | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/core.c
+-+++ b/drivers/net/wireless/ath/ath11k/core.c
+-@@ -593,7 +593,7 @@ static const struct ath11k_hw_params ath
+- 		.current_cc_support = true,
+- 		.dbr_debug_support = false,
+- 		.global_reset = false,
+--		.bios_sar_capa = NULL,
+-+		.bios_sar_capa = &ath11k_hw_sar_capa_wcn6855,
+- 		.m3_fw_support = false,
+- 		.fixed_bdf_addr = false,
+- 		.fixed_mem_region = false,
+diff --git a/package/kernel/mac80211/patches/ath11k/0058-wifi-ath11k-pci-Add-more-MODULE_FIRMWARE-entries.patch b/package/kernel/mac80211/patches/ath11k/0058-wifi-ath11k-pci-Add-more-MODULE_FIRMWARE-entries.patch
+deleted file mode 100644
+index 585864eff2..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0058-wifi-ath11k-pci-Add-more-MODULE_FIRMWARE-entries.patch
++++ /dev/null
+@@ -1,36 +0,0 @@
+-From 06c58473969239e00d76b683edd511952060ca56 Mon Sep 17 00:00:00 2001
+-From: Takashi Iwai <tiwai@suse.de>
+-Date: Thu, 30 Mar 2023 16:37:18 +0200
+-Subject: [PATCH] wifi: ath11k: pci: Add more MODULE_FIRMWARE() entries
+-
+-As there are a few more models supported by the driver, let's add the
+-missing MODULE_FIRMWARE() entries for them.  The lack of them resulted
+-in the missing device enablement on some systems, such as the
+-installation image of openSUSE.
+-
+-While we are at it, use the wildcard instead of listing each firmware
+-files individually for each.
+-
+-Signed-off-by: Takashi Iwai <tiwai@suse.de>
+-Reviewed-by: Simon Horman <simon.horman@corigine.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230330143718.19511-1-tiwai@suse.de
+----
+- drivers/net/wireless/ath/ath11k/pci.c | 9 +++++----
+- 1 file changed, 5 insertions(+), 4 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/pci.c
+-+++ b/drivers/net/wireless/ath/ath11k/pci.c
+-@@ -1036,7 +1036,8 @@ module_exit(ath11k_pci_exit);
+- MODULE_DESCRIPTION("Driver support for Qualcomm Technologies 802.11ax WLAN PCIe devices");
+- MODULE_LICENSE("Dual BSD/GPL");
+- 
+--/* QCA639x 2.0 firmware files */
+--MODULE_FIRMWARE(ATH11K_FW_DIR "/QCA6390/hw2.0/" ATH11K_BOARD_API2_FILE);
+--MODULE_FIRMWARE(ATH11K_FW_DIR "/QCA6390/hw2.0/" ATH11K_AMSS_FILE);
+--MODULE_FIRMWARE(ATH11K_FW_DIR "/QCA6390/hw2.0/" ATH11K_M3_FILE);
+-+/* firmware files */
+-+MODULE_FIRMWARE(ATH11K_FW_DIR "/QCA6390/hw2.0/*");
+-+MODULE_FIRMWARE(ATH11K_FW_DIR "/QCN9074/hw1.0/*");
+-+MODULE_FIRMWARE(ATH11K_FW_DIR "/WCN6855/hw2.0/*");
+-+MODULE_FIRMWARE(ATH11K_FW_DIR "/WCN6855/hw2.1/*");
+diff --git a/package/kernel/mac80211/patches/ath11k/0059-wifi-ath11k-print-a-warning-when-crypto_alloc_shash-.patch b/package/kernel/mac80211/patches/ath11k/0059-wifi-ath11k-print-a-warning-when-crypto_alloc_shash-.patch
+deleted file mode 100644
+index fab52a0fa7..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0059-wifi-ath11k-print-a-warning-when-crypto_alloc_shash-.patch
++++ /dev/null
+@@ -1,34 +0,0 @@
+-From a87a9110ac0dcbfd9458b6665c141fa1c16a669d Mon Sep 17 00:00:00 2001
+-From: Kalle Valo <quic_kvalo@quicinc.com>
+-Date: Wed, 5 Apr 2023 12:04:25 +0300
+-Subject: [PATCH] wifi: ath11k: print a warning when crypto_alloc_shash() fails
+-
+-Christoph reported that ath11k failed to initialise when michael_mic.ko
+-module was not installed. To make it easier to notice that case print a
+-warning when crypto_alloc_shash() fails.
+-
+-Compile tested only.
+-
+-Reported-by: Christoph Hellwig <hch@lst.de>
+-Link: https://lore.kernel.org/all/20221130133016.GC3055@lst.de/
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230405090425.1351-1-kvalo@kernel.org
+----
+- drivers/net/wireless/ath/ath11k/dp_rx.c | 5 ++++-
+- 1 file changed, 4 insertions(+), 1 deletion(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/dp_rx.c
+-+++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
+-@@ -3106,8 +3106,11 @@ int ath11k_peer_rx_frag_setup(struct ath
+- 	int i;
+- 
+- 	tfm = crypto_alloc_shash("michael_mic", 0, 0);
+--	if (IS_ERR(tfm))
+-+	if (IS_ERR(tfm)) {
+-+		ath11k_warn(ab, "failed to allocate michael_mic shash: %ld\n",
+-+			    PTR_ERR(tfm));
+- 		return PTR_ERR(tfm);
+-+	}
+- 
+- 	spin_lock_bh(&ab->base_lock);
+- 
+diff --git a/package/kernel/mac80211/patches/ath11k/0060-wifi-ath11k-Ignore-frags-from-uninitialized-peer-in-.patch b/package/kernel/mac80211/patches/ath11k/0060-wifi-ath11k-Ignore-frags-from-uninitialized-peer-in-.patch
+deleted file mode 100644
+index 5bbf9e04a4..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0060-wifi-ath11k-Ignore-frags-from-uninitialized-peer-in-.patch
++++ /dev/null
+@@ -1,104 +0,0 @@
+-From a06bfb3c9f69f303692cdae87bc0899d2ae8b2a6 Mon Sep 17 00:00:00 2001
+-From: Harshitha Prem <quic_hprem@quicinc.com>
+-Date: Tue, 4 Apr 2023 00:11:54 +0530
+-Subject: [PATCH] wifi: ath11k: Ignore frags from uninitialized peer in dp.
+-
+-When max virtual ap interfaces are configured in all the bands with
+-ACS and hostapd restart is done every 60s, a crash is observed at
+-random times.
+-In this certain scenario, a fragmented packet is received for
+-self peer, for which rx_tid and rx_frags are not initialized in
+-datapath. While handling this fragment, crash is observed as the
+-rx_frag list is uninitialised and when we walk in
+-ath11k_dp_rx_h_sort_frags, skb null leads to exception.
+-
+-To address this, before processing received fragments we check
+-dp_setup_done flag is set to ensure that peer has completed its
+-dp peer setup for fragment queue, else ignore processing the
+-fragments.
+-
+-Call trace:
+-  ath11k_dp_process_rx_err+0x550/0x1084 [ath11k]
+-  ath11k_dp_service_srng+0x70/0x370 [ath11k]
+-  0xffffffc009693a04
+-  __napi_poll+0x30/0xa4
+-  net_rx_action+0x118/0x270
+-  __do_softirq+0x10c/0x244
+-  irq_exit+0x64/0xb4
+-  __handle_domain_irq+0x88/0xac
+-  gic_handle_irq+0x74/0xbc
+-  el1_irq+0xf0/0x1c0
+-  arch_cpu_idle+0x10/0x18
+-  do_idle+0x104/0x248
+-  cpu_startup_entry+0x20/0x64
+-  rest_init+0xd0/0xdc
+-  arch_call_rest_init+0xc/0x14
+-  start_kernel+0x480/0x4b8
+-  Code: f9400281 f94066a2 91405021 b94a0023 (f9406401)
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Harshitha Prem <quic_hprem@quicinc.com>
+-Signed-off-by: Nagarajan Maran <quic_nmaran@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230403184155.8670-2-quic_nmaran@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/dp.c    | 4 +++-
+- drivers/net/wireless/ath/ath11k/dp_rx.c | 8 ++++++++
+- drivers/net/wireless/ath/ath11k/peer.h  | 1 +
+- 3 files changed, 12 insertions(+), 1 deletion(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/dp.c
+-+++ b/drivers/net/wireless/ath/ath11k/dp.c
+-@@ -36,6 +36,7 @@ void ath11k_dp_peer_cleanup(struct ath11
+- 	}
+- 
+- 	ath11k_peer_rx_tid_cleanup(ar, peer);
+-+	peer->dp_setup_done = false;
+- 	crypto_free_shash(peer->tfm_mmic);
+- 	spin_unlock_bh(&ab->base_lock);
+- }
+-@@ -72,7 +73,8 @@ int ath11k_dp_peer_setup(struct ath11k *
+- 	ret = ath11k_peer_rx_frag_setup(ar, addr, vdev_id);
+- 	if (ret) {
+- 		ath11k_warn(ab, "failed to setup rx defrag context\n");
+--		return ret;
+-+		tid--;
+-+		goto peer_clean;
+- 	}
+- 
+- 	/* TODO: Setup other peer specific resource used in data path */
+---- a/drivers/net/wireless/ath/ath11k/dp_rx.c
+-+++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
+-@@ -3130,6 +3130,7 @@ int ath11k_peer_rx_frag_setup(struct ath
+- 	}
+- 
+- 	peer->tfm_mmic = tfm;
+-+	peer->dp_setup_done = true;
+- 	spin_unlock_bh(&ab->base_lock);
+- 
+- 	return 0;
+-@@ -3575,6 +3576,13 @@ static int ath11k_dp_rx_frag_h_mpdu(stru
+- 		ret = -ENOENT;
+- 		goto out_unlock;
+- 	}
+-+	if (!peer->dp_setup_done) {
+-+		ath11k_warn(ab, "The peer %pM [%d] has uninitialized datapath\n",
+-+			    peer->addr, peer_id);
+-+		ret = -ENOENT;
+-+		goto out_unlock;
+-+	}
+-+
+- 	rx_tid = &peer->rx_tid[tid];
+- 
+- 	if ((!skb_queue_empty(&rx_tid->rx_frags) && seqno != rx_tid->cur_sn) ||
+---- a/drivers/net/wireless/ath/ath11k/peer.h
+-+++ b/drivers/net/wireless/ath/ath11k/peer.h
+-@@ -35,6 +35,7 @@ struct ath11k_peer {
+- 	u16 sec_type;
+- 	u16 sec_type_grp;
+- 	bool is_authorized;
+-+	bool dp_setup_done;
+- };
+- 
+- void ath11k_peer_unmap_event(struct ath11k_base *ab, u16 peer_id);
+diff --git a/package/kernel/mac80211/patches/ath11k/0061-wifi-ath11k-fix-undefined-behavior-with-__fls-in-dp.patch b/package/kernel/mac80211/patches/ath11k/0061-wifi-ath11k-fix-undefined-behavior-with-__fls-in-dp.patch
+deleted file mode 100644
+index d68c19f160..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0061-wifi-ath11k-fix-undefined-behavior-with-__fls-in-dp.patch
++++ /dev/null
+@@ -1,29 +0,0 @@
+-From 41e02bf4ae32cf2ac47b08b4caaa9c1a032e4ce7 Mon Sep 17 00:00:00 2001
+-From: Harshitha Prem <quic_hprem@quicinc.com>
+-Date: Tue, 4 Apr 2023 00:11:55 +0530
+-Subject: [PATCH] wifi: ath11k: fix undefined behavior with __fls in dp
+-
+-"__fls" would have an undefined behavior if the argument is passed
+-as "0". Hence, added changes to handle the same.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Harshitha Prem <quic_hprem@quicinc.com>
+-Signed-off-by: Nagarajan Maran <quic_nmaran@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230403184155.8670-3-quic_nmaran@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/dp_rx.c | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/dp_rx.c
+-+++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
+-@@ -3598,7 +3598,7 @@ static int ath11k_dp_rx_frag_h_mpdu(stru
+- 		goto out_unlock;
+- 	}
+- 
+--	if (frag_no > __fls(rx_tid->rx_frag_bitmap))
+-+	if (!rx_tid->rx_frag_bitmap || (frag_no > __fls(rx_tid->rx_frag_bitmap)))
+- 		__skb_queue_tail(&rx_tid->rx_frags, msdu);
+- 	else
+- 		ath11k_dp_rx_h_sort_frags(ar, &rx_tid->rx_frags, msdu);
+diff --git a/package/kernel/mac80211/patches/ath11k/0062-wifi-ath11k-fix-double-free-of-peer-rx_tid-during-re.patch b/package/kernel/mac80211/patches/ath11k/0062-wifi-ath11k-fix-double-free-of-peer-rx_tid-during-re.patch
+deleted file mode 100644
+index dd37b1e4fa..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0062-wifi-ath11k-fix-double-free-of-peer-rx_tid-during-re.patch
++++ /dev/null
+@@ -1,144 +0,0 @@
+-From 93a91f40c25c3d0e61f8540a7accf105090f9995 Mon Sep 17 00:00:00 2001
+-From: Harshitha Prem <quic_hprem@quicinc.com>
+-Date: Mon, 17 Apr 2023 13:35:00 +0300
+-Subject: [PATCH] wifi: ath11k: fix double free of peer rx_tid during reo cmd
+- failure
+-
+-Peer rx_tid is locally copied thrice during peer_rx_tid_cleanup to
+-send REO_CMD_UPDATE_RX_QUEUE followed by REO_CMD_FLUSH_CACHE to flush
+-all aged REO descriptors from HW cache.
+-
+-When sending REO_CMD_FLUSH_CACHE fails, we do dma unmap of already
+-mapped rx_tid->vaddr and free it. This is not checked during
+-reo_cmd_list_cleanup() and dp_reo_cmd_free() before trying to free and
+-unmap again.
+-
+-Fix this by setting rx_tid->vaddr NULL in rx tid delete and also
+-wherever freeing it to check in reo_cmd_list_cleanup() and
+-reo_cmd_free() before trying to free again.
+-
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Sathishkumar Muruganandam <quic_murugana@quicinc.com>
+-Signed-off-by: Harshitha Prem <quic_hprem@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230403182420.23375-2-quic_hprem@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/dp_rx.c | 43 ++++++++++++++++++-------
+- 1 file changed, 31 insertions(+), 12 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/dp_rx.c
+-+++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
+-@@ -668,13 +668,18 @@ void ath11k_dp_reo_cmd_list_cleanup(stru
+- 	struct ath11k_dp *dp = &ab->dp;
+- 	struct dp_reo_cmd *cmd, *tmp;
+- 	struct dp_reo_cache_flush_elem *cmd_cache, *tmp_cache;
+-+	struct dp_rx_tid *rx_tid;
+- 
+- 	spin_lock_bh(&dp->reo_cmd_lock);
+- 	list_for_each_entry_safe(cmd, tmp, &dp->reo_cmd_list, list) {
+- 		list_del(&cmd->list);
+--		dma_unmap_single(ab->dev, cmd->data.paddr,
+--				 cmd->data.size, DMA_BIDIRECTIONAL);
+--		kfree(cmd->data.vaddr);
+-+		rx_tid = &cmd->data;
+-+		if (rx_tid->vaddr) {
+-+			dma_unmap_single(ab->dev, rx_tid->paddr,
+-+					 rx_tid->size, DMA_BIDIRECTIONAL);
+-+			kfree(rx_tid->vaddr);
+-+			rx_tid->vaddr = NULL;
+-+		}
+- 		kfree(cmd);
+- 	}
+- 
+-@@ -682,9 +687,13 @@ void ath11k_dp_reo_cmd_list_cleanup(stru
+- 				 &dp->reo_cmd_cache_flush_list, list) {
+- 		list_del(&cmd_cache->list);
+- 		dp->reo_cmd_cache_flush_count--;
+--		dma_unmap_single(ab->dev, cmd_cache->data.paddr,
+--				 cmd_cache->data.size, DMA_BIDIRECTIONAL);
+--		kfree(cmd_cache->data.vaddr);
+-+		rx_tid = &cmd_cache->data;
+-+		if (rx_tid->vaddr) {
+-+			dma_unmap_single(ab->dev, rx_tid->paddr,
+-+					 rx_tid->size, DMA_BIDIRECTIONAL);
+-+			kfree(rx_tid->vaddr);
+-+			rx_tid->vaddr = NULL;
+-+		}
+- 		kfree(cmd_cache);
+- 	}
+- 	spin_unlock_bh(&dp->reo_cmd_lock);
+-@@ -698,10 +707,12 @@ static void ath11k_dp_reo_cmd_free(struc
+- 	if (status != HAL_REO_CMD_SUCCESS)
+- 		ath11k_warn(dp->ab, "failed to flush rx tid hw desc, tid %d status %d\n",
+- 			    rx_tid->tid, status);
+--
+--	dma_unmap_single(dp->ab->dev, rx_tid->paddr, rx_tid->size,
+--			 DMA_BIDIRECTIONAL);
+--	kfree(rx_tid->vaddr);
+-+	if (rx_tid->vaddr) {
+-+		dma_unmap_single(dp->ab->dev, rx_tid->paddr, rx_tid->size,
+-+				 DMA_BIDIRECTIONAL);
+-+		kfree(rx_tid->vaddr);
+-+		rx_tid->vaddr = NULL;
+-+	}
+- }
+- 
+- static void ath11k_dp_reo_cache_flush(struct ath11k_base *ab,
+-@@ -740,6 +751,7 @@ static void ath11k_dp_reo_cache_flush(st
+- 		dma_unmap_single(ab->dev, rx_tid->paddr, rx_tid->size,
+- 				 DMA_BIDIRECTIONAL);
+- 		kfree(rx_tid->vaddr);
+-+		rx_tid->vaddr = NULL;
+- 	}
+- }
+- 
+-@@ -792,6 +804,7 @@ free_desc:
+- 	dma_unmap_single(ab->dev, rx_tid->paddr, rx_tid->size,
+- 			 DMA_BIDIRECTIONAL);
+- 	kfree(rx_tid->vaddr);
+-+	rx_tid->vaddr = NULL;
+- }
+- 
+- void ath11k_peer_rx_tid_delete(struct ath11k *ar,
+-@@ -804,6 +817,8 @@ void ath11k_peer_rx_tid_delete(struct at
+- 	if (!rx_tid->active)
+- 		return;
+- 
+-+	rx_tid->active = false;
+-+
+- 	cmd.flag = HAL_REO_CMD_FLG_NEED_STATUS;
+- 	cmd.addr_lo = lower_32_bits(rx_tid->paddr);
+- 	cmd.addr_hi = upper_32_bits(rx_tid->paddr);
+-@@ -818,9 +833,11 @@ void ath11k_peer_rx_tid_delete(struct at
+- 		dma_unmap_single(ar->ab->dev, rx_tid->paddr, rx_tid->size,
+- 				 DMA_BIDIRECTIONAL);
+- 		kfree(rx_tid->vaddr);
+-+		rx_tid->vaddr = NULL;
+- 	}
+- 
+--	rx_tid->active = false;
+-+	rx_tid->paddr = 0;
+-+	rx_tid->size = 0;
+- }
+- 
+- static int ath11k_dp_rx_link_desc_return(struct ath11k_base *ab,
+-@@ -967,6 +984,7 @@ static void ath11k_dp_rx_tid_mem_free(st
+- 	dma_unmap_single(ab->dev, rx_tid->paddr, rx_tid->size,
+- 			 DMA_BIDIRECTIONAL);
+- 	kfree(rx_tid->vaddr);
+-+	rx_tid->vaddr = NULL;
+- 
+- 	rx_tid->active = false;
+- 
+-@@ -1067,7 +1085,8 @@ int ath11k_peer_rx_tid_setup(struct ath1
+- 	return ret;
+- 
+- err_mem_free:
+--	kfree(vaddr);
+-+	kfree(rx_tid->vaddr);
+-+	rx_tid->vaddr = NULL;
+- 
+- 	return ret;
+- }
+diff --git a/package/kernel/mac80211/patches/ath11k/0063-wifi-ath11k-Prevent-REO-cmd-failures.patch b/package/kernel/mac80211/patches/ath11k/0063-wifi-ath11k-Prevent-REO-cmd-failures.patch
+deleted file mode 100644
+index 4b9af18062..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0063-wifi-ath11k-Prevent-REO-cmd-failures.patch
++++ /dev/null
+@@ -1,43 +0,0 @@
+-From a8ae833657a45746debde85c38bb7f070d344026 Mon Sep 17 00:00:00 2001
+-From: Harshitha Prem <quic_hprem@quicinc.com>
+-Date: Mon, 17 Apr 2023 13:35:01 +0300
+-Subject: [PATCH] wifi: ath11k: Prevent REO cmd failures
+-
+-Prevent REO cmd failures causing double free by increasing REO cmd
+-ring size and moving REO status ring mask to IRQ group 3 from group
+-0 to separate from tx completion ring on IRQ group 0 which may delay
+-reo status processing.
+-
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Sathishkumar Muruganandam <quic_murugana@quicinc.com>
+-Signed-off-by: Harshitha Prem <quic_hprem@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230403182420.23375-3-quic_hprem@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/dp.h | 2 +-
+- drivers/net/wireless/ath/ath11k/hw.c | 1 +
+- 2 files changed, 2 insertions(+), 1 deletion(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/dp.h
+-+++ b/drivers/net/wireless/ath/ath11k/dp.h
+-@@ -214,7 +214,7 @@ struct ath11k_pdev_dp {
+- #define DP_REO_REINJECT_RING_SIZE	32
+- #define DP_RX_RELEASE_RING_SIZE		1024
+- #define DP_REO_EXCEPTION_RING_SIZE	128
+--#define DP_REO_CMD_RING_SIZE		128
+-+#define DP_REO_CMD_RING_SIZE		256
+- #define DP_REO_STATUS_RING_SIZE		2048
+- #define DP_RXDMA_BUF_RING_SIZE		4096
+- #define DP_RXDMA_REFILL_RING_SIZE	2048
+---- a/drivers/net/wireless/ath/ath11k/hw.c
+-+++ b/drivers/net/wireless/ath/ath11k/hw.c
+-@@ -1233,6 +1233,7 @@ const struct ath11k_hw_ring_mask ath11k_
+- 		ATH11K_RX_WBM_REL_RING_MASK_0,
+- 	},
+- 	.reo_status = {
+-+		0, 0, 0,
+- 		ATH11K_REO_STATUS_RING_MASK_0,
+- 	},
+- 	.rxdma2host = {
+diff --git a/package/kernel/mac80211/patches/ath11k/0064-wifi-ath11k-add-peer-mac-information-in-failure-case.patch b/package/kernel/mac80211/patches/ath11k/0064-wifi-ath11k-add-peer-mac-information-in-failure-case.patch
+deleted file mode 100644
+index fbcbdfff71..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0064-wifi-ath11k-add-peer-mac-information-in-failure-case.patch
++++ /dev/null
+@@ -1,74 +0,0 @@
+-From 20487cc3ff36bbfa9505f0a078ba98f09abfc717 Mon Sep 17 00:00:00 2001
+-From: Harshitha Prem <quic_hprem@quicinc.com>
+-Date: Mon, 17 Apr 2023 13:35:01 +0300
+-Subject: [PATCH] wifi: ath11k: add peer mac information in failure cases
+-
+-During reo command failure, the peer mac detail for which the reo
+-command was not successful is unknown. Hence, to improve the
+-debuggability, add the peer mac information in the failure cases
+-which would be useful during multi client cases.
+-
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Sathishkumar Muruganandam <quic_murugana@quicinc.com>
+-Signed-off-by: Harshitha Prem <quic_hprem@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230403182420.23375-4-quic_hprem@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/dp_rx.c | 16 ++++++++++------
+- 1 file changed, 10 insertions(+), 6 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/dp_rx.c
+-+++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
+-@@ -1009,7 +1009,8 @@ int ath11k_peer_rx_tid_setup(struct ath1
+- 
+- 	peer = ath11k_peer_find(ab, vdev_id, peer_mac);
+- 	if (!peer) {
+--		ath11k_warn(ab, "failed to find the peer to set up rx tid\n");
+-+		ath11k_warn(ab, "failed to find the peer %pM to set up rx tid\n",
+-+			    peer_mac);
+- 		spin_unlock_bh(&ab->base_lock);
+- 		return -ENOENT;
+- 	}
+-@@ -1022,7 +1023,8 @@ int ath11k_peer_rx_tid_setup(struct ath1
+- 						    ba_win_sz, ssn, true);
+- 		spin_unlock_bh(&ab->base_lock);
+- 		if (ret) {
+--			ath11k_warn(ab, "failed to update reo for rx tid %d\n", tid);
+-+			ath11k_warn(ab, "failed to update reo for peer %pM rx tid %d\n: %d",
+-+				    peer_mac, tid, ret);
+- 			return ret;
+- 		}
+- 
+-@@ -1030,8 +1032,8 @@ int ath11k_peer_rx_tid_setup(struct ath1
+- 							     peer_mac, paddr,
+- 							     tid, 1, ba_win_sz);
+- 		if (ret)
+--			ath11k_warn(ab, "failed to send wmi command to update rx reorder queue, tid :%d (%d)\n",
+--				    tid, ret);
+-+			ath11k_warn(ab, "failed to send wmi rx reorder queue for peer %pM tid %d: %d\n",
+-+				    peer_mac, tid, ret);
+- 		return ret;
+- 	}
+- 
+-@@ -1064,6 +1066,8 @@ int ath11k_peer_rx_tid_setup(struct ath1
+- 	ret = dma_mapping_error(ab->dev, paddr);
+- 	if (ret) {
+- 		spin_unlock_bh(&ab->base_lock);
+-+		ath11k_warn(ab, "failed to setup dma map for peer %pM rx tid %d: %d\n",
+-+			    peer_mac, tid, ret);
+- 		goto err_mem_free;
+- 	}
+- 
+-@@ -1077,8 +1081,8 @@ int ath11k_peer_rx_tid_setup(struct ath1
+- 	ret = ath11k_wmi_peer_rx_reorder_queue_setup(ar, vdev_id, peer_mac,
+- 						     paddr, tid, 1, ba_win_sz);
+- 	if (ret) {
+--		ath11k_warn(ar->ab, "failed to setup rx reorder queue, tid :%d (%d)\n",
+--			    tid, ret);
+-+		ath11k_warn(ar->ab, "failed to setup rx reorder queue for peer %pM tid %d: %d\n",
+-+			    peer_mac, tid, ret);
+- 		ath11k_dp_rx_tid_mem_free(ab, peer_mac, vdev_id, tid);
+- 	}
+- 
+diff --git a/package/kernel/mac80211/patches/ath11k/0065-wifi-ath11k-fix-tx-status-reporting-in-encap-offload.patch b/package/kernel/mac80211/patches/ath11k/0065-wifi-ath11k-fix-tx-status-reporting-in-encap-offload.patch
+deleted file mode 100644
+index e2fe419158..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0065-wifi-ath11k-fix-tx-status-reporting-in-encap-offload.patch
++++ /dev/null
+@@ -1,119 +0,0 @@
+-From 6257c702264c44d74c6b71f0c62a7665da2dc356 Mon Sep 17 00:00:00 2001
+-From: Pradeep Kumar Chitrapu <quic_pradeepc@quicinc.com>
+-Date: Mon, 17 Apr 2023 13:35:02 +0300
+-Subject: [PATCH] wifi: ath11k: fix tx status reporting in encap offload mode
+-
+-ieee80211_tx_status() treats packets in 802.11 frame format and
+-tries to extract sta address from packet header. When tx encap
+-offload is enabled, this becomes invalid operation. Hence, switch
+-to using ieee80211_tx_status_ext() after filling in station
+-address for handling both 802.11 and 802.3 frames.
+-
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Pradeep Kumar Chitrapu <quic_pradeepc@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230403195738.25367-2-quic_pradeepc@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/dp.h    |  4 +++
+- drivers/net/wireless/ath/ath11k/dp_tx.c | 33 ++++++++++++++++++++++++-
+- drivers/net/wireless/ath/ath11k/dp_tx.h |  1 +
+- 3 files changed, 37 insertions(+), 1 deletion(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/dp.h
+-+++ b/drivers/net/wireless/ath/ath11k/dp.h
+-@@ -303,12 +303,16 @@ struct ath11k_dp {
+- 
+- #define HTT_TX_WBM_COMP_STATUS_OFFSET 8
+- 
+-+#define HTT_INVALID_PEER_ID	0xffff
+-+
+- /* HTT tx completion is overlaid in wbm_release_ring */
+- #define HTT_TX_WBM_COMP_INFO0_STATUS		GENMASK(12, 9)
+- #define HTT_TX_WBM_COMP_INFO0_REINJECT_REASON	GENMASK(16, 13)
+- #define HTT_TX_WBM_COMP_INFO0_REINJECT_REASON	GENMASK(16, 13)
+- 
+- #define HTT_TX_WBM_COMP_INFO1_ACK_RSSI		GENMASK(31, 24)
+-+#define HTT_TX_WBM_COMP_INFO2_SW_PEER_ID	GENMASK(15, 0)
+-+#define HTT_TX_WBM_COMP_INFO2_VALID		BIT(21)
+- 
+- struct htt_tx_wbm_completion {
+- 	u32 info0;
+---- a/drivers/net/wireless/ath/ath11k/dp_tx.c
+-+++ b/drivers/net/wireless/ath/ath11k/dp_tx.c
+-@@ -316,10 +316,12 @@ ath11k_dp_tx_htt_tx_complete_buf(struct
+- 				 struct dp_tx_ring *tx_ring,
+- 				 struct ath11k_dp_htt_wbm_tx_status *ts)
+- {
+-+	struct ieee80211_tx_status status = { 0 };
+- 	struct sk_buff *msdu;
+- 	struct ieee80211_tx_info *info;
+- 	struct ath11k_skb_cb *skb_cb;
+- 	struct ath11k *ar;
+-+	struct ath11k_peer *peer;
+- 
+- 	spin_lock(&tx_ring->tx_idr_lock);
+- 	msdu = idr_remove(&tx_ring->txbuf_idr, ts->msdu_id);
+-@@ -341,6 +343,11 @@ ath11k_dp_tx_htt_tx_complete_buf(struct
+- 
+- 	dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
+- 
+-+	if (!skb_cb->vif) {
+-+		dev_kfree_skb_any(msdu);
+-+		return;
+-+	}
+-+
+- 	memset(&info->status, 0, sizeof(info->status));
+- 
+- 	if (ts->acked) {
+-@@ -355,7 +362,23 @@ ath11k_dp_tx_htt_tx_complete_buf(struct
+- 		}
+- 	}
+- 
+--	ieee80211_tx_status(ar->hw, msdu);
+-+	spin_lock_bh(&ab->base_lock);
+-+	peer = ath11k_peer_find_by_id(ab, ts->peer_id);
+-+	if (!peer || !peer->sta) {
+-+		ath11k_dbg(ab, ATH11K_DBG_DATA,
+-+			   "dp_tx: failed to find the peer with peer_id %d\n",
+-+			    ts->peer_id);
+-+		spin_unlock_bh(&ab->base_lock);
+-+		dev_kfree_skb_any(msdu);
+-+		return;
+-+	}
+-+	spin_unlock_bh(&ab->base_lock);
+-+
+-+	status.sta = peer->sta;
+-+	status.info = info;
+-+	status.skb = msdu;
+-+
+-+	ieee80211_tx_status_ext(ar->hw, &status);
+- }
+- 
+- static void
+-@@ -379,7 +402,15 @@ ath11k_dp_tx_process_htt_tx_complete(str
+- 		ts.msdu_id = msdu_id;
+- 		ts.ack_rssi = FIELD_GET(HTT_TX_WBM_COMP_INFO1_ACK_RSSI,
+- 					status_desc->info1);
+-+
+-+		if (FIELD_GET(HTT_TX_WBM_COMP_INFO2_VALID, status_desc->info2))
+-+			ts.peer_id = FIELD_GET(HTT_TX_WBM_COMP_INFO2_SW_PEER_ID,
+-+					       status_desc->info2);
+-+		else
+-+			ts.peer_id = HTT_INVALID_PEER_ID;
+-+
+- 		ath11k_dp_tx_htt_tx_complete_buf(ab, tx_ring, &ts);
+-+
+- 		break;
+- 	case HAL_WBM_REL_HTT_TX_COMP_STATUS_REINJ:
+- 	case HAL_WBM_REL_HTT_TX_COMP_STATUS_INSPECT:
+---- a/drivers/net/wireless/ath/ath11k/dp_tx.h
+-+++ b/drivers/net/wireless/ath/ath11k/dp_tx.h
+-@@ -13,6 +13,7 @@ struct ath11k_dp_htt_wbm_tx_status {
+- 	u32 msdu_id;
+- 	bool acked;
+- 	int ack_rssi;
+-+	u16 peer_id;
+- };
+- 
+- void ath11k_dp_tx_update_txcompl(struct ath11k *ar, struct hal_tx_status *ts);
+diff --git a/package/kernel/mac80211/patches/ath11k/0066-wifi-ath11k-Fix-incorrect-update-of-radiotap-fields.patch b/package/kernel/mac80211/patches/ath11k/0066-wifi-ath11k-Fix-incorrect-update-of-radiotap-fields.patch
+deleted file mode 100644
+index 4f94580100..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0066-wifi-ath11k-Fix-incorrect-update-of-radiotap-fields.patch
++++ /dev/null
+@@ -1,49 +0,0 @@
+-From 2f0c9ac8362da09c80f1cd422ef7fd6fa9b252b9 Mon Sep 17 00:00:00 2001
+-From: Pradeep Kumar Chitrapu <quic_pradeepc@quicinc.com>
+-Date: Mon, 17 Apr 2023 13:35:02 +0300
+-Subject: [PATCH] wifi: ath11k: Fix incorrect update of radiotap fields
+-
+-Fix incorrect update of ppdu stats causing incorrect radiotap
+-fields.
+-
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Pradeep Kumar Chitrapu <quic_pradeepc@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230403195738.25367-3-quic_pradeepc@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/hal_rx.c | 4 ++--
+- drivers/net/wireless/ath/ath11k/hal_rx.h | 2 +-
+- 2 files changed, 3 insertions(+), 3 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/hal_rx.c
+-+++ b/drivers/net/wireless/ath/ath11k/hal_rx.c
+-@@ -1029,7 +1029,7 @@ ath11k_hal_rx_parse_mon_status_tlv(struc
+- 		info1 = __le32_to_cpu(vht_sig->info1);
+- 
+- 		ppdu_info->ldpc = FIELD_GET(HAL_RX_VHT_SIG_A_INFO_INFO1_SU_MU_CODING,
+--					    info0);
+-+					    info1);
+- 		ppdu_info->mcs = FIELD_GET(HAL_RX_VHT_SIG_A_INFO_INFO1_MCS,
+- 					   info1);
+- 		gi_setting = FIELD_GET(HAL_RX_VHT_SIG_A_INFO_INFO1_GI_SETTING,
+-@@ -1452,7 +1452,7 @@ ath11k_hal_rx_parse_mon_status_tlv(struc
+- 		 * PHYRX_OTHER_RECEIVE_INFO TLV.
+- 		 */
+- 		ppdu_info->rssi_comb =
+--			FIELD_GET(HAL_RX_PHYRX_RSSI_LEGACY_INFO_INFO1_RSSI_COMB,
+-+			FIELD_GET(HAL_RX_PHYRX_RSSI_LEGACY_INFO_INFO0_RSSI_COMB,
+- 				  __le32_to_cpu(rssi->info0));
+- 
+- 		if (db2dbm) {
+---- a/drivers/net/wireless/ath/ath11k/hal_rx.h
+-+++ b/drivers/net/wireless/ath/ath11k/hal_rx.h
+-@@ -385,7 +385,7 @@ struct hal_rx_he_sig_b2_ofdma_info {
+- 	__le32 info0;
+- } __packed;
+- 
+--#define HAL_RX_PHYRX_RSSI_LEGACY_INFO_INFO1_RSSI_COMB	GENMASK(15, 8)
+-+#define HAL_RX_PHYRX_RSSI_LEGACY_INFO_INFO0_RSSI_COMB	GENMASK(15, 8)
+- 
+- #define HAL_RX_PHYRX_RSSI_PREAMBLE_PRI20	GENMASK(7, 0)
+- 
+diff --git a/package/kernel/mac80211/patches/ath11k/0067-wifi-ath11k-Fix-SKB-corruption-in-REO-destination-ri.patch b/package/kernel/mac80211/patches/ath11k/0067-wifi-ath11k-Fix-SKB-corruption-in-REO-destination-ri.patch
+deleted file mode 100644
+index 8b300f3a79..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0067-wifi-ath11k-Fix-SKB-corruption-in-REO-destination-ri.patch
++++ /dev/null
+@@ -1,70 +0,0 @@
+-From f9fff67d2d7ca6fa8066132003a3deef654c55b1 Mon Sep 17 00:00:00 2001
+-From: Nagarajan Maran <quic_nmaran@quicinc.com>
+-Date: Mon, 17 Apr 2023 13:35:02 +0300
+-Subject: [PATCH] wifi: ath11k: Fix SKB corruption in REO destination ring
+-
+-While running traffics for a long time, randomly an RX descriptor
+-filled with value "0" from REO destination ring is received.
+-This descriptor which is invalid causes the wrong SKB (SKB stored in
+-the IDR lookup with buffer id "0") to be fetched which in turn
+-causes SKB memory corruption issue and the same leads to crash
+-after some time.
+-
+-Changed the start id for idr allocation to "1" and the buffer id "0"
+-is reserved for error validation. Introduced Sanity check to validate
+-the descriptor, before processing the SKB.
+-
+-Crash Signature :
+-
+-Unable to handle kernel paging request at virtual address 3f004900
+-PC points to "b15_dma_inv_range+0x30/0x50"
+-LR points to "dma_cache_maint_page+0x8c/0x128".
+-The Backtrace obtained is as follows:
+-[<8031716c>] (b15_dma_inv_range) from [<80313a4c>] (dma_cache_maint_page+0x8c/0x128)
+-[<80313a4c>] (dma_cache_maint_page) from [<80313b90>] (__dma_page_dev_to_cpu+0x28/0xcc)
+-[<80313b90>] (__dma_page_dev_to_cpu) from [<7fb5dd68>] (ath11k_dp_process_rx+0x1e8/0x4a4 [ath11k])
+-[<7fb5dd68>] (ath11k_dp_process_rx [ath11k]) from [<7fb53c20>] (ath11k_dp_service_srng+0xb0/0x2ac [ath11k])
+-[<7fb53c20>] (ath11k_dp_service_srng [ath11k]) from [<7f67bba4>] (ath11k_pci_ext_grp_napi_poll+0x1c/0x78 [ath11k_pci])
+-[<7f67bba4>] (ath11k_pci_ext_grp_napi_poll [ath11k_pci]) from [<807d5cf4>] (__napi_poll+0x28/0xb8)
+-[<807d5cf4>] (__napi_poll) from [<807d5f28>] (net_rx_action+0xf0/0x280)
+-[<807d5f28>] (net_rx_action) from [<80302148>] (__do_softirq+0xd0/0x280)
+-[<80302148>] (__do_softirq) from [<80320408>] (irq_exit+0x74/0xd4)
+-[<80320408>] (irq_exit) from [<803638a4>] (__handle_domain_irq+0x90/0xb4)
+-[<803638a4>] (__handle_domain_irq) from [<805bedec>] (gic_handle_irq+0x58/0x90)
+-[<805bedec>] (gic_handle_irq) from [<80301a78>] (__irq_svc+0x58/0x8c)
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Nagarajan Maran <quic_nmaran@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230403191533.28114-1-quic_nmaran@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/dp_rx.c | 9 ++++++---
+- 1 file changed, 6 insertions(+), 3 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/dp_rx.c
+-+++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
+-@@ -389,10 +389,10 @@ int ath11k_dp_rxbufs_replenish(struct at
+- 			goto fail_free_skb;
+- 
+- 		spin_lock_bh(&rx_ring->idr_lock);
+--		buf_id = idr_alloc(&rx_ring->bufs_idr, skb, 0,
+--				   rx_ring->bufs_max * 3, GFP_ATOMIC);
+-+		buf_id = idr_alloc(&rx_ring->bufs_idr, skb, 1,
+-+				   (rx_ring->bufs_max * 3) + 1, GFP_ATOMIC);
+- 		spin_unlock_bh(&rx_ring->idr_lock);
+--		if (buf_id < 0)
+-+		if (buf_id <= 0)
+- 			goto fail_dma_unmap;
+- 
+- 		desc = ath11k_hal_srng_src_get_next_entry(ab, srng);
+-@@ -2665,6 +2665,9 @@ try_again:
+- 				   cookie);
+- 		mac_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_PDEV_ID, cookie);
+- 
+-+		if (unlikely(buf_id == 0))
+-+			continue;
+-+
+- 		ar = ab->pdevs[mac_id].ar;
+- 		rx_ring = &ar->dp.rx_refill_buf_ring;
+- 		spin_lock_bh(&rx_ring->idr_lock);
+diff --git a/package/kernel/mac80211/patches/ath11k/0068-wifi-ath11k-Remove-disabling-of-80-80-and-160-MHz.patch b/package/kernel/mac80211/patches/ath11k/0068-wifi-ath11k-Remove-disabling-of-80-80-and-160-MHz.patch
+deleted file mode 100644
+index ce5ffd273b..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0068-wifi-ath11k-Remove-disabling-of-80-80-and-160-MHz.patch
++++ /dev/null
+@@ -1,49 +0,0 @@
+-From b100722a777f6455d913666a376f81342b2cb995 Mon Sep 17 00:00:00 2001
+-From: Muna Sinada <quic_msinada@quicinc.com>
+-Date: Mon, 17 Apr 2023 13:22:27 -0700
+-Subject: [PATCH] wifi: ath11k: Remove disabling of 80+80 and 160 MHz
+-
+-This is a regression fix for 80+80 and 160 MHz support bits being
+-cleared, therefore not adverised. Remove disable of 80+80 and 160 MHz
+-capability flags and assign valid center frequency 2 similar to
+-VHT80_80.
+-
+-Fixes: 38dfe775d0ab ("wifi: ath11k: push MU-MIMO params from hostapd to hardware")
+-Reported-by: Robert Marko <robert.marko@sartura.hr>
+-Tested-by: Robert Marko <robert.marko@sartura.hr> # IPQ8074 WLAN.HK.2.9.0.1-01385-QCAHKSWPL_SILICONZ-1
+-Link: https://bugzilla.kernel.org/show_bug.cgi?id=217299
+-Co-developed-by: P Praneesh <quic_ppranees@quicinc.com>
+-Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
+-Signed-off-by: Muna Sinada <quic_msinada@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/1681762947-13882-1-git-send-email-quic_msinada@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 4 ----
+- drivers/net/wireless/ath/ath11k/wmi.c | 3 ++-
+- 2 files changed, 2 insertions(+), 5 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -5585,10 +5585,6 @@ static int ath11k_mac_copy_he_cap(struct
+- 
+- 		he_cap_elem->mac_cap_info[1] &=
+- 			IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_MASK;
+--		he_cap_elem->phy_cap_info[0] &=
+--			~IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
+--		he_cap_elem->phy_cap_info[0] &=
+--			~IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G;
+- 
+- 		he_cap_elem->phy_cap_info[5] &=
+- 			~IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK;
+---- a/drivers/net/wireless/ath/ath11k/wmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
+-@@ -871,7 +871,8 @@ static void ath11k_wmi_put_wmi_channel(s
+- 
+- 		chan->band_center_freq2 = arg->channel.band_center_freq1;
+- 
+--	} else if (arg->channel.mode == MODE_11AC_VHT80_80) {
+-+	} else if ((arg->channel.mode == MODE_11AC_VHT80_80) ||
+-+		   (arg->channel.mode == MODE_11AX_HE80_80)) {
+- 		chan->band_center_freq2 = arg->channel.band_center_freq2;
+- 	} else {
+- 		chan->band_center_freq2 = 0;
+diff --git a/package/kernel/mac80211/patches/ath11k/0069-wifi-ath11k-fix-registration-of-6Ghz-only-phy-withou.patch b/package/kernel/mac80211/patches/ath11k/0069-wifi-ath11k-fix-registration-of-6Ghz-only-phy-withou.patch
+deleted file mode 100644
+index 32468dbc4c..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0069-wifi-ath11k-fix-registration-of-6Ghz-only-phy-withou.patch
++++ /dev/null
+@@ -1,61 +0,0 @@
+-From e2ceb1de2f83aafd8003f0b72dfd4b7441e97d14 Mon Sep 17 00:00:00 2001
+-From: Maxime Bizon <mbizon@freebox.fr>
+-Date: Fri, 21 Apr 2023 16:54:45 +0200
+-Subject: [PATCH] wifi: ath11k: fix registration of 6Ghz-only phy without the
+- full channel range
+-
+-Because of what seems to be a typo, a 6Ghz-only phy for which the BDF
+-does not allow the 7115Mhz channel will fail to register:
+-
+-  WARNING: CPU: 2 PID: 106 at net/wireless/core.c:907 wiphy_register+0x914/0x954
+-  Modules linked in: ath11k_pci sbsa_gwdt
+-  CPU: 2 PID: 106 Comm: kworker/u8:5 Not tainted 6.3.0-rc7-next-20230418-00549-g1e096a17625a-dirty #9
+-  Hardware name: Freebox V7R Board (DT)
+-  Workqueue: ath11k_qmi_driver_event ath11k_qmi_driver_event_work
+-  pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
+-  pc : wiphy_register+0x914/0x954
+-  lr : ieee80211_register_hw+0x67c/0xc10
+-  sp : ffffff800b123aa0
+-  x29: ffffff800b123aa0 x28: 0000000000000000 x27: 0000000000000000
+-  x26: 0000000000000000 x25: 0000000000000006 x24: ffffffc008d51418
+-  x23: ffffffc008cb0838 x22: ffffff80176c2460 x21: 0000000000000168
+-  x20: ffffff80176c0000 x19: ffffff80176c03e0 x18: 0000000000000014
+-  x17: 00000000cbef338c x16: 00000000d2a26f21 x15: 00000000ad6bb85f
+-  x14: 0000000000000020 x13: 0000000000000020 x12: 00000000ffffffbd
+-  x11: 0000000000000208 x10: 00000000fffffdf7 x9 : ffffffc009394718
+-  x8 : ffffff80176c0528 x7 : 000000007fffffff x6 : 0000000000000006
+-  x5 : 0000000000000005 x4 : ffffff800b304284 x3 : ffffff800b304284
+-  x2 : ffffff800b304d98 x1 : 0000000000000000 x0 : 0000000000000000
+-  Call trace:
+-   wiphy_register+0x914/0x954
+-   ieee80211_register_hw+0x67c/0xc10
+-   ath11k_mac_register+0x7c4/0xe10
+-   ath11k_core_qmi_firmware_ready+0x1f4/0x570
+-   ath11k_qmi_driver_event_work+0x198/0x590
+-   process_one_work+0x1b8/0x328
+-   worker_thread+0x6c/0x414
+-   kthread+0x100/0x104
+-   ret_from_fork+0x10/0x20
+-  ---[ end trace 0000000000000000 ]---
+-  ath11k_pci 0002:01:00.0: ieee80211 registration failed: -22
+-  ath11k_pci 0002:01:00.0: failed register the radio with mac80211: -22
+-  ath11k_pci 0002:01:00.0: failed to create pdev core: -22
+-
+-Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230421145445.2612280-1-mbizon@freebox.fr
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -8892,7 +8892,7 @@ static int ath11k_mac_setup_channels_rat
+- 	}
+- 
+- 	if (supported_bands & WMI_HOST_WLAN_5G_CAP) {
+--		if (reg_cap->high_5ghz_chan >= ATH11K_MAX_6G_FREQ) {
+-+		if (reg_cap->high_5ghz_chan >= ATH11K_MIN_6G_FREQ) {
+- 			channels = kmemdup(ath11k_6ghz_channels,
+- 					   sizeof(ath11k_6ghz_channels), GFP_KERNEL);
+- 			if (!channels) {
+diff --git a/package/kernel/mac80211/patches/ath11k/0070-wifi-ath-work-around-false-positive-stringop-overrea.patch b/package/kernel/mac80211/patches/ath11k/0070-wifi-ath-work-around-false-positive-stringop-overrea.patch
+deleted file mode 100644
+index aa4df16a90..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0070-wifi-ath-work-around-false-positive-stringop-overrea.patch
++++ /dev/null
+@@ -1,84 +0,0 @@
+-From 695df2f417d25202bdac9cde3c82d2acb6492b4d Mon Sep 17 00:00:00 2001
+-From: Arnd Bergmann <arnd@arndb.de>
+-Date: Fri, 5 May 2023 16:11:25 +0300
+-Subject: [PATCH] wifi: ath: work around false-positive stringop-overread
+- warning
+-
+-In a rare arm64 randconfig build, I got multiple warnings for ath11k
+-and ath12k:
+-
+-In function 'ath11k_peer_assoc_h_ht',
+-    inlined from 'ath11k_peer_assoc_prepare' at drivers/net/wireless/ath/ath11k/mac.c:2665:2:
+-drivers/net/wireless/ath/ath11k/mac.c:1709:13: error: 'ath11k_peer_assoc_h_ht_masked' reading 10 bytes from a region of size 0 [-Werror=stringop-overread]
+- 1709 |         if (ath11k_peer_assoc_h_ht_masked(ht_mcs_mask))
+-      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-
+-This happens whenever gcc-13 fails to inline one of the functions
+-that take a fixed-length array argument but gets passed a pointer.
+-
+-Change these functions to all take a regular pointer argument
+-instead.
+-
+-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230417205447.1800912-1-arnd@kernel.org
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 12 ++++++------
+- 1 file changed, 6 insertions(+), 6 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -433,7 +433,7 @@ u8 ath11k_mac_bitrate_to_idx(const struc
+- }
+- 
+- static u32
+--ath11k_mac_max_ht_nss(const u8 ht_mcs_mask[IEEE80211_HT_MCS_MASK_LEN])
+-+ath11k_mac_max_ht_nss(const u8 *ht_mcs_mask)
+- {
+- 	int nss;
+- 
+-@@ -445,7 +445,7 @@ ath11k_mac_max_ht_nss(const u8 ht_mcs_ma
+- }
+- 
+- static u32
+--ath11k_mac_max_vht_nss(const u16 vht_mcs_mask[NL80211_VHT_NSS_MAX])
+-+ath11k_mac_max_vht_nss(const u16 *vht_mcs_mask)
+- {
+- 	int nss;
+- 
+-@@ -457,7 +457,7 @@ ath11k_mac_max_vht_nss(const u16 vht_mcs
+- }
+- 
+- static u32
+--ath11k_mac_max_he_nss(const u16 he_mcs_mask[NL80211_HE_NSS_MAX])
+-+ath11k_mac_max_he_nss(const u16 *he_mcs_mask)
+- {
+- 	int nss;
+- 
+-@@ -1658,7 +1658,7 @@ static void ath11k_peer_assoc_h_rates(st
+- }
+- 
+- static bool
+--ath11k_peer_assoc_h_ht_masked(const u8 ht_mcs_mask[IEEE80211_HT_MCS_MASK_LEN])
+-+ath11k_peer_assoc_h_ht_masked(const u8 *ht_mcs_mask)
+- {
+- 	int nss;
+- 
+-@@ -1670,7 +1670,7 @@ ath11k_peer_assoc_h_ht_masked(const u8 h
+- }
+- 
+- static bool
+--ath11k_peer_assoc_h_vht_masked(const u16 vht_mcs_mask[])
+-+ath11k_peer_assoc_h_vht_masked(const u16 *vht_mcs_mask)
+- {
+- 	int nss;
+- 
+-@@ -2065,7 +2065,7 @@ static u16 ath11k_peer_assoc_h_he_limit(
+- }
+- 
+- static bool
+--ath11k_peer_assoc_h_he_masked(const u16 he_mcs_mask[NL80211_HE_NSS_MAX])
+-+ath11k_peer_assoc_h_he_masked(const u16 *he_mcs_mask)
+- {
+- 	int nss;
+- 
+diff --git a/package/kernel/mac80211/patches/ath11k/0071-wifi-ath11k-driver-settings-for-MBSSID-and-EMA.patch b/package/kernel/mac80211/patches/ath11k/0071-wifi-ath11k-driver-settings-for-MBSSID-and-EMA.patch
+deleted file mode 100644
+index bede4819ca..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0071-wifi-ath11k-driver-settings-for-MBSSID-and-EMA.patch
++++ /dev/null
+@@ -1,133 +0,0 @@
+-From a08dbb04d7365a04d52882143cf196005bfc88c3 Mon Sep 17 00:00:00 2001
+-From: Aloka Dixit <quic_alokad@quicinc.com>
+-Date: Fri, 5 May 2023 16:11:27 +0300
+-Subject: [PATCH 71/77] wifi: ath11k: driver settings for MBSSID and EMA
+-
+-Advertise the driver support for multiple BSSID (MBSSID) and
+-enhanced multi-BSSID advertisements (EMA) by setting extended
+-capabilities.
+-
+-Configure mbssid_max_interfaces and ema_max_profile_periodicity
+-fields in structure wiphy which are used to advertise maximum number
+-of interfaces and profile periodicity supported by the driver.
+-
+-Add new WMI fields to configure maximum vdev count supported for
+-MBSSID and profile periodicity in case of EMA.
+-Setting WMI_RSRC_CFG_FLAG2_CALC_NEXT_DTIM_COUNT_SET flag
+-indicates that the firmware should track and update the DTIM counts
+-for each non-transmitted profile.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Aloka Dixit <quic_alokad@quicinc.com>
+-Co-developed-by: John Crispin <john@phrozen.org>
+-Signed-off-by: John Crispin <john@phrozen.org>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230405221648.17950-2-quic_alokad@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/hw.c  | 3 +++
+- drivers/net/wireless/ath/ath11k/hw.h  | 1 +
+- drivers/net/wireless/ath/ath11k/mac.c | 7 +++++++
+- drivers/net/wireless/ath/ath11k/wmi.c | 3 +++
+- drivers/net/wireless/ath/ath11k/wmi.h | 6 ++++++
+- 5 files changed, 20 insertions(+)
+-
+---- a/drivers/net/wireless/ath/ath11k/hw.c
+-+++ b/drivers/net/wireless/ath/ath11k/hw.c
+-@@ -202,6 +202,9 @@ static void ath11k_init_wmi_config_ipq80
+- 	config->twt_ap_sta_count = 1000;
+- 	config->flag1 |= WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64;
+- 	config->flag1 |= WMI_RSRC_CFG_FLAG1_ACK_RSSI;
+-+	config->ema_max_vap_cnt = ab->num_radios;
+-+	config->ema_max_profile_period = TARGET_EMA_MAX_PROFILE_PERIOD;
+-+	config->beacon_tx_offload_max_vdev += config->ema_max_vap_cnt;
+- }
+- 
+- static int ath11k_hw_mac_id_to_pdev_id_ipq8074(struct ath11k_hw_params *hw,
+---- a/drivers/net/wireless/ath/ath11k/hw.h
+-+++ b/drivers/net/wireless/ath/ath11k/hw.h
+-@@ -64,6 +64,7 @@
+- #define TARGET_NUM_WDS_ENTRIES		32
+- #define TARGET_DMA_BURST_SIZE		1
+- #define TARGET_RX_BATCHMODE		1
+-+#define TARGET_EMA_MAX_PROFILE_PERIOD	8
+- 
+- #define ATH11K_HW_MAX_QUEUES		4
+- #define ATH11K_QUEUE_LEN		4096
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -9001,19 +9001,23 @@ static int ath11k_mac_setup_iface_combin
+- 
+- static const u8 ath11k_if_types_ext_capa[] = {
+- 	[0] = WLAN_EXT_CAPA1_EXT_CHANNEL_SWITCHING,
+-+	[2] = WLAN_EXT_CAPA3_MULTI_BSSID_SUPPORT,
+- 	[7] = WLAN_EXT_CAPA8_OPMODE_NOTIF,
+- };
+- 
+- static const u8 ath11k_if_types_ext_capa_sta[] = {
+- 	[0] = WLAN_EXT_CAPA1_EXT_CHANNEL_SWITCHING,
+-+	[2] = WLAN_EXT_CAPA3_MULTI_BSSID_SUPPORT,
+- 	[7] = WLAN_EXT_CAPA8_OPMODE_NOTIF,
+- 	[9] = WLAN_EXT_CAPA10_TWT_REQUESTER_SUPPORT,
+- };
+- 
+- static const u8 ath11k_if_types_ext_capa_ap[] = {
+- 	[0] = WLAN_EXT_CAPA1_EXT_CHANNEL_SWITCHING,
+-+	[2] = WLAN_EXT_CAPA3_MULTI_BSSID_SUPPORT,
+- 	[7] = WLAN_EXT_CAPA8_OPMODE_NOTIF,
+- 	[9] = WLAN_EXT_CAPA10_TWT_RESPONDER_SUPPORT,
+-+	[10] = WLAN_EXT_CAPA11_EMA_SUPPORT,
+- };
+- 
+- static const struct wiphy_iftype_ext_capab ath11k_iftypes_ext_capa[] = {
+-@@ -9251,6 +9255,9 @@ static int __ath11k_mac_register(struct
+- 		wiphy_ext_feature_set(ar->hw->wiphy,
+- 				      NL80211_EXT_FEATURE_ENABLE_FTM_RESPONDER);
+- 
+-+	ar->hw->wiphy->mbssid_max_interfaces = TARGET_NUM_VDEVS(ab);
+-+	ar->hw->wiphy->ema_max_profile_periodicity = TARGET_EMA_MAX_PROFILE_PERIOD;
+-+
+- 	ath11k_reg_init(ar);
+- 
+- 	if (!test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags)) {
+---- a/drivers/net/wireless/ath/ath11k/wmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
+-@@ -3987,6 +3987,9 @@ ath11k_wmi_copy_resource_config(struct w
+- 		~(1 << WMI_CFG_HOST_SERVICE_FLAG_REG_CC_EXT);
+- 	wmi_cfg->host_service_flags |= (tg_cfg->is_reg_cc_ext_event_supported <<
+- 					WMI_CFG_HOST_SERVICE_FLAG_REG_CC_EXT);
+-+	wmi_cfg->flags2 = WMI_RSRC_CFG_FLAG2_CALC_NEXT_DTIM_COUNT_SET;
+-+	wmi_cfg->ema_max_vap_cnt = tg_cfg->ema_max_vap_cnt;
+-+	wmi_cfg->ema_max_profile_period = tg_cfg->ema_max_profile_period;
+- }
+- 
+- static int ath11k_init_cmd_send(struct ath11k_pdev_wmi *wmi,
+---- a/drivers/net/wireless/ath/ath11k/wmi.h
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.h
+-@@ -2317,6 +2317,7 @@ struct wmi_init_cmd {
+- } __packed;
+- 
+- #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5)
+-+#define WMI_RSRC_CFG_FLAG2_CALC_NEXT_DTIM_COUNT_SET BIT(9)
+- #define WMI_RSRC_CFG_FLAG1_ACK_RSSI BIT(18)
+- 
+- #define WMI_CFG_HOST_SERVICE_FLAG_REG_CC_EXT 4
+-@@ -2389,6 +2390,9 @@ struct wmi_resource_config {
+- 	u32 msdu_flow_override_config1;
+- 	u32 flags2;
+- 	u32 host_service_flags;
+-+	u32 max_rnr_neighbours;
+-+	u32 ema_max_vap_cnt;
+-+	u32 ema_max_profile_period;
+- } __packed;
+- 
+- struct wmi_service_ready_event {
+-@@ -5646,6 +5650,8 @@ struct target_resource_config {
+- 	u32 twt_ap_pdev_count;
+- 	u32 twt_ap_sta_count;
+- 	u8 is_reg_cc_ext_event_supported;
+-+	u32 ema_max_vap_cnt;
+-+	u32 ema_max_profile_period;
+- };
+- 
+- enum wmi_debug_log_param {
+diff --git a/package/kernel/mac80211/patches/ath11k/0072-wifi-ath11k-MBSSID-configuration-during-vdev-create-.patch b/package/kernel/mac80211/patches/ath11k/0072-wifi-ath11k-MBSSID-configuration-during-vdev-create-.patch
+deleted file mode 100644
+index 4ba0717319..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0072-wifi-ath11k-MBSSID-configuration-during-vdev-create-.patch
++++ /dev/null
+@@ -1,215 +0,0 @@
+-From 5a81610acf66c4ad6e1a1fbd09f3f555fca863b1 Mon Sep 17 00:00:00 2001
+-From: Aloka Dixit <quic_alokad@quicinc.com>
+-Date: Fri, 5 May 2023 16:11:27 +0300
+-Subject: [PATCH 72/77] wifi: ath11k: MBSSID configuration during vdev
+- create/start
+-
+-Configure multiple BSSID flags and index of the transmitting interface
+-in vdev create/start commands depending on the service bit
+-WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Aloka Dixit <quic_alokad@quicinc.com>
+-Co-developed-by: John Crispin <john@phrozen.org>
+-Signed-off-by: John Crispin <john@phrozen.org>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230405221648.17950-3-quic_alokad@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 70 +++++++++++++++++++++++++--
+- drivers/net/wireless/ath/ath11k/wmi.c |  5 ++
+- drivers/net/wireless/ath/ath11k/wmi.h | 19 ++++++++
+- 3 files changed, 90 insertions(+), 4 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -6181,17 +6181,62 @@ static void ath11k_mac_op_stop(struct ie
+- 	atomic_set(&ar->num_pending_mgmt_tx, 0);
+- }
+- 
+--static void
+--ath11k_mac_setup_vdev_create_params(struct ath11k_vif *arvif,
+--				    struct vdev_create_params *params)
+-+static int ath11k_mac_setup_vdev_params_mbssid(struct ath11k_vif *arvif,
+-+					       u32 *flags, u32 *tx_vdev_id)
+-+{
+-+	struct ath11k *ar = arvif->ar;
+-+	struct ath11k_vif *tx_arvif;
+-+	struct ieee80211_vif *tx_vif;
+-+
+-+	*tx_vdev_id = 0;
+-+	tx_vif = arvif->vif->mbssid_tx_vif;
+-+	if (!tx_vif) {
+-+		*flags = WMI_HOST_VDEV_FLAGS_NON_MBSSID_AP;
+-+		return 0;
+-+	}
+-+
+-+	tx_arvif = (void *)tx_vif->drv_priv;
+-+
+-+	if (arvif->vif->bss_conf.nontransmitted) {
+-+		if (ar->hw->wiphy != ieee80211_vif_to_wdev(tx_vif)->wiphy)
+-+			return -EINVAL;
+-+
+-+		*flags = WMI_HOST_VDEV_FLAGS_NON_TRANSMIT_AP;
+-+		*tx_vdev_id = ath11k_vif_to_arvif(tx_vif)->vdev_id;
+-+	} else if (tx_arvif == arvif) {
+-+		*flags = WMI_HOST_VDEV_FLAGS_TRANSMIT_AP;
+-+	} else {
+-+		return -EINVAL;
+-+	}
+-+
+-+	if (arvif->vif->bss_conf.ema_ap)
+-+		*flags |= WMI_HOST_VDEV_FLAGS_EMA_MODE;
+-+
+-+	return 0;
+-+}
+-+
+-+static int ath11k_mac_setup_vdev_create_params(struct ath11k_vif *arvif,
+-+					       struct vdev_create_params *params)
+- {
+- 	struct ath11k *ar = arvif->ar;
+- 	struct ath11k_pdev *pdev = ar->pdev;
+-+	int ret;
+- 
+- 	params->if_id = arvif->vdev_id;
+- 	params->type = arvif->vdev_type;
+- 	params->subtype = arvif->vdev_subtype;
+- 	params->pdev_id = pdev->pdev_id;
+-+	params->mbssid_flags = 0;
+-+	params->mbssid_tx_vdev_id = 0;
+-+
+-+	if (!test_bit(WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT,
+-+		      ar->ab->wmi_ab.svc_map)) {
+-+		ret = ath11k_mac_setup_vdev_params_mbssid(arvif,
+-+							  &params->mbssid_flags,
+-+							  &params->mbssid_tx_vdev_id);
+-+		if (ret)
+-+			return ret;
+-+	}
+- 
+- 	if (pdev->cap.supported_bands & WMI_HOST_WLAN_2G_CAP) {
+- 		params->chains[NL80211_BAND_2GHZ].tx = ar->num_tx_chains;
+-@@ -6206,6 +6251,7 @@ ath11k_mac_setup_vdev_create_params(stru
+- 		params->chains[NL80211_BAND_6GHZ].tx = ar->num_tx_chains;
+- 		params->chains[NL80211_BAND_6GHZ].rx = ar->num_rx_chains;
+- 	}
+-+	return 0;
+- }
+- 
+- static void ath11k_mac_op_update_vif_offload(struct ieee80211_hw *hw,
+-@@ -6500,7 +6546,12 @@ static int ath11k_mac_op_add_interface(s
+- 	for (i = 0; i < ARRAY_SIZE(vif->hw_queue); i++)
+- 		vif->hw_queue[i] = i % (ATH11K_HW_MAX_QUEUES - 1);
+- 
+--	ath11k_mac_setup_vdev_create_params(arvif, &vdev_param);
+-+	ret = ath11k_mac_setup_vdev_create_params(arvif, &vdev_param);
+-+	if (ret) {
+-+		ath11k_warn(ab, "failed to create vdev parameters %d: %d\n",
+-+			    arvif->vdev_id, ret);
+-+		goto err;
+-+	}
+- 
+- 	ret = ath11k_wmi_vdev_create(ar, vif->addr, &vdev_param);
+- 	if (ret) {
+-@@ -6905,6 +6956,17 @@ ath11k_mac_vdev_start_restart(struct ath
+- 	arg.pref_tx_streams = ar->num_tx_chains;
+- 	arg.pref_rx_streams = ar->num_rx_chains;
+- 
+-+	arg.mbssid_flags = 0;
+-+	arg.mbssid_tx_vdev_id = 0;
+-+	if (test_bit(WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT,
+-+		     ar->ab->wmi_ab.svc_map)) {
+-+		ret = ath11k_mac_setup_vdev_params_mbssid(arvif,
+-+							  &arg.mbssid_flags,
+-+							  &arg.mbssid_tx_vdev_id);
+-+		if (ret)
+-+			return ret;
+-+	}
+-+
+- 	if (arvif->vdev_type == WMI_VDEV_TYPE_AP) {
+- 		arg.ssid = arvif->u.ap.ssid;
+- 		arg.ssid_len = arvif->u.ap.ssid_len;
+---- a/drivers/net/wireless/ath/ath11k/wmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
+-@@ -724,6 +724,9 @@ int ath11k_wmi_vdev_create(struct ath11k
+- 	cmd->vdev_subtype = param->subtype;
+- 	cmd->num_cfg_txrx_streams = WMI_NUM_SUPPORTED_BAND_MAX;
+- 	cmd->pdev_id = param->pdev_id;
+-+	cmd->mbssid_flags = param->mbssid_flags;
+-+	cmd->mbssid_tx_vdev_id = param->mbssid_tx_vdev_id;
+-+
+- 	ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
+- 
+- 	ptr = skb->data + sizeof(*cmd);
+-@@ -941,6 +944,8 @@ int ath11k_wmi_vdev_start(struct ath11k
+- 	cmd->cac_duration_ms = arg->cac_duration_ms;
+- 	cmd->regdomain = arg->regdomain;
+- 	cmd->he_ops = arg->he_ops;
+-+	cmd->mbssid_flags = arg->mbssid_flags;
+-+	cmd->mbssid_tx_vdev_id = arg->mbssid_tx_vdev_id;
+- 
+- 	if (!restart) {
+- 		if (arg->ssid) {
+---- a/drivers/net/wireless/ath/ath11k/wmi.h
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.h
+-@@ -137,6 +137,14 @@ enum {
+- 	WMI_AUTORATE_3200NS_GI = BIT(11),
+- };
+- 
+-+enum {
+-+	WMI_HOST_VDEV_FLAGS_NON_MBSSID_AP       = 0x00000001,
+-+	WMI_HOST_VDEV_FLAGS_TRANSMIT_AP         = 0x00000002,
+-+	WMI_HOST_VDEV_FLAGS_NON_TRANSMIT_AP     = 0x00000004,
+-+	WMI_HOST_VDEV_FLAGS_EMA_MODE            = 0x00000008,
+-+	WMI_HOST_VDEV_FLAGS_SCAN_MODE_VAP       = 0x00000010,
+-+};
+-+
+- /*
+-  * wmi command groups.
+-  */
+-@@ -2096,6 +2104,7 @@ enum wmi_tlv_service {
+- 	WMI_TLV_SERVICE_EXT2_MSG = 220,
+- 	WMI_TLV_SERVICE_PEER_POWER_SAVE_DURATION_SUPPORT = 246,
+- 	WMI_TLV_SERVICE_SRG_SRP_SPATIAL_REUSE_SUPPORT = 249,
+-+	WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT = 253,
+- 	WMI_TLV_SERVICE_PASSIVE_SCAN_START_TIME_ENHANCE = 263,
+- 
+- 	/* The second 128 bits */
+-@@ -2583,6 +2592,8 @@ struct vdev_create_params {
+- 		u8 rx;
+- 	} chains[NUM_NL80211_BANDS];
+- 	u32 pdev_id;
+-+	u32 mbssid_flags;
+-+	u32 mbssid_tx_vdev_id;
+- };
+- 
+- struct wmi_vdev_create_cmd {
+-@@ -2593,6 +2604,8 @@ struct wmi_vdev_create_cmd {
+- 	struct wmi_mac_addr vdev_macaddr;
+- 	u32 num_cfg_txrx_streams;
+- 	u32 pdev_id;
+-+	u32 mbssid_flags;
+-+	u32 mbssid_tx_vdev_id;
+- } __packed;
+- 
+- struct wmi_vdev_txrx_streams {
+-@@ -2656,6 +2669,9 @@ struct wmi_vdev_start_request_cmd {
+- 	u32 he_ops;
+- 	u32 cac_duration_ms;
+- 	u32 regdomain;
+-+	u32 min_data_rate;
+-+	u32 mbssid_flags;
+-+	u32 mbssid_tx_vdev_id;
+- } __packed;
+- 
+- #define MGMT_TX_DL_FRM_LEN		     64
+-@@ -2825,6 +2841,9 @@ struct wmi_vdev_start_req_arg {
+- 	u32 pref_rx_streams;
+- 	u32 pref_tx_streams;
+- 	u32 num_noa_descriptors;
+-+	u32 min_data_rate;
+-+	u32 mbssid_flags;
+-+	u32 mbssid_tx_vdev_id;
+- };
+- 
+- struct peer_create_params {
+diff --git a/package/kernel/mac80211/patches/ath11k/0073-wifi-ath11k-rename-MBSSID-fields-in-wmi_vdev_up_cmd.patch b/package/kernel/mac80211/patches/ath11k/0073-wifi-ath11k-rename-MBSSID-fields-in-wmi_vdev_up_cmd.patch
+deleted file mode 100644
+index 023a1dbb9f..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0073-wifi-ath11k-rename-MBSSID-fields-in-wmi_vdev_up_cmd.patch
++++ /dev/null
+@@ -1,52 +0,0 @@
+-From cf604e72bc6e6db68c7fcaa8779b03ec14b8d2fa Mon Sep 17 00:00:00 2001
+-From: Aloka Dixit <quic_alokad@quicinc.com>
+-Date: Fri, 5 May 2023 16:11:27 +0300
+-Subject: [PATCH 73/77] wifi: ath11k: rename MBSSID fields in wmi_vdev_up_cmd
+-
+-Rename trans_bssid to tx_vdev_bssid to make it similar to vdev_bssid.
+-
+-Rename profile_num to nontx_profile_cnt, and profile_idx to
+-nontx_profile_idx which makes it clear that these store configurations
+-related to MBSSID non-transmitting profiles.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Aloka Dixit <quic_alokad@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230405221648.17950-4-quic_alokad@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/wmi.c | 6 +++---
+- drivers/net/wireless/ath/ath11k/wmi.h | 6 +++---
+- 2 files changed, 6 insertions(+), 6 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/wmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
+-@@ -1029,10 +1029,10 @@ int ath11k_wmi_vdev_up(struct ath11k *ar
+- 		bss_conf = &arvif->vif->bss_conf;
+- 
+- 		if (bss_conf->nontransmitted) {
+--			ether_addr_copy(cmd->trans_bssid.addr,
+-+			ether_addr_copy(cmd->tx_vdev_bssid.addr,
+- 					bss_conf->transmitter_bssid);
+--			cmd->profile_idx = bss_conf->bssid_index;
+--			cmd->profile_num = bss_conf->bssid_indicator;
+-+			cmd->nontx_profile_idx = bss_conf->bssid_index;
+-+			cmd->nontx_profile_cnt = bss_conf->bssid_indicator;
+- 		}
+- 	}
+- 
+---- a/drivers/net/wireless/ath/ath11k/wmi.h
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.h
+-@@ -2625,9 +2625,9 @@ struct wmi_vdev_up_cmd {
+- 	u32 vdev_id;
+- 	u32 vdev_assoc_id;
+- 	struct wmi_mac_addr vdev_bssid;
+--	struct wmi_mac_addr trans_bssid;
+--	u32 profile_idx;
+--	u32 profile_num;
+-+	struct wmi_mac_addr tx_vdev_bssid;
+-+	u32 nontx_profile_idx;
+-+	u32 nontx_profile_cnt;
+- } __packed;
+- 
+- struct wmi_vdev_stop_cmd {
+diff --git a/package/kernel/mac80211/patches/ath11k/0074-wifi-ath11k-MBSSID-parameter-configuration-in-AP-mod.patch b/package/kernel/mac80211/patches/ath11k/0074-wifi-ath11k-MBSSID-parameter-configuration-in-AP-mod.patch
+deleted file mode 100644
+index d93e27dd42..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0074-wifi-ath11k-MBSSID-parameter-configuration-in-AP-mod.patch
++++ /dev/null
+@@ -1,138 +0,0 @@
+-From c82dc33f252fd8883be66f2d0230af0fd734c683 Mon Sep 17 00:00:00 2001
+-From: Aloka Dixit <quic_alokad@quicinc.com>
+-Date: Fri, 5 May 2023 16:11:27 +0300
+-Subject: [PATCH 74/77] wifi: ath11k: MBSSID parameter configuration in AP mode
+-
+-Include MBSSID parameters in WMI vdev up operation.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Aloka Dixit <quic_alokad@quicinc.com>
+-Co-developed-by: John Crispin <john@phrozen.org>
+-Signed-off-by: John Crispin <john@phrozen.org>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230405221648.17950-5-quic_alokad@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 29 +++++++++++++++++++++------
+- drivers/net/wireless/ath/ath11k/wmi.c |  8 +++++++-
+- drivers/net/wireless/ath/ath11k/wmi.h |  3 ++-
+- 3 files changed, 32 insertions(+), 8 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -964,7 +964,7 @@ static int ath11k_mac_monitor_vdev_start
+- 		return ret;
+- 	}
+- 
+--	ret = ath11k_wmi_vdev_up(ar, vdev_id, 0, ar->mac_addr);
+-+	ret = ath11k_wmi_vdev_up(ar, vdev_id, 0, ar->mac_addr, NULL, 0, 0);
+- 	if (ret) {
+- 		ath11k_warn(ar->ab, "failed to put up monitor vdev %i: %d\n",
+- 			    vdev_id, ret);
+-@@ -1423,6 +1423,7 @@ static void ath11k_control_beaconing(str
+- 				     struct ieee80211_bss_conf *info)
+- {
+- 	struct ath11k *ar = arvif->ar;
+-+	struct ath11k_vif *tx_arvif = NULL;
+- 	int ret = 0;
+- 
+- 	lockdep_assert_held(&arvif->ar->conf_mutex);
+-@@ -1451,8 +1452,14 @@ static void ath11k_control_beaconing(str
+- 
+- 	ether_addr_copy(arvif->bssid, info->bssid);
+- 
+-+	if (arvif->vif->mbssid_tx_vif)
+-+		tx_arvif = (struct ath11k_vif *)arvif->vif->mbssid_tx_vif->drv_priv;
+-+
+- 	ret = ath11k_wmi_vdev_up(arvif->ar, arvif->vdev_id, arvif->aid,
+--				 arvif->bssid);
+-+				 arvif->bssid,
+-+				 tx_arvif ? tx_arvif->bssid : NULL,
+-+				 info->bssid_index,
+-+				 1 << info->bssid_indicator);
+- 	if (ret) {
+- 		ath11k_warn(ar->ab, "failed to bring up vdev %d: %i\n",
+- 			    arvif->vdev_id, ret);
+-@@ -2879,7 +2886,8 @@ static void ath11k_bss_assoc(struct ieee
+- 	arvif->aid = vif->cfg.aid;
+- 	ether_addr_copy(arvif->bssid, bss_conf->bssid);
+- 
+--	ret = ath11k_wmi_vdev_up(ar, arvif->vdev_id, arvif->aid, arvif->bssid);
+-+	ret = ath11k_wmi_vdev_up(ar, arvif->vdev_id, arvif->aid, arvif->bssid,
+-+				 NULL, 0, 0);
+- 	if (ret) {
+- 		ath11k_warn(ar->ab, "failed to set vdev %d up: %d\n",
+- 			    arvif->vdev_id, ret);
+-@@ -7133,7 +7141,8 @@ ath11k_mac_update_vif_chan(struct ath11k
+- 			   int n_vifs)
+- {
+- 	struct ath11k_base *ab = ar->ab;
+--	struct ath11k_vif *arvif;
+-+	struct ath11k_vif *arvif, *tx_arvif = NULL;
+-+	struct ieee80211_vif *mbssid_tx_vif;
+- 	int ret;
+- 	int i;
+- 	bool monitor_vif = false;
+-@@ -7187,8 +7196,15 @@ ath11k_mac_update_vif_chan(struct ath11k
+- 			ath11k_warn(ab, "failed to update bcn tmpl during csa: %d\n",
+- 				    ret);
+- 
+-+		mbssid_tx_vif = arvif->vif->mbssid_tx_vif;
+-+		if (mbssid_tx_vif)
+-+			tx_arvif = (struct ath11k_vif *)mbssid_tx_vif->drv_priv;
+-+
+- 		ret = ath11k_wmi_vdev_up(arvif->ar, arvif->vdev_id, arvif->aid,
+--					 arvif->bssid);
+-+					 arvif->bssid,
+-+					 tx_arvif ? tx_arvif->bssid : NULL,
+-+					 arvif->vif->bss_conf.bssid_index,
+-+					 1 << arvif->vif->bss_conf.bssid_indicator);
+- 		if (ret) {
+- 			ath11k_warn(ab, "failed to bring vdev up %d: %d\n",
+- 				    arvif->vdev_id, ret);
+-@@ -7306,7 +7322,8 @@ static int ath11k_start_vdev_delay(struc
+- 	}
+- 
+- 	if (arvif->vdev_type == WMI_VDEV_TYPE_MONITOR) {
+--		ret = ath11k_wmi_vdev_up(ar, arvif->vdev_id, 0, ar->mac_addr);
+-+		ret = ath11k_wmi_vdev_up(ar, arvif->vdev_id, 0, ar->mac_addr,
+-+					 NULL, 0, 0);
+- 		if (ret) {
+- 			ath11k_warn(ab, "failed put monitor up: %d\n", ret);
+- 			return ret;
+---- a/drivers/net/wireless/ath/ath11k/wmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
+-@@ -1001,7 +1001,8 @@ int ath11k_wmi_vdev_start(struct ath11k
+- 	return ret;
+- }
+- 
+--int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid, const u8 *bssid)
+-+int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid, const u8 *bssid,
+-+		       u8 *tx_bssid, u32 nontx_profile_idx, u32 nontx_profile_cnt)
+- {
+- 	struct ath11k_pdev_wmi *wmi = ar->wmi;
+- 	struct wmi_vdev_up_cmd *cmd;
+-@@ -1025,6 +1026,11 @@ int ath11k_wmi_vdev_up(struct ath11k *ar
+- 
+- 	ether_addr_copy(cmd->vdev_bssid.addr, bssid);
+- 
+-+	cmd->nontx_profile_idx = nontx_profile_idx;
+-+	cmd->nontx_profile_cnt = nontx_profile_cnt;
+-+	if (tx_bssid)
+-+		ether_addr_copy(cmd->tx_vdev_bssid.addr, tx_bssid);
+-+
+- 	if (arvif && arvif->vif->type == NL80211_IFTYPE_STATION) {
+- 		bss_conf = &arvif->vif->bss_conf;
+- 
+---- a/drivers/net/wireless/ath/ath11k/wmi.h
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.h
+-@@ -6301,7 +6301,8 @@ int ath11k_wmi_bcn_tmpl(struct ath11k *a
+- 			struct sk_buff *bcn);
+- int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id);
+- int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid,
+--		       const u8 *bssid);
+-+		       const u8 *bssid, u8 *tx_bssid, u32 nontx_profile_idx,
+-+		       u32 nontx_profile_cnt);
+- int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id);
+- int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg,
+- 			  bool restart);
+diff --git a/package/kernel/mac80211/patches/ath11k/0075-wifi-ath11k-refactor-vif-parameter-configurations.patch b/package/kernel/mac80211/patches/ath11k/0075-wifi-ath11k-refactor-vif-parameter-configurations.patch
+deleted file mode 100644
+index 8509e55978..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0075-wifi-ath11k-refactor-vif-parameter-configurations.patch
++++ /dev/null
+@@ -1,86 +0,0 @@
+-From cb9bea773c85e372931cd7a177db4165adf29d95 Mon Sep 17 00:00:00 2001
+-From: Aloka Dixit <quic_alokad@quicinc.com>
+-Date: Fri, 5 May 2023 16:11:28 +0300
+-Subject: [PATCH 75/77] wifi: ath11k: refactor vif parameter configurations
+-
+-Security parameters for each non-transmitting profile can be
+-different when MBSSID is enabled and this information is included
+-in the MBSSID element in the Beacon frame. Current implementation
+-to set rsnie_present and wpaie_present does not parse this element
+-hence it applies only to the transmitting interface.
+-
+-Move the code to a separate function to make additions for
+-non-transmitting interfaces cleaner.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Aloka Dixit <quic_alokad@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230405221648.17950-6-quic_alokad@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 41 ++++++++++++++++-----------
+- 1 file changed, 24 insertions(+), 17 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -1351,28 +1351,14 @@ err_mon_del:
+- 	return ret;
+- }
+- 
+--static int ath11k_mac_setup_bcn_tmpl(struct ath11k_vif *arvif)
+-+static void ath11k_mac_set_vif_params(struct ath11k_vif *arvif,
+-+				      struct sk_buff *bcn)
+- {
+--	struct ath11k *ar = arvif->ar;
+--	struct ath11k_base *ab = ar->ab;
+--	struct ieee80211_hw *hw = ar->hw;
+--	struct ieee80211_vif *vif = arvif->vif;
+--	struct ieee80211_mutable_offsets offs = {};
+--	struct sk_buff *bcn;
+- 	struct ieee80211_mgmt *mgmt;
+- 	u8 *ies;
+--	int ret;
+--
+--	if (arvif->vdev_type != WMI_VDEV_TYPE_AP)
+--		return 0;
+--
+--	bcn = ieee80211_beacon_get_template(hw, vif, &offs, 0);
+--	if (!bcn) {
+--		ath11k_warn(ab, "failed to get beacon template from mac80211\n");
+--		return -EPERM;
+--	}
+- 
+- 	ies = bcn->data + ieee80211_get_hdrlen_from_skb(bcn);
+-+	mgmt = (struct ieee80211_mgmt *)bcn->data;
+- 	ies += sizeof(mgmt->u.beacon);
+- 
+- 	if (cfg80211_find_ie(WLAN_EID_RSN, ies, (skb_tail_pointer(bcn) - ies)))
+-@@ -1386,7 +1372,28 @@ static int ath11k_mac_setup_bcn_tmpl(str
+- 		arvif->wpaie_present = true;
+- 	else
+- 		arvif->wpaie_present = false;
+-+}
+-+
+-+static int ath11k_mac_setup_bcn_tmpl(struct ath11k_vif *arvif)
+-+{
+-+	struct ath11k *ar = arvif->ar;
+-+	struct ath11k_base *ab = ar->ab;
+-+	struct ieee80211_hw *hw = ar->hw;
+-+	struct ieee80211_vif *vif = arvif->vif;
+-+	struct ieee80211_mutable_offsets offs = {};
+-+	struct sk_buff *bcn;
+-+	int ret;
+-+
+-+	if (arvif->vdev_type != WMI_VDEV_TYPE_AP)
+-+		return 0;
+-+
+-+	bcn = ieee80211_beacon_get_template(hw, vif, &offs, 0);
+-+	if (!bcn) {
+-+		ath11k_warn(ab, "failed to get beacon template from mac80211\n");
+-+		return -EPERM;
+-+	}
+- 
+-+	ath11k_mac_set_vif_params(arvif, bcn);
+- 	ret = ath11k_wmi_bcn_tmpl(ar, arvif->vdev_id, &offs, bcn);
+- 
+- 	kfree_skb(bcn);
+diff --git a/package/kernel/mac80211/patches/ath11k/0076-wifi-ath11k-MBSSID-beacon-support.patch b/package/kernel/mac80211/patches/ath11k/0076-wifi-ath11k-MBSSID-beacon-support.patch
+deleted file mode 100644
+index d23ea8deea..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0076-wifi-ath11k-MBSSID-beacon-support.patch
++++ /dev/null
+@@ -1,190 +0,0 @@
+-From 335a92765d308dfe22826f5562cd4b4389b45e71 Mon Sep 17 00:00:00 2001
+-From: Aloka Dixit <quic_alokad@quicinc.com>
+-Date: Fri, 5 May 2023 16:11:28 +0300
+-Subject: [PATCH 76/77] wifi: ath11k: MBSSID beacon support
+-
+-- Split ath11k_mac_setup_bcn_tmpl() to move the beacon retrieval and
+-  WMI command to a new function, ath11k_mac_setup_bcn_tmpl_legacy().
+-  In the original function add checks to use the transmitting interface
+-  when MBSSID is enabled.
+-- Set rsnie_present and wpaie_present fields for the non-transmitting
+-  interfaces when MBSSID is enabled.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Aloka Dixit <quic_alokad@quicinc.com>
+-Co-developed-by: John Crispin <john@phrozen.org>
+-Signed-off-by: John Crispin <john@phrozen.org>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230405221648.17950-7-quic_alokad@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 116 ++++++++++++++++++++++++--
+- drivers/net/wireless/ath/ath11k/wmi.c |   1 +
+- 2 files changed, 112 insertions(+), 5 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -1351,6 +1351,84 @@ err_mon_del:
+- 	return ret;
+- }
+- 
+-+static void ath11k_mac_setup_nontx_vif_rsnie(struct ath11k_vif *arvif,
+-+					     bool tx_arvif_rsnie_present,
+-+					     const u8 *profile, u8 profile_len)
+-+{
+-+	if (cfg80211_find_ie(WLAN_EID_RSN, profile, profile_len)) {
+-+		arvif->rsnie_present = true;
+-+	} else if (tx_arvif_rsnie_present) {
+-+		int i;
+-+		u8 nie_len;
+-+		const u8 *nie = cfg80211_find_ext_ie(WLAN_EID_EXT_NON_INHERITANCE,
+-+						     profile, profile_len);
+-+		if (!nie)
+-+			return;
+-+
+-+		nie_len = nie[1];
+-+		nie += 2;
+-+		for (i = 0; i < nie_len; i++) {
+-+			if (nie[i] == WLAN_EID_RSN) {
+-+				arvif->rsnie_present = false;
+-+				break;
+-+			}
+-+		}
+-+	}
+-+}
+-+
+-+static bool ath11k_mac_set_nontx_vif_params(struct ath11k_vif *tx_arvif,
+-+					    struct ath11k_vif *arvif,
+-+					    struct sk_buff *bcn)
+-+{
+-+	struct ieee80211_mgmt *mgmt;
+-+	const u8 *ies, *profile, *next_profile;
+-+	int ies_len;
+-+
+-+	ies = bcn->data + ieee80211_get_hdrlen_from_skb(bcn);
+-+	mgmt = (struct ieee80211_mgmt *)bcn->data;
+-+	ies += sizeof(mgmt->u.beacon);
+-+	ies_len = skb_tail_pointer(bcn) - ies;
+-+
+-+	ies = cfg80211_find_ie(WLAN_EID_MULTIPLE_BSSID, ies, ies_len);
+-+	arvif->rsnie_present = tx_arvif->rsnie_present;
+-+
+-+	while (ies) {
+-+		u8 mbssid_len;
+-+
+-+		ies_len -= (2 + ies[1]);
+-+		mbssid_len = ies[1] - 1;
+-+		profile = &ies[3];
+-+
+-+		while (mbssid_len) {
+-+			u8 profile_len;
+-+
+-+			profile_len = profile[1];
+-+			next_profile = profile + (2 + profile_len);
+-+			mbssid_len -= (2 + profile_len);
+-+
+-+			profile += 2;
+-+			profile_len -= (2 + profile[1]);
+-+			profile += (2 + profile[1]); /* nontx capabilities */
+-+			profile_len -= (2 + profile[1]);
+-+			profile += (2 + profile[1]); /* SSID */
+-+			if (profile[2] == arvif->vif->bss_conf.bssid_index) {
+-+				profile_len -= 5;
+-+				profile = profile + 5;
+-+				ath11k_mac_setup_nontx_vif_rsnie(arvif,
+-+								 tx_arvif->rsnie_present,
+-+								 profile,
+-+								 profile_len);
+-+				return true;
+-+			}
+-+			profile = next_profile;
+-+		}
+-+		ies = cfg80211_find_ie(WLAN_EID_MULTIPLE_BSSID, profile,
+-+				       ies_len);
+-+	}
+-+
+-+	return false;
+-+}
+-+
+- static void ath11k_mac_set_vif_params(struct ath11k_vif *arvif,
+- 				      struct sk_buff *bcn)
+- {
+-@@ -1374,18 +1452,26 @@ static void ath11k_mac_set_vif_params(st
+- 		arvif->wpaie_present = false;
+- }
+- 
+--static int ath11k_mac_setup_bcn_tmpl(struct ath11k_vif *arvif)
+-+static int ath11k_mac_setup_bcn_tmpl_mbssid(struct ath11k_vif *arvif)
+- {
+- 	struct ath11k *ar = arvif->ar;
+- 	struct ath11k_base *ab = ar->ab;
+-+	struct ath11k_vif *tx_arvif = arvif;
+- 	struct ieee80211_hw *hw = ar->hw;
+- 	struct ieee80211_vif *vif = arvif->vif;
+- 	struct ieee80211_mutable_offsets offs = {};
+- 	struct sk_buff *bcn;
+- 	int ret;
+- 
+--	if (arvif->vdev_type != WMI_VDEV_TYPE_AP)
+--		return 0;
+-+	if (arvif->vif->mbssid_tx_vif) {
+-+		tx_arvif = (void *)arvif->vif->mbssid_tx_vif->drv_priv;
+-+		if (tx_arvif != arvif) {
+-+			ar = tx_arvif->ar;
+-+			ab = ar->ab;
+-+			hw = ar->hw;
+-+			vif = tx_arvif->vif;
+-+		}
+-+	}
+- 
+- 	bcn = ieee80211_beacon_get_template(hw, vif, &offs, 0);
+- 	if (!bcn) {
+-@@ -1393,9 +1479,12 @@ static int ath11k_mac_setup_bcn_tmpl(str
+- 		return -EPERM;
+- 	}
+- 
+--	ath11k_mac_set_vif_params(arvif, bcn);
+--	ret = ath11k_wmi_bcn_tmpl(ar, arvif->vdev_id, &offs, bcn);
+-+	if (tx_arvif == arvif)
+-+		ath11k_mac_set_vif_params(tx_arvif, bcn);
+-+	else if (!ath11k_mac_set_nontx_vif_params(tx_arvif, arvif, bcn))
+-+		return -EINVAL;
+- 
+-+	ret = ath11k_wmi_bcn_tmpl(ar, arvif->vdev_id, &offs, bcn);
+- 	kfree_skb(bcn);
+- 
+- 	if (ret)
+-@@ -1405,6 +1494,23 @@ static int ath11k_mac_setup_bcn_tmpl(str
+- 	return ret;
+- }
+- 
+-+static int ath11k_mac_setup_bcn_tmpl(struct ath11k_vif *arvif)
+-+{
+-+	struct ieee80211_vif *vif = arvif->vif;
+-+
+-+	if (arvif->vdev_type != WMI_VDEV_TYPE_AP)
+-+		return 0;
+-+
+-+	/* Target does not expect beacon templates for the already up
+-+	 * non-transmitting interfaces, and results in a crash if sent.
+-+	 */
+-+	if (vif->mbssid_tx_vif &&
+-+	    arvif != (void *)vif->mbssid_tx_vif->drv_priv && arvif->is_up)
+-+		return 0;
+-+
+-+	return ath11k_mac_setup_bcn_tmpl_mbssid(arvif);
+-+}
+-+
+- void ath11k_mac_bcn_tx_event(struct ath11k_vif *arvif)
+- {
+- 	struct ieee80211_vif *vif = arvif->vif;
+---- a/drivers/net/wireless/ath/ath11k/wmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
+-@@ -1737,6 +1737,7 @@ int ath11k_wmi_bcn_tmpl(struct ath11k *a
+- 	}
+- 
+- 	cmd->buf_len = bcn->len;
+-+	cmd->mbssid_ie_offset = offs->mbssid_off;
+- 
+- 	ptr = skb->data + sizeof(*cmd);
+- 
+diff --git a/package/kernel/mac80211/patches/ath11k/0077-wifi-ath11k-EMA-beacon-support.patch b/package/kernel/mac80211/patches/ath11k/0077-wifi-ath11k-EMA-beacon-support.patch
+deleted file mode 100644
+index 51353fa3e4..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0077-wifi-ath11k-EMA-beacon-support.patch
++++ /dev/null
+@@ -1,156 +0,0 @@
+-From 87bd401138161008fdb82fbca6e213af117bfeb9 Mon Sep 17 00:00:00 2001
+-From: Aloka Dixit <quic_alokad@quicinc.com>
+-Date: Fri, 5 May 2023 16:11:28 +0300
+-Subject: [PATCH 77/77] wifi: ath11k: EMA beacon support
+-
+-Add new function ath11k_mac_setup_bcn_tmpl_ema() which invokes the new
+-API provided by MAC80211 to retrieve EMA beacons.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Aloka Dixit <quic_alokad@quicinc.com>
+-Co-developed-by: John Crispin <john@phrozen.org>
+-Signed-off-by: John Crispin <john@phrozen.org>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230405221648.17950-8-quic_alokad@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 59 ++++++++++++++++++++++++++-
+- drivers/net/wireless/ath/ath11k/wmi.c |  3 +-
+- drivers/net/wireless/ath/ath11k/wmi.h | 11 ++++-
+- 3 files changed, 70 insertions(+), 3 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -1452,6 +1452,60 @@ static void ath11k_mac_set_vif_params(st
+- 		arvif->wpaie_present = false;
+- }
+- 
+-+static int ath11k_mac_setup_bcn_tmpl_ema(struct ath11k_vif *arvif)
+-+{
+-+	struct ath11k_vif *tx_arvif;
+-+	struct ieee80211_ema_beacons *beacons;
+-+	int ret = 0;
+-+	bool nontx_vif_params_set = false;
+-+	u32 params = 0;
+-+	u8 i = 0;
+-+
+-+	tx_arvif = (void *)arvif->vif->mbssid_tx_vif->drv_priv;
+-+
+-+	beacons = ieee80211_beacon_get_template_ema_list(tx_arvif->ar->hw,
+-+							 tx_arvif->vif, 0);
+-+	if (!beacons || !beacons->cnt) {
+-+		ath11k_warn(arvif->ar->ab,
+-+			    "failed to get ema beacon templates from mac80211\n");
+-+		return -EPERM;
+-+	}
+-+
+-+	if (tx_arvif == arvif)
+-+		ath11k_mac_set_vif_params(tx_arvif, beacons->bcn[0].skb);
+-+	else
+-+		arvif->wpaie_present = tx_arvif->wpaie_present;
+-+
+-+	for (i = 0; i < beacons->cnt; i++) {
+-+		if (tx_arvif != arvif && !nontx_vif_params_set)
+-+			nontx_vif_params_set =
+-+				ath11k_mac_set_nontx_vif_params(tx_arvif, arvif,
+-+								beacons->bcn[i].skb);
+-+
+-+		params = beacons->cnt;
+-+		params |= (i << WMI_EMA_TMPL_IDX_SHIFT);
+-+		params |= ((!i ? 1 : 0) << WMI_EMA_FIRST_TMPL_SHIFT);
+-+		params |= ((i + 1 == beacons->cnt ? 1 : 0) << WMI_EMA_LAST_TMPL_SHIFT);
+-+
+-+		ret = ath11k_wmi_bcn_tmpl(tx_arvif->ar, tx_arvif->vdev_id,
+-+					  &beacons->bcn[i].offs,
+-+					  beacons->bcn[i].skb, params);
+-+		if (ret) {
+-+			ath11k_warn(tx_arvif->ar->ab,
+-+				    "failed to set ema beacon template id %i error %d\n",
+-+				    i, ret);
+-+			break;
+-+		}
+-+	}
+-+
+-+	ieee80211_beacon_free_ema_list(beacons);
+-+
+-+	if (tx_arvif != arvif && !nontx_vif_params_set)
+-+		return -EINVAL; /* Profile not found in the beacons */
+-+
+-+	return ret;
+-+}
+-+
+- static int ath11k_mac_setup_bcn_tmpl_mbssid(struct ath11k_vif *arvif)
+- {
+- 	struct ath11k *ar = arvif->ar;
+-@@ -1484,7 +1538,7 @@ static int ath11k_mac_setup_bcn_tmpl_mbs
+- 	else if (!ath11k_mac_set_nontx_vif_params(tx_arvif, arvif, bcn))
+- 		return -EINVAL;
+- 
+--	ret = ath11k_wmi_bcn_tmpl(ar, arvif->vdev_id, &offs, bcn);
+-+	ret = ath11k_wmi_bcn_tmpl(ar, arvif->vdev_id, &offs, bcn, 0);
+- 	kfree_skb(bcn);
+- 
+- 	if (ret)
+-@@ -1508,6 +1562,9 @@ static int ath11k_mac_setup_bcn_tmpl(str
+- 	    arvif != (void *)vif->mbssid_tx_vif->drv_priv && arvif->is_up)
+- 		return 0;
+- 
+-+	if (vif->bss_conf.ema_ap && vif->mbssid_tx_vif)
+-+		return ath11k_mac_setup_bcn_tmpl_ema(arvif);
+-+
+- 	return ath11k_mac_setup_bcn_tmpl_mbssid(arvif);
+- }
+- 
+---- a/drivers/net/wireless/ath/ath11k/wmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
+-@@ -1699,7 +1699,7 @@ int ath11k_wmi_send_bcn_offload_control_
+- 
+- int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id,
+- 			struct ieee80211_mutable_offsets *offs,
+--			struct sk_buff *bcn)
+-+			struct sk_buff *bcn, u32 ema_params)
+- {
+- 	struct ath11k_pdev_wmi *wmi = ar->wmi;
+- 	struct wmi_bcn_tmpl_cmd *cmd;
+-@@ -1738,6 +1738,7 @@ int ath11k_wmi_bcn_tmpl(struct ath11k *a
+- 
+- 	cmd->buf_len = bcn->len;
+- 	cmd->mbssid_ie_offset = offs->mbssid_off;
+-+	cmd->ema_params = ema_params;
+- 
+- 	ptr = skb->data + sizeof(*cmd);
+- 
+---- a/drivers/net/wireless/ath/ath11k/wmi.h
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.h
+-@@ -3566,6 +3566,10 @@ struct wmi_get_pdev_temperature_cmd {
+- 
+- #define WMI_BEACON_TX_BUFFER_SIZE	512
+- 
+-+#define WMI_EMA_TMPL_IDX_SHIFT            8
+-+#define WMI_EMA_FIRST_TMPL_SHIFT          16
+-+#define WMI_EMA_LAST_TMPL_SHIFT           24
+-+
+- struct wmi_bcn_tmpl_cmd {
+- 	u32 tlv_header;
+- 	u32 vdev_id;
+-@@ -3576,6 +3580,11 @@ struct wmi_bcn_tmpl_cmd {
+- 	u32 csa_event_bitmap;
+- 	u32 mbssid_ie_offset;
+- 	u32 esp_ie_offset;
+-+	u32 csc_switch_count_offset;
+-+	u32 csc_event_bitmap;
+-+	u32 mu_edca_ie_offset;
+-+	u32 feature_enable_bitmap;
+-+	u32 ema_params;
+- } __packed;
+- 
+- struct wmi_key_seq_counter {
+-@@ -6298,7 +6307,7 @@ int ath11k_wmi_mgmt_send(struct ath11k *
+- 			 struct sk_buff *frame);
+- int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id,
+- 			struct ieee80211_mutable_offsets *offs,
+--			struct sk_buff *bcn);
+-+			struct sk_buff *bcn, u32 ema_param);
+- int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id);
+- int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid,
+- 		       const u8 *bssid, u8 *tx_bssid, u32 nontx_profile_idx,
+diff --git a/package/kernel/mac80211/patches/ath11k/0078-wifi-ath11k-Relocate-the-func-ath11k_mac_bitrate_mas.patch b/package/kernel/mac80211/patches/ath11k/0078-wifi-ath11k-Relocate-the-func-ath11k_mac_bitrate_mas.patch
+deleted file mode 100644
+index 610bf72514..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0078-wifi-ath11k-Relocate-the-func-ath11k_mac_bitrate_mas.patch
++++ /dev/null
+@@ -1,75 +0,0 @@
+-From 570eec3d40505c30babbe3b8f85a38496c975ab2 Mon Sep 17 00:00:00 2001
+-From: Maharaja Kennadyrajan <quic_mkenna@quicinc.com>
+-Date: Tue, 9 May 2023 20:07:23 +0300
+-Subject: [PATCH] wifi: ath11k: Relocate the func
+- ath11k_mac_bitrate_mask_num_ht_rates() and change hweight16 to hweight8
+-
+-Relocate the function ath11k_mac_bitrate_mask_num_ht_rates() definition
+-to call this function from other functions which helps to avoid the
+-compilation error (function not defined).
+-
+-ht_mcs[] is 1 byte array and it is enough to use hweight8() instead
+-of hweight16(). Hence, fixed the same.
+-
+-Tested on: Compile tested only.
+-
+-Signed-off-by: Maharaja Kennadyrajan <quic_mkenna@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230504092033.3542456-2-quic_mkenna@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 30 +++++++++++++--------------
+- 1 file changed, 15 insertions(+), 15 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -1,7 +1,7 @@
+- // SPDX-License-Identifier: BSD-3-Clause-Clear
+- /*
+-  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+-- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+-+ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
+-  */
+- 
+- #include <net/mac80211.h>
+-@@ -4338,6 +4338,20 @@ exit:
+- }
+- 
+- static int
+-+ath11k_mac_bitrate_mask_num_ht_rates(struct ath11k *ar,
+-+				     enum nl80211_band band,
+-+				     const struct cfg80211_bitrate_mask *mask)
+-+{
+-+	int num_rates = 0;
+-+	int i;
+-+
+-+	for (i = 0; i < ARRAY_SIZE(mask->control[band].ht_mcs); i++)
+-+		num_rates += hweight8(mask->control[band].ht_mcs[i]);
+-+
+-+	return num_rates;
+-+}
+-+
+-+static int
+- ath11k_mac_bitrate_mask_num_vht_rates(struct ath11k *ar,
+- 				      enum nl80211_band band,
+- 				      const struct cfg80211_bitrate_mask *mask)
+-@@ -7791,20 +7805,6 @@ static void ath11k_mac_op_flush(struct i
+- 	ath11k_mac_flush_tx_complete(ar);
+- }
+- 
+--static int
+--ath11k_mac_bitrate_mask_num_ht_rates(struct ath11k *ar,
+--				     enum nl80211_band band,
+--				     const struct cfg80211_bitrate_mask *mask)
+--{
+--	int num_rates = 0;
+--	int i;
+--
+--	for (i = 0; i < ARRAY_SIZE(mask->control[band].ht_mcs); i++)
+--		num_rates += hweight16(mask->control[band].ht_mcs[i]);
+--
+--	return num_rates;
+--}
+--
+- static bool
+- ath11k_mac_has_single_legacy_rate(struct ath11k *ar,
+- 				  enum nl80211_band band,
+diff --git a/package/kernel/mac80211/patches/ath11k/0079-wifi-ath11k-Send-HT-fixed-rate-in-WMI-peer-fixed-par.patch b/package/kernel/mac80211/patches/ath11k/0079-wifi-ath11k-Send-HT-fixed-rate-in-WMI-peer-fixed-par.patch
+deleted file mode 100644
+index 6282f4462e..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0079-wifi-ath11k-Send-HT-fixed-rate-in-WMI-peer-fixed-par.patch
++++ /dev/null
+@@ -1,141 +0,0 @@
+-From df8e3729ffc0aa645839693f74ee7b6d999cdf64 Mon Sep 17 00:00:00 2001
+-From: Maharaja Kennadyrajan <quic_mkenna@quicinc.com>
+-Date: Tue, 9 May 2023 20:07:24 +0300
+-Subject: [PATCH] wifi: ath11k: Send HT fixed rate in WMI peer fixed param
+-
+-Due to the firmware behavior with HT fixed rate setting,
+-HT fixed rate MCS with NSS > 1 are treated as NSS = 1
+-HT rates in the firmware and enables the HT fixed rate of
+-NSS = 1.
+-
+-This leads to HT fixed rate is always configured for NSS = 1
+-even though the user sets NSS = 2 or > 1 HT fixed MCS in the
+-set bitrate command.
+-
+-Currently HT fixed MCS is sent via WMI peer assoc command.
+-Fix this issue, by sending the HT fixed rate MCS in WMI peer
+-fixed param instead of sending in peer assoc command.
+-
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Maharaja Kennadyrajan <quic_mkenna@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230504092033.3542456-3-quic_mkenna@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/mac.c | 63 ++++++++++++++++++++++++++-
+- 1 file changed, 61 insertions(+), 2 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -4480,6 +4480,54 @@ ath11k_mac_set_peer_he_fixed_rate(struct
+- 	return ret;
+- }
+- 
+-+static int
+-+ath11k_mac_set_peer_ht_fixed_rate(struct ath11k_vif *arvif,
+-+				  struct ieee80211_sta *sta,
+-+				  const struct cfg80211_bitrate_mask *mask,
+-+				  enum nl80211_band band)
+-+{
+-+	struct ath11k *ar = arvif->ar;
+-+	u8 ht_rate, nss = 0;
+-+	u32 rate_code;
+-+	int ret, i;
+-+
+-+	lockdep_assert_held(&ar->conf_mutex);
+-+
+-+	for (i = 0; i < ARRAY_SIZE(mask->control[band].ht_mcs); i++) {
+-+		if (hweight8(mask->control[band].ht_mcs[i]) == 1) {
+-+			nss = i + 1;
+-+			ht_rate = ffs(mask->control[band].ht_mcs[i]) - 1;
+-+		}
+-+	}
+-+
+-+	if (!nss) {
+-+		ath11k_warn(ar->ab, "No single HT Fixed rate found to set for %pM",
+-+			    sta->addr);
+-+		return -EINVAL;
+-+	}
+-+
+-+	/* Avoid updating invalid nss as fixed rate*/
+-+	if (nss > sta->deflink.rx_nss)
+-+		return -EINVAL;
+-+
+-+	ath11k_dbg(ar->ab, ATH11K_DBG_MAC,
+-+		   "Setting Fixed HT Rate for peer %pM. Device will not switch to any other selected rates",
+-+		   sta->addr);
+-+
+-+	rate_code = ATH11K_HW_RATE_CODE(ht_rate, nss - 1,
+-+					WMI_RATE_PREAMBLE_HT);
+-+	ret = ath11k_wmi_set_peer_param(ar, sta->addr,
+-+					arvif->vdev_id,
+-+					WMI_PEER_PARAM_FIXED_RATE,
+-+					rate_code);
+-+	if (ret)
+-+		ath11k_warn(ar->ab,
+-+			    "failed to update STA %pM HT Fixed Rate %d: %d\n",
+-+			    sta->addr, rate_code, ret);
+-+
+-+	return ret;
+-+}
+-+
+- static int ath11k_station_assoc(struct ath11k *ar,
+- 				struct ieee80211_vif *vif,
+- 				struct ieee80211_sta *sta,
+-@@ -4491,7 +4539,7 @@ static int ath11k_station_assoc(struct a
+- 	struct cfg80211_chan_def def;
+- 	enum nl80211_band band;
+- 	struct cfg80211_bitrate_mask *mask;
+--	u8 num_vht_rates, num_he_rates;
+-+	u8 num_ht_rates, num_vht_rates, num_he_rates;
+- 
+- 	lockdep_assert_held(&ar->conf_mutex);
+- 
+-@@ -4519,6 +4567,7 @@ static int ath11k_station_assoc(struct a
+- 
+- 	num_vht_rates = ath11k_mac_bitrate_mask_num_vht_rates(ar, band, mask);
+- 	num_he_rates = ath11k_mac_bitrate_mask_num_he_rates(ar, band, mask);
+-+	num_ht_rates = ath11k_mac_bitrate_mask_num_ht_rates(ar, band, mask);
+- 
+- 	/* If single VHT/HE rate is configured (by set_bitrate_mask()),
+- 	 * peer_assoc will disable VHT/HE. This is now enabled by a peer specific
+-@@ -4535,6 +4584,11 @@ static int ath11k_station_assoc(struct a
+- 							band);
+- 		if (ret)
+- 			return ret;
+-+	} else if (sta->deflink.ht_cap.ht_supported && num_ht_rates == 1) {
+-+		ret = ath11k_mac_set_peer_ht_fixed_rate(arvif, sta, mask,
+-+							band);
+-+		if (ret)
+-+			return ret;
+- 	}
+- 
+- 	/* Re-assoc is run only to update supported rates for given station. It
+-@@ -4608,7 +4662,7 @@ static void ath11k_sta_rc_update_wk(stru
+- 	const u16 *vht_mcs_mask;
+- 	const u16 *he_mcs_mask;
+- 	u32 changed, bw, nss, smps, bw_prev;
+--	int err, num_vht_rates, num_he_rates;
+-+	int err, num_ht_rates, num_vht_rates, num_he_rates;
+- 	const struct cfg80211_bitrate_mask *mask;
+- 	struct peer_assoc_params peer_arg;
+- 	enum wmi_phy_mode peer_phymode;
+-@@ -4724,6 +4778,8 @@ static void ath11k_sta_rc_update_wk(stru
+- 
+- 	if (changed & IEEE80211_RC_SUPP_RATES_CHANGED) {
+- 		mask = &arvif->bitrate_mask;
+-+		num_ht_rates = ath11k_mac_bitrate_mask_num_ht_rates(ar, band,
+-+								    mask);
+- 		num_vht_rates = ath11k_mac_bitrate_mask_num_vht_rates(ar, band,
+- 								      mask);
+- 		num_he_rates = ath11k_mac_bitrate_mask_num_he_rates(ar, band,
+-@@ -4746,6 +4802,9 @@ static void ath11k_sta_rc_update_wk(stru
+- 		} else if (sta->deflink.he_cap.has_he && num_he_rates == 1) {
+- 			ath11k_mac_set_peer_he_fixed_rate(arvif, sta, mask,
+- 							  band);
+-+		} else if (sta->deflink.ht_cap.ht_supported && num_ht_rates == 1) {
+-+			ath11k_mac_set_peer_ht_fixed_rate(arvif, sta, mask,
+-+							  band);
+- 		} else {
+- 			/* If the peer is non-VHT/HE or no fixed VHT/HE rate
+- 			 * is provided in the new bitrate mask we set the
+diff --git a/package/kernel/mac80211/patches/ath11k/0080-wifi-ath11k-add-support-default-regdb-while-searchin.patch b/package/kernel/mac80211/patches/ath11k/0080-wifi-ath11k-add-support-default-regdb-while-searchin.patch
+deleted file mode 100644
+index 5ff40aac7a..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0080-wifi-ath11k-add-support-default-regdb-while-searchin.patch
++++ /dev/null
+@@ -1,127 +0,0 @@
+-From 88ca89202f8e8afb5225eb5244d79cd67c15d744 Mon Sep 17 00:00:00 2001
+-From: Wen Gong <quic_wgong@quicinc.com>
+-Date: Fri, 26 May 2023 12:41:06 +0300
+-Subject: [PATCH] wifi: ath11k: add support default regdb while searching
+- board-2.bin for WCN6855
+-
+-Sometimes board-2.bin does not have the regdb data which matched the
+-parameters such as vendor, device, subsystem-vendor, subsystem-device
+-and etc. Add default regdb data with 'bus=%s' into board-2.bin for
+-WCN6855, then ath11k use 'bus=pci' to search regdb data in board-2.bin
+-for WCN6855.
+-
+-kernel: [  122.515808] ath11k_pci 0000:03:00.0: boot using board name 'bus=pci,vendor=17cb,device=1103,subsystem-vendor=17cb,subsystem-device=3374,qmi-chip-id=2,qmi-board-id=262'
+-kernel: [  122.517240] ath11k_pci 0000:03:00.0: boot firmware request ath11k/WCN6855/hw2.0/board-2.bin size 6179564
+-kernel: [  122.517280] ath11k_pci 0000:03:00.0: failed to fetch regdb data for bus=pci,vendor=17cb,device=1103,subsystem-vendor=17cb,subsystem-device=3374,qmi-chip-id=2,qmi-board-id=262 from ath11k/WCN6855/hw2.0/board-2.bin
+-kernel: [  122.517464] ath11k_pci 0000:03:00.0: boot using board name 'bus=pci'
+-kernel: [  122.518901] ath11k_pci 0000:03:00.0: boot firmware request ath11k/WCN6855/hw2.0/board-2.bin size 6179564
+-kernel: [  122.518915] ath11k_pci 0000:03:00.0: board name
+-kernel: [  122.518917] ath11k_pci 0000:03:00.0: 00000000: 62 75 73 3d 70 63 69                             bus=pci
+-kernel: [  122.518918] ath11k_pci 0000:03:00.0: boot found match regdb data for name 'bus=pci'
+-kernel: [  122.518920] ath11k_pci 0000:03:00.0: boot found regdb data for 'bus=pci'
+-kernel: [  122.518921] ath11k_pci 0000:03:00.0: fetched regdb
+-
+-Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3
+-
+-Signed-off-by: Wen Gong <quic_wgong@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230517133959.8224-1-quic_wgong@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/core.c | 53 +++++++++++++++++++-------
+- 1 file changed, 40 insertions(+), 13 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/core.c
+-+++ b/drivers/net/wireless/ath/ath11k/core.c
+-@@ -961,7 +961,8 @@ int ath11k_core_check_dt(struct ath11k_b
+- }
+- 
+- static int __ath11k_core_create_board_name(struct ath11k_base *ab, char *name,
+--					   size_t name_len, bool with_variant)
+-+					   size_t name_len, bool with_variant,
+-+					   bool bus_type_mode)
+- {
+- 	/* strlen(',variant=') + strlen(ab->qmi.target.bdf_ext) */
+- 	char variant[9 + ATH11K_QMI_BDF_EXT_STR_LENGTH] = { 0 };
+-@@ -972,15 +973,20 @@ static int __ath11k_core_create_board_na
+- 
+- 	switch (ab->id.bdf_search) {
+- 	case ATH11K_BDF_SEARCH_BUS_AND_BOARD:
+--		scnprintf(name, name_len,
+--			  "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x,qmi-chip-id=%d,qmi-board-id=%d%s",
+--			  ath11k_bus_str(ab->hif.bus),
+--			  ab->id.vendor, ab->id.device,
+--			  ab->id.subsystem_vendor,
+--			  ab->id.subsystem_device,
+--			  ab->qmi.target.chip_id,
+--			  ab->qmi.target.board_id,
+--			  variant);
+-+		if (bus_type_mode)
+-+			scnprintf(name, name_len,
+-+				  "bus=%s",
+-+				  ath11k_bus_str(ab->hif.bus));
+-+		else
+-+			scnprintf(name, name_len,
+-+				  "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x,qmi-chip-id=%d,qmi-board-id=%d%s",
+-+				  ath11k_bus_str(ab->hif.bus),
+-+				  ab->id.vendor, ab->id.device,
+-+				  ab->id.subsystem_vendor,
+-+				  ab->id.subsystem_device,
+-+				  ab->qmi.target.chip_id,
+-+				  ab->qmi.target.board_id,
+-+				  variant);
+- 		break;
+- 	default:
+- 		scnprintf(name, name_len,
+-@@ -999,13 +1005,19 @@ static int __ath11k_core_create_board_na
+- static int ath11k_core_create_board_name(struct ath11k_base *ab, char *name,
+- 					 size_t name_len)
+- {
+--	return __ath11k_core_create_board_name(ab, name, name_len, true);
+-+	return __ath11k_core_create_board_name(ab, name, name_len, true, false);
+- }
+- 
+- static int ath11k_core_create_fallback_board_name(struct ath11k_base *ab, char *name,
+- 						  size_t name_len)
+- {
+--	return __ath11k_core_create_board_name(ab, name, name_len, false);
+-+	return __ath11k_core_create_board_name(ab, name, name_len, false, false);
+-+}
+-+
+-+static int ath11k_core_create_bus_type_board_name(struct ath11k_base *ab, char *name,
+-+						  size_t name_len)
+-+{
+-+	return __ath11k_core_create_board_name(ab, name, name_len, false, true);
+- }
+- 
+- const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
+-@@ -1309,7 +1321,7 @@ success:
+- 
+- int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd)
+- {
+--	char boardname[BOARD_NAME_SIZE];
+-+	char boardname[BOARD_NAME_SIZE], default_boardname[BOARD_NAME_SIZE];
+- 	int ret;
+- 
+- 	ret = ath11k_core_create_board_name(ab, boardname, BOARD_NAME_SIZE);
+-@@ -1323,6 +1335,21 @@ int ath11k_core_fetch_regdb(struct ath11
+- 						 ATH11K_BD_IE_REGDB,
+- 						 ATH11K_BD_IE_REGDB_NAME,
+- 						 ATH11K_BD_IE_REGDB_DATA);
+-+	if (!ret)
+-+		goto exit;
+-+
+-+	ret = ath11k_core_create_bus_type_board_name(ab, default_boardname,
+-+						     BOARD_NAME_SIZE);
+-+	if (ret) {
+-+		ath11k_dbg(ab, ATH11K_DBG_BOOT,
+-+			   "failed to create default board name for regdb: %d", ret);
+-+		goto exit;
+-+	}
+-+
+-+	ret = ath11k_core_fetch_board_data_api_n(ab, bd, default_boardname,
+-+						 ATH11K_BD_IE_REGDB,
+-+						 ATH11K_BD_IE_REGDB_NAME,
+-+						 ATH11K_BD_IE_REGDB_DATA);
+- 	if (!ret)
+- 		goto exit;
+- 
+diff --git a/package/kernel/mac80211/patches/ath11k/0081-wifi-ath11k-remove-unused-function-ath11k_tm_event_w.patch b/package/kernel/mac80211/patches/ath11k/0081-wifi-ath11k-remove-unused-function-ath11k_tm_event_w.patch
+deleted file mode 100644
+index b5dc83f007..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0081-wifi-ath11k-remove-unused-function-ath11k_tm_event_w.patch
++++ /dev/null
+@@ -1,128 +0,0 @@
+-From 86f85575a3f6a20cef1c8bb98e78585fe3a53ccc Mon Sep 17 00:00:00 2001
+-From: Govindaraj Saminathan <quic_gsaminat@quicinc.com>
+-Date: Fri, 26 May 2023 12:41:06 +0300
+-Subject: [PATCH 82/84] wifi: ath11k: remove unused function
+- ath11k_tm_event_wmi()
+-
+-The function ath11k_tm_event_wmi() is only defined and it is not used
+-anywhere. Hence remove the unused.
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Govindaraj Saminathan <quic_gsaminat@quicinc.com>
+-Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230517135934.16408-2-quic_rajkbhag@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/testmode.c | 64 +---------------------
+- drivers/net/wireless/ath/ath11k/testmode.h |  8 +--
+- 2 files changed, 2 insertions(+), 70 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/testmode.c
+-+++ b/drivers/net/wireless/ath/ath11k/testmode.c
+-@@ -1,6 +1,7 @@
+- // SPDX-License-Identifier: BSD-3-Clause-Clear
+- /*
+-  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+-+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+-  */
+- 
+- #include "testmode.h"
+-@@ -20,69 +21,6 @@ static const struct nla_policy ath11k_tm
+- 	[ATH11K_TM_ATTR_VERSION_MINOR]	= { .type = NLA_U32 },
+- };
+- 
+--/* Returns true if callee consumes the skb and the skb should be discarded.
+-- * Returns false if skb is not used. Does not sleep.
+-- */
+--bool ath11k_tm_event_wmi(struct ath11k *ar, u32 cmd_id, struct sk_buff *skb)
+--{
+--	struct sk_buff *nl_skb;
+--	bool consumed;
+--	int ret;
+--
+--	ath11k_dbg(ar->ab, ATH11K_DBG_TESTMODE,
+--		   "testmode event wmi cmd_id %d skb %pK skb->len %d\n",
+--		   cmd_id, skb, skb->len);
+--
+--	ath11k_dbg_dump(ar->ab, ATH11K_DBG_TESTMODE, NULL, "", skb->data, skb->len);
+--
+--	spin_lock_bh(&ar->data_lock);
+--
+--	consumed = true;
+--
+--	nl_skb = cfg80211_testmode_alloc_event_skb(ar->hw->wiphy,
+--						   2 * sizeof(u32) + skb->len,
+--						   GFP_ATOMIC);
+--	if (!nl_skb) {
+--		ath11k_warn(ar->ab,
+--			    "failed to allocate skb for testmode wmi event\n");
+--		goto out;
+--	}
+--
+--	ret = nla_put_u32(nl_skb, ATH11K_TM_ATTR_CMD, ATH11K_TM_CMD_WMI);
+--	if (ret) {
+--		ath11k_warn(ar->ab,
+--			    "failed to put testmode wmi event cmd attribute: %d\n",
+--			    ret);
+--		kfree_skb(nl_skb);
+--		goto out;
+--	}
+--
+--	ret = nla_put_u32(nl_skb, ATH11K_TM_ATTR_WMI_CMDID, cmd_id);
+--	if (ret) {
+--		ath11k_warn(ar->ab,
+--			    "failed to put testmode wmi even cmd_id: %d\n",
+--			    ret);
+--		kfree_skb(nl_skb);
+--		goto out;
+--	}
+--
+--	ret = nla_put(nl_skb, ATH11K_TM_ATTR_DATA, skb->len, skb->data);
+--	if (ret) {
+--		ath11k_warn(ar->ab,
+--			    "failed to copy skb to testmode wmi event: %d\n",
+--			    ret);
+--		kfree_skb(nl_skb);
+--		goto out;
+--	}
+--
+--	cfg80211_testmode_event(nl_skb, GFP_ATOMIC);
+--
+--out:
+--	spin_unlock_bh(&ar->data_lock);
+--
+--	return consumed;
+--}
+--
+- static int ath11k_tm_cmd_get_version(struct ath11k *ar, struct nlattr *tb[])
+- {
+- 	struct sk_buff *skb;
+---- a/drivers/net/wireless/ath/ath11k/testmode.h
+-+++ b/drivers/net/wireless/ath/ath11k/testmode.h
+-@@ -1,24 +1,18 @@
+- /* SPDX-License-Identifier: BSD-3-Clause-Clear */
+- /*
+-  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+-+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+-  */
+- 
+- #include "core.h"
+- 
+- #ifdef CPTCFG_NL80211_TESTMODE
+- 
+--bool ath11k_tm_event_wmi(struct ath11k *ar, u32 cmd_id, struct sk_buff *skb);
+- int ath11k_tm_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
+- 		  void *data, int len);
+- 
+- #else
+- 
+--static inline bool ath11k_tm_event_wmi(struct ath11k *ar, u32 cmd_id,
+--				       struct sk_buff *skb)
+--{
+--	return false;
+--}
+--
+- static inline int ath11k_tm_cmd(struct ieee80211_hw *hw,
+- 				struct ieee80211_vif *vif,
+- 				void *data, int len)
+diff --git a/package/kernel/mac80211/patches/ath11k/0082-wifi-ath11k-factory-test-mode-support.patch b/package/kernel/mac80211/patches/ath11k/0082-wifi-ath11k-factory-test-mode-support.patch
+deleted file mode 100644
+index f1b262724f..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0082-wifi-ath11k-factory-test-mode-support.patch
++++ /dev/null
+@@ -1,850 +0,0 @@
+-From b43310e44edc823a7f02af1e1e2b4e8a9abc7d91 Mon Sep 17 00:00:00 2001
+-From: Govindaraj Saminathan <quic_gsaminat@quicinc.com>
+-Date: Fri, 26 May 2023 12:41:07 +0300
+-Subject: [PATCH 83/84] wifi: ath11k: factory test mode support
+-
+-Add support to process factory test mode commands (FTM) for calibration.
+-By default firmware start with NORMAL mode and to process the FTM commands
+-firmware needs to be restarted in FTM mode using module parameter ftm_mode.
+-The pre-request is all the radios should be down before starting the test.
+-
+-When start command ATH11K_TM_CMD_TESTMODE_START is received, ar->state
+-is set to Test Mode. If the FTM command or event length is greater
+-than 256 bytes, it will be broken down into multiple segments and
+-encoded with TLV header if it is segmented commands, else it is sent
+-to firmware as it is.
+-
+-On receiving UTF event from firmware, if it is segmented event, the driver
+-will wait until it receives all the segments and notify the complete
+-data to user application. In case the segmented sequence are missed or
+-lost from the firmware, driver will skip the already received partial data.
+-
+-In case of unsegmented UTF event from firmware, driver notifies the
+-data to the user application as it comes. Applications handles
+-the data further.
+-
+-Command to boot in ftm mode:
+-
+-insmod ath11k ftm_mode=1
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Govindaraj Saminathan <quic_gsaminat@quicinc.com>
+-Co-developed-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
+-Signed-off-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
+-Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230517135934.16408-4-quic_rajkbhag@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/ahb.c        |   3 +-
+- drivers/net/wireless/ath/ath11k/core.c       |  21 +-
+- drivers/net/wireless/ath/ath11k/core.h       |  16 +-
+- drivers/net/wireless/ath/ath11k/debug.h      |   1 +
+- drivers/net/wireless/ath/ath11k/mac.c        |  11 +-
+- drivers/net/wireless/ath/ath11k/pci.c        |   3 +-
+- drivers/net/wireless/ath/ath11k/testmode.c   | 350 ++++++++++++++++++-
+- drivers/net/wireless/ath/ath11k/testmode.h   |   6 +
+- drivers/net/wireless/ath/ath11k/testmode_i.h |  18 +-
+- drivers/net/wireless/ath/ath11k/wmi.c        |  11 +-
+- drivers/net/wireless/ath/ath11k/wmi.h        |  22 ++
+- drivers/net/wireless/ath/ath11k/wow.c        |   3 +-
+- 12 files changed, 444 insertions(+), 21 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/ahb.c
+-+++ b/drivers/net/wireless/ath/ath11k/ahb.c
+-@@ -1,7 +1,7 @@
+- // SPDX-License-Identifier: BSD-3-Clause-Clear
+- /*
+-  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+-- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+-+ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
+-  */
+- 
+- #include <linux/module.h>
+-@@ -1155,6 +1155,7 @@ static int ath11k_ahb_probe(struct platf
+- 	ab->hif.ops = hif_ops;
+- 	ab->pdev = pdev;
+- 	ab->hw_rev = hw_rev;
+-+	ab->fw_mode = ATH11K_FIRMWARE_MODE_NORMAL;
+- 	platform_set_drvdata(pdev, ab);
+- 
+- 	ret = ath11k_pcic_register_pci_ops(ab, pci_ops);
+---- a/drivers/net/wireless/ath/ath11k/core.c
+-+++ b/drivers/net/wireless/ath/ath11k/core.c
+-@@ -1,7 +1,7 @@
+- // SPDX-License-Identifier: BSD-3-Clause-Clear
+- /*
+-  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+-- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+-+ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
+-  */
+- 
+- #include <linux/module.h>
+-@@ -32,6 +32,10 @@ module_param_named(frame_mode, ath11k_fr
+- MODULE_PARM_DESC(frame_mode,
+- 		 "Datapath frame mode (0: raw, 1: native wifi (default), 2: ethernet)");
+- 
+-+bool ath11k_ftm_mode;
+-+module_param_named(ftm_mode, ath11k_ftm_mode, bool, 0444);
+-+MODULE_PARM_DESC(ftm_mode, "Boots up in factory test mode");
+-+
+- static const struct ath11k_hw_params ath11k_hw_params[] = {
+- 	{
+- 		.hw_rev = ATH11K_HW_IPQ8074,
+-@@ -1381,6 +1385,11 @@ static int ath11k_core_soc_create(struct
+- {
+- 	int ret;
+- 
+-+	if (ath11k_ftm_mode) {
+-+		ab->fw_mode = ATH11K_FIRMWARE_MODE_FTM;
+-+		ath11k_info(ab, "Booting in factory test mode\n");
+-+	}
+-+
+- 	ret = ath11k_qmi_init_service(ab);
+- 	if (ret) {
+- 		ath11k_err(ab, "failed to initialize qmi :%d\n", ret);
+-@@ -1607,7 +1616,7 @@ int ath11k_core_qmi_firmware_ready(struc
+- {
+- 	int ret;
+- 
+--	ret = ath11k_core_start_firmware(ab, ATH11K_FIRMWARE_MODE_NORMAL);
+-+	ret = ath11k_core_start_firmware(ab, ab->fw_mode);
+- 	if (ret) {
+- 		ath11k_err(ab, "failed to start firmware: %d\n", ret);
+- 		return ret;
+-@@ -1772,7 +1781,8 @@ void ath11k_core_pre_reconfigure_recover
+- 	for (i = 0; i < ab->num_radios; i++) {
+- 		pdev = &ab->pdevs[i];
+- 		ar = pdev->ar;
+--		if (!ar || ar->state == ATH11K_STATE_OFF)
+-+		if (!ar || ar->state == ATH11K_STATE_OFF ||
+-+		    ar->state == ATH11K_STATE_FTM)
+- 			continue;
+- 
+- 		ieee80211_stop_queues(ar->hw);
+-@@ -1841,7 +1851,12 @@ static void ath11k_core_post_reconfigure
+- 			ath11k_warn(ab,
+- 				    "device is wedged, will not restart radio %d\n", i);
+- 			break;
+-+		case ATH11K_STATE_FTM:
+-+			ath11k_dbg(ab, ATH11K_DBG_TESTMODE,
+-+				   "fw mode reset done radio %d\n", i);
+-+			break;
+- 		}
+-+
+- 		mutex_unlock(&ar->conf_mutex);
+- 	}
+- 	complete(&ab->driver_recovery);
+---- a/drivers/net/wireless/ath/ath11k/core.h
+-+++ b/drivers/net/wireless/ath/ath11k/core.h
+-@@ -1,7 +1,7 @@
+- /* SPDX-License-Identifier: BSD-3-Clause-Clear */
+- /*
+-  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+-- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+-+ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
+-  */
+- 
+- #ifndef ATH11K_CORE_H
+-@@ -52,6 +52,7 @@
+- #define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_"
+- 
+- extern unsigned int ath11k_frame_mode;
+-+extern bool ath11k_ftm_mode;
+- 
+- #define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ)
+- 
+-@@ -277,6 +278,7 @@ enum ath11k_dev_flags {
+- 	ATH11K_FLAG_FIXED_MEM_RGN,
+- 	ATH11K_FLAG_DEVICE_INIT_DONE,
+- 	ATH11K_FLAG_MULTI_MSI_VECTORS,
+-+	ATH11K_FLAG_FTM_SEGMENTED,
+- };
+- 
+- enum ath11k_monitor_flags {
+-@@ -530,6 +532,7 @@ enum ath11k_state {
+- 	ATH11K_STATE_RESTARTING,
+- 	ATH11K_STATE_RESTARTED,
+- 	ATH11K_STATE_WEDGED,
+-+	ATH11K_STATE_FTM,
+- 	/* Add other states as required */
+- };
+- 
+-@@ -709,6 +712,8 @@ struct ath11k {
+- 	u32 last_ppdu_id;
+- 	u32 cached_ppdu_id;
+- 	int monitor_vdev_id;
+-+	struct completion fw_mode_reset;
+-+	u8 ftm_msgref;
+- #ifdef CPTCFG_ATH11K_DEBUGFS
+- 	struct ath11k_debug debug;
+- #endif
+-@@ -838,6 +843,7 @@ struct ath11k_msi_config {
+- /* Master structure to hold the hw data which may be used in core module */
+- struct ath11k_base {
+- 	enum ath11k_hw_rev hw_rev;
+-+	enum ath11k_firmware_mode fw_mode;
+- 	struct platform_device *pdev;
+- 	struct device *dev;
+- 	struct ath11k_qmi qmi;
+-@@ -978,6 +984,14 @@ struct ath11k_base {
+- 		const struct ath11k_pci_ops *ops;
+- 	} pci;
+- 
+-+#ifdef CPTCFG_NL80211_TESTMODE
+-+	struct {
+-+		u32 data_pos;
+-+		u32 expected_seq;
+-+		u8 *eventdata;
+-+	} testmode;
+-+#endif
+-+
+- 	/* must be last */
+- 	u8 drv_priv[] __aligned(sizeof(void *));
+- };
+---- a/drivers/net/wireless/ath/ath11k/debug.h
+-+++ b/drivers/net/wireless/ath/ath11k/debug.h
+-@@ -1,6 +1,7 @@
+- /* SPDX-License-Identifier: BSD-3-Clause-Clear */
+- /*
+-  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+-+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+-  */
+- 
+- #ifndef _ATH11K_DEBUG_H_
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -643,7 +643,10 @@ struct ath11k *ath11k_mac_get_ar_by_pdev
+- 		return NULL;
+- 
+- 	for (i = 0; i < ab->num_radios; i++) {
+--		pdev = rcu_dereference(ab->pdevs_active[i]);
+-+		if (ab->fw_mode == ATH11K_FIRMWARE_MODE_FTM)
+-+			pdev = &ab->pdevs[i];
+-+		else
+-+			pdev = rcu_dereference(ab->pdevs_active[i]);
+- 
+- 		if (pdev && pdev->pdev_id == pdev_id)
+- 			return (pdev->ar ? pdev->ar : NULL);
+-@@ -6271,6 +6274,11 @@ static int ath11k_mac_op_start(struct ie
+- 	struct ath11k_pdev *pdev = ar->pdev;
+- 	int ret;
+- 
+-+	if (ath11k_ftm_mode) {
+-+		ath11k_warn(ab, "mac operations not supported in factory test mode\n");
+-+		return -EOPNOTSUPP;
+-+	}
+-+
+- 	ath11k_mac_drain_tx(ar);
+- 	mutex_lock(&ar->conf_mutex);
+- 
+-@@ -6285,6 +6293,7 @@ static int ath11k_mac_op_start(struct ie
+- 	case ATH11K_STATE_RESTARTED:
+- 	case ATH11K_STATE_WEDGED:
+- 	case ATH11K_STATE_ON:
+-+	case ATH11K_STATE_FTM:
+- 		WARN_ON(1);
+- 		ret = -EINVAL;
+- 		goto err;
+---- a/drivers/net/wireless/ath/ath11k/pci.c
+-+++ b/drivers/net/wireless/ath/ath11k/pci.c
+-@@ -1,7 +1,7 @@
+- // SPDX-License-Identifier: BSD-3-Clause-Clear
+- /*
+-  * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.
+-- * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.
+-+ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
+-  */
+- 
+- #include <linux/module.h>
+-@@ -745,6 +745,7 @@ static int ath11k_pci_probe(struct pci_d
+- 	ab_pci->ab = ab;
+- 	ab_pci->pdev = pdev;
+- 	ab->hif.ops = &ath11k_pci_hif_ops;
+-+	ab->fw_mode = ATH11K_FIRMWARE_MODE_NORMAL;
+- 	pci_set_drvdata(pdev, ab);
+- 	spin_lock_init(&ab_pci->window_lock);
+- 
+---- a/drivers/net/wireless/ath/ath11k/testmode.c
+-+++ b/drivers/net/wireless/ath/ath11k/testmode.c
+-@@ -12,6 +12,9 @@
+- #include "core.h"
+- #include "testmode_i.h"
+- 
+-+#define ATH11K_FTM_SEGHDR_CURRENT_SEQ		GENMASK(3, 0)
+-+#define ATH11K_FTM_SEGHDR_TOTAL_SEGMENTS	GENMASK(7, 4)
+-+
+- static const struct nla_policy ath11k_tm_policy[ATH11K_TM_ATTR_MAX + 1] = {
+- 	[ATH11K_TM_ATTR_CMD]		= { .type = NLA_U32 },
+- 	[ATH11K_TM_ATTR_DATA]		= { .type = NLA_BINARY,
+-@@ -21,13 +24,217 @@ static const struct nla_policy ath11k_tm
+- 	[ATH11K_TM_ATTR_VERSION_MINOR]	= { .type = NLA_U32 },
+- };
+- 
+-+static struct ath11k *ath11k_tm_get_ar(struct ath11k_base *ab)
+-+{
+-+	struct ath11k_pdev *pdev;
+-+	struct ath11k *ar = NULL;
+-+	int i;
+-+
+-+	for (i = 0; i < ab->num_radios; i++) {
+-+		pdev = &ab->pdevs[i];
+-+		ar = pdev->ar;
+-+
+-+		if (ar && ar->state == ATH11K_STATE_FTM)
+-+			break;
+-+	}
+-+
+-+	return ar;
+-+}
+-+
+-+/* This function handles unsegmented events. Data in various events are aggregated
+-+ * in application layer, this event is unsegmented from host perspective.
+-+ */
+-+static void ath11k_tm_wmi_event_unsegmented(struct ath11k_base *ab, u32 cmd_id,
+-+					    struct sk_buff *skb)
+-+{
+-+	struct sk_buff *nl_skb;
+-+	struct ath11k *ar;
+-+
+-+	ath11k_dbg(ab, ATH11K_DBG_TESTMODE,
+-+		   "event wmi cmd_id %d skb length %d\n",
+-+		   cmd_id, skb->len);
+-+	ath11k_dbg_dump(ab, ATH11K_DBG_TESTMODE, NULL, "", skb->data, skb->len);
+-+
+-+	ar = ath11k_tm_get_ar(ab);
+-+	if (!ar) {
+-+		ath11k_warn(ab, "testmode event not handled due to invalid pdev\n");
+-+		return;
+-+	}
+-+
+-+	spin_lock_bh(&ar->data_lock);
+-+
+-+	nl_skb = cfg80211_testmode_alloc_event_skb(ar->hw->wiphy,
+-+						   2 * nla_total_size(sizeof(u32)) +
+-+						   nla_total_size(skb->len),
+-+						   GFP_ATOMIC);
+-+	if (!nl_skb) {
+-+		ath11k_warn(ab,
+-+			    "failed to allocate skb for unsegmented testmode wmi event\n");
+-+		goto out;
+-+	}
+-+
+-+	if (nla_put_u32(nl_skb, ATH11K_TM_ATTR_CMD, ATH11K_TM_CMD_WMI) ||
+-+	    nla_put_u32(nl_skb, ATH11K_TM_ATTR_WMI_CMDID, cmd_id) ||
+-+	    nla_put(nl_skb, ATH11K_TM_ATTR_DATA, skb->len, skb->data)) {
+-+		ath11k_warn(ab, "failed to populate testmode unsegmented event\n");
+-+		kfree_skb(nl_skb);
+-+		goto out;
+-+	}
+-+
+-+	cfg80211_testmode_event(nl_skb, GFP_ATOMIC);
+-+	spin_unlock_bh(&ar->data_lock);
+-+	return;
+-+
+-+out:
+-+	spin_unlock_bh(&ar->data_lock);
+-+	ath11k_warn(ab, "Failed to send testmode event to higher layers\n");
+-+}
+-+
+-+/* This function handles segmented events. Data of various events received
+-+ * from firmware is aggregated and sent to application layer
+-+ */
+-+static int ath11k_tm_process_event(struct ath11k_base *ab, u32 cmd_id,
+-+				   const struct wmi_ftm_event_msg *ftm_msg,
+-+				   u16 length)
+-+{
+-+	struct sk_buff *nl_skb;
+-+	int ret = 0;
+-+	struct ath11k *ar;
+-+	u8 const *buf_pos;
+-+	u16 datalen;
+-+	u8 total_segments, current_seq;
+-+	u32 data_pos;
+-+	u32 pdev_id;
+-+
+-+	ath11k_dbg(ab, ATH11K_DBG_TESTMODE,
+-+		   "event wmi cmd_id %d ftm event msg %pK datalen %d\n",
+-+		   cmd_id, ftm_msg, length);
+-+	ath11k_dbg_dump(ab, ATH11K_DBG_TESTMODE, NULL, "", ftm_msg, length);
+-+	pdev_id = DP_HW2SW_MACID(ftm_msg->seg_hdr.pdev_id);
+-+
+-+	if (pdev_id >= ab->num_radios) {
+-+		ath11k_warn(ab, "testmode event not handled due to invalid pdev id: %d\n",
+-+			    pdev_id);
+-+		return -EINVAL;
+-+	}
+-+
+-+	ar = ab->pdevs[pdev_id].ar;
+-+	if (!ar) {
+-+		ath11k_warn(ab, "testmode event not handled due to absence of pdev\n");
+-+		return -ENODEV;
+-+	}
+-+
+-+	current_seq = FIELD_GET(ATH11K_FTM_SEGHDR_CURRENT_SEQ,
+-+				ftm_msg->seg_hdr.segmentinfo);
+-+	total_segments = FIELD_GET(ATH11K_FTM_SEGHDR_TOTAL_SEGMENTS,
+-+				   ftm_msg->seg_hdr.segmentinfo);
+-+	datalen = length - (sizeof(struct wmi_ftm_seg_hdr));
+-+	buf_pos = ftm_msg->data;
+-+
+-+	spin_lock_bh(&ar->data_lock);
+-+
+-+	if (current_seq == 0) {
+-+		ab->testmode.expected_seq = 0;
+-+		ab->testmode.data_pos = 0;
+-+	}
+-+
+-+	data_pos = ab->testmode.data_pos;
+-+
+-+	if ((data_pos + datalen) > ATH11K_FTM_EVENT_MAX_BUF_LENGTH) {
+-+		ath11k_warn(ab, "Invalid ftm event length at %d: %d\n",
+-+			    data_pos, datalen);
+-+		ret = -EINVAL;
+-+		goto out;
+-+	}
+-+
+-+	memcpy(&ab->testmode.eventdata[data_pos], buf_pos, datalen);
+-+	data_pos += datalen;
+-+
+-+	if (++ab->testmode.expected_seq != total_segments) {
+-+		ab->testmode.data_pos = data_pos;
+-+		ath11k_dbg(ab, ATH11K_DBG_TESTMODE,
+-+			   "partial data received current_seq %d total_seg %d\n",
+-+			    current_seq, total_segments);
+-+		goto out;
+-+	}
+-+
+-+	ath11k_dbg(ab, ATH11K_DBG_TESTMODE,
+-+		   "total data length pos %d len %d\n",
+-+		    data_pos, ftm_msg->seg_hdr.len);
+-+	nl_skb = cfg80211_testmode_alloc_event_skb(ar->hw->wiphy,
+-+						   2 * nla_total_size(sizeof(u32)) +
+-+						   nla_total_size(data_pos),
+-+						   GFP_ATOMIC);
+-+	if (!nl_skb) {
+-+		ath11k_warn(ab,
+-+			    "failed to allocate skb for segmented testmode wmi event\n");
+-+		ret = -ENOMEM;
+-+		goto out;
+-+	}
+-+
+-+	if (nla_put_u32(nl_skb, ATH11K_TM_ATTR_CMD,
+-+			ATH11K_TM_CMD_WMI_FTM) ||
+-+	    nla_put_u32(nl_skb, ATH11K_TM_ATTR_WMI_CMDID, cmd_id) ||
+-+	    nla_put(nl_skb, ATH11K_TM_ATTR_DATA, data_pos,
+-+		    &ab->testmode.eventdata[0])) {
+-+		ath11k_warn(ab, "failed to populate segmented testmode event");
+-+		kfree_skb(nl_skb);
+-+		ret = -ENOBUFS;
+-+		goto out;
+-+	}
+-+
+-+	cfg80211_testmode_event(nl_skb, GFP_ATOMIC);
+-+
+-+out:
+-+	spin_unlock_bh(&ar->data_lock);
+-+	return ret;
+-+}
+-+
+-+static void ath11k_tm_wmi_event_segmented(struct ath11k_base *ab, u32 cmd_id,
+-+					  struct sk_buff *skb)
+-+{
+-+	const void **tb;
+-+	const struct wmi_ftm_event_msg *ev;
+-+	u16 length;
+-+	int ret;
+-+
+-+	tb = ath11k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
+-+	if (IS_ERR(tb)) {
+-+		ret = PTR_ERR(tb);
+-+		ath11k_warn(ab, "failed to parse ftm event tlv: %d\n", ret);
+-+		return;
+-+	}
+-+
+-+	ev = tb[WMI_TAG_ARRAY_BYTE];
+-+	if (!ev) {
+-+		ath11k_warn(ab, "failed to fetch ftm msg\n");
+-+		kfree(tb);
+-+		return;
+-+	}
+-+
+-+	length = skb->len - TLV_HDR_SIZE;
+-+	ret = ath11k_tm_process_event(ab, cmd_id, ev, length);
+-+	if (ret)
+-+		ath11k_warn(ab, "Failed to process ftm event\n");
+-+
+-+	kfree(tb);
+-+}
+-+
+-+void ath11k_tm_wmi_event(struct ath11k_base *ab, u32 cmd_id, struct sk_buff *skb)
+-+{
+-+	if (test_bit(ATH11K_FLAG_FTM_SEGMENTED, &ab->dev_flags))
+-+		ath11k_tm_wmi_event_segmented(ab, cmd_id, skb);
+-+	else
+-+		ath11k_tm_wmi_event_unsegmented(ab, cmd_id, skb);
+-+}
+-+
+- static int ath11k_tm_cmd_get_version(struct ath11k *ar, struct nlattr *tb[])
+- {
+- 	struct sk_buff *skb;
+- 	int ret;
+- 
+- 	ath11k_dbg(ar->ab, ATH11K_DBG_TESTMODE,
+--		   "testmode cmd get version_major %d version_minor %d\n",
+-+		   "cmd get version_major %d version_minor %d\n",
+- 		   ATH11K_TESTMODE_VERSION_MAJOR,
+- 		   ATH11K_TESTMODE_VERSION_MINOR);
+- 
+-@@ -53,6 +260,43 @@ static int ath11k_tm_cmd_get_version(str
+- 	return cfg80211_testmode_reply(skb);
+- }
+- 
+-+static int ath11k_tm_cmd_testmode_start(struct ath11k *ar, struct nlattr *tb[])
+-+{
+-+	int ret;
+-+
+-+	mutex_lock(&ar->conf_mutex);
+-+
+-+	if (ar->state == ATH11K_STATE_FTM) {
+-+		ret = -EALREADY;
+-+		goto err;
+-+	}
+-+
+-+	/* start utf only when the driver is not in use  */
+-+	if (ar->state != ATH11K_STATE_OFF) {
+-+		ret = -EBUSY;
+-+		goto err;
+-+	}
+-+
+-+	ar->ab->testmode.eventdata = kzalloc(ATH11K_FTM_EVENT_MAX_BUF_LENGTH,
+-+					     GFP_KERNEL);
+-+	if (!ar->ab->testmode.eventdata) {
+-+		ret = -ENOMEM;
+-+		goto err;
+-+	}
+-+
+-+	ar->state = ATH11K_STATE_FTM;
+-+	ar->ftm_msgref = 0;
+-+
+-+	mutex_unlock(&ar->conf_mutex);
+-+
+-+	ath11k_dbg(ar->ab, ATH11K_DBG_TESTMODE, "cmd start\n");
+-+	return 0;
+-+
+-+err:
+-+	mutex_unlock(&ar->conf_mutex);
+-+	return ret;
+-+}
+-+
+- static int ath11k_tm_cmd_wmi(struct ath11k *ar, struct nlattr *tb[])
+- {
+- 	struct ath11k_pdev_wmi *wmi = ar->wmi;
+-@@ -63,11 +307,6 @@ static int ath11k_tm_cmd_wmi(struct ath1
+- 
+- 	mutex_lock(&ar->conf_mutex);
+- 
+--	if (ar->state != ATH11K_STATE_ON) {
+--		ret = -ENETDOWN;
+--		goto out;
+--	}
+--
+- 	if (!tb[ATH11K_TM_ATTR_DATA]) {
+- 		ret = -EINVAL;
+- 		goto out;
+-@@ -80,11 +319,17 @@ static int ath11k_tm_cmd_wmi(struct ath1
+- 
+- 	buf = nla_data(tb[ATH11K_TM_ATTR_DATA]);
+- 	buf_len = nla_len(tb[ATH11K_TM_ATTR_DATA]);
+-+	if (!buf_len) {
+-+		ath11k_warn(ar->ab, "No data present in testmode wmi command\n");
+-+		ret = -EINVAL;
+-+		goto out;
+-+	}
+-+
+- 	cmd_id = nla_get_u32(tb[ATH11K_TM_ATTR_WMI_CMDID]);
+- 
+- 	ath11k_dbg(ar->ab, ATH11K_DBG_TESTMODE,
+--		   "testmode cmd wmi cmd_id %d buf %pK buf_len %d\n",
+--		   cmd_id, buf, buf_len);
+-+		   "cmd wmi cmd_id %d buf length %d\n",
+-+		   cmd_id, buf_len);
+- 
+- 	ath11k_dbg_dump(ar->ab, ATH11K_DBG_TESTMODE, NULL, "", buf, buf_len);
+- 
+-@@ -111,6 +356,91 @@ out:
+- 	return ret;
+- }
+- 
+-+static int ath11k_tm_cmd_wmi_ftm(struct ath11k *ar, struct nlattr *tb[])
+-+{
+-+	struct ath11k_pdev_wmi *wmi = ar->wmi;
+-+	struct ath11k_base *ab = ar->ab;
+-+	struct sk_buff *skb;
+-+	u32 cmd_id, buf_len, hdr_info;
+-+	int ret;
+-+	void *buf;
+-+	u8 segnumber = 0, seginfo;
+-+	u16 chunk_len, total_bytes, num_segments;
+-+	u8 *bufpos;
+-+	struct wmi_ftm_cmd *ftm_cmd;
+-+
+-+	set_bit(ATH11K_FLAG_FTM_SEGMENTED, &ab->dev_flags);
+-+
+-+	mutex_lock(&ar->conf_mutex);
+-+
+-+	if (ar->state != ATH11K_STATE_FTM) {
+-+		ret = -ENETDOWN;
+-+		goto out;
+-+	}
+-+
+-+	if (!tb[ATH11K_TM_ATTR_DATA]) {
+-+		ret = -EINVAL;
+-+		goto out;
+-+	}
+-+
+-+	buf = nla_data(tb[ATH11K_TM_ATTR_DATA]);
+-+	buf_len = nla_len(tb[ATH11K_TM_ATTR_DATA]);
+-+	cmd_id = WMI_PDEV_UTF_CMDID;
+-+
+-+	ath11k_dbg(ar->ab, ATH11K_DBG_TESTMODE,
+-+		   "cmd wmi ftm cmd_id %d buffer length %d\n",
+-+		   cmd_id, buf_len);
+-+	ath11k_dbg_dump(ar->ab, ATH11K_DBG_TESTMODE, NULL, "", buf, buf_len);
+-+
+-+	bufpos = buf;
+-+	total_bytes = buf_len;
+-+	num_segments = total_bytes / MAX_WMI_UTF_LEN;
+-+
+-+	if (buf_len - (num_segments * MAX_WMI_UTF_LEN))
+-+		num_segments++;
+-+
+-+	while (buf_len) {
+-+		chunk_len = min_t(u16, buf_len, MAX_WMI_UTF_LEN);
+-+
+-+		skb = ath11k_wmi_alloc_skb(wmi->wmi_ab, (chunk_len +
+-+					   sizeof(struct wmi_ftm_cmd)));
+-+		if (!skb) {
+-+			ret = -ENOMEM;
+-+			goto out;
+-+		}
+-+
+-+		ftm_cmd = (struct wmi_ftm_cmd *)skb->data;
+-+		hdr_info = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_BYTE) |
+-+			   FIELD_PREP(WMI_TLV_LEN, (chunk_len +
+-+				      sizeof(struct wmi_ftm_seg_hdr)));
+-+		ftm_cmd->tlv_header = hdr_info;
+-+		ftm_cmd->seg_hdr.len = total_bytes;
+-+		ftm_cmd->seg_hdr.msgref = ar->ftm_msgref;
+-+		seginfo = FIELD_PREP(ATH11K_FTM_SEGHDR_TOTAL_SEGMENTS, num_segments) |
+-+			  FIELD_PREP(ATH11K_FTM_SEGHDR_CURRENT_SEQ, segnumber);
+-+		ftm_cmd->seg_hdr.segmentinfo = seginfo;
+-+		segnumber++;
+-+
+-+		memcpy(&ftm_cmd->data, bufpos, chunk_len);
+-+
+-+		ret = ath11k_wmi_cmd_send(wmi, skb, cmd_id);
+-+		if (ret) {
+-+			ath11k_warn(ar->ab, "failed to send wmi ftm command: %d\n", ret);
+-+			goto out;
+-+		}
+-+
+-+		buf_len -= chunk_len;
+-+		bufpos += chunk_len;
+-+	}
+-+
+-+	ar->ftm_msgref++;
+-+	ret = 0;
+-+
+-+out:
+-+	mutex_unlock(&ar->conf_mutex);
+-+	return ret;
+-+}
+-+
+- int ath11k_tm_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
+- 		  void *data, int len)
+- {
+-@@ -131,6 +461,10 @@ int ath11k_tm_cmd(struct ieee80211_hw *h
+- 		return ath11k_tm_cmd_get_version(ar, tb);
+- 	case ATH11K_TM_CMD_WMI:
+- 		return ath11k_tm_cmd_wmi(ar, tb);
+-+	case ATH11K_TM_CMD_TESTMODE_START:
+-+		return ath11k_tm_cmd_testmode_start(ar, tb);
+-+	case ATH11K_TM_CMD_WMI_FTM:
+-+		return ath11k_tm_cmd_wmi_ftm(ar, tb);
+- 	default:
+- 		return -EOPNOTSUPP;
+- 	}
+---- a/drivers/net/wireless/ath/ath11k/testmode.h
+-+++ b/drivers/net/wireless/ath/ath11k/testmode.h
+-@@ -8,11 +8,17 @@
+- 
+- #ifdef CPTCFG_NL80211_TESTMODE
+- 
+-+void ath11k_tm_wmi_event(struct ath11k_base *ab, u32 cmd_id, struct sk_buff *skb);
+- int ath11k_tm_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
+- 		  void *data, int len);
+- 
+- #else
+- 
+-+static inline void ath11k_tm_wmi_event(struct ath11k_base *ab, u32 cmd_id,
+-+				       struct sk_buff *skb)
+-+{
+-+}
+-+
+- static inline int ath11k_tm_cmd(struct ieee80211_hw *hw,
+- 				struct ieee80211_vif *vif,
+- 				void *data, int len)
+---- a/drivers/net/wireless/ath/ath11k/testmode_i.h
+-+++ b/drivers/net/wireless/ath/ath11k/testmode_i.h
+-@@ -1,6 +1,7 @@
+- /* SPDX-License-Identifier: BSD-3-Clause-Clear */
+- /*
+-  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+-+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+-  */
+- 
+- /* "API" level of the ath11k testmode interface. Bump it after every
+-@@ -11,9 +12,10 @@
+- /* Bump this after every _compatible_ interface change, for example
+-  * addition of a new command or an attribute.
+-  */
+--#define ATH11K_TESTMODE_VERSION_MINOR 0
+-+#define ATH11K_TESTMODE_VERSION_MINOR 1
+- 
+- #define ATH11K_TM_DATA_MAX_LEN		5000
+-+#define ATH11K_FTM_EVENT_MAX_BUF_LENGTH 2048
+- 
+- enum ath11k_tm_attr {
+- 	__ATH11K_TM_ATTR_INVALID		= 0,
+-@@ -47,4 +49,18 @@ enum ath11k_tm_cmd {
+- 	 * ATH11K_TM_ATTR_DATA.
+- 	 */
+- 	ATH11K_TM_CMD_WMI = 1,
+-+
+-+	/* Boots the UTF firmware, the netdev interface must be down at the
+-+	 * time.
+-+	 */
+-+	ATH11K_TM_CMD_TESTMODE_START = 2,
+-+
+-+	/* The command used to transmit a FTM WMI command to the firmware
+-+	 * and the event to receive WMI events from the firmware. The data
+-+	 * received only contain the payload, need to add the tlv header
+-+	 * and send the cmd to firmware with command id WMI_PDEV_UTF_CMDID.
+-+	 * The data payload size could be large and the driver needs to
+-+	 * send segmented data to firmware.
+-+	 */
+-+	ATH11K_TM_CMD_WMI_FTM = 3,
+- };
+---- a/drivers/net/wireless/ath/ath11k/wmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
+-@@ -1,7 +1,7 @@
+- // SPDX-License-Identifier: BSD-3-Clause-Clear
+- /*
+-  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+-- * Copyright (c) 2021, Qualcomm Innovation Center, Inc. All rights reserved.
+-+ * Copyright (c) 2021, 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+-  */
+- #include <linux/skbuff.h>
+- #include <linux/ctype.h>
+-@@ -19,6 +19,7 @@
+- #include "mac.h"
+- #include "hw.h"
+- #include "peer.h"
+-+#include "testmode.h"
+- 
+- struct wmi_tlv_policy {
+- 	size_t min_len;
+-@@ -237,9 +238,8 @@ static int ath11k_wmi_tlv_parse(struct a
+- 				   (void *)tb);
+- }
+- 
+--static const void **
+--ath11k_wmi_tlv_parse_alloc(struct ath11k_base *ab, const void *ptr,
+--			   size_t len, gfp_t gfp)
+-+const void **ath11k_wmi_tlv_parse_alloc(struct ath11k_base *ab, const void *ptr,
+-+					size_t len, gfp_t gfp)
+- {
+- 	const void **tb;
+- 	int ret;
+-@@ -8628,6 +8628,9 @@ static void ath11k_wmi_tlv_op_rx(struct
+- 	case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID:
+- 		ath11k_wmi_pdev_csa_switch_count_status_event(ab, skb);
+- 		break;
+-+	case WMI_PDEV_UTF_EVENTID:
+-+		ath11k_tm_wmi_event(ab, id, skb);
+-+		break;
+- 	case WMI_PDEV_TEMPERATURE_EVENTID:
+- 		ath11k_wmi_pdev_temperature_event(ab, skb);
+- 		break;
+---- a/drivers/net/wireless/ath/ath11k/wmi.h
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.h
+-@@ -1,6 +1,7 @@
+- /* SPDX-License-Identifier: BSD-3-Clause-Clear */
+- /*
+-  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+-+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+-  */
+- 
+- #ifndef ATH11K_WMI_H
+-@@ -68,6 +69,7 @@ struct wmi_tlv {
+- 
+- #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1
+- 
+-+#define MAX_WMI_UTF_LEN 252
+- #define WMI_BA_MODE_BUFFER_SIZE_256  3
+- /*
+-  * HW mode config type replicated from FW header
+-@@ -3564,6 +3566,24 @@ struct wmi_get_pdev_temperature_cmd {
+- 	u32 pdev_id;
+- } __packed;
+- 
+-+struct wmi_ftm_seg_hdr {
+-+	u32 len;
+-+	u32 msgref;
+-+	u32 segmentinfo;
+-+	u32 pdev_id;
+-+} __packed;
+-+
+-+struct wmi_ftm_cmd {
+-+	u32 tlv_header;
+-+	struct wmi_ftm_seg_hdr seg_hdr;
+-+	u8 data[];
+-+} __packed;
+-+
+-+struct wmi_ftm_event_msg {
+-+	struct wmi_ftm_seg_hdr seg_hdr;
+-+	u8 data[];
+-+} __packed;
+-+
+- #define WMI_BEACON_TX_BUFFER_SIZE	512
+- 
+- #define WMI_EMA_TMPL_IDX_SHIFT            8
+-@@ -6300,6 +6320,8 @@ enum wmi_sta_keepalive_method {
+- #define WMI_STA_KEEPALIVE_INTERVAL_DEFAULT	30
+- #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE	0
+- 
+-+const void **ath11k_wmi_tlv_parse_alloc(struct ath11k_base *ab, const void *ptr,
+-+					size_t len, gfp_t gfp);
+- int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb,
+- 			u32 cmd_id);
+- struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len);
+---- a/drivers/net/wireless/ath/ath11k/wow.c
+-+++ b/drivers/net/wireless/ath/ath11k/wow.c
+-@@ -1,7 +1,7 @@
+- // SPDX-License-Identifier: BSD-3-Clause-Clear
+- /*
+-  * Copyright (c) 2020 The Linux Foundation. All rights reserved.
+-- * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
+-+ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
+-  */
+- 
+- #include <linux/delay.h>
+-@@ -838,6 +838,7 @@ exit:
+- 		case ATH11K_STATE_RESTARTING:
+- 		case ATH11K_STATE_RESTARTED:
+- 		case ATH11K_STATE_WEDGED:
+-+		case ATH11K_STATE_FTM:
+- 			ath11k_warn(ar->ab, "encountered unexpected device state %d on resume, cannot recover\n",
+- 				    ar->state);
+- 			ret = -EIO;
+diff --git a/package/kernel/mac80211/patches/ath11k/0083-wifi-ath11k-Allow-ath11k-to-boot-without-caldata-in-.patch b/package/kernel/mac80211/patches/ath11k/0083-wifi-ath11k-Allow-ath11k-to-boot-without-caldata-in-.patch
+deleted file mode 100644
+index 5a1fa88294..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0083-wifi-ath11k-Allow-ath11k-to-boot-without-caldata-in-.patch
++++ /dev/null
+@@ -1,47 +0,0 @@
+-From 8aeba427296bff6a6051686f1d139c89a0b00e4c Mon Sep 17 00:00:00 2001
+-From: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
+-Date: Fri, 26 May 2023 12:41:07 +0300
+-Subject: [PATCH 84/84] wifi: ath11k: Allow ath11k to boot without caldata in
+- ftm mode
+-
+-Currently, if ath11k is unable to load the calibration data file it will
+-always exit. However the calibration data may not be present in factory
+-test mode, so update the logic to allow the driver to execute in FTM mode
+-even if downloading the calibration data fails.
+-
+-Tested-on : IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
+-Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230517135934.16408-5-quic_rajkbhag@quicinc.com
+----
+- drivers/net/wireless/ath/ath11k/qmi.c | 10 +++++++++-
+- 1 file changed, 9 insertions(+), 1 deletion(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/qmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/qmi.c
+-@@ -1,7 +1,7 @@
+- // SPDX-License-Identifier: BSD-3-Clause-Clear
+- /*
+-  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+-- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+-+ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
+-  */
+- 
+- #include <linux/elf.h>
+-@@ -2460,6 +2460,14 @@ static int ath11k_qmi_load_bdf_qmi(struc
+- 
+- 		fw_entry = ath11k_core_firmware_request(ab, ATH11K_DEFAULT_CAL_FILE);
+- 		if (IS_ERR(fw_entry)) {
+-+			/* Caldata may not be present during first time calibration in
+-+			 * factory hence allow to boot without loading caldata in ftm mode
+-+			 */
+-+			if (ath11k_ftm_mode) {
+-+				ath11k_info(ab,
+-+					    "Booting without cal data file in factory test mode\n");
+-+				return 0;
+-+			}
+- 			ret = PTR_ERR(fw_entry);
+- 			ath11k_warn(ab,
+- 				    "qmi failed to load CAL data file:%s\n",
+diff --git a/package/kernel/mac80211/patches/ath11k/0084-wifi-ath11k-Add-HTT-stats-for-PHY-reset-case.patch b/package/kernel/mac80211/patches/ath11k/0084-wifi-ath11k-Add-HTT-stats-for-PHY-reset-case.patch
+deleted file mode 100644
+index 946f5f7b57..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/0084-wifi-ath11k-Add-HTT-stats-for-PHY-reset-case.patch
++++ /dev/null
+@@ -1,261 +0,0 @@
+-From 2d4f9093e2d8531ad0a2bb98fe5b36dc8addf2a2 Mon Sep 17 00:00:00 2001
+-From: Nidhi Jain <quic_nidhjain@quicinc.com>
+-Date: Fri, 26 May 2023 12:41:07 +0300
+-Subject: [PATCH] wifi: ath11k: Add HTT stats for PHY reset case
+-
+-New HTT stats are added with stats type 37 to
+-provide PHY reset stats and PHY reset counter stats.
+-
+-PHY reset stats are used to display the current
+-PHY-related operation information such as band, CCA
+-threshold, current operating channel etc.,
+-
+-PHY reset counter stats are used to display the
+-PHY reset counter values like calibration counts,
+-temperature based recalibration counts etc.,
+-
+-Usage:
+-echo 37 > /sys/kernel/debug/ieee80211/phyX/ath11k/htt_stats_type
+-cat /sys/kernel/debug/ieee80211/phyx/ath11k/htt_stats
+-
+-Output:
+-
+-HTT_PHY_RESET_STATS_TLV:
+-pdev_id = 0
+-chan_mhz = 5180
+-chan_band_center_freq1 = 5210
+-chan_band_center_freq2 = 0
+-chan_phy_mode = 18
+-chan_flags = 0x8
+-chan_num = 36
+-reset_cause = 0x50000
+-prev_reset_cause = 0x50000
+-phy_warm_reset_src = 0x0
+-rx_gain_tbl_mode = 0
+-xbar_val = 0xfac688
+-force_calibration = 0
+-phyrf_mode = 0
+-phy_homechan = 0
+-phy_tx_ch_mask = 0x3
+-phy_rx_ch_mask = 0x3
+-phybb_ini_mask = 0x5
+-phyrf_ini_mask = 0x0
+-phy_dfs_en_mask = 0x0
+-phy_sscan_en_mask = 0x0
+-phy_synth_sel_mask = 0x0
+-phy_adfs_freq = 0
+-cck_fir_settings = 0x0
+-phy_dyn_pri_chan = 6
+-cca_thresh = 0x26232020
+-dyn_cca_status = 0
+-rxdesense_thresh_hw = 0xcfe0afe
+-rxdesense_thresh_sw = 0xcfe0afe
+-
+-HTT_PHY_RESET_COUNTERS_TLV:
+-pdev_id = 0
+-cf_active_low_fail_cnt = 0
+-cf_active_low_pass_cnt = 0
+-phy_off_through_vreg_cnt = 0
+-force_calibration_cnt = 0
+-rf_mode_switch_phy_off_cnt = 0
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Nidhi Jain <quic_nidhjain@quicinc.com>
+-Signed-off-by: Maharaja Kennadyrajan <quic_mkenna@quicinc.com>
+-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+-Link: https://lore.kernel.org/r/20230517141242.2754293-1-quic_mkenna@quicinc.com
+----
+- .../wireless/ath/ath11k/debugfs_htt_stats.c   | 114 ++++++++++++++++++
+- .../wireless/ath/ath11k/debugfs_htt_stats.h   |  43 +++++++
+- 2 files changed, 157 insertions(+)
+-
+---- a/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c
+-+++ b/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c
+-@@ -4011,6 +4011,114 @@ void htt_print_phy_stats_tlv(const void
+- 	stats_req->buf_len = len;
+- }
+- 
+-+static inline void
+-+htt_print_phy_reset_counters_tlv(const void *tag_buf,
+-+				 u16 tag_len,
+-+				 struct debug_htt_stats_req *stats_req)
+-+{
+-+	const struct htt_phy_reset_counters_tlv *htt_stats_buf = tag_buf;
+-+	u8 *buf = stats_req->buf;
+-+	u32 len = stats_req->buf_len;
+-+	u32 buf_len = ATH11K_HTT_STATS_BUF_SIZE;
+-+
+-+	if (tag_len < sizeof(*htt_stats_buf))
+-+		return;
+-+
+-+	len += scnprintf(buf + len, buf_len - len, "HTT_PHY_RESET_COUNTERS_TLV:\n");
+-+
+-+	len += scnprintf(buf + len, buf_len - len, "pdev_id = %u\n",
+-+			 htt_stats_buf->pdev_id);
+-+	len += scnprintf(buf + len, buf_len - len, "cf_active_low_fail_cnt = %u\n",
+-+			 htt_stats_buf->cf_active_low_fail_cnt);
+-+	len += scnprintf(buf + len, buf_len - len, "cf_active_low_pass_cnt = %u\n",
+-+			 htt_stats_buf->cf_active_low_pass_cnt);
+-+	len += scnprintf(buf + len, buf_len - len, "phy_off_through_vreg_cnt = %u\n",
+-+			 htt_stats_buf->phy_off_through_vreg_cnt);
+-+	len += scnprintf(buf + len, buf_len - len, "force_calibration_cnt = %u\n",
+-+			 htt_stats_buf->force_calibration_cnt);
+-+	len += scnprintf(buf + len, buf_len - len, "rf_mode_switch_phy_off_cnt = %u\n",
+-+			 htt_stats_buf->rf_mode_switch_phy_off_cnt);
+-+
+-+	stats_req->buf_len = len;
+-+}
+-+
+-+static inline void
+-+htt_print_phy_reset_stats_tlv(const void *tag_buf,
+-+			      u16 tag_len,
+-+			      struct debug_htt_stats_req *stats_req)
+-+{
+-+	const struct htt_phy_reset_stats_tlv *htt_stats_buf = tag_buf;
+-+	u8 *buf = stats_req->buf;
+-+	u32 len = stats_req->buf_len;
+-+	u32 buf_len = ATH11K_HTT_STATS_BUF_SIZE;
+-+
+-+	if (tag_len < sizeof(*htt_stats_buf))
+-+		return;
+-+
+-+	len += scnprintf(buf + len, buf_len - len, "HTT_PHY_RESET_STATS_TLV:\n");
+-+
+-+	len += scnprintf(buf + len, buf_len - len, "pdev_id = %u\n",
+-+			 htt_stats_buf->pdev_id);
+-+	len += scnprintf(buf + len, buf_len - len, "chan_mhz = %u\n",
+-+			 htt_stats_buf->chan_mhz);
+-+	len += scnprintf(buf + len, buf_len - len, "chan_band_center_freq1 = %u\n",
+-+			 htt_stats_buf->chan_band_center_freq1);
+-+	len += scnprintf(buf + len, buf_len - len, "chan_band_center_freq2 = %u\n",
+-+			 htt_stats_buf->chan_band_center_freq2);
+-+	len += scnprintf(buf + len, buf_len - len, "chan_phy_mode = %u\n",
+-+			 htt_stats_buf->chan_phy_mode);
+-+	len += scnprintf(buf + len, buf_len - len, "chan_flags = 0x%0x\n",
+-+			 htt_stats_buf->chan_flags);
+-+	len += scnprintf(buf + len, buf_len - len, "chan_num = %u\n",
+-+			 htt_stats_buf->chan_num);
+-+	len += scnprintf(buf + len, buf_len - len, "reset_cause = 0x%0x\n",
+-+			 htt_stats_buf->reset_cause);
+-+	len += scnprintf(buf + len, buf_len - len, "prev_reset_cause = 0x%0x\n",
+-+			 htt_stats_buf->prev_reset_cause);
+-+	len += scnprintf(buf + len, buf_len - len, "phy_warm_reset_src = 0x%0x\n",
+-+			 htt_stats_buf->phy_warm_reset_src);
+-+	len += scnprintf(buf + len, buf_len - len, "rx_gain_tbl_mode = %d\n",
+-+			 htt_stats_buf->rx_gain_tbl_mode);
+-+	len += scnprintf(buf + len, buf_len - len, "xbar_val = 0x%0x\n",
+-+			 htt_stats_buf->xbar_val);
+-+	len += scnprintf(buf + len, buf_len - len, "force_calibration = %u\n",
+-+			 htt_stats_buf->force_calibration);
+-+	len += scnprintf(buf + len, buf_len - len, "phyrf_mode = %u\n",
+-+			 htt_stats_buf->phyrf_mode);
+-+	len += scnprintf(buf + len, buf_len - len, "phy_homechan = %u\n",
+-+			 htt_stats_buf->phy_homechan);
+-+	len += scnprintf(buf + len, buf_len - len, "phy_tx_ch_mask = 0x%0x\n",
+-+			 htt_stats_buf->phy_tx_ch_mask);
+-+	len += scnprintf(buf + len, buf_len - len, "phy_rx_ch_mask = 0x%0x\n",
+-+			 htt_stats_buf->phy_rx_ch_mask);
+-+	len += scnprintf(buf + len, buf_len - len, "phybb_ini_mask = 0x%0x\n",
+-+			 htt_stats_buf->phybb_ini_mask);
+-+	len += scnprintf(buf + len, buf_len - len, "phyrf_ini_mask = 0x%0x\n",
+-+			 htt_stats_buf->phyrf_ini_mask);
+-+	len += scnprintf(buf + len, buf_len - len, "phy_dfs_en_mask = 0x%0x\n",
+-+			 htt_stats_buf->phy_dfs_en_mask);
+-+	len += scnprintf(buf + len, buf_len - len, "phy_sscan_en_mask = 0x%0x\n",
+-+			 htt_stats_buf->phy_sscan_en_mask);
+-+	len += scnprintf(buf + len, buf_len - len, "phy_synth_sel_mask = 0x%0x\n",
+-+			 htt_stats_buf->phy_synth_sel_mask);
+-+	len += scnprintf(buf + len, buf_len - len, "phy_adfs_freq = %u\n",
+-+			 htt_stats_buf->phy_adfs_freq);
+-+	len += scnprintf(buf + len, buf_len - len, "cck_fir_settings = 0x%0x\n",
+-+			 htt_stats_buf->cck_fir_settings);
+-+	len += scnprintf(buf + len, buf_len - len, "phy_dyn_pri_chan = %u\n",
+-+			 htt_stats_buf->phy_dyn_pri_chan);
+-+	len += scnprintf(buf + len, buf_len - len, "cca_thresh = 0x%0x\n",
+-+			 htt_stats_buf->cca_thresh);
+-+	len += scnprintf(buf + len, buf_len - len, "dyn_cca_status = %u\n",
+-+			 htt_stats_buf->dyn_cca_status);
+-+	len += scnprintf(buf + len, buf_len - len, "rxdesense_thresh_hw = 0x%x\n",
+-+			 htt_stats_buf->rxdesense_thresh_hw);
+-+	len += scnprintf(buf + len, buf_len - len, "rxdesense_thresh_sw = 0x%x\n",
+-+			 htt_stats_buf->rxdesense_thresh_sw);
+-+
+-+	stats_req->buf_len = len;
+-+}
+-+
+- static inline
+- void htt_print_peer_ctrl_path_txrx_stats_tlv(const void *tag_buf,
+- 					     struct debug_htt_stats_req *stats_req)
+-@@ -4425,6 +4533,12 @@ static int ath11k_dbg_htt_ext_stats_pars
+- 	case HTT_STATS_PHY_STATS_TAG:
+- 		htt_print_phy_stats_tlv(tag_buf, stats_req);
+- 		break;
+-+	case HTT_STATS_PHY_RESET_COUNTERS_TAG:
+-+		htt_print_phy_reset_counters_tlv(tag_buf, len, stats_req);
+-+		break;
+-+	case HTT_STATS_PHY_RESET_STATS_TAG:
+-+		htt_print_phy_reset_stats_tlv(tag_buf, len, stats_req);
+-+		break;
+- 	case HTT_STATS_PEER_CTRL_PATH_TXRX_STATS_TAG:
+- 		htt_print_peer_ctrl_path_txrx_stats_tlv(tag_buf, stats_req);
+- 		break;
+---- a/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.h
+-+++ b/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.h
+-@@ -111,6 +111,8 @@ enum htt_tlv_tag_t {
+- 	HTT_STATS_TXBF_OFDMA_STEER_STATS_TAG		    = 116,
+- 	HTT_STATS_PHY_COUNTERS_TAG			    = 121,
+- 	HTT_STATS_PHY_STATS_TAG				    = 122,
+-+	HTT_STATS_PHY_RESET_COUNTERS_TAG		    = 123,
+-+	HTT_STATS_PHY_RESET_STATS_TAG			    = 124,
+- 
+- 	HTT_STATS_MAX_TAG,
+- };
+-@@ -1964,6 +1966,47 @@ struct htt_phy_stats_tlv {
+- 	u32 fw_run_time;
+- };
+- 
+-+struct htt_phy_reset_counters_tlv {
+-+	u32 pdev_id;
+-+	u32 cf_active_low_fail_cnt;
+-+	u32 cf_active_low_pass_cnt;
+-+	u32 phy_off_through_vreg_cnt;
+-+	u32 force_calibration_cnt;
+-+	u32 rf_mode_switch_phy_off_cnt;
+-+};
+-+
+-+struct htt_phy_reset_stats_tlv {
+-+	u32 pdev_id;
+-+	u32 chan_mhz;
+-+	u32 chan_band_center_freq1;
+-+	u32 chan_band_center_freq2;
+-+	u32 chan_phy_mode;
+-+	u32 chan_flags;
+-+	u32 chan_num;
+-+	u32 reset_cause;
+-+	u32 prev_reset_cause;
+-+	u32 phy_warm_reset_src;
+-+	u32 rx_gain_tbl_mode;
+-+	u32 xbar_val;
+-+	u32 force_calibration;
+-+	u32 phyrf_mode;
+-+	u32 phy_homechan;
+-+	u32 phy_tx_ch_mask;
+-+	u32 phy_rx_ch_mask;
+-+	u32 phybb_ini_mask;
+-+	u32 phyrf_ini_mask;
+-+	u32 phy_dfs_en_mask;
+-+	u32 phy_sscan_en_mask;
+-+	u32 phy_synth_sel_mask;
+-+	u32 phy_adfs_freq;
+-+	u32 cck_fir_settings;
+-+	u32 phy_dyn_pri_chan;
+-+	u32 cca_thresh;
+-+	u32 dyn_cca_status;
+-+	u32 rxdesense_thresh_hw;
+-+	u32 rxdesense_thresh_sw;
+-+};
+-+
+- struct htt_peer_ctrl_path_txrx_stats_tlv {
+- 	/* peer mac address */
+- 	u8 peer_mac_addr[ETH_ALEN];
+diff --git a/package/kernel/mac80211/patches/ath11k/100-wifi-ath11k-use-unique-QRTR-instance-ID.patch b/package/kernel/mac80211/patches/ath11k/100-wifi-ath11k-use-unique-QRTR-instance-ID.patch
+deleted file mode 100644
+index 39d5a61d5a..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/100-wifi-ath11k-use-unique-QRTR-instance-ID.patch
++++ /dev/null
+@@ -1,162 +0,0 @@
+-From 534a5f99d589cfa6b244b4433c192b6a278a67ff Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Sat, 5 Nov 2022 20:15:40 +0100
+-Subject: [PATCH] wifi: ath11k: use unique QRTR instance ID
+-
+-Currently, trying to use AHB + PCI/MHI cards or multiple PCI/MHI cards
+-will cause a clash in the QRTR instance node ID and prevent the driver
+-from talking via QMI to the card and thus initializing it with:
+-[    9.836329] ath11k c000000.wifi: host capability request failed: 1 90
+-[    9.842047] ath11k c000000.wifi: failed to send qmi host cap: -22
+-
+-So, in order to allow for this combination of cards, especially AHB + PCI
+-cards like IPQ8074 + QCN9074 (Used by me and tested on) set the desired
+-QRTR instance ID offset by calculating a unique one based on PCI domain
+-and bus ID-s and writing it to bits 7-0 of BHI_ERRDBG2 MHI register by
+-using the SBL state callback that is added as part of the series.
+-We also have to make sure that new QRTR offset is added on top of the
+-default QRTR instance ID-s that are currently used in the driver.
+-
+-This finally allows using AHB + PCI or multiple PCI cards on the same
+-system.
+-
+-Since this is not supported on QCA6390 and like, its limited to QCN9074
+-which is known to support changing QRTR instance ID.
+-
+-Before:
+-root@OpenWrt:/# qrtr-lookup
+-  Service Version Instance Node  Port
+-     1054       1        0    7     1 <unknown>
+-       69       1        2    7     3 ATH10k WLAN firmware service
+-
+-After:
+-root@OpenWrt:/# qrtr-lookup
+-  Service Version Instance Node  Port
+-     1054       1        0    7     1 <unknown>
+-       69       1        2    7     3 ATH10k WLAN firmware service
+-       15       1        0    8     1 Test service
+-       69       1        8    8     2 ATH10k WLAN firmware service
+-
+-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.5.0.1-01208-QCAHKSWPL_SILICONZ-1
+-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01208-QCAHKSWPL_SILICONZ-1
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- drivers/net/wireless/ath/ath11k/mhi.c | 49 ++++++++++++++++++---------
+- drivers/net/wireless/ath/ath11k/mhi.h |  3 ++
+- drivers/net/wireless/ath/ath11k/pci.c |  9 ++++-
+- 3 files changed, 44 insertions(+), 17 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/mhi.c
+-+++ b/drivers/net/wireless/ath/ath11k/mhi.c
+-@@ -294,6 +294,34 @@ static void ath11k_mhi_op_runtime_put(st
+- {
+- }
+- 
+-+static int ath11k_mhi_op_read_reg(struct mhi_controller *mhi_cntrl,
+-+				  void __iomem *addr,
+-+				  u32 *out)
+-+{
+-+	*out = readl(addr);
+-+
+-+	return 0;
+-+}
+-+
+-+static void ath11k_mhi_op_write_reg(struct mhi_controller *mhi_cntrl,
+-+				    void __iomem *addr,
+-+				    u32 val)
+-+{
+-+	writel(val, addr);
+-+}
+-+
+-+static void ath11k_mhi_qrtr_instance_set(struct mhi_controller *mhi_cntrl)
+-+{
+-+	struct ath11k_base *ab = dev_get_drvdata(mhi_cntrl->cntrl_dev);
+-+
+-+	if (ab->hw_rev == ATH11K_HW_QCN9074_HW10) {
+-+		ath11k_mhi_op_write_reg(mhi_cntrl,
+-+					mhi_cntrl->bhi + BHI_ERRDBG2,
+-+					FIELD_PREP(QRTR_INSTANCE_MASK,
+-+					ab->qmi.service_ins_id - ab->hw_params.qmi_service_ins_id));
+-+	}
+-+}
+-+
+- static char *ath11k_mhi_op_callback_to_str(enum mhi_callback reason)
+- {
+- 	switch (reason) {
+-@@ -315,6 +343,8 @@ static char *ath11k_mhi_op_callback_to_s
+- 		return "MHI_CB_FATAL_ERROR";
+- 	case MHI_CB_BW_REQ:
+- 		return "MHI_CB_BW_REQ";
+-+	case MHI_CB_EE_SBL_MODE:
+-+		return "MHI_CB_EE_SBL_MODE";
+- 	default:
+- 		return "UNKNOWN";
+- 	}
+-@@ -336,27 +366,14 @@ static void ath11k_mhi_op_status_cb(stru
+- 		if (!(test_bit(ATH11K_FLAG_UNREGISTERING, &ab->dev_flags)))
+- 			queue_work(ab->workqueue_aux, &ab->reset_work);
+- 		break;
+-+	case MHI_CB_EE_SBL_MODE:
+-+		ath11k_mhi_qrtr_instance_set(mhi_cntrl);
+-+		break;
+- 	default:
+- 		break;
+- 	}
+- }
+- 
+--static int ath11k_mhi_op_read_reg(struct mhi_controller *mhi_cntrl,
+--				  void __iomem *addr,
+--				  u32 *out)
+--{
+--	*out = readl(addr);
+--
+--	return 0;
+--}
+--
+--static void ath11k_mhi_op_write_reg(struct mhi_controller *mhi_cntrl,
+--				    void __iomem *addr,
+--				    u32 val)
+--{
+--	writel(val, addr);
+--}
+--
+- static int ath11k_mhi_read_addr_from_dt(struct mhi_controller *mhi_ctrl)
+- {
+- 	struct device_node *np;
+---- a/drivers/net/wireless/ath/ath11k/mhi.h
+-+++ b/drivers/net/wireless/ath/ath11k/mhi.h
+-@@ -16,6 +16,9 @@
+- #define MHICTRL					0x38
+- #define MHICTRL_RESET_MASK			0x2
+- 
+-+#define BHI_ERRDBG2				0x38
+-+#define QRTR_INSTANCE_MASK			GENMASK(7, 0)
+-+
+- int ath11k_mhi_start(struct ath11k_pci *ar_pci);
+- void ath11k_mhi_stop(struct ath11k_pci *ar_pci);
+- int ath11k_mhi_register(struct ath11k_pci *ar_pci);
+---- a/drivers/net/wireless/ath/ath11k/pci.c
+-+++ b/drivers/net/wireless/ath/ath11k/pci.c
+-@@ -370,13 +370,20 @@ static void ath11k_pci_sw_reset(struct a
+- static void ath11k_pci_init_qmi_ce_config(struct ath11k_base *ab)
+- {
+- 	struct ath11k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg;
+-+	struct ath11k_pci *ab_pci = ath11k_pci_priv(ab);
+-+	struct pci_bus *bus = ab_pci->pdev->bus;
+- 
+- 	cfg->tgt_ce = ab->hw_params.target_ce_config;
+- 	cfg->tgt_ce_len = ab->hw_params.target_ce_count;
+- 
+- 	cfg->svc_to_ce_map = ab->hw_params.svc_to_ce_map;
+- 	cfg->svc_to_ce_map_len = ab->hw_params.svc_to_ce_map_len;
+--	ab->qmi.service_ins_id = ab->hw_params.qmi_service_ins_id;
+-+
+-+	if (ab->hw_rev == ATH11K_HW_QCN9074_HW10) {
+-+		ab->qmi.service_ins_id = ab->hw_params.qmi_service_ins_id +
+-+		(((pci_domain_nr(bus) & 0xF) << 4) | (bus->number & 0xF));
+-+	} else
+-+		ab->qmi.service_ins_id = ab->hw_params.qmi_service_ins_id;
+- 
+- 	ath11k_ce_get_shadow_config(ab, &cfg->shadow_reg_v2,
+- 				    &cfg->shadow_reg_v2_len);
+diff --git a/package/kernel/mac80211/patches/ath11k/900-ath11k-control-thermal-support-via-symbol.patch b/package/kernel/mac80211/patches/ath11k/900-ath11k-control-thermal-support-via-symbol.patch
+deleted file mode 100644
+index 60720a721e..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/900-ath11k-control-thermal-support-via-symbol.patch
++++ /dev/null
+@@ -1,66 +0,0 @@
+-From 703d6551f71e7290619d6effe2a25a64e10538b7 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Thu, 15 Dec 2022 12:20:52 +0100
+-Subject: [PATCH] ath11k: control thermal support via symbol
+-
+-Currently, thermal support will get built if CONFIG_THERMAL is reachable,
+-however this is not suitable for OpenWrt as with ALL_KMODS being set to y
+-ATH11K_THERMAL wont get selected and so hwmon and thermal kmods wont get
+-pulled in resulting in a build-failure.
+-
+-So, to avoid that, lets do what is already done for ath10k and add a
+-config symbol into backports for enabling thermal support.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- drivers/net/wireless/ath/ath11k/Kconfig   | 7 +++++++
+- drivers/net/wireless/ath/ath11k/Makefile  | 2 +-
+- drivers/net/wireless/ath/ath11k/thermal.h | 2 +-
+- local-symbols                             | 1 +
+- 4 files changed, 10 insertions(+), 2 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/Kconfig
+-+++ b/drivers/net/wireless/ath/ath11k/Kconfig
+-@@ -61,3 +61,10 @@ config ATH11K_SPECTRAL
+- 	  Enable ath11k spectral scan support
+- 
+- 	  Say Y to enable access to the FFT/spectral data via debugfs.
+-+
+-+config ATH11K_THERMAL
+-+	bool "ath11k thermal sensors and throttling support"
+-+	depends on ATH11K
+-+	depends on THERMAL
+-+	help
+-+	  Enable ath11k thermal sensors and throttling support.
+---- a/drivers/net/wireless/ath/ath11k/Makefile
+-+++ b/drivers/net/wireless/ath/ath11k/Makefile
+-@@ -22,7 +22,7 @@ ath11k-y += core.o \
+- ath11k-$(CPTCFG_ATH11K_DEBUGFS) += debugfs.o debugfs_htt_stats.o debugfs_sta.o
+- ath11k-$(CPTCFG_NL80211_TESTMODE) += testmode.o
+- ath11k-$(CPTCFG_ATH11K_TRACING) += trace.o
+--ath11k-$(CONFIG_THERMAL) += thermal.o
+-+ath11k-$(CPTCFG_ATH11K_THERMAL) += thermal.o
+- ath11k-$(CPTCFG_ATH11K_SPECTRAL) += spectral.o
+- ath11k-$(CONFIG_PM) += wow.o
+- 
+---- a/drivers/net/wireless/ath/ath11k/thermal.h
+-+++ b/drivers/net/wireless/ath/ath11k/thermal.h
+-@@ -25,7 +25,7 @@ struct ath11k_thermal {
+- 	int temperature;
+- };
+- 
+--#if IS_REACHABLE(CONFIG_THERMAL)
+-+#if IS_REACHABLE(CPTCFG_ATH11K_THERMAL)
+- int ath11k_thermal_register(struct ath11k_base *sc);
+- void ath11k_thermal_unregister(struct ath11k_base *sc);
+- int ath11k_thermal_set_throttling(struct ath11k *ar, u32 throttle_state);
+---- a/local-symbols
+-+++ b/local-symbols
+-@@ -174,6 +174,7 @@ ATH11K_DEBUG=
+- ATH11K_DEBUGFS=
+- ATH11K_TRACING=
+- ATH11K_SPECTRAL=
+-+ATH11K_THERMAL=
+- WLAN_VENDOR_ATMEL=
+- ATMEL=
+- PCI_ATMEL=
+diff --git a/package/kernel/mac80211/patches/ath11k/901-wifi-ath11k-pci-fix-compilation-in-5.16-and-older.patch b/package/kernel/mac80211/patches/ath11k/901-wifi-ath11k-pci-fix-compilation-in-5.16-and-older.patch
+deleted file mode 100644
+index 7215656389..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/901-wifi-ath11k-pci-fix-compilation-in-5.16-and-older.patch
++++ /dev/null
+@@ -1,29 +0,0 @@
+-From 04178918e7f6b5f34dde81ec79ee8a1ccace3be3 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Mon, 17 Oct 2022 11:45:03 +0200
+-Subject: [PATCH] wifi: ath11k: pci: fix compilation in 5.16 and older
+-
+-Commit ("genirq/msi, treewide: Use a named struct for PCI/MSI attributes")
+-changed the msi_desc structure a bit, however that is only available in
+-kernels 5.17 and newer, so check for kernel version to allow compilation
+-in 5.16 and older.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- drivers/net/wireless/ath/ath11k/pci.c | 4 ++++
+- 1 file changed, 4 insertions(+)
+-
+---- a/drivers/net/wireless/ath/ath11k/pci.c
+-+++ b/drivers/net/wireless/ath/ath11k/pci.c
+-@@ -458,7 +458,11 @@ static int ath11k_pci_alloc_msi(struct a
+- 	pci_read_config_dword(pci_dev, pci_dev->msi_cap + PCI_MSI_ADDRESS_LO,
+- 			      &ab->pci.msi.addr_lo);
+- 
+-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(5, 17, 0))
+- 	if (msi_desc->pci.msi_attrib.is_64) {
+-+#else
+-+	if (msi_desc->msi_attrib.is_64) {
+-+#endif
+- 		pci_read_config_dword(pci_dev, pci_dev->msi_cap + PCI_MSI_ADDRESS_HI,
+- 				      &ab->pci.msi.addr_hi);
+- 	} else {
+diff --git a/package/kernel/mac80211/patches/ath11k/902-ath11k-Disable-coldboot-calibration-for-IPQ8074.patch b/package/kernel/mac80211/patches/ath11k/902-ath11k-Disable-coldboot-calibration-for-IPQ8074.patch
+deleted file mode 100644
+index 5454fa75e4..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/902-ath11k-Disable-coldboot-calibration-for-IPQ8074.patch
++++ /dev/null
+@@ -1,24 +0,0 @@
+-From dd3b9c59cfa1e9e0b73a575f4646be905691eaef Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Sat, 16 Oct 2021 19:34:10 +0200
+-Subject: [PATCH 241/241] ath11k: Disable coldboot calibration for IPQ8074
+-
+-There is a bug with the remoteproc reset after coldboot calibration,
+-so until that is resolved disabled it to allow using the radio.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- drivers/net/wireless/ath/ath11k/core.c | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/core.c
+-+++ b/drivers/net/wireless/ath/ath11k/core.c
+-@@ -86,7 +86,7 @@ static const struct ath11k_hw_params ath
+- 		.supports_shadow_regs = false,
+- 		.idle_ps = false,
+- 		.supports_sta_ps = false,
+--		.cold_boot_calib = true,
+-+		.cold_boot_calib = false,
+- 		.cbcal_restart_fw = true,
+- 		.fw_mem_mode = 0,
+- 		.num_vdevs = 16 + 1,
+diff --git a/package/kernel/mac80211/patches/ath11k/903-ath11k-support-setting-FW-memory-mode-via-DT.patch b/package/kernel/mac80211/patches/ath11k/903-ath11k-support-setting-FW-memory-mode-via-DT.patch
+deleted file mode 100644
+index 22c2493ca9..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/903-ath11k-support-setting-FW-memory-mode-via-DT.patch
++++ /dev/null
+@@ -1,74 +0,0 @@
+-From fb1c40c225cbc413d82c872dd8c8af3469b2b921 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 16 Dec 2022 17:17:52 +0100
+-Subject: [PATCH] ath11k: support setting FW memory mode via DT
+-
+-ath11k is really memory intensive for devices with less that 1GB of RAM,
+-so lets allow saving a significant amount of memory by setting the FW to
+-Mode-1 via DTS for devices that need it.
+-
+-However the drawback is reduced number of VDEV-s and peers which is a
+-reasonable tradeoff.
+-
+-Mode-2 allows for further reduction, but it has further restrictions.
+-
+-While we are here, lets add a print to be able to easily determine what
+-FW memory mode is being used.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- drivers/net/wireless/ath/ath11k/core.c | 28 ++++++++++++++++++++++++--
+- 1 file changed, 26 insertions(+), 2 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/core.c
+-+++ b/drivers/net/wireless/ath/ath11k/core.c
+-@@ -36,7 +36,7 @@ bool ath11k_ftm_mode;
+- module_param_named(ftm_mode, ath11k_ftm_mode, bool, 0444);
+- MODULE_PARM_DESC(ftm_mode, "Boots up in factory test mode");
+- 
+--static const struct ath11k_hw_params ath11k_hw_params[] = {
+-+static struct ath11k_hw_params ath11k_hw_params[] = {
+- 	{
+- 		.hw_rev = ATH11K_HW_IPQ8074,
+- 		.name = "ipq8074 hw2.0",
+-@@ -1953,7 +1953,8 @@ static void ath11k_core_reset(struct wor
+- static int ath11k_init_hw_params(struct ath11k_base *ab)
+- {
+- 	const struct ath11k_hw_params *hw_params = NULL;
+--	int i;
+-+	u32 fw_mem_mode;
+-+	int i, ret;
+- 
+- 	for (i = 0; i < ARRAY_SIZE(ath11k_hw_params); i++) {
+- 		hw_params = &ath11k_hw_params[i];
+-@@ -1969,7 +1970,30 @@ static int ath11k_init_hw_params(struct
+- 
+- 	ab->hw_params = *hw_params;
+- 
+-+	ret = of_property_read_u32(ab->dev->of_node,
+-+				   "qcom,ath11k-fw-memory-mode",
+-+				   &fw_mem_mode);
+-+	if (!ret) {
+-+		if (fw_mem_mode == 0) {
+-+			ab->hw_params.fw_mem_mode = 0;
+-+			ab->hw_params.num_vdevs = 16 + 1;
+-+			ab->hw_params.num_peers = 512;
+-+		}
+-+		else if (fw_mem_mode == 1) {
+-+			ab->hw_params.fw_mem_mode = 1;
+-+			ab->hw_params.num_vdevs = 8;
+-+			ab->hw_params.num_peers = 128;
+-+		} else if (fw_mem_mode == 2) {
+-+			ab->hw_params.fw_mem_mode = 2;
+-+			ab->hw_params.num_vdevs = 8;
+-+			ab->hw_params.num_peers = 128;
+-+			ab->hw_params.cold_boot_calib = false;
+-+		} else
+-+			ath11k_info(ab, "Unsupported FW memory mode: %u\n", fw_mem_mode);
+-+	}
+-+
+- 	ath11k_info(ab, "%s\n", ab->hw_params.name);
+-+	ath11k_info(ab, "FW memory mode: %d\n", ab->hw_params.fw_mem_mode);
+- 
+- 	return 0;
+- }
+diff --git a/package/kernel/mac80211/patches/ath11k/905-ath11k-remove-intersection-support-for-regulatory-ru.patch b/package/kernel/mac80211/patches/ath11k/905-ath11k-remove-intersection-support-for-regulatory-ru.patch
+deleted file mode 100644
+index b0ceb00ba0..0000000000
+--- a/package/kernel/mac80211/patches/ath11k/905-ath11k-remove-intersection-support-for-regulatory-ru.patch
++++ /dev/null
+@@ -1,317 +0,0 @@
+-From abdd0985a36189ef2cc0e393b027276e86137ace Mon Sep 17 00:00:00 2001
+-From: Aditya Kumar Singh <quic_adisi@quicinc.com>
+-Date: Tue, 11 Apr 2023 20:08:49 +0200
+-Subject: [PATCH] ath11k: remove intersection support for regulatory rules
+-
+-Currently, regulatory rules from new country settings is intersected with
+-rules from default country settings(during initialisation) in order to prevent
+-users to bypass their default country settings such as power limits, channel
+-flags, etc.
+-
+-However, the country setting in the BDF will take higher higher precendence
+-and FW will protect it. Therefore, there is no need to handle intersection
+-on the driver side now.
+-
+-Remove regulatory rules intersection logic support.
+-
+-Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
+----
+- drivers/net/wireless/ath/ath11k/reg.c | 168 +++-----------------------
+- drivers/net/wireless/ath/ath11k/reg.h |   2 +-
+- drivers/net/wireless/ath/ath11k/wmi.c |  24 +---
+- 3 files changed, 16 insertions(+), 178 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath11k/reg.c
+-+++ b/drivers/net/wireless/ath/ath11k/reg.c
+-@@ -352,129 +352,6 @@ static u32 ath11k_map_fw_reg_flags(u16 r
+- 	return flags;
+- }
+- 
+--static bool
+--ath11k_reg_can_intersect(struct ieee80211_reg_rule *rule1,
+--			 struct ieee80211_reg_rule *rule2)
+--{
+--	u32 start_freq1, end_freq1;
+--	u32 start_freq2, end_freq2;
+--
+--	start_freq1 = rule1->freq_range.start_freq_khz;
+--	start_freq2 = rule2->freq_range.start_freq_khz;
+--
+--	end_freq1 = rule1->freq_range.end_freq_khz;
+--	end_freq2 = rule2->freq_range.end_freq_khz;
+--
+--	if ((start_freq1 >= start_freq2 &&
+--	     start_freq1 < end_freq2) ||
+--	    (start_freq2 > start_freq1 &&
+--	     start_freq2 < end_freq1))
+--		return true;
+--
+--	/* TODO: Should we restrict intersection feasibility
+--	 *  based on min bandwidth of the intersected region also,
+--	 *  say the intersected rule should have a  min bandwidth
+--	 * of 20MHz?
+--	 */
+--
+--	return false;
+--}
+--
+--static void ath11k_reg_intersect_rules(struct ieee80211_reg_rule *rule1,
+--				       struct ieee80211_reg_rule *rule2,
+--				       struct ieee80211_reg_rule *new_rule)
+--{
+--	u32 start_freq1, end_freq1;
+--	u32 start_freq2, end_freq2;
+--	u32 freq_diff, max_bw;
+--
+--	start_freq1 = rule1->freq_range.start_freq_khz;
+--	start_freq2 = rule2->freq_range.start_freq_khz;
+--
+--	end_freq1 = rule1->freq_range.end_freq_khz;
+--	end_freq2 = rule2->freq_range.end_freq_khz;
+--
+--	new_rule->freq_range.start_freq_khz = max_t(u32, start_freq1,
+--						    start_freq2);
+--	new_rule->freq_range.end_freq_khz = min_t(u32, end_freq1, end_freq2);
+--
+--	freq_diff = new_rule->freq_range.end_freq_khz -
+--			new_rule->freq_range.start_freq_khz;
+--	max_bw = min_t(u32, rule1->freq_range.max_bandwidth_khz,
+--		       rule2->freq_range.max_bandwidth_khz);
+--	new_rule->freq_range.max_bandwidth_khz = min_t(u32, max_bw, freq_diff);
+--
+--	new_rule->power_rule.max_antenna_gain =
+--		min_t(u32, rule1->power_rule.max_antenna_gain,
+--		      rule2->power_rule.max_antenna_gain);
+--
+--	new_rule->power_rule.max_eirp = min_t(u32, rule1->power_rule.max_eirp,
+--					      rule2->power_rule.max_eirp);
+--
+--	/* Use the flags of both the rules */
+--	new_rule->flags = rule1->flags | rule2->flags;
+--
+--	/* To be safe, lts use the max cac timeout of both rules */
+--	new_rule->dfs_cac_ms = max_t(u32, rule1->dfs_cac_ms,
+--				     rule2->dfs_cac_ms);
+--}
+--
+--static struct ieee80211_regdomain *
+--ath11k_regd_intersect(struct ieee80211_regdomain *default_regd,
+--		      struct ieee80211_regdomain *curr_regd)
+--{
+--	u8 num_old_regd_rules, num_curr_regd_rules, num_new_regd_rules;
+--	struct ieee80211_reg_rule *old_rule, *curr_rule, *new_rule;
+--	struct ieee80211_regdomain *new_regd = NULL;
+--	u8 i, j, k;
+--
+--	num_old_regd_rules = default_regd->n_reg_rules;
+--	num_curr_regd_rules = curr_regd->n_reg_rules;
+--	num_new_regd_rules = 0;
+--
+--	/* Find the number of intersecting rules to allocate new regd memory */
+--	for (i = 0; i < num_old_regd_rules; i++) {
+--		old_rule = default_regd->reg_rules + i;
+--		for (j = 0; j < num_curr_regd_rules; j++) {
+--			curr_rule = curr_regd->reg_rules + j;
+--
+--			if (ath11k_reg_can_intersect(old_rule, curr_rule))
+--				num_new_regd_rules++;
+--		}
+--	}
+--
+--	if (!num_new_regd_rules)
+--		return NULL;
+--
+--	new_regd = kzalloc(sizeof(*new_regd) + (num_new_regd_rules *
+--			sizeof(struct ieee80211_reg_rule)),
+--			GFP_ATOMIC);
+--
+--	if (!new_regd)
+--		return NULL;
+--
+--	/* We set the new country and dfs region directly and only trim
+--	 * the freq, power, antenna gain by intersecting with the
+--	 * default regdomain. Also MAX of the dfs cac timeout is selected.
+--	 */
+--	new_regd->n_reg_rules = num_new_regd_rules;
+--	memcpy(new_regd->alpha2, curr_regd->alpha2, sizeof(new_regd->alpha2));
+--	new_regd->dfs_region = curr_regd->dfs_region;
+--	new_rule = new_regd->reg_rules;
+--
+--	for (i = 0, k = 0; i < num_old_regd_rules; i++) {
+--		old_rule = default_regd->reg_rules + i;
+--		for (j = 0; j < num_curr_regd_rules; j++) {
+--			curr_rule = curr_regd->reg_rules + j;
+--
+--			if (ath11k_reg_can_intersect(old_rule, curr_rule))
+--				ath11k_reg_intersect_rules(old_rule, curr_rule,
+--							   (new_rule + k++));
+--		}
+--	}
+--	return new_regd;
+--}
+--
+- static const char *
+- ath11k_reg_get_regdom_str(enum nl80211_dfs_regions dfs_region)
+- {
+-@@ -609,9 +486,9 @@ ath11k_reg_update_weather_radar_band(str
+- 
+- struct ieee80211_regdomain *
+- ath11k_reg_build_regd(struct ath11k_base *ab,
+--		      struct cur_regulatory_info *reg_info, bool intersect)
+-+		      struct cur_regulatory_info *reg_info)
+- {
+--	struct ieee80211_regdomain *tmp_regd, *default_regd, *new_regd = NULL;
+-+	struct ieee80211_regdomain *new_regd = NULL;
+- 	struct cur_reg_rule *reg_rule;
+- 	u8 i = 0, j = 0, k = 0;
+- 	u8 num_rules;
+-@@ -628,26 +505,26 @@ ath11k_reg_build_regd(struct ath11k_base
+- 		num_rules += reg_info->num_6ghz_rules_ap[WMI_REG_INDOOR_AP];
+- 
+- 	if (!num_rules)
+--		goto ret;
+-+		return new_regd;
+- 
+- 	/* Add max additional rules to accommodate weather radar band */
+- 	if (reg_info->dfs_region == ATH11K_DFS_REG_ETSI)
+- 		num_rules += 2;
+- 
+--	tmp_regd =  kzalloc(sizeof(*tmp_regd) +
+-+	new_regd =  kzalloc(sizeof(*new_regd) +
+- 			(num_rules * sizeof(struct ieee80211_reg_rule)),
+- 			GFP_ATOMIC);
+--	if (!tmp_regd)
+--		goto ret;
+-+	if (!new_regd)
+-+		return new_regd;
+- 
+--	memcpy(tmp_regd->alpha2, reg_info->alpha2, REG_ALPHA2_LEN + 1);
+-+	memcpy(new_regd->alpha2, reg_info->alpha2, REG_ALPHA2_LEN + 1);
+- 	memcpy(alpha2, reg_info->alpha2, REG_ALPHA2_LEN + 1);
+- 	alpha2[2] = '\0';
+--	tmp_regd->dfs_region = ath11k_map_fw_dfs_region(reg_info->dfs_region);
+-+	new_regd->dfs_region = ath11k_map_fw_dfs_region(reg_info->dfs_region);
+- 
+- 	ath11k_dbg(ab, ATH11K_DBG_REG,
+- 		   "Country %s, CFG Regdomain %s FW Regdomain %d, num_reg_rules %d\n",
+--		   alpha2, ath11k_reg_get_regdom_str(tmp_regd->dfs_region),
+-+		   alpha2, ath11k_reg_get_regdom_str(new_regd->dfs_region),
+- 		   reg_info->dfs_region, num_rules);
+- 	/* Update reg_rules[] below. Firmware is expected to
+- 	 * send these rules in order(2 GHz rules first and then 5 GHz)
+-@@ -686,7 +563,7 @@ ath11k_reg_build_regd(struct ath11k_base
+- 
+- 		flags |= ath11k_map_fw_reg_flags(reg_rule->flags);
+- 
+--		ath11k_reg_update_rule(tmp_regd->reg_rules + i,
+-+		ath11k_reg_update_rule(new_regd->reg_rules + i,
+- 				       reg_rule->start_freq,
+- 				       reg_rule->end_freq, max_bw,
+- 				       reg_rule->ant_gain, reg_rule->reg_power,
+-@@ -701,7 +578,7 @@ ath11k_reg_build_regd(struct ath11k_base
+- 		    reg_info->dfs_region == ATH11K_DFS_REG_ETSI &&
+- 		    (reg_rule->end_freq > ETSI_WEATHER_RADAR_BAND_LOW &&
+- 		    reg_rule->start_freq < ETSI_WEATHER_RADAR_BAND_HIGH)){
+--			ath11k_reg_update_weather_radar_band(ab, tmp_regd,
+-+			ath11k_reg_update_weather_radar_band(ab, new_regd,
+- 							     reg_rule, &i,
+- 							     flags, max_bw);
+- 			continue;
+-@@ -712,37 +589,20 @@ ath11k_reg_build_regd(struct ath11k_base
+- 				   "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d) (%d, %d)\n",
+- 				   i + 1, reg_rule->start_freq, reg_rule->end_freq,
+- 				   max_bw, reg_rule->ant_gain, reg_rule->reg_power,
+--				   tmp_regd->reg_rules[i].dfs_cac_ms, flags,
+-+				   new_regd->reg_rules[i].dfs_cac_ms, flags,
+- 				   reg_rule->psd_flag, reg_rule->psd_eirp);
+- 		} else {
+- 			ath11k_dbg(ab, ATH11K_DBG_REG,
+- 				   "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d)\n",
+- 				   i + 1, reg_rule->start_freq, reg_rule->end_freq,
+- 				   max_bw, reg_rule->ant_gain, reg_rule->reg_power,
+--				   tmp_regd->reg_rules[i].dfs_cac_ms,
+-+				   new_regd->reg_rules[i].dfs_cac_ms,
+- 				   flags);
+- 		}
+- 	}
+- 
+--	tmp_regd->n_reg_rules = i;
+--
+--	if (intersect) {
+--		default_regd = ab->default_regd[reg_info->phy_id];
+--
+--		/* Get a new regd by intersecting the received regd with
+--		 * our default regd.
+--		 */
+--		new_regd = ath11k_regd_intersect(default_regd, tmp_regd);
+--		kfree(tmp_regd);
+--		if (!new_regd) {
+--			ath11k_warn(ab, "Unable to create intersected regdomain\n");
+--			goto ret;
+--		}
+--	} else {
+--		new_regd = tmp_regd;
+--	}
+-+	new_regd->n_reg_rules = i;
+- 
+--ret:
+- 	return new_regd;
+- }
+- 
+---- a/drivers/net/wireless/ath/ath11k/reg.h
+-+++ b/drivers/net/wireless/ath/ath11k/reg.h
+-@@ -30,7 +30,7 @@ void ath11k_reg_free(struct ath11k_base
+- void ath11k_regd_update_work(struct work_struct *work);
+- struct ieee80211_regdomain *
+- ath11k_reg_build_regd(struct ath11k_base *ab,
+--		      struct cur_regulatory_info *reg_info, bool intersect);
+-+		      struct cur_regulatory_info *reg_info);
+- int ath11k_regd_update(struct ath11k *ar);
+- int ath11k_reg_update_chan_list(struct ath11k *ar, bool wait);
+- #endif
+---- a/drivers/net/wireless/ath/ath11k/wmi.c
+-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
+-@@ -6996,24 +6996,12 @@ static void ath11k_wmi_htc_tx_complete(s
+- 		wake_up(&wmi->tx_ce_desc_wq);
+- }
+- 
+--static bool ath11k_reg_is_world_alpha(char *alpha)
+--{
+--	if (alpha[0] == '0' && alpha[1] == '0')
+--		return true;
+--
+--	if (alpha[0] == 'n' && alpha[1] == 'a')
+--		return true;
+--
+--	return false;
+--}
+--
+- static int ath11k_reg_chan_list_event(struct ath11k_base *ab,
+- 				      struct sk_buff *skb,
+- 				      enum wmi_reg_chan_list_cmd_type id)
+- {
+- 	struct cur_regulatory_info *reg_info = NULL;
+- 	struct ieee80211_regdomain *regd = NULL;
+--	bool intersect = false;
+- 	int ret = 0, pdev_idx, i, j;
+- 	struct ath11k *ar;
+- 
+-@@ -7075,17 +7063,7 @@ static int ath11k_reg_chan_list_event(st
+- 		    (char *)reg_info->alpha2, 2))
+- 		goto mem_free;
+- 
+--	/* Intersect new rules with default regd if a new country setting was
+--	 * requested, i.e a default regd was already set during initialization
+--	 * and the regd coming from this event has a valid country info.
+--	 */
+--	if (ab->default_regd[pdev_idx] &&
+--	    !ath11k_reg_is_world_alpha((char *)
+--		ab->default_regd[pdev_idx]->alpha2) &&
+--	    !ath11k_reg_is_world_alpha((char *)reg_info->alpha2))
+--		intersect = true;
+--
+--	regd = ath11k_reg_build_regd(ab, reg_info, intersect);
+-+	regd = ath11k_reg_build_regd(ab, reg_info);
+- 	if (!regd) {
+- 		ath11k_warn(ab, "failed to build regd from reg_info\n");
+- 		goto fallback;
+diff --git a/package/kernel/mac80211/patches/ath5k/201-ath5k-WAR-for-AR71xx-PCI-bug.patch b/package/kernel/mac80211/patches/ath5k/201-ath5k-WAR-for-AR71xx-PCI-bug.patch
+deleted file mode 100644
+index 4fc97dfaec..0000000000
+--- a/package/kernel/mac80211/patches/ath5k/201-ath5k-WAR-for-AR71xx-PCI-bug.patch
++++ /dev/null
+@@ -1,38 +0,0 @@
+---- a/drivers/net/wireless/ath/ath5k/initvals.c
+-+++ b/drivers/net/wireless/ath/ath5k/initvals.c
+-@@ -62,8 +62,14 @@ static const struct ath5k_ini ar5210_ini
+- 	{ AR5K_IMR,		0 },
+- 	{ AR5K_IER,		AR5K_IER_DISABLE },
+- 	{ AR5K_BSR,		0, AR5K_INI_READ },
+-+#if !defined(CONFIG_ATHEROS_AR71XX) && !defined(CONFIG_ATH79)
+- 	{ AR5K_TXCFG,		AR5K_DMASIZE_128B },
+- 	{ AR5K_RXCFG,		AR5K_DMASIZE_128B },
+-+#else
+-+	/* WAR for AR71xx PCI bug */
+-+	{ AR5K_TXCFG,		AR5K_DMASIZE_128B },
+-+	{ AR5K_RXCFG,		AR5K_DMASIZE_4B },
+-+#endif
+- 	{ AR5K_CFG,		AR5K_INIT_CFG },
+- 	{ AR5K_TOPS,		8 },
+- 	{ AR5K_RXNOFRM,		8 },
+---- a/drivers/net/wireless/ath/ath5k/dma.c
+-+++ b/drivers/net/wireless/ath/ath5k/dma.c
+-@@ -854,10 +854,18 @@ ath5k_hw_dma_init(struct ath5k_hw *ah)
+- 	 * guess we can tweak it and see how it goes ;-)
+- 	 */
+- 	if (ah->ah_version != AR5K_AR5210) {
+-+#if !defined(CONFIG_ATHEROS_AR71XX) && !defined(CONFIG_ATH79)
+- 		AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG,
+- 			AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_128B);
+- 		AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG,
+- 			AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_128B);
+-+#else
+-+		/* WAR for AR71xx PCI bug */
+-+		AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG,
+-+			AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_128B);
+-+		AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG,
+-+			AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_4B);
+-+#endif
+- 	}
+- 
+- 	/* Pre-enable interrupts on 5211/5212*/
+diff --git a/package/kernel/mac80211/patches/ath5k/411-ath5k_allow_adhoc_and_ap.patch b/package/kernel/mac80211/patches/ath5k/411-ath5k_allow_adhoc_and_ap.patch
+deleted file mode 100644
+index 1df4aab57e..0000000000
+--- a/package/kernel/mac80211/patches/ath5k/411-ath5k_allow_adhoc_and_ap.patch
++++ /dev/null
+@@ -1,46 +0,0 @@
+---- a/drivers/net/wireless/ath/ath5k/mac80211-ops.c
+-+++ b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
+-@@ -86,13 +86,8 @@ ath5k_add_interface(struct ieee80211_hw
+- 		goto end;
+- 	}
+- 
+--	/* Don't allow other interfaces if one ad-hoc is configured.
+--	 * TODO: Fix the problems with ad-hoc and multiple other interfaces.
+--	 * We would need to operate the HW in ad-hoc mode to allow TSF updates
+--	 * for the IBSS, but this breaks with additional AP or STA interfaces
+--	 * at the moment. */
+--	if (ah->num_adhoc_vifs ||
+--	    (ah->nvifs && vif->type == NL80211_IFTYPE_ADHOC)) {
+-+	/* Don't allow more than one ad-hoc interface */
+-+	if (ah->num_adhoc_vifs && vif->type == NL80211_IFTYPE_ADHOC) {
+- 		ATH5K_ERR(ah, "Only one single ad-hoc interface is allowed.\n");
+- 		ret = -ELNRNG;
+- 		goto end;
+---- a/drivers/net/wireless/ath/ath5k/base.c
+-+++ b/drivers/net/wireless/ath/ath5k/base.c
+-@@ -2009,7 +2009,7 @@ ath5k_beacon_send(struct ath5k_hw *ah)
+- 	}
+- 
+- 	if ((ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs +
+--			ah->num_mesh_vifs > 1) ||
+-+			ah->num_adhoc_vifs + ah->num_mesh_vifs > 1) ||
+- 			ah->opmode == NL80211_IFTYPE_MESH_POINT) {
+- 		u64 tsf = ath5k_hw_get_tsf64(ah);
+- 		u32 tsftu = TSF_TO_TU(tsf);
+-@@ -2095,7 +2095,7 @@ ath5k_beacon_update_timers(struct ath5k_
+- 
+- 	intval = ah->bintval & AR5K_BEACON_PERIOD;
+- 	if (ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs
+--		+ ah->num_mesh_vifs > 1) {
+-+		+ ah->num_adhoc_vifs + ah->num_mesh_vifs > 1) {
+- 		intval /= ATH_BCBUF;	/* staggered multi-bss beacons */
+- 		if (intval < 15)
+- 			ATH5K_WARN(ah, "intval %u is too low, min 15\n",
+-@@ -2561,6 +2561,7 @@ static const struct ieee80211_iface_limi
+- 				 BIT(NL80211_IFTYPE_MESH_POINT) |
+- #endif
+- 				 BIT(NL80211_IFTYPE_AP) },
+-+	{ .max = 1,	.types = BIT(NL80211_IFTYPE_ADHOC) },
+- };
+- 
+- static const struct ieee80211_iface_combination if_comb = {
+diff --git a/package/kernel/mac80211/patches/ath5k/420-ath5k_disable_fast_cc.patch b/package/kernel/mac80211/patches/ath5k/420-ath5k_disable_fast_cc.patch
+deleted file mode 100644
+index 414f49508f..0000000000
+--- a/package/kernel/mac80211/patches/ath5k/420-ath5k_disable_fast_cc.patch
++++ /dev/null
+@@ -1,18 +0,0 @@
+---- a/drivers/net/wireless/ath/ath5k/reset.c
+-+++ b/drivers/net/wireless/ath/ath5k/reset.c
+-@@ -1154,6 +1154,7 @@ ath5k_hw_reset(struct ath5k_hw *ah, enum
+- 	tsf_lo = 0;
+- 	mode = 0;
+- 
+-+#if 0
+- 	/*
+- 	 * Sanity check for fast flag
+- 	 * Fast channel change only available
+-@@ -1161,6 +1162,7 @@ ath5k_hw_reset(struct ath5k_hw *ah, enum
+- 	 */
+- 	if (fast && (ah->ah_radio != AR5K_RF2413) &&
+- 	(ah->ah_radio != AR5K_RF5413))
+-+#endif
+- 		fast = false;
+- 
+- 	/* Disable sleep clock operation
+diff --git a/package/kernel/mac80211/patches/ath5k/430-add_ath5k_platform.patch b/package/kernel/mac80211/patches/ath5k/430-add_ath5k_platform.patch
+deleted file mode 100644
+index b213e2a819..0000000000
+--- a/package/kernel/mac80211/patches/ath5k/430-add_ath5k_platform.patch
++++ /dev/null
+@@ -1,33 +0,0 @@
+---- /dev/null
+-+++ b/include/linux/ath5k_platform.h
+-@@ -0,0 +1,30 @@
+-+/*
+-+ * Copyright (c) 2008 Atheros Communications Inc.
+-+ * Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org>
+-+ * Copyright (c) 2009 Imre Kaloz <kaloz@openwrt.org>
+-+ * Copyright (c) 2010 Daniel Golle <daniel.golle@gmail.com>
+-+ *
+-+ * Permission to use, copy, modify, and/or distribute this software for any
+-+ * purpose with or without fee is hereby granted, provided that the above
+-+ * copyright notice and this permission notice appear in all copies.
+-+ *
+-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+-+ */
+-+
+-+#ifndef _LINUX_ATH5K_PLATFORM_H
+-+#define _LINUX_ATH5K_PLATFORM_H
+-+
+-+#define ATH5K_PLAT_EEP_MAX_WORDS	2048
+-+
+-+struct ath5k_platform_data {
+-+	u16 *eeprom_data;
+-+	u8 *macaddr;
+-+};
+-+
+-+#endif /* _LINUX_ATH5K_PLATFORM_H */
+diff --git a/package/kernel/mac80211/patches/ath5k/432-ath5k_add_pciids.patch b/package/kernel/mac80211/patches/ath5k/432-ath5k_add_pciids.patch
+deleted file mode 100644
+index bd0e6707a5..0000000000
+--- a/package/kernel/mac80211/patches/ath5k/432-ath5k_add_pciids.patch
++++ /dev/null
+@@ -1,11 +0,0 @@
+---- a/drivers/net/wireless/ath/ath5k/pci.c
+-+++ b/drivers/net/wireless/ath/ath5k/pci.c
+-@@ -47,6 +47,8 @@ static const struct pci_device_id ath5k_
+- 	{ PCI_VDEVICE(ATHEROS, 0x001b) }, /* 5413 Eagle */
+- 	{ PCI_VDEVICE(ATHEROS, 0x001c) }, /* PCI-E cards */
+- 	{ PCI_VDEVICE(ATHEROS, 0x001d) }, /* 2417 Nala */
+-+	{ PCI_VDEVICE(ATHEROS, 0xff16) }, /* 2413,2414 sx76x on lantiq_danube */
+-+	{ PCI_VDEVICE(ATHEROS, 0xff1a) }, /* 2417 arv45xx on lantiq_danube */
+- 	{ PCI_VDEVICE(ATHEROS, 0xff1b) }, /* AR5BXB63 */
+- 	{ 0 }
+- };
+diff --git a/package/kernel/mac80211/patches/ath5k/440-ath5k_channel_bw_debugfs.patch b/package/kernel/mac80211/patches/ath5k/440-ath5k_channel_bw_debugfs.patch
+deleted file mode 100644
+index a63f0c881b..0000000000
+--- a/package/kernel/mac80211/patches/ath5k/440-ath5k_channel_bw_debugfs.patch
++++ /dev/null
+@@ -1,142 +0,0 @@
+-This adds a bwmode debugfs file which can be used to set alternate
+-channel operating bandwidths.  Only tested with AR5413 and only at
+-5 and 20 mhz channels.
+-
+-Signed-off-by: Pat Erley <pat-lkml at erley.org>
+----
+-Other devices will need to be added to the switch in  write_file_bwmode
+-
+-drivers/net/wireless/ath/ath5k/debug.c |   86 ++++++++++++++++++++++++++++++++
+- 1 files changed, 86 insertions(+), 0 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath5k/debug.c
+-+++ b/drivers/net/wireless/ath/ath5k/debug.c
+-@@ -803,6 +803,97 @@ static const struct file_operations fops
+- 	.llseek = default_llseek,
+- };
+- 
+-+/* debugfs: bwmode */
+-+
+-+static ssize_t read_file_bwmode(struct file *file, char __user *user_buf,
+-+				   size_t count, loff_t *ppos)
+-+{
+-+	struct ath5k_hw *ah = file->private_data;
+-+	char buf[15];
+-+	unsigned int len = 0;
+-+
+-+	int cur_ah_bwmode = ah->ah_bwmode_debug;
+-+
+-+#define print_selected(MODE, LABEL) \
+-+	if (cur_ah_bwmode == MODE) \
+-+		len += snprintf(buf+len, sizeof(buf)-len, "[%s]", LABEL); \
+-+	else \
+-+		len += snprintf(buf+len, sizeof(buf)-len, "%s", LABEL); \
+-+	len += snprintf(buf+len, sizeof(buf)-len, " ");
+-+
+-+	print_selected(AR5K_BWMODE_5MHZ, "5");
+-+	print_selected(AR5K_BWMODE_10MHZ, "10");
+-+	print_selected(AR5K_BWMODE_DEFAULT, "20");
+-+	print_selected(AR5K_BWMODE_40MHZ, "40");
+-+#undef print_selected
+-+
+-+	len += snprintf(buf+len, sizeof(buf)-len, "\n");
+-+
+-+	return simple_read_from_buffer(user_buf, count, ppos, buf, len);
+-+}
+-+
+-+static ssize_t write_file_bwmode(struct file *file,
+-+				 const char __user *userbuf,
+-+				 size_t count, loff_t *ppos)
+-+{
+-+	struct ath5k_hw *ah = file->private_data;
+-+	char buf[3];
+-+	int bw = 20;
+-+	int tobwmode = AR5K_BWMODE_DEFAULT;
+-+
+-+	if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
+-+		return -EFAULT;
+-+
+-+	/* TODO: Add check for active interface */
+-+
+-+	if(strncmp(buf, "5", 1) == 0 ) {
+-+		tobwmode = AR5K_BWMODE_5MHZ;
+-+		bw = 5;
+-+	} else if ( strncmp(buf, "10", 2) == 0 ) {
+-+		tobwmode = AR5K_BWMODE_10MHZ;
+-+		bw = 10;
+-+	} else if ( strncmp(buf, "20", 2) == 0 ) {
+-+		tobwmode = AR5K_BWMODE_DEFAULT;
+-+		bw = 20;
+-+	} else if ( strncmp(buf, "40", 2) == 0 ) {
+-+		tobwmode = AR5K_BWMODE_40MHZ;
+-+		bw = 40;
+-+	} else
+-+		return -EINVAL;
+-+
+-+	ATH5K_INFO(ah, "Changing to %imhz channel width[%i]\n",
+-+		bw, tobwmode);
+-+
+-+	switch (ah->ah_radio) {
+-+	/* TODO: only define radios that actually support 5/10mhz channels */
+-+	case AR5K_RF5413:
+-+	case AR5K_RF5110:
+-+	case AR5K_RF5111:
+-+	case AR5K_RF5112:
+-+	case AR5K_RF2413:
+-+	case AR5K_RF2316:
+-+	case AR5K_RF2317:
+-+	case AR5K_RF2425:
+-+		if(ah->ah_bwmode_debug != tobwmode) {
+-+			mutex_lock(&ah->lock);
+-+			ah->ah_bwmode = tobwmode;
+-+			ah->ah_bwmode_debug = tobwmode;
+-+			mutex_unlock(&ah->lock);
+-+		}
+-+		break;
+-+	default:
+-+		return -EOPNOTSUPP;
+-+	}
+-+	return count;
+-+}
+-+
+-+static const struct file_operations fops_bwmode = {
+-+	.read = read_file_bwmode,
+-+	.write = write_file_bwmode,
+-+	.open = simple_open,
+-+	.owner = THIS_MODULE,
+-+	.llseek = default_llseek,
+-+};
+- 
+- /* debugfs: queues etc */
+- 
+-@@ -997,6 +1088,8 @@ ath5k_debug_init_device(struct ath5k_hw
+- 	debugfs_create_file("queue", 0600, phydir, ah, &fops_queue);
+- 	debugfs_create_bool("32khz_clock", 0600, phydir,
+- 			    &ah->ah_use_32khz_clock);
+-+	debugfs_create_file("bwmode", S_IWUSR | S_IRUSR, phydir, ah,
+-+			    &fops_bwmode);
+- }
+- 
+- /* functions used in other places */
+---- a/drivers/net/wireless/ath/ath5k/ath5k.h
+-+++ b/drivers/net/wireless/ath/ath5k/ath5k.h
+-@@ -1372,6 +1372,7 @@ struct ath5k_hw {
+- 	u8			ah_coverage_class;
+- 	bool			ah_ack_bitrate_high;
+- 	u8			ah_bwmode;
+-+	u8			ah_bwmode_debug;
+- 	bool			ah_short_slot;
+- 
+- 	/* Antenna Control */
+---- a/drivers/net/wireless/ath/ath5k/base.c
+-+++ b/drivers/net/wireless/ath/ath5k/base.c
+-@@ -465,6 +465,9 @@ ath5k_chan_set(struct ath5k_hw *ah, stru
+- 		return -EINVAL;
+- 	}
+- 
+-+	if (ah->ah_bwmode_debug != AR5K_BWMODE_DEFAULT)
+-+		ah->ah_bwmode = ah->ah_bwmode_debug;
+-+
+- 	/*
+- 	 * To switch channels clear any pending DMA operations;
+- 	 * wait long enough for the RX fifo to drain, reset the
+diff --git a/package/kernel/mac80211/patches/ath9k/350-ath9k_hw-reset-AHB-WMAC-interface-on-AR91xx.patch b/package/kernel/mac80211/patches/ath9k/350-ath9k_hw-reset-AHB-WMAC-interface-on-AR91xx.patch
+deleted file mode 100644
+index 3a0171d4a2..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/350-ath9k_hw-reset-AHB-WMAC-interface-on-AR91xx.patch
++++ /dev/null
+@@ -1,25 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Sat, 9 Jul 2016 15:25:24 +0200
+-Subject: [PATCH] ath9k_hw: reset AHB-WMAC interface on AR91xx
+-
+-Should fix a few stability issues
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/drivers/net/wireless/ath/ath9k/hw.c
+-+++ b/drivers/net/wireless/ath/ath9k/hw.c
+-@@ -1434,8 +1434,12 @@ static bool ath9k_hw_set_reset(struct at
+- 	if (!AR_SREV_9100(ah))
+- 		REG_WRITE(ah, AR_RC, 0);
+- 
+--	if (AR_SREV_9100(ah))
+-+	if (AR_SREV_9100(ah)) {
+-+		/* Reset the AHB-WMAC interface */
+-+		if (ah->external_reset)
+-+			ah->external_reset();
+- 		udelay(50);
+-+	}
+- 
+- 	return true;
+- }
+diff --git a/package/kernel/mac80211/patches/ath9k/351-ath9k_hw-issue-external-reset-for-QCA955x.patch b/package/kernel/mac80211/patches/ath9k/351-ath9k_hw-issue-external-reset-for-QCA955x.patch
+deleted file mode 100644
+index 53b7ba08bc..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/351-ath9k_hw-issue-external-reset-for-QCA955x.patch
++++ /dev/null
+@@ -1,129 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Sat, 9 Jul 2016 15:26:44 +0200
+-Subject: [PATCH] ath9k_hw: issue external reset for QCA955x
+-
+-The RTC interface on the SoC needs to be reset along with the rest of
+-the WMAC.
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/drivers/net/wireless/ath/ath9k/hw.c
+-+++ b/drivers/net/wireless/ath/ath9k/hw.c
+-@@ -1311,39 +1311,56 @@ void ath9k_hw_get_delta_slope_vals(struc
+- 	*coef_exponent = coef_exp - 16;
+- }
+- 
+--/* AR9330 WAR:
+-- * call external reset function to reset WMAC if:
+-- * - doing a cold reset
+-- * - we have pending frames in the TX queues.
+-- */
+--static bool ath9k_hw_ar9330_reset_war(struct ath_hw *ah, int type)
+-+static bool ath9k_hw_need_external_reset(struct ath_hw *ah, int type)
+- {
+--	int i, npend = 0;
+-+	int i;
+- 
+--	for (i = 0; i < AR_NUM_QCU; i++) {
+--		npend = ath9k_hw_numtxpending(ah, i);
+--		if (npend)
+--			break;
+--	}
+--
+--	if (ah->external_reset &&
+--	    (npend || type == ATH9K_RESET_COLD)) {
+--		int reset_err = 0;
+--
+--		ath_dbg(ath9k_hw_common(ah), RESET,
+--			"reset MAC via external reset\n");
+--
+--		reset_err = ah->external_reset();
+--		if (reset_err) {
+--			ath_err(ath9k_hw_common(ah),
+--				"External reset failed, err=%d\n",
+--				reset_err);
+--			return false;
+-+	if (type == ATH9K_RESET_COLD)
+-+		return true;
+-+
+-+	if (AR_SREV_9550(ah))
+-+		return true;
+-+
+-+	/* AR9330 WAR:
+-+	 * call external reset function to reset WMAC if:
+-+	 * - doing a cold reset
+-+	 * - we have pending frames in the TX queues.
+-+	 */
+-+	if (AR_SREV_9330(ah)) {
+-+		for (i = 0; i < AR_NUM_QCU; i++) {
+-+			if (ath9k_hw_numtxpending(ah, i))
+-+				return true;
+- 		}
+-+	}
+-+
+-+	return false;
+-+}
+-+
+-+static bool ath9k_hw_external_reset(struct ath_hw *ah, int type)
+-+{
+-+	int err;
+-+
+-+	if (!ah->external_reset || !ath9k_hw_need_external_reset(ah, type))
+-+		return true;
+-+
+-+	ath_dbg(ath9k_hw_common(ah), RESET,
+-+		"reset MAC via external reset\n");
+- 
+--		REG_WRITE(ah, AR_RTC_RESET, 1);
+-+	err = ah->external_reset();
+-+	if (err) {
+-+		ath_err(ath9k_hw_common(ah),
+-+			"External reset failed, err=%d\n", err);
+-+		return false;
+- 	}
+- 
+-+	if (AR_SREV_9550(ah)) {
+-+		REG_WRITE(ah, AR_RTC_RESET, 0);
+-+		udelay(10);
+-+	}
+-+
+-+	REG_WRITE(ah, AR_RTC_RESET, 1);
+-+	udelay(10);
+-+
+- 	return true;
+- }
+- 
+-@@ -1396,24 +1413,24 @@ static bool ath9k_hw_set_reset(struct at
+- 			rst_flags |= AR_RTC_RC_MAC_COLD;
+- 	}
+- 
+--	if (AR_SREV_9330(ah)) {
+--		if (!ath9k_hw_ar9330_reset_war(ah, type))
+--			return false;
+--	}
+--
+- 	if (ath9k_hw_mci_is_enabled(ah))
+- 		ar9003_mci_check_gpm_offset(ah);
+- 
+- 	/* DMA HALT added to resolve ar9300 and ar9580 bus error during
+--	 * RTC_RC reg read
+-+	 * RTC_RC reg read. Also needed for AR9550 external reset
+- 	 */
+--	if (AR_SREV_9300(ah) || AR_SREV_9580(ah)) {
+-+	if (AR_SREV_9300(ah) || AR_SREV_9580(ah) || AR_SREV_9550(ah)) {
+- 		REG_SET_BIT(ah, AR_CFG, AR_CFG_HALT_REQ);
+- 		ath9k_hw_wait(ah, AR_CFG, AR_CFG_HALT_ACK, AR_CFG_HALT_ACK,
+- 			      20 * AH_WAIT_TIMEOUT);
+--		REG_CLR_BIT(ah, AR_CFG, AR_CFG_HALT_REQ);
+- 	}
+- 
+-+	if (!AR_SREV_9100(ah))
+-+		ath9k_hw_external_reset(ah, type);
+-+
+-+	if (AR_SREV_9300(ah) || AR_SREV_9580(ah))
+-+		REG_CLR_BIT(ah, AR_CFG, AR_CFG_HALT_REQ);
+-+
+- 	REG_WRITE(ah, AR_RTC_RC, rst_flags);
+- 
+- 	REGWRITE_BUFFER_FLUSH(ah);
+diff --git a/package/kernel/mac80211/patches/ath9k/354-ath9k-force-rx_clear-when-disabling-rx.patch b/package/kernel/mac80211/patches/ath9k/354-ath9k-force-rx_clear-when-disabling-rx.patch
+deleted file mode 100644
+index 8aaccf49b4..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/354-ath9k-force-rx_clear-when-disabling-rx.patch
++++ /dev/null
+@@ -1,35 +0,0 @@
+-From: Felix Fietkau <nbd@openwrt.org>
+-Date: Sun, 7 Jun 2015 13:53:35 +0200
+-Subject: [PATCH] ath9k: force rx_clear when disabling rx
+-
+-This makes stopping Rx more reliable and should reduce the frequency of
+-Rx related DMA stop warnings. Don't use rx_clear in TX99 mode.
+-
+-Cc: stable@vger.kernel.org
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+-Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com>
+----
+-
+---- a/drivers/net/wireless/ath/ath9k/mac.c
+-+++ b/drivers/net/wireless/ath/ath9k/mac.c
+-@@ -678,13 +678,18 @@ void ath9k_hw_startpcureceive(struct ath
+- 
+- 	ath9k_ani_reset(ah, is_scanning);
+- 
+--	REG_CLR_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));
+-+	REG_CLR_BIT(ah, AR_DIAG_SW,
+-+		    AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT | AR_DIAG_FORCE_RX_CLEAR);
+- }
+- EXPORT_SYMBOL(ath9k_hw_startpcureceive);
+- 
+- void ath9k_hw_abortpcurecv(struct ath_hw *ah)
+- {
+--	REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_ABORT | AR_DIAG_RX_DIS);
+-+	u32 reg = AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT;
+-+
+-+	if (!IS_ENABLED(CPTCFG_ATH9K_TX99))
+-+		reg |= AR_DIAG_FORCE_RX_CLEAR;
+-+	REG_SET_BIT(ah, AR_DIAG_SW, reg);
+- 
+- 	ath9k_hw_disable_mib_counters(ah);
+- }
+diff --git a/package/kernel/mac80211/patches/ath9k/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch b/package/kernel/mac80211/patches/ath9k/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch
+deleted file mode 100644
+index 385eea0116..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch
++++ /dev/null
+@@ -1,36 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Sat, 14 May 2016 14:51:02 +0200
+-Subject: [PATCH] Revert "ath9k: interpret requested txpower in EIRP
+- domain"
+-
+-This reverts commit 71f5137bf010c6faffab50c0ec15374c59c4a411.
+----
+-
+---- a/drivers/net/wireless/ath/ath9k/hw.c
+-+++ b/drivers/net/wireless/ath/ath9k/hw.c
+-@@ -2977,7 +2977,8 @@ void ath9k_hw_apply_txpower(struct ath_h
+- {
+- 	struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
+- 	struct ieee80211_channel *channel;
+--	int chan_pwr, new_pwr;
+-+	int chan_pwr, new_pwr, max_gain;
+-+	int ant_gain, ant_reduction = 0;
+- 	u16 ctl = NO_CTL;
+- 
+- 	if (!chan)
+-@@ -2989,9 +2990,14 @@ void ath9k_hw_apply_txpower(struct ath_h
+- 	channel = chan->chan;
+- 	chan_pwr = min_t(int, channel->max_power * 2, MAX_COMBINED_POWER);
+- 	new_pwr = min_t(int, chan_pwr, reg->power_limit);
+-+	max_gain = chan_pwr - new_pwr + channel->max_antenna_gain * 2;
+-+
+-+	ant_gain = get_antenna_gain(ah, chan);
+-+	if (ant_gain > max_gain)
+-+		ant_reduction = ant_gain - max_gain;
+- 
+- 	ah->eep_ops->set_txpower(ah, chan, ctl,
+--				 get_antenna_gain(ah, chan), new_pwr, test);
+-+				 ant_reduction, new_pwr, test);
+- }
+- 
+- void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit, bool test)
+diff --git a/package/kernel/mac80211/patches/ath9k/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch b/package/kernel/mac80211/patches/ath9k/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch
+deleted file mode 100644
+index 0c3edc1260..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch
++++ /dev/null
+@@ -1,24 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Wed, 19 Jul 2017 08:49:31 +0200
+-Subject: [PATCH] ath9k: adjust tx power reduction for US regulatory
+- domain
+-
+-FCC regulatory rules allow for up to 6 dBi antenna gain. Account for
+-this in the EEPROM based tx power reduction code.
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/drivers/net/wireless/ath/ath9k/hw.c
+-+++ b/drivers/net/wireless/ath/ath9k/hw.c
+-@@ -2996,6 +2996,10 @@ void ath9k_hw_apply_txpower(struct ath_h
+- 	if (ant_gain > max_gain)
+- 		ant_reduction = ant_gain - max_gain;
+- 
+-+	/* FCC allows maximum antenna gain of 6 dBi */
+-+	if (reg->region == NL80211_DFS_FCC)
+-+		ant_reduction = max_t(int, ant_reduction - 12, 0);
+-+
+- 	ah->eep_ops->set_txpower(ah, chan, ctl,
+- 				 ant_reduction, new_pwr, test);
+- }
+diff --git a/package/kernel/mac80211/patches/ath9k/401-ath9k_blink_default.patch b/package/kernel/mac80211/patches/ath9k/401-ath9k_blink_default.patch
+deleted file mode 100644
+index 3eb57bb1cf..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/401-ath9k_blink_default.patch
++++ /dev/null
+@@ -1,11 +0,0 @@
+---- a/drivers/net/wireless/ath/ath9k/init.c
+-+++ b/drivers/net/wireless/ath/ath9k/init.c
+-@@ -48,7 +48,7 @@ int ath9k_modparam_nohwcrypt;
+- module_param_named(nohwcrypt, ath9k_modparam_nohwcrypt, int, 0444);
+- MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
+- 
+--int ath9k_led_blink;
+-+int ath9k_led_blink = 1;
+- module_param_named(blink, ath9k_led_blink, int, 0444);
+- MODULE_PARM_DESC(blink, "Enable LED blink on activity");
+- 
+diff --git a/package/kernel/mac80211/patches/ath9k/410-ath9k_allow_adhoc_and_ap.patch b/package/kernel/mac80211/patches/ath9k/410-ath9k_allow_adhoc_and_ap.patch
+deleted file mode 100644
+index b2f2763e8e..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/410-ath9k_allow_adhoc_and_ap.patch
++++ /dev/null
+@@ -1,10 +0,0 @@
+---- a/drivers/net/wireless/ath/ath9k/init.c
+-+++ b/drivers/net/wireless/ath/ath9k/init.c
+-@@ -882,6 +882,7 @@ static const struct ieee80211_iface_limi
+- 				 BIT(NL80211_IFTYPE_AP) },
+- 	{ .max = 1,	.types = BIT(NL80211_IFTYPE_P2P_CLIENT) |
+- 				 BIT(NL80211_IFTYPE_P2P_GO) },
+-+	{ .max = 1,	.types = BIT(NL80211_IFTYPE_ADHOC) },
+- };
+- 
+- #ifdef CPTCFG_ATH9K_CHANNEL_CONTEXT
+diff --git a/package/kernel/mac80211/patches/ath9k/450-ath9k-enabled-MFP-capability-unconditionally.patch b/package/kernel/mac80211/patches/ath9k/450-ath9k-enabled-MFP-capability-unconditionally.patch
+deleted file mode 100644
+index f424ca530b..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/450-ath9k-enabled-MFP-capability-unconditionally.patch
++++ /dev/null
+@@ -1,34 +0,0 @@
+-From d946085ff5a331de64e91a2e3c96b9ca79d740f5 Mon Sep 17 00:00:00 2001
+-From: David Bauer <mail@david-bauer.net>
+-Date: Mon, 15 Jun 2020 00:10:34 +0200
+-Subject: [PATCH] ath9k: enabled MFP capability unconditionally
+-
+-ath9k will already fallback on software-crypto for chipsets not
+-supporting IEEE802.11w (MFP). So advertising MFP is not dependent
+-on disabling HW crypto for all traffic entirely.
+-
+-Signed-off-by: David Bauer <mail@david-bauer.net>
+----
+- drivers/net/wireless/ath/ath9k/init.c | 4 +---
+- 1 file changed, 1 insertion(+), 3 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath9k/init.c
+-+++ b/drivers/net/wireless/ath/ath9k/init.c
+-@@ -963,6 +963,7 @@ static void ath9k_set_hw_capab(struct at
+- 	ieee80211_hw_set(hw, HOST_BROADCAST_PS_BUFFERING);
+- 	ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
+- 	ieee80211_hw_set(hw, SUPPORTS_CLONED_SKBS);
+-+	ieee80211_hw_set(hw, MFP_CAPABLE);
+- 
+- 	if (ath9k_ps_enable)
+- 		ieee80211_hw_set(hw, SUPPORTS_PS);
+-@@ -975,9 +976,6 @@ static void ath9k_set_hw_capab(struct at
+- 				IEEE80211_RADIOTAP_MCS_HAVE_STBC;
+- 	}
+- 
+--	if (AR_SREV_9160_10_OR_LATER(sc->sc_ah) || ath9k_modparam_nohwcrypt)
+--		ieee80211_hw_set(hw, MFP_CAPABLE);
+--
+- 	hw->wiphy->features |= NL80211_FEATURE_ACTIVE_MONITOR |
+- 			       NL80211_FEATURE_AP_MODE_CHAN_WIDTH_CHANGE |
+- 			       NL80211_FEATURE_P2P_GO_CTWIN;
+diff --git a/package/kernel/mac80211/patches/ath9k/500-ath9k_eeprom_debugfs.patch b/package/kernel/mac80211/patches/ath9k/500-ath9k_eeprom_debugfs.patch
+deleted file mode 100644
+index 2f5e75be8a..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/500-ath9k_eeprom_debugfs.patch
++++ /dev/null
+@@ -1,66 +0,0 @@
+---- a/drivers/net/wireless/ath/ath9k/debug.c
+-+++ b/drivers/net/wireless/ath/ath9k/debug.c
+-@@ -1413,6 +1413,54 @@ void ath9k_deinit_debug(struct ath_softc
+- 	ath9k_cmn_spectral_deinit_debug(&sc->spec_priv);
+- }
+- 
+-+static ssize_t read_file_eeprom(struct file *file, char __user *user_buf,
+-+			     size_t count, loff_t *ppos)
+-+{
+-+	struct ath_softc *sc = file->private_data;
+-+	struct ath_hw *ah = sc->sc_ah;
+-+	struct ath_common *common = ath9k_hw_common(ah);
+-+	int bytes = 0;
+-+	int pos = *ppos;
+-+	int size = 4096;
+-+	u16 val;
+-+	int i;
+-+
+-+	if (AR_SREV_9300_20_OR_LATER(ah))
+-+		size = 16384;
+-+
+-+	if (*ppos < 0)
+-+		return -EINVAL;
+-+
+-+	if (count > size - *ppos)
+-+		count = size - *ppos;
+-+
+-+	for (i = *ppos / 2; count > 0; count -= bytes, *ppos += bytes, i++) {
+-+		void *from = &val;
+-+
+-+		if (!common->bus_ops->eeprom_read(common, i, &val))
+-+			val = 0xffff;
+-+
+-+		if (*ppos % 2) {
+-+			from++;
+-+			bytes = 1;
+-+		} else if (count == 1) {
+-+			bytes = 1;
+-+		} else {
+-+			bytes = 2;
+-+		}
+-+		if (copy_to_user(user_buf, from, bytes))
+-+			return -EFAULT;
+-+		user_buf += bytes;
+-+	}
+-+	return *ppos - pos;
+-+}
+-+
+-+static const struct file_operations fops_eeprom = {
+-+	.read = read_file_eeprom,
+-+	.open = simple_open,
+-+	.owner = THIS_MODULE
+-+};
+-+
+- int ath9k_init_debug(struct ath_hw *ah)
+- {
+- 	struct ath_common *common = ath9k_hw_common(ah);
+-@@ -1432,6 +1480,8 @@ int ath9k_init_debug(struct ath_hw *ah)
+- 	ath9k_tx99_init_debug(sc);
+- 	ath9k_cmn_spectral_init_debug(&sc->spec_priv, sc->debug.debugfs_phy);
+- 
+-+	debugfs_create_file("eeprom", S_IRUSR, sc->debug.debugfs_phy, sc,
+-+			    &fops_eeprom);
+- 	debugfs_create_devm_seqfile(sc->dev, "dma", sc->debug.debugfs_phy,
+- 				    read_file_dma);
+- 	debugfs_create_devm_seqfile(sc->dev, "interrupt", sc->debug.debugfs_phy,
+diff --git a/package/kernel/mac80211/patches/ath9k/501-ath9k_ahb_init.patch b/package/kernel/mac80211/patches/ath9k/501-ath9k_ahb_init.patch
+deleted file mode 100644
+index 740ddc39dc..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/501-ath9k_ahb_init.patch
++++ /dev/null
+@@ -1,34 +0,0 @@
+---- a/drivers/net/wireless/ath/ath9k/init.c
+-+++ b/drivers/net/wireless/ath/ath9k/init.c
+-@@ -1178,25 +1178,25 @@ static int __init ath9k_init(void)
+- {
+- 	int error;
+- 
+--	error = ath_pci_init();
+-+	error = ath_ahb_init();
+- 	if (error < 0) {
+--		pr_err("No PCI devices found, driver not installed\n");
+- 		error = -ENODEV;
+- 		goto err_out;
+- 	}
+- 
+--	error = ath_ahb_init();
+-+	error = ath_pci_init();
+- 	if (error < 0) {
+-+		pr_err("No PCI devices found, driver not installed\n");
+- 		error = -ENODEV;
+--		goto err_pci_exit;
+-+		goto err_ahb_exit;
+- 	}
+- 
+- 	dmi_check_system(ath9k_quirks);
+- 
+- 	return 0;
+- 
+-- err_pci_exit:
+--	ath_pci_exit();
+-+ err_ahb_exit:
+-+	ath_ahb_exit();
+-  err_out:
+- 	return error;
+- }
+diff --git a/package/kernel/mac80211/patches/ath9k/510-ath9k_intr_mitigation_tweak.patch b/package/kernel/mac80211/patches/ath9k/510-ath9k_intr_mitigation_tweak.patch
+deleted file mode 100644
+index fda050a8f2..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/510-ath9k_intr_mitigation_tweak.patch
++++ /dev/null
+@@ -1,18 +0,0 @@
+---- a/drivers/net/wireless/ath/ath9k/hw.c
+-+++ b/drivers/net/wireless/ath/ath9k/hw.c
+-@@ -402,13 +402,8 @@ static void ath9k_hw_init_config(struct
+- 
+- 	ah->config.rx_intr_mitigation = true;
+- 
+--	if (AR_SREV_9300_20_OR_LATER(ah)) {
+--		ah->config.rimt_last = 500;
+--		ah->config.rimt_first = 2000;
+--	} else {
+--		ah->config.rimt_last = 250;
+--		ah->config.rimt_first = 700;
+--	}
+-+	ah->config.rimt_last = 250;
+-+	ah->config.rimt_first = 500;
+- 
+- 	if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
+- 		ah->config.pll_pwrsave = 7;
+diff --git a/package/kernel/mac80211/patches/ath9k/511-ath9k_reduce_rxbuf.patch b/package/kernel/mac80211/patches/ath9k/511-ath9k_reduce_rxbuf.patch
+deleted file mode 100644
+index 15b8d7b86b..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/511-ath9k_reduce_rxbuf.patch
++++ /dev/null
+@@ -1,11 +0,0 @@
+---- a/drivers/net/wireless/ath/ath9k/ath9k.h
+-+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
+-@@ -88,7 +88,7 @@ int ath_descdma_setup(struct ath_softc *
+- 		(_l) &= ((_sz) - 1);		\
+- 	} while (0)
+- 
+--#define ATH_RXBUF               512
+-+#define ATH_RXBUF               256
+- #define ATH_TXBUF               512
+- #define ATH_TXBUF_RESERVE       5
+- #define ATH_TXMAXTRY            13
+diff --git a/package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch b/package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch
+deleted file mode 100644
+index a871e458a4..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch
++++ /dev/null
+@@ -1,125 +0,0 @@
+---- a/drivers/net/wireless/ath/ath9k/debug.c
+-+++ b/drivers/net/wireless/ath/ath9k/debug.c
+-@@ -1461,6 +1461,52 @@ static const struct file_operations fops
+- 	.owner = THIS_MODULE
+- };
+- 
+-+
+-+static ssize_t read_file_chan_bw(struct file *file, char __user *user_buf,
+-+			     size_t count, loff_t *ppos)
+-+{
+-+	struct ath_softc *sc = file->private_data;
+-+	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+-+	char buf[32];
+-+	unsigned int len;
+-+
+-+	len = sprintf(buf, "0x%08x\n", common->chan_bw);
+-+	return simple_read_from_buffer(user_buf, count, ppos, buf, len);
+-+}
+-+
+-+static ssize_t write_file_chan_bw(struct file *file, const char __user *user_buf,
+-+			     size_t count, loff_t *ppos)
+-+{
+-+	struct ath_softc *sc = file->private_data;
+-+	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+-+	unsigned long chan_bw;
+-+	char buf[32];
+-+	ssize_t len;
+-+
+-+	len = min(count, sizeof(buf) - 1);
+-+	if (copy_from_user(buf, user_buf, len))
+-+		return -EFAULT;
+-+
+-+	buf[len] = '\0';
+-+	if (kstrtoul(buf, 0, &chan_bw))
+-+		return -EINVAL;
+-+
+-+	common->chan_bw = chan_bw;
+-+	if (!test_bit(ATH_OP_INVALID, &common->op_flags))
+-+		ath9k_ops.config(sc->hw, IEEE80211_CONF_CHANGE_CHANNEL);
+-+
+-+	return count;
+-+}
+-+
+-+static const struct file_operations fops_chanbw = {
+-+	.read = read_file_chan_bw,
+-+	.write = write_file_chan_bw,
+-+	.open = simple_open,
+-+	.owner = THIS_MODULE,
+-+	.llseek = default_llseek,
+-+};
+-+
+-+
+- int ath9k_init_debug(struct ath_hw *ah)
+- {
+- 	struct ath_common *common = ath9k_hw_common(ah);
+-@@ -1482,6 +1528,8 @@ int ath9k_init_debug(struct ath_hw *ah)
+- 
+- 	debugfs_create_file("eeprom", S_IRUSR, sc->debug.debugfs_phy, sc,
+- 			    &fops_eeprom);
+-+	debugfs_create_file("chanbw", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
+-+			    sc, &fops_chanbw);
+- 	debugfs_create_devm_seqfile(sc->dev, "dma", sc->debug.debugfs_phy,
+- 				    read_file_dma);
+- 	debugfs_create_devm_seqfile(sc->dev, "interrupt", sc->debug.debugfs_phy,
+---- a/drivers/net/wireless/ath/ath.h
+-+++ b/drivers/net/wireless/ath/ath.h
+-@@ -149,6 +149,7 @@ struct ath_common {
+- 	int debug_mask;
+- 	enum ath_device_state state;
+- 	unsigned long op_flags;
+-+	u32 chan_bw;
+- 
+- 	struct ath_ani ani;
+- 
+---- a/drivers/net/wireless/ath/ath9k/common.c
+-+++ b/drivers/net/wireless/ath/ath9k/common.c
+-@@ -297,11 +297,13 @@ EXPORT_SYMBOL(ath9k_cmn_get_hw_crypto_ke
+- /*
+-  * Update internal channel flags.
+-  */
+--static void ath9k_cmn_update_ichannel(struct ath9k_channel *ichan,
+-+static void ath9k_cmn_update_ichannel(struct ath_common *common,
+-+				      struct ath9k_channel *ichan,
+- 				      struct cfg80211_chan_def *chandef)
+- {
+- 	struct ieee80211_channel *chan = chandef->chan;
+- 	u16 flags = 0;
+-+	int width;
+- 
+- 	ichan->channel = chan->center_freq;
+- 	ichan->chan = chan;
+-@@ -309,7 +311,19 @@ static void ath9k_cmn_update_ichannel(st
+- 	if (chan->band == NL80211_BAND_5GHZ)
+- 		flags |= CHANNEL_5GHZ;
+- 
+--	switch (chandef->width) {
+-+	switch (common->chan_bw) {
+-+	case 5:
+-+		width = NL80211_CHAN_WIDTH_5;
+-+		break;
+-+	case 10:
+-+		width = NL80211_CHAN_WIDTH_10;
+-+		break;
+-+	default:
+-+		width = chandef->width;
+-+		break;
+-+	}
+-+
+-+	switch (width) {
+- 	case NL80211_CHAN_WIDTH_5:
+- 		flags |= CHANNEL_QUARTER;
+- 		break;
+-@@ -342,10 +356,11 @@ struct ath9k_channel *ath9k_cmn_get_chan
+- 					    struct cfg80211_chan_def *chandef)
+- {
+- 	struct ieee80211_channel *curchan = chandef->chan;
+-+	struct ath_common *common = ath9k_hw_common(ah);
+- 	struct ath9k_channel *channel;
+- 
+- 	channel = &ah->channels[curchan->hw_value];
+--	ath9k_cmn_update_ichannel(channel, chandef);
+-+	ath9k_cmn_update_ichannel(common, channel, chandef);
+- 
+- 	return channel;
+- }
+diff --git a/package/kernel/mac80211/patches/ath9k/513-ath9k_add_pci_ids.patch b/package/kernel/mac80211/patches/ath9k/513-ath9k_add_pci_ids.patch
+deleted file mode 100644
+index a085e3a1fb..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/513-ath9k_add_pci_ids.patch
++++ /dev/null
+@@ -1,30 +0,0 @@
+---- a/drivers/net/wireless/ath/ath9k/hw.c
+-+++ b/drivers/net/wireless/ath/ath9k/hw.c
+-@@ -662,6 +662,7 @@ int ath9k_hw_init(struct ath_hw *ah)
+- 
+- 	/* These are all the AR5008/AR9001/AR9002/AR9003 hardware family of chipsets */
+- 	switch (ah->hw_version.devid) {
+-+	case AR9300_DEVID_INVALID:
+- 	case AR5416_DEVID_PCI:
+- 	case AR5416_DEVID_PCIE:
+- 	case AR5416_AR9100_DEVID:
+---- a/drivers/net/wireless/ath/ath9k/hw.h
+-+++ b/drivers/net/wireless/ath/ath9k/hw.h
+-@@ -36,6 +36,7 @@
+- 
+- #define ATHEROS_VENDOR_ID	0x168c
+- 
+-+#define AR9300_DEVID_INVALID	0xabcd
+- #define AR5416_DEVID_PCI	0x0023
+- #define AR5416_DEVID_PCIE	0x0024
+- #define AR9160_DEVID_PCI	0x0027
+---- a/drivers/net/wireless/ath/ath9k/pci.c
+-+++ b/drivers/net/wireless/ath/ath9k/pci.c
+-@@ -774,6 +774,7 @@ static const struct pci_device_id ath_pc
+- 	  .driver_data = ATH9K_PCI_BT_ANT_DIV },
+- #endif
+- 
+-+	{ PCI_VDEVICE(ATHEROS, 0xabcd) }, /* PCI-E  internal chip default ID */
+- 	{ 0 }
+- };
+- 
+diff --git a/package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch b/package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch
+deleted file mode 100644
+index 74506657e0..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch
++++ /dev/null
+@@ -1,267 +0,0 @@
+---- a/drivers/net/wireless/ath/ath9k/ath9k.h
+-+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
+-@@ -843,6 +843,9 @@ static inline int ath9k_dump_btcoex(stru
+- #ifdef CPTCFG_MAC80211_LEDS
+- void ath_init_leds(struct ath_softc *sc);
+- void ath_deinit_leds(struct ath_softc *sc);
+-+int ath_create_gpio_led(struct ath_softc *sc, int gpio, const char *name,
+-+			const char *trigger, bool active_low);
+-+
+- #else
+- static inline void ath_init_leds(struct ath_softc *sc)
+- {
+-@@ -979,6 +982,13 @@ void ath_ant_comb_scan(struct ath_softc
+- 
+- #define ATH9K_NUM_CHANCTX  2 /* supports 2 operating channels */
+- 
+-+struct ath_led {
+-+	struct list_head list;
+-+	struct ath_softc *sc;
+-+	const struct gpio_led *gpio;
+-+	struct led_classdev cdev;
+-+};
+-+
+- struct ath_softc {
+- 	struct ieee80211_hw *hw;
+- 	struct device *dev;
+-@@ -1032,9 +1042,8 @@ struct ath_softc {
+- 	spinlock_t chan_lock;
+- 
+- #ifdef CPTCFG_MAC80211_LEDS
+--	bool led_registered;
+--	char led_name[32];
+--	struct led_classdev led_cdev;
+-+	const char *led_default_trigger;
+-+	struct list_head leds;
+- #endif
+- 
+- #ifdef CPTCFG_ATH9K_DEBUGFS
+---- a/drivers/net/wireless/ath/ath9k/gpio.c
+-+++ b/drivers/net/wireless/ath/ath9k/gpio.c
+-@@ -39,61 +39,111 @@ static void ath_fill_led_pin(struct ath_
+- 		else
+- 			ah->led_pin = ATH_LED_PIN_DEF;
+- 	}
+-+}
+-+
+-+static void ath_led_brightness(struct led_classdev *led_cdev,
+-+			       enum led_brightness brightness)
+-+{
+-+	struct ath_led *led = container_of(led_cdev, struct ath_led, cdev);
+-+	struct ath_softc *sc = led->sc;
+-+
+-+	ath9k_ps_wakeup(sc);
+-+	ath9k_hw_set_gpio(sc->sc_ah, led->gpio->gpio,
+-+			  (brightness != LED_OFF) ^ led->gpio->active_low);
+-+	ath9k_ps_restore(sc);
+-+}
+-+
+-+static int ath_add_led(struct ath_softc *sc, struct ath_led *led)
+-+{
+-+	const struct gpio_led *gpio = led->gpio;
+-+	int ret;
+-+
+-+	led->cdev.name = gpio->name;
+-+	led->cdev.default_trigger = gpio->default_trigger;
+-+	led->cdev.brightness_set = ath_led_brightness;
+-+
+-+	ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->cdev);
+-+	if (ret < 0)
+-+		return ret;
+-+
+-+	led->sc = sc;
+-+	list_add(&led->list, &sc->leds);
+- 
+- 	/* Configure gpio for output */
+--	ath9k_hw_gpio_request_out(ah, ah->led_pin, "ath9k-led",
+-+	ath9k_hw_gpio_request_out(sc->sc_ah, gpio->gpio, gpio->name,
+- 				  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
+- 
+--	/* LED off, active low */
+--	ath9k_hw_set_gpio(ah, ah->led_pin, ah->config.led_active_high ? 0 : 1);
+-+	/* LED off */
+-+	ath9k_hw_set_gpio(sc->sc_ah, gpio->gpio, gpio->active_low);
+-+
+-+	return 0;
+- }
+- 
+--static void ath_led_brightness(struct led_classdev *led_cdev,
+--			       enum led_brightness brightness)
+-+int ath_create_gpio_led(struct ath_softc *sc, int gpio_num, const char *name,
+-+			const char *trigger, bool active_low)
+- {
+--	struct ath_softc *sc = container_of(led_cdev, struct ath_softc, led_cdev);
+--	u32 val = (brightness == LED_OFF);
+-+	struct ath_led *led;
+-+	struct gpio_led *gpio;
+-+	char *_name;
+-+	int ret;
+- 
+--	if (sc->sc_ah->config.led_active_high)
+--		val = !val;
+-+	led = kzalloc(sizeof(*led) + sizeof(*gpio) + strlen(name) + 1,
+-+		      GFP_KERNEL);
+-+	if (!led)
+-+		return -ENOMEM;
+-+
+-+	led->gpio = gpio = (struct gpio_led *) (led + 1);
+-+	_name = (char *) (led->gpio + 1);
+-+
+-+	strcpy(_name, name);
+-+	gpio->name = _name;
+-+	gpio->gpio = gpio_num;
+-+	gpio->active_low = active_low;
+-+	gpio->default_trigger = trigger;
+-+
+-+	ret = ath_add_led(sc, led);
+-+	if (unlikely(ret < 0))
+-+		kfree(led);
+- 
+--	ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, val);
+-+	return ret;
+- }
+- 
+- void ath_deinit_leds(struct ath_softc *sc)
+- {
+--	if (!sc->led_registered)
+--		return;
+-+	struct ath_led *led;
+- 
+--	ath_led_brightness(&sc->led_cdev, LED_OFF);
+--	led_classdev_unregister(&sc->led_cdev);
+--
+--	ath9k_hw_gpio_free(sc->sc_ah, sc->sc_ah->led_pin);
+-+	while (!list_empty(&sc->leds)) {
+-+		led = list_first_entry(&sc->leds, struct ath_led, list);
+-+		list_del(&led->list);
+-+		ath_led_brightness(&led->cdev, LED_OFF);
+-+		led_classdev_unregister(&led->cdev);
+-+		ath9k_hw_gpio_free(sc->sc_ah, led->gpio->gpio);
+-+		kfree(led);
+-+	}
+- }
+- 
+- void ath_init_leds(struct ath_softc *sc)
+- {
+--	int ret;
+-+	char led_name[32];
+-+	const char *trigger;
+-+
+-+	INIT_LIST_HEAD(&sc->leds);
+- 
+- 	if (AR_SREV_9100(sc->sc_ah))
+- 		return;
+- 
+- 	ath_fill_led_pin(sc);
+- 
+--	if (!ath9k_led_blink)
+--		sc->led_cdev.default_trigger =
+--			ieee80211_get_radio_led_name(sc->hw);
+--
+--	snprintf(sc->led_name, sizeof(sc->led_name),
+--		"ath9k-%s", wiphy_name(sc->hw->wiphy));
+--	sc->led_cdev.name = sc->led_name;
+--	sc->led_cdev.brightness_set = ath_led_brightness;
+-+	snprintf(led_name, sizeof(led_name), "ath9k-%s",
+-+		 wiphy_name(sc->hw->wiphy));
+- 
+--	ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &sc->led_cdev);
+--	if (ret < 0)
+--		return;
+-+	if (ath9k_led_blink)
+-+		trigger = sc->led_default_trigger;
+-+	else
+-+		trigger = ieee80211_get_radio_led_name(sc->hw);
+- 
+--	sc->led_registered = true;
+-+	ath_create_gpio_led(sc, sc->sc_ah->led_pin, led_name, trigger,
+-+			   !sc->sc_ah->config.led_active_high);
+- }
+- #endif
+- 
+---- a/drivers/net/wireless/ath/ath9k/init.c
+-+++ b/drivers/net/wireless/ath/ath9k/init.c
+-@@ -1088,7 +1088,7 @@ int ath9k_init_device(u16 devid, struct
+- 
+- #ifdef CPTCFG_MAC80211_LEDS
+- 	/* must be initialized before ieee80211_register_hw */
+--	sc->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(sc->hw,
+-+	sc->led_default_trigger = ieee80211_create_tpt_led_trigger(sc->hw,
+- 		IEEE80211_TPT_LEDTRIG_FL_RADIO, ath9k_tpt_blink,
+- 		ARRAY_SIZE(ath9k_tpt_blink));
+- #endif
+---- a/drivers/net/wireless/ath/ath9k/debug.c
+-+++ b/drivers/net/wireless/ath/ath9k/debug.c
+-@@ -1506,6 +1506,61 @@ static const struct file_operations fops
+- 	.llseek = default_llseek,
+- };
+- 
+-+#ifdef CONFIG_MAC80211_LEDS
+-+
+-+static ssize_t write_file_gpio_led(struct file *file, const char __user *ubuf,
+-+				   size_t count, loff_t *ppos)
+-+{
+-+	struct ath_softc *sc = file->private_data;
+-+	char buf[32], *str, *name, *c;
+-+	ssize_t len;
+-+	unsigned int gpio;
+-+	bool active_low = false;
+-+
+-+	len = min(count, sizeof(buf) - 1);
+-+	if (copy_from_user(buf, ubuf, len))
+-+		return -EFAULT;
+-+
+-+	buf[len] = '\0';
+-+	name = strchr(buf, ',');
+-+	if (!name)
+-+		return -EINVAL;
+-+
+-+	*(name++) = 0;
+-+	if (!*name)
+-+		return -EINVAL;
+-+
+-+	c = strchr(name, '\n');
+-+	if (c)
+-+		*c = 0;
+-+
+-+	str = buf;
+-+	if (*str == '!') {
+-+		str++;
+-+		active_low = true;
+-+	}
+-+
+-+	if (kstrtouint(str, 0, &gpio) < 0)
+-+		return -EINVAL;
+-+
+-+	if (gpio >= sc->sc_ah->caps.num_gpio_pins)
+-+		return -EINVAL;
+-+
+-+	if (ath_create_gpio_led(sc, gpio, name, NULL, active_low) < 0)
+-+		return -EINVAL;
+-+
+-+	return count;
+-+}
+-+
+-+static const struct file_operations fops_gpio_led = {
+-+	.write = write_file_gpio_led,
+-+	.open = simple_open,
+-+	.owner = THIS_MODULE,
+-+	.llseek = default_llseek,
+-+};
+-+
+-+#endif
+-+
+- 
+- int ath9k_init_debug(struct ath_hw *ah)
+- {
+-@@ -1530,6 +1585,10 @@ int ath9k_init_debug(struct ath_hw *ah)
+- 			    &fops_eeprom);
+- 	debugfs_create_file("chanbw", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
+- 			    sc, &fops_chanbw);
+-+#ifdef CONFIG_MAC80211_LEDS
+-+	debugfs_create_file("gpio_led", S_IWUSR,
+-+			   sc->debug.debugfs_phy, sc, &fops_gpio_led);
+-+#endif
+- 	debugfs_create_devm_seqfile(sc->dev, "dma", sc->debug.debugfs_phy,
+- 				    read_file_dma);
+- 	debugfs_create_devm_seqfile(sc->dev, "interrupt", sc->debug.debugfs_phy,
+diff --git a/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch b/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch
+deleted file mode 100644
+index 8ed7ad8a09..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch
++++ /dev/null
+@@ -1,76 +0,0 @@
+---- a/include/linux/ath9k_platform.h
+-+++ b/include/linux/ath9k_platform.h
+-@@ -46,6 +46,9 @@ struct ath9k_platform_data {
+- 	int (*external_reset)(void);
+- 
+- 	bool use_eeprom;
+-+
+-+	int num_leds;
+-+	const struct gpio_led *leds;
+- };
+- 
+- #endif /* _LINUX_ATH9K_PLATFORM_H */
+---- a/drivers/net/wireless/ath/ath9k/gpio.c
+-+++ b/drivers/net/wireless/ath/ath9k/gpio.c
+-@@ -15,6 +15,7 @@
+-  */
+- 
+- #include "ath9k.h"
+-+#include <linux/ath9k_platform.h>
+- 
+- /********************************/
+- /*	 LED functions		*/
+-@@ -108,6 +109,24 @@ int ath_create_gpio_led(struct ath_softc
+- 	return ret;
+- }
+- 
+-+static int ath_create_platform_led(struct ath_softc *sc,
+-+				   const struct gpio_led *gpio)
+-+{
+-+	struct ath_led *led;
+-+	int ret;
+-+
+-+	led = kzalloc(sizeof(*led), GFP_KERNEL);
+-+	if (!led)
+-+		return -ENOMEM;
+-+
+-+	led->gpio = gpio;
+-+	ret = ath_add_led(sc, led);
+-+	if (ret < 0)
+-+		kfree(led);
+-+
+-+	return ret;
+-+}
+-+
+- void ath_deinit_leds(struct ath_softc *sc)
+- {
+- 	struct ath_led *led;
+-@@ -124,8 +143,10 @@ void ath_deinit_leds(struct ath_softc *s
+- 
+- void ath_init_leds(struct ath_softc *sc)
+- {
+-+	struct ath9k_platform_data *pdata = sc->dev->platform_data;
+- 	char led_name[32];
+- 	const char *trigger;
+-+	int i;
+- 
+- 	INIT_LIST_HEAD(&sc->leds);
+- 
+-@@ -134,6 +155,17 @@ void ath_init_leds(struct ath_softc *sc)
+- 
+- 	ath_fill_led_pin(sc);
+- 
+-+	if (pdata && pdata->leds && pdata->num_leds)
+-+		for (i = 0; i < pdata->num_leds; i++) {
+-+			if (pdata->leds[i].gpio == sc->sc_ah->led_pin)
+-+				sc->sc_ah->led_pin = -1;
+-+
+-+			ath_create_platform_led(sc, &pdata->leds[i]);
+-+		}
+-+
+-+	if (sc->sc_ah->led_pin < 0)
+-+		return;
+-+
+- 	snprintf(led_name, sizeof(led_name), "ath9k-%s",
+- 		 wiphy_name(sc->hw->wiphy));
+- 
+diff --git a/package/kernel/mac80211/patches/ath9k/540-ath9k_reduce_ani_interval.patch b/package/kernel/mac80211/patches/ath9k/540-ath9k_reduce_ani_interval.patch
+deleted file mode 100644
+index e899903478..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/540-ath9k_reduce_ani_interval.patch
++++ /dev/null
+@@ -1,11 +0,0 @@
+---- a/drivers/net/wireless/ath/ath9k/ani.h
+-+++ b/drivers/net/wireless/ath/ath9k/ani.h
+-@@ -42,7 +42,7 @@
+- #define ATH9K_ANI_PERIOD                  300
+- 
+- /* in ms */
+--#define ATH9K_ANI_POLLINTERVAL            1000
+-+#define ATH9K_ANI_POLLINTERVAL            300
+- 
+- #define ATH9K_SIG_FIRSTEP_SETTING_MIN     0
+- #define ATH9K_SIG_FIRSTEP_SETTING_MAX     20
+diff --git a/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch b/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch
+deleted file mode 100644
+index e09bbc08ea..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch
++++ /dev/null
+@@ -1,139 +0,0 @@
+---- a/drivers/net/wireless/ath/ath9k/debug.c
+-+++ b/drivers/net/wireless/ath/ath9k/debug.c
+-@@ -1562,6 +1562,50 @@ static const struct file_operations fops
+- #endif
+- 
+- 
+-+static ssize_t read_file_diag(struct file *file, char __user *user_buf,
+-+			     size_t count, loff_t *ppos)
+-+{
+-+	struct ath_softc *sc = file->private_data;
+-+	struct ath_hw *ah = sc->sc_ah;
+-+	char buf[32];
+-+	unsigned int len;
+-+
+-+	len = sprintf(buf, "0x%08lx\n", ah->diag);
+-+	return simple_read_from_buffer(user_buf, count, ppos, buf, len);
+-+}
+-+
+-+static ssize_t write_file_diag(struct file *file, const char __user *user_buf,
+-+			     size_t count, loff_t *ppos)
+-+{
+-+	struct ath_softc *sc = file->private_data;
+-+	struct ath_hw *ah = sc->sc_ah;
+-+	unsigned long diag;
+-+	char buf[32];
+-+	ssize_t len;
+-+
+-+	len = min(count, sizeof(buf) - 1);
+-+	if (copy_from_user(buf, user_buf, len))
+-+		return -EFAULT;
+-+
+-+	buf[len] = '\0';
+-+	if (kstrtoul(buf, 0, &diag))
+-+		return -EINVAL;
+-+
+-+	ah->diag = diag;
+-+	ath9k_hw_update_diag(ah);
+-+
+-+	return count;
+-+}
+-+
+-+static const struct file_operations fops_diag = {
+-+	.read = read_file_diag,
+-+	.write = write_file_diag,
+-+	.open = simple_open,
+-+	.owner = THIS_MODULE,
+-+	.llseek = default_llseek,
+-+};
+-+
+-+
+- int ath9k_init_debug(struct ath_hw *ah)
+- {
+- 	struct ath_common *common = ath9k_hw_common(ah);
+-@@ -1589,6 +1633,8 @@ int ath9k_init_debug(struct ath_hw *ah)
+- 	debugfs_create_file("gpio_led", S_IWUSR,
+- 			   sc->debug.debugfs_phy, sc, &fops_gpio_led);
+- #endif
+-+	debugfs_create_file("diag", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
+-+			    sc, &fops_diag);
+- 	debugfs_create_devm_seqfile(sc->dev, "dma", sc->debug.debugfs_phy,
+- 				    read_file_dma);
+- 	debugfs_create_devm_seqfile(sc->dev, "interrupt", sc->debug.debugfs_phy,
+---- a/drivers/net/wireless/ath/ath9k/hw.h
+-+++ b/drivers/net/wireless/ath/ath9k/hw.h
+-@@ -522,6 +522,12 @@ enum {
+- 	ATH9K_RESET_COLD,
+- };
+- 
+-+enum {
+-+	ATH_DIAG_DISABLE_RX,
+-+	ATH_DIAG_DISABLE_TX,
+-+	ATH_DIAG_TRIGGER_ERROR,
+-+};
+-+
+- struct ath9k_hw_version {
+- 	u32 magic;
+- 	u16 devid;
+-@@ -810,6 +816,8 @@ struct ath_hw {
+- 	u32 ah_flags;
+- 	s16 nf_override;
+- 
+-+	unsigned long diag;
+-+
+- 	bool reset_power_on;
+- 	bool htc_reset_init;
+- 
+-@@ -1079,6 +1087,7 @@ void ath9k_hw_check_nav(struct ath_hw *a
+- bool ath9k_hw_check_alive(struct ath_hw *ah);
+- 
+- bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode);
+-+void ath9k_hw_update_diag(struct ath_hw *ah);
+- 
+- /* Generic hw timer primitives */
+- struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,
+---- a/drivers/net/wireless/ath/ath9k/hw.c
+-+++ b/drivers/net/wireless/ath/ath9k/hw.c
+-@@ -1881,6 +1881,20 @@ u32 ath9k_hw_get_tsf_offset(struct times
+- }
+- EXPORT_SYMBOL(ath9k_hw_get_tsf_offset);
+- 
+-+void ath9k_hw_update_diag(struct ath_hw *ah)
+-+{
+-+	if (test_bit(ATH_DIAG_DISABLE_RX, &ah->diag))
+-+		REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS);
+-+	else
+-+		REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS);
+-+
+-+	if (test_bit(ATH_DIAG_DISABLE_TX, &ah->diag))
+-+		REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_LOOP_BACK);
+-+	else
+-+		REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_LOOP_BACK);
+-+}
+-+EXPORT_SYMBOL(ath9k_hw_update_diag);
+-+
+- int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
+- 		   struct ath9k_hw_cal_data *caldata, bool fastcc)
+- {
+-@@ -2089,6 +2103,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
+- 		ar9003_hw_disable_phy_restart(ah);
+- 
+- 	ath9k_hw_apply_gpio_override(ah);
+-+	ath9k_hw_update_diag(ah);
+- 
+- 	if (AR_SREV_9565(ah) && common->bt_ant_diversity)
+- 		REG_SET_BIT(ah, AR_BTCOEX_WL_LNADIV, AR_BTCOEX_WL_LNADIV_FORCE_ON);
+---- a/drivers/net/wireless/ath/ath9k/main.c
+-+++ b/drivers/net/wireless/ath/ath9k/main.c
+-@@ -538,6 +538,11 @@ irqreturn_t ath_isr(int irq, void *dev)
+- 		return IRQ_HANDLED;
+- 	}
+- 
+-+	if (test_bit(ATH_DIAG_TRIGGER_ERROR, &ah->diag)) {
+-+		status |= ATH9K_INT_FATAL;
+-+		clear_bit(ATH_DIAG_TRIGGER_ERROR, &ah->diag);
+-+	}
+-+
+- 	/*
+- 	 * If there are no status bits set, then this interrupt was not
+- 	 * for me (should have been caught above).
+diff --git a/package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch b/package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch
+deleted file mode 100644
+index 6acc864d1e..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch
++++ /dev/null
+@@ -1,186 +0,0 @@
+---- a/drivers/net/wireless/ath/ath9k/hw.h
+-+++ b/drivers/net/wireless/ath/ath9k/hw.h
+-@@ -723,6 +723,7 @@ struct ath_spec_scan {
+-  * @config_pci_powersave:
+-  * @calibrate: periodic calibration for NF, ANI, IQ, ADC gain, ADC-DC
+-  *
+-+ * @get_adc_entropy: get entropy from the raw ADC I/Q output
+-  * @spectral_scan_config: set parameters for spectral scan and enable/disable it
+-  * @spectral_scan_trigger: trigger a spectral scan run
+-  * @spectral_scan_wait: wait for a spectral scan run to finish
+-@@ -745,6 +746,7 @@ struct ath_hw_ops {
+- 			struct ath_hw_antcomb_conf *antconf);
+- 	void (*antdiv_comb_conf_set)(struct ath_hw *ah,
+- 			struct ath_hw_antcomb_conf *antconf);
+-+	void (*get_adc_entropy)(struct ath_hw *ah, u8 *buf, size_t len);
+- 	void (*spectral_scan_config)(struct ath_hw *ah,
+- 				     struct ath_spec_scan *param);
+- 	void (*spectral_scan_trigger)(struct ath_hw *ah);
+---- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+-+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+-@@ -1918,6 +1918,26 @@ void ar9003_hw_init_rate_txpower(struct
+- 	}
+- }
+- 
+-+static void ar9003_hw_get_adc_entropy(struct ath_hw *ah, u8 *buf, size_t len)
+-+{
+-+	int i, j;
+-+
+-+	REG_RMW_FIELD(ah, AR_PHY_TEST, AR_PHY_TEST_BBB_OBS_SEL, 1);
+-+	REG_CLR_BIT(ah, AR_PHY_TEST, AR_PHY_TEST_RX_OBS_SEL_BIT5);
+-+	REG_RMW_FIELD(ah, AR_PHY_TEST_CTL_STATUS, AR_PHY_TEST_CTL_RX_OBS_SEL, 0);
+-+
+-+	memset(buf, 0, len);
+-+	for (i = 0; i < len; i++) {
+-+		for (j = 0; j < 4; j++) {
+-+			u32 regval = REG_READ(ah, AR_PHY_TST_ADC);
+-+
+-+			buf[i] <<= 2;
+-+			buf[i] |= (regval & 1) | ((regval & BIT(10)) >> 9);
+-+			udelay(1);
+-+		}
+-+	}
+-+}
+-+
+- void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
+- {
+- 	struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
+-@@ -1954,6 +1974,7 @@ void ar9003_hw_attach_phy_ops(struct ath
+- 	priv_ops->set_radar_params = ar9003_hw_set_radar_params;
+- 	priv_ops->fast_chan_change = ar9003_hw_fast_chan_change;
+- 
+-+	ops->get_adc_entropy = ar9003_hw_get_adc_entropy;
+- 	ops->antdiv_comb_conf_get = ar9003_hw_antdiv_comb_conf_get;
+- 	ops->antdiv_comb_conf_set = ar9003_hw_antdiv_comb_conf_set;
+- 	ops->spectral_scan_config = ar9003_hw_spectral_scan_config;
+---- a/drivers/net/wireless/ath/ath9k/init.c
+-+++ b/drivers/net/wireless/ath/ath9k/init.c
+-@@ -870,7 +870,8 @@ static void ath9k_init_txpower_limits(st
+- 	if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
+- 		ath9k_init_band_txpower(sc, NL80211_BAND_5GHZ);
+- 
+--	ah->curchan = curchan;
+-+	if (curchan)
+-+		ah->curchan = curchan;
+- }
+- 
+- static const struct ieee80211_iface_limit if_limits[] = {
+-@@ -1048,6 +1049,18 @@ static void ath9k_set_hw_capab(struct at
+- 	wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
+- }
+- 
+-+static void ath_get_initial_entropy(struct ath_softc *sc)
+-+{
+-+	struct ath_hw *ah = sc->sc_ah;
+-+	char buf[256];
+-+
+-+	/* reuse last channel initialized by the tx power test */
+-+	ath9k_hw_reset(ah, ah->curchan, NULL, false);
+-+
+-+	ath9k_hw_get_adc_entropy(ah, buf, sizeof(buf));
+-+	add_device_randomness(buf, sizeof(buf));
+-+}
+-+
+- int ath9k_init_device(u16 devid, struct ath_softc *sc,
+- 		    const struct ath_bus_ops *bus_ops)
+- {
+-@@ -1095,6 +1108,8 @@ int ath9k_init_device(u16 devid, struct
+- 
+- 	wiphy_read_of_freq_limits(hw->wiphy);
+- 
+-+	ath_get_initial_entropy(sc);
+-+
+- 	/* Register with mac80211 */
+- 	error = ieee80211_register_hw(hw);
+- 	if (error)
+---- a/drivers/net/wireless/ath/ath9k/hw-ops.h
+-+++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
+-@@ -100,6 +100,12 @@ static inline void ath9k_hw_tx99_set_txp
+- 		ath9k_hw_ops(ah)->tx99_set_txpower(ah, power);
+- }
+- 
+-+static inline void ath9k_hw_get_adc_entropy(struct ath_hw *ah,
+-+		u8 *buf, size_t len)
+-+{
+-+	ath9k_hw_ops(ah)->get_adc_entropy(ah, buf, len);
+-+}
+-+
+- #ifdef CPTCFG_ATH9K_BTCOEX_SUPPORT
+- 
+- static inline void ath9k_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable)
+---- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+-+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+-@@ -1340,9 +1340,30 @@ void ar5008_hw_init_rate_txpower(struct
+- 	}
+- }
+- 
+-+static void ar5008_hw_get_adc_entropy(struct ath_hw *ah, u8 *buf, size_t len)
+-+{
+-+	int i, j;
+-+
+-+	REG_RMW_FIELD(ah, AR_PHY_TEST, AR_PHY_TEST_BBB_OBS_SEL, 1);
+-+	REG_CLR_BIT(ah, AR_PHY_TEST, AR_PHY_TEST_RX_OBS_SEL_BIT5);
+-+	REG_RMW_FIELD(ah, AR_PHY_TEST2, AR_PHY_TEST2_RX_OBS_SEL, 0);
+-+
+-+	memset(buf, 0, len);
+-+	for (i = 0; i < len; i++) {
+-+		for (j = 0; j < 4; j++) {
+-+			u32 regval = REG_READ(ah, AR_PHY_TST_ADC);
+-+
+-+			buf[i] <<= 2;
+-+			buf[i] |= (regval & 1) | ((regval & BIT(9)) >> 8);
+-+			udelay(1);
+-+		}
+-+	}
+-+}
+-+
+- int ar5008_hw_attach_phy_ops(struct ath_hw *ah)
+- {
+- 	struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
+-+	struct ath_hw_ops *ops = ath9k_hw_ops(ah);
+- 	static const u32 ar5416_cca_regs[6] = {
+- 		AR_PHY_CCA,
+- 		AR_PHY_CH1_CCA,
+-@@ -1357,6 +1378,8 @@ int ar5008_hw_attach_phy_ops(struct ath_
+- 	if (ret)
+- 	    return ret;
+- 
+-+	ops->get_adc_entropy = ar5008_hw_get_adc_entropy;
+-+
+- 	priv_ops->rf_set_freq = ar5008_hw_set_channel;
+- 	priv_ops->spur_mitigate_freq = ar5008_hw_spur_mitigate;
+- 
+---- a/drivers/net/wireless/ath/ath9k/ar9002_phy.h
+-+++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.h
+-@@ -20,6 +20,12 @@
+- #define PHY_AGC_CLR             0x10000000
+- #define RFSILENT_BB             0x00002000
+- 
+-+#define AR_PHY_TEST_BBB_OBS_SEL       0x780000
+-+#define AR_PHY_TEST_BBB_OBS_SEL_S     19
+-+
+-+#define AR_PHY_TEST_RX_OBS_SEL_BIT5_S 23
+-+#define AR_PHY_TEST_RX_OBS_SEL_BIT5   (1 << AR_PHY_TEST_RX_OBS_SEL_BIT5_S)
+-+
+- #define AR_PHY_TURBO                0x9804
+- #define AR_PHY_FC_TURBO_MODE        0x00000001
+- #define AR_PHY_FC_TURBO_SHORT       0x00000002
+-@@ -36,6 +42,9 @@
+- 
+- #define AR_PHY_TEST2			0x9808
+- 
+-+#define AR_PHY_TEST2_RX_OBS_SEL        0x3C00
+-+#define AR_PHY_TEST2_RX_OBS_SEL_S      10
+-+
+- #define AR_PHY_TIMING2           0x9810
+- #define AR_PHY_TIMING3           0x9814
+- #define AR_PHY_TIMING3_DSC_MAN   0xFFFE0000
+-@@ -393,6 +402,8 @@
+- #define AR_PHY_RFBUS_GRANT       0x9C20
+- #define AR_PHY_RFBUS_GRANT_EN    0x00000001
+- 
+-+#define AR_PHY_TST_ADC      0x9C24
+-+
+- #define AR_PHY_CHAN_INFO_GAIN_DIFF             0x9CF4
+- #define AR_PHY_CHAN_INFO_GAIN_DIFF_UPPER_LIMIT 320
+- 
+diff --git a/package/kernel/mac80211/patches/ath9k/544-ath9k-ar933x-usb-hang-workaround.patch b/package/kernel/mac80211/patches/ath9k/544-ath9k-ar933x-usb-hang-workaround.patch
+deleted file mode 100644
+index 23a81864fa..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/544-ath9k-ar933x-usb-hang-workaround.patch
++++ /dev/null
+@@ -1,79 +0,0 @@
+---- a/drivers/net/wireless/ath/ath9k/hw.c
+-+++ b/drivers/net/wireless/ath/ath9k/hw.c
+-@@ -247,6 +247,19 @@ void ath9k_hw_get_channel_centers(struct
+- 		centers->synth_center + (extoff * HT40_CHANNEL_CENTER_SHIFT);
+- }
+- 
+-+static inline void ath9k_hw_disable_pll_lock_detect(struct ath_hw *ah)
+-+{
+-+	/* On AR9330 and AR9340 devices, some PHY registers must be
+-+	 * tuned to gain better stability/performance. These registers
+-+	 * might be changed while doing wlan reset so the registers must
+-+	 * be reprogrammed after each reset.
+-+	 */
+-+	REG_CLR_BIT(ah, AR_PHY_USB_CTRL1, BIT(20));
+-+	REG_RMW(ah, AR_PHY_USB_CTRL2,
+-+		(1 << 21) | (0xf << 22),
+-+		(1 << 21) | (0x3 << 22));
+-+}
+-+
+- /******************/
+- /* Chip Revisions */
+- /******************/
+-@@ -1454,6 +1467,9 @@ static bool ath9k_hw_set_reset(struct at
+- 		udelay(50);
+- 	}
+- 
+-+	if (AR_SREV_9330(ah) || AR_SREV_9340(ah))
+-+		ath9k_hw_disable_pll_lock_detect(ah);
+-+
+- 	return true;
+- }
+- 
+-@@ -1553,6 +1569,9 @@ static bool ath9k_hw_chip_reset(struct a
+- 		ar9003_hw_internal_regulator_apply(ah);
+- 	ath9k_hw_init_pll(ah, chan);
+- 
+-+	if (AR_SREV_9330(ah) || AR_SREV_9340(ah))
+-+		ath9k_hw_disable_pll_lock_detect(ah);
+-+
+- 	return true;
+- }
+- 
+-@@ -1859,8 +1878,14 @@ static int ath9k_hw_do_fastcc(struct ath
+- 	if (AR_SREV_9271(ah))
+- 		ar9002_hw_load_ani_reg(ah, chan);
+- 
+-+	if (AR_SREV_9330(ah) || AR_SREV_9340(ah))
+-+		ath9k_hw_disable_pll_lock_detect(ah);
+-+
+- 	return 0;
+- fail:
+-+	if (AR_SREV_9330(ah) || AR_SREV_9340(ah))
+-+		ath9k_hw_disable_pll_lock_detect(ah);
+-+
+- 	return -EINVAL;
+- }
+- 
+-@@ -2114,6 +2139,9 @@ int ath9k_hw_reset(struct ath_hw *ah, st
+- 		ath9k_hw_set_radar_params(ah);
+- 	}
+- 
+-+	if (AR_SREV_9330(ah) || AR_SREV_9340(ah))
+-+		ath9k_hw_disable_pll_lock_detect(ah);
+-+
+- 	return 0;
+- }
+- EXPORT_SYMBOL(ath9k_hw_reset);
+---- a/drivers/net/wireless/ath/ath9k/phy.h
+-+++ b/drivers/net/wireless/ath/ath9k/phy.h
+-@@ -48,6 +48,9 @@
+- #define AR_PHY_PLL_CONTROL 0x16180
+- #define AR_PHY_PLL_MODE 0x16184
+- 
+-+#define AR_PHY_USB_CTRL1	0x16c84
+-+#define AR_PHY_USB_CTRL2	0x16c88
+-+
+- enum ath9k_ant_div_comb_lna_conf {
+- 	ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2,
+- 	ATH_ANT_DIV_COMB_LNA2,
+diff --git a/package/kernel/mac80211/patches/ath9k/545-ath9k_ani_ws_detect.patch b/package/kernel/mac80211/patches/ath9k/545-ath9k_ani_ws_detect.patch
+deleted file mode 100644
+index d3bf07ff92..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/545-ath9k_ani_ws_detect.patch
++++ /dev/null
+@@ -1,155 +0,0 @@
+---- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+-+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+-@@ -969,55 +969,6 @@ static bool ar5008_hw_ani_control_new(st
+- 		 * on == 0 means more noise imm
+- 		 */
+- 		u32 on = param ? 1 : 0;
+--		/*
+--		 * make register setting for default
+--		 * (weak sig detect ON) come from INI file
+--		 */
+--		int m1ThreshLow = on ?
+--			aniState->iniDef.m1ThreshLow : m1ThreshLow_off;
+--		int m2ThreshLow = on ?
+--			aniState->iniDef.m2ThreshLow : m2ThreshLow_off;
+--		int m1Thresh = on ?
+--			aniState->iniDef.m1Thresh : m1Thresh_off;
+--		int m2Thresh = on ?
+--			aniState->iniDef.m2Thresh : m2Thresh_off;
+--		int m2CountThr = on ?
+--			aniState->iniDef.m2CountThr : m2CountThr_off;
+--		int m2CountThrLow = on ?
+--			aniState->iniDef.m2CountThrLow : m2CountThrLow_off;
+--		int m1ThreshLowExt = on ?
+--			aniState->iniDef.m1ThreshLowExt : m1ThreshLowExt_off;
+--		int m2ThreshLowExt = on ?
+--			aniState->iniDef.m2ThreshLowExt : m2ThreshLowExt_off;
+--		int m1ThreshExt = on ?
+--			aniState->iniDef.m1ThreshExt : m1ThreshExt_off;
+--		int m2ThreshExt = on ?
+--			aniState->iniDef.m2ThreshExt : m2ThreshExt_off;
+--
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
+--			      AR_PHY_SFCORR_LOW_M1_THRESH_LOW,
+--			      m1ThreshLow);
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
+--			      AR_PHY_SFCORR_LOW_M2_THRESH_LOW,
+--			      m2ThreshLow);
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR,
+--			      AR_PHY_SFCORR_M1_THRESH, m1Thresh);
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR,
+--			      AR_PHY_SFCORR_M2_THRESH, m2Thresh);
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR,
+--			      AR_PHY_SFCORR_M2COUNT_THR, m2CountThr);
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
+--			      AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW,
+--			      m2CountThrLow);
+--
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
+--			      AR_PHY_SFCORR_EXT_M1_THRESH_LOW, m1ThreshLowExt);
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
+--			      AR_PHY_SFCORR_EXT_M2_THRESH_LOW, m2ThreshLowExt);
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
+--			      AR_PHY_SFCORR_EXT_M1_THRESH, m1ThreshExt);
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
+--			      AR_PHY_SFCORR_EXT_M2_THRESH, m2ThreshExt);
+- 
+- 		if (on)
+- 			REG_SET_BIT(ah, AR_PHY_SFCORR_LOW,
+---- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+-+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+-@@ -42,20 +42,6 @@ static const int cycpwrThr1_table[] =
+- /* level:  0   1   2   3   4   5   6   7   8  */
+- 	{ -6, -4, -2,  0,  2,  4,  6,  8 };     /* lvl 0-7, default 3 */
+- 
+--/*
+-- * register values to turn OFDM weak signal detection OFF
+-- */
+--static const int m1ThreshLow_off = 127;
+--static const int m2ThreshLow_off = 127;
+--static const int m1Thresh_off = 127;
+--static const int m2Thresh_off = 127;
+--static const int m2CountThr_off =  31;
+--static const int m2CountThrLow_off =  63;
+--static const int m1ThreshLowExt_off = 127;
+--static const int m2ThreshLowExt_off = 127;
+--static const int m1ThreshExt_off = 127;
+--static const int m2ThreshExt_off = 127;
+--
+- static const u8 ofdm2pwr[] = {
+- 	ALL_TARGET_LEGACY_6_24,
+- 	ALL_TARGET_LEGACY_6_24,
+-@@ -1068,11 +1054,6 @@ static bool ar9003_hw_ani_control(struct
+- 	struct ath_common *common = ath9k_hw_common(ah);
+- 	struct ath9k_channel *chan = ah->curchan;
+- 	struct ar5416AniState *aniState = &ah->ani;
+--	int m1ThreshLow, m2ThreshLow;
+--	int m1Thresh, m2Thresh;
+--	int m2CountThr, m2CountThrLow;
+--	int m1ThreshLowExt, m2ThreshLowExt;
+--	int m1ThreshExt, m2ThreshExt;
+- 	s32 value, value2;
+- 
+- 	switch (cmd & ah->ani_function) {
+-@@ -1086,61 +1067,6 @@ static bool ar9003_hw_ani_control(struct
+- 		 */
+- 		u32 on = param ? 1 : 0;
+- 
+--		if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
+--			goto skip_ws_det;
+--
+--		m1ThreshLow = on ?
+--			aniState->iniDef.m1ThreshLow : m1ThreshLow_off;
+--		m2ThreshLow = on ?
+--			aniState->iniDef.m2ThreshLow : m2ThreshLow_off;
+--		m1Thresh = on ?
+--			aniState->iniDef.m1Thresh : m1Thresh_off;
+--		m2Thresh = on ?
+--			aniState->iniDef.m2Thresh : m2Thresh_off;
+--		m2CountThr = on ?
+--			aniState->iniDef.m2CountThr : m2CountThr_off;
+--		m2CountThrLow = on ?
+--			aniState->iniDef.m2CountThrLow : m2CountThrLow_off;
+--		m1ThreshLowExt = on ?
+--			aniState->iniDef.m1ThreshLowExt : m1ThreshLowExt_off;
+--		m2ThreshLowExt = on ?
+--			aniState->iniDef.m2ThreshLowExt : m2ThreshLowExt_off;
+--		m1ThreshExt = on ?
+--			aniState->iniDef.m1ThreshExt : m1ThreshExt_off;
+--		m2ThreshExt = on ?
+--			aniState->iniDef.m2ThreshExt : m2ThreshExt_off;
+--
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
+--			      AR_PHY_SFCORR_LOW_M1_THRESH_LOW,
+--			      m1ThreshLow);
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
+--			      AR_PHY_SFCORR_LOW_M2_THRESH_LOW,
+--			      m2ThreshLow);
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR,
+--			      AR_PHY_SFCORR_M1_THRESH,
+--			      m1Thresh);
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR,
+--			      AR_PHY_SFCORR_M2_THRESH,
+--			      m2Thresh);
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR,
+--			      AR_PHY_SFCORR_M2COUNT_THR,
+--			      m2CountThr);
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
+--			      AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW,
+--			      m2CountThrLow);
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
+--			      AR_PHY_SFCORR_EXT_M1_THRESH_LOW,
+--			      m1ThreshLowExt);
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
+--			      AR_PHY_SFCORR_EXT_M2_THRESH_LOW,
+--			      m2ThreshLowExt);
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
+--			      AR_PHY_SFCORR_EXT_M1_THRESH,
+--			      m1ThreshExt);
+--		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
+--			      AR_PHY_SFCORR_EXT_M2_THRESH,
+--			      m2ThreshExt);
+--skip_ws_det:
+- 		if (on)
+- 			REG_SET_BIT(ah, AR_PHY_SFCORR_LOW,
+- 				    AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
+diff --git a/package/kernel/mac80211/patches/ath9k/547-ath9k_led_defstate_fix.patch b/package/kernel/mac80211/patches/ath9k/547-ath9k_led_defstate_fix.patch
+deleted file mode 100644
+index 5d84cf0c42..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/547-ath9k_led_defstate_fix.patch
++++ /dev/null
+@@ -1,29 +0,0 @@
+-From: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
+-Date: Sun, 31 Jan 2016 20:48:49 +0100
+-Subject: [PATCH v4 2/8] mac80211: ath9k: set default state for platform LEDs
+-
+-Support default state for platform LEDs connected to ath9k device.
+-Now LEDs are correctly set on or off at ath9k module initialization.
+-Very useful if power LED is connected to wireless chip.
+-
+-Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
+----
+- gpio.c |    7 +++++--
+- 1 file changed, 5 insertions(+), 2 deletions(-)
+-
+---- a/drivers/net/wireless/ath/ath9k/gpio.c
+-+++ b/drivers/net/wireless/ath/ath9k/gpio.c
+-@@ -74,8 +74,11 @@ static int ath_add_led(struct ath_softc
+- 	ath9k_hw_gpio_request_out(sc->sc_ah, gpio->gpio, gpio->name,
+- 				  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
+- 
+--	/* LED off */
+--	ath9k_hw_set_gpio(sc->sc_ah, gpio->gpio, gpio->active_low);
+-+	/* Set default LED state */
+-+	if (gpio->default_state == LEDS_GPIO_DEFSTATE_ON)
+-+		ath9k_hw_set_gpio(sc->sc_ah, gpio->gpio, !gpio->active_low);
+-+	else
+-+		ath9k_hw_set_gpio(sc->sc_ah, gpio->gpio, gpio->active_low);
+- 
+- 	return 0;
+- }
+diff --git a/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch b/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch
+deleted file mode 100644
+index 78206d2860..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch
++++ /dev/null
+@@ -1,251 +0,0 @@
+-From: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
+-Date: Sun, 31 Jan 2016 21:01:31 +0100
+-Subject: [PATCH v4 4/8] mac80211: ath9k: enable access to GPIO
+-
+-Enable access to GPIO chip and its pins for Atheros AR92xx
+-wireless devices. For now AR9285 and AR9287 are supported.
+-
+-Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+---- a/drivers/net/wireless/ath/ath9k/ath9k.h
+-+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
+-@@ -24,6 +24,7 @@
+- #include <linux/completion.h>
+- #include <linux/time.h>
+- #include <linux/hw_random.h>
+-+#include <linux/gpio/driver.h>
+- 
+- #include "common.h"
+- #include "debug.h"
+-@@ -989,6 +990,14 @@ struct ath_led {
+- 	struct led_classdev cdev;
+- };
+- 
+-+#ifdef CONFIG_GPIOLIB
+-+struct ath9k_gpio_chip {
+-+	struct ath_softc *sc;
+-+	char label[32];
+-+	struct gpio_chip gchip;
+-+};
+-+#endif
+-+
+- struct ath_softc {
+- 	struct ieee80211_hw *hw;
+- 	struct device *dev;
+-@@ -1044,6 +1053,9 @@ struct ath_softc {
+- #ifdef CPTCFG_MAC80211_LEDS
+- 	const char *led_default_trigger;
+- 	struct list_head leds;
+-+#ifdef CONFIG_GPIOLIB
+-+	struct ath9k_gpio_chip *gpiochip;
+-+#endif
+- #endif
+- 
+- #ifdef CPTCFG_ATH9K_DEBUGFS
+---- a/drivers/net/wireless/ath/ath9k/gpio.c
+-+++ b/drivers/net/wireless/ath/ath9k/gpio.c
+-@@ -16,13 +16,139 @@
+- 
+- #include "ath9k.h"
+- #include <linux/ath9k_platform.h>
+-+#include <linux/gpio.h>
+-+
+-+#ifdef CPTCFG_MAC80211_LEDS
+-+
+-+#ifdef CONFIG_GPIOLIB
+-+
+-+/***************/
+-+/*  GPIO Chip  */
+-+/***************/
+-+
+-+/* gpio_chip handler : set GPIO to input */
+-+static int ath9k_gpio_pin_cfg_input(struct gpio_chip *chip, unsigned offset)
+-+{
+-+	struct ath9k_gpio_chip *gc = container_of(chip, struct ath9k_gpio_chip,
+-+						  gchip);
+-+
+-+	ath9k_hw_gpio_request_in(gc->sc->sc_ah, offset, "ath9k-gpio");
+-+
+-+	return 0;
+-+}
+-+
+-+/* gpio_chip handler : set GPIO to output */
+-+static int ath9k_gpio_pin_cfg_output(struct gpio_chip *chip, unsigned offset,
+-+				     int value)
+-+{
+-+	struct ath9k_gpio_chip *gc = container_of(chip, struct ath9k_gpio_chip,
+-+						  gchip);
+-+
+-+	ath9k_hw_gpio_request_out(gc->sc->sc_ah, offset, "ath9k-gpio",
+-+				  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
+-+	ath9k_hw_set_gpio(gc->sc->sc_ah, offset, value);
+-+
+-+	return 0;
+-+}
+-+
+-+/* gpio_chip handler : query GPIO direction (0=out, 1=in) */
+-+static int ath9k_gpio_pin_get_dir(struct gpio_chip *chip, unsigned offset)
+-+{
+-+	struct ath9k_gpio_chip *gc = container_of(chip, struct ath9k_gpio_chip,
+-+						  gchip);
+-+	struct ath_hw *ah = gc->sc->sc_ah;
+-+
+-+	return !((REG_READ(ah, AR_GPIO_OE_OUT) >> (offset * 2)) & 3);
+-+}
+-+
+-+/* gpio_chip handler : get GPIO pin value */
+-+static int ath9k_gpio_pin_get(struct gpio_chip *chip, unsigned offset)
+-+{
+-+	struct ath9k_gpio_chip *gc = container_of(chip, struct ath9k_gpio_chip,
+-+						  gchip);
+-+
+-+	return ath9k_hw_gpio_get(gc->sc->sc_ah, offset);
+-+}
+-+
+-+/* gpio_chip handler : set GPIO pin to value */
+-+static void ath9k_gpio_pin_set(struct gpio_chip *chip, unsigned offset,
+-+			       int value)
+-+{
+-+	struct ath9k_gpio_chip *gc = container_of(chip, struct ath9k_gpio_chip,
+-+						  gchip);
+-+
+-+	ath9k_hw_set_gpio(gc->sc->sc_ah, offset, value);
+-+}
+-+
+-+/* register GPIO chip */
+-+static void ath9k_register_gpio_chip(struct ath_softc *sc)
+-+{
+-+	struct ath9k_gpio_chip *gc;
+-+	struct ath_hw *ah = sc->sc_ah;
+-+
+-+	gc = kzalloc(sizeof(struct ath9k_gpio_chip), GFP_KERNEL);
+-+	if (!gc)
+-+		return;
+-+
+-+	gc->sc = sc;
+-+	snprintf(gc->label, sizeof(gc->label), "ath9k-%s",
+-+		 wiphy_name(sc->hw->wiphy));
+-+#ifdef CONFIG_OF
+-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,5,0)
+-+	gc->gchip.parent = sc->dev;
+-+#else
+-+	gc->gchip.dev = sc->dev;
+-+#endif
+-+#endif
+-+	gc->gchip.label = gc->label;
+-+	gc->gchip.base = -1;	/* determine base automatically */
+-+	gc->gchip.ngpio = ah->caps.num_gpio_pins;
+-+	gc->gchip.direction_input = ath9k_gpio_pin_cfg_input;
+-+	gc->gchip.direction_output = ath9k_gpio_pin_cfg_output;
+-+	gc->gchip.get_direction = ath9k_gpio_pin_get_dir;
+-+	gc->gchip.get = ath9k_gpio_pin_get;
+-+	gc->gchip.set = ath9k_gpio_pin_set;
+-+
+-+	if (gpiochip_add(&gc->gchip)) {
+-+		kfree(gc);
+-+		return;
+-+	}
+-+
+-+#ifdef CONFIG_OF
+-+	gc->gchip.owner = NULL;
+-+#endif
+-+	sc->gpiochip = gc;
+-+}
+-+
+-+/* remove GPIO chip */
+-+static void ath9k_unregister_gpio_chip(struct ath_softc *sc)
+-+{
+-+	struct ath9k_gpio_chip *gc = sc->gpiochip;
+-+
+-+	if (!gc)
+-+		return;
+-+
+-+	gpiochip_remove(&gc->gchip);
+-+	kfree(gc);
+-+	sc->gpiochip = NULL;
+-+}
+-+
+-+#else /* CONFIG_GPIOLIB */
+-+
+-+static inline void ath9k_register_gpio_chip(struct ath_softc *sc)
+-+{
+-+}
+-+
+-+static inline void ath9k_unregister_gpio_chip(struct ath_softc *sc)
+-+{
+-+}
+-+
+-+#endif /* CONFIG_GPIOLIB */
+- 
+- /********************************/
+- /*	 LED functions		*/
+- /********************************/
+- 
+--#ifdef CPTCFG_MAC80211_LEDS
+--
+- static void ath_fill_led_pin(struct ath_softc *sc)
+- {
+- 	struct ath_hw *ah = sc->sc_ah;
+-@@ -80,6 +206,12 @@ static int ath_add_led(struct ath_softc
+- 	else
+- 		ath9k_hw_set_gpio(sc->sc_ah, gpio->gpio, gpio->active_low);
+- 
+-+#ifdef CONFIG_GPIOLIB
+-+	/* If there is GPIO chip configured, reserve LED pin */
+-+	if (sc->gpiochip)
+-+		gpio_request(sc->gpiochip->gchip.base + gpio->gpio, gpio->name);
+-+#endif
+-+
+- 	return 0;
+- }
+- 
+-@@ -136,17 +268,24 @@ void ath_deinit_leds(struct ath_softc *s
+- 
+- 	while (!list_empty(&sc->leds)) {
+- 		led = list_first_entry(&sc->leds, struct ath_led, list);
+-+#ifdef CONFIG_GPIOLIB
+-+		/* If there is GPIO chip configured, free LED pin */
+-+		if (sc->gpiochip)
+-+			gpio_free(sc->gpiochip->gchip.base + led->gpio->gpio);
+-+#endif
+- 		list_del(&led->list);
+- 		ath_led_brightness(&led->cdev, LED_OFF);
+- 		led_classdev_unregister(&led->cdev);
+- 		ath9k_hw_gpio_free(sc->sc_ah, led->gpio->gpio);
+- 		kfree(led);
+- 	}
+-+	ath9k_unregister_gpio_chip(sc);
+- }
+- 
+- void ath_init_leds(struct ath_softc *sc)
+- {
+- 	struct ath9k_platform_data *pdata = sc->dev->platform_data;
+-+	struct device_node *np = sc->dev->of_node;
+- 	char led_name[32];
+- 	const char *trigger;
+- 	int i;
+-@@ -156,6 +295,15 @@ void ath_init_leds(struct ath_softc *sc)
+- 	if (AR_SREV_9100(sc->sc_ah))
+- 		return;
+- 
+-+	if (!np)
+-+		ath9k_register_gpio_chip(sc);
+-+
+-+	/* setup gpio controller only if requested and skip the led_pin setup */
+-+	if (of_property_read_bool(np, "gpio-controller")) {
+-+		ath9k_register_gpio_chip(sc);
+-+		return;
+-+	}
+-+
+- 	ath_fill_led_pin(sc);
+- 
+- 	if (pdata && pdata->leds && pdata->num_leds)
+-@@ -180,6 +328,7 @@ void ath_init_leds(struct ath_softc *sc)
+- 	ath_create_gpio_led(sc, sc->sc_ah->led_pin, led_name, trigger,
+- 			   !sc->sc_ah->config.led_active_high);
+- }
+-+
+- #endif
+- 
+- /*******************/
+diff --git a/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch b/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
+deleted file mode 100644
+index 716e09f351..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
++++ /dev/null
+@@ -1,143 +0,0 @@
+-From: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
+-Subject: [PATCH v5 5/8] mac80211: ath9k: enable GPIO buttons
+-
+-Enable platform-defined GPIO button support for ath9k device.
+-Key poller is activated for attached platform buttons.
+-Requires ath9k GPIO chip access.
+-
+-Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+---- a/drivers/net/wireless/ath/ath9k/ath9k.h
+-+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
+-@@ -1055,6 +1055,7 @@ struct ath_softc {
+- 	struct list_head leds;
+- #ifdef CONFIG_GPIOLIB
+- 	struct ath9k_gpio_chip *gpiochip;
+-+	struct platform_device *btnpdev;	/* gpio-keys-polled */
+- #endif
+- #endif
+- 
+---- a/drivers/net/wireless/ath/ath9k/gpio.c
+-+++ b/drivers/net/wireless/ath/ath9k/gpio.c
+-@@ -17,6 +17,8 @@
+- #include "ath9k.h"
+- #include <linux/ath9k_platform.h>
+- #include <linux/gpio.h>
+-+#include <linux/platform_device.h>
+-+#include <linux/gpio_keys.h>
+- 
+- #ifdef CPTCFG_MAC80211_LEDS
+- 
+-@@ -133,6 +135,67 @@ static void ath9k_unregister_gpio_chip(s
+- 	sc->gpiochip = NULL;
+- }
+- 
+-+/******************/
+-+/*  GPIO Buttons  */
+-+/******************/
+-+
+-+/* add GPIO buttons */
+-+static void ath9k_init_buttons(struct ath_softc *sc)
+-+{
+-+	struct ath9k_platform_data *pdata = sc->dev->platform_data;
+-+	struct platform_device *pdev;
+-+	struct gpio_keys_platform_data gkpdata;
+-+	struct gpio_keys_button *bt;
+-+	int i;
+-+
+-+	if (!sc->gpiochip)
+-+		return;
+-+
+-+	if (!pdata || !pdata->btns || !pdata->num_btns)
+-+		return;
+-+
+-+	bt = devm_kmemdup(sc->dev, pdata->btns,
+-+			  pdata->num_btns * sizeof(struct gpio_keys_button),
+-+			  GFP_KERNEL);
+-+	if (!bt)
+-+		return;
+-+
+-+	for (i = 0; i < pdata->num_btns; i++) {
+-+		if (pdata->btns[i].gpio == sc->sc_ah->led_pin)
+-+				sc->sc_ah->led_pin = -1;
+-+
+-+		ath9k_hw_gpio_request_in(sc->sc_ah, pdata->btns[i].gpio,
+-+					 "ath9k-gpio");
+-+		bt[i].gpio = sc->gpiochip->gchip.base + pdata->btns[i].gpio;
+-+	}
+-+
+-+	memset(&gkpdata, 0, sizeof(struct gpio_keys_platform_data));
+-+	gkpdata.buttons = bt;
+-+	gkpdata.nbuttons = pdata->num_btns;
+-+	gkpdata.poll_interval = pdata->btn_poll_interval;
+-+
+-+	pdev = platform_device_register_data(sc->dev, "gpio-keys-polled",
+-+					     PLATFORM_DEVID_AUTO, &gkpdata,
+-+					     sizeof(gkpdata));
+-+	if (!IS_ERR_OR_NULL(pdev))
+-+		sc->btnpdev = pdev;
+-+	else {
+-+		sc->btnpdev = NULL;
+-+		devm_kfree(sc->dev, bt);
+-+	}
+-+}
+-+
+-+/* remove GPIO buttons */
+-+static void ath9k_deinit_buttons(struct ath_softc *sc)
+-+{
+-+	if (!sc->gpiochip || !sc->btnpdev)
+-+		return;
+-+
+-+	platform_device_unregister(sc->btnpdev);
+-+
+-+	sc->btnpdev = NULL;
+-+}
+-+
+- #else /* CONFIG_GPIOLIB */
+- 
+- static inline void ath9k_register_gpio_chip(struct ath_softc *sc)
+-@@ -143,6 +206,14 @@ static inline void ath9k_unregister_gpio
+- {
+- }
+- 
+-+static inline void ath9k_init_buttons(struct ath_softc *sc)
+-+{
+-+}
+-+
+-+static inline void ath9k_deinit_buttons(struct ath_softc *sc)
+-+{
+-+}
+-+
+- #endif /* CONFIG_GPIOLIB */
+- 
+- /********************************/
+-@@ -266,6 +337,7 @@ void ath_deinit_leds(struct ath_softc *s
+- {
+- 	struct ath_led *led;
+- 
+-+	ath9k_deinit_buttons(sc);
+- 	while (!list_empty(&sc->leds)) {
+- 		led = list_first_entry(&sc->leds, struct ath_led, list);
+- #ifdef CONFIG_GPIOLIB
+-@@ -305,6 +377,7 @@ void ath_init_leds(struct ath_softc *sc)
+- 	}
+- 
+- 	ath_fill_led_pin(sc);
+-+	ath9k_init_buttons(sc);
+- 
+- 	if (pdata && pdata->leds && pdata->num_leds)
+- 		for (i = 0; i < pdata->num_leds; i++) {
+---- a/include/linux/ath9k_platform.h
+-+++ b/include/linux/ath9k_platform.h
+-@@ -49,6 +49,10 @@ struct ath9k_platform_data {
+- 
+- 	int num_leds;
+- 	const struct gpio_led *leds;
+-+
+-+	unsigned num_btns;
+-+	const struct gpio_keys_button *btns;
+-+	unsigned btn_poll_interval;
+- };
+- 
+- #endif /* _LINUX_ATH9K_PLATFORM_H */
+diff --git a/package/kernel/mac80211/patches/ath9k/551-ath9k_ubnt_uap_plus_hsr.patch b/package/kernel/mac80211/patches/ath9k/551-ath9k_ubnt_uap_plus_hsr.patch
+deleted file mode 100644
+index efc4b9187c..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/551-ath9k_ubnt_uap_plus_hsr.patch
++++ /dev/null
+@@ -1,403 +0,0 @@
+---- a/drivers/net/wireless/ath/ath9k/channel.c
+-+++ b/drivers/net/wireless/ath/ath9k/channel.c
+-@@ -15,6 +15,7 @@
+-  */
+- 
+- #include "ath9k.h"
+-+#include "hsr.h"
+- 
+- /* Set/change channels.  If the channel is really being changed, it's done
+-  * by reseting the chip.  To accomplish this we must first cleanup any pending
+-@@ -22,6 +23,7 @@
+-  */
+- static int ath_set_channel(struct ath_softc *sc)
+- {
+-+	struct device_node *np = sc->dev->of_node;
+- 	struct ath_hw *ah = sc->sc_ah;
+- 	struct ath_common *common = ath9k_hw_common(ah);
+- 	struct ieee80211_hw *hw = sc->hw;
+-@@ -42,6 +44,11 @@ static int ath_set_channel(struct ath_so
+- 	ath_dbg(common, CONFIG, "Set channel: %d MHz width: %d\n",
+- 		chan->center_freq, chandef->width);
+- 
+-+	if (of_property_read_bool(np, "ubnt,hsr")) {
+-+		ath9k_hsr_enable(ah, chandef->width, chan->center_freq);
+-+		ath9k_hsr_status(ah);
+-+	}
+-+
+- 	/* update survey stats for the old channel before switching */
+- 	spin_lock_irqsave(&common->cc_lock, flags);
+- 	ath_update_survey_stats(sc);
+---- /dev/null
+-+++ b/drivers/net/wireless/ath/ath9k/hsr.c
+-@@ -0,0 +1,247 @@
+-+/*
+-+ *
+-+ * The MIT License (MIT)
+-+ *
+-+ * Copyright (c) 2015 Kirill Berezin
+-+ *
+-+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+-+ * of this software and associated documentation files (the "Software"), to deal
+-+ * in the Software without restriction, including without limitation the rights
+-+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+-+ * copies of the Software, and to permit persons to whom the Software is
+-+ * furnished to do so, subject to the following conditions:
+-+ *
+-+ * The above copyright notice and this permission notice shall be included in
+-+ * all copies or substantial portions of the Software.
+-+ *
+-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+-+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+-+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+-+ * SOFTWARE.
+-+ *
+-+ */
+-+
+-+#include <linux/io.h>
+-+#include <linux/slab.h>
+-+#include <linux/module.h>
+-+#include <linux/time.h>
+-+#include <linux/bitops.h>
+-+#include <linux/etherdevice.h>
+-+#include <linux/rtnetlink.h>
+-+#include <asm/unaligned.h>
+-+
+-+#include "hw.h"
+-+#include "ath9k.h"
+-+
+-+#define HSR_GPIO_CSN 8
+-+#define HSR_GPIO_CLK 6
+-+#define HSR_GPIO_DOUT 7
+-+#define HSR_GPIO_DIN 5
+-+
+-+/* delays are in useconds */
+-+#define HSR_DELAY_HALF_TICK 100
+-+#define HSR_DELAY_PRE_WRITE 75
+-+#define HSR_DELAY_FINAL 20000
+-+#define HSR_DELAY_TRAILING 200
+-+
+-+void ath9k_hsr_init(struct ath_hw *ah)
+-+{
+-+	ath9k_hw_gpio_request_in(ah, HSR_GPIO_DIN, NULL);
+-+	ath9k_hw_gpio_request_out(ah, HSR_GPIO_CSN, NULL,
+-+				  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
+-+	ath9k_hw_gpio_request_out(ah, HSR_GPIO_CLK, NULL,
+-+				  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
+-+	ath9k_hw_gpio_request_out(ah, HSR_GPIO_DOUT, NULL,
+-+				  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
+-+
+-+	ath9k_hw_set_gpio(ah, HSR_GPIO_CSN, 1);
+-+	ath9k_hw_set_gpio(ah, HSR_GPIO_CLK, 0);
+-+	ath9k_hw_set_gpio(ah, HSR_GPIO_DOUT, 0);
+-+
+-+	udelay(HSR_DELAY_TRAILING);
+-+}
+-+
+-+static u32 ath9k_hsr_write_byte(struct ath_hw *ah, int delay, u32 value)
+-+{
+-+	struct ath_common *common = ath9k_hw_common(ah);
+-+	int i;
+-+	u32 rval = 0;
+-+
+-+	udelay(delay);
+-+
+-+	ath9k_hw_set_gpio(ah, HSR_GPIO_CLK, 0);
+-+	udelay(HSR_DELAY_HALF_TICK);
+-+
+-+	ath9k_hw_set_gpio(ah, HSR_GPIO_CSN, 0);
+-+	udelay(HSR_DELAY_HALF_TICK);
+-+
+-+	for (i = 0; i < 8; ++i) {
+-+		rval = rval << 1;
+-+
+-+		/* pattern is left to right, that is 7-th bit runs first */
+-+		ath9k_hw_set_gpio(ah, HSR_GPIO_DOUT, (value >> (7 - i)) & 0x1);
+-+		udelay(HSR_DELAY_HALF_TICK);
+-+
+-+		ath9k_hw_set_gpio(ah, HSR_GPIO_CLK, 1);
+-+		udelay(HSR_DELAY_HALF_TICK);
+-+
+-+		rval |= ath9k_hw_gpio_get(ah, HSR_GPIO_DIN);
+-+
+-+		ath9k_hw_set_gpio(ah, HSR_GPIO_CLK, 0);
+-+		udelay(HSR_DELAY_HALF_TICK);
+-+	}
+-+
+-+	ath9k_hw_set_gpio(ah, HSR_GPIO_CSN, 1);
+-+	udelay(HSR_DELAY_HALF_TICK);
+-+
+-+	ath_dbg(common, CONFIG, "ath9k_hsr_write_byte: write byte %d return value is %d %c\n",
+-+		value, rval, rval > 32 ? rval : '-');
+-+
+-+	return rval & 0xff;
+-+}
+-+
+-+static int ath9k_hsr_write_a_chain(struct ath_hw *ah, char *chain, int items)
+-+{
+-+	int status = 0;
+-+	int i = 0;
+-+	int err;
+-+
+-+	/* a preamble */
+-+	ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, 0);
+-+	status = ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, 0);
+-+
+-+	/* clear HSR's reply buffer */
+-+	if (status) {
+-+		int loop = 0;
+-+
+-+		for (loop = 0; (loop < 42) && status; ++loop)
+-+			status = ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE,
+-+						      0);
+-+
+-+		if (loop >= 42) {
+-+			ATH_DBG_WARN(1,
+-+				     "ath9k_hsr_write_a_chain: can't clear an output buffer after a 42 cycles.\n");
+-+			return -1;
+-+		}
+-+	}
+-+
+-+	for (i = 0; (i < items) && (chain[i] != 0); ++i)
+-+		ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, (u32)chain[i]);
+-+
+-+	ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, 0);
+-+	mdelay(HSR_DELAY_FINAL / 1000);
+-+
+-+	/* reply */
+-+	memset(chain, 0, items);
+-+
+-+	ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, 0);
+-+	udelay(HSR_DELAY_TRAILING);
+-+
+-+	for (i = 0; i < (items - 1); ++i) {
+-+		u32 ret;
+-+
+-+		ret = ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, 0);
+-+		if (ret != 0)
+-+			chain[i] = (char)ret;
+-+		else
+-+			break;
+-+
+-+		udelay(HSR_DELAY_TRAILING);
+-+	}
+-+
+-+	if (i <= 1)
+-+		return 0;
+-+
+-+	err = kstrtoint(chain + 1, 10, &i);
+-+	if (err)
+-+		return err;
+-+
+-+	return i;
+-+}
+-+
+-+int ath9k_hsr_disable(struct ath_hw *ah)
+-+{
+-+	char cmd[10] = {'b', '4', '0', 0, 0, 0, 0, 0, 0, 0};
+-+	int ret;
+-+
+-+	ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
+-+	if ((ret > 0) && (*cmd == 'B'))
+-+		return 0;
+-+
+-+	return -1;
+-+}
+-+
+-+int ath9k_hsr_enable(struct ath_hw *ah, int bw, int fq)
+-+{
+-+	char cmd[10];
+-+	int ret;
+-+
+-+	/* Bandwidth argument is 0 sometimes. Assume default 802.11bgn
+-+	 * 20MHz on invalid values
+-+	 */
+-+	if ((bw != 5) && (bw != 10) && (bw != 20) && (bw != 40))
+-+		bw = 20;
+-+
+-+	memset(cmd, 0, sizeof(cmd));
+-+	*cmd = 'b';
+-+	snprintf(cmd + 1, 3, "%02d", bw);
+-+
+-+	ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
+-+	if ((*cmd != 'B') || (ret != bw)) {
+-+		ATH_DBG_WARN(1,
+-+			     "ath9k_hsr_enable: failed changing bandwidth -> set (%d,%d) reply (%d, %d)\n",
+-+			     'b', bw, *cmd, ret);
+-+		return -1;
+-+	}
+-+
+-+	memset(cmd, 0, sizeof(cmd));
+-+	*cmd = 'x';
+-+	ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
+-+	if (*cmd != 'X') {
+-+		ATH_DBG_WARN(1,
+-+			     "ath9k_hsr_enable: failed 'x' command -> reply (%d, %d)\n",
+-+			     *cmd, ret);
+-+		return -1;
+-+	}
+-+
+-+	memset(cmd, 0, sizeof(cmd));
+-+	*cmd = 'm';
+-+	ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
+-+	if (*cmd != 'M') {
+-+		ATH_DBG_WARN(1,
+-+			     "ath9k_hsr_enable: failed 'm' command -> reply (%d, %d)\n",
+-+			     *cmd, ret);
+-+		return  -1;
+-+	}
+-+
+-+	memset(cmd, 0, sizeof(cmd));
+-+	*cmd = 'f';
+-+	snprintf(cmd + 1, 6, "%05d", fq);
+-+	ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
+-+	if ((*cmd != 'F') && (ret != fq)) {
+-+		ATH_DBG_WARN(1,
+-+			     "ath9k_hsr_enable: failed set frequency -> reply (%d, %d)\n",
+-+			     *cmd, ret);
+-+		return -1;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+int ath9k_hsr_status(struct ath_hw *ah)
+-+{
+-+	char cmd[10] = {'s', 0, 0, 0, 0, 0, 0, 0, 0, 0};
+-+	int ret;
+-+
+-+	ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
+-+	if (*cmd != 'S') {
+-+		ATH_DBG_WARN(1, "ath9k_hsr_status: returned %d,%d\n", *cmd,
+-+			     ret);
+-+		return -1;
+-+	}
+-+
+-+	return 0;
+-+}
+---- /dev/null
+-+++ b/drivers/net/wireless/ath/ath9k/hsr.h
+-@@ -0,0 +1,48 @@
+-+/*
+-+ * The MIT License (MIT)
+-+ *
+-+ * Copyright (c) 2015 Kirill Berezin
+-+ *
+-+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+-+ * of this software and associated documentation files (the "Software"), to deal
+-+ * in the Software without restriction, including without limitation the rights
+-+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+-+ * copies of the Software, and to permit persons to whom the Software is
+-+ * furnished to do so, subject to the following conditions:
+-+ *
+-+ * The above copyright notice and this permission notice shall be included in
+-+ * all copies or substantial portions of the Software.
+-+ *
+-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+-+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+-+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+-+ * SOFTWARE.
+-+ */
+-+
+-+#ifndef HSR_H
+-+#define HSR_H
+-+
+-+#ifdef CPTCFG_ATH9K_UBNTHSR
+-+
+-+void ath9k_hsr_init(struct ath_hw *ah);
+-+int ath9k_hsr_disable(struct ath_hw *ah);
+-+int ath9k_hsr_enable(struct ath_hw *ah, int bw, int fq);
+-+int ath9k_hsr_status(struct ath_hw *ah);
+-+
+-+#else
+-+static inline void ath9k_hsr_init(struct ath_hw *ah) {}
+-+
+-+static inline int ath9k_hsr_enable(struct ath_hw *ah, int bw, int fq)
+-+{
+-+	return 0;
+-+}
+-+
+-+static inline int ath9k_hsr_disable(struct ath_hw *ah) { return 0; }
+-+static inline int ath9k_hsr_status(struct ath_hw *ah) { return 0; }
+-+
+-+#endif
+-+
+-+#endif /* HSR_H */
+---- a/drivers/net/wireless/ath/ath9k/main.c
+-+++ b/drivers/net/wireless/ath/ath9k/main.c
+-@@ -18,6 +18,7 @@
+- #include <linux/delay.h>
+- #include "ath9k.h"
+- #include "btcoex.h"
+-+#include "hsr.h"
+- 
+- static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
+- 			u32 queues, bool drop);
+-@@ -659,6 +660,7 @@ void ath_reset_work(struct work_struct *
+- static int ath9k_start(struct ieee80211_hw *hw)
+- {
+- 	struct ath_softc *sc = hw->priv;
+-+	struct device_node *np = sc->dev->of_node;
+- 	struct ath_hw *ah = sc->sc_ah;
+- 	struct ath_common *common = ath9k_hw_common(ah);
+- 	struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
+-@@ -737,6 +739,11 @@ static int ath9k_start(struct ieee80211_
+- 					  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
+- 	}
+- 
+-+	if (of_property_read_bool(np, "ubnt,hsr")) {
+-+		ath9k_hsr_init(ah);
+-+		ath9k_hsr_disable(ah);
+-+	}
+-+
+- 	/*
+- 	 * Reset key cache to sane defaults (all entries cleared) instead of
+- 	 * semi-random values after suspend/resume.
+---- a/drivers/net/wireless/ath/ath9k/Makefile
+-+++ b/drivers/net/wireless/ath/ath9k/Makefile
+-@@ -17,6 +17,7 @@ ath9k-$(CPTCFG_ATH9K_DFS_CERTIFIED) += d
+- ath9k-$(CPTCFG_ATH9K_TX99) += tx99.o
+- ath9k-$(CPTCFG_ATH9K_WOW) += wow.o
+- ath9k-$(CPTCFG_ATH9K_HWRNG) += rng.o
+-+ath9k-$(CPTCFG_ATH9K_UBNTHSR) += hsr.o
+- 
+- ath9k-$(CPTCFG_ATH9K_DEBUGFS) += debug.o
+- 
+---- a/local-symbols
+-+++ b/local-symbols
+-@@ -129,6 +129,7 @@ ATH9K_WOW=
+- ATH9K_RFKILL=
+- ATH9K_CHANNEL_CONTEXT=
+- ATH9K_PCOEM=
+-+ATH9K_UBNTHSR=
+- ATH9K_PCI_NO_EEPROM=
+- ATH9K_HTC=
+- ATH9K_HTC_DEBUGFS=
+---- a/drivers/net/wireless/ath/ath9k/Kconfig
+-+++ b/drivers/net/wireless/ath/ath9k/Kconfig
+-@@ -58,6 +58,19 @@ config ATH9K_AHB
+- 	  Say Y, if you have a SoC with a compatible built-in
+- 	  wireless MAC. Say N if unsure.
+- 
+-+config ATH9K_UBNTHSR
+-+	bool "Ubiquiti UniFi Outdoor Plus HSR support"
+-+	depends on ATH9K
+-+	---help---
+-+	  This options enables code to control the HSR RF
+-+	  filter in the receive path of the Ubiquiti UniFi
+-+	  Outdoor Plus access point.
+-+
+-+	  Say Y if you want to use the access point. The
+-+	  code will only be used if the device is detected,
+-+	  so it does not harm other setup other than occupying
+-+	  a bit of memory.
+-+
+- config ATH9K_DEBUGFS
+- 	bool "Atheros ath9k debugging"
+- 	depends on ATH9K && DEBUG_FS
+diff --git a/package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch b/package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch
+deleted file mode 100644
+index 57eef54e89..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch
++++ /dev/null
+@@ -1,331 +0,0 @@
+---- a/drivers/net/wireless/ath/ath9k/ahb.c
+-+++ b/drivers/net/wireless/ath/ath9k/ahb.c
+-@@ -20,7 +20,15 @@
+- #include <linux/platform_device.h>
+- #include <linux/module.h>
+- #include <linux/mod_devicetable.h>
+-+#include <linux/of_device.h>
+- #include "ath9k.h"
+-+#include <linux/ath9k_platform.h>
+-+
+-+#ifdef CONFIG_OF
+-+#include <asm/mach-ath79/ath79.h>
+-+#include <asm/mach-ath79/ar71xx_regs.h>
+-+#include <linux/mtd/mtd.h>
+-+#endif
+- 
+- static const struct platform_device_id ath9k_platform_id_table[] = {
+- 	{
+-@@ -69,6 +77,236 @@ static const struct ath_bus_ops ath_ahb_
+- 	.eeprom_read = ath_ahb_eeprom_read,
+- };
+- 
+-+#ifdef CONFIG_OF
+-+
+-+#define QCA955X_DDR_CTL_CONFIG          0x108
+-+#define QCA955X_DDR_CTL_CONFIG_ACT_WMAC BIT(23)
+-+
+-+static int of_get_wifi_cal(struct device_node *np, struct ath9k_platform_data *pdata)
+-+{
+-+#ifdef CONFIG_MTD
+-+	struct device_node *mtd_np = NULL;
+-+	size_t retlen;
+-+	int size, ret;
+-+	struct mtd_info *mtd;
+-+	const char *part;
+-+	const __be32 *list;
+-+	phandle phandle;
+-+
+-+	list = of_get_property(np, "mtd-cal-data", &size);
+-+	if (!list)
+-+		return 0;
+-+
+-+	if (size != (2 * sizeof(*list)))
+-+		return 1;
+-+
+-+	phandle = be32_to_cpup(list++);
+-+	if (phandle)
+-+		mtd_np = of_find_node_by_phandle(phandle);
+-+
+-+	if (!mtd_np)
+-+		return 1;
+-+
+-+	part = of_get_property(mtd_np, "label", NULL);
+-+	if (!part)
+-+		part = mtd_np->name;
+-+
+-+	mtd = get_mtd_device_nm(part);
+-+	if (IS_ERR(mtd))
+-+		return 1;
+-+
+-+	ret = mtd_read(mtd, be32_to_cpup(list), sizeof(pdata->eeprom_data),
+-+			&retlen, (u8*)pdata->eeprom_data);
+-+	put_mtd_device(mtd);
+-+
+-+#endif
+-+	return 0;
+-+}
+-+
+-+static int ar913x_wmac_reset(void)
+-+{
+-+	ath79_device_reset_set(AR913X_RESET_AMBA2WMAC);
+-+	mdelay(10);
+-+
+-+	ath79_device_reset_clear(AR913X_RESET_AMBA2WMAC);
+-+	mdelay(10);
+-+
+-+	return 0;
+-+}
+-+
+-+static int ar933x_wmac_reset(void)
+-+{
+-+	int retries = 20;
+-+
+-+	ath79_device_reset_set(AR933X_RESET_WMAC);
+-+	ath79_device_reset_clear(AR933X_RESET_WMAC);
+-+
+-+	while (1) {
+-+		u32 bootstrap;
+-+
+-+		bootstrap = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
+-+		if ((bootstrap & AR933X_BOOTSTRAP_EEPBUSY) == 0)
+-+			return 0;
+-+
+-+		if (retries-- == 0)
+-+			break;
+-+
+-+		udelay(10000);
+-+	}
+-+
+-+	pr_err("ar933x: WMAC reset timed out");
+-+	return -ETIMEDOUT;
+-+}
+-+
+-+static int qca955x_wmac_reset(void)
+-+{
+-+	int i;
+-+
+-+	/* Try to wait for WMAC DDR activity to stop */
+-+	for (i = 0; i < 10; i++) {
+-+		if (!(__raw_readl(ath79_ddr_base + QCA955X_DDR_CTL_CONFIG) &
+-+		    QCA955X_DDR_CTL_CONFIG_ACT_WMAC))
+-+			break;
+-+
+-+		udelay(10);
+-+	}
+-+
+-+	ath79_device_reset_set(QCA955X_RESET_RTC);
+-+	udelay(10);
+-+	ath79_device_reset_clear(QCA955X_RESET_RTC);
+-+	udelay(10);
+-+
+-+	return 0;
+-+}
+-+
+-+enum {
+-+	AR913X_WMAC = 0,
+-+	AR933X_WMAC,
+-+	AR934X_WMAC,
+-+	QCA953X_WMAC,
+-+	QCA955X_WMAC,
+-+	QCA956X_WMAC,
+-+};
+-+
+-+static int ar9330_get_soc_revision(void)
+-+{
+-+	if (ath79_soc_rev == 1)
+-+		return ath79_soc_rev;
+-+
+-+	return 0;
+-+}
+-+
+-+static int ath79_get_soc_revision(void)
+-+{
+-+	return ath79_soc_rev;
+-+}
+-+
+-+static const struct of_ath_ahb_data {
+-+	u16 dev_id;
+-+	u32 bootstrap_reg;
+-+	u32 bootstrap_ref;
+-+
+-+	int (*soc_revision)(void);
+-+	int (*wmac_reset)(void);
+-+} of_ath_ahb_data[] = {
+-+	[AR913X_WMAC] = {
+-+		.dev_id = AR5416_AR9100_DEVID,
+-+		.wmac_reset = ar913x_wmac_reset,
+-+
+-+	},
+-+	[AR933X_WMAC] = {
+-+		.dev_id = AR9300_DEVID_AR9330,
+-+		.bootstrap_reg = AR933X_RESET_REG_BOOTSTRAP,
+-+		.bootstrap_ref = AR933X_BOOTSTRAP_REF_CLK_40,
+-+		.soc_revision = ar9330_get_soc_revision,
+-+		.wmac_reset = ar933x_wmac_reset,
+-+	},
+-+	[AR934X_WMAC] = {
+-+		.dev_id = AR9300_DEVID_AR9340,
+-+		.bootstrap_reg = AR934X_RESET_REG_BOOTSTRAP,
+-+		.bootstrap_ref = AR934X_BOOTSTRAP_REF_CLK_40,
+-+		.soc_revision = ath79_get_soc_revision,
+-+	},
+-+	[QCA953X_WMAC] = {
+-+		.dev_id = AR9300_DEVID_AR953X,
+-+		.bootstrap_reg = QCA953X_RESET_REG_BOOTSTRAP,
+-+		.bootstrap_ref = QCA953X_BOOTSTRAP_REF_CLK_40,
+-+		.soc_revision = ath79_get_soc_revision,
+-+	},
+-+	[QCA955X_WMAC] = {
+-+		.dev_id = AR9300_DEVID_QCA955X,
+-+		.bootstrap_reg = QCA955X_RESET_REG_BOOTSTRAP,
+-+		.bootstrap_ref = QCA955X_BOOTSTRAP_REF_CLK_40,
+-+		.wmac_reset = qca955x_wmac_reset,
+-+	},
+-+	[QCA956X_WMAC] = {
+-+		.dev_id = AR9300_DEVID_QCA956X,
+-+		.bootstrap_reg = QCA956X_RESET_REG_BOOTSTRAP,
+-+		.bootstrap_ref = QCA956X_BOOTSTRAP_REF_CLK_40,
+-+		.soc_revision = ath79_get_soc_revision,
+-+	},
+-+};
+-+
+-+const struct of_device_id of_ath_ahb_match[] = {
+-+	{ .compatible = "qca,ar9130-wmac", .data = &of_ath_ahb_data[AR913X_WMAC] },
+-+	{ .compatible = "qca,ar9330-wmac", .data = &of_ath_ahb_data[AR933X_WMAC] },
+-+	{ .compatible = "qca,ar9340-wmac", .data = &of_ath_ahb_data[AR934X_WMAC] },
+-+	{ .compatible = "qca,qca9530-wmac", .data = &of_ath_ahb_data[QCA953X_WMAC] },
+-+	{ .compatible = "qca,qca9550-wmac", .data = &of_ath_ahb_data[QCA955X_WMAC] },
+-+	{ .compatible = "qca,qca9560-wmac", .data = &of_ath_ahb_data[QCA956X_WMAC] },
+-+	{},
+-+};
+-+MODULE_DEVICE_TABLE(of, of_ath_ahb_match);
+-+
+-+static int of_ath_ahb_probe(struct platform_device *pdev)
+-+{
+-+	struct ath9k_platform_data *pdata;
+-+	const struct of_device_id *match;
+-+	const struct of_ath_ahb_data *data;
+-+	u8 led_pin;
+-+
+-+	match = of_match_device(of_ath_ahb_match, &pdev->dev);
+-+	data = (const struct of_ath_ahb_data *)match->data;
+-+
+-+	pdata = dev_get_platdata(&pdev->dev);
+-+
+-+	if (!of_property_read_u8(pdev->dev.of_node, "qca,led-pin", &led_pin))
+-+		pdata->led_pin = led_pin;
+-+	else
+-+		pdata->led_pin = -1;
+-+
+-+	if (of_property_read_bool(pdev->dev.of_node, "qca,tx-gain-buffalo"))
+-+		pdata->tx_gain_buffalo = true;
+-+
+-+	if (data->wmac_reset) {
+-+		data->wmac_reset();
+-+		pdata->external_reset = data->wmac_reset;
+-+	}
+-+
+-+	if (data->dev_id == AR9300_DEVID_AR953X) {
+-+		/*
+-+		 * QCA953x only supports 25MHz refclk.
+-+		 * Some vendors have an invalid bootstrap option
+-+		 * set, which would break the WMAC here.
+-+		 */
+-+		pdata->is_clk_25mhz = true;
+-+	} else if (data->bootstrap_reg && data->bootstrap_ref) {
+-+		u32 t = ath79_reset_rr(data->bootstrap_reg);
+-+		if (t & data->bootstrap_ref)
+-+			pdata->is_clk_25mhz = false;
+-+		else
+-+			pdata->is_clk_25mhz = true;
+-+	}
+-+
+-+	pdata->get_mac_revision = data->soc_revision;
+-+
+-+	if (of_get_wifi_cal(pdev->dev.of_node, pdata))
+-+		dev_err(&pdev->dev, "failed to load calibration data from mtd device\n");
+-+
+-+	return data->dev_id;
+-+}
+-+#endif
+-+
+- static int ath_ahb_probe(struct platform_device *pdev)
+- {
+- 	void __iomem *mem;
+-@@ -80,6 +318,17 @@ static int ath_ahb_probe(struct platform
+- 	int ret = 0;
+- 	struct ath_hw *ah;
+- 	char hw_name[64];
+-+	u16 dev_id;
+-+
+-+	if (id)
+-+		dev_id = id->driver_data;
+-+
+-+#ifdef CONFIG_OF
+-+	if (pdev->dev.of_node)
+-+		pdev->dev.platform_data = devm_kzalloc(&pdev->dev,
+-+					sizeof(struct ath9k_platform_data),
+-+					GFP_KERNEL);
+-+#endif
+- 
+- 	if (!dev_get_platdata(&pdev->dev)) {
+- 		dev_err(&pdev->dev, "no platform data specified\n");
+-@@ -118,13 +367,16 @@ static int ath_ahb_probe(struct platform
+- 	sc->mem = mem;
+- 	sc->irq = irq;
+- 
+-+#ifdef CONFIG_OF
+-+	dev_id = of_ath_ahb_probe(pdev);
+-+#endif
+- 	ret = request_irq(irq, ath_isr, IRQF_SHARED, "ath9k", sc);
+- 	if (ret) {
+- 		dev_err(&pdev->dev, "request_irq failed\n");
+- 		goto err_free_hw;
+- 	}
+- 
+--	ret = ath9k_init_device(id->driver_data, sc, &ath_ahb_bus_ops);
+-+	ret = ath9k_init_device(dev_id, sc, &ath_ahb_bus_ops);
+- 	if (ret) {
+- 		dev_err(&pdev->dev, "failed to initialize device\n");
+- 		goto err_irq;
+-@@ -155,6 +407,9 @@ static int ath_ahb_remove(struct platfor
+- 		free_irq(sc->irq, sc);
+- 		ieee80211_free_hw(sc->hw);
+- 	}
+-+#ifdef CONFIG_OF
+-+	pdev->dev.platform_data = NULL;
+-+#endif
+- 
+- 	return 0;
+- }
+-@@ -164,6 +419,9 @@ static struct platform_driver ath_ahb_dr
+- 	.remove     = ath_ahb_remove,
+- 	.driver		= {
+- 		.name	= "ath9k",
+-+#ifdef CONFIG_OF
+-+		.of_match_table = of_ath_ahb_match,
+-+#endif
+- 	},
+- 	.id_table    = ath9k_platform_id_table,
+- };
+---- a/drivers/net/wireless/ath/ath9k/ath9k.h
+-+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
+-@@ -25,6 +25,7 @@
+- #include <linux/time.h>
+- #include <linux/hw_random.h>
+- #include <linux/gpio/driver.h>
+-+#include <linux/reset.h>
+- 
+- #include "common.h"
+- #include "debug.h"
+-@@ -1011,6 +1012,9 @@ struct ath_softc {
+- 	struct ath_hw *sc_ah;
+- 	void __iomem *mem;
+- 	int irq;
+-+#ifdef CONFIG_OF
+-+	struct reset_control *reset;
+-+#endif
+- 	spinlock_t sc_serial_rw;
+- 	spinlock_t sc_pm_lock;
+- 	spinlock_t sc_pcu_lock;
+diff --git a/package/kernel/mac80211/patches/ath9k/553-ath9k_of_gpio_mask.patch b/package/kernel/mac80211/patches/ath9k/553-ath9k_of_gpio_mask.patch
+deleted file mode 100644
+index 6d1820ecb7..0000000000
+--- a/package/kernel/mac80211/patches/ath9k/553-ath9k_of_gpio_mask.patch
++++ /dev/null
+@@ -1,25 +0,0 @@
+---- a/drivers/net/wireless/ath/ath9k/init.c
+-+++ b/drivers/net/wireless/ath/ath9k/init.c
+-@@ -696,6 +696,12 @@ static int ath9k_of_init(struct ath_soft
+- 	return 0;
+- }
+- 
+-+static void ath9k_of_gpio_mask(struct ath_softc *sc)
+-+{
+-+	of_property_read_u32(sc->dev->of_node, "qca,gpio-mask",
+-+			     &sc->sc_ah->caps.gpio_mask);
+-+}
+-+
+- static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
+- 			    const struct ath_bus_ops *bus_ops)
+- {
+-@@ -803,6 +809,9 @@ static int ath9k_init_softc(u16 devid, s
+- 	if (ret)
+- 		goto err_hw;
+- 
+-+	/* GPIO mask quirk */
+-+	ath9k_of_gpio_mask(sc);
+-+
+- 	ret = ath9k_init_queues(sc);
+- 	if (ret)
+- 		goto err_queues;
+diff --git a/package/kernel/mac80211/patches/brcm/040-brcmutil_option.patch b/package/kernel/mac80211/patches/brcm/040-brcmutil_option.patch
+deleted file mode 100644
+index 3e8505b5b4..0000000000
+--- a/package/kernel/mac80211/patches/brcm/040-brcmutil_option.patch
++++ /dev/null
+@@ -1,10 +0,0 @@
+---- a/drivers/net/wireless/broadcom/brcm80211/Kconfig
+-+++ b/drivers/net/wireless/broadcom/brcm80211/Kconfig
+-@@ -1,6 +1,6 @@
+- # SPDX-License-Identifier: GPL-2.0-only
+- config BRCMUTIL
+--	tristate
+-+	tristate "Broadcom 802.11 driver utility functions"
+- 	depends on m
+- 
+- config BRCMSMAC
+diff --git a/package/kernel/mac80211/patches/brcm/810-b43-gpio-mask-module-option.patch b/package/kernel/mac80211/patches/brcm/810-b43-gpio-mask-module-option.patch
+deleted file mode 100644
+index 09ef50526f..0000000000
+--- a/package/kernel/mac80211/patches/brcm/810-b43-gpio-mask-module-option.patch
++++ /dev/null
+@@ -1,37 +0,0 @@
+---- a/drivers/net/wireless/broadcom/b43/b43.h
+-+++ b/drivers/net/wireless/broadcom/b43/b43.h
+-@@ -840,6 +840,7 @@ struct b43_wldev {
+- 	bool qos_enabled;		/* TRUE, if QoS is used. */
+- 	bool hwcrypto_enabled;		/* TRUE, if HW crypto acceleration is enabled. */
+- 	bool use_pio;			/* TRUE if next init should use PIO */
+-+	int gpiomask;			/* GPIO LED mask as a module parameter */
+- 
+- 	/* PHY/Radio device. */
+- 	struct b43_phy phy;
+---- a/drivers/net/wireless/broadcom/b43/main.c
+-+++ b/drivers/net/wireless/broadcom/b43/main.c
+-@@ -72,6 +72,11 @@ MODULE_FIRMWARE("b43/ucode40.fw");
+- MODULE_FIRMWARE("b43/ucode42.fw");
+- MODULE_FIRMWARE("b43/ucode9.fw");
+- 
+-+static int modparam_gpiomask = 0x000F;
+-+module_param_named(gpiomask, modparam_gpiomask, int, 0444);
+-+MODULE_PARM_DESC(gpiomask,
+-+         "GPIO mask for LED control (default 0x000F)");
+-+
+- static int modparam_bad_frames_preempt;
+- module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
+- MODULE_PARM_DESC(bad_frames_preempt,
+-@@ -2869,10 +2874,10 @@ static int b43_gpio_init(struct b43_wlde
+- 	u32 mask, set;
+- 
+- 	b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_GPOUTSMSK, 0);
+--	b43_maskset16(dev, B43_MMIO_GPIO_MASK, ~0, 0xF);
+-+	b43_maskset16(dev, B43_MMIO_GPIO_MASK, ~0, modparam_gpiomask);
+- 
+- 	mask = 0x0000001F;
+--	set = 0x0000000F;
+-+	set = modparam_gpiomask;
+- 	if (dev->dev->chip_id == 0x4301) {
+- 		mask |= 0x0060;
+- 		set |= 0x0060;
+diff --git a/package/kernel/mac80211/patches/brcm/811-b43_no_pio.patch b/package/kernel/mac80211/patches/brcm/811-b43_no_pio.patch
+deleted file mode 100644
+index e395d48202..0000000000
+--- a/package/kernel/mac80211/patches/brcm/811-b43_no_pio.patch
++++ /dev/null
+@@ -1,86 +0,0 @@
+---- a/drivers/net/wireless/broadcom/b43/Makefile
+-+++ b/drivers/net/wireless/broadcom/b43/Makefile
+-@@ -18,7 +18,7 @@ b43-$(CPTCFG_B43_PHY_AC)	+= phy_ac.o
+- b43-y				+= sysfs.o
+- b43-y				+= xmit.o
+- b43-y				+= dma.o
+--b43-y				+= pio.o
+-+b43-$(CPTCFG_B43_PIO)		+= pio.o
+- b43-y				+= rfkill.o
+- b43-y				+= ppr.o
+- b43-$(CPTCFG_B43_LEDS)		+= leds.o
+---- a/drivers/net/wireless/broadcom/b43/main.c
+-+++ b/drivers/net/wireless/broadcom/b43/main.c
+-@@ -2001,10 +2001,12 @@ static void b43_do_interrupt_thread(stru
+- 			dma_reason[0], dma_reason[1],
+- 			dma_reason[2], dma_reason[3],
+- 			dma_reason[4], dma_reason[5]);
+-+#ifdef CPTCFG_B43_PIO
+- 		b43err(dev->wl, "This device does not support DMA "
+- 			       "on your system. It will now be switched to PIO.\n");
+- 		/* Fall back to PIO transfers if we get fatal DMA errors! */
+- 		dev->use_pio = true;
+-+#endif
+- 		b43_controller_restart(dev, "DMA error");
+- 		return;
+- 	}
+---- a/drivers/net/wireless/broadcom/b43/pio.h
+-+++ b/drivers/net/wireless/broadcom/b43/pio.h
+-@@ -151,7 +151,7 @@ static inline void b43_piorx_write32(str
+- 	b43_write32(q->dev, q->mmio_base + offset, value);
+- }
+- 
+--
+-+#ifdef CPTCFG_B43_PIO
+- int b43_pio_init(struct b43_wldev *dev);
+- void b43_pio_free(struct b43_wldev *dev);
+- 
+-@@ -162,5 +162,37 @@ void b43_pio_rx(struct b43_pio_rxqueue *
+- 
+- void b43_pio_tx_suspend(struct b43_wldev *dev);
+- void b43_pio_tx_resume(struct b43_wldev *dev);
+-+#else
+-+static inline int b43_pio_init(struct b43_wldev *dev)
+-+{
+-+	return 0;
+-+}
+-+
+-+static inline void b43_pio_free(struct b43_wldev *dev)
+-+{
+-+}
+-+
+-+static inline int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb)
+-+{
+-+	return 0;
+-+}
+-+
+-+static inline void b43_pio_handle_txstatus(struct b43_wldev *dev,
+-+					   const struct b43_txstatus *status)
+-+{
+-+}
+-+
+-+static inline void b43_pio_rx(struct b43_pio_rxqueue *q)
+-+{
+-+}
+-+
+-+static inline void b43_pio_tx_suspend(struct b43_wldev *dev)
+-+{
+-+}
+-+
+-+static inline void b43_pio_tx_resume(struct b43_wldev *dev)
+-+{
+-+}
+-+#endif /* CPTCFG_B43_PIO */
+- 
+- #endif /* B43_PIO_H_ */
+---- a/drivers/net/wireless/broadcom/b43/Kconfig
+-+++ b/drivers/net/wireless/broadcom/b43/Kconfig
+-@@ -100,7 +100,7 @@ config B43_BCMA_PIO
+- 	default y
+- 
+- config B43_PIO
+--	bool
+-+	bool "Broadcom 43xx PIO support"
+- 	depends on B43 && B43_SSB
+- 	depends on SSB_BLOCKIO
+- 	default y
+diff --git a/package/kernel/mac80211/patches/brcm/812-b43-add-antenna-control.patch b/package/kernel/mac80211/patches/brcm/812-b43-add-antenna-control.patch
+deleted file mode 100644
+index 22b67c49d8..0000000000
+--- a/package/kernel/mac80211/patches/brcm/812-b43-add-antenna-control.patch
++++ /dev/null
+@@ -1,131 +0,0 @@
+---- a/drivers/net/wireless/broadcom/b43/main.c
+-+++ b/drivers/net/wireless/broadcom/b43/main.c
+-@@ -1643,7 +1643,7 @@ static void b43_write_beacon_template(st
+- 				  len, ram_offset, shm_size_offset, rate);
+- 
+- 	/* Write the PHY TX control parameters. */
+--	antenna = B43_ANTENNA_DEFAULT;
+-+	antenna = dev->tx_antenna;
+- 	antenna = b43_antenna_to_phyctl(antenna);
+- 	ctl = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL);
+- 	/* We can't send beacons with short preamble. Would get PHY errors. */
+-@@ -3284,8 +3284,8 @@ static int b43_chip_init(struct b43_wlde
+- 
+- 	/* Select the antennae */
+- 	if (phy->ops->set_rx_antenna)
+--		phy->ops->set_rx_antenna(dev, B43_ANTENNA_DEFAULT);
+--	b43_mgmtframe_txantenna(dev, B43_ANTENNA_DEFAULT);
+-+		phy->ops->set_rx_antenna(dev, dev->rx_antenna);
+-+	b43_mgmtframe_txantenna(dev, dev->tx_antenna);
+- 
+- 	if (phy->type == B43_PHYTYPE_B) {
+- 		value16 = b43_read16(dev, 0x005E);
+-@@ -3986,7 +3986,6 @@ static int b43_op_config(struct ieee8021
+- 	struct b43_wldev *dev = wl->current_dev;
+- 	struct b43_phy *phy = &dev->phy;
+- 	struct ieee80211_conf *conf = &hw->conf;
+--	int antenna;
+- 	int err = 0;
+- 
+- 	mutex_lock(&wl->mutex);
+-@@ -4029,11 +4028,9 @@ static int b43_op_config(struct ieee8021
+- 	}
+- 
+- 	/* Antennas for RX and management frame TX. */
+--	antenna = B43_ANTENNA_DEFAULT;
+--	b43_mgmtframe_txantenna(dev, antenna);
+--	antenna = B43_ANTENNA_DEFAULT;
+-+	b43_mgmtframe_txantenna(dev, dev->tx_antenna);
+- 	if (phy->ops->set_rx_antenna)
+--		phy->ops->set_rx_antenna(dev, antenna);
+-+		phy->ops->set_rx_antenna(dev, dev->rx_antenna);
+- 
+- 	if (wl->radio_enabled != phy->radio_on) {
+- 		if (wl->radio_enabled) {
+-@@ -5176,6 +5173,47 @@ static int b43_op_get_survey(struct ieee
+- 	return 0;
+- }
+- 
+-+static int b43_op_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
+-+{
+-+	struct b43_wl *wl = hw_to_b43_wl(hw);
+-+	struct b43_wldev *dev = wl->current_dev;
+-+
+-+	if (tx_ant == 1 && rx_ant == 1) {
+-+		dev->tx_antenna = B43_ANTENNA0;
+-+		dev->rx_antenna = B43_ANTENNA0;
+-+	}
+-+	else if (tx_ant == 2 && rx_ant == 2) {
+-+		dev->tx_antenna = B43_ANTENNA1;
+-+		dev->rx_antenna = B43_ANTENNA1;
+-+	}
+-+	else if ((tx_ant & 3) == 3 && (rx_ant & 3) == 3) {
+-+		dev->tx_antenna = B43_ANTENNA_DEFAULT;
+-+		dev->rx_antenna = B43_ANTENNA_DEFAULT;
+-+	}
+-+	else {
+-+		return -EINVAL;
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+
+-+static int b43_op_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
+-+{
+-+	struct b43_wl *wl = hw_to_b43_wl(hw);
+-+	struct b43_wldev *dev = wl->current_dev;
+-+
+-+	switch (dev->tx_antenna) {
+-+	case B43_ANTENNA0:
+-+		*tx_ant = 1; *rx_ant = 1; break;
+-+	case B43_ANTENNA1:
+-+		*tx_ant = 2; *rx_ant = 2; break;
+-+	case B43_ANTENNA_DEFAULT:
+-+		*tx_ant = 3; *rx_ant = 3; break;
+-+	}
+-+	return 0;
+-+}
+-+
+- static const struct ieee80211_ops b43_hw_ops = {
+- 	.tx			= b43_op_tx,
+- 	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+-@@ -5198,6 +5236,8 @@ static const struct ieee80211_ops b43_hw
+- 	.sw_scan_complete	= b43_op_sw_scan_complete_notifier,
+- 	.get_survey		= b43_op_get_survey,
+- 	.rfkill_poll		= b43_rfkill_poll,
+-+	.set_antenna		= b43_op_set_antenna,
+-+	.get_antenna		= b43_op_get_antenna,
+- };
+- 
+- /* Hard-reset the chip. Do not call this directly.
+-@@ -5499,6 +5539,8 @@ static int b43_one_core_attach(struct b4
+- 	if (!wldev)
+- 		goto out;
+- 
+-+	wldev->rx_antenna = B43_ANTENNA_DEFAULT;
+-+	wldev->tx_antenna = B43_ANTENNA_DEFAULT;
+- 	wldev->use_pio = b43_modparam_pio;
+- 	wldev->dev = dev;
+- 	wldev->wl = wl;
+-@@ -5590,6 +5632,9 @@ static struct b43_wl *b43_wireless_init(
+- 
+- 	wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
+- 
+-+	hw->wiphy->available_antennas_rx = 0x3;
+-+	hw->wiphy->available_antennas_tx = 0x3;
+-+
+- 	wl->hw_registered = false;
+- 	hw->max_rates = 2;
+- 	SET_IEEE80211_DEV(hw, dev->dev);
+---- a/drivers/net/wireless/broadcom/b43/b43.h
+-+++ b/drivers/net/wireless/broadcom/b43/b43.h
+-@@ -841,6 +841,8 @@ struct b43_wldev {
+- 	bool hwcrypto_enabled;		/* TRUE, if HW crypto acceleration is enabled. */
+- 	bool use_pio;			/* TRUE if next init should use PIO */
+- 	int gpiomask;			/* GPIO LED mask as a module parameter */
+-+	int rx_antenna;			/* Used RX antenna (B43_ANTENNAxxx) */
+-+	int tx_antenna;			/* Used TX antenna (B43_ANTENNAxxx) */
+- 
+- 	/* PHY/Radio device. */
+- 	struct b43_phy phy;
+diff --git a/package/kernel/mac80211/patches/brcm/813-b43-reduce-number-of-RX-slots.patch b/package/kernel/mac80211/patches/brcm/813-b43-reduce-number-of-RX-slots.patch
+deleted file mode 100644
+index 85c52c0282..0000000000
+--- a/package/kernel/mac80211/patches/brcm/813-b43-reduce-number-of-RX-slots.patch
++++ /dev/null
+@@ -1,11 +0,0 @@
+---- a/drivers/net/wireless/broadcom/b43/dma.h
+-+++ b/drivers/net/wireless/broadcom/b43/dma.h
+-@@ -170,7 +170,7 @@ struct b43_dmadesc_generic {
+- 
+- /* DMA engine tuning knobs */
+- #define B43_TXRING_SLOTS		256
+--#define B43_RXRING_SLOTS		256
+-+#define B43_RXRING_SLOTS		32
+- #define B43_DMA0_RX_FW598_BUFSIZE	(B43_DMA0_RX_FW598_FO + IEEE80211_MAX_FRAME_LEN)
+- #define B43_DMA0_RX_FW351_BUFSIZE	(B43_DMA0_RX_FW351_FO + IEEE80211_MAX_FRAME_LEN)
+- 
+diff --git a/package/kernel/mac80211/patches/brcm/814-b43-only-use-gpio-0-1-for-led.patch b/package/kernel/mac80211/patches/brcm/814-b43-only-use-gpio-0-1-for-led.patch
+deleted file mode 100644
+index 9cb0a32fd4..0000000000
+--- a/package/kernel/mac80211/patches/brcm/814-b43-only-use-gpio-0-1-for-led.patch
++++ /dev/null
+@@ -1,17 +0,0 @@
+---- a/drivers/net/wireless/broadcom/b43/main.c
+-+++ b/drivers/net/wireless/broadcom/b43/main.c
+-@@ -2886,6 +2886,14 @@ static int b43_gpio_init(struct b43_wlde
+- 	} else if (dev->dev->chip_id == 0x5354) {
+- 		/* Don't allow overtaking buttons GPIOs */
+- 		set &= 0x2; /* 0x2 is LED GPIO on BCM5354 */
+-+	} else if (dev->dev->chip_id == BCMA_CHIP_ID_BCM4716 || 
+-+		   dev->dev->chip_id == BCMA_CHIP_ID_BCM47162 ||
+-+		   dev->dev->chip_id == BCMA_CHIP_ID_BCM5356 ||
+-+		   dev->dev->chip_id == BCMA_CHIP_ID_BCM5357 ||
+-+		   dev->dev->chip_id == BCMA_CHIP_ID_BCM53572) {
+-+		/* just use gpio 0 and 1 for 2.4 GHz wifi led */
+-+		set &= 0x3;
+-+		mask &= 0x3;
+- 	}
+- 
+- 	if (0 /* FIXME: conditional unknown */ ) {
+diff --git a/package/kernel/mac80211/patches/brcm/815-b43-always-take-overlapping-devs.patch b/package/kernel/mac80211/patches/brcm/815-b43-always-take-overlapping-devs.patch
+deleted file mode 100644
+index 3700eaa1a0..0000000000
+--- a/package/kernel/mac80211/patches/brcm/815-b43-always-take-overlapping-devs.patch
++++ /dev/null
+@@ -1,11 +0,0 @@
+---- a/drivers/net/wireless/broadcom/b43/main.c
+-+++ b/drivers/net/wireless/broadcom/b43/main.c
+-@@ -114,7 +114,7 @@ static int b43_modparam_pio;
+- module_param_named(pio, b43_modparam_pio, int, 0644);
+- MODULE_PARM_DESC(pio, "Use PIO accesses by default: 0=DMA, 1=PIO");
+- 
+--static int modparam_allhwsupport = !IS_ENABLED(CPTCFG_BRCMSMAC);
+-+static int modparam_allhwsupport = 1;
+- module_param_named(allhwsupport, modparam_allhwsupport, int, 0444);
+- MODULE_PARM_DESC(allhwsupport, "Enable support for all hardware (even it if overlaps with the brcmsmac driver)");
+- 
+diff --git a/package/kernel/mac80211/patches/brcm/850-brcmsmac-remove-extra-regulation-restriction.patch b/package/kernel/mac80211/patches/brcm/850-brcmsmac-remove-extra-regulation-restriction.patch
+deleted file mode 100644
+index 3c93386b30..0000000000
+--- a/package/kernel/mac80211/patches/brcm/850-brcmsmac-remove-extra-regulation-restriction.patch
++++ /dev/null
+@@ -1,27 +0,0 @@
+---- a/drivers/net/wireless/broadcom/brcm80211/brcmsmac/channel.c
+-+++ b/drivers/net/wireless/broadcom/brcm80211/brcmsmac/channel.c
+-@@ -58,19 +58,12 @@
+- 				 (((c) < 149) ? 3 : 4))))
+- 
+- #define BRCM_2GHZ_2412_2462	REG_RULE(2412-10, 2462+10, 40, 0, 19, 0)
+--#define BRCM_2GHZ_2467_2472	REG_RULE(2467-10, 2472+10, 20, 0, 19, \
+--					 NL80211_RRF_NO_IR)
+-+#define BRCM_2GHZ_2467_2472	REG_RULE(2467-10, 2472+10, 20, 0, 19, 0)
+- 
+--#define BRCM_5GHZ_5180_5240	REG_RULE(5180-10, 5240+10, 40, 0, 21, \
+--					 NL80211_RRF_NO_IR)
+--#define BRCM_5GHZ_5260_5320	REG_RULE(5260-10, 5320+10, 40, 0, 21, \
+--					 NL80211_RRF_DFS | \
+--					 NL80211_RRF_NO_IR)
+--#define BRCM_5GHZ_5500_5700	REG_RULE(5500-10, 5700+10, 40, 0, 21, \
+--					 NL80211_RRF_DFS | \
+--					 NL80211_RRF_NO_IR)
+--#define BRCM_5GHZ_5745_5825	REG_RULE(5745-10, 5825+10, 40, 0, 21, \
+--					 NL80211_RRF_NO_IR)
+-+#define BRCM_5GHZ_5180_5240	REG_RULE(5180-10, 5240+10, 40, 0, 21, 0)
+-+#define BRCM_5GHZ_5260_5320	REG_RULE(5260-10, 5320+10, 40, 0, 21, 0)
+-+#define BRCM_5GHZ_5500_5700	REG_RULE(5500-10, 5700+10, 40, 0, 21, 0)
+-+#define BRCM_5GHZ_5745_5825	REG_RULE(5745-10, 5825+10, 40, 0, 21, 0)
+- 
+- static const struct ieee80211_regdomain brcms_regdom_x2 = {
+- 	.n_reg_rules = 6,
+diff --git a/package/kernel/mac80211/patches/brcm/861-brcmfmac-workaround-bug-with-some-inconsistent-BSSes.patch b/package/kernel/mac80211/patches/brcm/861-brcmfmac-workaround-bug-with-some-inconsistent-BSSes.patch
+deleted file mode 100644
+index b82b442a1e..0000000000
+--- a/package/kernel/mac80211/patches/brcm/861-brcmfmac-workaround-bug-with-some-inconsistent-BSSes.patch
++++ /dev/null
+@@ -1,49 +0,0 @@
+-From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
+-Date: Thu, 9 Jul 2015 00:07:59 +0200
+-Subject: [PATCH] brcmfmac: workaround bug with some inconsistent BSSes state
+-MIME-Version: 1.0
+-Content-Type: text/plain; charset=UTF-8
+-Content-Transfer-Encoding: 8bit
+-
+-Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
+----
+-
+---- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
+-+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
+-@@ -713,8 +713,36 @@ static struct wireless_dev *brcmf_cfg802
+- 	struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy);
+- 	struct brcmf_pub *drvr = cfg->pub;
+- 	struct wireless_dev *wdev;
+-+	struct net_device *dev;
+- 	int err;
+- 
+-+	/*
+-+	 * There is a bug with in-firmware BSS management. When adding virtual
+-+	 * interface brcmfmac first tells firmware to create new BSS and then
+-+	 * it creates new struct net_device.
+-+	 *
+-+	 * If creating/registering netdev(ice) fails, BSS remains in some bugged
+-+	 * state. It conflicts with existing BSSes by overtaking their auth
+-+	 * requests.
+-+	 *
+-+	 * It results in one BSS (addresss X) sending beacons and another BSS
+-+	 * (address Y) replying to authentication requests. This makes interface
+-+	 * unusable as AP.
+-+	 *
+-+	 * To workaround this bug we may try to guess if register_netdev(ice)
+-+	 * will fail. The most obvious case is using interface name that already
+-+	 * exists. This is actually quite likely with brcmfmac & some user space
+-+	 * scripts as brcmfmac doesn't allow deleting virtual interfaces.
+-+	 * So this bug can be triggered even by something trivial like:
+-+	 * iw dev wlan0 delete
+-+	 * iw phy phy0 interface add wlan0 type __ap
+-+	 */
+-+	dev = dev_get_by_name(&init_net, name);
+-+	if (dev) {
+-+		dev_put(dev);
+-+		return ERR_PTR(-ENFILE);
+-+	}
+-+
+- 	brcmf_dbg(TRACE, "enter: %s type %d\n", name, type);
+- 	err = brcmf_vif_add_validate(wiphy_to_cfg(wiphy), type);
+- 	if (err) {
+diff --git a/package/kernel/mac80211/patches/brcm/862-brcmfmac-Disable-power-management.patch b/package/kernel/mac80211/patches/brcm/862-brcmfmac-Disable-power-management.patch
+deleted file mode 100644
+index 080ab8f7ef..0000000000
+--- a/package/kernel/mac80211/patches/brcm/862-brcmfmac-Disable-power-management.patch
++++ /dev/null
+@@ -1,27 +0,0 @@
+-From 66ae1b1750720a33e29792a177b1e696f4f005fb Mon Sep 17 00:00:00 2001
+-From: Phil Elwell <phil@raspberrypi.org>
+-Date: Wed, 9 Mar 2016 17:25:59 +0000
+-Subject: [PATCH] brcmfmac: Disable power management
+-
+-Disable wireless power saving in the brcmfmac WLAN driver. This is a
+-temporary measure until the connectivity loss resulting from power
+-saving is resolved.
+-
+-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+----
+- drivers/net/wireless/brcm80211/brcmfmac/cfg80211.c | 2 ++
+- 1 file changed, 2 insertions(+)
+-
+---- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
+-+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
+-@@ -2976,6 +2976,10 @@ brcmf_cfg80211_set_power_mgmt(struct wip
+- 	 * preference in cfg struct to apply this to
+- 	 * FW later while initializing the dongle
+- 	 */
+-+#if defined(CONFIG_ARCH_BCM2835)
+-+	brcmf_dbg(INFO, "power management disabled\n");
+-+	enabled = false;
+-+#endif
+- 	cfg->pwr_save = enabled;
+- 	if (!check_vif_up(ifp->vif)) {
+- 
+diff --git a/package/kernel/mac80211/patches/brcm/863-brcmfmac-add-in-driver-tables-with-country-codes.patch b/package/kernel/mac80211/patches/brcm/863-brcmfmac-add-in-driver-tables-with-country-codes.patch
+deleted file mode 100644
+index 25191b6439..0000000000
+--- a/package/kernel/mac80211/patches/brcm/863-brcmfmac-add-in-driver-tables-with-country-codes.patch
++++ /dev/null
+@@ -1,60 +0,0 @@
+-From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+-Subject: [PATCH] brcmfmac: add in-driver tables with country codes
+-MIME-Version: 1.0
+-Content-Type: text/plain; charset=UTF-8
+-Content-Transfer-Encoding: 8bit
+-
+-This adds early support for changing region. Ideally this data should
+-be stored in DT as all these mappings are devices specific.
+-
+-Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+----
+-
+---- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c
+-+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c
+-@@ -65,6 +65,36 @@ static int brcmf_of_get_country_codes(st
+- 	return 0;
+- }
+- 
+-+/* TODO: FIXME: Use DT */
+-+static void brcmf_of_probe_cc(struct device *dev,
+-+			      struct brcmf_mp_device *settings)
+-+{
+-+	static struct brcmfmac_pd_cc_entry netgear_r8000_cc_ent[] = {
+-+		{ "JP", "JP", 78 },
+-+		{ "US", "Q2", 86 },
+-+	};
+-+	struct brcmfmac_pd_cc_entry *cc_ent = NULL;
+-+	int table_size = 0;
+-+
+-+	if (of_machine_is_compatible("netgear,r8000")) {
+-+		cc_ent = netgear_r8000_cc_ent;
+-+		table_size = ARRAY_SIZE(netgear_r8000_cc_ent);
+-+	}
+-+
+-+	if (cc_ent && table_size) {
+-+		struct brcmfmac_pd_cc *cc;
+-+		size_t memsize;
+-+
+-+		memsize = table_size * sizeof(struct brcmfmac_pd_cc_entry);
+-+		cc = devm_kzalloc(dev, sizeof(*cc) + memsize, GFP_KERNEL);
+-+		if (!cc)
+-+			return;
+-+		cc->table_size = table_size;
+-+		memcpy(cc->table, cc_ent, memsize);
+-+		settings->country_codes = cc;
+-+	}
+-+}
+-+
+- void brcmf_of_probe(struct device *dev, enum brcmf_bus_type bus_type,
+- 		    struct brcmf_mp_device *settings)
+- {
+-@@ -106,6 +136,8 @@ void brcmf_of_probe(struct device *dev,
+- 		of_node_put(root);
+- 	}
+- 
+-+	brcmf_of_probe_cc(dev, settings);
+-+
+- 	if (!np || !of_device_is_compatible(np, "brcm,bcm4329-fmac"))
+- 		return;
+- 
+diff --git a/package/kernel/mac80211/patches/brcm/864-brcmfmac-do-not-use-internal-roaming-engine-by-default.patch b/package/kernel/mac80211/patches/brcm/864-brcmfmac-do-not-use-internal-roaming-engine-by-default.patch
+deleted file mode 100644
+index fe79c40c11..0000000000
+--- a/package/kernel/mac80211/patches/brcm/864-brcmfmac-do-not-use-internal-roaming-engine-by-default.patch
++++ /dev/null
+@@ -1,23 +0,0 @@
+-brcmfmac: do not use internal roaming engine by default
+-
+-Some evidence of curing disconnects with this disabled, so make it a default.
+-Can be overridden with module parameter roamoff=0
+-See: http://projectable.me/optimize-my-pi-wi-fi/
+-
+-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+----
+-
+---- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c
+-+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c
+-@@ -59,7 +59,11 @@ static int brcmf_fcmode;
+- module_param_named(fcmode, brcmf_fcmode, int, 0);
+- MODULE_PARM_DESC(fcmode, "Mode of firmware signalled flow control");
+- 
+-+#if defined(CONFIG_ARCH_BCM2835)
+-+static int brcmf_roamoff = 1;
+-+#else
+- static int brcmf_roamoff;
+-+#endif
+- module_param_named(roamoff, brcmf_roamoff, int, 0400);
+- MODULE_PARM_DESC(roamoff, "Do not use internal roaming engine");
+- 
+diff --git a/package/kernel/mac80211/patches/brcm/865-brcmfmac-Read-alternative-firmware-names-from-DT.patch b/package/kernel/mac80211/patches/brcm/865-brcmfmac-Read-alternative-firmware-names-from-DT.patch
+deleted file mode 100644
+index 8df285f8b1..0000000000
+--- a/package/kernel/mac80211/patches/brcm/865-brcmfmac-Read-alternative-firmware-names-from-DT.patch
++++ /dev/null
+@@ -1,191 +0,0 @@
+-From 4e32024cbb14230af3048e249e84f8c2b25ce45a Mon Sep 17 00:00:00 2001
+-From: Phil Elwell <phil@raspberrypi.com>
+-Date: Thu, 28 Oct 2021 15:03:16 +0100
+-Subject: [PATCH] brcmfmac: Read alternative firmware names from DT
+-
+-Add the ability to load the names of alternative firmwares from the
+-Device Tree node. This permits separate firmwares for 43436s and 43438
+-and allows downstream firmwares to coexist with upstream.
+-
+-Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+----
+- .../wireless/broadcom/brcm80211/brcmfmac/of.c | 36 ++++++++++++++
+- .../wireless/broadcom/brcm80211/brcmfmac/of.h |  7 +++
+- .../broadcom/brcm80211/brcmfmac/sdio.c        | 47 +++++++++++++++++--
+- 3 files changed, 87 insertions(+), 3 deletions(-)
+-
+---- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c
+-+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c
+-@@ -11,6 +11,7 @@
+- #include "debug.h"
+- #include "core.h"
+- #include "common.h"
+-+#include "firmware.h"
+- #include "of.h"
+- 
+- static int brcmf_of_get_country_codes(struct device *dev,
+-@@ -168,3 +169,38 @@ void brcmf_of_probe(struct device *dev,
+- 	sdio->oob_irq_nr = irq;
+- 	sdio->oob_irq_flags = irqf;
+- }
+-+
+-+struct brcmf_firmware_mapping *
+-+brcmf_of_fwnames(struct device *dev, u32 *fwname_count)
+-+{
+-+	struct device_node *np = dev->of_node;
+-+	struct brcmf_firmware_mapping *fwnames;
+-+	struct device_node *map_np, *fw_np;
+-+	int of_count;
+-+	int count = 0;
+-+
+-+	map_np = of_get_child_by_name(np, "firmwares");
+-+	of_count = of_get_child_count(map_np);
+-+	if (!of_count)
+-+		return NULL;
+-+
+-+	fwnames = devm_kcalloc(dev, of_count,
+-+			       sizeof(struct brcmf_firmware_mapping),
+-+			       GFP_KERNEL);
+-+
+-+	for_each_child_of_node(map_np, fw_np)
+-+	{
+-+		struct brcmf_firmware_mapping *cur = &fwnames[count];
+-+
+-+		if (of_property_read_u32(fw_np, "chipid", &cur->chipid) ||
+-+		    of_property_read_u32(fw_np, "revmask", &cur->revmask))
+-+			continue;
+-+		cur->fw_base = of_get_property(fw_np, "fw_base", NULL);
+-+		if (cur->fw_base)
+-+			count++;
+-+	}
+-+
+-+	*fwname_count = count;
+-+
+-+	return count ? fwnames : NULL;
+-+}
+---- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.h
+-+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.h
+-@@ -5,9 +5,20 @@
+- #ifdef CONFIG_OF
+- void brcmf_of_probe(struct device *dev, enum brcmf_bus_type bus_type,
+- 		    struct brcmf_mp_device *settings);
+-+#ifdef CPTCFG_BRCMFMAC_SDIO
+-+struct brcmf_firmware_mapping *
+-+brcmf_of_fwnames(struct device *dev, u32 *map_count);
+-+#endif
+- #else
+- static void brcmf_of_probe(struct device *dev, enum brcmf_bus_type bus_type,
+- 			   struct brcmf_mp_device *settings)
+- {
+- }
+-+#ifdef CPTCFG_BRCMFMAC_SDIO
+-+static struct brcmf_firmware_mapping *
+-+brcmf_of_fwnames(struct device *dev, u32 *map_count)
+-+{
+-+	return NULL;
+-+}
+-+#endif
+- #endif /* CONFIG_OF */
+---- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
+-+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
+-@@ -35,6 +35,7 @@
+- #include "core.h"
+- #include "common.h"
+- #include "bcdc.h"
+-+#include "of.h"
+- 
+- #define DCMD_RESP_TIMEOUT	msecs_to_jiffies(2500)
+- #define CTL_DONE_TIMEOUT	msecs_to_jiffies(2500)
+-@@ -634,7 +635,7 @@ MODULE_FIRMWARE(BRCMF_FW_DEFAULT_PATH "b
+- /* per-board firmware binaries */
+- MODULE_FIRMWARE(BRCMF_FW_DEFAULT_PATH "brcmfmac*-sdio.*.bin");
+- 
+--static const struct brcmf_firmware_mapping brcmf_sdio_fwnames[] = {
+-+static const struct brcmf_firmware_mapping sdio_fwnames[] = {
+- 	BRCMF_FW_ENTRY(BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, 43143),
+- 	BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x0000001F, 43241B0),
+- 	BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x00000020, 43241B4),
+-@@ -662,6 +663,9 @@ static const struct brcmf_firmware_mappi
+- 	BRCMF_FW_ENTRY(CY_CC_43752_CHIP_ID, 0xFFFFFFFF, 43752)
+- };
+- 
+-+static const struct brcmf_firmware_mapping *brcmf_sdio_fwnames = sdio_fwnames;
+-+static u32 brcmf_sdio_fwnames_count = ARRAY_SIZE(sdio_fwnames);
+-+
+- #define TXCTL_CREDITS	2
+- 
+- static void pkt_align(struct sk_buff *p, int len, int align)
+-@@ -4193,6 +4197,9 @@ static const struct brcmf_bus_ops brcmf_
+- #define BRCMF_SDIO_FW_NVRAM	1
+- #define BRCMF_SDIO_FW_CLM	2
+- 
+-+static struct brcmf_fw_request *
+-+brcmf_sdio_prepare_fw_request(struct brcmf_sdio *bus);
+-+
+- static void brcmf_sdio_firmware_callback(struct device *dev, int err,
+- 					 struct brcmf_fw_request *fwreq)
+- {
+-@@ -4208,6 +4215,22 @@ static void brcmf_sdio_firmware_callback
+- 
+- 	brcmf_dbg(TRACE, "Enter: dev=%s, err=%d\n", dev_name(dev), err);
+- 
+-+	if (err && brcmf_sdio_fwnames != sdio_fwnames) {
+-+		/* Try again with the standard firmware names */
+-+		brcmf_sdio_fwnames = sdio_fwnames;
+-+		brcmf_sdio_fwnames_count = ARRAY_SIZE(sdio_fwnames);
+-+		kfree(fwreq);
+-+		fwreq = brcmf_sdio_prepare_fw_request(bus);
+-+		if (!fwreq) {
+-+			err = -ENOMEM;
+-+			goto fail;
+-+		}
+-+		err = brcmf_fw_get_firmwares(dev, fwreq,
+-+					     brcmf_sdio_firmware_callback);
+-+		if (!err)
+-+			return;
+-+	}
+-+
+- 	if (err)
+- 		goto fail;
+- 
+-@@ -4418,7 +4441,7 @@ brcmf_sdio_prepare_fw_request(struct brc
+- 
+- 	fwreq = brcmf_fw_alloc_request(bus->ci->chip, bus->ci->chiprev,
+- 				       brcmf_sdio_fwnames,
+--				       ARRAY_SIZE(brcmf_sdio_fwnames),
+-+				       brcmf_sdio_fwnames_count,
+- 				       fwnames, ARRAY_SIZE(fwnames));
+- 	if (!fwreq)
+- 		return NULL;
+-@@ -4438,6 +4461,9 @@ struct brcmf_sdio *brcmf_sdio_probe(stru
+- 	struct brcmf_sdio *bus;
+- 	struct workqueue_struct *wq;
+- 	struct brcmf_fw_request *fwreq;
+-+	struct brcmf_firmware_mapping *of_fwnames, *fwnames = NULL;
+-+	const int fwname_size = sizeof(struct brcmf_firmware_mapping);
+-+	u32 of_fw_count;
+- 
+- 	brcmf_dbg(TRACE, "Enter\n");
+- 
+-@@ -4520,6 +4546,21 @@ struct brcmf_sdio *brcmf_sdio_probe(stru
+- 
+- 	brcmf_dbg(INFO, "completed!!\n");
+- 
+-+	of_fwnames = brcmf_of_fwnames(sdiodev->dev, &of_fw_count);
+-+	if (of_fwnames)
+-+		fwnames = devm_kcalloc(sdiodev->dev,
+-+				       of_fw_count + brcmf_sdio_fwnames_count,
+-+				       fwname_size, GFP_KERNEL);
+-+
+-+	if (fwnames) {
+-+		/* The array is scanned in order, so overrides come first */
+-+		memcpy(fwnames, of_fwnames, of_fw_count * fwname_size);
+-+		memcpy(fwnames + of_fw_count, sdio_fwnames,
+-+		       brcmf_sdio_fwnames_count * fwname_size);
+-+		brcmf_sdio_fwnames = fwnames;
+-+		brcmf_sdio_fwnames_count += of_fw_count;
+-+	}
+-+
+- 	fwreq = brcmf_sdio_prepare_fw_request(bus);
+- 	if (!fwreq) {
+- 		ret = -ENOMEM;
+diff --git a/package/kernel/mac80211/patches/build/000-fix_kconfig.patch b/package/kernel/mac80211/patches/build/000-fix_kconfig.patch
+deleted file mode 100644
+index 3987aae4f5..0000000000
+--- a/package/kernel/mac80211/patches/build/000-fix_kconfig.patch
++++ /dev/null
+@@ -1,14 +0,0 @@
+---- a/kconf/Makefile
+-+++ b/kconf/Makefile
+-@@ -1,9 +1,9 @@
+--CFLAGS=-Wall -Wmissing-prototypes -Wstrict-prototypes -O2 -fomit-frame-pointer
+-+CFLAGS=-Wall -Wmissing-prototypes -Wstrict-prototypes -O2 -fomit-frame-pointer -DKBUILD_NO_NLS
+- 
+- LXDIALOG := lxdialog/checklist.o lxdialog/inputbox.o lxdialog/menubox.o lxdialog/textbox.o lxdialog/util.o lxdialog/yesno.o
+- 
+- conf: conf.o zconf.tab.o
+--mconf_CFLAGS := $(shell ./lxdialog/check-lxdialog.sh -ccflags) -DLOCALE
+-+mconf_CFLAGS := $(shell ./lxdialog/check-lxdialog.sh -ccflags)
+- mconf_LDFLAGS := $(shell ./lxdialog/check-lxdialog.sh -ldflags $(CC))
+- mconf: CFLAGS += $(mconf_CFLAGS)
+- 
+diff --git a/package/kernel/mac80211/patches/build/001-fix_build.patch b/package/kernel/mac80211/patches/build/001-fix_build.patch
+deleted file mode 100644
+index 8f63d36e2e..0000000000
+--- a/package/kernel/mac80211/patches/build/001-fix_build.patch
++++ /dev/null
+@@ -1,169 +0,0 @@
+---- a/Makefile
+-+++ b/Makefile
+-@@ -5,7 +5,7 @@
+- ifeq ($(KERNELRELEASE),)
+- 
+- MAKEFLAGS += --no-print-directory
+--SHELL := /bin/bash
+-+SHELL := /usr/bin/env bash
+- BACKPORT_DIR := $(shell pwd)
+- 
+- KMODDIR ?= updates
+-@@ -19,6 +19,7 @@ KLIB_BUILD ?= $(KLIB)/build/
+- KERNEL_CONFIG := $(KLIB_BUILD)/.config
+- KERNEL_MAKEFILE := $(KLIB_BUILD)/Makefile
+- CONFIG_MD5 := $(shell md5sum $(KERNEL_CONFIG) 2>/dev/null | sed 's/\s.*//')
+-+STAMP_KERNEL_CONFIG := .kernel_config_md5_$(CONFIG_MD5)
+- 
+- export KLIB KLIB_BUILD BACKPORT_DIR KMODDIR KMODPATH_ARG
+- 
+-@@ -36,7 +37,8 @@ mrproper:
+- 	@rm -f .kernel_config_md5 Kconfig.versions Kconfig.kernel
+- 	@rm -f backport-include/backport/autoconf.h
+- 
+--.DEFAULT:
+-+.SILENT: $(STAMP_KERNEL_CONFIG)
+-+$(STAMP_KERNEL_CONFIG):
+- 	@set -e ; test -f local-symbols || (						\
+- 	echo "/--------------"								;\
+- 	echo "| You shouldn't run make in the backports tree, but only in"		;\
+-@@ -60,58 +62,62 @@ mrproper:
+- 	echo "| (that isn't currently running.)"					;\
+- 	echo "\\--"									;\
+- 	false)
+--	@set -e ; if [ "$$(cat .kernel_config_md5 2>/dev/null)" != "$(CONFIG_MD5)" ]	;\
+--	then 										\
+--		echo -n "Generating local configuration database from kernel ..."	;\
+--		grep -v -f local-symbols $(KERNEL_CONFIG) | grep = | (			\
+--			while read l ; do						\
+--				if [ "$${l:0:7}" != "CONFIG_" ] ; then			\
+--					continue					;\
+--				fi							;\
+--				l=$${l:7}						;\
+--				n=$${l%%=*}						;\
+--				v=$${l#*=}						;\
+--				if [ "$$v" = "m" ] ; then				\
+--					echo config $$n					;\
+--					echo '    tristate' 				;\
+--				elif [ "$$v" = "y" ] ; then				\
+--					echo config $$n					;\
+--					echo '    bool'					;\
+--				else							\
+--					continue					;\
+--				fi							;\
+--				echo "    default $$v"					;\
+--				echo ""							;\
+--			done								\
+--		) > Kconfig.kernel							;\
+--		kver=$$($(MAKE) --no-print-directory -C $(KLIB_BUILD) M=$(BACKPORT_DIR)	\
+--			kernelversion |	sed 's/^\(\([3-5]\|2\.6\)\.[0-9]\+\).*/\1/;t;d');\
+--		test "$$kver" != "" || echo "Kernel version parse failed!"		;\
+--		test "$$kver" != ""							;\
+--		kvers="$$(seq 14 39 | sed 's/^/2.6./')"					;\
+--		kvers="$$kvers $$(seq 0 19 | sed 's/^/3./')"				;\
+--		kvers="$$kvers $$(seq 0 20 | sed 's/^/4./')"				;\
+--		kvers="$$kvers $$(seq 0 99 | sed 's/^/5./')"				;\
+--		print=0									;\
+--		for v in $$kvers ; do							\
+--			if [ "$$print" = "1" ] ; then					\
+--				echo config KERNEL_$$(echo $$v | tr . _)	;\
+--				echo "    def_bool y"					;\
+--			fi								;\
+--			if [ "$$v" = "$$kver" ] ; then print=1 ; fi			;\
+--		done > Kconfig.versions							;\
+--		# RHEL as well, sadly we need to grep for it				;\
+--		RHEL_MAJOR=$$(grep '^RHEL_MAJOR' $(KERNEL_MAKEFILE) | 			\
+--					sed 's/.*=\s*\([0-9]*\)/\1/;t;d')		;\
+--		RHEL_MINOR=$$(grep '^RHEL_MINOR' $(KERNEL_MAKEFILE) | 			\
+--					sed 's/.*=\s*\([0-9]*\)/\1/;t;d')		;\
+--		for v in $$(seq 0 $$RHEL_MINOR) ; do 					\
+--			echo config BACKPORT_RHEL_KERNEL_$${RHEL_MAJOR}_$$v		;\
+--			echo "    def_bool y"						;\
+--		done >> Kconfig.versions						;\
+--		echo " done."								;\
+--	fi										;\
+--	echo "$(CONFIG_MD5)" > .kernel_config_md5
+-+	@rm -f .kernel_config_md5_*
+-+	@touch $@
+-+
+-+Kconfig.kernel: $(STAMP_KERNEL_CONFIG) local-symbols
+-+	@printf "Generating local configuration database from kernel ..."
+-+	@grep -v -f local-symbols $(KERNEL_CONFIG) | grep = | (			\
+-+		while read l ; do						\
+-+			if [ "$${l:0:7}" != "CONFIG_" ] ; then			\
+-+				continue					;\
+-+			fi							;\
+-+			l=$${l:7}						;\
+-+			n=$${l%%=*}						;\
+-+			v=$${l#*=}						;\
+-+			if [ "$$v" = "m" ] ; then				\
+-+				echo config $$n					;\
+-+				echo '    tristate' 				;\
+-+			elif [ "$$v" = "y" ] ; then				\
+-+				echo config $$n					;\
+-+				echo '    bool'					;\
+-+			else							\
+-+				continue					;\
+-+			fi							;\
+-+			echo "    default $$v"					;\
+-+			echo ""							;\
+-+		done								\
+-+	) > $@
+-+	@echo " done."
+-+
+-+Kconfig.versions: Kconfig.kernel
+-+	@kver=$$($(MAKE) --no-print-directory -C $(KLIB_BUILD) M=$(BACKPORT_DIR) \
+-+		kernelversion |	sed 's/^\(\([3-5]\|2\.6\)\.[0-9]\+\).*/\1/;t;d');\
+-+	test "$$kver" != "" || echo "Kernel version parse failed!"		;\
+-+	test "$$kver" != ""							;\
+-+	kvers="$$(seq 14 39 | sed 's/^/2.6./')"					;\
+-+	kvers="$$kvers $$(seq 0 19 | sed 's/^/3./')"				;\
+-+	kvers="$$kvers $$(seq 0 20 | sed 's/^/4./')"				;\
+-+	kvers="$$kvers $$(seq 0 99 | sed 's/^/5./')"				;\
+-+	print=0									;\
+-+	for v in $$kvers ; do							\
+-+		if [ "$$print" = "1" ] ; then					\
+-+			echo config KERNEL_$$(echo $$v | tr . _)	;\
+-+			echo "    def_bool y"					;\
+-+		fi								;\
+-+		if [ "$$v" = "$$kver" ] ; then print=1 ; fi			;\
+-+	done > $@
+-+	@RHEL_MAJOR=$$(grep '^RHEL_MAJOR' $(KERNEL_MAKEFILE) | 			\
+-+				sed 's/.*=\s*\([0-9]*\)/\1/;t;d')		;\
+-+	RHEL_MINOR=$$(grep '^RHEL_MINOR' $(KERNEL_MAKEFILE) | 			\
+-+				sed 's/.*=\s*\([0-9]*\)/\1/;t;d')		;\
+-+	for v in $$(seq 0 $$RHEL_MINOR) ; do 					\
+-+		echo config BACKPORT_RHEL_KERNEL_$${RHEL_MAJOR}_$$v		;\
+-+		echo "    def_bool y"						;\
+-+	done >> $@
+-+
+-+.DEFAULT:
+-+	@$(MAKE) Kconfig.versions
+- 	@$(MAKE) -f Makefile.real "$@"
+- 
+- .PHONY: defconfig-help
+---- a/Makefile.real
+-+++ b/Makefile.real
+-@@ -59,7 +59,7 @@ defconfig-%::
+- 
+- backport-include/backport/autoconf.h: .config Kconfig.versions Kconfig.kernel
+- 	@$(MAKE) oldconfig
+--	@echo -n "Building backport-include/backport/autoconf.h ..."
+-+	@printf "Building backport-include/backport/autoconf.h ..."
+- 	@grep -f local-symbols .config | (				\
+- 		echo "#ifndef COMPAT_AUTOCONF_INCLUDED"			;\
+- 		echo "#define COMPAT_AUTOCONF_INCLUDED"			;\
+-@@ -80,7 +80,12 @@ backport-include/backport/autoconf.h: .c
+- 			esac						;\
+- 		done							;\
+- 		echo "#endif /* COMPAT_AUTOCONF_INCLUDED */"		;\
+--	) > backport-include/backport/autoconf.h
+-+	) > $@.new
+-+	@if cmp -s $@ $@.new; then \
+-+		rm -f $@.new; \
+-+	else \
+-+		mv $@.new $@; \
+-+	fi
+- 	@echo " done."
+- 
+- .PHONY: modules
+diff --git a/package/kernel/mac80211/patches/build/002-change_allconfig.patch b/package/kernel/mac80211/patches/build/002-change_allconfig.patch
+deleted file mode 100644
+index 368725d0c3..0000000000
+--- a/package/kernel/mac80211/patches/build/002-change_allconfig.patch
++++ /dev/null
+@@ -1,64 +0,0 @@
+---- a/kconf/conf.c
+-+++ b/kconf/conf.c
+-@@ -598,40 +598,12 @@ int main(int ac, char **av)
+- 	case oldconfig:
+- 	case listnewconfig:
+- 	case olddefconfig:
+--		conf_read(NULL);
+--		break;
+- 	case allnoconfig:
+- 	case allyesconfig:
+- 	case allmodconfig:
+- 	case alldefconfig:
+- 	case randconfig:
+--		name = getenv("KCONFIG_ALLCONFIG");
+--		if (!name)
+--			break;
+--		if ((strcmp(name, "") != 0) && (strcmp(name, "1") != 0)) {
+--			if (conf_read_simple(name, S_DEF_USER)) {
+--				fprintf(stderr,
+--					_("*** Can't read seed configuration \"%s\"!\n"),
+--					name);
+--				exit(1);
+--			}
+--			break;
+--		}
+--		switch (input_mode) {
+--		case allnoconfig:	name = "allno.config"; break;
+--		case allyesconfig:	name = "allyes.config"; break;
+--		case allmodconfig:	name = "allmod.config"; break;
+--		case alldefconfig:	name = "alldef.config"; break;
+--		case randconfig:	name = "allrandom.config"; break;
+--		default: break;
+--		}
+--		if (conf_read_simple(name, S_DEF_USER) &&
+--		    conf_read_simple("all.config", S_DEF_USER)) {
+--			fprintf(stderr,
+--				_("*** KCONFIG_ALLCONFIG set, but no \"%s\" or \"all.config\" file found\n"),
+--				name);
+--			exit(1);
+--		}
+-+		conf_read(NULL);
+- 		break;
+- 	default:
+- 		break;
+---- a/kconf/confdata.c
+-+++ b/kconf/confdata.c
+-@@ -1170,6 +1170,8 @@ bool conf_set_all_new_symbols(enum conf_
+- 	}
+- 	bool has_changed = false;
+- 
+-+	sym_clear_all_valid();
+-+
+- 	for_all_symbols(i, sym) {
+- 		if (sym_has_value(sym) || (sym->flags & SYMBOL_VALID))
+- 			continue;
+-@@ -1213,8 +1215,6 @@ bool conf_set_all_new_symbols(enum conf_
+- 
+- 	}
+- 
+--	sym_clear_all_valid();
+--
+- 	/*
+- 	 * We have different type of choice blocks.
+- 	 * If curr.tri equals to mod then we can select several
+diff --git a/package/kernel/mac80211/patches/build/003-remove_bogus_modparams.patch b/package/kernel/mac80211/patches/build/003-remove_bogus_modparams.patch
+deleted file mode 100644
+index aa26c8cb2a..0000000000
+--- a/package/kernel/mac80211/patches/build/003-remove_bogus_modparams.patch
++++ /dev/null
+@@ -1,34 +0,0 @@
+---- a/compat/main.c
+-+++ b/compat/main.c
+-@@ -19,31 +19,6 @@ MODULE_LICENSE("GPL");
+- #error "You need a CPTCFG_VERSION"
+- #endif
+- 
+--static char *backported_kernel_name = CPTCFG_KERNEL_NAME;
+--
+--module_param(backported_kernel_name, charp, 0400);
+--MODULE_PARM_DESC(backported_kernel_name,
+--		 "The kernel tree name that was used for this backport (" CPTCFG_KERNEL_NAME ")");
+--
+--#ifdef BACKPORTS_GIT_TRACKED
+--static char *backports_tracker_id = BACKPORTS_GIT_TRACKED;
+--module_param(backports_tracker_id, charp, 0400);
+--MODULE_PARM_DESC(backports_tracker_id,
+--		 "The version of the tree containing this backport (" BACKPORTS_GIT_TRACKED ")");
+--#else
+--static char *backported_kernel_version = CPTCFG_KERNEL_VERSION;
+--static char *backports_version = CPTCFG_VERSION;
+--
+--module_param(backported_kernel_version, charp, 0400);
+--MODULE_PARM_DESC(backported_kernel_version,
+--		 "The kernel version that was used for this backport (" CPTCFG_KERNEL_VERSION ")");
+--
+--module_param(backports_version, charp, 0400);
+--MODULE_PARM_DESC(backports_version,
+--		 "The git version of the backports tree used to generate this backport (" CPTCFG_VERSION ")");
+--
+--#endif
+--
+- void backport_dependency_symbol(void)
+- {
+- }
+diff --git a/package/kernel/mac80211/patches/build/012-kernel_build_check.patch b/package/kernel/mac80211/patches/build/012-kernel_build_check.patch
+deleted file mode 100644
+index d225ba1820..0000000000
+--- a/package/kernel/mac80211/patches/build/012-kernel_build_check.patch
++++ /dev/null
+@@ -1,11 +0,0 @@
+---- a/Makefile
+-+++ b/Makefile
+-@@ -2,7 +2,7 @@
+- # Makefile for the output source package
+- #
+- 
+--ifeq ($(KERNELRELEASE),)
+-+ifeq ($(KERNELVERSION),)
+- 
+- MAKEFLAGS += --no-print-directory
+- SHELL := /usr/bin/env bash
+diff --git a/package/kernel/mac80211/patches/build/050-lib80211_option.patch b/package/kernel/mac80211/patches/build/050-lib80211_option.patch
+deleted file mode 100644
+index c1b1bc757f..0000000000
+--- a/package/kernel/mac80211/patches/build/050-lib80211_option.patch
++++ /dev/null
+@@ -1,34 +0,0 @@
+---- a/net/wireless/Kconfig
+-+++ b/net/wireless/Kconfig
+-@@ -188,7 +188,7 @@ config CFG80211_WEXT_EXPORT
+- endif # CFG80211
+- 
+- config LIB80211
+--	tristate
+-+	tristate "lib80211"
+- 	depends on m
+- 	default n
+- 	help
+-@@ -198,19 +198,19 @@ config LIB80211
+- 	  Drivers should select this themselves if needed.
+- 
+- config LIB80211_CRYPT_WEP
+--	tristate
+-+	tristate "lib80211 WEP support"
+- 	depends on m
+- 	select BPAUTO_CRYPTO_LIB_ARC4
+- 
+- config LIB80211_CRYPT_CCMP
+--	tristate
+-+	tristate "lib80211 CCMP support"
+- 	depends on m
+- 	depends on CRYPTO
+- 	depends on CRYPTO_AES
+- 	depends on CRYPTO_CCM
+- 
+- config LIB80211_CRYPT_TKIP
+--	tristate
+-+	tristate "lib80211 TKIP support"
+- 	depends on m
+- 	select BPAUTO_CRYPTO_LIB_ARC4
+- 
+diff --git a/package/kernel/mac80211/patches/build/060-no_local_ssb_bcma.patch b/package/kernel/mac80211/patches/build/060-no_local_ssb_bcma.patch
+deleted file mode 100644
+index 4ad2ac081a..0000000000
+--- a/package/kernel/mac80211/patches/build/060-no_local_ssb_bcma.patch
++++ /dev/null
+@@ -1,314 +0,0 @@
+---- a/local-symbols
+-+++ b/local-symbols
+-@@ -470,43 +470,6 @@ USB_VL600=
+- USB_NET_CH9200=
+- USB_NET_AQC111=
+- USB_RTL8153_ECM=
+--SSB_POSSIBLE=
+--SSB=
+--SSB_SPROM=
+--SSB_BLOCKIO=
+--SSB_PCIHOST_POSSIBLE=
+--SSB_PCIHOST=
+--SSB_B43_PCI_BRIDGE=
+--SSB_PCMCIAHOST_POSSIBLE=
+--SSB_PCMCIAHOST=
+--SSB_SDIOHOST_POSSIBLE=
+--SSB_SDIOHOST=
+--SSB_HOST_SOC=
+--SSB_SERIAL=
+--SSB_DRIVER_PCICORE_POSSIBLE=
+--SSB_DRIVER_PCICORE=
+--SSB_PCICORE_HOSTMODE=
+--SSB_DRIVER_MIPS=
+--SSB_SFLASH=
+--SSB_EMBEDDED=
+--SSB_DRIVER_EXTIF=
+--SSB_DRIVER_GIGE=
+--SSB_DRIVER_GPIO=
+--BCMA_POSSIBLE=
+--BCMA=
+--BCMA_BLOCKIO=
+--BCMA_HOST_PCI_POSSIBLE=
+--BCMA_HOST_PCI=
+--BCMA_HOST_SOC=
+--BCMA_DRIVER_PCI=
+--BCMA_DRIVER_PCI_HOSTMODE=
+--BCMA_DRIVER_MIPS=
+--BCMA_PFLASH=
+--BCMA_SFLASH=
+--BCMA_NFLASH=
+--BCMA_DRIVER_GMAC_CMN=
+--BCMA_DRIVER_GPIO=
+--BCMA_DEBUG=
+- USB_ACM=
+- USB_PRINTER=
+- USB_WDM=
+---- a/drivers/net/wireless/broadcom/b43/Kconfig
+-+++ b/drivers/net/wireless/broadcom/b43/Kconfig
+-@@ -63,21 +63,21 @@ endchoice
+- config B43_PCI_AUTOSELECT
+- 	bool
+- 	depends on B43 && SSB_PCIHOST_POSSIBLE
+--	select SSB_PCIHOST
+--	select SSB_B43_PCI_BRIDGE
+-+	depends on SSB_PCIHOST
+-+	depends on SSB_B43_PCI_BRIDGE
+- 	default y
+- 
+- # Auto-select SSB PCICORE driver, if possible
+- config B43_PCICORE_AUTOSELECT
+- 	bool
+- 	depends on B43 && SSB_DRIVER_PCICORE_POSSIBLE
+--	select SSB_DRIVER_PCICORE
+-+	depends on SSB_DRIVER_PCICORE
+- 	default y
+- 
+- config B43_SDIO
+- 	bool "Broadcom 43xx SDIO device support"
+- 	depends on B43 && B43_SSB && SSB_SDIOHOST_POSSIBLE
+--	select SSB_SDIOHOST
+-+	depends on SSB_SDIOHOST
+- 	help
+- 	  Broadcom 43xx device support for Soft-MAC SDIO devices.
+- 
+-@@ -96,13 +96,13 @@ config B43_SDIO
+- config B43_BCMA_PIO
+- 	bool
+- 	depends on B43 && B43_BCMA
+--	select BCMA_BLOCKIO
+-+	depends on BCMA_BLOCKIO
+- 	default y
+- 
+- config B43_PIO
+- 	bool
+- 	depends on B43 && B43_SSB
+--	select SSB_BLOCKIO
+-+	depends on SSB_BLOCKIO
+- 	default y
+- 
+- config B43_PHY_G
+---- a/drivers/net/wireless/broadcom/b43/main.c
+-+++ b/drivers/net/wireless/broadcom/b43/main.c
+-@@ -2853,7 +2853,7 @@ static struct ssb_device *b43_ssb_gpio_d
+- {
+- 	struct ssb_bus *bus = dev->dev->sdev->bus;
+- 
+--#ifdef CPTCFG_SSB_DRIVER_PCICORE
+-+#ifdef CONFIG_SSB_DRIVER_PCICORE
+- 	return (bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev);
+- #else
+- 	return bus->chipco.dev;
+-@@ -4871,7 +4871,7 @@ static int b43_wireless_core_init(struct
+- 	}
+- 	if (sprom->boardflags_lo & B43_BFL_XTAL_NOSLOW)
+- 		hf |= B43_HF_DSCRQ; /* Disable slowclock requests from ucode. */
+--#if defined(CPTCFG_B43_SSB) && defined(CPTCFG_SSB_DRIVER_PCICORE)
+-+#if defined(CPTCFG_B43_SSB) && defined(CONFIG_SSB_DRIVER_PCICORE)
+- 	if (dev->dev->bus_type == B43_BUS_SSB &&
+- 	    dev->dev->sdev->bus->bustype == SSB_BUSTYPE_PCI &&
+- 	    dev->dev->sdev->bus->pcicore.dev->id.revision <= 10)
+---- a/drivers/net/wireless/broadcom/b43legacy/Kconfig
+-+++ b/drivers/net/wireless/broadcom/b43legacy/Kconfig
+-@@ -3,7 +3,7 @@ config B43LEGACY
+- 	tristate "Broadcom 43xx-legacy wireless support (mac80211 stack)"
+- 	depends on m
+- 	depends on SSB_POSSIBLE && MAC80211 && HAS_DMA
+--	select SSB
+-+	depends on SSB
+- 	depends on FW_LOADER
+- 	help
+- 	  b43legacy is a driver for 802.11b devices from Broadcom (BCM4301 and
+-@@ -25,15 +25,15 @@ config B43LEGACY
+- config B43LEGACY_PCI_AUTOSELECT
+- 	bool
+- 	depends on B43LEGACY && SSB_PCIHOST_POSSIBLE
+--	select SSB_PCIHOST
+--	select SSB_B43_PCI_BRIDGE
+-+	depends on SSB_PCIHOST
+-+	depends on SSB_B43_PCI_BRIDGE
+- 	default y
+- 
+- # Auto-select SSB PCICORE driver, if possible
+- config B43LEGACY_PCICORE_AUTOSELECT
+- 	bool
+- 	depends on B43LEGACY && SSB_DRIVER_PCICORE_POSSIBLE
+--	select SSB_DRIVER_PCICORE
+-+	depends on SSB_DRIVER_PCICORE
+- 	default y
+- 
+- # LED support
+---- a/drivers/net/wireless/broadcom/b43legacy/main.c
+-+++ b/drivers/net/wireless/broadcom/b43legacy/main.c
+-@@ -1907,7 +1907,7 @@ static int b43legacy_gpio_init(struct b4
+- 	if (dev->dev->id.revision >= 2)
+- 		mask  |= 0x0010; /* FIXME: This is redundant. */
+- 
+--#ifdef CPTCFG_SSB_DRIVER_PCICORE
+-+#ifdef CONFIG_SSB_DRIVER_PCICORE
+- 	pcidev = bus->pcicore.dev;
+- #endif
+- 	gpiodev = bus->chipco.dev ? : pcidev;
+-@@ -1926,7 +1926,7 @@ static void b43legacy_gpio_cleanup(struc
+- 	struct ssb_bus *bus = dev->dev->bus;
+- 	struct ssb_device *gpiodev, *pcidev = NULL;
+- 
+--#ifdef CPTCFG_SSB_DRIVER_PCICORE
+-+#ifdef CONFIG_SSB_DRIVER_PCICORE
+- 	pcidev = bus->pcicore.dev;
+- #endif
+- 	gpiodev = bus->chipco.dev ? : pcidev;
+---- a/drivers/net/wireless/broadcom/brcm80211/Kconfig
+-+++ b/drivers/net/wireless/broadcom/brcm80211/Kconfig
+-@@ -8,7 +8,7 @@ config BRCMSMAC
+- 	depends on m
+- 	depends on MAC80211
+- 	depends on BCMA_POSSIBLE
+--	select BCMA
+-+	depends on BCMA
+- 	select BRCMUTIL
+- 	depends on FW_LOADER
+- 	depends on CORDIC
+---- a/Kconfig.local
+-+++ b/Kconfig.local
+-@@ -1414,117 +1414,6 @@ config BACKPORTED_USB_NET_AQC111
+- config BACKPORTED_USB_RTL8153_ECM
+- 	tristate
+- 	default USB_RTL8153_ECM
+--config BACKPORTED_SSB_POSSIBLE
+--	tristate
+--	default SSB_POSSIBLE
+--config BACKPORTED_SSB
+--	tristate
+--	default SSB
+--config BACKPORTED_SSB_SPROM
+--	tristate
+--	default SSB_SPROM
+--config BACKPORTED_SSB_BLOCKIO
+--	tristate
+--	default SSB_BLOCKIO
+--config BACKPORTED_SSB_PCIHOST_POSSIBLE
+--	tristate
+--	default SSB_PCIHOST_POSSIBLE
+--config BACKPORTED_SSB_PCIHOST
+--	tristate
+--	default SSB_PCIHOST
+--config BACKPORTED_SSB_B43_PCI_BRIDGE
+--	tristate
+--	default SSB_B43_PCI_BRIDGE
+--config BACKPORTED_SSB_PCMCIAHOST_POSSIBLE
+--	tristate
+--	default SSB_PCMCIAHOST_POSSIBLE
+--config BACKPORTED_SSB_PCMCIAHOST
+--	tristate
+--	default SSB_PCMCIAHOST
+--config BACKPORTED_SSB_SDIOHOST_POSSIBLE
+--	tristate
+--	default SSB_SDIOHOST_POSSIBLE
+--config BACKPORTED_SSB_SDIOHOST
+--	tristate
+--	default SSB_SDIOHOST
+--config BACKPORTED_SSB_HOST_SOC
+--	tristate
+--	default SSB_HOST_SOC
+--config BACKPORTED_SSB_SERIAL
+--	tristate
+--	default SSB_SERIAL
+--config BACKPORTED_SSB_DRIVER_PCICORE_POSSIBLE
+--	tristate
+--	default SSB_DRIVER_PCICORE_POSSIBLE
+--config BACKPORTED_SSB_DRIVER_PCICORE
+--	tristate
+--	default SSB_DRIVER_PCICORE
+--config BACKPORTED_SSB_PCICORE_HOSTMODE
+--	tristate
+--	default SSB_PCICORE_HOSTMODE
+--config BACKPORTED_SSB_DRIVER_MIPS
+--	tristate
+--	default SSB_DRIVER_MIPS
+--config BACKPORTED_SSB_SFLASH
+--	tristate
+--	default SSB_SFLASH
+--config BACKPORTED_SSB_EMBEDDED
+--	tristate
+--	default SSB_EMBEDDED
+--config BACKPORTED_SSB_DRIVER_EXTIF
+--	tristate
+--	default SSB_DRIVER_EXTIF
+--config BACKPORTED_SSB_DRIVER_GIGE
+--	tristate
+--	default SSB_DRIVER_GIGE
+--config BACKPORTED_SSB_DRIVER_GPIO
+--	tristate
+--	default SSB_DRIVER_GPIO
+--config BACKPORTED_BCMA_POSSIBLE
+--	tristate
+--	default BCMA_POSSIBLE
+--config BACKPORTED_BCMA
+--	tristate
+--	default BCMA
+--config BACKPORTED_BCMA_BLOCKIO
+--	tristate
+--	default BCMA_BLOCKIO
+--config BACKPORTED_BCMA_HOST_PCI_POSSIBLE
+--	tristate
+--	default BCMA_HOST_PCI_POSSIBLE
+--config BACKPORTED_BCMA_HOST_PCI
+--	tristate
+--	default BCMA_HOST_PCI
+--config BACKPORTED_BCMA_HOST_SOC
+--	tristate
+--	default BCMA_HOST_SOC
+--config BACKPORTED_BCMA_DRIVER_PCI
+--	tristate
+--	default BCMA_DRIVER_PCI
+--config BACKPORTED_BCMA_DRIVER_PCI_HOSTMODE
+--	tristate
+--	default BCMA_DRIVER_PCI_HOSTMODE
+--config BACKPORTED_BCMA_DRIVER_MIPS
+--	tristate
+--	default BCMA_DRIVER_MIPS
+--config BACKPORTED_BCMA_PFLASH
+--	tristate
+--	default BCMA_PFLASH
+--config BACKPORTED_BCMA_SFLASH
+--	tristate
+--	default BCMA_SFLASH
+--config BACKPORTED_BCMA_NFLASH
+--	tristate
+--	default BCMA_NFLASH
+--config BACKPORTED_BCMA_DRIVER_GMAC_CMN
+--	tristate
+--	default BCMA_DRIVER_GMAC_CMN
+--config BACKPORTED_BCMA_DRIVER_GPIO
+--	tristate
+--	default BCMA_DRIVER_GPIO
+--config BACKPORTED_BCMA_DEBUG
+--	tristate
+--	default BCMA_DEBUG
+- config BACKPORTED_USB_ACM
+- 	tristate
+- 	default USB_ACM
+---- a/Kconfig.sources
+-+++ b/Kconfig.sources
+-@@ -10,9 +10,6 @@ source "$BACKPORT_DIR/drivers/soc/qcom/K
+- source "$BACKPORT_DIR/drivers/net/wireless/Kconfig"
+- source "$BACKPORT_DIR/drivers/net/usb/Kconfig"
+- 
+--source "$BACKPORT_DIR/drivers/ssb/Kconfig"
+--source "$BACKPORT_DIR/drivers/bcma/Kconfig"
+--
+- source "$BACKPORT_DIR/drivers/usb/class/Kconfig"
+- 
+- source "$BACKPORT_DIR/drivers/staging/Kconfig"
+---- a/Makefile.kernel
+-+++ b/Makefile.kernel
+-@@ -43,8 +43,6 @@ obj-$(CPTCFG_QRTR) += net/qrtr/
+- obj-$(CPTCFG_QCOM_QMI_HELPERS) += drivers/soc/qcom/
+- obj-$(CPTCFG_MHI_BUS) += drivers/bus/mhi/
+- obj-$(CPTCFG_WLAN) += drivers/net/wireless/
+--obj-$(CPTCFG_SSB) += drivers/ssb/
+--obj-$(CPTCFG_BCMA) += drivers/bcma/
+- obj-$(CPTCFG_USB_NET_RNDIS_WLAN) += drivers/net/usb/
+- 
+- obj-$(CPTCFG_USB_WDM) += drivers/usb/class/
+diff --git a/package/kernel/mac80211/patches/build/070-remove-broken-wext-select.patch b/package/kernel/mac80211/patches/build/070-remove-broken-wext-select.patch
+deleted file mode 100644
+index 121b7faad9..0000000000
+--- a/package/kernel/mac80211/patches/build/070-remove-broken-wext-select.patch
++++ /dev/null
+@@ -1,10 +0,0 @@
+---- a/drivers/staging/rtl8723bs/Kconfig
+-+++ b/drivers/staging/rtl8723bs/Kconfig
+-@@ -5,7 +5,6 @@ config RTL8723BS
+- 	depends on m
+- 	depends on WLAN && MMC && CFG80211
+- 	depends on m
+--	select CFG80211_WEXT
+- 	depends on CRYPTO
+- 	select BPAUTO_CRYPTO_LIB_ARC4
+- 	help
+diff --git a/package/kernel/mac80211/patches/build/080-resv_start_op.patch b/package/kernel/mac80211/patches/build/080-resv_start_op.patch
+deleted file mode 100644
+index 40b8e94a20..0000000000
+--- a/package/kernel/mac80211/patches/build/080-resv_start_op.patch
++++ /dev/null
+@@ -1,24 +0,0 @@
+---- a/drivers/net/wireless/mac80211_hwsim.c
+-+++ b/drivers/net/wireless/mac80211_hwsim.c
+-@@ -5363,7 +5363,9 @@ static struct genl_family hwsim_genl_fam
+- 	.module = THIS_MODULE,
+- 	.small_ops = hwsim_ops,
+- 	.n_small_ops = ARRAY_SIZE(hwsim_ops),
+-+#if LINUX_VERSION_IS_GEQ(6,1,0)
+- 	.resv_start_op = HWSIM_CMD_DEL_MAC_ADDR + 1,
+-+#endif
+- 	.mcgrps = hwsim_mcgrps,
+- 	.n_mcgrps = ARRAY_SIZE(hwsim_mcgrps),
+- };
+---- a/net/wireless/nl80211.c
+-+++ b/net/wireless/nl80211.c
+-@@ -17233,7 +17233,9 @@ static struct genl_family nl80211_fam __
+- 	.n_ops = ARRAY_SIZE(nl80211_ops),
+- 	.small_ops = nl80211_small_ops,
+- 	.n_small_ops = ARRAY_SIZE(nl80211_small_ops),
+-+#if LINUX_VERSION_IS_GEQ(6,1,0)
+- 	.resv_start_op = NL80211_CMD_REMOVE_LINK_STA + 1,
+-+#endif
+- 	.mcgrps = nl80211_mcgrps,
+- 	.n_mcgrps = ARRAY_SIZE(nl80211_mcgrps),
+- 	.parallel_ops = true,
+diff --git a/package/kernel/mac80211/patches/build/090-bcma-otp.patch b/package/kernel/mac80211/patches/build/090-bcma-otp.patch
+deleted file mode 100644
+index 3974776124..0000000000
+--- a/package/kernel/mac80211/patches/build/090-bcma-otp.patch
++++ /dev/null
+@@ -1,13 +0,0 @@
+---- /dev/null
+-+++ b/backport-include/linux/bcma/bcma_driver_chipcommon.h
+-@@ -0,0 +1,10 @@
+-+#ifndef __BACKPORT_BCMA_DRIVER_CHIPCOMMON_H
+-+#define __BACKPORT_BCMA_DRIVER_CHIPCOMMON_H
+-+
+-+#include_next <linux/bcma/bcma_driver_chipcommon.h>
+-+
+-+#ifndef BCMA_CC_SROM_CONTROL_OTP_PRESENT
+-+#define BCMA_CC_SROM_CONTROL_OTP_PRESENT 0x00000020
+-+#endif
+-+
+-+#endif
+diff --git a/package/kernel/mac80211/patches/build/100-backports-drop-QRTR-and-MHI.patch b/package/kernel/mac80211/patches/build/100-backports-drop-QRTR-and-MHI.patch
+deleted file mode 100644
+index b017a0ce14..0000000000
+--- a/package/kernel/mac80211/patches/build/100-backports-drop-QRTR-and-MHI.patch
++++ /dev/null
+@@ -1,76 +0,0 @@
+-From 54e0f9aaf340377fb76acdffee9ec7372c4b70ae Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Mon, 17 Oct 2022 11:35:36 +0200
+-Subject: [PATCH] backports: drop QRTR and MHI
+-
+-Backports currently include QRTR and MHI due to ath11k-pci requiring them,
+-however this at the same time prevents us from adding ath11k-ahb as it
+-also requires QRTR however its AHB variant from the kernel will conflict
+-with the core provided by backports.
+-
+-Since MHI also conflicts with existing OpenWrt kmods providing MHI drop
+-both from backports and use the ones provided by OpenWrt kernel.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- Kconfig.sources                         | 2 --
+- Makefile.kernel                         | 2 --
+- drivers/net/wireless/ath/ath11k/Kconfig | 6 +++---
+- local-symbols                           | 8 --------
+- 4 files changed, 3 insertions(+), 15 deletions(-)
+-
+---- a/Kconfig.sources
+-+++ b/Kconfig.sources
+-@@ -4,8 +4,6 @@ source "$BACKPORT_DIR/compat/Kconfig"
+- # these are copied from the kernel
+- source "$BACKPORT_DIR/net/wireless/Kconfig"
+- source "$BACKPORT_DIR/net/mac80211/Kconfig"
+--source "$BACKPORT_DIR/net/qrtr/Kconfig"
+--source "$BACKPORT_DIR/drivers/bus/mhi/Kconfig"
+- source "$BACKPORT_DIR/drivers/soc/qcom/Kconfig"
+- source "$BACKPORT_DIR/drivers/net/wireless/Kconfig"
+- source "$BACKPORT_DIR/drivers/net/usb/Kconfig"
+---- a/Makefile.kernel
+-+++ b/Makefile.kernel
+-@@ -39,9 +39,7 @@ obj-y += compat/
+- 
+- obj-$(CPTCFG_CFG80211) += net/wireless/
+- obj-$(CPTCFG_MAC80211) += net/mac80211/
+--obj-$(CPTCFG_QRTR) += net/qrtr/
+- obj-$(CPTCFG_QCOM_QMI_HELPERS) += drivers/soc/qcom/
+--obj-$(CPTCFG_MHI_BUS) += drivers/bus/mhi/
+- obj-$(CPTCFG_WLAN) += drivers/net/wireless/
+- obj-$(CPTCFG_USB_NET_RNDIS_WLAN) += drivers/net/usb/
+- 
+---- a/drivers/net/wireless/ath/ath11k/Kconfig
+-+++ b/drivers/net/wireless/ath/ath11k/Kconfig
+-@@ -25,9 +25,9 @@ config ATH11K_PCI
+- 	tristate "Atheros ath11k PCI support"
+- 	depends on m
+- 	depends on ATH11K && PCI
+--	select MHI_BUS
+--	select QRTR
+--	select QRTR_MHI
+-+	depends on MHI_BUS
+-+	depends on QRTR
+-+	depends on QRTR_MHI
+- 	help
+- 	  This module adds support for PCIE bus
+- 
+---- a/local-symbols
+-+++ b/local-symbols
+-@@ -65,14 +65,6 @@ MAC80211_MESH_PS_DEBUG=
+- MAC80211_TDLS_DEBUG=
+- MAC80211_DEBUG_COUNTERS=
+- MAC80211_STA_HASH_MAX_SIZE=
+--QRTR=
+--QRTR_SMD=
+--QRTR_TUN=
+--QRTR_MHI=
+--MHI_BUS=
+--MHI_BUS_DEBUG=
+--MHI_BUS_PCI_GENERIC=
+--MHI_BUS_EP=
+- QCOM_AOSS_QMP=
+- QCOM_COMMAND_DB=
+- QCOM_CPR=
+diff --git a/package/kernel/mac80211/patches/build/110-backport_napi_build_skb.patch b/package/kernel/mac80211/patches/build/110-backport_napi_build_skb.patch
+deleted file mode 100644
+index 1e152fecea..0000000000
+--- a/package/kernel/mac80211/patches/build/110-backport_napi_build_skb.patch
++++ /dev/null
+@@ -1,11 +0,0 @@
+---- a/backport-include/linux/skbuff.h
+-+++ b/backport-include/linux/skbuff.h
+-@@ -144,4 +144,8 @@ static inline u64 skb_get_kcov_handle(st
+- #define napi_build_skb build_skb
+- #endif
+- 
+-+#if LINUX_VERSION_IS_LESS(5,11,0)
+-+#define napi_build_skb build_skb
+-+#endif
+-+
+- #endif /* __BACKPORT_SKBUFF_H */
+diff --git a/package/kernel/mac80211/patches/mt7601u/001-wifi-mt7601u-update-firmware-path.patch b/package/kernel/mac80211/patches/mt7601u/001-wifi-mt7601u-update-firmware-path.patch
+deleted file mode 100644
+index 5d982906c5..0000000000
+--- a/package/kernel/mac80211/patches/mt7601u/001-wifi-mt7601u-update-firmware-path.patch
++++ /dev/null
+@@ -1,55 +0,0 @@
+-From patchwork Mon May 15 22:56:53 2023
+-Content-Type: text/plain; charset="utf-8"
+-MIME-Version: 1.0
+-Content-Transfer-Encoding: 7bit
+-X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
+-X-Patchwork-Id: 13242309
+-X-Patchwork-Delegate: kvalo@adurom.com
+-Return-Path: <linux-wireless-owner@vger.kernel.org>
+-Date: Tue, 16 May 2023 00:56:53 +0200
+-From: Daniel Golle <daniel@makrotopia.org>
+-To: Jakub Kicinski <kuba@kernel.org>, Kalle Valo <kvalo@kernel.org>,
+-        "David S. Miller" <davem@davemloft.net>,
+-        Eric Dumazet <edumazet@google.com>,
+-        Paolo Abeni <pabeni@redhat.com>,
+-        Matthias Brugger <matthias.bgg@gmail.com>,
+-        AngeloGioacchino Del Regno
+-        <angelogioacchino.delregno@collabora.com>,
+-        linux-wireless@vger.kernel.org, netdev@vger.kernel.org,
+-        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
+-        linux-mediatek@lists.infradead.org
+-Subject: [PATCH] wifi: mt7601u: update firmware path
+-Message-ID: 
+- <fefcbf36f13873ae0d97438a0156b87e7e1ae64e.1684191377.git.daniel@makrotopia.org>
+-MIME-Version: 1.0
+-Content-Disposition: inline
+-Precedence: bulk
+-List-ID: <linux-wireless.vger.kernel.org>
+-X-Mailing-List: linux-wireless@vger.kernel.org
+-
+-mt7601u.bin was moved to mediatek/ folder in linux-wireless via commit
+-8451c2b1 ("mt76xx: Move the old Mediatek WiFi firmware to mediatek")
+-and linux-firmware release 20230515.
+-
+-Update the firmware path requested by the mt7601u driver to follow up
+-with the move of the file.
+-
+-Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+----
+- drivers/net/wireless/mediatek/mt7601u/usb.h | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+-
+-base-commit: 0d9b41daa5907756a31772d8af8ac5ff25cf17c1
+-
+---- a/drivers/net/wireless/mediatek/mt7601u/usb.h
+-+++ b/drivers/net/wireless/mediatek/mt7601u/usb.h
+-@@ -8,7 +8,7 @@
+- 
+- #include "mt7601u.h"
+- 
+--#define MT7601U_FIRMWARE	"mt7601u.bin"
+-+#define MT7601U_FIRMWARE	"mediatek/mt7601u.bin"
+- 
+- #define MT_VEND_REQ_MAX_RETRY	10
+- #define MT_VEND_REQ_TOUT_MS	300
+diff --git a/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch b/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch
+deleted file mode 100644
+index 11536651b5..0000000000
+--- a/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch
++++ /dev/null
+@@ -1,10 +0,0 @@
+---- a/drivers/net/wireless/marvell/mwl8k.c
+-+++ b/drivers/net/wireless/marvell/mwl8k.c
+-@@ -5703,6 +5703,7 @@ MODULE_FIRMWARE("mwl8k/fmimage_8366.fw")
+- MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
+- 
+- static const struct pci_device_id mwl8k_pci_id_table[] = {
+-+	{ PCI_VDEVICE(MARVELL, 0x2a02), .driver_data = MWL8363, },
+- 	{ PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
+- 	{ PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
+- 	{ PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
+diff --git a/package/kernel/mac80211/patches/mwl/801-libertas-configure-sysfs-links.patch b/package/kernel/mac80211/patches/mwl/801-libertas-configure-sysfs-links.patch
+deleted file mode 100644
+index 1dbcb1bfef..0000000000
+--- a/package/kernel/mac80211/patches/mwl/801-libertas-configure-sysfs-links.patch
++++ /dev/null
+@@ -1,21 +0,0 @@
+---- a/drivers/net/wireless/marvell/libertas/cfg.c
+-+++ b/drivers/net/wireless/marvell/libertas/cfg.c
+-@@ -2052,6 +2052,8 @@ struct wireless_dev *lbs_cfg_alloc(struc
+- 		goto err_wiphy_new;
+- 	}
+- 
+-+	set_wiphy_dev(wdev->wiphy, dev);
+-+
+- 	return wdev;
+- 
+-  err_wiphy_new:
+---- a/drivers/net/wireless/marvell/libertas/main.c
+-+++ b/drivers/net/wireless/marvell/libertas/main.c
+-@@ -935,6 +935,7 @@ struct lbs_private *lbs_add_card(void *c
+- 		goto err_adapter;
+- 	}
+- 
+-+	dev_net_set(dev, wiphy_net(wdev->wiphy));
+- 	dev->ieee80211_ptr = wdev;
+- 	dev->ml_priv = priv;
+- 	SET_NETDEV_DEV(dev, dmdev);
+diff --git a/package/kernel/mac80211/patches/mwl/802-libertas-set-wireless-macaddr.patch b/package/kernel/mac80211/patches/mwl/802-libertas-set-wireless-macaddr.patch
+deleted file mode 100644
+index b47aee5490..0000000000
+--- a/package/kernel/mac80211/patches/mwl/802-libertas-set-wireless-macaddr.patch
++++ /dev/null
+@@ -1,11 +0,0 @@
+---- a/drivers/net/wireless/marvell/libertas/cfg.c
+-+++ b/drivers/net/wireless/marvell/libertas/cfg.c
+-@@ -2128,6 +2128,8 @@ int lbs_cfg_register(struct lbs_private
+- 	wdev->wiphy->n_cipher_suites = ARRAY_SIZE(cipher_suites);
+- 	wdev->wiphy->reg_notifier = lbs_reg_notifier;
+- 
+-+	memcpy(wdev->wiphy->perm_addr, priv->current_addr, ETH_ALEN);
+-+
+- 	ret = wiphy_register(wdev->wiphy);
+- 	if (ret < 0)
+- 		pr_err("cannot register wiphy device\n");
+diff --git a/package/kernel/mac80211/patches/mwl/900-mwifiex-increase-the-global-limit-up-to-4-SSID.patch b/package/kernel/mac80211/patches/mwl/900-mwifiex-increase-the-global-limit-up-to-4-SSID.patch
+deleted file mode 100644
+index caa139a2c6..0000000000
+--- a/package/kernel/mac80211/patches/mwl/900-mwifiex-increase-the-global-limit-up-to-4-SSID.patch
++++ /dev/null
+@@ -1,41 +0,0 @@
+-From ef8098cd6cb8b5989afef2e8461fe6ba9570a854 Mon Sep 17 00:00:00 2001
+-From: Josef Schlehofer <pepe.schlehofer@gmail.com>
+-Date: Wed, 24 Nov 2021 12:47:40 +0100
+-Subject: [PATCH] mwifiex: increase the global limit up to 4 SSID
+-
+-Firmware for SDIO (88W8997), which is used in Turris MOX SDIO addon [1],
+-allows up to 4 SSID. Unfortunately, driver (even in mainline kernel)
+-has a global limit for all Marvell cards up to 3 SSID.
+-
+-Pali Rohár tested this patch and verified that the SDIO Wi-Fi addon works
+-with the 4 SSID. So, let's increase the global limit from 3 to 4.
+-
+-Ideally, this patch should be done differently before sending
+-it to Linux kernel. It means that limit definition should be moved to
+-the card-specific structure.
+-
+-[1] https://docs.turris.cz/hw/mox/addons/#wi-fi-sdio
+----
+- drivers/net/wireless/marvell/mwifiex/decl.h | 4 ++--
+- 1 file changed, 2 insertions(+), 2 deletions(-)
+-
+---- a/drivers/net/wireless/marvell/mwifiex/decl.h
+-+++ b/drivers/net/wireless/marvell/mwifiex/decl.h
+-@@ -18,7 +18,7 @@
+- #include <net/cfg80211.h>
+- 
+- #define MWIFIEX_BSS_COEX_COUNT	     2
+--#define MWIFIEX_MAX_BSS_NUM         (3)
+-+#define MWIFIEX_MAX_BSS_NUM         (4)
+- 
+- #define MWIFIEX_DMA_ALIGN_SZ	    64
+- #define MWIFIEX_RX_HEADROOM	    64
+-@@ -100,7 +100,7 @@
+- #define MWIFIEX_RATE_INDEX_OFDM0   4
+- 
+- #define MWIFIEX_MAX_STA_NUM		3
+--#define MWIFIEX_MAX_UAP_NUM		3
+-+#define MWIFIEX_MAX_UAP_NUM		4
+- #define MWIFIEX_MAX_P2P_NUM		3
+- 
+- #define MWIFIEX_A_BAND_START_FREQ	5000
+diff --git a/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch b/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch
+deleted file mode 100644
+index c8d24283aa..0000000000
+--- a/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch
++++ /dev/null
+@@ -1,20 +0,0 @@
+---- a/drivers/net/wireless/marvell/mwl8k.c
+-+++ b/drivers/net/wireless/marvell/mwl8k.c
+-@@ -6289,6 +6289,8 @@ static int mwl8k_probe(struct pci_dev *p
+- 
+- 	priv->running_bsses = 0;
+- 
+-+	wait_for_completion(&priv->firmware_loading_complete);
+-+
+- 	return rc;
+- 
+- err_stop_firmware:
+-@@ -6322,8 +6324,6 @@ static void mwl8k_remove(struct pci_dev
+- 		return;
+- 	priv = hw->priv;
+- 
+--	wait_for_completion(&priv->firmware_loading_complete);
+--
+- 	if (priv->fw_state == FW_STATE_ERROR) {
+- 		mwl8k_hw_reset(priv);
+- 		goto unmap;
+diff --git a/package/kernel/mac80211/patches/mwl/950-mwifiex-Print-stringified-name-of-command-in-error-l.patch b/package/kernel/mac80211/patches/mwl/950-mwifiex-Print-stringified-name-of-command-in-error-l.patch
+deleted file mode 100644
+index 98ed9e60e9..0000000000
+--- a/package/kernel/mac80211/patches/mwl/950-mwifiex-Print-stringified-name-of-command-in-error-l.patch
++++ /dev/null
+@@ -1,189 +0,0 @@
+-From f7252b1b5755150535af226e806594bbefd45e0f Mon Sep 17 00:00:00 2001
+-From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
+-Date: Sun, 26 Sep 2021 14:39:44 +0200
+-Subject: [PATCH] mwifiex: Print stringified name of command in error log
+-MIME-Version: 1.0
+-Content-Type: text/plain; charset=UTF-8
+-Content-Transfer-Encoding: 8bit
+-
+-Failed hex command number in error log is hard to understand.
+-So add also more human readable stringified command name into error log.
+-
+-Signed-off-by: Pali Rohár <pali@kernel.org>
+----
+- drivers/net/wireless/marvell/mwifiex/cmdevt.c | 96 +++++++++++++++++--
+- drivers/net/wireless/marvell/mwifiex/main.h   |  2 +
+- .../wireless/marvell/mwifiex/sta_cmdresp.c    |  5 +-
+- .../net/wireless/marvell/mwifiex/uap_cmd.c    |  3 +-
+- 4 files changed, 95 insertions(+), 11 deletions(-)
+-
+---- a/drivers/net/wireless/marvell/mwifiex/cmdevt.c
+-+++ b/drivers/net/wireless/marvell/mwifiex/cmdevt.c
+-@@ -16,6 +16,85 @@
+- 
+- static void mwifiex_cancel_pending_ioctl(struct mwifiex_adapter *adapter);
+- 
+-+const char *
+-+mwifiex_cmd_to_str(u16 command)
+-+{
+-+	switch (command) {
+-+	case HostCmd_CMD_GET_HW_SPEC:			return "GET_HW_SPEC";
+-+	case HostCmd_CMD_802_11_SCAN:			return "SCAN";
+-+	case HostCmd_CMD_802_11_GET_LOG:		return "GET_LOG";
+-+	case HostCmd_CMD_MAC_MULTICAST_ADR:		return "MAC_MULTICAST_ADR";
+-+	case HostCmd_CMD_802_11_EEPROM_ACCESS:		return "EEPROM_ACCESS";
+-+	case HostCmd_CMD_802_11_ASSOCIATE:		return "ASSOCIATE";
+-+	case HostCmd_CMD_802_11_SNMP_MIB:		return "SNMP_MIB";
+-+	case HostCmd_CMD_MAC_REG_ACCESS:		return "MAC_REG_ACCESS";
+-+	case HostCmd_CMD_BBP_REG_ACCESS:		return "BBP_REG_ACCESS";
+-+	case HostCmd_CMD_RF_REG_ACCESS:			return "RF_REG_ACCESS";
+-+	case HostCmd_CMD_PMIC_REG_ACCESS:		return "PMIC_REG_ACCESS";
+-+	case HostCmd_CMD_RF_TX_PWR:			return "RF_TX_PWR";
+-+	case HostCmd_CMD_RF_ANTENNA:			return "RF_ANTENNA";
+-+	case HostCmd_CMD_802_11_DEAUTHENTICATE:		return "DEAUTHENTICATE";
+-+	case HostCmd_CMD_MAC_CONTROL:			return "MAC_CONTROL";
+-+	case HostCmd_CMD_802_11_AD_HOC_START:		return "AD_HOC_START";
+-+	case HostCmd_CMD_802_11_AD_HOC_JOIN:		return "AD_HOC_JOIN";
+-+	case HostCmd_CMD_802_11_AD_HOC_STOP:		return "AD_HOC_STOP";
+-+	case HostCmd_CMD_802_11_MAC_ADDRESS:		return "MAC_ADDRESS";
+-+	case HostCmd_CMD_802_11D_DOMAIN_INFO:		return "DOMAIN_INFO";
+-+	case HostCmd_CMD_802_11_KEY_MATERIAL:		return "KEY_MATERIAL";
+-+	case HostCmd_CMD_802_11_BG_SCAN_CONFIG:		return "BG_SCAN_CONFIG";
+-+	case HostCmd_CMD_802_11_BG_SCAN_QUERY:		return "BG_SCAN_QUERY";
+-+	case HostCmd_CMD_WMM_GET_STATUS:		return "WMM_GET_STATUS";
+-+	case HostCmd_CMD_802_11_SUBSCRIBE_EVENT:	return "SUBSCRIBE_EVENT";
+-+	case HostCmd_CMD_802_11_TX_RATE_QUERY:		return "TX_RATE_QUERY";
+-+	case HostCmd_CMD_802_11_IBSS_COALESCING_STATUS:	return "IBSS_COALESCING_STATUS";
+-+	case HostCmd_CMD_MEM_ACCESS:			return "MEM_ACCESS";
+-+	case HostCmd_CMD_CFG_DATA:			return "CFG_DATA";
+-+	case HostCmd_CMD_VERSION_EXT:			return "VERSION_EXT";
+-+	case HostCmd_CMD_MEF_CFG:			return "MEF_CFG";
+-+	case HostCmd_CMD_RSSI_INFO:			return "RSSI_INFO";
+-+	case HostCmd_CMD_FUNC_INIT:			return "FUNC_INIT";
+-+	case HostCmd_CMD_FUNC_SHUTDOWN:			return "FUNC_SHUTDOWN";
+-+	case HOST_CMD_APCMD_SYS_RESET:			return "SYS_RESET";
+-+	case HostCmd_CMD_UAP_SYS_CONFIG:		return "UAP_SYS_CONFIG";
+-+	case HostCmd_CMD_UAP_BSS_START:			return "UAP_BSS_START";
+-+	case HostCmd_CMD_UAP_BSS_STOP:			return "UAP_BSS_STOP";
+-+	case HOST_CMD_APCMD_STA_LIST:			return "STA_LIST";
+-+	case HostCmd_CMD_UAP_STA_DEAUTH:		return "UAP_STA_DEAUTH";
+-+	case HostCmd_CMD_11N_CFG:			return "11N_CFG";
+-+	case HostCmd_CMD_11N_ADDBA_REQ:			return "ADDBA_REQ";
+-+	case HostCmd_CMD_11N_ADDBA_RSP:			return "ADDBA_RSP";
+-+	case HostCmd_CMD_11N_DELBA:			return "DELBA";
+-+	case HostCmd_CMD_RECONFIGURE_TX_BUFF:		return "RECONFIGURE_TX_BUFF";
+-+	case HostCmd_CMD_CHAN_REPORT_REQUEST:		return "CHAN_REPORT_REQUEST";
+-+	case HostCmd_CMD_AMSDU_AGGR_CTRL:		return "AMSDU_AGGR_CTRL";
+-+	case HostCmd_CMD_TXPWR_CFG:			return "TXPWR_CFG";
+-+	case HostCmd_CMD_TX_RATE_CFG:			return "TX_RATE_CFG";
+-+	case HostCmd_CMD_ROBUST_COEX:			return "ROBUST_COEX";
+-+	case HostCmd_CMD_802_11_PS_MODE_ENH:		return "PS_MODE_ENH";
+-+	case HostCmd_CMD_802_11_HS_CFG_ENH:		return "HS_CFG_ENH";
+-+	case HostCmd_CMD_P2P_MODE_CFG:			return "P2P_MODE_CFG";
+-+	case HostCmd_CMD_CAU_REG_ACCESS:		return "CAU_REG_ACCESS";
+-+	case HostCmd_CMD_SET_BSS_MODE:			return "SET_BSS_MODE";
+-+	case HostCmd_CMD_PCIE_DESC_DETAILS:		return "PCIE_DESC_DETAILS";
+-+	case HostCmd_CMD_802_11_SCAN_EXT:		return "SCAN_EXT";
+-+	case HostCmd_CMD_COALESCE_CFG:			return "COALESCE_CFG";
+-+	case HostCmd_CMD_MGMT_FRAME_REG:		return "MGMT_FRAME_REG";
+-+	case HostCmd_CMD_REMAIN_ON_CHAN:		return "REMAIN_ON_CHAN";
+-+	case HostCmd_CMD_GTK_REKEY_OFFLOAD_CFG:		return "GTK_REKEY_OFFLOAD_CFG";
+-+	case HostCmd_CMD_11AC_CFG:			return "11AC_CFG";
+-+	case HostCmd_CMD_HS_WAKEUP_REASON:		return "HS_WAKEUP_REASON";
+-+	case HostCmd_CMD_TDLS_CONFIG:			return "TDLS_CONFIG";
+-+	case HostCmd_CMD_MC_POLICY:			return "MC_POLICY";
+-+	case HostCmd_CMD_TDLS_OPER:			return "TDLS_OPER";
+-+	case HostCmd_CMD_FW_DUMP_EVENT:			return "FW_DUMP_EVENT";
+-+	case HostCmd_CMD_SDIO_SP_RX_AGGR_CFG:		return "SDIO_SP_RX_AGGR_CFG";
+-+	case HostCmd_CMD_STA_CONFIGURE:			return "STA_CONFIGURE";
+-+	case HostCmd_CMD_CHAN_REGION_CFG:		return "CHAN_REGION_CFG";
+-+	case HostCmd_CMD_PACKET_AGGR_CTRL:		return "PACKET_AGGR_CTRL";
+-+	default:					return "UNKNOWN";
+-+	}
+-+}
+-+
+- /*
+-  * This function initializes a command node.
+-  *
+-@@ -193,8 +272,8 @@ static int mwifiex_dnld_cmd_to_fw(struct
+- 	    cmd_code != HostCmd_CMD_FUNC_SHUTDOWN &&
+- 	    cmd_code != HostCmd_CMD_FUNC_INIT) {
+- 		mwifiex_dbg(adapter, ERROR,
+--			    "DNLD_CMD: FW in reset state, ignore cmd %#x\n",
+--			cmd_code);
+-+			    "DNLD_CMD: FW in reset state, ignore cmd %s (%#x)\n",
+-+			    mwifiex_cmd_to_str(cmd_code), cmd_code);
+- 		mwifiex_recycle_cmd_node(adapter, cmd_node);
+- 		queue_work(adapter->workqueue, &adapter->main_work);
+- 		return -1;
+-@@ -653,8 +732,8 @@ int mwifiex_send_cmd(struct mwifiex_priv
+- 	/* Return error, since the command preparation failed */
+- 	if (ret) {
+- 		mwifiex_dbg(adapter, ERROR,
+--			    "PREP_CMD: cmd %#x preparation failed\n",
+--			cmd_no);
+-+			    "PREP_CMD: cmd %s (%#x) preparation failed\n",
+-+			    mwifiex_cmd_to_str(cmd_no), cmd_no);
+- 		mwifiex_insert_cmd_to_free_q(adapter, cmd_node);
+- 		return -1;
+- 	}
+-@@ -902,8 +981,9 @@ int mwifiex_process_cmdresp(struct mwifi
+- 	if (adapter->hw_status == MWIFIEX_HW_STATUS_INITIALIZING) {
+- 		if (ret) {
+- 			mwifiex_dbg(adapter, ERROR,
+--				    "%s: cmd %#x failed during\t"
+--				    "initialization\n", __func__, cmdresp_no);
+-+				    "%s: cmd %s (%#x) failed during\t"
+-+				    "initialization\n", __func__,
+-+				    mwifiex_cmd_to_str(cmdresp_no), cmdresp_no);
+- 			mwifiex_init_fw_complete(adapter);
+- 			return -1;
+- 		} else if (adapter->last_init_cmd == cmdresp_no)
+-@@ -1273,8 +1353,8 @@ mwifiex_process_sleep_confirm_resp(struc
+- 
+- 	if (command != HostCmd_CMD_802_11_PS_MODE_ENH) {
+- 		mwifiex_dbg(adapter, ERROR,
+--			    "%s: rcvd unexpected resp for cmd %#x, result = %x\n",
+--			    __func__, command, result);
+-+			    "%s: rcvd unexpected resp for cmd %s (%#x), result = %x\n",
+-+			    __func__, mwifiex_cmd_to_str(command), command, result);
+- 		return;
+- 	}
+- 
+---- a/drivers/net/wireless/marvell/mwifiex/main.h
+-+++ b/drivers/net/wireless/marvell/mwifiex/main.h
+-@@ -1099,6 +1099,8 @@ void mwifiex_cancel_all_pending_cmd(stru
+- void mwifiex_cancel_pending_scan_cmd(struct mwifiex_adapter *adapter);
+- void mwifiex_cancel_scan(struct mwifiex_adapter *adapter);
+- 
+-+const char *mwifiex_cmd_to_str(u16 command);
+-+
+- void mwifiex_recycle_cmd_node(struct mwifiex_adapter *adapter,
+- 			      struct cmd_ctrl_node *cmd_node);
+- 
+---- a/drivers/net/wireless/marvell/mwifiex/sta_cmdresp.c
+-+++ b/drivers/net/wireless/marvell/mwifiex/sta_cmdresp.c
+-@@ -36,8 +36,9 @@ mwifiex_process_cmdresp_error(struct mwi
+- 	struct host_cmd_ds_802_11_ps_mode_enh *pm;
+- 
+- 	mwifiex_dbg(adapter, ERROR,
+--		    "CMD_RESP: cmd %#x error, result=%#x\n",
+--		    resp->command, resp->result);
+-+		    "CMD_RESP: cmd %s (%#x) error, result=%#x\n",
+-+		    mwifiex_cmd_to_str(le16_to_cpu(resp->command)),
+-+		    le16_to_cpu(resp->command), le16_to_cpu(resp->result));
+- 
+- 	if (adapter->curr_cmd->wait_q_enabled)
+- 		adapter->cmd_wait_q.status = -1;
+---- a/drivers/net/wireless/marvell/mwifiex/uap_cmd.c
+-+++ b/drivers/net/wireless/marvell/mwifiex/uap_cmd.c
+-@@ -794,7 +794,8 @@ int mwifiex_uap_prepare_cmd(struct mwifi
+- 		break;
+- 	default:
+- 		mwifiex_dbg(priv->adapter, ERROR,
+--			    "PREP_CMD: unknown cmd %#x\n", cmd_no);
+-+			    "PREP_CMD: unknown cmd (%s) %#x\n",
+-+			    mwifiex_cmd_to_str(cmd_no), cmd_no);
+- 		return -1;
+- 	}
+- 
+diff --git a/package/kernel/mac80211/patches/rt2x00/100-rt2x00_options.patch b/package/kernel/mac80211/patches/rt2x00/100-rt2x00_options.patch
+deleted file mode 100644
+index 295904c64e..0000000000
+--- a/package/kernel/mac80211/patches/rt2x00/100-rt2x00_options.patch
++++ /dev/null
+@@ -1,47 +0,0 @@
+---- a/drivers/net/wireless/ralink/rt2x00/Kconfig
+-+++ b/drivers/net/wireless/ralink/rt2x00/Kconfig
+-@@ -226,36 +226,37 @@ config RT2800SOC
+- 
+- 
+- config RT2800_LIB
+--	tristate
+-+	tristate "RT2800 USB/PCI support"
+- 	depends on m
+- 
+- config RT2800_LIB_MMIO
+--	tristate
+-+	tristate "RT2800 MMIO support"
+- 	depends on m
+- 	select RT2X00_LIB_MMIO
+- 	select RT2800_LIB
+- 
+- config RT2X00_LIB_MMIO
+--	tristate
+-+	tristate "RT2x00 MMIO support"
+- 	depends on m
+- 
+- config RT2X00_LIB_PCI
+--	tristate
+-+	tristate "RT2x00 PCI support"
+- 	depends on m
+- 	select RT2X00_LIB
+- 
+- config RT2X00_LIB_SOC
+--	tristate
+-+	tristate "RT2x00 SoC support"
+-+	depends on SOC_RT288X || SOC_RT305X || SOC_MT7620
+- 	depends on m
+- 	select RT2X00_LIB
+- 
+- config RT2X00_LIB_USB
+--	tristate
+-+	tristate "RT2x00 USB support"
+- 	depends on m
+- 	select RT2X00_LIB
+- 
+- config RT2X00_LIB
+--	tristate
+-+	tristate "RT2x00 support"
+- 	depends on m
+- 
+- config RT2X00_LIB_FIRMWARE
+diff --git a/package/kernel/mac80211/patches/rt2x00/501-rt2x00-allow-to-build-rt2800soc-module-for-RT3883.patch b/package/kernel/mac80211/patches/rt2x00/501-rt2x00-allow-to-build-rt2800soc-module-for-RT3883.patch
+deleted file mode 100644
+index b4106b0197..0000000000
+--- a/package/kernel/mac80211/patches/rt2x00/501-rt2x00-allow-to-build-rt2800soc-module-for-RT3883.patch
++++ /dev/null
+@@ -1,30 +0,0 @@
+-From 91094ed065f7794886b4a5490fd6de942f036bb4 Mon Sep 17 00:00:00 2001
+-From: Gabor Juhos <juhosg@openwrt.org>
+-Date: Sun, 24 Mar 2013 19:26:26 +0100
+-Subject: [PATCH] rt2x00: allow to build rt2800soc module for RT3883
+-
+-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+----
+- drivers/net/wireless/ralink/rt2x00/Kconfig |    2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+---- a/drivers/net/wireless/ralink/rt2x00/Kconfig
+-+++ b/drivers/net/wireless/ralink/rt2x00/Kconfig
+-@@ -211,7 +211,7 @@ endif
+- config RT2800SOC
+- 	tristate "Ralink WiSoC support"
+- 	depends on m
+--	depends on SOC_RT288X || SOC_RT305X || SOC_MT7620
+-+	depends on SOC_RT288X || SOC_RT305X || SOC_RT3883 || SOC_MT7620
+- 	select RT2X00_LIB_SOC
+- 	select RT2X00_LIB_MMIO
+- 	select RT2X00_LIB_CRYPTO
+-@@ -246,7 +246,7 @@ config RT2X00_LIB_PCI
+- 
+- config RT2X00_LIB_SOC
+- 	tristate "RT2x00 SoC support"
+--	depends on SOC_RT288X || SOC_RT305X || SOC_MT7620
+-+	depends on SOC_RT288X || SOC_RT305X || SOC_RT3883 || SOC_MT7620
+- 	depends on m
+- 	select RT2X00_LIB
+- 
+diff --git a/package/kernel/mac80211/patches/rt2x00/601-rt2x00-introduce-rt2x00_platform_h.patch b/package/kernel/mac80211/patches/rt2x00/601-rt2x00-introduce-rt2x00_platform_h.patch
+deleted file mode 100644
+index 1e6211a470..0000000000
+--- a/package/kernel/mac80211/patches/rt2x00/601-rt2x00-introduce-rt2x00_platform_h.patch
++++ /dev/null
+@@ -1,32 +0,0 @@
+---- /dev/null
+-+++ b/include/linux/rt2x00_platform.h
+-@@ -0,0 +1,19 @@
+-+/*
+-+ * Platform data definition for the rt2x00 driver
+-+ *
+-+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+-+ *
+-+ * This program is free software; you can redistribute it and/or modify it
+-+ * under the terms of the GNU General Public License version 2 as published
+-+ * by the Free Software Foundation.
+-+ *
+-+ */
+-+
+-+#ifndef _RT2X00_PLATFORM_H
+-+#define _RT2X00_PLATFORM_H
+-+
+-+struct rt2x00_platform_data {
+-+	char *eeprom_file_name;
+-+};
+-+
+-+#endif /* _RT2X00_PLATFORM_H */
+---- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+-@@ -28,6 +28,7 @@
+- #include <linux/average.h>
+- #include <linux/usb.h>
+- #include <linux/clk.h>
+-+#include <linux/rt2x00_platform.h>
+- 
+- #include <net/mac80211.h>
+- 
+diff --git a/package/kernel/mac80211/patches/rt2x00/602-rt2x00-introduce-rt2x00eeprom.patch b/package/kernel/mac80211/patches/rt2x00/602-rt2x00-introduce-rt2x00eeprom.patch
+deleted file mode 100644
+index ab0fa3670d..0000000000
+--- a/package/kernel/mac80211/patches/rt2x00/602-rt2x00-introduce-rt2x00eeprom.patch
++++ /dev/null
+@@ -1,296 +0,0 @@
+---- a/local-symbols
+-+++ b/local-symbols
+-@@ -347,6 +347,7 @@ RT2X00_LIB_FIRMWARE=
+- RT2X00_LIB_CRYPTO=
+- RT2X00_LIB_LEDS=
+- RT2X00_LIB_DEBUGFS=
+-+RT2X00_LIB_EEPROM=
+- RT2X00_DEBUG=
+- WLAN_VENDOR_REALTEK=
+- RTL8180=
+---- a/drivers/net/wireless/ralink/rt2x00/Kconfig
+-+++ b/drivers/net/wireless/ralink/rt2x00/Kconfig
+-@@ -70,6 +70,7 @@ config RT2800PCI
+- 	select RT2X00_LIB_MMIO
+- 	select RT2X00_LIB_PCI
+- 	select RT2X00_LIB_FIRMWARE
+-+	select RT2X00_LIB_EEPROM
+- 	select RT2X00_LIB_CRYPTO
+- 	depends on CRC_CCITT
+- 	depends on EEPROM_93CX6
+-@@ -216,6 +217,7 @@ config RT2800SOC
+- 	select RT2X00_LIB_MMIO
+- 	select RT2X00_LIB_CRYPTO
+- 	select RT2X00_LIB_FIRMWARE
+-+	select RT2X00_LIB_EEPROM
+- 	select RT2800_LIB
+- 	select RT2800_LIB_MMIO
+- 	help
+-@@ -266,6 +268,9 @@ config RT2X00_LIB_FIRMWARE
+- config RT2X00_LIB_CRYPTO
+- 	bool
+- 
+-+config RT2X00_LIB_EEPROM
+-+	bool
+-+
+- config RT2X00_LIB_LEDS
+- 	bool
+- 	default y if (RT2X00_LIB=y && LEDS_CLASS=y) || (RT2X00_LIB=m && LEDS_CLASS!=n)
+---- a/drivers/net/wireless/ralink/rt2x00/Makefile
+-+++ b/drivers/net/wireless/ralink/rt2x00/Makefile
+-@@ -8,6 +8,7 @@ rt2x00lib-$(CPTCFG_RT2X00_LIB_DEBUGFS)	+
+- rt2x00lib-$(CPTCFG_RT2X00_LIB_CRYPTO)	+= rt2x00crypto.o
+- rt2x00lib-$(CPTCFG_RT2X00_LIB_FIRMWARE)	+= rt2x00firmware.o
+- rt2x00lib-$(CPTCFG_RT2X00_LIB_LEDS)	+= rt2x00leds.o
+-+rt2x00lib-$(CPTCFG_RT2X00_LIB_EEPROM)	+= rt2x00eeprom.o
+- 
+- obj-$(CPTCFG_RT2X00_LIB)		+= rt2x00lib.o
+- obj-$(CPTCFG_RT2X00_LIB_MMIO)		+= rt2x00mmio.o
+---- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
+-@@ -47,6 +47,8 @@ struct rt2800_drv_data {
+- 	struct ieee80211_sta *wcid_to_sta[STA_IDS_SIZE];
+- };
+- 
+-+#include "rt2800.h"
+-+
+- struct rt2800_ops {
+- 	u32 (*register_read)(struct rt2x00_dev *rt2x00dev,
+- 			      const unsigned int offset);
+-@@ -145,6 +147,15 @@ static inline int rt2800_read_eeprom(str
+- {
+- 	const struct rt2800_ops *rt2800ops = rt2x00dev->ops->drv;
+- 
+-+	if (rt2x00dev->eeprom_file) {
+-+		memcpy(rt2x00dev->eeprom, rt2x00dev->eeprom_file->data,
+-+		       EEPROM_SIZE);
+-+		return 0;
+-+	}
+-+
+-+	if (!rt2800ops->read_eeprom)
+-+		return -EINVAL;
+-+
+- 	return rt2800ops->read_eeprom(rt2x00dev);
+- }
+- 
+---- a/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
+-@@ -90,19 +90,6 @@ static int rt2800soc_set_device_state(st
+- 	return retval;
+- }
+- 
+--static int rt2800soc_read_eeprom(struct rt2x00_dev *rt2x00dev)
+--{
+--	void __iomem *base_addr = ioremap(0x1F040000, EEPROM_SIZE);
+--
+--	if (!base_addr)
+--		return -ENOMEM;
+--
+--	memcpy_fromio(rt2x00dev->eeprom, base_addr, EEPROM_SIZE);
+--
+--	iounmap(base_addr);
+--	return 0;
+--}
+--
+- /* Firmware functions */
+- static char *rt2800soc_get_firmware_name(struct rt2x00_dev *rt2x00dev)
+- {
+-@@ -168,7 +155,6 @@ static const struct rt2800_ops rt2800soc
+- 	.register_multiread	= rt2x00mmio_register_multiread,
+- 	.register_multiwrite	= rt2x00mmio_register_multiwrite,
+- 	.regbusy_read		= rt2x00mmio_regbusy_read,
+--	.read_eeprom		= rt2800soc_read_eeprom,
+- 	.hwcrypt_disabled	= rt2800soc_hwcrypt_disabled,
+- 	.drv_write_firmware	= rt2800soc_write_firmware,
+- 	.drv_init_registers	= rt2800mmio_init_registers,
+---- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+-@@ -703,6 +703,7 @@ enum rt2x00_capability_flags {
+- 	REQUIRE_HT_TX_DESC,
+- 	REQUIRE_PS_AUTOWAKE,
+- 	REQUIRE_DELAYED_RFKILL,
+-+	REQUIRE_EEPROM_FILE,
+- 
+- 	/*
+- 	 * Capabilities
+-@@ -980,6 +981,11 @@ struct rt2x00_dev {
+- 	const struct firmware *fw;
+- 
+- 	/*
+-+	 * EEPROM image.
+-+	 */
+-+	const struct firmware *eeprom_file;
+-+
+-+	/*
+- 	 * FIFO for storing tx status reports between isr and tasklet.
+- 	 */
+- 	DECLARE_KFIFO_PTR(txstatus_fifo, u32);
+---- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+-@@ -1419,6 +1419,10 @@ int rt2x00lib_probe_dev(struct rt2x00_de
+- 	INIT_DELAYED_WORK(&rt2x00dev->autowakeup_work, rt2x00lib_autowakeup);
+- 	INIT_WORK(&rt2x00dev->sleep_work, rt2x00lib_sleep);
+- 
+-+	retval = rt2x00lib_load_eeprom_file(rt2x00dev);
+-+	if (retval)
+-+		goto exit;
+-+
+- 	/*
+- 	 * Let the driver probe the device to detect the capabilities.
+- 	 */
+-@@ -1559,6 +1563,11 @@ void rt2x00lib_remove_dev(struct rt2x00_
+- 	 * Free the driver data.
+- 	 */
+- 	kfree(rt2x00dev->drv_data);
+-+
+-+	/*
+-+	 * Free EEPROM image.
+-+	 */
+-+	rt2x00lib_free_eeprom_file(rt2x00dev);
+- }
+- EXPORT_SYMBOL_GPL(rt2x00lib_remove_dev);
+- 
+---- /dev/null
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
+-@@ -0,0 +1,106 @@
+-+/*
+-+	Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
+-+	Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
+-+	<http://rt2x00.serialmonkey.com>
+-+
+-+	This program is free software; you can redistribute it and/or modify
+-+	it under the terms of the GNU General Public License as published by
+-+	the Free Software Foundation; either version 2 of the License, or
+-+	(at your option) any later version.
+-+
+-+	This program is distributed in the hope that it will be useful,
+-+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+-+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-+	GNU General Public License for more details.
+-+
+-+	You should have received a copy of the GNU General Public License
+-+	along with this program; if not, write to the
+-+	Free Software Foundation, Inc.,
+-+	59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+-+ */
+-+
+-+/*
+-+	Module: rt2x00lib
+-+	Abstract: rt2x00 eeprom file loading routines.
+-+ */
+-+
+-+#include <linux/kernel.h>
+-+#include <linux/module.h>
+-+
+-+#include "rt2x00.h"
+-+#include "rt2x00lib.h"
+-+
+-+static const char *
+-+rt2x00lib_get_eeprom_file_name(struct rt2x00_dev *rt2x00dev)
+-+{
+-+	struct rt2x00_platform_data *pdata = rt2x00dev->dev->platform_data;
+-+
+-+	if (pdata && pdata->eeprom_file_name)
+-+		return pdata->eeprom_file_name;
+-+
+-+	return NULL;
+-+}
+-+
+-+static int rt2x00lib_request_eeprom_file(struct rt2x00_dev *rt2x00dev)
+-+{
+-+	const struct firmware *ee;
+-+	const char *ee_name;
+-+	int retval;
+-+
+-+	ee_name = rt2x00lib_get_eeprom_file_name(rt2x00dev);
+-+	if (!ee_name && test_bit(REQUIRE_EEPROM_FILE, &rt2x00dev->cap_flags)) {
+-+		rt2x00_err(rt2x00dev, "Required EEPROM name is missing.");
+-+		return -EINVAL;
+-+	}
+-+
+-+	if (!ee_name)
+-+		return 0;
+-+
+-+	rt2x00_info(rt2x00dev, "Loading EEPROM data from '%s'.\n", ee_name);
+-+
+-+	retval = request_firmware(&ee, ee_name, rt2x00dev->dev);
+-+	if (retval) {
+-+		rt2x00_err(rt2x00dev, "Failed to request EEPROM.\n");
+-+		return retval;
+-+	}
+-+
+-+	if (!ee || !ee->size || !ee->data) {
+-+		rt2x00_err(rt2x00dev, "Failed to read EEPROM file.\n");
+-+		retval = -ENOENT;
+-+		goto err_exit;
+-+	}
+-+
+-+	if (ee->size != rt2x00dev->ops->eeprom_size) {
+-+		rt2x00_err(rt2x00dev,
+-+			   "EEPROM file size is invalid, it should be %d bytes\n",
+-+			   rt2x00dev->ops->eeprom_size);
+-+		retval = -EINVAL;
+-+		goto err_release_ee;
+-+	}
+-+
+-+	rt2x00dev->eeprom_file = ee;
+-+	return 0;
+-+
+-+err_release_ee:
+-+	release_firmware(ee);
+-+err_exit:
+-+	return retval;
+-+}
+-+
+-+int rt2x00lib_load_eeprom_file(struct rt2x00_dev *rt2x00dev)
+-+{
+-+	int retval;
+-+
+-+	retval = rt2x00lib_request_eeprom_file(rt2x00dev);
+-+	if (retval)
+-+		return retval;
+-+
+-+	return 0;
+-+}
+-+
+-+void rt2x00lib_free_eeprom_file(struct rt2x00_dev *rt2x00dev)
+-+{
+-+	if (rt2x00dev->eeprom_file && rt2x00dev->eeprom_file->size)
+-+		release_firmware(rt2x00dev->eeprom_file);
+-+	rt2x00dev->eeprom_file = NULL;
+-+}
+---- a/drivers/net/wireless/ralink/rt2x00/rt2x00lib.h
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00lib.h
+-@@ -286,6 +286,22 @@ static inline void rt2x00lib_free_firmwa
+- #endif /* CPTCFG_RT2X00_LIB_FIRMWARE */
+- 
+- /*
+-+ * EEPROM file handlers.
+-+ */
+-+#ifdef CPTCFG_RT2X00_LIB_EEPROM
+-+int rt2x00lib_load_eeprom_file(struct rt2x00_dev *rt2x00dev);
+-+void rt2x00lib_free_eeprom_file(struct rt2x00_dev *rt2x00dev);
+-+#else
+-+static inline int rt2x00lib_load_eeprom_file(struct rt2x00_dev *rt2x00dev)
+-+{
+-+	return 0;
+-+}
+-+static inline void rt2x00lib_free_eeprom_file(struct rt2x00_dev *rt2x00dev)
+-+{
+-+}
+-+#endif /* CPTCFG_RT2X00_LIB_EEPROM */
+-+
+-+/*
+-  * Debugfs handlers.
+-  */
+- #ifdef CPTCFG_RT2X00_LIB_DEBUGFS
+---- a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
+-@@ -86,6 +86,7 @@ int rt2x00soc_probe(struct platform_devi
+- 	if (IS_ERR(rt2x00dev->clk))
+- 		rt2x00dev->clk = NULL;
+- 
+-+	set_bit(REQUIRE_EEPROM_FILE, &rt2x00dev->cap_flags);
+- 	rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_SOC);
+- 
+- 	retval = rt2x00soc_alloc_reg(rt2x00dev);
+diff --git a/package/kernel/mac80211/patches/rt2x00/603-rt2x00-of_load_eeprom_filename.patch b/package/kernel/mac80211/patches/rt2x00/603-rt2x00-of_load_eeprom_filename.patch
+deleted file mode 100644
+index 431e090237..0000000000
+--- a/package/kernel/mac80211/patches/rt2x00/603-rt2x00-of_load_eeprom_filename.patch
++++ /dev/null
+@@ -1,31 +0,0 @@
+---- a/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
+-@@ -26,6 +26,7 @@
+- 
+- #include <linux/kernel.h>
+- #include <linux/module.h>
+-+#include <linux/of.h>
+- 
+- #include "rt2x00.h"
+- #include "rt2x00lib.h"
+-@@ -34,10 +35,20 @@ static const char *
+- rt2x00lib_get_eeprom_file_name(struct rt2x00_dev *rt2x00dev)
+- {
+- 	struct rt2x00_platform_data *pdata = rt2x00dev->dev->platform_data;
+-+#ifdef CONFIG_OF
+-+	struct device_node *np;
+-+	const char *eep;
+-+#endif
+- 
+- 	if (pdata && pdata->eeprom_file_name)
+- 		return pdata->eeprom_file_name;
+- 
+-+#ifdef CONFIG_OF
+-+	np = rt2x00dev->dev->of_node;
+-+	if (np && of_property_read_string(np, "ralink,eeprom", &eep) == 0)
+-+	    return eep;
+-+#endif
+-+
+- 	return NULL;
+- }
+- 
+diff --git a/package/kernel/mac80211/patches/rt2x00/604-rt2x00-load-eeprom-on-SoC-from-a-mtd-device-defines-.patch b/package/kernel/mac80211/patches/rt2x00/604-rt2x00-load-eeprom-on-SoC-from-a-mtd-device-defines-.patch
+deleted file mode 100644
+index 7338eb15b2..0000000000
+--- a/package/kernel/mac80211/patches/rt2x00/604-rt2x00-load-eeprom-on-SoC-from-a-mtd-device-defines-.patch
++++ /dev/null
+@@ -1,113 +0,0 @@
+-From 339fe73f340161a624cc08e738d2244814852c3e Mon Sep 17 00:00:00 2001
+-From: John Crispin <blogic@openwrt.org>
+-Date: Sun, 17 Mar 2013 00:55:04 +0100
+-Subject: [PATCH] rt2x00: load eeprom on SoC from a mtd device defines inside
+- OF
+-
+-Signed-off-by: John Crispin <blogic@openwrt.org>
+----
+- drivers/net/wireless/ralink/rt2x00/Kconfig        |  1 +
+- drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c | 65 +++++++++++++++++++++++
+- 2 files changed, 66 insertions(+)
+-
+---- a/drivers/net/wireless/ralink/rt2x00/Kconfig
+-+++ b/drivers/net/wireless/ralink/rt2x00/Kconfig
+-@@ -220,6 +220,7 @@ config RT2800SOC
+- 	select RT2X00_LIB_EEPROM
+- 	select RT2800_LIB
+- 	select RT2800_LIB_MMIO
+-+	select MTD if SOC_RT288X || SOC_RT305X
+- 	help
+- 	  This adds support for Ralink WiSoC devices.
+- 	  Supported chips: RT2880, RT3050, RT3052, RT3350, RT3352.
+---- a/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
+-@@ -26,11 +26,76 @@
+- 
+- #include <linux/kernel.h>
+- #include <linux/module.h>
+-+#if IS_ENABLED(CONFIG_MTD)
+-+#include <linux/mtd/mtd.h>
+-+#include <linux/mtd/partitions.h>
+-+#endif
+- #include <linux/of.h>
+- 
+- #include "rt2x00.h"
+- #include "rt2x00lib.h"
+- 
+-+#if IS_ENABLED(CONFIG_MTD)
+-+static int rt2800lib_read_eeprom_mtd(struct rt2x00_dev *rt2x00dev)
+-+{
+-+	int ret = -EINVAL;
+-+#ifdef CONFIG_OF
+-+	static struct firmware mtd_fw;
+-+	struct device_node *np = rt2x00dev->dev->of_node, *mtd_np = NULL;
+-+	size_t retlen, len = rt2x00dev->ops->eeprom_size;
+-+	int i, size, offset = 0;
+-+	struct mtd_info *mtd;
+-+	const char *part;
+-+	const __be32 *list;
+-+	phandle phandle;
+-+
+-+	list = of_get_property(np, "ralink,mtd-eeprom", &size);
+-+	if (!list)
+-+		return -ENOENT;
+-+
+-+	phandle = be32_to_cpup(list++);
+-+	if (phandle)
+-+		mtd_np = of_find_node_by_phandle(phandle);
+-+	if (!mtd_np) {
+-+		dev_err(rt2x00dev->dev, "failed to load mtd phandle\n");
+-+		return -EINVAL;
+-+	}
+-+
+-+	part = of_get_property(mtd_np, "label", NULL);
+-+	if (!part)
+-+		part = mtd_np->name;
+-+
+-+	mtd = get_mtd_device_nm(part);
+-+	if (IS_ERR(mtd)) {
+-+		dev_err(rt2x00dev->dev, "failed to get mtd device \"%s\"\n", part);
+-+		return PTR_ERR(mtd);
+-+	}
+-+
+-+	if (size > sizeof(*list))
+-+		offset = be32_to_cpup(list);
+-+
+-+	ret = mtd_read(mtd, offset, len, &retlen, (u_char *) rt2x00dev->eeprom);
+-+	put_mtd_device(mtd);
+-+
+-+	if ((retlen != rt2x00dev->ops->eeprom_size) || ret) {
+-+		dev_err(rt2x00dev->dev, "failed to load eeprom from device \"%s\"\n", part);
+-+		return ret;
+-+	}
+-+
+-+	if (of_find_property(np, "ralink,mtd-eeprom-swap", NULL))
+-+		for (i = 0; i < len/sizeof(u16); i++)
+-+			rt2x00dev->eeprom[i] = swab16(rt2x00dev->eeprom[i]);
+-+
+-+	rt2x00dev->eeprom_file = &mtd_fw;
+-+	mtd_fw.data = (const u8 *) rt2x00dev->eeprom;
+-+
+-+	dev_info(rt2x00dev->dev, "loaded eeprom from mtd device \"%s\"\n", part);
+-+#endif
+-+
+-+	return ret;
+-+}
+-+#endif
+-+
+- static const char *
+- rt2x00lib_get_eeprom_file_name(struct rt2x00_dev *rt2x00dev)
+- {
+-@@ -58,6 +123,11 @@ static int rt2x00lib_request_eeprom_file
+- 	const char *ee_name;
+- 	int retval;
+- 
+-+#if IS_ENABLED(CONFIG_MTD)
+-+	if (!rt2800lib_read_eeprom_mtd(rt2x00dev))
+-+		return 0;
+-+#endif
+-+
+- 	ee_name = rt2x00lib_get_eeprom_file_name(rt2x00dev);
+- 	if (!ee_name && test_bit(REQUIRE_EEPROM_FILE, &rt2x00dev->cap_flags)) {
+- 		rt2x00_err(rt2x00dev, "Required EEPROM name is missing.");
+diff --git a/package/kernel/mac80211/patches/rt2x00/606-rt2x00-allow_disabling_bands_through_platform_data.patch b/package/kernel/mac80211/patches/rt2x00/606-rt2x00-allow_disabling_bands_through_platform_data.patch
+deleted file mode 100644
+index ffee2189d2..0000000000
+--- a/package/kernel/mac80211/patches/rt2x00/606-rt2x00-allow_disabling_bands_through_platform_data.patch
++++ /dev/null
+@@ -1,47 +0,0 @@
+---- a/include/linux/rt2x00_platform.h
+-+++ b/include/linux/rt2x00_platform.h
+-@@ -14,6 +14,9 @@
+- 
+- struct rt2x00_platform_data {
+- 	char *eeprom_file_name;
+-+
+-+	int disable_2ghz;
+-+	int disable_5ghz;
+- };
+- 
+- #endif /* _RT2X00_PLATFORM_H */
+---- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+-@@ -1007,6 +1007,22 @@ static int rt2x00lib_probe_hw_modes(stru
+- 	unsigned int num_rates;
+- 	unsigned int i;
+- 
+-+	if (rt2x00dev->dev->platform_data) {
+-+		struct rt2x00_platform_data *pdata;
+-+
+-+		pdata = rt2x00dev->dev->platform_data;
+-+		if (pdata->disable_2ghz)
+-+			spec->supported_bands &= ~SUPPORT_BAND_2GHZ;
+-+		if (pdata->disable_5ghz)
+-+			spec->supported_bands &= ~SUPPORT_BAND_5GHZ;
+-+	}
+-+
+-+	if ((spec->supported_bands & SUPPORT_BAND_BOTH) == 0) {
+-+		rt2x00_err(rt2x00dev, "No supported bands\n");
+-+		return -EINVAL;
+-+	}
+-+
+-+
+- 	num_rates = 0;
+- 	if (spec->supported_rates & SUPPORT_RATE_CCK)
+- 		num_rates += 4;
+---- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+-@@ -408,6 +408,7 @@ struct hw_mode_spec {
+- 	unsigned int supported_bands;
+- #define SUPPORT_BAND_2GHZ	0x00000001
+- #define SUPPORT_BAND_5GHZ	0x00000002
+-+#define SUPPORT_BAND_BOTH	(SUPPORT_BAND_2GHZ | SUPPORT_BAND_5GHZ)
+- 
+- 	unsigned int supported_rates;
+- #define SUPPORT_RATE_CCK	0x00000001
+diff --git a/package/kernel/mac80211/patches/rt2x00/607-rt2x00-add_platform_data_mac_addr.patch b/package/kernel/mac80211/patches/rt2x00/607-rt2x00-add_platform_data_mac_addr.patch
+deleted file mode 100644
+index 37553bb80a..0000000000
+--- a/package/kernel/mac80211/patches/rt2x00/607-rt2x00-add_platform_data_mac_addr.patch
++++ /dev/null
+@@ -1,25 +0,0 @@
+---- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+-@@ -989,6 +989,12 @@ static void rt2x00lib_rate(struct ieee80
+- 
+- void rt2x00lib_set_mac_address(struct rt2x00_dev *rt2x00dev, u8 *eeprom_mac_addr)
+- {
+-+	struct rt2x00_platform_data *pdata;
+-+
+-+	pdata = rt2x00dev->dev->platform_data;
+-+	if (pdata && pdata->mac_address)
+-+		ether_addr_copy(eeprom_mac_addr, pdata->mac_address);
+-+
+- 	of_get_mac_address(rt2x00dev->dev->of_node, eeprom_mac_addr);
+- 
+- 	if (!is_valid_ether_addr(eeprom_mac_addr)) {
+---- a/include/linux/rt2x00_platform.h
+-+++ b/include/linux/rt2x00_platform.h
+-@@ -14,6 +14,7 @@
+- 
+- struct rt2x00_platform_data {
+- 	char *eeprom_file_name;
+-+	const u8 *mac_address;
+- 
+- 	int disable_2ghz;
+- 	int disable_5ghz;
+diff --git a/package/kernel/mac80211/patches/rt2x00/608-rt2x00-allow_disabling_bands_through_dts.patch b/package/kernel/mac80211/patches/rt2x00/608-rt2x00-allow_disabling_bands_through_dts.patch
+deleted file mode 100644
+index 6211809c0a..0000000000
+--- a/package/kernel/mac80211/patches/rt2x00/608-rt2x00-allow_disabling_bands_through_dts.patch
++++ /dev/null
+@@ -1,19 +0,0 @@
+---- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+-@@ -1012,6 +1012,16 @@ static int rt2x00lib_probe_hw_modes(stru
+- 	struct ieee80211_rate *rates;
+- 	unsigned int num_rates;
+- 	unsigned int i;
+-+#ifdef CONFIG_OF
+-+	struct device_node *np = rt2x00dev->dev->of_node;
+-+	unsigned int enabled;
+-+	if (!of_property_read_u32(np, "ralink,2ghz",
+-+                                          &enabled) && !enabled)
+-+		spec->supported_bands &= ~SUPPORT_BAND_2GHZ;
+-+	if (!of_property_read_u32(np, "ralink,5ghz",
+-+                                          &enabled) && !enabled)
+-+		spec->supported_bands &= ~SUPPORT_BAND_5GHZ;
+-+#endif /* CONFIG_OF */
+- 
+- 	if (rt2x00dev->dev->platform_data) {
+- 		struct rt2x00_platform_data *pdata;
+diff --git a/package/kernel/mac80211/patches/rt2x00/609-rt2x00-make-wmac-loadable-via-OF-on-rt288x-305x-SoC.patch b/package/kernel/mac80211/patches/rt2x00/609-rt2x00-make-wmac-loadable-via-OF-on-rt288x-305x-SoC.patch
+deleted file mode 100644
+index 8964f8bf10..0000000000
+--- a/package/kernel/mac80211/patches/rt2x00/609-rt2x00-make-wmac-loadable-via-OF-on-rt288x-305x-SoC.patch
++++ /dev/null
+@@ -1,33 +0,0 @@
+-From 04dbd87265f6ba4a373b211ba324b437d224fb2d Mon Sep 17 00:00:00 2001
+-From: John Crispin <blogic@openwrt.org>
+-Date: Sun, 17 Mar 2013 00:03:31 +0100
+-Subject: [PATCH 21/38] rt2x00: make wmac loadable via OF on rt288x/305x SoC
+-
+-This patch ads the match table to allow loading the wmac support from a
+-devicetree.
+-
+-Signed-off-by: John Crispin <blogic@openwrt.org>
+----
+- drivers/net/wireless/ralink/rt2x00/rt2800pci.c |    7 +++++++
+- 1 file changed, 7 insertions(+)
+-
+---- a/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
+-@@ -225,10 +225,17 @@ static int rt2800soc_probe(struct platfo
+- 	return rt2x00soc_probe(pdev, &rt2800soc_ops);
+- }
+- 
+-+static const struct of_device_id rt2880_wmac_match[] = {
+-+	{ .compatible = "ralink,rt2880-wmac" },
+-+	{},
+-+};
+-+MODULE_DEVICE_TABLE(of, rt2880_wmac_match);
+-+
+- static struct platform_driver rt2800soc_driver = {
+- 	.driver		= {
+- 		.name		= "rt2800_wmac",
+- 		.mod_name	= KBUILD_MODNAME,
+-+		.of_match_table	= rt2880_wmac_match,
+- 	},
+- 	.probe		= rt2800soc_probe,
+- 	.remove		= rt2x00soc_remove,
+diff --git a/package/kernel/mac80211/patches/rt2x00/610-rt2x00-change-led-polarity-from-OF.patch b/package/kernel/mac80211/patches/rt2x00/610-rt2x00-change-led-polarity-from-OF.patch
+deleted file mode 100644
+index acc8a8edb8..0000000000
+--- a/package/kernel/mac80211/patches/rt2x00/610-rt2x00-change-led-polarity-from-OF.patch
++++ /dev/null
+@@ -1,40 +0,0 @@
+---- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+-@@ -25,6 +25,7 @@
+- #include <linux/kernel.h>
+- #include <linux/module.h>
+- #include <linux/slab.h>
+-+#include <linux/of.h>
+- 
+- #include "rt2x00.h"
+- #include "rt2800lib.h"
+-@@ -11131,6 +11132,17 @@ static int rt2800_init_eeprom(struct rt2
+- 	rt2800_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
+- 	rt2800_init_led(rt2x00dev, &rt2x00dev->led_qual, LED_TYPE_QUALITY);
+- 
+-+	{
+-+		struct device_node *np = rt2x00dev->dev->of_node;
+-+		unsigned int led_polarity;
+-+
+-+		/* Allow overriding polarity from OF */
+-+		if (!of_property_read_u32(np, "ralink,led-polarity",
+-+					  &led_polarity))
+-+			rt2x00_set_field16(&eeprom, EEPROM_FREQ_LED_POLARITY,
+-+					   led_polarity);
+-+	}
+-+
+- 	rt2x00dev->led_mcu_reg = eeprom;
+- #endif /* CPTCFG_RT2X00_LIB_LEDS */
+- 
+---- a/drivers/net/wireless/ralink/rt2x00/rt2x00leds.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00leds.c
+-@@ -98,6 +98,9 @@ static int rt2x00leds_register_led(struc
+- 	led->led_dev.name = name;
+- 	led->led_dev.brightness = LED_OFF;
+- 
+-+	if (rt2x00_is_soc(rt2x00dev))
+-+		led->led_dev.brightness_set(&led->led_dev, LED_OFF);
+-+
+- 	retval = led_classdev_register(device, &led->led_dev);
+- 	if (retval) {
+- 		rt2x00_err(rt2x00dev, "Failed to register led handler\n");
+diff --git a/package/kernel/mac80211/patches/rt2x00/611-rt2x00-add-AP+STA-support.patch b/package/kernel/mac80211/patches/rt2x00/611-rt2x00-add-AP+STA-support.patch
+deleted file mode 100644
+index 5ef5fc8def..0000000000
+--- a/package/kernel/mac80211/patches/rt2x00/611-rt2x00-add-AP+STA-support.patch
++++ /dev/null
+@@ -1,11 +0,0 @@
+---- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+-@@ -1358,7 +1358,7 @@ static inline void rt2x00lib_set_if_comb
+- 	 */
+- 	if_limit = &rt2x00dev->if_limits_ap;
+- 	if_limit->max = rt2x00dev->ops->max_ap_intf;
+--	if_limit->types = BIT(NL80211_IFTYPE_AP);
+-+	if_limit->types = BIT(NL80211_IFTYPE_AP) | BIT(NL80211_IFTYPE_STATION);
+- #ifdef CPTCFG_MAC80211_MESH
+- 	if_limit->types |= BIT(NL80211_IFTYPE_MESH_POINT);
+- #endif
+diff --git a/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch b/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
+deleted file mode 100644
+index deaa03be6c..0000000000
+--- a/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
++++ /dev/null
+@@ -1,161 +0,0 @@
+-From 0fce1109f894ec7fcd72cb098843a1eff786716a Mon Sep 17 00:00:00 2001
+-From: Daniel Golle <daniel@makrotopia.org>
+-Date: Fri, 16 Sep 2022 20:49:42 +0100
+-Subject: [PATCH 16/16] rt2x00: import support for external LNA on MT7620
+-To: linux-wireless@vger.kernel.org,
+-    Stanislaw Gruszka <stf_xl@wp.pl>,
+-    Helmut Schaa <helmut.schaa@googlemail.com>
+-Cc: Kalle Valo <kvalo@kernel.org>,
+-    David S. Miller <davem@davemloft.net>,
+-    Eric Dumazet <edumazet@google.com>,
+-    Jakub Kicinski <kuba@kernel.org>,
+-    Paolo Abeni <pabeni@redhat.com>,
+-    Johannes Berg <johannes.berg@intel.com>
+-
+-In order to carry out calibration on boards with ePA or eLNA the PA pin
+-needs to be switch to GPIO mode on MT7620. Implement that by selecting
+-pinctrl state "pa_gpio" which should be defined for MT7620 boards with
+-eLNA or ePA beside the "default" state.
+-
+-Reported-by: Serge Vasilugin <vasilugin@yandex.ru>
+-Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+----
+- .../net/wireless/ralink/rt2x00/rt2800lib.c    | 58 +++++++++++++++++++
+- drivers/net/wireless/ralink/rt2x00/rt2x00.h   |  5 ++
+- .../net/wireless/ralink/rt2x00/rt2x00soc.c    | 15 +++++
+- 3 files changed, 78 insertions(+)
+-
+---- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+-@@ -304,6 +304,24 @@ static void rt2800_rf_write(struct rt2x0
+- 	mutex_unlock(&rt2x00dev->csr_mutex);
+- }
+- 
+-+void rt6352_enable_pa_pin(struct rt2x00_dev *rt2x00dev, int enable)
+-+{
+-+	if (!rt2x00dev->pinctrl)
+-+		return;
+-+
+-+	if (enable) {
+-+		if (!rt2x00dev->pins_default)
+-+			return;
+-+
+-+		pinctrl_select_state(rt2x00dev->pinctrl, rt2x00dev->pins_default);
+-+	} else {
+-+		if (!rt2x00dev->pins_pa_gpio)
+-+			return;
+-+
+-+		pinctrl_select_state(rt2x00dev->pinctrl, rt2x00dev->pins_pa_gpio);
+-+	}
+-+}
+-+
+- static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = {
+- 	[EEPROM_CHIP_ID]		= 0x0000,
+- 	[EEPROM_VERSION]		= 0x0001,
+-@@ -4469,6 +4487,29 @@ static void rt2800_config_channel(struct
+- 			rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN,
+- 					      0x6C6C6B6C);
+- 		}
+-+
+-+		if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+-+			reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
+-+			reg |= 0x00000101;
+-+			rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
+-+
+-+			reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
+-+			reg |= 0x00000101;
+-+			rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
+-+
+-+			rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
+-+			rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
+-+			rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
+-+			rt2800_bbp_write(rt2x00dev, 75, 0x68);
+-+			rt2800_bbp_write(rt2x00dev, 76, 0x4C);
+-+			rt2800_bbp_write(rt2x00dev, 79, 0x1C);
+-+			rt2800_bbp_write(rt2x00dev, 80, 0x0C);
+-+			rt2800_bbp_write(rt2x00dev, 82, 0xB6);
+-+			/* bank 0 RF reg 42 and glrt BBP reg 141 will be set in
+-+			 * config channel function in dependence of channel and
+-+			 * HT20/HT40 so don't touch it
+-+			 */
+-+		}
+- 	}
+- 
+- 	bbp = rt2800_bbp_read(rt2x00dev, 4);
+-@@ -10583,6 +10624,7 @@ static void rt2800_init_rfcsr_6352(struc
+- 	rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
+- 	rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
+- 
+-+	rt6352_enable_pa_pin(rt2x00dev, 0);
+- 	rt2800_r_calibration(rt2x00dev);
+- 	rt2800_rf_self_txdc_cal(rt2x00dev);
+- 	rt2800_rxdcoc_calibration(rt2x00dev);
+-@@ -10590,6 +10632,22 @@ static void rt2800_init_rfcsr_6352(struc
+- 	rt2800_bw_filter_calibration(rt2x00dev, false);
+- 	rt2800_loft_iq_calibration(rt2x00dev);
+- 	rt2800_rxiq_calibration(rt2x00dev);
+-+	rt6352_enable_pa_pin(rt2x00dev, 1);
+-+
+-+	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
+-+		rt2800_bbp_write(rt2x00dev, 75, 0x68);
+-+		rt2800_bbp_write(rt2x00dev, 76, 0x4C);
+-+		rt2800_bbp_write(rt2x00dev, 79, 0x1C);
+-+		rt2800_bbp_write(rt2x00dev, 80, 0x0C);
+-+		rt2800_bbp_write(rt2x00dev, 82, 0xB6);
+-+		/* bank 0 RF reg 42 and glrt BBP reg 141 will be set in config
+-+		 * channel function in dependence of channel and HT20/HT40,
+-+		 * so don't touch them here.
+-+		 */
+-+	}
+- }
+- 
+- static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
+---- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+-@@ -28,6 +28,7 @@
+- #include <linux/average.h>
+- #include <linux/usb.h>
+- #include <linux/clk.h>
+-+#include <linux/pinctrl/consumer.h>
+- #include <linux/rt2x00_platform.h>
+- 
+- #include <net/mac80211.h>
+-@@ -1029,6 +1030,11 @@ struct rt2x00_dev {
+- 
+- 	/* Clock for System On Chip devices. */
+- 	struct clk *clk;
+-+
+-+	/* pinctrl and states for System On Chip devices with PA/LNA. */
+-+	struct pinctrl *pinctrl;
+-+	struct pinctrl_state *pins_default;
+-+	struct pinctrl_state *pins_pa_gpio;
+- };
+- 
+- struct rt2x00_bar_list_entry {
+---- a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
+-@@ -97,6 +97,21 @@ int rt2x00soc_probe(struct platform_devi
+- 	if (retval)
+- 		goto exit_free_reg;
+- 
+-+	rt2x00dev->pinctrl = devm_pinctrl_get(&pdev->dev);
+-+	if (IS_ERR(rt2x00dev->pinctrl)) {
+-+		rt2x00dev->pinctrl = NULL;
+-+		rt2x00dev->pins_default = NULL;
+-+		rt2x00dev->pins_pa_gpio = NULL;
+-+	} else {
+-+		rt2x00dev->pins_default = pinctrl_lookup_state(rt2x00dev->pinctrl, "default");
+-+		if (IS_ERR(rt2x00dev->pins_default))
+-+			rt2x00dev->pins_default = NULL;
+-+
+-+		rt2x00dev->pins_pa_gpio = pinctrl_lookup_state(rt2x00dev->pinctrl, "pa_gpio");
+-+		if (IS_ERR(rt2x00dev->pins_pa_gpio))
+-+			rt2x00dev->pins_pa_gpio = NULL;
+-+	}
+-+
+- 	return 0;
+- 
+- exit_free_reg:
+diff --git a/package/kernel/mac80211/patches/rt2x00/995-rt2x00-mt7620-introduce-accessors-for-CHIP_VER-register.patch b/package/kernel/mac80211/patches/rt2x00/995-rt2x00-mt7620-introduce-accessors-for-CHIP_VER-register.patch
+deleted file mode 100644
+index 97a56de2b3..0000000000
+--- a/package/kernel/mac80211/patches/rt2x00/995-rt2x00-mt7620-introduce-accessors-for-CHIP_VER-register.patch
++++ /dev/null
+@@ -1,139 +0,0 @@
+---- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
+-@@ -78,6 +78,9 @@ struct rt2800_ops {
+- 	int (*drv_init_registers)(struct rt2x00_dev *rt2x00dev);
+- 	__le32 *(*drv_get_txwi)(struct queue_entry *entry);
+- 	unsigned int (*drv_get_dma_done)(struct data_queue *queue);
+-+	int (*hw_get_chippkg)(void);
+-+	int (*hw_get_chipver)(void);
+-+	int (*hw_get_chipeco)(void);
+- };
+- 
+- static inline u32 rt2800_register_read(struct rt2x00_dev *rt2x00dev,
+-@@ -195,6 +198,27 @@ static inline unsigned int rt2800_drv_ge
+- 	return rt2800ops->drv_get_dma_done(queue);
+- }
+- 
+-+static inline int rt2800_hw_get_chippkg(struct rt2x00_dev *rt2x00dev)
+-+{
+-+	const struct rt2800_ops *rt2800ops = rt2x00dev->ops->drv;
+-+
+-+	return rt2800ops->hw_get_chippkg();
+-+}
+-+
+-+static inline int rt2800_hw_get_chipver(struct rt2x00_dev *rt2x00dev)
+-+{
+-+	const struct rt2800_ops *rt2800ops = rt2x00dev->ops->drv;
+-+
+-+	return rt2800ops->hw_get_chipver();
+-+}
+-+
+-+static inline int rt2800_hw_get_chipeco(struct rt2x00_dev *rt2x00dev)
+-+{
+-+	const struct rt2800_ops *rt2800ops = rt2x00dev->ops->drv;
+-+
+-+	return rt2800ops->hw_get_chipeco();
+-+}
+-+
+- void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev,
+- 			const u8 command, const u8 token,
+- 			const u8 arg0, const u8 arg1);
+---- a/drivers/net/wireless/ralink/rt2x00/rt2800pci.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800pci.c
+-@@ -286,6 +286,10 @@ static int rt2800pci_read_eeprom(struct
+- 	return retval;
+- }
+- 
+-+static int rt2800pci_get_chippkg(void) { return 0; }
+-+static int rt2800pci_get_chipver(void) { return 0; }
+-+static int rt2800pci_get_chipeco(void) { return 0; }
+-+
+- static const struct ieee80211_ops rt2800pci_mac80211_ops = {
+- 	.tx			= rt2x00mac_tx,
+- 	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+-@@ -329,6 +333,9 @@ static const struct rt2800_ops rt2800pci
+- 	.drv_init_registers	= rt2800mmio_init_registers,
+- 	.drv_get_txwi		= rt2800mmio_get_txwi,
+- 	.drv_get_dma_done	= rt2800mmio_get_dma_done,
+-+	.hw_get_chippkg		= rt2800pci_get_chippkg,
+-+	.hw_get_chipver		= rt2800pci_get_chipver,
+-+	.hw_get_chipeco		= rt2800pci_get_chipeco,
+- };
+- 
+- static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = {
+---- a/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
+-@@ -27,6 +27,12 @@
+- #include "rt2800lib.h"
+- #include "rt2800mmio.h"
+- 
+-+/* Needed to probe CHIP_VER register on MT7620 */
+-+#ifdef CONFIG_SOC_MT7620
+-+#include <asm/mach-ralink/ralink_regs.h>
+-+#include <asm/mach-ralink/mt7620.h>
+-+#endif
+-+
+- /* Allow hardware encryption to be disabled. */
+- static bool modparam_nohwcrypt;
+- module_param_named(nohwcrypt, modparam_nohwcrypt, bool, 0444);
+-@@ -118,6 +124,27 @@ static int rt2800soc_write_firmware(stru
+- 	return 0;
+- }
+- 
+-+#ifdef CONFIG_SOC_MT7620
+-+static int rt2800soc_get_chippkg(void)
+-+{
+-+	return mt7620_get_pkg();
+-+}
+-+
+-+static int rt2800soc_get_chipver(void)
+-+{
+-+	return mt7620_get_chipver();
+-+}
+-+
+-+static int rt2800soc_get_chipeco(void)
+-+{
+-+	return mt7620_get_eco();
+-+}
+-+#else
+-+static int rt2800soc_get_chippkg(void) { return 0; }
+-+static int rt2800soc_get_chipver(void) { return 0; }
+-+static int rt2800soc_get_chipeco(void) { return 0; }
+-+#endif
+-+
+- static const struct ieee80211_ops rt2800soc_mac80211_ops = {
+- 	.tx			= rt2x00mac_tx,
+- 	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+-@@ -160,6 +187,9 @@ static const struct rt2800_ops rt2800soc
+- 	.drv_init_registers	= rt2800mmio_init_registers,
+- 	.drv_get_txwi		= rt2800mmio_get_txwi,
+- 	.drv_get_dma_done	= rt2800mmio_get_dma_done,
+-+	.hw_get_chippkg		= rt2800soc_get_chippkg,
+-+	.hw_get_chipver		= rt2800soc_get_chipver,
+-+	.hw_get_chipeco		= rt2800soc_get_chipeco,
+- };
+- 
+- static const struct rt2x00lib_ops rt2800soc_rt2x00_ops = {
+---- a/drivers/net/wireless/ralink/rt2x00/rt2800usb.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800usb.c
+-@@ -628,6 +628,10 @@ static int rt2800usb_probe_hw(struct rt2
+- 	return 0;
+- }
+- 
+-+static int rt2800usb_get_chippkg(void) { return 0; }
+-+static int rt2800usb_get_chipver(void) { return 0; }
+-+static int rt2800usb_get_chipeco(void) { return 0; }
+-+
+- static const struct ieee80211_ops rt2800usb_mac80211_ops = {
+- 	.tx			= rt2x00mac_tx,
+- 	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+-@@ -672,6 +676,9 @@ static const struct rt2800_ops rt2800usb
+- 	.drv_init_registers	= rt2800usb_init_registers,
+- 	.drv_get_txwi		= rt2800usb_get_txwi,
+- 	.drv_get_dma_done	= rt2800usb_get_dma_done,
+-+	.hw_get_chippkg		= rt2800usb_get_chippkg,
+-+	.hw_get_chipver		= rt2800usb_get_chipver,
+-+	.hw_get_chipeco		= rt2800usb_get_chipeco,
+- };
+- 
+- static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = {
+diff --git a/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch b/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
+deleted file mode 100644
+index dab6e05ffd..0000000000
+--- a/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
++++ /dev/null
+@@ -1,408 +0,0 @@
+---- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
+-@@ -1044,6 +1044,11 @@
+- #define MIMO_PS_CFG_RX_STBY_POL		FIELD32(0x00000010)
+- #define MIMO_PS_CFG_RX_RX_STBY0		FIELD32(0x00000020)
+- 
+-+#define BB_PA_MODE_CFG0			0x1214
+-+#define BB_PA_MODE_CFG1			0x1218
+-+#define RF_PA_MODE_CFG0			0x121C
+-+#define RF_PA_MODE_CFG1			0x1220
+-+
+- /*
+-  * EDCA_AC0_CFG:
+-  */
+---- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+-@@ -3778,14 +3778,16 @@ static void rt2800_config_channel_rf7620
+- 	rt2x00_set_field8(&rfcsr, RFCSR19_K, rf->rf4);
+- 	rt2800_rfcsr_write(rt2x00dev, 19, rfcsr);
+- 
+--	/* Default: XO=20MHz , SDM mode */
+--	rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
+--	rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
+--	rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
+--
+--	rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
+--	rt2x00_set_field8(&rfcsr, RFCSR21_BIT8, 1);
+--	rt2800_rfcsr_write(rt2x00dev, 21, rfcsr);
+-+	if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
+-+		/* Default: XO=20MHz , SDM mode */
+-+		rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
+-+		rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
+-+		rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
+-+
+-+		rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
+-+		rt2x00_set_field8(&rfcsr, RFCSR21_BIT8, 1);
+-+		rt2800_rfcsr_write(rt2x00dev, 21, rfcsr);
+-+	}
+- 
+- 	rfcsr = rt2800_rfcsr_read(rt2x00dev, 1);
+- 	rt2x00_set_field8(&rfcsr, RFCSR1_TX2_EN_MT7620,
+-@@ -3819,18 +3821,23 @@ static void rt2800_config_channel_rf7620
+- 		rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x20);
+- 	}
+- 
+--	if (conf_is_ht40(conf)) {
+--		rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x08);
+--		rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x08);
+--	} else {
+--		rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x28);
+--		rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x28);
+-+	if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
+-+		if (conf_is_ht40(conf)) {
+-+			rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x08);
+-+			rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x08);
+-+		} else {
+-+			rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x28);
+-+			rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x28);
+-+		}
+- 	}
+- 
+--	rfcsr = rt2800_rfcsr_read(rt2x00dev, 28);
+--	rt2x00_set_field8(&rfcsr, RFCSR28_CH11_HT40,
+--			  conf_is_ht40(conf) && (rf->channel == 11));
+--	rt2800_rfcsr_write(rt2x00dev, 28, rfcsr);
+-+	if (rt2800_hw_get_chipver(rt2x00dev) > 1 &&
+-+	    rt2800_hw_get_chipeco(rt2x00dev) == 2) {
+-+		rfcsr = rt2800_rfcsr_read(rt2x00dev, 28);
+-+		rt2x00_set_field8(&rfcsr, RFCSR28_CH11_HT40,
+-+				  conf_is_ht40(conf) && (rf->channel == 11));
+-+		rt2800_rfcsr_write(rt2x00dev, 28, rfcsr);
+-+	}
+- 
+- 	if (!test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags)) {
+- 		if (conf_is_ht40(conf)) {
+-@@ -3929,25 +3936,29 @@ static void rt2800_config_alc(struct rt2
+- 	if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev, MAC_STATUS_CFG_BBP_RF_BUSY)))
+- 		rt2x00_warn(rt2x00dev, "RF busy while configuring ALC\n");
+- 
+--	if (chan->center_freq > 2457) {
+--		bbp = rt2800_bbp_read(rt2x00dev, 30);
+--		bbp = 0x40;
+--		rt2800_bbp_write(rt2x00dev, 30, bbp);
+--		rt2800_rfcsr_write(rt2x00dev, 39, 0);
+--		if (rt2x00_has_cap_external_lna_bg(rt2x00dev))
+--			rt2800_rfcsr_write(rt2x00dev, 42, 0xfb);
+--		else
+--			rt2800_rfcsr_write(rt2x00dev, 42, 0x7b);
+--	} else {
+--		bbp = rt2800_bbp_read(rt2x00dev, 30);
+--		bbp = 0x1f;
+--		rt2800_bbp_write(rt2x00dev, 30, bbp);
+--		rt2800_rfcsr_write(rt2x00dev, 39, 0x80);
+--		if (rt2x00_has_cap_external_lna_bg(rt2x00dev))
+--			rt2800_rfcsr_write(rt2x00dev, 42, 0xdb);
+--		else
+--			rt2800_rfcsr_write(rt2x00dev, 42, 0x5b);
+-+	if (rt2800_hw_get_chipver(rt2x00dev) > 1 &&
+-+	    rt2800_hw_get_chipeco(rt2x00dev) >= 2) {
+-+		if (chan->center_freq > 2457) {
+-+			bbp = rt2800_bbp_read(rt2x00dev, 30);
+-+			bbp = 0x40;
+-+			rt2800_bbp_write(rt2x00dev, 30, bbp);
+-+			rt2800_rfcsr_write(rt2x00dev, 39, 0);
+-+			if (rt2x00_has_cap_external_lna_bg(rt2x00dev))
+-+				rt2800_rfcsr_write(rt2x00dev, 42, 0xfb);
+-+			else
+-+				rt2800_rfcsr_write(rt2x00dev, 42, 0x7b);
+-+		} else {
+-+			bbp = rt2800_bbp_read(rt2x00dev, 30);
+-+			bbp = 0x1f;
+-+			rt2800_bbp_write(rt2x00dev, 30, bbp);
+-+			rt2800_rfcsr_write(rt2x00dev, 39, 0x80);
+-+			if (rt2x00_has_cap_external_lna_bg(rt2x00dev))
+-+				rt2800_rfcsr_write(rt2x00dev, 42, 0xdb);
+-+			else
+-+				rt2800_rfcsr_write(rt2x00dev, 42, 0x5b);
+-+		}
+- 	}
+-+
+- 	rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, mac_sys_ctrl);
+- 
+- 	rt2800_vco_calibration(rt2x00dev);
+-@@ -6011,18 +6022,33 @@ static int rt2800_init_registers(struct
+- 	} else if (rt2x00_rt(rt2x00dev, RT5350)) {
+- 		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
+- 	} else if (rt2x00_rt(rt2x00dev, RT6352)) {
+--		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000401);
+--		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0001);
+--		rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
+--		rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x00000000);
+--		rt2800_register_write(rt2x00dev, TX0_BB_GAIN_ATTEN, 0x0);
+--		rt2800_register_write(rt2x00dev, TX1_BB_GAIN_ATTEN, 0x0);
+--		rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6C6C666C);
+--		rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6C6C666C);
+--		rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT,
+--				      0x3630363A);
+--		rt2800_register_write(rt2x00dev, TX1_RF_GAIN_CORRECT,
+--				      0x3630363A);
+-+		if (rt2800_hw_get_chipver(rt2x00dev) <= 1) {
+-+			rt2800_register_write(rt2x00dev, TX_ALC_VGA3,
+-+					      0x00000000);
+-+			rt2800_register_write(rt2x00dev, BB_PA_MODE_CFG0,
+-+					      0x000055FF);
+-+			rt2800_register_write(rt2x00dev, BB_PA_MODE_CFG1,
+-+					      0x00550055);
+-+			rt2800_register_write(rt2x00dev, RF_PA_MODE_CFG0,
+-+					      0x000055FF);
+-+			rt2800_register_write(rt2x00dev, RF_PA_MODE_CFG1,
+-+					      0x00550055);
+-+		} else {
+-+			rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000401);
+-+			rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0001);
+-+			rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
+-+			rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x00000000);
+-+			rt2800_register_write(rt2x00dev, TX0_BB_GAIN_ATTEN, 0x0);
+-+			rt2800_register_write(rt2x00dev, TX1_BB_GAIN_ATTEN, 0x0);
+-+			rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN,
+-+					      0x6C6C666C);
+-+			rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN,
+-+					      0x6C6C666C);
+-+			rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT,
+-+					      0x3630363A);
+-+			rt2800_register_write(rt2x00dev, TX1_RF_GAIN_CORRECT,
+-+					      0x3630363A);
+-+		}
+- 		reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
+- 		rt2x00_set_field32(&reg, TX_ALC_CFG_1_ROS_BUSY_EN, 0);
+- 		rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
+-@@ -7127,14 +7153,16 @@ static void rt2800_init_bbp_6352(struct
+- 	rt2800_bbp_write(rt2x00dev, 188, 0x00);
+- 	rt2800_bbp_write(rt2x00dev, 189, 0x00);
+- 
+--	rt2800_bbp_write(rt2x00dev, 91, 0x06);
+--	rt2800_bbp_write(rt2x00dev, 92, 0x04);
+--	rt2800_bbp_write(rt2x00dev, 93, 0x54);
+--	rt2800_bbp_write(rt2x00dev, 99, 0x50);
+--	rt2800_bbp_write(rt2x00dev, 148, 0x84);
+--	rt2800_bbp_write(rt2x00dev, 167, 0x80);
+--	rt2800_bbp_write(rt2x00dev, 178, 0xFF);
+--	rt2800_bbp_write(rt2x00dev, 106, 0x13);
+-+	if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
+-+		rt2800_bbp_write(rt2x00dev, 91, 0x06);
+-+		rt2800_bbp_write(rt2x00dev, 92, 0x04);
+-+		rt2800_bbp_write(rt2x00dev, 93, 0x54);
+-+		rt2800_bbp_write(rt2x00dev, 99, 0x50);
+-+		rt2800_bbp_write(rt2x00dev, 148, 0x84);
+-+		rt2800_bbp_write(rt2x00dev, 167, 0x80);
+-+		rt2800_bbp_write(rt2x00dev, 178, 0xFF);
+-+		rt2800_bbp_write(rt2x00dev, 106, 0x13);
+-+	}
+- 
+- 	/* BBP for G band GLRT function (BBP_128 ~ BBP_221) */
+- 	rt2800_bbp_glrt_write(rt2x00dev, 0, 0x00);
+-@@ -10408,31 +10436,36 @@ static void rt2800_init_rfcsr_6352(struc
+- 	rt2800_rfcsr_write(rt2x00dev, 42, 0x5B);
+- 	rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
+- 
+--	rt2800_rfcsr_write(rt2x00dev, 11, 0x21);
+--	if (rt2800_clk_is_20mhz(rt2x00dev))
+--		rt2800_rfcsr_write(rt2x00dev, 13, 0x03);
+--	else
+--		rt2800_rfcsr_write(rt2x00dev, 13, 0x00);
+--	rt2800_rfcsr_write(rt2x00dev, 14, 0x7C);
+--	rt2800_rfcsr_write(rt2x00dev, 16, 0x80);
+--	rt2800_rfcsr_write(rt2x00dev, 17, 0x99);
+--	rt2800_rfcsr_write(rt2x00dev, 18, 0x99);
+--	rt2800_rfcsr_write(rt2x00dev, 19, 0x09);
+--	rt2800_rfcsr_write(rt2x00dev, 20, 0x50);
+--	rt2800_rfcsr_write(rt2x00dev, 21, 0xB0);
+--	rt2800_rfcsr_write(rt2x00dev, 22, 0x00);
+--	rt2800_rfcsr_write(rt2x00dev, 23, 0x06);
+--	rt2800_rfcsr_write(rt2x00dev, 24, 0x00);
+--	rt2800_rfcsr_write(rt2x00dev, 25, 0x00);
+--	rt2800_rfcsr_write(rt2x00dev, 26, 0x5D);
+--	rt2800_rfcsr_write(rt2x00dev, 27, 0x00);
+--	rt2800_rfcsr_write(rt2x00dev, 28, 0x61);
+--	rt2800_rfcsr_write(rt2x00dev, 29, 0xB5);
+--	rt2800_rfcsr_write(rt2x00dev, 43, 0x02);
+--
+--	rt2800_rfcsr_write(rt2x00dev, 28, 0x62);
+--	rt2800_rfcsr_write(rt2x00dev, 29, 0xAD);
+--	rt2800_rfcsr_write(rt2x00dev, 39, 0x80);
+-+	if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
+-+		rt2800_rfcsr_write(rt2x00dev, 11, 0x21);
+-+		if (rt2800_clk_is_20mhz(rt2x00dev))
+-+			rt2800_rfcsr_write(rt2x00dev, 13, 0x03);
+-+		else
+-+			rt2800_rfcsr_write(rt2x00dev, 13, 0x00);
+-+		rt2800_rfcsr_write(rt2x00dev, 14, 0x7C);
+-+		rt2800_rfcsr_write(rt2x00dev, 16, 0x80);
+-+		rt2800_rfcsr_write(rt2x00dev, 17, 0x99);
+-+		rt2800_rfcsr_write(rt2x00dev, 18, 0x99);
+-+		rt2800_rfcsr_write(rt2x00dev, 19, 0x09);
+-+		rt2800_rfcsr_write(rt2x00dev, 20, 0x50);
+-+		rt2800_rfcsr_write(rt2x00dev, 21, 0xB0);
+-+		rt2800_rfcsr_write(rt2x00dev, 22, 0x00);
+-+		rt2800_rfcsr_write(rt2x00dev, 23, 0x06);
+-+		rt2800_rfcsr_write(rt2x00dev, 24, 0x00);
+-+		rt2800_rfcsr_write(rt2x00dev, 25, 0x00);
+-+		rt2800_rfcsr_write(rt2x00dev, 26, 0x5D);
+-+		rt2800_rfcsr_write(rt2x00dev, 27, 0x00);
+-+		rt2800_rfcsr_write(rt2x00dev, 28, 0x61);
+-+		rt2800_rfcsr_write(rt2x00dev, 29, 0xB5);
+-+		rt2800_rfcsr_write(rt2x00dev, 43, 0x02);
+-+	}
+-+
+-+	if (rt2800_hw_get_chipver(rt2x00dev) > 1 &&
+-+	    rt2800_hw_get_chipeco(rt2x00dev) >= 2) {
+-+		rt2800_rfcsr_write(rt2x00dev, 28, 0x62);
+-+		rt2800_rfcsr_write(rt2x00dev, 29, 0xAD);
+-+		rt2800_rfcsr_write(rt2x00dev, 39, 0x80);
+-+	}
+- 
+- 	/* Initialize RF channel register to default value */
+- 	rt2800_rfcsr_write_chanreg(rt2x00dev, 0, 0x03);
+-@@ -10498,63 +10531,71 @@ static void rt2800_init_rfcsr_6352(struc
+- 
+- 	rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5);
+- 
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x47);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x71);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x33);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x0E);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA4);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 20, 0x02);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 21, 0x12);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x1C);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 29, 0xEB);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 32, 0x7D);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 34, 0xD6);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 36, 0x08);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 38, 0xB4);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xB3);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xD5);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
+--	rt2800_rfcsr_write_bank(rt2x00dev, 4, 47, 0x67);
+--	rt2800_rfcsr_write_bank(rt2x00dev, 6, 47, 0x69);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFF);
+--	rt2800_rfcsr_write_bank(rt2x00dev, 4, 54, 0x27);
+--	rt2800_rfcsr_write_bank(rt2x00dev, 6, 54, 0x20);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xFF);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x1C);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x20);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xF7);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x09);
+--
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x51);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x06);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA7);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x2C);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x64);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 8, 0x51);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x36);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x53);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
+--
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x6C);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFC);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x1F);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
+--
+--	/* Initialize RF channel register for DRQFN */
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xE3);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xE5);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x28);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x68);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xF7);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x02);
+--	rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xC7);
+-+	if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x47);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x71);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x33);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x0E);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA4);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 20, 0x02);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 21, 0x12);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x1C);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 29, 0xEB);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 32, 0x7D);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 34, 0xD6);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 36, 0x08);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 38, 0xB4);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xB3);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xD5);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
+-+		rt2800_rfcsr_write_bank(rt2x00dev, 4, 47, 0x67);
+-+		rt2800_rfcsr_write_bank(rt2x00dev, 6, 47, 0x69);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFF);
+-+		rt2800_rfcsr_write_bank(rt2x00dev, 4, 54, 0x27);
+-+		rt2800_rfcsr_write_bank(rt2x00dev, 6, 54, 0x20);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xFF);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x1C);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x20);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xF7);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x09);
+-+	}
+-+
+-+	if (rt2800_hw_get_chipver(rt2x00dev) > 1 &&
+-+	    rt2800_hw_get_chipeco(rt2x00dev) >= 2) {
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x51);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x06);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA7);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x2C);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x64);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 8, 0x51);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x36);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x53);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
+-+
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x6C);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFC);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x1F);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
+-+	}
+-+
+-+	if (rt2800_hw_get_chippkg(rt2x00dev) == 0 &&
+-+	    rt2800_hw_get_chipver(rt2x00dev) == 1) {
+-+		/* Initialize RF channel register for DRQFN */
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xE3);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xE5);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x28);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x68);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xF7);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x02);
+-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xC7);
+-+	}
+- 
+- 	/* Initialize RF DC calibration register to default value */
+- 	rt2800_rfcsr_write_dccal(rt2x00dev, 0, 0x47);
+-@@ -10617,12 +10658,17 @@ static void rt2800_init_rfcsr_6352(struc
+- 	rt2800_rfcsr_write_dccal(rt2x00dev, 62, 0x00);
+- 	rt2800_rfcsr_write_dccal(rt2x00dev, 63, 0x00);
+- 
+--	rt2800_rfcsr_write_dccal(rt2x00dev, 3, 0x08);
+--	rt2800_rfcsr_write_dccal(rt2x00dev, 4, 0x04);
+--	rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x20);
+-+	if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
+-+		rt2800_rfcsr_write_dccal(rt2x00dev, 3, 0x08);
+-+		rt2800_rfcsr_write_dccal(rt2x00dev, 4, 0x04);
+-+		rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x20);
+-+	}
+- 
+--	rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
+--	rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
+-+	if (rt2800_hw_get_chipver(rt2x00dev) > 1 &&
+-+	    rt2800_hw_get_chipeco(rt2x00dev) >= 2) {
+-+		rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
+-+		rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
+-+	}
+- 
+- 	rt6352_enable_pa_pin(rt2x00dev, 0);
+- 	rt2800_r_calibration(rt2x00dev);
+diff --git a/package/kernel/mac80211/patches/subsys/110-mac80211_keep_keys_on_stop_ap.patch b/package/kernel/mac80211/patches/subsys/110-mac80211_keep_keys_on_stop_ap.patch
+deleted file mode 100644
+index 4d4a2a8f5e..0000000000
+--- a/package/kernel/mac80211/patches/subsys/110-mac80211_keep_keys_on_stop_ap.patch
++++ /dev/null
+@@ -1,19 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Mon, 27 Oct 2014 00:00:00 +0100
+-Subject: [PATCH] mac80211: preseve AP mode keys across STA reconnect
+-
+-Used for AP+STA support in OpenWrt - preserve AP mode keys across STA reconnect
+----
+- net/mac80211/cfg.c | 1 -
+- 1 file changed, 1 deletion(-)
+-
+---- a/net/mac80211/cfg.c
+-+++ b/net/mac80211/cfg.c
+-@@ -1519,7 +1519,6 @@ static int ieee80211_stop_ap(struct wiph
+- 	link_conf->bssid_indicator = 0;
+- 
+- 	__sta_info_flush(sdata, true);
+--	ieee80211_free_keys(sdata, true);
+- 
+- 	link_conf->enable_beacon = false;
+- 	sdata->beacon_rate_set = false;
+diff --git a/package/kernel/mac80211/patches/subsys/120-cfg80211_allow_perm_addr_change.patch b/package/kernel/mac80211/patches/subsys/120-cfg80211_allow_perm_addr_change.patch
+deleted file mode 100644
+index f315ae5ca2..0000000000
+--- a/package/kernel/mac80211/patches/subsys/120-cfg80211_allow_perm_addr_change.patch
++++ /dev/null
+@@ -1,52 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Thu, 11 Dec 2014 00:00:00 +0100
+-Subject: [PATCH] cfg80211: add support for changing the device mac address via
+- sysfs
+-
+----
+- net/wireless/sysfs.c | 27 ++++++++++++++++++++++-----
+- 1 file changed, 22 insertions(+), 5 deletions(-)
+-
+---- a/net/wireless/sysfs.c
+-+++ b/net/wireless/sysfs.c
+-@@ -24,18 +24,35 @@ static inline struct cfg80211_registered
+- 	return container_of(dev, struct cfg80211_registered_device, wiphy.dev);
+- }
+- 
+--#define SHOW_FMT(name, fmt, member)					\
+-+#define SHOW_FMT(name, fmt, member, mode)				\
+- static ssize_t name ## _show(struct device *dev,			\
+- 			      struct device_attribute *attr,		\
+- 			      char *buf)				\
+- {									\
+- 	return sprintf(buf, fmt "\n", dev_to_rdev(dev)->member);	\
+- }									\
+--static DEVICE_ATTR_RO(name)
+-+static DEVICE_ATTR_##mode(name)
+- 
+--SHOW_FMT(index, "%d", wiphy_idx);
+--SHOW_FMT(macaddress, "%pM", wiphy.perm_addr);
+--SHOW_FMT(address_mask, "%pM", wiphy.addr_mask);
+-+static ssize_t macaddress_store(struct device *dev,
+-+				struct device_attribute *attr,
+-+				const char *buf, size_t len)
+-+{
+-+	u8 mac[ETH_ALEN];
+-+
+-+	if (!mac_pton(buf, mac))
+-+		return -EINVAL;
+-+
+-+	if (buf[3 * ETH_ALEN - 1] && buf[3 * ETH_ALEN - 1] != '\n')
+-+		return -EINVAL;
+-+
+-+	memcpy(dev_to_rdev(dev)->wiphy.perm_addr, mac, ETH_ALEN);
+-+
+-+	return strnlen(buf, len);
+-+}
+-+
+-+SHOW_FMT(index, "%d", wiphy_idx, RO);
+-+SHOW_FMT(macaddress, "%pM", wiphy.perm_addr, RW);
+-+SHOW_FMT(address_mask, "%pM", wiphy.addr_mask, RO);
+- 
+- static ssize_t name_show(struct device *dev,
+- 			 struct device_attribute *attr,
+diff --git a/package/kernel/mac80211/patches/subsys/210-ap_scan.patch b/package/kernel/mac80211/patches/subsys/210-ap_scan.patch
+deleted file mode 100644
+index 10b842d9af..0000000000
+--- a/package/kernel/mac80211/patches/subsys/210-ap_scan.patch
++++ /dev/null
+@@ -1,19 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Wed, 3 Oct 2012 00:00:00 +0200
+-Subject: [PATCH] mac80211: allow scans in access point mode (for site survey)
+-
+----
+- net/mac80211/cfg.c | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+---- a/net/mac80211/cfg.c
+-+++ b/net/mac80211/cfg.c
+-@@ -2727,6 +2727,8 @@ static int ieee80211_scan(struct wiphy *
+- 		 */
+- 		fallthrough;
+- 	case NL80211_IFTYPE_AP:
+-+		/* skip check */
+-+		break;
+- 		/*
+- 		 * If the scan has been forced (and the driver supports
+- 		 * forcing), don't care about being beaconing already.
+diff --git a/package/kernel/mac80211/patches/subsys/301-mac80211-sta-randomize-BA-session-dialog-token-alloc.patch b/package/kernel/mac80211/patches/subsys/301-mac80211-sta-randomize-BA-session-dialog-token-alloc.patch
+deleted file mode 100644
+index 63b2177471..0000000000
+--- a/package/kernel/mac80211/patches/subsys/301-mac80211-sta-randomize-BA-session-dialog-token-alloc.patch
++++ /dev/null
+@@ -1,38 +0,0 @@
+-From b478e06a16a8baa00c5ecc87c1d636981f2206d5 Mon Sep 17 00:00:00 2001
+-From: Johannes Berg <johannes.berg@intel.com>
+-Date: Tue, 29 Oct 2019 10:25:25 +0100
+-Subject: [PATCH] mac80211: sta: randomize BA session dialog token allocator
+-
+-We currently always start the dialog token generator at zero,
+-so the first dialog token we use is always 1. This would be
+-OK if we had a perfect guarantee that we always do a proper
+-deauth/re-auth handshake, but in IBSS mode this doesn't always
+-happen properly.
+-
+-To make problems with block ack (aggregation) sessions getting
+-stuck less likely, randomize the dialog token so if we start a
+-new session but the peer still has old state for us, it can
+-better detect this.
+-
+-This is really just a workaround to make things a bit more
+-robust than they are now - a better fix would be to do a full
+-authentication handshake in IBSS mode upon having discovered a
+-new station, and on the receiver resetting the state (removing
+-and re-adding the station) on receiving the authentication
+-packet.
+-
+-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+----
+- net/mac80211/sta_info.c | 1 +
+- 1 file changed, 1 insertion(+)
+-
+---- a/net/mac80211/sta_info.c
+-+++ b/net/mac80211/sta_info.c
+-@@ -554,6 +554,7 @@ __sta_info_alloc(struct ieee80211_sub_if
+- 	INIT_WORK(&sta->drv_deliver_wk, sta_deliver_ps_frames);
+- 	INIT_WORK(&sta->ampdu_mlme.work, ieee80211_ba_session_work);
+- 	mutex_init(&sta->ampdu_mlme.mtx);
+-+	sta->ampdu_mlme.dialog_token_allocator = prandom_u32_max(U8_MAX);
+- #ifdef CPTCFG_MAC80211_MESH
+- 	if (ieee80211_vif_is_mesh(&sdata->vif)) {
+- 		sta->mesh = kzalloc(sizeof(*sta->mesh), gfp);
+diff --git a/package/kernel/mac80211/patches/subsys/302-mac80211-minstrel_ht-fix-MINSTREL_FRAC-macro.patch b/package/kernel/mac80211/patches/subsys/302-mac80211-minstrel_ht-fix-MINSTREL_FRAC-macro.patch
+deleted file mode 100644
+index 0d475b7329..0000000000
+--- a/package/kernel/mac80211/patches/subsys/302-mac80211-minstrel_ht-fix-MINSTREL_FRAC-macro.patch
++++ /dev/null
+@@ -1,21 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Wed, 28 Apr 2021 21:03:13 +0200
+-Subject: [PATCH] mac80211: minstrel_ht: fix MINSTREL_FRAC macro
+-
+-Add missing braces to avoid issues with e.g. using additions in the
+-div expression
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/net/mac80211/rc80211_minstrel_ht.h
+-+++ b/net/mac80211/rc80211_minstrel_ht.h
+-@@ -14,7 +14,7 @@
+- 
+- /* scaled fraction values */
+- #define MINSTREL_SCALE  12
+--#define MINSTREL_FRAC(val, div) (((val) << MINSTREL_SCALE) / div)
+-+#define MINSTREL_FRAC(val, div) (((val) << MINSTREL_SCALE) / (div))
+- #define MINSTREL_TRUNC(val) ((val) >> MINSTREL_SCALE)
+- 
+- #define EWMA_LEVEL	96	/* ewma weighting factor [/EWMA_DIV] */
+diff --git a/package/kernel/mac80211/patches/subsys/303-mac80211-minstrel_ht-reduce-fluctuations-in-rate-pro.patch b/package/kernel/mac80211/patches/subsys/303-mac80211-minstrel_ht-reduce-fluctuations-in-rate-pro.patch
+deleted file mode 100644
+index f26477e811..0000000000
+--- a/package/kernel/mac80211/patches/subsys/303-mac80211-minstrel_ht-reduce-fluctuations-in-rate-pro.patch
++++ /dev/null
+@@ -1,30 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Sat, 6 Feb 2021 16:08:01 +0100
+-Subject: [PATCH] mac80211: minstrel_ht: reduce fluctuations in rate
+- probability stats
+-
+-In some scenarios when there is a lot of fluctuation in packet error rates,
+-rate switching can be amplified when the statistics get skewed by time slots
+-with very few tries.
+-Make the input data to the moving average more smooth by adding the
+-success/attempts count from the last stats window as well. This has the
+-advantage of smoothing the data without introducing any extra lag to sampling
+-rates.
+-This significantly improves rate stability on a strong test link subjected to
+-periodic noise bursts generated with a SDR
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/net/mac80211/rc80211_minstrel_ht.c
+-+++ b/net/mac80211/rc80211_minstrel_ht.c
+-@@ -769,7 +769,8 @@ minstrel_ht_calc_rate_stats(struct minst
+- 	unsigned int cur_prob;
+- 
+- 	if (unlikely(mrs->attempts > 0)) {
+--		cur_prob = MINSTREL_FRAC(mrs->success, mrs->attempts);
+-+		cur_prob = MINSTREL_FRAC(mrs->success + mrs->last_success,
+-+					 mrs->attempts + mrs->last_attempts);
+- 		minstrel_filter_avg_add(&mrs->prob_avg,
+- 					&mrs->prob_avg_1, cur_prob);
+- 		mrs->att_hist += mrs->attempts;
+diff --git a/package/kernel/mac80211/patches/subsys/304-mac80211-minstrel_ht-rework-rate-downgrade-code-and-.patch b/package/kernel/mac80211/patches/subsys/304-mac80211-minstrel_ht-rework-rate-downgrade-code-and-.patch
+deleted file mode 100644
+index 9b3cc3a664..0000000000
+--- a/package/kernel/mac80211/patches/subsys/304-mac80211-minstrel_ht-rework-rate-downgrade-code-and-.patch
++++ /dev/null
+@@ -1,151 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Sat, 6 Feb 2021 16:33:14 +0100
+-Subject: [PATCH] mac80211: minstrel_ht: rework rate downgrade code and
+- max_prob rate selection
+-
+-The current fallback code for fast rate switching on potentially failing rates
+-is triggering too often if there is some strong noise on the channel. This can
+-lead to wild fluctuations in the rate selection.
+-Additionally, switching down to max_prob_rate can create a significant gap down
+-in throughput, especially when using only 2 spatial streams, because max_prob_rate
+-is limited to using fewer streams than the max_tp rates.
+-In order to improve throughput without reducing reliability too much, use the
+-rate downgrade code for the max_prob_rate only, and allow the non-downgraded
+-max_prob_rate to use as many spatial streams as the max_tp rates
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/net/mac80211/rc80211_minstrel_ht.c
+-+++ b/net/mac80211/rc80211_minstrel_ht.c
+-@@ -580,6 +580,14 @@ minstrel_ht_set_best_prob_rate(struct mi
+- 	int cur_tp_avg, cur_group, cur_idx;
+- 	int max_gpr_group, max_gpr_idx;
+- 	int max_gpr_tp_avg, max_gpr_prob;
+-+	int min_dur;
+-+
+-+	min_dur = max(minstrel_get_duration(mi->max_tp_rate[0]),
+-+		      minstrel_get_duration(mi->max_tp_rate[1]));
+-+
+-+	/* make the rate at least 18% slower than max tp rates */
+-+	if (minstrel_get_duration(index) <= min_dur * 19 / 16)
+-+		return;
+- 
+- 	cur_group = MI_RATE_GROUP(index);
+- 	cur_idx = MI_RATE_IDX(index);
+-@@ -601,11 +609,6 @@ minstrel_ht_set_best_prob_rate(struct mi
+- 	    !minstrel_ht_is_legacy_group(max_tp_group))
+- 		return;
+- 
+--	/* skip rates faster than max tp rate with lower prob */
+--	if (minstrel_get_duration(mi->max_tp_rate[0]) > minstrel_get_duration(index) &&
+--	    mrs->prob_avg < max_tp_prob)
+--		return;
+--
+- 	max_gpr_group = MI_RATE_GROUP(mg->max_group_prob_rate);
+- 	max_gpr_idx = MI_RATE_IDX(mg->max_group_prob_rate);
+- 	max_gpr_prob = mi->groups[max_gpr_group].rates[max_gpr_idx].prob_avg;
+-@@ -663,40 +666,6 @@ minstrel_ht_assign_best_tp_rates(struct
+- 
+- }
+- 
+--/*
+-- * Try to increase robustness of max_prob rate by decrease number of
+-- * streams if possible.
+-- */
+--static inline void
+--minstrel_ht_prob_rate_reduce_streams(struct minstrel_ht_sta *mi)
+--{
+--	struct minstrel_mcs_group_data *mg;
+--	int tmp_max_streams, group, tmp_idx, tmp_prob;
+--	int tmp_tp = 0;
+--
+--	if (!mi->sta->deflink.ht_cap.ht_supported)
+--		return;
+--
+--	group = MI_RATE_GROUP(mi->max_tp_rate[0]);
+--	tmp_max_streams = minstrel_mcs_groups[group].streams;
+--	for (group = 0; group < ARRAY_SIZE(minstrel_mcs_groups); group++) {
+--		mg = &mi->groups[group];
+--		if (!mi->supported[group] || group == MINSTREL_CCK_GROUP)
+--			continue;
+--
+--		tmp_idx = MI_RATE_IDX(mg->max_group_prob_rate);
+--		tmp_prob = mi->groups[group].rates[tmp_idx].prob_avg;
+--
+--		if (tmp_tp < minstrel_ht_get_tp_avg(mi, group, tmp_idx, tmp_prob) &&
+--		   (minstrel_mcs_groups[group].streams < tmp_max_streams)) {
+--				mi->max_prob_rate = mg->max_group_prob_rate;
+--				tmp_tp = minstrel_ht_get_tp_avg(mi, group,
+--								tmp_idx,
+--								tmp_prob);
+--		}
+--	}
+--}
+--
+- static u16
+- __minstrel_ht_get_sample_rate(struct minstrel_ht_sta *mi,
+- 			      enum minstrel_sample_type type)
+-@@ -1176,8 +1145,6 @@ minstrel_ht_update_stats(struct minstrel
+- 
+- 	mi->max_prob_rate = tmp_max_prob_rate;
+- 
+--	/* Try to increase robustness of max_prob_rate*/
+--	minstrel_ht_prob_rate_reduce_streams(mi);
+- 	minstrel_ht_refill_sample_rates(mi);
+- 
+- #ifdef CPTCFG_MAC80211_DEBUGFS
+-@@ -1256,7 +1223,7 @@ minstrel_ht_ri_txstat_valid(struct minst
+- }
+- 
+- static void
+--minstrel_downgrade_rate(struct minstrel_ht_sta *mi, u16 *idx, bool primary)
+-+minstrel_downgrade_prob_rate(struct minstrel_ht_sta *mi, u16 *idx)
+- {
+- 	int group, orig_group;
+- 
+-@@ -1271,11 +1238,7 @@ minstrel_downgrade_rate(struct minstrel_
+- 		    minstrel_mcs_groups[orig_group].streams)
+- 			continue;
+- 
+--		if (primary)
+--			*idx = mi->groups[group].max_group_tp_rate[0];
+--		else
+--			*idx = mi->groups[group].max_group_tp_rate[1];
+--		break;
+-+		*idx = mi->groups[group].max_group_prob_rate;
+- 	}
+- }
+- 
+-@@ -1286,7 +1249,7 @@ minstrel_ht_tx_status(void *priv, struct
+- 	struct ieee80211_tx_info *info = st->info;
+- 	struct minstrel_ht_sta *mi = priv_sta;
+- 	struct ieee80211_tx_rate *ar = info->status.rates;
+--	struct minstrel_rate_stats *rate, *rate2;
+-+	struct minstrel_rate_stats *rate;
+- 	struct minstrel_priv *mp = priv;
+- 	u32 update_interval = mp->update_interval;
+- 	bool last, update = false;
+-@@ -1354,18 +1317,13 @@ minstrel_ht_tx_status(void *priv, struct
+- 		/*
+- 		 * check for sudden death of spatial multiplexing,
+- 		 * downgrade to a lower number of streams if necessary.
+-+		 * only do this for the max_prob_rate to prevent spurious
+-+		 * rate fluctuations when the link changes suddenly
+- 		 */
+--		rate = minstrel_get_ratestats(mi, mi->max_tp_rate[0]);
+-+		rate = minstrel_get_ratestats(mi, mi->max_prob_rate);
+- 		if (rate->attempts > 30 &&
+- 		    rate->success < rate->attempts / 4) {
+--			minstrel_downgrade_rate(mi, &mi->max_tp_rate[0], true);
+--			update = true;
+--		}
+--
+--		rate2 = minstrel_get_ratestats(mi, mi->max_tp_rate[1]);
+--		if (rate2->attempts > 30 &&
+--		    rate2->success < rate2->attempts / 4) {
+--			minstrel_downgrade_rate(mi, &mi->max_tp_rate[1], false);
+-+			minstrel_downgrade_prob_rate(mi, &mi->max_prob_rate);
+- 			update = true;
+- 		}
+- 	}
+diff --git a/package/kernel/mac80211/patches/subsys/305-mac80211-increase-quantum-for-airtime-scheduler.patch b/package/kernel/mac80211/patches/subsys/305-mac80211-increase-quantum-for-airtime-scheduler.patch
+deleted file mode 100644
+index 0ac972955f..0000000000
+--- a/package/kernel/mac80211/patches/subsys/305-mac80211-increase-quantum-for-airtime-scheduler.patch
++++ /dev/null
+@@ -1,53 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Sun, 26 Jun 2022 11:43:25 +0200
+-Subject: [PATCH] mac80211: increase quantum for airtime scheduler
+-
+-Given the typical AQL budget and queue length, a quantum of 256 with the
+-default station weight often requires iterating over all queues frequently,
+-until one of them becomes eligible.
+-Improve performance by using 8 times station weight as scheduler quantum
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/net/mac80211/ieee80211_i.h
+-+++ b/net/mac80211/ieee80211_i.h
+-@@ -90,6 +90,8 @@ extern const u8 ieee80211_ac_to_qos_mask
+-  */
+- #define AIRTIME_ACTIVE_DURATION (HZ / 10)
+- 
+-+#define AIRTIME_QUANTUM_SHIFT	3
+-+
+- struct ieee80211_bss {
+- 	u32 device_ts_beacon, device_ts_presp;
+- 
+---- a/net/mac80211/tx.c
+-+++ b/net/mac80211/tx.c
+-@@ -3984,7 +3984,7 @@ struct ieee80211_txq *ieee80211_next_txq
+- 
+- 		if (deficit < 0)
+- 			sta->airtime[txqi->txq.ac].deficit +=
+--				sta->airtime_weight;
+-+				sta->airtime_weight << AIRTIME_QUANTUM_SHIFT;
+- 
+- 		if (deficit < 0 || !aql_check) {
+- 			list_move_tail(&txqi->schedule_order,
+-@@ -4127,7 +4127,8 @@ bool ieee80211_txq_may_transmit(struct i
+- 		}
+- 		sta = container_of(iter->txq.sta, struct sta_info, sta);
+- 		if (ieee80211_sta_deficit(sta, ac) < 0)
+--			sta->airtime[ac].deficit += sta->airtime_weight;
+-+			sta->airtime[ac].deficit += sta->airtime_weight <<
+-+						    AIRTIME_QUANTUM_SHIFT;
+- 		list_move_tail(&iter->schedule_order, &local->active_txqs[ac]);
+- 	}
+- 
+-@@ -4135,7 +4136,7 @@ bool ieee80211_txq_may_transmit(struct i
+- 	if (sta->airtime[ac].deficit >= 0)
+- 		goto out;
+- 
+--	sta->airtime[ac].deficit += sta->airtime_weight;
+-+	sta->airtime[ac].deficit += sta->airtime_weight << AIRTIME_QUANTUM_SHIFT;
+- 	list_move_tail(&txqi->schedule_order, &local->active_txqs[ac]);
+- 	spin_unlock_bh(&local->active_txq_lock[ac]);
+- 
+diff --git a/package/kernel/mac80211/patches/subsys/306-01-v6.2-wifi-mac80211-add-internal-handler-for-wake_tx_queue.patch b/package/kernel/mac80211/patches/subsys/306-01-v6.2-wifi-mac80211-add-internal-handler-for-wake_tx_queue.patch
+deleted file mode 100644
+index d14ba05e69..0000000000
+--- a/package/kernel/mac80211/patches/subsys/306-01-v6.2-wifi-mac80211-add-internal-handler-for-wake_tx_queue.patch
++++ /dev/null
+@@ -1,183 +0,0 @@
+-From: Alexander Wetzel <alexander@wetzel-home.de>
+-Date: Sun, 9 Oct 2022 18:30:38 +0200
+-Subject: [PATCH] wifi: mac80211: add internal handler for wake_tx_queue
+-
+-Start to align the TX handling to only use internal TX queues (iTXQs):
+-
+-Provide a handler for drivers not having a custom wake_tx_queue
+-callback and update the documentation.
+-
+-Signed-off-by: Alexander Wetzel <alexander@wetzel-home.de>
+-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+----
+-
+---- a/include/net/mac80211.h
+-+++ b/include/net/mac80211.h
+-@@ -89,15 +89,13 @@
+- /**
+-  * DOC: mac80211 software tx queueing
+-  *
+-- * mac80211 provides an optional intermediate queueing implementation designed
+-- * to allow the driver to keep hardware queues short and provide some fairness
+-- * between different stations/interfaces.
+-- * In this model, the driver pulls data frames from the mac80211 queue instead
+-- * of letting mac80211 push them via drv_tx().
+-- * Other frames (e.g. control or management) are still pushed using drv_tx().
+-+ * mac80211 uses an intermediate queueing implementation, designed to allow the
+-+ * driver to keep hardware queues short and to provide some fairness between
+-+ * different stations/interfaces.
+-  *
+-- * Drivers indicate that they use this model by implementing the .wake_tx_queue
+-- * driver operation.
+-+ * Drivers must provide the .wake_tx_queue driver operation by either
+-+ * linking it to ieee80211_handle_wake_tx_queue() or implementing a custom
+-+ * handler.
+-  *
+-  * Intermediate queues (struct ieee80211_txq) are kept per-sta per-tid, with
+-  * another per-sta for non-data/non-mgmt and bufferable management frames, and
+-@@ -106,9 +104,12 @@
+-  * The driver is expected to initialize its private per-queue data for stations
+-  * and interfaces in the .add_interface and .sta_add ops.
+-  *
+-- * The driver can't access the queue directly. To dequeue a frame from a
+-- * txq, it calls ieee80211_tx_dequeue(). Whenever mac80211 adds a new frame to a
+-- * queue, it calls the .wake_tx_queue driver op.
+-+ * The driver can't access the internal TX queues (iTXQs) directly.
+-+ * Whenever mac80211 adds a new frame to a queue, it calls the .wake_tx_queue
+-+ * driver op.
+-+ * Drivers implementing a custom .wake_tx_queue op can get them by calling
+-+ * ieee80211_tx_dequeue(). Drivers using ieee80211_handle_wake_tx_queue() will
+-+ * simply get the individual frames pushed via the .tx driver operation.
+-  *
+-  * Drivers can optionally delegate responsibility for scheduling queues to
+-  * mac80211, to take advantage of airtime fairness accounting. In this case, to
+-@@ -2248,8 +2249,8 @@ struct ieee80211_link_sta {
+-  *	For non MLO STA it will point to the deflink data. For MLO STA
+-  *	ieee80211_sta_recalc_aggregates() must be called to update it.
+-  * @support_p2p_ps: indicates whether the STA supports P2P PS mechanism or not.
+-- * @txq: per-TID data TX queues (if driver uses the TXQ abstraction); note that
+-- *	the last entry (%IEEE80211_NUM_TIDS) is used for non-data frames
+-+ * @txq: per-TID data TX queues; note that the last entry (%IEEE80211_NUM_TIDS)
+-+ *	is used for non-data frames
+-  * @deflink: This holds the default link STA information, for non MLO STA all link
+-  *	specific STA information is accessed through @deflink or through
+-  *	link[0] which points to address of @deflink. For MLO Link STA
+-@@ -5687,7 +5688,7 @@ void ieee80211_key_replay(struct ieee802
+-  * @hw: pointer as obtained from ieee80211_alloc_hw().
+-  * @queue: queue number (counted from zero).
+-  *
+-- * Drivers should use this function instead of netif_wake_queue.
+-+ * Drivers must use this function instead of netif_wake_queue.
+-  */
+- void ieee80211_wake_queue(struct ieee80211_hw *hw, int queue);
+- 
+-@@ -5696,7 +5697,7 @@ void ieee80211_wake_queue(struct ieee802
+-  * @hw: pointer as obtained from ieee80211_alloc_hw().
+-  * @queue: queue number (counted from zero).
+-  *
+-- * Drivers should use this function instead of netif_stop_queue.
+-+ * Drivers must use this function instead of netif_stop_queue.
+-  */
+- void ieee80211_stop_queue(struct ieee80211_hw *hw, int queue);
+- 
+-@@ -5705,7 +5706,7 @@ void ieee80211_stop_queue(struct ieee802
+-  * @hw: pointer as obtained from ieee80211_alloc_hw().
+-  * @queue: queue number (counted from zero).
+-  *
+-- * Drivers should use this function instead of netif_stop_queue.
+-+ * Drivers must use this function instead of netif_queue_stopped.
+-  *
+-  * Return: %true if the queue is stopped. %false otherwise.
+-  */
+-@@ -5716,7 +5717,7 @@ int ieee80211_queue_stopped(struct ieee8
+-  * ieee80211_stop_queues - stop all queues
+-  * @hw: pointer as obtained from ieee80211_alloc_hw().
+-  *
+-- * Drivers should use this function instead of netif_stop_queue.
+-+ * Drivers must use this function instead of netif_tx_stop_all_queues.
+-  */
+- void ieee80211_stop_queues(struct ieee80211_hw *hw);
+- 
+-@@ -5724,7 +5725,7 @@ void ieee80211_stop_queues(struct ieee80
+-  * ieee80211_wake_queues - wake all queues
+-  * @hw: pointer as obtained from ieee80211_alloc_hw().
+-  *
+-- * Drivers should use this function instead of netif_wake_queue.
+-+ * Drivers must use this function instead of netif_tx_wake_all_queues.
+-  */
+- void ieee80211_wake_queues(struct ieee80211_hw *hw);
+- 
+-@@ -6946,6 +6947,18 @@ static inline struct sk_buff *ieee80211_
+- }
+- 
+- /**
+-+ * ieee80211_handle_wake_tx_queue - mac80211 handler for wake_tx_queue callback
+-+ *
+-+ * @hw: pointer as obtained from wake_tx_queue() callback().
+-+ * @txq: pointer as obtained from wake_tx_queue() callback().
+-+ *
+-+ * Drivers can use this function for the mandatory mac80211 wake_tx_queue
+-+ * callback in struct ieee80211_ops. They should not call this function.
+-+ */
+-+void ieee80211_handle_wake_tx_queue(struct ieee80211_hw *hw,
+-+				    struct ieee80211_txq *txq);
+-+
+-+/**
+-  * ieee80211_next_txq - get next tx queue to pull packets from
+-  *
+-  * @hw: pointer as obtained from ieee80211_alloc_hw()
+---- a/net/mac80211/util.c
+-+++ b/net/mac80211/util.c
+-@@ -288,6 +288,52 @@ __le16 ieee80211_ctstoself_duration(stru
+- }
+- EXPORT_SYMBOL(ieee80211_ctstoself_duration);
+- 
+-+static void wake_tx_push_queue(struct ieee80211_local *local,
+-+			       struct ieee80211_sub_if_data *sdata,
+-+			       struct ieee80211_txq *queue)
+-+{
+-+	int q = sdata->vif.hw_queue[queue->ac];
+-+	struct ieee80211_tx_control control = {
+-+		.sta = queue->sta,
+-+	};
+-+	struct sk_buff *skb;
+-+	unsigned long flags;
+-+	bool q_stopped;
+-+
+-+	while (1) {
+-+		spin_lock_irqsave(&local->queue_stop_reason_lock, flags);
+-+		q_stopped = local->queue_stop_reasons[q];
+-+		spin_unlock_irqrestore(&local->queue_stop_reason_lock, flags);
+-+
+-+		if (q_stopped)
+-+			break;
+-+
+-+		skb = ieee80211_tx_dequeue(&local->hw, queue);
+-+		if (!skb)
+-+			break;
+-+
+-+		drv_tx(local, &control, skb);
+-+	}
+-+}
+-+
+-+/* wake_tx_queue handler for driver not implementing a custom one*/
+-+void ieee80211_handle_wake_tx_queue(struct ieee80211_hw *hw,
+-+				    struct ieee80211_txq *txq)
+-+{
+-+	struct ieee80211_local *local = hw_to_local(hw);
+-+	struct ieee80211_sub_if_data *sdata = vif_to_sdata(txq->vif);
+-+	struct ieee80211_txq *queue;
+-+
+-+	/* Use ieee80211_next_txq() for airtime fairness accounting */
+-+	ieee80211_txq_schedule_start(hw, txq->ac);
+-+	while ((queue = ieee80211_next_txq(hw, txq->ac))) {
+-+		wake_tx_push_queue(local, sdata, queue);
+-+		ieee80211_return_txq(hw, queue, false);
+-+	}
+-+	ieee80211_txq_schedule_end(hw, txq->ac);
+-+}
+-+EXPORT_SYMBOL(ieee80211_handle_wake_tx_queue);
+-+
+- static void __ieee80211_wake_txqs(struct ieee80211_sub_if_data *sdata, int ac)
+- {
+- 	struct ieee80211_local *local = sdata->local;
+diff --git a/package/kernel/mac80211/patches/subsys/306-02-v6.2-wifi-mac80211-add-wake_tx_queue-callback-to-drivers.patch b/package/kernel/mac80211/patches/subsys/306-02-v6.2-wifi-mac80211-add-wake_tx_queue-callback-to-drivers.patch
+deleted file mode 100644
+index fee038d90c..0000000000
+--- a/package/kernel/mac80211/patches/subsys/306-02-v6.2-wifi-mac80211-add-wake_tx_queue-callback-to-drivers.patch
++++ /dev/null
+@@ -1,396 +0,0 @@
+-From: Alexander Wetzel <alexander@wetzel-home.de>
+-Date: Sun, 9 Oct 2022 18:30:39 +0200
+-Subject: [PATCH] wifi: mac80211: add wake_tx_queue callback to drivers
+-
+-mac80211 is fully switching over to the internal TX queue (iTXQ)
+-implementation. Update all drivers not yet providing the now mandatory
+-wake_tx_queue() callback.
+-
+-As an side effect the netdev interfaces of all updated drivers will
+-switch to the noqueue qdisc.
+-
+-Signed-off-by: Alexander Wetzel <alexander@wetzel-home.de>
+-[add staging drivers]
+-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+----
+-
+---- a/drivers/net/wireless/admtek/adm8211.c
+-+++ b/drivers/net/wireless/admtek/adm8211.c
+-@@ -1760,6 +1760,7 @@ static int adm8211_alloc_rings(struct ie
+- 
+- static const struct ieee80211_ops adm8211_ops = {
+- 	.tx			= adm8211_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.start			= adm8211_start,
+- 	.stop			= adm8211_stop,
+- 	.add_interface		= adm8211_add_interface,
+---- a/drivers/net/wireless/ath/ar5523/ar5523.c
+-+++ b/drivers/net/wireless/ath/ar5523/ar5523.c
+-@@ -1361,6 +1361,7 @@ static const struct ieee80211_ops ar5523
+- 	.start			= ar5523_start,
+- 	.stop			= ar5523_stop,
+- 	.tx			= ar5523_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.set_rts_threshold	= ar5523_set_rts_threshold,
+- 	.add_interface		= ar5523_add_interface,
+- 	.remove_interface	= ar5523_remove_interface,
+---- a/drivers/net/wireless/ath/ath11k/mac.c
+-+++ b/drivers/net/wireless/ath/ath11k/mac.c
+-@@ -8587,6 +8587,7 @@ err_fallback:
+- 
+- static const struct ieee80211_ops ath11k_ops = {
+- 	.tx				= ath11k_mac_op_tx,
+-+	.wake_tx_queue			= ieee80211_handle_wake_tx_queue,
+- 	.start                          = ath11k_mac_op_start,
+- 	.stop                           = ath11k_mac_op_stop,
+- 	.reconfig_complete              = ath11k_mac_op_reconfig_complete,
+---- a/drivers/net/wireless/ath/ath5k/mac80211-ops.c
+-+++ b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
+-@@ -781,6 +781,7 @@ static int ath5k_set_ringparam(struct ie
+- 
+- const struct ieee80211_ops ath5k_hw_ops = {
+- 	.tx			= ath5k_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.start			= ath5k_start,
+- 	.stop			= ath5k_stop,
+- 	.add_interface		= ath5k_add_interface,
+---- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
+-+++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
+-@@ -1870,6 +1870,7 @@ static void ath9k_htc_channel_switch_bea
+- 
+- struct ieee80211_ops ath9k_htc_ops = {
+- 	.tx                 = ath9k_htc_tx,
+-+	.wake_tx_queue      = ieee80211_handle_wake_tx_queue,
+- 	.start              = ath9k_htc_start,
+- 	.stop               = ath9k_htc_stop,
+- 	.add_interface      = ath9k_htc_add_interface,
+---- a/drivers/net/wireless/ath/carl9170/main.c
+-+++ b/drivers/net/wireless/ath/carl9170/main.c
+-@@ -1715,6 +1715,7 @@ static const struct ieee80211_ops carl91
+- 	.start			= carl9170_op_start,
+- 	.stop			= carl9170_op_stop,
+- 	.tx			= carl9170_op_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.flush			= carl9170_op_flush,
+- 	.add_interface		= carl9170_op_add_interface,
+- 	.remove_interface	= carl9170_op_remove_interface,
+---- a/drivers/net/wireless/ath/wcn36xx/main.c
+-+++ b/drivers/net/wireless/ath/wcn36xx/main.c
+-@@ -1362,6 +1362,7 @@ static const struct ieee80211_ops wcn36x
+- 	.prepare_multicast	= wcn36xx_prepare_multicast,
+- 	.configure_filter       = wcn36xx_configure_filter,
+- 	.tx			= wcn36xx_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.set_key		= wcn36xx_set_key,
+- 	.hw_scan		= wcn36xx_hw_scan,
+- 	.cancel_hw_scan		= wcn36xx_cancel_hw_scan,
+---- a/drivers/net/wireless/atmel/at76c50x-usb.c
+-+++ b/drivers/net/wireless/atmel/at76c50x-usb.c
+-@@ -2187,6 +2187,7 @@ static int at76_set_key(struct ieee80211
+- 
+- static const struct ieee80211_ops at76_ops = {
+- 	.tx = at76_mac80211_tx,
+-+	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
+- 	.add_interface = at76_add_interface,
+- 	.remove_interface = at76_remove_interface,
+- 	.config = at76_config,
+---- a/drivers/net/wireless/broadcom/b43/main.c
+-+++ b/drivers/net/wireless/broadcom/b43/main.c
+-@@ -5171,6 +5171,7 @@ static int b43_op_get_survey(struct ieee
+- 
+- static const struct ieee80211_ops b43_hw_ops = {
+- 	.tx			= b43_op_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.conf_tx		= b43_op_conf_tx,
+- 	.add_interface		= b43_op_add_interface,
+- 	.remove_interface	= b43_op_remove_interface,
+---- a/drivers/net/wireless/broadcom/b43legacy/main.c
+-+++ b/drivers/net/wireless/broadcom/b43legacy/main.c
+-@@ -3532,6 +3532,7 @@ static int b43legacy_op_get_survey(struc
+- 
+- static const struct ieee80211_ops b43legacy_hw_ops = {
+- 	.tx			= b43legacy_op_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.conf_tx		= b43legacy_op_conf_tx,
+- 	.add_interface		= b43legacy_op_add_interface,
+- 	.remove_interface	= b43legacy_op_remove_interface,
+---- a/drivers/net/wireless/broadcom/brcm80211/brcmsmac/mac80211_if.c
+-+++ b/drivers/net/wireless/broadcom/brcm80211/brcmsmac/mac80211_if.c
+-@@ -962,6 +962,7 @@ static int brcms_ops_beacon_set_tim(stru
+- 
+- static const struct ieee80211_ops brcms_ops = {
+- 	.tx = brcms_ops_tx,
+-+	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
+- 	.start = brcms_ops_start,
+- 	.stop = brcms_ops_stop,
+- 	.add_interface = brcms_ops_add_interface,
+---- a/drivers/net/wireless/intel/iwlegacy/3945-mac.c
+-+++ b/drivers/net/wireless/intel/iwlegacy/3945-mac.c
+-@@ -3439,6 +3439,7 @@ static const struct attribute_group il39
+- 
+- static struct ieee80211_ops il3945_mac_ops __ro_after_init = {
+- 	.tx = il3945_mac_tx,
+-+	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
+- 	.start = il3945_mac_start,
+- 	.stop = il3945_mac_stop,
+- 	.add_interface = il_mac_add_interface,
+---- a/drivers/net/wireless/intel/iwlegacy/4965-mac.c
+-+++ b/drivers/net/wireless/intel/iwlegacy/4965-mac.c
+-@@ -6308,6 +6308,7 @@ il4965_tx_queue_set_status(struct il_pri
+- 
+- static const struct ieee80211_ops il4965_mac_ops = {
+- 	.tx = il4965_mac_tx,
+-+	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
+- 	.start = il4965_mac_start,
+- 	.stop = il4965_mac_stop,
+- 	.add_interface = il_mac_add_interface,
+---- a/drivers/net/wireless/intel/iwlwifi/dvm/mac80211.c
+-+++ b/drivers/net/wireless/intel/iwlwifi/dvm/mac80211.c
+-@@ -1571,6 +1571,7 @@ static void iwlagn_mac_sta_notify(struct
+- 
+- const struct ieee80211_ops iwlagn_hw_ops = {
+- 	.tx = iwlagn_mac_tx,
+-+	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
+- 	.start = iwlagn_mac_start,
+- 	.stop = iwlagn_mac_stop,
+- #ifdef CONFIG_PM_SLEEP
+---- a/drivers/net/wireless/intersil/p54/main.c
+-+++ b/drivers/net/wireless/intersil/p54/main.c
+-@@ -705,6 +705,7 @@ static void p54_set_coverage_class(struc
+- 
+- static const struct ieee80211_ops p54_ops = {
+- 	.tx			= p54_tx_80211,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.start			= p54_start,
+- 	.stop			= p54_stop,
+- 	.add_interface		= p54_add_interface,
+---- a/drivers/net/wireless/mac80211_hwsim.c
+-+++ b/drivers/net/wireless/mac80211_hwsim.c
+-@@ -3109,6 +3109,7 @@ static int mac80211_hwsim_change_sta_lin
+- 
+- #define HWSIM_COMMON_OPS					\
+- 	.tx = mac80211_hwsim_tx,				\
+-+	.wake_tx_queue = ieee80211_handle_wake_tx_queue,	\
+- 	.start = mac80211_hwsim_start,				\
+- 	.stop = mac80211_hwsim_stop,				\
+- 	.add_interface = mac80211_hwsim_add_interface,		\
+---- a/drivers/net/wireless/marvell/libertas_tf/main.c
+-+++ b/drivers/net/wireless/marvell/libertas_tf/main.c
+-@@ -474,6 +474,7 @@ static int lbtf_op_get_survey(struct iee
+- 
+- static const struct ieee80211_ops lbtf_ops = {
+- 	.tx			= lbtf_op_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.start			= lbtf_op_start,
+- 	.stop			= lbtf_op_stop,
+- 	.add_interface		= lbtf_op_add_interface,
+---- a/drivers/net/wireless/marvell/mwl8k.c
+-+++ b/drivers/net/wireless/marvell/mwl8k.c
+-@@ -5611,6 +5611,7 @@ static void mwl8k_sw_scan_complete(struc
+- 
+- static const struct ieee80211_ops mwl8k_ops = {
+- 	.tx			= mwl8k_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.start			= mwl8k_start,
+- 	.stop			= mwl8k_stop,
+- 	.add_interface		= mwl8k_add_interface,
+---- a/drivers/net/wireless/mediatek/mt7601u/main.c
+-+++ b/drivers/net/wireless/mediatek/mt7601u/main.c
+-@@ -406,6 +406,7 @@ out:
+- 
+- const struct ieee80211_ops mt7601u_ops = {
+- 	.tx = mt7601u_tx,
+-+	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
+- 	.start = mt7601u_start,
+- 	.stop = mt7601u_stop,
+- 	.add_interface = mt7601u_add_interface,
+---- a/drivers/net/wireless/ralink/rt2x00/rt2400pci.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2400pci.c
+-@@ -1706,6 +1706,7 @@ static int rt2400pci_tx_last_beacon(stru
+- 
+- static const struct ieee80211_ops rt2400pci_mac80211_ops = {
+- 	.tx			= rt2x00mac_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.start			= rt2x00mac_start,
+- 	.stop			= rt2x00mac_stop,
+- 	.add_interface		= rt2x00mac_add_interface,
+---- a/drivers/net/wireless/ralink/rt2x00/rt2500pci.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2500pci.c
+-@@ -2004,6 +2004,7 @@ static int rt2500pci_tx_last_beacon(stru
+- 
+- static const struct ieee80211_ops rt2500pci_mac80211_ops = {
+- 	.tx			= rt2x00mac_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.start			= rt2x00mac_start,
+- 	.stop			= rt2x00mac_stop,
+- 	.add_interface		= rt2x00mac_add_interface,
+---- a/drivers/net/wireless/ralink/rt2x00/rt2500usb.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2500usb.c
+-@@ -1795,6 +1795,7 @@ static int rt2500usb_probe_hw(struct rt2
+- 
+- static const struct ieee80211_ops rt2500usb_mac80211_ops = {
+- 	.tx			= rt2x00mac_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.start			= rt2x00mac_start,
+- 	.stop			= rt2x00mac_stop,
+- 	.add_interface		= rt2x00mac_add_interface,
+---- a/drivers/net/wireless/ralink/rt2x00/rt2800pci.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800pci.c
+-@@ -288,6 +288,7 @@ static int rt2800pci_read_eeprom(struct
+- 
+- static const struct ieee80211_ops rt2800pci_mac80211_ops = {
+- 	.tx			= rt2x00mac_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.start			= rt2x00mac_start,
+- 	.stop			= rt2x00mac_stop,
+- 	.add_interface		= rt2x00mac_add_interface,
+---- a/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
+-@@ -133,6 +133,7 @@ static int rt2800soc_write_firmware(stru
+- 
+- static const struct ieee80211_ops rt2800soc_mac80211_ops = {
+- 	.tx			= rt2x00mac_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.start			= rt2x00mac_start,
+- 	.stop			= rt2x00mac_stop,
+- 	.add_interface		= rt2x00mac_add_interface,
+---- a/drivers/net/wireless/ralink/rt2x00/rt2800usb.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800usb.c
+-@@ -630,6 +630,7 @@ static int rt2800usb_probe_hw(struct rt2
+- 
+- static const struct ieee80211_ops rt2800usb_mac80211_ops = {
+- 	.tx			= rt2x00mac_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.start			= rt2x00mac_start,
+- 	.stop			= rt2x00mac_stop,
+- 	.add_interface		= rt2x00mac_add_interface,
+---- a/drivers/net/wireless/ralink/rt2x00/rt61pci.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt61pci.c
+-@@ -2873,6 +2873,7 @@ static u64 rt61pci_get_tsf(struct ieee80
+- 
+- static const struct ieee80211_ops rt61pci_mac80211_ops = {
+- 	.tx			= rt2x00mac_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.start			= rt2x00mac_start,
+- 	.stop			= rt2x00mac_stop,
+- 	.add_interface		= rt2x00mac_add_interface,
+---- a/drivers/net/wireless/ralink/rt2x00/rt73usb.c
+-+++ b/drivers/net/wireless/ralink/rt2x00/rt73usb.c
+-@@ -2292,6 +2292,7 @@ static u64 rt73usb_get_tsf(struct ieee80
+- 
+- static const struct ieee80211_ops rt73usb_mac80211_ops = {
+- 	.tx			= rt2x00mac_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.start			= rt2x00mac_start,
+- 	.stop			= rt2x00mac_stop,
+- 	.add_interface		= rt2x00mac_add_interface,
+---- a/drivers/net/wireless/realtek/rtl818x/rtl8180/dev.c
+-+++ b/drivers/net/wireless/realtek/rtl818x/rtl8180/dev.c
+-@@ -1608,6 +1608,7 @@ static void rtl8180_configure_filter(str
+- 
+- static const struct ieee80211_ops rtl8180_ops = {
+- 	.tx			= rtl8180_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.start			= rtl8180_start,
+- 	.stop			= rtl8180_stop,
+- 	.add_interface		= rtl8180_add_interface,
+---- a/drivers/net/wireless/realtek/rtl818x/rtl8187/dev.c
+-+++ b/drivers/net/wireless/realtek/rtl818x/rtl8187/dev.c
+-@@ -1378,6 +1378,7 @@ static int rtl8187_conf_tx(struct ieee80
+- 
+- static const struct ieee80211_ops rtl8187_ops = {
+- 	.tx			= rtl8187_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.start			= rtl8187_start,
+- 	.stop			= rtl8187_stop,
+- 	.add_interface		= rtl8187_add_interface,
+---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
+-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
+-@@ -6548,6 +6548,7 @@ static void rtl8xxxu_stop(struct ieee802
+- 
+- static const struct ieee80211_ops rtl8xxxu_ops = {
+- 	.tx = rtl8xxxu_tx,
+-+	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
+- 	.add_interface = rtl8xxxu_add_interface,
+- 	.remove_interface = rtl8xxxu_remove_interface,
+- 	.config = rtl8xxxu_config,
+---- a/drivers/net/wireless/realtek/rtlwifi/core.c
+-+++ b/drivers/net/wireless/realtek/rtlwifi/core.c
+-@@ -1912,6 +1912,7 @@ const struct ieee80211_ops rtl_ops = {
+- 	.start = rtl_op_start,
+- 	.stop = rtl_op_stop,
+- 	.tx = rtl_op_tx,
+-+	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
+- 	.add_interface = rtl_op_add_interface,
+- 	.remove_interface = rtl_op_remove_interface,
+- 	.change_interface = rtl_op_change_interface,
+---- a/drivers/net/wireless/realtek/rtw88/mac80211.c
+-+++ b/drivers/net/wireless/realtek/rtw88/mac80211.c
+-@@ -896,6 +896,7 @@ static void rtw_ops_sta_rc_update(struct
+- 
+- const struct ieee80211_ops rtw_ops = {
+- 	.tx			= rtw_ops_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.wake_tx_queue		= rtw_ops_wake_tx_queue,
+- 	.start			= rtw_ops_start,
+- 	.stop			= rtw_ops_stop,
+---- a/drivers/net/wireless/realtek/rtw89/mac80211.c
+-+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c
+-@@ -918,6 +918,7 @@ static int rtw89_ops_set_tid_config(stru
+- 
+- const struct ieee80211_ops rtw89_ops = {
+- 	.tx			= rtw89_ops_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.wake_tx_queue		= rtw89_ops_wake_tx_queue,
+- 	.start			= rtw89_ops_start,
+- 	.stop			= rtw89_ops_stop,
+---- a/drivers/net/wireless/rsi/rsi_91x_mac80211.c
+-+++ b/drivers/net/wireless/rsi/rsi_91x_mac80211.c
+-@@ -1958,6 +1958,7 @@ static int rsi_mac80211_resume(struct ie
+- 
+- static const struct ieee80211_ops mac80211_ops = {
+- 	.tx = rsi_mac80211_tx,
+-+	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
+- 	.start = rsi_mac80211_start,
+- 	.stop = rsi_mac80211_stop,
+- 	.add_interface = rsi_mac80211_add_interface,
+---- a/drivers/net/wireless/st/cw1200/main.c
+-+++ b/drivers/net/wireless/st/cw1200/main.c
+-@@ -209,6 +209,7 @@ static const struct ieee80211_ops cw1200
+- 	.remove_interface	= cw1200_remove_interface,
+- 	.change_interface	= cw1200_change_interface,
+- 	.tx			= cw1200_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.hw_scan		= cw1200_hw_scan,
+- 	.set_tim		= cw1200_set_tim,
+- 	.sta_notify		= cw1200_sta_notify,
+---- a/drivers/net/wireless/ti/wl1251/main.c
+-+++ b/drivers/net/wireless/ti/wl1251/main.c
+-@@ -1359,6 +1359,7 @@ static const struct ieee80211_ops wl1251
+- 	.prepare_multicast = wl1251_op_prepare_multicast,
+- 	.configure_filter = wl1251_op_configure_filter,
+- 	.tx = wl1251_op_tx,
+-+	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
+- 	.set_key = wl1251_op_set_key,
+- 	.hw_scan = wl1251_op_hw_scan,
+- 	.bss_info_changed = wl1251_op_bss_info_changed,
+---- a/drivers/net/wireless/ti/wlcore/main.c
+-+++ b/drivers/net/wireless/ti/wlcore/main.c
+-@@ -5942,6 +5942,7 @@ static const struct ieee80211_ops wl1271
+- 	.prepare_multicast = wl1271_op_prepare_multicast,
+- 	.configure_filter = wl1271_op_configure_filter,
+- 	.tx = wl1271_op_tx,
+-+	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
+- 	.set_key = wlcore_op_set_key,
+- 	.hw_scan = wl1271_op_hw_scan,
+- 	.cancel_hw_scan = wl1271_op_cancel_hw_scan,
+---- a/drivers/net/wireless/zydas/zd1211rw/zd_mac.c
+-+++ b/drivers/net/wireless/zydas/zd1211rw/zd_mac.c
+-@@ -1344,6 +1344,7 @@ static u64 zd_op_get_tsf(struct ieee8021
+- 
+- static const struct ieee80211_ops zd_ops = {
+- 	.tx			= zd_op_tx,
+-+	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.start			= zd_op_start,
+- 	.stop			= zd_op_stop,
+- 	.add_interface		= zd_op_add_interface,
+diff --git a/package/kernel/mac80211/patches/subsys/306-03-v6.2-wifi-mac80211-Drop-support-for-TX-push-path.patch b/package/kernel/mac80211/patches/subsys/306-03-v6.2-wifi-mac80211-Drop-support-for-TX-push-path.patch
+deleted file mode 100644
+index f9f9977cee..0000000000
+--- a/package/kernel/mac80211/patches/subsys/306-03-v6.2-wifi-mac80211-Drop-support-for-TX-push-path.patch
++++ /dev/null
+@@ -1,683 +0,0 @@
+-From: Alexander Wetzel <alexander@wetzel-home.de>
+-Date: Sun, 9 Oct 2022 18:30:40 +0200
+-Subject: [PATCH] wifi: mac80211: Drop support for TX push path
+-
+-All drivers are now using mac80211 internal queues (iTXQs).
+-Drop mac80211 internal support for the old push path.
+-
+-Signed-off-by: Alexander Wetzel <alexander@wetzel-home.de>
+-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+----
+-
+---- a/net/mac80211/cfg.c
+-+++ b/net/mac80211/cfg.c
+-@@ -4346,9 +4346,6 @@ static int ieee80211_get_txq_stats(struc
+- 	struct ieee80211_sub_if_data *sdata;
+- 	int ret = 0;
+- 
+--	if (!local->ops->wake_tx_queue)
+--		return 1;
+--
+- 	spin_lock_bh(&local->fq.lock);
+- 	rcu_read_lock();
+- 
+---- a/net/mac80211/debugfs.c
+-+++ b/net/mac80211/debugfs.c
+-@@ -663,9 +663,7 @@ void debugfs_hw_add(struct ieee80211_loc
+- 	DEBUGFS_ADD_MODE(force_tx_status, 0600);
+- 	DEBUGFS_ADD_MODE(aql_enable, 0600);
+- 	DEBUGFS_ADD(aql_pending);
+--
+--	if (local->ops->wake_tx_queue)
+--		DEBUGFS_ADD_MODE(aqm, 0600);
+-+	DEBUGFS_ADD_MODE(aqm, 0600);
+- 
+- 	DEBUGFS_ADD_MODE(airtime_flags, 0600);
+- 
+---- a/net/mac80211/debugfs_netdev.c
+-+++ b/net/mac80211/debugfs_netdev.c
+-@@ -677,8 +677,7 @@ static void add_common_files(struct ieee
+- 	DEBUGFS_ADD(rc_rateidx_vht_mcs_mask_5ghz);
+- 	DEBUGFS_ADD(hw_queues);
+- 
+--	if (sdata->local->ops->wake_tx_queue &&
+--	    sdata->vif.type != NL80211_IFTYPE_P2P_DEVICE &&
+-+	if (sdata->vif.type != NL80211_IFTYPE_P2P_DEVICE &&
+- 	    sdata->vif.type != NL80211_IFTYPE_NAN)
+- 		DEBUGFS_ADD(aqm);
+- }
+---- a/net/mac80211/debugfs_sta.c
+-+++ b/net/mac80211/debugfs_sta.c
+-@@ -1057,10 +1057,8 @@ void ieee80211_sta_debugfs_add(struct st
+- 	DEBUGFS_ADD_COUNTER(rx_fragments, deflink.rx_stats.fragments);
+- 	DEBUGFS_ADD_COUNTER(tx_filtered, deflink.status_stats.filtered);
+- 
+--	if (local->ops->wake_tx_queue) {
+--		DEBUGFS_ADD(aqm);
+--		DEBUGFS_ADD(airtime);
+--	}
+-+	DEBUGFS_ADD(aqm);
+-+	DEBUGFS_ADD(airtime);
+- 
+- 	if (wiphy_ext_feature_isset(local->hw.wiphy,
+- 				    NL80211_EXT_FEATURE_AQL))
+---- a/net/mac80211/ieee80211_i.h
+-+++ b/net/mac80211/ieee80211_i.h
+-@@ -2294,7 +2294,6 @@ void ieee80211_wake_queue_by_reason(stru
+- void ieee80211_stop_queue_by_reason(struct ieee80211_hw *hw, int queue,
+- 				    enum queue_stop_reason reason,
+- 				    bool refcounted);
+--void ieee80211_propagate_queue_wake(struct ieee80211_local *local, int queue);
+- void ieee80211_add_pending_skb(struct ieee80211_local *local,
+- 			       struct sk_buff *skb);
+- void ieee80211_add_pending_skbs(struct ieee80211_local *local,
+---- a/net/mac80211/iface.c
+-+++ b/net/mac80211/iface.c
+-@@ -460,12 +460,6 @@ static void ieee80211_do_stop(struct iee
+- 	if (cancel_scan)
+- 		ieee80211_scan_cancel(local);
+- 
+--	/*
+--	 * Stop TX on this interface first.
+--	 */
+--	if (!local->ops->wake_tx_queue && sdata->dev)
+--		netif_tx_stop_all_queues(sdata->dev);
+--
+- 	ieee80211_roc_purge(local, sdata);
+- 
+- 	switch (sdata->vif.type) {
+-@@ -813,13 +807,6 @@ static void ieee80211_uninit(struct net_
+- 	ieee80211_teardown_sdata(IEEE80211_DEV_TO_SUB_IF(dev));
+- }
+- 
+--static u16 ieee80211_netdev_select_queue(struct net_device *dev,
+--					 struct sk_buff *skb,
+--					 struct net_device *sb_dev)
+--{
+--	return ieee80211_select_queue(IEEE80211_DEV_TO_SUB_IF(dev), skb);
+--}
+--
+- static void
+- ieee80211_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
+- {
+-@@ -833,7 +820,6 @@ static const struct net_device_ops ieee8
+- 	.ndo_start_xmit		= ieee80211_subif_start_xmit,
+- 	.ndo_set_rx_mode	= ieee80211_set_multicast_list,
+- 	.ndo_set_mac_address 	= ieee80211_change_mac,
+--	.ndo_select_queue	= ieee80211_netdev_select_queue,
+- 	.ndo_get_stats64	= ieee80211_get_stats64,
+- };
+- 
+-@@ -941,7 +927,6 @@ static const struct net_device_ops ieee8
+- 	.ndo_start_xmit		= ieee80211_subif_start_xmit_8023,
+- 	.ndo_set_rx_mode	= ieee80211_set_multicast_list,
+- 	.ndo_set_mac_address	= ieee80211_change_mac,
+--	.ndo_select_queue	= ieee80211_netdev_select_queue,
+- 	.ndo_get_stats64	= ieee80211_get_stats64,
+- 	.ndo_fill_forward_path	= ieee80211_netdev_fill_forward_path,
+- };
+-@@ -1443,35 +1428,6 @@ int ieee80211_do_open(struct wireless_de
+- 
+- 	ieee80211_recalc_ps(local);
+- 
+--	if (sdata->vif.type == NL80211_IFTYPE_MONITOR ||
+--	    sdata->vif.type == NL80211_IFTYPE_AP_VLAN ||
+--	    local->ops->wake_tx_queue) {
+--		/* XXX: for AP_VLAN, actually track AP queues */
+--		if (dev)
+--			netif_tx_start_all_queues(dev);
+--	} else if (dev) {
+--		unsigned long flags;
+--		int n_acs = IEEE80211_NUM_ACS;
+--		int ac;
+--
+--		if (local->hw.queues < IEEE80211_NUM_ACS)
+--			n_acs = 1;
+--
+--		spin_lock_irqsave(&local->queue_stop_reason_lock, flags);
+--		if (sdata->vif.cab_queue == IEEE80211_INVAL_HW_QUEUE ||
+--		    (local->queue_stop_reasons[sdata->vif.cab_queue] == 0 &&
+--		     skb_queue_empty(&local->pending[sdata->vif.cab_queue]))) {
+--			for (ac = 0; ac < n_acs; ac++) {
+--				int ac_queue = sdata->vif.hw_queue[ac];
+--
+--				if (local->queue_stop_reasons[ac_queue] == 0 &&
+--				    skb_queue_empty(&local->pending[ac_queue]))
+--					netif_start_subqueue(dev, ac);
+--			}
+--		}
+--		spin_unlock_irqrestore(&local->queue_stop_reason_lock, flags);
+--	}
+--
+- 	set_bit(SDATA_STATE_RUNNING, &sdata->state);
+- 
+- 	return 0;
+-@@ -1501,17 +1457,12 @@ static void ieee80211_if_setup(struct ne
+- {
+- 	ether_setup(dev);
+- 	dev->priv_flags &= ~IFF_TX_SKB_SHARING;
+-+	dev->priv_flags |= IFF_NO_QUEUE;
+- 	dev->netdev_ops = &ieee80211_dataif_ops;
+- 	dev->needs_free_netdev = true;
+- 	dev->priv_destructor = ieee80211_if_free;
+- }
+- 
+--static void ieee80211_if_setup_no_queue(struct net_device *dev)
+--{
+--	ieee80211_if_setup(dev);
+--	dev->priv_flags |= IFF_NO_QUEUE;
+--}
+--
+- static void ieee80211_iface_process_skb(struct ieee80211_local *local,
+- 					struct ieee80211_sub_if_data *sdata,
+- 					struct sk_buff *skb)
+-@@ -2096,9 +2047,7 @@ int ieee80211_if_add(struct ieee80211_lo
+- 	struct net_device *ndev = NULL;
+- 	struct ieee80211_sub_if_data *sdata = NULL;
+- 	struct txq_info *txqi;
+--	void (*if_setup)(struct net_device *dev);
+- 	int ret, i;
+--	int txqs = 1;
+- 
+- 	ASSERT_RTNL();
+- 
+-@@ -2121,30 +2070,18 @@ int ieee80211_if_add(struct ieee80211_lo
+- 				 sizeof(void *));
+- 		int txq_size = 0;
+- 
+--		if (local->ops->wake_tx_queue &&
+--		    type != NL80211_IFTYPE_AP_VLAN &&
+-+		if (type != NL80211_IFTYPE_AP_VLAN &&
+- 		    (type != NL80211_IFTYPE_MONITOR ||
+- 		     (params->flags & MONITOR_FLAG_ACTIVE)))
+- 			txq_size += sizeof(struct txq_info) +
+- 				    local->hw.txq_data_size;
+- 
+--		if (local->ops->wake_tx_queue) {
+--			if_setup = ieee80211_if_setup_no_queue;
+--		} else {
+--			if_setup = ieee80211_if_setup;
+--			if (local->hw.queues >= IEEE80211_NUM_ACS)
+--				txqs = IEEE80211_NUM_ACS;
+--		}
+--
+- 		ndev = alloc_netdev_mqs(size + txq_size,
+- 					name, name_assign_type,
+--					if_setup, txqs, 1);
+-+					ieee80211_if_setup, 1, 1);
+- 		if (!ndev)
+- 			return -ENOMEM;
+- 
+--		if (!local->ops->wake_tx_queue && local->hw.wiphy->tx_queue_len)
+--			ndev->tx_queue_len = local->hw.wiphy->tx_queue_len;
+--
+- 		dev_net_set(ndev, wiphy_net(local->hw.wiphy));
+- 
+- 		ndev->tstats = netdev_alloc_pcpu_stats(struct pcpu_sw_netstats);
+---- a/net/mac80211/main.c
+-+++ b/net/mac80211/main.c
+-@@ -630,7 +630,7 @@ struct ieee80211_hw *ieee80211_alloc_hw_
+- 
+- 	if (WARN_ON(!ops->tx || !ops->start || !ops->stop || !ops->config ||
+- 		    !ops->add_interface || !ops->remove_interface ||
+--		    !ops->configure_filter))
+-+		    !ops->configure_filter || !ops->wake_tx_queue))
+- 		return NULL;
+- 
+- 	if (WARN_ON(ops->sta_state && (ops->sta_add || ops->sta_remove)))
+-@@ -719,9 +719,7 @@ struct ieee80211_hw *ieee80211_alloc_hw_
+- 	if (!ops->set_key)
+- 		wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
+- 
+--	if (ops->wake_tx_queue)
+--		wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_TXQS);
+--
+-+	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_TXQS);
+- 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_RRM);
+- 
+- 	wiphy->bss_priv_size = sizeof(struct ieee80211_bss);
+-@@ -834,10 +832,7 @@ struct ieee80211_hw *ieee80211_alloc_hw_
+- 		atomic_set(&local->agg_queue_stop[i], 0);
+- 	}
+- 	tasklet_setup(&local->tx_pending_tasklet, ieee80211_tx_pending);
+--
+--	if (ops->wake_tx_queue)
+--		tasklet_setup(&local->wake_txqs_tasklet, ieee80211_wake_txqs);
+--
+-+	tasklet_setup(&local->wake_txqs_tasklet, ieee80211_wake_txqs);
+- 	tasklet_setup(&local->tasklet, ieee80211_tasklet_handler);
+- 
+- 	skb_queue_head_init(&local->skb_queue);
+---- a/net/mac80211/rx.c
+-+++ b/net/mac80211/rx.c
+-@@ -1571,9 +1571,6 @@ static void sta_ps_start(struct sta_info
+- 
+- 	ieee80211_clear_fast_xmit(sta);
+- 
+--	if (!sta->sta.txq[0])
+--		return;
+--
+- 	for (tid = 0; tid < IEEE80211_NUM_TIDS; tid++) {
+- 		struct ieee80211_txq *txq = sta->sta.txq[tid];
+- 		struct txq_info *txqi = to_txq_info(txq);
+---- a/net/mac80211/sta_info.c
+-+++ b/net/mac80211/sta_info.c
+-@@ -140,17 +140,15 @@ static void __cleanup_single_sta(struct
+- 		atomic_dec(&ps->num_sta_ps);
+- 	}
+- 
+--	if (sta->sta.txq[0]) {
+--		for (i = 0; i < ARRAY_SIZE(sta->sta.txq); i++) {
+--			struct txq_info *txqi;
+-+	for (i = 0; i < ARRAY_SIZE(sta->sta.txq); i++) {
+-+		struct txq_info *txqi;
+- 
+--			if (!sta->sta.txq[i])
+--				continue;
+-+		if (!sta->sta.txq[i])
+-+			continue;
+- 
+--			txqi = to_txq_info(sta->sta.txq[i]);
+-+		txqi = to_txq_info(sta->sta.txq[i]);
+- 
+--			ieee80211_txq_purge(local, txqi);
+--		}
+-+		ieee80211_txq_purge(local, txqi);
+- 	}
+- 
+- 	for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
+-@@ -425,8 +423,7 @@ void sta_info_free(struct ieee80211_loca
+- 
+- 	sta_dbg(sta->sdata, "Destroyed STA %pM\n", sta->sta.addr);
+- 
+--	if (sta->sta.txq[0])
+--		kfree(to_txq_info(sta->sta.txq[0]));
+-+	kfree(to_txq_info(sta->sta.txq[0]));
+- 	kfree(rcu_dereference_raw(sta->sta.rates));
+- #ifdef CPTCFG_MAC80211_MESH
+- 	kfree(sta->mesh);
+-@@ -527,6 +524,8 @@ __sta_info_alloc(struct ieee80211_sub_if
+- 	struct ieee80211_local *local = sdata->local;
+- 	struct ieee80211_hw *hw = &local->hw;
+- 	struct sta_info *sta;
+-+	void *txq_data;
+-+	int size;
+- 	int i;
+- 
+- 	sta = kzalloc(sizeof(*sta) + hw->sta_data_size, gfp);
+-@@ -597,21 +596,18 @@ __sta_info_alloc(struct ieee80211_sub_if
+- 
+- 	sta->last_connected = ktime_get_seconds();
+- 
+--	if (local->ops->wake_tx_queue) {
+--		void *txq_data;
+--		int size = sizeof(struct txq_info) +
+--			   ALIGN(hw->txq_data_size, sizeof(void *));
+-+	size = sizeof(struct txq_info) +
+-+	       ALIGN(hw->txq_data_size, sizeof(void *));
+- 
+--		txq_data = kcalloc(ARRAY_SIZE(sta->sta.txq), size, gfp);
+--		if (!txq_data)
+--			goto free;
+-+	txq_data = kcalloc(ARRAY_SIZE(sta->sta.txq), size, gfp);
+-+	if (!txq_data)
+-+		goto free;
+- 
+--		for (i = 0; i < ARRAY_SIZE(sta->sta.txq); i++) {
+--			struct txq_info *txq = txq_data + i * size;
+-+	for (i = 0; i < ARRAY_SIZE(sta->sta.txq); i++) {
+-+		struct txq_info *txq = txq_data + i * size;
+- 
+--			/* might not do anything for the bufferable MMPDU TXQ */
+--			ieee80211_txq_init(sdata, sta, txq, i);
+--		}
+-+		/* might not do anything for the (bufferable) MMPDU TXQ */
+-+		ieee80211_txq_init(sdata, sta, txq, i);
+- 	}
+- 
+- 	if (sta_prepare_rate_control(local, sta, gfp))
+-@@ -685,8 +681,7 @@ __sta_info_alloc(struct ieee80211_sub_if
+- 	return sta;
+- 
+- free_txq:
+--	if (sta->sta.txq[0])
+--		kfree(to_txq_info(sta->sta.txq[0]));
+-+	kfree(to_txq_info(sta->sta.txq[0]));
+- free:
+- 	sta_info_free_link(&sta->deflink);
+- #ifdef CPTCFG_MAC80211_MESH
+-@@ -1960,9 +1955,6 @@ ieee80211_sta_ps_deliver_response(struct
+- 		 * TIM recalculation.
+- 		 */
+- 
+--		if (!sta->sta.txq[0])
+--			return;
+--
+- 		for (tid = 0; tid < ARRAY_SIZE(sta->sta.txq); tid++) {
+- 			if (!sta->sta.txq[tid] ||
+- 			    !(driver_release_tids & BIT(tid)) ||
+-@@ -2447,7 +2439,7 @@ static void sta_set_tidstats(struct sta_
+- 		tidstats->tx_msdu_failed = sta->deflink.status_stats.msdu_failed[tid];
+- 	}
+- 
+--	if (local->ops->wake_tx_queue && tid < IEEE80211_NUM_TIDS) {
+-+	if (tid < IEEE80211_NUM_TIDS) {
+- 		spin_lock_bh(&local->fq.lock);
+- 		rcu_read_lock();
+- 
+-@@ -2775,9 +2767,6 @@ unsigned long ieee80211_sta_last_active(
+- 
+- static void sta_update_codel_params(struct sta_info *sta, u32 thr)
+- {
+--	if (!sta->sdata->local->ops->wake_tx_queue)
+--		return;
+--
+- 	if (thr && thr < STA_SLOW_THRESHOLD * sta->local->num_sta) {
+- 		sta->cparams.target = MS2TIME(50);
+- 		sta->cparams.interval = MS2TIME(300);
+---- a/net/mac80211/tdls.c
+-+++ b/net/mac80211/tdls.c
+-@@ -1016,7 +1016,6 @@ ieee80211_tdls_prep_mgmt_packet(struct w
+- 		skb->priority = 256 + 5;
+- 		break;
+- 	}
+--	skb_set_queue_mapping(skb, ieee80211_select_queue(sdata, skb));
+- 
+- 	/*
+- 	 * Set the WLAN_TDLS_TEARDOWN flag to indicate a teardown in progress.
+---- a/net/mac80211/tx.c
+-+++ b/net/mac80211/tx.c
+-@@ -1600,9 +1600,6 @@ int ieee80211_txq_setup_flows(struct iee
+- 	bool supp_vht = false;
+- 	enum nl80211_band band;
+- 
+--	if (!local->ops->wake_tx_queue)
+--		return 0;
+--
+- 	ret = fq_init(fq, 4096);
+- 	if (ret)
+- 		return ret;
+-@@ -1650,9 +1647,6 @@ void ieee80211_txq_teardown_flows(struct
+- {
+- 	struct fq *fq = &local->fq;
+- 
+--	if (!local->ops->wake_tx_queue)
+--		return;
+--
+- 	kfree(local->cvars);
+- 	local->cvars = NULL;
+- 
+-@@ -1669,8 +1663,7 @@ static bool ieee80211_queue_skb(struct i
+- 	struct ieee80211_vif *vif;
+- 	struct txq_info *txqi;
+- 
+--	if (!local->ops->wake_tx_queue ||
+--	    sdata->vif.type == NL80211_IFTYPE_MONITOR)
+-+	if (sdata->vif.type == NL80211_IFTYPE_MONITOR)
+- 		return false;
+- 
+- 	if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
+-@@ -4193,12 +4186,7 @@ void __ieee80211_subif_start_xmit(struct
+- 	if (IS_ERR(sta))
+- 		sta = NULL;
+- 
+--	if (local->ops->wake_tx_queue) {
+--		u16 queue = __ieee80211_select_queue(sdata, sta, skb);
+--		skb_set_queue_mapping(skb, queue);
+--		skb_get_hash(skb);
+--	}
+--
+-+	skb_set_queue_mapping(skb, ieee80211_select_queue(sdata, sta, skb));
+- 	ieee80211_aggr_check(sdata, sta, skb);
+- 
+- 	sk_pacing_shift_update(skb->sk, sdata->local->hw.tx_sk_pacing_shift);
+-@@ -4509,11 +4497,7 @@ static void ieee80211_8023_xmit(struct i
+- 	struct tid_ampdu_tx *tid_tx;
+- 	u8 tid;
+- 
+--	if (local->ops->wake_tx_queue) {
+--		u16 queue = __ieee80211_select_queue(sdata, sta, skb);
+--		skb_set_queue_mapping(skb, queue);
+--		skb_get_hash(skb);
+--	}
+-+	skb_set_queue_mapping(skb, ieee80211_select_queue(sdata, sta, skb));
+- 
+- 	if (unlikely(test_bit(SCAN_SW_SCANNING, &local->scanning)) &&
+- 	    test_bit(SDATA_STATE_OFFCHANNEL, &sdata->state))
+-@@ -4767,9 +4751,6 @@ void ieee80211_tx_pending(struct tasklet
+- 			if (!txok)
+- 				break;
+- 		}
+--
+--		if (skb_queue_empty(&local->pending[i]))
+--			ieee80211_propagate_queue_wake(local, i);
+- 	}
+- 	spin_unlock_irqrestore(&local->queue_stop_reason_lock, flags);
+- 
+-@@ -5962,10 +5943,9 @@ int ieee80211_tx_control_port(struct wip
+- 	}
+- 
+- 	if (!IS_ERR(sta)) {
+--		u16 queue = __ieee80211_select_queue(sdata, sta, skb);
+-+		u16 queue = ieee80211_select_queue(sdata, sta, skb);
+- 
+- 		skb_set_queue_mapping(skb, queue);
+--		skb_get_hash(skb);
+- 
+- 		/*
+- 		 * for MLO STA, the SA should be the AP MLD address, but
+---- a/net/mac80211/util.c
+-+++ b/net/mac80211/util.c
+-@@ -444,39 +444,6 @@ void ieee80211_wake_txqs(struct tasklet_
+- 	spin_unlock_irqrestore(&local->queue_stop_reason_lock, flags);
+- }
+- 
+--void ieee80211_propagate_queue_wake(struct ieee80211_local *local, int queue)
+--{
+--	struct ieee80211_sub_if_data *sdata;
+--	int n_acs = IEEE80211_NUM_ACS;
+--
+--	if (local->ops->wake_tx_queue)
+--		return;
+--
+--	if (local->hw.queues < IEEE80211_NUM_ACS)
+--		n_acs = 1;
+--
+--	list_for_each_entry_rcu(sdata, &local->interfaces, list) {
+--		int ac;
+--
+--		if (!sdata->dev)
+--			continue;
+--
+--		if (sdata->vif.cab_queue != IEEE80211_INVAL_HW_QUEUE &&
+--		    local->queue_stop_reasons[sdata->vif.cab_queue] != 0)
+--			continue;
+--
+--		for (ac = 0; ac < n_acs; ac++) {
+--			int ac_queue = sdata->vif.hw_queue[ac];
+--
+--			if (ac_queue == queue ||
+--			    (sdata->vif.cab_queue == queue &&
+--			     local->queue_stop_reasons[ac_queue] == 0 &&
+--			     skb_queue_empty(&local->pending[ac_queue])))
+--				netif_wake_subqueue(sdata->dev, ac);
+--		}
+--	}
+--}
+--
+- static void __ieee80211_wake_queue(struct ieee80211_hw *hw, int queue,
+- 				   enum queue_stop_reason reason,
+- 				   bool refcounted,
+-@@ -507,11 +474,7 @@ static void __ieee80211_wake_queue(struc
+- 		/* someone still has this queue stopped */
+- 		return;
+- 
+--	if (skb_queue_empty(&local->pending[queue])) {
+--		rcu_read_lock();
+--		ieee80211_propagate_queue_wake(local, queue);
+--		rcu_read_unlock();
+--	} else
+-+	if (!skb_queue_empty(&local->pending[queue]))
+- 		tasklet_schedule(&local->tx_pending_tasklet);
+- 
+- 	/*
+-@@ -521,12 +484,10 @@ static void __ieee80211_wake_queue(struc
+- 	 * release someone's lock, but it is fine because all the callers of
+- 	 * __ieee80211_wake_queue call it right before releasing the lock.
+- 	 */
+--	if (local->ops->wake_tx_queue) {
+--		if (reason == IEEE80211_QUEUE_STOP_REASON_DRIVER)
+--			tasklet_schedule(&local->wake_txqs_tasklet);
+--		else
+--			_ieee80211_wake_txqs(local, flags);
+--	}
+-+	if (reason == IEEE80211_QUEUE_STOP_REASON_DRIVER)
+-+		tasklet_schedule(&local->wake_txqs_tasklet);
+-+	else
+-+		_ieee80211_wake_txqs(local, flags);
+- }
+- 
+- void ieee80211_wake_queue_by_reason(struct ieee80211_hw *hw, int queue,
+-@@ -554,8 +515,6 @@ static void __ieee80211_stop_queue(struc
+- 				   bool refcounted)
+- {
+- 	struct ieee80211_local *local = hw_to_local(hw);
+--	struct ieee80211_sub_if_data *sdata;
+--	int n_acs = IEEE80211_NUM_ACS;
+- 
+- 	trace_stop_queue(local, queue, reason);
+- 
+-@@ -567,27 +526,7 @@ static void __ieee80211_stop_queue(struc
+- 	else
+- 		local->q_stop_reasons[queue][reason]++;
+- 
+--	if (__test_and_set_bit(reason, &local->queue_stop_reasons[queue]))
+--		return;
+--
+--	if (local->hw.queues < IEEE80211_NUM_ACS)
+--		n_acs = 1;
+--
+--	rcu_read_lock();
+--	list_for_each_entry_rcu(sdata, &local->interfaces, list) {
+--		int ac;
+--
+--		if (!sdata->dev)
+--			continue;
+--
+--		for (ac = 0; ac < n_acs; ac++) {
+--			if (!local->ops->wake_tx_queue &&
+--			    (sdata->vif.hw_queue[ac] == queue ||
+--			     sdata->vif.cab_queue == queue))
+--				netif_stop_subqueue(sdata->dev, ac);
+--		}
+--	}
+--	rcu_read_unlock();
+-+	set_bit(reason, &local->queue_stop_reasons[queue]);
+- }
+- 
+- void ieee80211_stop_queue_by_reason(struct ieee80211_hw *hw, int queue,
+---- a/net/mac80211/wme.c
+-+++ b/net/mac80211/wme.c
+-@@ -122,6 +122,9 @@ u16 ieee80211_select_queue_80211(struct
+- 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+- 	u8 *p;
+- 
+-+	/* Ensure hash is set prior to potential SW encryption */
+-+	skb_get_hash(skb);
+-+
+- 	if ((info->control.flags & IEEE80211_TX_CTRL_DONT_REORDER) ||
+- 	    local->hw.queues < IEEE80211_NUM_ACS)
+- 		return 0;
+-@@ -141,13 +144,16 @@ u16 ieee80211_select_queue_80211(struct
+- 	return ieee80211_downgrade_queue(sdata, NULL, skb);
+- }
+- 
+--u16 __ieee80211_select_queue(struct ieee80211_sub_if_data *sdata,
+--			     struct sta_info *sta, struct sk_buff *skb)
+-+u16 ieee80211_select_queue(struct ieee80211_sub_if_data *sdata,
+-+			   struct sta_info *sta, struct sk_buff *skb)
+- {
+- 	const struct ethhdr *eth = (void *)skb->data;
+- 	struct mac80211_qos_map *qos_map;
+- 	bool qos;
+- 
+-+	/* Ensure hash is set prior to potential SW encryption */
+-+	skb_get_hash(skb);
+-+
+- 	/* all mesh/ocb stations are required to support WME */
+- 	if ((sdata->vif.type == NL80211_IFTYPE_MESH_POINT &&
+- 	    !is_multicast_ether_addr(eth->h_dest)) ||
+-@@ -178,59 +184,6 @@ u16 __ieee80211_select_queue(struct ieee
+- 	return ieee80211_downgrade_queue(sdata, sta, skb);
+- }
+- 
+--
+--/* Indicate which queue to use. */
+--u16 ieee80211_select_queue(struct ieee80211_sub_if_data *sdata,
+--			   struct sk_buff *skb)
+--{
+--	struct ieee80211_local *local = sdata->local;
+--	struct sta_info *sta = NULL;
+--	const u8 *ra = NULL;
+--	u16 ret;
+--
+--	/* when using iTXQ, we can do this later */
+--	if (local->ops->wake_tx_queue)
+--		return 0;
+--
+--	if (local->hw.queues < IEEE80211_NUM_ACS || skb->len < 6) {
+--		skb->priority = 0; /* required for correct WPA/11i MIC */
+--		return 0;
+--	}
+--
+--	rcu_read_lock();
+--	switch (sdata->vif.type) {
+--	case NL80211_IFTYPE_AP_VLAN:
+--		sta = rcu_dereference(sdata->u.vlan.sta);
+--		if (sta)
+--			break;
+--		fallthrough;
+--	case NL80211_IFTYPE_AP:
+--		ra = skb->data;
+--		break;
+--	case NL80211_IFTYPE_STATION:
+--		/* might be a TDLS station */
+--		sta = sta_info_get(sdata, skb->data);
+--		if (sta)
+--			break;
+--
+--		ra = sdata->deflink.u.mgd.bssid;
+--		break;
+--	case NL80211_IFTYPE_ADHOC:
+--		ra = skb->data;
+--		break;
+--	default:
+--		break;
+--	}
+--
+--	if (!sta && ra && !is_multicast_ether_addr(ra))
+--		sta = sta_info_get(sdata, ra);
+--
+--	ret = __ieee80211_select_queue(sdata, sta, skb);
+--
+--	rcu_read_unlock();
+--	return ret;
+--}
+--
+- /**
+-  * ieee80211_set_qos_hdr - Fill in the QoS header if there is one.
+-  *
+---- a/net/mac80211/wme.h
+-+++ b/net/mac80211/wme.h
+-@@ -13,10 +13,8 @@
+- u16 ieee80211_select_queue_80211(struct ieee80211_sub_if_data *sdata,
+- 				 struct sk_buff *skb,
+- 				 struct ieee80211_hdr *hdr);
+--u16 __ieee80211_select_queue(struct ieee80211_sub_if_data *sdata,
+--			     struct sta_info *sta, struct sk_buff *skb);
+- u16 ieee80211_select_queue(struct ieee80211_sub_if_data *sdata,
+--			   struct sk_buff *skb);
+-+			   struct sta_info *sta, struct sk_buff *skb);
+- void ieee80211_set_qos_hdr(struct ieee80211_sub_if_data *sdata,
+- 			   struct sk_buff *skb);
+- 
+diff --git a/package/kernel/mac80211/patches/subsys/306-04-v6.2-wifi-realtek-remove-duplicated-wake_tx_queue.patch b/package/kernel/mac80211/patches/subsys/306-04-v6.2-wifi-realtek-remove-duplicated-wake_tx_queue.patch
+deleted file mode 100644
+index f0dfc75a78..0000000000
+--- a/package/kernel/mac80211/patches/subsys/306-04-v6.2-wifi-realtek-remove-duplicated-wake_tx_queue.patch
++++ /dev/null
+@@ -1,32 +0,0 @@
+-From: Johannes Berg <johannes.berg@intel.com>
+-Date: Mon, 10 Oct 2022 19:17:46 +0200
+-Subject: [PATCH] wifi: realtek: remove duplicated wake_tx_queue
+-
+-By accident, the previous patch duplicated the initialization
+-of the wake_tx_queue callback. Fix that by removing the new
+-initializations.
+-
+-Fixes: a790cc3a4fad ("wifi: mac80211: add wake_tx_queue callback to drivers")
+-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+----
+-
+---- a/drivers/net/wireless/realtek/rtw88/mac80211.c
+-+++ b/drivers/net/wireless/realtek/rtw88/mac80211.c
+-@@ -896,7 +896,6 @@ static void rtw_ops_sta_rc_update(struct
+- 
+- const struct ieee80211_ops rtw_ops = {
+- 	.tx			= rtw_ops_tx,
+--	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.wake_tx_queue		= rtw_ops_wake_tx_queue,
+- 	.start			= rtw_ops_start,
+- 	.stop			= rtw_ops_stop,
+---- a/drivers/net/wireless/realtek/rtw89/mac80211.c
+-+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c
+-@@ -918,7 +918,6 @@ static int rtw89_ops_set_tid_config(stru
+- 
+- const struct ieee80211_ops rtw89_ops = {
+- 	.tx			= rtw89_ops_tx,
+--	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
+- 	.wake_tx_queue		= rtw89_ops_wake_tx_queue,
+- 	.start			= rtw89_ops_start,
+- 	.stop			= rtw89_ops_stop,
+diff --git a/package/kernel/mac80211/patches/subsys/310-v6.2-mac80211-add-support-for-restricting-netdev-features.patch b/package/kernel/mac80211/patches/subsys/310-v6.2-mac80211-add-support-for-restricting-netdev-features.patch
+deleted file mode 100644
+index 812b12189c..0000000000
+--- a/package/kernel/mac80211/patches/subsys/310-v6.2-mac80211-add-support-for-restricting-netdev-features.patch
++++ /dev/null
+@@ -1,506 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Sun, 9 Oct 2022 20:15:46 +0200
+-Subject: [PATCH] mac80211: add support for restricting netdev features per vif
+-
+-This can be used to selectively disable feature flags for checksum offload,
+-scatter/gather or GSO by changing vif->netdev_features.
+-Removing features from vif->netdev_features does not affect the netdev
+-features themselves, but instead fixes up skbs in the tx path so that the
+-offloads are not needed in the driver.
+-
+-Aside from making it easier to deal with vif type based hardware limitations,
+-this also makes it possible to optimize performance on hardware without native
+-GSO support by declaring GSO support in hw->netdev_features and removing it
+-from vif->netdev_features. This allows mac80211 to handle GSO segmentation
+-after the sta lookup, but before itxq enqueue, thus reducing the number of
+-unnecessary sta lookups, as well as some other per-packet processing.
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/include/net/fq_impl.h
+-+++ b/include/net/fq_impl.h
+-@@ -200,6 +200,7 @@ static void fq_tin_enqueue(struct fq *fq
+- 			   fq_skb_free_t free_func)
+- {
+- 	struct fq_flow *flow;
+-+	struct sk_buff *next;
+- 	bool oom;
+- 
+- 	lockdep_assert_held(&fq->lock);
+-@@ -214,11 +215,15 @@ static void fq_tin_enqueue(struct fq *fq
+- 	}
+- 
+- 	flow->tin = tin;
+--	flow->backlog += skb->len;
+--	tin->backlog_bytes += skb->len;
+--	tin->backlog_packets++;
+--	fq->memory_usage += skb->truesize;
+--	fq->backlog++;
+-+	skb_list_walk_safe(skb, skb, next) {
+-+		skb_mark_not_on_list(skb);
+-+		flow->backlog += skb->len;
+-+		tin->backlog_bytes += skb->len;
+-+		tin->backlog_packets++;
+-+		fq->memory_usage += skb->truesize;
+-+		fq->backlog++;
+-+		__skb_queue_tail(&flow->queue, skb);
+-+	}
+- 
+- 	if (list_empty(&flow->flowchain)) {
+- 		flow->deficit = fq->quantum;
+-@@ -226,7 +231,6 @@ static void fq_tin_enqueue(struct fq *fq
+- 			      &tin->new_flows);
+- 	}
+- 
+--	__skb_queue_tail(&flow->queue, skb);
+- 	oom = (fq->memory_usage > fq->memory_limit);
+- 	while (fq->backlog > fq->limit || oom) {
+- 		flow = fq_find_fattest_flow(fq);
+---- a/include/net/mac80211.h
+-+++ b/include/net/mac80211.h
+-@@ -1807,6 +1807,10 @@ struct ieee80211_vif_cfg {
+-  * @addr: address of this interface
+-  * @p2p: indicates whether this AP or STA interface is a p2p
+-  *	interface, i.e. a GO or p2p-sta respectively
+-+ * @netdev_features: tx netdev features supported by the hardware for this
+-+ *	vif. mac80211 initializes this to hw->netdev_features, and the driver
+-+ *	can mask out specific tx features. mac80211 will handle software fixup
+-+ *	for masked offloads (GSO, CSUM)
+-  * @driver_flags: flags/capabilities the driver has for this interface,
+-  *	these need to be set (or cleared) when the interface is added
+-  *	or, if supported by the driver, the interface type is changed
+-@@ -1846,6 +1850,7 @@ struct ieee80211_vif {
+- 
+- 	struct ieee80211_txq *txq;
+- 
+-+	netdev_features_t netdev_features;
+- 	u32 driver_flags;
+- 	u32 offload_flags;
+- 
+---- a/net/mac80211/iface.c
+-+++ b/net/mac80211/iface.c
+-@@ -2181,6 +2181,7 @@ int ieee80211_if_add(struct ieee80211_lo
+- 		ndev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
+- 		ndev->hw_features |= ndev->features &
+- 					MAC80211_SUPPORTED_FEATURES_TX;
+-+		sdata->vif.netdev_features = local->hw.netdev_features;
+- 
+- 		netdev_set_default_ethtool_ops(ndev, &ieee80211_ethtool_ops);
+- 
+---- a/net/mac80211/tx.c
+-+++ b/net/mac80211/tx.c
+-@@ -1356,7 +1356,11 @@ static struct txq_info *ieee80211_get_tx
+- 
+- static void ieee80211_set_skb_enqueue_time(struct sk_buff *skb)
+- {
+--	IEEE80211_SKB_CB(skb)->control.enqueue_time = codel_get_time();
+-+	struct sk_buff *next;
+-+	codel_time_t now = codel_get_time();
+-+
+-+	skb_list_walk_safe(skb, skb, next)
+-+		IEEE80211_SKB_CB(skb)->control.enqueue_time = now;
+- }
+- 
+- static u32 codel_skb_len_func(const struct sk_buff *skb)
+-@@ -3579,55 +3583,79 @@ ieee80211_xmit_fast_finish(struct ieee80
+- 	return TX_CONTINUE;
+- }
+- 
+--static bool ieee80211_xmit_fast(struct ieee80211_sub_if_data *sdata,
+--				struct sta_info *sta,
+--				struct ieee80211_fast_tx *fast_tx,
+--				struct sk_buff *skb)
+-+static netdev_features_t
+-+ieee80211_sdata_netdev_features(struct ieee80211_sub_if_data *sdata)
+- {
+--	struct ieee80211_local *local = sdata->local;
+--	u16 ethertype = (skb->data[12] << 8) | skb->data[13];
+--	int extra_head = fast_tx->hdr_len - (ETH_HLEN - 2);
+--	int hw_headroom = sdata->local->hw.extra_tx_headroom;
+--	struct ethhdr eth;
+--	struct ieee80211_tx_info *info;
+--	struct ieee80211_hdr *hdr = (void *)fast_tx->hdr;
+--	struct ieee80211_tx_data tx;
+--	ieee80211_tx_result r;
+--	struct tid_ampdu_tx *tid_tx = NULL;
+--	u8 tid = IEEE80211_NUM_TIDS;
+-+	if (sdata->vif.type != NL80211_IFTYPE_AP_VLAN)
+-+		return sdata->vif.netdev_features;
+- 
+--	/* control port protocol needs a lot of special handling */
+--	if (cpu_to_be16(ethertype) == sdata->control_port_protocol)
+--		return false;
+-+	if (!sdata->bss)
+-+		return 0;
+- 
+--	/* only RFC 1042 SNAP */
+--	if (ethertype < ETH_P_802_3_MIN)
+--		return false;
+-+	sdata = container_of(sdata->bss, struct ieee80211_sub_if_data, u.ap);
+-+	return sdata->vif.netdev_features;
+-+}
+- 
+--	/* don't handle TX status request here either */
+--	if (skb->sk && skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS)
+--		return false;
+-+static struct sk_buff *
+-+ieee80211_tx_skb_fixup(struct sk_buff *skb, netdev_features_t features)
+-+{
+-+	if (skb_is_gso(skb)) {
+-+		struct sk_buff *segs;
+- 
+--	if (hdr->frame_control & cpu_to_le16(IEEE80211_STYPE_QOS_DATA)) {
+--		tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
+--		tid_tx = rcu_dereference(sta->ampdu_mlme.tid_tx[tid]);
+--		if (tid_tx) {
+--			if (!test_bit(HT_AGG_STATE_OPERATIONAL, &tid_tx->state))
+--				return false;
+--			if (tid_tx->timeout)
+--				tid_tx->last_tx = jiffies;
+--		}
+-+		segs = skb_gso_segment(skb, features);
+-+		if (!segs)
+-+			return skb;
+-+		if (IS_ERR(segs))
+-+			goto free;
+-+
+-+		consume_skb(skb);
+-+		return segs;
+- 	}
+- 
+--	/* after this point (skb is modified) we cannot return false */
+-+	if (skb_needs_linearize(skb, features) && __skb_linearize(skb))
+-+		goto free;
+-+
+-+	if (skb->ip_summed == CHECKSUM_PARTIAL) {
+-+		int ofs = skb_checksum_start_offset(skb);
+-+
+-+		if (skb->encapsulation)
+-+			skb_set_inner_transport_header(skb, ofs);
+-+		else
+-+			skb_set_transport_header(skb, ofs);
+-+
+-+		if (skb_csum_hwoffload_help(skb, features))
+-+			goto free;
+-+	}
+-+
+-+	skb_mark_not_on_list(skb);
+-+	return skb;
+-+
+-+free:
+-+	kfree_skb(skb);
+-+	return NULL;
+-+}
+-+
+-+static void __ieee80211_xmit_fast(struct ieee80211_sub_if_data *sdata,
+-+				  struct sta_info *sta,
+-+				  struct ieee80211_fast_tx *fast_tx,
+-+				  struct sk_buff *skb, u8 tid, bool ampdu)
+-+{
+-+	struct ieee80211_local *local = sdata->local;
+-+	struct ieee80211_hdr *hdr = (void *)fast_tx->hdr;
+-+	struct ieee80211_tx_info *info;
+-+	struct ieee80211_tx_data tx;
+-+	ieee80211_tx_result r;
+-+	int hw_headroom = sdata->local->hw.extra_tx_headroom;
+-+	int extra_head = fast_tx->hdr_len - (ETH_HLEN - 2);
+-+	struct ethhdr eth;
+- 
+- 	skb = skb_share_check(skb, GFP_ATOMIC);
+- 	if (unlikely(!skb))
+--		return true;
+-+		return;
+- 
+- 	if ((hdr->frame_control & cpu_to_le16(IEEE80211_STYPE_QOS_DATA)) &&
+- 	    ieee80211_amsdu_aggregate(sdata, sta, fast_tx, skb))
+--		return true;
+-+		return;
+- 
+- 	/* will not be crypto-handled beyond what we do here, so use false
+- 	 * as the may-encrypt argument for the resize to not account for
+-@@ -3636,10 +3664,8 @@ static bool ieee80211_xmit_fast(struct i
+- 	if (unlikely(ieee80211_skb_resize(sdata, skb,
+- 					  max_t(int, extra_head + hw_headroom -
+- 						     skb_headroom(skb), 0),
+--					  ENCRYPT_NO))) {
+--		kfree_skb(skb);
+--		return true;
+--	}
+-+					  ENCRYPT_NO)))
+-+		goto free;
+- 
+- 	memcpy(&eth, skb->data, ETH_HLEN - 2);
+- 	hdr = skb_push(skb, extra_head);
+-@@ -3653,7 +3679,7 @@ static bool ieee80211_xmit_fast(struct i
+- 	info->control.vif = &sdata->vif;
+- 	info->flags = IEEE80211_TX_CTL_FIRST_FRAGMENT |
+- 		      IEEE80211_TX_CTL_DONTFRAG |
+--		      (tid_tx ? IEEE80211_TX_CTL_AMPDU : 0);
+-+		      (ampdu ? IEEE80211_TX_CTL_AMPDU : 0);
+- 	info->control.flags = IEEE80211_TX_CTRL_FAST_XMIT |
+- 			      u32_encode_bits(IEEE80211_LINK_UNSPECIFIED,
+- 					      IEEE80211_TX_CTRL_MLO_LINK);
+-@@ -3677,16 +3703,14 @@ static bool ieee80211_xmit_fast(struct i
+- 	tx.key = fast_tx->key;
+- 
+- 	if (ieee80211_queue_skb(local, sdata, sta, skb))
+--		return true;
+-+		return;
+- 
+- 	tx.skb = skb;
+- 	r = ieee80211_xmit_fast_finish(sdata, sta, fast_tx->pn_offs,
+- 				       fast_tx->key, &tx);
+- 	tx.skb = NULL;
+--	if (r == TX_DROP) {
+--		kfree_skb(skb);
+--		return true;
+--	}
+-+	if (r == TX_DROP)
+-+		goto free;
+- 
+- 	if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
+- 		sdata = container_of(sdata->bss,
+-@@ -3694,6 +3718,56 @@ static bool ieee80211_xmit_fast(struct i
+- 
+- 	__skb_queue_tail(&tx.skbs, skb);
+- 	ieee80211_tx_frags(local, &sdata->vif, sta, &tx.skbs, false);
+-+	return;
+-+
+-+free:
+-+	kfree_skb(skb);
+-+}
+-+
+-+static bool ieee80211_xmit_fast(struct ieee80211_sub_if_data *sdata,
+-+				struct sta_info *sta,
+-+				struct ieee80211_fast_tx *fast_tx,
+-+				struct sk_buff *skb)
+-+{
+-+	u16 ethertype = (skb->data[12] << 8) | skb->data[13];
+-+	struct ieee80211_hdr *hdr = (void *)fast_tx->hdr;
+-+	struct tid_ampdu_tx *tid_tx = NULL;
+-+	struct sk_buff *next;
+-+	u8 tid = IEEE80211_NUM_TIDS;
+-+
+-+	/* control port protocol needs a lot of special handling */
+-+	if (cpu_to_be16(ethertype) == sdata->control_port_protocol)
+-+		return false;
+-+
+-+	/* only RFC 1042 SNAP */
+-+	if (ethertype < ETH_P_802_3_MIN)
+-+		return false;
+-+
+-+	/* don't handle TX status request here either */
+-+	if (skb->sk && skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS)
+-+		return false;
+-+
+-+	if (hdr->frame_control & cpu_to_le16(IEEE80211_STYPE_QOS_DATA)) {
+-+		tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
+-+		tid_tx = rcu_dereference(sta->ampdu_mlme.tid_tx[tid]);
+-+		if (tid_tx) {
+-+			if (!test_bit(HT_AGG_STATE_OPERATIONAL, &tid_tx->state))
+-+				return false;
+-+			if (tid_tx->timeout)
+-+				tid_tx->last_tx = jiffies;
+-+		}
+-+	}
+-+
+-+	/* after this point (skb is modified) we cannot return false */
+-+	skb = ieee80211_tx_skb_fixup(skb, ieee80211_sdata_netdev_features(sdata));
+-+	if (!skb)
+-+		return true;
+-+
+-+	skb_list_walk_safe(skb, skb, next) {
+-+		skb_mark_not_on_list(skb);
+-+		__ieee80211_xmit_fast(sdata, sta, fast_tx, skb, tid, tid_tx);
+-+	}
+-+
+- 	return true;
+- }
+- 
+-@@ -4201,31 +4275,14 @@ void __ieee80211_subif_start_xmit(struct
+- 			goto out;
+- 	}
+- 
+--	if (skb_is_gso(skb)) {
+--		struct sk_buff *segs;
+--
+--		segs = skb_gso_segment(skb, 0);
+--		if (IS_ERR(segs)) {
+--			goto out_free;
+--		} else if (segs) {
+--			consume_skb(skb);
+--			skb = segs;
+--		}
+--	} else {
+--		/* we cannot process non-linear frames on this path */
+--		if (skb_linearize(skb))
+--			goto out_free;
+--
+--		/* the frame could be fragmented, software-encrypted, and other
+--		 * things so we cannot really handle checksum offload with it -
+--		 * fix it up in software before we handle anything else.
+--		 */
+--		if (skb->ip_summed == CHECKSUM_PARTIAL) {
+--			skb_set_transport_header(skb,
+--						 skb_checksum_start_offset(skb));
+--			if (skb_checksum_help(skb))
+--				goto out_free;
+--		}
+-+	/* the frame could be fragmented, software-encrypted, and other
+-+	 * things so we cannot really handle checksum or GSO offload.
+-+	 * fix it up in software before we handle anything else.
+-+	 */
+-+	skb = ieee80211_tx_skb_fixup(skb, 0);
+-+	if (!skb) {
+-+		len = 0;
+-+		goto out;
+- 	}
+- 
+- 	skb_list_walk_safe(skb, skb, next) {
+-@@ -4443,9 +4500,11 @@ normal:
+- 	return NETDEV_TX_OK;
+- }
+- 
+--static bool ieee80211_tx_8023(struct ieee80211_sub_if_data *sdata,
+--			      struct sk_buff *skb, struct sta_info *sta,
+--			      bool txpending)
+-+
+-+
+-+static bool __ieee80211_tx_8023(struct ieee80211_sub_if_data *sdata,
+-+				struct sk_buff *skb, struct sta_info *sta,
+-+				bool txpending)
+- {
+- 	struct ieee80211_local *local = sdata->local;
+- 	struct ieee80211_tx_control control = {};
+-@@ -4454,14 +4513,6 @@ static bool ieee80211_tx_8023(struct iee
+- 	unsigned long flags;
+- 	int q = info->hw_queue;
+- 
+--	if (sta)
+--		sk_pacing_shift_update(skb->sk, local->hw.tx_sk_pacing_shift);
+--
+--	ieee80211_tpt_led_trig_tx(local, skb->len);
+--
+--	if (ieee80211_queue_skb(local, sdata, sta, skb))
+--		return true;
+--
+- 	spin_lock_irqsave(&local->queue_stop_reason_lock, flags);
+- 
+- 	if (local->queue_stop_reasons[q] ||
+-@@ -4488,6 +4539,26 @@ static bool ieee80211_tx_8023(struct iee
+- 	return true;
+- }
+- 
+-+static bool ieee80211_tx_8023(struct ieee80211_sub_if_data *sdata,
+-+			      struct sk_buff *skb, struct sta_info *sta,
+-+			      bool txpending)
+-+{
+-+	struct ieee80211_local *local = sdata->local;
+-+	struct sk_buff *next;
+-+	bool ret = true;
+-+
+-+	if (ieee80211_queue_skb(local, sdata, sta, skb))
+-+		return true;
+-+
+-+	skb_list_walk_safe(skb, skb, next) {
+-+		skb_mark_not_on_list(skb);
+-+		if (!__ieee80211_tx_8023(sdata, skb, sta, txpending))
+-+			ret = false;
+-+	}
+-+
+-+	return ret;
+-+}
+-+
+- static void ieee80211_8023_xmit(struct ieee80211_sub_if_data *sdata,
+- 				struct net_device *dev, struct sta_info *sta,
+- 				struct ieee80211_key *key, struct sk_buff *skb)
+-@@ -4495,9 +4566,13 @@ static void ieee80211_8023_xmit(struct i
+- 	struct ieee80211_tx_info *info;
+- 	struct ieee80211_local *local = sdata->local;
+- 	struct tid_ampdu_tx *tid_tx;
+-+	struct sk_buff *seg, *next;
+-+	unsigned int skbs = 0, len = 0;
+-+	u16 queue;
+- 	u8 tid;
+- 
+--	skb_set_queue_mapping(skb, ieee80211_select_queue(sdata, sta, skb));
+-+	queue = ieee80211_select_queue(sdata, sta, skb);
+-+	skb_set_queue_mapping(skb, queue);
+- 
+- 	if (unlikely(test_bit(SCAN_SW_SCANNING, &local->scanning)) &&
+- 	    test_bit(SDATA_STATE_OFFCHANNEL, &sdata->state))
+-@@ -4507,9 +4582,6 @@ static void ieee80211_8023_xmit(struct i
+- 	if (unlikely(!skb))
+- 		return;
+- 
+--	info = IEEE80211_SKB_CB(skb);
+--	memset(info, 0, sizeof(*info));
+--
+- 	ieee80211_aggr_check(sdata, sta, skb);
+- 
+- 	tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
+-@@ -4523,22 +4595,20 @@ static void ieee80211_8023_xmit(struct i
+- 			return;
+- 		}
+- 
+--		info->flags |= IEEE80211_TX_CTL_AMPDU;
+- 		if (tid_tx->timeout)
+- 			tid_tx->last_tx = jiffies;
+- 	}
+- 
+--	if (unlikely(skb->sk &&
+--		     skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS))
+--		info->ack_frame_id = ieee80211_store_ack_skb(local, skb,
+--							     &info->flags, NULL);
+-+	skb = ieee80211_tx_skb_fixup(skb, ieee80211_sdata_netdev_features(sdata));
+-+	if (!skb)
+-+		return;
+- 
+--	info->hw_queue = sdata->vif.hw_queue[skb_get_queue_mapping(skb)];
+-+	info = IEEE80211_SKB_CB(skb);
+-+	memset(info, 0, sizeof(*info));
+-+	if (tid_tx)
+-+		info->flags |= IEEE80211_TX_CTL_AMPDU;
+- 
+--	dev_sw_netstats_tx_add(dev, 1, skb->len);
+--
+--	sta->deflink.tx_stats.bytes[skb_get_queue_mapping(skb)] += skb->len;
+--	sta->deflink.tx_stats.packets[skb_get_queue_mapping(skb)]++;
+-+	info->hw_queue = sdata->vif.hw_queue[queue];
+- 
+- 	if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
+- 		sdata = container_of(sdata->bss,
+-@@ -4550,6 +4620,24 @@ static void ieee80211_8023_xmit(struct i
+- 	if (key)
+- 		info->control.hw_key = &key->conf;
+- 
+-+	skb_list_walk_safe(skb, seg, next) {
+-+		skbs++;
+-+		len += seg->len;
+-+		if (seg != skb)
+-+			memcpy(IEEE80211_SKB_CB(seg), info, sizeof(*info));
+-+	}
+-+
+-+	if (unlikely(skb->sk &&
+-+		     skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS))
+-+		info->ack_frame_id = ieee80211_store_ack_skb(local, skb,
+-+							     &info->flags, NULL);
+-+
+-+	dev_sw_netstats_tx_add(dev, skbs, len);
+-+	sta->deflink.tx_stats.packets[queue] += skbs;
+-+	sta->deflink.tx_stats.bytes[queue] += len;
+-+
+-+	ieee80211_tpt_led_trig_tx(local, len);
+-+
+- 	ieee80211_tx_8023(sdata, skb, sta, false);
+- 
+- 	return;
+-@@ -4591,6 +4679,7 @@ netdev_tx_t ieee80211_subif_start_xmit_8
+- 		    key->conf.cipher == WLAN_CIPHER_SUITE_TKIP))
+- 		goto skip_offload;
+- 
+-+	sk_pacing_shift_update(skb->sk, sdata->local->hw.tx_sk_pacing_shift);
+- 	ieee80211_8023_xmit(sdata, dev, sta, key, skb);
+- 	goto out;
+- 
+diff --git a/package/kernel/mac80211/patches/subsys/311-v6.2-wifi-mac80211-fix-and-simplify-unencrypted-drop-chec.patch b/package/kernel/mac80211/patches/subsys/311-v6.2-wifi-mac80211-fix-and-simplify-unencrypted-drop-chec.patch
+deleted file mode 100644
+index 804b02eb30..0000000000
+--- a/package/kernel/mac80211/patches/subsys/311-v6.2-wifi-mac80211-fix-and-simplify-unencrypted-drop-chec.patch
++++ /dev/null
+@@ -1,87 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Thu, 1 Dec 2022 14:57:30 +0100
+-Subject: [PATCH] wifi: mac80211: fix and simplify unencrypted drop check for
+- mesh
+-
+-ieee80211_drop_unencrypted is called from ieee80211_rx_h_mesh_fwding and
+-ieee80211_frame_allowed.
+-
+-Since ieee80211_rx_h_mesh_fwding can forward packets for other mesh nodes
+-and is called earlier, it needs to check the decryptions status and if the
+-packet is using the control protocol on its own, instead of deferring to
+-the later call from ieee80211_frame_allowed.
+-
+-Because of that, ieee80211_drop_unencrypted has a mesh specific check
+-that skips over the mesh header in order to check the payload protocol.
+-This code is invalid when called from ieee80211_frame_allowed, since that
+-happens after the 802.11->802.3 conversion.
+-
+-Fix this by moving the mesh specific check directly into
+-ieee80211_rx_h_mesh_fwding.
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+-Link: https://lore.kernel.org/r/20221201135730.19723-1-nbd@nbd.name
+-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+----
+-
+---- a/net/mac80211/rx.c
+-+++ b/net/mac80211/rx.c
+-@@ -2403,7 +2403,6 @@ static int ieee80211_802_1x_port_control
+- 
+- static int ieee80211_drop_unencrypted(struct ieee80211_rx_data *rx, __le16 fc)
+- {
+--	struct ieee80211_hdr *hdr = (void *)rx->skb->data;
+- 	struct sk_buff *skb = rx->skb;
+- 	struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
+- 
+-@@ -2414,31 +2413,6 @@ static int ieee80211_drop_unencrypted(st
+- 	if (status->flag & RX_FLAG_DECRYPTED)
+- 		return 0;
+- 
+--	/* check mesh EAPOL frames first */
+--	if (unlikely(rx->sta && ieee80211_vif_is_mesh(&rx->sdata->vif) &&
+--		     ieee80211_is_data(fc))) {
+--		struct ieee80211s_hdr *mesh_hdr;
+--		u16 hdr_len = ieee80211_hdrlen(fc);
+--		u16 ethertype_offset;
+--		__be16 ethertype;
+--
+--		if (!ether_addr_equal(hdr->addr1, rx->sdata->vif.addr))
+--			goto drop_check;
+--
+--		/* make sure fixed part of mesh header is there, also checks skb len */
+--		if (!pskb_may_pull(rx->skb, hdr_len + 6))
+--			goto drop_check;
+--
+--		mesh_hdr = (struct ieee80211s_hdr *)(skb->data + hdr_len);
+--		ethertype_offset = hdr_len + ieee80211_get_mesh_hdrlen(mesh_hdr) +
+--				   sizeof(rfc1042_header);
+--
+--		if (skb_copy_bits(rx->skb, ethertype_offset, &ethertype, 2) == 0 &&
+--		    ethertype == rx->sdata->control_port_protocol)
+--			return 0;
+--	}
+--
+--drop_check:
+- 	/* Drop unencrypted frames if key is set. */
+- 	if (unlikely(!ieee80211_has_protected(fc) &&
+- 		     !ieee80211_is_any_nullfunc(fc) &&
+-@@ -2892,8 +2866,16 @@ ieee80211_rx_h_mesh_fwding(struct ieee80
+- 	hdr = (struct ieee80211_hdr *) skb->data;
+- 	mesh_hdr = (struct ieee80211s_hdr *) (skb->data + hdrlen);
+- 
+--	if (ieee80211_drop_unencrypted(rx, hdr->frame_control))
+--		return RX_DROP_MONITOR;
+-+	if (ieee80211_drop_unencrypted(rx, hdr->frame_control)) {
+-+		int offset = hdrlen + ieee80211_get_mesh_hdrlen(mesh_hdr) +
+-+			     sizeof(rfc1042_header);
+-+		__be16 ethertype;
+-+
+-+		if (!ether_addr_equal(hdr->addr1, rx->sdata->vif.addr) ||
+-+		    skb_copy_bits(rx->skb, offset, &ethertype, 2) != 0 ||
+-+		    ethertype != rx->sdata->control_port_protocol)
+-+			return RX_DROP_MONITOR;
+-+	}
+- 
+- 	/* frame is in RMC, don't forward */
+- 	if (ieee80211_is_data(hdr->frame_control) &&
+diff --git a/package/kernel/mac80211/patches/subsys/312-v6.3-wifi-cfg80211-move-A-MSDU-check-in-ieee80211_data_to.patch b/package/kernel/mac80211/patches/subsys/312-v6.3-wifi-cfg80211-move-A-MSDU-check-in-ieee80211_data_to.patch
+deleted file mode 100644
+index f668905cca..0000000000
+--- a/package/kernel/mac80211/patches/subsys/312-v6.3-wifi-cfg80211-move-A-MSDU-check-in-ieee80211_data_to.patch
++++ /dev/null
+@@ -1,25 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Fri, 2 Dec 2022 13:53:11 +0100
+-Subject: [PATCH] wifi: cfg80211: move A-MSDU check in
+- ieee80211_data_to_8023_exthdr
+-
+-When parsing the outer A-MSDU header, don't check for inner bridge tunnel
+-or RFC1042 headers. This is handled by ieee80211_amsdu_to_8023s already.
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/net/wireless/util.c
+-+++ b/net/wireless/util.c
+-@@ -631,8 +631,9 @@ int ieee80211_data_to_8023_exthdr(struct
+- 		break;
+- 	}
+- 
+--	if (likely(skb_copy_bits(skb, hdrlen, &payload, sizeof(payload)) == 0 &&
+--	           ((!is_amsdu && ether_addr_equal(payload.hdr, rfc1042_header) &&
+-+	if (likely(!is_amsdu &&
+-+		   skb_copy_bits(skb, hdrlen, &payload, sizeof(payload)) == 0 &&
+-+	           ((ether_addr_equal(payload.hdr, rfc1042_header) &&
+- 		     payload.proto != htons(ETH_P_AARP) &&
+- 		     payload.proto != htons(ETH_P_IPX)) ||
+- 		    ether_addr_equal(payload.hdr, bridge_tunnel_header)))) {
+diff --git a/package/kernel/mac80211/patches/subsys/313-v6.3-wifi-cfg80211-factor-out-bridge-tunnel-RFC1042-heade.patch b/package/kernel/mac80211/patches/subsys/313-v6.3-wifi-cfg80211-factor-out-bridge-tunnel-RFC1042-heade.patch
+deleted file mode 100644
+index 8641057869..0000000000
+--- a/package/kernel/mac80211/patches/subsys/313-v6.3-wifi-cfg80211-factor-out-bridge-tunnel-RFC1042-heade.patch
++++ /dev/null
+@@ -1,76 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Fri, 2 Dec 2022 13:54:15 +0100
+-Subject: [PATCH] wifi: cfg80211: factor out bridge tunnel / RFC1042 header
+- check
+-
+-The same check is done in multiple places, unify it.
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/net/wireless/util.c
+-+++ b/net/wireless/util.c
+-@@ -542,6 +542,21 @@ unsigned int ieee80211_get_mesh_hdrlen(s
+- }
+- EXPORT_SYMBOL(ieee80211_get_mesh_hdrlen);
+- 
+-+static bool ieee80211_get_8023_tunnel_proto(const void *hdr, __be16 *proto)
+-+{
+-+	const __be16 *hdr_proto = hdr + ETH_ALEN;
+-+
+-+	if (!(ether_addr_equal(hdr, rfc1042_header) &&
+-+	      *hdr_proto != htons(ETH_P_AARP) &&
+-+	      *hdr_proto != htons(ETH_P_IPX)) &&
+-+	    !ether_addr_equal(hdr, bridge_tunnel_header))
+-+		return false;
+-+
+-+	*proto = *hdr_proto;
+-+
+-+	return true;
+-+}
+-+
+- int ieee80211_data_to_8023_exthdr(struct sk_buff *skb, struct ethhdr *ehdr,
+- 				  const u8 *addr, enum nl80211_iftype iftype,
+- 				  u8 data_offset, bool is_amsdu)
+-@@ -633,14 +648,9 @@ int ieee80211_data_to_8023_exthdr(struct
+- 
+- 	if (likely(!is_amsdu &&
+- 		   skb_copy_bits(skb, hdrlen, &payload, sizeof(payload)) == 0 &&
+--	           ((ether_addr_equal(payload.hdr, rfc1042_header) &&
+--		     payload.proto != htons(ETH_P_AARP) &&
+--		     payload.proto != htons(ETH_P_IPX)) ||
+--		    ether_addr_equal(payload.hdr, bridge_tunnel_header)))) {
+--		/* remove RFC1042 or Bridge-Tunnel encapsulation and
+--		 * replace EtherType */
+-+		   ieee80211_get_8023_tunnel_proto(&payload, &tmp.h_proto))) {
+-+		/* remove RFC1042 or Bridge-Tunnel encapsulation */
+- 		hdrlen += ETH_ALEN + 2;
+--		tmp.h_proto = payload.proto;
+- 		skb_postpull_rcsum(skb, &payload, ETH_ALEN + 2);
+- 	} else {
+- 		tmp.h_proto = htons(skb->len - hdrlen);
+-@@ -756,8 +766,6 @@ void ieee80211_amsdu_to_8023s(struct sk_
+- {
+- 	unsigned int hlen = ALIGN(extra_headroom, 4);
+- 	struct sk_buff *frame = NULL;
+--	u16 ethertype;
+--	u8 *payload;
+- 	int offset = 0, remaining;
+- 	struct ethhdr eth;
+- 	bool reuse_frag = skb->head_frag && !skb_has_frag_list(skb);
+-@@ -811,14 +819,8 @@ void ieee80211_amsdu_to_8023s(struct sk_
+- 		frame->dev = skb->dev;
+- 		frame->priority = skb->priority;
+- 
+--		payload = frame->data;
+--		ethertype = (payload[6] << 8) | payload[7];
+--		if (likely((ether_addr_equal(payload, rfc1042_header) &&
+--			    ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
+--			   ether_addr_equal(payload, bridge_tunnel_header))) {
+--			eth.h_proto = htons(ethertype);
+-+		if (likely(ieee80211_get_8023_tunnel_proto(frame->data, &eth.h_proto)))
+- 			skb_pull(frame, ETH_ALEN + 2);
+--		}
+- 
+- 		memcpy(skb_push(frame, sizeof(eth)), &eth, sizeof(eth));
+- 		__skb_queue_tail(list, frame);
+diff --git a/package/kernel/mac80211/patches/subsys/314-v6.3-wifi-mac80211-remove-mesh-forwarding-congestion-chec.patch b/package/kernel/mac80211/patches/subsys/314-v6.3-wifi-mac80211-remove-mesh-forwarding-congestion-chec.patch
+deleted file mode 100644
+index 515176f0de..0000000000
+--- a/package/kernel/mac80211/patches/subsys/314-v6.3-wifi-mac80211-remove-mesh-forwarding-congestion-chec.patch
++++ /dev/null
+@@ -1,54 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Fri, 2 Dec 2022 17:01:46 +0100
+-Subject: [PATCH] wifi: mac80211: remove mesh forwarding congestion check
+-
+-Now that all drivers use iTXQ, it does not make sense to check to drop
+-tx forwarding packets when the driver has stopped the queues.
+-fq_codel will take care of dropping packets when the queues fill up
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/net/mac80211/debugfs_netdev.c
+-+++ b/net/mac80211/debugfs_netdev.c
+-@@ -603,8 +603,6 @@ IEEE80211_IF_FILE(fwded_mcast, u.mesh.ms
+- IEEE80211_IF_FILE(fwded_unicast, u.mesh.mshstats.fwded_unicast, DEC);
+- IEEE80211_IF_FILE(fwded_frames, u.mesh.mshstats.fwded_frames, DEC);
+- IEEE80211_IF_FILE(dropped_frames_ttl, u.mesh.mshstats.dropped_frames_ttl, DEC);
+--IEEE80211_IF_FILE(dropped_frames_congestion,
+--		  u.mesh.mshstats.dropped_frames_congestion, DEC);
+- IEEE80211_IF_FILE(dropped_frames_no_route,
+- 		  u.mesh.mshstats.dropped_frames_no_route, DEC);
+- 
+-@@ -740,7 +738,6 @@ static void add_mesh_stats(struct ieee80
+- 	MESHSTATS_ADD(fwded_frames);
+- 	MESHSTATS_ADD(dropped_frames_ttl);
+- 	MESHSTATS_ADD(dropped_frames_no_route);
+--	MESHSTATS_ADD(dropped_frames_congestion);
+- #undef MESHSTATS_ADD
+- }
+- 
+---- a/net/mac80211/ieee80211_i.h
+-+++ b/net/mac80211/ieee80211_i.h
+-@@ -329,7 +329,6 @@ struct mesh_stats {
+- 	__u32 fwded_frames;		/* Mesh total forwarded frames */
+- 	__u32 dropped_frames_ttl;	/* Not transmitted since mesh_ttl == 0*/
+- 	__u32 dropped_frames_no_route;	/* Not transmitted, no route found */
+--	__u32 dropped_frames_congestion;/* Not forwarded due to congestion */
+- };
+- 
+- #define PREQ_Q_F_START		0x1
+---- a/net/mac80211/rx.c
+-+++ b/net/mac80211/rx.c
+-@@ -2926,11 +2926,6 @@ ieee80211_rx_h_mesh_fwding(struct ieee80
+- 		return RX_CONTINUE;
+- 
+- 	ac = ieee802_1d_to_ac[skb->priority];
+--	q = sdata->vif.hw_queue[ac];
+--	if (ieee80211_queue_stopped(&local->hw, q)) {
+--		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_congestion);
+--		return RX_DROP_MONITOR;
+--	}
+- 	skb_set_queue_mapping(skb, ac);
+- 
+- 	if (!--mesh_hdr->ttl) {
+diff --git a/package/kernel/mac80211/patches/subsys/315-v6.3-wifi-mac80211-fix-receiving-A-MSDU-frames-on-mesh-in.patch b/package/kernel/mac80211/patches/subsys/315-v6.3-wifi-mac80211-fix-receiving-A-MSDU-frames-on-mesh-in.patch
+deleted file mode 100644
+index 6aec9bc85f..0000000000
+--- a/package/kernel/mac80211/patches/subsys/315-v6.3-wifi-mac80211-fix-receiving-A-MSDU-frames-on-mesh-in.patch
++++ /dev/null
+@@ -1,753 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Tue, 6 Dec 2022 11:15:02 +0100
+-Subject: [PATCH] wifi: mac80211: fix receiving A-MSDU frames on mesh
+- interfaces
+-
+-The current mac80211 mesh A-MSDU receive path fails to parse A-MSDU packets
+-on mesh interfaces, because it assumes that the Mesh Control field is always
+-directly after the 802.11 header.
+-802.11-2020 9.3.2.2.2 Figure 9-70 shows that the Mesh Control field is
+-actually part of the A-MSDU subframe header.
+-This makes more sense, since it allows packets for multiple different
+-destinations to be included in the same A-MSDU, as long as RA and TID are
+-still the same.
+-Another issue is the fact that the A-MSDU subframe length field was apparently
+-accidentally defined as little-endian in the standard.
+-
+-In order to fix this, the mesh forwarding path needs happen at a different
+-point in the receive path.
+-
+-ieee80211_data_to_8023_exthdr is changed to ignore the mesh control field
+-and leave it in after the ethernet header. This also affects the source/dest
+-MAC address fields, which now in the case of mesh point to the mesh SA/DA.
+-
+-ieee80211_amsdu_to_8023s is changed to deal with the endian difference and
+-to add the Mesh Control length to the subframe length, since it's not covered
+-by the MSDU length field.
+-
+-With these changes, the mac80211 will get the same packet structure for
+-converted regular data packets and unpacked A-MSDU subframes.
+-
+-The mesh forwarding checks are now only performed after the A-MSDU decap.
+-For locally received packets, the Mesh Control header is stripped away.
+-For forwarded packets, a new 802.11 header gets added.
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/drivers/net/wireless/marvell/mwifiex/11n_rxreorder.c
+-+++ b/drivers/net/wireless/marvell/mwifiex/11n_rxreorder.c
+-@@ -33,7 +33,7 @@ static int mwifiex_11n_dispatch_amsdu_pk
+- 		skb_trim(skb, le16_to_cpu(local_rx_pd->rx_pkt_length));
+- 
+- 		ieee80211_amsdu_to_8023s(skb, &list, priv->curr_addr,
+--					 priv->wdev.iftype, 0, NULL, NULL);
+-+					 priv->wdev.iftype, 0, NULL, NULL, false);
+- 
+- 		while (!skb_queue_empty(&list)) {
+- 			struct rx_packet_hdr *rx_hdr;
+---- a/include/net/cfg80211.h
+-+++ b/include/net/cfg80211.h
+-@@ -6208,11 +6208,36 @@ static inline int ieee80211_data_to_8023
+-  * @extra_headroom: The hardware extra headroom for SKBs in the @list.
+-  * @check_da: DA to check in the inner ethernet header, or NULL
+-  * @check_sa: SA to check in the inner ethernet header, or NULL
+-+ * @mesh_control: A-MSDU subframe header includes the mesh control field
+-  */
+- void ieee80211_amsdu_to_8023s(struct sk_buff *skb, struct sk_buff_head *list,
+- 			      const u8 *addr, enum nl80211_iftype iftype,
+- 			      const unsigned int extra_headroom,
+--			      const u8 *check_da, const u8 *check_sa);
+-+			      const u8 *check_da, const u8 *check_sa,
+-+			      bool mesh_control);
+-+
+-+/**
+-+ * ieee80211_get_8023_tunnel_proto - get RFC1042 or bridge tunnel encap protocol
+-+ *
+-+ * Check for RFC1042 or bridge tunnel header and fetch the encapsulated
+-+ * protocol.
+-+ *
+-+ * @hdr: pointer to the MSDU payload
+-+ * @proto: destination pointer to store the protocol
+-+ * Return: true if encapsulation was found
+-+ */
+-+bool ieee80211_get_8023_tunnel_proto(const void *hdr, __be16 *proto);
+-+
+-+/**
+-+ * ieee80211_strip_8023_mesh_hdr - strip mesh header from converted 802.3 frames
+-+ *
+-+ * Strip the mesh header, which was left in by ieee80211_data_to_8023 as part
+-+ * of the MSDU data. Also move any source/destination addresses from the mesh
+-+ * header to the ethernet header (if present).
+-+ *
+-+ * @skb: The 802.3 frame with embedded mesh header
+-+ */
+-+int ieee80211_strip_8023_mesh_hdr(struct sk_buff *skb);
+- 
+- /**
+-  * cfg80211_classify8021d - determine the 802.1p/1d tag for a data frame
+---- a/net/mac80211/rx.c
+-+++ b/net/mac80211/rx.c
+-@@ -2720,6 +2720,174 @@ ieee80211_deliver_skb(struct ieee80211_r
+- 	}
+- }
+- 
+-+static ieee80211_rx_result
+-+ieee80211_rx_mesh_data(struct ieee80211_sub_if_data *sdata, struct sta_info *sta,
+-+		       struct sk_buff *skb)
+-+{
+-+#ifdef CPTCFG_MAC80211_MESH
+-+	struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh;
+-+	struct ieee80211_local *local = sdata->local;
+-+	uint16_t fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA;
+-+	struct ieee80211_hdr hdr = {
+-+		.frame_control = cpu_to_le16(fc)
+-+	};
+-+	struct ieee80211_hdr *fwd_hdr;
+-+	struct ieee80211s_hdr *mesh_hdr;
+-+	struct ieee80211_tx_info *info;
+-+	struct sk_buff *fwd_skb;
+-+	struct ethhdr *eth;
+-+	bool multicast;
+-+	int tailroom = 0;
+-+	int hdrlen, mesh_hdrlen;
+-+	u8 *qos;
+-+
+-+	if (!ieee80211_vif_is_mesh(&sdata->vif))
+-+		return RX_CONTINUE;
+-+
+-+	if (!pskb_may_pull(skb, sizeof(*eth) + 6))
+-+		return RX_DROP_MONITOR;
+-+
+-+	mesh_hdr = (struct ieee80211s_hdr *)(skb->data + sizeof(*eth));
+-+	mesh_hdrlen = ieee80211_get_mesh_hdrlen(mesh_hdr);
+-+
+-+	if (!pskb_may_pull(skb, sizeof(*eth) + mesh_hdrlen))
+-+		return RX_DROP_MONITOR;
+-+
+-+	eth = (struct ethhdr *)skb->data;
+-+	multicast = is_multicast_ether_addr(eth->h_dest);
+-+
+-+	mesh_hdr = (struct ieee80211s_hdr *)(eth + 1);
+-+	if (!mesh_hdr->ttl)
+-+		return RX_DROP_MONITOR;
+-+
+-+	/* frame is in RMC, don't forward */
+-+	if (is_multicast_ether_addr(eth->h_dest) &&
+-+	    mesh_rmc_check(sdata, eth->h_source, mesh_hdr))
+-+		return RX_DROP_MONITOR;
+-+
+-+	/* Frame has reached destination.  Don't forward */
+-+	if (ether_addr_equal(sdata->vif.addr, eth->h_dest))
+-+		goto rx_accept;
+-+
+-+	if (!ifmsh->mshcfg.dot11MeshForwarding) {
+-+		if (is_multicast_ether_addr(eth->h_dest))
+-+			goto rx_accept;
+-+
+-+		return RX_DROP_MONITOR;
+-+	}
+-+
+-+	/* forward packet */
+-+	if (sdata->crypto_tx_tailroom_needed_cnt)
+-+		tailroom = IEEE80211_ENCRYPT_TAILROOM;
+-+
+-+	if (!--mesh_hdr->ttl) {
+-+		if (multicast)
+-+			goto rx_accept;
+-+
+-+		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_ttl);
+-+		return RX_DROP_MONITOR;
+-+	}
+-+
+-+	if (mesh_hdr->flags & MESH_FLAGS_AE) {
+-+		struct mesh_path *mppath;
+-+		char *proxied_addr;
+-+
+-+		if (multicast)
+-+			proxied_addr = mesh_hdr->eaddr1;
+-+		else if ((mesh_hdr->flags & MESH_FLAGS_AE) == MESH_FLAGS_AE_A5_A6)
+-+			/* has_a4 already checked in ieee80211_rx_mesh_check */
+-+			proxied_addr = mesh_hdr->eaddr2;
+-+		else
+-+			return RX_DROP_MONITOR;
+-+
+-+		rcu_read_lock();
+-+		mppath = mpp_path_lookup(sdata, proxied_addr);
+-+		if (!mppath) {
+-+			mpp_path_add(sdata, proxied_addr, eth->h_source);
+-+		} else {
+-+			spin_lock_bh(&mppath->state_lock);
+-+			if (!ether_addr_equal(mppath->mpp, eth->h_source))
+-+				memcpy(mppath->mpp, eth->h_source, ETH_ALEN);
+-+			mppath->exp_time = jiffies;
+-+			spin_unlock_bh(&mppath->state_lock);
+-+		}
+-+		rcu_read_unlock();
+-+	}
+-+
+-+	skb_set_queue_mapping(skb, ieee802_1d_to_ac[skb->priority]);
+-+
+-+	ieee80211_fill_mesh_addresses(&hdr, &hdr.frame_control,
+-+				      eth->h_dest, eth->h_source);
+-+	hdrlen = ieee80211_hdrlen(hdr.frame_control);
+-+	if (multicast) {
+-+		int extra_head = sizeof(struct ieee80211_hdr) - sizeof(*eth);
+-+
+-+		fwd_skb = skb_copy_expand(skb, local->tx_headroom + extra_head +
+-+					       IEEE80211_ENCRYPT_HEADROOM,
+-+					  tailroom, GFP_ATOMIC);
+-+		if (!fwd_skb)
+-+			goto rx_accept;
+-+	} else {
+-+		fwd_skb = skb;
+-+		skb = NULL;
+-+
+-+		if (skb_cow_head(fwd_skb, hdrlen - sizeof(struct ethhdr)))
+-+			return RX_DROP_UNUSABLE;
+-+	}
+-+
+-+	fwd_hdr = skb_push(fwd_skb, hdrlen - sizeof(struct ethhdr));
+-+	memcpy(fwd_hdr, &hdr, hdrlen - 2);
+-+	qos = ieee80211_get_qos_ctl(fwd_hdr);
+-+	qos[0] = qos[1] = 0;
+-+
+-+	skb_reset_mac_header(fwd_skb);
+-+	hdrlen += mesh_hdrlen;
+-+	if (ieee80211_get_8023_tunnel_proto(fwd_skb->data + hdrlen,
+-+					    &fwd_skb->protocol))
+-+		hdrlen += ETH_ALEN;
+-+	else
+-+		fwd_skb->protocol = htons(fwd_skb->len - hdrlen);
+-+	skb_set_network_header(fwd_skb, hdrlen);
+-+
+-+	info = IEEE80211_SKB_CB(fwd_skb);
+-+	memset(info, 0, sizeof(*info));
+-+	info->control.flags |= IEEE80211_TX_INTCFL_NEED_TXPROCESSING;
+-+	info->control.vif = &sdata->vif;
+-+	info->control.jiffies = jiffies;
+-+	if (multicast) {
+-+		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_mcast);
+-+		memcpy(fwd_hdr->addr2, sdata->vif.addr, ETH_ALEN);
+-+		/* update power mode indication when forwarding */
+-+		ieee80211_mps_set_frame_flags(sdata, NULL, fwd_hdr);
+-+	} else if (!mesh_nexthop_lookup(sdata, fwd_skb)) {
+-+		/* mesh power mode flags updated in mesh_nexthop_lookup */
+-+		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_unicast);
+-+	} else {
+-+		/* unable to resolve next hop */
+-+		if (sta)
+-+			mesh_path_error_tx(sdata, ifmsh->mshcfg.element_ttl,
+-+					   hdr.addr3, 0,
+-+					   WLAN_REASON_MESH_PATH_NOFORWARD,
+-+					   sta->sta.addr);
+-+		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_no_route);
+-+		kfree_skb(fwd_skb);
+-+		goto rx_accept;
+-+	}
+-+
+-+	IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_frames);
+-+	fwd_skb->dev = sdata->dev;
+-+	ieee80211_add_pending_skb(local, fwd_skb);
+-+
+-+rx_accept:
+-+	if (!skb)
+-+		return RX_QUEUED;
+-+
+-+	ieee80211_strip_8023_mesh_hdr(skb);
+-+#endif
+-+
+-+	return RX_CONTINUE;
+-+}
+-+
+- static ieee80211_rx_result debug_noinline
+- __ieee80211_rx_h_amsdu(struct ieee80211_rx_data *rx, u8 data_offset)
+- {
+-@@ -2728,8 +2896,10 @@ __ieee80211_rx_h_amsdu(struct ieee80211_
+- 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
+- 	__le16 fc = hdr->frame_control;
+- 	struct sk_buff_head frame_list;
+-+	static ieee80211_rx_result res;
+- 	struct ethhdr ethhdr;
+- 	const u8 *check_da = ethhdr.h_dest, *check_sa = ethhdr.h_source;
+-+	bool mesh = false;
+- 
+- 	if (unlikely(ieee80211_has_a4(hdr->frame_control))) {
+- 		check_da = NULL;
+-@@ -2746,6 +2916,8 @@ __ieee80211_rx_h_amsdu(struct ieee80211_
+- 			break;
+- 		case NL80211_IFTYPE_MESH_POINT:
+- 			check_sa = NULL;
+-+			check_da = NULL;
+-+			mesh = true;
+- 			break;
+- 		default:
+- 			break;
+-@@ -2763,17 +2935,29 @@ __ieee80211_rx_h_amsdu(struct ieee80211_
+- 	ieee80211_amsdu_to_8023s(skb, &frame_list, dev->dev_addr,
+- 				 rx->sdata->vif.type,
+- 				 rx->local->hw.extra_tx_headroom,
+--				 check_da, check_sa);
+-+				 check_da, check_sa, mesh);
+- 
+- 	while (!skb_queue_empty(&frame_list)) {
+- 		rx->skb = __skb_dequeue(&frame_list);
+- 
+--		if (!ieee80211_frame_allowed(rx, fc)) {
+--			dev_kfree_skb(rx->skb);
+-+		res = ieee80211_rx_mesh_data(rx->sdata, rx->sta, rx->skb);
+-+		switch (res) {
+-+		case RX_QUEUED:
+- 			continue;
+-+		case RX_CONTINUE:
+-+			break;
+-+		default:
+-+			goto free;
+- 		}
+- 
+-+		if (!ieee80211_frame_allowed(rx, fc))
+-+			goto free;
+-+
+- 		ieee80211_deliver_skb(rx);
+-+		continue;
+-+
+-+free:
+-+		dev_kfree_skb(rx->skb);
+- 	}
+- 
+- 	return RX_QUEUED;
+-@@ -2806,6 +2990,8 @@ ieee80211_rx_h_amsdu(struct ieee80211_rx
+- 			if (!rx->sdata->u.mgd.use_4addr)
+- 				return RX_DROP_UNUSABLE;
+- 			break;
+-+		case NL80211_IFTYPE_MESH_POINT:
+-+			break;
+- 		default:
+- 			return RX_DROP_UNUSABLE;
+- 		}
+-@@ -2834,155 +3020,6 @@ ieee80211_rx_h_amsdu(struct ieee80211_rx
+- 	return __ieee80211_rx_h_amsdu(rx, 0);
+- }
+- 
+--#ifdef CPTCFG_MAC80211_MESH
+--static ieee80211_rx_result
+--ieee80211_rx_h_mesh_fwding(struct ieee80211_rx_data *rx)
+--{
+--	struct ieee80211_hdr *fwd_hdr, *hdr;
+--	struct ieee80211_tx_info *info;
+--	struct ieee80211s_hdr *mesh_hdr;
+--	struct sk_buff *skb = rx->skb, *fwd_skb;
+--	struct ieee80211_local *local = rx->local;
+--	struct ieee80211_sub_if_data *sdata = rx->sdata;
+--	struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh;
+--	u16 ac, q, hdrlen;
+--	int tailroom = 0;
+--
+--	hdr = (struct ieee80211_hdr *) skb->data;
+--	hdrlen = ieee80211_hdrlen(hdr->frame_control);
+--
+--	/* make sure fixed part of mesh header is there, also checks skb len */
+--	if (!pskb_may_pull(rx->skb, hdrlen + 6))
+--		return RX_DROP_MONITOR;
+--
+--	mesh_hdr = (struct ieee80211s_hdr *) (skb->data + hdrlen);
+--
+--	/* make sure full mesh header is there, also checks skb len */
+--	if (!pskb_may_pull(rx->skb,
+--			   hdrlen + ieee80211_get_mesh_hdrlen(mesh_hdr)))
+--		return RX_DROP_MONITOR;
+--
+--	/* reload pointers */
+--	hdr = (struct ieee80211_hdr *) skb->data;
+--	mesh_hdr = (struct ieee80211s_hdr *) (skb->data + hdrlen);
+--
+--	if (ieee80211_drop_unencrypted(rx, hdr->frame_control)) {
+--		int offset = hdrlen + ieee80211_get_mesh_hdrlen(mesh_hdr) +
+--			     sizeof(rfc1042_header);
+--		__be16 ethertype;
+--
+--		if (!ether_addr_equal(hdr->addr1, rx->sdata->vif.addr) ||
+--		    skb_copy_bits(rx->skb, offset, &ethertype, 2) != 0 ||
+--		    ethertype != rx->sdata->control_port_protocol)
+--			return RX_DROP_MONITOR;
+--	}
+--
+--	/* frame is in RMC, don't forward */
+--	if (ieee80211_is_data(hdr->frame_control) &&
+--	    is_multicast_ether_addr(hdr->addr1) &&
+--	    mesh_rmc_check(rx->sdata, hdr->addr3, mesh_hdr))
+--		return RX_DROP_MONITOR;
+--
+--	if (!ieee80211_is_data(hdr->frame_control))
+--		return RX_CONTINUE;
+--
+--	if (!mesh_hdr->ttl)
+--		return RX_DROP_MONITOR;
+--
+--	if (mesh_hdr->flags & MESH_FLAGS_AE) {
+--		struct mesh_path *mppath;
+--		char *proxied_addr;
+--		char *mpp_addr;
+--
+--		if (is_multicast_ether_addr(hdr->addr1)) {
+--			mpp_addr = hdr->addr3;
+--			proxied_addr = mesh_hdr->eaddr1;
+--		} else if ((mesh_hdr->flags & MESH_FLAGS_AE) ==
+--			    MESH_FLAGS_AE_A5_A6) {
+--			/* has_a4 already checked in ieee80211_rx_mesh_check */
+--			mpp_addr = hdr->addr4;
+--			proxied_addr = mesh_hdr->eaddr2;
+--		} else {
+--			return RX_DROP_MONITOR;
+--		}
+--
+--		rcu_read_lock();
+--		mppath = mpp_path_lookup(sdata, proxied_addr);
+--		if (!mppath) {
+--			mpp_path_add(sdata, proxied_addr, mpp_addr);
+--		} else {
+--			spin_lock_bh(&mppath->state_lock);
+--			if (!ether_addr_equal(mppath->mpp, mpp_addr))
+--				memcpy(mppath->mpp, mpp_addr, ETH_ALEN);
+--			mppath->exp_time = jiffies;
+--			spin_unlock_bh(&mppath->state_lock);
+--		}
+--		rcu_read_unlock();
+--	}
+--
+--	/* Frame has reached destination.  Don't forward */
+--	if (!is_multicast_ether_addr(hdr->addr1) &&
+--	    ether_addr_equal(sdata->vif.addr, hdr->addr3))
+--		return RX_CONTINUE;
+--
+--	ac = ieee802_1d_to_ac[skb->priority];
+--	skb_set_queue_mapping(skb, ac);
+--
+--	if (!--mesh_hdr->ttl) {
+--		if (!is_multicast_ether_addr(hdr->addr1))
+--			IEEE80211_IFSTA_MESH_CTR_INC(ifmsh,
+--						     dropped_frames_ttl);
+--		goto out;
+--	}
+--
+--	if (!ifmsh->mshcfg.dot11MeshForwarding)
+--		goto out;
+--
+--	if (sdata->crypto_tx_tailroom_needed_cnt)
+--		tailroom = IEEE80211_ENCRYPT_TAILROOM;
+--
+--	fwd_skb = skb_copy_expand(skb, local->tx_headroom +
+--				       IEEE80211_ENCRYPT_HEADROOM,
+--				  tailroom, GFP_ATOMIC);
+--	if (!fwd_skb)
+--		goto out;
+--
+--	fwd_skb->dev = sdata->dev;
+--	fwd_hdr =  (struct ieee80211_hdr *) fwd_skb->data;
+--	fwd_hdr->frame_control &= ~cpu_to_le16(IEEE80211_FCTL_RETRY);
+--	info = IEEE80211_SKB_CB(fwd_skb);
+--	memset(info, 0, sizeof(*info));
+--	info->control.flags |= IEEE80211_TX_INTCFL_NEED_TXPROCESSING;
+--	info->control.vif = &rx->sdata->vif;
+--	info->control.jiffies = jiffies;
+--	if (is_multicast_ether_addr(fwd_hdr->addr1)) {
+--		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_mcast);
+--		memcpy(fwd_hdr->addr2, sdata->vif.addr, ETH_ALEN);
+--		/* update power mode indication when forwarding */
+--		ieee80211_mps_set_frame_flags(sdata, NULL, fwd_hdr);
+--	} else if (!mesh_nexthop_lookup(sdata, fwd_skb)) {
+--		/* mesh power mode flags updated in mesh_nexthop_lookup */
+--		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_unicast);
+--	} else {
+--		/* unable to resolve next hop */
+--		mesh_path_error_tx(sdata, ifmsh->mshcfg.element_ttl,
+--				   fwd_hdr->addr3, 0,
+--				   WLAN_REASON_MESH_PATH_NOFORWARD,
+--				   fwd_hdr->addr2);
+--		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_no_route);
+--		kfree_skb(fwd_skb);
+--		return RX_DROP_MONITOR;
+--	}
+--
+--	IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_frames);
+--	ieee80211_add_pending_skb(local, fwd_skb);
+-- out:
+--	if (is_multicast_ether_addr(hdr->addr1))
+--		return RX_CONTINUE;
+--	return RX_DROP_MONITOR;
+--}
+--#endif
+--
+- static ieee80211_rx_result debug_noinline
+- ieee80211_rx_h_data(struct ieee80211_rx_data *rx)
+- {
+-@@ -2991,6 +3028,7 @@ ieee80211_rx_h_data(struct ieee80211_rx_
+- 	struct net_device *dev = sdata->dev;
+- 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)rx->skb->data;
+- 	__le16 fc = hdr->frame_control;
+-+	static ieee80211_rx_result res;
+- 	bool port_control;
+- 	int err;
+- 
+-@@ -3017,6 +3055,10 @@ ieee80211_rx_h_data(struct ieee80211_rx_
+- 	if (unlikely(err))
+- 		return RX_DROP_UNUSABLE;
+- 
+-+	res = ieee80211_rx_mesh_data(rx->sdata, rx->sta, rx->skb);
+-+	if (res != RX_CONTINUE)
+-+		return res;
+-+
+- 	if (!ieee80211_frame_allowed(rx, fc))
+- 		return RX_DROP_MONITOR;
+- 
+-@@ -3987,10 +4029,6 @@ static void ieee80211_rx_handlers(struct
+- 		CALL_RXH(ieee80211_rx_h_defragment);
+- 		CALL_RXH(ieee80211_rx_h_michael_mic_verify);
+- 		/* must be after MMIC verify so header is counted in MPDU mic */
+--#ifdef CPTCFG_MAC80211_MESH
+--		if (ieee80211_vif_is_mesh(&rx->sdata->vif))
+--			CALL_RXH(ieee80211_rx_h_mesh_fwding);
+--#endif
+- 		CALL_RXH(ieee80211_rx_h_amsdu);
+- 		CALL_RXH(ieee80211_rx_h_data);
+- 
+---- a/net/wireless/util.c
+-+++ b/net/wireless/util.c
+-@@ -542,7 +542,7 @@ unsigned int ieee80211_get_mesh_hdrlen(s
+- }
+- EXPORT_SYMBOL(ieee80211_get_mesh_hdrlen);
+- 
+--static bool ieee80211_get_8023_tunnel_proto(const void *hdr, __be16 *proto)
+-+bool ieee80211_get_8023_tunnel_proto(const void *hdr, __be16 *proto)
+- {
+- 	const __be16 *hdr_proto = hdr + ETH_ALEN;
+- 
+-@@ -556,6 +556,49 @@ static bool ieee80211_get_8023_tunnel_pr
+- 
+- 	return true;
+- }
+-+EXPORT_SYMBOL(ieee80211_get_8023_tunnel_proto);
+-+
+-+int ieee80211_strip_8023_mesh_hdr(struct sk_buff *skb)
+-+{
+-+	const void *mesh_addr;
+-+	struct {
+-+		struct ethhdr eth;
+-+		u8 flags;
+-+	} payload;
+-+	int hdrlen;
+-+	int ret;
+-+
+-+	ret = skb_copy_bits(skb, 0, &payload, sizeof(payload));
+-+	if (ret)
+-+		return ret;
+-+
+-+	hdrlen = sizeof(payload.eth) + __ieee80211_get_mesh_hdrlen(payload.flags);
+-+
+-+	if (likely(pskb_may_pull(skb, hdrlen + 8) &&
+-+		   ieee80211_get_8023_tunnel_proto(skb->data + hdrlen,
+-+						   &payload.eth.h_proto)))
+-+		hdrlen += ETH_ALEN + 2;
+-+	else if (!pskb_may_pull(skb, hdrlen))
+-+		return -EINVAL;
+-+
+-+	mesh_addr = skb->data + sizeof(payload.eth) + ETH_ALEN;
+-+	switch (payload.flags & MESH_FLAGS_AE) {
+-+	case MESH_FLAGS_AE_A4:
+-+		memcpy(&payload.eth.h_source, mesh_addr, ETH_ALEN);
+-+		break;
+-+	case MESH_FLAGS_AE_A5_A6:
+-+		memcpy(&payload.eth.h_dest, mesh_addr, 2 * ETH_ALEN);
+-+		break;
+-+	default:
+-+		break;
+-+	}
+-+
+-+	pskb_pull(skb, hdrlen - sizeof(payload.eth));
+-+	memcpy(skb->data, &payload.eth, sizeof(payload.eth));
+-+
+-+	return 0;
+-+}
+-+EXPORT_SYMBOL(ieee80211_strip_8023_mesh_hdr);
+- 
+- int ieee80211_data_to_8023_exthdr(struct sk_buff *skb, struct ethhdr *ehdr,
+- 				  const u8 *addr, enum nl80211_iftype iftype,
+-@@ -568,7 +611,6 @@ int ieee80211_data_to_8023_exthdr(struct
+- 	} payload;
+- 	struct ethhdr tmp;
+- 	u16 hdrlen;
+--	u8 mesh_flags = 0;
+- 
+- 	if (unlikely(!ieee80211_is_data_present(hdr->frame_control)))
+- 		return -1;
+-@@ -589,12 +631,6 @@ int ieee80211_data_to_8023_exthdr(struct
+- 	memcpy(tmp.h_dest, ieee80211_get_DA(hdr), ETH_ALEN);
+- 	memcpy(tmp.h_source, ieee80211_get_SA(hdr), ETH_ALEN);
+- 
+--	if (iftype == NL80211_IFTYPE_MESH_POINT &&
+--	    skb_copy_bits(skb, hdrlen, &mesh_flags, 1) < 0)
+--		return -1;
+--
+--	mesh_flags &= MESH_FLAGS_AE;
+--
+- 	switch (hdr->frame_control &
+- 		cpu_to_le16(IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) {
+- 	case cpu_to_le16(IEEE80211_FCTL_TODS):
+-@@ -608,17 +644,6 @@ int ieee80211_data_to_8023_exthdr(struct
+- 			     iftype != NL80211_IFTYPE_AP_VLAN &&
+- 			     iftype != NL80211_IFTYPE_STATION))
+- 			return -1;
+--		if (iftype == NL80211_IFTYPE_MESH_POINT) {
+--			if (mesh_flags == MESH_FLAGS_AE_A4)
+--				return -1;
+--			if (mesh_flags == MESH_FLAGS_AE_A5_A6 &&
+--			    skb_copy_bits(skb, hdrlen +
+--					  offsetof(struct ieee80211s_hdr, eaddr1),
+--					  tmp.h_dest, 2 * ETH_ALEN) < 0)
+--				return -1;
+--
+--			hdrlen += __ieee80211_get_mesh_hdrlen(mesh_flags);
+--		}
+- 		break;
+- 	case cpu_to_le16(IEEE80211_FCTL_FROMDS):
+- 		if ((iftype != NL80211_IFTYPE_STATION &&
+-@@ -627,16 +652,6 @@ int ieee80211_data_to_8023_exthdr(struct
+- 		    (is_multicast_ether_addr(tmp.h_dest) &&
+- 		     ether_addr_equal(tmp.h_source, addr)))
+- 			return -1;
+--		if (iftype == NL80211_IFTYPE_MESH_POINT) {
+--			if (mesh_flags == MESH_FLAGS_AE_A5_A6)
+--				return -1;
+--			if (mesh_flags == MESH_FLAGS_AE_A4 &&
+--			    skb_copy_bits(skb, hdrlen +
+--					  offsetof(struct ieee80211s_hdr, eaddr1),
+--					  tmp.h_source, ETH_ALEN) < 0)
+--				return -1;
+--			hdrlen += __ieee80211_get_mesh_hdrlen(mesh_flags);
+--		}
+- 		break;
+- 	case cpu_to_le16(0):
+- 		if (iftype != NL80211_IFTYPE_ADHOC &&
+-@@ -646,7 +661,7 @@ int ieee80211_data_to_8023_exthdr(struct
+- 		break;
+- 	}
+- 
+--	if (likely(!is_amsdu &&
+-+	if (likely(!is_amsdu && iftype != NL80211_IFTYPE_MESH_POINT &&
+- 		   skb_copy_bits(skb, hdrlen, &payload, sizeof(payload)) == 0 &&
+- 		   ieee80211_get_8023_tunnel_proto(&payload, &tmp.h_proto))) {
+- 		/* remove RFC1042 or Bridge-Tunnel encapsulation */
+-@@ -722,7 +737,8 @@ __ieee80211_amsdu_copy_frag(struct sk_bu
+- 
+- static struct sk_buff *
+- __ieee80211_amsdu_copy(struct sk_buff *skb, unsigned int hlen,
+--		       int offset, int len, bool reuse_frag)
+-+		       int offset, int len, bool reuse_frag,
+-+		       int min_len)
+- {
+- 	struct sk_buff *frame;
+- 	int cur_len = len;
+-@@ -736,7 +752,7 @@ __ieee80211_amsdu_copy(struct sk_buff *s
+- 	 * in the stack later.
+- 	 */
+- 	if (reuse_frag)
+--		cur_len = min_t(int, len, 32);
+-+		cur_len = min_t(int, len, min_len);
+- 
+- 	/*
+- 	 * Allocate and reserve two bytes more for payload
+-@@ -746,6 +762,7 @@ __ieee80211_amsdu_copy(struct sk_buff *s
+- 	if (!frame)
+- 		return NULL;
+- 
+-+	frame->priority = skb->priority;
+- 	skb_reserve(frame, hlen + sizeof(struct ethhdr) + 2);
+- 	skb_copy_bits(skb, offset, skb_put(frame, cur_len), cur_len);
+- 
+-@@ -762,23 +779,37 @@ __ieee80211_amsdu_copy(struct sk_buff *s
+- void ieee80211_amsdu_to_8023s(struct sk_buff *skb, struct sk_buff_head *list,
+- 			      const u8 *addr, enum nl80211_iftype iftype,
+- 			      const unsigned int extra_headroom,
+--			      const u8 *check_da, const u8 *check_sa)
+-+			      const u8 *check_da, const u8 *check_sa,
+-+			      bool mesh_control)
+- {
+- 	unsigned int hlen = ALIGN(extra_headroom, 4);
+- 	struct sk_buff *frame = NULL;
+- 	int offset = 0, remaining;
+--	struct ethhdr eth;
+-+	struct {
+-+		struct ethhdr eth;
+-+		uint8_t flags;
+-+	} hdr;
+- 	bool reuse_frag = skb->head_frag && !skb_has_frag_list(skb);
+- 	bool reuse_skb = false;
+- 	bool last = false;
+-+	int copy_len = sizeof(hdr.eth);
+-+
+-+	if (iftype == NL80211_IFTYPE_MESH_POINT)
+-+		copy_len = sizeof(hdr);
+- 
+- 	while (!last) {
+- 		unsigned int subframe_len;
+--		int len;
+-+		int len, mesh_len = 0;
+- 		u8 padding;
+- 
+--		skb_copy_bits(skb, offset, &eth, sizeof(eth));
+--		len = ntohs(eth.h_proto);
+-+		skb_copy_bits(skb, offset, &hdr, copy_len);
+-+		if (iftype == NL80211_IFTYPE_MESH_POINT)
+-+			mesh_len = __ieee80211_get_mesh_hdrlen(hdr.flags);
+-+		if (mesh_control)
+-+			len = le16_to_cpu(*(__le16 *)&hdr.eth.h_proto) + mesh_len;
+-+		else
+-+			len = ntohs(hdr.eth.h_proto);
+-+
+- 		subframe_len = sizeof(struct ethhdr) + len;
+- 		padding = (4 - subframe_len) & 0x3;
+- 
+-@@ -787,16 +818,16 @@ void ieee80211_amsdu_to_8023s(struct sk_
+- 		if (subframe_len > remaining)
+- 			goto purge;
+- 		/* mitigate A-MSDU aggregation injection attacks */
+--		if (ether_addr_equal(eth.h_dest, rfc1042_header))
+-+		if (ether_addr_equal(hdr.eth.h_dest, rfc1042_header))
+- 			goto purge;
+- 
+- 		offset += sizeof(struct ethhdr);
+- 		last = remaining <= subframe_len + padding;
+- 
+- 		/* FIXME: should we really accept multicast DA? */
+--		if ((check_da && !is_multicast_ether_addr(eth.h_dest) &&
+--		     !ether_addr_equal(check_da, eth.h_dest)) ||
+--		    (check_sa && !ether_addr_equal(check_sa, eth.h_source))) {
+-+		if ((check_da && !is_multicast_ether_addr(hdr.eth.h_dest) &&
+-+		     !ether_addr_equal(check_da, hdr.eth.h_dest)) ||
+-+		    (check_sa && !ether_addr_equal(check_sa, hdr.eth.h_source))) {
+- 			offset += len + padding;
+- 			continue;
+- 		}
+-@@ -808,7 +839,7 @@ void ieee80211_amsdu_to_8023s(struct sk_
+- 			reuse_skb = true;
+- 		} else {
+- 			frame = __ieee80211_amsdu_copy(skb, hlen, offset, len,
+--						       reuse_frag);
+-+						       reuse_frag, 32 + mesh_len);
+- 			if (!frame)
+- 				goto purge;
+- 
+-@@ -819,10 +850,11 @@ void ieee80211_amsdu_to_8023s(struct sk_
+- 		frame->dev = skb->dev;
+- 		frame->priority = skb->priority;
+- 
+--		if (likely(ieee80211_get_8023_tunnel_proto(frame->data, &eth.h_proto)))
+-+		if (likely(iftype != NL80211_IFTYPE_MESH_POINT &&
+-+			   ieee80211_get_8023_tunnel_proto(frame->data, &hdr.eth.h_proto)))
+- 			skb_pull(frame, ETH_ALEN + 2);
+- 
+--		memcpy(skb_push(frame, sizeof(eth)), &eth, sizeof(eth));
+-+		memcpy(skb_push(frame, sizeof(hdr.eth)), &hdr.eth, sizeof(hdr.eth));
+- 		__skb_queue_tail(list, frame);
+- 	}
+- 
+diff --git a/package/kernel/mac80211/patches/subsys/316-v6.3-wifi-mac80211-add-a-workaround-for-receiving-non-sta.patch b/package/kernel/mac80211/patches/subsys/316-v6.3-wifi-mac80211-add-a-workaround-for-receiving-non-sta.patch
+deleted file mode 100644
+index 6dc98ae16a..0000000000
+--- a/package/kernel/mac80211/patches/subsys/316-v6.3-wifi-mac80211-add-a-workaround-for-receiving-non-sta.patch
++++ /dev/null
+@@ -1,145 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Fri, 9 Dec 2022 21:15:04 +0100
+-Subject: [PATCH] wifi: mac80211: add a workaround for receiving
+- non-standard mesh A-MSDU
+-
+-At least ath10k and ath11k supported hardware (maybe more) does not implement
+-mesh A-MSDU aggregation in a standard compliant way.
+-802.11-2020 9.3.2.2.2 declares that the Mesh Control field is part of the
+-A-MSDU header. As such, its length must not be included in the subframe
+-length field.
+-Hardware affected by this bug treats the mesh control field as part of the
+-MSDU data and sets the length accordingly.
+-In order to avoid packet loss, keep track of which stations are affected
+-by this and take it into account when converting A-MSDU to 802.3 + mesh control
+-packets.
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/include/net/cfg80211.h
+-+++ b/include/net/cfg80211.h
+-@@ -6194,6 +6194,19 @@ static inline int ieee80211_data_to_8023
+- }
+- 
+- /**
+-+ * ieee80211_is_valid_amsdu - check if subframe lengths of an A-MSDU are valid
+-+ *
+-+ * This is used to detect non-standard A-MSDU frames, e.g. the ones generated
+-+ * by ath10k and ath11k, where the subframe length includes the length of the
+-+ * mesh control field.
+-+ *
+-+ * @skb: The input A-MSDU frame without any headers.
+-+ * @mesh_hdr: use standard compliant mesh A-MSDU subframe header
+-+ * Returns: true if subframe header lengths are valid for the @mesh_hdr mode
+-+ */
+-+bool ieee80211_is_valid_amsdu(struct sk_buff *skb, bool mesh_hdr);
+-+
+-+/**
+-  * ieee80211_amsdu_to_8023s - decode an IEEE 802.11n A-MSDU frame
+-  *
+-  * Decode an IEEE 802.11 A-MSDU and convert it to a list of 802.3 frames.
+---- a/net/mac80211/rx.c
+-+++ b/net/mac80211/rx.c
+-@@ -2899,7 +2899,6 @@ __ieee80211_rx_h_amsdu(struct ieee80211_
+- 	static ieee80211_rx_result res;
+- 	struct ethhdr ethhdr;
+- 	const u8 *check_da = ethhdr.h_dest, *check_sa = ethhdr.h_source;
+--	bool mesh = false;
+- 
+- 	if (unlikely(ieee80211_has_a4(hdr->frame_control))) {
+- 		check_da = NULL;
+-@@ -2917,7 +2916,6 @@ __ieee80211_rx_h_amsdu(struct ieee80211_
+- 		case NL80211_IFTYPE_MESH_POINT:
+- 			check_sa = NULL;
+- 			check_da = NULL;
+--			mesh = true;
+- 			break;
+- 		default:
+- 			break;
+-@@ -2932,10 +2930,21 @@ __ieee80211_rx_h_amsdu(struct ieee80211_
+- 					  data_offset, true))
+- 		return RX_DROP_UNUSABLE;
+- 
+-+	if (rx->sta && rx->sta->amsdu_mesh_control < 0) {
+-+		bool valid_std = ieee80211_is_valid_amsdu(skb, true);
+-+		bool valid_nonstd = ieee80211_is_valid_amsdu(skb, false);
+-+
+-+		if (valid_std && !valid_nonstd)
+-+			rx->sta->amsdu_mesh_control = 1;
+-+		else if (valid_nonstd && !valid_std)
+-+			rx->sta->amsdu_mesh_control = 0;
+-+	}
+-+
+- 	ieee80211_amsdu_to_8023s(skb, &frame_list, dev->dev_addr,
+- 				 rx->sdata->vif.type,
+- 				 rx->local->hw.extra_tx_headroom,
+--				 check_da, check_sa, mesh);
+-+				 check_da, check_sa,
+-+				 rx->sta->amsdu_mesh_control);
+- 
+- 	while (!skb_queue_empty(&frame_list)) {
+- 		rx->skb = __skb_dequeue(&frame_list);
+---- a/net/mac80211/sta_info.c
+-+++ b/net/mac80211/sta_info.c
+-@@ -591,6 +591,9 @@ __sta_info_alloc(struct ieee80211_sub_if
+- 
+- 	sta->sta_state = IEEE80211_STA_NONE;
+- 
+-+	if (sdata->vif.type == NL80211_IFTYPE_MESH_POINT)
+-+		sta->amsdu_mesh_control = -1;
+-+
+- 	/* Mark TID as unreserved */
+- 	sta->reserved_tid = IEEE80211_TID_UNRESERVED;
+- 
+---- a/net/mac80211/sta_info.h
+-+++ b/net/mac80211/sta_info.h
+-@@ -702,6 +702,7 @@ struct sta_info {
+- 	struct codel_params cparams;
+- 
+- 	u8 reserved_tid;
+-+	s8 amsdu_mesh_control;
+- 
+- 	struct cfg80211_chan_def tdls_chandef;
+- 
+---- a/net/wireless/util.c
+-+++ b/net/wireless/util.c
+-@@ -776,6 +776,38 @@ __ieee80211_amsdu_copy(struct sk_buff *s
+- 	return frame;
+- }
+- 
+-+bool ieee80211_is_valid_amsdu(struct sk_buff *skb, bool mesh_hdr)
+-+{
+-+	int offset = 0, remaining, subframe_len, padding;
+-+
+-+	for (offset = 0; offset < skb->len; offset += subframe_len + padding) {
+-+		struct {
+-+		    __be16 len;
+-+		    u8 mesh_flags;
+-+		} hdr;
+-+		u16 len;
+-+
+-+		if (skb_copy_bits(skb, offset + 2 * ETH_ALEN, &hdr, sizeof(hdr)) < 0)
+-+			return false;
+-+
+-+		if (mesh_hdr)
+-+			len = le16_to_cpu(*(__le16 *)&hdr.len) +
+-+			      __ieee80211_get_mesh_hdrlen(hdr.mesh_flags);
+-+		else
+-+			len = ntohs(hdr.len);
+-+
+-+		subframe_len = sizeof(struct ethhdr) + len;
+-+		padding = (4 - subframe_len) & 0x3;
+-+		remaining = skb->len - offset;
+-+
+-+		if (subframe_len > remaining)
+-+			return false;
+-+	}
+-+
+-+	return true;
+-+}
+-+EXPORT_SYMBOL(ieee80211_is_valid_amsdu);
+-+
+- void ieee80211_amsdu_to_8023s(struct sk_buff *skb, struct sk_buff_head *list,
+- 			      const u8 *addr, enum nl80211_iftype iftype,
+- 			      const unsigned int extra_headroom,
+diff --git a/package/kernel/mac80211/patches/subsys/318-wifi-mac80211-fix-race-in-mesh-sequence-number-assig.patch b/package/kernel/mac80211/patches/subsys/318-wifi-mac80211-fix-race-in-mesh-sequence-number-assig.patch
+deleted file mode 100644
+index 7d01ffdfff..0000000000
+--- a/package/kernel/mac80211/patches/subsys/318-wifi-mac80211-fix-race-in-mesh-sequence-number-assig.patch
++++ /dev/null
+@@ -1,37 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Wed, 15 Feb 2023 15:21:37 +0100
+-Subject: [PATCH] wifi: mac80211: fix race in mesh sequence number
+- assignment
+-
+-Since the sequence number is shared across different tx queues, it needs
+-to be atomic in order to avoid accidental duplicate assignment
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/net/mac80211/ieee80211_i.h
+-+++ b/net/mac80211/ieee80211_i.h
+-@@ -696,7 +696,7 @@ struct ieee80211_if_mesh {
+- 	struct mesh_stats mshstats;
+- 	struct mesh_config mshcfg;
+- 	atomic_t estab_plinks;
+--	u32 mesh_seqnum;
+-+	atomic_t mesh_seqnum;
+- 	bool accepting_plinks;
+- 	int num_gates;
+- 	struct beacon_data __rcu *beacon;
+---- a/net/mac80211/mesh.c
+-+++ b/net/mac80211/mesh.c
+-@@ -752,10 +752,8 @@ unsigned int ieee80211_new_mesh_header(s
+- 
+- 	meshhdr->ttl = sdata->u.mesh.mshcfg.dot11MeshTTL;
+- 
+--	/* FIXME: racy -- TX on multiple queues can be concurrent */
+--	put_unaligned(cpu_to_le32(sdata->u.mesh.mesh_seqnum), &meshhdr->seqnum);
+--	sdata->u.mesh.mesh_seqnum++;
+--
+-+	put_unaligned_le32(atomic_inc_return(&sdata->u.mesh.mesh_seqnum),
+-+			   &meshhdr->seqnum);
+- 	if (addr4or5 && !addr6) {
+- 		meshhdr->flags |= MESH_FLAGS_AE_A4;
+- 		memcpy(meshhdr->eaddr1, addr4or5, ETH_ALEN);
+diff --git a/package/kernel/mac80211/patches/subsys/319-wifi-mac80211-mesh-fast-xmit-support.patch b/package/kernel/mac80211/patches/subsys/319-wifi-mac80211-mesh-fast-xmit-support.patch
+deleted file mode 100644
+index 968d2885f2..0000000000
+--- a/package/kernel/mac80211/patches/subsys/319-wifi-mac80211-mesh-fast-xmit-support.patch
++++ /dev/null
+@@ -1,850 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Sun, 26 Feb 2023 13:53:08 +0100
+-Subject: [PATCH] wifi: mac80211: mesh fast xmit support
+-
+-Previously, fast xmit only worked on interface types where initially a
+-sta lookup is performed, and a cached header can be attached to the sta,
+-requiring only some fields to be updated at runtime.
+-
+-This technique is not directly applicable for a mesh device type due
+-to the dynamic nature of the topology and protocol. There are more
+-addresses that need to be filled, and there is an extra header with a
+-dynamic length based on the addressing mode.
+-
+-Change the code to cache entries contain a copy of the mesh subframe header +
+-bridge tunnel header, as well as an embedded struct ieee80211_fast_tx, which
+-contains the information for building the 802.11 header.
+-
+-Add a mesh specific early fast xmit call, which looks up a cached entry and
+-adds only the mesh subframe header, before passing it over to the generic
+-fast xmit code.
+-
+-To ensure the changes in network are reflected in these cached headers,
+-flush affected cached entries on path changes, as well as other conditions
+-that currently trigger a fast xmit check in other modes (key changes etc.)
+-
+-This code is loosely based on a previous implementation by:
+-Sriram R <quic_srirrama@quicinc.com>
+-
+-Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/net/mac80211/ieee80211_i.h
+-+++ b/net/mac80211/ieee80211_i.h
+-@@ -37,6 +37,7 @@
+- extern const struct cfg80211_ops mac80211_config_ops;
+- 
+- struct ieee80211_local;
+-+struct ieee80211_mesh_fast_tx;
+- 
+- /* Maximum number of broadcast/multicast frames to buffer when some of the
+-  * associated stations are using power saving. */
+-@@ -656,6 +657,19 @@ struct mesh_table {
+- 	atomic_t entries;		/* Up to MAX_MESH_NEIGHBOURS */
+- };
+- 
+-+/**
+-+ * struct mesh_tx_cache - mesh fast xmit header cache
+-+ *
+-+ * @rht: hash table containing struct ieee80211_mesh_fast_tx, using skb DA as key
+-+ * @walk_head: linked list containing all ieee80211_mesh_fast_tx objects
+-+ * @walk_lock: lock protecting walk_head and rht
+-+ */
+-+struct mesh_tx_cache {
+-+	struct rhashtable rht;
+-+	struct hlist_head walk_head;
+-+	spinlock_t walk_lock;
+-+};
+-+
+- struct ieee80211_if_mesh {
+- 	struct timer_list housekeeping_timer;
+- 	struct timer_list mesh_path_timer;
+-@@ -734,6 +748,7 @@ struct ieee80211_if_mesh {
+- 	struct mesh_table mpp_paths; /* Store paths for MPP&MAP */
+- 	int mesh_paths_generation;
+- 	int mpp_paths_generation;
+-+	struct mesh_tx_cache tx_cache;
+- };
+- 
+- #ifdef CPTCFG_MAC80211_MESH
+-@@ -2002,6 +2017,11 @@ int ieee80211_tx_control_port(struct wip
+- 			      int link_id, u64 *cookie);
+- int ieee80211_probe_mesh_link(struct wiphy *wiphy, struct net_device *dev,
+- 			      const u8 *buf, size_t len);
+-+void __ieee80211_xmit_fast(struct ieee80211_sub_if_data *sdata,
+-+			   struct sta_info *sta,
+-+			   struct ieee80211_fast_tx *fast_tx,
+-+			   struct sk_buff *skb, bool ampdu,
+-+			   const u8 *da, const u8 *sa);
+- 
+- /* HT */
+- void ieee80211_apply_htcap_overrides(struct ieee80211_sub_if_data *sdata,
+---- a/net/mac80211/mesh.c
+-+++ b/net/mac80211/mesh.c
+-@@ -10,6 +10,7 @@
+- #include <asm/unaligned.h>
+- #include "ieee80211_i.h"
+- #include "mesh.h"
+-+#include "wme.h"
+- #include "driver-ops.h"
+- 
+- static int mesh_allocated;
+-@@ -698,6 +699,95 @@ ieee80211_mesh_update_bss_params(struct
+- 			__le32_to_cpu(he_oper->he_oper_params);
+- }
+- 
+-+bool ieee80211_mesh_xmit_fast(struct ieee80211_sub_if_data *sdata,
+-+			      struct sk_buff *skb, u32 ctrl_flags)
+-+{
+-+	struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh;
+-+	struct ieee80211_mesh_fast_tx *entry;
+-+	struct ieee80211s_hdr *meshhdr;
+-+	u8 sa[ETH_ALEN] __aligned(2);
+-+	struct tid_ampdu_tx *tid_tx;
+-+	struct sta_info *sta;
+-+	bool copy_sa = false;
+-+	u16 ethertype;
+-+	u8 tid;
+-+
+-+	if (ctrl_flags & IEEE80211_TX_CTRL_SKIP_MPATH_LOOKUP)
+-+		return false;
+-+
+-+	if (ifmsh->mshcfg.dot11MeshNolearn)
+-+		return false;
+-+
+-+	/* Add support for these cases later */
+-+	if (ifmsh->ps_peers_light_sleep || ifmsh->ps_peers_deep_sleep)
+-+		return false;
+-+
+-+	if (is_multicast_ether_addr(skb->data))
+-+		return false;
+-+
+-+	ethertype = (skb->data[12] << 8) | skb->data[13];
+-+	if (ethertype < ETH_P_802_3_MIN)
+-+		return false;
+-+
+-+	if (skb->sk && skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS)
+-+		return false;
+-+
+-+	if (skb->ip_summed == CHECKSUM_PARTIAL) {
+-+		skb_set_transport_header(skb, skb_checksum_start_offset(skb));
+-+		if (skb_checksum_help(skb))
+-+			return false;
+-+	}
+-+
+-+	entry = mesh_fast_tx_get(sdata, skb->data);
+-+	if (!entry)
+-+		return false;
+-+
+-+	if (skb_headroom(skb) < entry->hdrlen + entry->fast_tx.hdr_len)
+-+		return false;
+-+
+-+	sta = rcu_dereference(entry->mpath->next_hop);
+-+	if (!sta)
+-+		return false;
+-+
+-+	tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
+-+	tid_tx = rcu_dereference(sta->ampdu_mlme.tid_tx[tid]);
+-+	if (tid_tx) {
+-+		if (!test_bit(HT_AGG_STATE_OPERATIONAL, &tid_tx->state))
+-+			return false;
+-+		if (tid_tx->timeout)
+-+			tid_tx->last_tx = jiffies;
+-+	}
+-+
+-+	skb = skb_share_check(skb, GFP_ATOMIC);
+-+	if (!skb)
+-+		return true;
+-+
+-+	skb_set_queue_mapping(skb, ieee80211_select_queue(sdata, sta, skb));
+-+
+-+	meshhdr = (struct ieee80211s_hdr *)entry->hdr;
+-+	if ((meshhdr->flags & MESH_FLAGS_AE) == MESH_FLAGS_AE_A5_A6) {
+-+		/* preserve SA from eth header for 6-addr frames */
+-+		ether_addr_copy(sa, skb->data + ETH_ALEN);
+-+		copy_sa = true;
+-+	}
+-+
+-+	memcpy(skb_push(skb, entry->hdrlen - 2 * ETH_ALEN), entry->hdr,
+-+	       entry->hdrlen);
+-+
+-+	meshhdr = (struct ieee80211s_hdr *)skb->data;
+-+	put_unaligned_le32(atomic_inc_return(&sdata->u.mesh.mesh_seqnum),
+-+			   &meshhdr->seqnum);
+-+	meshhdr->ttl = sdata->u.mesh.mshcfg.dot11MeshTTL;
+-+	if (copy_sa)
+-+	    ether_addr_copy(meshhdr->eaddr2, sa);
+-+
+-+	skb_push(skb, 2 * ETH_ALEN);
+-+	__ieee80211_xmit_fast(sdata, sta, &entry->fast_tx, skb, tid_tx,
+-+			      entry->mpath->dst, sdata->vif.addr);
+-+
+-+	return true;
+-+}
+-+
+- /**
+-  * ieee80211_fill_mesh_addresses - fill addresses of a locally originated mesh frame
+-  * @hdr:	802.11 frame header
+-@@ -780,6 +870,8 @@ static void ieee80211_mesh_housekeeping(
+- 	changed = mesh_accept_plinks_update(sdata);
+- 	ieee80211_mbss_info_change_notify(sdata, changed);
+- 
+-+	mesh_fast_tx_gc(sdata);
+-+
+- 	mod_timer(&ifmsh->housekeeping_timer,
+- 		  round_jiffies(jiffies +
+- 				IEEE80211_MESH_HOUSEKEEPING_INTERVAL));
+---- a/net/mac80211/mesh.h
+-+++ b/net/mac80211/mesh.h
+-@@ -122,11 +122,41 @@ struct mesh_path {
+- 	u8 rann_snd_addr[ETH_ALEN];
+- 	u32 rann_metric;
+- 	unsigned long last_preq_to_root;
+-+	unsigned long fast_tx_check;
+- 	bool is_root;
+- 	bool is_gate;
+- 	u32 path_change_count;
+- };
+- 
+-+#define MESH_FAST_TX_CACHE_MAX_SIZE		512
+-+#define MESH_FAST_TX_CACHE_THRESHOLD_SIZE	384
+-+#define MESH_FAST_TX_CACHE_TIMEOUT		8000 /* msecs */
+-+
+-+/**
+-+ * struct ieee80211_mesh_fast_tx - cached mesh fast tx entry
+-+ * @rhash: rhashtable pointer
+-+ * @addr_key: The Ethernet DA which is the key for this entry
+-+ * @fast_tx: base fast_tx data
+-+ * @hdr: cached mesh and rfc1042 headers
+-+ * @hdrlen: length of mesh + rfc1042
+-+ * @walk_list: list containing all the fast tx entries
+-+ * @mpath: mesh path corresponding to the Mesh DA
+-+ * @mppath: MPP entry corresponding to this DA
+-+ * @timestamp: Last used time of this entry
+-+ */
+-+struct ieee80211_mesh_fast_tx {
+-+	struct rhash_head rhash;
+-+	u8 addr_key[ETH_ALEN] __aligned(2);
+-+
+-+	struct ieee80211_fast_tx fast_tx;
+-+	u8 hdr[sizeof(struct ieee80211s_hdr) + sizeof(rfc1042_header)];
+-+	u16 hdrlen;
+-+
+-+	struct mesh_path *mpath, *mppath;
+-+	struct hlist_node walk_list;
+-+	unsigned long timestamp;
+-+};
+-+
+- /* Recent multicast cache */
+- /* RMC_BUCKETS must be a power of 2, maximum 256 */
+- #define RMC_BUCKETS		256
+-@@ -298,6 +328,20 @@ void mesh_path_discard_frame(struct ieee
+- void mesh_path_tx_root_frame(struct ieee80211_sub_if_data *sdata);
+- 
+- bool mesh_action_is_path_sel(struct ieee80211_mgmt *mgmt);
+-+struct ieee80211_mesh_fast_tx *
+-+mesh_fast_tx_get(struct ieee80211_sub_if_data *sdata, const u8 *addr);
+-+bool ieee80211_mesh_xmit_fast(struct ieee80211_sub_if_data *sdata,
+-+			      struct sk_buff *skb, u32 ctrl_flags);
+-+void mesh_fast_tx_cache(struct ieee80211_sub_if_data *sdata,
+-+			struct sk_buff *skb, struct mesh_path *mpath);
+-+void mesh_fast_tx_gc(struct ieee80211_sub_if_data *sdata);
+-+void mesh_fast_tx_flush_addr(struct ieee80211_sub_if_data *sdata,
+-+			     const u8 *addr);
+-+void mesh_fast_tx_flush_mpath(struct mesh_path *mpath);
+-+void mesh_fast_tx_flush_sta(struct ieee80211_sub_if_data *sdata,
+-+			    struct sta_info *sta);
+-+void mesh_path_refresh(struct ieee80211_sub_if_data *sdata,
+-+		       struct mesh_path *mpath, const u8 *addr);
+- 
+- #ifdef CPTCFG_MAC80211_MESH
+- static inline
+---- a/net/mac80211/mesh_hwmp.c
+-+++ b/net/mac80211/mesh_hwmp.c
+-@@ -394,6 +394,7 @@ static u32 hwmp_route_info_get(struct ie
+- 	u32 orig_sn, orig_metric;
+- 	unsigned long orig_lifetime, exp_time;
+- 	u32 last_hop_metric, new_metric;
+-+	bool flush_mpath = false;
+- 	bool process = true;
+- 	u8 hopcount;
+- 
+-@@ -491,8 +492,10 @@ static u32 hwmp_route_info_get(struct ie
+- 		}
+- 
+- 		if (fresh_info) {
+--			if (rcu_access_pointer(mpath->next_hop) != sta)
+-+			if (rcu_access_pointer(mpath->next_hop) != sta) {
+- 				mpath->path_change_count++;
+-+				flush_mpath = true;
+-+			}
+- 			mesh_path_assign_nexthop(mpath, sta);
+- 			mpath->flags |= MESH_PATH_SN_VALID;
+- 			mpath->metric = new_metric;
+-@@ -502,6 +505,8 @@ static u32 hwmp_route_info_get(struct ie
+- 			mpath->hop_count = hopcount;
+- 			mesh_path_activate(mpath);
+- 			spin_unlock_bh(&mpath->state_lock);
+-+			if (flush_mpath)
+-+				mesh_fast_tx_flush_mpath(mpath);
+- 			ewma_mesh_fail_avg_init(&sta->mesh->fail_avg);
+- 			/* init it at a low value - 0 start is tricky */
+- 			ewma_mesh_fail_avg_add(&sta->mesh->fail_avg, 1);
+-@@ -539,8 +544,10 @@ static u32 hwmp_route_info_get(struct ie
+- 		}
+- 
+- 		if (fresh_info) {
+--			if (rcu_access_pointer(mpath->next_hop) != sta)
+-+			if (rcu_access_pointer(mpath->next_hop) != sta) {
+- 				mpath->path_change_count++;
+-+				flush_mpath = true;
+-+			}
+- 			mesh_path_assign_nexthop(mpath, sta);
+- 			mpath->metric = last_hop_metric;
+- 			mpath->exp_time = time_after(mpath->exp_time, exp_time)
+-@@ -548,6 +555,8 @@ static u32 hwmp_route_info_get(struct ie
+- 			mpath->hop_count = 1;
+- 			mesh_path_activate(mpath);
+- 			spin_unlock_bh(&mpath->state_lock);
+-+			if (flush_mpath)
+-+				mesh_fast_tx_flush_mpath(mpath);
+- 			ewma_mesh_fail_avg_init(&sta->mesh->fail_avg);
+- 			/* init it at a low value - 0 start is tricky */
+- 			ewma_mesh_fail_avg_add(&sta->mesh->fail_avg, 1);
+-@@ -1215,6 +1224,20 @@ static int mesh_nexthop_lookup_nolearn(s
+- 	return 0;
+- }
+- 
+-+void mesh_path_refresh(struct ieee80211_sub_if_data *sdata,
+-+		       struct mesh_path *mpath, const u8 *addr)
+-+{
+-+	if (mpath->flags & (MESH_PATH_REQ_QUEUED | MESH_PATH_FIXED |
+-+			    MESH_PATH_RESOLVING))
+-+		return;
+-+
+-+	if (time_after(jiffies,
+-+		       mpath->exp_time -
+-+		       msecs_to_jiffies(sdata->u.mesh.mshcfg.path_refresh_time)) &&
+-+	    (!addr || ether_addr_equal(sdata->vif.addr, addr)))
+-+		mesh_queue_preq(mpath, PREQ_Q_F_START | PREQ_Q_F_REFRESH);
+-+}
+-+
+- /**
+-  * mesh_nexthop_lookup - put the appropriate next hop on a mesh frame. Calling
+-  * this function is considered "using" the associated mpath, so preempt a path
+-@@ -1242,19 +1265,15 @@ int mesh_nexthop_lookup(struct ieee80211
+- 	if (!mpath || !(mpath->flags & MESH_PATH_ACTIVE))
+- 		return -ENOENT;
+- 
+--	if (time_after(jiffies,
+--		       mpath->exp_time -
+--		       msecs_to_jiffies(sdata->u.mesh.mshcfg.path_refresh_time)) &&
+--	    ether_addr_equal(sdata->vif.addr, hdr->addr4) &&
+--	    !(mpath->flags & MESH_PATH_RESOLVING) &&
+--	    !(mpath->flags & MESH_PATH_FIXED))
+--		mesh_queue_preq(mpath, PREQ_Q_F_START | PREQ_Q_F_REFRESH);
+-+	mesh_path_refresh(sdata, mpath, hdr->addr4);
+- 
+- 	next_hop = rcu_dereference(mpath->next_hop);
+- 	if (next_hop) {
+- 		memcpy(hdr->addr1, next_hop->sta.addr, ETH_ALEN);
+- 		memcpy(hdr->addr2, sdata->vif.addr, ETH_ALEN);
+- 		ieee80211_mps_set_frame_flags(sdata, next_hop, hdr);
+-+		if (ieee80211_hw_check(&sdata->local->hw, SUPPORT_FAST_XMIT))
+-+			mesh_fast_tx_cache(sdata, skb, mpath);
+- 		return 0;
+- 	}
+- 
+---- a/net/mac80211/mesh_pathtbl.c
+-+++ b/net/mac80211/mesh_pathtbl.c
+-@@ -14,6 +14,7 @@
+- #include "wme.h"
+- #include "ieee80211_i.h"
+- #include "mesh.h"
+-+#include <linux/rhashtable.h>
+- 
+- static void mesh_path_free_rcu(struct mesh_table *tbl, struct mesh_path *mpath);
+- 
+-@@ -32,6 +33,41 @@ static const struct rhashtable_params me
+- 	.hashfn = mesh_table_hash,
+- };
+- 
+-+static const struct rhashtable_params fast_tx_rht_params = {
+-+	.nelem_hint = 10,
+-+	.automatic_shrinking = true,
+-+	.key_len = ETH_ALEN,
+-+	.key_offset = offsetof(struct ieee80211_mesh_fast_tx, addr_key),
+-+	.head_offset = offsetof(struct ieee80211_mesh_fast_tx, rhash),
+-+	.hashfn = mesh_table_hash,
+-+};
+-+
+-+static void __mesh_fast_tx_entry_free(void *ptr, void *tblptr)
+-+{
+-+	struct ieee80211_mesh_fast_tx *entry = ptr;
+-+
+-+	kfree_rcu(entry, fast_tx.rcu_head);
+-+}
+-+
+-+static void mesh_fast_tx_deinit(struct ieee80211_sub_if_data *sdata)
+-+{
+-+	struct mesh_tx_cache *cache;
+-+
+-+	cache = &sdata->u.mesh.tx_cache;
+-+	rhashtable_free_and_destroy(&cache->rht,
+-+				    __mesh_fast_tx_entry_free, NULL);
+-+}
+-+
+-+static void mesh_fast_tx_init(struct ieee80211_sub_if_data *sdata)
+-+{
+-+	struct mesh_tx_cache *cache;
+-+
+-+	cache = &sdata->u.mesh.tx_cache;
+-+	rhashtable_init(&cache->rht, &fast_tx_rht_params);
+-+	INIT_HLIST_HEAD(&cache->walk_head);
+-+	spin_lock_init(&cache->walk_lock);
+-+}
+-+
+- static inline bool mpath_expired(struct mesh_path *mpath)
+- {
+- 	return (mpath->flags & MESH_PATH_ACTIVE) &&
+-@@ -381,6 +417,243 @@ struct mesh_path *mesh_path_new(struct i
+- 	return new_mpath;
+- }
+- 
+-+static void mesh_fast_tx_entry_free(struct mesh_tx_cache *cache,
+-+				    struct ieee80211_mesh_fast_tx *entry)
+-+{
+-+	hlist_del_rcu(&entry->walk_list);
+-+	rhashtable_remove_fast(&cache->rht, &entry->rhash, fast_tx_rht_params);
+-+	kfree_rcu(entry, fast_tx.rcu_head);
+-+}
+-+
+-+struct ieee80211_mesh_fast_tx *
+-+mesh_fast_tx_get(struct ieee80211_sub_if_data *sdata, const u8 *addr)
+-+{
+-+	struct ieee80211_mesh_fast_tx *entry;
+-+	struct mesh_tx_cache *cache;
+-+
+-+	cache = &sdata->u.mesh.tx_cache;
+-+	entry = rhashtable_lookup(&cache->rht, addr, fast_tx_rht_params);
+-+	if (!entry)
+-+		return NULL;
+-+
+-+	if (!(entry->mpath->flags & MESH_PATH_ACTIVE) ||
+-+	    mpath_expired(entry->mpath)) {
+-+		spin_lock_bh(&cache->walk_lock);
+-+		entry = rhashtable_lookup(&cache->rht, addr, fast_tx_rht_params);
+-+		if (entry)
+-+		    mesh_fast_tx_entry_free(cache, entry);
+-+		spin_unlock_bh(&cache->walk_lock);
+-+		return NULL;
+-+	}
+-+
+-+	mesh_path_refresh(sdata, entry->mpath, NULL);
+-+	if (entry->mppath)
+-+		entry->mppath->exp_time = jiffies;
+-+	entry->timestamp = jiffies;
+-+
+-+	return entry;
+-+}
+-+
+-+void mesh_fast_tx_cache(struct ieee80211_sub_if_data *sdata,
+-+			struct sk_buff *skb, struct mesh_path *mpath)
+-+{
+-+	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
+-+	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+-+	struct ieee80211_mesh_fast_tx *entry, *prev;
+-+	struct ieee80211_mesh_fast_tx build = {};
+-+	struct ieee80211s_hdr *meshhdr;
+-+	struct mesh_tx_cache *cache;
+-+	struct ieee80211_key *key;
+-+	struct mesh_path *mppath;
+-+	struct sta_info *sta;
+-+	u8 *qc;
+-+
+-+	if (sdata->noack_map ||
+-+	    !ieee80211_is_data_qos(hdr->frame_control))
+-+		return;
+-+
+-+	build.fast_tx.hdr_len = ieee80211_hdrlen(hdr->frame_control);
+-+	meshhdr = (struct ieee80211s_hdr *)(skb->data + build.fast_tx.hdr_len);
+-+	build.hdrlen = ieee80211_get_mesh_hdrlen(meshhdr);
+-+
+-+	cache = &sdata->u.mesh.tx_cache;
+-+	if (atomic_read(&cache->rht.nelems) >= MESH_FAST_TX_CACHE_MAX_SIZE)
+-+		return;
+-+
+-+	sta = rcu_dereference(mpath->next_hop);
+-+	if (!sta)
+-+		return;
+-+
+-+	if ((meshhdr->flags & MESH_FLAGS_AE) == MESH_FLAGS_AE_A5_A6) {
+-+		/* This is required to keep the mppath alive */
+-+		mppath = mpp_path_lookup(sdata, meshhdr->eaddr1);
+-+		if (!mppath)
+-+			return;
+-+		build.mppath = mppath;
+-+	} else if (ieee80211_has_a4(hdr->frame_control)) {
+-+		mppath = mpath;
+-+	} else {
+-+		return;
+-+	}
+-+
+-+	/* rate limit, in case fast xmit can't be enabled */
+-+	if (mppath->fast_tx_check == jiffies)
+-+		return;
+-+
+-+	mppath->fast_tx_check = jiffies;
+-+
+-+	/*
+-+	 * Same use of the sta lock as in ieee80211_check_fast_xmit, in order
+-+	 * to protect against concurrent sta key updates.
+-+	 */
+-+	spin_lock_bh(&sta->lock);
+-+	key = rcu_access_pointer(sta->ptk[sta->ptk_idx]);
+-+	if (!key)
+-+		key = rcu_access_pointer(sdata->default_unicast_key);
+-+	build.fast_tx.key = key;
+-+
+-+	if (key) {
+-+		bool gen_iv, iv_spc;
+-+
+-+		gen_iv = key->conf.flags & IEEE80211_KEY_FLAG_GENERATE_IV;
+-+		iv_spc = key->conf.flags & IEEE80211_KEY_FLAG_PUT_IV_SPACE;
+-+
+-+		if (!(key->flags & KEY_FLAG_UPLOADED_TO_HARDWARE) ||
+-+		    (key->flags & KEY_FLAG_TAINTED))
+-+			goto unlock_sta;
+-+
+-+		switch (key->conf.cipher) {
+-+		case WLAN_CIPHER_SUITE_CCMP:
+-+		case WLAN_CIPHER_SUITE_CCMP_256:
+-+			if (gen_iv)
+-+				build.fast_tx.pn_offs = build.fast_tx.hdr_len;
+-+			if (gen_iv || iv_spc)
+-+				build.fast_tx.hdr_len += IEEE80211_CCMP_HDR_LEN;
+-+			break;
+-+		case WLAN_CIPHER_SUITE_GCMP:
+-+		case WLAN_CIPHER_SUITE_GCMP_256:
+-+			if (gen_iv)
+-+				build.fast_tx.pn_offs = build.fast_tx.hdr_len;
+-+			if (gen_iv || iv_spc)
+-+				build.fast_tx.hdr_len += IEEE80211_GCMP_HDR_LEN;
+-+			break;
+-+		default:
+-+			goto unlock_sta;
+-+		}
+-+	}
+-+
+-+	memcpy(build.addr_key, mppath->dst, ETH_ALEN);
+-+	build.timestamp = jiffies;
+-+	build.fast_tx.band = info->band;
+-+	build.fast_tx.da_offs = offsetof(struct ieee80211_hdr, addr3);
+-+	build.fast_tx.sa_offs = offsetof(struct ieee80211_hdr, addr4);
+-+	build.mpath = mpath;
+-+	memcpy(build.hdr, meshhdr, build.hdrlen);
+-+	memcpy(build.hdr + build.hdrlen, rfc1042_header, sizeof(rfc1042_header));
+-+	build.hdrlen += sizeof(rfc1042_header);
+-+	memcpy(build.fast_tx.hdr, hdr, build.fast_tx.hdr_len);
+-+
+-+	hdr = (struct ieee80211_hdr *)build.fast_tx.hdr;
+-+	if (build.fast_tx.key)
+-+		hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PROTECTED);
+-+
+-+	qc = ieee80211_get_qos_ctl(hdr);
+-+	qc[1] |= IEEE80211_QOS_CTL_MESH_CONTROL_PRESENT >> 8;
+-+
+-+	entry = kmemdup(&build, sizeof(build), GFP_ATOMIC);
+-+	if (!entry)
+-+		goto unlock_sta;
+-+
+-+	spin_lock(&cache->walk_lock);
+-+	prev = rhashtable_lookup_get_insert_fast(&cache->rht,
+-+						 &entry->rhash,
+-+						 fast_tx_rht_params);
+-+	if (unlikely(IS_ERR(prev))) {
+-+		kfree(entry);
+-+		goto unlock_cache;
+-+	}
+-+
+-+	/*
+-+	 * replace any previous entry in the hash table, in case we're
+-+	 * replacing it with a different type (e.g. mpath -> mpp)
+-+	 */
+-+	if (unlikely(prev)) {
+-+		rhashtable_replace_fast(&cache->rht, &prev->rhash,
+-+					&entry->rhash, fast_tx_rht_params);
+-+		hlist_del_rcu(&prev->walk_list);
+-+		kfree_rcu(prev, fast_tx.rcu_head);
+-+	}
+-+
+-+	hlist_add_head(&entry->walk_list, &cache->walk_head);
+-+
+-+unlock_cache:
+-+	spin_unlock(&cache->walk_lock);
+-+unlock_sta:
+-+	spin_unlock_bh(&sta->lock);
+-+}
+-+
+-+void mesh_fast_tx_gc(struct ieee80211_sub_if_data *sdata)
+-+{
+-+	unsigned long timeout = msecs_to_jiffies(MESH_FAST_TX_CACHE_TIMEOUT);
+-+	struct mesh_tx_cache *cache;
+-+	struct ieee80211_mesh_fast_tx *entry;
+-+	struct hlist_node *n;
+-+
+-+	cache = &sdata->u.mesh.tx_cache;
+-+	if (atomic_read(&cache->rht.nelems) < MESH_FAST_TX_CACHE_THRESHOLD_SIZE)
+-+		return;
+-+
+-+	spin_lock_bh(&cache->walk_lock);
+-+	hlist_for_each_entry_safe(entry, n, &cache->walk_head, walk_list)
+-+		if (!time_is_after_jiffies(entry->timestamp + timeout))
+-+			mesh_fast_tx_entry_free(cache, entry);
+-+	spin_unlock_bh(&cache->walk_lock);
+-+}
+-+
+-+void mesh_fast_tx_flush_mpath(struct mesh_path *mpath)
+-+{
+-+	struct ieee80211_sub_if_data *sdata = mpath->sdata;
+-+	struct mesh_tx_cache *cache = &sdata->u.mesh.tx_cache;
+-+	struct ieee80211_mesh_fast_tx *entry;
+-+	struct hlist_node *n;
+-+
+-+	cache = &sdata->u.mesh.tx_cache;
+-+	spin_lock_bh(&cache->walk_lock);
+-+	hlist_for_each_entry_safe(entry, n, &cache->walk_head, walk_list)
+-+		if (entry->mpath == mpath)
+-+			mesh_fast_tx_entry_free(cache, entry);
+-+	spin_unlock_bh(&cache->walk_lock);
+-+}
+-+
+-+void mesh_fast_tx_flush_sta(struct ieee80211_sub_if_data *sdata,
+-+			    struct sta_info *sta)
+-+{
+-+	struct mesh_tx_cache *cache = &sdata->u.mesh.tx_cache;
+-+	struct ieee80211_mesh_fast_tx *entry;
+-+	struct hlist_node *n;
+-+
+-+	cache = &sdata->u.mesh.tx_cache;
+-+	spin_lock_bh(&cache->walk_lock);
+-+	hlist_for_each_entry_safe(entry, n, &cache->walk_head, walk_list)
+-+		if (rcu_access_pointer(entry->mpath->next_hop) == sta)
+-+			mesh_fast_tx_entry_free(cache, entry);
+-+	spin_unlock_bh(&cache->walk_lock);
+-+}
+-+
+-+void mesh_fast_tx_flush_addr(struct ieee80211_sub_if_data *sdata,
+-+			     const u8 *addr)
+-+{
+-+	struct mesh_tx_cache *cache = &sdata->u.mesh.tx_cache;
+-+	struct ieee80211_mesh_fast_tx *entry;
+-+
+-+	cache = &sdata->u.mesh.tx_cache;
+-+	spin_lock_bh(&cache->walk_lock);
+-+	entry = rhashtable_lookup(&cache->rht, addr, fast_tx_rht_params);
+-+	if (entry)
+-+		mesh_fast_tx_entry_free(cache, entry);
+-+	spin_unlock_bh(&cache->walk_lock);
+-+}
+-+
+- /**
+-  * mesh_path_add - allocate and add a new path to the mesh path table
+-  * @dst: destination address of the path (ETH_ALEN length)
+-@@ -464,6 +737,8 @@ int mpp_path_add(struct ieee80211_sub_if
+- 
+- 	if (ret)
+- 		kfree(new_mpath);
+-+	else
+-+		mesh_fast_tx_flush_addr(sdata, dst);
+- 
+- 	sdata->u.mesh.mpp_paths_generation++;
+- 	return ret;
+-@@ -523,6 +798,10 @@ static void __mesh_path_del(struct mesh_
+- {
+- 	hlist_del_rcu(&mpath->walk_list);
+- 	rhashtable_remove_fast(&tbl->rhead, &mpath->rhash, mesh_rht_params);
+-+	if (tbl == &mpath->sdata->u.mesh.mpp_paths)
+-+		mesh_fast_tx_flush_addr(mpath->sdata, mpath->dst);
+-+	else
+-+		mesh_fast_tx_flush_mpath(mpath);
+- 	mesh_path_free_rcu(tbl, mpath);
+- }
+- 
+-@@ -747,6 +1026,7 @@ void mesh_path_fix_nexthop(struct mesh_p
+- 	mpath->exp_time = 0;
+- 	mpath->flags = MESH_PATH_FIXED | MESH_PATH_SN_VALID;
+- 	mesh_path_activate(mpath);
+-+	mesh_fast_tx_flush_mpath(mpath);
+- 	spin_unlock_bh(&mpath->state_lock);
+- 	ewma_mesh_fail_avg_init(&next_hop->mesh->fail_avg);
+- 	/* init it at a low value - 0 start is tricky */
+-@@ -758,6 +1038,7 @@ void mesh_pathtbl_init(struct ieee80211_
+- {
+- 	mesh_table_init(&sdata->u.mesh.mesh_paths);
+- 	mesh_table_init(&sdata->u.mesh.mpp_paths);
+-+	mesh_fast_tx_init(sdata);
+- }
+- 
+- static
+-@@ -785,6 +1066,7 @@ void mesh_path_expire(struct ieee80211_s
+- 
+- void mesh_pathtbl_unregister(struct ieee80211_sub_if_data *sdata)
+- {
+-+	mesh_fast_tx_deinit(sdata);
+- 	mesh_table_free(&sdata->u.mesh.mesh_paths);
+- 	mesh_table_free(&sdata->u.mesh.mpp_paths);
+- }
+---- a/net/mac80211/rx.c
+-+++ b/net/mac80211/rx.c
+-@@ -2791,6 +2791,7 @@ ieee80211_rx_mesh_data(struct ieee80211_
+- 	if (mesh_hdr->flags & MESH_FLAGS_AE) {
+- 		struct mesh_path *mppath;
+- 		char *proxied_addr;
+-+		bool update = false;
+- 
+- 		if (multicast)
+- 			proxied_addr = mesh_hdr->eaddr1;
+-@@ -2806,11 +2807,18 @@ ieee80211_rx_mesh_data(struct ieee80211_
+- 			mpp_path_add(sdata, proxied_addr, eth->h_source);
+- 		} else {
+- 			spin_lock_bh(&mppath->state_lock);
+--			if (!ether_addr_equal(mppath->mpp, eth->h_source))
+-+			if (!ether_addr_equal(mppath->mpp, eth->h_source)) {
+- 				memcpy(mppath->mpp, eth->h_source, ETH_ALEN);
+-+				update = true;
+-+			}
+- 			mppath->exp_time = jiffies;
+- 			spin_unlock_bh(&mppath->state_lock);
+- 		}
+-+
+-+		/* flush fast xmit cache if the address path changed */
+-+		if (update)
+-+			mesh_fast_tx_flush_addr(sdata, proxied_addr);
+-+
+- 		rcu_read_unlock();
+- 	}
+- 
+---- a/net/mac80211/tx.c
+-+++ b/net/mac80211/tx.c
+-@@ -3022,6 +3022,9 @@ void ieee80211_check_fast_xmit(struct st
+- 	if (!ieee80211_hw_check(&local->hw, SUPPORT_FAST_XMIT))
+- 		return;
+- 
+-+	if (ieee80211_vif_is_mesh(&sdata->vif))
+-+		mesh_fast_tx_flush_sta(sdata, sta);
+-+
+- 	/* Locking here protects both the pointer itself, and against concurrent
+- 	 * invocations winning data access races to, e.g., the key pointer that
+- 	 * is used.
+-@@ -3403,6 +3406,9 @@ static bool ieee80211_amsdu_aggregate(st
+- 	if (sdata->vif.offload_flags & IEEE80211_OFFLOAD_ENCAP_ENABLED)
+- 		return false;
+- 
+-+	if (ieee80211_vif_is_mesh(&sdata->vif))
+-+		return false;
+-+
+- 	if (skb_is_gso(skb))
+- 		return false;
+- 
+-@@ -3635,10 +3641,11 @@ free:
+- 	return NULL;
+- }
+- 
+--static void __ieee80211_xmit_fast(struct ieee80211_sub_if_data *sdata,
+--				  struct sta_info *sta,
+--				  struct ieee80211_fast_tx *fast_tx,
+--				  struct sk_buff *skb, u8 tid, bool ampdu)
+-+void __ieee80211_xmit_fast(struct ieee80211_sub_if_data *sdata,
+-+			   struct sta_info *sta,
+-+			   struct ieee80211_fast_tx *fast_tx,
+-+			   struct sk_buff *skb, bool ampdu,
+-+			   const u8 *da, const u8 *sa)
+- {
+- 	struct ieee80211_local *local = sdata->local;
+- 	struct ieee80211_hdr *hdr = (void *)fast_tx->hdr;
+-@@ -3647,7 +3654,6 @@ static void __ieee80211_xmit_fast(struct
+- 	ieee80211_tx_result r;
+- 	int hw_headroom = sdata->local->hw.extra_tx_headroom;
+- 	int extra_head = fast_tx->hdr_len - (ETH_HLEN - 2);
+--	struct ethhdr eth;
+- 
+- 	skb = skb_share_check(skb, GFP_ATOMIC);
+- 	if (unlikely(!skb))
+-@@ -3667,11 +3673,10 @@ static void __ieee80211_xmit_fast(struct
+- 					  ENCRYPT_NO)))
+- 		goto free;
+- 
+--	memcpy(&eth, skb->data, ETH_HLEN - 2);
+- 	hdr = skb_push(skb, extra_head);
+- 	memcpy(skb->data, fast_tx->hdr, fast_tx->hdr_len);
+--	memcpy(skb->data + fast_tx->da_offs, eth.h_dest, ETH_ALEN);
+--	memcpy(skb->data + fast_tx->sa_offs, eth.h_source, ETH_ALEN);
+-+	memcpy(skb->data + fast_tx->da_offs, da, ETH_ALEN);
+-+	memcpy(skb->data + fast_tx->sa_offs, sa, ETH_ALEN);
+- 
+- 	info = IEEE80211_SKB_CB(skb);
+- 	memset(info, 0, sizeof(*info));
+-@@ -3690,7 +3695,8 @@ static void __ieee80211_xmit_fast(struct
+- #endif
+- 
+- 	if (hdr->frame_control & cpu_to_le16(IEEE80211_STYPE_QOS_DATA)) {
+--		tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
+-+		u8 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
+-+
+- 		*ieee80211_get_qos_ctl(hdr) = tid;
+- 	}
+- 
+-@@ -3733,6 +3739,7 @@ static bool ieee80211_xmit_fast(struct i
+- 	struct ieee80211_hdr *hdr = (void *)fast_tx->hdr;
+- 	struct tid_ampdu_tx *tid_tx = NULL;
+- 	struct sk_buff *next;
+-+	struct ethhdr eth;
+- 	u8 tid = IEEE80211_NUM_TIDS;
+- 
+- 	/* control port protocol needs a lot of special handling */
+-@@ -3758,6 +3765,8 @@ static bool ieee80211_xmit_fast(struct i
+- 		}
+- 	}
+- 
+-+	memcpy(&eth, skb->data, ETH_HLEN - 2);
+-+
+- 	/* after this point (skb is modified) we cannot return false */
+- 	skb = ieee80211_tx_skb_fixup(skb, ieee80211_sdata_netdev_features(sdata));
+- 	if (!skb)
+-@@ -3765,7 +3774,8 @@ static bool ieee80211_xmit_fast(struct i
+- 
+- 	skb_list_walk_safe(skb, skb, next) {
+- 		skb_mark_not_on_list(skb);
+--		__ieee80211_xmit_fast(sdata, sta, fast_tx, skb, tid, tid_tx);
+-+		__ieee80211_xmit_fast(sdata, sta, fast_tx, skb, tid_tx,
+-+				      eth.h_dest, eth.h_source);
+- 	}
+- 
+- 	return true;
+-@@ -4252,8 +4262,15 @@ void __ieee80211_subif_start_xmit(struct
+- 		return;
+- 	}
+- 
+-+	sk_pacing_shift_update(skb->sk, sdata->local->hw.tx_sk_pacing_shift);
+-+
+- 	rcu_read_lock();
+- 
+-+	if (ieee80211_vif_is_mesh(&sdata->vif) &&
+-+	    ieee80211_hw_check(&local->hw, SUPPORT_FAST_XMIT) &&
+-+	    ieee80211_mesh_xmit_fast(sdata, skb, ctrl_flags))
+-+		goto out;
+-+
+- 	if (ieee80211_lookup_ra_sta(sdata, skb, &sta))
+- 		goto out_free;
+- 
+-@@ -4263,8 +4280,6 @@ void __ieee80211_subif_start_xmit(struct
+- 	skb_set_queue_mapping(skb, ieee80211_select_queue(sdata, sta, skb));
+- 	ieee80211_aggr_check(sdata, sta, skb);
+- 
+--	sk_pacing_shift_update(skb->sk, sdata->local->hw.tx_sk_pacing_shift);
+--
+- 	if (sta) {
+- 		struct ieee80211_fast_tx *fast_tx;
+- 
+diff --git a/package/kernel/mac80211/patches/subsys/320-wifi-mac80211-use-mesh-header-cache-to-speed-up-mesh.patch b/package/kernel/mac80211/patches/subsys/320-wifi-mac80211-use-mesh-header-cache-to-speed-up-mesh.patch
+deleted file mode 100644
+index 28b1ff1106..0000000000
+--- a/package/kernel/mac80211/patches/subsys/320-wifi-mac80211-use-mesh-header-cache-to-speed-up-mesh.patch
++++ /dev/null
+@@ -1,132 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Thu, 16 Feb 2023 11:07:30 +0100
+-Subject: [PATCH] wifi: mac80211: use mesh header cache to speed up mesh
+- forwarding
+-
+-Significantly reduces mesh forwarding path CPU usage and enables the
+-direct use of iTXQ.
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/net/mac80211/rx.c
+-+++ b/net/mac80211/rx.c
+-@@ -2720,6 +2720,65 @@ ieee80211_deliver_skb(struct ieee80211_r
+- 	}
+- }
+- 
+-+#ifdef CPTCFG_MAC80211_MESH
+-+static bool
+-+ieee80211_rx_mesh_fast_forward(struct ieee80211_sub_if_data *sdata,
+-+			       struct sk_buff *skb, int hdrlen)
+-+{
+-+	struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh;
+-+	struct ieee80211_mesh_fast_tx *entry = NULL;
+-+	struct ieee80211s_hdr *mesh_hdr;
+-+	struct tid_ampdu_tx *tid_tx;
+-+	struct sta_info *sta;
+-+	struct ethhdr eth;
+-+	u8 tid;
+-+
+-+	mesh_hdr = (struct ieee80211s_hdr *)(skb->data + sizeof(eth));
+-+	if ((mesh_hdr->flags & MESH_FLAGS_AE) == MESH_FLAGS_AE_A5_A6)
+-+		entry = mesh_fast_tx_get(sdata, mesh_hdr->eaddr1);
+-+	else if (!(mesh_hdr->flags & MESH_FLAGS_AE))
+-+		entry = mesh_fast_tx_get(sdata, skb->data);
+-+	if (!entry)
+-+		return false;
+-+
+-+	sta = rcu_dereference(entry->mpath->next_hop);
+-+	if (!sta)
+-+		return false;
+-+
+-+	if (skb_linearize(skb))
+-+		return false;
+-+
+-+	tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
+-+	tid_tx = rcu_dereference(sta->ampdu_mlme.tid_tx[tid]);
+-+	if (tid_tx) {
+-+		if (!test_bit(HT_AGG_STATE_OPERATIONAL, &tid_tx->state))
+-+			return false;
+-+
+-+		if (tid_tx->timeout)
+-+			tid_tx->last_tx = jiffies;
+-+	}
+-+
+-+	ieee80211_aggr_check(sdata, sta, skb);
+-+
+-+	if (ieee80211_get_8023_tunnel_proto(skb->data + hdrlen,
+-+					    &skb->protocol))
+-+		hdrlen += ETH_ALEN;
+-+	else
+-+		skb->protocol = htons(skb->len - hdrlen);
+-+	skb_set_network_header(skb, hdrlen + 2);
+-+
+-+	skb->dev = sdata->dev;
+-+	memcpy(&eth, skb->data, ETH_HLEN - 2);
+-+	skb_pull(skb, 2);
+-+	__ieee80211_xmit_fast(sdata, sta, &entry->fast_tx, skb, tid_tx,
+-+			      eth.h_dest, eth.h_source);
+-+	IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_unicast);
+-+	IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_frames);
+-+
+-+	return true;
+-+}
+-+#endif
+-+
+- static ieee80211_rx_result
+- ieee80211_rx_mesh_data(struct ieee80211_sub_if_data *sdata, struct sta_info *sta,
+- 		       struct sk_buff *skb)
+-@@ -2824,6 +2883,10 @@ ieee80211_rx_mesh_data(struct ieee80211_
+- 
+- 	skb_set_queue_mapping(skb, ieee802_1d_to_ac[skb->priority]);
+- 
+-+	if (!multicast &&
+-+	    ieee80211_rx_mesh_fast_forward(sdata, skb, mesh_hdrlen))
+-+		return RX_QUEUED;
+-+
+- 	ieee80211_fill_mesh_addresses(&hdr, &hdr.frame_control,
+- 				      eth->h_dest, eth->h_source);
+- 	hdrlen = ieee80211_hdrlen(hdr.frame_control);
+-@@ -2862,6 +2925,7 @@ ieee80211_rx_mesh_data(struct ieee80211_
+- 	info->control.flags |= IEEE80211_TX_INTCFL_NEED_TXPROCESSING;
+- 	info->control.vif = &sdata->vif;
+- 	info->control.jiffies = jiffies;
+-+	fwd_skb->dev = sdata->dev;
+- 	if (multicast) {
+- 		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_mcast);
+- 		memcpy(fwd_hdr->addr2, sdata->vif.addr, ETH_ALEN);
+-@@ -2883,7 +2947,6 @@ ieee80211_rx_mesh_data(struct ieee80211_
+- 	}
+- 
+- 	IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_frames);
+--	fwd_skb->dev = sdata->dev;
+- 	ieee80211_add_pending_skb(local, fwd_skb);
+- 
+- rx_accept:
+---- a/net/mac80211/ieee80211_i.h
+-+++ b/net/mac80211/ieee80211_i.h
+-@@ -2022,6 +2022,8 @@ void __ieee80211_xmit_fast(struct ieee80
+- 			   struct ieee80211_fast_tx *fast_tx,
+- 			   struct sk_buff *skb, bool ampdu,
+- 			   const u8 *da, const u8 *sa);
+-+void ieee80211_aggr_check(struct ieee80211_sub_if_data *sdata,
+-+			  struct sta_info *sta, struct sk_buff *skb);
+- 
+- /* HT */
+- void ieee80211_apply_htcap_overrides(struct ieee80211_sub_if_data *sdata,
+---- a/net/mac80211/tx.c
+-+++ b/net/mac80211/tx.c
+-@@ -1191,10 +1191,8 @@ static bool ieee80211_tx_prep_agg(struct
+- 	return queued;
+- }
+- 
+--static void
+--ieee80211_aggr_check(struct ieee80211_sub_if_data *sdata,
+--		     struct sta_info *sta,
+--		     struct sk_buff *skb)
+-+void ieee80211_aggr_check(struct ieee80211_sub_if_data *sdata,
+-+			  struct sta_info *sta, struct sk_buff *skb)
+- {
+- 	struct rate_control_ref *ref = sdata->local->rate_ctrl;
+- 	u16 tid;
+diff --git a/package/kernel/mac80211/patches/subsys/321-mac80211-fix-mesh-forwarding.patch b/package/kernel/mac80211/patches/subsys/321-mac80211-fix-mesh-forwarding.patch
+deleted file mode 100644
+index e2b268ae4c..0000000000
+--- a/package/kernel/mac80211/patches/subsys/321-mac80211-fix-mesh-forwarding.patch
++++ /dev/null
+@@ -1,32 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Mon, 20 Feb 2023 12:50:50 +0100
+-Subject: [PATCH] mac80211: fix mesh forwarding
+-
+-Linearize packets (needed for forwarding A-MSDU subframes).
+-Fix network header offset to fix flow dissector (and fair queueing).
+-
+-Fixes: 986e43b19ae9 ("wifi: mac80211: fix receiving A-MSDU frames on mesh interfaces")
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/net/mac80211/rx.c
+-+++ b/net/mac80211/rx.c
+-@@ -2904,6 +2904,9 @@ ieee80211_rx_mesh_data(struct ieee80211_
+- 
+- 		if (skb_cow_head(fwd_skb, hdrlen - sizeof(struct ethhdr)))
+- 			return RX_DROP_UNUSABLE;
+-+
+-+		if (skb_linearize(fwd_skb))
+-+			return RX_DROP_UNUSABLE;
+- 	}
+- 
+- 	fwd_hdr = skb_push(fwd_skb, hdrlen - sizeof(struct ethhdr));
+-@@ -2918,7 +2921,7 @@ ieee80211_rx_mesh_data(struct ieee80211_
+- 		hdrlen += ETH_ALEN;
+- 	else
+- 		fwd_skb->protocol = htons(fwd_skb->len - hdrlen);
+--	skb_set_network_header(fwd_skb, hdrlen);
+-+	skb_set_network_header(fwd_skb, hdrlen + 2);
+- 
+- 	info = IEEE80211_SKB_CB(fwd_skb);
+- 	memset(info, 0, sizeof(*info));
+diff --git a/package/kernel/mac80211/patches/subsys/322-wifi-mac80211-fix-mesh-path-discovery-based-on-unica.patch b/package/kernel/mac80211/patches/subsys/322-wifi-mac80211-fix-mesh-path-discovery-based-on-unica.patch
+deleted file mode 100644
+index 292a89ef92..0000000000
+--- a/package/kernel/mac80211/patches/subsys/322-wifi-mac80211-fix-mesh-path-discovery-based-on-unica.patch
++++ /dev/null
+@@ -1,52 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Sun, 26 Feb 2023 20:30:20 +0100
+-Subject: [PATCH] wifi: mac80211: fix mesh path discovery based on unicast
+- packets
+-
+-If a packet has reached its intended destination, it was bumped to the code
+-that accepts it, without first checking if a mesh_path needs to be created
+-based on the discovered source.
+-Fix this by moving the destination address check further down
+-
+-Fixes: 986e43b19ae9 ("wifi: mac80211: fix receiving A-MSDU frames on mesh interfaces")
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/net/mac80211/rx.c
+-+++ b/net/mac80211/rx.c
+-@@ -2824,17 +2824,6 @@ ieee80211_rx_mesh_data(struct ieee80211_
+- 	    mesh_rmc_check(sdata, eth->h_source, mesh_hdr))
+- 		return RX_DROP_MONITOR;
+- 
+--	/* Frame has reached destination.  Don't forward */
+--	if (ether_addr_equal(sdata->vif.addr, eth->h_dest))
+--		goto rx_accept;
+--
+--	if (!ifmsh->mshcfg.dot11MeshForwarding) {
+--		if (is_multicast_ether_addr(eth->h_dest))
+--			goto rx_accept;
+--
+--		return RX_DROP_MONITOR;
+--	}
+--
+- 	/* forward packet */
+- 	if (sdata->crypto_tx_tailroom_needed_cnt)
+- 		tailroom = IEEE80211_ENCRYPT_TAILROOM;
+-@@ -2881,6 +2870,17 @@ ieee80211_rx_mesh_data(struct ieee80211_
+- 		rcu_read_unlock();
+- 	}
+- 
+-+	/* Frame has reached destination.  Don't forward */
+-+	if (ether_addr_equal(sdata->vif.addr, eth->h_dest))
+-+		goto rx_accept;
+-+
+-+	if (!ifmsh->mshcfg.dot11MeshForwarding) {
+-+		if (is_multicast_ether_addr(eth->h_dest))
+-+			goto rx_accept;
+-+
+-+		return RX_DROP_MONITOR;
+-+	}
+-+
+- 	skb_set_queue_mapping(skb, ieee802_1d_to_ac[skb->priority]);
+- 
+- 	if (!multicast &&
+diff --git a/package/kernel/mac80211/patches/subsys/323-v6.3-wifi-mac80211-Add-VHT-MU-MIMO-related-flags-in-ieee8.patch b/package/kernel/mac80211/patches/subsys/323-v6.3-wifi-mac80211-Add-VHT-MU-MIMO-related-flags-in-ieee8.patch
+deleted file mode 100644
+index e23dc4d226..0000000000
+--- a/package/kernel/mac80211/patches/subsys/323-v6.3-wifi-mac80211-Add-VHT-MU-MIMO-related-flags-in-ieee8.patch
++++ /dev/null
+@@ -1,68 +0,0 @@
+-From: Muna Sinada <quic_msinada@quicinc.com>
+-Date: Wed, 5 Oct 2022 14:54:45 -0700
+-Subject: [PATCH] wifi: mac80211: Add VHT MU-MIMO related flags in
+- ieee80211_bss_conf
+-
+-Adding flags for SU Beamformer, SU Beamformee, MU Beamformer and
+-MU Beamformee for VHT. This is utilized to pass MU-MIMO
+-configurations from user space to driver in AP mode.
+-
+-Signed-off-by: Muna Sinada <quic_msinada@quicinc.com>
+-Link: https://lore.kernel.org/r/1665006886-23874-1-git-send-email-quic_msinada@quicinc.com
+-[fixed indentation, removed redundant !!]
+-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+----
+-
+---- a/include/net/mac80211.h
+-+++ b/include/net/mac80211.h
+-@@ -653,6 +653,14 @@ struct ieee80211_fils_discovery {
+-  *	write-protected by sdata_lock and local->mtx so holding either is fine
+-  *	for read access.
+-  * @color_change_color: the bss color that will be used after the change.
+-+ * @vht_su_beamformer: in AP mode, does this BSS support operation as an VHT SU
+-+ *	beamformer
+-+ * @vht_su_beamformee: in AP mode, does this BSS support operation as an VHT SU
+-+ *	beamformee
+-+ * @vht_mu_beamformer: in AP mode, does this BSS support operation as an VHT MU
+-+ *	beamformer
+-+ * @vht_mu_beamformee: in AP mode, does this BSS support operation as an VHT MU
+-+ *	beamformee
+-  */
+- struct ieee80211_bss_conf {
+- 	const u8 *bssid;
+-@@ -726,6 +734,11 @@ struct ieee80211_bss_conf {
+- 
+- 	bool color_change_active;
+- 	u8 color_change_color;
+-+
+-+	bool vht_su_beamformer;
+-+	bool vht_su_beamformee;
+-+	bool vht_mu_beamformer;
+-+	bool vht_mu_beamformee;
+- };
+- 
+- /**
+---- a/net/mac80211/cfg.c
+-+++ b/net/mac80211/cfg.c
+-@@ -1252,6 +1252,21 @@ static int ieee80211_start_ap(struct wip
+- 	prev_beacon_int = link_conf->beacon_int;
+- 	link_conf->beacon_int = params->beacon_interval;
+- 
+-+	if (params->vht_cap) {
+-+		link_conf->vht_su_beamformer =
+-+			params->vht_cap->vht_cap_info &
+-+				cpu_to_le32(IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE);
+-+		link_conf->vht_su_beamformee =
+-+			params->vht_cap->vht_cap_info &
+-+				cpu_to_le32(IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE);
+-+		link_conf->vht_mu_beamformer =
+-+			params->vht_cap->vht_cap_info &
+-+				cpu_to_le32(IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE);
+-+		link_conf->vht_mu_beamformee =
+-+			params->vht_cap->vht_cap_info &
+-+				cpu_to_le32(IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE);
+-+	}
+-+
+- 	if (params->he_cap && params->he_oper) {
+- 		link_conf->he_support = true;
+- 		link_conf->htc_trig_based_pkt_ext =
+diff --git a/package/kernel/mac80211/patches/subsys/324-v6.3-wifi-mac80211-Add-HE-MU-MIMO-related-flags-in-ieee80.patch b/package/kernel/mac80211/patches/subsys/324-v6.3-wifi-mac80211-Add-HE-MU-MIMO-related-flags-in-ieee80.patch
+deleted file mode 100644
+index f843dba123..0000000000
+--- a/package/kernel/mac80211/patches/subsys/324-v6.3-wifi-mac80211-Add-HE-MU-MIMO-related-flags-in-ieee80.patch
++++ /dev/null
+@@ -1,68 +0,0 @@
+-From: Muna Sinada <quic_msinada@quicinc.com>
+-Date: Wed, 5 Oct 2022 14:54:46 -0700
+-Subject: [PATCH] wifi: mac80211: Add HE MU-MIMO related flags in
+- ieee80211_bss_conf
+-
+-Adding flags for SU Beamformer, SU Beamformee, MU Beamformer and Full
+-Bandwidth UL MU-MIMO for HE. This is utilized to pass MU-MIMO
+-configurations from user space to driver in AP mode.
+-
+-Signed-off-by: Muna Sinada <quic_msinada@quicinc.com>
+-Link: https://lore.kernel.org/r/1665006886-23874-2-git-send-email-quic_msinada@quicinc.com
+-[fixed indentation, removed redundant !!]
+-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+----
+-
+---- a/include/net/mac80211.h
+-+++ b/include/net/mac80211.h
+-@@ -661,6 +661,15 @@ struct ieee80211_fils_discovery {
+-  *	beamformer
+-  * @vht_mu_beamformee: in AP mode, does this BSS support operation as an VHT MU
+-  *	beamformee
+-+ * @he_su_beamformer: in AP-mode, does this BSS support operation as an HE SU
+-+ *	beamformer
+-+ * @he_su_beamformee: in AP-mode, does this BSS support operation as an HE SU
+-+ *	beamformee
+-+ * @he_mu_beamformer: in AP-mode, does this BSS support operation as an HE MU
+-+ *	beamformer
+-+ * @he_full_ul_mumimo: does this BSS support the reception (AP) or transmission
+-+ *	(non-AP STA) of an HE TB PPDU on an RU that spans the entire PPDU
+-+ *	bandwidth
+-  */
+- struct ieee80211_bss_conf {
+- 	const u8 *bssid;
+-@@ -739,6 +748,10 @@ struct ieee80211_bss_conf {
+- 	bool vht_su_beamformee;
+- 	bool vht_mu_beamformer;
+- 	bool vht_mu_beamformee;
+-+	bool he_su_beamformer;
+-+	bool he_su_beamformee;
+-+	bool he_mu_beamformer;
+-+	bool he_full_ul_mumimo;
+- };
+- 
+- /**
+---- a/net/mac80211/cfg.c
+-+++ b/net/mac80211/cfg.c
+-@@ -1281,6 +1281,21 @@ static int ieee80211_start_ap(struct wip
+- 			changed |= BSS_CHANGED_HE_BSS_COLOR;
+- 	}
+- 
+-+	if (params->he_cap) {
+-+		link_conf->he_su_beamformer =
+-+			params->he_cap->phy_cap_info[3] &
+-+				IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
+-+		link_conf->he_su_beamformee =
+-+			params->he_cap->phy_cap_info[4] &
+-+				IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE;
+-+		link_conf->he_mu_beamformer =
+-+			params->he_cap->phy_cap_info[4] &
+-+				IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
+-+		link_conf->he_full_ul_mumimo =
+-+			params->he_cap->phy_cap_info[2] &
+-+				IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO;
+-+	}
+-+
+- 	if (sdata->vif.type == NL80211_IFTYPE_AP &&
+- 	    params->mbssid_config.tx_wdev) {
+- 		err = ieee80211_set_ap_mbssid_options(sdata,
+diff --git a/package/kernel/mac80211/patches/subsys/325-wifi-mac80211-introduce-ieee80211_refresh_tx_agg_ses.patch b/package/kernel/mac80211/patches/subsys/325-wifi-mac80211-introduce-ieee80211_refresh_tx_agg_ses.patch
+deleted file mode 100644
+index 1be5fcfbfa..0000000000
+--- a/package/kernel/mac80211/patches/subsys/325-wifi-mac80211-introduce-ieee80211_refresh_tx_agg_ses.patch
++++ /dev/null
+@@ -1,60 +0,0 @@
+-From: Ryder Lee <ryder.lee@mediatek.com>
+-Date: Sat, 18 Feb 2023 01:50:05 +0800
+-Subject: [PATCH] wifi: mac80211: introduce
+- ieee80211_refresh_tx_agg_session_timer()
+-
+-This allows low level drivers to refresh the tx agg session timer, based on
+-querying stats from the firmware usually. Especially for some mt76 devices
+-support .net_fill_forward_path would bypass mac80211, which leads to tx BA
+-session timeout for certain clients.
+-
+-Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
+----
+-
+---- a/include/net/mac80211.h
+-+++ b/include/net/mac80211.h
+-@@ -5964,6 +5964,18 @@ void ieee80211_queue_delayed_work(struct
+- 				  unsigned long delay);
+- 
+- /**
+-+ * ieee80211_refresh_tx_agg_session_timer - Refresh a tx agg session timer.
+-+ * @sta: the station for which to start a BA session
+-+ * @tid: the TID to BA on.
+-+ *
+-+ * This function allows low level driver to refresh tx agg session timer
+-+ * to maintain BA session, the session level will still be managed by the
+-+ * mac80211.
+-+ */
+-+void ieee80211_refresh_tx_agg_session_timer(struct ieee80211_sta *sta,
+-+					    u16 tid);
+-+
+-+/**
+-  * ieee80211_start_tx_ba_session - Start a tx Block Ack session.
+-  * @sta: the station for which to start a BA session
+-  * @tid: the TID to BA on.
+---- a/net/mac80211/agg-tx.c
+-+++ b/net/mac80211/agg-tx.c
+-@@ -554,6 +554,23 @@ void ieee80211_tx_ba_session_handle_star
+- 	ieee80211_send_addba_with_timeout(sta, tid_tx);
+- }
+- 
+-+void ieee80211_refresh_tx_agg_session_timer(struct ieee80211_sta *pubsta,
+-+					    u16 tid)
+-+{
+-+	struct sta_info *sta = container_of(pubsta, struct sta_info, sta);
+-+	struct tid_ampdu_tx *tid_tx;
+-+
+-+	if (WARN_ON_ONCE(tid >= IEEE80211_NUM_TIDS))
+-+		return;
+-+
+-+	tid_tx = rcu_dereference(sta->ampdu_mlme.tid_tx[tid]);
+-+	if (!tid_tx)
+-+		return;
+-+
+-+	tid_tx->last_tx = jiffies;
+-+}
+-+EXPORT_SYMBOL(ieee80211_refresh_tx_agg_session_timer);
+-+
+- /*
+-  * After accepting the AddBA Response we activated a timer,
+-  * resetting it after each frame that we send.
+diff --git a/package/kernel/mac80211/patches/subsys/326-wifi-mac80211-add-mesh-fast-rx-support.patch b/package/kernel/mac80211/patches/subsys/326-wifi-mac80211-add-mesh-fast-rx-support.patch
+deleted file mode 100644
+index 11f39c2d10..0000000000
+--- a/package/kernel/mac80211/patches/subsys/326-wifi-mac80211-add-mesh-fast-rx-support.patch
++++ /dev/null
+@@ -1,77 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Thu, 2 Mar 2023 13:52:29 +0100
+-Subject: [PATCH] wifi: mac80211: add mesh fast-rx support
+-
+-This helps bring down rx CPU usage by avoiding calls to the rx handlers in
+-the slow path. Supports forwarding and local rx, including A-MSDU.
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/net/mac80211/rx.c
+-+++ b/net/mac80211/rx.c
+-@@ -4564,6 +4564,12 @@ void ieee80211_check_fast_rx(struct sta_
+- 		}
+- 
+- 		break;
+-+	case NL80211_IFTYPE_MESH_POINT:
+-+		fastrx.expected_ds_bits = cpu_to_le16(IEEE80211_FCTL_FROMDS |
+-+						      IEEE80211_FCTL_TODS);
+-+		fastrx.da_offs = offsetof(struct ieee80211_hdr, addr3);
+-+		fastrx.sa_offs = offsetof(struct ieee80211_hdr, addr4);
+-+		break;
+- 	default:
+- 		goto clear;
+- 	}
+-@@ -4772,6 +4778,7 @@ static bool ieee80211_invoke_fast_rx(str
+- 	struct sk_buff *skb = rx->skb;
+- 	struct ieee80211_hdr *hdr = (void *)skb->data;
+- 	struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
+-+	static ieee80211_rx_result res;
+- 	int orig_len = skb->len;
+- 	int hdrlen = ieee80211_hdrlen(hdr->frame_control);
+- 	int snap_offs = hdrlen;
+-@@ -4833,7 +4840,8 @@ static bool ieee80211_invoke_fast_rx(str
+- 		snap_offs += IEEE80211_CCMP_HDR_LEN;
+- 	}
+- 
+--	if (!(status->rx_flags & IEEE80211_RX_AMSDU)) {
+-+	if (!ieee80211_vif_is_mesh(&rx->sdata->vif) &&
+-+	    !(status->rx_flags & IEEE80211_RX_AMSDU)) {
+- 		if (!pskb_may_pull(skb, snap_offs + sizeof(*payload)))
+- 			return false;
+- 
+-@@ -4872,13 +4880,29 @@ static bool ieee80211_invoke_fast_rx(str
+- 	/* do the header conversion - first grab the addresses */
+- 	ether_addr_copy(addrs.da, skb->data + fast_rx->da_offs);
+- 	ether_addr_copy(addrs.sa, skb->data + fast_rx->sa_offs);
+--	skb_postpull_rcsum(skb, skb->data + snap_offs,
+--			   sizeof(rfc1042_header) + 2);
+--	/* remove the SNAP but leave the ethertype */
+--	skb_pull(skb, snap_offs + sizeof(rfc1042_header));
+-+	if (ieee80211_vif_is_mesh(&rx->sdata->vif)) {
+-+	    skb_pull(skb, snap_offs - 2);
+-+	    put_unaligned_be16(skb->len - 2, skb->data);
+-+	} else {
+-+	    skb_postpull_rcsum(skb, skb->data + snap_offs,
+-+			       sizeof(rfc1042_header) + 2);
+-+
+-+	    /* remove the SNAP but leave the ethertype */
+-+	    skb_pull(skb, snap_offs + sizeof(rfc1042_header));
+-+	}
+- 	/* push the addresses in front */
+- 	memcpy(skb_push(skb, sizeof(addrs)), &addrs, sizeof(addrs));
+- 
+-+	res = ieee80211_rx_mesh_data(rx->sdata, rx->sta, rx->skb);
+-+	switch (res) {
+-+	case RX_QUEUED:
+-+		return true;
+-+	case RX_CONTINUE:
+-+		break;
+-+	default:
+-+		goto drop;
+-+	}
+-+
+- 	ieee80211_rx_8023(rx, fast_rx, orig_len);
+- 
+- 	return true;
+diff --git a/package/kernel/mac80211/patches/subsys/327-wifi-mac80211-add-support-for-letting-drivers-regist.patch b/package/kernel/mac80211/patches/subsys/327-wifi-mac80211-add-support-for-letting-drivers-regist.patch
+deleted file mode 100644
+index ac290b5360..0000000000
+--- a/package/kernel/mac80211/patches/subsys/327-wifi-mac80211-add-support-for-letting-drivers-regist.patch
++++ /dev/null
+@@ -1,149 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Mon, 20 Mar 2023 14:28:08 +0100
+-Subject: [PATCH] wifi: mac80211: add support for letting drivers register tc
+- offload support
+-
+-On newer MediaTek SoCs (e.g. MT7986), WLAN->WLAN or WLAN->Ethernet flows can
+-be offloaded by the SoC. In order to support that, the .ndo_setup_tc op is
+-needed.
+-
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/include/net/mac80211.h
+-+++ b/include/net/mac80211.h
+-@@ -4192,6 +4192,10 @@ struct ieee80211_prep_tx_info {
+-  *	Note that a sta can also be inserted or removed with valid links,
+-  *	i.e. passed to @sta_add/@sta_state with sta->valid_links not zero.
+-  *	In fact, cannot change from having valid_links and not having them.
+-+ * @net_setup_tc: Called from .ndo_setup_tc in order to prepare hardware
+-+ *	flow offloading for flows originating from the vif.
+-+ *	Note that the driver must not assume that the vif driver_data is valid
+-+ *	at this point, since the callback can be called during netdev teardown.
+-  */
+- struct ieee80211_ops {
+- 	void (*tx)(struct ieee80211_hw *hw,
+-@@ -4547,6 +4551,11 @@ struct ieee80211_ops {
+- 				struct ieee80211_vif *vif,
+- 				struct ieee80211_sta *sta,
+- 				u16 old_links, u16 new_links);
+-+	int (*net_setup_tc)(struct ieee80211_hw *hw,
+-+			    struct ieee80211_vif *vif,
+-+			    struct net_device *dev,
+-+			    enum tc_setup_type type,
+-+			    void *type_data);
+- };
+- 
+- /**
+---- a/net/mac80211/driver-ops.h
+-+++ b/net/mac80211/driver-ops.h
+-@@ -1470,6 +1470,23 @@ static inline int drv_net_fill_forward_p
+- 	return ret;
+- }
+- 
+-+static inline int drv_net_setup_tc(struct ieee80211_local *local,
+-+				   struct ieee80211_sub_if_data *sdata,
+-+				   struct net_device *dev,
+-+				   enum tc_setup_type type, void *type_data)
+-+{
+-+	int ret = -EOPNOTSUPP;
+-+
+-+	sdata = get_bss_sdata(sdata);
+-+	trace_drv_net_setup_tc(local, sdata, type);
+-+	if (local->ops->net_setup_tc)
+-+		ret = local->ops->net_setup_tc(&local->hw, &sdata->vif, dev,
+-+					       type, type_data);
+-+	trace_drv_return_int(local, ret);
+-+
+-+	return ret;
+-+}
+-+
+- int drv_change_vif_links(struct ieee80211_local *local,
+- 			 struct ieee80211_sub_if_data *sdata,
+- 			 u16 old_links, u16 new_links,
+---- a/net/mac80211/ieee80211_i.h
+-+++ b/net/mac80211/ieee80211_i.h
+-@@ -1939,7 +1939,8 @@ void ieee80211_color_collision_detection
+- /* interface handling */
+- #define MAC80211_SUPPORTED_FEATURES_TX	(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | \
+- 					 NETIF_F_HW_CSUM | NETIF_F_SG | \
+--					 NETIF_F_HIGHDMA | NETIF_F_GSO_SOFTWARE)
+-+					 NETIF_F_HIGHDMA | NETIF_F_GSO_SOFTWARE | \
+-+					 NETIF_F_HW_TC)
+- #define MAC80211_SUPPORTED_FEATURES_RX	(NETIF_F_RXCSUM)
+- #define MAC80211_SUPPORTED_FEATURES	(MAC80211_SUPPORTED_FEATURES_TX | \
+- 					 MAC80211_SUPPORTED_FEATURES_RX)
+---- a/net/mac80211/iface.c
+-+++ b/net/mac80211/iface.c
+-@@ -813,6 +813,21 @@ ieee80211_get_stats64(struct net_device
+- 	dev_fetch_sw_netstats(stats, dev->tstats);
+- }
+- 
+-+static int ieee80211_netdev_setup_tc(struct net_device *dev,
+-+				     enum tc_setup_type type, void *type_data)
+-+{
+-+	struct ieee80211_sub_if_data *sdata;
+-+	struct ieee80211_local *local;
+-+
+-+	sdata = IEEE80211_DEV_TO_SUB_IF(dev);
+-+	local = sdata->local;
+-+
+-+	if (!local->ops->net_setup_tc)
+-+		return -EOPNOTSUPP;
+-+
+-+	return drv_net_setup_tc(local, sdata, dev, type, type_data);
+-+}
+-+
+- static const struct net_device_ops ieee80211_dataif_ops = {
+- 	.ndo_open		= ieee80211_open,
+- 	.ndo_stop		= ieee80211_stop,
+-@@ -821,6 +836,7 @@ static const struct net_device_ops ieee8
+- 	.ndo_set_rx_mode	= ieee80211_set_multicast_list,
+- 	.ndo_set_mac_address 	= ieee80211_change_mac,
+- 	.ndo_get_stats64	= ieee80211_get_stats64,
+-+	.ndo_setup_tc		= ieee80211_netdev_setup_tc,
+- };
+- 
+- static u16 ieee80211_monitor_select_queue(struct net_device *dev,
+-@@ -929,6 +945,7 @@ static const struct net_device_ops ieee8
+- 	.ndo_set_mac_address	= ieee80211_change_mac,
+- 	.ndo_get_stats64	= ieee80211_get_stats64,
+- 	.ndo_fill_forward_path	= ieee80211_netdev_fill_forward_path,
+-+	.ndo_setup_tc		= ieee80211_netdev_setup_tc,
+- };
+- 
+- static bool ieee80211_iftype_supports_hdr_offload(enum nl80211_iftype iftype)
+---- a/net/mac80211/trace.h
+-+++ b/net/mac80211/trace.h
+-@@ -2478,6 +2478,31 @@ DEFINE_EVENT(sta_event, drv_net_fill_for
+- 	TP_ARGS(local, sdata, sta)
+- );
+- 
+-+TRACE_EVENT(drv_net_setup_tc,
+-+	TP_PROTO(struct ieee80211_local *local,
+-+		 struct ieee80211_sub_if_data *sdata,
+-+		 u8 type),
+-+
+-+	TP_ARGS(local, sdata, type),
+-+
+-+	TP_STRUCT__entry(
+-+		LOCAL_ENTRY
+-+		VIF_ENTRY
+-+		__field(u8, type)
+-+	),
+-+
+-+	TP_fast_assign(
+-+		LOCAL_ASSIGN;
+-+		VIF_ASSIGN;
+-+		__entry->type = type;
+-+	),
+-+
+-+	TP_printk(
+-+		LOCAL_PR_FMT VIF_PR_FMT " type:%d\n",
+-+		LOCAL_PR_ARG, VIF_PR_ARG, __entry->type
+-+	)
+-+);
+-+
+- TRACE_EVENT(drv_change_vif_links,
+- 	TP_PROTO(struct ieee80211_local *local,
+- 		 struct ieee80211_sub_if_data *sdata,
+diff --git a/package/kernel/mac80211/patches/subsys/329-wifi-mac80211-fix-receiving-mesh-packets-in-forwardi.patch b/package/kernel/mac80211/patches/subsys/329-wifi-mac80211-fix-receiving-mesh-packets-in-forwardi.patch
+deleted file mode 100644
+index 6882694da8..0000000000
+--- a/package/kernel/mac80211/patches/subsys/329-wifi-mac80211-fix-receiving-mesh-packets-in-forwardi.patch
++++ /dev/null
+@@ -1,50 +0,0 @@
+-From: Felix Fietkau <nbd@nbd.name>
+-Date: Sun, 26 Mar 2023 17:11:34 +0200
+-Subject: [PATCH] wifi: mac80211: fix receiving mesh packets in forwarding=0
+- networks
+-MIME-Version: 1.0
+-Content-Type: text/plain; charset=UTF-8
+-Content-Transfer-Encoding: 8bit
+-
+-When forwarding is set to 0, frames are typically sent with ttl=1.
+-Move the ttl decrement check below the check for local receive in order to
+-fix packet drops.
+-
+-Reported-by: Thomas Hühn <thomas.huehn@hs-nordhausen.de>
+-Reported-by: Nick Hainke <vincent@systemli.org>
+-Fixes: 986e43b19ae9 ("wifi: mac80211: fix receiving A-MSDU frames on mesh interfaces")
+-Signed-off-by: Felix Fietkau <nbd@nbd.name>
+----
+-
+---- a/net/mac80211/rx.c
+-+++ b/net/mac80211/rx.c
+-@@ -2828,14 +2828,6 @@ ieee80211_rx_mesh_data(struct ieee80211_
+- 	if (sdata->crypto_tx_tailroom_needed_cnt)
+- 		tailroom = IEEE80211_ENCRYPT_TAILROOM;
+- 
+--	if (!--mesh_hdr->ttl) {
+--		if (multicast)
+--			goto rx_accept;
+--
+--		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_ttl);
+--		return RX_DROP_MONITOR;
+--	}
+--
+- 	if (mesh_hdr->flags & MESH_FLAGS_AE) {
+- 		struct mesh_path *mppath;
+- 		char *proxied_addr;
+-@@ -2874,6 +2866,14 @@ ieee80211_rx_mesh_data(struct ieee80211_
+- 	if (ether_addr_equal(sdata->vif.addr, eth->h_dest))
+- 		goto rx_accept;
+- 
+-+	if (!--mesh_hdr->ttl) {
+-+		if (multicast)
+-+			goto rx_accept;
+-+
+-+		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_ttl);
+-+		return RX_DROP_MONITOR;
+-+	}
+-+
+- 	if (!ifmsh->mshcfg.dot11MeshForwarding) {
+- 		if (is_multicast_ether_addr(eth->h_dest))
+- 			goto rx_accept;
+diff --git a/package/kernel/mac80211/patches/subsys/330-wifi-ieee80211-correctly-mark-FTM-frames-non-buffera.patch b/package/kernel/mac80211/patches/subsys/330-wifi-ieee80211-correctly-mark-FTM-frames-non-buffera.patch
+deleted file mode 100644
+index 079dd2a868..0000000000
+--- a/package/kernel/mac80211/patches/subsys/330-wifi-ieee80211-correctly-mark-FTM-frames-non-buffera.patch
++++ /dev/null
+@@ -1,134 +0,0 @@
+-From: Johannes Berg <johannes.berg@intel.com>
+-Date: Wed, 29 Mar 2023 16:46:26 +0200
+-Subject: [PATCH] wifi: ieee80211: correctly mark FTM frames non-bufferable
+-
+-The checks of whether or not a frame is bufferable were not
+-taking into account that some action frames aren't, such as
+-FTM. Check this, which requires some changes to the function
+-ieee80211_is_bufferable_mmpdu() since we need the whole skb
+-for the checks now.
+-
+-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+-Reviewed-by: Greenman, Gregory <gregory.greenman@intel.com>
+-Reviewed-by: Peer, Ilan <ilan.peer@intel.com>
+----
+-
+---- a/drivers/net/wireless/intel/iwlwifi/mvm/tx.c
+-+++ b/drivers/net/wireless/intel/iwlwifi/mvm/tx.c
+-@@ -601,8 +601,9 @@ static void iwl_mvm_skb_prepare_status(s
+- 
+- static int iwl_mvm_get_ctrl_vif_queue(struct iwl_mvm *mvm,
+- 				      struct ieee80211_tx_info *info,
+--				      struct ieee80211_hdr *hdr)
+-+				      struct sk_buff *skb)
+- {
+-+	struct ieee80211_hdr *hdr = (void *)skb->data;
+- 	struct iwl_mvm_vif *mvmvif =
+- 		iwl_mvm_vif_from_mac80211(info->control.vif);
+- 	__le16 fc = hdr->frame_control;
+-@@ -621,7 +622,7 @@ static int iwl_mvm_get_ctrl_vif_queue(st
+- 		 * reason 7 ("Class 3 frame received from nonassociated STA").
+- 		 */
+- 		if (ieee80211_is_mgmt(fc) &&
+--		    (!ieee80211_is_bufferable_mmpdu(fc) ||
+-+		    (!ieee80211_is_bufferable_mmpdu(skb) ||
+- 		     ieee80211_is_deauth(fc) || ieee80211_is_disassoc(fc)))
+- 			return mvm->probe_queue;
+- 
+-@@ -740,7 +741,7 @@ int iwl_mvm_tx_skb_non_sta(struct iwl_mv
+- 			else
+- 				sta_id = mvmvif->mcast_sta.sta_id;
+- 
+--			queue = iwl_mvm_get_ctrl_vif_queue(mvm, &info, hdr);
+-+			queue = iwl_mvm_get_ctrl_vif_queue(mvm, &info, skb);
+- 		} else if (info.control.vif->type == NL80211_IFTYPE_MONITOR) {
+- 			queue = mvm->snif_queue;
+- 			sta_id = mvm->snif_sta.sta_id;
+---- a/include/linux/ieee80211.h
+-+++ b/include/linux/ieee80211.h
+-@@ -772,20 +772,6 @@ static inline bool ieee80211_is_any_null
+- }
+- 
+- /**
+-- * ieee80211_is_bufferable_mmpdu - check if frame is bufferable MMPDU
+-- * @fc: frame control field in little-endian byteorder
+-- */
+--static inline bool ieee80211_is_bufferable_mmpdu(__le16 fc)
+--{
+--	/* IEEE 802.11-2012, definition of "bufferable management frame";
+--	 * note that this ignores the IBSS special case. */
+--	return ieee80211_is_mgmt(fc) &&
+--	       (ieee80211_is_action(fc) ||
+--		ieee80211_is_disassoc(fc) ||
+--		ieee80211_is_deauth(fc));
+--}
+--
+--/**
+-  * ieee80211_is_first_frag - check if IEEE80211_SCTL_FRAG is not set
+-  * @seq_ctrl: frame sequence control bytes in little-endian byteorder
+-  */
+-@@ -4121,6 +4107,44 @@ static inline u8 *ieee80211_get_DA(struc
+- }
+- 
+- /**
+-+ * ieee80211_is_bufferable_mmpdu - check if frame is bufferable MMPDU
+-+ * @skb: the skb to check, starting with the 802.11 header
+-+ */
+-+static inline bool ieee80211_is_bufferable_mmpdu(struct sk_buff *skb)
+-+{
+-+	struct ieee80211_mgmt *mgmt = (void *)skb->data;
+-+	__le16 fc = mgmt->frame_control;
+-+
+-+	/*
+-+	 * IEEE 802.11 REVme D2.0 definition of bufferable MMPDU;
+-+	 * note that this ignores the IBSS special case.
+-+	 */
+-+	if (!ieee80211_is_mgmt(fc))
+-+		return false;
+-+
+-+	if (ieee80211_is_disassoc(fc) || ieee80211_is_deauth(fc))
+-+		return true;
+-+
+-+	if (!ieee80211_is_action(fc))
+-+		return false;
+-+
+-+	if (skb->len < offsetofend(typeof(*mgmt), u.action.u.ftm.action_code))
+-+		return true;
+-+
+-+	/* action frame - additionally check for non-bufferable FTM */
+-+
+-+	if (mgmt->u.action.category != WLAN_CATEGORY_PUBLIC &&
+-+	    mgmt->u.action.category != WLAN_CATEGORY_PROTECTED_DUAL_OF_ACTION)
+-+		return true;
+-+
+-+	if (mgmt->u.action.u.ftm.action_code == WLAN_PUB_ACTION_FTM_REQUEST ||
+-+	    mgmt->u.action.u.ftm.action_code == WLAN_PUBLIC_ACTION_FTM_RESPONSE)
+-+		return false;
+-+
+-+	return true;
+-+}
+-+
+-+/**
+-  * _ieee80211_is_robust_mgmt_frame - check if frame is a robust management frame
+-  * @hdr: the frame (buffer must include at least the first octet of payload)
+-  */
+---- a/net/mac80211/tx.c
+-+++ b/net/mac80211/tx.c
+-@@ -488,7 +488,7 @@ ieee80211_tx_h_unicast_ps_buf(struct iee
+- 		int ac = skb_get_queue_mapping(tx->skb);
+- 
+- 		if (ieee80211_is_mgmt(hdr->frame_control) &&
+--		    !ieee80211_is_bufferable_mmpdu(hdr->frame_control)) {
+-+		    !ieee80211_is_bufferable_mmpdu(tx->skb)) {
+- 			info->flags |= IEEE80211_TX_CTL_NO_PS_BUFFER;
+- 			return TX_CONTINUE;
+- 		}
+-@@ -1326,7 +1326,7 @@ static struct txq_info *ieee80211_get_tx
+- 	if (!(info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) &&
+- 	    unlikely(!ieee80211_is_data_present(hdr->frame_control))) {
+- 		if ((!ieee80211_is_mgmt(hdr->frame_control) ||
+--		     ieee80211_is_bufferable_mmpdu(hdr->frame_control) ||
+-+		     ieee80211_is_bufferable_mmpdu(skb) ||
+- 		     vif->type == NL80211_IFTYPE_STATION) &&
+- 		    sta && sta->uploaded) {
+- 			/*
+diff --git a/package/kernel/mac80211/patches/subsys/331-wifi-mac80211-flush-queues-on-STA-removal.patch b/package/kernel/mac80211/patches/subsys/331-wifi-mac80211-flush-queues-on-STA-removal.patch
+deleted file mode 100644
+index 00232ec1b9..0000000000
+--- a/package/kernel/mac80211/patches/subsys/331-wifi-mac80211-flush-queues-on-STA-removal.patch
++++ /dev/null
+@@ -1,36 +0,0 @@
+-From: Johannes Berg <johannes.berg@intel.com>
+-Date: Mon, 13 Mar 2023 11:42:12 +0100
+-Subject: [PATCH] wifi: mac80211: flush queues on STA removal
+-
+-When we remove a station, we first make it unreachable,
+-then we (must) remove its keys, and then remove the
+-station itself. Depending on the hardware design, if
+-we have hardware crypto at all, frames still sitting
+-on hardware queues may then be transmitted without a
+-valid key, possibly unencrypted or with a fixed key.
+-
+-Fix this by flushing the queues when removing stations
+-so this cannot happen.
+-
+-Cc: stable@vger.kernel.org
+-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+-Reviewed-by: Greenman, Gregory <gregory.greenman@intel.com>
+----
+-
+---- a/net/mac80211/sta_info.c
+-+++ b/net/mac80211/sta_info.c
+-@@ -1271,6 +1271,14 @@ static void __sta_info_destroy_part2(str
+- 		WARN_ON_ONCE(ret);
+- 	}
+- 
+-+	/* Flush queues before removing keys, as that might remove them
+-+	 * from hardware, and then depending on the offload method, any
+-+	 * frames sitting on hardware queues might be sent out without
+-+	 * any encryption at all.
+-+	 */
+-+	if (local->ops->set_key)
+-+		ieee80211_flush_queues(local, sta->sdata, false);
+-+
+- 	/* now keys can no longer be reached */
+- 	ieee80211_free_sta_keys(local, sta);
+- 
+diff --git a/package/kernel/mac80211/patches/subsys/332-wifi-iwlwifi-mvm-support-flush-on-AP-interfaces.patch b/package/kernel/mac80211/patches/subsys/332-wifi-iwlwifi-mvm-support-flush-on-AP-interfaces.patch
+deleted file mode 100644
+index 3c31dfeddc..0000000000
+--- a/package/kernel/mac80211/patches/subsys/332-wifi-iwlwifi-mvm-support-flush-on-AP-interfaces.patch
++++ /dev/null
+@@ -1,34 +0,0 @@
+-From: Johannes Berg <johannes.berg@intel.com>
+-Date: Mon, 13 Mar 2023 12:02:58 +0100
+-Subject: [PATCH] wifi: iwlwifi: mvm: support flush on AP interfaces
+-
+-Support TX flush on AP interfaces so that we will do a
+-proper flush for frames on the queue before keys are
+-removed.
+-
+-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+-Reviewed-by: Greenman, Gregory <gregory.greenman@intel.com>
+----
+-
+---- a/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c
+-+++ b/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c
+-@@ -4854,9 +4854,6 @@ static void iwl_mvm_mac_flush(struct iee
+- 		return;
+- 	}
+- 
+--	if (vif->type != NL80211_IFTYPE_STATION)
+--		return;
+--
+- 	/* Make sure we're done with the deferred traffic before flushing */
+- 	flush_work(&mvm->add_stream_wk);
+- 
+-@@ -4874,9 +4871,6 @@ static void iwl_mvm_mac_flush(struct iee
+- 		if (mvmsta->vif != vif)
+- 			continue;
+- 
+--		/* make sure only TDLS peers or the AP are flushed */
+--		WARN_ON(i != mvmvif->ap_sta_id && !sta->tdls);
+--
+- 		if (drop) {
+- 			if (iwl_mvm_flush_sta(mvm, mvmsta, false))
+- 				IWL_ERR(mvm, "flush request fail\n");
+diff --git a/package/kernel/mac80211/patches/subsys/333-wifi-mac80211-add-flush_sta-method.patch b/package/kernel/mac80211/patches/subsys/333-wifi-mac80211-add-flush_sta-method.patch
+deleted file mode 100644
+index 3bba0b7e66..0000000000
+--- a/package/kernel/mac80211/patches/subsys/333-wifi-mac80211-add-flush_sta-method.patch
++++ /dev/null
+@@ -1,91 +0,0 @@
+-From: Johannes Berg <johannes.berg@intel.com>
+-Date: Mon, 13 Mar 2023 11:53:51 +0100
+-Subject: [PATCH] wifi: mac80211: add flush_sta method
+-
+-Some drivers like iwlwifi might have per-STA queues, so we
+-may want to flush/drop just those queues rather than all
+-when removing a station. Add a separate method for that.
+-
+-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+-Reviewed-by: Greenman, Gregory <gregory.greenman@intel.com>
+----
+-
+---- a/include/net/mac80211.h
+-+++ b/include/net/mac80211.h
+-@@ -3918,6 +3918,10 @@ struct ieee80211_prep_tx_info {
+-  *	Note that vif can be NULL.
+-  *	The callback can sleep.
+-  *
+-+ * @flush_sta: Flush or drop all pending frames from the hardware queue(s) for
+-+ *	the given station, as it's about to be removed.
+-+ *	The callback can sleep.
+-+ *
+-  * @channel_switch: Drivers that need (or want) to offload the channel
+-  *	switch operation for CSAs received from the AP may implement this
+-  *	callback. They must then call ieee80211_chswitch_done() to indicate
+-@@ -4372,6 +4376,8 @@ struct ieee80211_ops {
+- #endif
+- 	void (*flush)(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
+- 		      u32 queues, bool drop);
+-+	void (*flush_sta)(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
+-+			  struct ieee80211_sta *sta);
+- 	void (*channel_switch)(struct ieee80211_hw *hw,
+- 			       struct ieee80211_vif *vif,
+- 			       struct ieee80211_channel_switch *ch_switch);
+---- a/net/mac80211/driver-ops.h
+-+++ b/net/mac80211/driver-ops.h
+-@@ -617,6 +617,21 @@ static inline void drv_flush(struct ieee
+- 	trace_drv_return_void(local);
+- }
+- 
+-+static inline void drv_flush_sta(struct ieee80211_local *local,
+-+				 struct ieee80211_sub_if_data *sdata,
+-+				 struct sta_info *sta)
+-+{
+-+	might_sleep();
+-+
+-+	if (sdata && !check_sdata_in_driver(sdata))
+-+		return;
+-+
+-+	trace_drv_flush_sta(local, sdata, &sta->sta);
+-+	if (local->ops->flush_sta)
+-+		local->ops->flush_sta(&local->hw, &sdata->vif, &sta->sta);
+-+	trace_drv_return_void(local);
+-+}
+-+
+- static inline void drv_channel_switch(struct ieee80211_local *local,
+- 				      struct ieee80211_sub_if_data *sdata,
+- 				      struct ieee80211_channel_switch *ch_switch)
+---- a/net/mac80211/sta_info.c
+-+++ b/net/mac80211/sta_info.c
+-@@ -1276,8 +1276,12 @@ static void __sta_info_destroy_part2(str
+- 	 * frames sitting on hardware queues might be sent out without
+- 	 * any encryption at all.
+- 	 */
+--	if (local->ops->set_key)
+--		ieee80211_flush_queues(local, sta->sdata, false);
+-+	if (local->ops->set_key) {
+-+		if (local->ops->flush_sta)
+-+			drv_flush_sta(local, sta->sdata, sta);
+-+		else
+-+			ieee80211_flush_queues(local, sta->sdata, false);
+-+	}
+- 
+- 	/* now keys can no longer be reached */
+- 	ieee80211_free_sta_keys(local, sta);
+---- a/net/mac80211/trace.h
+-+++ b/net/mac80211/trace.h
+-@@ -1177,6 +1177,13 @@ TRACE_EVENT(drv_flush,
+- 	)
+- );
+- 
+-+DEFINE_EVENT(sta_event, drv_flush_sta,
+-+	TP_PROTO(struct ieee80211_local *local,
+-+		 struct ieee80211_sub_if_data *sdata,
+-+		 struct ieee80211_sta *sta),
+-+	TP_ARGS(local, sdata, sta)
+-+);
+-+
+- TRACE_EVENT(drv_channel_switch,
+- 	TP_PROTO(struct ieee80211_local *local,
+- 		 struct ieee80211_sub_if_data *sdata,
+diff --git a/package/kernel/mac80211/patches/subsys/334-wifi-iwlwifi-mvm-support-new-flush_sta-method.patch b/package/kernel/mac80211/patches/subsys/334-wifi-iwlwifi-mvm-support-new-flush_sta-method.patch
+deleted file mode 100644
+index 18f39d505f..0000000000
+--- a/package/kernel/mac80211/patches/subsys/334-wifi-iwlwifi-mvm-support-new-flush_sta-method.patch
++++ /dev/null
+@@ -1,53 +0,0 @@
+-From: Johannes Berg <johannes.berg@intel.com>
+-Date: Mon, 13 Mar 2023 12:05:35 +0100
+-Subject: [PATCH] wifi: iwlwifi: mvm: support new flush_sta method
+-
+-For iwlwifi this is simple to implement, and on newer hardware
+-it's an improvement since we have per-station queues.
+-
+-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+-Reviewed-by: Greenman, Gregory <gregory.greenman@intel.com>
+----
+-
+---- a/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c
+-+++ b/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c
+-@@ -4890,6 +4890,31 @@ static void iwl_mvm_mac_flush(struct iee
+- 		iwl_trans_wait_tx_queues_empty(mvm->trans, msk);
+- }
+- 
+-+static void iwl_mvm_mac_flush_sta(struct ieee80211_hw *hw,
+-+				  struct ieee80211_vif *vif,
+-+				  struct ieee80211_sta *sta)
+-+{
+-+	struct iwl_mvm *mvm = IWL_MAC80211_GET_MVM(hw);
+-+	int i;
+-+
+-+	mutex_lock(&mvm->mutex);
+-+	for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
+-+		struct iwl_mvm_sta *mvmsta;
+-+		struct ieee80211_sta *tmp;
+-+
+-+		tmp = rcu_dereference_protected(mvm->fw_id_to_mac_id[i],
+-+						lockdep_is_held(&mvm->mutex));
+-+		if (tmp != sta)
+-+			continue;
+-+
+-+		mvmsta = iwl_mvm_sta_from_mac80211(sta);
+-+
+-+		if (iwl_mvm_flush_sta(mvm, mvmsta, false))
+-+			IWL_ERR(mvm, "flush request fail\n");
+-+	}
+-+	mutex_unlock(&mvm->mutex);
+-+}
+-+
+- static int iwl_mvm_mac_get_survey(struct ieee80211_hw *hw, int idx,
+- 				  struct survey_info *survey)
+- {
+-@@ -5417,6 +5442,7 @@ const struct ieee80211_ops iwl_mvm_hw_op
+- 	.mgd_complete_tx = iwl_mvm_mac_mgd_complete_tx,
+- 	.mgd_protect_tdls_discover = iwl_mvm_mac_mgd_protect_tdls_discover,
+- 	.flush = iwl_mvm_mac_flush,
+-+	.flush_sta = iwl_mvm_mac_flush_sta,
+- 	.sched_scan_start = iwl_mvm_mac_sched_scan_start,
+- 	.sched_scan_stop = iwl_mvm_mac_sched_scan_stop,
+- 	.set_key = iwl_mvm_mac_set_key,
+diff --git a/package/kernel/mac80211/patches/subsys/335-wifi-mac80211-add-LDPC-related-flags-in-ieee80211_bs.patch b/package/kernel/mac80211/patches/subsys/335-wifi-mac80211-add-LDPC-related-flags-in-ieee80211_bs.patch
+deleted file mode 100644
+index 1b379b76ae..0000000000
+--- a/package/kernel/mac80211/patches/subsys/335-wifi-mac80211-add-LDPC-related-flags-in-ieee80211_bs.patch
++++ /dev/null
+@@ -1,62 +0,0 @@
+-From: Ryder Lee <ryder.lee@mediatek.com>
+-Date: Sat, 18 Feb 2023 01:49:25 +0800
+-Subject: [PATCH] wifi: mac80211: add LDPC related flags in ieee80211_bss_conf
+-
+-This is utilized to pass LDPC configurations from user space
+-(i.e. hostapd) to driver.
+-
+-Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
+-Link: https://lore.kernel.org/r/1de696aaa34efd77a926eb657b8c0fda05aaa177.1676628065.git.ryder.lee@mediatek.com
+-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+----
+-
+---- a/include/net/mac80211.h
+-+++ b/include/net/mac80211.h
+-@@ -653,6 +653,9 @@ struct ieee80211_fils_discovery {
+-  *	write-protected by sdata_lock and local->mtx so holding either is fine
+-  *	for read access.
+-  * @color_change_color: the bss color that will be used after the change.
+-+ * @ht_ldpc: in AP mode, indicates interface has HT LDPC capability.
+-+ * @vht_ldpc: in AP mode, indicates interface has VHT LDPC capability.
+-+ * @he_ldpc: in AP mode, indicates interface has HE LDPC capability.
+-  * @vht_su_beamformer: in AP mode, does this BSS support operation as an VHT SU
+-  *	beamformer
+-  * @vht_su_beamformee: in AP mode, does this BSS support operation as an VHT SU
+-@@ -744,6 +747,9 @@ struct ieee80211_bss_conf {
+- 	bool color_change_active;
+- 	u8 color_change_color;
+- 
+-+	bool ht_ldpc;
+-+	bool vht_ldpc;
+-+	bool he_ldpc;
+- 	bool vht_su_beamformer;
+- 	bool vht_su_beamformee;
+- 	bool vht_mu_beamformer;
+---- a/net/mac80211/cfg.c
+-+++ b/net/mac80211/cfg.c
+-@@ -1252,7 +1252,15 @@ static int ieee80211_start_ap(struct wip
+- 	prev_beacon_int = link_conf->beacon_int;
+- 	link_conf->beacon_int = params->beacon_interval;
+- 
+-+	if (params->ht_cap)
+-+		link_conf->ht_ldpc =
+-+			params->ht_cap->cap_info &
+-+				cpu_to_le16(IEEE80211_HT_CAP_LDPC_CODING);
+-+
+- 	if (params->vht_cap) {
+-+		link_conf->vht_ldpc =
+-+			params->vht_cap->vht_cap_info &
+-+				cpu_to_le32(IEEE80211_VHT_CAP_RXLDPC);
+- 		link_conf->vht_su_beamformer =
+- 			params->vht_cap->vht_cap_info &
+- 				cpu_to_le32(IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE);
+-@@ -1282,6 +1290,9 @@ static int ieee80211_start_ap(struct wip
+- 	}
+- 
+- 	if (params->he_cap) {
+-+		link_conf->he_ldpc =
+-+			params->he_cap->phy_cap_info[1] &
+-+				IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD;
+- 		link_conf->he_su_beamformer =
+- 			params->he_cap->phy_cap_info[3] &
+- 				IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
+diff --git a/package/kernel/mac80211/patches/subsys/336-v6.4-wifi-mac80211-generate-EMA-beacons-in-AP-mode.patch b/package/kernel/mac80211/patches/subsys/336-v6.4-wifi-mac80211-generate-EMA-beacons-in-AP-mode.patch
+deleted file mode 100644
+index 088f468e37..0000000000
+--- a/package/kernel/mac80211/patches/subsys/336-v6.4-wifi-mac80211-generate-EMA-beacons-in-AP-mode.patch
++++ /dev/null
+@@ -1,372 +0,0 @@
+-From bd54f3c29077f23dad92ef82a78061b40be30c65 Mon Sep 17 00:00:00 2001
+-From: Aloka Dixit <quic_alokad@quicinc.com>
+-Date: Mon, 5 Dec 2022 16:50:37 -0800
+-Subject: [PATCH] wifi: mac80211: generate EMA beacons in AP mode
+-
+-Add APIs to generate an array of beacons for an EMA AP (enhanced
+-multiple BSSID advertisements), each including a single MBSSID element.
+-EMA profile periodicity equals the count of elements.
+-
+-- ieee80211_beacon_get_template_ema_list() - Generate and return all
+-EMA beacon templates. Drivers must call ieee80211_beacon_free_ema_list()
+-to free the memory. No change in the prototype for the existing API,
+-ieee80211_beacon_get_template(), which should be used for non-EMA AP.
+-
+-- ieee80211_beacon_get_template_ema_index() - Generate a beacon which
+-includes the multiple BSSID element at the given index. Drivers can use
+-this function in a loop until NULL is returned which indicates end of
+-available MBSSID elements.
+-
+-- ieee80211_beacon_free_ema_list() - free the memory allocated for the
+-list of EMA beacon templates.
+-
+-Modify existing functions ieee80211_beacon_get_ap(),
+-ieee80211_get_mbssid_beacon_len() and ieee80211_beacon_add_mbssid()
+-to accept a new parameter for EMA index.
+-
+-Signed-off-by: Aloka Dixit <quic_alokad@quicinc.com>
+-Co-developed-by: John Crispin <john@phrozen.org>
+-Signed-off-by: John Crispin <john@phrozen.org>
+-Link: https://lore.kernel.org/r/20221206005040.3177-2-quic_alokad@quicinc.com
+-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+----
+- include/net/mac80211.h     |  68 +++++++++++++++++++
+- net/mac80211/cfg.c         |  11 +--
+- net/mac80211/ieee80211_i.h |  10 ++-
+- net/mac80211/tx.c          | 134 ++++++++++++++++++++++++++++++++++---
+- 4 files changed, 205 insertions(+), 18 deletions(-)
+-
+---- a/include/net/mac80211.h
+-+++ b/include/net/mac80211.h
+-@@ -5252,6 +5252,74 @@ ieee80211_beacon_get_template(struct iee
+- 			      unsigned int link_id);
+- 
+- /**
+-+ * ieee80211_beacon_get_template_ema_index - EMA beacon template generation
+-+ * @hw: pointer obtained from ieee80211_alloc_hw().
+-+ * @vif: &struct ieee80211_vif pointer from the add_interface callback.
+-+ * @offs: &struct ieee80211_mutable_offsets pointer to struct that will
+-+ *	receive the offsets that may be updated by the driver.
+-+ * @link_id: the link id to which the beacon belongs (or 0 for a non-MLD AP).
+-+ * @ema_index: index of the beacon in the EMA set.
+-+ *
+-+ * This function follows the same rules as ieee80211_beacon_get_template()
+-+ * but returns a beacon template which includes multiple BSSID element at the
+-+ * requested index.
+-+ *
+-+ * Return: The beacon template. %NULL indicates the end of EMA templates.
+-+ */
+-+struct sk_buff *
+-+ieee80211_beacon_get_template_ema_index(struct ieee80211_hw *hw,
+-+					struct ieee80211_vif *vif,
+-+					struct ieee80211_mutable_offsets *offs,
+-+					unsigned int link_id, u8 ema_index);
+-+
+-+/**
+-+ * struct ieee80211_ema_beacons - List of EMA beacons
+-+ * @cnt: count of EMA beacons.
+-+ *
+-+ * @bcn: array of EMA beacons.
+-+ * @bcn.skb: the skb containing this specific beacon
+-+ * @bcn.offs: &struct ieee80211_mutable_offsets pointer to struct that will
+-+ *	receive the offsets that may be updated by the driver.
+-+ */
+-+struct ieee80211_ema_beacons {
+-+	u8 cnt;
+-+	struct {
+-+		struct sk_buff *skb;
+-+		struct ieee80211_mutable_offsets offs;
+-+	} bcn[];
+-+};
+-+
+-+/**
+-+ * ieee80211_beacon_get_template_ema_list - EMA beacon template generation
+-+ * @hw: pointer obtained from ieee80211_alloc_hw().
+-+ * @vif: &struct ieee80211_vif pointer from the add_interface callback.
+-+ * @link_id: the link id to which the beacon belongs (or 0 for a non-MLD AP)
+-+ *
+-+ * This function follows the same rules as ieee80211_beacon_get_template()
+-+ * but allocates and returns a pointer to list of all beacon templates required
+-+ * to cover all profiles in the multiple BSSID set. Each template includes only
+-+ * one multiple BSSID element.
+-+ *
+-+ * Driver must call ieee80211_beacon_free_ema_list() to free the memory.
+-+ *
+-+ * Return: EMA beacon templates of type struct ieee80211_ema_beacons *.
+-+ *	%NULL on error.
+-+ */
+-+struct ieee80211_ema_beacons *
+-+ieee80211_beacon_get_template_ema_list(struct ieee80211_hw *hw,
+-+				       struct ieee80211_vif *vif,
+-+				       unsigned int link_id);
+-+
+-+/**
+-+ * ieee80211_beacon_free_ema_list - free an EMA beacon template list
+-+ * @ema_beacons: list of EMA beacons of type &struct ieee80211_ema_beacons pointers.
+-+ *
+-+ * This function will free a list previously acquired by calling
+-+ * ieee80211_beacon_get_template_ema_list()
+-+ */
+-+void ieee80211_beacon_free_ema_list(struct ieee80211_ema_beacons *ema_beacons);
+-+
+-+/**
+-  * ieee80211_beacon_get_tim - beacon generation function
+-  * @hw: pointer obtained from ieee80211_alloc_hw().
+-  * @vif: &struct ieee80211_vif pointer from the add_interface callback.
+---- a/net/mac80211/cfg.c
+-+++ b/net/mac80211/cfg.c
+-@@ -1122,11 +1122,11 @@ static int ieee80211_assign_beacon(struc
+- 	if (params->mbssid_ies) {
+- 		mbssid = params->mbssid_ies;
+- 		size += struct_size(new->mbssid_ies, elem, mbssid->cnt);
+--		size += ieee80211_get_mbssid_beacon_len(mbssid);
+-+		size += ieee80211_get_mbssid_beacon_len(mbssid, mbssid->cnt);
+- 	} else if (old && old->mbssid_ies) {
+- 		mbssid = old->mbssid_ies;
+- 		size += struct_size(new->mbssid_ies, elem, mbssid->cnt);
+--		size += ieee80211_get_mbssid_beacon_len(mbssid);
+-+		size += ieee80211_get_mbssid_beacon_len(mbssid, mbssid->cnt);
+- 	}
+- 
+- 	new = kzalloc(size, GFP_KERNEL);
+-@@ -3384,8 +3384,11 @@ cfg80211_beacon_dup(struct cfg80211_beac
+- 
+- 	len = beacon->head_len + beacon->tail_len + beacon->beacon_ies_len +
+- 	      beacon->proberesp_ies_len + beacon->assocresp_ies_len +
+--	      beacon->probe_resp_len + beacon->lci_len + beacon->civicloc_len +
+--	      ieee80211_get_mbssid_beacon_len(beacon->mbssid_ies);
+-+	      beacon->probe_resp_len + beacon->lci_len + beacon->civicloc_len;
+-+
+-+	if (beacon->mbssid_ies)
+-+		len += ieee80211_get_mbssid_beacon_len(beacon->mbssid_ies,
+-+						       beacon->mbssid_ies->cnt);
+- 
+- 	new_beacon = kzalloc(sizeof(*new_beacon) + len, GFP_KERNEL);
+- 	if (!new_beacon)
+---- a/net/mac80211/ieee80211_i.h
+-+++ b/net/mac80211/ieee80211_i.h
+-@@ -1182,13 +1182,17 @@ ieee80211_vif_get_shift(struct ieee80211
+- }
+- 
+- static inline int
+--ieee80211_get_mbssid_beacon_len(struct cfg80211_mbssid_elems *elems)
+-+ieee80211_get_mbssid_beacon_len(struct cfg80211_mbssid_elems *elems, u8 i)
+- {
+--	int i, len = 0;
+-+	int len = 0;
+- 
+--	if (!elems)
+-+	if (!elems || !elems->cnt || i > elems->cnt)
+- 		return 0;
+- 
+-+	if (i < elems->cnt)
+-+		return elems->elem[i].len;
+-+
+-+	/* i == elems->cnt, calculate total length of all MBSSID elements */
+- 	for (i = 0; i < elems->cnt; i++)
+- 		len += elems->elem[i].len;
+- 
+---- a/net/mac80211/tx.c
+-+++ b/net/mac80211/tx.c
+-@@ -5205,13 +5205,20 @@ ieee80211_beacon_get_finish(struct ieee8
+- }
+- 
+- static void
+--ieee80211_beacon_add_mbssid(struct sk_buff *skb, struct beacon_data *beacon)
+-+ieee80211_beacon_add_mbssid(struct sk_buff *skb, struct beacon_data *beacon,
+-+			    u8 i)
+- {
+--	int i;
+-+	if (!beacon->mbssid_ies || !beacon->mbssid_ies->cnt ||
+-+	    i > beacon->mbssid_ies->cnt)
+-+		return;
+- 
+--	if (!beacon->mbssid_ies)
+-+	if (i < beacon->mbssid_ies->cnt) {
+-+		skb_put_data(skb, beacon->mbssid_ies->elem[i].data,
+-+			     beacon->mbssid_ies->elem[i].len);
+- 		return;
+-+	}
+- 
+-+	/* i == beacon->mbssid_ies->cnt, include all MBSSID elements */
+- 	for (i = 0; i < beacon->mbssid_ies->cnt; i++)
+- 		skb_put_data(skb, beacon->mbssid_ies->elem[i].data,
+- 			     beacon->mbssid_ies->elem[i].len);
+-@@ -5224,7 +5231,8 @@ ieee80211_beacon_get_ap(struct ieee80211
+- 			struct ieee80211_mutable_offsets *offs,
+- 			bool is_template,
+- 			struct beacon_data *beacon,
+--			struct ieee80211_chanctx_conf *chanctx_conf)
+-+			struct ieee80211_chanctx_conf *chanctx_conf,
+-+			u8 ema_index)
+- {
+- 	struct ieee80211_local *local = hw_to_local(hw);
+- 	struct ieee80211_sub_if_data *sdata = vif_to_sdata(vif);
+-@@ -5243,7 +5251,9 @@ ieee80211_beacon_get_ap(struct ieee80211
+- 	/* headroom, head length,
+- 	 * tail length, maximum TIM length and multiple BSSID length
+- 	 */
+--	mbssid_len = ieee80211_get_mbssid_beacon_len(beacon->mbssid_ies);
+-+	mbssid_len = ieee80211_get_mbssid_beacon_len(beacon->mbssid_ies,
+-+						     ema_index);
+-+
+- 	skb = dev_alloc_skb(local->tx_headroom + beacon->head_len +
+- 			    beacon->tail_len + 256 +
+- 			    local->hw.extra_beacon_tailroom + mbssid_len);
+-@@ -5261,7 +5271,7 @@ ieee80211_beacon_get_ap(struct ieee80211
+- 		offs->cntdwn_counter_offs[0] = beacon->cntdwn_counter_offsets[0];
+- 
+- 		if (mbssid_len) {
+--			ieee80211_beacon_add_mbssid(skb, beacon);
+-+			ieee80211_beacon_add_mbssid(skb, beacon, ema_index);
+- 			offs->mbssid_off = skb->len - mbssid_len;
+- 		}
+- 
+-@@ -5280,12 +5290,51 @@ ieee80211_beacon_get_ap(struct ieee80211
+- 	return skb;
+- }
+- 
+-+static struct ieee80211_ema_beacons *
+-+ieee80211_beacon_get_ap_ema_list(struct ieee80211_hw *hw,
+-+				 struct ieee80211_vif *vif,
+-+				 struct ieee80211_link_data *link,
+-+				 struct ieee80211_mutable_offsets *offs,
+-+				 bool is_template, struct beacon_data *beacon,
+-+				 struct ieee80211_chanctx_conf *chanctx_conf)
+-+{
+-+	struct ieee80211_ema_beacons *ema = NULL;
+-+
+-+	if (!beacon->mbssid_ies || !beacon->mbssid_ies->cnt)
+-+		return NULL;
+-+
+-+	ema = kzalloc(struct_size(ema, bcn, beacon->mbssid_ies->cnt),
+-+		      GFP_ATOMIC);
+-+	if (!ema)
+-+		return NULL;
+-+
+-+	for (ema->cnt = 0; ema->cnt < beacon->mbssid_ies->cnt; ema->cnt++) {
+-+		ema->bcn[ema->cnt].skb =
+-+			ieee80211_beacon_get_ap(hw, vif, link,
+-+						&ema->bcn[ema->cnt].offs,
+-+						is_template, beacon,
+-+						chanctx_conf, ema->cnt);
+-+		if (!ema->bcn[ema->cnt].skb)
+-+			break;
+-+	}
+-+
+-+	if (ema->cnt == beacon->mbssid_ies->cnt)
+-+		return ema;
+-+
+-+	ieee80211_beacon_free_ema_list(ema);
+-+	return NULL;
+-+}
+-+
+-+#define IEEE80211_INCLUDE_ALL_MBSSID_ELEMS -1
+-+
+- static struct sk_buff *
+- __ieee80211_beacon_get(struct ieee80211_hw *hw,
+- 		       struct ieee80211_vif *vif,
+- 		       struct ieee80211_mutable_offsets *offs,
+- 		       bool is_template,
+--		       unsigned int link_id)
+-+		       unsigned int link_id,
+-+		       int ema_index,
+-+		       struct ieee80211_ema_beacons **ema_beacons)
+- {
+- 	struct ieee80211_local *local = hw_to_local(hw);
+- 	struct beacon_data *beacon = NULL;
+-@@ -5314,8 +5363,29 @@ __ieee80211_beacon_get(struct ieee80211_
+- 		if (!beacon)
+- 			goto out;
+- 
+--		skb = ieee80211_beacon_get_ap(hw, vif, link, offs, is_template,
+--					      beacon, chanctx_conf);
+-+		if (ema_beacons) {
+-+			*ema_beacons =
+-+				ieee80211_beacon_get_ap_ema_list(hw, vif, link,
+-+								 offs,
+-+								 is_template,
+-+								 beacon,
+-+								 chanctx_conf);
+-+		} else {
+-+			if (beacon->mbssid_ies && beacon->mbssid_ies->cnt) {
+-+				if (ema_index >= beacon->mbssid_ies->cnt)
+-+					goto out; /* End of MBSSID elements */
+-+
+-+				if (ema_index <= IEEE80211_INCLUDE_ALL_MBSSID_ELEMS)
+-+					ema_index = beacon->mbssid_ies->cnt;
+-+			} else {
+-+				ema_index = 0;
+-+			}
+-+
+-+			skb = ieee80211_beacon_get_ap(hw, vif, link, offs,
+-+						      is_template, beacon,
+-+						      chanctx_conf,
+-+						      ema_index);
+-+		}
+- 	} else if (sdata->vif.type == NL80211_IFTYPE_ADHOC) {
+- 		struct ieee80211_if_ibss *ifibss = &sdata->u.ibss;
+- 		struct ieee80211_hdr *hdr;
+-@@ -5403,10 +5473,50 @@ ieee80211_beacon_get_template(struct iee
+- 			      struct ieee80211_mutable_offsets *offs,
+- 			      unsigned int link_id)
+- {
+--	return __ieee80211_beacon_get(hw, vif, offs, true, link_id);
+-+	return __ieee80211_beacon_get(hw, vif, offs, true, link_id,
+-+				      IEEE80211_INCLUDE_ALL_MBSSID_ELEMS, NULL);
+- }
+- EXPORT_SYMBOL(ieee80211_beacon_get_template);
+- 
+-+struct sk_buff *
+-+ieee80211_beacon_get_template_ema_index(struct ieee80211_hw *hw,
+-+					struct ieee80211_vif *vif,
+-+					struct ieee80211_mutable_offsets *offs,
+-+					unsigned int link_id, u8 ema_index)
+-+{
+-+	return __ieee80211_beacon_get(hw, vif, offs, true, link_id, ema_index,
+-+				      NULL);
+-+}
+-+EXPORT_SYMBOL(ieee80211_beacon_get_template_ema_index);
+-+
+-+void ieee80211_beacon_free_ema_list(struct ieee80211_ema_beacons *ema_beacons)
+-+{
+-+	u8 i;
+-+
+-+	if (!ema_beacons)
+-+		return;
+-+
+-+	for (i = 0; i < ema_beacons->cnt; i++)
+-+		kfree_skb(ema_beacons->bcn[i].skb);
+-+
+-+	kfree(ema_beacons);
+-+}
+-+EXPORT_SYMBOL(ieee80211_beacon_free_ema_list);
+-+
+-+struct ieee80211_ema_beacons *
+-+ieee80211_beacon_get_template_ema_list(struct ieee80211_hw *hw,
+-+				       struct ieee80211_vif *vif,
+-+				       unsigned int link_id)
+-+{
+-+	struct ieee80211_ema_beacons *ema_beacons = NULL;
+-+
+-+	WARN_ON(__ieee80211_beacon_get(hw, vif, NULL, false, link_id, 0,
+-+				       &ema_beacons));
+-+
+-+	return ema_beacons;
+-+}
+-+EXPORT_SYMBOL(ieee80211_beacon_get_template_ema_list);
+-+
+- struct sk_buff *ieee80211_beacon_get_tim(struct ieee80211_hw *hw,
+- 					 struct ieee80211_vif *vif,
+- 					 u16 *tim_offset, u16 *tim_length,
+-@@ -5414,7 +5524,9 @@ struct sk_buff *ieee80211_beacon_get_tim
+- {
+- 	struct ieee80211_mutable_offsets offs = {};
+- 	struct sk_buff *bcn = __ieee80211_beacon_get(hw, vif, &offs, false,
+--						     link_id);
+-+						     link_id,
+-+						     IEEE80211_INCLUDE_ALL_MBSSID_ELEMS,
+-+						     NULL);
+- 	struct sk_buff *copy;
+- 	int shift;
+- 
+diff --git a/package/kernel/mac80211/patches/subsys/340-mac80211-always-use-mac80211-loss-detection.patch b/package/kernel/mac80211/patches/subsys/340-mac80211-always-use-mac80211-loss-detection.patch
+deleted file mode 100644
+index e084773fd9..0000000000
+--- a/package/kernel/mac80211/patches/subsys/340-mac80211-always-use-mac80211-loss-detection.patch
++++ /dev/null
+@@ -1,36 +0,0 @@
+-From cdf461888f900c3a149b10a04d72b4a590ecdec3 Mon Sep 17 00:00:00 2001
+-From: David Bauer <mail@david-bauer.net>
+-Date: Tue, 16 May 2023 23:11:32 +0200
+-Subject: [PATCH] mac80211: always use mac80211 loss detection
+-
+-ath10k does not report excessive loss in case of broken block-ack
+-sessions. The loss is communicated to the host-os, but ath10k does not
+-trigger a low-ack events by itself.
+-
+-The mac80211 framework for loss detection however detects this
+-circumstance well in case of ath10k. So use it regardless of ath10k's
+-own loss detection mechanism.
+-
+-Patching this in mac80211 does allow this hack to be used with any
+-flavor of ath10k/ath11k.
+-
+-Signed-off-by: David Bauer <mail@david-bauer.net>
+----
+- net/mac80211/status.c | 6 ------
+- 1 file changed, 6 deletions(-)
+-
+---- a/net/mac80211/status.c
+-+++ b/net/mac80211/status.c
+-@@ -794,12 +794,6 @@ static void ieee80211_lost_packet(struct
+- 	unsigned long pkt_time = STA_LOST_PKT_TIME;
+- 	unsigned int pkt_thr = STA_LOST_PKT_THRESHOLD;
+- 
+--	/* If driver relies on its own algorithm for station kickout, skip
+--	 * mac80211 packet loss mechanism.
+--	 */
+--	if (ieee80211_hw_check(&sta->local->hw, REPORTS_LOW_ACK))
+--		return;
+--
+- 	/* This packet was aggregated but doesn't carry status info */
+- 	if ((info->flags & IEEE80211_TX_CTL_AMPDU) &&
+- 	    !(info->flags & IEEE80211_TX_STAT_AMPDU))
+diff --git a/package/kernel/mac80211/patches/subsys/400-allow-ibss-mixed.patch b/package/kernel/mac80211/patches/subsys/400-allow-ibss-mixed.patch
+deleted file mode 100644
+index c38fa13f03..0000000000
+--- a/package/kernel/mac80211/patches/subsys/400-allow-ibss-mixed.patch
++++ /dev/null
+@@ -1,40 +0,0 @@
+-From: Hauke Mehrtens <hauke@hauke-m.de>
+-Date: Mon, 24 Feb 2020 00:00:00 +0100
+-Subject: [PATCH] mac80211: Allow IBSS mode and different beacon intervals
+-
+-ath10k-ct supports the combination to select IBSS (ADHOC) mode and
+-different beacon intervals together. mac80211 does not like this
+-combination, but Ben says this is ok, so remove this check.
+-
+-ath10k-ct starting with version 5.2 allows the combination of
+-NL80211_IFTYPE_ADHOC and beacon_int_min_gcd in ath10k_10x_ct_if_comb
+-which triggers this warning. Ben told me that this is not a big problem
+-and we should ignore this.
+----
+- net/wireless/core.c | 15 ---------------
+- 1 file changed, 15 deletions(-)
+-
+---- a/net/wireless/core.c
+-+++ b/net/wireless/core.c
+-@@ -614,21 +614,6 @@ static int wiphy_verify_combinations(str
+- 				    c->limits[j].max > 1))
+- 				return -EINVAL;
+- 
+--			/*
+--			 * This isn't well-defined right now. If you have an
+--			 * IBSS interface, then its beacon interval may change
+--			 * by joining other networks, and nothing prevents it
+--			 * from doing that.
+--			 * So technically we probably shouldn't even allow AP
+--			 * and IBSS in the same interface, but it seems that
+--			 * some drivers support that, possibly only with fixed
+--			 * beacon intervals for IBSS.
+--			 */
+--			if (WARN_ON(types & BIT(NL80211_IFTYPE_ADHOC) &&
+--				    c->beacon_int_min_gcd)) {
+--				return -EINVAL;
+--			}
+--
+- 			cnt += c->limits[j].max;
+- 			/*
+- 			 * Don't advertise an unsupported type
+diff --git a/package/kernel/mac80211/patches/subsys/500-mac80211_configure_antenna_gain.patch b/package/kernel/mac80211/patches/subsys/500-mac80211_configure_antenna_gain.patch
+deleted file mode 100644
+index 4a3984fb42..0000000000
+--- a/package/kernel/mac80211/patches/subsys/500-mac80211_configure_antenna_gain.patch
++++ /dev/null
+@@ -1,162 +0,0 @@
+---- a/include/net/cfg80211.h
+-+++ b/include/net/cfg80211.h
+-@@ -4081,6 +4081,7 @@ struct mgmt_frame_regs {
+-  *	(as advertised by the nl80211 feature flag.)
+-  * @get_tx_power: store the current TX power into the dbm variable;
+-  *	return 0 if successful
+-+ * @set_antenna_gain: set antenna gain to reduce maximum tx power if necessary
+-  *
+-  * @rfkill_poll: polls the hw rfkill line, use cfg80211 reporting
+-  *	functions to adjust rfkill hw state
+-@@ -4431,6 +4432,7 @@ struct cfg80211_ops {
+- 				enum nl80211_tx_power_setting type, int mbm);
+- 	int	(*get_tx_power)(struct wiphy *wiphy, struct wireless_dev *wdev,
+- 				int *dbm);
+-+	int	(*set_antenna_gain)(struct wiphy *wiphy, int dbi);
+- 
+- 	void	(*rfkill_poll)(struct wiphy *wiphy);
+- 
+---- a/include/net/mac80211.h
+-+++ b/include/net/mac80211.h
+-@@ -1677,6 +1677,7 @@ enum ieee80211_smps_mode {
+-  *
+-  * @power_level: requested transmit power (in dBm), backward compatibility
+-  *	value only that is set to the minimum of all interfaces
+-+ * @max_antenna_gain: maximum antenna gain adjusted by user config (in dBi)
+-  *
+-  * @chandef: the channel definition to tune to
+-  * @radar_enabled: whether radar detection is enabled
+-@@ -1697,6 +1698,7 @@ enum ieee80211_smps_mode {
+- struct ieee80211_conf {
+- 	u32 flags;
+- 	int power_level, dynamic_ps_timeout;
+-+	int max_antenna_gain;
+- 
+- 	u16 listen_interval;
+- 	u8 ps_dtim_period;
+---- a/include/uapi/linux/nl80211.h
+-+++ b/include/uapi/linux/nl80211.h
+-@@ -2749,6 +2749,9 @@ enum nl80211_commands {
+-  *	When used with %NL80211_CMD_FRAME_TX_STATUS, indicates the ack RX
+-  *	timestamp. When used with %NL80211_CMD_FRAME RX notification, indicates
+-  *	the incoming frame RX timestamp.
+-+ * @NL80211_ATTR_WIPHY_ANTENNA_GAIN: Configured antenna gain. Used to reduce
+-+ *	transmit power to stay within regulatory limits. u32, dBi.
+-+ *
+-  * @NUM_NL80211_ATTR: total number of nl80211_attrs available
+-  * @NL80211_ATTR_MAX: highest attribute number currently defined
+-  * @__NL80211_ATTR_AFTER_LAST: internal use
+-@@ -3277,6 +3280,8 @@ enum nl80211_attrs {
+- 	NL80211_ATTR_TX_HW_TIMESTAMP,
+- 	NL80211_ATTR_RX_HW_TIMESTAMP,
+- 
+-+	NL80211_ATTR_WIPHY_ANTENNA_GAIN,
+-+
+- 	/* add attributes here, update the policy in nl80211.c */
+- 
+- 	__NL80211_ATTR_AFTER_LAST,
+---- a/net/mac80211/cfg.c
+-+++ b/net/mac80211/cfg.c
+-@@ -3046,6 +3046,19 @@ static int ieee80211_get_tx_power(struct
+- 	return 0;
+- }
+- 
+-+static int ieee80211_set_antenna_gain(struct wiphy *wiphy, int dbi)
+-+{
+-+	struct ieee80211_local *local = wiphy_priv(wiphy);
+-+
+-+	if (dbi < 0)
+-+		return -EINVAL;
+-+
+-+	local->user_antenna_gain = dbi;
+-+	ieee80211_hw_config(local, 0);
+-+
+-+	return 0;
+-+}
+-+
+- static void ieee80211_rfkill_poll(struct wiphy *wiphy)
+- {
+- 	struct ieee80211_local *local = wiphy_priv(wiphy);
+-@@ -4956,6 +4969,7 @@ const struct cfg80211_ops mac80211_confi
+- 	.set_wiphy_params = ieee80211_set_wiphy_params,
+- 	.set_tx_power = ieee80211_set_tx_power,
+- 	.get_tx_power = ieee80211_get_tx_power,
+-+	.set_antenna_gain = ieee80211_set_antenna_gain,
+- 	.rfkill_poll = ieee80211_rfkill_poll,
+- 	CFG80211_TESTMODE_CMD(ieee80211_testmode_cmd)
+- 	CFG80211_TESTMODE_DUMP(ieee80211_testmode_dump)
+---- a/net/mac80211/ieee80211_i.h
+-+++ b/net/mac80211/ieee80211_i.h
+-@@ -1542,6 +1542,7 @@ struct ieee80211_local {
+- 	int dynamic_ps_forced_timeout;
+- 
+- 	int user_power_level; /* in dBm, for all interfaces */
+-+	int user_antenna_gain; /* in dBi */
+- 
+- 	enum ieee80211_smps_mode smps_mode;
+- 
+---- a/net/mac80211/main.c
+-+++ b/net/mac80211/main.c
+-@@ -96,7 +96,7 @@ static u32 ieee80211_hw_conf_chan(struct
+- 	struct ieee80211_sub_if_data *sdata;
+- 	struct cfg80211_chan_def chandef = {};
+- 	u32 changed = 0;
+--	int power;
+-+	int power, max_power;
+- 	u32 offchannel_flag;
+- 
+- 	offchannel_flag = local->hw.conf.flags & IEEE80211_CONF_OFFCHANNEL;
+-@@ -157,6 +157,12 @@ static u32 ieee80211_hw_conf_chan(struct
+- 	}
+- 	rcu_read_unlock();
+- 
+-+	max_power = chandef.chan->max_reg_power;
+-+	if (local->user_antenna_gain > 0) {
+-+		max_power -= local->user_antenna_gain;
+-+		power = min(power, max_power);
+-+	}
+-+
+- 	if (local->hw.conf.power_level != power) {
+- 		changed |= IEEE80211_CONF_CHANGE_POWER;
+- 		local->hw.conf.power_level = power;
+-@@ -762,6 +768,7 @@ struct ieee80211_hw *ieee80211_alloc_hw_
+- 					 IEEE80211_RADIOTAP_MCS_HAVE_BW;
+- 	local->hw.radiotap_vht_details = IEEE80211_RADIOTAP_VHT_KNOWN_GI |
+- 					 IEEE80211_RADIOTAP_VHT_KNOWN_BANDWIDTH;
+-+	local->user_antenna_gain = 0;
+- 	local->hw.uapsd_queues = IEEE80211_DEFAULT_UAPSD_QUEUES;
+- 	local->hw.uapsd_max_sp_len = IEEE80211_DEFAULT_MAX_SP_LEN;
+- 	local->hw.max_mtu = IEEE80211_MAX_DATA_LEN;
+---- a/net/wireless/nl80211.c
+-+++ b/net/wireless/nl80211.c
+-@@ -799,6 +799,7 @@ static const struct nla_policy nl80211_p
+- 	[NL80211_ATTR_MLD_ADDR] = NLA_POLICY_EXACT_LEN(ETH_ALEN),
+- 	[NL80211_ATTR_MLO_SUPPORT] = { .type = NLA_FLAG },
+- 	[NL80211_ATTR_MAX_NUM_AKM_SUITES] = { .type = NLA_REJECT },
+-+	[NL80211_ATTR_WIPHY_ANTENNA_GAIN] = { .type = NLA_U32 },
+- };
+- 
+- /* policy for the key attributes */
+-@@ -3511,6 +3512,22 @@ static int nl80211_set_wiphy(struct sk_b
+- 		if (result)
+- 			goto out;
+- 	}
+-+
+-+	if (info->attrs[NL80211_ATTR_WIPHY_ANTENNA_GAIN]) {
+-+		int idx, dbi = 0;
+-+
+-+		if (!rdev->ops->set_antenna_gain) {
+-+			result = -EOPNOTSUPP;
+-+			goto out;
+-+		}
+-+
+-+		idx = NL80211_ATTR_WIPHY_ANTENNA_GAIN;
+-+		dbi = nla_get_u32(info->attrs[idx]);
+-+
+-+		result = rdev->ops->set_antenna_gain(&rdev->wiphy, dbi);
+-+		if (result)
+-+			goto out;
+-+	}
+- 
+- 	if (info->attrs[NL80211_ATTR_WIPHY_TX_POWER_SETTING]) {
+- 		struct wireless_dev *txp_wdev = wdev;
+diff --git a/package/kernel/mac80211/patches/subsys/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch b/package/kernel/mac80211/patches/subsys/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch
+deleted file mode 100644
+index 26af6a2fb9..0000000000
+--- a/package/kernel/mac80211/patches/subsys/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch
++++ /dev/null
+@@ -1,29 +0,0 @@
+---- a/backport-include/linux/of_net.h
+-+++ /dev/null
+-@@ -1,26 +0,0 @@
+--#ifndef _BP_OF_NET_H
+--#define _BP_OF_NET_H
+--#include_next <linux/of_net.h>
+--#include <linux/version.h>
+--#include <linux/etherdevice.h>
+--
+--/* The behavior of of_get_mac_address() changed in kernel 5.2, it now
+-- * returns an error code and not NULL in case of an error.
+-- */
+--#if LINUX_VERSION_IS_LESS(5,13,0)
+--static inline int backport_of_get_mac_address(struct device_node *np, u8 *mac_out)
+--{
+--	const void *mac = of_get_mac_address(np);
+--
+--	if (!mac)
+--		return -ENODEV;
+--	if (IS_ERR(mac))
+--		return PTR_ERR(mac);
+--	ether_addr_copy(mac_out, mac);
+--	
+--	return 0;
+--}
+--#define of_get_mac_address LINUX_BACKPORT(of_get_mac_address)
+--#endif /* < 5.2 */
+--
+--#endif /* _BP_OF_NET_H */
+diff --git a/package/kernel/mac80211/ralink.mk b/package/kernel/mac80211/ralink.mk
+deleted file mode 100644
+index 83d208ee1a..0000000000
+--- a/package/kernel/mac80211/ralink.mk
++++ /dev/null
+@@ -1,131 +0,0 @@
+-PKG_DRIVERS += \
+-	rt2x00-lib rt2x00-pci rt2x00-usb rt2x00-mmio \
+-	rt2800-lib rt2800-mmio rt2800-pci rt2800-soc rt2800-usb
+-
+-PKG_CONFIG_DEPENDS += \
+-	CONFIG_PACKAGE_RT2X00_LIB_DEBUGFS \
+-	CONFIG_PACKAGE_RT2X00_DEBUG
+-
+-config-$(call config_package,rt2x00-lib) += RT2X00 RT2X00_LIB
+-config-$(call config_package,rt2x00-pci) += RT2X00_LIB_PCI
+-config-$(call config_package,rt2x00-mmio) += RT2X00_LIB_MMIO
+-config-$(call config_package,rt2x00-usb) += RT2X00_LIB_USB
+-config-$(CONFIG_PACKAGE_RT2X00_LIB_DEBUGFS) += RT2X00_LIB_DEBUGFS
+-config-$(CONFIG_PACKAGE_RT2X00_DEBUG) += RT2X00_DEBUG
+-
+-config-$(call config_package,rt2400-pci) += RT2400PCI
+-config-$(call config_package,rt2500-pci) += RT2500PCI
+-config-$(call config_package,rt2500-usb) += RT2500USB
+-config-$(call config_package,rt61-pci) += RT61PCI
+-config-$(call config_package,rt73-usb) += RT73USB
+-
+-config-$(call config_package,rt2800-lib) += RT2800_LIB
+-
+-config-$(call config_package,rt2800-soc) += RT2800SOC
+-config-$(call config_package,rt2800-pci) += RT2800PCI
+-config-y += RT2800PCI_RT33XX RT2800PCI_RT35XX RT2800PCI_RT53XX RT2800PCI_RT3290
+-
+-config-$(call config_package,rt2800-usb) += RT2800USB
+-config-y += RT2800USB_RT33XX RT2800USB_RT35XX RT2800USB_RT3573 RT2800USB_RT53XX RT2800USB_RT55XX RT2800USB_UNKNOWN
+-
+-define KernelPackage/rt2x00/Default
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Ralink Drivers for RT2x00 cards
+-endef
+-
+-define KernelPackage/rt2x00-lib
+-$(call KernelPackage/rt2x00/Default)
+-  DEPENDS+= @(PCI_SUPPORT||USB_SUPPORT||TARGET_ramips) +kmod-mac80211
+-  TITLE+= (LIB)
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2x00lib.ko
+-  MENU:=1
+-endef
+-
+-define KernelPackage/rt2x00-lib/config
+-  if PACKAGE_kmod-rt2x00-lib
+-
+-	config PACKAGE_RT2X00_LIB_DEBUGFS
+-		bool "Enable rt2x00 debugfs support"
+-		depends on PACKAGE_MAC80211_DEBUGFS
+-		help
+-		  Enable creation of debugfs files for the rt2x00 drivers.
+-		  These debugfs files support both reading and writing of the
+-		  most important register types of the rt2x00 hardware.
+-
+-	config PACKAGE_RT2X00_DEBUG
+-		bool "Enable rt2x00 debug output"
+-		help
+-		  Enable debugging output for all rt2x00 modules
+-
+-  endif
+-endef
+-
+-define KernelPackage/rt2x00-mmio
+-$(call KernelPackage/rt2x00/Default)
+-  DEPENDS+= @(PCI_SUPPORT||TARGET_ramips) +kmod-rt2x00-lib
+-  HIDDEN:=1
+-  TITLE+= (MMIO)
+-  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2x00mmio.ko
+-endef
+-
+-define KernelPackage/rt2x00-pci
+-$(call KernelPackage/rt2x00/Default)
+-  DEPENDS+= @PCI_SUPPORT +kmod-rt2x00-mmio +kmod-rt2x00-lib
+-  HIDDEN:=1
+-  TITLE+= (PCI)
+-  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2x00pci.ko
+-  AUTOLOAD:=$(call AutoProbe,rt2x00pci)
+-endef
+-
+-define KernelPackage/rt2x00-usb
+-$(call KernelPackage/rt2x00/Default)
+-  DEPENDS+= @USB_SUPPORT +kmod-rt2x00-lib +kmod-usb-core
+-  HIDDEN:=1
+-  TITLE+= (USB)
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2x00usb.ko
+-  AUTOLOAD:=$(call AutoProbe,rt2x00usb)
+-endef
+-
+-define KernelPackage/rt2800-lib
+-$(call KernelPackage/rt2x00/Default)
+-  DEPENDS+= @(PCI_SUPPORT||USB_SUPPORT||TARGET_ramips) +kmod-rt2x00-lib +kmod-lib-crc-ccitt
+-  HIDDEN:=1
+-  TITLE+= (rt2800 LIB)
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2800lib.ko
+-endef
+-
+-define KernelPackage/rt2800-mmio
+-$(call KernelPackage/rt2x00/Default)
+-  TITLE += (RT28xx/RT3xxx MMIO)
+-  DEPENDS += +kmod-rt2800-lib +kmod-rt2x00-mmio
+-  HIDDEN:=1
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2800mmio.ko
+-endef
+-
+-define KernelPackage/rt2800-soc
+-$(call KernelPackage/rt2x00/Default)
+-  DEPENDS += @(TARGET_ramips_rt288x||TARGET_ramips_rt305x||TARGET_ramips_rt3883||TARGET_ramips_mt7620) +kmod-rt2800-mmio +kmod-rt2800-lib
+-  TITLE += (RT28xx/RT3xxx SoC)
+-  FILES := \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2x00soc.ko \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2800soc.ko
+-  AUTOLOAD:=$(call AutoProbe,rt2800soc)
+-endef
+-
+-define KernelPackage/rt2800-pci
+-$(call KernelPackage/rt2x00/Default)
+-  DEPENDS+= @PCI_SUPPORT +kmod-rt2x00-pci +kmod-rt2800-lib +kmod-rt2800-mmio +kmod-eeprom-93cx6 +rt2800-pci-firmware
+-  TITLE+= (RT2860 PCI)
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2800pci.ko
+-  AUTOLOAD:=$(call AutoProbe,rt2800pci)
+-endef
+-
+-define KernelPackage/rt2800-usb
+-$(call KernelPackage/rt2x00/Default)
+-  DEPENDS+= @USB_SUPPORT +kmod-rt2x00-usb +kmod-rt2800-lib +kmod-lib-crc-ccitt +rt2800-usb-firmware
+-  TITLE+= (RT2870 USB)
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2800usb.ko
+-  AUTOLOAD:=$(call AutoProbe,rt2800usb)
+-endef
+-
+-
+diff --git a/package/kernel/mac80211/realtek.mk b/package/kernel/mac80211/realtek.mk
+deleted file mode 100644
+index 9c14358326..0000000000
+--- a/package/kernel/mac80211/realtek.mk
++++ /dev/null
+@@ -1,197 +0,0 @@
+-PKG_DRIVERS += \
+-	rtlwifi rtlwifi-pci rtlwifi-btcoexist rtlwifi-usb rtl8192c-common \
+-	rtl8192ce rtl8192se rtl8192de rtl8192cu rtl8723bs rtl8821ae \
+-	rtl8xxxu rtw88
+-
+-config-$(call config_package,rtlwifi) += RTL_CARDS RTLWIFI
+-config-$(call config_package,rtlwifi-pci) += RTLWIFI_PCI
+-config-$(call config_package,rtlwifi-btcoexist) += RTLBTCOEXIST
+-config-$(call config_package,rtlwifi-usb) += RTLWIFI_USB
+-config-$(call config_package,rtl8192c-common) += RTL8192C_COMMON
+-config-$(call config_package,rtl8192ce) += RTL8192CE
+-config-$(call config_package,rtl8192se) += RTL8192SE
+-config-$(call config_package,rtl8192de) += RTL8192DE
+-config-$(call config_package,rtl8192cu) += RTL8192CU
+-config-$(call config_package,rtl8821ae) += RTL8821AE
+-config-$(CONFIG_PACKAGE_RTLWIFI_DEBUG) += RTLWIFI_DEBUG
+-
+-config-$(call config_package,rtl8xxxu) += RTL8XXXU
+-config-y += RTL8XXXU_UNTESTED
+-
+-config-$(call config_package,rtl8723bs) += RTL8723BS
+-config-y += STAGING
+-
+-config-$(call config_package,rtw88) += RTW88 RTW88_CORE RTW88_PCI
+-config-y += RTW88_8822BE RTW88_8822CE RTW88_8723DE
+-config-$(CONFIG_PACKAGE_RTW88_DEBUG) += RTW88_DEBUG
+-config-$(CONFIG_PACKAGE_RTW88_DEBUGFS) += RTW88_DEBUGFS
+-
+-define KernelPackage/rtlwifi/config
+-	config PACKAGE_RTLWIFI_DEBUG
+-		bool "Realtek wireless debugging"
+-		depends on PACKAGE_kmod-rtlwifi
+-		help
+-		  Say Y, if you want to debug realtek wireless drivers.
+-
+-endef
+-
+-define KernelPackage/rtlwifi
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Realtek common driver part
+-  DEPENDS+= @(PCI_SUPPORT||USB_SUPPORT) +kmod-mac80211
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtlwifi.ko
+-  HIDDEN:=1
+-endef
+-
+-define KernelPackage/rtlwifi-pci
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Realtek common driver part (PCI support)
+-  DEPENDS+= @PCI_SUPPORT +kmod-rtlwifi
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtl_pci.ko
+-  AUTOLOAD:=$(call AutoProbe,rtl_pci)
+-  HIDDEN:=1
+-endef
+-
+-define KernelPackage/rtlwifi-btcoexist
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Realtek BT coexist support
+-  DEPENDS+= +kmod-rtlwifi
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/btcoexist/btcoexist.ko
+-  AUTOLOAD:=$(call AutoProbe,btcoexist)
+-  HIDDEN:=1
+-endef
+-
+-define KernelPackage/rtlwifi-usb
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Realtek common driver part (USB support)
+-  DEPENDS+= @USB_SUPPORT +kmod-usb-core +kmod-rtlwifi
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtl_usb.ko
+-  AUTOLOAD:=$(call AutoProbe,rtl_usb)
+-  HIDDEN:=1
+-endef
+-
+-define KernelPackage/rtl8192c-common
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Realtek RTL8192CE/RTL8192CU common support module
+-  DEPENDS+= +kmod-rtlwifi
+-  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtl8192c/rtl8192c-common.ko
+-  HIDDEN:=1
+-endef
+-
+-define KernelPackage/rtl8192ce
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Realtek RTL8192CE/RTL8188CE support
+-  DEPENDS+= +kmod-rtlwifi-pci +kmod-rtl8192c-common +rtl8192ce-firmware
+-  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/rtl8192ce.ko
+-  AUTOLOAD:=$(call AutoProbe,rtl8192ce)
+-endef
+-
+-define KernelPackage/rtl8192se
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Realtek RTL8192SE/RTL8191SE support
+-  DEPENDS+= +kmod-rtlwifi-pci +rtl8192se-firmware
+-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtl8192se/rtl8192se.ko
+-  AUTOLOAD:=$(call AutoProbe,rtl8192se)
+-endef
+-
+-define KernelPackage/rtl8192de
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Realtek RTL8192DE/RTL8188DE support
+-  DEPENDS+= +kmod-rtlwifi-pci +rtl8192de-firmware
+-  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtl8192de/rtl8192de.ko
+-  AUTOLOAD:=$(call AutoProbe,rtl8192de)
+-endef
+-
+-define KernelPackage/rtl8192cu
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Realtek RTL8192CU/RTL8188CU support
+-  DEPENDS+= +kmod-rtlwifi-usb +kmod-rtl8192c-common +rtl8192cu-firmware
+-  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/rtl8192cu.ko
+-  AUTOLOAD:=$(call AutoProbe,rtl8192cu)
+-endef
+-
+-define KernelPackage/rtl8821ae
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Realtek RTL8821AE support
+-  DEPENDS+= +kmod-rtlwifi-btcoexist +kmod-rtlwifi-pci +rtl8821ae-firmware
+-  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/rtl8821ae.ko
+-  AUTOLOAD:=$(call AutoProbe,rtl8821ae)
+-endef
+-
+-define KernelPackage/rtl8xxxu
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=alternative Realtek RTL8XXXU support
+-  DEPENDS+= @USB_SUPPORT +kmod-usb-core +kmod-mac80211
+-  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.ko
+-  AUTOLOAD:=$(call AutoProbe,rtl8xxxu)
+-endef
+-
+-define KernelPackage/rtl8xxxu/description
+-  This is an alternative driver for various Realtek RTL8XXX
+-  parts written to utilize the Linux mac80211 stack.
+-  The driver is known to work with a number of RTL8723AU,
+-  RL8188CU, RTL8188RU, RTL8191CU, and RTL8192CU devices
+-
+-  This driver is under development and has a limited feature
+-  set. In particular it does not yet support 40MHz channels
+-  and power management. However it should have a smaller
+-  memory footprint than the vendor drivers and benetifs
+-  from the in kernel mac80211 stack.
+-
+-  It can coexist with drivers from drivers/staging/rtl8723au,
+-  drivers/staging/rtl8192u, and drivers/net/wireless/rtlwifi,
+-  but you will need to control which module you wish to load.
+-
+-  RTL8XXXU_UNTESTED is enabled
+-  This option enables detection of Realtek 8723/8188/8191/8192 WiFi
+-  USB devices which have not been tested directly by the driver
+-  author or reported to be working by third parties.
+-
+-  Please report your results!
+-endef
+-
+-define KernelPackage/rtw88/config
+-	config PACKAGE_RTW88_DEBUG
+-		bool "Realtek wireless debugging (rtw88)"
+-		depends on PACKAGE_kmod-rtw88
+-		help
+-		  Enable debugging output for rtw88 devices
+-
+-	config PACKAGE_RTW88_DEBUGFS
+-		bool "Enable rtw88 debugfS support"
+-		select KERNEL_DEBUG_FS
+-		depends on PACKAGE_kmod-rtw88
+-		help
+-		  Select this to see extensive information about
+-		  the internal state of rtw88 in debugfs.
+-endef
+-
+-define KernelPackage/rtw88
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Realtek RTL8822BE/RTL8822CE/RTL8723DE
+-  DEPENDS+= @(PCI_SUPPORT) +kmod-mac80211 +@DRIVER_11AC_SUPPORT
+-  FILES:=\
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822be.ko \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822b.ko \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822ce.ko \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822c.ko \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8723de.ko \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8723d.ko \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_core.ko \
+-	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_pci.ko
+-  AUTOLOAD:=$(call AutoProbe,rtw88_8822be rtw88_8822ce rtw88_8723de)
+-endef
+-
+-define KernelPackage/rtl8723bs
+-  $(call KernelPackage/mac80211/Default)
+-  TITLE:=Realtek RTL8723BS SDIO Wireless LAN NIC driver (staging)
+-  DEPENDS+=+kmod-mmc +kmod-mac80211
+-  FILES:=$(PKG_BUILD_DIR)/drivers/staging/rtl8723bs/r8723bs.ko
+-  AUTOLOAD:=$(call AutoProbe,r8723bs)
+-endef
+-
+-define KernelPackage/rtl8723bs/description
+- This option enables support for RTL8723BS SDIO drivers, such as the wifi found
+- on the 1st gen Intel Compute Stick, the CHIP and many other Intel Atom and ARM
+- based devices.
+-endef
+diff --git a/package/kernel/mac80211/scripts/import-backports.sh b/package/kernel/mac80211/scripts/import-backports.sh
+deleted file mode 100755
+index 35aa411e6c..0000000000
+--- a/package/kernel/mac80211/scripts/import-backports.sh
++++ /dev/null
+@@ -1,109 +0,0 @@
+-#!/usr/bin/env bash
+-BASE=$1; shift
+-
+-usage() {
+-	echo "Usage: $0 NNN <file>..."
+-	exit 1
+-}
+-
+-check_number() {
+-	case "$1" in
+-		[0-9][0-9][0-9]) return 0;;
+-	esac
+-	return 1;
+-}
+-
+-patch_header()
+-{
+-	awk '
+-	/^(---|\*\*\*|Index:)[ \t][^ \t]|^diff -/ \
+-		{ exit }
+-		{ print }
+-	'
+-}
+-
+-strip_diffstat()
+-{
+-	awk '
+-	/#? .* \| / \
+-		{ eat = eat $0 "\n"
+-		  next }
+-	/^#? .* files? changed(, .* insertions?\(\+\))?(, .* deletions?\(-\))?/ \
+-		{ eat = ""
+-		  next }
+-		{ print eat $0
+-		  eat = "" }
+-	'
+-}
+-
+-strip_trailing_whitespace() {
+-	sed -e 's:[ '$'\t'']*$::'
+-}
+-
+-fixup_header() {
+-	awk '
+-		/^From / { next }
+-		/^Subject: / {
+-			sub("Subject: \\[[^\]]*\\]", "Subject: [PATCH]")
+-		}
+-		{ print }
+-	'
+-}
+-
+-check_number "$BASE" || usage
+-
+-quilt series > /dev/null || {
+-	echo "Not in quilt directory"
+-	exit 2
+-}
+-
+-get_next() {
+-	NEW=$BASE
+-	quilt series | while read CUR; do
+-		[ -n "$CUR" ] || break
+-		CUR=${CUR%%-*}
+-		check_number "$CUR" || continue
+-		[ "$CUR" -lt "$NEW" ] && continue
+-		[ "$CUR" -ge "$(($BASE + 100))" ] && continue
+-		NEW="$(($CUR + 1))"
+-		echo $NEW
+-	done | tail -n1
+-}
+-
+-CUR=$(get_next)
+-CUR="${CUR:-$BASE}"
+-
+-while [ -n "$1" ]; do
+-	FILE="$1"; shift
+-	NAME="$(basename $FILE)"
+-	NAME="${NAME#[0-9]*-}"
+-	echo -n "Processing patch $NAME: "
+-
+-	[ -e "$FILE" ] || {
+-		echo "file $FILE not found"
+-		exit 1
+-	}
+-
+-	grep -qE "$NAME$" patches/series && {
+-		echo "already applied"
+-		continue
+-	}
+-
+-	quilt new "$CUR-$NAME" || exit 1
+-	patch_header < "$FILE" |
+-		strip_diffstat |
+-		strip_trailing_whitespace |
+-		fixup_header > "patches/$CUR-$NAME"
+-
+-	quilt fold < "$FILE" || {
+-		cp "$FILE" ./cur_patch
+-		echo "patch $FILE failed to apply, copied to ./cur_patch"
+-		exit 1
+-	}
+-
+-	quilt refresh -p ab --no-index --no-timestamps
+-
+-	CUR="$(($CUR + 1))"
+-done
+-
+-exit 0
+-- 
+2.34.1
+
diff --git a/patches/0053-mac80211-update-to-HEAD.patch b/patches/0053-mac80211-update-to-HEAD.patch
new file mode 100644
index 000000000..b166740ca
--- /dev/null
+++ b/patches/0053-mac80211-update-to-HEAD.patch
@@ -0,0 +1,29739 @@
+From 44bfdae6e35c6474057a88fe0faafb9be8e65b31 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Mon, 4 Sep 2023 08:43:20 +0200
+Subject: [PATCH 53/55] mac80211: update to HEAD
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ package/kernel/mac80211/Makefile              |  397 ++++++
+ package/kernel/mac80211/ath.mk                |  391 ++++++
+ package/kernel/mac80211/broadcom.mk           |  492 +++++++
+ .../files/lib/netifd/wireless/mac80211.sh     | 1219 +++++++++++++++++
+ .../mac80211/files/lib/wifi/mac80211.sh       |  217 +++
+ .../kernel/mac80211/files/mac80211.hotplug    |    5 +
+ package/kernel/mac80211/intel.mk              |   77 ++
+ package/kernel/mac80211/marvell.mk            |   51 +
+ .../patches/ath/070-ath_common_config.patch   |   10 +
+ .../patches/ath/400-ath_move_debug_code.patch |   31 +
+ .../patches/ath/402-ath_regd_optional.patch   |   92 ++
+ .../patches/ath/403-world_regd_fixup.patch    |   84 ++
+ .../patches/ath/404-regd_no_assoc_hints.patch |   19 +
+ .../patches/ath/405-ath_regd_us.patch         |   26 +
+ .../ath/406-ath_relax_default_regd.patch      |   51 +
+ ...add_platform_eeprom_support_to_ath5k.patch |   56 +
+ .../ath10k/080-ath10k_thermal_config.patch    |   47 +
+ ...21-ath10k_init_devices_synchronously.patch |   33 +
+ .../930-ath10k_add_tpt_led_trigger.patch      |   37 +
+ ...rolling-support-for-various-chipsets.patch |  609 ++++++++
+ ...75-ath10k-use-tpt-trigger-by-default.patch |   53 +
+ ...-power-reduction-for-US-regulatory-d.patch |  101 ++
+ ...h10k-Try-to-get-mac-address-from-dts.patch |   37 +
+ ...k-always-use-mac80211-loss-detection.patch |   28 +
+ .../ath10k/990-ath10k-small-buffers.patch     |   64 +
+ ...-tx-queues-immediately-upon-firmware.patch |   78 ++
+ ...-ath11k-Don-t-exit-on-wakeup-failure.patch |   45 +
+ ...-Fix-spelling-mistake-chnange-change.patch |   25 +
+ ...-ath11k-suppress-add-interface-error.patch |   52 +
+ ...support-to-configure-channel-dwell-t.patch |  102 ++
+ ...firmware-crash-on-vdev-delete-race-c.patch |  116 ++
+ ...monitor-vdev-creation-with-firmware-.patch |   40 +
+ ...qmi_msg_handler-data-structure-initi.patch |   33 +
+ ...hronize-ath11k_mac_he_gi_to_nl80211_.patch |   42 +
+ ...-ath11k-Make-QMI-message-rules-const.patch |  341 +++++
+ ...ger-sta-disconnect-on-hardware-resta.patch |  119 ++
+ ...race-condition-with-struct-htt_ppdu_.patch |  103 ++
+ ...-ath11k-update-hw-params-for-IPQ5018.patch |  125 ++
+ ...update-ce-configurations-for-IPQ5018.patch |  246 ++++
+ ...-remap-ce-register-space-for-IPQ5018.patch |  351 +++++
+ ...11k-update-hal-srng-regs-for-IPQ5018.patch |  130 ++
+ ...ath11k-initialize-hw_ops-for-IPQ5018.patch |   90 ++
+ ...new-hw-ops-for-IPQ5018-to-get-rx-des.patch |   84 ++
+ ...fi-ath11k-add-ipq5018-device-support.patch |   31 +
+ ...scan-request-param-frame-size-warnin.patch |  161 +++
+ ...support-to-configure-FTM-responder-r.patch |  169 +++
+ ...-channel-177-into-5-GHz-channel-list.patch |   41 +
+ ...ix-ce-memory-mapping-for-ahb-devices.patch |  114 ++
+ ...ext-passive-scan-flag-to-adjust-pass.patch |   73 +
+ ...return-value-check-in-ath11k_ahb_pro.patch |   27 +
+ ...platform_get_irq-to-get-the-interrup.patch |   50 +
+ ...SAC-bug-on-peer-addition-with-sta-ba.patch |   53 +
+ ...low-system-suspend-to-survive-ath11k.patch |   43 +
+ ...fy-accessor-macros-to-match-index-si.patch |   61 +
+ ...-MU-MIMO-params-from-hostapd-to-hard.patch |  300 ++++
+ ...-HE-MCS-mapper-to-a-separate-functio.patch |   67 +
+ ...rate-rx-and-tx-mcs-maps-for-supporte.patch |   64 +
+ ...tx-ack-signal-support-for-management.patch |  150 ++
+ ...proper-regulatory-reference-for-band.patch |  216 +++
+ ...support-to-parse-new-WMI-event-for-6.patch |  844 ++++++++++++
+ ...debug-prints-in-regulatory-WMI-event.patch |  567 ++++++++
+ ...ace-fake-flex-array-with-flexible-ar.patch |  246 ++++
+ ...deinitialization-of-firmware-resourc.patch |   79 ++
+ ...BUFFER_DONE-read-on-monitor-ring-rx-.patch |  130 ++
+ ...wifi-ath11k-Optimize-6-GHz-scan-time.patch |  101 ++
+ ...igure-the-FTM-responder-role-using-f.patch |  117 ++
+ ...rssi-station-dump-not-updated-in-QCN.patch |  158 +++
+ ...invalid-management-rx-frame-length-i.patch |  115 ++
+ ...-writing-to-unintended-memory-region.patch |   43 +
+ ...-11d-scan-start-before-WMI_START_SCA.patch |   61 +
+ ...1k-Remove-redundant-pci_clear_master.patch |   58 +
+ ...ble-Spectral-scan-upon-removing-inte.patch |   36 +
+ ...ath11k-enable-SAR-support-on-WCN6750.patch |   29 +
+ ...pci-Add-more-MODULE_FIRMWARE-entries.patch |   36 +
+ ...t-a-warning-when-crypto_alloc_shash-.patch |   34 +
+ ...re-frags-from-uninitialized-peer-in-.patch |  104 ++
+ ...-undefined-behavior-with-__fls-in-dp.patch |   29 +
+ ...double-free-of-peer-rx_tid-during-re.patch |  144 ++
+ ...wifi-ath11k-Prevent-REO-cmd-failures.patch |   43 +
+ ...peer-mac-information-in-failure-case.patch |   74 +
+ ...tx-status-reporting-in-encap-offload.patch |  119 ++
+ ...-incorrect-update-of-radiotap-fields.patch |   49 +
+ ...SKB-corruption-in-REO-destination-ri.patch |   70 +
+ ...emove-disabling-of-80-80-and-160-MHz.patch |   49 +
+ ...registration-of-6Ghz-only-phy-withou.patch |   61 +
+ ...ound-false-positive-stringop-overrea.patch |   84 ++
+ ...k-driver-settings-for-MBSSID-and-EMA.patch |  133 ++
+ ...ID-configuration-during-vdev-create-.patch |  215 +++
+ ...ame-MBSSID-fields-in-wmi_vdev_up_cmd.patch |   52 +
+ ...ID-parameter-configuration-in-AP-mod.patch |  138 ++
+ ...efactor-vif-parameter-configurations.patch |   86 ++
+ ...76-wifi-ath11k-MBSSID-beacon-support.patch |  190 +++
+ .../0077-wifi-ath11k-EMA-beacon-support.patch |  156 +++
+ ...cate-the-func-ath11k_mac_bitrate_mas.patch |   75 +
+ ...-HT-fixed-rate-in-WMI-peer-fixed-par.patch |  141 ++
+ ...support-default-regdb-while-searchin.patch |  127 ++
+ ...ve-unused-function-ath11k_tm_event_w.patch |  128 ++
+ ...ifi-ath11k-factory-test-mode-support.patch |  850 ++++++++++++
+ ...w-ath11k-to-boot-without-caldata-in-.patch |   47 +
+ ...11k-Add-HTT-stats-for-PHY-reset-case.patch |  261 ++++
+ ...i-ath11k-use-unique-QRTR-instance-ID.patch |  162 +++
+ ...k-control-thermal-support-via-symbol.patch |   66 +
+ ...ci-fix-compilation-in-5.16-and-older.patch |   29 +
+ ...ble-coldboot-calibration-for-IPQ8074.patch |   24 +
+ ...upport-setting-FW-memory-mode-via-DT.patch |   74 +
+ ...tersection-support-for-regulatory-ru.patch |  317 +++++
+ .../201-ath5k-WAR-for-AR71xx-PCI-bug.patch    |   38 +
+ .../ath5k/411-ath5k_allow_adhoc_and_ap.patch  |   46 +
+ .../ath5k/420-ath5k_disable_fast_cc.patch     |   18 +
+ .../ath5k/430-add_ath5k_platform.patch        |   33 +
+ .../patches/ath5k/432-ath5k_add_pciids.patch  |   11 +
+ .../ath5k/440-ath5k_channel_bw_debugfs.patch  |  142 ++
+ ...w-reset-AHB-WMAC-interface-on-AR91xx.patch |   25 +
+ ..._hw-issue-external-reset-for-QCA955x.patch |  129 ++
+ ...h9k-force-rx_clear-when-disabling-rx.patch |   35 +
+ ...erpret-requested-txpower-in-EIRP-dom.patch |   36 +
+ ...power-reduction-for-US-regulatory-do.patch |   24 +
+ .../ath9k/401-ath9k_blink_default.patch       |   11 +
+ .../ath9k/410-ath9k_allow_adhoc_and_ap.patch  |   10 +
+ ...abled-MFP-capability-unconditionally.patch |   34 +
+ .../ath9k/500-ath9k_eeprom_debugfs.patch      |   66 +
+ .../patches/ath9k/501-ath9k_ahb_init.patch    |   34 +
+ .../510-ath9k_intr_mitigation_tweak.patch     |   18 +
+ .../ath9k/511-ath9k_reduce_rxbuf.patch        |   11 +
+ .../ath9k/512-ath9k_channelbw_debugfs.patch   |  125 ++
+ .../patches/ath9k/513-ath9k_add_pci_ids.patch |   30 +
+ .../patches/ath9k/530-ath9k_extra_leds.patch  |  267 ++++
+ .../ath9k/531-ath9k_extra_platform_leds.patch |   76 +
+ .../ath9k/540-ath9k_reduce_ani_interval.patch |   11 +
+ .../ath9k/542-ath9k_debugfs_diag.patch        |  139 ++
+ .../ath9k/543-ath9k_entropy_from_adc.patch    |  186 +++
+ ...544-ath9k-ar933x-usb-hang-workaround.patch |   79 ++
+ .../ath9k/545-ath9k_ani_ws_detect.patch       |  155 +++
+ .../ath9k/547-ath9k_led_defstate_fix.patch    |   29 +
+ .../ath9k/548-ath9k_enable_gpio_chip.patch    |  251 ++++
+ .../ath9k/549-ath9k_enable_gpio_buttons.patch |  143 ++
+ .../ath9k/551-ath9k_ubnt_uap_plus_hsr.patch   |  403 ++++++
+ .../patches/ath9k/552-ath9k-ahb_of.patch      |  331 +++++
+ .../ath9k/553-ath9k_of_gpio_mask.patch        |   25 +
+ .../patches/brcm/040-brcmutil_option.patch    |   10 +
+ .../810-b43-gpio-mask-module-option.patch     |   37 +
+ .../patches/brcm/811-b43_no_pio.patch         |   86 ++
+ .../brcm/812-b43-add-antenna-control.patch    |  131 ++
+ .../813-b43-reduce-number-of-RX-slots.patch   |   11 +
+ .../814-b43-only-use-gpio-0-1-for-led.patch   |   17 +
+ ...815-b43-always-take-overlapping-devs.patch |   11 +
+ ...-remove-extra-regulation-restriction.patch |   27 +
+ ...und-bug-with-some-inconsistent-BSSes.patch |   49 +
+ ...62-brcmfmac-Disable-power-management.patch |   27 +
+ ...-in-driver-tables-with-country-codes.patch |   60 +
+ ...e-internal-roaming-engine-by-default.patch |   23 +
+ ...d-alternative-firmware-names-from-DT.patch |  191 +++
+ .../patches/build/000-fix_kconfig.patch       |   14 +
+ .../patches/build/001-fix_build.patch         |  169 +++
+ .../patches/build/002-change_allconfig.patch  |   64 +
+ .../build/003-remove_bogus_modparams.patch    |   34 +
+ .../build/012-kernel_build_check.patch        |   11 +
+ .../patches/build/060-no_local_ssb_bcma.patch |  314 +++++
+ .../build/070-remove-broken-wext-select.patch |   10 +
+ .../patches/build/080-resv_start_op.patch     |   24 +
+ .../mac80211/patches/build/090-bcma-otp.patch |   13 +
+ .../100-backports-drop-QRTR-and-MHI.patch     |   76 +
+ .../build/110-backport_napi_build_skb.patch   |   11 +
+ ...01-wifi-mt7601u-update-firmware-path.patch |   55 +
+ ...700-mwl8k-missing-pci-id-for-WNR854T.patch |   10 +
+ .../801-libertas-configure-sysfs-links.patch  |   21 +
+ .../802-libertas-set-wireless-macaddr.patch   |   11 +
+ ...crease-the-global-limit-up-to-4-SSID.patch |   41 +
+ ...940-mwl8k_init_devices_synchronously.patch |   20 +
+ ...ringified-name-of-command-in-error-l.patch |  189 +++
+ .../patches/rt2x00/100-rt2x00_options.patch   |   47 +
+ ...to-build-rt2800soc-module-for-RT3883.patch |   30 +
+ ...1-rt2x00-introduce-rt2x00_platform_h.patch |   32 +
+ .../602-rt2x00-introduce-rt2x00eeprom.patch   |  296 ++++
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+ ...om-on-SoC-from-a-mtd-device-defines-.patch |  113 ++
+ ...isabling_bands_through_platform_data.patch |   47 +
+ ...07-rt2x00-add_platform_data_mac_addr.patch |   25 +
+ ...00-allow_disabling_bands_through_dts.patch |   19 +
+ ...c-loadable-via-OF-on-rt288x-305x-SoC.patch |   33 +
+ ...0-rt2x00-change-led-polarity-from-OF.patch |   40 +
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+ ...duce-accessors-for-CHIP_VER-register.patch |  139 ++
+ ...-differentiate-based-on-SoC-CHIP_VER.patch |  408 ++++++
+ ...t-MT7620-TX-power-based-on-eeprom-ca.patch |  106 ++
+ ...-rework-MT7620-PA-LNA-RF-calibration.patch |  413 ++++++
+ .../110-mac80211_keep_keys_on_stop_ap.patch   |   19 +
+ .../120-cfg80211_allow_perm_addr_change.patch |   52 +
+ .../mac80211/patches/subsys/210-ap_scan.patch |   19 +
+ ...domize-BA-session-dialog-token-alloc.patch |   38 +
+ ...-minstrel_ht-fix-MINSTREL_FRAC-macro.patch |   21 +
+ ...l_ht-reduce-fluctuations-in-rate-pro.patch |   30 +
+ ...l_ht-rework-rate-downgrade-code-and-.patch |  151 ++
+ ...crease-quantum-for-airtime-scheduler.patch |   53 +
+ ...d-internal-handler-for-wake_tx_queue.patch |  183 +++
+ ...dd-wake_tx_queue-callback-to-drivers.patch |  396 ++++++
+ ...c80211-Drop-support-for-TX-push-path.patch |  683 +++++++++
+ ...ltek-remove-duplicated-wake_tx_queue.patch |   32 +
+ ...port-for-restricting-netdev-features.patch |  506 +++++++
+ ...x-and-simplify-unencrypted-drop-chec.patch |   87 ++
+ ...ve-A-MSDU-check-in-ieee80211_data_to.patch |   25 +
+ ...ctor-out-bridge-tunnel-RFC1042-heade.patch |   76 +
+ ...move-mesh-forwarding-congestion-chec.patch |   54 +
+ ...x-receiving-A-MSDU-frames-on-mesh-in.patch |  762 +++++++++++
+ ...d-a-workaround-for-receiving-non-sta.patch |  145 ++
+ ...x-race-in-mesh-sequence-number-assig.patch |   37 +
+ ...wifi-mac80211-mesh-fast-xmit-support.patch |  850 ++++++++++++
+ ...e-mesh-header-cache-to-speed-up-mesh.patch |  132 ++
+ .../321-mac80211-fix-mesh-forwarding.patch    |   32 +
+ ...x-mesh-path-discovery-based-on-unica.patch |   52 +
+ ...d-VHT-MU-MIMO-related-flags-in-ieee8.patch |   68 +
+ ...d-HE-MU-MIMO-related-flags-in-ieee80.patch |   68 +
+ ...troduce-ieee80211_refresh_tx_agg_ses.patch |   60 +
+ ...fi-mac80211-add-mesh-fast-rx-support.patch |   77 ++
+ ...d-support-for-letting-drivers-regist.patch |  149 ++
+ ...x-receiving-mesh-packets-in-forwardi.patch |   50 +
+ ...orrectly-mark-FTM-frames-non-buffera.patch |  134 ++
+ ...mac80211-flush-queues-on-STA-removal.patch |   36 +
+ ...i-mvm-support-flush-on-AP-interfaces.patch |   34 +
+ ...3-wifi-mac80211-add-flush_sta-method.patch |   91 ++
+ ...ifi-mvm-support-new-flush_sta-method.patch |   53 +
+ ...d-LDPC-related-flags-in-ieee80211_bs.patch |   62 +
+ ...0211-generate-EMA-beacons-in-AP-mode.patch |  372 +++++
+ ...sband-iftype-data-lookup-for-AP_VLAN.patch |   23 +
+ ...esh-fast-tx-cache-into-local-proxied.patch |  219 +++
+ ...x-receving-mesh-packets-without-RFC1.patch |   25 +
+ .../patches/subsys/400-allow-ibss-mixed.patch |   40 +
+ ...the-dst-buffer-to-of_get_mac_address.patch |   29 +
+ package/kernel/mac80211/ralink.mk             |  131 ++
+ package/kernel/mac80211/realtek.mk            |  197 +++
+ .../mac80211/scripts/import-backports.sh      |  109 ++
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+ create mode 100644 package/kernel/mac80211/patches/ath11k/0060-wifi-ath11k-Ignore-frags-from-uninitialized-peer-in-.patch
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+ create mode 100644 package/kernel/mac80211/patches/ath11k/100-wifi-ath11k-use-unique-QRTR-instance-ID.patch
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+ create mode 100644 package/kernel/mac80211/patches/ath11k/902-ath11k-Disable-coldboot-calibration-for-IPQ8074.patch
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+ create mode 100644 package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch
+ create mode 100644 package/kernel/mac80211/patches/ath9k/553-ath9k_of_gpio_mask.patch
+ create mode 100644 package/kernel/mac80211/patches/brcm/040-brcmutil_option.patch
+ create mode 100644 package/kernel/mac80211/patches/brcm/810-b43-gpio-mask-module-option.patch
+ create mode 100644 package/kernel/mac80211/patches/brcm/811-b43_no_pio.patch
+ create mode 100644 package/kernel/mac80211/patches/brcm/812-b43-add-antenna-control.patch
+ create mode 100644 package/kernel/mac80211/patches/brcm/813-b43-reduce-number-of-RX-slots.patch
+ create mode 100644 package/kernel/mac80211/patches/brcm/814-b43-only-use-gpio-0-1-for-led.patch
+ create mode 100644 package/kernel/mac80211/patches/brcm/815-b43-always-take-overlapping-devs.patch
+ create mode 100644 package/kernel/mac80211/patches/brcm/850-brcmsmac-remove-extra-regulation-restriction.patch
+ create mode 100644 package/kernel/mac80211/patches/brcm/861-brcmfmac-workaround-bug-with-some-inconsistent-BSSes.patch
+ create mode 100644 package/kernel/mac80211/patches/brcm/862-brcmfmac-Disable-power-management.patch
+ create mode 100644 package/kernel/mac80211/patches/brcm/863-brcmfmac-add-in-driver-tables-with-country-codes.patch
+ create mode 100644 package/kernel/mac80211/patches/brcm/864-brcmfmac-do-not-use-internal-roaming-engine-by-default.patch
+ create mode 100644 package/kernel/mac80211/patches/brcm/865-brcmfmac-Read-alternative-firmware-names-from-DT.patch
+ create mode 100644 package/kernel/mac80211/patches/build/000-fix_kconfig.patch
+ create mode 100644 package/kernel/mac80211/patches/build/001-fix_build.patch
+ create mode 100644 package/kernel/mac80211/patches/build/002-change_allconfig.patch
+ create mode 100644 package/kernel/mac80211/patches/build/003-remove_bogus_modparams.patch
+ create mode 100644 package/kernel/mac80211/patches/build/012-kernel_build_check.patch
+ create mode 100644 package/kernel/mac80211/patches/build/060-no_local_ssb_bcma.patch
+ create mode 100644 package/kernel/mac80211/patches/build/070-remove-broken-wext-select.patch
+ create mode 100644 package/kernel/mac80211/patches/build/080-resv_start_op.patch
+ create mode 100644 package/kernel/mac80211/patches/build/090-bcma-otp.patch
+ create mode 100644 package/kernel/mac80211/patches/build/100-backports-drop-QRTR-and-MHI.patch
+ create mode 100644 package/kernel/mac80211/patches/build/110-backport_napi_build_skb.patch
+ create mode 100644 package/kernel/mac80211/patches/mt7601u/001-wifi-mt7601u-update-firmware-path.patch
+ create mode 100644 package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch
+ create mode 100644 package/kernel/mac80211/patches/mwl/801-libertas-configure-sysfs-links.patch
+ create mode 100644 package/kernel/mac80211/patches/mwl/802-libertas-set-wireless-macaddr.patch
+ create mode 100644 package/kernel/mac80211/patches/mwl/900-mwifiex-increase-the-global-limit-up-to-4-SSID.patch
+ create mode 100644 package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch
+ create mode 100644 package/kernel/mac80211/patches/mwl/950-mwifiex-Print-stringified-name-of-command-in-error-l.patch
+ create mode 100644 package/kernel/mac80211/patches/rt2x00/100-rt2x00_options.patch
+ create mode 100644 package/kernel/mac80211/patches/rt2x00/501-rt2x00-allow-to-build-rt2800soc-module-for-RT3883.patch
+ create mode 100644 package/kernel/mac80211/patches/rt2x00/601-rt2x00-introduce-rt2x00_platform_h.patch
+ create mode 100644 package/kernel/mac80211/patches/rt2x00/602-rt2x00-introduce-rt2x00eeprom.patch
+ create mode 100644 package/kernel/mac80211/patches/rt2x00/603-rt2x00-of_load_eeprom_filename.patch
+ create mode 100644 package/kernel/mac80211/patches/rt2x00/604-rt2x00-load-eeprom-on-SoC-from-a-mtd-device-defines-.patch
+ create mode 100644 package/kernel/mac80211/patches/rt2x00/606-rt2x00-allow_disabling_bands_through_platform_data.patch
+ create mode 100644 package/kernel/mac80211/patches/rt2x00/607-rt2x00-add_platform_data_mac_addr.patch
+ create mode 100644 package/kernel/mac80211/patches/rt2x00/608-rt2x00-allow_disabling_bands_through_dts.patch
+ create mode 100644 package/kernel/mac80211/patches/rt2x00/609-rt2x00-make-wmac-loadable-via-OF-on-rt288x-305x-SoC.patch
+ create mode 100644 package/kernel/mac80211/patches/rt2x00/610-rt2x00-change-led-polarity-from-OF.patch
+ create mode 100644 package/kernel/mac80211/patches/rt2x00/611-rt2x00-add-AP+STA-support.patch
+ create mode 100644 package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
+ create mode 100644 package/kernel/mac80211/patches/rt2x00/995-rt2x00-mt7620-introduce-accessors-for-CHIP_VER-register.patch
+ create mode 100644 package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
+ create mode 100644 package/kernel/mac80211/patches/rt2x00/997-wifi-rt2x00-limit-MT7620-TX-power-based-on-eeprom-ca.patch
+ create mode 100644 package/kernel/mac80211/patches/rt2x00/998-wifi-rt2x00-rework-MT7620-PA-LNA-RF-calibration.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/110-mac80211_keep_keys_on_stop_ap.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/120-cfg80211_allow_perm_addr_change.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/210-ap_scan.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/301-mac80211-sta-randomize-BA-session-dialog-token-alloc.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/302-mac80211-minstrel_ht-fix-MINSTREL_FRAC-macro.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/303-mac80211-minstrel_ht-reduce-fluctuations-in-rate-pro.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/304-mac80211-minstrel_ht-rework-rate-downgrade-code-and-.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/305-mac80211-increase-quantum-for-airtime-scheduler.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/306-01-v6.2-wifi-mac80211-add-internal-handler-for-wake_tx_queue.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/306-02-v6.2-wifi-mac80211-add-wake_tx_queue-callback-to-drivers.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/306-03-v6.2-wifi-mac80211-Drop-support-for-TX-push-path.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/306-04-v6.2-wifi-realtek-remove-duplicated-wake_tx_queue.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/310-v6.2-mac80211-add-support-for-restricting-netdev-features.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/311-v6.2-wifi-mac80211-fix-and-simplify-unencrypted-drop-chec.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/312-v6.3-wifi-cfg80211-move-A-MSDU-check-in-ieee80211_data_to.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/313-v6.3-wifi-cfg80211-factor-out-bridge-tunnel-RFC1042-heade.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/314-v6.3-wifi-mac80211-remove-mesh-forwarding-congestion-chec.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/315-v6.3-wifi-mac80211-fix-receiving-A-MSDU-frames-on-mesh-in.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/316-v6.3-wifi-mac80211-add-a-workaround-for-receiving-non-sta.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/318-wifi-mac80211-fix-race-in-mesh-sequence-number-assig.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/319-wifi-mac80211-mesh-fast-xmit-support.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/320-wifi-mac80211-use-mesh-header-cache-to-speed-up-mesh.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/321-mac80211-fix-mesh-forwarding.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/322-wifi-mac80211-fix-mesh-path-discovery-based-on-unica.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/323-v6.3-wifi-mac80211-Add-VHT-MU-MIMO-related-flags-in-ieee8.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/324-v6.3-wifi-mac80211-Add-HE-MU-MIMO-related-flags-in-ieee80.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/325-wifi-mac80211-introduce-ieee80211_refresh_tx_agg_ses.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/326-wifi-mac80211-add-mesh-fast-rx-support.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/327-wifi-mac80211-add-support-for-letting-drivers-regist.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/329-wifi-mac80211-fix-receiving-mesh-packets-in-forwardi.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/330-wifi-ieee80211-correctly-mark-FTM-frames-non-buffera.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/331-wifi-mac80211-flush-queues-on-STA-removal.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/332-wifi-iwlwifi-mvm-support-flush-on-AP-interfaces.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/333-wifi-mac80211-add-flush_sta-method.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/334-wifi-iwlwifi-mvm-support-new-flush_sta-method.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/335-wifi-mac80211-add-LDPC-related-flags-in-ieee80211_bs.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/336-v6.4-wifi-mac80211-generate-EMA-beacons-in-AP-mode.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/337-mac80211-fix-sband-iftype-data-lookup-for-AP_VLAN.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/338-mac80211-split-mesh-fast-tx-cache-into-local-proxied.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/339-wifi-cfg80211-fix-receving-mesh-packets-without-RFC1.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/400-allow-ibss-mixed.patch
+ create mode 100644 package/kernel/mac80211/patches/subsys/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch
+ create mode 100644 package/kernel/mac80211/ralink.mk
+ create mode 100644 package/kernel/mac80211/realtek.mk
+ create mode 100755 package/kernel/mac80211/scripts/import-backports.sh
+
+diff --git a/package/kernel/mac80211/Makefile b/package/kernel/mac80211/Makefile
+new file mode 100644
+index 0000000000..a7472ee779
+--- /dev/null
++++ b/package/kernel/mac80211/Makefile
+@@ -0,0 +1,397 @@
++#
++# Copyright (C) 2007-2015 OpenWrt.org
++#
++# This is free software, licensed under the GNU General Public License v2.
++# See /LICENSE for more information.
++#
++
++include $(TOPDIR)/rules.mk
++include $(INCLUDE_DIR)/kernel.mk
++
++PKG_NAME:=mac80211
++
++PKG_VERSION:=6.1.24
++PKG_RELEASE:=4
++# PKG_SOURCE_URL:=@KERNEL/linux/kernel/projects/backports/stable/v5.15.58/
++PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources/
++PKG_HASH:=5d39aca7e34c33cb9b3e366117b2e86841b7bdd37933679d6b1e61be6b150648
++
++PKG_SOURCE:=backports-$(PKG_VERSION).tar.xz
++PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/backports-$(PKG_VERSION)
++PKG_BUILD_PARALLEL:=1
++
++PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
++
++PKG_DRIVERS = \
++	mac80211-hwsim \
++	mt7601u \
++	rsi91x rsi91x-usb rsi91x-sdio\
++	wlcore wl12xx wl18xx
++
++PKG_CONFIG_DEPENDS:= \
++	CONFIG_PACKAGE_kmod-mac80211 \
++	CONFIG_PACKAGE_CFG80211_TESTMODE \
++	CONFIG_PACKAGE_MAC80211_DEBUGFS \
++	CONFIG_PACKAGE_MAC80211_MESH \
++	CONFIG_PACKAGE_MAC80211_TRACING \
++	CONFIG_PACKAGE_IWLWIFI_DEBUG \
++	CONFIG_PACKAGE_IWLWIFI_DEBUGFS \
++	CONFIG_PACKAGE_RTLWIFI_DEBUG \
++
++include $(INCLUDE_DIR)/package.mk
++
++WMENU:=Wireless Drivers
++
++define KernelPackage/mac80211/Default
++  SUBMENU:=$(WMENU)
++  URL:=https://wireless.wiki.kernel.org/
++  MAINTAINER:=Felix Fietkau <nbd@nbd.name>
++endef
++
++config_package=$(if $(CONFIG_PACKAGE_kmod-$(1)),m)
++
++config-y:= \
++	WLAN \
++	CFG80211_CERTIFICATION_ONUS \
++	MAC80211_RC_MINSTREL \
++	MAC80211_RC_MINSTREL_HT \
++	MAC80211_RC_MINSTREL_VHT \
++	MAC80211_RC_DEFAULT_MINSTREL \
++	WLAN_VENDOR_ADMTEK \
++	WLAN_VENDOR_ATH \
++	WLAN_VENDOR_ATMEL \
++	WLAN_VENDOR_BROADCOM \
++	WLAN_VENDOR_CISCO \
++	WLAN_VENDOR_INTEL \
++	WLAN_VENDOR_INTERSIL \
++	WLAN_VENDOR_MARVELL \
++	WLAN_VENDOR_MEDIATEK \
++	WLAN_VENDOR_RALINK \
++	WLAN_VENDOR_REALTEK \
++	WLAN_VENDOR_RSI \
++	WLAN_VENDOR_ST \
++	WLAN_VENDOR_TI \
++	WLAN_VENDOR_ZYDAS \
++
++config-$(call config_package,cfg80211) += CFG80211
++config-$(CONFIG_PACKAGE_CFG80211_TESTMODE) += NL80211_TESTMODE
++
++config-$(call config_package,mac80211) += MAC80211
++config-$(CONFIG_PACKAGE_MAC80211_MESH) += MAC80211_MESH
++
++include ath.mk
++include broadcom.mk
++include intel.mk
++include marvell.mk
++include ralink.mk
++include realtek.mk
++
++PKG_CONFIG_DEPENDS += \
++	$(patsubst %,CONFIG_PACKAGE_kmod-%,$(PKG_DRIVERS))
++
++define KernelPackage/cfg80211
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=cfg80211 - wireless configuration API
++  DEPENDS+= +iw +iwinfo +wireless-regdb +USE_RFKILL:kmod-rfkill
++  ABI_VERSION:=$(PKG_VERSION)-$(PKG_RELEASE)
++  FILES:= \
++	$(PKG_BUILD_DIR)/compat/compat.ko \
++	$(PKG_BUILD_DIR)/net/wireless/cfg80211.ko
++endef
++
++define KernelPackage/cfg80211/description
++cfg80211 is the Linux wireless LAN (802.11) configuration API.
++endef
++
++define KernelPackage/cfg80211/config
++  if PACKAGE_kmod-cfg80211
++
++	config PACKAGE_CFG80211_TESTMODE
++		bool "Enable testmode command support"
++		default n
++		help
++		  This is typically used for tests and calibration during
++		  manufacturing, or vendor specific debugging features
++
++  endif
++endef
++
++
++define KernelPackage/mac80211
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Linux 802.11 Wireless Networking Stack
++  # +kmod-crypto-cmac is a runtime only dependency of net/mac80211/aes_cmac.c
++  DEPENDS+= +kmod-cfg80211 +kmod-crypto-cmac +kmod-crypto-ccm +kmod-crypto-gcm +hostapd-common
++  KCONFIG:=\
++	CONFIG_AVERAGE=y
++  FILES:= $(PKG_BUILD_DIR)/net/mac80211/mac80211.ko
++  ABI_VERSION:=$(PKG_VERSION)-$(PKG_RELEASE)
++  MENU:=1
++endef
++
++define KernelPackage/mac80211/config
++  if PACKAGE_kmod-mac80211
++
++	config PACKAGE_MAC80211_DEBUGFS
++		bool "Export mac80211 internals in DebugFS"
++		select KERNEL_DEBUG_FS
++		default y
++		help
++		  Select this to see extensive information about
++		  the internal state of mac80211 in debugfs.
++
++	config PACKAGE_MAC80211_TRACING
++		bool "Enable tracing (mac80211 and supported drivers)"
++		select KERNEL_FTRACE
++		select KERNEL_ENABLE_DEFAULT_TRACERS
++		default n
++		help
++		  Select this to enable tracing of mac80211 and
++		  related wifi drivers (using trace-cmd).
++
++	config PACKAGE_MAC80211_MESH
++		bool "Enable 802.11s mesh support"
++		default y
++
++  endif
++endef
++
++define KernelPackage/mac80211/description
++Generic IEEE 802.11 Networking Stack (mac80211)
++endef
++
++define KernelPackage/mac80211-hwsim
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=mac80211 HW simulation device
++  DEPENDS+= +kmod-mac80211 +@DRIVER_11AX_SUPPORT +@DRIVER_11AC_SUPPORT
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/mac80211_hwsim.ko
++  AUTOLOAD:=$(call AutoProbe,mac80211_hwsim)
++endef
++
++
++define KernelPackage/mt7601u
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=MT7601U-based USB dongles Wireless Driver
++  DEPENDS+= +kmod-mac80211 @USB_SUPPORT +kmod-usb-core +mt7601u-firmware
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/mediatek/mt7601u/mt7601u.ko
++  AUTOLOAD:=$(call AutoProbe,mt7601u)
++endef
++
++define KernelPackage/rsi91x
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Redpine Signals Inc 91x WLAN driver support
++  DEPENDS+= +kmod-mac80211 +rs9113-firmware
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/rsi/rsi_91x.ko
++endef
++
++define KernelPackage/rsi91x-usb
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Redpine Signals USB bus support
++  DEPENDS+=@USB_SUPPORT +kmod-usb-core +kmod-mac80211 +kmod-rsi91x +rs9113-firmware
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/rsi/rsi_usb.ko
++  AUTOLOAD:=$(call AutoProbe,rsi_usb)
++endef
++
++define KernelPackage/rsi91x-sdio
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Redpine Signals SDIO bus support
++  DEPENDS+= +kmod-mac80211 +kmod-mmc +kmod-rsi91x +rs9113-firmware
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/rsi/rsi_sdio.ko
++  AUTOLOAD:=$(call AutoProbe,rsi_sdio)
++endef
++
++
++define KernelPackage/wlcore
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=TI common driver part
++  DEPENDS+= +kmod-mmc +kmod-mac80211
++  FILES:= \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/ti/wlcore/wlcore.ko \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/ti/wlcore/wlcore_sdio.ko
++  AUTOLOAD:=$(call AutoProbe,wlcore wlcore_sdio)
++endef
++
++define KernelPackage/wlcore/description
++ This module contains some common parts needed by TI Wireless drivers.
++endef
++
++define KernelPackage/wl12xx
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Driver for TI WL12xx
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/wl12xx
++  DEPENDS+= +kmod-wlcore +wl12xx-firmware
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ti/wl12xx/wl12xx.ko
++  AUTOLOAD:=$(call AutoProbe,wl12xx)
++endef
++
++define KernelPackage/wl12xx/description
++ Kernel modules for TI WL12xx
++endef
++
++define KernelPackage/wl18xx
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Driver for TI WL18xx
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/wl18xx
++  DEPENDS+= +kmod-wlcore +wl18xx-firmware
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ti/wl18xx/wl18xx.ko
++  AUTOLOAD:=$(call AutoProbe,wl18xx)
++endef
++
++define KernelPackage/wl18xx/description
++ Kernel modules for TI WL18xx
++endef
++
++
++ifdef CONFIG_PACKAGE_MAC80211_DEBUGFS
++  config-y += \
++	CFG80211_DEBUGFS \
++	MAC80211_DEBUGFS
++endif
++
++ifdef CONFIG_PACKAGE_MAC80211_TRACING
++  config-y += \
++	IWLWIFI_DEVICE_TRACING
++endif
++
++config-$(call config_package,mac80211-hwsim) += MAC80211_HWSIM
++config-$(call config_package,mt7601u) += MT7601U
++config-y += WL_MEDIATEK
++
++config-$(call config_package,wlcore) += WLCORE WLCORE_SDIO
++config-$(call config_package,wl12xx) += WL12XX
++config-$(call config_package,wl18xx) += WL18XX
++config-y += WL_TI WILINK_PLATFORM_DATA
++config-$(call config_package,rsi91x) += RSI_91X
++config-$(call config_package,rsi91x-usb) += RSI_USB
++config-$(call config_package,rsi91x-sdio) += RSI_SDIO
++
++config-$(CONFIG_LEDS_TRIGGERS) += MAC80211_LEDS
++
++C_DEFINES=
++
++ifeq ($(BUILD_VARIANT),smallbuffers)
++	C_DEFINES+= -DCONFIG_ATH10K_SMALLBUFFERS
++endif
++
++MAKE_OPTS:= \
++	$(subst -C $(LINUX_DIR),-C "$(PKG_BUILD_DIR)",$(KERNEL_MAKEOPTS)) \
++	EXTRA_CFLAGS="-I$(PKG_BUILD_DIR)/include $(IREMAP_CFLAGS) $(C_DEFINES)" \
++	KLIB_BUILD="$(LINUX_DIR)" \
++	MODPROBE=true \
++	KLIB=$(TARGET_MODULES_DIR) \
++	KERNEL_SUBLEVEL=$(lastword $(subst ., ,$(KERNEL_PATCHVER))) \
++	KBUILD_LDFLAGS_MODULE_PREREQ=
++
++define ConfigVars
++$(subst $(space),,$(foreach opt,$(config-$(1)),CPTCFG_$(opt)=$(1)
++))
++endef
++
++define mac80211_config
++$(call ConfigVars,m)$(call ConfigVars,y)
++endef
++$(eval $(call shexport,mac80211_config))
++
++define Build/Prepare
++	rm -rf $(PKG_BUILD_DIR)
++	mkdir -p $(PKG_BUILD_DIR)
++	$(PKG_UNPACK)
++	$(Build/Patch)
++	rm -rf \
++		$(PKG_BUILD_DIR)/include/linux/ssb \
++		$(PKG_BUILD_DIR)/include/linux/bcma \
++		$(PKG_BUILD_DIR)/include/net/bluetooth
++
++	rm -f \
++		$(PKG_BUILD_DIR)/include/linux/cordic.h \
++		$(PKG_BUILD_DIR)/include/linux/crc8.h \
++		$(PKG_BUILD_DIR)/include/linux/eeprom_93cx6.h \
++		$(PKG_BUILD_DIR)/include/linux/wl12xx.h \
++		$(PKG_BUILD_DIR)/include/linux/mhi.h \
++		$(PKG_BUILD_DIR)/include/net/ieee80211.h \
++		$(PKG_BUILD_DIR)/backport-include/linux/bcm47xx_nvram.h
++
++	echo 'compat-wireless-$(PKG_VERSION)-$(PKG_RELEASE)-$(REVISION)' > $(PKG_BUILD_DIR)/compat_version
++endef
++
++ifneq ($(CONFIG_PACKAGE_kmod-cfg80211),)
++ define Build/Compile/kmod
++	rm -rf $(PKG_BUILD_DIR)/modules
++	+$(MAKE) $(PKG_JOBS) $(MAKE_OPTS) modules
++ endef
++endif
++
++#do not Build/Configure for EXTERNAL KERNEL
++ifeq ($(strip $(CONFIG_EXTERNAL_KERNEL_TREE)),"")
++  ifeq ($(strip $(CONFIG_KERNEL_GIT_CLONE_URI)),"")
++    define Build/Configure
++	  cmp $(PKG_BUILD_DIR)/include/linux/ath9k_platform.h $(LINUX_DIR)/include/linux/ath9k_platform.h
++	  cmp $(PKG_BUILD_DIR)/include/linux/ath5k_platform.h $(LINUX_DIR)/include/linux/ath5k_platform.h
++	  cmp $(PKG_BUILD_DIR)/include/linux/rt2x00_platform.h $(LINUX_DIR)/include/linux/rt2x00_platform.h
++    endef
++  endif
++endif
++
++define Build/Patch
++	$(if $(QUILT),rm -rf $(PKG_BUILD_DIR)/patches; mkdir -p $(PKG_BUILD_DIR)/patches)
++	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/build,build/)
++	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/subsys,subsys/)
++	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath,ath/)
++	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath5k,ath5k/)
++	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath9k,ath9k/)
++	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath10k,ath10k/)
++	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath11k,ath11k/)
++	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/rt2x00,rt2x00/)
++	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/mt7601u,mt7601u/)
++	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/mwl,mwl/)
++	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/brcm,brcm/)
++	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/rtl,rtl/)
++	$(if $(QUILT),touch $(PKG_BUILD_DIR)/.quilt_used)
++endef
++
++define Quilt/Refresh/Package
++	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/build,build/)
++	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/subsys,subsys/)
++	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath,ath/)
++	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath5k,ath5k/)
++	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath9k,ath9k/)
++	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath10k,ath10k/)
++	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath11k,ath11k/)
++	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/rt2x00,rt2x00/)
++	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/mt7601u,mt7601u/)
++	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/mwl,mwl/)
++	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/brcm,brcm/)
++	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/rtl,rtl/)
++endef
++
++define Build/Compile
++	$(SH_FUNC) var2file "$(call shvar,mac80211_config)" $(PKG_BUILD_DIR)/.config
++	$(MAKE) $(MAKE_OPTS) allnoconfig
++	$(call Build/Compile/kmod)
++endef
++
++define Build/InstallDev
++	mkdir -p \
++		$(1)/usr/include/mac80211 \
++		$(1)/usr/include/mac80211-backport \
++		$(1)/usr/include/mac80211/ath \
++		$(1)/usr/include/net/mac80211
++	$(CP) $(PKG_BUILD_DIR)/net/mac80211/*.h $(PKG_BUILD_DIR)/include/* $(1)/usr/include/mac80211/
++	$(CP) $(PKG_BUILD_DIR)/backport-include/* $(1)/usr/include/mac80211-backport/
++	$(CP) $(PKG_BUILD_DIR)/net/mac80211/rate.h $(1)/usr/include/net/mac80211/
++	$(CP) $(PKG_BUILD_DIR)/drivers/net/wireless/ath/*.h $(1)/usr/include/mac80211/ath/
++	rm -f $(1)/usr/include/mac80211-backport/linux/module.h
++endef
++
++
++define KernelPackage/cfg80211/install
++	$(INSTALL_DIR) $(1)/lib/wifi $(1)/lib/netifd/wireless
++	$(INSTALL_DATA) ./files/lib/wifi/mac80211.sh $(1)/lib/wifi
++	$(INSTALL_BIN) ./files/lib/netifd/wireless/mac80211.sh $(1)/lib/netifd/wireless
++	$(INSTALL_DIR) $(1)/etc/hotplug.d/ieee80211
++	$(INSTALL_DATA) ./files/mac80211.hotplug $(1)/etc/hotplug.d/ieee80211/10-wifi-detect
++endef
++
++$(eval $(foreach drv,$(PKG_DRIVERS),$(call KernelPackage,$(drv))))
++$(eval $(call KernelPackage,cfg80211))
++$(eval $(call KernelPackage,mac80211))
+diff --git a/package/kernel/mac80211/ath.mk b/package/kernel/mac80211/ath.mk
+new file mode 100644
+index 0000000000..881c89db25
+--- /dev/null
++++ b/package/kernel/mac80211/ath.mk
+@@ -0,0 +1,391 @@
++PKG_DRIVERS += \
++	ath ath5k ath6kl ath6kl-sdio ath6kl-usb ath9k ath9k-common ath9k-htc ath10k ath10k-smallbuffers \
++	ath11k ath11k-ahb ath11k-pci carl9170 owl-loader ar5523 wil6210
++
++PKG_CONFIG_DEPENDS += \
++	CONFIG_PACKAGE_ATH_DEBUG \
++	CONFIG_PACKAGE_ATH_DFS \
++	CONFIG_PACKAGE_ATH_SPECTRAL \
++	CONFIG_PACKAGE_ATH_DYNACK \
++	CONFIG_ATH9K_HWRNG \
++	CONFIG_ATH9K_SUPPORT_PCOEM \
++	CONFIG_ATH9K_TX99 \
++	CONFIG_ATH10K_LEDS \
++	CONFIG_ATH10K_THERMAL \
++	CONFIG_ATH11K_THERMAL \
++	CONFIG_ATH_USER_REGD
++
++ifdef CONFIG_PACKAGE_MAC80211_DEBUGFS
++  config-y += \
++	ATH9K_DEBUGFS \
++	ATH9K_HTC_DEBUGFS \
++	ATH10K_DEBUGFS \
++	ATH11K_DEBUGFS \
++	CARL9170_DEBUGFS \
++	ATH5K_DEBUG \
++	ATH6KL_DEBUG \
++	WIL6210_DEBUGFS
++endif
++
++ifdef CONFIG_PACKAGE_MAC80211_TRACING
++  config-y += \
++	ATH10K_TRACING \
++	ATH11K_TRACING \
++	ATH6KL_TRACING \
++	ATH_TRACEPOINTS \
++	ATH5K_TRACER \
++	WIL6210_TRACING
++endif
++
++config-$(call config_package,ath) += ATH_CARDS ATH_COMMON
++config-$(CONFIG_PACKAGE_ATH_DEBUG) += ATH_DEBUG ATH10K_DEBUG ATH11K_DEBUG ATH9K_STATION_STATISTICS
++config-$(CONFIG_PACKAGE_ATH_DFS) += ATH9K_DFS_CERTIFIED ATH10K_DFS_CERTIFIED
++config-$(CONFIG_PACKAGE_ATH_SPECTRAL) += ATH9K_COMMON_SPECTRAL ATH10K_SPECTRAL ATH11K_SPECTRAL
++config-$(CONFIG_PACKAGE_ATH_DYNACK) += ATH9K_DYNACK
++config-$(call config_package,ath9k) += ATH9K
++config-$(call config_package,ath9k-common) += ATH9K_COMMON
++config-$(call config_package,owl-loader) += ATH9K_PCI_NO_EEPROM
++config-$(CONFIG_TARGET_ath79) += ATH9K_AHB
++config-$(CONFIG_TARGET_ipq40xx) += ATH10K_AHB
++config-$(CONFIG_PCI) += ATH9K_PCI
++config-$(CONFIG_ATH_USER_REGD) += ATH_USER_REGD ATH_REG_DYNAMIC_USER_REG_HINTS
++config-$(CONFIG_ATH9K_HWRNG) += ATH9K_HWRNG
++config-$(CONFIG_ATH9K_SUPPORT_PCOEM) += ATH9K_PCOEM
++config-$(CONFIG_ATH9K_TX99) += ATH9K_TX99
++config-$(CONFIG_ATH9K_UBNTHSR) += ATH9K_UBNTHSR
++config-$(CONFIG_ATH10K_LEDS) += ATH10K_LEDS
++config-$(CONFIG_ATH10K_THERMAL) += ATH10K_THERMAL
++config-$(CONFIG_ATH11K_THERMAL) += ATH11K_THERMAL
++
++config-$(call config_package,ath9k-htc) += ATH9K_HTC
++config-$(call config_package,ath10k) += ATH10K ATH10K_PCI
++config-$(call config_package,ath10k-smallbuffers) += ATH10K ATH10K_PCI ATH10K_SMALLBUFFERS
++config-$(call config_package,ath11k) += ATH11K
++config-$(call config_package,ath11k-ahb) += ATH11K_AHB
++config-$(call config_package,ath11k-pci) += ATH11K_PCI
++
++config-$(call config_package,ath5k) += ATH5K
++ifdef CONFIG_TARGET_ath25
++  config-y += ATH5K_AHB
++else
++  config-y += ATH5K_PCI
++endif
++
++config-$(call config_package,ath6kl) += ATH6KL
++config-$(call config_package,ath6kl-sdio) += ATH6KL_SDIO
++config-$(call config_package,ath6kl-usb) += ATH6KL_USB
++
++config-$(call config_package,carl9170) += CARL9170
++config-$(call config_package,ar5523) += AR5523
++
++config-$(call config_package,wil6210) += WIL6210
++
++define KernelPackage/ath/config
++  if PACKAGE_kmod-ath
++	config ATH_USER_REGD
++		bool "Force Atheros drivers to respect the user's regdomain settings"
++		default y
++		help
++		  Atheros' idea of regulatory handling is that the EEPROM of the card defines
++		  the regulatory limits and the user is only allowed to restrict the settings
++		  even further, even if the country allows frequencies or power levels that
++		  are forbidden by the EEPROM settings.
++
++		  Select this option if you want the driver to respect the user's decision about
++		  regulatory settings.
++
++	config PACKAGE_ATH_DEBUG
++		bool "Atheros wireless debugging"
++		help
++		  Say Y, if you want to debug atheros wireless drivers.
++		  Only ath9k & ath10k & ath11k make use of this.
++
++	config PACKAGE_ATH_DFS
++		bool "Enable DFS support"
++		default y
++		help
++		  Dynamic frequency selection (DFS) is required for most of the 5 GHz band
++		  channels in Europe, US, and Japan.
++
++		  Select this option if you want to use such channels.
++
++	config PACKAGE_ATH_SPECTRAL
++		bool "Atheros spectral scan support"
++		depends on PACKAGE_ATH_DEBUG
++		select KERNEL_RELAY
++		help
++		  Say Y to enable access to the FFT/spectral data via debugfs.
++
++	config PACKAGE_ATH_DYNACK
++		bool "Enable Dynack support"
++		depends on PACKAGE_kmod-ath9k-common
++		help
++		  Enables support for Dynamic ACK estimation, which allows the fastest possible speed
++		  at any distance automatically by increasing/decreasing the max frame ACK time for
++		  the most remote station detected.  It can be enabled by using iw (iw phy0 set distance auto),
++		  or by sending the NL80211_ATTR_WIPHY_DYN_ACK flag to mac80211 driver using netlink.
++
++		  Select this option if you want to enable this feature
++
++  endif
++endef
++
++define KernelPackage/ath
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Atheros common driver part
++  DEPENDS+= @PCI_SUPPORT||USB_SUPPORT||TARGET_ath79||TARGET_ath25 +kmod-mac80211
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath.ko
++  MENU:=1
++endef
++
++define KernelPackage/ath/description
++ This module contains some common parts needed by Atheros Wireless drivers.
++endef
++
++define KernelPackage/ath5k
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Atheros 5xxx wireless cards support
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath5k
++  DEPENDS+= @(PCI_SUPPORT||TARGET_ath25) +kmod-ath
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath5k/ath5k.ko
++  AUTOLOAD:=$(call AutoProbe,ath5k)
++endef
++
++define KernelPackage/ath5k/description
++ This module adds support for wireless adapters based on
++ Atheros 5xxx chipset.
++endef
++
++define KernelPackage/ath6kl
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Atheros FullMAC wireless devices (common code for ath6kl_sdio and ath6kl_usb)
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath6kl
++  HIDDEN:=1
++  DEPENDS+= +kmod-ath
++  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath6kl/ath6kl_core.ko
++endef
++
++define KernelPackage/ath6kl-sdio
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Atheros 802.11n SDIO wireless cards support
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath6kl
++  DEPENDS+= +kmod-mmc +kmod-ath6kl
++  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath6kl/ath6kl_sdio.ko
++  AUTOLOAD:=$(call AutoProbe,ath6kl_sdio)
++endef
++
++define KernelPackage/ath6kl-sdio/description
++This module adds support for wireless adapters based on
++Atheros IEEE 802.11n AR6003 and AR6004 family of chipsets.
++endef
++
++define KernelPackage/ath6kl-usb
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Atheros 802.11n USB wireless cards support
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath6kl
++  DEPENDS+= @USB_SUPPORT +kmod-usb-core +kmod-ath6kl
++  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath6kl/ath6kl_usb.ko
++  AUTOLOAD:=$(call AutoProbe,ath6kl_usb)
++endef
++
++define KernelPackage/ath6kl-usb/description
++This module adds support for wireless adapters based on the
++Atheros IEEE 802.11n AR6004 chipset.
++endef
++
++define KernelPackage/ath9k-common
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Atheros 802.11n wireless devices (common code for ath9k and ath9k_htc)
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath9k
++  HIDDEN:=1
++  DEPENDS+= @PCI_SUPPORT||USB_SUPPORT||TARGET_ath79 +kmod-ath +kmod-random-core
++  FILES:= \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath9k/ath9k_common.ko \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath9k/ath9k_hw.ko
++endef
++
++define KernelPackage/ath9k
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Atheros 802.11n PCI wireless cards support
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath9k
++  DEPENDS+= @PCI_SUPPORT||TARGET_ath79 +kmod-ath9k-common
++  FILES:= \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath9k/ath9k.ko
++  AUTOLOAD:=$(call AutoProbe,ath9k)
++endef
++
++define KernelPackage/ath9k/description
++This module adds support for wireless adapters based on
++Atheros IEEE 802.11n AR5008 and AR9001 family of chipsets.
++endef
++
++define KernelPackage/ath9k/config
++
++	config ATH9K_HWRNG
++		bool "Add wireless noise as source of randomness to kernel entropy pool"
++		depends on PACKAGE_kmod-ath9k
++		select PACKAGE_kmod-random-core
++		default y
++
++	config ATH9K_SUPPORT_PCOEM
++		bool "Support chips used in PC OEM cards"
++		depends on PACKAGE_kmod-ath9k
++		default y if (x86_64 || i386)
++
++       config ATH9K_TX99
++               bool "Enable TX99 support (WARNING: testing only, breaks normal operation!)"
++               depends on PACKAGE_kmod-ath9k
++
++	config ATH9K_UBNTHSR
++		bool "Support for Ubiquiti UniFi Outdoor+ access point"
++		depends on PACKAGE_kmod-ath9k && TARGET_ath79
++		default y
++
++endef
++
++define KernelPackage/ath9k-htc
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Atheros 802.11n USB device support
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath9k
++  DEPENDS+= @USB_SUPPORT +kmod-ath9k-common +kmod-usb-core +ath9k-htc-firmware
++  FILES:= \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath9k/ath9k_htc.ko
++  AUTOLOAD:=$(call AutoProbe,ath9k_htc)
++endef
++
++define KernelPackage/ath9k-htc/description
++This module adds support for wireless adapters based on
++Atheros USB AR9271 and AR7010 family of chipsets.
++endef
++
++define KernelPackage/ath10k
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Atheros 802.11ac wireless cards support
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath10k
++  DEPENDS+= @PCI_SUPPORT +kmod-ath +@DRIVER_11AC_SUPPORT \
++	+ATH10K_THERMAL:kmod-hwmon-core +ATH10K_THERMAL:kmod-thermal
++  FILES:= \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath10k/ath10k_core.ko \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath10k/ath10k_pci.ko
++  AUTOLOAD:=$(call AutoProbe,ath10k_core ath10k_pci)
++  MODPARAMS.ath10k_core:=frame_mode=2
++  VARIANT:=regular
++endef
++
++define KernelPackage/ath10k/description
++This module adds support for wireless adapters based on
++Atheros IEEE 802.11ac family of chipsets. For now only
++PCI is supported.
++endef
++
++define KernelPackage/ath10k/config
++
++       config ATH10K_LEDS
++               bool "Enable LED support"
++               default y
++               depends on PACKAGE_kmod-ath10k || PACKAGE_kmod-ath10k-smallbuffers
++
++       config ATH10K_THERMAL
++               bool "Enable thermal sensors and throttling support"
++               depends on PACKAGE_kmod-ath10k || PACKAGE_kmod-ath10k-smallbuffers
++
++endef
++
++define KernelPackage/ath10k-smallbuffers
++  $(call KernelPackage/ath10k)
++  TITLE+= (small buffers for low-RAM devices)
++  VARIANT:=smallbuffers
++endef
++
++define KernelPackage/ath11k
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Qualcomm 802.11ax wireless chipset support (common code)
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath11k
++  DEPENDS+= +kmod-ath +@DRIVER_11AC_SUPPORT +@DRIVER_11AX_SUPPORT \
++  +kmod-crypto-michael-mic +ATH11K_THERMAL:kmod-hwmon-core +ATH11K_THERMAL:kmod-thermal
++  FILES:=$(PKG_BUILD_DIR)/drivers/soc/qcom/qmi_helpers.ko \
++  $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath11k/ath11k.ko
++endef
++
++define KernelPackage/ath11k/description
++This module adds support for Qualcomm Technologies 802.11ax family of
++chipsets.
++endef
++
++define KernelPackage/ath11k/config
++
++       config ATH11K_THERMAL
++               bool "Enable thermal sensors and throttling support"
++               depends on PACKAGE_kmod-ath11k
++               default y if TARGET_qualcommax
++
++endef
++
++define KernelPackage/ath11k-ahb
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Qualcomm 802.11ax AHB wireless chipset support
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath11k
++  DEPENDS+= @TARGET_qualcommax +kmod-ath11k +kmod-qrtr-smd
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath11k/ath11k_ahb.ko
++  AUTOLOAD:=$(call AutoProbe,ath11k_ahb)
++endef
++
++define KernelPackage/ath11k-ahb/description
++This module adds support for Qualcomm Technologies 802.11ax family of
++chipsets with AHB bus.
++endef
++
++define KernelPackage/ath11k-pci
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Qualcomm 802.11ax PCI wireless chipset support
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath11k
++  DEPENDS+= @PCI_SUPPORT +kmod-qrtr-mhi +kmod-ath11k
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath11k/ath11k_pci.ko
++  AUTOLOAD:=$(call AutoProbe,ath11k_pci)
++endef
++
++define KernelPackage/ath11k-pci/description
++This module adds support for Qualcomm Technologies 802.11ax family of
++chipsets with PCI bus.
++endef
++
++define KernelPackage/carl9170
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Driver for Atheros AR9170 USB sticks
++  DEPENDS:=@USB_SUPPORT +kmod-mac80211 +kmod-ath +kmod-usb-core +kmod-input-core +carl9170-firmware
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/carl9170/carl9170.ko
++  AUTOLOAD:=$(call AutoProbe,carl9170)
++endef
++
++define KernelPackage/owl-loader
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Owl loader for initializing Atheros PCI(e) Wifi chips
++  DEPENDS:=@PCI_SUPPORT +kmod-ath9k
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath9k/ath9k_pci_owl_loader.ko
++  AUTOLOAD:=$(call AutoProbe,ath9k_pci_owl_loader)
++endef
++
++define KernelPackage/owl-loader/description
++  Kernel module that helps to initialize certain Qualcomm
++  Atheros' PCI(e) Wifi chips, which have the init data
++  (which contains the PCI device ID for example) stored
++  together with the calibration data in the file system.
++
++  This is necessary for devices like the Cisco Meraki Z1.
++endef
++
++define KernelPackage/ar5523
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Driver for Atheros AR5523 USB sticks
++  DEPENDS:=@USB_SUPPORT +kmod-mac80211 +kmod-ath +kmod-usb-core +kmod-input-core
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ar5523/ar5523.ko
++  AUTOLOAD:=$(call AutoProbe,ar5523)
++endef
++
++define KernelPackage/wil6210
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=QCA/Wilocity 60g WiFi card wil6210 support
++  DEPENDS+= @PCI_SUPPORT +kmod-mac80211 +wil6210-firmware
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/wil6210/wil6210.ko
++  AUTOLOAD:=$(call AutoProbe,wil6210)
++endef
+diff --git a/package/kernel/mac80211/broadcom.mk b/package/kernel/mac80211/broadcom.mk
+new file mode 100644
+index 0000000000..13da62a6f4
+--- /dev/null
++++ b/package/kernel/mac80211/broadcom.mk
+@@ -0,0 +1,492 @@
++PKG_DRIVERS += \
++	b43 brcmsmac brcmfmac brcmutil
++
++PKG_CONFIG_DEPENDS += \
++	CONFIG_PACKAGE_B43_DEBUG \
++	CONFIG_PACKAGE_B43_PIO \
++	CONFIG_PACKAGE_B43_PHY_G \
++	CONFIG_PACKAGE_B43_PHY_N \
++	CONFIG_PACKAGE_B43_PHY_LP \
++	CONFIG_PACKAGE_B43_PHY_HT \
++	CONFIG_PACKAGE_B43_BUSES_BCMA_AND_SSB \
++	CONFIG_PACKAGE_B43_BUSES_BCMA \
++	CONFIG_PACKAGE_B43_BUSES_SSB \
++	CONFIG_PACKAGE_BRCM80211_DEBUG
++
++config-$(call config_package,b43) += B43
++config-$(CONFIG_PACKAGE_B43_BUSES_BCMA_AND_SSB) += B43_BUSES_BCMA_AND_SSB
++config-$(CONFIG_PACKAGE_B43_BUSES_BCMA) += B43_BUSES_BCMA
++config-$(CONFIG_PACKAGE_B43_BUSES_SSB) += B43_BUSES_SSB
++config-$(CONFIG_PACKAGE_B43_PHY_G) += B43_PHY_G
++config-$(CONFIG_PACKAGE_B43_PHY_N) += B43_PHY_N
++config-$(CONFIG_PACKAGE_B43_PHY_LP) += B43_PHY_LP
++config-$(CONFIG_PACKAGE_B43_PHY_HT) += B43_PHY_HT
++config-$(CONFIG_PACKAGE_B43_PIO) += B43_PIO
++config-$(CONFIG_PACKAGE_B43_DEBUG) += B43_DEBUG
++
++config-$(call config_package,brcmutil) += BRCMUTIL
++config-$(call config_package,brcmsmac) += BRCMSMAC
++config-$(call config_package,brcmfmac) += BRCMFMAC
++config-$(CONFIG_BRCMFMAC_SDIO) += BRCMFMAC_SDIO
++config-$(CONFIG_BRCMFMAC_USB) += BRCMFMAC_USB
++config-$(CONFIG_BRCMFMAC_PCIE) += BRCMFMAC_PCIE
++config-$(CONFIG_PACKAGE_BRCM80211_DEBUG) += BRCMDBG
++
++config-$(CONFIG_LEDS_TRIGGERS) += B43_LEDS B43LEGACY_LEDS
++
++#Broadcom firmware
++ifneq ($(CONFIG_B43_FW_6_30),)
++  PKG_B43_FWV4_NAME:=broadcom-wl
++  PKG_B43_FWV4_VERSION:=6.30.163.46
++  PKG_B43_FWV4_OBJECT:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION).wl_apsta.o
++  PKG_B43_FWV4_SOURCE:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION).tar.bz2
++  PKG_B43_FWV4_SOURCE_URL:=http://www.lwfinger.com/b43-firmware/
++  PKG_B43_FWV4_HASH:=a07c3b6b277833c7dbe61daa511f908cd66c5e2763eb7a0859abc36cd9335c2d
++else
++ifneq ($(CONFIG_B43_FW_5_10),)
++  PKG_B43_FWV4_NAME:=broadcom-wl
++  PKG_B43_FWV4_VERSION:=5.10.56.27.3
++  PKG_B43_FWV4_OBJECT:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION)/driver/wl_apsta/wl_prebuilt.o
++  PKG_B43_FWV4_SOURCE:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION)_mipsel.tar.bz2
++  PKG_B43_FWV4_SOURCE_URL:=@OPENWRT
++  PKG_B43_FWV4_HASH:=26a8c370f48fc129d0731cfd751c36cae1419b0bc8ca35781126744e60eae009
++else
++ifneq ($(CONFIG_B43_FW_4_178),)
++  PKG_B43_FWV4_NAME:=broadcom-wl
++  PKG_B43_FWV4_VERSION:=4.178.10.4
++  PKG_B43_FWV4_OBJECT:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION)/linux/wl_apsta.o
++  PKG_B43_FWV4_SOURCE:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION).tar.bz2
++  PKG_B43_FWV4_SOURCE_URL:=@OPENWRT
++  PKG_B43_FWV4_HASH:=32f6ad98facbb9045646fdc8b54bb03086d204153253f9c65d0234a5d90ae53f
++else
++ifneq ($(CONFIG_B43_FW_5_100_138),)
++  PKG_B43_FWV4_NAME:=broadcom-wl
++  PKG_B43_FWV4_VERSION:=5.100.138
++  PKG_B43_FWV4_OBJECT:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION)/linux/wl_apsta.o
++  PKG_B43_FWV4_SOURCE:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION).tar.bz2
++  PKG_B43_FWV4_SOURCE_URL:=http://www.lwfinger.com/b43-firmware/
++  PKG_B43_FWV4_HASH:=f1e7067aac5b62b67b8b6e4c517990277804339ac16065eb13c731ff909ae46f
++else
++  PKG_B43_FWV4_NAME:=broadcom-wl
++  PKG_B43_FWV4_VERSION:=4.150.10.5
++  PKG_B43_FWV4_OBJECT:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION)/driver/wl_apsta_mimo.o
++  PKG_B43_FWV4_SOURCE:=$(PKG_B43_FWV4_NAME)-$(PKG_B43_FWV4_VERSION).tar.bz2
++  PKG_B43_FWV4_SOURCE_URL:=@OPENWRT
++  PKG_B43_FWV4_HASH:=a9f4e276a4d8d3a1cd0f2eb87080ae89b77f0a7140f06d4e9e2135fc44fdd533
++endif
++endif
++endif
++endif
++ifneq ($(CONFIG_B43_OPENFIRMWARE),)
++  PKG_B43_FWV4_NAME:=broadcom-wl
++  PKG_B43_FWV4_VERSION:=5.2
++  PKG_B43_FWV4_OBJECT:=openfwwf-$(PKG_B43_FWV4_VERSION)
++  PKG_B43_FWV4_SOURCE:=openfwwf-$(PKG_B43_FWV4_VERSION).tar.gz
++  PKG_B43_FWV4_SOURCE_URL:=http://netweb.ing.unibs.it/~openfwwf/firmware
++  PKG_B43_FWV4_HASH:=9de03320083201080b2e94b81637ac07a159cf4e6f3481383e1a217e627bc0dc
++endif
++
++
++define Download/b43
++  FILE:=$(PKG_B43_FWV4_SOURCE)
++  URL:=$(PKG_B43_FWV4_SOURCE_URL)
++  HASH:=$(PKG_B43_FWV4_HASH)
++endef
++$(eval $(call Download,b43))
++
++define KernelPackage/b43
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Broadcom 43xx wireless support
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/b43
++  KCONFIG:= \
++  	CONFIG_HW_RANDOM=y
++  # Depend on PCI_SUPPORT to make sure we can select kmod-bcma or kmod-ssb
++  DEPENDS += \
++	@PCI_SUPPORT +kmod-mac80211 +kmod-lib-cordic \
++	$(if $(CONFIG_PACKAGE_B43_USE_SSB),+kmod-ssb) \
++	$(if $(CONFIG_PACKAGE_B43_USE_BCMA),+kmod-bcma)
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/broadcom/b43/b43.ko
++  AUTOLOAD:=$(call AutoProbe,b43)
++  MENU:=1
++endef
++
++define KernelPackage/b43/config
++
++config PACKAGE_B43_USE_SSB
++	select PACKAGE_kmod-ssb
++	tristate
++	depends on !TARGET_bcm47xx && !TARGET_bcm63xx
++	default PACKAGE_kmod-b43 if PACKAGE_B43_BUSES_BCMA_AND_SSB
++	default PACKAGE_kmod-b43 if PACKAGE_B43_BUSES_SSB
++
++config PACKAGE_B43_USE_BCMA
++	select PACKAGE_kmod-bcma
++	tristate
++	depends on !TARGET_bcm47xx && !TARGET_bcm53xx
++	default PACKAGE_kmod-b43 if PACKAGE_B43_BUSES_BCMA_AND_SSB
++	default PACKAGE_kmod-b43 if PACKAGE_B43_BUSES_BCMA
++
++  if PACKAGE_kmod-b43
++
++	choice
++		prompt "b43 firmware version"
++		default B43_FW_5_100_138
++		help
++		  This option allows you to select the version of the b43 firmware.
++
++	config B43_FW_4_150
++		bool "Firmware 410.2160 from driver 4.150.10.5 (old stable)"
++		help
++		  Old stable firmware for BCM43xx devices.
++
++		  If unsure, select this.
++
++	config B43_FW_4_178
++		bool "Firmware 478.104 from driver 4.178.10.4"
++		help
++		  Older firmware for BCM43xx devices.
++
++		  If unsure, select the "stable" firmware.
++
++	config B43_FW_5_10
++		bool "Firmware 508.1084 from driver 5.10.56.27"
++		help
++		  Older firmware for BCM43xx devices.
++
++		  If unsure, select the "stable" firmware.
++
++	config B43_FW_5_100_138
++		bool "Firmware 666.2 from driver 5.100.138 (stable)"
++		help
++		  The currently default firmware for BCM43xx devices.
++
++		  This firmware currently gets most of the testing and is needed for some N-PHY devices.
++
++		  If unsure, select the this firmware.
++
++	config B43_FW_6_30
++		bool "Firmware 784.2 from driver 6.30.163.46 (experimental)"
++		help
++		  Newer experimental firmware for BCM43xx devices.
++
++		  This firmware is mostly untested.
++
++		  If unsure, select the "stable" firmware.
++
++	config B43_OPENFIRMWARE
++		bool "Open FirmWare for WiFi networks"
++		help
++		  Opensource firmware for BCM43xx devices.
++
++		  Do _not_ select this, unless you know what you are doing.
++		  The Opensource firmware is not suitable for embedded devices, yet.
++		  It does not support QoS, which is bad for AccessPoints.
++		  It does not support hardware crypto acceleration, which is a showstopper
++		  for embedded devices with low CPU resources.
++
++		  If unsure, select the "stable" firmware.
++
++	endchoice
++
++	config B43_FW_SQUASH
++		bool "Remove unnecessary firmware files"
++		depends on !B43_OPENFIRMWARE
++		default y
++		help
++		  This options allows you to remove unnecessary b43 firmware files
++		  from the final rootfs image. This can reduce the rootfs size by
++		  up to 200k.
++
++		  If unsure, say Y.
++
++	config B43_FW_SQUASH_COREREVS
++		string "Core revisions to include"
++		depends on B43_FW_SQUASH
++		default "5,6,7,8,9,10,11,13,15" if TARGET_bcm47xx_legacy
++		default "16,28,29,30" if TARGET_bcm47xx_mips74k
++		default "5,6,7,8,9,10,11,13,15,16,28,29,30"
++		help
++		  This is a comma separated list of core revision numbers.
++
++		  Example (keep files for rev5 only):
++		    5
++
++		  Example (keep files for rev5 and rev11):
++		    5,11
++
++	config B43_FW_SQUASH_PHYTYPES
++		string "PHY types to include"
++		depends on B43_FW_SQUASH
++		default "G,N,LP" if TARGET_bcm47xx_legacy
++		default "N,HT" if TARGET_bcm47xx_mips74k
++		default "G,N,LP,HT"
++		help
++		  This is a comma separated list of PHY types:
++		    A  => A-PHY
++		    AG => Dual A-PHY G-PHY
++		    G  => G-PHY
++		    LP => LP-PHY
++		    N  => N-PHY
++		    HT  => HT-PHY
++		    LCN  => LCN-PHY
++		    LCN40  => LCN40-PHY
++		    AC  => AC-PHY
++
++		  Example (keep files for G-PHY only):
++		    G
++
++		  Example (keep files for G-PHY and N-PHY):
++		    G,N
++
++	choice
++		prompt "Supported buses"
++		default PACKAGE_B43_BUSES_BCMA_AND_SSB
++		help
++		  This allows choosing buses that b43 should support.
++
++	config PACKAGE_B43_BUSES_BCMA_AND_SSB
++		depends on !TARGET_bcm47xx_legacy && !TARGET_bcm47xx_mips74k && !TARGET_bcm53xx && !TARGET_bmips
++		bool "BCMA and SSB"
++
++	config PACKAGE_B43_BUSES_BCMA
++		depends on !TARGET_bcm47xx_legacy && !TARGET_bmips_bcm6358 && !TARGET_bmips_bcm6368
++		bool "BCMA only"
++
++	config PACKAGE_B43_BUSES_SSB
++		depends on !TARGET_bcm47xx_mips74k && !TARGET_bcm53xx
++		bool "SSB only"
++
++	endchoice
++
++	config PACKAGE_B43_DEBUG
++		bool "Enable debug output and debugfs for b43"
++		default n
++		help
++		  Enable additional debug output and runtime sanity checks for b43
++		  and enables the debugfs interface.
++
++		  If unsure, say N.
++
++	config PACKAGE_B43_PIO
++		bool "Enable support for PIO transfer mode"
++		default n
++		help
++		  Enable support for using PIO instead of DMA. Unless you have DMA
++		  transfer problems you don't need this.
++
++		  If unsure, say N.
++
++	config PACKAGE_B43_PHY_G
++		bool "Enable support for G-PHYs"
++		default n if TARGET_bcm47xx_mips74k
++		default y
++		help
++		  Enable support for G-PHY. This includes support for the following devices:
++		  PCI: BCM4306, BCM4311, BCM4318
++		  SoC: BCM5352E, BCM4712
++
++		  If unsure, say Y.
++
++	config PACKAGE_B43_PHY_N
++		bool "Enable support for N-PHYs"
++		default y
++		help
++		  Enable support for N-PHY. This includes support for the following devices:
++		  PCI: BCM4321, BCM4322, BCM43222, BCM43224, BCM43225
++		  SoC: BCM4716, BCM4717, BCM4718
++
++		  Currently only 11g speed is available.
++
++		  If unsure, say Y.
++
++	config PACKAGE_B43_PHY_LP
++		bool "Enable support for LP-PHYs"
++		default n if TARGET_bcm47xx_mips74k
++		default y
++		help
++		  Enable support for LP-PHY. This includes support for the following devices:
++		  PCI: BCM4312
++		  SoC: BCM5354
++
++		  If unsure, say Y.
++
++	config PACKAGE_B43_PHY_HT
++		bool "Enable support for HT-PHYs"
++		default n if TARGET_bcm47xx_legacy
++		default y
++		help
++		  Enable support for HT-PHY. This includes support for the following devices:
++		  PCI: BCM4331
++
++		  Currently only 11g speed is available.
++
++		  If unsure, say Y.
++
++	config PACKAGE_B43_PHY_LCN
++		bool "Enable support for LCN-PHYs"
++		depends on BROKEN
++		default n
++		help
++		  Currently broken.
++
++		  If unsure, say N.
++
++  endif
++endef
++
++define KernelPackage/b43/description
++Kernel module for Broadcom 43xx wireless support (mac80211 stack) new
++endef
++
++define KernelPackage/brcmutil
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Broadcom IEEE802.11n common driver parts
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/brcm80211
++  DEPENDS+=@PCI_SUPPORT||USB_SUPPORT
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/broadcom/brcm80211/brcmutil/brcmutil.ko
++  AUTOLOAD:=$(call AutoProbe,brcmutil)
++  MENU:=1
++endef
++
++define KernelPackage/brcmutil/description
++ This module contains some common parts needed by Broadcom Wireless drivers brcmsmac and brcmfmac.
++endef
++
++define KernelPackage/brcmutil/config
++  if PACKAGE_kmod-brcmutil
++
++	config PACKAGE_BRCM80211_DEBUG
++		bool "Broadcom wireless driver debugging"
++		help
++		  Say Y, if you want to debug brcmsmac and brcmfmac wireless driver.
++
++  endif
++endef
++
++PKG_BRCMSMAC_FW_NAME:=broadcom-wl
++PKG_BRCMSMAC_FW_VERSION:=5.100.138
++PKG_BRCMSMAC_FW_OBJECT:=$(PKG_BRCMSMAC_FW_NAME)-$(PKG_BRCMSMAC_FW_VERSION)/linux/wl_apsta.o
++PKG_BRCMSMAC_FW_SOURCE:=$(PKG_BRCMSMAC_FW_NAME)-$(PKG_BRCMSMAC_FW_VERSION).tar.bz2
++PKG_BRCMSMAC_FW_SOURCE_URL:=http://www.lwfinger.com/b43-firmware/
++PKG_BRCMSMAC_FW_HASH:=f1e7067aac5b62b67b8b6e4c517990277804339ac16065eb13c731ff909ae46f
++
++define Download/brcmsmac
++  FILE:=$(PKG_BRCMSMAC_FW_SOURCE)
++  URL:=$(PKG_BRCMSMAC_FW_SOURCE_URL)
++  HASH:=$(PKG_BRCMSMAC_FW_HASH)
++endef
++$(eval $(call Download,brcmsmac))
++
++define KernelPackage/brcmsmac
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Broadcom IEEE802.11n PCIe SoftMAC WLAN driver
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/brcm80211
++  DEPENDS+=@!TARGET_bcm47xx_legacy +kmod-mac80211 +!TARGET_bcm47xx:kmod-bcma +kmod-lib-cordic +kmod-lib-crc8 +kmod-brcmutil +!BRCMSMAC_USE_FW_FROM_WL:brcmsmac-firmware
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcmsmac.ko
++  AUTOLOAD:=$(call AutoProbe,brcmsmac)
++  MENU:=1
++endef
++
++define KernelPackage/brcmsmac/description
++ Kernel module for Broadcom IEEE802.11n PCIe Wireless cards
++endef
++
++define KernelPackage/brcmsmac/config
++  if PACKAGE_kmod-brcmsmac
++
++	config BRCMSMAC_USE_FW_FROM_WL
++		bool "Use firmware extracted from broadcom proprietary driver"
++		default y
++		help
++		  Instead of using the official brcmsmac firmware a firmware
++		  version 666.2 extracted from the proprietary Broadcom driver
++		  is used. This is needed to get core rev 17 used in bcm4716
++		  to work.
++
++		  If unsure, say Y.
++
++  endif
++endef
++
++
++define KernelPackage/brcmfmac
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Broadcom IEEE802.11n USB FullMAC WLAN driver
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/brcm80211
++  DEPENDS+= @USB_SUPPORT +kmod-cfg80211 +@DRIVER_11AC_SUPPORT \
++  	+kmod-brcmutil +BRCMFMAC_SDIO:kmod-mmc @!TARGET_uml \
++	+BRCMFMAC_USB:kmod-usb-core +BRCMFMAC_USB:brcmfmac-firmware-usb
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/broadcom/brcm80211/brcmfmac/brcmfmac.ko
++  AUTOLOAD:=$(call AutoProbe,brcmfmac)
++endef
++
++define KernelPackage/brcmfmac/description
++ Kernel module for Broadcom IEEE802.11n USB Wireless cards
++endef
++
++define KernelPackage/brcmfmac/config
++  if PACKAGE_kmod-brcmfmac
++
++	config BRCMFMAC_SDIO
++		bool "Enable SDIO bus interface support"
++		default y if TARGET_bcm27xx
++		default y if TARGET_imx_cortexa7
++		default y if TARGET_rockchip
++		default y if TARGET_sunxi
++		default n
++		help
++		  Enable support for cards attached to an SDIO bus.
++		  Select this option only if you are sure that your
++		  board has a Broadcom wireless chip atacched to
++		  that bus.
++
++	config BRCMFMAC_USB
++		bool "Enable USB bus interface support"
++		depends on USB_SUPPORT
++		default y
++		help
++		  Supported USB connected chipsets:
++		  BCM43235, BCM43236, BCM43238 (all in revision 3 only)
++		  BCM43143, BCM43242, BCM43566, BCM43569
++
++	config BRCMFMAC_PCIE
++		bool "Enable PCIE bus interface support"
++		depends on PCI_SUPPORT
++		default y
++		help
++		  Supported PCIe connected chipsets:
++		  BCM4354, BCM4356, BCM43567, BCM43570, BCM43602
++
++  endif
++endef
++
++
++define KernelPackage/b43/install
++	rm -rf $(1)/lib/firmware/
++ifeq ($(CONFIG_B43_OPENFIRMWARE),y)
++	tar xzf "$(DL_DIR)/$(PKG_B43_FWV4_SOURCE)" -C "$(PKG_BUILD_DIR)"
++else
++	tar xjf "$(DL_DIR)/$(PKG_B43_FWV4_SOURCE)" -C "$(PKG_BUILD_DIR)"
++endif
++	$(INSTALL_DIR) $(1)/lib/firmware/
++ifeq ($(CONFIG_B43_OPENFIRMWARE),y)
++	$(MAKE) -C "$(PKG_BUILD_DIR)/$(PKG_B43_FWV4_OBJECT)/"
++	$(INSTALL_DIR) $(1)/lib/firmware/b43-open/
++	$(INSTALL_DATA) $(PKG_BUILD_DIR)/$(PKG_B43_FWV4_OBJECT)/ucode5.fw $(1)/lib/firmware/b43-open/ucode5.fw
++	$(INSTALL_DATA) $(PKG_BUILD_DIR)/$(PKG_B43_FWV4_OBJECT)/b0g0bsinitvals5.fw $(1)/lib/firmware/b43-open/b0g0bsinitvals5.fw
++	$(INSTALL_DATA) $(PKG_BUILD_DIR)/$(PKG_B43_FWV4_OBJECT)/b0g0initvals5.fw $(1)/lib/firmware/b43-open/b0g0initvals5.fw
++else
++	b43-fwcutter -w $(1)/lib/firmware/ $(PKG_BUILD_DIR)/$(PKG_B43_FWV4_OBJECT)
++endif
++ifneq ($(CONFIG_B43_FW_SQUASH),)
++	b43-fwsquash.py "$(CONFIG_B43_FW_SQUASH_PHYTYPES)" "$(CONFIG_B43_FW_SQUASH_COREREVS)" "$(1)/lib/firmware/b43"
++endif
++endef
++
++define KernelPackage/brcmsmac/install
++	$(INSTALL_DIR) $(1)/lib/firmware/brcm
++ifeq ($(CONFIG_BRCMSMAC_USE_FW_FROM_WL),y)
++	tar xjf "$(DL_DIR)/$(PKG_BRCMSMAC_FW_SOURCE)" -C "$(PKG_BUILD_DIR)"
++	b43-fwcutter --brcmsmac -w $(1)/lib/firmware/ $(PKG_BUILD_DIR)/$(PKG_BRCMSMAC_FW_OBJECT)
++endif
++endef
+diff --git a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh
+new file mode 100644
+index 0000000000..3b88af4679
+--- /dev/null
++++ b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh
+@@ -0,0 +1,1219 @@
++#!/bin/sh
++. /lib/netifd/netifd-wireless.sh
++. /lib/netifd/hostapd.sh
++. /lib/functions/system.sh
++
++init_wireless_driver "$@"
++
++MP_CONFIG_INT="mesh_retry_timeout mesh_confirm_timeout mesh_holding_timeout mesh_max_peer_links
++	       mesh_max_retries mesh_ttl mesh_element_ttl mesh_hwmp_max_preq_retries
++	       mesh_path_refresh_time mesh_min_discovery_timeout mesh_hwmp_active_path_timeout
++	       mesh_hwmp_preq_min_interval mesh_hwmp_net_diameter_traversal_time mesh_hwmp_rootmode
++	       mesh_hwmp_rann_interval mesh_gate_announcements mesh_sync_offset_max_neighor
++	       mesh_rssi_threshold mesh_hwmp_active_path_to_root_timeout mesh_hwmp_root_interval
++	       mesh_hwmp_confirmation_interval mesh_awake_window mesh_plink_timeout"
++MP_CONFIG_BOOL="mesh_auto_open_plinks mesh_fwding"
++MP_CONFIG_STRING="mesh_power_mode"
++
++wdev_tool() {
++	ucode /usr/share/hostap/wdev.uc "$@"
++}
++
++drv_mac80211_init_device_config() {
++	hostapd_common_add_device_config
++
++	config_add_string path phy 'macaddr:macaddr'
++	config_add_string tx_burst
++	config_add_string distance
++	config_add_int beacon_int chanbw frag rts
++	config_add_int rxantenna txantenna txpower min_tx_power
++	config_add_boolean noscan ht_coex acs_exclude_dfs background_radar
++	config_add_array ht_capab
++	config_add_array channels
++	config_add_array scan_list
++	config_add_boolean \
++		rxldpc \
++		short_gi_80 \
++		short_gi_160 \
++		tx_stbc_2by1 \
++		su_beamformer \
++		su_beamformee \
++		mu_beamformer \
++		mu_beamformee \
++		he_su_beamformer \
++		he_su_beamformee \
++		he_mu_beamformer \
++		vht_txop_ps \
++		htc_vht \
++		rx_antenna_pattern \
++		tx_antenna_pattern \
++		he_spr_sr_control \
++		he_spr_psr_enabled \
++		he_bss_color_enabled \
++		he_twt_required
++	config_add_int \
++		beamformer_antennas \
++		beamformee_antennas \
++		vht_max_a_mpdu_len_exp \
++		vht_max_mpdu \
++		vht_link_adapt \
++		vht160 \
++		rx_stbc \
++		tx_stbc \
++		he_bss_color \
++		he_spr_non_srg_obss_pd_max_offset
++	config_add_boolean \
++		ldpc \
++		greenfield \
++		short_gi_20 \
++		short_gi_40 \
++		max_amsdu \
++		dsss_cck_40
++}
++
++drv_mac80211_init_iface_config() {
++	hostapd_common_add_bss_config
++
++	config_add_string 'macaddr:macaddr' ifname
++
++	config_add_boolean wds powersave enable
++	config_add_string wds_bridge
++	config_add_int maxassoc
++	config_add_int max_listen_int
++	config_add_int dtim_period
++	config_add_int start_disabled
++
++	# mesh
++	config_add_string mesh_id
++	config_add_int $MP_CONFIG_INT
++	config_add_boolean $MP_CONFIG_BOOL
++	config_add_string $MP_CONFIG_STRING
++}
++
++mac80211_add_capabilities() {
++	local __var="$1"; shift
++	local __mask="$1"; shift
++	local __out= oifs
++
++	oifs="$IFS"
++	IFS=:
++	for capab in "$@"; do
++		set -- $capab
++
++		[ "$(($4))" -gt 0 ] || continue
++		[ "$(($__mask & $2))" -eq "$((${3:-$2}))" ] || continue
++		__out="$__out[$1]"
++	done
++	IFS="$oifs"
++
++	export -n -- "$__var=$__out"
++}
++
++mac80211_add_he_capabilities() {
++	local __out= oifs
++
++	oifs="$IFS"
++	IFS=:
++	for capab in "$@"; do
++		set -- $capab
++		[ "$(($4))" -gt 0 ] || continue
++		[ "$(((0x$2) & $3))" -gt 0 ] || {
++			eval "$1=0"
++			continue
++		}
++		append base_cfg "$1=1" "$N"
++	done
++	IFS="$oifs"
++}
++
++mac80211_hostapd_setup_base() {
++	local phy="$1"
++
++	json_select config
++
++	[ "$auto_channel" -gt 0 ] && channel=acs_survey
++
++	[ "$auto_channel" -gt 0 ] && json_get_vars acs_exclude_dfs
++	[ -n "$acs_exclude_dfs" ] && [ "$acs_exclude_dfs" -gt 0 ] &&
++		append base_cfg "acs_exclude_dfs=1" "$N"
++
++	json_get_vars noscan ht_coex min_tx_power:0 tx_burst
++	json_get_values ht_capab_list ht_capab
++	json_get_values channel_list channels
++
++	[ "$auto_channel" = 0 ] && [ -z "$channel_list" ] && \
++		channel_list="$channel"
++
++	[ "$min_tx_power" -gt 0 ] && append base_cfg "min_tx_power=$min_tx_power"
++
++	set_default noscan 0
++
++	[ "$noscan" -gt 0 ] && hostapd_noscan=1
++	[ "$tx_burst" = 0 ] && tx_burst=
++
++	chan_ofs=0
++	[ "$band" = "6g" ] && chan_ofs=1
++
++	ieee80211n=1
++	ht_capab=
++	case "$htmode" in
++		VHT20|HT20|HE20) ;;
++		HT40*|VHT40|VHT80|VHT160|HE40|HE80|HE160)
++			case "$hwmode" in
++				a)
++					case "$(( (($channel / 4) + $chan_ofs) % 2 ))" in
++						1) ht_capab="[HT40+]";;
++						0) ht_capab="[HT40-]";;
++					esac
++				;;
++				*)
++					case "$htmode" in
++						HT40+) ht_capab="[HT40+]";;
++						HT40-) ht_capab="[HT40-]";;
++						*)
++							if [ "$channel" -lt 7 ]; then
++								ht_capab="[HT40+]"
++							else
++								ht_capab="[HT40-]"
++							fi
++						;;
++					esac
++				;;
++			esac
++			[ "$auto_channel" -gt 0 ] && ht_capab="[HT40+]"
++		;;
++		*) ieee80211n= ;;
++	esac
++
++	[ -n "$ieee80211n" ] && {
++		append base_cfg "ieee80211n=1" "$N"
++
++		set_default ht_coex 0
++		append base_cfg "ht_coex=$ht_coex" "$N"
++
++		json_get_vars \
++			ldpc:1 \
++			greenfield:0 \
++			short_gi_20:1 \
++			short_gi_40:1 \
++			tx_stbc:1 \
++			rx_stbc:3 \
++			max_amsdu:1 \
++			dsss_cck_40:1
++
++		ht_cap_mask=0
++		for cap in $(iw phy "$phy" info | grep 'Capabilities:' | cut -d: -f2); do
++			ht_cap_mask="$(($ht_cap_mask | $cap))"
++		done
++
++		cap_rx_stbc=$((($ht_cap_mask >> 8) & 3))
++		[ "$rx_stbc" -lt "$cap_rx_stbc" ] && cap_rx_stbc="$rx_stbc"
++		ht_cap_mask="$(( ($ht_cap_mask & ~(0x300)) | ($cap_rx_stbc << 8) ))"
++
++		mac80211_add_capabilities ht_capab_flags $ht_cap_mask \
++			LDPC:0x1::$ldpc \
++			GF:0x10::$greenfield \
++			SHORT-GI-20:0x20::$short_gi_20 \
++			SHORT-GI-40:0x40::$short_gi_40 \
++			TX-STBC:0x80::$tx_stbc \
++			RX-STBC1:0x300:0x100:1 \
++			RX-STBC12:0x300:0x200:1 \
++			RX-STBC123:0x300:0x300:1 \
++			MAX-AMSDU-7935:0x800::$max_amsdu \
++			DSSS_CCK-40:0x1000::$dsss_cck_40
++
++		ht_capab="$ht_capab$ht_capab_flags"
++		[ -n "$ht_capab" ] && append base_cfg "ht_capab=$ht_capab" "$N"
++	}
++
++	# 802.11ac
++	enable_ac=0
++	vht_oper_chwidth=0
++	vht_center_seg0=
++
++	idx="$channel"
++	case "$htmode" in
++		VHT20|HE20) enable_ac=1;;
++		VHT40|HE40)
++			case "$(( (($channel / 4) + $chan_ofs) % 2 ))" in
++				1) idx=$(($channel + 2));;
++				0) idx=$(($channel - 2));;
++			esac
++			enable_ac=1
++			vht_center_seg0=$idx
++		;;
++		VHT80|HE80)
++			case "$(( (($channel / 4) + $chan_ofs) % 4 ))" in
++				1) idx=$(($channel + 6));;
++				2) idx=$(($channel + 2));;
++				3) idx=$(($channel - 2));;
++				0) idx=$(($channel - 6));;
++			esac
++			enable_ac=1
++			vht_oper_chwidth=1
++			vht_center_seg0=$idx
++		;;
++		VHT160|HE160)
++			if [ "$band" = "6g" ]; then
++				case "$channel" in
++					1|5|9|13|17|21|25|29) idx=15;;
++					33|37|41|45|49|53|57|61) idx=47;;
++					65|69|73|77|81|85|89|93) idx=79;;
++					97|101|105|109|113|117|121|125) idx=111;;
++					129|133|137|141|145|149|153|157) idx=143;;
++					161|165|169|173|177|181|185|189) idx=175;;
++					193|197|201|205|209|213|217|221) idx=207;;
++				esac
++			else
++				case "$channel" in
++					36|40|44|48|52|56|60|64) idx=50;;
++					100|104|108|112|116|120|124|128) idx=114;;
++				esac
++			fi
++			enable_ac=1
++			vht_oper_chwidth=2
++			vht_center_seg0=$idx
++		;;
++	esac
++	[ "$band" = "5g" ] && {
++		json_get_vars background_radar:0
++
++		[ "$background_radar" -eq 1 ] && append base_cfg "enable_background_radar=1" "$N"
++	}
++	[ "$band" = "6g" ] && {
++		op_class=
++		case "$htmode" in
++			HE20) op_class=131;;
++			HE*) op_class=$((132 + $vht_oper_chwidth))
++		esac
++		[ -n "$op_class" ] && append base_cfg "op_class=$op_class" "$N"
++	}
++	[ "$hwmode" = "a" ] || enable_ac=0
++
++	if [ "$enable_ac" != "0" ]; then
++		json_get_vars \
++			rxldpc:1 \
++			short_gi_80:1 \
++			short_gi_160:1 \
++			tx_stbc_2by1:1 \
++			su_beamformer:1 \
++			su_beamformee:1 \
++			mu_beamformer:1 \
++			mu_beamformee:1 \
++			vht_txop_ps:1 \
++			htc_vht:1 \
++			beamformee_antennas:4 \
++			beamformer_antennas:4 \
++			rx_antenna_pattern:1 \
++			tx_antenna_pattern:1 \
++			vht_max_a_mpdu_len_exp:7 \
++			vht_max_mpdu:11454 \
++			rx_stbc:4 \
++			vht_link_adapt:3 \
++			vht160:2
++
++		set_default tx_burst 2.0
++		append base_cfg "ieee80211ac=1" "$N"
++		vht_cap=0
++		for cap in $(iw phy "$phy" info | awk -F "[()]" '/VHT Capabilities/ { print $2 }'); do
++			vht_cap="$(($vht_cap | $cap))"
++		done
++
++		append base_cfg "vht_oper_chwidth=$vht_oper_chwidth" "$N"
++		append base_cfg "vht_oper_centr_freq_seg0_idx=$vht_center_seg0" "$N"
++
++		cap_rx_stbc=$((($vht_cap >> 8) & 7))
++		[ "$rx_stbc" -lt "$cap_rx_stbc" ] && cap_rx_stbc="$rx_stbc"
++		vht_cap="$(( ($vht_cap & ~(0x700)) | ($cap_rx_stbc << 8) ))"
++
++		mac80211_add_capabilities vht_capab $vht_cap \
++			RXLDPC:0x10::$rxldpc \
++			SHORT-GI-80:0x20::$short_gi_80 \
++			SHORT-GI-160:0x40::$short_gi_160 \
++			TX-STBC-2BY1:0x80::$tx_stbc_2by1 \
++			SU-BEAMFORMER:0x800::$su_beamformer \
++			SU-BEAMFORMEE:0x1000::$su_beamformee \
++			MU-BEAMFORMER:0x80000::$mu_beamformer \
++			MU-BEAMFORMEE:0x100000::$mu_beamformee \
++			VHT-TXOP-PS:0x200000::$vht_txop_ps \
++			HTC-VHT:0x400000::$htc_vht \
++			RX-ANTENNA-PATTERN:0x10000000::$rx_antenna_pattern \
++			TX-ANTENNA-PATTERN:0x20000000::$tx_antenna_pattern \
++			RX-STBC-1:0x700:0x100:1 \
++			RX-STBC-12:0x700:0x200:1 \
++			RX-STBC-123:0x700:0x300:1 \
++			RX-STBC-1234:0x700:0x400:1 \
++
++		[ "$(($vht_cap & 0x800))" -gt 0 -a "$su_beamformer" -gt 0 ] && {
++			cap_ant="$(( ( ($vht_cap >> 16) & 3 ) + 1 ))"
++			[ "$cap_ant" -gt "$beamformer_antennas" ] && cap_ant="$beamformer_antennas"
++			[ "$cap_ant" -gt 1 ] && vht_capab="$vht_capab[SOUNDING-DIMENSION-$cap_ant]"
++		}
++
++		[ "$(($vht_cap & 0x1000))" -gt 0 -a "$su_beamformee" -gt 0 ] && {
++			cap_ant="$(( ( ($vht_cap >> 13) & 3 ) + 1 ))"
++			[ "$cap_ant" -gt "$beamformee_antennas" ] && cap_ant="$beamformee_antennas"
++			[ "$cap_ant" -gt 1 ] && vht_capab="$vht_capab[BF-ANTENNA-$cap_ant]"
++		}
++
++		# supported Channel widths
++		vht160_hw=0
++		[ "$(($vht_cap & 12))" -eq 4 -a 1 -le "$vht160" ] && \
++			vht160_hw=1
++		[ "$(($vht_cap & 12))" -eq 8 -a 2 -le "$vht160" ] && \
++			vht160_hw=2
++		[ "$vht160_hw" = 1 ] && vht_capab="$vht_capab[VHT160]"
++		[ "$vht160_hw" = 2 ] && vht_capab="$vht_capab[VHT160-80PLUS80]"
++
++		# maximum MPDU length
++		vht_max_mpdu_hw=3895
++		[ "$(($vht_cap & 3))" -ge 1 -a 7991 -le "$vht_max_mpdu" ] && \
++			vht_max_mpdu_hw=7991
++		[ "$(($vht_cap & 3))" -ge 2 -a 11454 -le "$vht_max_mpdu" ] && \
++			vht_max_mpdu_hw=11454
++		[ "$vht_max_mpdu_hw" != 3895 ] && \
++			vht_capab="$vht_capab[MAX-MPDU-$vht_max_mpdu_hw]"
++
++		# maximum A-MPDU length exponent
++		vht_max_a_mpdu_len_exp_hw=0
++		[ "$(($vht_cap & 58720256))" -ge 8388608 -a 1 -le "$vht_max_a_mpdu_len_exp" ] && \
++			vht_max_a_mpdu_len_exp_hw=1
++		[ "$(($vht_cap & 58720256))" -ge 16777216 -a 2 -le "$vht_max_a_mpdu_len_exp" ] && \
++			vht_max_a_mpdu_len_exp_hw=2
++		[ "$(($vht_cap & 58720256))" -ge 25165824 -a 3 -le "$vht_max_a_mpdu_len_exp" ] && \
++			vht_max_a_mpdu_len_exp_hw=3
++		[ "$(($vht_cap & 58720256))" -ge 33554432 -a 4 -le "$vht_max_a_mpdu_len_exp" ] && \
++			vht_max_a_mpdu_len_exp_hw=4
++		[ "$(($vht_cap & 58720256))" -ge 41943040 -a 5 -le "$vht_max_a_mpdu_len_exp" ] && \
++			vht_max_a_mpdu_len_exp_hw=5
++		[ "$(($vht_cap & 58720256))" -ge 50331648 -a 6 -le "$vht_max_a_mpdu_len_exp" ] && \
++			vht_max_a_mpdu_len_exp_hw=6
++		[ "$(($vht_cap & 58720256))" -ge 58720256 -a 7 -le "$vht_max_a_mpdu_len_exp" ] && \
++			vht_max_a_mpdu_len_exp_hw=7
++		vht_capab="$vht_capab[MAX-A-MPDU-LEN-EXP$vht_max_a_mpdu_len_exp_hw]"
++
++		# whether or not the STA supports link adaptation using VHT variant
++		vht_link_adapt_hw=0
++		[ "$(($vht_cap & 201326592))" -ge 134217728 -a 2 -le "$vht_link_adapt" ] && \
++			vht_link_adapt_hw=2
++		[ "$(($vht_cap & 201326592))" -ge 201326592 -a 3 -le "$vht_link_adapt" ] && \
++			vht_link_adapt_hw=3
++		[ "$vht_link_adapt_hw" != 0 ] && \
++			vht_capab="$vht_capab[VHT-LINK-ADAPT-$vht_link_adapt_hw]"
++
++		[ -n "$vht_capab" ] && append base_cfg "vht_capab=$vht_capab" "$N"
++	fi
++
++	# 802.11ax
++	enable_ax=0
++	case "$htmode" in
++		HE*) enable_ax=1 ;;
++	esac
++
++	if [ "$enable_ax" != "0" ]; then
++		json_get_vars \
++			he_su_beamformer:1 \
++			he_su_beamformee:1 \
++			he_mu_beamformer:1 \
++			he_twt_required:0 \
++			he_spr_sr_control:3 \
++			he_spr_psr_enabled:0 \
++			he_spr_non_srg_obss_pd_max_offset:0 \
++			he_bss_color:128 \
++			he_bss_color_enabled:1
++
++		he_phy_cap=$(iw phy "$phy" info | sed -n '/HE Iftypes: AP/,$p' | awk -F "[()]" '/HE PHY Capabilities/ { print $2 }' | head -1)
++		he_phy_cap=${he_phy_cap:2}
++		he_mac_cap=$(iw phy "$phy" info | sed -n '/HE Iftypes: AP/,$p' | awk -F "[()]" '/HE MAC Capabilities/ { print $2 }' | head -1)
++		he_mac_cap=${he_mac_cap:2}
++
++		append base_cfg "ieee80211ax=1" "$N"
++		[ "$hwmode" = "a" ] && {
++			append base_cfg "he_oper_chwidth=$vht_oper_chwidth" "$N"
++			append base_cfg "he_oper_centr_freq_seg0_idx=$vht_center_seg0" "$N"
++		}
++
++		mac80211_add_he_capabilities \
++			he_su_beamformer:${he_phy_cap:6:2}:0x80:$he_su_beamformer \
++			he_su_beamformee:${he_phy_cap:8:2}:0x1:$he_su_beamformee \
++			he_mu_beamformer:${he_phy_cap:8:2}:0x2:$he_mu_beamformer \
++			he_spr_psr_enabled:${he_phy_cap:14:2}:0x1:$he_spr_psr_enabled \
++			he_twt_required:${he_mac_cap:0:2}:0x6:$he_twt_required
++
++		if [ "$he_bss_color_enabled" -gt 0 ]; then
++			append base_cfg "he_bss_color=$he_bss_color" "$N"
++			[ "$he_spr_non_srg_obss_pd_max_offset" -gt 0 ] && { \
++				append base_cfg "he_spr_non_srg_obss_pd_max_offset=$he_spr_non_srg_obss_pd_max_offset" "$N"
++				he_spr_sr_control=$((he_spr_sr_control | (1 << 2)))
++			}
++			[ "$he_spr_psr_enabled" -gt 0 ] || he_spr_sr_control=$((he_spr_sr_control | (1 << 0)))
++			append base_cfg "he_spr_sr_control=$he_spr_sr_control" "$N"
++		else
++			append base_cfg "he_bss_color_disabled=1" "$N"
++		fi
++
++
++		append base_cfg "he_default_pe_duration=4" "$N"
++		append base_cfg "he_rts_threshold=1023" "$N"
++		append base_cfg "he_mu_edca_qos_info_param_count=0" "$N"
++		append base_cfg "he_mu_edca_qos_info_q_ack=0" "$N"
++		append base_cfg "he_mu_edca_qos_info_queue_request=0" "$N"
++		append base_cfg "he_mu_edca_qos_info_txop_request=0" "$N"
++		append base_cfg "he_mu_edca_ac_be_aifsn=8" "$N"
++		append base_cfg "he_mu_edca_ac_be_aci=0" "$N"
++		append base_cfg "he_mu_edca_ac_be_ecwmin=9" "$N"
++		append base_cfg "he_mu_edca_ac_be_ecwmax=10" "$N"
++		append base_cfg "he_mu_edca_ac_be_timer=255" "$N"
++		append base_cfg "he_mu_edca_ac_bk_aifsn=15" "$N"
++		append base_cfg "he_mu_edca_ac_bk_aci=1" "$N"
++		append base_cfg "he_mu_edca_ac_bk_ecwmin=9" "$N"
++		append base_cfg "he_mu_edca_ac_bk_ecwmax=10" "$N"
++		append base_cfg "he_mu_edca_ac_bk_timer=255" "$N"
++		append base_cfg "he_mu_edca_ac_vi_ecwmin=5" "$N"
++		append base_cfg "he_mu_edca_ac_vi_ecwmax=7" "$N"
++		append base_cfg "he_mu_edca_ac_vi_aifsn=5" "$N"
++		append base_cfg "he_mu_edca_ac_vi_aci=2" "$N"
++		append base_cfg "he_mu_edca_ac_vi_timer=255" "$N"
++		append base_cfg "he_mu_edca_ac_vo_aifsn=5" "$N"
++		append base_cfg "he_mu_edca_ac_vo_aci=3" "$N"
++		append base_cfg "he_mu_edca_ac_vo_ecwmin=5" "$N"
++		append base_cfg "he_mu_edca_ac_vo_ecwmax=7" "$N"
++		append base_cfg "he_mu_edca_ac_vo_timer=255" "$N"
++	fi
++
++	hostapd_prepare_device_config "$hostapd_conf_file" nl80211
++	cat >> "$hostapd_conf_file" <<EOF
++${channel:+channel=$channel}
++${channel_list:+chanlist=$channel_list}
++${hostapd_noscan:+noscan=1}
++${tx_burst:+tx_queue_data2_burst=$tx_burst}
++$base_cfg
++
++EOF
++	json_select ..
++}
++
++mac80211_hostapd_setup_bss() {
++	local phy="$1"
++	local ifname="$2"
++	local macaddr="$3"
++	local type="$4"
++
++	hostapd_cfg=
++	append hostapd_cfg "$type=$ifname" "$N"
++
++	hostapd_set_bss_options hostapd_cfg "$phy" "$vif" || return 1
++	json_get_vars wds wds_bridge dtim_period max_listen_int start_disabled
++
++	set_default wds 0
++	set_default start_disabled 0
++
++	[ "$wds" -gt 0 ] && {
++		append hostapd_cfg "wds_sta=1" "$N"
++		[ -n "$wds_bridge" ] && append hostapd_cfg "wds_bridge=$wds_bridge" "$N"
++	}
++	[ "$staidx" -gt 0 -o "$start_disabled" -eq 1 ] && append hostapd_cfg "start_disabled=1" "$N"
++
++	cat >> /var/run/hostapd-$phy.conf <<EOF
++$hostapd_cfg
++bssid=$macaddr
++${dtim_period:+dtim_period=$dtim_period}
++${max_listen_int:+max_listen_interval=$max_listen_int}
++EOF
++}
++
++mac80211_get_addr() {
++	local phy="$1"
++	local idx="$(($2 + 1))"
++
++	head -n $idx /sys/class/ieee80211/${phy}/addresses | tail -n1
++}
++
++mac80211_generate_mac() {
++	local phy="$1"
++	local id="${macidx:-0}"
++
++	local ref="$(cat /sys/class/ieee80211/${phy}/macaddress)"
++	local mask="$(cat /sys/class/ieee80211/${phy}/address_mask)"
++
++	[ "$mask" = "00:00:00:00:00:00" ] && {
++		mask="ff:ff:ff:ff:ff:ff";
++
++		[ "$(wc -l < /sys/class/ieee80211/${phy}/addresses)" -gt $id ] && {
++			addr="$(mac80211_get_addr "$phy" "$id")"
++			[ -n "$addr" ] && {
++				echo "$addr"
++				return
++			}
++		}
++	}
++
++	local oIFS="$IFS"; IFS=":"; set -- $mask; IFS="$oIFS"
++
++	local mask1=$1
++	local mask6=$6
++
++	local oIFS="$IFS"; IFS=":"; set -- $ref; IFS="$oIFS"
++
++	macidx=$(($id + 1))
++	[ "$((0x$mask1))" -gt 0 ] && {
++		b1="0x$1"
++		[ "$id" -gt 0 ] && \
++			b1=$(($b1 ^ ((($id - !($b1 & 2)) << 2)) | 0x2))
++		printf "%02x:%s:%s:%s:%s:%s" $b1 $2 $3 $4 $5 $6
++		return
++	}
++
++	[ "$((0x$mask6))" -lt 255 ] && {
++		printf "%s:%s:%s:%s:%s:%02x" $1 $2 $3 $4 $5 $(( 0x$6 ^ $id ))
++		return
++	}
++
++	off2=$(( (0x$6 + $id) / 0x100 ))
++	printf "%s:%s:%s:%s:%02x:%02x" \
++		$1 $2 $3 $4 \
++		$(( (0x$5 + $off2) % 0x100 )) \
++		$(( (0x$6 + $id) % 0x100 ))
++}
++
++get_board_phy_name() (
++	local path="$1"
++	local fallback_phy=""
++
++	__check_phy() {
++		local val="$1"
++		local key="$2"
++		local ref_path="$3"
++
++		json_select "$key"
++		json_get_values path
++		json_select ..
++
++		[ "${ref_path%+*}" = "$path" ] && fallback_phy=$key
++		[ "$ref_path" = "$path" ] || return 0
++
++		echo "$key"
++		exit
++	}
++
++	json_load_file /etc/board.json
++	json_for_each_item __check_phy wlan "$path"
++	[ -n "$fallback_phy" ] && echo "${fallback_phy}.${path##*+}"
++)
++
++rename_board_phy_by_path() {
++	local path="$1"
++
++	local new_phy="$(get_board_phy_name "$path")"
++	[ -z "$new_phy" -o "$new_phy" = "$phy" ] && return
++
++	iw "$phy" set name "$new_phy" && phy="$new_phy"
++}
++
++rename_board_phy_by_name() (
++	local phy="$1"
++	local suffix="${phy##*.}"
++	[ "$suffix" = "$phy" ] && suffix=
++
++	json_load_file /etc/board.json
++	json_select wlan
++	json_select "${phy%.*}" || return 0
++	json_get_values path
++
++	prev_phy="$(iwinfo nl80211 phyname "path=$path${suffix:++$suffix}")"
++	[ -n "$prev_phy" ] || return 0
++
++	[ "$prev_phy" = "$phy" ] && return 0
++
++	iw "$prev_phy" set name "$phy"
++)
++
++find_phy() {
++	[ -n "$phy" ] && {
++		rename_board_phy_by_name "$phy"
++		[ -d /sys/class/ieee80211/$phy ] && return 0
++	}
++	[ -n "$path" ] && {
++		phy="$(iwinfo nl80211 phyname "path=$path")"
++		[ -n "$phy" ] && {
++			rename_board_phy_by_path "$path"
++			return 0
++		}
++	}
++	[ -n "$macaddr" ] && {
++		for phy in $(ls /sys/class/ieee80211 2>/dev/null); do
++			grep -i -q "$macaddr" "/sys/class/ieee80211/${phy}/macaddress" && {
++				path="$(iwinfo nl80211 path "$phy")"
++				rename_board_phy_by_path "$path"
++				return 0
++			}
++		done
++	}
++	return 1
++}
++
++mac80211_check_ap() {
++	has_ap=1
++}
++
++mac80211_set_ifname() {
++	local phy="$1"
++	local prefix="$2"
++	eval "ifname=\"$phy-$prefix\${idx_$prefix:-0}\"; idx_$prefix=\$((\${idx_$prefix:-0 } + 1))"
++}
++
++mac80211_prepare_vif() {
++	json_select config
++
++	json_get_vars ifname mode ssid wds powersave macaddr enable wpa_psk_file vlan_file
++
++	[ -n "$ifname" ] || {
++		local prefix;
++
++		case "$mode" in
++		ap|sta|mesh) prefix=$mode;;
++		adhoc) prefix=ibss;;
++		monitor) prefix=mon;;
++		esac
++
++		mac80211_set_ifname "$phy" "$prefix"
++	}
++
++	append active_ifnames "$ifname"
++	set_default wds 0
++	set_default powersave 0
++	json_add_string _ifname "$ifname"
++
++	if [ -z "$macaddr" ]; then
++		macaddr="$(mac80211_generate_mac $phy)"
++		macidx="$(($macidx + 1))"
++	elif [ "$macaddr" = 'random' ]; then
++		macaddr="$(macaddr_random)"
++	fi
++	json_add_string _macaddr "$macaddr"
++	json_select ..
++
++
++	[ "$mode" == "ap" ] && {
++		[ -z "$wpa_psk_file" ] && hostapd_set_psk "$ifname"
++		[ -z "$vlan_file" ] && hostapd_set_vlan "$ifname"
++	}
++
++	json_select config
++
++	# It is far easier to delete and create the desired interface
++	case "$mode" in
++		ap)
++			# Hostapd will handle recreating the interface and
++			# subsequent virtual APs belonging to the same PHY
++			if [ -n "$hostapd_ctrl" ]; then
++				type=bss
++			else
++				type=interface
++			fi
++
++			mac80211_hostapd_setup_bss "$phy" "$ifname" "$macaddr" "$type" || return
++
++			[ -n "$hostapd_ctrl" ] || {
++				ap_ifname="${ifname}"
++				hostapd_ctrl="${hostapd_ctrl:-/var/run/hostapd/$ifname}"
++			}
++		;;
++	esac
++
++	json_select ..
++}
++
++mac80211_prepare_iw_htmode() {
++	case "$htmode" in
++		VHT20|HT20|HE20) iw_htmode=HT20;;
++		HT40*|VHT40|VHT160|HE40)
++			case "$band" in
++				2g)
++					case "$htmode" in
++						HT40+) iw_htmode="HT40+";;
++						HT40-) iw_htmode="HT40-";;
++						*)
++							if [ "$channel" -lt 7 ]; then
++								iw_htmode="HT40+"
++							else
++								iw_htmode="HT40-"
++							fi
++						;;
++					esac
++				;;
++				*)
++					case "$(( ($channel / 4) % 2 ))" in
++						1) iw_htmode="HT40+" ;;
++						0) iw_htmode="HT40-";;
++					esac
++				;;
++			esac
++			[ "$auto_channel" -gt 0 ] && iw_htmode="HT40+"
++		;;
++		VHT80|HE80)
++			iw_htmode="80MHZ"
++		;;
++		NONE|NOHT)
++			iw_htmode="NOHT"
++		;;
++		*) iw_htmode="" ;;
++	esac
++}
++
++mac80211_add_mesh_params() {
++	for var in $MP_CONFIG_INT $MP_CONFIG_BOOL $MP_CONFIG_STRING; do
++		eval "mp_val=\"\$$var\""
++		[ -n "$mp_val" ] && json_add_string "$var" "$mp_val"
++	done
++}
++
++mac80211_setup_adhoc() {
++	local enable=$1
++	json_get_vars bssid ssid key mcast_rate
++
++	NEWUMLIST="${NEWUMLIST}$ifname "
++
++	[ "$enable" = 0 ] && {
++		ip link set dev "$ifname" down
++		return 0
++	}
++
++	keyspec=
++	[ "$auth_type" = "wep" ] && {
++		set_default key 1
++		case "$key" in
++			[1234])
++				local idx
++				for idx in 1 2 3 4; do
++					json_get_var ikey "key$idx"
++
++					[ -n "$ikey" ] && {
++						ikey="$(($idx - 1)):$(prepare_key_wep "$ikey")"
++						[ $idx -eq $key ] && ikey="d:$ikey"
++						append keyspec "$ikey"
++					}
++				done
++			;;
++			*)
++				append keyspec "d:0:$(prepare_key_wep "$key")"
++			;;
++		esac
++	}
++
++	brstr=
++	for br in $basic_rate_list; do
++		wpa_supplicant_add_rate brstr "$br"
++	done
++
++	mcval=
++	[ -n "$mcast_rate" ] && wpa_supplicant_add_rate mcval "$mcast_rate"
++
++	local prev
++	json_set_namespace wdev_uc prev
++
++	json_add_object "$ifname"
++	json_add_string mode adhoc
++	json_add_string macaddr "$macaddr"
++	json_add_string ssid "$ssid"
++	json_add_string freq "$freq"
++	json_add_string htmode "$iw_htmode"
++	[ -n "$bssid" ] && json_add_string bssid "$bssid"
++	json_add_int beacon-interval "$beacon_int"
++	[ -n "$brstr" ] && json_add_string basic-rates "$brstr"
++	[ -n "$mcval" ] && json_add_string mcast-rate "$mcval"
++	[ -n "$keyspec" ] && json_add_string keys "$keyspec"
++	json_close_object
++
++	json_set_namespace "$prev"
++}
++
++mac80211_setup_mesh() {
++	json_get_vars ssid mesh_id mcast_rate
++
++	mcval=
++	[ -n "$mcast_rate" ] && wpa_supplicant_add_rate mcval "$mcast_rate"
++	[ -n "$mesh_id" ] && ssid="$mesh_id"
++
++	local prev
++	json_set_namespace wdev_uc prev
++
++	json_add_object "$ifname"
++	json_add_string mode mesh
++	json_add_string macaddr "$macaddr"
++	json_add_string ssid "$ssid"
++	json_add_string freq "$freq"
++	json_add_string htmode "$iw_htmode"
++	[ -n "$mcval" ] && json_add_string mcast-rate "$mcval"
++	json_add_int beacon-interval "$beacon_int"
++	mac80211_add_mesh_params
++
++	json_close_object
++
++	json_set_namespace "$prev"
++}
++
++mac80211_setup_monitor() {
++	local prev
++	json_set_namespace wdev_uc prev
++
++	json_add_object "$ifname"
++	json_add_string mode monitor
++	[ -n "$freq" ] && json_add_string freq "$freq"
++	json_add_string htmode "$iw_htmode"
++	json_close_object
++
++	json_set_namespace "$prev"
++}
++
++mac80211_set_vif_txpower() {
++	local name="$1"
++
++	json_select config
++	json_get_var ifname _ifname
++	json_get_vars vif_txpower
++	json_select ..
++
++	[ -z "$vif_txpower" ] || iw dev "$ifname" set txpower fixed "${vif_txpower%%.*}00"
++}
++
++wpa_supplicant_init_config() {
++	json_set_namespace wpa_supp prev
++
++	json_init
++	json_add_array config
++
++	json_set_namespace "$prev"
++}
++
++wpa_supplicant_add_interface() {
++	local ifname="$1"
++	local mode="$2"
++	local prev
++
++	_wpa_supplicant_common "$ifname"
++
++	json_set_namespace wpa_supp prev
++
++	json_add_object
++	json_add_string ctrl "$_rpath"
++	json_add_string iface "$ifname"
++	json_add_string mode "$mode"
++	json_add_string config "$_config"
++	json_add_string macaddr "$macaddr"
++	[ -n "$network_bridge" ] && json_add_string bridge "$network_bridge"
++	[ -n "$wds" ] && json_add_boolean 4addr "$wds"
++	json_add_boolean powersave "$powersave"
++	[ "$mode" = "mesh" ] && mac80211_add_mesh_params
++	json_close_object
++
++	json_set_namespace "$prev"
++
++	wpa_supp_init=1
++}
++
++wpa_supplicant_set_config() {
++	local phy="$1"
++	local prev
++
++	json_set_namespace wpa_supp prev
++	json_close_array
++	json_add_string phy "$phy"
++	json_add_boolean defer 1
++	local data="$(json_dump)"
++
++	json_cleanup
++	json_set_namespace "$prev"
++
++	ubus -S -t 0 wait_for wpa_supplicant || {
++		[ -n "$wpa_supp_init" ] || return 0
++
++		ubus wait_for wpa_supplicant
++	}
++
++	local supplicant_res="$(ubus call wpa_supplicant config_set "$data")"
++	ret="$?"
++	[ "$ret" != 0 -o -z "$supplicant_res" ] && wireless_setup_vif_failed WPA_SUPPLICANT_FAILED
++
++	wireless_add_process "$(jsonfilter -s "$supplicant_res" -l 1 -e @.pid)" "/usr/sbin/wpa_supplicant" 1 1
++
++}
++
++hostapd_set_config() {
++	[ -n "$hostapd_ctrl" ] || {
++		ubus call hostapd config_set '{ "phy": "'"$phy"'", "config": "", "prev_config": "'"${hostapd_conf_file}.prev"'" }' > /dev/null
++		return 0;
++	}
++
++	ubus wait_for hostapd
++	local hostapd_res="$(ubus call hostapd config_set "{ \"phy\": \"$phy\", \"config\":\"${hostapd_conf_file}\", \"prev_config\": \"${hostapd_conf_file}.prev\"}")"
++	ret="$?"
++	[ "$ret" != 0 -o -z "$hostapd_res" ] && {
++		wireless_setup_failed HOSTAPD_START_FAILED
++		return
++	}
++	wireless_add_process "$(jsonfilter -s "$hostapd_res" -l 1 -e @.pid)" "/usr/sbin/hostapd" 1 1
++}
++
++
++wpa_supplicant_start() {
++	local phy="$1"
++
++	[ -n "$wpa_supp_init" ] || return 0
++
++	ubus call wpa_supplicant config_set '{ "phy": "'"$phy"'" }' > /dev/null
++}
++
++mac80211_setup_supplicant() {
++	local enable=$1
++	local add_sp=0
++
++	wpa_supplicant_prepare_interface "$ifname" nl80211 || return 1
++
++	if [ "$mode" = "sta" ]; then
++		wpa_supplicant_add_network "$ifname"
++	else
++		wpa_supplicant_add_network "$ifname" "$freq" "$htmode" "$noscan"
++	fi
++
++	wpa_supplicant_add_interface "$ifname" "$mode"
++
++	return 0
++}
++
++mac80211_setup_vif() {
++	local name="$1"
++	local failed
++
++	json_select config
++	json_get_var ifname _ifname
++	json_get_var macaddr _macaddr
++	json_get_vars mode wds powersave
++
++	set_default powersave 0
++	set_default wds 0
++
++	case "$mode" in
++		mesh)
++			json_get_vars $MP_CONFIG_INT $MP_CONFIG_BOOL $MP_CONFIG_STRING
++			wireless_vif_parse_encryption
++			[ -z "$htmode" ] && htmode="NOHT";
++			if wpa_supplicant -vmesh; then
++				mac80211_setup_supplicant || failed=1
++			else
++				mac80211_setup_mesh
++			fi
++		;;
++		adhoc)
++			wireless_vif_parse_encryption
++			if [ "$wpa" -gt 0 -o "$auto_channel" -gt 0 ]; then
++				mac80211_setup_supplicant || failed=1
++			else
++				mac80211_setup_adhoc
++			fi
++		;;
++		sta)
++			mac80211_setup_supplicant || failed=1
++		;;
++		monitor)
++			mac80211_setup_monitor
++		;;
++	esac
++
++	json_select ..
++	[ -n "$failed" ] || wireless_add_vif "$name" "$ifname"
++}
++
++get_freq() {
++	local phy="$1"
++	local channel="$2"
++	local band="$3"
++
++	case "$band" in
++		2g) band="1:";;
++		5g) band="2:";;
++		60g) band="3:";;
++		6g) band="4:";;
++	esac
++
++	iw "$phy" info | awk -v band="$band" -v channel="[$channel]" '
++
++$1 ~ /Band/ {
++	band_match = band == $2
++}
++
++band_match && $3 == "MHz" && $4 == channel {
++	print $2
++	exit
++}
++'
++}
++
++chan_is_dfs() {
++	local phy="$1"
++	local chan="$2"
++	iw "$phy" info | grep -E -m1 "(\* ${chan:-....} MHz${chan:+|\\[$chan\\]})" | grep -q "MHz.*radar detection"
++	return $!
++}
++
++mac80211_set_noscan() {
++	hostapd_noscan=1
++}
++
++drv_mac80211_cleanup() {
++	hostapd_common_cleanup
++}
++
++mac80211_reset_config() {
++	local phy="$1"
++
++	hostapd_conf_file="/var/run/hostapd-$phy.conf"
++	ubus call hostapd config_set '{ "phy": "'"$phy"'", "config": "", "prev_config": "'"$hostapd_conf_file"'" }' > /dev/null
++	ubus call wpa_supplicant config_set '{ "phy": "'"$phy"'", "config": [] }' > /dev/null
++	wdev_tool "$phy" '{}'
++}
++
++drv_mac80211_setup() {
++	json_select config
++	json_get_vars \
++		phy macaddr path \
++		country chanbw distance \
++		txpower \
++		rxantenna txantenna \
++		frag rts beacon_int:100 htmode
++	json_get_values basic_rate_list basic_rate
++	json_get_values scan_list scan_list
++	json_select ..
++
++	json_select data && {
++		json_get_var prev_rxantenna rxantenna
++		json_get_var prev_txantenna txantenna
++		json_select ..
++	}
++
++	find_phy || {
++		echo "Could not find PHY for device '$1'"
++		wireless_set_retry 0
++		return 1
++	}
++
++	local wdev
++	local cwdev
++	local found
++
++	# convert channel to frequency
++	[ "$auto_channel" -gt 0 ] || freq="$(get_freq "$phy" "$channel" "$band")"
++
++	[ -n "$country" ] && {
++		iw reg get | grep -q "^country $country:" || {
++			iw reg set "$country"
++			sleep 1
++		}
++	}
++
++	hostapd_conf_file="/var/run/hostapd-$phy.conf"
++
++	macidx=0
++	staidx=0
++
++	[ -n "$chanbw" ] && {
++		for file in /sys/kernel/debug/ieee80211/$phy/ath9k*/chanbw /sys/kernel/debug/ieee80211/$phy/ath5k/bwmode; do
++			[ -f "$file" ] && echo "$chanbw" > "$file"
++		done
++	}
++
++	set_default rxantenna 0xffffffff
++	set_default txantenna 0xffffffff
++	set_default distance 0
++
++	[ "$txantenna" = "all" ] && txantenna=0xffffffff
++	[ "$rxantenna" = "all" ] && rxantenna=0xffffffff
++
++	[ "$rxantenna" = "$prev_rxantenna" -a "$txantenna" = "$prev_txantenna" ] || mac80211_reset_config "$phy"
++	wireless_set_data phy="$phy" txantenna="$txantenna" rxantenna="$rxantenna"
++
++	iw phy "$phy" set antenna $txantenna $rxantenna >/dev/null 2>&1
++	iw phy "$phy" set distance "$distance" >/dev/null 2>&1
++
++	if [ -n "$txpower" ]; then
++		iw phy "$phy" set txpower fixed "${txpower%%.*}00"
++	else
++		iw phy "$phy" set txpower auto
++	fi
++
++	[ -n "$frag" ] && iw phy "$phy" set frag "${frag%%.*}"
++	[ -n "$rts" ] && iw phy "$phy" set rts "${rts%%.*}"
++
++	has_ap=
++	hostapd_ctrl=
++	ap_ifname=
++	hostapd_noscan=
++	wpa_supp_init=
++	for_each_interface "ap" mac80211_check_ap
++
++	[ -f "$hostapd_conf_file" ] && mv "$hostapd_conf_file" "$hostapd_conf_file.prev"
++
++	for_each_interface "sta adhoc mesh" mac80211_set_noscan
++	[ -n "$has_ap" ] && mac80211_hostapd_setup_base "$phy"
++
++	local prev
++	json_set_namespace wdev_uc prev
++	json_init
++	json_set_namespace "$prev"
++
++	wpa_supplicant_init_config
++
++	mac80211_prepare_iw_htmode
++	active_ifnames=
++	for_each_interface "ap sta adhoc mesh monitor" mac80211_prepare_vif
++	for_each_interface "ap sta adhoc mesh monitor" mac80211_setup_vif
++
++	[ -x /usr/sbin/wpa_supplicant ] && wpa_supplicant_set_config "$phy"
++	[ -x /usr/sbin/hostapd ] && hostapd_set_config "$phy"
++
++	[ -x /usr/sbin/wpa_supplicant ] && wpa_supplicant_start "$phy"
++
++	json_set_namespace wdev_uc prev
++	wdev_tool "$phy" "$(json_dump)" $active_ifnames
++	json_set_namespace "$prev"
++
++	for_each_interface "ap sta adhoc mesh monitor" mac80211_set_vif_txpower
++	wireless_set_up
++}
++
++_list_phy_interfaces() {
++	local phy="$1"
++	if [ -d "/sys/class/ieee80211/${phy}/device/net" ]; then
++		ls "/sys/class/ieee80211/${phy}/device/net" 2>/dev/null;
++	else
++		ls "/sys/class/ieee80211/${phy}/device" 2>/dev/null | grep net: | sed -e 's,net:,,g'
++	fi
++}
++
++list_phy_interfaces() {
++	local phy="$1"
++
++	for dev in $(_list_phy_interfaces "$phy"); do
++		readlink "/sys/class/net/${dev}/phy80211" | grep -q "/${phy}\$" || continue
++		echo "$dev"
++	done
++}
++
++drv_mac80211_teardown() {
++	json_select data
++	json_get_vars phy
++	json_select ..
++	[ -n "$phy" ] || {
++		echo "Bug: PHY is undefined for device '$1'"
++		return 1
++	}
++
++	mac80211_reset_config "$phy"
++
++	for wdev in $(list_phy_interfaces "$phy"); do
++		ip link set dev "$wdev" down
++		iw dev "$wdev" del
++	done
++}
++
++add_driver mac80211
+diff --git a/package/kernel/mac80211/files/lib/wifi/mac80211.sh b/package/kernel/mac80211/files/lib/wifi/mac80211.sh
+new file mode 100644
+index 0000000000..e24a2a634e
+--- /dev/null
++++ b/package/kernel/mac80211/files/lib/wifi/mac80211.sh
+@@ -0,0 +1,217 @@
++#!/bin/sh
++
++append DRIVERS "mac80211"
++
++check_mac80211_device() {
++	local device="$1"
++	local path="$2"
++	local macaddr="$3"
++
++	[ -n "$found" ] && return 0
++
++	phy_path=
++	config_get phy "$device" phy
++	json_select wlan
++	[ -n "$phy" ] && case "$phy" in
++		phy*)
++			[ -d /sys/class/ieee80211/$phy ] && \
++				phy_path="$(iwinfo nl80211 path "$dev")"
++		;;
++		*)
++			if json_is_a "$phy" object; then
++				json_select "$phy"
++				json_get_var phy_path path
++				json_select ..
++			elif json_is_a "${phy%.*}" object; then
++				json_select "${phy%.*}"
++				json_get_var phy_path path
++				json_select ..
++				phy_path="$phy_path+${phy##*.}"
++			fi
++		;;
++	esac
++	json_select ..
++	[ -n "$phy_path" ] || config_get phy_path "$device" path
++	[ -n "$path" -a "$phy_path" = "$path" ] && {
++		found=1
++		return 0
++	}
++
++	config_get dev_macaddr "$device" macaddr
++
++	[ -n "$macaddr" -a "$dev_macaddr" = "$macaddr" ] && found=1
++
++	return 0
++}
++
++
++__get_band_defaults() {
++	local phy="$1"
++
++	( iw phy "$phy" info; echo ) | awk '
++BEGIN {
++        bands = ""
++}
++
++($1 == "Band" || $1 == "") && band {
++        if (channel) {
++		mode="NOHT"
++		if (ht) mode="HT20"
++		if (vht && band != "1:") mode="VHT80"
++		if (he) mode="HE80"
++		if (he && band == "1:") mode="HE20"
++                sub("\\[", "", channel)
++                sub("\\]", "", channel)
++                bands = bands band channel ":" mode " "
++        }
++        band=""
++}
++
++$1 == "Band" {
++        band = $2
++        channel = ""
++	vht = ""
++	ht = ""
++	he = ""
++}
++
++$0 ~ "Capabilities:" {
++	ht=1
++}
++
++$0 ~ "VHT Capabilities" {
++	vht=1
++}
++
++$0 ~ "HE Iftypes" {
++	he=1
++}
++
++$1 == "*" && $3 == "MHz" && $0 !~ /disabled/ && band && !channel {
++        channel = $4
++}
++
++END {
++        print bands
++}'
++}
++
++get_band_defaults() {
++	local phy="$1"
++
++	for c in $(__get_band_defaults "$phy"); do
++		local band="${c%%:*}"
++		c="${c#*:}"
++		local chan="${c%%:*}"
++		c="${c#*:}"
++		local mode="${c%%:*}"
++
++		case "$band" in
++			1) band=2g;;
++			2) band=5g;;
++			3) band=60g;;
++			4) band=6g;;
++			*) band="";;
++		esac
++
++		[ -n "$band" ] || continue
++		[ -n "$mode_band" -a "$band" = "6g" ] && return
++
++		mode_band="$band"
++		channel="$chan"
++		htmode="$mode"
++	done
++}
++
++check_devidx() {
++	case "$1" in
++	radio[0-9]*)
++		local idx="${1#radio}"
++		[ "$devidx" -ge "${1#radio}" ] && devidx=$((idx + 1))
++		;;
++	esac
++}
++
++check_board_phy() {
++	local name="$2"
++
++	json_select "$name"
++	json_get_var phy_path path
++	json_select ..
++
++	if [ "$path" = "$phy_path" ]; then
++		board_dev="$name"
++	elif [ "${path%+*}" = "$phy_path" ]; then
++		fallback_board_dev="$name.${path#*+}"
++	fi
++}
++
++detect_mac80211() {
++	devidx=0
++	config_load wireless
++	config_foreach check_devidx wifi-device
++
++	json_load_file /etc/board.json
++
++	for _dev in /sys/class/ieee80211/*; do
++		[ -e "$_dev" ] || continue
++
++		dev="${_dev##*/}"
++
++		mode_band=""
++		channel=""
++		htmode=""
++		ht_capab=""
++
++		get_band_defaults "$dev"
++
++		path="$(iwinfo nl80211 path "$dev")"
++		macaddr="$(cat /sys/class/ieee80211/${dev}/macaddress)"
++
++		# work around phy rename related race condition
++		[ -n "$path" -o -n "$macaddr" ] || continue
++
++		board_dev=
++		fallback_board_dev=
++		json_for_each_item check_board_phy wlan
++		[ -n "$board_dev" ] || board_dev="$fallback_board_dev"
++		[ -n "$board_dev" ] && dev="$board_dev"
++
++		found=
++		config_foreach check_mac80211_device wifi-device "$path" "$macaddr"
++		[ -n "$found" ] && continue
++
++		name="radio${devidx}"
++		devidx=$(($devidx + 1))
++		case "$dev" in
++			phy*)
++				if [ -n "$path" ]; then
++					dev_id="set wireless.${name}.path='$path'"
++				else
++					dev_id="set wireless.${name}.macaddr='$macaddr'"
++				fi
++				;;
++			*)
++				dev_id="set wireless.${name}.phy='$dev'"
++				;;
++		esac
++
++		uci -q batch <<-EOF
++			set wireless.${name}=wifi-device
++			set wireless.${name}.type=mac80211
++			${dev_id}
++			set wireless.${name}.channel=${channel}
++			set wireless.${name}.band=${mode_band}
++			set wireless.${name}.htmode=$htmode
++			set wireless.${name}.disabled=1
++
++			set wireless.default_${name}=wifi-iface
++			set wireless.default_${name}.device=${name}
++			set wireless.default_${name}.network=lan
++			set wireless.default_${name}.mode=ap
++			set wireless.default_${name}.ssid=OpenWrt
++			set wireless.default_${name}.encryption=none
++EOF
++		uci -q commit wireless
++	done
++}
+diff --git a/package/kernel/mac80211/files/mac80211.hotplug b/package/kernel/mac80211/files/mac80211.hotplug
+new file mode 100644
+index 0000000000..b865552661
+--- /dev/null
++++ b/package/kernel/mac80211/files/mac80211.hotplug
+@@ -0,0 +1,5 @@
++#!/bin/sh
++
++[ "${ACTION}" = "add" ] && {
++	/sbin/wifi config
++}
+diff --git a/package/kernel/mac80211/intel.mk b/package/kernel/mac80211/intel.mk
+new file mode 100644
+index 0000000000..8d374d73e7
+--- /dev/null
++++ b/package/kernel/mac80211/intel.mk
+@@ -0,0 +1,77 @@
++PKG_DRIVERS += iwlwifi
++
++config-$(call config_package,iwlwifi) += IWLWIFI IWLDVM IWLMVM
++config-$(CONFIG_PACKAGE_IWLWIFI_DEBUG)+= IWLWIFI_DEBUG
++config-$(CONFIG_PACKAGE_IWLWIFI_DEBUGFS)+= IWLWIFI_DEBUGFS
++
++define KernelPackage/iwlwifi
++  $(call KernelPackage/mac80211/Default)
++  DEPENDS:= +kmod-mac80211 @PCI_SUPPORT +@DRIVER_11AC_SUPPORT +@DRIVER_11AX_SUPPORT
++  TITLE:=Intel AGN Wireless support
++  FILES:= \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/intel/iwlwifi/iwlwifi.ko \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/intel/iwlwifi/dvm/iwldvm.ko \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/intel/iwlwifi/mvm/iwlmvm.ko
++  AUTOLOAD:=$(call AutoProbe,iwlwifi iwldvm iwlmvm)
++  MENU:=1
++endef
++
++define KernelPackage/iwlwifi/description
++ iwlwifi kernel module for
++ Intel Wireless WiFi Link 6250AGN Adapter
++ Intel 6000 Series Wi-Fi Adapters (6200AGN and 6300AGN)
++ Intel WiFi Link 1000BGN
++ Intel Wireless WiFi 5150AGN
++ Intel Wireless WiFi 5100AGN, 5300AGN, and 5350AGN
++ Intel 6005 Series Wi-Fi Adapters
++ Intel 6030 Series Wi-Fi Adapters
++ Intel Wireless WiFi Link 6150BGN 2 Adapter
++ Intel 100 Series Wi-Fi Adapters (100BGN and 130BGN)
++ Intel 2000 Series Wi-Fi Adapters
++ Intel 7260 Wi-Fi Adapter
++ Intel 3160 Wi-Fi Adapter
++ Intel 7265 Wi-Fi Adapter
++ Intel 8260 Wi-Fi Adapter
++ Intel 3165 Wi-Fi Adapter
++endef
++
++define KernelPackage/iwlwifi/config
++  if PACKAGE_kmod-iwlwifi
++
++	config PACKAGE_IWLWIFI_DEBUG
++		bool "Enable full debugging output in the iwlwifi driver"
++		default n
++		help
++		  This option will enable debug tracing output for the iwlwifi drivers
++
++		  This will result in the kernel module being ~100k larger.  You can
++		  control which debug output is sent to the kernel log by setting the
++		  value in
++
++			/sys/module/iwlwifi/parameters/debug
++
++		  This entry will only exist if this option is enabled.
++
++		  To set a value, simply echo an 8-byte hex value to the same file:
++
++			  % echo 0x43fff > /sys/module/iwlwifi/parameters/debug
++
++		  You can find the list of debug mask values in:
++			  drivers/net/wireless/intel/iwlwifi/iwl-debug.h
++
++		  If this is your first time using this driver, you should say Y here
++		  as the debug information can assist others in helping you resolve
++		  any problems you may encounter.
++
++	config PACKAGE_IWLWIFI_DEBUGFS
++	        bool "iwlwifi debugfs support"
++		depends on PACKAGE_MAC80211_DEBUGFS
++		default n
++		help
++		  Enable creation of debugfs files for the iwlwifi drivers. This
++		  is a low-impact option that allows getting insight into the
++		  driver's state at runtime.
++
++  endif
++endef
++
+diff --git a/package/kernel/mac80211/marvell.mk b/package/kernel/mac80211/marvell.mk
+new file mode 100644
+index 0000000000..dbd07a80da
+--- /dev/null
++++ b/package/kernel/mac80211/marvell.mk
+@@ -0,0 +1,51 @@
++PKG_DRIVERS += \
++	mwl8k mwifiex-pcie mwifiex-sdio
++
++config-$(call config_package,mwl8k) += MWL8K
++config-$(call config_package,mwifiex-pcie) += MWIFIEX MWIFIEX_PCIE
++config-$(call config_package,mwifiex-sdio) += MWIFIEX MWIFIEX_SDIO
++
++define KernelPackage/mwl8k
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Driver for Marvell TOPDOG 802.11 Wireless cards
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/mwl8k
++  DEPENDS+= @PCI_SUPPORT +kmod-mac80211 +mwl8k-firmware
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/marvell/mwl8k.ko
++  AUTOLOAD:=$(call AutoProbe,mwl8k)
++endef
++
++define KernelPackage/mwl8k/description
++ Kernel modules for Marvell TOPDOG 802.11 Wireless cards
++endef
++
++
++define KernelPackage/mwifiex-pcie
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Driver for Marvell 802.11n/802.11ac PCIe Wireless cards
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/mwifiex
++  DEPENDS+= @PCI_SUPPORT +kmod-mac80211 +@DRIVER_11AC_SUPPORT +mwifiex-pcie-firmware
++  FILES:= \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/marvell/mwifiex/mwifiex.ko \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/marvell/mwifiex/mwifiex_pcie.ko
++  AUTOLOAD:=$(call AutoProbe,mwifiex_pcie)
++endef
++
++define KernelPackage/mwifiex-pcie/description
++ Kernel modules for Marvell 802.11n/802.11ac PCIe Wireless cards
++endef
++
++define KernelPackage/mwifiex-sdio
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Driver for Marvell 802.11n/802.11ac SDIO Wireless cards
++  URL:=https://wireless.wiki.kernel.org/en/users/drivers/mwifiex
++  DEPENDS+= +kmod-mmc +kmod-mac80211 +@DRIVER_11AC_SUPPORT +mwifiex-sdio-firmware
++  FILES:= \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/marvell/mwifiex/mwifiex.ko \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/marvell/mwifiex/mwifiex_sdio.ko
++  AUTOLOAD:=$(call AutoProbe,mwifiex_sdio)
++endef
++
++define KernelPackage/mwifiex-sdio/description
++ Kernel modules for Marvell 802.11n/802.11ac SDIO Wireless cards
++endef
++
+diff --git a/package/kernel/mac80211/patches/ath/070-ath_common_config.patch b/package/kernel/mac80211/patches/ath/070-ath_common_config.patch
+new file mode 100644
+index 0000000000..3d0b4d6b1a
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath/070-ath_common_config.patch
+@@ -0,0 +1,10 @@
++--- a/drivers/net/wireless/ath/Kconfig
+++++ b/drivers/net/wireless/ath/Kconfig
++@@ -1,6 +1,6 @@
++ # SPDX-License-Identifier: ISC
++ config ATH_COMMON
++-	tristate
+++	tristate "ath.ko"
++ 	depends on m
++ 
++ config WLAN_VENDOR_ATH
+diff --git a/package/kernel/mac80211/patches/ath/400-ath_move_debug_code.patch b/package/kernel/mac80211/patches/ath/400-ath_move_debug_code.patch
+new file mode 100644
+index 0000000000..eacc72776e
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath/400-ath_move_debug_code.patch
+@@ -0,0 +1,31 @@
++--- a/drivers/net/wireless/ath/Makefile
+++++ b/drivers/net/wireless/ath/Makefile
++@@ -15,10 +15,10 @@ ath-objs :=	main.o \
++ 		regd.o \
++ 		hw.o \
++ 		key.o \
+++		debug.o \
++ 		dfs_pattern_detector.o \
++ 		dfs_pri_detector.o
++ 
++-ath-$(CPTCFG_ATH_DEBUG) += debug.o
++ ath-$(CPTCFG_ATH_TRACEPOINTS) += trace.o
++ 
++ CFLAGS_trace.o := -I$(src)
++--- a/drivers/net/wireless/ath/ath.h
+++++ b/drivers/net/wireless/ath/ath.h
++@@ -317,14 +317,7 @@ void _ath_dbg(struct ath_common *common,
++ #endif /* CPTCFG_ATH_DEBUG */
++ 
++ /** Returns string describing opmode, or NULL if unknown mode. */
++-#ifdef CPTCFG_ATH_DEBUG
++ const char *ath_opmode_to_string(enum nl80211_iftype opmode);
++-#else
++-static inline const char *ath_opmode_to_string(enum nl80211_iftype opmode)
++-{
++-	return "UNKNOWN";
++-}
++-#endif
++ 
++ extern const char *ath_bus_type_strings[];
++ static inline const char *ath_bus_type_to_string(enum ath_bus_type bustype)
+diff --git a/package/kernel/mac80211/patches/ath/402-ath_regd_optional.patch b/package/kernel/mac80211/patches/ath/402-ath_regd_optional.patch
+new file mode 100644
+index 0000000000..fd5493de71
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath/402-ath_regd_optional.patch
+@@ -0,0 +1,92 @@
++--- a/drivers/net/wireless/ath/regd.c
+++++ b/drivers/net/wireless/ath/regd.c
++@@ -24,6 +24,7 @@
++ #include "regd_common.h"
++ 
++ static int __ath_regd_init(struct ath_regulatory *reg);
+++static struct reg_dmn_pair_mapping *ath_get_regpair(int regdmn);
++ 
++ /*
++  * This is a set of common rules used by our world regulatory domains.
++@@ -116,6 +117,9 @@ static const struct ieee80211_regdomain
++ 
++ static bool dynamic_country_user_possible(struct ath_regulatory *reg)
++ {
+++	if (IS_ENABLED(CPTCFG_ATH_USER_REGD))
+++		return true;
+++
++ 	if (IS_ENABLED(CPTCFG_ATH_REG_DYNAMIC_USER_CERT_TESTING))
++ 		return true;
++ 
++@@ -188,6 +192,8 @@ static bool dynamic_country_user_possibl
++ 
++ static bool ath_reg_dyn_country_user_allow(struct ath_regulatory *reg)
++ {
+++	if (IS_ENABLED(CPTCFG_ATH_USER_REGD))
+++		return true;
++ 	if (!IS_ENABLED(CPTCFG_ATH_REG_DYNAMIC_USER_REG_HINTS))
++ 		return false;
++ 	if (!dynamic_country_user_possible(reg))
++@@ -345,6 +351,9 @@ ath_reg_apply_beaconing_flags(struct wip
++ 	struct ieee80211_channel *ch;
++ 	unsigned int i;
++ 
+++	if (IS_ENABLED(CPTCFG_ATH_USER_REGD))
+++		return;
+++
++ 	for (band = 0; band < NUM_NL80211_BANDS; band++) {
++ 		if (!wiphy->bands[band])
++ 			continue;
++@@ -379,6 +388,9 @@ ath_reg_apply_ir_flags(struct wiphy *wip
++ {
++ 	struct ieee80211_supported_band *sband;
++ 
+++	if (IS_ENABLED(CPTCFG_ATH_USER_REGD))
+++		return;
+++
++ 	sband = wiphy->bands[NL80211_BAND_2GHZ];
++ 	if (!sband)
++ 		return;
++@@ -408,6 +420,9 @@ static void ath_reg_apply_radar_flags(st
++ 	struct ieee80211_channel *ch;
++ 	unsigned int i;
++ 
+++	if (IS_ENABLED(CPTCFG_ATH_USER_REGD))
+++		return;
+++
++ 	if (!wiphy->bands[NL80211_BAND_5GHZ])
++ 		return;
++ 
++@@ -640,6 +655,10 @@ ath_regd_init_wiphy(struct ath_regulator
++ 	const struct ieee80211_regdomain *regd;
++ 
++ 	wiphy->reg_notifier = reg_notifier;
+++
+++	if (IS_ENABLED(CPTCFG_ATH_USER_REGD))
+++		return 0;
+++
++ 	wiphy->regulatory_flags |= REGULATORY_STRICT_REG |
++ 				   REGULATORY_CUSTOM_REG;
++ 
++--- a/drivers/net/wireless/ath/Kconfig
+++++ b/drivers/net/wireless/ath/Kconfig
++@@ -24,6 +24,9 @@ config WLAN_VENDOR_ATH
++ 
++ if WLAN_VENDOR_ATH
++ 
+++config ATH_USER_REGD
+++	bool "Do not enforce EEPROM regulatory restrictions"
+++
++ config ATH_DEBUG
++ 	bool "Atheros wireless debugging"
++ 	help
++--- a/local-symbols
+++++ b/local-symbols
++@@ -102,6 +102,7 @@ ADM8211=
++ ATH_COMMON=
++ WLAN_VENDOR_ATH=
++ ATH_DEBUG=
+++ATH_USER_REGD=
++ ATH_TRACEPOINTS=
++ ATH_REG_DYNAMIC_USER_REG_HINTS=
++ ATH_REG_DYNAMIC_USER_CERT_TESTING=
+diff --git a/package/kernel/mac80211/patches/ath/403-world_regd_fixup.patch b/package/kernel/mac80211/patches/ath/403-world_regd_fixup.patch
+new file mode 100644
+index 0000000000..ed616b7532
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath/403-world_regd_fixup.patch
+@@ -0,0 +1,84 @@
++--- a/drivers/net/wireless/ath/regd.c
+++++ b/drivers/net/wireless/ath/regd.c
++@@ -44,7 +44,8 @@ static struct reg_dmn_pair_mapping *ath_
++ 					 NL80211_RRF_NO_OFDM)
++ 
++ /* We allow IBSS on these on a case by case basis by regulatory domain */
++-#define ATH_5GHZ_5150_5350	REG_RULE(5150-10, 5350+10, 80, 0, 30,\
+++#define ATH_5GHZ_5150_5350	REG_RULE(5150-10, 5240+10, 80, 0, 30, 0),\
+++				REG_RULE(5260-10, 5350+10, 80, 0, 30,\
++ 					 NL80211_RRF_NO_IR)
++ #define ATH_5GHZ_5470_5850	REG_RULE(5470-10, 5850+10, 80, 0, 30,\
++ 					 NL80211_RRF_NO_IR)
++@@ -62,57 +63,56 @@ static struct reg_dmn_pair_mapping *ath_
++ #define ATH_5GHZ_NO_MIDBAND	ATH_5GHZ_5150_5350, \
++ 				ATH_5GHZ_5725_5850
++ 
+++#define REGD_RULES(...) \
+++	.reg_rules = { __VA_ARGS__ }, \
+++	.n_reg_rules = ARRAY_SIZE(((struct ieee80211_reg_rule[]) { __VA_ARGS__ }))
+++
++ /* Can be used for:
++  * 0x60, 0x61, 0x62 */
++ static const struct ieee80211_regdomain ath_world_regdom_60_61_62 = {
++-	.n_reg_rules = 5,
++ 	.alpha2 =  "99",
++-	.reg_rules = {
+++	REGD_RULES(
++ 		ATH_2GHZ_ALL,
++ 		ATH_5GHZ_ALL,
++-	}
+++	)
++ };
++ 
++ /* Can be used by 0x63 and 0x65 */
++ static const struct ieee80211_regdomain ath_world_regdom_63_65 = {
++-	.n_reg_rules = 4,
++ 	.alpha2 =  "99",
++-	.reg_rules = {
+++	REGD_RULES(
++ 		ATH_2GHZ_CH01_11,
++ 		ATH_2GHZ_CH12_13,
++ 		ATH_5GHZ_NO_MIDBAND,
++-	}
+++	)
++ };
++ 
++ /* Can be used by 0x64 only */
++ static const struct ieee80211_regdomain ath_world_regdom_64 = {
++-	.n_reg_rules = 3,
++ 	.alpha2 =  "99",
++-	.reg_rules = {
+++	REGD_RULES(
++ 		ATH_2GHZ_CH01_11,
++ 		ATH_5GHZ_NO_MIDBAND,
++-	}
+++	)
++ };
++ 
++ /* Can be used by 0x66 and 0x69 */
++ static const struct ieee80211_regdomain ath_world_regdom_66_69 = {
++-	.n_reg_rules = 3,
++ 	.alpha2 =  "99",
++-	.reg_rules = {
+++	REGD_RULES(
++ 		ATH_2GHZ_CH01_11,
++ 		ATH_5GHZ_ALL,
++-	}
+++	)
++ };
++ 
++ /* Can be used by 0x67, 0x68, 0x6A and 0x6C */
++ static const struct ieee80211_regdomain ath_world_regdom_67_68_6A_6C = {
++-	.n_reg_rules = 4,
++ 	.alpha2 =  "99",
++-	.reg_rules = {
+++	REGD_RULES(
++ 		ATH_2GHZ_CH01_11,
++ 		ATH_2GHZ_CH12_13,
++ 		ATH_5GHZ_ALL,
++-	}
+++	)
++ };
++ 
++ static bool dynamic_country_user_possible(struct ath_regulatory *reg)
+diff --git a/package/kernel/mac80211/patches/ath/404-regd_no_assoc_hints.patch b/package/kernel/mac80211/patches/ath/404-regd_no_assoc_hints.patch
+new file mode 100644
+index 0000000000..8d83921a3b
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath/404-regd_no_assoc_hints.patch
+@@ -0,0 +1,19 @@
++--- a/net/wireless/reg.c
+++++ b/net/wireless/reg.c
++@@ -3370,6 +3370,8 @@ void regulatory_hint_country_ie(struct w
++ 	enum environment_cap env = ENVIRON_ANY;
++ 	struct regulatory_request *request = NULL, *lr;
++ 
+++	return;
+++
++ 	/* IE len must be evenly divisible by 2 */
++ 	if (country_ie_len & 0x01)
++ 		return;
++@@ -3621,6 +3623,7 @@ static bool is_wiphy_all_set_reg_flag(en
++ 
++ void regulatory_hint_disconnect(void)
++ {
+++	return;
++ 	/* Restore of regulatory settings is not required when wiphy(s)
++ 	 * ignore IE from connected access point but clearance of beacon hints
++ 	 * is required when wiphy(s) supports beacon hints.
+diff --git a/package/kernel/mac80211/patches/ath/405-ath_regd_us.patch b/package/kernel/mac80211/patches/ath/405-ath_regd_us.patch
+new file mode 100644
+index 0000000000..6723721a47
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath/405-ath_regd_us.patch
+@@ -0,0 +1,26 @@
++--- a/drivers/net/wireless/ath/regd_common.h
+++++ b/drivers/net/wireless/ath/regd_common.h
++@@ -32,6 +32,7 @@ enum EnumRd {
++ 	FCC2_WORLD = 0x21,
++ 	FCC2_ETSIC = 0x22,
++ 	FCC6_WORLD = 0x23,
+++	FCC3_FCCA_2 = 0x2A,
++ 	FRANCE_RES = 0x31,
++ 	FCC3_FCCA = 0x3A,
++ 	FCC3_WORLD = 0x3B,
++@@ -173,6 +174,7 @@ static struct reg_dmn_pair_mapping regDo
++ 	{FCC2_WORLD, CTL_FCC, CTL_ETSI},
++ 	{FCC2_ETSIC, CTL_FCC, CTL_ETSI},
++ 	{FCC3_FCCA, CTL_FCC, CTL_FCC},
+++	{FCC3_FCCA_2, CTL_FCC, CTL_FCC},
++ 	{FCC3_WORLD, CTL_FCC, CTL_ETSI},
++ 	{FCC3_ETSIC, CTL_FCC, CTL_ETSI},
++ 	{FCC4_FCCA, CTL_FCC, CTL_FCC},
++@@ -486,6 +488,7 @@ static struct country_code_to_enum_rd al
++ 	{CTRY_UAE, NULL1_WORLD, "AE"},
++ 	{CTRY_UNITED_KINGDOM, ETSI1_WORLD, "GB"},
++ 	{CTRY_UNITED_STATES, FCC3_FCCA, "US"},
+++	{CTRY_UNITED_STATES, FCC3_FCCA_2, "US"},
++ 	{CTRY_UNITED_STATES2, FCC3_FCCA, "US"},
++ 	{CTRY_UNITED_STATES3, FCC3_FCCA, "US"},
++ 	/* This "PS" is for US public safety actually... to support this we
+diff --git a/package/kernel/mac80211/patches/ath/406-ath_relax_default_regd.patch b/package/kernel/mac80211/patches/ath/406-ath_relax_default_regd.patch
+new file mode 100644
+index 0000000000..ee4e461342
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath/406-ath_relax_default_regd.patch
+@@ -0,0 +1,51 @@
++--- a/drivers/net/wireless/ath/regd.c
+++++ b/drivers/net/wireless/ath/regd.c
++@@ -115,6 +115,16 @@ static const struct ieee80211_regdomain
++ 	)
++ };
++ 
+++static u16 ath_regd_get_eepromRD(struct ath_regulatory *reg)
+++{
+++	return reg->current_rd & ~WORLDWIDE_ROAMING_FLAG;
+++}
+++
+++static bool is_default_regd(struct ath_regulatory *reg)
+++{
+++	return ath_regd_get_eepromRD(reg) == CTRY_DEFAULT;
+++}
+++
++ static bool dynamic_country_user_possible(struct ath_regulatory *reg)
++ {
++ 	if (IS_ENABLED(CPTCFG_ATH_USER_REGD))
++@@ -123,6 +133,9 @@ static bool dynamic_country_user_possibl
++ 	if (IS_ENABLED(CPTCFG_ATH_REG_DYNAMIC_USER_CERT_TESTING))
++ 		return true;
++ 
+++	if (is_default_regd(reg))
+++		return true;
+++
++ 	switch (reg->country_code) {
++ 	case CTRY_UNITED_STATES:
++ 	case CTRY_JAPAN1:
++@@ -208,11 +221,6 @@ static inline bool is_wwr_sku(u16 regd)
++ 		(regd == WORLD));
++ }
++ 
++-static u16 ath_regd_get_eepromRD(struct ath_regulatory *reg)
++-{
++-	return reg->current_rd & ~WORLDWIDE_ROAMING_FLAG;
++-}
++-
++ bool ath_is_world_regd(struct ath_regulatory *reg)
++ {
++ 	return is_wwr_sku(ath_regd_get_eepromRD(reg));
++@@ -659,6 +667,9 @@ ath_regd_init_wiphy(struct ath_regulator
++ 	if (IS_ENABLED(CPTCFG_ATH_USER_REGD))
++ 		return 0;
++ 
+++	if (is_default_regd(reg))
+++		return 0;
+++
++ 	wiphy->regulatory_flags |= REGULATORY_STRICT_REG |
++ 				   REGULATORY_CUSTOM_REG;
++ 
+diff --git a/package/kernel/mac80211/patches/ath/431-add_platform_eeprom_support_to_ath5k.patch b/package/kernel/mac80211/patches/ath/431-add_platform_eeprom_support_to_ath5k.patch
+new file mode 100644
+index 0000000000..136be19894
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath/431-add_platform_eeprom_support_to_ath5k.patch
+@@ -0,0 +1,56 @@
++--- a/drivers/net/wireless/ath/ath5k/pci.c
+++++ b/drivers/net/wireless/ath/ath5k/pci.c
++@@ -20,6 +20,7 @@
++ #include <linux/pci.h>
++ #include <linux/etherdevice.h>
++ #include <linux/module.h>
+++#include <linux/ath5k_platform.h>
++ #include "../ath.h"
++ #include "ath5k.h"
++ #include "debug.h"
++@@ -71,7 +72,7 @@ static void ath5k_pci_read_cachesize(str
++ }
++ 
++ /*
++- * Read from eeprom
+++ * Read from eeprom or platform_data
++  */
++ static bool
++ ath5k_pci_eeprom_read(struct ath_common *common, u32 offset, u16 *data)
++@@ -79,6 +80,19 @@ ath5k_pci_eeprom_read(struct ath_common
++ 	struct ath5k_hw *ah = (struct ath5k_hw *) common->ah;
++ 	u32 status, timeout;
++ 
+++	struct ath5k_platform_data *pdata = NULL;
+++
+++	if (ah->pdev)
+++		pdata = ah->pdev->dev.platform_data;
+++
+++	if (pdata && pdata->eeprom_data && pdata->eeprom_data[61] == AR5K_EEPROM_MAGIC_VALUE) {
+++		if (offset >= ATH5K_PLAT_EEP_MAX_WORDS)
+++			return false;
+++
+++		*data = pdata->eeprom_data[offset];
+++		return true;
+++	}
+++
++ 	/*
++ 	 * Initialize EEPROM access
++ 	 */
++@@ -122,6 +136,16 @@ static int ath5k_pci_eeprom_read_mac(str
++ 	u16 data;
++ 	int octet;
++ 
+++	struct ath5k_platform_data *pdata = NULL;
+++
+++	if (ah->pdev)
+++		pdata = ah->pdev->dev.platform_data;
+++
+++	if (pdata && pdata->macaddr) {
+++		memcpy(mac, pdata->macaddr, ETH_ALEN);
+++		return 0;
+++	}
+++
++ 	AR5K_EEPROM_READ(0x20, data);
++ 
++ 	for (offset = 0x1f, octet = 0, total = 0; offset >= 0x1d; offset--) {
+diff --git a/package/kernel/mac80211/patches/ath10k/080-ath10k_thermal_config.patch b/package/kernel/mac80211/patches/ath10k/080-ath10k_thermal_config.patch
+new file mode 100644
+index 0000000000..41ad6006b5
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath10k/080-ath10k_thermal_config.patch
+@@ -0,0 +1,47 @@
++--- a/drivers/net/wireless/ath/ath10k/Kconfig
+++++ b/drivers/net/wireless/ath/ath10k/Kconfig
++@@ -86,6 +86,12 @@ config ATH10K_TRACING
++ 	help
++ 	  Select this to ath10k use tracing infrastructure.
++ 
+++config ATH10K_THERMAL
+++	bool "Atheros ath10k thermal monitoring support"
+++	depends on THERMAL
+++	---help---
+++	  Select this to ath10k use hwmon for thermal measurement.
+++
++ config ATH10K_DFS_CERTIFIED
++ 	bool "Atheros DFS support for certified platforms"
++ 	depends on ATH10K && CFG80211_CERTIFICATION_ONUS
++--- a/drivers/net/wireless/ath/ath10k/Makefile
+++++ b/drivers/net/wireless/ath/ath10k/Makefile
++@@ -18,7 +18,7 @@ ath10k_core-y += mac.o \
++ ath10k_core-$(CPTCFG_ATH10K_SPECTRAL) += spectral.o
++ ath10k_core-$(CPTCFG_NL80211_TESTMODE) += testmode.o
++ ath10k_core-$(CPTCFG_ATH10K_TRACING) += trace.o
++-ath10k_core-$(CONFIG_THERMAL) += thermal.o
+++ath10k_core-$(CPTCFG_ATH10K_THERMAL) += thermal.o
++ ath10k_core-$(CPTCFG_MAC80211_DEBUGFS) += debugfs_sta.o
++ ath10k_core-$(CONFIG_PM) += wow.o
++ ath10k_core-$(CONFIG_DEV_COREDUMP) += coredump.o
++--- a/drivers/net/wireless/ath/ath10k/thermal.h
+++++ b/drivers/net/wireless/ath/ath10k/thermal.h
++@@ -25,7 +25,7 @@ struct ath10k_thermal {
++ 	int temperature;
++ };
++ 
++-#if IS_REACHABLE(CONFIG_THERMAL)
+++#if IS_REACHABLE(CPTCFG_ATH10K_THERMAL)
++ int ath10k_thermal_register(struct ath10k *ar);
++ void ath10k_thermal_unregister(struct ath10k *ar);
++ void ath10k_thermal_event_temperature(struct ath10k *ar, int temperature);
++--- a/local-symbols
+++++ b/local-symbols
++@@ -161,6 +161,7 @@ ATH10K_SNOC=
++ ATH10K_DEBUG=
++ ATH10K_DEBUGFS=
++ ATH10K_SPECTRAL=
+++ATH10K_THERMAL=
++ ATH10K_TRACING=
++ ATH10K_DFS_CERTIFIED=
++ WCN36XX=
+diff --git a/package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch b/package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch
+new file mode 100644
+index 0000000000..7a38cf3e4e
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch
+@@ -0,0 +1,33 @@
++From: Sven Eckelmann <sven@open-mesh.com>
++Date: Tue, 18 Nov 2014 12:29:28 +0100
++Subject: [PATCH] ath10k: Don't initialize devices asynchronously
++
++OpenWrt requires all PHYs to be initialized to create the configuration files
++during bootup. ath10k violates this because it delays the creation of the PHY
++to a not well defined point in the future.
++
++Forcing the work to be done immediately works around this problem but may also
++delay the boot when firmware images cannot be found.
++
++Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
++---
++
++--- a/drivers/net/wireless/ath/ath10k/core.c
+++++ b/drivers/net/wireless/ath/ath10k/core.c
++@@ -3516,6 +3516,16 @@ int ath10k_core_register(struct ath10k *
++ 
++ 	queue_work(ar->workqueue, &ar->register_work);
++ 
+++	/* OpenWrt requires all PHYs to be initialized to create the
+++	 * configuration files during bootup. ath10k violates this
+++	 * because it delays the creation of the PHY to a not well defined
+++	 * point in the future.
+++	 *
+++	 * Forcing the work to be done immediately works around this problem
+++	 * but may also delay the boot when firmware images cannot be found.
+++	 */
+++	flush_workqueue(ar->workqueue);
+++
++ 	return 0;
++ }
++ EXPORT_SYMBOL(ath10k_core_register);
+diff --git a/package/kernel/mac80211/patches/ath10k/930-ath10k_add_tpt_led_trigger.patch b/package/kernel/mac80211/patches/ath10k/930-ath10k_add_tpt_led_trigger.patch
+new file mode 100644
+index 0000000000..e8beed17e8
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath10k/930-ath10k_add_tpt_led_trigger.patch
+@@ -0,0 +1,37 @@
++--- a/drivers/net/wireless/ath/ath10k/mac.c
+++++ b/drivers/net/wireless/ath/ath10k/mac.c
++@@ -9909,6 +9909,21 @@ static int ath10k_mac_init_rd(struct ath
++ 	return 0;
++ }
++ 
+++#ifdef CPTCFG_MAC80211_LEDS
+++static const struct ieee80211_tpt_blink ath10k_tpt_blink[] = {
+++	{ .throughput = 0 * 1024, .blink_time = 334 },
+++	{ .throughput = 1 * 1024, .blink_time = 260 },
+++	{ .throughput = 2 * 1024, .blink_time = 220 },
+++	{ .throughput = 5 * 1024, .blink_time = 190 },
+++	{ .throughput = 10 * 1024, .blink_time = 170 },
+++	{ .throughput = 25 * 1024, .blink_time = 150 },
+++	{ .throughput = 54 * 1024, .blink_time = 130 },
+++	{ .throughput = 120 * 1024, .blink_time = 110 },
+++	{ .throughput = 265 * 1024, .blink_time = 80 },
+++	{ .throughput = 586 * 1024, .blink_time = 50 },
+++};
+++#endif
+++
++ int ath10k_mac_register(struct ath10k *ar)
++ {
++ 	static const u32 cipher_suites[] = {
++@@ -10267,6 +10282,12 @@ int ath10k_mac_register(struct ath10k *a
++ 
++ 	ar->hw->weight_multiplier = ATH10K_AIRTIME_WEIGHT_MULTIPLIER;
++ 
+++#ifdef CPTCFG_MAC80211_LEDS
+++	ieee80211_create_tpt_led_trigger(ar->hw,
+++		IEEE80211_TPT_LEDTRIG_FL_RADIO, ath10k_tpt_blink,
+++		ARRAY_SIZE(ath10k_tpt_blink));
+++#endif
+++
++ 	ret = ieee80211_register_hw(ar->hw);
++ 	if (ret) {
++ 		ath10k_err(ar, "failed to register ieee80211: %d\n", ret);
+diff --git a/package/kernel/mac80211/patches/ath10k/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch b/package/kernel/mac80211/patches/ath10k/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch
+new file mode 100644
+index 0000000000..1c1630c051
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath10k/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch
+@@ -0,0 +1,609 @@
++From: Sebastian Gottschall <s.gottschall@newmedia-net.de>
++
++Adds LED and GPIO Control support for 988x, 9887, 9888, 99x0, 9984 based
++chipsets with on chipset connected led's using WMI Firmware API.  The LED
++device will get available named as "ath10k-phyX" at sysfs and can be controlled
++with various triggers.  adds also debugfs interface for gpio control.
++
++This patch is specific for OpenWRt base, as is use old backported package
++with old wireless source. Support for QCA9984 is removed and a simbol
++is added to local-simbol file to export the actually compile the code 
++with the ATH10K_LEDS simbol.
++
++
++Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
++Reviewed-by: Steve deRosier <derosier@cal-sierra.com>
++[kvalo: major reorg and cleanup]
++Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
++Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
++---
++
++v13:
++
++* only compile tested!
++
++* fix all checkpatch warnings
++
++* fix commit log
++
++* sizeof(struct ath10k_gpiocontrol) -> sizeof(*gpio)
++
++* unsigned -> unsigned int
++
++* remove GPIOLIB code, that should be added in a separate patch
++
++* rename gpio.c to leds.c
++
++* add leds.h
++
++* rename some functions:
++
++  ath10k_attach_led() -> ath10k_leds_register()
++  ath10k_unregister_led() -> ath10k_leds_unregister()
++  ath10k_reset_led_pin() -> ath10k_leds_start()
++
++* call ath10k_leds_unregister() before ath10k_thermal_unregister() to preserve ordering
++
++* call ath10k_leds_start() only from ath10k_core_start() and not from mac.c
++
++* rename struct ath10k_gpiocontrol as anonymous function under struct
++  ath10k::leds, no need for memory allocation
++
++* merge ath10k_add_led() to ath10k_attach_led(), which is it's only caller
++
++* remove #if IS_ENABLED() checks from most of places, memory savings from those were not worth it
++
++* Kconfig help text improvement and move it lower in the menu, also don't enable it by default
++
++* switch to set_brightness_blocking() so that the callback can sleep,
++  then no need to use ath10k_wmi_cmd_send_nowait() and can take mutex
++  to access ar->state
++
++* don't touch ath10k_wmi_pdev_get_temperature()
++
++* as QCA6174/QCA9377 are not (yet) supported don't add the command to WMI-TLV interface
++
++* remove debugfs interface, that should be added in another patch
++
++* cleanup includes
++
++
++ drivers/net/wireless/ath/ath10k/Kconfig   |  10 +++
++ drivers/net/wireless/ath/ath10k/Makefile  |   1 +
++ drivers/net/wireless/ath/ath10k/core.c    |  22 +++++++
++ drivers/net/wireless/ath/ath10k/core.h    |   9 ++-
++ drivers/net/wireless/ath/ath10k/hw.h      |   1 +
++ drivers/net/wireless/ath/ath10k/leds.c    | 103 ++++++++++++++++++++++++++++++
++ drivers/net/wireless/ath/ath10k/leds.h    |  45 +++++++++++++
++ drivers/net/wireless/ath/ath10k/mac.c     |   1 +
++ drivers/net/wireless/ath/ath10k/wmi-ops.h |  32 ++++++++++
++ drivers/net/wireless/ath/ath10k/wmi-tlv.c |   2 +
++ drivers/net/wireless/ath/ath10k/wmi.c     |  54 ++++++++++++++++
++ drivers/net/wireless/ath/ath10k/wmi.h     |  35 ++++++++++
++ 12 files changed, 314 insertions(+), 1 deletion(-)
++ create mode 100644 drivers/net/wireless/ath/ath10k/leds.c
++ create mode 100644 drivers/net/wireless/ath/ath10k/leds.h
++--- a/drivers/net/wireless/ath/ath10k/Kconfig
+++++ b/drivers/net/wireless/ath/ath10k/Kconfig
++@@ -71,6 +71,16 @@ config ATH10K_DEBUGFS
++ 
++ 	  If unsure, say Y to make it easier to debug problems.
++ 
+++config ATH10K_LEDS
+++	bool "Atheros ath10k LED support"
+++	depends on ATH10K
+++	select MAC80211_LEDS
+++	select LEDS_CLASS
+++	select NEW_LEDS
+++	default y
+++	---help---
+++	  This option is necessary, if you want LED support for chipset connected led pins. If unsure, say N.
+++
++ config ATH10K_SPECTRAL
++ 	bool "Atheros ath10k spectral scan support"
++ 	depends on ATH10K_DEBUGFS
++--- a/drivers/net/wireless/ath/ath10k/Makefile
+++++ b/drivers/net/wireless/ath/ath10k/Makefile
++@@ -19,6 +19,7 @@ ath10k_core-$(CPTCFG_ATH10K_SPECTRAL) +=
++ ath10k_core-$(CPTCFG_NL80211_TESTMODE) += testmode.o
++ ath10k_core-$(CPTCFG_ATH10K_TRACING) += trace.o
++ ath10k_core-$(CPTCFG_ATH10K_THERMAL) += thermal.o
+++ath10k_core-$(CPTCFG_ATH10K_LEDS) += leds.o
++ ath10k_core-$(CPTCFG_MAC80211_DEBUGFS) += debugfs_sta.o
++ ath10k_core-$(CONFIG_PM) += wow.o
++ ath10k_core-$(CONFIG_DEV_COREDUMP) += coredump.o
++--- a/local-symbols
+++++ b/local-symbols
++@@ -162,6 +162,7 @@ ATH10K_DEBUG=
++ ATH10K_DEBUGFS=
++ ATH10K_SPECTRAL=
++ ATH10K_THERMAL=
+++ATH10K_LEDS=
++ ATH10K_TRACING=
++ ATH10K_DFS_CERTIFIED=
++ WCN36XX=
++--- a/drivers/net/wireless/ath/ath10k/core.c
+++++ b/drivers/net/wireless/ath/ath10k/core.c
++@@ -26,6 +26,7 @@
++ #include "testmode.h"
++ #include "wmi-ops.h"
++ #include "coredump.h"
+++#include "leds.h"
++ 
++ unsigned int ath10k_debug_mask;
++ EXPORT_SYMBOL(ath10k_debug_mask);
++@@ -65,6 +66,7 @@ static const struct ath10k_hw_params ath
++ 		.dev_id = QCA988X_2_0_DEVICE_ID,
++ 		.bus = ATH10K_BUS_PCI,
++ 		.name = "qca988x hw2.0",
+++		.led_pin = 1,
++ 		.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
++ 		.uart_pin = 7,
++ 		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
++@@ -146,6 +148,7 @@ static const struct ath10k_hw_params ath
++ 		.dev_id = QCA9887_1_0_DEVICE_ID,
++ 		.bus = ATH10K_BUS_PCI,
++ 		.name = "qca9887 hw1.0",
+++		.led_pin = 1,
++ 		.patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
++ 		.uart_pin = 7,
++ 		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
++@@ -387,6 +390,7 @@ static const struct ath10k_hw_params ath
++ 		.dev_id = QCA99X0_2_0_DEVICE_ID,
++ 		.bus = ATH10K_BUS_PCI,
++ 		.name = "qca99x0 hw2.0",
+++		.led_pin = 17,
++ 		.patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
++ 		.uart_pin = 7,
++ 		.otp_exe_param = 0x00000700,
++@@ -433,6 +437,7 @@ static const struct ath10k_hw_params ath
++ 		.dev_id = QCA9984_1_0_DEVICE_ID,
++ 		.bus = ATH10K_BUS_PCI,
++ 		.name = "qca9984/qca9994 hw1.0",
+++		.led_pin = 17,
++ 		.patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
++ 		.uart_pin = 7,
++ 		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
++@@ -486,6 +491,7 @@ static const struct ath10k_hw_params ath
++ 		.dev_id = QCA9888_2_0_DEVICE_ID,
++ 		.bus = ATH10K_BUS_PCI,
++ 		.name = "qca9888 hw2.0",
+++		.led_pin = 17,
++ 		.patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
++ 		.uart_pin = 7,
++ 		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
++@@ -3231,6 +3237,10 @@ int ath10k_core_start(struct ath10k *ar,
++ 		goto err_hif_stop;
++ 	}
++ 
+++	status = ath10k_leds_start(ar);
+++	if (status)
+++		goto err_hif_stop;
+++
++ 	return 0;
++ 
++ err_hif_stop:
++@@ -3489,9 +3499,18 @@ static void ath10k_core_register_work(st
++ 		goto err_spectral_destroy;
++ 	}
++ 
+++	status = ath10k_leds_register(ar);
+++	if (status) {
+++		ath10k_err(ar, "could not register leds: %d\n",
+++			   status);
+++		goto err_thermal_unregister;
+++	}
+++
++ 	set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
++ 	return;
++ 
+++err_thermal_unregister:
+++	ath10k_thermal_unregister(ar);
++ err_spectral_destroy:
++ 	ath10k_spectral_destroy(ar);
++ err_debug_destroy:
++@@ -3537,6 +3556,8 @@ void ath10k_core_unregister(struct ath10
++ 	if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
++ 		return;
++ 
+++	ath10k_leds_unregister(ar);
+++
++ 	ath10k_thermal_unregister(ar);
++ 	/* Stop spectral before unregistering from mac80211 to remove the
++ 	 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
++--- a/drivers/net/wireless/ath/ath10k/core.h
+++++ b/drivers/net/wireless/ath/ath10k/core.h
++@@ -14,6 +14,7 @@
++ #include <linux/pci.h>
++ #include <linux/uuid.h>
++ #include <linux/time.h>
+++#include <linux/leds.h>
++ 
++ #include "htt.h"
++ #include "htc.h"
++@@ -1253,6 +1254,13 @@ struct ath10k {
++ 	} testmode;
++ 
++ 	struct {
+++		struct gpio_led wifi_led;
+++		struct led_classdev cdev;
+++		char label[48];
+++		u32 gpio_state_pin;
+++	} leds;
+++
+++	struct {
++ 		/* protected by data_lock */
++ 		u32 rx_crc_err_drop;
++ 		u32 fw_crash_counter;
++--- a/drivers/net/wireless/ath/ath10k/hw.h
+++++ b/drivers/net/wireless/ath/ath10k/hw.h
++@@ -519,6 +519,7 @@ struct ath10k_hw_params {
++ 	const char *name;
++ 	u32 patch_load_addr;
++ 	int uart_pin;
+++	int led_pin;
++ 	u32 otp_exe_param;
++ 
++ 	/* Type of hw cycle counter wraparound logic, for more info
++--- /dev/null
+++++ b/drivers/net/wireless/ath/ath10k/leds.c
++@@ -0,0 +1,103 @@
+++/*
+++ * Copyright (c) 2005-2011 Atheros Communications Inc.
+++ * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
+++ * Copyright (c) 2018 Sebastian Gottschall <s.gottschall@dd-wrt.com>
+++ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
+++ *
+++ * Permission to use, copy, modify, and/or distribute this software for any
+++ * purpose with or without fee is hereby granted, provided that the above
+++ * copyright notice and this permission notice appear in all copies.
+++ *
+++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+++ */
+++
+++#include <linux/leds.h>
+++
+++#include "core.h"
+++#include "wmi.h"
+++#include "wmi-ops.h"
+++
+++#include "leds.h"
+++
+++static int ath10k_leds_set_brightness_blocking(struct led_classdev *led_cdev,
+++					       enum led_brightness brightness)
+++{
+++	struct ath10k *ar = container_of(led_cdev, struct ath10k,
+++					 leds.cdev);
+++	struct gpio_led *led = &ar->leds.wifi_led;
+++
+++	mutex_lock(&ar->conf_mutex);
+++
+++	if (ar->state != ATH10K_STATE_ON)
+++		goto out;
+++
+++	ar->leds.gpio_state_pin = (brightness != LED_OFF) ^ led->active_low;
+++	ath10k_wmi_gpio_output(ar, led->gpio, ar->leds.gpio_state_pin);
+++
+++out:
+++	mutex_unlock(&ar->conf_mutex);
+++
+++	return 0;
+++}
+++
+++int ath10k_leds_start(struct ath10k *ar)
+++{
+++	if (ar->hw_params.led_pin == 0)
+++		/* leds not supported */
+++		return 0;
+++
+++	/* under some circumstances, the gpio pin gets reconfigured
+++	 * to default state by the firmware, so we need to
+++	 * reconfigure it this behaviour has only ben seen on
+++	 * QCA9984 and QCA99XX devices so far
+++	 */
+++	ath10k_wmi_gpio_config(ar, ar->hw_params.led_pin, 0,
+++			       WMI_GPIO_PULL_NONE, WMI_GPIO_INTTYPE_DISABLE);
+++	ath10k_wmi_gpio_output(ar, ar->hw_params.led_pin, 1);
+++
+++	return 0;
+++}
+++
+++int ath10k_leds_register(struct ath10k *ar)
+++{
+++	int ret;
+++
+++	if (ar->hw_params.led_pin == 0)
+++		/* leds not supported */
+++		return 0;
+++
+++	snprintf(ar->leds.label, sizeof(ar->leds.label), "ath10k-%s",
+++		 wiphy_name(ar->hw->wiphy));
+++	ar->leds.wifi_led.active_low = 1;
+++	ar->leds.wifi_led.gpio = ar->hw_params.led_pin;
+++	ar->leds.wifi_led.name = ar->leds.label;
+++	ar->leds.wifi_led.default_state = LEDS_GPIO_DEFSTATE_KEEP;
+++
+++	ar->leds.cdev.name = ar->leds.label;
+++	ar->leds.cdev.brightness_set_blocking = ath10k_leds_set_brightness_blocking;
+++
+++	/* FIXME: this assignment doesn't make sense as it's NULL, remove it? */
+++	ar->leds.cdev.default_trigger = ar->leds.wifi_led.default_trigger;
+++
+++	ret = led_classdev_register(wiphy_dev(ar->hw->wiphy), &ar->leds.cdev);
+++	if (ret)
+++		return ret;
+++
+++	return 0;
+++}
+++
+++void ath10k_leds_unregister(struct ath10k *ar)
+++{
+++	if (ar->hw_params.led_pin == 0)
+++		/* leds not supported */
+++		return;
+++
+++	led_classdev_unregister(&ar->leds.cdev);
+++}
+++
++--- /dev/null
+++++ b/drivers/net/wireless/ath/ath10k/leds.h
++@@ -0,0 +1,41 @@
+++/*
+++ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
+++ *
+++ * Permission to use, copy, modify, and/or distribute this software for any
+++ * purpose with or without fee is hereby granted, provided that the above
+++ * copyright notice and this permission notice appear in all copies.
+++ *
+++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+++ */
+++#ifndef _LEDS_H_
+++#define _LEDS_H_
+++
+++#include "core.h"
+++
+++#ifdef CPTCFG_ATH10K_LEDS
+++void ath10k_leds_unregister(struct ath10k *ar);
+++int ath10k_leds_start(struct ath10k *ar);
+++int ath10k_leds_register(struct ath10k *ar);
+++#else
+++static inline void ath10k_leds_unregister(struct ath10k *ar)
+++{
+++}
+++
+++static inline int ath10k_leds_start(struct ath10k *ar)
+++{
+++	return 0;
+++}
+++
+++static inline int ath10k_leds_register(struct ath10k *ar)
+++{
+++	return 0;
+++}
+++
+++#endif
+++#endif /* _LEDS_H_ */
++--- a/drivers/net/wireless/ath/ath10k/mac.c
+++++ b/drivers/net/wireless/ath/ath10k/mac.c
++@@ -24,6 +24,7 @@
++ #include "wmi-tlv.h"
++ #include "wmi-ops.h"
++ #include "wow.h"
+++#include "leds.h"
++ 
++ /*********/
++ /* Rates */
++--- a/drivers/net/wireless/ath/ath10k/wmi-ops.h
+++++ b/drivers/net/wireless/ath/ath10k/wmi-ops.h
++@@ -226,7 +226,10 @@ struct wmi_ops {
++ 			 const struct wmi_bb_timing_cfg_arg *arg);
++ 	struct sk_buff *(*gen_per_peer_per_tid_cfg)(struct ath10k *ar,
++ 						    const struct wmi_per_peer_per_tid_cfg_arg *arg);
+++	struct sk_buff *(*gen_gpio_config)(struct ath10k *ar, u32 gpio_num,
+++					   u32 input, u32 pull_type, u32 intr_mode);
++ 
+++	struct sk_buff *(*gen_gpio_output)(struct ath10k *ar, u32 gpio_num, u32 set);
++ };
++ 
++ int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id);
++@@ -1122,6 +1125,35 @@ ath10k_wmi_force_fw_hang(struct ath10k *
++ 	return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->force_fw_hang_cmdid);
++ }
++ 
+++static inline int ath10k_wmi_gpio_config(struct ath10k *ar, u32 gpio_num,
+++					 u32 input, u32 pull_type, u32 intr_mode)
+++{
+++	struct sk_buff *skb;
+++
+++	if (!ar->wmi.ops->gen_gpio_config)
+++		return -EOPNOTSUPP;
+++
+++	skb = ar->wmi.ops->gen_gpio_config(ar, gpio_num, input, pull_type, intr_mode);
+++	if (IS_ERR(skb))
+++		return PTR_ERR(skb);
+++
+++	return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->gpio_config_cmdid);
+++}
+++
+++static inline int ath10k_wmi_gpio_output(struct ath10k *ar, u32 gpio_num, u32 set)
+++{
+++	struct sk_buff *skb;
+++
+++	if (!ar->wmi.ops->gen_gpio_config)
+++		return -EOPNOTSUPP;
+++
+++	skb = ar->wmi.ops->gen_gpio_output(ar, gpio_num, set);
+++	if (IS_ERR(skb))
+++		return PTR_ERR(skb);
+++
+++	return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->gpio_output_cmdid);
+++}
+++
++ static inline int
++ ath10k_wmi_dbglog_cfg(struct ath10k *ar, u64 module_enable, u32 log_level)
++ {
++--- a/drivers/net/wireless/ath/ath10k/wmi-tlv.c
+++++ b/drivers/net/wireless/ath/ath10k/wmi-tlv.c
++@@ -4594,6 +4594,8 @@ static const struct wmi_ops wmi_tlv_ops
++ 	.gen_echo = ath10k_wmi_tlv_op_gen_echo,
++ 	.gen_vdev_spectral_conf = ath10k_wmi_tlv_op_gen_vdev_spectral_conf,
++ 	.gen_vdev_spectral_enable = ath10k_wmi_tlv_op_gen_vdev_spectral_enable,
+++	/* .gen_gpio_config not implemented */
+++	/* .gen_gpio_output not implemented */
++ };
++ 
++ static const struct wmi_peer_flags_map wmi_tlv_peer_flags_map = {
++--- a/drivers/net/wireless/ath/ath10k/wmi.c
+++++ b/drivers/net/wireless/ath/ath10k/wmi.c
++@@ -7472,6 +7472,49 @@ ath10k_wmi_op_gen_peer_set_param(struct
++ 	return skb;
++ }
++ 
+++static struct sk_buff *ath10k_wmi_op_gen_gpio_config(struct ath10k *ar,
+++						     u32 gpio_num, u32 input,
+++						     u32 pull_type, u32 intr_mode)
+++{
+++	struct wmi_gpio_config_cmd *cmd;
+++	struct sk_buff *skb;
+++
+++	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
+++	if (!skb)
+++		return ERR_PTR(-ENOMEM);
+++
+++	cmd = (struct wmi_gpio_config_cmd *)skb->data;
+++	cmd->pull_type = __cpu_to_le32(pull_type);
+++	cmd->gpio_num = __cpu_to_le32(gpio_num);
+++	cmd->input = __cpu_to_le32(input);
+++	cmd->intr_mode = __cpu_to_le32(intr_mode);
+++
+++	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi gpio_config gpio_num 0x%08x input 0x%08x pull_type 0x%08x intr_mode 0x%08x\n",
+++		   gpio_num, input, pull_type, intr_mode);
+++
+++	return skb;
+++}
+++
+++static struct sk_buff *ath10k_wmi_op_gen_gpio_output(struct ath10k *ar,
+++						     u32 gpio_num, u32 set)
+++{
+++	struct wmi_gpio_output_cmd *cmd;
+++	struct sk_buff *skb;
+++
+++	skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
+++	if (!skb)
+++		return ERR_PTR(-ENOMEM);
+++
+++	cmd = (struct wmi_gpio_output_cmd *)skb->data;
+++	cmd->gpio_num = __cpu_to_le32(gpio_num);
+++	cmd->set = __cpu_to_le32(set);
+++
+++	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi gpio_output gpio_num 0x%08x set 0x%08x\n",
+++		   gpio_num, set);
+++
+++	return skb;
+++}
+++
++ static struct sk_buff *
++ ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
++ 			     enum wmi_sta_ps_mode psmode)
++@@ -9160,6 +9203,9 @@ static const struct wmi_ops wmi_ops = {
++ 	.fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
++ 	.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
++ 	.gen_echo = ath10k_wmi_op_gen_echo,
+++	.gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
+++	.gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
+++
++ 	/* .gen_bcn_tmpl not implemented */
++ 	/* .gen_prb_tmpl not implemented */
++ 	/* .gen_p2p_go_bcn_ie not implemented */
++@@ -9230,6 +9276,8 @@ static const struct wmi_ops wmi_10_1_ops
++ 	.fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
++ 	.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
++ 	.gen_echo = ath10k_wmi_op_gen_echo,
+++	.gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
+++	.gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
++ 	/* .gen_bcn_tmpl not implemented */
++ 	/* .gen_prb_tmpl not implemented */
++ 	/* .gen_p2p_go_bcn_ie not implemented */
++@@ -9302,6 +9350,8 @@ static const struct wmi_ops wmi_10_2_ops
++ 	.gen_delba_send = ath10k_wmi_op_gen_delba_send,
++ 	.fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
++ 	.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
+++	.gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
+++	.gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
++ 	/* .gen_pdev_enable_adaptive_cca not implemented */
++ };
++ 
++@@ -9373,6 +9423,8 @@ static const struct wmi_ops wmi_10_2_4_o
++ 		ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
++ 	.get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
++ 	.gen_bb_timing = ath10k_wmi_10_2_4_op_gen_bb_timing,
+++	.gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
+++	.gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
++ 	/* .gen_bcn_tmpl not implemented */
++ 	/* .gen_prb_tmpl not implemented */
++ 	/* .gen_p2p_go_bcn_ie not implemented */
++@@ -9454,6 +9506,8 @@ static const struct wmi_ops wmi_10_4_ops
++ 	.gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
++ 	.gen_echo = ath10k_wmi_op_gen_echo,
++ 	.gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
+++	.gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
+++	.gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
++ };
++ 
++ int ath10k_wmi_attach(struct ath10k *ar)
++--- a/drivers/net/wireless/ath/ath10k/wmi.h
+++++ b/drivers/net/wireless/ath/ath10k/wmi.h
++@@ -3030,6 +3030,41 @@ enum wmi_10_4_feature_mask {
++ 
++ };
++ 
+++/* WMI_GPIO_CONFIG_CMDID */
+++enum {
+++	WMI_GPIO_PULL_NONE,
+++	WMI_GPIO_PULL_UP,
+++	WMI_GPIO_PULL_DOWN,
+++};
+++
+++enum {
+++	WMI_GPIO_INTTYPE_DISABLE,
+++	WMI_GPIO_INTTYPE_RISING_EDGE,
+++	WMI_GPIO_INTTYPE_FALLING_EDGE,
+++	WMI_GPIO_INTTYPE_BOTH_EDGE,
+++	WMI_GPIO_INTTYPE_LEVEL_LOW,
+++	WMI_GPIO_INTTYPE_LEVEL_HIGH
+++};
+++
+++/* WMI_GPIO_CONFIG_CMDID */
+++struct wmi_gpio_config_cmd {
+++	__le32 gpio_num;             /* GPIO number to be setup */
+++	__le32 input;                /* 0 - Output/ 1 - Input */
+++	__le32 pull_type;            /* Pull type defined above */
+++	__le32 intr_mode;            /* Interrupt mode defined above (Input) */
+++} __packed;
+++
+++/* WMI_GPIO_OUTPUT_CMDID */
+++struct wmi_gpio_output_cmd {
+++	__le32 gpio_num;    /* GPIO number to be setup */
+++	__le32 set;         /* Set the GPIO pin*/
+++} __packed;
+++
+++/* WMI_GPIO_INPUT_EVENTID */
+++struct wmi_gpio_input_event {
+++	__le32 gpio_num;    /* GPIO number which changed state */
+++} __packed;
+++
++ struct wmi_ext_resource_config_10_4_cmd {
++ 	/* contains enum wmi_host_platform_type */
++ 	__le32 host_platform_config;
+diff --git a/package/kernel/mac80211/patches/ath10k/975-ath10k-use-tpt-trigger-by-default.patch b/package/kernel/mac80211/patches/ath10k/975-ath10k-use-tpt-trigger-by-default.patch
+new file mode 100644
+index 0000000000..4c1f9aa815
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath10k/975-ath10k-use-tpt-trigger-by-default.patch
+@@ -0,0 +1,53 @@
++From 79c9d7aabae1d1da9eea97d83b61e1517a8a2221 Mon Sep 17 00:00:00 2001
++From: Mathias Kresin <dev@kresin.me>
++Date: Fri, 22 Jun 2018 18:59:44 +0200
++Subject: [PATCH] ath10k: use tpt LED trigger by default
++
++Use the tpt LED trigger for each created phy led. Ths way LEDs attached
++to the ath10k GPIO pins are indicating the phy status and blink on
++traffic.
++
++Signed-off-by: Mathias Kresin <dev@kresin.me>
++---
++ drivers/net/wireless/ath/ath10k/core.h | 4 ++++
++ drivers/net/wireless/ath/ath10k/leds.c | 4 +---
++ drivers/net/wireless/ath/ath10k/mac.c  | 2 +-
++ 3 files changed, 6 insertions(+), 4 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath10k/core.h
+++++ b/drivers/net/wireless/ath/ath10k/core.h
++@@ -1309,6 +1309,10 @@ struct ath10k {
++ 	s32 tx_power_2g_limit;
++ 	s32 tx_power_5g_limit;
++ 
+++#ifdef CPTCFG_MAC80211_LEDS
+++	const char *led_default_trigger;
+++#endif
+++
++ 	/* must be last */
++ 	u8 drv_priv[] __aligned(sizeof(void *));
++ };
++--- a/drivers/net/wireless/ath/ath10k/leds.c
+++++ b/drivers/net/wireless/ath/ath10k/leds.c
++@@ -81,9 +81,7 @@ int ath10k_leds_register(struct ath10k *
++ 
++ 	ar->leds.cdev.name = ar->leds.label;
++ 	ar->leds.cdev.brightness_set_blocking = ath10k_leds_set_brightness_blocking;
++-
++-	/* FIXME: this assignment doesn't make sense as it's NULL, remove it? */
++-	ar->leds.cdev.default_trigger = ar->leds.wifi_led.default_trigger;
+++	ar->leds.cdev.default_trigger = ar->led_default_trigger;
++ 
++ 	ret = led_classdev_register(wiphy_dev(ar->hw->wiphy), &ar->leds.cdev);
++ 	if (ret)
++--- a/drivers/net/wireless/ath/ath10k/mac.c
+++++ b/drivers/net/wireless/ath/ath10k/mac.c
++@@ -10284,7 +10284,7 @@ int ath10k_mac_register(struct ath10k *a
++ 	ar->hw->weight_multiplier = ATH10K_AIRTIME_WEIGHT_MULTIPLIER;
++ 
++ #ifdef CPTCFG_MAC80211_LEDS
++-	ieee80211_create_tpt_led_trigger(ar->hw,
+++	ar->led_default_trigger = ieee80211_create_tpt_led_trigger(ar->hw,
++ 		IEEE80211_TPT_LEDTRIG_FL_RADIO, ath10k_tpt_blink,
++ 		ARRAY_SIZE(ath10k_tpt_blink));
++ #endif
+diff --git a/package/kernel/mac80211/patches/ath10k/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch b/package/kernel/mac80211/patches/ath10k/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch
+new file mode 100644
+index 0000000000..3626debf19
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath10k/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch
+@@ -0,0 +1,101 @@
++From: Sven Eckelmann <seckelmann@datto.com>
++Date: Wed, 28 Nov 2018 16:16:27 +0100
++Subject: ath10k: adjust tx power reduction for US regulatory domain
++
++FCC allows maximum antenna gain of 6 dBi. 15.247(b)(4):
++
++> (4) The conducted output power limit
++> specified in paragraph (b) of this section
++> is based on the use of antennas
++> with directional gains that do not exceed
++> 6 dBi. Except as shown in paragraph
++> (c) of this section, if transmitting
++> antennas of directional gain greater
++> than 6 dBi are used, the conducted
++> output power from the intentional radiator
++> shall be reduced below the stated
++> values in paragraphs (b)(1), (b)(2),
++> and (b)(3) of this section, as appropriate,
++> by the amount in dB that the
++> directional gain of the antenna exceeds
++> 6 dBi.
++
++https://www.gpo.gov/fdsys/pkg/CFR-2013-title47-vol1/pdf/CFR-2013-title47-vol1-sec15-247.pdf
++
++Signed-off-by: Sven Eckelmann <seckelmann@datto.com>
++
++Forwarded: no
++
++--- a/drivers/net/wireless/ath/ath10k/mac.c
+++++ b/drivers/net/wireless/ath/ath10k/mac.c
++@@ -1028,6 +1028,40 @@ static inline int ath10k_vdev_setup_sync
++ 	return ar->last_wmi_vdev_start_status;
++ }
++ 
+++static u32 ath10k_get_max_antenna_gain(struct ath10k *ar,
+++				       u32 ch_max_antenna_gain)
+++{
+++	u32 max_antenna_gain;
+++
+++	if (ar->dfs_detector && ar->dfs_detector->region == NL80211_DFS_FCC) {
+++		/* FCC allows maximum antenna gain of 6 dBi. 15.247(b)(4):
+++		 *
+++		 * > (4) The conducted output power limit
+++		 * > specified in paragraph (b) of this section
+++		 * > is based on the use of antennas
+++		 * > with directional gains that do not exceed
+++		 * > 6 dBi. Except as shown in paragraph
+++		 * > (c) of this section, if transmitting
+++		 * > antennas of directional gain greater
+++		 * > than 6 dBi are used, the conducted
+++		 * > output power from the intentional radiator
+++		 * > shall be reduced below the stated
+++		 * > values in paragraphs (b)(1), (b)(2),
+++		 * > and (b)(3) of this section, as appropriate,
+++		 * > by the amount in dB that the
+++		 * > directional gain of the antenna exceeds
+++		 * > 6 dBi.
+++		 *
+++		 * https://www.gpo.gov/fdsys/pkg/CFR-2013-title47-vol1/pdf/CFR-2013-title47-vol1-sec15-247.pdf
+++		 */
+++		max_antenna_gain = 6;
+++	} else {
+++		max_antenna_gain = 0;
+++	}
+++
+++	return max(ch_max_antenna_gain, max_antenna_gain);
+++}
+++
++ static int ath10k_monitor_vdev_start(struct ath10k *ar, int vdev_id)
++ {
++ 	struct cfg80211_chan_def *chandef = NULL;
++@@ -1060,7 +1094,8 @@ static int ath10k_monitor_vdev_start(str
++ 	arg.channel.min_power = 0;
++ 	arg.channel.max_power = channel->max_power * 2;
++ 	arg.channel.max_reg_power = channel->max_reg_power * 2;
++-	arg.channel.max_antenna_gain = channel->max_antenna_gain;
+++	arg.channel.max_antenna_gain = ath10k_get_max_antenna_gain(ar,
+++						channel->max_antenna_gain);
++ 
++ 	reinit_completion(&ar->vdev_setup_done);
++ 	reinit_completion(&ar->vdev_delete_done);
++@@ -1506,7 +1541,8 @@ static int ath10k_vdev_start_restart(str
++ 	arg.channel.min_power = 0;
++ 	arg.channel.max_power = chandef->chan->max_power * 2;
++ 	arg.channel.max_reg_power = chandef->chan->max_reg_power * 2;
++-	arg.channel.max_antenna_gain = chandef->chan->max_antenna_gain;
+++	arg.channel.max_antenna_gain = ath10k_get_max_antenna_gain(ar,
+++					chandef->chan->max_antenna_gain);
++ 
++ 	if (arvif->vdev_type == WMI_VDEV_TYPE_AP) {
++ 		arg.ssid = arvif->u.ap.ssid;
++@@ -3437,7 +3473,8 @@ static int ath10k_update_channel_list(st
++ 			ch->min_power = 0;
++ 			ch->max_power = channel->max_power * 2;
++ 			ch->max_reg_power = channel->max_reg_power * 2;
++-			ch->max_antenna_gain = channel->max_antenna_gain;
+++			ch->max_antenna_gain = ath10k_get_max_antenna_gain(ar,
+++						channel->max_antenna_gain);
++ 			ch->reg_class_id = 0; /* FIXME */
++ 
++ 			/* FIXME: why use only legacy modes, why not any
+diff --git a/package/kernel/mac80211/patches/ath10k/984-ath10k-Try-to-get-mac-address-from-dts.patch b/package/kernel/mac80211/patches/ath10k/984-ath10k-Try-to-get-mac-address-from-dts.patch
+new file mode 100644
+index 0000000000..084e28a2d9
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath10k/984-ath10k-Try-to-get-mac-address-from-dts.patch
+@@ -0,0 +1,37 @@
++From 22fb5991a44c78ff18ec0082dc90c809356eb893 Mon Sep 17 00:00:00 2001
++From: Ansuel Smith <ansuelsmth@gmail.com>
++Date: Sun, 27 Sep 2020 19:23:35 +0200
++Subject: [PATCH 1/2] ath10k: Try to get mac-address from dts
++
++Most of embedded device that have the ath10k wifi integrated store the
++mac-address in nvmem partitions. Try to fetch the mac-address using the
++standard 'of_get_mac_address' than in all the check also try to fetch the
++address using the nvmem api searching for a defined 'mac-address' cell.
++Mac-address defined in the dts have priority than any other address found.
++
++Tested-on: QCA9984 hw1.0 PCI 10.4
++
++Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
++---
++ drivers/net/wireless/ath/ath10k/core.c | 10 ++++++++++
++ 1 file changed, 10 insertions(+)
++
++--- a/drivers/net/wireless/ath/ath10k/core.c
+++++ b/drivers/net/wireless/ath/ath10k/core.c
++@@ -8,6 +8,7 @@
++ #include <linux/module.h>
++ #include <linux/firmware.h>
++ #include <linux/of.h>
+++#include <linux/of_net.h>
++ #include <linux/property.h>
++ #include <linux/dmi.h>
++ #include <linux/ctype.h>
++@@ -3407,6 +3408,8 @@ static int ath10k_core_probe_fw(struct a
++ 
++ 	device_get_mac_address(ar->dev, ar->mac_addr);
++ 
+++	of_get_mac_address(ar->dev->of_node, ar->mac_addr);
+++
++ 	ret = ath10k_core_init_firmware_features(ar);
++ 	if (ret) {
++ 		ath10k_err(ar, "fatal problem with firmware features: %d\n",
+diff --git a/package/kernel/mac80211/patches/ath10k/988-ath10k-always-use-mac80211-loss-detection.patch b/package/kernel/mac80211/patches/ath10k/988-ath10k-always-use-mac80211-loss-detection.patch
+new file mode 100644
+index 0000000000..f025fea63b
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath10k/988-ath10k-always-use-mac80211-loss-detection.patch
+@@ -0,0 +1,28 @@
++From f7d6edafe4358e3880a26775cfde4cd5c71ba063 Mon Sep 17 00:00:00 2001
++From: David Bauer <mail@david-bauer.net>
++Date: Wed, 5 Jul 2023 01:30:29 +0200
++Subject: [PATCH] ath10k: always use mac80211 loss detection
++
++ath10k does not report excessive loss in case of broken block-ack
++sessions. The loss is communicated to the host-os, but ath10k does not
++trigger a low-ack events by itself.
++
++The mac80211 framework for loss detection however detects this
++circumstance well in case of ath10k. So use it regardless of ath10k's
++own loss detection mechanism.
++
++Signed-off-by: David Bauer <mail@david-bauer.net>
++---
++ drivers/net/wireless/ath/ath10k/mac.c | 1 -
++ 1 file changed, 1 deletion(-)
++
++--- a/drivers/net/wireless/ath/ath10k/mac.c
+++++ b/drivers/net/wireless/ath/ath10k/mac.c
++@@ -10080,7 +10080,6 @@ int ath10k_mac_register(struct ath10k *a
++ 	ieee80211_hw_set(ar->hw, CHANCTX_STA_CSA);
++ 	ieee80211_hw_set(ar->hw, QUEUE_CONTROL);
++ 	ieee80211_hw_set(ar->hw, SUPPORTS_TX_FRAG);
++-	ieee80211_hw_set(ar->hw, REPORTS_LOW_ACK);
++ 
++ 	if (!test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags))
++ 		ieee80211_hw_set(ar->hw, SW_CRYPTO_CONTROL);
+diff --git a/package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch b/package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch
+new file mode 100644
+index 0000000000..2f560c70a0
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch
+@@ -0,0 +1,64 @@
++--- a/drivers/net/wireless/ath/ath10k/htt.h
+++++ b/drivers/net/wireless/ath/ath10k/htt.h
++@@ -235,7 +235,11 @@ enum htt_rx_ring_flags {
++ };
++ 
++ #define HTT_RX_RING_SIZE_MIN 128
+++#ifndef CONFIG_ATH10K_SMALLBUFFERS
++ #define HTT_RX_RING_SIZE_MAX 2048
+++#else
+++#define HTT_RX_RING_SIZE_MAX 512
+++#endif
++ #define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX
++ #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
++ #define HTT_RX_RING_FILL_LEVEL_DUAL_MAC (HTT_RX_RING_SIZE - 1)
++--- a/drivers/net/wireless/ath/ath10k/pci.c
+++++ b/drivers/net/wireless/ath/ath10k/pci.c
++@@ -131,7 +131,11 @@ static const struct ce_attr pci_host_ce_
++ 		.flags = CE_ATTR_FLAGS,
++ 		.src_nentries = 0,
++ 		.src_sz_max = 2048,
+++#ifndef CONFIG_ATH10K_SMALLBUFFERS
++ 		.dest_nentries = 512,
+++#else
+++		.dest_nentries = 128,
+++#endif
++ 		.recv_cb = ath10k_pci_htt_htc_rx_cb,
++ 	},
++ 
++@@ -140,7 +144,11 @@ static const struct ce_attr pci_host_ce_
++ 		.flags = CE_ATTR_FLAGS,
++ 		.src_nentries = 0,
++ 		.src_sz_max = 2048,
+++#ifndef CONFIG_ATH10K_SMALLBUFFERS
++ 		.dest_nentries = 128,
+++#else
+++		.dest_nentries = 64,
+++#endif
++ 		.recv_cb = ath10k_pci_htc_rx_cb,
++ 	},
++ 
++@@ -167,7 +175,11 @@ static const struct ce_attr pci_host_ce_
++ 		.flags = CE_ATTR_FLAGS,
++ 		.src_nentries = 0,
++ 		.src_sz_max = 512,
+++#ifndef CONFIG_ATH10K_SMALLBUFFERS
++ 		.dest_nentries = 512,
+++#else
+++		.dest_nentries = 128,
+++#endif
++ 		.recv_cb = ath10k_pci_htt_rx_cb,
++ 	},
++ 
++@@ -192,7 +204,11 @@ static const struct ce_attr pci_host_ce_
++ 		.flags = CE_ATTR_FLAGS,
++ 		.src_nentries = 0,
++ 		.src_sz_max = 2048,
+++#ifndef CONFIG_ATH10K_SMALLBUFFERS
++ 		.dest_nentries = 128,
+++#else
+++		.dest_nentries = 96,
+++#endif
++ 		.recv_cb = ath10k_pci_pktlog_rx_cb,
++ 	},
++ 
+diff --git a/package/kernel/mac80211/patches/ath11k/0001-wifi-ath11k-stop-tx-queues-immediately-upon-firmware.patch b/package/kernel/mac80211/patches/ath11k/0001-wifi-ath11k-stop-tx-queues-immediately-upon-firmware.patch
+new file mode 100644
+index 0000000000..d0dc04febf
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0001-wifi-ath11k-stop-tx-queues-immediately-upon-firmware.patch
+@@ -0,0 +1,78 @@
++From 81e60b2dfb2744ab6642c4aa62534b4f711fdc5d Mon Sep 17 00:00:00 2001
++From: Aditya Kumar Singh <quic_adisi@quicinc.com>
++Date: Tue, 27 Sep 2022 09:18:54 +0300
++Subject: [PATCH] wifi: ath11k: stop tx queues immediately upon firmware exit
++
++Currently, recovery flag is set immediately upon firmware
++exit but tx queues are stopped once firmware arrives back
++and is ready which is during ath11k_core_restart. Once
++ieee80211 hw restart is completed, tx queues are resumed.
++If during the time delta between firmware exit and firmware
++ready, mac80211 send packets, currently ath11k will drop it
++since recovery flag will be set. But warning prints will
++come -
++  "ath11k c000000.wifi: failed to transmit frame -108"
++
++If more tx packets are there, this could lead to flooding
++of above print.
++
++However, actually tx queues should be stopped immediately
++when firmware leaves. This will prevent packets to get
++dropped when firmware is recovering.
++
++Add fix to stop tx queues immediately after firmware exit.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20220923170235.18873-1-quic_adisi@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/core.c | 5 +----
++ drivers/net/wireless/ath/ath11k/core.h | 1 +
++ drivers/net/wireless/ath/ath11k/qmi.c  | 3 +++
++ 3 files changed, 5 insertions(+), 4 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/core.c
+++++ b/drivers/net/wireless/ath/ath11k/core.c
++@@ -1641,7 +1641,7 @@ static void ath11k_update_11d(struct wor
++ 	}
++ }
++ 
++-static void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab)
+++void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab)
++ {
++ 	struct ath11k *ar;
++ 	struct ath11k_pdev *pdev;
++@@ -1730,9 +1730,6 @@ static void ath11k_core_restart(struct w
++ 	struct ath11k_base *ab = container_of(work, struct ath11k_base, restart_work);
++ 	int ret;
++ 
++-	if (!ab->is_reset)
++-		ath11k_core_pre_reconfigure_recovery(ab);
++-
++ 	ret = ath11k_core_reconfigure_on_crash(ab);
++ 	if (ret) {
++ 		ath11k_err(ab, "failed to reconfigure driver on crash recovery\n");
++--- a/drivers/net/wireless/ath/ath11k/core.h
+++++ b/drivers/net/wireless/ath/ath11k/core.h
++@@ -1158,6 +1158,7 @@ int ath11k_core_check_smbios(struct ath1
++ void ath11k_core_halt(struct ath11k *ar);
++ int ath11k_core_resume(struct ath11k_base *ab);
++ int ath11k_core_suspend(struct ath11k_base *ab);
+++void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab);
++ 
++ const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
++ 						    const char *filename);
++--- a/drivers/net/wireless/ath/ath11k/qmi.c
+++++ b/drivers/net/wireless/ath/ath11k/qmi.c
++@@ -3164,6 +3164,9 @@ static void ath11k_qmi_driver_event_work
++ 		case ATH11K_QMI_EVENT_SERVER_EXIT:
++ 			set_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags);
++ 			set_bit(ATH11K_FLAG_RECOVERY, &ab->dev_flags);
+++
+++			if (!ab->is_reset)
+++				ath11k_core_pre_reconfigure_recovery(ab);
++ 			break;
++ 		case ATH11K_QMI_EVENT_REQUEST_MEM:
++ 			ret = ath11k_qmi_event_mem_request(qmi);
+diff --git a/package/kernel/mac80211/patches/ath11k/0002-wifi-ath11k-Don-t-exit-on-wakeup-failure.patch b/package/kernel/mac80211/patches/ath11k/0002-wifi-ath11k-Don-t-exit-on-wakeup-failure.patch
+new file mode 100644
+index 0000000000..47385e0458
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0002-wifi-ath11k-Don-t-exit-on-wakeup-failure.patch
+@@ -0,0 +1,45 @@
++From 45d2e268369b0c768d5a644f319758bcfd370521 Mon Sep 17 00:00:00 2001
++From: Baochen Qiang <quic_bqiang@quicinc.com>
++Date: Wed, 28 Sep 2022 09:51:40 +0800
++Subject: [PATCH] wifi: ath11k: Don't exit on wakeup failure
++
++Currently, ath11k_pcic_read() returns an error if wakeup()
++fails, this makes firmware crash debug quite hard because we can
++get nothing.
++
++Change to go ahead on wakeup failure, in that case we still may
++get something valid to check. There should be no mislead due
++to incorrect content because we are aware of the failure with the
++log printed.
++
++Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
++
++Signed-off-by: Baochen Qiang <quic_bqiang@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20220928015140.5431-1-quic_bqiang@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/pcic.c | 13 ++++++++++---
++ 1 file changed, 10 insertions(+), 3 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/pcic.c
+++++ b/drivers/net/wireless/ath/ath11k/pcic.c
++@@ -218,9 +218,16 @@ int ath11k_pcic_read(struct ath11k_base
++ 	if (wakeup_required && ab->pci.ops->wakeup) {
++ 		ret = ab->pci.ops->wakeup(ab);
++ 		if (ret) {
++-			ath11k_warn(ab, "failed to wakeup for read from 0x%x: %d\n",
++-				    start, ret);
++-			return ret;
+++			ath11k_warn(ab,
+++				    "wakeup failed, data may be invalid: %d",
+++				    ret);
+++			/* Even though wakeup() failed, continue processing rather
+++			 * than returning because some parts of the data may still
+++			 * be valid and useful in some cases, e.g. could give us
+++			 * some clues on firmware crash.
+++			 * Mislead due to invalid data could be avoided because we
+++			 * are aware of the wakeup failure.
+++			 */
++ 		}
++ 	}
++ 
+diff --git a/package/kernel/mac80211/patches/ath11k/0005-wifi-ath11k-Fix-spelling-mistake-chnange-change.patch b/package/kernel/mac80211/patches/ath11k/0005-wifi-ath11k-Fix-spelling-mistake-chnange-change.patch
+new file mode 100644
+index 0000000000..4b52252ef3
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0005-wifi-ath11k-Fix-spelling-mistake-chnange-change.patch
+@@ -0,0 +1,25 @@
++From a797f479bf3e02c6d179c2e6aeace7f9b22b0acd Mon Sep 17 00:00:00 2001
++From: Colin Ian King <colin.i.king@gmail.com>
++Date: Wed, 28 Sep 2022 15:38:34 +0100
++Subject: [PATCH] wifi: ath11k: Fix spelling mistake "chnange" -> "change"
++
++There is a spelling mistake in an ath11k_dbg debug message. Fix it.
++
++Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20220928143834.35189-1-colin.i.king@gmail.com
++---
++ drivers/net/wireless/ath/ath11k/wmi.c | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++++ b/drivers/net/wireless/ath/ath11k/wmi.c
++@@ -6829,7 +6829,7 @@ static void ath11k_wmi_event_peer_sta_ps
++ 	}
++ 
++ 	ath11k_dbg(ab, ATH11K_DBG_WMI,
++-		   "peer sta ps chnange ev addr %pM state %u sup_bitmap %x ps_valid %u ts %u\n",
+++		   "peer sta ps change ev addr %pM state %u sup_bitmap %x ps_valid %u ts %u\n",
++ 		   ev->peer_macaddr.addr, ev->peer_ps_state,
++ 		   ev->ps_supported_bitmap, ev->peer_ps_valid,
++ 		   ev->peer_ps_timestamp);
+diff --git a/package/kernel/mac80211/patches/ath11k/0007-wifi-ath11k-suppress-add-interface-error.patch b/package/kernel/mac80211/patches/ath11k/0007-wifi-ath11k-suppress-add-interface-error.patch
+new file mode 100644
+index 0000000000..fbef0abb8d
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0007-wifi-ath11k-suppress-add-interface-error.patch
+@@ -0,0 +1,52 @@
++From 638b26652b0438563a76ec90014c8cba34db982b Mon Sep 17 00:00:00 2001
++From: Karthikeyan Periyasamy <quic_periyasa@quicinc.com>
++Date: Thu, 6 Oct 2022 06:28:42 +0530
++Subject: [PATCH 7/9] wifi: ath11k: suppress add interface error
++
++In the VIF (other than monitor type) creation request, we should not
++throw the error code when the monitor VIF creation fails, since the
++actual VIF creation succeeds. If we throw the error code from driver
++then the actual VIF creation get fail. So suppress the monitor VIF
++creation error by throwing warning message instead of error code.
++
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.6.0.1-00760-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Karthikeyan Periyasamy <quic_periyasa@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221006005842.8599-1-quic_periyasa@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 9 +++------
++ 1 file changed, 3 insertions(+), 6 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -6421,18 +6421,16 @@ static int ath11k_mac_op_add_interface(s
++ 
++ 	ath11k_dp_vdev_tx_attach(ar, arvif);
++ 
+++	ath11k_debugfs_add_interface(arvif);
+++
++ 	if (vif->type != NL80211_IFTYPE_MONITOR &&
++ 	    test_bit(ATH11K_FLAG_MONITOR_CONF_ENABLED, &ar->monitor_flags)) {
++ 		ret = ath11k_mac_monitor_vdev_create(ar);
++-		if (ret) {
+++		if (ret)
++ 			ath11k_warn(ar->ab, "failed to create monitor vdev during add interface: %d",
++ 				    ret);
++-			goto err_peer_del;
++-		}
++ 	}
++ 
++-	ath11k_debugfs_add_interface(arvif);
++-
++ 	mutex_unlock(&ar->conf_mutex);
++ 
++ 	return 0;
++@@ -6457,7 +6455,6 @@ err_vdev_del:
++ 	spin_unlock_bh(&ar->data_lock);
++ 
++ err:
++-	ath11k_debugfs_remove_interface(arvif);
++ 	mutex_unlock(&ar->conf_mutex);
++ 
++ 	return ret;
+diff --git a/package/kernel/mac80211/patches/ath11k/0008-wifi-ath11k-add-support-to-configure-channel-dwell-t.patch b/package/kernel/mac80211/patches/ath11k/0008-wifi-ath11k-add-support-to-configure-channel-dwell-t.patch
+new file mode 100644
+index 0000000000..d0b19fe59f
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0008-wifi-ath11k-add-support-to-configure-channel-dwell-t.patch
+@@ -0,0 +1,102 @@
++From c362daa213cdeb0a9e7c2ed84849544c24505720 Mon Sep 17 00:00:00 2001
++From: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
++Date: Fri, 7 Oct 2022 10:41:30 +0530
++Subject: [PATCH 8/9] wifi: ath11k: add support to configure channel dwell time
++
++Add support to configure channel dwell time during scan.
++Dwell time help to stay on the channel for a specified duration
++during scan and aid userspace in finding WiFi networks. Very
++useful in passive scans where longer dwell times are needed
++to find the WiFi networks.
++
++Configure channel dwell time from duration of the scan request
++received from mac80211 when the duration is non-zero. When the
++scan request does not have duration value, use the default ones,
++the current implementation.
++
++Advertise corresponding feature flag NL80211_EXT_FEATURE_SET_SCAN_DWELL
++to enable the feature.
++
++Change is applicable for all ath11k hardware.
++
++Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
++
++Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
++Reviewed-by: Jeff Johnson <quic_jjohnson@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221007051130.6067-1-quic_mpubbise@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 33 +++++++++++++++++++++++----
++ 1 file changed, 29 insertions(+), 4 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -241,7 +241,10 @@ const struct htt_rx_ring_tlv_filter ath1
++ #define ath11k_a_rates (ath11k_legacy_rates + 4)
++ #define ath11k_a_rates_size (ARRAY_SIZE(ath11k_legacy_rates) - 4)
++ 
++-#define ATH11K_MAC_SCAN_TIMEOUT_MSECS 200 /* in msecs */
+++#define ATH11K_MAC_SCAN_CMD_EVT_OVERHEAD		200 /* in msecs */
+++
+++/* Overhead due to the processing of channel switch events from FW */
+++#define ATH11K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD	10 /* in msecs */
++ 
++ static const u32 ath11k_smps_map[] = {
++ 	[WLAN_HT_CAP_SM_PS_STATIC] = WMI_PEER_SMPS_STATIC,
++@@ -3612,6 +3615,7 @@ static int ath11k_mac_op_hw_scan(struct
++ 	struct scan_req_params arg;
++ 	int ret = 0;
++ 	int i;
+++	u32 scan_timeout;
++ 
++ 	mutex_lock(&ar->conf_mutex);
++ 
++@@ -3681,6 +3685,26 @@ static int ath11k_mac_op_hw_scan(struct
++ 		ether_addr_copy(arg.mac_mask.addr, req->mac_addr_mask);
++ 	}
++ 
+++	/* if duration is set, default dwell times will be overwritten */
+++	if (req->duration) {
+++		arg.dwell_time_active = req->duration;
+++		arg.dwell_time_active_2g = req->duration;
+++		arg.dwell_time_active_6g = req->duration;
+++		arg.dwell_time_passive = req->duration;
+++		arg.dwell_time_passive_6g = req->duration;
+++		arg.burst_duration = req->duration;
+++
+++		scan_timeout = min_t(u32, arg.max_rest_time *
+++				(arg.num_chan - 1) + (req->duration +
+++				ATH11K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD) *
+++				arg.num_chan, arg.max_scan_time);
+++	} else {
+++		scan_timeout = arg.max_scan_time;
+++	}
+++
+++	/* Add a margin to account for event/command processing */
+++	scan_timeout += ATH11K_MAC_SCAN_CMD_EVT_OVERHEAD;
+++
++ 	ret = ath11k_start_scan(ar, &arg);
++ 	if (ret) {
++ 		ath11k_warn(ar->ab, "failed to start hw scan: %d\n", ret);
++@@ -3689,10 +3713,8 @@ static int ath11k_mac_op_hw_scan(struct
++ 		spin_unlock_bh(&ar->data_lock);
++ 	}
++ 
++-	/* Add a 200ms margin to account for event/command processing */
++ 	ieee80211_queue_delayed_work(ar->hw, &ar->scan.timeout,
++-				     msecs_to_jiffies(arg.max_scan_time +
++-						      ATH11K_MAC_SCAN_TIMEOUT_MSECS));
+++				     msecs_to_jiffies(scan_timeout));
++ 
++ exit:
++ 	kfree(arg.chan_list);
++@@ -9060,6 +9082,9 @@ static int __ath11k_mac_register(struct
++ 				      NL80211_EXT_FEATURE_UNSOL_BCAST_PROBE_RESP);
++ 	}
++ 
+++	wiphy_ext_feature_set(ar->hw->wiphy,
+++			      NL80211_EXT_FEATURE_SET_SCAN_DWELL);
+++
++ 	ath11k_reg_init(ar);
++ 
++ 	if (!test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags)) {
+diff --git a/package/kernel/mac80211/patches/ath11k/0010-wifi-ath11k-Fix-firmware-crash-on-vdev-delete-race-c.patch b/package/kernel/mac80211/patches/ath11k/0010-wifi-ath11k-Fix-firmware-crash-on-vdev-delete-race-c.patch
+new file mode 100644
+index 0000000000..7275af06ea
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0010-wifi-ath11k-Fix-firmware-crash-on-vdev-delete-race-c.patch
+@@ -0,0 +1,116 @@
++From 3811fa1f231f1a3e29759efef4992116604aab8b Mon Sep 17 00:00:00 2001
++From: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
++Date: Tue, 11 Oct 2022 15:23:46 +0530
++Subject: [PATCH] wifi: ath11k: Fix firmware crash on vdev delete race
++ condition
++
++Current code does not wait for vdev delete completion on vdev create
++failures and tries to send another vdev create followed by vdev set
++param to firmware with same vdev id. This causes firmware crash.
++Fix this crash by waiting for vdev delete completion on vdev
++create failures.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.6.0.1-00905-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221011095346.3901-1-quic_ssreeela@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 60 +++++++++++++++++----------
++ 1 file changed, 37 insertions(+), 23 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -6233,6 +6233,40 @@ void ath11k_mac_11d_scan_stop_all(struct
++ 	}
++ }
++ 
+++static int ath11k_mac_vdev_delete(struct ath11k *ar, struct ath11k_vif *arvif)
+++{
+++	unsigned long time_left;
+++	struct ieee80211_vif *vif = arvif->vif;
+++	int ret = 0;
+++
+++	lockdep_assert_held(&ar->conf_mutex);
+++
+++	reinit_completion(&ar->vdev_delete_done);
+++
+++	ret = ath11k_wmi_vdev_delete(ar, arvif->vdev_id);
+++	if (ret) {
+++		ath11k_warn(ar->ab, "failed to delete WMI vdev %d: %d\n",
+++			    arvif->vdev_id, ret);
+++		return ret;
+++	}
+++
+++	time_left = wait_for_completion_timeout(&ar->vdev_delete_done,
+++						ATH11K_VDEV_DELETE_TIMEOUT_HZ);
+++	if (time_left == 0) {
+++		ath11k_warn(ar->ab, "Timeout in receiving vdev delete response\n");
+++		return -ETIMEDOUT;
+++	}
+++
+++	ar->ab->free_vdev_map |= 1LL << (arvif->vdev_id);
+++	ar->allocated_vdev_map &= ~(1LL << arvif->vdev_id);
+++	ar->num_created_vdevs--;
+++
+++	ath11k_dbg(ar->ab, ATH11K_DBG_MAC, "vdev %pM deleted, vdev_id %d\n",
+++		   vif->addr, arvif->vdev_id);
+++
+++	return ret;
+++}
+++
++ static int ath11k_mac_op_add_interface(struct ieee80211_hw *hw,
++ 				       struct ieee80211_vif *vif)
++ {
++@@ -6468,10 +6502,7 @@ err_peer_del:
++ 	}
++ 
++ err_vdev_del:
++-	ath11k_wmi_vdev_delete(ar, arvif->vdev_id);
++-	ar->num_created_vdevs--;
++-	ar->allocated_vdev_map &= ~(1LL << arvif->vdev_id);
++-	ab->free_vdev_map |= 1LL << arvif->vdev_id;
+++	ath11k_mac_vdev_delete(ar, arvif);
++ 	spin_lock_bh(&ar->data_lock);
++ 	list_del(&arvif->list);
++ 	spin_unlock_bh(&ar->data_lock);
++@@ -6499,7 +6530,6 @@ static void ath11k_mac_op_remove_interfa
++ 	struct ath11k *ar = hw->priv;
++ 	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
++ 	struct ath11k_base *ab = ar->ab;
++-	unsigned long time_left;
++ 	int ret;
++ 	int i;
++ 
++@@ -6520,29 +6550,13 @@ static void ath11k_mac_op_remove_interfa
++ 				    arvif->vdev_id, ret);
++ 	}
++ 
++-	reinit_completion(&ar->vdev_delete_done);
++-
++-	ret = ath11k_wmi_vdev_delete(ar, arvif->vdev_id);
+++	ret = ath11k_mac_vdev_delete(ar, arvif);
++ 	if (ret) {
++-		ath11k_warn(ab, "failed to delete WMI vdev %d: %d\n",
+++		ath11k_warn(ab, "failed to delete vdev %d: %d\n",
++ 			    arvif->vdev_id, ret);
++ 		goto err_vdev_del;
++ 	}
++ 
++-	time_left = wait_for_completion_timeout(&ar->vdev_delete_done,
++-						ATH11K_VDEV_DELETE_TIMEOUT_HZ);
++-	if (time_left == 0) {
++-		ath11k_warn(ab, "Timeout in receiving vdev delete response\n");
++-		goto err_vdev_del;
++-	}
++-
++-	ab->free_vdev_map |= 1LL << (arvif->vdev_id);
++-	ar->allocated_vdev_map &= ~(1LL << arvif->vdev_id);
++-	ar->num_created_vdevs--;
++-
++-	ath11k_dbg(ab, ATH11K_DBG_MAC, "vdev %pM deleted, vdev_id %d\n",
++-		   vif->addr, arvif->vdev_id);
++-
++ 	if (arvif->vdev_type == WMI_VDEV_TYPE_MONITOR) {
++ 		clear_bit(ATH11K_FLAG_MONITOR_VDEV_CREATED, &ar->monitor_flags);
++ 		ar->monitor_vdev_id = -1;
+diff --git a/package/kernel/mac80211/patches/ath11k/0011-wifi-ath11k-fix-monitor-vdev-creation-with-firmware-.patch b/package/kernel/mac80211/patches/ath11k/0011-wifi-ath11k-fix-monitor-vdev-creation-with-firmware-.patch
+new file mode 100644
+index 0000000000..2f066d0a56
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0011-wifi-ath11k-fix-monitor-vdev-creation-with-firmware-.patch
+@@ -0,0 +1,40 @@
++From f3ca72b0327101a074a871539e61775d43908ca4 Mon Sep 17 00:00:00 2001
++From: Nagarajan Maran <quic_nmaran@quicinc.com>
++Date: Fri, 14 Oct 2022 21:20:54 +0530
++Subject: [PATCH] wifi: ath11k: fix monitor vdev creation with firmware
++ recovery
++
++During firmware recovery, the monitor interface is not
++getting created in the driver and firmware since
++the respective flags are not updated properly.
++
++So after firmware recovery is successful, when monitor
++interface is brought down manually, firmware assertion
++is observed, since we are trying to bring down the
++interface which is not yet created in the firmware.
++
++Fix this by updating the monitor flags properly per
++phy#, during firmware recovery.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Nagarajan Maran <quic_nmaran@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221014155054.11471-1-quic_nmaran@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/core.c | 4 ++++
++ 1 file changed, 4 insertions(+)
++
++--- a/drivers/net/wireless/ath/ath11k/core.c
+++++ b/drivers/net/wireless/ath/ath11k/core.c
++@@ -1677,6 +1677,10 @@ void ath11k_core_pre_reconfigure_recover
++ 			     ath11k_mac_tx_mgmt_pending_free, ar);
++ 		idr_destroy(&ar->txmgmt_idr);
++ 		wake_up(&ar->txmgmt_empty_waitq);
+++
+++		ar->monitor_vdev_id = -1;
+++		clear_bit(ATH11K_FLAG_MONITOR_STARTED, &ar->monitor_flags);
+++		clear_bit(ATH11K_FLAG_MONITOR_VDEV_CREATED, &ar->monitor_flags);
++ 	}
++ 
++ 	wake_up(&ab->wmi_ab.tx_credits_wq);
+diff --git a/package/kernel/mac80211/patches/ath11k/0012-wifi-ath11k-Fix-qmi_msg_handler-data-structure-initi.patch b/package/kernel/mac80211/patches/ath11k/0012-wifi-ath11k-Fix-qmi_msg_handler-data-structure-initi.patch
+new file mode 100644
+index 0000000000..fccfa4385a
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0012-wifi-ath11k-Fix-qmi_msg_handler-data-structure-initi.patch
+@@ -0,0 +1,33 @@
++From ed3725e15a154ebebf44e0c34806c57525483f92 Mon Sep 17 00:00:00 2001
++From: Rahul Bhattacharjee <quic_rbhattac@quicinc.com>
++Date: Fri, 21 Oct 2022 14:31:26 +0530
++Subject: [PATCH] wifi: ath11k: Fix qmi_msg_handler data structure
++ initialization
++
++qmi_msg_handler is required to be null terminated by QMI module.
++There might be a case where a handler for a msg id is not present in the
++handlers array which can lead to infinite loop while searching the handler
++and therefore out of bound access in qmi_invoke_handler().
++Hence update the initialization in qmi_msg_handler data structure.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Rahul Bhattacharjee <quic_rbhattac@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221021090126.28626-1-quic_rbhattac@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/qmi.c | 3 +++
++ 1 file changed, 3 insertions(+)
++
++--- a/drivers/net/wireless/ath/ath11k/qmi.c
+++++ b/drivers/net/wireless/ath/ath11k/qmi.c
++@@ -1702,6 +1702,9 @@ static struct qmi_elem_info qmi_wlfw_fw_
++ 		.data_type = QMI_EOTI,
++ 		.array_type = NO_ARRAY,
++ 	},
+++
+++	/* end of list */
+++	{},
++ };
++ 
++ static int ath11k_qmi_host_cap_send(struct ath11k_base *ab)
+diff --git a/package/kernel/mac80211/patches/ath11k/0013-wifi-ath11k-synchronize-ath11k_mac_he_gi_to_nl80211_.patch b/package/kernel/mac80211/patches/ath11k/0013-wifi-ath11k-synchronize-ath11k_mac_he_gi_to_nl80211_.patch
+new file mode 100644
+index 0000000000..1e89b4d4f2
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0013-wifi-ath11k-synchronize-ath11k_mac_he_gi_to_nl80211_.patch
+@@ -0,0 +1,42 @@
++From dd1c2322694522f674c874f5fa02ac5ae39135dd Mon Sep 17 00:00:00 2001
++From: "Jiri Slaby (SUSE)" <jirislaby@kernel.org>
++Date: Mon, 31 Oct 2022 12:43:41 +0100
++Subject: [PATCH] wifi: ath11k: synchronize
++ ath11k_mac_he_gi_to_nl80211_he_gi()'s return type
++
++ath11k_mac_he_gi_to_nl80211_he_gi() generates a valid warning with gcc-13:
++  drivers/net/wireless/ath/ath11k/mac.c:321:20: error: conflicting types for 'ath11k_mac_he_gi_to_nl80211_he_gi' due to enum/integer mismatch; have 'enum nl80211_he_gi(u8)'
++  drivers/net/wireless/ath/ath11k/mac.h:166:5: note: previous declaration of 'ath11k_mac_he_gi_to_nl80211_he_gi' with type 'u32(u8)'
++
++I.e. the type of the return value ath11k_mac_he_gi_to_nl80211_he_gi() in
++the declaration is u32, while the definition spells enum nl80211_he_gi.
++Synchronize them to the latter.
++
++Cc: Martin Liska <mliska@suse.cz>
++Cc: Kalle Valo <kvalo@kernel.org>
++Cc: "David S. Miller" <davem@davemloft.net>
++Cc: Eric Dumazet <edumazet@google.com>
++Cc: Jakub Kicinski <kuba@kernel.org>
++Cc: Paolo Abeni <pabeni@redhat.com>
++Cc: ath11k@lists.infradead.org
++Cc: linux-wireless@vger.kernel.org
++Cc: netdev@vger.kernel.org
++Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org>
++Reviewed-by: Jeff Johnson <quic_jjohnson@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221031114341.10377-1-jirislaby@kernel.org
++---
++ drivers/net/wireless/ath/ath11k/mac.h | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.h
+++++ b/drivers/net/wireless/ath/ath11k/mac.h
++@@ -163,7 +163,7 @@ void ath11k_mac_drain_tx(struct ath11k *
++ void ath11k_mac_peer_cleanup_all(struct ath11k *ar);
++ int ath11k_mac_tx_mgmt_pending_free(int buf_id, void *skb, void *ctx);
++ u8 ath11k_mac_bw_to_mac80211_bw(u8 bw);
++-u32 ath11k_mac_he_gi_to_nl80211_he_gi(u8 sgi);
+++enum nl80211_he_gi ath11k_mac_he_gi_to_nl80211_he_gi(u8 sgi);
++ enum nl80211_he_ru_alloc ath11k_mac_phy_he_ru_to_nl80211_he_ru_alloc(u16 ru_phy);
++ enum nl80211_he_ru_alloc ath11k_mac_he_ru_tones_to_nl80211_he_ru_alloc(u16 ru_tones);
++ enum ath11k_supported_bw ath11k_mac_mac80211_bw_to_ath11k_bw(enum rate_info_bw bw);
+diff --git a/package/kernel/mac80211/patches/ath11k/0016-wifi-ath11k-Make-QMI-message-rules-const.patch b/package/kernel/mac80211/patches/ath11k/0016-wifi-ath11k-Make-QMI-message-rules-const.patch
+new file mode 100644
+index 0000000000..1f48df73f7
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0016-wifi-ath11k-Make-QMI-message-rules-const.patch
+@@ -0,0 +1,341 @@
++From 93c1592889fca46d09d833455628bab05516cdbf Mon Sep 17 00:00:00 2001
++From: Jeff Johnson <quic_jjohnson@quicinc.com>
++Date: Wed, 14 Sep 2022 17:23:03 -0700
++Subject: [PATCH] wifi: ath11k: Make QMI message rules const
++
++Commit ff6d365898d4 ("soc: qcom: qmi: use const for struct
++qmi_elem_info") allows QMI message encoding/decoding rules to be
++const, so do that for ath11k.
++
++Compile tested only.
++
++Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20220915002303.12206-1-quic_jjohnson@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/qmi.c | 72 +++++++++++++--------------
++ 1 file changed, 36 insertions(+), 36 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/qmi.c
+++++ b/drivers/net/wireless/ath/ath11k/qmi.c
++@@ -29,7 +29,7 @@ module_param_named(cold_boot_cal, ath11k
++ MODULE_PARM_DESC(cold_boot_cal,
++ 		 "Decrease the channel switch time but increase the driver load time (Default: true)");
++ 
++-static struct qmi_elem_info qmi_wlanfw_host_cap_req_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_host_cap_req_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_OPT_FLAG,
++ 		.elem_len	= 1,
++@@ -280,7 +280,7 @@ static struct qmi_elem_info qmi_wlanfw_h
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_host_cap_resp_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_host_cap_resp_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_STRUCT,
++ 		.elem_len	= 1,
++@@ -297,7 +297,7 @@ static struct qmi_elem_info qmi_wlanfw_h
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_ind_register_req_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_ind_register_req_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_OPT_FLAG,
++ 		.elem_len	= 1,
++@@ -522,7 +522,7 @@ static struct qmi_elem_info qmi_wlanfw_i
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_ind_register_resp_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_ind_register_resp_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_STRUCT,
++ 		.elem_len	= 1,
++@@ -558,7 +558,7 @@ static struct qmi_elem_info qmi_wlanfw_i
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_mem_cfg_s_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_mem_cfg_s_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_UNSIGNED_8_BYTE,
++ 		.elem_len	= 1,
++@@ -590,7 +590,7 @@ static struct qmi_elem_info qmi_wlanfw_m
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_mem_seg_s_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_mem_seg_s_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_UNSIGNED_4_BYTE,
++ 		.elem_len	= 1,
++@@ -632,7 +632,7 @@ static struct qmi_elem_info qmi_wlanfw_m
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_request_mem_ind_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_request_mem_ind_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_DATA_LEN,
++ 		.elem_len	= 1,
++@@ -659,7 +659,7 @@ static struct qmi_elem_info qmi_wlanfw_r
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_mem_seg_resp_s_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_mem_seg_resp_s_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_UNSIGNED_8_BYTE,
++ 		.elem_len	= 1,
++@@ -699,7 +699,7 @@ static struct qmi_elem_info qmi_wlanfw_m
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_respond_mem_req_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_respond_mem_req_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_DATA_LEN,
++ 		.elem_len	= 1,
++@@ -726,7 +726,7 @@ static struct qmi_elem_info qmi_wlanfw_r
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_respond_mem_resp_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_respond_mem_resp_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_STRUCT,
++ 		.elem_len	= 1,
++@@ -744,7 +744,7 @@ static struct qmi_elem_info qmi_wlanfw_r
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_cap_req_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_cap_req_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_EOTI,
++ 		.array_type	= NO_ARRAY,
++@@ -752,7 +752,7 @@ static struct qmi_elem_info qmi_wlanfw_c
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_device_info_req_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_device_info_req_msg_v01_ei[] = {
++ 	{
++ 		.data_type      = QMI_EOTI,
++ 		.array_type     = NO_ARRAY,
++@@ -760,7 +760,7 @@ static struct qmi_elem_info qmi_wlanfw_d
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlfw_device_info_resp_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlfw_device_info_resp_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_STRUCT,
++ 		.elem_len	= 1,
++@@ -814,7 +814,7 @@ static struct qmi_elem_info qmi_wlfw_dev
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_rf_chip_info_s_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_rf_chip_info_s_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_UNSIGNED_4_BYTE,
++ 		.elem_len	= 1,
++@@ -840,7 +840,7 @@ static struct qmi_elem_info qmi_wlanfw_r
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_rf_board_info_s_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_rf_board_info_s_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_UNSIGNED_4_BYTE,
++ 		.elem_len	= 1,
++@@ -857,7 +857,7 @@ static struct qmi_elem_info qmi_wlanfw_r
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_soc_info_s_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_soc_info_s_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_UNSIGNED_4_BYTE,
++ 		.elem_len	= 1,
++@@ -873,7 +873,7 @@ static struct qmi_elem_info qmi_wlanfw_s
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_fw_version_info_s_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_fw_version_info_s_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_UNSIGNED_4_BYTE,
++ 		.elem_len	= 1,
++@@ -899,7 +899,7 @@ static struct qmi_elem_info qmi_wlanfw_f
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_cap_resp_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_cap_resp_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_STRUCT,
++ 		.elem_len	= 1,
++@@ -1100,7 +1100,7 @@ static struct qmi_elem_info qmi_wlanfw_c
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_bdf_download_req_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_bdf_download_req_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_UNSIGNED_1_BYTE,
++ 		.elem_len	= 1,
++@@ -1235,7 +1235,7 @@ static struct qmi_elem_info qmi_wlanfw_b
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_bdf_download_resp_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_bdf_download_resp_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_STRUCT,
++ 		.elem_len	= 1,
++@@ -1253,7 +1253,7 @@ static struct qmi_elem_info qmi_wlanfw_b
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_m3_info_req_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_m3_info_req_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_UNSIGNED_8_BYTE,
++ 		.elem_len	= 1,
++@@ -1277,7 +1277,7 @@ static struct qmi_elem_info qmi_wlanfw_m
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_m3_info_resp_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_m3_info_resp_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_STRUCT,
++ 		.elem_len	= 1,
++@@ -1294,7 +1294,7 @@ static struct qmi_elem_info qmi_wlanfw_m
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_UNSIGNED_4_BYTE,
++ 		.elem_len	= 1,
++@@ -1347,7 +1347,7 @@ static struct qmi_elem_info qmi_wlanfw_c
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_UNSIGNED_4_BYTE,
++ 		.elem_len	= 1,
++@@ -1382,7 +1382,7 @@ static struct qmi_elem_info qmi_wlanfw_c
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_shadow_reg_cfg_s_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_shadow_reg_cfg_s_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_UNSIGNED_2_BYTE,
++ 		.elem_len	= 1,
++@@ -1406,7 +1406,7 @@ static struct qmi_elem_info qmi_wlanfw_s
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_shadow_reg_v2_cfg_s_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_shadow_reg_v2_cfg_s_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_UNSIGNED_4_BYTE,
++ 		.elem_len	= 1,
++@@ -1423,7 +1423,7 @@ static struct qmi_elem_info qmi_wlanfw_s
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_wlan_mode_req_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_wlan_mode_req_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_UNSIGNED_4_BYTE,
++ 		.elem_len	= 1,
++@@ -1458,7 +1458,7 @@ static struct qmi_elem_info qmi_wlanfw_w
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_wlan_mode_resp_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_wlan_mode_resp_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_STRUCT,
++ 		.elem_len	= 1,
++@@ -1476,7 +1476,7 @@ static struct qmi_elem_info qmi_wlanfw_w
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_wlan_cfg_req_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_wlan_cfg_req_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_OPT_FLAG,
++ 		.elem_len	= 1,
++@@ -1615,7 +1615,7 @@ static struct qmi_elem_info qmi_wlanfw_w
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_wlan_cfg_resp_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_wlan_cfg_resp_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_STRUCT,
++ 		.elem_len	= 1,
++@@ -1632,28 +1632,28 @@ static struct qmi_elem_info qmi_wlanfw_w
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_mem_ready_ind_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_mem_ready_ind_msg_v01_ei[] = {
++ 	{
++ 		.data_type = QMI_EOTI,
++ 		.array_type = NO_ARRAY,
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_fw_ready_ind_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_fw_ready_ind_msg_v01_ei[] = {
++ 	{
++ 		.data_type = QMI_EOTI,
++ 		.array_type = NO_ARRAY,
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_cold_boot_cal_done_ind_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_cold_boot_cal_done_ind_msg_v01_ei[] = {
++ 	{
++ 		.data_type = QMI_EOTI,
++ 		.array_type = NO_ARRAY,
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_wlan_ini_req_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_wlan_ini_req_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_OPT_FLAG,
++ 		.elem_len	= 1,
++@@ -1679,7 +1679,7 @@ static struct qmi_elem_info qmi_wlanfw_w
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlanfw_wlan_ini_resp_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlanfw_wlan_ini_resp_msg_v01_ei[] = {
++ 	{
++ 		.data_type	= QMI_STRUCT,
++ 		.elem_len	= 1,
++@@ -1697,7 +1697,7 @@ static struct qmi_elem_info qmi_wlanfw_w
++ 	},
++ };
++ 
++-static struct qmi_elem_info qmi_wlfw_fw_init_done_ind_msg_v01_ei[] = {
+++static const struct qmi_elem_info qmi_wlfw_fw_init_done_ind_msg_v01_ei[] = {
++ 	{
++ 		.data_type = QMI_EOTI,
++ 		.array_type = NO_ARRAY,
+diff --git a/package/kernel/mac80211/patches/ath11k/0017-wifi-ath11k-Trigger-sta-disconnect-on-hardware-resta.patch b/package/kernel/mac80211/patches/ath11k/0017-wifi-ath11k-Trigger-sta-disconnect-on-hardware-resta.patch
+new file mode 100644
+index 0000000000..f95e5027b2
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0017-wifi-ath11k-Trigger-sta-disconnect-on-hardware-resta.patch
+@@ -0,0 +1,119 @@
++From a018750a2cceaf4427c4ee3d9ce3e83a171d5bd6 Mon Sep 17 00:00:00 2001
++From: Youghandhar Chintala <quic_youghand@quicinc.com>
++Date: Fri, 4 Nov 2022 14:24:03 +0530
++Subject: [PATCH] wifi: ath11k: Trigger sta disconnect on hardware restart
++
++Currently after the hardware restart triggered from the driver, the
++station interface connection remains intact, since a disconnect trigger
++is not sent to userspace. This can lead to a problem in targets where
++the wifi mac sequence is added by the firmware.
++
++After the target restart, its wifi mac sequence number gets reset to
++zero. Hence AP to which our device is connected will receive frames with
++a  wifi mac sequence number jump to the past, thereby resulting in the
++AP dropping all these frames, until the frame arrives with a wifi mac
++sequence number which AP was expecting.
++
++To avoid such frame drops, its better to trigger a station disconnect
++upon target hardware restart which can be done with API
++ieee80211_reconfig_disconnect exposed to mac80211.
++
++The other targets are not affected by this change, since the hardware
++params flag is not set.
++
++Reported-by: kernel test robot <lkp@intel.com>
++
++Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
++
++Signed-off-by: Youghandhar Chintala <quic_youghand@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221104085403.11025-1-quic_youghand@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/core.c | 6 ++++++
++ drivers/net/wireless/ath/ath11k/hw.h   | 1 +
++ drivers/net/wireless/ath/ath11k/mac.c  | 7 +++++++
++ 3 files changed, 14 insertions(+)
++
++--- a/drivers/net/wireless/ath/ath11k/core.c
+++++ b/drivers/net/wireless/ath/ath11k/core.c
++@@ -195,6 +195,7 @@ static const struct ath11k_hw_params ath
++ 		.tcl_ring_retry = true,
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
+++		.support_fw_mac_sequence = false,
++ 	},
++ 	{
++ 		.name = "qca6390 hw2.0",
++@@ -277,6 +278,7 @@ static const struct ath11k_hw_params ath
++ 		.tcl_ring_retry = true,
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
+++		.support_fw_mac_sequence = true,
++ 	},
++ 	{
++ 		.name = "qcn9074 hw1.0",
++@@ -356,6 +358,7 @@ static const struct ath11k_hw_params ath
++ 		.tcl_ring_retry = true,
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
+++		.support_fw_mac_sequence = false,
++ 	},
++ 	{
++ 		.name = "wcn6855 hw2.0",
++@@ -438,6 +441,7 @@ static const struct ath11k_hw_params ath
++ 		.tcl_ring_retry = true,
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
+++		.support_fw_mac_sequence = true,
++ 	},
++ 	{
++ 		.name = "wcn6855 hw2.1",
++@@ -519,6 +523,7 @@ static const struct ath11k_hw_params ath
++ 		.tcl_ring_retry = true,
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
+++		.support_fw_mac_sequence = true,
++ 	},
++ 	{
++ 		.name = "wcn6750 hw1.0",
++@@ -597,6 +602,7 @@ static const struct ath11k_hw_params ath
++ 		.tcl_ring_retry = false,
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE_WCN6750,
++ 		.smp2p_wow_exit = true,
+++		.support_fw_mac_sequence = true,
++ 	},
++ };
++ 
++--- a/drivers/net/wireless/ath/ath11k/hw.h
+++++ b/drivers/net/wireless/ath/ath11k/hw.h
++@@ -219,6 +219,7 @@ struct ath11k_hw_params {
++ 	bool tcl_ring_retry;
++ 	u32 tx_ring_size;
++ 	bool smp2p_wow_exit;
+++	bool support_fw_mac_sequence;
++ };
++ 
++ struct ath11k_hw_ops {
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -8010,6 +8010,7 @@ ath11k_mac_op_reconfig_complete(struct i
++ 	struct ath11k *ar = hw->priv;
++ 	struct ath11k_base *ab = ar->ab;
++ 	int recovery_count;
+++	struct ath11k_vif *arvif;
++ 
++ 	if (reconfig_type != IEEE80211_RECONFIG_TYPE_RESTART)
++ 		return;
++@@ -8045,6 +8046,12 @@ ath11k_mac_op_reconfig_complete(struct i
++ 				ath11k_dbg(ab, ATH11K_DBG_BOOT, "reset success\n");
++ 			}
++ 		}
+++		if (ar->ab->hw_params.support_fw_mac_sequence) {
+++			list_for_each_entry(arvif, &ar->arvifs, list) {
+++				if (arvif->is_up && arvif->vdev_type == WMI_VDEV_TYPE_STA)
+++					ieee80211_hw_restart_disconnect(arvif->vif);
+++			}
+++		}
++ 	}
++ 
++ 	mutex_unlock(&ar->conf_mutex);
+diff --git a/package/kernel/mac80211/patches/ath11k/0018-wifi-ath11k-Fix-race-condition-with-struct-htt_ppdu_.patch b/package/kernel/mac80211/patches/ath11k/0018-wifi-ath11k-Fix-race-condition-with-struct-htt_ppdu_.patch
+new file mode 100644
+index 0000000000..cef61ee344
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0018-wifi-ath11k-Fix-race-condition-with-struct-htt_ppdu_.patch
+@@ -0,0 +1,103 @@
++From e44de90453bb2b46a523df78c39eb896bab35dcd Mon Sep 17 00:00:00 2001
++From: Govindaraj Saminathan <quic_gsaminat@quicinc.com>
++Date: Tue, 29 Nov 2022 13:04:02 +0200
++Subject: [PATCH] wifi: ath11k: Fix race condition with struct
++ htt_ppdu_stats_info
++
++A crash happens when running the traffic with multiple clients:
++
++Crash Signature : Unable to handle kernel paging request at
++virtual address ffffffd700970918 During the crash, PC points to
++"ieee80211_tx_rate_update+0x30/0x68 [mac80211]"
++LR points to "ath11k_dp_htt_htc_t2h_msg_handler+0x5a8/0x8a0 [ath11k]".
++
++Struct ppdu_stats_info is allocated and accessed from event callback via copy
++engine tasklet, this has a problem when freeing it from ath11k_mac_op_stop().
++
++Use data_lock during entire ath11k_dp_htt_get_ppdu_desc() call to protect
++struct htt_ppdu_stats_info access and to avoid race condition when accessing it
++from ath11k_mac_op_stop().
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Govindaraj Saminathan <quic_gsaminat@quicinc.com>
++Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221124071104.22506-1-quic_kathirve@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/dp_rx.c | 22 +++++++++++-----------
++ 1 file changed, 11 insertions(+), 11 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/dp_rx.c
+++++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
++@@ -1535,13 +1535,12 @@ struct htt_ppdu_stats_info *ath11k_dp_ht
++ {
++ 	struct htt_ppdu_stats_info *ppdu_info;
++ 
++-	spin_lock_bh(&ar->data_lock);
+++	lockdep_assert_held(&ar->data_lock);
+++
++ 	if (!list_empty(&ar->ppdu_stats_info)) {
++ 		list_for_each_entry(ppdu_info, &ar->ppdu_stats_info, list) {
++-			if (ppdu_info->ppdu_id == ppdu_id) {
++-				spin_unlock_bh(&ar->data_lock);
+++			if (ppdu_info->ppdu_id == ppdu_id)
++ 				return ppdu_info;
++-			}
++ 		}
++ 
++ 		if (ar->ppdu_stat_list_depth > HTT_PPDU_DESC_MAX_DEPTH) {
++@@ -1553,16 +1552,13 @@ struct htt_ppdu_stats_info *ath11k_dp_ht
++ 			kfree(ppdu_info);
++ 		}
++ 	}
++-	spin_unlock_bh(&ar->data_lock);
++ 
++ 	ppdu_info = kzalloc(sizeof(*ppdu_info), GFP_ATOMIC);
++ 	if (!ppdu_info)
++ 		return NULL;
++ 
++-	spin_lock_bh(&ar->data_lock);
++ 	list_add_tail(&ppdu_info->list, &ar->ppdu_stats_info);
++ 	ar->ppdu_stat_list_depth++;
++-	spin_unlock_bh(&ar->data_lock);
++ 
++ 	return ppdu_info;
++ }
++@@ -1586,16 +1582,17 @@ static int ath11k_htt_pull_ppdu_stats(st
++ 	ar = ath11k_mac_get_ar_by_pdev_id(ab, pdev_id);
++ 	if (!ar) {
++ 		ret = -EINVAL;
++-		goto exit;
+++		goto out;
++ 	}
++ 
++ 	if (ath11k_debugfs_is_pktlog_lite_mode_enabled(ar))
++ 		trace_ath11k_htt_ppdu_stats(ar, skb->data, len);
++ 
+++	spin_lock_bh(&ar->data_lock);
++ 	ppdu_info = ath11k_dp_htt_get_ppdu_desc(ar, ppdu_id);
++ 	if (!ppdu_info) {
++ 		ret = -EINVAL;
++-		goto exit;
+++		goto out_unlock_data;
++ 	}
++ 
++ 	ppdu_info->ppdu_id = ppdu_id;
++@@ -1604,10 +1601,13 @@ static int ath11k_htt_pull_ppdu_stats(st
++ 				     (void *)ppdu_info);
++ 	if (ret) {
++ 		ath11k_warn(ab, "Failed to parse tlv %d\n", ret);
++-		goto exit;
+++		goto out_unlock_data;
++ 	}
++ 
++-exit:
+++out_unlock_data:
+++	spin_unlock_bh(&ar->data_lock);
+++
+++out:
++ 	rcu_read_unlock();
++ 
++ 	return ret;
+diff --git a/package/kernel/mac80211/patches/ath11k/0019-wifi-ath11k-update-hw-params-for-IPQ5018.patch b/package/kernel/mac80211/patches/ath11k/0019-wifi-ath11k-update-hw-params-for-IPQ5018.patch
+new file mode 100644
+index 0000000000..25d39ddb0d
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0019-wifi-ath11k-update-hw-params-for-IPQ5018.patch
+@@ -0,0 +1,125 @@
++From 8dfe875aa24aec68baf6702018633c84c2c1feca Mon Sep 17 00:00:00 2001
++From: Sriram R <quic_srirrama@quicinc.com>
++Date: Fri, 2 Dec 2022 23:37:13 +0200
++Subject: [PATCH] wifi: ath11k: update hw params for IPQ5018
++
++Add new compatible string for IPQ5018 and add
++required hw params for IPQ5018. The hw descriptors size and
++datapath ops are similar to QCN9074, hence reuse the same.
++
++Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
++Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221122132152.17771-3-quic_kathirve@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/core.c | 71 ++++++++++++++++++++++++++
++ drivers/net/wireless/ath/ath11k/core.h |  8 +++
++ 2 files changed, 79 insertions(+)
++
++--- a/drivers/net/wireless/ath/ath11k/core.c
+++++ b/drivers/net/wireless/ath/ath11k/core.c
++@@ -604,6 +604,77 @@ static const struct ath11k_hw_params ath
++ 		.smp2p_wow_exit = true,
++ 		.support_fw_mac_sequence = true,
++ 	},
+++	{
+++		.hw_rev = ATH11K_HW_IPQ5018_HW10,
+++		.name = "ipq5018 hw1.0",
+++		.fw = {
+++			.dir = "IPQ5018/hw1.0",
+++			.board_size = 256 * 1024,
+++			.cal_offset = 128 * 1024,
+++		},
+++		.max_radios = MAX_RADIOS_5018,
+++		.bdf_addr = 0x4BA00000,
+++		/* hal_desc_sz and hw ops are similar to qcn9074 */
+++		.hal_desc_sz = sizeof(struct hal_rx_desc_qcn9074),
+++		.qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074,
+++		.ring_mask = &ath11k_hw_ring_mask_ipq8074,
+++		.credit_flow = false,
+++		.max_tx_ring = 1,
+++		.spectral = {
+++			.fft_sz = 2,
+++			.fft_pad_sz = 0,
+++			.summary_pad_sz = 16,
+++			.fft_hdr_len = 24,
+++			.max_fft_bins = 1024,
+++		},
+++		.internal_sleep_clock = false,
+++		.host_ce_config = ath11k_host_ce_config_qcn9074,
+++		.ce_count = CE_CNT_5018,
+++		.rxdma1_enable = true,
+++		.num_rxmda_per_pdev = RXDMA_PER_PDEV_5018,
+++		.rx_mac_buf_ring = false,
+++		.vdev_start_delay = false,
+++		.htt_peer_map_v2 = true,
+++		.interface_modes = BIT(NL80211_IFTYPE_STATION) |
+++			BIT(NL80211_IFTYPE_AP) |
+++			BIT(NL80211_IFTYPE_MESH_POINT),
+++		.supports_monitor = false,
+++		.supports_sta_ps = false,
+++		.supports_shadow_regs = false,
+++		.fw_mem_mode = 0,
+++		.num_vdevs = 16 + 1,
+++		.num_peers = 512,
+++		.supports_regdb = false,
+++		.idle_ps = false,
+++		.supports_suspend = false,
+++		.hal_params = &ath11k_hw_hal_params_ipq8074,
+++		.single_pdev_only = false,
+++		.cold_boot_calib = true,
+++		.fix_l1ss = true,
+++		.supports_dynamic_smps_6ghz = false,
+++		.alloc_cacheable_memory = true,
+++		.supports_rssi_stats = false,
+++		.fw_wmi_diag_event = false,
+++		.current_cc_support = false,
+++		.dbr_debug_support = true,
+++		.global_reset = false,
+++		.bios_sar_capa = NULL,
+++		.m3_fw_support = false,
+++		.fixed_bdf_addr = true,
+++		.fixed_mem_region = true,
+++		.static_window_map = false,
+++		.hybrid_bus_type = false,
+++		.fixed_fw_mem = false,
+++		.support_off_channel_tx = false,
+++		.supports_multi_bssid = false,
+++
+++		.sram_dump = {},
+++
+++		.tcl_ring_retry = true,
+++		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+++		.smp2p_wow_exit = false,
+++		.support_fw_mac_sequence = false,
+++	},
++ };
++ 
++ static inline struct ath11k_pdev *ath11k_core_get_single_pdev(struct ath11k_base *ab)
++--- a/drivers/net/wireless/ath/ath11k/core.h
+++++ b/drivers/net/wireless/ath/ath11k/core.h
++@@ -142,6 +142,7 @@ enum ath11k_hw_rev {
++ 	ATH11K_HW_WCN6855_HW20,
++ 	ATH11K_HW_WCN6855_HW21,
++ 	ATH11K_HW_WCN6750_HW10,
+++	ATH11K_HW_IPQ5018_HW10,
++ };
++ 
++ enum ath11k_firmware_mode {
++@@ -230,6 +231,13 @@ struct ath11k_he {
++ 
++ #define MAX_RADIOS 3
++ 
+++/* ipq5018 hw param macros */
+++#define MAX_RADIOS_5018	1
+++#define CE_CNT_5018	6
+++#define TARGET_CE_CNT_5018	9
+++#define SVC_CE_MAP_LEN_5018	17
+++#define RXDMA_PER_PDEV_5018	1
+++
++ enum {
++ 	WMI_HOST_TP_SCALE_MAX   = 0,
++ 	WMI_HOST_TP_SCALE_50    = 1,
+diff --git a/package/kernel/mac80211/patches/ath11k/0020-wifi-ath11k-update-ce-configurations-for-IPQ5018.patch b/package/kernel/mac80211/patches/ath11k/0020-wifi-ath11k-update-ce-configurations-for-IPQ5018.patch
+new file mode 100644
+index 0000000000..95643a95fe
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0020-wifi-ath11k-update-ce-configurations-for-IPQ5018.patch
+@@ -0,0 +1,246 @@
++From 26af7aabd2d8225c6b2056234626ba5099610871 Mon Sep 17 00:00:00 2001
++From: Sriram R <quic_srirrama@quicinc.com>
++Date: Fri, 2 Dec 2022 23:37:14 +0200
++Subject: [PATCH] wifi: ath11k: update ce configurations for IPQ5018
++
++IPQ5018 is a single pdev device. Update host
++and target CE configurations accordingly.
++
++Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
++Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221122132152.17771-4-quic_kathirve@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/core.c |   4 +
++ drivers/net/wireless/ath/ath11k/core.h |   3 +
++ drivers/net/wireless/ath/ath11k/hw.c   | 191 +++++++++++++++++++++++++
++ 3 files changed, 198 insertions(+)
++
++--- a/drivers/net/wireless/ath/ath11k/core.c
+++++ b/drivers/net/wireless/ath/ath11k/core.c
++@@ -630,6 +630,10 @@ static const struct ath11k_hw_params ath
++ 		.internal_sleep_clock = false,
++ 		.host_ce_config = ath11k_host_ce_config_qcn9074,
++ 		.ce_count = CE_CNT_5018,
+++		.target_ce_config = ath11k_target_ce_config_wlan_ipq5018,
+++		.target_ce_count = TARGET_CE_CNT_5018,
+++		.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq5018,
+++		.svc_to_ce_map_len = SVC_CE_MAP_LEN_5018,
++ 		.rxdma1_enable = true,
++ 		.num_rxmda_per_pdev = RXDMA_PER_PDEV_5018,
++ 		.rx_mac_buf_ring = false,
++--- a/drivers/net/wireless/ath/ath11k/core.h
+++++ b/drivers/net/wireless/ath/ath11k/core.h
++@@ -1145,6 +1145,9 @@ extern const struct service_to_pipe ath1
++ extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[];
++ extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[];
++ 
+++extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq5018[];
+++extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq5018[];
+++
++ extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[];
++ extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[];
++ int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
++--- a/drivers/net/wireless/ath/ath11k/hw.c
+++++ b/drivers/net/wireless/ath/ath11k/hw.c
++@@ -1972,6 +1972,197 @@ const struct ath11k_hw_ring_mask ath11k_
++ 	},
++ };
++ 
+++/* Target firmware's Copy Engine configuration for IPQ5018 */
+++const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq5018[] = {
+++	/* CE0: host->target HTC control and raw streams */
+++	{
+++		.pipenum = __cpu_to_le32(0),
+++		.pipedir = __cpu_to_le32(PIPEDIR_OUT),
+++		.nentries = __cpu_to_le32(32),
+++		.nbytes_max = __cpu_to_le32(2048),
+++		.flags = __cpu_to_le32(CE_ATTR_FLAGS),
+++		.reserved = __cpu_to_le32(0),
+++	},
+++
+++	/* CE1: target->host HTT + HTC control */
+++	{
+++		.pipenum = __cpu_to_le32(1),
+++		.pipedir = __cpu_to_le32(PIPEDIR_IN),
+++		.nentries = __cpu_to_le32(32),
+++		.nbytes_max = __cpu_to_le32(2048),
+++		.flags = __cpu_to_le32(CE_ATTR_FLAGS),
+++		.reserved = __cpu_to_le32(0),
+++	},
+++
+++	/* CE2: target->host WMI */
+++	{
+++		.pipenum = __cpu_to_le32(2),
+++		.pipedir = __cpu_to_le32(PIPEDIR_IN),
+++		.nentries = __cpu_to_le32(32),
+++		.nbytes_max = __cpu_to_le32(2048),
+++		.flags = __cpu_to_le32(CE_ATTR_FLAGS),
+++		.reserved = __cpu_to_le32(0),
+++	},
+++
+++	/* CE3: host->target WMI */
+++	{
+++		.pipenum = __cpu_to_le32(3),
+++		.pipedir = __cpu_to_le32(PIPEDIR_OUT),
+++		.nentries = __cpu_to_le32(32),
+++		.nbytes_max = __cpu_to_le32(2048),
+++		.flags = __cpu_to_le32(CE_ATTR_FLAGS),
+++		.reserved = __cpu_to_le32(0),
+++	},
+++
+++	/* CE4: host->target HTT */
+++	{
+++		.pipenum = __cpu_to_le32(4),
+++		.pipedir = __cpu_to_le32(PIPEDIR_OUT),
+++		.nentries = __cpu_to_le32(256),
+++		.nbytes_max = __cpu_to_le32(256),
+++		.flags = __cpu_to_le32(CE_ATTR_FLAGS | CE_ATTR_DIS_INTR),
+++		.reserved = __cpu_to_le32(0),
+++	},
+++
+++	/* CE5: target->host Pktlog */
+++	{
+++		.pipenum = __cpu_to_le32(5),
+++		.pipedir = __cpu_to_le32(PIPEDIR_IN),
+++		.nentries = __cpu_to_le32(32),
+++		.nbytes_max = __cpu_to_le32(2048),
+++		.flags = __cpu_to_le32(CE_ATTR_FLAGS),
+++		.reserved = __cpu_to_le32(0),
+++	},
+++
+++	/* CE6: Reserved for target autonomous hif_memcpy */
+++	{
+++		.pipenum = __cpu_to_le32(6),
+++		.pipedir = __cpu_to_le32(PIPEDIR_INOUT),
+++		.nentries = __cpu_to_le32(32),
+++		.nbytes_max = __cpu_to_le32(16384),
+++		.flags = __cpu_to_le32(CE_ATTR_FLAGS),
+++		.reserved = __cpu_to_le32(0),
+++	},
+++
+++	/* CE7 used only by Host */
+++	{
+++		.pipenum = __cpu_to_le32(7),
+++		.pipedir = __cpu_to_le32(PIPEDIR_OUT),
+++		.nentries = __cpu_to_le32(32),
+++		.nbytes_max = __cpu_to_le32(2048),
+++		.flags = __cpu_to_le32(0x2000),
+++		.reserved = __cpu_to_le32(0),
+++	},
+++
+++	/* CE8 target->host used only by IPA */
+++	{
+++		.pipenum = __cpu_to_le32(8),
+++		.pipedir = __cpu_to_le32(PIPEDIR_INOUT),
+++		.nentries = __cpu_to_le32(32),
+++		.nbytes_max = __cpu_to_le32(16384),
+++		.flags = __cpu_to_le32(CE_ATTR_FLAGS),
+++		.reserved = __cpu_to_le32(0),
+++	},
+++};
+++
+++/* Map from service/endpoint to Copy Engine for IPQ5018.
+++ * This table is derived from the CE TABLE, above.
+++ * It is passed to the Target at startup for use by firmware.
+++ */
+++const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq5018[] = {
+++	{
+++		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VO),
+++		.pipedir = __cpu_to_le32(PIPEDIR_OUT),	/* out = UL = host -> target */
+++		.pipenum = __cpu_to_le32(3),
+++	},
+++	{
+++		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VO),
+++		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+++		.pipenum = __cpu_to_le32(2),
+++	},
+++	{
+++		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BK),
+++		.pipedir = __cpu_to_le32(PIPEDIR_OUT),	/* out = UL = host -> target */
+++		.pipenum = __cpu_to_le32(3),
+++	},
+++	{
+++		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BK),
+++		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+++		.pipenum = __cpu_to_le32(2),
+++	},
+++	{
+++		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BE),
+++		.pipedir = __cpu_to_le32(PIPEDIR_OUT),	/* out = UL = host -> target */
+++		.pipenum = __cpu_to_le32(3),
+++	},
+++	{
+++		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BE),
+++		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+++		.pipenum = __cpu_to_le32(2),
+++	},
+++	{
+++		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VI),
+++		.pipedir = __cpu_to_le32(PIPEDIR_OUT),	/* out = UL = host -> target */
+++		.pipenum = __cpu_to_le32(3),
+++	},
+++	{
+++		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VI),
+++		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+++		.pipenum = __cpu_to_le32(2),
+++	},
+++	{
+++		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_CONTROL),
+++		.pipedir = __cpu_to_le32(PIPEDIR_OUT),	/* out = UL = host -> target */
+++		.pipenum = __cpu_to_le32(3),
+++	},
+++	{
+++		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_CONTROL),
+++		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+++		.pipenum = __cpu_to_le32(2),
+++	},
+++
+++	{
+++		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_RSVD_CTRL),
+++		.pipedir = __cpu_to_le32(PIPEDIR_OUT),	/* out = UL = host -> target */
+++		.pipenum = __cpu_to_le32(0),
+++	},
+++	{
+++		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_RSVD_CTRL),
+++		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+++		.pipenum = __cpu_to_le32(1),
+++	},
+++
+++	{
+++		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_TEST_RAW_STREAMS),
+++		.pipedir = __cpu_to_le32(PIPEDIR_OUT),	/* out = UL = host -> target */
+++		.pipenum = __cpu_to_le32(0),
+++	},
+++	{
+++		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_TEST_RAW_STREAMS),
+++		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+++		.pipenum = __cpu_to_le32(1),
+++	},
+++	{
+++		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_HTT_DATA_MSG),
+++		.pipedir = __cpu_to_le32(PIPEDIR_OUT),	/* out = UL = host -> target */
+++		.pipenum = __cpu_to_le32(4),
+++	},
+++	{
+++		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_HTT_DATA_MSG),
+++		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+++		.pipenum = __cpu_to_le32(1),
+++	},
+++	{
+++		.service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_PKT_LOG),
+++		.pipedir = __cpu_to_le32(PIPEDIR_IN),	/* in = DL = target -> host */
+++		.pipenum = __cpu_to_le32(5),
+++	},
+++
+++       /* (Additions here) */
+++
+++	{ /* terminator entry */ }
+++};
+++
++ const struct ath11k_hw_regs ipq8074_regs = {
++ 	/* SW2TCL(x) R0 ring configuration address */
++ 	.hal_tcl1_ring_base_lsb = 0x00000510,
+diff --git a/package/kernel/mac80211/patches/ath11k/0021-wifi-ath11k-remap-ce-register-space-for-IPQ5018.patch b/package/kernel/mac80211/patches/ath11k/0021-wifi-ath11k-remap-ce-register-space-for-IPQ5018.patch
+new file mode 100644
+index 0000000000..d07a258ac2
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0021-wifi-ath11k-remap-ce-register-space-for-IPQ5018.patch
+@@ -0,0 +1,351 @@
++From b42b3678c91f3ca6e0888bf5a15c1e8678fd5f2d Mon Sep 17 00:00:00 2001
++From: Sriram R <quic_srirrama@quicinc.com>
++Date: Fri, 2 Dec 2022 23:37:14 +0200
++Subject: [PATCH] wifi: ath11k: remap ce register space for IPQ5018
++
++In IPQ5018 ce register space is moved out of wcss unlike
++ipq8074 or ipq6018 and the space is not contiguous,
++hence remap the CE registers to a new space to access them.
++
++Register read/write is modified to check if the register to be written
++falls in the CE register space and corresponding register is written.
++Also adjust the interrupt register address to ce irq enable/disable.
++
++Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
++Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221122132152.17771-5-quic_kathirve@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/ahb.c  | 44 ++++++++++++++++++++++----
++ drivers/net/wireless/ath/ath11k/ce.h   | 16 ++++++++++
++ drivers/net/wireless/ath/ath11k/core.c |  8 +++++
++ drivers/net/wireless/ath/ath11k/core.h |  1 +
++ drivers/net/wireless/ath/ath11k/hal.c  | 17 ++++++----
++ drivers/net/wireless/ath/ath11k/hal.h  |  5 +++
++ drivers/net/wireless/ath/ath11k/hw.c   | 17 ++++++++++
++ drivers/net/wireless/ath/ath11k/hw.h   |  9 ++++++
++ drivers/net/wireless/ath/ath11k/pci.c  |  2 ++
++ 9 files changed, 107 insertions(+), 12 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/ahb.c
+++++ b/drivers/net/wireless/ath/ath11k/ahb.c
++@@ -267,30 +267,42 @@ static void ath11k_ahb_clearbit32(struct
++ static void ath11k_ahb_ce_irq_enable(struct ath11k_base *ab, u16 ce_id)
++ {
++ 	const struct ce_attr *ce_attr;
+++	const struct ce_ie_addr *ce_ie_addr = ab->hw_params.ce_ie_addr;
+++	u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr;
+++
+++	ie1_reg_addr = ce_ie_addr->ie1_reg_addr + ATH11K_CE_OFFSET(ab);
+++	ie2_reg_addr = ce_ie_addr->ie2_reg_addr + ATH11K_CE_OFFSET(ab);
+++	ie3_reg_addr = ce_ie_addr->ie3_reg_addr + ATH11K_CE_OFFSET(ab);
++ 
++ 	ce_attr = &ab->hw_params.host_ce_config[ce_id];
++ 	if (ce_attr->src_nentries)
++-		ath11k_ahb_setbit32(ab, ce_id, CE_HOST_IE_ADDRESS);
+++		ath11k_ahb_setbit32(ab, ce_id, ie1_reg_addr);
++ 
++ 	if (ce_attr->dest_nentries) {
++-		ath11k_ahb_setbit32(ab, ce_id, CE_HOST_IE_2_ADDRESS);
+++		ath11k_ahb_setbit32(ab, ce_id, ie2_reg_addr);
++ 		ath11k_ahb_setbit32(ab, ce_id + CE_HOST_IE_3_SHIFT,
++-				    CE_HOST_IE_3_ADDRESS);
+++				    ie3_reg_addr);
++ 	}
++ }
++ 
++ static void ath11k_ahb_ce_irq_disable(struct ath11k_base *ab, u16 ce_id)
++ {
++ 	const struct ce_attr *ce_attr;
+++	const struct ce_ie_addr *ce_ie_addr = ab->hw_params.ce_ie_addr;
+++	u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr;
+++
+++	ie1_reg_addr = ce_ie_addr->ie1_reg_addr + ATH11K_CE_OFFSET(ab);
+++	ie2_reg_addr = ce_ie_addr->ie2_reg_addr + ATH11K_CE_OFFSET(ab);
+++	ie3_reg_addr = ce_ie_addr->ie3_reg_addr + ATH11K_CE_OFFSET(ab);
++ 
++ 	ce_attr = &ab->hw_params.host_ce_config[ce_id];
++ 	if (ce_attr->src_nentries)
++-		ath11k_ahb_clearbit32(ab, ce_id, CE_HOST_IE_ADDRESS);
+++		ath11k_ahb_clearbit32(ab, ce_id, ie1_reg_addr);
++ 
++ 	if (ce_attr->dest_nentries) {
++-		ath11k_ahb_clearbit32(ab, ce_id, CE_HOST_IE_2_ADDRESS);
+++		ath11k_ahb_clearbit32(ab, ce_id, ie2_reg_addr);
++ 		ath11k_ahb_clearbit32(ab, ce_id + CE_HOST_IE_3_SHIFT,
++-				      CE_HOST_IE_3_ADDRESS);
+++				      ie3_reg_addr);
++ 	}
++ }
++ 
++@@ -1142,10 +1154,26 @@ static int ath11k_ahb_probe(struct platf
++ 		goto err_core_free;
++ 	}
++ 
+++	ab->mem_ce = ab->mem;
+++
++ 	ret = ath11k_core_pre_init(ab);
++ 	if (ret)
++ 		goto err_core_free;
++ 
+++	if (ab->hw_params.ce_remap) {
+++		const struct ce_remap *ce_remap = ab->hw_params.ce_remap;
+++		/* ce register space is moved out of wcss unlike ipq8074 or ipq6018
+++		 * and the space is not contiguous, hence remapping the CE registers
+++		 * to a new space for accessing them.
+++		 */
+++		ab->mem_ce = ioremap(ce_remap->base, ce_remap->size);
+++		if (IS_ERR(ab->mem_ce)) {
+++			dev_err(&pdev->dev, "ce ioremap error\n");
+++			ret = -ENOMEM;
+++			goto err_core_free;
+++		}
+++	}
+++
++ 	ret = ath11k_ahb_setup_resources(ab);
++ 	if (ret)
++ 		goto err_core_free;
++@@ -1236,6 +1264,10 @@ static void ath11k_ahb_free_resources(st
++ 	ath11k_ahb_release_smp2p_handle(ab);
++ 	ath11k_ahb_fw_resource_deinit(ab);
++ 	ath11k_ce_free_pipes(ab);
+++
+++	if (ab->hw_params.ce_remap)
+++		iounmap(ab->mem_ce);
+++
++ 	ath11k_core_free(ab);
++ 	platform_set_drvdata(pdev, NULL);
++ }
++--- a/drivers/net/wireless/ath/ath11k/ce.h
+++++ b/drivers/net/wireless/ath/ath11k/ce.h
++@@ -49,6 +49,11 @@ void ath11k_ce_byte_swap(void *mem, u32
++ #define CE_HOST_IE_2_ADDRESS	0x00A18040
++ #define CE_HOST_IE_3_ADDRESS	CE_HOST_IE_ADDRESS
++ 
+++/* CE IE registers are different for IPQ5018 */
+++#define CE_HOST_IPQ5018_IE_ADDRESS		0x0841804C
+++#define CE_HOST_IPQ5018_IE_2_ADDRESS		0x08418050
+++#define CE_HOST_IPQ5018_IE_3_ADDRESS		CE_HOST_IPQ5018_IE_ADDRESS
+++
++ #define CE_HOST_IE_3_SHIFT	0xC
++ 
++ #define CE_RING_IDX_INCR(nentries_mask, idx) (((idx) + 1) & (nentries_mask))
++@@ -84,6 +89,17 @@ struct ce_pipe_config {
++ 	__le32 reserved;
++ };
++ 
+++struct ce_ie_addr {
+++	u32 ie1_reg_addr;
+++	u32 ie2_reg_addr;
+++	u32 ie3_reg_addr;
+++};
+++
+++struct ce_remap {
+++	u32 base;
+++	u32 size;
+++};
+++
++ struct ce_attr {
++ 	/* CE_ATTR_* values */
++ 	unsigned int flags;
++--- a/drivers/net/wireless/ath/ath11k/core.c
+++++ b/drivers/net/wireless/ath/ath11k/core.c
++@@ -54,6 +54,7 @@ static const struct ath11k_hw_params ath
++ 		.target_ce_count = 11,
++ 		.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq8074,
++ 		.svc_to_ce_map_len = 21,
+++		.ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
++ 		.single_pdev_only = false,
++ 		.rxdma1_enable = true,
++ 		.num_rxmda_per_pdev = 1,
++@@ -137,6 +138,7 @@ static const struct ath11k_hw_params ath
++ 		.target_ce_count = 11,
++ 		.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq6018,
++ 		.svc_to_ce_map_len = 19,
+++		.ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
++ 		.single_pdev_only = false,
++ 		.rxdma1_enable = true,
++ 		.num_rxmda_per_pdev = 1,
++@@ -218,6 +220,7 @@ static const struct ath11k_hw_params ath
++ 		.target_ce_count = 9,
++ 		.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
++ 		.svc_to_ce_map_len = 14,
+++		.ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
++ 		.single_pdev_only = true,
++ 		.rxdma1_enable = false,
++ 		.num_rxmda_per_pdev = 2,
++@@ -301,6 +304,7 @@ static const struct ath11k_hw_params ath
++ 		.target_ce_count = 9,
++ 		.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qcn9074,
++ 		.svc_to_ce_map_len = 18,
+++		.ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
++ 		.rxdma1_enable = true,
++ 		.num_rxmda_per_pdev = 1,
++ 		.rx_mac_buf_ring = false,
++@@ -381,6 +385,7 @@ static const struct ath11k_hw_params ath
++ 		.target_ce_count = 9,
++ 		.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
++ 		.svc_to_ce_map_len = 14,
+++		.ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
++ 		.single_pdev_only = true,
++ 		.rxdma1_enable = false,
++ 		.num_rxmda_per_pdev = 2,
++@@ -546,6 +551,7 @@ static const struct ath11k_hw_params ath
++ 		.target_ce_count = 9,
++ 		.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
++ 		.svc_to_ce_map_len = 14,
+++		.ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
++ 		.single_pdev_only = true,
++ 		.rxdma1_enable = false,
++ 		.num_rxmda_per_pdev = 1,
++@@ -634,6 +640,8 @@ static const struct ath11k_hw_params ath
++ 		.target_ce_count = TARGET_CE_CNT_5018,
++ 		.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq5018,
++ 		.svc_to_ce_map_len = SVC_CE_MAP_LEN_5018,
+++		.ce_ie_addr = &ath11k_ce_ie_addr_ipq5018,
+++		.ce_remap = &ath11k_ce_remap_ipq5018,
++ 		.rxdma1_enable = true,
++ 		.num_rxmda_per_pdev = RXDMA_PER_PDEV_5018,
++ 		.rx_mac_buf_ring = false,
++--- a/drivers/net/wireless/ath/ath11k/core.h
+++++ b/drivers/net/wireless/ath/ath11k/core.h
++@@ -851,6 +851,7 @@ struct ath11k_base {
++ 	struct ath11k_dp dp;
++ 
++ 	void __iomem *mem;
+++	void __iomem *mem_ce;
++ 	unsigned long mem_len;
++ 
++ 	struct {
++--- a/drivers/net/wireless/ath/ath11k/hal.c
+++++ b/drivers/net/wireless/ath/ath11k/hal.c
++@@ -1220,16 +1220,20 @@ static int ath11k_hal_srng_create_config
++ 	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_STATUS_RING_HP;
++ 
++ 	s = &hal->srng_config[HAL_CE_SRC];
++-	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
++-	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP;
+++	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB +
+++		ATH11K_CE_OFFSET(ab);
+++	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP +
+++		ATH11K_CE_OFFSET(ab);
++ 	s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
++ 		HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
++ 	s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
++ 		HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
++ 
++ 	s = &hal->srng_config[HAL_CE_DST];
++-	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
++-	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP;
+++	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB +
+++		ATH11K_CE_OFFSET(ab);
+++	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP +
+++		ATH11K_CE_OFFSET(ab);
++ 	s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
++ 		HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
++ 	s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
++@@ -1237,8 +1241,9 @@ static int ath11k_hal_srng_create_config
++ 
++ 	s = &hal->srng_config[HAL_CE_DST_STATUS];
++ 	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) +
++-		HAL_CE_DST_STATUS_RING_BASE_LSB;
++-	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP;
+++		HAL_CE_DST_STATUS_RING_BASE_LSB + ATH11K_CE_OFFSET(ab);
+++	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP +
+++		ATH11K_CE_OFFSET(ab);
++ 	s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
++ 		HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
++ 	s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
++--- a/drivers/net/wireless/ath/ath11k/hal.h
+++++ b/drivers/net/wireless/ath/ath11k/hal.h
++@@ -321,6 +321,10 @@ struct ath11k_base;
++ #define HAL_WBM2SW_RELEASE_RING_BASE_MSB_RING_SIZE	0x000fffff
++ #define HAL_RXDMA_RING_MAX_SIZE				0x0000ffff
++ 
+++/* IPQ5018 ce registers */
+++#define HAL_IPQ5018_CE_WFSS_REG_BASE		0x08400000
+++#define HAL_IPQ5018_CE_SIZE			0x200000
+++
++ /* Add any other errors here and return them in
++  * ath11k_hal_rx_desc_get_err().
++  */
++@@ -519,6 +523,7 @@ enum hal_srng_dir {
++ #define HAL_SRNG_FLAGS_MSI_INTR			0x00020000
++ #define HAL_SRNG_FLAGS_CACHED                   0x20000000
++ #define HAL_SRNG_FLAGS_LMAC_RING		0x80000000
+++#define HAL_SRNG_FLAGS_REMAP_CE_RING        0x10000000
++ 
++ #define HAL_SRNG_TLV_HDR_TAG		GENMASK(9, 1)
++ #define HAL_SRNG_TLV_HDR_LEN		GENMASK(25, 10)
++--- a/drivers/net/wireless/ath/ath11k/hw.c
+++++ b/drivers/net/wireless/ath/ath11k/hw.c
++@@ -2163,6 +2163,23 @@ const struct service_to_pipe ath11k_targ
++ 	{ /* terminator entry */ }
++ };
++ 
+++const struct ce_ie_addr ath11k_ce_ie_addr_ipq8074 = {
+++	.ie1_reg_addr = CE_HOST_IE_ADDRESS,
+++	.ie2_reg_addr = CE_HOST_IE_2_ADDRESS,
+++	.ie3_reg_addr = CE_HOST_IE_3_ADDRESS,
+++};
+++
+++const struct ce_ie_addr ath11k_ce_ie_addr_ipq5018 = {
+++	.ie1_reg_addr = CE_HOST_IPQ5018_IE_ADDRESS - HAL_IPQ5018_CE_WFSS_REG_BASE,
+++	.ie2_reg_addr = CE_HOST_IPQ5018_IE_2_ADDRESS - HAL_IPQ5018_CE_WFSS_REG_BASE,
+++	.ie3_reg_addr = CE_HOST_IPQ5018_IE_3_ADDRESS - HAL_IPQ5018_CE_WFSS_REG_BASE,
+++};
+++
+++const struct ce_remap ath11k_ce_remap_ipq5018 = {
+++	.base = HAL_IPQ5018_CE_WFSS_REG_BASE,
+++	.size = HAL_IPQ5018_CE_SIZE,
+++};
+++
++ const struct ath11k_hw_regs ipq8074_regs = {
++ 	/* SW2TCL(x) R0 ring configuration address */
++ 	.hal_tcl1_ring_base_lsb = 0x00000510,
++--- a/drivers/net/wireless/ath/ath11k/hw.h
+++++ b/drivers/net/wireless/ath/ath11k/hw.h
++@@ -80,6 +80,8 @@
++ #define ATH11K_M3_FILE			"m3.bin"
++ #define ATH11K_REGDB_FILE_NAME		"regdb.bin"
++ 
+++#define ATH11K_CE_OFFSET(ab)	(ab->mem_ce - ab->mem)
+++
++ enum ath11k_hw_rate_cck {
++ 	ATH11K_HW_RATE_CCK_LP_11M = 0,
++ 	ATH11K_HW_RATE_CCK_LP_5_5M,
++@@ -158,6 +160,8 @@ struct ath11k_hw_params {
++ 	u32 target_ce_count;
++ 	const struct service_to_pipe *svc_to_ce_map;
++ 	u32 svc_to_ce_map_len;
+++	const struct ce_ie_addr *ce_ie_addr;
+++	const struct ce_remap *ce_remap;
++ 
++ 	bool single_pdev_only;
++ 
++@@ -277,6 +281,11 @@ extern const struct ath11k_hw_ring_mask
++ extern const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_qcn9074;
++ extern const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_wcn6750;
++ 
+++extern const struct ce_ie_addr ath11k_ce_ie_addr_ipq8074;
+++extern const struct ce_ie_addr ath11k_ce_ie_addr_ipq5018;
+++
+++extern const struct ce_remap ath11k_ce_remap_ipq5018;
+++
++ extern const struct ath11k_hw_hal_params ath11k_hw_hal_params_ipq8074;
++ extern const struct ath11k_hw_hal_params ath11k_hw_hal_params_qca6390;
++ extern const struct ath11k_hw_hal_params ath11k_hw_hal_params_wcn6750;
++--- a/drivers/net/wireless/ath/ath11k/pci.c
+++++ b/drivers/net/wireless/ath/ath11k/pci.c
++@@ -543,6 +543,8 @@ static int ath11k_pci_claim(struct ath11
++ 		goto clear_master;
++ 	}
++ 
+++	ab->mem_ce = ab->mem;
+++
++ 	ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot pci_mem 0x%pK\n", ab->mem);
++ 	return 0;
++ 
+diff --git a/package/kernel/mac80211/patches/ath11k/0022-wifi-ath11k-update-hal-srng-regs-for-IPQ5018.patch b/package/kernel/mac80211/patches/ath11k/0022-wifi-ath11k-update-hal-srng-regs-for-IPQ5018.patch
+new file mode 100644
+index 0000000000..35ea20a3c4
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0022-wifi-ath11k-update-hal-srng-regs-for-IPQ5018.patch
+@@ -0,0 +1,130 @@
++From 711b80acbdfb9667a9cf8374e13320a6e624ce73 Mon Sep 17 00:00:00 2001
++From: Sriram R <quic_srirrama@quicinc.com>
++Date: Fri, 2 Dec 2022 23:37:14 +0200
++Subject: [PATCH] wifi: ath11k: update hal srng regs for IPQ5018
++
++IPQ5018 hal srng register address & offsets are not
++similar to IPQ8074/IPQ6018/QCN9074, hence define a
++new set of srng register group data for IPQ5018.
++
++Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
++Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221122132152.17771-6-quic_kathirve@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/core.c |  1 +
++ drivers/net/wireless/ath/ath11k/hw.c   | 79 ++++++++++++++++++++++++++
++ drivers/net/wireless/ath/ath11k/hw.h   |  1 +
++ 3 files changed, 81 insertions(+)
++
++--- a/drivers/net/wireless/ath/ath11k/core.c
+++++ b/drivers/net/wireless/ath/ath11k/core.c
++@@ -634,6 +634,7 @@ static const struct ath11k_hw_params ath
++ 			.max_fft_bins = 1024,
++ 		},
++ 		.internal_sleep_clock = false,
+++		.regs = &ipq5018_regs,
++ 		.host_ce_config = ath11k_host_ce_config_qcn9074,
++ 		.ce_count = CE_CNT_5018,
++ 		.target_ce_config = ath11k_target_ce_config_wlan_ipq5018,
++--- a/drivers/net/wireless/ath/ath11k/hw.c
+++++ b/drivers/net/wireless/ath/ath11k/hw.c
++@@ -2645,6 +2645,85 @@ static const struct ath11k_hw_tcl2wbm_rb
++ 	},
++ };
++ 
+++const struct ath11k_hw_regs ipq5018_regs = {
+++	/* SW2TCL(x) R0 ring configuration address */
+++	.hal_tcl1_ring_base_lsb = 0x00000694,
+++	.hal_tcl1_ring_base_msb = 0x00000698,
+++	.hal_tcl1_ring_id =	0x0000069c,
+++	.hal_tcl1_ring_misc = 0x000006a4,
+++	.hal_tcl1_ring_tp_addr_lsb = 0x000006b0,
+++	.hal_tcl1_ring_tp_addr_msb = 0x000006b4,
+++	.hal_tcl1_ring_consumer_int_setup_ix0 = 0x000006c4,
+++	.hal_tcl1_ring_consumer_int_setup_ix1 = 0x000006c8,
+++	.hal_tcl1_ring_msi1_base_lsb = 0x000006dc,
+++	.hal_tcl1_ring_msi1_base_msb = 0x000006e0,
+++	.hal_tcl1_ring_msi1_data = 0x000006e4,
+++	.hal_tcl2_ring_base_lsb = 0x000006ec,
+++	.hal_tcl_ring_base_lsb = 0x0000079c,
+++
+++	/* TCL STATUS ring address */
+++	.hal_tcl_status_ring_base_lsb = 0x000008a4,
+++
+++	/* REO2SW(x) R0 ring configuration address */
+++	.hal_reo1_ring_base_lsb = 0x000001ec,
+++	.hal_reo1_ring_base_msb = 0x000001f0,
+++	.hal_reo1_ring_id = 0x000001f4,
+++	.hal_reo1_ring_misc = 0x000001fc,
+++	.hal_reo1_ring_hp_addr_lsb = 0x00000200,
+++	.hal_reo1_ring_hp_addr_msb = 0x00000204,
+++	.hal_reo1_ring_producer_int_setup = 0x00000210,
+++	.hal_reo1_ring_msi1_base_lsb = 0x00000234,
+++	.hal_reo1_ring_msi1_base_msb = 0x00000238,
+++	.hal_reo1_ring_msi1_data = 0x0000023c,
+++	.hal_reo2_ring_base_lsb = 0x00000244,
+++	.hal_reo1_aging_thresh_ix_0 = 0x00000564,
+++	.hal_reo1_aging_thresh_ix_1 = 0x00000568,
+++	.hal_reo1_aging_thresh_ix_2 = 0x0000056c,
+++	.hal_reo1_aging_thresh_ix_3 = 0x00000570,
+++
+++	/* REO2SW(x) R2 ring pointers (head/tail) address */
+++	.hal_reo1_ring_hp = 0x00003028,
+++	.hal_reo1_ring_tp = 0x0000302c,
+++	.hal_reo2_ring_hp = 0x00003030,
+++
+++	/* REO2TCL R0 ring configuration address */
+++	.hal_reo_tcl_ring_base_lsb = 0x000003fc,
+++	.hal_reo_tcl_ring_hp = 0x00003058,
+++
+++	/* SW2REO ring address */
+++	.hal_sw2reo_ring_base_lsb = 0x0000013c,
+++	.hal_sw2reo_ring_hp = 0x00003018,
+++
+++	/* REO CMD ring address */
+++	.hal_reo_cmd_ring_base_lsb = 0x000000e4,
+++	.hal_reo_cmd_ring_hp = 0x00003010,
+++
+++	/* REO status address */
+++	.hal_reo_status_ring_base_lsb = 0x00000504,
+++	.hal_reo_status_hp = 0x00003070,
+++
+++	/* WCSS relative address */
+++	.hal_seq_wcss_umac_ce0_src_reg = 0x08400000
+++		- HAL_IPQ5018_CE_WFSS_REG_BASE,
+++	.hal_seq_wcss_umac_ce0_dst_reg = 0x08401000
+++		- HAL_IPQ5018_CE_WFSS_REG_BASE,
+++	.hal_seq_wcss_umac_ce1_src_reg = 0x08402000
+++		- HAL_IPQ5018_CE_WFSS_REG_BASE,
+++	.hal_seq_wcss_umac_ce1_dst_reg = 0x08403000
+++		- HAL_IPQ5018_CE_WFSS_REG_BASE,
+++
+++	/* WBM Idle address */
+++	.hal_wbm_idle_link_ring_base_lsb = 0x00000874,
+++	.hal_wbm_idle_link_ring_misc = 0x00000884,
+++
+++	/* SW2WBM release address */
+++	.hal_wbm_release_ring_base_lsb = 0x000001ec,
+++
+++	/* WBM2SW release address */
+++	.hal_wbm0_release_ring_base_lsb = 0x00000924,
+++	.hal_wbm1_release_ring_base_lsb = 0x0000097c,
+++};
+++
++ const struct ath11k_hw_hal_params ath11k_hw_hal_params_ipq8074 = {
++ 	.rx_buf_rbm = HAL_RX_BUF_RBM_SW3_BM,
++ 	.tcl2wbm_rbm_map = ath11k_hw_tcl2wbm_rbm_map_ipq8074,
++--- a/drivers/net/wireless/ath/ath11k/hw.h
+++++ b/drivers/net/wireless/ath/ath11k/hw.h
++@@ -415,6 +415,7 @@ extern const struct ath11k_hw_regs qca63
++ extern const struct ath11k_hw_regs qcn9074_regs;
++ extern const struct ath11k_hw_regs wcn6855_regs;
++ extern const struct ath11k_hw_regs wcn6750_regs;
+++extern const struct ath11k_hw_regs ipq5018_regs;
++ 
++ static inline const char *ath11k_bd_ie_type_str(enum ath11k_bd_ie_type type)
++ {
+diff --git a/package/kernel/mac80211/patches/ath11k/0023-wifi-ath11k-initialize-hw_ops-for-IPQ5018.patch b/package/kernel/mac80211/patches/ath11k/0023-wifi-ath11k-initialize-hw_ops-for-IPQ5018.patch
+new file mode 100644
+index 0000000000..5ef701a445
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0023-wifi-ath11k-initialize-hw_ops-for-IPQ5018.patch
+@@ -0,0 +1,90 @@
++From ba60f2793d3a37a00da14bb56a26558a902d2831 Mon Sep 17 00:00:00 2001
++From: Sriram R <quic_srirrama@quicinc.com>
++Date: Fri, 2 Dec 2022 23:37:14 +0200
++Subject: [PATCH] wifi: ath11k: initialize hw_ops for IPQ5018
++
++The ipq5018_ops is initialized for IPQ5018. This is different from
++other platforms.
++
++Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
++Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221122132152.17771-7-quic_kathirve@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/core.c |  1 +
++ drivers/net/wireless/ath/ath11k/hw.c   | 40 ++++++++++++++++++++++++++
++ drivers/net/wireless/ath/ath11k/hw.h   |  1 +
++ 3 files changed, 42 insertions(+)
++
++--- a/drivers/net/wireless/ath/ath11k/core.c
+++++ b/drivers/net/wireless/ath/ath11k/core.c
++@@ -635,6 +635,7 @@ static const struct ath11k_hw_params ath
++ 		},
++ 		.internal_sleep_clock = false,
++ 		.regs = &ipq5018_regs,
+++		.hw_ops = &ipq5018_ops,
++ 		.host_ce_config = ath11k_host_ce_config_qcn9074,
++ 		.ce_count = CE_CNT_5018,
++ 		.target_ce_config = ath11k_target_ce_config_wlan_ipq5018,
++--- a/drivers/net/wireless/ath/ath11k/hw.c
+++++ b/drivers/net/wireless/ath/ath11k/hw.c
++@@ -1084,6 +1084,46 @@ const struct ath11k_hw_ops wcn6750_ops =
++ 	.get_ring_selector = ath11k_hw_wcn6750_get_tcl_ring_selector,
++ };
++ 
+++/* IPQ5018 hw ops is similar to QCN9074 except for the dest ring remap */
+++const struct ath11k_hw_ops ipq5018_ops = {
+++	.get_hw_mac_from_pdev_id = ath11k_hw_ipq6018_mac_from_pdev_id,
+++	.wmi_init_config = ath11k_init_wmi_config_ipq8074,
+++	.mac_id_to_pdev_id = ath11k_hw_mac_id_to_pdev_id_ipq8074,
+++	.mac_id_to_srng_id = ath11k_hw_mac_id_to_srng_id_ipq8074,
+++	.tx_mesh_enable = ath11k_hw_qcn9074_tx_mesh_enable,
+++	.rx_desc_get_first_msdu = ath11k_hw_qcn9074_rx_desc_get_first_msdu,
+++	.rx_desc_get_last_msdu = ath11k_hw_qcn9074_rx_desc_get_last_msdu,
+++	.rx_desc_get_l3_pad_bytes = ath11k_hw_qcn9074_rx_desc_get_l3_pad_bytes,
+++	.rx_desc_get_hdr_status = ath11k_hw_qcn9074_rx_desc_get_hdr_status,
+++	.rx_desc_encrypt_valid = ath11k_hw_qcn9074_rx_desc_encrypt_valid,
+++	.rx_desc_get_encrypt_type = ath11k_hw_qcn9074_rx_desc_get_encrypt_type,
+++	.rx_desc_get_decap_type = ath11k_hw_qcn9074_rx_desc_get_decap_type,
+++	.rx_desc_get_mesh_ctl = ath11k_hw_qcn9074_rx_desc_get_mesh_ctl,
+++	.rx_desc_get_ldpc_support = ath11k_hw_qcn9074_rx_desc_get_ldpc_support,
+++	.rx_desc_get_mpdu_seq_ctl_vld = ath11k_hw_qcn9074_rx_desc_get_mpdu_seq_ctl_vld,
+++	.rx_desc_get_mpdu_fc_valid = ath11k_hw_qcn9074_rx_desc_get_mpdu_fc_valid,
+++	.rx_desc_get_mpdu_start_seq_no = ath11k_hw_qcn9074_rx_desc_get_mpdu_start_seq_no,
+++	.rx_desc_get_msdu_len = ath11k_hw_qcn9074_rx_desc_get_msdu_len,
+++	.rx_desc_get_msdu_sgi = ath11k_hw_qcn9074_rx_desc_get_msdu_sgi,
+++	.rx_desc_get_msdu_rate_mcs = ath11k_hw_qcn9074_rx_desc_get_msdu_rate_mcs,
+++	.rx_desc_get_msdu_rx_bw = ath11k_hw_qcn9074_rx_desc_get_msdu_rx_bw,
+++	.rx_desc_get_msdu_freq = ath11k_hw_qcn9074_rx_desc_get_msdu_freq,
+++	.rx_desc_get_msdu_pkt_type = ath11k_hw_qcn9074_rx_desc_get_msdu_pkt_type,
+++	.rx_desc_get_msdu_nss = ath11k_hw_qcn9074_rx_desc_get_msdu_nss,
+++	.rx_desc_get_mpdu_tid = ath11k_hw_qcn9074_rx_desc_get_mpdu_tid,
+++	.rx_desc_get_mpdu_peer_id = ath11k_hw_qcn9074_rx_desc_get_mpdu_peer_id,
+++	.rx_desc_copy_attn_end_tlv = ath11k_hw_qcn9074_rx_desc_copy_attn_end,
+++	.rx_desc_get_mpdu_start_tag = ath11k_hw_qcn9074_rx_desc_get_mpdu_start_tag,
+++	.rx_desc_get_mpdu_ppdu_id = ath11k_hw_qcn9074_rx_desc_get_mpdu_ppdu_id,
+++	.rx_desc_set_msdu_len = ath11k_hw_qcn9074_rx_desc_set_msdu_len,
+++	.rx_desc_get_attention = ath11k_hw_qcn9074_rx_desc_get_attention,
+++	.rx_desc_get_msdu_payload = ath11k_hw_qcn9074_rx_desc_get_msdu_payload,
+++	.mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid,
+++	.rx_desc_mac_addr2_valid = ath11k_hw_ipq9074_rx_desc_mac_addr2_valid,
+++	.rx_desc_mpdu_start_addr2 = ath11k_hw_ipq9074_rx_desc_mpdu_start_addr2,
+++
+++};
+++
++ #define ATH11K_TX_RING_MASK_0 BIT(0)
++ #define ATH11K_TX_RING_MASK_1 BIT(1)
++ #define ATH11K_TX_RING_MASK_2 BIT(2)
++--- a/drivers/net/wireless/ath/ath11k/hw.h
+++++ b/drivers/net/wireless/ath/ath11k/hw.h
++@@ -275,6 +275,7 @@ extern const struct ath11k_hw_ops qca639
++ extern const struct ath11k_hw_ops qcn9074_ops;
++ extern const struct ath11k_hw_ops wcn6855_ops;
++ extern const struct ath11k_hw_ops wcn6750_ops;
+++extern const struct ath11k_hw_ops ipq5018_ops;
++ 
++ extern const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_ipq8074;
++ extern const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_qca6390;
+diff --git a/package/kernel/mac80211/patches/ath11k/0024-wifi-ath11k-add-new-hw-ops-for-IPQ5018-to-get-rx-des.patch b/package/kernel/mac80211/patches/ath11k/0024-wifi-ath11k-add-new-hw-ops-for-IPQ5018-to-get-rx-des.patch
+new file mode 100644
+index 0000000000..64531f13f8
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0024-wifi-ath11k-add-new-hw-ops-for-IPQ5018-to-get-rx-des.patch
+@@ -0,0 +1,84 @@
++From 69968f88f1770d61cae0febef805fd00d66cf6a1 Mon Sep 17 00:00:00 2001
++From: Sriram R <quic_srirrama@quicinc.com>
++Date: Fri, 2 Dec 2022 23:37:15 +0200
++Subject: [PATCH] wifi: ath11k: add new hw ops for IPQ5018 to get rx dest ring
++ hashmap
++
++The Destination ring control register is different
++for IPQ5018 when compared to IPQ8074/IPQ6018/QCN9074.
++Hence create a new hw ops to fetch the hash ring map
++for different device variants. ipq5018 hw ops
++is similar to qcn9074 except for this change, so reuse
++all the qcn9074 ops for ipq5018.
++
++Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
++Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221122132152.17771-8-quic_kathirve@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/hw.c | 44 ++++++++++++++++++++++++++++
++ 1 file changed, 44 insertions(+)
++
++--- a/drivers/net/wireless/ath/ath11k/hw.c
+++++ b/drivers/net/wireless/ath/ath11k/hw.c
++@@ -791,6 +791,49 @@ static void ath11k_hw_wcn6855_reo_setup(
++ 			   ring_hash_map);
++ }
++ 
+++static void ath11k_hw_ipq5018_reo_setup(struct ath11k_base *ab)
+++{
+++	u32 reo_base = HAL_SEQ_WCSS_UMAC_REO_REG;
+++	u32 val;
+++
+++	/* Each hash entry uses three bits to map to a particular ring. */
+++	u32 ring_hash_map = HAL_HASH_ROUTING_RING_SW1 << 0 |
+++		HAL_HASH_ROUTING_RING_SW2 << 4 |
+++		HAL_HASH_ROUTING_RING_SW3 << 8 |
+++		HAL_HASH_ROUTING_RING_SW4 << 12 |
+++		HAL_HASH_ROUTING_RING_SW1 << 16 |
+++		HAL_HASH_ROUTING_RING_SW2 << 20 |
+++		HAL_HASH_ROUTING_RING_SW3 << 24 |
+++		HAL_HASH_ROUTING_RING_SW4 << 28;
+++
+++	val = ath11k_hif_read32(ab, reo_base + HAL_REO1_GEN_ENABLE);
+++
+++	val &= ~HAL_REO1_GEN_ENABLE_FRAG_DST_RING;
+++	val |= FIELD_PREP(HAL_REO1_GEN_ENABLE_FRAG_DST_RING,
+++			HAL_SRNG_RING_ID_REO2SW1) |
+++		FIELD_PREP(HAL_REO1_GEN_ENABLE_AGING_LIST_ENABLE, 1) |
+++		FIELD_PREP(HAL_REO1_GEN_ENABLE_AGING_FLUSH_ENABLE, 1);
+++	ath11k_hif_write32(ab, reo_base + HAL_REO1_GEN_ENABLE, val);
+++
+++	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_0(ab),
+++			   HAL_DEFAULT_REO_TIMEOUT_USEC);
+++	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_1(ab),
+++			   HAL_DEFAULT_REO_TIMEOUT_USEC);
+++	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_2(ab),
+++			   HAL_DEFAULT_REO_TIMEOUT_USEC);
+++	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_3(ab),
+++			   HAL_DEFAULT_REO_TIMEOUT_USEC);
+++
+++	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_0,
+++			   ring_hash_map);
+++	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_1,
+++			   ring_hash_map);
+++	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_2,
+++			   ring_hash_map);
+++	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_3,
+++			   ring_hash_map);
+++}
+++
++ static u16 ath11k_hw_ipq8074_mpdu_info_get_peerid(u8 *tlv_data)
++ {
++ 	u16 peer_id = 0;
++@@ -1117,6 +1160,7 @@ const struct ath11k_hw_ops ipq5018_ops =
++ 	.rx_desc_get_mpdu_ppdu_id = ath11k_hw_qcn9074_rx_desc_get_mpdu_ppdu_id,
++ 	.rx_desc_set_msdu_len = ath11k_hw_qcn9074_rx_desc_set_msdu_len,
++ 	.rx_desc_get_attention = ath11k_hw_qcn9074_rx_desc_get_attention,
+++	.reo_setup = ath11k_hw_ipq5018_reo_setup,
++ 	.rx_desc_get_msdu_payload = ath11k_hw_qcn9074_rx_desc_get_msdu_payload,
++ 	.mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid,
++ 	.rx_desc_mac_addr2_valid = ath11k_hw_ipq9074_rx_desc_mac_addr2_valid,
+diff --git a/package/kernel/mac80211/patches/ath11k/0025-wifi-ath11k-add-ipq5018-device-support.patch b/package/kernel/mac80211/patches/ath11k/0025-wifi-ath11k-add-ipq5018-device-support.patch
+new file mode 100644
+index 0000000000..5b930e8d4f
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0025-wifi-ath11k-add-ipq5018-device-support.patch
+@@ -0,0 +1,31 @@
++From 25edca7bb18a2a40cc7e54c6f522e9b3c917e2c5 Mon Sep 17 00:00:00 2001
++From: Sriram R <quic_srirrama@quicinc.com>
++Date: Fri, 2 Dec 2022 23:37:15 +0200
++Subject: [PATCH] wifi: ath11k: add ipq5018 device support
++
++ipq5018 is a ahb 2ghz device, enable the compatible support for
++ipq5018 in ahb.
++
++Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
++Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221122132152.17771-9-quic_kathirve@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/ahb.c | 3 +++
++ 1 file changed, 3 insertions(+)
++
++--- a/drivers/net/wireless/ath/ath11k/ahb.c
+++++ b/drivers/net/wireless/ath/ath11k/ahb.c
++@@ -32,6 +32,9 @@ static const struct of_device_id ath11k_
++ 	{ .compatible = "qcom,wcn6750-wifi",
++ 	  .data = (void *)ATH11K_HW_WCN6750_HW10,
++ 	},
+++	{ .compatible = "qcom,ipq5018-wifi",
+++	  .data = (void *)ATH11K_HW_IPQ5018_HW10,
+++	},
++ 	{ }
++ };
++ 
+diff --git a/package/kernel/mac80211/patches/ath11k/0026-wifi-ath11k-Fix-scan-request-param-frame-size-warnin.patch b/package/kernel/mac80211/patches/ath11k/0026-wifi-ath11k-Fix-scan-request-param-frame-size-warnin.patch
+new file mode 100644
+index 0000000000..50c14e7b98
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0026-wifi-ath11k-Fix-scan-request-param-frame-size-warnin.patch
+@@ -0,0 +1,161 @@
++From d45daa6d1a8da080f1b516c570a8428a7b9225e4 Mon Sep 17 00:00:00 2001
++From: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Date: Tue, 6 Dec 2022 00:51:25 +0530
++Subject: [PATCH] wifi: ath11k: Fix scan request param frame size warning
++
++Following warning was observed
++
++drivers/net/wireless/ath/ath11k/mac.c:2351:1: warning: the frame
++size of 1184 bytes is larger than 1024 bytes [-Wframe-larger-than=]
++
++A local variable is declared with a size larger than 1024 bytes
++this causing a compilation warning. Change the local variable to
++heap memory to fix the warning.
++
++Tested-on: IPQ8074 AHB WLAN.HK.2.7.0.1-01701-QCAHKSWPL_SILICONZ-1 v2
++
++Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221205192125.13533-1-quic_kathirve@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 83 +++++++++++++++------------
++ 1 file changed, 45 insertions(+), 38 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -3612,7 +3612,7 @@ static int ath11k_mac_op_hw_scan(struct
++ 	struct ath11k *ar = hw->priv;
++ 	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
++ 	struct cfg80211_scan_request *req = &hw_req->req;
++-	struct scan_req_params arg;
+++	struct scan_req_params *arg = NULL;
++ 	int ret = 0;
++ 	int i;
++ 	u32 scan_timeout;
++@@ -3640,72 +3640,78 @@ static int ath11k_mac_op_hw_scan(struct
++ 	if (ret)
++ 		goto exit;
++ 
++-	memset(&arg, 0, sizeof(arg));
++-	ath11k_wmi_start_scan_init(ar, &arg);
++-	arg.vdev_id = arvif->vdev_id;
++-	arg.scan_id = ATH11K_SCAN_ID;
+++	arg = kzalloc(sizeof(*arg), GFP_KERNEL);
+++
+++	if (!arg) {
+++		ret = -ENOMEM;
+++		goto exit;
+++	}
+++
+++	ath11k_wmi_start_scan_init(ar, arg);
+++	arg->vdev_id = arvif->vdev_id;
+++	arg->scan_id = ATH11K_SCAN_ID;
++ 
++ 	if (req->ie_len) {
++-		arg.extraie.ptr = kmemdup(req->ie, req->ie_len, GFP_KERNEL);
++-		if (!arg.extraie.ptr) {
+++		arg->extraie.ptr = kmemdup(req->ie, req->ie_len, GFP_KERNEL);
+++		if (!arg->extraie.ptr) {
++ 			ret = -ENOMEM;
++ 			goto exit;
++ 		}
++-		arg.extraie.len = req->ie_len;
+++		arg->extraie.len = req->ie_len;
++ 	}
++ 
++ 	if (req->n_ssids) {
++-		arg.num_ssids = req->n_ssids;
++-		for (i = 0; i < arg.num_ssids; i++) {
++-			arg.ssid[i].length  = req->ssids[i].ssid_len;
++-			memcpy(&arg.ssid[i].ssid, req->ssids[i].ssid,
+++		arg->num_ssids = req->n_ssids;
+++		for (i = 0; i < arg->num_ssids; i++) {
+++			arg->ssid[i].length  = req->ssids[i].ssid_len;
+++			memcpy(&arg->ssid[i].ssid, req->ssids[i].ssid,
++ 			       req->ssids[i].ssid_len);
++ 		}
++ 	} else {
++-		arg.scan_flags |= WMI_SCAN_FLAG_PASSIVE;
+++		arg->scan_flags |= WMI_SCAN_FLAG_PASSIVE;
++ 	}
++ 
++ 	if (req->n_channels) {
++-		arg.num_chan = req->n_channels;
++-		arg.chan_list = kcalloc(arg.num_chan, sizeof(*arg.chan_list),
++-					GFP_KERNEL);
+++		arg->num_chan = req->n_channels;
+++		arg->chan_list = kcalloc(arg->num_chan, sizeof(*arg->chan_list),
+++					 GFP_KERNEL);
++ 
++-		if (!arg.chan_list) {
+++		if (!arg->chan_list) {
++ 			ret = -ENOMEM;
++ 			goto exit;
++ 		}
++ 
++-		for (i = 0; i < arg.num_chan; i++)
++-			arg.chan_list[i] = req->channels[i]->center_freq;
+++		for (i = 0; i < arg->num_chan; i++)
+++			arg->chan_list[i] = req->channels[i]->center_freq;
++ 	}
++ 
++ 	if (req->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) {
++-		arg.scan_f_add_spoofed_mac_in_probe = 1;
++-		ether_addr_copy(arg.mac_addr.addr, req->mac_addr);
++-		ether_addr_copy(arg.mac_mask.addr, req->mac_addr_mask);
+++		arg->scan_f_add_spoofed_mac_in_probe = 1;
+++		ether_addr_copy(arg->mac_addr.addr, req->mac_addr);
+++		ether_addr_copy(arg->mac_mask.addr, req->mac_addr_mask);
++ 	}
++ 
++ 	/* if duration is set, default dwell times will be overwritten */
++ 	if (req->duration) {
++-		arg.dwell_time_active = req->duration;
++-		arg.dwell_time_active_2g = req->duration;
++-		arg.dwell_time_active_6g = req->duration;
++-		arg.dwell_time_passive = req->duration;
++-		arg.dwell_time_passive_6g = req->duration;
++-		arg.burst_duration = req->duration;
+++		arg->dwell_time_active = req->duration;
+++		arg->dwell_time_active_2g = req->duration;
+++		arg->dwell_time_active_6g = req->duration;
+++		arg->dwell_time_passive = req->duration;
+++		arg->dwell_time_passive_6g = req->duration;
+++		arg->burst_duration = req->duration;
++ 
++-		scan_timeout = min_t(u32, arg.max_rest_time *
++-				(arg.num_chan - 1) + (req->duration +
+++		scan_timeout = min_t(u32, arg->max_rest_time *
+++				(arg->num_chan - 1) + (req->duration +
++ 				ATH11K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD) *
++-				arg.num_chan, arg.max_scan_time);
+++				arg->num_chan, arg->max_scan_time);
++ 	} else {
++-		scan_timeout = arg.max_scan_time;
+++		scan_timeout = arg->max_scan_time;
++ 	}
++ 
++ 	/* Add a margin to account for event/command processing */
++ 	scan_timeout += ATH11K_MAC_SCAN_CMD_EVT_OVERHEAD;
++ 
++-	ret = ath11k_start_scan(ar, &arg);
+++	ret = ath11k_start_scan(ar, arg);
++ 	if (ret) {
++ 		ath11k_warn(ar->ab, "failed to start hw scan: %d\n", ret);
++ 		spin_lock_bh(&ar->data_lock);
++@@ -3717,10 +3723,11 @@ static int ath11k_mac_op_hw_scan(struct
++ 				     msecs_to_jiffies(scan_timeout));
++ 
++ exit:
++-	kfree(arg.chan_list);
++-
++-	if (req->ie_len)
++-		kfree(arg.extraie.ptr);
+++	if (arg) {
+++		kfree(arg->chan_list);
+++		kfree(arg->extraie.ptr);
+++		kfree(arg);
+++	}
++ 
++ 	mutex_unlock(&ar->conf_mutex);
++ 
+diff --git a/package/kernel/mac80211/patches/ath11k/0029-wifi-ath11k-Add-support-to-configure-FTM-responder-r.patch b/package/kernel/mac80211/patches/ath11k/0029-wifi-ath11k-Add-support-to-configure-FTM-responder-r.patch
+new file mode 100644
+index 0000000000..f652d689b5
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0029-wifi-ath11k-Add-support-to-configure-FTM-responder-r.patch
+@@ -0,0 +1,169 @@
++From a27c6a5853eb9d4f293b99be73a6891fe88263c7 Mon Sep 17 00:00:00 2001
++From: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
++Date: Tue, 10 Jan 2023 15:30:57 +0200
++Subject: [PATCH] wifi: ath11k: Add support to configure FTM responder role
++
++Fine Timing Measurement(FTM) support is used to measure round trip
++time between two nodes.
++
++Enable FTM responder feature using hw_params on supported device.
++Since FTM functionality is offloaded to firmware, adding the
++interface allows user space to enable or disable FTM responder.
++Also add support for advertising the same in extended capabilities.
++
++QCA6390, WCN6855 and WCN6750 do not support this feature.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
++Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221220044435.10506-1-quic_rajkbhag@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/core.c |  8 ++++++++
++ drivers/net/wireless/ath/ath11k/core.h |  1 +
++ drivers/net/wireless/ath/ath11k/hw.h   |  1 +
++ drivers/net/wireless/ath/ath11k/mac.c  | 20 +++++++++++++++++++-
++ drivers/net/wireless/ath/ath11k/wmi.h  |  1 +
++ 5 files changed, 30 insertions(+), 1 deletion(-)
++
++--- a/drivers/net/wireless/ath/ath11k/core.c
+++++ b/drivers/net/wireless/ath/ath11k/core.c
++@@ -116,6 +116,7 @@ static const struct ath11k_hw_params ath
++ 		.tcl_ring_retry = true,
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
+++		.ftm_responder = true,
++ 	},
++ 	{
++ 		.hw_rev = ATH11K_HW_IPQ6018_HW10,
++@@ -198,6 +199,7 @@ static const struct ath11k_hw_params ath
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
++ 		.support_fw_mac_sequence = false,
+++		.ftm_responder = true,
++ 	},
++ 	{
++ 		.name = "qca6390 hw2.0",
++@@ -282,6 +284,7 @@ static const struct ath11k_hw_params ath
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
++ 		.support_fw_mac_sequence = true,
+++		.ftm_responder = false,
++ 	},
++ 	{
++ 		.name = "qcn9074 hw1.0",
++@@ -363,6 +366,7 @@ static const struct ath11k_hw_params ath
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
++ 		.support_fw_mac_sequence = false,
+++		.ftm_responder = true,
++ 	},
++ 	{
++ 		.name = "wcn6855 hw2.0",
++@@ -447,6 +451,7 @@ static const struct ath11k_hw_params ath
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
++ 		.support_fw_mac_sequence = true,
+++		.ftm_responder = false,
++ 	},
++ 	{
++ 		.name = "wcn6855 hw2.1",
++@@ -529,6 +534,7 @@ static const struct ath11k_hw_params ath
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
++ 		.support_fw_mac_sequence = true,
+++		.ftm_responder = false,
++ 	},
++ 	{
++ 		.name = "wcn6750 hw1.0",
++@@ -609,6 +615,7 @@ static const struct ath11k_hw_params ath
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE_WCN6750,
++ 		.smp2p_wow_exit = true,
++ 		.support_fw_mac_sequence = true,
+++		.ftm_responder = false,
++ 	},
++ 	{
++ 		.hw_rev = ATH11K_HW_IPQ5018_HW10,
++@@ -688,6 +695,7 @@ static const struct ath11k_hw_params ath
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
++ 		.support_fw_mac_sequence = false,
+++		.ftm_responder = true,
++ 	},
++ };
++ 
++--- a/drivers/net/wireless/ath/ath11k/core.h
+++++ b/drivers/net/wireless/ath/ath11k/core.h
++@@ -346,6 +346,7 @@ struct ath11k_vif {
++ 
++ 	bool is_started;
++ 	bool is_up;
+++	bool ftm_responder;
++ 	bool spectral_enabled;
++ 	bool ps;
++ 	u32 aid;
++--- a/drivers/net/wireless/ath/ath11k/hw.h
+++++ b/drivers/net/wireless/ath/ath11k/hw.h
++@@ -224,6 +224,7 @@ struct ath11k_hw_params {
++ 	u32 tx_ring_size;
++ 	bool smp2p_wow_exit;
++ 	bool support_fw_mac_sequence;
+++	bool ftm_responder;
++ };
++ 
++ struct ath11k_hw_ops {
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -3110,7 +3110,7 @@ static void ath11k_mac_op_bss_info_chang
++ 	u16 bitrate;
++ 	int ret = 0;
++ 	u8 rateidx;
++-	u32 rate;
+++	u32 rate, param;
++ 	u32 ipv4_cnt;
++ 
++ 	mutex_lock(&ar->conf_mutex);
++@@ -3412,6 +3412,20 @@ static void ath11k_mac_op_bss_info_chang
++ 		}
++ 	}
++ 
+++	if (changed & BSS_CHANGED_FTM_RESPONDER &&
+++	    arvif->ftm_responder != info->ftm_responder &&
+++	    ar->ab->hw_params.ftm_responder &&
+++	    (vif->type == NL80211_IFTYPE_AP ||
+++	     vif->type == NL80211_IFTYPE_MESH_POINT)) {
+++		arvif->ftm_responder = info->ftm_responder;
+++		param = WMI_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE;
+++		ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id, param,
+++						    arvif->ftm_responder);
+++		if (ret)
+++			ath11k_warn(ar->ab, "Failed to set ftm responder %i: %d\n",
+++				    arvif->vdev_id, ret);
+++	}
+++
++ 	if (changed & BSS_CHANGED_FILS_DISCOVERY ||
++ 	    changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP)
++ 		ath11k_mac_fils_discovery(arvif, info);
++@@ -9113,6 +9127,10 @@ static int __ath11k_mac_register(struct
++ 	wiphy_ext_feature_set(ar->hw->wiphy,
++ 			      NL80211_EXT_FEATURE_SET_SCAN_DWELL);
++ 
+++	if (ab->hw_params.ftm_responder)
+++		wiphy_ext_feature_set(ar->hw->wiphy,
+++				      NL80211_EXT_FEATURE_ENABLE_FTM_RESPONDER);
+++
++ 	ath11k_reg_init(ar);
++ 
++ 	if (!test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags)) {
++--- a/drivers/net/wireless/ath/ath11k/wmi.h
+++++ b/drivers/net/wireless/ath/ath11k/wmi.h
++@@ -1073,6 +1073,7 @@ enum wmi_tlv_vdev_param {
++ 	WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE,
++ 	WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME,
++ 	WMI_VDEV_PARAM_HE_LTF = 0x74,
+++	WMI_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE = 0x7d,
++ 	WMI_VDEV_PARAM_BA_MODE = 0x7e,
++ 	WMI_VDEV_PARAM_AUTORATE_MISC_CFG = 0x80,
++ 	WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87,
+diff --git a/package/kernel/mac80211/patches/ath11k/0030-wifi-ath11k-add-channel-177-into-5-GHz-channel-list.patch b/package/kernel/mac80211/patches/ath11k/0030-wifi-ath11k-add-channel-177-into-5-GHz-channel-list.patch
+new file mode 100644
+index 0000000000..d0ed9c54b8
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0030-wifi-ath11k-add-channel-177-into-5-GHz-channel-list.patch
+@@ -0,0 +1,41 @@
++From e5e94d10c85653609a2893c8d0ef24a27471b68f Mon Sep 17 00:00:00 2001
++From: Wen Gong <quic_wgong@quicinc.com>
++Date: Tue, 10 Jan 2023 15:30:58 +0200
++Subject: [PATCH] wifi: ath11k: add channel 177 into 5 GHz channel list
++
++Add support for the 5 GHz channel 177 with center frequency 5885 MHz and
++operating class 125 per IEEE Std 802.11ax-2021, Table E-4.
++
++Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3
++
++Signed-off-by: Wen Gong <quic_wgong@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221220101912.30816-1-quic_wgong@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/core.h | 4 ++--
++ drivers/net/wireless/ath/ath11k/mac.c  | 1 +
++ 2 files changed, 3 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/core.h
+++++ b/drivers/net/wireless/ath/ath11k/core.h
++@@ -521,8 +521,8 @@ struct ath11k_sta {
++ #define ATH11K_MIN_5G_FREQ 4150
++ #define ATH11K_MIN_6G_FREQ 5925
++ #define ATH11K_MAX_6G_FREQ 7115
++-#define ATH11K_NUM_CHANS 101
++-#define ATH11K_MAX_5G_CHAN 173
+++#define ATH11K_NUM_CHANS 102
+++#define ATH11K_MAX_5G_CHAN 177
++ 
++ enum ath11k_state {
++ 	ATH11K_STATE_OFF,
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -96,6 +96,7 @@ static const struct ieee80211_channel at
++ 	CHAN5G(165, 5825, 0),
++ 	CHAN5G(169, 5845, 0),
++ 	CHAN5G(173, 5865, 0),
+++	CHAN5G(177, 5885, 0),
++ };
++ 
++ static const struct ieee80211_channel ath11k_6ghz_channels[] = {
+diff --git a/package/kernel/mac80211/patches/ath11k/0031-wifi-ath11k-fix-ce-memory-mapping-for-ahb-devices.patch b/package/kernel/mac80211/patches/ath11k/0031-wifi-ath11k-fix-ce-memory-mapping-for-ahb-devices.patch
+new file mode 100644
+index 0000000000..2786799972
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0031-wifi-ath11k-fix-ce-memory-mapping-for-ahb-devices.patch
+@@ -0,0 +1,114 @@
++From 53a998c4d7284debd77734d01e1466e59a1d03b2 Mon Sep 17 00:00:00 2001
++From: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
++Date: Fri, 13 Jan 2023 12:02:09 +0530
++Subject: [PATCH] wifi: ath11k: fix ce memory mapping for ahb devices
++
++Currently ath11k_ahb module is not loaded successfully and the wifi
++interface is not created. Kernel trace is seen while loading the
++ath11k_ahb module. The issue is seen in all ath11k AHB devices except
++in IPQ5018.
++
++This happens because in ath11k_ahb_probe(), ab->mem_ce is initialized
++with the value of ab->mem. However, at this instant ab->mem is not
++yet set.
++
++Later, during write to a particular memory via ath11k_ahb_write32()
++this ab->mem_ce is used with particular offset. Since ab->mem_ce is
++not set properly this possibly leads to memory conflict to handle
++kernel paging request and the below trace is seen.
++
++[   93.035047] Unable to handle kernel paging request at virtual address ffff800100a00000
++[   93.035083] Mem abort info:
++[   93.041869]   ESR = 0x0000000096000045
++[   93.044561]   EC = 0x25: DABT (current EL), IL = 32 bits
++[   93.048377]   SET = 0, FnV = 0
++[   93.053840]   EA = 0, S1PTW = 0
++[   93.056704]   FSC = 0x05: level 1 translation fault
++[   93.059745] Data abort info:
++[   93.064603]   ISV = 0, ISS = 0x00000045
++[   93.067729]   CM = 0, WnR = 1
++[   93.071287] swapper pgtable: 4k pages, 48-bit VAs, pgdp=0000000042219000
++[   93.074409] [ffff800100a00000] pgd=100000007ffff003, p4d=100000007ffff003, pud=0000000000000000
++[   93.081195] Internal error: Oops: 0000000096000045 [#1] PREEMPT SMP
++[   93.089598] Modules linked in: ath11k_ahb ath11k_pci ath11k qmi_helpers
++[   93.095851] CPU: 2 PID: 66 Comm: kworker/u8:3 Not tainted 6.1.0-rc8-wt-ath-658126-g58e4b9df840c-dirty #2
++[   93.102454] Hardware name: Qualcomm Technologies, Inc. IPQ8074/AP-HK14 (DT)
++[   93.112171] Workqueue: ath11k_qmi_driver_event ath11k_qmi_driver_event_work [ath11k]
++[   93.118856] pstate: 40000005 (nZcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
++[   93.126838] pc : ath11k_ahb_write32+0xc/0x18 [ath11k_ahb]
++[   93.133520] lr : ath11k_hal_srng_setup+0x860/0x8f0 [ath11k]
++[   93.139075] sp : ffff80000aaebb70
++[   93.144452] x29: ffff80000aaebb70 x28: 0000000000000020 x27: ffff80000aaebc50
++[   93.147934] x26: ffff000004923750 x25: ffff000004921200 x24: ffff000004928000
++[   93.155051] x23: 0000000000000020 x22: ffff000004930000 x21: ffff000004923200
++[   93.162170] x20: ffff000004920000 x19: 00000000eea00000 x18: ffff0000049200f0
++[   93.169288] x17: 0000000000000000 x16: 0000000000000000 x15: 000000000000025e
++[   93.176405] x14: ffff000003c414f0 x13: 0000000000000000 x12: 0000000000000008
++[   93.183524] x11: ffff000003c41488 x10: 0000000000000040 x9 : 0000000000000000
++[   93.190641] x8 : ffff80000a9dd100 x7 : 0000000000000000 x6 : 000000000000003f
++[   93.197759] x5 : ffff800100a00400 x4 : ffff8000031f4018 x3 : 0000000000000004
++[   93.204877] x2 : 0000000047b62000 x1 : ffff800100a00000 x0 : ffff800012000000
++[   93.211996] Call trace:
++[   93.219104]  ath11k_ahb_write32+0xc/0x18 [ath11k_ahb]
++[   93.221366]  ath11k_ce_init_ring+0x184/0x278 [ath11k]
++[   93.226576]  ath11k_ce_init_pipes+0x4c/0x1a0 [ath11k]
++[   93.231610]  ath11k_core_qmi_firmware_ready+0x3c/0x568 [ath11k]
++[   93.236646]  ath11k_qmi_driver_event_work+0x168/0x4f8 [ath11k]
++[   93.242376]  process_one_work+0x144/0x350
++[   93.248275]  worker_thread+0x120/0x430
++[   93.252352]  kthread+0xf4/0x110
++[   93.255997]  ret_from_fork+0x10/0x20
++[   93.259043] Code: d503201f f94e1c00 8b214001 d50332bf (b9000022)
++[   93.262863] ---[ end trace 0000000000000000 ]---
++
++However, for the device IPQ5018 ath11k_hw_params .ce_remap is
++defined. This parameter is used to recalculate ab->mem_ce and hence,
++this issue is not seen in IPQ5018.
++
++Hence, fix this by initializing ab->mem_ce after ab->mem is set.
++ab->mem is set inside the ath11k_ahb_setup_resources() therefore
++initialize ab->mem_ce after ath11k_ahb_setup_resources().
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Fixes: b42b3678c91f ("wifi: ath11k: remap ce register space for IPQ5018")
++
++Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230113063209.7256-1-quic_rajkbhag@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/ahb.c | 12 ++++++------
++ 1 file changed, 6 insertions(+), 6 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/ahb.c
+++++ b/drivers/net/wireless/ath/ath11k/ahb.c
++@@ -1157,12 +1157,16 @@ static int ath11k_ahb_probe(struct platf
++ 		goto err_core_free;
++ 	}
++ 
++-	ab->mem_ce = ab->mem;
++-
++ 	ret = ath11k_core_pre_init(ab);
++ 	if (ret)
++ 		goto err_core_free;
++ 
+++	ret = ath11k_ahb_setup_resources(ab);
+++	if (ret)
+++		goto err_core_free;
+++
+++	ab->mem_ce = ab->mem;
+++
++ 	if (ab->hw_params.ce_remap) {
++ 		const struct ce_remap *ce_remap = ab->hw_params.ce_remap;
++ 		/* ce register space is moved out of wcss unlike ipq8074 or ipq6018
++@@ -1177,10 +1181,6 @@ static int ath11k_ahb_probe(struct platf
++ 		}
++ 	}
++ 
++-	ret = ath11k_ahb_setup_resources(ab);
++-	if (ret)
++-		goto err_core_free;
++-
++ 	ret = ath11k_ahb_fw_resources_init(ab);
++ 	if (ret)
++ 		goto err_core_free;
+diff --git a/package/kernel/mac80211/patches/ath11k/0033-wifi-ath11k-Set-ext-passive-scan-flag-to-adjust-pass.patch b/package/kernel/mac80211/patches/ath11k/0033-wifi-ath11k-Set-ext-passive-scan-flag-to-adjust-pass.patch
+new file mode 100644
+index 0000000000..79b79e1053
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0033-wifi-ath11k-Set-ext-passive-scan-flag-to-adjust-pass.patch
+@@ -0,0 +1,73 @@
++From cf8f3d4deb02a8fdc806c46d4112b69868544697 Mon Sep 17 00:00:00 2001
++From: Tamizh Chelvam Raja <quic_tamizhr@quicinc.com>
++Date: Wed, 15 Feb 2023 20:31:36 +0200
++Subject: [PATCH] wifi: ath11k: Set ext passive scan flag to adjust passive
++ scan start time
++
++Set the WMI_SCAN_FLAG_EXT_PASSIVE_SCAN_START_TIME_ENHANCE flag
++while sending the scan command.  If this flag is enabled when the
++incoming scan request comes with a strict start time and its duration
++overlaps with next TBTT, then target adjust the start time accordingly
++for passive scan. Target supporting this feature will advertise
++WMI_TLV_SERVICE_PASSIVE_SCAN_START_TIME_ENHANCE.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-01467-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Tamizh Chelvam Raja <quic_tamizhr@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221222131720.11368-1-quic_tamizhr@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/wmi.c | 8 ++++++++
++ drivers/net/wireless/ath/ath11k/wmi.h | 3 +++
++ 2 files changed, 11 insertions(+)
++
++--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++++ b/drivers/net/wireless/ath/ath11k/wmi.c
++@@ -2068,6 +2068,12 @@ void ath11k_wmi_start_scan_init(struct a
++ 				  WMI_SCAN_EVENT_FOREIGN_CHAN |
++ 				  WMI_SCAN_EVENT_DEQUEUED;
++ 	arg->scan_flags |= WMI_SCAN_CHAN_STAT_EVENT;
+++
+++	if (test_bit(WMI_TLV_SERVICE_PASSIVE_SCAN_START_TIME_ENHANCE,
+++		     ar->ab->wmi_ab.svc_map))
+++		arg->scan_ctrl_flags_ext |=
+++			WMI_SCAN_FLAG_EXT_PASSIVE_SCAN_START_TIME_ENHANCE;
+++
++ 	arg->num_bssid = 1;
++ 
++ 	/* fill bssid_list[0] with 0xff, otherwise bssid and RA will be
++@@ -2149,6 +2155,8 @@ ath11k_wmi_copy_scan_event_cntrl_flags(s
++ 	/* for adaptive scan mode using 3 bits (21 - 23 bits) */
++ 	WMI_SCAN_SET_DWELL_MODE(cmd->scan_ctrl_flags,
++ 				param->adaptive_dwell_time_mode);
+++
+++	cmd->scan_ctrl_flags_ext = param->scan_ctrl_flags_ext;
++ }
++ 
++ int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar,
++--- a/drivers/net/wireless/ath/ath11k/wmi.h
+++++ b/drivers/net/wireless/ath/ath11k/wmi.h
++@@ -2093,6 +2093,7 @@ enum wmi_tlv_service {
++ 	WMI_TLV_SERVICE_EXT2_MSG = 220,
++ 	WMI_TLV_SERVICE_PEER_POWER_SAVE_DURATION_SUPPORT = 246,
++ 	WMI_TLV_SERVICE_SRG_SRP_SPATIAL_REUSE_SUPPORT = 249,
+++	WMI_TLV_SERVICE_PASSIVE_SCAN_START_TIME_ENHANCE = 263,
++ 
++ 	/* The second 128 bits */
++ 	WMI_MAX_EXT_SERVICE = 256,
++@@ -3223,6 +3224,7 @@ struct  wmi_start_scan_cmd {
++ 
++ #define WMI_SCAN_DWELL_MODE_MASK 0x00E00000
++ #define WMI_SCAN_DWELL_MODE_SHIFT        21
+++#define WMI_SCAN_FLAG_EXT_PASSIVE_SCAN_START_TIME_ENHANCE   0x00000800
++ 
++ enum {
++ 	WMI_SCAN_DWELL_MODE_DEFAULT      = 0,
++@@ -3270,6 +3272,7 @@ struct scan_req_params {
++ 		};
++ 		u32 scan_events;
++ 	};
+++	u32 scan_ctrl_flags_ext;
++ 	u32 dwell_time_active;
++ 	u32 dwell_time_active_2g;
++ 	u32 dwell_time_passive;
+diff --git a/package/kernel/mac80211/patches/ath11k/0034-wifi-ath11k-fix-return-value-check-in-ath11k_ahb_pro.patch b/package/kernel/mac80211/patches/ath11k/0034-wifi-ath11k-fix-return-value-check-in-ath11k_ahb_pro.patch
+new file mode 100644
+index 0000000000..59132913bd
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0034-wifi-ath11k-fix-return-value-check-in-ath11k_ahb_pro.patch
+@@ -0,0 +1,27 @@
++From 342fcde9d91460f01f65707e16368a1571271a3a Mon Sep 17 00:00:00 2001
++From: Yang Yingliang <yangyingliang@huawei.com>
++Date: Fri, 17 Feb 2023 11:00:31 +0800
++Subject: [PATCH] wifi: ath11k: fix return value check in ath11k_ahb_probe()
++
++ioremap() returns NULL pointer not PTR_ERR() when it fails,
++so replace the IS_ERR() check with NULL pointer check.
++
++Fixes: b42b3678c91f ("wifi: ath11k: remap ce register space for IPQ5018")
++Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230217030031.4021289-1-yangyingliang@huawei.com
++---
++ drivers/net/wireless/ath/ath11k/ahb.c | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/net/wireless/ath/ath11k/ahb.c
+++++ b/drivers/net/wireless/ath/ath11k/ahb.c
++@@ -1174,7 +1174,7 @@ static int ath11k_ahb_probe(struct platf
++ 		 * to a new space for accessing them.
++ 		 */
++ 		ab->mem_ce = ioremap(ce_remap->base, ce_remap->size);
++-		if (IS_ERR(ab->mem_ce)) {
+++		if (!ab->mem_ce) {
++ 			dev_err(&pdev->dev, "ce ioremap error\n");
++ 			ret = -ENOMEM;
++ 			goto err_core_free;
+diff --git a/package/kernel/mac80211/patches/ath11k/0035-wifi-ath11k-Use-platform_get_irq-to-get-the-interrup.patch b/package/kernel/mac80211/patches/ath11k/0035-wifi-ath11k-Use-platform_get_irq-to-get-the-interrup.patch
+new file mode 100644
+index 0000000000..93a9da8fc2
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0035-wifi-ath11k-Use-platform_get_irq-to-get-the-interrup.patch
+@@ -0,0 +1,50 @@
++From f117276638b7600b981b3fe28550823cfbe1ef23 Mon Sep 17 00:00:00 2001
++From: Douglas Anderson <dianders@chromium.org>
++Date: Wed, 1 Feb 2023 08:54:42 -0800
++Subject: [PATCH] wifi: ath11k: Use platform_get_irq() to get the interrupt
++
++As of commit a1a2b7125e10 ("of/platform: Drop static setup of IRQ
++resource from DT core"), we need to use platform_get_irq() instead of
++platform_get_resource() to get our IRQs because
++platform_get_resource() simply won't get them anymore.
++
++This was already fixed in several other Atheros WiFi drivers,
++apparently in response to Zeal Robot reports. An example of another
++fix is commit 9503a1fc123d ("ath9k: Use platform_get_irq() to get the
++interrupt"). ath11k seems to have been missed in this effort, though.
++
++Without this change, WiFi wasn't coming up on my Qualcomm sc7280-based
++hardware. Specifically, "platform_get_resource(pdev, IORESOURCE_IRQ,
++i)" was failing even for i=0.
++
++Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
++
++Fixes: a1a2b7125e10 ("of/platform: Drop static setup of IRQ resource from DT core")
++Fixes: 00402f49d26f ("ath11k: Add support for WCN6750 device")
++Signed-off-by: Douglas Anderson <dianders@chromium.org>
++Tested-by: Jun Yu <junyuu@chromium.org>
++Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230201084131.v2.1.I69cf3d56c97098287fe3a70084ee515098390b70@changeid
++---
++ drivers/net/wireless/ath/ath11k/ahb.c | 8 ++++----
++ 1 file changed, 4 insertions(+), 4 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/ahb.c
+++++ b/drivers/net/wireless/ath/ath11k/ahb.c
++@@ -874,11 +874,11 @@ static int ath11k_ahb_setup_msi_resource
++ 	ab->pci.msi.ep_base_data = int_prop + 32;
++ 
++ 	for (i = 0; i < ab->pci.msi.config->total_vectors; i++) {
++-		res = platform_get_resource(pdev, IORESOURCE_IRQ, i);
++-		if (!res)
++-			return -ENODEV;
+++		ret = platform_get_irq(pdev, i);
+++		if (ret < 0)
+++			return ret;
++ 
++-		ab->pci.msi.irqs[i] = res->start;
+++		ab->pci.msi.irqs[i] = ret;
++ 	}
++ 
++ 	set_bit(ATH11K_FLAG_MULTI_MSI_VECTORS, &ab->dev_flags);
+diff --git a/package/kernel/mac80211/patches/ath11k/0036-wifi-ath11k-fix-SAC-bug-on-peer-addition-with-sta-ba.patch b/package/kernel/mac80211/patches/ath11k/0036-wifi-ath11k-fix-SAC-bug-on-peer-addition-with-sta-ba.patch
+new file mode 100644
+index 0000000000..b37f070ba6
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0036-wifi-ath11k-fix-SAC-bug-on-peer-addition-with-sta-ba.patch
+@@ -0,0 +1,53 @@
++From 60b7d62ba8cdbd073997bff0f1cdae8d844002c0 Mon Sep 17 00:00:00 2001
++From: Christian Marangi <ansuelsmth@gmail.com>
++Date: Thu, 9 Feb 2023 23:26:22 +0100
++Subject: [PATCH] wifi: ath11k: fix SAC bug on peer addition with sta band
++ migration
++
++Fix sleep in atomic context warning detected by Smatch static checker
++analyzer.
++
++Following the locking pattern for peer_rhash_add lock tbl_mtx_lock mutex
++always even if sta is not transitioning to another band.
++This is peer_add function and a more secure locking should not cause
++performance regression.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.5.0.1-01208-QCAHKSWPL_SILICONZ-1
++
++Fixes: d673cb6fe6c0 ("wifi: ath11k: fix peer addition/deletion error on sta band migration")
++Reported-by: Dan Carpenter <error27@gmail.com>
++Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230209222622.1751-1-ansuelsmth@gmail.com
++---
++ drivers/net/wireless/ath/ath11k/peer.c | 5 +++--
++ 1 file changed, 3 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/peer.c
+++++ b/drivers/net/wireless/ath/ath11k/peer.c
++@@ -382,22 +382,23 @@ int ath11k_peer_create(struct ath11k *ar
++ 		return -ENOBUFS;
++ 	}
++ 
+++	mutex_lock(&ar->ab->tbl_mtx_lock);
++ 	spin_lock_bh(&ar->ab->base_lock);
++ 	peer = ath11k_peer_find_by_addr(ar->ab, param->peer_addr);
++ 	if (peer) {
++ 		if (peer->vdev_id == param->vdev_id) {
++ 			spin_unlock_bh(&ar->ab->base_lock);
+++			mutex_unlock(&ar->ab->tbl_mtx_lock);
++ 			return -EINVAL;
++ 		}
++ 
++ 		/* Assume sta is transitioning to another band.
++ 		 * Remove here the peer from rhash.
++ 		 */
++-		mutex_lock(&ar->ab->tbl_mtx_lock);
++ 		ath11k_peer_rhash_delete(ar->ab, peer);
++-		mutex_unlock(&ar->ab->tbl_mtx_lock);
++ 	}
++ 	spin_unlock_bh(&ar->ab->base_lock);
+++	mutex_unlock(&ar->ab->tbl_mtx_lock);
++ 
++ 	ret = ath11k_wmi_send_peer_create_cmd(ar, param);
++ 	if (ret) {
+diff --git a/package/kernel/mac80211/patches/ath11k/0037-wifi-ath11k-allow-system-suspend-to-survive-ath11k.patch b/package/kernel/mac80211/patches/ath11k/0037-wifi-ath11k-allow-system-suspend-to-survive-ath11k.patch
+new file mode 100644
+index 0000000000..fa680954e6
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0037-wifi-ath11k-allow-system-suspend-to-survive-ath11k.patch
+@@ -0,0 +1,43 @@
++From 7c15430822e71e90203d87e6d0cfe83fa058b0dc Mon Sep 17 00:00:00 2001
++From: Len Brown <len.brown@intel.com>
++Date: Wed, 1 Feb 2023 12:32:01 -0600
++Subject: [PATCH] wifi: ath11k: allow system suspend to survive ath11k
++
++When ath11k runs into internal errors upon suspend,
++it returns an error code to pci_pm_suspend, which
++aborts the entire system suspend.
++
++The driver should not abort system suspend, but should
++keep its internal errors to itself, and allow the system
++to suspend.  Otherwise, a user can suspend a laptop
++by closing the lid and sealing it into a case, assuming
++that is will suspend, rather than heating up and draining
++the battery when in transit.
++
++In practice, the ath11k device seems to have plenty of transient
++errors, and subsequent suspend cycles after this failure
++often succeed.
++
++https://bugzilla.kernel.org/show_bug.cgi?id=216968
++
++Fixes: d1b0c33850d29 ("ath11k: implement suspend for QCA6390 PCI devices")
++
++Signed-off-by: Len Brown <len.brown@intel.com>
++Cc: stable@vger.kernel.org
++Signed-off-by: Kalle Valo <kvalo@kernel.org>
++Link: https://lore.kernel.org/r/20230201183201.14431-1-len.brown@intel.com
++---
++ drivers/net/wireless/ath/ath11k/pci.c | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/net/wireless/ath/ath11k/pci.c
+++++ b/drivers/net/wireless/ath/ath11k/pci.c
++@@ -998,7 +998,7 @@ static __maybe_unused int ath11k_pci_pm_
++ 	if (ret)
++ 		ath11k_warn(ab, "failed to resume core: %d\n", ret);
++ 
++-	return ret;
+++	return 0;
++ }
++ 
++ static SIMPLE_DEV_PM_OPS(ath11k_pci_pm_ops,
+diff --git a/package/kernel/mac80211/patches/ath11k/0038-wifi-ath11k-modify-accessor-macros-to-match-index-si.patch b/package/kernel/mac80211/patches/ath11k/0038-wifi-ath11k-modify-accessor-macros-to-match-index-si.patch
+new file mode 100644
+index 0000000000..42bf170a03
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0038-wifi-ath11k-modify-accessor-macros-to-match-index-si.patch
+@@ -0,0 +1,61 @@
++From a96f10422e74cde27c100b321b127ec32ae75747 Mon Sep 17 00:00:00 2001
++From: Muna Sinada <quic_msinada@quicinc.com>
++Date: Fri, 24 Feb 2023 12:28:03 +0200
++Subject: [PATCH] wifi: ath11k: modify accessor macros to match index size
++
++HE PHY is only 11 bytes, therefore it should be using byte indexes
++instead of dword. Change corresponding macros to reflect this.
++
++Signed-off-by: Muna Sinada <quic_msinada@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/1666128501-12364-2-git-send-email-quic_msinada@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/wmi.h | 24 +++++++++++++-----------
++ 1 file changed, 13 insertions(+), 11 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/wmi.h
+++++ b/drivers/net/wireless/ath/ath11k/wmi.h
++@@ -2859,30 +2859,32 @@ struct rx_reorder_queue_remove_params {
++ #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
++ #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
++ 
++-#define HECAP_PHYDWORD_0	0
++-#define HECAP_PHYDWORD_1	1
++-#define HECAP_PHYDWORD_2	2
+++#define HE_PHYCAP_BYTE_0	0
+++#define HE_PHYCAP_BYTE_1	1
+++#define HE_PHYCAP_BYTE_2	2
+++#define HE_PHYCAP_BYTE_3	3
+++#define HE_PHYCAP_BYTE_4	4
++ 
++-#define HECAP_PHY_SU_BFER		BIT(31)
+++#define HECAP_PHY_SU_BFER		BIT(7)
++ #define HECAP_PHY_SU_BFEE		BIT(0)
++ #define HECAP_PHY_MU_BFER		BIT(1)
++-#define HECAP_PHY_UL_MUMIMO		BIT(22)
++-#define HECAP_PHY_UL_MUOFDMA		BIT(23)
+++#define HECAP_PHY_UL_MUMIMO		BIT(6)
+++#define HECAP_PHY_UL_MUOFDMA		BIT(7)
++ 
++ #define HECAP_PHY_SUBFMR_GET(hecap_phy) \
++-	FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HECAP_PHYDWORD_0])
+++	FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HE_PHYCAP_BYTE_3])
++ 
++ #define HECAP_PHY_SUBFME_GET(hecap_phy) \
++-	FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HECAP_PHYDWORD_1])
+++	FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HE_PHYCAP_BYTE_4])
++ 
++ #define HECAP_PHY_MUBFMR_GET(hecap_phy) \
++-	FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HECAP_PHYDWORD_1])
+++	FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HE_PHYCAP_BYTE_4])
++ 
++ #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \
++-	FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HECAP_PHYDWORD_0])
+++	FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HE_PHYCAP_BYTE_2])
++ 
++ #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \
++-	FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HECAP_PHYDWORD_0])
+++	FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HE_PHYCAP_BYTE_2])
++ 
++ #define HE_MODE_SU_TX_BFEE	BIT(0)
++ #define HE_MODE_SU_TX_BFER	BIT(1)
+diff --git a/package/kernel/mac80211/patches/ath11k/0039-wifi-ath11k-push-MU-MIMO-params-from-hostapd-to-hard.patch b/package/kernel/mac80211/patches/ath11k/0039-wifi-ath11k-push-MU-MIMO-params-from-hostapd-to-hard.patch
+new file mode 100644
+index 0000000000..298ce1a612
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0039-wifi-ath11k-push-MU-MIMO-params-from-hostapd-to-hard.patch
+@@ -0,0 +1,300 @@
++From 38dfe775d0abf511341f37c1cb77b919a3ad410b Mon Sep 17 00:00:00 2001
++From: Muna Sinada <quic_msinada@quicinc.com>
++Date: Fri, 24 Feb 2023 12:28:04 +0200
++Subject: [PATCH] wifi: ath11k: push MU-MIMO params from hostapd to hardware
++
++In the previous behaviour only HE IE in management frames are changed
++regarding MU-MIMO configurations and not in hardware. Adding push of
++MU-MIMO configurations to the hardware as well.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00356-QCAHKSWPL_SILICONZ-1
++
++Co-developed-by: Anilkumar Kolli <quic_akolli@quicinc.com>
++Signed-off-by: Anilkumar Kolli <quic_akolli@quicinc.com>
++Signed-off-by: Muna Sinada <quic_msinada@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/1666128501-12364-3-git-send-email-quic_msinada@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 200 ++++++++++++++++----------
++ drivers/net/wireless/ath/ath11k/wmi.h |   3 +
++ 2 files changed, 130 insertions(+), 73 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -2699,6 +2699,117 @@ static int ath11k_setup_peer_smps(struct
++ 					 ath11k_smps_map[smps]);
++ }
++ 
+++static bool ath11k_mac_set_he_txbf_conf(struct ath11k_vif *arvif)
+++{
+++	struct ath11k *ar = arvif->ar;
+++	u32 param, value;
+++	int ret;
+++
+++	if (!arvif->vif->bss_conf.he_support)
+++		return true;
+++
+++	param = WMI_VDEV_PARAM_SET_HEMU_MODE;
+++	value = 0;
+++	if (arvif->vif->bss_conf.he_su_beamformer) {
+++		value |= FIELD_PREP(HE_MODE_SU_TX_BFER, HE_SU_BFER_ENABLE);
+++		if (arvif->vif->bss_conf.he_mu_beamformer &&
+++		    arvif->vdev_type == WMI_VDEV_TYPE_AP)
+++			value |= FIELD_PREP(HE_MODE_MU_TX_BFER, HE_MU_BFER_ENABLE);
+++	}
+++
+++	if (arvif->vif->type != NL80211_IFTYPE_MESH_POINT) {
+++		value |= FIELD_PREP(HE_MODE_DL_OFDMA, HE_DL_MUOFDMA_ENABLE) |
+++			 FIELD_PREP(HE_MODE_UL_OFDMA, HE_UL_MUOFDMA_ENABLE);
+++
+++		if (arvif->vif->bss_conf.he_full_ul_mumimo)
+++			value |= FIELD_PREP(HE_MODE_UL_MUMIMO, HE_UL_MUMIMO_ENABLE);
+++
+++		if (arvif->vif->bss_conf.he_su_beamformee)
+++			value |= FIELD_PREP(HE_MODE_SU_TX_BFEE, HE_SU_BFEE_ENABLE);
+++	}
+++
+++	ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id, param, value);
+++	if (ret) {
+++		ath11k_warn(ar->ab, "failed to set vdev %d HE MU mode: %d\n",
+++			    arvif->vdev_id, ret);
+++		return false;
+++	}
+++
+++	param = WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE;
+++	value =	FIELD_PREP(HE_VHT_SOUNDING_MODE, HE_VHT_SOUNDING_MODE_ENABLE) |
+++		FIELD_PREP(HE_TRIG_NONTRIG_SOUNDING_MODE,
+++			   HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE);
+++	ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id,
+++					    param, value);
+++	if (ret) {
+++		ath11k_warn(ar->ab, "failed to set vdev %d sounding mode: %d\n",
+++			    arvif->vdev_id, ret);
+++		return false;
+++	}
+++	return true;
+++}
+++
+++static bool ath11k_mac_vif_recalc_sta_he_txbf(struct ath11k *ar,
+++					      struct ieee80211_vif *vif,
+++					      struct ieee80211_sta_he_cap *he_cap)
+++{
+++	struct ath11k_vif *arvif = (void *)vif->drv_priv;
+++	struct ieee80211_he_cap_elem he_cap_elem = {0};
+++	struct ieee80211_sta_he_cap *cap_band = NULL;
+++	struct cfg80211_chan_def def;
+++	u32 param = WMI_VDEV_PARAM_SET_HEMU_MODE;
+++	u32 hemode = 0;
+++	int ret;
+++
+++	if (!vif->bss_conf.he_support)
+++		return true;
+++
+++	if (vif->type != NL80211_IFTYPE_STATION)
+++		return false;
+++
+++	if (WARN_ON(ath11k_mac_vif_chan(vif, &def)))
+++		return false;
+++
+++	if (def.chan->band == NL80211_BAND_2GHZ)
+++		cap_band = &ar->mac.iftype[NL80211_BAND_2GHZ][vif->type].he_cap;
+++	else
+++		cap_band = &ar->mac.iftype[NL80211_BAND_5GHZ][vif->type].he_cap;
+++
+++	memcpy(&he_cap_elem, &cap_band->he_cap_elem, sizeof(he_cap_elem));
+++
+++	if (HECAP_PHY_SUBFME_GET(he_cap_elem.phy_cap_info)) {
+++		if (HECAP_PHY_SUBFMR_GET(he_cap->he_cap_elem.phy_cap_info))
+++			hemode |= FIELD_PREP(HE_MODE_SU_TX_BFEE, HE_SU_BFEE_ENABLE);
+++		if (HECAP_PHY_MUBFMR_GET(he_cap->he_cap_elem.phy_cap_info))
+++			hemode |= FIELD_PREP(HE_MODE_MU_TX_BFEE, HE_MU_BFEE_ENABLE);
+++	}
+++
+++	if (vif->type != NL80211_IFTYPE_MESH_POINT) {
+++		hemode |= FIELD_PREP(HE_MODE_DL_OFDMA, HE_DL_MUOFDMA_ENABLE) |
+++			  FIELD_PREP(HE_MODE_UL_OFDMA, HE_UL_MUOFDMA_ENABLE);
+++
+++		if (HECAP_PHY_ULMUMIMO_GET(he_cap_elem.phy_cap_info))
+++			if (HECAP_PHY_ULMUMIMO_GET(he_cap->he_cap_elem.phy_cap_info))
+++				hemode |= FIELD_PREP(HE_MODE_UL_MUMIMO,
+++						     HE_UL_MUMIMO_ENABLE);
+++
+++		if (FIELD_GET(HE_MODE_MU_TX_BFEE, hemode))
+++			hemode |= FIELD_PREP(HE_MODE_SU_TX_BFEE, HE_SU_BFEE_ENABLE);
+++
+++		if (FIELD_GET(HE_MODE_MU_TX_BFER, hemode))
+++			hemode |= FIELD_PREP(HE_MODE_SU_TX_BFER, HE_SU_BFER_ENABLE);
+++	}
+++
+++	ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id, param, hemode);
+++	if (ret) {
+++		ath11k_warn(ar->ab, "failed to submit vdev param txbf 0x%x: %d\n",
+++			    hemode, ret);
+++		return false;
+++	}
+++
+++	return true;
+++}
+++
++ static void ath11k_bss_assoc(struct ieee80211_hw *hw,
++ 			     struct ieee80211_vif *vif,
++ 			     struct ieee80211_bss_conf *bss_conf)
++@@ -2709,6 +2820,7 @@ static void ath11k_bss_assoc(struct ieee
++ 	struct ieee80211_sta *ap_sta;
++ 	struct ath11k_peer *peer;
++ 	bool is_auth = false;
+++	struct ieee80211_sta_he_cap  he_cap;
++ 	int ret;
++ 
++ 	lockdep_assert_held(&ar->conf_mutex);
++@@ -2726,6 +2838,9 @@ static void ath11k_bss_assoc(struct ieee
++ 		return;
++ 	}
++ 
+++	/* he_cap here is updated at assoc success for sta mode only */
+++	he_cap  = ap_sta->deflink.he_cap;
+++
++ 	ath11k_peer_assoc_prepare(ar, vif, ap_sta, &peer_arg, false);
++ 
++ 	rcu_read_unlock();
++@@ -2753,6 +2868,12 @@ static void ath11k_bss_assoc(struct ieee
++ 		return;
++ 	}
++ 
+++	if (!ath11k_mac_vif_recalc_sta_he_txbf(ar, vif, &he_cap)) {
+++		ath11k_warn(ar->ab, "failed to recalc he txbf for vdev %i on bss %pM\n",
+++			    arvif->vdev_id, bss_conf->bssid);
+++		return;
+++	}
+++
++ 	WARN_ON(arvif->is_up);
++ 
++ 	arvif->aid = vif->cfg.aid;
++@@ -3202,6 +3323,8 @@ static void ath11k_mac_op_bss_info_chang
++ 		ether_addr_copy(arvif->bssid, info->bssid);
++ 
++ 	if (changed & BSS_CHANGED_BEACON_ENABLED) {
+++		if (info->enable_beacon)
+++			ath11k_mac_set_he_txbf_conf(arvif);
++ 		ath11k_control_beaconing(arvif, info);
++ 
++ 		if (arvif->is_up && vif->bss_conf.he_support &&
++@@ -5392,6 +5515,10 @@ static int ath11k_mac_copy_he_cap(struct
++ 
++ 		he_cap_elem->mac_cap_info[1] &=
++ 			IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_MASK;
+++		he_cap_elem->phy_cap_info[0] &=
+++			~IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
+++		he_cap_elem->phy_cap_info[0] &=
+++			~IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G;
++ 
++ 		he_cap_elem->phy_cap_info[5] &=
++ 			~IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK;
++@@ -6026,69 +6153,6 @@ ath11k_mac_setup_vdev_create_params(stru
++ 	}
++ }
++ 
++-static u32
++-ath11k_mac_prepare_he_mode(struct ath11k_pdev *pdev, u32 viftype)
++-{
++-	struct ath11k_pdev_cap *pdev_cap = &pdev->cap;
++-	struct ath11k_band_cap *cap_band = NULL;
++-	u32 *hecap_phy_ptr = NULL;
++-	u32 hemode = 0;
++-
++-	if (pdev->cap.supported_bands & WMI_HOST_WLAN_2G_CAP)
++-		cap_band = &pdev_cap->band[NL80211_BAND_2GHZ];
++-	else
++-		cap_band = &pdev_cap->band[NL80211_BAND_5GHZ];
++-
++-	hecap_phy_ptr = &cap_band->he_cap_phy_info[0];
++-
++-	hemode = FIELD_PREP(HE_MODE_SU_TX_BFEE, HE_SU_BFEE_ENABLE) |
++-		 FIELD_PREP(HE_MODE_SU_TX_BFER, HECAP_PHY_SUBFMR_GET(hecap_phy_ptr)) |
++-		 FIELD_PREP(HE_MODE_UL_MUMIMO, HECAP_PHY_ULMUMIMO_GET(hecap_phy_ptr));
++-
++-	/* TODO WDS and other modes */
++-	if (viftype == NL80211_IFTYPE_AP) {
++-		hemode |= FIELD_PREP(HE_MODE_MU_TX_BFER,
++-			  HECAP_PHY_MUBFMR_GET(hecap_phy_ptr)) |
++-			  FIELD_PREP(HE_MODE_DL_OFDMA, HE_DL_MUOFDMA_ENABLE) |
++-			  FIELD_PREP(HE_MODE_UL_OFDMA, HE_UL_MUOFDMA_ENABLE);
++-	} else {
++-		hemode |= FIELD_PREP(HE_MODE_MU_TX_BFEE, HE_MU_BFEE_ENABLE);
++-	}
++-
++-	return hemode;
++-}
++-
++-static int ath11k_set_he_mu_sounding_mode(struct ath11k *ar,
++-					  struct ath11k_vif *arvif)
++-{
++-	u32 param_id, param_value;
++-	struct ath11k_base *ab = ar->ab;
++-	int ret = 0;
++-
++-	param_id = WMI_VDEV_PARAM_SET_HEMU_MODE;
++-	param_value = ath11k_mac_prepare_he_mode(ar->pdev, arvif->vif->type);
++-	ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id,
++-					    param_id, param_value);
++-	if (ret) {
++-		ath11k_warn(ab, "failed to set vdev %d HE MU mode: %d param_value %x\n",
++-			    arvif->vdev_id, ret, param_value);
++-		return ret;
++-	}
++-	param_id = WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE;
++-	param_value =
++-		FIELD_PREP(HE_VHT_SOUNDING_MODE, HE_VHT_SOUNDING_MODE_ENABLE) |
++-		FIELD_PREP(HE_TRIG_NONTRIG_SOUNDING_MODE,
++-			   HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE);
++-	ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id,
++-					    param_id, param_value);
++-	if (ret) {
++-		ath11k_warn(ab, "failed to set vdev %d HE MU mode: %d\n",
++-			    arvif->vdev_id, ret);
++-		return ret;
++-	}
++-	return ret;
++-}
++-
++ static void ath11k_mac_op_update_vif_offload(struct ieee80211_hw *hw,
++ 					     struct ieee80211_vif *vif)
++ {
++@@ -6757,7 +6821,6 @@ ath11k_mac_vdev_start_restart(struct ath
++ 	struct ath11k_base *ab = ar->ab;
++ 	struct wmi_vdev_start_req_arg arg = {};
++ 	const struct cfg80211_chan_def *chandef = &ctx->def;
++-	int he_support = arvif->vif->bss_conf.he_support;
++ 	int ret = 0;
++ 
++ 	lockdep_assert_held(&ar->conf_mutex);
++@@ -6798,15 +6861,6 @@ ath11k_mac_vdev_start_restart(struct ath
++ 		spin_lock_bh(&ab->base_lock);
++ 		arg.regdomain = ar->ab->dfs_region;
++ 		spin_unlock_bh(&ab->base_lock);
++-
++-		if (he_support) {
++-			ret = ath11k_set_he_mu_sounding_mode(ar, arvif);
++-			if (ret) {
++-				ath11k_warn(ar->ab, "failed to set he mode vdev %i\n",
++-					    arg.vdev_id);
++-				return ret;
++-			}
++-		}
++ 	}
++ 
++ 	arg.channel.passive |= !!(chandef->chan->flags & IEEE80211_CHAN_NO_IR);
++--- a/drivers/net/wireless/ath/ath11k/wmi.h
+++++ b/drivers/net/wireless/ath/ath11k/wmi.h
++@@ -2897,8 +2897,11 @@ struct rx_reorder_queue_remove_params {
++ #define HE_DL_MUOFDMA_ENABLE	1
++ #define HE_UL_MUOFDMA_ENABLE	1
++ #define HE_DL_MUMIMO_ENABLE	1
+++#define HE_UL_MUMIMO_ENABLE	1
++ #define HE_MU_BFEE_ENABLE	1
++ #define HE_SU_BFEE_ENABLE	1
+++#define HE_MU_BFER_ENABLE	1
+++#define HE_SU_BFER_ENABLE	1
++ 
++ #define HE_VHT_SOUNDING_MODE_ENABLE		1
++ #define HE_SU_MU_SOUNDING_MODE_ENABLE		1
+diff --git a/package/kernel/mac80211/patches/ath11k/0040-wifi-ath11k-move-HE-MCS-mapper-to-a-separate-functio.patch b/package/kernel/mac80211/patches/ath11k/0040-wifi-ath11k-move-HE-MCS-mapper-to-a-separate-functio.patch
+new file mode 100644
+index 0000000000..6bc9880e10
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0040-wifi-ath11k-move-HE-MCS-mapper-to-a-separate-functio.patch
+@@ -0,0 +1,67 @@
++From 8077c1bbbc28e527fb29143c46f32c6a9d6cadf0 Mon Sep 17 00:00:00 2001
++From: Muna Sinada <quic_msinada@quicinc.com>
++Date: Fri, 24 Feb 2023 12:28:04 +0200
++Subject: [PATCH] wifi: ath11k: move HE MCS mapper to a separate function
++
++Move HE MCS mapper to a separate function and call new function
++in ath11k_mac_copy_he_cap().
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00356-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Muna Sinada <quic_msinada@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/1666128501-12364-4-git-send-email-quic_msinada@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 34 +++++++++++++++++----------
++ 1 file changed, 22 insertions(+), 12 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -5483,6 +5483,27 @@ static __le16 ath11k_mac_setup_he_6ghz_c
++ 	return cpu_to_le16(bcap->he_6ghz_capa);
++ }
++ 
+++static void ath11k_mac_set_hemcsmap(struct ath11k *ar,
+++				    struct ath11k_pdev_cap *cap,
+++				    struct ieee80211_sta_he_cap *he_cap,
+++				    int band)
+++{
+++	struct ath11k_band_cap *band_cap = &cap->band[band];
+++
+++	he_cap->he_mcs_nss_supp.rx_mcs_80 =
+++		cpu_to_le16(band_cap->he_mcs & 0xffff);
+++	he_cap->he_mcs_nss_supp.tx_mcs_80 =
+++		cpu_to_le16(band_cap->he_mcs & 0xffff);
+++	he_cap->he_mcs_nss_supp.rx_mcs_160 =
+++		cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+++	he_cap->he_mcs_nss_supp.tx_mcs_160 =
+++		cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+++	he_cap->he_mcs_nss_supp.rx_mcs_80p80 =
+++		cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+++	he_cap->he_mcs_nss_supp.tx_mcs_80p80 =
+++		cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+++}
+++
++ static int ath11k_mac_copy_he_cap(struct ath11k *ar,
++ 				  struct ath11k_pdev_cap *cap,
++ 				  struct ieee80211_sband_iftype_data *data,
++@@ -5544,18 +5565,7 @@ static int ath11k_mac_copy_he_cap(struct
++ 			break;
++ 		}
++ 
++-		he_cap->he_mcs_nss_supp.rx_mcs_80 =
++-			cpu_to_le16(band_cap->he_mcs & 0xffff);
++-		he_cap->he_mcs_nss_supp.tx_mcs_80 =
++-			cpu_to_le16(band_cap->he_mcs & 0xffff);
++-		he_cap->he_mcs_nss_supp.rx_mcs_160 =
++-			cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
++-		he_cap->he_mcs_nss_supp.tx_mcs_160 =
++-			cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
++-		he_cap->he_mcs_nss_supp.rx_mcs_80p80 =
++-			cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
++-		he_cap->he_mcs_nss_supp.tx_mcs_80p80 =
++-			cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+++		ath11k_mac_set_hemcsmap(ar, cap, he_cap, band);
++ 
++ 		memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres));
++ 		if (he_cap_elem->phy_cap_info[6] &
+diff --git a/package/kernel/mac80211/patches/ath11k/0041-wifi-ath11k-generate-rx-and-tx-mcs-maps-for-supporte.patch b/package/kernel/mac80211/patches/ath11k/0041-wifi-ath11k-generate-rx-and-tx-mcs-maps-for-supporte.patch
+new file mode 100644
+index 0000000000..5cb7801b29
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0041-wifi-ath11k-generate-rx-and-tx-mcs-maps-for-supporte.patch
+@@ -0,0 +1,64 @@
++From ebf82988f844dd98e6b007cffcc5e95986056995 Mon Sep 17 00:00:00 2001
++From: Muna Sinada <quic_msinada@quicinc.com>
++Date: Fri, 24 Feb 2023 12:28:04 +0200
++Subject: [PATCH] wifi: ath11k: generate rx and tx mcs maps for supported HE
++ mcs
++
++Generate rx and tx mcs maps in ath11k_mac_set_hemcsmap() and set them
++in supported mcs/nss for HE capabilities.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00356-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Muna Sinada <quic_msinada@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/1666128501-12364-5-git-send-email-quic_msinada@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 30 ++++++++++++++++++++-------
++ 1 file changed, 23 insertions(+), 7 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -5488,20 +5488,36 @@ static void ath11k_mac_set_hemcsmap(stru
++ 				    struct ieee80211_sta_he_cap *he_cap,
++ 				    int band)
++ {
++-	struct ath11k_band_cap *band_cap = &cap->band[band];
+++	u16 txmcs_map, rxmcs_map;
+++	u32 i;
++ 
+++	rxmcs_map = 0;
+++	txmcs_map = 0;
+++	for (i = 0; i < 8; i++) {
+++		if (i < ar->num_tx_chains &&
+++		    (ar->cfg_tx_chainmask >> cap->tx_chain_mask_shift) & BIT(i))
+++			txmcs_map |= IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2);
+++		else
+++			txmcs_map |= IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2);
+++
+++		if (i < ar->num_rx_chains &&
+++		    (ar->cfg_rx_chainmask >> cap->tx_chain_mask_shift) & BIT(i))
+++			rxmcs_map |= IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2);
+++		else
+++			rxmcs_map |= IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2);
+++	}
++ 	he_cap->he_mcs_nss_supp.rx_mcs_80 =
++-		cpu_to_le16(band_cap->he_mcs & 0xffff);
+++		cpu_to_le16(rxmcs_map & 0xffff);
++ 	he_cap->he_mcs_nss_supp.tx_mcs_80 =
++-		cpu_to_le16(band_cap->he_mcs & 0xffff);
+++		cpu_to_le16(txmcs_map & 0xffff);
++ 	he_cap->he_mcs_nss_supp.rx_mcs_160 =
++-		cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+++		cpu_to_le16(rxmcs_map & 0xffff);
++ 	he_cap->he_mcs_nss_supp.tx_mcs_160 =
++-		cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+++		cpu_to_le16(txmcs_map & 0xffff);
++ 	he_cap->he_mcs_nss_supp.rx_mcs_80p80 =
++-		cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+++		cpu_to_le16(rxmcs_map & 0xffff);
++ 	he_cap->he_mcs_nss_supp.tx_mcs_80p80 =
++-		cpu_to_le16((band_cap->he_mcs >> 16) & 0xffff);
+++		cpu_to_le16(txmcs_map & 0xffff);
++ }
++ 
++ static int ath11k_mac_copy_he_cap(struct ath11k *ar,
+diff --git a/package/kernel/mac80211/patches/ath11k/0042-wifi-ath11k-Add-tx-ack-signal-support-for-management.patch b/package/kernel/mac80211/patches/ath11k/0042-wifi-ath11k-Add-tx-ack-signal-support-for-management.patch
+new file mode 100644
+index 0000000000..8d41657311
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0042-wifi-ath11k-Add-tx-ack-signal-support-for-management.patch
+@@ -0,0 +1,150 @@
++From 01c6c9fccbd51c1d9eab0f5794b0271b026178df Mon Sep 17 00:00:00 2001
++From: Abinaya Kalaiselvan <quic_akalaise@quicinc.com>
++Date: Mon, 19 Dec 2022 11:08:44 +0530
++Subject: [PATCH] wifi: ath11k: Add tx ack signal support for management
++ packets
++
++Add support to notify tx ack signal values for management
++packets to userspace through nl80211 interface.
++
++Advertise NL80211_EXT_FEATURE_ACK_SIGNAL_SUPPORT flag
++to enable this feature and it will be used for data
++packets as well.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Abinaya Kalaiselvan <quic_akalaise@quicinc.com>
++Signed-off-by: Maharaja Kennadyrajan <quic_mkenna@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20221219053844.4084486-1-quic_mkenna@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/hw.c  |  1 +
++ drivers/net/wireless/ath/ath11k/mac.c |  5 +++++
++ drivers/net/wireless/ath/ath11k/wmi.c | 27 ++++++++++++++++-----------
++ drivers/net/wireless/ath/ath11k/wmi.h |  3 +++
++ 4 files changed, 25 insertions(+), 11 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/hw.c
+++++ b/drivers/net/wireless/ath/ath11k/hw.c
++@@ -201,6 +201,7 @@ static void ath11k_init_wmi_config_ipq80
++ 	config->twt_ap_pdev_count = ab->num_radios;
++ 	config->twt_ap_sta_count = 1000;
++ 	config->flag1 |= WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64;
+++	config->flag1 |= WMI_RSRC_CFG_FLAG1_ACK_RSSI;
++ }
++ 
++ static int ath11k_hw_mac_id_to_pdev_id_ipq8074(struct ath11k_hw_params *hw,
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -9174,6 +9174,11 @@ static int __ath11k_mac_register(struct
++ 		goto err_free_if_combs;
++ 	}
++ 
+++	if (test_bit(WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI,
+++		     ar->ab->wmi_ab.svc_map))
+++		wiphy_ext_feature_set(ar->hw->wiphy,
+++				      NL80211_EXT_FEATURE_ACK_SIGNAL_SUPPORT);
+++
++ 	ar->hw->queues = ATH11K_HW_MAX_QUEUES;
++ 	ar->hw->wiphy->tx_queue_len = ATH11K_QUEUE_LEN;
++ 	ar->hw->offchannel_tx_hw_queue = ATH11K_HW_MAX_QUEUES - 1;
++--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++++ b/drivers/net/wireless/ath/ath11k/wmi.c
++@@ -5229,8 +5229,8 @@ static int ath11k_pull_mgmt_rx_params_tl
++ 	return 0;
++ }
++ 
++-static int wmi_process_mgmt_tx_comp(struct ath11k *ar, u32 desc_id,
++-				    u32 status)
+++static int wmi_process_mgmt_tx_comp(struct ath11k *ar,
+++				    struct wmi_mgmt_tx_compl_event *tx_compl_param)
++ {
++ 	struct sk_buff *msdu;
++ 	struct ieee80211_tx_info *info;
++@@ -5238,24 +5238,29 @@ static int wmi_process_mgmt_tx_comp(stru
++ 	int num_mgmt;
++ 
++ 	spin_lock_bh(&ar->txmgmt_idr_lock);
++-	msdu = idr_find(&ar->txmgmt_idr, desc_id);
+++	msdu = idr_find(&ar->txmgmt_idr, tx_compl_param->desc_id);
++ 
++ 	if (!msdu) {
++ 		ath11k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n",
++-			    desc_id);
+++			    tx_compl_param->desc_id);
++ 		spin_unlock_bh(&ar->txmgmt_idr_lock);
++ 		return -ENOENT;
++ 	}
++ 
++-	idr_remove(&ar->txmgmt_idr, desc_id);
+++	idr_remove(&ar->txmgmt_idr, tx_compl_param->desc_id);
++ 	spin_unlock_bh(&ar->txmgmt_idr_lock);
++ 
++ 	skb_cb = ATH11K_SKB_CB(msdu);
++ 	dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
++ 
++ 	info = IEEE80211_SKB_CB(msdu);
++-	if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status)
+++	if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) &&
+++	    !tx_compl_param->status) {
++ 		info->flags |= IEEE80211_TX_STAT_ACK;
+++		if (test_bit(WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI,
+++			     ar->ab->wmi_ab.svc_map))
+++			info->status.ack_signal = tx_compl_param->ack_rssi;
+++	}
++ 
++ 	ieee80211_tx_status_irqsafe(ar->hw, msdu);
++ 
++@@ -5267,7 +5272,7 @@ static int wmi_process_mgmt_tx_comp(stru
++ 
++ 	ath11k_dbg(ar->ab, ATH11K_DBG_WMI,
++ 		   "wmi mgmt tx comp pending %d desc id %d\n",
++-		   num_mgmt, desc_id);
+++		   num_mgmt, tx_compl_param->desc_id);
++ 
++ 	if (!num_mgmt)
++ 		wake_up(&ar->txmgmt_empty_waitq);
++@@ -5300,6 +5305,7 @@ static int ath11k_pull_mgmt_tx_compl_par
++ 	param->pdev_id = ev->pdev_id;
++ 	param->desc_id = ev->desc_id;
++ 	param->status = ev->status;
+++	param->ack_rssi = ev->ack_rssi;
++ 
++ 	kfree(tb);
++ 	return 0;
++@@ -7070,13 +7076,12 @@ static void ath11k_mgmt_tx_compl_event(s
++ 		goto exit;
++ 	}
++ 
++-	wmi_process_mgmt_tx_comp(ar, tx_compl_param.desc_id,
++-				 tx_compl_param.status);
+++	wmi_process_mgmt_tx_comp(ar, &tx_compl_param);
++ 
++ 	ath11k_dbg(ab, ATH11K_DBG_MGMT,
++-		   "mgmt tx compl ev pdev_id %d, desc_id %d, status %d",
+++		   "mgmt tx compl ev pdev_id %d, desc_id %d, status %d ack_rssi %d",
++ 		   tx_compl_param.pdev_id, tx_compl_param.desc_id,
++-		   tx_compl_param.status);
+++		   tx_compl_param.status, tx_compl_param.ack_rssi);
++ 
++ exit:
++ 	rcu_read_unlock();
++--- a/drivers/net/wireless/ath/ath11k/wmi.h
+++++ b/drivers/net/wireless/ath/ath11k/wmi.h
++@@ -2311,6 +2311,7 @@ struct wmi_init_cmd {
++ } __packed;
++ 
++ #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5)
+++#define WMI_RSRC_CFG_FLAG1_ACK_RSSI BIT(18)
++ 
++ struct wmi_resource_config {
++ 	u32 tlv_header;
++@@ -4550,6 +4551,8 @@ struct wmi_mgmt_tx_compl_event {
++ 	u32 desc_id;
++ 	u32 status;
++ 	u32 pdev_id;
+++	u32 ppdu_id;
+++	u32 ack_rssi;
++ } __packed;
++ 
++ struct wmi_scan_event {
+diff --git a/package/kernel/mac80211/patches/ath11k/0043-wifi-ath11k-use-proper-regulatory-reference-for-band.patch b/package/kernel/mac80211/patches/ath11k/0043-wifi-ath11k-use-proper-regulatory-reference-for-band.patch
+new file mode 100644
+index 0000000000..5bc195528e
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0043-wifi-ath11k-use-proper-regulatory-reference-for-band.patch
+@@ -0,0 +1,216 @@
++From 25e289e1f52e1f4fb1d07622c6a24f8d8a8e420d Mon Sep 17 00:00:00 2001
++From: Aditya Kumar Singh <quic_adisi@quicinc.com>
++Date: Wed, 1 Mar 2023 16:20:58 +0200
++Subject: [PATCH] wifi: ath11k: use proper regulatory reference for bands
++
++Currently, during regulatory event, 2 GHz/5 GHz is referred
++to as 2G/5G including variable names. However, there is no
++such entity as 2G or 5G.
++
++Re-name such occurences to its proper name. No functional changes.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230110121024.14051-2-quic_adisi@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/reg.c | 20 ++++-----
++ drivers/net/wireless/ath/ath11k/wmi.c | 58 ++++++++++++++-------------
++ drivers/net/wireless/ath/ath11k/wmi.h | 28 ++++++-------
++ 3 files changed, 54 insertions(+), 52 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/reg.c
+++++ b/drivers/net/wireless/ath/ath11k/reg.c
++@@ -619,7 +619,7 @@ ath11k_reg_build_regd(struct ath11k_base
++ 	u32 flags;
++ 	char alpha2[3];
++ 
++-	num_rules = reg_info->num_5g_reg_rules + reg_info->num_2g_reg_rules;
+++	num_rules = reg_info->num_5ghz_reg_rules + reg_info->num_2ghz_reg_rules;
++ 
++ 	if (!num_rules)
++ 		goto ret;
++@@ -644,20 +644,20 @@ ath11k_reg_build_regd(struct ath11k_base
++ 		   alpha2, ath11k_reg_get_regdom_str(tmp_regd->dfs_region),
++ 		   reg_info->dfs_region, num_rules);
++ 	/* Update reg_rules[] below. Firmware is expected to
++-	 * send these rules in order(2G rules first and then 5G)
+++	 * send these rules in order(2 GHz rules first and then 5 GHz)
++ 	 */
++ 	for (; i < num_rules; i++) {
++-		if (reg_info->num_2g_reg_rules &&
++-		    (i < reg_info->num_2g_reg_rules)) {
++-			reg_rule = reg_info->reg_rules_2g_ptr + i;
+++		if (reg_info->num_2ghz_reg_rules &&
+++		    (i < reg_info->num_2ghz_reg_rules)) {
+++			reg_rule = reg_info->reg_rules_2ghz_ptr + i;
++ 			max_bw = min_t(u16, reg_rule->max_bw,
++-				       reg_info->max_bw_2g);
+++				       reg_info->max_bw_2ghz);
++ 			flags = 0;
++-		} else if (reg_info->num_5g_reg_rules &&
++-			   (j < reg_info->num_5g_reg_rules)) {
++-			reg_rule = reg_info->reg_rules_5g_ptr + j++;
+++		} else if (reg_info->num_5ghz_reg_rules &&
+++			   (j < reg_info->num_5ghz_reg_rules)) {
+++			reg_rule = reg_info->reg_rules_5ghz_ptr + j++;
++ 			max_bw = min_t(u16, reg_rule->max_bw,
++-				       reg_info->max_bw_5g);
+++				       reg_info->max_bw_5ghz);
++ 
++ 			/* FW doesn't pass NL80211_RRF_AUTO_BW flag for
++ 			 * BW Auto correction, we can enable this by default
++--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++++ b/drivers/net/wireless/ath/ath11k/wmi.c
++@@ -4959,7 +4959,7 @@ static int ath11k_pull_reg_chan_list_upd
++ 	const void **tb;
++ 	const struct wmi_reg_chan_list_cc_event *chan_list_event_hdr;
++ 	struct wmi_regulatory_rule_struct *wmi_reg_rule;
++-	u32 num_2g_reg_rules, num_5g_reg_rules;
+++	u32 num_2ghz_reg_rules, num_5ghz_reg_rules;
++ 	int ret;
++ 
++ 	ath11k_dbg(ab, ATH11K_DBG_WMI, "processing regulatory channel list\n");
++@@ -4978,10 +4978,10 @@ static int ath11k_pull_reg_chan_list_upd
++ 		return -EPROTO;
++ 	}
++ 
++-	reg_info->num_2g_reg_rules = chan_list_event_hdr->num_2g_reg_rules;
++-	reg_info->num_5g_reg_rules = chan_list_event_hdr->num_5g_reg_rules;
+++	reg_info->num_2ghz_reg_rules = chan_list_event_hdr->num_2ghz_reg_rules;
+++	reg_info->num_5ghz_reg_rules = chan_list_event_hdr->num_5ghz_reg_rules;
++ 
++-	if (!(reg_info->num_2g_reg_rules + reg_info->num_5g_reg_rules)) {
+++	if (!(reg_info->num_2ghz_reg_rules + reg_info->num_5ghz_reg_rules)) {
++ 		ath11k_warn(ab, "No regulatory rules available in the event info\n");
++ 		kfree(tb);
++ 		return -EINVAL;
++@@ -5008,46 +5008,48 @@ static int ath11k_pull_reg_chan_list_upd
++ 	else if (chan_list_event_hdr->status_code == WMI_REG_SET_CC_STATUS_FAIL)
++ 		reg_info->status_code = REG_SET_CC_STATUS_FAIL;
++ 
++-	reg_info->min_bw_2g = chan_list_event_hdr->min_bw_2g;
++-	reg_info->max_bw_2g = chan_list_event_hdr->max_bw_2g;
++-	reg_info->min_bw_5g = chan_list_event_hdr->min_bw_5g;
++-	reg_info->max_bw_5g = chan_list_event_hdr->max_bw_5g;
+++	reg_info->min_bw_2ghz = chan_list_event_hdr->min_bw_2ghz;
+++	reg_info->max_bw_2ghz = chan_list_event_hdr->max_bw_2ghz;
+++	reg_info->min_bw_5ghz = chan_list_event_hdr->min_bw_5ghz;
+++	reg_info->max_bw_5ghz = chan_list_event_hdr->max_bw_5ghz;
++ 
++-	num_2g_reg_rules = reg_info->num_2g_reg_rules;
++-	num_5g_reg_rules = reg_info->num_5g_reg_rules;
+++	num_2ghz_reg_rules = reg_info->num_2ghz_reg_rules;
+++	num_5ghz_reg_rules = reg_info->num_5ghz_reg_rules;
++ 
++ 	ath11k_dbg(ab, ATH11K_DBG_WMI,
++-		   "%s:cc %s dsf %d BW: min_2g %d max_2g %d min_5g %d max_5g %d",
+++		   "%s:cc %s dsf %d BW: min_2ghz %d max_2ghz %d min_5ghz %d max_5ghz %d",
++ 		   __func__, reg_info->alpha2, reg_info->dfs_region,
++-		   reg_info->min_bw_2g, reg_info->max_bw_2g,
++-		   reg_info->min_bw_5g, reg_info->max_bw_5g);
+++		   reg_info->min_bw_2ghz, reg_info->max_bw_2ghz,
+++		   reg_info->min_bw_5ghz, reg_info->max_bw_5ghz);
++ 
++ 	ath11k_dbg(ab, ATH11K_DBG_WMI,
++-		   "%s: num_2g_reg_rules %d num_5g_reg_rules %d", __func__,
++-		   num_2g_reg_rules, num_5g_reg_rules);
+++		   "%s: num_2ghz_reg_rules %d num_5ghz_reg_rules %d", __func__,
+++		   num_2ghz_reg_rules, num_5ghz_reg_rules);
++ 
++ 	wmi_reg_rule =
++ 		(struct wmi_regulatory_rule_struct *)((u8 *)chan_list_event_hdr
++ 						+ sizeof(*chan_list_event_hdr)
++ 						+ sizeof(struct wmi_tlv));
++ 
++-	if (num_2g_reg_rules) {
++-		reg_info->reg_rules_2g_ptr = create_reg_rules_from_wmi(num_2g_reg_rules,
++-								       wmi_reg_rule);
++-		if (!reg_info->reg_rules_2g_ptr) {
+++	if (num_2ghz_reg_rules) {
+++		reg_info->reg_rules_2ghz_ptr =
+++				create_reg_rules_from_wmi(num_2ghz_reg_rules,
+++							  wmi_reg_rule);
+++		if (!reg_info->reg_rules_2ghz_ptr) {
++ 			kfree(tb);
++-			ath11k_warn(ab, "Unable to Allocate memory for 2g rules\n");
+++			ath11k_warn(ab, "Unable to Allocate memory for 2 GHz rules\n");
++ 			return -ENOMEM;
++ 		}
++ 	}
++ 
++-	if (num_5g_reg_rules) {
++-		wmi_reg_rule += num_2g_reg_rules;
++-		reg_info->reg_rules_5g_ptr = create_reg_rules_from_wmi(num_5g_reg_rules,
++-								       wmi_reg_rule);
++-		if (!reg_info->reg_rules_5g_ptr) {
+++	if (num_5ghz_reg_rules) {
+++		wmi_reg_rule += num_2ghz_reg_rules;
+++		reg_info->reg_rules_5ghz_ptr =
+++				create_reg_rules_from_wmi(num_5ghz_reg_rules,
+++							  wmi_reg_rule);
+++		if (!reg_info->reg_rules_5ghz_ptr) {
++ 			kfree(tb);
++-			ath11k_warn(ab, "Unable to Allocate memory for 5g rules\n");
+++			ath11k_warn(ab, "Unable to Allocate memory for 5 GHz rules\n");
++ 			return -ENOMEM;
++ 		}
++ 	}
++@@ -6619,8 +6621,8 @@ fallback:
++ 	WARN_ON(1);
++ mem_free:
++ 	if (reg_info) {
++-		kfree(reg_info->reg_rules_2g_ptr);
++-		kfree(reg_info->reg_rules_5g_ptr);
+++		kfree(reg_info->reg_rules_2ghz_ptr);
+++		kfree(reg_info->reg_rules_5ghz_ptr);
++ 		kfree(reg_info);
++ 	}
++ 	return ret;
++--- a/drivers/net/wireless/ath/ath11k/wmi.h
+++++ b/drivers/net/wireless/ath/ath11k/wmi.h
++@@ -4129,14 +4129,14 @@ struct cur_regulatory_info {
++ 	u8 alpha2[REG_ALPHA2_LEN + 1];
++ 	u32 dfs_region;
++ 	u32 phybitmap;
++-	u32 min_bw_2g;
++-	u32 max_bw_2g;
++-	u32 min_bw_5g;
++-	u32 max_bw_5g;
++-	u32 num_2g_reg_rules;
++-	u32 num_5g_reg_rules;
++-	struct cur_reg_rule *reg_rules_2g_ptr;
++-	struct cur_reg_rule *reg_rules_5g_ptr;
+++	u32 min_bw_2ghz;
+++	u32 max_bw_2ghz;
+++	u32 min_bw_5ghz;
+++	u32 max_bw_5ghz;
+++	u32 num_2ghz_reg_rules;
+++	u32 num_5ghz_reg_rules;
+++	struct cur_reg_rule *reg_rules_2ghz_ptr;
+++	struct cur_reg_rule *reg_rules_5ghz_ptr;
++ };
++ 
++ struct wmi_reg_chan_list_cc_event {
++@@ -4148,12 +4148,12 @@ struct wmi_reg_chan_list_cc_event {
++ 	u32 domain_code;
++ 	u32 dfs_region;
++ 	u32 phybitmap;
++-	u32 min_bw_2g;
++-	u32 max_bw_2g;
++-	u32 min_bw_5g;
++-	u32 max_bw_5g;
++-	u32 num_2g_reg_rules;
++-	u32 num_5g_reg_rules;
+++	u32 min_bw_2ghz;
+++	u32 max_bw_2ghz;
+++	u32 min_bw_5ghz;
+++	u32 max_bw_5ghz;
+++	u32 num_2ghz_reg_rules;
+++	u32 num_5ghz_reg_rules;
++ } __packed;
++ 
++ struct wmi_regulatory_rule_struct {
+diff --git a/package/kernel/mac80211/patches/ath11k/0044-wifi-ath11k-add-support-to-parse-new-WMI-event-for-6.patch b/package/kernel/mac80211/patches/ath11k/0044-wifi-ath11k-add-support-to-parse-new-WMI-event-for-6.patch
+new file mode 100644
+index 0000000000..e165c09dc4
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0044-wifi-ath11k-add-support-to-parse-new-WMI-event-for-6.patch
+@@ -0,0 +1,844 @@
++From 91fa00fa69224aae5afb720c5e68b22e4c4f7333 Mon Sep 17 00:00:00 2001
++From: Aditya Kumar Singh <quic_adisi@quicinc.com>
++Date: Wed, 1 Mar 2023 16:20:59 +0200
++Subject: [PATCH] wifi: ath11k: add support to parse new WMI event for 6 GHz
++
++In order to support different power levels of 6 GHz AP and client,
++new WMI event for regulatory - WMI_REG_CHAN_LIST_CC_EXT_EVENTID is
++added in firmware. This event provides new parameters required for
++6 GHz regulatory rules.
++
++Add support for parsing 2.4 GHz, 5 GHz and 6 GHz reg rules and other
++parameters from WMI_REG_CHAN_LIST_CC_EXT_EVENTID.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Lavanya Suresh <quic_lavaks@quicinc.com>
++Signed-off-by: Wen Gong <quic_wgong@quicinc.com>
++Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230110121024.14051-3-quic_adisi@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/reg.c |  37 ++-
++ drivers/net/wireless/ath/ath11k/wmi.c | 418 +++++++++++++++++++++++++-
++ drivers/net/wireless/ath/ath11k/wmi.h | 163 +++++++++-
++ 3 files changed, 584 insertions(+), 34 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/reg.c
+++++ b/drivers/net/wireless/ath/ath11k/reg.c
++@@ -613,7 +613,7 @@ ath11k_reg_build_regd(struct ath11k_base
++ {
++ 	struct ieee80211_regdomain *tmp_regd, *default_regd, *new_regd = NULL;
++ 	struct cur_reg_rule *reg_rule;
++-	u8 i = 0, j = 0;
+++	u8 i = 0, j = 0, k = 0;
++ 	u8 num_rules;
++ 	u16 max_bw;
++ 	u32 flags;
++@@ -621,6 +621,12 @@ ath11k_reg_build_regd(struct ath11k_base
++ 
++ 	num_rules = reg_info->num_5ghz_reg_rules + reg_info->num_2ghz_reg_rules;
++ 
+++	/* FIXME: Currently taking reg rules for 6 GHz only from Indoor AP mode list.
+++	 * This can be updated after complete 6 GHz regulatory support is added.
+++	 */
+++	if (reg_info->is_ext_reg_event)
+++		num_rules += reg_info->num_6ghz_rules_ap[WMI_REG_INDOOR_AP];
+++
++ 	if (!num_rules)
++ 		goto ret;
++ 
++@@ -666,6 +672,14 @@ ath11k_reg_build_regd(struct ath11k_base
++ 			 * per other BW rule flags we pass from here
++ 			 */
++ 			flags = NL80211_RRF_AUTO_BW;
+++		} else if (reg_info->is_ext_reg_event &&
+++			   reg_info->num_6ghz_rules_ap[WMI_REG_INDOOR_AP] &&
+++			   (k < reg_info->num_6ghz_rules_ap[WMI_REG_INDOOR_AP])) {
+++			reg_rule = reg_info->reg_rules_6ghz_ap_ptr[WMI_REG_INDOOR_AP] +
+++				   k++;
+++			max_bw = min_t(u16, reg_rule->max_bw,
+++				       reg_info->max_bw_6ghz_ap[WMI_REG_INDOOR_AP]);
+++			flags = NL80211_RRF_AUTO_BW;
++ 		} else {
++ 			break;
++ 		}
++@@ -693,12 +707,21 @@ ath11k_reg_build_regd(struct ath11k_base
++ 			continue;
++ 		}
++ 
++-		ath11k_dbg(ab, ATH11K_DBG_REG,
++-			   "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d)\n",
++-			   i + 1, reg_rule->start_freq, reg_rule->end_freq,
++-			   max_bw, reg_rule->ant_gain, reg_rule->reg_power,
++-			   tmp_regd->reg_rules[i].dfs_cac_ms,
++-			   flags);
+++		if (reg_info->is_ext_reg_event) {
+++			ath11k_dbg(ab, ATH11K_DBG_REG,
+++				   "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d) (%d, %d)\n",
+++				   i + 1, reg_rule->start_freq, reg_rule->end_freq,
+++				   max_bw, reg_rule->ant_gain, reg_rule->reg_power,
+++				   tmp_regd->reg_rules[i].dfs_cac_ms, flags,
+++				   reg_rule->psd_flag, reg_rule->psd_eirp);
+++		} else {
+++			ath11k_dbg(ab, ATH11K_DBG_REG,
+++				   "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d)\n",
+++				   i + 1, reg_rule->start_freq, reg_rule->end_freq,
+++				   max_bw, reg_rule->ant_gain, reg_rule->reg_power,
+++				   tmp_regd->reg_rules[i].dfs_cac_ms,
+++				   flags);
+++		}
++ 	}
++ 
++ 	tmp_regd->n_reg_rules = i;
++--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++++ b/drivers/net/wireless/ath/ath11k/wmi.c
++@@ -105,6 +105,8 @@ static const struct wmi_tlv_policy wmi_t
++ 		= { .min_len = sizeof(struct wmi_vdev_stopped_event) },
++ 	[WMI_TAG_REG_CHAN_LIST_CC_EVENT]
++ 		= { .min_len = sizeof(struct wmi_reg_chan_list_cc_event) },
+++	[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT]
+++		= { .min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) },
++ 	[WMI_TAG_MGMT_RX_HDR]
++ 		= { .min_len = sizeof(struct wmi_mgmt_rx_hdr) },
++ 	[WMI_TAG_MGMT_TX_COMPL_EVENT]
++@@ -3974,6 +3976,10 @@ ath11k_wmi_copy_resource_config(struct w
++ 	wmi_cfg->sched_params = tg_cfg->sched_params;
++ 	wmi_cfg->twt_ap_pdev_count = tg_cfg->twt_ap_pdev_count;
++ 	wmi_cfg->twt_ap_sta_count = tg_cfg->twt_ap_sta_count;
+++	wmi_cfg->host_service_flags &=
+++		~(1 << WMI_CFG_HOST_SERVICE_FLAG_REG_CC_EXT);
+++	wmi_cfg->host_service_flags |= (tg_cfg->is_reg_cc_ext_event_supported <<
+++					WMI_CFG_HOST_SERVICE_FLAG_REG_CC_EXT);
++ }
++ 
++ static int ath11k_init_cmd_send(struct ath11k_pdev_wmi *wmi,
++@@ -4192,6 +4198,10 @@ int ath11k_wmi_cmd_init(struct ath11k_ba
++ 
++ 	ab->hw_params.hw_ops->wmi_init_config(ab, &config);
++ 
+++	if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT,
+++		     ab->wmi_ab.svc_map))
+++		config.is_reg_cc_ext_event_supported = 1;
+++
++ 	memcpy(&wmi_sc->wlan_resource_config, &config, sizeof(config));
++ 
++ 	init_param.res_cfg = &wmi_sc->wlan_resource_config;
++@@ -4995,18 +5005,11 @@ static int ath11k_pull_reg_chan_list_upd
++ 	reg_info->phy_id = chan_list_event_hdr->phy_id;
++ 	reg_info->ctry_code = chan_list_event_hdr->country_id;
++ 	reg_info->reg_dmn_pair = chan_list_event_hdr->domain_code;
++-	if (chan_list_event_hdr->status_code == WMI_REG_SET_CC_STATUS_PASS)
++-		reg_info->status_code = REG_SET_CC_STATUS_PASS;
++-	else if (chan_list_event_hdr->status_code == WMI_REG_CURRENT_ALPHA2_NOT_FOUND)
++-		reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND;
++-	else if (chan_list_event_hdr->status_code == WMI_REG_INIT_ALPHA2_NOT_FOUND)
++-		reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND;
++-	else if (chan_list_event_hdr->status_code == WMI_REG_SET_CC_CHANGE_NOT_ALLOWED)
++-		reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED;
++-	else if (chan_list_event_hdr->status_code == WMI_REG_SET_CC_STATUS_NO_MEMORY)
++-		reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY;
++-	else if (chan_list_event_hdr->status_code == WMI_REG_SET_CC_STATUS_FAIL)
++-		reg_info->status_code = REG_SET_CC_STATUS_FAIL;
+++
+++	reg_info->status_code =
+++		ath11k_wmi_cc_setting_code_to_reg(chan_list_event_hdr->status_code);
+++
+++	reg_info->is_ext_reg_event = false;
++ 
++ 	reg_info->min_bw_2ghz = chan_list_event_hdr->min_bw_2ghz;
++ 	reg_info->max_bw_2ghz = chan_list_event_hdr->max_bw_2ghz;
++@@ -5060,6 +5063,372 @@ static int ath11k_pull_reg_chan_list_upd
++ 	return 0;
++ }
++ 
+++static struct cur_reg_rule
+++*create_ext_reg_rules_from_wmi(u32 num_reg_rules,
+++			       struct wmi_regulatory_ext_rule *wmi_reg_rule)
+++{
+++	struct cur_reg_rule *reg_rule_ptr;
+++	u32 count;
+++
+++	reg_rule_ptr =  kcalloc(num_reg_rules, sizeof(*reg_rule_ptr), GFP_ATOMIC);
+++
+++	if (!reg_rule_ptr)
+++		return NULL;
+++
+++	for (count = 0; count < num_reg_rules; count++) {
+++		reg_rule_ptr[count].start_freq =
+++			u32_get_bits(wmi_reg_rule[count].freq_info,
+++				     REG_RULE_START_FREQ);
+++		reg_rule_ptr[count].end_freq =
+++			u32_get_bits(wmi_reg_rule[count].freq_info,
+++				     REG_RULE_END_FREQ);
+++		reg_rule_ptr[count].max_bw =
+++			u32_get_bits(wmi_reg_rule[count].bw_pwr_info,
+++				     REG_RULE_MAX_BW);
+++		reg_rule_ptr[count].reg_power =
+++			u32_get_bits(wmi_reg_rule[count].bw_pwr_info,
+++				     REG_RULE_REG_PWR);
+++		reg_rule_ptr[count].ant_gain =
+++			u32_get_bits(wmi_reg_rule[count].bw_pwr_info,
+++				     REG_RULE_ANT_GAIN);
+++		reg_rule_ptr[count].flags =
+++			u32_get_bits(wmi_reg_rule[count].flag_info,
+++				     REG_RULE_FLAGS);
+++		reg_rule_ptr[count].psd_flag =
+++			u32_get_bits(wmi_reg_rule[count].psd_power_info,
+++				     REG_RULE_PSD_INFO);
+++		reg_rule_ptr[count].psd_eirp =
+++			u32_get_bits(wmi_reg_rule[count].psd_power_info,
+++				     REG_RULE_PSD_EIRP);
+++	}
+++
+++	return reg_rule_ptr;
+++}
+++
+++static u8
+++ath11k_invalid_5ghz_reg_ext_rules_from_wmi(u32 num_reg_rules,
+++					   const struct wmi_regulatory_ext_rule *rule)
+++{
+++	u8 num_invalid_5ghz_rules = 0;
+++	u32 count, start_freq;
+++
+++	for (count = 0; count < num_reg_rules; count++) {
+++		start_freq = u32_get_bits(rule[count].freq_info,
+++					  REG_RULE_START_FREQ);
+++
+++		if (start_freq >= ATH11K_MIN_6G_FREQ)
+++			num_invalid_5ghz_rules++;
+++	}
+++
+++	return num_invalid_5ghz_rules;
+++}
+++
+++static int ath11k_pull_reg_chan_list_ext_update_ev(struct ath11k_base *ab,
+++						   struct sk_buff *skb,
+++						   struct cur_regulatory_info *reg_info)
+++{
+++	const void **tb;
+++	const struct wmi_reg_chan_list_cc_ext_event *ext_chan_list_event_hdr;
+++	struct wmi_regulatory_ext_rule *ext_wmi_reg_rule;
+++	u32 num_2ghz_reg_rules, num_5ghz_reg_rules;
+++	u32 num_6ghz_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
+++	u32 num_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
+++	u32 total_reg_rules = 0;
+++	int ret, i, j, num_invalid_5ghz_ext_rules = 0;
+++
+++	ath11k_dbg(ab, ATH11K_DBG_WMI, "processing regulatory ext channel list\n");
+++
+++	tb = ath11k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
+++	if (IS_ERR(tb)) {
+++		ret = PTR_ERR(tb);
+++		ath11k_warn(ab, "failed to parse tlv: %d\n", ret);
+++		return ret;
+++	}
+++
+++	ext_chan_list_event_hdr = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT];
+++	if (!ext_chan_list_event_hdr) {
+++		ath11k_warn(ab, "failed to fetch reg chan list ext update ev\n");
+++		kfree(tb);
+++		return -EPROTO;
+++	}
+++
+++	reg_info->num_2ghz_reg_rules =
+++			ext_chan_list_event_hdr->num_2ghz_reg_rules;
+++	reg_info->num_5ghz_reg_rules =
+++			ext_chan_list_event_hdr->num_5ghz_reg_rules;
+++	reg_info->num_6ghz_rules_ap[WMI_REG_INDOOR_AP] =
+++			ext_chan_list_event_hdr->num_6ghz_reg_rules_ap_lpi;
+++	reg_info->num_6ghz_rules_ap[WMI_REG_STANDARD_POWER_AP] =
+++			ext_chan_list_event_hdr->num_6ghz_reg_rules_ap_sp;
+++	reg_info->num_6ghz_rules_ap[WMI_REG_VERY_LOW_POWER_AP] =
+++			ext_chan_list_event_hdr->num_6ghz_reg_rules_ap_vlp;
+++
+++	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
+++		reg_info->num_6ghz_rules_client[WMI_REG_INDOOR_AP][i] =
+++			ext_chan_list_event_hdr->num_6ghz_reg_rules_client_lpi[i];
+++		reg_info->num_6ghz_rules_client[WMI_REG_STANDARD_POWER_AP][i] =
+++			ext_chan_list_event_hdr->num_6ghz_reg_rules_client_sp[i];
+++		reg_info->num_6ghz_rules_client[WMI_REG_VERY_LOW_POWER_AP][i] =
+++			ext_chan_list_event_hdr->num_6ghz_reg_rules_client_vlp[i];
+++	}
+++
+++	num_2ghz_reg_rules = reg_info->num_2ghz_reg_rules;
+++	num_5ghz_reg_rules = reg_info->num_5ghz_reg_rules;
+++
+++	total_reg_rules += num_2ghz_reg_rules;
+++	total_reg_rules += num_5ghz_reg_rules;
+++
+++	if ((num_2ghz_reg_rules > MAX_REG_RULES) ||
+++	    (num_5ghz_reg_rules > MAX_REG_RULES)) {
+++		ath11k_warn(ab, "Num reg rules for 2.4 GHz/5 GHz exceeds max limit (num_2ghz_reg_rules: %d num_5ghz_reg_rules: %d max_rules: %d)\n",
+++			    num_2ghz_reg_rules, num_5ghz_reg_rules, MAX_REG_RULES);
+++		kfree(tb);
+++		return -EINVAL;
+++	}
+++
+++	for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
+++		num_6ghz_reg_rules_ap[i] = reg_info->num_6ghz_rules_ap[i];
+++
+++		if (num_6ghz_reg_rules_ap[i] > MAX_6GHZ_REG_RULES) {
+++			ath11k_warn(ab, "Num 6 GHz reg rules for AP mode(%d) exceeds max limit (num_6ghz_reg_rules_ap: %d, max_rules: %d)\n",
+++				    i, num_6ghz_reg_rules_ap[i], MAX_6GHZ_REG_RULES);
+++			kfree(tb);
+++			return -EINVAL;
+++		}
+++
+++		total_reg_rules += num_6ghz_reg_rules_ap[i];
+++	}
+++
+++	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
+++		num_6ghz_client[WMI_REG_INDOOR_AP][i] =
+++			reg_info->num_6ghz_rules_client[WMI_REG_INDOOR_AP][i];
+++		total_reg_rules += num_6ghz_client[WMI_REG_INDOOR_AP][i];
+++
+++		num_6ghz_client[WMI_REG_STANDARD_POWER_AP][i] =
+++			reg_info->num_6ghz_rules_client[WMI_REG_STANDARD_POWER_AP][i];
+++		total_reg_rules += num_6ghz_client[WMI_REG_STANDARD_POWER_AP][i];
+++
+++		num_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i] =
+++			reg_info->num_6ghz_rules_client[WMI_REG_VERY_LOW_POWER_AP][i];
+++		total_reg_rules += num_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i];
+++
+++		if ((num_6ghz_client[WMI_REG_INDOOR_AP][i] > MAX_6GHZ_REG_RULES) ||
+++		    (num_6ghz_client[WMI_REG_STANDARD_POWER_AP][i] >
+++							     MAX_6GHZ_REG_RULES) ||
+++		    (num_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i] >
+++							     MAX_6GHZ_REG_RULES)) {
+++			ath11k_warn(ab,
+++				    "Num 6 GHz client reg rules exceeds max limit, for client(type: %d)\n",
+++				    i);
+++			kfree(tb);
+++			return -EINVAL;
+++		}
+++	}
+++
+++	if (!total_reg_rules) {
+++		ath11k_warn(ab, "No reg rules available\n");
+++		kfree(tb);
+++		return -EINVAL;
+++	}
+++
+++	memcpy(reg_info->alpha2, &ext_chan_list_event_hdr->alpha2,
+++	       REG_ALPHA2_LEN);
+++
+++	reg_info->dfs_region = ext_chan_list_event_hdr->dfs_region;
+++	reg_info->phybitmap = ext_chan_list_event_hdr->phybitmap;
+++	reg_info->num_phy = ext_chan_list_event_hdr->num_phy;
+++	reg_info->phy_id = ext_chan_list_event_hdr->phy_id;
+++	reg_info->ctry_code = ext_chan_list_event_hdr->country_id;
+++	reg_info->reg_dmn_pair = ext_chan_list_event_hdr->domain_code;
+++
+++	reg_info->status_code =
+++		ath11k_wmi_cc_setting_code_to_reg(ext_chan_list_event_hdr->status_code);
+++
+++	reg_info->is_ext_reg_event = true;
+++
+++	reg_info->min_bw_2ghz = ext_chan_list_event_hdr->min_bw_2ghz;
+++	reg_info->max_bw_2ghz = ext_chan_list_event_hdr->max_bw_2ghz;
+++	reg_info->min_bw_5ghz = ext_chan_list_event_hdr->min_bw_5ghz;
+++	reg_info->max_bw_5ghz = ext_chan_list_event_hdr->max_bw_5ghz;
+++
+++	reg_info->min_bw_6ghz_ap[WMI_REG_INDOOR_AP] =
+++			ext_chan_list_event_hdr->min_bw_6ghz_ap_lpi;
+++	reg_info->max_bw_6ghz_ap[WMI_REG_INDOOR_AP] =
+++			 ext_chan_list_event_hdr->max_bw_6ghz_ap_lpi;
+++	reg_info->min_bw_6ghz_ap[WMI_REG_STANDARD_POWER_AP] =
+++			ext_chan_list_event_hdr->min_bw_6ghz_ap_sp;
+++	reg_info->max_bw_6ghz_ap[WMI_REG_STANDARD_POWER_AP] =
+++			ext_chan_list_event_hdr->max_bw_6ghz_ap_sp;
+++	reg_info->min_bw_6ghz_ap[WMI_REG_VERY_LOW_POWER_AP] =
+++			ext_chan_list_event_hdr->min_bw_6ghz_ap_vlp;
+++	reg_info->max_bw_6ghz_ap[WMI_REG_VERY_LOW_POWER_AP] =
+++			ext_chan_list_event_hdr->max_bw_6ghz_ap_vlp;
+++
+++	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
+++		reg_info->min_bw_6ghz_client[WMI_REG_INDOOR_AP][i] =
+++				ext_chan_list_event_hdr->min_bw_6ghz_client_lpi[i];
+++		reg_info->max_bw_6ghz_client[WMI_REG_INDOOR_AP][i] =
+++				ext_chan_list_event_hdr->max_bw_6ghz_client_lpi[i];
+++		reg_info->min_bw_6ghz_client[WMI_REG_STANDARD_POWER_AP][i] =
+++				ext_chan_list_event_hdr->min_bw_6ghz_client_sp[i];
+++		reg_info->max_bw_6ghz_client[WMI_REG_STANDARD_POWER_AP][i] =
+++				ext_chan_list_event_hdr->max_bw_6ghz_client_sp[i];
+++		reg_info->min_bw_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i] =
+++				ext_chan_list_event_hdr->min_bw_6ghz_client_vlp[i];
+++		reg_info->max_bw_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i] =
+++				ext_chan_list_event_hdr->max_bw_6ghz_client_vlp[i];
+++	}
+++
+++	ath11k_dbg(ab, ATH11K_DBG_WMI,
+++		   "%s:cc_ext %s dsf %d BW: min_2ghz %d max_2ghz %d min_5ghz %d max_5ghz %d",
+++		   __func__, reg_info->alpha2, reg_info->dfs_region,
+++		   reg_info->min_bw_2ghz, reg_info->max_bw_2ghz,
+++		   reg_info->min_bw_5ghz, reg_info->max_bw_5ghz);
+++
+++	ath11k_dbg(ab, ATH11K_DBG_WMI,
+++		   "num_2ghz_reg_rules %d num_5ghz_reg_rules %d",
+++		   num_2ghz_reg_rules, num_5ghz_reg_rules);
+++
+++	ath11k_dbg(ab, ATH11K_DBG_WMI,
+++		   "num_6ghz_reg_rules_ap_lpi: %d num_6ghz_reg_rules_ap_sp: %d num_6ghz_reg_rules_ap_vlp: %d",
+++		   num_6ghz_reg_rules_ap[WMI_REG_INDOOR_AP],
+++		   num_6ghz_reg_rules_ap[WMI_REG_STANDARD_POWER_AP],
+++		   num_6ghz_reg_rules_ap[WMI_REG_VERY_LOW_POWER_AP]);
+++
+++	j = WMI_REG_DEFAULT_CLIENT;
+++	ath11k_dbg(ab, ATH11K_DBG_WMI,
+++		   "6 GHz Regular client: num_6ghz_reg_rules_lpi: %d num_6ghz_reg_rules_sp: %d num_6ghz_reg_rules_vlp: %d",
+++		   num_6ghz_client[WMI_REG_INDOOR_AP][j],
+++		   num_6ghz_client[WMI_REG_STANDARD_POWER_AP][j],
+++		   num_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][j]);
+++
+++	j = WMI_REG_SUBORDINATE_CLIENT;
+++	ath11k_dbg(ab, ATH11K_DBG_WMI,
+++		   "6 GHz Subordinate client: num_6ghz_reg_rules_lpi: %d num_6ghz_reg_rules_sp: %d num_6ghz_reg_rules_vlp: %d",
+++		   num_6ghz_client[WMI_REG_INDOOR_AP][j],
+++		   num_6ghz_client[WMI_REG_STANDARD_POWER_AP][j],
+++		   num_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][j]);
+++
+++	ext_wmi_reg_rule =
+++		(struct wmi_regulatory_ext_rule *)((u8 *)ext_chan_list_event_hdr
+++						   + sizeof(*ext_chan_list_event_hdr)
+++						   + sizeof(struct wmi_tlv));
+++	if (num_2ghz_reg_rules) {
+++		reg_info->reg_rules_2ghz_ptr =
+++			create_ext_reg_rules_from_wmi(num_2ghz_reg_rules,
+++						      ext_wmi_reg_rule);
+++
+++		if (!reg_info->reg_rules_2ghz_ptr) {
+++			kfree(tb);
+++			ath11k_warn(ab, "Unable to Allocate memory for 2 GHz rules\n");
+++			return -ENOMEM;
+++		}
+++	}
+++
+++	ext_wmi_reg_rule += num_2ghz_reg_rules;
+++
+++	/* Firmware might include 6 GHz reg rule in 5 GHz rule list
+++	 * for few countries along with separate 6 GHz rule.
+++	 * Having same 6 GHz reg rule in 5 GHz and 6 GHz rules list
+++	 * causes intersect check to be true, and same rules will be
+++	 * shown multiple times in iw cmd.
+++	 * Hence, avoid parsing 6 GHz rule from 5 GHz reg rule list
+++	 */
+++	num_invalid_5ghz_ext_rules =
+++		ath11k_invalid_5ghz_reg_ext_rules_from_wmi(num_5ghz_reg_rules,
+++							   ext_wmi_reg_rule);
+++
+++	if (num_invalid_5ghz_ext_rules) {
+++		ath11k_dbg(ab, ATH11K_DBG_WMI,
+++			   "CC: %s 5 GHz reg rules number %d from fw, %d number of invalid 5 GHz rules",
+++			   reg_info->alpha2, reg_info->num_5ghz_reg_rules,
+++			   num_invalid_5ghz_ext_rules);
+++
+++		num_5ghz_reg_rules = num_5ghz_reg_rules - num_invalid_5ghz_ext_rules;
+++		reg_info->num_5ghz_reg_rules = num_5ghz_reg_rules;
+++	}
+++
+++	if (num_5ghz_reg_rules) {
+++		reg_info->reg_rules_5ghz_ptr =
+++			create_ext_reg_rules_from_wmi(num_5ghz_reg_rules,
+++						      ext_wmi_reg_rule);
+++
+++		if (!reg_info->reg_rules_5ghz_ptr) {
+++			kfree(tb);
+++			ath11k_warn(ab, "Unable to Allocate memory for 5 GHz rules\n");
+++			return -ENOMEM;
+++		}
+++	}
+++
+++	/* We have adjusted the number of 5 GHz reg rules above. But still those
+++	 * many rules needs to be adjusted in ext_wmi_reg_rule.
+++	 *
+++	 * NOTE: num_invalid_5ghz_ext_rules will be 0 for rest other cases.
+++	 */
+++	ext_wmi_reg_rule += (num_5ghz_reg_rules + num_invalid_5ghz_ext_rules);
+++
+++	for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
+++		reg_info->reg_rules_6ghz_ap_ptr[i] =
+++			create_ext_reg_rules_from_wmi(num_6ghz_reg_rules_ap[i],
+++						      ext_wmi_reg_rule);
+++
+++		if (!reg_info->reg_rules_6ghz_ap_ptr[i]) {
+++			kfree(tb);
+++			ath11k_warn(ab, "Unable to Allocate memory for 6 GHz AP rules\n");
+++			return -ENOMEM;
+++		}
+++
+++		ext_wmi_reg_rule += num_6ghz_reg_rules_ap[i];
+++	}
+++
+++	for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) {
+++		for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
+++			reg_info->reg_rules_6ghz_client_ptr[j][i] =
+++				create_ext_reg_rules_from_wmi(num_6ghz_client[j][i],
+++							      ext_wmi_reg_rule);
+++
+++			if (!reg_info->reg_rules_6ghz_client_ptr[j][i]) {
+++				kfree(tb);
+++				ath11k_warn(ab, "Unable to Allocate memory for 6 GHz client rules\n");
+++				return -ENOMEM;
+++			}
+++
+++			ext_wmi_reg_rule += num_6ghz_client[j][i];
+++		}
+++	}
+++
+++	reg_info->client_type = ext_chan_list_event_hdr->client_type;
+++	reg_info->rnr_tpe_usable = ext_chan_list_event_hdr->rnr_tpe_usable;
+++	reg_info->unspecified_ap_usable =
+++			ext_chan_list_event_hdr->unspecified_ap_usable;
+++	reg_info->domain_code_6ghz_ap[WMI_REG_INDOOR_AP] =
+++			ext_chan_list_event_hdr->domain_code_6ghz_ap_lpi;
+++	reg_info->domain_code_6ghz_ap[WMI_REG_STANDARD_POWER_AP] =
+++			ext_chan_list_event_hdr->domain_code_6ghz_ap_sp;
+++	reg_info->domain_code_6ghz_ap[WMI_REG_VERY_LOW_POWER_AP] =
+++			ext_chan_list_event_hdr->domain_code_6ghz_ap_vlp;
+++
+++	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
+++		reg_info->domain_code_6ghz_client[WMI_REG_INDOOR_AP][i] =
+++				ext_chan_list_event_hdr->domain_code_6ghz_client_lpi[i];
+++		reg_info->domain_code_6ghz_client[WMI_REG_STANDARD_POWER_AP][i] =
+++				ext_chan_list_event_hdr->domain_code_6ghz_client_sp[i];
+++		reg_info->domain_code_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i] =
+++				ext_chan_list_event_hdr->domain_code_6ghz_client_vlp[i];
+++	}
+++
+++	reg_info->domain_code_6ghz_super_id =
+++			ext_chan_list_event_hdr->domain_code_6ghz_super_id;
+++
+++	ath11k_dbg(ab, ATH11K_DBG_WMI, "6 GHz client_type: %d domain_code_6ghz_super_id: %d",
+++		   reg_info->client_type, reg_info->domain_code_6ghz_super_id);
+++
+++	ath11k_dbg(ab, ATH11K_DBG_WMI, "processed regulatory ext channel list\n");
+++
+++	kfree(tb);
+++	return 0;
+++}
+++
++ static int ath11k_pull_peer_del_resp_ev(struct ath11k_base *ab, struct sk_buff *skb,
++ 					struct wmi_peer_delete_resp_event *peer_del_resp)
++ {
++@@ -6507,12 +6876,14 @@ static bool ath11k_reg_is_world_alpha(ch
++ 	return false;
++ }
++ 
++-static int ath11k_reg_chan_list_event(struct ath11k_base *ab, struct sk_buff *skb)
+++static int ath11k_reg_chan_list_event(struct ath11k_base *ab,
+++				      struct sk_buff *skb,
+++				      enum wmi_reg_chan_list_cmd_type id)
++ {
++ 	struct cur_regulatory_info *reg_info = NULL;
++ 	struct ieee80211_regdomain *regd = NULL;
++ 	bool intersect = false;
++-	int ret = 0, pdev_idx;
+++	int ret = 0, pdev_idx, i, j;
++ 	struct ath11k *ar;
++ 
++ 	reg_info = kzalloc(sizeof(*reg_info), GFP_ATOMIC);
++@@ -6521,7 +6892,11 @@ static int ath11k_reg_chan_list_event(st
++ 		goto fallback;
++ 	}
++ 
++-	ret = ath11k_pull_reg_chan_list_update_ev(ab, skb, reg_info);
+++	if (id == WMI_REG_CHAN_LIST_CC_ID)
+++		ret = ath11k_pull_reg_chan_list_update_ev(ab, skb, reg_info);
+++	else
+++		ret = ath11k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info);
+++
++ 	if (ret) {
++ 		ath11k_warn(ab, "failed to extract regulatory info from received event\n");
++ 		goto fallback;
++@@ -6623,6 +6998,14 @@ mem_free:
++ 	if (reg_info) {
++ 		kfree(reg_info->reg_rules_2ghz_ptr);
++ 		kfree(reg_info->reg_rules_5ghz_ptr);
+++		if (reg_info->is_ext_reg_event) {
+++			for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++)
+++				kfree(reg_info->reg_rules_6ghz_ap_ptr[i]);
+++
+++			for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++)
+++				for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++)
+++					kfree(reg_info->reg_rules_6ghz_client_ptr[j][i]);
+++		}
++ 		kfree(reg_info);
++ 	}
++ 	return ret;
++@@ -8054,7 +8437,10 @@ static void ath11k_wmi_tlv_op_rx(struct
++ 		ath11k_service_ready_ext2_event(ab, skb);
++ 		break;
++ 	case WMI_REG_CHAN_LIST_CC_EVENTID:
++-		ath11k_reg_chan_list_event(ab, skb);
+++		ath11k_reg_chan_list_event(ab, skb, WMI_REG_CHAN_LIST_CC_ID);
+++		break;
+++	case WMI_REG_CHAN_LIST_CC_EXT_EVENTID:
+++		ath11k_reg_chan_list_event(ab, skb, WMI_REG_CHAN_LIST_CC_EXT_ID);
++ 		break;
++ 	case WMI_READY_EVENTID:
++ 		ath11k_ready_event(ab, skb);
++--- a/drivers/net/wireless/ath/ath11k/wmi.h
+++++ b/drivers/net/wireless/ath/ath11k/wmi.h
++@@ -797,6 +797,7 @@ enum wmi_tlv_event_id {
++ 	WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC),
++ 	WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
++ 	WMI_11D_NEW_COUNTRY_EVENTID,
+++	WMI_REG_CHAN_LIST_CC_EXT_EVENTID,
++ 	WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
++ 	WMI_NDP_INITIATOR_RSP_EVENTID,
++ 	WMI_NDP_RESPONDER_RSP_EVENTID,
++@@ -1865,6 +1866,8 @@ enum wmi_tlv_tag {
++ 	WMI_TAG_PDEV_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
++ 	WMI_TAG_PDEV_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD,
++ 	WMI_TAG_PDEV_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
+++	WMI_TAG_REGULATORY_RULE_EXT_STRUCT = 0x3A9,
+++	WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT,
++ 	WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD = 0x3D8,
++ 	WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD,
++ 	WMI_TAG_MAX
++@@ -2097,6 +2100,7 @@ enum wmi_tlv_service {
++ 
++ 	/* The second 128 bits */
++ 	WMI_MAX_EXT_SERVICE = 256,
+++	WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281,
++ 	WMI_TLV_SERVICE_BIOS_SAR_SUPPORT = 326,
++ 
++ 	/* The third 128 bits */
++@@ -2313,6 +2317,8 @@ struct wmi_init_cmd {
++ #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5)
++ #define WMI_RSRC_CFG_FLAG1_ACK_RSSI BIT(18)
++ 
+++#define WMI_CFG_HOST_SERVICE_FLAG_REG_CC_EXT 4
+++
++ struct wmi_resource_config {
++ 	u32 tlv_header;
++ 	u32 num_vdevs;
++@@ -2372,6 +2378,15 @@ struct wmi_resource_config {
++ 	u32 sched_params;
++ 	u32 twt_ap_pdev_count;
++ 	u32 twt_ap_sta_count;
+++	u32 max_nlo_ssids;
+++	u32 num_pkt_filters;
+++	u32 num_max_sta_vdevs;
+++	u32 max_bssid_indicator;
+++	u32 ul_resp_config;
+++	u32 msdu_flow_override_config0;
+++	u32 msdu_flow_override_config1;
+++	u32 flags2;
+++	u32 host_service_flags;
++ } __packed;
++ 
++ struct wmi_service_ready_event {
++@@ -2854,6 +2869,8 @@ struct rx_reorder_queue_remove_params {
++ #define REG_RULE_MAX_BW				0x0000ffff
++ #define REG_RULE_REG_PWR			0x00ff0000
++ #define REG_RULE_ANT_GAIN			0xff000000
+++#define REG_RULE_PSD_INFO			BIT(0)
+++#define REG_RULE_PSD_EIRP			0xff0000
++ 
++ #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
++ #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
++@@ -4049,6 +4066,7 @@ struct wmi_he_rate_set {
++ 
++ #define MAX_REG_RULES 10
++ #define REG_ALPHA2_LEN 2
+++#define MAX_6GHZ_REG_RULES 5
++ 
++ enum wmi_start_event_param {
++ 	WMI_VDEV_START_RESP_EVENT = 0,
++@@ -4079,16 +4097,6 @@ enum wmi_vdev_start_resp_status_code {
++ 	WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4,
++ };
++ 
++-;
++-enum cc_setting_code {
++-	REG_SET_CC_STATUS_PASS = 0,
++-	REG_CURRENT_ALPHA2_NOT_FOUND = 1,
++-	REG_INIT_ALPHA2_NOT_FOUND = 2,
++-	REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
++-	REG_SET_CC_STATUS_NO_MEMORY = 4,
++-	REG_SET_CC_STATUS_FAIL = 5,
++-};
++-
++ /* Regaulatory Rule Flags Passed by FW */
++ #define REGULATORY_CHAN_DISABLED     BIT(0)
++ #define REGULATORY_CHAN_NO_IR        BIT(1)
++@@ -4102,13 +4110,72 @@ enum cc_setting_code {
++ #define REGULATORY_CHAN_NO_20MHZ     BIT(11)
++ #define REGULATORY_CHAN_NO_10MHZ     BIT(12)
++ 
++-enum {
+++enum wmi_reg_chan_list_cmd_type {
+++	WMI_REG_CHAN_LIST_CC_ID = 0,
+++	WMI_REG_CHAN_LIST_CC_EXT_ID = 1,
+++};
+++
+++enum wmi_reg_cc_setting_code {
++ 	WMI_REG_SET_CC_STATUS_PASS = 0,
++ 	WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1,
++ 	WMI_REG_INIT_ALPHA2_NOT_FOUND = 2,
++ 	WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
++ 	WMI_REG_SET_CC_STATUS_NO_MEMORY = 4,
++ 	WMI_REG_SET_CC_STATUS_FAIL = 5,
+++
+++	/* add new setting code above, update in
+++	 * @enum cc_setting_code as well.
+++	 * Also handle it in ath11k_wmi_cc_setting_code_to_reg()
+++	 */
+++};
+++
+++enum cc_setting_code {
+++	REG_SET_CC_STATUS_PASS = 0,
+++	REG_CURRENT_ALPHA2_NOT_FOUND = 1,
+++	REG_INIT_ALPHA2_NOT_FOUND = 2,
+++	REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
+++	REG_SET_CC_STATUS_NO_MEMORY = 4,
+++	REG_SET_CC_STATUS_FAIL = 5,
+++
+++	/* add new setting code above, update in
+++	 * @enum wmi_reg_cc_setting_code as well.
+++	 */
+++};
+++
+++static inline enum cc_setting_code
+++ath11k_wmi_cc_setting_code_to_reg(enum wmi_reg_cc_setting_code status_code)
+++{
+++	switch (status_code) {
+++	case WMI_REG_SET_CC_STATUS_PASS:
+++		return REG_SET_CC_STATUS_PASS;
+++	case WMI_REG_CURRENT_ALPHA2_NOT_FOUND:
+++		return REG_CURRENT_ALPHA2_NOT_FOUND;
+++	case WMI_REG_INIT_ALPHA2_NOT_FOUND:
+++		return REG_INIT_ALPHA2_NOT_FOUND;
+++	case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED:
+++		return REG_SET_CC_CHANGE_NOT_ALLOWED;
+++	case WMI_REG_SET_CC_STATUS_NO_MEMORY:
+++		return REG_SET_CC_STATUS_NO_MEMORY;
+++	case WMI_REG_SET_CC_STATUS_FAIL:
+++		return REG_SET_CC_STATUS_FAIL;
+++	}
+++
+++	return REG_SET_CC_STATUS_FAIL;
+++}
+++
+++enum wmi_reg_6ghz_ap_type {
+++	WMI_REG_INDOOR_AP = 0,
+++	WMI_REG_STANDARD_POWER_AP = 1,
+++	WMI_REG_VERY_LOW_POWER_AP = 2,
+++
+++	WMI_REG_CURRENT_MAX_AP_TYPE,
+++	WMI_REG_MAX_AP_TYPE = 7,
+++};
+++
+++enum wmi_reg_6ghz_client_type {
+++	WMI_REG_DEFAULT_CLIENT = 0,
+++	WMI_REG_SUBORDINATE_CLIENT = 1,
+++	WMI_REG_MAX_CLIENT_TYPE = 2,
++ };
++ 
++ struct cur_reg_rule {
++@@ -4118,6 +4185,8 @@ struct cur_reg_rule {
++ 	u8 reg_power;
++ 	u8 ant_gain;
++ 	u16 flags;
+++	bool psd_flag;
+++	s8 psd_eirp;
++ };
++ 
++ struct cur_regulatory_info {
++@@ -4137,6 +4206,22 @@ struct cur_regulatory_info {
++ 	u32 num_5ghz_reg_rules;
++ 	struct cur_reg_rule *reg_rules_2ghz_ptr;
++ 	struct cur_reg_rule *reg_rules_5ghz_ptr;
+++	bool is_ext_reg_event;
+++	enum wmi_reg_6ghz_client_type client_type;
+++	bool rnr_tpe_usable;
+++	bool unspecified_ap_usable;
+++	u8 domain_code_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
+++	u8 domain_code_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
+++	u32 domain_code_6ghz_super_id;
+++	u32 min_bw_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
+++	u32 max_bw_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
+++	u32 min_bw_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
+++	u32 max_bw_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
+++	u32 num_6ghz_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
+++	u32 num_6ghz_rules_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
+++	struct cur_reg_rule *reg_rules_6ghz_ap_ptr[WMI_REG_CURRENT_MAX_AP_TYPE];
+++	struct cur_reg_rule *reg_rules_6ghz_client_ptr
+++		[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
++ };
++ 
++ struct wmi_reg_chan_list_cc_event {
++@@ -4163,6 +4248,61 @@ struct wmi_regulatory_rule_struct {
++ 	u32  flag_info;
++ };
++ 
+++#define WMI_REG_CLIENT_MAX 4
+++
+++struct wmi_reg_chan_list_cc_ext_event {
+++	u32 status_code;
+++	u32 phy_id;
+++	u32 alpha2;
+++	u32 num_phy;
+++	u32 country_id;
+++	u32 domain_code;
+++	u32 dfs_region;
+++	u32 phybitmap;
+++	u32 min_bw_2ghz;
+++	u32 max_bw_2ghz;
+++	u32 min_bw_5ghz;
+++	u32 max_bw_5ghz;
+++	u32 num_2ghz_reg_rules;
+++	u32 num_5ghz_reg_rules;
+++	u32 client_type;
+++	u32 rnr_tpe_usable;
+++	u32 unspecified_ap_usable;
+++	u32 domain_code_6ghz_ap_lpi;
+++	u32 domain_code_6ghz_ap_sp;
+++	u32 domain_code_6ghz_ap_vlp;
+++	u32 domain_code_6ghz_client_lpi[WMI_REG_CLIENT_MAX];
+++	u32 domain_code_6ghz_client_sp[WMI_REG_CLIENT_MAX];
+++	u32 domain_code_6ghz_client_vlp[WMI_REG_CLIENT_MAX];
+++	u32 domain_code_6ghz_super_id;
+++	u32 min_bw_6ghz_ap_sp;
+++	u32 max_bw_6ghz_ap_sp;
+++	u32 min_bw_6ghz_ap_lpi;
+++	u32 max_bw_6ghz_ap_lpi;
+++	u32 min_bw_6ghz_ap_vlp;
+++	u32 max_bw_6ghz_ap_vlp;
+++	u32 min_bw_6ghz_client_sp[WMI_REG_CLIENT_MAX];
+++	u32 max_bw_6ghz_client_sp[WMI_REG_CLIENT_MAX];
+++	u32 min_bw_6ghz_client_lpi[WMI_REG_CLIENT_MAX];
+++	u32 max_bw_6ghz_client_lpi[WMI_REG_CLIENT_MAX];
+++	u32 min_bw_6ghz_client_vlp[WMI_REG_CLIENT_MAX];
+++	u32 max_bw_6ghz_client_vlp[WMI_REG_CLIENT_MAX];
+++	u32 num_6ghz_reg_rules_ap_sp;
+++	u32 num_6ghz_reg_rules_ap_lpi;
+++	u32 num_6ghz_reg_rules_ap_vlp;
+++	u32 num_6ghz_reg_rules_client_sp[WMI_REG_CLIENT_MAX];
+++	u32 num_6ghz_reg_rules_client_lpi[WMI_REG_CLIENT_MAX];
+++	u32 num_6ghz_reg_rules_client_vlp[WMI_REG_CLIENT_MAX];
+++} __packed;
+++
+++struct wmi_regulatory_ext_rule {
+++	u32 tlv_header;
+++	u32 freq_info;
+++	u32 bw_pwr_info;
+++	u32 flag_info;
+++	u32 psd_power_info;
+++} __packed;
+++
++ struct wmi_vdev_delete_resp_event {
++ 	u32 vdev_id;
++ } __packed;
++@@ -5358,6 +5498,7 @@ struct target_resource_config {
++ 	u32 sched_params;
++ 	u32 twt_ap_pdev_count;
++ 	u32 twt_ap_sta_count;
+++	u8 is_reg_cc_ext_event_supported;
++ };
++ 
++ enum wmi_debug_log_param {
+diff --git a/package/kernel/mac80211/patches/ath11k/0045-wifi-ath11k-add-debug-prints-in-regulatory-WMI-event.patch b/package/kernel/mac80211/patches/ath11k/0045-wifi-ath11k-add-debug-prints-in-regulatory-WMI-event.patch
+new file mode 100644
+index 0000000000..b88e51928f
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0045-wifi-ath11k-add-debug-prints-in-regulatory-WMI-event.patch
+@@ -0,0 +1,567 @@
++From e238e62ba8868a784e485eb94451c87cd1b85cee Mon Sep 17 00:00:00 2001
++From: Aditya Kumar Singh <quic_adisi@quicinc.com>
++Date: Wed, 1 Mar 2023 16:20:59 +0200
++Subject: [PATCH] wifi: ath11k: add debug prints in regulatory WMI event
++ processing
++
++Add some more debug prints in processing regulatory WMI event in order to
++increase more debuggability.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230110121024.14051-4-quic_adisi@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/reg.c |   2 +-
++ drivers/net/wireless/ath/ath11k/wmi.c | 207 ++++++++++++++++++--------
++ drivers/net/wireless/ath/ath11k/wmi.h | 142 ++++++++++++++++++
++ 3 files changed, 291 insertions(+), 60 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/reg.c
+++++ b/drivers/net/wireless/ath/ath11k/reg.c
++@@ -646,7 +646,7 @@ ath11k_reg_build_regd(struct ath11k_base
++ 	tmp_regd->dfs_region = ath11k_map_fw_dfs_region(reg_info->dfs_region);
++ 
++ 	ath11k_dbg(ab, ATH11K_DBG_REG,
++-		   "\r\nCountry %s, CFG Regdomain %s FW Regdomain %d, num_reg_rules %d\n",
+++		   "Country %s, CFG Regdomain %s FW Regdomain %d, num_reg_rules %d\n",
++ 		   alpha2, ath11k_reg_get_regdom_str(tmp_regd->dfs_region),
++ 		   reg_info->dfs_region, num_rules);
++ 	/* Update reg_rules[] below. Firmware is expected to
++--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++++ b/drivers/net/wireless/ath/ath11k/wmi.c
++@@ -4925,6 +4925,26 @@ static int ath11k_pull_vdev_start_resp_t
++ 	return 0;
++ }
++ 
+++static void ath11k_print_reg_rule(struct ath11k_base *ab, const char *band,
+++				  u32 num_reg_rules,
+++				  struct cur_reg_rule *reg_rule_ptr)
+++{
+++	struct cur_reg_rule *reg_rule = reg_rule_ptr;
+++	u32 count;
+++
+++	ath11k_dbg(ab, ATH11K_DBG_WMI, "number of reg rules in %s band: %d\n",
+++		   band, num_reg_rules);
+++
+++	for (count = 0; count < num_reg_rules; count++) {
+++		ath11k_dbg(ab, ATH11K_DBG_WMI,
+++			   "reg rule %d: (%d - %d @ %d) (%d, %d) (FLAGS %d)\n",
+++			   count + 1, reg_rule->start_freq, reg_rule->end_freq,
+++			   reg_rule->max_bw, reg_rule->ant_gain,
+++			   reg_rule->reg_power, reg_rule->flags);
+++		reg_rule++;
+++	}
+++}
+++
++ static struct cur_reg_rule
++ *create_reg_rules_from_wmi(u32 num_reg_rules,
++ 			   struct wmi_regulatory_rule_struct *wmi_reg_rule)
++@@ -5006,6 +5026,10 @@ static int ath11k_pull_reg_chan_list_upd
++ 	reg_info->ctry_code = chan_list_event_hdr->country_id;
++ 	reg_info->reg_dmn_pair = chan_list_event_hdr->domain_code;
++ 
+++	ath11k_dbg(ab, ATH11K_DBG_WMI,
+++		   "status_code %s",
+++		   ath11k_cc_status_to_str(reg_info->status_code));
+++
++ 	reg_info->status_code =
++ 		ath11k_wmi_cc_setting_code_to_reg(chan_list_event_hdr->status_code);
++ 
++@@ -5020,13 +5044,13 @@ static int ath11k_pull_reg_chan_list_upd
++ 	num_5ghz_reg_rules = reg_info->num_5ghz_reg_rules;
++ 
++ 	ath11k_dbg(ab, ATH11K_DBG_WMI,
++-		   "%s:cc %s dsf %d BW: min_2ghz %d max_2ghz %d min_5ghz %d max_5ghz %d",
++-		   __func__, reg_info->alpha2, reg_info->dfs_region,
+++		   "cc %s dsf %d BW: min_2ghz %d max_2ghz %d min_5ghz %d max_5ghz %d",
+++		   reg_info->alpha2, reg_info->dfs_region,
++ 		   reg_info->min_bw_2ghz, reg_info->max_bw_2ghz,
++ 		   reg_info->min_bw_5ghz, reg_info->max_bw_5ghz);
++ 
++ 	ath11k_dbg(ab, ATH11K_DBG_WMI,
++-		   "%s: num_2ghz_reg_rules %d num_5ghz_reg_rules %d", __func__,
+++		   "num_2ghz_reg_rules %d num_5ghz_reg_rules %d",
++ 		   num_2ghz_reg_rules, num_5ghz_reg_rules);
++ 
++ 	wmi_reg_rule =
++@@ -5043,6 +5067,10 @@ static int ath11k_pull_reg_chan_list_upd
++ 			ath11k_warn(ab, "Unable to Allocate memory for 2 GHz rules\n");
++ 			return -ENOMEM;
++ 		}
+++
+++		ath11k_print_reg_rule(ab, "2 GHz",
+++				      num_2ghz_reg_rules,
+++				      reg_info->reg_rules_2ghz_ptr);
++ 	}
++ 
++ 	if (num_5ghz_reg_rules) {
++@@ -5055,6 +5083,10 @@ static int ath11k_pull_reg_chan_list_upd
++ 			ath11k_warn(ab, "Unable to Allocate memory for 5 GHz rules\n");
++ 			return -ENOMEM;
++ 		}
+++
+++		ath11k_print_reg_rule(ab, "5 GHz",
+++				      num_5ghz_reg_rules,
+++				      reg_info->reg_rules_5ghz_ptr);
++ 	}
++ 
++ 	ath11k_dbg(ab, ATH11K_DBG_WMI, "processed regulatory channel list\n");
++@@ -5128,7 +5160,7 @@ static int ath11k_pull_reg_chan_list_ext
++ 						   struct cur_regulatory_info *reg_info)
++ {
++ 	const void **tb;
++-	const struct wmi_reg_chan_list_cc_ext_event *ext_chan_list_event_hdr;
+++	const struct wmi_reg_chan_list_cc_ext_event *ev;
++ 	struct wmi_regulatory_ext_rule *ext_wmi_reg_rule;
++ 	u32 num_2ghz_reg_rules, num_5ghz_reg_rules;
++ 	u32 num_6ghz_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
++@@ -5145,31 +5177,29 @@ static int ath11k_pull_reg_chan_list_ext
++ 		return ret;
++ 	}
++ 
++-	ext_chan_list_event_hdr = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT];
++-	if (!ext_chan_list_event_hdr) {
+++	ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT];
+++	if (!ev) {
++ 		ath11k_warn(ab, "failed to fetch reg chan list ext update ev\n");
++ 		kfree(tb);
++ 		return -EPROTO;
++ 	}
++ 
++-	reg_info->num_2ghz_reg_rules =
++-			ext_chan_list_event_hdr->num_2ghz_reg_rules;
++-	reg_info->num_5ghz_reg_rules =
++-			ext_chan_list_event_hdr->num_5ghz_reg_rules;
+++	reg_info->num_2ghz_reg_rules = ev->num_2ghz_reg_rules;
+++	reg_info->num_5ghz_reg_rules = ev->num_5ghz_reg_rules;
++ 	reg_info->num_6ghz_rules_ap[WMI_REG_INDOOR_AP] =
++-			ext_chan_list_event_hdr->num_6ghz_reg_rules_ap_lpi;
+++			ev->num_6ghz_reg_rules_ap_lpi;
++ 	reg_info->num_6ghz_rules_ap[WMI_REG_STANDARD_POWER_AP] =
++-			ext_chan_list_event_hdr->num_6ghz_reg_rules_ap_sp;
+++			ev->num_6ghz_reg_rules_ap_sp;
++ 	reg_info->num_6ghz_rules_ap[WMI_REG_VERY_LOW_POWER_AP] =
++-			ext_chan_list_event_hdr->num_6ghz_reg_rules_ap_vlp;
+++			ev->num_6ghz_reg_rules_ap_vlp;
++ 
++ 	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
++ 		reg_info->num_6ghz_rules_client[WMI_REG_INDOOR_AP][i] =
++-			ext_chan_list_event_hdr->num_6ghz_reg_rules_client_lpi[i];
+++			ev->num_6ghz_reg_rules_client_lpi[i];
++ 		reg_info->num_6ghz_rules_client[WMI_REG_STANDARD_POWER_AP][i] =
++-			ext_chan_list_event_hdr->num_6ghz_reg_rules_client_sp[i];
+++			ev->num_6ghz_reg_rules_client_sp[i];
++ 		reg_info->num_6ghz_rules_client[WMI_REG_VERY_LOW_POWER_AP][i] =
++-			ext_chan_list_event_hdr->num_6ghz_reg_rules_client_vlp[i];
+++			ev->num_6ghz_reg_rules_client_vlp[i];
++ 	}
++ 
++ 	num_2ghz_reg_rules = reg_info->num_2ghz_reg_rules;
++@@ -5231,57 +5261,79 @@ static int ath11k_pull_reg_chan_list_ext
++ 		return -EINVAL;
++ 	}
++ 
++-	memcpy(reg_info->alpha2, &ext_chan_list_event_hdr->alpha2,
++-	       REG_ALPHA2_LEN);
+++	memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN);
+++
+++	reg_info->dfs_region = ev->dfs_region;
+++	reg_info->phybitmap = ev->phybitmap;
+++	reg_info->num_phy = ev->num_phy;
+++	reg_info->phy_id = ev->phy_id;
+++	reg_info->ctry_code = ev->country_id;
+++	reg_info->reg_dmn_pair = ev->domain_code;
++ 
++-	reg_info->dfs_region = ext_chan_list_event_hdr->dfs_region;
++-	reg_info->phybitmap = ext_chan_list_event_hdr->phybitmap;
++-	reg_info->num_phy = ext_chan_list_event_hdr->num_phy;
++-	reg_info->phy_id = ext_chan_list_event_hdr->phy_id;
++-	reg_info->ctry_code = ext_chan_list_event_hdr->country_id;
++-	reg_info->reg_dmn_pair = ext_chan_list_event_hdr->domain_code;
+++	ath11k_dbg(ab, ATH11K_DBG_WMI,
+++		   "status_code %s",
+++		   ath11k_cc_status_to_str(reg_info->status_code));
++ 
++ 	reg_info->status_code =
++-		ath11k_wmi_cc_setting_code_to_reg(ext_chan_list_event_hdr->status_code);
+++		ath11k_wmi_cc_setting_code_to_reg(ev->status_code);
++ 
++ 	reg_info->is_ext_reg_event = true;
++ 
++-	reg_info->min_bw_2ghz = ext_chan_list_event_hdr->min_bw_2ghz;
++-	reg_info->max_bw_2ghz = ext_chan_list_event_hdr->max_bw_2ghz;
++-	reg_info->min_bw_5ghz = ext_chan_list_event_hdr->min_bw_5ghz;
++-	reg_info->max_bw_5ghz = ext_chan_list_event_hdr->max_bw_5ghz;
+++	reg_info->min_bw_2ghz = ev->min_bw_2ghz;
+++	reg_info->max_bw_2ghz = ev->max_bw_2ghz;
+++	reg_info->min_bw_5ghz = ev->min_bw_5ghz;
+++	reg_info->max_bw_5ghz = ev->max_bw_5ghz;
++ 
++ 	reg_info->min_bw_6ghz_ap[WMI_REG_INDOOR_AP] =
++-			ext_chan_list_event_hdr->min_bw_6ghz_ap_lpi;
+++			ev->min_bw_6ghz_ap_lpi;
++ 	reg_info->max_bw_6ghz_ap[WMI_REG_INDOOR_AP] =
++-			 ext_chan_list_event_hdr->max_bw_6ghz_ap_lpi;
+++			ev->max_bw_6ghz_ap_lpi;
++ 	reg_info->min_bw_6ghz_ap[WMI_REG_STANDARD_POWER_AP] =
++-			ext_chan_list_event_hdr->min_bw_6ghz_ap_sp;
+++			ev->min_bw_6ghz_ap_sp;
++ 	reg_info->max_bw_6ghz_ap[WMI_REG_STANDARD_POWER_AP] =
++-			ext_chan_list_event_hdr->max_bw_6ghz_ap_sp;
+++			ev->max_bw_6ghz_ap_sp;
++ 	reg_info->min_bw_6ghz_ap[WMI_REG_VERY_LOW_POWER_AP] =
++-			ext_chan_list_event_hdr->min_bw_6ghz_ap_vlp;
+++			ev->min_bw_6ghz_ap_vlp;
++ 	reg_info->max_bw_6ghz_ap[WMI_REG_VERY_LOW_POWER_AP] =
++-			ext_chan_list_event_hdr->max_bw_6ghz_ap_vlp;
+++			ev->max_bw_6ghz_ap_vlp;
+++
+++	ath11k_dbg(ab, ATH11K_DBG_WMI,
+++		   "6 GHz AP BW: LPI (%d - %d), SP (%d - %d), VLP (%d - %d)\n",
+++		   reg_info->min_bw_6ghz_ap[WMI_REG_INDOOR_AP],
+++		   reg_info->max_bw_6ghz_ap[WMI_REG_INDOOR_AP],
+++		   reg_info->min_bw_6ghz_ap[WMI_REG_STANDARD_POWER_AP],
+++		   reg_info->max_bw_6ghz_ap[WMI_REG_STANDARD_POWER_AP],
+++		   reg_info->min_bw_6ghz_ap[WMI_REG_VERY_LOW_POWER_AP],
+++		   reg_info->max_bw_6ghz_ap[WMI_REG_VERY_LOW_POWER_AP]);
++ 
++ 	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
++ 		reg_info->min_bw_6ghz_client[WMI_REG_INDOOR_AP][i] =
++-				ext_chan_list_event_hdr->min_bw_6ghz_client_lpi[i];
+++				ev->min_bw_6ghz_client_lpi[i];
++ 		reg_info->max_bw_6ghz_client[WMI_REG_INDOOR_AP][i] =
++-				ext_chan_list_event_hdr->max_bw_6ghz_client_lpi[i];
+++				ev->max_bw_6ghz_client_lpi[i];
++ 		reg_info->min_bw_6ghz_client[WMI_REG_STANDARD_POWER_AP][i] =
++-				ext_chan_list_event_hdr->min_bw_6ghz_client_sp[i];
+++				ev->min_bw_6ghz_client_sp[i];
++ 		reg_info->max_bw_6ghz_client[WMI_REG_STANDARD_POWER_AP][i] =
++-				ext_chan_list_event_hdr->max_bw_6ghz_client_sp[i];
+++				ev->max_bw_6ghz_client_sp[i];
++ 		reg_info->min_bw_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i] =
++-				ext_chan_list_event_hdr->min_bw_6ghz_client_vlp[i];
+++				ev->min_bw_6ghz_client_vlp[i];
++ 		reg_info->max_bw_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i] =
++-				ext_chan_list_event_hdr->max_bw_6ghz_client_vlp[i];
+++				ev->max_bw_6ghz_client_vlp[i];
+++
+++		ath11k_dbg(ab, ATH11K_DBG_WMI,
+++			   "6 GHz %s BW: LPI (%d - %d), SP (%d - %d), VLP (%d - %d)\n",
+++			   ath11k_6ghz_client_type_to_str(i),
+++			   reg_info->min_bw_6ghz_client[WMI_REG_INDOOR_AP][i],
+++			   reg_info->max_bw_6ghz_client[WMI_REG_INDOOR_AP][i],
+++			   reg_info->min_bw_6ghz_client[WMI_REG_STANDARD_POWER_AP][i],
+++			   reg_info->max_bw_6ghz_client[WMI_REG_STANDARD_POWER_AP][i],
+++			   reg_info->min_bw_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i],
+++			   reg_info->max_bw_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i]);
++ 	}
++ 
++ 	ath11k_dbg(ab, ATH11K_DBG_WMI,
++-		   "%s:cc_ext %s dsf %d BW: min_2ghz %d max_2ghz %d min_5ghz %d max_5ghz %d",
++-		   __func__, reg_info->alpha2, reg_info->dfs_region,
+++		   "cc_ext %s dsf %d BW: min_2ghz %d max_2ghz %d min_5ghz %d max_5ghz %d",
+++		   reg_info->alpha2, reg_info->dfs_region,
++ 		   reg_info->min_bw_2ghz, reg_info->max_bw_2ghz,
++ 		   reg_info->min_bw_5ghz, reg_info->max_bw_5ghz);
++ 
++@@ -5310,9 +5362,8 @@ static int ath11k_pull_reg_chan_list_ext
++ 		   num_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][j]);
++ 
++ 	ext_wmi_reg_rule =
++-		(struct wmi_regulatory_ext_rule *)((u8 *)ext_chan_list_event_hdr
++-						   + sizeof(*ext_chan_list_event_hdr)
++-						   + sizeof(struct wmi_tlv));
+++		(struct wmi_regulatory_ext_rule *)((u8 *)ev + sizeof(*ev) +
+++						   sizeof(struct wmi_tlv));
++ 	if (num_2ghz_reg_rules) {
++ 		reg_info->reg_rules_2ghz_ptr =
++ 			create_ext_reg_rules_from_wmi(num_2ghz_reg_rules,
++@@ -5323,6 +5374,10 @@ static int ath11k_pull_reg_chan_list_ext
++ 			ath11k_warn(ab, "Unable to Allocate memory for 2 GHz rules\n");
++ 			return -ENOMEM;
++ 		}
+++
+++		ath11k_print_reg_rule(ab, "2 GHz",
+++				      num_2ghz_reg_rules,
+++				      reg_info->reg_rules_2ghz_ptr);
++ 	}
++ 
++ 	ext_wmi_reg_rule += num_2ghz_reg_rules;
++@@ -5358,6 +5413,10 @@ static int ath11k_pull_reg_chan_list_ext
++ 			ath11k_warn(ab, "Unable to Allocate memory for 5 GHz rules\n");
++ 			return -ENOMEM;
++ 		}
+++
+++		ath11k_print_reg_rule(ab, "5 GHz",
+++				      num_5ghz_reg_rules,
+++				      reg_info->reg_rules_5ghz_ptr);
++ 	}
++ 
++ 	/* We have adjusted the number of 5 GHz reg rules above. But still those
++@@ -5378,10 +5437,17 @@ static int ath11k_pull_reg_chan_list_ext
++ 			return -ENOMEM;
++ 		}
++ 
+++		ath11k_print_reg_rule(ab, ath11k_6ghz_ap_type_to_str(i),
+++				      num_6ghz_reg_rules_ap[i],
+++				      reg_info->reg_rules_6ghz_ap_ptr[i]);
+++
++ 		ext_wmi_reg_rule += num_6ghz_reg_rules_ap[i];
++ 	}
++ 
++ 	for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) {
+++		ath11k_dbg(ab, ATH11K_DBG_WMI,
+++			   "6 GHz AP type %s", ath11k_6ghz_ap_type_to_str(j));
+++
++ 		for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
++ 			reg_info->reg_rules_6ghz_client_ptr[j][i] =
++ 				create_ext_reg_rules_from_wmi(num_6ghz_client[j][i],
++@@ -5393,35 +5459,58 @@ static int ath11k_pull_reg_chan_list_ext
++ 				return -ENOMEM;
++ 			}
++ 
+++			ath11k_print_reg_rule(ab,
+++					      ath11k_6ghz_client_type_to_str(i),
+++					      num_6ghz_client[j][i],
+++					      reg_info->reg_rules_6ghz_client_ptr[j][i]);
+++
++ 			ext_wmi_reg_rule += num_6ghz_client[j][i];
++ 		}
++ 	}
++ 
++-	reg_info->client_type = ext_chan_list_event_hdr->client_type;
++-	reg_info->rnr_tpe_usable = ext_chan_list_event_hdr->rnr_tpe_usable;
+++	reg_info->client_type = ev->client_type;
+++	reg_info->rnr_tpe_usable = ev->rnr_tpe_usable;
++ 	reg_info->unspecified_ap_usable =
++-			ext_chan_list_event_hdr->unspecified_ap_usable;
+++			ev->unspecified_ap_usable;
++ 	reg_info->domain_code_6ghz_ap[WMI_REG_INDOOR_AP] =
++-			ext_chan_list_event_hdr->domain_code_6ghz_ap_lpi;
+++			ev->domain_code_6ghz_ap_lpi;
++ 	reg_info->domain_code_6ghz_ap[WMI_REG_STANDARD_POWER_AP] =
++-			ext_chan_list_event_hdr->domain_code_6ghz_ap_sp;
+++			ev->domain_code_6ghz_ap_sp;
++ 	reg_info->domain_code_6ghz_ap[WMI_REG_VERY_LOW_POWER_AP] =
++-			ext_chan_list_event_hdr->domain_code_6ghz_ap_vlp;
+++			ev->domain_code_6ghz_ap_vlp;
+++
+++	ath11k_dbg(ab, ATH11K_DBG_WMI,
+++		   "6 GHz reg info client type %s rnr_tpe_usable %d unspecified_ap_usable %d AP sub domain: lpi %s, sp %s, vlp %s\n",
+++		   ath11k_6ghz_client_type_to_str(reg_info->client_type),
+++		   reg_info->rnr_tpe_usable,
+++		   reg_info->unspecified_ap_usable,
+++		   ath11k_sub_reg_6ghz_to_str(ev->domain_code_6ghz_ap_lpi),
+++		   ath11k_sub_reg_6ghz_to_str(ev->domain_code_6ghz_ap_sp),
+++		   ath11k_sub_reg_6ghz_to_str(ev->domain_code_6ghz_ap_vlp));
++ 
++ 	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
++ 		reg_info->domain_code_6ghz_client[WMI_REG_INDOOR_AP][i] =
++-				ext_chan_list_event_hdr->domain_code_6ghz_client_lpi[i];
+++				ev->domain_code_6ghz_client_lpi[i];
++ 		reg_info->domain_code_6ghz_client[WMI_REG_STANDARD_POWER_AP][i] =
++-				ext_chan_list_event_hdr->domain_code_6ghz_client_sp[i];
+++				ev->domain_code_6ghz_client_sp[i];
++ 		reg_info->domain_code_6ghz_client[WMI_REG_VERY_LOW_POWER_AP][i] =
++-				ext_chan_list_event_hdr->domain_code_6ghz_client_vlp[i];
+++				ev->domain_code_6ghz_client_vlp[i];
+++
+++		ath11k_dbg(ab, ATH11K_DBG_WMI,
+++			   "6 GHz client type %s client sub domain: lpi %s, sp %s, vlp %s\n",
+++			   ath11k_6ghz_client_type_to_str(i),
+++			   ath11k_sub_reg_6ghz_to_str(ev->domain_code_6ghz_client_lpi[i]),
+++			   ath11k_sub_reg_6ghz_to_str(ev->domain_code_6ghz_client_sp[i]),
+++			   ath11k_sub_reg_6ghz_to_str(ev->domain_code_6ghz_client_vlp[i])
+++			  );
++ 	}
++ 
++-	reg_info->domain_code_6ghz_super_id =
++-			ext_chan_list_event_hdr->domain_code_6ghz_super_id;
+++	reg_info->domain_code_6ghz_super_id = ev->domain_code_6ghz_super_id;
++ 
++-	ath11k_dbg(ab, ATH11K_DBG_WMI, "6 GHz client_type: %d domain_code_6ghz_super_id: %d",
++-		   reg_info->client_type, reg_info->domain_code_6ghz_super_id);
+++	ath11k_dbg(ab, ATH11K_DBG_WMI,
+++		   "6 GHz client_type %s 6 GHz super domain %s",
+++		   ath11k_6ghz_client_type_to_str(reg_info->client_type),
+++		   ath11k_super_reg_6ghz_to_str(reg_info->domain_code_6ghz_super_id));
++ 
++ 	ath11k_dbg(ab, ATH11K_DBG_WMI, "processed regulatory ext channel list\n");
++ 
++--- a/drivers/net/wireless/ath/ath11k/wmi.h
+++++ b/drivers/net/wireless/ath/ath11k/wmi.h
++@@ -4139,6 +4139,7 @@ enum cc_setting_code {
++ 
++ 	/* add new setting code above, update in
++ 	 * @enum wmi_reg_cc_setting_code as well.
+++	 * Also handle it in ath11k_cc_status_to_str()
++ 	 */
++ };
++ 
++@@ -4163,21 +4164,162 @@ ath11k_wmi_cc_setting_code_to_reg(enum w
++ 	return REG_SET_CC_STATUS_FAIL;
++ }
++ 
+++static inline const char *ath11k_cc_status_to_str(enum cc_setting_code code)
+++{
+++	switch (code) {
+++	case REG_SET_CC_STATUS_PASS:
+++		return "REG_SET_CC_STATUS_PASS";
+++	case REG_CURRENT_ALPHA2_NOT_FOUND:
+++		return "REG_CURRENT_ALPHA2_NOT_FOUND";
+++	case REG_INIT_ALPHA2_NOT_FOUND:
+++		return "REG_INIT_ALPHA2_NOT_FOUND";
+++	case REG_SET_CC_CHANGE_NOT_ALLOWED:
+++		return "REG_SET_CC_CHANGE_NOT_ALLOWED";
+++	case REG_SET_CC_STATUS_NO_MEMORY:
+++		return "REG_SET_CC_STATUS_NO_MEMORY";
+++	case REG_SET_CC_STATUS_FAIL:
+++		return "REG_SET_CC_STATUS_FAIL";
+++	}
+++
+++	return "Unknown CC status";
+++}
+++
++ enum wmi_reg_6ghz_ap_type {
++ 	WMI_REG_INDOOR_AP = 0,
++ 	WMI_REG_STANDARD_POWER_AP = 1,
++ 	WMI_REG_VERY_LOW_POWER_AP = 2,
++ 
+++	/* add AP type above, handle in ath11k_6ghz_ap_type_to_str()
+++	 */
++ 	WMI_REG_CURRENT_MAX_AP_TYPE,
++ 	WMI_REG_MAX_AP_TYPE = 7,
++ };
++ 
+++static inline const char *
+++ath11k_6ghz_ap_type_to_str(enum wmi_reg_6ghz_ap_type type)
+++{
+++	switch (type) {
+++	case WMI_REG_INDOOR_AP:
+++		return "INDOOR AP";
+++	case WMI_REG_STANDARD_POWER_AP:
+++		return "STANDARD POWER AP";
+++	case WMI_REG_VERY_LOW_POWER_AP:
+++		return "VERY LOW POWER AP";
+++	case WMI_REG_CURRENT_MAX_AP_TYPE:
+++		return "CURRENT_MAX_AP_TYPE";
+++	case WMI_REG_MAX_AP_TYPE:
+++		return "MAX_AP_TYPE";
+++	}
+++
+++	return "unknown 6 GHz AP type";
+++}
+++
++ enum wmi_reg_6ghz_client_type {
++ 	WMI_REG_DEFAULT_CLIENT = 0,
++ 	WMI_REG_SUBORDINATE_CLIENT = 1,
++ 	WMI_REG_MAX_CLIENT_TYPE = 2,
+++
+++	/* add client type above, handle it in
+++	 * ath11k_6ghz_client_type_to_str()
+++	 */
+++};
+++
+++static inline const char *
+++ath11k_6ghz_client_type_to_str(enum wmi_reg_6ghz_client_type type)
+++{
+++	switch (type) {
+++	case WMI_REG_DEFAULT_CLIENT:
+++		return "DEFAULT CLIENT";
+++	case WMI_REG_SUBORDINATE_CLIENT:
+++		return "SUBORDINATE CLIENT";
+++	case WMI_REG_MAX_CLIENT_TYPE:
+++		return "MAX_CLIENT_TYPE";
+++	}
+++
+++	return "unknown 6 GHz client type";
+++}
+++
+++enum reg_subdomains_6ghz {
+++	EMPTY_6GHZ = 0x0,
+++	FCC1_CLIENT_LPI_REGULAR_6GHZ = 0x01,
+++	FCC1_CLIENT_SP_6GHZ = 0x02,
+++	FCC1_AP_LPI_6GHZ = 0x03,
+++	FCC1_CLIENT_LPI_SUBORDINATE = FCC1_AP_LPI_6GHZ,
+++	FCC1_AP_SP_6GHZ = 0x04,
+++	ETSI1_LPI_6GHZ = 0x10,
+++	ETSI1_VLP_6GHZ = 0x11,
+++	ETSI2_LPI_6GHZ = 0x12,
+++	ETSI2_VLP_6GHZ = 0x13,
+++	APL1_LPI_6GHZ = 0x20,
+++	APL1_VLP_6GHZ = 0x21,
+++
+++	/* add sub-domain above, handle it in
+++	 * ath11k_sub_reg_6ghz_to_str()
+++	 */
+++};
+++
+++static inline const char *
+++ath11k_sub_reg_6ghz_to_str(enum reg_subdomains_6ghz sub_id)
+++{
+++	switch (sub_id) {
+++	case EMPTY_6GHZ:
+++		return "N/A";
+++	case FCC1_CLIENT_LPI_REGULAR_6GHZ:
+++		return "FCC1_CLIENT_LPI_REGULAR_6GHZ";
+++	case FCC1_CLIENT_SP_6GHZ:
+++		return "FCC1_CLIENT_SP_6GHZ";
+++	case FCC1_AP_LPI_6GHZ:
+++		return "FCC1_AP_LPI_6GHZ/FCC1_CLIENT_LPI_SUBORDINATE";
+++	case FCC1_AP_SP_6GHZ:
+++		return "FCC1_AP_SP_6GHZ";
+++	case ETSI1_LPI_6GHZ:
+++		return "ETSI1_LPI_6GHZ";
+++	case ETSI1_VLP_6GHZ:
+++		return "ETSI1_VLP_6GHZ";
+++	case ETSI2_LPI_6GHZ:
+++		return "ETSI2_LPI_6GHZ";
+++	case ETSI2_VLP_6GHZ:
+++		return "ETSI2_VLP_6GHZ";
+++	case APL1_LPI_6GHZ:
+++		return "APL1_LPI_6GHZ";
+++	case APL1_VLP_6GHZ:
+++		return "APL1_VLP_6GHZ";
+++	}
+++
+++	return "unknown sub reg id";
+++}
+++
+++enum reg_super_domain_6ghz {
+++	FCC1_6GHZ = 0x01,
+++	ETSI1_6GHZ = 0x02,
+++	ETSI2_6GHZ = 0x03,
+++	APL1_6GHZ = 0x04,
+++	FCC1_6GHZ_CL = 0x05,
+++
+++	/* add super domain above, handle it in
+++	 * ath11k_super_reg_6ghz_to_str()
+++	 */
++ };
++ 
+++static inline const char *
+++ath11k_super_reg_6ghz_to_str(enum reg_super_domain_6ghz domain_id)
+++{
+++	switch (domain_id) {
+++	case FCC1_6GHZ:
+++		return "FCC1_6GHZ";
+++	case ETSI1_6GHZ:
+++		return "ETSI1_6GHZ";
+++	case ETSI2_6GHZ:
+++		return "ETSI2_6GHZ";
+++	case APL1_6GHZ:
+++		return "APL1_6GHZ";
+++	case FCC1_6GHZ_CL:
+++		return "FCC1_6GHZ_CL";
+++	}
+++
+++	return "unknown domain id";
+++}
+++
++ struct cur_reg_rule {
++ 	u16 start_freq;
++ 	u16 end_freq;
+diff --git a/package/kernel/mac80211/patches/ath11k/0046-wifi-ath11k-Replace-fake-flex-array-with-flexible-ar.patch b/package/kernel/mac80211/patches/ath11k/0046-wifi-ath11k-Replace-fake-flex-array-with-flexible-ar.patch
+new file mode 100644
+index 0000000000..bd16178564
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0046-wifi-ath11k-Replace-fake-flex-array-with-flexible-ar.patch
+@@ -0,0 +1,246 @@
++From 3b1088a09ec9438523c251d8435e78988824bc0d Mon Sep 17 00:00:00 2001
++From: "Gustavo A. R. Silva" <gustavoars@kernel.org>
++Date: Tue, 7 Mar 2023 16:22:39 -0600
++Subject: [PATCH] wifi: ath11k: Replace fake flex-array with flexible-array
++ member
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++Zero-length arrays as fake flexible arrays are deprecated and we are
++moving towards adopting C99 flexible-array members instead.
++
++Address 25 of the following warnings found with GCC-13 and
++-fstrict-flex-arrays=3 enabled:
++drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c:30:51: warning: array subscript <unknown> is outside array bounds of ‘const u32[0]’ {aka ‘const unsigned int[]’} [-Warray-bounds=]
++
++This helps with the ongoing efforts to tighten the FORTIFY_SOURCE
++routines on memcpy() and help us make progress towards globally
++enabling -fstrict-flex-arrays=3 [1].
++
++Link: https://github.com/KSPP/linux/issues/21
++Link: https://github.com/KSPP/linux/issues/266
++Link: https://gcc.gnu.org/pipermail/gcc-patches/2022-October/602902.html [1]
++Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
++Reviewed-by: Simon Horman <simon.horman@corigine.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/ZAe5L5DtmsQxzqRH@work
++---
++ .../wireless/ath/ath11k/debugfs_htt_stats.h   | 73 +++++++++++--------
++ 1 file changed, 43 insertions(+), 30 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.h
+++++ b/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.h
++@@ -143,7 +143,8 @@ enum htt_tx_pdev_underrun_enum {
++ /* Bytes stored in little endian order */
++ /* Length should be multiple of DWORD */
++ struct htt_stats_string_tlv {
++-	u32 data[0]; /* Can be variable length */
+++	 /* Can be variable length */
+++	DECLARE_FLEX_ARRAY(u32, data);
++ } __packed;
++ 
++ #define HTT_STATS_MAC_ID	GENMASK(7, 0)
++@@ -205,27 +206,32 @@ struct htt_tx_pdev_stats_cmn_tlv {
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_tx_pdev_stats_urrn_tlv_v {
++-	u32 urrn_stats[0]; /* HTT_TX_PDEV_MAX_URRN_STATS */
+++	/* HTT_TX_PDEV_MAX_URRN_STATS */
+++	DECLARE_FLEX_ARRAY(u32, urrn_stats);
++ };
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_tx_pdev_stats_flush_tlv_v {
++-	u32 flush_errs[0]; /* HTT_TX_PDEV_MAX_FLUSH_REASON_STATS */
+++	/* HTT_TX_PDEV_MAX_FLUSH_REASON_STATS */
+++	DECLARE_FLEX_ARRAY(u32, flush_errs);
++ };
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_tx_pdev_stats_sifs_tlv_v {
++-	u32 sifs_status[0]; /* HTT_TX_PDEV_MAX_SIFS_BURST_STATS */
+++	/* HTT_TX_PDEV_MAX_SIFS_BURST_STATS */
+++	DECLARE_FLEX_ARRAY(u32, sifs_status);
++ };
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_tx_pdev_stats_phy_err_tlv_v {
++-	u32  phy_errs[0]; /* HTT_TX_PDEV_MAX_PHY_ERR_STATS */
+++	/* HTT_TX_PDEV_MAX_PHY_ERR_STATS */
+++	DECLARE_FLEX_ARRAY(u32, phy_errs);
++ };
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_tx_pdev_stats_sifs_hist_tlv_v {
++-	u32 sifs_hist_status[0]; /* HTT_TX_PDEV_SIFS_BURST_HIST_STATS */
+++	/* HTT_TX_PDEV_SIFS_BURST_HIST_STATS */
+++	DECLARE_FLEX_ARRAY(u32, sifs_hist_status);
++ };
++ 
++ struct htt_tx_pdev_stats_tx_ppdu_stats_tlv_v {
++@@ -590,20 +596,20 @@ struct htt_tx_hwq_difs_latency_stats_tlv
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_tx_hwq_cmd_result_stats_tlv_v {
++-	/* Histogram of sched cmd result */
++-	u32 cmd_result[0]; /* HTT_TX_HWQ_MAX_CMD_RESULT_STATS */
+++	/* Histogram of sched cmd result, HTT_TX_HWQ_MAX_CMD_RESULT_STATS */
+++	DECLARE_FLEX_ARRAY(u32, cmd_result);
++ };
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_tx_hwq_cmd_stall_stats_tlv_v {
++-	/* Histogram of various pause conitions */
++-	u32 cmd_stall_status[0]; /* HTT_TX_HWQ_MAX_CMD_STALL_STATS */
+++	/* Histogram of various pause conitions, HTT_TX_HWQ_MAX_CMD_STALL_STATS */
+++	DECLARE_FLEX_ARRAY(u32, cmd_stall_status);
++ };
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_tx_hwq_fes_result_stats_tlv_v {
++-	/* Histogram of number of user fes result */
++-	u32 fes_result[0]; /* HTT_TX_HWQ_MAX_FES_RESULT_STATS */
+++	/* Histogram of number of user fes result, HTT_TX_HWQ_MAX_FES_RESULT_STATS */
+++	DECLARE_FLEX_ARRAY(u32, fes_result);
++ };
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size
++@@ -635,8 +641,8 @@ struct htt_tx_hwq_tried_mpdu_cnt_hist_tl
++  * #define WAL_TXOP_USED_HISTOGRAM_INTERVAL 1000 ( 1 ms )
++  */
++ struct htt_tx_hwq_txop_used_cnt_hist_tlv_v {
++-	/* Histogram of txop used cnt */
++-	u32 txop_used_cnt_hist[0]; /* HTT_TX_HWQ_TXOP_USED_CNT_HIST */
+++	/* Histogram of txop used cnt,  HTT_TX_HWQ_TXOP_USED_CNT_HIST */
+++	DECLARE_FLEX_ARRAY(u32, txop_used_cnt_hist);
++ };
++ 
++ /* == TX SELFGEN STATS == */
++@@ -804,17 +810,20 @@ struct htt_tx_pdev_mpdu_stats_tlv {
++ /* == TX SCHED STATS == */
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_sched_txq_cmd_posted_tlv_v {
++-	u32 sched_cmd_posted[0]; /* HTT_TX_PDEV_SCHED_TX_MODE_MAX */
+++	/* HTT_TX_PDEV_SCHED_TX_MODE_MAX */
+++	DECLARE_FLEX_ARRAY(u32, sched_cmd_posted);
++ };
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_sched_txq_cmd_reaped_tlv_v {
++-	u32 sched_cmd_reaped[0]; /* HTT_TX_PDEV_SCHED_TX_MODE_MAX */
+++	/* HTT_TX_PDEV_SCHED_TX_MODE_MAX */
+++	DECLARE_FLEX_ARRAY(u32, sched_cmd_reaped);
++ };
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_sched_txq_sched_order_su_tlv_v {
++-	u32 sched_order_su[0]; /* HTT_TX_PDEV_NUM_SCHED_ORDER_LOG */
+++	/* HTT_TX_PDEV_NUM_SCHED_ORDER_LOG */
+++	DECLARE_FLEX_ARRAY(u32, sched_order_su);
++ };
++ 
++ enum htt_sched_txq_sched_ineligibility_tlv_enum {
++@@ -842,7 +851,7 @@ enum htt_sched_txq_sched_ineligibility_t
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_sched_txq_sched_ineligibility_tlv_v {
++ 	/* indexed by htt_sched_txq_sched_ineligibility_tlv_enum */
++-	u32 sched_ineligibility[0];
+++	DECLARE_FLEX_ARRAY(u32, sched_ineligibility);
++ };
++ 
++ #define	HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID	GENMASK(7, 0)
++@@ -888,18 +897,20 @@ struct htt_stats_tx_sched_cmn_tlv {
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_tx_tqm_gen_mpdu_stats_tlv_v {
++-	u32 gen_mpdu_end_reason[0]; /* HTT_TX_TQM_MAX_GEN_MPDU_END_REASON */
+++	/* HTT_TX_TQM_MAX_GEN_MPDU_END_REASON */
+++	DECLARE_FLEX_ARRAY(u32, gen_mpdu_end_reason);
++ };
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_tx_tqm_list_mpdu_stats_tlv_v {
++-	u32 list_mpdu_end_reason[0]; /* HTT_TX_TQM_MAX_LIST_MPDU_END_REASON */
+++	 /* HTT_TX_TQM_MAX_LIST_MPDU_END_REASON */
+++	DECLARE_FLEX_ARRAY(u32, list_mpdu_end_reason);
++ };
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_tx_tqm_list_mpdu_cnt_tlv_v {
++-	u32 list_mpdu_cnt_hist[0];
++-			/* HTT_TX_TQM_MAX_LIST_MPDU_CNT_HISTOGRAM_BINS */
+++	/* HTT_TX_TQM_MAX_LIST_MPDU_CNT_HISTOGRAM_BINS */
+++	DECLARE_FLEX_ARRAY(u32, list_mpdu_cnt_hist);
++ };
++ 
++ struct htt_tx_tqm_pdev_stats_tlv_v {
++@@ -1098,7 +1109,7 @@ struct htt_tx_de_compl_stats_tlv {
++  *                               ENTRIES_PER_BIN_COUNT)
++  */
++ struct htt_tx_de_fw2wbm_ring_full_hist_tlv {
++-	u32 fw2wbm_ring_full_hist[0];
+++	DECLARE_FLEX_ARRAY(u32, fw2wbm_ring_full_hist);
++ };
++ 
++ struct htt_tx_de_cmn_stats_tlv {
++@@ -1151,7 +1162,7 @@ struct htt_ring_if_cmn_tlv {
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_sfm_client_user_tlv_v {
++ 	/* Number of DWORDS used per user and per client */
++-	u32 dwords_used_by_user_n[0];
+++	DECLARE_FLEX_ARRAY(u32, dwords_used_by_user_n);
++ };
++ 
++ struct htt_sfm_client_tlv {
++@@ -1436,12 +1447,14 @@ struct htt_rx_soc_fw_stats_tlv {
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_rx_soc_fw_refill_ring_empty_tlv_v {
++-	u32 refill_ring_empty_cnt[0]; /* HTT_RX_STATS_REFILL_MAX_RING */
+++	/* HTT_RX_STATS_REFILL_MAX_RING */
+++	DECLARE_FLEX_ARRAY(u32, refill_ring_empty_cnt);
++ };
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_rx_soc_fw_refill_ring_num_refill_tlv_v {
++-	u32 refill_ring_num_refill[0]; /* HTT_RX_STATS_REFILL_MAX_RING */
+++	/* HTT_RX_STATS_REFILL_MAX_RING */
+++	DECLARE_FLEX_ARRAY(u32, refill_ring_num_refill);
++ };
++ 
++ /* RXDMA error code from WBM released packets */
++@@ -1473,7 +1486,7 @@ enum htt_rx_rxdma_error_code_enum {
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_rx_soc_fw_refill_ring_num_rxdma_err_tlv_v {
++-	u32 rxdma_err[0]; /* HTT_RX_RXDMA_MAX_ERR_CODE */
+++	DECLARE_FLEX_ARRAY(u32, rxdma_err); /* HTT_RX_RXDMA_MAX_ERR_CODE */
++ };
++ 
++ /* REO error code from WBM released packets */
++@@ -1505,7 +1518,7 @@ enum htt_rx_reo_error_code_enum {
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_rx_soc_fw_refill_ring_num_reo_err_tlv_v {
++-	u32 reo_err[0]; /* HTT_RX_REO_MAX_ERR_CODE */
+++	DECLARE_FLEX_ARRAY(u32, reo_err); /* HTT_RX_REO_MAX_ERR_CODE */
++ };
++ 
++ /* == RX PDEV STATS == */
++@@ -1622,13 +1635,13 @@ struct htt_rx_pdev_fw_stats_phy_err_tlv
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_rx_pdev_fw_ring_mpdu_err_tlv_v {
++ 	/* Num error MPDU for each RxDMA error type  */
++-	u32 fw_ring_mpdu_err[0]; /* HTT_RX_STATS_RXDMA_MAX_ERR */
+++	DECLARE_FLEX_ARRAY(u32, fw_ring_mpdu_err); /* HTT_RX_STATS_RXDMA_MAX_ERR */
++ };
++ 
++ /* NOTE: Variable length TLV, use length spec to infer array size */
++ struct htt_rx_pdev_fw_mpdu_drop_tlv_v {
++ 	/* Num MPDU dropped  */
++-	u32 fw_mpdu_drop[0]; /* HTT_RX_STATS_FW_DROP_REASON_MAX */
+++	DECLARE_FLEX_ARRAY(u32, fw_mpdu_drop); /* HTT_RX_STATS_FW_DROP_REASON_MAX */
++ };
++ 
++ #define HTT_PDEV_CCA_STATS_TX_FRAME_INFO_PRESENT               (0x1)
+diff --git a/package/kernel/mac80211/patches/ath11k/0047-wifi-ath11k-fix-deinitialization-of-firmware-resourc.patch b/package/kernel/mac80211/patches/ath11k/0047-wifi-ath11k-fix-deinitialization-of-firmware-resourc.patch
+new file mode 100644
+index 0000000000..eec11f50e3
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0047-wifi-ath11k-fix-deinitialization-of-firmware-resourc.patch
+@@ -0,0 +1,79 @@
++From 5a78ac33e3cb8822da64dd1af196e83664b332b0 Mon Sep 17 00:00:00 2001
++From: Aditya Kumar Singh <quic_adisi@quicinc.com>
++Date: Thu, 9 Mar 2023 15:23:08 +0530
++Subject: [PATCH] wifi: ath11k: fix deinitialization of firmware resources
++
++Currently, in ath11k_ahb_fw_resources_init(), iommu domain
++mapping is done only for the chipsets having fixed firmware
++memory. Also, for such chipsets, mapping is done only if it
++does not have TrustZone support.
++
++During deinitialization, only if TrustZone support is not there,
++iommu is unmapped back. However, for non fixed firmware memory
++chipsets, TrustZone support is not there and this makes the
++condition check to true and it tries to unmap the memory which
++was not mapped during initialization.
++
++This leads to the following trace -
++
++[   83.198790] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000008
++[   83.259537] Modules linked in: ath11k_ahb ath11k qmi_helpers
++.. snip ..
++[   83.280286] pstate: 20000005 (nzCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
++[   83.287228] pc : __iommu_unmap+0x30/0x140
++[   83.293907] lr : iommu_unmap+0x5c/0xa4
++[   83.298072] sp : ffff80000b3abad0
++.. snip ..
++[   83.369175] Call trace:
++[   83.376282]  __iommu_unmap+0x30/0x140
++[   83.378541]  iommu_unmap+0x5c/0xa4
++[   83.382360]  ath11k_ahb_fw_resource_deinit.part.12+0x2c/0xac [ath11k_ahb]
++[   83.385666]  ath11k_ahb_free_resources+0x140/0x17c [ath11k_ahb]
++[   83.392521]  ath11k_ahb_shutdown+0x34/0x40 [ath11k_ahb]
++[   83.398248]  platform_shutdown+0x20/0x2c
++[   83.403455]  device_shutdown+0x16c/0x1c4
++[   83.407621]  kernel_restart_prepare+0x34/0x3c
++[   83.411529]  kernel_restart+0x14/0x74
++[   83.415781]  __do_sys_reboot+0x1c4/0x22c
++[   83.419427]  __arm64_sys_reboot+0x1c/0x24
++[   83.423420]  invoke_syscall+0x44/0xfc
++[   83.427326]  el0_svc_common.constprop.3+0xac/0xe8
++[   83.430974]  do_el0_svc+0xa0/0xa8
++[   83.435659]  el0_svc+0x1c/0x44
++[   83.438957]  el0t_64_sync_handler+0x60/0x144
++[   83.441910]  el0t_64_sync+0x15c/0x160
++[   83.446343] Code: aa0103f4 f9400001 f90027a1 d2800001 (f94006a0)
++[   83.449903] ---[ end trace 0000000000000000 ]---
++
++This can be reproduced by probing an AHB chipset which is not
++having a fixed memory region. During reboot (or rmmod) trace
++can be seen.
++
++Fix this issue by adding a condition check on firmware fixed memory
++hw_param as done in the counter initialization function.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Fixes: f9eec4947add ("ath11k: Add support for targets without trustzone")
++Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230309095308.24937-1-quic_adisi@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/ahb.c | 6 ++++++
++ 1 file changed, 6 insertions(+)
++
++--- a/drivers/net/wireless/ath/ath11k/ahb.c
+++++ b/drivers/net/wireless/ath/ath11k/ahb.c
++@@ -1078,6 +1078,12 @@ static int ath11k_ahb_fw_resource_deinit
++ 	struct iommu_domain *iommu;
++ 	size_t unmapped_size;
++ 
+++	/* Chipsets not requiring MSA would have not initialized
+++	 * MSA resources, return success in such cases.
+++	 */
+++	if (!ab->hw_params.fixed_fw_mem)
+++		return 0;
+++
++ 	if (ab_ahb->fw.use_tz)
++ 		return 0;
++ 
+diff --git a/package/kernel/mac80211/patches/ath11k/0048-wifi-ath11k-fix-BUFFER_DONE-read-on-monitor-ring-rx-.patch b/package/kernel/mac80211/patches/ath11k/0048-wifi-ath11k-fix-BUFFER_DONE-read-on-monitor-ring-rx-.patch
+new file mode 100644
+index 0000000000..3e22645331
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0048-wifi-ath11k-fix-BUFFER_DONE-read-on-monitor-ring-rx-.patch
+@@ -0,0 +1,130 @@
++From 68e93ac5a31d4975b25f819b2dfe914c72abc3bb Mon Sep 17 00:00:00 2001
++From: Harshitha Prem <quic_hprem@quicinc.com>
++Date: Wed, 15 Mar 2023 12:24:43 +0200
++Subject: [PATCH] wifi: ath11k: fix BUFFER_DONE read on monitor ring rx  buffer
++
++Perform dma_sync_single_for_cpu() on monitor ring rx buffer before
++reading BUFFER_DONE tag and do dma_unmap_single() only after device
++had set BUFFER_DONE tag to the buffer.
++
++Also when BUFFER_DONE tag is not set, allow the buffer to get read
++next time without freeing skb.
++
++This helps to fix AP+Monitor VAP with flood traffic scenario to see
++monitor ring rx buffer overrun missing BUFFER_DONE tag to be set.
++
++Also remove redundant rx dma buf free performed on DP
++rx_mon_status_refill_ring.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Sathishkumar Muruganandam <quic_murugana@quicinc.com>
++Signed-off-by: Harshitha Prem <quic_hprem@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230309164434.32660-1-quic_hprem@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/dp_rx.c | 57 ++++++++++---------------
++ 1 file changed, 23 insertions(+), 34 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/dp_rx.c
+++++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
++@@ -435,7 +435,6 @@ fail_free_skb:
++ static int ath11k_dp_rxdma_buf_ring_free(struct ath11k *ar,
++ 					 struct dp_rxdma_ring *rx_ring)
++ {
++-	struct ath11k_pdev_dp *dp = &ar->dp;
++ 	struct sk_buff *skb;
++ 	int buf_id;
++ 
++@@ -453,28 +452,6 @@ static int ath11k_dp_rxdma_buf_ring_free
++ 	idr_destroy(&rx_ring->bufs_idr);
++ 	spin_unlock_bh(&rx_ring->idr_lock);
++ 
++-	/* if rxdma1_enable is false, mon_status_refill_ring
++-	 * isn't setup, so don't clean.
++-	 */
++-	if (!ar->ab->hw_params.rxdma1_enable)
++-		return 0;
++-
++-	rx_ring = &dp->rx_mon_status_refill_ring[0];
++-
++-	spin_lock_bh(&rx_ring->idr_lock);
++-	idr_for_each_entry(&rx_ring->bufs_idr, skb, buf_id) {
++-		idr_remove(&rx_ring->bufs_idr, buf_id);
++-		/* XXX: Understand where internal driver does this dma_unmap
++-		 * of rxdma_buffer.
++-		 */
++-		dma_unmap_single(ar->ab->dev, ATH11K_SKB_RXCB(skb)->paddr,
++-				 skb->len + skb_tailroom(skb), DMA_BIDIRECTIONAL);
++-		dev_kfree_skb_any(skb);
++-	}
++-
++-	idr_destroy(&rx_ring->bufs_idr);
++-	spin_unlock_bh(&rx_ring->idr_lock);
++-
++ 	return 0;
++ }
++ 
++@@ -3029,39 +3006,51 @@ static int ath11k_dp_rx_reap_mon_status_
++ 
++ 			spin_lock_bh(&rx_ring->idr_lock);
++ 			skb = idr_find(&rx_ring->bufs_idr, buf_id);
+++			spin_unlock_bh(&rx_ring->idr_lock);
+++
++ 			if (!skb) {
++ 				ath11k_warn(ab, "rx monitor status with invalid buf_id %d\n",
++ 					    buf_id);
++-				spin_unlock_bh(&rx_ring->idr_lock);
++ 				pmon->buf_state = DP_MON_STATUS_REPLINISH;
++ 				goto move_next;
++ 			}
++ 
++-			idr_remove(&rx_ring->bufs_idr, buf_id);
++-			spin_unlock_bh(&rx_ring->idr_lock);
++-
++ 			rxcb = ATH11K_SKB_RXCB(skb);
++ 
++-			dma_unmap_single(ab->dev, rxcb->paddr,
++-					 skb->len + skb_tailroom(skb),
++-					 DMA_FROM_DEVICE);
+++			dma_sync_single_for_cpu(ab->dev, rxcb->paddr,
+++						skb->len + skb_tailroom(skb),
+++						DMA_FROM_DEVICE);
++ 
++ 			tlv = (struct hal_tlv_hdr *)skb->data;
++ 			if (FIELD_GET(HAL_TLV_HDR_TAG, tlv->tl) !=
++ 					HAL_RX_STATUS_BUFFER_DONE) {
++-				ath11k_warn(ab, "mon status DONE not set %lx\n",
+++				ath11k_warn(ab, "mon status DONE not set %lx, buf_id %d\n",
++ 					    FIELD_GET(HAL_TLV_HDR_TAG,
++-						      tlv->tl));
++-				dev_kfree_skb_any(skb);
+++						      tlv->tl), buf_id);
+++				/* If done status is missing, hold onto status
+++				 * ring until status is done for this status
+++				 * ring buffer.
+++				 * Keep HP in mon_status_ring unchanged,
+++				 * and break from here.
+++				 * Check status for same buffer for next time
+++				 */
++ 				pmon->buf_state = DP_MON_STATUS_NO_DMA;
++-				goto move_next;
+++				break;
++ 			}
++ 
+++			spin_lock_bh(&rx_ring->idr_lock);
+++			idr_remove(&rx_ring->bufs_idr, buf_id);
+++			spin_unlock_bh(&rx_ring->idr_lock);
++ 			if (ab->hw_params.full_monitor_mode) {
++ 				ath11k_dp_rx_mon_update_status_buf_state(pmon, tlv);
++ 				if (paddr == pmon->mon_status_paddr)
++ 					pmon->buf_state = DP_MON_STATUS_MATCH;
++ 			}
+++
+++			dma_unmap_single(ab->dev, rxcb->paddr,
+++					 skb->len + skb_tailroom(skb),
+++					 DMA_FROM_DEVICE);
+++
++ 			__skb_queue_tail(skb_list, skb);
++ 		} else {
++ 			pmon->buf_state = DP_MON_STATUS_REPLINISH;
+diff --git a/package/kernel/mac80211/patches/ath11k/0049-wifi-ath11k-Optimize-6-GHz-scan-time.patch b/package/kernel/mac80211/patches/ath11k/0049-wifi-ath11k-Optimize-6-GHz-scan-time.patch
+new file mode 100644
+index 0000000000..f468990feb
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0049-wifi-ath11k-Optimize-6-GHz-scan-time.patch
+@@ -0,0 +1,101 @@
++From 8b4d2f080afbd4280ecca0f4b3ceea943a7a86d0 Mon Sep 17 00:00:00 2001
++From: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
++Date: Thu, 23 Mar 2023 11:39:13 +0530
++Subject: [PATCH] wifi: ath11k: Optimize 6 GHz scan time
++
++Currently, time taken to scan all supported channels on WCN6750
++is ~8 seconds and connection time is almost 10 seconds. WCN6750
++supports three Wi-Fi bands (i.e., 2.4/5/6 GHz) and the numbers of
++channels for scan come around ~100 channels (default case).
++Since the chip doesn't have support for DBS (Dual Band Simultaneous),
++scans cannot be parallelized resulting in longer scan times.
++
++Among the 100 odd channels, ~60 channels are in 6 GHz band. Therefore,
++optimizing the scan for 6 GHz channels will bring down the overall
++scan time.
++
++WCN6750 firmware has support to scan a 6 GHz channel based on co-located
++AP information i.e., RNR IE which is found in the legacy 2.4/5 GHz scan
++results. When a scan request with all supported channel list is enqueued
++to the firmware, then based on WMI_SCAN_CHAN_FLAG_SCAN_ONLY_IF_RNR_FOUND
++scan channel flag, firmware will scan only those 6 GHz channels for which
++RNR IEs are found in the legacy scan results.
++
++In the proposed design, based on NL80211_SCAN_FLAG_COLOCATED_6GHZ scan
++flag, driver will set the WMI_SCAN_CHAN_FLAG_SCAN_ONLY_IF_RNR_FOUND flag
++for non-PSC channels. Since there is high probability to find 6 GHz APs
++on PSC channels, these channels are always scanned. Only non-PSC channels
++are selectively scanned based on cached RNR information from the legacy
++scan results.
++
++If NL80211_SCAN_FLAG_COLOCATED_6GHZ is not set in the scan flags,
++then scan will happen on all supported channels (default behavior).
++
++With these optimizations, scan time is improved by 1.5-1.8 seconds on
++WCN6750. Similar savings have been observed on WCN6855.
++
++Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
++Tested-on: WCN6855 hw2.1 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3.6510.16
++
++Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230323060913.10097-1-quic_mpubbise@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 25 +++++++++++++++++++++++--
++ drivers/net/wireless/ath/ath11k/wmi.h |  4 ++++
++ 2 files changed, 27 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -3819,8 +3819,29 @@ static int ath11k_mac_op_hw_scan(struct
++ 			goto exit;
++ 		}
++ 
++-		for (i = 0; i < arg->num_chan; i++)
++-			arg->chan_list[i] = req->channels[i]->center_freq;
+++		for (i = 0; i < arg->num_chan; i++) {
+++			if (test_bit(WMI_TLV_SERVICE_SCAN_CONFIG_PER_CHANNEL,
+++				     ar->ab->wmi_ab.svc_map)) {
+++				arg->chan_list[i] =
+++					u32_encode_bits(req->channels[i]->center_freq,
+++							WMI_SCAN_CONFIG_PER_CHANNEL_MASK);
+++
+++				/* If NL80211_SCAN_FLAG_COLOCATED_6GHZ is set in scan
+++				 * flags, then scan all PSC channels in 6 GHz band and
+++				 * those non-PSC channels where RNR IE is found during
+++				 * the legacy 2.4/5 GHz scan.
+++				 * If NL80211_SCAN_FLAG_COLOCATED_6GHZ is not set,
+++				 * then all channels in 6 GHz will be scanned.
+++				 */
+++				if (req->channels[i]->band == NL80211_BAND_6GHZ &&
+++				    req->flags & NL80211_SCAN_FLAG_COLOCATED_6GHZ &&
+++				    !cfg80211_channel_is_psc(req->channels[i]))
+++					arg->chan_list[i] |=
+++						WMI_SCAN_CH_FLAG_SCAN_ONLY_IF_RNR_FOUND;
+++			} else {
+++				arg->chan_list[i] = req->channels[i]->center_freq;
+++			}
+++		}
++ 	}
++ 
++ 	if (req->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) {
++--- a/drivers/net/wireless/ath/ath11k/wmi.h
+++++ b/drivers/net/wireless/ath/ath11k/wmi.h
++@@ -2100,6 +2100,7 @@ enum wmi_tlv_service {
++ 
++ 	/* The second 128 bits */
++ 	WMI_MAX_EXT_SERVICE = 256,
+++	WMI_TLV_SERVICE_SCAN_CONFIG_PER_CHANNEL = 265,
++ 	WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281,
++ 	WMI_TLV_SERVICE_BIOS_SAR_SUPPORT = 326,
++ 
++@@ -3249,6 +3250,9 @@ struct  wmi_start_scan_cmd {
++ #define WMI_SCAN_DWELL_MODE_SHIFT        21
++ #define WMI_SCAN_FLAG_EXT_PASSIVE_SCAN_START_TIME_ENHANCE   0x00000800
++ 
+++#define WMI_SCAN_CONFIG_PER_CHANNEL_MASK	GENMASK(19, 0)
+++#define WMI_SCAN_CH_FLAG_SCAN_ONLY_IF_RNR_FOUND	BIT(20)
+++
++ enum {
++ 	WMI_SCAN_DWELL_MODE_DEFAULT      = 0,
++ 	WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1,
+diff --git a/package/kernel/mac80211/patches/ath11k/0050-wifi-ath11k-Configure-the-FTM-responder-role-using-f.patch b/package/kernel/mac80211/patches/ath11k/0050-wifi-ath11k-Configure-the-FTM-responder-role-using-f.patch
+new file mode 100644
+index 0000000000..bca08b177f
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0050-wifi-ath11k-Configure-the-FTM-responder-role-using-f.patch
+@@ -0,0 +1,117 @@
++From 813968c24126cc5c8320cd5db0e262069a535063 Mon Sep 17 00:00:00 2001
++From: Ganesh Babu Jothiram <quic_gjothira@quicinc.com>
++Date: Fri, 24 Mar 2023 16:57:00 +0200
++Subject: [PATCH] wifi: ath11k: Configure the FTM responder role using firmware
++ capability flag
++
++Fine Time Measurement(FTM) is offloaded feature to firmware.
++Hence, the configuration of FTM responder role is done using
++firmware capability flag instead of hw param.
++
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Ganesh Babu Jothiram <quic_gjothira@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230317072034.8217-1-quic_gjothira@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/core.c | 8 --------
++ drivers/net/wireless/ath/ath11k/hw.h   | 1 -
++ drivers/net/wireless/ath/ath11k/mac.c  | 4 ++--
++ 3 files changed, 2 insertions(+), 11 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/core.c
+++++ b/drivers/net/wireless/ath/ath11k/core.c
++@@ -116,7 +116,6 @@ static const struct ath11k_hw_params ath
++ 		.tcl_ring_retry = true,
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
++-		.ftm_responder = true,
++ 	},
++ 	{
++ 		.hw_rev = ATH11K_HW_IPQ6018_HW10,
++@@ -199,7 +198,6 @@ static const struct ath11k_hw_params ath
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
++ 		.support_fw_mac_sequence = false,
++-		.ftm_responder = true,
++ 	},
++ 	{
++ 		.name = "qca6390 hw2.0",
++@@ -284,7 +282,6 @@ static const struct ath11k_hw_params ath
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
++ 		.support_fw_mac_sequence = true,
++-		.ftm_responder = false,
++ 	},
++ 	{
++ 		.name = "qcn9074 hw1.0",
++@@ -366,7 +363,6 @@ static const struct ath11k_hw_params ath
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
++ 		.support_fw_mac_sequence = false,
++-		.ftm_responder = true,
++ 	},
++ 	{
++ 		.name = "wcn6855 hw2.0",
++@@ -451,7 +447,6 @@ static const struct ath11k_hw_params ath
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
++ 		.support_fw_mac_sequence = true,
++-		.ftm_responder = false,
++ 	},
++ 	{
++ 		.name = "wcn6855 hw2.1",
++@@ -534,7 +529,6 @@ static const struct ath11k_hw_params ath
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
++ 		.support_fw_mac_sequence = true,
++-		.ftm_responder = false,
++ 	},
++ 	{
++ 		.name = "wcn6750 hw1.0",
++@@ -615,7 +609,6 @@ static const struct ath11k_hw_params ath
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE_WCN6750,
++ 		.smp2p_wow_exit = true,
++ 		.support_fw_mac_sequence = true,
++-		.ftm_responder = false,
++ 	},
++ 	{
++ 		.hw_rev = ATH11K_HW_IPQ5018_HW10,
++@@ -695,7 +688,6 @@ static const struct ath11k_hw_params ath
++ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
++ 		.smp2p_wow_exit = false,
++ 		.support_fw_mac_sequence = false,
++-		.ftm_responder = true,
++ 	},
++ };
++ 
++--- a/drivers/net/wireless/ath/ath11k/hw.h
+++++ b/drivers/net/wireless/ath/ath11k/hw.h
++@@ -224,7 +224,6 @@ struct ath11k_hw_params {
++ 	u32 tx_ring_size;
++ 	bool smp2p_wow_exit;
++ 	bool support_fw_mac_sequence;
++-	bool ftm_responder;
++ };
++ 
++ struct ath11k_hw_ops {
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -3538,7 +3538,7 @@ static void ath11k_mac_op_bss_info_chang
++ 
++ 	if (changed & BSS_CHANGED_FTM_RESPONDER &&
++ 	    arvif->ftm_responder != info->ftm_responder &&
++-	    ar->ab->hw_params.ftm_responder &&
+++	    test_bit(WMI_TLV_SERVICE_RTT, ar->ab->wmi_ab.svc_map) &&
++ 	    (vif->type == NL80211_IFTYPE_AP ||
++ 	     vif->type == NL80211_IFTYPE_MESH_POINT)) {
++ 		arvif->ftm_responder = info->ftm_responder;
++@@ -9234,7 +9234,7 @@ static int __ath11k_mac_register(struct
++ 	wiphy_ext_feature_set(ar->hw->wiphy,
++ 			      NL80211_EXT_FEATURE_SET_SCAN_DWELL);
++ 
++-	if (ab->hw_params.ftm_responder)
+++	if (test_bit(WMI_TLV_SERVICE_RTT, ar->ab->wmi_ab.svc_map))
++ 		wiphy_ext_feature_set(ar->hw->wiphy,
++ 				      NL80211_EXT_FEATURE_ENABLE_FTM_RESPONDER);
++ 
+diff --git a/package/kernel/mac80211/patches/ath11k/0051-wifi-ath11k-fix-rssi-station-dump-not-updated-in-QCN.patch b/package/kernel/mac80211/patches/ath11k/0051-wifi-ath11k-fix-rssi-station-dump-not-updated-in-QCN.patch
+new file mode 100644
+index 0000000000..835dece1fe
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0051-wifi-ath11k-fix-rssi-station-dump-not-updated-in-QCN.patch
+@@ -0,0 +1,158 @@
++From 031ffa6c2cd305a57ccc6d610f2decd956b2e7f6 Mon Sep 17 00:00:00 2001
++From: P Praneesh <quic_ppranees@quicinc.com>
++Date: Fri, 24 Mar 2023 16:57:00 +0200
++Subject: [PATCH] wifi: ath11k: fix rssi station dump not updated in QCN9074
++
++In QCN9074, station dump signal values display default value which
++is -95 dbm, since there is firmware header change for HAL_RX_MPDU_START
++between QCN9074 and IPQ8074 which cause wrong peer_id fetch from msdu.
++Fix this by updating hal_rx_mpdu_info with corresponding QCN9074 tlv
++format.
++
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-01695-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230320110312.20639-1-quic_ppranees@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/hal_rx.c | 10 ++++++++-
++ drivers/net/wireless/ath/ath11k/hal_rx.h | 18 +++++++++++++++-
++ drivers/net/wireless/ath/ath11k/hw.c     | 27 ++++++++++++++++--------
++ drivers/net/wireless/ath/ath11k/hw.h     |  2 +-
++ 4 files changed, 45 insertions(+), 12 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/hal_rx.c
+++++ b/drivers/net/wireless/ath/ath11k/hal_rx.c
++@@ -865,6 +865,12 @@ ath11k_hal_rx_populate_mu_user_info(void
++ 	ath11k_hal_rx_populate_byte_count(rx_tlv, ppdu_info, rx_user_status);
++ }
++ 
+++static u16 ath11k_hal_rx_mpduinfo_get_peerid(struct ath11k_base *ab,
+++					     struct hal_rx_mpdu_info *mpdu_info)
+++{
+++	return ab->hw_params.hw_ops->mpdu_info_get_peerid(mpdu_info);
+++}
+++
++ static enum hal_rx_mon_status
++ ath11k_hal_rx_parse_mon_status_tlv(struct ath11k_base *ab,
++ 				   struct hal_rx_mon_ppdu_info *ppdu_info,
++@@ -1459,9 +1465,11 @@ ath11k_hal_rx_parse_mon_status_tlv(struc
++ 		break;
++ 	}
++ 	case HAL_RX_MPDU_START: {
+++		struct hal_rx_mpdu_info *mpdu_info =
+++				(struct hal_rx_mpdu_info *)tlv_data;
++ 		u16 peer_id;
++ 
++-		peer_id = ab->hw_params.hw_ops->mpdu_info_get_peerid(tlv_data);
+++		peer_id = ath11k_hal_rx_mpduinfo_get_peerid(ab, mpdu_info);
++ 		if (peer_id)
++ 			ppdu_info->peer_id = peer_id;
++ 		break;
++--- a/drivers/net/wireless/ath/ath11k/hal_rx.h
+++++ b/drivers/net/wireless/ath/ath11k/hal_rx.h
++@@ -405,7 +405,7 @@ struct hal_rx_phyrx_rssi_legacy_info {
++ #define HAL_RX_MPDU_INFO_INFO0_PEERID_WCN6855	GENMASK(15, 0)
++ #define HAL_RX_MPDU_INFO_INFO1_MPDU_LEN		GENMASK(13, 0)
++ 
++-struct hal_rx_mpdu_info {
+++struct hal_rx_mpdu_info_ipq8074 {
++ 	__le32 rsvd0;
++ 	__le32 info0;
++ 	__le32 rsvd1[11];
++@@ -413,12 +413,28 @@ struct hal_rx_mpdu_info {
++ 	__le32 rsvd2[9];
++ } __packed;
++ 
+++struct hal_rx_mpdu_info_qcn9074 {
+++	__le32 rsvd0[10];
+++	__le32 info0;
+++	__le32 rsvd1[2];
+++	__le32 info1;
+++	__le32 rsvd2[9];
+++} __packed;
+++
++ struct hal_rx_mpdu_info_wcn6855 {
++ 	__le32 rsvd0[8];
++ 	__le32 info0;
++ 	__le32 rsvd1[14];
++ } __packed;
++ 
+++struct hal_rx_mpdu_info {
+++	union {
+++		struct hal_rx_mpdu_info_ipq8074 ipq8074;
+++		struct hal_rx_mpdu_info_qcn9074 qcn9074;
+++		struct hal_rx_mpdu_info_wcn6855 wcn6855;
+++	} u;
+++} __packed;
+++
++ #define HAL_RX_PPDU_END_DURATION	GENMASK(23, 0)
++ struct hal_rx_ppdu_end_duration {
++ 	__le32 rsvd0[9];
++--- a/drivers/net/wireless/ath/ath11k/hw.c
+++++ b/drivers/net/wireless/ath/ath11k/hw.c
++@@ -835,26 +835,35 @@ static void ath11k_hw_ipq5018_reo_setup(
++ 			   ring_hash_map);
++ }
++ 
++-static u16 ath11k_hw_ipq8074_mpdu_info_get_peerid(u8 *tlv_data)
+++static u16
+++ath11k_hw_ipq8074_mpdu_info_get_peerid(struct hal_rx_mpdu_info *mpdu_info)
++ {
++ 	u16 peer_id = 0;
++-	struct hal_rx_mpdu_info *mpdu_info =
++-		(struct hal_rx_mpdu_info *)tlv_data;
++ 
++ 	peer_id = FIELD_GET(HAL_RX_MPDU_INFO_INFO0_PEERID,
++-			    __le32_to_cpu(mpdu_info->info0));
+++			    __le32_to_cpu(mpdu_info->u.ipq8074.info0));
++ 
++ 	return peer_id;
++ }
++ 
++-static u16 ath11k_hw_wcn6855_mpdu_info_get_peerid(u8 *tlv_data)
+++static u16
+++ath11k_hw_qcn9074_mpdu_info_get_peerid(struct hal_rx_mpdu_info *mpdu_info)
+++{
+++	u16 peer_id = 0;
+++
+++	peer_id = FIELD_GET(HAL_RX_MPDU_INFO_INFO0_PEERID,
+++			    __le32_to_cpu(mpdu_info->u.qcn9074.info0));
+++
+++	return peer_id;
+++}
+++
+++static u16
+++ath11k_hw_wcn6855_mpdu_info_get_peerid(struct hal_rx_mpdu_info *mpdu_info)
++ {
++ 	u16 peer_id = 0;
++-	struct hal_rx_mpdu_info_wcn6855 *mpdu_info =
++-		(struct hal_rx_mpdu_info_wcn6855 *)tlv_data;
++ 
++ 	peer_id = FIELD_GET(HAL_RX_MPDU_INFO_INFO0_PEERID_WCN6855,
++-			    __le32_to_cpu(mpdu_info->info0));
+++			    __le32_to_cpu(mpdu_info->u.wcn6855.info0));
++ 	return peer_id;
++ }
++ 
++@@ -1042,7 +1051,7 @@ const struct ath11k_hw_ops qcn9074_ops =
++ 	.rx_desc_get_attention = ath11k_hw_qcn9074_rx_desc_get_attention,
++ 	.rx_desc_get_msdu_payload = ath11k_hw_qcn9074_rx_desc_get_msdu_payload,
++ 	.reo_setup = ath11k_hw_ipq8074_reo_setup,
++-	.mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid,
+++	.mpdu_info_get_peerid = ath11k_hw_qcn9074_mpdu_info_get_peerid,
++ 	.rx_desc_mac_addr2_valid = ath11k_hw_ipq9074_rx_desc_mac_addr2_valid,
++ 	.rx_desc_mpdu_start_addr2 = ath11k_hw_ipq9074_rx_desc_mpdu_start_addr2,
++ 	.get_ring_selector = ath11k_hw_ipq8074_get_tcl_ring_selector,
++--- a/drivers/net/wireless/ath/ath11k/hw.h
+++++ b/drivers/net/wireless/ath/ath11k/hw.h
++@@ -263,7 +263,7 @@ struct ath11k_hw_ops {
++ 	struct rx_attention *(*rx_desc_get_attention)(struct hal_rx_desc *desc);
++ 	u8 *(*rx_desc_get_msdu_payload)(struct hal_rx_desc *desc);
++ 	void (*reo_setup)(struct ath11k_base *ab);
++-	u16 (*mpdu_info_get_peerid)(u8 *tlv_data);
+++	u16 (*mpdu_info_get_peerid)(struct hal_rx_mpdu_info *mpdu_info);
++ 	bool (*rx_desc_mac_addr2_valid)(struct hal_rx_desc *desc);
++ 	u8* (*rx_desc_mpdu_start_addr2)(struct hal_rx_desc *desc);
++ 	u32 (*get_ring_selector)(struct sk_buff *skb);
+diff --git a/package/kernel/mac80211/patches/ath11k/0052-wifi-ath11k-Fix-invalid-management-rx-frame-length-i.patch b/package/kernel/mac80211/patches/ath11k/0052-wifi-ath11k-Fix-invalid-management-rx-frame-length-i.patch
+new file mode 100644
+index 0000000000..0c1637fb04
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0052-wifi-ath11k-Fix-invalid-management-rx-frame-length-i.patch
+@@ -0,0 +1,115 @@
++From 447b0398a9cd41ca343dfd43e555af92d6214487 Mon Sep 17 00:00:00 2001
++From: Bhagavathi Perumal S <quic_bperumal@quicinc.com>
++Date: Fri, 24 Mar 2023 16:57:00 +0200
++Subject: [PATCH] wifi: ath11k: Fix invalid management rx frame length issue
++
++The WMI management rx event has multiple arrays of TLVs, however the common
++WMI TLV parser won't handle multiple TLV tags of same type.
++So the multiple array tags of WMI management rx TLV is parsed incorrectly
++and the length calculated becomes wrong when the target sends multiple
++array tags.
++
++Add separate TLV parser to handle multiple arrays for WMI management rx
++TLV. This fixes invalid length issue when the target sends multiple array
++tags.
++
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Bhagavathi Perumal S <quic_bperumal@quicinc.com>
++Co-developed-by: Nagarajan Maran <quic_nmaran@quicinc.com>
++Signed-off-by: Nagarajan Maran <quic_nmaran@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230320133840.30162-1-quic_nmaran@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/wmi.c | 45 +++++++++++++++++++++------
++ 1 file changed, 35 insertions(+), 10 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++++ b/drivers/net/wireless/ath/ath11k/wmi.c
++@@ -82,6 +82,12 @@ struct wmi_tlv_fw_stats_parse {
++ 	bool chain_rssi_done;
++ };
++ 
+++struct wmi_tlv_mgmt_rx_parse {
+++	const struct wmi_mgmt_rx_hdr *fixed;
+++	const u8 *frame_buf;
+++	bool frame_buf_done;
+++};
+++
++ static const struct wmi_tlv_policy wmi_tlv_policies[] = {
++ 	[WMI_TAG_ARRAY_BYTE]
++ 		= { .min_len = 0 },
++@@ -5633,28 +5639,49 @@ static int ath11k_pull_vdev_stopped_para
++ 	return 0;
++ }
++ 
+++static int ath11k_wmi_tlv_mgmt_rx_parse(struct ath11k_base *ab,
+++					u16 tag, u16 len,
+++					const void *ptr, void *data)
+++{
+++	struct wmi_tlv_mgmt_rx_parse *parse = data;
+++
+++	switch (tag) {
+++	case WMI_TAG_MGMT_RX_HDR:
+++		parse->fixed = ptr;
+++		break;
+++	case WMI_TAG_ARRAY_BYTE:
+++		if (!parse->frame_buf_done) {
+++			parse->frame_buf = ptr;
+++			parse->frame_buf_done = true;
+++		}
+++		break;
+++	}
+++	return 0;
+++}
+++
++ static int ath11k_pull_mgmt_rx_params_tlv(struct ath11k_base *ab,
++ 					  struct sk_buff *skb,
++ 					  struct mgmt_rx_event_params *hdr)
++ {
++-	const void **tb;
+++	struct wmi_tlv_mgmt_rx_parse parse = { };
++ 	const struct wmi_mgmt_rx_hdr *ev;
++ 	const u8 *frame;
++ 	int ret;
++ 
++-	tb = ath11k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
++-	if (IS_ERR(tb)) {
++-		ret = PTR_ERR(tb);
++-		ath11k_warn(ab, "failed to parse tlv: %d\n", ret);
+++	ret = ath11k_wmi_tlv_iter(ab, skb->data, skb->len,
+++				  ath11k_wmi_tlv_mgmt_rx_parse,
+++				  &parse);
+++	if (ret) {
+++		ath11k_warn(ab, "failed to parse mgmt rx tlv %d\n",
+++			    ret);
++ 		return ret;
++ 	}
++ 
++-	ev = tb[WMI_TAG_MGMT_RX_HDR];
++-	frame = tb[WMI_TAG_ARRAY_BYTE];
+++	ev = parse.fixed;
+++	frame = parse.frame_buf;
++ 
++ 	if (!ev || !frame) {
++ 		ath11k_warn(ab, "failed to fetch mgmt rx hdr");
++-		kfree(tb);
++ 		return -EPROTO;
++ 	}
++ 
++@@ -5673,7 +5700,6 @@ static int ath11k_pull_mgmt_rx_params_tl
++ 
++ 	if (skb->len < (frame - skb->data) + hdr->buf_len) {
++ 		ath11k_warn(ab, "invalid length in mgmt rx hdr ev");
++-		kfree(tb);
++ 		return -EPROTO;
++ 	}
++ 
++@@ -5685,7 +5711,6 @@ static int ath11k_pull_mgmt_rx_params_tl
++ 
++ 	ath11k_ce_byte_swap(skb->data, hdr->buf_len);
++ 
++-	kfree(tb);
++ 	return 0;
++ }
++ 
+diff --git a/package/kernel/mac80211/patches/ath11k/0053-wifi-ath11k-fix-writing-to-unintended-memory-region.patch b/package/kernel/mac80211/patches/ath11k/0053-wifi-ath11k-fix-writing-to-unintended-memory-region.patch
+new file mode 100644
+index 0000000000..7b8a7d4543
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0053-wifi-ath11k-fix-writing-to-unintended-memory-region.patch
+@@ -0,0 +1,43 @@
++From 756a7f90878f0866fd2fe167ef37e90b47326b96 Mon Sep 17 00:00:00 2001
++From: P Praneesh <quic_ppranees@quicinc.com>
++Date: Fri, 24 Mar 2023 16:57:01 +0200
++Subject: [PATCH] wifi: ath11k: fix writing to unintended memory region
++
++While initializing spectral, the magic value is getting written to the
++invalid memory address leading to random boot-up crash. This occurs
++due to the incorrect index increment in ath11k_dbring_fill_magic_value
++function. Fix it by replacing the existing logic with memset32 to ensure
++there is no invalid memory access.
++
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.4.0.1-01838-QCAHKSWPL_SILICONZ-1
++
++Fixes: d3d358efc553 ("ath11k: add spectral/CFR buffer validation support")
++Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230321052900.16895-1-quic_ppranees@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/dbring.c | 12 ++++++------
++ 1 file changed, 6 insertions(+), 6 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/dbring.c
+++++ b/drivers/net/wireless/ath/ath11k/dbring.c
++@@ -26,13 +26,13 @@ int ath11k_dbring_validate_buffer(struct
++ static void ath11k_dbring_fill_magic_value(struct ath11k *ar,
++ 					   void *buffer, u32 size)
++ {
++-	u32 *temp;
++-	int idx;
+++	/* memset32 function fills buffer payload with the ATH11K_DB_MAGIC_VALUE
+++	 * and the variable size is expected to be the number of u32 values
+++	 * to be stored, not the number of bytes.
+++	 */
+++	size = size / sizeof(u32);
++ 
++-	size = size >> 2;
++-
++-	for (idx = 0, temp = buffer; idx < size; idx++, temp++)
++-		*temp++ = ATH11K_DB_MAGIC_VALUE;
+++	memset32(buffer, ATH11K_DB_MAGIC_VALUE, size);
++ }
++ 
++ static int ath11k_dbring_bufs_replenish(struct ath11k *ar,
+diff --git a/package/kernel/mac80211/patches/ath11k/0054-wifi-ath11k-Send-11d-scan-start-before-WMI_START_SCA.patch b/package/kernel/mac80211/patches/ath11k/0054-wifi-ath11k-Send-11d-scan-start-before-WMI_START_SCA.patch
+new file mode 100644
+index 0000000000..0f8e637592
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0054-wifi-ath11k-Send-11d-scan-start-before-WMI_START_SCA.patch
+@@ -0,0 +1,61 @@
++From e89a51aedf380bc60219dc9afa96c36507060fb3 Mon Sep 17 00:00:00 2001
++From: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
++Date: Wed, 15 Mar 2023 21:48:17 +0530
++Subject: [PATCH] wifi: ath11k: Send 11d scan start before WMI_START_SCAN_CMDID
++
++Firmwares advertising the support of triggering 11d algorithm on the
++scan results of a regular scan expects driver to send
++WMI_11D_SCAN_START_CMDID before sending WMI_START_SCAN_CMDID.
++Triggering 11d algorithm on the scan results of a normal scan helps
++in completely avoiding a separate 11d scan for determining regdomain.
++This indirectly helps in speeding up connections on station
++interfaces on the chipsets supporting 11D scan.
++
++To enable this feature, send WMI_11D_SCAN_START_CMDID just before
++sending WMI_START_SCAN_CMDID if the firmware advertises
++WMI_TLV_SERVICE_SUPPORT_11D_FOR_HOST_SCAN service flag.
++
++WCN6750 & WCN6855 supports this feature.
++
++Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-01160-QCAMSLSWPLZ-1
++Tested-on: WCN6855 hw2.1 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3.6510.23
++
++Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230315161817.29627-1-quic_mpubbise@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 12 ++++++++++++
++ drivers/net/wireless/ath/ath11k/wmi.h |  1 +
++ 2 files changed, 13 insertions(+)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -3755,6 +3755,18 @@ static int ath11k_mac_op_hw_scan(struct
++ 	int i;
++ 	u32 scan_timeout;
++ 
+++	/* Firmwares advertising the support of triggering 11D algorithm
+++	 * on the scan results of a regular scan expects driver to send
+++	 * WMI_11D_SCAN_START_CMDID before sending WMI_START_SCAN_CMDID.
+++	 * With this feature, separate 11D scan can be avoided since
+++	 * regdomain can be determined with the scan results of the
+++	 * regular scan.
+++	 */
+++	if (ar->state_11d == ATH11K_11D_PREPARING &&
+++	    test_bit(WMI_TLV_SERVICE_SUPPORT_11D_FOR_HOST_SCAN,
+++		     ar->ab->wmi_ab.svc_map))
+++		ath11k_mac_11d_scan_start(ar, arvif->vdev_id);
+++
++ 	mutex_lock(&ar->conf_mutex);
++ 
++ 	spin_lock_bh(&ar->data_lock);
++--- a/drivers/net/wireless/ath/ath11k/wmi.h
+++++ b/drivers/net/wireless/ath/ath11k/wmi.h
++@@ -2103,6 +2103,7 @@ enum wmi_tlv_service {
++ 	WMI_TLV_SERVICE_SCAN_CONFIG_PER_CHANNEL = 265,
++ 	WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281,
++ 	WMI_TLV_SERVICE_BIOS_SAR_SUPPORT = 326,
+++	WMI_TLV_SERVICE_SUPPORT_11D_FOR_HOST_SCAN = 357,
++ 
++ 	/* The third 128 bits */
++ 	WMI_MAX_EXT2_SERVICE = 384
+diff --git a/package/kernel/mac80211/patches/ath11k/0055-wifi-ath11k-Remove-redundant-pci_clear_master.patch b/package/kernel/mac80211/patches/ath11k/0055-wifi-ath11k-Remove-redundant-pci_clear_master.patch
+new file mode 100644
+index 0000000000..0439727e72
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0055-wifi-ath11k-Remove-redundant-pci_clear_master.patch
+@@ -0,0 +1,58 @@
++From f812e2a9f85d6bea78957ccb5197e4491316848b Mon Sep 17 00:00:00 2001
++From: Cai Huoqing <cai.huoqing@linux.dev>
++Date: Thu, 23 Mar 2023 19:26:09 +0800
++Subject: [PATCH] wifi: ath11k: Remove redundant pci_clear_master
++
++Remove pci_clear_master to simplify the code,
++the bus-mastering is also cleared in do_pci_disable_device,
++like this:
++./drivers/pci/pci.c:2197
++static void do_pci_disable_device(struct pci_dev *dev)
++{
++	u16 pci_command;
++
++	pci_read_config_word(dev, PCI_COMMAND, &pci_command);
++	if (pci_command & PCI_COMMAND_MASTER) {
++		pci_command &= ~PCI_COMMAND_MASTER;
++		pci_write_config_word(dev, PCI_COMMAND, pci_command);
++	}
++
++	pcibios_disable_device(dev);
++}.
++And dev->is_busmaster is set to 0 in pci_disable_device.
++
++Signed-off-by: Cai Huoqing <cai.huoqing@linux.dev>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230323112613.7550-1-cai.huoqing@linux.dev
++---
++ drivers/net/wireless/ath/ath11k/pci.c | 5 +----
++ 1 file changed, 1 insertion(+), 4 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/pci.c
+++++ b/drivers/net/wireless/ath/ath11k/pci.c
++@@ -540,7 +540,7 @@ static int ath11k_pci_claim(struct ath11
++ 	if (!ab->mem) {
++ 		ath11k_err(ab, "failed to map pci bar %d\n", ATH11K_PCI_BAR_NUM);
++ 		ret = -EIO;
++-		goto clear_master;
+++		goto release_region;
++ 	}
++ 
++ 	ab->mem_ce = ab->mem;
++@@ -548,8 +548,6 @@ static int ath11k_pci_claim(struct ath11
++ 	ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot pci_mem 0x%pK\n", ab->mem);
++ 	return 0;
++ 
++-clear_master:
++-	pci_clear_master(pdev);
++ release_region:
++ 	pci_release_region(pdev, ATH11K_PCI_BAR_NUM);
++ disable_device:
++@@ -565,7 +563,6 @@ static void ath11k_pci_free_region(struc
++ 
++ 	pci_iounmap(pci_dev, ab->mem);
++ 	ab->mem = NULL;
++-	pci_clear_master(pci_dev);
++ 	pci_release_region(pci_dev, ATH11K_PCI_BAR_NUM);
++ 	if (pci_is_enabled(pci_dev))
++ 		pci_disable_device(pci_dev);
+diff --git a/package/kernel/mac80211/patches/ath11k/0056-wifi-ath11k-Disable-Spectral-scan-upon-removing-inte.patch b/package/kernel/mac80211/patches/ath11k/0056-wifi-ath11k-Disable-Spectral-scan-upon-removing-inte.patch
+new file mode 100644
+index 0000000000..44532a4d72
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0056-wifi-ath11k-Disable-Spectral-scan-upon-removing-inte.patch
+@@ -0,0 +1,36 @@
++From 5c690db63b45c6c4c4932b13173af71df369dba5 Mon Sep 17 00:00:00 2001
++From: Tamizh Chelvam Raja <quic_tamizhr@quicinc.com>
++Date: Tue, 28 Mar 2023 12:41:50 +0530
++Subject: [PATCH] wifi: ath11k: Disable Spectral scan upon removing interface
++
++Host might receive spectral events during interface
++down sequence and this might create below errors.
++
++failed to handle dma buf release event -22
++failed to handle dma buf release event -22
++
++Fix this by disabling spectral config during remove interface.
++
++Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Tamizh Chelvam Raja <quic_tamizhr@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230328071150.29645-1-quic_tamizhr@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 5 +++++
++ 1 file changed, 5 insertions(+)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -6685,6 +6685,11 @@ static void ath11k_mac_op_remove_interfa
++ 	ath11k_dbg(ab, ATH11K_DBG_MAC, "mac remove interface (vdev %d)\n",
++ 		   arvif->vdev_id);
++ 
+++	ret = ath11k_spectral_vif_stop(arvif);
+++	if (ret)
+++		ath11k_warn(ab, "failed to stop spectral for vdev %i: %d\n",
+++			    arvif->vdev_id, ret);
+++
++ 	if (arvif->vdev_type == WMI_VDEV_TYPE_STA)
++ 		ath11k_mac_11d_scan_stop(ar);
++ 
+diff --git a/package/kernel/mac80211/patches/ath11k/0057-wifi-ath11k-enable-SAR-support-on-WCN6750.patch b/package/kernel/mac80211/patches/ath11k/0057-wifi-ath11k-enable-SAR-support-on-WCN6750.patch
+new file mode 100644
+index 0000000000..5e64e552c1
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0057-wifi-ath11k-enable-SAR-support-on-WCN6750.patch
+@@ -0,0 +1,29 @@
++From abf57d84973ce1abcb67504ac0df8aea1fe09a76 Mon Sep 17 00:00:00 2001
++From: Youghandhar Chintala <quic_youghand@quicinc.com>
++Date: Tue, 28 Mar 2023 17:04:55 +0530
++Subject: [PATCH] wifi: ath11k: enable SAR support on WCN6750
++
++Currently, SAR is enabled only on WCN6855, enable this for WCN6750 too. This
++functionality gets triggered, when the user space application calls
++NL80211_CMD_SET_SAR_SPECS.
++
++Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
++
++Signed-off-by: Youghandhar Chintala <quic_youghand@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230328113455.11252-1-quic_youghand@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/core.c | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/net/wireless/ath/ath11k/core.c
+++++ b/drivers/net/wireless/ath/ath11k/core.c
++@@ -593,7 +593,7 @@ static const struct ath11k_hw_params ath
++ 		.current_cc_support = true,
++ 		.dbr_debug_support = false,
++ 		.global_reset = false,
++-		.bios_sar_capa = NULL,
+++		.bios_sar_capa = &ath11k_hw_sar_capa_wcn6855,
++ 		.m3_fw_support = false,
++ 		.fixed_bdf_addr = false,
++ 		.fixed_mem_region = false,
+diff --git a/package/kernel/mac80211/patches/ath11k/0058-wifi-ath11k-pci-Add-more-MODULE_FIRMWARE-entries.patch b/package/kernel/mac80211/patches/ath11k/0058-wifi-ath11k-pci-Add-more-MODULE_FIRMWARE-entries.patch
+new file mode 100644
+index 0000000000..585864eff2
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0058-wifi-ath11k-pci-Add-more-MODULE_FIRMWARE-entries.patch
+@@ -0,0 +1,36 @@
++From 06c58473969239e00d76b683edd511952060ca56 Mon Sep 17 00:00:00 2001
++From: Takashi Iwai <tiwai@suse.de>
++Date: Thu, 30 Mar 2023 16:37:18 +0200
++Subject: [PATCH] wifi: ath11k: pci: Add more MODULE_FIRMWARE() entries
++
++As there are a few more models supported by the driver, let's add the
++missing MODULE_FIRMWARE() entries for them.  The lack of them resulted
++in the missing device enablement on some systems, such as the
++installation image of openSUSE.
++
++While we are at it, use the wildcard instead of listing each firmware
++files individually for each.
++
++Signed-off-by: Takashi Iwai <tiwai@suse.de>
++Reviewed-by: Simon Horman <simon.horman@corigine.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230330143718.19511-1-tiwai@suse.de
++---
++ drivers/net/wireless/ath/ath11k/pci.c | 9 +++++----
++ 1 file changed, 5 insertions(+), 4 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/pci.c
+++++ b/drivers/net/wireless/ath/ath11k/pci.c
++@@ -1036,7 +1036,8 @@ module_exit(ath11k_pci_exit);
++ MODULE_DESCRIPTION("Driver support for Qualcomm Technologies 802.11ax WLAN PCIe devices");
++ MODULE_LICENSE("Dual BSD/GPL");
++ 
++-/* QCA639x 2.0 firmware files */
++-MODULE_FIRMWARE(ATH11K_FW_DIR "/QCA6390/hw2.0/" ATH11K_BOARD_API2_FILE);
++-MODULE_FIRMWARE(ATH11K_FW_DIR "/QCA6390/hw2.0/" ATH11K_AMSS_FILE);
++-MODULE_FIRMWARE(ATH11K_FW_DIR "/QCA6390/hw2.0/" ATH11K_M3_FILE);
+++/* firmware files */
+++MODULE_FIRMWARE(ATH11K_FW_DIR "/QCA6390/hw2.0/*");
+++MODULE_FIRMWARE(ATH11K_FW_DIR "/QCN9074/hw1.0/*");
+++MODULE_FIRMWARE(ATH11K_FW_DIR "/WCN6855/hw2.0/*");
+++MODULE_FIRMWARE(ATH11K_FW_DIR "/WCN6855/hw2.1/*");
+diff --git a/package/kernel/mac80211/patches/ath11k/0059-wifi-ath11k-print-a-warning-when-crypto_alloc_shash-.patch b/package/kernel/mac80211/patches/ath11k/0059-wifi-ath11k-print-a-warning-when-crypto_alloc_shash-.patch
+new file mode 100644
+index 0000000000..fab52a0fa7
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0059-wifi-ath11k-print-a-warning-when-crypto_alloc_shash-.patch
+@@ -0,0 +1,34 @@
++From a87a9110ac0dcbfd9458b6665c141fa1c16a669d Mon Sep 17 00:00:00 2001
++From: Kalle Valo <quic_kvalo@quicinc.com>
++Date: Wed, 5 Apr 2023 12:04:25 +0300
++Subject: [PATCH] wifi: ath11k: print a warning when crypto_alloc_shash() fails
++
++Christoph reported that ath11k failed to initialise when michael_mic.ko
++module was not installed. To make it easier to notice that case print a
++warning when crypto_alloc_shash() fails.
++
++Compile tested only.
++
++Reported-by: Christoph Hellwig <hch@lst.de>
++Link: https://lore.kernel.org/all/20221130133016.GC3055@lst.de/
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230405090425.1351-1-kvalo@kernel.org
++---
++ drivers/net/wireless/ath/ath11k/dp_rx.c | 5 ++++-
++ 1 file changed, 4 insertions(+), 1 deletion(-)
++
++--- a/drivers/net/wireless/ath/ath11k/dp_rx.c
+++++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
++@@ -3106,8 +3106,11 @@ int ath11k_peer_rx_frag_setup(struct ath
++ 	int i;
++ 
++ 	tfm = crypto_alloc_shash("michael_mic", 0, 0);
++-	if (IS_ERR(tfm))
+++	if (IS_ERR(tfm)) {
+++		ath11k_warn(ab, "failed to allocate michael_mic shash: %ld\n",
+++			    PTR_ERR(tfm));
++ 		return PTR_ERR(tfm);
+++	}
++ 
++ 	spin_lock_bh(&ab->base_lock);
++ 
+diff --git a/package/kernel/mac80211/patches/ath11k/0060-wifi-ath11k-Ignore-frags-from-uninitialized-peer-in-.patch b/package/kernel/mac80211/patches/ath11k/0060-wifi-ath11k-Ignore-frags-from-uninitialized-peer-in-.patch
+new file mode 100644
+index 0000000000..5bbf9e04a4
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0060-wifi-ath11k-Ignore-frags-from-uninitialized-peer-in-.patch
+@@ -0,0 +1,104 @@
++From a06bfb3c9f69f303692cdae87bc0899d2ae8b2a6 Mon Sep 17 00:00:00 2001
++From: Harshitha Prem <quic_hprem@quicinc.com>
++Date: Tue, 4 Apr 2023 00:11:54 +0530
++Subject: [PATCH] wifi: ath11k: Ignore frags from uninitialized peer in dp.
++
++When max virtual ap interfaces are configured in all the bands with
++ACS and hostapd restart is done every 60s, a crash is observed at
++random times.
++In this certain scenario, a fragmented packet is received for
++self peer, for which rx_tid and rx_frags are not initialized in
++datapath. While handling this fragment, crash is observed as the
++rx_frag list is uninitialised and when we walk in
++ath11k_dp_rx_h_sort_frags, skb null leads to exception.
++
++To address this, before processing received fragments we check
++dp_setup_done flag is set to ensure that peer has completed its
++dp peer setup for fragment queue, else ignore processing the
++fragments.
++
++Call trace:
++  ath11k_dp_process_rx_err+0x550/0x1084 [ath11k]
++  ath11k_dp_service_srng+0x70/0x370 [ath11k]
++  0xffffffc009693a04
++  __napi_poll+0x30/0xa4
++  net_rx_action+0x118/0x270
++  __do_softirq+0x10c/0x244
++  irq_exit+0x64/0xb4
++  __handle_domain_irq+0x88/0xac
++  gic_handle_irq+0x74/0xbc
++  el1_irq+0xf0/0x1c0
++  arch_cpu_idle+0x10/0x18
++  do_idle+0x104/0x248
++  cpu_startup_entry+0x20/0x64
++  rest_init+0xd0/0xdc
++  arch_call_rest_init+0xc/0x14
++  start_kernel+0x480/0x4b8
++  Code: f9400281 f94066a2 91405021 b94a0023 (f9406401)
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Harshitha Prem <quic_hprem@quicinc.com>
++Signed-off-by: Nagarajan Maran <quic_nmaran@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230403184155.8670-2-quic_nmaran@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/dp.c    | 4 +++-
++ drivers/net/wireless/ath/ath11k/dp_rx.c | 8 ++++++++
++ drivers/net/wireless/ath/ath11k/peer.h  | 1 +
++ 3 files changed, 12 insertions(+), 1 deletion(-)
++
++--- a/drivers/net/wireless/ath/ath11k/dp.c
+++++ b/drivers/net/wireless/ath/ath11k/dp.c
++@@ -36,6 +36,7 @@ void ath11k_dp_peer_cleanup(struct ath11
++ 	}
++ 
++ 	ath11k_peer_rx_tid_cleanup(ar, peer);
+++	peer->dp_setup_done = false;
++ 	crypto_free_shash(peer->tfm_mmic);
++ 	spin_unlock_bh(&ab->base_lock);
++ }
++@@ -72,7 +73,8 @@ int ath11k_dp_peer_setup(struct ath11k *
++ 	ret = ath11k_peer_rx_frag_setup(ar, addr, vdev_id);
++ 	if (ret) {
++ 		ath11k_warn(ab, "failed to setup rx defrag context\n");
++-		return ret;
+++		tid--;
+++		goto peer_clean;
++ 	}
++ 
++ 	/* TODO: Setup other peer specific resource used in data path */
++--- a/drivers/net/wireless/ath/ath11k/dp_rx.c
+++++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
++@@ -3130,6 +3130,7 @@ int ath11k_peer_rx_frag_setup(struct ath
++ 	}
++ 
++ 	peer->tfm_mmic = tfm;
+++	peer->dp_setup_done = true;
++ 	spin_unlock_bh(&ab->base_lock);
++ 
++ 	return 0;
++@@ -3575,6 +3576,13 @@ static int ath11k_dp_rx_frag_h_mpdu(stru
++ 		ret = -ENOENT;
++ 		goto out_unlock;
++ 	}
+++	if (!peer->dp_setup_done) {
+++		ath11k_warn(ab, "The peer %pM [%d] has uninitialized datapath\n",
+++			    peer->addr, peer_id);
+++		ret = -ENOENT;
+++		goto out_unlock;
+++	}
+++
++ 	rx_tid = &peer->rx_tid[tid];
++ 
++ 	if ((!skb_queue_empty(&rx_tid->rx_frags) && seqno != rx_tid->cur_sn) ||
++--- a/drivers/net/wireless/ath/ath11k/peer.h
+++++ b/drivers/net/wireless/ath/ath11k/peer.h
++@@ -35,6 +35,7 @@ struct ath11k_peer {
++ 	u16 sec_type;
++ 	u16 sec_type_grp;
++ 	bool is_authorized;
+++	bool dp_setup_done;
++ };
++ 
++ void ath11k_peer_unmap_event(struct ath11k_base *ab, u16 peer_id);
+diff --git a/package/kernel/mac80211/patches/ath11k/0061-wifi-ath11k-fix-undefined-behavior-with-__fls-in-dp.patch b/package/kernel/mac80211/patches/ath11k/0061-wifi-ath11k-fix-undefined-behavior-with-__fls-in-dp.patch
+new file mode 100644
+index 0000000000..d68c19f160
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0061-wifi-ath11k-fix-undefined-behavior-with-__fls-in-dp.patch
+@@ -0,0 +1,29 @@
++From 41e02bf4ae32cf2ac47b08b4caaa9c1a032e4ce7 Mon Sep 17 00:00:00 2001
++From: Harshitha Prem <quic_hprem@quicinc.com>
++Date: Tue, 4 Apr 2023 00:11:55 +0530
++Subject: [PATCH] wifi: ath11k: fix undefined behavior with __fls in dp
++
++"__fls" would have an undefined behavior if the argument is passed
++as "0". Hence, added changes to handle the same.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Harshitha Prem <quic_hprem@quicinc.com>
++Signed-off-by: Nagarajan Maran <quic_nmaran@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230403184155.8670-3-quic_nmaran@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/dp_rx.c | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/net/wireless/ath/ath11k/dp_rx.c
+++++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
++@@ -3598,7 +3598,7 @@ static int ath11k_dp_rx_frag_h_mpdu(stru
++ 		goto out_unlock;
++ 	}
++ 
++-	if (frag_no > __fls(rx_tid->rx_frag_bitmap))
+++	if (!rx_tid->rx_frag_bitmap || (frag_no > __fls(rx_tid->rx_frag_bitmap)))
++ 		__skb_queue_tail(&rx_tid->rx_frags, msdu);
++ 	else
++ 		ath11k_dp_rx_h_sort_frags(ar, &rx_tid->rx_frags, msdu);
+diff --git a/package/kernel/mac80211/patches/ath11k/0062-wifi-ath11k-fix-double-free-of-peer-rx_tid-during-re.patch b/package/kernel/mac80211/patches/ath11k/0062-wifi-ath11k-fix-double-free-of-peer-rx_tid-during-re.patch
+new file mode 100644
+index 0000000000..dd37b1e4fa
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0062-wifi-ath11k-fix-double-free-of-peer-rx_tid-during-re.patch
+@@ -0,0 +1,144 @@
++From 93a91f40c25c3d0e61f8540a7accf105090f9995 Mon Sep 17 00:00:00 2001
++From: Harshitha Prem <quic_hprem@quicinc.com>
++Date: Mon, 17 Apr 2023 13:35:00 +0300
++Subject: [PATCH] wifi: ath11k: fix double free of peer rx_tid during reo cmd
++ failure
++
++Peer rx_tid is locally copied thrice during peer_rx_tid_cleanup to
++send REO_CMD_UPDATE_RX_QUEUE followed by REO_CMD_FLUSH_CACHE to flush
++all aged REO descriptors from HW cache.
++
++When sending REO_CMD_FLUSH_CACHE fails, we do dma unmap of already
++mapped rx_tid->vaddr and free it. This is not checked during
++reo_cmd_list_cleanup() and dp_reo_cmd_free() before trying to free and
++unmap again.
++
++Fix this by setting rx_tid->vaddr NULL in rx tid delete and also
++wherever freeing it to check in reo_cmd_list_cleanup() and
++reo_cmd_free() before trying to free again.
++
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Sathishkumar Muruganandam <quic_murugana@quicinc.com>
++Signed-off-by: Harshitha Prem <quic_hprem@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230403182420.23375-2-quic_hprem@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/dp_rx.c | 43 ++++++++++++++++++-------
++ 1 file changed, 31 insertions(+), 12 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/dp_rx.c
+++++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
++@@ -668,13 +668,18 @@ void ath11k_dp_reo_cmd_list_cleanup(stru
++ 	struct ath11k_dp *dp = &ab->dp;
++ 	struct dp_reo_cmd *cmd, *tmp;
++ 	struct dp_reo_cache_flush_elem *cmd_cache, *tmp_cache;
+++	struct dp_rx_tid *rx_tid;
++ 
++ 	spin_lock_bh(&dp->reo_cmd_lock);
++ 	list_for_each_entry_safe(cmd, tmp, &dp->reo_cmd_list, list) {
++ 		list_del(&cmd->list);
++-		dma_unmap_single(ab->dev, cmd->data.paddr,
++-				 cmd->data.size, DMA_BIDIRECTIONAL);
++-		kfree(cmd->data.vaddr);
+++		rx_tid = &cmd->data;
+++		if (rx_tid->vaddr) {
+++			dma_unmap_single(ab->dev, rx_tid->paddr,
+++					 rx_tid->size, DMA_BIDIRECTIONAL);
+++			kfree(rx_tid->vaddr);
+++			rx_tid->vaddr = NULL;
+++		}
++ 		kfree(cmd);
++ 	}
++ 
++@@ -682,9 +687,13 @@ void ath11k_dp_reo_cmd_list_cleanup(stru
++ 				 &dp->reo_cmd_cache_flush_list, list) {
++ 		list_del(&cmd_cache->list);
++ 		dp->reo_cmd_cache_flush_count--;
++-		dma_unmap_single(ab->dev, cmd_cache->data.paddr,
++-				 cmd_cache->data.size, DMA_BIDIRECTIONAL);
++-		kfree(cmd_cache->data.vaddr);
+++		rx_tid = &cmd_cache->data;
+++		if (rx_tid->vaddr) {
+++			dma_unmap_single(ab->dev, rx_tid->paddr,
+++					 rx_tid->size, DMA_BIDIRECTIONAL);
+++			kfree(rx_tid->vaddr);
+++			rx_tid->vaddr = NULL;
+++		}
++ 		kfree(cmd_cache);
++ 	}
++ 	spin_unlock_bh(&dp->reo_cmd_lock);
++@@ -698,10 +707,12 @@ static void ath11k_dp_reo_cmd_free(struc
++ 	if (status != HAL_REO_CMD_SUCCESS)
++ 		ath11k_warn(dp->ab, "failed to flush rx tid hw desc, tid %d status %d\n",
++ 			    rx_tid->tid, status);
++-
++-	dma_unmap_single(dp->ab->dev, rx_tid->paddr, rx_tid->size,
++-			 DMA_BIDIRECTIONAL);
++-	kfree(rx_tid->vaddr);
+++	if (rx_tid->vaddr) {
+++		dma_unmap_single(dp->ab->dev, rx_tid->paddr, rx_tid->size,
+++				 DMA_BIDIRECTIONAL);
+++		kfree(rx_tid->vaddr);
+++		rx_tid->vaddr = NULL;
+++	}
++ }
++ 
++ static void ath11k_dp_reo_cache_flush(struct ath11k_base *ab,
++@@ -740,6 +751,7 @@ static void ath11k_dp_reo_cache_flush(st
++ 		dma_unmap_single(ab->dev, rx_tid->paddr, rx_tid->size,
++ 				 DMA_BIDIRECTIONAL);
++ 		kfree(rx_tid->vaddr);
+++		rx_tid->vaddr = NULL;
++ 	}
++ }
++ 
++@@ -792,6 +804,7 @@ free_desc:
++ 	dma_unmap_single(ab->dev, rx_tid->paddr, rx_tid->size,
++ 			 DMA_BIDIRECTIONAL);
++ 	kfree(rx_tid->vaddr);
+++	rx_tid->vaddr = NULL;
++ }
++ 
++ void ath11k_peer_rx_tid_delete(struct ath11k *ar,
++@@ -804,6 +817,8 @@ void ath11k_peer_rx_tid_delete(struct at
++ 	if (!rx_tid->active)
++ 		return;
++ 
+++	rx_tid->active = false;
+++
++ 	cmd.flag = HAL_REO_CMD_FLG_NEED_STATUS;
++ 	cmd.addr_lo = lower_32_bits(rx_tid->paddr);
++ 	cmd.addr_hi = upper_32_bits(rx_tid->paddr);
++@@ -818,9 +833,11 @@ void ath11k_peer_rx_tid_delete(struct at
++ 		dma_unmap_single(ar->ab->dev, rx_tid->paddr, rx_tid->size,
++ 				 DMA_BIDIRECTIONAL);
++ 		kfree(rx_tid->vaddr);
+++		rx_tid->vaddr = NULL;
++ 	}
++ 
++-	rx_tid->active = false;
+++	rx_tid->paddr = 0;
+++	rx_tid->size = 0;
++ }
++ 
++ static int ath11k_dp_rx_link_desc_return(struct ath11k_base *ab,
++@@ -967,6 +984,7 @@ static void ath11k_dp_rx_tid_mem_free(st
++ 	dma_unmap_single(ab->dev, rx_tid->paddr, rx_tid->size,
++ 			 DMA_BIDIRECTIONAL);
++ 	kfree(rx_tid->vaddr);
+++	rx_tid->vaddr = NULL;
++ 
++ 	rx_tid->active = false;
++ 
++@@ -1067,7 +1085,8 @@ int ath11k_peer_rx_tid_setup(struct ath1
++ 	return ret;
++ 
++ err_mem_free:
++-	kfree(vaddr);
+++	kfree(rx_tid->vaddr);
+++	rx_tid->vaddr = NULL;
++ 
++ 	return ret;
++ }
+diff --git a/package/kernel/mac80211/patches/ath11k/0063-wifi-ath11k-Prevent-REO-cmd-failures.patch b/package/kernel/mac80211/patches/ath11k/0063-wifi-ath11k-Prevent-REO-cmd-failures.patch
+new file mode 100644
+index 0000000000..4b9af18062
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0063-wifi-ath11k-Prevent-REO-cmd-failures.patch
+@@ -0,0 +1,43 @@
++From a8ae833657a45746debde85c38bb7f070d344026 Mon Sep 17 00:00:00 2001
++From: Harshitha Prem <quic_hprem@quicinc.com>
++Date: Mon, 17 Apr 2023 13:35:01 +0300
++Subject: [PATCH] wifi: ath11k: Prevent REO cmd failures
++
++Prevent REO cmd failures causing double free by increasing REO cmd
++ring size and moving REO status ring mask to IRQ group 3 from group
++0 to separate from tx completion ring on IRQ group 0 which may delay
++reo status processing.
++
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Sathishkumar Muruganandam <quic_murugana@quicinc.com>
++Signed-off-by: Harshitha Prem <quic_hprem@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230403182420.23375-3-quic_hprem@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/dp.h | 2 +-
++ drivers/net/wireless/ath/ath11k/hw.c | 1 +
++ 2 files changed, 2 insertions(+), 1 deletion(-)
++
++--- a/drivers/net/wireless/ath/ath11k/dp.h
+++++ b/drivers/net/wireless/ath/ath11k/dp.h
++@@ -214,7 +214,7 @@ struct ath11k_pdev_dp {
++ #define DP_REO_REINJECT_RING_SIZE	32
++ #define DP_RX_RELEASE_RING_SIZE		1024
++ #define DP_REO_EXCEPTION_RING_SIZE	128
++-#define DP_REO_CMD_RING_SIZE		128
+++#define DP_REO_CMD_RING_SIZE		256
++ #define DP_REO_STATUS_RING_SIZE		2048
++ #define DP_RXDMA_BUF_RING_SIZE		4096
++ #define DP_RXDMA_REFILL_RING_SIZE	2048
++--- a/drivers/net/wireless/ath/ath11k/hw.c
+++++ b/drivers/net/wireless/ath/ath11k/hw.c
++@@ -1233,6 +1233,7 @@ const struct ath11k_hw_ring_mask ath11k_
++ 		ATH11K_RX_WBM_REL_RING_MASK_0,
++ 	},
++ 	.reo_status = {
+++		0, 0, 0,
++ 		ATH11K_REO_STATUS_RING_MASK_0,
++ 	},
++ 	.rxdma2host = {
+diff --git a/package/kernel/mac80211/patches/ath11k/0064-wifi-ath11k-add-peer-mac-information-in-failure-case.patch b/package/kernel/mac80211/patches/ath11k/0064-wifi-ath11k-add-peer-mac-information-in-failure-case.patch
+new file mode 100644
+index 0000000000..fbcbdfff71
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0064-wifi-ath11k-add-peer-mac-information-in-failure-case.patch
+@@ -0,0 +1,74 @@
++From 20487cc3ff36bbfa9505f0a078ba98f09abfc717 Mon Sep 17 00:00:00 2001
++From: Harshitha Prem <quic_hprem@quicinc.com>
++Date: Mon, 17 Apr 2023 13:35:01 +0300
++Subject: [PATCH] wifi: ath11k: add peer mac information in failure cases
++
++During reo command failure, the peer mac detail for which the reo
++command was not successful is unknown. Hence, to improve the
++debuggability, add the peer mac information in the failure cases
++which would be useful during multi client cases.
++
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Sathishkumar Muruganandam <quic_murugana@quicinc.com>
++Signed-off-by: Harshitha Prem <quic_hprem@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230403182420.23375-4-quic_hprem@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/dp_rx.c | 16 ++++++++++------
++ 1 file changed, 10 insertions(+), 6 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/dp_rx.c
+++++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
++@@ -1009,7 +1009,8 @@ int ath11k_peer_rx_tid_setup(struct ath1
++ 
++ 	peer = ath11k_peer_find(ab, vdev_id, peer_mac);
++ 	if (!peer) {
++-		ath11k_warn(ab, "failed to find the peer to set up rx tid\n");
+++		ath11k_warn(ab, "failed to find the peer %pM to set up rx tid\n",
+++			    peer_mac);
++ 		spin_unlock_bh(&ab->base_lock);
++ 		return -ENOENT;
++ 	}
++@@ -1022,7 +1023,8 @@ int ath11k_peer_rx_tid_setup(struct ath1
++ 						    ba_win_sz, ssn, true);
++ 		spin_unlock_bh(&ab->base_lock);
++ 		if (ret) {
++-			ath11k_warn(ab, "failed to update reo for rx tid %d\n", tid);
+++			ath11k_warn(ab, "failed to update reo for peer %pM rx tid %d\n: %d",
+++				    peer_mac, tid, ret);
++ 			return ret;
++ 		}
++ 
++@@ -1030,8 +1032,8 @@ int ath11k_peer_rx_tid_setup(struct ath1
++ 							     peer_mac, paddr,
++ 							     tid, 1, ba_win_sz);
++ 		if (ret)
++-			ath11k_warn(ab, "failed to send wmi command to update rx reorder queue, tid :%d (%d)\n",
++-				    tid, ret);
+++			ath11k_warn(ab, "failed to send wmi rx reorder queue for peer %pM tid %d: %d\n",
+++				    peer_mac, tid, ret);
++ 		return ret;
++ 	}
++ 
++@@ -1064,6 +1066,8 @@ int ath11k_peer_rx_tid_setup(struct ath1
++ 	ret = dma_mapping_error(ab->dev, paddr);
++ 	if (ret) {
++ 		spin_unlock_bh(&ab->base_lock);
+++		ath11k_warn(ab, "failed to setup dma map for peer %pM rx tid %d: %d\n",
+++			    peer_mac, tid, ret);
++ 		goto err_mem_free;
++ 	}
++ 
++@@ -1077,8 +1081,8 @@ int ath11k_peer_rx_tid_setup(struct ath1
++ 	ret = ath11k_wmi_peer_rx_reorder_queue_setup(ar, vdev_id, peer_mac,
++ 						     paddr, tid, 1, ba_win_sz);
++ 	if (ret) {
++-		ath11k_warn(ar->ab, "failed to setup rx reorder queue, tid :%d (%d)\n",
++-			    tid, ret);
+++		ath11k_warn(ar->ab, "failed to setup rx reorder queue for peer %pM tid %d: %d\n",
+++			    peer_mac, tid, ret);
++ 		ath11k_dp_rx_tid_mem_free(ab, peer_mac, vdev_id, tid);
++ 	}
++ 
+diff --git a/package/kernel/mac80211/patches/ath11k/0065-wifi-ath11k-fix-tx-status-reporting-in-encap-offload.patch b/package/kernel/mac80211/patches/ath11k/0065-wifi-ath11k-fix-tx-status-reporting-in-encap-offload.patch
+new file mode 100644
+index 0000000000..e2fe419158
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0065-wifi-ath11k-fix-tx-status-reporting-in-encap-offload.patch
+@@ -0,0 +1,119 @@
++From 6257c702264c44d74c6b71f0c62a7665da2dc356 Mon Sep 17 00:00:00 2001
++From: Pradeep Kumar Chitrapu <quic_pradeepc@quicinc.com>
++Date: Mon, 17 Apr 2023 13:35:02 +0300
++Subject: [PATCH] wifi: ath11k: fix tx status reporting in encap offload mode
++
++ieee80211_tx_status() treats packets in 802.11 frame format and
++tries to extract sta address from packet header. When tx encap
++offload is enabled, this becomes invalid operation. Hence, switch
++to using ieee80211_tx_status_ext() after filling in station
++address for handling both 802.11 and 802.3 frames.
++
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Pradeep Kumar Chitrapu <quic_pradeepc@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230403195738.25367-2-quic_pradeepc@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/dp.h    |  4 +++
++ drivers/net/wireless/ath/ath11k/dp_tx.c | 33 ++++++++++++++++++++++++-
++ drivers/net/wireless/ath/ath11k/dp_tx.h |  1 +
++ 3 files changed, 37 insertions(+), 1 deletion(-)
++
++--- a/drivers/net/wireless/ath/ath11k/dp.h
+++++ b/drivers/net/wireless/ath/ath11k/dp.h
++@@ -303,12 +303,16 @@ struct ath11k_dp {
++ 
++ #define HTT_TX_WBM_COMP_STATUS_OFFSET 8
++ 
+++#define HTT_INVALID_PEER_ID	0xffff
+++
++ /* HTT tx completion is overlaid in wbm_release_ring */
++ #define HTT_TX_WBM_COMP_INFO0_STATUS		GENMASK(12, 9)
++ #define HTT_TX_WBM_COMP_INFO0_REINJECT_REASON	GENMASK(16, 13)
++ #define HTT_TX_WBM_COMP_INFO0_REINJECT_REASON	GENMASK(16, 13)
++ 
++ #define HTT_TX_WBM_COMP_INFO1_ACK_RSSI		GENMASK(31, 24)
+++#define HTT_TX_WBM_COMP_INFO2_SW_PEER_ID	GENMASK(15, 0)
+++#define HTT_TX_WBM_COMP_INFO2_VALID		BIT(21)
++ 
++ struct htt_tx_wbm_completion {
++ 	u32 info0;
++--- a/drivers/net/wireless/ath/ath11k/dp_tx.c
+++++ b/drivers/net/wireless/ath/ath11k/dp_tx.c
++@@ -316,10 +316,12 @@ ath11k_dp_tx_htt_tx_complete_buf(struct
++ 				 struct dp_tx_ring *tx_ring,
++ 				 struct ath11k_dp_htt_wbm_tx_status *ts)
++ {
+++	struct ieee80211_tx_status status = { 0 };
++ 	struct sk_buff *msdu;
++ 	struct ieee80211_tx_info *info;
++ 	struct ath11k_skb_cb *skb_cb;
++ 	struct ath11k *ar;
+++	struct ath11k_peer *peer;
++ 
++ 	spin_lock(&tx_ring->tx_idr_lock);
++ 	msdu = idr_remove(&tx_ring->txbuf_idr, ts->msdu_id);
++@@ -341,6 +343,11 @@ ath11k_dp_tx_htt_tx_complete_buf(struct
++ 
++ 	dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
++ 
+++	if (!skb_cb->vif) {
+++		dev_kfree_skb_any(msdu);
+++		return;
+++	}
+++
++ 	memset(&info->status, 0, sizeof(info->status));
++ 
++ 	if (ts->acked) {
++@@ -355,7 +362,23 @@ ath11k_dp_tx_htt_tx_complete_buf(struct
++ 		}
++ 	}
++ 
++-	ieee80211_tx_status(ar->hw, msdu);
+++	spin_lock_bh(&ab->base_lock);
+++	peer = ath11k_peer_find_by_id(ab, ts->peer_id);
+++	if (!peer || !peer->sta) {
+++		ath11k_dbg(ab, ATH11K_DBG_DATA,
+++			   "dp_tx: failed to find the peer with peer_id %d\n",
+++			    ts->peer_id);
+++		spin_unlock_bh(&ab->base_lock);
+++		dev_kfree_skb_any(msdu);
+++		return;
+++	}
+++	spin_unlock_bh(&ab->base_lock);
+++
+++	status.sta = peer->sta;
+++	status.info = info;
+++	status.skb = msdu;
+++
+++	ieee80211_tx_status_ext(ar->hw, &status);
++ }
++ 
++ static void
++@@ -379,7 +402,15 @@ ath11k_dp_tx_process_htt_tx_complete(str
++ 		ts.msdu_id = msdu_id;
++ 		ts.ack_rssi = FIELD_GET(HTT_TX_WBM_COMP_INFO1_ACK_RSSI,
++ 					status_desc->info1);
+++
+++		if (FIELD_GET(HTT_TX_WBM_COMP_INFO2_VALID, status_desc->info2))
+++			ts.peer_id = FIELD_GET(HTT_TX_WBM_COMP_INFO2_SW_PEER_ID,
+++					       status_desc->info2);
+++		else
+++			ts.peer_id = HTT_INVALID_PEER_ID;
+++
++ 		ath11k_dp_tx_htt_tx_complete_buf(ab, tx_ring, &ts);
+++
++ 		break;
++ 	case HAL_WBM_REL_HTT_TX_COMP_STATUS_REINJ:
++ 	case HAL_WBM_REL_HTT_TX_COMP_STATUS_INSPECT:
++--- a/drivers/net/wireless/ath/ath11k/dp_tx.h
+++++ b/drivers/net/wireless/ath/ath11k/dp_tx.h
++@@ -13,6 +13,7 @@ struct ath11k_dp_htt_wbm_tx_status {
++ 	u32 msdu_id;
++ 	bool acked;
++ 	int ack_rssi;
+++	u16 peer_id;
++ };
++ 
++ void ath11k_dp_tx_update_txcompl(struct ath11k *ar, struct hal_tx_status *ts);
+diff --git a/package/kernel/mac80211/patches/ath11k/0066-wifi-ath11k-Fix-incorrect-update-of-radiotap-fields.patch b/package/kernel/mac80211/patches/ath11k/0066-wifi-ath11k-Fix-incorrect-update-of-radiotap-fields.patch
+new file mode 100644
+index 0000000000..4f94580100
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0066-wifi-ath11k-Fix-incorrect-update-of-radiotap-fields.patch
+@@ -0,0 +1,49 @@
++From 2f0c9ac8362da09c80f1cd422ef7fd6fa9b252b9 Mon Sep 17 00:00:00 2001
++From: Pradeep Kumar Chitrapu <quic_pradeepc@quicinc.com>
++Date: Mon, 17 Apr 2023 13:35:02 +0300
++Subject: [PATCH] wifi: ath11k: Fix incorrect update of radiotap fields
++
++Fix incorrect update of ppdu stats causing incorrect radiotap
++fields.
++
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Pradeep Kumar Chitrapu <quic_pradeepc@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230403195738.25367-3-quic_pradeepc@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/hal_rx.c | 4 ++--
++ drivers/net/wireless/ath/ath11k/hal_rx.h | 2 +-
++ 2 files changed, 3 insertions(+), 3 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/hal_rx.c
+++++ b/drivers/net/wireless/ath/ath11k/hal_rx.c
++@@ -1029,7 +1029,7 @@ ath11k_hal_rx_parse_mon_status_tlv(struc
++ 		info1 = __le32_to_cpu(vht_sig->info1);
++ 
++ 		ppdu_info->ldpc = FIELD_GET(HAL_RX_VHT_SIG_A_INFO_INFO1_SU_MU_CODING,
++-					    info0);
+++					    info1);
++ 		ppdu_info->mcs = FIELD_GET(HAL_RX_VHT_SIG_A_INFO_INFO1_MCS,
++ 					   info1);
++ 		gi_setting = FIELD_GET(HAL_RX_VHT_SIG_A_INFO_INFO1_GI_SETTING,
++@@ -1452,7 +1452,7 @@ ath11k_hal_rx_parse_mon_status_tlv(struc
++ 		 * PHYRX_OTHER_RECEIVE_INFO TLV.
++ 		 */
++ 		ppdu_info->rssi_comb =
++-			FIELD_GET(HAL_RX_PHYRX_RSSI_LEGACY_INFO_INFO1_RSSI_COMB,
+++			FIELD_GET(HAL_RX_PHYRX_RSSI_LEGACY_INFO_INFO0_RSSI_COMB,
++ 				  __le32_to_cpu(rssi->info0));
++ 
++ 		if (db2dbm) {
++--- a/drivers/net/wireless/ath/ath11k/hal_rx.h
+++++ b/drivers/net/wireless/ath/ath11k/hal_rx.h
++@@ -385,7 +385,7 @@ struct hal_rx_he_sig_b2_ofdma_info {
++ 	__le32 info0;
++ } __packed;
++ 
++-#define HAL_RX_PHYRX_RSSI_LEGACY_INFO_INFO1_RSSI_COMB	GENMASK(15, 8)
+++#define HAL_RX_PHYRX_RSSI_LEGACY_INFO_INFO0_RSSI_COMB	GENMASK(15, 8)
++ 
++ #define HAL_RX_PHYRX_RSSI_PREAMBLE_PRI20	GENMASK(7, 0)
++ 
+diff --git a/package/kernel/mac80211/patches/ath11k/0067-wifi-ath11k-Fix-SKB-corruption-in-REO-destination-ri.patch b/package/kernel/mac80211/patches/ath11k/0067-wifi-ath11k-Fix-SKB-corruption-in-REO-destination-ri.patch
+new file mode 100644
+index 0000000000..8b300f3a79
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0067-wifi-ath11k-Fix-SKB-corruption-in-REO-destination-ri.patch
+@@ -0,0 +1,70 @@
++From f9fff67d2d7ca6fa8066132003a3deef654c55b1 Mon Sep 17 00:00:00 2001
++From: Nagarajan Maran <quic_nmaran@quicinc.com>
++Date: Mon, 17 Apr 2023 13:35:02 +0300
++Subject: [PATCH] wifi: ath11k: Fix SKB corruption in REO destination ring
++
++While running traffics for a long time, randomly an RX descriptor
++filled with value "0" from REO destination ring is received.
++This descriptor which is invalid causes the wrong SKB (SKB stored in
++the IDR lookup with buffer id "0") to be fetched which in turn
++causes SKB memory corruption issue and the same leads to crash
++after some time.
++
++Changed the start id for idr allocation to "1" and the buffer id "0"
++is reserved for error validation. Introduced Sanity check to validate
++the descriptor, before processing the SKB.
++
++Crash Signature :
++
++Unable to handle kernel paging request at virtual address 3f004900
++PC points to "b15_dma_inv_range+0x30/0x50"
++LR points to "dma_cache_maint_page+0x8c/0x128".
++The Backtrace obtained is as follows:
++[<8031716c>] (b15_dma_inv_range) from [<80313a4c>] (dma_cache_maint_page+0x8c/0x128)
++[<80313a4c>] (dma_cache_maint_page) from [<80313b90>] (__dma_page_dev_to_cpu+0x28/0xcc)
++[<80313b90>] (__dma_page_dev_to_cpu) from [<7fb5dd68>] (ath11k_dp_process_rx+0x1e8/0x4a4 [ath11k])
++[<7fb5dd68>] (ath11k_dp_process_rx [ath11k]) from [<7fb53c20>] (ath11k_dp_service_srng+0xb0/0x2ac [ath11k])
++[<7fb53c20>] (ath11k_dp_service_srng [ath11k]) from [<7f67bba4>] (ath11k_pci_ext_grp_napi_poll+0x1c/0x78 [ath11k_pci])
++[<7f67bba4>] (ath11k_pci_ext_grp_napi_poll [ath11k_pci]) from [<807d5cf4>] (__napi_poll+0x28/0xb8)
++[<807d5cf4>] (__napi_poll) from [<807d5f28>] (net_rx_action+0xf0/0x280)
++[<807d5f28>] (net_rx_action) from [<80302148>] (__do_softirq+0xd0/0x280)
++[<80302148>] (__do_softirq) from [<80320408>] (irq_exit+0x74/0xd4)
++[<80320408>] (irq_exit) from [<803638a4>] (__handle_domain_irq+0x90/0xb4)
++[<803638a4>] (__handle_domain_irq) from [<805bedec>] (gic_handle_irq+0x58/0x90)
++[<805bedec>] (gic_handle_irq) from [<80301a78>] (__irq_svc+0x58/0x8c)
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Nagarajan Maran <quic_nmaran@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230403191533.28114-1-quic_nmaran@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/dp_rx.c | 9 ++++++---
++ 1 file changed, 6 insertions(+), 3 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/dp_rx.c
+++++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
++@@ -389,10 +389,10 @@ int ath11k_dp_rxbufs_replenish(struct at
++ 			goto fail_free_skb;
++ 
++ 		spin_lock_bh(&rx_ring->idr_lock);
++-		buf_id = idr_alloc(&rx_ring->bufs_idr, skb, 0,
++-				   rx_ring->bufs_max * 3, GFP_ATOMIC);
+++		buf_id = idr_alloc(&rx_ring->bufs_idr, skb, 1,
+++				   (rx_ring->bufs_max * 3) + 1, GFP_ATOMIC);
++ 		spin_unlock_bh(&rx_ring->idr_lock);
++-		if (buf_id < 0)
+++		if (buf_id <= 0)
++ 			goto fail_dma_unmap;
++ 
++ 		desc = ath11k_hal_srng_src_get_next_entry(ab, srng);
++@@ -2665,6 +2665,9 @@ try_again:
++ 				   cookie);
++ 		mac_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_PDEV_ID, cookie);
++ 
+++		if (unlikely(buf_id == 0))
+++			continue;
+++
++ 		ar = ab->pdevs[mac_id].ar;
++ 		rx_ring = &ar->dp.rx_refill_buf_ring;
++ 		spin_lock_bh(&rx_ring->idr_lock);
+diff --git a/package/kernel/mac80211/patches/ath11k/0068-wifi-ath11k-Remove-disabling-of-80-80-and-160-MHz.patch b/package/kernel/mac80211/patches/ath11k/0068-wifi-ath11k-Remove-disabling-of-80-80-and-160-MHz.patch
+new file mode 100644
+index 0000000000..ce5ffd273b
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0068-wifi-ath11k-Remove-disabling-of-80-80-and-160-MHz.patch
+@@ -0,0 +1,49 @@
++From b100722a777f6455d913666a376f81342b2cb995 Mon Sep 17 00:00:00 2001
++From: Muna Sinada <quic_msinada@quicinc.com>
++Date: Mon, 17 Apr 2023 13:22:27 -0700
++Subject: [PATCH] wifi: ath11k: Remove disabling of 80+80 and 160 MHz
++
++This is a regression fix for 80+80 and 160 MHz support bits being
++cleared, therefore not adverised. Remove disable of 80+80 and 160 MHz
++capability flags and assign valid center frequency 2 similar to
++VHT80_80.
++
++Fixes: 38dfe775d0ab ("wifi: ath11k: push MU-MIMO params from hostapd to hardware")
++Reported-by: Robert Marko <robert.marko@sartura.hr>
++Tested-by: Robert Marko <robert.marko@sartura.hr> # IPQ8074 WLAN.HK.2.9.0.1-01385-QCAHKSWPL_SILICONZ-1
++Link: https://bugzilla.kernel.org/show_bug.cgi?id=217299
++Co-developed-by: P Praneesh <quic_ppranees@quicinc.com>
++Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
++Signed-off-by: Muna Sinada <quic_msinada@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/1681762947-13882-1-git-send-email-quic_msinada@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 4 ----
++ drivers/net/wireless/ath/ath11k/wmi.c | 3 ++-
++ 2 files changed, 2 insertions(+), 5 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -5585,10 +5585,6 @@ static int ath11k_mac_copy_he_cap(struct
++ 
++ 		he_cap_elem->mac_cap_info[1] &=
++ 			IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_MASK;
++-		he_cap_elem->phy_cap_info[0] &=
++-			~IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
++-		he_cap_elem->phy_cap_info[0] &=
++-			~IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G;
++ 
++ 		he_cap_elem->phy_cap_info[5] &=
++ 			~IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK;
++--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++++ b/drivers/net/wireless/ath/ath11k/wmi.c
++@@ -871,7 +871,8 @@ static void ath11k_wmi_put_wmi_channel(s
++ 
++ 		chan->band_center_freq2 = arg->channel.band_center_freq1;
++ 
++-	} else if (arg->channel.mode == MODE_11AC_VHT80_80) {
+++	} else if ((arg->channel.mode == MODE_11AC_VHT80_80) ||
+++		   (arg->channel.mode == MODE_11AX_HE80_80)) {
++ 		chan->band_center_freq2 = arg->channel.band_center_freq2;
++ 	} else {
++ 		chan->band_center_freq2 = 0;
+diff --git a/package/kernel/mac80211/patches/ath11k/0069-wifi-ath11k-fix-registration-of-6Ghz-only-phy-withou.patch b/package/kernel/mac80211/patches/ath11k/0069-wifi-ath11k-fix-registration-of-6Ghz-only-phy-withou.patch
+new file mode 100644
+index 0000000000..32468dbc4c
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0069-wifi-ath11k-fix-registration-of-6Ghz-only-phy-withou.patch
+@@ -0,0 +1,61 @@
++From e2ceb1de2f83aafd8003f0b72dfd4b7441e97d14 Mon Sep 17 00:00:00 2001
++From: Maxime Bizon <mbizon@freebox.fr>
++Date: Fri, 21 Apr 2023 16:54:45 +0200
++Subject: [PATCH] wifi: ath11k: fix registration of 6Ghz-only phy without the
++ full channel range
++
++Because of what seems to be a typo, a 6Ghz-only phy for which the BDF
++does not allow the 7115Mhz channel will fail to register:
++
++  WARNING: CPU: 2 PID: 106 at net/wireless/core.c:907 wiphy_register+0x914/0x954
++  Modules linked in: ath11k_pci sbsa_gwdt
++  CPU: 2 PID: 106 Comm: kworker/u8:5 Not tainted 6.3.0-rc7-next-20230418-00549-g1e096a17625a-dirty #9
++  Hardware name: Freebox V7R Board (DT)
++  Workqueue: ath11k_qmi_driver_event ath11k_qmi_driver_event_work
++  pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
++  pc : wiphy_register+0x914/0x954
++  lr : ieee80211_register_hw+0x67c/0xc10
++  sp : ffffff800b123aa0
++  x29: ffffff800b123aa0 x28: 0000000000000000 x27: 0000000000000000
++  x26: 0000000000000000 x25: 0000000000000006 x24: ffffffc008d51418
++  x23: ffffffc008cb0838 x22: ffffff80176c2460 x21: 0000000000000168
++  x20: ffffff80176c0000 x19: ffffff80176c03e0 x18: 0000000000000014
++  x17: 00000000cbef338c x16: 00000000d2a26f21 x15: 00000000ad6bb85f
++  x14: 0000000000000020 x13: 0000000000000020 x12: 00000000ffffffbd
++  x11: 0000000000000208 x10: 00000000fffffdf7 x9 : ffffffc009394718
++  x8 : ffffff80176c0528 x7 : 000000007fffffff x6 : 0000000000000006
++  x5 : 0000000000000005 x4 : ffffff800b304284 x3 : ffffff800b304284
++  x2 : ffffff800b304d98 x1 : 0000000000000000 x0 : 0000000000000000
++  Call trace:
++   wiphy_register+0x914/0x954
++   ieee80211_register_hw+0x67c/0xc10
++   ath11k_mac_register+0x7c4/0xe10
++   ath11k_core_qmi_firmware_ready+0x1f4/0x570
++   ath11k_qmi_driver_event_work+0x198/0x590
++   process_one_work+0x1b8/0x328
++   worker_thread+0x6c/0x414
++   kthread+0x100/0x104
++   ret_from_fork+0x10/0x20
++  ---[ end trace 0000000000000000 ]---
++  ath11k_pci 0002:01:00.0: ieee80211 registration failed: -22
++  ath11k_pci 0002:01:00.0: failed register the radio with mac80211: -22
++  ath11k_pci 0002:01:00.0: failed to create pdev core: -22
++
++Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230421145445.2612280-1-mbizon@freebox.fr
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -8892,7 +8892,7 @@ static int ath11k_mac_setup_channels_rat
++ 	}
++ 
++ 	if (supported_bands & WMI_HOST_WLAN_5G_CAP) {
++-		if (reg_cap->high_5ghz_chan >= ATH11K_MAX_6G_FREQ) {
+++		if (reg_cap->high_5ghz_chan >= ATH11K_MIN_6G_FREQ) {
++ 			channels = kmemdup(ath11k_6ghz_channels,
++ 					   sizeof(ath11k_6ghz_channels), GFP_KERNEL);
++ 			if (!channels) {
+diff --git a/package/kernel/mac80211/patches/ath11k/0070-wifi-ath-work-around-false-positive-stringop-overrea.patch b/package/kernel/mac80211/patches/ath11k/0070-wifi-ath-work-around-false-positive-stringop-overrea.patch
+new file mode 100644
+index 0000000000..aa4df16a90
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0070-wifi-ath-work-around-false-positive-stringop-overrea.patch
+@@ -0,0 +1,84 @@
++From 695df2f417d25202bdac9cde3c82d2acb6492b4d Mon Sep 17 00:00:00 2001
++From: Arnd Bergmann <arnd@arndb.de>
++Date: Fri, 5 May 2023 16:11:25 +0300
++Subject: [PATCH] wifi: ath: work around false-positive stringop-overread
++ warning
++
++In a rare arm64 randconfig build, I got multiple warnings for ath11k
++and ath12k:
++
++In function 'ath11k_peer_assoc_h_ht',
++    inlined from 'ath11k_peer_assoc_prepare' at drivers/net/wireless/ath/ath11k/mac.c:2665:2:
++drivers/net/wireless/ath/ath11k/mac.c:1709:13: error: 'ath11k_peer_assoc_h_ht_masked' reading 10 bytes from a region of size 0 [-Werror=stringop-overread]
++ 1709 |         if (ath11k_peer_assoc_h_ht_masked(ht_mcs_mask))
++      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
++
++This happens whenever gcc-13 fails to inline one of the functions
++that take a fixed-length array argument but gets passed a pointer.
++
++Change these functions to all take a regular pointer argument
++instead.
++
++Signed-off-by: Arnd Bergmann <arnd@arndb.de>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230417205447.1800912-1-arnd@kernel.org
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 12 ++++++------
++ 1 file changed, 6 insertions(+), 6 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -433,7 +433,7 @@ u8 ath11k_mac_bitrate_to_idx(const struc
++ }
++ 
++ static u32
++-ath11k_mac_max_ht_nss(const u8 ht_mcs_mask[IEEE80211_HT_MCS_MASK_LEN])
+++ath11k_mac_max_ht_nss(const u8 *ht_mcs_mask)
++ {
++ 	int nss;
++ 
++@@ -445,7 +445,7 @@ ath11k_mac_max_ht_nss(const u8 ht_mcs_ma
++ }
++ 
++ static u32
++-ath11k_mac_max_vht_nss(const u16 vht_mcs_mask[NL80211_VHT_NSS_MAX])
+++ath11k_mac_max_vht_nss(const u16 *vht_mcs_mask)
++ {
++ 	int nss;
++ 
++@@ -457,7 +457,7 @@ ath11k_mac_max_vht_nss(const u16 vht_mcs
++ }
++ 
++ static u32
++-ath11k_mac_max_he_nss(const u16 he_mcs_mask[NL80211_HE_NSS_MAX])
+++ath11k_mac_max_he_nss(const u16 *he_mcs_mask)
++ {
++ 	int nss;
++ 
++@@ -1658,7 +1658,7 @@ static void ath11k_peer_assoc_h_rates(st
++ }
++ 
++ static bool
++-ath11k_peer_assoc_h_ht_masked(const u8 ht_mcs_mask[IEEE80211_HT_MCS_MASK_LEN])
+++ath11k_peer_assoc_h_ht_masked(const u8 *ht_mcs_mask)
++ {
++ 	int nss;
++ 
++@@ -1670,7 +1670,7 @@ ath11k_peer_assoc_h_ht_masked(const u8 h
++ }
++ 
++ static bool
++-ath11k_peer_assoc_h_vht_masked(const u16 vht_mcs_mask[])
+++ath11k_peer_assoc_h_vht_masked(const u16 *vht_mcs_mask)
++ {
++ 	int nss;
++ 
++@@ -2065,7 +2065,7 @@ static u16 ath11k_peer_assoc_h_he_limit(
++ }
++ 
++ static bool
++-ath11k_peer_assoc_h_he_masked(const u16 he_mcs_mask[NL80211_HE_NSS_MAX])
+++ath11k_peer_assoc_h_he_masked(const u16 *he_mcs_mask)
++ {
++ 	int nss;
++ 
+diff --git a/package/kernel/mac80211/patches/ath11k/0071-wifi-ath11k-driver-settings-for-MBSSID-and-EMA.patch b/package/kernel/mac80211/patches/ath11k/0071-wifi-ath11k-driver-settings-for-MBSSID-and-EMA.patch
+new file mode 100644
+index 0000000000..bede4819ca
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0071-wifi-ath11k-driver-settings-for-MBSSID-and-EMA.patch
+@@ -0,0 +1,133 @@
++From a08dbb04d7365a04d52882143cf196005bfc88c3 Mon Sep 17 00:00:00 2001
++From: Aloka Dixit <quic_alokad@quicinc.com>
++Date: Fri, 5 May 2023 16:11:27 +0300
++Subject: [PATCH 71/77] wifi: ath11k: driver settings for MBSSID and EMA
++
++Advertise the driver support for multiple BSSID (MBSSID) and
++enhanced multi-BSSID advertisements (EMA) by setting extended
++capabilities.
++
++Configure mbssid_max_interfaces and ema_max_profile_periodicity
++fields in structure wiphy which are used to advertise maximum number
++of interfaces and profile periodicity supported by the driver.
++
++Add new WMI fields to configure maximum vdev count supported for
++MBSSID and profile periodicity in case of EMA.
++Setting WMI_RSRC_CFG_FLAG2_CALC_NEXT_DTIM_COUNT_SET flag
++indicates that the firmware should track and update the DTIM counts
++for each non-transmitted profile.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Aloka Dixit <quic_alokad@quicinc.com>
++Co-developed-by: John Crispin <john@phrozen.org>
++Signed-off-by: John Crispin <john@phrozen.org>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230405221648.17950-2-quic_alokad@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/hw.c  | 3 +++
++ drivers/net/wireless/ath/ath11k/hw.h  | 1 +
++ drivers/net/wireless/ath/ath11k/mac.c | 7 +++++++
++ drivers/net/wireless/ath/ath11k/wmi.c | 3 +++
++ drivers/net/wireless/ath/ath11k/wmi.h | 6 ++++++
++ 5 files changed, 20 insertions(+)
++
++--- a/drivers/net/wireless/ath/ath11k/hw.c
+++++ b/drivers/net/wireless/ath/ath11k/hw.c
++@@ -202,6 +202,9 @@ static void ath11k_init_wmi_config_ipq80
++ 	config->twt_ap_sta_count = 1000;
++ 	config->flag1 |= WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64;
++ 	config->flag1 |= WMI_RSRC_CFG_FLAG1_ACK_RSSI;
+++	config->ema_max_vap_cnt = ab->num_radios;
+++	config->ema_max_profile_period = TARGET_EMA_MAX_PROFILE_PERIOD;
+++	config->beacon_tx_offload_max_vdev += config->ema_max_vap_cnt;
++ }
++ 
++ static int ath11k_hw_mac_id_to_pdev_id_ipq8074(struct ath11k_hw_params *hw,
++--- a/drivers/net/wireless/ath/ath11k/hw.h
+++++ b/drivers/net/wireless/ath/ath11k/hw.h
++@@ -64,6 +64,7 @@
++ #define TARGET_NUM_WDS_ENTRIES		32
++ #define TARGET_DMA_BURST_SIZE		1
++ #define TARGET_RX_BATCHMODE		1
+++#define TARGET_EMA_MAX_PROFILE_PERIOD	8
++ 
++ #define ATH11K_HW_MAX_QUEUES		4
++ #define ATH11K_QUEUE_LEN		4096
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -9001,19 +9001,23 @@ static int ath11k_mac_setup_iface_combin
++ 
++ static const u8 ath11k_if_types_ext_capa[] = {
++ 	[0] = WLAN_EXT_CAPA1_EXT_CHANNEL_SWITCHING,
+++	[2] = WLAN_EXT_CAPA3_MULTI_BSSID_SUPPORT,
++ 	[7] = WLAN_EXT_CAPA8_OPMODE_NOTIF,
++ };
++ 
++ static const u8 ath11k_if_types_ext_capa_sta[] = {
++ 	[0] = WLAN_EXT_CAPA1_EXT_CHANNEL_SWITCHING,
+++	[2] = WLAN_EXT_CAPA3_MULTI_BSSID_SUPPORT,
++ 	[7] = WLAN_EXT_CAPA8_OPMODE_NOTIF,
++ 	[9] = WLAN_EXT_CAPA10_TWT_REQUESTER_SUPPORT,
++ };
++ 
++ static const u8 ath11k_if_types_ext_capa_ap[] = {
++ 	[0] = WLAN_EXT_CAPA1_EXT_CHANNEL_SWITCHING,
+++	[2] = WLAN_EXT_CAPA3_MULTI_BSSID_SUPPORT,
++ 	[7] = WLAN_EXT_CAPA8_OPMODE_NOTIF,
++ 	[9] = WLAN_EXT_CAPA10_TWT_RESPONDER_SUPPORT,
+++	[10] = WLAN_EXT_CAPA11_EMA_SUPPORT,
++ };
++ 
++ static const struct wiphy_iftype_ext_capab ath11k_iftypes_ext_capa[] = {
++@@ -9251,6 +9255,9 @@ static int __ath11k_mac_register(struct
++ 		wiphy_ext_feature_set(ar->hw->wiphy,
++ 				      NL80211_EXT_FEATURE_ENABLE_FTM_RESPONDER);
++ 
+++	ar->hw->wiphy->mbssid_max_interfaces = TARGET_NUM_VDEVS(ab);
+++	ar->hw->wiphy->ema_max_profile_periodicity = TARGET_EMA_MAX_PROFILE_PERIOD;
+++
++ 	ath11k_reg_init(ar);
++ 
++ 	if (!test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags)) {
++--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++++ b/drivers/net/wireless/ath/ath11k/wmi.c
++@@ -3987,6 +3987,9 @@ ath11k_wmi_copy_resource_config(struct w
++ 		~(1 << WMI_CFG_HOST_SERVICE_FLAG_REG_CC_EXT);
++ 	wmi_cfg->host_service_flags |= (tg_cfg->is_reg_cc_ext_event_supported <<
++ 					WMI_CFG_HOST_SERVICE_FLAG_REG_CC_EXT);
+++	wmi_cfg->flags2 = WMI_RSRC_CFG_FLAG2_CALC_NEXT_DTIM_COUNT_SET;
+++	wmi_cfg->ema_max_vap_cnt = tg_cfg->ema_max_vap_cnt;
+++	wmi_cfg->ema_max_profile_period = tg_cfg->ema_max_profile_period;
++ }
++ 
++ static int ath11k_init_cmd_send(struct ath11k_pdev_wmi *wmi,
++--- a/drivers/net/wireless/ath/ath11k/wmi.h
+++++ b/drivers/net/wireless/ath/ath11k/wmi.h
++@@ -2317,6 +2317,7 @@ struct wmi_init_cmd {
++ } __packed;
++ 
++ #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5)
+++#define WMI_RSRC_CFG_FLAG2_CALC_NEXT_DTIM_COUNT_SET BIT(9)
++ #define WMI_RSRC_CFG_FLAG1_ACK_RSSI BIT(18)
++ 
++ #define WMI_CFG_HOST_SERVICE_FLAG_REG_CC_EXT 4
++@@ -2389,6 +2390,9 @@ struct wmi_resource_config {
++ 	u32 msdu_flow_override_config1;
++ 	u32 flags2;
++ 	u32 host_service_flags;
+++	u32 max_rnr_neighbours;
+++	u32 ema_max_vap_cnt;
+++	u32 ema_max_profile_period;
++ } __packed;
++ 
++ struct wmi_service_ready_event {
++@@ -5646,6 +5650,8 @@ struct target_resource_config {
++ 	u32 twt_ap_pdev_count;
++ 	u32 twt_ap_sta_count;
++ 	u8 is_reg_cc_ext_event_supported;
+++	u32 ema_max_vap_cnt;
+++	u32 ema_max_profile_period;
++ };
++ 
++ enum wmi_debug_log_param {
+diff --git a/package/kernel/mac80211/patches/ath11k/0072-wifi-ath11k-MBSSID-configuration-during-vdev-create-.patch b/package/kernel/mac80211/patches/ath11k/0072-wifi-ath11k-MBSSID-configuration-during-vdev-create-.patch
+new file mode 100644
+index 0000000000..4ba0717319
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0072-wifi-ath11k-MBSSID-configuration-during-vdev-create-.patch
+@@ -0,0 +1,215 @@
++From 5a81610acf66c4ad6e1a1fbd09f3f555fca863b1 Mon Sep 17 00:00:00 2001
++From: Aloka Dixit <quic_alokad@quicinc.com>
++Date: Fri, 5 May 2023 16:11:27 +0300
++Subject: [PATCH 72/77] wifi: ath11k: MBSSID configuration during vdev
++ create/start
++
++Configure multiple BSSID flags and index of the transmitting interface
++in vdev create/start commands depending on the service bit
++WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Aloka Dixit <quic_alokad@quicinc.com>
++Co-developed-by: John Crispin <john@phrozen.org>
++Signed-off-by: John Crispin <john@phrozen.org>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230405221648.17950-3-quic_alokad@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 70 +++++++++++++++++++++++++--
++ drivers/net/wireless/ath/ath11k/wmi.c |  5 ++
++ drivers/net/wireless/ath/ath11k/wmi.h | 19 ++++++++
++ 3 files changed, 90 insertions(+), 4 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -6181,17 +6181,62 @@ static void ath11k_mac_op_stop(struct ie
++ 	atomic_set(&ar->num_pending_mgmt_tx, 0);
++ }
++ 
++-static void
++-ath11k_mac_setup_vdev_create_params(struct ath11k_vif *arvif,
++-				    struct vdev_create_params *params)
+++static int ath11k_mac_setup_vdev_params_mbssid(struct ath11k_vif *arvif,
+++					       u32 *flags, u32 *tx_vdev_id)
+++{
+++	struct ath11k *ar = arvif->ar;
+++	struct ath11k_vif *tx_arvif;
+++	struct ieee80211_vif *tx_vif;
+++
+++	*tx_vdev_id = 0;
+++	tx_vif = arvif->vif->mbssid_tx_vif;
+++	if (!tx_vif) {
+++		*flags = WMI_HOST_VDEV_FLAGS_NON_MBSSID_AP;
+++		return 0;
+++	}
+++
+++	tx_arvif = (void *)tx_vif->drv_priv;
+++
+++	if (arvif->vif->bss_conf.nontransmitted) {
+++		if (ar->hw->wiphy != ieee80211_vif_to_wdev(tx_vif)->wiphy)
+++			return -EINVAL;
+++
+++		*flags = WMI_HOST_VDEV_FLAGS_NON_TRANSMIT_AP;
+++		*tx_vdev_id = ath11k_vif_to_arvif(tx_vif)->vdev_id;
+++	} else if (tx_arvif == arvif) {
+++		*flags = WMI_HOST_VDEV_FLAGS_TRANSMIT_AP;
+++	} else {
+++		return -EINVAL;
+++	}
+++
+++	if (arvif->vif->bss_conf.ema_ap)
+++		*flags |= WMI_HOST_VDEV_FLAGS_EMA_MODE;
+++
+++	return 0;
+++}
+++
+++static int ath11k_mac_setup_vdev_create_params(struct ath11k_vif *arvif,
+++					       struct vdev_create_params *params)
++ {
++ 	struct ath11k *ar = arvif->ar;
++ 	struct ath11k_pdev *pdev = ar->pdev;
+++	int ret;
++ 
++ 	params->if_id = arvif->vdev_id;
++ 	params->type = arvif->vdev_type;
++ 	params->subtype = arvif->vdev_subtype;
++ 	params->pdev_id = pdev->pdev_id;
+++	params->mbssid_flags = 0;
+++	params->mbssid_tx_vdev_id = 0;
+++
+++	if (!test_bit(WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT,
+++		      ar->ab->wmi_ab.svc_map)) {
+++		ret = ath11k_mac_setup_vdev_params_mbssid(arvif,
+++							  &params->mbssid_flags,
+++							  &params->mbssid_tx_vdev_id);
+++		if (ret)
+++			return ret;
+++	}
++ 
++ 	if (pdev->cap.supported_bands & WMI_HOST_WLAN_2G_CAP) {
++ 		params->chains[NL80211_BAND_2GHZ].tx = ar->num_tx_chains;
++@@ -6206,6 +6251,7 @@ ath11k_mac_setup_vdev_create_params(stru
++ 		params->chains[NL80211_BAND_6GHZ].tx = ar->num_tx_chains;
++ 		params->chains[NL80211_BAND_6GHZ].rx = ar->num_rx_chains;
++ 	}
+++	return 0;
++ }
++ 
++ static void ath11k_mac_op_update_vif_offload(struct ieee80211_hw *hw,
++@@ -6500,7 +6546,12 @@ static int ath11k_mac_op_add_interface(s
++ 	for (i = 0; i < ARRAY_SIZE(vif->hw_queue); i++)
++ 		vif->hw_queue[i] = i % (ATH11K_HW_MAX_QUEUES - 1);
++ 
++-	ath11k_mac_setup_vdev_create_params(arvif, &vdev_param);
+++	ret = ath11k_mac_setup_vdev_create_params(arvif, &vdev_param);
+++	if (ret) {
+++		ath11k_warn(ab, "failed to create vdev parameters %d: %d\n",
+++			    arvif->vdev_id, ret);
+++		goto err;
+++	}
++ 
++ 	ret = ath11k_wmi_vdev_create(ar, vif->addr, &vdev_param);
++ 	if (ret) {
++@@ -6905,6 +6956,17 @@ ath11k_mac_vdev_start_restart(struct ath
++ 	arg.pref_tx_streams = ar->num_tx_chains;
++ 	arg.pref_rx_streams = ar->num_rx_chains;
++ 
+++	arg.mbssid_flags = 0;
+++	arg.mbssid_tx_vdev_id = 0;
+++	if (test_bit(WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT,
+++		     ar->ab->wmi_ab.svc_map)) {
+++		ret = ath11k_mac_setup_vdev_params_mbssid(arvif,
+++							  &arg.mbssid_flags,
+++							  &arg.mbssid_tx_vdev_id);
+++		if (ret)
+++			return ret;
+++	}
+++
++ 	if (arvif->vdev_type == WMI_VDEV_TYPE_AP) {
++ 		arg.ssid = arvif->u.ap.ssid;
++ 		arg.ssid_len = arvif->u.ap.ssid_len;
++--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++++ b/drivers/net/wireless/ath/ath11k/wmi.c
++@@ -724,6 +724,9 @@ int ath11k_wmi_vdev_create(struct ath11k
++ 	cmd->vdev_subtype = param->subtype;
++ 	cmd->num_cfg_txrx_streams = WMI_NUM_SUPPORTED_BAND_MAX;
++ 	cmd->pdev_id = param->pdev_id;
+++	cmd->mbssid_flags = param->mbssid_flags;
+++	cmd->mbssid_tx_vdev_id = param->mbssid_tx_vdev_id;
+++
++ 	ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
++ 
++ 	ptr = skb->data + sizeof(*cmd);
++@@ -941,6 +944,8 @@ int ath11k_wmi_vdev_start(struct ath11k
++ 	cmd->cac_duration_ms = arg->cac_duration_ms;
++ 	cmd->regdomain = arg->regdomain;
++ 	cmd->he_ops = arg->he_ops;
+++	cmd->mbssid_flags = arg->mbssid_flags;
+++	cmd->mbssid_tx_vdev_id = arg->mbssid_tx_vdev_id;
++ 
++ 	if (!restart) {
++ 		if (arg->ssid) {
++--- a/drivers/net/wireless/ath/ath11k/wmi.h
+++++ b/drivers/net/wireless/ath/ath11k/wmi.h
++@@ -137,6 +137,14 @@ enum {
++ 	WMI_AUTORATE_3200NS_GI = BIT(11),
++ };
++ 
+++enum {
+++	WMI_HOST_VDEV_FLAGS_NON_MBSSID_AP       = 0x00000001,
+++	WMI_HOST_VDEV_FLAGS_TRANSMIT_AP         = 0x00000002,
+++	WMI_HOST_VDEV_FLAGS_NON_TRANSMIT_AP     = 0x00000004,
+++	WMI_HOST_VDEV_FLAGS_EMA_MODE            = 0x00000008,
+++	WMI_HOST_VDEV_FLAGS_SCAN_MODE_VAP       = 0x00000010,
+++};
+++
++ /*
++  * wmi command groups.
++  */
++@@ -2096,6 +2104,7 @@ enum wmi_tlv_service {
++ 	WMI_TLV_SERVICE_EXT2_MSG = 220,
++ 	WMI_TLV_SERVICE_PEER_POWER_SAVE_DURATION_SUPPORT = 246,
++ 	WMI_TLV_SERVICE_SRG_SRP_SPATIAL_REUSE_SUPPORT = 249,
+++	WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT = 253,
++ 	WMI_TLV_SERVICE_PASSIVE_SCAN_START_TIME_ENHANCE = 263,
++ 
++ 	/* The second 128 bits */
++@@ -2583,6 +2592,8 @@ struct vdev_create_params {
++ 		u8 rx;
++ 	} chains[NUM_NL80211_BANDS];
++ 	u32 pdev_id;
+++	u32 mbssid_flags;
+++	u32 mbssid_tx_vdev_id;
++ };
++ 
++ struct wmi_vdev_create_cmd {
++@@ -2593,6 +2604,8 @@ struct wmi_vdev_create_cmd {
++ 	struct wmi_mac_addr vdev_macaddr;
++ 	u32 num_cfg_txrx_streams;
++ 	u32 pdev_id;
+++	u32 mbssid_flags;
+++	u32 mbssid_tx_vdev_id;
++ } __packed;
++ 
++ struct wmi_vdev_txrx_streams {
++@@ -2656,6 +2669,9 @@ struct wmi_vdev_start_request_cmd {
++ 	u32 he_ops;
++ 	u32 cac_duration_ms;
++ 	u32 regdomain;
+++	u32 min_data_rate;
+++	u32 mbssid_flags;
+++	u32 mbssid_tx_vdev_id;
++ } __packed;
++ 
++ #define MGMT_TX_DL_FRM_LEN		     64
++@@ -2825,6 +2841,9 @@ struct wmi_vdev_start_req_arg {
++ 	u32 pref_rx_streams;
++ 	u32 pref_tx_streams;
++ 	u32 num_noa_descriptors;
+++	u32 min_data_rate;
+++	u32 mbssid_flags;
+++	u32 mbssid_tx_vdev_id;
++ };
++ 
++ struct peer_create_params {
+diff --git a/package/kernel/mac80211/patches/ath11k/0073-wifi-ath11k-rename-MBSSID-fields-in-wmi_vdev_up_cmd.patch b/package/kernel/mac80211/patches/ath11k/0073-wifi-ath11k-rename-MBSSID-fields-in-wmi_vdev_up_cmd.patch
+new file mode 100644
+index 0000000000..023a1dbb9f
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0073-wifi-ath11k-rename-MBSSID-fields-in-wmi_vdev_up_cmd.patch
+@@ -0,0 +1,52 @@
++From cf604e72bc6e6db68c7fcaa8779b03ec14b8d2fa Mon Sep 17 00:00:00 2001
++From: Aloka Dixit <quic_alokad@quicinc.com>
++Date: Fri, 5 May 2023 16:11:27 +0300
++Subject: [PATCH 73/77] wifi: ath11k: rename MBSSID fields in wmi_vdev_up_cmd
++
++Rename trans_bssid to tx_vdev_bssid to make it similar to vdev_bssid.
++
++Rename profile_num to nontx_profile_cnt, and profile_idx to
++nontx_profile_idx which makes it clear that these store configurations
++related to MBSSID non-transmitting profiles.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Aloka Dixit <quic_alokad@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230405221648.17950-4-quic_alokad@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/wmi.c | 6 +++---
++ drivers/net/wireless/ath/ath11k/wmi.h | 6 +++---
++ 2 files changed, 6 insertions(+), 6 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++++ b/drivers/net/wireless/ath/ath11k/wmi.c
++@@ -1029,10 +1029,10 @@ int ath11k_wmi_vdev_up(struct ath11k *ar
++ 		bss_conf = &arvif->vif->bss_conf;
++ 
++ 		if (bss_conf->nontransmitted) {
++-			ether_addr_copy(cmd->trans_bssid.addr,
+++			ether_addr_copy(cmd->tx_vdev_bssid.addr,
++ 					bss_conf->transmitter_bssid);
++-			cmd->profile_idx = bss_conf->bssid_index;
++-			cmd->profile_num = bss_conf->bssid_indicator;
+++			cmd->nontx_profile_idx = bss_conf->bssid_index;
+++			cmd->nontx_profile_cnt = bss_conf->bssid_indicator;
++ 		}
++ 	}
++ 
++--- a/drivers/net/wireless/ath/ath11k/wmi.h
+++++ b/drivers/net/wireless/ath/ath11k/wmi.h
++@@ -2625,9 +2625,9 @@ struct wmi_vdev_up_cmd {
++ 	u32 vdev_id;
++ 	u32 vdev_assoc_id;
++ 	struct wmi_mac_addr vdev_bssid;
++-	struct wmi_mac_addr trans_bssid;
++-	u32 profile_idx;
++-	u32 profile_num;
+++	struct wmi_mac_addr tx_vdev_bssid;
+++	u32 nontx_profile_idx;
+++	u32 nontx_profile_cnt;
++ } __packed;
++ 
++ struct wmi_vdev_stop_cmd {
+diff --git a/package/kernel/mac80211/patches/ath11k/0074-wifi-ath11k-MBSSID-parameter-configuration-in-AP-mod.patch b/package/kernel/mac80211/patches/ath11k/0074-wifi-ath11k-MBSSID-parameter-configuration-in-AP-mod.patch
+new file mode 100644
+index 0000000000..d93e27dd42
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0074-wifi-ath11k-MBSSID-parameter-configuration-in-AP-mod.patch
+@@ -0,0 +1,138 @@
++From c82dc33f252fd8883be66f2d0230af0fd734c683 Mon Sep 17 00:00:00 2001
++From: Aloka Dixit <quic_alokad@quicinc.com>
++Date: Fri, 5 May 2023 16:11:27 +0300
++Subject: [PATCH 74/77] wifi: ath11k: MBSSID parameter configuration in AP mode
++
++Include MBSSID parameters in WMI vdev up operation.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Aloka Dixit <quic_alokad@quicinc.com>
++Co-developed-by: John Crispin <john@phrozen.org>
++Signed-off-by: John Crispin <john@phrozen.org>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230405221648.17950-5-quic_alokad@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 29 +++++++++++++++++++++------
++ drivers/net/wireless/ath/ath11k/wmi.c |  8 +++++++-
++ drivers/net/wireless/ath/ath11k/wmi.h |  3 ++-
++ 3 files changed, 32 insertions(+), 8 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -964,7 +964,7 @@ static int ath11k_mac_monitor_vdev_start
++ 		return ret;
++ 	}
++ 
++-	ret = ath11k_wmi_vdev_up(ar, vdev_id, 0, ar->mac_addr);
+++	ret = ath11k_wmi_vdev_up(ar, vdev_id, 0, ar->mac_addr, NULL, 0, 0);
++ 	if (ret) {
++ 		ath11k_warn(ar->ab, "failed to put up monitor vdev %i: %d\n",
++ 			    vdev_id, ret);
++@@ -1423,6 +1423,7 @@ static void ath11k_control_beaconing(str
++ 				     struct ieee80211_bss_conf *info)
++ {
++ 	struct ath11k *ar = arvif->ar;
+++	struct ath11k_vif *tx_arvif = NULL;
++ 	int ret = 0;
++ 
++ 	lockdep_assert_held(&arvif->ar->conf_mutex);
++@@ -1451,8 +1452,14 @@ static void ath11k_control_beaconing(str
++ 
++ 	ether_addr_copy(arvif->bssid, info->bssid);
++ 
+++	if (arvif->vif->mbssid_tx_vif)
+++		tx_arvif = (struct ath11k_vif *)arvif->vif->mbssid_tx_vif->drv_priv;
+++
++ 	ret = ath11k_wmi_vdev_up(arvif->ar, arvif->vdev_id, arvif->aid,
++-				 arvif->bssid);
+++				 arvif->bssid,
+++				 tx_arvif ? tx_arvif->bssid : NULL,
+++				 info->bssid_index,
+++				 1 << info->bssid_indicator);
++ 	if (ret) {
++ 		ath11k_warn(ar->ab, "failed to bring up vdev %d: %i\n",
++ 			    arvif->vdev_id, ret);
++@@ -2879,7 +2886,8 @@ static void ath11k_bss_assoc(struct ieee
++ 	arvif->aid = vif->cfg.aid;
++ 	ether_addr_copy(arvif->bssid, bss_conf->bssid);
++ 
++-	ret = ath11k_wmi_vdev_up(ar, arvif->vdev_id, arvif->aid, arvif->bssid);
+++	ret = ath11k_wmi_vdev_up(ar, arvif->vdev_id, arvif->aid, arvif->bssid,
+++				 NULL, 0, 0);
++ 	if (ret) {
++ 		ath11k_warn(ar->ab, "failed to set vdev %d up: %d\n",
++ 			    arvif->vdev_id, ret);
++@@ -7133,7 +7141,8 @@ ath11k_mac_update_vif_chan(struct ath11k
++ 			   int n_vifs)
++ {
++ 	struct ath11k_base *ab = ar->ab;
++-	struct ath11k_vif *arvif;
+++	struct ath11k_vif *arvif, *tx_arvif = NULL;
+++	struct ieee80211_vif *mbssid_tx_vif;
++ 	int ret;
++ 	int i;
++ 	bool monitor_vif = false;
++@@ -7187,8 +7196,15 @@ ath11k_mac_update_vif_chan(struct ath11k
++ 			ath11k_warn(ab, "failed to update bcn tmpl during csa: %d\n",
++ 				    ret);
++ 
+++		mbssid_tx_vif = arvif->vif->mbssid_tx_vif;
+++		if (mbssid_tx_vif)
+++			tx_arvif = (struct ath11k_vif *)mbssid_tx_vif->drv_priv;
+++
++ 		ret = ath11k_wmi_vdev_up(arvif->ar, arvif->vdev_id, arvif->aid,
++-					 arvif->bssid);
+++					 arvif->bssid,
+++					 tx_arvif ? tx_arvif->bssid : NULL,
+++					 arvif->vif->bss_conf.bssid_index,
+++					 1 << arvif->vif->bss_conf.bssid_indicator);
++ 		if (ret) {
++ 			ath11k_warn(ab, "failed to bring vdev up %d: %d\n",
++ 				    arvif->vdev_id, ret);
++@@ -7306,7 +7322,8 @@ static int ath11k_start_vdev_delay(struc
++ 	}
++ 
++ 	if (arvif->vdev_type == WMI_VDEV_TYPE_MONITOR) {
++-		ret = ath11k_wmi_vdev_up(ar, arvif->vdev_id, 0, ar->mac_addr);
+++		ret = ath11k_wmi_vdev_up(ar, arvif->vdev_id, 0, ar->mac_addr,
+++					 NULL, 0, 0);
++ 		if (ret) {
++ 			ath11k_warn(ab, "failed put monitor up: %d\n", ret);
++ 			return ret;
++--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++++ b/drivers/net/wireless/ath/ath11k/wmi.c
++@@ -1001,7 +1001,8 @@ int ath11k_wmi_vdev_start(struct ath11k
++ 	return ret;
++ }
++ 
++-int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid, const u8 *bssid)
+++int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid, const u8 *bssid,
+++		       u8 *tx_bssid, u32 nontx_profile_idx, u32 nontx_profile_cnt)
++ {
++ 	struct ath11k_pdev_wmi *wmi = ar->wmi;
++ 	struct wmi_vdev_up_cmd *cmd;
++@@ -1025,6 +1026,11 @@ int ath11k_wmi_vdev_up(struct ath11k *ar
++ 
++ 	ether_addr_copy(cmd->vdev_bssid.addr, bssid);
++ 
+++	cmd->nontx_profile_idx = nontx_profile_idx;
+++	cmd->nontx_profile_cnt = nontx_profile_cnt;
+++	if (tx_bssid)
+++		ether_addr_copy(cmd->tx_vdev_bssid.addr, tx_bssid);
+++
++ 	if (arvif && arvif->vif->type == NL80211_IFTYPE_STATION) {
++ 		bss_conf = &arvif->vif->bss_conf;
++ 
++--- a/drivers/net/wireless/ath/ath11k/wmi.h
+++++ b/drivers/net/wireless/ath/ath11k/wmi.h
++@@ -6301,7 +6301,8 @@ int ath11k_wmi_bcn_tmpl(struct ath11k *a
++ 			struct sk_buff *bcn);
++ int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id);
++ int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid,
++-		       const u8 *bssid);
+++		       const u8 *bssid, u8 *tx_bssid, u32 nontx_profile_idx,
+++		       u32 nontx_profile_cnt);
++ int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id);
++ int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg,
++ 			  bool restart);
+diff --git a/package/kernel/mac80211/patches/ath11k/0075-wifi-ath11k-refactor-vif-parameter-configurations.patch b/package/kernel/mac80211/patches/ath11k/0075-wifi-ath11k-refactor-vif-parameter-configurations.patch
+new file mode 100644
+index 0000000000..8509e55978
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0075-wifi-ath11k-refactor-vif-parameter-configurations.patch
+@@ -0,0 +1,86 @@
++From cb9bea773c85e372931cd7a177db4165adf29d95 Mon Sep 17 00:00:00 2001
++From: Aloka Dixit <quic_alokad@quicinc.com>
++Date: Fri, 5 May 2023 16:11:28 +0300
++Subject: [PATCH 75/77] wifi: ath11k: refactor vif parameter configurations
++
++Security parameters for each non-transmitting profile can be
++different when MBSSID is enabled and this information is included
++in the MBSSID element in the Beacon frame. Current implementation
++to set rsnie_present and wpaie_present does not parse this element
++hence it applies only to the transmitting interface.
++
++Move the code to a separate function to make additions for
++non-transmitting interfaces cleaner.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Aloka Dixit <quic_alokad@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230405221648.17950-6-quic_alokad@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 41 ++++++++++++++++-----------
++ 1 file changed, 24 insertions(+), 17 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -1351,28 +1351,14 @@ err_mon_del:
++ 	return ret;
++ }
++ 
++-static int ath11k_mac_setup_bcn_tmpl(struct ath11k_vif *arvif)
+++static void ath11k_mac_set_vif_params(struct ath11k_vif *arvif,
+++				      struct sk_buff *bcn)
++ {
++-	struct ath11k *ar = arvif->ar;
++-	struct ath11k_base *ab = ar->ab;
++-	struct ieee80211_hw *hw = ar->hw;
++-	struct ieee80211_vif *vif = arvif->vif;
++-	struct ieee80211_mutable_offsets offs = {};
++-	struct sk_buff *bcn;
++ 	struct ieee80211_mgmt *mgmt;
++ 	u8 *ies;
++-	int ret;
++-
++-	if (arvif->vdev_type != WMI_VDEV_TYPE_AP)
++-		return 0;
++-
++-	bcn = ieee80211_beacon_get_template(hw, vif, &offs, 0);
++-	if (!bcn) {
++-		ath11k_warn(ab, "failed to get beacon template from mac80211\n");
++-		return -EPERM;
++-	}
++ 
++ 	ies = bcn->data + ieee80211_get_hdrlen_from_skb(bcn);
+++	mgmt = (struct ieee80211_mgmt *)bcn->data;
++ 	ies += sizeof(mgmt->u.beacon);
++ 
++ 	if (cfg80211_find_ie(WLAN_EID_RSN, ies, (skb_tail_pointer(bcn) - ies)))
++@@ -1386,7 +1372,28 @@ static int ath11k_mac_setup_bcn_tmpl(str
++ 		arvif->wpaie_present = true;
++ 	else
++ 		arvif->wpaie_present = false;
+++}
+++
+++static int ath11k_mac_setup_bcn_tmpl(struct ath11k_vif *arvif)
+++{
+++	struct ath11k *ar = arvif->ar;
+++	struct ath11k_base *ab = ar->ab;
+++	struct ieee80211_hw *hw = ar->hw;
+++	struct ieee80211_vif *vif = arvif->vif;
+++	struct ieee80211_mutable_offsets offs = {};
+++	struct sk_buff *bcn;
+++	int ret;
+++
+++	if (arvif->vdev_type != WMI_VDEV_TYPE_AP)
+++		return 0;
+++
+++	bcn = ieee80211_beacon_get_template(hw, vif, &offs, 0);
+++	if (!bcn) {
+++		ath11k_warn(ab, "failed to get beacon template from mac80211\n");
+++		return -EPERM;
+++	}
++ 
+++	ath11k_mac_set_vif_params(arvif, bcn);
++ 	ret = ath11k_wmi_bcn_tmpl(ar, arvif->vdev_id, &offs, bcn);
++ 
++ 	kfree_skb(bcn);
+diff --git a/package/kernel/mac80211/patches/ath11k/0076-wifi-ath11k-MBSSID-beacon-support.patch b/package/kernel/mac80211/patches/ath11k/0076-wifi-ath11k-MBSSID-beacon-support.patch
+new file mode 100644
+index 0000000000..d23ea8deea
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0076-wifi-ath11k-MBSSID-beacon-support.patch
+@@ -0,0 +1,190 @@
++From 335a92765d308dfe22826f5562cd4b4389b45e71 Mon Sep 17 00:00:00 2001
++From: Aloka Dixit <quic_alokad@quicinc.com>
++Date: Fri, 5 May 2023 16:11:28 +0300
++Subject: [PATCH 76/77] wifi: ath11k: MBSSID beacon support
++
++- Split ath11k_mac_setup_bcn_tmpl() to move the beacon retrieval and
++  WMI command to a new function, ath11k_mac_setup_bcn_tmpl_legacy().
++  In the original function add checks to use the transmitting interface
++  when MBSSID is enabled.
++- Set rsnie_present and wpaie_present fields for the non-transmitting
++  interfaces when MBSSID is enabled.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Aloka Dixit <quic_alokad@quicinc.com>
++Co-developed-by: John Crispin <john@phrozen.org>
++Signed-off-by: John Crispin <john@phrozen.org>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230405221648.17950-7-quic_alokad@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 116 ++++++++++++++++++++++++--
++ drivers/net/wireless/ath/ath11k/wmi.c |   1 +
++ 2 files changed, 112 insertions(+), 5 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -1351,6 +1351,84 @@ err_mon_del:
++ 	return ret;
++ }
++ 
+++static void ath11k_mac_setup_nontx_vif_rsnie(struct ath11k_vif *arvif,
+++					     bool tx_arvif_rsnie_present,
+++					     const u8 *profile, u8 profile_len)
+++{
+++	if (cfg80211_find_ie(WLAN_EID_RSN, profile, profile_len)) {
+++		arvif->rsnie_present = true;
+++	} else if (tx_arvif_rsnie_present) {
+++		int i;
+++		u8 nie_len;
+++		const u8 *nie = cfg80211_find_ext_ie(WLAN_EID_EXT_NON_INHERITANCE,
+++						     profile, profile_len);
+++		if (!nie)
+++			return;
+++
+++		nie_len = nie[1];
+++		nie += 2;
+++		for (i = 0; i < nie_len; i++) {
+++			if (nie[i] == WLAN_EID_RSN) {
+++				arvif->rsnie_present = false;
+++				break;
+++			}
+++		}
+++	}
+++}
+++
+++static bool ath11k_mac_set_nontx_vif_params(struct ath11k_vif *tx_arvif,
+++					    struct ath11k_vif *arvif,
+++					    struct sk_buff *bcn)
+++{
+++	struct ieee80211_mgmt *mgmt;
+++	const u8 *ies, *profile, *next_profile;
+++	int ies_len;
+++
+++	ies = bcn->data + ieee80211_get_hdrlen_from_skb(bcn);
+++	mgmt = (struct ieee80211_mgmt *)bcn->data;
+++	ies += sizeof(mgmt->u.beacon);
+++	ies_len = skb_tail_pointer(bcn) - ies;
+++
+++	ies = cfg80211_find_ie(WLAN_EID_MULTIPLE_BSSID, ies, ies_len);
+++	arvif->rsnie_present = tx_arvif->rsnie_present;
+++
+++	while (ies) {
+++		u8 mbssid_len;
+++
+++		ies_len -= (2 + ies[1]);
+++		mbssid_len = ies[1] - 1;
+++		profile = &ies[3];
+++
+++		while (mbssid_len) {
+++			u8 profile_len;
+++
+++			profile_len = profile[1];
+++			next_profile = profile + (2 + profile_len);
+++			mbssid_len -= (2 + profile_len);
+++
+++			profile += 2;
+++			profile_len -= (2 + profile[1]);
+++			profile += (2 + profile[1]); /* nontx capabilities */
+++			profile_len -= (2 + profile[1]);
+++			profile += (2 + profile[1]); /* SSID */
+++			if (profile[2] == arvif->vif->bss_conf.bssid_index) {
+++				profile_len -= 5;
+++				profile = profile + 5;
+++				ath11k_mac_setup_nontx_vif_rsnie(arvif,
+++								 tx_arvif->rsnie_present,
+++								 profile,
+++								 profile_len);
+++				return true;
+++			}
+++			profile = next_profile;
+++		}
+++		ies = cfg80211_find_ie(WLAN_EID_MULTIPLE_BSSID, profile,
+++				       ies_len);
+++	}
+++
+++	return false;
+++}
+++
++ static void ath11k_mac_set_vif_params(struct ath11k_vif *arvif,
++ 				      struct sk_buff *bcn)
++ {
++@@ -1374,18 +1452,26 @@ static void ath11k_mac_set_vif_params(st
++ 		arvif->wpaie_present = false;
++ }
++ 
++-static int ath11k_mac_setup_bcn_tmpl(struct ath11k_vif *arvif)
+++static int ath11k_mac_setup_bcn_tmpl_mbssid(struct ath11k_vif *arvif)
++ {
++ 	struct ath11k *ar = arvif->ar;
++ 	struct ath11k_base *ab = ar->ab;
+++	struct ath11k_vif *tx_arvif = arvif;
++ 	struct ieee80211_hw *hw = ar->hw;
++ 	struct ieee80211_vif *vif = arvif->vif;
++ 	struct ieee80211_mutable_offsets offs = {};
++ 	struct sk_buff *bcn;
++ 	int ret;
++ 
++-	if (arvif->vdev_type != WMI_VDEV_TYPE_AP)
++-		return 0;
+++	if (arvif->vif->mbssid_tx_vif) {
+++		tx_arvif = (void *)arvif->vif->mbssid_tx_vif->drv_priv;
+++		if (tx_arvif != arvif) {
+++			ar = tx_arvif->ar;
+++			ab = ar->ab;
+++			hw = ar->hw;
+++			vif = tx_arvif->vif;
+++		}
+++	}
++ 
++ 	bcn = ieee80211_beacon_get_template(hw, vif, &offs, 0);
++ 	if (!bcn) {
++@@ -1393,9 +1479,12 @@ static int ath11k_mac_setup_bcn_tmpl(str
++ 		return -EPERM;
++ 	}
++ 
++-	ath11k_mac_set_vif_params(arvif, bcn);
++-	ret = ath11k_wmi_bcn_tmpl(ar, arvif->vdev_id, &offs, bcn);
+++	if (tx_arvif == arvif)
+++		ath11k_mac_set_vif_params(tx_arvif, bcn);
+++	else if (!ath11k_mac_set_nontx_vif_params(tx_arvif, arvif, bcn))
+++		return -EINVAL;
++ 
+++	ret = ath11k_wmi_bcn_tmpl(ar, arvif->vdev_id, &offs, bcn);
++ 	kfree_skb(bcn);
++ 
++ 	if (ret)
++@@ -1405,6 +1494,23 @@ static int ath11k_mac_setup_bcn_tmpl(str
++ 	return ret;
++ }
++ 
+++static int ath11k_mac_setup_bcn_tmpl(struct ath11k_vif *arvif)
+++{
+++	struct ieee80211_vif *vif = arvif->vif;
+++
+++	if (arvif->vdev_type != WMI_VDEV_TYPE_AP)
+++		return 0;
+++
+++	/* Target does not expect beacon templates for the already up
+++	 * non-transmitting interfaces, and results in a crash if sent.
+++	 */
+++	if (vif->mbssid_tx_vif &&
+++	    arvif != (void *)vif->mbssid_tx_vif->drv_priv && arvif->is_up)
+++		return 0;
+++
+++	return ath11k_mac_setup_bcn_tmpl_mbssid(arvif);
+++}
+++
++ void ath11k_mac_bcn_tx_event(struct ath11k_vif *arvif)
++ {
++ 	struct ieee80211_vif *vif = arvif->vif;
++--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++++ b/drivers/net/wireless/ath/ath11k/wmi.c
++@@ -1737,6 +1737,7 @@ int ath11k_wmi_bcn_tmpl(struct ath11k *a
++ 	}
++ 
++ 	cmd->buf_len = bcn->len;
+++	cmd->mbssid_ie_offset = offs->mbssid_off;
++ 
++ 	ptr = skb->data + sizeof(*cmd);
++ 
+diff --git a/package/kernel/mac80211/patches/ath11k/0077-wifi-ath11k-EMA-beacon-support.patch b/package/kernel/mac80211/patches/ath11k/0077-wifi-ath11k-EMA-beacon-support.patch
+new file mode 100644
+index 0000000000..51353fa3e4
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0077-wifi-ath11k-EMA-beacon-support.patch
+@@ -0,0 +1,156 @@
++From 87bd401138161008fdb82fbca6e213af117bfeb9 Mon Sep 17 00:00:00 2001
++From: Aloka Dixit <quic_alokad@quicinc.com>
++Date: Fri, 5 May 2023 16:11:28 +0300
++Subject: [PATCH 77/77] wifi: ath11k: EMA beacon support
++
++Add new function ath11k_mac_setup_bcn_tmpl_ema() which invokes the new
++API provided by MAC80211 to retrieve EMA beacons.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Aloka Dixit <quic_alokad@quicinc.com>
++Co-developed-by: John Crispin <john@phrozen.org>
++Signed-off-by: John Crispin <john@phrozen.org>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230405221648.17950-8-quic_alokad@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 59 ++++++++++++++++++++++++++-
++ drivers/net/wireless/ath/ath11k/wmi.c |  3 +-
++ drivers/net/wireless/ath/ath11k/wmi.h | 11 ++++-
++ 3 files changed, 70 insertions(+), 3 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -1452,6 +1452,60 @@ static void ath11k_mac_set_vif_params(st
++ 		arvif->wpaie_present = false;
++ }
++ 
+++static int ath11k_mac_setup_bcn_tmpl_ema(struct ath11k_vif *arvif)
+++{
+++	struct ath11k_vif *tx_arvif;
+++	struct ieee80211_ema_beacons *beacons;
+++	int ret = 0;
+++	bool nontx_vif_params_set = false;
+++	u32 params = 0;
+++	u8 i = 0;
+++
+++	tx_arvif = (void *)arvif->vif->mbssid_tx_vif->drv_priv;
+++
+++	beacons = ieee80211_beacon_get_template_ema_list(tx_arvif->ar->hw,
+++							 tx_arvif->vif, 0);
+++	if (!beacons || !beacons->cnt) {
+++		ath11k_warn(arvif->ar->ab,
+++			    "failed to get ema beacon templates from mac80211\n");
+++		return -EPERM;
+++	}
+++
+++	if (tx_arvif == arvif)
+++		ath11k_mac_set_vif_params(tx_arvif, beacons->bcn[0].skb);
+++	else
+++		arvif->wpaie_present = tx_arvif->wpaie_present;
+++
+++	for (i = 0; i < beacons->cnt; i++) {
+++		if (tx_arvif != arvif && !nontx_vif_params_set)
+++			nontx_vif_params_set =
+++				ath11k_mac_set_nontx_vif_params(tx_arvif, arvif,
+++								beacons->bcn[i].skb);
+++
+++		params = beacons->cnt;
+++		params |= (i << WMI_EMA_TMPL_IDX_SHIFT);
+++		params |= ((!i ? 1 : 0) << WMI_EMA_FIRST_TMPL_SHIFT);
+++		params |= ((i + 1 == beacons->cnt ? 1 : 0) << WMI_EMA_LAST_TMPL_SHIFT);
+++
+++		ret = ath11k_wmi_bcn_tmpl(tx_arvif->ar, tx_arvif->vdev_id,
+++					  &beacons->bcn[i].offs,
+++					  beacons->bcn[i].skb, params);
+++		if (ret) {
+++			ath11k_warn(tx_arvif->ar->ab,
+++				    "failed to set ema beacon template id %i error %d\n",
+++				    i, ret);
+++			break;
+++		}
+++	}
+++
+++	ieee80211_beacon_free_ema_list(beacons);
+++
+++	if (tx_arvif != arvif && !nontx_vif_params_set)
+++		return -EINVAL; /* Profile not found in the beacons */
+++
+++	return ret;
+++}
+++
++ static int ath11k_mac_setup_bcn_tmpl_mbssid(struct ath11k_vif *arvif)
++ {
++ 	struct ath11k *ar = arvif->ar;
++@@ -1484,7 +1538,7 @@ static int ath11k_mac_setup_bcn_tmpl_mbs
++ 	else if (!ath11k_mac_set_nontx_vif_params(tx_arvif, arvif, bcn))
++ 		return -EINVAL;
++ 
++-	ret = ath11k_wmi_bcn_tmpl(ar, arvif->vdev_id, &offs, bcn);
+++	ret = ath11k_wmi_bcn_tmpl(ar, arvif->vdev_id, &offs, bcn, 0);
++ 	kfree_skb(bcn);
++ 
++ 	if (ret)
++@@ -1508,6 +1562,9 @@ static int ath11k_mac_setup_bcn_tmpl(str
++ 	    arvif != (void *)vif->mbssid_tx_vif->drv_priv && arvif->is_up)
++ 		return 0;
++ 
+++	if (vif->bss_conf.ema_ap && vif->mbssid_tx_vif)
+++		return ath11k_mac_setup_bcn_tmpl_ema(arvif);
+++
++ 	return ath11k_mac_setup_bcn_tmpl_mbssid(arvif);
++ }
++ 
++--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++++ b/drivers/net/wireless/ath/ath11k/wmi.c
++@@ -1699,7 +1699,7 @@ int ath11k_wmi_send_bcn_offload_control_
++ 
++ int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id,
++ 			struct ieee80211_mutable_offsets *offs,
++-			struct sk_buff *bcn)
+++			struct sk_buff *bcn, u32 ema_params)
++ {
++ 	struct ath11k_pdev_wmi *wmi = ar->wmi;
++ 	struct wmi_bcn_tmpl_cmd *cmd;
++@@ -1738,6 +1738,7 @@ int ath11k_wmi_bcn_tmpl(struct ath11k *a
++ 
++ 	cmd->buf_len = bcn->len;
++ 	cmd->mbssid_ie_offset = offs->mbssid_off;
+++	cmd->ema_params = ema_params;
++ 
++ 	ptr = skb->data + sizeof(*cmd);
++ 
++--- a/drivers/net/wireless/ath/ath11k/wmi.h
+++++ b/drivers/net/wireless/ath/ath11k/wmi.h
++@@ -3566,6 +3566,10 @@ struct wmi_get_pdev_temperature_cmd {
++ 
++ #define WMI_BEACON_TX_BUFFER_SIZE	512
++ 
+++#define WMI_EMA_TMPL_IDX_SHIFT            8
+++#define WMI_EMA_FIRST_TMPL_SHIFT          16
+++#define WMI_EMA_LAST_TMPL_SHIFT           24
+++
++ struct wmi_bcn_tmpl_cmd {
++ 	u32 tlv_header;
++ 	u32 vdev_id;
++@@ -3576,6 +3580,11 @@ struct wmi_bcn_tmpl_cmd {
++ 	u32 csa_event_bitmap;
++ 	u32 mbssid_ie_offset;
++ 	u32 esp_ie_offset;
+++	u32 csc_switch_count_offset;
+++	u32 csc_event_bitmap;
+++	u32 mu_edca_ie_offset;
+++	u32 feature_enable_bitmap;
+++	u32 ema_params;
++ } __packed;
++ 
++ struct wmi_key_seq_counter {
++@@ -6298,7 +6307,7 @@ int ath11k_wmi_mgmt_send(struct ath11k *
++ 			 struct sk_buff *frame);
++ int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id,
++ 			struct ieee80211_mutable_offsets *offs,
++-			struct sk_buff *bcn);
+++			struct sk_buff *bcn, u32 ema_param);
++ int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id);
++ int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid,
++ 		       const u8 *bssid, u8 *tx_bssid, u32 nontx_profile_idx,
+diff --git a/package/kernel/mac80211/patches/ath11k/0078-wifi-ath11k-Relocate-the-func-ath11k_mac_bitrate_mas.patch b/package/kernel/mac80211/patches/ath11k/0078-wifi-ath11k-Relocate-the-func-ath11k_mac_bitrate_mas.patch
+new file mode 100644
+index 0000000000..610bf72514
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0078-wifi-ath11k-Relocate-the-func-ath11k_mac_bitrate_mas.patch
+@@ -0,0 +1,75 @@
++From 570eec3d40505c30babbe3b8f85a38496c975ab2 Mon Sep 17 00:00:00 2001
++From: Maharaja Kennadyrajan <quic_mkenna@quicinc.com>
++Date: Tue, 9 May 2023 20:07:23 +0300
++Subject: [PATCH] wifi: ath11k: Relocate the func
++ ath11k_mac_bitrate_mask_num_ht_rates() and change hweight16 to hweight8
++
++Relocate the function ath11k_mac_bitrate_mask_num_ht_rates() definition
++to call this function from other functions which helps to avoid the
++compilation error (function not defined).
++
++ht_mcs[] is 1 byte array and it is enough to use hweight8() instead
++of hweight16(). Hence, fixed the same.
++
++Tested on: Compile tested only.
++
++Signed-off-by: Maharaja Kennadyrajan <quic_mkenna@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230504092033.3542456-2-quic_mkenna@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 30 +++++++++++++--------------
++ 1 file changed, 15 insertions(+), 15 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -1,7 +1,7 @@
++ // SPDX-License-Identifier: BSD-3-Clause-Clear
++ /*
++  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
++- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
++  */
++ 
++ #include <net/mac80211.h>
++@@ -4338,6 +4338,20 @@ exit:
++ }
++ 
++ static int
+++ath11k_mac_bitrate_mask_num_ht_rates(struct ath11k *ar,
+++				     enum nl80211_band band,
+++				     const struct cfg80211_bitrate_mask *mask)
+++{
+++	int num_rates = 0;
+++	int i;
+++
+++	for (i = 0; i < ARRAY_SIZE(mask->control[band].ht_mcs); i++)
+++		num_rates += hweight8(mask->control[band].ht_mcs[i]);
+++
+++	return num_rates;
+++}
+++
+++static int
++ ath11k_mac_bitrate_mask_num_vht_rates(struct ath11k *ar,
++ 				      enum nl80211_band band,
++ 				      const struct cfg80211_bitrate_mask *mask)
++@@ -7791,20 +7805,6 @@ static void ath11k_mac_op_flush(struct i
++ 	ath11k_mac_flush_tx_complete(ar);
++ }
++ 
++-static int
++-ath11k_mac_bitrate_mask_num_ht_rates(struct ath11k *ar,
++-				     enum nl80211_band band,
++-				     const struct cfg80211_bitrate_mask *mask)
++-{
++-	int num_rates = 0;
++-	int i;
++-
++-	for (i = 0; i < ARRAY_SIZE(mask->control[band].ht_mcs); i++)
++-		num_rates += hweight16(mask->control[band].ht_mcs[i]);
++-
++-	return num_rates;
++-}
++-
++ static bool
++ ath11k_mac_has_single_legacy_rate(struct ath11k *ar,
++ 				  enum nl80211_band band,
+diff --git a/package/kernel/mac80211/patches/ath11k/0079-wifi-ath11k-Send-HT-fixed-rate-in-WMI-peer-fixed-par.patch b/package/kernel/mac80211/patches/ath11k/0079-wifi-ath11k-Send-HT-fixed-rate-in-WMI-peer-fixed-par.patch
+new file mode 100644
+index 0000000000..6282f4462e
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0079-wifi-ath11k-Send-HT-fixed-rate-in-WMI-peer-fixed-par.patch
+@@ -0,0 +1,141 @@
++From df8e3729ffc0aa645839693f74ee7b6d999cdf64 Mon Sep 17 00:00:00 2001
++From: Maharaja Kennadyrajan <quic_mkenna@quicinc.com>
++Date: Tue, 9 May 2023 20:07:24 +0300
++Subject: [PATCH] wifi: ath11k: Send HT fixed rate in WMI peer fixed param
++
++Due to the firmware behavior with HT fixed rate setting,
++HT fixed rate MCS with NSS > 1 are treated as NSS = 1
++HT rates in the firmware and enables the HT fixed rate of
++NSS = 1.
++
++This leads to HT fixed rate is always configured for NSS = 1
++even though the user sets NSS = 2 or > 1 HT fixed MCS in the
++set bitrate command.
++
++Currently HT fixed MCS is sent via WMI peer assoc command.
++Fix this issue, by sending the HT fixed rate MCS in WMI peer
++fixed param instead of sending in peer assoc command.
++
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Maharaja Kennadyrajan <quic_mkenna@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230504092033.3542456-3-quic_mkenna@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/mac.c | 63 ++++++++++++++++++++++++++-
++ 1 file changed, 61 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -4480,6 +4480,54 @@ ath11k_mac_set_peer_he_fixed_rate(struct
++ 	return ret;
++ }
++ 
+++static int
+++ath11k_mac_set_peer_ht_fixed_rate(struct ath11k_vif *arvif,
+++				  struct ieee80211_sta *sta,
+++				  const struct cfg80211_bitrate_mask *mask,
+++				  enum nl80211_band band)
+++{
+++	struct ath11k *ar = arvif->ar;
+++	u8 ht_rate, nss = 0;
+++	u32 rate_code;
+++	int ret, i;
+++
+++	lockdep_assert_held(&ar->conf_mutex);
+++
+++	for (i = 0; i < ARRAY_SIZE(mask->control[band].ht_mcs); i++) {
+++		if (hweight8(mask->control[band].ht_mcs[i]) == 1) {
+++			nss = i + 1;
+++			ht_rate = ffs(mask->control[band].ht_mcs[i]) - 1;
+++		}
+++	}
+++
+++	if (!nss) {
+++		ath11k_warn(ar->ab, "No single HT Fixed rate found to set for %pM",
+++			    sta->addr);
+++		return -EINVAL;
+++	}
+++
+++	/* Avoid updating invalid nss as fixed rate*/
+++	if (nss > sta->deflink.rx_nss)
+++		return -EINVAL;
+++
+++	ath11k_dbg(ar->ab, ATH11K_DBG_MAC,
+++		   "Setting Fixed HT Rate for peer %pM. Device will not switch to any other selected rates",
+++		   sta->addr);
+++
+++	rate_code = ATH11K_HW_RATE_CODE(ht_rate, nss - 1,
+++					WMI_RATE_PREAMBLE_HT);
+++	ret = ath11k_wmi_set_peer_param(ar, sta->addr,
+++					arvif->vdev_id,
+++					WMI_PEER_PARAM_FIXED_RATE,
+++					rate_code);
+++	if (ret)
+++		ath11k_warn(ar->ab,
+++			    "failed to update STA %pM HT Fixed Rate %d: %d\n",
+++			    sta->addr, rate_code, ret);
+++
+++	return ret;
+++}
+++
++ static int ath11k_station_assoc(struct ath11k *ar,
++ 				struct ieee80211_vif *vif,
++ 				struct ieee80211_sta *sta,
++@@ -4491,7 +4539,7 @@ static int ath11k_station_assoc(struct a
++ 	struct cfg80211_chan_def def;
++ 	enum nl80211_band band;
++ 	struct cfg80211_bitrate_mask *mask;
++-	u8 num_vht_rates, num_he_rates;
+++	u8 num_ht_rates, num_vht_rates, num_he_rates;
++ 
++ 	lockdep_assert_held(&ar->conf_mutex);
++ 
++@@ -4519,6 +4567,7 @@ static int ath11k_station_assoc(struct a
++ 
++ 	num_vht_rates = ath11k_mac_bitrate_mask_num_vht_rates(ar, band, mask);
++ 	num_he_rates = ath11k_mac_bitrate_mask_num_he_rates(ar, band, mask);
+++	num_ht_rates = ath11k_mac_bitrate_mask_num_ht_rates(ar, band, mask);
++ 
++ 	/* If single VHT/HE rate is configured (by set_bitrate_mask()),
++ 	 * peer_assoc will disable VHT/HE. This is now enabled by a peer specific
++@@ -4535,6 +4584,11 @@ static int ath11k_station_assoc(struct a
++ 							band);
++ 		if (ret)
++ 			return ret;
+++	} else if (sta->deflink.ht_cap.ht_supported && num_ht_rates == 1) {
+++		ret = ath11k_mac_set_peer_ht_fixed_rate(arvif, sta, mask,
+++							band);
+++		if (ret)
+++			return ret;
++ 	}
++ 
++ 	/* Re-assoc is run only to update supported rates for given station. It
++@@ -4608,7 +4662,7 @@ static void ath11k_sta_rc_update_wk(stru
++ 	const u16 *vht_mcs_mask;
++ 	const u16 *he_mcs_mask;
++ 	u32 changed, bw, nss, smps, bw_prev;
++-	int err, num_vht_rates, num_he_rates;
+++	int err, num_ht_rates, num_vht_rates, num_he_rates;
++ 	const struct cfg80211_bitrate_mask *mask;
++ 	struct peer_assoc_params peer_arg;
++ 	enum wmi_phy_mode peer_phymode;
++@@ -4724,6 +4778,8 @@ static void ath11k_sta_rc_update_wk(stru
++ 
++ 	if (changed & IEEE80211_RC_SUPP_RATES_CHANGED) {
++ 		mask = &arvif->bitrate_mask;
+++		num_ht_rates = ath11k_mac_bitrate_mask_num_ht_rates(ar, band,
+++								    mask);
++ 		num_vht_rates = ath11k_mac_bitrate_mask_num_vht_rates(ar, band,
++ 								      mask);
++ 		num_he_rates = ath11k_mac_bitrate_mask_num_he_rates(ar, band,
++@@ -4746,6 +4802,9 @@ static void ath11k_sta_rc_update_wk(stru
++ 		} else if (sta->deflink.he_cap.has_he && num_he_rates == 1) {
++ 			ath11k_mac_set_peer_he_fixed_rate(arvif, sta, mask,
++ 							  band);
+++		} else if (sta->deflink.ht_cap.ht_supported && num_ht_rates == 1) {
+++			ath11k_mac_set_peer_ht_fixed_rate(arvif, sta, mask,
+++							  band);
++ 		} else {
++ 			/* If the peer is non-VHT/HE or no fixed VHT/HE rate
++ 			 * is provided in the new bitrate mask we set the
+diff --git a/package/kernel/mac80211/patches/ath11k/0080-wifi-ath11k-add-support-default-regdb-while-searchin.patch b/package/kernel/mac80211/patches/ath11k/0080-wifi-ath11k-add-support-default-regdb-while-searchin.patch
+new file mode 100644
+index 0000000000..5ff40aac7a
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0080-wifi-ath11k-add-support-default-regdb-while-searchin.patch
+@@ -0,0 +1,127 @@
++From 88ca89202f8e8afb5225eb5244d79cd67c15d744 Mon Sep 17 00:00:00 2001
++From: Wen Gong <quic_wgong@quicinc.com>
++Date: Fri, 26 May 2023 12:41:06 +0300
++Subject: [PATCH] wifi: ath11k: add support default regdb while searching
++ board-2.bin for WCN6855
++
++Sometimes board-2.bin does not have the regdb data which matched the
++parameters such as vendor, device, subsystem-vendor, subsystem-device
++and etc. Add default regdb data with 'bus=%s' into board-2.bin for
++WCN6855, then ath11k use 'bus=pci' to search regdb data in board-2.bin
++for WCN6855.
++
++kernel: [  122.515808] ath11k_pci 0000:03:00.0: boot using board name 'bus=pci,vendor=17cb,device=1103,subsystem-vendor=17cb,subsystem-device=3374,qmi-chip-id=2,qmi-board-id=262'
++kernel: [  122.517240] ath11k_pci 0000:03:00.0: boot firmware request ath11k/WCN6855/hw2.0/board-2.bin size 6179564
++kernel: [  122.517280] ath11k_pci 0000:03:00.0: failed to fetch regdb data for bus=pci,vendor=17cb,device=1103,subsystem-vendor=17cb,subsystem-device=3374,qmi-chip-id=2,qmi-board-id=262 from ath11k/WCN6855/hw2.0/board-2.bin
++kernel: [  122.517464] ath11k_pci 0000:03:00.0: boot using board name 'bus=pci'
++kernel: [  122.518901] ath11k_pci 0000:03:00.0: boot firmware request ath11k/WCN6855/hw2.0/board-2.bin size 6179564
++kernel: [  122.518915] ath11k_pci 0000:03:00.0: board name
++kernel: [  122.518917] ath11k_pci 0000:03:00.0: 00000000: 62 75 73 3d 70 63 69                             bus=pci
++kernel: [  122.518918] ath11k_pci 0000:03:00.0: boot found match regdb data for name 'bus=pci'
++kernel: [  122.518920] ath11k_pci 0000:03:00.0: boot found regdb data for 'bus=pci'
++kernel: [  122.518921] ath11k_pci 0000:03:00.0: fetched regdb
++
++Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3
++
++Signed-off-by: Wen Gong <quic_wgong@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230517133959.8224-1-quic_wgong@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/core.c | 53 +++++++++++++++++++-------
++ 1 file changed, 40 insertions(+), 13 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/core.c
+++++ b/drivers/net/wireless/ath/ath11k/core.c
++@@ -961,7 +961,8 @@ int ath11k_core_check_dt(struct ath11k_b
++ }
++ 
++ static int __ath11k_core_create_board_name(struct ath11k_base *ab, char *name,
++-					   size_t name_len, bool with_variant)
+++					   size_t name_len, bool with_variant,
+++					   bool bus_type_mode)
++ {
++ 	/* strlen(',variant=') + strlen(ab->qmi.target.bdf_ext) */
++ 	char variant[9 + ATH11K_QMI_BDF_EXT_STR_LENGTH] = { 0 };
++@@ -972,15 +973,20 @@ static int __ath11k_core_create_board_na
++ 
++ 	switch (ab->id.bdf_search) {
++ 	case ATH11K_BDF_SEARCH_BUS_AND_BOARD:
++-		scnprintf(name, name_len,
++-			  "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x,qmi-chip-id=%d,qmi-board-id=%d%s",
++-			  ath11k_bus_str(ab->hif.bus),
++-			  ab->id.vendor, ab->id.device,
++-			  ab->id.subsystem_vendor,
++-			  ab->id.subsystem_device,
++-			  ab->qmi.target.chip_id,
++-			  ab->qmi.target.board_id,
++-			  variant);
+++		if (bus_type_mode)
+++			scnprintf(name, name_len,
+++				  "bus=%s",
+++				  ath11k_bus_str(ab->hif.bus));
+++		else
+++			scnprintf(name, name_len,
+++				  "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x,qmi-chip-id=%d,qmi-board-id=%d%s",
+++				  ath11k_bus_str(ab->hif.bus),
+++				  ab->id.vendor, ab->id.device,
+++				  ab->id.subsystem_vendor,
+++				  ab->id.subsystem_device,
+++				  ab->qmi.target.chip_id,
+++				  ab->qmi.target.board_id,
+++				  variant);
++ 		break;
++ 	default:
++ 		scnprintf(name, name_len,
++@@ -999,13 +1005,19 @@ static int __ath11k_core_create_board_na
++ static int ath11k_core_create_board_name(struct ath11k_base *ab, char *name,
++ 					 size_t name_len)
++ {
++-	return __ath11k_core_create_board_name(ab, name, name_len, true);
+++	return __ath11k_core_create_board_name(ab, name, name_len, true, false);
++ }
++ 
++ static int ath11k_core_create_fallback_board_name(struct ath11k_base *ab, char *name,
++ 						  size_t name_len)
++ {
++-	return __ath11k_core_create_board_name(ab, name, name_len, false);
+++	return __ath11k_core_create_board_name(ab, name, name_len, false, false);
+++}
+++
+++static int ath11k_core_create_bus_type_board_name(struct ath11k_base *ab, char *name,
+++						  size_t name_len)
+++{
+++	return __ath11k_core_create_board_name(ab, name, name_len, false, true);
++ }
++ 
++ const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
++@@ -1309,7 +1321,7 @@ success:
++ 
++ int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd)
++ {
++-	char boardname[BOARD_NAME_SIZE];
+++	char boardname[BOARD_NAME_SIZE], default_boardname[BOARD_NAME_SIZE];
++ 	int ret;
++ 
++ 	ret = ath11k_core_create_board_name(ab, boardname, BOARD_NAME_SIZE);
++@@ -1323,6 +1335,21 @@ int ath11k_core_fetch_regdb(struct ath11
++ 						 ATH11K_BD_IE_REGDB,
++ 						 ATH11K_BD_IE_REGDB_NAME,
++ 						 ATH11K_BD_IE_REGDB_DATA);
+++	if (!ret)
+++		goto exit;
+++
+++	ret = ath11k_core_create_bus_type_board_name(ab, default_boardname,
+++						     BOARD_NAME_SIZE);
+++	if (ret) {
+++		ath11k_dbg(ab, ATH11K_DBG_BOOT,
+++			   "failed to create default board name for regdb: %d", ret);
+++		goto exit;
+++	}
+++
+++	ret = ath11k_core_fetch_board_data_api_n(ab, bd, default_boardname,
+++						 ATH11K_BD_IE_REGDB,
+++						 ATH11K_BD_IE_REGDB_NAME,
+++						 ATH11K_BD_IE_REGDB_DATA);
++ 	if (!ret)
++ 		goto exit;
++ 
+diff --git a/package/kernel/mac80211/patches/ath11k/0081-wifi-ath11k-remove-unused-function-ath11k_tm_event_w.patch b/package/kernel/mac80211/patches/ath11k/0081-wifi-ath11k-remove-unused-function-ath11k_tm_event_w.patch
+new file mode 100644
+index 0000000000..b5dc83f007
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0081-wifi-ath11k-remove-unused-function-ath11k_tm_event_w.patch
+@@ -0,0 +1,128 @@
++From 86f85575a3f6a20cef1c8bb98e78585fe3a53ccc Mon Sep 17 00:00:00 2001
++From: Govindaraj Saminathan <quic_gsaminat@quicinc.com>
++Date: Fri, 26 May 2023 12:41:06 +0300
++Subject: [PATCH 82/84] wifi: ath11k: remove unused function
++ ath11k_tm_event_wmi()
++
++The function ath11k_tm_event_wmi() is only defined and it is not used
++anywhere. Hence remove the unused.
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Govindaraj Saminathan <quic_gsaminat@quicinc.com>
++Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230517135934.16408-2-quic_rajkbhag@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/testmode.c | 64 +---------------------
++ drivers/net/wireless/ath/ath11k/testmode.h |  8 +--
++ 2 files changed, 2 insertions(+), 70 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/testmode.c
+++++ b/drivers/net/wireless/ath/ath11k/testmode.c
++@@ -1,6 +1,7 @@
++ // SPDX-License-Identifier: BSD-3-Clause-Clear
++ /*
++  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+++ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
++  */
++ 
++ #include "testmode.h"
++@@ -20,69 +21,6 @@ static const struct nla_policy ath11k_tm
++ 	[ATH11K_TM_ATTR_VERSION_MINOR]	= { .type = NLA_U32 },
++ };
++ 
++-/* Returns true if callee consumes the skb and the skb should be discarded.
++- * Returns false if skb is not used. Does not sleep.
++- */
++-bool ath11k_tm_event_wmi(struct ath11k *ar, u32 cmd_id, struct sk_buff *skb)
++-{
++-	struct sk_buff *nl_skb;
++-	bool consumed;
++-	int ret;
++-
++-	ath11k_dbg(ar->ab, ATH11K_DBG_TESTMODE,
++-		   "testmode event wmi cmd_id %d skb %pK skb->len %d\n",
++-		   cmd_id, skb, skb->len);
++-
++-	ath11k_dbg_dump(ar->ab, ATH11K_DBG_TESTMODE, NULL, "", skb->data, skb->len);
++-
++-	spin_lock_bh(&ar->data_lock);
++-
++-	consumed = true;
++-
++-	nl_skb = cfg80211_testmode_alloc_event_skb(ar->hw->wiphy,
++-						   2 * sizeof(u32) + skb->len,
++-						   GFP_ATOMIC);
++-	if (!nl_skb) {
++-		ath11k_warn(ar->ab,
++-			    "failed to allocate skb for testmode wmi event\n");
++-		goto out;
++-	}
++-
++-	ret = nla_put_u32(nl_skb, ATH11K_TM_ATTR_CMD, ATH11K_TM_CMD_WMI);
++-	if (ret) {
++-		ath11k_warn(ar->ab,
++-			    "failed to put testmode wmi event cmd attribute: %d\n",
++-			    ret);
++-		kfree_skb(nl_skb);
++-		goto out;
++-	}
++-
++-	ret = nla_put_u32(nl_skb, ATH11K_TM_ATTR_WMI_CMDID, cmd_id);
++-	if (ret) {
++-		ath11k_warn(ar->ab,
++-			    "failed to put testmode wmi even cmd_id: %d\n",
++-			    ret);
++-		kfree_skb(nl_skb);
++-		goto out;
++-	}
++-
++-	ret = nla_put(nl_skb, ATH11K_TM_ATTR_DATA, skb->len, skb->data);
++-	if (ret) {
++-		ath11k_warn(ar->ab,
++-			    "failed to copy skb to testmode wmi event: %d\n",
++-			    ret);
++-		kfree_skb(nl_skb);
++-		goto out;
++-	}
++-
++-	cfg80211_testmode_event(nl_skb, GFP_ATOMIC);
++-
++-out:
++-	spin_unlock_bh(&ar->data_lock);
++-
++-	return consumed;
++-}
++-
++ static int ath11k_tm_cmd_get_version(struct ath11k *ar, struct nlattr *tb[])
++ {
++ 	struct sk_buff *skb;
++--- a/drivers/net/wireless/ath/ath11k/testmode.h
+++++ b/drivers/net/wireless/ath/ath11k/testmode.h
++@@ -1,24 +1,18 @@
++ /* SPDX-License-Identifier: BSD-3-Clause-Clear */
++ /*
++  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+++ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
++  */
++ 
++ #include "core.h"
++ 
++ #ifdef CPTCFG_NL80211_TESTMODE
++ 
++-bool ath11k_tm_event_wmi(struct ath11k *ar, u32 cmd_id, struct sk_buff *skb);
++ int ath11k_tm_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
++ 		  void *data, int len);
++ 
++ #else
++ 
++-static inline bool ath11k_tm_event_wmi(struct ath11k *ar, u32 cmd_id,
++-				       struct sk_buff *skb)
++-{
++-	return false;
++-}
++-
++ static inline int ath11k_tm_cmd(struct ieee80211_hw *hw,
++ 				struct ieee80211_vif *vif,
++ 				void *data, int len)
+diff --git a/package/kernel/mac80211/patches/ath11k/0082-wifi-ath11k-factory-test-mode-support.patch b/package/kernel/mac80211/patches/ath11k/0082-wifi-ath11k-factory-test-mode-support.patch
+new file mode 100644
+index 0000000000..f1b262724f
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0082-wifi-ath11k-factory-test-mode-support.patch
+@@ -0,0 +1,850 @@
++From b43310e44edc823a7f02af1e1e2b4e8a9abc7d91 Mon Sep 17 00:00:00 2001
++From: Govindaraj Saminathan <quic_gsaminat@quicinc.com>
++Date: Fri, 26 May 2023 12:41:07 +0300
++Subject: [PATCH 83/84] wifi: ath11k: factory test mode support
++
++Add support to process factory test mode commands (FTM) for calibration.
++By default firmware start with NORMAL mode and to process the FTM commands
++firmware needs to be restarted in FTM mode using module parameter ftm_mode.
++The pre-request is all the radios should be down before starting the test.
++
++When start command ATH11K_TM_CMD_TESTMODE_START is received, ar->state
++is set to Test Mode. If the FTM command or event length is greater
++than 256 bytes, it will be broken down into multiple segments and
++encoded with TLV header if it is segmented commands, else it is sent
++to firmware as it is.
++
++On receiving UTF event from firmware, if it is segmented event, the driver
++will wait until it receives all the segments and notify the complete
++data to user application. In case the segmented sequence are missed or
++lost from the firmware, driver will skip the already received partial data.
++
++In case of unsegmented UTF event from firmware, driver notifies the
++data to the user application as it comes. Applications handles
++the data further.
++
++Command to boot in ftm mode:
++
++insmod ath11k ftm_mode=1
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Govindaraj Saminathan <quic_gsaminat@quicinc.com>
++Co-developed-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
++Signed-off-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
++Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230517135934.16408-4-quic_rajkbhag@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/ahb.c        |   3 +-
++ drivers/net/wireless/ath/ath11k/core.c       |  21 +-
++ drivers/net/wireless/ath/ath11k/core.h       |  16 +-
++ drivers/net/wireless/ath/ath11k/debug.h      |   1 +
++ drivers/net/wireless/ath/ath11k/mac.c        |  11 +-
++ drivers/net/wireless/ath/ath11k/pci.c        |   3 +-
++ drivers/net/wireless/ath/ath11k/testmode.c   | 350 ++++++++++++++++++-
++ drivers/net/wireless/ath/ath11k/testmode.h   |   6 +
++ drivers/net/wireless/ath/ath11k/testmode_i.h |  18 +-
++ drivers/net/wireless/ath/ath11k/wmi.c        |  11 +-
++ drivers/net/wireless/ath/ath11k/wmi.h        |  22 ++
++ drivers/net/wireless/ath/ath11k/wow.c        |   3 +-
++ 12 files changed, 444 insertions(+), 21 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/ahb.c
+++++ b/drivers/net/wireless/ath/ath11k/ahb.c
++@@ -1,7 +1,7 @@
++ // SPDX-License-Identifier: BSD-3-Clause-Clear
++ /*
++  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
++- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+++ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
++  */
++ 
++ #include <linux/module.h>
++@@ -1155,6 +1155,7 @@ static int ath11k_ahb_probe(struct platf
++ 	ab->hif.ops = hif_ops;
++ 	ab->pdev = pdev;
++ 	ab->hw_rev = hw_rev;
+++	ab->fw_mode = ATH11K_FIRMWARE_MODE_NORMAL;
++ 	platform_set_drvdata(pdev, ab);
++ 
++ 	ret = ath11k_pcic_register_pci_ops(ab, pci_ops);
++--- a/drivers/net/wireless/ath/ath11k/core.c
+++++ b/drivers/net/wireless/ath/ath11k/core.c
++@@ -1,7 +1,7 @@
++ // SPDX-License-Identifier: BSD-3-Clause-Clear
++ /*
++  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
++- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
++  */
++ 
++ #include <linux/module.h>
++@@ -32,6 +32,10 @@ module_param_named(frame_mode, ath11k_fr
++ MODULE_PARM_DESC(frame_mode,
++ 		 "Datapath frame mode (0: raw, 1: native wifi (default), 2: ethernet)");
++ 
+++bool ath11k_ftm_mode;
+++module_param_named(ftm_mode, ath11k_ftm_mode, bool, 0444);
+++MODULE_PARM_DESC(ftm_mode, "Boots up in factory test mode");
+++
++ static const struct ath11k_hw_params ath11k_hw_params[] = {
++ 	{
++ 		.hw_rev = ATH11K_HW_IPQ8074,
++@@ -1381,6 +1385,11 @@ static int ath11k_core_soc_create(struct
++ {
++ 	int ret;
++ 
+++	if (ath11k_ftm_mode) {
+++		ab->fw_mode = ATH11K_FIRMWARE_MODE_FTM;
+++		ath11k_info(ab, "Booting in factory test mode\n");
+++	}
+++
++ 	ret = ath11k_qmi_init_service(ab);
++ 	if (ret) {
++ 		ath11k_err(ab, "failed to initialize qmi :%d\n", ret);
++@@ -1607,7 +1616,7 @@ int ath11k_core_qmi_firmware_ready(struc
++ {
++ 	int ret;
++ 
++-	ret = ath11k_core_start_firmware(ab, ATH11K_FIRMWARE_MODE_NORMAL);
+++	ret = ath11k_core_start_firmware(ab, ab->fw_mode);
++ 	if (ret) {
++ 		ath11k_err(ab, "failed to start firmware: %d\n", ret);
++ 		return ret;
++@@ -1772,7 +1781,8 @@ void ath11k_core_pre_reconfigure_recover
++ 	for (i = 0; i < ab->num_radios; i++) {
++ 		pdev = &ab->pdevs[i];
++ 		ar = pdev->ar;
++-		if (!ar || ar->state == ATH11K_STATE_OFF)
+++		if (!ar || ar->state == ATH11K_STATE_OFF ||
+++		    ar->state == ATH11K_STATE_FTM)
++ 			continue;
++ 
++ 		ieee80211_stop_queues(ar->hw);
++@@ -1841,7 +1851,12 @@ static void ath11k_core_post_reconfigure
++ 			ath11k_warn(ab,
++ 				    "device is wedged, will not restart radio %d\n", i);
++ 			break;
+++		case ATH11K_STATE_FTM:
+++			ath11k_dbg(ab, ATH11K_DBG_TESTMODE,
+++				   "fw mode reset done radio %d\n", i);
+++			break;
++ 		}
+++
++ 		mutex_unlock(&ar->conf_mutex);
++ 	}
++ 	complete(&ab->driver_recovery);
++--- a/drivers/net/wireless/ath/ath11k/core.h
+++++ b/drivers/net/wireless/ath/ath11k/core.h
++@@ -1,7 +1,7 @@
++ /* SPDX-License-Identifier: BSD-3-Clause-Clear */
++ /*
++  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
++- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
++  */
++ 
++ #ifndef ATH11K_CORE_H
++@@ -52,6 +52,7 @@
++ #define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_"
++ 
++ extern unsigned int ath11k_frame_mode;
+++extern bool ath11k_ftm_mode;
++ 
++ #define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ)
++ 
++@@ -277,6 +278,7 @@ enum ath11k_dev_flags {
++ 	ATH11K_FLAG_FIXED_MEM_RGN,
++ 	ATH11K_FLAG_DEVICE_INIT_DONE,
++ 	ATH11K_FLAG_MULTI_MSI_VECTORS,
+++	ATH11K_FLAG_FTM_SEGMENTED,
++ };
++ 
++ enum ath11k_monitor_flags {
++@@ -530,6 +532,7 @@ enum ath11k_state {
++ 	ATH11K_STATE_RESTARTING,
++ 	ATH11K_STATE_RESTARTED,
++ 	ATH11K_STATE_WEDGED,
+++	ATH11K_STATE_FTM,
++ 	/* Add other states as required */
++ };
++ 
++@@ -709,6 +712,8 @@ struct ath11k {
++ 	u32 last_ppdu_id;
++ 	u32 cached_ppdu_id;
++ 	int monitor_vdev_id;
+++	struct completion fw_mode_reset;
+++	u8 ftm_msgref;
++ #ifdef CPTCFG_ATH11K_DEBUGFS
++ 	struct ath11k_debug debug;
++ #endif
++@@ -838,6 +843,7 @@ struct ath11k_msi_config {
++ /* Master structure to hold the hw data which may be used in core module */
++ struct ath11k_base {
++ 	enum ath11k_hw_rev hw_rev;
+++	enum ath11k_firmware_mode fw_mode;
++ 	struct platform_device *pdev;
++ 	struct device *dev;
++ 	struct ath11k_qmi qmi;
++@@ -978,6 +984,14 @@ struct ath11k_base {
++ 		const struct ath11k_pci_ops *ops;
++ 	} pci;
++ 
+++#ifdef CPTCFG_NL80211_TESTMODE
+++	struct {
+++		u32 data_pos;
+++		u32 expected_seq;
+++		u8 *eventdata;
+++	} testmode;
+++#endif
+++
++ 	/* must be last */
++ 	u8 drv_priv[] __aligned(sizeof(void *));
++ };
++--- a/drivers/net/wireless/ath/ath11k/debug.h
+++++ b/drivers/net/wireless/ath/ath11k/debug.h
++@@ -1,6 +1,7 @@
++ /* SPDX-License-Identifier: BSD-3-Clause-Clear */
++ /*
++  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+++ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
++  */
++ 
++ #ifndef _ATH11K_DEBUG_H_
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -643,7 +643,10 @@ struct ath11k *ath11k_mac_get_ar_by_pdev
++ 		return NULL;
++ 
++ 	for (i = 0; i < ab->num_radios; i++) {
++-		pdev = rcu_dereference(ab->pdevs_active[i]);
+++		if (ab->fw_mode == ATH11K_FIRMWARE_MODE_FTM)
+++			pdev = &ab->pdevs[i];
+++		else
+++			pdev = rcu_dereference(ab->pdevs_active[i]);
++ 
++ 		if (pdev && pdev->pdev_id == pdev_id)
++ 			return (pdev->ar ? pdev->ar : NULL);
++@@ -6271,6 +6274,11 @@ static int ath11k_mac_op_start(struct ie
++ 	struct ath11k_pdev *pdev = ar->pdev;
++ 	int ret;
++ 
+++	if (ath11k_ftm_mode) {
+++		ath11k_warn(ab, "mac operations not supported in factory test mode\n");
+++		return -EOPNOTSUPP;
+++	}
+++
++ 	ath11k_mac_drain_tx(ar);
++ 	mutex_lock(&ar->conf_mutex);
++ 
++@@ -6285,6 +6293,7 @@ static int ath11k_mac_op_start(struct ie
++ 	case ATH11K_STATE_RESTARTED:
++ 	case ATH11K_STATE_WEDGED:
++ 	case ATH11K_STATE_ON:
+++	case ATH11K_STATE_FTM:
++ 		WARN_ON(1);
++ 		ret = -EINVAL;
++ 		goto err;
++--- a/drivers/net/wireless/ath/ath11k/pci.c
+++++ b/drivers/net/wireless/ath/ath11k/pci.c
++@@ -1,7 +1,7 @@
++ // SPDX-License-Identifier: BSD-3-Clause-Clear
++ /*
++  * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.
++- * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.
+++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
++  */
++ 
++ #include <linux/module.h>
++@@ -745,6 +745,7 @@ static int ath11k_pci_probe(struct pci_d
++ 	ab_pci->ab = ab;
++ 	ab_pci->pdev = pdev;
++ 	ab->hif.ops = &ath11k_pci_hif_ops;
+++	ab->fw_mode = ATH11K_FIRMWARE_MODE_NORMAL;
++ 	pci_set_drvdata(pdev, ab);
++ 	spin_lock_init(&ab_pci->window_lock);
++ 
++--- a/drivers/net/wireless/ath/ath11k/testmode.c
+++++ b/drivers/net/wireless/ath/ath11k/testmode.c
++@@ -12,6 +12,9 @@
++ #include "core.h"
++ #include "testmode_i.h"
++ 
+++#define ATH11K_FTM_SEGHDR_CURRENT_SEQ		GENMASK(3, 0)
+++#define ATH11K_FTM_SEGHDR_TOTAL_SEGMENTS	GENMASK(7, 4)
+++
++ static const struct nla_policy ath11k_tm_policy[ATH11K_TM_ATTR_MAX + 1] = {
++ 	[ATH11K_TM_ATTR_CMD]		= { .type = NLA_U32 },
++ 	[ATH11K_TM_ATTR_DATA]		= { .type = NLA_BINARY,
++@@ -21,13 +24,217 @@ static const struct nla_policy ath11k_tm
++ 	[ATH11K_TM_ATTR_VERSION_MINOR]	= { .type = NLA_U32 },
++ };
++ 
+++static struct ath11k *ath11k_tm_get_ar(struct ath11k_base *ab)
+++{
+++	struct ath11k_pdev *pdev;
+++	struct ath11k *ar = NULL;
+++	int i;
+++
+++	for (i = 0; i < ab->num_radios; i++) {
+++		pdev = &ab->pdevs[i];
+++		ar = pdev->ar;
+++
+++		if (ar && ar->state == ATH11K_STATE_FTM)
+++			break;
+++	}
+++
+++	return ar;
+++}
+++
+++/* This function handles unsegmented events. Data in various events are aggregated
+++ * in application layer, this event is unsegmented from host perspective.
+++ */
+++static void ath11k_tm_wmi_event_unsegmented(struct ath11k_base *ab, u32 cmd_id,
+++					    struct sk_buff *skb)
+++{
+++	struct sk_buff *nl_skb;
+++	struct ath11k *ar;
+++
+++	ath11k_dbg(ab, ATH11K_DBG_TESTMODE,
+++		   "event wmi cmd_id %d skb length %d\n",
+++		   cmd_id, skb->len);
+++	ath11k_dbg_dump(ab, ATH11K_DBG_TESTMODE, NULL, "", skb->data, skb->len);
+++
+++	ar = ath11k_tm_get_ar(ab);
+++	if (!ar) {
+++		ath11k_warn(ab, "testmode event not handled due to invalid pdev\n");
+++		return;
+++	}
+++
+++	spin_lock_bh(&ar->data_lock);
+++
+++	nl_skb = cfg80211_testmode_alloc_event_skb(ar->hw->wiphy,
+++						   2 * nla_total_size(sizeof(u32)) +
+++						   nla_total_size(skb->len),
+++						   GFP_ATOMIC);
+++	if (!nl_skb) {
+++		ath11k_warn(ab,
+++			    "failed to allocate skb for unsegmented testmode wmi event\n");
+++		goto out;
+++	}
+++
+++	if (nla_put_u32(nl_skb, ATH11K_TM_ATTR_CMD, ATH11K_TM_CMD_WMI) ||
+++	    nla_put_u32(nl_skb, ATH11K_TM_ATTR_WMI_CMDID, cmd_id) ||
+++	    nla_put(nl_skb, ATH11K_TM_ATTR_DATA, skb->len, skb->data)) {
+++		ath11k_warn(ab, "failed to populate testmode unsegmented event\n");
+++		kfree_skb(nl_skb);
+++		goto out;
+++	}
+++
+++	cfg80211_testmode_event(nl_skb, GFP_ATOMIC);
+++	spin_unlock_bh(&ar->data_lock);
+++	return;
+++
+++out:
+++	spin_unlock_bh(&ar->data_lock);
+++	ath11k_warn(ab, "Failed to send testmode event to higher layers\n");
+++}
+++
+++/* This function handles segmented events. Data of various events received
+++ * from firmware is aggregated and sent to application layer
+++ */
+++static int ath11k_tm_process_event(struct ath11k_base *ab, u32 cmd_id,
+++				   const struct wmi_ftm_event_msg *ftm_msg,
+++				   u16 length)
+++{
+++	struct sk_buff *nl_skb;
+++	int ret = 0;
+++	struct ath11k *ar;
+++	u8 const *buf_pos;
+++	u16 datalen;
+++	u8 total_segments, current_seq;
+++	u32 data_pos;
+++	u32 pdev_id;
+++
+++	ath11k_dbg(ab, ATH11K_DBG_TESTMODE,
+++		   "event wmi cmd_id %d ftm event msg %pK datalen %d\n",
+++		   cmd_id, ftm_msg, length);
+++	ath11k_dbg_dump(ab, ATH11K_DBG_TESTMODE, NULL, "", ftm_msg, length);
+++	pdev_id = DP_HW2SW_MACID(ftm_msg->seg_hdr.pdev_id);
+++
+++	if (pdev_id >= ab->num_radios) {
+++		ath11k_warn(ab, "testmode event not handled due to invalid pdev id: %d\n",
+++			    pdev_id);
+++		return -EINVAL;
+++	}
+++
+++	ar = ab->pdevs[pdev_id].ar;
+++	if (!ar) {
+++		ath11k_warn(ab, "testmode event not handled due to absence of pdev\n");
+++		return -ENODEV;
+++	}
+++
+++	current_seq = FIELD_GET(ATH11K_FTM_SEGHDR_CURRENT_SEQ,
+++				ftm_msg->seg_hdr.segmentinfo);
+++	total_segments = FIELD_GET(ATH11K_FTM_SEGHDR_TOTAL_SEGMENTS,
+++				   ftm_msg->seg_hdr.segmentinfo);
+++	datalen = length - (sizeof(struct wmi_ftm_seg_hdr));
+++	buf_pos = ftm_msg->data;
+++
+++	spin_lock_bh(&ar->data_lock);
+++
+++	if (current_seq == 0) {
+++		ab->testmode.expected_seq = 0;
+++		ab->testmode.data_pos = 0;
+++	}
+++
+++	data_pos = ab->testmode.data_pos;
+++
+++	if ((data_pos + datalen) > ATH11K_FTM_EVENT_MAX_BUF_LENGTH) {
+++		ath11k_warn(ab, "Invalid ftm event length at %d: %d\n",
+++			    data_pos, datalen);
+++		ret = -EINVAL;
+++		goto out;
+++	}
+++
+++	memcpy(&ab->testmode.eventdata[data_pos], buf_pos, datalen);
+++	data_pos += datalen;
+++
+++	if (++ab->testmode.expected_seq != total_segments) {
+++		ab->testmode.data_pos = data_pos;
+++		ath11k_dbg(ab, ATH11K_DBG_TESTMODE,
+++			   "partial data received current_seq %d total_seg %d\n",
+++			    current_seq, total_segments);
+++		goto out;
+++	}
+++
+++	ath11k_dbg(ab, ATH11K_DBG_TESTMODE,
+++		   "total data length pos %d len %d\n",
+++		    data_pos, ftm_msg->seg_hdr.len);
+++	nl_skb = cfg80211_testmode_alloc_event_skb(ar->hw->wiphy,
+++						   2 * nla_total_size(sizeof(u32)) +
+++						   nla_total_size(data_pos),
+++						   GFP_ATOMIC);
+++	if (!nl_skb) {
+++		ath11k_warn(ab,
+++			    "failed to allocate skb for segmented testmode wmi event\n");
+++		ret = -ENOMEM;
+++		goto out;
+++	}
+++
+++	if (nla_put_u32(nl_skb, ATH11K_TM_ATTR_CMD,
+++			ATH11K_TM_CMD_WMI_FTM) ||
+++	    nla_put_u32(nl_skb, ATH11K_TM_ATTR_WMI_CMDID, cmd_id) ||
+++	    nla_put(nl_skb, ATH11K_TM_ATTR_DATA, data_pos,
+++		    &ab->testmode.eventdata[0])) {
+++		ath11k_warn(ab, "failed to populate segmented testmode event");
+++		kfree_skb(nl_skb);
+++		ret = -ENOBUFS;
+++		goto out;
+++	}
+++
+++	cfg80211_testmode_event(nl_skb, GFP_ATOMIC);
+++
+++out:
+++	spin_unlock_bh(&ar->data_lock);
+++	return ret;
+++}
+++
+++static void ath11k_tm_wmi_event_segmented(struct ath11k_base *ab, u32 cmd_id,
+++					  struct sk_buff *skb)
+++{
+++	const void **tb;
+++	const struct wmi_ftm_event_msg *ev;
+++	u16 length;
+++	int ret;
+++
+++	tb = ath11k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
+++	if (IS_ERR(tb)) {
+++		ret = PTR_ERR(tb);
+++		ath11k_warn(ab, "failed to parse ftm event tlv: %d\n", ret);
+++		return;
+++	}
+++
+++	ev = tb[WMI_TAG_ARRAY_BYTE];
+++	if (!ev) {
+++		ath11k_warn(ab, "failed to fetch ftm msg\n");
+++		kfree(tb);
+++		return;
+++	}
+++
+++	length = skb->len - TLV_HDR_SIZE;
+++	ret = ath11k_tm_process_event(ab, cmd_id, ev, length);
+++	if (ret)
+++		ath11k_warn(ab, "Failed to process ftm event\n");
+++
+++	kfree(tb);
+++}
+++
+++void ath11k_tm_wmi_event(struct ath11k_base *ab, u32 cmd_id, struct sk_buff *skb)
+++{
+++	if (test_bit(ATH11K_FLAG_FTM_SEGMENTED, &ab->dev_flags))
+++		ath11k_tm_wmi_event_segmented(ab, cmd_id, skb);
+++	else
+++		ath11k_tm_wmi_event_unsegmented(ab, cmd_id, skb);
+++}
+++
++ static int ath11k_tm_cmd_get_version(struct ath11k *ar, struct nlattr *tb[])
++ {
++ 	struct sk_buff *skb;
++ 	int ret;
++ 
++ 	ath11k_dbg(ar->ab, ATH11K_DBG_TESTMODE,
++-		   "testmode cmd get version_major %d version_minor %d\n",
+++		   "cmd get version_major %d version_minor %d\n",
++ 		   ATH11K_TESTMODE_VERSION_MAJOR,
++ 		   ATH11K_TESTMODE_VERSION_MINOR);
++ 
++@@ -53,6 +260,43 @@ static int ath11k_tm_cmd_get_version(str
++ 	return cfg80211_testmode_reply(skb);
++ }
++ 
+++static int ath11k_tm_cmd_testmode_start(struct ath11k *ar, struct nlattr *tb[])
+++{
+++	int ret;
+++
+++	mutex_lock(&ar->conf_mutex);
+++
+++	if (ar->state == ATH11K_STATE_FTM) {
+++		ret = -EALREADY;
+++		goto err;
+++	}
+++
+++	/* start utf only when the driver is not in use  */
+++	if (ar->state != ATH11K_STATE_OFF) {
+++		ret = -EBUSY;
+++		goto err;
+++	}
+++
+++	ar->ab->testmode.eventdata = kzalloc(ATH11K_FTM_EVENT_MAX_BUF_LENGTH,
+++					     GFP_KERNEL);
+++	if (!ar->ab->testmode.eventdata) {
+++		ret = -ENOMEM;
+++		goto err;
+++	}
+++
+++	ar->state = ATH11K_STATE_FTM;
+++	ar->ftm_msgref = 0;
+++
+++	mutex_unlock(&ar->conf_mutex);
+++
+++	ath11k_dbg(ar->ab, ATH11K_DBG_TESTMODE, "cmd start\n");
+++	return 0;
+++
+++err:
+++	mutex_unlock(&ar->conf_mutex);
+++	return ret;
+++}
+++
++ static int ath11k_tm_cmd_wmi(struct ath11k *ar, struct nlattr *tb[])
++ {
++ 	struct ath11k_pdev_wmi *wmi = ar->wmi;
++@@ -63,11 +307,6 @@ static int ath11k_tm_cmd_wmi(struct ath1
++ 
++ 	mutex_lock(&ar->conf_mutex);
++ 
++-	if (ar->state != ATH11K_STATE_ON) {
++-		ret = -ENETDOWN;
++-		goto out;
++-	}
++-
++ 	if (!tb[ATH11K_TM_ATTR_DATA]) {
++ 		ret = -EINVAL;
++ 		goto out;
++@@ -80,11 +319,17 @@ static int ath11k_tm_cmd_wmi(struct ath1
++ 
++ 	buf = nla_data(tb[ATH11K_TM_ATTR_DATA]);
++ 	buf_len = nla_len(tb[ATH11K_TM_ATTR_DATA]);
+++	if (!buf_len) {
+++		ath11k_warn(ar->ab, "No data present in testmode wmi command\n");
+++		ret = -EINVAL;
+++		goto out;
+++	}
+++
++ 	cmd_id = nla_get_u32(tb[ATH11K_TM_ATTR_WMI_CMDID]);
++ 
++ 	ath11k_dbg(ar->ab, ATH11K_DBG_TESTMODE,
++-		   "testmode cmd wmi cmd_id %d buf %pK buf_len %d\n",
++-		   cmd_id, buf, buf_len);
+++		   "cmd wmi cmd_id %d buf length %d\n",
+++		   cmd_id, buf_len);
++ 
++ 	ath11k_dbg_dump(ar->ab, ATH11K_DBG_TESTMODE, NULL, "", buf, buf_len);
++ 
++@@ -111,6 +356,91 @@ out:
++ 	return ret;
++ }
++ 
+++static int ath11k_tm_cmd_wmi_ftm(struct ath11k *ar, struct nlattr *tb[])
+++{
+++	struct ath11k_pdev_wmi *wmi = ar->wmi;
+++	struct ath11k_base *ab = ar->ab;
+++	struct sk_buff *skb;
+++	u32 cmd_id, buf_len, hdr_info;
+++	int ret;
+++	void *buf;
+++	u8 segnumber = 0, seginfo;
+++	u16 chunk_len, total_bytes, num_segments;
+++	u8 *bufpos;
+++	struct wmi_ftm_cmd *ftm_cmd;
+++
+++	set_bit(ATH11K_FLAG_FTM_SEGMENTED, &ab->dev_flags);
+++
+++	mutex_lock(&ar->conf_mutex);
+++
+++	if (ar->state != ATH11K_STATE_FTM) {
+++		ret = -ENETDOWN;
+++		goto out;
+++	}
+++
+++	if (!tb[ATH11K_TM_ATTR_DATA]) {
+++		ret = -EINVAL;
+++		goto out;
+++	}
+++
+++	buf = nla_data(tb[ATH11K_TM_ATTR_DATA]);
+++	buf_len = nla_len(tb[ATH11K_TM_ATTR_DATA]);
+++	cmd_id = WMI_PDEV_UTF_CMDID;
+++
+++	ath11k_dbg(ar->ab, ATH11K_DBG_TESTMODE,
+++		   "cmd wmi ftm cmd_id %d buffer length %d\n",
+++		   cmd_id, buf_len);
+++	ath11k_dbg_dump(ar->ab, ATH11K_DBG_TESTMODE, NULL, "", buf, buf_len);
+++
+++	bufpos = buf;
+++	total_bytes = buf_len;
+++	num_segments = total_bytes / MAX_WMI_UTF_LEN;
+++
+++	if (buf_len - (num_segments * MAX_WMI_UTF_LEN))
+++		num_segments++;
+++
+++	while (buf_len) {
+++		chunk_len = min_t(u16, buf_len, MAX_WMI_UTF_LEN);
+++
+++		skb = ath11k_wmi_alloc_skb(wmi->wmi_ab, (chunk_len +
+++					   sizeof(struct wmi_ftm_cmd)));
+++		if (!skb) {
+++			ret = -ENOMEM;
+++			goto out;
+++		}
+++
+++		ftm_cmd = (struct wmi_ftm_cmd *)skb->data;
+++		hdr_info = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_BYTE) |
+++			   FIELD_PREP(WMI_TLV_LEN, (chunk_len +
+++				      sizeof(struct wmi_ftm_seg_hdr)));
+++		ftm_cmd->tlv_header = hdr_info;
+++		ftm_cmd->seg_hdr.len = total_bytes;
+++		ftm_cmd->seg_hdr.msgref = ar->ftm_msgref;
+++		seginfo = FIELD_PREP(ATH11K_FTM_SEGHDR_TOTAL_SEGMENTS, num_segments) |
+++			  FIELD_PREP(ATH11K_FTM_SEGHDR_CURRENT_SEQ, segnumber);
+++		ftm_cmd->seg_hdr.segmentinfo = seginfo;
+++		segnumber++;
+++
+++		memcpy(&ftm_cmd->data, bufpos, chunk_len);
+++
+++		ret = ath11k_wmi_cmd_send(wmi, skb, cmd_id);
+++		if (ret) {
+++			ath11k_warn(ar->ab, "failed to send wmi ftm command: %d\n", ret);
+++			goto out;
+++		}
+++
+++		buf_len -= chunk_len;
+++		bufpos += chunk_len;
+++	}
+++
+++	ar->ftm_msgref++;
+++	ret = 0;
+++
+++out:
+++	mutex_unlock(&ar->conf_mutex);
+++	return ret;
+++}
+++
++ int ath11k_tm_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
++ 		  void *data, int len)
++ {
++@@ -131,6 +461,10 @@ int ath11k_tm_cmd(struct ieee80211_hw *h
++ 		return ath11k_tm_cmd_get_version(ar, tb);
++ 	case ATH11K_TM_CMD_WMI:
++ 		return ath11k_tm_cmd_wmi(ar, tb);
+++	case ATH11K_TM_CMD_TESTMODE_START:
+++		return ath11k_tm_cmd_testmode_start(ar, tb);
+++	case ATH11K_TM_CMD_WMI_FTM:
+++		return ath11k_tm_cmd_wmi_ftm(ar, tb);
++ 	default:
++ 		return -EOPNOTSUPP;
++ 	}
++--- a/drivers/net/wireless/ath/ath11k/testmode.h
+++++ b/drivers/net/wireless/ath/ath11k/testmode.h
++@@ -8,11 +8,17 @@
++ 
++ #ifdef CPTCFG_NL80211_TESTMODE
++ 
+++void ath11k_tm_wmi_event(struct ath11k_base *ab, u32 cmd_id, struct sk_buff *skb);
++ int ath11k_tm_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
++ 		  void *data, int len);
++ 
++ #else
++ 
+++static inline void ath11k_tm_wmi_event(struct ath11k_base *ab, u32 cmd_id,
+++				       struct sk_buff *skb)
+++{
+++}
+++
++ static inline int ath11k_tm_cmd(struct ieee80211_hw *hw,
++ 				struct ieee80211_vif *vif,
++ 				void *data, int len)
++--- a/drivers/net/wireless/ath/ath11k/testmode_i.h
+++++ b/drivers/net/wireless/ath/ath11k/testmode_i.h
++@@ -1,6 +1,7 @@
++ /* SPDX-License-Identifier: BSD-3-Clause-Clear */
++ /*
++  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+++ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
++  */
++ 
++ /* "API" level of the ath11k testmode interface. Bump it after every
++@@ -11,9 +12,10 @@
++ /* Bump this after every _compatible_ interface change, for example
++  * addition of a new command or an attribute.
++  */
++-#define ATH11K_TESTMODE_VERSION_MINOR 0
+++#define ATH11K_TESTMODE_VERSION_MINOR 1
++ 
++ #define ATH11K_TM_DATA_MAX_LEN		5000
+++#define ATH11K_FTM_EVENT_MAX_BUF_LENGTH 2048
++ 
++ enum ath11k_tm_attr {
++ 	__ATH11K_TM_ATTR_INVALID		= 0,
++@@ -47,4 +49,18 @@ enum ath11k_tm_cmd {
++ 	 * ATH11K_TM_ATTR_DATA.
++ 	 */
++ 	ATH11K_TM_CMD_WMI = 1,
+++
+++	/* Boots the UTF firmware, the netdev interface must be down at the
+++	 * time.
+++	 */
+++	ATH11K_TM_CMD_TESTMODE_START = 2,
+++
+++	/* The command used to transmit a FTM WMI command to the firmware
+++	 * and the event to receive WMI events from the firmware. The data
+++	 * received only contain the payload, need to add the tlv header
+++	 * and send the cmd to firmware with command id WMI_PDEV_UTF_CMDID.
+++	 * The data payload size could be large and the driver needs to
+++	 * send segmented data to firmware.
+++	 */
+++	ATH11K_TM_CMD_WMI_FTM = 3,
++ };
++--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++++ b/drivers/net/wireless/ath/ath11k/wmi.c
++@@ -1,7 +1,7 @@
++ // SPDX-License-Identifier: BSD-3-Clause-Clear
++ /*
++  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
++- * Copyright (c) 2021, Qualcomm Innovation Center, Inc. All rights reserved.
+++ * Copyright (c) 2021, 2023 Qualcomm Innovation Center, Inc. All rights reserved.
++  */
++ #include <linux/skbuff.h>
++ #include <linux/ctype.h>
++@@ -19,6 +19,7 @@
++ #include "mac.h"
++ #include "hw.h"
++ #include "peer.h"
+++#include "testmode.h"
++ 
++ struct wmi_tlv_policy {
++ 	size_t min_len;
++@@ -237,9 +238,8 @@ static int ath11k_wmi_tlv_parse(struct a
++ 				   (void *)tb);
++ }
++ 
++-static const void **
++-ath11k_wmi_tlv_parse_alloc(struct ath11k_base *ab, const void *ptr,
++-			   size_t len, gfp_t gfp)
+++const void **ath11k_wmi_tlv_parse_alloc(struct ath11k_base *ab, const void *ptr,
+++					size_t len, gfp_t gfp)
++ {
++ 	const void **tb;
++ 	int ret;
++@@ -8628,6 +8628,9 @@ static void ath11k_wmi_tlv_op_rx(struct
++ 	case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID:
++ 		ath11k_wmi_pdev_csa_switch_count_status_event(ab, skb);
++ 		break;
+++	case WMI_PDEV_UTF_EVENTID:
+++		ath11k_tm_wmi_event(ab, id, skb);
+++		break;
++ 	case WMI_PDEV_TEMPERATURE_EVENTID:
++ 		ath11k_wmi_pdev_temperature_event(ab, skb);
++ 		break;
++--- a/drivers/net/wireless/ath/ath11k/wmi.h
+++++ b/drivers/net/wireless/ath/ath11k/wmi.h
++@@ -1,6 +1,7 @@
++ /* SPDX-License-Identifier: BSD-3-Clause-Clear */
++ /*
++  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+++ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
++  */
++ 
++ #ifndef ATH11K_WMI_H
++@@ -68,6 +69,7 @@ struct wmi_tlv {
++ 
++ #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1
++ 
+++#define MAX_WMI_UTF_LEN 252
++ #define WMI_BA_MODE_BUFFER_SIZE_256  3
++ /*
++  * HW mode config type replicated from FW header
++@@ -3564,6 +3566,24 @@ struct wmi_get_pdev_temperature_cmd {
++ 	u32 pdev_id;
++ } __packed;
++ 
+++struct wmi_ftm_seg_hdr {
+++	u32 len;
+++	u32 msgref;
+++	u32 segmentinfo;
+++	u32 pdev_id;
+++} __packed;
+++
+++struct wmi_ftm_cmd {
+++	u32 tlv_header;
+++	struct wmi_ftm_seg_hdr seg_hdr;
+++	u8 data[];
+++} __packed;
+++
+++struct wmi_ftm_event_msg {
+++	struct wmi_ftm_seg_hdr seg_hdr;
+++	u8 data[];
+++} __packed;
+++
++ #define WMI_BEACON_TX_BUFFER_SIZE	512
++ 
++ #define WMI_EMA_TMPL_IDX_SHIFT            8
++@@ -6300,6 +6320,8 @@ enum wmi_sta_keepalive_method {
++ #define WMI_STA_KEEPALIVE_INTERVAL_DEFAULT	30
++ #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE	0
++ 
+++const void **ath11k_wmi_tlv_parse_alloc(struct ath11k_base *ab, const void *ptr,
+++					size_t len, gfp_t gfp);
++ int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb,
++ 			u32 cmd_id);
++ struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len);
++--- a/drivers/net/wireless/ath/ath11k/wow.c
+++++ b/drivers/net/wireless/ath/ath11k/wow.c
++@@ -1,7 +1,7 @@
++ // SPDX-License-Identifier: BSD-3-Clause-Clear
++ /*
++  * Copyright (c) 2020 The Linux Foundation. All rights reserved.
++- * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
+++ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
++  */
++ 
++ #include <linux/delay.h>
++@@ -838,6 +838,7 @@ exit:
++ 		case ATH11K_STATE_RESTARTING:
++ 		case ATH11K_STATE_RESTARTED:
++ 		case ATH11K_STATE_WEDGED:
+++		case ATH11K_STATE_FTM:
++ 			ath11k_warn(ar->ab, "encountered unexpected device state %d on resume, cannot recover\n",
++ 				    ar->state);
++ 			ret = -EIO;
+diff --git a/package/kernel/mac80211/patches/ath11k/0083-wifi-ath11k-Allow-ath11k-to-boot-without-caldata-in-.patch b/package/kernel/mac80211/patches/ath11k/0083-wifi-ath11k-Allow-ath11k-to-boot-without-caldata-in-.patch
+new file mode 100644
+index 0000000000..5a1fa88294
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0083-wifi-ath11k-Allow-ath11k-to-boot-without-caldata-in-.patch
+@@ -0,0 +1,47 @@
++From 8aeba427296bff6a6051686f1d139c89a0b00e4c Mon Sep 17 00:00:00 2001
++From: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
++Date: Fri, 26 May 2023 12:41:07 +0300
++Subject: [PATCH 84/84] wifi: ath11k: Allow ath11k to boot without caldata in
++ ftm mode
++
++Currently, if ath11k is unable to load the calibration data file it will
++always exit. However the calibration data may not be present in factory
++test mode, so update the logic to allow the driver to execute in FTM mode
++even if downloading the calibration data fails.
++
++Tested-on : IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
++Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230517135934.16408-5-quic_rajkbhag@quicinc.com
++---
++ drivers/net/wireless/ath/ath11k/qmi.c | 10 +++++++++-
++ 1 file changed, 9 insertions(+), 1 deletion(-)
++
++--- a/drivers/net/wireless/ath/ath11k/qmi.c
+++++ b/drivers/net/wireless/ath/ath11k/qmi.c
++@@ -1,7 +1,7 @@
++ // SPDX-License-Identifier: BSD-3-Clause-Clear
++ /*
++  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
++- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+++ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
++  */
++ 
++ #include <linux/elf.h>
++@@ -2460,6 +2460,14 @@ static int ath11k_qmi_load_bdf_qmi(struc
++ 
++ 		fw_entry = ath11k_core_firmware_request(ab, ATH11K_DEFAULT_CAL_FILE);
++ 		if (IS_ERR(fw_entry)) {
+++			/* Caldata may not be present during first time calibration in
+++			 * factory hence allow to boot without loading caldata in ftm mode
+++			 */
+++			if (ath11k_ftm_mode) {
+++				ath11k_info(ab,
+++					    "Booting without cal data file in factory test mode\n");
+++				return 0;
+++			}
++ 			ret = PTR_ERR(fw_entry);
++ 			ath11k_warn(ab,
++ 				    "qmi failed to load CAL data file:%s\n",
+diff --git a/package/kernel/mac80211/patches/ath11k/0084-wifi-ath11k-Add-HTT-stats-for-PHY-reset-case.patch b/package/kernel/mac80211/patches/ath11k/0084-wifi-ath11k-Add-HTT-stats-for-PHY-reset-case.patch
+new file mode 100644
+index 0000000000..946f5f7b57
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/0084-wifi-ath11k-Add-HTT-stats-for-PHY-reset-case.patch
+@@ -0,0 +1,261 @@
++From 2d4f9093e2d8531ad0a2bb98fe5b36dc8addf2a2 Mon Sep 17 00:00:00 2001
++From: Nidhi Jain <quic_nidhjain@quicinc.com>
++Date: Fri, 26 May 2023 12:41:07 +0300
++Subject: [PATCH] wifi: ath11k: Add HTT stats for PHY reset case
++
++New HTT stats are added with stats type 37 to
++provide PHY reset stats and PHY reset counter stats.
++
++PHY reset stats are used to display the current
++PHY-related operation information such as band, CCA
++threshold, current operating channel etc.,
++
++PHY reset counter stats are used to display the
++PHY reset counter values like calibration counts,
++temperature based recalibration counts etc.,
++
++Usage:
++echo 37 > /sys/kernel/debug/ieee80211/phyX/ath11k/htt_stats_type
++cat /sys/kernel/debug/ieee80211/phyx/ath11k/htt_stats
++
++Output:
++
++HTT_PHY_RESET_STATS_TLV:
++pdev_id = 0
++chan_mhz = 5180
++chan_band_center_freq1 = 5210
++chan_band_center_freq2 = 0
++chan_phy_mode = 18
++chan_flags = 0x8
++chan_num = 36
++reset_cause = 0x50000
++prev_reset_cause = 0x50000
++phy_warm_reset_src = 0x0
++rx_gain_tbl_mode = 0
++xbar_val = 0xfac688
++force_calibration = 0
++phyrf_mode = 0
++phy_homechan = 0
++phy_tx_ch_mask = 0x3
++phy_rx_ch_mask = 0x3
++phybb_ini_mask = 0x5
++phyrf_ini_mask = 0x0
++phy_dfs_en_mask = 0x0
++phy_sscan_en_mask = 0x0
++phy_synth_sel_mask = 0x0
++phy_adfs_freq = 0
++cck_fir_settings = 0x0
++phy_dyn_pri_chan = 6
++cca_thresh = 0x26232020
++dyn_cca_status = 0
++rxdesense_thresh_hw = 0xcfe0afe
++rxdesense_thresh_sw = 0xcfe0afe
++
++HTT_PHY_RESET_COUNTERS_TLV:
++pdev_id = 0
++cf_active_low_fail_cnt = 0
++cf_active_low_pass_cnt = 0
++phy_off_through_vreg_cnt = 0
++force_calibration_cnt = 0
++rf_mode_switch_phy_off_cnt = 0
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Nidhi Jain <quic_nidhjain@quicinc.com>
++Signed-off-by: Maharaja Kennadyrajan <quic_mkenna@quicinc.com>
++Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
++Link: https://lore.kernel.org/r/20230517141242.2754293-1-quic_mkenna@quicinc.com
++---
++ .../wireless/ath/ath11k/debugfs_htt_stats.c   | 114 ++++++++++++++++++
++ .../wireless/ath/ath11k/debugfs_htt_stats.h   |  43 +++++++
++ 2 files changed, 157 insertions(+)
++
++--- a/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c
+++++ b/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c
++@@ -4011,6 +4011,114 @@ void htt_print_phy_stats_tlv(const void
++ 	stats_req->buf_len = len;
++ }
++ 
+++static inline void
+++htt_print_phy_reset_counters_tlv(const void *tag_buf,
+++				 u16 tag_len,
+++				 struct debug_htt_stats_req *stats_req)
+++{
+++	const struct htt_phy_reset_counters_tlv *htt_stats_buf = tag_buf;
+++	u8 *buf = stats_req->buf;
+++	u32 len = stats_req->buf_len;
+++	u32 buf_len = ATH11K_HTT_STATS_BUF_SIZE;
+++
+++	if (tag_len < sizeof(*htt_stats_buf))
+++		return;
+++
+++	len += scnprintf(buf + len, buf_len - len, "HTT_PHY_RESET_COUNTERS_TLV:\n");
+++
+++	len += scnprintf(buf + len, buf_len - len, "pdev_id = %u\n",
+++			 htt_stats_buf->pdev_id);
+++	len += scnprintf(buf + len, buf_len - len, "cf_active_low_fail_cnt = %u\n",
+++			 htt_stats_buf->cf_active_low_fail_cnt);
+++	len += scnprintf(buf + len, buf_len - len, "cf_active_low_pass_cnt = %u\n",
+++			 htt_stats_buf->cf_active_low_pass_cnt);
+++	len += scnprintf(buf + len, buf_len - len, "phy_off_through_vreg_cnt = %u\n",
+++			 htt_stats_buf->phy_off_through_vreg_cnt);
+++	len += scnprintf(buf + len, buf_len - len, "force_calibration_cnt = %u\n",
+++			 htt_stats_buf->force_calibration_cnt);
+++	len += scnprintf(buf + len, buf_len - len, "rf_mode_switch_phy_off_cnt = %u\n",
+++			 htt_stats_buf->rf_mode_switch_phy_off_cnt);
+++
+++	stats_req->buf_len = len;
+++}
+++
+++static inline void
+++htt_print_phy_reset_stats_tlv(const void *tag_buf,
+++			      u16 tag_len,
+++			      struct debug_htt_stats_req *stats_req)
+++{
+++	const struct htt_phy_reset_stats_tlv *htt_stats_buf = tag_buf;
+++	u8 *buf = stats_req->buf;
+++	u32 len = stats_req->buf_len;
+++	u32 buf_len = ATH11K_HTT_STATS_BUF_SIZE;
+++
+++	if (tag_len < sizeof(*htt_stats_buf))
+++		return;
+++
+++	len += scnprintf(buf + len, buf_len - len, "HTT_PHY_RESET_STATS_TLV:\n");
+++
+++	len += scnprintf(buf + len, buf_len - len, "pdev_id = %u\n",
+++			 htt_stats_buf->pdev_id);
+++	len += scnprintf(buf + len, buf_len - len, "chan_mhz = %u\n",
+++			 htt_stats_buf->chan_mhz);
+++	len += scnprintf(buf + len, buf_len - len, "chan_band_center_freq1 = %u\n",
+++			 htt_stats_buf->chan_band_center_freq1);
+++	len += scnprintf(buf + len, buf_len - len, "chan_band_center_freq2 = %u\n",
+++			 htt_stats_buf->chan_band_center_freq2);
+++	len += scnprintf(buf + len, buf_len - len, "chan_phy_mode = %u\n",
+++			 htt_stats_buf->chan_phy_mode);
+++	len += scnprintf(buf + len, buf_len - len, "chan_flags = 0x%0x\n",
+++			 htt_stats_buf->chan_flags);
+++	len += scnprintf(buf + len, buf_len - len, "chan_num = %u\n",
+++			 htt_stats_buf->chan_num);
+++	len += scnprintf(buf + len, buf_len - len, "reset_cause = 0x%0x\n",
+++			 htt_stats_buf->reset_cause);
+++	len += scnprintf(buf + len, buf_len - len, "prev_reset_cause = 0x%0x\n",
+++			 htt_stats_buf->prev_reset_cause);
+++	len += scnprintf(buf + len, buf_len - len, "phy_warm_reset_src = 0x%0x\n",
+++			 htt_stats_buf->phy_warm_reset_src);
+++	len += scnprintf(buf + len, buf_len - len, "rx_gain_tbl_mode = %d\n",
+++			 htt_stats_buf->rx_gain_tbl_mode);
+++	len += scnprintf(buf + len, buf_len - len, "xbar_val = 0x%0x\n",
+++			 htt_stats_buf->xbar_val);
+++	len += scnprintf(buf + len, buf_len - len, "force_calibration = %u\n",
+++			 htt_stats_buf->force_calibration);
+++	len += scnprintf(buf + len, buf_len - len, "phyrf_mode = %u\n",
+++			 htt_stats_buf->phyrf_mode);
+++	len += scnprintf(buf + len, buf_len - len, "phy_homechan = %u\n",
+++			 htt_stats_buf->phy_homechan);
+++	len += scnprintf(buf + len, buf_len - len, "phy_tx_ch_mask = 0x%0x\n",
+++			 htt_stats_buf->phy_tx_ch_mask);
+++	len += scnprintf(buf + len, buf_len - len, "phy_rx_ch_mask = 0x%0x\n",
+++			 htt_stats_buf->phy_rx_ch_mask);
+++	len += scnprintf(buf + len, buf_len - len, "phybb_ini_mask = 0x%0x\n",
+++			 htt_stats_buf->phybb_ini_mask);
+++	len += scnprintf(buf + len, buf_len - len, "phyrf_ini_mask = 0x%0x\n",
+++			 htt_stats_buf->phyrf_ini_mask);
+++	len += scnprintf(buf + len, buf_len - len, "phy_dfs_en_mask = 0x%0x\n",
+++			 htt_stats_buf->phy_dfs_en_mask);
+++	len += scnprintf(buf + len, buf_len - len, "phy_sscan_en_mask = 0x%0x\n",
+++			 htt_stats_buf->phy_sscan_en_mask);
+++	len += scnprintf(buf + len, buf_len - len, "phy_synth_sel_mask = 0x%0x\n",
+++			 htt_stats_buf->phy_synth_sel_mask);
+++	len += scnprintf(buf + len, buf_len - len, "phy_adfs_freq = %u\n",
+++			 htt_stats_buf->phy_adfs_freq);
+++	len += scnprintf(buf + len, buf_len - len, "cck_fir_settings = 0x%0x\n",
+++			 htt_stats_buf->cck_fir_settings);
+++	len += scnprintf(buf + len, buf_len - len, "phy_dyn_pri_chan = %u\n",
+++			 htt_stats_buf->phy_dyn_pri_chan);
+++	len += scnprintf(buf + len, buf_len - len, "cca_thresh = 0x%0x\n",
+++			 htt_stats_buf->cca_thresh);
+++	len += scnprintf(buf + len, buf_len - len, "dyn_cca_status = %u\n",
+++			 htt_stats_buf->dyn_cca_status);
+++	len += scnprintf(buf + len, buf_len - len, "rxdesense_thresh_hw = 0x%x\n",
+++			 htt_stats_buf->rxdesense_thresh_hw);
+++	len += scnprintf(buf + len, buf_len - len, "rxdesense_thresh_sw = 0x%x\n",
+++			 htt_stats_buf->rxdesense_thresh_sw);
+++
+++	stats_req->buf_len = len;
+++}
+++
++ static inline
++ void htt_print_peer_ctrl_path_txrx_stats_tlv(const void *tag_buf,
++ 					     struct debug_htt_stats_req *stats_req)
++@@ -4425,6 +4533,12 @@ static int ath11k_dbg_htt_ext_stats_pars
++ 	case HTT_STATS_PHY_STATS_TAG:
++ 		htt_print_phy_stats_tlv(tag_buf, stats_req);
++ 		break;
+++	case HTT_STATS_PHY_RESET_COUNTERS_TAG:
+++		htt_print_phy_reset_counters_tlv(tag_buf, len, stats_req);
+++		break;
+++	case HTT_STATS_PHY_RESET_STATS_TAG:
+++		htt_print_phy_reset_stats_tlv(tag_buf, len, stats_req);
+++		break;
++ 	case HTT_STATS_PEER_CTRL_PATH_TXRX_STATS_TAG:
++ 		htt_print_peer_ctrl_path_txrx_stats_tlv(tag_buf, stats_req);
++ 		break;
++--- a/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.h
+++++ b/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.h
++@@ -111,6 +111,8 @@ enum htt_tlv_tag_t {
++ 	HTT_STATS_TXBF_OFDMA_STEER_STATS_TAG		    = 116,
++ 	HTT_STATS_PHY_COUNTERS_TAG			    = 121,
++ 	HTT_STATS_PHY_STATS_TAG				    = 122,
+++	HTT_STATS_PHY_RESET_COUNTERS_TAG		    = 123,
+++	HTT_STATS_PHY_RESET_STATS_TAG			    = 124,
++ 
++ 	HTT_STATS_MAX_TAG,
++ };
++@@ -1964,6 +1966,47 @@ struct htt_phy_stats_tlv {
++ 	u32 fw_run_time;
++ };
++ 
+++struct htt_phy_reset_counters_tlv {
+++	u32 pdev_id;
+++	u32 cf_active_low_fail_cnt;
+++	u32 cf_active_low_pass_cnt;
+++	u32 phy_off_through_vreg_cnt;
+++	u32 force_calibration_cnt;
+++	u32 rf_mode_switch_phy_off_cnt;
+++};
+++
+++struct htt_phy_reset_stats_tlv {
+++	u32 pdev_id;
+++	u32 chan_mhz;
+++	u32 chan_band_center_freq1;
+++	u32 chan_band_center_freq2;
+++	u32 chan_phy_mode;
+++	u32 chan_flags;
+++	u32 chan_num;
+++	u32 reset_cause;
+++	u32 prev_reset_cause;
+++	u32 phy_warm_reset_src;
+++	u32 rx_gain_tbl_mode;
+++	u32 xbar_val;
+++	u32 force_calibration;
+++	u32 phyrf_mode;
+++	u32 phy_homechan;
+++	u32 phy_tx_ch_mask;
+++	u32 phy_rx_ch_mask;
+++	u32 phybb_ini_mask;
+++	u32 phyrf_ini_mask;
+++	u32 phy_dfs_en_mask;
+++	u32 phy_sscan_en_mask;
+++	u32 phy_synth_sel_mask;
+++	u32 phy_adfs_freq;
+++	u32 cck_fir_settings;
+++	u32 phy_dyn_pri_chan;
+++	u32 cca_thresh;
+++	u32 dyn_cca_status;
+++	u32 rxdesense_thresh_hw;
+++	u32 rxdesense_thresh_sw;
+++};
+++
++ struct htt_peer_ctrl_path_txrx_stats_tlv {
++ 	/* peer mac address */
++ 	u8 peer_mac_addr[ETH_ALEN];
+diff --git a/package/kernel/mac80211/patches/ath11k/100-wifi-ath11k-use-unique-QRTR-instance-ID.patch b/package/kernel/mac80211/patches/ath11k/100-wifi-ath11k-use-unique-QRTR-instance-ID.patch
+new file mode 100644
+index 0000000000..39d5a61d5a
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/100-wifi-ath11k-use-unique-QRTR-instance-ID.patch
+@@ -0,0 +1,162 @@
++From 534a5f99d589cfa6b244b4433c192b6a278a67ff Mon Sep 17 00:00:00 2001
++From: Robert Marko <robimarko@gmail.com>
++Date: Sat, 5 Nov 2022 20:15:40 +0100
++Subject: [PATCH] wifi: ath11k: use unique QRTR instance ID
++
++Currently, trying to use AHB + PCI/MHI cards or multiple PCI/MHI cards
++will cause a clash in the QRTR instance node ID and prevent the driver
++from talking via QMI to the card and thus initializing it with:
++[    9.836329] ath11k c000000.wifi: host capability request failed: 1 90
++[    9.842047] ath11k c000000.wifi: failed to send qmi host cap: -22
++
++So, in order to allow for this combination of cards, especially AHB + PCI
++cards like IPQ8074 + QCN9074 (Used by me and tested on) set the desired
++QRTR instance ID offset by calculating a unique one based on PCI domain
++and bus ID-s and writing it to bits 7-0 of BHI_ERRDBG2 MHI register by
++using the SBL state callback that is added as part of the series.
++We also have to make sure that new QRTR offset is added on top of the
++default QRTR instance ID-s that are currently used in the driver.
++
++This finally allows using AHB + PCI or multiple PCI cards on the same
++system.
++
++Since this is not supported on QCA6390 and like, its limited to QCN9074
++which is known to support changing QRTR instance ID.
++
++Before:
++root@OpenWrt:/# qrtr-lookup
++  Service Version Instance Node  Port
++     1054       1        0    7     1 <unknown>
++       69       1        2    7     3 ATH10k WLAN firmware service
++
++After:
++root@OpenWrt:/# qrtr-lookup
++  Service Version Instance Node  Port
++     1054       1        0    7     1 <unknown>
++       69       1        2    7     3 ATH10k WLAN firmware service
++       15       1        0    8     1 Test service
++       69       1        8    8     2 ATH10k WLAN firmware service
++
++Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.5.0.1-01208-QCAHKSWPL_SILICONZ-1
++Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01208-QCAHKSWPL_SILICONZ-1
++
++Signed-off-by: Robert Marko <robimarko@gmail.com>
++---
++ drivers/net/wireless/ath/ath11k/mhi.c | 49 ++++++++++++++++++---------
++ drivers/net/wireless/ath/ath11k/mhi.h |  3 ++
++ drivers/net/wireless/ath/ath11k/pci.c |  9 ++++-
++ 3 files changed, 44 insertions(+), 17 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/mhi.c
+++++ b/drivers/net/wireless/ath/ath11k/mhi.c
++@@ -294,6 +294,34 @@ static void ath11k_mhi_op_runtime_put(st
++ {
++ }
++ 
+++static int ath11k_mhi_op_read_reg(struct mhi_controller *mhi_cntrl,
+++				  void __iomem *addr,
+++				  u32 *out)
+++{
+++	*out = readl(addr);
+++
+++	return 0;
+++}
+++
+++static void ath11k_mhi_op_write_reg(struct mhi_controller *mhi_cntrl,
+++				    void __iomem *addr,
+++				    u32 val)
+++{
+++	writel(val, addr);
+++}
+++
+++static void ath11k_mhi_qrtr_instance_set(struct mhi_controller *mhi_cntrl)
+++{
+++	struct ath11k_base *ab = dev_get_drvdata(mhi_cntrl->cntrl_dev);
+++
+++	if (ab->hw_rev == ATH11K_HW_QCN9074_HW10) {
+++		ath11k_mhi_op_write_reg(mhi_cntrl,
+++					mhi_cntrl->bhi + BHI_ERRDBG2,
+++					FIELD_PREP(QRTR_INSTANCE_MASK,
+++					ab->qmi.service_ins_id - ab->hw_params.qmi_service_ins_id));
+++	}
+++}
+++
++ static char *ath11k_mhi_op_callback_to_str(enum mhi_callback reason)
++ {
++ 	switch (reason) {
++@@ -315,6 +343,8 @@ static char *ath11k_mhi_op_callback_to_s
++ 		return "MHI_CB_FATAL_ERROR";
++ 	case MHI_CB_BW_REQ:
++ 		return "MHI_CB_BW_REQ";
+++	case MHI_CB_EE_SBL_MODE:
+++		return "MHI_CB_EE_SBL_MODE";
++ 	default:
++ 		return "UNKNOWN";
++ 	}
++@@ -336,27 +366,14 @@ static void ath11k_mhi_op_status_cb(stru
++ 		if (!(test_bit(ATH11K_FLAG_UNREGISTERING, &ab->dev_flags)))
++ 			queue_work(ab->workqueue_aux, &ab->reset_work);
++ 		break;
+++	case MHI_CB_EE_SBL_MODE:
+++		ath11k_mhi_qrtr_instance_set(mhi_cntrl);
+++		break;
++ 	default:
++ 		break;
++ 	}
++ }
++ 
++-static int ath11k_mhi_op_read_reg(struct mhi_controller *mhi_cntrl,
++-				  void __iomem *addr,
++-				  u32 *out)
++-{
++-	*out = readl(addr);
++-
++-	return 0;
++-}
++-
++-static void ath11k_mhi_op_write_reg(struct mhi_controller *mhi_cntrl,
++-				    void __iomem *addr,
++-				    u32 val)
++-{
++-	writel(val, addr);
++-}
++-
++ static int ath11k_mhi_read_addr_from_dt(struct mhi_controller *mhi_ctrl)
++ {
++ 	struct device_node *np;
++--- a/drivers/net/wireless/ath/ath11k/mhi.h
+++++ b/drivers/net/wireless/ath/ath11k/mhi.h
++@@ -16,6 +16,9 @@
++ #define MHICTRL					0x38
++ #define MHICTRL_RESET_MASK			0x2
++ 
+++#define BHI_ERRDBG2				0x38
+++#define QRTR_INSTANCE_MASK			GENMASK(7, 0)
+++
++ int ath11k_mhi_start(struct ath11k_pci *ar_pci);
++ void ath11k_mhi_stop(struct ath11k_pci *ar_pci);
++ int ath11k_mhi_register(struct ath11k_pci *ar_pci);
++--- a/drivers/net/wireless/ath/ath11k/pci.c
+++++ b/drivers/net/wireless/ath/ath11k/pci.c
++@@ -370,13 +370,20 @@ static void ath11k_pci_sw_reset(struct a
++ static void ath11k_pci_init_qmi_ce_config(struct ath11k_base *ab)
++ {
++ 	struct ath11k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg;
+++	struct ath11k_pci *ab_pci = ath11k_pci_priv(ab);
+++	struct pci_bus *bus = ab_pci->pdev->bus;
++ 
++ 	cfg->tgt_ce = ab->hw_params.target_ce_config;
++ 	cfg->tgt_ce_len = ab->hw_params.target_ce_count;
++ 
++ 	cfg->svc_to_ce_map = ab->hw_params.svc_to_ce_map;
++ 	cfg->svc_to_ce_map_len = ab->hw_params.svc_to_ce_map_len;
++-	ab->qmi.service_ins_id = ab->hw_params.qmi_service_ins_id;
+++
+++	if (ab->hw_rev == ATH11K_HW_QCN9074_HW10) {
+++		ab->qmi.service_ins_id = ab->hw_params.qmi_service_ins_id +
+++		(((pci_domain_nr(bus) & 0xF) << 4) | (bus->number & 0xF));
+++	} else
+++		ab->qmi.service_ins_id = ab->hw_params.qmi_service_ins_id;
++ 
++ 	ath11k_ce_get_shadow_config(ab, &cfg->shadow_reg_v2,
++ 				    &cfg->shadow_reg_v2_len);
+diff --git a/package/kernel/mac80211/patches/ath11k/900-ath11k-control-thermal-support-via-symbol.patch b/package/kernel/mac80211/patches/ath11k/900-ath11k-control-thermal-support-via-symbol.patch
+new file mode 100644
+index 0000000000..60720a721e
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/900-ath11k-control-thermal-support-via-symbol.patch
+@@ -0,0 +1,66 @@
++From 703d6551f71e7290619d6effe2a25a64e10538b7 Mon Sep 17 00:00:00 2001
++From: Robert Marko <robimarko@gmail.com>
++Date: Thu, 15 Dec 2022 12:20:52 +0100
++Subject: [PATCH] ath11k: control thermal support via symbol
++
++Currently, thermal support will get built if CONFIG_THERMAL is reachable,
++however this is not suitable for OpenWrt as with ALL_KMODS being set to y
++ATH11K_THERMAL wont get selected and so hwmon and thermal kmods wont get
++pulled in resulting in a build-failure.
++
++So, to avoid that, lets do what is already done for ath10k and add a
++config symbol into backports for enabling thermal support.
++
++Signed-off-by: Robert Marko <robimarko@gmail.com>
++---
++ drivers/net/wireless/ath/ath11k/Kconfig   | 7 +++++++
++ drivers/net/wireless/ath/ath11k/Makefile  | 2 +-
++ drivers/net/wireless/ath/ath11k/thermal.h | 2 +-
++ local-symbols                             | 1 +
++ 4 files changed, 10 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/Kconfig
+++++ b/drivers/net/wireless/ath/ath11k/Kconfig
++@@ -61,3 +61,10 @@ config ATH11K_SPECTRAL
++ 	  Enable ath11k spectral scan support
++ 
++ 	  Say Y to enable access to the FFT/spectral data via debugfs.
+++
+++config ATH11K_THERMAL
+++	bool "ath11k thermal sensors and throttling support"
+++	depends on ATH11K
+++	depends on THERMAL
+++	help
+++	  Enable ath11k thermal sensors and throttling support.
++--- a/drivers/net/wireless/ath/ath11k/Makefile
+++++ b/drivers/net/wireless/ath/ath11k/Makefile
++@@ -22,7 +22,7 @@ ath11k-y += core.o \
++ ath11k-$(CPTCFG_ATH11K_DEBUGFS) += debugfs.o debugfs_htt_stats.o debugfs_sta.o
++ ath11k-$(CPTCFG_NL80211_TESTMODE) += testmode.o
++ ath11k-$(CPTCFG_ATH11K_TRACING) += trace.o
++-ath11k-$(CONFIG_THERMAL) += thermal.o
+++ath11k-$(CPTCFG_ATH11K_THERMAL) += thermal.o
++ ath11k-$(CPTCFG_ATH11K_SPECTRAL) += spectral.o
++ ath11k-$(CONFIG_PM) += wow.o
++ 
++--- a/drivers/net/wireless/ath/ath11k/thermal.h
+++++ b/drivers/net/wireless/ath/ath11k/thermal.h
++@@ -25,7 +25,7 @@ struct ath11k_thermal {
++ 	int temperature;
++ };
++ 
++-#if IS_REACHABLE(CONFIG_THERMAL)
+++#if IS_REACHABLE(CPTCFG_ATH11K_THERMAL)
++ int ath11k_thermal_register(struct ath11k_base *sc);
++ void ath11k_thermal_unregister(struct ath11k_base *sc);
++ int ath11k_thermal_set_throttling(struct ath11k *ar, u32 throttle_state);
++--- a/local-symbols
+++++ b/local-symbols
++@@ -174,6 +174,7 @@ ATH11K_DEBUG=
++ ATH11K_DEBUGFS=
++ ATH11K_TRACING=
++ ATH11K_SPECTRAL=
+++ATH11K_THERMAL=
++ WLAN_VENDOR_ATMEL=
++ ATMEL=
++ PCI_ATMEL=
+diff --git a/package/kernel/mac80211/patches/ath11k/901-wifi-ath11k-pci-fix-compilation-in-5.16-and-older.patch b/package/kernel/mac80211/patches/ath11k/901-wifi-ath11k-pci-fix-compilation-in-5.16-and-older.patch
+new file mode 100644
+index 0000000000..7215656389
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/901-wifi-ath11k-pci-fix-compilation-in-5.16-and-older.patch
+@@ -0,0 +1,29 @@
++From 04178918e7f6b5f34dde81ec79ee8a1ccace3be3 Mon Sep 17 00:00:00 2001
++From: Robert Marko <robimarko@gmail.com>
++Date: Mon, 17 Oct 2022 11:45:03 +0200
++Subject: [PATCH] wifi: ath11k: pci: fix compilation in 5.16 and older
++
++Commit ("genirq/msi, treewide: Use a named struct for PCI/MSI attributes")
++changed the msi_desc structure a bit, however that is only available in
++kernels 5.17 and newer, so check for kernel version to allow compilation
++in 5.16 and older.
++
++Signed-off-by: Robert Marko <robimarko@gmail.com>
++---
++ drivers/net/wireless/ath/ath11k/pci.c | 4 ++++
++ 1 file changed, 4 insertions(+)
++
++--- a/drivers/net/wireless/ath/ath11k/pci.c
+++++ b/drivers/net/wireless/ath/ath11k/pci.c
++@@ -458,7 +458,11 @@ static int ath11k_pci_alloc_msi(struct a
++ 	pci_read_config_dword(pci_dev, pci_dev->msi_cap + PCI_MSI_ADDRESS_LO,
++ 			      &ab->pci.msi.addr_lo);
++ 
+++#if (LINUX_VERSION_CODE > KERNEL_VERSION(5, 17, 0))
++ 	if (msi_desc->pci.msi_attrib.is_64) {
+++#else
+++	if (msi_desc->msi_attrib.is_64) {
+++#endif
++ 		pci_read_config_dword(pci_dev, pci_dev->msi_cap + PCI_MSI_ADDRESS_HI,
++ 				      &ab->pci.msi.addr_hi);
++ 	} else {
+diff --git a/package/kernel/mac80211/patches/ath11k/902-ath11k-Disable-coldboot-calibration-for-IPQ8074.patch b/package/kernel/mac80211/patches/ath11k/902-ath11k-Disable-coldboot-calibration-for-IPQ8074.patch
+new file mode 100644
+index 0000000000..5454fa75e4
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/902-ath11k-Disable-coldboot-calibration-for-IPQ8074.patch
+@@ -0,0 +1,24 @@
++From dd3b9c59cfa1e9e0b73a575f4646be905691eaef Mon Sep 17 00:00:00 2001
++From: Robert Marko <robimarko@gmail.com>
++Date: Sat, 16 Oct 2021 19:34:10 +0200
++Subject: [PATCH 241/241] ath11k: Disable coldboot calibration for IPQ8074
++
++There is a bug with the remoteproc reset after coldboot calibration,
++so until that is resolved disabled it to allow using the radio.
++
++Signed-off-by: Robert Marko <robimarko@gmail.com>
++---
++ drivers/net/wireless/ath/ath11k/core.c | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/net/wireless/ath/ath11k/core.c
+++++ b/drivers/net/wireless/ath/ath11k/core.c
++@@ -86,7 +86,7 @@ static const struct ath11k_hw_params ath
++ 		.supports_shadow_regs = false,
++ 		.idle_ps = false,
++ 		.supports_sta_ps = false,
++-		.cold_boot_calib = true,
+++		.cold_boot_calib = false,
++ 		.cbcal_restart_fw = true,
++ 		.fw_mem_mode = 0,
++ 		.num_vdevs = 16 + 1,
+diff --git a/package/kernel/mac80211/patches/ath11k/903-ath11k-support-setting-FW-memory-mode-via-DT.patch b/package/kernel/mac80211/patches/ath11k/903-ath11k-support-setting-FW-memory-mode-via-DT.patch
+new file mode 100644
+index 0000000000..22c2493ca9
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/903-ath11k-support-setting-FW-memory-mode-via-DT.patch
+@@ -0,0 +1,74 @@
++From fb1c40c225cbc413d82c872dd8c8af3469b2b921 Mon Sep 17 00:00:00 2001
++From: Robert Marko <robimarko@gmail.com>
++Date: Fri, 16 Dec 2022 17:17:52 +0100
++Subject: [PATCH] ath11k: support setting FW memory mode via DT
++
++ath11k is really memory intensive for devices with less that 1GB of RAM,
++so lets allow saving a significant amount of memory by setting the FW to
++Mode-1 via DTS for devices that need it.
++
++However the drawback is reduced number of VDEV-s and peers which is a
++reasonable tradeoff.
++
++Mode-2 allows for further reduction, but it has further restrictions.
++
++While we are here, lets add a print to be able to easily determine what
++FW memory mode is being used.
++
++Signed-off-by: Robert Marko <robimarko@gmail.com>
++---
++ drivers/net/wireless/ath/ath11k/core.c | 28 ++++++++++++++++++++++++--
++ 1 file changed, 26 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/core.c
+++++ b/drivers/net/wireless/ath/ath11k/core.c
++@@ -36,7 +36,7 @@ bool ath11k_ftm_mode;
++ module_param_named(ftm_mode, ath11k_ftm_mode, bool, 0444);
++ MODULE_PARM_DESC(ftm_mode, "Boots up in factory test mode");
++ 
++-static const struct ath11k_hw_params ath11k_hw_params[] = {
+++static struct ath11k_hw_params ath11k_hw_params[] = {
++ 	{
++ 		.hw_rev = ATH11K_HW_IPQ8074,
++ 		.name = "ipq8074 hw2.0",
++@@ -1953,7 +1953,8 @@ static void ath11k_core_reset(struct wor
++ static int ath11k_init_hw_params(struct ath11k_base *ab)
++ {
++ 	const struct ath11k_hw_params *hw_params = NULL;
++-	int i;
+++	u32 fw_mem_mode;
+++	int i, ret;
++ 
++ 	for (i = 0; i < ARRAY_SIZE(ath11k_hw_params); i++) {
++ 		hw_params = &ath11k_hw_params[i];
++@@ -1969,7 +1970,30 @@ static int ath11k_init_hw_params(struct
++ 
++ 	ab->hw_params = *hw_params;
++ 
+++	ret = of_property_read_u32(ab->dev->of_node,
+++				   "qcom,ath11k-fw-memory-mode",
+++				   &fw_mem_mode);
+++	if (!ret) {
+++		if (fw_mem_mode == 0) {
+++			ab->hw_params.fw_mem_mode = 0;
+++			ab->hw_params.num_vdevs = 16 + 1;
+++			ab->hw_params.num_peers = 512;
+++		}
+++		else if (fw_mem_mode == 1) {
+++			ab->hw_params.fw_mem_mode = 1;
+++			ab->hw_params.num_vdevs = 8;
+++			ab->hw_params.num_peers = 128;
+++		} else if (fw_mem_mode == 2) {
+++			ab->hw_params.fw_mem_mode = 2;
+++			ab->hw_params.num_vdevs = 8;
+++			ab->hw_params.num_peers = 128;
+++			ab->hw_params.cold_boot_calib = false;
+++		} else
+++			ath11k_info(ab, "Unsupported FW memory mode: %u\n", fw_mem_mode);
+++	}
+++
++ 	ath11k_info(ab, "%s\n", ab->hw_params.name);
+++	ath11k_info(ab, "FW memory mode: %d\n", ab->hw_params.fw_mem_mode);
++ 
++ 	return 0;
++ }
+diff --git a/package/kernel/mac80211/patches/ath11k/905-ath11k-remove-intersection-support-for-regulatory-ru.patch b/package/kernel/mac80211/patches/ath11k/905-ath11k-remove-intersection-support-for-regulatory-ru.patch
+new file mode 100644
+index 0000000000..b0ceb00ba0
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath11k/905-ath11k-remove-intersection-support-for-regulatory-ru.patch
+@@ -0,0 +1,317 @@
++From abdd0985a36189ef2cc0e393b027276e86137ace Mon Sep 17 00:00:00 2001
++From: Aditya Kumar Singh <quic_adisi@quicinc.com>
++Date: Tue, 11 Apr 2023 20:08:49 +0200
++Subject: [PATCH] ath11k: remove intersection support for regulatory rules
++
++Currently, regulatory rules from new country settings is intersected with
++rules from default country settings(during initialisation) in order to prevent
++users to bypass their default country settings such as power limits, channel
++flags, etc.
++
++However, the country setting in the BDF will take higher higher precendence
++and FW will protect it. Therefore, there is no need to handle intersection
++on the driver side now.
++
++Remove regulatory rules intersection logic support.
++
++Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
++---
++ drivers/net/wireless/ath/ath11k/reg.c | 168 +++-----------------------
++ drivers/net/wireless/ath/ath11k/reg.h |   2 +-
++ drivers/net/wireless/ath/ath11k/wmi.c |  24 +---
++ 3 files changed, 16 insertions(+), 178 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath11k/reg.c
+++++ b/drivers/net/wireless/ath/ath11k/reg.c
++@@ -352,129 +352,6 @@ static u32 ath11k_map_fw_reg_flags(u16 r
++ 	return flags;
++ }
++ 
++-static bool
++-ath11k_reg_can_intersect(struct ieee80211_reg_rule *rule1,
++-			 struct ieee80211_reg_rule *rule2)
++-{
++-	u32 start_freq1, end_freq1;
++-	u32 start_freq2, end_freq2;
++-
++-	start_freq1 = rule1->freq_range.start_freq_khz;
++-	start_freq2 = rule2->freq_range.start_freq_khz;
++-
++-	end_freq1 = rule1->freq_range.end_freq_khz;
++-	end_freq2 = rule2->freq_range.end_freq_khz;
++-
++-	if ((start_freq1 >= start_freq2 &&
++-	     start_freq1 < end_freq2) ||
++-	    (start_freq2 > start_freq1 &&
++-	     start_freq2 < end_freq1))
++-		return true;
++-
++-	/* TODO: Should we restrict intersection feasibility
++-	 *  based on min bandwidth of the intersected region also,
++-	 *  say the intersected rule should have a  min bandwidth
++-	 * of 20MHz?
++-	 */
++-
++-	return false;
++-}
++-
++-static void ath11k_reg_intersect_rules(struct ieee80211_reg_rule *rule1,
++-				       struct ieee80211_reg_rule *rule2,
++-				       struct ieee80211_reg_rule *new_rule)
++-{
++-	u32 start_freq1, end_freq1;
++-	u32 start_freq2, end_freq2;
++-	u32 freq_diff, max_bw;
++-
++-	start_freq1 = rule1->freq_range.start_freq_khz;
++-	start_freq2 = rule2->freq_range.start_freq_khz;
++-
++-	end_freq1 = rule1->freq_range.end_freq_khz;
++-	end_freq2 = rule2->freq_range.end_freq_khz;
++-
++-	new_rule->freq_range.start_freq_khz = max_t(u32, start_freq1,
++-						    start_freq2);
++-	new_rule->freq_range.end_freq_khz = min_t(u32, end_freq1, end_freq2);
++-
++-	freq_diff = new_rule->freq_range.end_freq_khz -
++-			new_rule->freq_range.start_freq_khz;
++-	max_bw = min_t(u32, rule1->freq_range.max_bandwidth_khz,
++-		       rule2->freq_range.max_bandwidth_khz);
++-	new_rule->freq_range.max_bandwidth_khz = min_t(u32, max_bw, freq_diff);
++-
++-	new_rule->power_rule.max_antenna_gain =
++-		min_t(u32, rule1->power_rule.max_antenna_gain,
++-		      rule2->power_rule.max_antenna_gain);
++-
++-	new_rule->power_rule.max_eirp = min_t(u32, rule1->power_rule.max_eirp,
++-					      rule2->power_rule.max_eirp);
++-
++-	/* Use the flags of both the rules */
++-	new_rule->flags = rule1->flags | rule2->flags;
++-
++-	/* To be safe, lts use the max cac timeout of both rules */
++-	new_rule->dfs_cac_ms = max_t(u32, rule1->dfs_cac_ms,
++-				     rule2->dfs_cac_ms);
++-}
++-
++-static struct ieee80211_regdomain *
++-ath11k_regd_intersect(struct ieee80211_regdomain *default_regd,
++-		      struct ieee80211_regdomain *curr_regd)
++-{
++-	u8 num_old_regd_rules, num_curr_regd_rules, num_new_regd_rules;
++-	struct ieee80211_reg_rule *old_rule, *curr_rule, *new_rule;
++-	struct ieee80211_regdomain *new_regd = NULL;
++-	u8 i, j, k;
++-
++-	num_old_regd_rules = default_regd->n_reg_rules;
++-	num_curr_regd_rules = curr_regd->n_reg_rules;
++-	num_new_regd_rules = 0;
++-
++-	/* Find the number of intersecting rules to allocate new regd memory */
++-	for (i = 0; i < num_old_regd_rules; i++) {
++-		old_rule = default_regd->reg_rules + i;
++-		for (j = 0; j < num_curr_regd_rules; j++) {
++-			curr_rule = curr_regd->reg_rules + j;
++-
++-			if (ath11k_reg_can_intersect(old_rule, curr_rule))
++-				num_new_regd_rules++;
++-		}
++-	}
++-
++-	if (!num_new_regd_rules)
++-		return NULL;
++-
++-	new_regd = kzalloc(sizeof(*new_regd) + (num_new_regd_rules *
++-			sizeof(struct ieee80211_reg_rule)),
++-			GFP_ATOMIC);
++-
++-	if (!new_regd)
++-		return NULL;
++-
++-	/* We set the new country and dfs region directly and only trim
++-	 * the freq, power, antenna gain by intersecting with the
++-	 * default regdomain. Also MAX of the dfs cac timeout is selected.
++-	 */
++-	new_regd->n_reg_rules = num_new_regd_rules;
++-	memcpy(new_regd->alpha2, curr_regd->alpha2, sizeof(new_regd->alpha2));
++-	new_regd->dfs_region = curr_regd->dfs_region;
++-	new_rule = new_regd->reg_rules;
++-
++-	for (i = 0, k = 0; i < num_old_regd_rules; i++) {
++-		old_rule = default_regd->reg_rules + i;
++-		for (j = 0; j < num_curr_regd_rules; j++) {
++-			curr_rule = curr_regd->reg_rules + j;
++-
++-			if (ath11k_reg_can_intersect(old_rule, curr_rule))
++-				ath11k_reg_intersect_rules(old_rule, curr_rule,
++-							   (new_rule + k++));
++-		}
++-	}
++-	return new_regd;
++-}
++-
++ static const char *
++ ath11k_reg_get_regdom_str(enum nl80211_dfs_regions dfs_region)
++ {
++@@ -609,9 +486,9 @@ ath11k_reg_update_weather_radar_band(str
++ 
++ struct ieee80211_regdomain *
++ ath11k_reg_build_regd(struct ath11k_base *ab,
++-		      struct cur_regulatory_info *reg_info, bool intersect)
+++		      struct cur_regulatory_info *reg_info)
++ {
++-	struct ieee80211_regdomain *tmp_regd, *default_regd, *new_regd = NULL;
+++	struct ieee80211_regdomain *new_regd = NULL;
++ 	struct cur_reg_rule *reg_rule;
++ 	u8 i = 0, j = 0, k = 0;
++ 	u8 num_rules;
++@@ -628,26 +505,26 @@ ath11k_reg_build_regd(struct ath11k_base
++ 		num_rules += reg_info->num_6ghz_rules_ap[WMI_REG_INDOOR_AP];
++ 
++ 	if (!num_rules)
++-		goto ret;
+++		return new_regd;
++ 
++ 	/* Add max additional rules to accommodate weather radar band */
++ 	if (reg_info->dfs_region == ATH11K_DFS_REG_ETSI)
++ 		num_rules += 2;
++ 
++-	tmp_regd =  kzalloc(sizeof(*tmp_regd) +
+++	new_regd =  kzalloc(sizeof(*new_regd) +
++ 			(num_rules * sizeof(struct ieee80211_reg_rule)),
++ 			GFP_ATOMIC);
++-	if (!tmp_regd)
++-		goto ret;
+++	if (!new_regd)
+++		return new_regd;
++ 
++-	memcpy(tmp_regd->alpha2, reg_info->alpha2, REG_ALPHA2_LEN + 1);
+++	memcpy(new_regd->alpha2, reg_info->alpha2, REG_ALPHA2_LEN + 1);
++ 	memcpy(alpha2, reg_info->alpha2, REG_ALPHA2_LEN + 1);
++ 	alpha2[2] = '\0';
++-	tmp_regd->dfs_region = ath11k_map_fw_dfs_region(reg_info->dfs_region);
+++	new_regd->dfs_region = ath11k_map_fw_dfs_region(reg_info->dfs_region);
++ 
++ 	ath11k_dbg(ab, ATH11K_DBG_REG,
++ 		   "Country %s, CFG Regdomain %s FW Regdomain %d, num_reg_rules %d\n",
++-		   alpha2, ath11k_reg_get_regdom_str(tmp_regd->dfs_region),
+++		   alpha2, ath11k_reg_get_regdom_str(new_regd->dfs_region),
++ 		   reg_info->dfs_region, num_rules);
++ 	/* Update reg_rules[] below. Firmware is expected to
++ 	 * send these rules in order(2 GHz rules first and then 5 GHz)
++@@ -686,7 +563,7 @@ ath11k_reg_build_regd(struct ath11k_base
++ 
++ 		flags |= ath11k_map_fw_reg_flags(reg_rule->flags);
++ 
++-		ath11k_reg_update_rule(tmp_regd->reg_rules + i,
+++		ath11k_reg_update_rule(new_regd->reg_rules + i,
++ 				       reg_rule->start_freq,
++ 				       reg_rule->end_freq, max_bw,
++ 				       reg_rule->ant_gain, reg_rule->reg_power,
++@@ -701,7 +578,7 @@ ath11k_reg_build_regd(struct ath11k_base
++ 		    reg_info->dfs_region == ATH11K_DFS_REG_ETSI &&
++ 		    (reg_rule->end_freq > ETSI_WEATHER_RADAR_BAND_LOW &&
++ 		    reg_rule->start_freq < ETSI_WEATHER_RADAR_BAND_HIGH)){
++-			ath11k_reg_update_weather_radar_band(ab, tmp_regd,
+++			ath11k_reg_update_weather_radar_band(ab, new_regd,
++ 							     reg_rule, &i,
++ 							     flags, max_bw);
++ 			continue;
++@@ -712,37 +589,20 @@ ath11k_reg_build_regd(struct ath11k_base
++ 				   "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d) (%d, %d)\n",
++ 				   i + 1, reg_rule->start_freq, reg_rule->end_freq,
++ 				   max_bw, reg_rule->ant_gain, reg_rule->reg_power,
++-				   tmp_regd->reg_rules[i].dfs_cac_ms, flags,
+++				   new_regd->reg_rules[i].dfs_cac_ms, flags,
++ 				   reg_rule->psd_flag, reg_rule->psd_eirp);
++ 		} else {
++ 			ath11k_dbg(ab, ATH11K_DBG_REG,
++ 				   "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d)\n",
++ 				   i + 1, reg_rule->start_freq, reg_rule->end_freq,
++ 				   max_bw, reg_rule->ant_gain, reg_rule->reg_power,
++-				   tmp_regd->reg_rules[i].dfs_cac_ms,
+++				   new_regd->reg_rules[i].dfs_cac_ms,
++ 				   flags);
++ 		}
++ 	}
++ 
++-	tmp_regd->n_reg_rules = i;
++-
++-	if (intersect) {
++-		default_regd = ab->default_regd[reg_info->phy_id];
++-
++-		/* Get a new regd by intersecting the received regd with
++-		 * our default regd.
++-		 */
++-		new_regd = ath11k_regd_intersect(default_regd, tmp_regd);
++-		kfree(tmp_regd);
++-		if (!new_regd) {
++-			ath11k_warn(ab, "Unable to create intersected regdomain\n");
++-			goto ret;
++-		}
++-	} else {
++-		new_regd = tmp_regd;
++-	}
+++	new_regd->n_reg_rules = i;
++ 
++-ret:
++ 	return new_regd;
++ }
++ 
++--- a/drivers/net/wireless/ath/ath11k/reg.h
+++++ b/drivers/net/wireless/ath/ath11k/reg.h
++@@ -30,7 +30,7 @@ void ath11k_reg_free(struct ath11k_base
++ void ath11k_regd_update_work(struct work_struct *work);
++ struct ieee80211_regdomain *
++ ath11k_reg_build_regd(struct ath11k_base *ab,
++-		      struct cur_regulatory_info *reg_info, bool intersect);
+++		      struct cur_regulatory_info *reg_info);
++ int ath11k_regd_update(struct ath11k *ar);
++ int ath11k_reg_update_chan_list(struct ath11k *ar, bool wait);
++ #endif
++--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++++ b/drivers/net/wireless/ath/ath11k/wmi.c
++@@ -6996,24 +6996,12 @@ static void ath11k_wmi_htc_tx_complete(s
++ 		wake_up(&wmi->tx_ce_desc_wq);
++ }
++ 
++-static bool ath11k_reg_is_world_alpha(char *alpha)
++-{
++-	if (alpha[0] == '0' && alpha[1] == '0')
++-		return true;
++-
++-	if (alpha[0] == 'n' && alpha[1] == 'a')
++-		return true;
++-
++-	return false;
++-}
++-
++ static int ath11k_reg_chan_list_event(struct ath11k_base *ab,
++ 				      struct sk_buff *skb,
++ 				      enum wmi_reg_chan_list_cmd_type id)
++ {
++ 	struct cur_regulatory_info *reg_info = NULL;
++ 	struct ieee80211_regdomain *regd = NULL;
++-	bool intersect = false;
++ 	int ret = 0, pdev_idx, i, j;
++ 	struct ath11k *ar;
++ 
++@@ -7075,17 +7063,7 @@ static int ath11k_reg_chan_list_event(st
++ 		    (char *)reg_info->alpha2, 2))
++ 		goto mem_free;
++ 
++-	/* Intersect new rules with default regd if a new country setting was
++-	 * requested, i.e a default regd was already set during initialization
++-	 * and the regd coming from this event has a valid country info.
++-	 */
++-	if (ab->default_regd[pdev_idx] &&
++-	    !ath11k_reg_is_world_alpha((char *)
++-		ab->default_regd[pdev_idx]->alpha2) &&
++-	    !ath11k_reg_is_world_alpha((char *)reg_info->alpha2))
++-		intersect = true;
++-
++-	regd = ath11k_reg_build_regd(ab, reg_info, intersect);
+++	regd = ath11k_reg_build_regd(ab, reg_info);
++ 	if (!regd) {
++ 		ath11k_warn(ab, "failed to build regd from reg_info\n");
++ 		goto fallback;
+diff --git a/package/kernel/mac80211/patches/ath5k/201-ath5k-WAR-for-AR71xx-PCI-bug.patch b/package/kernel/mac80211/patches/ath5k/201-ath5k-WAR-for-AR71xx-PCI-bug.patch
+new file mode 100644
+index 0000000000..4fc97dfaec
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath5k/201-ath5k-WAR-for-AR71xx-PCI-bug.patch
+@@ -0,0 +1,38 @@
++--- a/drivers/net/wireless/ath/ath5k/initvals.c
+++++ b/drivers/net/wireless/ath/ath5k/initvals.c
++@@ -62,8 +62,14 @@ static const struct ath5k_ini ar5210_ini
++ 	{ AR5K_IMR,		0 },
++ 	{ AR5K_IER,		AR5K_IER_DISABLE },
++ 	{ AR5K_BSR,		0, AR5K_INI_READ },
+++#if !defined(CONFIG_ATHEROS_AR71XX) && !defined(CONFIG_ATH79)
++ 	{ AR5K_TXCFG,		AR5K_DMASIZE_128B },
++ 	{ AR5K_RXCFG,		AR5K_DMASIZE_128B },
+++#else
+++	/* WAR for AR71xx PCI bug */
+++	{ AR5K_TXCFG,		AR5K_DMASIZE_128B },
+++	{ AR5K_RXCFG,		AR5K_DMASIZE_4B },
+++#endif
++ 	{ AR5K_CFG,		AR5K_INIT_CFG },
++ 	{ AR5K_TOPS,		8 },
++ 	{ AR5K_RXNOFRM,		8 },
++--- a/drivers/net/wireless/ath/ath5k/dma.c
+++++ b/drivers/net/wireless/ath/ath5k/dma.c
++@@ -854,10 +854,18 @@ ath5k_hw_dma_init(struct ath5k_hw *ah)
++ 	 * guess we can tweak it and see how it goes ;-)
++ 	 */
++ 	if (ah->ah_version != AR5K_AR5210) {
+++#if !defined(CONFIG_ATHEROS_AR71XX) && !defined(CONFIG_ATH79)
++ 		AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG,
++ 			AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_128B);
++ 		AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG,
++ 			AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_128B);
+++#else
+++		/* WAR for AR71xx PCI bug */
+++		AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG,
+++			AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_128B);
+++		AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG,
+++			AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_4B);
+++#endif
++ 	}
++ 
++ 	/* Pre-enable interrupts on 5211/5212*/
+diff --git a/package/kernel/mac80211/patches/ath5k/411-ath5k_allow_adhoc_and_ap.patch b/package/kernel/mac80211/patches/ath5k/411-ath5k_allow_adhoc_and_ap.patch
+new file mode 100644
+index 0000000000..1df4aab57e
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath5k/411-ath5k_allow_adhoc_and_ap.patch
+@@ -0,0 +1,46 @@
++--- a/drivers/net/wireless/ath/ath5k/mac80211-ops.c
+++++ b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
++@@ -86,13 +86,8 @@ ath5k_add_interface(struct ieee80211_hw
++ 		goto end;
++ 	}
++ 
++-	/* Don't allow other interfaces if one ad-hoc is configured.
++-	 * TODO: Fix the problems with ad-hoc and multiple other interfaces.
++-	 * We would need to operate the HW in ad-hoc mode to allow TSF updates
++-	 * for the IBSS, but this breaks with additional AP or STA interfaces
++-	 * at the moment. */
++-	if (ah->num_adhoc_vifs ||
++-	    (ah->nvifs && vif->type == NL80211_IFTYPE_ADHOC)) {
+++	/* Don't allow more than one ad-hoc interface */
+++	if (ah->num_adhoc_vifs && vif->type == NL80211_IFTYPE_ADHOC) {
++ 		ATH5K_ERR(ah, "Only one single ad-hoc interface is allowed.\n");
++ 		ret = -ELNRNG;
++ 		goto end;
++--- a/drivers/net/wireless/ath/ath5k/base.c
+++++ b/drivers/net/wireless/ath/ath5k/base.c
++@@ -2009,7 +2009,7 @@ ath5k_beacon_send(struct ath5k_hw *ah)
++ 	}
++ 
++ 	if ((ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs +
++-			ah->num_mesh_vifs > 1) ||
+++			ah->num_adhoc_vifs + ah->num_mesh_vifs > 1) ||
++ 			ah->opmode == NL80211_IFTYPE_MESH_POINT) {
++ 		u64 tsf = ath5k_hw_get_tsf64(ah);
++ 		u32 tsftu = TSF_TO_TU(tsf);
++@@ -2095,7 +2095,7 @@ ath5k_beacon_update_timers(struct ath5k_
++ 
++ 	intval = ah->bintval & AR5K_BEACON_PERIOD;
++ 	if (ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs
++-		+ ah->num_mesh_vifs > 1) {
+++		+ ah->num_adhoc_vifs + ah->num_mesh_vifs > 1) {
++ 		intval /= ATH_BCBUF;	/* staggered multi-bss beacons */
++ 		if (intval < 15)
++ 			ATH5K_WARN(ah, "intval %u is too low, min 15\n",
++@@ -2561,6 +2561,7 @@ static const struct ieee80211_iface_limi
++ 				 BIT(NL80211_IFTYPE_MESH_POINT) |
++ #endif
++ 				 BIT(NL80211_IFTYPE_AP) },
+++	{ .max = 1,	.types = BIT(NL80211_IFTYPE_ADHOC) },
++ };
++ 
++ static const struct ieee80211_iface_combination if_comb = {
+diff --git a/package/kernel/mac80211/patches/ath5k/420-ath5k_disable_fast_cc.patch b/package/kernel/mac80211/patches/ath5k/420-ath5k_disable_fast_cc.patch
+new file mode 100644
+index 0000000000..414f49508f
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath5k/420-ath5k_disable_fast_cc.patch
+@@ -0,0 +1,18 @@
++--- a/drivers/net/wireless/ath/ath5k/reset.c
+++++ b/drivers/net/wireless/ath/ath5k/reset.c
++@@ -1154,6 +1154,7 @@ ath5k_hw_reset(struct ath5k_hw *ah, enum
++ 	tsf_lo = 0;
++ 	mode = 0;
++ 
+++#if 0
++ 	/*
++ 	 * Sanity check for fast flag
++ 	 * Fast channel change only available
++@@ -1161,6 +1162,7 @@ ath5k_hw_reset(struct ath5k_hw *ah, enum
++ 	 */
++ 	if (fast && (ah->ah_radio != AR5K_RF2413) &&
++ 	(ah->ah_radio != AR5K_RF5413))
+++#endif
++ 		fast = false;
++ 
++ 	/* Disable sleep clock operation
+diff --git a/package/kernel/mac80211/patches/ath5k/430-add_ath5k_platform.patch b/package/kernel/mac80211/patches/ath5k/430-add_ath5k_platform.patch
+new file mode 100644
+index 0000000000..b213e2a819
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath5k/430-add_ath5k_platform.patch
+@@ -0,0 +1,33 @@
++--- /dev/null
+++++ b/include/linux/ath5k_platform.h
++@@ -0,0 +1,30 @@
+++/*
+++ * Copyright (c) 2008 Atheros Communications Inc.
+++ * Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org>
+++ * Copyright (c) 2009 Imre Kaloz <kaloz@openwrt.org>
+++ * Copyright (c) 2010 Daniel Golle <daniel.golle@gmail.com>
+++ *
+++ * Permission to use, copy, modify, and/or distribute this software for any
+++ * purpose with or without fee is hereby granted, provided that the above
+++ * copyright notice and this permission notice appear in all copies.
+++ *
+++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+++ */
+++
+++#ifndef _LINUX_ATH5K_PLATFORM_H
+++#define _LINUX_ATH5K_PLATFORM_H
+++
+++#define ATH5K_PLAT_EEP_MAX_WORDS	2048
+++
+++struct ath5k_platform_data {
+++	u16 *eeprom_data;
+++	u8 *macaddr;
+++};
+++
+++#endif /* _LINUX_ATH5K_PLATFORM_H */
+diff --git a/package/kernel/mac80211/patches/ath5k/432-ath5k_add_pciids.patch b/package/kernel/mac80211/patches/ath5k/432-ath5k_add_pciids.patch
+new file mode 100644
+index 0000000000..bd0e6707a5
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath5k/432-ath5k_add_pciids.patch
+@@ -0,0 +1,11 @@
++--- a/drivers/net/wireless/ath/ath5k/pci.c
+++++ b/drivers/net/wireless/ath/ath5k/pci.c
++@@ -47,6 +47,8 @@ static const struct pci_device_id ath5k_
++ 	{ PCI_VDEVICE(ATHEROS, 0x001b) }, /* 5413 Eagle */
++ 	{ PCI_VDEVICE(ATHEROS, 0x001c) }, /* PCI-E cards */
++ 	{ PCI_VDEVICE(ATHEROS, 0x001d) }, /* 2417 Nala */
+++	{ PCI_VDEVICE(ATHEROS, 0xff16) }, /* 2413,2414 sx76x on lantiq_danube */
+++	{ PCI_VDEVICE(ATHEROS, 0xff1a) }, /* 2417 arv45xx on lantiq_danube */
++ 	{ PCI_VDEVICE(ATHEROS, 0xff1b) }, /* AR5BXB63 */
++ 	{ 0 }
++ };
+diff --git a/package/kernel/mac80211/patches/ath5k/440-ath5k_channel_bw_debugfs.patch b/package/kernel/mac80211/patches/ath5k/440-ath5k_channel_bw_debugfs.patch
+new file mode 100644
+index 0000000000..a63f0c881b
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath5k/440-ath5k_channel_bw_debugfs.patch
+@@ -0,0 +1,142 @@
++This adds a bwmode debugfs file which can be used to set alternate
++channel operating bandwidths.  Only tested with AR5413 and only at
++5 and 20 mhz channels.
++
++Signed-off-by: Pat Erley <pat-lkml at erley.org>
++---
++Other devices will need to be added to the switch in  write_file_bwmode
++
++drivers/net/wireless/ath/ath5k/debug.c |   86 ++++++++++++++++++++++++++++++++
++ 1 files changed, 86 insertions(+), 0 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath5k/debug.c
+++++ b/drivers/net/wireless/ath/ath5k/debug.c
++@@ -803,6 +803,97 @@ static const struct file_operations fops
++ 	.llseek = default_llseek,
++ };
++ 
+++/* debugfs: bwmode */
+++
+++static ssize_t read_file_bwmode(struct file *file, char __user *user_buf,
+++				   size_t count, loff_t *ppos)
+++{
+++	struct ath5k_hw *ah = file->private_data;
+++	char buf[15];
+++	unsigned int len = 0;
+++
+++	int cur_ah_bwmode = ah->ah_bwmode_debug;
+++
+++#define print_selected(MODE, LABEL) \
+++	if (cur_ah_bwmode == MODE) \
+++		len += snprintf(buf+len, sizeof(buf)-len, "[%s]", LABEL); \
+++	else \
+++		len += snprintf(buf+len, sizeof(buf)-len, "%s", LABEL); \
+++	len += snprintf(buf+len, sizeof(buf)-len, " ");
+++
+++	print_selected(AR5K_BWMODE_5MHZ, "5");
+++	print_selected(AR5K_BWMODE_10MHZ, "10");
+++	print_selected(AR5K_BWMODE_DEFAULT, "20");
+++	print_selected(AR5K_BWMODE_40MHZ, "40");
+++#undef print_selected
+++
+++	len += snprintf(buf+len, sizeof(buf)-len, "\n");
+++
+++	return simple_read_from_buffer(user_buf, count, ppos, buf, len);
+++}
+++
+++static ssize_t write_file_bwmode(struct file *file,
+++				 const char __user *userbuf,
+++				 size_t count, loff_t *ppos)
+++{
+++	struct ath5k_hw *ah = file->private_data;
+++	char buf[3];
+++	int bw = 20;
+++	int tobwmode = AR5K_BWMODE_DEFAULT;
+++
+++	if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
+++		return -EFAULT;
+++
+++	/* TODO: Add check for active interface */
+++
+++	if(strncmp(buf, "5", 1) == 0 ) {
+++		tobwmode = AR5K_BWMODE_5MHZ;
+++		bw = 5;
+++	} else if ( strncmp(buf, "10", 2) == 0 ) {
+++		tobwmode = AR5K_BWMODE_10MHZ;
+++		bw = 10;
+++	} else if ( strncmp(buf, "20", 2) == 0 ) {
+++		tobwmode = AR5K_BWMODE_DEFAULT;
+++		bw = 20;
+++	} else if ( strncmp(buf, "40", 2) == 0 ) {
+++		tobwmode = AR5K_BWMODE_40MHZ;
+++		bw = 40;
+++	} else
+++		return -EINVAL;
+++
+++	ATH5K_INFO(ah, "Changing to %imhz channel width[%i]\n",
+++		bw, tobwmode);
+++
+++	switch (ah->ah_radio) {
+++	/* TODO: only define radios that actually support 5/10mhz channels */
+++	case AR5K_RF5413:
+++	case AR5K_RF5110:
+++	case AR5K_RF5111:
+++	case AR5K_RF5112:
+++	case AR5K_RF2413:
+++	case AR5K_RF2316:
+++	case AR5K_RF2317:
+++	case AR5K_RF2425:
+++		if(ah->ah_bwmode_debug != tobwmode) {
+++			mutex_lock(&ah->lock);
+++			ah->ah_bwmode = tobwmode;
+++			ah->ah_bwmode_debug = tobwmode;
+++			mutex_unlock(&ah->lock);
+++		}
+++		break;
+++	default:
+++		return -EOPNOTSUPP;
+++	}
+++	return count;
+++}
+++
+++static const struct file_operations fops_bwmode = {
+++	.read = read_file_bwmode,
+++	.write = write_file_bwmode,
+++	.open = simple_open,
+++	.owner = THIS_MODULE,
+++	.llseek = default_llseek,
+++};
++ 
++ /* debugfs: queues etc */
++ 
++@@ -997,6 +1088,8 @@ ath5k_debug_init_device(struct ath5k_hw
++ 	debugfs_create_file("queue", 0600, phydir, ah, &fops_queue);
++ 	debugfs_create_bool("32khz_clock", 0600, phydir,
++ 			    &ah->ah_use_32khz_clock);
+++	debugfs_create_file("bwmode", S_IWUSR | S_IRUSR, phydir, ah,
+++			    &fops_bwmode);
++ }
++ 
++ /* functions used in other places */
++--- a/drivers/net/wireless/ath/ath5k/ath5k.h
+++++ b/drivers/net/wireless/ath/ath5k/ath5k.h
++@@ -1372,6 +1372,7 @@ struct ath5k_hw {
++ 	u8			ah_coverage_class;
++ 	bool			ah_ack_bitrate_high;
++ 	u8			ah_bwmode;
+++	u8			ah_bwmode_debug;
++ 	bool			ah_short_slot;
++ 
++ 	/* Antenna Control */
++--- a/drivers/net/wireless/ath/ath5k/base.c
+++++ b/drivers/net/wireless/ath/ath5k/base.c
++@@ -465,6 +465,9 @@ ath5k_chan_set(struct ath5k_hw *ah, stru
++ 		return -EINVAL;
++ 	}
++ 
+++	if (ah->ah_bwmode_debug != AR5K_BWMODE_DEFAULT)
+++		ah->ah_bwmode = ah->ah_bwmode_debug;
+++
++ 	/*
++ 	 * To switch channels clear any pending DMA operations;
++ 	 * wait long enough for the RX fifo to drain, reset the
+diff --git a/package/kernel/mac80211/patches/ath9k/350-ath9k_hw-reset-AHB-WMAC-interface-on-AR91xx.patch b/package/kernel/mac80211/patches/ath9k/350-ath9k_hw-reset-AHB-WMAC-interface-on-AR91xx.patch
+new file mode 100644
+index 0000000000..3a0171d4a2
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/350-ath9k_hw-reset-AHB-WMAC-interface-on-AR91xx.patch
+@@ -0,0 +1,25 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sat, 9 Jul 2016 15:25:24 +0200
++Subject: [PATCH] ath9k_hw: reset AHB-WMAC interface on AR91xx
++
++Should fix a few stability issues
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/net/wireless/ath/ath9k/hw.c
+++++ b/drivers/net/wireless/ath/ath9k/hw.c
++@@ -1434,8 +1434,12 @@ static bool ath9k_hw_set_reset(struct at
++ 	if (!AR_SREV_9100(ah))
++ 		REG_WRITE(ah, AR_RC, 0);
++ 
++-	if (AR_SREV_9100(ah))
+++	if (AR_SREV_9100(ah)) {
+++		/* Reset the AHB-WMAC interface */
+++		if (ah->external_reset)
+++			ah->external_reset();
++ 		udelay(50);
+++	}
++ 
++ 	return true;
++ }
+diff --git a/package/kernel/mac80211/patches/ath9k/351-ath9k_hw-issue-external-reset-for-QCA955x.patch b/package/kernel/mac80211/patches/ath9k/351-ath9k_hw-issue-external-reset-for-QCA955x.patch
+new file mode 100644
+index 0000000000..53b7ba08bc
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/351-ath9k_hw-issue-external-reset-for-QCA955x.patch
+@@ -0,0 +1,129 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sat, 9 Jul 2016 15:26:44 +0200
++Subject: [PATCH] ath9k_hw: issue external reset for QCA955x
++
++The RTC interface on the SoC needs to be reset along with the rest of
++the WMAC.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/net/wireless/ath/ath9k/hw.c
+++++ b/drivers/net/wireless/ath/ath9k/hw.c
++@@ -1311,39 +1311,56 @@ void ath9k_hw_get_delta_slope_vals(struc
++ 	*coef_exponent = coef_exp - 16;
++ }
++ 
++-/* AR9330 WAR:
++- * call external reset function to reset WMAC if:
++- * - doing a cold reset
++- * - we have pending frames in the TX queues.
++- */
++-static bool ath9k_hw_ar9330_reset_war(struct ath_hw *ah, int type)
+++static bool ath9k_hw_need_external_reset(struct ath_hw *ah, int type)
++ {
++-	int i, npend = 0;
+++	int i;
++ 
++-	for (i = 0; i < AR_NUM_QCU; i++) {
++-		npend = ath9k_hw_numtxpending(ah, i);
++-		if (npend)
++-			break;
++-	}
++-
++-	if (ah->external_reset &&
++-	    (npend || type == ATH9K_RESET_COLD)) {
++-		int reset_err = 0;
++-
++-		ath_dbg(ath9k_hw_common(ah), RESET,
++-			"reset MAC via external reset\n");
++-
++-		reset_err = ah->external_reset();
++-		if (reset_err) {
++-			ath_err(ath9k_hw_common(ah),
++-				"External reset failed, err=%d\n",
++-				reset_err);
++-			return false;
+++	if (type == ATH9K_RESET_COLD)
+++		return true;
+++
+++	if (AR_SREV_9550(ah))
+++		return true;
+++
+++	/* AR9330 WAR:
+++	 * call external reset function to reset WMAC if:
+++	 * - doing a cold reset
+++	 * - we have pending frames in the TX queues.
+++	 */
+++	if (AR_SREV_9330(ah)) {
+++		for (i = 0; i < AR_NUM_QCU; i++) {
+++			if (ath9k_hw_numtxpending(ah, i))
+++				return true;
++ 		}
+++	}
+++
+++	return false;
+++}
+++
+++static bool ath9k_hw_external_reset(struct ath_hw *ah, int type)
+++{
+++	int err;
+++
+++	if (!ah->external_reset || !ath9k_hw_need_external_reset(ah, type))
+++		return true;
+++
+++	ath_dbg(ath9k_hw_common(ah), RESET,
+++		"reset MAC via external reset\n");
++ 
++-		REG_WRITE(ah, AR_RTC_RESET, 1);
+++	err = ah->external_reset();
+++	if (err) {
+++		ath_err(ath9k_hw_common(ah),
+++			"External reset failed, err=%d\n", err);
+++		return false;
++ 	}
++ 
+++	if (AR_SREV_9550(ah)) {
+++		REG_WRITE(ah, AR_RTC_RESET, 0);
+++		udelay(10);
+++	}
+++
+++	REG_WRITE(ah, AR_RTC_RESET, 1);
+++	udelay(10);
+++
++ 	return true;
++ }
++ 
++@@ -1396,24 +1413,24 @@ static bool ath9k_hw_set_reset(struct at
++ 			rst_flags |= AR_RTC_RC_MAC_COLD;
++ 	}
++ 
++-	if (AR_SREV_9330(ah)) {
++-		if (!ath9k_hw_ar9330_reset_war(ah, type))
++-			return false;
++-	}
++-
++ 	if (ath9k_hw_mci_is_enabled(ah))
++ 		ar9003_mci_check_gpm_offset(ah);
++ 
++ 	/* DMA HALT added to resolve ar9300 and ar9580 bus error during
++-	 * RTC_RC reg read
+++	 * RTC_RC reg read. Also needed for AR9550 external reset
++ 	 */
++-	if (AR_SREV_9300(ah) || AR_SREV_9580(ah)) {
+++	if (AR_SREV_9300(ah) || AR_SREV_9580(ah) || AR_SREV_9550(ah)) {
++ 		REG_SET_BIT(ah, AR_CFG, AR_CFG_HALT_REQ);
++ 		ath9k_hw_wait(ah, AR_CFG, AR_CFG_HALT_ACK, AR_CFG_HALT_ACK,
++ 			      20 * AH_WAIT_TIMEOUT);
++-		REG_CLR_BIT(ah, AR_CFG, AR_CFG_HALT_REQ);
++ 	}
++ 
+++	if (!AR_SREV_9100(ah))
+++		ath9k_hw_external_reset(ah, type);
+++
+++	if (AR_SREV_9300(ah) || AR_SREV_9580(ah))
+++		REG_CLR_BIT(ah, AR_CFG, AR_CFG_HALT_REQ);
+++
++ 	REG_WRITE(ah, AR_RTC_RC, rst_flags);
++ 
++ 	REGWRITE_BUFFER_FLUSH(ah);
+diff --git a/package/kernel/mac80211/patches/ath9k/354-ath9k-force-rx_clear-when-disabling-rx.patch b/package/kernel/mac80211/patches/ath9k/354-ath9k-force-rx_clear-when-disabling-rx.patch
+new file mode 100644
+index 0000000000..8aaccf49b4
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/354-ath9k-force-rx_clear-when-disabling-rx.patch
+@@ -0,0 +1,35 @@
++From: Felix Fietkau <nbd@openwrt.org>
++Date: Sun, 7 Jun 2015 13:53:35 +0200
++Subject: [PATCH] ath9k: force rx_clear when disabling rx
++
++This makes stopping Rx more reliable and should reduce the frequency of
++Rx related DMA stop warnings. Don't use rx_clear in TX99 mode.
++
++Cc: stable@vger.kernel.org
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com>
++---
++
++--- a/drivers/net/wireless/ath/ath9k/mac.c
+++++ b/drivers/net/wireless/ath/ath9k/mac.c
++@@ -678,13 +678,18 @@ void ath9k_hw_startpcureceive(struct ath
++ 
++ 	ath9k_ani_reset(ah, is_scanning);
++ 
++-	REG_CLR_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));
+++	REG_CLR_BIT(ah, AR_DIAG_SW,
+++		    AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT | AR_DIAG_FORCE_RX_CLEAR);
++ }
++ EXPORT_SYMBOL(ath9k_hw_startpcureceive);
++ 
++ void ath9k_hw_abortpcurecv(struct ath_hw *ah)
++ {
++-	REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_ABORT | AR_DIAG_RX_DIS);
+++	u32 reg = AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT;
+++
+++	if (!IS_ENABLED(CPTCFG_ATH9K_TX99))
+++		reg |= AR_DIAG_FORCE_RX_CLEAR;
+++	REG_SET_BIT(ah, AR_DIAG_SW, reg);
++ 
++ 	ath9k_hw_disable_mib_counters(ah);
++ }
+diff --git a/package/kernel/mac80211/patches/ath9k/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch b/package/kernel/mac80211/patches/ath9k/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch
+new file mode 100644
+index 0000000000..385eea0116
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch
+@@ -0,0 +1,36 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sat, 14 May 2016 14:51:02 +0200
++Subject: [PATCH] Revert "ath9k: interpret requested txpower in EIRP
++ domain"
++
++This reverts commit 71f5137bf010c6faffab50c0ec15374c59c4a411.
++---
++
++--- a/drivers/net/wireless/ath/ath9k/hw.c
+++++ b/drivers/net/wireless/ath/ath9k/hw.c
++@@ -2977,7 +2977,8 @@ void ath9k_hw_apply_txpower(struct ath_h
++ {
++ 	struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
++ 	struct ieee80211_channel *channel;
++-	int chan_pwr, new_pwr;
+++	int chan_pwr, new_pwr, max_gain;
+++	int ant_gain, ant_reduction = 0;
++ 	u16 ctl = NO_CTL;
++ 
++ 	if (!chan)
++@@ -2989,9 +2990,14 @@ void ath9k_hw_apply_txpower(struct ath_h
++ 	channel = chan->chan;
++ 	chan_pwr = min_t(int, channel->max_power * 2, MAX_COMBINED_POWER);
++ 	new_pwr = min_t(int, chan_pwr, reg->power_limit);
+++	max_gain = chan_pwr - new_pwr + channel->max_antenna_gain * 2;
+++
+++	ant_gain = get_antenna_gain(ah, chan);
+++	if (ant_gain > max_gain)
+++		ant_reduction = ant_gain - max_gain;
++ 
++ 	ah->eep_ops->set_txpower(ah, chan, ctl,
++-				 get_antenna_gain(ah, chan), new_pwr, test);
+++				 ant_reduction, new_pwr, test);
++ }
++ 
++ void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit, bool test)
+diff --git a/package/kernel/mac80211/patches/ath9k/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch b/package/kernel/mac80211/patches/ath9k/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch
+new file mode 100644
+index 0000000000..0c3edc1260
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch
+@@ -0,0 +1,24 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Wed, 19 Jul 2017 08:49:31 +0200
++Subject: [PATCH] ath9k: adjust tx power reduction for US regulatory
++ domain
++
++FCC regulatory rules allow for up to 6 dBi antenna gain. Account for
++this in the EEPROM based tx power reduction code.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/net/wireless/ath/ath9k/hw.c
+++++ b/drivers/net/wireless/ath/ath9k/hw.c
++@@ -2996,6 +2996,10 @@ void ath9k_hw_apply_txpower(struct ath_h
++ 	if (ant_gain > max_gain)
++ 		ant_reduction = ant_gain - max_gain;
++ 
+++	/* FCC allows maximum antenna gain of 6 dBi */
+++	if (reg->region == NL80211_DFS_FCC)
+++		ant_reduction = max_t(int, ant_reduction - 12, 0);
+++
++ 	ah->eep_ops->set_txpower(ah, chan, ctl,
++ 				 ant_reduction, new_pwr, test);
++ }
+diff --git a/package/kernel/mac80211/patches/ath9k/401-ath9k_blink_default.patch b/package/kernel/mac80211/patches/ath9k/401-ath9k_blink_default.patch
+new file mode 100644
+index 0000000000..3eb57bb1cf
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/401-ath9k_blink_default.patch
+@@ -0,0 +1,11 @@
++--- a/drivers/net/wireless/ath/ath9k/init.c
+++++ b/drivers/net/wireless/ath/ath9k/init.c
++@@ -48,7 +48,7 @@ int ath9k_modparam_nohwcrypt;
++ module_param_named(nohwcrypt, ath9k_modparam_nohwcrypt, int, 0444);
++ MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
++ 
++-int ath9k_led_blink;
+++int ath9k_led_blink = 1;
++ module_param_named(blink, ath9k_led_blink, int, 0444);
++ MODULE_PARM_DESC(blink, "Enable LED blink on activity");
++ 
+diff --git a/package/kernel/mac80211/patches/ath9k/410-ath9k_allow_adhoc_and_ap.patch b/package/kernel/mac80211/patches/ath9k/410-ath9k_allow_adhoc_and_ap.patch
+new file mode 100644
+index 0000000000..b2f2763e8e
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/410-ath9k_allow_adhoc_and_ap.patch
+@@ -0,0 +1,10 @@
++--- a/drivers/net/wireless/ath/ath9k/init.c
+++++ b/drivers/net/wireless/ath/ath9k/init.c
++@@ -882,6 +882,7 @@ static const struct ieee80211_iface_limi
++ 				 BIT(NL80211_IFTYPE_AP) },
++ 	{ .max = 1,	.types = BIT(NL80211_IFTYPE_P2P_CLIENT) |
++ 				 BIT(NL80211_IFTYPE_P2P_GO) },
+++	{ .max = 1,	.types = BIT(NL80211_IFTYPE_ADHOC) },
++ };
++ 
++ #ifdef CPTCFG_ATH9K_CHANNEL_CONTEXT
+diff --git a/package/kernel/mac80211/patches/ath9k/450-ath9k-enabled-MFP-capability-unconditionally.patch b/package/kernel/mac80211/patches/ath9k/450-ath9k-enabled-MFP-capability-unconditionally.patch
+new file mode 100644
+index 0000000000..f424ca530b
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/450-ath9k-enabled-MFP-capability-unconditionally.patch
+@@ -0,0 +1,34 @@
++From d946085ff5a331de64e91a2e3c96b9ca79d740f5 Mon Sep 17 00:00:00 2001
++From: David Bauer <mail@david-bauer.net>
++Date: Mon, 15 Jun 2020 00:10:34 +0200
++Subject: [PATCH] ath9k: enabled MFP capability unconditionally
++
++ath9k will already fallback on software-crypto for chipsets not
++supporting IEEE802.11w (MFP). So advertising MFP is not dependent
++on disabling HW crypto for all traffic entirely.
++
++Signed-off-by: David Bauer <mail@david-bauer.net>
++---
++ drivers/net/wireless/ath/ath9k/init.c | 4 +---
++ 1 file changed, 1 insertion(+), 3 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath9k/init.c
+++++ b/drivers/net/wireless/ath/ath9k/init.c
++@@ -963,6 +963,7 @@ static void ath9k_set_hw_capab(struct at
++ 	ieee80211_hw_set(hw, HOST_BROADCAST_PS_BUFFERING);
++ 	ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
++ 	ieee80211_hw_set(hw, SUPPORTS_CLONED_SKBS);
+++	ieee80211_hw_set(hw, MFP_CAPABLE);
++ 
++ 	if (ath9k_ps_enable)
++ 		ieee80211_hw_set(hw, SUPPORTS_PS);
++@@ -975,9 +976,6 @@ static void ath9k_set_hw_capab(struct at
++ 				IEEE80211_RADIOTAP_MCS_HAVE_STBC;
++ 	}
++ 
++-	if (AR_SREV_9160_10_OR_LATER(sc->sc_ah) || ath9k_modparam_nohwcrypt)
++-		ieee80211_hw_set(hw, MFP_CAPABLE);
++-
++ 	hw->wiphy->features |= NL80211_FEATURE_ACTIVE_MONITOR |
++ 			       NL80211_FEATURE_AP_MODE_CHAN_WIDTH_CHANGE |
++ 			       NL80211_FEATURE_P2P_GO_CTWIN;
+diff --git a/package/kernel/mac80211/patches/ath9k/500-ath9k_eeprom_debugfs.patch b/package/kernel/mac80211/patches/ath9k/500-ath9k_eeprom_debugfs.patch
+new file mode 100644
+index 0000000000..2f5e75be8a
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/500-ath9k_eeprom_debugfs.patch
+@@ -0,0 +1,66 @@
++--- a/drivers/net/wireless/ath/ath9k/debug.c
+++++ b/drivers/net/wireless/ath/ath9k/debug.c
++@@ -1413,6 +1413,54 @@ void ath9k_deinit_debug(struct ath_softc
++ 	ath9k_cmn_spectral_deinit_debug(&sc->spec_priv);
++ }
++ 
+++static ssize_t read_file_eeprom(struct file *file, char __user *user_buf,
+++			     size_t count, loff_t *ppos)
+++{
+++	struct ath_softc *sc = file->private_data;
+++	struct ath_hw *ah = sc->sc_ah;
+++	struct ath_common *common = ath9k_hw_common(ah);
+++	int bytes = 0;
+++	int pos = *ppos;
+++	int size = 4096;
+++	u16 val;
+++	int i;
+++
+++	if (AR_SREV_9300_20_OR_LATER(ah))
+++		size = 16384;
+++
+++	if (*ppos < 0)
+++		return -EINVAL;
+++
+++	if (count > size - *ppos)
+++		count = size - *ppos;
+++
+++	for (i = *ppos / 2; count > 0; count -= bytes, *ppos += bytes, i++) {
+++		void *from = &val;
+++
+++		if (!common->bus_ops->eeprom_read(common, i, &val))
+++			val = 0xffff;
+++
+++		if (*ppos % 2) {
+++			from++;
+++			bytes = 1;
+++		} else if (count == 1) {
+++			bytes = 1;
+++		} else {
+++			bytes = 2;
+++		}
+++		if (copy_to_user(user_buf, from, bytes))
+++			return -EFAULT;
+++		user_buf += bytes;
+++	}
+++	return *ppos - pos;
+++}
+++
+++static const struct file_operations fops_eeprom = {
+++	.read = read_file_eeprom,
+++	.open = simple_open,
+++	.owner = THIS_MODULE
+++};
+++
++ int ath9k_init_debug(struct ath_hw *ah)
++ {
++ 	struct ath_common *common = ath9k_hw_common(ah);
++@@ -1432,6 +1480,8 @@ int ath9k_init_debug(struct ath_hw *ah)
++ 	ath9k_tx99_init_debug(sc);
++ 	ath9k_cmn_spectral_init_debug(&sc->spec_priv, sc->debug.debugfs_phy);
++ 
+++	debugfs_create_file("eeprom", S_IRUSR, sc->debug.debugfs_phy, sc,
+++			    &fops_eeprom);
++ 	debugfs_create_devm_seqfile(sc->dev, "dma", sc->debug.debugfs_phy,
++ 				    read_file_dma);
++ 	debugfs_create_devm_seqfile(sc->dev, "interrupt", sc->debug.debugfs_phy,
+diff --git a/package/kernel/mac80211/patches/ath9k/501-ath9k_ahb_init.patch b/package/kernel/mac80211/patches/ath9k/501-ath9k_ahb_init.patch
+new file mode 100644
+index 0000000000..740ddc39dc
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/501-ath9k_ahb_init.patch
+@@ -0,0 +1,34 @@
++--- a/drivers/net/wireless/ath/ath9k/init.c
+++++ b/drivers/net/wireless/ath/ath9k/init.c
++@@ -1178,25 +1178,25 @@ static int __init ath9k_init(void)
++ {
++ 	int error;
++ 
++-	error = ath_pci_init();
+++	error = ath_ahb_init();
++ 	if (error < 0) {
++-		pr_err("No PCI devices found, driver not installed\n");
++ 		error = -ENODEV;
++ 		goto err_out;
++ 	}
++ 
++-	error = ath_ahb_init();
+++	error = ath_pci_init();
++ 	if (error < 0) {
+++		pr_err("No PCI devices found, driver not installed\n");
++ 		error = -ENODEV;
++-		goto err_pci_exit;
+++		goto err_ahb_exit;
++ 	}
++ 
++ 	dmi_check_system(ath9k_quirks);
++ 
++ 	return 0;
++ 
++- err_pci_exit:
++-	ath_pci_exit();
+++ err_ahb_exit:
+++	ath_ahb_exit();
++  err_out:
++ 	return error;
++ }
+diff --git a/package/kernel/mac80211/patches/ath9k/510-ath9k_intr_mitigation_tweak.patch b/package/kernel/mac80211/patches/ath9k/510-ath9k_intr_mitigation_tweak.patch
+new file mode 100644
+index 0000000000..fda050a8f2
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/510-ath9k_intr_mitigation_tweak.patch
+@@ -0,0 +1,18 @@
++--- a/drivers/net/wireless/ath/ath9k/hw.c
+++++ b/drivers/net/wireless/ath/ath9k/hw.c
++@@ -402,13 +402,8 @@ static void ath9k_hw_init_config(struct
++ 
++ 	ah->config.rx_intr_mitigation = true;
++ 
++-	if (AR_SREV_9300_20_OR_LATER(ah)) {
++-		ah->config.rimt_last = 500;
++-		ah->config.rimt_first = 2000;
++-	} else {
++-		ah->config.rimt_last = 250;
++-		ah->config.rimt_first = 700;
++-	}
+++	ah->config.rimt_last = 250;
+++	ah->config.rimt_first = 500;
++ 
++ 	if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
++ 		ah->config.pll_pwrsave = 7;
+diff --git a/package/kernel/mac80211/patches/ath9k/511-ath9k_reduce_rxbuf.patch b/package/kernel/mac80211/patches/ath9k/511-ath9k_reduce_rxbuf.patch
+new file mode 100644
+index 0000000000..15b8d7b86b
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/511-ath9k_reduce_rxbuf.patch
+@@ -0,0 +1,11 @@
++--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++++ b/drivers/net/wireless/ath/ath9k/ath9k.h
++@@ -88,7 +88,7 @@ int ath_descdma_setup(struct ath_softc *
++ 		(_l) &= ((_sz) - 1);		\
++ 	} while (0)
++ 
++-#define ATH_RXBUF               512
+++#define ATH_RXBUF               256
++ #define ATH_TXBUF               512
++ #define ATH_TXBUF_RESERVE       5
++ #define ATH_TXMAXTRY            13
+diff --git a/package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch b/package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch
+new file mode 100644
+index 0000000000..a871e458a4
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch
+@@ -0,0 +1,125 @@
++--- a/drivers/net/wireless/ath/ath9k/debug.c
+++++ b/drivers/net/wireless/ath/ath9k/debug.c
++@@ -1461,6 +1461,52 @@ static const struct file_operations fops
++ 	.owner = THIS_MODULE
++ };
++ 
+++
+++static ssize_t read_file_chan_bw(struct file *file, char __user *user_buf,
+++			     size_t count, loff_t *ppos)
+++{
+++	struct ath_softc *sc = file->private_data;
+++	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+++	char buf[32];
+++	unsigned int len;
+++
+++	len = sprintf(buf, "0x%08x\n", common->chan_bw);
+++	return simple_read_from_buffer(user_buf, count, ppos, buf, len);
+++}
+++
+++static ssize_t write_file_chan_bw(struct file *file, const char __user *user_buf,
+++			     size_t count, loff_t *ppos)
+++{
+++	struct ath_softc *sc = file->private_data;
+++	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+++	unsigned long chan_bw;
+++	char buf[32];
+++	ssize_t len;
+++
+++	len = min(count, sizeof(buf) - 1);
+++	if (copy_from_user(buf, user_buf, len))
+++		return -EFAULT;
+++
+++	buf[len] = '\0';
+++	if (kstrtoul(buf, 0, &chan_bw))
+++		return -EINVAL;
+++
+++	common->chan_bw = chan_bw;
+++	if (!test_bit(ATH_OP_INVALID, &common->op_flags))
+++		ath9k_ops.config(sc->hw, IEEE80211_CONF_CHANGE_CHANNEL);
+++
+++	return count;
+++}
+++
+++static const struct file_operations fops_chanbw = {
+++	.read = read_file_chan_bw,
+++	.write = write_file_chan_bw,
+++	.open = simple_open,
+++	.owner = THIS_MODULE,
+++	.llseek = default_llseek,
+++};
+++
+++
++ int ath9k_init_debug(struct ath_hw *ah)
++ {
++ 	struct ath_common *common = ath9k_hw_common(ah);
++@@ -1482,6 +1528,8 @@ int ath9k_init_debug(struct ath_hw *ah)
++ 
++ 	debugfs_create_file("eeprom", S_IRUSR, sc->debug.debugfs_phy, sc,
++ 			    &fops_eeprom);
+++	debugfs_create_file("chanbw", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
+++			    sc, &fops_chanbw);
++ 	debugfs_create_devm_seqfile(sc->dev, "dma", sc->debug.debugfs_phy,
++ 				    read_file_dma);
++ 	debugfs_create_devm_seqfile(sc->dev, "interrupt", sc->debug.debugfs_phy,
++--- a/drivers/net/wireless/ath/ath.h
+++++ b/drivers/net/wireless/ath/ath.h
++@@ -149,6 +149,7 @@ struct ath_common {
++ 	int debug_mask;
++ 	enum ath_device_state state;
++ 	unsigned long op_flags;
+++	u32 chan_bw;
++ 
++ 	struct ath_ani ani;
++ 
++--- a/drivers/net/wireless/ath/ath9k/common.c
+++++ b/drivers/net/wireless/ath/ath9k/common.c
++@@ -297,11 +297,13 @@ EXPORT_SYMBOL(ath9k_cmn_get_hw_crypto_ke
++ /*
++  * Update internal channel flags.
++  */
++-static void ath9k_cmn_update_ichannel(struct ath9k_channel *ichan,
+++static void ath9k_cmn_update_ichannel(struct ath_common *common,
+++				      struct ath9k_channel *ichan,
++ 				      struct cfg80211_chan_def *chandef)
++ {
++ 	struct ieee80211_channel *chan = chandef->chan;
++ 	u16 flags = 0;
+++	int width;
++ 
++ 	ichan->channel = chan->center_freq;
++ 	ichan->chan = chan;
++@@ -309,7 +311,19 @@ static void ath9k_cmn_update_ichannel(st
++ 	if (chan->band == NL80211_BAND_5GHZ)
++ 		flags |= CHANNEL_5GHZ;
++ 
++-	switch (chandef->width) {
+++	switch (common->chan_bw) {
+++	case 5:
+++		width = NL80211_CHAN_WIDTH_5;
+++		break;
+++	case 10:
+++		width = NL80211_CHAN_WIDTH_10;
+++		break;
+++	default:
+++		width = chandef->width;
+++		break;
+++	}
+++
+++	switch (width) {
++ 	case NL80211_CHAN_WIDTH_5:
++ 		flags |= CHANNEL_QUARTER;
++ 		break;
++@@ -342,10 +356,11 @@ struct ath9k_channel *ath9k_cmn_get_chan
++ 					    struct cfg80211_chan_def *chandef)
++ {
++ 	struct ieee80211_channel *curchan = chandef->chan;
+++	struct ath_common *common = ath9k_hw_common(ah);
++ 	struct ath9k_channel *channel;
++ 
++ 	channel = &ah->channels[curchan->hw_value];
++-	ath9k_cmn_update_ichannel(channel, chandef);
+++	ath9k_cmn_update_ichannel(common, channel, chandef);
++ 
++ 	return channel;
++ }
+diff --git a/package/kernel/mac80211/patches/ath9k/513-ath9k_add_pci_ids.patch b/package/kernel/mac80211/patches/ath9k/513-ath9k_add_pci_ids.patch
+new file mode 100644
+index 0000000000..a085e3a1fb
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/513-ath9k_add_pci_ids.patch
+@@ -0,0 +1,30 @@
++--- a/drivers/net/wireless/ath/ath9k/hw.c
+++++ b/drivers/net/wireless/ath/ath9k/hw.c
++@@ -662,6 +662,7 @@ int ath9k_hw_init(struct ath_hw *ah)
++ 
++ 	/* These are all the AR5008/AR9001/AR9002/AR9003 hardware family of chipsets */
++ 	switch (ah->hw_version.devid) {
+++	case AR9300_DEVID_INVALID:
++ 	case AR5416_DEVID_PCI:
++ 	case AR5416_DEVID_PCIE:
++ 	case AR5416_AR9100_DEVID:
++--- a/drivers/net/wireless/ath/ath9k/hw.h
+++++ b/drivers/net/wireless/ath/ath9k/hw.h
++@@ -36,6 +36,7 @@
++ 
++ #define ATHEROS_VENDOR_ID	0x168c
++ 
+++#define AR9300_DEVID_INVALID	0xabcd
++ #define AR5416_DEVID_PCI	0x0023
++ #define AR5416_DEVID_PCIE	0x0024
++ #define AR9160_DEVID_PCI	0x0027
++--- a/drivers/net/wireless/ath/ath9k/pci.c
+++++ b/drivers/net/wireless/ath/ath9k/pci.c
++@@ -774,6 +774,7 @@ static const struct pci_device_id ath_pc
++ 	  .driver_data = ATH9K_PCI_BT_ANT_DIV },
++ #endif
++ 
+++	{ PCI_VDEVICE(ATHEROS, 0xabcd) }, /* PCI-E  internal chip default ID */
++ 	{ 0 }
++ };
++ 
+diff --git a/package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch b/package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch
+new file mode 100644
+index 0000000000..74506657e0
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch
+@@ -0,0 +1,267 @@
++--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++++ b/drivers/net/wireless/ath/ath9k/ath9k.h
++@@ -843,6 +843,9 @@ static inline int ath9k_dump_btcoex(stru
++ #ifdef CPTCFG_MAC80211_LEDS
++ void ath_init_leds(struct ath_softc *sc);
++ void ath_deinit_leds(struct ath_softc *sc);
+++int ath_create_gpio_led(struct ath_softc *sc, int gpio, const char *name,
+++			const char *trigger, bool active_low);
+++
++ #else
++ static inline void ath_init_leds(struct ath_softc *sc)
++ {
++@@ -979,6 +982,13 @@ void ath_ant_comb_scan(struct ath_softc
++ 
++ #define ATH9K_NUM_CHANCTX  2 /* supports 2 operating channels */
++ 
+++struct ath_led {
+++	struct list_head list;
+++	struct ath_softc *sc;
+++	const struct gpio_led *gpio;
+++	struct led_classdev cdev;
+++};
+++
++ struct ath_softc {
++ 	struct ieee80211_hw *hw;
++ 	struct device *dev;
++@@ -1032,9 +1042,8 @@ struct ath_softc {
++ 	spinlock_t chan_lock;
++ 
++ #ifdef CPTCFG_MAC80211_LEDS
++-	bool led_registered;
++-	char led_name[32];
++-	struct led_classdev led_cdev;
+++	const char *led_default_trigger;
+++	struct list_head leds;
++ #endif
++ 
++ #ifdef CPTCFG_ATH9K_DEBUGFS
++--- a/drivers/net/wireless/ath/ath9k/gpio.c
+++++ b/drivers/net/wireless/ath/ath9k/gpio.c
++@@ -39,61 +39,111 @@ static void ath_fill_led_pin(struct ath_
++ 		else
++ 			ah->led_pin = ATH_LED_PIN_DEF;
++ 	}
+++}
+++
+++static void ath_led_brightness(struct led_classdev *led_cdev,
+++			       enum led_brightness brightness)
+++{
+++	struct ath_led *led = container_of(led_cdev, struct ath_led, cdev);
+++	struct ath_softc *sc = led->sc;
+++
+++	ath9k_ps_wakeup(sc);
+++	ath9k_hw_set_gpio(sc->sc_ah, led->gpio->gpio,
+++			  (brightness != LED_OFF) ^ led->gpio->active_low);
+++	ath9k_ps_restore(sc);
+++}
+++
+++static int ath_add_led(struct ath_softc *sc, struct ath_led *led)
+++{
+++	const struct gpio_led *gpio = led->gpio;
+++	int ret;
+++
+++	led->cdev.name = gpio->name;
+++	led->cdev.default_trigger = gpio->default_trigger;
+++	led->cdev.brightness_set = ath_led_brightness;
+++
+++	ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->cdev);
+++	if (ret < 0)
+++		return ret;
+++
+++	led->sc = sc;
+++	list_add(&led->list, &sc->leds);
++ 
++ 	/* Configure gpio for output */
++-	ath9k_hw_gpio_request_out(ah, ah->led_pin, "ath9k-led",
+++	ath9k_hw_gpio_request_out(sc->sc_ah, gpio->gpio, gpio->name,
++ 				  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
++ 
++-	/* LED off, active low */
++-	ath9k_hw_set_gpio(ah, ah->led_pin, ah->config.led_active_high ? 0 : 1);
+++	/* LED off */
+++	ath9k_hw_set_gpio(sc->sc_ah, gpio->gpio, gpio->active_low);
+++
+++	return 0;
++ }
++ 
++-static void ath_led_brightness(struct led_classdev *led_cdev,
++-			       enum led_brightness brightness)
+++int ath_create_gpio_led(struct ath_softc *sc, int gpio_num, const char *name,
+++			const char *trigger, bool active_low)
++ {
++-	struct ath_softc *sc = container_of(led_cdev, struct ath_softc, led_cdev);
++-	u32 val = (brightness == LED_OFF);
+++	struct ath_led *led;
+++	struct gpio_led *gpio;
+++	char *_name;
+++	int ret;
++ 
++-	if (sc->sc_ah->config.led_active_high)
++-		val = !val;
+++	led = kzalloc(sizeof(*led) + sizeof(*gpio) + strlen(name) + 1,
+++		      GFP_KERNEL);
+++	if (!led)
+++		return -ENOMEM;
+++
+++	led->gpio = gpio = (struct gpio_led *) (led + 1);
+++	_name = (char *) (led->gpio + 1);
+++
+++	strcpy(_name, name);
+++	gpio->name = _name;
+++	gpio->gpio = gpio_num;
+++	gpio->active_low = active_low;
+++	gpio->default_trigger = trigger;
+++
+++	ret = ath_add_led(sc, led);
+++	if (unlikely(ret < 0))
+++		kfree(led);
++ 
++-	ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, val);
+++	return ret;
++ }
++ 
++ void ath_deinit_leds(struct ath_softc *sc)
++ {
++-	if (!sc->led_registered)
++-		return;
+++	struct ath_led *led;
++ 
++-	ath_led_brightness(&sc->led_cdev, LED_OFF);
++-	led_classdev_unregister(&sc->led_cdev);
++-
++-	ath9k_hw_gpio_free(sc->sc_ah, sc->sc_ah->led_pin);
+++	while (!list_empty(&sc->leds)) {
+++		led = list_first_entry(&sc->leds, struct ath_led, list);
+++		list_del(&led->list);
+++		ath_led_brightness(&led->cdev, LED_OFF);
+++		led_classdev_unregister(&led->cdev);
+++		ath9k_hw_gpio_free(sc->sc_ah, led->gpio->gpio);
+++		kfree(led);
+++	}
++ }
++ 
++ void ath_init_leds(struct ath_softc *sc)
++ {
++-	int ret;
+++	char led_name[32];
+++	const char *trigger;
+++
+++	INIT_LIST_HEAD(&sc->leds);
++ 
++ 	if (AR_SREV_9100(sc->sc_ah))
++ 		return;
++ 
++ 	ath_fill_led_pin(sc);
++ 
++-	if (!ath9k_led_blink)
++-		sc->led_cdev.default_trigger =
++-			ieee80211_get_radio_led_name(sc->hw);
++-
++-	snprintf(sc->led_name, sizeof(sc->led_name),
++-		"ath9k-%s", wiphy_name(sc->hw->wiphy));
++-	sc->led_cdev.name = sc->led_name;
++-	sc->led_cdev.brightness_set = ath_led_brightness;
+++	snprintf(led_name, sizeof(led_name), "ath9k-%s",
+++		 wiphy_name(sc->hw->wiphy));
++ 
++-	ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &sc->led_cdev);
++-	if (ret < 0)
++-		return;
+++	if (ath9k_led_blink)
+++		trigger = sc->led_default_trigger;
+++	else
+++		trigger = ieee80211_get_radio_led_name(sc->hw);
++ 
++-	sc->led_registered = true;
+++	ath_create_gpio_led(sc, sc->sc_ah->led_pin, led_name, trigger,
+++			   !sc->sc_ah->config.led_active_high);
++ }
++ #endif
++ 
++--- a/drivers/net/wireless/ath/ath9k/init.c
+++++ b/drivers/net/wireless/ath/ath9k/init.c
++@@ -1088,7 +1088,7 @@ int ath9k_init_device(u16 devid, struct
++ 
++ #ifdef CPTCFG_MAC80211_LEDS
++ 	/* must be initialized before ieee80211_register_hw */
++-	sc->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(sc->hw,
+++	sc->led_default_trigger = ieee80211_create_tpt_led_trigger(sc->hw,
++ 		IEEE80211_TPT_LEDTRIG_FL_RADIO, ath9k_tpt_blink,
++ 		ARRAY_SIZE(ath9k_tpt_blink));
++ #endif
++--- a/drivers/net/wireless/ath/ath9k/debug.c
+++++ b/drivers/net/wireless/ath/ath9k/debug.c
++@@ -1506,6 +1506,61 @@ static const struct file_operations fops
++ 	.llseek = default_llseek,
++ };
++ 
+++#ifdef CONFIG_MAC80211_LEDS
+++
+++static ssize_t write_file_gpio_led(struct file *file, const char __user *ubuf,
+++				   size_t count, loff_t *ppos)
+++{
+++	struct ath_softc *sc = file->private_data;
+++	char buf[32], *str, *name, *c;
+++	ssize_t len;
+++	unsigned int gpio;
+++	bool active_low = false;
+++
+++	len = min(count, sizeof(buf) - 1);
+++	if (copy_from_user(buf, ubuf, len))
+++		return -EFAULT;
+++
+++	buf[len] = '\0';
+++	name = strchr(buf, ',');
+++	if (!name)
+++		return -EINVAL;
+++
+++	*(name++) = 0;
+++	if (!*name)
+++		return -EINVAL;
+++
+++	c = strchr(name, '\n');
+++	if (c)
+++		*c = 0;
+++
+++	str = buf;
+++	if (*str == '!') {
+++		str++;
+++		active_low = true;
+++	}
+++
+++	if (kstrtouint(str, 0, &gpio) < 0)
+++		return -EINVAL;
+++
+++	if (gpio >= sc->sc_ah->caps.num_gpio_pins)
+++		return -EINVAL;
+++
+++	if (ath_create_gpio_led(sc, gpio, name, NULL, active_low) < 0)
+++		return -EINVAL;
+++
+++	return count;
+++}
+++
+++static const struct file_operations fops_gpio_led = {
+++	.write = write_file_gpio_led,
+++	.open = simple_open,
+++	.owner = THIS_MODULE,
+++	.llseek = default_llseek,
+++};
+++
+++#endif
+++
++ 
++ int ath9k_init_debug(struct ath_hw *ah)
++ {
++@@ -1530,6 +1585,10 @@ int ath9k_init_debug(struct ath_hw *ah)
++ 			    &fops_eeprom);
++ 	debugfs_create_file("chanbw", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
++ 			    sc, &fops_chanbw);
+++#ifdef CONFIG_MAC80211_LEDS
+++	debugfs_create_file("gpio_led", S_IWUSR,
+++			   sc->debug.debugfs_phy, sc, &fops_gpio_led);
+++#endif
++ 	debugfs_create_devm_seqfile(sc->dev, "dma", sc->debug.debugfs_phy,
++ 				    read_file_dma);
++ 	debugfs_create_devm_seqfile(sc->dev, "interrupt", sc->debug.debugfs_phy,
+diff --git a/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch b/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch
+new file mode 100644
+index 0000000000..8ed7ad8a09
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch
+@@ -0,0 +1,76 @@
++--- a/include/linux/ath9k_platform.h
+++++ b/include/linux/ath9k_platform.h
++@@ -46,6 +46,9 @@ struct ath9k_platform_data {
++ 	int (*external_reset)(void);
++ 
++ 	bool use_eeprom;
+++
+++	int num_leds;
+++	const struct gpio_led *leds;
++ };
++ 
++ #endif /* _LINUX_ATH9K_PLATFORM_H */
++--- a/drivers/net/wireless/ath/ath9k/gpio.c
+++++ b/drivers/net/wireless/ath/ath9k/gpio.c
++@@ -15,6 +15,7 @@
++  */
++ 
++ #include "ath9k.h"
+++#include <linux/ath9k_platform.h>
++ 
++ /********************************/
++ /*	 LED functions		*/
++@@ -108,6 +109,24 @@ int ath_create_gpio_led(struct ath_softc
++ 	return ret;
++ }
++ 
+++static int ath_create_platform_led(struct ath_softc *sc,
+++				   const struct gpio_led *gpio)
+++{
+++	struct ath_led *led;
+++	int ret;
+++
+++	led = kzalloc(sizeof(*led), GFP_KERNEL);
+++	if (!led)
+++		return -ENOMEM;
+++
+++	led->gpio = gpio;
+++	ret = ath_add_led(sc, led);
+++	if (ret < 0)
+++		kfree(led);
+++
+++	return ret;
+++}
+++
++ void ath_deinit_leds(struct ath_softc *sc)
++ {
++ 	struct ath_led *led;
++@@ -124,8 +143,10 @@ void ath_deinit_leds(struct ath_softc *s
++ 
++ void ath_init_leds(struct ath_softc *sc)
++ {
+++	struct ath9k_platform_data *pdata = sc->dev->platform_data;
++ 	char led_name[32];
++ 	const char *trigger;
+++	int i;
++ 
++ 	INIT_LIST_HEAD(&sc->leds);
++ 
++@@ -134,6 +155,17 @@ void ath_init_leds(struct ath_softc *sc)
++ 
++ 	ath_fill_led_pin(sc);
++ 
+++	if (pdata && pdata->leds && pdata->num_leds)
+++		for (i = 0; i < pdata->num_leds; i++) {
+++			if (pdata->leds[i].gpio == sc->sc_ah->led_pin)
+++				sc->sc_ah->led_pin = -1;
+++
+++			ath_create_platform_led(sc, &pdata->leds[i]);
+++		}
+++
+++	if (sc->sc_ah->led_pin < 0)
+++		return;
+++
++ 	snprintf(led_name, sizeof(led_name), "ath9k-%s",
++ 		 wiphy_name(sc->hw->wiphy));
++ 
+diff --git a/package/kernel/mac80211/patches/ath9k/540-ath9k_reduce_ani_interval.patch b/package/kernel/mac80211/patches/ath9k/540-ath9k_reduce_ani_interval.patch
+new file mode 100644
+index 0000000000..e899903478
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/540-ath9k_reduce_ani_interval.patch
+@@ -0,0 +1,11 @@
++--- a/drivers/net/wireless/ath/ath9k/ani.h
+++++ b/drivers/net/wireless/ath/ath9k/ani.h
++@@ -42,7 +42,7 @@
++ #define ATH9K_ANI_PERIOD                  300
++ 
++ /* in ms */
++-#define ATH9K_ANI_POLLINTERVAL            1000
+++#define ATH9K_ANI_POLLINTERVAL            300
++ 
++ #define ATH9K_SIG_FIRSTEP_SETTING_MIN     0
++ #define ATH9K_SIG_FIRSTEP_SETTING_MAX     20
+diff --git a/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch b/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch
+new file mode 100644
+index 0000000000..e09bbc08ea
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch
+@@ -0,0 +1,139 @@
++--- a/drivers/net/wireless/ath/ath9k/debug.c
+++++ b/drivers/net/wireless/ath/ath9k/debug.c
++@@ -1562,6 +1562,50 @@ static const struct file_operations fops
++ #endif
++ 
++ 
+++static ssize_t read_file_diag(struct file *file, char __user *user_buf,
+++			     size_t count, loff_t *ppos)
+++{
+++	struct ath_softc *sc = file->private_data;
+++	struct ath_hw *ah = sc->sc_ah;
+++	char buf[32];
+++	unsigned int len;
+++
+++	len = sprintf(buf, "0x%08lx\n", ah->diag);
+++	return simple_read_from_buffer(user_buf, count, ppos, buf, len);
+++}
+++
+++static ssize_t write_file_diag(struct file *file, const char __user *user_buf,
+++			     size_t count, loff_t *ppos)
+++{
+++	struct ath_softc *sc = file->private_data;
+++	struct ath_hw *ah = sc->sc_ah;
+++	unsigned long diag;
+++	char buf[32];
+++	ssize_t len;
+++
+++	len = min(count, sizeof(buf) - 1);
+++	if (copy_from_user(buf, user_buf, len))
+++		return -EFAULT;
+++
+++	buf[len] = '\0';
+++	if (kstrtoul(buf, 0, &diag))
+++		return -EINVAL;
+++
+++	ah->diag = diag;
+++	ath9k_hw_update_diag(ah);
+++
+++	return count;
+++}
+++
+++static const struct file_operations fops_diag = {
+++	.read = read_file_diag,
+++	.write = write_file_diag,
+++	.open = simple_open,
+++	.owner = THIS_MODULE,
+++	.llseek = default_llseek,
+++};
+++
+++
++ int ath9k_init_debug(struct ath_hw *ah)
++ {
++ 	struct ath_common *common = ath9k_hw_common(ah);
++@@ -1589,6 +1633,8 @@ int ath9k_init_debug(struct ath_hw *ah)
++ 	debugfs_create_file("gpio_led", S_IWUSR,
++ 			   sc->debug.debugfs_phy, sc, &fops_gpio_led);
++ #endif
+++	debugfs_create_file("diag", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
+++			    sc, &fops_diag);
++ 	debugfs_create_devm_seqfile(sc->dev, "dma", sc->debug.debugfs_phy,
++ 				    read_file_dma);
++ 	debugfs_create_devm_seqfile(sc->dev, "interrupt", sc->debug.debugfs_phy,
++--- a/drivers/net/wireless/ath/ath9k/hw.h
+++++ b/drivers/net/wireless/ath/ath9k/hw.h
++@@ -522,6 +522,12 @@ enum {
++ 	ATH9K_RESET_COLD,
++ };
++ 
+++enum {
+++	ATH_DIAG_DISABLE_RX,
+++	ATH_DIAG_DISABLE_TX,
+++	ATH_DIAG_TRIGGER_ERROR,
+++};
+++
++ struct ath9k_hw_version {
++ 	u32 magic;
++ 	u16 devid;
++@@ -810,6 +816,8 @@ struct ath_hw {
++ 	u32 ah_flags;
++ 	s16 nf_override;
++ 
+++	unsigned long diag;
+++
++ 	bool reset_power_on;
++ 	bool htc_reset_init;
++ 
++@@ -1079,6 +1087,7 @@ void ath9k_hw_check_nav(struct ath_hw *a
++ bool ath9k_hw_check_alive(struct ath_hw *ah);
++ 
++ bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode);
+++void ath9k_hw_update_diag(struct ath_hw *ah);
++ 
++ /* Generic hw timer primitives */
++ struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,
++--- a/drivers/net/wireless/ath/ath9k/hw.c
+++++ b/drivers/net/wireless/ath/ath9k/hw.c
++@@ -1881,6 +1881,20 @@ u32 ath9k_hw_get_tsf_offset(struct times
++ }
++ EXPORT_SYMBOL(ath9k_hw_get_tsf_offset);
++ 
+++void ath9k_hw_update_diag(struct ath_hw *ah)
+++{
+++	if (test_bit(ATH_DIAG_DISABLE_RX, &ah->diag))
+++		REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS);
+++	else
+++		REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS);
+++
+++	if (test_bit(ATH_DIAG_DISABLE_TX, &ah->diag))
+++		REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_LOOP_BACK);
+++	else
+++		REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_LOOP_BACK);
+++}
+++EXPORT_SYMBOL(ath9k_hw_update_diag);
+++
++ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
++ 		   struct ath9k_hw_cal_data *caldata, bool fastcc)
++ {
++@@ -2089,6 +2103,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
++ 		ar9003_hw_disable_phy_restart(ah);
++ 
++ 	ath9k_hw_apply_gpio_override(ah);
+++	ath9k_hw_update_diag(ah);
++ 
++ 	if (AR_SREV_9565(ah) && common->bt_ant_diversity)
++ 		REG_SET_BIT(ah, AR_BTCOEX_WL_LNADIV, AR_BTCOEX_WL_LNADIV_FORCE_ON);
++--- a/drivers/net/wireless/ath/ath9k/main.c
+++++ b/drivers/net/wireless/ath/ath9k/main.c
++@@ -538,6 +538,11 @@ irqreturn_t ath_isr(int irq, void *dev)
++ 		return IRQ_HANDLED;
++ 	}
++ 
+++	if (test_bit(ATH_DIAG_TRIGGER_ERROR, &ah->diag)) {
+++		status |= ATH9K_INT_FATAL;
+++		clear_bit(ATH_DIAG_TRIGGER_ERROR, &ah->diag);
+++	}
+++
++ 	/*
++ 	 * If there are no status bits set, then this interrupt was not
++ 	 * for me (should have been caught above).
+diff --git a/package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch b/package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch
+new file mode 100644
+index 0000000000..6acc864d1e
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch
+@@ -0,0 +1,186 @@
++--- a/drivers/net/wireless/ath/ath9k/hw.h
+++++ b/drivers/net/wireless/ath/ath9k/hw.h
++@@ -723,6 +723,7 @@ struct ath_spec_scan {
++  * @config_pci_powersave:
++  * @calibrate: periodic calibration for NF, ANI, IQ, ADC gain, ADC-DC
++  *
+++ * @get_adc_entropy: get entropy from the raw ADC I/Q output
++  * @spectral_scan_config: set parameters for spectral scan and enable/disable it
++  * @spectral_scan_trigger: trigger a spectral scan run
++  * @spectral_scan_wait: wait for a spectral scan run to finish
++@@ -745,6 +746,7 @@ struct ath_hw_ops {
++ 			struct ath_hw_antcomb_conf *antconf);
++ 	void (*antdiv_comb_conf_set)(struct ath_hw *ah,
++ 			struct ath_hw_antcomb_conf *antconf);
+++	void (*get_adc_entropy)(struct ath_hw *ah, u8 *buf, size_t len);
++ 	void (*spectral_scan_config)(struct ath_hw *ah,
++ 				     struct ath_spec_scan *param);
++ 	void (*spectral_scan_trigger)(struct ath_hw *ah);
++--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
++@@ -1918,6 +1918,26 @@ void ar9003_hw_init_rate_txpower(struct
++ 	}
++ }
++ 
+++static void ar9003_hw_get_adc_entropy(struct ath_hw *ah, u8 *buf, size_t len)
+++{
+++	int i, j;
+++
+++	REG_RMW_FIELD(ah, AR_PHY_TEST, AR_PHY_TEST_BBB_OBS_SEL, 1);
+++	REG_CLR_BIT(ah, AR_PHY_TEST, AR_PHY_TEST_RX_OBS_SEL_BIT5);
+++	REG_RMW_FIELD(ah, AR_PHY_TEST_CTL_STATUS, AR_PHY_TEST_CTL_RX_OBS_SEL, 0);
+++
+++	memset(buf, 0, len);
+++	for (i = 0; i < len; i++) {
+++		for (j = 0; j < 4; j++) {
+++			u32 regval = REG_READ(ah, AR_PHY_TST_ADC);
+++
+++			buf[i] <<= 2;
+++			buf[i] |= (regval & 1) | ((regval & BIT(10)) >> 9);
+++			udelay(1);
+++		}
+++	}
+++}
+++
++ void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
++ {
++ 	struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
++@@ -1954,6 +1974,7 @@ void ar9003_hw_attach_phy_ops(struct ath
++ 	priv_ops->set_radar_params = ar9003_hw_set_radar_params;
++ 	priv_ops->fast_chan_change = ar9003_hw_fast_chan_change;
++ 
+++	ops->get_adc_entropy = ar9003_hw_get_adc_entropy;
++ 	ops->antdiv_comb_conf_get = ar9003_hw_antdiv_comb_conf_get;
++ 	ops->antdiv_comb_conf_set = ar9003_hw_antdiv_comb_conf_set;
++ 	ops->spectral_scan_config = ar9003_hw_spectral_scan_config;
++--- a/drivers/net/wireless/ath/ath9k/init.c
+++++ b/drivers/net/wireless/ath/ath9k/init.c
++@@ -870,7 +870,8 @@ static void ath9k_init_txpower_limits(st
++ 	if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
++ 		ath9k_init_band_txpower(sc, NL80211_BAND_5GHZ);
++ 
++-	ah->curchan = curchan;
+++	if (curchan)
+++		ah->curchan = curchan;
++ }
++ 
++ static const struct ieee80211_iface_limit if_limits[] = {
++@@ -1048,6 +1049,18 @@ static void ath9k_set_hw_capab(struct at
++ 	wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
++ }
++ 
+++static void ath_get_initial_entropy(struct ath_softc *sc)
+++{
+++	struct ath_hw *ah = sc->sc_ah;
+++	char buf[256];
+++
+++	/* reuse last channel initialized by the tx power test */
+++	ath9k_hw_reset(ah, ah->curchan, NULL, false);
+++
+++	ath9k_hw_get_adc_entropy(ah, buf, sizeof(buf));
+++	add_device_randomness(buf, sizeof(buf));
+++}
+++
++ int ath9k_init_device(u16 devid, struct ath_softc *sc,
++ 		    const struct ath_bus_ops *bus_ops)
++ {
++@@ -1095,6 +1108,8 @@ int ath9k_init_device(u16 devid, struct
++ 
++ 	wiphy_read_of_freq_limits(hw->wiphy);
++ 
+++	ath_get_initial_entropy(sc);
+++
++ 	/* Register with mac80211 */
++ 	error = ieee80211_register_hw(hw);
++ 	if (error)
++--- a/drivers/net/wireless/ath/ath9k/hw-ops.h
+++++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
++@@ -100,6 +100,12 @@ static inline void ath9k_hw_tx99_set_txp
++ 		ath9k_hw_ops(ah)->tx99_set_txpower(ah, power);
++ }
++ 
+++static inline void ath9k_hw_get_adc_entropy(struct ath_hw *ah,
+++		u8 *buf, size_t len)
+++{
+++	ath9k_hw_ops(ah)->get_adc_entropy(ah, buf, len);
+++}
+++
++ #ifdef CPTCFG_ATH9K_BTCOEX_SUPPORT
++ 
++ static inline void ath9k_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable)
++--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+++++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
++@@ -1340,9 +1340,30 @@ void ar5008_hw_init_rate_txpower(struct
++ 	}
++ }
++ 
+++static void ar5008_hw_get_adc_entropy(struct ath_hw *ah, u8 *buf, size_t len)
+++{
+++	int i, j;
+++
+++	REG_RMW_FIELD(ah, AR_PHY_TEST, AR_PHY_TEST_BBB_OBS_SEL, 1);
+++	REG_CLR_BIT(ah, AR_PHY_TEST, AR_PHY_TEST_RX_OBS_SEL_BIT5);
+++	REG_RMW_FIELD(ah, AR_PHY_TEST2, AR_PHY_TEST2_RX_OBS_SEL, 0);
+++
+++	memset(buf, 0, len);
+++	for (i = 0; i < len; i++) {
+++		for (j = 0; j < 4; j++) {
+++			u32 regval = REG_READ(ah, AR_PHY_TST_ADC);
+++
+++			buf[i] <<= 2;
+++			buf[i] |= (regval & 1) | ((regval & BIT(9)) >> 8);
+++			udelay(1);
+++		}
+++	}
+++}
+++
++ int ar5008_hw_attach_phy_ops(struct ath_hw *ah)
++ {
++ 	struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
+++	struct ath_hw_ops *ops = ath9k_hw_ops(ah);
++ 	static const u32 ar5416_cca_regs[6] = {
++ 		AR_PHY_CCA,
++ 		AR_PHY_CH1_CCA,
++@@ -1357,6 +1378,8 @@ int ar5008_hw_attach_phy_ops(struct ath_
++ 	if (ret)
++ 	    return ret;
++ 
+++	ops->get_adc_entropy = ar5008_hw_get_adc_entropy;
+++
++ 	priv_ops->rf_set_freq = ar5008_hw_set_channel;
++ 	priv_ops->spur_mitigate_freq = ar5008_hw_spur_mitigate;
++ 
++--- a/drivers/net/wireless/ath/ath9k/ar9002_phy.h
+++++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.h
++@@ -20,6 +20,12 @@
++ #define PHY_AGC_CLR             0x10000000
++ #define RFSILENT_BB             0x00002000
++ 
+++#define AR_PHY_TEST_BBB_OBS_SEL       0x780000
+++#define AR_PHY_TEST_BBB_OBS_SEL_S     19
+++
+++#define AR_PHY_TEST_RX_OBS_SEL_BIT5_S 23
+++#define AR_PHY_TEST_RX_OBS_SEL_BIT5   (1 << AR_PHY_TEST_RX_OBS_SEL_BIT5_S)
+++
++ #define AR_PHY_TURBO                0x9804
++ #define AR_PHY_FC_TURBO_MODE        0x00000001
++ #define AR_PHY_FC_TURBO_SHORT       0x00000002
++@@ -36,6 +42,9 @@
++ 
++ #define AR_PHY_TEST2			0x9808
++ 
+++#define AR_PHY_TEST2_RX_OBS_SEL        0x3C00
+++#define AR_PHY_TEST2_RX_OBS_SEL_S      10
+++
++ #define AR_PHY_TIMING2           0x9810
++ #define AR_PHY_TIMING3           0x9814
++ #define AR_PHY_TIMING3_DSC_MAN   0xFFFE0000
++@@ -393,6 +402,8 @@
++ #define AR_PHY_RFBUS_GRANT       0x9C20
++ #define AR_PHY_RFBUS_GRANT_EN    0x00000001
++ 
+++#define AR_PHY_TST_ADC      0x9C24
+++
++ #define AR_PHY_CHAN_INFO_GAIN_DIFF             0x9CF4
++ #define AR_PHY_CHAN_INFO_GAIN_DIFF_UPPER_LIMIT 320
++ 
+diff --git a/package/kernel/mac80211/patches/ath9k/544-ath9k-ar933x-usb-hang-workaround.patch b/package/kernel/mac80211/patches/ath9k/544-ath9k-ar933x-usb-hang-workaround.patch
+new file mode 100644
+index 0000000000..23a81864fa
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/544-ath9k-ar933x-usb-hang-workaround.patch
+@@ -0,0 +1,79 @@
++--- a/drivers/net/wireless/ath/ath9k/hw.c
+++++ b/drivers/net/wireless/ath/ath9k/hw.c
++@@ -247,6 +247,19 @@ void ath9k_hw_get_channel_centers(struct
++ 		centers->synth_center + (extoff * HT40_CHANNEL_CENTER_SHIFT);
++ }
++ 
+++static inline void ath9k_hw_disable_pll_lock_detect(struct ath_hw *ah)
+++{
+++	/* On AR9330 and AR9340 devices, some PHY registers must be
+++	 * tuned to gain better stability/performance. These registers
+++	 * might be changed while doing wlan reset so the registers must
+++	 * be reprogrammed after each reset.
+++	 */
+++	REG_CLR_BIT(ah, AR_PHY_USB_CTRL1, BIT(20));
+++	REG_RMW(ah, AR_PHY_USB_CTRL2,
+++		(1 << 21) | (0xf << 22),
+++		(1 << 21) | (0x3 << 22));
+++}
+++
++ /******************/
++ /* Chip Revisions */
++ /******************/
++@@ -1454,6 +1467,9 @@ static bool ath9k_hw_set_reset(struct at
++ 		udelay(50);
++ 	}
++ 
+++	if (AR_SREV_9330(ah) || AR_SREV_9340(ah))
+++		ath9k_hw_disable_pll_lock_detect(ah);
+++
++ 	return true;
++ }
++ 
++@@ -1553,6 +1569,9 @@ static bool ath9k_hw_chip_reset(struct a
++ 		ar9003_hw_internal_regulator_apply(ah);
++ 	ath9k_hw_init_pll(ah, chan);
++ 
+++	if (AR_SREV_9330(ah) || AR_SREV_9340(ah))
+++		ath9k_hw_disable_pll_lock_detect(ah);
+++
++ 	return true;
++ }
++ 
++@@ -1859,8 +1878,14 @@ static int ath9k_hw_do_fastcc(struct ath
++ 	if (AR_SREV_9271(ah))
++ 		ar9002_hw_load_ani_reg(ah, chan);
++ 
+++	if (AR_SREV_9330(ah) || AR_SREV_9340(ah))
+++		ath9k_hw_disable_pll_lock_detect(ah);
+++
++ 	return 0;
++ fail:
+++	if (AR_SREV_9330(ah) || AR_SREV_9340(ah))
+++		ath9k_hw_disable_pll_lock_detect(ah);
+++
++ 	return -EINVAL;
++ }
++ 
++@@ -2114,6 +2139,9 @@ int ath9k_hw_reset(struct ath_hw *ah, st
++ 		ath9k_hw_set_radar_params(ah);
++ 	}
++ 
+++	if (AR_SREV_9330(ah) || AR_SREV_9340(ah))
+++		ath9k_hw_disable_pll_lock_detect(ah);
+++
++ 	return 0;
++ }
++ EXPORT_SYMBOL(ath9k_hw_reset);
++--- a/drivers/net/wireless/ath/ath9k/phy.h
+++++ b/drivers/net/wireless/ath/ath9k/phy.h
++@@ -48,6 +48,9 @@
++ #define AR_PHY_PLL_CONTROL 0x16180
++ #define AR_PHY_PLL_MODE 0x16184
++ 
+++#define AR_PHY_USB_CTRL1	0x16c84
+++#define AR_PHY_USB_CTRL2	0x16c88
+++
++ enum ath9k_ant_div_comb_lna_conf {
++ 	ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2,
++ 	ATH_ANT_DIV_COMB_LNA2,
+diff --git a/package/kernel/mac80211/patches/ath9k/545-ath9k_ani_ws_detect.patch b/package/kernel/mac80211/patches/ath9k/545-ath9k_ani_ws_detect.patch
+new file mode 100644
+index 0000000000..d3bf07ff92
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/545-ath9k_ani_ws_detect.patch
+@@ -0,0 +1,155 @@
++--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+++++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
++@@ -969,55 +969,6 @@ static bool ar5008_hw_ani_control_new(st
++ 		 * on == 0 means more noise imm
++ 		 */
++ 		u32 on = param ? 1 : 0;
++-		/*
++-		 * make register setting for default
++-		 * (weak sig detect ON) come from INI file
++-		 */
++-		int m1ThreshLow = on ?
++-			aniState->iniDef.m1ThreshLow : m1ThreshLow_off;
++-		int m2ThreshLow = on ?
++-			aniState->iniDef.m2ThreshLow : m2ThreshLow_off;
++-		int m1Thresh = on ?
++-			aniState->iniDef.m1Thresh : m1Thresh_off;
++-		int m2Thresh = on ?
++-			aniState->iniDef.m2Thresh : m2Thresh_off;
++-		int m2CountThr = on ?
++-			aniState->iniDef.m2CountThr : m2CountThr_off;
++-		int m2CountThrLow = on ?
++-			aniState->iniDef.m2CountThrLow : m2CountThrLow_off;
++-		int m1ThreshLowExt = on ?
++-			aniState->iniDef.m1ThreshLowExt : m1ThreshLowExt_off;
++-		int m2ThreshLowExt = on ?
++-			aniState->iniDef.m2ThreshLowExt : m2ThreshLowExt_off;
++-		int m1ThreshExt = on ?
++-			aniState->iniDef.m1ThreshExt : m1ThreshExt_off;
++-		int m2ThreshExt = on ?
++-			aniState->iniDef.m2ThreshExt : m2ThreshExt_off;
++-
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
++-			      AR_PHY_SFCORR_LOW_M1_THRESH_LOW,
++-			      m1ThreshLow);
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
++-			      AR_PHY_SFCORR_LOW_M2_THRESH_LOW,
++-			      m2ThreshLow);
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR,
++-			      AR_PHY_SFCORR_M1_THRESH, m1Thresh);
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR,
++-			      AR_PHY_SFCORR_M2_THRESH, m2Thresh);
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR,
++-			      AR_PHY_SFCORR_M2COUNT_THR, m2CountThr);
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
++-			      AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW,
++-			      m2CountThrLow);
++-
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
++-			      AR_PHY_SFCORR_EXT_M1_THRESH_LOW, m1ThreshLowExt);
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
++-			      AR_PHY_SFCORR_EXT_M2_THRESH_LOW, m2ThreshLowExt);
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
++-			      AR_PHY_SFCORR_EXT_M1_THRESH, m1ThreshExt);
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
++-			      AR_PHY_SFCORR_EXT_M2_THRESH, m2ThreshExt);
++ 
++ 		if (on)
++ 			REG_SET_BIT(ah, AR_PHY_SFCORR_LOW,
++--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
++@@ -42,20 +42,6 @@ static const int cycpwrThr1_table[] =
++ /* level:  0   1   2   3   4   5   6   7   8  */
++ 	{ -6, -4, -2,  0,  2,  4,  6,  8 };     /* lvl 0-7, default 3 */
++ 
++-/*
++- * register values to turn OFDM weak signal detection OFF
++- */
++-static const int m1ThreshLow_off = 127;
++-static const int m2ThreshLow_off = 127;
++-static const int m1Thresh_off = 127;
++-static const int m2Thresh_off = 127;
++-static const int m2CountThr_off =  31;
++-static const int m2CountThrLow_off =  63;
++-static const int m1ThreshLowExt_off = 127;
++-static const int m2ThreshLowExt_off = 127;
++-static const int m1ThreshExt_off = 127;
++-static const int m2ThreshExt_off = 127;
++-
++ static const u8 ofdm2pwr[] = {
++ 	ALL_TARGET_LEGACY_6_24,
++ 	ALL_TARGET_LEGACY_6_24,
++@@ -1068,11 +1054,6 @@ static bool ar9003_hw_ani_control(struct
++ 	struct ath_common *common = ath9k_hw_common(ah);
++ 	struct ath9k_channel *chan = ah->curchan;
++ 	struct ar5416AniState *aniState = &ah->ani;
++-	int m1ThreshLow, m2ThreshLow;
++-	int m1Thresh, m2Thresh;
++-	int m2CountThr, m2CountThrLow;
++-	int m1ThreshLowExt, m2ThreshLowExt;
++-	int m1ThreshExt, m2ThreshExt;
++ 	s32 value, value2;
++ 
++ 	switch (cmd & ah->ani_function) {
++@@ -1086,61 +1067,6 @@ static bool ar9003_hw_ani_control(struct
++ 		 */
++ 		u32 on = param ? 1 : 0;
++ 
++-		if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
++-			goto skip_ws_det;
++-
++-		m1ThreshLow = on ?
++-			aniState->iniDef.m1ThreshLow : m1ThreshLow_off;
++-		m2ThreshLow = on ?
++-			aniState->iniDef.m2ThreshLow : m2ThreshLow_off;
++-		m1Thresh = on ?
++-			aniState->iniDef.m1Thresh : m1Thresh_off;
++-		m2Thresh = on ?
++-			aniState->iniDef.m2Thresh : m2Thresh_off;
++-		m2CountThr = on ?
++-			aniState->iniDef.m2CountThr : m2CountThr_off;
++-		m2CountThrLow = on ?
++-			aniState->iniDef.m2CountThrLow : m2CountThrLow_off;
++-		m1ThreshLowExt = on ?
++-			aniState->iniDef.m1ThreshLowExt : m1ThreshLowExt_off;
++-		m2ThreshLowExt = on ?
++-			aniState->iniDef.m2ThreshLowExt : m2ThreshLowExt_off;
++-		m1ThreshExt = on ?
++-			aniState->iniDef.m1ThreshExt : m1ThreshExt_off;
++-		m2ThreshExt = on ?
++-			aniState->iniDef.m2ThreshExt : m2ThreshExt_off;
++-
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
++-			      AR_PHY_SFCORR_LOW_M1_THRESH_LOW,
++-			      m1ThreshLow);
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
++-			      AR_PHY_SFCORR_LOW_M2_THRESH_LOW,
++-			      m2ThreshLow);
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR,
++-			      AR_PHY_SFCORR_M1_THRESH,
++-			      m1Thresh);
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR,
++-			      AR_PHY_SFCORR_M2_THRESH,
++-			      m2Thresh);
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR,
++-			      AR_PHY_SFCORR_M2COUNT_THR,
++-			      m2CountThr);
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
++-			      AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW,
++-			      m2CountThrLow);
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
++-			      AR_PHY_SFCORR_EXT_M1_THRESH_LOW,
++-			      m1ThreshLowExt);
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
++-			      AR_PHY_SFCORR_EXT_M2_THRESH_LOW,
++-			      m2ThreshLowExt);
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
++-			      AR_PHY_SFCORR_EXT_M1_THRESH,
++-			      m1ThreshExt);
++-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
++-			      AR_PHY_SFCORR_EXT_M2_THRESH,
++-			      m2ThreshExt);
++-skip_ws_det:
++ 		if (on)
++ 			REG_SET_BIT(ah, AR_PHY_SFCORR_LOW,
++ 				    AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
+diff --git a/package/kernel/mac80211/patches/ath9k/547-ath9k_led_defstate_fix.patch b/package/kernel/mac80211/patches/ath9k/547-ath9k_led_defstate_fix.patch
+new file mode 100644
+index 0000000000..5d84cf0c42
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/547-ath9k_led_defstate_fix.patch
+@@ -0,0 +1,29 @@
++From: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
++Date: Sun, 31 Jan 2016 20:48:49 +0100
++Subject: [PATCH v4 2/8] mac80211: ath9k: set default state for platform LEDs
++
++Support default state for platform LEDs connected to ath9k device.
++Now LEDs are correctly set on or off at ath9k module initialization.
++Very useful if power LED is connected to wireless chip.
++
++Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
++---
++ gpio.c |    7 +++++--
++ 1 file changed, 5 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/wireless/ath/ath9k/gpio.c
+++++ b/drivers/net/wireless/ath/ath9k/gpio.c
++@@ -74,8 +74,11 @@ static int ath_add_led(struct ath_softc
++ 	ath9k_hw_gpio_request_out(sc->sc_ah, gpio->gpio, gpio->name,
++ 				  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
++ 
++-	/* LED off */
++-	ath9k_hw_set_gpio(sc->sc_ah, gpio->gpio, gpio->active_low);
+++	/* Set default LED state */
+++	if (gpio->default_state == LEDS_GPIO_DEFSTATE_ON)
+++		ath9k_hw_set_gpio(sc->sc_ah, gpio->gpio, !gpio->active_low);
+++	else
+++		ath9k_hw_set_gpio(sc->sc_ah, gpio->gpio, gpio->active_low);
++ 
++ 	return 0;
++ }
+diff --git a/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch b/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch
+new file mode 100644
+index 0000000000..78206d2860
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch
+@@ -0,0 +1,251 @@
++From: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
++Date: Sun, 31 Jan 2016 21:01:31 +0100
++Subject: [PATCH v4 4/8] mac80211: ath9k: enable access to GPIO
++
++Enable access to GPIO chip and its pins for Atheros AR92xx
++wireless devices. For now AR9285 and AR9287 are supported.
++
++Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++++ b/drivers/net/wireless/ath/ath9k/ath9k.h
++@@ -24,6 +24,7 @@
++ #include <linux/completion.h>
++ #include <linux/time.h>
++ #include <linux/hw_random.h>
+++#include <linux/gpio/driver.h>
++ 
++ #include "common.h"
++ #include "debug.h"
++@@ -989,6 +990,14 @@ struct ath_led {
++ 	struct led_classdev cdev;
++ };
++ 
+++#ifdef CONFIG_GPIOLIB
+++struct ath9k_gpio_chip {
+++	struct ath_softc *sc;
+++	char label[32];
+++	struct gpio_chip gchip;
+++};
+++#endif
+++
++ struct ath_softc {
++ 	struct ieee80211_hw *hw;
++ 	struct device *dev;
++@@ -1044,6 +1053,9 @@ struct ath_softc {
++ #ifdef CPTCFG_MAC80211_LEDS
++ 	const char *led_default_trigger;
++ 	struct list_head leds;
+++#ifdef CONFIG_GPIOLIB
+++	struct ath9k_gpio_chip *gpiochip;
+++#endif
++ #endif
++ 
++ #ifdef CPTCFG_ATH9K_DEBUGFS
++--- a/drivers/net/wireless/ath/ath9k/gpio.c
+++++ b/drivers/net/wireless/ath/ath9k/gpio.c
++@@ -16,13 +16,139 @@
++ 
++ #include "ath9k.h"
++ #include <linux/ath9k_platform.h>
+++#include <linux/gpio.h>
+++
+++#ifdef CPTCFG_MAC80211_LEDS
+++
+++#ifdef CONFIG_GPIOLIB
+++
+++/***************/
+++/*  GPIO Chip  */
+++/***************/
+++
+++/* gpio_chip handler : set GPIO to input */
+++static int ath9k_gpio_pin_cfg_input(struct gpio_chip *chip, unsigned offset)
+++{
+++	struct ath9k_gpio_chip *gc = container_of(chip, struct ath9k_gpio_chip,
+++						  gchip);
+++
+++	ath9k_hw_gpio_request_in(gc->sc->sc_ah, offset, "ath9k-gpio");
+++
+++	return 0;
+++}
+++
+++/* gpio_chip handler : set GPIO to output */
+++static int ath9k_gpio_pin_cfg_output(struct gpio_chip *chip, unsigned offset,
+++				     int value)
+++{
+++	struct ath9k_gpio_chip *gc = container_of(chip, struct ath9k_gpio_chip,
+++						  gchip);
+++
+++	ath9k_hw_gpio_request_out(gc->sc->sc_ah, offset, "ath9k-gpio",
+++				  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
+++	ath9k_hw_set_gpio(gc->sc->sc_ah, offset, value);
+++
+++	return 0;
+++}
+++
+++/* gpio_chip handler : query GPIO direction (0=out, 1=in) */
+++static int ath9k_gpio_pin_get_dir(struct gpio_chip *chip, unsigned offset)
+++{
+++	struct ath9k_gpio_chip *gc = container_of(chip, struct ath9k_gpio_chip,
+++						  gchip);
+++	struct ath_hw *ah = gc->sc->sc_ah;
+++
+++	return !((REG_READ(ah, AR_GPIO_OE_OUT) >> (offset * 2)) & 3);
+++}
+++
+++/* gpio_chip handler : get GPIO pin value */
+++static int ath9k_gpio_pin_get(struct gpio_chip *chip, unsigned offset)
+++{
+++	struct ath9k_gpio_chip *gc = container_of(chip, struct ath9k_gpio_chip,
+++						  gchip);
+++
+++	return ath9k_hw_gpio_get(gc->sc->sc_ah, offset);
+++}
+++
+++/* gpio_chip handler : set GPIO pin to value */
+++static void ath9k_gpio_pin_set(struct gpio_chip *chip, unsigned offset,
+++			       int value)
+++{
+++	struct ath9k_gpio_chip *gc = container_of(chip, struct ath9k_gpio_chip,
+++						  gchip);
+++
+++	ath9k_hw_set_gpio(gc->sc->sc_ah, offset, value);
+++}
+++
+++/* register GPIO chip */
+++static void ath9k_register_gpio_chip(struct ath_softc *sc)
+++{
+++	struct ath9k_gpio_chip *gc;
+++	struct ath_hw *ah = sc->sc_ah;
+++
+++	gc = kzalloc(sizeof(struct ath9k_gpio_chip), GFP_KERNEL);
+++	if (!gc)
+++		return;
+++
+++	gc->sc = sc;
+++	snprintf(gc->label, sizeof(gc->label), "ath9k-%s",
+++		 wiphy_name(sc->hw->wiphy));
+++#ifdef CONFIG_OF
+++#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,5,0)
+++	gc->gchip.parent = sc->dev;
+++#else
+++	gc->gchip.dev = sc->dev;
+++#endif
+++#endif
+++	gc->gchip.label = gc->label;
+++	gc->gchip.base = -1;	/* determine base automatically */
+++	gc->gchip.ngpio = ah->caps.num_gpio_pins;
+++	gc->gchip.direction_input = ath9k_gpio_pin_cfg_input;
+++	gc->gchip.direction_output = ath9k_gpio_pin_cfg_output;
+++	gc->gchip.get_direction = ath9k_gpio_pin_get_dir;
+++	gc->gchip.get = ath9k_gpio_pin_get;
+++	gc->gchip.set = ath9k_gpio_pin_set;
+++
+++	if (gpiochip_add(&gc->gchip)) {
+++		kfree(gc);
+++		return;
+++	}
+++
+++#ifdef CONFIG_OF
+++	gc->gchip.owner = NULL;
+++#endif
+++	sc->gpiochip = gc;
+++}
+++
+++/* remove GPIO chip */
+++static void ath9k_unregister_gpio_chip(struct ath_softc *sc)
+++{
+++	struct ath9k_gpio_chip *gc = sc->gpiochip;
+++
+++	if (!gc)
+++		return;
+++
+++	gpiochip_remove(&gc->gchip);
+++	kfree(gc);
+++	sc->gpiochip = NULL;
+++}
+++
+++#else /* CONFIG_GPIOLIB */
+++
+++static inline void ath9k_register_gpio_chip(struct ath_softc *sc)
+++{
+++}
+++
+++static inline void ath9k_unregister_gpio_chip(struct ath_softc *sc)
+++{
+++}
+++
+++#endif /* CONFIG_GPIOLIB */
++ 
++ /********************************/
++ /*	 LED functions		*/
++ /********************************/
++ 
++-#ifdef CPTCFG_MAC80211_LEDS
++-
++ static void ath_fill_led_pin(struct ath_softc *sc)
++ {
++ 	struct ath_hw *ah = sc->sc_ah;
++@@ -80,6 +206,12 @@ static int ath_add_led(struct ath_softc
++ 	else
++ 		ath9k_hw_set_gpio(sc->sc_ah, gpio->gpio, gpio->active_low);
++ 
+++#ifdef CONFIG_GPIOLIB
+++	/* If there is GPIO chip configured, reserve LED pin */
+++	if (sc->gpiochip)
+++		gpio_request(sc->gpiochip->gchip.base + gpio->gpio, gpio->name);
+++#endif
+++
++ 	return 0;
++ }
++ 
++@@ -136,17 +268,24 @@ void ath_deinit_leds(struct ath_softc *s
++ 
++ 	while (!list_empty(&sc->leds)) {
++ 		led = list_first_entry(&sc->leds, struct ath_led, list);
+++#ifdef CONFIG_GPIOLIB
+++		/* If there is GPIO chip configured, free LED pin */
+++		if (sc->gpiochip)
+++			gpio_free(sc->gpiochip->gchip.base + led->gpio->gpio);
+++#endif
++ 		list_del(&led->list);
++ 		ath_led_brightness(&led->cdev, LED_OFF);
++ 		led_classdev_unregister(&led->cdev);
++ 		ath9k_hw_gpio_free(sc->sc_ah, led->gpio->gpio);
++ 		kfree(led);
++ 	}
+++	ath9k_unregister_gpio_chip(sc);
++ }
++ 
++ void ath_init_leds(struct ath_softc *sc)
++ {
++ 	struct ath9k_platform_data *pdata = sc->dev->platform_data;
+++	struct device_node *np = sc->dev->of_node;
++ 	char led_name[32];
++ 	const char *trigger;
++ 	int i;
++@@ -156,6 +295,15 @@ void ath_init_leds(struct ath_softc *sc)
++ 	if (AR_SREV_9100(sc->sc_ah))
++ 		return;
++ 
+++	if (!np)
+++		ath9k_register_gpio_chip(sc);
+++
+++	/* setup gpio controller only if requested and skip the led_pin setup */
+++	if (of_property_read_bool(np, "gpio-controller")) {
+++		ath9k_register_gpio_chip(sc);
+++		return;
+++	}
+++
++ 	ath_fill_led_pin(sc);
++ 
++ 	if (pdata && pdata->leds && pdata->num_leds)
++@@ -180,6 +328,7 @@ void ath_init_leds(struct ath_softc *sc)
++ 	ath_create_gpio_led(sc, sc->sc_ah->led_pin, led_name, trigger,
++ 			   !sc->sc_ah->config.led_active_high);
++ }
+++
++ #endif
++ 
++ /*******************/
+diff --git a/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch b/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
+new file mode 100644
+index 0000000000..716e09f351
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
+@@ -0,0 +1,143 @@
++From: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
++Subject: [PATCH v5 5/8] mac80211: ath9k: enable GPIO buttons
++
++Enable platform-defined GPIO button support for ath9k device.
++Key poller is activated for attached platform buttons.
++Requires ath9k GPIO chip access.
++
++Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++++ b/drivers/net/wireless/ath/ath9k/ath9k.h
++@@ -1055,6 +1055,7 @@ struct ath_softc {
++ 	struct list_head leds;
++ #ifdef CONFIG_GPIOLIB
++ 	struct ath9k_gpio_chip *gpiochip;
+++	struct platform_device *btnpdev;	/* gpio-keys-polled */
++ #endif
++ #endif
++ 
++--- a/drivers/net/wireless/ath/ath9k/gpio.c
+++++ b/drivers/net/wireless/ath/ath9k/gpio.c
++@@ -17,6 +17,8 @@
++ #include "ath9k.h"
++ #include <linux/ath9k_platform.h>
++ #include <linux/gpio.h>
+++#include <linux/platform_device.h>
+++#include <linux/gpio_keys.h>
++ 
++ #ifdef CPTCFG_MAC80211_LEDS
++ 
++@@ -133,6 +135,67 @@ static void ath9k_unregister_gpio_chip(s
++ 	sc->gpiochip = NULL;
++ }
++ 
+++/******************/
+++/*  GPIO Buttons  */
+++/******************/
+++
+++/* add GPIO buttons */
+++static void ath9k_init_buttons(struct ath_softc *sc)
+++{
+++	struct ath9k_platform_data *pdata = sc->dev->platform_data;
+++	struct platform_device *pdev;
+++	struct gpio_keys_platform_data gkpdata;
+++	struct gpio_keys_button *bt;
+++	int i;
+++
+++	if (!sc->gpiochip)
+++		return;
+++
+++	if (!pdata || !pdata->btns || !pdata->num_btns)
+++		return;
+++
+++	bt = devm_kmemdup(sc->dev, pdata->btns,
+++			  pdata->num_btns * sizeof(struct gpio_keys_button),
+++			  GFP_KERNEL);
+++	if (!bt)
+++		return;
+++
+++	for (i = 0; i < pdata->num_btns; i++) {
+++		if (pdata->btns[i].gpio == sc->sc_ah->led_pin)
+++				sc->sc_ah->led_pin = -1;
+++
+++		ath9k_hw_gpio_request_in(sc->sc_ah, pdata->btns[i].gpio,
+++					 "ath9k-gpio");
+++		bt[i].gpio = sc->gpiochip->gchip.base + pdata->btns[i].gpio;
+++	}
+++
+++	memset(&gkpdata, 0, sizeof(struct gpio_keys_platform_data));
+++	gkpdata.buttons = bt;
+++	gkpdata.nbuttons = pdata->num_btns;
+++	gkpdata.poll_interval = pdata->btn_poll_interval;
+++
+++	pdev = platform_device_register_data(sc->dev, "gpio-keys-polled",
+++					     PLATFORM_DEVID_AUTO, &gkpdata,
+++					     sizeof(gkpdata));
+++	if (!IS_ERR_OR_NULL(pdev))
+++		sc->btnpdev = pdev;
+++	else {
+++		sc->btnpdev = NULL;
+++		devm_kfree(sc->dev, bt);
+++	}
+++}
+++
+++/* remove GPIO buttons */
+++static void ath9k_deinit_buttons(struct ath_softc *sc)
+++{
+++	if (!sc->gpiochip || !sc->btnpdev)
+++		return;
+++
+++	platform_device_unregister(sc->btnpdev);
+++
+++	sc->btnpdev = NULL;
+++}
+++
++ #else /* CONFIG_GPIOLIB */
++ 
++ static inline void ath9k_register_gpio_chip(struct ath_softc *sc)
++@@ -143,6 +206,14 @@ static inline void ath9k_unregister_gpio
++ {
++ }
++ 
+++static inline void ath9k_init_buttons(struct ath_softc *sc)
+++{
+++}
+++
+++static inline void ath9k_deinit_buttons(struct ath_softc *sc)
+++{
+++}
+++
++ #endif /* CONFIG_GPIOLIB */
++ 
++ /********************************/
++@@ -266,6 +337,7 @@ void ath_deinit_leds(struct ath_softc *s
++ {
++ 	struct ath_led *led;
++ 
+++	ath9k_deinit_buttons(sc);
++ 	while (!list_empty(&sc->leds)) {
++ 		led = list_first_entry(&sc->leds, struct ath_led, list);
++ #ifdef CONFIG_GPIOLIB
++@@ -305,6 +377,7 @@ void ath_init_leds(struct ath_softc *sc)
++ 	}
++ 
++ 	ath_fill_led_pin(sc);
+++	ath9k_init_buttons(sc);
++ 
++ 	if (pdata && pdata->leds && pdata->num_leds)
++ 		for (i = 0; i < pdata->num_leds; i++) {
++--- a/include/linux/ath9k_platform.h
+++++ b/include/linux/ath9k_platform.h
++@@ -49,6 +49,10 @@ struct ath9k_platform_data {
++ 
++ 	int num_leds;
++ 	const struct gpio_led *leds;
+++
+++	unsigned num_btns;
+++	const struct gpio_keys_button *btns;
+++	unsigned btn_poll_interval;
++ };
++ 
++ #endif /* _LINUX_ATH9K_PLATFORM_H */
+diff --git a/package/kernel/mac80211/patches/ath9k/551-ath9k_ubnt_uap_plus_hsr.patch b/package/kernel/mac80211/patches/ath9k/551-ath9k_ubnt_uap_plus_hsr.patch
+new file mode 100644
+index 0000000000..efc4b9187c
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/551-ath9k_ubnt_uap_plus_hsr.patch
+@@ -0,0 +1,403 @@
++--- a/drivers/net/wireless/ath/ath9k/channel.c
+++++ b/drivers/net/wireless/ath/ath9k/channel.c
++@@ -15,6 +15,7 @@
++  */
++ 
++ #include "ath9k.h"
+++#include "hsr.h"
++ 
++ /* Set/change channels.  If the channel is really being changed, it's done
++  * by reseting the chip.  To accomplish this we must first cleanup any pending
++@@ -22,6 +23,7 @@
++  */
++ static int ath_set_channel(struct ath_softc *sc)
++ {
+++	struct device_node *np = sc->dev->of_node;
++ 	struct ath_hw *ah = sc->sc_ah;
++ 	struct ath_common *common = ath9k_hw_common(ah);
++ 	struct ieee80211_hw *hw = sc->hw;
++@@ -42,6 +44,11 @@ static int ath_set_channel(struct ath_so
++ 	ath_dbg(common, CONFIG, "Set channel: %d MHz width: %d\n",
++ 		chan->center_freq, chandef->width);
++ 
+++	if (of_property_read_bool(np, "ubnt,hsr")) {
+++		ath9k_hsr_enable(ah, chandef->width, chan->center_freq);
+++		ath9k_hsr_status(ah);
+++	}
+++
++ 	/* update survey stats for the old channel before switching */
++ 	spin_lock_irqsave(&common->cc_lock, flags);
++ 	ath_update_survey_stats(sc);
++--- /dev/null
+++++ b/drivers/net/wireless/ath/ath9k/hsr.c
++@@ -0,0 +1,247 @@
+++/*
+++ *
+++ * The MIT License (MIT)
+++ *
+++ * Copyright (c) 2015 Kirill Berezin
+++ *
+++ * Permission is hereby granted, free of charge, to any person obtaining a copy
+++ * of this software and associated documentation files (the "Software"), to deal
+++ * in the Software without restriction, including without limitation the rights
+++ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+++ * copies of the Software, and to permit persons to whom the Software is
+++ * furnished to do so, subject to the following conditions:
+++ *
+++ * The above copyright notice and this permission notice shall be included in
+++ * all copies or substantial portions of the Software.
+++ *
+++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+++ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+++ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+++ * SOFTWARE.
+++ *
+++ */
+++
+++#include <linux/io.h>
+++#include <linux/slab.h>
+++#include <linux/module.h>
+++#include <linux/time.h>
+++#include <linux/bitops.h>
+++#include <linux/etherdevice.h>
+++#include <linux/rtnetlink.h>
+++#include <asm/unaligned.h>
+++
+++#include "hw.h"
+++#include "ath9k.h"
+++
+++#define HSR_GPIO_CSN 8
+++#define HSR_GPIO_CLK 6
+++#define HSR_GPIO_DOUT 7
+++#define HSR_GPIO_DIN 5
+++
+++/* delays are in useconds */
+++#define HSR_DELAY_HALF_TICK 100
+++#define HSR_DELAY_PRE_WRITE 75
+++#define HSR_DELAY_FINAL 20000
+++#define HSR_DELAY_TRAILING 200
+++
+++void ath9k_hsr_init(struct ath_hw *ah)
+++{
+++	ath9k_hw_gpio_request_in(ah, HSR_GPIO_DIN, NULL);
+++	ath9k_hw_gpio_request_out(ah, HSR_GPIO_CSN, NULL,
+++				  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
+++	ath9k_hw_gpio_request_out(ah, HSR_GPIO_CLK, NULL,
+++				  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
+++	ath9k_hw_gpio_request_out(ah, HSR_GPIO_DOUT, NULL,
+++				  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
+++
+++	ath9k_hw_set_gpio(ah, HSR_GPIO_CSN, 1);
+++	ath9k_hw_set_gpio(ah, HSR_GPIO_CLK, 0);
+++	ath9k_hw_set_gpio(ah, HSR_GPIO_DOUT, 0);
+++
+++	udelay(HSR_DELAY_TRAILING);
+++}
+++
+++static u32 ath9k_hsr_write_byte(struct ath_hw *ah, int delay, u32 value)
+++{
+++	struct ath_common *common = ath9k_hw_common(ah);
+++	int i;
+++	u32 rval = 0;
+++
+++	udelay(delay);
+++
+++	ath9k_hw_set_gpio(ah, HSR_GPIO_CLK, 0);
+++	udelay(HSR_DELAY_HALF_TICK);
+++
+++	ath9k_hw_set_gpio(ah, HSR_GPIO_CSN, 0);
+++	udelay(HSR_DELAY_HALF_TICK);
+++
+++	for (i = 0; i < 8; ++i) {
+++		rval = rval << 1;
+++
+++		/* pattern is left to right, that is 7-th bit runs first */
+++		ath9k_hw_set_gpio(ah, HSR_GPIO_DOUT, (value >> (7 - i)) & 0x1);
+++		udelay(HSR_DELAY_HALF_TICK);
+++
+++		ath9k_hw_set_gpio(ah, HSR_GPIO_CLK, 1);
+++		udelay(HSR_DELAY_HALF_TICK);
+++
+++		rval |= ath9k_hw_gpio_get(ah, HSR_GPIO_DIN);
+++
+++		ath9k_hw_set_gpio(ah, HSR_GPIO_CLK, 0);
+++		udelay(HSR_DELAY_HALF_TICK);
+++	}
+++
+++	ath9k_hw_set_gpio(ah, HSR_GPIO_CSN, 1);
+++	udelay(HSR_DELAY_HALF_TICK);
+++
+++	ath_dbg(common, CONFIG, "ath9k_hsr_write_byte: write byte %d return value is %d %c\n",
+++		value, rval, rval > 32 ? rval : '-');
+++
+++	return rval & 0xff;
+++}
+++
+++static int ath9k_hsr_write_a_chain(struct ath_hw *ah, char *chain, int items)
+++{
+++	int status = 0;
+++	int i = 0;
+++	int err;
+++
+++	/* a preamble */
+++	ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, 0);
+++	status = ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, 0);
+++
+++	/* clear HSR's reply buffer */
+++	if (status) {
+++		int loop = 0;
+++
+++		for (loop = 0; (loop < 42) && status; ++loop)
+++			status = ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE,
+++						      0);
+++
+++		if (loop >= 42) {
+++			ATH_DBG_WARN(1,
+++				     "ath9k_hsr_write_a_chain: can't clear an output buffer after a 42 cycles.\n");
+++			return -1;
+++		}
+++	}
+++
+++	for (i = 0; (i < items) && (chain[i] != 0); ++i)
+++		ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, (u32)chain[i]);
+++
+++	ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, 0);
+++	mdelay(HSR_DELAY_FINAL / 1000);
+++
+++	/* reply */
+++	memset(chain, 0, items);
+++
+++	ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, 0);
+++	udelay(HSR_DELAY_TRAILING);
+++
+++	for (i = 0; i < (items - 1); ++i) {
+++		u32 ret;
+++
+++		ret = ath9k_hsr_write_byte(ah, HSR_DELAY_PRE_WRITE, 0);
+++		if (ret != 0)
+++			chain[i] = (char)ret;
+++		else
+++			break;
+++
+++		udelay(HSR_DELAY_TRAILING);
+++	}
+++
+++	if (i <= 1)
+++		return 0;
+++
+++	err = kstrtoint(chain + 1, 10, &i);
+++	if (err)
+++		return err;
+++
+++	return i;
+++}
+++
+++int ath9k_hsr_disable(struct ath_hw *ah)
+++{
+++	char cmd[10] = {'b', '4', '0', 0, 0, 0, 0, 0, 0, 0};
+++	int ret;
+++
+++	ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
+++	if ((ret > 0) && (*cmd == 'B'))
+++		return 0;
+++
+++	return -1;
+++}
+++
+++int ath9k_hsr_enable(struct ath_hw *ah, int bw, int fq)
+++{
+++	char cmd[10];
+++	int ret;
+++
+++	/* Bandwidth argument is 0 sometimes. Assume default 802.11bgn
+++	 * 20MHz on invalid values
+++	 */
+++	if ((bw != 5) && (bw != 10) && (bw != 20) && (bw != 40))
+++		bw = 20;
+++
+++	memset(cmd, 0, sizeof(cmd));
+++	*cmd = 'b';
+++	snprintf(cmd + 1, 3, "%02d", bw);
+++
+++	ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
+++	if ((*cmd != 'B') || (ret != bw)) {
+++		ATH_DBG_WARN(1,
+++			     "ath9k_hsr_enable: failed changing bandwidth -> set (%d,%d) reply (%d, %d)\n",
+++			     'b', bw, *cmd, ret);
+++		return -1;
+++	}
+++
+++	memset(cmd, 0, sizeof(cmd));
+++	*cmd = 'x';
+++	ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
+++	if (*cmd != 'X') {
+++		ATH_DBG_WARN(1,
+++			     "ath9k_hsr_enable: failed 'x' command -> reply (%d, %d)\n",
+++			     *cmd, ret);
+++		return -1;
+++	}
+++
+++	memset(cmd, 0, sizeof(cmd));
+++	*cmd = 'm';
+++	ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
+++	if (*cmd != 'M') {
+++		ATH_DBG_WARN(1,
+++			     "ath9k_hsr_enable: failed 'm' command -> reply (%d, %d)\n",
+++			     *cmd, ret);
+++		return  -1;
+++	}
+++
+++	memset(cmd, 0, sizeof(cmd));
+++	*cmd = 'f';
+++	snprintf(cmd + 1, 6, "%05d", fq);
+++	ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
+++	if ((*cmd != 'F') && (ret != fq)) {
+++		ATH_DBG_WARN(1,
+++			     "ath9k_hsr_enable: failed set frequency -> reply (%d, %d)\n",
+++			     *cmd, ret);
+++		return -1;
+++	}
+++
+++	return 0;
+++}
+++
+++int ath9k_hsr_status(struct ath_hw *ah)
+++{
+++	char cmd[10] = {'s', 0, 0, 0, 0, 0, 0, 0, 0, 0};
+++	int ret;
+++
+++	ret = ath9k_hsr_write_a_chain(ah, cmd, sizeof(cmd));
+++	if (*cmd != 'S') {
+++		ATH_DBG_WARN(1, "ath9k_hsr_status: returned %d,%d\n", *cmd,
+++			     ret);
+++		return -1;
+++	}
+++
+++	return 0;
+++}
++--- /dev/null
+++++ b/drivers/net/wireless/ath/ath9k/hsr.h
++@@ -0,0 +1,48 @@
+++/*
+++ * The MIT License (MIT)
+++ *
+++ * Copyright (c) 2015 Kirill Berezin
+++ *
+++ * Permission is hereby granted, free of charge, to any person obtaining a copy
+++ * of this software and associated documentation files (the "Software"), to deal
+++ * in the Software without restriction, including without limitation the rights
+++ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+++ * copies of the Software, and to permit persons to whom the Software is
+++ * furnished to do so, subject to the following conditions:
+++ *
+++ * The above copyright notice and this permission notice shall be included in
+++ * all copies or substantial portions of the Software.
+++ *
+++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+++ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+++ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+++ * SOFTWARE.
+++ */
+++
+++#ifndef HSR_H
+++#define HSR_H
+++
+++#ifdef CPTCFG_ATH9K_UBNTHSR
+++
+++void ath9k_hsr_init(struct ath_hw *ah);
+++int ath9k_hsr_disable(struct ath_hw *ah);
+++int ath9k_hsr_enable(struct ath_hw *ah, int bw, int fq);
+++int ath9k_hsr_status(struct ath_hw *ah);
+++
+++#else
+++static inline void ath9k_hsr_init(struct ath_hw *ah) {}
+++
+++static inline int ath9k_hsr_enable(struct ath_hw *ah, int bw, int fq)
+++{
+++	return 0;
+++}
+++
+++static inline int ath9k_hsr_disable(struct ath_hw *ah) { return 0; }
+++static inline int ath9k_hsr_status(struct ath_hw *ah) { return 0; }
+++
+++#endif
+++
+++#endif /* HSR_H */
++--- a/drivers/net/wireless/ath/ath9k/main.c
+++++ b/drivers/net/wireless/ath/ath9k/main.c
++@@ -18,6 +18,7 @@
++ #include <linux/delay.h>
++ #include "ath9k.h"
++ #include "btcoex.h"
+++#include "hsr.h"
++ 
++ static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
++ 			u32 queues, bool drop);
++@@ -659,6 +660,7 @@ void ath_reset_work(struct work_struct *
++ static int ath9k_start(struct ieee80211_hw *hw)
++ {
++ 	struct ath_softc *sc = hw->priv;
+++	struct device_node *np = sc->dev->of_node;
++ 	struct ath_hw *ah = sc->sc_ah;
++ 	struct ath_common *common = ath9k_hw_common(ah);
++ 	struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
++@@ -737,6 +739,11 @@ static int ath9k_start(struct ieee80211_
++ 					  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
++ 	}
++ 
+++	if (of_property_read_bool(np, "ubnt,hsr")) {
+++		ath9k_hsr_init(ah);
+++		ath9k_hsr_disable(ah);
+++	}
+++
++ 	/*
++ 	 * Reset key cache to sane defaults (all entries cleared) instead of
++ 	 * semi-random values after suspend/resume.
++--- a/drivers/net/wireless/ath/ath9k/Makefile
+++++ b/drivers/net/wireless/ath/ath9k/Makefile
++@@ -17,6 +17,7 @@ ath9k-$(CPTCFG_ATH9K_DFS_CERTIFIED) += d
++ ath9k-$(CPTCFG_ATH9K_TX99) += tx99.o
++ ath9k-$(CPTCFG_ATH9K_WOW) += wow.o
++ ath9k-$(CPTCFG_ATH9K_HWRNG) += rng.o
+++ath9k-$(CPTCFG_ATH9K_UBNTHSR) += hsr.o
++ 
++ ath9k-$(CPTCFG_ATH9K_DEBUGFS) += debug.o
++ 
++--- a/local-symbols
+++++ b/local-symbols
++@@ -129,6 +129,7 @@ ATH9K_WOW=
++ ATH9K_RFKILL=
++ ATH9K_CHANNEL_CONTEXT=
++ ATH9K_PCOEM=
+++ATH9K_UBNTHSR=
++ ATH9K_PCI_NO_EEPROM=
++ ATH9K_HTC=
++ ATH9K_HTC_DEBUGFS=
++--- a/drivers/net/wireless/ath/ath9k/Kconfig
+++++ b/drivers/net/wireless/ath/ath9k/Kconfig
++@@ -58,6 +58,19 @@ config ATH9K_AHB
++ 	  Say Y, if you have a SoC with a compatible built-in
++ 	  wireless MAC. Say N if unsure.
++ 
+++config ATH9K_UBNTHSR
+++	bool "Ubiquiti UniFi Outdoor Plus HSR support"
+++	depends on ATH9K
+++	---help---
+++	  This options enables code to control the HSR RF
+++	  filter in the receive path of the Ubiquiti UniFi
+++	  Outdoor Plus access point.
+++
+++	  Say Y if you want to use the access point. The
+++	  code will only be used if the device is detected,
+++	  so it does not harm other setup other than occupying
+++	  a bit of memory.
+++
++ config ATH9K_DEBUGFS
++ 	bool "Atheros ath9k debugging"
++ 	depends on ATH9K && DEBUG_FS
+diff --git a/package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch b/package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch
+new file mode 100644
+index 0000000000..57eef54e89
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch
+@@ -0,0 +1,331 @@
++--- a/drivers/net/wireless/ath/ath9k/ahb.c
+++++ b/drivers/net/wireless/ath/ath9k/ahb.c
++@@ -20,7 +20,15 @@
++ #include <linux/platform_device.h>
++ #include <linux/module.h>
++ #include <linux/mod_devicetable.h>
+++#include <linux/of_device.h>
++ #include "ath9k.h"
+++#include <linux/ath9k_platform.h>
+++
+++#ifdef CONFIG_OF
+++#include <asm/mach-ath79/ath79.h>
+++#include <asm/mach-ath79/ar71xx_regs.h>
+++#include <linux/mtd/mtd.h>
+++#endif
++ 
++ static const struct platform_device_id ath9k_platform_id_table[] = {
++ 	{
++@@ -69,6 +77,236 @@ static const struct ath_bus_ops ath_ahb_
++ 	.eeprom_read = ath_ahb_eeprom_read,
++ };
++ 
+++#ifdef CONFIG_OF
+++
+++#define QCA955X_DDR_CTL_CONFIG          0x108
+++#define QCA955X_DDR_CTL_CONFIG_ACT_WMAC BIT(23)
+++
+++static int of_get_wifi_cal(struct device_node *np, struct ath9k_platform_data *pdata)
+++{
+++#ifdef CONFIG_MTD
+++	struct device_node *mtd_np = NULL;
+++	size_t retlen;
+++	int size, ret;
+++	struct mtd_info *mtd;
+++	const char *part;
+++	const __be32 *list;
+++	phandle phandle;
+++
+++	list = of_get_property(np, "mtd-cal-data", &size);
+++	if (!list)
+++		return 0;
+++
+++	if (size != (2 * sizeof(*list)))
+++		return 1;
+++
+++	phandle = be32_to_cpup(list++);
+++	if (phandle)
+++		mtd_np = of_find_node_by_phandle(phandle);
+++
+++	if (!mtd_np)
+++		return 1;
+++
+++	part = of_get_property(mtd_np, "label", NULL);
+++	if (!part)
+++		part = mtd_np->name;
+++
+++	mtd = get_mtd_device_nm(part);
+++	if (IS_ERR(mtd))
+++		return 1;
+++
+++	ret = mtd_read(mtd, be32_to_cpup(list), sizeof(pdata->eeprom_data),
+++			&retlen, (u8*)pdata->eeprom_data);
+++	put_mtd_device(mtd);
+++
+++#endif
+++	return 0;
+++}
+++
+++static int ar913x_wmac_reset(void)
+++{
+++	ath79_device_reset_set(AR913X_RESET_AMBA2WMAC);
+++	mdelay(10);
+++
+++	ath79_device_reset_clear(AR913X_RESET_AMBA2WMAC);
+++	mdelay(10);
+++
+++	return 0;
+++}
+++
+++static int ar933x_wmac_reset(void)
+++{
+++	int retries = 20;
+++
+++	ath79_device_reset_set(AR933X_RESET_WMAC);
+++	ath79_device_reset_clear(AR933X_RESET_WMAC);
+++
+++	while (1) {
+++		u32 bootstrap;
+++
+++		bootstrap = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
+++		if ((bootstrap & AR933X_BOOTSTRAP_EEPBUSY) == 0)
+++			return 0;
+++
+++		if (retries-- == 0)
+++			break;
+++
+++		udelay(10000);
+++	}
+++
+++	pr_err("ar933x: WMAC reset timed out");
+++	return -ETIMEDOUT;
+++}
+++
+++static int qca955x_wmac_reset(void)
+++{
+++	int i;
+++
+++	/* Try to wait for WMAC DDR activity to stop */
+++	for (i = 0; i < 10; i++) {
+++		if (!(__raw_readl(ath79_ddr_base + QCA955X_DDR_CTL_CONFIG) &
+++		    QCA955X_DDR_CTL_CONFIG_ACT_WMAC))
+++			break;
+++
+++		udelay(10);
+++	}
+++
+++	ath79_device_reset_set(QCA955X_RESET_RTC);
+++	udelay(10);
+++	ath79_device_reset_clear(QCA955X_RESET_RTC);
+++	udelay(10);
+++
+++	return 0;
+++}
+++
+++enum {
+++	AR913X_WMAC = 0,
+++	AR933X_WMAC,
+++	AR934X_WMAC,
+++	QCA953X_WMAC,
+++	QCA955X_WMAC,
+++	QCA956X_WMAC,
+++};
+++
+++static int ar9330_get_soc_revision(void)
+++{
+++	if (ath79_soc_rev == 1)
+++		return ath79_soc_rev;
+++
+++	return 0;
+++}
+++
+++static int ath79_get_soc_revision(void)
+++{
+++	return ath79_soc_rev;
+++}
+++
+++static const struct of_ath_ahb_data {
+++	u16 dev_id;
+++	u32 bootstrap_reg;
+++	u32 bootstrap_ref;
+++
+++	int (*soc_revision)(void);
+++	int (*wmac_reset)(void);
+++} of_ath_ahb_data[] = {
+++	[AR913X_WMAC] = {
+++		.dev_id = AR5416_AR9100_DEVID,
+++		.wmac_reset = ar913x_wmac_reset,
+++
+++	},
+++	[AR933X_WMAC] = {
+++		.dev_id = AR9300_DEVID_AR9330,
+++		.bootstrap_reg = AR933X_RESET_REG_BOOTSTRAP,
+++		.bootstrap_ref = AR933X_BOOTSTRAP_REF_CLK_40,
+++		.soc_revision = ar9330_get_soc_revision,
+++		.wmac_reset = ar933x_wmac_reset,
+++	},
+++	[AR934X_WMAC] = {
+++		.dev_id = AR9300_DEVID_AR9340,
+++		.bootstrap_reg = AR934X_RESET_REG_BOOTSTRAP,
+++		.bootstrap_ref = AR934X_BOOTSTRAP_REF_CLK_40,
+++		.soc_revision = ath79_get_soc_revision,
+++	},
+++	[QCA953X_WMAC] = {
+++		.dev_id = AR9300_DEVID_AR953X,
+++		.bootstrap_reg = QCA953X_RESET_REG_BOOTSTRAP,
+++		.bootstrap_ref = QCA953X_BOOTSTRAP_REF_CLK_40,
+++		.soc_revision = ath79_get_soc_revision,
+++	},
+++	[QCA955X_WMAC] = {
+++		.dev_id = AR9300_DEVID_QCA955X,
+++		.bootstrap_reg = QCA955X_RESET_REG_BOOTSTRAP,
+++		.bootstrap_ref = QCA955X_BOOTSTRAP_REF_CLK_40,
+++		.wmac_reset = qca955x_wmac_reset,
+++	},
+++	[QCA956X_WMAC] = {
+++		.dev_id = AR9300_DEVID_QCA956X,
+++		.bootstrap_reg = QCA956X_RESET_REG_BOOTSTRAP,
+++		.bootstrap_ref = QCA956X_BOOTSTRAP_REF_CLK_40,
+++		.soc_revision = ath79_get_soc_revision,
+++	},
+++};
+++
+++const struct of_device_id of_ath_ahb_match[] = {
+++	{ .compatible = "qca,ar9130-wmac", .data = &of_ath_ahb_data[AR913X_WMAC] },
+++	{ .compatible = "qca,ar9330-wmac", .data = &of_ath_ahb_data[AR933X_WMAC] },
+++	{ .compatible = "qca,ar9340-wmac", .data = &of_ath_ahb_data[AR934X_WMAC] },
+++	{ .compatible = "qca,qca9530-wmac", .data = &of_ath_ahb_data[QCA953X_WMAC] },
+++	{ .compatible = "qca,qca9550-wmac", .data = &of_ath_ahb_data[QCA955X_WMAC] },
+++	{ .compatible = "qca,qca9560-wmac", .data = &of_ath_ahb_data[QCA956X_WMAC] },
+++	{},
+++};
+++MODULE_DEVICE_TABLE(of, of_ath_ahb_match);
+++
+++static int of_ath_ahb_probe(struct platform_device *pdev)
+++{
+++	struct ath9k_platform_data *pdata;
+++	const struct of_device_id *match;
+++	const struct of_ath_ahb_data *data;
+++	u8 led_pin;
+++
+++	match = of_match_device(of_ath_ahb_match, &pdev->dev);
+++	data = (const struct of_ath_ahb_data *)match->data;
+++
+++	pdata = dev_get_platdata(&pdev->dev);
+++
+++	if (!of_property_read_u8(pdev->dev.of_node, "qca,led-pin", &led_pin))
+++		pdata->led_pin = led_pin;
+++	else
+++		pdata->led_pin = -1;
+++
+++	if (of_property_read_bool(pdev->dev.of_node, "qca,tx-gain-buffalo"))
+++		pdata->tx_gain_buffalo = true;
+++
+++	if (data->wmac_reset) {
+++		data->wmac_reset();
+++		pdata->external_reset = data->wmac_reset;
+++	}
+++
+++	if (data->dev_id == AR9300_DEVID_AR953X) {
+++		/*
+++		 * QCA953x only supports 25MHz refclk.
+++		 * Some vendors have an invalid bootstrap option
+++		 * set, which would break the WMAC here.
+++		 */
+++		pdata->is_clk_25mhz = true;
+++	} else if (data->bootstrap_reg && data->bootstrap_ref) {
+++		u32 t = ath79_reset_rr(data->bootstrap_reg);
+++		if (t & data->bootstrap_ref)
+++			pdata->is_clk_25mhz = false;
+++		else
+++			pdata->is_clk_25mhz = true;
+++	}
+++
+++	pdata->get_mac_revision = data->soc_revision;
+++
+++	if (of_get_wifi_cal(pdev->dev.of_node, pdata))
+++		dev_err(&pdev->dev, "failed to load calibration data from mtd device\n");
+++
+++	return data->dev_id;
+++}
+++#endif
+++
++ static int ath_ahb_probe(struct platform_device *pdev)
++ {
++ 	void __iomem *mem;
++@@ -80,6 +318,17 @@ static int ath_ahb_probe(struct platform
++ 	int ret = 0;
++ 	struct ath_hw *ah;
++ 	char hw_name[64];
+++	u16 dev_id;
+++
+++	if (id)
+++		dev_id = id->driver_data;
+++
+++#ifdef CONFIG_OF
+++	if (pdev->dev.of_node)
+++		pdev->dev.platform_data = devm_kzalloc(&pdev->dev,
+++					sizeof(struct ath9k_platform_data),
+++					GFP_KERNEL);
+++#endif
++ 
++ 	if (!dev_get_platdata(&pdev->dev)) {
++ 		dev_err(&pdev->dev, "no platform data specified\n");
++@@ -118,13 +367,16 @@ static int ath_ahb_probe(struct platform
++ 	sc->mem = mem;
++ 	sc->irq = irq;
++ 
+++#ifdef CONFIG_OF
+++	dev_id = of_ath_ahb_probe(pdev);
+++#endif
++ 	ret = request_irq(irq, ath_isr, IRQF_SHARED, "ath9k", sc);
++ 	if (ret) {
++ 		dev_err(&pdev->dev, "request_irq failed\n");
++ 		goto err_free_hw;
++ 	}
++ 
++-	ret = ath9k_init_device(id->driver_data, sc, &ath_ahb_bus_ops);
+++	ret = ath9k_init_device(dev_id, sc, &ath_ahb_bus_ops);
++ 	if (ret) {
++ 		dev_err(&pdev->dev, "failed to initialize device\n");
++ 		goto err_irq;
++@@ -155,6 +407,9 @@ static int ath_ahb_remove(struct platfor
++ 		free_irq(sc->irq, sc);
++ 		ieee80211_free_hw(sc->hw);
++ 	}
+++#ifdef CONFIG_OF
+++	pdev->dev.platform_data = NULL;
+++#endif
++ 
++ 	return 0;
++ }
++@@ -164,6 +419,9 @@ static struct platform_driver ath_ahb_dr
++ 	.remove     = ath_ahb_remove,
++ 	.driver		= {
++ 		.name	= "ath9k",
+++#ifdef CONFIG_OF
+++		.of_match_table = of_ath_ahb_match,
+++#endif
++ 	},
++ 	.id_table    = ath9k_platform_id_table,
++ };
++--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++++ b/drivers/net/wireless/ath/ath9k/ath9k.h
++@@ -25,6 +25,7 @@
++ #include <linux/time.h>
++ #include <linux/hw_random.h>
++ #include <linux/gpio/driver.h>
+++#include <linux/reset.h>
++ 
++ #include "common.h"
++ #include "debug.h"
++@@ -1011,6 +1012,9 @@ struct ath_softc {
++ 	struct ath_hw *sc_ah;
++ 	void __iomem *mem;
++ 	int irq;
+++#ifdef CONFIG_OF
+++	struct reset_control *reset;
+++#endif
++ 	spinlock_t sc_serial_rw;
++ 	spinlock_t sc_pm_lock;
++ 	spinlock_t sc_pcu_lock;
+diff --git a/package/kernel/mac80211/patches/ath9k/553-ath9k_of_gpio_mask.patch b/package/kernel/mac80211/patches/ath9k/553-ath9k_of_gpio_mask.patch
+new file mode 100644
+index 0000000000..6d1820ecb7
+--- /dev/null
++++ b/package/kernel/mac80211/patches/ath9k/553-ath9k_of_gpio_mask.patch
+@@ -0,0 +1,25 @@
++--- a/drivers/net/wireless/ath/ath9k/init.c
+++++ b/drivers/net/wireless/ath/ath9k/init.c
++@@ -696,6 +696,12 @@ static int ath9k_of_init(struct ath_soft
++ 	return 0;
++ }
++ 
+++static void ath9k_of_gpio_mask(struct ath_softc *sc)
+++{
+++	of_property_read_u32(sc->dev->of_node, "qca,gpio-mask",
+++			     &sc->sc_ah->caps.gpio_mask);
+++}
+++
++ static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
++ 			    const struct ath_bus_ops *bus_ops)
++ {
++@@ -803,6 +809,9 @@ static int ath9k_init_softc(u16 devid, s
++ 	if (ret)
++ 		goto err_hw;
++ 
+++	/* GPIO mask quirk */
+++	ath9k_of_gpio_mask(sc);
+++
++ 	ret = ath9k_init_queues(sc);
++ 	if (ret)
++ 		goto err_queues;
+diff --git a/package/kernel/mac80211/patches/brcm/040-brcmutil_option.patch b/package/kernel/mac80211/patches/brcm/040-brcmutil_option.patch
+new file mode 100644
+index 0000000000..3e8505b5b4
+--- /dev/null
++++ b/package/kernel/mac80211/patches/brcm/040-brcmutil_option.patch
+@@ -0,0 +1,10 @@
++--- a/drivers/net/wireless/broadcom/brcm80211/Kconfig
+++++ b/drivers/net/wireless/broadcom/brcm80211/Kconfig
++@@ -1,6 +1,6 @@
++ # SPDX-License-Identifier: GPL-2.0-only
++ config BRCMUTIL
++-	tristate
+++	tristate "Broadcom 802.11 driver utility functions"
++ 	depends on m
++ 
++ config BRCMSMAC
+diff --git a/package/kernel/mac80211/patches/brcm/810-b43-gpio-mask-module-option.patch b/package/kernel/mac80211/patches/brcm/810-b43-gpio-mask-module-option.patch
+new file mode 100644
+index 0000000000..09ef50526f
+--- /dev/null
++++ b/package/kernel/mac80211/patches/brcm/810-b43-gpio-mask-module-option.patch
+@@ -0,0 +1,37 @@
++--- a/drivers/net/wireless/broadcom/b43/b43.h
+++++ b/drivers/net/wireless/broadcom/b43/b43.h
++@@ -840,6 +840,7 @@ struct b43_wldev {
++ 	bool qos_enabled;		/* TRUE, if QoS is used. */
++ 	bool hwcrypto_enabled;		/* TRUE, if HW crypto acceleration is enabled. */
++ 	bool use_pio;			/* TRUE if next init should use PIO */
+++	int gpiomask;			/* GPIO LED mask as a module parameter */
++ 
++ 	/* PHY/Radio device. */
++ 	struct b43_phy phy;
++--- a/drivers/net/wireless/broadcom/b43/main.c
+++++ b/drivers/net/wireless/broadcom/b43/main.c
++@@ -72,6 +72,11 @@ MODULE_FIRMWARE("b43/ucode40.fw");
++ MODULE_FIRMWARE("b43/ucode42.fw");
++ MODULE_FIRMWARE("b43/ucode9.fw");
++ 
+++static int modparam_gpiomask = 0x000F;
+++module_param_named(gpiomask, modparam_gpiomask, int, 0444);
+++MODULE_PARM_DESC(gpiomask,
+++         "GPIO mask for LED control (default 0x000F)");
+++
++ static int modparam_bad_frames_preempt;
++ module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
++ MODULE_PARM_DESC(bad_frames_preempt,
++@@ -2869,10 +2874,10 @@ static int b43_gpio_init(struct b43_wlde
++ 	u32 mask, set;
++ 
++ 	b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_GPOUTSMSK, 0);
++-	b43_maskset16(dev, B43_MMIO_GPIO_MASK, ~0, 0xF);
+++	b43_maskset16(dev, B43_MMIO_GPIO_MASK, ~0, modparam_gpiomask);
++ 
++ 	mask = 0x0000001F;
++-	set = 0x0000000F;
+++	set = modparam_gpiomask;
++ 	if (dev->dev->chip_id == 0x4301) {
++ 		mask |= 0x0060;
++ 		set |= 0x0060;
+diff --git a/package/kernel/mac80211/patches/brcm/811-b43_no_pio.patch b/package/kernel/mac80211/patches/brcm/811-b43_no_pio.patch
+new file mode 100644
+index 0000000000..e395d48202
+--- /dev/null
++++ b/package/kernel/mac80211/patches/brcm/811-b43_no_pio.patch
+@@ -0,0 +1,86 @@
++--- a/drivers/net/wireless/broadcom/b43/Makefile
+++++ b/drivers/net/wireless/broadcom/b43/Makefile
++@@ -18,7 +18,7 @@ b43-$(CPTCFG_B43_PHY_AC)	+= phy_ac.o
++ b43-y				+= sysfs.o
++ b43-y				+= xmit.o
++ b43-y				+= dma.o
++-b43-y				+= pio.o
+++b43-$(CPTCFG_B43_PIO)		+= pio.o
++ b43-y				+= rfkill.o
++ b43-y				+= ppr.o
++ b43-$(CPTCFG_B43_LEDS)		+= leds.o
++--- a/drivers/net/wireless/broadcom/b43/main.c
+++++ b/drivers/net/wireless/broadcom/b43/main.c
++@@ -2001,10 +2001,12 @@ static void b43_do_interrupt_thread(stru
++ 			dma_reason[0], dma_reason[1],
++ 			dma_reason[2], dma_reason[3],
++ 			dma_reason[4], dma_reason[5]);
+++#ifdef CPTCFG_B43_PIO
++ 		b43err(dev->wl, "This device does not support DMA "
++ 			       "on your system. It will now be switched to PIO.\n");
++ 		/* Fall back to PIO transfers if we get fatal DMA errors! */
++ 		dev->use_pio = true;
+++#endif
++ 		b43_controller_restart(dev, "DMA error");
++ 		return;
++ 	}
++--- a/drivers/net/wireless/broadcom/b43/pio.h
+++++ b/drivers/net/wireless/broadcom/b43/pio.h
++@@ -151,7 +151,7 @@ static inline void b43_piorx_write32(str
++ 	b43_write32(q->dev, q->mmio_base + offset, value);
++ }
++ 
++-
+++#ifdef CPTCFG_B43_PIO
++ int b43_pio_init(struct b43_wldev *dev);
++ void b43_pio_free(struct b43_wldev *dev);
++ 
++@@ -162,5 +162,37 @@ void b43_pio_rx(struct b43_pio_rxqueue *
++ 
++ void b43_pio_tx_suspend(struct b43_wldev *dev);
++ void b43_pio_tx_resume(struct b43_wldev *dev);
+++#else
+++static inline int b43_pio_init(struct b43_wldev *dev)
+++{
+++	return 0;
+++}
+++
+++static inline void b43_pio_free(struct b43_wldev *dev)
+++{
+++}
+++
+++static inline int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb)
+++{
+++	return 0;
+++}
+++
+++static inline void b43_pio_handle_txstatus(struct b43_wldev *dev,
+++					   const struct b43_txstatus *status)
+++{
+++}
+++
+++static inline void b43_pio_rx(struct b43_pio_rxqueue *q)
+++{
+++}
+++
+++static inline void b43_pio_tx_suspend(struct b43_wldev *dev)
+++{
+++}
+++
+++static inline void b43_pio_tx_resume(struct b43_wldev *dev)
+++{
+++}
+++#endif /* CPTCFG_B43_PIO */
++ 
++ #endif /* B43_PIO_H_ */
++--- a/drivers/net/wireless/broadcom/b43/Kconfig
+++++ b/drivers/net/wireless/broadcom/b43/Kconfig
++@@ -100,7 +100,7 @@ config B43_BCMA_PIO
++ 	default y
++ 
++ config B43_PIO
++-	bool
+++	bool "Broadcom 43xx PIO support"
++ 	depends on B43 && B43_SSB
++ 	depends on SSB_BLOCKIO
++ 	default y
+diff --git a/package/kernel/mac80211/patches/brcm/812-b43-add-antenna-control.patch b/package/kernel/mac80211/patches/brcm/812-b43-add-antenna-control.patch
+new file mode 100644
+index 0000000000..22b67c49d8
+--- /dev/null
++++ b/package/kernel/mac80211/patches/brcm/812-b43-add-antenna-control.patch
+@@ -0,0 +1,131 @@
++--- a/drivers/net/wireless/broadcom/b43/main.c
+++++ b/drivers/net/wireless/broadcom/b43/main.c
++@@ -1643,7 +1643,7 @@ static void b43_write_beacon_template(st
++ 				  len, ram_offset, shm_size_offset, rate);
++ 
++ 	/* Write the PHY TX control parameters. */
++-	antenna = B43_ANTENNA_DEFAULT;
+++	antenna = dev->tx_antenna;
++ 	antenna = b43_antenna_to_phyctl(antenna);
++ 	ctl = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL);
++ 	/* We can't send beacons with short preamble. Would get PHY errors. */
++@@ -3284,8 +3284,8 @@ static int b43_chip_init(struct b43_wlde
++ 
++ 	/* Select the antennae */
++ 	if (phy->ops->set_rx_antenna)
++-		phy->ops->set_rx_antenna(dev, B43_ANTENNA_DEFAULT);
++-	b43_mgmtframe_txantenna(dev, B43_ANTENNA_DEFAULT);
+++		phy->ops->set_rx_antenna(dev, dev->rx_antenna);
+++	b43_mgmtframe_txantenna(dev, dev->tx_antenna);
++ 
++ 	if (phy->type == B43_PHYTYPE_B) {
++ 		value16 = b43_read16(dev, 0x005E);
++@@ -3986,7 +3986,6 @@ static int b43_op_config(struct ieee8021
++ 	struct b43_wldev *dev = wl->current_dev;
++ 	struct b43_phy *phy = &dev->phy;
++ 	struct ieee80211_conf *conf = &hw->conf;
++-	int antenna;
++ 	int err = 0;
++ 
++ 	mutex_lock(&wl->mutex);
++@@ -4029,11 +4028,9 @@ static int b43_op_config(struct ieee8021
++ 	}
++ 
++ 	/* Antennas for RX and management frame TX. */
++-	antenna = B43_ANTENNA_DEFAULT;
++-	b43_mgmtframe_txantenna(dev, antenna);
++-	antenna = B43_ANTENNA_DEFAULT;
+++	b43_mgmtframe_txantenna(dev, dev->tx_antenna);
++ 	if (phy->ops->set_rx_antenna)
++-		phy->ops->set_rx_antenna(dev, antenna);
+++		phy->ops->set_rx_antenna(dev, dev->rx_antenna);
++ 
++ 	if (wl->radio_enabled != phy->radio_on) {
++ 		if (wl->radio_enabled) {
++@@ -5176,6 +5173,47 @@ static int b43_op_get_survey(struct ieee
++ 	return 0;
++ }
++ 
+++static int b43_op_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
+++{
+++	struct b43_wl *wl = hw_to_b43_wl(hw);
+++	struct b43_wldev *dev = wl->current_dev;
+++
+++	if (tx_ant == 1 && rx_ant == 1) {
+++		dev->tx_antenna = B43_ANTENNA0;
+++		dev->rx_antenna = B43_ANTENNA0;
+++	}
+++	else if (tx_ant == 2 && rx_ant == 2) {
+++		dev->tx_antenna = B43_ANTENNA1;
+++		dev->rx_antenna = B43_ANTENNA1;
+++	}
+++	else if ((tx_ant & 3) == 3 && (rx_ant & 3) == 3) {
+++		dev->tx_antenna = B43_ANTENNA_DEFAULT;
+++		dev->rx_antenna = B43_ANTENNA_DEFAULT;
+++	}
+++	else {
+++		return -EINVAL;
+++	}
+++
+++	return 0;
+++}
+++
+++
+++static int b43_op_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
+++{
+++	struct b43_wl *wl = hw_to_b43_wl(hw);
+++	struct b43_wldev *dev = wl->current_dev;
+++
+++	switch (dev->tx_antenna) {
+++	case B43_ANTENNA0:
+++		*tx_ant = 1; *rx_ant = 1; break;
+++	case B43_ANTENNA1:
+++		*tx_ant = 2; *rx_ant = 2; break;
+++	case B43_ANTENNA_DEFAULT:
+++		*tx_ant = 3; *rx_ant = 3; break;
+++	}
+++	return 0;
+++}
+++
++ static const struct ieee80211_ops b43_hw_ops = {
++ 	.tx			= b43_op_tx,
++ 	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++@@ -5198,6 +5236,8 @@ static const struct ieee80211_ops b43_hw
++ 	.sw_scan_complete	= b43_op_sw_scan_complete_notifier,
++ 	.get_survey		= b43_op_get_survey,
++ 	.rfkill_poll		= b43_rfkill_poll,
+++	.set_antenna		= b43_op_set_antenna,
+++	.get_antenna		= b43_op_get_antenna,
++ };
++ 
++ /* Hard-reset the chip. Do not call this directly.
++@@ -5499,6 +5539,8 @@ static int b43_one_core_attach(struct b4
++ 	if (!wldev)
++ 		goto out;
++ 
+++	wldev->rx_antenna = B43_ANTENNA_DEFAULT;
+++	wldev->tx_antenna = B43_ANTENNA_DEFAULT;
++ 	wldev->use_pio = b43_modparam_pio;
++ 	wldev->dev = dev;
++ 	wldev->wl = wl;
++@@ -5590,6 +5632,9 @@ static struct b43_wl *b43_wireless_init(
++ 
++ 	wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
++ 
+++	hw->wiphy->available_antennas_rx = 0x3;
+++	hw->wiphy->available_antennas_tx = 0x3;
+++
++ 	wl->hw_registered = false;
++ 	hw->max_rates = 2;
++ 	SET_IEEE80211_DEV(hw, dev->dev);
++--- a/drivers/net/wireless/broadcom/b43/b43.h
+++++ b/drivers/net/wireless/broadcom/b43/b43.h
++@@ -841,6 +841,8 @@ struct b43_wldev {
++ 	bool hwcrypto_enabled;		/* TRUE, if HW crypto acceleration is enabled. */
++ 	bool use_pio;			/* TRUE if next init should use PIO */
++ 	int gpiomask;			/* GPIO LED mask as a module parameter */
+++	int rx_antenna;			/* Used RX antenna (B43_ANTENNAxxx) */
+++	int tx_antenna;			/* Used TX antenna (B43_ANTENNAxxx) */
++ 
++ 	/* PHY/Radio device. */
++ 	struct b43_phy phy;
+diff --git a/package/kernel/mac80211/patches/brcm/813-b43-reduce-number-of-RX-slots.patch b/package/kernel/mac80211/patches/brcm/813-b43-reduce-number-of-RX-slots.patch
+new file mode 100644
+index 0000000000..85c52c0282
+--- /dev/null
++++ b/package/kernel/mac80211/patches/brcm/813-b43-reduce-number-of-RX-slots.patch
+@@ -0,0 +1,11 @@
++--- a/drivers/net/wireless/broadcom/b43/dma.h
+++++ b/drivers/net/wireless/broadcom/b43/dma.h
++@@ -170,7 +170,7 @@ struct b43_dmadesc_generic {
++ 
++ /* DMA engine tuning knobs */
++ #define B43_TXRING_SLOTS		256
++-#define B43_RXRING_SLOTS		256
+++#define B43_RXRING_SLOTS		32
++ #define B43_DMA0_RX_FW598_BUFSIZE	(B43_DMA0_RX_FW598_FO + IEEE80211_MAX_FRAME_LEN)
++ #define B43_DMA0_RX_FW351_BUFSIZE	(B43_DMA0_RX_FW351_FO + IEEE80211_MAX_FRAME_LEN)
++ 
+diff --git a/package/kernel/mac80211/patches/brcm/814-b43-only-use-gpio-0-1-for-led.patch b/package/kernel/mac80211/patches/brcm/814-b43-only-use-gpio-0-1-for-led.patch
+new file mode 100644
+index 0000000000..9cb0a32fd4
+--- /dev/null
++++ b/package/kernel/mac80211/patches/brcm/814-b43-only-use-gpio-0-1-for-led.patch
+@@ -0,0 +1,17 @@
++--- a/drivers/net/wireless/broadcom/b43/main.c
+++++ b/drivers/net/wireless/broadcom/b43/main.c
++@@ -2886,6 +2886,14 @@ static int b43_gpio_init(struct b43_wlde
++ 	} else if (dev->dev->chip_id == 0x5354) {
++ 		/* Don't allow overtaking buttons GPIOs */
++ 		set &= 0x2; /* 0x2 is LED GPIO on BCM5354 */
+++	} else if (dev->dev->chip_id == BCMA_CHIP_ID_BCM4716 || 
+++		   dev->dev->chip_id == BCMA_CHIP_ID_BCM47162 ||
+++		   dev->dev->chip_id == BCMA_CHIP_ID_BCM5356 ||
+++		   dev->dev->chip_id == BCMA_CHIP_ID_BCM5357 ||
+++		   dev->dev->chip_id == BCMA_CHIP_ID_BCM53572) {
+++		/* just use gpio 0 and 1 for 2.4 GHz wifi led */
+++		set &= 0x3;
+++		mask &= 0x3;
++ 	}
++ 
++ 	if (0 /* FIXME: conditional unknown */ ) {
+diff --git a/package/kernel/mac80211/patches/brcm/815-b43-always-take-overlapping-devs.patch b/package/kernel/mac80211/patches/brcm/815-b43-always-take-overlapping-devs.patch
+new file mode 100644
+index 0000000000..3700eaa1a0
+--- /dev/null
++++ b/package/kernel/mac80211/patches/brcm/815-b43-always-take-overlapping-devs.patch
+@@ -0,0 +1,11 @@
++--- a/drivers/net/wireless/broadcom/b43/main.c
+++++ b/drivers/net/wireless/broadcom/b43/main.c
++@@ -114,7 +114,7 @@ static int b43_modparam_pio;
++ module_param_named(pio, b43_modparam_pio, int, 0644);
++ MODULE_PARM_DESC(pio, "Use PIO accesses by default: 0=DMA, 1=PIO");
++ 
++-static int modparam_allhwsupport = !IS_ENABLED(CPTCFG_BRCMSMAC);
+++static int modparam_allhwsupport = 1;
++ module_param_named(allhwsupport, modparam_allhwsupport, int, 0444);
++ MODULE_PARM_DESC(allhwsupport, "Enable support for all hardware (even it if overlaps with the brcmsmac driver)");
++ 
+diff --git a/package/kernel/mac80211/patches/brcm/850-brcmsmac-remove-extra-regulation-restriction.patch b/package/kernel/mac80211/patches/brcm/850-brcmsmac-remove-extra-regulation-restriction.patch
+new file mode 100644
+index 0000000000..3c93386b30
+--- /dev/null
++++ b/package/kernel/mac80211/patches/brcm/850-brcmsmac-remove-extra-regulation-restriction.patch
+@@ -0,0 +1,27 @@
++--- a/drivers/net/wireless/broadcom/brcm80211/brcmsmac/channel.c
+++++ b/drivers/net/wireless/broadcom/brcm80211/brcmsmac/channel.c
++@@ -58,19 +58,12 @@
++ 				 (((c) < 149) ? 3 : 4))))
++ 
++ #define BRCM_2GHZ_2412_2462	REG_RULE(2412-10, 2462+10, 40, 0, 19, 0)
++-#define BRCM_2GHZ_2467_2472	REG_RULE(2467-10, 2472+10, 20, 0, 19, \
++-					 NL80211_RRF_NO_IR)
+++#define BRCM_2GHZ_2467_2472	REG_RULE(2467-10, 2472+10, 20, 0, 19, 0)
++ 
++-#define BRCM_5GHZ_5180_5240	REG_RULE(5180-10, 5240+10, 40, 0, 21, \
++-					 NL80211_RRF_NO_IR)
++-#define BRCM_5GHZ_5260_5320	REG_RULE(5260-10, 5320+10, 40, 0, 21, \
++-					 NL80211_RRF_DFS | \
++-					 NL80211_RRF_NO_IR)
++-#define BRCM_5GHZ_5500_5700	REG_RULE(5500-10, 5700+10, 40, 0, 21, \
++-					 NL80211_RRF_DFS | \
++-					 NL80211_RRF_NO_IR)
++-#define BRCM_5GHZ_5745_5825	REG_RULE(5745-10, 5825+10, 40, 0, 21, \
++-					 NL80211_RRF_NO_IR)
+++#define BRCM_5GHZ_5180_5240	REG_RULE(5180-10, 5240+10, 40, 0, 21, 0)
+++#define BRCM_5GHZ_5260_5320	REG_RULE(5260-10, 5320+10, 40, 0, 21, 0)
+++#define BRCM_5GHZ_5500_5700	REG_RULE(5500-10, 5700+10, 40, 0, 21, 0)
+++#define BRCM_5GHZ_5745_5825	REG_RULE(5745-10, 5825+10, 40, 0, 21, 0)
++ 
++ static const struct ieee80211_regdomain brcms_regdom_x2 = {
++ 	.n_reg_rules = 6,
+diff --git a/package/kernel/mac80211/patches/brcm/861-brcmfmac-workaround-bug-with-some-inconsistent-BSSes.patch b/package/kernel/mac80211/patches/brcm/861-brcmfmac-workaround-bug-with-some-inconsistent-BSSes.patch
+new file mode 100644
+index 0000000000..b82b442a1e
+--- /dev/null
++++ b/package/kernel/mac80211/patches/brcm/861-brcmfmac-workaround-bug-with-some-inconsistent-BSSes.patch
+@@ -0,0 +1,49 @@
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
++Date: Thu, 9 Jul 2015 00:07:59 +0200
++Subject: [PATCH] brcmfmac: workaround bug with some inconsistent BSSes state
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
++---
++
++--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
+++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
++@@ -713,8 +713,36 @@ static struct wireless_dev *brcmf_cfg802
++ 	struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy);
++ 	struct brcmf_pub *drvr = cfg->pub;
++ 	struct wireless_dev *wdev;
+++	struct net_device *dev;
++ 	int err;
++ 
+++	/*
+++	 * There is a bug with in-firmware BSS management. When adding virtual
+++	 * interface brcmfmac first tells firmware to create new BSS and then
+++	 * it creates new struct net_device.
+++	 *
+++	 * If creating/registering netdev(ice) fails, BSS remains in some bugged
+++	 * state. It conflicts with existing BSSes by overtaking their auth
+++	 * requests.
+++	 *
+++	 * It results in one BSS (addresss X) sending beacons and another BSS
+++	 * (address Y) replying to authentication requests. This makes interface
+++	 * unusable as AP.
+++	 *
+++	 * To workaround this bug we may try to guess if register_netdev(ice)
+++	 * will fail. The most obvious case is using interface name that already
+++	 * exists. This is actually quite likely with brcmfmac & some user space
+++	 * scripts as brcmfmac doesn't allow deleting virtual interfaces.
+++	 * So this bug can be triggered even by something trivial like:
+++	 * iw dev wlan0 delete
+++	 * iw phy phy0 interface add wlan0 type __ap
+++	 */
+++	dev = dev_get_by_name(&init_net, name);
+++	if (dev) {
+++		dev_put(dev);
+++		return ERR_PTR(-ENFILE);
+++	}
+++
++ 	brcmf_dbg(TRACE, "enter: %s type %d\n", name, type);
++ 	err = brcmf_vif_add_validate(wiphy_to_cfg(wiphy), type);
++ 	if (err) {
+diff --git a/package/kernel/mac80211/patches/brcm/862-brcmfmac-Disable-power-management.patch b/package/kernel/mac80211/patches/brcm/862-brcmfmac-Disable-power-management.patch
+new file mode 100644
+index 0000000000..080ab8f7ef
+--- /dev/null
++++ b/package/kernel/mac80211/patches/brcm/862-brcmfmac-Disable-power-management.patch
+@@ -0,0 +1,27 @@
++From 66ae1b1750720a33e29792a177b1e696f4f005fb Mon Sep 17 00:00:00 2001
++From: Phil Elwell <phil@raspberrypi.org>
++Date: Wed, 9 Mar 2016 17:25:59 +0000
++Subject: [PATCH] brcmfmac: Disable power management
++
++Disable wireless power saving in the brcmfmac WLAN driver. This is a
++temporary measure until the connectivity loss resulting from power
++saving is resolved.
++
++Signed-off-by: Phil Elwell <phil@raspberrypi.org>
++---
++ drivers/net/wireless/brcm80211/brcmfmac/cfg80211.c | 2 ++
++ 1 file changed, 2 insertions(+)
++
++--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
+++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
++@@ -2976,6 +2976,10 @@ brcmf_cfg80211_set_power_mgmt(struct wip
++ 	 * preference in cfg struct to apply this to
++ 	 * FW later while initializing the dongle
++ 	 */
+++#if defined(CONFIG_ARCH_BCM2835)
+++	brcmf_dbg(INFO, "power management disabled\n");
+++	enabled = false;
+++#endif
++ 	cfg->pwr_save = enabled;
++ 	if (!check_vif_up(ifp->vif)) {
++ 
+diff --git a/package/kernel/mac80211/patches/brcm/863-brcmfmac-add-in-driver-tables-with-country-codes.patch b/package/kernel/mac80211/patches/brcm/863-brcmfmac-add-in-driver-tables-with-country-codes.patch
+new file mode 100644
+index 0000000000..25191b6439
+--- /dev/null
++++ b/package/kernel/mac80211/patches/brcm/863-brcmfmac-add-in-driver-tables-with-country-codes.patch
+@@ -0,0 +1,60 @@
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
++Subject: [PATCH] brcmfmac: add in-driver tables with country codes
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++This adds early support for changing region. Ideally this data should
++be stored in DT as all these mappings are devices specific.
++
++Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
++---
++
++--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c
+++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c
++@@ -65,6 +65,36 @@ static int brcmf_of_get_country_codes(st
++ 	return 0;
++ }
++ 
+++/* TODO: FIXME: Use DT */
+++static void brcmf_of_probe_cc(struct device *dev,
+++			      struct brcmf_mp_device *settings)
+++{
+++	static struct brcmfmac_pd_cc_entry netgear_r8000_cc_ent[] = {
+++		{ "JP", "JP", 78 },
+++		{ "US", "Q2", 86 },
+++	};
+++	struct brcmfmac_pd_cc_entry *cc_ent = NULL;
+++	int table_size = 0;
+++
+++	if (of_machine_is_compatible("netgear,r8000")) {
+++		cc_ent = netgear_r8000_cc_ent;
+++		table_size = ARRAY_SIZE(netgear_r8000_cc_ent);
+++	}
+++
+++	if (cc_ent && table_size) {
+++		struct brcmfmac_pd_cc *cc;
+++		size_t memsize;
+++
+++		memsize = table_size * sizeof(struct brcmfmac_pd_cc_entry);
+++		cc = devm_kzalloc(dev, sizeof(*cc) + memsize, GFP_KERNEL);
+++		if (!cc)
+++			return;
+++		cc->table_size = table_size;
+++		memcpy(cc->table, cc_ent, memsize);
+++		settings->country_codes = cc;
+++	}
+++}
+++
++ void brcmf_of_probe(struct device *dev, enum brcmf_bus_type bus_type,
++ 		    struct brcmf_mp_device *settings)
++ {
++@@ -106,6 +136,8 @@ void brcmf_of_probe(struct device *dev,
++ 		of_node_put(root);
++ 	}
++ 
+++	brcmf_of_probe_cc(dev, settings);
+++
++ 	if (!np || !of_device_is_compatible(np, "brcm,bcm4329-fmac"))
++ 		return;
++ 
+diff --git a/package/kernel/mac80211/patches/brcm/864-brcmfmac-do-not-use-internal-roaming-engine-by-default.patch b/package/kernel/mac80211/patches/brcm/864-brcmfmac-do-not-use-internal-roaming-engine-by-default.patch
+new file mode 100644
+index 0000000000..fe79c40c11
+--- /dev/null
++++ b/package/kernel/mac80211/patches/brcm/864-brcmfmac-do-not-use-internal-roaming-engine-by-default.patch
+@@ -0,0 +1,23 @@
++brcmfmac: do not use internal roaming engine by default
++
++Some evidence of curing disconnects with this disabled, so make it a default.
++Can be overridden with module parameter roamoff=0
++See: http://projectable.me/optimize-my-pi-wi-fi/
++
++Signed-off-by: Phil Elwell <phil@raspberrypi.org>
++---
++
++--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c
+++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c
++@@ -59,7 +59,11 @@ static int brcmf_fcmode;
++ module_param_named(fcmode, brcmf_fcmode, int, 0);
++ MODULE_PARM_DESC(fcmode, "Mode of firmware signalled flow control");
++ 
+++#if defined(CONFIG_ARCH_BCM2835)
+++static int brcmf_roamoff = 1;
+++#else
++ static int brcmf_roamoff;
+++#endif
++ module_param_named(roamoff, brcmf_roamoff, int, 0400);
++ MODULE_PARM_DESC(roamoff, "Do not use internal roaming engine");
++ 
+diff --git a/package/kernel/mac80211/patches/brcm/865-brcmfmac-Read-alternative-firmware-names-from-DT.patch b/package/kernel/mac80211/patches/brcm/865-brcmfmac-Read-alternative-firmware-names-from-DT.patch
+new file mode 100644
+index 0000000000..8df285f8b1
+--- /dev/null
++++ b/package/kernel/mac80211/patches/brcm/865-brcmfmac-Read-alternative-firmware-names-from-DT.patch
+@@ -0,0 +1,191 @@
++From 4e32024cbb14230af3048e249e84f8c2b25ce45a Mon Sep 17 00:00:00 2001
++From: Phil Elwell <phil@raspberrypi.com>
++Date: Thu, 28 Oct 2021 15:03:16 +0100
++Subject: [PATCH] brcmfmac: Read alternative firmware names from DT
++
++Add the ability to load the names of alternative firmwares from the
++Device Tree node. This permits separate firmwares for 43436s and 43438
++and allows downstream firmwares to coexist with upstream.
++
++Signed-off-by: Phil Elwell <phil@raspberrypi.com>
++---
++ .../wireless/broadcom/brcm80211/brcmfmac/of.c | 36 ++++++++++++++
++ .../wireless/broadcom/brcm80211/brcmfmac/of.h |  7 +++
++ .../broadcom/brcm80211/brcmfmac/sdio.c        | 47 +++++++++++++++++--
++ 3 files changed, 87 insertions(+), 3 deletions(-)
++
++--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c
+++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c
++@@ -11,6 +11,7 @@
++ #include "debug.h"
++ #include "core.h"
++ #include "common.h"
+++#include "firmware.h"
++ #include "of.h"
++ 
++ static int brcmf_of_get_country_codes(struct device *dev,
++@@ -168,3 +169,38 @@ void brcmf_of_probe(struct device *dev,
++ 	sdio->oob_irq_nr = irq;
++ 	sdio->oob_irq_flags = irqf;
++ }
+++
+++struct brcmf_firmware_mapping *
+++brcmf_of_fwnames(struct device *dev, u32 *fwname_count)
+++{
+++	struct device_node *np = dev->of_node;
+++	struct brcmf_firmware_mapping *fwnames;
+++	struct device_node *map_np, *fw_np;
+++	int of_count;
+++	int count = 0;
+++
+++	map_np = of_get_child_by_name(np, "firmwares");
+++	of_count = of_get_child_count(map_np);
+++	if (!of_count)
+++		return NULL;
+++
+++	fwnames = devm_kcalloc(dev, of_count,
+++			       sizeof(struct brcmf_firmware_mapping),
+++			       GFP_KERNEL);
+++
+++	for_each_child_of_node(map_np, fw_np)
+++	{
+++		struct brcmf_firmware_mapping *cur = &fwnames[count];
+++
+++		if (of_property_read_u32(fw_np, "chipid", &cur->chipid) ||
+++		    of_property_read_u32(fw_np, "revmask", &cur->revmask))
+++			continue;
+++		cur->fw_base = of_get_property(fw_np, "fw_base", NULL);
+++		if (cur->fw_base)
+++			count++;
+++	}
+++
+++	*fwname_count = count;
+++
+++	return count ? fwnames : NULL;
+++}
++--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.h
+++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.h
++@@ -5,9 +5,20 @@
++ #ifdef CONFIG_OF
++ void brcmf_of_probe(struct device *dev, enum brcmf_bus_type bus_type,
++ 		    struct brcmf_mp_device *settings);
+++#ifdef CPTCFG_BRCMFMAC_SDIO
+++struct brcmf_firmware_mapping *
+++brcmf_of_fwnames(struct device *dev, u32 *map_count);
+++#endif
++ #else
++ static void brcmf_of_probe(struct device *dev, enum brcmf_bus_type bus_type,
++ 			   struct brcmf_mp_device *settings)
++ {
++ }
+++#ifdef CPTCFG_BRCMFMAC_SDIO
+++static struct brcmf_firmware_mapping *
+++brcmf_of_fwnames(struct device *dev, u32 *map_count)
+++{
+++	return NULL;
+++}
+++#endif
++ #endif /* CONFIG_OF */
++--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
+++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
++@@ -35,6 +35,7 @@
++ #include "core.h"
++ #include "common.h"
++ #include "bcdc.h"
+++#include "of.h"
++ 
++ #define DCMD_RESP_TIMEOUT	msecs_to_jiffies(2500)
++ #define CTL_DONE_TIMEOUT	msecs_to_jiffies(2500)
++@@ -634,7 +635,7 @@ MODULE_FIRMWARE(BRCMF_FW_DEFAULT_PATH "b
++ /* per-board firmware binaries */
++ MODULE_FIRMWARE(BRCMF_FW_DEFAULT_PATH "brcmfmac*-sdio.*.bin");
++ 
++-static const struct brcmf_firmware_mapping brcmf_sdio_fwnames[] = {
+++static const struct brcmf_firmware_mapping sdio_fwnames[] = {
++ 	BRCMF_FW_ENTRY(BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, 43143),
++ 	BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x0000001F, 43241B0),
++ 	BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x00000020, 43241B4),
++@@ -662,6 +663,9 @@ static const struct brcmf_firmware_mappi
++ 	BRCMF_FW_ENTRY(CY_CC_43752_CHIP_ID, 0xFFFFFFFF, 43752)
++ };
++ 
+++static const struct brcmf_firmware_mapping *brcmf_sdio_fwnames = sdio_fwnames;
+++static u32 brcmf_sdio_fwnames_count = ARRAY_SIZE(sdio_fwnames);
+++
++ #define TXCTL_CREDITS	2
++ 
++ static void pkt_align(struct sk_buff *p, int len, int align)
++@@ -4193,6 +4197,9 @@ static const struct brcmf_bus_ops brcmf_
++ #define BRCMF_SDIO_FW_NVRAM	1
++ #define BRCMF_SDIO_FW_CLM	2
++ 
+++static struct brcmf_fw_request *
+++brcmf_sdio_prepare_fw_request(struct brcmf_sdio *bus);
+++
++ static void brcmf_sdio_firmware_callback(struct device *dev, int err,
++ 					 struct brcmf_fw_request *fwreq)
++ {
++@@ -4208,6 +4215,22 @@ static void brcmf_sdio_firmware_callback
++ 
++ 	brcmf_dbg(TRACE, "Enter: dev=%s, err=%d\n", dev_name(dev), err);
++ 
+++	if (err && brcmf_sdio_fwnames != sdio_fwnames) {
+++		/* Try again with the standard firmware names */
+++		brcmf_sdio_fwnames = sdio_fwnames;
+++		brcmf_sdio_fwnames_count = ARRAY_SIZE(sdio_fwnames);
+++		kfree(fwreq);
+++		fwreq = brcmf_sdio_prepare_fw_request(bus);
+++		if (!fwreq) {
+++			err = -ENOMEM;
+++			goto fail;
+++		}
+++		err = brcmf_fw_get_firmwares(dev, fwreq,
+++					     brcmf_sdio_firmware_callback);
+++		if (!err)
+++			return;
+++	}
+++
++ 	if (err)
++ 		goto fail;
++ 
++@@ -4418,7 +4441,7 @@ brcmf_sdio_prepare_fw_request(struct brc
++ 
++ 	fwreq = brcmf_fw_alloc_request(bus->ci->chip, bus->ci->chiprev,
++ 				       brcmf_sdio_fwnames,
++-				       ARRAY_SIZE(brcmf_sdio_fwnames),
+++				       brcmf_sdio_fwnames_count,
++ 				       fwnames, ARRAY_SIZE(fwnames));
++ 	if (!fwreq)
++ 		return NULL;
++@@ -4438,6 +4461,9 @@ struct brcmf_sdio *brcmf_sdio_probe(stru
++ 	struct brcmf_sdio *bus;
++ 	struct workqueue_struct *wq;
++ 	struct brcmf_fw_request *fwreq;
+++	struct brcmf_firmware_mapping *of_fwnames, *fwnames = NULL;
+++	const int fwname_size = sizeof(struct brcmf_firmware_mapping);
+++	u32 of_fw_count;
++ 
++ 	brcmf_dbg(TRACE, "Enter\n");
++ 
++@@ -4520,6 +4546,21 @@ struct brcmf_sdio *brcmf_sdio_probe(stru
++ 
++ 	brcmf_dbg(INFO, "completed!!\n");
++ 
+++	of_fwnames = brcmf_of_fwnames(sdiodev->dev, &of_fw_count);
+++	if (of_fwnames)
+++		fwnames = devm_kcalloc(sdiodev->dev,
+++				       of_fw_count + brcmf_sdio_fwnames_count,
+++				       fwname_size, GFP_KERNEL);
+++
+++	if (fwnames) {
+++		/* The array is scanned in order, so overrides come first */
+++		memcpy(fwnames, of_fwnames, of_fw_count * fwname_size);
+++		memcpy(fwnames + of_fw_count, sdio_fwnames,
+++		       brcmf_sdio_fwnames_count * fwname_size);
+++		brcmf_sdio_fwnames = fwnames;
+++		brcmf_sdio_fwnames_count += of_fw_count;
+++	}
+++
++ 	fwreq = brcmf_sdio_prepare_fw_request(bus);
++ 	if (!fwreq) {
++ 		ret = -ENOMEM;
+diff --git a/package/kernel/mac80211/patches/build/000-fix_kconfig.patch b/package/kernel/mac80211/patches/build/000-fix_kconfig.patch
+new file mode 100644
+index 0000000000..3987aae4f5
+--- /dev/null
++++ b/package/kernel/mac80211/patches/build/000-fix_kconfig.patch
+@@ -0,0 +1,14 @@
++--- a/kconf/Makefile
+++++ b/kconf/Makefile
++@@ -1,9 +1,9 @@
++-CFLAGS=-Wall -Wmissing-prototypes -Wstrict-prototypes -O2 -fomit-frame-pointer
+++CFLAGS=-Wall -Wmissing-prototypes -Wstrict-prototypes -O2 -fomit-frame-pointer -DKBUILD_NO_NLS
++ 
++ LXDIALOG := lxdialog/checklist.o lxdialog/inputbox.o lxdialog/menubox.o lxdialog/textbox.o lxdialog/util.o lxdialog/yesno.o
++ 
++ conf: conf.o zconf.tab.o
++-mconf_CFLAGS := $(shell ./lxdialog/check-lxdialog.sh -ccflags) -DLOCALE
+++mconf_CFLAGS := $(shell ./lxdialog/check-lxdialog.sh -ccflags)
++ mconf_LDFLAGS := $(shell ./lxdialog/check-lxdialog.sh -ldflags $(CC))
++ mconf: CFLAGS += $(mconf_CFLAGS)
++ 
+diff --git a/package/kernel/mac80211/patches/build/001-fix_build.patch b/package/kernel/mac80211/patches/build/001-fix_build.patch
+new file mode 100644
+index 0000000000..8f63d36e2e
+--- /dev/null
++++ b/package/kernel/mac80211/patches/build/001-fix_build.patch
+@@ -0,0 +1,169 @@
++--- a/Makefile
+++++ b/Makefile
++@@ -5,7 +5,7 @@
++ ifeq ($(KERNELRELEASE),)
++ 
++ MAKEFLAGS += --no-print-directory
++-SHELL := /bin/bash
+++SHELL := /usr/bin/env bash
++ BACKPORT_DIR := $(shell pwd)
++ 
++ KMODDIR ?= updates
++@@ -19,6 +19,7 @@ KLIB_BUILD ?= $(KLIB)/build/
++ KERNEL_CONFIG := $(KLIB_BUILD)/.config
++ KERNEL_MAKEFILE := $(KLIB_BUILD)/Makefile
++ CONFIG_MD5 := $(shell md5sum $(KERNEL_CONFIG) 2>/dev/null | sed 's/\s.*//')
+++STAMP_KERNEL_CONFIG := .kernel_config_md5_$(CONFIG_MD5)
++ 
++ export KLIB KLIB_BUILD BACKPORT_DIR KMODDIR KMODPATH_ARG
++ 
++@@ -36,7 +37,8 @@ mrproper:
++ 	@rm -f .kernel_config_md5 Kconfig.versions Kconfig.kernel
++ 	@rm -f backport-include/backport/autoconf.h
++ 
++-.DEFAULT:
+++.SILENT: $(STAMP_KERNEL_CONFIG)
+++$(STAMP_KERNEL_CONFIG):
++ 	@set -e ; test -f local-symbols || (						\
++ 	echo "/--------------"								;\
++ 	echo "| You shouldn't run make in the backports tree, but only in"		;\
++@@ -60,58 +62,62 @@ mrproper:
++ 	echo "| (that isn't currently running.)"					;\
++ 	echo "\\--"									;\
++ 	false)
++-	@set -e ; if [ "$$(cat .kernel_config_md5 2>/dev/null)" != "$(CONFIG_MD5)" ]	;\
++-	then 										\
++-		echo -n "Generating local configuration database from kernel ..."	;\
++-		grep -v -f local-symbols $(KERNEL_CONFIG) | grep = | (			\
++-			while read l ; do						\
++-				if [ "$${l:0:7}" != "CONFIG_" ] ; then			\
++-					continue					;\
++-				fi							;\
++-				l=$${l:7}						;\
++-				n=$${l%%=*}						;\
++-				v=$${l#*=}						;\
++-				if [ "$$v" = "m" ] ; then				\
++-					echo config $$n					;\
++-					echo '    tristate' 				;\
++-				elif [ "$$v" = "y" ] ; then				\
++-					echo config $$n					;\
++-					echo '    bool'					;\
++-				else							\
++-					continue					;\
++-				fi							;\
++-				echo "    default $$v"					;\
++-				echo ""							;\
++-			done								\
++-		) > Kconfig.kernel							;\
++-		kver=$$($(MAKE) --no-print-directory -C $(KLIB_BUILD) M=$(BACKPORT_DIR)	\
++-			kernelversion |	sed 's/^\(\([3-5]\|2\.6\)\.[0-9]\+\).*/\1/;t;d');\
++-		test "$$kver" != "" || echo "Kernel version parse failed!"		;\
++-		test "$$kver" != ""							;\
++-		kvers="$$(seq 14 39 | sed 's/^/2.6./')"					;\
++-		kvers="$$kvers $$(seq 0 19 | sed 's/^/3./')"				;\
++-		kvers="$$kvers $$(seq 0 20 | sed 's/^/4./')"				;\
++-		kvers="$$kvers $$(seq 0 99 | sed 's/^/5./')"				;\
++-		print=0									;\
++-		for v in $$kvers ; do							\
++-			if [ "$$print" = "1" ] ; then					\
++-				echo config KERNEL_$$(echo $$v | tr . _)	;\
++-				echo "    def_bool y"					;\
++-			fi								;\
++-			if [ "$$v" = "$$kver" ] ; then print=1 ; fi			;\
++-		done > Kconfig.versions							;\
++-		# RHEL as well, sadly we need to grep for it				;\
++-		RHEL_MAJOR=$$(grep '^RHEL_MAJOR' $(KERNEL_MAKEFILE) | 			\
++-					sed 's/.*=\s*\([0-9]*\)/\1/;t;d')		;\
++-		RHEL_MINOR=$$(grep '^RHEL_MINOR' $(KERNEL_MAKEFILE) | 			\
++-					sed 's/.*=\s*\([0-9]*\)/\1/;t;d')		;\
++-		for v in $$(seq 0 $$RHEL_MINOR) ; do 					\
++-			echo config BACKPORT_RHEL_KERNEL_$${RHEL_MAJOR}_$$v		;\
++-			echo "    def_bool y"						;\
++-		done >> Kconfig.versions						;\
++-		echo " done."								;\
++-	fi										;\
++-	echo "$(CONFIG_MD5)" > .kernel_config_md5
+++	@rm -f .kernel_config_md5_*
+++	@touch $@
+++
+++Kconfig.kernel: $(STAMP_KERNEL_CONFIG) local-symbols
+++	@printf "Generating local configuration database from kernel ..."
+++	@grep -v -f local-symbols $(KERNEL_CONFIG) | grep = | (			\
+++		while read l ; do						\
+++			if [ "$${l:0:7}" != "CONFIG_" ] ; then			\
+++				continue					;\
+++			fi							;\
+++			l=$${l:7}						;\
+++			n=$${l%%=*}						;\
+++			v=$${l#*=}						;\
+++			if [ "$$v" = "m" ] ; then				\
+++				echo config $$n					;\
+++				echo '    tristate' 				;\
+++			elif [ "$$v" = "y" ] ; then				\
+++				echo config $$n					;\
+++				echo '    bool'					;\
+++			else							\
+++				continue					;\
+++			fi							;\
+++			echo "    default $$v"					;\
+++			echo ""							;\
+++		done								\
+++	) > $@
+++	@echo " done."
+++
+++Kconfig.versions: Kconfig.kernel
+++	@kver=$$($(MAKE) --no-print-directory -C $(KLIB_BUILD) M=$(BACKPORT_DIR) \
+++		kernelversion |	sed 's/^\(\([3-5]\|2\.6\)\.[0-9]\+\).*/\1/;t;d');\
+++	test "$$kver" != "" || echo "Kernel version parse failed!"		;\
+++	test "$$kver" != ""							;\
+++	kvers="$$(seq 14 39 | sed 's/^/2.6./')"					;\
+++	kvers="$$kvers $$(seq 0 19 | sed 's/^/3./')"				;\
+++	kvers="$$kvers $$(seq 0 20 | sed 's/^/4./')"				;\
+++	kvers="$$kvers $$(seq 0 99 | sed 's/^/5./')"				;\
+++	print=0									;\
+++	for v in $$kvers ; do							\
+++		if [ "$$print" = "1" ] ; then					\
+++			echo config KERNEL_$$(echo $$v | tr . _)	;\
+++			echo "    def_bool y"					;\
+++		fi								;\
+++		if [ "$$v" = "$$kver" ] ; then print=1 ; fi			;\
+++	done > $@
+++	@RHEL_MAJOR=$$(grep '^RHEL_MAJOR' $(KERNEL_MAKEFILE) | 			\
+++				sed 's/.*=\s*\([0-9]*\)/\1/;t;d')		;\
+++	RHEL_MINOR=$$(grep '^RHEL_MINOR' $(KERNEL_MAKEFILE) | 			\
+++				sed 's/.*=\s*\([0-9]*\)/\1/;t;d')		;\
+++	for v in $$(seq 0 $$RHEL_MINOR) ; do 					\
+++		echo config BACKPORT_RHEL_KERNEL_$${RHEL_MAJOR}_$$v		;\
+++		echo "    def_bool y"						;\
+++	done >> $@
+++
+++.DEFAULT:
+++	@$(MAKE) Kconfig.versions
++ 	@$(MAKE) -f Makefile.real "$@"
++ 
++ .PHONY: defconfig-help
++--- a/Makefile.real
+++++ b/Makefile.real
++@@ -59,7 +59,7 @@ defconfig-%::
++ 
++ backport-include/backport/autoconf.h: .config Kconfig.versions Kconfig.kernel
++ 	@$(MAKE) oldconfig
++-	@echo -n "Building backport-include/backport/autoconf.h ..."
+++	@printf "Building backport-include/backport/autoconf.h ..."
++ 	@grep -f local-symbols .config | (				\
++ 		echo "#ifndef COMPAT_AUTOCONF_INCLUDED"			;\
++ 		echo "#define COMPAT_AUTOCONF_INCLUDED"			;\
++@@ -80,7 +80,12 @@ backport-include/backport/autoconf.h: .c
++ 			esac						;\
++ 		done							;\
++ 		echo "#endif /* COMPAT_AUTOCONF_INCLUDED */"		;\
++-	) > backport-include/backport/autoconf.h
+++	) > $@.new
+++	@if cmp -s $@ $@.new; then \
+++		rm -f $@.new; \
+++	else \
+++		mv $@.new $@; \
+++	fi
++ 	@echo " done."
++ 
++ .PHONY: modules
+diff --git a/package/kernel/mac80211/patches/build/002-change_allconfig.patch b/package/kernel/mac80211/patches/build/002-change_allconfig.patch
+new file mode 100644
+index 0000000000..368725d0c3
+--- /dev/null
++++ b/package/kernel/mac80211/patches/build/002-change_allconfig.patch
+@@ -0,0 +1,64 @@
++--- a/kconf/conf.c
+++++ b/kconf/conf.c
++@@ -598,40 +598,12 @@ int main(int ac, char **av)
++ 	case oldconfig:
++ 	case listnewconfig:
++ 	case olddefconfig:
++-		conf_read(NULL);
++-		break;
++ 	case allnoconfig:
++ 	case allyesconfig:
++ 	case allmodconfig:
++ 	case alldefconfig:
++ 	case randconfig:
++-		name = getenv("KCONFIG_ALLCONFIG");
++-		if (!name)
++-			break;
++-		if ((strcmp(name, "") != 0) && (strcmp(name, "1") != 0)) {
++-			if (conf_read_simple(name, S_DEF_USER)) {
++-				fprintf(stderr,
++-					_("*** Can't read seed configuration \"%s\"!\n"),
++-					name);
++-				exit(1);
++-			}
++-			break;
++-		}
++-		switch (input_mode) {
++-		case allnoconfig:	name = "allno.config"; break;
++-		case allyesconfig:	name = "allyes.config"; break;
++-		case allmodconfig:	name = "allmod.config"; break;
++-		case alldefconfig:	name = "alldef.config"; break;
++-		case randconfig:	name = "allrandom.config"; break;
++-		default: break;
++-		}
++-		if (conf_read_simple(name, S_DEF_USER) &&
++-		    conf_read_simple("all.config", S_DEF_USER)) {
++-			fprintf(stderr,
++-				_("*** KCONFIG_ALLCONFIG set, but no \"%s\" or \"all.config\" file found\n"),
++-				name);
++-			exit(1);
++-		}
+++		conf_read(NULL);
++ 		break;
++ 	default:
++ 		break;
++--- a/kconf/confdata.c
+++++ b/kconf/confdata.c
++@@ -1170,6 +1170,8 @@ bool conf_set_all_new_symbols(enum conf_
++ 	}
++ 	bool has_changed = false;
++ 
+++	sym_clear_all_valid();
+++
++ 	for_all_symbols(i, sym) {
++ 		if (sym_has_value(sym) || (sym->flags & SYMBOL_VALID))
++ 			continue;
++@@ -1213,8 +1215,6 @@ bool conf_set_all_new_symbols(enum conf_
++ 
++ 	}
++ 
++-	sym_clear_all_valid();
++-
++ 	/*
++ 	 * We have different type of choice blocks.
++ 	 * If curr.tri equals to mod then we can select several
+diff --git a/package/kernel/mac80211/patches/build/003-remove_bogus_modparams.patch b/package/kernel/mac80211/patches/build/003-remove_bogus_modparams.patch
+new file mode 100644
+index 0000000000..aa26c8cb2a
+--- /dev/null
++++ b/package/kernel/mac80211/patches/build/003-remove_bogus_modparams.patch
+@@ -0,0 +1,34 @@
++--- a/compat/main.c
+++++ b/compat/main.c
++@@ -19,31 +19,6 @@ MODULE_LICENSE("GPL");
++ #error "You need a CPTCFG_VERSION"
++ #endif
++ 
++-static char *backported_kernel_name = CPTCFG_KERNEL_NAME;
++-
++-module_param(backported_kernel_name, charp, 0400);
++-MODULE_PARM_DESC(backported_kernel_name,
++-		 "The kernel tree name that was used for this backport (" CPTCFG_KERNEL_NAME ")");
++-
++-#ifdef BACKPORTS_GIT_TRACKED
++-static char *backports_tracker_id = BACKPORTS_GIT_TRACKED;
++-module_param(backports_tracker_id, charp, 0400);
++-MODULE_PARM_DESC(backports_tracker_id,
++-		 "The version of the tree containing this backport (" BACKPORTS_GIT_TRACKED ")");
++-#else
++-static char *backported_kernel_version = CPTCFG_KERNEL_VERSION;
++-static char *backports_version = CPTCFG_VERSION;
++-
++-module_param(backported_kernel_version, charp, 0400);
++-MODULE_PARM_DESC(backported_kernel_version,
++-		 "The kernel version that was used for this backport (" CPTCFG_KERNEL_VERSION ")");
++-
++-module_param(backports_version, charp, 0400);
++-MODULE_PARM_DESC(backports_version,
++-		 "The git version of the backports tree used to generate this backport (" CPTCFG_VERSION ")");
++-
++-#endif
++-
++ void backport_dependency_symbol(void)
++ {
++ }
+diff --git a/package/kernel/mac80211/patches/build/012-kernel_build_check.patch b/package/kernel/mac80211/patches/build/012-kernel_build_check.patch
+new file mode 100644
+index 0000000000..d225ba1820
+--- /dev/null
++++ b/package/kernel/mac80211/patches/build/012-kernel_build_check.patch
+@@ -0,0 +1,11 @@
++--- a/Makefile
+++++ b/Makefile
++@@ -2,7 +2,7 @@
++ # Makefile for the output source package
++ #
++ 
++-ifeq ($(KERNELRELEASE),)
+++ifeq ($(KERNELVERSION),)
++ 
++ MAKEFLAGS += --no-print-directory
++ SHELL := /usr/bin/env bash
+diff --git a/package/kernel/mac80211/patches/build/060-no_local_ssb_bcma.patch b/package/kernel/mac80211/patches/build/060-no_local_ssb_bcma.patch
+new file mode 100644
+index 0000000000..4ad2ac081a
+--- /dev/null
++++ b/package/kernel/mac80211/patches/build/060-no_local_ssb_bcma.patch
+@@ -0,0 +1,314 @@
++--- a/local-symbols
+++++ b/local-symbols
++@@ -470,43 +470,6 @@ USB_VL600=
++ USB_NET_CH9200=
++ USB_NET_AQC111=
++ USB_RTL8153_ECM=
++-SSB_POSSIBLE=
++-SSB=
++-SSB_SPROM=
++-SSB_BLOCKIO=
++-SSB_PCIHOST_POSSIBLE=
++-SSB_PCIHOST=
++-SSB_B43_PCI_BRIDGE=
++-SSB_PCMCIAHOST_POSSIBLE=
++-SSB_PCMCIAHOST=
++-SSB_SDIOHOST_POSSIBLE=
++-SSB_SDIOHOST=
++-SSB_HOST_SOC=
++-SSB_SERIAL=
++-SSB_DRIVER_PCICORE_POSSIBLE=
++-SSB_DRIVER_PCICORE=
++-SSB_PCICORE_HOSTMODE=
++-SSB_DRIVER_MIPS=
++-SSB_SFLASH=
++-SSB_EMBEDDED=
++-SSB_DRIVER_EXTIF=
++-SSB_DRIVER_GIGE=
++-SSB_DRIVER_GPIO=
++-BCMA_POSSIBLE=
++-BCMA=
++-BCMA_BLOCKIO=
++-BCMA_HOST_PCI_POSSIBLE=
++-BCMA_HOST_PCI=
++-BCMA_HOST_SOC=
++-BCMA_DRIVER_PCI=
++-BCMA_DRIVER_PCI_HOSTMODE=
++-BCMA_DRIVER_MIPS=
++-BCMA_PFLASH=
++-BCMA_SFLASH=
++-BCMA_NFLASH=
++-BCMA_DRIVER_GMAC_CMN=
++-BCMA_DRIVER_GPIO=
++-BCMA_DEBUG=
++ USB_ACM=
++ USB_PRINTER=
++ USB_WDM=
++--- a/drivers/net/wireless/broadcom/b43/Kconfig
+++++ b/drivers/net/wireless/broadcom/b43/Kconfig
++@@ -63,21 +63,21 @@ endchoice
++ config B43_PCI_AUTOSELECT
++ 	bool
++ 	depends on B43 && SSB_PCIHOST_POSSIBLE
++-	select SSB_PCIHOST
++-	select SSB_B43_PCI_BRIDGE
+++	depends on SSB_PCIHOST
+++	depends on SSB_B43_PCI_BRIDGE
++ 	default y
++ 
++ # Auto-select SSB PCICORE driver, if possible
++ config B43_PCICORE_AUTOSELECT
++ 	bool
++ 	depends on B43 && SSB_DRIVER_PCICORE_POSSIBLE
++-	select SSB_DRIVER_PCICORE
+++	depends on SSB_DRIVER_PCICORE
++ 	default y
++ 
++ config B43_SDIO
++ 	bool "Broadcom 43xx SDIO device support"
++ 	depends on B43 && B43_SSB && SSB_SDIOHOST_POSSIBLE
++-	select SSB_SDIOHOST
+++	depends on SSB_SDIOHOST
++ 	help
++ 	  Broadcom 43xx device support for Soft-MAC SDIO devices.
++ 
++@@ -96,13 +96,13 @@ config B43_SDIO
++ config B43_BCMA_PIO
++ 	bool
++ 	depends on B43 && B43_BCMA
++-	select BCMA_BLOCKIO
+++	depends on BCMA_BLOCKIO
++ 	default y
++ 
++ config B43_PIO
++ 	bool
++ 	depends on B43 && B43_SSB
++-	select SSB_BLOCKIO
+++	depends on SSB_BLOCKIO
++ 	default y
++ 
++ config B43_PHY_G
++--- a/drivers/net/wireless/broadcom/b43/main.c
+++++ b/drivers/net/wireless/broadcom/b43/main.c
++@@ -2853,7 +2853,7 @@ static struct ssb_device *b43_ssb_gpio_d
++ {
++ 	struct ssb_bus *bus = dev->dev->sdev->bus;
++ 
++-#ifdef CPTCFG_SSB_DRIVER_PCICORE
+++#ifdef CONFIG_SSB_DRIVER_PCICORE
++ 	return (bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev);
++ #else
++ 	return bus->chipco.dev;
++@@ -4871,7 +4871,7 @@ static int b43_wireless_core_init(struct
++ 	}
++ 	if (sprom->boardflags_lo & B43_BFL_XTAL_NOSLOW)
++ 		hf |= B43_HF_DSCRQ; /* Disable slowclock requests from ucode. */
++-#if defined(CPTCFG_B43_SSB) && defined(CPTCFG_SSB_DRIVER_PCICORE)
+++#if defined(CPTCFG_B43_SSB) && defined(CONFIG_SSB_DRIVER_PCICORE)
++ 	if (dev->dev->bus_type == B43_BUS_SSB &&
++ 	    dev->dev->sdev->bus->bustype == SSB_BUSTYPE_PCI &&
++ 	    dev->dev->sdev->bus->pcicore.dev->id.revision <= 10)
++--- a/drivers/net/wireless/broadcom/b43legacy/Kconfig
+++++ b/drivers/net/wireless/broadcom/b43legacy/Kconfig
++@@ -3,7 +3,7 @@ config B43LEGACY
++ 	tristate "Broadcom 43xx-legacy wireless support (mac80211 stack)"
++ 	depends on m
++ 	depends on SSB_POSSIBLE && MAC80211 && HAS_DMA
++-	select SSB
+++	depends on SSB
++ 	depends on FW_LOADER
++ 	help
++ 	  b43legacy is a driver for 802.11b devices from Broadcom (BCM4301 and
++@@ -25,15 +25,15 @@ config B43LEGACY
++ config B43LEGACY_PCI_AUTOSELECT
++ 	bool
++ 	depends on B43LEGACY && SSB_PCIHOST_POSSIBLE
++-	select SSB_PCIHOST
++-	select SSB_B43_PCI_BRIDGE
+++	depends on SSB_PCIHOST
+++	depends on SSB_B43_PCI_BRIDGE
++ 	default y
++ 
++ # Auto-select SSB PCICORE driver, if possible
++ config B43LEGACY_PCICORE_AUTOSELECT
++ 	bool
++ 	depends on B43LEGACY && SSB_DRIVER_PCICORE_POSSIBLE
++-	select SSB_DRIVER_PCICORE
+++	depends on SSB_DRIVER_PCICORE
++ 	default y
++ 
++ # LED support
++--- a/drivers/net/wireless/broadcom/b43legacy/main.c
+++++ b/drivers/net/wireless/broadcom/b43legacy/main.c
++@@ -1907,7 +1907,7 @@ static int b43legacy_gpio_init(struct b4
++ 	if (dev->dev->id.revision >= 2)
++ 		mask  |= 0x0010; /* FIXME: This is redundant. */
++ 
++-#ifdef CPTCFG_SSB_DRIVER_PCICORE
+++#ifdef CONFIG_SSB_DRIVER_PCICORE
++ 	pcidev = bus->pcicore.dev;
++ #endif
++ 	gpiodev = bus->chipco.dev ? : pcidev;
++@@ -1926,7 +1926,7 @@ static void b43legacy_gpio_cleanup(struc
++ 	struct ssb_bus *bus = dev->dev->bus;
++ 	struct ssb_device *gpiodev, *pcidev = NULL;
++ 
++-#ifdef CPTCFG_SSB_DRIVER_PCICORE
+++#ifdef CONFIG_SSB_DRIVER_PCICORE
++ 	pcidev = bus->pcicore.dev;
++ #endif
++ 	gpiodev = bus->chipco.dev ? : pcidev;
++--- a/drivers/net/wireless/broadcom/brcm80211/Kconfig
+++++ b/drivers/net/wireless/broadcom/brcm80211/Kconfig
++@@ -8,7 +8,7 @@ config BRCMSMAC
++ 	depends on m
++ 	depends on MAC80211
++ 	depends on BCMA_POSSIBLE
++-	select BCMA
+++	depends on BCMA
++ 	select BRCMUTIL
++ 	depends on FW_LOADER
++ 	depends on CORDIC
++--- a/Kconfig.local
+++++ b/Kconfig.local
++@@ -1414,117 +1414,6 @@ config BACKPORTED_USB_NET_AQC111
++ config BACKPORTED_USB_RTL8153_ECM
++ 	tristate
++ 	default USB_RTL8153_ECM
++-config BACKPORTED_SSB_POSSIBLE
++-	tristate
++-	default SSB_POSSIBLE
++-config BACKPORTED_SSB
++-	tristate
++-	default SSB
++-config BACKPORTED_SSB_SPROM
++-	tristate
++-	default SSB_SPROM
++-config BACKPORTED_SSB_BLOCKIO
++-	tristate
++-	default SSB_BLOCKIO
++-config BACKPORTED_SSB_PCIHOST_POSSIBLE
++-	tristate
++-	default SSB_PCIHOST_POSSIBLE
++-config BACKPORTED_SSB_PCIHOST
++-	tristate
++-	default SSB_PCIHOST
++-config BACKPORTED_SSB_B43_PCI_BRIDGE
++-	tristate
++-	default SSB_B43_PCI_BRIDGE
++-config BACKPORTED_SSB_PCMCIAHOST_POSSIBLE
++-	tristate
++-	default SSB_PCMCIAHOST_POSSIBLE
++-config BACKPORTED_SSB_PCMCIAHOST
++-	tristate
++-	default SSB_PCMCIAHOST
++-config BACKPORTED_SSB_SDIOHOST_POSSIBLE
++-	tristate
++-	default SSB_SDIOHOST_POSSIBLE
++-config BACKPORTED_SSB_SDIOHOST
++-	tristate
++-	default SSB_SDIOHOST
++-config BACKPORTED_SSB_HOST_SOC
++-	tristate
++-	default SSB_HOST_SOC
++-config BACKPORTED_SSB_SERIAL
++-	tristate
++-	default SSB_SERIAL
++-config BACKPORTED_SSB_DRIVER_PCICORE_POSSIBLE
++-	tristate
++-	default SSB_DRIVER_PCICORE_POSSIBLE
++-config BACKPORTED_SSB_DRIVER_PCICORE
++-	tristate
++-	default SSB_DRIVER_PCICORE
++-config BACKPORTED_SSB_PCICORE_HOSTMODE
++-	tristate
++-	default SSB_PCICORE_HOSTMODE
++-config BACKPORTED_SSB_DRIVER_MIPS
++-	tristate
++-	default SSB_DRIVER_MIPS
++-config BACKPORTED_SSB_SFLASH
++-	tristate
++-	default SSB_SFLASH
++-config BACKPORTED_SSB_EMBEDDED
++-	tristate
++-	default SSB_EMBEDDED
++-config BACKPORTED_SSB_DRIVER_EXTIF
++-	tristate
++-	default SSB_DRIVER_EXTIF
++-config BACKPORTED_SSB_DRIVER_GIGE
++-	tristate
++-	default SSB_DRIVER_GIGE
++-config BACKPORTED_SSB_DRIVER_GPIO
++-	tristate
++-	default SSB_DRIVER_GPIO
++-config BACKPORTED_BCMA_POSSIBLE
++-	tristate
++-	default BCMA_POSSIBLE
++-config BACKPORTED_BCMA
++-	tristate
++-	default BCMA
++-config BACKPORTED_BCMA_BLOCKIO
++-	tristate
++-	default BCMA_BLOCKIO
++-config BACKPORTED_BCMA_HOST_PCI_POSSIBLE
++-	tristate
++-	default BCMA_HOST_PCI_POSSIBLE
++-config BACKPORTED_BCMA_HOST_PCI
++-	tristate
++-	default BCMA_HOST_PCI
++-config BACKPORTED_BCMA_HOST_SOC
++-	tristate
++-	default BCMA_HOST_SOC
++-config BACKPORTED_BCMA_DRIVER_PCI
++-	tristate
++-	default BCMA_DRIVER_PCI
++-config BACKPORTED_BCMA_DRIVER_PCI_HOSTMODE
++-	tristate
++-	default BCMA_DRIVER_PCI_HOSTMODE
++-config BACKPORTED_BCMA_DRIVER_MIPS
++-	tristate
++-	default BCMA_DRIVER_MIPS
++-config BACKPORTED_BCMA_PFLASH
++-	tristate
++-	default BCMA_PFLASH
++-config BACKPORTED_BCMA_SFLASH
++-	tristate
++-	default BCMA_SFLASH
++-config BACKPORTED_BCMA_NFLASH
++-	tristate
++-	default BCMA_NFLASH
++-config BACKPORTED_BCMA_DRIVER_GMAC_CMN
++-	tristate
++-	default BCMA_DRIVER_GMAC_CMN
++-config BACKPORTED_BCMA_DRIVER_GPIO
++-	tristate
++-	default BCMA_DRIVER_GPIO
++-config BACKPORTED_BCMA_DEBUG
++-	tristate
++-	default BCMA_DEBUG
++ config BACKPORTED_USB_ACM
++ 	tristate
++ 	default USB_ACM
++--- a/Kconfig.sources
+++++ b/Kconfig.sources
++@@ -10,9 +10,6 @@ source "$BACKPORT_DIR/drivers/soc/qcom/K
++ source "$BACKPORT_DIR/drivers/net/wireless/Kconfig"
++ source "$BACKPORT_DIR/drivers/net/usb/Kconfig"
++ 
++-source "$BACKPORT_DIR/drivers/ssb/Kconfig"
++-source "$BACKPORT_DIR/drivers/bcma/Kconfig"
++-
++ source "$BACKPORT_DIR/drivers/usb/class/Kconfig"
++ 
++ source "$BACKPORT_DIR/drivers/staging/Kconfig"
++--- a/Makefile.kernel
+++++ b/Makefile.kernel
++@@ -43,8 +43,6 @@ obj-$(CPTCFG_QRTR) += net/qrtr/
++ obj-$(CPTCFG_QCOM_QMI_HELPERS) += drivers/soc/qcom/
++ obj-$(CPTCFG_MHI_BUS) += drivers/bus/mhi/
++ obj-$(CPTCFG_WLAN) += drivers/net/wireless/
++-obj-$(CPTCFG_SSB) += drivers/ssb/
++-obj-$(CPTCFG_BCMA) += drivers/bcma/
++ obj-$(CPTCFG_USB_NET_RNDIS_WLAN) += drivers/net/usb/
++ 
++ obj-$(CPTCFG_USB_WDM) += drivers/usb/class/
+diff --git a/package/kernel/mac80211/patches/build/070-remove-broken-wext-select.patch b/package/kernel/mac80211/patches/build/070-remove-broken-wext-select.patch
+new file mode 100644
+index 0000000000..121b7faad9
+--- /dev/null
++++ b/package/kernel/mac80211/patches/build/070-remove-broken-wext-select.patch
+@@ -0,0 +1,10 @@
++--- a/drivers/staging/rtl8723bs/Kconfig
+++++ b/drivers/staging/rtl8723bs/Kconfig
++@@ -5,7 +5,6 @@ config RTL8723BS
++ 	depends on m
++ 	depends on WLAN && MMC && CFG80211
++ 	depends on m
++-	select CFG80211_WEXT
++ 	depends on CRYPTO
++ 	select BPAUTO_CRYPTO_LIB_ARC4
++ 	help
+diff --git a/package/kernel/mac80211/patches/build/080-resv_start_op.patch b/package/kernel/mac80211/patches/build/080-resv_start_op.patch
+new file mode 100644
+index 0000000000..40b8e94a20
+--- /dev/null
++++ b/package/kernel/mac80211/patches/build/080-resv_start_op.patch
+@@ -0,0 +1,24 @@
++--- a/drivers/net/wireless/mac80211_hwsim.c
+++++ b/drivers/net/wireless/mac80211_hwsim.c
++@@ -5363,7 +5363,9 @@ static struct genl_family hwsim_genl_fam
++ 	.module = THIS_MODULE,
++ 	.small_ops = hwsim_ops,
++ 	.n_small_ops = ARRAY_SIZE(hwsim_ops),
+++#if LINUX_VERSION_IS_GEQ(6,1,0)
++ 	.resv_start_op = HWSIM_CMD_DEL_MAC_ADDR + 1,
+++#endif
++ 	.mcgrps = hwsim_mcgrps,
++ 	.n_mcgrps = ARRAY_SIZE(hwsim_mcgrps),
++ };
++--- a/net/wireless/nl80211.c
+++++ b/net/wireless/nl80211.c
++@@ -17233,7 +17233,9 @@ static struct genl_family nl80211_fam __
++ 	.n_ops = ARRAY_SIZE(nl80211_ops),
++ 	.small_ops = nl80211_small_ops,
++ 	.n_small_ops = ARRAY_SIZE(nl80211_small_ops),
+++#if LINUX_VERSION_IS_GEQ(6,1,0)
++ 	.resv_start_op = NL80211_CMD_REMOVE_LINK_STA + 1,
+++#endif
++ 	.mcgrps = nl80211_mcgrps,
++ 	.n_mcgrps = ARRAY_SIZE(nl80211_mcgrps),
++ 	.parallel_ops = true,
+diff --git a/package/kernel/mac80211/patches/build/090-bcma-otp.patch b/package/kernel/mac80211/patches/build/090-bcma-otp.patch
+new file mode 100644
+index 0000000000..3974776124
+--- /dev/null
++++ b/package/kernel/mac80211/patches/build/090-bcma-otp.patch
+@@ -0,0 +1,13 @@
++--- /dev/null
+++++ b/backport-include/linux/bcma/bcma_driver_chipcommon.h
++@@ -0,0 +1,10 @@
+++#ifndef __BACKPORT_BCMA_DRIVER_CHIPCOMMON_H
+++#define __BACKPORT_BCMA_DRIVER_CHIPCOMMON_H
+++
+++#include_next <linux/bcma/bcma_driver_chipcommon.h>
+++
+++#ifndef BCMA_CC_SROM_CONTROL_OTP_PRESENT
+++#define BCMA_CC_SROM_CONTROL_OTP_PRESENT 0x00000020
+++#endif
+++
+++#endif
+diff --git a/package/kernel/mac80211/patches/build/100-backports-drop-QRTR-and-MHI.patch b/package/kernel/mac80211/patches/build/100-backports-drop-QRTR-and-MHI.patch
+new file mode 100644
+index 0000000000..b017a0ce14
+--- /dev/null
++++ b/package/kernel/mac80211/patches/build/100-backports-drop-QRTR-and-MHI.patch
+@@ -0,0 +1,76 @@
++From 54e0f9aaf340377fb76acdffee9ec7372c4b70ae Mon Sep 17 00:00:00 2001
++From: Robert Marko <robimarko@gmail.com>
++Date: Mon, 17 Oct 2022 11:35:36 +0200
++Subject: [PATCH] backports: drop QRTR and MHI
++
++Backports currently include QRTR and MHI due to ath11k-pci requiring them,
++however this at the same time prevents us from adding ath11k-ahb as it
++also requires QRTR however its AHB variant from the kernel will conflict
++with the core provided by backports.
++
++Since MHI also conflicts with existing OpenWrt kmods providing MHI drop
++both from backports and use the ones provided by OpenWrt kernel.
++
++Signed-off-by: Robert Marko <robimarko@gmail.com>
++---
++ Kconfig.sources                         | 2 --
++ Makefile.kernel                         | 2 --
++ drivers/net/wireless/ath/ath11k/Kconfig | 6 +++---
++ local-symbols                           | 8 --------
++ 4 files changed, 3 insertions(+), 15 deletions(-)
++
++--- a/Kconfig.sources
+++++ b/Kconfig.sources
++@@ -4,8 +4,6 @@ source "$BACKPORT_DIR/compat/Kconfig"
++ # these are copied from the kernel
++ source "$BACKPORT_DIR/net/wireless/Kconfig"
++ source "$BACKPORT_DIR/net/mac80211/Kconfig"
++-source "$BACKPORT_DIR/net/qrtr/Kconfig"
++-source "$BACKPORT_DIR/drivers/bus/mhi/Kconfig"
++ source "$BACKPORT_DIR/drivers/soc/qcom/Kconfig"
++ source "$BACKPORT_DIR/drivers/net/wireless/Kconfig"
++ source "$BACKPORT_DIR/drivers/net/usb/Kconfig"
++--- a/Makefile.kernel
+++++ b/Makefile.kernel
++@@ -39,9 +39,7 @@ obj-y += compat/
++ 
++ obj-$(CPTCFG_CFG80211) += net/wireless/
++ obj-$(CPTCFG_MAC80211) += net/mac80211/
++-obj-$(CPTCFG_QRTR) += net/qrtr/
++ obj-$(CPTCFG_QCOM_QMI_HELPERS) += drivers/soc/qcom/
++-obj-$(CPTCFG_MHI_BUS) += drivers/bus/mhi/
++ obj-$(CPTCFG_WLAN) += drivers/net/wireless/
++ obj-$(CPTCFG_USB_NET_RNDIS_WLAN) += drivers/net/usb/
++ 
++--- a/drivers/net/wireless/ath/ath11k/Kconfig
+++++ b/drivers/net/wireless/ath/ath11k/Kconfig
++@@ -25,9 +25,9 @@ config ATH11K_PCI
++ 	tristate "Atheros ath11k PCI support"
++ 	depends on m
++ 	depends on ATH11K && PCI
++-	select MHI_BUS
++-	select QRTR
++-	select QRTR_MHI
+++	depends on MHI_BUS
+++	depends on QRTR
+++	depends on QRTR_MHI
++ 	help
++ 	  This module adds support for PCIE bus
++ 
++--- a/local-symbols
+++++ b/local-symbols
++@@ -65,14 +65,6 @@ MAC80211_MESH_PS_DEBUG=
++ MAC80211_TDLS_DEBUG=
++ MAC80211_DEBUG_COUNTERS=
++ MAC80211_STA_HASH_MAX_SIZE=
++-QRTR=
++-QRTR_SMD=
++-QRTR_TUN=
++-QRTR_MHI=
++-MHI_BUS=
++-MHI_BUS_DEBUG=
++-MHI_BUS_PCI_GENERIC=
++-MHI_BUS_EP=
++ QCOM_AOSS_QMP=
++ QCOM_COMMAND_DB=
++ QCOM_CPR=
+diff --git a/package/kernel/mac80211/patches/build/110-backport_napi_build_skb.patch b/package/kernel/mac80211/patches/build/110-backport_napi_build_skb.patch
+new file mode 100644
+index 0000000000..1e152fecea
+--- /dev/null
++++ b/package/kernel/mac80211/patches/build/110-backport_napi_build_skb.patch
+@@ -0,0 +1,11 @@
++--- a/backport-include/linux/skbuff.h
+++++ b/backport-include/linux/skbuff.h
++@@ -144,4 +144,8 @@ static inline u64 skb_get_kcov_handle(st
++ #define napi_build_skb build_skb
++ #endif
++ 
+++#if LINUX_VERSION_IS_LESS(5,11,0)
+++#define napi_build_skb build_skb
+++#endif
+++
++ #endif /* __BACKPORT_SKBUFF_H */
+diff --git a/package/kernel/mac80211/patches/mt7601u/001-wifi-mt7601u-update-firmware-path.patch b/package/kernel/mac80211/patches/mt7601u/001-wifi-mt7601u-update-firmware-path.patch
+new file mode 100644
+index 0000000000..5d982906c5
+--- /dev/null
++++ b/package/kernel/mac80211/patches/mt7601u/001-wifi-mt7601u-update-firmware-path.patch
+@@ -0,0 +1,55 @@
++From patchwork Mon May 15 22:56:53 2023
++Content-Type: text/plain; charset="utf-8"
++MIME-Version: 1.0
++Content-Transfer-Encoding: 7bit
++X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
++X-Patchwork-Id: 13242309
++X-Patchwork-Delegate: kvalo@adurom.com
++Return-Path: <linux-wireless-owner@vger.kernel.org>
++Date: Tue, 16 May 2023 00:56:53 +0200
++From: Daniel Golle <daniel@makrotopia.org>
++To: Jakub Kicinski <kuba@kernel.org>, Kalle Valo <kvalo@kernel.org>,
++        "David S. Miller" <davem@davemloft.net>,
++        Eric Dumazet <edumazet@google.com>,
++        Paolo Abeni <pabeni@redhat.com>,
++        Matthias Brugger <matthias.bgg@gmail.com>,
++        AngeloGioacchino Del Regno
++        <angelogioacchino.delregno@collabora.com>,
++        linux-wireless@vger.kernel.org, netdev@vger.kernel.org,
++        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
++        linux-mediatek@lists.infradead.org
++Subject: [PATCH] wifi: mt7601u: update firmware path
++Message-ID: 
++ <fefcbf36f13873ae0d97438a0156b87e7e1ae64e.1684191377.git.daniel@makrotopia.org>
++MIME-Version: 1.0
++Content-Disposition: inline
++Precedence: bulk
++List-ID: <linux-wireless.vger.kernel.org>
++X-Mailing-List: linux-wireless@vger.kernel.org
++
++mt7601u.bin was moved to mediatek/ folder in linux-wireless via commit
++8451c2b1 ("mt76xx: Move the old Mediatek WiFi firmware to mediatek")
++and linux-firmware release 20230515.
++
++Update the firmware path requested by the mt7601u driver to follow up
++with the move of the file.
++
++Signed-off-by: Daniel Golle <daniel@makrotopia.org>
++---
++ drivers/net/wireless/mediatek/mt7601u/usb.h | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++
++base-commit: 0d9b41daa5907756a31772d8af8ac5ff25cf17c1
++
++--- a/drivers/net/wireless/mediatek/mt7601u/usb.h
+++++ b/drivers/net/wireless/mediatek/mt7601u/usb.h
++@@ -8,7 +8,7 @@
++ 
++ #include "mt7601u.h"
++ 
++-#define MT7601U_FIRMWARE	"mt7601u.bin"
+++#define MT7601U_FIRMWARE	"mediatek/mt7601u.bin"
++ 
++ #define MT_VEND_REQ_MAX_RETRY	10
++ #define MT_VEND_REQ_TOUT_MS	300
+diff --git a/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch b/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch
+new file mode 100644
+index 0000000000..11536651b5
+--- /dev/null
++++ b/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch
+@@ -0,0 +1,10 @@
++--- a/drivers/net/wireless/marvell/mwl8k.c
+++++ b/drivers/net/wireless/marvell/mwl8k.c
++@@ -5703,6 +5703,7 @@ MODULE_FIRMWARE("mwl8k/fmimage_8366.fw")
++ MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
++ 
++ static const struct pci_device_id mwl8k_pci_id_table[] = {
+++	{ PCI_VDEVICE(MARVELL, 0x2a02), .driver_data = MWL8363, },
++ 	{ PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
++ 	{ PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
++ 	{ PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
+diff --git a/package/kernel/mac80211/patches/mwl/801-libertas-configure-sysfs-links.patch b/package/kernel/mac80211/patches/mwl/801-libertas-configure-sysfs-links.patch
+new file mode 100644
+index 0000000000..1dbcb1bfef
+--- /dev/null
++++ b/package/kernel/mac80211/patches/mwl/801-libertas-configure-sysfs-links.patch
+@@ -0,0 +1,21 @@
++--- a/drivers/net/wireless/marvell/libertas/cfg.c
+++++ b/drivers/net/wireless/marvell/libertas/cfg.c
++@@ -2052,6 +2052,8 @@ struct wireless_dev *lbs_cfg_alloc(struc
++ 		goto err_wiphy_new;
++ 	}
++ 
+++	set_wiphy_dev(wdev->wiphy, dev);
+++
++ 	return wdev;
++ 
++  err_wiphy_new:
++--- a/drivers/net/wireless/marvell/libertas/main.c
+++++ b/drivers/net/wireless/marvell/libertas/main.c
++@@ -935,6 +935,7 @@ struct lbs_private *lbs_add_card(void *c
++ 		goto err_adapter;
++ 	}
++ 
+++	dev_net_set(dev, wiphy_net(wdev->wiphy));
++ 	dev->ieee80211_ptr = wdev;
++ 	dev->ml_priv = priv;
++ 	SET_NETDEV_DEV(dev, dmdev);
+diff --git a/package/kernel/mac80211/patches/mwl/802-libertas-set-wireless-macaddr.patch b/package/kernel/mac80211/patches/mwl/802-libertas-set-wireless-macaddr.patch
+new file mode 100644
+index 0000000000..b47aee5490
+--- /dev/null
++++ b/package/kernel/mac80211/patches/mwl/802-libertas-set-wireless-macaddr.patch
+@@ -0,0 +1,11 @@
++--- a/drivers/net/wireless/marvell/libertas/cfg.c
+++++ b/drivers/net/wireless/marvell/libertas/cfg.c
++@@ -2128,6 +2128,8 @@ int lbs_cfg_register(struct lbs_private
++ 	wdev->wiphy->n_cipher_suites = ARRAY_SIZE(cipher_suites);
++ 	wdev->wiphy->reg_notifier = lbs_reg_notifier;
++ 
+++	memcpy(wdev->wiphy->perm_addr, priv->current_addr, ETH_ALEN);
+++
++ 	ret = wiphy_register(wdev->wiphy);
++ 	if (ret < 0)
++ 		pr_err("cannot register wiphy device\n");
+diff --git a/package/kernel/mac80211/patches/mwl/900-mwifiex-increase-the-global-limit-up-to-4-SSID.patch b/package/kernel/mac80211/patches/mwl/900-mwifiex-increase-the-global-limit-up-to-4-SSID.patch
+new file mode 100644
+index 0000000000..caa139a2c6
+--- /dev/null
++++ b/package/kernel/mac80211/patches/mwl/900-mwifiex-increase-the-global-limit-up-to-4-SSID.patch
+@@ -0,0 +1,41 @@
++From ef8098cd6cb8b5989afef2e8461fe6ba9570a854 Mon Sep 17 00:00:00 2001
++From: Josef Schlehofer <pepe.schlehofer@gmail.com>
++Date: Wed, 24 Nov 2021 12:47:40 +0100
++Subject: [PATCH] mwifiex: increase the global limit up to 4 SSID
++
++Firmware for SDIO (88W8997), which is used in Turris MOX SDIO addon [1],
++allows up to 4 SSID. Unfortunately, driver (even in mainline kernel)
++has a global limit for all Marvell cards up to 3 SSID.
++
++Pali Rohár tested this patch and verified that the SDIO Wi-Fi addon works
++with the 4 SSID. So, let's increase the global limit from 3 to 4.
++
++Ideally, this patch should be done differently before sending
++it to Linux kernel. It means that limit definition should be moved to
++the card-specific structure.
++
++[1] https://docs.turris.cz/hw/mox/addons/#wi-fi-sdio
++---
++ drivers/net/wireless/marvell/mwifiex/decl.h | 4 ++--
++ 1 file changed, 2 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/wireless/marvell/mwifiex/decl.h
+++++ b/drivers/net/wireless/marvell/mwifiex/decl.h
++@@ -18,7 +18,7 @@
++ #include <net/cfg80211.h>
++ 
++ #define MWIFIEX_BSS_COEX_COUNT	     2
++-#define MWIFIEX_MAX_BSS_NUM         (3)
+++#define MWIFIEX_MAX_BSS_NUM         (4)
++ 
++ #define MWIFIEX_DMA_ALIGN_SZ	    64
++ #define MWIFIEX_RX_HEADROOM	    64
++@@ -100,7 +100,7 @@
++ #define MWIFIEX_RATE_INDEX_OFDM0   4
++ 
++ #define MWIFIEX_MAX_STA_NUM		3
++-#define MWIFIEX_MAX_UAP_NUM		3
+++#define MWIFIEX_MAX_UAP_NUM		4
++ #define MWIFIEX_MAX_P2P_NUM		3
++ 
++ #define MWIFIEX_A_BAND_START_FREQ	5000
+diff --git a/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch b/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch
+new file mode 100644
+index 0000000000..c8d24283aa
+--- /dev/null
++++ b/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch
+@@ -0,0 +1,20 @@
++--- a/drivers/net/wireless/marvell/mwl8k.c
+++++ b/drivers/net/wireless/marvell/mwl8k.c
++@@ -6289,6 +6289,8 @@ static int mwl8k_probe(struct pci_dev *p
++ 
++ 	priv->running_bsses = 0;
++ 
+++	wait_for_completion(&priv->firmware_loading_complete);
+++
++ 	return rc;
++ 
++ err_stop_firmware:
++@@ -6322,8 +6324,6 @@ static void mwl8k_remove(struct pci_dev
++ 		return;
++ 	priv = hw->priv;
++ 
++-	wait_for_completion(&priv->firmware_loading_complete);
++-
++ 	if (priv->fw_state == FW_STATE_ERROR) {
++ 		mwl8k_hw_reset(priv);
++ 		goto unmap;
+diff --git a/package/kernel/mac80211/patches/mwl/950-mwifiex-Print-stringified-name-of-command-in-error-l.patch b/package/kernel/mac80211/patches/mwl/950-mwifiex-Print-stringified-name-of-command-in-error-l.patch
+new file mode 100644
+index 0000000000..98ed9e60e9
+--- /dev/null
++++ b/package/kernel/mac80211/patches/mwl/950-mwifiex-Print-stringified-name-of-command-in-error-l.patch
+@@ -0,0 +1,189 @@
++From f7252b1b5755150535af226e806594bbefd45e0f Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
++Date: Sun, 26 Sep 2021 14:39:44 +0200
++Subject: [PATCH] mwifiex: Print stringified name of command in error log
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++Failed hex command number in error log is hard to understand.
++So add also more human readable stringified command name into error log.
++
++Signed-off-by: Pali Rohár <pali@kernel.org>
++---
++ drivers/net/wireless/marvell/mwifiex/cmdevt.c | 96 +++++++++++++++++--
++ drivers/net/wireless/marvell/mwifiex/main.h   |  2 +
++ .../wireless/marvell/mwifiex/sta_cmdresp.c    |  5 +-
++ .../net/wireless/marvell/mwifiex/uap_cmd.c    |  3 +-
++ 4 files changed, 95 insertions(+), 11 deletions(-)
++
++--- a/drivers/net/wireless/marvell/mwifiex/cmdevt.c
+++++ b/drivers/net/wireless/marvell/mwifiex/cmdevt.c
++@@ -16,6 +16,85 @@
++ 
++ static void mwifiex_cancel_pending_ioctl(struct mwifiex_adapter *adapter);
++ 
+++const char *
+++mwifiex_cmd_to_str(u16 command)
+++{
+++	switch (command) {
+++	case HostCmd_CMD_GET_HW_SPEC:			return "GET_HW_SPEC";
+++	case HostCmd_CMD_802_11_SCAN:			return "SCAN";
+++	case HostCmd_CMD_802_11_GET_LOG:		return "GET_LOG";
+++	case HostCmd_CMD_MAC_MULTICAST_ADR:		return "MAC_MULTICAST_ADR";
+++	case HostCmd_CMD_802_11_EEPROM_ACCESS:		return "EEPROM_ACCESS";
+++	case HostCmd_CMD_802_11_ASSOCIATE:		return "ASSOCIATE";
+++	case HostCmd_CMD_802_11_SNMP_MIB:		return "SNMP_MIB";
+++	case HostCmd_CMD_MAC_REG_ACCESS:		return "MAC_REG_ACCESS";
+++	case HostCmd_CMD_BBP_REG_ACCESS:		return "BBP_REG_ACCESS";
+++	case HostCmd_CMD_RF_REG_ACCESS:			return "RF_REG_ACCESS";
+++	case HostCmd_CMD_PMIC_REG_ACCESS:		return "PMIC_REG_ACCESS";
+++	case HostCmd_CMD_RF_TX_PWR:			return "RF_TX_PWR";
+++	case HostCmd_CMD_RF_ANTENNA:			return "RF_ANTENNA";
+++	case HostCmd_CMD_802_11_DEAUTHENTICATE:		return "DEAUTHENTICATE";
+++	case HostCmd_CMD_MAC_CONTROL:			return "MAC_CONTROL";
+++	case HostCmd_CMD_802_11_AD_HOC_START:		return "AD_HOC_START";
+++	case HostCmd_CMD_802_11_AD_HOC_JOIN:		return "AD_HOC_JOIN";
+++	case HostCmd_CMD_802_11_AD_HOC_STOP:		return "AD_HOC_STOP";
+++	case HostCmd_CMD_802_11_MAC_ADDRESS:		return "MAC_ADDRESS";
+++	case HostCmd_CMD_802_11D_DOMAIN_INFO:		return "DOMAIN_INFO";
+++	case HostCmd_CMD_802_11_KEY_MATERIAL:		return "KEY_MATERIAL";
+++	case HostCmd_CMD_802_11_BG_SCAN_CONFIG:		return "BG_SCAN_CONFIG";
+++	case HostCmd_CMD_802_11_BG_SCAN_QUERY:		return "BG_SCAN_QUERY";
+++	case HostCmd_CMD_WMM_GET_STATUS:		return "WMM_GET_STATUS";
+++	case HostCmd_CMD_802_11_SUBSCRIBE_EVENT:	return "SUBSCRIBE_EVENT";
+++	case HostCmd_CMD_802_11_TX_RATE_QUERY:		return "TX_RATE_QUERY";
+++	case HostCmd_CMD_802_11_IBSS_COALESCING_STATUS:	return "IBSS_COALESCING_STATUS";
+++	case HostCmd_CMD_MEM_ACCESS:			return "MEM_ACCESS";
+++	case HostCmd_CMD_CFG_DATA:			return "CFG_DATA";
+++	case HostCmd_CMD_VERSION_EXT:			return "VERSION_EXT";
+++	case HostCmd_CMD_MEF_CFG:			return "MEF_CFG";
+++	case HostCmd_CMD_RSSI_INFO:			return "RSSI_INFO";
+++	case HostCmd_CMD_FUNC_INIT:			return "FUNC_INIT";
+++	case HostCmd_CMD_FUNC_SHUTDOWN:			return "FUNC_SHUTDOWN";
+++	case HOST_CMD_APCMD_SYS_RESET:			return "SYS_RESET";
+++	case HostCmd_CMD_UAP_SYS_CONFIG:		return "UAP_SYS_CONFIG";
+++	case HostCmd_CMD_UAP_BSS_START:			return "UAP_BSS_START";
+++	case HostCmd_CMD_UAP_BSS_STOP:			return "UAP_BSS_STOP";
+++	case HOST_CMD_APCMD_STA_LIST:			return "STA_LIST";
+++	case HostCmd_CMD_UAP_STA_DEAUTH:		return "UAP_STA_DEAUTH";
+++	case HostCmd_CMD_11N_CFG:			return "11N_CFG";
+++	case HostCmd_CMD_11N_ADDBA_REQ:			return "ADDBA_REQ";
+++	case HostCmd_CMD_11N_ADDBA_RSP:			return "ADDBA_RSP";
+++	case HostCmd_CMD_11N_DELBA:			return "DELBA";
+++	case HostCmd_CMD_RECONFIGURE_TX_BUFF:		return "RECONFIGURE_TX_BUFF";
+++	case HostCmd_CMD_CHAN_REPORT_REQUEST:		return "CHAN_REPORT_REQUEST";
+++	case HostCmd_CMD_AMSDU_AGGR_CTRL:		return "AMSDU_AGGR_CTRL";
+++	case HostCmd_CMD_TXPWR_CFG:			return "TXPWR_CFG";
+++	case HostCmd_CMD_TX_RATE_CFG:			return "TX_RATE_CFG";
+++	case HostCmd_CMD_ROBUST_COEX:			return "ROBUST_COEX";
+++	case HostCmd_CMD_802_11_PS_MODE_ENH:		return "PS_MODE_ENH";
+++	case HostCmd_CMD_802_11_HS_CFG_ENH:		return "HS_CFG_ENH";
+++	case HostCmd_CMD_P2P_MODE_CFG:			return "P2P_MODE_CFG";
+++	case HostCmd_CMD_CAU_REG_ACCESS:		return "CAU_REG_ACCESS";
+++	case HostCmd_CMD_SET_BSS_MODE:			return "SET_BSS_MODE";
+++	case HostCmd_CMD_PCIE_DESC_DETAILS:		return "PCIE_DESC_DETAILS";
+++	case HostCmd_CMD_802_11_SCAN_EXT:		return "SCAN_EXT";
+++	case HostCmd_CMD_COALESCE_CFG:			return "COALESCE_CFG";
+++	case HostCmd_CMD_MGMT_FRAME_REG:		return "MGMT_FRAME_REG";
+++	case HostCmd_CMD_REMAIN_ON_CHAN:		return "REMAIN_ON_CHAN";
+++	case HostCmd_CMD_GTK_REKEY_OFFLOAD_CFG:		return "GTK_REKEY_OFFLOAD_CFG";
+++	case HostCmd_CMD_11AC_CFG:			return "11AC_CFG";
+++	case HostCmd_CMD_HS_WAKEUP_REASON:		return "HS_WAKEUP_REASON";
+++	case HostCmd_CMD_TDLS_CONFIG:			return "TDLS_CONFIG";
+++	case HostCmd_CMD_MC_POLICY:			return "MC_POLICY";
+++	case HostCmd_CMD_TDLS_OPER:			return "TDLS_OPER";
+++	case HostCmd_CMD_FW_DUMP_EVENT:			return "FW_DUMP_EVENT";
+++	case HostCmd_CMD_SDIO_SP_RX_AGGR_CFG:		return "SDIO_SP_RX_AGGR_CFG";
+++	case HostCmd_CMD_STA_CONFIGURE:			return "STA_CONFIGURE";
+++	case HostCmd_CMD_CHAN_REGION_CFG:		return "CHAN_REGION_CFG";
+++	case HostCmd_CMD_PACKET_AGGR_CTRL:		return "PACKET_AGGR_CTRL";
+++	default:					return "UNKNOWN";
+++	}
+++}
+++
++ /*
++  * This function initializes a command node.
++  *
++@@ -193,8 +272,8 @@ static int mwifiex_dnld_cmd_to_fw(struct
++ 	    cmd_code != HostCmd_CMD_FUNC_SHUTDOWN &&
++ 	    cmd_code != HostCmd_CMD_FUNC_INIT) {
++ 		mwifiex_dbg(adapter, ERROR,
++-			    "DNLD_CMD: FW in reset state, ignore cmd %#x\n",
++-			cmd_code);
+++			    "DNLD_CMD: FW in reset state, ignore cmd %s (%#x)\n",
+++			    mwifiex_cmd_to_str(cmd_code), cmd_code);
++ 		mwifiex_recycle_cmd_node(adapter, cmd_node);
++ 		queue_work(adapter->workqueue, &adapter->main_work);
++ 		return -1;
++@@ -653,8 +732,8 @@ int mwifiex_send_cmd(struct mwifiex_priv
++ 	/* Return error, since the command preparation failed */
++ 	if (ret) {
++ 		mwifiex_dbg(adapter, ERROR,
++-			    "PREP_CMD: cmd %#x preparation failed\n",
++-			cmd_no);
+++			    "PREP_CMD: cmd %s (%#x) preparation failed\n",
+++			    mwifiex_cmd_to_str(cmd_no), cmd_no);
++ 		mwifiex_insert_cmd_to_free_q(adapter, cmd_node);
++ 		return -1;
++ 	}
++@@ -902,8 +981,9 @@ int mwifiex_process_cmdresp(struct mwifi
++ 	if (adapter->hw_status == MWIFIEX_HW_STATUS_INITIALIZING) {
++ 		if (ret) {
++ 			mwifiex_dbg(adapter, ERROR,
++-				    "%s: cmd %#x failed during\t"
++-				    "initialization\n", __func__, cmdresp_no);
+++				    "%s: cmd %s (%#x) failed during\t"
+++				    "initialization\n", __func__,
+++				    mwifiex_cmd_to_str(cmdresp_no), cmdresp_no);
++ 			mwifiex_init_fw_complete(adapter);
++ 			return -1;
++ 		} else if (adapter->last_init_cmd == cmdresp_no)
++@@ -1273,8 +1353,8 @@ mwifiex_process_sleep_confirm_resp(struc
++ 
++ 	if (command != HostCmd_CMD_802_11_PS_MODE_ENH) {
++ 		mwifiex_dbg(adapter, ERROR,
++-			    "%s: rcvd unexpected resp for cmd %#x, result = %x\n",
++-			    __func__, command, result);
+++			    "%s: rcvd unexpected resp for cmd %s (%#x), result = %x\n",
+++			    __func__, mwifiex_cmd_to_str(command), command, result);
++ 		return;
++ 	}
++ 
++--- a/drivers/net/wireless/marvell/mwifiex/main.h
+++++ b/drivers/net/wireless/marvell/mwifiex/main.h
++@@ -1099,6 +1099,8 @@ void mwifiex_cancel_all_pending_cmd(stru
++ void mwifiex_cancel_pending_scan_cmd(struct mwifiex_adapter *adapter);
++ void mwifiex_cancel_scan(struct mwifiex_adapter *adapter);
++ 
+++const char *mwifiex_cmd_to_str(u16 command);
+++
++ void mwifiex_recycle_cmd_node(struct mwifiex_adapter *adapter,
++ 			      struct cmd_ctrl_node *cmd_node);
++ 
++--- a/drivers/net/wireless/marvell/mwifiex/sta_cmdresp.c
+++++ b/drivers/net/wireless/marvell/mwifiex/sta_cmdresp.c
++@@ -36,8 +36,9 @@ mwifiex_process_cmdresp_error(struct mwi
++ 	struct host_cmd_ds_802_11_ps_mode_enh *pm;
++ 
++ 	mwifiex_dbg(adapter, ERROR,
++-		    "CMD_RESP: cmd %#x error, result=%#x\n",
++-		    resp->command, resp->result);
+++		    "CMD_RESP: cmd %s (%#x) error, result=%#x\n",
+++		    mwifiex_cmd_to_str(le16_to_cpu(resp->command)),
+++		    le16_to_cpu(resp->command), le16_to_cpu(resp->result));
++ 
++ 	if (adapter->curr_cmd->wait_q_enabled)
++ 		adapter->cmd_wait_q.status = -1;
++--- a/drivers/net/wireless/marvell/mwifiex/uap_cmd.c
+++++ b/drivers/net/wireless/marvell/mwifiex/uap_cmd.c
++@@ -794,7 +794,8 @@ int mwifiex_uap_prepare_cmd(struct mwifi
++ 		break;
++ 	default:
++ 		mwifiex_dbg(priv->adapter, ERROR,
++-			    "PREP_CMD: unknown cmd %#x\n", cmd_no);
+++			    "PREP_CMD: unknown cmd (%s) %#x\n",
+++			    mwifiex_cmd_to_str(cmd_no), cmd_no);
++ 		return -1;
++ 	}
++ 
+diff --git a/package/kernel/mac80211/patches/rt2x00/100-rt2x00_options.patch b/package/kernel/mac80211/patches/rt2x00/100-rt2x00_options.patch
+new file mode 100644
+index 0000000000..295904c64e
+--- /dev/null
++++ b/package/kernel/mac80211/patches/rt2x00/100-rt2x00_options.patch
+@@ -0,0 +1,47 @@
++--- a/drivers/net/wireless/ralink/rt2x00/Kconfig
+++++ b/drivers/net/wireless/ralink/rt2x00/Kconfig
++@@ -226,36 +226,37 @@ config RT2800SOC
++ 
++ 
++ config RT2800_LIB
++-	tristate
+++	tristate "RT2800 USB/PCI support"
++ 	depends on m
++ 
++ config RT2800_LIB_MMIO
++-	tristate
+++	tristate "RT2800 MMIO support"
++ 	depends on m
++ 	select RT2X00_LIB_MMIO
++ 	select RT2800_LIB
++ 
++ config RT2X00_LIB_MMIO
++-	tristate
+++	tristate "RT2x00 MMIO support"
++ 	depends on m
++ 
++ config RT2X00_LIB_PCI
++-	tristate
+++	tristate "RT2x00 PCI support"
++ 	depends on m
++ 	select RT2X00_LIB
++ 
++ config RT2X00_LIB_SOC
++-	tristate
+++	tristate "RT2x00 SoC support"
+++	depends on SOC_RT288X || SOC_RT305X || SOC_MT7620
++ 	depends on m
++ 	select RT2X00_LIB
++ 
++ config RT2X00_LIB_USB
++-	tristate
+++	tristate "RT2x00 USB support"
++ 	depends on m
++ 	select RT2X00_LIB
++ 
++ config RT2X00_LIB
++-	tristate
+++	tristate "RT2x00 support"
++ 	depends on m
++ 
++ config RT2X00_LIB_FIRMWARE
+diff --git a/package/kernel/mac80211/patches/rt2x00/501-rt2x00-allow-to-build-rt2800soc-module-for-RT3883.patch b/package/kernel/mac80211/patches/rt2x00/501-rt2x00-allow-to-build-rt2800soc-module-for-RT3883.patch
+new file mode 100644
+index 0000000000..b4106b0197
+--- /dev/null
++++ b/package/kernel/mac80211/patches/rt2x00/501-rt2x00-allow-to-build-rt2800soc-module-for-RT3883.patch
+@@ -0,0 +1,30 @@
++From 91094ed065f7794886b4a5490fd6de942f036bb4 Mon Sep 17 00:00:00 2001
++From: Gabor Juhos <juhosg@openwrt.org>
++Date: Sun, 24 Mar 2013 19:26:26 +0100
++Subject: [PATCH] rt2x00: allow to build rt2800soc module for RT3883
++
++Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
++---
++ drivers/net/wireless/ralink/rt2x00/Kconfig |    2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/net/wireless/ralink/rt2x00/Kconfig
+++++ b/drivers/net/wireless/ralink/rt2x00/Kconfig
++@@ -211,7 +211,7 @@ endif
++ config RT2800SOC
++ 	tristate "Ralink WiSoC support"
++ 	depends on m
++-	depends on SOC_RT288X || SOC_RT305X || SOC_MT7620
+++	depends on SOC_RT288X || SOC_RT305X || SOC_RT3883 || SOC_MT7620
++ 	select RT2X00_LIB_SOC
++ 	select RT2X00_LIB_MMIO
++ 	select RT2X00_LIB_CRYPTO
++@@ -246,7 +246,7 @@ config RT2X00_LIB_PCI
++ 
++ config RT2X00_LIB_SOC
++ 	tristate "RT2x00 SoC support"
++-	depends on SOC_RT288X || SOC_RT305X || SOC_MT7620
+++	depends on SOC_RT288X || SOC_RT305X || SOC_RT3883 || SOC_MT7620
++ 	depends on m
++ 	select RT2X00_LIB
++ 
+diff --git a/package/kernel/mac80211/patches/rt2x00/601-rt2x00-introduce-rt2x00_platform_h.patch b/package/kernel/mac80211/patches/rt2x00/601-rt2x00-introduce-rt2x00_platform_h.patch
+new file mode 100644
+index 0000000000..1e6211a470
+--- /dev/null
++++ b/package/kernel/mac80211/patches/rt2x00/601-rt2x00-introduce-rt2x00_platform_h.patch
+@@ -0,0 +1,32 @@
++--- /dev/null
+++++ b/include/linux/rt2x00_platform.h
++@@ -0,0 +1,19 @@
+++/*
+++ * Platform data definition for the rt2x00 driver
+++ *
+++ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+++ *
+++ * This program is free software; you can redistribute it and/or modify it
+++ * under the terms of the GNU General Public License version 2 as published
+++ * by the Free Software Foundation.
+++ *
+++ */
+++
+++#ifndef _RT2X00_PLATFORM_H
+++#define _RT2X00_PLATFORM_H
+++
+++struct rt2x00_platform_data {
+++	char *eeprom_file_name;
+++};
+++
+++#endif /* _RT2X00_PLATFORM_H */
++--- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
++@@ -28,6 +28,7 @@
++ #include <linux/average.h>
++ #include <linux/usb.h>
++ #include <linux/clk.h>
+++#include <linux/rt2x00_platform.h>
++ 
++ #include <net/mac80211.h>
++ 
+diff --git a/package/kernel/mac80211/patches/rt2x00/602-rt2x00-introduce-rt2x00eeprom.patch b/package/kernel/mac80211/patches/rt2x00/602-rt2x00-introduce-rt2x00eeprom.patch
+new file mode 100644
+index 0000000000..ab0fa3670d
+--- /dev/null
++++ b/package/kernel/mac80211/patches/rt2x00/602-rt2x00-introduce-rt2x00eeprom.patch
+@@ -0,0 +1,296 @@
++--- a/local-symbols
+++++ b/local-symbols
++@@ -347,6 +347,7 @@ RT2X00_LIB_FIRMWARE=
++ RT2X00_LIB_CRYPTO=
++ RT2X00_LIB_LEDS=
++ RT2X00_LIB_DEBUGFS=
+++RT2X00_LIB_EEPROM=
++ RT2X00_DEBUG=
++ WLAN_VENDOR_REALTEK=
++ RTL8180=
++--- a/drivers/net/wireless/ralink/rt2x00/Kconfig
+++++ b/drivers/net/wireless/ralink/rt2x00/Kconfig
++@@ -70,6 +70,7 @@ config RT2800PCI
++ 	select RT2X00_LIB_MMIO
++ 	select RT2X00_LIB_PCI
++ 	select RT2X00_LIB_FIRMWARE
+++	select RT2X00_LIB_EEPROM
++ 	select RT2X00_LIB_CRYPTO
++ 	depends on CRC_CCITT
++ 	depends on EEPROM_93CX6
++@@ -216,6 +217,7 @@ config RT2800SOC
++ 	select RT2X00_LIB_MMIO
++ 	select RT2X00_LIB_CRYPTO
++ 	select RT2X00_LIB_FIRMWARE
+++	select RT2X00_LIB_EEPROM
++ 	select RT2800_LIB
++ 	select RT2800_LIB_MMIO
++ 	help
++@@ -266,6 +268,9 @@ config RT2X00_LIB_FIRMWARE
++ config RT2X00_LIB_CRYPTO
++ 	bool
++ 
+++config RT2X00_LIB_EEPROM
+++	bool
+++
++ config RT2X00_LIB_LEDS
++ 	bool
++ 	default y if (RT2X00_LIB=y && LEDS_CLASS=y) || (RT2X00_LIB=m && LEDS_CLASS!=n)
++--- a/drivers/net/wireless/ralink/rt2x00/Makefile
+++++ b/drivers/net/wireless/ralink/rt2x00/Makefile
++@@ -8,6 +8,7 @@ rt2x00lib-$(CPTCFG_RT2X00_LIB_DEBUGFS)	+
++ rt2x00lib-$(CPTCFG_RT2X00_LIB_CRYPTO)	+= rt2x00crypto.o
++ rt2x00lib-$(CPTCFG_RT2X00_LIB_FIRMWARE)	+= rt2x00firmware.o
++ rt2x00lib-$(CPTCFG_RT2X00_LIB_LEDS)	+= rt2x00leds.o
+++rt2x00lib-$(CPTCFG_RT2X00_LIB_EEPROM)	+= rt2x00eeprom.o
++ 
++ obj-$(CPTCFG_RT2X00_LIB)		+= rt2x00lib.o
++ obj-$(CPTCFG_RT2X00_LIB_MMIO)		+= rt2x00mmio.o
++--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
++@@ -47,6 +47,8 @@ struct rt2800_drv_data {
++ 	struct ieee80211_sta *wcid_to_sta[STA_IDS_SIZE];
++ };
++ 
+++#include "rt2800.h"
+++
++ struct rt2800_ops {
++ 	u32 (*register_read)(struct rt2x00_dev *rt2x00dev,
++ 			      const unsigned int offset);
++@@ -145,6 +147,15 @@ static inline int rt2800_read_eeprom(str
++ {
++ 	const struct rt2800_ops *rt2800ops = rt2x00dev->ops->drv;
++ 
+++	if (rt2x00dev->eeprom_file) {
+++		memcpy(rt2x00dev->eeprom, rt2x00dev->eeprom_file->data,
+++		       EEPROM_SIZE);
+++		return 0;
+++	}
+++
+++	if (!rt2800ops->read_eeprom)
+++		return -EINVAL;
+++
++ 	return rt2800ops->read_eeprom(rt2x00dev);
++ }
++ 
++--- a/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
++@@ -90,19 +90,6 @@ static int rt2800soc_set_device_state(st
++ 	return retval;
++ }
++ 
++-static int rt2800soc_read_eeprom(struct rt2x00_dev *rt2x00dev)
++-{
++-	void __iomem *base_addr = ioremap(0x1F040000, EEPROM_SIZE);
++-
++-	if (!base_addr)
++-		return -ENOMEM;
++-
++-	memcpy_fromio(rt2x00dev->eeprom, base_addr, EEPROM_SIZE);
++-
++-	iounmap(base_addr);
++-	return 0;
++-}
++-
++ /* Firmware functions */
++ static char *rt2800soc_get_firmware_name(struct rt2x00_dev *rt2x00dev)
++ {
++@@ -168,7 +155,6 @@ static const struct rt2800_ops rt2800soc
++ 	.register_multiread	= rt2x00mmio_register_multiread,
++ 	.register_multiwrite	= rt2x00mmio_register_multiwrite,
++ 	.regbusy_read		= rt2x00mmio_regbusy_read,
++-	.read_eeprom		= rt2800soc_read_eeprom,
++ 	.hwcrypt_disabled	= rt2800soc_hwcrypt_disabled,
++ 	.drv_write_firmware	= rt2800soc_write_firmware,
++ 	.drv_init_registers	= rt2800mmio_init_registers,
++--- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
++@@ -703,6 +703,7 @@ enum rt2x00_capability_flags {
++ 	REQUIRE_HT_TX_DESC,
++ 	REQUIRE_PS_AUTOWAKE,
++ 	REQUIRE_DELAYED_RFKILL,
+++	REQUIRE_EEPROM_FILE,
++ 
++ 	/*
++ 	 * Capabilities
++@@ -980,6 +981,11 @@ struct rt2x00_dev {
++ 	const struct firmware *fw;
++ 
++ 	/*
+++	 * EEPROM image.
+++	 */
+++	const struct firmware *eeprom_file;
+++
+++	/*
++ 	 * FIFO for storing tx status reports between isr and tasklet.
++ 	 */
++ 	DECLARE_KFIFO_PTR(txstatus_fifo, u32);
++--- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
++@@ -1419,6 +1419,10 @@ int rt2x00lib_probe_dev(struct rt2x00_de
++ 	INIT_DELAYED_WORK(&rt2x00dev->autowakeup_work, rt2x00lib_autowakeup);
++ 	INIT_WORK(&rt2x00dev->sleep_work, rt2x00lib_sleep);
++ 
+++	retval = rt2x00lib_load_eeprom_file(rt2x00dev);
+++	if (retval)
+++		goto exit;
+++
++ 	/*
++ 	 * Let the driver probe the device to detect the capabilities.
++ 	 */
++@@ -1559,6 +1563,11 @@ void rt2x00lib_remove_dev(struct rt2x00_
++ 	 * Free the driver data.
++ 	 */
++ 	kfree(rt2x00dev->drv_data);
+++
+++	/*
+++	 * Free EEPROM image.
+++	 */
+++	rt2x00lib_free_eeprom_file(rt2x00dev);
++ }
++ EXPORT_SYMBOL_GPL(rt2x00lib_remove_dev);
++ 
++--- /dev/null
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
++@@ -0,0 +1,106 @@
+++/*
+++	Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
+++	Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
+++	<http://rt2x00.serialmonkey.com>
+++
+++	This program is free software; you can redistribute it and/or modify
+++	it under the terms of the GNU General Public License as published by
+++	the Free Software Foundation; either version 2 of the License, or
+++	(at your option) any later version.
+++
+++	This program is distributed in the hope that it will be useful,
+++	but WITHOUT ANY WARRANTY; without even the implied warranty of
+++	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+++	GNU General Public License for more details.
+++
+++	You should have received a copy of the GNU General Public License
+++	along with this program; if not, write to the
+++	Free Software Foundation, Inc.,
+++	59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+++ */
+++
+++/*
+++	Module: rt2x00lib
+++	Abstract: rt2x00 eeprom file loading routines.
+++ */
+++
+++#include <linux/kernel.h>
+++#include <linux/module.h>
+++
+++#include "rt2x00.h"
+++#include "rt2x00lib.h"
+++
+++static const char *
+++rt2x00lib_get_eeprom_file_name(struct rt2x00_dev *rt2x00dev)
+++{
+++	struct rt2x00_platform_data *pdata = rt2x00dev->dev->platform_data;
+++
+++	if (pdata && pdata->eeprom_file_name)
+++		return pdata->eeprom_file_name;
+++
+++	return NULL;
+++}
+++
+++static int rt2x00lib_request_eeprom_file(struct rt2x00_dev *rt2x00dev)
+++{
+++	const struct firmware *ee;
+++	const char *ee_name;
+++	int retval;
+++
+++	ee_name = rt2x00lib_get_eeprom_file_name(rt2x00dev);
+++	if (!ee_name && test_bit(REQUIRE_EEPROM_FILE, &rt2x00dev->cap_flags)) {
+++		rt2x00_err(rt2x00dev, "Required EEPROM name is missing.");
+++		return -EINVAL;
+++	}
+++
+++	if (!ee_name)
+++		return 0;
+++
+++	rt2x00_info(rt2x00dev, "Loading EEPROM data from '%s'.\n", ee_name);
+++
+++	retval = request_firmware(&ee, ee_name, rt2x00dev->dev);
+++	if (retval) {
+++		rt2x00_err(rt2x00dev, "Failed to request EEPROM.\n");
+++		return retval;
+++	}
+++
+++	if (!ee || !ee->size || !ee->data) {
+++		rt2x00_err(rt2x00dev, "Failed to read EEPROM file.\n");
+++		retval = -ENOENT;
+++		goto err_exit;
+++	}
+++
+++	if (ee->size != rt2x00dev->ops->eeprom_size) {
+++		rt2x00_err(rt2x00dev,
+++			   "EEPROM file size is invalid, it should be %d bytes\n",
+++			   rt2x00dev->ops->eeprom_size);
+++		retval = -EINVAL;
+++		goto err_release_ee;
+++	}
+++
+++	rt2x00dev->eeprom_file = ee;
+++	return 0;
+++
+++err_release_ee:
+++	release_firmware(ee);
+++err_exit:
+++	return retval;
+++}
+++
+++int rt2x00lib_load_eeprom_file(struct rt2x00_dev *rt2x00dev)
+++{
+++	int retval;
+++
+++	retval = rt2x00lib_request_eeprom_file(rt2x00dev);
+++	if (retval)
+++		return retval;
+++
+++	return 0;
+++}
+++
+++void rt2x00lib_free_eeprom_file(struct rt2x00_dev *rt2x00dev)
+++{
+++	if (rt2x00dev->eeprom_file && rt2x00dev->eeprom_file->size)
+++		release_firmware(rt2x00dev->eeprom_file);
+++	rt2x00dev->eeprom_file = NULL;
+++}
++--- a/drivers/net/wireless/ralink/rt2x00/rt2x00lib.h
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00lib.h
++@@ -286,6 +286,22 @@ static inline void rt2x00lib_free_firmwa
++ #endif /* CPTCFG_RT2X00_LIB_FIRMWARE */
++ 
++ /*
+++ * EEPROM file handlers.
+++ */
+++#ifdef CPTCFG_RT2X00_LIB_EEPROM
+++int rt2x00lib_load_eeprom_file(struct rt2x00_dev *rt2x00dev);
+++void rt2x00lib_free_eeprom_file(struct rt2x00_dev *rt2x00dev);
+++#else
+++static inline int rt2x00lib_load_eeprom_file(struct rt2x00_dev *rt2x00dev)
+++{
+++	return 0;
+++}
+++static inline void rt2x00lib_free_eeprom_file(struct rt2x00_dev *rt2x00dev)
+++{
+++}
+++#endif /* CPTCFG_RT2X00_LIB_EEPROM */
+++
+++/*
++  * Debugfs handlers.
++  */
++ #ifdef CPTCFG_RT2X00_LIB_DEBUGFS
++--- a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
++@@ -86,6 +86,7 @@ int rt2x00soc_probe(struct platform_devi
++ 	if (IS_ERR(rt2x00dev->clk))
++ 		rt2x00dev->clk = NULL;
++ 
+++	set_bit(REQUIRE_EEPROM_FILE, &rt2x00dev->cap_flags);
++ 	rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_SOC);
++ 
++ 	retval = rt2x00soc_alloc_reg(rt2x00dev);
+diff --git a/package/kernel/mac80211/patches/rt2x00/603-rt2x00-of_load_eeprom_filename.patch b/package/kernel/mac80211/patches/rt2x00/603-rt2x00-of_load_eeprom_filename.patch
+new file mode 100644
+index 0000000000..431e090237
+--- /dev/null
++++ b/package/kernel/mac80211/patches/rt2x00/603-rt2x00-of_load_eeprom_filename.patch
+@@ -0,0 +1,31 @@
++--- a/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
++@@ -26,6 +26,7 @@
++ 
++ #include <linux/kernel.h>
++ #include <linux/module.h>
+++#include <linux/of.h>
++ 
++ #include "rt2x00.h"
++ #include "rt2x00lib.h"
++@@ -34,10 +35,20 @@ static const char *
++ rt2x00lib_get_eeprom_file_name(struct rt2x00_dev *rt2x00dev)
++ {
++ 	struct rt2x00_platform_data *pdata = rt2x00dev->dev->platform_data;
+++#ifdef CONFIG_OF
+++	struct device_node *np;
+++	const char *eep;
+++#endif
++ 
++ 	if (pdata && pdata->eeprom_file_name)
++ 		return pdata->eeprom_file_name;
++ 
+++#ifdef CONFIG_OF
+++	np = rt2x00dev->dev->of_node;
+++	if (np && of_property_read_string(np, "ralink,eeprom", &eep) == 0)
+++	    return eep;
+++#endif
+++
++ 	return NULL;
++ }
++ 
+diff --git a/package/kernel/mac80211/patches/rt2x00/604-rt2x00-load-eeprom-on-SoC-from-a-mtd-device-defines-.patch b/package/kernel/mac80211/patches/rt2x00/604-rt2x00-load-eeprom-on-SoC-from-a-mtd-device-defines-.patch
+new file mode 100644
+index 0000000000..7338eb15b2
+--- /dev/null
++++ b/package/kernel/mac80211/patches/rt2x00/604-rt2x00-load-eeprom-on-SoC-from-a-mtd-device-defines-.patch
+@@ -0,0 +1,113 @@
++From 339fe73f340161a624cc08e738d2244814852c3e Mon Sep 17 00:00:00 2001
++From: John Crispin <blogic@openwrt.org>
++Date: Sun, 17 Mar 2013 00:55:04 +0100
++Subject: [PATCH] rt2x00: load eeprom on SoC from a mtd device defines inside
++ OF
++
++Signed-off-by: John Crispin <blogic@openwrt.org>
++---
++ drivers/net/wireless/ralink/rt2x00/Kconfig        |  1 +
++ drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c | 65 +++++++++++++++++++++++
++ 2 files changed, 66 insertions(+)
++
++--- a/drivers/net/wireless/ralink/rt2x00/Kconfig
+++++ b/drivers/net/wireless/ralink/rt2x00/Kconfig
++@@ -220,6 +220,7 @@ config RT2800SOC
++ 	select RT2X00_LIB_EEPROM
++ 	select RT2800_LIB
++ 	select RT2800_LIB_MMIO
+++	select MTD if SOC_RT288X || SOC_RT305X
++ 	help
++ 	  This adds support for Ralink WiSoC devices.
++ 	  Supported chips: RT2880, RT3050, RT3052, RT3350, RT3352.
++--- a/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
++@@ -26,11 +26,76 @@
++ 
++ #include <linux/kernel.h>
++ #include <linux/module.h>
+++#if IS_ENABLED(CONFIG_MTD)
+++#include <linux/mtd/mtd.h>
+++#include <linux/mtd/partitions.h>
+++#endif
++ #include <linux/of.h>
++ 
++ #include "rt2x00.h"
++ #include "rt2x00lib.h"
++ 
+++#if IS_ENABLED(CONFIG_MTD)
+++static int rt2800lib_read_eeprom_mtd(struct rt2x00_dev *rt2x00dev)
+++{
+++	int ret = -EINVAL;
+++#ifdef CONFIG_OF
+++	static struct firmware mtd_fw;
+++	struct device_node *np = rt2x00dev->dev->of_node, *mtd_np = NULL;
+++	size_t retlen, len = rt2x00dev->ops->eeprom_size;
+++	int i, size, offset = 0;
+++	struct mtd_info *mtd;
+++	const char *part;
+++	const __be32 *list;
+++	phandle phandle;
+++
+++	list = of_get_property(np, "ralink,mtd-eeprom", &size);
+++	if (!list)
+++		return -ENOENT;
+++
+++	phandle = be32_to_cpup(list++);
+++	if (phandle)
+++		mtd_np = of_find_node_by_phandle(phandle);
+++	if (!mtd_np) {
+++		dev_err(rt2x00dev->dev, "failed to load mtd phandle\n");
+++		return -EINVAL;
+++	}
+++
+++	part = of_get_property(mtd_np, "label", NULL);
+++	if (!part)
+++		part = mtd_np->name;
+++
+++	mtd = get_mtd_device_nm(part);
+++	if (IS_ERR(mtd)) {
+++		dev_err(rt2x00dev->dev, "failed to get mtd device \"%s\"\n", part);
+++		return PTR_ERR(mtd);
+++	}
+++
+++	if (size > sizeof(*list))
+++		offset = be32_to_cpup(list);
+++
+++	ret = mtd_read(mtd, offset, len, &retlen, (u_char *) rt2x00dev->eeprom);
+++	put_mtd_device(mtd);
+++
+++	if ((retlen != rt2x00dev->ops->eeprom_size) || ret) {
+++		dev_err(rt2x00dev->dev, "failed to load eeprom from device \"%s\"\n", part);
+++		return ret;
+++	}
+++
+++	if (of_find_property(np, "ralink,mtd-eeprom-swap", NULL))
+++		for (i = 0; i < len/sizeof(u16); i++)
+++			rt2x00dev->eeprom[i] = swab16(rt2x00dev->eeprom[i]);
+++
+++	rt2x00dev->eeprom_file = &mtd_fw;
+++	mtd_fw.data = (const u8 *) rt2x00dev->eeprom;
+++
+++	dev_info(rt2x00dev->dev, "loaded eeprom from mtd device \"%s\"\n", part);
+++#endif
+++
+++	return ret;
+++}
+++#endif
+++
++ static const char *
++ rt2x00lib_get_eeprom_file_name(struct rt2x00_dev *rt2x00dev)
++ {
++@@ -58,6 +123,11 @@ static int rt2x00lib_request_eeprom_file
++ 	const char *ee_name;
++ 	int retval;
++ 
+++#if IS_ENABLED(CONFIG_MTD)
+++	if (!rt2800lib_read_eeprom_mtd(rt2x00dev))
+++		return 0;
+++#endif
+++
++ 	ee_name = rt2x00lib_get_eeprom_file_name(rt2x00dev);
++ 	if (!ee_name && test_bit(REQUIRE_EEPROM_FILE, &rt2x00dev->cap_flags)) {
++ 		rt2x00_err(rt2x00dev, "Required EEPROM name is missing.");
+diff --git a/package/kernel/mac80211/patches/rt2x00/606-rt2x00-allow_disabling_bands_through_platform_data.patch b/package/kernel/mac80211/patches/rt2x00/606-rt2x00-allow_disabling_bands_through_platform_data.patch
+new file mode 100644
+index 0000000000..ffee2189d2
+--- /dev/null
++++ b/package/kernel/mac80211/patches/rt2x00/606-rt2x00-allow_disabling_bands_through_platform_data.patch
+@@ -0,0 +1,47 @@
++--- a/include/linux/rt2x00_platform.h
+++++ b/include/linux/rt2x00_platform.h
++@@ -14,6 +14,9 @@
++ 
++ struct rt2x00_platform_data {
++ 	char *eeprom_file_name;
+++
+++	int disable_2ghz;
+++	int disable_5ghz;
++ };
++ 
++ #endif /* _RT2X00_PLATFORM_H */
++--- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
++@@ -1007,6 +1007,22 @@ static int rt2x00lib_probe_hw_modes(stru
++ 	unsigned int num_rates;
++ 	unsigned int i;
++ 
+++	if (rt2x00dev->dev->platform_data) {
+++		struct rt2x00_platform_data *pdata;
+++
+++		pdata = rt2x00dev->dev->platform_data;
+++		if (pdata->disable_2ghz)
+++			spec->supported_bands &= ~SUPPORT_BAND_2GHZ;
+++		if (pdata->disable_5ghz)
+++			spec->supported_bands &= ~SUPPORT_BAND_5GHZ;
+++	}
+++
+++	if ((spec->supported_bands & SUPPORT_BAND_BOTH) == 0) {
+++		rt2x00_err(rt2x00dev, "No supported bands\n");
+++		return -EINVAL;
+++	}
+++
+++
++ 	num_rates = 0;
++ 	if (spec->supported_rates & SUPPORT_RATE_CCK)
++ 		num_rates += 4;
++--- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
++@@ -408,6 +408,7 @@ struct hw_mode_spec {
++ 	unsigned int supported_bands;
++ #define SUPPORT_BAND_2GHZ	0x00000001
++ #define SUPPORT_BAND_5GHZ	0x00000002
+++#define SUPPORT_BAND_BOTH	(SUPPORT_BAND_2GHZ | SUPPORT_BAND_5GHZ)
++ 
++ 	unsigned int supported_rates;
++ #define SUPPORT_RATE_CCK	0x00000001
+diff --git a/package/kernel/mac80211/patches/rt2x00/607-rt2x00-add_platform_data_mac_addr.patch b/package/kernel/mac80211/patches/rt2x00/607-rt2x00-add_platform_data_mac_addr.patch
+new file mode 100644
+index 0000000000..37553bb80a
+--- /dev/null
++++ b/package/kernel/mac80211/patches/rt2x00/607-rt2x00-add_platform_data_mac_addr.patch
+@@ -0,0 +1,25 @@
++--- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
++@@ -989,6 +989,12 @@ static void rt2x00lib_rate(struct ieee80
++ 
++ void rt2x00lib_set_mac_address(struct rt2x00_dev *rt2x00dev, u8 *eeprom_mac_addr)
++ {
+++	struct rt2x00_platform_data *pdata;
+++
+++	pdata = rt2x00dev->dev->platform_data;
+++	if (pdata && pdata->mac_address)
+++		ether_addr_copy(eeprom_mac_addr, pdata->mac_address);
+++
++ 	of_get_mac_address(rt2x00dev->dev->of_node, eeprom_mac_addr);
++ 
++ 	if (!is_valid_ether_addr(eeprom_mac_addr)) {
++--- a/include/linux/rt2x00_platform.h
+++++ b/include/linux/rt2x00_platform.h
++@@ -14,6 +14,7 @@
++ 
++ struct rt2x00_platform_data {
++ 	char *eeprom_file_name;
+++	const u8 *mac_address;
++ 
++ 	int disable_2ghz;
++ 	int disable_5ghz;
+diff --git a/package/kernel/mac80211/patches/rt2x00/608-rt2x00-allow_disabling_bands_through_dts.patch b/package/kernel/mac80211/patches/rt2x00/608-rt2x00-allow_disabling_bands_through_dts.patch
+new file mode 100644
+index 0000000000..6211809c0a
+--- /dev/null
++++ b/package/kernel/mac80211/patches/rt2x00/608-rt2x00-allow_disabling_bands_through_dts.patch
+@@ -0,0 +1,19 @@
++--- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
++@@ -1012,6 +1012,16 @@ static int rt2x00lib_probe_hw_modes(stru
++ 	struct ieee80211_rate *rates;
++ 	unsigned int num_rates;
++ 	unsigned int i;
+++#ifdef CONFIG_OF
+++	struct device_node *np = rt2x00dev->dev->of_node;
+++	unsigned int enabled;
+++	if (!of_property_read_u32(np, "ralink,2ghz",
+++                                          &enabled) && !enabled)
+++		spec->supported_bands &= ~SUPPORT_BAND_2GHZ;
+++	if (!of_property_read_u32(np, "ralink,5ghz",
+++                                          &enabled) && !enabled)
+++		spec->supported_bands &= ~SUPPORT_BAND_5GHZ;
+++#endif /* CONFIG_OF */
++ 
++ 	if (rt2x00dev->dev->platform_data) {
++ 		struct rt2x00_platform_data *pdata;
+diff --git a/package/kernel/mac80211/patches/rt2x00/609-rt2x00-make-wmac-loadable-via-OF-on-rt288x-305x-SoC.patch b/package/kernel/mac80211/patches/rt2x00/609-rt2x00-make-wmac-loadable-via-OF-on-rt288x-305x-SoC.patch
+new file mode 100644
+index 0000000000..8964f8bf10
+--- /dev/null
++++ b/package/kernel/mac80211/patches/rt2x00/609-rt2x00-make-wmac-loadable-via-OF-on-rt288x-305x-SoC.patch
+@@ -0,0 +1,33 @@
++From 04dbd87265f6ba4a373b211ba324b437d224fb2d Mon Sep 17 00:00:00 2001
++From: John Crispin <blogic@openwrt.org>
++Date: Sun, 17 Mar 2013 00:03:31 +0100
++Subject: [PATCH 21/38] rt2x00: make wmac loadable via OF on rt288x/305x SoC
++
++This patch ads the match table to allow loading the wmac support from a
++devicetree.
++
++Signed-off-by: John Crispin <blogic@openwrt.org>
++---
++ drivers/net/wireless/ralink/rt2x00/rt2800pci.c |    7 +++++++
++ 1 file changed, 7 insertions(+)
++
++--- a/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
++@@ -225,10 +225,17 @@ static int rt2800soc_probe(struct platfo
++ 	return rt2x00soc_probe(pdev, &rt2800soc_ops);
++ }
++ 
+++static const struct of_device_id rt2880_wmac_match[] = {
+++	{ .compatible = "ralink,rt2880-wmac" },
+++	{},
+++};
+++MODULE_DEVICE_TABLE(of, rt2880_wmac_match);
+++
++ static struct platform_driver rt2800soc_driver = {
++ 	.driver		= {
++ 		.name		= "rt2800_wmac",
++ 		.mod_name	= KBUILD_MODNAME,
+++		.of_match_table	= rt2880_wmac_match,
++ 	},
++ 	.probe		= rt2800soc_probe,
++ 	.remove		= rt2x00soc_remove,
+diff --git a/package/kernel/mac80211/patches/rt2x00/610-rt2x00-change-led-polarity-from-OF.patch b/package/kernel/mac80211/patches/rt2x00/610-rt2x00-change-led-polarity-from-OF.patch
+new file mode 100644
+index 0000000000..acc8a8edb8
+--- /dev/null
++++ b/package/kernel/mac80211/patches/rt2x00/610-rt2x00-change-led-polarity-from-OF.patch
+@@ -0,0 +1,40 @@
++--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++@@ -25,6 +25,7 @@
++ #include <linux/kernel.h>
++ #include <linux/module.h>
++ #include <linux/slab.h>
+++#include <linux/of.h>
++ 
++ #include "rt2x00.h"
++ #include "rt2800lib.h"
++@@ -11131,6 +11132,17 @@ static int rt2800_init_eeprom(struct rt2
++ 	rt2800_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
++ 	rt2800_init_led(rt2x00dev, &rt2x00dev->led_qual, LED_TYPE_QUALITY);
++ 
+++	{
+++		struct device_node *np = rt2x00dev->dev->of_node;
+++		unsigned int led_polarity;
+++
+++		/* Allow overriding polarity from OF */
+++		if (!of_property_read_u32(np, "ralink,led-polarity",
+++					  &led_polarity))
+++			rt2x00_set_field16(&eeprom, EEPROM_FREQ_LED_POLARITY,
+++					   led_polarity);
+++	}
+++
++ 	rt2x00dev->led_mcu_reg = eeprom;
++ #endif /* CPTCFG_RT2X00_LIB_LEDS */
++ 
++--- a/drivers/net/wireless/ralink/rt2x00/rt2x00leds.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00leds.c
++@@ -98,6 +98,9 @@ static int rt2x00leds_register_led(struc
++ 	led->led_dev.name = name;
++ 	led->led_dev.brightness = LED_OFF;
++ 
+++	if (rt2x00_is_soc(rt2x00dev))
+++		led->led_dev.brightness_set(&led->led_dev, LED_OFF);
+++
++ 	retval = led_classdev_register(device, &led->led_dev);
++ 	if (retval) {
++ 		rt2x00_err(rt2x00dev, "Failed to register led handler\n");
+diff --git a/package/kernel/mac80211/patches/rt2x00/611-rt2x00-add-AP+STA-support.patch b/package/kernel/mac80211/patches/rt2x00/611-rt2x00-add-AP+STA-support.patch
+new file mode 100644
+index 0000000000..5ef5fc8def
+--- /dev/null
++++ b/package/kernel/mac80211/patches/rt2x00/611-rt2x00-add-AP+STA-support.patch
+@@ -0,0 +1,11 @@
++--- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
++@@ -1358,7 +1358,7 @@ static inline void rt2x00lib_set_if_comb
++ 	 */
++ 	if_limit = &rt2x00dev->if_limits_ap;
++ 	if_limit->max = rt2x00dev->ops->max_ap_intf;
++-	if_limit->types = BIT(NL80211_IFTYPE_AP);
+++	if_limit->types = BIT(NL80211_IFTYPE_AP) | BIT(NL80211_IFTYPE_STATION);
++ #ifdef CPTCFG_MAC80211_MESH
++ 	if_limit->types |= BIT(NL80211_IFTYPE_MESH_POINT);
++ #endif
+diff --git a/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch b/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
+new file mode 100644
+index 0000000000..deaa03be6c
+--- /dev/null
++++ b/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
+@@ -0,0 +1,161 @@
++From 0fce1109f894ec7fcd72cb098843a1eff786716a Mon Sep 17 00:00:00 2001
++From: Daniel Golle <daniel@makrotopia.org>
++Date: Fri, 16 Sep 2022 20:49:42 +0100
++Subject: [PATCH 16/16] rt2x00: import support for external LNA on MT7620
++To: linux-wireless@vger.kernel.org,
++    Stanislaw Gruszka <stf_xl@wp.pl>,
++    Helmut Schaa <helmut.schaa@googlemail.com>
++Cc: Kalle Valo <kvalo@kernel.org>,
++    David S. Miller <davem@davemloft.net>,
++    Eric Dumazet <edumazet@google.com>,
++    Jakub Kicinski <kuba@kernel.org>,
++    Paolo Abeni <pabeni@redhat.com>,
++    Johannes Berg <johannes.berg@intel.com>
++
++In order to carry out calibration on boards with ePA or eLNA the PA pin
++needs to be switch to GPIO mode on MT7620. Implement that by selecting
++pinctrl state "pa_gpio" which should be defined for MT7620 boards with
++eLNA or ePA beside the "default" state.
++
++Reported-by: Serge Vasilugin <vasilugin@yandex.ru>
++Signed-off-by: Daniel Golle <daniel@makrotopia.org>
++---
++ .../net/wireless/ralink/rt2x00/rt2800lib.c    | 58 +++++++++++++++++++
++ drivers/net/wireless/ralink/rt2x00/rt2x00.h   |  5 ++
++ .../net/wireless/ralink/rt2x00/rt2x00soc.c    | 15 +++++
++ 3 files changed, 78 insertions(+)
++
++--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++@@ -304,6 +304,24 @@ static void rt2800_rf_write(struct rt2x0
++ 	mutex_unlock(&rt2x00dev->csr_mutex);
++ }
++ 
+++void rt6352_enable_pa_pin(struct rt2x00_dev *rt2x00dev, int enable)
+++{
+++	if (!rt2x00dev->pinctrl)
+++		return;
+++
+++	if (enable) {
+++		if (!rt2x00dev->pins_default)
+++			return;
+++
+++		pinctrl_select_state(rt2x00dev->pinctrl, rt2x00dev->pins_default);
+++	} else {
+++		if (!rt2x00dev->pins_pa_gpio)
+++			return;
+++
+++		pinctrl_select_state(rt2x00dev->pinctrl, rt2x00dev->pins_pa_gpio);
+++	}
+++}
+++
++ static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = {
++ 	[EEPROM_CHIP_ID]		= 0x0000,
++ 	[EEPROM_VERSION]		= 0x0001,
++@@ -4469,6 +4487,29 @@ static void rt2800_config_channel(struct
++ 			rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN,
++ 					      0x6C6C6B6C);
++ 		}
+++
+++		if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+++			reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
+++			reg |= 0x00000101;
+++			rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
+++
+++			reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
+++			reg |= 0x00000101;
+++			rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
+++
+++			rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
+++			rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
+++			rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
+++			rt2800_bbp_write(rt2x00dev, 75, 0x68);
+++			rt2800_bbp_write(rt2x00dev, 76, 0x4C);
+++			rt2800_bbp_write(rt2x00dev, 79, 0x1C);
+++			rt2800_bbp_write(rt2x00dev, 80, 0x0C);
+++			rt2800_bbp_write(rt2x00dev, 82, 0xB6);
+++			/* bank 0 RF reg 42 and glrt BBP reg 141 will be set in
+++			 * config channel function in dependence of channel and
+++			 * HT20/HT40 so don't touch it
+++			 */
+++		}
++ 	}
++ 
++ 	bbp = rt2800_bbp_read(rt2x00dev, 4);
++@@ -10583,6 +10624,7 @@ static void rt2800_init_rfcsr_6352(struc
++ 	rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
++ 	rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
++ 
+++	rt6352_enable_pa_pin(rt2x00dev, 0);
++ 	rt2800_r_calibration(rt2x00dev);
++ 	rt2800_rf_self_txdc_cal(rt2x00dev);
++ 	rt2800_rxdcoc_calibration(rt2x00dev);
++@@ -10590,6 +10632,22 @@ static void rt2800_init_rfcsr_6352(struc
++ 	rt2800_bw_filter_calibration(rt2x00dev, false);
++ 	rt2800_loft_iq_calibration(rt2x00dev);
++ 	rt2800_rxiq_calibration(rt2x00dev);
+++	rt6352_enable_pa_pin(rt2x00dev, 1);
+++
+++	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
+++		rt2800_bbp_write(rt2x00dev, 75, 0x68);
+++		rt2800_bbp_write(rt2x00dev, 76, 0x4C);
+++		rt2800_bbp_write(rt2x00dev, 79, 0x1C);
+++		rt2800_bbp_write(rt2x00dev, 80, 0x0C);
+++		rt2800_bbp_write(rt2x00dev, 82, 0xB6);
+++		/* bank 0 RF reg 42 and glrt BBP reg 141 will be set in config
+++		 * channel function in dependence of channel and HT20/HT40,
+++		 * so don't touch them here.
+++		 */
+++	}
++ }
++ 
++ static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
++--- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
++@@ -28,6 +28,7 @@
++ #include <linux/average.h>
++ #include <linux/usb.h>
++ #include <linux/clk.h>
+++#include <linux/pinctrl/consumer.h>
++ #include <linux/rt2x00_platform.h>
++ 
++ #include <net/mac80211.h>
++@@ -1029,6 +1030,11 @@ struct rt2x00_dev {
++ 
++ 	/* Clock for System On Chip devices. */
++ 	struct clk *clk;
+++
+++	/* pinctrl and states for System On Chip devices with PA/LNA. */
+++	struct pinctrl *pinctrl;
+++	struct pinctrl_state *pins_default;
+++	struct pinctrl_state *pins_pa_gpio;
++ };
++ 
++ struct rt2x00_bar_list_entry {
++--- a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
++@@ -97,6 +97,21 @@ int rt2x00soc_probe(struct platform_devi
++ 	if (retval)
++ 		goto exit_free_reg;
++ 
+++	rt2x00dev->pinctrl = devm_pinctrl_get(&pdev->dev);
+++	if (IS_ERR(rt2x00dev->pinctrl)) {
+++		rt2x00dev->pinctrl = NULL;
+++		rt2x00dev->pins_default = NULL;
+++		rt2x00dev->pins_pa_gpio = NULL;
+++	} else {
+++		rt2x00dev->pins_default = pinctrl_lookup_state(rt2x00dev->pinctrl, "default");
+++		if (IS_ERR(rt2x00dev->pins_default))
+++			rt2x00dev->pins_default = NULL;
+++
+++		rt2x00dev->pins_pa_gpio = pinctrl_lookup_state(rt2x00dev->pinctrl, "pa_gpio");
+++		if (IS_ERR(rt2x00dev->pins_pa_gpio))
+++			rt2x00dev->pins_pa_gpio = NULL;
+++	}
+++
++ 	return 0;
++ 
++ exit_free_reg:
+diff --git a/package/kernel/mac80211/patches/rt2x00/995-rt2x00-mt7620-introduce-accessors-for-CHIP_VER-register.patch b/package/kernel/mac80211/patches/rt2x00/995-rt2x00-mt7620-introduce-accessors-for-CHIP_VER-register.patch
+new file mode 100644
+index 0000000000..97a56de2b3
+--- /dev/null
++++ b/package/kernel/mac80211/patches/rt2x00/995-rt2x00-mt7620-introduce-accessors-for-CHIP_VER-register.patch
+@@ -0,0 +1,139 @@
++--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
++@@ -78,6 +78,9 @@ struct rt2800_ops {
++ 	int (*drv_init_registers)(struct rt2x00_dev *rt2x00dev);
++ 	__le32 *(*drv_get_txwi)(struct queue_entry *entry);
++ 	unsigned int (*drv_get_dma_done)(struct data_queue *queue);
+++	int (*hw_get_chippkg)(void);
+++	int (*hw_get_chipver)(void);
+++	int (*hw_get_chipeco)(void);
++ };
++ 
++ static inline u32 rt2800_register_read(struct rt2x00_dev *rt2x00dev,
++@@ -195,6 +198,27 @@ static inline unsigned int rt2800_drv_ge
++ 	return rt2800ops->drv_get_dma_done(queue);
++ }
++ 
+++static inline int rt2800_hw_get_chippkg(struct rt2x00_dev *rt2x00dev)
+++{
+++	const struct rt2800_ops *rt2800ops = rt2x00dev->ops->drv;
+++
+++	return rt2800ops->hw_get_chippkg();
+++}
+++
+++static inline int rt2800_hw_get_chipver(struct rt2x00_dev *rt2x00dev)
+++{
+++	const struct rt2800_ops *rt2800ops = rt2x00dev->ops->drv;
+++
+++	return rt2800ops->hw_get_chipver();
+++}
+++
+++static inline int rt2800_hw_get_chipeco(struct rt2x00_dev *rt2x00dev)
+++{
+++	const struct rt2800_ops *rt2800ops = rt2x00dev->ops->drv;
+++
+++	return rt2800ops->hw_get_chipeco();
+++}
+++
++ void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev,
++ 			const u8 command, const u8 token,
++ 			const u8 arg0, const u8 arg1);
++--- a/drivers/net/wireless/ralink/rt2x00/rt2800pci.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2800pci.c
++@@ -286,6 +286,10 @@ static int rt2800pci_read_eeprom(struct
++ 	return retval;
++ }
++ 
+++static int rt2800pci_get_chippkg(void) { return 0; }
+++static int rt2800pci_get_chipver(void) { return 0; }
+++static int rt2800pci_get_chipeco(void) { return 0; }
+++
++ static const struct ieee80211_ops rt2800pci_mac80211_ops = {
++ 	.tx			= rt2x00mac_tx,
++ 	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++@@ -329,6 +333,9 @@ static const struct rt2800_ops rt2800pci
++ 	.drv_init_registers	= rt2800mmio_init_registers,
++ 	.drv_get_txwi		= rt2800mmio_get_txwi,
++ 	.drv_get_dma_done	= rt2800mmio_get_dma_done,
+++	.hw_get_chippkg		= rt2800pci_get_chippkg,
+++	.hw_get_chipver		= rt2800pci_get_chipver,
+++	.hw_get_chipeco		= rt2800pci_get_chipeco,
++ };
++ 
++ static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = {
++--- a/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
++@@ -27,6 +27,12 @@
++ #include "rt2800lib.h"
++ #include "rt2800mmio.h"
++ 
+++/* Needed to probe CHIP_VER register on MT7620 */
+++#ifdef CONFIG_SOC_MT7620
+++#include <asm/mach-ralink/ralink_regs.h>
+++#include <asm/mach-ralink/mt7620.h>
+++#endif
+++
++ /* Allow hardware encryption to be disabled. */
++ static bool modparam_nohwcrypt;
++ module_param_named(nohwcrypt, modparam_nohwcrypt, bool, 0444);
++@@ -118,6 +124,27 @@ static int rt2800soc_write_firmware(stru
++ 	return 0;
++ }
++ 
+++#ifdef CONFIG_SOC_MT7620
+++static int rt2800soc_get_chippkg(void)
+++{
+++	return mt7620_get_pkg();
+++}
+++
+++static int rt2800soc_get_chipver(void)
+++{
+++	return mt7620_get_chipver();
+++}
+++
+++static int rt2800soc_get_chipeco(void)
+++{
+++	return mt7620_get_eco();
+++}
+++#else
+++static int rt2800soc_get_chippkg(void) { return 0; }
+++static int rt2800soc_get_chipver(void) { return 0; }
+++static int rt2800soc_get_chipeco(void) { return 0; }
+++#endif
+++
++ static const struct ieee80211_ops rt2800soc_mac80211_ops = {
++ 	.tx			= rt2x00mac_tx,
++ 	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++@@ -160,6 +187,9 @@ static const struct rt2800_ops rt2800soc
++ 	.drv_init_registers	= rt2800mmio_init_registers,
++ 	.drv_get_txwi		= rt2800mmio_get_txwi,
++ 	.drv_get_dma_done	= rt2800mmio_get_dma_done,
+++	.hw_get_chippkg		= rt2800soc_get_chippkg,
+++	.hw_get_chipver		= rt2800soc_get_chipver,
+++	.hw_get_chipeco		= rt2800soc_get_chipeco,
++ };
++ 
++ static const struct rt2x00lib_ops rt2800soc_rt2x00_ops = {
++--- a/drivers/net/wireless/ralink/rt2x00/rt2800usb.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2800usb.c
++@@ -628,6 +628,10 @@ static int rt2800usb_probe_hw(struct rt2
++ 	return 0;
++ }
++ 
+++static int rt2800usb_get_chippkg(void) { return 0; }
+++static int rt2800usb_get_chipver(void) { return 0; }
+++static int rt2800usb_get_chipeco(void) { return 0; }
+++
++ static const struct ieee80211_ops rt2800usb_mac80211_ops = {
++ 	.tx			= rt2x00mac_tx,
++ 	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++@@ -672,6 +676,9 @@ static const struct rt2800_ops rt2800usb
++ 	.drv_init_registers	= rt2800usb_init_registers,
++ 	.drv_get_txwi		= rt2800usb_get_txwi,
++ 	.drv_get_dma_done	= rt2800usb_get_dma_done,
+++	.hw_get_chippkg		= rt2800usb_get_chippkg,
+++	.hw_get_chipver		= rt2800usb_get_chipver,
+++	.hw_get_chipeco		= rt2800usb_get_chipeco,
++ };
++ 
++ static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = {
+diff --git a/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch b/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
+new file mode 100644
+index 0000000000..dab6e05ffd
+--- /dev/null
++++ b/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
+@@ -0,0 +1,408 @@
++--- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
++@@ -1044,6 +1044,11 @@
++ #define MIMO_PS_CFG_RX_STBY_POL		FIELD32(0x00000010)
++ #define MIMO_PS_CFG_RX_RX_STBY0		FIELD32(0x00000020)
++ 
+++#define BB_PA_MODE_CFG0			0x1214
+++#define BB_PA_MODE_CFG1			0x1218
+++#define RF_PA_MODE_CFG0			0x121C
+++#define RF_PA_MODE_CFG1			0x1220
+++
++ /*
++  * EDCA_AC0_CFG:
++  */
++--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++@@ -3778,14 +3778,16 @@ static void rt2800_config_channel_rf7620
++ 	rt2x00_set_field8(&rfcsr, RFCSR19_K, rf->rf4);
++ 	rt2800_rfcsr_write(rt2x00dev, 19, rfcsr);
++ 
++-	/* Default: XO=20MHz , SDM mode */
++-	rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
++-	rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
++-	rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
++-
++-	rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
++-	rt2x00_set_field8(&rfcsr, RFCSR21_BIT8, 1);
++-	rt2800_rfcsr_write(rt2x00dev, 21, rfcsr);
+++	if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
+++		/* Default: XO=20MHz , SDM mode */
+++		rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
+++		rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
+++		rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
+++
+++		rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
+++		rt2x00_set_field8(&rfcsr, RFCSR21_BIT8, 1);
+++		rt2800_rfcsr_write(rt2x00dev, 21, rfcsr);
+++	}
++ 
++ 	rfcsr = rt2800_rfcsr_read(rt2x00dev, 1);
++ 	rt2x00_set_field8(&rfcsr, RFCSR1_TX2_EN_MT7620,
++@@ -3819,18 +3821,23 @@ static void rt2800_config_channel_rf7620
++ 		rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x20);
++ 	}
++ 
++-	if (conf_is_ht40(conf)) {
++-		rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x08);
++-		rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x08);
++-	} else {
++-		rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x28);
++-		rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x28);
+++	if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
+++		if (conf_is_ht40(conf)) {
+++			rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x08);
+++			rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x08);
+++		} else {
+++			rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x28);
+++			rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x28);
+++		}
++ 	}
++ 
++-	rfcsr = rt2800_rfcsr_read(rt2x00dev, 28);
++-	rt2x00_set_field8(&rfcsr, RFCSR28_CH11_HT40,
++-			  conf_is_ht40(conf) && (rf->channel == 11));
++-	rt2800_rfcsr_write(rt2x00dev, 28, rfcsr);
+++	if (rt2800_hw_get_chipver(rt2x00dev) > 1 &&
+++	    rt2800_hw_get_chipeco(rt2x00dev) == 2) {
+++		rfcsr = rt2800_rfcsr_read(rt2x00dev, 28);
+++		rt2x00_set_field8(&rfcsr, RFCSR28_CH11_HT40,
+++				  conf_is_ht40(conf) && (rf->channel == 11));
+++		rt2800_rfcsr_write(rt2x00dev, 28, rfcsr);
+++	}
++ 
++ 	if (!test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags)) {
++ 		if (conf_is_ht40(conf)) {
++@@ -3929,25 +3936,29 @@ static void rt2800_config_alc(struct rt2
++ 	if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev, MAC_STATUS_CFG_BBP_RF_BUSY)))
++ 		rt2x00_warn(rt2x00dev, "RF busy while configuring ALC\n");
++ 
++-	if (chan->center_freq > 2457) {
++-		bbp = rt2800_bbp_read(rt2x00dev, 30);
++-		bbp = 0x40;
++-		rt2800_bbp_write(rt2x00dev, 30, bbp);
++-		rt2800_rfcsr_write(rt2x00dev, 39, 0);
++-		if (rt2x00_has_cap_external_lna_bg(rt2x00dev))
++-			rt2800_rfcsr_write(rt2x00dev, 42, 0xfb);
++-		else
++-			rt2800_rfcsr_write(rt2x00dev, 42, 0x7b);
++-	} else {
++-		bbp = rt2800_bbp_read(rt2x00dev, 30);
++-		bbp = 0x1f;
++-		rt2800_bbp_write(rt2x00dev, 30, bbp);
++-		rt2800_rfcsr_write(rt2x00dev, 39, 0x80);
++-		if (rt2x00_has_cap_external_lna_bg(rt2x00dev))
++-			rt2800_rfcsr_write(rt2x00dev, 42, 0xdb);
++-		else
++-			rt2800_rfcsr_write(rt2x00dev, 42, 0x5b);
+++	if (rt2800_hw_get_chipver(rt2x00dev) > 1 &&
+++	    rt2800_hw_get_chipeco(rt2x00dev) >= 2) {
+++		if (chan->center_freq > 2457) {
+++			bbp = rt2800_bbp_read(rt2x00dev, 30);
+++			bbp = 0x40;
+++			rt2800_bbp_write(rt2x00dev, 30, bbp);
+++			rt2800_rfcsr_write(rt2x00dev, 39, 0);
+++			if (rt2x00_has_cap_external_lna_bg(rt2x00dev))
+++				rt2800_rfcsr_write(rt2x00dev, 42, 0xfb);
+++			else
+++				rt2800_rfcsr_write(rt2x00dev, 42, 0x7b);
+++		} else {
+++			bbp = rt2800_bbp_read(rt2x00dev, 30);
+++			bbp = 0x1f;
+++			rt2800_bbp_write(rt2x00dev, 30, bbp);
+++			rt2800_rfcsr_write(rt2x00dev, 39, 0x80);
+++			if (rt2x00_has_cap_external_lna_bg(rt2x00dev))
+++				rt2800_rfcsr_write(rt2x00dev, 42, 0xdb);
+++			else
+++				rt2800_rfcsr_write(rt2x00dev, 42, 0x5b);
+++		}
++ 	}
+++
++ 	rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, mac_sys_ctrl);
++ 
++ 	rt2800_vco_calibration(rt2x00dev);
++@@ -6011,18 +6022,33 @@ static int rt2800_init_registers(struct
++ 	} else if (rt2x00_rt(rt2x00dev, RT5350)) {
++ 		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
++ 	} else if (rt2x00_rt(rt2x00dev, RT6352)) {
++-		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000401);
++-		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0001);
++-		rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
++-		rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x00000000);
++-		rt2800_register_write(rt2x00dev, TX0_BB_GAIN_ATTEN, 0x0);
++-		rt2800_register_write(rt2x00dev, TX1_BB_GAIN_ATTEN, 0x0);
++-		rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6C6C666C);
++-		rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6C6C666C);
++-		rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT,
++-				      0x3630363A);
++-		rt2800_register_write(rt2x00dev, TX1_RF_GAIN_CORRECT,
++-				      0x3630363A);
+++		if (rt2800_hw_get_chipver(rt2x00dev) <= 1) {
+++			rt2800_register_write(rt2x00dev, TX_ALC_VGA3,
+++					      0x00000000);
+++			rt2800_register_write(rt2x00dev, BB_PA_MODE_CFG0,
+++					      0x000055FF);
+++			rt2800_register_write(rt2x00dev, BB_PA_MODE_CFG1,
+++					      0x00550055);
+++			rt2800_register_write(rt2x00dev, RF_PA_MODE_CFG0,
+++					      0x000055FF);
+++			rt2800_register_write(rt2x00dev, RF_PA_MODE_CFG1,
+++					      0x00550055);
+++		} else {
+++			rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000401);
+++			rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0001);
+++			rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
+++			rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x00000000);
+++			rt2800_register_write(rt2x00dev, TX0_BB_GAIN_ATTEN, 0x0);
+++			rt2800_register_write(rt2x00dev, TX1_BB_GAIN_ATTEN, 0x0);
+++			rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN,
+++					      0x6C6C666C);
+++			rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN,
+++					      0x6C6C666C);
+++			rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT,
+++					      0x3630363A);
+++			rt2800_register_write(rt2x00dev, TX1_RF_GAIN_CORRECT,
+++					      0x3630363A);
+++		}
++ 		reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
++ 		rt2x00_set_field32(&reg, TX_ALC_CFG_1_ROS_BUSY_EN, 0);
++ 		rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
++@@ -7127,14 +7153,16 @@ static void rt2800_init_bbp_6352(struct
++ 	rt2800_bbp_write(rt2x00dev, 188, 0x00);
++ 	rt2800_bbp_write(rt2x00dev, 189, 0x00);
++ 
++-	rt2800_bbp_write(rt2x00dev, 91, 0x06);
++-	rt2800_bbp_write(rt2x00dev, 92, 0x04);
++-	rt2800_bbp_write(rt2x00dev, 93, 0x54);
++-	rt2800_bbp_write(rt2x00dev, 99, 0x50);
++-	rt2800_bbp_write(rt2x00dev, 148, 0x84);
++-	rt2800_bbp_write(rt2x00dev, 167, 0x80);
++-	rt2800_bbp_write(rt2x00dev, 178, 0xFF);
++-	rt2800_bbp_write(rt2x00dev, 106, 0x13);
+++	if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
+++		rt2800_bbp_write(rt2x00dev, 91, 0x06);
+++		rt2800_bbp_write(rt2x00dev, 92, 0x04);
+++		rt2800_bbp_write(rt2x00dev, 93, 0x54);
+++		rt2800_bbp_write(rt2x00dev, 99, 0x50);
+++		rt2800_bbp_write(rt2x00dev, 148, 0x84);
+++		rt2800_bbp_write(rt2x00dev, 167, 0x80);
+++		rt2800_bbp_write(rt2x00dev, 178, 0xFF);
+++		rt2800_bbp_write(rt2x00dev, 106, 0x13);
+++	}
++ 
++ 	/* BBP for G band GLRT function (BBP_128 ~ BBP_221) */
++ 	rt2800_bbp_glrt_write(rt2x00dev, 0, 0x00);
++@@ -10408,31 +10436,36 @@ static void rt2800_init_rfcsr_6352(struc
++ 	rt2800_rfcsr_write(rt2x00dev, 42, 0x5B);
++ 	rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
++ 
++-	rt2800_rfcsr_write(rt2x00dev, 11, 0x21);
++-	if (rt2800_clk_is_20mhz(rt2x00dev))
++-		rt2800_rfcsr_write(rt2x00dev, 13, 0x03);
++-	else
++-		rt2800_rfcsr_write(rt2x00dev, 13, 0x00);
++-	rt2800_rfcsr_write(rt2x00dev, 14, 0x7C);
++-	rt2800_rfcsr_write(rt2x00dev, 16, 0x80);
++-	rt2800_rfcsr_write(rt2x00dev, 17, 0x99);
++-	rt2800_rfcsr_write(rt2x00dev, 18, 0x99);
++-	rt2800_rfcsr_write(rt2x00dev, 19, 0x09);
++-	rt2800_rfcsr_write(rt2x00dev, 20, 0x50);
++-	rt2800_rfcsr_write(rt2x00dev, 21, 0xB0);
++-	rt2800_rfcsr_write(rt2x00dev, 22, 0x00);
++-	rt2800_rfcsr_write(rt2x00dev, 23, 0x06);
++-	rt2800_rfcsr_write(rt2x00dev, 24, 0x00);
++-	rt2800_rfcsr_write(rt2x00dev, 25, 0x00);
++-	rt2800_rfcsr_write(rt2x00dev, 26, 0x5D);
++-	rt2800_rfcsr_write(rt2x00dev, 27, 0x00);
++-	rt2800_rfcsr_write(rt2x00dev, 28, 0x61);
++-	rt2800_rfcsr_write(rt2x00dev, 29, 0xB5);
++-	rt2800_rfcsr_write(rt2x00dev, 43, 0x02);
++-
++-	rt2800_rfcsr_write(rt2x00dev, 28, 0x62);
++-	rt2800_rfcsr_write(rt2x00dev, 29, 0xAD);
++-	rt2800_rfcsr_write(rt2x00dev, 39, 0x80);
+++	if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
+++		rt2800_rfcsr_write(rt2x00dev, 11, 0x21);
+++		if (rt2800_clk_is_20mhz(rt2x00dev))
+++			rt2800_rfcsr_write(rt2x00dev, 13, 0x03);
+++		else
+++			rt2800_rfcsr_write(rt2x00dev, 13, 0x00);
+++		rt2800_rfcsr_write(rt2x00dev, 14, 0x7C);
+++		rt2800_rfcsr_write(rt2x00dev, 16, 0x80);
+++		rt2800_rfcsr_write(rt2x00dev, 17, 0x99);
+++		rt2800_rfcsr_write(rt2x00dev, 18, 0x99);
+++		rt2800_rfcsr_write(rt2x00dev, 19, 0x09);
+++		rt2800_rfcsr_write(rt2x00dev, 20, 0x50);
+++		rt2800_rfcsr_write(rt2x00dev, 21, 0xB0);
+++		rt2800_rfcsr_write(rt2x00dev, 22, 0x00);
+++		rt2800_rfcsr_write(rt2x00dev, 23, 0x06);
+++		rt2800_rfcsr_write(rt2x00dev, 24, 0x00);
+++		rt2800_rfcsr_write(rt2x00dev, 25, 0x00);
+++		rt2800_rfcsr_write(rt2x00dev, 26, 0x5D);
+++		rt2800_rfcsr_write(rt2x00dev, 27, 0x00);
+++		rt2800_rfcsr_write(rt2x00dev, 28, 0x61);
+++		rt2800_rfcsr_write(rt2x00dev, 29, 0xB5);
+++		rt2800_rfcsr_write(rt2x00dev, 43, 0x02);
+++	}
+++
+++	if (rt2800_hw_get_chipver(rt2x00dev) > 1 &&
+++	    rt2800_hw_get_chipeco(rt2x00dev) >= 2) {
+++		rt2800_rfcsr_write(rt2x00dev, 28, 0x62);
+++		rt2800_rfcsr_write(rt2x00dev, 29, 0xAD);
+++		rt2800_rfcsr_write(rt2x00dev, 39, 0x80);
+++	}
++ 
++ 	/* Initialize RF channel register to default value */
++ 	rt2800_rfcsr_write_chanreg(rt2x00dev, 0, 0x03);
++@@ -10498,63 +10531,71 @@ static void rt2800_init_rfcsr_6352(struc
++ 
++ 	rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5);
++ 
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x47);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x71);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x33);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x0E);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA4);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 20, 0x02);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 21, 0x12);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x1C);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 29, 0xEB);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 32, 0x7D);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 34, 0xD6);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 36, 0x08);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 38, 0xB4);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xB3);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xD5);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
++-	rt2800_rfcsr_write_bank(rt2x00dev, 4, 47, 0x67);
++-	rt2800_rfcsr_write_bank(rt2x00dev, 6, 47, 0x69);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFF);
++-	rt2800_rfcsr_write_bank(rt2x00dev, 4, 54, 0x27);
++-	rt2800_rfcsr_write_bank(rt2x00dev, 6, 54, 0x20);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xFF);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x1C);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x20);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xF7);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x09);
++-
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x51);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x06);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA7);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x2C);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x64);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 8, 0x51);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x36);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x53);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
++-
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x6C);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFC);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x1F);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
++-
++-	/* Initialize RF channel register for DRQFN */
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xE3);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xE5);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x28);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x68);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xF7);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x02);
++-	rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xC7);
+++	if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x47);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x71);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x33);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x0E);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA4);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 20, 0x02);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 21, 0x12);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x1C);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 29, 0xEB);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 32, 0x7D);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 34, 0xD6);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 36, 0x08);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 38, 0xB4);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xB3);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xD5);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
+++		rt2800_rfcsr_write_bank(rt2x00dev, 4, 47, 0x67);
+++		rt2800_rfcsr_write_bank(rt2x00dev, 6, 47, 0x69);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFF);
+++		rt2800_rfcsr_write_bank(rt2x00dev, 4, 54, 0x27);
+++		rt2800_rfcsr_write_bank(rt2x00dev, 6, 54, 0x20);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xFF);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x1C);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x20);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xF7);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x09);
+++	}
+++
+++	if (rt2800_hw_get_chipver(rt2x00dev) > 1 &&
+++	    rt2800_hw_get_chipeco(rt2x00dev) >= 2) {
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x51);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x06);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA7);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x2C);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x64);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 8, 0x51);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x36);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x53);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
+++
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x6C);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFC);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x1F);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
+++	}
+++
+++	if (rt2800_hw_get_chippkg(rt2x00dev) == 0 &&
+++	    rt2800_hw_get_chipver(rt2x00dev) == 1) {
+++		/* Initialize RF channel register for DRQFN */
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xE3);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xE5);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x28);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x68);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xF7);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x02);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xC7);
+++	}
++ 
++ 	/* Initialize RF DC calibration register to default value */
++ 	rt2800_rfcsr_write_dccal(rt2x00dev, 0, 0x47);
++@@ -10617,12 +10658,17 @@ static void rt2800_init_rfcsr_6352(struc
++ 	rt2800_rfcsr_write_dccal(rt2x00dev, 62, 0x00);
++ 	rt2800_rfcsr_write_dccal(rt2x00dev, 63, 0x00);
++ 
++-	rt2800_rfcsr_write_dccal(rt2x00dev, 3, 0x08);
++-	rt2800_rfcsr_write_dccal(rt2x00dev, 4, 0x04);
++-	rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x20);
+++	if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
+++		rt2800_rfcsr_write_dccal(rt2x00dev, 3, 0x08);
+++		rt2800_rfcsr_write_dccal(rt2x00dev, 4, 0x04);
+++		rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x20);
+++	}
++ 
++-	rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
++-	rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
+++	if (rt2800_hw_get_chipver(rt2x00dev) > 1 &&
+++	    rt2800_hw_get_chipeco(rt2x00dev) >= 2) {
+++		rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
+++		rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
+++	}
++ 
++ 	rt6352_enable_pa_pin(rt2x00dev, 0);
++ 	rt2800_r_calibration(rt2x00dev);
+diff --git a/package/kernel/mac80211/patches/rt2x00/997-wifi-rt2x00-limit-MT7620-TX-power-based-on-eeprom-ca.patch b/package/kernel/mac80211/patches/rt2x00/997-wifi-rt2x00-limit-MT7620-TX-power-based-on-eeprom-ca.patch
+new file mode 100644
+index 0000000000..fd1b3d8bf3
+--- /dev/null
++++ b/package/kernel/mac80211/patches/rt2x00/997-wifi-rt2x00-limit-MT7620-TX-power-based-on-eeprom-ca.patch
+@@ -0,0 +1,106 @@
++From: Shiji Yang <yangshiji66@outlook.com>
++Date: Sat, 22 Jul 2023 21:56:30 +0800
++Subject: [PATCH] wifi: rt2x00: limit MT7620 TX power based on eeprom
++ calibration
++
++In the vendor driver, the current channel power is queried from
++EEPROM_TXPOWER_BG1 and EEPROM_TXPOWER_BG2. And then the mixed value
++will be written into the low half-word of the TX_ALC_CFG_0 register.
++The high half-word of the TX_ALC_CFG_0 is a fixed value 0x2f2f.
++
++We can't get the accurate TX power. Based on my tests and the new
++MediaTek mt76 driver source code, the real TX power is approximately
++equal to channel_power + (max) rate_power. Usually max rate_power is
++the gain of the OFDM 6M rate, which can be readed from the offset
++EEPROM_TXPOWER_BYRATE +1.
++
++Based on these eeprom values, this patch adds basic TX power control
++for the MT7620 and limits its maximum TX power. This can avoid the
++link speed decrease caused by chip overheating. rt2800_config_alc()
++function has also been renamed to rt2800_config_alc_rt6352() because
++it's only used by RT6352(MT7620).
++
++Notice:
++It's still need some work to sync the max channel power to the user
++interface. This part is missing from the rt2x00 driver structure. If
++we set the power exceed the calibration value, it won't take effect.
++
++Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
++---
++ .../net/wireless/ralink/rt2x00/rt2800lib.c    | 49 +++++++++++++------
++ 1 file changed, 34 insertions(+), 15 deletions(-)
++
++--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++@@ -3891,28 +3891,47 @@ static void rt2800_config_channel_rf7620
++ 	}
++ }
++ 
++-static void rt2800_config_alc(struct rt2x00_dev *rt2x00dev,
+++static void rt2800_config_alc_rt6352(struct rt2x00_dev *rt2x00dev,
++ 			      struct ieee80211_channel *chan,
++ 			      int power_level) {
++-	u16 eeprom, target_power, max_power;
+++	u16 eeprom, chan_power, rate_power, target_power;
+++	u16 tx_power[2];
+++	s8 *power_group[2];
++ 	u32 mac_sys_ctrl;
++-	u32 reg;
+++	u32 cnt, reg;
++ 	u8 bbp;
++ 
++-	/* hardware unit is 0.5dBm, limited to 23.5dBm */
++-	power_level *= 2;
++-	if (power_level > 0x2f)
++-		power_level = 0x2f;
++-
++-	max_power = chan->max_power * 2;
++-	if (max_power > 0x2f)
++-		max_power = 0x2f;
+++	/* get per channel power, 2 channels in total, unit is 0.5dBm */
+++	power_level = (power_level - 3) * 2;
+++	/*
+++	 * We can't get the accurate TX power. Based on some tests, the real
+++	 * TX power is approximately equal to channel_power + (max)rate_power.
+++	 * Usually max rate_power is the gain of the OFDM 6M rate. The antenna
+++	 * gain and externel PA gain are not included as we are unable to
+++	 * obtain these values.
+++	 */
+++	rate_power = rt2800_eeprom_read_from_array(rt2x00dev,
+++				EEPROM_TXPOWER_BYRATE, 1) & 0x3f;
+++	power_level -= rate_power;
+++	if (power_level < 1)
+++		power_level = 1;
+++	if (power_level > chan->max_power * 2)
+++		power_level = chan->max_power * 2;
+++
+++	power_group[0] = rt2800_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG1);
+++	power_group[1] = rt2800_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG2);
+++	for (cnt = 0; cnt < 2; cnt++) {
+++		chan_power = power_group[cnt][rt2x00dev->rf_channel - 1];
+++		if (chan_power >= 0x20 || chan_power == 0)
+++			chan_power = 0x10;
+++		tx_power[cnt] = power_level < chan_power ? power_level : chan_power;
+++	}
++ 
++ 	reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_0);
++-	rt2x00_set_field32(&reg, TX_ALC_CFG_0_CH_INIT_0, power_level);
++-	rt2x00_set_field32(&reg, TX_ALC_CFG_0_CH_INIT_1, power_level);
++-	rt2x00_set_field32(&reg, TX_ALC_CFG_0_LIMIT_0, max_power);
++-	rt2x00_set_field32(&reg, TX_ALC_CFG_0_LIMIT_1, max_power);
+++	rt2x00_set_field32(&reg, TX_ALC_CFG_0_CH_INIT_0, tx_power[0]);
+++	rt2x00_set_field32(&reg, TX_ALC_CFG_0_CH_INIT_1, tx_power[1]);
+++	rt2x00_set_field32(&reg, TX_ALC_CFG_0_LIMIT_0, 0x2f);
+++	rt2x00_set_field32(&reg, TX_ALC_CFG_0_LIMIT_1, 0x2f);
++ 
++ 	eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1);
++ 	if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_INTERNAL_TX_ALC)) {
++@@ -5321,7 +5340,7 @@ static void rt2800_config_txpower_rt6352
++ 	rt2x00_set_field32(&pwreg, TX_PWR_CFG_9B_STBC_MCS7, t);
++ 	rt2800_register_write(rt2x00dev, TX_PWR_CFG_9, pwreg);
++ 
++-	rt2800_config_alc(rt2x00dev, chan, power_level);
+++	rt2800_config_alc_rt6352(rt2x00dev, chan, power_level);
++ 
++ 	/* TODO: temperature compensation code! */
++ }
+diff --git a/package/kernel/mac80211/patches/rt2x00/998-wifi-rt2x00-rework-MT7620-PA-LNA-RF-calibration.patch b/package/kernel/mac80211/patches/rt2x00/998-wifi-rt2x00-rework-MT7620-PA-LNA-RF-calibration.patch
+new file mode 100644
+index 0000000000..5f6f5140d9
+--- /dev/null
++++ b/package/kernel/mac80211/patches/rt2x00/998-wifi-rt2x00-rework-MT7620-PA-LNA-RF-calibration.patch
+@@ -0,0 +1,413 @@
++From: Shiji Yang <yangshiji66@outlook.com>
++Date: Tue, 25 Jul 2023 20:05:06 +0800
++Subject: [PATCH] wifi: rt2x00: rework MT7620 PA/LNA RF calibration
++
++1. Move MT7620 PA/LNA calibration code to dedicated functions.
++2. For external PA/LNA devices, restore RF and BBP registers before
++   R-Calibration.
++3. Do Rx DCOC calibration again before RXIQ calibration.
++4. Correct MAC_SYS_CTRL register RX mask to 0x08 in R-Calibration
++   function. For MAC_SYS_CTRL register, Bit[2] controls MAC_TX_EN
++   and Bit[3] controls MAC_RX_EN (Bit index starts from 0).
++5. Move the channel configuration code from rt2800_vco_calibration()
++   to the rt2800_config_channel().
++6. Use MT7620 SOC specific AGC initial LNA value instead of the
++   RT5592's value.
++7. Adjust the register operation sequence according to the vendor
++   driver code. This may not be useful, but it can make things
++   clearer when developers try to review it.
++
++Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
++---
++ .../net/wireless/ralink/rt2x00/rt2800lib.c    | 306 ++++++++++--------
++ drivers/net/wireless/ralink/rt2x00/rt2x00.h   |   6 +
++ 2 files changed, 182 insertions(+), 130 deletions(-)
++
++--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++@@ -3881,14 +3881,6 @@ static void rt2800_config_channel_rf7620
++ 		rfcsr |= tx_agc_fc;
++ 		rt2800_rfcsr_write_bank(rt2x00dev, 7, 59, rfcsr);
++ 	}
++-
++-	if (conf_is_ht40(conf)) {
++-		rt2800_bbp_glrt_write(rt2x00dev, 141, 0x10);
++-		rt2800_bbp_glrt_write(rt2x00dev, 157, 0x2f);
++-	} else {
++-		rt2800_bbp_glrt_write(rt2x00dev, 141, 0x1a);
++-		rt2800_bbp_glrt_write(rt2x00dev, 157, 0x40);
++-	}
++ }
++ 
++ static void rt2800_config_alc_rt6352(struct rt2x00_dev *rt2x00dev,
++@@ -4457,89 +4449,63 @@ static void rt2800_config_channel(struct
++ 		usleep_range(1000, 1500);
++ 	}
++ 
++-	if (rt2x00_rt(rt2x00dev, RT5592) || rt2x00_rt(rt2x00dev, RT6352)) {
+++	if (rt2x00_rt(rt2x00dev, RT5592)) {
++ 		reg = 0x10;
++-		if (!conf_is_ht40(conf)) {
++-			if (rt2x00_rt(rt2x00dev, RT6352) &&
++-			    rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
++-				reg |= 0x5;
++-			} else {
++-				reg |= 0xa;
++-			}
++-		}
+++		if (!conf_is_ht40(conf))
+++			reg |= 0xa;
++ 		rt2800_bbp_write(rt2x00dev, 195, 141);
++ 		rt2800_bbp_write(rt2x00dev, 196, reg);
++ 
++-		/* AGC init.
++-		 * Despite the vendor driver using different values here for
++-		 * RT6352 chip, we use 0x1c for now. This may have to be changed
++-		 * once TSSI got implemented.
++-		 */
++ 		reg = (rf->channel <= 14 ? 0x1c : 0x24) + 2*rt2x00dev->lna_gain;
++ 		rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, reg);
++-
++-		if (rt2x00_rt(rt2x00dev, RT5592))
++-			rt2800_iq_calibrate(rt2x00dev, rf->channel);
+++	
+++		rt2800_iq_calibrate(rt2x00dev, rf->channel);
++ 	}
++ 
++ 	if (rt2x00_rt(rt2x00dev, RT6352)) {
++-		if (test_bit(CAPABILITY_EXTERNAL_PA_TX0,
++-			     &rt2x00dev->cap_flags)) {
++-			reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
++-			reg |= 0x00000101;
++-			rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
++-
++-			reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
++-			reg |= 0x00000101;
++-			rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
++-
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0x73);
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0x73);
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0x73);
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0xC8);
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xA4);
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x05);
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0xC8);
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xA4);
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x05);
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x27);
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0xC8);
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xA4);
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x05);
++-			rt2800_rfcsr_write_dccal(rt2x00dev, 05, 0x00);
+++		/* BBP for GLRT BW */
+++		if (conf_is_ht40(conf)) {
+++			rt2800_bbp_glrt_write(rt2x00dev, 141, 0x10);
+++			rt2800_bbp_glrt_write(rt2x00dev, 157, 0x2f);
+++		} else {
+++			rt2800_bbp_glrt_write(rt2x00dev, 141, 0x1a);
+++			rt2800_bbp_glrt_write(rt2x00dev, 157, 0x40);
++ 
++-			rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT,
++-					      0x36303636);
++-			rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN,
++-					      0x6C6C6B6C);
++-			rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN,
++-					      0x6C6C6B6C);
+++			if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+++				rt2x00_has_cap_external_lna_bg(rt2x00dev))
+++				rt2800_bbp_glrt_write(rt2x00dev, 141, 0x15);
++ 		}
++ 
++-		if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
++-			reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
++-			reg |= 0x00000101;
++-			rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
++-
++-			reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
++-			reg |= 0x00000101;
++-			rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
++-
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
++-			rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
++-			rt2800_bbp_write(rt2x00dev, 75, 0x68);
++-			rt2800_bbp_write(rt2x00dev, 76, 0x4C);
++-			rt2800_bbp_write(rt2x00dev, 79, 0x1C);
++-			rt2800_bbp_write(rt2x00dev, 80, 0x0C);
++-			rt2800_bbp_write(rt2x00dev, 82, 0xB6);
++-			/* bank 0 RF reg 42 and glrt BBP reg 141 will be set in
++-			 * config channel function in dependence of channel and
++-			 * HT20/HT40 so don't touch it
++-			 */
+++		if (rt2x00dev->default_ant.rx_chain_num == 1) {
+++			rt2800_bbp_write(rt2x00dev, 91, 0x07);
+++			rt2800_bbp_write(rt2x00dev, 95, 0x1A);
+++			rt2800_bbp_write(rt2x00dev, 195, 128);
+++			rt2800_bbp_write(rt2x00dev, 196, 0xA0);
+++			rt2800_bbp_write(rt2x00dev, 195, 170);
+++			rt2800_bbp_write(rt2x00dev, 196, 0x12);
+++			rt2800_bbp_write(rt2x00dev, 195, 171);
+++			rt2800_bbp_write(rt2x00dev, 196, 0x10);
+++		} else {
+++			rt2800_bbp_write(rt2x00dev, 91, 0x06);
+++			rt2800_bbp_write(rt2x00dev, 95, 0x9A);
+++			rt2800_bbp_write(rt2x00dev, 195, 128);
+++			rt2800_bbp_write(rt2x00dev, 196, 0xE0);
+++			rt2800_bbp_write(rt2x00dev, 195, 170);
+++			rt2800_bbp_write(rt2x00dev, 196, 0x30);
+++			rt2800_bbp_write(rt2x00dev, 195, 171);
+++			rt2800_bbp_write(rt2x00dev, 196, 0x30);
++ 		}
+++
+++		/* AGC init */
+++		reg = rf->channel <= 14 ? 0x04 + 2 * rt2x00dev->lna_gain : 0;
+++		rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, reg);
+++
+++		/* On 11A, We should delay and wait RF/BBP to be stable
+++		 * and the appropriate time should be 1000 micro seconds
+++		 * 2005/06/05 - On 11G, we also need this delay time.
+++		 * Otherwise it's difficult to pass the WHQL.
+++		 */
+++		usleep_range(1000, 1500);
++ 	}
++ 
++ 	bbp = rt2800_bbp_read(rt2x00dev, 4);
++@@ -5649,43 +5615,6 @@ void rt2800_vco_calibration(struct rt2x0
++ 		}
++ 	}
++ 	rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
++-
++-	if (rt2x00_rt(rt2x00dev, RT6352)) {
++-		if (rt2x00dev->default_ant.rx_chain_num == 1) {
++-			rt2800_bbp_write(rt2x00dev, 91, 0x07);
++-			rt2800_bbp_write(rt2x00dev, 95, 0x1A);
++-			rt2800_bbp_write(rt2x00dev, 195, 128);
++-			rt2800_bbp_write(rt2x00dev, 196, 0xA0);
++-			rt2800_bbp_write(rt2x00dev, 195, 170);
++-			rt2800_bbp_write(rt2x00dev, 196, 0x12);
++-			rt2800_bbp_write(rt2x00dev, 195, 171);
++-			rt2800_bbp_write(rt2x00dev, 196, 0x10);
++-		} else {
++-			rt2800_bbp_write(rt2x00dev, 91, 0x06);
++-			rt2800_bbp_write(rt2x00dev, 95, 0x9A);
++-			rt2800_bbp_write(rt2x00dev, 195, 128);
++-			rt2800_bbp_write(rt2x00dev, 196, 0xE0);
++-			rt2800_bbp_write(rt2x00dev, 195, 170);
++-			rt2800_bbp_write(rt2x00dev, 196, 0x30);
++-			rt2800_bbp_write(rt2x00dev, 195, 171);
++-			rt2800_bbp_write(rt2x00dev, 196, 0x30);
++-		}
++-
++-		if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
++-			rt2800_bbp_write(rt2x00dev, 75, 0x68);
++-			rt2800_bbp_write(rt2x00dev, 76, 0x4C);
++-			rt2800_bbp_write(rt2x00dev, 79, 0x1C);
++-			rt2800_bbp_write(rt2x00dev, 80, 0x0C);
++-			rt2800_bbp_write(rt2x00dev, 82, 0xB6);
++-		}
++-
++-		/* On 11A, We should delay and wait RF/BBP to be stable
++-		 * and the appropriate time should be 1000 micro seconds
++-		 * 2005/06/05 - On 11G, we also need this delay time.
++-		 * Otherwise it's difficult to pass the WHQL.
++-		 */
++-		usleep_range(1000, 1500);
++-	}
++ }
++ EXPORT_SYMBOL_GPL(rt2800_vco_calibration);
++ 
++@@ -8650,7 +8579,7 @@ static void rt2800_r_calibration(struct
++ 		rt2x00_warn(rt2x00dev, "Wait MAC Tx Status to MAX !!!\n");
++ 
++ 	maccfg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
++-	maccfg &= (~0x04);
+++	maccfg &= (~0x08);
++ 	rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, maccfg);
++ 
++ 	if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev, MAC_STATUS_CFG_BBP_RF_BUSY_RX)))
++@@ -10688,30 +10617,143 @@ static void rt2800_init_rfcsr_6352(struc
++ 		rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
++ 		rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
++ 	}
+++}
++ 
++-	rt6352_enable_pa_pin(rt2x00dev, 0);
++-	rt2800_r_calibration(rt2x00dev);
++-	rt2800_rf_self_txdc_cal(rt2x00dev);
++-	rt2800_rxdcoc_calibration(rt2x00dev);
++-	rt2800_bw_filter_calibration(rt2x00dev, true);
++-	rt2800_bw_filter_calibration(rt2x00dev, false);
++-	rt2800_loft_iq_calibration(rt2x00dev);
++-	rt2800_rxiq_calibration(rt2x00dev);
++-	rt6352_enable_pa_pin(rt2x00dev, 1);
+++static void rt2800_init_palna_rt6352(struct rt2x00_dev *rt2x00dev)
+++{
+++	u32 reg;
+++
+++	if (rt2x00_has_cap_external_pa(rt2x00dev)) {
+++		reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
+++		reg |= 0x00000101;
+++		rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
+++
+++		reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
+++		reg |= 0x00000101;
+++		rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
+++	}
++ 
++-	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+++	if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+++	    rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
++ 		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
++ 		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
++ 		rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
+++	}
+++
+++	if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+++	    rt2x00_has_cap_external_pa(rt2x00dev)) {
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0x73);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0x73);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0x73);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0xC8);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xA4);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x05);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0xC8);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xA4);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x05);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x27);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0xC8);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xA4);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x05);
+++	}
+++
+++	if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+++	    rt2x00_has_cap_external_pa(rt2x00dev))
+++		rt2800_rfcsr_write_dccal(rt2x00dev, 05, 0x00);
+++
+++	if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+++	    rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
++ 		rt2800_bbp_write(rt2x00dev, 75, 0x68);
++ 		rt2800_bbp_write(rt2x00dev, 76, 0x4C);
++ 		rt2800_bbp_write(rt2x00dev, 79, 0x1C);
++ 		rt2800_bbp_write(rt2x00dev, 80, 0x0C);
++ 		rt2800_bbp_write(rt2x00dev, 82, 0xB6);
++-		/* bank 0 RF reg 42 and glrt BBP reg 141 will be set in config
++-		 * channel function in dependence of channel and HT20/HT40,
++-		 * so don't touch them here.
++-		 */
+++	}
+++
+++	if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+++	    rt2x00_has_cap_external_pa(rt2x00dev)) {
+++		rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT, 0x36303636);
+++		rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6C6C6B6C);
+++		rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6C6C6B6C);
+++	}
+++}
+++
+++static void rt2800_restore_rf_bbp_rt6352(struct rt2x00_dev *rt2x00dev)
+++{
+++	if (rt2x00_has_cap_external_pa(rt2x00dev)) {
+++		rt2800_register_write(rt2x00dev, RF_CONTROL3, 0x0);
+++		rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0);
+++	}
+++
+++	if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+++	    rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x02);
+++	}
+++
+++	if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+++	    rt2x00_has_cap_external_pa(rt2x00dev)) {
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xB3);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xD5);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x6C);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFC);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x1F);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xFF);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x1C);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x20);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xF7);
+++		rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x09);
+++	}
+++
+++	if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+++	    rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+++		rt2800_bbp_write(rt2x00dev, 75, 0x60);
+++		rt2800_bbp_write(rt2x00dev, 76, 0x44);
+++		rt2800_bbp_write(rt2x00dev, 79, 0x1C);
+++		rt2800_bbp_write(rt2x00dev, 80, 0x0C);
+++		rt2800_bbp_write(rt2x00dev, 82, 0xB6);
+++	}
+++
+++	if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+++	    rt2x00_has_cap_external_pa(rt2x00dev)) {
+++		rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT, 0x3630363A);
+++		rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6C6C666C);
+++		rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6C6C666C);
+++	}
+++}
+++
+++static void rt2800_calibration_rt6352(struct rt2x00_dev *rt2x00dev)
+++{
+++	if (rt2x00_has_cap_external_pa(rt2x00dev) ||
+++	    rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+++		rt6352_enable_pa_pin(rt2x00dev, 0);
+++		rt2800_restore_rf_bbp_rt6352(rt2x00dev);
+++	}
+++
+++	rt2800_r_calibration(rt2x00dev);
+++	rt2800_rf_self_txdc_cal(rt2x00dev);
+++	rt2800_rxdcoc_calibration(rt2x00dev);
+++	rt2800_bw_filter_calibration(rt2x00dev, true);
+++	rt2800_bw_filter_calibration(rt2x00dev, false);
+++	rt2800_loft_iq_calibration(rt2x00dev);
+++
+++	/* missing DPD Calibration for devices using internal PA */
+++
+++	rt2800_rxdcoc_calibration(rt2x00dev);
+++	rt2800_rxiq_calibration(rt2x00dev);
+++
+++	if (rt2x00_has_cap_external_pa(rt2x00dev) ||
+++	   rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+++		rt6352_enable_pa_pin(rt2x00dev, 1);
+++		rt2800_init_palna_rt6352(rt2x00dev);
++ 	}
++ }
++ 
++@@ -10804,6 +10846,10 @@ int rt2800_enable_radio(struct rt2x00_de
++ 	rt2800_init_bbp(rt2x00dev);
++ 	rt2800_init_rfcsr(rt2x00dev);
++ 
+++	/* Do calibration and init PA/LNA for RT6352 */
+++	if (rt2x00_rt(rt2x00dev, RT6352))
+++		rt2800_calibration_rt6352(rt2x00dev);
+++
++ 	if (rt2x00_is_usb(rt2x00dev) &&
++ 	    (rt2x00_rt(rt2x00dev, RT3070) ||
++ 	     rt2x00_rt(rt2x00dev, RT3071) ||
++--- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
++@@ -1277,6 +1277,12 @@ rt2x00_has_cap_external_lna_bg(struct rt
++ }
++ 
++ static inline bool
+++rt2x00_has_cap_external_pa(struct rt2x00_dev *rt2x00dev)
+++{
+++	return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_EXTERNAL_PA_TX0);
+++}
+++
+++static inline bool
++ rt2x00_has_cap_double_antenna(struct rt2x00_dev *rt2x00dev)
++ {
++ 	return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_DOUBLE_ANTENNA);
+diff --git a/package/kernel/mac80211/patches/subsys/110-mac80211_keep_keys_on_stop_ap.patch b/package/kernel/mac80211/patches/subsys/110-mac80211_keep_keys_on_stop_ap.patch
+new file mode 100644
+index 0000000000..4d4a2a8f5e
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/110-mac80211_keep_keys_on_stop_ap.patch
+@@ -0,0 +1,19 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Mon, 27 Oct 2014 00:00:00 +0100
++Subject: [PATCH] mac80211: preseve AP mode keys across STA reconnect
++
++Used for AP+STA support in OpenWrt - preserve AP mode keys across STA reconnect
++---
++ net/mac80211/cfg.c | 1 -
++ 1 file changed, 1 deletion(-)
++
++--- a/net/mac80211/cfg.c
+++++ b/net/mac80211/cfg.c
++@@ -1519,7 +1519,6 @@ static int ieee80211_stop_ap(struct wiph
++ 	link_conf->bssid_indicator = 0;
++ 
++ 	__sta_info_flush(sdata, true);
++-	ieee80211_free_keys(sdata, true);
++ 
++ 	link_conf->enable_beacon = false;
++ 	sdata->beacon_rate_set = false;
+diff --git a/package/kernel/mac80211/patches/subsys/120-cfg80211_allow_perm_addr_change.patch b/package/kernel/mac80211/patches/subsys/120-cfg80211_allow_perm_addr_change.patch
+new file mode 100644
+index 0000000000..f315ae5ca2
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/120-cfg80211_allow_perm_addr_change.patch
+@@ -0,0 +1,52 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Thu, 11 Dec 2014 00:00:00 +0100
++Subject: [PATCH] cfg80211: add support for changing the device mac address via
++ sysfs
++
++---
++ net/wireless/sysfs.c | 27 ++++++++++++++++++++++-----
++ 1 file changed, 22 insertions(+), 5 deletions(-)
++
++--- a/net/wireless/sysfs.c
+++++ b/net/wireless/sysfs.c
++@@ -24,18 +24,35 @@ static inline struct cfg80211_registered
++ 	return container_of(dev, struct cfg80211_registered_device, wiphy.dev);
++ }
++ 
++-#define SHOW_FMT(name, fmt, member)					\
+++#define SHOW_FMT(name, fmt, member, mode)				\
++ static ssize_t name ## _show(struct device *dev,			\
++ 			      struct device_attribute *attr,		\
++ 			      char *buf)				\
++ {									\
++ 	return sprintf(buf, fmt "\n", dev_to_rdev(dev)->member);	\
++ }									\
++-static DEVICE_ATTR_RO(name)
+++static DEVICE_ATTR_##mode(name)
++ 
++-SHOW_FMT(index, "%d", wiphy_idx);
++-SHOW_FMT(macaddress, "%pM", wiphy.perm_addr);
++-SHOW_FMT(address_mask, "%pM", wiphy.addr_mask);
+++static ssize_t macaddress_store(struct device *dev,
+++				struct device_attribute *attr,
+++				const char *buf, size_t len)
+++{
+++	u8 mac[ETH_ALEN];
+++
+++	if (!mac_pton(buf, mac))
+++		return -EINVAL;
+++
+++	if (buf[3 * ETH_ALEN - 1] && buf[3 * ETH_ALEN - 1] != '\n')
+++		return -EINVAL;
+++
+++	memcpy(dev_to_rdev(dev)->wiphy.perm_addr, mac, ETH_ALEN);
+++
+++	return strnlen(buf, len);
+++}
+++
+++SHOW_FMT(index, "%d", wiphy_idx, RO);
+++SHOW_FMT(macaddress, "%pM", wiphy.perm_addr, RW);
+++SHOW_FMT(address_mask, "%pM", wiphy.addr_mask, RO);
++ 
++ static ssize_t name_show(struct device *dev,
++ 			 struct device_attribute *attr,
+diff --git a/package/kernel/mac80211/patches/subsys/210-ap_scan.patch b/package/kernel/mac80211/patches/subsys/210-ap_scan.patch
+new file mode 100644
+index 0000000000..10b842d9af
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/210-ap_scan.patch
+@@ -0,0 +1,19 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Wed, 3 Oct 2012 00:00:00 +0200
++Subject: [PATCH] mac80211: allow scans in access point mode (for site survey)
++
++---
++ net/mac80211/cfg.c | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/net/mac80211/cfg.c
+++++ b/net/mac80211/cfg.c
++@@ -2727,6 +2727,8 @@ static int ieee80211_scan(struct wiphy *
++ 		 */
++ 		fallthrough;
++ 	case NL80211_IFTYPE_AP:
+++		/* skip check */
+++		break;
++ 		/*
++ 		 * If the scan has been forced (and the driver supports
++ 		 * forcing), don't care about being beaconing already.
+diff --git a/package/kernel/mac80211/patches/subsys/301-mac80211-sta-randomize-BA-session-dialog-token-alloc.patch b/package/kernel/mac80211/patches/subsys/301-mac80211-sta-randomize-BA-session-dialog-token-alloc.patch
+new file mode 100644
+index 0000000000..63b2177471
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/301-mac80211-sta-randomize-BA-session-dialog-token-alloc.patch
+@@ -0,0 +1,38 @@
++From b478e06a16a8baa00c5ecc87c1d636981f2206d5 Mon Sep 17 00:00:00 2001
++From: Johannes Berg <johannes.berg@intel.com>
++Date: Tue, 29 Oct 2019 10:25:25 +0100
++Subject: [PATCH] mac80211: sta: randomize BA session dialog token allocator
++
++We currently always start the dialog token generator at zero,
++so the first dialog token we use is always 1. This would be
++OK if we had a perfect guarantee that we always do a proper
++deauth/re-auth handshake, but in IBSS mode this doesn't always
++happen properly.
++
++To make problems with block ack (aggregation) sessions getting
++stuck less likely, randomize the dialog token so if we start a
++new session but the peer still has old state for us, it can
++better detect this.
++
++This is really just a workaround to make things a bit more
++robust than they are now - a better fix would be to do a full
++authentication handshake in IBSS mode upon having discovered a
++new station, and on the receiver resetting the state (removing
++and re-adding the station) on receiving the authentication
++packet.
++
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++---
++ net/mac80211/sta_info.c | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/net/mac80211/sta_info.c
+++++ b/net/mac80211/sta_info.c
++@@ -554,6 +554,7 @@ __sta_info_alloc(struct ieee80211_sub_if
++ 	INIT_WORK(&sta->drv_deliver_wk, sta_deliver_ps_frames);
++ 	INIT_WORK(&sta->ampdu_mlme.work, ieee80211_ba_session_work);
++ 	mutex_init(&sta->ampdu_mlme.mtx);
+++	sta->ampdu_mlme.dialog_token_allocator = prandom_u32_max(U8_MAX);
++ #ifdef CPTCFG_MAC80211_MESH
++ 	if (ieee80211_vif_is_mesh(&sdata->vif)) {
++ 		sta->mesh = kzalloc(sizeof(*sta->mesh), gfp);
+diff --git a/package/kernel/mac80211/patches/subsys/302-mac80211-minstrel_ht-fix-MINSTREL_FRAC-macro.patch b/package/kernel/mac80211/patches/subsys/302-mac80211-minstrel_ht-fix-MINSTREL_FRAC-macro.patch
+new file mode 100644
+index 0000000000..0d475b7329
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/302-mac80211-minstrel_ht-fix-MINSTREL_FRAC-macro.patch
+@@ -0,0 +1,21 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Wed, 28 Apr 2021 21:03:13 +0200
++Subject: [PATCH] mac80211: minstrel_ht: fix MINSTREL_FRAC macro
++
++Add missing braces to avoid issues with e.g. using additions in the
++div expression
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/mac80211/rc80211_minstrel_ht.h
+++++ b/net/mac80211/rc80211_minstrel_ht.h
++@@ -14,7 +14,7 @@
++ 
++ /* scaled fraction values */
++ #define MINSTREL_SCALE  12
++-#define MINSTREL_FRAC(val, div) (((val) << MINSTREL_SCALE) / div)
+++#define MINSTREL_FRAC(val, div) (((val) << MINSTREL_SCALE) / (div))
++ #define MINSTREL_TRUNC(val) ((val) >> MINSTREL_SCALE)
++ 
++ #define EWMA_LEVEL	96	/* ewma weighting factor [/EWMA_DIV] */
+diff --git a/package/kernel/mac80211/patches/subsys/303-mac80211-minstrel_ht-reduce-fluctuations-in-rate-pro.patch b/package/kernel/mac80211/patches/subsys/303-mac80211-minstrel_ht-reduce-fluctuations-in-rate-pro.patch
+new file mode 100644
+index 0000000000..f26477e811
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/303-mac80211-minstrel_ht-reduce-fluctuations-in-rate-pro.patch
+@@ -0,0 +1,30 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sat, 6 Feb 2021 16:08:01 +0100
++Subject: [PATCH] mac80211: minstrel_ht: reduce fluctuations in rate
++ probability stats
++
++In some scenarios when there is a lot of fluctuation in packet error rates,
++rate switching can be amplified when the statistics get skewed by time slots
++with very few tries.
++Make the input data to the moving average more smooth by adding the
++success/attempts count from the last stats window as well. This has the
++advantage of smoothing the data without introducing any extra lag to sampling
++rates.
++This significantly improves rate stability on a strong test link subjected to
++periodic noise bursts generated with a SDR
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/mac80211/rc80211_minstrel_ht.c
+++++ b/net/mac80211/rc80211_minstrel_ht.c
++@@ -769,7 +769,8 @@ minstrel_ht_calc_rate_stats(struct minst
++ 	unsigned int cur_prob;
++ 
++ 	if (unlikely(mrs->attempts > 0)) {
++-		cur_prob = MINSTREL_FRAC(mrs->success, mrs->attempts);
+++		cur_prob = MINSTREL_FRAC(mrs->success + mrs->last_success,
+++					 mrs->attempts + mrs->last_attempts);
++ 		minstrel_filter_avg_add(&mrs->prob_avg,
++ 					&mrs->prob_avg_1, cur_prob);
++ 		mrs->att_hist += mrs->attempts;
+diff --git a/package/kernel/mac80211/patches/subsys/304-mac80211-minstrel_ht-rework-rate-downgrade-code-and-.patch b/package/kernel/mac80211/patches/subsys/304-mac80211-minstrel_ht-rework-rate-downgrade-code-and-.patch
+new file mode 100644
+index 0000000000..9b3cc3a664
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/304-mac80211-minstrel_ht-rework-rate-downgrade-code-and-.patch
+@@ -0,0 +1,151 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sat, 6 Feb 2021 16:33:14 +0100
++Subject: [PATCH] mac80211: minstrel_ht: rework rate downgrade code and
++ max_prob rate selection
++
++The current fallback code for fast rate switching on potentially failing rates
++is triggering too often if there is some strong noise on the channel. This can
++lead to wild fluctuations in the rate selection.
++Additionally, switching down to max_prob_rate can create a significant gap down
++in throughput, especially when using only 2 spatial streams, because max_prob_rate
++is limited to using fewer streams than the max_tp rates.
++In order to improve throughput without reducing reliability too much, use the
++rate downgrade code for the max_prob_rate only, and allow the non-downgraded
++max_prob_rate to use as many spatial streams as the max_tp rates
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/mac80211/rc80211_minstrel_ht.c
+++++ b/net/mac80211/rc80211_minstrel_ht.c
++@@ -580,6 +580,14 @@ minstrel_ht_set_best_prob_rate(struct mi
++ 	int cur_tp_avg, cur_group, cur_idx;
++ 	int max_gpr_group, max_gpr_idx;
++ 	int max_gpr_tp_avg, max_gpr_prob;
+++	int min_dur;
+++
+++	min_dur = max(minstrel_get_duration(mi->max_tp_rate[0]),
+++		      minstrel_get_duration(mi->max_tp_rate[1]));
+++
+++	/* make the rate at least 18% slower than max tp rates */
+++	if (minstrel_get_duration(index) <= min_dur * 19 / 16)
+++		return;
++ 
++ 	cur_group = MI_RATE_GROUP(index);
++ 	cur_idx = MI_RATE_IDX(index);
++@@ -601,11 +609,6 @@ minstrel_ht_set_best_prob_rate(struct mi
++ 	    !minstrel_ht_is_legacy_group(max_tp_group))
++ 		return;
++ 
++-	/* skip rates faster than max tp rate with lower prob */
++-	if (minstrel_get_duration(mi->max_tp_rate[0]) > minstrel_get_duration(index) &&
++-	    mrs->prob_avg < max_tp_prob)
++-		return;
++-
++ 	max_gpr_group = MI_RATE_GROUP(mg->max_group_prob_rate);
++ 	max_gpr_idx = MI_RATE_IDX(mg->max_group_prob_rate);
++ 	max_gpr_prob = mi->groups[max_gpr_group].rates[max_gpr_idx].prob_avg;
++@@ -663,40 +666,6 @@ minstrel_ht_assign_best_tp_rates(struct
++ 
++ }
++ 
++-/*
++- * Try to increase robustness of max_prob rate by decrease number of
++- * streams if possible.
++- */
++-static inline void
++-minstrel_ht_prob_rate_reduce_streams(struct minstrel_ht_sta *mi)
++-{
++-	struct minstrel_mcs_group_data *mg;
++-	int tmp_max_streams, group, tmp_idx, tmp_prob;
++-	int tmp_tp = 0;
++-
++-	if (!mi->sta->deflink.ht_cap.ht_supported)
++-		return;
++-
++-	group = MI_RATE_GROUP(mi->max_tp_rate[0]);
++-	tmp_max_streams = minstrel_mcs_groups[group].streams;
++-	for (group = 0; group < ARRAY_SIZE(minstrel_mcs_groups); group++) {
++-		mg = &mi->groups[group];
++-		if (!mi->supported[group] || group == MINSTREL_CCK_GROUP)
++-			continue;
++-
++-		tmp_idx = MI_RATE_IDX(mg->max_group_prob_rate);
++-		tmp_prob = mi->groups[group].rates[tmp_idx].prob_avg;
++-
++-		if (tmp_tp < minstrel_ht_get_tp_avg(mi, group, tmp_idx, tmp_prob) &&
++-		   (minstrel_mcs_groups[group].streams < tmp_max_streams)) {
++-				mi->max_prob_rate = mg->max_group_prob_rate;
++-				tmp_tp = minstrel_ht_get_tp_avg(mi, group,
++-								tmp_idx,
++-								tmp_prob);
++-		}
++-	}
++-}
++-
++ static u16
++ __minstrel_ht_get_sample_rate(struct minstrel_ht_sta *mi,
++ 			      enum minstrel_sample_type type)
++@@ -1176,8 +1145,6 @@ minstrel_ht_update_stats(struct minstrel
++ 
++ 	mi->max_prob_rate = tmp_max_prob_rate;
++ 
++-	/* Try to increase robustness of max_prob_rate*/
++-	minstrel_ht_prob_rate_reduce_streams(mi);
++ 	minstrel_ht_refill_sample_rates(mi);
++ 
++ #ifdef CPTCFG_MAC80211_DEBUGFS
++@@ -1256,7 +1223,7 @@ minstrel_ht_ri_txstat_valid(struct minst
++ }
++ 
++ static void
++-minstrel_downgrade_rate(struct minstrel_ht_sta *mi, u16 *idx, bool primary)
+++minstrel_downgrade_prob_rate(struct minstrel_ht_sta *mi, u16 *idx)
++ {
++ 	int group, orig_group;
++ 
++@@ -1271,11 +1238,7 @@ minstrel_downgrade_rate(struct minstrel_
++ 		    minstrel_mcs_groups[orig_group].streams)
++ 			continue;
++ 
++-		if (primary)
++-			*idx = mi->groups[group].max_group_tp_rate[0];
++-		else
++-			*idx = mi->groups[group].max_group_tp_rate[1];
++-		break;
+++		*idx = mi->groups[group].max_group_prob_rate;
++ 	}
++ }
++ 
++@@ -1286,7 +1249,7 @@ minstrel_ht_tx_status(void *priv, struct
++ 	struct ieee80211_tx_info *info = st->info;
++ 	struct minstrel_ht_sta *mi = priv_sta;
++ 	struct ieee80211_tx_rate *ar = info->status.rates;
++-	struct minstrel_rate_stats *rate, *rate2;
+++	struct minstrel_rate_stats *rate;
++ 	struct minstrel_priv *mp = priv;
++ 	u32 update_interval = mp->update_interval;
++ 	bool last, update = false;
++@@ -1354,18 +1317,13 @@ minstrel_ht_tx_status(void *priv, struct
++ 		/*
++ 		 * check for sudden death of spatial multiplexing,
++ 		 * downgrade to a lower number of streams if necessary.
+++		 * only do this for the max_prob_rate to prevent spurious
+++		 * rate fluctuations when the link changes suddenly
++ 		 */
++-		rate = minstrel_get_ratestats(mi, mi->max_tp_rate[0]);
+++		rate = minstrel_get_ratestats(mi, mi->max_prob_rate);
++ 		if (rate->attempts > 30 &&
++ 		    rate->success < rate->attempts / 4) {
++-			minstrel_downgrade_rate(mi, &mi->max_tp_rate[0], true);
++-			update = true;
++-		}
++-
++-		rate2 = minstrel_get_ratestats(mi, mi->max_tp_rate[1]);
++-		if (rate2->attempts > 30 &&
++-		    rate2->success < rate2->attempts / 4) {
++-			minstrel_downgrade_rate(mi, &mi->max_tp_rate[1], false);
+++			minstrel_downgrade_prob_rate(mi, &mi->max_prob_rate);
++ 			update = true;
++ 		}
++ 	}
+diff --git a/package/kernel/mac80211/patches/subsys/305-mac80211-increase-quantum-for-airtime-scheduler.patch b/package/kernel/mac80211/patches/subsys/305-mac80211-increase-quantum-for-airtime-scheduler.patch
+new file mode 100644
+index 0000000000..0ac972955f
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/305-mac80211-increase-quantum-for-airtime-scheduler.patch
+@@ -0,0 +1,53 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sun, 26 Jun 2022 11:43:25 +0200
++Subject: [PATCH] mac80211: increase quantum for airtime scheduler
++
++Given the typical AQL budget and queue length, a quantum of 256 with the
++default station weight often requires iterating over all queues frequently,
++until one of them becomes eligible.
++Improve performance by using 8 times station weight as scheduler quantum
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/mac80211/ieee80211_i.h
+++++ b/net/mac80211/ieee80211_i.h
++@@ -90,6 +90,8 @@ extern const u8 ieee80211_ac_to_qos_mask
++  */
++ #define AIRTIME_ACTIVE_DURATION (HZ / 10)
++ 
+++#define AIRTIME_QUANTUM_SHIFT	3
+++
++ struct ieee80211_bss {
++ 	u32 device_ts_beacon, device_ts_presp;
++ 
++--- a/net/mac80211/tx.c
+++++ b/net/mac80211/tx.c
++@@ -3984,7 +3984,7 @@ struct ieee80211_txq *ieee80211_next_txq
++ 
++ 		if (deficit < 0)
++ 			sta->airtime[txqi->txq.ac].deficit +=
++-				sta->airtime_weight;
+++				sta->airtime_weight << AIRTIME_QUANTUM_SHIFT;
++ 
++ 		if (deficit < 0 || !aql_check) {
++ 			list_move_tail(&txqi->schedule_order,
++@@ -4127,7 +4127,8 @@ bool ieee80211_txq_may_transmit(struct i
++ 		}
++ 		sta = container_of(iter->txq.sta, struct sta_info, sta);
++ 		if (ieee80211_sta_deficit(sta, ac) < 0)
++-			sta->airtime[ac].deficit += sta->airtime_weight;
+++			sta->airtime[ac].deficit += sta->airtime_weight <<
+++						    AIRTIME_QUANTUM_SHIFT;
++ 		list_move_tail(&iter->schedule_order, &local->active_txqs[ac]);
++ 	}
++ 
++@@ -4135,7 +4136,7 @@ bool ieee80211_txq_may_transmit(struct i
++ 	if (sta->airtime[ac].deficit >= 0)
++ 		goto out;
++ 
++-	sta->airtime[ac].deficit += sta->airtime_weight;
+++	sta->airtime[ac].deficit += sta->airtime_weight << AIRTIME_QUANTUM_SHIFT;
++ 	list_move_tail(&txqi->schedule_order, &local->active_txqs[ac]);
++ 	spin_unlock_bh(&local->active_txq_lock[ac]);
++ 
+diff --git a/package/kernel/mac80211/patches/subsys/306-01-v6.2-wifi-mac80211-add-internal-handler-for-wake_tx_queue.patch b/package/kernel/mac80211/patches/subsys/306-01-v6.2-wifi-mac80211-add-internal-handler-for-wake_tx_queue.patch
+new file mode 100644
+index 0000000000..d14ba05e69
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/306-01-v6.2-wifi-mac80211-add-internal-handler-for-wake_tx_queue.patch
+@@ -0,0 +1,183 @@
++From: Alexander Wetzel <alexander@wetzel-home.de>
++Date: Sun, 9 Oct 2022 18:30:38 +0200
++Subject: [PATCH] wifi: mac80211: add internal handler for wake_tx_queue
++
++Start to align the TX handling to only use internal TX queues (iTXQs):
++
++Provide a handler for drivers not having a custom wake_tx_queue
++callback and update the documentation.
++
++Signed-off-by: Alexander Wetzel <alexander@wetzel-home.de>
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++---
++
++--- a/include/net/mac80211.h
+++++ b/include/net/mac80211.h
++@@ -89,15 +89,13 @@
++ /**
++  * DOC: mac80211 software tx queueing
++  *
++- * mac80211 provides an optional intermediate queueing implementation designed
++- * to allow the driver to keep hardware queues short and provide some fairness
++- * between different stations/interfaces.
++- * In this model, the driver pulls data frames from the mac80211 queue instead
++- * of letting mac80211 push them via drv_tx().
++- * Other frames (e.g. control or management) are still pushed using drv_tx().
+++ * mac80211 uses an intermediate queueing implementation, designed to allow the
+++ * driver to keep hardware queues short and to provide some fairness between
+++ * different stations/interfaces.
++  *
++- * Drivers indicate that they use this model by implementing the .wake_tx_queue
++- * driver operation.
+++ * Drivers must provide the .wake_tx_queue driver operation by either
+++ * linking it to ieee80211_handle_wake_tx_queue() or implementing a custom
+++ * handler.
++  *
++  * Intermediate queues (struct ieee80211_txq) are kept per-sta per-tid, with
++  * another per-sta for non-data/non-mgmt and bufferable management frames, and
++@@ -106,9 +104,12 @@
++  * The driver is expected to initialize its private per-queue data for stations
++  * and interfaces in the .add_interface and .sta_add ops.
++  *
++- * The driver can't access the queue directly. To dequeue a frame from a
++- * txq, it calls ieee80211_tx_dequeue(). Whenever mac80211 adds a new frame to a
++- * queue, it calls the .wake_tx_queue driver op.
+++ * The driver can't access the internal TX queues (iTXQs) directly.
+++ * Whenever mac80211 adds a new frame to a queue, it calls the .wake_tx_queue
+++ * driver op.
+++ * Drivers implementing a custom .wake_tx_queue op can get them by calling
+++ * ieee80211_tx_dequeue(). Drivers using ieee80211_handle_wake_tx_queue() will
+++ * simply get the individual frames pushed via the .tx driver operation.
++  *
++  * Drivers can optionally delegate responsibility for scheduling queues to
++  * mac80211, to take advantage of airtime fairness accounting. In this case, to
++@@ -2248,8 +2249,8 @@ struct ieee80211_link_sta {
++  *	For non MLO STA it will point to the deflink data. For MLO STA
++  *	ieee80211_sta_recalc_aggregates() must be called to update it.
++  * @support_p2p_ps: indicates whether the STA supports P2P PS mechanism or not.
++- * @txq: per-TID data TX queues (if driver uses the TXQ abstraction); note that
++- *	the last entry (%IEEE80211_NUM_TIDS) is used for non-data frames
+++ * @txq: per-TID data TX queues; note that the last entry (%IEEE80211_NUM_TIDS)
+++ *	is used for non-data frames
++  * @deflink: This holds the default link STA information, for non MLO STA all link
++  *	specific STA information is accessed through @deflink or through
++  *	link[0] which points to address of @deflink. For MLO Link STA
++@@ -5687,7 +5688,7 @@ void ieee80211_key_replay(struct ieee802
++  * @hw: pointer as obtained from ieee80211_alloc_hw().
++  * @queue: queue number (counted from zero).
++  *
++- * Drivers should use this function instead of netif_wake_queue.
+++ * Drivers must use this function instead of netif_wake_queue.
++  */
++ void ieee80211_wake_queue(struct ieee80211_hw *hw, int queue);
++ 
++@@ -5696,7 +5697,7 @@ void ieee80211_wake_queue(struct ieee802
++  * @hw: pointer as obtained from ieee80211_alloc_hw().
++  * @queue: queue number (counted from zero).
++  *
++- * Drivers should use this function instead of netif_stop_queue.
+++ * Drivers must use this function instead of netif_stop_queue.
++  */
++ void ieee80211_stop_queue(struct ieee80211_hw *hw, int queue);
++ 
++@@ -5705,7 +5706,7 @@ void ieee80211_stop_queue(struct ieee802
++  * @hw: pointer as obtained from ieee80211_alloc_hw().
++  * @queue: queue number (counted from zero).
++  *
++- * Drivers should use this function instead of netif_stop_queue.
+++ * Drivers must use this function instead of netif_queue_stopped.
++  *
++  * Return: %true if the queue is stopped. %false otherwise.
++  */
++@@ -5716,7 +5717,7 @@ int ieee80211_queue_stopped(struct ieee8
++  * ieee80211_stop_queues - stop all queues
++  * @hw: pointer as obtained from ieee80211_alloc_hw().
++  *
++- * Drivers should use this function instead of netif_stop_queue.
+++ * Drivers must use this function instead of netif_tx_stop_all_queues.
++  */
++ void ieee80211_stop_queues(struct ieee80211_hw *hw);
++ 
++@@ -5724,7 +5725,7 @@ void ieee80211_stop_queues(struct ieee80
++  * ieee80211_wake_queues - wake all queues
++  * @hw: pointer as obtained from ieee80211_alloc_hw().
++  *
++- * Drivers should use this function instead of netif_wake_queue.
+++ * Drivers must use this function instead of netif_tx_wake_all_queues.
++  */
++ void ieee80211_wake_queues(struct ieee80211_hw *hw);
++ 
++@@ -6946,6 +6947,18 @@ static inline struct sk_buff *ieee80211_
++ }
++ 
++ /**
+++ * ieee80211_handle_wake_tx_queue - mac80211 handler for wake_tx_queue callback
+++ *
+++ * @hw: pointer as obtained from wake_tx_queue() callback().
+++ * @txq: pointer as obtained from wake_tx_queue() callback().
+++ *
+++ * Drivers can use this function for the mandatory mac80211 wake_tx_queue
+++ * callback in struct ieee80211_ops. They should not call this function.
+++ */
+++void ieee80211_handle_wake_tx_queue(struct ieee80211_hw *hw,
+++				    struct ieee80211_txq *txq);
+++
+++/**
++  * ieee80211_next_txq - get next tx queue to pull packets from
++  *
++  * @hw: pointer as obtained from ieee80211_alloc_hw()
++--- a/net/mac80211/util.c
+++++ b/net/mac80211/util.c
++@@ -288,6 +288,52 @@ __le16 ieee80211_ctstoself_duration(stru
++ }
++ EXPORT_SYMBOL(ieee80211_ctstoself_duration);
++ 
+++static void wake_tx_push_queue(struct ieee80211_local *local,
+++			       struct ieee80211_sub_if_data *sdata,
+++			       struct ieee80211_txq *queue)
+++{
+++	int q = sdata->vif.hw_queue[queue->ac];
+++	struct ieee80211_tx_control control = {
+++		.sta = queue->sta,
+++	};
+++	struct sk_buff *skb;
+++	unsigned long flags;
+++	bool q_stopped;
+++
+++	while (1) {
+++		spin_lock_irqsave(&local->queue_stop_reason_lock, flags);
+++		q_stopped = local->queue_stop_reasons[q];
+++		spin_unlock_irqrestore(&local->queue_stop_reason_lock, flags);
+++
+++		if (q_stopped)
+++			break;
+++
+++		skb = ieee80211_tx_dequeue(&local->hw, queue);
+++		if (!skb)
+++			break;
+++
+++		drv_tx(local, &control, skb);
+++	}
+++}
+++
+++/* wake_tx_queue handler for driver not implementing a custom one*/
+++void ieee80211_handle_wake_tx_queue(struct ieee80211_hw *hw,
+++				    struct ieee80211_txq *txq)
+++{
+++	struct ieee80211_local *local = hw_to_local(hw);
+++	struct ieee80211_sub_if_data *sdata = vif_to_sdata(txq->vif);
+++	struct ieee80211_txq *queue;
+++
+++	/* Use ieee80211_next_txq() for airtime fairness accounting */
+++	ieee80211_txq_schedule_start(hw, txq->ac);
+++	while ((queue = ieee80211_next_txq(hw, txq->ac))) {
+++		wake_tx_push_queue(local, sdata, queue);
+++		ieee80211_return_txq(hw, queue, false);
+++	}
+++	ieee80211_txq_schedule_end(hw, txq->ac);
+++}
+++EXPORT_SYMBOL(ieee80211_handle_wake_tx_queue);
+++
++ static void __ieee80211_wake_txqs(struct ieee80211_sub_if_data *sdata, int ac)
++ {
++ 	struct ieee80211_local *local = sdata->local;
+diff --git a/package/kernel/mac80211/patches/subsys/306-02-v6.2-wifi-mac80211-add-wake_tx_queue-callback-to-drivers.patch b/package/kernel/mac80211/patches/subsys/306-02-v6.2-wifi-mac80211-add-wake_tx_queue-callback-to-drivers.patch
+new file mode 100644
+index 0000000000..fee038d90c
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/306-02-v6.2-wifi-mac80211-add-wake_tx_queue-callback-to-drivers.patch
+@@ -0,0 +1,396 @@
++From: Alexander Wetzel <alexander@wetzel-home.de>
++Date: Sun, 9 Oct 2022 18:30:39 +0200
++Subject: [PATCH] wifi: mac80211: add wake_tx_queue callback to drivers
++
++mac80211 is fully switching over to the internal TX queue (iTXQ)
++implementation. Update all drivers not yet providing the now mandatory
++wake_tx_queue() callback.
++
++As an side effect the netdev interfaces of all updated drivers will
++switch to the noqueue qdisc.
++
++Signed-off-by: Alexander Wetzel <alexander@wetzel-home.de>
++[add staging drivers]
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++---
++
++--- a/drivers/net/wireless/admtek/adm8211.c
+++++ b/drivers/net/wireless/admtek/adm8211.c
++@@ -1760,6 +1760,7 @@ static int adm8211_alloc_rings(struct ie
++ 
++ static const struct ieee80211_ops adm8211_ops = {
++ 	.tx			= adm8211_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.start			= adm8211_start,
++ 	.stop			= adm8211_stop,
++ 	.add_interface		= adm8211_add_interface,
++--- a/drivers/net/wireless/ath/ar5523/ar5523.c
+++++ b/drivers/net/wireless/ath/ar5523/ar5523.c
++@@ -1361,6 +1361,7 @@ static const struct ieee80211_ops ar5523
++ 	.start			= ar5523_start,
++ 	.stop			= ar5523_stop,
++ 	.tx			= ar5523_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.set_rts_threshold	= ar5523_set_rts_threshold,
++ 	.add_interface		= ar5523_add_interface,
++ 	.remove_interface	= ar5523_remove_interface,
++--- a/drivers/net/wireless/ath/ath11k/mac.c
+++++ b/drivers/net/wireless/ath/ath11k/mac.c
++@@ -8587,6 +8587,7 @@ err_fallback:
++ 
++ static const struct ieee80211_ops ath11k_ops = {
++ 	.tx				= ath11k_mac_op_tx,
+++	.wake_tx_queue			= ieee80211_handle_wake_tx_queue,
++ 	.start                          = ath11k_mac_op_start,
++ 	.stop                           = ath11k_mac_op_stop,
++ 	.reconfig_complete              = ath11k_mac_op_reconfig_complete,
++--- a/drivers/net/wireless/ath/ath5k/mac80211-ops.c
+++++ b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
++@@ -781,6 +781,7 @@ static int ath5k_set_ringparam(struct ie
++ 
++ const struct ieee80211_ops ath5k_hw_ops = {
++ 	.tx			= ath5k_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.start			= ath5k_start,
++ 	.stop			= ath5k_stop,
++ 	.add_interface		= ath5k_add_interface,
++--- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
+++++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
++@@ -1870,6 +1870,7 @@ static void ath9k_htc_channel_switch_bea
++ 
++ struct ieee80211_ops ath9k_htc_ops = {
++ 	.tx                 = ath9k_htc_tx,
+++	.wake_tx_queue      = ieee80211_handle_wake_tx_queue,
++ 	.start              = ath9k_htc_start,
++ 	.stop               = ath9k_htc_stop,
++ 	.add_interface      = ath9k_htc_add_interface,
++--- a/drivers/net/wireless/ath/carl9170/main.c
+++++ b/drivers/net/wireless/ath/carl9170/main.c
++@@ -1715,6 +1715,7 @@ static const struct ieee80211_ops carl91
++ 	.start			= carl9170_op_start,
++ 	.stop			= carl9170_op_stop,
++ 	.tx			= carl9170_op_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.flush			= carl9170_op_flush,
++ 	.add_interface		= carl9170_op_add_interface,
++ 	.remove_interface	= carl9170_op_remove_interface,
++--- a/drivers/net/wireless/ath/wcn36xx/main.c
+++++ b/drivers/net/wireless/ath/wcn36xx/main.c
++@@ -1362,6 +1362,7 @@ static const struct ieee80211_ops wcn36x
++ 	.prepare_multicast	= wcn36xx_prepare_multicast,
++ 	.configure_filter       = wcn36xx_configure_filter,
++ 	.tx			= wcn36xx_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.set_key		= wcn36xx_set_key,
++ 	.hw_scan		= wcn36xx_hw_scan,
++ 	.cancel_hw_scan		= wcn36xx_cancel_hw_scan,
++--- a/drivers/net/wireless/atmel/at76c50x-usb.c
+++++ b/drivers/net/wireless/atmel/at76c50x-usb.c
++@@ -2187,6 +2187,7 @@ static int at76_set_key(struct ieee80211
++ 
++ static const struct ieee80211_ops at76_ops = {
++ 	.tx = at76_mac80211_tx,
+++	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
++ 	.add_interface = at76_add_interface,
++ 	.remove_interface = at76_remove_interface,
++ 	.config = at76_config,
++--- a/drivers/net/wireless/broadcom/b43/main.c
+++++ b/drivers/net/wireless/broadcom/b43/main.c
++@@ -5171,6 +5171,7 @@ static int b43_op_get_survey(struct ieee
++ 
++ static const struct ieee80211_ops b43_hw_ops = {
++ 	.tx			= b43_op_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.conf_tx		= b43_op_conf_tx,
++ 	.add_interface		= b43_op_add_interface,
++ 	.remove_interface	= b43_op_remove_interface,
++--- a/drivers/net/wireless/broadcom/b43legacy/main.c
+++++ b/drivers/net/wireless/broadcom/b43legacy/main.c
++@@ -3532,6 +3532,7 @@ static int b43legacy_op_get_survey(struc
++ 
++ static const struct ieee80211_ops b43legacy_hw_ops = {
++ 	.tx			= b43legacy_op_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.conf_tx		= b43legacy_op_conf_tx,
++ 	.add_interface		= b43legacy_op_add_interface,
++ 	.remove_interface	= b43legacy_op_remove_interface,
++--- a/drivers/net/wireless/broadcom/brcm80211/brcmsmac/mac80211_if.c
+++++ b/drivers/net/wireless/broadcom/brcm80211/brcmsmac/mac80211_if.c
++@@ -962,6 +962,7 @@ static int brcms_ops_beacon_set_tim(stru
++ 
++ static const struct ieee80211_ops brcms_ops = {
++ 	.tx = brcms_ops_tx,
+++	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
++ 	.start = brcms_ops_start,
++ 	.stop = brcms_ops_stop,
++ 	.add_interface = brcms_ops_add_interface,
++--- a/drivers/net/wireless/intel/iwlegacy/3945-mac.c
+++++ b/drivers/net/wireless/intel/iwlegacy/3945-mac.c
++@@ -3439,6 +3439,7 @@ static const struct attribute_group il39
++ 
++ static struct ieee80211_ops il3945_mac_ops __ro_after_init = {
++ 	.tx = il3945_mac_tx,
+++	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
++ 	.start = il3945_mac_start,
++ 	.stop = il3945_mac_stop,
++ 	.add_interface = il_mac_add_interface,
++--- a/drivers/net/wireless/intel/iwlegacy/4965-mac.c
+++++ b/drivers/net/wireless/intel/iwlegacy/4965-mac.c
++@@ -6308,6 +6308,7 @@ il4965_tx_queue_set_status(struct il_pri
++ 
++ static const struct ieee80211_ops il4965_mac_ops = {
++ 	.tx = il4965_mac_tx,
+++	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
++ 	.start = il4965_mac_start,
++ 	.stop = il4965_mac_stop,
++ 	.add_interface = il_mac_add_interface,
++--- a/drivers/net/wireless/intel/iwlwifi/dvm/mac80211.c
+++++ b/drivers/net/wireless/intel/iwlwifi/dvm/mac80211.c
++@@ -1571,6 +1571,7 @@ static void iwlagn_mac_sta_notify(struct
++ 
++ const struct ieee80211_ops iwlagn_hw_ops = {
++ 	.tx = iwlagn_mac_tx,
+++	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
++ 	.start = iwlagn_mac_start,
++ 	.stop = iwlagn_mac_stop,
++ #ifdef CONFIG_PM_SLEEP
++--- a/drivers/net/wireless/intersil/p54/main.c
+++++ b/drivers/net/wireless/intersil/p54/main.c
++@@ -705,6 +705,7 @@ static void p54_set_coverage_class(struc
++ 
++ static const struct ieee80211_ops p54_ops = {
++ 	.tx			= p54_tx_80211,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.start			= p54_start,
++ 	.stop			= p54_stop,
++ 	.add_interface		= p54_add_interface,
++--- a/drivers/net/wireless/mac80211_hwsim.c
+++++ b/drivers/net/wireless/mac80211_hwsim.c
++@@ -3109,6 +3109,7 @@ static int mac80211_hwsim_change_sta_lin
++ 
++ #define HWSIM_COMMON_OPS					\
++ 	.tx = mac80211_hwsim_tx,				\
+++	.wake_tx_queue = ieee80211_handle_wake_tx_queue,	\
++ 	.start = mac80211_hwsim_start,				\
++ 	.stop = mac80211_hwsim_stop,				\
++ 	.add_interface = mac80211_hwsim_add_interface,		\
++--- a/drivers/net/wireless/marvell/libertas_tf/main.c
+++++ b/drivers/net/wireless/marvell/libertas_tf/main.c
++@@ -474,6 +474,7 @@ static int lbtf_op_get_survey(struct iee
++ 
++ static const struct ieee80211_ops lbtf_ops = {
++ 	.tx			= lbtf_op_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.start			= lbtf_op_start,
++ 	.stop			= lbtf_op_stop,
++ 	.add_interface		= lbtf_op_add_interface,
++--- a/drivers/net/wireless/marvell/mwl8k.c
+++++ b/drivers/net/wireless/marvell/mwl8k.c
++@@ -5611,6 +5611,7 @@ static void mwl8k_sw_scan_complete(struc
++ 
++ static const struct ieee80211_ops mwl8k_ops = {
++ 	.tx			= mwl8k_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.start			= mwl8k_start,
++ 	.stop			= mwl8k_stop,
++ 	.add_interface		= mwl8k_add_interface,
++--- a/drivers/net/wireless/mediatek/mt7601u/main.c
+++++ b/drivers/net/wireless/mediatek/mt7601u/main.c
++@@ -406,6 +406,7 @@ out:
++ 
++ const struct ieee80211_ops mt7601u_ops = {
++ 	.tx = mt7601u_tx,
+++	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
++ 	.start = mt7601u_start,
++ 	.stop = mt7601u_stop,
++ 	.add_interface = mt7601u_add_interface,
++--- a/drivers/net/wireless/ralink/rt2x00/rt2400pci.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2400pci.c
++@@ -1706,6 +1706,7 @@ static int rt2400pci_tx_last_beacon(stru
++ 
++ static const struct ieee80211_ops rt2400pci_mac80211_ops = {
++ 	.tx			= rt2x00mac_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.start			= rt2x00mac_start,
++ 	.stop			= rt2x00mac_stop,
++ 	.add_interface		= rt2x00mac_add_interface,
++--- a/drivers/net/wireless/ralink/rt2x00/rt2500pci.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2500pci.c
++@@ -2004,6 +2004,7 @@ static int rt2500pci_tx_last_beacon(stru
++ 
++ static const struct ieee80211_ops rt2500pci_mac80211_ops = {
++ 	.tx			= rt2x00mac_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.start			= rt2x00mac_start,
++ 	.stop			= rt2x00mac_stop,
++ 	.add_interface		= rt2x00mac_add_interface,
++--- a/drivers/net/wireless/ralink/rt2x00/rt2500usb.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2500usb.c
++@@ -1795,6 +1795,7 @@ static int rt2500usb_probe_hw(struct rt2
++ 
++ static const struct ieee80211_ops rt2500usb_mac80211_ops = {
++ 	.tx			= rt2x00mac_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.start			= rt2x00mac_start,
++ 	.stop			= rt2x00mac_stop,
++ 	.add_interface		= rt2x00mac_add_interface,
++--- a/drivers/net/wireless/ralink/rt2x00/rt2800pci.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2800pci.c
++@@ -288,6 +288,7 @@ static int rt2800pci_read_eeprom(struct
++ 
++ static const struct ieee80211_ops rt2800pci_mac80211_ops = {
++ 	.tx			= rt2x00mac_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.start			= rt2x00mac_start,
++ 	.stop			= rt2x00mac_stop,
++ 	.add_interface		= rt2x00mac_add_interface,
++--- a/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
++@@ -133,6 +133,7 @@ static int rt2800soc_write_firmware(stru
++ 
++ static const struct ieee80211_ops rt2800soc_mac80211_ops = {
++ 	.tx			= rt2x00mac_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.start			= rt2x00mac_start,
++ 	.stop			= rt2x00mac_stop,
++ 	.add_interface		= rt2x00mac_add_interface,
++--- a/drivers/net/wireless/ralink/rt2x00/rt2800usb.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt2800usb.c
++@@ -630,6 +630,7 @@ static int rt2800usb_probe_hw(struct rt2
++ 
++ static const struct ieee80211_ops rt2800usb_mac80211_ops = {
++ 	.tx			= rt2x00mac_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.start			= rt2x00mac_start,
++ 	.stop			= rt2x00mac_stop,
++ 	.add_interface		= rt2x00mac_add_interface,
++--- a/drivers/net/wireless/ralink/rt2x00/rt61pci.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt61pci.c
++@@ -2873,6 +2873,7 @@ static u64 rt61pci_get_tsf(struct ieee80
++ 
++ static const struct ieee80211_ops rt61pci_mac80211_ops = {
++ 	.tx			= rt2x00mac_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.start			= rt2x00mac_start,
++ 	.stop			= rt2x00mac_stop,
++ 	.add_interface		= rt2x00mac_add_interface,
++--- a/drivers/net/wireless/ralink/rt2x00/rt73usb.c
+++++ b/drivers/net/wireless/ralink/rt2x00/rt73usb.c
++@@ -2292,6 +2292,7 @@ static u64 rt73usb_get_tsf(struct ieee80
++ 
++ static const struct ieee80211_ops rt73usb_mac80211_ops = {
++ 	.tx			= rt2x00mac_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.start			= rt2x00mac_start,
++ 	.stop			= rt2x00mac_stop,
++ 	.add_interface		= rt2x00mac_add_interface,
++--- a/drivers/net/wireless/realtek/rtl818x/rtl8180/dev.c
+++++ b/drivers/net/wireless/realtek/rtl818x/rtl8180/dev.c
++@@ -1608,6 +1608,7 @@ static void rtl8180_configure_filter(str
++ 
++ static const struct ieee80211_ops rtl8180_ops = {
++ 	.tx			= rtl8180_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.start			= rtl8180_start,
++ 	.stop			= rtl8180_stop,
++ 	.add_interface		= rtl8180_add_interface,
++--- a/drivers/net/wireless/realtek/rtl818x/rtl8187/dev.c
+++++ b/drivers/net/wireless/realtek/rtl818x/rtl8187/dev.c
++@@ -1378,6 +1378,7 @@ static int rtl8187_conf_tx(struct ieee80
++ 
++ static const struct ieee80211_ops rtl8187_ops = {
++ 	.tx			= rtl8187_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.start			= rtl8187_start,
++ 	.stop			= rtl8187_stop,
++ 	.add_interface		= rtl8187_add_interface,
++--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
+++++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
++@@ -6548,6 +6548,7 @@ static void rtl8xxxu_stop(struct ieee802
++ 
++ static const struct ieee80211_ops rtl8xxxu_ops = {
++ 	.tx = rtl8xxxu_tx,
+++	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
++ 	.add_interface = rtl8xxxu_add_interface,
++ 	.remove_interface = rtl8xxxu_remove_interface,
++ 	.config = rtl8xxxu_config,
++--- a/drivers/net/wireless/realtek/rtlwifi/core.c
+++++ b/drivers/net/wireless/realtek/rtlwifi/core.c
++@@ -1912,6 +1912,7 @@ const struct ieee80211_ops rtl_ops = {
++ 	.start = rtl_op_start,
++ 	.stop = rtl_op_stop,
++ 	.tx = rtl_op_tx,
+++	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
++ 	.add_interface = rtl_op_add_interface,
++ 	.remove_interface = rtl_op_remove_interface,
++ 	.change_interface = rtl_op_change_interface,
++--- a/drivers/net/wireless/realtek/rtw88/mac80211.c
+++++ b/drivers/net/wireless/realtek/rtw88/mac80211.c
++@@ -896,6 +896,7 @@ static void rtw_ops_sta_rc_update(struct
++ 
++ const struct ieee80211_ops rtw_ops = {
++ 	.tx			= rtw_ops_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.wake_tx_queue		= rtw_ops_wake_tx_queue,
++ 	.start			= rtw_ops_start,
++ 	.stop			= rtw_ops_stop,
++--- a/drivers/net/wireless/realtek/rtw89/mac80211.c
+++++ b/drivers/net/wireless/realtek/rtw89/mac80211.c
++@@ -918,6 +918,7 @@ static int rtw89_ops_set_tid_config(stru
++ 
++ const struct ieee80211_ops rtw89_ops = {
++ 	.tx			= rtw89_ops_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.wake_tx_queue		= rtw89_ops_wake_tx_queue,
++ 	.start			= rtw89_ops_start,
++ 	.stop			= rtw89_ops_stop,
++--- a/drivers/net/wireless/rsi/rsi_91x_mac80211.c
+++++ b/drivers/net/wireless/rsi/rsi_91x_mac80211.c
++@@ -1958,6 +1958,7 @@ static int rsi_mac80211_resume(struct ie
++ 
++ static const struct ieee80211_ops mac80211_ops = {
++ 	.tx = rsi_mac80211_tx,
+++	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
++ 	.start = rsi_mac80211_start,
++ 	.stop = rsi_mac80211_stop,
++ 	.add_interface = rsi_mac80211_add_interface,
++--- a/drivers/net/wireless/st/cw1200/main.c
+++++ b/drivers/net/wireless/st/cw1200/main.c
++@@ -209,6 +209,7 @@ static const struct ieee80211_ops cw1200
++ 	.remove_interface	= cw1200_remove_interface,
++ 	.change_interface	= cw1200_change_interface,
++ 	.tx			= cw1200_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.hw_scan		= cw1200_hw_scan,
++ 	.set_tim		= cw1200_set_tim,
++ 	.sta_notify		= cw1200_sta_notify,
++--- a/drivers/net/wireless/ti/wl1251/main.c
+++++ b/drivers/net/wireless/ti/wl1251/main.c
++@@ -1359,6 +1359,7 @@ static const struct ieee80211_ops wl1251
++ 	.prepare_multicast = wl1251_op_prepare_multicast,
++ 	.configure_filter = wl1251_op_configure_filter,
++ 	.tx = wl1251_op_tx,
+++	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
++ 	.set_key = wl1251_op_set_key,
++ 	.hw_scan = wl1251_op_hw_scan,
++ 	.bss_info_changed = wl1251_op_bss_info_changed,
++--- a/drivers/net/wireless/ti/wlcore/main.c
+++++ b/drivers/net/wireless/ti/wlcore/main.c
++@@ -5942,6 +5942,7 @@ static const struct ieee80211_ops wl1271
++ 	.prepare_multicast = wl1271_op_prepare_multicast,
++ 	.configure_filter = wl1271_op_configure_filter,
++ 	.tx = wl1271_op_tx,
+++	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
++ 	.set_key = wlcore_op_set_key,
++ 	.hw_scan = wl1271_op_hw_scan,
++ 	.cancel_hw_scan = wl1271_op_cancel_hw_scan,
++--- a/drivers/net/wireless/zydas/zd1211rw/zd_mac.c
+++++ b/drivers/net/wireless/zydas/zd1211rw/zd_mac.c
++@@ -1344,6 +1344,7 @@ static u64 zd_op_get_tsf(struct ieee8021
++ 
++ static const struct ieee80211_ops zd_ops = {
++ 	.tx			= zd_op_tx,
+++	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.start			= zd_op_start,
++ 	.stop			= zd_op_stop,
++ 	.add_interface		= zd_op_add_interface,
+diff --git a/package/kernel/mac80211/patches/subsys/306-03-v6.2-wifi-mac80211-Drop-support-for-TX-push-path.patch b/package/kernel/mac80211/patches/subsys/306-03-v6.2-wifi-mac80211-Drop-support-for-TX-push-path.patch
+new file mode 100644
+index 0000000000..f9f9977cee
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/306-03-v6.2-wifi-mac80211-Drop-support-for-TX-push-path.patch
+@@ -0,0 +1,683 @@
++From: Alexander Wetzel <alexander@wetzel-home.de>
++Date: Sun, 9 Oct 2022 18:30:40 +0200
++Subject: [PATCH] wifi: mac80211: Drop support for TX push path
++
++All drivers are now using mac80211 internal queues (iTXQs).
++Drop mac80211 internal support for the old push path.
++
++Signed-off-by: Alexander Wetzel <alexander@wetzel-home.de>
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++---
++
++--- a/net/mac80211/cfg.c
+++++ b/net/mac80211/cfg.c
++@@ -4346,9 +4346,6 @@ static int ieee80211_get_txq_stats(struc
++ 	struct ieee80211_sub_if_data *sdata;
++ 	int ret = 0;
++ 
++-	if (!local->ops->wake_tx_queue)
++-		return 1;
++-
++ 	spin_lock_bh(&local->fq.lock);
++ 	rcu_read_lock();
++ 
++--- a/net/mac80211/debugfs.c
+++++ b/net/mac80211/debugfs.c
++@@ -663,9 +663,7 @@ void debugfs_hw_add(struct ieee80211_loc
++ 	DEBUGFS_ADD_MODE(force_tx_status, 0600);
++ 	DEBUGFS_ADD_MODE(aql_enable, 0600);
++ 	DEBUGFS_ADD(aql_pending);
++-
++-	if (local->ops->wake_tx_queue)
++-		DEBUGFS_ADD_MODE(aqm, 0600);
+++	DEBUGFS_ADD_MODE(aqm, 0600);
++ 
++ 	DEBUGFS_ADD_MODE(airtime_flags, 0600);
++ 
++--- a/net/mac80211/debugfs_netdev.c
+++++ b/net/mac80211/debugfs_netdev.c
++@@ -677,8 +677,7 @@ static void add_common_files(struct ieee
++ 	DEBUGFS_ADD(rc_rateidx_vht_mcs_mask_5ghz);
++ 	DEBUGFS_ADD(hw_queues);
++ 
++-	if (sdata->local->ops->wake_tx_queue &&
++-	    sdata->vif.type != NL80211_IFTYPE_P2P_DEVICE &&
+++	if (sdata->vif.type != NL80211_IFTYPE_P2P_DEVICE &&
++ 	    sdata->vif.type != NL80211_IFTYPE_NAN)
++ 		DEBUGFS_ADD(aqm);
++ }
++--- a/net/mac80211/debugfs_sta.c
+++++ b/net/mac80211/debugfs_sta.c
++@@ -1057,10 +1057,8 @@ void ieee80211_sta_debugfs_add(struct st
++ 	DEBUGFS_ADD_COUNTER(rx_fragments, deflink.rx_stats.fragments);
++ 	DEBUGFS_ADD_COUNTER(tx_filtered, deflink.status_stats.filtered);
++ 
++-	if (local->ops->wake_tx_queue) {
++-		DEBUGFS_ADD(aqm);
++-		DEBUGFS_ADD(airtime);
++-	}
+++	DEBUGFS_ADD(aqm);
+++	DEBUGFS_ADD(airtime);
++ 
++ 	if (wiphy_ext_feature_isset(local->hw.wiphy,
++ 				    NL80211_EXT_FEATURE_AQL))
++--- a/net/mac80211/ieee80211_i.h
+++++ b/net/mac80211/ieee80211_i.h
++@@ -2294,7 +2294,6 @@ void ieee80211_wake_queue_by_reason(stru
++ void ieee80211_stop_queue_by_reason(struct ieee80211_hw *hw, int queue,
++ 				    enum queue_stop_reason reason,
++ 				    bool refcounted);
++-void ieee80211_propagate_queue_wake(struct ieee80211_local *local, int queue);
++ void ieee80211_add_pending_skb(struct ieee80211_local *local,
++ 			       struct sk_buff *skb);
++ void ieee80211_add_pending_skbs(struct ieee80211_local *local,
++--- a/net/mac80211/iface.c
+++++ b/net/mac80211/iface.c
++@@ -460,12 +460,6 @@ static void ieee80211_do_stop(struct iee
++ 	if (cancel_scan)
++ 		ieee80211_scan_cancel(local);
++ 
++-	/*
++-	 * Stop TX on this interface first.
++-	 */
++-	if (!local->ops->wake_tx_queue && sdata->dev)
++-		netif_tx_stop_all_queues(sdata->dev);
++-
++ 	ieee80211_roc_purge(local, sdata);
++ 
++ 	switch (sdata->vif.type) {
++@@ -813,13 +807,6 @@ static void ieee80211_uninit(struct net_
++ 	ieee80211_teardown_sdata(IEEE80211_DEV_TO_SUB_IF(dev));
++ }
++ 
++-static u16 ieee80211_netdev_select_queue(struct net_device *dev,
++-					 struct sk_buff *skb,
++-					 struct net_device *sb_dev)
++-{
++-	return ieee80211_select_queue(IEEE80211_DEV_TO_SUB_IF(dev), skb);
++-}
++-
++ static void
++ ieee80211_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
++ {
++@@ -833,7 +820,6 @@ static const struct net_device_ops ieee8
++ 	.ndo_start_xmit		= ieee80211_subif_start_xmit,
++ 	.ndo_set_rx_mode	= ieee80211_set_multicast_list,
++ 	.ndo_set_mac_address 	= ieee80211_change_mac,
++-	.ndo_select_queue	= ieee80211_netdev_select_queue,
++ 	.ndo_get_stats64	= ieee80211_get_stats64,
++ };
++ 
++@@ -941,7 +927,6 @@ static const struct net_device_ops ieee8
++ 	.ndo_start_xmit		= ieee80211_subif_start_xmit_8023,
++ 	.ndo_set_rx_mode	= ieee80211_set_multicast_list,
++ 	.ndo_set_mac_address	= ieee80211_change_mac,
++-	.ndo_select_queue	= ieee80211_netdev_select_queue,
++ 	.ndo_get_stats64	= ieee80211_get_stats64,
++ 	.ndo_fill_forward_path	= ieee80211_netdev_fill_forward_path,
++ };
++@@ -1443,35 +1428,6 @@ int ieee80211_do_open(struct wireless_de
++ 
++ 	ieee80211_recalc_ps(local);
++ 
++-	if (sdata->vif.type == NL80211_IFTYPE_MONITOR ||
++-	    sdata->vif.type == NL80211_IFTYPE_AP_VLAN ||
++-	    local->ops->wake_tx_queue) {
++-		/* XXX: for AP_VLAN, actually track AP queues */
++-		if (dev)
++-			netif_tx_start_all_queues(dev);
++-	} else if (dev) {
++-		unsigned long flags;
++-		int n_acs = IEEE80211_NUM_ACS;
++-		int ac;
++-
++-		if (local->hw.queues < IEEE80211_NUM_ACS)
++-			n_acs = 1;
++-
++-		spin_lock_irqsave(&local->queue_stop_reason_lock, flags);
++-		if (sdata->vif.cab_queue == IEEE80211_INVAL_HW_QUEUE ||
++-		    (local->queue_stop_reasons[sdata->vif.cab_queue] == 0 &&
++-		     skb_queue_empty(&local->pending[sdata->vif.cab_queue]))) {
++-			for (ac = 0; ac < n_acs; ac++) {
++-				int ac_queue = sdata->vif.hw_queue[ac];
++-
++-				if (local->queue_stop_reasons[ac_queue] == 0 &&
++-				    skb_queue_empty(&local->pending[ac_queue]))
++-					netif_start_subqueue(dev, ac);
++-			}
++-		}
++-		spin_unlock_irqrestore(&local->queue_stop_reason_lock, flags);
++-	}
++-
++ 	set_bit(SDATA_STATE_RUNNING, &sdata->state);
++ 
++ 	return 0;
++@@ -1501,17 +1457,12 @@ static void ieee80211_if_setup(struct ne
++ {
++ 	ether_setup(dev);
++ 	dev->priv_flags &= ~IFF_TX_SKB_SHARING;
+++	dev->priv_flags |= IFF_NO_QUEUE;
++ 	dev->netdev_ops = &ieee80211_dataif_ops;
++ 	dev->needs_free_netdev = true;
++ 	dev->priv_destructor = ieee80211_if_free;
++ }
++ 
++-static void ieee80211_if_setup_no_queue(struct net_device *dev)
++-{
++-	ieee80211_if_setup(dev);
++-	dev->priv_flags |= IFF_NO_QUEUE;
++-}
++-
++ static void ieee80211_iface_process_skb(struct ieee80211_local *local,
++ 					struct ieee80211_sub_if_data *sdata,
++ 					struct sk_buff *skb)
++@@ -2096,9 +2047,7 @@ int ieee80211_if_add(struct ieee80211_lo
++ 	struct net_device *ndev = NULL;
++ 	struct ieee80211_sub_if_data *sdata = NULL;
++ 	struct txq_info *txqi;
++-	void (*if_setup)(struct net_device *dev);
++ 	int ret, i;
++-	int txqs = 1;
++ 
++ 	ASSERT_RTNL();
++ 
++@@ -2121,30 +2070,18 @@ int ieee80211_if_add(struct ieee80211_lo
++ 				 sizeof(void *));
++ 		int txq_size = 0;
++ 
++-		if (local->ops->wake_tx_queue &&
++-		    type != NL80211_IFTYPE_AP_VLAN &&
+++		if (type != NL80211_IFTYPE_AP_VLAN &&
++ 		    (type != NL80211_IFTYPE_MONITOR ||
++ 		     (params->flags & MONITOR_FLAG_ACTIVE)))
++ 			txq_size += sizeof(struct txq_info) +
++ 				    local->hw.txq_data_size;
++ 
++-		if (local->ops->wake_tx_queue) {
++-			if_setup = ieee80211_if_setup_no_queue;
++-		} else {
++-			if_setup = ieee80211_if_setup;
++-			if (local->hw.queues >= IEEE80211_NUM_ACS)
++-				txqs = IEEE80211_NUM_ACS;
++-		}
++-
++ 		ndev = alloc_netdev_mqs(size + txq_size,
++ 					name, name_assign_type,
++-					if_setup, txqs, 1);
+++					ieee80211_if_setup, 1, 1);
++ 		if (!ndev)
++ 			return -ENOMEM;
++ 
++-		if (!local->ops->wake_tx_queue && local->hw.wiphy->tx_queue_len)
++-			ndev->tx_queue_len = local->hw.wiphy->tx_queue_len;
++-
++ 		dev_net_set(ndev, wiphy_net(local->hw.wiphy));
++ 
++ 		ndev->tstats = netdev_alloc_pcpu_stats(struct pcpu_sw_netstats);
++--- a/net/mac80211/main.c
+++++ b/net/mac80211/main.c
++@@ -630,7 +630,7 @@ struct ieee80211_hw *ieee80211_alloc_hw_
++ 
++ 	if (WARN_ON(!ops->tx || !ops->start || !ops->stop || !ops->config ||
++ 		    !ops->add_interface || !ops->remove_interface ||
++-		    !ops->configure_filter))
+++		    !ops->configure_filter || !ops->wake_tx_queue))
++ 		return NULL;
++ 
++ 	if (WARN_ON(ops->sta_state && (ops->sta_add || ops->sta_remove)))
++@@ -719,9 +719,7 @@ struct ieee80211_hw *ieee80211_alloc_hw_
++ 	if (!ops->set_key)
++ 		wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
++ 
++-	if (ops->wake_tx_queue)
++-		wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_TXQS);
++-
+++	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_TXQS);
++ 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_RRM);
++ 
++ 	wiphy->bss_priv_size = sizeof(struct ieee80211_bss);
++@@ -834,10 +832,7 @@ struct ieee80211_hw *ieee80211_alloc_hw_
++ 		atomic_set(&local->agg_queue_stop[i], 0);
++ 	}
++ 	tasklet_setup(&local->tx_pending_tasklet, ieee80211_tx_pending);
++-
++-	if (ops->wake_tx_queue)
++-		tasklet_setup(&local->wake_txqs_tasklet, ieee80211_wake_txqs);
++-
+++	tasklet_setup(&local->wake_txqs_tasklet, ieee80211_wake_txqs);
++ 	tasklet_setup(&local->tasklet, ieee80211_tasklet_handler);
++ 
++ 	skb_queue_head_init(&local->skb_queue);
++--- a/net/mac80211/rx.c
+++++ b/net/mac80211/rx.c
++@@ -1571,9 +1571,6 @@ static void sta_ps_start(struct sta_info
++ 
++ 	ieee80211_clear_fast_xmit(sta);
++ 
++-	if (!sta->sta.txq[0])
++-		return;
++-
++ 	for (tid = 0; tid < IEEE80211_NUM_TIDS; tid++) {
++ 		struct ieee80211_txq *txq = sta->sta.txq[tid];
++ 		struct txq_info *txqi = to_txq_info(txq);
++--- a/net/mac80211/sta_info.c
+++++ b/net/mac80211/sta_info.c
++@@ -140,17 +140,15 @@ static void __cleanup_single_sta(struct
++ 		atomic_dec(&ps->num_sta_ps);
++ 	}
++ 
++-	if (sta->sta.txq[0]) {
++-		for (i = 0; i < ARRAY_SIZE(sta->sta.txq); i++) {
++-			struct txq_info *txqi;
+++	for (i = 0; i < ARRAY_SIZE(sta->sta.txq); i++) {
+++		struct txq_info *txqi;
++ 
++-			if (!sta->sta.txq[i])
++-				continue;
+++		if (!sta->sta.txq[i])
+++			continue;
++ 
++-			txqi = to_txq_info(sta->sta.txq[i]);
+++		txqi = to_txq_info(sta->sta.txq[i]);
++ 
++-			ieee80211_txq_purge(local, txqi);
++-		}
+++		ieee80211_txq_purge(local, txqi);
++ 	}
++ 
++ 	for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
++@@ -425,8 +423,7 @@ void sta_info_free(struct ieee80211_loca
++ 
++ 	sta_dbg(sta->sdata, "Destroyed STA %pM\n", sta->sta.addr);
++ 
++-	if (sta->sta.txq[0])
++-		kfree(to_txq_info(sta->sta.txq[0]));
+++	kfree(to_txq_info(sta->sta.txq[0]));
++ 	kfree(rcu_dereference_raw(sta->sta.rates));
++ #ifdef CPTCFG_MAC80211_MESH
++ 	kfree(sta->mesh);
++@@ -527,6 +524,8 @@ __sta_info_alloc(struct ieee80211_sub_if
++ 	struct ieee80211_local *local = sdata->local;
++ 	struct ieee80211_hw *hw = &local->hw;
++ 	struct sta_info *sta;
+++	void *txq_data;
+++	int size;
++ 	int i;
++ 
++ 	sta = kzalloc(sizeof(*sta) + hw->sta_data_size, gfp);
++@@ -597,21 +596,18 @@ __sta_info_alloc(struct ieee80211_sub_if
++ 
++ 	sta->last_connected = ktime_get_seconds();
++ 
++-	if (local->ops->wake_tx_queue) {
++-		void *txq_data;
++-		int size = sizeof(struct txq_info) +
++-			   ALIGN(hw->txq_data_size, sizeof(void *));
+++	size = sizeof(struct txq_info) +
+++	       ALIGN(hw->txq_data_size, sizeof(void *));
++ 
++-		txq_data = kcalloc(ARRAY_SIZE(sta->sta.txq), size, gfp);
++-		if (!txq_data)
++-			goto free;
+++	txq_data = kcalloc(ARRAY_SIZE(sta->sta.txq), size, gfp);
+++	if (!txq_data)
+++		goto free;
++ 
++-		for (i = 0; i < ARRAY_SIZE(sta->sta.txq); i++) {
++-			struct txq_info *txq = txq_data + i * size;
+++	for (i = 0; i < ARRAY_SIZE(sta->sta.txq); i++) {
+++		struct txq_info *txq = txq_data + i * size;
++ 
++-			/* might not do anything for the bufferable MMPDU TXQ */
++-			ieee80211_txq_init(sdata, sta, txq, i);
++-		}
+++		/* might not do anything for the (bufferable) MMPDU TXQ */
+++		ieee80211_txq_init(sdata, sta, txq, i);
++ 	}
++ 
++ 	if (sta_prepare_rate_control(local, sta, gfp))
++@@ -685,8 +681,7 @@ __sta_info_alloc(struct ieee80211_sub_if
++ 	return sta;
++ 
++ free_txq:
++-	if (sta->sta.txq[0])
++-		kfree(to_txq_info(sta->sta.txq[0]));
+++	kfree(to_txq_info(sta->sta.txq[0]));
++ free:
++ 	sta_info_free_link(&sta->deflink);
++ #ifdef CPTCFG_MAC80211_MESH
++@@ -1960,9 +1955,6 @@ ieee80211_sta_ps_deliver_response(struct
++ 		 * TIM recalculation.
++ 		 */
++ 
++-		if (!sta->sta.txq[0])
++-			return;
++-
++ 		for (tid = 0; tid < ARRAY_SIZE(sta->sta.txq); tid++) {
++ 			if (!sta->sta.txq[tid] ||
++ 			    !(driver_release_tids & BIT(tid)) ||
++@@ -2447,7 +2439,7 @@ static void sta_set_tidstats(struct sta_
++ 		tidstats->tx_msdu_failed = sta->deflink.status_stats.msdu_failed[tid];
++ 	}
++ 
++-	if (local->ops->wake_tx_queue && tid < IEEE80211_NUM_TIDS) {
+++	if (tid < IEEE80211_NUM_TIDS) {
++ 		spin_lock_bh(&local->fq.lock);
++ 		rcu_read_lock();
++ 
++@@ -2775,9 +2767,6 @@ unsigned long ieee80211_sta_last_active(
++ 
++ static void sta_update_codel_params(struct sta_info *sta, u32 thr)
++ {
++-	if (!sta->sdata->local->ops->wake_tx_queue)
++-		return;
++-
++ 	if (thr && thr < STA_SLOW_THRESHOLD * sta->local->num_sta) {
++ 		sta->cparams.target = MS2TIME(50);
++ 		sta->cparams.interval = MS2TIME(300);
++--- a/net/mac80211/tdls.c
+++++ b/net/mac80211/tdls.c
++@@ -1016,7 +1016,6 @@ ieee80211_tdls_prep_mgmt_packet(struct w
++ 		skb->priority = 256 + 5;
++ 		break;
++ 	}
++-	skb_set_queue_mapping(skb, ieee80211_select_queue(sdata, skb));
++ 
++ 	/*
++ 	 * Set the WLAN_TDLS_TEARDOWN flag to indicate a teardown in progress.
++--- a/net/mac80211/tx.c
+++++ b/net/mac80211/tx.c
++@@ -1600,9 +1600,6 @@ int ieee80211_txq_setup_flows(struct iee
++ 	bool supp_vht = false;
++ 	enum nl80211_band band;
++ 
++-	if (!local->ops->wake_tx_queue)
++-		return 0;
++-
++ 	ret = fq_init(fq, 4096);
++ 	if (ret)
++ 		return ret;
++@@ -1650,9 +1647,6 @@ void ieee80211_txq_teardown_flows(struct
++ {
++ 	struct fq *fq = &local->fq;
++ 
++-	if (!local->ops->wake_tx_queue)
++-		return;
++-
++ 	kfree(local->cvars);
++ 	local->cvars = NULL;
++ 
++@@ -1669,8 +1663,7 @@ static bool ieee80211_queue_skb(struct i
++ 	struct ieee80211_vif *vif;
++ 	struct txq_info *txqi;
++ 
++-	if (!local->ops->wake_tx_queue ||
++-	    sdata->vif.type == NL80211_IFTYPE_MONITOR)
+++	if (sdata->vif.type == NL80211_IFTYPE_MONITOR)
++ 		return false;
++ 
++ 	if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
++@@ -4193,12 +4186,7 @@ void __ieee80211_subif_start_xmit(struct
++ 	if (IS_ERR(sta))
++ 		sta = NULL;
++ 
++-	if (local->ops->wake_tx_queue) {
++-		u16 queue = __ieee80211_select_queue(sdata, sta, skb);
++-		skb_set_queue_mapping(skb, queue);
++-		skb_get_hash(skb);
++-	}
++-
+++	skb_set_queue_mapping(skb, ieee80211_select_queue(sdata, sta, skb));
++ 	ieee80211_aggr_check(sdata, sta, skb);
++ 
++ 	sk_pacing_shift_update(skb->sk, sdata->local->hw.tx_sk_pacing_shift);
++@@ -4509,11 +4497,7 @@ static void ieee80211_8023_xmit(struct i
++ 	struct tid_ampdu_tx *tid_tx;
++ 	u8 tid;
++ 
++-	if (local->ops->wake_tx_queue) {
++-		u16 queue = __ieee80211_select_queue(sdata, sta, skb);
++-		skb_set_queue_mapping(skb, queue);
++-		skb_get_hash(skb);
++-	}
+++	skb_set_queue_mapping(skb, ieee80211_select_queue(sdata, sta, skb));
++ 
++ 	if (unlikely(test_bit(SCAN_SW_SCANNING, &local->scanning)) &&
++ 	    test_bit(SDATA_STATE_OFFCHANNEL, &sdata->state))
++@@ -4767,9 +4751,6 @@ void ieee80211_tx_pending(struct tasklet
++ 			if (!txok)
++ 				break;
++ 		}
++-
++-		if (skb_queue_empty(&local->pending[i]))
++-			ieee80211_propagate_queue_wake(local, i);
++ 	}
++ 	spin_unlock_irqrestore(&local->queue_stop_reason_lock, flags);
++ 
++@@ -5962,10 +5943,9 @@ int ieee80211_tx_control_port(struct wip
++ 	}
++ 
++ 	if (!IS_ERR(sta)) {
++-		u16 queue = __ieee80211_select_queue(sdata, sta, skb);
+++		u16 queue = ieee80211_select_queue(sdata, sta, skb);
++ 
++ 		skb_set_queue_mapping(skb, queue);
++-		skb_get_hash(skb);
++ 
++ 		/*
++ 		 * for MLO STA, the SA should be the AP MLD address, but
++--- a/net/mac80211/util.c
+++++ b/net/mac80211/util.c
++@@ -444,39 +444,6 @@ void ieee80211_wake_txqs(struct tasklet_
++ 	spin_unlock_irqrestore(&local->queue_stop_reason_lock, flags);
++ }
++ 
++-void ieee80211_propagate_queue_wake(struct ieee80211_local *local, int queue)
++-{
++-	struct ieee80211_sub_if_data *sdata;
++-	int n_acs = IEEE80211_NUM_ACS;
++-
++-	if (local->ops->wake_tx_queue)
++-		return;
++-
++-	if (local->hw.queues < IEEE80211_NUM_ACS)
++-		n_acs = 1;
++-
++-	list_for_each_entry_rcu(sdata, &local->interfaces, list) {
++-		int ac;
++-
++-		if (!sdata->dev)
++-			continue;
++-
++-		if (sdata->vif.cab_queue != IEEE80211_INVAL_HW_QUEUE &&
++-		    local->queue_stop_reasons[sdata->vif.cab_queue] != 0)
++-			continue;
++-
++-		for (ac = 0; ac < n_acs; ac++) {
++-			int ac_queue = sdata->vif.hw_queue[ac];
++-
++-			if (ac_queue == queue ||
++-			    (sdata->vif.cab_queue == queue &&
++-			     local->queue_stop_reasons[ac_queue] == 0 &&
++-			     skb_queue_empty(&local->pending[ac_queue])))
++-				netif_wake_subqueue(sdata->dev, ac);
++-		}
++-	}
++-}
++-
++ static void __ieee80211_wake_queue(struct ieee80211_hw *hw, int queue,
++ 				   enum queue_stop_reason reason,
++ 				   bool refcounted,
++@@ -507,11 +474,7 @@ static void __ieee80211_wake_queue(struc
++ 		/* someone still has this queue stopped */
++ 		return;
++ 
++-	if (skb_queue_empty(&local->pending[queue])) {
++-		rcu_read_lock();
++-		ieee80211_propagate_queue_wake(local, queue);
++-		rcu_read_unlock();
++-	} else
+++	if (!skb_queue_empty(&local->pending[queue]))
++ 		tasklet_schedule(&local->tx_pending_tasklet);
++ 
++ 	/*
++@@ -521,12 +484,10 @@ static void __ieee80211_wake_queue(struc
++ 	 * release someone's lock, but it is fine because all the callers of
++ 	 * __ieee80211_wake_queue call it right before releasing the lock.
++ 	 */
++-	if (local->ops->wake_tx_queue) {
++-		if (reason == IEEE80211_QUEUE_STOP_REASON_DRIVER)
++-			tasklet_schedule(&local->wake_txqs_tasklet);
++-		else
++-			_ieee80211_wake_txqs(local, flags);
++-	}
+++	if (reason == IEEE80211_QUEUE_STOP_REASON_DRIVER)
+++		tasklet_schedule(&local->wake_txqs_tasklet);
+++	else
+++		_ieee80211_wake_txqs(local, flags);
++ }
++ 
++ void ieee80211_wake_queue_by_reason(struct ieee80211_hw *hw, int queue,
++@@ -554,8 +515,6 @@ static void __ieee80211_stop_queue(struc
++ 				   bool refcounted)
++ {
++ 	struct ieee80211_local *local = hw_to_local(hw);
++-	struct ieee80211_sub_if_data *sdata;
++-	int n_acs = IEEE80211_NUM_ACS;
++ 
++ 	trace_stop_queue(local, queue, reason);
++ 
++@@ -567,27 +526,7 @@ static void __ieee80211_stop_queue(struc
++ 	else
++ 		local->q_stop_reasons[queue][reason]++;
++ 
++-	if (__test_and_set_bit(reason, &local->queue_stop_reasons[queue]))
++-		return;
++-
++-	if (local->hw.queues < IEEE80211_NUM_ACS)
++-		n_acs = 1;
++-
++-	rcu_read_lock();
++-	list_for_each_entry_rcu(sdata, &local->interfaces, list) {
++-		int ac;
++-
++-		if (!sdata->dev)
++-			continue;
++-
++-		for (ac = 0; ac < n_acs; ac++) {
++-			if (!local->ops->wake_tx_queue &&
++-			    (sdata->vif.hw_queue[ac] == queue ||
++-			     sdata->vif.cab_queue == queue))
++-				netif_stop_subqueue(sdata->dev, ac);
++-		}
++-	}
++-	rcu_read_unlock();
+++	set_bit(reason, &local->queue_stop_reasons[queue]);
++ }
++ 
++ void ieee80211_stop_queue_by_reason(struct ieee80211_hw *hw, int queue,
++--- a/net/mac80211/wme.c
+++++ b/net/mac80211/wme.c
++@@ -122,6 +122,9 @@ u16 ieee80211_select_queue_80211(struct
++ 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
++ 	u8 *p;
++ 
+++	/* Ensure hash is set prior to potential SW encryption */
+++	skb_get_hash(skb);
+++
++ 	if ((info->control.flags & IEEE80211_TX_CTRL_DONT_REORDER) ||
++ 	    local->hw.queues < IEEE80211_NUM_ACS)
++ 		return 0;
++@@ -141,13 +144,16 @@ u16 ieee80211_select_queue_80211(struct
++ 	return ieee80211_downgrade_queue(sdata, NULL, skb);
++ }
++ 
++-u16 __ieee80211_select_queue(struct ieee80211_sub_if_data *sdata,
++-			     struct sta_info *sta, struct sk_buff *skb)
+++u16 ieee80211_select_queue(struct ieee80211_sub_if_data *sdata,
+++			   struct sta_info *sta, struct sk_buff *skb)
++ {
++ 	const struct ethhdr *eth = (void *)skb->data;
++ 	struct mac80211_qos_map *qos_map;
++ 	bool qos;
++ 
+++	/* Ensure hash is set prior to potential SW encryption */
+++	skb_get_hash(skb);
+++
++ 	/* all mesh/ocb stations are required to support WME */
++ 	if ((sdata->vif.type == NL80211_IFTYPE_MESH_POINT &&
++ 	    !is_multicast_ether_addr(eth->h_dest)) ||
++@@ -178,59 +184,6 @@ u16 __ieee80211_select_queue(struct ieee
++ 	return ieee80211_downgrade_queue(sdata, sta, skb);
++ }
++ 
++-
++-/* Indicate which queue to use. */
++-u16 ieee80211_select_queue(struct ieee80211_sub_if_data *sdata,
++-			   struct sk_buff *skb)
++-{
++-	struct ieee80211_local *local = sdata->local;
++-	struct sta_info *sta = NULL;
++-	const u8 *ra = NULL;
++-	u16 ret;
++-
++-	/* when using iTXQ, we can do this later */
++-	if (local->ops->wake_tx_queue)
++-		return 0;
++-
++-	if (local->hw.queues < IEEE80211_NUM_ACS || skb->len < 6) {
++-		skb->priority = 0; /* required for correct WPA/11i MIC */
++-		return 0;
++-	}
++-
++-	rcu_read_lock();
++-	switch (sdata->vif.type) {
++-	case NL80211_IFTYPE_AP_VLAN:
++-		sta = rcu_dereference(sdata->u.vlan.sta);
++-		if (sta)
++-			break;
++-		fallthrough;
++-	case NL80211_IFTYPE_AP:
++-		ra = skb->data;
++-		break;
++-	case NL80211_IFTYPE_STATION:
++-		/* might be a TDLS station */
++-		sta = sta_info_get(sdata, skb->data);
++-		if (sta)
++-			break;
++-
++-		ra = sdata->deflink.u.mgd.bssid;
++-		break;
++-	case NL80211_IFTYPE_ADHOC:
++-		ra = skb->data;
++-		break;
++-	default:
++-		break;
++-	}
++-
++-	if (!sta && ra && !is_multicast_ether_addr(ra))
++-		sta = sta_info_get(sdata, ra);
++-
++-	ret = __ieee80211_select_queue(sdata, sta, skb);
++-
++-	rcu_read_unlock();
++-	return ret;
++-}
++-
++ /**
++  * ieee80211_set_qos_hdr - Fill in the QoS header if there is one.
++  *
++--- a/net/mac80211/wme.h
+++++ b/net/mac80211/wme.h
++@@ -13,10 +13,8 @@
++ u16 ieee80211_select_queue_80211(struct ieee80211_sub_if_data *sdata,
++ 				 struct sk_buff *skb,
++ 				 struct ieee80211_hdr *hdr);
++-u16 __ieee80211_select_queue(struct ieee80211_sub_if_data *sdata,
++-			     struct sta_info *sta, struct sk_buff *skb);
++ u16 ieee80211_select_queue(struct ieee80211_sub_if_data *sdata,
++-			   struct sk_buff *skb);
+++			   struct sta_info *sta, struct sk_buff *skb);
++ void ieee80211_set_qos_hdr(struct ieee80211_sub_if_data *sdata,
++ 			   struct sk_buff *skb);
++ 
+diff --git a/package/kernel/mac80211/patches/subsys/306-04-v6.2-wifi-realtek-remove-duplicated-wake_tx_queue.patch b/package/kernel/mac80211/patches/subsys/306-04-v6.2-wifi-realtek-remove-duplicated-wake_tx_queue.patch
+new file mode 100644
+index 0000000000..f0dfc75a78
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/306-04-v6.2-wifi-realtek-remove-duplicated-wake_tx_queue.patch
+@@ -0,0 +1,32 @@
++From: Johannes Berg <johannes.berg@intel.com>
++Date: Mon, 10 Oct 2022 19:17:46 +0200
++Subject: [PATCH] wifi: realtek: remove duplicated wake_tx_queue
++
++By accident, the previous patch duplicated the initialization
++of the wake_tx_queue callback. Fix that by removing the new
++initializations.
++
++Fixes: a790cc3a4fad ("wifi: mac80211: add wake_tx_queue callback to drivers")
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++---
++
++--- a/drivers/net/wireless/realtek/rtw88/mac80211.c
+++++ b/drivers/net/wireless/realtek/rtw88/mac80211.c
++@@ -896,7 +896,6 @@ static void rtw_ops_sta_rc_update(struct
++ 
++ const struct ieee80211_ops rtw_ops = {
++ 	.tx			= rtw_ops_tx,
++-	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.wake_tx_queue		= rtw_ops_wake_tx_queue,
++ 	.start			= rtw_ops_start,
++ 	.stop			= rtw_ops_stop,
++--- a/drivers/net/wireless/realtek/rtw89/mac80211.c
+++++ b/drivers/net/wireless/realtek/rtw89/mac80211.c
++@@ -918,7 +918,6 @@ static int rtw89_ops_set_tid_config(stru
++ 
++ const struct ieee80211_ops rtw89_ops = {
++ 	.tx			= rtw89_ops_tx,
++-	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
++ 	.wake_tx_queue		= rtw89_ops_wake_tx_queue,
++ 	.start			= rtw89_ops_start,
++ 	.stop			= rtw89_ops_stop,
+diff --git a/package/kernel/mac80211/patches/subsys/310-v6.2-mac80211-add-support-for-restricting-netdev-features.patch b/package/kernel/mac80211/patches/subsys/310-v6.2-mac80211-add-support-for-restricting-netdev-features.patch
+new file mode 100644
+index 0000000000..812b12189c
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/310-v6.2-mac80211-add-support-for-restricting-netdev-features.patch
+@@ -0,0 +1,506 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sun, 9 Oct 2022 20:15:46 +0200
++Subject: [PATCH] mac80211: add support for restricting netdev features per vif
++
++This can be used to selectively disable feature flags for checksum offload,
++scatter/gather or GSO by changing vif->netdev_features.
++Removing features from vif->netdev_features does not affect the netdev
++features themselves, but instead fixes up skbs in the tx path so that the
++offloads are not needed in the driver.
++
++Aside from making it easier to deal with vif type based hardware limitations,
++this also makes it possible to optimize performance on hardware without native
++GSO support by declaring GSO support in hw->netdev_features and removing it
++from vif->netdev_features. This allows mac80211 to handle GSO segmentation
++after the sta lookup, but before itxq enqueue, thus reducing the number of
++unnecessary sta lookups, as well as some other per-packet processing.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/include/net/fq_impl.h
+++++ b/include/net/fq_impl.h
++@@ -200,6 +200,7 @@ static void fq_tin_enqueue(struct fq *fq
++ 			   fq_skb_free_t free_func)
++ {
++ 	struct fq_flow *flow;
+++	struct sk_buff *next;
++ 	bool oom;
++ 
++ 	lockdep_assert_held(&fq->lock);
++@@ -214,11 +215,15 @@ static void fq_tin_enqueue(struct fq *fq
++ 	}
++ 
++ 	flow->tin = tin;
++-	flow->backlog += skb->len;
++-	tin->backlog_bytes += skb->len;
++-	tin->backlog_packets++;
++-	fq->memory_usage += skb->truesize;
++-	fq->backlog++;
+++	skb_list_walk_safe(skb, skb, next) {
+++		skb_mark_not_on_list(skb);
+++		flow->backlog += skb->len;
+++		tin->backlog_bytes += skb->len;
+++		tin->backlog_packets++;
+++		fq->memory_usage += skb->truesize;
+++		fq->backlog++;
+++		__skb_queue_tail(&flow->queue, skb);
+++	}
++ 
++ 	if (list_empty(&flow->flowchain)) {
++ 		flow->deficit = fq->quantum;
++@@ -226,7 +231,6 @@ static void fq_tin_enqueue(struct fq *fq
++ 			      &tin->new_flows);
++ 	}
++ 
++-	__skb_queue_tail(&flow->queue, skb);
++ 	oom = (fq->memory_usage > fq->memory_limit);
++ 	while (fq->backlog > fq->limit || oom) {
++ 		flow = fq_find_fattest_flow(fq);
++--- a/include/net/mac80211.h
+++++ b/include/net/mac80211.h
++@@ -1807,6 +1807,10 @@ struct ieee80211_vif_cfg {
++  * @addr: address of this interface
++  * @p2p: indicates whether this AP or STA interface is a p2p
++  *	interface, i.e. a GO or p2p-sta respectively
+++ * @netdev_features: tx netdev features supported by the hardware for this
+++ *	vif. mac80211 initializes this to hw->netdev_features, and the driver
+++ *	can mask out specific tx features. mac80211 will handle software fixup
+++ *	for masked offloads (GSO, CSUM)
++  * @driver_flags: flags/capabilities the driver has for this interface,
++  *	these need to be set (or cleared) when the interface is added
++  *	or, if supported by the driver, the interface type is changed
++@@ -1846,6 +1850,7 @@ struct ieee80211_vif {
++ 
++ 	struct ieee80211_txq *txq;
++ 
+++	netdev_features_t netdev_features;
++ 	u32 driver_flags;
++ 	u32 offload_flags;
++ 
++--- a/net/mac80211/iface.c
+++++ b/net/mac80211/iface.c
++@@ -2181,6 +2181,7 @@ int ieee80211_if_add(struct ieee80211_lo
++ 		ndev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
++ 		ndev->hw_features |= ndev->features &
++ 					MAC80211_SUPPORTED_FEATURES_TX;
+++		sdata->vif.netdev_features = local->hw.netdev_features;
++ 
++ 		netdev_set_default_ethtool_ops(ndev, &ieee80211_ethtool_ops);
++ 
++--- a/net/mac80211/tx.c
+++++ b/net/mac80211/tx.c
++@@ -1356,7 +1356,11 @@ static struct txq_info *ieee80211_get_tx
++ 
++ static void ieee80211_set_skb_enqueue_time(struct sk_buff *skb)
++ {
++-	IEEE80211_SKB_CB(skb)->control.enqueue_time = codel_get_time();
+++	struct sk_buff *next;
+++	codel_time_t now = codel_get_time();
+++
+++	skb_list_walk_safe(skb, skb, next)
+++		IEEE80211_SKB_CB(skb)->control.enqueue_time = now;
++ }
++ 
++ static u32 codel_skb_len_func(const struct sk_buff *skb)
++@@ -3579,55 +3583,79 @@ ieee80211_xmit_fast_finish(struct ieee80
++ 	return TX_CONTINUE;
++ }
++ 
++-static bool ieee80211_xmit_fast(struct ieee80211_sub_if_data *sdata,
++-				struct sta_info *sta,
++-				struct ieee80211_fast_tx *fast_tx,
++-				struct sk_buff *skb)
+++static netdev_features_t
+++ieee80211_sdata_netdev_features(struct ieee80211_sub_if_data *sdata)
++ {
++-	struct ieee80211_local *local = sdata->local;
++-	u16 ethertype = (skb->data[12] << 8) | skb->data[13];
++-	int extra_head = fast_tx->hdr_len - (ETH_HLEN - 2);
++-	int hw_headroom = sdata->local->hw.extra_tx_headroom;
++-	struct ethhdr eth;
++-	struct ieee80211_tx_info *info;
++-	struct ieee80211_hdr *hdr = (void *)fast_tx->hdr;
++-	struct ieee80211_tx_data tx;
++-	ieee80211_tx_result r;
++-	struct tid_ampdu_tx *tid_tx = NULL;
++-	u8 tid = IEEE80211_NUM_TIDS;
+++	if (sdata->vif.type != NL80211_IFTYPE_AP_VLAN)
+++		return sdata->vif.netdev_features;
++ 
++-	/* control port protocol needs a lot of special handling */
++-	if (cpu_to_be16(ethertype) == sdata->control_port_protocol)
++-		return false;
+++	if (!sdata->bss)
+++		return 0;
++ 
++-	/* only RFC 1042 SNAP */
++-	if (ethertype < ETH_P_802_3_MIN)
++-		return false;
+++	sdata = container_of(sdata->bss, struct ieee80211_sub_if_data, u.ap);
+++	return sdata->vif.netdev_features;
+++}
++ 
++-	/* don't handle TX status request here either */
++-	if (skb->sk && skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS)
++-		return false;
+++static struct sk_buff *
+++ieee80211_tx_skb_fixup(struct sk_buff *skb, netdev_features_t features)
+++{
+++	if (skb_is_gso(skb)) {
+++		struct sk_buff *segs;
++ 
++-	if (hdr->frame_control & cpu_to_le16(IEEE80211_STYPE_QOS_DATA)) {
++-		tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
++-		tid_tx = rcu_dereference(sta->ampdu_mlme.tid_tx[tid]);
++-		if (tid_tx) {
++-			if (!test_bit(HT_AGG_STATE_OPERATIONAL, &tid_tx->state))
++-				return false;
++-			if (tid_tx->timeout)
++-				tid_tx->last_tx = jiffies;
++-		}
+++		segs = skb_gso_segment(skb, features);
+++		if (!segs)
+++			return skb;
+++		if (IS_ERR(segs))
+++			goto free;
+++
+++		consume_skb(skb);
+++		return segs;
++ 	}
++ 
++-	/* after this point (skb is modified) we cannot return false */
+++	if (skb_needs_linearize(skb, features) && __skb_linearize(skb))
+++		goto free;
+++
+++	if (skb->ip_summed == CHECKSUM_PARTIAL) {
+++		int ofs = skb_checksum_start_offset(skb);
+++
+++		if (skb->encapsulation)
+++			skb_set_inner_transport_header(skb, ofs);
+++		else
+++			skb_set_transport_header(skb, ofs);
+++
+++		if (skb_csum_hwoffload_help(skb, features))
+++			goto free;
+++	}
+++
+++	skb_mark_not_on_list(skb);
+++	return skb;
+++
+++free:
+++	kfree_skb(skb);
+++	return NULL;
+++}
+++
+++static void __ieee80211_xmit_fast(struct ieee80211_sub_if_data *sdata,
+++				  struct sta_info *sta,
+++				  struct ieee80211_fast_tx *fast_tx,
+++				  struct sk_buff *skb, u8 tid, bool ampdu)
+++{
+++	struct ieee80211_local *local = sdata->local;
+++	struct ieee80211_hdr *hdr = (void *)fast_tx->hdr;
+++	struct ieee80211_tx_info *info;
+++	struct ieee80211_tx_data tx;
+++	ieee80211_tx_result r;
+++	int hw_headroom = sdata->local->hw.extra_tx_headroom;
+++	int extra_head = fast_tx->hdr_len - (ETH_HLEN - 2);
+++	struct ethhdr eth;
++ 
++ 	skb = skb_share_check(skb, GFP_ATOMIC);
++ 	if (unlikely(!skb))
++-		return true;
+++		return;
++ 
++ 	if ((hdr->frame_control & cpu_to_le16(IEEE80211_STYPE_QOS_DATA)) &&
++ 	    ieee80211_amsdu_aggregate(sdata, sta, fast_tx, skb))
++-		return true;
+++		return;
++ 
++ 	/* will not be crypto-handled beyond what we do here, so use false
++ 	 * as the may-encrypt argument for the resize to not account for
++@@ -3636,10 +3664,8 @@ static bool ieee80211_xmit_fast(struct i
++ 	if (unlikely(ieee80211_skb_resize(sdata, skb,
++ 					  max_t(int, extra_head + hw_headroom -
++ 						     skb_headroom(skb), 0),
++-					  ENCRYPT_NO))) {
++-		kfree_skb(skb);
++-		return true;
++-	}
+++					  ENCRYPT_NO)))
+++		goto free;
++ 
++ 	memcpy(&eth, skb->data, ETH_HLEN - 2);
++ 	hdr = skb_push(skb, extra_head);
++@@ -3653,7 +3679,7 @@ static bool ieee80211_xmit_fast(struct i
++ 	info->control.vif = &sdata->vif;
++ 	info->flags = IEEE80211_TX_CTL_FIRST_FRAGMENT |
++ 		      IEEE80211_TX_CTL_DONTFRAG |
++-		      (tid_tx ? IEEE80211_TX_CTL_AMPDU : 0);
+++		      (ampdu ? IEEE80211_TX_CTL_AMPDU : 0);
++ 	info->control.flags = IEEE80211_TX_CTRL_FAST_XMIT |
++ 			      u32_encode_bits(IEEE80211_LINK_UNSPECIFIED,
++ 					      IEEE80211_TX_CTRL_MLO_LINK);
++@@ -3677,16 +3703,14 @@ static bool ieee80211_xmit_fast(struct i
++ 	tx.key = fast_tx->key;
++ 
++ 	if (ieee80211_queue_skb(local, sdata, sta, skb))
++-		return true;
+++		return;
++ 
++ 	tx.skb = skb;
++ 	r = ieee80211_xmit_fast_finish(sdata, sta, fast_tx->pn_offs,
++ 				       fast_tx->key, &tx);
++ 	tx.skb = NULL;
++-	if (r == TX_DROP) {
++-		kfree_skb(skb);
++-		return true;
++-	}
+++	if (r == TX_DROP)
+++		goto free;
++ 
++ 	if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
++ 		sdata = container_of(sdata->bss,
++@@ -3694,6 +3718,56 @@ static bool ieee80211_xmit_fast(struct i
++ 
++ 	__skb_queue_tail(&tx.skbs, skb);
++ 	ieee80211_tx_frags(local, &sdata->vif, sta, &tx.skbs, false);
+++	return;
+++
+++free:
+++	kfree_skb(skb);
+++}
+++
+++static bool ieee80211_xmit_fast(struct ieee80211_sub_if_data *sdata,
+++				struct sta_info *sta,
+++				struct ieee80211_fast_tx *fast_tx,
+++				struct sk_buff *skb)
+++{
+++	u16 ethertype = (skb->data[12] << 8) | skb->data[13];
+++	struct ieee80211_hdr *hdr = (void *)fast_tx->hdr;
+++	struct tid_ampdu_tx *tid_tx = NULL;
+++	struct sk_buff *next;
+++	u8 tid = IEEE80211_NUM_TIDS;
+++
+++	/* control port protocol needs a lot of special handling */
+++	if (cpu_to_be16(ethertype) == sdata->control_port_protocol)
+++		return false;
+++
+++	/* only RFC 1042 SNAP */
+++	if (ethertype < ETH_P_802_3_MIN)
+++		return false;
+++
+++	/* don't handle TX status request here either */
+++	if (skb->sk && skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS)
+++		return false;
+++
+++	if (hdr->frame_control & cpu_to_le16(IEEE80211_STYPE_QOS_DATA)) {
+++		tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
+++		tid_tx = rcu_dereference(sta->ampdu_mlme.tid_tx[tid]);
+++		if (tid_tx) {
+++			if (!test_bit(HT_AGG_STATE_OPERATIONAL, &tid_tx->state))
+++				return false;
+++			if (tid_tx->timeout)
+++				tid_tx->last_tx = jiffies;
+++		}
+++	}
+++
+++	/* after this point (skb is modified) we cannot return false */
+++	skb = ieee80211_tx_skb_fixup(skb, ieee80211_sdata_netdev_features(sdata));
+++	if (!skb)
+++		return true;
+++
+++	skb_list_walk_safe(skb, skb, next) {
+++		skb_mark_not_on_list(skb);
+++		__ieee80211_xmit_fast(sdata, sta, fast_tx, skb, tid, tid_tx);
+++	}
+++
++ 	return true;
++ }
++ 
++@@ -4201,31 +4275,14 @@ void __ieee80211_subif_start_xmit(struct
++ 			goto out;
++ 	}
++ 
++-	if (skb_is_gso(skb)) {
++-		struct sk_buff *segs;
++-
++-		segs = skb_gso_segment(skb, 0);
++-		if (IS_ERR(segs)) {
++-			goto out_free;
++-		} else if (segs) {
++-			consume_skb(skb);
++-			skb = segs;
++-		}
++-	} else {
++-		/* we cannot process non-linear frames on this path */
++-		if (skb_linearize(skb))
++-			goto out_free;
++-
++-		/* the frame could be fragmented, software-encrypted, and other
++-		 * things so we cannot really handle checksum offload with it -
++-		 * fix it up in software before we handle anything else.
++-		 */
++-		if (skb->ip_summed == CHECKSUM_PARTIAL) {
++-			skb_set_transport_header(skb,
++-						 skb_checksum_start_offset(skb));
++-			if (skb_checksum_help(skb))
++-				goto out_free;
++-		}
+++	/* the frame could be fragmented, software-encrypted, and other
+++	 * things so we cannot really handle checksum or GSO offload.
+++	 * fix it up in software before we handle anything else.
+++	 */
+++	skb = ieee80211_tx_skb_fixup(skb, 0);
+++	if (!skb) {
+++		len = 0;
+++		goto out;
++ 	}
++ 
++ 	skb_list_walk_safe(skb, skb, next) {
++@@ -4443,9 +4500,11 @@ normal:
++ 	return NETDEV_TX_OK;
++ }
++ 
++-static bool ieee80211_tx_8023(struct ieee80211_sub_if_data *sdata,
++-			      struct sk_buff *skb, struct sta_info *sta,
++-			      bool txpending)
+++
+++
+++static bool __ieee80211_tx_8023(struct ieee80211_sub_if_data *sdata,
+++				struct sk_buff *skb, struct sta_info *sta,
+++				bool txpending)
++ {
++ 	struct ieee80211_local *local = sdata->local;
++ 	struct ieee80211_tx_control control = {};
++@@ -4454,14 +4513,6 @@ static bool ieee80211_tx_8023(struct iee
++ 	unsigned long flags;
++ 	int q = info->hw_queue;
++ 
++-	if (sta)
++-		sk_pacing_shift_update(skb->sk, local->hw.tx_sk_pacing_shift);
++-
++-	ieee80211_tpt_led_trig_tx(local, skb->len);
++-
++-	if (ieee80211_queue_skb(local, sdata, sta, skb))
++-		return true;
++-
++ 	spin_lock_irqsave(&local->queue_stop_reason_lock, flags);
++ 
++ 	if (local->queue_stop_reasons[q] ||
++@@ -4488,6 +4539,26 @@ static bool ieee80211_tx_8023(struct iee
++ 	return true;
++ }
++ 
+++static bool ieee80211_tx_8023(struct ieee80211_sub_if_data *sdata,
+++			      struct sk_buff *skb, struct sta_info *sta,
+++			      bool txpending)
+++{
+++	struct ieee80211_local *local = sdata->local;
+++	struct sk_buff *next;
+++	bool ret = true;
+++
+++	if (ieee80211_queue_skb(local, sdata, sta, skb))
+++		return true;
+++
+++	skb_list_walk_safe(skb, skb, next) {
+++		skb_mark_not_on_list(skb);
+++		if (!__ieee80211_tx_8023(sdata, skb, sta, txpending))
+++			ret = false;
+++	}
+++
+++	return ret;
+++}
+++
++ static void ieee80211_8023_xmit(struct ieee80211_sub_if_data *sdata,
++ 				struct net_device *dev, struct sta_info *sta,
++ 				struct ieee80211_key *key, struct sk_buff *skb)
++@@ -4495,9 +4566,13 @@ static void ieee80211_8023_xmit(struct i
++ 	struct ieee80211_tx_info *info;
++ 	struct ieee80211_local *local = sdata->local;
++ 	struct tid_ampdu_tx *tid_tx;
+++	struct sk_buff *seg, *next;
+++	unsigned int skbs = 0, len = 0;
+++	u16 queue;
++ 	u8 tid;
++ 
++-	skb_set_queue_mapping(skb, ieee80211_select_queue(sdata, sta, skb));
+++	queue = ieee80211_select_queue(sdata, sta, skb);
+++	skb_set_queue_mapping(skb, queue);
++ 
++ 	if (unlikely(test_bit(SCAN_SW_SCANNING, &local->scanning)) &&
++ 	    test_bit(SDATA_STATE_OFFCHANNEL, &sdata->state))
++@@ -4507,9 +4582,6 @@ static void ieee80211_8023_xmit(struct i
++ 	if (unlikely(!skb))
++ 		return;
++ 
++-	info = IEEE80211_SKB_CB(skb);
++-	memset(info, 0, sizeof(*info));
++-
++ 	ieee80211_aggr_check(sdata, sta, skb);
++ 
++ 	tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
++@@ -4523,22 +4595,20 @@ static void ieee80211_8023_xmit(struct i
++ 			return;
++ 		}
++ 
++-		info->flags |= IEEE80211_TX_CTL_AMPDU;
++ 		if (tid_tx->timeout)
++ 			tid_tx->last_tx = jiffies;
++ 	}
++ 
++-	if (unlikely(skb->sk &&
++-		     skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS))
++-		info->ack_frame_id = ieee80211_store_ack_skb(local, skb,
++-							     &info->flags, NULL);
+++	skb = ieee80211_tx_skb_fixup(skb, ieee80211_sdata_netdev_features(sdata));
+++	if (!skb)
+++		return;
++ 
++-	info->hw_queue = sdata->vif.hw_queue[skb_get_queue_mapping(skb)];
+++	info = IEEE80211_SKB_CB(skb);
+++	memset(info, 0, sizeof(*info));
+++	if (tid_tx)
+++		info->flags |= IEEE80211_TX_CTL_AMPDU;
++ 
++-	dev_sw_netstats_tx_add(dev, 1, skb->len);
++-
++-	sta->deflink.tx_stats.bytes[skb_get_queue_mapping(skb)] += skb->len;
++-	sta->deflink.tx_stats.packets[skb_get_queue_mapping(skb)]++;
+++	info->hw_queue = sdata->vif.hw_queue[queue];
++ 
++ 	if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
++ 		sdata = container_of(sdata->bss,
++@@ -4550,6 +4620,24 @@ static void ieee80211_8023_xmit(struct i
++ 	if (key)
++ 		info->control.hw_key = &key->conf;
++ 
+++	skb_list_walk_safe(skb, seg, next) {
+++		skbs++;
+++		len += seg->len;
+++		if (seg != skb)
+++			memcpy(IEEE80211_SKB_CB(seg), info, sizeof(*info));
+++	}
+++
+++	if (unlikely(skb->sk &&
+++		     skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS))
+++		info->ack_frame_id = ieee80211_store_ack_skb(local, skb,
+++							     &info->flags, NULL);
+++
+++	dev_sw_netstats_tx_add(dev, skbs, len);
+++	sta->deflink.tx_stats.packets[queue] += skbs;
+++	sta->deflink.tx_stats.bytes[queue] += len;
+++
+++	ieee80211_tpt_led_trig_tx(local, len);
+++
++ 	ieee80211_tx_8023(sdata, skb, sta, false);
++ 
++ 	return;
++@@ -4591,6 +4679,7 @@ netdev_tx_t ieee80211_subif_start_xmit_8
++ 		    key->conf.cipher == WLAN_CIPHER_SUITE_TKIP))
++ 		goto skip_offload;
++ 
+++	sk_pacing_shift_update(skb->sk, sdata->local->hw.tx_sk_pacing_shift);
++ 	ieee80211_8023_xmit(sdata, dev, sta, key, skb);
++ 	goto out;
++ 
+diff --git a/package/kernel/mac80211/patches/subsys/311-v6.2-wifi-mac80211-fix-and-simplify-unencrypted-drop-chec.patch b/package/kernel/mac80211/patches/subsys/311-v6.2-wifi-mac80211-fix-and-simplify-unencrypted-drop-chec.patch
+new file mode 100644
+index 0000000000..804b02eb30
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/311-v6.2-wifi-mac80211-fix-and-simplify-unencrypted-drop-chec.patch
+@@ -0,0 +1,87 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Thu, 1 Dec 2022 14:57:30 +0100
++Subject: [PATCH] wifi: mac80211: fix and simplify unencrypted drop check for
++ mesh
++
++ieee80211_drop_unencrypted is called from ieee80211_rx_h_mesh_fwding and
++ieee80211_frame_allowed.
++
++Since ieee80211_rx_h_mesh_fwding can forward packets for other mesh nodes
++and is called earlier, it needs to check the decryptions status and if the
++packet is using the control protocol on its own, instead of deferring to
++the later call from ieee80211_frame_allowed.
++
++Because of that, ieee80211_drop_unencrypted has a mesh specific check
++that skips over the mesh header in order to check the payload protocol.
++This code is invalid when called from ieee80211_frame_allowed, since that
++happens after the 802.11->802.3 conversion.
++
++Fix this by moving the mesh specific check directly into
++ieee80211_rx_h_mesh_fwding.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++Link: https://lore.kernel.org/r/20221201135730.19723-1-nbd@nbd.name
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++---
++
++--- a/net/mac80211/rx.c
+++++ b/net/mac80211/rx.c
++@@ -2403,7 +2403,6 @@ static int ieee80211_802_1x_port_control
++ 
++ static int ieee80211_drop_unencrypted(struct ieee80211_rx_data *rx, __le16 fc)
++ {
++-	struct ieee80211_hdr *hdr = (void *)rx->skb->data;
++ 	struct sk_buff *skb = rx->skb;
++ 	struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
++ 
++@@ -2414,31 +2413,6 @@ static int ieee80211_drop_unencrypted(st
++ 	if (status->flag & RX_FLAG_DECRYPTED)
++ 		return 0;
++ 
++-	/* check mesh EAPOL frames first */
++-	if (unlikely(rx->sta && ieee80211_vif_is_mesh(&rx->sdata->vif) &&
++-		     ieee80211_is_data(fc))) {
++-		struct ieee80211s_hdr *mesh_hdr;
++-		u16 hdr_len = ieee80211_hdrlen(fc);
++-		u16 ethertype_offset;
++-		__be16 ethertype;
++-
++-		if (!ether_addr_equal(hdr->addr1, rx->sdata->vif.addr))
++-			goto drop_check;
++-
++-		/* make sure fixed part of mesh header is there, also checks skb len */
++-		if (!pskb_may_pull(rx->skb, hdr_len + 6))
++-			goto drop_check;
++-
++-		mesh_hdr = (struct ieee80211s_hdr *)(skb->data + hdr_len);
++-		ethertype_offset = hdr_len + ieee80211_get_mesh_hdrlen(mesh_hdr) +
++-				   sizeof(rfc1042_header);
++-
++-		if (skb_copy_bits(rx->skb, ethertype_offset, &ethertype, 2) == 0 &&
++-		    ethertype == rx->sdata->control_port_protocol)
++-			return 0;
++-	}
++-
++-drop_check:
++ 	/* Drop unencrypted frames if key is set. */
++ 	if (unlikely(!ieee80211_has_protected(fc) &&
++ 		     !ieee80211_is_any_nullfunc(fc) &&
++@@ -2892,8 +2866,16 @@ ieee80211_rx_h_mesh_fwding(struct ieee80
++ 	hdr = (struct ieee80211_hdr *) skb->data;
++ 	mesh_hdr = (struct ieee80211s_hdr *) (skb->data + hdrlen);
++ 
++-	if (ieee80211_drop_unencrypted(rx, hdr->frame_control))
++-		return RX_DROP_MONITOR;
+++	if (ieee80211_drop_unencrypted(rx, hdr->frame_control)) {
+++		int offset = hdrlen + ieee80211_get_mesh_hdrlen(mesh_hdr) +
+++			     sizeof(rfc1042_header);
+++		__be16 ethertype;
+++
+++		if (!ether_addr_equal(hdr->addr1, rx->sdata->vif.addr) ||
+++		    skb_copy_bits(rx->skb, offset, &ethertype, 2) != 0 ||
+++		    ethertype != rx->sdata->control_port_protocol)
+++			return RX_DROP_MONITOR;
+++	}
++ 
++ 	/* frame is in RMC, don't forward */
++ 	if (ieee80211_is_data(hdr->frame_control) &&
+diff --git a/package/kernel/mac80211/patches/subsys/312-v6.3-wifi-cfg80211-move-A-MSDU-check-in-ieee80211_data_to.patch b/package/kernel/mac80211/patches/subsys/312-v6.3-wifi-cfg80211-move-A-MSDU-check-in-ieee80211_data_to.patch
+new file mode 100644
+index 0000000000..f668905cca
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/312-v6.3-wifi-cfg80211-move-A-MSDU-check-in-ieee80211_data_to.patch
+@@ -0,0 +1,25 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 2 Dec 2022 13:53:11 +0100
++Subject: [PATCH] wifi: cfg80211: move A-MSDU check in
++ ieee80211_data_to_8023_exthdr
++
++When parsing the outer A-MSDU header, don't check for inner bridge tunnel
++or RFC1042 headers. This is handled by ieee80211_amsdu_to_8023s already.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/wireless/util.c
+++++ b/net/wireless/util.c
++@@ -631,8 +631,9 @@ int ieee80211_data_to_8023_exthdr(struct
++ 		break;
++ 	}
++ 
++-	if (likely(skb_copy_bits(skb, hdrlen, &payload, sizeof(payload)) == 0 &&
++-	           ((!is_amsdu && ether_addr_equal(payload.hdr, rfc1042_header) &&
+++	if (likely(!is_amsdu &&
+++		   skb_copy_bits(skb, hdrlen, &payload, sizeof(payload)) == 0 &&
+++	           ((ether_addr_equal(payload.hdr, rfc1042_header) &&
++ 		     payload.proto != htons(ETH_P_AARP) &&
++ 		     payload.proto != htons(ETH_P_IPX)) ||
++ 		    ether_addr_equal(payload.hdr, bridge_tunnel_header)))) {
+diff --git a/package/kernel/mac80211/patches/subsys/313-v6.3-wifi-cfg80211-factor-out-bridge-tunnel-RFC1042-heade.patch b/package/kernel/mac80211/patches/subsys/313-v6.3-wifi-cfg80211-factor-out-bridge-tunnel-RFC1042-heade.patch
+new file mode 100644
+index 0000000000..8641057869
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/313-v6.3-wifi-cfg80211-factor-out-bridge-tunnel-RFC1042-heade.patch
+@@ -0,0 +1,76 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 2 Dec 2022 13:54:15 +0100
++Subject: [PATCH] wifi: cfg80211: factor out bridge tunnel / RFC1042 header
++ check
++
++The same check is done in multiple places, unify it.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/wireless/util.c
+++++ b/net/wireless/util.c
++@@ -542,6 +542,21 @@ unsigned int ieee80211_get_mesh_hdrlen(s
++ }
++ EXPORT_SYMBOL(ieee80211_get_mesh_hdrlen);
++ 
+++static bool ieee80211_get_8023_tunnel_proto(const void *hdr, __be16 *proto)
+++{
+++	const __be16 *hdr_proto = hdr + ETH_ALEN;
+++
+++	if (!(ether_addr_equal(hdr, rfc1042_header) &&
+++	      *hdr_proto != htons(ETH_P_AARP) &&
+++	      *hdr_proto != htons(ETH_P_IPX)) &&
+++	    !ether_addr_equal(hdr, bridge_tunnel_header))
+++		return false;
+++
+++	*proto = *hdr_proto;
+++
+++	return true;
+++}
+++
++ int ieee80211_data_to_8023_exthdr(struct sk_buff *skb, struct ethhdr *ehdr,
++ 				  const u8 *addr, enum nl80211_iftype iftype,
++ 				  u8 data_offset, bool is_amsdu)
++@@ -633,14 +648,9 @@ int ieee80211_data_to_8023_exthdr(struct
++ 
++ 	if (likely(!is_amsdu &&
++ 		   skb_copy_bits(skb, hdrlen, &payload, sizeof(payload)) == 0 &&
++-	           ((ether_addr_equal(payload.hdr, rfc1042_header) &&
++-		     payload.proto != htons(ETH_P_AARP) &&
++-		     payload.proto != htons(ETH_P_IPX)) ||
++-		    ether_addr_equal(payload.hdr, bridge_tunnel_header)))) {
++-		/* remove RFC1042 or Bridge-Tunnel encapsulation and
++-		 * replace EtherType */
+++		   ieee80211_get_8023_tunnel_proto(&payload, &tmp.h_proto))) {
+++		/* remove RFC1042 or Bridge-Tunnel encapsulation */
++ 		hdrlen += ETH_ALEN + 2;
++-		tmp.h_proto = payload.proto;
++ 		skb_postpull_rcsum(skb, &payload, ETH_ALEN + 2);
++ 	} else {
++ 		tmp.h_proto = htons(skb->len - hdrlen);
++@@ -756,8 +766,6 @@ void ieee80211_amsdu_to_8023s(struct sk_
++ {
++ 	unsigned int hlen = ALIGN(extra_headroom, 4);
++ 	struct sk_buff *frame = NULL;
++-	u16 ethertype;
++-	u8 *payload;
++ 	int offset = 0, remaining;
++ 	struct ethhdr eth;
++ 	bool reuse_frag = skb->head_frag && !skb_has_frag_list(skb);
++@@ -811,14 +819,8 @@ void ieee80211_amsdu_to_8023s(struct sk_
++ 		frame->dev = skb->dev;
++ 		frame->priority = skb->priority;
++ 
++-		payload = frame->data;
++-		ethertype = (payload[6] << 8) | payload[7];
++-		if (likely((ether_addr_equal(payload, rfc1042_header) &&
++-			    ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
++-			   ether_addr_equal(payload, bridge_tunnel_header))) {
++-			eth.h_proto = htons(ethertype);
+++		if (likely(ieee80211_get_8023_tunnel_proto(frame->data, &eth.h_proto)))
++ 			skb_pull(frame, ETH_ALEN + 2);
++-		}
++ 
++ 		memcpy(skb_push(frame, sizeof(eth)), &eth, sizeof(eth));
++ 		__skb_queue_tail(list, frame);
+diff --git a/package/kernel/mac80211/patches/subsys/314-v6.3-wifi-mac80211-remove-mesh-forwarding-congestion-chec.patch b/package/kernel/mac80211/patches/subsys/314-v6.3-wifi-mac80211-remove-mesh-forwarding-congestion-chec.patch
+new file mode 100644
+index 0000000000..515176f0de
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/314-v6.3-wifi-mac80211-remove-mesh-forwarding-congestion-chec.patch
+@@ -0,0 +1,54 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 2 Dec 2022 17:01:46 +0100
++Subject: [PATCH] wifi: mac80211: remove mesh forwarding congestion check
++
++Now that all drivers use iTXQ, it does not make sense to check to drop
++tx forwarding packets when the driver has stopped the queues.
++fq_codel will take care of dropping packets when the queues fill up
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/mac80211/debugfs_netdev.c
+++++ b/net/mac80211/debugfs_netdev.c
++@@ -603,8 +603,6 @@ IEEE80211_IF_FILE(fwded_mcast, u.mesh.ms
++ IEEE80211_IF_FILE(fwded_unicast, u.mesh.mshstats.fwded_unicast, DEC);
++ IEEE80211_IF_FILE(fwded_frames, u.mesh.mshstats.fwded_frames, DEC);
++ IEEE80211_IF_FILE(dropped_frames_ttl, u.mesh.mshstats.dropped_frames_ttl, DEC);
++-IEEE80211_IF_FILE(dropped_frames_congestion,
++-		  u.mesh.mshstats.dropped_frames_congestion, DEC);
++ IEEE80211_IF_FILE(dropped_frames_no_route,
++ 		  u.mesh.mshstats.dropped_frames_no_route, DEC);
++ 
++@@ -740,7 +738,6 @@ static void add_mesh_stats(struct ieee80
++ 	MESHSTATS_ADD(fwded_frames);
++ 	MESHSTATS_ADD(dropped_frames_ttl);
++ 	MESHSTATS_ADD(dropped_frames_no_route);
++-	MESHSTATS_ADD(dropped_frames_congestion);
++ #undef MESHSTATS_ADD
++ }
++ 
++--- a/net/mac80211/ieee80211_i.h
+++++ b/net/mac80211/ieee80211_i.h
++@@ -329,7 +329,6 @@ struct mesh_stats {
++ 	__u32 fwded_frames;		/* Mesh total forwarded frames */
++ 	__u32 dropped_frames_ttl;	/* Not transmitted since mesh_ttl == 0*/
++ 	__u32 dropped_frames_no_route;	/* Not transmitted, no route found */
++-	__u32 dropped_frames_congestion;/* Not forwarded due to congestion */
++ };
++ 
++ #define PREQ_Q_F_START		0x1
++--- a/net/mac80211/rx.c
+++++ b/net/mac80211/rx.c
++@@ -2926,11 +2926,6 @@ ieee80211_rx_h_mesh_fwding(struct ieee80
++ 		return RX_CONTINUE;
++ 
++ 	ac = ieee802_1d_to_ac[skb->priority];
++-	q = sdata->vif.hw_queue[ac];
++-	if (ieee80211_queue_stopped(&local->hw, q)) {
++-		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_congestion);
++-		return RX_DROP_MONITOR;
++-	}
++ 	skb_set_queue_mapping(skb, ac);
++ 
++ 	if (!--mesh_hdr->ttl) {
+diff --git a/package/kernel/mac80211/patches/subsys/315-v6.3-wifi-mac80211-fix-receiving-A-MSDU-frames-on-mesh-in.patch b/package/kernel/mac80211/patches/subsys/315-v6.3-wifi-mac80211-fix-receiving-A-MSDU-frames-on-mesh-in.patch
+new file mode 100644
+index 0000000000..59b799b6b1
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/315-v6.3-wifi-mac80211-fix-receiving-A-MSDU-frames-on-mesh-in.patch
+@@ -0,0 +1,762 @@
++From 986e43b19ae9176093da35e0a844e65c8bf9ede7 Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Mon, 13 Feb 2023 11:08:54 +0100
++Subject: [PATCH] wifi: mac80211: fix receiving A-MSDU frames on mesh
++ interfaces
++
++The current mac80211 mesh A-MSDU receive path fails to parse A-MSDU packets
++on mesh interfaces, because it assumes that the Mesh Control field is always
++directly after the 802.11 header.
++802.11-2020 9.3.2.2.2 Figure 9-70 shows that the Mesh Control field is
++actually part of the A-MSDU subframe header.
++This makes more sense, since it allows packets for multiple different
++destinations to be included in the same A-MSDU, as long as RA and TID are
++still the same.
++Another issue is the fact that the A-MSDU subframe length field was apparently
++accidentally defined as little-endian in the standard.
++
++In order to fix this, the mesh forwarding path needs happen at a different
++point in the receive path.
++
++ieee80211_data_to_8023_exthdr is changed to ignore the mesh control field
++and leave it in after the ethernet header. This also affects the source/dest
++MAC address fields, which now in the case of mesh point to the mesh SA/DA.
++
++ieee80211_amsdu_to_8023s is changed to deal with the endian difference and
++to add the Mesh Control length to the subframe length, since it's not covered
++by the MSDU length field.
++
++With these changes, the mac80211 will get the same packet structure for
++converted regular data packets and unpacked A-MSDU subframes.
++
++The mesh forwarding checks are now only performed after the A-MSDU decap.
++For locally received packets, the Mesh Control header is stripped away.
++For forwarded packets, a new 802.11 header gets added.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++Link: https://lore.kernel.org/r/20230213100855.34315-4-nbd@nbd.name
++[fix fortify build error]
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++---
++ .../wireless/marvell/mwifiex/11n_rxreorder.c  |   2 +-
++ include/net/cfg80211.h                        |  27 +-
++ net/mac80211/rx.c                             | 350 ++++++++++--------
++ net/wireless/util.c                           | 120 +++---
++ 4 files changed, 297 insertions(+), 202 deletions(-)
++
++--- a/drivers/net/wireless/marvell/mwifiex/11n_rxreorder.c
+++++ b/drivers/net/wireless/marvell/mwifiex/11n_rxreorder.c
++@@ -33,7 +33,7 @@ static int mwifiex_11n_dispatch_amsdu_pk
++ 		skb_trim(skb, le16_to_cpu(local_rx_pd->rx_pkt_length));
++ 
++ 		ieee80211_amsdu_to_8023s(skb, &list, priv->curr_addr,
++-					 priv->wdev.iftype, 0, NULL, NULL);
+++					 priv->wdev.iftype, 0, NULL, NULL, false);
++ 
++ 		while (!skb_queue_empty(&list)) {
++ 			struct rx_packet_hdr *rx_hdr;
++--- a/include/net/cfg80211.h
+++++ b/include/net/cfg80211.h
++@@ -6208,11 +6208,36 @@ static inline int ieee80211_data_to_8023
++  * @extra_headroom: The hardware extra headroom for SKBs in the @list.
++  * @check_da: DA to check in the inner ethernet header, or NULL
++  * @check_sa: SA to check in the inner ethernet header, or NULL
+++ * @mesh_control: A-MSDU subframe header includes the mesh control field
++  */
++ void ieee80211_amsdu_to_8023s(struct sk_buff *skb, struct sk_buff_head *list,
++ 			      const u8 *addr, enum nl80211_iftype iftype,
++ 			      const unsigned int extra_headroom,
++-			      const u8 *check_da, const u8 *check_sa);
+++			      const u8 *check_da, const u8 *check_sa,
+++			      bool mesh_control);
+++
+++/**
+++ * ieee80211_get_8023_tunnel_proto - get RFC1042 or bridge tunnel encap protocol
+++ *
+++ * Check for RFC1042 or bridge tunnel header and fetch the encapsulated
+++ * protocol.
+++ *
+++ * @hdr: pointer to the MSDU payload
+++ * @proto: destination pointer to store the protocol
+++ * Return: true if encapsulation was found
+++ */
+++bool ieee80211_get_8023_tunnel_proto(const void *hdr, __be16 *proto);
+++
+++/**
+++ * ieee80211_strip_8023_mesh_hdr - strip mesh header from converted 802.3 frames
+++ *
+++ * Strip the mesh header, which was left in by ieee80211_data_to_8023 as part
+++ * of the MSDU data. Also move any source/destination addresses from the mesh
+++ * header to the ethernet header (if present).
+++ *
+++ * @skb: The 802.3 frame with embedded mesh header
+++ */
+++int ieee80211_strip_8023_mesh_hdr(struct sk_buff *skb);
++ 
++ /**
++  * cfg80211_classify8021d - determine the 802.1p/1d tag for a data frame
++--- a/net/mac80211/rx.c
+++++ b/net/mac80211/rx.c
++@@ -2720,6 +2720,174 @@ ieee80211_deliver_skb(struct ieee80211_r
++ 	}
++ }
++ 
+++static ieee80211_rx_result
+++ieee80211_rx_mesh_data(struct ieee80211_sub_if_data *sdata, struct sta_info *sta,
+++		       struct sk_buff *skb)
+++{
+++#ifdef CPTCFG_MAC80211_MESH
+++	struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh;
+++	struct ieee80211_local *local = sdata->local;
+++	uint16_t fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA;
+++	struct ieee80211_hdr hdr = {
+++		.frame_control = cpu_to_le16(fc)
+++	};
+++	struct ieee80211_hdr *fwd_hdr;
+++	struct ieee80211s_hdr *mesh_hdr;
+++	struct ieee80211_tx_info *info;
+++	struct sk_buff *fwd_skb;
+++	struct ethhdr *eth;
+++	bool multicast;
+++	int tailroom = 0;
+++	int hdrlen, mesh_hdrlen;
+++	u8 *qos;
+++
+++	if (!ieee80211_vif_is_mesh(&sdata->vif))
+++		return RX_CONTINUE;
+++
+++	if (!pskb_may_pull(skb, sizeof(*eth) + 6))
+++		return RX_DROP_MONITOR;
+++
+++	mesh_hdr = (struct ieee80211s_hdr *)(skb->data + sizeof(*eth));
+++	mesh_hdrlen = ieee80211_get_mesh_hdrlen(mesh_hdr);
+++
+++	if (!pskb_may_pull(skb, sizeof(*eth) + mesh_hdrlen))
+++		return RX_DROP_MONITOR;
+++
+++	eth = (struct ethhdr *)skb->data;
+++	multicast = is_multicast_ether_addr(eth->h_dest);
+++
+++	mesh_hdr = (struct ieee80211s_hdr *)(eth + 1);
+++	if (!mesh_hdr->ttl)
+++		return RX_DROP_MONITOR;
+++
+++	/* frame is in RMC, don't forward */
+++	if (is_multicast_ether_addr(eth->h_dest) &&
+++	    mesh_rmc_check(sdata, eth->h_source, mesh_hdr))
+++		return RX_DROP_MONITOR;
+++
+++	/* Frame has reached destination.  Don't forward */
+++	if (ether_addr_equal(sdata->vif.addr, eth->h_dest))
+++		goto rx_accept;
+++
+++	if (!ifmsh->mshcfg.dot11MeshForwarding) {
+++		if (is_multicast_ether_addr(eth->h_dest))
+++			goto rx_accept;
+++
+++		return RX_DROP_MONITOR;
+++	}
+++
+++	/* forward packet */
+++	if (sdata->crypto_tx_tailroom_needed_cnt)
+++		tailroom = IEEE80211_ENCRYPT_TAILROOM;
+++
+++	if (!--mesh_hdr->ttl) {
+++		if (multicast)
+++			goto rx_accept;
+++
+++		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_ttl);
+++		return RX_DROP_MONITOR;
+++	}
+++
+++	if (mesh_hdr->flags & MESH_FLAGS_AE) {
+++		struct mesh_path *mppath;
+++		char *proxied_addr;
+++
+++		if (multicast)
+++			proxied_addr = mesh_hdr->eaddr1;
+++		else if ((mesh_hdr->flags & MESH_FLAGS_AE) == MESH_FLAGS_AE_A5_A6)
+++			/* has_a4 already checked in ieee80211_rx_mesh_check */
+++			proxied_addr = mesh_hdr->eaddr2;
+++		else
+++			return RX_DROP_MONITOR;
+++
+++		rcu_read_lock();
+++		mppath = mpp_path_lookup(sdata, proxied_addr);
+++		if (!mppath) {
+++			mpp_path_add(sdata, proxied_addr, eth->h_source);
+++		} else {
+++			spin_lock_bh(&mppath->state_lock);
+++			if (!ether_addr_equal(mppath->mpp, eth->h_source))
+++				memcpy(mppath->mpp, eth->h_source, ETH_ALEN);
+++			mppath->exp_time = jiffies;
+++			spin_unlock_bh(&mppath->state_lock);
+++		}
+++		rcu_read_unlock();
+++	}
+++
+++	skb_set_queue_mapping(skb, ieee802_1d_to_ac[skb->priority]);
+++
+++	ieee80211_fill_mesh_addresses(&hdr, &hdr.frame_control,
+++				      eth->h_dest, eth->h_source);
+++	hdrlen = ieee80211_hdrlen(hdr.frame_control);
+++	if (multicast) {
+++		int extra_head = sizeof(struct ieee80211_hdr) - sizeof(*eth);
+++
+++		fwd_skb = skb_copy_expand(skb, local->tx_headroom + extra_head +
+++					       IEEE80211_ENCRYPT_HEADROOM,
+++					  tailroom, GFP_ATOMIC);
+++		if (!fwd_skb)
+++			goto rx_accept;
+++	} else {
+++		fwd_skb = skb;
+++		skb = NULL;
+++
+++		if (skb_cow_head(fwd_skb, hdrlen - sizeof(struct ethhdr)))
+++			return RX_DROP_UNUSABLE;
+++	}
+++
+++	fwd_hdr = skb_push(fwd_skb, hdrlen - sizeof(struct ethhdr));
+++	memcpy(fwd_hdr, &hdr, hdrlen - 2);
+++	qos = ieee80211_get_qos_ctl(fwd_hdr);
+++	qos[0] = qos[1] = 0;
+++
+++	skb_reset_mac_header(fwd_skb);
+++	hdrlen += mesh_hdrlen;
+++	if (ieee80211_get_8023_tunnel_proto(fwd_skb->data + hdrlen,
+++					    &fwd_skb->protocol))
+++		hdrlen += ETH_ALEN;
+++	else
+++		fwd_skb->protocol = htons(fwd_skb->len - hdrlen);
+++	skb_set_network_header(fwd_skb, hdrlen);
+++
+++	info = IEEE80211_SKB_CB(fwd_skb);
+++	memset(info, 0, sizeof(*info));
+++	info->control.flags |= IEEE80211_TX_INTCFL_NEED_TXPROCESSING;
+++	info->control.vif = &sdata->vif;
+++	info->control.jiffies = jiffies;
+++	if (multicast) {
+++		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_mcast);
+++		memcpy(fwd_hdr->addr2, sdata->vif.addr, ETH_ALEN);
+++		/* update power mode indication when forwarding */
+++		ieee80211_mps_set_frame_flags(sdata, NULL, fwd_hdr);
+++	} else if (!mesh_nexthop_lookup(sdata, fwd_skb)) {
+++		/* mesh power mode flags updated in mesh_nexthop_lookup */
+++		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_unicast);
+++	} else {
+++		/* unable to resolve next hop */
+++		if (sta)
+++			mesh_path_error_tx(sdata, ifmsh->mshcfg.element_ttl,
+++					   hdr.addr3, 0,
+++					   WLAN_REASON_MESH_PATH_NOFORWARD,
+++					   sta->sta.addr);
+++		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_no_route);
+++		kfree_skb(fwd_skb);
+++		goto rx_accept;
+++	}
+++
+++	IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_frames);
+++	fwd_skb->dev = sdata->dev;
+++	ieee80211_add_pending_skb(local, fwd_skb);
+++
+++rx_accept:
+++	if (!skb)
+++		return RX_QUEUED;
+++
+++	ieee80211_strip_8023_mesh_hdr(skb);
+++#endif
+++
+++	return RX_CONTINUE;
+++}
+++
++ static ieee80211_rx_result debug_noinline
++ __ieee80211_rx_h_amsdu(struct ieee80211_rx_data *rx, u8 data_offset)
++ {
++@@ -2728,8 +2896,10 @@ __ieee80211_rx_h_amsdu(struct ieee80211_
++ 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
++ 	__le16 fc = hdr->frame_control;
++ 	struct sk_buff_head frame_list;
+++	static ieee80211_rx_result res;
++ 	struct ethhdr ethhdr;
++ 	const u8 *check_da = ethhdr.h_dest, *check_sa = ethhdr.h_source;
+++	bool mesh = false;
++ 
++ 	if (unlikely(ieee80211_has_a4(hdr->frame_control))) {
++ 		check_da = NULL;
++@@ -2746,6 +2916,8 @@ __ieee80211_rx_h_amsdu(struct ieee80211_
++ 			break;
++ 		case NL80211_IFTYPE_MESH_POINT:
++ 			check_sa = NULL;
+++			check_da = NULL;
+++			mesh = true;
++ 			break;
++ 		default:
++ 			break;
++@@ -2763,17 +2935,29 @@ __ieee80211_rx_h_amsdu(struct ieee80211_
++ 	ieee80211_amsdu_to_8023s(skb, &frame_list, dev->dev_addr,
++ 				 rx->sdata->vif.type,
++ 				 rx->local->hw.extra_tx_headroom,
++-				 check_da, check_sa);
+++				 check_da, check_sa, mesh);
++ 
++ 	while (!skb_queue_empty(&frame_list)) {
++ 		rx->skb = __skb_dequeue(&frame_list);
++ 
++-		if (!ieee80211_frame_allowed(rx, fc)) {
++-			dev_kfree_skb(rx->skb);
+++		res = ieee80211_rx_mesh_data(rx->sdata, rx->sta, rx->skb);
+++		switch (res) {
+++		case RX_QUEUED:
++ 			continue;
+++		case RX_CONTINUE:
+++			break;
+++		default:
+++			goto free;
++ 		}
++ 
+++		if (!ieee80211_frame_allowed(rx, fc))
+++			goto free;
+++
++ 		ieee80211_deliver_skb(rx);
+++		continue;
+++
+++free:
+++		dev_kfree_skb(rx->skb);
++ 	}
++ 
++ 	return RX_QUEUED;
++@@ -2806,6 +2990,8 @@ ieee80211_rx_h_amsdu(struct ieee80211_rx
++ 			if (!rx->sdata->u.mgd.use_4addr)
++ 				return RX_DROP_UNUSABLE;
++ 			break;
+++		case NL80211_IFTYPE_MESH_POINT:
+++			break;
++ 		default:
++ 			return RX_DROP_UNUSABLE;
++ 		}
++@@ -2834,155 +3020,6 @@ ieee80211_rx_h_amsdu(struct ieee80211_rx
++ 	return __ieee80211_rx_h_amsdu(rx, 0);
++ }
++ 
++-#ifdef CPTCFG_MAC80211_MESH
++-static ieee80211_rx_result
++-ieee80211_rx_h_mesh_fwding(struct ieee80211_rx_data *rx)
++-{
++-	struct ieee80211_hdr *fwd_hdr, *hdr;
++-	struct ieee80211_tx_info *info;
++-	struct ieee80211s_hdr *mesh_hdr;
++-	struct sk_buff *skb = rx->skb, *fwd_skb;
++-	struct ieee80211_local *local = rx->local;
++-	struct ieee80211_sub_if_data *sdata = rx->sdata;
++-	struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh;
++-	u16 ac, q, hdrlen;
++-	int tailroom = 0;
++-
++-	hdr = (struct ieee80211_hdr *) skb->data;
++-	hdrlen = ieee80211_hdrlen(hdr->frame_control);
++-
++-	/* make sure fixed part of mesh header is there, also checks skb len */
++-	if (!pskb_may_pull(rx->skb, hdrlen + 6))
++-		return RX_DROP_MONITOR;
++-
++-	mesh_hdr = (struct ieee80211s_hdr *) (skb->data + hdrlen);
++-
++-	/* make sure full mesh header is there, also checks skb len */
++-	if (!pskb_may_pull(rx->skb,
++-			   hdrlen + ieee80211_get_mesh_hdrlen(mesh_hdr)))
++-		return RX_DROP_MONITOR;
++-
++-	/* reload pointers */
++-	hdr = (struct ieee80211_hdr *) skb->data;
++-	mesh_hdr = (struct ieee80211s_hdr *) (skb->data + hdrlen);
++-
++-	if (ieee80211_drop_unencrypted(rx, hdr->frame_control)) {
++-		int offset = hdrlen + ieee80211_get_mesh_hdrlen(mesh_hdr) +
++-			     sizeof(rfc1042_header);
++-		__be16 ethertype;
++-
++-		if (!ether_addr_equal(hdr->addr1, rx->sdata->vif.addr) ||
++-		    skb_copy_bits(rx->skb, offset, &ethertype, 2) != 0 ||
++-		    ethertype != rx->sdata->control_port_protocol)
++-			return RX_DROP_MONITOR;
++-	}
++-
++-	/* frame is in RMC, don't forward */
++-	if (ieee80211_is_data(hdr->frame_control) &&
++-	    is_multicast_ether_addr(hdr->addr1) &&
++-	    mesh_rmc_check(rx->sdata, hdr->addr3, mesh_hdr))
++-		return RX_DROP_MONITOR;
++-
++-	if (!ieee80211_is_data(hdr->frame_control))
++-		return RX_CONTINUE;
++-
++-	if (!mesh_hdr->ttl)
++-		return RX_DROP_MONITOR;
++-
++-	if (mesh_hdr->flags & MESH_FLAGS_AE) {
++-		struct mesh_path *mppath;
++-		char *proxied_addr;
++-		char *mpp_addr;
++-
++-		if (is_multicast_ether_addr(hdr->addr1)) {
++-			mpp_addr = hdr->addr3;
++-			proxied_addr = mesh_hdr->eaddr1;
++-		} else if ((mesh_hdr->flags & MESH_FLAGS_AE) ==
++-			    MESH_FLAGS_AE_A5_A6) {
++-			/* has_a4 already checked in ieee80211_rx_mesh_check */
++-			mpp_addr = hdr->addr4;
++-			proxied_addr = mesh_hdr->eaddr2;
++-		} else {
++-			return RX_DROP_MONITOR;
++-		}
++-
++-		rcu_read_lock();
++-		mppath = mpp_path_lookup(sdata, proxied_addr);
++-		if (!mppath) {
++-			mpp_path_add(sdata, proxied_addr, mpp_addr);
++-		} else {
++-			spin_lock_bh(&mppath->state_lock);
++-			if (!ether_addr_equal(mppath->mpp, mpp_addr))
++-				memcpy(mppath->mpp, mpp_addr, ETH_ALEN);
++-			mppath->exp_time = jiffies;
++-			spin_unlock_bh(&mppath->state_lock);
++-		}
++-		rcu_read_unlock();
++-	}
++-
++-	/* Frame has reached destination.  Don't forward */
++-	if (!is_multicast_ether_addr(hdr->addr1) &&
++-	    ether_addr_equal(sdata->vif.addr, hdr->addr3))
++-		return RX_CONTINUE;
++-
++-	ac = ieee802_1d_to_ac[skb->priority];
++-	skb_set_queue_mapping(skb, ac);
++-
++-	if (!--mesh_hdr->ttl) {
++-		if (!is_multicast_ether_addr(hdr->addr1))
++-			IEEE80211_IFSTA_MESH_CTR_INC(ifmsh,
++-						     dropped_frames_ttl);
++-		goto out;
++-	}
++-
++-	if (!ifmsh->mshcfg.dot11MeshForwarding)
++-		goto out;
++-
++-	if (sdata->crypto_tx_tailroom_needed_cnt)
++-		tailroom = IEEE80211_ENCRYPT_TAILROOM;
++-
++-	fwd_skb = skb_copy_expand(skb, local->tx_headroom +
++-				       IEEE80211_ENCRYPT_HEADROOM,
++-				  tailroom, GFP_ATOMIC);
++-	if (!fwd_skb)
++-		goto out;
++-
++-	fwd_skb->dev = sdata->dev;
++-	fwd_hdr =  (struct ieee80211_hdr *) fwd_skb->data;
++-	fwd_hdr->frame_control &= ~cpu_to_le16(IEEE80211_FCTL_RETRY);
++-	info = IEEE80211_SKB_CB(fwd_skb);
++-	memset(info, 0, sizeof(*info));
++-	info->control.flags |= IEEE80211_TX_INTCFL_NEED_TXPROCESSING;
++-	info->control.vif = &rx->sdata->vif;
++-	info->control.jiffies = jiffies;
++-	if (is_multicast_ether_addr(fwd_hdr->addr1)) {
++-		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_mcast);
++-		memcpy(fwd_hdr->addr2, sdata->vif.addr, ETH_ALEN);
++-		/* update power mode indication when forwarding */
++-		ieee80211_mps_set_frame_flags(sdata, NULL, fwd_hdr);
++-	} else if (!mesh_nexthop_lookup(sdata, fwd_skb)) {
++-		/* mesh power mode flags updated in mesh_nexthop_lookup */
++-		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_unicast);
++-	} else {
++-		/* unable to resolve next hop */
++-		mesh_path_error_tx(sdata, ifmsh->mshcfg.element_ttl,
++-				   fwd_hdr->addr3, 0,
++-				   WLAN_REASON_MESH_PATH_NOFORWARD,
++-				   fwd_hdr->addr2);
++-		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_no_route);
++-		kfree_skb(fwd_skb);
++-		return RX_DROP_MONITOR;
++-	}
++-
++-	IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_frames);
++-	ieee80211_add_pending_skb(local, fwd_skb);
++- out:
++-	if (is_multicast_ether_addr(hdr->addr1))
++-		return RX_CONTINUE;
++-	return RX_DROP_MONITOR;
++-}
++-#endif
++-
++ static ieee80211_rx_result debug_noinline
++ ieee80211_rx_h_data(struct ieee80211_rx_data *rx)
++ {
++@@ -2991,6 +3028,7 @@ ieee80211_rx_h_data(struct ieee80211_rx_
++ 	struct net_device *dev = sdata->dev;
++ 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)rx->skb->data;
++ 	__le16 fc = hdr->frame_control;
+++	static ieee80211_rx_result res;
++ 	bool port_control;
++ 	int err;
++ 
++@@ -3017,6 +3055,10 @@ ieee80211_rx_h_data(struct ieee80211_rx_
++ 	if (unlikely(err))
++ 		return RX_DROP_UNUSABLE;
++ 
+++	res = ieee80211_rx_mesh_data(rx->sdata, rx->sta, rx->skb);
+++	if (res != RX_CONTINUE)
+++		return res;
+++
++ 	if (!ieee80211_frame_allowed(rx, fc))
++ 		return RX_DROP_MONITOR;
++ 
++@@ -3987,10 +4029,6 @@ static void ieee80211_rx_handlers(struct
++ 		CALL_RXH(ieee80211_rx_h_defragment);
++ 		CALL_RXH(ieee80211_rx_h_michael_mic_verify);
++ 		/* must be after MMIC verify so header is counted in MPDU mic */
++-#ifdef CPTCFG_MAC80211_MESH
++-		if (ieee80211_vif_is_mesh(&rx->sdata->vif))
++-			CALL_RXH(ieee80211_rx_h_mesh_fwding);
++-#endif
++ 		CALL_RXH(ieee80211_rx_h_amsdu);
++ 		CALL_RXH(ieee80211_rx_h_data);
++ 
++--- a/net/wireless/util.c
+++++ b/net/wireless/util.c
++@@ -542,7 +542,7 @@ unsigned int ieee80211_get_mesh_hdrlen(s
++ }
++ EXPORT_SYMBOL(ieee80211_get_mesh_hdrlen);
++ 
++-static bool ieee80211_get_8023_tunnel_proto(const void *hdr, __be16 *proto)
+++bool ieee80211_get_8023_tunnel_proto(const void *hdr, __be16 *proto)
++ {
++ 	const __be16 *hdr_proto = hdr + ETH_ALEN;
++ 
++@@ -556,6 +556,49 @@ static bool ieee80211_get_8023_tunnel_pr
++ 
++ 	return true;
++ }
+++EXPORT_SYMBOL(ieee80211_get_8023_tunnel_proto);
+++
+++int ieee80211_strip_8023_mesh_hdr(struct sk_buff *skb)
+++{
+++	const void *mesh_addr;
+++	struct {
+++		struct ethhdr eth;
+++		u8 flags;
+++	} payload;
+++	int hdrlen;
+++	int ret;
+++
+++	ret = skb_copy_bits(skb, 0, &payload, sizeof(payload));
+++	if (ret)
+++		return ret;
+++
+++	hdrlen = sizeof(payload.eth) + __ieee80211_get_mesh_hdrlen(payload.flags);
+++
+++	if (likely(pskb_may_pull(skb, hdrlen + 8) &&
+++		   ieee80211_get_8023_tunnel_proto(skb->data + hdrlen,
+++						   &payload.eth.h_proto)))
+++		hdrlen += ETH_ALEN + 2;
+++	else if (!pskb_may_pull(skb, hdrlen))
+++		return -EINVAL;
+++
+++	mesh_addr = skb->data + sizeof(payload.eth) + ETH_ALEN;
+++	switch (payload.flags & MESH_FLAGS_AE) {
+++	case MESH_FLAGS_AE_A4:
+++		memcpy(&payload.eth.h_source, mesh_addr, ETH_ALEN);
+++		break;
+++	case MESH_FLAGS_AE_A5_A6:
+++		memcpy(&payload.eth, mesh_addr, 2 * ETH_ALEN);
+++		break;
+++	default:
+++		break;
+++	}
+++
+++	pskb_pull(skb, hdrlen - sizeof(payload.eth));
+++	memcpy(skb->data, &payload.eth, sizeof(payload.eth));
+++
+++	return 0;
+++}
+++EXPORT_SYMBOL(ieee80211_strip_8023_mesh_hdr);
++ 
++ int ieee80211_data_to_8023_exthdr(struct sk_buff *skb, struct ethhdr *ehdr,
++ 				  const u8 *addr, enum nl80211_iftype iftype,
++@@ -568,7 +611,6 @@ int ieee80211_data_to_8023_exthdr(struct
++ 	} payload;
++ 	struct ethhdr tmp;
++ 	u16 hdrlen;
++-	u8 mesh_flags = 0;
++ 
++ 	if (unlikely(!ieee80211_is_data_present(hdr->frame_control)))
++ 		return -1;
++@@ -589,12 +631,6 @@ int ieee80211_data_to_8023_exthdr(struct
++ 	memcpy(tmp.h_dest, ieee80211_get_DA(hdr), ETH_ALEN);
++ 	memcpy(tmp.h_source, ieee80211_get_SA(hdr), ETH_ALEN);
++ 
++-	if (iftype == NL80211_IFTYPE_MESH_POINT &&
++-	    skb_copy_bits(skb, hdrlen, &mesh_flags, 1) < 0)
++-		return -1;
++-
++-	mesh_flags &= MESH_FLAGS_AE;
++-
++ 	switch (hdr->frame_control &
++ 		cpu_to_le16(IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) {
++ 	case cpu_to_le16(IEEE80211_FCTL_TODS):
++@@ -608,17 +644,6 @@ int ieee80211_data_to_8023_exthdr(struct
++ 			     iftype != NL80211_IFTYPE_AP_VLAN &&
++ 			     iftype != NL80211_IFTYPE_STATION))
++ 			return -1;
++-		if (iftype == NL80211_IFTYPE_MESH_POINT) {
++-			if (mesh_flags == MESH_FLAGS_AE_A4)
++-				return -1;
++-			if (mesh_flags == MESH_FLAGS_AE_A5_A6 &&
++-			    skb_copy_bits(skb, hdrlen +
++-					  offsetof(struct ieee80211s_hdr, eaddr1),
++-					  tmp.h_dest, 2 * ETH_ALEN) < 0)
++-				return -1;
++-
++-			hdrlen += __ieee80211_get_mesh_hdrlen(mesh_flags);
++-		}
++ 		break;
++ 	case cpu_to_le16(IEEE80211_FCTL_FROMDS):
++ 		if ((iftype != NL80211_IFTYPE_STATION &&
++@@ -627,16 +652,6 @@ int ieee80211_data_to_8023_exthdr(struct
++ 		    (is_multicast_ether_addr(tmp.h_dest) &&
++ 		     ether_addr_equal(tmp.h_source, addr)))
++ 			return -1;
++-		if (iftype == NL80211_IFTYPE_MESH_POINT) {
++-			if (mesh_flags == MESH_FLAGS_AE_A5_A6)
++-				return -1;
++-			if (mesh_flags == MESH_FLAGS_AE_A4 &&
++-			    skb_copy_bits(skb, hdrlen +
++-					  offsetof(struct ieee80211s_hdr, eaddr1),
++-					  tmp.h_source, ETH_ALEN) < 0)
++-				return -1;
++-			hdrlen += __ieee80211_get_mesh_hdrlen(mesh_flags);
++-		}
++ 		break;
++ 	case cpu_to_le16(0):
++ 		if (iftype != NL80211_IFTYPE_ADHOC &&
++@@ -646,7 +661,7 @@ int ieee80211_data_to_8023_exthdr(struct
++ 		break;
++ 	}
++ 
++-	if (likely(!is_amsdu &&
+++	if (likely(!is_amsdu && iftype != NL80211_IFTYPE_MESH_POINT &&
++ 		   skb_copy_bits(skb, hdrlen, &payload, sizeof(payload)) == 0 &&
++ 		   ieee80211_get_8023_tunnel_proto(&payload, &tmp.h_proto))) {
++ 		/* remove RFC1042 or Bridge-Tunnel encapsulation */
++@@ -722,7 +737,8 @@ __ieee80211_amsdu_copy_frag(struct sk_bu
++ 
++ static struct sk_buff *
++ __ieee80211_amsdu_copy(struct sk_buff *skb, unsigned int hlen,
++-		       int offset, int len, bool reuse_frag)
+++		       int offset, int len, bool reuse_frag,
+++		       int min_len)
++ {
++ 	struct sk_buff *frame;
++ 	int cur_len = len;
++@@ -736,7 +752,7 @@ __ieee80211_amsdu_copy(struct sk_buff *s
++ 	 * in the stack later.
++ 	 */
++ 	if (reuse_frag)
++-		cur_len = min_t(int, len, 32);
+++		cur_len = min_t(int, len, min_len);
++ 
++ 	/*
++ 	 * Allocate and reserve two bytes more for payload
++@@ -746,6 +762,7 @@ __ieee80211_amsdu_copy(struct sk_buff *s
++ 	if (!frame)
++ 		return NULL;
++ 
+++	frame->priority = skb->priority;
++ 	skb_reserve(frame, hlen + sizeof(struct ethhdr) + 2);
++ 	skb_copy_bits(skb, offset, skb_put(frame, cur_len), cur_len);
++ 
++@@ -762,23 +779,37 @@ __ieee80211_amsdu_copy(struct sk_buff *s
++ void ieee80211_amsdu_to_8023s(struct sk_buff *skb, struct sk_buff_head *list,
++ 			      const u8 *addr, enum nl80211_iftype iftype,
++ 			      const unsigned int extra_headroom,
++-			      const u8 *check_da, const u8 *check_sa)
+++			      const u8 *check_da, const u8 *check_sa,
+++			      bool mesh_control)
++ {
++ 	unsigned int hlen = ALIGN(extra_headroom, 4);
++ 	struct sk_buff *frame = NULL;
++ 	int offset = 0, remaining;
++-	struct ethhdr eth;
+++	struct {
+++		struct ethhdr eth;
+++		uint8_t flags;
+++	} hdr;
++ 	bool reuse_frag = skb->head_frag && !skb_has_frag_list(skb);
++ 	bool reuse_skb = false;
++ 	bool last = false;
+++	int copy_len = sizeof(hdr.eth);
+++
+++	if (iftype == NL80211_IFTYPE_MESH_POINT)
+++		copy_len = sizeof(hdr);
++ 
++ 	while (!last) {
++ 		unsigned int subframe_len;
++-		int len;
+++		int len, mesh_len = 0;
++ 		u8 padding;
++ 
++-		skb_copy_bits(skb, offset, &eth, sizeof(eth));
++-		len = ntohs(eth.h_proto);
+++		skb_copy_bits(skb, offset, &hdr, copy_len);
+++		if (iftype == NL80211_IFTYPE_MESH_POINT)
+++			mesh_len = __ieee80211_get_mesh_hdrlen(hdr.flags);
+++		if (mesh_control)
+++			len = le16_to_cpu(*(__le16 *)&hdr.eth.h_proto) + mesh_len;
+++		else
+++			len = ntohs(hdr.eth.h_proto);
+++
++ 		subframe_len = sizeof(struct ethhdr) + len;
++ 		padding = (4 - subframe_len) & 0x3;
++ 
++@@ -787,16 +818,16 @@ void ieee80211_amsdu_to_8023s(struct sk_
++ 		if (subframe_len > remaining)
++ 			goto purge;
++ 		/* mitigate A-MSDU aggregation injection attacks */
++-		if (ether_addr_equal(eth.h_dest, rfc1042_header))
+++		if (ether_addr_equal(hdr.eth.h_dest, rfc1042_header))
++ 			goto purge;
++ 
++ 		offset += sizeof(struct ethhdr);
++ 		last = remaining <= subframe_len + padding;
++ 
++ 		/* FIXME: should we really accept multicast DA? */
++-		if ((check_da && !is_multicast_ether_addr(eth.h_dest) &&
++-		     !ether_addr_equal(check_da, eth.h_dest)) ||
++-		    (check_sa && !ether_addr_equal(check_sa, eth.h_source))) {
+++		if ((check_da && !is_multicast_ether_addr(hdr.eth.h_dest) &&
+++		     !ether_addr_equal(check_da, hdr.eth.h_dest)) ||
+++		    (check_sa && !ether_addr_equal(check_sa, hdr.eth.h_source))) {
++ 			offset += len + padding;
++ 			continue;
++ 		}
++@@ -808,7 +839,7 @@ void ieee80211_amsdu_to_8023s(struct sk_
++ 			reuse_skb = true;
++ 		} else {
++ 			frame = __ieee80211_amsdu_copy(skb, hlen, offset, len,
++-						       reuse_frag);
+++						       reuse_frag, 32 + mesh_len);
++ 			if (!frame)
++ 				goto purge;
++ 
++@@ -819,10 +850,11 @@ void ieee80211_amsdu_to_8023s(struct sk_
++ 		frame->dev = skb->dev;
++ 		frame->priority = skb->priority;
++ 
++-		if (likely(ieee80211_get_8023_tunnel_proto(frame->data, &eth.h_proto)))
+++		if (likely(iftype != NL80211_IFTYPE_MESH_POINT &&
+++			   ieee80211_get_8023_tunnel_proto(frame->data, &hdr.eth.h_proto)))
++ 			skb_pull(frame, ETH_ALEN + 2);
++ 
++-		memcpy(skb_push(frame, sizeof(eth)), &eth, sizeof(eth));
+++		memcpy(skb_push(frame, sizeof(hdr.eth)), &hdr.eth, sizeof(hdr.eth));
++ 		__skb_queue_tail(list, frame);
++ 	}
++ 
+diff --git a/package/kernel/mac80211/patches/subsys/316-v6.3-wifi-mac80211-add-a-workaround-for-receiving-non-sta.patch b/package/kernel/mac80211/patches/subsys/316-v6.3-wifi-mac80211-add-a-workaround-for-receiving-non-sta.patch
+new file mode 100644
+index 0000000000..6dc98ae16a
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/316-v6.3-wifi-mac80211-add-a-workaround-for-receiving-non-sta.patch
+@@ -0,0 +1,145 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 9 Dec 2022 21:15:04 +0100
++Subject: [PATCH] wifi: mac80211: add a workaround for receiving
++ non-standard mesh A-MSDU
++
++At least ath10k and ath11k supported hardware (maybe more) does not implement
++mesh A-MSDU aggregation in a standard compliant way.
++802.11-2020 9.3.2.2.2 declares that the Mesh Control field is part of the
++A-MSDU header. As such, its length must not be included in the subframe
++length field.
++Hardware affected by this bug treats the mesh control field as part of the
++MSDU data and sets the length accordingly.
++In order to avoid packet loss, keep track of which stations are affected
++by this and take it into account when converting A-MSDU to 802.3 + mesh control
++packets.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/include/net/cfg80211.h
+++++ b/include/net/cfg80211.h
++@@ -6194,6 +6194,19 @@ static inline int ieee80211_data_to_8023
++ }
++ 
++ /**
+++ * ieee80211_is_valid_amsdu - check if subframe lengths of an A-MSDU are valid
+++ *
+++ * This is used to detect non-standard A-MSDU frames, e.g. the ones generated
+++ * by ath10k and ath11k, where the subframe length includes the length of the
+++ * mesh control field.
+++ *
+++ * @skb: The input A-MSDU frame without any headers.
+++ * @mesh_hdr: use standard compliant mesh A-MSDU subframe header
+++ * Returns: true if subframe header lengths are valid for the @mesh_hdr mode
+++ */
+++bool ieee80211_is_valid_amsdu(struct sk_buff *skb, bool mesh_hdr);
+++
+++/**
++  * ieee80211_amsdu_to_8023s - decode an IEEE 802.11n A-MSDU frame
++  *
++  * Decode an IEEE 802.11 A-MSDU and convert it to a list of 802.3 frames.
++--- a/net/mac80211/rx.c
+++++ b/net/mac80211/rx.c
++@@ -2899,7 +2899,6 @@ __ieee80211_rx_h_amsdu(struct ieee80211_
++ 	static ieee80211_rx_result res;
++ 	struct ethhdr ethhdr;
++ 	const u8 *check_da = ethhdr.h_dest, *check_sa = ethhdr.h_source;
++-	bool mesh = false;
++ 
++ 	if (unlikely(ieee80211_has_a4(hdr->frame_control))) {
++ 		check_da = NULL;
++@@ -2917,7 +2916,6 @@ __ieee80211_rx_h_amsdu(struct ieee80211_
++ 		case NL80211_IFTYPE_MESH_POINT:
++ 			check_sa = NULL;
++ 			check_da = NULL;
++-			mesh = true;
++ 			break;
++ 		default:
++ 			break;
++@@ -2932,10 +2930,21 @@ __ieee80211_rx_h_amsdu(struct ieee80211_
++ 					  data_offset, true))
++ 		return RX_DROP_UNUSABLE;
++ 
+++	if (rx->sta && rx->sta->amsdu_mesh_control < 0) {
+++		bool valid_std = ieee80211_is_valid_amsdu(skb, true);
+++		bool valid_nonstd = ieee80211_is_valid_amsdu(skb, false);
+++
+++		if (valid_std && !valid_nonstd)
+++			rx->sta->amsdu_mesh_control = 1;
+++		else if (valid_nonstd && !valid_std)
+++			rx->sta->amsdu_mesh_control = 0;
+++	}
+++
++ 	ieee80211_amsdu_to_8023s(skb, &frame_list, dev->dev_addr,
++ 				 rx->sdata->vif.type,
++ 				 rx->local->hw.extra_tx_headroom,
++-				 check_da, check_sa, mesh);
+++				 check_da, check_sa,
+++				 rx->sta->amsdu_mesh_control);
++ 
++ 	while (!skb_queue_empty(&frame_list)) {
++ 		rx->skb = __skb_dequeue(&frame_list);
++--- a/net/mac80211/sta_info.c
+++++ b/net/mac80211/sta_info.c
++@@ -591,6 +591,9 @@ __sta_info_alloc(struct ieee80211_sub_if
++ 
++ 	sta->sta_state = IEEE80211_STA_NONE;
++ 
+++	if (sdata->vif.type == NL80211_IFTYPE_MESH_POINT)
+++		sta->amsdu_mesh_control = -1;
+++
++ 	/* Mark TID as unreserved */
++ 	sta->reserved_tid = IEEE80211_TID_UNRESERVED;
++ 
++--- a/net/mac80211/sta_info.h
+++++ b/net/mac80211/sta_info.h
++@@ -702,6 +702,7 @@ struct sta_info {
++ 	struct codel_params cparams;
++ 
++ 	u8 reserved_tid;
+++	s8 amsdu_mesh_control;
++ 
++ 	struct cfg80211_chan_def tdls_chandef;
++ 
++--- a/net/wireless/util.c
+++++ b/net/wireless/util.c
++@@ -776,6 +776,38 @@ __ieee80211_amsdu_copy(struct sk_buff *s
++ 	return frame;
++ }
++ 
+++bool ieee80211_is_valid_amsdu(struct sk_buff *skb, bool mesh_hdr)
+++{
+++	int offset = 0, remaining, subframe_len, padding;
+++
+++	for (offset = 0; offset < skb->len; offset += subframe_len + padding) {
+++		struct {
+++		    __be16 len;
+++		    u8 mesh_flags;
+++		} hdr;
+++		u16 len;
+++
+++		if (skb_copy_bits(skb, offset + 2 * ETH_ALEN, &hdr, sizeof(hdr)) < 0)
+++			return false;
+++
+++		if (mesh_hdr)
+++			len = le16_to_cpu(*(__le16 *)&hdr.len) +
+++			      __ieee80211_get_mesh_hdrlen(hdr.mesh_flags);
+++		else
+++			len = ntohs(hdr.len);
+++
+++		subframe_len = sizeof(struct ethhdr) + len;
+++		padding = (4 - subframe_len) & 0x3;
+++		remaining = skb->len - offset;
+++
+++		if (subframe_len > remaining)
+++			return false;
+++	}
+++
+++	return true;
+++}
+++EXPORT_SYMBOL(ieee80211_is_valid_amsdu);
+++
++ void ieee80211_amsdu_to_8023s(struct sk_buff *skb, struct sk_buff_head *list,
++ 			      const u8 *addr, enum nl80211_iftype iftype,
++ 			      const unsigned int extra_headroom,
+diff --git a/package/kernel/mac80211/patches/subsys/318-wifi-mac80211-fix-race-in-mesh-sequence-number-assig.patch b/package/kernel/mac80211/patches/subsys/318-wifi-mac80211-fix-race-in-mesh-sequence-number-assig.patch
+new file mode 100644
+index 0000000000..7d01ffdfff
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/318-wifi-mac80211-fix-race-in-mesh-sequence-number-assig.patch
+@@ -0,0 +1,37 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Wed, 15 Feb 2023 15:21:37 +0100
++Subject: [PATCH] wifi: mac80211: fix race in mesh sequence number
++ assignment
++
++Since the sequence number is shared across different tx queues, it needs
++to be atomic in order to avoid accidental duplicate assignment
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/mac80211/ieee80211_i.h
+++++ b/net/mac80211/ieee80211_i.h
++@@ -696,7 +696,7 @@ struct ieee80211_if_mesh {
++ 	struct mesh_stats mshstats;
++ 	struct mesh_config mshcfg;
++ 	atomic_t estab_plinks;
++-	u32 mesh_seqnum;
+++	atomic_t mesh_seqnum;
++ 	bool accepting_plinks;
++ 	int num_gates;
++ 	struct beacon_data __rcu *beacon;
++--- a/net/mac80211/mesh.c
+++++ b/net/mac80211/mesh.c
++@@ -752,10 +752,8 @@ unsigned int ieee80211_new_mesh_header(s
++ 
++ 	meshhdr->ttl = sdata->u.mesh.mshcfg.dot11MeshTTL;
++ 
++-	/* FIXME: racy -- TX on multiple queues can be concurrent */
++-	put_unaligned(cpu_to_le32(sdata->u.mesh.mesh_seqnum), &meshhdr->seqnum);
++-	sdata->u.mesh.mesh_seqnum++;
++-
+++	put_unaligned_le32(atomic_inc_return(&sdata->u.mesh.mesh_seqnum),
+++			   &meshhdr->seqnum);
++ 	if (addr4or5 && !addr6) {
++ 		meshhdr->flags |= MESH_FLAGS_AE_A4;
++ 		memcpy(meshhdr->eaddr1, addr4or5, ETH_ALEN);
+diff --git a/package/kernel/mac80211/patches/subsys/319-wifi-mac80211-mesh-fast-xmit-support.patch b/package/kernel/mac80211/patches/subsys/319-wifi-mac80211-mesh-fast-xmit-support.patch
+new file mode 100644
+index 0000000000..968d2885f2
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/319-wifi-mac80211-mesh-fast-xmit-support.patch
+@@ -0,0 +1,850 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sun, 26 Feb 2023 13:53:08 +0100
++Subject: [PATCH] wifi: mac80211: mesh fast xmit support
++
++Previously, fast xmit only worked on interface types where initially a
++sta lookup is performed, and a cached header can be attached to the sta,
++requiring only some fields to be updated at runtime.
++
++This technique is not directly applicable for a mesh device type due
++to the dynamic nature of the topology and protocol. There are more
++addresses that need to be filled, and there is an extra header with a
++dynamic length based on the addressing mode.
++
++Change the code to cache entries contain a copy of the mesh subframe header +
++bridge tunnel header, as well as an embedded struct ieee80211_fast_tx, which
++contains the information for building the 802.11 header.
++
++Add a mesh specific early fast xmit call, which looks up a cached entry and
++adds only the mesh subframe header, before passing it over to the generic
++fast xmit code.
++
++To ensure the changes in network are reflected in these cached headers,
++flush affected cached entries on path changes, as well as other conditions
++that currently trigger a fast xmit check in other modes (key changes etc.)
++
++This code is loosely based on a previous implementation by:
++Sriram R <quic_srirrama@quicinc.com>
++
++Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/mac80211/ieee80211_i.h
+++++ b/net/mac80211/ieee80211_i.h
++@@ -37,6 +37,7 @@
++ extern const struct cfg80211_ops mac80211_config_ops;
++ 
++ struct ieee80211_local;
+++struct ieee80211_mesh_fast_tx;
++ 
++ /* Maximum number of broadcast/multicast frames to buffer when some of the
++  * associated stations are using power saving. */
++@@ -656,6 +657,19 @@ struct mesh_table {
++ 	atomic_t entries;		/* Up to MAX_MESH_NEIGHBOURS */
++ };
++ 
+++/**
+++ * struct mesh_tx_cache - mesh fast xmit header cache
+++ *
+++ * @rht: hash table containing struct ieee80211_mesh_fast_tx, using skb DA as key
+++ * @walk_head: linked list containing all ieee80211_mesh_fast_tx objects
+++ * @walk_lock: lock protecting walk_head and rht
+++ */
+++struct mesh_tx_cache {
+++	struct rhashtable rht;
+++	struct hlist_head walk_head;
+++	spinlock_t walk_lock;
+++};
+++
++ struct ieee80211_if_mesh {
++ 	struct timer_list housekeeping_timer;
++ 	struct timer_list mesh_path_timer;
++@@ -734,6 +748,7 @@ struct ieee80211_if_mesh {
++ 	struct mesh_table mpp_paths; /* Store paths for MPP&MAP */
++ 	int mesh_paths_generation;
++ 	int mpp_paths_generation;
+++	struct mesh_tx_cache tx_cache;
++ };
++ 
++ #ifdef CPTCFG_MAC80211_MESH
++@@ -2002,6 +2017,11 @@ int ieee80211_tx_control_port(struct wip
++ 			      int link_id, u64 *cookie);
++ int ieee80211_probe_mesh_link(struct wiphy *wiphy, struct net_device *dev,
++ 			      const u8 *buf, size_t len);
+++void __ieee80211_xmit_fast(struct ieee80211_sub_if_data *sdata,
+++			   struct sta_info *sta,
+++			   struct ieee80211_fast_tx *fast_tx,
+++			   struct sk_buff *skb, bool ampdu,
+++			   const u8 *da, const u8 *sa);
++ 
++ /* HT */
++ void ieee80211_apply_htcap_overrides(struct ieee80211_sub_if_data *sdata,
++--- a/net/mac80211/mesh.c
+++++ b/net/mac80211/mesh.c
++@@ -10,6 +10,7 @@
++ #include <asm/unaligned.h>
++ #include "ieee80211_i.h"
++ #include "mesh.h"
+++#include "wme.h"
++ #include "driver-ops.h"
++ 
++ static int mesh_allocated;
++@@ -698,6 +699,95 @@ ieee80211_mesh_update_bss_params(struct
++ 			__le32_to_cpu(he_oper->he_oper_params);
++ }
++ 
+++bool ieee80211_mesh_xmit_fast(struct ieee80211_sub_if_data *sdata,
+++			      struct sk_buff *skb, u32 ctrl_flags)
+++{
+++	struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh;
+++	struct ieee80211_mesh_fast_tx *entry;
+++	struct ieee80211s_hdr *meshhdr;
+++	u8 sa[ETH_ALEN] __aligned(2);
+++	struct tid_ampdu_tx *tid_tx;
+++	struct sta_info *sta;
+++	bool copy_sa = false;
+++	u16 ethertype;
+++	u8 tid;
+++
+++	if (ctrl_flags & IEEE80211_TX_CTRL_SKIP_MPATH_LOOKUP)
+++		return false;
+++
+++	if (ifmsh->mshcfg.dot11MeshNolearn)
+++		return false;
+++
+++	/* Add support for these cases later */
+++	if (ifmsh->ps_peers_light_sleep || ifmsh->ps_peers_deep_sleep)
+++		return false;
+++
+++	if (is_multicast_ether_addr(skb->data))
+++		return false;
+++
+++	ethertype = (skb->data[12] << 8) | skb->data[13];
+++	if (ethertype < ETH_P_802_3_MIN)
+++		return false;
+++
+++	if (skb->sk && skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS)
+++		return false;
+++
+++	if (skb->ip_summed == CHECKSUM_PARTIAL) {
+++		skb_set_transport_header(skb, skb_checksum_start_offset(skb));
+++		if (skb_checksum_help(skb))
+++			return false;
+++	}
+++
+++	entry = mesh_fast_tx_get(sdata, skb->data);
+++	if (!entry)
+++		return false;
+++
+++	if (skb_headroom(skb) < entry->hdrlen + entry->fast_tx.hdr_len)
+++		return false;
+++
+++	sta = rcu_dereference(entry->mpath->next_hop);
+++	if (!sta)
+++		return false;
+++
+++	tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
+++	tid_tx = rcu_dereference(sta->ampdu_mlme.tid_tx[tid]);
+++	if (tid_tx) {
+++		if (!test_bit(HT_AGG_STATE_OPERATIONAL, &tid_tx->state))
+++			return false;
+++		if (tid_tx->timeout)
+++			tid_tx->last_tx = jiffies;
+++	}
+++
+++	skb = skb_share_check(skb, GFP_ATOMIC);
+++	if (!skb)
+++		return true;
+++
+++	skb_set_queue_mapping(skb, ieee80211_select_queue(sdata, sta, skb));
+++
+++	meshhdr = (struct ieee80211s_hdr *)entry->hdr;
+++	if ((meshhdr->flags & MESH_FLAGS_AE) == MESH_FLAGS_AE_A5_A6) {
+++		/* preserve SA from eth header for 6-addr frames */
+++		ether_addr_copy(sa, skb->data + ETH_ALEN);
+++		copy_sa = true;
+++	}
+++
+++	memcpy(skb_push(skb, entry->hdrlen - 2 * ETH_ALEN), entry->hdr,
+++	       entry->hdrlen);
+++
+++	meshhdr = (struct ieee80211s_hdr *)skb->data;
+++	put_unaligned_le32(atomic_inc_return(&sdata->u.mesh.mesh_seqnum),
+++			   &meshhdr->seqnum);
+++	meshhdr->ttl = sdata->u.mesh.mshcfg.dot11MeshTTL;
+++	if (copy_sa)
+++	    ether_addr_copy(meshhdr->eaddr2, sa);
+++
+++	skb_push(skb, 2 * ETH_ALEN);
+++	__ieee80211_xmit_fast(sdata, sta, &entry->fast_tx, skb, tid_tx,
+++			      entry->mpath->dst, sdata->vif.addr);
+++
+++	return true;
+++}
+++
++ /**
++  * ieee80211_fill_mesh_addresses - fill addresses of a locally originated mesh frame
++  * @hdr:	802.11 frame header
++@@ -780,6 +870,8 @@ static void ieee80211_mesh_housekeeping(
++ 	changed = mesh_accept_plinks_update(sdata);
++ 	ieee80211_mbss_info_change_notify(sdata, changed);
++ 
+++	mesh_fast_tx_gc(sdata);
+++
++ 	mod_timer(&ifmsh->housekeeping_timer,
++ 		  round_jiffies(jiffies +
++ 				IEEE80211_MESH_HOUSEKEEPING_INTERVAL));
++--- a/net/mac80211/mesh.h
+++++ b/net/mac80211/mesh.h
++@@ -122,11 +122,41 @@ struct mesh_path {
++ 	u8 rann_snd_addr[ETH_ALEN];
++ 	u32 rann_metric;
++ 	unsigned long last_preq_to_root;
+++	unsigned long fast_tx_check;
++ 	bool is_root;
++ 	bool is_gate;
++ 	u32 path_change_count;
++ };
++ 
+++#define MESH_FAST_TX_CACHE_MAX_SIZE		512
+++#define MESH_FAST_TX_CACHE_THRESHOLD_SIZE	384
+++#define MESH_FAST_TX_CACHE_TIMEOUT		8000 /* msecs */
+++
+++/**
+++ * struct ieee80211_mesh_fast_tx - cached mesh fast tx entry
+++ * @rhash: rhashtable pointer
+++ * @addr_key: The Ethernet DA which is the key for this entry
+++ * @fast_tx: base fast_tx data
+++ * @hdr: cached mesh and rfc1042 headers
+++ * @hdrlen: length of mesh + rfc1042
+++ * @walk_list: list containing all the fast tx entries
+++ * @mpath: mesh path corresponding to the Mesh DA
+++ * @mppath: MPP entry corresponding to this DA
+++ * @timestamp: Last used time of this entry
+++ */
+++struct ieee80211_mesh_fast_tx {
+++	struct rhash_head rhash;
+++	u8 addr_key[ETH_ALEN] __aligned(2);
+++
+++	struct ieee80211_fast_tx fast_tx;
+++	u8 hdr[sizeof(struct ieee80211s_hdr) + sizeof(rfc1042_header)];
+++	u16 hdrlen;
+++
+++	struct mesh_path *mpath, *mppath;
+++	struct hlist_node walk_list;
+++	unsigned long timestamp;
+++};
+++
++ /* Recent multicast cache */
++ /* RMC_BUCKETS must be a power of 2, maximum 256 */
++ #define RMC_BUCKETS		256
++@@ -298,6 +328,20 @@ void mesh_path_discard_frame(struct ieee
++ void mesh_path_tx_root_frame(struct ieee80211_sub_if_data *sdata);
++ 
++ bool mesh_action_is_path_sel(struct ieee80211_mgmt *mgmt);
+++struct ieee80211_mesh_fast_tx *
+++mesh_fast_tx_get(struct ieee80211_sub_if_data *sdata, const u8 *addr);
+++bool ieee80211_mesh_xmit_fast(struct ieee80211_sub_if_data *sdata,
+++			      struct sk_buff *skb, u32 ctrl_flags);
+++void mesh_fast_tx_cache(struct ieee80211_sub_if_data *sdata,
+++			struct sk_buff *skb, struct mesh_path *mpath);
+++void mesh_fast_tx_gc(struct ieee80211_sub_if_data *sdata);
+++void mesh_fast_tx_flush_addr(struct ieee80211_sub_if_data *sdata,
+++			     const u8 *addr);
+++void mesh_fast_tx_flush_mpath(struct mesh_path *mpath);
+++void mesh_fast_tx_flush_sta(struct ieee80211_sub_if_data *sdata,
+++			    struct sta_info *sta);
+++void mesh_path_refresh(struct ieee80211_sub_if_data *sdata,
+++		       struct mesh_path *mpath, const u8 *addr);
++ 
++ #ifdef CPTCFG_MAC80211_MESH
++ static inline
++--- a/net/mac80211/mesh_hwmp.c
+++++ b/net/mac80211/mesh_hwmp.c
++@@ -394,6 +394,7 @@ static u32 hwmp_route_info_get(struct ie
++ 	u32 orig_sn, orig_metric;
++ 	unsigned long orig_lifetime, exp_time;
++ 	u32 last_hop_metric, new_metric;
+++	bool flush_mpath = false;
++ 	bool process = true;
++ 	u8 hopcount;
++ 
++@@ -491,8 +492,10 @@ static u32 hwmp_route_info_get(struct ie
++ 		}
++ 
++ 		if (fresh_info) {
++-			if (rcu_access_pointer(mpath->next_hop) != sta)
+++			if (rcu_access_pointer(mpath->next_hop) != sta) {
++ 				mpath->path_change_count++;
+++				flush_mpath = true;
+++			}
++ 			mesh_path_assign_nexthop(mpath, sta);
++ 			mpath->flags |= MESH_PATH_SN_VALID;
++ 			mpath->metric = new_metric;
++@@ -502,6 +505,8 @@ static u32 hwmp_route_info_get(struct ie
++ 			mpath->hop_count = hopcount;
++ 			mesh_path_activate(mpath);
++ 			spin_unlock_bh(&mpath->state_lock);
+++			if (flush_mpath)
+++				mesh_fast_tx_flush_mpath(mpath);
++ 			ewma_mesh_fail_avg_init(&sta->mesh->fail_avg);
++ 			/* init it at a low value - 0 start is tricky */
++ 			ewma_mesh_fail_avg_add(&sta->mesh->fail_avg, 1);
++@@ -539,8 +544,10 @@ static u32 hwmp_route_info_get(struct ie
++ 		}
++ 
++ 		if (fresh_info) {
++-			if (rcu_access_pointer(mpath->next_hop) != sta)
+++			if (rcu_access_pointer(mpath->next_hop) != sta) {
++ 				mpath->path_change_count++;
+++				flush_mpath = true;
+++			}
++ 			mesh_path_assign_nexthop(mpath, sta);
++ 			mpath->metric = last_hop_metric;
++ 			mpath->exp_time = time_after(mpath->exp_time, exp_time)
++@@ -548,6 +555,8 @@ static u32 hwmp_route_info_get(struct ie
++ 			mpath->hop_count = 1;
++ 			mesh_path_activate(mpath);
++ 			spin_unlock_bh(&mpath->state_lock);
+++			if (flush_mpath)
+++				mesh_fast_tx_flush_mpath(mpath);
++ 			ewma_mesh_fail_avg_init(&sta->mesh->fail_avg);
++ 			/* init it at a low value - 0 start is tricky */
++ 			ewma_mesh_fail_avg_add(&sta->mesh->fail_avg, 1);
++@@ -1215,6 +1224,20 @@ static int mesh_nexthop_lookup_nolearn(s
++ 	return 0;
++ }
++ 
+++void mesh_path_refresh(struct ieee80211_sub_if_data *sdata,
+++		       struct mesh_path *mpath, const u8 *addr)
+++{
+++	if (mpath->flags & (MESH_PATH_REQ_QUEUED | MESH_PATH_FIXED |
+++			    MESH_PATH_RESOLVING))
+++		return;
+++
+++	if (time_after(jiffies,
+++		       mpath->exp_time -
+++		       msecs_to_jiffies(sdata->u.mesh.mshcfg.path_refresh_time)) &&
+++	    (!addr || ether_addr_equal(sdata->vif.addr, addr)))
+++		mesh_queue_preq(mpath, PREQ_Q_F_START | PREQ_Q_F_REFRESH);
+++}
+++
++ /**
++  * mesh_nexthop_lookup - put the appropriate next hop on a mesh frame. Calling
++  * this function is considered "using" the associated mpath, so preempt a path
++@@ -1242,19 +1265,15 @@ int mesh_nexthop_lookup(struct ieee80211
++ 	if (!mpath || !(mpath->flags & MESH_PATH_ACTIVE))
++ 		return -ENOENT;
++ 
++-	if (time_after(jiffies,
++-		       mpath->exp_time -
++-		       msecs_to_jiffies(sdata->u.mesh.mshcfg.path_refresh_time)) &&
++-	    ether_addr_equal(sdata->vif.addr, hdr->addr4) &&
++-	    !(mpath->flags & MESH_PATH_RESOLVING) &&
++-	    !(mpath->flags & MESH_PATH_FIXED))
++-		mesh_queue_preq(mpath, PREQ_Q_F_START | PREQ_Q_F_REFRESH);
+++	mesh_path_refresh(sdata, mpath, hdr->addr4);
++ 
++ 	next_hop = rcu_dereference(mpath->next_hop);
++ 	if (next_hop) {
++ 		memcpy(hdr->addr1, next_hop->sta.addr, ETH_ALEN);
++ 		memcpy(hdr->addr2, sdata->vif.addr, ETH_ALEN);
++ 		ieee80211_mps_set_frame_flags(sdata, next_hop, hdr);
+++		if (ieee80211_hw_check(&sdata->local->hw, SUPPORT_FAST_XMIT))
+++			mesh_fast_tx_cache(sdata, skb, mpath);
++ 		return 0;
++ 	}
++ 
++--- a/net/mac80211/mesh_pathtbl.c
+++++ b/net/mac80211/mesh_pathtbl.c
++@@ -14,6 +14,7 @@
++ #include "wme.h"
++ #include "ieee80211_i.h"
++ #include "mesh.h"
+++#include <linux/rhashtable.h>
++ 
++ static void mesh_path_free_rcu(struct mesh_table *tbl, struct mesh_path *mpath);
++ 
++@@ -32,6 +33,41 @@ static const struct rhashtable_params me
++ 	.hashfn = mesh_table_hash,
++ };
++ 
+++static const struct rhashtable_params fast_tx_rht_params = {
+++	.nelem_hint = 10,
+++	.automatic_shrinking = true,
+++	.key_len = ETH_ALEN,
+++	.key_offset = offsetof(struct ieee80211_mesh_fast_tx, addr_key),
+++	.head_offset = offsetof(struct ieee80211_mesh_fast_tx, rhash),
+++	.hashfn = mesh_table_hash,
+++};
+++
+++static void __mesh_fast_tx_entry_free(void *ptr, void *tblptr)
+++{
+++	struct ieee80211_mesh_fast_tx *entry = ptr;
+++
+++	kfree_rcu(entry, fast_tx.rcu_head);
+++}
+++
+++static void mesh_fast_tx_deinit(struct ieee80211_sub_if_data *sdata)
+++{
+++	struct mesh_tx_cache *cache;
+++
+++	cache = &sdata->u.mesh.tx_cache;
+++	rhashtable_free_and_destroy(&cache->rht,
+++				    __mesh_fast_tx_entry_free, NULL);
+++}
+++
+++static void mesh_fast_tx_init(struct ieee80211_sub_if_data *sdata)
+++{
+++	struct mesh_tx_cache *cache;
+++
+++	cache = &sdata->u.mesh.tx_cache;
+++	rhashtable_init(&cache->rht, &fast_tx_rht_params);
+++	INIT_HLIST_HEAD(&cache->walk_head);
+++	spin_lock_init(&cache->walk_lock);
+++}
+++
++ static inline bool mpath_expired(struct mesh_path *mpath)
++ {
++ 	return (mpath->flags & MESH_PATH_ACTIVE) &&
++@@ -381,6 +417,243 @@ struct mesh_path *mesh_path_new(struct i
++ 	return new_mpath;
++ }
++ 
+++static void mesh_fast_tx_entry_free(struct mesh_tx_cache *cache,
+++				    struct ieee80211_mesh_fast_tx *entry)
+++{
+++	hlist_del_rcu(&entry->walk_list);
+++	rhashtable_remove_fast(&cache->rht, &entry->rhash, fast_tx_rht_params);
+++	kfree_rcu(entry, fast_tx.rcu_head);
+++}
+++
+++struct ieee80211_mesh_fast_tx *
+++mesh_fast_tx_get(struct ieee80211_sub_if_data *sdata, const u8 *addr)
+++{
+++	struct ieee80211_mesh_fast_tx *entry;
+++	struct mesh_tx_cache *cache;
+++
+++	cache = &sdata->u.mesh.tx_cache;
+++	entry = rhashtable_lookup(&cache->rht, addr, fast_tx_rht_params);
+++	if (!entry)
+++		return NULL;
+++
+++	if (!(entry->mpath->flags & MESH_PATH_ACTIVE) ||
+++	    mpath_expired(entry->mpath)) {
+++		spin_lock_bh(&cache->walk_lock);
+++		entry = rhashtable_lookup(&cache->rht, addr, fast_tx_rht_params);
+++		if (entry)
+++		    mesh_fast_tx_entry_free(cache, entry);
+++		spin_unlock_bh(&cache->walk_lock);
+++		return NULL;
+++	}
+++
+++	mesh_path_refresh(sdata, entry->mpath, NULL);
+++	if (entry->mppath)
+++		entry->mppath->exp_time = jiffies;
+++	entry->timestamp = jiffies;
+++
+++	return entry;
+++}
+++
+++void mesh_fast_tx_cache(struct ieee80211_sub_if_data *sdata,
+++			struct sk_buff *skb, struct mesh_path *mpath)
+++{
+++	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
+++	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+++	struct ieee80211_mesh_fast_tx *entry, *prev;
+++	struct ieee80211_mesh_fast_tx build = {};
+++	struct ieee80211s_hdr *meshhdr;
+++	struct mesh_tx_cache *cache;
+++	struct ieee80211_key *key;
+++	struct mesh_path *mppath;
+++	struct sta_info *sta;
+++	u8 *qc;
+++
+++	if (sdata->noack_map ||
+++	    !ieee80211_is_data_qos(hdr->frame_control))
+++		return;
+++
+++	build.fast_tx.hdr_len = ieee80211_hdrlen(hdr->frame_control);
+++	meshhdr = (struct ieee80211s_hdr *)(skb->data + build.fast_tx.hdr_len);
+++	build.hdrlen = ieee80211_get_mesh_hdrlen(meshhdr);
+++
+++	cache = &sdata->u.mesh.tx_cache;
+++	if (atomic_read(&cache->rht.nelems) >= MESH_FAST_TX_CACHE_MAX_SIZE)
+++		return;
+++
+++	sta = rcu_dereference(mpath->next_hop);
+++	if (!sta)
+++		return;
+++
+++	if ((meshhdr->flags & MESH_FLAGS_AE) == MESH_FLAGS_AE_A5_A6) {
+++		/* This is required to keep the mppath alive */
+++		mppath = mpp_path_lookup(sdata, meshhdr->eaddr1);
+++		if (!mppath)
+++			return;
+++		build.mppath = mppath;
+++	} else if (ieee80211_has_a4(hdr->frame_control)) {
+++		mppath = mpath;
+++	} else {
+++		return;
+++	}
+++
+++	/* rate limit, in case fast xmit can't be enabled */
+++	if (mppath->fast_tx_check == jiffies)
+++		return;
+++
+++	mppath->fast_tx_check = jiffies;
+++
+++	/*
+++	 * Same use of the sta lock as in ieee80211_check_fast_xmit, in order
+++	 * to protect against concurrent sta key updates.
+++	 */
+++	spin_lock_bh(&sta->lock);
+++	key = rcu_access_pointer(sta->ptk[sta->ptk_idx]);
+++	if (!key)
+++		key = rcu_access_pointer(sdata->default_unicast_key);
+++	build.fast_tx.key = key;
+++
+++	if (key) {
+++		bool gen_iv, iv_spc;
+++
+++		gen_iv = key->conf.flags & IEEE80211_KEY_FLAG_GENERATE_IV;
+++		iv_spc = key->conf.flags & IEEE80211_KEY_FLAG_PUT_IV_SPACE;
+++
+++		if (!(key->flags & KEY_FLAG_UPLOADED_TO_HARDWARE) ||
+++		    (key->flags & KEY_FLAG_TAINTED))
+++			goto unlock_sta;
+++
+++		switch (key->conf.cipher) {
+++		case WLAN_CIPHER_SUITE_CCMP:
+++		case WLAN_CIPHER_SUITE_CCMP_256:
+++			if (gen_iv)
+++				build.fast_tx.pn_offs = build.fast_tx.hdr_len;
+++			if (gen_iv || iv_spc)
+++				build.fast_tx.hdr_len += IEEE80211_CCMP_HDR_LEN;
+++			break;
+++		case WLAN_CIPHER_SUITE_GCMP:
+++		case WLAN_CIPHER_SUITE_GCMP_256:
+++			if (gen_iv)
+++				build.fast_tx.pn_offs = build.fast_tx.hdr_len;
+++			if (gen_iv || iv_spc)
+++				build.fast_tx.hdr_len += IEEE80211_GCMP_HDR_LEN;
+++			break;
+++		default:
+++			goto unlock_sta;
+++		}
+++	}
+++
+++	memcpy(build.addr_key, mppath->dst, ETH_ALEN);
+++	build.timestamp = jiffies;
+++	build.fast_tx.band = info->band;
+++	build.fast_tx.da_offs = offsetof(struct ieee80211_hdr, addr3);
+++	build.fast_tx.sa_offs = offsetof(struct ieee80211_hdr, addr4);
+++	build.mpath = mpath;
+++	memcpy(build.hdr, meshhdr, build.hdrlen);
+++	memcpy(build.hdr + build.hdrlen, rfc1042_header, sizeof(rfc1042_header));
+++	build.hdrlen += sizeof(rfc1042_header);
+++	memcpy(build.fast_tx.hdr, hdr, build.fast_tx.hdr_len);
+++
+++	hdr = (struct ieee80211_hdr *)build.fast_tx.hdr;
+++	if (build.fast_tx.key)
+++		hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PROTECTED);
+++
+++	qc = ieee80211_get_qos_ctl(hdr);
+++	qc[1] |= IEEE80211_QOS_CTL_MESH_CONTROL_PRESENT >> 8;
+++
+++	entry = kmemdup(&build, sizeof(build), GFP_ATOMIC);
+++	if (!entry)
+++		goto unlock_sta;
+++
+++	spin_lock(&cache->walk_lock);
+++	prev = rhashtable_lookup_get_insert_fast(&cache->rht,
+++						 &entry->rhash,
+++						 fast_tx_rht_params);
+++	if (unlikely(IS_ERR(prev))) {
+++		kfree(entry);
+++		goto unlock_cache;
+++	}
+++
+++	/*
+++	 * replace any previous entry in the hash table, in case we're
+++	 * replacing it with a different type (e.g. mpath -> mpp)
+++	 */
+++	if (unlikely(prev)) {
+++		rhashtable_replace_fast(&cache->rht, &prev->rhash,
+++					&entry->rhash, fast_tx_rht_params);
+++		hlist_del_rcu(&prev->walk_list);
+++		kfree_rcu(prev, fast_tx.rcu_head);
+++	}
+++
+++	hlist_add_head(&entry->walk_list, &cache->walk_head);
+++
+++unlock_cache:
+++	spin_unlock(&cache->walk_lock);
+++unlock_sta:
+++	spin_unlock_bh(&sta->lock);
+++}
+++
+++void mesh_fast_tx_gc(struct ieee80211_sub_if_data *sdata)
+++{
+++	unsigned long timeout = msecs_to_jiffies(MESH_FAST_TX_CACHE_TIMEOUT);
+++	struct mesh_tx_cache *cache;
+++	struct ieee80211_mesh_fast_tx *entry;
+++	struct hlist_node *n;
+++
+++	cache = &sdata->u.mesh.tx_cache;
+++	if (atomic_read(&cache->rht.nelems) < MESH_FAST_TX_CACHE_THRESHOLD_SIZE)
+++		return;
+++
+++	spin_lock_bh(&cache->walk_lock);
+++	hlist_for_each_entry_safe(entry, n, &cache->walk_head, walk_list)
+++		if (!time_is_after_jiffies(entry->timestamp + timeout))
+++			mesh_fast_tx_entry_free(cache, entry);
+++	spin_unlock_bh(&cache->walk_lock);
+++}
+++
+++void mesh_fast_tx_flush_mpath(struct mesh_path *mpath)
+++{
+++	struct ieee80211_sub_if_data *sdata = mpath->sdata;
+++	struct mesh_tx_cache *cache = &sdata->u.mesh.tx_cache;
+++	struct ieee80211_mesh_fast_tx *entry;
+++	struct hlist_node *n;
+++
+++	cache = &sdata->u.mesh.tx_cache;
+++	spin_lock_bh(&cache->walk_lock);
+++	hlist_for_each_entry_safe(entry, n, &cache->walk_head, walk_list)
+++		if (entry->mpath == mpath)
+++			mesh_fast_tx_entry_free(cache, entry);
+++	spin_unlock_bh(&cache->walk_lock);
+++}
+++
+++void mesh_fast_tx_flush_sta(struct ieee80211_sub_if_data *sdata,
+++			    struct sta_info *sta)
+++{
+++	struct mesh_tx_cache *cache = &sdata->u.mesh.tx_cache;
+++	struct ieee80211_mesh_fast_tx *entry;
+++	struct hlist_node *n;
+++
+++	cache = &sdata->u.mesh.tx_cache;
+++	spin_lock_bh(&cache->walk_lock);
+++	hlist_for_each_entry_safe(entry, n, &cache->walk_head, walk_list)
+++		if (rcu_access_pointer(entry->mpath->next_hop) == sta)
+++			mesh_fast_tx_entry_free(cache, entry);
+++	spin_unlock_bh(&cache->walk_lock);
+++}
+++
+++void mesh_fast_tx_flush_addr(struct ieee80211_sub_if_data *sdata,
+++			     const u8 *addr)
+++{
+++	struct mesh_tx_cache *cache = &sdata->u.mesh.tx_cache;
+++	struct ieee80211_mesh_fast_tx *entry;
+++
+++	cache = &sdata->u.mesh.tx_cache;
+++	spin_lock_bh(&cache->walk_lock);
+++	entry = rhashtable_lookup(&cache->rht, addr, fast_tx_rht_params);
+++	if (entry)
+++		mesh_fast_tx_entry_free(cache, entry);
+++	spin_unlock_bh(&cache->walk_lock);
+++}
+++
++ /**
++  * mesh_path_add - allocate and add a new path to the mesh path table
++  * @dst: destination address of the path (ETH_ALEN length)
++@@ -464,6 +737,8 @@ int mpp_path_add(struct ieee80211_sub_if
++ 
++ 	if (ret)
++ 		kfree(new_mpath);
+++	else
+++		mesh_fast_tx_flush_addr(sdata, dst);
++ 
++ 	sdata->u.mesh.mpp_paths_generation++;
++ 	return ret;
++@@ -523,6 +798,10 @@ static void __mesh_path_del(struct mesh_
++ {
++ 	hlist_del_rcu(&mpath->walk_list);
++ 	rhashtable_remove_fast(&tbl->rhead, &mpath->rhash, mesh_rht_params);
+++	if (tbl == &mpath->sdata->u.mesh.mpp_paths)
+++		mesh_fast_tx_flush_addr(mpath->sdata, mpath->dst);
+++	else
+++		mesh_fast_tx_flush_mpath(mpath);
++ 	mesh_path_free_rcu(tbl, mpath);
++ }
++ 
++@@ -747,6 +1026,7 @@ void mesh_path_fix_nexthop(struct mesh_p
++ 	mpath->exp_time = 0;
++ 	mpath->flags = MESH_PATH_FIXED | MESH_PATH_SN_VALID;
++ 	mesh_path_activate(mpath);
+++	mesh_fast_tx_flush_mpath(mpath);
++ 	spin_unlock_bh(&mpath->state_lock);
++ 	ewma_mesh_fail_avg_init(&next_hop->mesh->fail_avg);
++ 	/* init it at a low value - 0 start is tricky */
++@@ -758,6 +1038,7 @@ void mesh_pathtbl_init(struct ieee80211_
++ {
++ 	mesh_table_init(&sdata->u.mesh.mesh_paths);
++ 	mesh_table_init(&sdata->u.mesh.mpp_paths);
+++	mesh_fast_tx_init(sdata);
++ }
++ 
++ static
++@@ -785,6 +1066,7 @@ void mesh_path_expire(struct ieee80211_s
++ 
++ void mesh_pathtbl_unregister(struct ieee80211_sub_if_data *sdata)
++ {
+++	mesh_fast_tx_deinit(sdata);
++ 	mesh_table_free(&sdata->u.mesh.mesh_paths);
++ 	mesh_table_free(&sdata->u.mesh.mpp_paths);
++ }
++--- a/net/mac80211/rx.c
+++++ b/net/mac80211/rx.c
++@@ -2791,6 +2791,7 @@ ieee80211_rx_mesh_data(struct ieee80211_
++ 	if (mesh_hdr->flags & MESH_FLAGS_AE) {
++ 		struct mesh_path *mppath;
++ 		char *proxied_addr;
+++		bool update = false;
++ 
++ 		if (multicast)
++ 			proxied_addr = mesh_hdr->eaddr1;
++@@ -2806,11 +2807,18 @@ ieee80211_rx_mesh_data(struct ieee80211_
++ 			mpp_path_add(sdata, proxied_addr, eth->h_source);
++ 		} else {
++ 			spin_lock_bh(&mppath->state_lock);
++-			if (!ether_addr_equal(mppath->mpp, eth->h_source))
+++			if (!ether_addr_equal(mppath->mpp, eth->h_source)) {
++ 				memcpy(mppath->mpp, eth->h_source, ETH_ALEN);
+++				update = true;
+++			}
++ 			mppath->exp_time = jiffies;
++ 			spin_unlock_bh(&mppath->state_lock);
++ 		}
+++
+++		/* flush fast xmit cache if the address path changed */
+++		if (update)
+++			mesh_fast_tx_flush_addr(sdata, proxied_addr);
+++
++ 		rcu_read_unlock();
++ 	}
++ 
++--- a/net/mac80211/tx.c
+++++ b/net/mac80211/tx.c
++@@ -3022,6 +3022,9 @@ void ieee80211_check_fast_xmit(struct st
++ 	if (!ieee80211_hw_check(&local->hw, SUPPORT_FAST_XMIT))
++ 		return;
++ 
+++	if (ieee80211_vif_is_mesh(&sdata->vif))
+++		mesh_fast_tx_flush_sta(sdata, sta);
+++
++ 	/* Locking here protects both the pointer itself, and against concurrent
++ 	 * invocations winning data access races to, e.g., the key pointer that
++ 	 * is used.
++@@ -3403,6 +3406,9 @@ static bool ieee80211_amsdu_aggregate(st
++ 	if (sdata->vif.offload_flags & IEEE80211_OFFLOAD_ENCAP_ENABLED)
++ 		return false;
++ 
+++	if (ieee80211_vif_is_mesh(&sdata->vif))
+++		return false;
+++
++ 	if (skb_is_gso(skb))
++ 		return false;
++ 
++@@ -3635,10 +3641,11 @@ free:
++ 	return NULL;
++ }
++ 
++-static void __ieee80211_xmit_fast(struct ieee80211_sub_if_data *sdata,
++-				  struct sta_info *sta,
++-				  struct ieee80211_fast_tx *fast_tx,
++-				  struct sk_buff *skb, u8 tid, bool ampdu)
+++void __ieee80211_xmit_fast(struct ieee80211_sub_if_data *sdata,
+++			   struct sta_info *sta,
+++			   struct ieee80211_fast_tx *fast_tx,
+++			   struct sk_buff *skb, bool ampdu,
+++			   const u8 *da, const u8 *sa)
++ {
++ 	struct ieee80211_local *local = sdata->local;
++ 	struct ieee80211_hdr *hdr = (void *)fast_tx->hdr;
++@@ -3647,7 +3654,6 @@ static void __ieee80211_xmit_fast(struct
++ 	ieee80211_tx_result r;
++ 	int hw_headroom = sdata->local->hw.extra_tx_headroom;
++ 	int extra_head = fast_tx->hdr_len - (ETH_HLEN - 2);
++-	struct ethhdr eth;
++ 
++ 	skb = skb_share_check(skb, GFP_ATOMIC);
++ 	if (unlikely(!skb))
++@@ -3667,11 +3673,10 @@ static void __ieee80211_xmit_fast(struct
++ 					  ENCRYPT_NO)))
++ 		goto free;
++ 
++-	memcpy(&eth, skb->data, ETH_HLEN - 2);
++ 	hdr = skb_push(skb, extra_head);
++ 	memcpy(skb->data, fast_tx->hdr, fast_tx->hdr_len);
++-	memcpy(skb->data + fast_tx->da_offs, eth.h_dest, ETH_ALEN);
++-	memcpy(skb->data + fast_tx->sa_offs, eth.h_source, ETH_ALEN);
+++	memcpy(skb->data + fast_tx->da_offs, da, ETH_ALEN);
+++	memcpy(skb->data + fast_tx->sa_offs, sa, ETH_ALEN);
++ 
++ 	info = IEEE80211_SKB_CB(skb);
++ 	memset(info, 0, sizeof(*info));
++@@ -3690,7 +3695,8 @@ static void __ieee80211_xmit_fast(struct
++ #endif
++ 
++ 	if (hdr->frame_control & cpu_to_le16(IEEE80211_STYPE_QOS_DATA)) {
++-		tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
+++		u8 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
+++
++ 		*ieee80211_get_qos_ctl(hdr) = tid;
++ 	}
++ 
++@@ -3733,6 +3739,7 @@ static bool ieee80211_xmit_fast(struct i
++ 	struct ieee80211_hdr *hdr = (void *)fast_tx->hdr;
++ 	struct tid_ampdu_tx *tid_tx = NULL;
++ 	struct sk_buff *next;
+++	struct ethhdr eth;
++ 	u8 tid = IEEE80211_NUM_TIDS;
++ 
++ 	/* control port protocol needs a lot of special handling */
++@@ -3758,6 +3765,8 @@ static bool ieee80211_xmit_fast(struct i
++ 		}
++ 	}
++ 
+++	memcpy(&eth, skb->data, ETH_HLEN - 2);
+++
++ 	/* after this point (skb is modified) we cannot return false */
++ 	skb = ieee80211_tx_skb_fixup(skb, ieee80211_sdata_netdev_features(sdata));
++ 	if (!skb)
++@@ -3765,7 +3774,8 @@ static bool ieee80211_xmit_fast(struct i
++ 
++ 	skb_list_walk_safe(skb, skb, next) {
++ 		skb_mark_not_on_list(skb);
++-		__ieee80211_xmit_fast(sdata, sta, fast_tx, skb, tid, tid_tx);
+++		__ieee80211_xmit_fast(sdata, sta, fast_tx, skb, tid_tx,
+++				      eth.h_dest, eth.h_source);
++ 	}
++ 
++ 	return true;
++@@ -4252,8 +4262,15 @@ void __ieee80211_subif_start_xmit(struct
++ 		return;
++ 	}
++ 
+++	sk_pacing_shift_update(skb->sk, sdata->local->hw.tx_sk_pacing_shift);
+++
++ 	rcu_read_lock();
++ 
+++	if (ieee80211_vif_is_mesh(&sdata->vif) &&
+++	    ieee80211_hw_check(&local->hw, SUPPORT_FAST_XMIT) &&
+++	    ieee80211_mesh_xmit_fast(sdata, skb, ctrl_flags))
+++		goto out;
+++
++ 	if (ieee80211_lookup_ra_sta(sdata, skb, &sta))
++ 		goto out_free;
++ 
++@@ -4263,8 +4280,6 @@ void __ieee80211_subif_start_xmit(struct
++ 	skb_set_queue_mapping(skb, ieee80211_select_queue(sdata, sta, skb));
++ 	ieee80211_aggr_check(sdata, sta, skb);
++ 
++-	sk_pacing_shift_update(skb->sk, sdata->local->hw.tx_sk_pacing_shift);
++-
++ 	if (sta) {
++ 		struct ieee80211_fast_tx *fast_tx;
++ 
+diff --git a/package/kernel/mac80211/patches/subsys/320-wifi-mac80211-use-mesh-header-cache-to-speed-up-mesh.patch b/package/kernel/mac80211/patches/subsys/320-wifi-mac80211-use-mesh-header-cache-to-speed-up-mesh.patch
+new file mode 100644
+index 0000000000..28b1ff1106
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/320-wifi-mac80211-use-mesh-header-cache-to-speed-up-mesh.patch
+@@ -0,0 +1,132 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Thu, 16 Feb 2023 11:07:30 +0100
++Subject: [PATCH] wifi: mac80211: use mesh header cache to speed up mesh
++ forwarding
++
++Significantly reduces mesh forwarding path CPU usage and enables the
++direct use of iTXQ.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/mac80211/rx.c
+++++ b/net/mac80211/rx.c
++@@ -2720,6 +2720,65 @@ ieee80211_deliver_skb(struct ieee80211_r
++ 	}
++ }
++ 
+++#ifdef CPTCFG_MAC80211_MESH
+++static bool
+++ieee80211_rx_mesh_fast_forward(struct ieee80211_sub_if_data *sdata,
+++			       struct sk_buff *skb, int hdrlen)
+++{
+++	struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh;
+++	struct ieee80211_mesh_fast_tx *entry = NULL;
+++	struct ieee80211s_hdr *mesh_hdr;
+++	struct tid_ampdu_tx *tid_tx;
+++	struct sta_info *sta;
+++	struct ethhdr eth;
+++	u8 tid;
+++
+++	mesh_hdr = (struct ieee80211s_hdr *)(skb->data + sizeof(eth));
+++	if ((mesh_hdr->flags & MESH_FLAGS_AE) == MESH_FLAGS_AE_A5_A6)
+++		entry = mesh_fast_tx_get(sdata, mesh_hdr->eaddr1);
+++	else if (!(mesh_hdr->flags & MESH_FLAGS_AE))
+++		entry = mesh_fast_tx_get(sdata, skb->data);
+++	if (!entry)
+++		return false;
+++
+++	sta = rcu_dereference(entry->mpath->next_hop);
+++	if (!sta)
+++		return false;
+++
+++	if (skb_linearize(skb))
+++		return false;
+++
+++	tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
+++	tid_tx = rcu_dereference(sta->ampdu_mlme.tid_tx[tid]);
+++	if (tid_tx) {
+++		if (!test_bit(HT_AGG_STATE_OPERATIONAL, &tid_tx->state))
+++			return false;
+++
+++		if (tid_tx->timeout)
+++			tid_tx->last_tx = jiffies;
+++	}
+++
+++	ieee80211_aggr_check(sdata, sta, skb);
+++
+++	if (ieee80211_get_8023_tunnel_proto(skb->data + hdrlen,
+++					    &skb->protocol))
+++		hdrlen += ETH_ALEN;
+++	else
+++		skb->protocol = htons(skb->len - hdrlen);
+++	skb_set_network_header(skb, hdrlen + 2);
+++
+++	skb->dev = sdata->dev;
+++	memcpy(&eth, skb->data, ETH_HLEN - 2);
+++	skb_pull(skb, 2);
+++	__ieee80211_xmit_fast(sdata, sta, &entry->fast_tx, skb, tid_tx,
+++			      eth.h_dest, eth.h_source);
+++	IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_unicast);
+++	IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_frames);
+++
+++	return true;
+++}
+++#endif
+++
++ static ieee80211_rx_result
++ ieee80211_rx_mesh_data(struct ieee80211_sub_if_data *sdata, struct sta_info *sta,
++ 		       struct sk_buff *skb)
++@@ -2824,6 +2883,10 @@ ieee80211_rx_mesh_data(struct ieee80211_
++ 
++ 	skb_set_queue_mapping(skb, ieee802_1d_to_ac[skb->priority]);
++ 
+++	if (!multicast &&
+++	    ieee80211_rx_mesh_fast_forward(sdata, skb, mesh_hdrlen))
+++		return RX_QUEUED;
+++
++ 	ieee80211_fill_mesh_addresses(&hdr, &hdr.frame_control,
++ 				      eth->h_dest, eth->h_source);
++ 	hdrlen = ieee80211_hdrlen(hdr.frame_control);
++@@ -2862,6 +2925,7 @@ ieee80211_rx_mesh_data(struct ieee80211_
++ 	info->control.flags |= IEEE80211_TX_INTCFL_NEED_TXPROCESSING;
++ 	info->control.vif = &sdata->vif;
++ 	info->control.jiffies = jiffies;
+++	fwd_skb->dev = sdata->dev;
++ 	if (multicast) {
++ 		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_mcast);
++ 		memcpy(fwd_hdr->addr2, sdata->vif.addr, ETH_ALEN);
++@@ -2883,7 +2947,6 @@ ieee80211_rx_mesh_data(struct ieee80211_
++ 	}
++ 
++ 	IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_frames);
++-	fwd_skb->dev = sdata->dev;
++ 	ieee80211_add_pending_skb(local, fwd_skb);
++ 
++ rx_accept:
++--- a/net/mac80211/ieee80211_i.h
+++++ b/net/mac80211/ieee80211_i.h
++@@ -2022,6 +2022,8 @@ void __ieee80211_xmit_fast(struct ieee80
++ 			   struct ieee80211_fast_tx *fast_tx,
++ 			   struct sk_buff *skb, bool ampdu,
++ 			   const u8 *da, const u8 *sa);
+++void ieee80211_aggr_check(struct ieee80211_sub_if_data *sdata,
+++			  struct sta_info *sta, struct sk_buff *skb);
++ 
++ /* HT */
++ void ieee80211_apply_htcap_overrides(struct ieee80211_sub_if_data *sdata,
++--- a/net/mac80211/tx.c
+++++ b/net/mac80211/tx.c
++@@ -1191,10 +1191,8 @@ static bool ieee80211_tx_prep_agg(struct
++ 	return queued;
++ }
++ 
++-static void
++-ieee80211_aggr_check(struct ieee80211_sub_if_data *sdata,
++-		     struct sta_info *sta,
++-		     struct sk_buff *skb)
+++void ieee80211_aggr_check(struct ieee80211_sub_if_data *sdata,
+++			  struct sta_info *sta, struct sk_buff *skb)
++ {
++ 	struct rate_control_ref *ref = sdata->local->rate_ctrl;
++ 	u16 tid;
+diff --git a/package/kernel/mac80211/patches/subsys/321-mac80211-fix-mesh-forwarding.patch b/package/kernel/mac80211/patches/subsys/321-mac80211-fix-mesh-forwarding.patch
+new file mode 100644
+index 0000000000..e2b268ae4c
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/321-mac80211-fix-mesh-forwarding.patch
+@@ -0,0 +1,32 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Mon, 20 Feb 2023 12:50:50 +0100
++Subject: [PATCH] mac80211: fix mesh forwarding
++
++Linearize packets (needed for forwarding A-MSDU subframes).
++Fix network header offset to fix flow dissector (and fair queueing).
++
++Fixes: 986e43b19ae9 ("wifi: mac80211: fix receiving A-MSDU frames on mesh interfaces")
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/mac80211/rx.c
+++++ b/net/mac80211/rx.c
++@@ -2904,6 +2904,9 @@ ieee80211_rx_mesh_data(struct ieee80211_
++ 
++ 		if (skb_cow_head(fwd_skb, hdrlen - sizeof(struct ethhdr)))
++ 			return RX_DROP_UNUSABLE;
+++
+++		if (skb_linearize(fwd_skb))
+++			return RX_DROP_UNUSABLE;
++ 	}
++ 
++ 	fwd_hdr = skb_push(fwd_skb, hdrlen - sizeof(struct ethhdr));
++@@ -2918,7 +2921,7 @@ ieee80211_rx_mesh_data(struct ieee80211_
++ 		hdrlen += ETH_ALEN;
++ 	else
++ 		fwd_skb->protocol = htons(fwd_skb->len - hdrlen);
++-	skb_set_network_header(fwd_skb, hdrlen);
+++	skb_set_network_header(fwd_skb, hdrlen + 2);
++ 
++ 	info = IEEE80211_SKB_CB(fwd_skb);
++ 	memset(info, 0, sizeof(*info));
+diff --git a/package/kernel/mac80211/patches/subsys/322-wifi-mac80211-fix-mesh-path-discovery-based-on-unica.patch b/package/kernel/mac80211/patches/subsys/322-wifi-mac80211-fix-mesh-path-discovery-based-on-unica.patch
+new file mode 100644
+index 0000000000..292a89ef92
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/322-wifi-mac80211-fix-mesh-path-discovery-based-on-unica.patch
+@@ -0,0 +1,52 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sun, 26 Feb 2023 20:30:20 +0100
++Subject: [PATCH] wifi: mac80211: fix mesh path discovery based on unicast
++ packets
++
++If a packet has reached its intended destination, it was bumped to the code
++that accepts it, without first checking if a mesh_path needs to be created
++based on the discovered source.
++Fix this by moving the destination address check further down
++
++Fixes: 986e43b19ae9 ("wifi: mac80211: fix receiving A-MSDU frames on mesh interfaces")
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/mac80211/rx.c
+++++ b/net/mac80211/rx.c
++@@ -2824,17 +2824,6 @@ ieee80211_rx_mesh_data(struct ieee80211_
++ 	    mesh_rmc_check(sdata, eth->h_source, mesh_hdr))
++ 		return RX_DROP_MONITOR;
++ 
++-	/* Frame has reached destination.  Don't forward */
++-	if (ether_addr_equal(sdata->vif.addr, eth->h_dest))
++-		goto rx_accept;
++-
++-	if (!ifmsh->mshcfg.dot11MeshForwarding) {
++-		if (is_multicast_ether_addr(eth->h_dest))
++-			goto rx_accept;
++-
++-		return RX_DROP_MONITOR;
++-	}
++-
++ 	/* forward packet */
++ 	if (sdata->crypto_tx_tailroom_needed_cnt)
++ 		tailroom = IEEE80211_ENCRYPT_TAILROOM;
++@@ -2881,6 +2870,17 @@ ieee80211_rx_mesh_data(struct ieee80211_
++ 		rcu_read_unlock();
++ 	}
++ 
+++	/* Frame has reached destination.  Don't forward */
+++	if (ether_addr_equal(sdata->vif.addr, eth->h_dest))
+++		goto rx_accept;
+++
+++	if (!ifmsh->mshcfg.dot11MeshForwarding) {
+++		if (is_multicast_ether_addr(eth->h_dest))
+++			goto rx_accept;
+++
+++		return RX_DROP_MONITOR;
+++	}
+++
++ 	skb_set_queue_mapping(skb, ieee802_1d_to_ac[skb->priority]);
++ 
++ 	if (!multicast &&
+diff --git a/package/kernel/mac80211/patches/subsys/323-v6.3-wifi-mac80211-Add-VHT-MU-MIMO-related-flags-in-ieee8.patch b/package/kernel/mac80211/patches/subsys/323-v6.3-wifi-mac80211-Add-VHT-MU-MIMO-related-flags-in-ieee8.patch
+new file mode 100644
+index 0000000000..e23dc4d226
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/323-v6.3-wifi-mac80211-Add-VHT-MU-MIMO-related-flags-in-ieee8.patch
+@@ -0,0 +1,68 @@
++From: Muna Sinada <quic_msinada@quicinc.com>
++Date: Wed, 5 Oct 2022 14:54:45 -0700
++Subject: [PATCH] wifi: mac80211: Add VHT MU-MIMO related flags in
++ ieee80211_bss_conf
++
++Adding flags for SU Beamformer, SU Beamformee, MU Beamformer and
++MU Beamformee for VHT. This is utilized to pass MU-MIMO
++configurations from user space to driver in AP mode.
++
++Signed-off-by: Muna Sinada <quic_msinada@quicinc.com>
++Link: https://lore.kernel.org/r/1665006886-23874-1-git-send-email-quic_msinada@quicinc.com
++[fixed indentation, removed redundant !!]
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++---
++
++--- a/include/net/mac80211.h
+++++ b/include/net/mac80211.h
++@@ -653,6 +653,14 @@ struct ieee80211_fils_discovery {
++  *	write-protected by sdata_lock and local->mtx so holding either is fine
++  *	for read access.
++  * @color_change_color: the bss color that will be used after the change.
+++ * @vht_su_beamformer: in AP mode, does this BSS support operation as an VHT SU
+++ *	beamformer
+++ * @vht_su_beamformee: in AP mode, does this BSS support operation as an VHT SU
+++ *	beamformee
+++ * @vht_mu_beamformer: in AP mode, does this BSS support operation as an VHT MU
+++ *	beamformer
+++ * @vht_mu_beamformee: in AP mode, does this BSS support operation as an VHT MU
+++ *	beamformee
++  */
++ struct ieee80211_bss_conf {
++ 	const u8 *bssid;
++@@ -726,6 +734,11 @@ struct ieee80211_bss_conf {
++ 
++ 	bool color_change_active;
++ 	u8 color_change_color;
+++
+++	bool vht_su_beamformer;
+++	bool vht_su_beamformee;
+++	bool vht_mu_beamformer;
+++	bool vht_mu_beamformee;
++ };
++ 
++ /**
++--- a/net/mac80211/cfg.c
+++++ b/net/mac80211/cfg.c
++@@ -1252,6 +1252,21 @@ static int ieee80211_start_ap(struct wip
++ 	prev_beacon_int = link_conf->beacon_int;
++ 	link_conf->beacon_int = params->beacon_interval;
++ 
+++	if (params->vht_cap) {
+++		link_conf->vht_su_beamformer =
+++			params->vht_cap->vht_cap_info &
+++				cpu_to_le32(IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE);
+++		link_conf->vht_su_beamformee =
+++			params->vht_cap->vht_cap_info &
+++				cpu_to_le32(IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE);
+++		link_conf->vht_mu_beamformer =
+++			params->vht_cap->vht_cap_info &
+++				cpu_to_le32(IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE);
+++		link_conf->vht_mu_beamformee =
+++			params->vht_cap->vht_cap_info &
+++				cpu_to_le32(IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE);
+++	}
+++
++ 	if (params->he_cap && params->he_oper) {
++ 		link_conf->he_support = true;
++ 		link_conf->htc_trig_based_pkt_ext =
+diff --git a/package/kernel/mac80211/patches/subsys/324-v6.3-wifi-mac80211-Add-HE-MU-MIMO-related-flags-in-ieee80.patch b/package/kernel/mac80211/patches/subsys/324-v6.3-wifi-mac80211-Add-HE-MU-MIMO-related-flags-in-ieee80.patch
+new file mode 100644
+index 0000000000..f843dba123
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/324-v6.3-wifi-mac80211-Add-HE-MU-MIMO-related-flags-in-ieee80.patch
+@@ -0,0 +1,68 @@
++From: Muna Sinada <quic_msinada@quicinc.com>
++Date: Wed, 5 Oct 2022 14:54:46 -0700
++Subject: [PATCH] wifi: mac80211: Add HE MU-MIMO related flags in
++ ieee80211_bss_conf
++
++Adding flags for SU Beamformer, SU Beamformee, MU Beamformer and Full
++Bandwidth UL MU-MIMO for HE. This is utilized to pass MU-MIMO
++configurations from user space to driver in AP mode.
++
++Signed-off-by: Muna Sinada <quic_msinada@quicinc.com>
++Link: https://lore.kernel.org/r/1665006886-23874-2-git-send-email-quic_msinada@quicinc.com
++[fixed indentation, removed redundant !!]
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++---
++
++--- a/include/net/mac80211.h
+++++ b/include/net/mac80211.h
++@@ -661,6 +661,15 @@ struct ieee80211_fils_discovery {
++  *	beamformer
++  * @vht_mu_beamformee: in AP mode, does this BSS support operation as an VHT MU
++  *	beamformee
+++ * @he_su_beamformer: in AP-mode, does this BSS support operation as an HE SU
+++ *	beamformer
+++ * @he_su_beamformee: in AP-mode, does this BSS support operation as an HE SU
+++ *	beamformee
+++ * @he_mu_beamformer: in AP-mode, does this BSS support operation as an HE MU
+++ *	beamformer
+++ * @he_full_ul_mumimo: does this BSS support the reception (AP) or transmission
+++ *	(non-AP STA) of an HE TB PPDU on an RU that spans the entire PPDU
+++ *	bandwidth
++  */
++ struct ieee80211_bss_conf {
++ 	const u8 *bssid;
++@@ -739,6 +748,10 @@ struct ieee80211_bss_conf {
++ 	bool vht_su_beamformee;
++ 	bool vht_mu_beamformer;
++ 	bool vht_mu_beamformee;
+++	bool he_su_beamformer;
+++	bool he_su_beamformee;
+++	bool he_mu_beamformer;
+++	bool he_full_ul_mumimo;
++ };
++ 
++ /**
++--- a/net/mac80211/cfg.c
+++++ b/net/mac80211/cfg.c
++@@ -1281,6 +1281,21 @@ static int ieee80211_start_ap(struct wip
++ 			changed |= BSS_CHANGED_HE_BSS_COLOR;
++ 	}
++ 
+++	if (params->he_cap) {
+++		link_conf->he_su_beamformer =
+++			params->he_cap->phy_cap_info[3] &
+++				IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
+++		link_conf->he_su_beamformee =
+++			params->he_cap->phy_cap_info[4] &
+++				IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE;
+++		link_conf->he_mu_beamformer =
+++			params->he_cap->phy_cap_info[4] &
+++				IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
+++		link_conf->he_full_ul_mumimo =
+++			params->he_cap->phy_cap_info[2] &
+++				IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO;
+++	}
+++
++ 	if (sdata->vif.type == NL80211_IFTYPE_AP &&
++ 	    params->mbssid_config.tx_wdev) {
++ 		err = ieee80211_set_ap_mbssid_options(sdata,
+diff --git a/package/kernel/mac80211/patches/subsys/325-wifi-mac80211-introduce-ieee80211_refresh_tx_agg_ses.patch b/package/kernel/mac80211/patches/subsys/325-wifi-mac80211-introduce-ieee80211_refresh_tx_agg_ses.patch
+new file mode 100644
+index 0000000000..1be5fcfbfa
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/325-wifi-mac80211-introduce-ieee80211_refresh_tx_agg_ses.patch
+@@ -0,0 +1,60 @@
++From: Ryder Lee <ryder.lee@mediatek.com>
++Date: Sat, 18 Feb 2023 01:50:05 +0800
++Subject: [PATCH] wifi: mac80211: introduce
++ ieee80211_refresh_tx_agg_session_timer()
++
++This allows low level drivers to refresh the tx agg session timer, based on
++querying stats from the firmware usually. Especially for some mt76 devices
++support .net_fill_forward_path would bypass mac80211, which leads to tx BA
++session timeout for certain clients.
++
++Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
++---
++
++--- a/include/net/mac80211.h
+++++ b/include/net/mac80211.h
++@@ -5964,6 +5964,18 @@ void ieee80211_queue_delayed_work(struct
++ 				  unsigned long delay);
++ 
++ /**
+++ * ieee80211_refresh_tx_agg_session_timer - Refresh a tx agg session timer.
+++ * @sta: the station for which to start a BA session
+++ * @tid: the TID to BA on.
+++ *
+++ * This function allows low level driver to refresh tx agg session timer
+++ * to maintain BA session, the session level will still be managed by the
+++ * mac80211.
+++ */
+++void ieee80211_refresh_tx_agg_session_timer(struct ieee80211_sta *sta,
+++					    u16 tid);
+++
+++/**
++  * ieee80211_start_tx_ba_session - Start a tx Block Ack session.
++  * @sta: the station for which to start a BA session
++  * @tid: the TID to BA on.
++--- a/net/mac80211/agg-tx.c
+++++ b/net/mac80211/agg-tx.c
++@@ -554,6 +554,23 @@ void ieee80211_tx_ba_session_handle_star
++ 	ieee80211_send_addba_with_timeout(sta, tid_tx);
++ }
++ 
+++void ieee80211_refresh_tx_agg_session_timer(struct ieee80211_sta *pubsta,
+++					    u16 tid)
+++{
+++	struct sta_info *sta = container_of(pubsta, struct sta_info, sta);
+++	struct tid_ampdu_tx *tid_tx;
+++
+++	if (WARN_ON_ONCE(tid >= IEEE80211_NUM_TIDS))
+++		return;
+++
+++	tid_tx = rcu_dereference(sta->ampdu_mlme.tid_tx[tid]);
+++	if (!tid_tx)
+++		return;
+++
+++	tid_tx->last_tx = jiffies;
+++}
+++EXPORT_SYMBOL(ieee80211_refresh_tx_agg_session_timer);
+++
++ /*
++  * After accepting the AddBA Response we activated a timer,
++  * resetting it after each frame that we send.
+diff --git a/package/kernel/mac80211/patches/subsys/326-wifi-mac80211-add-mesh-fast-rx-support.patch b/package/kernel/mac80211/patches/subsys/326-wifi-mac80211-add-mesh-fast-rx-support.patch
+new file mode 100644
+index 0000000000..11f39c2d10
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/326-wifi-mac80211-add-mesh-fast-rx-support.patch
+@@ -0,0 +1,77 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Thu, 2 Mar 2023 13:52:29 +0100
++Subject: [PATCH] wifi: mac80211: add mesh fast-rx support
++
++This helps bring down rx CPU usage by avoiding calls to the rx handlers in
++the slow path. Supports forwarding and local rx, including A-MSDU.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/mac80211/rx.c
+++++ b/net/mac80211/rx.c
++@@ -4564,6 +4564,12 @@ void ieee80211_check_fast_rx(struct sta_
++ 		}
++ 
++ 		break;
+++	case NL80211_IFTYPE_MESH_POINT:
+++		fastrx.expected_ds_bits = cpu_to_le16(IEEE80211_FCTL_FROMDS |
+++						      IEEE80211_FCTL_TODS);
+++		fastrx.da_offs = offsetof(struct ieee80211_hdr, addr3);
+++		fastrx.sa_offs = offsetof(struct ieee80211_hdr, addr4);
+++		break;
++ 	default:
++ 		goto clear;
++ 	}
++@@ -4772,6 +4778,7 @@ static bool ieee80211_invoke_fast_rx(str
++ 	struct sk_buff *skb = rx->skb;
++ 	struct ieee80211_hdr *hdr = (void *)skb->data;
++ 	struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
+++	static ieee80211_rx_result res;
++ 	int orig_len = skb->len;
++ 	int hdrlen = ieee80211_hdrlen(hdr->frame_control);
++ 	int snap_offs = hdrlen;
++@@ -4833,7 +4840,8 @@ static bool ieee80211_invoke_fast_rx(str
++ 		snap_offs += IEEE80211_CCMP_HDR_LEN;
++ 	}
++ 
++-	if (!(status->rx_flags & IEEE80211_RX_AMSDU)) {
+++	if (!ieee80211_vif_is_mesh(&rx->sdata->vif) &&
+++	    !(status->rx_flags & IEEE80211_RX_AMSDU)) {
++ 		if (!pskb_may_pull(skb, snap_offs + sizeof(*payload)))
++ 			return false;
++ 
++@@ -4872,13 +4880,29 @@ static bool ieee80211_invoke_fast_rx(str
++ 	/* do the header conversion - first grab the addresses */
++ 	ether_addr_copy(addrs.da, skb->data + fast_rx->da_offs);
++ 	ether_addr_copy(addrs.sa, skb->data + fast_rx->sa_offs);
++-	skb_postpull_rcsum(skb, skb->data + snap_offs,
++-			   sizeof(rfc1042_header) + 2);
++-	/* remove the SNAP but leave the ethertype */
++-	skb_pull(skb, snap_offs + sizeof(rfc1042_header));
+++	if (ieee80211_vif_is_mesh(&rx->sdata->vif)) {
+++	    skb_pull(skb, snap_offs - 2);
+++	    put_unaligned_be16(skb->len - 2, skb->data);
+++	} else {
+++	    skb_postpull_rcsum(skb, skb->data + snap_offs,
+++			       sizeof(rfc1042_header) + 2);
+++
+++	    /* remove the SNAP but leave the ethertype */
+++	    skb_pull(skb, snap_offs + sizeof(rfc1042_header));
+++	}
++ 	/* push the addresses in front */
++ 	memcpy(skb_push(skb, sizeof(addrs)), &addrs, sizeof(addrs));
++ 
+++	res = ieee80211_rx_mesh_data(rx->sdata, rx->sta, rx->skb);
+++	switch (res) {
+++	case RX_QUEUED:
+++		return true;
+++	case RX_CONTINUE:
+++		break;
+++	default:
+++		goto drop;
+++	}
+++
++ 	ieee80211_rx_8023(rx, fast_rx, orig_len);
++ 
++ 	return true;
+diff --git a/package/kernel/mac80211/patches/subsys/327-wifi-mac80211-add-support-for-letting-drivers-regist.patch b/package/kernel/mac80211/patches/subsys/327-wifi-mac80211-add-support-for-letting-drivers-regist.patch
+new file mode 100644
+index 0000000000..ac290b5360
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/327-wifi-mac80211-add-support-for-letting-drivers-regist.patch
+@@ -0,0 +1,149 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Mon, 20 Mar 2023 14:28:08 +0100
++Subject: [PATCH] wifi: mac80211: add support for letting drivers register tc
++ offload support
++
++On newer MediaTek SoCs (e.g. MT7986), WLAN->WLAN or WLAN->Ethernet flows can
++be offloaded by the SoC. In order to support that, the .ndo_setup_tc op is
++needed.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/include/net/mac80211.h
+++++ b/include/net/mac80211.h
++@@ -4192,6 +4192,10 @@ struct ieee80211_prep_tx_info {
++  *	Note that a sta can also be inserted or removed with valid links,
++  *	i.e. passed to @sta_add/@sta_state with sta->valid_links not zero.
++  *	In fact, cannot change from having valid_links and not having them.
+++ * @net_setup_tc: Called from .ndo_setup_tc in order to prepare hardware
+++ *	flow offloading for flows originating from the vif.
+++ *	Note that the driver must not assume that the vif driver_data is valid
+++ *	at this point, since the callback can be called during netdev teardown.
++  */
++ struct ieee80211_ops {
++ 	void (*tx)(struct ieee80211_hw *hw,
++@@ -4547,6 +4551,11 @@ struct ieee80211_ops {
++ 				struct ieee80211_vif *vif,
++ 				struct ieee80211_sta *sta,
++ 				u16 old_links, u16 new_links);
+++	int (*net_setup_tc)(struct ieee80211_hw *hw,
+++			    struct ieee80211_vif *vif,
+++			    struct net_device *dev,
+++			    enum tc_setup_type type,
+++			    void *type_data);
++ };
++ 
++ /**
++--- a/net/mac80211/driver-ops.h
+++++ b/net/mac80211/driver-ops.h
++@@ -1470,6 +1470,23 @@ static inline int drv_net_fill_forward_p
++ 	return ret;
++ }
++ 
+++static inline int drv_net_setup_tc(struct ieee80211_local *local,
+++				   struct ieee80211_sub_if_data *sdata,
+++				   struct net_device *dev,
+++				   enum tc_setup_type type, void *type_data)
+++{
+++	int ret = -EOPNOTSUPP;
+++
+++	sdata = get_bss_sdata(sdata);
+++	trace_drv_net_setup_tc(local, sdata, type);
+++	if (local->ops->net_setup_tc)
+++		ret = local->ops->net_setup_tc(&local->hw, &sdata->vif, dev,
+++					       type, type_data);
+++	trace_drv_return_int(local, ret);
+++
+++	return ret;
+++}
+++
++ int drv_change_vif_links(struct ieee80211_local *local,
++ 			 struct ieee80211_sub_if_data *sdata,
++ 			 u16 old_links, u16 new_links,
++--- a/net/mac80211/ieee80211_i.h
+++++ b/net/mac80211/ieee80211_i.h
++@@ -1939,7 +1939,8 @@ void ieee80211_color_collision_detection
++ /* interface handling */
++ #define MAC80211_SUPPORTED_FEATURES_TX	(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | \
++ 					 NETIF_F_HW_CSUM | NETIF_F_SG | \
++-					 NETIF_F_HIGHDMA | NETIF_F_GSO_SOFTWARE)
+++					 NETIF_F_HIGHDMA | NETIF_F_GSO_SOFTWARE | \
+++					 NETIF_F_HW_TC)
++ #define MAC80211_SUPPORTED_FEATURES_RX	(NETIF_F_RXCSUM)
++ #define MAC80211_SUPPORTED_FEATURES	(MAC80211_SUPPORTED_FEATURES_TX | \
++ 					 MAC80211_SUPPORTED_FEATURES_RX)
++--- a/net/mac80211/iface.c
+++++ b/net/mac80211/iface.c
++@@ -813,6 +813,21 @@ ieee80211_get_stats64(struct net_device
++ 	dev_fetch_sw_netstats(stats, dev->tstats);
++ }
++ 
+++static int ieee80211_netdev_setup_tc(struct net_device *dev,
+++				     enum tc_setup_type type, void *type_data)
+++{
+++	struct ieee80211_sub_if_data *sdata;
+++	struct ieee80211_local *local;
+++
+++	sdata = IEEE80211_DEV_TO_SUB_IF(dev);
+++	local = sdata->local;
+++
+++	if (!local->ops->net_setup_tc)
+++		return -EOPNOTSUPP;
+++
+++	return drv_net_setup_tc(local, sdata, dev, type, type_data);
+++}
+++
++ static const struct net_device_ops ieee80211_dataif_ops = {
++ 	.ndo_open		= ieee80211_open,
++ 	.ndo_stop		= ieee80211_stop,
++@@ -821,6 +836,7 @@ static const struct net_device_ops ieee8
++ 	.ndo_set_rx_mode	= ieee80211_set_multicast_list,
++ 	.ndo_set_mac_address 	= ieee80211_change_mac,
++ 	.ndo_get_stats64	= ieee80211_get_stats64,
+++	.ndo_setup_tc		= ieee80211_netdev_setup_tc,
++ };
++ 
++ static u16 ieee80211_monitor_select_queue(struct net_device *dev,
++@@ -929,6 +945,7 @@ static const struct net_device_ops ieee8
++ 	.ndo_set_mac_address	= ieee80211_change_mac,
++ 	.ndo_get_stats64	= ieee80211_get_stats64,
++ 	.ndo_fill_forward_path	= ieee80211_netdev_fill_forward_path,
+++	.ndo_setup_tc		= ieee80211_netdev_setup_tc,
++ };
++ 
++ static bool ieee80211_iftype_supports_hdr_offload(enum nl80211_iftype iftype)
++--- a/net/mac80211/trace.h
+++++ b/net/mac80211/trace.h
++@@ -2478,6 +2478,31 @@ DEFINE_EVENT(sta_event, drv_net_fill_for
++ 	TP_ARGS(local, sdata, sta)
++ );
++ 
+++TRACE_EVENT(drv_net_setup_tc,
+++	TP_PROTO(struct ieee80211_local *local,
+++		 struct ieee80211_sub_if_data *sdata,
+++		 u8 type),
+++
+++	TP_ARGS(local, sdata, type),
+++
+++	TP_STRUCT__entry(
+++		LOCAL_ENTRY
+++		VIF_ENTRY
+++		__field(u8, type)
+++	),
+++
+++	TP_fast_assign(
+++		LOCAL_ASSIGN;
+++		VIF_ASSIGN;
+++		__entry->type = type;
+++	),
+++
+++	TP_printk(
+++		LOCAL_PR_FMT VIF_PR_FMT " type:%d\n",
+++		LOCAL_PR_ARG, VIF_PR_ARG, __entry->type
+++	)
+++);
+++
++ TRACE_EVENT(drv_change_vif_links,
++ 	TP_PROTO(struct ieee80211_local *local,
++ 		 struct ieee80211_sub_if_data *sdata,
+diff --git a/package/kernel/mac80211/patches/subsys/329-wifi-mac80211-fix-receiving-mesh-packets-in-forwardi.patch b/package/kernel/mac80211/patches/subsys/329-wifi-mac80211-fix-receiving-mesh-packets-in-forwardi.patch
+new file mode 100644
+index 0000000000..6882694da8
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/329-wifi-mac80211-fix-receiving-mesh-packets-in-forwardi.patch
+@@ -0,0 +1,50 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sun, 26 Mar 2023 17:11:34 +0200
++Subject: [PATCH] wifi: mac80211: fix receiving mesh packets in forwarding=0
++ networks
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++When forwarding is set to 0, frames are typically sent with ttl=1.
++Move the ttl decrement check below the check for local receive in order to
++fix packet drops.
++
++Reported-by: Thomas Hühn <thomas.huehn@hs-nordhausen.de>
++Reported-by: Nick Hainke <vincent@systemli.org>
++Fixes: 986e43b19ae9 ("wifi: mac80211: fix receiving A-MSDU frames on mesh interfaces")
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/mac80211/rx.c
+++++ b/net/mac80211/rx.c
++@@ -2828,14 +2828,6 @@ ieee80211_rx_mesh_data(struct ieee80211_
++ 	if (sdata->crypto_tx_tailroom_needed_cnt)
++ 		tailroom = IEEE80211_ENCRYPT_TAILROOM;
++ 
++-	if (!--mesh_hdr->ttl) {
++-		if (multicast)
++-			goto rx_accept;
++-
++-		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_ttl);
++-		return RX_DROP_MONITOR;
++-	}
++-
++ 	if (mesh_hdr->flags & MESH_FLAGS_AE) {
++ 		struct mesh_path *mppath;
++ 		char *proxied_addr;
++@@ -2874,6 +2866,14 @@ ieee80211_rx_mesh_data(struct ieee80211_
++ 	if (ether_addr_equal(sdata->vif.addr, eth->h_dest))
++ 		goto rx_accept;
++ 
+++	if (!--mesh_hdr->ttl) {
+++		if (multicast)
+++			goto rx_accept;
+++
+++		IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_ttl);
+++		return RX_DROP_MONITOR;
+++	}
+++
++ 	if (!ifmsh->mshcfg.dot11MeshForwarding) {
++ 		if (is_multicast_ether_addr(eth->h_dest))
++ 			goto rx_accept;
+diff --git a/package/kernel/mac80211/patches/subsys/330-wifi-ieee80211-correctly-mark-FTM-frames-non-buffera.patch b/package/kernel/mac80211/patches/subsys/330-wifi-ieee80211-correctly-mark-FTM-frames-non-buffera.patch
+new file mode 100644
+index 0000000000..079dd2a868
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/330-wifi-ieee80211-correctly-mark-FTM-frames-non-buffera.patch
+@@ -0,0 +1,134 @@
++From: Johannes Berg <johannes.berg@intel.com>
++Date: Wed, 29 Mar 2023 16:46:26 +0200
++Subject: [PATCH] wifi: ieee80211: correctly mark FTM frames non-bufferable
++
++The checks of whether or not a frame is bufferable were not
++taking into account that some action frames aren't, such as
++FTM. Check this, which requires some changes to the function
++ieee80211_is_bufferable_mmpdu() since we need the whole skb
++for the checks now.
++
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++Reviewed-by: Greenman, Gregory <gregory.greenman@intel.com>
++Reviewed-by: Peer, Ilan <ilan.peer@intel.com>
++---
++
++--- a/drivers/net/wireless/intel/iwlwifi/mvm/tx.c
+++++ b/drivers/net/wireless/intel/iwlwifi/mvm/tx.c
++@@ -601,8 +601,9 @@ static void iwl_mvm_skb_prepare_status(s
++ 
++ static int iwl_mvm_get_ctrl_vif_queue(struct iwl_mvm *mvm,
++ 				      struct ieee80211_tx_info *info,
++-				      struct ieee80211_hdr *hdr)
+++				      struct sk_buff *skb)
++ {
+++	struct ieee80211_hdr *hdr = (void *)skb->data;
++ 	struct iwl_mvm_vif *mvmvif =
++ 		iwl_mvm_vif_from_mac80211(info->control.vif);
++ 	__le16 fc = hdr->frame_control;
++@@ -621,7 +622,7 @@ static int iwl_mvm_get_ctrl_vif_queue(st
++ 		 * reason 7 ("Class 3 frame received from nonassociated STA").
++ 		 */
++ 		if (ieee80211_is_mgmt(fc) &&
++-		    (!ieee80211_is_bufferable_mmpdu(fc) ||
+++		    (!ieee80211_is_bufferable_mmpdu(skb) ||
++ 		     ieee80211_is_deauth(fc) || ieee80211_is_disassoc(fc)))
++ 			return mvm->probe_queue;
++ 
++@@ -740,7 +741,7 @@ int iwl_mvm_tx_skb_non_sta(struct iwl_mv
++ 			else
++ 				sta_id = mvmvif->mcast_sta.sta_id;
++ 
++-			queue = iwl_mvm_get_ctrl_vif_queue(mvm, &info, hdr);
+++			queue = iwl_mvm_get_ctrl_vif_queue(mvm, &info, skb);
++ 		} else if (info.control.vif->type == NL80211_IFTYPE_MONITOR) {
++ 			queue = mvm->snif_queue;
++ 			sta_id = mvm->snif_sta.sta_id;
++--- a/include/linux/ieee80211.h
+++++ b/include/linux/ieee80211.h
++@@ -772,20 +772,6 @@ static inline bool ieee80211_is_any_null
++ }
++ 
++ /**
++- * ieee80211_is_bufferable_mmpdu - check if frame is bufferable MMPDU
++- * @fc: frame control field in little-endian byteorder
++- */
++-static inline bool ieee80211_is_bufferable_mmpdu(__le16 fc)
++-{
++-	/* IEEE 802.11-2012, definition of "bufferable management frame";
++-	 * note that this ignores the IBSS special case. */
++-	return ieee80211_is_mgmt(fc) &&
++-	       (ieee80211_is_action(fc) ||
++-		ieee80211_is_disassoc(fc) ||
++-		ieee80211_is_deauth(fc));
++-}
++-
++-/**
++  * ieee80211_is_first_frag - check if IEEE80211_SCTL_FRAG is not set
++  * @seq_ctrl: frame sequence control bytes in little-endian byteorder
++  */
++@@ -4121,6 +4107,44 @@ static inline u8 *ieee80211_get_DA(struc
++ }
++ 
++ /**
+++ * ieee80211_is_bufferable_mmpdu - check if frame is bufferable MMPDU
+++ * @skb: the skb to check, starting with the 802.11 header
+++ */
+++static inline bool ieee80211_is_bufferable_mmpdu(struct sk_buff *skb)
+++{
+++	struct ieee80211_mgmt *mgmt = (void *)skb->data;
+++	__le16 fc = mgmt->frame_control;
+++
+++	/*
+++	 * IEEE 802.11 REVme D2.0 definition of bufferable MMPDU;
+++	 * note that this ignores the IBSS special case.
+++	 */
+++	if (!ieee80211_is_mgmt(fc))
+++		return false;
+++
+++	if (ieee80211_is_disassoc(fc) || ieee80211_is_deauth(fc))
+++		return true;
+++
+++	if (!ieee80211_is_action(fc))
+++		return false;
+++
+++	if (skb->len < offsetofend(typeof(*mgmt), u.action.u.ftm.action_code))
+++		return true;
+++
+++	/* action frame - additionally check for non-bufferable FTM */
+++
+++	if (mgmt->u.action.category != WLAN_CATEGORY_PUBLIC &&
+++	    mgmt->u.action.category != WLAN_CATEGORY_PROTECTED_DUAL_OF_ACTION)
+++		return true;
+++
+++	if (mgmt->u.action.u.ftm.action_code == WLAN_PUB_ACTION_FTM_REQUEST ||
+++	    mgmt->u.action.u.ftm.action_code == WLAN_PUBLIC_ACTION_FTM_RESPONSE)
+++		return false;
+++
+++	return true;
+++}
+++
+++/**
++  * _ieee80211_is_robust_mgmt_frame - check if frame is a robust management frame
++  * @hdr: the frame (buffer must include at least the first octet of payload)
++  */
++--- a/net/mac80211/tx.c
+++++ b/net/mac80211/tx.c
++@@ -488,7 +488,7 @@ ieee80211_tx_h_unicast_ps_buf(struct iee
++ 		int ac = skb_get_queue_mapping(tx->skb);
++ 
++ 		if (ieee80211_is_mgmt(hdr->frame_control) &&
++-		    !ieee80211_is_bufferable_mmpdu(hdr->frame_control)) {
+++		    !ieee80211_is_bufferable_mmpdu(tx->skb)) {
++ 			info->flags |= IEEE80211_TX_CTL_NO_PS_BUFFER;
++ 			return TX_CONTINUE;
++ 		}
++@@ -1326,7 +1326,7 @@ static struct txq_info *ieee80211_get_tx
++ 	if (!(info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) &&
++ 	    unlikely(!ieee80211_is_data_present(hdr->frame_control))) {
++ 		if ((!ieee80211_is_mgmt(hdr->frame_control) ||
++-		     ieee80211_is_bufferable_mmpdu(hdr->frame_control) ||
+++		     ieee80211_is_bufferable_mmpdu(skb) ||
++ 		     vif->type == NL80211_IFTYPE_STATION) &&
++ 		    sta && sta->uploaded) {
++ 			/*
+diff --git a/package/kernel/mac80211/patches/subsys/331-wifi-mac80211-flush-queues-on-STA-removal.patch b/package/kernel/mac80211/patches/subsys/331-wifi-mac80211-flush-queues-on-STA-removal.patch
+new file mode 100644
+index 0000000000..00232ec1b9
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/331-wifi-mac80211-flush-queues-on-STA-removal.patch
+@@ -0,0 +1,36 @@
++From: Johannes Berg <johannes.berg@intel.com>
++Date: Mon, 13 Mar 2023 11:42:12 +0100
++Subject: [PATCH] wifi: mac80211: flush queues on STA removal
++
++When we remove a station, we first make it unreachable,
++then we (must) remove its keys, and then remove the
++station itself. Depending on the hardware design, if
++we have hardware crypto at all, frames still sitting
++on hardware queues may then be transmitted without a
++valid key, possibly unencrypted or with a fixed key.
++
++Fix this by flushing the queues when removing stations
++so this cannot happen.
++
++Cc: stable@vger.kernel.org
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++Reviewed-by: Greenman, Gregory <gregory.greenman@intel.com>
++---
++
++--- a/net/mac80211/sta_info.c
+++++ b/net/mac80211/sta_info.c
++@@ -1271,6 +1271,14 @@ static void __sta_info_destroy_part2(str
++ 		WARN_ON_ONCE(ret);
++ 	}
++ 
+++	/* Flush queues before removing keys, as that might remove them
+++	 * from hardware, and then depending on the offload method, any
+++	 * frames sitting on hardware queues might be sent out without
+++	 * any encryption at all.
+++	 */
+++	if (local->ops->set_key)
+++		ieee80211_flush_queues(local, sta->sdata, false);
+++
++ 	/* now keys can no longer be reached */
++ 	ieee80211_free_sta_keys(local, sta);
++ 
+diff --git a/package/kernel/mac80211/patches/subsys/332-wifi-iwlwifi-mvm-support-flush-on-AP-interfaces.patch b/package/kernel/mac80211/patches/subsys/332-wifi-iwlwifi-mvm-support-flush-on-AP-interfaces.patch
+new file mode 100644
+index 0000000000..3c31dfeddc
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/332-wifi-iwlwifi-mvm-support-flush-on-AP-interfaces.patch
+@@ -0,0 +1,34 @@
++From: Johannes Berg <johannes.berg@intel.com>
++Date: Mon, 13 Mar 2023 12:02:58 +0100
++Subject: [PATCH] wifi: iwlwifi: mvm: support flush on AP interfaces
++
++Support TX flush on AP interfaces so that we will do a
++proper flush for frames on the queue before keys are
++removed.
++
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++Reviewed-by: Greenman, Gregory <gregory.greenman@intel.com>
++---
++
++--- a/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c
+++++ b/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c
++@@ -4854,9 +4854,6 @@ static void iwl_mvm_mac_flush(struct iee
++ 		return;
++ 	}
++ 
++-	if (vif->type != NL80211_IFTYPE_STATION)
++-		return;
++-
++ 	/* Make sure we're done with the deferred traffic before flushing */
++ 	flush_work(&mvm->add_stream_wk);
++ 
++@@ -4874,9 +4871,6 @@ static void iwl_mvm_mac_flush(struct iee
++ 		if (mvmsta->vif != vif)
++ 			continue;
++ 
++-		/* make sure only TDLS peers or the AP are flushed */
++-		WARN_ON(i != mvmvif->ap_sta_id && !sta->tdls);
++-
++ 		if (drop) {
++ 			if (iwl_mvm_flush_sta(mvm, mvmsta, false))
++ 				IWL_ERR(mvm, "flush request fail\n");
+diff --git a/package/kernel/mac80211/patches/subsys/333-wifi-mac80211-add-flush_sta-method.patch b/package/kernel/mac80211/patches/subsys/333-wifi-mac80211-add-flush_sta-method.patch
+new file mode 100644
+index 0000000000..3bba0b7e66
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/333-wifi-mac80211-add-flush_sta-method.patch
+@@ -0,0 +1,91 @@
++From: Johannes Berg <johannes.berg@intel.com>
++Date: Mon, 13 Mar 2023 11:53:51 +0100
++Subject: [PATCH] wifi: mac80211: add flush_sta method
++
++Some drivers like iwlwifi might have per-STA queues, so we
++may want to flush/drop just those queues rather than all
++when removing a station. Add a separate method for that.
++
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++Reviewed-by: Greenman, Gregory <gregory.greenman@intel.com>
++---
++
++--- a/include/net/mac80211.h
+++++ b/include/net/mac80211.h
++@@ -3918,6 +3918,10 @@ struct ieee80211_prep_tx_info {
++  *	Note that vif can be NULL.
++  *	The callback can sleep.
++  *
+++ * @flush_sta: Flush or drop all pending frames from the hardware queue(s) for
+++ *	the given station, as it's about to be removed.
+++ *	The callback can sleep.
+++ *
++  * @channel_switch: Drivers that need (or want) to offload the channel
++  *	switch operation for CSAs received from the AP may implement this
++  *	callback. They must then call ieee80211_chswitch_done() to indicate
++@@ -4372,6 +4376,8 @@ struct ieee80211_ops {
++ #endif
++ 	void (*flush)(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
++ 		      u32 queues, bool drop);
+++	void (*flush_sta)(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
+++			  struct ieee80211_sta *sta);
++ 	void (*channel_switch)(struct ieee80211_hw *hw,
++ 			       struct ieee80211_vif *vif,
++ 			       struct ieee80211_channel_switch *ch_switch);
++--- a/net/mac80211/driver-ops.h
+++++ b/net/mac80211/driver-ops.h
++@@ -617,6 +617,21 @@ static inline void drv_flush(struct ieee
++ 	trace_drv_return_void(local);
++ }
++ 
+++static inline void drv_flush_sta(struct ieee80211_local *local,
+++				 struct ieee80211_sub_if_data *sdata,
+++				 struct sta_info *sta)
+++{
+++	might_sleep();
+++
+++	if (sdata && !check_sdata_in_driver(sdata))
+++		return;
+++
+++	trace_drv_flush_sta(local, sdata, &sta->sta);
+++	if (local->ops->flush_sta)
+++		local->ops->flush_sta(&local->hw, &sdata->vif, &sta->sta);
+++	trace_drv_return_void(local);
+++}
+++
++ static inline void drv_channel_switch(struct ieee80211_local *local,
++ 				      struct ieee80211_sub_if_data *sdata,
++ 				      struct ieee80211_channel_switch *ch_switch)
++--- a/net/mac80211/sta_info.c
+++++ b/net/mac80211/sta_info.c
++@@ -1276,8 +1276,12 @@ static void __sta_info_destroy_part2(str
++ 	 * frames sitting on hardware queues might be sent out without
++ 	 * any encryption at all.
++ 	 */
++-	if (local->ops->set_key)
++-		ieee80211_flush_queues(local, sta->sdata, false);
+++	if (local->ops->set_key) {
+++		if (local->ops->flush_sta)
+++			drv_flush_sta(local, sta->sdata, sta);
+++		else
+++			ieee80211_flush_queues(local, sta->sdata, false);
+++	}
++ 
++ 	/* now keys can no longer be reached */
++ 	ieee80211_free_sta_keys(local, sta);
++--- a/net/mac80211/trace.h
+++++ b/net/mac80211/trace.h
++@@ -1177,6 +1177,13 @@ TRACE_EVENT(drv_flush,
++ 	)
++ );
++ 
+++DEFINE_EVENT(sta_event, drv_flush_sta,
+++	TP_PROTO(struct ieee80211_local *local,
+++		 struct ieee80211_sub_if_data *sdata,
+++		 struct ieee80211_sta *sta),
+++	TP_ARGS(local, sdata, sta)
+++);
+++
++ TRACE_EVENT(drv_channel_switch,
++ 	TP_PROTO(struct ieee80211_local *local,
++ 		 struct ieee80211_sub_if_data *sdata,
+diff --git a/package/kernel/mac80211/patches/subsys/334-wifi-iwlwifi-mvm-support-new-flush_sta-method.patch b/package/kernel/mac80211/patches/subsys/334-wifi-iwlwifi-mvm-support-new-flush_sta-method.patch
+new file mode 100644
+index 0000000000..18f39d505f
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/334-wifi-iwlwifi-mvm-support-new-flush_sta-method.patch
+@@ -0,0 +1,53 @@
++From: Johannes Berg <johannes.berg@intel.com>
++Date: Mon, 13 Mar 2023 12:05:35 +0100
++Subject: [PATCH] wifi: iwlwifi: mvm: support new flush_sta method
++
++For iwlwifi this is simple to implement, and on newer hardware
++it's an improvement since we have per-station queues.
++
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++Reviewed-by: Greenman, Gregory <gregory.greenman@intel.com>
++---
++
++--- a/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c
+++++ b/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c
++@@ -4890,6 +4890,31 @@ static void iwl_mvm_mac_flush(struct iee
++ 		iwl_trans_wait_tx_queues_empty(mvm->trans, msk);
++ }
++ 
+++static void iwl_mvm_mac_flush_sta(struct ieee80211_hw *hw,
+++				  struct ieee80211_vif *vif,
+++				  struct ieee80211_sta *sta)
+++{
+++	struct iwl_mvm *mvm = IWL_MAC80211_GET_MVM(hw);
+++	int i;
+++
+++	mutex_lock(&mvm->mutex);
+++	for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
+++		struct iwl_mvm_sta *mvmsta;
+++		struct ieee80211_sta *tmp;
+++
+++		tmp = rcu_dereference_protected(mvm->fw_id_to_mac_id[i],
+++						lockdep_is_held(&mvm->mutex));
+++		if (tmp != sta)
+++			continue;
+++
+++		mvmsta = iwl_mvm_sta_from_mac80211(sta);
+++
+++		if (iwl_mvm_flush_sta(mvm, mvmsta, false))
+++			IWL_ERR(mvm, "flush request fail\n");
+++	}
+++	mutex_unlock(&mvm->mutex);
+++}
+++
++ static int iwl_mvm_mac_get_survey(struct ieee80211_hw *hw, int idx,
++ 				  struct survey_info *survey)
++ {
++@@ -5417,6 +5442,7 @@ const struct ieee80211_ops iwl_mvm_hw_op
++ 	.mgd_complete_tx = iwl_mvm_mac_mgd_complete_tx,
++ 	.mgd_protect_tdls_discover = iwl_mvm_mac_mgd_protect_tdls_discover,
++ 	.flush = iwl_mvm_mac_flush,
+++	.flush_sta = iwl_mvm_mac_flush_sta,
++ 	.sched_scan_start = iwl_mvm_mac_sched_scan_start,
++ 	.sched_scan_stop = iwl_mvm_mac_sched_scan_stop,
++ 	.set_key = iwl_mvm_mac_set_key,
+diff --git a/package/kernel/mac80211/patches/subsys/335-wifi-mac80211-add-LDPC-related-flags-in-ieee80211_bs.patch b/package/kernel/mac80211/patches/subsys/335-wifi-mac80211-add-LDPC-related-flags-in-ieee80211_bs.patch
+new file mode 100644
+index 0000000000..1b379b76ae
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/335-wifi-mac80211-add-LDPC-related-flags-in-ieee80211_bs.patch
+@@ -0,0 +1,62 @@
++From: Ryder Lee <ryder.lee@mediatek.com>
++Date: Sat, 18 Feb 2023 01:49:25 +0800
++Subject: [PATCH] wifi: mac80211: add LDPC related flags in ieee80211_bss_conf
++
++This is utilized to pass LDPC configurations from user space
++(i.e. hostapd) to driver.
++
++Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
++Link: https://lore.kernel.org/r/1de696aaa34efd77a926eb657b8c0fda05aaa177.1676628065.git.ryder.lee@mediatek.com
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++---
++
++--- a/include/net/mac80211.h
+++++ b/include/net/mac80211.h
++@@ -653,6 +653,9 @@ struct ieee80211_fils_discovery {
++  *	write-protected by sdata_lock and local->mtx so holding either is fine
++  *	for read access.
++  * @color_change_color: the bss color that will be used after the change.
+++ * @ht_ldpc: in AP mode, indicates interface has HT LDPC capability.
+++ * @vht_ldpc: in AP mode, indicates interface has VHT LDPC capability.
+++ * @he_ldpc: in AP mode, indicates interface has HE LDPC capability.
++  * @vht_su_beamformer: in AP mode, does this BSS support operation as an VHT SU
++  *	beamformer
++  * @vht_su_beamformee: in AP mode, does this BSS support operation as an VHT SU
++@@ -744,6 +747,9 @@ struct ieee80211_bss_conf {
++ 	bool color_change_active;
++ 	u8 color_change_color;
++ 
+++	bool ht_ldpc;
+++	bool vht_ldpc;
+++	bool he_ldpc;
++ 	bool vht_su_beamformer;
++ 	bool vht_su_beamformee;
++ 	bool vht_mu_beamformer;
++--- a/net/mac80211/cfg.c
+++++ b/net/mac80211/cfg.c
++@@ -1252,7 +1252,15 @@ static int ieee80211_start_ap(struct wip
++ 	prev_beacon_int = link_conf->beacon_int;
++ 	link_conf->beacon_int = params->beacon_interval;
++ 
+++	if (params->ht_cap)
+++		link_conf->ht_ldpc =
+++			params->ht_cap->cap_info &
+++				cpu_to_le16(IEEE80211_HT_CAP_LDPC_CODING);
+++
++ 	if (params->vht_cap) {
+++		link_conf->vht_ldpc =
+++			params->vht_cap->vht_cap_info &
+++				cpu_to_le32(IEEE80211_VHT_CAP_RXLDPC);
++ 		link_conf->vht_su_beamformer =
++ 			params->vht_cap->vht_cap_info &
++ 				cpu_to_le32(IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE);
++@@ -1282,6 +1290,9 @@ static int ieee80211_start_ap(struct wip
++ 	}
++ 
++ 	if (params->he_cap) {
+++		link_conf->he_ldpc =
+++			params->he_cap->phy_cap_info[1] &
+++				IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD;
++ 		link_conf->he_su_beamformer =
++ 			params->he_cap->phy_cap_info[3] &
++ 				IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
+diff --git a/package/kernel/mac80211/patches/subsys/336-v6.4-wifi-mac80211-generate-EMA-beacons-in-AP-mode.patch b/package/kernel/mac80211/patches/subsys/336-v6.4-wifi-mac80211-generate-EMA-beacons-in-AP-mode.patch
+new file mode 100644
+index 0000000000..088f468e37
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/336-v6.4-wifi-mac80211-generate-EMA-beacons-in-AP-mode.patch
+@@ -0,0 +1,372 @@
++From bd54f3c29077f23dad92ef82a78061b40be30c65 Mon Sep 17 00:00:00 2001
++From: Aloka Dixit <quic_alokad@quicinc.com>
++Date: Mon, 5 Dec 2022 16:50:37 -0800
++Subject: [PATCH] wifi: mac80211: generate EMA beacons in AP mode
++
++Add APIs to generate an array of beacons for an EMA AP (enhanced
++multiple BSSID advertisements), each including a single MBSSID element.
++EMA profile periodicity equals the count of elements.
++
++- ieee80211_beacon_get_template_ema_list() - Generate and return all
++EMA beacon templates. Drivers must call ieee80211_beacon_free_ema_list()
++to free the memory. No change in the prototype for the existing API,
++ieee80211_beacon_get_template(), which should be used for non-EMA AP.
++
++- ieee80211_beacon_get_template_ema_index() - Generate a beacon which
++includes the multiple BSSID element at the given index. Drivers can use
++this function in a loop until NULL is returned which indicates end of
++available MBSSID elements.
++
++- ieee80211_beacon_free_ema_list() - free the memory allocated for the
++list of EMA beacon templates.
++
++Modify existing functions ieee80211_beacon_get_ap(),
++ieee80211_get_mbssid_beacon_len() and ieee80211_beacon_add_mbssid()
++to accept a new parameter for EMA index.
++
++Signed-off-by: Aloka Dixit <quic_alokad@quicinc.com>
++Co-developed-by: John Crispin <john@phrozen.org>
++Signed-off-by: John Crispin <john@phrozen.org>
++Link: https://lore.kernel.org/r/20221206005040.3177-2-quic_alokad@quicinc.com
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++---
++ include/net/mac80211.h     |  68 +++++++++++++++++++
++ net/mac80211/cfg.c         |  11 +--
++ net/mac80211/ieee80211_i.h |  10 ++-
++ net/mac80211/tx.c          | 134 ++++++++++++++++++++++++++++++++++---
++ 4 files changed, 205 insertions(+), 18 deletions(-)
++
++--- a/include/net/mac80211.h
+++++ b/include/net/mac80211.h
++@@ -5252,6 +5252,74 @@ ieee80211_beacon_get_template(struct iee
++ 			      unsigned int link_id);
++ 
++ /**
+++ * ieee80211_beacon_get_template_ema_index - EMA beacon template generation
+++ * @hw: pointer obtained from ieee80211_alloc_hw().
+++ * @vif: &struct ieee80211_vif pointer from the add_interface callback.
+++ * @offs: &struct ieee80211_mutable_offsets pointer to struct that will
+++ *	receive the offsets that may be updated by the driver.
+++ * @link_id: the link id to which the beacon belongs (or 0 for a non-MLD AP).
+++ * @ema_index: index of the beacon in the EMA set.
+++ *
+++ * This function follows the same rules as ieee80211_beacon_get_template()
+++ * but returns a beacon template which includes multiple BSSID element at the
+++ * requested index.
+++ *
+++ * Return: The beacon template. %NULL indicates the end of EMA templates.
+++ */
+++struct sk_buff *
+++ieee80211_beacon_get_template_ema_index(struct ieee80211_hw *hw,
+++					struct ieee80211_vif *vif,
+++					struct ieee80211_mutable_offsets *offs,
+++					unsigned int link_id, u8 ema_index);
+++
+++/**
+++ * struct ieee80211_ema_beacons - List of EMA beacons
+++ * @cnt: count of EMA beacons.
+++ *
+++ * @bcn: array of EMA beacons.
+++ * @bcn.skb: the skb containing this specific beacon
+++ * @bcn.offs: &struct ieee80211_mutable_offsets pointer to struct that will
+++ *	receive the offsets that may be updated by the driver.
+++ */
+++struct ieee80211_ema_beacons {
+++	u8 cnt;
+++	struct {
+++		struct sk_buff *skb;
+++		struct ieee80211_mutable_offsets offs;
+++	} bcn[];
+++};
+++
+++/**
+++ * ieee80211_beacon_get_template_ema_list - EMA beacon template generation
+++ * @hw: pointer obtained from ieee80211_alloc_hw().
+++ * @vif: &struct ieee80211_vif pointer from the add_interface callback.
+++ * @link_id: the link id to which the beacon belongs (or 0 for a non-MLD AP)
+++ *
+++ * This function follows the same rules as ieee80211_beacon_get_template()
+++ * but allocates and returns a pointer to list of all beacon templates required
+++ * to cover all profiles in the multiple BSSID set. Each template includes only
+++ * one multiple BSSID element.
+++ *
+++ * Driver must call ieee80211_beacon_free_ema_list() to free the memory.
+++ *
+++ * Return: EMA beacon templates of type struct ieee80211_ema_beacons *.
+++ *	%NULL on error.
+++ */
+++struct ieee80211_ema_beacons *
+++ieee80211_beacon_get_template_ema_list(struct ieee80211_hw *hw,
+++				       struct ieee80211_vif *vif,
+++				       unsigned int link_id);
+++
+++/**
+++ * ieee80211_beacon_free_ema_list - free an EMA beacon template list
+++ * @ema_beacons: list of EMA beacons of type &struct ieee80211_ema_beacons pointers.
+++ *
+++ * This function will free a list previously acquired by calling
+++ * ieee80211_beacon_get_template_ema_list()
+++ */
+++void ieee80211_beacon_free_ema_list(struct ieee80211_ema_beacons *ema_beacons);
+++
+++/**
++  * ieee80211_beacon_get_tim - beacon generation function
++  * @hw: pointer obtained from ieee80211_alloc_hw().
++  * @vif: &struct ieee80211_vif pointer from the add_interface callback.
++--- a/net/mac80211/cfg.c
+++++ b/net/mac80211/cfg.c
++@@ -1122,11 +1122,11 @@ static int ieee80211_assign_beacon(struc
++ 	if (params->mbssid_ies) {
++ 		mbssid = params->mbssid_ies;
++ 		size += struct_size(new->mbssid_ies, elem, mbssid->cnt);
++-		size += ieee80211_get_mbssid_beacon_len(mbssid);
+++		size += ieee80211_get_mbssid_beacon_len(mbssid, mbssid->cnt);
++ 	} else if (old && old->mbssid_ies) {
++ 		mbssid = old->mbssid_ies;
++ 		size += struct_size(new->mbssid_ies, elem, mbssid->cnt);
++-		size += ieee80211_get_mbssid_beacon_len(mbssid);
+++		size += ieee80211_get_mbssid_beacon_len(mbssid, mbssid->cnt);
++ 	}
++ 
++ 	new = kzalloc(size, GFP_KERNEL);
++@@ -3384,8 +3384,11 @@ cfg80211_beacon_dup(struct cfg80211_beac
++ 
++ 	len = beacon->head_len + beacon->tail_len + beacon->beacon_ies_len +
++ 	      beacon->proberesp_ies_len + beacon->assocresp_ies_len +
++-	      beacon->probe_resp_len + beacon->lci_len + beacon->civicloc_len +
++-	      ieee80211_get_mbssid_beacon_len(beacon->mbssid_ies);
+++	      beacon->probe_resp_len + beacon->lci_len + beacon->civicloc_len;
+++
+++	if (beacon->mbssid_ies)
+++		len += ieee80211_get_mbssid_beacon_len(beacon->mbssid_ies,
+++						       beacon->mbssid_ies->cnt);
++ 
++ 	new_beacon = kzalloc(sizeof(*new_beacon) + len, GFP_KERNEL);
++ 	if (!new_beacon)
++--- a/net/mac80211/ieee80211_i.h
+++++ b/net/mac80211/ieee80211_i.h
++@@ -1182,13 +1182,17 @@ ieee80211_vif_get_shift(struct ieee80211
++ }
++ 
++ static inline int
++-ieee80211_get_mbssid_beacon_len(struct cfg80211_mbssid_elems *elems)
+++ieee80211_get_mbssid_beacon_len(struct cfg80211_mbssid_elems *elems, u8 i)
++ {
++-	int i, len = 0;
+++	int len = 0;
++ 
++-	if (!elems)
+++	if (!elems || !elems->cnt || i > elems->cnt)
++ 		return 0;
++ 
+++	if (i < elems->cnt)
+++		return elems->elem[i].len;
+++
+++	/* i == elems->cnt, calculate total length of all MBSSID elements */
++ 	for (i = 0; i < elems->cnt; i++)
++ 		len += elems->elem[i].len;
++ 
++--- a/net/mac80211/tx.c
+++++ b/net/mac80211/tx.c
++@@ -5205,13 +5205,20 @@ ieee80211_beacon_get_finish(struct ieee8
++ }
++ 
++ static void
++-ieee80211_beacon_add_mbssid(struct sk_buff *skb, struct beacon_data *beacon)
+++ieee80211_beacon_add_mbssid(struct sk_buff *skb, struct beacon_data *beacon,
+++			    u8 i)
++ {
++-	int i;
+++	if (!beacon->mbssid_ies || !beacon->mbssid_ies->cnt ||
+++	    i > beacon->mbssid_ies->cnt)
+++		return;
++ 
++-	if (!beacon->mbssid_ies)
+++	if (i < beacon->mbssid_ies->cnt) {
+++		skb_put_data(skb, beacon->mbssid_ies->elem[i].data,
+++			     beacon->mbssid_ies->elem[i].len);
++ 		return;
+++	}
++ 
+++	/* i == beacon->mbssid_ies->cnt, include all MBSSID elements */
++ 	for (i = 0; i < beacon->mbssid_ies->cnt; i++)
++ 		skb_put_data(skb, beacon->mbssid_ies->elem[i].data,
++ 			     beacon->mbssid_ies->elem[i].len);
++@@ -5224,7 +5231,8 @@ ieee80211_beacon_get_ap(struct ieee80211
++ 			struct ieee80211_mutable_offsets *offs,
++ 			bool is_template,
++ 			struct beacon_data *beacon,
++-			struct ieee80211_chanctx_conf *chanctx_conf)
+++			struct ieee80211_chanctx_conf *chanctx_conf,
+++			u8 ema_index)
++ {
++ 	struct ieee80211_local *local = hw_to_local(hw);
++ 	struct ieee80211_sub_if_data *sdata = vif_to_sdata(vif);
++@@ -5243,7 +5251,9 @@ ieee80211_beacon_get_ap(struct ieee80211
++ 	/* headroom, head length,
++ 	 * tail length, maximum TIM length and multiple BSSID length
++ 	 */
++-	mbssid_len = ieee80211_get_mbssid_beacon_len(beacon->mbssid_ies);
+++	mbssid_len = ieee80211_get_mbssid_beacon_len(beacon->mbssid_ies,
+++						     ema_index);
+++
++ 	skb = dev_alloc_skb(local->tx_headroom + beacon->head_len +
++ 			    beacon->tail_len + 256 +
++ 			    local->hw.extra_beacon_tailroom + mbssid_len);
++@@ -5261,7 +5271,7 @@ ieee80211_beacon_get_ap(struct ieee80211
++ 		offs->cntdwn_counter_offs[0] = beacon->cntdwn_counter_offsets[0];
++ 
++ 		if (mbssid_len) {
++-			ieee80211_beacon_add_mbssid(skb, beacon);
+++			ieee80211_beacon_add_mbssid(skb, beacon, ema_index);
++ 			offs->mbssid_off = skb->len - mbssid_len;
++ 		}
++ 
++@@ -5280,12 +5290,51 @@ ieee80211_beacon_get_ap(struct ieee80211
++ 	return skb;
++ }
++ 
+++static struct ieee80211_ema_beacons *
+++ieee80211_beacon_get_ap_ema_list(struct ieee80211_hw *hw,
+++				 struct ieee80211_vif *vif,
+++				 struct ieee80211_link_data *link,
+++				 struct ieee80211_mutable_offsets *offs,
+++				 bool is_template, struct beacon_data *beacon,
+++				 struct ieee80211_chanctx_conf *chanctx_conf)
+++{
+++	struct ieee80211_ema_beacons *ema = NULL;
+++
+++	if (!beacon->mbssid_ies || !beacon->mbssid_ies->cnt)
+++		return NULL;
+++
+++	ema = kzalloc(struct_size(ema, bcn, beacon->mbssid_ies->cnt),
+++		      GFP_ATOMIC);
+++	if (!ema)
+++		return NULL;
+++
+++	for (ema->cnt = 0; ema->cnt < beacon->mbssid_ies->cnt; ema->cnt++) {
+++		ema->bcn[ema->cnt].skb =
+++			ieee80211_beacon_get_ap(hw, vif, link,
+++						&ema->bcn[ema->cnt].offs,
+++						is_template, beacon,
+++						chanctx_conf, ema->cnt);
+++		if (!ema->bcn[ema->cnt].skb)
+++			break;
+++	}
+++
+++	if (ema->cnt == beacon->mbssid_ies->cnt)
+++		return ema;
+++
+++	ieee80211_beacon_free_ema_list(ema);
+++	return NULL;
+++}
+++
+++#define IEEE80211_INCLUDE_ALL_MBSSID_ELEMS -1
+++
++ static struct sk_buff *
++ __ieee80211_beacon_get(struct ieee80211_hw *hw,
++ 		       struct ieee80211_vif *vif,
++ 		       struct ieee80211_mutable_offsets *offs,
++ 		       bool is_template,
++-		       unsigned int link_id)
+++		       unsigned int link_id,
+++		       int ema_index,
+++		       struct ieee80211_ema_beacons **ema_beacons)
++ {
++ 	struct ieee80211_local *local = hw_to_local(hw);
++ 	struct beacon_data *beacon = NULL;
++@@ -5314,8 +5363,29 @@ __ieee80211_beacon_get(struct ieee80211_
++ 		if (!beacon)
++ 			goto out;
++ 
++-		skb = ieee80211_beacon_get_ap(hw, vif, link, offs, is_template,
++-					      beacon, chanctx_conf);
+++		if (ema_beacons) {
+++			*ema_beacons =
+++				ieee80211_beacon_get_ap_ema_list(hw, vif, link,
+++								 offs,
+++								 is_template,
+++								 beacon,
+++								 chanctx_conf);
+++		} else {
+++			if (beacon->mbssid_ies && beacon->mbssid_ies->cnt) {
+++				if (ema_index >= beacon->mbssid_ies->cnt)
+++					goto out; /* End of MBSSID elements */
+++
+++				if (ema_index <= IEEE80211_INCLUDE_ALL_MBSSID_ELEMS)
+++					ema_index = beacon->mbssid_ies->cnt;
+++			} else {
+++				ema_index = 0;
+++			}
+++
+++			skb = ieee80211_beacon_get_ap(hw, vif, link, offs,
+++						      is_template, beacon,
+++						      chanctx_conf,
+++						      ema_index);
+++		}
++ 	} else if (sdata->vif.type == NL80211_IFTYPE_ADHOC) {
++ 		struct ieee80211_if_ibss *ifibss = &sdata->u.ibss;
++ 		struct ieee80211_hdr *hdr;
++@@ -5403,10 +5473,50 @@ ieee80211_beacon_get_template(struct iee
++ 			      struct ieee80211_mutable_offsets *offs,
++ 			      unsigned int link_id)
++ {
++-	return __ieee80211_beacon_get(hw, vif, offs, true, link_id);
+++	return __ieee80211_beacon_get(hw, vif, offs, true, link_id,
+++				      IEEE80211_INCLUDE_ALL_MBSSID_ELEMS, NULL);
++ }
++ EXPORT_SYMBOL(ieee80211_beacon_get_template);
++ 
+++struct sk_buff *
+++ieee80211_beacon_get_template_ema_index(struct ieee80211_hw *hw,
+++					struct ieee80211_vif *vif,
+++					struct ieee80211_mutable_offsets *offs,
+++					unsigned int link_id, u8 ema_index)
+++{
+++	return __ieee80211_beacon_get(hw, vif, offs, true, link_id, ema_index,
+++				      NULL);
+++}
+++EXPORT_SYMBOL(ieee80211_beacon_get_template_ema_index);
+++
+++void ieee80211_beacon_free_ema_list(struct ieee80211_ema_beacons *ema_beacons)
+++{
+++	u8 i;
+++
+++	if (!ema_beacons)
+++		return;
+++
+++	for (i = 0; i < ema_beacons->cnt; i++)
+++		kfree_skb(ema_beacons->bcn[i].skb);
+++
+++	kfree(ema_beacons);
+++}
+++EXPORT_SYMBOL(ieee80211_beacon_free_ema_list);
+++
+++struct ieee80211_ema_beacons *
+++ieee80211_beacon_get_template_ema_list(struct ieee80211_hw *hw,
+++				       struct ieee80211_vif *vif,
+++				       unsigned int link_id)
+++{
+++	struct ieee80211_ema_beacons *ema_beacons = NULL;
+++
+++	WARN_ON(__ieee80211_beacon_get(hw, vif, NULL, false, link_id, 0,
+++				       &ema_beacons));
+++
+++	return ema_beacons;
+++}
+++EXPORT_SYMBOL(ieee80211_beacon_get_template_ema_list);
+++
++ struct sk_buff *ieee80211_beacon_get_tim(struct ieee80211_hw *hw,
++ 					 struct ieee80211_vif *vif,
++ 					 u16 *tim_offset, u16 *tim_length,
++@@ -5414,7 +5524,9 @@ struct sk_buff *ieee80211_beacon_get_tim
++ {
++ 	struct ieee80211_mutable_offsets offs = {};
++ 	struct sk_buff *bcn = __ieee80211_beacon_get(hw, vif, &offs, false,
++-						     link_id);
+++						     link_id,
+++						     IEEE80211_INCLUDE_ALL_MBSSID_ELEMS,
+++						     NULL);
++ 	struct sk_buff *copy;
++ 	int shift;
++ 
+diff --git a/package/kernel/mac80211/patches/subsys/337-mac80211-fix-sband-iftype-data-lookup-for-AP_VLAN.patch b/package/kernel/mac80211/patches/subsys/337-mac80211-fix-sband-iftype-data-lookup-for-AP_VLAN.patch
+new file mode 100644
+index 0000000000..67b4284949
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/337-mac80211-fix-sband-iftype-data-lookup-for-AP_VLAN.patch
+@@ -0,0 +1,23 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Thu, 22 Jun 2023 18:02:25 +0200
++Subject: [PATCH] mac80211: fix sband iftype data lookup for AP_VLAN
++
++AP_VLAN interfaces are virtual, so doesn't really exist as a type for
++capabilities. When passed in as a type, AP is the one that's really intended.
++
++Fixes: c4cbaf7973a7 ("cfg80211: Add support for HE")
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/include/net/cfg80211.h
+++++ b/include/net/cfg80211.h
++@@ -567,6 +567,9 @@ ieee80211_get_sband_iftype_data(const st
++ 	if (WARN_ON(iftype >= NL80211_IFTYPE_MAX))
++ 		return NULL;
++ 
+++	if (iftype == NL80211_IFTYPE_AP_VLAN)
+++		iftype = NL80211_IFTYPE_AP;
+++
++ 	for (i = 0; i < sband->n_iftype_data; i++)  {
++ 		const struct ieee80211_sband_iftype_data *data =
++ 			&sband->iftype_data[i];
+diff --git a/package/kernel/mac80211/patches/subsys/338-mac80211-split-mesh-fast-tx-cache-into-local-proxied.patch b/package/kernel/mac80211/patches/subsys/338-mac80211-split-mesh-fast-tx-cache-into-local-proxied.patch
+new file mode 100644
+index 0000000000..f7391a5809
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/338-mac80211-split-mesh-fast-tx-cache-into-local-proxied.patch
+@@ -0,0 +1,219 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 30 Jun 2023 13:11:51 +0200
++Subject: [PATCH] mac80211: split mesh fast tx cache into
++ local/proxied/forwarded
++
++Depending on the origin of the packets (and their SA), 802.11 + mesh headers
++could be filled in differently. In order to properly deal with that, add a
++new field to the lookup key, indicating the type (local, proxied or
++forwarded). This can fix spurious packet drop issues that depend on the order
++in which nodes/hosts communicate with each other.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/mac80211/mesh.c
+++++ b/net/mac80211/mesh.c
++@@ -703,6 +703,9 @@ bool ieee80211_mesh_xmit_fast(struct iee
++ 			      struct sk_buff *skb, u32 ctrl_flags)
++ {
++ 	struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh;
+++	struct ieee80211_mesh_fast_tx_key key = {
+++		.type = MESH_FAST_TX_TYPE_LOCAL
+++	};
++ 	struct ieee80211_mesh_fast_tx *entry;
++ 	struct ieee80211s_hdr *meshhdr;
++ 	u8 sa[ETH_ALEN] __aligned(2);
++@@ -738,7 +741,10 @@ bool ieee80211_mesh_xmit_fast(struct iee
++ 			return false;
++ 	}
++ 
++-	entry = mesh_fast_tx_get(sdata, skb->data);
+++	ether_addr_copy(key.addr, skb->data);
+++	if (!ether_addr_equal(skb->data + ETH_ALEN, sdata->vif.addr))
+++		key.type = MESH_FAST_TX_TYPE_PROXIED;
+++	entry = mesh_fast_tx_get(sdata, &key);
++ 	if (!entry)
++ 		return false;
++ 
++--- a/net/mac80211/mesh.h
+++++ b/net/mac80211/mesh.h
++@@ -133,9 +133,33 @@ struct mesh_path {
++ #define MESH_FAST_TX_CACHE_TIMEOUT		8000 /* msecs */
++ 
++ /**
+++ * enum ieee80211_mesh_fast_tx_type - cached mesh fast tx entry type
+++ *
+++ * @MESH_FAST_TX_TYPE_LOCAL: tx from the local vif address as SA
+++ * @MESH_FAST_TX_TYPE_PROXIED: local tx with a different SA (e.g. bridged)
+++ * @MESH_FAST_TX_TYPE_FORWARDED: forwarded from a different mesh point
+++ */
+++enum ieee80211_mesh_fast_tx_type {
+++	MESH_FAST_TX_TYPE_LOCAL,
+++	MESH_FAST_TX_TYPE_PROXIED,
+++	MESH_FAST_TX_TYPE_FORWARDED,
+++};
+++
+++/**
+++ * struct ieee80211_mesh_fast_tx_key - cached mesh fast tx entry key
+++ *
+++ * @addr: The Ethernet DA for this entry
+++ * @type: cache entry type
+++ */
+++struct ieee80211_mesh_fast_tx_key {
+++	u8 addr[ETH_ALEN] __aligned(2);
+++	enum ieee80211_mesh_fast_tx_type type;
+++};
+++
+++/**
++  * struct ieee80211_mesh_fast_tx - cached mesh fast tx entry
++  * @rhash: rhashtable pointer
++- * @addr_key: The Ethernet DA which is the key for this entry
+++ * @key: the lookup key for this cache entry
++  * @fast_tx: base fast_tx data
++  * @hdr: cached mesh and rfc1042 headers
++  * @hdrlen: length of mesh + rfc1042
++@@ -146,7 +170,7 @@ struct mesh_path {
++  */
++ struct ieee80211_mesh_fast_tx {
++ 	struct rhash_head rhash;
++-	u8 addr_key[ETH_ALEN] __aligned(2);
+++	struct ieee80211_mesh_fast_tx_key key;
++ 
++ 	struct ieee80211_fast_tx fast_tx;
++ 	u8 hdr[sizeof(struct ieee80211s_hdr) + sizeof(rfc1042_header)];
++@@ -329,7 +353,8 @@ void mesh_path_tx_root_frame(struct ieee
++ 
++ bool mesh_action_is_path_sel(struct ieee80211_mgmt *mgmt);
++ struct ieee80211_mesh_fast_tx *
++-mesh_fast_tx_get(struct ieee80211_sub_if_data *sdata, const u8 *addr);
+++mesh_fast_tx_get(struct ieee80211_sub_if_data *sdata,
+++		 struct ieee80211_mesh_fast_tx_key *key);
++ bool ieee80211_mesh_xmit_fast(struct ieee80211_sub_if_data *sdata,
++ 			      struct sk_buff *skb, u32 ctrl_flags);
++ void mesh_fast_tx_cache(struct ieee80211_sub_if_data *sdata,
++--- a/net/mac80211/mesh_pathtbl.c
+++++ b/net/mac80211/mesh_pathtbl.c
++@@ -36,8 +36,8 @@ static const struct rhashtable_params me
++ static const struct rhashtable_params fast_tx_rht_params = {
++ 	.nelem_hint = 10,
++ 	.automatic_shrinking = true,
++-	.key_len = ETH_ALEN,
++-	.key_offset = offsetof(struct ieee80211_mesh_fast_tx, addr_key),
+++	.key_len = sizeof(struct ieee80211_mesh_fast_tx_key),
+++	.key_offset = offsetof(struct ieee80211_mesh_fast_tx, key),
++ 	.head_offset = offsetof(struct ieee80211_mesh_fast_tx, rhash),
++ 	.hashfn = mesh_table_hash,
++ };
++@@ -426,20 +426,21 @@ static void mesh_fast_tx_entry_free(stru
++ }
++ 
++ struct ieee80211_mesh_fast_tx *
++-mesh_fast_tx_get(struct ieee80211_sub_if_data *sdata, const u8 *addr)
+++mesh_fast_tx_get(struct ieee80211_sub_if_data *sdata,
+++		 struct ieee80211_mesh_fast_tx_key *key)
++ {
++ 	struct ieee80211_mesh_fast_tx *entry;
++ 	struct mesh_tx_cache *cache;
++ 
++ 	cache = &sdata->u.mesh.tx_cache;
++-	entry = rhashtable_lookup(&cache->rht, addr, fast_tx_rht_params);
+++	entry = rhashtable_lookup(&cache->rht, key, fast_tx_rht_params);
++ 	if (!entry)
++ 		return NULL;
++ 
++ 	if (!(entry->mpath->flags & MESH_PATH_ACTIVE) ||
++ 	    mpath_expired(entry->mpath)) {
++ 		spin_lock_bh(&cache->walk_lock);
++-		entry = rhashtable_lookup(&cache->rht, addr, fast_tx_rht_params);
+++		entry = rhashtable_lookup(&cache->rht, key, fast_tx_rht_params);
++ 		if (entry)
++ 		    mesh_fast_tx_entry_free(cache, entry);
++ 		spin_unlock_bh(&cache->walk_lock);
++@@ -484,18 +485,24 @@ void mesh_fast_tx_cache(struct ieee80211
++ 	if (!sta)
++ 		return;
++ 
+++	build.key.type = MESH_FAST_TX_TYPE_LOCAL;
++ 	if ((meshhdr->flags & MESH_FLAGS_AE) == MESH_FLAGS_AE_A5_A6) {
++ 		/* This is required to keep the mppath alive */
++ 		mppath = mpp_path_lookup(sdata, meshhdr->eaddr1);
++ 		if (!mppath)
++ 			return;
++ 		build.mppath = mppath;
+++		if (!ether_addr_equal(meshhdr->eaddr2, sdata->vif.addr))
+++			build.key.type = MESH_FAST_TX_TYPE_PROXIED;
++ 	} else if (ieee80211_has_a4(hdr->frame_control)) {
++ 		mppath = mpath;
++ 	} else {
++ 		return;
++ 	}
++ 
+++	if (!ether_addr_equal(hdr->addr4, sdata->vif.addr))
+++		build.key.type = MESH_FAST_TX_TYPE_FORWARDED;
+++
++ 	/* rate limit, in case fast xmit can't be enabled */
++ 	if (mppath->fast_tx_check == jiffies)
++ 		return;
++@@ -542,7 +549,7 @@ void mesh_fast_tx_cache(struct ieee80211
++ 		}
++ 	}
++ 
++-	memcpy(build.addr_key, mppath->dst, ETH_ALEN);
+++	memcpy(build.key.addr, mppath->dst, ETH_ALEN);
++ 	build.timestamp = jiffies;
++ 	build.fast_tx.band = info->band;
++ 	build.fast_tx.da_offs = offsetof(struct ieee80211_hdr, addr3);
++@@ -644,13 +651,19 @@ void mesh_fast_tx_flush_addr(struct ieee
++ 			     const u8 *addr)
++ {
++ 	struct mesh_tx_cache *cache = &sdata->u.mesh.tx_cache;
+++	struct ieee80211_mesh_fast_tx_key key = {};
++ 	struct ieee80211_mesh_fast_tx *entry;
+++	int i;
++ 
+++	ether_addr_copy(key.addr, addr);
++ 	cache = &sdata->u.mesh.tx_cache;
++ 	spin_lock_bh(&cache->walk_lock);
++-	entry = rhashtable_lookup(&cache->rht, addr, fast_tx_rht_params);
++-	if (entry)
++-		mesh_fast_tx_entry_free(cache, entry);
+++	for (i = MESH_FAST_TX_TYPE_LOCAL; i < MESH_FAST_TX_TYPE_FORWARDED; i++) {
+++		key.type = i;
+++		entry = rhashtable_lookup(&cache->rht, &key, fast_tx_rht_params);
+++		if (entry)
+++			mesh_fast_tx_entry_free(cache, entry);
+++	}
++ 	spin_unlock_bh(&cache->walk_lock);
++ }
++ 
++--- a/net/mac80211/rx.c
+++++ b/net/mac80211/rx.c
++@@ -2726,7 +2726,10 @@ ieee80211_rx_mesh_fast_forward(struct ie
++ 			       struct sk_buff *skb, int hdrlen)
++ {
++ 	struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh;
++-	struct ieee80211_mesh_fast_tx *entry = NULL;
+++	struct ieee80211_mesh_fast_tx_key key = {
+++		.type = MESH_FAST_TX_TYPE_FORWARDED
+++	};
+++	struct ieee80211_mesh_fast_tx *entry;
++ 	struct ieee80211s_hdr *mesh_hdr;
++ 	struct tid_ampdu_tx *tid_tx;
++ 	struct sta_info *sta;
++@@ -2735,9 +2738,13 @@ ieee80211_rx_mesh_fast_forward(struct ie
++ 
++ 	mesh_hdr = (struct ieee80211s_hdr *)(skb->data + sizeof(eth));
++ 	if ((mesh_hdr->flags & MESH_FLAGS_AE) == MESH_FLAGS_AE_A5_A6)
++-		entry = mesh_fast_tx_get(sdata, mesh_hdr->eaddr1);
+++		ether_addr_copy(key.addr, mesh_hdr->eaddr1);
++ 	else if (!(mesh_hdr->flags & MESH_FLAGS_AE))
++-		entry = mesh_fast_tx_get(sdata, skb->data);
+++		ether_addr_copy(key.addr, skb->data);
+++	else
+++		return false;
+++
+++	entry = mesh_fast_tx_get(sdata, &key);
++ 	if (!entry)
++ 		return false;
++ 
+diff --git a/package/kernel/mac80211/patches/subsys/339-wifi-cfg80211-fix-receving-mesh-packets-without-RFC1.patch b/package/kernel/mac80211/patches/subsys/339-wifi-cfg80211-fix-receving-mesh-packets-without-RFC1.patch
+new file mode 100644
+index 0000000000..e32c6ae1f3
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/339-wifi-cfg80211-fix-receving-mesh-packets-without-RFC1.patch
+@@ -0,0 +1,25 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Tue, 11 Jul 2023 13:30:12 +0200
++Subject: [PATCH] wifi: cfg80211: fix receving mesh packets without RFC1042
++ header
++
++Fix ethernet header length field after stripping the mesh header
++
++Cc: stable@vger.kernel.org
++Link: https://lore.kernel.org/all/CT5GNZSK28AI.2K6M69OXM9RW5@syracuse/
++Fixes: 986e43b19ae9 ("wifi: mac80211: fix receiving A-MSDU frames on mesh interfaces")
++Reported-by: Nicolas Escande <nico.escande@gmail.com>
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/wireless/util.c
+++++ b/net/wireless/util.c
++@@ -580,6 +580,8 @@ int ieee80211_strip_8023_mesh_hdr(struct
++ 		hdrlen += ETH_ALEN + 2;
++ 	else if (!pskb_may_pull(skb, hdrlen))
++ 		return -EINVAL;
+++	else
+++		payload.eth.h_proto = htons(skb->len - hdrlen);
++ 
++ 	mesh_addr = skb->data + sizeof(payload.eth) + ETH_ALEN;
++ 	switch (payload.flags & MESH_FLAGS_AE) {
+diff --git a/package/kernel/mac80211/patches/subsys/400-allow-ibss-mixed.patch b/package/kernel/mac80211/patches/subsys/400-allow-ibss-mixed.patch
+new file mode 100644
+index 0000000000..c38fa13f03
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/400-allow-ibss-mixed.patch
+@@ -0,0 +1,40 @@
++From: Hauke Mehrtens <hauke@hauke-m.de>
++Date: Mon, 24 Feb 2020 00:00:00 +0100
++Subject: [PATCH] mac80211: Allow IBSS mode and different beacon intervals
++
++ath10k-ct supports the combination to select IBSS (ADHOC) mode and
++different beacon intervals together. mac80211 does not like this
++combination, but Ben says this is ok, so remove this check.
++
++ath10k-ct starting with version 5.2 allows the combination of
++NL80211_IFTYPE_ADHOC and beacon_int_min_gcd in ath10k_10x_ct_if_comb
++which triggers this warning. Ben told me that this is not a big problem
++and we should ignore this.
++---
++ net/wireless/core.c | 15 ---------------
++ 1 file changed, 15 deletions(-)
++
++--- a/net/wireless/core.c
+++++ b/net/wireless/core.c
++@@ -614,21 +614,6 @@ static int wiphy_verify_combinations(str
++ 				    c->limits[j].max > 1))
++ 				return -EINVAL;
++ 
++-			/*
++-			 * This isn't well-defined right now. If you have an
++-			 * IBSS interface, then its beacon interval may change
++-			 * by joining other networks, and nothing prevents it
++-			 * from doing that.
++-			 * So technically we probably shouldn't even allow AP
++-			 * and IBSS in the same interface, but it seems that
++-			 * some drivers support that, possibly only with fixed
++-			 * beacon intervals for IBSS.
++-			 */
++-			if (WARN_ON(types & BIT(NL80211_IFTYPE_ADHOC) &&
++-				    c->beacon_int_min_gcd)) {
++-				return -EINVAL;
++-			}
++-
++ 			cnt += c->limits[j].max;
++ 			/*
++ 			 * Don't advertise an unsupported type
+diff --git a/package/kernel/mac80211/patches/subsys/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch b/package/kernel/mac80211/patches/subsys/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch
+new file mode 100644
+index 0000000000..26af6a2fb9
+--- /dev/null
++++ b/package/kernel/mac80211/patches/subsys/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch
+@@ -0,0 +1,29 @@
++--- a/backport-include/linux/of_net.h
+++++ /dev/null
++@@ -1,26 +0,0 @@
++-#ifndef _BP_OF_NET_H
++-#define _BP_OF_NET_H
++-#include_next <linux/of_net.h>
++-#include <linux/version.h>
++-#include <linux/etherdevice.h>
++-
++-/* The behavior of of_get_mac_address() changed in kernel 5.2, it now
++- * returns an error code and not NULL in case of an error.
++- */
++-#if LINUX_VERSION_IS_LESS(5,13,0)
++-static inline int backport_of_get_mac_address(struct device_node *np, u8 *mac_out)
++-{
++-	const void *mac = of_get_mac_address(np);
++-
++-	if (!mac)
++-		return -ENODEV;
++-	if (IS_ERR(mac))
++-		return PTR_ERR(mac);
++-	ether_addr_copy(mac_out, mac);
++-	
++-	return 0;
++-}
++-#define of_get_mac_address LINUX_BACKPORT(of_get_mac_address)
++-#endif /* < 5.2 */
++-
++-#endif /* _BP_OF_NET_H */
+diff --git a/package/kernel/mac80211/ralink.mk b/package/kernel/mac80211/ralink.mk
+new file mode 100644
+index 0000000000..83d208ee1a
+--- /dev/null
++++ b/package/kernel/mac80211/ralink.mk
+@@ -0,0 +1,131 @@
++PKG_DRIVERS += \
++	rt2x00-lib rt2x00-pci rt2x00-usb rt2x00-mmio \
++	rt2800-lib rt2800-mmio rt2800-pci rt2800-soc rt2800-usb
++
++PKG_CONFIG_DEPENDS += \
++	CONFIG_PACKAGE_RT2X00_LIB_DEBUGFS \
++	CONFIG_PACKAGE_RT2X00_DEBUG
++
++config-$(call config_package,rt2x00-lib) += RT2X00 RT2X00_LIB
++config-$(call config_package,rt2x00-pci) += RT2X00_LIB_PCI
++config-$(call config_package,rt2x00-mmio) += RT2X00_LIB_MMIO
++config-$(call config_package,rt2x00-usb) += RT2X00_LIB_USB
++config-$(CONFIG_PACKAGE_RT2X00_LIB_DEBUGFS) += RT2X00_LIB_DEBUGFS
++config-$(CONFIG_PACKAGE_RT2X00_DEBUG) += RT2X00_DEBUG
++
++config-$(call config_package,rt2400-pci) += RT2400PCI
++config-$(call config_package,rt2500-pci) += RT2500PCI
++config-$(call config_package,rt2500-usb) += RT2500USB
++config-$(call config_package,rt61-pci) += RT61PCI
++config-$(call config_package,rt73-usb) += RT73USB
++
++config-$(call config_package,rt2800-lib) += RT2800_LIB
++
++config-$(call config_package,rt2800-soc) += RT2800SOC
++config-$(call config_package,rt2800-pci) += RT2800PCI
++config-y += RT2800PCI_RT33XX RT2800PCI_RT35XX RT2800PCI_RT53XX RT2800PCI_RT3290
++
++config-$(call config_package,rt2800-usb) += RT2800USB
++config-y += RT2800USB_RT33XX RT2800USB_RT35XX RT2800USB_RT3573 RT2800USB_RT53XX RT2800USB_RT55XX RT2800USB_UNKNOWN
++
++define KernelPackage/rt2x00/Default
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Ralink Drivers for RT2x00 cards
++endef
++
++define KernelPackage/rt2x00-lib
++$(call KernelPackage/rt2x00/Default)
++  DEPENDS+= @(PCI_SUPPORT||USB_SUPPORT||TARGET_ramips) +kmod-mac80211
++  TITLE+= (LIB)
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2x00lib.ko
++  MENU:=1
++endef
++
++define KernelPackage/rt2x00-lib/config
++  if PACKAGE_kmod-rt2x00-lib
++
++	config PACKAGE_RT2X00_LIB_DEBUGFS
++		bool "Enable rt2x00 debugfs support"
++		depends on PACKAGE_MAC80211_DEBUGFS
++		help
++		  Enable creation of debugfs files for the rt2x00 drivers.
++		  These debugfs files support both reading and writing of the
++		  most important register types of the rt2x00 hardware.
++
++	config PACKAGE_RT2X00_DEBUG
++		bool "Enable rt2x00 debug output"
++		help
++		  Enable debugging output for all rt2x00 modules
++
++  endif
++endef
++
++define KernelPackage/rt2x00-mmio
++$(call KernelPackage/rt2x00/Default)
++  DEPENDS+= @(PCI_SUPPORT||TARGET_ramips) +kmod-rt2x00-lib
++  HIDDEN:=1
++  TITLE+= (MMIO)
++  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2x00mmio.ko
++endef
++
++define KernelPackage/rt2x00-pci
++$(call KernelPackage/rt2x00/Default)
++  DEPENDS+= @PCI_SUPPORT +kmod-rt2x00-mmio +kmod-rt2x00-lib
++  HIDDEN:=1
++  TITLE+= (PCI)
++  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2x00pci.ko
++  AUTOLOAD:=$(call AutoProbe,rt2x00pci)
++endef
++
++define KernelPackage/rt2x00-usb
++$(call KernelPackage/rt2x00/Default)
++  DEPENDS+= @USB_SUPPORT +kmod-rt2x00-lib +kmod-usb-core
++  HIDDEN:=1
++  TITLE+= (USB)
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2x00usb.ko
++  AUTOLOAD:=$(call AutoProbe,rt2x00usb)
++endef
++
++define KernelPackage/rt2800-lib
++$(call KernelPackage/rt2x00/Default)
++  DEPENDS+= @(PCI_SUPPORT||USB_SUPPORT||TARGET_ramips) +kmod-rt2x00-lib +kmod-lib-crc-ccitt
++  HIDDEN:=1
++  TITLE+= (rt2800 LIB)
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2800lib.ko
++endef
++
++define KernelPackage/rt2800-mmio
++$(call KernelPackage/rt2x00/Default)
++  TITLE += (RT28xx/RT3xxx MMIO)
++  DEPENDS += +kmod-rt2800-lib +kmod-rt2x00-mmio
++  HIDDEN:=1
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2800mmio.ko
++endef
++
++define KernelPackage/rt2800-soc
++$(call KernelPackage/rt2x00/Default)
++  DEPENDS += @(TARGET_ramips_rt288x||TARGET_ramips_rt305x||TARGET_ramips_rt3883||TARGET_ramips_mt7620) +kmod-rt2800-mmio +kmod-rt2800-lib
++  TITLE += (RT28xx/RT3xxx SoC)
++  FILES := \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2x00soc.ko \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2800soc.ko
++  AUTOLOAD:=$(call AutoProbe,rt2800soc)
++endef
++
++define KernelPackage/rt2800-pci
++$(call KernelPackage/rt2x00/Default)
++  DEPENDS+= @PCI_SUPPORT +kmod-rt2x00-pci +kmod-rt2800-lib +kmod-rt2800-mmio +kmod-eeprom-93cx6 +rt2800-pci-firmware
++  TITLE+= (RT2860 PCI)
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2800pci.ko
++  AUTOLOAD:=$(call AutoProbe,rt2800pci)
++endef
++
++define KernelPackage/rt2800-usb
++$(call KernelPackage/rt2x00/Default)
++  DEPENDS+= @USB_SUPPORT +kmod-rt2x00-usb +kmod-rt2800-lib +kmod-lib-crc-ccitt +rt2800-usb-firmware
++  TITLE+= (RT2870 USB)
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2800usb.ko
++  AUTOLOAD:=$(call AutoProbe,rt2800usb)
++endef
++
++
+diff --git a/package/kernel/mac80211/realtek.mk b/package/kernel/mac80211/realtek.mk
+new file mode 100644
+index 0000000000..9c14358326
+--- /dev/null
++++ b/package/kernel/mac80211/realtek.mk
+@@ -0,0 +1,197 @@
++PKG_DRIVERS += \
++	rtlwifi rtlwifi-pci rtlwifi-btcoexist rtlwifi-usb rtl8192c-common \
++	rtl8192ce rtl8192se rtl8192de rtl8192cu rtl8723bs rtl8821ae \
++	rtl8xxxu rtw88
++
++config-$(call config_package,rtlwifi) += RTL_CARDS RTLWIFI
++config-$(call config_package,rtlwifi-pci) += RTLWIFI_PCI
++config-$(call config_package,rtlwifi-btcoexist) += RTLBTCOEXIST
++config-$(call config_package,rtlwifi-usb) += RTLWIFI_USB
++config-$(call config_package,rtl8192c-common) += RTL8192C_COMMON
++config-$(call config_package,rtl8192ce) += RTL8192CE
++config-$(call config_package,rtl8192se) += RTL8192SE
++config-$(call config_package,rtl8192de) += RTL8192DE
++config-$(call config_package,rtl8192cu) += RTL8192CU
++config-$(call config_package,rtl8821ae) += RTL8821AE
++config-$(CONFIG_PACKAGE_RTLWIFI_DEBUG) += RTLWIFI_DEBUG
++
++config-$(call config_package,rtl8xxxu) += RTL8XXXU
++config-y += RTL8XXXU_UNTESTED
++
++config-$(call config_package,rtl8723bs) += RTL8723BS
++config-y += STAGING
++
++config-$(call config_package,rtw88) += RTW88 RTW88_CORE RTW88_PCI
++config-y += RTW88_8822BE RTW88_8822CE RTW88_8723DE
++config-$(CONFIG_PACKAGE_RTW88_DEBUG) += RTW88_DEBUG
++config-$(CONFIG_PACKAGE_RTW88_DEBUGFS) += RTW88_DEBUGFS
++
++define KernelPackage/rtlwifi/config
++	config PACKAGE_RTLWIFI_DEBUG
++		bool "Realtek wireless debugging"
++		depends on PACKAGE_kmod-rtlwifi
++		help
++		  Say Y, if you want to debug realtek wireless drivers.
++
++endef
++
++define KernelPackage/rtlwifi
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Realtek common driver part
++  DEPENDS+= @(PCI_SUPPORT||USB_SUPPORT) +kmod-mac80211
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtlwifi.ko
++  HIDDEN:=1
++endef
++
++define KernelPackage/rtlwifi-pci
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Realtek common driver part (PCI support)
++  DEPENDS+= @PCI_SUPPORT +kmod-rtlwifi
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtl_pci.ko
++  AUTOLOAD:=$(call AutoProbe,rtl_pci)
++  HIDDEN:=1
++endef
++
++define KernelPackage/rtlwifi-btcoexist
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Realtek BT coexist support
++  DEPENDS+= +kmod-rtlwifi
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/btcoexist/btcoexist.ko
++  AUTOLOAD:=$(call AutoProbe,btcoexist)
++  HIDDEN:=1
++endef
++
++define KernelPackage/rtlwifi-usb
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Realtek common driver part (USB support)
++  DEPENDS+= @USB_SUPPORT +kmod-usb-core +kmod-rtlwifi
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtl_usb.ko
++  AUTOLOAD:=$(call AutoProbe,rtl_usb)
++  HIDDEN:=1
++endef
++
++define KernelPackage/rtl8192c-common
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Realtek RTL8192CE/RTL8192CU common support module
++  DEPENDS+= +kmod-rtlwifi
++  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtl8192c/rtl8192c-common.ko
++  HIDDEN:=1
++endef
++
++define KernelPackage/rtl8192ce
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Realtek RTL8192CE/RTL8188CE support
++  DEPENDS+= +kmod-rtlwifi-pci +kmod-rtl8192c-common +rtl8192ce-firmware
++  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/rtl8192ce.ko
++  AUTOLOAD:=$(call AutoProbe,rtl8192ce)
++endef
++
++define KernelPackage/rtl8192se
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Realtek RTL8192SE/RTL8191SE support
++  DEPENDS+= +kmod-rtlwifi-pci +rtl8192se-firmware
++  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtl8192se/rtl8192se.ko
++  AUTOLOAD:=$(call AutoProbe,rtl8192se)
++endef
++
++define KernelPackage/rtl8192de
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Realtek RTL8192DE/RTL8188DE support
++  DEPENDS+= +kmod-rtlwifi-pci +rtl8192de-firmware
++  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtl8192de/rtl8192de.ko
++  AUTOLOAD:=$(call AutoProbe,rtl8192de)
++endef
++
++define KernelPackage/rtl8192cu
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Realtek RTL8192CU/RTL8188CU support
++  DEPENDS+= +kmod-rtlwifi-usb +kmod-rtl8192c-common +rtl8192cu-firmware
++  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/rtl8192cu.ko
++  AUTOLOAD:=$(call AutoProbe,rtl8192cu)
++endef
++
++define KernelPackage/rtl8821ae
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Realtek RTL8821AE support
++  DEPENDS+= +kmod-rtlwifi-btcoexist +kmod-rtlwifi-pci +rtl8821ae-firmware
++  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/rtl8821ae.ko
++  AUTOLOAD:=$(call AutoProbe,rtl8821ae)
++endef
++
++define KernelPackage/rtl8xxxu
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=alternative Realtek RTL8XXXU support
++  DEPENDS+= @USB_SUPPORT +kmod-usb-core +kmod-mac80211
++  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.ko
++  AUTOLOAD:=$(call AutoProbe,rtl8xxxu)
++endef
++
++define KernelPackage/rtl8xxxu/description
++  This is an alternative driver for various Realtek RTL8XXX
++  parts written to utilize the Linux mac80211 stack.
++  The driver is known to work with a number of RTL8723AU,
++  RL8188CU, RTL8188RU, RTL8191CU, and RTL8192CU devices
++
++  This driver is under development and has a limited feature
++  set. In particular it does not yet support 40MHz channels
++  and power management. However it should have a smaller
++  memory footprint than the vendor drivers and benetifs
++  from the in kernel mac80211 stack.
++
++  It can coexist with drivers from drivers/staging/rtl8723au,
++  drivers/staging/rtl8192u, and drivers/net/wireless/rtlwifi,
++  but you will need to control which module you wish to load.
++
++  RTL8XXXU_UNTESTED is enabled
++  This option enables detection of Realtek 8723/8188/8191/8192 WiFi
++  USB devices which have not been tested directly by the driver
++  author or reported to be working by third parties.
++
++  Please report your results!
++endef
++
++define KernelPackage/rtw88/config
++	config PACKAGE_RTW88_DEBUG
++		bool "Realtek wireless debugging (rtw88)"
++		depends on PACKAGE_kmod-rtw88
++		help
++		  Enable debugging output for rtw88 devices
++
++	config PACKAGE_RTW88_DEBUGFS
++		bool "Enable rtw88 debugfS support"
++		select KERNEL_DEBUG_FS
++		depends on PACKAGE_kmod-rtw88
++		help
++		  Select this to see extensive information about
++		  the internal state of rtw88 in debugfs.
++endef
++
++define KernelPackage/rtw88
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Realtek RTL8822BE/RTL8822CE/RTL8723DE
++  DEPENDS+= @(PCI_SUPPORT) +kmod-mac80211 +@DRIVER_11AC_SUPPORT
++  FILES:=\
++	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822be.ko \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822b.ko \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822ce.ko \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822c.ko \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8723de.ko \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8723d.ko \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_core.ko \
++	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_pci.ko
++  AUTOLOAD:=$(call AutoProbe,rtw88_8822be rtw88_8822ce rtw88_8723de)
++endef
++
++define KernelPackage/rtl8723bs
++  $(call KernelPackage/mac80211/Default)
++  TITLE:=Realtek RTL8723BS SDIO Wireless LAN NIC driver (staging)
++  DEPENDS+=+kmod-mmc +kmod-mac80211
++  FILES:=$(PKG_BUILD_DIR)/drivers/staging/rtl8723bs/r8723bs.ko
++  AUTOLOAD:=$(call AutoProbe,r8723bs)
++endef
++
++define KernelPackage/rtl8723bs/description
++ This option enables support for RTL8723BS SDIO drivers, such as the wifi found
++ on the 1st gen Intel Compute Stick, the CHIP and many other Intel Atom and ARM
++ based devices.
++endef
+diff --git a/package/kernel/mac80211/scripts/import-backports.sh b/package/kernel/mac80211/scripts/import-backports.sh
+new file mode 100755
+index 0000000000..35aa411e6c
+--- /dev/null
++++ b/package/kernel/mac80211/scripts/import-backports.sh
+@@ -0,0 +1,109 @@
++#!/usr/bin/env bash
++BASE=$1; shift
++
++usage() {
++	echo "Usage: $0 NNN <file>..."
++	exit 1
++}
++
++check_number() {
++	case "$1" in
++		[0-9][0-9][0-9]) return 0;;
++	esac
++	return 1;
++}
++
++patch_header()
++{
++	awk '
++	/^(---|\*\*\*|Index:)[ \t][^ \t]|^diff -/ \
++		{ exit }
++		{ print }
++	'
++}
++
++strip_diffstat()
++{
++	awk '
++	/#? .* \| / \
++		{ eat = eat $0 "\n"
++		  next }
++	/^#? .* files? changed(, .* insertions?\(\+\))?(, .* deletions?\(-\))?/ \
++		{ eat = ""
++		  next }
++		{ print eat $0
++		  eat = "" }
++	'
++}
++
++strip_trailing_whitespace() {
++	sed -e 's:[ '$'\t'']*$::'
++}
++
++fixup_header() {
++	awk '
++		/^From / { next }
++		/^Subject: / {
++			sub("Subject: \\[[^\]]*\\]", "Subject: [PATCH]")
++		}
++		{ print }
++	'
++}
++
++check_number "$BASE" || usage
++
++quilt series > /dev/null || {
++	echo "Not in quilt directory"
++	exit 2
++}
++
++get_next() {
++	NEW=$BASE
++	quilt series | while read CUR; do
++		[ -n "$CUR" ] || break
++		CUR=${CUR%%-*}
++		check_number "$CUR" || continue
++		[ "$CUR" -lt "$NEW" ] && continue
++		[ "$CUR" -ge "$(($BASE + 100))" ] && continue
++		NEW="$(($CUR + 1))"
++		echo $NEW
++	done | tail -n1
++}
++
++CUR=$(get_next)
++CUR="${CUR:-$BASE}"
++
++while [ -n "$1" ]; do
++	FILE="$1"; shift
++	NAME="$(basename $FILE)"
++	NAME="${NAME#[0-9]*-}"
++	echo -n "Processing patch $NAME: "
++
++	[ -e "$FILE" ] || {
++		echo "file $FILE not found"
++		exit 1
++	}
++
++	grep -qE "$NAME$" patches/series && {
++		echo "already applied"
++		continue
++	}
++
++	quilt new "$CUR-$NAME" || exit 1
++	patch_header < "$FILE" |
++		strip_diffstat |
++		strip_trailing_whitespace |
++		fixup_header > "patches/$CUR-$NAME"
++
++	quilt fold < "$FILE" || {
++		cp "$FILE" ./cur_patch
++		echo "patch $FILE failed to apply, copied to ./cur_patch"
++		exit 1
++	}
++
++	quilt refresh -p ab --no-index --no-timestamps
++
++	CUR="$(($CUR + 1))"
++done
++
++exit 0
+-- 
+2.34.1
+
diff --git a/patches/wifi/0007-mac80211-drop-hostapd-dependency.patch b/patches/0054-mac80211-drop-hostapd-dependency.patch
similarity index 79%
rename from patches/wifi/0007-mac80211-drop-hostapd-dependency.patch
rename to patches/0054-mac80211-drop-hostapd-dependency.patch
index 7d59130ee..4b20d0f37 100644
--- a/patches/wifi/0007-mac80211-drop-hostapd-dependency.patch
+++ b/patches/0054-mac80211-drop-hostapd-dependency.patch
@@ -1,7 +1,7 @@
-From aa49886b11eac8633fff054dfd6fbbeee6e98954 Mon Sep 17 00:00:00 2001
+From d8d0935355a83ea46437d5c145d4c55067d2db00 Mon Sep 17 00:00:00 2001
 From: John Crispin <john@phrozen.org>
 Date: Fri, 18 Aug 2023 08:37:27 +0200
-Subject: [PATCH] mac80211: drop hostapd dependency
+Subject: [PATCH 54/55] mac80211: drop hostapd dependency
 
 Signed-off-by: John Crispin <john@phrozen.org>
 ---
@@ -9,10 +9,10 @@ Signed-off-by: John Crispin <john@phrozen.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/package/kernel/mac80211/Makefile b/package/kernel/mac80211/Makefile
-index 2f9fd11f10..6d39668bbc 100644
+index a7472ee779..1cd537b140 100644
 --- a/package/kernel/mac80211/Makefile
 +++ b/package/kernel/mac80211/Makefile
-@@ -126,7 +126,7 @@ define KernelPackage/mac80211
+@@ -121,7 +121,7 @@ define KernelPackage/mac80211
    $(call KernelPackage/mac80211/Default)
    TITLE:=Linux 802.11 Wireless Networking Stack
    # +kmod-crypto-cmac is a runtime only dependency of net/mac80211/aes_cmac.c
diff --git a/patches/0055-Revert-mac80211-change-default-ifname-to-phy-type-in.patch b/patches/0055-Revert-mac80211-change-default-ifname-to-phy-type-in.patch
new file mode 100644
index 000000000..cbfb3c56d
--- /dev/null
+++ b/patches/0055-Revert-mac80211-change-default-ifname-to-phy-type-in.patch
@@ -0,0 +1,70 @@
+From ab10243a695beaefcf48aad10d3311c81124b35e Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Mon, 4 Sep 2023 09:02:22 +0200
+Subject: [PATCH 55/55] Revert: mac80211: change default ifname to
+ <phy>-<type><index>
+
+    commit 6603748e0ca697f484adfc16a0d49d35ed36954d
+    Author: Felix Fietkau <nbd@nbd.name>
+    Date:   Fri Sep 23 14:12:32 2022 +0200
+
+    mac80211: change default ifname to <phy>-<type><index>
+
+    This makes it clear, which phy a wlan device belongs to and also helps with
+    telling them apart by including the mode in the ifname.
+    Preparation for automatically renaming PHYs
+
+    Signed-off-by: Felix Fietkau <nbd@nbd.name>
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ .../files/lib/netifd/wireless/mac80211.sh     | 21 +++----------------
+ 1 file changed, 3 insertions(+), 18 deletions(-)
+
+diff --git a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh
+index 3b88af4679..f3c982e9f1 100644
+--- a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh
++++ b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh
+@@ -131,7 +131,7 @@ mac80211_hostapd_setup_base() {
+ 
+ 	json_select config
+ 
+-	[ "$auto_channel" -gt 0 ] && channel=acs_survey
++	[ "$auto_channel" -gt 0 ] && channel=0
+ 
+ 	[ "$auto_channel" -gt 0 ] && json_get_vars acs_exclude_dfs
+ 	[ -n "$acs_exclude_dfs" ] && [ "$acs_exclude_dfs" -gt 0 ] &&
+@@ -656,28 +656,13 @@ mac80211_check_ap() {
+ 	has_ap=1
+ }
+ 
+-mac80211_set_ifname() {
+-	local phy="$1"
+-	local prefix="$2"
+-	eval "ifname=\"$phy-$prefix\${idx_$prefix:-0}\"; idx_$prefix=\$((\${idx_$prefix:-0 } + 1))"
+-}
+-
+ mac80211_prepare_vif() {
+ 	json_select config
+ 
+ 	json_get_vars ifname mode ssid wds powersave macaddr enable wpa_psk_file vlan_file
+ 
+-	[ -n "$ifname" ] || {
+-		local prefix;
+-
+-		case "$mode" in
+-		ap|sta|mesh) prefix=$mode;;
+-		adhoc) prefix=ibss;;
+-		monitor) prefix=mon;;
+-		esac
+-
+-		mac80211_set_ifname "$phy" "$prefix"
+-	}
++	[ -n "$ifname" ] || ifname="wlan${phy#phy}${if_idx:+-$if_idx}"
++	if_idx=$((${if_idx:-0} + 1))
+ 
+ 	append active_ifnames "$ifname"
+ 	set_default wds 0
+-- 
+2.34.1
+
diff --git a/patches/0056-ipq40xx-remove-23.05-version-of-the-target.patch b/patches/0056-ipq40xx-remove-23.05-version-of-the-target.patch
new file mode 100644
index 000000000..a70474350
--- /dev/null
+++ b/patches/0056-ipq40xx-remove-23.05-version-of-the-target.patch
@@ -0,0 +1,35323 @@
+From ba64689ba52a1b00c9383e9597add3d99af58bc4 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Mon, 4 Sep 2023 12:20:23 +0200
+Subject: [PATCH 56/58] ipq40xx: remove 23.05 version of the target
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ target/linux/ipq40xx/Makefile                 |   23 -
+ .../ipq40xx/base-files/etc/board.d/01_leds    |  123 --
+ .../ipq40xx/base-files/etc/board.d/02_network |  235 ---
+ .../base-files/etc/board.d/03_gpio_switches   |   46 -
+ .../base-files/etc/board.d/05_compat-version  |   18 -
+ .../etc/hotplug.d/firmware/11-ath10k-caldata  |  278 ---
+ .../etc/hotplug.d/firmware/40-ct-fw-cfg       |   32 -
+ .../ipq40xx/base-files/etc/init.d/bootcount   |   33 -
+ target/linux/ipq40xx/base-files/etc/inittab   |    5 -
+ .../etc/uci-defaults/04_led_migration         |   25 -
+ .../etc/uci-defaults/05_fix-compat-version    |   13 -
+ .../lib/firmware/ath10k/fwcfg-ipq4019.txt     |   15 -
+ .../lib/firmware/ath10k/fwcfg-qca9888.txt     |   16 -
+ .../lib/firmware/ath10k/fwcfg-qca9984.txt     |   16 -
+ .../lib/preinit/05_set_iface_mac_ipq40xx.sh   |   47 -
+ .../lib/upgrade/dualboot_datachk.sh           |  108 --
+ .../ipq40xx/base-files/lib/upgrade/linksys.sh |  125 --
+ .../ipq40xx/base-files/lib/upgrade/netgear.sh |   76 -
+ .../base-files/lib/upgrade/platform.sh        |  251 ---
+ .../ipq40xx/base-files/lib/upgrade/sony.sh    |   91 -
+ target/linux/ipq40xx/chromium/config-default  |   10 -
+ target/linux/ipq40xx/chromium/target.mk       |    3 -
+ target/linux/ipq40xx/config-5.15              |  508 -----
+ .../arch/arm/boot/dts/qcom-ipq4018-a42.dts    |  233 ---
+ .../arm/boot/dts/qcom-ipq4018-ap120c-ac.dts   |  353 ----
+ .../arch/arm/boot/dts/qcom-ipq4018-cap-ac.dts |  253 ---
+ .../dts/qcom-ipq4018-cs-w3-wd1200g-eup.dts    |  290 ---
+ .../arm/boot/dts/qcom-ipq4018-dap-2610.dts    |  232 ---
+ .../arm/boot/dts/qcom-ipq4018-ea6350v3.dts    |  307 ---
+ .../arm/boot/dts/qcom-ipq4018-eap1300.dts     |  230 ---
+ .../arm/boot/dts/qcom-ipq4018-ecw5211.dts     |  339 ----
+ .../arch/arm/boot/dts/qcom-ipq4018-emd1.dts   |  210 ---
+ .../arm/boot/dts/qcom-ipq4018-emr3500.dts     |  215 ---
+ .../arm/boot/dts/qcom-ipq4018-ens620ext.dts   |  249 ---
+ .../arm/boot/dts/qcom-ipq4018-ex6100v2.dts    |   31 -
+ .../arm/boot/dts/qcom-ipq4018-ex6150v2.dts    |   31 -
+ .../arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi   |  339 ----
+ .../boot/dts/qcom-ipq4018-fritzbox-4040.dts   |  324 ----
+ .../arm/boot/dts/qcom-ipq4018-gl-a1300.dts    |  334 ----
+ .../arm/boot/dts/qcom-ipq4018-gl-ap1300.dts   |  302 ---
+ .../arm/boot/dts/qcom-ipq4018-hap-ac2.dts     |  296 ---
+ .../arm/boot/dts/qcom-ipq4018-jalapeno.dts    |    9 -
+ .../arm/boot/dts/qcom-ipq4018-jalapeno.dtsi   |  276 ---
+ .../dts/qcom-ipq4018-magic-2-wifi-next.dts    |  233 ---
+ .../boot/dts/qcom-ipq4018-meshpoint-one.dts   |   81 -
+ .../arm/boot/dts/qcom-ipq4018-mf287plus.dts   |  384 ----
+ .../arm/boot/dts/qcom-ipq4018-nbg6617.dts     |  361 ----
+ .../arch/arm/boot/dts/qcom-ipq4018-pa1200.dts |  225 ---
+ .../arm/boot/dts/qcom-ipq4018-rt-ac58u.dts    |  316 ----
+ .../arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi  |  247 ---
+ .../arch/arm/boot/dts/qcom-ipq4018-rutx10.dts |   36 -
+ .../arm/boot/dts/qcom-ipq4018-sxtsq-5-ac.dts  |  239 ---
+ .../arch/arm/boot/dts/qcom-ipq4018-wac510.dts |  380 ----
+ .../arm/boot/dts/qcom-ipq4018-wap-ac-lte.dts  |   45 -
+ .../arch/arm/boot/dts/qcom-ipq4018-wap-ac.dts |    9 -
+ .../arm/boot/dts/qcom-ipq4018-wap-ac.dtsi     |  215 ---
+ .../arm/boot/dts/qcom-ipq4018-wap-r-ac.dts    |   45 -
+ .../arch/arm/boot/dts/qcom-ipq4018-whw01.dts  |  336 ----
+ .../arch/arm/boot/dts/qcom-ipq4018-wr-1.dts   |  292 ---
+ .../arm/boot/dts/qcom-ipq4018-wre6606.dts     |  252 ---
+ .../arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts |  302 ---
+ .../arch/arm/boot/dts/qcom-ipq4019-a62.dts    |  269 ---
+ .../arm/boot/dts/qcom-ipq4019-cm520-79f.dts   |  387 ----
+ .../arm/boot/dts/qcom-ipq4019-e2600ac-c1.dts  |  136 --
+ .../arm/boot/dts/qcom-ipq4019-e2600ac-c2.dts  |  179 --
+ .../arm/boot/dts/qcom-ipq4019-e2600ac.dtsi    |  244 ---
+ .../arch/arm/boot/dts/qcom-ipq4019-ea8300.dts |   95 -
+ .../arm/boot/dts/qcom-ipq4019-eap2200.dts     |  286 ---
+ .../boot/dts/qcom-ipq4019-fritzbox-7530.dts   |  321 ----
+ .../dts/qcom-ipq4019-fritzrepeater-1200.dts   |  290 ---
+ .../dts/qcom-ipq4019-fritzrepeater-3000.dts   |  269 ---
+ .../arm/boot/dts/qcom-ipq4019-gl-b2200.dts    |  386 ----
+ .../boot/dts/qcom-ipq4019-habanero-dvk.dts    |  387 ----
+ .../dts/qcom-ipq4019-hap-ac3-lte6-kit.dts     |  312 ----
+ .../arm/boot/dts/qcom-ipq4019-hap-ac3.dts     |  351 ----
+ .../arm/boot/dts/qcom-ipq4019-lhgg-60ad.dts   |  281 ---
+ .../arm/boot/dts/qcom-ipq4019-map-ac2200.dts  |  363 ----
+ .../arch/arm/boot/dts/qcom-ipq4019-mf18a.dts  |  483 -----
+ .../arch/arm/boot/dts/qcom-ipq4019-mf286d.dts |  448 -----
+ .../arch/arm/boot/dts/qcom-ipq4019-mf289f.dts |  440 -----
+ .../arch/arm/boot/dts/qcom-ipq4019-mr8300.dts |   80 -
+ .../dts/qcom-ipq4019-ncp-hg100-cellular.dts   |  635 -------
+ .../arch/arm/boot/dts/qcom-ipq4019-oap100.dts |  339 ----
+ .../arch/arm/boot/dts/qcom-ipq4019-orbi.dtsi  |  338 ----
+ .../arch/arm/boot/dts/qcom-ipq4019-pa2200.dts |  250 ---
+ .../arm/boot/dts/qcom-ipq4019-r619ac-128m.dts |   18 -
+ .../arm/boot/dts/qcom-ipq4019-r619ac-64m.dts  |   12 -
+ .../arm/boot/dts/qcom-ipq4019-r619ac.dtsi     |  387 ----
+ .../arch/arm/boot/dts/qcom-ipq4019-rbr50.dts  |   30 -
+ .../arch/arm/boot/dts/qcom-ipq4019-rbs50.dts  |   30 -
+ .../arm/boot/dts/qcom-ipq4019-rt-ac42u.dts    |  325 ----
+ .../arm/boot/dts/qcom-ipq4019-rtl30vw.dts     |  393 ----
+ .../arch/arm/boot/dts/qcom-ipq4019-srr60.dts  |   12 -
+ .../arch/arm/boot/dts/qcom-ipq4019-srs60.dts  |   12 -
+ .../arm/boot/dts/qcom-ipq4019-u4019-32m.dts   |   88 -
+ .../arch/arm/boot/dts/qcom-ipq4019-u4019.dtsi |  216 ---
+ .../arm/boot/dts/qcom-ipq4019-whw03v2.dts     |  519 ------
+ .../arch/arm/boot/dts/qcom-ipq4019-wifi.dts   |  447 -----
+ .../arch/arm/boot/dts/qcom-ipq4019-wpj419.dts |  370 ----
+ .../arm/boot/dts/qcom-ipq4019-wtr-m2133hp.dts |  462 -----
+ .../arch/arm/boot/dts/qcom-ipq4019-x1pro.dts  |   89 -
+ .../arch/arm/boot/dts/qcom-ipq4019-x1pro.dtsi |  216 ---
+ .../arm/boot/dts/qcom-ipq4019-xx8300.dtsi     |  326 ----
+ .../arch/arm/boot/dts/qcom-ipq4028-wpj428.dts |  304 ---
+ .../arch/arm/boot/dts/qcom-ipq4029-ap-303.dts |  196 --
+ .../arm/boot/dts/qcom-ipq4029-ap-303h.dts     |  472 -----
+ .../arch/arm/boot/dts/qcom-ipq4029-ap-365.dts |  219 ---
+ .../dts/qcom-ipq4029-aruba-glenmorangie.dtsi  |  272 ---
+ .../arm/boot/dts/qcom-ipq4029-gl-b1300.dts    |  322 ----
+ .../arm/boot/dts/qcom-ipq4029-gl-s1300.dts    |  357 ----
+ .../boot/dts/qcom-ipq4029-insect-common.dtsi  |  444 -----
+ .../arch/arm/boot/dts/qcom-ipq4029-mr33.dts   |   13 -
+ .../arch/arm/boot/dts/qcom-ipq4029-mr74.dts   |   13 -
+ .../arm/boot/dts/qcom-ipq4029-ws-ap3915i.dts  |  262 ---
+ .../arch/arm/boot/dts/qcom-ipq40x9-dr40x9.dts |  422 -----
+ .../files/drivers/net/dsa/qca/qca8k-ipq4019.c | 1655 -----------------
+ .../files/drivers/net/dsa/qca/qca8k-ipq4019.h |  289 ---
+ .../net/ethernet/qualcomm/ipqess/Makefile     |    8 -
+ .../net/ethernet/qualcomm/ipqess/ipqess.c     | 1336 -------------
+ .../net/ethernet/qualcomm/ipqess/ipqess.h     |  530 ------
+ .../ethernet/qualcomm/ipqess/ipqess_ethtool.c |  175 --
+ .../ipq40xx/files/drivers/net/phy/qca807x.c   |  839 ---------
+ target/linux/ipq40xx/generic/target.mk        |    3 -
+ target/linux/ipq40xx/image/Makefile           |   19 -
+ target/linux/ipq40xx/image/chromium.mk        |   40 -
+ target/linux/ipq40xx/image/generic.mk         | 1209 ------------
+ target/linux/ipq40xx/image/mikrotik.mk        |  100 -
+ target/linux/ipq40xx/mikrotik/config-default  |    5 -
+ target/linux/ipq40xx/mikrotik/target.mk       |    4 -
+ .../104-clk-fix-apss-cpu-overclocking.patch   |  115 --
+ .../300-clk-qcom-ipq4019-add-ess-reset.patch  |   52 -
+ ...-compressed-add-appended-DTB-section.patch |   48 -
+ ...d-set-ipq40xx-watchdog-to-allow-boot.patch |   66 -
+ ...msm-use-sdhci_set_clock-instead-of-s.patch |   24 -
+ ...m-comment-unused-sdhci_msm_set_clock.patch |  108 --
+ .../420-firmware-qcom-scm-disable-SDI.patch   |   47 -
+ ...-firmware-qcom-scm-cold-boot-address.patch |  121 --
+ ...-add-support-for-Toshiba-TC58NVG0S3H.patch |   29 -
+ ...pecific-data-to-struct-skb_shared_in.patch |   43 -
+ ...019-add-shinfo-based-tagging-driver-.patch |  187 --
+ ...ethernet-qualcomm-add-IPQESS-support.patch |   43 -
+ ...4019-add-ethernet-controller-DT-node.patch |   81 -
+ ...phy-define-PSGMII-PHY-interface-mode.patch |   69 -
+ ...comm-IPQ4019-built-in-switch-support.patch |   56 -
+ .../706-arm-dts-ipq4019-add-switch-node.patch |   98 -
+ .../707-dt-bindings-net-add-QCA807x-PHY.patch |   61 -
+ ...8-net-phy-Add-Qualcom-QCA807x-driver.patch |   50 -
+ ...9-arm-dts-ipq4019-QCA807x-properties.patch |   61 -
+ .../850-soc-add-qualcomm-syscon.patch         |  180 --
+ .../900-dts-ipq4019-ap-dk01.1.patch           |  164 --
+ .../ipq40xx/patches-5.15/900-pstore.patch     |   17 -
+ .../902-dts-ipq4019-ap-dk04.1.patch           |  167 --
+ ...qcom_scm-Clear-download-bit-during-r.patch |   27 -
+ .../patches-5.15/998-lantiq-atm-hacks.patch   |   43 -
+ .../999-atm-mpoa-intel-dsl-phy-support.patch  |  137 --
+ 155 files changed, 34071 deletions(-)
+ delete mode 100644 target/linux/ipq40xx/Makefile
+ delete mode 100644 target/linux/ipq40xx/base-files/etc/board.d/01_leds
+ delete mode 100644 target/linux/ipq40xx/base-files/etc/board.d/02_network
+ delete mode 100644 target/linux/ipq40xx/base-files/etc/board.d/03_gpio_switches
+ delete mode 100644 target/linux/ipq40xx/base-files/etc/board.d/05_compat-version
+ delete mode 100644 target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
+ delete mode 100644 target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/40-ct-fw-cfg
+ delete mode 100755 target/linux/ipq40xx/base-files/etc/init.d/bootcount
+ delete mode 100644 target/linux/ipq40xx/base-files/etc/inittab
+ delete mode 100644 target/linux/ipq40xx/base-files/etc/uci-defaults/04_led_migration
+ delete mode 100644 target/linux/ipq40xx/base-files/etc/uci-defaults/05_fix-compat-version
+ delete mode 100644 target/linux/ipq40xx/base-files/lib/firmware/ath10k/fwcfg-ipq4019.txt
+ delete mode 100644 target/linux/ipq40xx/base-files/lib/firmware/ath10k/fwcfg-qca9888.txt
+ delete mode 100644 target/linux/ipq40xx/base-files/lib/firmware/ath10k/fwcfg-qca9984.txt
+ delete mode 100644 target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh
+ delete mode 100644 target/linux/ipq40xx/base-files/lib/upgrade/dualboot_datachk.sh
+ delete mode 100644 target/linux/ipq40xx/base-files/lib/upgrade/linksys.sh
+ delete mode 100644 target/linux/ipq40xx/base-files/lib/upgrade/netgear.sh
+ delete mode 100644 target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
+ delete mode 100644 target/linux/ipq40xx/base-files/lib/upgrade/sony.sh
+ delete mode 100644 target/linux/ipq40xx/chromium/config-default
+ delete mode 100644 target/linux/ipq40xx/chromium/target.mk
+ delete mode 100644 target/linux/ipq40xx/config-5.15
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-a42.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-cap-ac.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-cs-w3-wd1200g-eup.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-dap-2610.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ea6350v3.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-eap1300.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-emd1.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-emr3500.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ens620ext.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex6100v2.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex6150v2.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-fritzbox-4040.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-a1300.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-ap1300.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-hap-ac2.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-magic-2-wifi-next.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-meshpoint-one.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-mf287plus.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-nbg6617.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-pa1200.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx10.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-sxtsq-5-ac.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wac510.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac-lte.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dtsi
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-r-ac.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-whw01.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wr-1.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wre6606.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-a62.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-cm520-79f.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c1.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c2.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac.dtsi
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-ea8300.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-eap2200.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzbox-7530.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-1200.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-3000.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-habanero-dvk.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-hap-ac3-lte6-kit.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-hap-ac3.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-lhgg-60ad.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-map-ac2200.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mf18a.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mf286d.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mf289f.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mr8300.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-ncp-hg100-cellular.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-oap100.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-orbi.dtsi
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-pa2200.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac-128m.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac-64m.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rbr50.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rbs50.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rt-ac42u.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-srr60.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-srs60.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019-32m.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019.dtsi
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-whw03v2.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wifi.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wpj419.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wtr-m2133hp.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-x1pro.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-x1pro.dtsi
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303h.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-365.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-aruba-glenmorangie.dtsi
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-insect-common.dtsi
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-mr33.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-mr74.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ws-ap3915i.dts
+ delete mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq40x9-dr40x9.dts
+ delete mode 100644 target/linux/ipq40xx/files/drivers/net/dsa/qca/qca8k-ipq4019.c
+ delete mode 100644 target/linux/ipq40xx/files/drivers/net/dsa/qca/qca8k-ipq4019.h
+ delete mode 100644 target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/Makefile
+ delete mode 100644 target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess.c
+ delete mode 100644 target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess.h
+ delete mode 100644 target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess_ethtool.c
+ delete mode 100644 target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
+ delete mode 100644 target/linux/ipq40xx/generic/target.mk
+ delete mode 100644 target/linux/ipq40xx/image/Makefile
+ delete mode 100644 target/linux/ipq40xx/image/chromium.mk
+ delete mode 100644 target/linux/ipq40xx/image/generic.mk
+ delete mode 100644 target/linux/ipq40xx/image/mikrotik.mk
+ delete mode 100644 target/linux/ipq40xx/mikrotik/config-default
+ delete mode 100644 target/linux/ipq40xx/mikrotik/target.mk
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/104-clk-fix-apss-cpu-overclocking.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/300-clk-qcom-ipq4019-add-ess-reset.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/301-arm-compressed-add-appended-DTB-section.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/302-arm-compressed-set-ipq40xx-watchdog-to-allow-boot.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/420-firmware-qcom-scm-disable-SDI.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/421-firmware-qcom-scm-cold-boot-address.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/444-mtd-nand-rawnand-add-support-for-Toshiba-TC58NVG0S3H.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/700-skbuff-add-DSA-specific-data-to-struct-skb_shared_in.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/701-net-dsa-tag_ipq4019-add-shinfo-based-tagging-driver-.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/702-net-ethernet-qualcomm-add-IPQESS-support.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/703-arm-dts-ipq4019-add-ethernet-controller-DT-node.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/704-net-phy-define-PSGMII-PHY-interface-mode.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/705-net-dsa-add-Qualcomm-IPQ4019-built-in-switch-support.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/706-arm-dts-ipq4019-add-switch-node.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/707-dt-bindings-net-add-QCA807x-PHY.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/708-net-phy-Add-Qualcom-QCA807x-driver.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/709-arm-dts-ipq4019-QCA807x-properties.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/850-soc-add-qualcomm-syscon.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/900-dts-ipq4019-ap-dk01.1.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/900-pstore.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/902-dts-ipq4019-ap-dk04.1.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/998-lantiq-atm-hacks.patch
+ delete mode 100644 target/linux/ipq40xx/patches-5.15/999-atm-mpoa-intel-dsl-phy-support.patch
+
+diff --git a/target/linux/ipq40xx/Makefile b/target/linux/ipq40xx/Makefile
+deleted file mode 100644
+index 53b2f909ae..0000000000
+--- a/target/linux/ipq40xx/Makefile
++++ /dev/null
+@@ -1,23 +0,0 @@
+-include $(TOPDIR)/rules.mk
+-
+-ARCH:=arm
+-BOARD:=ipq40xx
+-BOARDNAME:=Qualcomm Atheros IPQ40XX
+-FEATURES:=squashfs fpu ramdisk nand
+-CPU_TYPE:=cortex-a7
+-CPU_SUBTYPE:=neon-vfpv4
+-SUBTARGETS:=generic chromium mikrotik
+-
+-KERNEL_PATCHVER:=5.15
+-
+-KERNELNAME:=zImage Image dtbs
+-
+-include $(INCLUDE_DIR)/target.mk
+-DEFAULT_PACKAGES += \
+-	kmod-usb-dwc3-qcom \
+-	kmod-leds-gpio kmod-gpio-button-hotplug \
+-	kmod-ath10k-ct wpad-basic-mbedtls \
+-	kmod-usb3 kmod-usb-dwc3 ath10k-firmware-qca4019-ct \
+-	uboot-envtools
+-
+-$(eval $(call BuildTarget))
+diff --git a/target/linux/ipq40xx/base-files/etc/board.d/01_leds b/target/linux/ipq40xx/base-files/etc/board.d/01_leds
+deleted file mode 100644
+index 1ba5d2b1a7..0000000000
+--- a/target/linux/ipq40xx/base-files/etc/board.d/01_leds
++++ /dev/null
+@@ -1,123 +0,0 @@
+-#
+-# Copyright (C) 2015 OpenWrt.org
+-#
+-
+-. /lib/functions/uci-defaults.sh
+-
+-board_config_update
+-
+-board=$(board_name)
+-
+-case "$board" in
+-alfa-network,ap120c-ac)
+-	ucidef_set_led_netdev "wan" "WAN" "amber:wan" "wan"
+-	;;
+-asus,rt-ac42u)
+-	ucidef_set_led_netdev "lan1" "LAN1" "blue:lan-1" "lan1"
+-	ucidef_set_led_netdev "lan2" "LAN2" "blue:lan-2" "lan2"
+-	ucidef_set_led_netdev "lan3" "LAN3" "blue:lan-3" "lan3"
+-	ucidef_set_led_netdev "lan4" "LAN4" "blue:lan-4" "lan4"
+-	ucidef_set_led_netdev "wan" "WAN" "blue:wan" "wan"
+-	;;
+-asus,rt-ac58u)
+-	ucidef_set_led_netdev "wan" "WAN" "blue:wan" "eth1"
+-	ucidef_set_led_switch "lan" "LAN" "blue:lan" "switch0" "0x1e"
+-	;;
+-avm,fritzbox-4040)
+-	ucidef_set_led_wlan "wlan" "WLAN" "green:wlan" "phy0tpt" "phy1tpt"
+-	ucidef_set_led_netdev "wan" "WAN" "green:wan" "wan"
+-	ucidef_set_led_switch "lan" "LAN" "green:lan" "switch0" "0x1e"
+-	;;
+-avm,fritzbox-7530)
+-	ucidef_set_led_netdev "dsl" "DSL" "green:info" "dsl0"
+-	ucidef_set_led_wlan "wlan" "WLAN" "green:wlan" "phy0tpt"
+-	;;
+-edgecore,oap100)
+-	ucidef_set_led_wlan "wlan2g" "WLAN2G" "blue:wlan2g" "phy0tpt"
+-	ucidef_set_led_wlan "wlan5g" "WLAN5G" "blue:wlan5g" "phy1tpt"
+-	;;
+-engenius,eap1300)
+-	ucidef_set_led_netdev "lan" "LAN" "blue:lan" "eth0"
+-	ucidef_set_led_wlan "wlan2g" "WLAN2G" "blue:wlan2g" "phy0tpt"
+-	ucidef_set_led_wlan "wlan5g" "WLAN5G" "yellow:wlan5g" "phy1tpt"
+-	ucidef_set_led_default "mesh" "MESH" "blue:mesh" "0"
+-	;;
+-engenius,eap2200)
+-	ucidef_set_led_netdev "lan1" "LAN1" "blue:lan1" "eth0"
+-	ucidef_set_led_netdev "lan2" "LAN2" "blue:lan2" "eth1"
+-	;;
+-engenius,ens620ext)
+-	ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wlan2g" "phy0tpt"
+-	ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wlan5g" "phy1tpt"
+-	ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "eth0"
+-	ucidef_set_led_netdev "lan2" "LAN2" "green:lan2" "eth1"
+-	;;
+-glinet,gl-ap1300)
+-	ucidef_set_led_netdev "wan" "WAN" "white:wan" "wan"
+-	;;
+-glinet,gl-b1300 |\
+-mikrotik,lhgg-60ad)
+-	ucidef_set_led_wlan "wlan" "WLAN" "green:wlan" "phy0tpt"
+-	;;
+-mikrotik,cap-ac)
+-	ucidef_set_led_default "power" "POWER" "blue:power" "1"
+-	ucidef_set_led_default "user" "USER" "green:user" "0"
+-	ucidef_set_led_netdev "eth1" "ETH1" "green:eth1" "wan"
+-	ucidef_set_led_netdev "eth2" "ETH2" "green:eth2" "lan"
+-	ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wlan2g" "phy0tpt"
+-	ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wlan5g" "phy1tpt"
+-	;;
+-mikrotik,hap-ac3)
+-	ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth0"
+-	ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "lan1"
+-	ucidef_set_led_netdev "lan2" "LAN2" "green:lan2" "lan2"
+-	ucidef_set_led_netdev "lan3" "LAN3" "green:lan3" "lan3"
+-	ucidef_set_led_netdev "lan4" "LAN4" "green:lan4" "lan4"
+-	ucidef_set_led_gpio "poe" "POE" "red:poe" "452" "0"
+-	;;
+-mikrotik,hap-ac3-lte6-kit)
+-        ucidef_set_led_netdev "wan" "WAN" "green:wan" "wan"
+-        ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "lan1"
+-        ucidef_set_led_netdev "lan2" "LAN2" "green:lan2" "lan2"
+-        ucidef_set_led_netdev "lan3" "LAN3" "green:lan3" "lan3"
+-        ucidef_set_led_netdev "lan4" "LAN4" "green:lan4" "lan4"
+-        ;;
+-
+-mikrotik,sxtsq-5-ac)
+-	ucidef_set_rssimon "wlan0" "200000" "1"
+-	ucidef_set_led_rssi "rssilow" "rssilow" "green:rssilow" "wlan0" "1" "100"
+-	ucidef_set_led_rssi "rssimediumlow" "rssimediumlow" "green:rssimediumlow" "wlan0" "21" "100"
+-	ucidef_set_led_rssi "rssimedium" "rssimedium" "green:rssimedium" "wlan0" "41" "100"
+-	ucidef_set_led_rssi "rssimediumhigh" "rssimediumhigh" "green:rssimediumhigh" "wlan0" "61" "100"
+-	ucidef_set_led_rssi "rssihigh" "rssihigh" "green:rssihigh" "wlan0" "81" "100"
+-	;;
+-mobipromo,cm520-79f)
+-	ucidef_set_led_netdev "wan" "WAN" "blue:wan" "wan"
+-	ucidef_set_led_netdev "lan1" "LAN1" "blue:lan1" "lan1"
+-	ucidef_set_led_netdev "lan2" "LAN2" "blue:lan2" "lan2"
+-	;;
+-netgear,ex6100v2 |\
+-netgear,ex6150v2)
+-	ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:router" "phy0tpt"
+-	ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:client" "phy1tpt"
+-	;;
+-qxwlan,e2600ac-c1 |\
+-qxwlan,e2600ac-c2)
+-	ucidef_set_led_wlan "wlan2g" "WLAN0" "green:wlan0" "phy0tpt"
+-	ucidef_set_led_wlan "wlan5g" "WLAN1" "green:wlan1" "phy1tpt"
+-	;;
+-sony,ncp-hg100-cellular)
+-	ucidef_set_led_netdev "lan" "LAN" "green:lan" "lan"
+-	ucidef_set_led_netdev "wan" "WAN" "green:wan" "wan"
+-	ucidef_set_led_netdev "wwan" "WWAN" "green:wan-4" "wwan0"
+-	;;
+-zyxel,nbg6617 |\
+-zyxel,wre6606)
+-	ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wlan2g" "phy0tpt"
+-	ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wlan5g" "phy1tpt"
+-	;;
+-esac
+-
+-board_config_flush
+-
+-exit 0
+diff --git a/target/linux/ipq40xx/base-files/etc/board.d/02_network b/target/linux/ipq40xx/base-files/etc/board.d/02_network
+deleted file mode 100644
+index 1a74fb792c..0000000000
+--- a/target/linux/ipq40xx/base-files/etc/board.d/02_network
++++ /dev/null
+@@ -1,235 +0,0 @@
+-#
+-# Copyright (c) 2015 The Linux Foundation. All rights reserved.
+-# Copyright (c) 2011-2015 OpenWrt.org
+-#
+-
+-. /lib/functions/uci-defaults.sh
+-. /lib/functions/system.sh
+-
+-ipq40xx_setup_interfaces()
+-{
+-	local board="$1"
+-
+-	case "$board" in
+-	8dev,habanero-dvk|\
+-	avm,fritzbox-4040|\
+-	asus,rt-ac42u|\
+-	asus,rt-ac58u|\
+-	linksys,ea6350v3|\
+-	linksys,ea8300|\
+-	linksys,mr8300|\
+-	mikrotik,hap-ac2|\
+-	mikrotik,hap-ac3|\
+-	mikrotik,hap-ac3-lte6-kit|\
+-	p2w,r619ac-64m|\
+-	p2w,r619ac-128m|\
+-	pakedge,wr-1|\
+-	zyxel,nbg6617)
+-		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
+-		;;
+-	8dev,jalapeno|\
+-	alfa-network,ap120c-ac|\
+-	asus,map-ac2200|\
+-	cilab,meshpoint-one|\
+-	edgecore,ecw5211|\
+-	glinet,gl-ap1300|\
+-	glinet,gl-b2200|\
+-	google,wifi|\
+-	linksys,whw03v2|\
+-	luma,wrtq-329acn|\
+-	mikrotik,cap-ac|\
+-	netgear,wac510|\
+-	sony,ncp-hg100-cellular|\
+-	wallys,dr40x9|\
+-	zte,mf18a|\
+-	zte,mf289f)
+-		ucidef_set_interfaces_lan_wan "lan" "wan"
+-		;;
+-	aruba,ap-303|\
+-	aruba,ap-365|\
+-	avm,fritzrepeater-1200|\
+-	dlink,dap-2610|\
+-	extreme-networks,ws-ap3915i|\
+-	meraki,mr33|\
+-	meraki,mr74|\
+-	mikrotik,lhgg-60ad|\
+-	mikrotik,sxtsq-5-ac|\
+-	netgear,ex6100v2|\
+-	netgear,ex6150v2)
+-		ucidef_set_interface_lan "lan"
+-		;;
+-	avm,fritzbox-7530)
+-		ucidef_set_interface_lan "lan1 lan2 lan3 lan4"
+-		;;
+-	avm,fritzrepeater-3000|\
+-	cellc,rtl30vw)
+-		ucidef_set_interface_lan "lan1 lan2"
+-		;;
+-	compex,wpj428)
+-		ucidef_set_interface_lan "lan1 lan2"
+-		;;
+-	linksys,whw01)
+-		ucidef_set_interface_lan "eth1 eth2"
+-		;;
+-	glinet,gl-a1300|\
+-	glinet,gl-b1300|\
+-	mobipromo,cm520-79f)
+-		ucidef_set_interfaces_lan_wan "lan1 lan2" "wan"
+-		;;
+-	mikrotik,wap-ac|\
+-	mikrotik,wap-ac-lte|\
+-	mikrotik,wap-r-ac)
+-		ucidef_set_interface_lan "sw-eth1 sw-eth2"
+-		;;
+-	aruba,ap-303h|\
+-	buffalo,wtr-m2133hp|\
+-	ezviz,cs-w3-wd1200g-eup|\
+-	netgear,rbr50|\
+-	netgear,rbs50|\
+-	netgear,srr60|\
+-	netgear,srs60)
+-		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
+-		;;
+-	openmesh,a42|\
+-	openmesh,a62)
+-		ucidef_set_interfaces_lan_wan "ethernet2" "ethernet1"
+-		;;
+-	plasmacloud,pa1200|\
+-	plasmacloud,pa2200)
+-		ucidef_set_interfaces_lan_wan "ethernet1" "ethernet2"
+-		;;
+-	qxwlan,e2600ac-c1)
+-		ucidef_set_interfaces_lan_wan "sw-eth1" "sw-eth2"
+-		;;
+-	qxwlan,e2600ac-c2)
+-		ucidef_set_interfaces_lan_wan "sw-eth1 sw-eth2" "sw-eth3"
+-		;;
+-	zte,mf286d)
+-		ucidef_set_interfaces_lan_wan "lan2 lan3 lan4" "wan"
+-		;;
+-	zte,mf287plus)
+-		ucidef_set_interface_lan "lan1 lan2 lan3 lan4"
+-		ucidef_set_interface "wan" device "/dev/cdc-wdm0" protocol "qmi"
+-		;;
+-	*)
+-		echo "Unsupported hardware. Network interfaces not initialized"
+-		;;
+-	esac
+-}
+-
+-ipq40xx_setup_dsl()
+-{
+-	local board="$1"
+-	local annex="j"
+-	local tone="b"
+-	local xfer_mode=""
+-
+-	case "$board" in
+-	avm,fritzbox-7530)
+-		;;
+-	*)
+-		return 0
+-		;;
+-	esac
+-
+-	ucidef_add_atm_bridge "1" "32" "llc" "bridged" "dsl"
+-	ucidef_add_vdsl_modem "$annex" "$tone" "$xfer_mode"
+-	ucidef_set_interface_wan "dsl0" "pppoe"
+-}
+-
+-ipq40xx_setup_macs()
+-{
+-	local board="$1"
+-	local lan_mac=""
+-	local wan_mac=""
+-	local label_mac=""
+-
+-	case "$board" in
+-	8dev,habanero-dvk)
+-		label_mac=$(mtd_get_mac_binary "ART" 0x1006)
+-		;;
+-	asus,rt-ac42u)
+-		label_mac=$(mtd_get_mac_binary_ubi Factory 0x1006)
+-		;;
+-	asus,rt-ac58u)
+-		wan_mac=$(mtd_get_mac_binary_ubi Factory 0x1006)
+-		lan_mac=$(mtd_get_mac_binary_ubi Factory 0x5006)
+-		label_mac=$wan_mac
+-		;;
+-	avm,fritzbox-7530)
+-		local tffsdev=$(find_mtd_chardev "nand-tffs")
+-		wan_mac=$(/usr/bin/fritz_tffs_nand -b -d $tffsdev -n macdsl)
+-		;;
+-	cilab,meshpoint-one)
+-		label_mac=$(mtd_get_mac_binary "ART" 0x1006)
+-		;;
+-	devolo,magic-2-wifi-next)
+-		lan_mac=$(mtd_get_mac_ascii APPSBLENV MacAddress0)
+-		label_mac=$lan_mac
+-		;;
+-	dlink,dap-2610)
+-		lan_mac=$(mtd_get_mac_ascii bdcfg lanmac)
+-		label_mac=$lan_mac
+-		;;
+-	engenius,eap2200|\
+-	engenius,emd1)
+-		lan_mac=$(mtd_get_mac_ascii 0:APPSBLENV ethaddr)
+-		label_mac=$lan_mac
+-		;;
+-	engenius,emr3500)
+-		wan_mac=$(mtd_get_mac_ascii 0:APPSBLENV wanaddr)
+-		lan_mac=$(mtd_get_mac_ascii 0:APPSBLENV ethaddr)
+-		label_mac=$wan_mac
+-		;;
+-	engenius,ens620ext)
+-		wan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr)
+-		lan_mac=$(macaddr_add "$wan_mac" 1)
+-		;;
+-	ezviz,cs-w3-wd1200g-eup)
+-		label_mac=$(mtd_get_mac_binary "ART" 0x6)
+-		;;
+-	google,wifi)
+-		wan_mac=$(get_mac_label)
+-		lan_mac=$(macaddr_add "$wan_mac" 1)
+-		;;
+-	linksys,ea6350v3|\
+-	linksys,ea8300  |\
+-	linksys,mr8300)
+-		wan_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr)
+-		lan_mac=$(macaddr_add "$wan_mac" 1)
+-		;;
+-	mikrotik,cap-ac |\
+-	mikrotik,hap-ac2|\
+-	mikrotik,hap-ac3|\
+-	mikrotik,hap-ac3-lte6-kit)
+-		wan_mac=$(cat /sys/firmware/mikrotik/hard_config/mac_base)
+-		lan_mac=$(macaddr_add $wan_mac 1)
+-		label_mac="$wan_mac"
+-		;;
+-	mikrotik,lhgg-60ad|\
+-	mikrotik,sxtsq-5-ac)
+-		lan_mac=$(cat /sys/firmware/mikrotik/hard_config/mac_base)
+-		label_mac="$lan_mac"
+-		;;
+-	netgear,rbr50|\
+-	netgear,rbs50|\
+-	netgear,srr60|\
+-	netgear,srs60|\
+-	pakedge,wr-1)
+-		wan_mac=$(macaddr_add $(get_mac_label) 1)
+-		;;
+-	esac
+-
+-	[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
+-	[ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac
+-	[ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
+-}
+-
+-board_config_update
+-board=$(board_name)
+-ipq40xx_setup_interfaces $board
+-ipq40xx_setup_dsl $board
+-ipq40xx_setup_macs $board
+-board_config_flush
+-
+-exit 0
+diff --git a/target/linux/ipq40xx/base-files/etc/board.d/03_gpio_switches b/target/linux/ipq40xx/base-files/etc/board.d/03_gpio_switches
+deleted file mode 100644
+index f76fe9402d..0000000000
+--- a/target/linux/ipq40xx/base-files/etc/board.d/03_gpio_switches
++++ /dev/null
+@@ -1,46 +0,0 @@
+-
+-. /lib/functions/uci-defaults.sh
+-
+-board_config_update
+-
+-board=$(board_name)
+-
+-case "$board" in
+-cellc,rtl30vw)
+-	ucidef_add_gpio_switch "w_disable" "W_DISABLE mPCIE pin" "398" "1"
+-	ucidef_add_gpio_switch "pmd_resin_n" "PMD_RESIN_N pin" "399" "1"
+-	ucidef_add_gpio_switch "mcpie_vcc" "LTE power" "400" "0"
+-	ucidef_add_gpio_switch "usb_vcc" "USB power" "401" "0"
+-	;;
+-cilab,meshpoint-one)
+-	ucidef_add_gpio_switch "poe_passtrough" "POE passtrough enable" "413" "1"
+-	;;
+-compex,wpj428)
+-	ucidef_add_gpio_switch "sim_card_select" "SIM card select" "3" "0"
+-	;;
+-mikrotik,cap-ac)
+-	ucidef_add_gpio_switch "poe_passtrough" "POE passtrough enable" "414" "0"
+-	;;
+-mikrotik,hap-ac3)
+-	ucidef_add_gpio_switch "poe_passtrough" "PoE Passthrough" "452" "0"
+-	;;
+-mikrotik,hap-ac3-lte6-kit)
+-	ucidef_add_gpio_switch "lte_ant_sw1" "LTE Antenna SW 1" "457" "0"
+-	ucidef_add_gpio_switch "lte_ant_sw2" "LTE Antenna SW 2" "458" "0"
+-	ucidef_add_gpio_switch "lte_reset" "LTE reset" "461" "0"
+-	;;
+-sony,ncp-hg100-cellular)
+-	ucidef_add_gpio_switch "uart_dbgcon_en" "debug console enable" "427" "1"
+-	;;
+-wallys,dr40x9)
+-	ucidef_add_gpio_switch "sim_card_select" "SIM card select" "423" "0"
+-	;;
+-zte,mf286d|\
+-zte,mf289f)
+-	ucidef_add_gpio_switch "power_btn_block" "Power button blocker" "421" "0"
+-	;;
+-esac
+-
+-board_config_flush
+-
+-exit 0
+diff --git a/target/linux/ipq40xx/base-files/etc/board.d/05_compat-version b/target/linux/ipq40xx/base-files/etc/board.d/05_compat-version
+deleted file mode 100644
+index 70272f99ed..0000000000
+--- a/target/linux/ipq40xx/base-files/etc/board.d/05_compat-version
++++ /dev/null
+@@ -1,18 +0,0 @@
+-#
+-# Copyright (C) 2022 OpenWrt.org
+-#
+-
+-. /lib/functions.sh
+-. /lib/functions/uci-defaults.sh
+-
+-board_config_update
+-
+-case "$(board_name)" in
+-	*)
+-		ucidef_set_compat_version "1.1"
+-		;;
+-esac
+-
+-board_config_flush
+-
+-exit 0
+diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
+deleted file mode 100644
+index 7f41bdcfcc..0000000000
+--- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
++++ /dev/null
+@@ -1,278 +0,0 @@
+-#!/bin/sh
+-
+-[ -e /lib/firmware/$FIRMWARE ] && exit 0
+-
+-. /lib/functions/caldata.sh
+-
+-board=$(board_name)
+-
+-case "$FIRMWARE" in
+-"ath10k/cal-pci-0000:01:00.0.bin")
+-	case "$board" in
+-	meraki,mr33 |\
+-	meraki,mr74)
+-		caldata_extract_ubi "ART" 0x9000 0x844
+-		caldata_valid "4408" || caldata_extract "ART" 0x9000 0x844
+-		;;
+-	esac
+-	;;
+-"ath10k/pre-cal-pci-0000:01:00.0.bin")
+-	case "$board" in
+-	asus,map-ac2200)
+-		caldata_extract_ubi "Factory" 0x9000 0x2f20
+-		ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
+-			/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
+-		;;
+-	asus,rt-ac42u)
+-		caldata_extract_ubi "Factory" 0x9000 0x2f20
+-		;;
+-	avm,fritzrepeater-3000)
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3D000 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3C000 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3D000 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") || \
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") || \
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3C000 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1")
+-		;;
+-	linksys,ea8300 |\
+-	linksys,mr8300)
+-		caldata_extract "ART" 0x9000 0x2f20
+-		# OEM assigns 4 sequential MACs
+-		ath10k_patch_mac $(macaddr_setbit_la $(macaddr_add "$(cat /sys/class/net/eth0/address)" 4))
+-		;;
+-	netgear,rbr50|\
+-	netgear,rbs50|\
+-	netgear,srr60|\
+-	netgear,srs60)
+-		caldata_extract_mmc "0:ART" 0x9000 0x2f20
+-		ath10k_patch_mac $(mmc_get_mac_binary ARTMTD 0x12)
+-		;;
+-	esac
+-	;;
+-"ath10k/pre-cal-ahb-a000000.wifi.bin")
+-	case "$board" in
+-	qcom,ap-dk01.1-c1)
+-		caldata_extract "ART" 0x1000 0x2f20
+-		;;
+-	asus,map-ac2200|\
+-	asus,rt-ac42u|\
+-	asus,rt-ac58u)
+-		caldata_extract_ubi "Factory" 0x1000 0x2f20
+-		;;
+-	avm,fritzbox-4040)
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x400 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader_config")
+-		;;
+-	avm,fritzbox-7530 |\
+-	avm,fritzrepeater-1200 |\
+-	avm,fritzrepeater-3000)
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3C000 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3D000 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3C000 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") || \
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") || \
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3D000 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1")
+-		;;
+-	cellc,rtl30vw)
+-		caldata_extract "0:ART" 0x1000 0x2f20
+-		;;
+-	devolo,magic-2-wifi-next)
+-		caldata_extract "ART" 0x1000 0x2f20
+-		ath10k_patch_mac $(mtd_get_mac_ascii APPSBLENV WiFiMacAddress0)
+-		;;
+-	dlink,dap-2610)
+-		caldata_extract "ART" 0x1000 0x2f20
+-		ath10k_patch_mac $(mtd_get_mac_ascii bdcfg wlanmac)
+-		;;
+-	engenius,emd1)
+-		caldata_extract "0:ART" 0x1000 0x2f20
+-		ath10k_patch_mac $(mtd_get_mac_ascii 0:APPSBLENV wlanaddr)
+-		;;
+-	engenius,emr3500)
+-		caldata_extract "0:ART" 0x1000 0x2f20
+-		ath10k_patch_mac $(mtd_get_mac_ascii 0:APPSBLENV ethaddr)
+-		;;
+-	engenius,ens620ext)
+-		caldata_extract "ART" 0x1000 0x2f20
+-		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) 2)
+-		;;
+-	extreme-networks,ws-ap3915i)
+-		caldata_extract "ART" 0x1000 0x2f20
+-		ath10k_patch_mac $(mtd_get_mac_ascii CFG1 RADIOADDR0)
+-		;;
+-	linksys,ea8300 |\
+-	linksys,mr8300)
+-		caldata_extract "ART" 0x1000 0x2f20
+-		ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 2)
+-		;;
+-	meraki,mr33 |\
+-	meraki,mr74)
+-		caldata_extract_ubi "ART" 0x1000 0x2f20
+-		caldata_valid "202f" || caldata_extract "ART" 0x1000 0x2f20
+-		;;
+-	mikrotik,cap-ac |\
+-	mikrotik,hap-ac2 |\
+-	mikrotik,hap-ac3 |\
+-	mikrotik,hap-ac3-lte6-kit |\
+-	mikrotik,wap-ac |\
+-	mikrotik,wap-ac-lte |\
+-	mikrotik,wap-r-ac)
+-		wlan_data="/sys/firmware/mikrotik/hard_config/wlan_data"
+-		( [ -f "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data" 0x0 0x2f20 ) || \
+-		( [ -d "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data/data_0" 0x0 0x2f20 )
+-		;;
+-	netgear,rbr50|\
+-	netgear,rbs50|\
+-	netgear,srr60|\
+-	netgear,srs60)
+-		caldata_extract_mmc "0:ART" 0x1000 0x2f20
+-		ath10k_patch_mac $(mmc_get_mac_binary ARTMTD 0x0)
+-		;;
+-	pakedge,wr-1)
+-		caldata_extract "0:ART" 0x1000 0x2f20
+-		ath10k_patch_mac $(macaddr_add $(get_mac_label) 2)
+-		;;
+-	teltonika,rutx10)
+-		caldata_extract "0:ART" 0x1000 0x2f20
+-		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary "0:CONFIG" 0x0) 2)
+-		;;
+-	sony,ncp-hg100-cellular)
+-		caldata_extract_mmc "0:ART" 0x1000 0x2f20
+-		;;
+-	zyxel,nbg6617 |\
+-	zyxel,wre6606)
+-		caldata_extract "ART" 0x1000 0x2f20
+-		ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -2)
+-		;;
+-	esac
+-	;;
+-"ath10k/pre-cal-ahb-a800000.wifi.bin")
+-	case "$board" in
+-	qcom,ap-dk01.1-c1)
+-		caldata_extract "ART" 0x5000 0x2f20
+-		;;
+-	asus,map-ac2200|\
+-	asus,rt-ac58u)
+-		caldata_extract_ubi "Factory" 0x5000 0x2f20
+-		;;
+-	avm,fritzbox-4040)
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x400 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader_config")
+-		;;
+-	avm,fritzbox-7530 |\
+-	avm,fritzrepeater-1200 |\
+-	avm,fritzrepeater-3000)
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3D000 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3C000 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") || \
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3D000 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") || \
+-		/usr/bin/fritz_cal_extract -i 1 -s 0x3C000 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1")
+-		;;
+-	cellc,rtl30vw)
+-		caldata_extract "0:ART" 0x5000 0x2f20
+-		;;
+-	devolo,magic-2-wifi-next)
+-		caldata_extract "ART" 0x5000 0x2f20
+-		ath10k_patch_mac $(mtd_get_mac_ascii APPSBLENV WiFiMacAddress1)
+-		;;
+-	dlink,dap-2610)
+-		caldata_extract "ART" 0x5000 0x2f20
+-		ath10k_patch_mac $(mtd_get_mac_ascii bdcfg wlanmac_a)
+-		;;
+-	engenius,emd1)
+-		caldata_extract "0:ART" 0x5000 0x2f20
+-		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii 0:APPSBLENV wlanaddr) 1)
+-		;;
+-	engenius,emr3500)
+-		caldata_extract "0:ART" 0x5000 0x2f20
+-		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii 0:APPSBLENV ethaddr) 1)
+-		;;
+-	engenius,ens620ext)
+-		caldata_extract "ART" 0x5000 0x2f20
+-		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) 3)
+-		;;
+-	extreme-networks,ws-ap3915i)
+-		caldata_extract "ART" 0x5000 0x2f20
+-		ath10k_patch_mac $(mtd_get_mac_ascii CFG1 RADIOADDR1)
+-		;;
+-	linksys,ea8300 |\
+-	linksys,mr8300)
+-		caldata_extract "ART" 0x5000 0x2f20
+-		ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 3)
+-		;;
+-	meraki,mr33 |\
+-	meraki,mr74)
+-		caldata_extract_ubi "ART" 0x5000 0x2f20
+-		caldata_valid "202f" || caldata_extract "ART" 0x5000 0x2f20
+-		;;
+-	mikrotik,cap-ac |\
+-	mikrotik,hap-ac2 |\
+-	mikrotik,hap-ac3 |\
+-	mikrotik,hap-ac3-lte6-kit |\
+-	mikrotik,sxtsq-5-ac |\
+-	mikrotik,wap-ac |\
+-	mikrotik,wap-ac-lte |\
+-	mikrotik,wap-r-ac)
+-		wlan_data="/sys/firmware/mikrotik/hard_config/wlan_data"
+-		( [ -f "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data" 0x8000 0x2f20 ) || \
+-		( [ -d "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data/data_2" 0x0 0x2f20 )
+-		;;
+-	netgear,rbr50|\
+-	netgear,rbs50|\
+-	netgear,srr60|\
+-	netgear,srs60)
+-		caldata_extract_mmc "0:ART" 0x5000 0x2f20
+-		ath10k_patch_mac $(mmc_get_mac_binary ARTMTD 0xc)
+-		;;
+-	pakedge,wr-1)
+-		caldata_extract "0:ART" 0x5000 0x2f20
+-		ath10k_patch_mac $(macaddr_add $(get_mac_label) 4)
+-		;;
+-	teltonika,rutx10)
+-		caldata_extract "0:ART" 0x5000 0x2f20
+-		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary "0:CONFIG" 0x0) 3)
+-		;;
+-	sony,ncp-hg100-cellular)
+-		caldata_extract_mmc "0:ART" 0x5000 0x2f20
+-		;;
+-	zyxel,nbg6617 |\
+-	zyxel,wre6606)
+-		caldata_extract "ART" 0x5000 0x2f20
+-		ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -1)
+-		;;
+-	esac
+-	;;
+-"ath10k/QCA4019/hw1.0/board-ahb-a000000.wifi.bin")
+-	case "$board" in
+-	mikrotik,cap-ac |\
+-	mikrotik,hap-ac2 |\
+-	mikrotik,hap-ac3 |\
+-	mikrotik,hap-ac3-lte6-kit |\
+-	mikrotik,wap-ac |\
+-	mikrotik,wap-ac-lte |\
+-	mikrotik,wap-r-ac)
+-		wlan_data="/sys/firmware/mikrotik/hard_config/wlan_data"
+-		( [ -f "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data" 0x2f20 0x2f20 ) || \
+-		( [ -d "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data/data_0" 0x2f20 0x2f20 )
+-		;;
+-	esac
+-	;;
+-"ath10k/QCA4019/hw1.0/board-ahb-a800000.wifi.bin")
+-	case "$board" in
+-	mikrotik,cap-ac |\
+-	mikrotik,hap-ac2 |\
+-	mikrotik,hap-ac3 |\
+-        mikrotik,hap-ac3-lte6-kit |\
+-	mikrotik,sxtsq-5-ac |\
+-	mikrotik,wap-ac |\
+-	mikrotik,wap-ac-lte |\
+-	mikrotik,wap-r-ac)
+-		wlan_data="/sys/firmware/mikrotik/hard_config/wlan_data"
+-		( [ -f "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data" 0xaf20 0x2f20 ) || \
+-		( [ -d "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data/data_2" 0x2f20 0x2f20 )
+-		;;
+-	esac
+-	;;
+-*)
+-	exit 1
+-	;;
+-esac
+diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/40-ct-fw-cfg b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/40-ct-fw-cfg
+deleted file mode 100644
+index 7e22cbd4f5..0000000000
+--- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/40-ct-fw-cfg
++++ /dev/null
+@@ -1,32 +0,0 @@
+-#!/bin/sh
+-
+-[ -e /lib/firmware/$FIRMWARE ] && exit 0
+-
+-
+-fwcfg_symlink() {
+-	local chip=$1
+-	local path=$2
+-
+-	ln -s /lib/firmware/ath10k/fwcfg-${chip}.txt /lib/firmware/${FIRMWARE}
+-}
+-
+-case "$FIRMWARE" in                                                         
+-ath10k/fwcfg-ahb-a000000.wifi.txt|\
+-ath10k/fwcfg-ahb-a800000.wifi.txt)
+-	fwcfg_symlink ipq4019
+-	
+-	;;
+-ath10k/fwcfg-pci-0000:01:00.0.txt)
+-        case "$(board_name)" in
+-        linksys,ea8300)
+-                fwcfg_symlink qca9888
+-                ;;
+-	tp-link,ap2220|\
+-	tp-link,ec420-g1)
+-		fwcfg_symlink qca9984
+-		;;
+-	esac
+-	;;
+-esac
+-
+-exit 0
+diff --git a/target/linux/ipq40xx/base-files/etc/init.d/bootcount b/target/linux/ipq40xx/base-files/etc/init.d/bootcount
+deleted file mode 100755
+index f6921089bd..0000000000
+--- a/target/linux/ipq40xx/base-files/etc/init.d/bootcount
++++ /dev/null
+@@ -1,33 +0,0 @@
+-#!/bin/sh /etc/rc.common
+-
+-START=99
+-
+-boot() {
+-	case $(board_name) in
+-	alfa-network,ap120c-ac)
+-		[ -n "$(fw_printenv bootcount changed 2>/dev/null)" ] &&\
+-			echo -e "bootcount\nchanged\n" | /usr/sbin/fw_setenv -s -
+-		;;
+-	edgecore,ecw5211)
+-		part="$(awk -F 'ubi.mtd=' '{printf $2}' /proc/cmdline | cut -d " " -f1)"
+-		case "$part" in
+-		rootfs1|\
+-		rootfs2)
+-			avail=$(fw_printenv -n upgrade_available)
+-			[ ${avail} -ne 1 ] && fw_setenv upgrade_available 1
+-			fw_setenv bootcount 0
+-			;;
+-		esac
+-		;;
+-	linksys,ea6350v3|\
+-	linksys,ea8300|\
+-	linksys,mr8300|\
+-	linksys,whw01|\
+-	linksys,whw03v2)
+-		mtd resetbc s_env || true
+-		;;
+-	netgear,wac510)
+-		fw_setenv boot_cnt=0
+-		;;
+-	esac
+-}
+diff --git a/target/linux/ipq40xx/base-files/etc/inittab b/target/linux/ipq40xx/base-files/etc/inittab
+deleted file mode 100644
+index 3181021a05..0000000000
+--- a/target/linux/ipq40xx/base-files/etc/inittab
++++ /dev/null
+@@ -1,5 +0,0 @@
+-# Copyright (c) 2013 The Linux Foundation. All rights reserved.
+-::sysinit:/etc/init.d/rcS S boot
+-::shutdown:/etc/init.d/rcS K shutdown
+-ttyMSM0::askfirst:/usr/libexec/login.sh
+-ttyMSM1::askfirst:/usr/libexec/login.sh
+diff --git a/target/linux/ipq40xx/base-files/etc/uci-defaults/04_led_migration b/target/linux/ipq40xx/base-files/etc/uci-defaults/04_led_migration
+deleted file mode 100644
+index e8818a41ed..0000000000
+--- a/target/linux/ipq40xx/base-files/etc/uci-defaults/04_led_migration
++++ /dev/null
+@@ -1,25 +0,0 @@
+-. /lib/functions/migrations.sh
+-
+-board=$(board_name)
+-
+-case "$board" in
+-asus,map-ac2200)
+-	migrate_leds ':chan=-'
+-	;;
+-engenius,emr3500)
+-	migrate_leds "emr3500:="
+-	;;
+-engenius,ens620ext|\
+-zyxel,nbg6617)
+-	migrate_leds ":wlan2G=:wlan2g" ":wlan5G=:wlan5g"
+-	;;
+-netgear,wac510)
+-	migrate_leds ":wlan2g=:wlan-0" ":wlan5g=:wlan-1" ":act=:activity"
+-	;;
+-esac
+-
+-remove_devicename_leds
+-
+-migrations_apply system
+-
+-exit 0
+diff --git a/target/linux/ipq40xx/base-files/etc/uci-defaults/05_fix-compat-version b/target/linux/ipq40xx/base-files/etc/uci-defaults/05_fix-compat-version
+deleted file mode 100644
+index c011920897..0000000000
+--- a/target/linux/ipq40xx/base-files/etc/uci-defaults/05_fix-compat-version
++++ /dev/null
+@@ -1,13 +0,0 @@
+-. /lib/functions.sh
+-
+-case "$(board_name)" in
+-linksys,ea6350v3|\
+-linksys,ea8300|\
+-linksys,mr8300|\
+-ezviz,cs-w3-wd1200g-eup)
+-	uci set system.@system[0].compat_version="2.0"
+-	uci commit system
+-	;;
+-esac
+-
+-exit 0
+diff --git a/target/linux/ipq40xx/base-files/lib/firmware/ath10k/fwcfg-ipq4019.txt b/target/linux/ipq40xx/base-files/lib/firmware/ath10k/fwcfg-ipq4019.txt
+deleted file mode 100644
+index 7943173e51..0000000000
+--- a/target/linux/ipq40xx/base-files/lib/firmware/ath10k/fwcfg-ipq4019.txt
++++ /dev/null
+@@ -1,15 +0,0 @@
+-vdevs = 8
+-peers = 147
+-active_peers = 147
+-stations = 147
+-rate_ctrl_objs = 7
+-#regdom = 840
+-#fwname = firmware-5-htt-mgt-b.bin
+-#fwver = 5
+-nohwcrypt = 0
+-ct_sta_mode = 0
+-tx_desc = 2000
+-#max_nss = 3
+-tids = 450
+-skid_limit = 360
+-max_amsdus = 3 
+diff --git a/target/linux/ipq40xx/base-files/lib/firmware/ath10k/fwcfg-qca9888.txt b/target/linux/ipq40xx/base-files/lib/firmware/ath10k/fwcfg-qca9888.txt
+deleted file mode 100644
+index 560c8103d7..0000000000
+--- a/target/linux/ipq40xx/base-files/lib/firmware/ath10k/fwcfg-qca9888.txt
++++ /dev/null
+@@ -1,16 +0,0 @@
+-# 9888 chip
+-vdevs = 8
+-peers = 202
+-active_peers = 202
+-stations = 202
+-rate_ctrl_objs = 7
+-#regdom = 840
+-#fwname = firmware-5-htt-mgt-b.bin
+-#fwver = 5
+-nohwcrypt = 0
+-ct_sta_mode = 0
+-tx_desc = 2200
+-#max_nss = 3
+-tids = 450
+-skid_limit = 360
+-max_amsdus = 3 
+diff --git a/target/linux/ipq40xx/base-files/lib/firmware/ath10k/fwcfg-qca9984.txt b/target/linux/ipq40xx/base-files/lib/firmware/ath10k/fwcfg-qca9984.txt
+deleted file mode 100644
+index 924a689000..0000000000
+--- a/target/linux/ipq40xx/base-files/lib/firmware/ath10k/fwcfg-qca9984.txt
++++ /dev/null
+@@ -1,16 +0,0 @@
+-# 9984
+-vdevs = 8
+-peers = 180
+-active_peers = 180
+-stations = 180
+-rate_ctrl_objs = 7
+-#regdom = 840
+-#fwname = firmware-5-htt-mgt-b.bin
+-#fwver = 5
+-nohwcrypt = 0
+-ct_sta_mode = 0
+-tx_desc = 2400
+-#max_nss = 3
+-tids = 450
+-skid_limit = 360
+-max_amsdus = 3 
+diff --git a/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh b/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh
+deleted file mode 100644
+index ce0b55bb80..0000000000
+--- a/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh
++++ /dev/null
+@@ -1,47 +0,0 @@
+-. /lib/functions.sh
+-
+-preinit_set_mac_address() {
+-	case $(board_name) in
+-	asus,map-ac2200)
+-		base_mac=$(mtd_get_mac_binary_ubi Factory 0x1006)
+-		ip link set dev eth0 address $(macaddr_add "$base_mac" 1)
+-		ip link set dev eth1 address $(macaddr_add "$base_mac" 3)
+-		;;
+-	asus,rt-ac42u)
+-		base_mac=$(mtd_get_mac_binary_ubi Factory 0x1006)
+-		ip link set dev eth0 address $base_mac
+-		ip link set dev lan1 address $base_mac
+-		ip link set dev lan2 address $base_mac
+-		ip link set dev lan3 address $base_mac
+-		ip link set dev lan4 address $base_mac
+-		ip link set dev wan address $(mtd_get_mac_binary_ubi Factory 0x9006)
+-		;;
+-	engenius,eap2200)
+-		base_mac=$(cat /sys/class/net/eth0/address)
+-		ip link set dev eth1 address $(macaddr_add "$base_mac" 1)
+-		;;
+-	extreme-networks,ws-ap3915i)
+-		ip link set dev eth0 address $(mtd_get_mac_ascii CFG1 ethaddr)
+-		;;
+-	linksys,ea8300|\
+-	linksys,mr8300)
+-		base_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr)
+-		ip link set dev lan1 address $(macaddr_add "$base_mac" 1)
+-		ip link set dev eth0 address $(macaddr_setbit "$base_mac" 7)
+-		;;
+-	mikrotik,wap-ac|\
+-	mikrotik,wap-ac-lte|\
+-	mikrotik,wap-r-ac)
+-		base_mac=$(cat /sys/firmware/mikrotik/hard_config/mac_base)
+-		ip link set dev sw-eth1 address "$base_mac"
+-		ip link set dev sw-eth2 address $(macaddr_add "$base_mac" 1)
+-		;;
+-	zyxel,nbg6617)
+-		base_mac=$(cat /sys/class/net/eth0/address)
+-		ip link set dev eth0 address $(macaddr_add "$base_mac" 2)
+-		ip link set dev eth1 address $(macaddr_add "$base_mac" 3)
+-		;;
+-	esac
+-}
+-
+-boot_hook_add preinit_main preinit_set_mac_address
+diff --git a/target/linux/ipq40xx/base-files/lib/upgrade/dualboot_datachk.sh b/target/linux/ipq40xx/base-files/lib/upgrade/dualboot_datachk.sh
+deleted file mode 100644
+index 81418fe0ba..0000000000
+--- a/target/linux/ipq40xx/base-files/lib/upgrade/dualboot_datachk.sh
++++ /dev/null
+@@ -1,108 +0,0 @@
+-# The U-Boot loader with the datachk patchset for dualbooting requires image
+-# sizes and checksums to be provided in the U-Boot environment.
+-# The devices come with 2 main partitions - while one is active
+-# sysupgrade will flash the other. The boot order is changed to boot the
+-# newly flashed partition. If the new partition can't be booted due to
+-# upgrade failures the previously used partition is loaded.
+-
+-platform_do_upgrade_dualboot_datachk() {
+-	local tar_file="$1"
+-	local restore_backup
+-	local primary_kernel_mtd
+-
+-	local setenv_script="/tmp/fw_env_upgrade"
+-
+-	local kernel_mtd="$(find_mtd_index $PART_NAME)"
+-	local kernel_offset="$(cat /sys/class/mtd/mtd${kernel_mtd}/offset)"
+-	local total_size="$(cat /sys/class/mtd/mtd${kernel_mtd}/size)"
+-
+-	# detect to which flash region the new image is written to.
+-	#
+-	# 1. check what is the mtd index for the first flash region on this
+-	#    device
+-	# 2. check if the target partition ("inactive") has the mtd index of
+-	#    the first flash region
+-	#
+-	#    - when it is: the new bootseq will be 1,2 and the first region is
+-	#      modified
+-	#    - when it isnt: bootseq will be 2,1 and the second region is
+-	#      modified
+-	#
+-	# The detection has to be done via the hardcoded mtd partition because
+-	# the current boot might be done with the fallback region. Let us
+-	# assume that the current bootseq is 1,2. The bootloader detected that
+-	# the image in flash region 1 is corrupt and thus switches to flash
+-	# region 2. The bootseq in the u-boot-env is now still the same and
+-	# the sysupgrade code can now only rely on the actual mtd indexes and
+-	# not the bootseq variable to detect the currently booted flash
+-	# region/image.
+-	#
+-	# In the above example, an implementation which uses bootseq ("1,2") to
+-	# detect the currently booted image would assume that region 1 is booted
+-	# and then overwrite the variables for the wrong flash region (aka the
+-	# one which isn't modified). This could result in a device which doesn't
+-	# boot anymore to Linux until it was reflashed with ap51-flash.
+-	local next_boot_part="1"
+-	case "$(board_name)" in
+-	plasmacloud,pa1200|\
+-	openmesh,a42)
+-		primary_kernel_mtd=8
+-		;;
+-	plasmacloud,pa2200|\
+-	openmesh,a62)
+-		primary_kernel_mtd=10
+-		;;
+-	*)
+-		echo "failed to detect primary kernel mtd partition for board"
+-		return 1
+-		;;
+-	esac
+-	[ "$kernel_mtd" = "$primary_kernel_mtd" ] || next_boot_part="2"
+-
+-	local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
+-	board_dir=${board_dir%/}
+-
+-	local kernel_length=$(tar xf $tar_file ${board_dir}/kernel -O | wc -c)
+-	local rootfs_length=$(tar xf $tar_file ${board_dir}/root -O | wc -c)
+-	# rootfs without EOF marker
+-	rootfs_length=$((rootfs_length-4))
+-
+-	local kernel_md5=$(tar xf $tar_file ${board_dir}/kernel -O | md5sum); kernel_md5="${kernel_md5%% *}"
+-	# md5 checksum of rootfs with EOF marker
+-	local rootfs_md5=$(tar xf $tar_file ${board_dir}/root -O | dd bs=1 count=$rootfs_length | md5sum); rootfs_md5="${rootfs_md5%% *}"
+-
+-	#
+-	# add tar support to get_image() to use default_do_upgrade() instead?
+-	#
+-
+-	# take care of restoring a saved config
+-	[ -n "$UPGRADE_BACKUP" ] && restore_backup="${MTD_CONFIG_ARGS} -j ${UPGRADE_BACKUP}"
+-
+-	mtd -q erase inactive
+-	tar xf $tar_file ${board_dir}/root -O | mtd -n -p $kernel_length $restore_backup write - $PART_NAME
+-	tar xf $tar_file ${board_dir}/kernel -O | mtd -n write - $PART_NAME
+-
+-	# prepare new u-boot env
+-	if [ "$next_boot_part" = "1" ]; then
+-		echo "bootseq 1,2" > $setenv_script
+-	else
+-		echo "bootseq 2,1" > $setenv_script
+-	fi
+-
+-	printf "kernel_size_%i 0x%08x\n" $next_boot_part $kernel_length >> $setenv_script
+-	printf "vmlinux_start_addr 0x%08x\n" ${kernel_offset} >> $setenv_script
+-	printf "vmlinux_size 0x%08x\n" ${kernel_length} >> $setenv_script
+-	printf "vmlinux_checksum %s\n" ${kernel_md5} >> $setenv_script
+-
+-	printf "rootfs_size_%i 0x%08x\n" $next_boot_part $((total_size-kernel_length)) >> $setenv_script
+-	printf "rootfs_start_addr 0x%08x\n" $((kernel_offset+kernel_length)) >> $setenv_script
+-	printf "rootfs_size 0x%08x\n" ${rootfs_length} >> $setenv_script
+-	printf "rootfs_checksum %s\n" ${rootfs_md5} >> $setenv_script
+-
+-	# store u-boot env changes
+-	mkdir -p /var/lock
+-	fw_setenv -s $setenv_script || {
+-		echo "failed to update U-Boot environment"
+-		return 1
+-	}
+-}
+diff --git a/target/linux/ipq40xx/base-files/lib/upgrade/linksys.sh b/target/linux/ipq40xx/base-files/lib/upgrade/linksys.sh
+deleted file mode 100644
+index 18366fc622..0000000000
+--- a/target/linux/ipq40xx/base-files/lib/upgrade/linksys.sh
++++ /dev/null
+@@ -1,125 +0,0 @@
+-linksys_get_target_firmware() {
+-	local cur_boot_part mtd_ubi0
+-
+-	cur_boot_part="$(/usr/sbin/fw_printenv -n boot_part)"
+-	if [ -z "${cur_boot_part}" ]; then
+-		mtd_ubi0=$(cat /sys/class/ubi/ubi0/mtd_num)
+-		case "$(grep -E "^mtd${mtd_ubi0}:" /proc/mtd | cut -d '"' -f 2)" in
+-		kernel|rootfs)
+-			cur_boot_part=1
+-			;;
+-		alt_kernel|alt_rootfs)
+-			cur_boot_part=2
+-			;;
+-		esac
+-		>&2 printf "Current boot_part='%s' selected from ubi0/mtd_num='%s'" \
+-			"${cur_boot_part}" "${mtd_ubi0}"
+-	fi
+-
+-	# OEM U-Boot for EA6350v3, EA8300 and MR8300; bootcmd=
+-	#  if test $auto_recovery = no;
+-	#      then bootipq;
+-	#  elif test $boot_part = 1;
+-	#      then run bootpart1;
+-	#      else run bootpart2;
+-	#  fi
+-
+-	case "$cur_boot_part" in
+-	1)
+-		fw_setenv -s - <<-EOF
+-			boot_part 2
+-			auto_recovery yes
+-		EOF
+-		printf "alt_kernel"
+-		return
+-		;;
+-	2)
+-		fw_setenv -s - <<-EOF
+-			boot_part 1
+-			auto_recovery yes
+-		EOF
+-		printf "kernel"
+-		return
+-		;;
+-	*)
+-		return
+-		;;
+-	esac
+-}
+-
+-linksys_is_factory_image() {
+-	local board=$(board_name)
+-	board=${board##*,}
+-
+-	# check matching footer signature
+-	tail -c 256 $1 | grep -q -i "\.LINKSYS\.........${board}"
+-}
+-
+-platform_do_upgrade_linksys() {
+-	local magic_long="$(get_magic_long "$1")"
+-
+-	local rm_oem_fw_vols="squashfs ubifs"	# from OEM [alt_]rootfs UBI
+-	local vol
+-
+-	mkdir -p /var/lock
+-	local part_label="$(linksys_get_target_firmware)"
+-	touch /var/lock/fw_printenv.lock
+-
+-	if [ -z "$part_label" ]; then
+-		echo "cannot find target partition"
+-		exit 1
+-	fi
+-
+-	local target_mtd=$(find_mtd_part "$part_label")
+-
+-	[ "$magic_long" = "73797375" ] && {
+-		CI_KERNPART="$part_label"
+-		if [ "$part_label" = "kernel" ]; then
+-			CI_UBIPART="rootfs"
+-		else
+-			CI_UBIPART="alt_rootfs"
+-		fi
+-
+-		local mtdnum="$(find_mtd_index "$CI_UBIPART")"
+-		if [ ! "$mtdnum" ]; then
+-			echo "cannot find ubi mtd partition $CI_UBIPART"
+-			return 1
+-		fi
+-
+-		local ubidev="$(nand_find_ubi "$CI_UBIPART")"
+-		if [ ! "$ubidev" ]; then
+-			ubiattach -m "$mtdnum"
+-			sync
+-			ubidev="$(nand_find_ubi "$CI_UBIPART")"
+-		fi
+-
+-		if [ "$ubidev" ]; then
+-			for vol in $rm_oem_fw_vols; do
+-				ubirmvol "/dev/$ubidev" -N "$vol" 2>/dev/null
+-			done
+-		fi
+-
+-		# complete std upgrade
+-		if nand_upgrade_tar "$1" ; then
+-			nand_do_upgrade_success
+-		else
+-			nand_do_upgrade_failed
+-		fi
+-
+-	}
+-
+-	[ "$magic_long" = "27051956" ] && {
+-		echo "writing \"$1\" image to \"$part_label\""
+-		get_image "$1" | mtd write - "$part_label"
+-	}
+-
+-	[ "$magic_long" = "d00dfeed" ] && {
+-		if ! linksys_is_factory_image "$1"; then
+-			echo "factory image doesn't match device"
+-			return 1
+-		fi
+-
+-		echo "writing \"$1\" factory image to \"$part_label\""
+-		get_image "$1" | mtd -e "$part_label" write - "$part_label"
+-	}
+-}
+diff --git a/target/linux/ipq40xx/base-files/lib/upgrade/netgear.sh b/target/linux/ipq40xx/base-files/lib/upgrade/netgear.sh
+deleted file mode 100644
+index f3fb626d1f..0000000000
+--- a/target/linux/ipq40xx/base-files/lib/upgrade/netgear.sh
++++ /dev/null
+@@ -1,76 +0,0 @@
+-# SPDX-License-Identifier: GPL-2.0-only
+-. /lib/functions.sh
+-
+-platform_do_upgrade_netgear_orbi_upgrade() {
+-	command -v losetup >/dev/null || {
+-		logger -s "Upgrade failed: 'losetup' not installed."
+-		return 1
+-	}
+-
+-	local tar_file=$1
+-	local kernel=$2
+-	local rootfs=$3
+-
+-	[ -z "$kernel" ] && kernel=$(find_mmc_part "kernel")
+-	[ -z "$rootfs" ] && rootfs=$(find_mmc_part "rootfs")
+-
+-	[ -z "$kernel" ] && echo "Upgrade failed: kernel partition not found! Rebooting..." && reboot -f
+-	[ -z "$rootfs" ] && echo "Upgrade failed: rootfs partition not found! Rebooting..." && reboot -f
+-
+-	netgear_orbi_do_flash $tar_file $kernel $rootfs
+-
+-	echo "sysupgrade successful"
+-	umount -a
+-	reboot -f
+-}
+-
+-netgear_orbi_do_flash() {
+-	local tar_file=$1
+-	local kernel=$2
+-	local rootfs=$3
+-
+-	# keep sure its unbound
+-	losetup --detach-all || {
+-		echo "Failed to detach all loop devices. Skip this try."
+-		reboot -f
+-	}
+-
+-	# use the first found directory in the tar archive
+-	local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
+-	board_dir=${board_dir%/}
+-
+-	echo "flashing kernel to $kernel"
+-	tar xf $tar_file ${board_dir}/kernel -O >$kernel
+-
+-	echo "flashing rootfs to ${rootfs}"
+-	tar xf $tar_file ${board_dir}/root -O >"${rootfs}"
+-
+-	# a padded rootfs is needed for overlay fs creation
+-	local offset=$(tar xf $tar_file ${board_dir}/root -O | wc -c)
+-	[ $offset -lt 65536 ] && {
+-		echo "Wrong size for rootfs: $offset"
+-		sleep 10
+-		reboot -f
+-	}
+-
+-	# Mount loop for rootfs_data
+-	local loopdev="$(losetup -f)"
+-	losetup -o $offset $loopdev $rootfs || {
+-		echo "Failed to mount looped rootfs_data."
+-		sleep 10
+-		reboot -f
+-	}
+-
+-	echo "Format new rootfs_data at position ${offset}."
+-	mkfs.ext4 -F -L rootfs_data $loopdev
+-	mkdir /tmp/new_root
+-	mount -t ext4 $loopdev /tmp/new_root && {
+-		echo "Saving config to rootfs_data at position ${offset}."
+-		cp -v "$UPGRADE_BACKUP" "/tmp/new_root/$BACKUP_FILE"
+-		umount /tmp/new_root
+-	}
+-
+-	# Cleanup
+-	losetup -d $loopdev >/dev/null 2>&1
+-	sync
+-}
+diff --git a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
+deleted file mode 100644
+index 651ddb8177..0000000000
+--- a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
++++ /dev/null
+@@ -1,251 +0,0 @@
+-PART_NAME=firmware
+-REQUIRE_IMAGE_METADATA=1
+-
+-RAMFS_COPY_BIN='fw_printenv fw_setenv'
+-RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'
+-
+-platform_check_image() {
+-	case "$(board_name)" in
+-	asus,rt-ac42u |\
+-	asus,rt-ac58u)
+-		local ubidev=$(nand_find_ubi $CI_UBIPART)
+-		local asus_root=$(nand_find_volume $ubidev jffs2)
+-
+-		[ -n "$asus_root" ] || return 0
+-
+-		cat << EOF
+-jffs2 partition is still present.
+-There's probably no space left
+-to install the filesystem.
+-
+-You need to delete the jffs2 partition first:
+-# ubirmvol /dev/ubi0 --name=jffs2
+-
+-Once this is done. Retry.
+-EOF
+-		return 1
+-		;;
+-	zte,mf18a |\
+-	zte,mf286d |\
+-	zte,mf287plus |\
+-	zte,mf289f)
+-		CI_UBIPART="rootfs"
+-		local mtdnum="$( find_mtd_index $CI_UBIPART )"
+-		[ ! "$mtdnum" ] && return 1
+-		ubiattach -m "$mtdnum" || true
+-		local ubidev="$( nand_find_ubi $CI_UBIPART )"
+-		local ubi_rootfs=$(nand_find_volume $ubidev ubi_rootfs)
+-		local ubi_rootfs_data=$(nand_find_volume $ubidev ubi_rootfs_data)
+-
+-		[ -n "$ubi_rootfs" ] || [ -n "$ubi_rootfs_data" ] || return 0
+-
+-		cat << EOF
+-ubi_rootfs partition is still present.
+-
+-You need to delete the stock partition first:
+-# ubirmvol /dev/ubi0 -N ubi_rootfs
+-Please also delete ubi_rootfs_data, if exist:
+-# ubirmvol /dev/ubi0 -N ubi_rootfs_data
+-
+-Once this is done. Retry.
+-EOF
+-		return 1
+-		;;
+-	esac
+-	return 0;
+-}
+-
+-askey_do_upgrade() {
+-	local tar_file="$1"
+-
+-	local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
+-	board_dir=${board_dir%/}
+-
+-	tar Oxf $tar_file ${board_dir}/root | mtd write - rootfs
+-
+-	nand_do_upgrade "$1"
+-}
+-
+-zyxel_do_upgrade() {
+-	local tar_file="$1"
+-
+-	local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
+-	board_dir=${board_dir%/}
+-
+-	tar Oxf $tar_file ${board_dir}/kernel | mtd write - kernel
+-
+-	if [ -n "$UPGRADE_BACKUP" ]; then
+-		tar Oxf $tar_file ${board_dir}/root | mtd -j "$UPGRADE_BACKUP" write - rootfs
+-	else
+-		tar Oxf $tar_file ${board_dir}/root | mtd write - rootfs
+-	fi
+-}
+-
+-platform_do_upgrade_mikrotik_nand() {
+-	local fw_mtd=$(find_mtd_part kernel)
+-	fw_mtd="${fw_mtd/block/}"
+-	[ -n "$fw_mtd" ] || return
+-
+-	local board_dir=$(tar tf "$1" | grep -m 1 '^sysupgrade-.*/$')
+-	board_dir=${board_dir%/}
+-	[ -n "$board_dir" ] || return
+-
+-	local kernel_len=$(tar xf "$1" ${board_dir}/kernel -O | wc -c)
+-	[ -n "$kernel_len" ] || return
+-
+-	tar xf "$1" ${board_dir}/kernel -O | ubiformat "$fw_mtd" -y -S $kernel_len -f -
+-
+-	CI_KERNPART="none"
+-	nand_do_upgrade "$1"
+-}
+-
+-platform_do_upgrade() {
+-	case "$(board_name)" in
+-	8dev,jalapeno |\
+-	aruba,ap-303 |\
+-	aruba,ap-303h |\
+-	aruba,ap-365 |\
+-	avm,fritzbox-7530 |\
+-	avm,fritzrepeater-1200 |\
+-	avm,fritzrepeater-3000 |\
+-	buffalo,wtr-m2133hp |\
+-	cilab,meshpoint-one |\
+-	edgecore,oap100 |\
+-	engenius,eap2200 |\
+-	glinet,gl-a1300 |\
+-	glinet,gl-ap1300 |\
+-	luma,wrtq-329acn |\
+-	mobipromo,cm520-79f |\
+-	netgear,wac510 |\
+-	p2w,r619ac-64m |\
+-	p2w,r619ac-128m |\
+-	qxwlan,e2600ac-c2 |\
+-	wallys,dr40x9)
+-		nand_do_upgrade "$1"
+-		;;
+-	glinet,gl-b2200)
+-		CI_KERNPART="0:HLOS"
+-		CI_ROOTPART="rootfs"
+-		CI_DATAPART="rootfs_data"
+-		emmc_do_upgrade "$1"
+-		;;
+-	alfa-network,ap120c-ac)
+-		part="$(awk -F 'ubi.mtd=' '{printf $2}' /proc/cmdline | sed -e 's/ .*$//')"
+-		if [ "$part" = "rootfs1" ]; then
+-			fw_setenv active 2 || exit 1
+-			CI_UBIPART="rootfs2"
+-		else
+-			fw_setenv active 1 || exit 1
+-			CI_UBIPART="rootfs1"
+-		fi
+-		nand_do_upgrade "$1"
+-		;;
+-	asus,map-ac2200)
+-		CI_KERNPART="linux"
+-		nand_do_upgrade "$1"
+-		;;
+-	asus,rt-ac42u |\
+-	asus,rt-ac58u)
+-		CI_KERNPART="linux"
+-		nand_do_upgrade "$1"
+-		;;
+-	cellc,rtl30vw)
+-		CI_UBIPART="ubifs"
+-		askey_do_upgrade "$1"
+-		;;
+-	compex,wpj419)
+-		nand_do_upgrade "$1"
+-		;;
+-	edgecore,ecw5211)
+-		mkdir -p /var/lock/
+-		part="$(awk -F 'ubi.mtd=' '{printf $2}' /proc/cmdline | cut -d " " -f 1)"
+-		case "$part" in
+-		rootfs1)
+-			fw_setenv active 2 || exit 1
+-			CI_UBIPART="rootfs2"
+-			;;
+-		rootfs2)
+-			fw_setenv active 1 || exit 1
+-			CI_UBIPART="rootfs1"
+-			;;
+-		*)
+-			# legacy bootloader
+-			;;
+-		esac
+-		nand_do_upgrade "$1"
+-		;;
+-	google,wifi)
+-		export_bootdevice
+-		export_partdevice CI_ROOTDEV 0
+-		CI_KERNPART="kernel"
+-		CI_ROOTPART="rootfs"
+-		emmc_do_upgrade "$1"
+-		;;
+-	linksys,ea6350v3 |\
+-	linksys,ea8300 |\
+-	linksys,mr8300 |\
+-	linksys,whw01 |\
+-	linksys,whw03v2)
+-		platform_do_upgrade_linksys "$1"
+-		;;
+-	meraki,mr33 |\
+-	meraki,mr74)
+-		CI_KERNPART="part.safe"
+-		nand_do_upgrade "$1"
+-		;;
+-	mikrotik,cap-ac|\
+-	mikrotik,hap-ac2|\
+-	mikrotik,hap-ac3-lte6-kit|\
+-	mikrotik,lhgg-60ad|\
+-	mikrotik,sxtsq-5-ac|\
+-	mikrotik,wap-ac|\
+-	mikrotik,wap-ac-lte|\
+-	mikrotik,wap-r-ac)
+-		[ "$(rootfs_type)" = "tmpfs" ] && mtd erase firmware
+-		default_do_upgrade "$1"
+-		;;
+-	mikrotik,hap-ac3)
+-		platform_do_upgrade_mikrotik_nand "$1"
+-		;;
+-	netgear,rbr50 |\
+-	netgear,rbs50 |\
+-	netgear,srr60 |\
+-	netgear,srs60)
+-		platform_do_upgrade_netgear_orbi_upgrade "$1"
+-		;;
+-	openmesh,a42 |\
+-	openmesh,a62 |\
+-	plasmacloud,pa1200 |\
+-	plasmacloud,pa2200)
+-		PART_NAME="inactive"
+-		platform_do_upgrade_dualboot_datachk "$1"
+-		;;
+-	sony,ncp-hg100-cellular)
+-		sony_emmc_do_upgrade "$1"
+-		;;
+-	teltonika,rutx10 |\
+-	zte,mf18a |\
+-	zte,mf286d |\
+-	zte,mf287plus |\
+-	zte,mf289f)
+-		CI_UBIPART="rootfs"
+-		nand_do_upgrade "$1"
+-		;;
+-	zyxel,nbg6617)
+-		zyxel_do_upgrade "$1"
+-		;;
+-	*)
+-		default_do_upgrade "$1"
+-		;;
+-	esac
+-}
+-
+-platform_copy_config() {
+-	case "$(board_name)" in
+-	glinet,gl-b2200 |\
+-	google,wifi)
+-		emmc_copy_config
+-		;;
+-	esac
+-	return 0;
+-}
+diff --git a/target/linux/ipq40xx/base-files/lib/upgrade/sony.sh b/target/linux/ipq40xx/base-files/lib/upgrade/sony.sh
+deleted file mode 100644
+index 8ff9df0fac..0000000000
+--- a/target/linux/ipq40xx/base-files/lib/upgrade/sony.sh
++++ /dev/null
+@@ -1,91 +0,0 @@
+-. /lib/functions.sh
+-
+-update_bootconfig() {
+-	local offset=$1
+-	local index="$2"
+-	local cfgpart=$(find_mmc_part "0:BOOTCONFIG")
+-	local cur_index
+-
+-	if [ -z "$cfgpart" ]; then
+-		echo "failed to get the partition: \"0:BOOTCONFIG\""
+-		return 1
+-	fi
+-
+-	cur_index=$(dd if=${cfgpart} bs=1 count=1 skip=$offset 2> /dev/null | hexdump -e '"%d"')
+-	if [ ${index} != ${cur_index} ]; then
+-		echo "updating \"0:BOOTCONFIG\""
+-		echo -en "\x0${index}" | \
+-			dd of=${cfgpart} bs=1 count=1 seek=$offset conv=notrunc 2>/dev/null
+-	fi
+-
+-	# also update 0:BOOTCONFIG1 if exists
+-	cfgpart=$(find_mmc_part "0:BOOTCONFIG1")
+-	[ -z "$cfgpart" ] && return
+-
+-	cur_index=$(dd if=${cfgpart} bs=1 count=1 skip=$offset 2> /dev/null | hexdump -e '"%d"')
+-	if [ ${index} != ${cur_index} ]; then
+-		echo "updating \"0:BOOTCONFIG1\""
+-		echo -en "\x0${index}" | \
+-			dd of=${cfgpart} bs=1 count=1 seek=$offset conv=notrunc 2>/dev/null
+-	fi
+-}
+-
+-### Note ###
+-# After the commit bad1835f27ec31dbc30060b03cc714212275168a in fstools,
+-# p17 (label: "rootfs_data") is mounted as a rootfs_data on boot instead
+-# of the loop device labeled as "rootfs_data" in p15 (label: "rootfs").
+-#
+-# cmdline flag is added to avoid mount "rootfs_data" partition by the
+-# commit 964d1e3af0e111bad6d393f8a3be702e334c2398 in fstools, but
+-# NCP-HG100 doesn't use it because it has a large (abount 1.6GB)
+-# "rootfs_data" partition and the advantage is larger than the
+-# disadvantages, such as overwriting the stock data in "rootfs_data"
+-# partition.
+-sony_emmc_do_upgrade() {
+-	local tar_file=$1
+-	local kernel_dev
+-	local rootfs_dev
+-	local board_dir
+-
+-	kernel_dev=$(find_mmc_part "0:HLOS")
+-	rootfs_dev=$(find_mmc_part "rootfs")
+-	rootfs_data_dev=$(find_mmc_part "rootfs_data")
+-
+-	if [ -z "$kernel_dev" ] || [ -z "$rootfs_dev" ] || [ -z "$rootfs_data_dev" ]; then
+-		echo "The partition name for kernel or rootfs or rootfs_data is not specified or failed to get the mmc device."
+-		exit 1
+-	fi
+-
+-	# use first partitions of kernel/rootfs for NCP-HG100
+-	# - offset  88 (0x58): 0:HLOS (kernel)
+-	# - offset 108 (0x6c): rootfs
+-	update_bootconfig 88 0 || exit 1
+-	update_bootconfig 108 0 || exit 1
+-
+-	board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
+-	board_dir=${board_dir%/}
+-
+-	echo "Flashing kernel to ${kernel_dev}"
+-	tar xf $tar_file ${board_dir}/kernel -O > $kernel_dev
+-
+-	echo "Flashing rootfs to ${rootfs_dev}"
+-	tar xf $tar_file ${board_dir}/root -O > $rootfs_dev
+-
+-	echo "Format new rootfs_data"
+-	mkfs.ext4 -F -L rootfs_data $rootfs_data_dev
+-
+-	if [ -e "$UPGRADE_BACKUP" ]; then
+-		mkdir /tmp/new_root
+-		mount -t ext4 $rootfs_data_dev /tmp/new_root && {
+-			echo "Saving configurations to rootfs_data"
+-			cp "$UPGRADE_BACKUP" "/tmp/new_root/$BACKUP_FILE"
+-			umount /tmp/new_root
+-		}
+-	fi
+-
+-	echo "sysupgrade successful"
+-
+-	sync
+-	umount -a
+-	reboot -f
+-}
+diff --git a/target/linux/ipq40xx/chromium/config-default b/target/linux/ipq40xx/chromium/config-default
+deleted file mode 100644
+index d78ca0ab28..0000000000
+--- a/target/linux/ipq40xx/chromium/config-default
++++ /dev/null
+@@ -1,10 +0,0 @@
+-CONFIG_BLK_DEV_SD=y
+-CONFIG_SCSI=y
+-CONFIG_SCSI_COMMON=y
+-CONFIG_SG_POOL=y
+-CONFIG_USB_DWC3=y
+-CONFIG_USB_DWC3_HOST=y
+-CONFIG_USB_DWC3_QCOM=y
+-CONFIG_USB_STORAGE=y
+-CONFIG_USB_XHCI_HCD=y
+-CONFIG_USB_XHCI_PLATFORM=y
+diff --git a/target/linux/ipq40xx/chromium/target.mk b/target/linux/ipq40xx/chromium/target.mk
+deleted file mode 100644
+index 98bd37ed71..0000000000
+--- a/target/linux/ipq40xx/chromium/target.mk
++++ /dev/null
+@@ -1,3 +0,0 @@
+-BOARDNAME:=Google Chromium
+-FEATURES += emmc boot-part rootfs-part
+-DEFAULT_PACKAGES += ath10k-board-qca4019
+diff --git a/target/linux/ipq40xx/config-5.15 b/target/linux/ipq40xx/config-5.15
+deleted file mode 100644
+index 0acc013a81..0000000000
+--- a/target/linux/ipq40xx/config-5.15
++++ /dev/null
+@@ -1,508 +0,0 @@
+-CONFIG_ALIGNMENT_TRAP=y
+-# CONFIG_APQ_GCC_8084 is not set
+-# CONFIG_APQ_MMCC_8084 is not set
+-CONFIG_ARCH_32BIT_OFF_T=y
+-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+-CONFIG_ARCH_IPQ40XX=y
+-CONFIG_ARCH_KEEP_MEMBLOCK=y
+-# CONFIG_ARCH_MDM9615 is not set
+-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+-# CONFIG_ARCH_MSM8960 is not set
+-# CONFIG_ARCH_MSM8974 is not set
+-# CONFIG_ARCH_MSM8X60 is not set
+-CONFIG_ARCH_MULTIPLATFORM=y
+-CONFIG_ARCH_MULTI_V6_V7=y
+-CONFIG_ARCH_MULTI_V7=y
+-CONFIG_ARCH_NR_GPIO=0
+-CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
+-CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
+-CONFIG_ARCH_QCOM=y
+-CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+-CONFIG_ARCH_SPARSEMEM_ENABLE=y
+-CONFIG_ARCH_SUSPEND_POSSIBLE=y
+-CONFIG_ARM=y
+-CONFIG_ARM_AMBA=y
+-CONFIG_ARM_APPENDED_DTB=y
+-CONFIG_ARM_ARCH_TIMER=y
+-CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
+-# CONFIG_ARM_ATAG_DTB_COMPAT is not set
+-CONFIG_ARM_CPUIDLE=y
+-# CONFIG_ARM_CPU_TOPOLOGY is not set
+-CONFIG_ARM_CRYPTO=y
+-CONFIG_ARM_GIC=y
+-CONFIG_ARM_HAS_SG_CHAIN=y
+-CONFIG_ARM_L1_CACHE_SHIFT=6
+-CONFIG_ARM_L1_CACHE_SHIFT_6=y
+-CONFIG_ARM_PATCH_IDIV=y
+-CONFIG_ARM_PATCH_PHYS_VIRT=y
+-# CONFIG_ARM_QCOM_CPUFREQ_HW is not set
+-# CONFIG_ARM_QCOM_CPUFREQ_NVMEM is not set
+-# CONFIG_ARM_QCOM_SPM_CPUIDLE is not set
+-# CONFIG_ARM_SMMU is not set
+-CONFIG_ARM_THUMB=y
+-CONFIG_ARM_UNWIND=y
+-CONFIG_ARM_VIRT_EXT=y
+-CONFIG_AT803X_PHY=y
+-CONFIG_AUTO_ZRELADDR=y
+-CONFIG_BCH=y
+-CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
+-CONFIG_BLK_DEV_LOOP=y
+-CONFIG_BLK_MQ_PCI=y
+-CONFIG_BOUNCE=y
+-# CONFIG_CACHE_L2X0 is not set
+-CONFIG_CLKSRC_QCOM=y
+-CONFIG_CLONE_BACKWARDS=y
+-CONFIG_CMDLINE_PARTITION=y
+-CONFIG_COMMON_CLK=y
+-CONFIG_COMMON_CLK_QCOM=y
+-CONFIG_COMPAT_32BIT_TIME=y
+-CONFIG_CPUFREQ_DT=y
+-CONFIG_CPUFREQ_DT_PLATDEV=y
+-CONFIG_CPU_32v6K=y
+-CONFIG_CPU_32v7=y
+-CONFIG_CPU_ABRT_EV7=y
+-CONFIG_CPU_CACHE_V7=y
+-CONFIG_CPU_CACHE_VIPT=y
+-CONFIG_CPU_COPY_V6=y
+-CONFIG_CPU_CP15=y
+-CONFIG_CPU_CP15_MMU=y
+-CONFIG_CPU_FREQ=y
+-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+-# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+-CONFIG_CPU_FREQ_GOV_ATTR_SET=y
+-CONFIG_CPU_FREQ_GOV_COMMON=y
+-# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+-# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
+-# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
+-CONFIG_CPU_FREQ_STAT=y
+-CONFIG_CPU_HAS_ASID=y
+-CONFIG_CPU_IDLE=y
+-CONFIG_CPU_IDLE_GOV_LADDER=y
+-CONFIG_CPU_IDLE_GOV_MENU=y
+-CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
+-CONFIG_CPU_PABRT_V7=y
+-CONFIG_CPU_PM=y
+-CONFIG_CPU_RMAP=y
+-CONFIG_CPU_SPECTRE=y
+-CONFIG_CPU_THERMAL=y
+-CONFIG_CPU_THUMB_CAPABLE=y
+-CONFIG_CPU_TLB_V7=y
+-CONFIG_CPU_V7=y
+-CONFIG_CRC16=y
+-# CONFIG_CRC32_SARWATE is not set
+-CONFIG_CRC32_SLICEBY8=y
+-CONFIG_CRC8=y
+-CONFIG_CRYPTO_AES_ARM=y
+-CONFIG_CRYPTO_AES_ARM_BS=y
+-CONFIG_CRYPTO_BLAKE2S_ARM=y
+-CONFIG_CRYPTO_CBC=y
+-CONFIG_CRYPTO_CRYPTD=y
+-CONFIG_CRYPTO_DEFLATE=y
+-CONFIG_CRYPTO_DES=y
+-CONFIG_CRYPTO_DEV_QCE=y
+-# CONFIG_CRYPTO_DEV_QCE_ENABLE_AEAD is not set
+-# CONFIG_CRYPTO_DEV_QCE_ENABLE_ALL is not set
+-# CONFIG_CRYPTO_DEV_QCE_ENABLE_SHA is not set
+-CONFIG_CRYPTO_DEV_QCE_ENABLE_SKCIPHER=y
+-CONFIG_CRYPTO_DEV_QCE_SKCIPHER=y
+-CONFIG_CRYPTO_DEV_QCE_SW_MAX_LEN=512
+-CONFIG_CRYPTO_DEV_QCOM_RNG=y
+-CONFIG_CRYPTO_DRBG=y
+-CONFIG_CRYPTO_DRBG_HMAC=y
+-CONFIG_CRYPTO_DRBG_MENU=y
+-CONFIG_CRYPTO_ECB=y
+-CONFIG_CRYPTO_HASH_INFO=y
+-CONFIG_CRYPTO_HMAC=y
+-CONFIG_CRYPTO_HW=y
+-CONFIG_CRYPTO_JITTERENTROPY=y
+-CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
+-CONFIG_CRYPTO_LIB_DES=y
+-CONFIG_CRYPTO_LIB_SHA256=y
+-CONFIG_CRYPTO_LZO=y
+-CONFIG_CRYPTO_RNG=y
+-CONFIG_CRYPTO_RNG2=y
+-CONFIG_CRYPTO_RNG_DEFAULT=y
+-CONFIG_CRYPTO_SEQIV=y
+-CONFIG_CRYPTO_SHA1=y
+-CONFIG_CRYPTO_SHA256=y
+-CONFIG_CRYPTO_SHA256_ARM=y
+-CONFIG_CRYPTO_SHA512=y
+-CONFIG_CRYPTO_SIMD=y
+-CONFIG_CRYPTO_XTS=y
+-CONFIG_CRYPTO_ZSTD=y
+-CONFIG_DCACHE_WORD_ACCESS=y
+-CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
+-CONFIG_DEBUG_MISC=y
+-CONFIG_DMADEVICES=y
+-CONFIG_DMA_ENGINE=y
+-CONFIG_DMA_OF=y
+-CONFIG_DMA_OPS=y
+-CONFIG_DMA_REMAP=y
+-CONFIG_DMA_SHARED_BUFFER=y
+-CONFIG_DMA_VIRTUAL_CHANNELS=y
+-CONFIG_DTC=y
+-CONFIG_DT_IDLE_STATES=y
+-CONFIG_EDAC_ATOMIC_SCRUB=y
+-CONFIG_EDAC_SUPPORT=y
+-CONFIG_EEPROM_AT24=y
+-CONFIG_EXTCON=y
+-CONFIG_FIXED_PHY=y
+-CONFIG_FIX_EARLYCON_MEM=y
+-CONFIG_FWNODE_MDIO=y
+-CONFIG_FW_LOADER_PAGED_BUF=y
+-CONFIG_GENERIC_ALLOCATOR=y
+-CONFIG_GENERIC_BUG=y
+-CONFIG_GENERIC_CLOCKEVENTS=y
+-CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+-CONFIG_GENERIC_CPU_AUTOPROBE=y
+-CONFIG_GENERIC_CPU_VULNERABILITIES=y
+-CONFIG_GENERIC_EARLY_IOREMAP=y
+-CONFIG_GENERIC_GETTIMEOFDAY=y
+-CONFIG_GENERIC_IDLE_POLL_SETUP=y
+-CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
+-CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
+-CONFIG_GENERIC_IRQ_SHOW=y
+-CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
+-CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
+-CONFIG_GENERIC_MSI_IRQ=y
+-CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
+-CONFIG_GENERIC_PCI_IOMAP=y
+-CONFIG_GENERIC_PHY=y
+-CONFIG_GENERIC_PINCONF=y
+-CONFIG_GENERIC_PINCTRL_GROUPS=y
+-CONFIG_GENERIC_PINMUX_FUNCTIONS=y
+-CONFIG_GENERIC_SCHED_CLOCK=y
+-CONFIG_GENERIC_SMP_IDLE_THREAD=y
+-CONFIG_GENERIC_STRNCPY_FROM_USER=y
+-CONFIG_GENERIC_STRNLEN_USER=y
+-CONFIG_GENERIC_TIME_VSYSCALL=y
+-CONFIG_GENERIC_VDSO_32=y
+-CONFIG_GPIOLIB_IRQCHIP=y
+-CONFIG_GPIO_74X164=y
+-CONFIG_GPIO_CDEV=y
+-CONFIG_GPIO_WATCHDOG=y
+-CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y
+-CONFIG_GRO_CELLS=y
+-CONFIG_HANDLE_DOMAIN_IRQ=y
+-CONFIG_HARDEN_BRANCH_PREDICTOR=y
+-CONFIG_HARDIRQS_SW_RESEND=y
+-CONFIG_HAS_DMA=y
+-CONFIG_HAS_IOMEM=y
+-CONFIG_HAS_IOPORT_MAP=y
+-CONFIG_HAVE_SMP=y
+-CONFIG_HIGHMEM=y
+-# CONFIG_HIGHPTE is not set
+-CONFIG_HWSPINLOCK=y
+-CONFIG_HWSPINLOCK_QCOM=y
+-CONFIG_HW_RANDOM=y
+-CONFIG_HW_RANDOM_OPTEE=y
+-CONFIG_HZ_FIXED=0
+-CONFIG_I2C=y
+-CONFIG_I2C_BOARDINFO=y
+-CONFIG_I2C_CHARDEV=y
+-CONFIG_I2C_HELPER_AUTO=y
+-# CONFIG_I2C_QCOM_CCI is not set
+-CONFIG_I2C_QUP=y
+-CONFIG_INITRAMFS_SOURCE=""
+-# CONFIG_IOMMU_DEBUGFS is not set
+-# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
+-# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
+-CONFIG_IOMMU_SUPPORT=y
+-# CONFIG_IPQ_APSS_PLL is not set
+-CONFIG_IPQ_GCC_4019=y
+-# CONFIG_IPQ_GCC_6018 is not set
+-# CONFIG_IPQ_GCC_806X is not set
+-# CONFIG_IPQ_GCC_8074 is not set
+-# CONFIG_IPQ_LCC_806X is not set
+-CONFIG_IRQCHIP=y
+-CONFIG_IRQ_DOMAIN=y
+-CONFIG_IRQ_DOMAIN_HIERARCHY=y
+-CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y
+-CONFIG_IRQ_FORCED_THREADING=y
+-CONFIG_IRQ_WORK=y
+-CONFIG_KMAP_LOCAL=y
+-CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y
+-# CONFIG_KPSS_XCC is not set
+-# CONFIG_KRAITCC is not set
+-CONFIG_LEDS_LP5523=y
+-CONFIG_LEDS_LP5562=y
+-CONFIG_LEDS_LP55XX_COMMON=y
+-CONFIG_LEDS_TLC591XX=y
+-CONFIG_LIBFDT=y
+-CONFIG_LOCK_DEBUGGING_SUPPORT=y
+-CONFIG_LOCK_SPIN_ON_OWNER=y
+-CONFIG_LZO_COMPRESS=y
+-CONFIG_LZO_DECOMPRESS=y
+-CONFIG_MDIO_BITBANG=y
+-CONFIG_MDIO_BUS=y
+-CONFIG_MDIO_DEVICE=y
+-CONFIG_MDIO_DEVRES=y
+-CONFIG_MDIO_GPIO=y
+-CONFIG_MDIO_IPQ4019=y
+-# CONFIG_MDM_GCC_9615 is not set
+-# CONFIG_MDM_LCC_9615 is not set
+-CONFIG_MEMFD_CREATE=y
+-# CONFIG_MFD_HI6421_SPMI is not set
+-# CONFIG_MFD_QCOM_RPM is not set
+-# CONFIG_MFD_SPMI_PMIC is not set
+-CONFIG_MFD_SYSCON=y
+-CONFIG_MIGHT_HAVE_CACHE_L2X0=y
+-CONFIG_MIGRATION=y
+-CONFIG_MMC=y
+-CONFIG_MMC_BLOCK=y
+-CONFIG_MMC_CQHCI=y
+-CONFIG_MMC_SDHCI=y
+-CONFIG_MMC_SDHCI_IO_ACCESSORS=y
+-CONFIG_MMC_SDHCI_MSM=y
+-# CONFIG_MMC_SDHCI_PCI is not set
+-CONFIG_MMC_SDHCI_PLTFM=y
+-CONFIG_MODULES_USE_ELF_REL=y
+-# CONFIG_MSM_GCC_8660 is not set
+-# CONFIG_MSM_GCC_8916 is not set
+-# CONFIG_MSM_GCC_8939 is not set
+-# CONFIG_MSM_GCC_8960 is not set
+-# CONFIG_MSM_GCC_8974 is not set
+-# CONFIG_MSM_GCC_8994 is not set
+-# CONFIG_MSM_GCC_8996 is not set
+-# CONFIG_MSM_GCC_8998 is not set
+-# CONFIG_MSM_GPUCC_8998 is not set
+-# CONFIG_MSM_LCC_8960 is not set
+-# CONFIG_MSM_MMCC_8960 is not set
+-# CONFIG_MSM_MMCC_8974 is not set
+-# CONFIG_MSM_MMCC_8996 is not set
+-# CONFIG_MSM_MMCC_8998 is not set
+-CONFIG_MTD_CMDLINE_PARTS=y
+-CONFIG_MTD_NAND_CORE=y
+-CONFIG_MTD_NAND_ECC=y
+-CONFIG_MTD_NAND_ECC_SW_BCH=y
+-CONFIG_MTD_NAND_ECC_SW_HAMMING=y
+-CONFIG_MTD_NAND_QCOM=y
+-# CONFIG_MTD_QCOMSMEM_PARTS is not set
+-CONFIG_MTD_RAW_NAND=y
+-CONFIG_MTD_SPI_NAND=y
+-CONFIG_MTD_SPI_NOR=y
+-CONFIG_MTD_SPLIT_FIRMWARE=y
+-CONFIG_MTD_SPLIT_FIT_FW=y
+-CONFIG_MTD_SPLIT_WRGG_FW=y
+-CONFIG_MTD_UBI=y
+-CONFIG_MTD_UBI_BEB_LIMIT=20
+-CONFIG_MTD_UBI_BLOCK=y
+-CONFIG_MTD_UBI_WL_THRESHOLD=4096
+-CONFIG_MUTEX_SPIN_ON_OWNER=y
+-CONFIG_NEED_DMA_MAP_STATE=y
+-CONFIG_NEON=y
+-CONFIG_NET_DEVLINK=y
+-CONFIG_NET_DSA=y
+-CONFIG_NET_DSA_QCA8K_IPQ4019=y
+-CONFIG_NET_DSA_TAG_IPQ4019=y
+-CONFIG_NET_FLOW_LIMIT=y
+-CONFIG_NET_PTP_CLASSIFY=y
+-CONFIG_NET_SELFTESTS=y
+-CONFIG_NET_SWITCHDEV=y
+-CONFIG_NLS=y
+-CONFIG_NO_HZ=y
+-CONFIG_NO_HZ_COMMON=y
+-CONFIG_NO_HZ_IDLE=y
+-CONFIG_NR_CPUS=4
+-CONFIG_NVMEM=y
+-CONFIG_NVMEM_QCOM_QFPROM=y
+-# CONFIG_NVMEM_SPMI_SDAM is not set
+-CONFIG_NVMEM_SYSFS=y
+-CONFIG_OF=y
+-CONFIG_OF_ADDRESS=y
+-CONFIG_OF_EARLY_FLATTREE=y
+-CONFIG_OF_FLATTREE=y
+-CONFIG_OF_GPIO=y
+-CONFIG_OF_IRQ=y
+-CONFIG_OF_KOBJ=y
+-CONFIG_OF_MDIO=y
+-CONFIG_OLD_SIGACTION=y
+-CONFIG_OLD_SIGSUSPEND3=y
+-CONFIG_OPTEE=y
+-CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1
+-CONFIG_PADATA=y
+-CONFIG_PAGE_OFFSET=0xC0000000
+-CONFIG_PCI=y
+-CONFIG_PCIEAER=y
+-CONFIG_PCIEPORTBUS=y
+-CONFIG_PCIE_DW=y
+-CONFIG_PCIE_DW_HOST=y
+-CONFIG_PCIE_QCOM=y
+-CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
+-CONFIG_PCI_DOMAINS=y
+-CONFIG_PCI_DOMAINS_GENERIC=y
+-CONFIG_PCI_MSI=y
+-CONFIG_PCI_MSI_IRQ_DOMAIN=y
+-CONFIG_PERF_USE_VMALLOC=y
+-CONFIG_PGTABLE_LEVELS=2
+-CONFIG_PHYLIB=y
+-CONFIG_PHYLINK=y
+-# CONFIG_PHY_QCOM_APQ8064_SATA is not set
+-CONFIG_PHY_QCOM_IPQ4019_USB=y
+-# CONFIG_PHY_QCOM_IPQ806X_SATA is not set
+-# CONFIG_PHY_QCOM_IPQ806X_USB is not set
+-# CONFIG_PHY_QCOM_PCIE2 is not set
+-# CONFIG_PHY_QCOM_QMP is not set
+-# CONFIG_PHY_QCOM_QUSB2 is not set
+-# CONFIG_PHY_QCOM_USB_HS_28NM is not set
+-# CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2 is not set
+-# CONFIG_PHY_QCOM_USB_SS is not set
+-CONFIG_PINCTRL=y
+-# CONFIG_PINCTRL_APQ8064 is not set
+-# CONFIG_PINCTRL_APQ8084 is not set
+-CONFIG_PINCTRL_IPQ4019=y
+-# CONFIG_PINCTRL_IPQ6018 is not set
+-# CONFIG_PINCTRL_IPQ8064 is not set
+-# CONFIG_PINCTRL_IPQ8074 is not set
+-# CONFIG_PINCTRL_MDM9615 is not set
+-CONFIG_PINCTRL_MSM=y
+-# CONFIG_PINCTRL_MSM8226 is not set
+-# CONFIG_PINCTRL_MSM8660 is not set
+-# CONFIG_PINCTRL_MSM8916 is not set
+-# CONFIG_PINCTRL_MSM8960 is not set
+-# CONFIG_PINCTRL_MSM8976 is not set
+-# CONFIG_PINCTRL_MSM8994 is not set
+-# CONFIG_PINCTRL_MSM8996 is not set
+-# CONFIG_PINCTRL_MSM8998 is not set
+-# CONFIG_PINCTRL_QCOM_SPMI_PMIC is not set
+-# CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set
+-# CONFIG_PINCTRL_QCS404 is not set
+-# CONFIG_PINCTRL_SC7180 is not set
+-# CONFIG_PINCTRL_SDM660 is not set
+-# CONFIG_PINCTRL_SDM845 is not set
+-# CONFIG_PINCTRL_SM8150 is not set
+-# CONFIG_PINCTRL_SM8250 is not set
+-CONFIG_PM_OPP=y
+-CONFIG_POWER_RESET=y
+-CONFIG_POWER_RESET_GPIO_RESTART=y
+-CONFIG_POWER_RESET_MSM=y
+-CONFIG_POWER_SUPPLY=y
+-CONFIG_PPS=y
+-CONFIG_PRINTK_TIME=y
+-CONFIG_PTP_1588_CLOCK=y
+-CONFIG_PTP_1588_CLOCK_OPTIONAL=y
+-CONFIG_QCA807X_PHY=y
+-CONFIG_QCOM_A53PLL=y
+-# CONFIG_QCOM_ADM is not set
+-CONFIG_QCOM_BAM_DMA=y
+-# CONFIG_QCOM_COMMAND_DB is not set
+-# CONFIG_QCOM_CPR is not set
+-# CONFIG_QCOM_EBI2 is not set
+-# CONFIG_QCOM_GENI_SE is not set
+-# CONFIG_QCOM_GSBI is not set
+-# CONFIG_QCOM_HFPLL is not set
+-# CONFIG_QCOM_IOMMU is not set
+-CONFIG_QCOM_IPQ4019_ESS_EDMA=y
+-# CONFIG_QCOM_LLCC is not set
+-# CONFIG_QCOM_OCMEM is not set
+-# CONFIG_QCOM_PDC is not set
+-# CONFIG_QCOM_RMTFS_MEM is not set
+-# CONFIG_QCOM_RPMH is not set
+-CONFIG_QCOM_SCM=y
+-# CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is not set
+-CONFIG_QCOM_SMEM=y
+-# CONFIG_QCOM_SMSM is not set
+-# CONFIG_QCOM_SOCINFO is not set
+-CONFIG_QCOM_TCSR=y
+-# CONFIG_QCOM_TSENS is not set
+-CONFIG_QCOM_WDT=y
+-# CONFIG_QCS_GCC_404 is not set
+-# CONFIG_QCS_Q6SSTOP_404 is not set
+-# CONFIG_QCS_TURING_404 is not set
+-CONFIG_RAS=y
+-CONFIG_RATIONAL=y
+-CONFIG_REGMAP=y
+-CONFIG_REGMAP_I2C=y
+-CONFIG_REGMAP_MMIO=y
+-CONFIG_REGULATOR=y
+-CONFIG_REGULATOR_FIXED_VOLTAGE=y
+-# CONFIG_REGULATOR_QCOM_LABIBB is not set
+-# CONFIG_REGULATOR_QCOM_SPMI is not set
+-# CONFIG_REGULATOR_QCOM_USB_VBUS is not set
+-CONFIG_REGULATOR_VCTRL=y
+-CONFIG_REGULATOR_VQMMC_IPQ4019=y
+-CONFIG_RESET_CONTROLLER=y
+-# CONFIG_RESET_QCOM_AOSS is not set
+-# CONFIG_RESET_QCOM_PDC is not set
+-CONFIG_RFS_ACCEL=y
+-CONFIG_RPS=y
+-CONFIG_RTC_CLASS=y
+-CONFIG_RTC_I2C_AND_SPI=y
+-CONFIG_RTC_MC146818_LIB=y
+-CONFIG_RWSEM_SPIN_ON_OWNER=y
+-# CONFIG_SC_DISPCC_7180 is not set
+-# CONFIG_SC_GCC_7180 is not set
+-# CONFIG_SC_GPUCC_7180 is not set
+-# CONFIG_SC_LPASS_CORECC_7180 is not set
+-# CONFIG_SC_MSS_7180 is not set
+-# CONFIG_SC_VIDEOCC_7180 is not set
+-# CONFIG_SDM_CAMCC_845 is not set
+-# CONFIG_SDM_DISPCC_845 is not set
+-# CONFIG_SDM_GCC_660 is not set
+-# CONFIG_SDM_GCC_845 is not set
+-# CONFIG_SDM_GPUCC_845 is not set
+-# CONFIG_SDM_LPASSCC_845 is not set
+-# CONFIG_SDM_VIDEOCC_845 is not set
+-CONFIG_SERIAL_8250_FSL=y
+-CONFIG_SERIAL_MCTRL_GPIO=y
+-CONFIG_SERIAL_MSM=y
+-CONFIG_SERIAL_MSM_CONSOLE=y
+-CONFIG_SGL_ALLOC=y
+-CONFIG_SMP=y
+-CONFIG_SMP_ON_UP=y
+-# CONFIG_SM_GCC_8150 is not set
+-# CONFIG_SM_GCC_8250 is not set
+-# CONFIG_SM_GPUCC_8150 is not set
+-# CONFIG_SM_GPUCC_8250 is not set
+-# CONFIG_SM_VIDEOCC_8150 is not set
+-# CONFIG_SM_VIDEOCC_8250 is not set
+-CONFIG_SOCK_RX_QUEUE_MAPPING=y
+-CONFIG_SPARSE_IRQ=y
+-CONFIG_SPI=y
+-CONFIG_SPI_BITBANG=y
+-CONFIG_SPI_GPIO=y
+-CONFIG_SPI_MASTER=y
+-CONFIG_SPI_MEM=y
+-CONFIG_SPI_QUP=y
+-CONFIG_SPMI=y
+-# CONFIG_SPMI_HISI3670 is not set
+-CONFIG_SPMI_MSM_PMIC_ARB=y
+-# CONFIG_SPMI_PMIC_CLKDIV is not set
+-CONFIG_SRCU=y
+-CONFIG_SWPHY=y
+-CONFIG_SWP_EMULATE=y
+-CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+-CONFIG_TEE=y
+-CONFIG_THERMAL=y
+-CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+-CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
+-CONFIG_THERMAL_GOV_STEP_WISE=y
+-CONFIG_THERMAL_OF=y
+-CONFIG_TICK_CPU_ACCOUNTING=y
+-CONFIG_TIMER_OF=y
+-CONFIG_TIMER_PROBE=y
+-CONFIG_TREE_RCU=y
+-CONFIG_TREE_SRCU=y
+-CONFIG_UBIFS_FS=y
+-CONFIG_UEVENT_HELPER_PATH=""
+-CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
+-CONFIG_UNWINDER_ARM=y
+-CONFIG_USB=y
+-CONFIG_USB_COMMON=y
+-CONFIG_USB_SUPPORT=y
+-CONFIG_USE_OF=y
+-CONFIG_VFP=y
+-CONFIG_VFPv3=y
+-CONFIG_WATCHDOG_CORE=y
+-CONFIG_XPS=y
+-CONFIG_XXHASH=y
+-CONFIG_XZ_DEC_ARM=y
+-CONFIG_XZ_DEC_BCJ=y
+-CONFIG_ZBOOT_ROM_BSS=0
+-CONFIG_ZBOOT_ROM_TEXT=0
+-CONFIG_ZLIB_DEFLATE=y
+-CONFIG_ZLIB_INFLATE=y
+-CONFIG_ZSTD_COMPRESS=y
+-CONFIG_ZSTD_DECOMPRESS=y
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-a42.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-a42.dts
+deleted file mode 100644
+index b6ff09a042..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-a42.dts
++++ /dev/null
+@@ -1,233 +0,0 @@
+-// SPDX-License-Identifier: ISC
+-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+- * Copyright (c) 2017, Sven Eckelmann <sven.eckelmann@openmesh.com>
+- */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "OpenMesh A42";
+-	compatible = "openmesh,a42";
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2: usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	aliases {
+-		led-boot = &led_status_green;
+-		led-failsafe = &led_status_green;
+-		led-running = &led_status_green;
+-		led-upgrade = &led_status_green;
+-		label-mac-device = &swport5;
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		status_red {
+-			label = "red:status";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_status_green: status_green {
+-			label = "green:status";
+-			gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		status_blue {
+-			label = "blue:status";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-
+-	watchdog {
+-		compatible = "linux,wdt-gpio";
+-		gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
+-		hw_algo = "toggle";
+-		/* hw_margin_ms is actually 300s but driver limits it to 60s */
+-		hw_margin_ms = <60000>;
+-		always-running;
+-	};
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		/* partitions are passed via bootloader */
+-		partitions {
+-			partition-art {
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-				label = "0:ART";
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-
+-				macaddr_gmac0: macaddr@0 {
+-					reg = <0x0 0x6>;
+-				};
+-
+-				macaddr_gmac1: macaddr@6 {
+-					reg = <0x6 0x6>;
+-				};
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "ethernet2";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac1>;
+-};
+-
+-&swport5 {
+-	status = "okay";
+-	label = "ethernet1";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac0>;
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "OM-A42";
+-
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "OM-A42";
+-
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts
+deleted file mode 100644
+index def0401ac5..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts
++++ /dev/null
+@@ -1,353 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "ALFA Network AP120C-AC";
+-	compatible = "alfa-network,ap120c-ac";
+-
+-	aliases {
+-		led-boot = &status;
+-		led-failsafe = &status;
+-		led-running = &status;
+-		led-upgrade = &status;
+-		ethernet1 = &swport5;
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		status: status {
+-			label = "blue:status";
+-			gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
+-			default-state = "keep";
+-		};
+-
+-		wan {
+-			label = "amber:wan";
+-			gpios = <&ethphy4 1 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan2g {
+-			label = "green:wlan2g";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		wlan5g {
+-			label = "red:wlan5g";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy1tpt";
+-		};
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-		};
+-
+-		counter@4a1000 {
+-			compatible = "qcom,qca-gcnt";
+-			reg = <0x4a1000 0x4>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-
+-			dwc3@8a00000 {
+-				phys = <&usb3_hs_phy>;
+-				phy-names = "usb2-phy";
+-			};
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_i2c3 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&i2c0_pins>;
+-	pinctrl-names = "default";
+-
+-	tpm@29 {
+-		compatible = "atmel,at97sc3204t";
+-		reg = <0x29>;
+-	};
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&spi0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
+-		   <&tlmm  4 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-
+-			partition@c0000 {
+-				label = "CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "APPSBLENV";
+-				reg = <0x000e0000 0x00010000>;
+-			};
+-
+-			partition@f0000 {
+-				label = "APPSBL";
+-				reg = <0x000f0000 0x00080000>;
+-				read-only;
+-			};
+-
+-			partition@170000 {
+-				label = "ART";
+-				reg = <0x00170000 0x00010000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-
+-			partition@180000 {
+-				label = "priv_data1";
+-				reg = <0x00180000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition@190000 {
+-				label = "priv_data2";
+-				reg = <0x00190000 0x00010000>;
+-				read-only;
+-			};
+-		};
+-	};
+-
+-	nand@1 {
+-		compatible = "spi-nand";
+-		reg = <1>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "rootfs1";
+-				reg = <0x00000000 0x04000000>;
+-			};
+-
+-			partition@4000000 {
+-				label = "rootfs2";
+-				reg = <0x04000000 0x04000000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&serial0_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&ethphy4 {
+-	gpio-controller;
+-	#gpio-cells = <2>;
+-};
+-
+-&tlmm {
+-	i2c0_pins: i2c0_pinmux {
+-		mux_i2c {
+-			function = "blsp_i2c0";
+-			pins = "gpio58", "gpio59";
+-			drive-strength = <16>;
+-			bias-disable;
+-		};
+-	};
+-
+-	mdio_pins: mdio_pinmux {
+-		mux_mdio {
+-			pins = "gpio53";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-
+-		mux_mdc {
+-			pins = "gpio52";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	serial0_pins: serial0_pinmux {
+-		mux_uart {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi0_pins: spi0_pinmux {
+-		mux_spi {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		mux_cs {
+-			function = "gpio";
+-			pins = "gpio54", "gpio4";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-cap-ac.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-cap-ac.dts
+deleted file mode 100644
+index 0609324310..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-cap-ac.dts
++++ /dev/null
+@@ -1,253 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2020, Robert Marko <robimarko@gmail.com> */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "MikroTik cAP ac";
+-	compatible = "mikrotik,cap-ac";
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x08000000>;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-	};
+-
+-	aliases {
+-		led-boot = &led_user;
+-		led-failsafe = &led_user;
+-		led-running = &led_user;
+-		led-upgrade = &led_user;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		counter@4a1000 {
+-			compatible = "qcom,qca-gcnt";
+-			reg = <0x4a1000 0x4>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-
+-		mode {
+-			label = "mode";
+-			gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_LIGHTS_TOGGLE>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		power {
+-			label = "blue:power";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+-			default-state = "keep";
+-		};
+-
+-		led_user: user {
+-			label = "green:user";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-			panic-indicator;
+-		};
+-
+-		wlan2g {
+-			label = "green:wlan2g";
+-			gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan5g {
+-			label = "green:wlan5g";
+-			gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		eth1 {
+-			label = "green:eth1";
+-			gpios = <&ethphy4 1 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		eth2 {
+-			label = "green:eth2";
+-			gpios = <&ethphy3 1 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <2>;
+-			bias-disable;
+-		};
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <40000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "Qualcomm";
+-				reg = <0x0 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@80000 {
+-				compatible = "mikrotik,routerboot-partitions";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-				label = "RouterBoot";
+-				reg = <0x80000 0x80000>;
+-
+-				hard_config {
+-					read-only;
+-				};
+-
+-				dtb_config {
+-					read-only;
+-				};
+-
+-				soft_config {
+-				};
+-			};
+-
+-			partition@100000 {
+-				compatible = "mikrotik,minor";
+-				label = "firmware";
+-				reg = <0x100000 0xf00000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-};
+-
+-&ethphy3 {
+-	gpio-controller;
+-	#gpio-cells = <2>;
+-};
+-
+-&ethphy4 {
+-	gpio-controller;
+-	#gpio-cells = <2>;
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-
+-	qcom,ath10k-calibration-variant = "MikroTik-cAP-ac";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-
+-	qcom,ath10k-calibration-variant = "MikroTik-cAP-ac";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-cs-w3-wd1200g-eup.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-cs-w3-wd1200g-eup.dts
+deleted file mode 100644
+index 22a48c12c4..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-cs-w3-wd1200g-eup.dts
++++ /dev/null
+@@ -1,290 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "EZVIZ CS-W3-WD1200G EUP";
+-	compatible = "ezviz,cs-w3-wd1200g-eup";
+-
+-	aliases {
+-		led-boot = &led_status_green;
+-		led-failsafe = &led_status_red;
+-		led-running = &led_status_blue;
+-		led-upgrade = &led_status_green;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-			reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
+-			reset-delay-us = <5000>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_status_red: status_red {
+-			label = "red:status";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		led_status_green: status_green {
+-			label = "green:status";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		led_status_blue: status_blue {
+-			label = "blue:status";
+-			gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio53";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-
+-		mux_2 {
+-			pins = "gpio52";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition0@0 {
+-				label = "SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-
+-			partition1@40000 {
+-				label = "MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-
+-			partition2@60000 {
+-				label = "QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-
+-			partition3@c0000 {
+-				label = "CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition4@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition5@E0000 {
+-				label = "APPSBLENV";
+-				reg = <0x000e0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition6@F0000 {
+-				label = "APPSBL";
+-				reg = <0x000f0000 0x00080000>;
+-				read-only;
+-			};
+-
+-			partition7@170000 {
+-				label = "ART";
+-				reg = <0x00170000 0x00010000>;
+-				read-only;
+-
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				macaddr_art_0: macaddr@0 {
+-					reg = <0x0 0x6>;
+-				};
+-
+-				macaddr_art_6: macaddr@6 {
+-					reg = <0x6 0x6>;
+-				};
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-
+-			partition9@580000 {
+-				compatible = "denx,fit";
+-				label = "firmware";
+-				reg = <0x00180000 0x00e80000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-	nvmem-cells = <&macaddr_art_0>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-	label = "lan3";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-	label = "lan2";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "lan1";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-	label = "wan";
+-	nvmem-cells = <&macaddr_art_6>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&ethphy0 {
+-	status = "disabled";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "ezviz-cs-w3-wd1200g-eup";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "ezviz-cs-w3-wd1200g-eup";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-dap-2610.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-dap-2610.dts
+deleted file mode 100644
+index 493905d56d..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-dap-2610.dts
++++ /dev/null
+@@ -1,232 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "D-Link DAP 2610";
+-	compatible = "dlink,dap-2610";
+-
+-	aliases {
+-		led-boot = &led_red;
+-		led-failsafe = &led_red;
+-		led-running = &led_green;
+-		led-upgrade = &led_red;
+-	};
+-
+-	soc {
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_red: red {
+-			label = "red:power";
+-			gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		led_green: green {
+-			label = "green:power";
+-			gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-			compatible = "fixed-partitions";
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-			partition@40000 {
+-				label = "MIBIB";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-			partition@60000 {
+-				label = "QSEE";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-			};
+-			partition@c0000 {
+-				label = "CDT";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-			partition@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0xd0000 0x10000>;
+-				read-only;
+-			};
+-			partition@e0000 {
+-				label = "APPSBLENV";
+-				reg = <0xe0000 0x10000>;
+-				read-only;
+-			};
+-			partition@f0000 {
+-				label = "APPSBL";
+-				reg = <0xf0000 0x80000>;
+-				read-only;
+-			};
+-			partition@170000 {
+-				label = "ART";
+-				reg = <0x170000 0x10000>;
+-				read-only;
+-			};
+-			partition@180000 {
+-				compatible = "wrg";
+-				label = "firmware";
+-				reg = <0x180000 0xdc0000>;
+-			};
+-			partition@fb0000 {
+-				label = "rgbd";
+-				reg = <0xfb0000 0x10000>;
+-				read-only;
+-			};
+-			partition@fc0000 {
+-				label = "bdcfg";
+-				reg = <0xfc0000 0x10000>;
+-				read-only;
+-			};
+-			partition@fd0000 {
+-				label = "langpack";
+-				reg = <0xfd0000 0x20000>;
+-				read-only;
+-			};
+-			partition@ff0000 {
+-				label = "certificate";
+-				reg = <0xff0000 0x10000>;
+-				read-only;
+-			};
+-			partition@f40000 {
+-				label = "captival";
+-				reg = <0xf40000 0x70000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	label = "lan";
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		mux {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		mux_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "dlink,dap-2610";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "dlink,dap-2610";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ea6350v3.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ea6350v3.dts
+deleted file mode 100644
+index cd5b4c6ccc..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ea6350v3.dts
++++ /dev/null
+@@ -1,307 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "Linksys EA6350v3";
+-	compatible = "linksys,ea6350v3";
+-
+-	aliases {
+-		led-boot = &power;
+-		led-failsafe = &power;
+-		led-running = &power;
+-		led-upgrade = &power;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-
+-		wps {
+-			label = "wps";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		power: status {
+-			label = "green:status";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport1 {
+-	status = "okay";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-	qcom,ath10k-calibration-variant = "linksys-ea6350v3";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-	qcom,ath10k-calibration-variant = "linksys-ea6350v3";
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		mux {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		mux_cs {
+-			function = "gpio";
+-			pins = "gpio54", "gpio59";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp1_spi1 { /* BLSP1 QUP1 */
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
+-		   <&tlmm 59 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			SBL1@0 {
+-				label = "SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-			MBIB@40000 {
+-				label = "MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-			QSEE@60000 {
+-				label = "QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-			CDT@c0000 {
+-				label = "CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-			APPSBLENV@d0000 {
+-				label = "APPSBLENV";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-			APPSBL@e0000 {
+-				label = "APPSBL"; /* uboot */
+-				reg = <0x000e0000 0x00080000>;
+-				read-only;
+-			};
+-			ART@160000 {
+-				label = "ART";
+-				reg = <0x00160000 0x00010000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-			u_env@170000 {
+-				label = "u_env";
+-				reg = <0x00170000 0x00020000>;
+-			};
+-			s_env@190000 {
+-				label = "s_env";
+-				reg = <0x00190000 0x00020000>;
+-			};
+-			devinfo@1b0000 {
+-				label = "devinfo";
+-				reg = <0x001b0000 0x00010000>;
+-			};
+-			/* 0x001c0000 - 0x00200000 unused */
+-		};
+-	};
+-
+-	flash@1 {
+-		status = "okay";
+-		compatible = "spi-nand";
+-		reg = <1>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			kernel@0 {
+-				label = "kernel";
+-				reg = <0x00000000 0x02800000>;
+-			};
+-			rootfs@500000 {
+-				label = "rootfs";
+-				reg = <0x00500000 0x02300000>;
+-			};
+-			alt_kernel@2800000 {
+-				label = "alt_kernel";
+-				reg = <0x02800000 0x02800000>;
+-			};
+-			alt_rootfs@2d00000 {
+-				label = "alt_rootfs";
+-				reg = <0x02d00000 0x02300000>;
+-			};
+-			sysdiag@5000000 {
+-				label = "sysdiag";
+-				reg = <0x05000000 0x00100000>;
+-			};
+-			syscfg@5100000 {
+-				label = "syscfg";
+-				reg = <0x05100000 0x02F00000>;
+-			};
+-			/* 0x00000000 - 0x08000000: 128 MiB */
+-		};
+-	};
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-eap1300.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-eap1300.dts
+deleted file mode 100644
+index a8f24aa00e..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-eap1300.dts
++++ /dev/null
+@@ -1,230 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "EnGenius EAP1300";
+-	compatible = "engenius,eap1300";
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	aliases {
+-		led-boot = &power;
+-		led-failsafe = &power;
+-		led-running = &power;
+-		led-upgrade = &power;
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		power: orange {
+-			label = "orange:power";
+-			gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		lan {
+-			label = "blue:lan";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		mesh {
+-			label = "blue:mesh";
+-			gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan2g {
+-			label = "blue:wlan2g";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan5g {
+-			label = "yellow:wlan5g";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio54", "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	m25p80@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-			partition1@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-			partition2@60000 {
+-				label = "0:QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-			partition3@c0000 {
+-				label = "0:CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-			partition4@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-			partition5@e0000 {
+-				label = "0:APPSBLENV";
+-				reg = <0x000e0000 0x00010000>;
+-				read-only;
+-			};
+-			partition6@f0000 {
+-				label = "0:APPSBL";
+-				reg = <0x000f0000 0x00090000>;
+-				read-only;
+-			};
+-			partition7@180000 {
+-				label = "0:ART";
+-				reg = <0x00180000 0x00010000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-			partition8@190000 {
+-				compatible = "denx,fit";
+-				label = "firmware";
+-				reg = <0x190000 0x1dc0000>;
+-			};
+-			partition9@1f50000 {
+-				label = "u-boot-env";
+-				reg = <0x01f50000 0x00010000>;
+-			};
+-			partition10@1f60000 {
+-				label = "userconfig";
+-				reg = <0x01f60000 0x000a0000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-	qcom,ath10k-calibration-variant = "EnGenius-EAP1300";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-	qcom,ath10k-calibration-variant = "EnGenius-EAP1300";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts
+deleted file mode 100644
+index e3e1785e1f..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts
++++ /dev/null
+@@ -1,339 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "Edgecore ECW5211";
+-	compatible = "edgecore,ecw5211";
+-
+-	aliases {
+-		led-boot = &led_power;
+-		led-failsafe = &led_power;
+-		led-running = &led_power;
+-		led-upgrade = &led_power;
+-		ethernet0 = &swport5;
+-		ethernet1 = &gmac;
+-	};
+-
+-	chosen {
+-		bootargs-append = " root=/dev/ubiblock0_1";
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_power: power {
+-			label = "yellow:power";
+-			gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		wlan2g {
+-			label = "green:wlan2g";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		wlan5g {
+-			label = "green:wlan5g";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy1tpt";
+-		};
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		counter@4a1000 {
+-			compatible = "qcom,qca-gcnt";
+-			reg = <0x4a1000 0x4>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-
+-			dwc3@8a00000 {
+-				phys = <&usb3_hs_phy>;
+-				phy-names = "usb2-phy";
+-			};
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio_pinmux {
+-		mux_mdio {
+-			pins = "gpio53";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-
+-		mux_mdc {
+-			pins = "gpio52";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi0_pins: spi0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <2>;
+-			bias-disable;
+-		};
+-
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio54", "gpio4";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	i2c0_pins: i2c0_pinmux {
+-		mux_i2c {
+-			function = "blsp_i2c0";
+-			pins = "gpio58", "gpio59";
+-			drive-strength = <16>;
+-			bias-disable;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&spi0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 4 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "0:QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-
+-			partition@c0000 {
+-				label = "0:CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "0:APPSBLENV"; /* uboot env */
+-				reg = <0x000e0000 0x00010000>;
+-			};
+-
+-			partition@f0000 {
+-				label = "0:APPSBL"; /* uboot */
+-				reg = <0x000f0000 0x00080000>;
+-				read-only;
+-			};
+-
+-			partition@170000 {
+-				label = "0:ART";
+-				reg = <0x00170000 0x00010000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-		};
+-	};
+-
+-	flash@1 {
+-		compatible = "spi-nand";
+-		reg = <1>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "rootfs";
+-				reg = <0x00000000 0x04000000>;
+-			};
+-
+-			partition@1 {
+-				label = "rootfs1";
+-				reg = <0x00000000 0x04000000>;
+-			};
+-
+-			partition@4000000 {
+-				label = "rootfs2";
+-				reg = <0x04000000 0x04000000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_i2c3 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&i2c0_pins>;
+-	pinctrl-names = "default";
+-
+-	tpm@29 {
+-		compatible = "atmel,at97sc3204t";
+-		reg = <0x29>;
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-	qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-emd1.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-emd1.dts
+deleted file mode 100644
+index 396595ba51..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-emd1.dts
++++ /dev/null
+@@ -1,210 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "EnGenius EMD1";
+-	compatible = "engenius,emd1";
+-
+-	aliases {
+-		led-boot = &led_power;
+-		led-failsafe = &led_power;
+-		led-running = &led_power;
+-		led-upgrade = &led_power;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_power: power {
+-			label = "white:power";
+-			gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		wlan2g {
+-			label = "red:wlan2g";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		wlan5g {
+-			label = "blue:wlan5g";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy1tpt";
+-		};
+-
+-		mesh {
+-			label = "orange:mesh";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio54", "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition0@0 {
+-				label = "0:SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-			partition1@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-			partition2@60000 {
+-				label = "0:QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-			partition3@c0000 {
+-				label = "0:CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-			partition4@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-			partition5@e0000 {
+-				label = "0:APPSBLENV";
+-				reg = <0x000e0000 0x00010000>;
+-				read-only;
+-			};
+-			partition6@f0000 {
+-				label = "0:APPSBL";
+-				reg = <0x000f0000 0x00080000>;
+-				read-only;
+-			};
+-			partition7@170000 {
+-				label = "0:ART";
+-				reg = <0x00170000 0x00010000>;
+-				read-only;
+-			};
+-			partition8@180000 {
+-				label = "userconfig";
+-				reg = <0x00180000 0x00080000>;
+-				read-only;
+-			};
+-			partition9@200000 {
+-				compatible = "denx,fit";
+-				label = "firmware";
+-				reg = <0x200000 0x01e00000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "EnGenius-EMD1";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "EnGenius-EMD1";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-emr3500.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-emr3500.dts
+deleted file mode 100644
+index 3616149451..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-emr3500.dts
++++ /dev/null
+@@ -1,215 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "EnGenius EMR3500";
+-	compatible = "engenius,emr3500";
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2_hs_phy: hsphy@a8000 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	aliases {
+-		led-boot = &power;
+-		led-failsafe = &power;
+-		led-running = &power;
+-		led-upgrade = &power;
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		power: white {
+-			label = "white:power";
+-			gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		blue {
+-			label = "blue";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		red {
+-			label = "red";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		orange {
+-			label = "orange";
+-			gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio54", "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	m25p80@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-			partition@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-			partition@60000 {
+-				label = "0:QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-			partition@c0000 {
+-				label = "0:CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-			partition@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-			partition@e0000 {
+-				label = "0:APPSBLENV";
+-				reg = <0x000e0000 0x00010000>;
+-				read-only;
+-			};
+-			partition@f0000 {
+-				label = "0:APPSBL";
+-				reg = <0x000f0000 0x00080000>;
+-				read-only;
+-			};
+-			partition@170000 {
+-				label = "0:ART";
+-				reg = <0x00170000 0x00010000>;
+-				read-only;
+-			};
+-			partition@180000 {
+-				label = "userconfig";
+-				reg = <0x00180000 0x00080000>;
+-				read-only;
+-			};
+-			partition@200000 {
+-				compatible = "denx,fit";
+-				label = "firmware";
+-				reg = <0x200000 0x1e00000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "EnGenius-EMR3500";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "EnGenius-EMR3500";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ens620ext.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ens620ext.dts
+deleted file mode 100644
+index 69275e24b8..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ens620ext.dts
++++ /dev/null
+@@ -1,249 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "EnGenius ENS620EXT";
+-	compatible = "engenius,ens620ext";
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x10000000>;
+-	};
+-
+-	aliases {
+-		led-boot = &power;
+-		led-failsafe = &power;
+-		led-running = &power;
+-		led-upgrade = &power;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-
+-		/*
+-		 * Disable the broken restart as a workaround for the buggy
+-		 * 3.0.0/3.0.1 U-boots that ship with the device.
+-		 * Note: The watchdog is now used to restart this device.
+-		 */
+-		restart@4ab000 {
+-			status = "disabled";
+-		};
+-	};
+-
+-	buttons {
+-		compatible = "gpio-keys";
+-
+-		wps {
+-			label = "wps";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		power: power {
+-			label = "amber:power";
+-			gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		lan1 {
+-			label = "green:lan1";
+-			gpios = <&tlmm 1 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		lan2 {
+-			label = "green:lan2";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		wlan2g {
+-			label = "green:wlan2g";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan5g {
+-			label = "green:wlan5g";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		mux {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		mux_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp1_spi1 { /* BLSP1 QUP1 */
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <50000000>;
+-		m25p,fast-read;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-			partition@40000 {
+-				label = "MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-			partition@60000 {
+-				label = "QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-			partition@c0000 {
+-				label = "CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-			partition@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-			partition@e0000 {
+-				label = "APPSBLENV"; /* uboot env*/
+-				reg = <0x000e0000 0x00010000>;
+-				read-only;
+-			};
+-			partition@f0000 {
+-				label = "APPSBL"; /* uboot */
+-				reg = <0x000f0000 0x00090000>;
+-				read-only;
+-			};
+-			partition@180000 {
+-				label = "ART";
+-				reg = <0x00180000 0x00010000>;
+-				read-only;
+-			};
+-			partition@190000 {
+-				compatible = "denx,fit";
+-				label = "firmware";
+-				reg = <0x00190000 0x14d0000>;
+-			};
+-			partition@1660000 {
+-				label = "failsafe";
+-				reg = <0x01660000 0x008F0000>;
+-				read-only;
+-			};
+-			partition@1f50000 {
+-				label = "u-boot-env";
+-				reg = <0x01f50000 0x00010000>;
+-				read-only;
+-			};
+-			partition@1f60000 {
+-				label = "userconfig";
+-				reg = <0x01f60000 0x000a0000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "EnGenius-ENS620EXT";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "EnGenius-ENS620EXT";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex6100v2.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex6100v2.dts
+deleted file mode 100644
+index 1495c64da9..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex6100v2.dts
++++ /dev/null
+@@ -1,31 +0,0 @@
+-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+- * Copyright (c) 2018, David Bauer <mail@david-bauer.net>
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- *
+- */
+-
+-#include "qcom-ipq4018-ex61x0v2.dtsi"
+-
+-/ {
+-	model = "Netgear EX6100v2";
+-	compatible = "netgear,ex6100v2";
+-};
+-
+-&wifi0 {
+-	qcom,ath10k-calibration-variant = "Netgear-EX6100v2";
+-};
+-
+-&wifi1 {
+-	qcom,ath10k-calibration-variant = "Netgear-EX6100v2";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex6150v2.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex6150v2.dts
+deleted file mode 100644
+index ce24466e54..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex6150v2.dts
++++ /dev/null
+@@ -1,31 +0,0 @@
+-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+- * Copyright (c) 2018, David Bauer <mail@david-bauer.net>
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- *
+- */
+-
+-#include "qcom-ipq4018-ex61x0v2.dtsi"
+-
+-/ {
+-	model = "Netgear EX6150v2";
+-	compatible = "netgear,ex6150v2";
+-};
+-
+-&wifi0 {
+-	qcom,ath10k-calibration-variant = "Netgear-EX6150v2";
+-};
+-
+-&wifi1 {
+-	qcom,ath10k-calibration-variant = "Netgear-EX6150v2";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi
+deleted file mode 100644
+index dc5c25c84a..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi
++++ /dev/null
+@@ -1,339 +0,0 @@
+-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+- * Copyright (c) 2018, David Bauer <mail@david-bauer.net>
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- *
+- */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "Netgear EX61X0v2";
+-	compatible = "netgear,ex61x0v2";
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	aliases {
+-		led-boot = &power_amber;
+-		led-failsafe = &power_amber;
+-		led-running = &power_green;
+-		led-upgrade = &power_amber;
+-		label-mac-device = &gmac;
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		wps {
+-			label = "wps";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	led_spi {
+-		compatible = "spi-gpio";
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+-		sck-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
+-		mosi-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
+-		num-chipselects = <0>;
+-
+-		led_gpio: led_gpio@0 {
+-			compatible = "fairchild,74hc595";
+-			reg = <0>;
+-			gpio-controller;
+-			#gpio-cells = <2>;
+-			registers-number = <1>;
+-			spi-max-frequency = <1000000>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		power_amber: power_amber {
+-			label = "amber:power";
+-			gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		power_green: power_green {
+-			label = "green:power";
+-			gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		right {
+-			label = "blue:right";
+-			gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		left {
+-			label = "blue:left";
+-			gpios = <&led_gpio 4 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		client_green {
+-			label = "green:client";
+-			gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		client_red {
+-			label = "red:client";
+-			gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		router_green {
+-			label = "green:router";
+-			gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		router_red {
+-			label = "red:router";
+-			gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		wps {
+-			label = "green:wps";
+-			gpios = <&tlmm 1 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	mx25l12805d@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <45000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition0@0 {
+-				label = "SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-
+-			partition1@40000 {
+-				label = "MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-
+-			partition2@60000 {
+-				label = "QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-
+-			partition3@c0000 {
+-				label = "CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition4@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition5@E0000 {
+-				label = "APPSBLENV";
+-				reg = <0x000e0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition6@F0000 {
+-				label = "APPSBL";
+-				reg = <0x000f0000 0x00080000>;
+-				read-only;
+-			};
+-
+-			partition7@170000 {
+-				label = "ART";
+-				reg = <0x00170000 0x00010000>;
+-				compatible = "nvmem-cells";
+-				read-only;
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-
+-			partition8@180000 {
+-				label = "config";
+-				reg = <0x00180000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition9@190000 {
+-				label = "pot";
+-				reg = <0x00190000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition10@1a0000 {
+-				compatible = "nvmem-cells";
+-				label = "dnidata";
+-				reg = <0x001a0000 0x00010000>;
+-				read-only;
+-
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				macaddr_dnidata_0: macaddr@0 {
+-					reg = <0x0 0x6>;
+-				};
+-
+-				macaddr_dnidata_c: macaddr@c {
+-					reg = <0xc 0x6>;
+-				};
+-			};
+-
+-			partition11@1b0000 {
+-				compatible = "denx,fit";
+-				label = "firmware";
+-				reg = <0x001b0000 0x00e10000>;
+-			};
+-
+-			partition12@fc0000 {
+-				label = "language";
+-				reg = <0x00fc0000 0x00040000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_1000>, <&macaddr_dnidata_0>;
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_5000>, <&macaddr_dnidata_c>;
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "lan";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-fritzbox-4040.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-fritzbox-4040.dts
+deleted file mode 100644
+index e448206c36..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-fritzbox-4040.dts
++++ /dev/null
+@@ -1,324 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "AVM FRITZ!Box 4040";
+-	compatible = "avm,fritzbox-4040";
+-
+-	aliases {
+-		led-boot = &power;
+-		led-failsafe = &flash;
+-		led-running = &power;
+-		led-upgrade = &flash;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		wlan {
+-			label = "wlan";
+-			gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RFKILL>;
+-		};
+-
+-		wps {
+-			label = "wps";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-	};
+-
+-	switch-leds {
+-		compatible = "gpio-leds";
+-
+-		wlan {
+-			label = "green:wlan";
+-			gpios = <&ethphy0 0 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		panic: info_red {
+-			label = "red:info";
+-			gpios = <&ethphy0 1 GPIO_ACTIVE_HIGH>;
+-			panic-indicator;
+-		};
+-
+-		wan {
+-			label = "green:wan";
+-			gpios = <&ethphy1 0 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		power: power {
+-			label = "green:power";
+-			gpios = <&ethphy2 1 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		lan {
+-			label = "green:lan";
+-			gpios = <&ethphy3 0 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		flash: info_amber {
+-			label = "amber:info";
+-			gpios = <&ethphy3 1 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		mux {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		mux_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 { /* BLSP1 QUP1 */
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-		status = "okay";
+-		m25p,fast-read;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition0@0 {
+-				label = "SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-			partition1@40000 {
+-				label = "MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-			partition2@60000 {
+-				label = "QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-			partition3@c0000 {
+-				label = "CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-			partition4@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-			partition5@e0000 {
+-				label = "APPSBLENV"; /* uboot env - empty */
+-				reg = <0x000e0000 0x00010000>;
+-				read-only;
+-			};
+-			partition6@f0000 {
+-				label = "urlader"; /* APPSBL */
+-				reg = <0x000f0000 0x0002dc000>;
+-				read-only;
+-			};
+-			partition7@11dc00 {
+-				/* make a backup of this partition! */
+-				label = "urlader_config";
+-				reg = <0x0011dc00 0x00002400>;
+-				read-only;
+-			};
+-			partition8@120000 {
+-				label = "tffs1";
+-				reg = <0x00120000 0x00080000>;
+-				read-only;
+-			};
+-			partition9@1a0000 {
+-				label = "tffs2";
+-				reg = <0x001a0000 0x00080000>;
+-				read-only;
+-			};
+-			partition10@220000 {
+-				label = "uboot";
+-				reg = <0x00220000 0x00080000>;
+-				read-only;
+-			};
+-			partition11@2A0000 {
+-				compatible = "denx,fit";
+-				label = "firmware";
+-				reg = <0x002a0000 0x01c60000>;
+-			};
+-			partition12@1f00000 {
+-				label = "jffs2";
+-				reg = <0x01f00000 0x00100000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&ethphy0 {
+-	gpio-controller;
+-	#gpio-cells = <2>;
+-};
+-
+-&ethphy1 {
+-	gpio-controller;
+-	#gpio-cells = <2>;
+-
+-	enable-usb-power {
+-		gpio-hog;
+-		line-name = "enable USB3 power";
+-		gpios = <1 GPIO_ACTIVE_HIGH>;
+-		output-high;
+-	};
+-};
+-
+-&ethphy2 {
+-	gpio-controller;
+-	#gpio-cells = <2>;
+-};
+-
+-&ethphy3 {
+-	gpio-controller;
+-	#gpio-cells = <2>;
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport1 {
+-	status = "okay";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "AVM-FRITZBox-4040";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "AVM-FRITZBox-4040";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-a1300.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-a1300.dts
+deleted file mode 100644
+index ad3d1ac120..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-a1300.dts
++++ /dev/null
+@@ -1,334 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "GL.iNet GL-A1300";
+-	compatible = "glinet,gl-a1300", "qcom,ipq4019";
+-
+-	aliases {
+-		led-boot = &led_run;
+-		led-failsafe = &led_run;
+-		led-running = &led_run;
+-		led-upgrade = &led_run;
+-		label-mac-device = &swport4;
+-	};
+-
+-	chosen {
+-		bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
+-	};
+-
+-	soc {
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-
+-		switch {
+-			label = "switch-button";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_SETUP>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_run: blue {
+-			label = "blue:status";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		white {
+-			label = "white:status";
+-			gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-
+-	gpio_export {
+-		compatible = "gpio-export";
+-
+-		usb {
+-			gpio-export,name = "usb_power";
+-			gpio-export,output = <1>;
+-			gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&watchdog {
+-	status = "okay";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&spi0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 5 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-
+-			partition@c0000 {
+-				label = "CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "APPSBLENV"; /* uboot env*/
+-				reg = <0x000e0000 0x00010000>;
+-			};
+-
+-			partition@f0000 {
+-				label = "APPSBL"; /* uboot */
+-				reg = <0x000f0000 0x00080000>;
+-				read-only;
+-			};
+-
+-			partition@170000 {
+-				label = "ART";
+-				reg = <0x00170000 0x00010000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-
+-				macaddr_gmac0: macaddr@0 {
+-					reg = <0x0 0x6>;
+-				};
+-
+-				macaddr_gmac1: macaddr@6 {
+-					reg = <0x6 0x6>;
+-				};
+-			};
+-
+-			partition@180000 {
+-				label = "log";
+-				reg = <0x00180000 0x00020000>;
+-			};
+-		};
+-	};
+-
+-	spi-nand@1 {
+-		compatible = "spi-nand";
+-		reg = <1>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "ubi";
+-				reg = <0x00000000 0x08000000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	i2c_0_pins: i2c_0_pinmux {
+-		pinmux {
+-			pins = "gpio58", "gpio59";
+-			function = "blsp_i2c0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi0_pins: spi0_pinmux {
+-		mux_spi {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		mux_cs {
+-			function = "gpio";
+-			pins = "gpio54", "gpio5";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp1_i2c3 {
+-	status = "okay";
+-	pinctrl-0 = <&i2c_0_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&usb2 {
+-	status = "okay";
+-};
+-
+-&usb3 {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-
+-	label = "lan2";
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac0>;
+-	mac-address-increment = <2>;
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan1";
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac0>;
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac1>;
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-	qcom,ath10k-calibration-variant = "GL-A1300";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-	qcom,ath10k-calibration-variant = "GL-A1300";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-ap1300.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-ap1300.dts
+deleted file mode 100644
+index 6f5d4d8a57..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-ap1300.dts
++++ /dev/null
+@@ -1,302 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "GL.iNet GL-AP1300";
+-	compatible = "glinet,gl-ap1300";
+-
+-	aliases {
+-		led-boot = &led_power;
+-		led-failsafe = &led_power;
+-		led-running = &led_power;
+-		led-upgrade = &led_power;
+-	};
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x10000000>;
+-	};
+-
+-	chosen {
+-		bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_power: power {
+-			label = "white:power";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+-			default-state = "on";
+-		};
+-
+-		wan {
+-			label = "white:wan";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&spi0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 5 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		status = "okay";
+-
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-
+-			partition@c0000 {
+-				label = "CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "APPSBLENV"; /* uboot env*/
+-				reg = <0x000e0000 0x00010000>;
+-			};
+-
+-			partition@f0000 {
+-				label = "APPSBL"; /* uboot */
+-				reg = <0x000f0000 0x00080000>;
+-				read-only;
+-			};
+-
+-			partition@170000 {
+-				label = "ART";
+-				reg = <0x00170000 0x00010000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				macaddr_art_0: mac-address@0 {
+-					reg = <0x0 0x6>;
+-				};
+-
+-				macaddr_art_6: mac-address@6 {
+-					reg = <0x6 0x6>;
+-				};
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-		};
+-	};
+-
+-	spi-nand@1 {
+-		status = "okay";
+-
+-		compatible = "spi-nand";
+-		reg = <1>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "ubi";
+-				reg = <0x00000000 0x08000000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi0_pins: spi0_pinmux {
+-		mux_spi {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		mux_cs {
+-			function = "gpio";
+-			pins = "gpio54", "gpio5";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "lan";
+-
+-	nvmem-cells = <&macaddr_art_0>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-	label = "wan";
+-
+-	nvmem-cells = <&macaddr_art_6>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-	qcom,ath10k-calibration-variant = "GL-AP1300";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-	qcom,ath10k-calibration-variant = "GL-AP1300";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-hap-ac2.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-hap-ac2.dts
+deleted file mode 100644
+index c8868d8b30..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-hap-ac2.dts
++++ /dev/null
+@@ -1,296 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2020, Robert Marko <robimarko@gmail.com> */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "MikroTik hAP ac2";
+-	compatible = "mikrotik,hap-ac2";
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x08000000>;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-	};
+-
+-	aliases {
+-		led-boot = &led_user;
+-		led-failsafe = &led_user;
+-		led-running = &led_user;
+-		led-upgrade = &led_user;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		counter@4a1000 {
+-			compatible = "qcom,qca-gcnt";
+-			reg = <0x4a1000 0x4>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-
+-			dwc3@8a00000 {
+-				phys = <&usb3_hs_phy>;
+-				phy-names = "usb2-phy";
+-			};
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-
+-		mode {
+-			label = "mode";
+-			gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RFKILL>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		power {
+-			label = "green:power";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+-			default-state = "keep";
+-			panic-indicator;
+-		};
+-
+-		led_user: user {
+-			label = "green:user";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <2>;
+-			bias-disable;
+-		};
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	enable-usb-power {
+-		gpio-hog;
+-		gpios = <2 GPIO_ACTIVE_HIGH>;
+-		output-high;
+-		line-name = "enable USB power";
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <40000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "Qualcomm";
+-				reg = <0x0 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@80000 {
+-				compatible = "mikrotik,routerboot-partitions";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-				label = "RouterBoot";
+-				reg = <0x80000 0x80000>;
+-
+-				hard_config {
+-					read-only;
+-					size = <0x2000>;
+-				};
+-
+-				dtb_config {
+-					read-only;
+-				};
+-
+-				soft_config {
+-				};
+-			};
+-
+-			partition@100000 {
+-				compatible = "mikrotik,minor";
+-				label = "firmware";
+-				reg = <0x100000 0xf00000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-};
+-
+-&ethphy0 {
+-	qcom,single-led-1000;
+-	qcom,single-led-100;
+-	qcom,single-led-10;
+-};
+-
+-&ethphy1 {
+-	qcom,single-led-1000;
+-	qcom,single-led-100;
+-	qcom,single-led-10;
+-};
+-
+-&ethphy2 {
+-	qcom,single-led-1000;
+-	qcom,single-led-100;
+-	qcom,single-led-10;
+-};
+-
+-&ethphy3 {
+-	qcom,single-led-1000;
+-	qcom,single-led-100;
+-	qcom,single-led-10;
+-};
+-
+-&ethphy4 {
+-	qcom,single-led-1000;
+-	qcom,single-led-100;
+-	qcom,single-led-10;
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport1 {
+-	status = "okay";
+-	label = "lan4";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-	label = "lan3";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-	label = "lan2";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "lan1";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-
+-	qcom,ath10k-calibration-variant = "MikroTik-hAP-ac2";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-
+-	qcom,ath10k-calibration-variant = "MikroTik-hAP-ac2";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts
+deleted file mode 100644
+index 988b86b68d..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts
++++ /dev/null
+@@ -1,9 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-// Copyright (c) 2018, Robert Marko <robimarko@gmail.com>
+-
+-#include "qcom-ipq4018-jalapeno.dtsi"
+-
+-/ {
+-	model = "8devices Jalapeno";
+-	compatible = "8dev,jalapeno";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi
+deleted file mode 100644
+index 4d09e86dd6..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi
++++ /dev/null
+@@ -1,276 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-// Copyright (c) 2018, Robert Marko <robimarko@gmail.com>
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	aliases {
+-		ethernet1 = &swport5;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-		};
+-
+-		counter@4a1000 {
+-			compatible = "qcom,qca-gcnt";
+-			reg = <0x4a1000 0x4>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			status = "okay";
+-
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2: usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		usb3: usb3@8af8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio_pinmux {
+-		pinmux_1 {
+-			pins = "gpio53";
+-			function = "mdio";
+-		};
+-
+-		pinmux_2 {
+-			pins = "gpio52";
+-			function = "mdc";
+-		};
+-
+-		pinconf {
+-			pins = "gpio52", "gpio53";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <2>;
+-			bias-disable;
+-		};
+-
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio54", "gpio59";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		status = "okay";
+-
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-
+-			partition@c0000 {
+-				label = "CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "APPSBLENV"; /* uboot env*/
+-				reg = <0x000e0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition@f0000 {
+-				label = "APPSBL"; /* uboot */
+-				reg = <0x000f0000 0x00080000>;
+-				read-only;
+-			};
+-
+-			partition@170000 {
+-				label = "ART";
+-				reg = <0x00170000 0x00010000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-		};
+-	};
+-
+-	spi-nand@1 {
+-		status = "okay";
+-
+-		compatible = "spi-nand";
+-		reg = <1>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "ubi";
+-				reg = <0x00000000 0x08000000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-	qcom,ath10k-calibration-variant = "8devices-Jalapeno";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-	qcom,ath10k-calibration-variant = "8devices-Jalapeno";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-magic-2-wifi-next.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-magic-2-wifi-next.dts
+deleted file mode 100644
+index 29d51aa9e1..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-magic-2-wifi-next.dts
++++ /dev/null
+@@ -1,233 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-
+-/ {
+-	model = "devolo Magic 2 WiFi next";
+-	compatible = "devolo,magic-2-wifi-next";
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x10000000>;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-			reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
+-			reset-delay-us = <2000>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-
+-		gpio_export {
+-			compatible = "gpio-export";
+-			#size-cells = <0>;
+-
+-			plc {
+-				gpio-export,name = "plc-enable";
+-				gpio-export,output = <1>;
+-				gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
+-			};
+-		};
+-
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		wlan {
+-			label = "WLAN";
+-			gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-
+-		reset {
+-			label = "Reset";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		status_dlan {
+-			label = "white:dlan";
+-			gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
+-			default-state = "keep";
+-		};
+-
+-		status_wlan {
+-			label = "white:wlan";
+-			gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
+-			default-state = "keep";
+-		};
+-
+-		error_dlan {
+-			label = "red:dlan";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-			default-state = "keep";
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	spi_0_pins: spi_0_pinmux {
+-		mux {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		mux_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio53";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-		mux_2 {
+-			pins = "gpio52";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio61", "gpio60";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	button_pins: button_pinmux {
+-		mux {
+-			function = "gpio";
+-			pins = "gpio0", "gpio5";
+-			bias-disable;
+-			input;
+-		};
+-	};
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&ethphy0 {
+-	status = "disabled";
+-};
+-
+-&ethphy1 {
+-	status = "disabled";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "devolo,magic-2-wifi-next";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "devolo,magic-2-wifi-next";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		linux,modalias = "n25q128a11";
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-			partition@40000 {
+-				label = "MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-			partition@60000 {
+-				label = "QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-			partition@c0000 {
+-				label = "CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-			partition@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-			partition@e0000 {
+-				label = "APPSBLENV"; /* uboot env*/
+-				reg = <0x000e0000 0x00010000>;
+-			};
+-			partition@f0000 {
+-				label = "APPSBL"; /* uboot */
+-				reg = <0x000f0000 0x00080000>;
+-				read-only;
+-			};
+-			partition@170000 {
+-				label = "ART";
+-				reg = <0x00170000 0x00010000>;
+-				read-only;
+-			};
+-			firmware@180000 {
+-				compatible = "denx,fit";
+-				label = "firmware";
+-				reg = <0x00180000 0x01a80000>;
+-			};
+-		};
+-	};
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-meshpoint-one.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-meshpoint-one.dts
+deleted file mode 100644
+index 62ba76802d..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-meshpoint-one.dts
++++ /dev/null
+@@ -1,81 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2019, CRISIS INNOVATION LAB d.o.o.
+- * Author: Robert Marko <robert@meshpoint.me>
+- */
+-
+-#include "qcom-ipq4018-jalapeno.dtsi"
+-
+-/ {
+-	model = "Crisis Innovation Lab MeshPoint.One";
+-	compatible = "cilab,meshpoint-one";
+-
+-	aliases {
+-		led-boot = &led_status;
+-		led-failsafe = &led_status;
+-		led-running = &led_status;
+-		led-upgrade = &led_status;
+-	};
+-
+-	soc {
+-		i2c-gpio {
+-			status = "okay";
+-
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-
+-			compatible = "i2c-gpio";
+-			gpios = <&tlmm 0 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* sda */
+-					 &tlmm 4 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* scl */
+-					>;
+-
+-			bme280@76 {
+-				status = "okay";
+-
+-				compatible = "bosch,bme280";
+-				reg = <0x76>;
+-			};
+-
+-			pcf2129@51 {
+-				status = "okay";
+-
+-				compatible = "nxp,pcf2129";
+-				reg = <0x51>;
+-			};
+-
+-			ina230@40 {
+-				status = "okay";
+-
+-				compatible = "ti,ina230";
+-				reg = <0x40>;
+-				shunt-resistor = <2000>;
+-			};
+-
+-			ina230@44 {
+-				status = "okay";
+-
+-				compatible = "ti,ina230";
+-				reg = <0x44>;
+-				shunt-resistor = <2000>;
+-			};
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART >;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_status: status {
+-			label = "blue:status";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-mf287plus.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-mf287plus.dts
+deleted file mode 100644
+index 6c285f4b8a..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-mf287plus.dts
++++ /dev/null
+@@ -1,384 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-// Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
+-// Copyright (c) 2022, Giammarco Marzano <stich86@gmail.com>.
+-// Copyright (c) 2023, Andreas Böhler <dev@aboehler.at>
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/leds/common.h>
+-
+-/ {
+-	model = "ZTE MF287Plus";
+-	compatible = "zte,mf287plus";
+-
+-	aliases {
+-		led-boot = &led_status;
+-		led-failsafe = &led_status;
+-		led-running = &led_status;
+-		led-upgrade = &led_status;
+-	};
+-
+-	chosen {
+-		/*
+-		 * bootargs forced by u-boot bootipq command:
+-		 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
+-		 */
+-		bootargs-append = " root=/dev/ubiblock0_1";
+-	};
+-
+-	/*
+-	 * This node is used to restart modem module to avoid anomalous
+-	 * behaviours on initial communication.
+-	 */
+-	gpio-restart {
+-		compatible = "gpio-restart";
+-		gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_status: led-0 {
+-			label = "blue:power";
+-			function = LED_FUNCTION_POWER;
+-			color = <LED_COLOR_ID_BLUE>;
+-			gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		key-reset {
+-			label = "reset";
+-			linux,code = <KEY_RESTART>;
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		key-wps {
+-			label = "wps";
+-			linux,code = <KEY_WPS_BUTTON>;
+-			gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-	};
+-};
+-
+-&mdio {
+-	status = "okay";
+-};
+-
+-&watchdog {
+-	status = "okay";
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&usb2 {
+-	status = "okay";
+-};
+-
+-&usb3 {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
+-		   <&tlmm 59 GPIO_ACTIVE_HIGH>,
+-		   <&tlmm 1 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:SBL1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "0:QSEE";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-			};
+-
+-			partition@c0000 {
+-				label = "0:CDT";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0xd0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "0:APPSBLENV";
+-				reg = <0xe0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@f0000 {
+-				label = "0:APPSBL";
+-				reg = <0xf0000 0xc0000>;
+-				read-only;
+-			};
+-
+-			partition@1b0000 {
+-				label = "0:reserved1";
+-				reg = <0x1b0000 0x50000>;
+-				read-only;
+-			};
+-		};
+-	};
+-
+-	spi-nand@1 { /* flash@1 ? */
+-		compatible = "spi-nand";
+-		reg = <1>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "fota-flag";
+-				reg = <0x0 0x140000>;
+-				read-only;
+-			};
+-
+-			partition@140000 {
+-				label = "ART";
+-				reg = <0x140000 0x140000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-
+-			partition@280000 {
+-				label = "mac";
+-				reg = <0x280000 0x140000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				macaddr_mac_0: macaddr@0 {
+-					reg = <0x0 0x6>;
+-				};
+-			};
+-
+-			partition@3c0000 {
+-				label = "cfg-param";
+-				reg = <0x3c0000 0x600000>;
+-				read-only;
+-			};
+-
+-			partition@9c0000 {
+-				label = "oops";
+-				reg = <0x9c0000 0x140000>;
+-			};
+-
+-			partition@b00000 {
+-				label = "web";
+-				reg = <0xb00000 0x800000>;
+-			};
+-
+-			partition@1300000 {
+-				label = "rootfs";
+-				reg = <0x1300000 0x2200000>;
+-			};
+-
+-			partition@3500000 {
+-				label = "data";
+-				reg = <0x3500000 0x1900000>;
+-			};
+-
+-			partition@4e00000 {
+-				label = "fota";
+-				reg = <0x4e00000 0x3200000>;
+-			};
+-		};
+-	};
+-
+-	zigbee@2 {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+-		compatible = "silabs,em3581";
+-		reg = <2>;
+-		spi-max-frequency = <12000000>;
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_mac_0>;
+-	mac-address-increment = <2>;
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-
+-	label = "lan1";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-
+-	label = "lan2";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan3";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	label = "lan4";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio54", "gpio59", "gpio1";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_1000>, <&macaddr_mac_0>;
+-	qcom,ath10k-calibration-variant = "zte,mf287plus";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_5000>, <&macaddr_mac_0>;
+-	mac-address-increment = <1>;
+-	qcom,ath10k-calibration-variant = "zte,mf287plus";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-nbg6617.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-nbg6617.dts
+deleted file mode 100644
+index ff7252d696..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-nbg6617.dts
++++ /dev/null
+@@ -1,361 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/input/linux-event-codes.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "ZyXEL NBG6617";
+-	compatible = "zyxel,nbg6617";
+-
+-	chosen {
+-		/*
+-		 * the vendor u-boot adds root and mtdparts cmdline parameters
+-		 * which we don't want... but we have to overwrite them or else
+-		 * the kernel will take them at face value.
+-		 */
+-		bootargs-append = " mtdparts= root=31:13";
+-	};
+-
+-	aliases {
+-		led-boot = &power;
+-		led-failsafe = &power;
+-		led-running = &power;
+-		led-upgrade = &power;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-
+-			dwc3@6000000 {
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-
+-				usb2_port1: port@1 {
+-					reg = <1>;
+-					#trigger-source-cells = <0>;
+-				};
+-			};
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-
+-			dwc3@8a00000 {
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-
+-				usb3_port1: port@1 {
+-					reg = <1>;
+-					#trigger-source-cells = <0>;
+-				};
+-
+-				usb3_port2: port@2 {
+-					reg = <2>;
+-					#trigger-source-cells = <0>;
+-				};
+-			};
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		wlan {
+-			label = "wlan";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+-			linux,code = <KEY_RFKILL>;
+-			linux,input-type = <EV_SW>;
+-		};
+-
+-		wps {
+-			label = "wps";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-		pinctrl-0 = <&led_pins>;
+-		pinctrl-names = "default";
+-
+-		power: power {
+-			label = "green:power";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		usb {
+-			label = "green:usb";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+-			trigger-sources = <&usb2_port1>, <&usb3_port1>, <&usb3_port2>;
+-			linux,default-trigger = "usbport";
+-		};
+-
+-		wlan2g {
+-			label = "green:wlan2g";
+-			gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan5g {
+-			label = "green:wlan5g";
+-			gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wps {
+-			label = "green:wps";
+-			gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-	spi_0_pins: spi_0_pinmux {
+-		mux {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		mux_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-low;
+-		};
+-	};
+-	led_pins: led_pinmux {
+-		mux {
+-			pins = "gpio0", "gpio1", "gpio3", "gpio5", "gpio58";
+-			drive-strength = <0x8>;
+-			bias-disable;
+-			output-low;
+-		};
+-	};
+-};
+-
+-&blsp1_spi1 { /* BLSP1 QUP1 */
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <50000000>;
+-		status = "okay";
+-		m25p,fast-read;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition0@0 {
+-				label = "SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-			partition1@40000 {
+-				label = "MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-			partition2@60000 {
+-				label = "QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-			partition3@c0000 {
+-				label = "CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-			partition4@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-			partition5@e0000 {
+-				label = "APPSBL"; /* u-boot */
+-				reg = <0x000e0000 0x00080000>;
+-				/* U-Boot Standalone App "zloader" is located at 0x64000 */
+-				read-only;
+-			};
+-			partition6@160000 {
+-				label = "APPSBLENV"; /* u-boot env */
+-				reg = <0x00160000 0x00010000>;
+-			};
+-			partition7@170000 {
+-				/* make a backup of this partition! */
+-				label = "ART";
+-				reg = <0x00170000 0x00010000>;
+-				read-only;
+-			};
+-			partition8@180000 {
+-				label = "kernel";
+-				reg = <0x00180000 0x00400000>;
+-			};
+-			partition9@580000 {
+-				label = "dualflag";
+-				reg = <0x00580000 0x00010000>;
+-				read-only;
+-			};
+-			partition10@590000 {
+-				label = "header";
+-				reg = <0x00590000 0x00010000>;
+-			};
+-			partition11@5a0000 {
+-				label = "romd";
+-				reg = <0x005a0000 0x00100000>;
+-				read-only;
+-			};
+-			partition12@6a0000 {
+-				label = "not_root_data";
+-				/*
+-				 * for some strange reason, someone at ZyXEL
+-				 * had the "great" idea to put the rootfs_data
+-				 * in front of rootfs... Don't do that!
+-				 * As a result this one, full MebiByte remains
+-				 * unused.
+-				 */
+-				reg = <0x006a0000 0x00100000>;
+-			};
+-			partition13@7a0000 {
+-				label = "rootfs";
+-				reg = <0x007a0000 0x01860000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport1 {
+-	status = "okay";
+-
+-	label = "lan4";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-
+-	label = "lan3";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-
+-	label = "lan2";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan1";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "ZyXEL-NBG6617";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "ZyXEL-NBG6617";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-pa1200.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-pa1200.dts
+deleted file mode 100644
+index af4a7b196b..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-pa1200.dts
++++ /dev/null
+@@ -1,225 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2017-2020, Sven Eckelmann <sven@narfation.org>
+- * Copyright (c) 2018, Marek Lindner <marek.lindner@kaiwoo.ai>
+- */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "Plasma Cloud PA1200";
+-	compatible = "plasmacloud,pa1200";
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2: usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	aliases {
+-		led-boot = &led_status_purple;
+-		led-failsafe = &led_status_yellow;
+-		led-running = &led_status_cyan;
+-		led-upgrade = &led_status_yellow;
+-		label-mac-device = &swport5;
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_status_cyan: status_cyan {
+-			label = "cyan:status";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_status_purple: status_purple {
+-			label = "purple:status";
+-			gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_status_yellow: status_yellow {
+-			label = "yellow:status";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		/* partitions are passed via bootloader */
+-		partitions {
+-			partition-art {
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-				label = "0:ART";
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-
+-				macaddr_gmac0: macaddr@0 {
+-					reg = <0x0 0x6>;
+-				};
+-
+-				macaddr_gmac1: macaddr@6 {
+-					reg = <0x6 0x6>;
+-				};
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "ethernet2";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac1>;
+-};
+-
+-&swport5 {
+-	status = "okay";
+-	label = "ethernet1";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac0>;
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "PlasmaCloud-PA1200";
+-
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "PlasmaCloud-PA1200";
+-
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts
+deleted file mode 100644
+index 87705e5f60..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts
++++ /dev/null
+@@ -1,316 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "ASUS RT-AC58U";
+-	compatible = "asus,rt-ac58u";
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x8000000>;
+-	};
+-
+-	aliases {
+-		led-boot = &led_power;
+-		led-failsafe = &led_power;
+-		led-running = &led_power;
+-		led-upgrade = &led_power;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-
+-			dwc3@8a00000 {
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-
+-				usb3_port1: port@1 {
+-					reg = <1>;
+-					#trigger-source-cells = <0>;
+-				};
+-
+-				usb3_port2: port@2 {
+-					reg = <2>;
+-					#trigger-source-cells = <0>;
+-				};
+-			};
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-
+-		wps {
+-			label = "wps";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_power: status {
+-			label = "blue:status";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wan {
+-			label = "blue:wan";
+-			gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan2G {
+-			label = "blue:wlan2G";
+-			gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		wlan5G {
+-			label = "blue:wlan5G";
+-			gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy1tpt";
+-		};
+-
+-		usb {
+-			label = "blue:usb";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+-			trigger-sources = <&usb3_port1>, <&usb3_port2>;
+-			linux,default-trigger = "usbport";
+-		};
+-
+-		lan {
+-			label = "blue:lan";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		mux {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		mux_cs {
+-			function = "gpio";
+-			pins = "gpio54", "gpio59";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp1_spi1 { /* BLSP1 QUP1 */
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
+-		   <&tlmm 59 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		/*
+-		 * U-boot looks for "n25q128a11" node,
+-		 * if we don't have it, it will spit out the following warning:
+-		 * "ipq: fdt fixup unable to find compatible node".
+-		 */
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		linux,modalias = "m25p80", "mx25l1606e", "n25q128a11";
+-		spi-max-frequency = <30000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-			partition@40000 {
+-				label = "MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-			partition@60000 {
+-				label = "QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-			partition@c0000 {
+-				label = "CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-			partition@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-			partition@e0000 {
+-				label = "APPSBLENV"; /* uboot env*/
+-				reg = <0x000e0000 0x00010000>;
+-				read-only;
+-			};
+-			partition@f0000 {
+-				label = "APPSBL"; /* uboot */
+-				reg = <0x000f0000 0x00080000>;
+-				read-only;
+-			};
+-			partition@170000 {
+-				label = "ART";
+-				reg = <0x00170000 0x00010000>;
+-				read-only;
+-			};
+-			/* 0x00180000 - 0x00200000 unused */
+-		};
+-	};
+-
+-	spi-nand@1 {
+-		compatible = "spi-nand";
+-		reg = <1>;
+-		spi-max-frequency = <30000000>;
+-
+-		/*
+-		 * U-boot looks for "spinand,mt29f" node,
+-		 * if we don't have it, it will spit out the following warning:
+-		 * "ipq: fdt fixup unable to find compatible node".
+-		 */
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "ubi";
+-				reg = <0x00000000 0x08000000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport1 {
+-	status = "okay";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "RT-AC58U";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "RT-AC58U";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi
+deleted file mode 100644
+index 230b62a94e..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi
++++ /dev/null
+@@ -1,247 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019-ap.dk01.1.dtsi"
+-
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-
+-/ {
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x10000000>;
+-	};
+-
+-	soc {
+-		pinctrl@1000000 {
+-			mdio_pins: mdio_pinmux {
+-				mux_1 {
+-					pins = "gpio53";
+-					function = "mdio";
+-					bias-pull-up;
+-				};
+-				mux_2 {
+-					pins = "gpio52";
+-					function = "mdc";
+-					bias-pull-up;
+-				};
+-			};
+-
+-			i2c_0_pins: i2c_0_pinmux {
+-				mux {
+-					pins = "gpio58", "gpio59";
+-					function = "blsp_i2c0";
+-					bias-disable;
+-				};
+-			};
+-		};
+-
+-		keys {
+-			compatible = "gpio-keys";
+-
+-			reset {
+-				label = "reset";
+-				gpios = <&tlmm 4 1>;
+-				linux,code = <KEY_RESTART>;
+-			};
+-		};
+-
+-		gpio_export {
+-			compatible = "gpio-export";
+-			#size-cells = <0>;
+-
+-			gpio_out {
+-				gpio-export,name = "gpio_out";
+-				gpio-export,output = <0>;
+-				gpio-export,direction_may_change = <0>;
+-				gpios = <&stm32_io 23 GPIO_ACTIVE_HIGH>;
+-			};
+-
+-			gpio_in {
+-				gpio-export,name = "gpio_in";
+-				gpio-export,input = <0>;
+-				gpio-export,direction_may_change = <0>;
+-				gpios = <&stm32_io 24 GPIO_ACTIVE_LOW>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_i2c3 {
+-	status = "okay";
+-	pinctrl-0 = <&i2c_0_pins>;
+-	pinctrl-names = "default";
+-	clock-frequency = <400000>;
+-
+-	stm32_io: stm32@74 {
+-		compatible = "tlt,stm32v1";
+-		#gpio-cells = <2>;
+-		#interrupt-cells = <2>;
+-		gpio-controller;
+-		interrupt-controller;
+-		interrupt-parent = <&tlmm>;
+-		interrupts = <5 2>;
+-		reg = <0x74>;
+-	};
+-};
+-
+-&blsp1_spi1 {
+-	cs-gpios = <&tlmm 54 0>, <&tlmm 63 0>;
+-	num-cs = <2>;
+-
+-	xt25f128b@0 {
+-		/*
+-		 * Factory U-boot looks in 0:BOOTCONFIG partition for active
+-		 * partitions settings and mangles the partition config so
+-		 * 0:QSEE/0:QSEE_1, 0:CDT/0:CDT_1 and  0:APPSBL/0:APPSBL_1 pairs
+-		 * can be swaped. It isn't a problem but we never can be sure where
+-		 * OFW put factory images. "n25q128a11" is required for proper nor
+-		 * recognition in u-boot.
+-		 */
+-		compatible = "jedec,spi-nor", "n25q128a11";
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:SBL1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "0:BOOTCONFIG";
+-				reg = <0x60000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@80000 {
+-				label = "0:BOOTCONFIG1";
+-				reg = <0x80000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@a0000 {
+-				label = "0:QSEE";
+-				reg = <0xa0000 0x60000>;
+-				read-only;
+-			};
+-
+-			partition@100000 {
+-				label = "0:QSEE_1";
+-				reg = <0x100000 0x60000>;
+-				read-only;
+-			};
+-
+-			partition@160000 {
+-				label = "0:CDT";
+-				reg = <0x160000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@170000 {
+-				label = "0:CDT_1";
+-				reg = <0x170000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@180000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0x180000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@190000 {
+-				label = "0:APPSBLENV";
+-				reg = <0x190000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@1a0000 {
+-				label = "0:APPSBL";
+-				reg = <0x1a0000 0xa0000>;
+-				read-only;
+-			};
+-
+-			partition@240000 {
+-				label = "0:APPSBL_1";
+-				reg = <0x240000 0xa0000>;
+-				read-only;
+-			};
+-
+-			partition@2e0000 {
+-				label = "0:ART";
+-				reg = <0x2e0000 0x10000>;
+-				read-only;
+-			};
+-
+-			config: partition@2f0000 {
+-				label = "0:CONFIG";
+-				reg = <0x2f0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@300000 {
+-				label = "0:CONFIG_RW";
+-				reg = <0x300000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@310000 {
+-				label = "0:EVENTSLOG";
+-				reg = <0x310000 0x90000>;
+-				read-only;
+-			};
+-		};
+-	};
+-
+-	xt26g02a@1 {
+-		/*
+-		 * Factory U-boot looks in 0:BOOTCONFIG partition for active
+-		 * partitions settings and mangles the partition config so
+-		 * rootfs/rootfs_1 pairs can be swaped.
+-		 * It isn't a problem but we never can be sure where OFW put
+-		 * factory images. "spinand,mt29f" value is required for proper
+-		 * nand recognition in u-boot.
+-		 */
+-		compatible = "spi-nand", "spinand,mt29f";
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		reg = <1>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "rootfs_1";
+-				reg = <0x00000000 0x08000000>;
+-			};
+-
+-			partition@8000000 {
+-				label = "rootfs";
+-				reg = <0x08000000 0x08000000>;
+-			};
+-		};
+-	};
+-};
+-
+-&mdio {
+-	status = "okay";
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-	phy-reset-gpio = <&tlmm 62 0>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx10.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx10.dts
+deleted file mode 100644
+index 31d14aa6ae..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx10.dts
++++ /dev/null
+@@ -1,36 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4018-rutx.dtsi"
+-
+-/ {
+-	model = "Teltonika RUTX10";
+-	compatible = "teltonika,rutx10";
+-
+-	soc {
+-		leds {
+-			compatible = "gpio-leds";
+-
+-			wifi2g {
+-				label = "green:wifi2g";
+-				gpios = <&stm32_io 19 GPIO_ACTIVE_HIGH>;
+-				linux,default-trigger = "phy0tpt";
+-			};
+-
+-			wifi5g {
+-				label = "green:wifi5g";
+-				gpios = <&stm32_io 18 GPIO_ACTIVE_HIGH>;
+-				linux,default-trigger = "phy1tpt";
+-			};
+-		};
+-	};
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "Teltonika-RUTX10";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "Teltonika-RUTX10";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-sxtsq-5-ac.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-sxtsq-5-ac.dts
+deleted file mode 100644
+index de3fa96922..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-sxtsq-5-ac.dts
++++ /dev/null
+@@ -1,239 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2020, Robert Marko <robimarko@gmail.com> */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "MikroTik SXTsq 5 ac (RBSXTsqG-5acD)";
+-	compatible = "mikrotik,sxtsq-5-ac";
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x10000000>;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-	};
+-
+-	aliases {
+-		led-boot = &led_user;
+-		led-failsafe = &led_user;
+-		led-running = &led_user;
+-		led-upgrade = &led_user;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		counter@4a1000 {
+-			compatible = "qcom,qca-gcnt";
+-			reg = <0x4a1000 0x4>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII4>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		power {
+-			label = "blue:power";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+-			default-state = "keep";
+-			panic-indicator;
+-		};
+-
+-		led_user: user {
+-			label = "green:user";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		rssilow {
+-			label = "green:rssilow";
+-			gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		rssimediumlow {
+-			label = "green:rssimediumlow";
+-			gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		rssimedium {
+-			label = "green:rssimedium";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		rssimediumhigh {
+-			label = "green:rssimediumhigh";
+-			gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		rssihigh {
+-			label = "green:rssihigh";
+-			gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <2>;
+-			bias-disable;
+-		};
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <40000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "Qualcomm";
+-				reg = <0x0 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@80000 {
+-				compatible = "mikrotik,routerboot-partitions";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-				label = "RouterBoot";
+-				reg = <0x80000 0x80000>;
+-
+-				hard_config {
+-					read-only;
+-				};
+-
+-				dtb_config {
+-					read-only;
+-				};
+-
+-				soft_config {
+-				};
+-			};
+-
+-			partition@100000 {
+-				compatible = "mikrotik,minor";
+-				label = "firmware";
+-				reg = <0x100000 0xf00000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-
+-	qcom,ath10k-calibration-variant = "MikroTik-SXTsq-5-ac";
+-};
+-
+-&mdio {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-
+-	/delete-property/ psgmii-ethphy;
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	label = "lan";
+-	phy-mode = "rgmii";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wac510.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wac510.dts
+deleted file mode 100644
+index 2dbfaa086e..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wac510.dts
++++ /dev/null
+@@ -1,380 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2020, Robert Marko <robimarko@gmail.com> */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-#include <dt-bindings/leds/common.h>
+-
+-/ {
+-	model = "Netgear WAC510";
+-	compatible = "netgear,wac510";
+-
+-	aliases {
+-		led-boot = &led_power_amber;
+-		led-failsafe = &led_power_amber;
+-		led-running = &led_power_green;
+-		led-upgrade = &led_power_amber;
+-		ethernet1 = &swport5;
+-	};
+-
+-	chosen {
+-		bootargs-append = " root=/dev/ubiblock0_1";
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		counter@4a1000 {
+-			compatible = "qcom,qca-gcnt";
+-			reg = <0x4a1000 0x4>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	led_spi {
+-		compatible = "spi-gpio";
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+-		sck-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
+-		mosi-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
+-		num-chipselects = <0>;
+-
+-		ssr: ssr@0 {
+-			compatible = "fairchild,74hc595";
+-			reg = <0>;
+-			gpio-controller;
+-			#gpio-cells = <2>;
+-			registers-number = <1>;
+-			spi-max-frequency = <1000000>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_power_amber: led-0 {
+-			label = "amber:power";
+-			color = <LED_COLOR_ID_AMBER>;
+-			function = LED_FUNCTION_POWER;
+-			gpios = <&ssr 6 GPIO_ACTIVE_LOW>;
+-			panic-indicator;
+-		};
+-
+-		led_power_green: led-1 {
+-			label = "green:power";
+-			color = <LED_COLOR_ID_GREEN>;
+-			function = LED_FUNCTION_POWER;
+-			gpios = <&ssr 5 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		led-2 {
+-			/* 2.4GHz blue - activity */
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_WLAN;
+-			function-enumerator = <0>;
+-			gpios = <&ssr 4 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		led-3 {
+-			/* 2.4GHz green - link */
+-			color = <LED_COLOR_ID_GREEN>;
+-			function = LED_FUNCTION_WLAN;
+-			function-enumerator = <0>;
+-			gpios = <&ssr 3 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy0radio";
+-		};
+-
+-		led-4 {
+-			/* 5GHz blue - activity */
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_WLAN;
+-			function-enumerator = <1>;
+-			gpios = <&ssr 2 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy1tpt";
+-		};
+-
+-		led-5 {
+-			/* 5GHz green - link */
+-			color = <LED_COLOR_ID_GREEN>;
+-			function = LED_FUNCTION_WLAN;
+-			function-enumerator = <1>;
+-			gpios = <&ssr 1 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy1radio";
+-		};
+-
+-		led-6 {
+-			color = <LED_COLOR_ID_GREEN>;
+-			function = LED_FUNCTION_ACTIVITY;
+-			gpios = <&ssr 0 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio53";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-
+-		mux_2 {
+-			pins = "gpio52";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio54", "gpio59";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
+-		   <&tlmm 59 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <50000000>;
+-		reg = <0>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "0:QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-
+-			partition@c0000 {
+-				label = "0:CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "0:APPSBLENV";
+-				reg = <0x000e0000 0x00010000>;
+-			};
+-
+-			partition@f0000 {
+-				label = "0:APPSBL";
+-				reg = <0x000f0000 0x000f0000>;
+-				read-only;
+-			};
+-
+-			partition@1e0000 {
+-				label = "0:MANUDATA";
+-				reg = <0x001e0000 0x00010000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				macaddr_manudata_6: macaddr@6 {
+-					reg = <0x6 0x6>;
+-				};
+-			};
+-
+-			partition@1f0000 {
+-				label = "0:ART";
+-				reg = <0x001f0000 0x00010000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-		};
+-	};
+-
+-	nand@1 {
+-		compatible = "spi-nand";
+-		reg = <1>;
+-		spi-max-frequency = <48000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "rootfs";
+-				reg = <0x00000000 0x03800000>;
+-			};
+-
+-			partition@3800000 {
+-				label = "rootfs_1";
+-				reg = <0x03800000 0x03800000>;
+-			};
+-
+-			partition@7000000 {
+-				label = "var_config";
+-				reg = <0x07000000 0x00f00000>;
+-				read-only;
+-			};
+-
+-			partition@7f00000 {
+-				label = "Oops_log";
+-				reg = <0x07f00000 0x000c0000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-	reset-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
+-	reset-delay-us = <2000>;
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_1000>, <&macaddr_manudata_6>;
+-	qcom,ath10k-calibration-variant = "Netgear-WAC510";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_5000>, <&macaddr_manudata_6>;
+-	mac-address-increment = <16>;
+-	qcom,ath10k-calibration-variant = "Netgear-WAC510";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac-lte.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac-lte.dts
+deleted file mode 100644
+index 8ff18d92b7..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac-lte.dts
++++ /dev/null
+@@ -1,45 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2022, Alexander Couzens <lynxis@fe80.eu> */
+-
+-#include "qcom-ipq4018-wap-ac.dtsi"
+-
+-/ {
+-	model = "MikroTik wAP ac LTE";
+-	compatible = "mikrotik,wap-ac-lte";
+-
+-	soc {
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-
+-			dwc3@8a00000 {
+-				phys = <&usb3_hs_phy>;
+-				phy-names = "usb2-phy";
+-			};
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	enable-usb-power {
+-		gpio-hog;
+-		gpios = <2 GPIO_ACTIVE_HIGH>;
+-		output-high;
+-		line-name = "enable USB power";
+-	};
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3 {
+-	status = "okay";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dts
+deleted file mode 100644
+index 1bfcbf1e33..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dts
++++ /dev/null
+@@ -1,9 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2020, Robert Marko <robimarko@gmail.com> */
+-
+-#include "qcom-ipq4018-wap-ac.dtsi"
+-
+-/ {
+-	model = "MikroTik wAP ac";
+-	compatible = "mikrotik,wap-ac";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dtsi
+deleted file mode 100644
+index 777f46e3af..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dtsi
++++ /dev/null
+@@ -1,215 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2020, Robert Marko <robimarko@gmail.com> */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x08000000>;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-	};
+-
+-	aliases {
+-		led-boot = &led_user;
+-		led-failsafe = &led_user;
+-		led-running = &led_user;
+-		led-upgrade = &led_user;
+-	};
+-
+-	soc {
+-		counter@4a1000 {
+-			compatible = "qcom,qca-gcnt";
+-			reg = <0x4a1000 0x4>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		power {
+-			label = "blue:power";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+-			default-state = "keep";
+-		};
+-
+-		led_user: user {
+-			label = "green:user";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-			panic-indicator;
+-		};
+-	};
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <2>;
+-			bias-disable;
+-		};
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <40000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "Qualcomm";
+-				reg = <0x0 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@80000 {
+-				compatible = "mikrotik,routerboot-partitions";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-				label = "RouterBoot";
+-				reg = <0x80000 0x80000>;
+-
+-				hard_config {
+-					read-only;
+-					size = <0x2000>;
+-				};
+-
+-				dtb_config {
+-					read-only;
+-				};
+-
+-				soft_config {
+-				};
+-			};
+-
+-			partition@100000 {
+-				compatible = "mikrotik,minor";
+-				label = "firmware";
+-				reg = <0x100000 0xf00000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&watchdog {
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "sw-eth2";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-	label = "sw-eth1";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-
+-	qcom,ath10k-calibration-variant = "MikroTik-wAP-ac";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-
+-	qcom,ath10k-calibration-variant = "MikroTik-wAP-ac";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-r-ac.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-r-ac.dts
+deleted file mode 100644
+index e7f28f23cf..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-r-ac.dts
++++ /dev/null
+@@ -1,45 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2022, Alexander Couzens <lynxis@fe80.eu> */
+-
+-#include "qcom-ipq4018-wap-ac.dtsi"
+-
+-/ {
+-	model = "MikroTik wAP R ac";
+-	compatible = "mikrotik,wap-r-ac";
+-
+-	soc {
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-
+-			dwc3@8a00000 {
+-				phys = <&usb3_hs_phy>;
+-				phy-names = "usb2-phy";
+-			};
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	enable-usb-power {
+-		gpio-hog;
+-		gpios = <2 GPIO_ACTIVE_HIGH>;
+-		output-high;
+-		line-name = "enable USB power";
+-	};
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3 {
+-	status = "okay";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-whw01.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-whw01.dts
+deleted file mode 100644
+index 5859548254..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-whw01.dts
++++ /dev/null
+@@ -1,336 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/leds/common.h>
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-
+-/ {
+-	model = "Linksys WHW01";
+-	compatible = "linksys,whw01";
+-
+-	aliases {
+-		serial0 = &blsp1_uart1;
+-		led-boot = &led_system_blue;
+-		led-running = &led_system_blue;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-		bootargs-append = " root=/dev/ubiblock0_0";
+-	};
+-
+-	soc {
+-		keys {
+-			compatible = "gpio-keys";
+-
+-			reset {
+-				label = "reset";
+-				gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-				linux,code = <KEY_RESTART>;
+-			};
+-		};
+-
+-		ess_tcsr@1953000 {
+-			status = "okay";
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_i2c3 {
+-	status = "okay";
+-	pinctrl-0 = <&i2c_0_pins>;
+-	pinctrl-1 = <&i2c_0_pins>;
+-	pinctrl-names = "i2c_active", "i2c_sleep";
+-
+-	leds@62 {
+-		compatible = "nxp,pca9633";
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-		reg = <0x62>;
+-
+-		/* RGB? */
+-		led@0 {
+-			reg = <0>;
+-			color = <LED_COLOR_ID_RED>;
+-			function = LED_FUNCTION_POWER;
+-		};
+-
+-		led@1 {
+-			reg = <1>;
+-			color = <LED_COLOR_ID_GREEN>;
+-			function = LED_FUNCTION_POWER;
+-		};
+-
+-		led_system_blue: led@2 {
+-			reg = <2>;
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_POWER;
+-			linux,default-trigger = "default-on";
+-		};
+-	};
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 4 GPIO_ACTIVE_HIGH>;
+-
+-	nor@0 {
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:SBL1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "0:QSEE";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-			};
+-
+-			partition@c0000 {
+-				label = "0:CDT";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "APPSBL";
+-				reg = <0xd0000 0xa0000>;
+-				read-only;
+-			};
+-
+-			partition@170000 {
+-				label = "0:ART";
+-				reg = <0x170000 0x10000>;
+-				read-only;
+-
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-
+-			partition@180000 {
+-				label = "u_env";
+-				reg = <0x180000 0x40000>;
+-			};
+-
+-			partition@1c0000 {
+-				label = "s_env";
+-				reg = <0x1c0000 0x20000>;
+-			};
+-
+-			partition@1e0000 {
+-				label = "devinfo";
+-				reg = <0x1e0000 0x20000>;
+-				read-only;
+-			};
+-		};
+-	};
+-
+-	nand@1 {
+-		reg = <1>;
+-		compatible = "spi-nand";
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "kernel";
+-				reg = <0x0000000 0x5000000>;
+-			};
+-
+-			partition@600000 {
+-				label = "rootfs";
+-				reg = <0x0600000 0x4a00000>;
+-			};
+-
+-			partition@5000000 {
+-				label = "alt_kernel";
+-				reg = <0x5000000 0x5000000>;
+-			};
+-
+-			partition@5600000 {
+-				label = "alt_rootfs";
+-				reg = <0x5600000 0x4a00000>;
+-			};
+-
+-			partition@a000000 {
+-				label = "sysdiag";
+-				reg = <0xa000000 0x0200000>;
+-				read-only;
+-			};
+-
+-			partition@a200000 {
+-				label = "syscfg";
+-				reg = <0xa200000 0x5e00000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-	phy-reset-gpio = <&tlmm 62 GPIO_ACTIVE_HIGH>;
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio_pinmux {
+-		mux_mdio {
+-			pins = "gpio53";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-
+-		mux_mdc {
+-			pins = "gpio52";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-		};
+-
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio54", "gpio4";
+-		};
+-
+-		pinconf {
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		pinconf_cs {
+-			pins = "gpio54", "gpio4";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	i2c_0_pins: i2c_0_pinmux {
+-		mux {
+-			function = "blsp_i2c0";
+-			pins = "gpio58", "gpio59";
+-			bias-disable;
+-		};
+-	};
+-
+-	reset_pinmux {
+-		mux {
+-			pins = "gpio63";
+-			bias-pull-up;
+-		};
+-	};
+-};
+-
+-&usb2 {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3 {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&watchdog {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "linksys-whw01-v1";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "linksys-whw01-v1";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "eth1";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-	label = "eth2";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wr-1.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wr-1.dts
+deleted file mode 100644
+index 16951da47f..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wr-1.dts
++++ /dev/null
+@@ -1,292 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/leds/common.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "Pakedge WR-1";
+-	compatible = "pakedge,wr-1";
+-
+-	aliases {
+-		label-mac-device = &gmac;
+-		led-boot = &led_power;
+-		led-failsafe = &led_power;
+-		led-running = &led_power;
+-		led-upgrade = &led_power;
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-		pinctrl-0 = <&key_pins>;
+-		pinctrl-names = "default";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-		pinctrl-0 = <&led_pins>;
+-		pinctrl-names = "default";
+-
+-		led_power: power {
+-			label = "blue:power";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_POWER;
+-		};
+-
+-		wlan2g {
+-			label = "blue:wlan2g";
+-			gpios = <&tlmm 1 GPIO_ACTIVE_LOW>;
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_WLAN;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		wlan5g {
+-			label = "blue:wlan5g";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_WLAN;
+-			linux,default-trigger = "phy1tpt";
+-		};
+-	};
+-
+-	soc {
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:SBL1";
+-				reg = <0x0000000 0x0040000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x0040000 0x0020000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "0:QSEE";
+-				reg = <0x0060000 0x0060000>;
+-				read-only;
+-			};
+-
+-			partition@c0000 {
+-				label = "0:CDT";
+-				reg = <0x00c0000 0x0010000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0x00d0000 0x0010000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "0:APPSBLENV";
+-				reg = <0x00e0000 0x0010000>;
+-				read-only;
+-			};
+-
+-			partition@f0000 {
+-				label = "0:APPSBL";
+-				reg = <0x00f0000 0x0080000>;
+-				read-only;
+-			};
+-
+-			partition@170000 {
+-				label = "0:ART";
+-				reg = <0x0170000 0x0010000>;
+-				read-only;
+-			};
+-
+-			partition@180000 {
+-				label = "firmware";
+-				reg = <0x0180000 0x1e80000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport1 {
+-	status = "okay";
+-
+-	label = "lan4";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-
+-	label = "lan3";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-
+-	label = "lan2";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan1";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	key_pins: key_pinmux {
+-		mux {
+-			function = "gpio";
+-			pins = "gpio59";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	led_pins: led_pinmux {
+-		mux {
+-			function = "gpio";
+-			pins = "gpio0", "gpio1", "gpio2";
+-			bias-none;
+-			drive-strength = <2>;
+-			output-low;
+-		};
+-	};
+-
+-	serial_pins: serial_pinmux {
+-		mux {
+-			function = "blsp_uart0";
+-			pins = "gpio60", "gpio61";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		mux {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			bias-disable;
+-			drive-strength = <12>;
+-		};
+-
+-		mux_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			bias-disable;
+-			drive-strength = <2>;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&usb2 {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&watchdog {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-
+-	qcom,ath10k-calibration-variant = "Pakedge-WR-1";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-
+-	qcom,ath10k-calibration-variant = "Pakedge-WR-1";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wre6606.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wre6606.dts
+deleted file mode 100644
+index efb267ae36..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wre6606.dts
++++ /dev/null
+@@ -1,252 +0,0 @@
+-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+- * Copyright (c) 2018, David Bauer <mail@david-bauer.net>
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- *
+- */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "ZyXEL WRE6606";
+-	compatible = "zyxel,wre6606";
+-
+-	aliases {
+-		led-boot = &power;
+-		led-failsafe = &power;
+-		led-running = &power;
+-		led-upgrade = &power;
+-	};
+-
+-	chosen {
+-		bootargs-append = " mtdparts=";
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		wps {
+-			label = "green:wps";
+-			gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan5g_green {
+-			label = "green:wlan5g";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		power: power {
+-			label = "green:power";
+-			gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan5g_red {
+-			label = "red:wlan5g";
+-			gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan2g_red {
+-			label = "red:wlan2g";
+-			gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan2g_green {
+-			label = "green:wlan2g";
+-			gpios = <&tlmm 59 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		wps {
+-			label = "wps";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	mx25l12805d@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition0@0 {
+-				label = "SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-
+-			partition1@40000 {
+-				label = "MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-
+-			partition2@60000 {
+-				label = "QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-
+-			partition3@c0000 {
+-				label = "CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition4@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition5@E0000 {
+-				label = "APPSBLENV";
+-				reg = <0x000e0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition6@F0000 {
+-				label = "APPSBL";
+-				reg = <0x000f0000 0x00080000>;
+-				read-only;
+-			};
+-
+-			partition7@170000 {
+-				label = "ART";
+-				reg = <0x00170000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition8@180000 {
+-				compatible = "denx,fit";
+-				label = "firmware";
+-				reg = <0x00180000 0x00ce0000>;
+-			};
+-
+-			partition9@e60000 {
+-				label = "manufacture";
+-				reg = <0x00e60000 0x00050000>;
+-				read-only;
+-			};
+-
+-			partition10@eb0000 {
+-				label = "storage";
+-				reg = <0x00eb0000 0x00150000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "ZyXEL-WRE6606";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "ZyXEL-WRE6606";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts
+deleted file mode 100644
+index 4694c56819..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts
++++ /dev/null
+@@ -1,302 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "Luma Home WRTQ-329ACN";
+-	compatible = "luma,wrtq-329acn";
+-
+-	i2c-gpio {
+-		compatible = "i2c-gpio";
+-		sda-gpios = <&tlmm 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+-		scl-gpios = <&tlmm 0 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+-		/* No driver exists */
+-		led_ring@48 {
+-			compatible = "ti,msp430";
+-			reg = <0x48>;
+-		};
+-
+-		eeprom@50 {
+-			compatible = "atmel,24c16";
+-			reg = <0x50>;
+-			pagesize = <16>;
+-			read-only;
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
+-		   <&tlmm 59 GPIO_ACTIVE_HIGH>;
+-	pinctrl-0 = <&spi0_pins>;
+-	pinctrl-names = "default";
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:SBL1";
+-				reg = <0x000000 0x040000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x040000 0x020000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "0:QSEE";
+-				reg = <0x060000 0x060000>;
+-				read-only;
+-			};
+-
+-			partition@c0000 {
+-				label = "0:CDT";
+-				reg = <0x0c0000 0x010000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0x0d0000 0x010000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "0:APPSBLENV";
+-				reg = <0x0e0000 0x010000>;
+-			};
+-
+-			partition@f0000 {
+-				label = "0:APPSBL";
+-				reg = <0x0f0000 0x080000>;
+-				read-only;
+-			};
+-
+-			partition@170000 {
+-				label = "0:ART";
+-				reg = <0x170000 0x010000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				macaddr_art_0: macaddr@0{
+-					reg = <0x0000 0x0006>;
+-				};
+-
+-				macaddr_art_6: macaddr@6{
+-					reg = <0x0006 0x0006>;
+-				};
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-		};
+-	};
+-
+-	flash@1 {
+-		status = "okay";
+-
+-		compatible = "spi-nand";
+-		reg = <1>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "ubi";
+-				reg = <0x0000000 0x8000000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&serial0_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&ethphy0 {
+-	status = "disabled";
+-};
+-
+-&ethphy1 {
+-	status = "disabled";
+-};
+-
+-&ethphy3 {
+-	status = "disabled";
+-};
+-
+-&mdio {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-
+-	label = "lan";
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_art_6>;
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_art_0>;
+-};
+-
+-&tlmm {
+-	serial0_pins: serial0_pinmux {
+-		mux {
+-			function = "blsp_uart0";
+-			pins = "gpio60", "gpio61";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi0_pins: spi0_pinmux {
+-		mux {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			bias-disable;
+-			drive-strength = <12>;
+-		};
+-
+-		mux_cs {
+-			function = "gpio";
+-			pins = "gpio54", "gpio59";
+-			bias-disable;
+-			drive-strength = <2>;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-	qcom,ath10k-calibration-variant = "Luma-WRTQ-329ACN";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-	qcom,ath10k-calibration-variant = "Luma-WRTQ-329ACN";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-a62.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-a62.dts
+deleted file mode 100644
+index d348101110..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-a62.dts
++++ /dev/null
+@@ -1,269 +0,0 @@
+-// SPDX-License-Identifier: ISC
+-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+- * Copyright (c) 2017-2018, Sven Eckelmann <sven.eckelmann@openmesh.com>
+- */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "OpenMesh A62";
+-	compatible = "openmesh,a62";
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2: usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART >;
+-		};
+-	};
+-
+-	aliases {
+-		led-boot = &led_status_green;
+-		led-failsafe = &led_status_green;
+-		led-running = &led_status_green;
+-		led-upgrade = &led_status_green;
+-		label-mac-device = &swport4;
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		status_red {
+-			label = "red:status";
+-			gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_status_green: status_green {
+-			label = "green:status";
+-			gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		status_blue {
+-			label = "blue:status";
+-			gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-
+-	watchdog {
+-		compatible = "linux,wdt-gpio";
+-		gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
+-		hw_algo = "toggle";
+-		/* hw_margin_ms is actually 300s but driver limits it to 60s */
+-		hw_margin_ms = <60000>;
+-		always-running;
+-	};
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	enable-usb-power {
+-		gpio-hog;
+-		gpios = <58 GPIO_ACTIVE_HIGH>;
+-		output-low;
+-		line-name = "enable USB2 power";
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		/* partitions are passed via bootloader */
+-		partitions {
+-			partition-art {
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-				label = "0:ART";
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-
+-				precal_art_9000: precal@9000 {
+-					reg = <0x9000 0x2f20>;
+-				};
+-
+-				macaddr_gmac0: macaddr@0 {
+-					reg = <0x0 0x6>;
+-				};
+-
+-				macaddr_gmac1: macaddr@6 {
+-					reg = <0x6 0x6>;
+-				};
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
+-	wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi2: wifi@1,0 {
+-			compatible = "qcom,ath10k";
+-			status = "okay";
+-			reg = <0x00010000 0 0 0 0>;
+-			qcom,ath10k-calibration-variant = "OM-A62";
+-			ieee80211-freq-limit = <5170000 5350000>;
+-
+-			nvmem-cell-names = "pre-calibration";
+-			nvmem-cells = <&precal_art_9000>;
+-		};
+-	};
+-};
+-
+-&mdio {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "ethernet1";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac0>;
+-};
+-
+-&swport5 {
+-	status = "okay";
+-	label = "ethernet2";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac1>;
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "OM-A62";
+-
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "OM-A62";
+-	ieee80211-freq-limit = <5470000 5875000>;
+-
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-cm520-79f.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-cm520-79f.dts
+deleted file mode 100644
+index 1dde17e293..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-cm520-79f.dts
++++ /dev/null
+@@ -1,387 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "MobiPromo CM520-79F";
+-	compatible = "mobipromo,cm520-79f";
+-
+-	aliases {
+-		led-boot = &led_sys;
+-		led-failsafe = &led_sys;
+-		led-running = &led_sys;
+-		led-upgrade = &led_sys;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-			reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
+-			reset-delay-us = <1000>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-
+-			dwc3@6000000 {
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-
+-				usb2_port1: port@1 {
+-					reg = <1>;
+-					#trigger-source-cells = <0>;
+-				};
+-			};
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-
+-			dwc3@8a00000 {
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-
+-				usb3_port1: port@1 {
+-					reg = <1>;
+-					#trigger-source-cells = <0>;
+-				};
+-
+-				usb3_port2: port@2 {
+-					reg = <2>;
+-					#trigger-source-cells = <0>;
+-				};
+-			};
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	led_spi {
+-		compatible = "spi-gpio";
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+-		sck-gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
+-		mosi-gpios = <&tlmm 36 GPIO_ACTIVE_HIGH>;
+-		num-chipselects = <0>;
+-
+-		led_gpio: led_gpio@0 {
+-			compatible = "fairchild,74hc595";
+-			reg = <0>;
+-			gpio-controller;
+-			#gpio-cells = <2>;
+-			registers-number = <1>;
+-			spi-max-frequency = <1000000>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		usb {
+-			label = "blue:usb";
+-			gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "usbport";
+-			trigger-sources = <&usb3_port1>, <&usb3_port2>, <&usb2_port1>;
+-		};
+-
+-		led_sys: can {
+-			label = "blue:can";
+-			gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wan {
+-			label = "blue:wan";
+-			gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		lan1 {
+-			label = "blue:lan1";
+-			gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		lan2 {
+-			label = "blue:lan2";
+-			gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		wlan2g {
+-			label = "blue:wlan2g";
+-			gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		wlan5g {
+-			label = "blue:wlan5g";
+-			gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy1tpt";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-};
+-
+-&blsp1_uart2 {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&nand {
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x0 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@100000 {
+-				label = "MIBIB";
+-				reg = <0x100000 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@200000 {
+-				label = "BOOTCONFIG";
+-				reg = <0x200000 0x100000>;
+-			};
+-
+-			partition@300000 {
+-				label = "QSEE";
+-				reg = <0x300000 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@400000 {
+-				label = "QSEE_1";
+-				reg = <0x400000 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@500000 {
+-				label = "CDT";
+-				reg = <0x500000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@580000 {
+-				label = "CDT_1";
+-				reg = <0x580000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@600000 {
+-				label = "BOOTCONFIG1";
+-				reg = <0x600000 0x80000>;
+-			};
+-
+-			partition@680000 {
+-				label = "APPSBLENV";
+-				reg = <0x680000 0x80000>;
+-			};
+-
+-			partition@700000 {
+-				label = "APPSBL";
+-				reg = <0x700000 0x200000>;
+-				read-only;
+-			};
+-
+-			partition@900000 {
+-				label = "APPSBL_1";
+-				reg = <0x900000 0x200000>;
+-				read-only;
+-			};
+-
+-			art: partition@b00000 {
+-				label = "ART";
+-				reg = <0xb00000 0x80000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				macaddr_art_1006: macaddr@1006 {
+-					reg = <0x1006 0x6>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-
+-				macaddr_art_5006: macaddr@5006 {
+-					reg = <0x5006 0x6>;
+-				};
+-			};
+-
+-			partition@b80000 {
+-				label = "ubi";
+-				reg = <0xb80000 0x7480000>;
+-			};
+-		};
+-	};
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	nand_pins: nand_pins {
+-		pullups {
+-			pins =	"gpio52", "gpio53", "gpio58",
+-				"gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		pulldowns {
+-			pins =	"gpio54", "gpio55", "gpio56",
+-				"gpio57", "gpio60", "gpio61",
+-				"gpio62", "gpio63", "gpio64",
+-				"gpio65", "gpio66", "gpio67",
+-				"gpio68", "gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-
+-	nvmem-cells = <&macaddr_art_1006>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-
+-	label = "lan2";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan1";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	nvmem-cells = <&macaddr_art_5006>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-	qcom,ath10k-calibration-variant = "CM520-79F";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-	qcom,ath10k-calibration-variant = "CM520-79F";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c1.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c1.dts
+deleted file mode 100644
+index 70e05c7eef..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c1.dts
++++ /dev/null
+@@ -1,136 +0,0 @@
+-/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+- *
+- * Copyright (c) 2018 Peng Zhang <sd20@qxwlan.com>
+- *
+- */
+-
+-#include "qcom-ipq4019-e2600ac.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-
+-/ {
+-	model = "Qxwlan E2600AC c1";
+-	compatible = "qxwlan,e2600ac-c1";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
+-
+-	flash@0 {
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:SBL1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-			partition@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-			partition@60000 {
+-				label = "0:QSEE";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-			};
+-			partition@c0000 {
+-				label = "0:CDT";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-			partition@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0xd0000 0x10000>;
+-				read-only;
+-			};
+-			partition@e0000 {
+-				label = "0:APPSBLENV";
+-				reg = <0xe0000 0x10000>;
+-				read-only;
+-			};
+-			partition@f0000 {
+-				label = "0:APPSBL";
+-				reg = <0xf0000 0x80000>;
+-				read-only;
+-			};
+-			partition@170000 {
+-				label = "0:ART";
+-				reg = <0x170000 0x10000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-
+-				macaddr_gmac0: macaddr@0 {
+-					reg = <0x0 0x6>;
+-				};
+-
+-				macaddr_gmac1: macaddr@6 {
+-					reg = <0x6 0x6>;
+-				};
+-			};
+-			partition@180000 {
+-				compatible = "denx,fit";
+-				label = "firmware";
+-				reg = <0x180000 0x1e80000>;
+-			};
+-		};
+-	};
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-	qcom,ath10k-calibration-variant = "Qxwlan-E2600AC-C1";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-	qcom,ath10k-calibration-variant = "Qxwlan-E2600AC-C1";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "sw-eth1";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac0>;
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	label = "sw-eth2";
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac1>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c2.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c2.dts
+deleted file mode 100644
+index 2ad794e8ec..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c2.dts
++++ /dev/null
+@@ -1,179 +0,0 @@
+-/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+- *
+- * Copyright (c) 2018 Peng Zhang <sd20@qxwlan.com>
+- *
+- */
+-
+-#include "qcom-ipq4019-e2600ac.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-
+-/ {
+-	model = "Qxwlan E2600AC c2";
+-	compatible = "qxwlan,e2600ac-c2";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
+-
+-	flash@0 {
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:SBL1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-			partition@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-			partition@60000 {
+-				label = "0:QSEE";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-			};
+-			partition@c0000 {
+-				label = "0:CDT";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-			partition@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0xd0000 0x10000>;
+-				read-only;
+-			};
+-			partition@e0000 {
+-				label = "0:APPSBLENV";
+-				reg = <0xe0000 0x10000>;
+-				read-only;
+-			};
+-			partition@f0000 {
+-				label = "0:APPSBL";
+-				reg = <0xf0000 0x80000>;
+-				read-only;
+-			};
+-			partition@170000 {
+-				label = "0:ART";
+-				reg = <0x170000 0x10000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-
+-				macaddr_gmac0: macaddr@0 {
+-					reg = <0x0 0x6>;
+-				};
+-
+-				macaddr_gmac1: macaddr@6 {
+-					reg = <0x6 0x6>;
+-				};
+-			};
+-		};
+-	};
+-};
+-
+-&nand {
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "ubi";
+-				reg = <0x00000000 0x04000000>;
+-			};
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	nand_pins: nand-pins {
+-
+-		pullups {
+-			pins = "gpio53", "gpio58", "gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		pulldowns {
+-			pins = "gpio54", "gpio55", "gpio56",
+-				"gpio57", "gpio60", "gpio61",
+-				"gpio62", "gpio63", "gpio64",
+-				"gpio65", "gpio66", "gpio67",
+-				"gpio68", "gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-	qcom,ath10k-calibration-variant = "Qxwlan-E2600AC-C2";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-	qcom,ath10k-calibration-variant = "Qxwlan-E2600AC-C2";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-	label = "sw-eth1";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac0>;
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "sw-eth2";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac0>;
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	label = "sw-eth3";
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac1>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac.dtsi
+deleted file mode 100644
+index 9689bc566f..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac.dtsi
++++ /dev/null
+@@ -1,244 +0,0 @@
+-/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+- *
+- * Copyright (c) 2018 Peng Zhang <sd20@qxwlan.com>
+- *
+- */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-
+-	model = "Qxwlan E2600AC";
+-	compatible = "qcom,ipq4019";
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x10000000>; /* 256MB */
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2: usb2@60f8800 {
+-			status = "okay";
+-
+-			dwc3@6000000 {
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-
+-				usb2_port1: port@1 {
+-					reg = <1>;
+-					#trigger-source-cells = <0>;
+-				};
+-			};
+-		};
+-
+-		serial@78af000 {
+-			pinctrl-0 = <&serial_0_pins>;
+-			pinctrl-names = "default";
+-			status = "okay";
+-		};
+-
+-		serial@78b0000 {
+-			pinctrl-0 = <&serial_1_pins>;
+-			pinctrl-names = "default";
+-			status = "okay";
+-		};
+-
+-		i2c@78b7000 { /* BLSP1 QUP2 */
+-			pinctrl-0 = <&i2c_0_pins>;
+-			pinctrl-names = "default";
+-
+-			status = "okay";
+-		};
+-
+-		usb3: usb3@8af8800 {
+-			status = "okay";
+-
+-			dwc3@8a00000 {
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-
+-				usb3_port1: port@1 {
+-					reg = <1>;
+-					#trigger-source-cells = <0>;
+-				};
+-
+-				usb3_port2: port@2 {
+-					reg = <2>;
+-					#trigger-source-cells = <0>;
+-				};
+-			};
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-
+-		leds {
+-			compatible = "gpio-leds";
+-
+-			led1 {
+-				label = "green:wlan0";
+-				gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-			};
+-
+-			led2 {
+-				label = "green:wlan1";
+-				gpios = <&tlmm 36 GPIO_ACTIVE_LOW>;
+-			};
+-
+-			led3 {
+-				label = "green:usb";
+-				gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
+-				trigger-sources = <&usb2_port1>, <&usb3_port1>, <&usb3_port2>;
+-				linux,default-trigger = "usbport";
+-			};
+-
+-			led4 {
+-				label = "green:ctrl1";
+-				gpios = <&tlmm 51 GPIO_ACTIVE_LOW>;
+-			};
+-
+-			led5 {
+-				label = "green:ctrl2";
+-				gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
+-			};
+-
+-			led6 {
+-				label = "green:ctrl3";
+-				gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;
+-			};
+-		};
+-
+-		keys {
+-			compatible = "gpio-keys";
+-
+-			reset {
+-				label = "reset";
+-				gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-				linux,code = <KEY_RESTART>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	i2c_0_pins: i2c-0-pinmux {
+-		mux {
+-			pins = "gpio20", "gpio21";
+-			function = "blsp_i2c0";
+-			bias-disable;
+-		};
+-	};
+-
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	serial_0_pins: serial0-pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	serial_1_pins: serial1_pinmux {
+-		mux {
+-			pins = "gpio8", "gpio9";
+-			function = "blsp_uart1";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-ea8300.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-ea8300.dts
+deleted file mode 100644
+index 5a738da33d..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-ea8300.dts
++++ /dev/null
+@@ -1,95 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019-xx8300.dtsi"
+-
+-/ {
+-	model = "Linksys EA8300 (Dallas)";
+-	compatible = "linksys,ea8300", "qcom,ipq4019";
+-
+-
+-	aliases {
+-		led-boot = &led_wps_amber;
+-		led-failsafe = &led_wps;
+-		led-running = &led_linksys;
+-		led-upgrade = &led_world;
+-		serial0 = &blsp1_uart1;
+-	};
+-
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		// Retain node names from running OEM on EA8300
+-
+-		// Front panel LEDs, top to bottom
+-
+-		led_plug: diag {
+-			label = "amber:plug";
+-			gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_world: internet {
+-			label = "amber:world";
+-			gpios = <&tlmm 49 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_wps: wps {
+-			label = "white:wps";
+-			gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_wps_amber: wps_amber {
+-			label = "amber:wps";
+-			gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
+-			panic-indicator;
+-		};
+-
+-		led_linksys: pwr {
+-			label = "white:linksys";
+-			gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		// On back panel, above USB socket
+-
+-		led_usb: usb {
+-			label = "green:usb";
+-			gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
+-			trigger-sources = <&usb3_port1>, <&usb3_port2>,
+-					  <&usb2_port1>;
+-			linux,default-trigger = "usbport";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			linux,code = <KEY_RESTART>;
+-			gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		wps {
+-			label = "wps";
+-			linux,code = <KEY_WPS_BUTTON>;
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "linksys-ea8300-fcc";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	ieee80211-freq-limit = <5170000 5330000>;
+-	qcom,ath10k-calibration-variant = "linksys-ea8300-fcc";
+-};
+-
+-&wifi2 {
+-	status = "okay";
+-	ieee80211-freq-limit = <5490000 5835000>;
+-	qcom,ath10k-calibration-variant = "linksys-ea8300-fcc";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-eap2200.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-eap2200.dts
+deleted file mode 100644
+index dc144a1584..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-eap2200.dts
++++ /dev/null
+@@ -1,286 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-
+-/ {
+-	model = "EnGenius EAP2200";
+-	compatible = "engenius,eap2200";
+-
+-	aliases {
+-		led-boot = &led_power;
+-		led-failsafe = &led_power;
+-		led-running = &led_power;
+-		led-upgrade = &led_power;
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		wps {
+-			label = "wps";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_power: power {
+-			label = "amber:power";
+-			gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		lan1 {
+-			label = "blue:lan1";
+-			gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		lan2 {
+-			label = "blue:lan2";
+-			gpios = <&tlmm 45 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		wlan2g {
+-			label = "blue:wlan2g";
+-			gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		wlan5g {
+-			label = "yellow:wlan5g";
+-			gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy1tpt";
+-		};
+-
+-		wlan5g2 {
+-			label = "yellow:wlan5g2";
+-			gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy2tpt";
+-		};
+-
+-		mode {
+-			label = "blue:mode";
+-			gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition0@0 {
+-				label = "0:SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-			partition1@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-			partition2@60000 {
+-				label = "0:QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-			partition3@c0000 {
+-				label = "0:CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-			partition4@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-			partition5@e0000 {
+-				label = "0:APPSBLENV";
+-				reg = <0x000e0000 0x00010000>;
+-				read-only;
+-			};
+-			partition6@f0000 {
+-				label = "0:APPSBL";
+-				reg = <0x000f0000 0x00080000>;
+-				read-only;
+-			};
+-			partition7@170000 {
+-				label = "0:ART";
+-				reg = <0x00170000 0x00010000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-
+-				precal_art_9000: precal@9000 {
+-					reg = <0x9000 0x2f20>;
+-				};
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&nand {
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "rootfs1";
+-				reg = <0x00000000 0x04000000>;
+-			};
+-			partition@40000000 {
+-				label = "ubi";
+-				reg = <0x04000000 0x04000000>;
+-			};
+-
+-		};
+-	};
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
+-	wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi2: wifi@1,0 {
+-			compatible = "qcom,ath10k";
+-			reg = <0x00010000 0 0 0 0>;
+-			nvmem-cell-names = "pre-calibration";
+-			nvmem-cells = <&precal_art_9000>;
+-			ieee80211-freq-limit = <5470000 5875000>;
+-			qcom,ath10k-calibration-variant = "EnGenius-EAP2200";
+-		};
+-	};
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	nand_pins: nand_pins {
+-		pullups {
+-			pins = "gpio53", "gpio58", "gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		pulldowns {
+-			pins = "gpio54", "gpio55", "gpio56",
+-				"gpio57", "gpio60", "gpio61",
+-				"gpio62", "gpio63", "gpio64",
+-				"gpio65", "gpio66", "gpio67",
+-				"gpio68", "gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-
+-	serial_0_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-	qcom,ath10k-calibration-variant = "EnGenius-EAP2200";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	ieee80211-freq-limit = <5170000 5350000>;
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-	qcom,ath10k-calibration-variant = "EnGenius-EAP2200";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzbox-7530.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzbox-7530.dts
+deleted file mode 100644
+index 336da52f27..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzbox-7530.dts
++++ /dev/null
+@@ -1,321 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "AVM FRITZ!Box 7530";
+-	compatible = "avm,fritzbox-7530";
+-
+-	chosen {
+-		bootargs-append = " coherent_pool=4M";
+-	};
+-
+-	aliases {
+-		led-boot = &power_green;
+-		led-failsafe = &info_red;
+-		led-running = &power_green;
+-		led-upgrade = &info_red;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		wlan {
+-			label = "wlan";
+-			gpios = <&tlmm 42 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RFKILL>;
+-		};
+-
+-		wps {
+-			label = "wps";
+-			gpios = <&tlmm 41 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-
+-		dect {
+-			label = "dect";
+-			gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_PHONE>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		info_red: info_red {
+-			label = "red:info";
+-			gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		info {
+-			label = "green:info";
+-			gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		wlan {
+-			label = "green:wlan";
+-			gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		fon {
+-			label = "green:fon";
+-			gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		power_green: power {
+-			label = "green:power";
+-			gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		wps {
+-			label = "green:wps";
+-			gpios = <&tlmm 45 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_0_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	nand_pins: nand_pins {
+-		pullups {
+-			pins = "gpio53", "gpio58", "gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		pulldowns {
+-			pins = "gpio54", "gpio55", "gpio56",
+-				"gpio57", "gpio60", "gpio61",
+-				"gpio62", "gpio63", "gpio64",
+-				"gpio65", "gpio66", "gpio67",
+-				"gpio68", "gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-
+-	usb-power {
+-		line-name = "enable USB3 power";
+-		gpios = <49 GPIO_ACTIVE_HIGH>;
+-		gpio-hog;
+-		output-high;
+-	};
+-};
+-
+-&nand {
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	nand@0 {
+-		/delete-property/ nand-ecc-strength;
+-		/delete-property/ nand-ecc-step-size;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x000000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@80000 {
+-				label = "MIBIB";
+-				reg = <0x080000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@100000 {
+-				label = "QSEE";
+-				reg = <0x100000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@180000 {
+-				label = "CDT";
+-				reg = <0x180000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@1c0000 {
+-				label = "QSEE_B";
+-				reg = <0x1c0000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@240000 {
+-				label = "urlader0";
+-				reg = <0x240000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@280000 {
+-				label = "urlader1";
+-				reg = <0x280000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@2c0000 {
+-				label = "nand-tffs";
+-				reg = <0x2c0000 0x840000>;
+-				read-only;
+-			};
+-
+-			partition@b00000 {
+-				/* 'kernel1' in AVM firmware */
+-				label = "uboot0";
+-				reg = <0xb00000 0x400000>;
+-			};
+-
+-			partition@f00000 {
+-				/* 'kernel2' in AVM firmware */
+-				label = "uboot1";
+-				reg = <0xf00000 0x400000>;
+-			};
+-
+-			partition@1300000 {
+-				label = "ubi";
+-				reg = <0x1300000 0x6d00000>;
+-			};
+-		};
+-	};
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport1 {
+-	status = "okay";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "AVM-FRITZBox-7530";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "AVM-FRITZBox-7530";
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-
+-	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
+-	wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		dsl@1,0 {
+-			compatible = "intel,vrx518";
+-			status = "okay";
+-			reg = <0x00010000 0 0 0 0>;
+-		};
+-	};
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-1200.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-1200.dts
+deleted file mode 100644
+index 723f2161c6..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-1200.dts
++++ /dev/null
+@@ -1,290 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "AVM FRITZ!Repeater 1200";
+-	compatible = "avm,fritzrepeater-1200";
+-
+-	aliases {
+-		led-boot = &power_green;
+-		led-failsafe = &power_red;
+-		led-running = &power_green;
+-		led-upgrade = &power_red;
+-		label-mac-device = &wifi0;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-
+-			ethphy: ethernet-phy@0 {
+-				reg = <0x0>;
+-			};
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	key {
+-		compatible = "gpio-keys";
+-
+-		wps {
+-			label = "WPS button";
+-			gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		power_red: power_red {
+-			label = "red:power";
+-			gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		power_green: power_green {
+-			label = "green:power";
+-			gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		power_yellow {
+-			label = "yellow:power";
+-			gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_0_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	nand_pins: nand_pins {
+-		pullups {
+-			pins = "gpio53", "gpio58", "gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		pulldowns {
+-			pins = "gpio54", "gpio55", "gpio56",
+-				"gpio57", "gpio60", "gpio61",
+-				"gpio62", "gpio63", "gpio64",
+-				"gpio65", "gpio66", "gpio67",
+-				"gpio68", "gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	phy-reset {
+-		line-name = "PHY-reset";
+-		gpios = <19 GPIO_ACTIVE_HIGH>;
+-		gpio-hog;
+-		output-high;
+-	};
+-
+-	phy-reset-2 {
+-		line-name = "PHY-reset-2";
+-		gpios = <47 GPIO_ACTIVE_HIGH>;
+-		gpio-hog;
+-		output-high;
+-	};
+-};
+-
+-&nand {
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x0 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@80000 {
+-				label = "MIBIB";
+-				reg = <0x80000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@100000 {
+-				label = "QSEE";
+-				reg = <0x100000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@180000 {
+-				label = "CDT";
+-				reg = <0x180000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@1c0000 {
+-				label = "QSEE_B";
+-				reg = <0x1c0000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@240000 {
+-				label = "urlader0";
+-				reg = <0x240000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@280000 {
+-				label = "urlader1";
+-				reg = <0x280000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@2c0000 {
+-				label = "nand-tffs";
+-				reg = <0x2c0000 0x840000>;
+-				read-only;
+-			};
+-
+-			partition@b00000 {
+-				/* 'kernel1' in AVM firmware */
+-				label = "uboot0";
+-				reg = <0xb00000 0x400000>;
+-			};
+-
+-			partition@f00000 {
+-				/* 'kernel2' in AVM firmware */
+-				label = "uboot1";
+-				reg = <0xf00000 0x400000>;
+-			};
+-
+-			partition@1300000 {
+-				label = "ubi";
+-				reg = <0x1300000 0x6d00000>;
+-			};
+-		};
+-	};
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "AVM-FRITZRepeater-1200";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "AVM-FRITZRepeater-1200";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-
+-	/delete-property/ psgmii-ethphy;
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	label = "lan";
+-	phy-handle = <&ethphy>;
+-	phy-mode = "rgmii-id";
+-};
+-
+-&ethphy1 {
+-	status = "disabled";
+-};
+-
+-&ethphy2 {
+-	status = "disabled";
+-};
+-
+-&ethphy3 {
+-	status = "disabled";
+-};
+-
+-&ethphy4 {
+-	status = "disabled";
+-};
+-
+-&psgmiiphy {
+-	status = "disabled";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-3000.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-3000.dts
+deleted file mode 100644
+index 8d88bc1521..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-3000.dts
++++ /dev/null
+@@ -1,269 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "AVM FRITZ!Repeater 3000";
+-	compatible = "avm,fritzrepeater-3000";
+-
+-	aliases {
+-		led-boot = &power_led;
+-		led-failsafe = &power_led;
+-		led-running = &power_led;
+-		led-upgrade = &power_led;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	key {
+-		compatible = "gpio-keys";
+-
+-		connect {
+-			label = "Connect";
+-			gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		connect_red {
+-			label = "red:connect";
+-			gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		connect_green {
+-			label = "green:connect";
+-			gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		connect_blue {
+-			label = "blue:connect";
+-			gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		power_led: power {
+-			label = "green:power";
+-			gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_0_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	nand_pins: nand_pins {
+-		pullups {
+-			pins = "gpio53", "gpio58", "gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		pulldowns {
+-			pins = "gpio54", "gpio55", "gpio56",
+-				"gpio57", "gpio60", "gpio61",
+-				"gpio62", "gpio63", "gpio64",
+-				"gpio65", "gpio66", "gpio67",
+-				"gpio68", "gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-};
+-
+-&nand {
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x000000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@80000 {
+-				label = "MIBIB";
+-				reg = <0x080000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@100000 {
+-				label = "QSEE";
+-				reg = <0x100000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@180000 {
+-				label = "CDT";
+-				reg = <0x180000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@1c0000 {
+-				label = "QSEE_B";
+-				reg = <0x1c0000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@240000 {
+-				label = "urlader0";
+-				reg = <0x240000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@280000 {
+-				label = "urlader1";
+-				reg = <0x280000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@2c0000 {
+-				label = "nand-tffs";
+-				reg = <0x2c0000 0x840000>;
+-				read-only;
+-			};
+-
+-			partition@b00000 {
+-				/* 'kernel1' in AVM firmware */
+-				label = "uboot0";
+-				reg = <0xb00000 0x400000>;
+-			};
+-
+-			partition@f00000 {
+-				/* 'kernel2' in AVM firmware */
+-				label = "uboot1";
+-				reg = <0xf00000 0x400000>;
+-			};
+-
+-			partition@1300000 {
+-				label = "ubi";
+-				reg = <0x1300000 0x6d00000>;
+-			};
+-		};
+-	};
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	/* BDFs are identical for the FRITZ!Box 7530 and the FRITZ!Repeater 3000 */
+-	qcom,ath10k-calibration-variant = "AVM-FRITZRepeater-3000";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	ieee80211-freq-limit = <5170000 5350000>;
+-	/* BDFs are identical for the FRITZ!Box 7530 and the FRITZ!Repeater 3000 */
+-	qcom,ath10k-calibration-variant = "AVM-FRITZRepeater-3000";
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-
+-	perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
+-	wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi@1,0 {
+-			/* QCA9984 */
+-			compatible = "qcom,ath10k";
+-			status = "okay";
+-			reg = <0x00010000 0 0 0 0>;
+-			ieee80211-freq-limit = <5470000 5875000>;
+-			/* Uses the reference BDF */
+-		};
+-	};
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan1";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	label = "lan2";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts
+deleted file mode 100644
+index 96ab73962e..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts
++++ /dev/null
+@@ -1,386 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "GL.iNet GL-B2200";
+-	compatible = "glinet,gl-b2200", "qcom,ipq4019";
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x10000000>;
+-	};
+-
+-	chosen {
+-		bootargs-append = " root=/dev/mmcblk0p2 rw rootwait clk_ignore_unused";
+-	};
+-
+-	aliases {
+-		ethernet1 = &swport4;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		wps {
+-			label = "wps";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-			linux,input-type = <1>;
+-		};
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 40 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-			linux,input-type = <1>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		power_blue {
+-			label = "blue:power";
+-			gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>;
+-			default-state = "on";
+-		};
+-		internet_blue {
+-			label = "blue:internet";
+-			gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
+-		};
+-		power_white {
+-			label = "white:power";
+-			gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
+-		};
+-		internet_white {
+-			label = "white:internet";
+-			gpios = <&tlmm 66 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-};
+-
+-&vqmmc {
+-	status = "okay";
+-};
+-
+-&sdhci {
+-	status = "okay";
+-	pinctrl-0 = <&sd_pins>;
+-	pinctrl-names = "default";
+-	cd-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
+-	vqmmc-supply = <&vqmmc>;
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "MIBIB";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "QSEE";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-			};
+-
+-			partition@c0000 {
+-				label = "CDT";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0xd0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "APPSBLENV";
+-				reg = <0xe0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@f0000 {
+-				label = "APPSBL";
+-				reg = <0xf0000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@170000 {
+-				label = "ART";
+-				reg = <0x170000 0x10000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-
+-				precal_art_9000: precal@9000 {
+-					reg = <0x9000 0x2f20>;
+-				};
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_spi2 {
+-	pinctrl-0 = <&spi_1_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	spidev1: spi@0 {
+-		compatible = "silabs,si3210";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&blsp1_uart2 {
+-	pinctrl-0 = <&serial_1_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	serial_1_pins: serial1_pinmux {
+-		mux {
+-			pins = "gpio8", "gpio9",
+-				"gpio10", "gpio11";
+-			function = "blsp_uart1";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-		};
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-		};
+-		pinconf {
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pinconf_cs {
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	spi_1_pins: spi_1_pinmux {
+-		mux {
+-			pins = "gpio44", "gpio46", "gpio47";
+-			function = "blsp_spi1";
+-			bias-disable;
+-		};
+-		cs {
+-			pins = "gpio45";
+-			function = "gpio";
+-			bias-pull-up;
+-		};
+-		reset {
+-			pins = "gpio43";
+-			function = "gpio";
+-			output-high;
+-		};
+-		mux_2 {
+-			pins = "gpio35";
+-			function = "gpio";
+-			output-high;
+-		};
+-		host_int {
+-			pins = "gpio2";
+-			function = "gpio";
+-			input;
+-		};
+-		wake {
+-			pins = "gpio48";
+-			function = "gpio";
+-			output-high;
+-		};
+-	};
+-
+-	sd_pins: sd_pins {
+-		pinmux {
+-			function = "sdio";
+-			pins = "gpio23", "gpio24", "gpio25", "gpio26",
+-				"gpio29", "gpio30", "gpio31", "gpio32";
+-			drive-strength = <10>;
+-		};
+-
+-		pinmux_sd_clk {
+-			function = "sdio";
+-			pins = "gpio27";
+-			drive-strength = <16>;
+-		};
+-
+-		pinmux_sd7 {
+-			function = "sdio";
+-			pins = "gpio28";
+-			drive-strength = <10>;
+-			bias-disable;
+-		};
+-	};
+-
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
+-	wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi2: wifi@1,0 {
+-			status = "okay";
+-			/* Bootlog shows this is a 168c:0056 - QCA 9888v2 */
+-			compatible = "qcom,ath10k";
+-			reg = <0x00010000 0 0 0 0>;
+-			nvmem-cell-names = "pre-calibration";
+-			nvmem-cells = <&precal_art_9000>;
+-			qcom,ath10k-calibration-variant = "GL-B2200";
+-			ieee80211-freq-limit = <5450000 5900000>;
+-		};
+-	};
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "wan";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	label = "lan";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-	qcom,ath10k-calibration-variant = "GL-B2200";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-	qcom,ath10k-calibration-variant = "GL-B2200";
+-	ieee80211-freq-limit = <5100000 5400000>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-habanero-dvk.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-habanero-dvk.dts
+deleted file mode 100644
+index 23a654dcff..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-habanero-dvk.dts
++++ /dev/null
+@@ -1,387 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2019, Robert Marko <robimarko@gmail.com> */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "8devices Habanero DVK";
+-	compatible = "8dev,habanero-dvk";
+-
+-	aliases {
+-		led-boot = &led_status;
+-		led-failsafe = &led_status;
+-		led-running = &led_status;
+-		led-upgrade = &led_upgrade;
+-		ethernet1 = &swport5;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-		};
+-
+-		counter@4a1000 {
+-			compatible = "qcom,qca-gcnt";
+-			reg = <0x4a1000 0x4>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			status = "okay";
+-
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2: usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		usb3: usb3@8af8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_status: status {
+-			label = "green:status";
+-			gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
+-			panic-indicator;
+-		};
+-
+-		led_upgrade: upgrade {
+-			label = "green:upgrade";
+-			gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan2g {
+-			label = "green:wlan2g";
+-			gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		wlan5g {
+-			label = "green:wlan5g";
+-			gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy1tpt";
+-		};
+-	};
+-};
+-
+-&vqmmc {
+-	status = "okay";
+-};
+-
+-&sdhci {
+-	status = "okay";
+-
+-	pinctrl-0 = <&sd_pins>;
+-	pinctrl-names = "default";
+-	cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
+-	vqmmc-supply = <&vqmmc>;
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	nand_pins: nand_pins {
+-		pullups {
+-			pins =  "gpio52", "gpio53", "gpio58", "gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		pulldowns {
+-			pins = "gpio54", "gpio55", "gpio56", "gpio57",
+-				"gpio60", "gpio62", "gpio63", "gpio64",
+-				"gpio65", "gpio66", "gpio67", "gpio68",
+-				"gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-
+-	sd_pins: sd_pins {
+-		pinmux {
+-			function = "sdio";
+-			pins = "gpio23", "gpio24", "gpio25", "gpio26",
+-				"gpio28", "gpio29", "gpio30", "gpio31";
+-			drive-strength = <10>;
+-		};
+-
+-		pinmux_sd_clk {
+-			function = "sdio";
+-			pins = "gpio27";
+-			drive-strength = <16>;
+-		};
+-
+-		pinmux_sd7 {
+-			function = "sdio";
+-			pins = "gpio32";
+-			drive-strength = <10>;
+-			bias-disable;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <24000000>;
+-		reg = <0>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-			partition@40000 {
+-				label = "MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-			partition@60000 {
+-				label = "QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-			partition@c0000 {
+-				label = "CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-			partition@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-			partition@e0000 {
+-				label = "APPSBLENV"; /* uboot env */
+-				reg = <0x000e0000 0x00010000>;
+-				read-only;
+-			};
+-			partition@f0000 {
+-				label = "APPSBL"; /* uboot */
+-				reg = <0x000f0000 0x00080000>;
+-				read-only;
+-			};
+-			partition@170000 {
+-				label = "ART";
+-				reg = <0x00170000 0x00010000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-			partition@180000 {
+-				label = "cfg";
+-				reg = <0x00180000 0x00040000>;
+-			};
+-			partition@1c0000 {
+-				label = "firmware";
+-				compatible = "denx,fit";
+-				reg = <0x001c0000 0x01e40000>;
+-			};
+-		};
+-	};
+-};
+-
+-/* Some DVK boards ship without NAND */
+-&nand {
+-	status = "okay";
+-
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-
+-	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
+-	wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-
+-	/* Free slot for use */
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-	};
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport1 {
+-	status = "okay";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-	qcom,ath10k-calibration-variant = "8devices-Habanero";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-	qcom,ath10k-calibration-variant = "8devices-Habanero";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-hap-ac3-lte6-kit.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-hap-ac3-lte6-kit.dts
+deleted file mode 100644
+index 6459fc3b92..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-hap-ac3-lte6-kit.dts
++++ /dev/null
+@@ -1,312 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2021, Robert Marko <robimarko@gmail.com> */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "MikroTik hAP ac3 LTE6 kit";
+-	compatible = "mikrotik,hap-ac3-lte6-kit";
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x10000000>;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-	};
+-
+-	aliases {
+-		led-boot = &led_status_blue;
+-		led-failsafe = &led_status_red;
+-		led-running = &led_status_blue;
+-		led-upgrade = &led_status_red;
+-	};
+-
+-	soc {
+-		counter@4a1000 {
+-			compatible = "qcom,qca-gcnt";
+-			reg = <0x4a1000 0x4>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_status_blue: status-blue {
+-			label = "blue:status";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_status_red: status-red {
+-			label = "red:status";
+-			gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
+-			panic-indicator;
+-		};
+-
+-		led_status_green: status-green {
+-			label = "green:status";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan {
+-			label = "green:wlan";
+-			gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		ethernet {
+-			label = "green:ethernet";
+-			gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wan {
+-			label = "green:wan";
+-			gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		lan1 {
+-			label = "green:lan1";
+-			gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		lan2 {
+-			label = "green:lan2";
+-			gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		lan3 {
+-			label = "green:lan3";
+-			gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		lan4 {
+-			label = "green:lan4";
+-			gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	enable-usb-power {
+-		gpio-hog;
+-		gpios = <44 GPIO_ACTIVE_HIGH>;
+-		output-high;
+-		line-name = "enable USB power";
+-	};
+-
+-	enable-mpcie-power {
+-		gpio-hog;
+-		gpios = <51 GPIO_ACTIVE_HIGH>;
+-		output-high;
+-		line-name = "enable mPCI-E power";
+-	};
+-
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <10000000>;
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-
+-			partition@0 {
+-				label = "Qualcomm";
+-				reg = <0x0 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@80000 {
+-				compatible = "mikrotik,routerboot-partitions";
+-				label = "RouterBoot";
+-				reg = <0x80000 0x80000>;
+-
+-				hard_config {
+-					size = <0x2000>;
+-				};
+-
+-				dtb_config {
+-					read-only;
+-				};
+-
+-				soft_config {
+-				};
+-			};
+-
+-			partition@110000 {
+-				compatible = "mikrotik,minor";
+-				label = "firmware";
+-				reg = <0x110000 0xef0000>;
+-			};
+-		};
+-	};
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3 {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2 {
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport1 {
+-	status = "okay";
+-	label = "lan4";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-	label = "lan3";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-	label = "lan2";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "lan1";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&watchdog {
+-	status = "okay";
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-hap-ac3.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-hap-ac3.dts
+deleted file mode 100644
+index 35c4c26a2c..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-hap-ac3.dts
++++ /dev/null
+@@ -1,351 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2021, Robert Marko <robimarko@gmail.com> */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "MikroTik hAP ac3";
+-	compatible = "mikrotik,hap-ac3";
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x10000000>;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-	};
+-
+-	aliases {
+-		led-boot = &led_status_blue;
+-		led-failsafe = &led_status_red;
+-		led-running = &led_status_blue;
+-		led-upgrade = &led_status_red;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		counter@4a1000 {
+-			compatible = "qcom,qca-gcnt";
+-			reg = <0x4a1000 0x4>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2: usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-
+-		mode {
+-			label = "mode";
+-			gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RFKILL>;
+-		};
+-
+-		led {
+-			label = "led";
+-			gpios = <&tlmm 42 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_status_blue: status-blue {
+-			label = "blue:status";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_status_red: status-red {
+-			label = "red:status";
+-			gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
+-			panic-indicator;
+-		};
+-
+-		led_status_green: status-green {
+-			label = "green:status";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan {
+-			label = "green:wlan";
+-			gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		ethernet {
+-			label = "green:ethernet";
+-			gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wan {
+-			label = "green:wan";
+-			gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		lan1 {
+-			label = "green:lan1";
+-			gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		lan2 {
+-			label = "green:lan2";
+-			gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		lan3 {
+-			label = "green:lan3";
+-			gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		lan4 {
+-			label = "green:lan4";
+-			gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		poe {
+-			label = "red:poe";
+-			gpios = <&tlmm 36 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	nand_pins: nand_pins {
+-		pullups {
+-			pins = "gpio53", "gpio58", "gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		pulldowns {
+-			pins = "gpio55", "gpio56", "gpio57", "gpio60",
+-				   "gpio62", "gpio63", "gpio64", "gpio65",
+-				   "gpio66", "gpio67", "gpio68", "gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-
+-	enable-usb-power {
+-		gpio-hog;
+-		gpios = <44 GPIO_ACTIVE_HIGH>;
+-		output-high;
+-		line-name = "enable USB power";
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <40000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "Qualcomm";
+-				reg = <0x0 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@80000 {
+-				compatible = "mikrotik,routerboot-partitions";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-				label = "RouterBoot";
+-				reg = <0x80000 0x80000>;
+-
+-				hard_config {
+-					read-only;
+-					size = <0x2000>;
+-				};
+-
+-				dtb_config {
+-					read-only;
+-				};
+-
+-				soft_config {
+-				};
+-			};
+-		};
+-	};
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&nand {
+-	status = "okay";
+-
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "kernel";
+-				reg = <0x0 0xa00000>;
+-			};
+-
+-			partition@a00000 {
+-				label = "ubi";
+-				reg = <0xa00000 0x7600000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport1 {
+-	status = "okay";
+-	label = "lan4";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-	label = "lan3";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-	label = "lan2";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "lan1";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-
+-	qcom,ath10k-calibration-variant = "MikroTik-hAP-ac3";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-
+-	qcom,ath10k-calibration-variant = "MikroTik-hAP-ac3";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-lhgg-60ad.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-lhgg-60ad.dts
+deleted file mode 100644
+index 38bacfa2ba..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-lhgg-60ad.dts
++++ /dev/null
+@@ -1,281 +0,0 @@
+-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+- * Copyright (c) 2019, Robert Marko <robimarko@gmail.com>
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- *
+- */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "Mikrotik Wireless Wire Dish LHGG-60ad";
+-	compatible = "mikrotik,lhgg-60ad";
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x10000000>;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-	};
+-
+-	aliases {
+-		led-boot = &user;
+-		led-failsafe = &user;
+-		led-running = &user;
+-		led-upgrade = &user;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		counter@4a1000 {
+-			compatible = "qcom,qca-gcnt";
+-			reg = <0x4a1000 0x4>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		power: power {
+-			label = "blue:power";
+-			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+-			default-state = "keep";
+-			panic-indicator;
+-		};
+-
+-		user: user {
+-			label = "yellow:user";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan {
+-			label = "green:wlan";
+-			gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		align-left {
+-			label = "green:align-left";
+-			gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		align-right {
+-			label = "green:align-right";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan-rx {
+-			label = "green:align-down";
+-			gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan-tx {
+-			label = "green:align-up";
+-			gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi-0-pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			bias-disable;
+-		};
+-
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-	status = "okay";
+-
+-	m25p80@0 {
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "Qualcomm";
+-				reg = <0x0 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@80000 {
+-				compatible = "mikrotik,routerboot-partitions";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-				label = "RouterBoot";
+-				reg = <0x80000 0x80000>;
+-
+-				hard_config {
+-					read-only;
+-					size = <0x2000>;
+-				};
+-
+-				dtb_config {
+-					read-only;
+-				};
+-
+-				soft_config {
+-				};
+-			};
+-
+-			partition@100000 {
+-				compatible = "mikrotik,minor";
+-				label = "firmware";
+-				reg = <0x100000 0xf00000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-	perst-gpio = <&tlmm 42 GPIO_ACTIVE_HIGH>;
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		/* wil6210 802.11ad card */
+-		wifi: wifi@1,0 {
+-			status = "okay";
+-			/* wil6210 driver has no compatible */
+-			reg = <0x00010000 0 0 0 0>;
+-		};
+-	};
+-};
+-
+-&ethphy1 {
+-	status = "disabled";
+-};
+-
+-&ethphy2 {
+-	status = "disabled";
+-};
+-
+-&ethphy3 {
+-	status = "disabled";
+-};
+-
+-&ethphy4 {
+-	status = "disabled";
+-};
+-
+-&psgmiiphy {
+-	status = "disabled";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-
+-	/delete-property/ psgmii-ethphy;
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	label = "lan";
+-	phy-handle = <&ethphy0>;
+-	phy-mode = "rgmii-id";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-map-ac2200.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-map-ac2200.dts
+deleted file mode 100644
+index 32f0473fb1..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-map-ac2200.dts
++++ /dev/null
+@@ -1,363 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-#include <dt-bindings/leds/common.h>
+-
+-/ {
+-	model = "ASUS Lyra MAP-AC2200";
+-	compatible = "asus,map-ac2200";
+-
+-	aliases {
+-		led-boot = &led_blue0;
+-		led-failsafe = &led_red0;
+-		led-running = &led_blue0;
+-		led-upgrade = &led_red0;
+-		ethernet1 = &swport4;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-
+-		wps {
+-			label = "wps";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-	};
+-};
+-
+-&nand {
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x0 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@80000 {
+-				label = "MIBIB";
+-				reg = <0x80000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@100000 {
+-				label = "QSEE";
+-				reg = <0x100000 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@200000 {
+-				label = "CDT";
+-				reg = <0x200000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@280000 {
+-				label = "APPSBL";
+-				reg = <0x280000 0x140000>;
+-				read-only;
+-			};
+-
+-			partition@3c0000 {
+-				label = "APPSBLENV";
+-				reg = <0x3c0000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@400000 {
+-				label = "ubi";
+-				reg = <0x400000 0x7c00000>;
+-			};
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	i2c_0_pins: i2c_0_pinmux {
+-		pinmux {
+-			function = "blsp_i2c0";
+-			pins = "gpio20", "gpio21";
+-			drive-strength = <16>;
+-			bias-disable;
+-		};
+-	};
+-
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	nand_pins: nand_pins {
+-		pullups {
+-			pins =	"gpio52", "gpio53", "gpio58",
+-				"gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		pulldowns {
+-			pins =	"gpio54", "gpio55", "gpio56",
+-				"gpio57", "gpio60", "gpio61",
+-				"gpio62", "gpio63", "gpio64",
+-				"gpio65", "gpio66", "gpio67",
+-				"gpio68", "gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-	enable_ext_pa_high {
+-		gpio-hog;
+-		gpios = <44 GPIO_ACTIVE_HIGH>,
+-			<46 GPIO_ACTIVE_HIGH>;
+-		output-high;
+-		bias-pull-down;
+-		line-name = "enable external PA output-high";
+-	};
+-	enable_ext_pa_low {
+-		gpio-hog;
+-		gpios = <45 GPIO_ACTIVE_HIGH>,
+-			<47 GPIO_ACTIVE_HIGH>;
+-		output-low;
+-		bias-pull-down;
+-		line-name = "enable external PA output-low";
+-	};
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "ASUS-MAP-AC2200";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "ASUS-MAP-AC2200";
+-	ieee80211-freq-limit = <5470000 5875000>;
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
+-	wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi2: wifi@1,0 {
+-			compatible = "qcom,ath10k";
+-			status = "okay";
+-			reg = <0x00010000 0 0 0 0>;
+-			qcom,ath10k-calibration-variant = "ASUS-MAP-AC2200";
+-			ieee80211-freq-limit = <5170000 5350000>;
+-		};
+-	};
+-};
+-
+-&usb2_hs_phy {
+-	/* Bluetooth module attached via USB */
+-	status = "okay";
+-};
+-
+-&blsp1_i2c3 {
+-	pinctrl-0 = <&i2c_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	led-controller@32 {
+-		/* 9-channel RGB LED controller */
+-		compatible = "national,lp5523";
+-		reg = <0x32>;
+-		clock-mode = /bits/ 8 <1>;
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+-		/*
+-		 * There is only one single extremely bright RGB-LED.
+-		 * The RGB-color channels are running in parallel to
+-		 * increase the current delivery capabilities beyond
+-		 * what a single PWM-output of the controller can do.
+-		 */
+-
+-		led_blue0: led@0 {
+-			chan-name = "blue-0";
+-			led-cur = /bits/ 8 <0xfa>;
+-			max-cur = /bits/ 8 <0xff>;
+-			reg = <0>;
+-			color = <LED_COLOR_ID_BLUE>;
+-			function-enumerator = <0>;
+-		};
+-
+-		led@1 {
+-			chan-name = "blue-1";
+-			led-cur = /bits/ 8 <0xfa>;
+-			max-cur = /bits/ 8 <0xff>;
+-			reg = <1>;
+-			color = <LED_COLOR_ID_BLUE>;
+-			function-enumerator = <1>;
+-		};
+-
+-		led@2 {
+-			chan-name = "blue-2";
+-			led-cur = /bits/ 8 <0xfa>;
+-			max-cur = /bits/ 8 <0xff>;
+-			reg = <2>;
+-			color = <LED_COLOR_ID_BLUE>;
+-			function-enumerator = <2>;
+-		};
+-
+-		led_green0: led@3 {
+-			chan-name = "green-0";
+-			led-cur = /bits/ 8 <0xfa>;
+-			max-cur = /bits/ 8 <0xff>;
+-			reg = <3>;
+-			color = <LED_COLOR_ID_GREEN>;
+-			function-enumerator = <0>;
+-		};
+-
+-		led@4 {
+-			chan-name = "green-1";
+-			led-cur = /bits/ 8 <0xfa>;
+-			max-cur = /bits/ 8 <0xff>;
+-			reg = <4>;
+-			color = <LED_COLOR_ID_GREEN>;
+-			function-enumerator = <1>;
+-		};
+-
+-		led@5 {
+-			chan-name = "green-2";
+-			led-cur = /bits/ 8 <0xfa>;
+-			max-cur = /bits/ 8 <0xff>;
+-			reg = <5>;
+-			color = <LED_COLOR_ID_GREEN>;
+-			function-enumerator = <2>;
+-		};
+-
+-		led_red0: led@6 {
+-			chan-name = "red-0";
+-			led-cur = /bits/ 8 <0xfa>;
+-			max-cur = /bits/ 8 <0xff>;
+-			reg = <6>;
+-			color = <LED_COLOR_ID_RED>;
+-			function-enumerator = <0>;
+-		};
+-
+-		led@7 {
+-			chan-name = "red-1";
+-			led-cur = /bits/ 8 <0xfa>;
+-			max-cur = /bits/ 8 <0xff>;
+-			reg = <7>;
+-			color = <LED_COLOR_ID_RED>;
+-			function-enumerator = <1>;
+-		};
+-
+-		led@8 {
+-			chan-name = "red-2";
+-			led-cur = /bits/ 8 <0xfa>;
+-			max-cur = /bits/ 8 <0xff>;
+-			reg = <8>;
+-			color = <LED_COLOR_ID_RED>;
+-			function-enumerator = <2>;
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "wan";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	label = "lan";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mf18a.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mf18a.dts
+deleted file mode 100644
+index 80d71ac0cc..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mf18a.dts
++++ /dev/null
+@@ -1,483 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-// Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
+-// Copyright (c) 2022, Marcin Gajda <mgajda@o2.pl>.
+-
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/leds/common.h>
+-
+-/ {
+-	model = "ZTE MF18A";
+-	compatible = "zte,mf18a";
+-
+-	aliases {
+-		led-boot = &led_power;
+-		led-failsafe = &led_power;
+-		led-running = &led_power;
+-		led-upgrade = &led_power;
+-	};
+-
+-	chosen {
+-		/*
+-		 * bootargs forced by u-boot bootipq command:
+-		 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
+-		 */
+-		bootargs-append = " root=/dev/ubiblock0_1";
+-	};
+-
+-	gpio-restart {
+-		compatible = "gpio-restart";
+-		gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_internal: led-0 {
+-			label = "blue:internal";
+-			gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
+-			default-state = "keep";
+-		};
+-
+-		led_power: led-1 {
+-			label = "blue:power";
+-			gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
+-			default-state = "keep";
+-		};
+-
+-		led-2 {
+-			function = LED_FUNCTION_WLAN;
+-			label = "blue:wlan";
+-			gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		led-3 {
+-			label = "red:wlan";
+-			gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led-4 {
+-			function = LED_FUNCTION_WLAN;
+-			label = "blue:smart";
+-			gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy1tpt";
+-		};
+-
+-		led-5 {
+-			label = "red:smart";
+-			gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		resetzwave {
+-			label = "resetzwave";
+-			gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			linux,code = <KEY_RESTART>;
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		wps {
+-			label = "wps";
+-			linux,code = <KEY_WPS_BUTTON>;
+-			gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-			reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
+-			reset-delay-us = <2000>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		/* u-boot is looking for "n25q128a11" property */
+-		compatible = "jedec,spi-nor", "n25q128a11";
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:SBL1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "0:QSEE";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-				};
+-
+-			partition@c0000 {
+-				label = "0:CDT";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0xd0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "0:APPSBLENV";
+-				reg = <0xe0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@f0000 {
+-				label = "0:APPSBL";
+-				reg = <0xf0000 0xc0000>;
+-				read-only;
+-			};
+-
+-			partition@1b0000 {
+-				label = "0:reserved1";
+-				reg = <0x1b0000 0x50000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_config_0>;
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-
+-	label = "wan";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_config_0>;
+-	mac-address-increment = <1>;
+-};
+-
+-&swport3 {
+-	status = "okay";
+-
+-	label = "lan";
+-};
+-
+-&nand {
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "fota-flag";
+-				reg = <0x0 0xa0000>;
+-				read-only;
+-			};
+-
+-			partition@a0000 {
+-				label = "ART";
+-				reg = <0xa0000 0x80000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_9000: precal@9000 {
+-					reg = <0x9000 0x2f20>;
+-				};
+-			};
+-
+-			partition@120000 {
+-				label = "mac";
+-				reg = <0x120000 0x80000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				macaddr_config_0: macaddr@0 {
+-					reg = <0x0 0x6>;
+-				};
+-			};
+-
+-			partition@1a0000 {
+-				label = "reserved2";
+-				reg = <0x1a0000 0xc0000>;
+-				read-only;
+-			};
+-
+-			partition@260000 {
+-				label = "cfg-param";
+-				reg = <0x260000 0x400000>;
+-				read-only;
+-			};
+-
+-			partition@660000 {
+-				label = "log";
+-				reg = <0x660000 0x400000>;
+-			};
+-
+-			partition@a60000 {
+-				label = "oops";
+-				reg = <0xa60000 0xa0000>;
+-			};
+-
+-			partition@b00000 {
+-				label = "reserved3";
+-				reg = <0xb00000 0x500000>;
+-				read-only;
+-			};
+-
+-			partition@1000000 {
+-				label = "web";
+-				reg = <0x1000000 0x800000>;
+-			};
+-
+-			partition@1800000 {
+-				label = "rootfs";
+-				reg = <0x1800000 0x1d00000>;
+-			};
+-
+-			partition@3500000 {
+-				label = "data";
+-				reg = <0x3500000 0x1900000>;
+-			};
+-
+-			partition@4e00000 {
+-				label = "fota";
+-				reg = <0x4e00000 0x2800000>;
+-
+-			};
+-			partition@7600000 {
+-				label = "iot-db";
+-				reg = <0x7600000 0xa00000>;
+-			};
+-		};
+-	};
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	i2c_0_pins: i2c_0_pinmux {
+-		mux {
+-			pins = "gpio20", "gpio21";
+-			function = "blsp_i2c0";
+-			bias-disable;
+-		};
+-	};
+-
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	nand_pins: nand_pins {
+-		pullups {
+-			pins =	"gpio52", "gpio53", "gpio58",
+-				"gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		pulldowns {
+-			pins =	"gpio54", "gpio55", "gpio56",
+-				"gpio57", "gpio60",
+-				"gpio62", "gpio63", "gpio64",
+-				"gpio65", "gpio66", "gpio67",
+-				"gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_1000>, <&macaddr_config_0>;
+-	mac-address-increment = <2>;
+-	qcom,ath10k-calibration-variant = "ZTE-MF18A";
+-};
+-
+-//* This node is used for 5Ghz on QCA9982 */
+-&pcie0 {
+-	status = "okay";
+-	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
+-	wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
+-	clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>;
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi2: wifi@1,0 {
+-			compatible = "pci168c,0040";
+-			nvmem-cell-names = "pre-calibration", "mac-address";
+-			nvmem-cells = <&precal_art_9000>, <&macaddr_config_0>;
+-			mac-address-increment = <3>;
+-			qcom,ath10k-calibration-variant = "ZTE-MF18A";
+-			reg = <0x00010000 0 0 0 0>;
+-		};
+-	};
+-};
+-
+-
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mf286d.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mf286d.dts
+deleted file mode 100644
+index ff04279a60..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mf286d.dts
++++ /dev/null
+@@ -1,448 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-// Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/leds/common.h>
+-
+-/ {
+-	model = "ZTE MF286D";
+-	compatible = "zte,mf286d";
+-
+-	aliases {
+-		led-boot = &led_internal;
+-		led-failsafe = &led_internal;
+-		led-running = &led_internal;
+-		led-upgrade = &led_internal;
+-	};
+-
+-	chosen {
+-		/*
+-		 * bootargs forced by u-boot bootipq command:
+-		 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
+-		 */
+-		bootargs-append = " root=/dev/ubiblock0_1";
+-	};
+-
+-	gpio-restart {
+-		compatible = "gpio-restart";
+-		gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_internal: led-0 {
+-			function = LED_FUNCTION_STATUS;
+-			color = <LED_COLOR_ID_BLUE>;
+-			gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
+-			label = "blue:internal_led";
+-			default-state = "keep";
+-		};
+-
+-		led-1 {
+-			function = LED_FUNCTION_WLAN;
+-			color = <LED_COLOR_ID_BLUE>;
+-			gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		wifi {
+-			label = "wifi";
+-			linux,code = <KEY_RFKILL>;
+-			gpios = <&tlmm 11 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		reset {
+-			label = "reset";
+-			linux,code = <KEY_RESTART>;
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		wps {
+-			label = "wps";
+-			linux,code = <KEY_WPS_BUTTON>;
+-			gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-			reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
+-			reset-delay-us = <2000>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		/* u-boot is looking for "n25q128a11" property */
+-		compatible = "jedec,spi-nor", "n25q128a11";
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:SBL1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "0:QSEE";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-				};
+-
+-			partition@c0000 {
+-				label = "0:CDT";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0xd0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "0:APPSBLENV";
+-				reg = <0xe0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@f0000 {
+-				label = "0:APPSBL";
+-				reg = <0xf0000 0xc0000>;
+-				read-only;
+-			};
+-
+-			partition@1b0000 {
+-				label = "0:reserved1";
+-				reg = <0x1b0000 0x50000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_config_0>;
+-};
+-
+-&nand {
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "fota-flag";
+-				reg = <0x0 0xa0000>;
+-				read-only;
+-			};
+-
+-			partition@a0000 {
+-				label = "ART";
+-				reg = <0xa0000 0x80000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-
+-			partition@120000 {
+-				label = "mac";
+-				reg = <0x120000 0x80000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				macaddr_config_0: macaddr@0 {
+-					reg = <0x0 0x6>;
+-				};
+-			};
+-
+-			partition@1a0000 {
+-				label = "reserved2";
+-				reg = <0x1a0000 0xc0000>;
+-				read-only;
+-			};
+-
+-			partition@260000 {
+-				label = "cfg-param";
+-				reg = <0x260000 0x400000>;
+-				read-only;
+-			};
+-
+-			partition@660000 {
+-				label = "log";
+-				reg = <0x660000 0x400000>;
+-			};
+-
+-			partition@a60000 {
+-				label = "oops";
+-				reg = <0xa60000 0xa0000>;
+-			};
+-
+-			partition@b00000 {
+-				label = "reserved3";
+-				reg = <0xb00000 0x500000>;
+-				read-only;
+-			};
+-
+-			partition@1000000 {
+-				label = "web";
+-				reg = <0x1000000 0x800000>;
+-			};
+-
+-			partition@1800000 {
+-				label = "rootfs";
+-				reg = <0x1800000 0x1d00000>;
+-			};
+-
+-			partition@3500000 {
+-				label = "data";
+-				reg = <0x3500000 0x1900000>;
+-			};
+-
+-			partition@4e00000 {
+-				label = "fota";
+-				reg = <0x4e00000 0x3200000>;
+-			};
+-		};
+-	};
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-
+-	label = "lan4";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-
+-	label = "lan3";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan2";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_config_0>;
+-	mac-address-increment = <1>;
+-};
+-
+-&tlmm {
+-	i2c_0_pins: i2c_0_pinmux {
+-		mux {
+-			pins = "gpio20", "gpio21";
+-			function = "blsp_i2c0";
+-			bias-disable;
+-		};
+-	};
+-
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	nand_pins: nand_pins {
+-		pullups {
+-			pins =	"gpio52", "gpio53", "gpio58",
+-				"gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		pulldowns {
+-			pins =	"gpio54", "gpio55", "gpio56",
+-				"gpio57", "gpio60",
+-				"gpio62", "gpio63", "gpio64",
+-				"gpio65", "gpio66", "gpio67",
+-				"gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_1000>, <&macaddr_config_0>;
+-	mac-address-increment = <2>;
+-	qcom,ath10k-calibration-variant = "zte,mf286d";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_5000>, <&macaddr_config_0>;
+-	mac-address-increment = <3>;
+-	qcom,ath10k-calibration-variant = "zte,mf286d";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mf289f.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mf289f.dts
+deleted file mode 100644
+index 0d9f24ad70..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mf289f.dts
++++ /dev/null
+@@ -1,440 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-// Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
+-// Copyright (c) 2022, Giammarco Marzano <stich86@gmail.com>.
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/leds/common.h>
+-
+-/ {
+-	model = "ZTE MF289F";
+-	compatible = "zte,mf289f";
+-
+-	aliases {
+-		led-boot = &led_status;
+-		led-failsafe = &led_status;
+-		led-running = &led_status;
+-		led-upgrade = &led_status;
+-	};
+-
+-	chosen {
+-		/*
+-		 * bootargs forced by u-boot bootipq command:
+-		 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
+-		 */
+-		bootargs-append = " root=/dev/ubiblock0_1";
+-	};
+-
+-	/*
+-	 * This node is used to restart modem module to avoid anomalous
+-	 * behaviours on initial communication.
+-	 */
+-	gpio-restart {
+-		compatible = "gpio-restart";
+-		gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_status: led-0 {
+-			label = "blue:power";
+-			function = LED_FUNCTION_POWER;
+-			color = <LED_COLOR_ID_BLUE>;
+-			gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		led-1 {
+-			function = LED_FUNCTION_WLAN;
+-			color = <LED_COLOR_ID_BLUE>;
+-			gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		key-reset {
+-			label = "reset";
+-			linux,code = <KEY_RESTART>;
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		key-wps {
+-			label = "wps";
+-			linux,code = <KEY_WPS_BUTTON>;
+-			gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-
+-	soc {
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-	};
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-	reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
+-	reset-delay-us = <2000>;
+-};
+-
+-&watchdog {
+-	status = "okay";
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&usb2 {
+-	status = "okay";
+-};
+-
+-&usb3 {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>,
+-		   <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:SBL1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "0:QSEE";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-			};
+-
+-			partition@c0000 {
+-				label = "0:CDT";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0xd0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "0:APPSBLENV";
+-				reg = <0xe0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@f0000 {
+-				label = "0:APPSBL";
+-				reg = <0xf0000 0xc0000>;
+-				read-only;
+-			};
+-
+-			partition@1b0000 {
+-				label = "0:reserved1";
+-				reg = <0x1b0000 0x50000>;
+-				read-only;
+-			};
+-		};
+-	};
+-
+-	spi-nand@1 { /* flash@1 ? */
+-		compatible = "spi-nand";
+-		reg = <1>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "fota-flag";
+-				reg = <0x0 0xa0000>;
+-				read-only;
+-			};
+-
+-			partition@a0000 {
+-				label = "ART";
+-				reg = <0xa0000 0x80000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-
+-			partition@120000 {
+-				label = "mac";
+-				reg = <0x120000 0x80000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				macaddr_mac_0: macaddr@0 {
+-					reg = <0x0 0x6>;
+-				};
+-			};
+-
+-			partition@1a0000 {
+-				label = "reserved2";
+-				reg = <0x1a0000 0xc0000>;
+-				read-only;
+-			};
+-
+-			partition@260000 {
+-				label = "cfg-param";
+-				reg = <0x260000 0x400000>;
+-				read-only;
+-			};
+-
+-			partition@660000 {
+-				label = "log";
+-				reg = <0x660000 0x400000>;
+-			};
+-
+-			partition@a60000 {
+-				label = "oops";
+-				reg = <0xa60000 0xa0000>;
+-			};
+-
+-			partition@b00000 {
+-				label = "reserved3";
+-				reg = <0xb00000 0x500000>;
+-				read-only;
+-			};
+-
+-			partition@1000000 {
+-				label = "web";
+-				reg = <0x1000000 0x800000>;
+-			};
+-
+-			partition@1800000 {
+-				label = "rootfs";
+-				reg = <0x1800000 0x1d00000>;
+-			};
+-
+-			partition@3500000 {
+-				label = "data";
+-				reg = <0x3500000 0x1900000>;
+-			};
+-
+-			partition@4e00000 {
+-				label = "fota";
+-				reg = <0x4e00000 0x3200000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_mac_0>;
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-
+-	label = "wan";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_mac_0>;
+-	mac-address-increment = <1>;
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	label = "lan";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	i2c_0_pins: i2c_0_pinmux {
+-		mux {
+-			pins = "gpio20", "gpio21";
+-			function = "blsp_i2c0";
+-			bias-disable;
+-		};
+-	};
+-
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio12", "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_1000>, <&macaddr_mac_0>;
+-	mac-address-increment = <2>;
+-	qcom,ath10k-calibration-variant = "zte,mf289f";
+-};
+-
+-/* This node is used only on AT2 version for 5Ghz on IPQ4019 with board-id=21 */
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_5000>, <&macaddr_mac_0>;
+-	mac-address-increment = <3>;
+-	qcom,ath10k-calibration-variant = "zte,mf289f";
+-};
+-
+-/* This node is used only on AT1 version for 5Ghz on QCA9984 */
+-&pcie0 {
+-	status = "okay";
+-	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
+-	wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
+-	clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>;
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi2: wifi@1,0 {
+-			nvmem-cell-names = "mac-address";
+-			nvmem-cells = <&macaddr_mac_0>;
+-			mac-address-increment = <4>;
+-			compatible = "qcom,ath10k";
+-			reg = <0x00010000 0 0 0 0>;
+-			qcom,ath10k-calibration-variant = "zte,mf289f";
+-		};
+-	};
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mr8300.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mr8300.dts
+deleted file mode 100644
+index 057aa88028..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mr8300.dts
++++ /dev/null
+@@ -1,80 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019-xx8300.dtsi"
+-
+-/ {
+-	model = "Linksys MR8300 (Dallas)";
+-	compatible = "linksys,mr8300", "qcom,ipq4019";
+-
+-	aliases {
+-		led-boot = &led_blue;
+-		led-failsafe = &led_red;
+-		led-running = &led_blue;
+-		led-upgrade = &led_amber;
+-		serial0 = &blsp1_uart1;
+-	};
+-
+-	// Top panel LEDs, above Linksys logo
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_red: red {
+-			label = "red:alarm";
+-			gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_amber: amber {
+-			label = "amber:programming";
+-			gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
+-			panic-indicator;
+-		};
+-
+-		led_blue: blue {
+-			label = "blue:power";
+-			gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		// On back panel, above USB socket
+-
+-		led_usb: usb {
+-			label = "green:usb";
+-			gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
+-			trigger-sources = <&usb3_port1>, <&usb3_port2>,
+-					  <&usb2_port1>;
+-			linux,default-trigger = "usbport";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			linux,code = <KEY_RESTART>;
+-			gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		wps {
+-			label = "wps";
+-			linux,code = <KEY_WPS_BUTTON>;
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "linksys-mr8300-v0-fcc";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	ieee80211-freq-limit = <5170000 5330000>;
+-	qcom,ath10k-calibration-variant = "linksys-mr8300-v0-fcc";
+-};
+-
+-&wifi2 {
+-	status = "okay";
+-	ieee80211-freq-limit = <5490000 5835000>;
+-	qcom,ath10k-calibration-variant = "linksys-mr8300-v0-fcc";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-ncp-hg100-cellular.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-ncp-hg100-cellular.dts
+deleted file mode 100644
+index ea27defea3..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-ncp-hg100-cellular.dts
++++ /dev/null
+@@ -1,635 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/leds/common.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "Sony NCP-HG100/Cellular";
+-	compatible = "sony,ncp-hg100-cellular";
+-
+-	aliases {
+-		led-boot = &led_cloud_green;
+-		led-failsafe = &led_cloud_red;
+-		led-running = &led_cloud_green;
+-		led-upgrade = &led_cloud_green;
+-		label-mac-device = &gmac;
+-	};
+-
+-	chosen {
+-		bootargs = "console=ttyMSM0,115200n8 root=/dev/mmcblk0p15 rootfstype=squashfs,ext4";
+-	};
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x20000000>;
+-	};
+-
+-	soc {
+-		tcsr@1949000 {
+-			status = "okay";
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			status = "okay";
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			status = "okay";
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			status = "okay";
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		dma@7984000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys-repeat {
+-		compatible = "gpio-keys";
+-		pinctrl-0 = <&keys_pins>;
+-		pinctrl-names = "default";
+-		autorepeat;
+-
+-		key-volup {
+-			label = "volume up";
+-			linux,code = <KEY_VOLUMEUP>;
+-			gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
+-			linux,input-type = <EV_KEY>;
+-		};
+-
+-		key-voldown {
+-			label = "volume down";
+-			linux,code = <KEY_VOLUMEDOWN>;
+-			gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
+-			linux,input-type = <EV_KEY>;
+-		};
+-
+-		key-alexatrigger {
+-			label = "alexa trigger";
+-			linux,code = <BTN_0>;
+-			gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
+-			linux,input-type = <EV_KEY>;
+-		};
+-
+-		key-mute {
+-			label = "mic mute";
+-			linux,code = <BTN_1>;
+-			gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
+-			linux,input-type = <EV_SW>;
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		key-reset {
+-			label = "reset";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-
+-		key-wps {
+-			label = "setup";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	pinctrl-0 = <&bt_pins>, <&aud_pins>, <&mcu_pins>;
+-	pinctrl-names = "default";
+-
+-	/*
+-	 * uart0 is shared for debug console and Z-Wave,
+-	 * use only for debug console in OpenWrt.
+-	 *
+-	 * 1: debug console
+-	 * 0: Z-Wave
+-	 */
+-	uart0_ctrl_pins: uart0_ctrl_pinmux {
+-		mux {
+-			pins = "gpio15";
+-			function = "gpio";
+-			output-high;
+-		};
+-	};
+-
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	/*
+-	 * reset pin for Z-Wave
+-	 * active-low, >= 20ns
+-	 */
+-	zwave_pins: zwave_pinmux {
+-		mux {
+-			pins = "gpio59";
+-			function = "gpio";
+-			output-high;
+-		};
+-	};
+-
+-	serial_1_pins: serial1_pinmux {
+-		mux {
+-			pins = "gpio8", "gpio9",
+-				"gpio10", "gpio11";
+-			function = "blsp_uart1";
+-			bias-disable;
+-		};
+-	};
+-
+-	bt_pins: bt_pinmux {
+-		mux_reset {
+-			pins = "gpio66";
+-			function = "gpio";
+-			output-high;
+-		};
+-
+-		mux_pwr {
+-			pins = "gpio68";
+-			function = "gpio";
+-			output-high;
+-		};
+-	};
+-
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	i2c_1_pins: i2c_1_pinmux {
+-		mux {
+-			pins = "gpio12", "gpio13";
+-			function = "blsp_i2c1";
+-			bias-disable;
+-		};
+-	};
+-
+-	keys_pins: keys_pinmux {
+-		mux_1 {
+-			pins = "gpio39", "gpio40", "gpio42", "gpio47";
+-			function = "gpio";
+-			bias-disable;
+-		};
+-
+-		mux_2 {
+-			pins = "gpio2";
+-			function = "gpio";
+-			input;
+-		};
+-	};
+-
+-	sd_pins: sd_pins {
+-		mux {
+-			function = "sdio";
+-			pins = "gpio23", "gpio24", "gpio25", "gpio26",
+-				"gpio28", "gpio29", "gpio30", "gpio31";
+-			drive-strength = <4>;
+-		};
+-
+-		mux_sd_clk {
+-			function = "sdio";
+-			pins = "gpio27";
+-			drive-strength = <16>;
+-		};
+-
+-		mux_sd7 {
+-			function = "sdio";
+-			pins = "gpio32";
+-			drive-strength = <4>;
+-			bias-disable;
+-		};
+-	};
+-
+-	aud_pins: aud_pinmux {
+-		mux {
+-			pins = "gpio48", "gpio49", "gpio50", "gpio51";
+-			function = "aud_pin";
+-		};
+-	};
+-
+-	alc1304_pins: alc1304_pinmux {
+-		mux_1 {
+-			pins = "gpio44";
+-			function = "gpio";
+-			bias-disable;
+-		};
+-
+-		mux_2 {
+-			pins = "gpio45";
+-			function = "gpio";
+-			bias-disable;
+-		};
+-	};
+-
+-	cx2902x_reset: cx2902x_pinmux {
+-		mux_1 {
+-			pins = "gpio64";
+-			function = "gpio";
+-			bias-disable;
+-		};
+-
+-		mux_2 {
+-			pins = "gpio65";
+-			function = "gpio";
+-			bias-disable;
+-		};
+-	};
+-
+-	lte_pins: lte_pinmux {
+-		mux_en {
+-			pins = "gpio20";
+-			function = "gpio";
+-			output-high;
+-		};
+-
+-		mux_reset {
+-			pins = "gpio35";
+-			function = "gpio";
+-			input;
+-		};
+-	};
+-
+-	usb3_pins: usb3_pinmux {
+-		mux_en {
+-			pins = "gpio36";
+-			function = "gpio";
+-			output-high;
+-		};
+-
+-		mux_flt {
+-			pins = "gpio4";
+-			function = "gpio";
+-			input;
+-		};
+-	};
+-
+-	mcu_pins: mcu_pinmux {
+-		mux_boot {
+-			pins = "gpio38";
+-			function = "gpio";
+-			output-low;
+-		};
+-
+-		mux_reset {
+-			pins = "gpio5";
+-			function = "gpio";
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_i2c4 {
+-	/*
+-	 * There is no driver for the following devices:
+-	 * - CY8C4014LQI@14	: Touch-Sensor for buttons on top
+-	 * - MINI54FDE@15	: MCU for Fan/RGB LED/Thermal control
+-	 * - ALC5629@18		: I2S/PCM Audio DAC
+-	 * - CX20924@41		: Voice Input Processor
+-	 */
+-	pinctrl-0 = <&i2c_1_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	led-controller@32 {
+-		compatible = "ti,lp55231";
+-		reg = <0x32>;
+-		clock-mode = /bits/ 8 <0>;
+-		enable-gpio = <&tlmm 1 GPIO_ACTIVE_HIGH>;
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+-		led@0 {
+-			chan-name = "green:wan";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x0>;
+-			color = <LED_COLOR_ID_GREEN>;
+-			function = LED_FUNCTION_WAN;
+-		};
+-
+-		led@1 {
+-			chan-name = "blue:wan";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x1>;
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_WAN;
+-		};
+-
+-		led@2 {
+-			chan-name = "green:lan";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x2>;
+-			color = <LED_COLOR_ID_GREEN>;
+-			function = LED_FUNCTION_LAN;
+-		};
+-
+-		led@3 {
+-			chan-name = "blue:lan";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x3>;
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_LAN;
+-		};
+-
+-		led@4 {
+-			chan-name = "green:wlan-2";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x4>;
+-			color = <LED_COLOR_ID_GREEN>;
+-			function = LED_FUNCTION_WLAN;
+-			function-enumerator = <2>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		led@5 {
+-			chan-name = "blue:wlan-2";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x5>;
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_WLAN;
+-			function-enumerator = <2>;
+-		};
+-
+-		led@6 {
+-			chan-name = "red:wan";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x6>;
+-			color = <LED_COLOR_ID_RED>;
+-			function = LED_FUNCTION_WAN;
+-		};
+-
+-		led@7 {
+-			chan-name = "red:lan";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x7>;
+-			color = <LED_COLOR_ID_RED>;
+-			function = LED_FUNCTION_LAN;
+-		};
+-
+-		led@8 {
+-			chan-name = "red:wlan-2";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x8>;
+-			color = <LED_COLOR_ID_RED>;
+-			function = LED_FUNCTION_WLAN;
+-			function-enumerator = <2>;
+-		};
+-	};
+-
+-	led-controller@33 {
+-		compatible = "ti,lp55231";
+-		reg = <0x33>;
+-		clock-mode = /bits/ 8 <0>;
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+-		led@0 {
+-			chan-name = "green:wlan-5";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x0>;
+-			color = <LED_COLOR_ID_GREEN>;
+-			function = LED_FUNCTION_WLAN;
+-			linux,default-trigger = "phy1tpt";
+-			function-enumerator = <5>;
+-		};
+-
+-		led@1 {
+-			chan-name = "blue:wlan-5";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x1>;
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_WLAN;
+-			function-enumerator = <5>;
+-		};
+-
+-		led@2 {
+-			chan-name = "green:wan-4";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x2>;
+-			color = <LED_COLOR_ID_GREEN>;
+-			function = LED_FUNCTION_WAN; /* WWAN/LTE/4G */
+-			function-enumerator = <4>; /* WWAN/LTE/4G */
+-		};
+-
+-		led@3 {
+-			chan-name = "blue:wan-4";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x3>;
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_WAN; /* WWAN/LTE/4G */
+-			function-enumerator = <4>; /* WWAN/LTE/4G */
+-		};
+-
+-		led_cloud_green: led@4 {
+-			chan-name = "green:power";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x4>;
+-			color = <LED_COLOR_ID_GREEN>;
+-			function = LED_FUNCTION_POWER;
+-		};
+-
+-		led@5 {
+-			chan-name = "blue:power";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x5>;
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_POWER;
+-		};
+-
+-		led@6 {
+-			chan-name = "red:wlan-5";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x6>;
+-			color = <LED_COLOR_ID_RED>;
+-			function = LED_FUNCTION_WLAN;
+-			function-enumerator = <5>;
+-		};
+-
+-		led@7 {
+-			chan-name = "red:wan-4";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x7>;
+-			color = <LED_COLOR_ID_RED>;
+-			function = LED_FUNCTION_WAN; /* WWAN/LTE/4G */
+-			function-enumerator = <4>; /* WWAN/LTE/4G */
+-		};
+-
+-		led_cloud_red: led@8 {
+-			chan-name = "red:power";
+-			led-cur = /bits/ 8 <50>;
+-			max-cur = /bits/ 8 <100>;
+-			reg = <0x8>;
+-			color = <LED_COLOR_ID_RED>;
+-			function = LED_FUNCTION_POWER;
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>, <&uart0_ctrl_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&blsp1_uart2 {
+-	pinctrl-0 = <&serial_1_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-	reset-gpios = <&tlmm 41 GPIO_ACTIVE_LOW>;
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+-
+-&vqmmc {
+-	status = "okay";
+-};
+-
+-&sdhci {
+-	status = "okay";
+-	pinctrl-0 = <&sd_pins>;
+-	pinctrl-names = "default";
+-	vqmmc-supply = <&vqmmc>;
+-	non-removable;
+-	#address-cells = <1>;
+-	#size-cells = <0>;
+-
+-	emmc@0 {
+-		compatible = "mmc-card";
+-		reg = <0>;
+-	};
+-};
+-
+-&usb2 {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&usb3_pins>, <&lte_pins>;
+-	pinctrl-names = "default";
+-
+-	dwc3@8a00000 {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+-		device@1 {
+-			compatible = "usb1bc7,1900";
+-			reg = <1>;
+-		};
+-	};
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "lan";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-	label = "wan";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "Sony-NCP-HG100-Cellular";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "Sony-NCP-HG100-Cellular";
+-};
+-
+-&watchdog {
+-	status = "okay";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-oap100.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-oap100.dts
+deleted file mode 100644
+index beb168eb49..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-oap100.dts
++++ /dev/null
+@@ -1,339 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "EdgeCore OAP-100";
+-	compatible = "edgecore,oap100";
+-
+-	aliases {
+-		led-boot = &led_system;
+-		led-failsafe = &led_system;
+-		led-running = &led_system;
+-		led-upgrade = &led_system;
+-	};
+-
+-	chosen {
+-		bootargs-append = " root=/dev/ubiblock0_1";
+-	};
+-
+-	soc {
+-		mdio@90000 {
+-			status = "okay";
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-
+-			dwc3@6000000 {
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-
+-				usb2_port1: port@1 {
+-					reg = <1>;
+-					#trigger-source-cells = <0>;
+-				};
+-			};
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-
+-			dwc3@8a00000 {
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-
+-				usb3_port1: port@1 {
+-					reg = <1>;
+-					#trigger-source-cells = <0>;
+-				};
+-
+-				usb3_port2: port@2 {
+-					reg = <2>;
+-					#trigger-source-cells = <0>;
+-				};
+-			};
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	key {
+-		compatible = "gpio-keys";
+-
+-		button@1 {
+-			label = "reset";
+-			linux,code = <KEY_RESTART>;
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,input-type = <1>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_system: led_system {
+-			label = "green:system";
+-			gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_2g {
+-			label = "blue:wlan2g";
+-			gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_5g {
+-			label = "blue:wlan5g";
+-			gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-
+-	gpio_export {
+-		compatible = "gpio-export";
+-		#size-cells = <0>;
+-
+-		usb {
+-			gpio-export,name = "usb-power";
+-			gpio-export,output = <1>;
+-			gpios = <&tlmm 44 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		poe {
+-			gpio-export,name = "poe-power";
+-			gpio-export,output = <0>;
+-			gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_0_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	nand_pins: nand_pins {
+-		pullups {
+-			pins = "gpio53", "gpio58", "gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		pulldowns {
+-			pins = "gpio54", "gpio55", "gpio56",
+-				"gpio57", "gpio60", "gpio61",
+-				"gpio62", "gpio63", "gpio64",
+-				"gpio65", "gpio66", "gpio67",
+-				"gpio68", "gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		linux,modalias = "m25p80", "gd25q256";
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition0@0 {
+-				label = "0:SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-			partition1@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-			partition2@60000 {
+-				label = "0:QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-			partition3@c0000 {
+-				label = "0:CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-			partition4@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-			partition5@e0000 {
+-				label = "0:APPSBLENV";
+-				reg = <0x000e0000 0x00010000>;
+-				read-only;
+-			};
+-			partition6@f0000 {
+-				label = "0:APPSBL";
+-				reg = <0x000f0000 0x00080000>;
+-				read-only;
+-			};
+-			partition7@170000 {
+-				label = "0:ART";
+-				reg = <0x00170000 0x00010000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-		};
+-	};
+-};
+-
+-&nand {
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "rootfs";
+-				reg = <0x00000000 0x4000000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-	qcom,ath10k-calibration-variant = "Edgecore OAP100";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-	qcom,ath10k-calibration-variant = "Edgecore OAP100";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-orbi.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-orbi.dtsi
+deleted file mode 100644
+index 44dbfef529..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-orbi.dtsi
++++ /dev/null
+@@ -1,338 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	aliases {
+-		led-boot = &led_status_white;
+-		led-failsafe = &led_status_red;
+-		led-running = &led_status_green;
+-		led-upgrade = &led_status_blue;
+-		label-mac-device = &gmac;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-		};
+-
+-		counter@4a1000 {
+-			compatible = "qcom,qca-gcnt";
+-			reg = <0x4a1000 0x4>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			status = "okay";
+-
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-
+-		wps {
+-			label = "wps";
+-			gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led-0 {
+-			label = "green:power";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
+-			default-state = "on";
+-		};
+-
+-		led-1 {
+-			label = "red:power";
+-			gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
+-			panic-indicator;
+-		};
+-
+-		led_status_green: led-2 {
+-			label = "green:status";
+-			gpios = <&tlmm 53 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_status_red: led-3 {
+-			label = "red:status";
+-			gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_status_blue: led-4 {
+-			label = "blue:status";
+-			gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_status_white: led-5 {
+-			label = "white:status";
+-			gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&vqmmc {
+-	status = "okay";
+-};
+-
+-&sdhci {
+-	status = "okay";
+-
+-	pinctrl-0 = <&sd_pins>;
+-	pinctrl-names = "default";
+-	cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
+-	vqmmc-supply = <&vqmmc>;
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	i2c_0_pins: i2c_0_pinmux {
+-		pinmux {
+-			function = "blsp_i2c0";
+-			pins = "gpio58", "gpio59";
+-			bias-disable;
+-		};
+-	};
+-
+-	sd_pins: sd_pins {
+-		pinmux {
+-			function = "sdio";
+-			pins = "gpio23", "gpio24", "gpio25", "gpio26",
+-				"gpio28", "gpio29", "gpio30", "gpio31";
+-			drive-strength = <10>;
+-		};
+-
+-		pinmux_sd_clk {
+-			function = "sdio";
+-			pins = "gpio27";
+-			drive-strength = <16>;
+-		};
+-
+-		pinmux_sd7 {
+-			function = "sdio";
+-			pins = "gpio32";
+-			drive-strength = <10>;
+-			bias-disable;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_i2c3 {
+-	pinctrl-0 = <&i2c_0_pins>;
+-	pinctrl-names = "default";
+-
+-	status = "okay";
+-
+-	led-controller@27 {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-		compatible = "ti,tlc59108"; /* really is tlc59208f */
+-		reg = <0x27>;
+-
+-		led0@0 {
+-			label = "rgb:led0";
+-			reg = <0x0>;
+-			linux,default-trigger = "default-on";
+-		};
+-
+-		led1@1 {
+-			label = "rgb:led1";
+-			reg = <0x1>;
+-			linux,default-trigger = "default-on";
+-		};
+-
+-		led2@2 {
+-			label = "rgb:led2";
+-			reg = <0x2>;
+-			linux,default-trigger = "default-on";
+-		};
+-
+-		led3@3 {
+-			label = "rgb:led3";
+-			reg = <0x3>;
+-			linux,default-trigger = "default-on";
+-		};
+-
+-		led4@4 {
+-			label = "rgb:led4";
+-			reg = <0x4>;
+-			linux,default-trigger = "default-on";
+-		};
+-
+-		led5@5 {
+-			label = "rgb:led5";
+-			reg = <0x5>;
+-			linux,default-trigger = "default-on";
+-		};
+-
+-		led6@6 {
+-			label = "rgb:led6";
+-			reg = <0x6>;
+-			linux,default-trigger = "default-on";
+-		};
+-
+-		led7@7 {
+-			label = "rgb:led7";
+-			reg = <0x7>;
+-			linux,default-trigger = "default-on";
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport1 {
+-	status = "okay";
+-
+-	label = "wan";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-
+-	label = "lan1";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-
+-	label = "lan2";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan3";
+-};
+-
+-&ethphy4 {
+-	status = "disabled";
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-
+-	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
+-	wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi@1,0 {
+-			compatible = "qcom,ath10k";
+-			status = "okay";
+-			reg = <0x00010000 0 0 0 0>;
+-			ieee80211-freq-limit = <5470000 5875000>;
+-			qcom,ath10k-calibration-variant = "Netgear-Orbi-Pro-SRK60";
+-		};
+-	};
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-
+-	qcom,ath10k-calibration-variant = "Netgear-Orbi-Pro-SRK60";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-
+-	qcom,ath10k-calibration-variant = "Netgear-Orbi-Pro-SRK60";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-pa2200.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-pa2200.dts
+deleted file mode 100644
+index 259ea7bb47..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-pa2200.dts
++++ /dev/null
+@@ -1,250 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-/* Copyright (c) 2017-2020, Sven Eckelmann <sven@narfation.org>
+- * Copyright (c) 2018, Marek Lindner <marek.lindner@kaiwoo.ai>
+- */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "Plasma Cloud PA2200";
+-	compatible = "plasmacloud,pa2200";
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART >;
+-		};
+-	};
+-
+-	aliases {
+-		led-boot = &led_power_orange;
+-		led-failsafe = &led_status_blue;
+-		led-running = &led_power_orange;
+-		led-upgrade = &led_status_blue;
+-		label-mac-device = &swport4;
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_power_orange: power_orange {
+-			label = "orange:power";
+-			gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		2g_blue {
+-			label = "blue:2g";
+-			gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy1tpt";
+-		};
+-
+-		2g_green {
+-			label = "green:5g1";
+-			gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		5g2_green {
+-			label = "green:5g2";
+-			gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy2tpt";
+-		};
+-
+-		led_status_blue: status_blue {
+-			label = "blue:status";
+-			gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		/* partitions are passed via bootloader */
+-		partitions {
+-			partition-art {
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-				label = "0:ART";
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-
+-				precal_art_9000: precal@9000 {
+-					reg = <0x9000 0x2f20>;
+-				};
+-
+-				macaddr_gmac0: macaddr@0 {
+-					reg = <0x0 0x6>;
+-				};
+-
+-				macaddr_gmac1: macaddr@6 {
+-					reg = <0x6 0x6>;
+-				};
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
+-	wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi2: wifi@1,0 {
+-			compatible = "qcom,ath10k";
+-			status = "okay";
+-			reg = <0x00010000 0 0 0 0>;
+-			qcom,ath10k-calibration-variant = "PlasmaCloud-PA2200";
+-			ieee80211-freq-limit = <5170000 5350000>;
+-
+-			nvmem-cell-names = "pre-calibration";
+-			nvmem-cells = <&precal_art_9000>;
+-		};
+-	};
+-};
+-
+-&mdio {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "ethernet1";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac0>;
+-};
+-
+-&swport5 {
+-	status = "okay";
+-	label = "ethernet2";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac1>;
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "PlasmaCloud-PA2200";
+-
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "PlasmaCloud-PA2200";
+-	ieee80211-freq-limit = <5470000 5875000>;
+-
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac-128m.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac-128m.dts
+deleted file mode 100644
+index 0896374ab2..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac-128m.dts
++++ /dev/null
+@@ -1,18 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019-r619ac.dtsi"
+-
+-/ {
+-	model = "P&W R619AC 128M";
+-	compatible = "p2w,r619ac-128m";
+-};
+-
+-&nand_rootfs {
+-	/*
+-	 * Watch out: stock MIBIB is set up for a 64MiB chip.
+-	 * If a 128MiB flash chip is used, make sure to have
+-	 * the right values in MIBIB or the device might not
+-	 * boot.
+-	 */
+-	reg = <0x0 0x8000000>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac-64m.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac-64m.dts
+deleted file mode 100644
+index 6c8821a90e..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac-64m.dts
++++ /dev/null
+@@ -1,12 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019-r619ac.dtsi"
+-
+-/ {
+-	model = "P&W R619AC 64M";
+-	compatible = "p2w,r619ac-64m";
+-};
+-
+-&nand_rootfs {
+-	reg = <0x0 0x4000000>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi
+deleted file mode 100644
+index d7a987f98d..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi
++++ /dev/null
+@@ -1,387 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-#include <dt-bindings/leds/common.h>
+-
+-/ {
+-	chosen {
+-		bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
+-	};
+-
+-	aliases {
+-		led-boot = &led_sys;
+-		led-failsafe = &led_sys;
+-		led-running = &led_sys;
+-		led-upgrade = &led_sys;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_sys: led-0 {
+-			label = "blue:sys";
+-			gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_POWER;
+-		};
+-
+-		led-1 {
+-			label = "blue:wlan2g";
+-			gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy0tpt";
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_WLAN;
+-			function-enumerator = <0>;
+-		};
+-
+-		led-2 {
+-			label = "blue:wlan5g";
+-			gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy1tpt";
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_WLAN;
+-			function-enumerator = <1>;
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	flash@0 {
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "MIBIB";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "QSEE";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-			};
+-
+-			partition@c0000 {
+-				label = "CDT";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0xd0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "APPSBLENV";
+-				reg = <0xe0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@f0000 {
+-				label = "APPSBL";
+-				reg = <0xf0000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@170000 {
+-				label = "ART";
+-				reg = <0x170000 0x10000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-		};
+-	};
+-};
+-
+-&nand {
+-	status = "okay";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			nand_rootfs: partition@0 {
+-				label = "ubi";
+-				/* reg defined in 64M/128M variant dts. */
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&pcie_pins>;
+-	perst-gpio = <&tlmm 4 GPIO_ACTIVE_LOW>;
+-	wake-gpio = <&tlmm 40 GPIO_ACTIVE_HIGH>;
+-
+-	/* Free slot for use */
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-	};
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&sdhci {
+-	pinctrl-0 = <&sd_0_pins>;
+-	pinctrl-names = "default";
+-	vqmmc-supply = <&vqmmc>;
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	pcie_pins: pcie_pinmux {
+-		mux {
+-			pins = "gpio2";
+-			function = "gpio";
+-			output-low;
+-			bias-pull-down;
+-		};
+-	};
+-
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	sd_0_pins: sd_0_pinmux {
+-		mux_1 {
+-			pins = "gpio23", "gpio24", "gpio25", "gpio26", "gpio28";
+-			function = "sdio";
+-			drive-strength = <10>;
+-		};
+-
+-		mux_2 {
+-			pins = "gpio27";
+-			function = "sdio";
+-			drive-strength = <16>;
+-		};
+-	};
+-
+-	serial_0_pins: serial0-pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-};
+-
+-&ethphy0 {
+-	qcom,single-led-1000;
+-	qcom,single-led-100;
+-	qcom,single-led-10;
+-};
+-
+-&ethphy1 {
+-	qcom,single-led-1000;
+-	qcom,single-led-100;
+-	qcom,single-led-10;
+-};
+-
+-&ethphy2 {
+-	qcom,single-led-1000;
+-	qcom,single-led-100;
+-	qcom,single-led-10;
+-};
+-
+-&ethphy3 {
+-	qcom,single-led-1000;
+-	qcom,single-led-100;
+-	qcom,single-led-10;
+-};
+-
+-&ethphy4 {
+-	qcom,single-led-1000;
+-	qcom,single-led-100;
+-	qcom,single-led-10;
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport1 {
+-	status = "okay";
+-
+-	label = "lan4";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-
+-	label = "lan3";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-
+-	label = "lan2";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan1";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&vqmmc {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-	qcom,ath10k-calibration-variant = "P&W-R619AC";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-	qcom,ath10k-calibration-variant = "P&W-R619AC";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rbr50.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rbr50.dts
+deleted file mode 100644
+index a803999804..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rbr50.dts
++++ /dev/null
+@@ -1,30 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019-orbi.dtsi"
+-
+-/ {
+-	model = "NETGEAR RBR50";
+-	compatible = "netgear,rbr50";
+-
+-	chosen {
+-		bootargs = "root=/dev/mmcblk0p20 blkdevparts=mmcblk0:512K@17K(0:SBL1)ro,512K(0:BOOTCONFIG)ro,512K(0:QSEE)ro,512K(0:QSEE_ALT)ro,256K(0:CDT)ro,256K(0:CDT_ALT)ro,256K(0:DDRPARAMS)ro,256K(0:APPSBLENV)ro,1M(0:APPSBL)ro,1M(0:APPSBL_ALT)ro,256K(0:ART)ro,256K(ARTMTD)ro,2M(language)ro,256K(config)ro,256K(pot)ro,256K(traffic_meter)ro,256K(pot_bak)ro,256K(traffic_meter.bak)ro,3840K(kernel),31488K(rootfs),35328K@9233K(firmware),256K(mtdoops)ro,1457651200(reserved)ro,-(unallocated) rootfstype=squashfs,ext4 rootwait";
+-	};
+-
+-	soc {
+-		usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-		};
+-	};
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rbs50.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rbs50.dts
+deleted file mode 100644
+index 4d0a9132c6..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rbs50.dts
++++ /dev/null
+@@ -1,30 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019-orbi.dtsi"
+-
+-/ {
+-	model = "NETGEAR RBS50";
+-	compatible = "netgear,rbs50";
+-
+-	chosen {
+-		bootargs = "root=/dev/mmcblk0p20 blkdevparts=mmcblk0:512K@17K(0:SBL1)ro,512K(0:BOOTCONFIG)ro,512K(0:QSEE)ro,512K(0:QSEE_ALT)ro,256K(0:CDT)ro,256K(0:CDT_ALT)ro,256K(0:DDRPARAMS)ro,256K(0:APPSBLENV)ro,1M(0:APPSBL)ro,1M(0:APPSBL_ALT)ro,256K(0:ART)ro,256K(ARTMTD)ro,2M(language)ro,256K(config)ro,256K(pot)ro,256K(traffic_meter)ro,256K(pot_bak)ro,256K(traffic_meter.bak)ro,3840K(kernel),31488K(rootfs),35328K@9233K(firmware),256K(mtdoops)ro,1457651200(reserved)ro,-(unallocated) rootfstype=squashfs,ext4 rootwait";
+-	};
+-
+-	soc {
+-		usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-		};
+-	};
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rt-ac42u.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rt-ac42u.dts
+deleted file mode 100644
+index f746acfbb9..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rt-ac42u.dts
++++ /dev/null
+@@ -1,325 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/leds/common.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "ASUS RT-AC42U";
+-	compatible = "asus,rt-ac42u";
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x10000000>; /* 256MB */
+-	};
+-
+-	aliases {
+-		led-boot = &led_power;
+-		led-failsafe = &led_power;
+-		led-running = &led_power;
+-		led-upgrade = &led_power;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-
+-			dwc3@8a00000 {
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-
+-				usb3_port1: port@1 {
+-					reg = <1>;
+-					#trigger-source-cells = <0>;
+-				};
+-
+-				usb3_port2: port@2 {
+-					reg = <2>;
+-					#trigger-source-cells = <0>;
+-				};
+-			};
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-
+-		wps {
+-			label = "wps";
+-			gpios = <&tlmm 11 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_power: led-0 {
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_STATUS;
+-			gpios = <&tlmm 40 GPIO_ACTIVE_LOW>;
+-			label = "blue:status";
+-		};
+-
+-		led-1 {
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_WAN;
+-			gpios = <&tlmm 61 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "90000.mdio-1:04:link";
+-		};
+-
+-		led-2 {
+-			color = <LED_COLOR_ID_RED>;
+-			function = LED_FUNCTION_WAN;
+-			gpios = <&tlmm 68 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "none";
+-		};
+-
+-		led-3 {
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_WLAN;
+-			function-enumerator = <0>;
+-			gpios = <&tlmm 52 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy1tpt";
+-		};
+-
+-		led-4 {
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_WLAN;
+-			function-enumerator = <1>;
+-			gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		led-5 {
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_LAN;
+-			function-enumerator = <1>;
+-			gpios = <&tlmm 45 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		led-6 {
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_LAN;
+-			function-enumerator = <2>;
+-			gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		led-7 {
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_LAN;
+-			function-enumerator = <3>;
+-			gpios = <&tlmm 42 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		led-8 {
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_LAN;
+-			function-enumerator = <4>;
+-			gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	serial_0_pins: serial0_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	nand_pins: nand_pins {
+-		pullups {
+-			pins = "gpio53", "gpio58", "gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		pulldowns {
+-			pins = "gpio55", "gpio56", "gpio57", "gpio60",
+-				"gpio62", "gpio63", "gpio64", "gpio65",
+-				"gpio66", "gpio67", "gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&nand {
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x00000000 0x00080000>;
+-				read-only;
+-			};
+-			partition@80000 {
+-				label = "MIBIB";
+-				reg = <0x00080000 0x00080000>;
+-				read-only;
+-			};
+-			partition@100000 {
+-				label = "QSEE";
+-				reg = <0x00100000 0x00100000>;
+-				read-only;
+-			};
+-			partition@200000 {
+-				label = "CDT";
+-				reg = <0x00200000 0x00080000>;
+-				read-only;
+-			};
+-			partition@280000 {
+-				label = "APPSBL";
+-				reg = <0x00280000 0x00140000>;
+-				read-only;
+-			};
+-			partition@3C0000 {
+-				label = "APPSBLENV";
+-				reg = <0x003C0000 0x00040000>;
+-				read-only;
+-			};
+-			partition@400000 {
+-				label = "ubi";
+-				reg = <0x00400000 0x07C00000>;
+-			};
+-		};
+-	};
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport1 {
+-	status = "okay";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "ASUS-RT-AC42U";
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
+-	wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-	clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>;
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi2: wifi@1,0 {
+-			compatible = "qcom,ath10k";
+-			reg = <0x00010000 0 0 0 0>;
+-
+-			qcom,ath10k-calibration-variant = "ASUS-RT-AC42U";
+-		};
+-	};
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts
+deleted file mode 100644
+index 6fce4ae87b..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts
++++ /dev/null
+@@ -1,393 +0,0 @@
+-// SPDX-License-Identifier: ISC
+-// Copyright (c) 2015, The Linux Foundation. All rights reserved.
+-// Copyright (c) 2019, Cezary Jackiewicz <cezary@eko.one.pl>.
+-// Copyright (c) 2020, Pawel Dembicki <paweldembicki@gmail.com>.
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-
+-/ {
+-	model = "Cell C RTL30VW";
+-	compatible = "cellc,rtl30vw";
+-
+-	aliases {
+-		led-boot = &led_power_blue;
+-		led-failsafe = &led_power_red;
+-		led-running = &led_power_blue;
+-		led-upgrade = &led_power_red;
+-	};
+-
+-	chosen {
+-		bootargs-append = "ubi.mtd=ubifs root=/dev/ubiblock0_0 rootfstype=squashfs ro";
+-	};
+-
+-	led_spi {
+-		compatible = "spi-gpio";
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-		num-chipselects = <1>;
+-
+-		mosi-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
+-		cs-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
+-		sck-gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
+-
+-		led_gpio: led_gpio@0 {
+-			compatible = "fairchild,74hc595";
+-			reg = <0>;
+-			gpio-controller;
+-			#gpio-cells = <2>;
+-			registers-number = <2>;
+-			spi-max-frequency = <1000000>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_power_blue: power_blue {
+-			gpios = <&led_gpio 0 GPIO_ACTIVE_HIGH>;
+-			label = "blue:power";
+-			default-state = "on";
+-		};
+-
+-		led_power_red: power_red {
+-			gpios = <&led_gpio 1 GPIO_ACTIVE_HIGH>;
+-			label = "red:power";
+-		};
+-
+-		tp28 {
+-			gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
+-			label = "ext:tp28";
+-			default-state = "keep";
+-		};
+-
+-		tp27 {
+-			gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>;
+-			label = "ext:tp27";
+-			default-state = "keep";
+-		};
+-
+-		wlan2g {
+-			gpios = <&led_gpio 8 GPIO_ACTIVE_HIGH>;
+-			label = "blue:wlan2g";
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		wlan5g {
+-			gpios = <&led_gpio 9 GPIO_ACTIVE_HIGH>;
+-			label = "blue:wlan5g";
+-			linux,default-trigger = "phy1tpt";
+-		};
+-
+-		wps {
+-			gpios = <&led_gpio 10 GPIO_ACTIVE_HIGH>;
+-			label = "blue:wps";
+-		};
+-
+-		voip {
+-			gpios = <&led_gpio 11 GPIO_ACTIVE_HIGH>;
+-			label = "blue:voip";
+-		};
+-
+-		s1 {
+-			gpios = <&led_gpio 12 GPIO_ACTIVE_HIGH>;
+-			label = "blue:s1";
+-		};
+-
+-		s2 {
+-			gpios = <&led_gpio 13 GPIO_ACTIVE_HIGH>;
+-			label = "blue:s2";
+-		};
+-
+-		s3 {
+-			gpios = <&led_gpio 14 GPIO_ACTIVE_HIGH>;
+-			label = "blue:s3";
+-		};
+-
+-		s4 {
+-			gpios = <&led_gpio 15 GPIO_ACTIVE_HIGH>;
+-			label = "blue:s4";
+-		};
+-
+-		signal {
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-			label = "red:signal";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		wps {
+-			label = "wps";
+-			linux,code = <KEY_WPS_BUTTON>;
+-			gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		reset {
+-			label = "reset";
+-			linux,code = <KEY_RESTART>;
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		/*"n25q128a11" is required for proper nand recognition in u-boot. */
+-		compatible = "jedec,spi-nor", "n25q128a11";
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:SBL1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "0:QSEE";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-				};
+-
+-			partition@c0000 {
+-				label = "0:CDT";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0xd0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "0:APPSBLENV";
+-				reg = <0xe0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@f0000 {
+-				label = "0:APPSBL";
+-				reg = <0xf0000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@170000 {
+-				label = "0:ART";
+-				reg = <0x170000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@180000 {
+-				label = "0:BOOTCONFIG";
+-				reg = <0x180000 0x10000>;
+-				read-only;
+-			};
+-		};
+-	};
+-
+-	flash@1 {
+-		/*
+-		 * Factory U-boot looks in 0:BOOTCONFIG partition for active
+-		 * partitions settings and mangle partition config. So kernel
+-		 * /kernel_1 and rootfs/rootfs_1 pairs can be swaped.
+-		 * It isn't a problem but we never can be sure where OFW put
+-		 * factory images. "spinand,mt29f" value is required for proper
+-		 * nand recognition in u-boot.
+-		 */
+-		compatible = "spi-nand","spinand,mt29f";
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-		reg = <1>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "kernel";
+-				reg = <0x0 0x400000>;
+-			};
+-
+-			partition@400000 {
+-				label = "rootfs";
+-				reg = <0x400000 0x2000000>;
+-			};
+-
+-			partition@2400000 {
+-				label = "kernel_1";
+-				reg = <0x2400000 0x400000>;
+-			};
+-
+-			partition@2800000 {
+-				label = "rootfs_1";
+-				reg = <0x2800000 0x2000000>;
+-			};
+-
+-			partition@4800000 {
+-				label = "ubifs";
+-				reg = <0x4800000 0x3800000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio54", "gpio59";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "cellc,rtl30vw";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "cellc,rtl30vw";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-
+-	label = "lan1";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan2";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-srr60.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-srr60.dts
+deleted file mode 100644
+index 80bcb2e204..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-srr60.dts
++++ /dev/null
+@@ -1,12 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019-orbi.dtsi"
+-
+-/ {
+-	model = "NETGEAR SRR60";
+-	compatible = "netgear,srr60";
+-
+-	chosen {
+-		bootargs = "root=/dev/mmcblk0p20 blkdevparts=mmcblk0:512K@17K(0:SBL1)ro,512K(0:BOOTCONFIG)ro,512K(0:QSEE)ro,512K(0:QSEE_1)ro,256K(0:CDT)ro,256K(0:CDT_1)ro,512K(0:BOOTCONFIG1)ro,256K(0:APPSBLENV)ro,1M(0:APPSBL)ro,1M(0:APPSBL_1)ro,256K(0:ART)ro,256K(ARTMTD)ro,2M(language)ro,256K(config)ro,256K(pot)ro,256K(traffic_meter)ro,256K(pot_bak)ro,256K(traffic_meter.bak)ro,3840K(kernel),31488K(rootfs),35328K@9233K(firmware),256K(mtdoops)ro,64K(cert)ro,3840K(kernel-2)ro,31488K(rootfs-2)ro,35328K@44881K(firmware-2)ro,5M(device_table)ro,17M(cp_file)ro,102737K(reserved)ro,-(unallocated) rootfstype=squashfs,ext4 rootwait";
+-	};
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-srs60.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-srs60.dts
+deleted file mode 100644
+index 65bb7ac397..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-srs60.dts
++++ /dev/null
+@@ -1,12 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019-orbi.dtsi"
+-
+-/ {
+-	model = "NETGEAR SRS60";
+-	compatible = "netgear,srs60";
+-
+-	chosen {
+-		bootargs = "root=/dev/mmcblk0p20 blkdevparts=mmcblk0:512K@17K(0:SBL1)ro,512K(0:BOOTCONFIG)ro,512K(0:QSEE)ro,512K(0:QSEE_1)ro,256K(0:CDT)ro,256K(0:CDT_1)ro,512K(0:BOOTCONFIG1)ro,256K(0:APPSBLENV)ro,1M(0:APPSBL)ro,1M(0:APPSBL_1)ro,256K(0:ART)ro,256K(ARTMTD)ro,2M(language)ro,256K(config)ro,256K(pot)ro,256K(traffic_meter)ro,256K(pot_bak)ro,256K(traffic_meter.bak)ro,3840K(kernel),31488K(rootfs),35328K@9233K(firmware),256K(mtdoops)ro,64K(cert)ro,3840K(kernel-2)ro,31488K(rootfs-2)ro,35328K@44881K(firmware-2)ro,5M(device_table)ro,17M(cp_file)ro,102737K(reserved)ro,-(unallocated) rootfstype=squashfs,ext4 rootwait";
+-	};
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019-32m.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019-32m.dts
+deleted file mode 100644
+index 4efcdaf394..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019-32m.dts
++++ /dev/null
+@@ -1,88 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019-u4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-
+-/ {
+-	model = "Unielec U4019 (32M)";
+-	compatible = "unielec,u4019-32m","unielec,u4019","qcom,ipq4019";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
+-
+-	flash@0 {
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <24000000>;
+-		broken-flash-reset;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:SBL1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-			partition@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-			partition@60000 {
+-				label = "0:QSEE";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-			};
+-			partition@c0000 {
+-				label = "0:CDT";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-			partition@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0xd0000 0x10000>;
+-				read-only;
+-			};
+-			partition@e0000 {
+-				label = "0:APPSBLENV";
+-				reg = <0xe0000 0x10000>;
+-				read-only;
+-			};
+-			partition@f0000 {
+-				label = "0:APPSBL";
+-				reg = <0xf0000 0x80000>;
+-				read-only;
+-			};
+-			partition@170000 {
+-				label = "0:ART";
+-				reg = <0x170000 0x10000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-			partition@180000 {
+-				compatible = "denx,fit";
+-				label = "firmware";
+-				reg = <0x180000 0x1e80000>;
+-			};
+-		};
+-	};
+-};
+-
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019.dtsi
+deleted file mode 100644
+index c7439b87ec..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019.dtsi
++++ /dev/null
+@@ -1,216 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	compatible = "unielec,u4019","qcom,ipq4019";
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-			reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
+-			reset-delay-us = <2000>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-
+-			dwc3@6000000 {
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-
+-				port@1 {
+-					reg = <1>;
+-					#trigger-source-cells = <0>;
+-				};
+-			};
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-
+-			dwc3@8a00000 {
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-
+-				port@1 {
+-					reg = <1>;
+-					#trigger-source-cells = <0>;
+-				};
+-
+-				port@2 {
+-					reg = <2>;
+-					#trigger-source-cells = <0>;
+-				};
+-			};
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-
+-		aliases {
+-			led-boot = &led_status;
+-			led-failsafe = &led_status;
+-			led-running = &led_status;
+-			led-upgrade = &led_status;
+-			serial0 = &blsp1_uart1;
+-			serial1 = &blsp1_uart2;
+-		};
+-
+-		leds {
+-			compatible = "gpio-leds";
+-			pinctrl-0 = <&led_pins>;
+-			pinctrl-names = "default";
+-
+-			led_status: led2 {
+-				label = "green:led2";
+-				gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
+-			};
+-		};
+-
+-		keys {
+-			compatible = "gpio-keys";
+-
+-			reset {
+-				label = "reset";
+-				gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-				linux,code = <KEY_RESTART>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&blsp1_uart2 {
+-	pinctrl-0 = <&serial_1_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	serial_0_pins: serial0-pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-	serial_1_pins: serial1_pinmux {
+-		mux {
+-			pins = "gpio8", "gpio9";
+-			function = "blsp_uart1";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	led_pins: led_pinmux {
+-		mux {
+-			function = "gpio";
+-			pins = "gpio68";
+-			bias-disabled;
+-			output-low;
+-		};
+-	};
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-whw03v2.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-whw03v2.dts
+deleted file mode 100644
+index 1f0572b879..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-whw03v2.dts
++++ /dev/null
+@@ -1,519 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-#include <dt-bindings/leds/common.h>
+-
+-/ {
+-	model = "Linksys WHW03 V2 (Velop)";
+-	compatible = "linksys,whw03v2", "qcom,ipq4019";
+-
+-	aliases {
+-		led-boot = &led_blue;
+-		led-failsafe = &led_red;
+-		led-running = &led_green;
+-		led-upgrade = &led_red;
+-	};
+-
+-	// The arguments rootfstype and ro are needed
+-	// to override the default bootargs
+-	chosen {
+-		bootargs-append = " root=/dev/ubiblock0_0 rootfstype=squashfs ro";
+-		stdout-path = &blsp1_uart1;
+-	};
+-
+-	soc {
+-		ess-tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-	};
+-
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-};
+-
+-
+-&tlmm {
+-	mdio_pins: mdio-pinmux {
+-		mux-1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-
+-		mux-2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	i2c_0_pins: i2c-0-pinmux {
+-		mux {
+-			function = "blsp_i2c0";
+-			pins = "gpio20", "gpio21";
+-			bias-disable;
+-		};
+-	};
+-
+-	serial_0_pins: serial0-pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	serial_1_pins: serial1-pinmux {
+-		mux {
+-			pins = "gpio8", "gpio9", "gpio10", "gpio11";
+-			function = "blsp_uart1";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi-0-pinmux {
+-		mux {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		mux-cs {
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	spi_1_pins: spi-1-pinmux {
+-		mux-1 {
+-			function = "blsp_spi1";
+-			pins = "gpio44", "gpio46","gpio47";
+-			bias-disable;
+-		};
+-
+-		mux-2 {
+-			pins = "gpio31", "gpio45", "gpio49";
+-			function = "gpio";
+-			bias-pull-up;
+-			output-high;
+-		};
+-
+-		host-interrupt {
+-			pins = "gpio42";
+-			function = "gpio";
+-			input;
+-		};
+-	};
+-
+-	wifi_0_pins: wifi0-pinmux {
+-		btcoexist {
+-			bias-pull-up;
+-			drive-strength = <6>;
+-			function = "gpio";
+-			output-high;
+-			pins = "gpio52";
+-		};
+-	};
+-
+-	zigbee-0 {
+-		gpio-hog;
+-		gpios = <29 GPIO_ACTIVE_HIGH>;
+-		bias-disable;
+-		output-low;
+-	};
+-
+-	zigbee-1 {
+-		gpio-hog;
+-		gpios = <50 GPIO_ACTIVE_HIGH>;
+-		bias-disable;
+-		input;
+-	};
+-
+-	bluetooth-enable {
+-		gpio-hog;
+-		gpios = <32 GPIO_ACTIVE_HIGH>;
+-		output-high;
+-	};
+-};
+-
+-&mdio {
+-	status = "okay";
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-	phy-reset-gpios = <&tlmm 19 GPIO_ACTIVE_LOW>;
+-};
+-
+-&ethphy0 {
+-	status = "disabled";
+-};
+-
+-&ethphy1 {
+-	status = "disabled";
+-};
+-
+-&ethphy2 {
+-	status = "disabled";
+-};
+-
+-&ethphy3 {
+-	reg = <0x1b>;
+-};
+-
+-&ethphy4 {
+-	reg = <0x1c>;
+-};
+-
+-&psgmiiphy {
+-	reg = <0x1d>;
+-};
+-
+-&watchdog {
+-	status = "okay";
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	num-channels = <4>;
+-	qcom,num-ees = <2>;
+-
+-	status = "okay";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-	pinctrl-0 = <&serial_0_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&blsp1_uart2 {
+-	status = "okay";
+-	pinctrl-0 = <&serial_1_pins>;
+-	pinctrl-names = "default";
+-
+-	bluetooth {
+-		compatible = "csr,8811";
+-
+-		enable-gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
+-	};
+-};
+-
+-&blsp1_spi2 {
+-	pinctrl-0 = <&spi_1_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	cs-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
+-
+-	zigbee@0 {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+-		compatible = "silabs,em3581";
+-		reg = <0>;
+-		spi-max-frequency = <12000000>;
+-	};
+-};
+-
+-&blsp1_i2c3 {
+-	pinctrl-0 = <&i2c_0_pins>;
+-	pinctrl-names = "default";
+-
+-	status = "okay";
+-
+-	// RGB LEDs
+-	pca9633: led-controller {
+-		compatible = "nxp,pca9633";
+-		nxp,hw-blink;
+-		reg = <0x62>;
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+-		led_red: red@0 {
+-			label = "red";
+-			color = <LED_COLOR_ID_RED>;
+-			function = LED_FUNCTION_INDICATOR;
+-			linux,default-trigger = "none";
+-			reg = <0>;
+-		};
+-
+-		led_green: green@1 {
+-			label = "green";
+-			color = <LED_COLOR_ID_GREEN>;
+-			function = LED_FUNCTION_INDICATOR;
+-			linux,default-trigger = "none";
+-			reg = <1>;
+-		};
+-
+-		led_blue: blue@2 {
+-			label = "blue";
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_INDICATOR;
+-			linux,default-trigger = "default-on";
+-			reg = <2>;
+-		};
+-	};
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&nand {
+-	status = "okay";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x0 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@100000 {
+-				label = "MIBIB";
+-				reg = <0x100000 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@200000 {
+-				label = "QSEE";
+-				reg = <0x200000 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@300000 {
+-				label = "CDT";
+-				reg = <0x300000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@380000 {
+-				label = "APPSBL";
+-				reg = <0x380000 0x200000>;
+-				read-only;
+-			};
+-
+-			partition@580000 {
+-				label = "ART";
+-				reg = <0x580000 0x80000>;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-				read-only;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-
+-				precal_art_9000: precal@9000 {
+-					reg = <0x9000 0x2f20>;
+-				};
+-
+-				macaddr_gmac0: macaddr@0 {
+-					reg = <0x0 0x6>;
+-				};
+-
+-				macaddr_gmac1: macaddr@6 {
+-					reg = <0x6 0x6>;
+-				};
+-			};
+-
+-			partition@600000 {
+-				label = "u_env";
+-				reg = <0x600000 0x80000>;
+-			};
+-
+-			partition@680000 {
+-				label = "s_env";
+-				reg = <0x680000 0x40000>;
+-			};
+-
+-			partition@6c0000 {
+-				label = "devinfo";
+-				reg = <0x6c0000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@700000 {
+-				label = "kernel";
+-				reg = <0x700000 0xa100000>;
+-			};
+-
+-			partition@d00000 {
+-				label = "rootfs";
+-				reg = <0xd00000 0x9b00000>;
+-			};
+-
+-			partition@a800000 {
+-				label = "alt_kernel";
+-				reg = <0xa800000 0xa100000>;
+-			};
+-
+-			partition@ae00000 {
+-				label = "alt_rootfs";
+-				reg = <0xae00000 0x9b00000>;
+-			};
+-
+-			partition@14900000 {
+-				label = "sysdiag";
+-				reg = <0x14900000 0x200000>;
+-				read-only;
+-			};
+-
+-			partition@14b00000 {
+-				label = "syscfg";
+-				reg = <0x14b00000 0xb500000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-
+-	perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
+-	wake-gpios = <&tlmm 40 GPIO_ACTIVE_LOW>;
+-	clkreq-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi2: wifi@1,0 {
+-			compatible = "qcom,ath10k";
+-			reg = <0x00010000 0 0 0 0>;
+-		};
+-	};
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "lan";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac1>;
+-};
+-
+-&swport5 {
+-	status = "okay";
+-	label = "wan";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac0>;
+-};
+-
+-&wifi0 {
+-	pinctrl-0 = <&wifi_0_pins>;
+-	pinctrl-names = "default";
+-
+-	status = "okay";
+-
+-	qcom,coexist-support = <1>;
+-	qcom,coexist-gpio-pin = <0x34>;
+-
+-	ieee80211-freq-limit = <2401000 2473000>;
+-	qcom,ath10k-calibration-variant = "linksys-whw03v2";
+-
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_1000>, <&macaddr_gmac0>;
+-	mac-address-increment = <1>;
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-
+-	ieee80211-freq-limit = <5170000 5250000>;
+-	qcom,ath10k-calibration-variant = "linksys-whw03v2";
+-
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_5000>, <&macaddr_gmac0>;
+-	mac-address-increment = <2>;
+-};
+-
+-&wifi2 {
+-	status = "okay";
+-
+-	ieee80211-freq-limit = <5735000 5835000>;
+-	qcom,ath10k-calibration-variant = "linksys-whw03v2";
+-
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_9000>, <&macaddr_gmac0>;
+-	mac-address-increment = <3>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wifi.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wifi.dts
+deleted file mode 100644
+index f92c289738..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wifi.dts
++++ /dev/null
+@@ -1,447 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0
+-/*
+- * Copyright (c) 2016, 2018 The Linux Foundation. All rights reserved.
+- * Copyright (c) 2016 Google, Inc
+- */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/leds/common.h>
+-
+-/ {
+-	model = "Google WiFi (Gale)";
+-	compatible = "google,wifi", "google,gale-v2", "qcom,ipq4019";
+-
+-	aliases {
+-		label-mac-device = &gmac0;
+-		led-boot = &led0_blue;
+-		led-failsafe = &led0_red;
+-		led-running = &led0_blue;
+-		led-upgrade = &led0_red;
+-	};
+-
+-	chosen {
+-		/*
+-		 * rootwait: in case we're booting from slow/async USB storage.
+-		 */
+-		bootargs-append = " rootwait";
+-		stdout-path = &blsp1_uart1;
+-	};
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x20000000>; /* 512MB */
+-	};
+-
+-	soc {
+-		edma@c080000 {
+-			/*
+-			 * Factory bootloader (depthcharge) will fail to boot
+-			 * if this exact path (soc/edma@c080000/gmac0) doesn't
+-			 * exist.
+-			 */
+-			gmac0: gmac0 {
+-			};
+-
+-			/*
+-			 * Factory bootloader (depthcharge) will fail to boot
+-			 * if this exact path (soc/edma@c080000/gmac1) doesn't
+-			 * exist.
+-			 */
+-			gmac1 {
+-			};
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-		pinctrl-0 = <&fw_pinmux>;
+-		pinctrl-names = "default";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	fw_pinmux: fw_pinmux {
+-		wp {
+-			pins = "gpio53";
+-			output-low;
+-		};
+-		recovery {
+-			pins = "gpio57";
+-			function = "gpio";
+-			bias-none;
+-		};
+-		developer {
+-			pins = "gpio41";
+-			bias-none;
+-		};
+-	};
+-
+-	reset802_15_4 {
+-		pins = "gpio60";
+-	};
+-
+-	led_reset {
+-		pins = "gpio22";
+-		output-high;
+-	};
+-
+-	sys_reset {
+-		pins = "gpio19";
+-		output-high;
+-	};
+-
+-	rx_active {
+-		pins = "gpio43";
+-		bias-pull,down;
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14","gpio15";
+-		};
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-		};
+-		pinconf {
+-			pins = "gpio13", "gpio14","gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pinconf_cs {
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	spi_1_pins: spi_1_pinmux {
+-		pinmux {
+-			function = "blsp_spi1";
+-			pins = "gpio44", "gpio46","gpio47";
+-		};
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio45";
+-		};
+-		pinconf {
+-			pins = "gpio44", "gpio46","gpio47";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pinconf_cs {
+-			pins = "gpio45";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	serial_0_pins: serial0_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	serial_1_pins: serial1_pinmux {
+-		mux {
+-			pins = "gpio8", "gpio9", "gpio10", "gpio11";
+-			function = "blsp_uart1";
+-			bias-disable;
+-		};
+-	};
+-
+-	i2c_0_pins: i2c_0_pinmux {
+-		mux {
+-			pins = "gpio20", "gpio21";
+-			function = "blsp_i2c0";
+-			drive-open-drain;
+-		};
+-	};
+-
+-	i2c_1_pins: i2c_1_pinmux {
+-		mux {
+-			pins = "gpio34", "gpio35";
+-			function = "blsp_i2c1";
+-			drive-open-drain;
+-		};
+-	};
+-
+-	sd_0_pins: sd_0_pinmux {
+-		sd0 {
+-			pins = "gpio23", "gpio24", "gpio25", "gpio26", "gpio29", "gpio30", "gpio31", "gpio32";
+-			function = "sdio";
+-			drive-strength = <10>;
+-			bias-pull-up;
+-			pull-up-res = <0>;
+-		};
+-		sdclk {
+-			pins = "gpio27";
+-			function = "sdio";
+-			drive-strength = <2>;
+-			bias-pull-up;
+-			pull-up-res = <0>;
+-		};
+-		sdcmd {
+-			pins = "gpio28";
+-			function = "sdio";
+-			drive-strength = <10>;
+-			bias-pull-up;
+-			pull-up-res = <0>;
+-		};
+-	};
+-
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-disable;
+-		};
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-disable;
+-		};
+-		mux_3 {
+-			pins = "gpio40";
+-			function = "gpio";
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	wifi1_1_pins: wifi2_pinmux {
+-		mux {
+-			pins = "gpio58";
+-			output-low;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_i2c3 {
+-	pinctrl-0 = <&i2c_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	tpm@20 {
+-		compatible = "infineon,slb9645tt";
+-		reg = <0x20>;
+-		powered-while-suspended;
+-	};
+-};
+-
+-&blsp1_i2c4 {
+-	pinctrl-0 = <&i2c_1_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	led-controller@32 {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-		compatible = "national,lp5523";
+-		reg = <0x32>;
+-		clock-mode = /bits/ 8 <1>;
+-
+-#if 1
+-		led0_red: led@0 {
+-			reg = <0>;
+-			chan-name = "LED0_Red";
+-			led-cur = /bits/ 8 <0x64>;
+-			max-cur = /bits/ 8 <0x78>;
+-			color = <LED_COLOR_ID_RED>;
+-			function = LED_FUNCTION_FAULT;
+-		};
+-
+-		led@1 {
+-			reg = <1>;
+-			chan-name = "LED0_Green";
+-			led-cur = /bits/ 8 <0x64>;
+-			max-cur = /bits/ 8 <0x78>;
+-			color = <LED_COLOR_ID_GREEN>;
+-		};
+-
+-		led0_blue: led@2 {
+-			reg = <2>;
+-			chan-name = "LED0_Blue";
+-			led-cur = /bits/ 8 <0x64>;
+-			max-cur = /bits/ 8 <0x78>;
+-			color = <LED_COLOR_ID_BLUE>;
+-			function = LED_FUNCTION_POWER;
+-		};
+-#else
+-		/*
+-		 * openwrt isn't ready to handle multi-intensity leds yet
+-		 * # echo 255 255 255 > /sys/class/leds/tricolor/multi_intensity
+-		 * # echo 255 > /sys/class/leds/tricolor/brightness
+-		 */
+-		multi-led@2 {
+-			function = LED_FUNCTION_POWER;
+-			reg = <2>;
+-			color = <LED_COLOR_ID_RGB>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-
+-			led@0 {
+-				reg = <0>;
+-				chan-name = "tricolor";
+-				led-cur = /bits/ 8 <0x64>;
+-				max-cur = /bits/ 8 <0x78>;
+-				color = <LED_COLOR_ID_RED>;
+-			};
+-
+-			led@1 {
+-				reg = <1>;
+-				chan-name = "tricolor";
+-				led-cur = /bits/ 8 <0x64>;
+-				max-cur = /bits/ 8 <0x78>;
+-				color = <LED_COLOR_ID_GREEN>;
+-			};
+-
+-			led@2 {
+-				reg = <2>;
+-				chan-name = "tricolor";
+-				led-cur = /bits/ 8 <0x64>;
+-				max-cur = /bits/ 8 <0x78>;
+-				color = <LED_COLOR_ID_BLUE>;
+-			};
+-		};
+-#endif
+-	};
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-	};
+-};
+-
+-&blsp1_spi2 {
+-	pinctrl-0 = <&spi_1_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
+-
+-	/*
+-	 * This "spidev" was included in the manufacturer device tree. I
+-	 * suspect it's the (unused; and removed from later HW spins) Zigbee
+-	 * radio -- SiliconLabs EM3581 Zigbee? There's no driver or binding for
+-	 * this at the moment.
+-	 */
+-	spidev@0 {
+-		compatible = "spidev";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&blsp1_uart2 {
+-	pinctrl-0 = <&serial_1_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+-
+-&sdhci {
+-	status = "okay";
+-	pinctrl-0 = <&sd_0_pins>;
+-	pinctrl-names = "default";
+-	clock-frequency = <192000000>;
+-	vqmmc-supply = <&vqmmc>;
+-	non-removable;
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&usb2 {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3 {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&vqmmc {
+-	status = "okay";
+-};
+-
+-&watchdog {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "GO_GALE";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	pinctrl-0 = <&wifi1_1_pins>;
+-	pinctrl-names = "default";
+-	qcom,ath10k-calibration-variant = "GO_GALE";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wpj419.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wpj419.dts
+deleted file mode 100644
+index ca37884db2..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wpj419.dts
++++ /dev/null
+@@ -1,370 +0,0 @@
+-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+- * Copyright (c) 2019, Nguyen Dinh Phi <phi_nguyen@compex.com.sg>
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- *
+- */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "Compex WPJ419";
+-	compatible = "compex,wpj419", "qcom,ipq4019";
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x10000000>;
+-	};
+-
+-	reserved-memory {
+-		ranges;
+-		rsvd1@87000000 {
+-			/* Reserved for other subsystem */
+-			reg = <0x87000000 0x500000>;
+-			no-map;
+-		};
+-		wifi_dump@87500000 {
+-			reg = <0x87500000 0x600000>;
+-			no-map;
+-		};
+-
+-		rsvd2@87B00000 {
+-			/* Reserved for other subsystem */
+-			reg = <0x87B00000 0x500000>;
+-			no-map;
+-		};
+-	};
+-
+-	chosen {
+-		bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
+-	};
+-
+-	soc {
+-		pinctrl@1000000 {
+-			mdio_pins: mdio_pinmux {
+-				mux_1 {
+-					pins = "gpio6";
+-					function = "mdio";
+-					bias-pull-up;
+-				};
+-
+-				mux_2 {
+-					pins = "gpio7";
+-					function = "mdc";
+-					bias-pull-up;
+-				};
+-			};
+-
+-			serial_0_pins: serial_pinmux {
+-				mux {
+-					pins = "gpio16", "gpio17";
+-					function = "blsp_uart0";
+-					bias-disable;
+-				};
+-			};
+-
+-			serial_1_pins: serial1_pinmux {
+-				mux {
+-					pins = "gpio8", "gpio9", "gpio10", "gpio11";
+-					function = "blsp_uart1";
+-					bias-disable;
+-				};
+-			};
+-
+-			spi_0_pins: spi_0_pinmux {
+-				pinmux {
+-					function = "blsp_spi0";
+-					pins = "gpio13", "gpio14", "gpio15";
+-					bias-disable;
+-				};
+-
+-				pinmux_cs {
+-					function = "gpio";
+-					pins = "gpio12";
+-					bias-disable;
+-					output-high;
+-				};
+-			};
+-
+-			i2c_0_pins: i2c_0_pinmux {
+-				mux {
+-					pins = "gpio20", "gpio21";
+-					function = "blsp_i2c0";
+-					bias-disable;
+-				};
+-			};
+-
+-			nand_pins: nand_pins {
+-				pullups {
+-					pins = "gpio52", "gpio53", "gpio58", "gpio59";
+-					function = "qpic";
+-					bias-pull-up;
+-				};
+-
+-				pulldowns {
+-					pins = "gpio54", "gpio55", "gpio56",
+-					"gpio57", "gpio60", "gpio61",
+-					"gpio62", "gpio63", "gpio64",
+-					"gpio65", "gpio66", "gpio67",
+-					"gpio68", "gpio69";
+-					function = "qpic";
+-					bias-pull-down;
+-				};
+-			};
+-
+-			led_0_pins: led0_pinmux {
+-				mux_1 {
+-					pins = "gpio36";
+-					function = "led0";
+-					bias-pull-down;
+-				};
+-				mux_2 {
+-					pins = "gpio40";
+-					function = "led4";
+-					bias-pull-down;
+-				};
+-			};
+-		};
+-
+-		blsp_dma: dma@7884000 {
+-			status = "okay";
+-		};
+-
+-		spi_0: spi@78b5000 {
+-			pinctrl-0 = <&spi_0_pins>;
+-			pinctrl-names = "default";
+-			status = "okay";
+-			cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>, <&tlmm 41 GPIO_ACTIVE_HIGH>;
+-			num-cs = <2>;
+-
+-			flash0@0 {
+-				reg = <0>;
+-				compatible = "jedec,spi-nor";
+-				spi-max-frequency = <24000000>;
+-				broken-flash-reset;
+-
+-				partitions {
+-					compatible = "fixed-partitions";
+-					#address-cells = <1>;
+-					#size-cells = <1>;
+-
+-					partition@0 {
+-						label = "0:SBL1";
+-						reg = <0x000000 0x040000>;
+-						read-only;
+-					};
+-
+-					partition@40000 {
+-						label = "0:MIBIB";
+-						reg = <0x040000 0x020000>;
+-						read-only;
+-					};
+-
+-					partition@60000 {
+-						label = "0:QSEE";
+-						reg = <0x060000 0x060000>;
+-						read-only;
+-					};
+-
+-					partition@c0000 {
+-						label = "0:CDT";
+-						reg = <0x0c0000 0x010000>;
+-						read-only;
+-					};
+-
+-					partition@d0000 {
+-						label = "0:DDRPARAMS";
+-						reg = <0x0d0000 0x010000>;
+-						read-only;
+-					};
+-
+-					partition@e0000 {
+-						label = "u-boot-env";
+-						reg = <0x0e0000 0x010000>;
+-					};
+-
+-					partition@f0000 {
+-						label = "u-boot";
+-						reg = <0x0f0000 0x080000>;
+-						read-only;
+-					};
+-
+-					partition@170000 {
+-						label = "0:ART";
+-						reg = <0x170000 0x010000>;
+-						read-only;
+-						compatible = "nvmem-cells";
+-						#address-cells = <1>;
+-						#size-cells = <1>;
+-
+-						precal_art_1000: precal@1000 {
+-							reg = <0x1000 0x2f20>;
+-						};
+-
+-						precal_art_5000: precal@5000 {
+-							reg = <0x5000 0x2f20>;
+-						};
+-					};
+-				};
+-			};
+-
+-			nand@1 {
+-				reg = <1>;
+-				status = "okay";
+-				compatible = "spi-nand";
+-				spi-max-frequency = <24000000>;
+-
+-				partitions {
+-					compatible = "fixed-partitions";
+-					#address-cells = <1>;
+-					#size-cells = <1>;
+-
+-					/* The device has 128MB, but we can only address
+-					 * 64MB because of the bootloader's default settings.
+-					 * This is due to the old mt29f driver,
+-					 * which detected the deivce with only 64MB
+-					 */
+-					partition@0 {
+-						label = "ubi";
+-						reg = <0x0000000 0x4000000>;
+-					};
+-				};
+-			};
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-			reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
+-			reset-delay-us = <5000>;
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		i2c_0: i2c@78b7000 {
+-			pinctrl-0 = <&i2c_0_pins>;
+-			pinctrl-names = "default";
+-			status = "okay";
+-		};
+-
+-		serial@78af000 {
+-			pinctrl-0 = <&serial_0_pins>;
+-			pinctrl-names = "default";
+-			status = "okay";
+-		};
+-
+-		serial@78b0000 {
+-			pinctrl-0 = <&serial_1_pins>;
+-			pinctrl-names = "default";
+-			status = "okay";
+-		};
+-
+-		usb3_ss_phy: ssphy@9a000 {
+-			status = "okay";
+-		};
+-
+-		usb3_hs_phy: hsphy@a6000 {
+-			status = "okay";
+-		};
+-
+-		usb3: usb3@8af8800 {
+-			status = "okay";
+-		};
+-
+-		usb2_hs_phy: hsphy@a8000 {
+-			status = "okay";
+-		};
+-
+-		usb2: usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		cryptobam: dma@8e04000 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-
+-		qpic_bam: dma@7984000 {
+-			status = "okay";
+-		};
+-
+-		pcie0: pci@40000000 {
+-			status = "okay";
+-			perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
+-			wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-};
+-
+-&nand {
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wtr-m2133hp.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wtr-m2133hp.dts
+deleted file mode 100644
+index 3260de23bd..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wtr-m2133hp.dts
++++ /dev/null
+@@ -1,462 +0,0 @@
+-// SPDX-License-Identifier: ISC
+-/*
+- * Copyright (c) 2015 - 2016, The Linux Foundation. All rights reserved.
+- * Copyright (c) 2020 Yanase Yuki <dev@zpc.sakura.ne.jp>
+- */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "Buffalo WTR-M2133HP";
+-	compatible = "buffalo,wtr-m2133hp", "qcom,ipq4019";
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x20000000>;
+-	};
+-
+-	chosen {
+-		/*
+-		 * U-Boot adds "ubi.mtd=rootfs root=mtd:ubi_rootfs" to
+-		 * kernel command line. But we use different partition names,
+-		 * so we have to set correct parameters.
+-		 */
+-		bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
+-	};
+-
+-	aliases {
+-		led-boot = &led_power_blue;
+-		led-failsafe = &led_power_orange;
+-		led-running = &led_power_white;
+-		led-upgrade = &led_power_blue;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_power_white: power_white {
+-			label = "white:power";
+-			gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_power_orange: power_orange {
+-			label = "orange:power";
+-			gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_power_blue: power_blue {
+-			label = "blue:power";
+-			gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		router_white {
+-			label = "white:router";
+-			gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		router_orange {
+-			label = "orange:router";
+-			gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		internet_white {
+-			label = "white:internet";
+-			gpios = <&tlmm 27 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		internet_orange {
+-			label = "orange:internet";
+-			gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wireless_white {
+-			label = "white:wireless";
+-			gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wireless_orange {
+-			label = "orange:wireless";
+-			gpios = <&tlmm 44 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		auto_mode {
+-			label = "auto_mode";
+-			gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
+-			linux,code = <BTN_0>;
+-			linux,input-type = <EV_SW>;
+-		};
+-
+-		router_mode {
+-			label = "router_mode";
+-			gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
+-			linux,code = <BTN_1>;
+-			linux,input-type = <EV_SW>;
+-		};
+-
+-		ap_mode {
+-			label = "ap_mode";
+-			gpios = <&tlmm 11 GPIO_ACTIVE_LOW>;
+-			linux,code = <BTN_2>;
+-			linux,input-type = <EV_SW>;
+-		};
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-
+-		wps {
+-			label = "AOSS Button";
+-			gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	serial_0_pins: serial0_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	nand_pins: nand_pins {
+-		pullups {
+-			pins = "gpio52", "gpio53", "gpio58",
+-				"gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		pulldowns {
+-			pins = "gpio54", "gpio55", "gpio56",
+-				"gpio57", "gpio60", "gpio61",
+-				"gpio62", "gpio63", "gpio64",
+-				"gpio65", "gpio66", "gpio67",
+-				"gpio68", "gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-
+-	usb_power {
+-		line-name = "USB power";
+-		gpios = <34 GPIO_ACTIVE_HIGH>;
+-		gpio-hog;
+-		output-high;
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi@0,0 {
+-			compatible = "qcom,ath10k";
+-			reg = <0 0 0 0 0>;
+-			nvmem-cell-names = "pre-calibration", "mac-address";
+-			nvmem-cells = <&precal_art_9000>, <&macaddr_orgdata_32>;
+-			qcom,ath10k-calibration-variant = "Buffalo-WTR-M2133HP";
+-		};
+-	};
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&nand {
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "SBL1";
+-				reg = <0x0000000 0x0100000>;
+-				read-only;
+-			};
+-
+-			partition@100000 {
+-				label = "MIBIB";
+-				reg = <0x0100000 0x0100000>;
+-				read-only;
+-			};
+-
+-			partition@200000 {
+-				label = "BOOTCONFIG";
+-				reg = <0x0200000 0x0100000>;
+-				read-only;
+-			};
+-
+-			partition@300000 {
+-				label = "QSEE";
+-				reg = <0x0300000 0x0100000>;
+-				read-only;
+-			};
+-
+-			partition@400000 {
+-				label = "QSEE_1";
+-				reg = <0x0400000 0x0100000>;
+-				read-only;
+-			};
+-
+-			partition@500000 {
+-				label = "CDT";
+-				reg = <0x0500000 0x0080000>;
+-				read-only;
+-			};
+-
+-			partition@580000 {
+-				label = "CDT_1";
+-				reg = <0x0580000 0x0080000>;
+-				read-only;
+-			};
+-
+-			partition@600000 {
+-				label = "BOOTCONFIG1";
+-				reg = <0x0600000 0x0080000>;
+-				read-only;
+-			};
+-
+-			partition@680000 {
+-				label = "APPSBLENV";
+-				reg = <0x0680000 0x0080000>;
+-			};
+-
+-			partition@700000 {
+-				label = "APPSBL";
+-				reg = <0x0700000 0x0200000>;
+-				read-only;
+-			};
+-
+-			partition@900000 {
+-				label = "APPSBL_1";
+-				reg = <0x0900000 0x0200000>;
+-				read-only;
+-			};
+-
+-			partition@b00000 {
+-				label = "ART";
+-				reg = <0x0b00000 0x0080000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-
+-				precal_art_9000: precal@9000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-
+-			partition@b80000 {
+-				label = "ART_1";
+-				reg = <0x0b80000 0x0080000>;
+-				read-only;
+-			};
+-
+-			orgdata: partition@c00000 {
+-				label = "ORGDATA";
+-				reg = <0x0c00000 0x0080000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				macaddr_orgdata_20: macaddr@20 {
+-					reg = <0x20 0x6>;
+-				};
+-				macaddr_orgdata_26: macaddr@26 {
+-					reg = <0x26 0x6>;
+-				};
+-				macaddr_orgdata_2c: macaddr@2c {
+-					reg = <0x2c 0x6>;
+-				};
+-				macaddr_orgdata_32: macaddr@32 {
+-					reg = <0x32 0x6>;
+-				};
+-			};
+-
+-			partition@c80000 {
+-				label = "ORGDATA_1";
+-				reg = <0x0c80000 0x0080000>;
+-				read-only;
+-			};
+-
+-			partition@d00000 {
+-				label = "ubi";
+-				reg = <0x0d00000 0x2900000>;
+-			};
+-
+-			partition@3600000 {
+-				label = "rootfs_recover";
+-				reg = <0x3600000 0x2900000>;
+-				read-only;
+-			};
+-
+-			partition@5f00000 {
+-				label = "user_property";
+-				reg = <0x5f00000 0x1a20000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_1000>, <&macaddr_orgdata_26>;
+-	qcom,ath10k-calibration-variant = "Buffalo-WTR-M2133HP";
+-	ieee80211-freq-limit = <2400000 2483000>;
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_5000>, <&macaddr_orgdata_2c>;
+-	qcom,ath10k-calibration-variant = "Buffalo-WTR-M2133HP";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-	label = "lan3";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-	label = "lan2";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "lan1";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_orgdata_20>;
+-};
+-
+-&mdio {
+-	status = "okay";
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-	reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-x1pro.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-x1pro.dts
+deleted file mode 100644
+index 681300c502..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-x1pro.dts
++++ /dev/null
+@@ -1,89 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-/dts-v1/;
+-
+-#include "qcom-ipq4019-x1pro.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-
+-/ {
+-	model = "Telco X1 Pro";
+-	compatible = "tel,x1pro","qcom,ipq4019";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
+-
+-	flash@0 {
+-		reg = <0>;
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <24000000>;
+-		broken-flash-reset;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "0:SBL1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-			partition@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-			partition@60000 {
+-				label = "0:QSEE";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-			};
+-			partition@c0000 {
+-				label = "0:CDT";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-			partition@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0xd0000 0x10000>;
+-				read-only;
+-			};
+-			partition@e0000 {
+-				label = "0:APPSBLENV";
+-				reg = <0xe0000 0x10000>;
+-				read-only;
+-			};
+-			partition@f0000 {
+-				label = "0:APPSBL";
+-				reg = <0xf0000 0x80000>;
+-				read-only;
+-			};
+-			art: partition@170000 {
+-				label = "0:ART";
+-				reg = <0x170000 0x10000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-			partition@180000 {
+-				compatible = "denx,fit";
+-				label = "firmware";
+-				reg = <0x180000 0x1e80000>;
+-			};
+-		};
+-	};
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-x1pro.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-x1pro.dtsi
+deleted file mode 100644
+index 3de6a10433..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-x1pro.dtsi
++++ /dev/null
+@@ -1,216 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	compatible = "tel,x1pro","qcom,ipq4019";
+-	aliases {
+-		led-boot = &led_status;
+-		led-failsafe = &led_status;
+-		led-running = &led_status;
+-		led-upgrade = &led_status;
+-		serial0 = &blsp1_uart1;
+-		serial1 = &blsp1_uart2;
+-	};
+-
+-	soc {
+-
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-			reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
+-			reset-delay-us = <2000>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-
+-			dwc3@6000000 {
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-
+-				port@1 {
+-					reg = <1>;
+-					#trigger-source-cells = <0>;
+-				};
+-			};
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-
+-			dwc3@8a00000 {
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-
+-				port@1 {
+-					reg = <1>;
+-					#trigger-source-cells = <0>;
+-				};
+-
+-				port@2 {
+-					reg = <2>;
+-					#trigger-source-cells = <0>;
+-				};
+-			};
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-
+-		leds {
+-			compatible = "gpio-leds";
+-			pinctrl-0 = <&led_pins>;
+-			pinctrl-names = "default";
+-
+-			led_status: status {
+-				label = "green:status";
+-				gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
+-			};
+-		};
+-
+-		keys {
+-			compatible = "gpio-keys";
+-
+-			reset {
+-				label = "reset";
+-				gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-				linux,code = <KEY_RESTART>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&blsp1_uart2 {
+-	pinctrl-0 = <&serial_1_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	serial_0_pins: serial0-pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-	serial_1_pins: serial1_pinmux {
+-		mux {
+-			pins = "gpio8", "gpio9";
+-			function = "blsp_uart1";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	led_pins: led_pinmux {
+-		mux {
+-			function = "gpio";
+-			pins = "gpio68";
+-			bias-disabled;
+-			output-low;
+-		};
+-	};
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi
+deleted file mode 100644
+index 141ea60442..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi
++++ /dev/null
+@@ -1,326 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-/*
+- * Device Tree Source for Linksys xx8300 (Dallas)
+- *
+- * Copyright (C) 2019, 2022 Jeff Kletsky
+- * Updated 2020 Hans Geiblinger
+- *
+- */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-	//
+-	// OEM U-Boot provides either
+-	// init=/sbin/init rootfstype=ubifs ubi.mtd=11,2048 \
+-	//                 root=ubi0:ubifs rootwait rw
+-	// or the same with ubi.mtd=13,2048
+-	//
+-
+-/ {
+-	chosen {
+-		bootargs-append = " root=/dev/ubiblock0_0 rootfstype=squashfs ro";
+-	};
+-
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-
+-			dwc3@6000000 {
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-
+-				usb2_port1: port@1 {
+-					reg = <1>;
+-					#trigger-source-cells = <0>;
+-				};
+-			};
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-
+-			dwc3@8a00000 {
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-
+-				usb3_port1: port@1 {
+-					reg = <1>;
+-					#trigger-source-cells = <0>;
+-				};
+-
+-				usb3_port2: port@2 {
+-					reg = <2>;
+-					#trigger-source-cells = <0>;
+-				};
+-			};
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	regulator-usb-vbus {
+-		compatible = "regulator-fixed";
+-		regulator-name = "USB_VBUS";
+-		regulator-min-microvolt = <5000000>;
+-		regulator-max-microvolt = <5000000>;
+-		regulator-always-on;
+-		regulator-boot-on;
+-		gpio = <&tlmm 68 GPIO_ACTIVE_LOW>;
+-	};
+-};
+-
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-	pinctrl-0 = <&serial_0_pins>;
+-	pinctrl-names = "default";
+-
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&nand {
+-	status = "okay";
+-
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "sbl1";
+-				reg = <0x0 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@100000 {
+-				label = "mibib";
+-				reg = <0x100000 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@200000 {
+-				label = "qsee";
+-				reg = <0x200000 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@300000 {
+-				label = "cdt";
+-				reg = <0x300000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@380000 {
+-				label = "appsblenv";
+-				reg = <0x380000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@400000 {
+-				label = "ART";
+-				reg = <0x400000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@480000 {
+-				label = "appsbl";
+-				reg = <0x480000 0x200000>;
+-				read-only;
+-			};
+-
+-			partition@680000 {
+-				label = "u_env";
+-				reg = <0x680000 0x80000>;
+-				// writable -- U-Boot environment
+-			};
+-
+-			partition@700000 {
+-				label = "s_env";
+-				reg = <0x700000 0x40000>;
+-				// writable -- Boot counter records
+-			};
+-
+-			partition@740000 {
+-				label = "devinfo";
+-				reg = <0x740000 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@780000 {
+-				label = "kernel";
+-				reg = <0x780000 0x5800000>;
+-			};
+-
+-			partition@c80000 {
+-				label = "rootfs";
+-				reg = <0xc80000 0x5300000>;
+-			};
+-
+-			partition@5f80000 {
+-				label = "alt_kernel";
+-				reg = <0x5f80000 0x5800000>;
+-			};
+-
+-			partition@6480000 {
+-				label = "alt_rootfs";
+-				reg = <0x6480000 0x5300000>;
+-			};
+-
+-			partition@b780000 {
+-				label = "sysdiag";
+-				reg = <0xb780000 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@b880000 {
+-				label = "syscfg";
+-				reg = <0xb880000 0x4680000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-
+-	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
+-	wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi2: wifi@1,0 {
+-			compatible = "qcom,ath10k";
+-			reg = <0x00010000 0 0 0 0>;
+-		};
+-	};
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	serial_0_pins: serial0-pinmux {
+-		pins = "gpio16", "gpio17";
+-		function = "blsp_uart0";
+-		bias-disable;
+-	};
+-
+-	nand_pins: nand_pins {
+-		pullups {
+-			pins = "gpio53", "gpio58", "gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		// gpio61 controls led_usb
+-
+-		pulldowns {
+-			pins =  "gpio55", "gpio56", "gpio57",
+-				"gpio60", "gpio62", "gpio63",
+-				"gpio64", "gpio65", "gpio66",
+-				"gpio67", "gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport1 {
+-	status = "okay";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts
+deleted file mode 100644
+index 48b5cd53d8..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts
++++ /dev/null
+@@ -1,304 +0,0 @@
+-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+- * Copyright (c) 2017, Christian Mehlis <christian@m3hlis.de>
+- * Copyright (c) 2017-2018, Sven Eckelmann <sven.eckelmann@openmesh.com>
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- *
+- */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "Compex WPJ428";
+-	compatible = "compex,wpj428";
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-			reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
+-			reset-delay-us = <2000>;
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2: usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		usb3: usb3@8af8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	aliases {
+-		led-boot = &status;
+-		led-failsafe = &status;
+-		led-upgrade = &status;
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		status: rss4 {
+-			label = "green:rss4";
+-			gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		rss3 {
+-			label = "green:rss3";
+-			gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-
+-	beeper: beeper {
+-		compatible = "gpio-beeper";
+-		gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
+-	};
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio53";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-
+-		mux_2 {
+-			pins = "gpio52";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	m25p80@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition0@0 {
+-				label = "0:SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-			partition1@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-			partition2@60000 {
+-				label = "0:QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-			partition3@c0000 {
+-				label = "0:CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-			partition4@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-			partition5@e0000 {
+-				label = "0:APPSBLENV"; /* uboot env*/
+-				reg = <0x000e0000 0x00010000>;
+-				read-only;
+-			};
+-			partition5@f0000 {
+-				label = "0:APPSBL"; /* uboot */
+-				reg = <0x000f0000 0x00080000>;
+-				read-only;
+-			};
+-			partition5@170000 {
+-				label = "0:ART";
+-				reg = <0x00170000 0x00010000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-
+-				macaddr_art_e010: mac-address@e010 {
+-					reg = <0xe010 0x6>;
+-				};
+-
+-				macaddr_art_e018: mac-address@e018 {
+-					reg = <0xe018 0x6>;
+-				};
+-			};
+-			partition6@180000 {
+-				compatible = "denx,fit";
+-				label = "firmware";
+-				reg = <0x00180000 0x01e80000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "lan1";
+-
+-	nvmem-cells = <&macaddr_art_e018>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-	label = "lan2";
+-
+-	nvmem-cells = <&macaddr_art_e010>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts
+deleted file mode 100644
+index 6cbfa8f37d..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts
++++ /dev/null
+@@ -1,196 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only OR MIT
+-
+-#include "qcom-ipq4029-aruba-glenmorangie.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-
+-/ {
+-	model = "Aruba AP-303";
+-	compatible = "aruba,ap-303";
+-
+-	aliases {
+-		led-boot = &led_system_green;
+-		led-failsafe = &led_system_red;
+-		led-running = &led_system_green;
+-		led-upgrade = &led_system_red;
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		wifi_green {
+-			label = "green:wifi";
+-			gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		wifi_amber {
+-			label = "amber:wifi";
+-			gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy1tpt";
+-		};
+-
+-		led_system_red: system_red {
+-			label = "red:system";
+-			gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_system_green: system_green {
+-			label = "green:system";
+-			gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	/*
+-	 * In addition to the Pins listed below,
+-	 * the following GPIOs have "features":
+-	 * 54 - out - active low to force HW reset
+-	 * 41 - out - active low to reset TPM
+-	 * 43 - out - active low to reset BLE radio
+-	 * 19 - in  - active high when DC powered
+-	 */
+-
+-	phy-reset {
+-		line-name = "PHY-reset";
+-		gpios = <42 GPIO_ACTIVE_HIGH>;
+-		gpio-hog;
+-		output-high;
+-	};
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			/*
+-			 * There is no partition map for the NOR flash
+-			 * in the stock firmware.
+-			 *
+-			 * All partitions here are based on offsets
+-			 * found in the U-Boot GPL code and information
+-			 * from smem.
+-			 */
+-
+-			partition@0 {
+-				label = "sbl1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "mibib";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "qsee";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-			};
+-
+-			partition@c0000 {
+-				label = "cdt";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "ddrparams";
+-				reg = <0xd0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "ART";
+-				reg = <0xe0000 0x10000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-
+-			partition@f0000 {
+-				label = "appsbl";
+-				reg = <0xf0000 0xf0000>;
+-				read-only;
+-			};
+-
+-			partition@1e0000 {
+-				label = "mfginfo";
+-				reg = <0x1e0000 0x10000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				macaddr_mfginfo_1d: macaddr@1d {
+-					reg = <0x1d 0x6>;
+-				};
+-			};
+-
+-			partition@1f0000 {
+-				label = "apcd";
+-				reg = <0x1f0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@200000 {
+-				label = "osss";
+-				reg = <0x200000 0x180000>;
+-				read-only;
+-			};
+-
+-			partition@380000 {
+-				label = "appsblenv";
+-				reg = <0x380000 0x10000>;
+-			};
+-
+-			partition@390000 {
+-				label = "pds";
+-				reg = <0x390000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3a0000 {
+-				label = "fcache";
+-				reg = <0x3a0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3b0000 {
+-				/* Called osss1 in smem */
+-				label = "u-boot-env-bak";
+-				reg = <0x3b0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3f0000 {
+-				label = "u-boot-env";
+-				reg = <0x3f0000 0x10000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303h.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303h.dts
+deleted file mode 100644
+index 23abb3537c..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303h.dts
++++ /dev/null
+@@ -1,472 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "Aruba AP-303H";
+-	compatible = "aruba,ap-303h";
+-
+-	aliases {
+-		led-boot = &led_system_green;
+-		led-failsafe = &led_system_red;
+-		led-running = &led_system_green;
+-		led-upgrade = &led_system_amber;
+-	};
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x10000000>;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-
+-			reset-gpios = <&tlmm 19 GPIO_ACTIVE_LOW>;
+-			reset-delay-us = <2000>;
+-		};
+-
+-		counter@4a1000 {
+-			compatible = "qcom,qca-gcnt";
+-			reg = <0x4a1000 0x4>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-
+-		i2c_0: i2c@78b7000 {
+-			pinctrl-0 = <&i2c_0_pins>;
+-			pinctrl-names = "default";
+-			status = "okay";
+-
+-			tpm@29 {
+-				/* No Driver */
+-				compatible = "atmel,at97sc3203";
+-				reg = <0x29>;
+-				read-only;
+-			};
+-
+-			power-monitor@40 {
+-				/* No driver */
+-				compatible = "isl,isl28022";
+-				reg = <0x40>;
+-			};
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		wifi_green {
+-			label = "green:wifi";
+-			gpios = <&tlmm 27 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		wifi_amber {
+-			label = "amber:wifi";
+-			gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy1tpt";
+-		};
+-
+-		pse {
+-			label = "green:pse";
+-			gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_system_red: system_red {
+-			label = "red:system";
+-			gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_system_green: system_green {
+-			label = "green:system";
+-			gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		led_system_amber: system_amber {
+-			label = "amber:system";
+-			gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "Reset button";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&blsp1_uart2 {
+-	/* Texas Instruments CC2540T BLE radio */
+-	pinctrl-0 = <&serial_1_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	/*
+-	 * In addition to the Pins listed below,
+-	 * the following GPIOs have "features":
+-	 * 39 - out - active low to force HW reset
+-	 * 32 - out - active low to reset TPM
+-	 * 43 - out - active low to reset BLE radio
+-	 * 41 - out - pulse to set warm reset status
+-	 * 34 - out - active low to enable PSE port
+-	 * 22 - in  - active low when 802.3at powered
+-	 * 29 - in  - active high when DC powered
+-	 * 40 - in  - active low when reset due to cold HW reset
+-	 * 30 - in  - active low when USB overcurrent detected
+-	 * 35 - in  - interrupt line for power monitor chip
+-	 * 31 - in  - active low when PSE port active
+-	 */
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio12", "gpio59";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	i2c_0_pins: i2c_0_pinmux {
+-		mux {
+-			pins = "gpio20", "gpio21";
+-			function = "blsp_i2c0";
+-			drive-strength = <4>;
+-			bias-disable;
+-		};
+-	};
+-
+-	serial_0_pins: serial_0_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	serial_1_pins: serial_1_pinmux {
+-		mux {
+-			pins = "gpio8", "gpio9";
+-			function = "blsp_uart1";
+-			bias-disable;
+-		};
+-	};
+-
+-	usb-power {
+-		line-name = "USB-power";
+-		gpios = <23 GPIO_ACTIVE_HIGH>;
+-		gpio-hog;
+-		output-high;
+-	};
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			/*
+-			 * There is no partition map for the NOR flash
+-			 * in the stock firmware.
+-			 *
+-			 * All partitions here are based on offsets
+-			 * found in the U-Boot GPL code and information
+-			 * from smem.
+-			 */
+-
+-			partition@0 {
+-				label = "sbl1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "mibib";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "qsee";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-			};
+-
+-			partition@c0000 {
+-				label = "cdt";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "ddrparams";
+-				reg = <0xd0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "appsblenv";
+-				reg = <0xe0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@f0000 {
+-				label = "appsbl";
+-				reg = <0xf0000 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@1e0000 {
+-				label = "ART";
+-				reg = <0x1f0000 0x10000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-
+-			partition@1f0000 {
+-				label = "osss";
+-				reg = <0x200000 0x170000>;
+-				read-only;
+-			};
+-
+-			partition@200000 {
+-				label = "pds";
+-				reg = <0x370000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@380000 {
+-				label = "apcd";
+-				reg = <0x380000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@390000 {
+-				label = "mfginfo";
+-				reg = <0x390000 0x10000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				macaddr_mfginfo_1d: macaddr@1d {
+-					reg = <0x1d 0x6>;
+-				};
+-
+-				macaddr_mfginfo_45: macaddr@45 {
+-					reg = <0x45 0x6>;
+-				};
+-			};
+-
+-			partition@3a0000 {
+-				label = "fcache";
+-				reg = <0x3a0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3b0000 {
+-				/* Called osss1 in smem */
+-				label = "u-boot-env-bak";
+-				reg = <0x3b0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3f0000 {
+-				label = "u-boot-env";
+-				reg = <0x3c0000 0x40000>;
+-				read-only;
+-			};
+-		};
+-	};
+-
+-	flash@1 {
+-		status = "okay";
+-
+-		compatible = "spi-nand";
+-		reg = <1>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				/* 'aos0' in Aruba firmware */
+-				label = "aos0";
+-				reg = <0x0 0x2000000>;
+-				read-only;
+-			};
+-
+-			partition@2000000 {
+-				/* 'aos1' in Aruba firmware */
+-				label = "ubi";
+-				reg = <0x2000000 0x2000000>;
+-			};
+-
+-			partition@4000000 {
+-				label = "aruba-ubifs";
+-				reg = <0x4000000 0x4000000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport2 {
+-	status = "okay";
+-
+-	label = "lan1";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-
+-	label = "lan2";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan3";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	label = "wan";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_1000>, <&macaddr_mfginfo_45>;
+-	qcom,ath10k-calibration-variant = "Aruba-AP-303";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_5000>, <&macaddr_mfginfo_45>;
+-	mac-address-increment = <1>;
+-	qcom,ath10k-calibration-variant = "Aruba-AP-303";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-365.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-365.dts
+deleted file mode 100644
+index 1f7b37d56d..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-365.dts
++++ /dev/null
+@@ -1,219 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only OR MIT
+-
+-#include "qcom-ipq4029-aruba-glenmorangie.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-
+-/ {
+-	model = "Aruba AP-365";
+-	compatible = "aruba,ap-365";
+-
+-	aliases {
+-		led-boot = &led_system_green;
+-		led-failsafe = &led_system_red;
+-		led-running = &led_system_green;
+-		led-upgrade = &led_system_red;
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_system_red: system_red {
+-			label = "red:system";
+-			gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		led_system_green: system_green {
+-			label = "green:system";
+-			gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		system_amber {
+-			label = "amber:system";
+-			gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-
+-	watchdog {
+-		compatible = "linux,wdt-gpio";
+-		gpios = <&tlmm 41 GPIO_ACTIVE_LOW>;
+-		hw_algo = "toggle";
+-		hw_margin_ms = <1000>;
+-		always-running;
+-	};
+-};
+-
+-&tlmm {
+-	/*
+-	 * In addition to the Pins listed below,
+-	 * the following GPIOs have "features":
+-	 * 39 - out - pulse low to reset watchdog status flipflop
+-	 * 40 - out - active high to enable watchdog
+-	 * 41 - out - watchdog poke
+-	 * 42 - out - active low to reset BLE radio
+-	 * 43 - out - active low to reset TPM
+-	 * 47 - out - pulse low to reset warm reset status
+-	 * 54 - out - active low to force HW reset
+-	 * 18 - in  - PHY interrupt line
+-	 * 45 - in  - power monitor interrupt
+-	 * 48 - in  - active low when cold reset
+-	 * 52 - in  - active high when watchdog reset
+-	 */
+-
+-	phy-reset {
+-		line-name = "PHY-reset";
+-		gpios = <42 GPIO_ACTIVE_HIGH>;
+-		gpio-hog;
+-		output-high;
+-	};
+-};
+-
+-&i2c_0 {
+-	power-monitor@40 {
+-		/* No driver */
+-		compatible = "isl,isl28022";
+-		reg = <0x40>;
+-	};
+-
+-	temperature-sensor@48 {
+-		compatible = "adi,ad7416";
+-		reg = <0x48>;
+-	};
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			/*
+-			 * There is no partition map for the NOR flash
+-			 * in the stock firmware.
+-			 *
+-			 * All partitions here are based on offsets
+-			 * found in the U-Boot GPL code and information
+-			 * from smem.
+-			 */
+-
+-			partition@0 {
+-				label = "sbl1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-
+-			partition@40000 {
+-				label = "mibib";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-
+-			partition@60000 {
+-				label = "qsee";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-			};
+-
+-			partition@c0000 {
+-				label = "cdt";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@d0000 {
+-				label = "ddrparams";
+-				reg = <0xd0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@e0000 {
+-				label = "u-boot-env";
+-				reg = <0xe0000 0x10000>;
+-			};
+-
+-			partition@f0000 {
+-				label = "appsbl";
+-				reg = <0xf0000 0x100000>;
+-				read-only;
+-			};
+-
+-			partition@1f0000 {
+-				label = "ART";
+-				reg = <0x1f0000 0x10000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-
+-			partition@200000 {
+-				label = "osss";
+-				reg = <0x200000 0x170000>;
+-				read-only;
+-			};
+-
+-			partition@370000 {
+-				label = "pds";
+-				reg = <0x370000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@380000 {
+-				label = "apcd";
+-				reg = <0x380000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@390000 {
+-				label = "mfginfo";
+-				reg = <0x390000 0x10000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				macaddr_mfginfo_1d: macaddr@1d {
+-					reg = <0x1d 0x6>;
+-				};
+-			};
+-
+-			partition@3a0000 {
+-				label = "fcache";
+-				reg = <0x3a0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@3b0000 {
+-				label = "osss1";
+-				reg = <0x3b0000 0x50000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&wifi0 {
+-	qcom,ath10k-calibration-variant = "Aruba-AP-365";
+-};
+-
+-&wifi1 {
+-	qcom,ath10k-calibration-variant = "Aruba-AP-365";
+-};
+-
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-aruba-glenmorangie.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-aruba-glenmorangie.dtsi
+deleted file mode 100644
+index 41de6bb218..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-aruba-glenmorangie.dtsi
++++ /dev/null
+@@ -1,272 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x10000000>;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-
+-			ethphy: ethernet-phy@5 {
+-				reg = <0x5>;
+-			};
+-		};
+-
+-		counter@4a1000 {
+-			compatible = "qcom,qca-gcnt";
+-			reg = <0x4a1000 0x4>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-
+-		i2c_0: i2c@78b7000 {
+-			pinctrl-0 = <&i2c_0_pins>;
+-			pinctrl-names = "default";
+-			status = "okay";
+-
+-			tpm@29 {
+-				/* No Driver */
+-				compatible = "atmel,at97sc3203";
+-				reg = <0x29>;
+-				read-only;
+-			};
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "Reset button";
+-			gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_uart1 {
+-	/* Texas Instruments CC2540T BLE radio */
+-	pinctrl-0 = <&serial_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&blsp1_uart2 {
+-	pinctrl-0 = <&serial_1_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	nand_pins: nand_pins {
+-		pullups {
+-			pins = "gpio53", "gpio58", "gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		pulldowns {
+-			pins = "gpio54", "gpio55", "gpio56",
+-				"gpio57", "gpio60", "gpio61",
+-				"gpio62", "gpio63", "gpio64",
+-				"gpio65", "gpio66", "gpio67",
+-				"gpio68", "gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	i2c_0_pins: i2c_0_pinmux {
+-		mux {
+-			pins = "gpio10", "gpio11";
+-			function = "blsp_i2c0";
+-			drive-strength = <4>;
+-			bias-disable;
+-		};
+-	};
+-
+-	serial_0_pins: serial_0_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	serial_1_pins: serial_1_pinmux {
+-		mux {
+-			pins = "gpio8", "gpio9";
+-			function = "blsp_uart1";
+-			bias-disable;
+-		};
+-	};
+-};
+-
+-&nand {
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				/* 'aos0' in Aruba firmware */
+-				label = "aos0";
+-				reg = <0x0 0x2000000>;
+-				read-only;
+-			};
+-
+-			partition@2000000 {
+-				/* 'aos1' in Aruba firmware */
+-				label = "ubi";
+-				reg = <0x2000000 0x2000000>;
+-			};
+-
+-			partition@4000000 {
+-				label = "aruba-ubifs";
+-				reg = <0x4000000 0x4000000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-
+-	/delete-property/ psgmii-ethphy;
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	label = "lan";
+-	phy-handle = <&ethphy>;
+-	phy-mode = "rgmii-id";
+-};
+-
+-&ethphy0 {
+-	status = "disabled";
+-};
+-
+-&ethphy1 {
+-	status = "disabled";
+-};
+-
+-&ethphy2 {
+-	status = "disabled";
+-};
+-
+-&ethphy3 {
+-	status = "disabled";
+-};
+-
+-&ethphy4 {
+-	status = "disabled";
+-};
+-
+-&psgmiiphy {
+-	status = "disabled";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_1000>, <&macaddr_mfginfo_1d>;
+-	qcom,ath10k-calibration-variant = "Aruba-AP-303";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_5000>, <&macaddr_mfginfo_1d>;
+-	mac-address-increment = <1>;
+-	qcom,ath10k-calibration-variant = "Aruba-AP-303";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts
+deleted file mode 100644
+index 7e4519a746..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts
++++ /dev/null
+@@ -1,322 +0,0 @@
+-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- *
+- */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "GL.iNet GL-B1300";
+-	compatible = "glinet,gl-b1300";
+-
+-	aliases {
+-		led-boot = &power;
+-		led-failsafe = &power;
+-		led-running = &power;
+-		led-upgrade = &power;
+-		label-mac-device = &swport4;
+-	};
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x10000000>;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		wps {
+-			label = "wps";
+-			gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		power: power {
+-			label = "green:power";
+-			gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
+-			default-state = "on";
+-		};
+-
+-		mesh {
+-			label = "green:mesh";
+-			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan {
+-			label = "green:wlan";
+-			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+-
+-	mx25l25635f@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			SBL1@0 {
+-				label = "SBL1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-
+-			MIBIB@40000 {
+-				label = "MIBIB";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-
+-			QSEE@60000 {
+-				label = "QSEE";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-			};
+-
+-			CDT@c0000 {
+-				label = "CDT";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-
+-			DDRPARAMS@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0xd0000 0x10000>;
+-				read-only;
+-			};
+-
+-			APPSBLENV@e0000 {
+-				label = "APPSBLENV";
+-				reg = <0xe0000 0x10000>;
+-				read-only;
+-			};
+-
+-			APPSBL@f0000 {
+-				label = "APPSBL";
+-				reg = <0xf0000 0x80000>;
+-				read-only;
+-			};
+-
+-			ART@170000 {
+-				label = "ART";
+-				reg = <0x170000 0x10000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-
+-				macaddr_gmac0: macaddr@0 {
+-					reg = <0x0 0x6>;
+-				};
+-
+-				macaddr_gmac1: macaddr@6 {
+-					reg = <0x6 0x6>;
+-				};
+-			};
+-
+-			firmware@180000 {
+-				compatible = "denx,fit";
+-				label = "firmware";
+-				reg = <0x180000 0x1e80000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio60", "gpio61";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio55", "gpio56", "gpio57";
+-		};
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio54";
+-		};
+-		pinconf {
+-			pins = "gpio55", "gpio56", "gpio57";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pinconf_cs {
+-			pins = "gpio54";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport3 {
+-	status = "okay";
+-
+-	label = "lan2";
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac0>;
+-	mac-address-increment = <2>;
+-};
+-
+-&swport4 {
+-	status = "okay";
+-
+-	label = "lan1";
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac0>;
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	nvmem-cell-names = "mac-address";
+-	nvmem-cells = <&macaddr_gmac1>;
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-	qcom,ath10k-calibration-variant = "GL-B1300";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-	qcom,ath10k-calibration-variant = "GL-B1300";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts
+deleted file mode 100644
+index 0e7f4c970f..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts
++++ /dev/null
+@@ -1,357 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "GL.iNet GL-S1300";
+-	compatible = "glinet,gl-s1300";
+-
+-	aliases {
+-		led-boot = &led_power;
+-		led-failsafe = &led_power;
+-		led-running = &led_power;
+-		led-upgrade = &led_power;
+-	};
+-
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x10000000>;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-			status = "okay";
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		usb2@60f8800 {
+-			status = "okay";
+-		};
+-
+-		usb3@8af8800 {
+-			status = "okay";
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		wps {
+-			label = "wps";
+-			gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_WPS_BUTTON>;
+-		};
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_power: power {
+-			label = "green:power";
+-			gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>;
+-			default-state = "on";
+-		};
+-
+-		mesh {
+-			label = "green:mesh";
+-			gpios = <&tlmm 59 GPIO_ACTIVE_HIGH>;
+-		};
+-
+-		wlan {
+-			label = "green:wlan";
+-			gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-	};
+-};
+-
+-&vqmmc {
+-	status = "okay";
+-};
+-
+-&sdhci {
+-	status = "okay";
+-	pinctrl-0 = <&sd_pins>;
+-	pinctrl-names = "default";
+-	cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
+-	vqmmc-supply = <&vqmmc>;
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			SBL1@0 {
+-				label = "SBL1";
+-				reg = <0x0 0x40000>;
+-				read-only;
+-			};
+-
+-			MIBIB@40000 {
+-				label = "MIBIB";
+-				reg = <0x40000 0x20000>;
+-				read-only;
+-			};
+-
+-			QSEE@60000 {
+-				label = "QSEE";
+-				reg = <0x60000 0x60000>;
+-				read-only;
+-			};
+-
+-			CDT@c0000 {
+-				label = "CDT";
+-				reg = <0xc0000 0x10000>;
+-				read-only;
+-			};
+-
+-			DDRPARAMS@d0000 {
+-				label = "DDRPARAMS";
+-				reg = <0xd0000 0x10000>;
+-				read-only;
+-			};
+-
+-			APPSBLENV@e0000 {
+-				label = "APPSBLENV";
+-				reg = <0xe0000 0x10000>;
+-				read-only;
+-			};
+-
+-			APPSBL@f0000 {
+-				label = "APPSBL";
+-				reg = <0xf0000 0x80000>;
+-				read-only;
+-			};
+-
+-			ART@170000 {
+-				label = "ART";
+-				reg = <0x170000 0x10000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-			};
+-
+-			firmware@180000 {
+-				compatible = "denx,fit";
+-				label = "firmware";
+-				reg = <0x180000 0xe80000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_spi2 {
+-	pinctrl-0 = <&spi_1_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	spidev1: spi@0 {
+-		compatible = "silabs,si3210";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&blsp1_uart2 {
+-	pinctrl-0 = <&serial_1_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	serial_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	serial_1_pins: serial1_pinmux {
+-		mux {
+-			pins = "gpio8", "gpio9",
+-				"gpio10", "gpio11";
+-			function = "blsp_uart1";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-		};
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-		};
+-		pinconf {
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pinconf_cs {
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	spi_1_pins: spi_1_pinmux {
+-		mux {
+-			pins = "gpio44", "gpio46", "gpio47";
+-			function = "blsp_spi1";
+-			bias-disable;
+-		};
+-		host_int {
+-			pins = "gpio42";
+-			function = "gpio";
+-			input;
+-		};
+-		cs {
+-			pins = "gpio45";
+-			function = "gpio";
+-			bias-pull-up;
+-		};
+-		wake {
+-			pins = "gpio40";
+-			function = "gpio";
+-			output-high;
+-		};
+-		reset {
+-			pins = "gpio49";
+-			function = "gpio";
+-			output-high;
+-		};
+-	};
+-
+-	sd_pins: sd_pins {
+-		pinmux {
+-			function = "sdio";
+-			pins = "gpio23", "gpio24", "gpio25", "gpio26",
+-				"gpio28", "gpio29", "gpio30", "gpio31";
+-			drive-strength = <10>;
+-		};
+-
+-		pinmux_sd_clk {
+-			function = "sdio";
+-			pins = "gpio27";
+-			drive-strength = <16>;
+-		};
+-
+-		pinmux_sd7 {
+-			function = "sdio";
+-			pins = "gpio32";
+-			drive-strength = <10>;
+-			bias-disable;
+-		};
+-	};
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_1000>;
+-	qcom,ath10k-calibration-variant = "GL-S1300";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration";
+-	nvmem-cells = <&precal_art_5000>;
+-	qcom,ath10k-calibration-variant = "GL-S1300";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-insect-common.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-insect-common.dtsi
+deleted file mode 100644
+index ebfab171f5..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-insect-common.dtsi
++++ /dev/null
+@@ -1,444 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only
+-/*
+- * Device Tree Source for Meraki "Insect" series
+- *
+- * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
+- * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
+- *
+- * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
+- *
+- * This file is licensed under the terms of the GNU General Public
+- * License version 2.  This program is licensed "as is" without
+- * any warranty of any kind, whether express or implied.
+- */
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-#include <dt-bindings/leds/common.h>
+-
+-/ {
+-	aliases {
+-		led-boot = &status_green;
+-		led-failsafe = &status_red;
+-		led-running = &status_green;
+-		led-upgrade = &power_orange;
+-	};
+-
+-	/* Do we really need this defined? */
+-	memory {
+-		device_type = "memory";
+-		reg = <0x80000000 0x10000000>;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-		};
+-
+-		/* It is a 56-bit counter that supplies the count to the ARM arch
+-		   timers and without upstream driver */
+-		counter@4a1000 {
+-			compatible = "qcom,qca-gcnt";
+-			reg = <0x4a1000 0x4>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		serial@78b0000 {
+-			pinctrl-0 = <&serial_1_pins>;
+-			pinctrl-names = "default";
+-			status = "okay";
+-
+-			bluetooth {
+-				compatible = "ti,cc2650";
+-				enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
+-			};
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		power_orange: power {
+-			label = "orange:power";
+-			gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
+-			panic-indicator;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&blsp1_i2c3 {
+-	pinctrl-0 = <&i2c_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	eeprom@50 {
+-		compatible = "atmel,24c64";
+-		pagesize = <32>;
+-		reg = <0x50>;
+-		read-only; /* This holds our MAC & Meraki board-data */
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-
+-		mac_address: mac-address@66 {
+-			reg = <0x66 0x6>;
+-		};
+-	};
+-};
+-
+-&blsp1_i2c4 {
+-	pinctrl-0 = <&i2c_1_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	tricolor: led-controller@30 {
+-		compatible = "ti,lp5562";
+-		reg = <0x30>;
+-		clock-mode = /bits/8 <2>;
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+-		/* RGB led */
+-		status_red: chan@0 {
+-			chan-name = "red:status";
+-			led-cur = /bits/ 8 <0x20>;
+-			max-cur = /bits/ 8 <0x60>;
+-			reg = <0>;
+-			color = <LED_COLOR_ID_RED>;
+-		};
+-
+-		status_green: chan@1 {
+-			chan-name = "green:status";
+-			led-cur = /bits/ 8 <0x20>;
+-			max-cur = /bits/ 8 <0x60>;
+-			reg = <1>;
+-			color = <LED_COLOR_ID_GREEN>;
+-		};
+-
+-		chan@2 {
+-			chan-name = "blue:status";
+-			led-cur = /bits/ 8 <0x20>;
+-			max-cur = /bits/ 8 <0x60>;
+-			reg = <2>;
+-			color = <LED_COLOR_ID_BLUE>;
+-		};
+-
+-		chan@3 {
+-			chan-name = "white:status";
+-			led-cur = /bits/ 8 <0x20>;
+-			max-cur = /bits/ 8 <0x60>;
+-			reg = <3>;
+-			color = <LED_COLOR_ID_WHITE>;
+-		};
+-	};
+-};
+-
+-&nand {
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "sbl1";
+-				reg = <0x00000000 0x00100000>;
+-				read-only;
+-			};
+-			partition@100000 {
+-				label = "mibib";
+-				reg = <0x00100000 0x00100000>;
+-				read-only;
+-			};
+-			partition@200000 {
+-				label = "bootconfig";
+-				reg = <0x00200000 0x00100000>;
+-				read-only;
+-			};
+-			partition@300000 {
+-				label = "qsee";
+-				reg = <0x00300000 0x00100000>;
+-				read-only;
+-			};
+-			partition@400000 {
+-				label = "qsee_alt";
+-				reg = <0x00400000 0x00100000>;
+-				read-only;
+-			};
+-			partition@500000 {
+-				label = "cdt";
+-				reg = <0x00500000 0x00080000>;
+-				read-only;
+-			};
+-			partition@580000 {
+-				label = "cdt_alt";
+-				reg = <0x00580000 0x00080000>;
+-				read-only;
+-			};
+-			partition@600000 {
+-				label = "ddrparams";
+-				reg = <0x00600000 0x00080000>;
+-				read-only;
+-			};
+-			partition@700000 {
+-				label = "u-boot";
+-				reg = <0x00700000 0x00200000>;
+-				read-only;
+-			};
+-			partition@900000 {
+-				label = "u-boot-backup";
+-				reg = <0x00900000 0x00200000>;
+-				read-only;
+-			};
+-			partition@b00000 {
+-				label = "ART";
+-				reg = <0x00b00000 0x00080000>;
+-				read-only;
+-			};
+-			partition@c00000 {
+-				label = "ubi";
+-				reg = <0x00c00000 0x07000000>;
+-				/*
+-				 * Do not try to allocate the remaining
+-				 * 4 MiB to this ubi partition. It will
+-				 * confuse the u-boot and it might not
+-				 * find the kernel partition anymore.
+-				 */
+-			};
+-		};
+-	};
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
+-	wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		wifi2: wifi@1,0 {
+-			compatible = "qcom,ath10k";
+-			status = "okay";
+-			reg = <0x00010000 0 0 0 0>;
+-			nvmem-cells = <&mac_address>;
+-			nvmem-cell-names = "mac-address";
+-			mac-address-increment = <1>;
+-		};
+-	};
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&tlmm {
+-	/*
+-	 * GPIO43 should be 0/1 whenever the unit is
+-	 * powered through PoE or AC-Adapter.
+-	 * That said, playing with this seems to
+-	 * reset the AP.
+-	 */
+-
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	serial_0_pins: serial_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	serial_1_pins: serial1_pinmux {
+-		mux {
+-			/* We use the i2c-0 pins for serial_1 */
+-			pins = "gpio8", "gpio9";
+-			function = "blsp_uart1";
+-			bias-disable;
+-		};
+-	};
+-
+-	i2c_0_pins: i2c_0_pinmux {
+-		pinmux {
+-			function = "blsp_i2c0";
+-			pins = "gpio20", "gpio21";
+-		};
+-		pinconf {
+-			pins = "gpio20", "gpio21";
+-			drive-strength = <16>;
+-			bias-disable;
+-		};
+-	};
+-
+-	i2c_1_pins: i2c_1_pinmux {
+-		pinmux {
+-			function = "blsp_i2c1";
+-			pins = "gpio34", "gpio35";
+-		};
+-		pinconf {
+-			pins = "gpio34", "gpio35";
+-			drive-strength = <16>;
+-			bias-disable;
+-		};
+-	};
+-
+-	nand_pins: nand_pins {
+-		/*
+-		 * There are 18 pins. 15 pins are common between LCD and NAND.
+-		 * The QPIC controller arbitrates between LCD and NAND. Of the
+-		 * remaining 4, 2 are for NAND and 2 are for LCD exclusively.
+-		 *
+-		 * The meraki source hints that the bluetooth module claims
+-		 * pin 52 as well. But sadly, there's no data whenever this
+-		 * is a NAND or LCD exclusive pin or not.
+-		 */
+-
+-		pullups {
+-			pins = "gpio52", "gpio53", "gpio58",
+-				"gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		pulldowns {
+-			pins = "gpio54", "gpio55", "gpio56",
+-				"gpio57", "gpio60", "gpio61",
+-				"gpio62", "gpio63", "gpio64",
+-				"gpio65", "gpio66", "gpio67",
+-				"gpio68", "gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "Meraki-MR33";
+-	nvmem-cells = <&mac_address>;
+-	nvmem-cell-names = "mac-address";
+-	mac-address-increment = <2>;
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "Meraki-MR33";
+-	nvmem-cells = <&mac_address>;
+-	nvmem-cell-names = "mac-address";
+-	mac-address-increment = <3>;
+-};
+-
+-&gmac {
+-	status = "okay";
+-	nvmem-cells = <&mac_address>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&switch {
+-	status = "okay";
+-
+-	/delete-property/ psgmii-ethphy;
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	label = "lan";
+-	phy-handle = <&ethphy1>;
+-	phy-mode = "rgmii-rxid";
+-};
+-
+-&ethphy0 {
+-	status = "disabled";
+-};
+-
+-&ethphy2 {
+-	status = "disabled";
+-};
+-
+-&ethphy3 {
+-	status = "disabled";
+-};
+-
+-&ethphy4 {
+-	status = "disabled";
+-};
+-
+-&psgmiiphy {
+-	status = "disabled";
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-mr33.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-mr33.dts
+deleted file mode 100644
+index 8c8b1b3150..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-mr33.dts
++++ /dev/null
+@@ -1,13 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only
+-// Device Tree Source for Meraki MR33 (Stinkbug)
+-
+-#include "qcom-ipq4029-insect-common.dtsi"
+-
+-/ {
+-	model = "Meraki MR33 Access Point";
+-	compatible = "meraki,mr33";
+-};
+-
+-&tricolor {
+-	enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-mr74.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-mr74.dts
+deleted file mode 100644
+index 904f724652..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-mr74.dts
++++ /dev/null
+@@ -1,13 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only
+-// Device Tree Source for Meraki MR74 (Ladybug)
+-
+-#include "qcom-ipq4029-insect-common.dtsi"
+-
+-/ {
+-	model = "Meraki MR74 Access Point";
+-	compatible = "meraki,mr74";
+-};
+-
+-&tricolor {
+-	enable-gpio = <&tlmm 14 GPIO_ACTIVE_LOW>;
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ws-ap3915i.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ws-ap3915i.dts
+deleted file mode 100644
+index 8794d839a8..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ws-ap3915i.dts
++++ /dev/null
+@@ -1,262 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "Extreme Networks WS-AP3915i";
+-	compatible = "extreme-networks,ws-ap3915i";
+-
+-	aliases {
+-		led-boot = &led_system_green;
+-		led-failsafe = &led_system_amber;
+-		led-running = &led_system_green;
+-		led-upgrade = &led_system_amber;
+-	};
+-
+-	soc {
+-		rng@22000 {
+-			status = "okay";
+-		};
+-
+-		mdio@90000 {
+-			status = "okay";
+-			pinctrl-0 = <&mdio_pins>;
+-			pinctrl-names = "default";
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-
+-		crypto@8e3a000 {
+-			status = "okay";
+-		};
+-
+-		watchdog@b017000 {
+-			status = "okay";
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		led_system_green: system_green {
+-			label = "green:system";
+-			gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		led_system_amber: system_amber {
+-			label = "amber:system";
+-			gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		led_wlan24_green: wlan24_green {
+-			label = "green:wlan24";
+-			gpios = <&tlmm 23 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		led_wlan24_amber: wlan24_amber {
+-			label = "amber:wlan24";
+-			gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		led_wlan5_green: wlan5_green {
+-			label = "green:wlan5";
+-			gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy1tpt";
+-		};
+-
+-		led_wlan5_amber: wlan5_amber {
+-			label = "amber:wlan5";
+-			gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		iot {
+-			label = "blue:iot";
+-			gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART >;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_uart1 {
+-	pinctrl-0 = <&serial_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	status = "okay";
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-
+-	label = "lan";
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pin {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pin_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	serial_pins: serial_0_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "Extreme-Networks-WS-AP3915i";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	qcom,ath10k-calibration-variant = "Extreme-Networks-WS-AP3915i";
+-};
+-
+-&blsp1_spi1 {
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		reg = <0>;
+-		spi-max-frequency = <24000000>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			/* Layout for 0x0 - 0xe0000 unknown */
+-
+-			partition@e0000 {
+-				label = "CFG1";
+-				reg = <0xe0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@f0000 {
+-				label = "BootBAK";
+-				reg = <0xf0000 0x70000>;
+-				read-only;
+-			};
+-
+-			partition@160000 {
+-				label = "WINGCFG1";
+-				reg = <0x160000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@170000 {
+-				label = "ART";
+-				reg = <0x170000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@180000 {
+-				label = "BootPRI";
+-				reg = <0x180000 0x70000>;
+-				read-only;
+-			};
+-
+-			partition@1f0000 {
+-				label = "WINGCFG2";
+-				reg = <0x1f0000 0x10000>;
+-				read-only;
+-			};
+-
+-			partition@200000 {
+-				label = "FS";
+-				reg = <0x200000 0x80000>;
+-				read-only;
+-			};
+-
+-			partition@280000 {
+-				label = "firmware";
+-				reg = <0x280000 0x1d60000>;
+-			};
+-
+-			partition@1fe0000 {
+-				label = "CFG2";
+-				reg = <0x1fe0000 0x10000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq40x9-dr40x9.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq40x9-dr40x9.dts
+deleted file mode 100644
+index b90b6b28c3..0000000000
+--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq40x9-dr40x9.dts
++++ /dev/null
+@@ -1,422 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+-
+-#include "qcom-ipq4019.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/input/input.h>
+-#include <dt-bindings/soc/qcom,tcsr.h>
+-
+-/ {
+-	model = "Wallystech DR40X9";
+-	compatible = "wallys,dr40x9";
+-
+-	chosen {
+-		bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
+-	};
+-
+-	soc {
+-		counter@4a1000 {
+-			compatible = "qcom,qca-gcnt";
+-			reg = <0x4a1000 0x4>;
+-		};
+-
+-		tcsr@1949000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1949000 0x100>;
+-			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-		};
+-
+-		tcsr@194b000 {
+-			status = "okay";
+-
+-			/* select hostmode */
+-			compatible = "qcom,tcsr";
+-			reg = <0x194b000 0x100>;
+-			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-		};
+-
+-		ess_tcsr@1953000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1953000 0x1000>;
+-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-		};
+-
+-		tcsr@1957000 {
+-			compatible = "qcom,tcsr";
+-			reg = <0x1957000 0x100>;
+-			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-		};
+-	};
+-
+-	keys {
+-		compatible = "gpio-keys";
+-
+-		reset {
+-			label = "reset";
+-			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+-			linux,code = <KEY_RESTART>;
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		wlan2g {
+-			label = "dr4029:green:wlan2g";
+-			gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy0tpt";
+-		};
+-
+-		wlan5g {
+-			label = "dr4029:green:wlan5g";
+-			gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "phy1tpt";
+-		};
+-
+-		wlan2g-strength {
+-			label = "dr4029:green:wlan2g-strength";
+-			gpios = <&tlmm 36 GPIO_ACTIVE_LOW>;
+-		};
+-
+-		wlan5g-strength {
+-			label = "dr4029:green:wlan5g-strength";
+-			gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
+-		};
+-	};
+-};
+-
+-&tlmm {
+-	mdio_pins: mdio_pinmux {
+-		mux_1 {
+-			pins = "gpio6";
+-			function = "mdio";
+-			bias-pull-up;
+-		};
+-		mux_2 {
+-			pins = "gpio7";
+-			function = "mdc";
+-			bias-pull-up;
+-		};
+-	};
+-
+-	serial0_pins: serial0_pinmux {
+-		mux {
+-			pins = "gpio16", "gpio17";
+-			function = "blsp_uart0";
+-			bias-disable;
+-		};
+-	};
+-
+-	serial1_pins: serial1_pinmux {
+-		mux {
+-			pins = "gpio8", "gpio9";
+-			function = "blsp_uart1";
+-			bias-disable;
+-		};
+-	};
+-
+-	spi_0_pins: spi_0_pinmux {
+-		pinmux {
+-			function = "blsp_spi0";
+-			pins = "gpio13", "gpio14", "gpio15";
+-			drive-strength = <12>;
+-			bias-disable;
+-		};
+-		pinmux_cs {
+-			function = "gpio";
+-			pins = "gpio12";
+-			drive-strength = <2>;
+-			bias-disable;
+-			output-high;
+-		};
+-	};
+-
+-	nand_pins: nand_pins {
+-		pullups {
+-			pins =  "gpio52", "gpio53", "gpio58", "gpio59";
+-			function = "qpic";
+-			bias-pull-up;
+-		};
+-
+-		pulldowns {
+-			pins = "gpio54", "gpio55", "gpio56", "gpio57",
+-				"gpio60", "gpio62", "gpio63", "gpio64",
+-				"gpio65", "gpio66", "gpio67", "gpio68",
+-				"gpio69";
+-			function = "qpic";
+-			bias-pull-down;
+-		};
+-	};
+-
+-	sd_pins: sd_pins {
+-		pinmux {
+-			function = "sdio";
+-			pins = "gpio23", "gpio24", "gpio25", "gpio26",
+-				"gpio28", "gpio29", "gpio30", "gpio31";
+-			drive-strength = <10>;
+-		};
+-		pinmux_sd_clk {
+-			function = "sdio";
+-			pins = "gpio27";
+-			drive-strength = <16>;
+-		};
+-		pinmux_sd7 {
+-			function = "sdio";
+-			pins = "gpio32";
+-			drive-strength = <10>;
+-			bias-disable;
+-		};
+-	};
+-};
+-
+-&blsp_dma {
+-	status = "okay";
+-};
+-
+-&blsp1_spi1 {
+-	status = "okay";
+-
+-	pinctrl-0 = <&spi_0_pins>;
+-	pinctrl-names = "default";
+-
+-	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+-
+-	flash@0 {
+-		compatible = "jedec,spi-nor";
+-		spi-max-frequency = <24000000>;
+-		reg = <0>;
+-
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition0@0 {
+-				label = "0:SBL1";
+-				reg = <0x00000000 0x00040000>;
+-				read-only;
+-			};
+-
+-			partition1@40000 {
+-				label = "0:MIBIB";
+-				reg = <0x00040000 0x00020000>;
+-				read-only;
+-			};
+-
+-			partition2@60000 {
+-				label = "0:QSEE";
+-				reg = <0x00060000 0x00060000>;
+-				read-only;
+-			};
+-
+-			partition3@c0000 {
+-				label = "0:CDT";
+-				reg = <0x000c0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition4@d0000 {
+-				label = "0:DDRPARAMS";
+-				reg = <0x000d0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition5@e0000 {
+-				label = "0:APPSBLENV"; /* uboot env */
+-				reg = <0x000e0000 0x00010000>;
+-				read-only;
+-			};
+-
+-			partition6@f0000 {
+-				label = "0:APPSBL"; /* uboot */
+-				reg = <0x000f0000 0x00080000>;
+-				read-only;
+-			};
+-
+-			partition7@170000 {
+-				label = "0:ART";
+-				reg = <0x00170000 0x00010000>;
+-				read-only;
+-				compatible = "nvmem-cells";
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				precal_art_1000: precal@1000 {
+-					reg = <0x1000 0x2f20>;
+-				};
+-
+-				precal_art_5000: precal@5000 {
+-					reg = <0x5000 0x2f20>;
+-				};
+-
+-				macaddr_art_0: mac-address@0 {
+-					reg = <0x0 0x6>;
+-				};
+-
+-				macaddr_art_6: mac-address@6 {
+-					reg = <0x6 0x6>;
+-				};
+-
+-				macaddr_art_1006: mac-address@1006 {
+-					reg = <0x1006 0x6>;
+-				};
+-
+-				macaddr_art_5006: mac-address@5006 {
+-					reg = <0x5006 0x6>;
+-				};
+-
+-			};
+-
+-			partition8@180000 {
+-				label = "0:CONFIG";
+-				reg = <0x00180000 0x00010000>;
+-				read-only;
+-			};
+-		};
+-	};
+-};
+-
+-&qpic_bam {
+-	status = "okay";
+-};
+-
+-&nand {
+-	status = "okay";
+-
+-	pinctrl-0 = <&nand_pins>;
+-	pinctrl-names = "default";
+-
+-	nand@0 {
+-		partitions {
+-			compatible = "fixed-partitions";
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-
+-			partition@0 {
+-				label = "ubi";
+-				reg = <0x00000000 0x04000000>;
+-			};
+-		};
+-	};
+-};
+-
+-&blsp1_uart1 {
+-	status = "okay";
+-	pinctrl-0 = <&serial0_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&blsp1_uart2 {
+-	status = "okay";
+-	pinctrl-0 = <&serial1_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-&crypto {
+-	status = "okay";
+-};
+-
+-&cryptobam {
+-	num-channels = <4>;
+-	qcom,num-ees = <2>;
+-	status = "okay";
+-};
+-
+-&mdio {
+-	status = "okay";
+-	pinctrl-0 = <&mdio_pins>;
+-	pinctrl-names = "default";
+-	reset-gpios = <&tlmm 41 GPIO_ACTIVE_LOW>;
+-	reset-delay-us = <2000>;
+-};
+-
+-&pcie0 {
+-	status = "okay";
+-
+-	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
+-	wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
+-
+-	/* Unpolulated slot */
+-	bridge@0,0 {
+-		reg = <0x00000000 0 0 0 0>;
+-		#address-cells = <3>;
+-		#size-cells = <2>;
+-		ranges;
+-	};
+-};
+-
+-&vqmmc {
+-	status = "okay";
+-};
+-
+-&sdhci {
+-	status = "okay";
+-	pinctrl-0 = <&sd_pins>;
+-	pinctrl-names = "default";
+-	cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
+-	vqmmc-supply = <&vqmmc>;
+-};
+-
+-&gmac {
+-	status = "okay";
+-};
+-
+-&switch {
+-	status = "okay";
+-};
+-
+-&swport4 {
+-	status = "okay";
+-	label = "wan";
+-	nvmem-cells = <&macaddr_art_0>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&swport5 {
+-	status = "okay";
+-	label = "lan";
+-	nvmem-cells = <&macaddr_art_6>;
+-	nvmem-cell-names = "mac-address";
+-};
+-
+-&wifi0 {
+-	status = "okay";
+-	nvmem-cells = <&precal_art_1000>, <&macaddr_art_1006>;
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	qcom,ath10k-calibration-variant = "Wallys-DR40X9";
+-};
+-
+-&wifi1 {
+-	status = "okay";
+-	nvmem-cell-names = "pre-calibration", "mac-address";
+-	nvmem-cells = <&precal_art_5000>, <&macaddr_art_5006>;
+-	qcom,ath10k-calibration-variant = "Wallys-DR40X9";
+-};
+-
+-&usb2 {
+-	status = "okay";
+-};
+-
+-&usb2_hs_phy {
+-	status = "okay";
+-};
+-
+-&usb3 {
+-	status = "okay";
+-};
+-
+-&usb3_ss_phy {
+-	status = "okay";
+-};
+-
+-&usb3_hs_phy {
+-	status = "okay";
+-};
+-
+-&prng {
+-	status = "okay";
+-};
+-
+-&watchdog {
+-	status = "okay";
+-};
+-
+diff --git a/target/linux/ipq40xx/files/drivers/net/dsa/qca/qca8k-ipq4019.c b/target/linux/ipq40xx/files/drivers/net/dsa/qca/qca8k-ipq4019.c
+deleted file mode 100644
+index 202d1a582c..0000000000
+--- a/target/linux/ipq40xx/files/drivers/net/dsa/qca/qca8k-ipq4019.c
++++ /dev/null
+@@ -1,1655 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0
+-/*
+- * Copyright (C) 2009 Felix Fietkau <nbd@nbd.name>
+- * Copyright (C) 2011-2012, 2020-2021 Gabor Juhos <juhosg@openwrt.org>
+- * Copyright (c) 2015, 2019, The Linux Foundation. All rights reserved.
+- * Copyright (c) 2016 John Crispin <john@phrozen.org>
+- * Copyright (c) 2021 Robert Marko <robert.marko@sartura.hr>
+- */
+-
+-#include <linux/version.h>
+-#include <linux/etherdevice.h>
+-#include <linux/if_bridge.h>
+-#include <linux/mdio.h>
+-#include <linux/mfd/syscon.h>
+-#include <linux/module.h>
+-#include <linux/netdevice.h>
+-#include <linux/of_mdio.h>
+-#include <linux/of_net.h>
+-#include <linux/of_platform.h>
+-#include <linux/phy.h>
+-#include <linux/phylink.h>
+-#include <linux/reset.h>
+-#include <net/dsa.h>
+-
+-#include "qca8k-ipq4019.h"
+-
+-#define MIB_DESC(_s, _o, _n)	\
+-	{			\
+-		.size = (_s),	\
+-		.offset = (_o),	\
+-		.name = (_n),	\
+-	}
+-
+-static const struct qca8k_mib_desc ar8327_mib[] = {
+-	MIB_DESC(1, 0x00, "RxBroad"),
+-	MIB_DESC(1, 0x04, "RxPause"),
+-	MIB_DESC(1, 0x08, "RxMulti"),
+-	MIB_DESC(1, 0x0c, "RxFcsErr"),
+-	MIB_DESC(1, 0x10, "RxAlignErr"),
+-	MIB_DESC(1, 0x14, "RxRunt"),
+-	MIB_DESC(1, 0x18, "RxFragment"),
+-	MIB_DESC(1, 0x1c, "Rx64Byte"),
+-	MIB_DESC(1, 0x20, "Rx128Byte"),
+-	MIB_DESC(1, 0x24, "Rx256Byte"),
+-	MIB_DESC(1, 0x28, "Rx512Byte"),
+-	MIB_DESC(1, 0x2c, "Rx1024Byte"),
+-	MIB_DESC(1, 0x30, "Rx1518Byte"),
+-	MIB_DESC(1, 0x34, "RxMaxByte"),
+-	MIB_DESC(1, 0x38, "RxTooLong"),
+-	MIB_DESC(2, 0x3c, "RxGoodByte"),
+-	MIB_DESC(2, 0x44, "RxBadByte"),
+-	MIB_DESC(1, 0x4c, "RxOverFlow"),
+-	MIB_DESC(1, 0x50, "Filtered"),
+-	MIB_DESC(1, 0x54, "TxBroad"),
+-	MIB_DESC(1, 0x58, "TxPause"),
+-	MIB_DESC(1, 0x5c, "TxMulti"),
+-	MIB_DESC(1, 0x60, "TxUnderRun"),
+-	MIB_DESC(1, 0x64, "Tx64Byte"),
+-	MIB_DESC(1, 0x68, "Tx128Byte"),
+-	MIB_DESC(1, 0x6c, "Tx256Byte"),
+-	MIB_DESC(1, 0x70, "Tx512Byte"),
+-	MIB_DESC(1, 0x74, "Tx1024Byte"),
+-	MIB_DESC(1, 0x78, "Tx1518Byte"),
+-	MIB_DESC(1, 0x7c, "TxMaxByte"),
+-	MIB_DESC(1, 0x80, "TxOverSize"),
+-	MIB_DESC(2, 0x84, "TxByte"),
+-	MIB_DESC(1, 0x8c, "TxCollision"),
+-	MIB_DESC(1, 0x90, "TxAbortCol"),
+-	MIB_DESC(1, 0x94, "TxMultiCol"),
+-	MIB_DESC(1, 0x98, "TxSingleCol"),
+-	MIB_DESC(1, 0x9c, "TxExcDefer"),
+-	MIB_DESC(1, 0xa0, "TxDefer"),
+-	MIB_DESC(1, 0xa4, "TxLateCol"),
+-	MIB_DESC(1, 0xa8, "RXUnicast"),
+-	MIB_DESC(1, 0xac, "TXunicast"),
+-};
+-
+-static int
+-qca8k_read(struct qca8k_priv *priv, u32 reg, u32 *val)
+-{
+-	return regmap_read(priv->regmap, reg, val);
+-}
+-
+-static int
+-qca8k_write(struct qca8k_priv *priv, u32 reg, u32 val)
+-{
+-	return regmap_write(priv->regmap, reg, val);
+-}
+-
+-static int
+-qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val)
+-{
+-	return regmap_update_bits(priv->regmap, reg, mask, write_val);
+-}
+-
+-static int
+-qca8k_reg_set(struct qca8k_priv *priv, u32 reg, u32 val)
+-{
+-	return regmap_set_bits(priv->regmap, reg, val);
+-}
+-
+-static int
+-qca8k_reg_clear(struct qca8k_priv *priv, u32 reg, u32 val)
+-{
+-	return regmap_clear_bits(priv->regmap, reg, val);
+-}
+-
+-static const struct regmap_range qca8k_readable_ranges[] = {
+-	regmap_reg_range(0x0000, 0x00e4), /* Global control */
+-	regmap_reg_range(0x0100, 0x0168), /* EEE control */
+-	regmap_reg_range(0x0200, 0x0270), /* Parser control */
+-	regmap_reg_range(0x0400, 0x0454), /* ACL */
+-	regmap_reg_range(0x0600, 0x0718), /* Lookup */
+-	regmap_reg_range(0x0800, 0x0b70), /* QM */
+-	regmap_reg_range(0x0c00, 0x0c80), /* PKT */
+-	regmap_reg_range(0x0e00, 0x0e98), /* L3 */
+-	regmap_reg_range(0x1000, 0x10ac), /* MIB - Port0 */
+-	regmap_reg_range(0x1100, 0x11ac), /* MIB - Port1 */
+-	regmap_reg_range(0x1200, 0x12ac), /* MIB - Port2 */
+-	regmap_reg_range(0x1300, 0x13ac), /* MIB - Port3 */
+-	regmap_reg_range(0x1400, 0x14ac), /* MIB - Port4 */
+-	regmap_reg_range(0x1500, 0x15ac), /* MIB - Port5 */
+-	regmap_reg_range(0x1600, 0x16ac), /* MIB - Port6 */
+-
+-};
+-
+-static const struct regmap_access_table qca8k_readable_table = {
+-	.yes_ranges = qca8k_readable_ranges,
+-	.n_yes_ranges = ARRAY_SIZE(qca8k_readable_ranges),
+-};
+-
+-static struct regmap_config qca8k_ipq4019_regmap_config = {
+-	.reg_bits = 32,
+-	.val_bits = 32,
+-	.reg_stride = 4,
+-	.max_register = 0x16ac, /* end MIB - Port6 range */
+-	.rd_table = &qca8k_readable_table,
+-};
+-
+-static struct regmap_config qca8k_ipq4019_psgmii_phy_regmap_config = {
+-	.name = "psgmii-phy",
+-	.reg_bits = 32,
+-	.val_bits = 32,
+-	.reg_stride = 4,
+-	.max_register = 0x7fc,
+-};
+-
+-static int
+-qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask)
+-{
+-	u32 val;
+-
+-	return regmap_read_poll_timeout(priv->regmap, reg, val,
+-					!(val & mask),
+-					0,
+-					QCA8K_BUSY_WAIT_TIMEOUT);
+-}
+-
+-static int
+-qca8k_fdb_read(struct qca8k_priv *priv, struct qca8k_fdb *fdb)
+-{
+-	u32 reg[4], val;
+-	int i, ret;
+-
+-	/* load the ARL table into an array */
+-	for (i = 0; i < 4; i++) {
+-		ret = qca8k_read(priv, QCA8K_REG_ATU_DATA0 + (i * 4), &val);
+-		if (ret < 0)
+-			return ret;
+-
+-		reg[i] = val;
+-	}
+-
+-	/* vid - 83:72 */
+-	fdb->vid = (reg[2] >> QCA8K_ATU_VID_S) & QCA8K_ATU_VID_M;
+-	/* aging - 67:64 */
+-	fdb->aging = reg[2] & QCA8K_ATU_STATUS_M;
+-	/* portmask - 54:48 */
+-	fdb->port_mask = (reg[1] >> QCA8K_ATU_PORT_S) & QCA8K_ATU_PORT_M;
+-	/* mac - 47:0 */
+-	fdb->mac[0] = (reg[1] >> QCA8K_ATU_ADDR0_S) & 0xff;
+-	fdb->mac[1] = reg[1] & 0xff;
+-	fdb->mac[2] = (reg[0] >> QCA8K_ATU_ADDR2_S) & 0xff;
+-	fdb->mac[3] = (reg[0] >> QCA8K_ATU_ADDR3_S) & 0xff;
+-	fdb->mac[4] = (reg[0] >> QCA8K_ATU_ADDR4_S) & 0xff;
+-	fdb->mac[5] = reg[0] & 0xff;
+-
+-	return 0;
+-}
+-
+-static void
+-qca8k_fdb_write(struct qca8k_priv *priv, u16 vid, u8 port_mask, const u8 *mac,
+-		u8 aging)
+-{
+-	u32 reg[3] = { 0 };
+-	int i;
+-
+-	/* vid - 83:72 */
+-	reg[2] = (vid & QCA8K_ATU_VID_M) << QCA8K_ATU_VID_S;
+-	/* aging - 67:64 */
+-	reg[2] |= aging & QCA8K_ATU_STATUS_M;
+-	/* portmask - 54:48 */
+-	reg[1] = (port_mask & QCA8K_ATU_PORT_M) << QCA8K_ATU_PORT_S;
+-	/* mac - 47:0 */
+-	reg[1] |= mac[0] << QCA8K_ATU_ADDR0_S;
+-	reg[1] |= mac[1];
+-	reg[0] |= mac[2] << QCA8K_ATU_ADDR2_S;
+-	reg[0] |= mac[3] << QCA8K_ATU_ADDR3_S;
+-	reg[0] |= mac[4] << QCA8K_ATU_ADDR4_S;
+-	reg[0] |= mac[5];
+-
+-	/* load the array into the ARL table */
+-	for (i = 0; i < 3; i++)
+-		qca8k_write(priv, QCA8K_REG_ATU_DATA0 + (i * 4), reg[i]);
+-}
+-
+-static int
+-qca8k_fdb_access(struct qca8k_priv *priv, enum qca8k_fdb_cmd cmd, int port)
+-{
+-	u32 reg;
+-	int ret;
+-
+-	/* Set the command and FDB index */
+-	reg = QCA8K_ATU_FUNC_BUSY;
+-	reg |= cmd;
+-	if (port >= 0) {
+-		reg |= QCA8K_ATU_FUNC_PORT_EN;
+-		reg |= (port & QCA8K_ATU_FUNC_PORT_M) << QCA8K_ATU_FUNC_PORT_S;
+-	}
+-
+-	/* Write the function register triggering the table access */
+-	ret = qca8k_write(priv, QCA8K_REG_ATU_FUNC, reg);
+-	if (ret)
+-		return ret;
+-
+-	/* wait for completion */
+-	ret = qca8k_busy_wait(priv, QCA8K_REG_ATU_FUNC, QCA8K_ATU_FUNC_BUSY);
+-	if (ret)
+-		return ret;
+-
+-	/* Check for table full violation when adding an entry */
+-	if (cmd == QCA8K_FDB_LOAD) {
+-		ret = qca8k_read(priv, QCA8K_REG_ATU_FUNC, &reg);
+-		if (ret < 0)
+-			return ret;
+-		if (reg & QCA8K_ATU_FUNC_FULL)
+-			return -1;
+-	}
+-
+-	return 0;
+-}
+-
+-static int
+-qca8k_fdb_next(struct qca8k_priv *priv, struct qca8k_fdb *fdb, int port)
+-{
+-	int ret;
+-
+-	qca8k_fdb_write(priv, fdb->vid, fdb->port_mask, fdb->mac, fdb->aging);
+-	ret = qca8k_fdb_access(priv, QCA8K_FDB_NEXT, port);
+-	if (ret < 0)
+-		return ret;
+-
+-	return qca8k_fdb_read(priv, fdb);
+-}
+-
+-static int
+-qca8k_fdb_add(struct qca8k_priv *priv, const u8 *mac, u16 port_mask,
+-	      u16 vid, u8 aging)
+-{
+-	int ret;
+-
+-	mutex_lock(&priv->reg_mutex);
+-	qca8k_fdb_write(priv, vid, port_mask, mac, aging);
+-	ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1);
+-	mutex_unlock(&priv->reg_mutex);
+-
+-	return ret;
+-}
+-
+-static int
+-qca8k_fdb_del(struct qca8k_priv *priv, const u8 *mac, u16 port_mask, u16 vid)
+-{
+-	int ret;
+-
+-	mutex_lock(&priv->reg_mutex);
+-	qca8k_fdb_write(priv, vid, port_mask, mac, 0);
+-	ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1);
+-	mutex_unlock(&priv->reg_mutex);
+-
+-	return ret;
+-}
+-
+-static void
+-qca8k_fdb_flush(struct qca8k_priv *priv)
+-{
+-	mutex_lock(&priv->reg_mutex);
+-	qca8k_fdb_access(priv, QCA8K_FDB_FLUSH, -1);
+-	mutex_unlock(&priv->reg_mutex);
+-}
+-
+-static int
+-qca8k_vlan_access(struct qca8k_priv *priv, enum qca8k_vlan_cmd cmd, u16 vid)
+-{
+-	u32 reg;
+-	int ret;
+-
+-	/* Set the command and VLAN index */
+-	reg = QCA8K_VTU_FUNC1_BUSY;
+-	reg |= cmd;
+-	reg |= vid << QCA8K_VTU_FUNC1_VID_S;
+-
+-	/* Write the function register triggering the table access */
+-	ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC1, reg);
+-	if (ret)
+-		return ret;
+-
+-	/* wait for completion */
+-	ret = qca8k_busy_wait(priv, QCA8K_REG_VTU_FUNC1, QCA8K_VTU_FUNC1_BUSY);
+-	if (ret)
+-		return ret;
+-
+-	/* Check for table full violation when adding an entry */
+-	if (cmd == QCA8K_VLAN_LOAD) {
+-		ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC1, &reg);
+-		if (ret < 0)
+-			return ret;
+-		if (reg & QCA8K_VTU_FUNC1_FULL)
+-			return -ENOMEM;
+-	}
+-
+-	return 0;
+-}
+-
+-static int
+-qca8k_vlan_add(struct qca8k_priv *priv, u8 port, u16 vid, bool untagged)
+-{
+-	u32 reg;
+-	int ret;
+-
+-	/*
+-	   We do the right thing with VLAN 0 and treat it as untagged while
+-	   preserving the tag on egress.
+-	 */
+-	if (vid == 0)
+-		return 0;
+-
+-	mutex_lock(&priv->reg_mutex);
+-	ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid);
+-	if (ret < 0)
+-		goto out;
+-
+-	ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, &reg);
+-	if (ret < 0)
+-		goto out;
+-	reg |= QCA8K_VTU_FUNC0_VALID | QCA8K_VTU_FUNC0_IVL_EN;
+-	reg &= ~(QCA8K_VTU_FUNC0_EG_MODE_MASK << QCA8K_VTU_FUNC0_EG_MODE_S(port));
+-	if (untagged)
+-		reg |= QCA8K_VTU_FUNC0_EG_MODE_UNTAG <<
+-				QCA8K_VTU_FUNC0_EG_MODE_S(port);
+-	else
+-		reg |= QCA8K_VTU_FUNC0_EG_MODE_TAG <<
+-				QCA8K_VTU_FUNC0_EG_MODE_S(port);
+-
+-	ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg);
+-	if (ret)
+-		goto out;
+-	ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid);
+-
+-out:
+-	mutex_unlock(&priv->reg_mutex);
+-
+-	return ret;
+-}
+-
+-static int
+-qca8k_vlan_del(struct qca8k_priv *priv, u8 port, u16 vid)
+-{
+-	u32 reg, mask;
+-	int ret, i;
+-	bool del;
+-
+-	mutex_lock(&priv->reg_mutex);
+-	ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid);
+-	if (ret < 0)
+-		goto out;
+-
+-	ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, &reg);
+-	if (ret < 0)
+-		goto out;
+-	reg &= ~(3 << QCA8K_VTU_FUNC0_EG_MODE_S(port));
+-	reg |= QCA8K_VTU_FUNC0_EG_MODE_NOT <<
+-			QCA8K_VTU_FUNC0_EG_MODE_S(port);
+-
+-	/* Check if we're the last member to be removed */
+-	del = true;
+-	for (i = 0; i < QCA8K_NUM_PORTS; i++) {
+-		mask = QCA8K_VTU_FUNC0_EG_MODE_NOT;
+-		mask <<= QCA8K_VTU_FUNC0_EG_MODE_S(i);
+-
+-		if ((reg & mask) != mask) {
+-			del = false;
+-			break;
+-		}
+-	}
+-
+-	if (del) {
+-		ret = qca8k_vlan_access(priv, QCA8K_VLAN_PURGE, vid);
+-	} else {
+-		ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg);
+-		if (ret)
+-			goto out;
+-		ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid);
+-	}
+-
+-out:
+-	mutex_unlock(&priv->reg_mutex);
+-
+-	return ret;
+-}
+-
+-static int
+-qca8k_mib_init(struct qca8k_priv *priv)
+-{
+-	int ret;
+-
+-	mutex_lock(&priv->reg_mutex);
+-	ret = qca8k_reg_set(priv, QCA8K_REG_MIB, QCA8K_MIB_FLUSH | QCA8K_MIB_BUSY);
+-	if (ret)
+-		goto exit;
+-
+-	ret = qca8k_busy_wait(priv, QCA8K_REG_MIB, QCA8K_MIB_BUSY);
+-	if (ret)
+-		goto exit;
+-
+-	ret = qca8k_reg_set(priv, QCA8K_REG_MIB, QCA8K_MIB_CPU_KEEP);
+-	if (ret)
+-		goto exit;
+-
+-	ret = qca8k_write(priv, QCA8K_REG_MODULE_EN, QCA8K_MODULE_EN_MIB);
+-
+-exit:
+-	mutex_unlock(&priv->reg_mutex);
+-	return ret;
+-}
+-
+-static void
+-qca8k_port_set_status(struct qca8k_priv *priv, int port, int enable)
+-{
+-	u32 mask = QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC;
+-
+-	/* Port 0 is internally connected to the CPU
+-	 * TODO: Probably check for RGMII as well if it doesnt work
+-	 * in RGMII mode.
+-	 */
+-	if (port > QCA8K_CPU_PORT)
+-		mask |= QCA8K_PORT_STATUS_LINK_AUTO;
+-
+-	if (enable)
+-		qca8k_reg_set(priv, QCA8K_REG_PORT_STATUS(port), mask);
+-	else
+-		qca8k_reg_clear(priv, QCA8K_REG_PORT_STATUS(port), mask);
+-}
+-
+-static int
+-qca8k_setup_port(struct dsa_switch *ds, int port)
+-{
+-	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+-	int ret;
+-
+-	/* CPU port gets connected to all user ports of the switch */
+-	if (dsa_is_cpu_port(ds, port)) {
+-		ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(QCA8K_CPU_PORT),
+-				QCA8K_PORT_LOOKUP_MEMBER, dsa_user_ports(ds));
+-		if (ret)
+-			return ret;
+-
+-		/* Disable CPU ARP Auto-learning by default */
+-		ret = qca8k_reg_clear(priv, QCA8K_PORT_LOOKUP_CTRL(QCA8K_CPU_PORT),
+-				      QCA8K_PORT_LOOKUP_LEARN);
+-		if (ret)
+-			return ret;
+-	}
+-
+-	/* Individual user ports get connected to CPU port only */
+-	if (dsa_is_user_port(ds, port)) {
+-		int shift = 16 * (port % 2);
+-
+-		ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
+-				QCA8K_PORT_LOOKUP_MEMBER,
+-				BIT(QCA8K_CPU_PORT));
+-		if (ret)
+-			return ret;
+-
+-		/* Enable ARP Auto-learning by default */
+-		ret = qca8k_reg_set(priv, QCA8K_PORT_LOOKUP_CTRL(port),
+-				    QCA8K_PORT_LOOKUP_LEARN);
+-		if (ret)
+-			return ret;
+-
+-		/* For port based vlans to work we need to set the
+-		 * default egress vid
+-		 */
+-		ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(port),
+-				0xfff << shift,
+-				QCA8K_PORT_VID_DEF << shift);
+-		if (ret)
+-			return ret;
+-
+-		ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(port),
+-				  QCA8K_PORT_VLAN_CVID(QCA8K_PORT_VID_DEF) |
+-				  QCA8K_PORT_VLAN_SVID(QCA8K_PORT_VID_DEF));
+-		if (ret)
+-			return ret;
+-	}
+-
+-	return 0;
+-}
+-
+-static int
+-qca8k_setup(struct dsa_switch *ds)
+-{
+-	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+-	int ret, i;
+-
+-	/* Make sure that port 0 is the cpu port */
+-	if (!dsa_is_cpu_port(ds, 0)) {
+-		dev_err(priv->dev, "port 0 is not the CPU port");
+-		return -EINVAL;
+-	}
+-
+-	/* Enable CPU Port */
+-	ret = qca8k_reg_set(priv, QCA8K_REG_GLOBAL_FW_CTRL0,
+-			    QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN);
+-	if (ret) {
+-		dev_err(priv->dev, "failed enabling CPU port");
+-		return ret;
+-	}
+-
+-	/* Enable MIB counters */
+-	ret = qca8k_mib_init(priv);
+-	if (ret)
+-		dev_warn(priv->dev, "MIB init failed");
+-
+-	/* Enable QCA header mode on the cpu port */
+-	ret = qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(QCA8K_CPU_PORT),
+-			  QCA8K_PORT_HDR_CTRL_ALL << QCA8K_PORT_HDR_CTRL_TX_S |
+-			  QCA8K_PORT_HDR_CTRL_ALL << QCA8K_PORT_HDR_CTRL_RX_S);
+-	if (ret) {
+-		dev_err(priv->dev, "failed enabling QCA header mode");
+-		return ret;
+-	}
+-
+-	/* Disable forwarding by default on all ports */
+-	for (i = 0; i < QCA8K_NUM_PORTS; i++) {
+-		ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i),
+-				QCA8K_PORT_LOOKUP_MEMBER, 0);
+-		if (ret)
+-			return ret;
+-	}
+-
+-	/* Disable MAC by default on all ports */
+-	for (i = 1; i < QCA8K_NUM_PORTS; i++)
+-		qca8k_port_set_status(priv, i, 0);
+-
+-	/* Forward all unknown frames to CPU port for Linux processing */
+-	ret = qca8k_write(priv, QCA8K_REG_GLOBAL_FW_CTRL1,
+-			  BIT(QCA8K_CPU_PORT) << QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_S |
+-			  BIT(QCA8K_CPU_PORT) << QCA8K_GLOBAL_FW_CTRL1_BC_DP_S |
+-			  BIT(QCA8K_CPU_PORT) << QCA8K_GLOBAL_FW_CTRL1_MC_DP_S |
+-			  BIT(QCA8K_CPU_PORT) << QCA8K_GLOBAL_FW_CTRL1_UC_DP_S);
+-	if (ret)
+-		return ret;
+-
+-	/* Setup connection between CPU port & user ports */
+-	for (i = 0; i < QCA8K_NUM_PORTS; i++) {
+-		ret = qca8k_setup_port(ds, i);
+-		if (ret)
+-			return ret;
+-	}
+-
+-	/* Setup our port MTUs to match power on defaults */
+-	for (i = 0; i < QCA8K_NUM_PORTS; i++)
+-		/* Set per port MTU to 1500 as the MTU change function
+-		 * will add the overhead and if its set to 1518 then it
+-		 * will apply the overhead again and we will end up with
+-		 * MTU of 1536 instead of 1518
+-		 */
+-		priv->port_mtu[i] = ETH_DATA_LEN;
+-	ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, ETH_FRAME_LEN + ETH_FCS_LEN);
+-	if (ret)
+-		dev_warn(priv->dev, "failed setting MTU settings");
+-
+-	/* Flush the FDB table */
+-	qca8k_fdb_flush(priv);
+-
+-	/* We don't have interrupts for link changes, so we need to poll */
+-	ds->pcs_poll = true;
+-
+-	/* CPU port HW learning doesnt work correctly, so let DSA handle it */
+-	ds->assisted_learning_on_cpu_port = true;
+-
+-	return 0;
+-}
+-
+-static int psgmii_vco_calibrate(struct qca8k_priv *priv)
+-{
+-	int val, ret;
+-
+-	if (!priv->psgmii_ethphy) {
+-		dev_err(priv->dev, "PSGMII eth PHY missing, calibration failed!\n");
+-		return -ENODEV;
+-	}
+-
+-	/* Fix PSGMII RX 20bit */
+-	ret = phy_write(priv->psgmii_ethphy, MII_BMCR, 0x5b);
+-	/* Reset PHY PSGMII */
+-	ret = phy_write(priv->psgmii_ethphy, MII_BMCR, 0x1b);
+-	/* Release PHY PSGMII reset */
+-	ret = phy_write(priv->psgmii_ethphy, MII_BMCR, 0x5b);
+-
+-	/* Poll for VCO PLL calibration finish - Malibu(QCA8075) */
+-	ret = phy_read_mmd_poll_timeout(priv->psgmii_ethphy,
+-					MDIO_MMD_PMAPMD,
+-					0x28, val,
+-					(val & BIT(0)),
+-					10000, 1000000,
+-					false);
+-	if (ret) {
+-		dev_err(priv->dev, "QCA807x PSGMII VCO calibration PLL not ready\n");
+-		return ret;
+-	}
+-	mdelay(50);
+-
+-	/* Freeze PSGMII RX CDR */
+-	ret = phy_write(priv->psgmii_ethphy, MII_RESV2, 0x2230);
+-
+-	/* Start PSGMIIPHY VCO PLL calibration */
+-	ret = regmap_set_bits(priv->psgmii,
+-			PSGMIIPHY_VCO_CALIBRATION_CONTROL_REGISTER_1,
+-			PSGMIIPHY_REG_PLL_VCO_CALIB_RESTART);
+-
+-	/* Poll for PSGMIIPHY PLL calibration finish - Dakota(IPQ40xx) */
+-	ret = regmap_read_poll_timeout(priv->psgmii,
+-				       PSGMIIPHY_VCO_CALIBRATION_CONTROL_REGISTER_2,
+-				       val, val & PSGMIIPHY_REG_PLL_VCO_CALIB_READY,
+-				       10000, 1000000);
+-	if (ret) {
+-		dev_err(priv->dev, "IPQ PSGMIIPHY VCO calibration PLL not ready\n");
+-		return ret;
+-	}
+-	mdelay(50);
+-
+-	/* Release PSGMII RX CDR */
+-	ret = phy_write(priv->psgmii_ethphy, MII_RESV2, 0x3230);
+-	/* Release PSGMII RX 20bit */
+-	ret = phy_write(priv->psgmii_ethphy, MII_BMCR, 0x5f);
+-	mdelay(200);
+-
+-	return ret;
+-}
+-
+-static void
+-qca8k_switch_port_loopback_on_off(struct qca8k_priv *priv, int port, int on)
+-{
+-	u32 val = QCA8K_PORT_LOOKUP_LOOPBACK;
+-
+-	if (on == 0)
+-		val = 0;
+-
+-	qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
+-		  QCA8K_PORT_LOOKUP_LOOPBACK, val);
+-}
+-
+-static int
+-qca8k_wait_for_phy_link_state(struct phy_device *phy, int need_status)
+-{
+-	int a;
+-	u16 status;
+-
+-	for (a = 0; a < 100; a++) {
+-		status = phy_read(phy, MII_QCA8075_SSTATUS);
+-		status &= QCA8075_PHY_SPEC_STATUS_LINK;
+-		status = !!status;
+-		if (status == need_status)
+-			return 0;
+-		mdelay(8);
+-	}
+-
+-	return -1;
+-}
+-
+-static void
+-qca8k_phy_loopback_on_off(struct qca8k_priv *priv, struct phy_device *phy,
+-			  int sw_port, int on)
+-{
+-	if (on) {
+-		phy_write(phy, MII_BMCR, BMCR_ANENABLE | BMCR_RESET);
+-		phy_modify(phy, MII_BMCR, BMCR_PDOWN, BMCR_PDOWN);
+-		qca8k_wait_for_phy_link_state(phy, 0);
+-		qca8k_write(priv, QCA8K_REG_PORT_STATUS(sw_port), 0);
+-		phy_write(phy, MII_BMCR,
+-			BMCR_SPEED1000 |
+-			BMCR_FULLDPLX |
+-			BMCR_LOOPBACK);
+-		qca8k_wait_for_phy_link_state(phy, 1);
+-		qca8k_write(priv, QCA8K_REG_PORT_STATUS(sw_port),
+-			QCA8K_PORT_STATUS_SPEED_1000 |
+-			QCA8K_PORT_STATUS_TXMAC |
+-			QCA8K_PORT_STATUS_RXMAC |
+-			QCA8K_PORT_STATUS_DUPLEX);
+-		qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(sw_port),
+-			QCA8K_PORT_LOOKUP_STATE_FORWARD,
+-			QCA8K_PORT_LOOKUP_STATE_FORWARD);
+-	} else { /* off */
+-		qca8k_write(priv, QCA8K_REG_PORT_STATUS(sw_port), 0);
+-		qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(sw_port),
+-			QCA8K_PORT_LOOKUP_STATE_DISABLED,
+-			QCA8K_PORT_LOOKUP_STATE_DISABLED);
+-		phy_write(phy, MII_BMCR, BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_RESET);
+-		/* turn off the power of the phys - so that unused
+-			 ports do not raise links */
+-		phy_modify(phy, MII_BMCR, BMCR_PDOWN, BMCR_PDOWN);
+-	}
+-}
+-
+-static void
+-qca8k_phy_pkt_gen_prep(struct qca8k_priv *priv, struct phy_device *phy,
+-		       int pkts_num, int on)
+-{
+-	if (on) {
+-		/* enable CRC checker and packets counters */
+-		phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_CRC_AND_PKTS_COUNT, 0);
+-		phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_CRC_AND_PKTS_COUNT,
+-			QCA8075_MMD7_CNT_FRAME_CHK_EN | QCA8075_MMD7_CNT_SELFCLR);
+-		qca8k_wait_for_phy_link_state(phy, 1);
+-		/* packet number */
+-		phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_PKT_NUMB, pkts_num);
+-		/* pkt size - 1504 bytes + 20 bytes */
+-		phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_PKT_SIZE, 1504);
+-	} else { /* off */
+-		/* packet number */
+-		phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_PKT_NUMB, 0);
+-		/* disable CRC checker and packet counter */
+-		phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_CRC_AND_PKTS_COUNT, 0);
+-		/* disable traffic gen */
+-		phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_CTRL, 0);
+-	}
+-}
+-
+-static void
+-qca8k_wait_for_phy_pkt_gen_fin(struct qca8k_priv *priv, struct phy_device *phy)
+-{
+-	int val;
+-	/* wait for all traffic end: 4096(pkt num)*1524(size)*8ns(125MHz)=49938us */
+-	phy_read_mmd_poll_timeout(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_CTRL,
+-				  val, !(val & QCA8075_MMD7_PKT_GEN_INPROGR),
+-				  50000, 1000000, true);
+-}
+-
+-static void
+-qca8k_start_phy_pkt_gen(struct phy_device *phy)
+-{
+-	/* start traffic gen */
+-	phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_CTRL,
+-		      QCA8075_MMD7_PKT_GEN_START | QCA8075_MMD7_PKT_GEN_INPROGR);
+-}
+-
+-static int
+-qca8k_start_all_phys_pkt_gens(struct qca8k_priv *priv)
+-{
+-	struct phy_device *phy;
+-	phy = phy_device_create(priv->bus, QCA8075_MDIO_BRDCST_PHY_ADDR,
+-		0, 0, NULL);
+-	if (!phy) {
+-		dev_err(priv->dev, "unable to create mdio broadcast PHY(0x%x)\n",
+-			QCA8075_MDIO_BRDCST_PHY_ADDR);
+-		return -ENODEV;
+-	}
+-
+-	qca8k_start_phy_pkt_gen(phy);
+-
+-	phy_device_free(phy);
+-	return 0;
+-}
+-
+-static int
+-qca8k_get_phy_pkt_gen_test_result(struct phy_device *phy, int pkts_num)
+-{
+-	u32 tx_ok, tx_error;
+-	u32 rx_ok, rx_error;
+-	u32 tx_ok_high16;
+-	u32 rx_ok_high16;
+-	u32 tx_all_ok, rx_all_ok;
+-
+-	/* check counters */
+-	tx_ok = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_EG_FRAME_RECV_CNT_LO);
+-	tx_ok_high16 = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_EG_FRAME_RECV_CNT_HI);
+-	tx_error = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_EG_FRAME_ERR_CNT);
+-	rx_ok = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_IG_FRAME_RECV_CNT_LO);
+-	rx_ok_high16 = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_IG_FRAME_RECV_CNT_HI);
+-	rx_error = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_IG_FRAME_ERR_CNT);
+-	tx_all_ok = tx_ok + (tx_ok_high16 << 16);
+-	rx_all_ok = rx_ok + (rx_ok_high16 << 16);
+-
+-	if (tx_all_ok < pkts_num)
+-		return -1;
+-	if(rx_all_ok < pkts_num)
+-		return -2;
+-	if(tx_error)
+-		return -3;
+-	if(rx_error)
+-		return -4;
+-	return 0; /* test is ok */
+-}
+-
+-static
+-void qca8k_phy_broadcast_write_on_off(struct qca8k_priv *priv,
+-				      struct phy_device *phy, int on)
+-{
+-	u32 val;
+-
+-	val = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_MDIO_BRDCST_WRITE);
+-
+-	if (on == 0)
+-		val &= ~QCA8075_MMD7_MDIO_BRDCST_WRITE_EN;
+-	else
+-		val |= QCA8075_MMD7_MDIO_BRDCST_WRITE_EN;
+-
+-	phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_MDIO_BRDCST_WRITE, val);
+-}
+-
+-static int
+-qca8k_test_dsa_port_for_errors(struct qca8k_priv *priv, struct phy_device *phy,
+-			       int port, int test_phase)
+-{
+-	int res = 0;
+-	const int test_pkts_num = QCA8075_PKT_GEN_PKTS_COUNT;
+-
+-	if (test_phase == 1) { /* start test preps */
+-		qca8k_phy_loopback_on_off(priv, phy, port, 1);
+-		qca8k_switch_port_loopback_on_off(priv, port, 1);
+-		qca8k_phy_broadcast_write_on_off(priv, phy, 1);
+-		qca8k_phy_pkt_gen_prep(priv, phy, test_pkts_num, 1);
+-	} else if (test_phase == 2) {
+-		/* wait for test results, collect it and cleanup */
+-		qca8k_wait_for_phy_pkt_gen_fin(priv, phy);
+-		res = qca8k_get_phy_pkt_gen_test_result(phy, test_pkts_num);
+-		qca8k_phy_pkt_gen_prep(priv, phy, test_pkts_num, 0);
+-		qca8k_phy_broadcast_write_on_off(priv, phy, 0);
+-		qca8k_switch_port_loopback_on_off(priv, port, 0);
+-		qca8k_phy_loopback_on_off(priv, phy, port, 0);
+-	}
+-
+-	return res;
+-}
+-
+-static int
+-qca8k_do_dsa_sw_ports_self_test(struct qca8k_priv *priv, int parallel_test)
+-{
+-	struct device_node *dn = priv->dev->of_node;
+-	struct device_node *ports, *port;
+-	struct device_node *phy_dn;
+-	struct phy_device *phy;
+-	int reg, err = 0, test_phase;
+-	u32 tests_result = 0;
+-
+-	ports = of_get_child_by_name(dn, "ports");
+-	if (!ports) {
+-		dev_err(priv->dev, "no ports child node found\n");
+-			return -EINVAL;
+-	}
+-
+-	for (test_phase = 1; test_phase <= 2; test_phase++) {
+-		if (parallel_test && test_phase == 2) {
+-			err = qca8k_start_all_phys_pkt_gens(priv);
+-			if (err)
+-				goto error;
+-		}
+-		for_each_available_child_of_node(ports, port) {
+-			err = of_property_read_u32(port, "reg", &reg);
+-			if (err)
+-				goto error;
+-			if (reg >= QCA8K_NUM_PORTS) {
+-				err = -EINVAL;
+-				goto error;
+-			}
+-			phy_dn = of_parse_phandle(port, "phy-handle", 0);
+-			if (phy_dn) {
+-				phy = of_phy_find_device(phy_dn);
+-				of_node_put(phy_dn);
+-				if (phy) {
+-					int result;
+-					result = qca8k_test_dsa_port_for_errors(priv,
+-						phy, reg, test_phase);
+-					if (!parallel_test && test_phase == 1)
+-						qca8k_start_phy_pkt_gen(phy);
+-					put_device(&phy->mdio.dev);
+-					if (test_phase == 2) {
+-						tests_result <<= 1;
+-						if (result)
+-							tests_result |= 1;
+-					}
+-				}
+-			}
+-		}
+-	}
+-
+-end:
+-	of_node_put(ports);
+-	qca8k_fdb_flush(priv);
+-	return tests_result;
+-error:
+-	tests_result |= 0xf000;
+-	goto end;
+-}
+-
+-static int
+-psgmii_vco_calibrate_and_test(struct dsa_switch *ds)
+-{
+-	int ret, a, test_result;
+-	struct qca8k_priv *priv = ds->priv;
+-
+-	for (a = 0; a <= QCA8K_PSGMII_CALB_NUM; a++) {
+-		ret = psgmii_vco_calibrate(priv);
+-		if (ret)
+-			return ret;
+-		/* first we run serial test */
+-		test_result = qca8k_do_dsa_sw_ports_self_test(priv, 0);
+-		/* and if it is ok then we run the test in parallel */
+-		if (!test_result)
+-			test_result = qca8k_do_dsa_sw_ports_self_test(priv, 1);
+-		if (!test_result) {
+-			if (a > 0) {
+-				dev_warn(priv->dev, "PSGMII work was stabilized after %d "
+-					"calibration retries !\n", a);
+-			}
+-			return 0;
+-		} else {
+-			schedule();
+-			if (a > 0 && a % 10 == 0) {
+-				dev_err(priv->dev, "PSGMII work is unstable !!! "
+-					"Let's try to wait a bit ... %d\n", a);
+-				set_current_state(TASK_INTERRUPTIBLE);
+-				schedule_timeout(msecs_to_jiffies(a * 100));
+-			}
+-		}
+-	}
+-
+-	panic("PSGMII work is unstable !!! "
+-		"Repeated recalibration attempts did not help(0x%x) !\n",
+-		test_result);
+-
+-	return -EFAULT;
+-}
+-
+-static int
+-ipq4019_psgmii_configure(struct dsa_switch *ds)
+-{
+-	struct qca8k_priv *priv = ds->priv;
+-	int ret;
+-
+-	if (!priv->psgmii_calibrated) {
+-		ret = psgmii_vco_calibrate_and_test(ds);
+-
+-		ret = regmap_clear_bits(priv->psgmii, PSGMIIPHY_MODE_CONTROL,
+-					PSGMIIPHY_MODE_ATHR_CSCO_MODE_25M);
+-		ret = regmap_write(priv->psgmii, PSGMIIPHY_TX_CONTROL,
+-				   PSGMIIPHY_TX_CONTROL_MAGIC_VALUE);
+-
+-		priv->psgmii_calibrated = true;
+-
+-		return ret;
+-	}
+-
+-	return 0;
+-}
+-
+-static void
+-qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
+-			 const struct phylink_link_state *state)
+-{
+-	struct qca8k_priv *priv = ds->priv;
+-
+-	switch (port) {
+-	case 0:
+-		/* CPU port, no configuration needed */
+-		return;
+-	case 1:
+-	case 2:
+-	case 3:
+-		if (state->interface == PHY_INTERFACE_MODE_PSGMII)
+-			if (ipq4019_psgmii_configure(ds))
+-				dev_err(ds->dev, "PSGMII configuration failed!\n");
+-		return;
+-	case 4:
+-	case 5:
+-		if (state->interface == PHY_INTERFACE_MODE_RGMII ||
+-		    state->interface == PHY_INTERFACE_MODE_RGMII_ID ||
+-		    state->interface == PHY_INTERFACE_MODE_RGMII_RXID ||
+-		    state->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
+-			qca8k_reg_set(priv, QCA8K_REG_RGMII_CTRL, QCA8K_RGMII_CTRL_CLK);
+-		}
+-
+-		if (state->interface == PHY_INTERFACE_MODE_PSGMII)
+-			if (ipq4019_psgmii_configure(ds))
+-				dev_err(ds->dev, "PSGMII configuration failed!\n");
+-		return;
+-	default:
+-		dev_err(ds->dev, "%s: unsupported port: %i\n", __func__, port);
+-		return;
+-	}
+-}
+-
+-static void
+-qca8k_phylink_validate(struct dsa_switch *ds, int port,
+-		       unsigned long *supported,
+-		       struct phylink_link_state *state)
+-{
+-	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
+-
+-	switch (port) {
+-	case 0: /* CPU port */
+-		if (state->interface != PHY_INTERFACE_MODE_INTERNAL)
+-			goto unsupported;
+-		break;
+-	case 1:
+-	case 2:
+-	case 3:
+-		/* Only PSGMII mode is supported */
+-		if (state->interface != PHY_INTERFACE_MODE_PSGMII)
+-			goto unsupported;
+-		break;
+-	case 4:
+-	case 5:
+-		/* PSGMII and RGMII modes are supported */
+-		if (state->interface != PHY_INTERFACE_MODE_PSGMII &&
+-		    state->interface != PHY_INTERFACE_MODE_RGMII &&
+-		    state->interface != PHY_INTERFACE_MODE_RGMII_ID &&
+-		    state->interface != PHY_INTERFACE_MODE_RGMII_RXID &&
+-		    state->interface != PHY_INTERFACE_MODE_RGMII_TXID)
+-			goto unsupported;
+-		break;
+-	default:
+-unsupported:
+-		dev_warn(ds->dev, "interface '%s' (%d) on port %d is not supported\n",
+-			 phy_modes(state->interface), state->interface, port);
+-		linkmode_zero(supported);
+-		return;
+-	}
+-
+-	if (port == 0) {
+-		phylink_set_port_modes(mask);
+-
+-		phylink_set(mask, 1000baseT_Full);
+-
+-		phylink_set(mask, Pause);
+-		phylink_set(mask, Asym_Pause);
+-
+-		linkmode_and(supported, supported, mask);
+-		linkmode_and(state->advertising, state->advertising, mask);
+-	} else {
+-		/* Simply copy what PHYs tell us */
+-		linkmode_copy(state->advertising, supported);
+-	}
+-}
+-
+-static int
+-qca8k_phylink_mac_link_state(struct dsa_switch *ds, int port,
+-			     struct phylink_link_state *state)
+-{
+-	struct qca8k_priv *priv = ds->priv;
+-	u32 reg;
+-	int ret;
+-
+-	ret = qca8k_read(priv, QCA8K_REG_PORT_STATUS(port), &reg);
+-	if (ret < 0)
+-		return ret;
+-
+-	state->link = !!(reg & QCA8K_PORT_STATUS_LINK_UP);
+-	state->an_complete = state->link;
+-	state->an_enabled = !!(reg & QCA8K_PORT_STATUS_LINK_AUTO);
+-	state->duplex = (reg & QCA8K_PORT_STATUS_DUPLEX) ? DUPLEX_FULL :
+-							   DUPLEX_HALF;
+-
+-	switch (reg & QCA8K_PORT_STATUS_SPEED) {
+-	case QCA8K_PORT_STATUS_SPEED_10:
+-		state->speed = SPEED_10;
+-		break;
+-	case QCA8K_PORT_STATUS_SPEED_100:
+-		state->speed = SPEED_100;
+-		break;
+-	case QCA8K_PORT_STATUS_SPEED_1000:
+-		state->speed = SPEED_1000;
+-		break;
+-	default:
+-		state->speed = SPEED_UNKNOWN;
+-		break;
+-	}
+-
+-	state->pause = MLO_PAUSE_NONE;
+-	if (reg & QCA8K_PORT_STATUS_RXFLOW)
+-		state->pause |= MLO_PAUSE_RX;
+-	if (reg & QCA8K_PORT_STATUS_TXFLOW)
+-		state->pause |= MLO_PAUSE_TX;
+-
+-	return 1;
+-}
+-
+-static void
+-qca8k_phylink_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode,
+-			    phy_interface_t interface)
+-{
+-	struct qca8k_priv *priv = ds->priv;
+-
+-	qca8k_port_set_status(priv, port, 0);
+-}
+-
+-static void
+-qca8k_phylink_mac_link_up(struct dsa_switch *ds, int port, unsigned int mode,
+-			  phy_interface_t interface, struct phy_device *phydev,
+-			  int speed, int duplex, bool tx_pause, bool rx_pause)
+-{
+-	struct qca8k_priv *priv = ds->priv;
+-	u32 reg;
+-
+-	if (phylink_autoneg_inband(mode)) {
+-		reg = QCA8K_PORT_STATUS_LINK_AUTO;
+-	} else {
+-		switch (speed) {
+-		case SPEED_10:
+-			reg = QCA8K_PORT_STATUS_SPEED_10;
+-			break;
+-		case SPEED_100:
+-			reg = QCA8K_PORT_STATUS_SPEED_100;
+-			break;
+-		case SPEED_1000:
+-			reg = QCA8K_PORT_STATUS_SPEED_1000;
+-			break;
+-		default:
+-			reg = QCA8K_PORT_STATUS_LINK_AUTO;
+-			break;
+-		}
+-
+-		if (duplex == DUPLEX_FULL)
+-			reg |= QCA8K_PORT_STATUS_DUPLEX;
+-
+-		if (rx_pause || dsa_is_cpu_port(ds, port))
+-			reg |= QCA8K_PORT_STATUS_RXFLOW;
+-
+-		if (tx_pause || dsa_is_cpu_port(ds, port))
+-			reg |= QCA8K_PORT_STATUS_TXFLOW;
+-	}
+-
+-	reg |= QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC;
+-
+-	qca8k_write(priv, QCA8K_REG_PORT_STATUS(port), reg);
+-}
+-
+-static void
+-qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset, uint8_t *data)
+-{
+-	int i;
+-
+-	if (stringset != ETH_SS_STATS)
+-		return;
+-
+-	for (i = 0; i < ARRAY_SIZE(ar8327_mib); i++)
+-		strncpy(data + i * ETH_GSTRING_LEN, ar8327_mib[i].name,
+-			ETH_GSTRING_LEN);
+-}
+-
+-static void
+-qca8k_get_ethtool_stats(struct dsa_switch *ds, int port,
+-			uint64_t *data)
+-{
+-	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+-	const struct qca8k_mib_desc *mib;
+-	u32 reg, i, val;
+-	u32 hi = 0;
+-	int ret;
+-
+-	for (i = 0; i < ARRAY_SIZE(ar8327_mib); i++) {
+-		mib = &ar8327_mib[i];
+-		reg = QCA8K_PORT_MIB_COUNTER(port) + mib->offset;
+-
+-		ret = qca8k_read(priv, reg, &val);
+-		if (ret < 0)
+-			continue;
+-
+-		if (mib->size == 2) {
+-			ret = qca8k_read(priv, reg + 4, &hi);
+-			if (ret < 0)
+-				continue;
+-		}
+-
+-		data[i] = val;
+-		if (mib->size == 2)
+-			data[i] |= (u64)hi << 32;
+-	}
+-}
+-
+-static int
+-qca8k_get_sset_count(struct dsa_switch *ds, int port, int sset)
+-{
+-	if (sset != ETH_SS_STATS)
+-		return 0;
+-
+-	return ARRAY_SIZE(ar8327_mib);
+-}
+-
+-static int
+-qca8k_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *eee)
+-{
+-	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+-	u32 lpi_en = QCA8K_REG_EEE_CTRL_LPI_EN(port);
+-	u32 reg;
+-	int ret;
+-
+-	mutex_lock(&priv->reg_mutex);
+-	ret = qca8k_read(priv, QCA8K_REG_EEE_CTRL, &reg);
+-	if (ret < 0)
+-		goto exit;
+-
+-	if (eee->eee_enabled)
+-		reg |= lpi_en;
+-	else
+-		reg &= ~lpi_en;
+-	ret = qca8k_write(priv, QCA8K_REG_EEE_CTRL, reg);
+-
+-exit:
+-	mutex_unlock(&priv->reg_mutex);
+-	return ret;
+-}
+-
+-static int
+-qca8k_get_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e)
+-{
+-	/* Nothing to do on the port's MAC */
+-	return 0;
+-}
+-
+-static void
+-qca8k_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)
+-{
+-	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+-	u32 stp_state;
+-
+-	switch (state) {
+-	case BR_STATE_DISABLED:
+-		stp_state = QCA8K_PORT_LOOKUP_STATE_DISABLED;
+-		break;
+-	case BR_STATE_BLOCKING:
+-		stp_state = QCA8K_PORT_LOOKUP_STATE_BLOCKING;
+-		break;
+-	case BR_STATE_LISTENING:
+-		stp_state = QCA8K_PORT_LOOKUP_STATE_LISTENING;
+-		break;
+-	case BR_STATE_LEARNING:
+-		stp_state = QCA8K_PORT_LOOKUP_STATE_LEARNING;
+-		break;
+-	case BR_STATE_FORWARDING:
+-	default:
+-		stp_state = QCA8K_PORT_LOOKUP_STATE_FORWARD;
+-		break;
+-	}
+-
+-	qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
+-		  QCA8K_PORT_LOOKUP_STATE_MASK, stp_state);
+-}
+-
+-static int
+-qca8k_port_bridge_join(struct dsa_switch *ds, int port, struct net_device *br)
+-{
+-	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+-	int port_mask, cpu_port;
+-	int i, ret;
+-
+-	cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
+-	port_mask = BIT(cpu_port);
+-
+-	for (i = 0; i < QCA8K_NUM_PORTS; i++) {
+-		if (dsa_is_cpu_port(ds, i))
+-			continue;
+-		if (dsa_to_port(ds, i)->bridge_dev != br)
+-			continue;
+-		/* Add this port to the portvlan mask of the other ports
+-		 * in the bridge
+-		 */
+-		ret = qca8k_reg_set(priv,
+-				    QCA8K_PORT_LOOKUP_CTRL(i),
+-				    BIT(port));
+-		if (ret)
+-			return ret;
+-		if (i != port)
+-			port_mask |= BIT(i);
+-	}
+-
+-	/* Add all other ports to this ports portvlan mask */
+-	ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
+-			QCA8K_PORT_LOOKUP_MEMBER, port_mask);
+-
+-	return ret;
+-}
+-
+-static void
+-qca8k_port_bridge_leave(struct dsa_switch *ds, int port, struct net_device *br)
+-{
+-	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+-	int cpu_port, i;
+-
+-	cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
+-
+-	for (i = 0; i < QCA8K_NUM_PORTS; i++) {
+-		if (dsa_is_cpu_port(ds, i))
+-			continue;
+-		if (dsa_to_port(ds, i)->bridge_dev != br)
+-			continue;
+-		/* Remove this port to the portvlan mask of the other ports
+-		 * in the bridge
+-		 */
+-		qca8k_reg_clear(priv,
+-				QCA8K_PORT_LOOKUP_CTRL(i),
+-				BIT(port));
+-	}
+-
+-	/* Set the cpu port to be the only one in the portvlan mask of
+-	 * this port
+-	 */
+-	qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
+-		  QCA8K_PORT_LOOKUP_MEMBER, BIT(cpu_port));
+-}
+-
+-static int
+-qca8k_port_enable(struct dsa_switch *ds, int port,
+-		  struct phy_device *phy)
+-{
+-	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+-
+-	qca8k_port_set_status(priv, port, 1);
+-	priv->port_sts[port].enabled = 1;
+-
+-	if (dsa_is_user_port(ds, port))
+-		phy_support_asym_pause(phy);
+-
+-	return 0;
+-}
+-
+-static void
+-qca8k_port_disable(struct dsa_switch *ds, int port)
+-{
+-	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+-
+-	qca8k_port_set_status(priv, port, 0);
+-	priv->port_sts[port].enabled = 0;
+-}
+-
+-static int
+-qca8k_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
+-{
+-	struct qca8k_priv *priv = ds->priv;
+-	int i, mtu = 0;
+-
+-	priv->port_mtu[port] = new_mtu;
+-
+-	for (i = 0; i < QCA8K_NUM_PORTS; i++)
+-		if (priv->port_mtu[i] > mtu)
+-			mtu = priv->port_mtu[i];
+-
+-	/* Include L2 header / FCS length */
+-	return qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, mtu + ETH_HLEN + ETH_FCS_LEN);
+-}
+-
+-static int
+-qca8k_port_max_mtu(struct dsa_switch *ds, int port)
+-{
+-	return QCA8K_MAX_MTU;
+-}
+-
+-static int
+-qca8k_port_fdb_insert(struct qca8k_priv *priv, const u8 *addr,
+-		      u16 port_mask, u16 vid)
+-{
+-	/* Set the vid to the port vlan id if no vid is set */
+-	if (!vid)
+-		vid = QCA8K_PORT_VID_DEF;
+-
+-	return qca8k_fdb_add(priv, addr, port_mask, vid,
+-			     QCA8K_ATU_STATUS_STATIC);
+-}
+-
+-static int
+-qca8k_port_fdb_add(struct dsa_switch *ds, int port,
+-		   const unsigned char *addr, u16 vid)
+-{
+-	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+-	u16 port_mask = BIT(port);
+-
+-	return qca8k_port_fdb_insert(priv, addr, port_mask, vid);
+-}
+-
+-static int
+-qca8k_port_fdb_del(struct dsa_switch *ds, int port,
+-		   const unsigned char *addr, u16 vid)
+-{
+-	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+-	u16 port_mask = BIT(port);
+-
+-	if (!vid)
+-		vid = QCA8K_PORT_VID_DEF;
+-
+-	return qca8k_fdb_del(priv, addr, port_mask, vid);
+-}
+-
+-static int
+-qca8k_port_fdb_dump(struct dsa_switch *ds, int port,
+-		    dsa_fdb_dump_cb_t *cb, void *data)
+-{
+-	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+-	struct qca8k_fdb _fdb = { 0 };
+-	int cnt = QCA8K_NUM_FDB_RECORDS;
+-	bool is_static;
+-	int ret = 0;
+-
+-	mutex_lock(&priv->reg_mutex);
+-	while (cnt-- && !qca8k_fdb_next(priv, &_fdb, port)) {
+-		if (!_fdb.aging)
+-			break;
+-		is_static = (_fdb.aging == QCA8K_ATU_STATUS_STATIC);
+-		ret = cb(_fdb.mac, _fdb.vid, is_static, data);
+-		if (ret)
+-			break;
+-	}
+-	mutex_unlock(&priv->reg_mutex);
+-
+-	return 0;
+-}
+-
+-static int
+-qca8k_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering,
+-                          struct netlink_ext_ack *extack)
+-{
+-	struct qca8k_priv *priv = ds->priv;
+-
+-	if (vlan_filtering) {
+-		qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
+-			  QCA8K_PORT_LOOKUP_VLAN_MODE,
+-			  QCA8K_PORT_LOOKUP_VLAN_MODE_SECURE);
+-	} else {
+-		qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
+-			  QCA8K_PORT_LOOKUP_VLAN_MODE,
+-			  QCA8K_PORT_LOOKUP_VLAN_MODE_NONE);
+-	}
+-
+-	return 0;
+-}
+-
+-static int
+-qca8k_port_vlan_add(struct dsa_switch *ds, int port,
+-		    const struct switchdev_obj_port_vlan *vlan,
+-		    struct netlink_ext_ack *extack)
+-{
+-	bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
+-	bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID;
+-	struct qca8k_priv *priv = ds->priv;
+-	int ret = 0;
+-
+-	ret = qca8k_vlan_add(priv, port, vlan->vid, untagged);
+-	if (ret) {
+-		dev_err(priv->dev, "Failed to add VLAN to port %d (%d)", port, ret);
+-		return ret;
+-	}
+-
+-	if (pvid) {
+-		int shift = 16 * (port % 2);
+-
+-		qca8k_rmw(priv, QCA8K_EGRESS_VLAN(port),
+-			  0xfff << shift, vlan->vid << shift);
+-		qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(port),
+-			    QCA8K_PORT_VLAN_CVID(vlan->vid) |
+-			    QCA8K_PORT_VLAN_SVID(vlan->vid));
+-	}
+-	return 0;
+-}
+-
+-static int
+-qca8k_port_vlan_del(struct dsa_switch *ds, int port,
+-		    const struct switchdev_obj_port_vlan *vlan)
+-{
+-	struct qca8k_priv *priv = ds->priv;
+-	int ret = 0;
+-
+-	ret = qca8k_vlan_del(priv, port, vlan->vid);
+-	if (ret)
+-		dev_err(priv->dev, "Failed to delete VLAN from port %d (%d)", port, ret);
+-
+-	return ret;
+-}
+-
+-static enum dsa_tag_protocol
+-qca8k_get_tag_protocol(struct dsa_switch *ds, int port,
+-		       enum dsa_tag_protocol mp)
+-{
+-	return DSA_TAG_PROTO_IPQ4019;
+-}
+-
+-static const struct dsa_switch_ops qca8k_switch_ops = {
+-	.get_tag_protocol	= qca8k_get_tag_protocol,
+-	.setup			= qca8k_setup,
+-	.get_strings		= qca8k_get_strings,
+-	.get_ethtool_stats	= qca8k_get_ethtool_stats,
+-	.get_sset_count		= qca8k_get_sset_count,
+-	.get_mac_eee		= qca8k_get_mac_eee,
+-	.set_mac_eee		= qca8k_set_mac_eee,
+-	.port_enable		= qca8k_port_enable,
+-	.port_disable		= qca8k_port_disable,
+-	.port_change_mtu	= qca8k_port_change_mtu,
+-	.port_max_mtu		= qca8k_port_max_mtu,
+-	.port_stp_state_set	= qca8k_port_stp_state_set,
+-	.port_bridge_join	= qca8k_port_bridge_join,
+-	.port_bridge_leave	= qca8k_port_bridge_leave,
+-	.port_fdb_add		= qca8k_port_fdb_add,
+-	.port_fdb_del		= qca8k_port_fdb_del,
+-	.port_fdb_dump		= qca8k_port_fdb_dump,
+-	.port_vlan_filtering	= qca8k_port_vlan_filtering,
+-	.port_vlan_add		= qca8k_port_vlan_add,
+-	.port_vlan_del		= qca8k_port_vlan_del,
+-	.phylink_validate	= qca8k_phylink_validate,
+-	.phylink_mac_link_state	= qca8k_phylink_mac_link_state,
+-	.phylink_mac_config	= qca8k_phylink_mac_config,
+-	.phylink_mac_link_down	= qca8k_phylink_mac_link_down,
+-	.phylink_mac_link_up	= qca8k_phylink_mac_link_up,
+-};
+-
+-static int
+-qca8k_ipq4019_probe(struct platform_device *pdev)
+-{
+-	struct qca8k_priv *priv;
+-	void __iomem *base, *psgmii;
+-	struct device_node *np = pdev->dev.of_node, *mdio_np, *psgmii_ethphy_np;
+-	int ret;
+-
+-	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+-	if (!priv)
+-		return -ENOMEM;
+-
+-	priv->dev = &pdev->dev;
+-
+-	base = devm_platform_ioremap_resource_byname(pdev, "base");
+-	if (IS_ERR(base))
+-		return PTR_ERR(base);
+-
+-	priv->regmap = devm_regmap_init_mmio(priv->dev, base,
+-					     &qca8k_ipq4019_regmap_config);
+-	if (IS_ERR(priv->regmap)) {
+-		ret = PTR_ERR(priv->regmap);
+-		dev_err(priv->dev, "base regmap initialization failed, %d\n", ret);
+-		return ret;
+-	}
+-
+-	psgmii = devm_platform_ioremap_resource_byname(pdev, "psgmii_phy");
+-	if (IS_ERR(psgmii))
+-		return PTR_ERR(psgmii);
+-
+-	priv->psgmii = devm_regmap_init_mmio(priv->dev, psgmii,
+-					     &qca8k_ipq4019_psgmii_phy_regmap_config);
+-	if (IS_ERR(priv->psgmii)) {
+-		ret = PTR_ERR(priv->psgmii);
+-		dev_err(priv->dev, "PSGMII regmap initialization failed, %d\n", ret);
+-		return ret;
+-	}
+-
+-	mdio_np = of_parse_phandle(np, "mdio", 0);
+-	if (!mdio_np) {
+-		dev_err(&pdev->dev, "unable to get MDIO bus phandle\n");
+-		of_node_put(mdio_np);
+-		return -EINVAL;
+-	}
+-
+-	priv->bus = of_mdio_find_bus(mdio_np);
+-	of_node_put(mdio_np);
+-	if (!priv->bus) {
+-		dev_err(&pdev->dev, "unable to find MDIO bus\n");
+-		return -EPROBE_DEFER;
+-	}
+-
+-	psgmii_ethphy_np = of_parse_phandle(np, "psgmii-ethphy", 0);
+-	if (!psgmii_ethphy_np) {
+-		dev_dbg(&pdev->dev, "unable to get PSGMII eth PHY phandle\n");
+-		of_node_put(psgmii_ethphy_np);
+-	}
+-
+-	if (psgmii_ethphy_np) {
+-		priv->psgmii_ethphy = of_phy_find_device(psgmii_ethphy_np);
+-		of_node_put(psgmii_ethphy_np);
+-		if (!priv->psgmii_ethphy) {
+-			dev_err(&pdev->dev, "unable to get PSGMII eth PHY\n");
+-			return -ENODEV;
+-		}
+-	}
+-
+-	priv->ds = devm_kzalloc(priv->dev, sizeof(*priv->ds), GFP_KERNEL);
+-	if (!priv->ds)
+-		return -ENOMEM;
+-
+-	priv->ds->dev = priv->dev;
+-	priv->ds->num_ports = QCA8K_NUM_PORTS;
+-	priv->ds->priv = priv;
+-	priv->ops = qca8k_switch_ops;
+-	priv->ds->ops = &priv->ops;
+-
+-	mutex_init(&priv->reg_mutex);
+-	platform_set_drvdata(pdev, priv);
+-
+-	return dsa_register_switch(priv->ds);
+-}
+-
+-static int
+-qca8k_ipq4019_remove(struct platform_device *pdev)
+-{
+-	struct qca8k_priv *priv = dev_get_drvdata(&pdev->dev);
+-	int i;
+-
+-	if (!priv)
+-		return 0;
+-
+-	for (i = 0; i < QCA8K_NUM_PORTS; i++)
+-		qca8k_port_set_status(priv, i, 0);
+-
+-	dsa_unregister_switch(priv->ds);
+-
+-	dev_set_drvdata(&pdev->dev, NULL);
+-
+-	return 0;
+-}
+-
+-static const struct of_device_id qca8k_ipq4019_of_match[] = {
+-	{ .compatible = "qca,ipq4019-qca8337n" },
+-	{ /* sentinel */ },
+-};
+-
+-static struct platform_driver qca8k_ipq4019_driver = {
+-	.probe = qca8k_ipq4019_probe,
+-	.remove = qca8k_ipq4019_remove,
+-	.driver = {
+-		.name = "qca8k-ipq4019",
+-		.of_match_table = qca8k_ipq4019_of_match,
+-	},
+-};
+-
+-module_platform_driver(qca8k_ipq4019_driver);
+-
+-MODULE_AUTHOR("Mathieu Olivari, John Crispin <john@phrozen.org>");
+-MODULE_AUTHOR("Gabor Juhos <j4g8y7@gmail.com>, Robert Marko <robert.marko@sartura.hr>");
+-MODULE_DESCRIPTION("Qualcomm IPQ4019 built-in switch driver");
+-MODULE_LICENSE("GPL v2");
+diff --git a/target/linux/ipq40xx/files/drivers/net/dsa/qca/qca8k-ipq4019.h b/target/linux/ipq40xx/files/drivers/net/dsa/qca/qca8k-ipq4019.h
+deleted file mode 100644
+index 1133501335..0000000000
+--- a/target/linux/ipq40xx/files/drivers/net/dsa/qca/qca8k-ipq4019.h
++++ /dev/null
+@@ -1,289 +0,0 @@
+-/* SPDX-License-Identifier: GPL-2.0-only */
+-/*
+- * Copyright (C) 2009 Felix Fietkau <nbd@nbd.name>
+- * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
+- * Copyright (c) 2015, The Linux Foundation. All rights reserved.
+- */
+-
+-#ifndef __QCA8K_H
+-#define __QCA8K_H
+-
+-#include <linux/regmap.h>
+-
+-#define QCA8K_NUM_PORTS					6
+-#define QCA8K_CPU_PORT					0
+-#define QCA8K_MAX_MTU					9000
+-
+-#define QCA8K_BUSY_WAIT_TIMEOUT				2000
+-
+-#define QCA8K_NUM_FDB_RECORDS				2048
+-
+-#define QCA8K_PORT_VID_DEF				1
+-
+-/* Global control registers */
+-#define QCA8K_REG_MASK_CTRL				0x000
+-#define   QCA8K_MASK_CTRL_REV_ID_MASK			GENMASK(7, 0)
+-#define   QCA8K_MASK_CTRL_REV_ID(x)			((x) >> 0)
+-#define   QCA8K_MASK_CTRL_DEVICE_ID_MASK		GENMASK(15, 8)
+-#define   QCA8K_MASK_CTRL_DEVICE_ID(x)			((x) >> 8)
+-#define QCA8K_REG_RGMII_CTRL				0x004
+-#define   QCA8K_RGMII_CTRL_RGMII_RXC			GENMASK(1, 0)
+-#define   QCA8K_RGMII_CTRL_RGMII_TXC			GENMASK(9, 8)
+-/* Some kind of CLK selection
+- * 0: gcc_ess_dly2ns
+- * 1: gcc_ess_clk
+- */
+-#define   QCA8K_RGMII_CTRL_CLK				BIT(10)
+-#define   QCA8K_RGMII_CTRL_DELAY_RMII0			GENMASK(17, 16)
+-#define   QCA8K_RGMII_CTRL_INVERT_RMII0_REF_CLK		BIT(18)
+-#define   QCA8K_RGMII_CTRL_DELAY_RMII1			GENMASK(20, 19)
+-#define   QCA8K_RGMII_CTRL_INVERT_RMII1_REF_CLK		BIT(21)
+-#define   QCA8K_RGMII_CTRL_INVERT_RMII0_MASTER_EN	BIT(24)
+-#define   QCA8K_RGMII_CTRL_INVERT_RMII1_MASTER_EN	BIT(25)
+-#define QCA8K_REG_MODULE_EN				0x030
+-#define   QCA8K_MODULE_EN_MIB				BIT(0)
+-#define QCA8K_REG_MIB					0x034
+-#define   QCA8K_MIB_FLUSH				BIT(24)
+-#define   QCA8K_MIB_CPU_KEEP				BIT(20)
+-#define   QCA8K_MIB_BUSY				BIT(17)
+-#define QCA8K_GOL_MAC_ADDR0				0x60
+-#define QCA8K_GOL_MAC_ADDR1				0x64
+-#define QCA8K_MAX_FRAME_SIZE				0x78
+-#define QCA8K_REG_PORT_STATUS(_i)			(0x07c + (_i) * 4)
+-#define   QCA8K_PORT_STATUS_SPEED			GENMASK(1, 0)
+-#define   QCA8K_PORT_STATUS_SPEED_10			0
+-#define   QCA8K_PORT_STATUS_SPEED_100			0x1
+-#define   QCA8K_PORT_STATUS_SPEED_1000			0x2
+-#define   QCA8K_PORT_STATUS_TXMAC			BIT(2)
+-#define   QCA8K_PORT_STATUS_RXMAC			BIT(3)
+-#define   QCA8K_PORT_STATUS_TXFLOW			BIT(4)
+-#define   QCA8K_PORT_STATUS_RXFLOW			BIT(5)
+-#define   QCA8K_PORT_STATUS_DUPLEX			BIT(6)
+-#define   QCA8K_PORT_STATUS_LINK_UP			BIT(8)
+-#define   QCA8K_PORT_STATUS_LINK_AUTO			BIT(9)
+-#define   QCA8K_PORT_STATUS_LINK_PAUSE			BIT(10)
+-#define   QCA8K_PORT_STATUS_FLOW_AUTO			BIT(12)
+-#define QCA8K_REG_PORT_HDR_CTRL(_i)			(0x9c + (_i * 4))
+-#define   QCA8K_PORT_HDR_CTRL_RX_MASK			GENMASK(3, 2)
+-#define   QCA8K_PORT_HDR_CTRL_RX_S			2
+-#define   QCA8K_PORT_HDR_CTRL_TX_MASK			GENMASK(1, 0)
+-#define   QCA8K_PORT_HDR_CTRL_TX_S			0
+-#define   QCA8K_PORT_HDR_CTRL_ALL			2
+-#define   QCA8K_PORT_HDR_CTRL_MGMT			1
+-#define   QCA8K_PORT_HDR_CTRL_NONE			0
+-#define QCA8K_REG_SGMII_CTRL				0x0e0
+-#define   QCA8K_SGMII_EN_PLL				BIT(1)
+-#define   QCA8K_SGMII_EN_RX				BIT(2)
+-#define   QCA8K_SGMII_EN_TX				BIT(3)
+-#define   QCA8K_SGMII_EN_SD				BIT(4)
+-#define   QCA8K_SGMII_CLK125M_DELAY			BIT(7)
+-#define   QCA8K_SGMII_MODE_CTRL_MASK			(BIT(22) | BIT(23))
+-#define   QCA8K_SGMII_MODE_CTRL_BASEX			(0 << 22)
+-#define   QCA8K_SGMII_MODE_CTRL_PHY			(1 << 22)
+-#define   QCA8K_SGMII_MODE_CTRL_MAC			(2 << 22)
+-
+-/* EEE control registers */
+-#define QCA8K_REG_EEE_CTRL				0x100
+-#define  QCA8K_REG_EEE_CTRL_LPI_EN(_i)			((_i + 1) * 2)
+-
+-/* ACL registers */
+-#define QCA8K_REG_PORT_VLAN_CTRL0(_i)			(0x420 + (_i * 8))
+-#define   QCA8K_PORT_VLAN_CVID(x)			(x << 16)
+-#define   QCA8K_PORT_VLAN_SVID(x)			x
+-#define QCA8K_REG_PORT_VLAN_CTRL1(_i)			(0x424 + (_i * 8))
+-#define QCA8K_REG_IPV4_PRI_BASE_ADDR			0x470
+-#define QCA8K_REG_IPV4_PRI_ADDR_MASK			0x474
+-
+-/* Lookup registers */
+-#define QCA8K_REG_ATU_DATA0				0x600
+-#define   QCA8K_ATU_ADDR2_S				24
+-#define   QCA8K_ATU_ADDR3_S				16
+-#define   QCA8K_ATU_ADDR4_S				8
+-#define QCA8K_REG_ATU_DATA1				0x604
+-#define   QCA8K_ATU_PORT_M				0x7f
+-#define   QCA8K_ATU_PORT_S				16
+-#define   QCA8K_ATU_ADDR0_S				8
+-#define QCA8K_REG_ATU_DATA2				0x608
+-#define   QCA8K_ATU_VID_M				0xfff
+-#define   QCA8K_ATU_VID_S				8
+-#define   QCA8K_ATU_STATUS_M				0xf
+-#define   QCA8K_ATU_STATUS_STATIC			0xf
+-#define QCA8K_REG_ATU_FUNC				0x60c
+-#define   QCA8K_ATU_FUNC_BUSY				BIT(31)
+-#define   QCA8K_ATU_FUNC_PORT_EN			BIT(14)
+-#define   QCA8K_ATU_FUNC_MULTI_EN			BIT(13)
+-#define   QCA8K_ATU_FUNC_FULL				BIT(12)
+-#define   QCA8K_ATU_FUNC_PORT_M				0xf
+-#define   QCA8K_ATU_FUNC_PORT_S				8
+-#define QCA8K_REG_VTU_FUNC0				0x610
+-#define   QCA8K_VTU_FUNC0_VALID				BIT(20)
+-#define   QCA8K_VTU_FUNC0_IVL_EN			BIT(19)
+-#define   QCA8K_VTU_FUNC0_EG_MODE_S(_i)			(4 + (_i) * 2)
+-#define   QCA8K_VTU_FUNC0_EG_MODE_MASK			3
+-#define   QCA8K_VTU_FUNC0_EG_MODE_UNMOD			0
+-#define   QCA8K_VTU_FUNC0_EG_MODE_UNTAG			1
+-#define   QCA8K_VTU_FUNC0_EG_MODE_TAG			2
+-#define   QCA8K_VTU_FUNC0_EG_MODE_NOT			3
+-#define QCA8K_REG_VTU_FUNC1				0x614
+-#define   QCA8K_VTU_FUNC1_BUSY				BIT(31)
+-#define   QCA8K_VTU_FUNC1_VID_S				16
+-#define   QCA8K_VTU_FUNC1_FULL				BIT(4)
+-#define QCA8K_REG_GLOBAL_FW_CTRL0			0x620
+-#define   QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN		BIT(10)
+-#define QCA8K_REG_GLOBAL_FW_CTRL1			0x624
+-#define   QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_S		24
+-#define   QCA8K_GLOBAL_FW_CTRL1_BC_DP_S			16
+-#define   QCA8K_GLOBAL_FW_CTRL1_MC_DP_S			8
+-#define   QCA8K_GLOBAL_FW_CTRL1_UC_DP_S			0
+-#define QCA8K_PORT_LOOKUP_CTRL(_i)			(0x660 + (_i) * 0xc)
+-#define   QCA8K_PORT_LOOKUP_MEMBER			GENMASK(6, 0)
+-#define   QCA8K_PORT_LOOKUP_VLAN_MODE			GENMASK(9, 8)
+-#define   QCA8K_PORT_LOOKUP_VLAN_MODE_NONE		(0 << 8)
+-#define   QCA8K_PORT_LOOKUP_VLAN_MODE_FALLBACK		(1 << 8)
+-#define   QCA8K_PORT_LOOKUP_VLAN_MODE_CHECK		(2 << 8)
+-#define   QCA8K_PORT_LOOKUP_VLAN_MODE_SECURE		(3 << 8)
+-#define   QCA8K_PORT_LOOKUP_STATE_MASK			GENMASK(18, 16)
+-#define   QCA8K_PORT_LOOKUP_STATE_DISABLED		(0 << 16)
+-#define   QCA8K_PORT_LOOKUP_STATE_BLOCKING		(1 << 16)
+-#define   QCA8K_PORT_LOOKUP_STATE_LISTENING		(2 << 16)
+-#define   QCA8K_PORT_LOOKUP_STATE_LEARNING		(3 << 16)
+-#define   QCA8K_PORT_LOOKUP_STATE_FORWARD		(4 << 16)
+-#define   QCA8K_PORT_LOOKUP_STATE			GENMASK(18, 16)
+-#define   QCA8K_PORT_LOOKUP_LEARN			BIT(20)
+-#define   QCA8K_PORT_LOOKUP_LOOPBACK	BIT(21)
+-
+-#define QCA8K_REG_GLOBAL_FC_THRESH			0x800
+-#define   QCA8K_GLOBAL_FC_GOL_XON_THRES(x)		((x) << 16)
+-#define   QCA8K_GLOBAL_FC_GOL_XON_THRES_S		GENMASK(24, 16)
+-#define   QCA8K_GLOBAL_FC_GOL_XOFF_THRES(x)		((x) << 0)
+-#define   QCA8K_GLOBAL_FC_GOL_XOFF_THRES_S		GENMASK(8, 0)
+-
+-#define QCA8K_REG_PORT_HOL_CTRL0(_i)			(0x970 + (_i) * 0x8)
+-#define   QCA8K_PORT_HOL_CTRL0_EG_PRI0_BUF		GENMASK(3, 0)
+-#define   QCA8K_PORT_HOL_CTRL0_EG_PRI0(x)		((x) << 0)
+-#define   QCA8K_PORT_HOL_CTRL0_EG_PRI1_BUF		GENMASK(7, 4)
+-#define   QCA8K_PORT_HOL_CTRL0_EG_PRI1(x)		((x) << 4)
+-#define   QCA8K_PORT_HOL_CTRL0_EG_PRI2_BUF		GENMASK(11, 8)
+-#define   QCA8K_PORT_HOL_CTRL0_EG_PRI2(x)		((x) << 8)
+-#define   QCA8K_PORT_HOL_CTRL0_EG_PRI3_BUF		GENMASK(15, 12)
+-#define   QCA8K_PORT_HOL_CTRL0_EG_PRI3(x)		((x) << 12)
+-#define   QCA8K_PORT_HOL_CTRL0_EG_PRI4_BUF		GENMASK(19, 16)
+-#define   QCA8K_PORT_HOL_CTRL0_EG_PRI4(x)		((x) << 16)
+-#define   QCA8K_PORT_HOL_CTRL0_EG_PRI5_BUF		GENMASK(23, 20)
+-#define   QCA8K_PORT_HOL_CTRL0_EG_PRI5(x)		((x) << 20)
+-#define   QCA8K_PORT_HOL_CTRL0_EG_PORT_BUF		GENMASK(29, 24)
+-#define   QCA8K_PORT_HOL_CTRL0_EG_PORT(x)		((x) << 24)
+-
+-#define QCA8K_REG_PORT_HOL_CTRL1(_i)			(0x974 + (_i) * 0x8)
+-#define   QCA8K_PORT_HOL_CTRL1_ING_BUF			GENMASK(3, 0)
+-#define   QCA8K_PORT_HOL_CTRL1_ING(x)			((x) << 0)
+-#define   QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN		BIT(6)
+-#define   QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN		BIT(7)
+-#define   QCA8K_PORT_HOL_CTRL1_WRED_EN			BIT(8)
+-#define   QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN		BIT(16)
+-
+-/* Pkt edit registers */
+-#define QCA8K_EGRESS_VLAN(x)				(0x0c70 + (4 * (x / 2)))
+-
+-/* L3 registers */
+-#define QCA8K_HROUTER_CONTROL				0xe00
+-#define   QCA8K_HROUTER_CONTROL_GLB_LOCKTIME_M		GENMASK(17, 16)
+-#define   QCA8K_HROUTER_CONTROL_GLB_LOCKTIME_S		16
+-#define   QCA8K_HROUTER_CONTROL_ARP_AGE_MODE		1
+-#define QCA8K_HROUTER_PBASED_CONTROL1			0xe08
+-#define QCA8K_HROUTER_PBASED_CONTROL2			0xe0c
+-#define QCA8K_HNAT_CONTROL				0xe38
+-
+-/* MIB registers */
+-#define QCA8K_PORT_MIB_COUNTER(_i)			(0x1000 + (_i) * 0x100)
+-
+-/* IPQ4019 PSGMII PHY registers */
+-#define PSGMIIPHY_MODE_CONTROL				0x1b4
+-#define   PSGMIIPHY_MODE_ATHR_CSCO_MODE_25M		BIT(0)
+-#define PSGMIIPHY_TX_CONTROL				0x288
+-#define   PSGMIIPHY_TX_CONTROL_MAGIC_VALUE		0x8380
+-#define PSGMIIPHY_VCO_CALIBRATION_CONTROL_REGISTER_1	0x9c
+-#define   PSGMIIPHY_REG_PLL_VCO_CALIB_RESTART		BIT(14)
+-#define PSGMIIPHY_VCO_CALIBRATION_CONTROL_REGISTER_2	0xa0
+-#define   PSGMIIPHY_REG_PLL_VCO_CALIB_READY		BIT(0)
+-
+-#define   QCA8K_PSGMII_CALB_NUM				100
+-#define   MII_QCA8075_SSTATUS				0x11
+-#define   QCA8075_PHY_SPEC_STATUS_LINK			BIT(10)
+-#define   QCA8075_MMD7_CRC_AND_PKTS_COUNT		0x8029
+-#define   QCA8075_MMD7_PKT_GEN_PKT_NUMB			0x8021
+-#define   QCA8075_MMD7_PKT_GEN_PKT_SIZE			0x8062
+-#define   QCA8075_MMD7_PKT_GEN_CTRL			0x8020
+-#define   QCA8075_MMD7_CNT_SELFCLR			BIT(1)
+-#define   QCA8075_MMD7_CNT_FRAME_CHK_EN			BIT(0)
+-#define   QCA8075_MMD7_PKT_GEN_START			BIT(13)
+-#define   QCA8075_MMD7_PKT_GEN_INPROGR			BIT(15)
+-#define   QCA8075_MMD7_IG_FRAME_RECV_CNT_HI		0x802a
+-#define   QCA8075_MMD7_IG_FRAME_RECV_CNT_LO		0x802b
+-#define   QCA8075_MMD7_IG_FRAME_ERR_CNT			0x802c
+-#define   QCA8075_MMD7_EG_FRAME_RECV_CNT_HI		0x802d
+-#define   QCA8075_MMD7_EG_FRAME_RECV_CNT_LO		0x802e
+-#define   QCA8075_MMD7_EG_FRAME_ERR_CNT			0x802f
+-#define   QCA8075_MMD7_MDIO_BRDCST_WRITE		0x8028
+-#define   QCA8075_MMD7_MDIO_BRDCST_WRITE_EN 		BIT(15)
+-#define   QCA8075_MDIO_BRDCST_PHY_ADDR			0x1f
+-#define   QCA8075_PKT_GEN_PKTS_COUNT			4096
+-
+-enum {
+-	QCA8K_PORT_SPEED_10M = 0,
+-	QCA8K_PORT_SPEED_100M = 1,
+-	QCA8K_PORT_SPEED_1000M = 2,
+-	QCA8K_PORT_SPEED_ERR = 3,
+-};
+-
+-enum qca8k_fdb_cmd {
+-	QCA8K_FDB_FLUSH	= 1,
+-	QCA8K_FDB_LOAD = 2,
+-	QCA8K_FDB_PURGE = 3,
+-	QCA8K_FDB_NEXT = 6,
+-	QCA8K_FDB_SEARCH = 7,
+-};
+-
+-enum qca8k_vlan_cmd {
+-	QCA8K_VLAN_FLUSH = 1,
+-	QCA8K_VLAN_LOAD = 2,
+-	QCA8K_VLAN_PURGE = 3,
+-	QCA8K_VLAN_REMOVE_PORT = 4,
+-	QCA8K_VLAN_NEXT = 5,
+-	QCA8K_VLAN_READ = 6,
+-};
+-
+-struct ar8xxx_port_status {
+-	int enabled;
+-};
+-
+-struct qca8k_priv {
+-	struct regmap *regmap;
+-	struct mii_bus *bus;
+-	struct ar8xxx_port_status port_sts[QCA8K_NUM_PORTS];
+-	struct dsa_switch *ds;
+-	struct mutex reg_mutex;
+-	struct device *dev;
+-	struct dsa_switch_ops ops;
+-	unsigned int port_mtu[QCA8K_NUM_PORTS];
+-
+-	/* IPQ4019 specific */
+-	struct regmap *psgmii;
+-	bool psgmii_calibrated;
+-	struct phy_device *psgmii_ethphy;
+-};
+-
+-struct qca8k_mib_desc {
+-	unsigned int size;
+-	unsigned int offset;
+-	const char *name;
+-};
+-
+-struct qca8k_fdb {
+-	u16 vid;
+-	u8 port_mask;
+-	u8 aging;
+-	u8 mac[6];
+-};
+-
+-#endif /* __QCA8K_H */
+diff --git a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/Makefile b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/Makefile
+deleted file mode 100644
+index 4f2db7283e..0000000000
+--- a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/Makefile
++++ /dev/null
+@@ -1,8 +0,0 @@
+-# SPDX-License-Identifier: GPL-2.0-only
+-#
+-# Makefile for the IPQ ESS driver
+-#
+-
+-obj-$(CONFIG_QCOM_IPQ4019_ESS_EDMA) += ipq_ess.o
+-
+-ipq_ess-objs := ipqess.o ipqess_ethtool.o
+diff --git a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess.c b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess.c
+deleted file mode 100644
+index ee33bb0166..0000000000
+--- a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess.c
++++ /dev/null
+@@ -1,1336 +0,0 @@
+-// SPDX-License-Identifier: (GPL-2.0 OR ISC)
+-/* Copyright (c) 2014 - 2017, The Linux Foundation. All rights reserved.
+- * Copyright (c) 2017 - 2018, John Crispin <john@phrozen.org>
+- * Copyright (c) 2018 - 2019, Christian Lamparter <chunkeey@gmail.com>
+- * Copyright (c) 2020 - 2021, Gabor Juhos <j4g8y7@gmail.com>
+- *
+- * Permission to use, copy, modify, and/or distribute this software for
+- * any purpose with or without fee is hereby granted, provided that the
+- * above copyright notice and this permission notice appear in all copies.
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
+- * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#include <linux/bitfield.h>
+-#include <linux/clk.h>
+-#include <linux/dsa/ipq4019.h>
+-#include <linux/if_vlan.h>
+-#include <linux/interrupt.h>
+-#include <linux/module.h>
+-#include <linux/of.h>
+-#include <linux/of_device.h>
+-#include <linux/of_mdio.h>
+-#include <linux/of_net.h>
+-#include <linux/phylink.h>
+-#include <linux/platform_device.h>
+-#include <linux/reset.h>
+-#include <linux/skbuff.h>
+-#include <linux/vmalloc.h>
+-#include <net/checksum.h>
+-#include <net/dsa.h>
+-#include <net/ip6_checksum.h>
+-
+-#include "ipqess.h"
+-
+-#define IPQESS_RRD_SIZE		16
+-#define IPQESS_NEXT_IDX(X, Y)  (((X) + 1) & ((Y) - 1))
+-#define IPQESS_TX_DMA_BUF_LEN	0x3fff
+-
+-static void ipqess_w32(struct ipqess *ess, u32 reg, u32 val)
+-{
+-	writel(val, ess->hw_addr + reg);
+-}
+-
+-static u32 ipqess_r32(struct ipqess *ess, u16 reg)
+-{
+-	return readl(ess->hw_addr + reg);
+-}
+-
+-static void ipqess_m32(struct ipqess *ess, u32 mask, u32 val, u16 reg)
+-{
+-	u32 _val = ipqess_r32(ess, reg);
+-	_val &= ~mask;
+-	_val |= val;
+-	ipqess_w32(ess, reg, _val);
+-}
+-
+-void ipqess_update_hw_stats(struct ipqess *ess)
+-{
+-	uint32_t *p;
+-	u32 stat;
+-	int i;
+-
+-	lockdep_assert_held(&ess->stats_lock);
+-
+-	p = (uint32_t *)&(ess->ipqessstats);
+-	for (i = 0; i < IPQESS_MAX_TX_QUEUE; i++) {
+-		stat = ipqess_r32(ess, IPQESS_REG_TX_STAT_PKT_Q(i));
+-		*p += stat;
+-		p++;
+-	}
+-
+-	for (i = 0; i < IPQESS_MAX_TX_QUEUE; i++) {
+-		stat = ipqess_r32(ess, IPQESS_REG_TX_STAT_BYTE_Q(i));
+-		*p += stat;
+-		p++;
+-	}
+-
+-	for (i = 0; i < IPQESS_MAX_RX_QUEUE; i++) {
+-		stat = ipqess_r32(ess, IPQESS_REG_RX_STAT_PKT_Q(i));
+-		*p += stat;
+-		p++;
+-	}
+-
+-	for (i = 0; i < IPQESS_MAX_RX_QUEUE; i++) {
+-		stat = ipqess_r32(ess, IPQESS_REG_RX_STAT_BYTE_Q(i));
+-		*p += stat;
+-		p++;
+-	}
+-}
+-
+-static int ipqess_tx_ring_alloc(struct ipqess *ess)
+-{
+-	struct device *dev = &ess->pdev->dev;
+-	int i;
+-
+-	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+-		struct ipqess_tx_ring *tx_ring = &ess->tx_ring[i];
+-		size_t size;
+-		u32 idx;
+-
+-		tx_ring->ess = ess;
+-		tx_ring->ring_id = i;
+-		tx_ring->idx = i * 4;
+-		tx_ring->count = IPQESS_TX_RING_SIZE;
+-		tx_ring->nq = netdev_get_tx_queue(ess->netdev, i);
+-
+-		size = sizeof(struct ipqess_buf) * IPQESS_TX_RING_SIZE;
+-		tx_ring->buf = devm_kzalloc(dev, size, GFP_KERNEL);
+-		if (!tx_ring->buf) {
+-			netdev_err(ess->netdev, "buffer alloc of tx ring failed");
+-			return -ENOMEM;
+-		}
+-
+-		size = sizeof(struct ipqess_tx_desc) * IPQESS_TX_RING_SIZE;
+-		tx_ring->hw_desc = dmam_alloc_coherent(dev, size, &tx_ring->dma,
+-						       GFP_KERNEL | __GFP_ZERO);
+-		if (!tx_ring->hw_desc) {
+-			netdev_err(ess->netdev, "descriptor allocation for tx ring failed");
+-			return -ENOMEM;
+-		}
+-
+-		ipqess_w32(ess, IPQESS_REG_TPD_BASE_ADDR_Q(tx_ring->idx),
+-			 (u32)tx_ring->dma);
+-
+-		idx = ipqess_r32(ess, IPQESS_REG_TPD_IDX_Q(tx_ring->idx));
+-		idx >>= IPQESS_TPD_CONS_IDX_SHIFT; /* need u32 here */
+-		idx &= 0xffff;
+-		tx_ring->head = tx_ring->tail = idx;
+-
+-		ipqess_m32(ess, IPQESS_TPD_PROD_IDX_MASK << IPQESS_TPD_PROD_IDX_SHIFT,
+-			 idx, IPQESS_REG_TPD_IDX_Q(tx_ring->idx));
+-		ipqess_w32(ess, IPQESS_REG_TX_SW_CONS_IDX_Q(tx_ring->idx), idx);
+-		ipqess_w32(ess, IPQESS_REG_TPD_RING_SIZE, IPQESS_TX_RING_SIZE);
+-	}
+-
+-	return 0;
+-}
+-
+-static int ipqess_tx_unmap_and_free(struct device *dev, struct ipqess_buf *buf)
+-{
+-	int len = 0;
+-
+-	if (buf->flags & IPQESS_DESC_SINGLE)
+-		dma_unmap_single(dev, buf->dma,	buf->length, DMA_TO_DEVICE);
+-	else if (buf->flags & IPQESS_DESC_PAGE)
+-		dma_unmap_page(dev, buf->dma, buf->length, DMA_TO_DEVICE);
+-
+-	if (buf->flags & IPQESS_DESC_LAST) {
+-		len = buf->skb->len;
+-		dev_kfree_skb_any(buf->skb);
+-	}
+-
+-	buf->flags = 0;
+-
+-	return len;
+-}
+-
+-static void ipqess_tx_ring_free(struct ipqess *ess)
+-{
+-	int i;
+-
+-	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+-		int j;
+-
+-		if (ess->tx_ring[i].hw_desc)
+-			continue;
+-
+-		for (j = 0; j < IPQESS_TX_RING_SIZE; j++) {
+-			struct ipqess_buf *buf = &ess->tx_ring[i].buf[j];
+-
+-			ipqess_tx_unmap_and_free(&ess->pdev->dev, buf);
+-		}
+-
+-		ess->tx_ring[i].buf = NULL;
+-	}
+-}
+-
+-static int ipqess_rx_buf_prepare(struct ipqess_buf *buf,
+-	struct ipqess_rx_ring *rx_ring)
+-{
+-	/* Clean the HW DESC header, otherwise we might end up
+-	 * with a spurious desc because of random garbage */
+-	memset(buf->skb->data, 0, sizeof(struct ipqess_rx_desc));
+-
+-	buf->dma = dma_map_single(rx_ring->ppdev, buf->skb->data,
+-				  IPQESS_RX_HEAD_BUFF_SIZE, DMA_FROM_DEVICE);
+-	if (dma_mapping_error(rx_ring->ppdev, buf->dma)) {
+-		dev_err_once(rx_ring->ppdev,
+-			"IPQESS DMA mapping failed for linear address %x",
+-			buf->dma);
+-		dev_kfree_skb_any(buf->skb);
+-		buf->skb = NULL;
+-		return -EFAULT;
+-	}
+-
+-	buf->length = IPQESS_RX_HEAD_BUFF_SIZE;
+-	rx_ring->hw_desc[rx_ring->head] = (struct ipqess_rx_desc *)buf->dma;
+-	rx_ring->head = (rx_ring->head + 1) % IPQESS_RX_RING_SIZE;
+-
+-	ipqess_m32(rx_ring->ess, IPQESS_RFD_PROD_IDX_BITS,
+-		 (rx_ring->head + IPQESS_RX_RING_SIZE - 1) % IPQESS_RX_RING_SIZE,
+-		 IPQESS_REG_RFD_IDX_Q(rx_ring->idx));
+-
+-	return 0;
+-}
+-
+-/* locking is handled by the caller */
+-static int ipqess_rx_buf_alloc_napi(struct ipqess_rx_ring *rx_ring)
+-{
+-	struct ipqess_buf *buf = &rx_ring->buf[rx_ring->head];
+-
+-	buf->skb = napi_alloc_skb(&rx_ring->napi_rx,
+-		IPQESS_RX_HEAD_BUFF_SIZE);
+-	if (!buf->skb)
+-		return -ENOMEM;
+-
+-	return ipqess_rx_buf_prepare(buf, rx_ring);
+-}
+-
+-static int ipqess_rx_buf_alloc(struct ipqess_rx_ring *rx_ring)
+-{
+-	struct ipqess_buf *buf = &rx_ring->buf[rx_ring->head];
+-
+-	buf->skb = netdev_alloc_skb_ip_align(rx_ring->ess->netdev,
+-		IPQESS_RX_HEAD_BUFF_SIZE);
+-	if (!buf->skb)
+-		return -ENOMEM;
+-
+-	return ipqess_rx_buf_prepare(buf, rx_ring);
+-}
+-
+-static void ipqess_refill_work(struct work_struct *work)
+-{
+-	struct ipqess_rx_ring_refill *rx_refill = container_of(work,
+-		struct ipqess_rx_ring_refill, refill_work);
+-	struct ipqess_rx_ring *rx_ring = rx_refill->rx_ring;
+-	int refill = 0;
+-
+-	/* don't let this loop by accident. */
+-	while (atomic_dec_and_test(&rx_ring->refill_count)) {
+-		napi_disable(&rx_ring->napi_rx);
+-		if (ipqess_rx_buf_alloc(rx_ring)) {
+-			refill++;
+-			dev_dbg(rx_ring->ppdev,
+-				"Not all buffers were reallocated");
+-		}
+-		napi_enable(&rx_ring->napi_rx);
+-	}
+-
+-	if (atomic_add_return(refill, &rx_ring->refill_count))
+-		schedule_work(&rx_refill->refill_work);
+-}
+-
+-
+-static int ipqess_rx_ring_alloc(struct ipqess *ess)
+-{
+-	int i;
+-
+-	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+-		int j;
+-
+-		ess->rx_ring[i].ess = ess;
+-		ess->rx_ring[i].ppdev = &ess->pdev->dev;
+-		ess->rx_ring[i].ring_id = i;
+-		ess->rx_ring[i].idx = i * 2;
+-
+-		ess->rx_ring[i].buf = devm_kzalloc(&ess->pdev->dev,
+-			sizeof(struct ipqess_buf) * IPQESS_RX_RING_SIZE,
+-			GFP_KERNEL);
+-		if (!ess->rx_ring[i].buf)
+-			return -ENOMEM;
+-
+-		ess->rx_ring[i].hw_desc = dmam_alloc_coherent(&ess->pdev->dev,
+-			sizeof(struct ipqess_rx_desc) * IPQESS_RX_RING_SIZE,
+-			&ess->rx_ring[i].dma, GFP_KERNEL);
+-		if (!ess->rx_ring[i].hw_desc)
+-			return -ENOMEM;
+-
+-		for (j = 0; j < IPQESS_RX_RING_SIZE; j++)
+-			if (ipqess_rx_buf_alloc(&ess->rx_ring[i]) < 0)
+-				return -ENOMEM;
+-
+-		ess->rx_refill[i].rx_ring = &ess->rx_ring[i];
+-		INIT_WORK(&ess->rx_refill[i].refill_work, ipqess_refill_work);
+-
+-		ipqess_w32(ess, IPQESS_REG_RFD_BASE_ADDR_Q(ess->rx_ring[i].idx),
+-			 (u32)(ess->rx_ring[i].dma));
+-	}
+-
+-	ipqess_w32(ess, IPQESS_REG_RX_DESC0,
+-		 (IPQESS_RX_HEAD_BUFF_SIZE << IPQESS_RX_BUF_SIZE_SHIFT) |
+-		 (IPQESS_RX_RING_SIZE << IPQESS_RFD_RING_SIZE_SHIFT));
+-
+-	return 0;
+-}
+-
+-static void ipqess_rx_ring_free(struct ipqess *ess)
+-{
+-	int i;
+-
+-	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+-		int j;
+-
+-		atomic_set(&ess->rx_ring[i].refill_count, 0);
+-		cancel_work_sync(&ess->rx_refill[i].refill_work);
+-
+-		for (j = 0; j < IPQESS_RX_RING_SIZE; j++) {
+-			dma_unmap_single(&ess->pdev->dev,
+-					 ess->rx_ring[i].buf[j].dma,
+-					 ess->rx_ring[i].buf[j].length,
+-					 DMA_FROM_DEVICE);
+-			dev_kfree_skb_any(ess->rx_ring[i].buf[j].skb);
+-		}
+-	}
+-}
+-
+-static struct net_device_stats *ipqess_get_stats(struct net_device *netdev)
+-{
+-	struct ipqess *ess = netdev_priv(netdev);
+-
+-	spin_lock(&ess->stats_lock);
+-	ipqess_update_hw_stats(ess);
+-	spin_unlock(&ess->stats_lock);
+-
+-	return &ess->stats;
+-}
+-
+-static int ipqess_rx_poll(struct ipqess_rx_ring *rx_ring, int budget)
+-{
+-	u32 length = 0, num_desc, tail, rx_ring_tail;
+-	int done = 0;
+-
+-	rx_ring_tail = rx_ring->tail;
+-
+-	tail = ipqess_r32(rx_ring->ess, IPQESS_REG_RFD_IDX_Q(rx_ring->idx));
+-	tail >>= IPQESS_RFD_CONS_IDX_SHIFT;
+-	tail &= IPQESS_RFD_CONS_IDX_MASK;
+-
+-	while (done < budget) {
+-		struct sk_buff *skb;
+-		struct ipqess_rx_desc *rd;
+-
+-		if (rx_ring_tail == tail)
+-			break;
+-
+-		dma_unmap_single(rx_ring->ppdev,
+-				 rx_ring->buf[rx_ring_tail].dma,
+-				 rx_ring->buf[rx_ring_tail].length,
+-				 DMA_FROM_DEVICE);
+-
+-		skb = xchg(&rx_ring->buf[rx_ring_tail].skb, NULL);
+-		rd = (struct ipqess_rx_desc *)skb->data;
+-		rx_ring_tail = IPQESS_NEXT_IDX(rx_ring_tail, IPQESS_RX_RING_SIZE);
+-
+-		/* Check if RRD is valid */
+-		if (!(rd->rrd7 & IPQESS_RRD_DESC_VALID)) {
+-			num_desc = 1;
+-			dev_kfree_skb_any(skb);
+-			goto skip;
+-		}
+-
+-		num_desc = rd->rrd1 & IPQESS_RRD_NUM_RFD_MASK;
+-		length = rd->rrd6 & IPQESS_RRD_PKT_SIZE_MASK;
+-
+-		skb_reserve(skb, IPQESS_RRD_SIZE);
+-		if (num_desc > 1) {
+-			/* can we use build_skb here ? */
+-			struct sk_buff *skb_prev = NULL;
+-			int size_remaining;
+-			int i;
+-
+-			skb->data_len = 0;
+-			skb->tail += (IPQESS_RX_HEAD_BUFF_SIZE - IPQESS_RRD_SIZE);
+-			skb->len = skb->truesize = length;
+-			size_remaining = length - (IPQESS_RX_HEAD_BUFF_SIZE - IPQESS_RRD_SIZE);
+-
+-			for (i = 1; i < num_desc; i++) {
+-				/* TODO: use build_skb ? */
+-				struct sk_buff *skb_temp = rx_ring->buf[rx_ring_tail].skb;
+-
+-				dma_unmap_single(rx_ring->ppdev,
+-						 rx_ring->buf[rx_ring_tail].dma,
+-						 rx_ring->buf[rx_ring_tail].length,
+-						 DMA_FROM_DEVICE);
+-
+-				skb_put(skb_temp, min(size_remaining, IPQESS_RX_HEAD_BUFF_SIZE));
+-				if (skb_prev)
+-					skb_prev->next = rx_ring->buf[rx_ring_tail].skb;
+-				else
+-					skb_shinfo(skb)->frag_list = rx_ring->buf[rx_ring_tail].skb;
+-				skb_prev = rx_ring->buf[rx_ring_tail].skb;
+-				rx_ring->buf[rx_ring_tail].skb->next = NULL;
+-
+-				skb->data_len += rx_ring->buf[rx_ring_tail].skb->len;
+-				size_remaining -= rx_ring->buf[rx_ring_tail].skb->len;
+-
+-				rx_ring_tail = IPQESS_NEXT_IDX(rx_ring_tail, IPQESS_RX_RING_SIZE);
+-			}
+-
+-		} else {
+-			skb_put(skb, length);
+-		}
+-
+-		skb->dev = rx_ring->ess->netdev;
+-		skb->protocol = eth_type_trans(skb, rx_ring->ess->netdev);
+-		skb_record_rx_queue(skb, rx_ring->ring_id);
+-
+-		if (rd->rrd6 & IPQESS_RRD_CSUM_FAIL_MASK)
+-			skb_checksum_none_assert(skb);
+-		else
+-			skb->ip_summed = CHECKSUM_UNNECESSARY;
+-
+-		if (rd->rrd7 & IPQESS_RRD_CVLAN) {
+-			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), rd->rrd4);
+-		} else if (rd->rrd1 & IPQESS_RRD_SVLAN) {
+-			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021AD), rd->rrd4);
+-		}
+-		napi_gro_receive(&rx_ring->napi_rx, skb);
+-
+-		/* TODO: do we need to have these here ? */
+-		rx_ring->ess->stats.rx_packets++;
+-		rx_ring->ess->stats.rx_bytes += length;
+-
+-		done++;
+-skip:
+-
+-		num_desc += atomic_xchg(&rx_ring->refill_count, 0);
+-		while (num_desc) {
+-			if (ipqess_rx_buf_alloc_napi(rx_ring)) {
+-				num_desc = atomic_add_return(num_desc,
+-					 &rx_ring->refill_count);
+-				if (num_desc >= ((4 * IPQESS_RX_RING_SIZE + 6) / 7))
+-					schedule_work(&rx_ring->ess->rx_refill[rx_ring->ring_id].refill_work);
+-				break;
+-			}
+-			num_desc--;
+-		}
+-	}
+-
+-	ipqess_w32(rx_ring->ess, IPQESS_REG_RX_SW_CONS_IDX_Q(rx_ring->idx),
+-		   rx_ring_tail);
+-	rx_ring->tail = rx_ring_tail;
+-
+-	return done;
+-}
+-
+-static int ipqess_tx_complete(struct ipqess_tx_ring *tx_ring, int budget)
+-{
+-	u32 tail;
+-	int done = 0;
+-	int total = 0, ret;
+-
+-	tail = ipqess_r32(tx_ring->ess, IPQESS_REG_TPD_IDX_Q(tx_ring->idx));
+-	tail >>= IPQESS_TPD_CONS_IDX_SHIFT;
+-	tail &= IPQESS_TPD_CONS_IDX_MASK;
+-
+-	while ((tx_ring->tail != tail) && (done < budget)) {
+-		//pr_info("freeing txq:%d tail:%d tailbuf:%p\n", tx_ring->idx, tx_ring->tail, &tx_ring->buf[tx_ring->tail]);
+-		ret = ipqess_tx_unmap_and_free(&tx_ring->ess->pdev->dev,
+-				       &tx_ring->buf[tx_ring->tail]);
+-		tx_ring->tail = IPQESS_NEXT_IDX(tx_ring->tail, tx_ring->count);
+-		if (ret) {
+-			total += ret;
+-			done++;
+-		}
+-	}
+-
+-	ipqess_w32(tx_ring->ess,
+-		 IPQESS_REG_TX_SW_CONS_IDX_Q(tx_ring->idx),
+-		 tx_ring->tail);
+-
+-	if (netif_tx_queue_stopped(tx_ring->nq)) {
+-		netdev_dbg(tx_ring->ess->netdev, "waking up tx queue %d\n",
+-			   tx_ring->idx);
+-		netif_tx_wake_queue(tx_ring->nq);
+-	}
+-
+-	netdev_tx_completed_queue(tx_ring->nq, done, total);
+-
+-	return done;
+-}
+-
+-static int ipqess_tx_napi(struct napi_struct *napi, int budget)
+-{
+-	struct ipqess_tx_ring *tx_ring = container_of(napi, struct ipqess_tx_ring,
+-						    napi_tx);
+-	u32 tx_status;
+-	int work_done = 0;
+-
+-	tx_status = ipqess_r32(tx_ring->ess, IPQESS_REG_TX_ISR);
+-	tx_status &= BIT(tx_ring->idx);
+-
+-	work_done = ipqess_tx_complete(tx_ring, budget);
+-
+-	ipqess_w32(tx_ring->ess, IPQESS_REG_TX_ISR, tx_status);
+-
+-	if (likely(work_done < budget)) {
+-		if (napi_complete_done(napi, work_done))
+-			ipqess_w32(tx_ring->ess,
+-				   IPQESS_REG_TX_INT_MASK_Q(tx_ring->idx), 0x1);
+-	}
+-
+-	return work_done;
+-}
+-
+-static int ipqess_rx_napi(struct napi_struct *napi, int budget)
+-{
+-	struct ipqess_rx_ring *rx_ring = container_of(napi, struct ipqess_rx_ring,
+-						    napi_rx);
+-	struct ipqess *ess = rx_ring->ess;
+-	int remain_budget = budget;
+-	int rx_done;
+-	u32 rx_mask = BIT(rx_ring->idx);
+-	u32 status;
+-
+-poll_again:
+-	ipqess_w32(ess, IPQESS_REG_RX_ISR, rx_mask);
+-	rx_done = ipqess_rx_poll(rx_ring, remain_budget);
+-
+-	if (rx_done == remain_budget)
+-		return budget;
+-
+-	status = ipqess_r32(ess, IPQESS_REG_RX_ISR);
+-	if (status & rx_mask) {
+-		remain_budget -= rx_done;
+-		goto poll_again;
+-	}
+-
+-	if (napi_complete_done(napi, rx_done + budget - remain_budget))
+-		ipqess_w32(ess, IPQESS_REG_RX_INT_MASK_Q(rx_ring->idx), 0x1);
+-
+-	return rx_done + budget - remain_budget;
+-}
+-
+-static irqreturn_t ipqess_interrupt_tx(int irq, void *priv)
+-{
+-	struct ipqess_tx_ring *tx_ring = (struct ipqess_tx_ring *) priv;
+-
+-	if (likely(napi_schedule_prep(&tx_ring->napi_tx))) {
+-		ipqess_w32(tx_ring->ess,
+-			 IPQESS_REG_TX_INT_MASK_Q(tx_ring->idx),
+-			 0x0);
+-		__napi_schedule(&tx_ring->napi_tx);
+-	}
+-
+-	return IRQ_HANDLED;
+-}
+-
+-static irqreturn_t ipqess_interrupt_rx(int irq, void *priv)
+-{
+-	struct ipqess_rx_ring *rx_ring = (struct ipqess_rx_ring *) priv;
+-
+-	if (likely(napi_schedule_prep(&rx_ring->napi_rx))) {
+-		ipqess_w32(rx_ring->ess,
+-			 IPQESS_REG_RX_INT_MASK_Q(rx_ring->idx),
+-			 0x0);
+-		__napi_schedule(&rx_ring->napi_rx);
+-	}
+-
+-	return IRQ_HANDLED;
+-}
+-
+-static void ipqess_irq_enable(struct ipqess *ess)
+-{
+-	int i;
+-
+-	ipqess_w32(ess, IPQESS_REG_RX_ISR, 0xff);
+-	ipqess_w32(ess, IPQESS_REG_TX_ISR, 0xffff);
+-	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+-		ipqess_w32(ess, IPQESS_REG_RX_INT_MASK_Q(ess->rx_ring[i].idx), 1);
+-		ipqess_w32(ess, IPQESS_REG_TX_INT_MASK_Q(ess->tx_ring[i].idx), 1);
+-	}
+-}
+-
+-static void ipqess_irq_disable(struct ipqess *ess)
+-{
+-	int i;
+-
+-	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+-		ipqess_w32(ess, IPQESS_REG_RX_INT_MASK_Q(ess->rx_ring[i].idx), 0);
+-		ipqess_w32(ess, IPQESS_REG_TX_INT_MASK_Q(ess->tx_ring[i].idx), 0);
+-	}
+-}
+-
+-static int __init ipqess_init(struct net_device *netdev)
+-{
+-	struct ipqess *ess = netdev_priv(netdev);
+-	struct device_node *of_node = ess->pdev->dev.of_node;
+-	return phylink_of_phy_connect(ess->phylink, of_node, 0);
+-}
+-
+-static void ipqess_uninit(struct net_device *netdev)
+-{
+-	struct ipqess *ess = netdev_priv(netdev);
+-
+-	phylink_disconnect_phy(ess->phylink);
+-}
+-
+-static int ipqess_open(struct net_device *netdev)
+-{
+-	struct ipqess *ess = netdev_priv(netdev);
+-	int i;
+-
+-	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+-		napi_enable(&ess->tx_ring[i].napi_tx);
+-		napi_enable(&ess->rx_ring[i].napi_rx);
+-	}
+-	ipqess_irq_enable(ess);
+-	phylink_start(ess->phylink);
+-	netif_tx_start_all_queues(netdev);
+-
+-	return 0;
+-}
+-
+-static int ipqess_stop(struct net_device *netdev)
+-{
+-	struct ipqess *ess = netdev_priv(netdev);
+-	int i;
+-
+-	netif_tx_stop_all_queues(netdev);
+-	phylink_stop(ess->phylink);
+-	ipqess_irq_disable(ess);
+-	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+-		napi_disable(&ess->tx_ring[i].napi_tx);
+-		napi_disable(&ess->rx_ring[i].napi_rx);
+-	}
+-
+-	return 0;
+-}
+-
+-static int ipqess_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
+-{
+-	struct ipqess *ess = netdev_priv(netdev);
+-
+-	switch (cmd) {
+-	case SIOCGMIIPHY:
+-	case SIOCGMIIREG:
+-	case SIOCSMIIREG:
+-		return phylink_mii_ioctl(ess->phylink, ifr, cmd);
+-	default:
+-		break;
+-	}
+-
+-	return -EOPNOTSUPP;
+-}
+-
+-
+-static inline u16 ipqess_tx_desc_available(struct ipqess_tx_ring *tx_ring)
+-{
+-	u16 count = 0;
+-
+-	if (tx_ring->tail <= tx_ring->head)
+-		count = IPQESS_TX_RING_SIZE;
+-
+-	count += tx_ring->tail - tx_ring->head - 1;
+-
+-	return count;
+-}
+-
+-static inline int ipqess_cal_txd_req(struct sk_buff *skb)
+-{
+-	int tpds;
+-
+-	/* one TPD for the header, and one for each fragments */
+-	tpds = 1 + skb_shinfo(skb)->nr_frags;
+-	if (skb_is_gso(skb) && skb_is_gso_v6(skb)) {
+-		/* for LSOv2 one extra TPD is needed */
+-		tpds++;
+-	}
+-
+-	return tpds;
+-}
+-
+-static struct ipqess_buf *ipqess_get_tx_buffer(struct ipqess_tx_ring *tx_ring,
+-					       struct ipqess_tx_desc *desc)
+-{
+-	return &tx_ring->buf[desc - tx_ring->hw_desc];
+-}
+-
+-static struct ipqess_tx_desc *ipqess_tx_desc_next(struct ipqess_tx_ring *tx_ring)
+-{
+-	struct ipqess_tx_desc *desc;
+-
+-	desc = &tx_ring->hw_desc[tx_ring->head];
+-	tx_ring->head = IPQESS_NEXT_IDX(tx_ring->head, tx_ring->count);
+-
+-	return desc;
+-}
+-
+-static void ipqess_rollback_tx(struct ipqess *eth,
+-			    struct ipqess_tx_desc *first_desc, int ring_id)
+-{
+-	struct ipqess_tx_ring *tx_ring = &eth->tx_ring[ring_id];
+-	struct ipqess_buf *buf;
+-	struct ipqess_tx_desc *desc = NULL;
+-	u16 start_index, index;
+-
+-	start_index = first_desc - tx_ring->hw_desc;
+-
+-	index = start_index;
+-	while (index != tx_ring->head) {
+-		desc = &tx_ring->hw_desc[index];
+-		buf = &tx_ring->buf[index];
+-		ipqess_tx_unmap_and_free(&eth->pdev->dev, buf);
+-		memset(desc, 0, sizeof(struct ipqess_tx_desc));
+-		if (++index == tx_ring->count)
+-			index = 0;
+-	}
+-	tx_ring->head = start_index;
+-}
+-
+-static bool ipqess_process_dsa_tag_sh(struct sk_buff *skb, u32 *word3)
+-{
+-	struct skb_shared_info *shinfo = skb_shinfo(skb);
+-	struct ipq40xx_dsa_tag_data *tag_data;
+-
+-	if (shinfo->dsa_tag_proto != DSA_TAG_PROTO_IPQ4019)
+-		return false;
+-
+-	tag_data = (struct ipq40xx_dsa_tag_data *)shinfo->dsa_tag_data;
+-
+-	pr_debug("SH tag @ %08x, dp:%02x from_cpu:%u\n",
+-		 (u32)tag_data, tag_data->dp, tag_data->from_cpu);
+-
+-	*word3 |= tag_data->dp << IPQESS_TPD_PORT_BITMAP_SHIFT;
+-	if (tag_data->from_cpu)
+-		*word3 |= BIT(IPQESS_TPD_FROM_CPU_SHIFT);
+-
+-	return true;
+-}
+-
+-static void ipqess_get_dp_info(struct ipqess *ess, struct sk_buff *skb,
+-			       u32 *word3)
+-{
+-	if (netdev_uses_dsa(ess->netdev)) {
+-
+-		if (ipqess_process_dsa_tag_sh(skb, word3))
+-			return;
+-	}
+-
+-	*word3 |= 0x3e << IPQESS_TPD_PORT_BITMAP_SHIFT;
+-}
+-
+-static int ipqess_tx_map_and_fill(struct ipqess_tx_ring *tx_ring, struct sk_buff *skb)
+-{
+-	struct ipqess_buf *buf = NULL;
+-	struct platform_device *pdev = tx_ring->ess->pdev;
+-	struct ipqess_tx_desc *desc = NULL, *first_desc = NULL;
+-	u32 word1 = 0, word3 = 0, lso_word1 = 0, svlan_tag = 0;
+-	u16 len;
+-	int i;
+-
+-	ipqess_get_dp_info(tx_ring->ess, skb, &word3);
+-
+-	if (skb_is_gso(skb)) {
+-		if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV4) {
+-			lso_word1 |= IPQESS_TPD_IPV4_EN;
+-			ip_hdr(skb)->check = 0;
+-			tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
+-				ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
+-		} else if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) {
+-			lso_word1 |= IPQESS_TPD_LSO_V2_EN;
+-			ipv6_hdr(skb)->payload_len = 0;
+-			tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
+-				&ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
+-		}
+-
+-		lso_word1 |= IPQESS_TPD_LSO_EN |
+-			     ((skb_shinfo(skb)->gso_size & IPQESS_TPD_MSS_MASK) << IPQESS_TPD_MSS_SHIFT) |
+-			     (skb_transport_offset(skb) << IPQESS_TPD_HDR_SHIFT);
+-	} else if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
+-			u8 css, cso;
+-			cso = skb_checksum_start_offset(skb);
+-			css = cso + skb->csum_offset;
+-
+-			word1 |= (IPQESS_TPD_CUSTOM_CSUM_EN);
+-			word1 |= (cso >> 1) << IPQESS_TPD_HDR_SHIFT;
+-			word1 |= ((css >> 1) << IPQESS_TPD_CUSTOM_CSUM_SHIFT);
+-	}
+-
+-	if (skb_vlan_tag_present(skb)) {
+-		switch (skb->vlan_proto) {
+-		case htons(ETH_P_8021Q):
+-			word3 |= BIT(IPQESS_TX_INS_CVLAN);
+-			word3 |= skb_vlan_tag_get(skb) << IPQESS_TX_CVLAN_TAG_SHIFT;
+-			break;
+-		case htons(ETH_P_8021AD):
+-			word1 |= BIT(IPQESS_TX_INS_SVLAN);
+-			svlan_tag = skb_vlan_tag_get(skb);
+-			break;
+-		default:
+-			dev_err(&pdev->dev, "no ctag or stag present\n");
+-			goto vlan_tag_error;
+-		}
+-	}
+-
+-	if (eth_type_vlan(skb->protocol))
+-		word1 |= IPQESS_TPD_VLAN_TAGGED;
+-
+-        if (skb->protocol == htons(ETH_P_PPP_SES))
+-                word1 |= IPQESS_TPD_PPPOE_EN;
+-
+-	len = skb_headlen(skb);
+-
+-	first_desc = desc = ipqess_tx_desc_next(tx_ring);
+-	if (lso_word1 & IPQESS_TPD_LSO_V2_EN) {
+-		desc->addr = cpu_to_le16(skb->len);
+-		desc->word1 = word1 | lso_word1;
+-		desc->svlan_tag = svlan_tag;
+-		desc->word3 = word3;
+-		desc = ipqess_tx_desc_next(tx_ring);
+-	}
+-
+-	buf = ipqess_get_tx_buffer(tx_ring, desc);
+-	buf->length = len;
+-	buf->dma = dma_map_single(&pdev->dev,
+-				skb->data, len, DMA_TO_DEVICE);
+-	if (dma_mapping_error(&pdev->dev, buf->dma))
+-		goto dma_error;
+-
+-	desc->addr = cpu_to_le32(buf->dma);
+-	desc->len  = cpu_to_le16(len);
+-
+-	buf->flags |= IPQESS_DESC_SINGLE;
+-	desc->word1 = word1 | lso_word1;
+-	desc->svlan_tag = svlan_tag;
+-	desc->word3 = word3;
+-
+-	for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
+-		skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
+-		len = skb_frag_size(frag);
+-		desc = ipqess_tx_desc_next(tx_ring);
+-		buf = ipqess_get_tx_buffer(tx_ring, desc);
+-		buf->length = len;
+-		buf->flags |= IPQESS_DESC_PAGE;
+-		buf->dma = skb_frag_dma_map(&pdev->dev, frag, 0, len, DMA_TO_DEVICE);
+-		if (dma_mapping_error(&pdev->dev, buf->dma))
+-			goto dma_error;
+-
+-		desc->addr = cpu_to_le32(buf->dma);
+-		desc->len  = cpu_to_le16(len);
+-		desc->svlan_tag = svlan_tag;
+-		desc->word1 = word1 | lso_word1;
+-		desc->word3 = word3;
+-	}
+-	desc->word1 |= 1 << IPQESS_TPD_EOP_SHIFT;
+-	buf->skb = skb;
+-	buf->flags |= IPQESS_DESC_LAST;
+-
+-	return 0;
+-
+-dma_error:
+-	ipqess_rollback_tx(tx_ring->ess, first_desc, tx_ring->ring_id);
+-	dev_err(&pdev->dev, "TX DMA map failed\n");
+-
+-vlan_tag_error:
+-	return -ENOMEM;
+-}
+-
+-static inline void ipqess_kick_tx(struct ipqess_tx_ring *tx_ring)
+-{
+-	/* Ensure that all TPDs has been written completely */
+-	dma_wmb();
+-
+-	/* update software producer index */
+-	ipqess_w32(tx_ring->ess, IPQESS_REG_TPD_IDX_Q(tx_ring->idx),
+-		   tx_ring->head);
+-}
+-
+-static netdev_tx_t ipqess_xmit(struct sk_buff *skb,
+-			     struct net_device *netdev)
+-{
+-	struct ipqess *ess = netdev_priv(netdev);
+-	struct ipqess_tx_ring *tx_ring;
+-	int avail;
+-	int tx_num;
+-	int ret;
+-
+-	tx_ring = &ess->tx_ring[skb_get_queue_mapping(skb)];
+-	tx_num = ipqess_cal_txd_req(skb);
+-	avail = ipqess_tx_desc_available(tx_ring);
+-	if (avail < tx_num) {
+-		netdev_dbg(netdev,
+-			   "stopping tx queue %d, avail=%d req=%d im=%x\n",
+-			   tx_ring->idx, avail, tx_num,
+-			   ipqess_r32(tx_ring->ess,
+-				      IPQESS_REG_TX_INT_MASK_Q(tx_ring->idx)));
+-		netif_tx_stop_queue(tx_ring->nq);
+-		ipqess_w32(tx_ring->ess, IPQESS_REG_TX_INT_MASK_Q(tx_ring->idx), 0x1);
+-		ipqess_kick_tx(tx_ring);
+-		return NETDEV_TX_BUSY;
+-	}
+-
+-	ret = ipqess_tx_map_and_fill(tx_ring, skb);
+-	if (ret) {
+-		dev_kfree_skb_any(skb);
+-		ess->stats.tx_errors++;
+-		goto err_out;
+-	}
+-
+-	ess->stats.tx_packets++;
+-	ess->stats.tx_bytes += skb->len;
+-	netdev_tx_sent_queue(tx_ring->nq, skb->len);
+-
+-	if (!netdev_xmit_more() || netif_xmit_stopped(tx_ring->nq))
+-		ipqess_kick_tx(tx_ring);
+-
+-err_out:
+-	return NETDEV_TX_OK;
+-}
+-
+-static int ipqess_set_mac_address(struct net_device *netdev, void *p)
+-{
+-	int ret = eth_mac_addr(netdev, p);
+-	struct ipqess *ess = netdev_priv(netdev);
+-	const char *macaddr = netdev->dev_addr;
+-
+-	if (ret)
+-		return ret;
+-
+-//	spin_lock_bh(&mac->hw->page_lock);
+-	ipqess_w32(ess, IPQESS_REG_MAC_CTRL1,
+-		 (macaddr[0] << 8) | macaddr[1]);
+-	ipqess_w32(ess, IPQESS_REG_MAC_CTRL0,
+-		 (macaddr[2] << 24) | (macaddr[3] << 16) |
+-		 (macaddr[4] << 8) | macaddr[5]);
+-//	spin_unlock_bh(&mac->hw->page_lock);
+-
+-	return 0;
+-}
+-
+-static void ipqess_tx_timeout(struct net_device *netdev, unsigned int txq_id)
+-{
+-	struct ipqess *ess = netdev_priv(netdev);
+-	struct ipqess_tx_ring *tr = &ess->tx_ring[txq_id];
+-
+-	netdev_warn(netdev, "hardware queue %d is in stuck?\n",
+-		    tr->idx);
+-
+-	/* TODO: dump hardware queue */
+-}
+-
+-static const struct net_device_ops ipqess_axi_netdev_ops = {
+-	.ndo_init		= ipqess_init,
+-	.ndo_uninit		= ipqess_uninit,
+-	.ndo_open		= ipqess_open,
+-	.ndo_stop		= ipqess_stop,
+-	.ndo_do_ioctl		= ipqess_do_ioctl,
+-	.ndo_start_xmit		= ipqess_xmit,
+-	.ndo_get_stats		= ipqess_get_stats,
+-	.ndo_set_mac_address	= ipqess_set_mac_address,
+-	.ndo_tx_timeout		= ipqess_tx_timeout,
+-};
+-
+-static void ipqess_hw_stop(struct ipqess *ess)
+-{
+-	int i;
+-
+-	/* disable all RX queue IRQs */
+-	for (i = 0; i < IPQESS_MAX_RX_QUEUE; i++)
+-		ipqess_w32(ess, IPQESS_REG_RX_INT_MASK_Q(i), 0);
+-
+-	/* disable all TX queue IRQs */
+-	for (i = 0; i < IPQESS_MAX_TX_QUEUE; i++)
+-		ipqess_w32(ess, IPQESS_REG_TX_INT_MASK_Q(i), 0);
+-
+-	/* disable all other IRQs */
+-	ipqess_w32(ess, IPQESS_REG_MISC_IMR, 0);
+-	ipqess_w32(ess, IPQESS_REG_WOL_IMR, 0);
+-
+-	/* clear the IRQ status registers */
+-	ipqess_w32(ess, IPQESS_REG_RX_ISR, 0xff);
+-	ipqess_w32(ess, IPQESS_REG_TX_ISR, 0xffff);
+-	ipqess_w32(ess, IPQESS_REG_MISC_ISR, 0x1fff);
+-	ipqess_w32(ess, IPQESS_REG_WOL_ISR, 0x1);
+-	ipqess_w32(ess, IPQESS_REG_WOL_CTRL, 0);
+-
+-	/* disable RX and TX queues */
+-	ipqess_m32(ess, IPQESS_RXQ_CTRL_EN_MASK, 0, IPQESS_REG_RXQ_CTRL);
+-	ipqess_m32(ess, IPQESS_TXQ_CTRL_TXQ_EN, 0, IPQESS_REG_TXQ_CTRL);
+-}
+-
+-static int ipqess_hw_init(struct ipqess *ess)
+-{
+-	u32 tmp;
+-	int i, err;
+-
+-	ipqess_hw_stop(ess);
+-
+-	ipqess_m32(ess, BIT(IPQESS_INTR_SW_IDX_W_TYP_SHIFT),
+-		 IPQESS_INTR_SW_IDX_W_TYPE << IPQESS_INTR_SW_IDX_W_TYP_SHIFT,
+-		 IPQESS_REG_INTR_CTRL);
+-
+-	/* enable IRQ delay slot */
+-	ipqess_w32(ess, IPQESS_REG_IRQ_MODRT_TIMER_INIT,
+-		 (IPQESS_TX_IMT << IPQESS_IRQ_MODRT_TX_TIMER_SHIFT) |
+-		 (IPQESS_RX_IMT << IPQESS_IRQ_MODRT_RX_TIMER_SHIFT));
+-
+-	/* Set Customer and Service VLAN TPIDs */
+-	ipqess_w32(ess, IPQESS_REG_VLAN_CFG,
+-		   (ETH_P_8021Q << IPQESS_VLAN_CFG_CVLAN_TPID_SHIFT) |
+-		   (ETH_P_8021AD << IPQESS_VLAN_CFG_SVLAN_TPID_SHIFT));
+-
+-	/* Configure the TX Queue bursting */
+-	ipqess_w32(ess, IPQESS_REG_TXQ_CTRL,
+-		 (IPQESS_TPD_BURST << IPQESS_TXQ_NUM_TPD_BURST_SHIFT) |
+-		 (IPQESS_TXF_BURST << IPQESS_TXQ_TXF_BURST_NUM_SHIFT) |
+-		 IPQESS_TXQ_CTRL_TPD_BURST_EN);
+-
+-	/* Set RSS type */
+-	ipqess_w32(ess, IPQESS_REG_RSS_TYPE,
+-		 IPQESS_RSS_TYPE_IPV4TCP | IPQESS_RSS_TYPE_IPV6_TCP |
+-		 IPQESS_RSS_TYPE_IPV4_UDP | IPQESS_RSS_TYPE_IPV6UDP |
+-		 IPQESS_RSS_TYPE_IPV4 | IPQESS_RSS_TYPE_IPV6);
+-
+-	/* Set RFD ring burst and threshold */
+-	ipqess_w32(ess, IPQESS_REG_RX_DESC1,
+-		(IPQESS_RFD_BURST << IPQESS_RXQ_RFD_BURST_NUM_SHIFT) |
+-		(IPQESS_RFD_THR << IPQESS_RXQ_RFD_PF_THRESH_SHIFT) |
+-		(IPQESS_RFD_LTHR << IPQESS_RXQ_RFD_LOW_THRESH_SHIFT));
+-
+-	/* Set Rx FIFO
+-	 * - threshold to start to DMA data to host
+-	 */
+-	ipqess_w32(ess, IPQESS_REG_RXQ_CTRL,
+-		 IPQESS_FIFO_THRESH_128_BYTE | IPQESS_RXQ_CTRL_RMV_VLAN);
+-
+-	err = ipqess_rx_ring_alloc(ess);
+-	if (err)
+-		return err;
+-
+-	err = ipqess_tx_ring_alloc(ess);
+-	if (err)
+-		return err;
+-
+-	/* Load all of ring base addresses above into the dma engine */
+-	ipqess_m32(ess, 0, BIT(IPQESS_LOAD_PTR_SHIFT),
+-		 IPQESS_REG_TX_SRAM_PART);
+-
+-	/* Disable TX FIFO low watermark and high watermark */
+-	ipqess_w32(ess, IPQESS_REG_TXF_WATER_MARK, 0);
+-
+-	/* Configure RSS indirection table.
+-	 * 128 hash will be configured in the following
+-	 * pattern: hash{0,1,2,3} = {Q0,Q2,Q4,Q6} respectively
+-	 * and so on
+-	 */
+-	for (i = 0; i < IPQESS_NUM_IDT; i++)
+-		ipqess_w32(ess, IPQESS_REG_RSS_IDT(i), IPQESS_RSS_IDT_VALUE);
+-
+-	/* Configure load balance mapping table.
+-	 * 4 table entry will be configured according to the
+-	 * following pattern: load_balance{0,1,2,3} = {Q0,Q1,Q3,Q4}
+-	 * respectively.
+-	 */
+-	ipqess_w32(ess, IPQESS_REG_LB_RING, IPQESS_LB_REG_VALUE);
+-
+-	/* Configure Virtual queue for Tx rings */
+-	ipqess_w32(ess, IPQESS_REG_VQ_CTRL0, IPQESS_VQ_REG_VALUE);
+-	ipqess_w32(ess, IPQESS_REG_VQ_CTRL1, IPQESS_VQ_REG_VALUE);
+-
+-	/* Configure Max AXI Burst write size to 128 bytes*/
+-	ipqess_w32(ess, IPQESS_REG_AXIW_CTRL_MAXWRSIZE,
+-		 IPQESS_AXIW_MAXWRSIZE_VALUE);
+-
+-	/* Enable TX queues */
+-	ipqess_m32(ess, 0, IPQESS_TXQ_CTRL_TXQ_EN, IPQESS_REG_TXQ_CTRL);
+-
+-	/* Enable RX queues */
+-	tmp = 0;
+-	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++)
+-		tmp |= IPQESS_RXQ_CTRL_EN(ess->rx_ring[i].idx);
+-
+-	ipqess_m32(ess, IPQESS_RXQ_CTRL_EN_MASK, tmp, IPQESS_REG_RXQ_CTRL);
+-
+-	return 0;
+-}
+-
+-static void ipqess_validate(struct phylink_config *config,
+-			    unsigned long *supported,
+-			    struct phylink_link_state *state)
+-{
+-	struct ipqess *ess = container_of(config, struct ipqess, phylink_config);
+-	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
+-
+-	if (state->interface != PHY_INTERFACE_MODE_INTERNAL) {
+-		dev_err(&ess->pdev->dev, "unsupported interface mode: %d\n",
+-			state->interface);
+-		linkmode_zero(supported);
+-		return;
+-	}
+-
+-	phylink_set_port_modes(mask);
+-	phylink_set(mask, 1000baseT_Full);
+-	phylink_set(mask, Pause);
+-	phylink_set(mask, Asym_Pause);
+-
+-	linkmode_and(supported, supported, mask);
+-	linkmode_and(state->advertising, state->advertising, mask);
+-}
+-
+-static void ipqess_mac_config(struct phylink_config *config, unsigned int mode,
+-			      const struct phylink_link_state *state)
+-{
+-	/* TODO */
+-}
+-
+-static void ipqess_mac_link_down(struct phylink_config *config,
+-				 unsigned int mode,
+-				 phy_interface_t interface)
+-{
+-	/* TODO */
+-}
+-
+-static void ipqess_mac_link_up(struct phylink_config *config,
+-			       struct phy_device *phy, unsigned int mode,
+-			       phy_interface_t interface,
+-			       int speed, int duplex,
+-			       bool tx_pause, bool rx_pause)
+-{
+-	/* TODO */
+-}
+-
+-static struct phylink_mac_ops ipqess_phylink_mac_ops = {
+-	.validate		= ipqess_validate,
+-	.mac_config		= ipqess_mac_config,
+-	.mac_link_up		= ipqess_mac_link_up,
+-	.mac_link_down		= ipqess_mac_link_down,
+-};
+-
+-static void ipqess_cleanup(struct ipqess *ess)
+-{
+-	ipqess_hw_stop(ess);
+-	unregister_netdev(ess->netdev);
+-
+-	ipqess_tx_ring_free(ess);
+-	ipqess_rx_ring_free(ess);
+-
+-	if (!IS_ERR_OR_NULL(ess->phylink))
+-		phylink_destroy(ess->phylink);
+-}
+-
+-static void ess_reset(struct ipqess *ess)
+-{
+-	reset_control_assert(ess->ess_rst);
+-
+-	mdelay(10);
+-
+-	reset_control_deassert(ess->ess_rst);
+-
+-	/* Waiting for all inner tables to be flushed and reinitialized.
+-	 * This takes between 5 and 10ms.
+-	 */
+-	mdelay(10);
+-}
+-
+-static int ipqess_axi_probe(struct platform_device *pdev)
+-{
+-	struct device_node *np = pdev->dev.of_node;
+-	struct ipqess *ess;
+-	struct net_device *netdev;
+-	struct resource *res;
+-	int i, err = 0;
+-
+-	netdev = devm_alloc_etherdev_mqs(&pdev->dev, sizeof(struct ipqess),
+-					 IPQESS_NETDEV_QUEUES,
+-					 IPQESS_NETDEV_QUEUES);
+-	if (!netdev)
+-		return -ENOMEM;
+-
+-	ess = netdev_priv(netdev);
+-	ess->netdev = netdev;
+-	ess->pdev = pdev;
+-	spin_lock_init(&ess->stats_lock);
+-	SET_NETDEV_DEV(netdev, &pdev->dev);
+-	platform_set_drvdata(pdev, netdev);
+-
+-	err = of_get_mac_address(np, netdev->dev_addr);
+-	if (err == -EPROBE_DEFER)
+-		return -EPROBE_DEFER;
+-
+-	if (err) {
+-
+-		random_ether_addr(netdev->dev_addr);
+-		dev_info(&ess->pdev->dev, "generated random MAC address %pM\n",
+-			netdev->dev_addr);
+-		netdev->addr_assign_type = NET_ADDR_RANDOM;
+-	}
+-
+-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+-	ess->hw_addr = devm_ioremap_resource(&pdev->dev, res);
+-	if (IS_ERR(ess->hw_addr)) {
+-		err = PTR_ERR(ess->hw_addr);
+-		goto err_out;
+-	}
+-
+-	ess->ess_clk = of_clk_get_by_name(np, "ess_clk");
+-	if (IS_ERR(ess->ess_clk)) {
+-		dev_err(&pdev->dev, "Failed to get ess_clk\n");
+-		return PTR_ERR(ess->ess_clk);
+-	}
+-
+-	ess->ess_rst = devm_reset_control_get(&pdev->dev, "ess_rst");
+-	if (IS_ERR(ess->ess_rst)) {
+-		dev_err(&pdev->dev, "Failed to get ess_rst control!\n");
+-		return PTR_ERR(ess->ess_rst);
+-	}
+-
+-	clk_prepare_enable(ess->ess_clk);
+-
+-	ess_reset(ess);
+-
+-	ess->phylink_config.dev = &netdev->dev;
+-	ess->phylink_config.type = PHYLINK_NETDEV;
+-	ess->phylink_config.pcs_poll = true;
+-
+-	ess->phylink = phylink_create(&ess->phylink_config,
+-				      of_fwnode_handle(np),
+-				      PHY_INTERFACE_MODE_INTERNAL,
+-				      &ipqess_phylink_mac_ops);
+-	if (IS_ERR(ess->phylink)) {
+-		err = PTR_ERR(ess->phylink);
+-		goto err_out;
+-	}
+-
+-	for (i = 0; i < IPQESS_MAX_TX_QUEUE; i++) {
+-		ess->tx_irq[i] = platform_get_irq(pdev, i);
+-		scnprintf(ess->tx_irq_names[i], sizeof(ess->tx_irq_names[i]),
+-			 "%s:txq%d", pdev->name, i);
+-	}
+-
+-	for (i = 0; i < IPQESS_MAX_RX_QUEUE; i++) {
+-		ess->rx_irq[i] = platform_get_irq(pdev, i + IPQESS_MAX_TX_QUEUE);
+-		scnprintf(ess->rx_irq_names[i], sizeof(ess->rx_irq_names[i]),
+-			 "%s:rxq%d", pdev->name, i);
+-	}
+-
+-#undef NETIF_F_TSO6
+-#define NETIF_F_TSO6 0
+-
+-	netdev->netdev_ops = &ipqess_axi_netdev_ops;
+-	netdev->features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
+-			   NETIF_F_HW_VLAN_CTAG_RX |
+-			   NETIF_F_HW_VLAN_CTAG_TX |
+-			   NETIF_F_TSO | NETIF_F_TSO6 |
+-			   NETIF_F_GRO | NETIF_F_SG;
+-	/* feature change is not supported yet */
+-	netdev->hw_features = 0;
+-	netdev->vlan_features = NETIF_F_HW_CSUM | NETIF_F_SG | NETIF_F_RXCSUM |
+-				NETIF_F_TSO | NETIF_F_TSO6 |
+-				NETIF_F_GRO;
+-	netdev->watchdog_timeo = 5 * HZ;
+-	netdev->base_addr = (u32) ess->hw_addr;
+-	netdev->max_mtu = 9000;
+-	netdev->gso_max_segs = IPQESS_TX_RING_SIZE / 2;
+-
+-	ipqess_set_ethtool_ops(netdev);
+-
+-	err = register_netdev(netdev);
+-	if (err)
+-		goto err_out;
+-
+-	err = ipqess_hw_init(ess);
+-	if (err)
+-		goto err_out;
+-
+-	dev_set_threaded(netdev, true);
+-
+-	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+-		int qid;
+-
+-		netif_tx_napi_add(netdev, &ess->tx_ring[i].napi_tx,
+-				  ipqess_tx_napi, 64);
+-		netif_napi_add(netdev,
+-			       &ess->rx_ring[i].napi_rx,
+-			       ipqess_rx_napi, 64);
+-
+-		qid = ess->tx_ring[i].idx;
+-		err = devm_request_irq(&ess->netdev->dev, ess->tx_irq[qid],
+-			ipqess_interrupt_tx, 0, ess->tx_irq_names[qid],
+-			&ess->tx_ring[i]);
+-		if (err)
+-			goto err_out;
+-
+-		qid = ess->rx_ring[i].idx;
+-		err = devm_request_irq(&ess->netdev->dev, ess->rx_irq[qid],
+-			ipqess_interrupt_rx, 0, ess->rx_irq_names[qid],
+-			&ess->rx_ring[i]);
+-		if (err)
+-			goto err_out;
+-	}
+-
+-	return 0;
+-
+-err_out:
+-	ipqess_cleanup(ess);
+-	return err;
+-}
+-
+-static int ipqess_axi_remove(struct platform_device *pdev)
+-{
+-	const struct net_device *netdev = platform_get_drvdata(pdev);
+-	struct ipqess *ess = netdev_priv(netdev);
+-
+-	ipqess_cleanup(ess);
+-
+-	return 0;
+-}
+-
+-static const struct of_device_id ipqess_of_mtable[] = {
+-	{.compatible = "qcom,ipq4019-ess-edma" },
+-	{}
+-};
+-MODULE_DEVICE_TABLE(of, ipqess_of_mtable);
+-
+-static struct platform_driver ipqess_axi_driver = {
+-	.driver = {
+-		.name    = "ipqess-edma",
+-		.of_match_table = ipqess_of_mtable,
+-	},
+-	.probe    = ipqess_axi_probe,
+-	.remove   = ipqess_axi_remove,
+-};
+-
+-module_platform_driver(ipqess_axi_driver);
+-
+-MODULE_AUTHOR("Qualcomm Atheros Inc");
+-MODULE_AUTHOR("John Crispin <john@phrozen.org>");
+-MODULE_AUTHOR("Christian Lamparter <chunkeey@gmail.com>");
+-MODULE_AUTHOR("Gabor Juhos <j4g8y7@gmail.com>");
+-MODULE_LICENSE("GPL");
+diff --git a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess.h b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess.h
+deleted file mode 100644
+index ca4cb7b2d4..0000000000
+--- a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess.h
++++ /dev/null
+@@ -1,530 +0,0 @@
+-// SPDX-License-Identifier: (GPL-2.0 OR ISC)
+-/* Copyright (c) 2014 - 2016, The Linux Foundation. All rights reserved.
+- * Copyright (c) 2017 - 2018, John Crispin <john@phrozen.org>
+- * Copyright (c) 2018 - 2019, Christian Lamparter <chunkeey@gmail.com>
+- * Copyright (c) 2020 - 2021, Gabor Juhos <j4g8y7@gmail.com>
+- *
+- * Permission to use, copy, modify, and/or distribute this software for
+- * any purpose with or without fee is hereby granted, provided that the
+- * above copyright notice and this permission notice appear in all copies.
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
+- * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef _IPQESS_H_
+-#define _IPQESS_H_
+-
+-#define IPQESS_NETDEV_QUEUES	4
+-
+-#define IPQESS_TPD_EOP_SHIFT 31
+-
+-#define IPQESS_PORT_ID_SHIFT 12
+-#define IPQESS_PORT_ID_MASK 0x7
+-
+-/* tpd word 3 bit 18-28 */
+-#define IPQESS_TPD_PORT_BITMAP_SHIFT 18
+-
+-#define IPQESS_TPD_FROM_CPU_SHIFT 25
+-
+-#define IPQESS_RX_RING_SIZE 128
+-#define IPQESS_RX_HEAD_BUFF_SIZE 1540
+-#define IPQESS_TX_RING_SIZE 128
+-#define IPQESS_MAX_RX_QUEUE 8
+-#define IPQESS_MAX_TX_QUEUE 16
+-
+-
+-/* Configurations */
+-#define IPQESS_INTR_CLEAR_TYPE 0
+-#define IPQESS_INTR_SW_IDX_W_TYPE 0
+-#define IPQESS_FIFO_THRESH_TYPE 0
+-#define IPQESS_RSS_TYPE 0
+-#define IPQESS_RX_IMT 0x0020
+-#define IPQESS_TX_IMT 0x0050
+-#define IPQESS_TPD_BURST 5
+-#define IPQESS_TXF_BURST 0x100
+-#define IPQESS_RFD_BURST 8
+-#define IPQESS_RFD_THR 16
+-#define IPQESS_RFD_LTHR 0
+-
+-/* Flags used in transmit direction */
+-#define IPQESS_DESC_LAST 0x1
+-#define IPQESS_DESC_SINGLE 0x2
+-#define IPQESS_DESC_PAGE 0x4
+-
+-struct ipqesstool_statistics {
+-	u32 tx_q0_pkt;
+-	u32 tx_q1_pkt;
+-	u32 tx_q2_pkt;
+-	u32 tx_q3_pkt;
+-	u32 tx_q4_pkt;
+-	u32 tx_q5_pkt;
+-	u32 tx_q6_pkt;
+-	u32 tx_q7_pkt;
+-	u32 tx_q8_pkt;
+-	u32 tx_q9_pkt;
+-	u32 tx_q10_pkt;
+-	u32 tx_q11_pkt;
+-	u32 tx_q12_pkt;
+-	u32 tx_q13_pkt;
+-	u32 tx_q14_pkt;
+-	u32 tx_q15_pkt;
+-	u32 tx_q0_byte;
+-	u32 tx_q1_byte;
+-	u32 tx_q2_byte;
+-	u32 tx_q3_byte;
+-	u32 tx_q4_byte;
+-	u32 tx_q5_byte;
+-	u32 tx_q6_byte;
+-	u32 tx_q7_byte;
+-	u32 tx_q8_byte;
+-	u32 tx_q9_byte;
+-	u32 tx_q10_byte;
+-	u32 tx_q11_byte;
+-	u32 tx_q12_byte;
+-	u32 tx_q13_byte;
+-	u32 tx_q14_byte;
+-	u32 tx_q15_byte;
+-	u32 rx_q0_pkt;
+-	u32 rx_q1_pkt;
+-	u32 rx_q2_pkt;
+-	u32 rx_q3_pkt;
+-	u32 rx_q4_pkt;
+-	u32 rx_q5_pkt;
+-	u32 rx_q6_pkt;
+-	u32 rx_q7_pkt;
+-	u32 rx_q0_byte;
+-	u32 rx_q1_byte;
+-	u32 rx_q2_byte;
+-	u32 rx_q3_byte;
+-	u32 rx_q4_byte;
+-	u32 rx_q5_byte;
+-	u32 rx_q6_byte;
+-	u32 rx_q7_byte;
+-	u32 tx_desc_error;
+-};
+-
+-struct ipqess_tx_desc {
+-	__le16  len;
+-	__le16  svlan_tag;
+-	__le32  word1;
+-	__le32  addr;
+-	__le32  word3;
+-} __aligned(16) __packed;
+-
+-struct ipqess_rx_desc {
+-	u16 rrd0;
+-	u16 rrd1;
+-	u16 rrd2;
+-	u16 rrd3;
+-	u16 rrd4;
+-	u16 rrd5;
+-	u16 rrd6;
+-	u16 rrd7;
+-} __aligned(16) __packed;
+-
+-struct ipqess_buf {
+-	struct sk_buff *skb;
+-	dma_addr_t dma;
+-	u32 flags;
+-	u16 length;
+-};
+-
+-struct ipqess_tx_ring {
+-	struct napi_struct napi_tx;
+-	u32 idx;
+-	int ring_id;
+-	struct ipqess *ess;
+-	struct netdev_queue *nq;
+-	struct ipqess_tx_desc *hw_desc;
+-	struct ipqess_buf *buf;
+-	dma_addr_t dma;
+-	u16 count;
+-	u16 head;
+-	u16 tail;
+-};
+-
+-struct ipqess_rx_ring {
+-	struct napi_struct napi_rx;
+-	u32 idx;
+-	int ring_id;
+-	struct ipqess *ess;
+-	struct device *ppdev;
+-	struct ipqess_rx_desc **hw_desc;
+-	struct ipqess_buf *buf;
+-	dma_addr_t dma;
+-	u16 head;
+-	u16 tail;
+-	atomic_t refill_count;
+-};
+-
+-struct ipqess_rx_ring_refill {
+-	struct ipqess_rx_ring *rx_ring;
+-	struct work_struct refill_work;
+-};
+-
+-#define IPQESS_IRQ_NAME_LEN	32
+-
+-struct ipqess {
+-	struct net_device *netdev;
+-	void __iomem *hw_addr;
+-	struct clk *ess_clk;
+-	struct reset_control *ess_rst;
+-
+-	struct ipqess_rx_ring rx_ring[IPQESS_NETDEV_QUEUES];
+-
+-	struct platform_device *pdev;
+-	struct phylink *phylink;
+-	struct phylink_config phylink_config;
+-	struct ipqess_tx_ring tx_ring[IPQESS_NETDEV_QUEUES];
+-
+-	struct ipqesstool_statistics ipqessstats;
+-	spinlock_t stats_lock;
+-	struct net_device_stats stats;
+-
+-	struct ipqess_rx_ring_refill rx_refill[IPQESS_NETDEV_QUEUES];
+-	u32 tx_irq[IPQESS_MAX_TX_QUEUE];
+-	char tx_irq_names[IPQESS_MAX_TX_QUEUE][IPQESS_IRQ_NAME_LEN];
+-	u32 rx_irq[IPQESS_MAX_RX_QUEUE];
+-	char rx_irq_names[IPQESS_MAX_TX_QUEUE][IPQESS_IRQ_NAME_LEN];
+-};
+-
+-static inline void build_test(void)
+-{
+-	struct ipqess *ess;
+-	BUILD_BUG_ON(ARRAY_SIZE(ess->rx_ring) != ARRAY_SIZE(ess->rx_refill));
+-}
+-
+-void ipqess_set_ethtool_ops(struct net_device *netdev);
+-void ipqess_update_hw_stats(struct ipqess *ess);
+-
+-/* register definition */
+-#define IPQESS_REG_MAS_CTRL 0x0
+-#define IPQESS_REG_TIMEOUT_CTRL 0x004
+-#define IPQESS_REG_DBG0 0x008
+-#define IPQESS_REG_DBG1 0x00C
+-#define IPQESS_REG_SW_CTRL0 0x100
+-#define IPQESS_REG_SW_CTRL1 0x104
+-
+-/* Interrupt Status Register */
+-#define IPQESS_REG_RX_ISR 0x200
+-#define IPQESS_REG_TX_ISR 0x208
+-#define IPQESS_REG_MISC_ISR 0x210
+-#define IPQESS_REG_WOL_ISR 0x218
+-
+-#define IPQESS_MISC_ISR_RX_URG_Q(x) (1 << x)
+-
+-#define IPQESS_MISC_ISR_AXIR_TIMEOUT 0x00000100
+-#define IPQESS_MISC_ISR_AXIR_ERR 0x00000200
+-#define IPQESS_MISC_ISR_TXF_DEAD 0x00000400
+-#define IPQESS_MISC_ISR_AXIW_ERR 0x00000800
+-#define IPQESS_MISC_ISR_AXIW_TIMEOUT 0x00001000
+-
+-#define IPQESS_WOL_ISR 0x00000001
+-
+-/* Interrupt Mask Register */
+-#define IPQESS_REG_MISC_IMR 0x214
+-#define IPQESS_REG_WOL_IMR 0x218
+-
+-#define IPQESS_RX_IMR_NORMAL_MASK 0x1
+-#define IPQESS_TX_IMR_NORMAL_MASK 0x1
+-#define IPQESS_MISC_IMR_NORMAL_MASK 0x80001FFF
+-#define IPQESS_WOL_IMR_NORMAL_MASK 0x1
+-
+-/* Edma receive consumer index */
+-#define IPQESS_REG_RX_SW_CONS_IDX_Q(x) (0x220 + ((x) << 2)) /* x is the queue id */
+-
+-/* Edma transmit consumer index */
+-#define IPQESS_REG_TX_SW_CONS_IDX_Q(x) (0x240 + ((x) << 2)) /* x is the queue id */
+-
+-/* IRQ Moderator Initial Timer Register */
+-#define IPQESS_REG_IRQ_MODRT_TIMER_INIT 0x280
+-#define IPQESS_IRQ_MODRT_TIMER_MASK 0xFFFF
+-#define IPQESS_IRQ_MODRT_RX_TIMER_SHIFT 0
+-#define IPQESS_IRQ_MODRT_TX_TIMER_SHIFT 16
+-
+-/* Interrupt Control Register */
+-#define IPQESS_REG_INTR_CTRL 0x284
+-#define IPQESS_INTR_CLR_TYP_SHIFT 0
+-#define IPQESS_INTR_SW_IDX_W_TYP_SHIFT 1
+-#define IPQESS_INTR_CLEAR_TYPE_W1 0
+-#define IPQESS_INTR_CLEAR_TYPE_R 1
+-
+-/* RX Interrupt Mask Register */
+-#define IPQESS_REG_RX_INT_MASK_Q(x) (0x300 + ((x) << 2)) /* x = queue id */
+-
+-/* TX Interrupt mask register */
+-#define IPQESS_REG_TX_INT_MASK_Q(x) (0x340 + ((x) << 2)) /* x = queue id */
+-
+-/* Load Ptr Register
+- * Software sets this bit after the initialization of the head and tail
+- */
+-#define IPQESS_REG_TX_SRAM_PART 0x400
+-#define IPQESS_LOAD_PTR_SHIFT 16
+-
+-/* TXQ Control Register */
+-#define IPQESS_REG_TXQ_CTRL 0x404
+-#define IPQESS_TXQ_CTRL_IP_OPTION_EN 0x10
+-#define IPQESS_TXQ_CTRL_TXQ_EN 0x20
+-#define IPQESS_TXQ_CTRL_ENH_MODE 0x40
+-#define IPQESS_TXQ_CTRL_LS_8023_EN 0x80
+-#define IPQESS_TXQ_CTRL_TPD_BURST_EN 0x100
+-#define IPQESS_TXQ_CTRL_LSO_BREAK_EN 0x200
+-#define IPQESS_TXQ_NUM_TPD_BURST_MASK 0xF
+-#define IPQESS_TXQ_TXF_BURST_NUM_MASK 0xFFFF
+-#define IPQESS_TXQ_NUM_TPD_BURST_SHIFT 0
+-#define IPQESS_TXQ_TXF_BURST_NUM_SHIFT 16
+-
+-#define	IPQESS_REG_TXF_WATER_MARK 0x408 /* In 8-bytes */
+-#define IPQESS_TXF_WATER_MARK_MASK 0x0FFF
+-#define IPQESS_TXF_LOW_WATER_MARK_SHIFT 0
+-#define IPQESS_TXF_HIGH_WATER_MARK_SHIFT 16
+-#define IPQESS_TXQ_CTRL_BURST_MODE_EN 0x80000000
+-
+-/* WRR Control Register */
+-#define IPQESS_REG_WRR_CTRL_Q0_Q3 0x40c
+-#define IPQESS_REG_WRR_CTRL_Q4_Q7 0x410
+-#define IPQESS_REG_WRR_CTRL_Q8_Q11 0x414
+-#define IPQESS_REG_WRR_CTRL_Q12_Q15 0x418
+-
+-/* Weight round robin(WRR), it takes queue as input, and computes
+- * starting bits where we need to write the weight for a particular
+- * queue
+- */
+-#define IPQESS_WRR_SHIFT(x) (((x) * 5) % 20)
+-
+-/* Tx Descriptor Control Register */
+-#define IPQESS_REG_TPD_RING_SIZE 0x41C
+-#define IPQESS_TPD_RING_SIZE_SHIFT 0
+-#define IPQESS_TPD_RING_SIZE_MASK 0xFFFF
+-
+-/* Transmit descriptor base address */
+-#define IPQESS_REG_TPD_BASE_ADDR_Q(x) (0x420 + ((x) << 2)) /* x = queue id */
+-
+-/* TPD Index Register */
+-#define IPQESS_REG_TPD_IDX_Q(x) (0x460 + ((x) << 2)) /* x = queue id */
+-
+-#define IPQESS_TPD_PROD_IDX_BITS 0x0000FFFF
+-#define IPQESS_TPD_CONS_IDX_BITS 0xFFFF0000
+-#define IPQESS_TPD_PROD_IDX_MASK 0xFFFF
+-#define IPQESS_TPD_CONS_IDX_MASK 0xFFFF
+-#define IPQESS_TPD_PROD_IDX_SHIFT 0
+-#define IPQESS_TPD_CONS_IDX_SHIFT 16
+-
+-/* TX Virtual Queue Mapping Control Register */
+-#define IPQESS_REG_VQ_CTRL0 0x4A0
+-#define IPQESS_REG_VQ_CTRL1 0x4A4
+-
+-/* Virtual QID shift, it takes queue as input, and computes
+- * Virtual QID position in virtual qid control register
+- */
+-#define IPQESS_VQ_ID_SHIFT(i) (((i) * 3) % 24)
+-
+-/* Virtual Queue Default Value */
+-#define IPQESS_VQ_REG_VALUE 0x240240
+-
+-/* Tx side Port Interface Control Register */
+-#define IPQESS_REG_PORT_CTRL 0x4A8
+-#define IPQESS_PAD_EN_SHIFT 15
+-
+-/* Tx side VLAN Configuration Register */
+-#define IPQESS_REG_VLAN_CFG 0x4AC
+-
+-#define IPQESS_VLAN_CFG_SVLAN_TPID_SHIFT 0
+-#define IPQESS_VLAN_CFG_SVLAN_TPID_MASK 0xffff
+-#define IPQESS_VLAN_CFG_CVLAN_TPID_SHIFT 16
+-#define IPQESS_VLAN_CFG_CVLAN_TPID_MASK 0xffff
+-
+-#define IPQESS_TX_CVLAN 16
+-#define IPQESS_TX_INS_CVLAN 17
+-#define IPQESS_TX_CVLAN_TAG_SHIFT 0
+-
+-#define IPQESS_TX_SVLAN 14
+-#define IPQESS_TX_INS_SVLAN 15
+-#define IPQESS_TX_SVLAN_TAG_SHIFT 16
+-
+-/* Tx Queue Packet Statistic Register */
+-#define IPQESS_REG_TX_STAT_PKT_Q(x) (0x700 + ((x) << 3)) /* x = queue id */
+-
+-#define IPQESS_TX_STAT_PKT_MASK 0xFFFFFF
+-
+-/* Tx Queue Byte Statistic Register */
+-#define IPQESS_REG_TX_STAT_BYTE_Q(x) (0x704 + ((x) << 3)) /* x = queue id */
+-
+-/* Load Balance Based Ring Offset Register */
+-#define IPQESS_REG_LB_RING 0x800
+-#define IPQESS_LB_RING_ENTRY_MASK 0xff
+-#define IPQESS_LB_RING_ID_MASK 0x7
+-#define IPQESS_LB_RING_PROFILE_ID_MASK 0x3
+-#define IPQESS_LB_RING_ENTRY_BIT_OFFSET 8
+-#define IPQESS_LB_RING_ID_OFFSET 0
+-#define IPQESS_LB_RING_PROFILE_ID_OFFSET 3
+-#define IPQESS_LB_REG_VALUE 0x6040200
+-
+-/* Load Balance Priority Mapping Register */
+-#define IPQESS_REG_LB_PRI_START 0x804
+-#define IPQESS_REG_LB_PRI_END 0x810
+-#define IPQESS_LB_PRI_REG_INC 4
+-#define IPQESS_LB_PRI_ENTRY_BIT_OFFSET 4
+-#define IPQESS_LB_PRI_ENTRY_MASK 0xf
+-
+-/* RSS Priority Mapping Register */
+-#define IPQESS_REG_RSS_PRI 0x820
+-#define IPQESS_RSS_PRI_ENTRY_MASK 0xf
+-#define IPQESS_RSS_RING_ID_MASK 0x7
+-#define IPQESS_RSS_PRI_ENTRY_BIT_OFFSET 4
+-
+-/* RSS Indirection Register */
+-#define IPQESS_REG_RSS_IDT(x) (0x840 + ((x) << 2)) /* x = No. of indirection table */
+-#define IPQESS_NUM_IDT 16
+-#define IPQESS_RSS_IDT_VALUE 0x64206420
+-
+-/* Default RSS Ring Register */
+-#define IPQESS_REG_DEF_RSS 0x890
+-#define IPQESS_DEF_RSS_MASK 0x7
+-
+-/* RSS Hash Function Type Register */
+-#define IPQESS_REG_RSS_TYPE 0x894
+-#define IPQESS_RSS_TYPE_NONE 0x01
+-#define IPQESS_RSS_TYPE_IPV4TCP 0x02
+-#define IPQESS_RSS_TYPE_IPV6_TCP 0x04
+-#define IPQESS_RSS_TYPE_IPV4_UDP 0x08
+-#define IPQESS_RSS_TYPE_IPV6UDP 0x10
+-#define IPQESS_RSS_TYPE_IPV4 0x20
+-#define IPQESS_RSS_TYPE_IPV6 0x40
+-#define IPQESS_RSS_HASH_MODE_MASK 0x7f
+-
+-#define IPQESS_REG_RSS_HASH_VALUE 0x8C0
+-
+-#define IPQESS_REG_RSS_TYPE_RESULT 0x8C4
+-
+-#define IPQESS_HASH_TYPE_START 0
+-#define IPQESS_HASH_TYPE_END 5
+-#define IPQESS_HASH_TYPE_SHIFT 12
+-
+-#define IPQESS_RFS_FLOW_ENTRIES 1024
+-#define IPQESS_RFS_FLOW_ENTRIES_MASK (IPQESS_RFS_FLOW_ENTRIES - 1)
+-#define IPQESS_RFS_EXPIRE_COUNT_PER_CALL 128
+-
+-/* RFD Base Address Register */
+-#define IPQESS_REG_RFD_BASE_ADDR_Q(x) (0x950 + ((x) << 2)) /* x = queue id */
+-
+-/* RFD Index Register */
+-#define IPQESS_REG_RFD_IDX_Q(x) (0x9B0 + ((x) << 2)) /* x = queue id */
+-
+-#define IPQESS_RFD_PROD_IDX_BITS 0x00000FFF
+-#define IPQESS_RFD_CONS_IDX_BITS 0x0FFF0000
+-#define IPQESS_RFD_PROD_IDX_MASK 0xFFF
+-#define IPQESS_RFD_CONS_IDX_MASK 0xFFF
+-#define IPQESS_RFD_PROD_IDX_SHIFT 0
+-#define IPQESS_RFD_CONS_IDX_SHIFT 16
+-
+-/* Rx Descriptor Control Register */
+-#define IPQESS_REG_RX_DESC0 0xA10
+-#define IPQESS_RFD_RING_SIZE_MASK 0xFFF
+-#define IPQESS_RX_BUF_SIZE_MASK 0xFFFF
+-#define IPQESS_RFD_RING_SIZE_SHIFT 0
+-#define IPQESS_RX_BUF_SIZE_SHIFT 16
+-
+-#define IPQESS_REG_RX_DESC1 0xA14
+-#define IPQESS_RXQ_RFD_BURST_NUM_MASK 0x3F
+-#define IPQESS_RXQ_RFD_PF_THRESH_MASK 0x1F
+-#define IPQESS_RXQ_RFD_LOW_THRESH_MASK 0xFFF
+-#define IPQESS_RXQ_RFD_BURST_NUM_SHIFT 0
+-#define IPQESS_RXQ_RFD_PF_THRESH_SHIFT 8
+-#define IPQESS_RXQ_RFD_LOW_THRESH_SHIFT 16
+-
+-/* RXQ Control Register */
+-#define IPQESS_REG_RXQ_CTRL 0xA18
+-#define IPQESS_FIFO_THRESH_TYPE_SHIF 0
+-#define IPQESS_FIFO_THRESH_128_BYTE 0x0
+-#define IPQESS_FIFO_THRESH_64_BYTE 0x1
+-#define IPQESS_RXQ_CTRL_RMV_VLAN 0x00000002
+-#define IPQESS_RXQ_CTRL_EN_MASK			GENMASK(15, 8)
+-#define IPQESS_RXQ_CTRL_EN(__qid)		BIT(8 + (__qid))
+-
+-/* AXI Burst Size Config */
+-#define IPQESS_REG_AXIW_CTRL_MAXWRSIZE 0xA1C
+-#define IPQESS_AXIW_MAXWRSIZE_VALUE 0x0
+-
+-/* Rx Statistics Register */
+-#define IPQESS_REG_RX_STAT_BYTE_Q(x) (0xA30 + ((x) << 2)) /* x = queue id */
+-#define IPQESS_REG_RX_STAT_PKT_Q(x) (0xA50 + ((x) << 2)) /* x = queue id */
+-
+-/* WoL Pattern Length Register */
+-#define IPQESS_REG_WOL_PATTERN_LEN0 0xC00
+-#define IPQESS_WOL_PT_LEN_MASK 0xFF
+-#define IPQESS_WOL_PT0_LEN_SHIFT 0
+-#define IPQESS_WOL_PT1_LEN_SHIFT 8
+-#define IPQESS_WOL_PT2_LEN_SHIFT 16
+-#define IPQESS_WOL_PT3_LEN_SHIFT 24
+-
+-#define IPQESS_REG_WOL_PATTERN_LEN1 0xC04
+-#define IPQESS_WOL_PT4_LEN_SHIFT 0
+-#define IPQESS_WOL_PT5_LEN_SHIFT 8
+-#define IPQESS_WOL_PT6_LEN_SHIFT 16
+-
+-/* WoL Control Register */
+-#define IPQESS_REG_WOL_CTRL 0xC08
+-#define IPQESS_WOL_WK_EN 0x00000001
+-#define IPQESS_WOL_MG_EN 0x00000002
+-#define IPQESS_WOL_PT0_EN 0x00000004
+-#define IPQESS_WOL_PT1_EN 0x00000008
+-#define IPQESS_WOL_PT2_EN 0x00000010
+-#define IPQESS_WOL_PT3_EN 0x00000020
+-#define IPQESS_WOL_PT4_EN 0x00000040
+-#define IPQESS_WOL_PT5_EN 0x00000080
+-#define IPQESS_WOL_PT6_EN 0x00000100
+-
+-/* MAC Control Register */
+-#define IPQESS_REG_MAC_CTRL0 0xC20
+-#define IPQESS_REG_MAC_CTRL1 0xC24
+-
+-/* WoL Pattern Register */
+-#define IPQESS_REG_WOL_PATTERN_START 0x5000
+-#define IPQESS_PATTERN_PART_REG_OFFSET 0x40
+-
+-
+-/* TX descriptor fields */
+-#define IPQESS_TPD_HDR_SHIFT 0
+-#define IPQESS_TPD_PPPOE_EN 0x00000100
+-#define IPQESS_TPD_IP_CSUM_EN 0x00000200
+-#define IPQESS_TPD_TCP_CSUM_EN 0x0000400
+-#define IPQESS_TPD_UDP_CSUM_EN 0x00000800
+-#define IPQESS_TPD_CUSTOM_CSUM_EN 0x00000C00
+-#define IPQESS_TPD_LSO_EN 0x00001000
+-#define IPQESS_TPD_LSO_V2_EN 0x00002000
+-/* The VLAN_TAGGED bit is not used in the publicly available
+- * drivers. The definition has been stolen from the Atheros
+- * 'alx' driver (drivers/net/ethernet/atheros/alx/hw.h). It
+- * seems that it has the same meaning in regard to the EDMA
+- * hardware.
+- */
+-#define IPQESS_TPD_VLAN_TAGGED 0x00004000
+-#define IPQESS_TPD_IPV4_EN 0x00010000
+-#define IPQESS_TPD_MSS_MASK 0x1FFF
+-#define IPQESS_TPD_MSS_SHIFT 18
+-#define IPQESS_TPD_CUSTOM_CSUM_SHIFT 18
+-
+-/* RRD descriptor fields */
+-#define IPQESS_RRD_NUM_RFD_MASK 0x000F
+-#define IPQESS_RRD_PKT_SIZE_MASK 0x3FFF
+-#define IPQESS_RRD_SRC_PORT_NUM_MASK 0x4000
+-#define IPQESS_RRD_SVLAN 0x8000
+-#define IPQESS_RRD_FLOW_COOKIE_MASK 0x07FF;
+-
+-#define IPQESS_RRD_PKT_SIZE_MASK 0x3FFF
+-#define IPQESS_RRD_CSUM_FAIL_MASK 0xC000
+-#define IPQESS_RRD_CVLAN 0x0001
+-#define IPQESS_RRD_DESC_VALID 0x8000
+-
+-#define IPQESS_RRD_PRIORITY_SHIFT 4
+-#define IPQESS_RRD_PRIORITY_MASK 0x7
+-#define IPQESS_RRD_PORT_TYPE_SHIFT 7
+-#define IPQESS_RRD_PORT_TYPE_MASK 0x1F
+-
+-#endif
+diff --git a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess_ethtool.c b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess_ethtool.c
+deleted file mode 100644
+index da5fb4deed..0000000000
+--- a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess_ethtool.c
++++ /dev/null
+@@ -1,175 +0,0 @@
+-// SPDX-License-Identifier: (GPL-2.0 OR ISC)
+-/* Copyright (c) 2015 - 2016, The Linux Foundation. All rights reserved.
+- * Copyright (c) 2017 - 2018, John Crispin <john@phrozen.org>
+- *
+- * Permission to use, copy, modify, and/or distribute this software for
+- * any purpose with or without fee is hereby granted, provided that the
+- * above copyright notice and this permission notice appear in all copies.
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
+- * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#include <linux/ethtool.h>
+-#include <linux/netdevice.h>
+-#include <linux/string.h>
+-#include <linux/phylink.h>
+-
+-#include "ipqess.h"
+-
+-struct ipqesstool_stats {
+-	uint8_t string[ETH_GSTRING_LEN];
+-	uint32_t offset;
+-};
+-
+-#define IPQESS_STAT(m)    offsetof(struct ipqesstool_statistics, m)
+-#define DRVINFO_LEN	32
+-
+-static const struct ipqesstool_stats ipqess_stats[] = {
+-	{"tx_q0_pkt", IPQESS_STAT(tx_q0_pkt)},
+-	{"tx_q1_pkt", IPQESS_STAT(tx_q1_pkt)},
+-	{"tx_q2_pkt", IPQESS_STAT(tx_q2_pkt)},
+-	{"tx_q3_pkt", IPQESS_STAT(tx_q3_pkt)},
+-	{"tx_q4_pkt", IPQESS_STAT(tx_q4_pkt)},
+-	{"tx_q5_pkt", IPQESS_STAT(tx_q5_pkt)},
+-	{"tx_q6_pkt", IPQESS_STAT(tx_q6_pkt)},
+-	{"tx_q7_pkt", IPQESS_STAT(tx_q7_pkt)},
+-	{"tx_q8_pkt", IPQESS_STAT(tx_q8_pkt)},
+-	{"tx_q9_pkt", IPQESS_STAT(tx_q9_pkt)},
+-	{"tx_q10_pkt", IPQESS_STAT(tx_q10_pkt)},
+-	{"tx_q11_pkt", IPQESS_STAT(tx_q11_pkt)},
+-	{"tx_q12_pkt", IPQESS_STAT(tx_q12_pkt)},
+-	{"tx_q13_pkt", IPQESS_STAT(tx_q13_pkt)},
+-	{"tx_q14_pkt", IPQESS_STAT(tx_q14_pkt)},
+-	{"tx_q15_pkt", IPQESS_STAT(tx_q15_pkt)},
+-	{"tx_q0_byte", IPQESS_STAT(tx_q0_byte)},
+-	{"tx_q1_byte", IPQESS_STAT(tx_q1_byte)},
+-	{"tx_q2_byte", IPQESS_STAT(tx_q2_byte)},
+-	{"tx_q3_byte", IPQESS_STAT(tx_q3_byte)},
+-	{"tx_q4_byte", IPQESS_STAT(tx_q4_byte)},
+-	{"tx_q5_byte", IPQESS_STAT(tx_q5_byte)},
+-	{"tx_q6_byte", IPQESS_STAT(tx_q6_byte)},
+-	{"tx_q7_byte", IPQESS_STAT(tx_q7_byte)},
+-	{"tx_q8_byte", IPQESS_STAT(tx_q8_byte)},
+-	{"tx_q9_byte", IPQESS_STAT(tx_q9_byte)},
+-	{"tx_q10_byte", IPQESS_STAT(tx_q10_byte)},
+-	{"tx_q11_byte", IPQESS_STAT(tx_q11_byte)},
+-	{"tx_q12_byte", IPQESS_STAT(tx_q12_byte)},
+-	{"tx_q13_byte", IPQESS_STAT(tx_q13_byte)},
+-	{"tx_q14_byte", IPQESS_STAT(tx_q14_byte)},
+-	{"tx_q15_byte", IPQESS_STAT(tx_q15_byte)},
+-	{"rx_q0_pkt", IPQESS_STAT(rx_q0_pkt)},
+-	{"rx_q1_pkt", IPQESS_STAT(rx_q1_pkt)},
+-	{"rx_q2_pkt", IPQESS_STAT(rx_q2_pkt)},
+-	{"rx_q3_pkt", IPQESS_STAT(rx_q3_pkt)},
+-	{"rx_q4_pkt", IPQESS_STAT(rx_q4_pkt)},
+-	{"rx_q5_pkt", IPQESS_STAT(rx_q5_pkt)},
+-	{"rx_q6_pkt", IPQESS_STAT(rx_q6_pkt)},
+-	{"rx_q7_pkt", IPQESS_STAT(rx_q7_pkt)},
+-	{"rx_q0_byte", IPQESS_STAT(rx_q0_byte)},
+-	{"rx_q1_byte", IPQESS_STAT(rx_q1_byte)},
+-	{"rx_q2_byte", IPQESS_STAT(rx_q2_byte)},
+-	{"rx_q3_byte", IPQESS_STAT(rx_q3_byte)},
+-	{"rx_q4_byte", IPQESS_STAT(rx_q4_byte)},
+-	{"rx_q5_byte", IPQESS_STAT(rx_q5_byte)},
+-	{"rx_q6_byte", IPQESS_STAT(rx_q6_byte)},
+-	{"rx_q7_byte", IPQESS_STAT(rx_q7_byte)},
+-	{"tx_desc_error", IPQESS_STAT(tx_desc_error)},
+-};
+-
+-static int ipqess_get_strset_count(struct net_device *netdev, int sset)
+-{
+-	switch (sset) {
+-	case ETH_SS_STATS:
+-		return ARRAY_SIZE(ipqess_stats);
+-	default:
+-		netdev_dbg(netdev, "%s: Invalid string set", __func__);
+-		return -EOPNOTSUPP;
+-	}
+-}
+-
+-static void ipqess_get_strings(struct net_device *netdev, uint32_t stringset,
+-			       uint8_t *data)
+-{
+-	uint8_t *p = data;
+-	uint32_t i;
+-
+-	switch (stringset) {
+-	case ETH_SS_STATS:
+-		for (i = 0; i < ARRAY_SIZE(ipqess_stats); i++) {
+-			memcpy(p, ipqess_stats[i].string,
+-			       min((size_t)ETH_GSTRING_LEN,
+-			       strlen(ipqess_stats[i].string) + 1));
+-			p += ETH_GSTRING_LEN;
+-		}
+-		break;
+-	}
+-}
+-
+-static void ipqess_get_ethtool_stats(struct net_device *netdev,
+-				     struct ethtool_stats *stats,
+-				     uint64_t *data)
+-{
+-	struct ipqess *ess = netdev_priv(netdev);
+-	u32 *essstats = (u32 *)&ess->ipqessstats;
+-	int i;
+-
+-	spin_lock(&ess->stats_lock);
+-
+-	ipqess_update_hw_stats(ess);
+-
+-	for (i = 0; i < ARRAY_SIZE(ipqess_stats); i++)
+-		data[i] = *(u32 *)(essstats + (ipqess_stats[i].offset / sizeof(u32)));
+-
+-	spin_unlock(&ess->stats_lock);
+-}
+-
+-static void ipqess_get_drvinfo(struct net_device *dev,
+-			       struct ethtool_drvinfo *info)
+-{
+-	strlcpy(info->driver, "qca_ipqess", DRVINFO_LEN);
+-	strlcpy(info->bus_info, "axi", ETHTOOL_BUSINFO_LEN);
+-}
+-
+-static int ipqess_get_settings(struct net_device *netdev,
+-			       struct ethtool_link_ksettings *cmd)
+-{
+-	struct ipqess *ess = netdev_priv(netdev);
+-
+-	return phylink_ethtool_ksettings_get(ess->phylink, cmd);
+-}
+-
+-static int ipqess_set_settings(struct net_device *netdev,
+-			    const struct ethtool_link_ksettings *cmd)
+-{
+-	struct ipqess *ess = netdev_priv(netdev);
+-
+-	return phylink_ethtool_ksettings_set(ess->phylink, cmd);
+-}
+-
+-static void ipqess_get_ringparam(struct net_device *netdev,
+-			       struct ethtool_ringparam *ring)
+-{
+-	ring->tx_max_pending = IPQESS_TX_RING_SIZE;
+-	ring->rx_max_pending = IPQESS_RX_RING_SIZE;
+-}
+-
+-static const struct ethtool_ops ipqesstool_ops = {
+-	.get_drvinfo = &ipqess_get_drvinfo,
+-	.get_link = &ethtool_op_get_link,
+-	.get_link_ksettings = &ipqess_get_settings,
+-	.set_link_ksettings = &ipqess_set_settings,
+-	.get_strings = &ipqess_get_strings,
+-	.get_sset_count = &ipqess_get_strset_count,
+-	.get_ethtool_stats = &ipqess_get_ethtool_stats,
+-	.get_ringparam = ipqess_get_ringparam,
+-};
+-
+-void ipqess_set_ethtool_ops(struct net_device *netdev)
+-{
+-	netdev->ethtool_ops = &ipqesstool_ops;
+-}
+diff --git a/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c b/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
+deleted file mode 100644
+index 23b0ca74f7..0000000000
+--- a/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
++++ /dev/null
+@@ -1,839 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-or-later
+-/*
+- * Copyright (c) 2020 Sartura Ltd.
+- *
+- * Author: Robert Marko <robert.marko@sartura.hr>
+- *
+- * Qualcomm QCA8072 and QCA8075 PHY driver
+- */
+-
+-#include <linux/version.h>
+-#include <linux/module.h>
+-#include <linux/of.h>
+-#include <linux/phy.h>
+-#include <linux/bitfield.h>
+-#include <linux/ethtool_netlink.h>
+-#include <linux/gpio.h>
+-#include <linux/sfp.h>
+-
+-#include <dt-bindings/net/qcom-qca807x.h>
+-
+-#define PHY_ID_QCA8072		0x004dd0b2
+-#define PHY_ID_QCA8075		0x004dd0b1
+-#define PHY_ID_QCA807X_PSGMII	0x06820805
+-
+-/* Downshift */
+-#define QCA807X_SMARTSPEED_EN			BIT(5)
+-#define QCA807X_SMARTSPEED_RETRY_LIMIT_MASK	GENMASK(4, 2)
+-#define QCA807X_SMARTSPEED_RETRY_LIMIT_DEFAULT	5
+-#define QCA807X_SMARTSPEED_RETRY_LIMIT_MIN	2
+-#define QCA807X_SMARTSPEED_RETRY_LIMIT_MAX	9
+-
+-/* Cable diagnostic test (CDT) */
+-#define QCA807X_CDT						0x16
+-#define QCA807X_CDT_ENABLE					BIT(15)
+-#define QCA807X_CDT_ENABLE_INTER_PAIR_SHORT			BIT(13)
+-#define QCA807X_CDT_STATUS					BIT(11)
+-#define QCA807X_CDT_MMD3_STATUS					0x8064
+-#define QCA807X_CDT_MDI0_STATUS_MASK				GENMASK(15, 12)
+-#define QCA807X_CDT_MDI1_STATUS_MASK				GENMASK(11, 8)
+-#define QCA807X_CDT_MDI2_STATUS_MASK				GENMASK(7, 4)
+-#define QCA807X_CDT_MDI3_STATUS_MASK				GENMASK(3, 0)
+-#define QCA807X_CDT_RESULTS_INVALID				0x0
+-#define QCA807X_CDT_RESULTS_OK					0x1
+-#define QCA807X_CDT_RESULTS_OPEN				0x2
+-#define QCA807X_CDT_RESULTS_SAME_SHORT				0x3
+-#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OK	0x4
+-#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OK	0x8
+-#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OK	0xc
+-#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OPEN	0x6
+-#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OPEN	0xa
+-#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OPEN	0xe
+-#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_SHORT	0x7
+-#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_SHORT	0xb
+-#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_SHORT	0xf
+-#define QCA807X_CDT_RESULTS_BUSY				0x9
+-#define QCA807X_CDT_MMD3_MDI0_LENGTH				0x8065
+-#define QCA807X_CDT_MMD3_MDI1_LENGTH				0x8066
+-#define QCA807X_CDT_MMD3_MDI2_LENGTH				0x8067
+-#define QCA807X_CDT_MMD3_MDI3_LENGTH				0x8068
+-#define QCA807X_CDT_SAME_SHORT_LENGTH_MASK			GENMASK(15, 8)
+-#define QCA807X_CDT_CROSS_SHORT_LENGTH_MASK			GENMASK(7, 0)
+-
+-#define QCA807X_CHIP_CONFIGURATION				0x1f
+-#define QCA807X_BT_BX_REG_SEL					BIT(15)
+-#define QCA807X_BT_BX_REG_SEL_FIBER				0
+-#define QCA807X_BT_BX_REG_SEL_COPPER				1
+-#define QCA807X_CHIP_CONFIGURATION_MODE_CFG_MASK		GENMASK(3, 0)
+-#define QCA807X_CHIP_CONFIGURATION_MODE_QSGMII_SGMII		4
+-#define QCA807X_CHIP_CONFIGURATION_MODE_PSGMII_FIBER		3
+-#define QCA807X_CHIP_CONFIGURATION_MODE_PSGMII_ALL_COPPER	0
+-
+-#define QCA807X_MEDIA_SELECT_STATUS				0x1a
+-#define QCA807X_MEDIA_DETECTED_COPPER				BIT(5)
+-#define QCA807X_MEDIA_DETECTED_1000_BASE_X			BIT(4)
+-#define QCA807X_MEDIA_DETECTED_100_BASE_FX			BIT(3)
+-
+-#define QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION			0x807e
+-#define QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION_EN		BIT(0)
+-
+-#define QCA807X_MMD7_1000BASE_T_POWER_SAVE_PER_CABLE_LENGTH	0x801a
+-#define QCA807X_CONTROL_DAC_MASK				GENMASK(2, 0)
+-
+-#define QCA807X_MMD7_LED_100N_1				0x8074
+-#define QCA807X_MMD7_LED_100N_2				0x8075
+-#define QCA807X_MMD7_LED_1000N_1			0x8076
+-#define QCA807X_MMD7_LED_1000N_2			0x8077
+-#define QCA807X_LED_TXACT_BLK_EN_2			BIT(10)
+-#define QCA807X_LED_RXACT_BLK_EN_2			BIT(9)
+-#define QCA807X_LED_GT_ON_EN_2				BIT(6)
+-#define QCA807X_LED_HT_ON_EN_2				BIT(5)
+-#define QCA807X_LED_BT_ON_EN_2				BIT(4)
+-#define QCA807X_GPIO_FORCE_EN				BIT(15)
+-#define QCA807X_GPIO_FORCE_MODE_MASK			GENMASK(14, 13)
+-
+-#define QCA807X_INTR_ENABLE				0x12
+-#define QCA807X_INTR_STATUS				0x13
+-#define QCA807X_INTR_ENABLE_AUTONEG_ERR			BIT(15)
+-#define QCA807X_INTR_ENABLE_SPEED_CHANGED		BIT(14)
+-#define QCA807X_INTR_ENABLE_DUPLEX_CHANGED		BIT(13)
+-#define QCA807X_INTR_ENABLE_LINK_FAIL			BIT(11)
+-#define QCA807X_INTR_ENABLE_LINK_SUCCESS		BIT(10)
+-
+-#define QCA807X_FUNCTION_CONTROL			0x10
+-#define QCA807X_FC_MDI_CROSSOVER_MODE_MASK		GENMASK(6, 5)
+-#define QCA807X_FC_MDI_CROSSOVER_AUTO			3
+-#define QCA807X_FC_MDI_CROSSOVER_MANUAL_MDIX		1
+-#define QCA807X_FC_MDI_CROSSOVER_MANUAL_MDI		0
+-
+-#define QCA807X_PHY_SPECIFIC_STATUS			0x11
+-#define QCA807X_SS_SPEED_AND_DUPLEX_RESOLVED		BIT(11)
+-#define QCA807X_SS_SPEED_MASK				GENMASK(15, 14)
+-#define QCA807X_SS_SPEED_1000				2
+-#define QCA807X_SS_SPEED_100				1
+-#define QCA807X_SS_SPEED_10				0
+-#define QCA807X_SS_DUPLEX				BIT(13)
+-#define QCA807X_SS_MDIX					BIT(6)
+-
+-/* PSGMII PHY specific */
+-#define PSGMII_QSGMII_DRIVE_CONTROL_1			0xb
+-#define PSGMII_QSGMII_TX_DRIVER_MASK			GENMASK(7, 4)
+-#define PSGMII_MODE_CTRL				0x6d
+-#define PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK		BIT(0)
+-#define PSGMII_MMD3_SERDES_CONTROL			0x805a
+-
+-struct qca807x_gpio_priv {
+-	struct phy_device *phy;
+-};
+-
+-static int qca807x_get_downshift(struct phy_device *phydev, u8 *data)
+-{
+-	int val, cnt, enable;
+-
+-	val = phy_read(phydev, MII_NWAYTEST);
+-	if (val < 0)
+-		return val;
+-
+-	enable = FIELD_GET(QCA807X_SMARTSPEED_EN, val);
+-	cnt = FIELD_GET(QCA807X_SMARTSPEED_RETRY_LIMIT_MASK, val) + 2;
+-
+-	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
+-
+-	return 0;
+-}
+-
+-static int qca807x_set_downshift(struct phy_device *phydev, u8 cnt)
+-{
+-	int ret, val;
+-
+-	if (cnt > QCA807X_SMARTSPEED_RETRY_LIMIT_MAX ||
+-	    (cnt < QCA807X_SMARTSPEED_RETRY_LIMIT_MIN && cnt != DOWNSHIFT_DEV_DISABLE))
+-		return -EINVAL;
+-
+-	if (!cnt) {
+-		ret = phy_clear_bits(phydev, MII_NWAYTEST, QCA807X_SMARTSPEED_EN);
+-	} else {
+-		val = QCA807X_SMARTSPEED_EN;
+-		val |= FIELD_PREP(QCA807X_SMARTSPEED_RETRY_LIMIT_MASK, cnt - 2);
+-
+-		phy_modify(phydev, MII_NWAYTEST,
+-			   QCA807X_SMARTSPEED_EN |
+-			   QCA807X_SMARTSPEED_RETRY_LIMIT_MASK,
+-			   val);
+-	}
+-
+-	ret = genphy_soft_reset(phydev);
+-
+-	return ret;
+-}
+-
+-static int qca807x_get_tunable(struct phy_device *phydev,
+-			       struct ethtool_tunable *tuna, void *data)
+-{
+-	switch (tuna->id) {
+-	case ETHTOOL_PHY_DOWNSHIFT:
+-		return qca807x_get_downshift(phydev, data);
+-	default:
+-		return -EOPNOTSUPP;
+-	}
+-}
+-
+-static int qca807x_set_tunable(struct phy_device *phydev,
+-			       struct ethtool_tunable *tuna, const void *data)
+-{
+-	switch (tuna->id) {
+-	case ETHTOOL_PHY_DOWNSHIFT:
+-		return qca807x_set_downshift(phydev, *(const u8 *)data);
+-	default:
+-		return -EOPNOTSUPP;
+-	}
+-}
+-
+-static bool qca807x_distance_valid(int result)
+-{
+-	switch (result) {
+-	case QCA807X_CDT_RESULTS_OPEN:
+-	case QCA807X_CDT_RESULTS_SAME_SHORT:
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OK:
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OK:
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OK:
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OPEN:
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OPEN:
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OPEN:
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_SHORT:
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_SHORT:
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_SHORT:
+-		return true;
+-	}
+-	return false;
+-}
+-
+-static int qca807x_report_length(struct phy_device *phydev,
+-				 int pair, int result)
+-{
+-	int length;
+-	int ret;
+-
+-	ret = phy_read_mmd(phydev, MDIO_MMD_PCS, QCA807X_CDT_MMD3_MDI0_LENGTH + pair);
+-	if (ret < 0)
+-		return ret;
+-
+-	switch (result) {
+-	case ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT:
+-		length = (FIELD_GET(QCA807X_CDT_SAME_SHORT_LENGTH_MASK, ret) * 800) / 10;
+-		break;
+-	case ETHTOOL_A_CABLE_RESULT_CODE_OPEN:
+-	case ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT:
+-		length = (FIELD_GET(QCA807X_CDT_CROSS_SHORT_LENGTH_MASK, ret) * 800) / 10;
+-		break;
+-	}
+-
+-	ethnl_cable_test_fault_length(phydev, pair, length);
+-
+-	return 0;
+-}
+-
+-static int qca807x_cable_test_report_trans(int result)
+-{
+-	switch (result) {
+-	case QCA807X_CDT_RESULTS_OK:
+-		return ETHTOOL_A_CABLE_RESULT_CODE_OK;
+-	case QCA807X_CDT_RESULTS_OPEN:
+-		return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
+-	case QCA807X_CDT_RESULTS_SAME_SHORT:
+-		return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OK:
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OK:
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OK:
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OPEN:
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OPEN:
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OPEN:
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_SHORT:
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_SHORT:
+-	case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_SHORT:
+-		return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
+-	default:
+-		return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
+-	}
+-}
+-
+-static int qca807x_cable_test_report(struct phy_device *phydev)
+-{
+-	int pair0, pair1, pair2, pair3;
+-	int ret;
+-
+-	ret = phy_read_mmd(phydev, MDIO_MMD_PCS, QCA807X_CDT_MMD3_STATUS);
+-	if (ret < 0)
+-		return ret;
+-
+-	pair0 = FIELD_GET(QCA807X_CDT_MDI0_STATUS_MASK, ret);
+-	pair1 = FIELD_GET(QCA807X_CDT_MDI1_STATUS_MASK, ret);
+-	pair2 = FIELD_GET(QCA807X_CDT_MDI2_STATUS_MASK, ret);
+-	pair3 = FIELD_GET(QCA807X_CDT_MDI3_STATUS_MASK, ret);
+-
+-	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
+-				qca807x_cable_test_report_trans(pair0));
+-	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
+-				qca807x_cable_test_report_trans(pair1));
+-	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
+-				qca807x_cable_test_report_trans(pair2));
+-	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
+-				qca807x_cable_test_report_trans(pair3));
+-
+-	if (qca807x_distance_valid(pair0))
+-		qca807x_report_length(phydev, 0, qca807x_cable_test_report_trans(pair0));
+-	if (qca807x_distance_valid(pair1))
+-		qca807x_report_length(phydev, 1, qca807x_cable_test_report_trans(pair1));
+-	if (qca807x_distance_valid(pair2))
+-		qca807x_report_length(phydev, 2, qca807x_cable_test_report_trans(pair2));
+-	if (qca807x_distance_valid(pair3))
+-		qca807x_report_length(phydev, 3, qca807x_cable_test_report_trans(pair3));
+-
+-	return 0;
+-}
+-
+-static int qca807x_cable_test_get_status(struct phy_device *phydev,
+-					 bool *finished)
+-{
+-	int val;
+-
+-	*finished = false;
+-
+-	val = phy_read(phydev, QCA807X_CDT);
+-	if (!((val & QCA807X_CDT_ENABLE) && (val & QCA807X_CDT_STATUS))) {
+-		*finished = true;
+-
+-		return qca807x_cable_test_report(phydev);
+-	}
+-
+-	return 0;
+-}
+-
+-static int qca807x_cable_test_start(struct phy_device *phydev)
+-{
+-	int val, ret;
+-
+-	val = phy_read(phydev, QCA807X_CDT);
+-	/* Enable inter-pair short check as well */
+-	val &= ~QCA807X_CDT_ENABLE_INTER_PAIR_SHORT;
+-	val |= QCA807X_CDT_ENABLE;
+-	ret = phy_write(phydev, QCA807X_CDT, val);
+-
+-	return ret;
+-}
+-
+-#ifdef CONFIG_GPIOLIB
+-static int qca807x_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
+-{
+-	return GPIO_LINE_DIRECTION_OUT;
+-}
+-
+-static int qca807x_gpio_get_reg(unsigned int offset)
+-{
+-	return QCA807X_MMD7_LED_100N_2 + (offset % 2) * 2;
+-}
+-
+-static int qca807x_gpio_get(struct gpio_chip *gc, unsigned int offset)
+-{
+-	struct qca807x_gpio_priv *priv = gpiochip_get_data(gc);
+-	int val;
+-
+-	val = phy_read_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset));
+-
+-	return FIELD_GET(QCA807X_GPIO_FORCE_MODE_MASK, val);
+-}
+-
+-static void qca807x_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
+-{
+-	struct qca807x_gpio_priv *priv = gpiochip_get_data(gc);
+-	int val;
+-
+-	val = phy_read_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset));
+-	val &= ~QCA807X_GPIO_FORCE_MODE_MASK;
+-	val |= QCA807X_GPIO_FORCE_EN;
+-	val |= FIELD_PREP(QCA807X_GPIO_FORCE_MODE_MASK, value);
+-
+-	phy_write_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset), val);
+-}
+-
+-static int qca807x_gpio_dir_out(struct gpio_chip *gc, unsigned int offset, int value)
+-{
+-	qca807x_gpio_set(gc, offset, value);
+-
+-	return 0;
+-}
+-
+-static int qca807x_gpio(struct phy_device *phydev)
+-{
+-	struct device *dev = &phydev->mdio.dev;
+-	struct qca807x_gpio_priv *priv;
+-	struct gpio_chip *gc;
+-
+-	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+-	if (!priv)
+-		return -ENOMEM;
+-
+-	priv->phy = phydev;
+-
+-	gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL);
+-	if (!gc)
+-		return -ENOMEM;
+-
+-	gc->label = dev_name(dev);
+-	gc->base = -1;
+-	gc->ngpio = 2;
+-	gc->parent = dev;
+-	gc->owner = THIS_MODULE;
+-	gc->can_sleep = true;
+-	gc->get_direction = qca807x_gpio_get_direction;
+-	gc->direction_output = qca807x_gpio_dir_out;
+-	gc->get = qca807x_gpio_get;
+-	gc->set = qca807x_gpio_set;
+-
+-	return devm_gpiochip_add_data(dev, gc, priv);
+-}
+-#endif
+-
+-static int qca807x_read_copper_status(struct phy_device *phydev)
+-{
+-	int ss, err, old_link = phydev->link;
+-
+-	/* Update the link, but return if there was an error */
+-	err = genphy_update_link(phydev);
+-	if (err)
+-		return err;
+-
+-	/* why bother the PHY if nothing can have changed */
+-	if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link)
+-		return 0;
+-
+-	phydev->speed = SPEED_UNKNOWN;
+-	phydev->duplex = DUPLEX_UNKNOWN;
+-	phydev->pause = 0;
+-	phydev->asym_pause = 0;
+-
+-	err = genphy_read_lpa(phydev);
+-	if (err < 0)
+-		return err;
+-
+-	/* Read the QCA807x PHY-Specific Status register copper page,
+-	 * which indicates the speed and duplex that the PHY is actually
+-	 * using, irrespective of whether we are in autoneg mode or not.
+-	 */
+-	ss = phy_read(phydev, QCA807X_PHY_SPECIFIC_STATUS);
+-	if (ss < 0)
+-		return ss;
+-
+-	if (ss & QCA807X_SS_SPEED_AND_DUPLEX_RESOLVED) {
+-		int sfc;
+-
+-		sfc = phy_read(phydev, QCA807X_FUNCTION_CONTROL);
+-		if (sfc < 0)
+-			return sfc;
+-
+-		switch (FIELD_GET(QCA807X_SS_SPEED_MASK, ss)) {
+-		case QCA807X_SS_SPEED_10:
+-			phydev->speed = SPEED_10;
+-			break;
+-		case QCA807X_SS_SPEED_100:
+-			phydev->speed = SPEED_100;
+-			break;
+-		case QCA807X_SS_SPEED_1000:
+-			phydev->speed = SPEED_1000;
+-			break;
+-		}
+-		if (ss & QCA807X_SS_DUPLEX)
+-			phydev->duplex = DUPLEX_FULL;
+-		else
+-			phydev->duplex = DUPLEX_HALF;
+-
+-		if (ss & QCA807X_SS_MDIX)
+-			phydev->mdix = ETH_TP_MDI_X;
+-		else
+-			phydev->mdix = ETH_TP_MDI;
+-
+-		switch (FIELD_GET(QCA807X_FC_MDI_CROSSOVER_MODE_MASK, sfc)) {
+-		case QCA807X_FC_MDI_CROSSOVER_MANUAL_MDI:
+-			phydev->mdix_ctrl = ETH_TP_MDI;
+-			break;
+-		case QCA807X_FC_MDI_CROSSOVER_MANUAL_MDIX:
+-			phydev->mdix_ctrl = ETH_TP_MDI_X;
+-			break;
+-		case QCA807X_FC_MDI_CROSSOVER_AUTO:
+-			phydev->mdix_ctrl = ETH_TP_MDI_AUTO;
+-			break;
+-		}
+-	}
+-
+-	if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete)
+-		phy_resolve_aneg_pause(phydev);
+-
+-	return 0;
+-}
+-
+-static int qca807x_read_fiber_status(struct phy_device *phydev)
+-{
+-	int ss, err, lpa, old_link = phydev->link;
+-
+-	/* Update the link, but return if there was an error */
+-	err = genphy_update_link(phydev);
+-	if (err)
+-		return err;
+-
+-	/* why bother the PHY if nothing can have changed */
+-	if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link)
+-		return 0;
+-
+-	phydev->speed = SPEED_UNKNOWN;
+-	phydev->duplex = DUPLEX_UNKNOWN;
+-	phydev->pause = 0;
+-	phydev->asym_pause = 0;
+-
+-	if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) {
+-		lpa = phy_read(phydev, MII_LPA);
+-		if (lpa < 0)
+-			return lpa;
+-
+-		linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
+-				 phydev->lp_advertising, lpa & LPA_LPACK);
+-		linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
+-				 phydev->lp_advertising, lpa & LPA_1000XFULL);
+-		linkmode_mod_bit(ETHTOOL_LINK_MODE_Pause_BIT,
+-				 phydev->lp_advertising, lpa & LPA_1000XPAUSE);
+-		linkmode_mod_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
+-				 phydev->lp_advertising,
+-				 lpa & LPA_1000XPAUSE_ASYM);
+-
+-		phy_resolve_aneg_linkmode(phydev);
+-	}
+-
+-	/* Read the QCA807x PHY-Specific Status register fiber page,
+-	 * which indicates the speed and duplex that the PHY is actually
+-	 * using, irrespective of whether we are in autoneg mode or not.
+-	 */
+-	ss = phy_read(phydev, QCA807X_PHY_SPECIFIC_STATUS);
+-	if (ss < 0)
+-		return ss;
+-
+-	if (ss & QCA807X_SS_SPEED_AND_DUPLEX_RESOLVED) {
+-		switch (FIELD_GET(QCA807X_SS_SPEED_MASK, ss)) {
+-		case QCA807X_SS_SPEED_100:
+-			phydev->speed = SPEED_100;
+-			break;
+-		case QCA807X_SS_SPEED_1000:
+-			phydev->speed = SPEED_1000;
+-			break;
+-		}
+-
+-		if (ss & QCA807X_SS_DUPLEX)
+-			phydev->duplex = DUPLEX_FULL;
+-		else
+-			phydev->duplex = DUPLEX_HALF;
+-	}
+-
+-	return 0;
+-}
+-
+-static int qca807x_read_status(struct phy_device *phydev)
+-{
+-	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported)) {
+-		switch (phydev->port) {
+-		case PORT_FIBRE:
+-			return qca807x_read_fiber_status(phydev);
+-		case PORT_TP:
+-			return qca807x_read_copper_status(phydev);
+-		default:
+-			return -EINVAL;
+-		}
+-	} else
+-		return qca807x_read_copper_status(phydev);
+-}
+-
+-static int qca807x_config_intr(struct phy_device *phydev)
+-{
+-	int ret, val;
+-
+-	val = phy_read(phydev, QCA807X_INTR_ENABLE);
+-
+-	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
+-		/* Check for combo port as it has fewer interrupts */
+-		if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION)) {
+-			val |= QCA807X_INTR_ENABLE_SPEED_CHANGED;
+-			val |= QCA807X_INTR_ENABLE_LINK_FAIL;
+-			val |= QCA807X_INTR_ENABLE_LINK_SUCCESS;
+-		} else {
+-			val |= QCA807X_INTR_ENABLE_AUTONEG_ERR;
+-			val |= QCA807X_INTR_ENABLE_SPEED_CHANGED;
+-			val |= QCA807X_INTR_ENABLE_DUPLEX_CHANGED;
+-			val |= QCA807X_INTR_ENABLE_LINK_FAIL;
+-			val |= QCA807X_INTR_ENABLE_LINK_SUCCESS;
+-		}
+-		ret = phy_write(phydev, QCA807X_INTR_ENABLE, val);
+-	} else {
+-		ret = phy_write(phydev, QCA807X_INTR_ENABLE, 0);
+-	}
+-
+-	return ret;
+-}
+-
+-static irqreturn_t qca807x_handle_interrupt(struct phy_device *phydev)
+-{
+-	int irq_status, int_enabled;
+-
+-	irq_status = phy_read(phydev, QCA807X_INTR_STATUS);
+-	if (irq_status < 0) {
+-		phy_error(phydev);
+-		return IRQ_NONE;
+-	}
+-
+-	/* Read the current enabled interrupts */
+-	int_enabled = phy_read(phydev, QCA807X_INTR_ENABLE);
+-	if (int_enabled < 0) {
+-		phy_error(phydev);
+-		return IRQ_NONE;
+-	}
+-
+-	/* See if this was one of our enabled interrupts */
+-	if (!(irq_status & int_enabled))
+-		return IRQ_NONE;
+-
+-	phy_trigger_machine(phydev);
+-
+-	return IRQ_HANDLED;
+-}
+-
+-static int qca807x_led_config(struct phy_device *phydev)
+-{
+-	struct device_node *node = phydev->mdio.dev.of_node;
+-	bool led_config = false;
+-	int val;
+-
+-	val = phy_read_mmd(phydev, MDIO_MMD_AN, QCA807X_MMD7_LED_1000N_1);
+-	if (val < 0)
+-		return val;
+-
+-	if (of_property_read_bool(node, "qcom,single-led-1000")) {
+-		val |= QCA807X_LED_TXACT_BLK_EN_2;
+-		val |= QCA807X_LED_RXACT_BLK_EN_2;
+-		val |= QCA807X_LED_GT_ON_EN_2;
+-
+-		led_config = true;
+-	}
+-
+-	if (of_property_read_bool(node, "qcom,single-led-100")) {
+-		val |= QCA807X_LED_HT_ON_EN_2;
+-
+-		led_config = true;
+-	}
+-
+-	if (of_property_read_bool(node, "qcom,single-led-10")) {
+-		val |= QCA807X_LED_BT_ON_EN_2;
+-
+-		led_config = true;
+-	}
+-
+-	if (led_config)
+-		return phy_write_mmd(phydev, MDIO_MMD_AN, QCA807X_MMD7_LED_1000N_1, val);
+-	else
+-		return 0;
+-}
+-
+-static int qca807x_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
+-{
+-	struct phy_device *phydev = upstream;
+-	__ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, };
+-	phy_interface_t iface;
+-	int ret;
+-
+-	sfp_parse_support(phydev->sfp_bus, id, support);
+-	iface = sfp_select_interface(phydev->sfp_bus, support);
+-
+-	dev_info(&phydev->mdio.dev, "%s SFP module inserted\n", phy_modes(iface));
+-
+-	switch (iface) {
+-	case PHY_INTERFACE_MODE_1000BASEX:
+-	case PHY_INTERFACE_MODE_100BASEX:
+-		/* Set PHY mode to PSGMII combo (1/4 copper + combo ports) mode */
+-		ret = phy_modify(phydev,
+-				 QCA807X_CHIP_CONFIGURATION,
+-				 QCA807X_CHIP_CONFIGURATION_MODE_CFG_MASK,
+-				 QCA807X_CHIP_CONFIGURATION_MODE_PSGMII_FIBER);
+-		/* Enable fiber mode autodection (1000Base-X or 100Base-FX) */
+-		ret = phy_set_bits_mmd(phydev,
+-				       MDIO_MMD_AN,
+-				       QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION,
+-				       QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION_EN);
+-		/* Select fiber page */
+-		ret = phy_clear_bits(phydev,
+-				     QCA807X_CHIP_CONFIGURATION,
+-				     QCA807X_BT_BX_REG_SEL);
+-
+-		phydev->port = PORT_FIBRE;
+-		break;
+-	default:
+-		dev_err(&phydev->mdio.dev, "Incompatible SFP module inserted\n");
+-		return -EINVAL;
+-	}
+-
+-	return ret;
+-}
+-
+-static void qca807x_sfp_remove(void *upstream)
+-{
+-	struct phy_device *phydev = upstream;
+-
+-	/* Select copper page */
+-	phy_set_bits(phydev,
+-		     QCA807X_CHIP_CONFIGURATION,
+-		     QCA807X_BT_BX_REG_SEL);
+-
+-	phydev->port = PORT_TP;
+-}
+-
+-static const struct sfp_upstream_ops qca807x_sfp_ops = {
+-	.attach = phy_sfp_attach,
+-	.detach = phy_sfp_detach,
+-	.module_insert = qca807x_sfp_insert,
+-	.module_remove = qca807x_sfp_remove,
+-};
+-
+-static int qca807x_config(struct phy_device *phydev)
+-{
+-	struct device_node *node = phydev->mdio.dev.of_node;
+-	int control_dac, ret = 0;
+-	u32 of_control_dac;
+-
+-	/* Check for Combo port */
+-	if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION)) {
+-		int psgmii_serdes;
+-
+-		/* Prevent PSGMII going into hibernation via PSGMII self test */
+-		psgmii_serdes = phy_read_mmd(phydev, MDIO_MMD_PCS, PSGMII_MMD3_SERDES_CONTROL);
+-		psgmii_serdes &= ~BIT(1);
+-		ret = phy_write_mmd(phydev, MDIO_MMD_PCS,
+-				    PSGMII_MMD3_SERDES_CONTROL,
+-				    psgmii_serdes);
+-	}
+-
+-	if (!of_property_read_u32(node, "qcom,control-dac", &of_control_dac)) {
+-		control_dac = phy_read_mmd(phydev, MDIO_MMD_AN,
+-					   QCA807X_MMD7_1000BASE_T_POWER_SAVE_PER_CABLE_LENGTH);
+-		control_dac &= ~QCA807X_CONTROL_DAC_MASK;
+-		control_dac |= FIELD_PREP(QCA807X_CONTROL_DAC_MASK, of_control_dac);
+-		ret = phy_write_mmd(phydev, MDIO_MMD_AN,
+-				    QCA807X_MMD7_1000BASE_T_POWER_SAVE_PER_CABLE_LENGTH,
+-				    control_dac);
+-	}
+-
+-	/* Optionally configure LED-s */
+-	if (IS_ENABLED(CONFIG_GPIOLIB)) {
+-		/* Check whether PHY-s pins are used as GPIO-s */
+-		if (!of_property_read_bool(node, "gpio-controller"))
+-			ret = qca807x_led_config(phydev);
+-	} else {
+-		ret = qca807x_led_config(phydev);
+-	}
+-
+-	return ret;
+-}
+-
+-static int qca807x_probe(struct phy_device *phydev)
+-{
+-	struct device_node *node = phydev->mdio.dev.of_node;
+-	int ret = 0;
+-
+-	if (IS_ENABLED(CONFIG_GPIOLIB)) {
+-		/* Do not register a GPIO controller unless flagged for it */
+-		if (of_property_read_bool(node, "gpio-controller"))
+-			ret = qca807x_gpio(phydev);
+-	}
+-
+-	/* Attach SFP bus on combo port*/
+-	if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION)) {
+-		ret = phy_sfp_probe(phydev, &qca807x_sfp_ops);
+-		linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported);
+-		linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->advertising);
+-	}
+-
+-	return ret;
+-}
+-
+-static int qca807x_psgmii_config(struct phy_device *phydev)
+-{
+-	struct device_node *node = phydev->mdio.dev.of_node;
+-	int tx_amp, ret = 0;
+-	u32 tx_driver_strength;
+-
+-	/* Workaround to enable AZ transmitting ability */
+-	ret = phy_clear_bits_mmd(phydev,
+-				 MDIO_MMD_PMAPMD,
+-				 PSGMII_MODE_CTRL,
+-				 PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK);
+-
+-	/* PSGMII/QSGMII TX amp set to DT defined value instead of default 600mV */
+-	if (!of_property_read_u32(node, "qcom,tx-driver-strength", &tx_driver_strength)) {
+-		tx_amp = phy_read(phydev, PSGMII_QSGMII_DRIVE_CONTROL_1);
+-		tx_amp &= ~PSGMII_QSGMII_TX_DRIVER_MASK;
+-		tx_amp |= FIELD_PREP(PSGMII_QSGMII_TX_DRIVER_MASK, tx_driver_strength);
+-		ret = phy_write(phydev, PSGMII_QSGMII_DRIVE_CONTROL_1, tx_amp);
+-	}
+-
+-	return ret;
+-}
+-
+-static struct phy_driver qca807x_drivers[] = {
+-	{
+-		PHY_ID_MATCH_EXACT(PHY_ID_QCA8072),
+-		.name           = "Qualcomm QCA8072",
+-		.flags		= PHY_POLL_CABLE_TEST,
+-		/* PHY_GBIT_FEATURES */
+-		.probe		= qca807x_probe,
+-		.config_init	= qca807x_config,
+-		.read_status	= qca807x_read_status,
+-		.config_intr	= qca807x_config_intr,
+-		.handle_interrupt = qca807x_handle_interrupt,
+-		.soft_reset	= genphy_soft_reset,
+-		.get_tunable	= qca807x_get_tunable,
+-		.set_tunable	= qca807x_set_tunable,
+-		.resume		= genphy_resume,
+-		.suspend	= genphy_suspend,
+-		.cable_test_start	= qca807x_cable_test_start,
+-		.cable_test_get_status	= qca807x_cable_test_get_status,
+-	},
+-	{
+-		PHY_ID_MATCH_EXACT(PHY_ID_QCA8075),
+-		.name           = "Qualcomm QCA8075",
+-		.flags		= PHY_POLL_CABLE_TEST,
+-		/* PHY_GBIT_FEATURES */
+-		.probe		= qca807x_probe,
+-		.config_init	= qca807x_config,
+-		.read_status	= qca807x_read_status,
+-		.config_intr	= qca807x_config_intr,
+-		.handle_interrupt = qca807x_handle_interrupt,
+-		.soft_reset	= genphy_soft_reset,
+-		.get_tunable	= qca807x_get_tunable,
+-		.set_tunable	= qca807x_set_tunable,
+-		.resume		= genphy_resume,
+-		.suspend	= genphy_suspend,
+-		.cable_test_start	= qca807x_cable_test_start,
+-		.cable_test_get_status	= qca807x_cable_test_get_status,
+-	},
+-	{
+-		PHY_ID_MATCH_EXACT(PHY_ID_QCA807X_PSGMII),
+-		.name           = "Qualcomm QCA807x PSGMII",
+-		.probe		= qca807x_psgmii_config,
+-	},
+-};
+-module_phy_driver(qca807x_drivers);
+-
+-static struct mdio_device_id __maybe_unused qca807x_tbl[] = {
+-	{ PHY_ID_MATCH_EXACT(PHY_ID_QCA8072) },
+-	{ PHY_ID_MATCH_EXACT(PHY_ID_QCA8075) },
+-	{ PHY_ID_MATCH_MODEL(PHY_ID_QCA807X_PSGMII) },
+-	{ }
+-};
+-
+-MODULE_AUTHOR("Robert Marko");
+-MODULE_DESCRIPTION("Qualcomm QCA807x PHY driver");
+-MODULE_DEVICE_TABLE(mdio, qca807x_tbl);
+-MODULE_LICENSE("GPL");
+diff --git a/target/linux/ipq40xx/generic/target.mk b/target/linux/ipq40xx/generic/target.mk
+deleted file mode 100644
+index 90c1b762af..0000000000
+--- a/target/linux/ipq40xx/generic/target.mk
++++ /dev/null
+@@ -1,3 +0,0 @@
+-BOARDNAME:=Generic
+-FEATURES+=emmc
+-DEFAULT_PACKAGES += ath10k-board-qca4019
+diff --git a/target/linux/ipq40xx/image/Makefile b/target/linux/ipq40xx/image/Makefile
+deleted file mode 100644
+index 2ba4c779a0..0000000000
+--- a/target/linux/ipq40xx/image/Makefile
++++ /dev/null
+@@ -1,19 +0,0 @@
+-include $(TOPDIR)/rules.mk
+-include $(INCLUDE_DIR)/image.mk
+-
+-define Device/Default
+-	PROFILES := Default
+-	KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts)
+-	KERNEL_LOADADDR := 0x80208000
+-	DEVICE_DTS = $$(SOC)-$(lastword $(subst _, ,$(1)))
+-	DEVICE_DTS_CONFIG := config@1
+-	IMAGES := sysupgrade.bin
+-	IMAGE/sysupgrade.bin = sysupgrade-tar | append-metadata
+-	IMAGE/sysupgrade.bin/squashfs :=
+-	DEVICE_COMPAT_VERSION := 1.1
+-	DEVICE_COMPAT_MESSAGE := Config cannot be migrated from swconfig to DSA
+-endef
+-
+-include $(SUBTARGET).mk
+-
+-$(eval $(call BuildImage))
+diff --git a/target/linux/ipq40xx/image/chromium.mk b/target/linux/ipq40xx/image/chromium.mk
+deleted file mode 100644
+index f6ac69ecf1..0000000000
+--- a/target/linux/ipq40xx/image/chromium.mk
++++ /dev/null
+@@ -1,40 +0,0 @@
+-define Build/cros-gpt
+-	cp $@ $@.tmp 2>/dev/null || true
+-	ptgen -o $@.tmp -g \
+-		-T cros_kernel	-N kernel -p $(CONFIG_TARGET_KERNEL_PARTSIZE)m \
+-				-N rootfs -p $(CONFIG_TARGET_ROOTFS_PARTSIZE)m
+-	cat $@.tmp >> $@
+-	rm $@.tmp
+-endef
+-
+-define Build/append-kernel-part
+-	dd if=$(IMAGE_KERNEL) bs=$(CONFIG_TARGET_KERNEL_PARTSIZE)M conv=sync >> $@
+-endef
+-
+-# NB: Chrome OS bootloaders replace the '%U' in command lines with the UUID of
+-# the kernel partition it chooses to boot from. This gives a flexible way to
+-# consistently build and sign kernels that always use the subsequent
+-# (PARTNROFF=1) partition as their rootfs.
+-define Build/cros-vboot
+-	$(STAGING_DIR_HOST)/bin/cros-vbutil \
+-		-k $@ -c "root=PARTUUID=%U/PARTNROFF=1" -o $@.new
+-	@mv $@.new $@
+-endef
+-
+-define Device/google_wifi
+-	DEVICE_VENDOR := Google
+-	DEVICE_MODEL := WiFi (Gale)
+-	SOC := qcom-ipq4019
+-	KERNEL_SUFFIX := -fit-zImage.itb.vboot
+-	KERNEL = kernel-bin | fit none $$(KDIR)/image-$$(DEVICE_DTS).dtb | cros-vboot
+-	KERNEL_NAME := zImage
+-	IMAGES += factory.bin
+-	IMAGE/factory.bin := cros-gpt | append-kernel-part | append-rootfs
+-	# Note: Chromium/Depthcharge-based bootloaders insert a reserved-memory
+-	# ramoops node into the Device Tree automatically, so we can use
+-	# kmod-ramoops.
+-	DEVICE_PACKAGES := partx-utils mkf2fs e2fsprogs \
+-			   kmod-fs-ext4 kmod-fs-f2fs kmod-google-firmware \
+-			   kmod-ramoops
+-endef
+-TARGET_DEVICES += google_wifi
+diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk
+deleted file mode 100644
+index f15463ae8c..0000000000
+--- a/target/linux/ipq40xx/image/generic.mk
++++ /dev/null
+@@ -1,1209 +0,0 @@
+-
+-DEVICE_VARS += NETGEAR_BOARD_ID NETGEAR_HW_ID
+-DEVICE_VARS += RAS_BOARD RAS_ROOTFS_SIZE RAS_VERSION
+-DEVICE_VARS += WRGG_DEVNAME WRGG_SIGNATURE
+-
+-define Device/FitImage
+-	KERNEL_SUFFIX := -uImage.itb
+-	KERNEL = kernel-bin | gzip | fit gzip $$(KDIR)/image-$$(DEVICE_DTS).dtb
+-	KERNEL_NAME := Image
+-endef
+-
+-define Device/FitImageLzma
+-	KERNEL_SUFFIX := -uImage.itb
+-	KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb
+-	KERNEL_NAME := Image
+-endef
+-
+-define Device/FitzImage
+-	KERNEL_SUFFIX := -zImage.itb
+-	KERNEL = kernel-bin | fit none $$(KDIR)/image-$$(DEVICE_DTS).dtb
+-	KERNEL_NAME := zImage
+-endef
+-
+-define Device/UbiFit
+-	KERNEL_IN_UBI := 1
+-	IMAGES := factory.ubi sysupgrade.bin
+-	IMAGE/factory.ubi := append-ubi
+-	IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+-endef
+-
+-define Device/DniImage
+-	$(call Device/FitzImage)
+-	NETGEAR_BOARD_ID :=
+-	NETGEAR_HW_ID :=
+-	IMAGES += factory.img
+-	IMAGE/factory.img := append-kernel | pad-offset 64k 64 | append-uImage-fakehdr filesystem | append-rootfs | pad-rootfs | netgear-dni
+-	IMAGE/sysupgrade.bin := append-kernel | pad-offset 64k 64 | append-uImage-fakehdr filesystem | \
+-		append-rootfs | pad-rootfs | check-size | append-metadata
+-endef
+-
+-define Build/append-rootfshdr
+-	mkimage -A $(LINUX_KARCH) \
+-		-O linux -T filesystem \
+-		-C lzma -a $(KERNEL_LOADADDR) -e $(if $(KERNEL_ENTRY),$(KERNEL_ENTRY),$(KERNEL_LOADADDR)) \
+-		-n root.squashfs -d $(IMAGE_ROOTFS) $@.new
+-	cat $(IMAGE_KERNEL) > $@.$1
+-	dd if=$@.new bs=64 count=1 >> $@.$1
+-endef
+-
+-define Build/append-rutx-metadata
+-	echo \
+-		'{ \
+-			"device_code": [".*"], \
+-			"hwver": [".*"], \
+-			"batch": [".*"], \
+-			"serial": [".*"], \
+-			"supported_devices":["teltonika,rutx"] \
+-		}' | fwtool -I - $@
+-endef
+-
+-define Build/copy-file
+-	cat "$(1)" > "$@"
+-endef
+-
+-define Build/mkmylofw_32m
+-	$(eval device_id=$(word 1,$(1)))
+-	$(eval revision=$(word 2,$(1)))
+-
+-	let \
+-		size="$$(stat -c%s $@)" \
+-		pad="$(subst k,* 1024,$(BLOCKSIZE))" \
+-		pad="(pad - (size % pad)) % pad" \
+-		newsize='size + pad'; \
+-		$(STAGING_DIR_HOST)/bin/mkmylofw \
+-		-B WPE72 -i 0x11f6:$(device_id):0x11f6:$(device_id) -r $(revision) \
+-		-s 0x2000000 -p0x180000:$$newsize:al:0x80208000:"OpenWrt":$@ \
+-		$@.new
+-	@mv $@.new $@
+-endef
+-
+-define Build/wac5xx-netgear-tar
+-	mkdir $@.tmp
+-	mv $@ $@.tmp/wac5xx-ubifs-root.img
+-	md5sum $@.tmp/wac5xx-ubifs-root.img > $@.tmp/wac5xx-ubifs-root.md5sum
+-	echo "WAC505 WAC510" > $@.tmp/metadata.txt
+-	echo "WAC505_V9.9.9.9" > $@.tmp/version
+-	tar -C $@.tmp/ -cf $@ .
+-	rm -rf $@.tmp
+-endef
+-
+-define Build/qsdk-ipq-factory-nand-askey
+-	$(TOPDIR)/scripts/mkits-qsdk-ipq-image.sh $@.its\
+-		askey_kernel $@.$1 \
+-		askey_fs $(IMAGE_ROOTFS) \
+-		ubifs $@
+-	PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage -f $@.its $@.new
+-	@mv $@.new $@
+-endef
+-
+-define Build/qsdk-ipq-app-gpt
+-	cp $@ $@.tmp 2>/dev/null || true
+-	ptgen -g -o $@.tmp -a 1 -l 1024 \
+-			-t 0x2e -N 0:HLOS -r -p 32M \
+-			-t 0x83 -N rootfs -r -p 128M \
+-				-N rootfs_data -p 512M
+-	cat $@.tmp >> $@
+-	rm $@.tmp
+-endef
+-
+-define Build/SenaoFW
+-	-$(STAGING_DIR_HOST)/bin/mksenaofw \
+-		-n $(BOARD_NAME) -r $(VENDOR_ID) -p $(1) \
+-		-c $(DATECODE) -w $(2) -x $(CW_VER) -t 0 \
+-		-e $@ \
+-		-o $@.new
+-	@cp $@.new $@
+-endef
+-
+-define Build/wrgg-image
+-	mkwrggimg -i $@ \
+-	-o $@.new \
+-	-d "$(WRGG_DEVNAME)" \
+-	-s "$(WRGG_SIGNATURE)" \
+-	-v "" -m "" -B ""
+-	mv $@.new $@
+-endef
+-
+-define Device/8dev_habanero-dvk
+-	$(call Device/FitImageLzma)
+-	DEVICE_VENDOR := 8devices
+-	DEVICE_MODEL := Habanero DVK
+-	IMAGE_SIZE := 30976k
+-	SOC := qcom-ipq4019
+-	IMAGE/sysupgrade.bin := append-kernel | pad-to 64k | append-rootfs | pad-rootfs | check-size | append-metadata
+-endef
+-TARGET_DEVICES += 8dev_habanero-dvk
+-
+-define Device/8dev_jalapeno-common
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	SOC := qcom-ipq4018
+-endef
+-
+-define Device/8dev_jalapeno
+-	$(call Device/8dev_jalapeno-common)
+-	DEVICE_VENDOR := 8devices
+-	DEVICE_MODEL := Jalapeno
+-endef
+-TARGET_DEVICES += 8dev_jalapeno
+-
+-define Device/alfa-network_ap120c-ac
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := ALFA Network
+-	DEVICE_MODEL := AP120C-AC
+-	SOC := qcom-ipq4018
+-	DEVICE_PACKAGES := kmod-usb-acm kmod-tpm-i2c-atmel
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	IMAGE_SIZE := 65536k
+-	IMAGES := factory.bin sysupgrade.bin
+-	IMAGE/factory.bin := append-ubi | qsdk-ipq-factory-nand
+-endef
+-TARGET_DEVICES += alfa-network_ap120c-ac
+-
+-define Device/aruba_glenmorangie
+-	$(call Device/FitImageLzma)
+-	DEVICE_VENDOR := Aruba
+-	SOC := qcom-ipq4029
+-endef
+-
+-define Device/aruba_ap-303
+-	$(call Device/aruba_glenmorangie)
+-	DEVICE_MODEL := AP-303
+-endef
+-TARGET_DEVICES += aruba_ap-303
+-
+-define Device/aruba_ap-303h
+-	$(call Device/aruba_glenmorangie)
+-	DEVICE_MODEL := AP-303H
+-endef
+-TARGET_DEVICES += aruba_ap-303h
+-
+-define Device/aruba_ap-365
+-	$(call Device/aruba_glenmorangie)
+-	DEVICE_MODEL := AP-365
+-	DEVICE_PACKAGES := kmod-hwmon-ad7418
+-endef
+-TARGET_DEVICES += aruba_ap-365
+-
+-define Device/asus_map-ac2200
+-	$(call Device/FitImageLzma)
+-	DEVICE_VENDOR := ASUS
+-	DEVICE_MODEL := Lyra (MAP-AC2200)
+-	SOC := qcom-ipq4019
+-	DEVICE_PACKAGES := ath10k-firmware-qca9888-ct kmod-ath3k
+-endef
+-TARGET_DEVICES += asus_map-ac2200
+-
+-# WARNING: this is an initramfs image that gets you half of the way there
+-#          you need to delete the jffs2 ubi volume and sysupgrade to the final image
+-# to get a "trx" you can flash via web UI for ac42u/ac58u:
+-# - change call Device/FitImageLzma to Device/FitImage
+-# - add the following below UIMAGE_NAME
+-#   UIMAGE_MAGIC := 0x27051956
+-#   IMAGES += factory.trx
+-#   IMAGE/factory.trx := copy-file $(KDIR)/tmp/$$(KERNEL_INITRAMFS_IMAGE) | uImage none
+-define Device/asus_rt-ac42u
+-	$(call Device/FitImageLzma)
+-	DEVICE_VENDOR := ASUS
+-	DEVICE_MODEL := RT-AC42U
+-	DEVICE_ALT0_VENDOR := ASUS
+-	DEVICE_ALT0_MODEL := RT-ACRH17
+-	DEVICE_ALT1_VENDOR := ASUS
+-	DEVICE_ALT1_MODEL := RT-AC2200
+-	SOC := qcom-ipq4019
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	IMAGE_SIZE := 20439364
+-	FILESYSTEMS := squashfs
+-#	RT-AC82U is nowhere to be found online
+-#	Rather, this device is a/k/a RT-AC42U
+-#	But we'll go with what the vendor firmware has...
+-	UIMAGE_NAME:=$(shell echo -e '\03\01\01\01RT-AC82U')
+-	DEVICE_PACKAGES := ath10k-firmware-qca9984-ct kmod-usb-ledtrig-usbport
+-endef
+-TARGET_DEVICES += asus_rt-ac42u
+-
+-define Device/asus_rt-ac58u
+-	$(call Device/FitImageLzma)
+-	DEVICE_VENDOR := ASUS
+-	DEVICE_MODEL := RT-AC58U
+-	DEVICE_ALT0_VENDOR := ASUS
+-	DEVICE_ALT0_MODEL := RT-ACRH13
+-	SOC := qcom-ipq4018
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	IMAGE_SIZE := 20439364
+-	FILESYSTEMS := squashfs
+-#	Someone - in their infinite wisdom - decided to put the firmware
+-#	version in front of the image name \03\00\00\04 => Version 3.0.0.4
+-#	Since u-boot works with strings we either need another fixup step
+-#	to add a version... or we are very careful not to add '\0' into that
+-#	string and call it a day.... Yeah, we do the latter!
+-	UIMAGE_NAME:=$(shell echo -e '\03\01\01\01RT-AC58U')
+-	DEVICE_PACKAGES := -kmod-ath10k-ct kmod-ath10k-ct-smallbuffers \
+-		kmod-usb-ledtrig-usbport
+-endef
+-TARGET_DEVICES += asus_rt-ac58u
+-
+-define Device/avm_fritzbox-4040
+-	$(call Device/FitImageLzma)
+-	DEVICE_VENDOR := AVM
+-	DEVICE_MODEL := FRITZ!Box 4040
+-	SOC := qcom-ipq4018
+-	BOARD_NAME := fritz4040
+-	IMAGE_SIZE := 29056k
+-	UBOOT_PATH := $(STAGING_DIR_IMAGE)/uboot-fritz4040.bin
+-	UBOOT_PARTITION_SIZE := 524288
+-	IMAGES += eva.bin
+-	IMAGE/eva.bin := append-uboot | pad-to $$$$(UBOOT_PARTITION_SIZE) | append-kernel | append-rootfs | pad-rootfs
+-	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | check-size | append-metadata
+-	DEVICE_PACKAGES := fritz-tffs fritz-caldata
+-endef
+-TARGET_DEVICES += avm_fritzbox-4040
+-
+-define Device/avm_fritzbox-7530
+-	$(call Device/FitImageLzma)
+-	DEVICE_VENDOR := AVM
+-	DEVICE_MODEL := FRITZ!Box 7530
+-	DEVICE_ALT0_VENDOR := AVM
+-	DEVICE_ALT0_MODEL := FRITZ!Box 7520
+-	SOC := qcom-ipq4019
+-	DEVICE_PACKAGES := fritz-caldata fritz-tffs-nand ltq-vdsl-vr11-app
+-endef
+-TARGET_DEVICES += avm_fritzbox-7530
+-
+-define Device/avm_fritzrepeater-1200
+-	$(call Device/FitImageLzma)
+-	DEVICE_VENDOR := AVM
+-	DEVICE_MODEL := FRITZ!Repeater 1200
+-	SOC := qcom-ipq4019
+-	DEVICE_PACKAGES := fritz-caldata fritz-tffs-nand
+-endef
+-TARGET_DEVICES += avm_fritzrepeater-1200
+-
+-define Device/avm_fritzrepeater-3000
+-	$(call Device/FitImageLzma)
+-	DEVICE_VENDOR := AVM
+-	DEVICE_MODEL := FRITZ!Repeater 3000
+-	SOC := qcom-ipq4019
+-	DEVICE_PACKAGES := ath10k-firmware-qca9984-ct fritz-caldata fritz-tffs-nand
+-endef
+-TARGET_DEVICES += avm_fritzrepeater-3000
+-
+-define Device/buffalo_wtr-m2133hp
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := Buffalo
+-	DEVICE_MODEL := WTR-M2133HP
+-	SOC := qcom-ipq4019
+-	DEVICE_PACKAGES := ath10k-firmware-qca9984-ct
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-endef
+-TARGET_DEVICES += buffalo_wtr-m2133hp
+-
+-define Device/cellc_rtl30vw
+-	KERNEL_SUFFIX := -zImage.itb
+-	KERNEL_INITRAMFS = kernel-bin | gzip | fit gzip $$(KDIR)/image-$$(DEVICE_DTS).dtb
+-	KERNEL = kernel-bin | fit none $$(KDIR)/image-$$(DEVICE_DTS).dtb | uImage lzma | pad-to 2048
+-	KERNEL_NAME := zImage
+-	KERNEL_IN_UBI :=
+-	IMAGES := factory.bin sysupgrade.bin
+-	IMAGE/factory.bin := append-rootfshdr kernel | append-ubi | qsdk-ipq-factory-nand-askey kernel
+-	IMAGE/sysupgrade.bin := append-rootfshdr kernel | sysupgrade-tar kernel=$$$$@.kernel | append-metadata
+-	DEVICE_VENDOR := Cell C
+-	DEVICE_MODEL := RTL30VW
+-	SOC := qcom-ipq4019
+-	DEVICE_DTS_CONFIG := config@5
+-	KERNEL_INSTALL := 1
+-	KERNEL_SIZE := 4096k
+-	IMAGE_SIZE := 57344k
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	DEVICE_PACKAGES := kmod-usb-net-qmi-wwan kmod-usb-serial-option uqmi
+-endef
+-TARGET_DEVICES += cellc_rtl30vw
+-
+-define Device/cilab_meshpoint-one
+-	$(call Device/8dev_jalapeno-common)
+-	DEVICE_VENDOR := Crisis Innovation Lab
+-	DEVICE_MODEL := MeshPoint.One
+-	DEVICE_PACKAGES += kmod-i2c-gpio kmod-iio-bmp280-i2c kmod-hwmon-ina2xx kmod-rtc-pcf2127
+-endef
+-# Missing DSA Setup
+-#TARGET_DEVICES += cilab_meshpoint-one
+-
+-define Device/compex_wpj419
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := Compex
+-	DEVICE_MODEL := WPJ419
+-	SOC := qcom-ipq4019
+-	DEVICE_DTS_CONFIG := config@12
+-	KERNEL_INSTALL := 1
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	FILESYSTEMS := squashfs
+-endef
+-# Missing DSA Setup
+-#TARGET_DEVICES += compex_wpj419
+-
+-define Device/compex_wpj428
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := Compex
+-	DEVICE_MODEL := WPJ428
+-	SOC := qcom-ipq4028
+-	DEVICE_DTS_CONFIG := config@4
+-	BLOCKSIZE := 64k
+-	IMAGE_SIZE := 31232k
+-	KERNEL_SIZE := 4096k
+-	IMAGES += cpximg-6a04.bin
+-	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
+-	IMAGE/cpximg-6a04.bin := append-kernel | append-rootfs | pad-rootfs | mkmylofw_32m 0x8A2 3
+-	DEVICE_PACKAGES := kmod-gpio-beeper
+-	DEFAULT := n
+-endef
+-TARGET_DEVICES += compex_wpj428
+-
+-define Device/devolo_magic-2-wifi-next
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := devolo
+-	DEVICE_MODEL := Magic 2 WiFi next
+-	SOC := qcom-ipq4018
+-	KERNEL_SIZE := 4096k
+-
+-	# If the bootloader sees 0xDEADC0DE and this trailer at the 64k boundary of a TFTP image
+-	# it will bootm it, just like we want for the initramfs.
+-	KERNEL_INITRAMFS := kernel-bin | gzip | fit gzip $$(KDIR)/image-$$(DEVICE_DTS).dtb | pad-to 64k |\
+-		append-string -e '\xDE\xAD\xC0\xDE{"fl_initramfs":""}\x00'
+-
+-	IMAGE_SIZE := 26624k
+-	IMAGES := sysupgrade.bin
+-	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
+-	DEFAULT := n
+-endef
+-# Missing DSA Setup
+-#TARGET_DEVICES += devolo_magic-2-wifi-next
+-
+-define Device/dlink_dap-2610
+-	$(call Device/FitImageLzma)
+-	DEVICE_VENDOR := D-Link
+-	DEVICE_MODEL := DAP-2610
+-	SOC := qcom-ipq4018
+-	DEVICE_DTS_CONFIG := config@ap.dk01.1-c1
+-	BLOCKSIZE := 64k
+-	WRGG_DEVNAME := /dev/mtdblock/8
+-	WRGG_SIGNATURE := wapac30_dkbs_dap2610
+-	IMAGE_SIZE := 14080k
+-	IMAGES += factory.bin
+-	# Bootloader expects a special 160 byte header which is added by
+-	# wrgg-image.
+-	# Factory image size must be larger than 6MB, and size in wrgg header must
+-	# match actual factory image size to be flashable from D-Link http server.
+-	# Bootloader verifies checksum of wrgg image before booting, thus jffs2
+-	# cannot be part of the wrgg image. This is solved in the factory image by
+-	# having the rootfs at the end of the image (without pad-rootfs). And in
+-	# the sysupgrade image only the kernel is included in the wrgg checksum,
+-	# but this is not flashable from the D-link http server.
+-	# append-rootfs must start on an erase block boundary.
+-	IMAGE/factory.bin    := append-kernel | pad-offset 6144k 160 | append-rootfs | wrgg-image | check-size
+-	IMAGE/sysupgrade.bin := append-kernel | wrgg-image | pad-to $$$$(BLOCKSIZE) | append-rootfs | pad-rootfs | check-size | append-metadata
+-endef
+-TARGET_DEVICES += dlink_dap-2610
+-
+-define Device/edgecore_ecw5211
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := Edgecore
+-	DEVICE_MODEL := ECW5211
+-	SOC := qcom-ipq4018
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	DEVICE_DTS_CONFIG := config@ap.dk01.1-c2
+-	DEVICE_PACKAGES := kmod-tpm-i2c-atmel kmod-usb-acm
+-endef
+-TARGET_DEVICES += edgecore_ecw5211
+-
+-define Device/edgecore_oap100
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := Edgecore
+-	DEVICE_MODEL := OAP100
+-	SOC := qcom-ipq4019
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	IMAGES := sysupgrade.bin
+-	DEVICE_DTS_CONFIG := config@ap.dk07.1-c1
+-	DEVICE_PACKAGES := kmod-usb-acm kmod-usb-net kmod-usb-net-cdc-qmi uqmi
+-endef
+-# Missing DSA Setup
+-#TARGET_DEVICES += edgecore_oap100
+-
+-define Device/engenius_eap1300
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := EnGenius
+-	DEVICE_MODEL := EAP1300
+-	DEVICE_DTS_CONFIG := config@4
+-	BOARD_NAME := eap1300
+-	SOC := qcom-ipq4018
+-	KERNEL_SIZE := 5120k
+-	IMAGE_SIZE := 25344k
+-	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
+-endef
+-# Missing DSA Setup
+-#TARGET_DEVICES += engenius_eap1300
+-
+-define Device/engenius_eap2200
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := EnGenius
+-	DEVICE_MODEL := EAP2200
+-	SOC := qcom-ipq4019
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	DEVICE_PACKAGES := ath10k-firmware-qca9888-ct -kmod-ath10k-ct kmod-ath10k-ct-smallbuffers
+-endef
+-# Missing DSA Setup
+-#TARGET_DEVICES += engenius_eap2200
+-
+-define Device/engenius_emd1
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := EnGenius
+-	DEVICE_MODEL := EMD1
+-	DEVICE_DTS_CONFIG := config@4
+-	SOC := qcom-ipq4018
+-	IMAGE_SIZE := 30720k
+-	IMAGES += factory.bin
+-	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
+-	IMAGE/factory.bin := qsdk-ipq-factory-nor | check-size
+-endef
+-# Missing DSA Setup
+-#TARGET_DEVICES += engenius_emd1
+-
+-define Device/engenius_emr3500
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := EnGenius
+-	DEVICE_MODEL := EMR3500
+-	DEVICE_DTS_CONFIG := config@4
+-	SOC := qcom-ipq4018
+-	KERNEL_SIZE := 4096k
+-	IMAGE_SIZE := 30720k
+-	IMAGES += factory.bin
+-	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
+-	IMAGE/factory.bin := qsdk-ipq-factory-nor | check-size
+-	DEFAULT := n
+-endef
+-# Missing DSA Setup
+-#TARGET_DEVICES += engenius_emr3500
+-
+-define Device/engenius_ens620ext
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := EnGenius
+-	DEVICE_MODEL := ENS620EXT
+-	SOC := qcom-ipq4018
+-	DEVICE_DTS_CONFIG := config@4
+-	BLOCKSIZE := 64k
+-	PAGESIZE := 256
+-	BOARD_NAME := ENS620EXT
+-	VENDOR_ID := 0x0101
+-	PRODUCT_ID := 0x79
+-	PRODUCT_ID_NEW := 0xA4
+-	DATECODE := 190507
+-	FW_VER := 3.1.2
+-	FW_VER_NEW := 3.5.6
+-	CW_VER := 1.8.99
+-	IMAGE_SIZE := 21312k
+-	KERNEL_SIZE := 5120k
+-	FILESYSTEMS := squashfs
+-	IMAGES += factory_30.bin factory_35.bin
+-	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | check-size | append-metadata
+-	IMAGE/factory_30.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | check-size | SenaoFW $$$$(PRODUCT_ID) $$$$(FW_VER)
+-	IMAGE/factory_35.bin := qsdk-ipq-factory-nor | check-size | SenaoFW $$$$(PRODUCT_ID_NEW) $$$$(FW_VER_NEW)
+-endef
+-# Missing DSA Setup
+-#TARGET_DEVICES += engenius_ens620ext
+-
+-define Device/extreme-networks_ws-ap3915i
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := Extreme Networks
+-	DEVICE_MODEL := WS-AP3915i
+-	IMAGE_SIZE := 30080k
+-	SOC := qcom-ipq4029
+-	BLOCKSIZE := 128k
+-	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | check-size | append-metadata
+-endef
+-TARGET_DEVICES += extreme-networks_ws-ap3915i
+-
+-define Device/ezviz_cs-w3-wd1200g-eup
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := EZVIZ
+-	DEVICE_MODEL := CS-W3-WD1200G
+-	DEVICE_VARIANT := EUP
+-	IMAGE_SIZE := 14848k
+-	KERNEL_SIZE = 6m
+-	SOC := qcom-ipq4018
+-	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | \
+-		append-metadata
+-	DEVICE_PACKAGES := -kmod-ath10k-ct kmod-ath10k-ct-smallbuffers
+-	DEVICE_COMPAT_VERSION := 2.0
+-	DEVICE_COMPAT_MESSAGE := uboot's bootcmd has to be updated (see wiki). \
+-		Upgrade via sysupgrade mechanism is not possible.
+-endef
+-TARGET_DEVICES += ezviz_cs-w3-wd1200g-eup
+-
+-define Device/glinet_gl-a1300
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := GL.iNet
+-	DEVICE_MODEL := GL-A1300
+-	SOC := qcom-ipq4018
+-	DEVICE_DTS_CONFIG := config@ap.dk01.1-c2
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	IMAGE_SIZE := 131072k
+-endef
+-TARGET_DEVICES += glinet_gl-a1300
+-
+-define Device/glinet_gl-ap1300
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := GL.iNet
+-	DEVICE_MODEL := GL-AP1300
+-	SOC := qcom-ipq4018
+-	DEVICE_DTS_CONFIG := config@ap.dk01.1-c2
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	IMAGE_SIZE := 131072k
+-	KERNEL_INSTALL := 1
+-	DEVICE_PACKAGES := kmod-usb-net-qmi-wwan kmod-usb-serial-option uqmi
+-endef
+-TARGET_DEVICES += glinet_gl-ap1300
+-
+-define Device/glinet_gl-b1300
+-	$(call Device/FitzImage)
+-	DEVICE_VENDOR := GL.iNet
+-	DEVICE_MODEL := GL-B1300
+-	BOARD_NAME := gl-b1300
+-	SOC := qcom-ipq4029
+-	KERNEL_SIZE := 4096k
+-	IMAGE_SIZE := 26624k
+-	IMAGE/sysupgrade.bin := append-kernel |append-rootfs | pad-rootfs | append-metadata
+-endef
+-TARGET_DEVICES += glinet_gl-b1300
+-
+-define Device/glinet_gl-b2200
+-	$(call Device/FitzImage)
+-	DEVICE_VENDOR := GL.iNet
+-	DEVICE_MODEL := GL-B2200
+-	SOC := qcom-ipq4019
+-	DEVICE_DTS_CONFIG := config@ap.dk04.1-c3
+-	KERNEL_INITRAMFS_SUFFIX := -recovery.itb
+-	IMAGES := emmc.img.gz sysupgrade.bin
+-	IMAGE/emmc.img.gz := qsdk-ipq-app-gpt |\
+-		pad-to 1024k | append-kernel |\
+-		pad-to 33792k | append-rootfs |\
+-		append-metadata | gzip
+-	IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+-	DEVICE_PACKAGES := ath10k-firmware-qca9888-ct \
+-		kmod-fs-ext4 kmod-mmc kmod-spi-dev mkf2fs e2fsprogs kmod-fs-f2fs
+-endef
+-TARGET_DEVICES += glinet_gl-b2200
+-
+-define Device/glinet_gl-s1300
+-	$(call Device/FitzImage)
+-	DEVICE_VENDOR := GL.iNet
+-	DEVICE_MODEL := GL-S1300
+-	SOC := qcom-ipq4029
+-	KERNEL_SIZE := 4096k
+-	IMAGE_SIZE := 26624k
+-	IMAGES := sysupgrade.bin
+-	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
+-	DEVICE_PACKAGES := kmod-fs-ext4 kmod-mmc kmod-spi-dev
+-endef
+-# Missing DSA Setup
+-#TARGET_DEVICES += glinet_gl-s1300
+-
+-define Device/kernel-size-6350-8300
+-	DEVICE_COMPAT_VERSION := 2.0
+-	DEVICE_COMPAT_MESSAGE := Kernel partition size must be increased for \
+-	this OpenWrt version. Before continuing, you MUST issue either the \
+-	command "fw_setenv kernsize 500000" from the OpenWrt command line, \
+-	or "setenv kernsize 500000 ; saveenv" from the U-Boot serial console. \
+-	Instead of the sysupgrade image, you must then install the OpenWrt \
+-	factory image, setting the force flag and wiping the configuration. \
+-	(e.g. "sysupgrade -n -F openwrt-squashfs-factory.bin" on command line)
+-endef
+-
+-define Device/linksys_ea6350v3
+-	# The Linksys EA6350v3 has a uboot bootloader that does not
+-	# support either booting lzma kernel images nor booting UBI
+-	# partitions. This uboot, however, supports raw kernel images and
+-	# gzipped images.
+-	#
+-	# As configured by the OEM factory, the device will boot the kernel
+-	# from a fixed address with a fixed length of 3 MiB. Also, the
+-	# device has a hard-coded kernel command line that requires the
+-	# rootfs and alt_rootfs to be in mtd11 and mtd13 respectively.
+-	# Oh... and the kernel partition overlaps with the rootfs
+-	# partition (the same for alt_kernel and alt_rootfs).
+-	#
+-	# If you are planing re-partitioning the device, you may want to
+-	# keep these details in mind:
+-	# 1. The kernel addresses you should honor are 0x00000000 and
+-	#    0x02800000 respectively.
+-	# 2. The kernel size (plus the dtb) cannot exceed 3 MiB in size
+-	#    unless the uboot environment variable "kernsize" is increased.
+-	# 3. You can use 'zImage', but not a raw 'Image' packed with lzma.
+-	# 4. The kernel command line from uboot is harcoded to boot with
+-	#    rootfs either in mtd11 or mtd13.
+-	$(call Device/FitzImage)
+-	$(call Device/kernel-size-6350-8300)
+-	DEVICE_VENDOR := Linksys
+-	DEVICE_MODEL := EA6350
+-	DEVICE_VARIANT := v3
+-	SOC := qcom-ipq4018
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	KERNEL_SIZE := 5120k
+-	IMAGE_SIZE := 35840k
+-	UBINIZE_OPTS := -E 5
+-	IMAGES += factory.bin
+-	IMAGE/factory.bin := append-kernel | append-uImage-fakehdr filesystem | pad-to $$$$(KERNEL_SIZE) | append-ubi | linksys-image type=EA6350v3
+-endef
+-TARGET_DEVICES += linksys_ea6350v3
+-
+-define Device/linksys_ea8300
+-	$(call Device/FitzImage)
+-	$(call Device/kernel-size-6350-8300)
+-	DEVICE_VENDOR := Linksys
+-	DEVICE_MODEL := EA8300
+-	SOC := qcom-ipq4019
+-	KERNEL_SIZE := 5120k
+-	IMAGE_SIZE := 84992k
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	UBINIZE_OPTS := -E 5    # EOD marks to "hide" factory sig at EOF
+-	IMAGES += factory.bin
+-	IMAGE/factory.bin  := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi | linksys-image type=EA8300
+-	DEVICE_PACKAGES := ath10k-firmware-qca9888-ct kmod-usb-ledtrig-usbport
+-endef
+-TARGET_DEVICES += linksys_ea8300
+-
+-define Device/linksys_mr8300
+-	$(call Device/FitzImage)
+-	$(call Device/kernel-size-6350-8300)
+-	DEVICE_VENDOR := Linksys
+-	DEVICE_MODEL := MR8300
+-	SOC := qcom-ipq4019
+-	KERNEL_SIZE := 5120k
+-	IMAGE_SIZE := 84992k
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	UBINIZE_OPTS := -E 5    # EOD marks to "hide" factory sig at EOF
+-	IMAGES += factory.bin
+-	IMAGE/factory.bin  := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi | linksys-image type=MR8300
+-	DEVICE_PACKAGES := ath10k-firmware-qca9888-ct kmod-usb-ledtrig-usbport
+-endef
+-TARGET_DEVICES += linksys_mr8300
+-
+-define Device/linksys_whw03v2
+-	$(call Device/FitzImage)
+-	DEVICE_VENDOR := Linksys
+-	DEVICE_MODEL := WHW03
+-	DEVICE_VARIANT := V2
+-	SOC := qcom-ipq4019
+-	KERNEL_SIZE := 6144k
+-	IMAGE_SIZE := 158720k
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	UBINIZE_OPTS := -E 5    # EOD marks to "hide" factory sig at EOF
+-	IMAGES += factory.bin
+-	IMAGE/factory.bin  := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi | linksys-image type=WHW03v2
+-	DEVICE_PACKAGES := ath10k-firmware-qca9888-ct kmod-leds-pca963x kmod-spi-dev kmod-bluetooth
+-endef
+-TARGET_DEVICES += linksys_whw03v2
+-
+-define Device/linksys_whw01
+-	$(call Device/FitzImage)
+-	DEVICE_VENDOR := Linksys
+-	DEVICE_MODEL := WHW01
+-	KERNEL_SIZE := 6144k
+-	IMAGE_SIZE := 75776K
+-	SOC := qcom-ipq4018
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	UBINIZE_OPTS := -E 5    # EOD marks to "hide" factory sig at EOF
+-	IMAGES += factory.bin
+-	IMAGE/factory.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi | linksys-image type=WHW01
+-	DEVICE_PACKAGES := uboot-envtools kmod-leds-pca963x
+-endef
+-TARGET_DEVICES += linksys_whw01
+-
+-define Device/luma_wrtq-329acn
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := Luma Home
+-	DEVICE_MODEL := WRTQ-329ACN
+-	SOC := qcom-ipq4018
+-	DEVICE_PACKAGES := kmod-ath3k kmod-eeprom-at24 kmod-i2c-gpio
+-	IMAGE_SIZE := 76632k
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-endef
+-TARGET_DEVICES += luma_wrtq-329acn
+-
+-define Device/meraki_mr33
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := Cisco Meraki
+-	DEVICE_MODEL := MR33
+-	SOC := qcom-ipq4029
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	DEVICE_PACKAGES := -swconfig ath10k-firmware-qca9887-ct
+-	DEFAULT := n
+-endef
+-TARGET_DEVICES += meraki_mr33
+-
+-define Device/meraki_mr74
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := Cisco Meraki
+-	DEVICE_MODEL := MR74
+-	SOC := qcom-ipq4029
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	DEVICE_PACKAGES := -swconfig ath10k-firmware-qca9887-ct
+-	DEVICE_DTS_CONFIG := config@3
+-	DEFAULT := n
+-endef
+-TARGET_DEVICES += meraki_mr74
+-
+-define Device/mobipromo_cm520-79f
+-	$(call Device/FitzImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := MobiPromo
+-	DEVICE_MODEL := CM520-79F
+-	SOC := qcom-ipq4019
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	DEVICE_PACKAGES := kmod-usb-ledtrig-usbport
+-endef
+-TARGET_DEVICES += mobipromo_cm520-79f
+-
+-define Device/netgear_ex61x0v2
+-	$(call Device/DniImage)
+-	DEVICE_VENDOR := NETGEAR
+-	DEVICE_DTS_CONFIG := config@4
+-	NETGEAR_BOARD_ID := EX6150v2series
+-	NETGEAR_HW_ID := 29765285+16+0+128+2x2
+-	IMAGE_SIZE := 14400k
+-	SOC := qcom-ipq4018
+-endef
+-
+-define Device/netgear_ex6100v2
+-	$(call Device/netgear_ex61x0v2)
+-	DEVICE_MODEL := EX6100
+-	DEVICE_VARIANT := v2
+-endef
+-TARGET_DEVICES += netgear_ex6100v2
+-
+-define Device/netgear_ex6150v2
+-	$(call Device/netgear_ex61x0v2)
+-	DEVICE_MODEL := EX6150
+-	DEVICE_VARIANT := v2
+-endef
+-TARGET_DEVICES += netgear_ex6150v2
+-
+-define Device/netgear_orbi
+-	$(call Device/DniImage)
+-	SOC := qcom-ipq4019
+-	DEVICE_VENDOR := NETGEAR
+-	IMAGE/factory.img := append-kernel | pad-offset 128k 64 | \
+-		append-uImage-fakehdr filesystem | pad-to $$$$(KERNEL_SIZE) | \
+-		append-rootfs | pad-rootfs | netgear-dni
+-	IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-to 64k | \
+-		sysupgrade-tar rootfs=$$$$@ | append-metadata
+-	DEVICE_PACKAGES := ath10k-firmware-qca9984-ct e2fsprogs kmod-fs-ext4 losetup
+-endef
+-
+-define Device/netgear_rbx50
+-	$(call Device/netgear_orbi)
+-	NETGEAR_HW_ID := 29765352+0+4000+512+2x2+2x2+4x4
+-	KERNEL_SIZE := 3932160
+-	ROOTFS_SIZE := 32243712
+-	IMAGE_SIZE := 36175872
+-endef
+-
+-define Device/netgear_rbr50
+-	$(call Device/netgear_rbx50)
+-	DEVICE_MODEL := RBR50
+-	DEVICE_VARIANT := v1
+-	NETGEAR_BOARD_ID := RBR50
+-endef
+-TARGET_DEVICES += netgear_rbr50
+-
+-define Device/netgear_rbs50
+-	$(call Device/netgear_rbx50)
+-	DEVICE_MODEL := RBS50
+-	DEVICE_VARIANT := v1
+-	NETGEAR_BOARD_ID := RBS50
+-endef
+-TARGET_DEVICES += netgear_rbs50
+-
+-define Device/netgear_srx60
+-	$(call Device/netgear_orbi)
+-	NETGEAR_HW_ID := 29765352+0+4096+512+2x2+2x2+4x4
+-	KERNEL_SIZE := 3932160
+-	ROOTFS_SIZE := 32243712
+-	IMAGE_SIZE := 36175872
+-endef
+-
+-define Device/netgear_srr60
+-	$(call Device/netgear_srx60)
+-	DEVICE_MODEL := SRR60
+-	NETGEAR_BOARD_ID := SRR60
+-endef
+-TARGET_DEVICES += netgear_srr60
+-
+-define Device/netgear_srs60
+-	$(call Device/netgear_srx60)
+-	DEVICE_MODEL := SRS60
+-	NETGEAR_BOARD_ID := SRS60
+-endef
+-TARGET_DEVICES += netgear_srs60
+-
+-define Device/netgear_wac510
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := Netgear
+-	DEVICE_MODEL := WAC510
+-	SOC := qcom-ipq4018
+-	DEVICE_DTS_CONFIG := config@5
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	IMAGES += factory.tar
+-	IMAGE/factory.tar := append-ubi | wac5xx-netgear-tar
+-	DEVICE_PACKAGES := uboot-envtools
+-endef
+-TARGET_DEVICES += netgear_wac510
+-
+-define Device/openmesh_a42
+-	$(call Device/FitImageLzma)
+-	DEVICE_VENDOR := OpenMesh
+-	DEVICE_MODEL := A42
+-	SOC := qcom-ipq4018
+-	DEVICE_DTS_CONFIG := config@om.a42
+-	BLOCKSIZE := 64k
+-	KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb | pad-to $$(BLOCKSIZE)
+-	IMAGE_SIZE := 15616k
+-	IMAGES += factory.bin
+-	IMAGE/factory.bin := append-rootfs | pad-rootfs | openmesh-image ce_type=A42
+-	IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | sysupgrade-tar rootfs=$$$$@ | append-metadata
+-endef
+-TARGET_DEVICES += openmesh_a42
+-
+-define Device/openmesh_a62
+-	$(call Device/FitImageLzma)
+-	DEVICE_VENDOR := OpenMesh
+-	DEVICE_MODEL := A62
+-	SOC := qcom-ipq4019
+-	DEVICE_DTS_CONFIG := config@om.a62
+-	BLOCKSIZE := 64k
+-	KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb | pad-to $$(BLOCKSIZE)
+-	IMAGE_SIZE := 15552k
+-	IMAGES += factory.bin
+-	IMAGE/factory.bin := append-rootfs | pad-rootfs | openmesh-image ce_type=A62
+-	IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | sysupgrade-tar rootfs=$$$$@ | append-metadata
+-	DEVICE_PACKAGES := ath10k-firmware-qca9888-ct
+-endef
+-TARGET_DEVICES += openmesh_a62
+-
+-define Device/p2w_r619ac
+-	$(call Device/FitzImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := P&W
+-	DEVICE_MODEL := R619AC
+-	SOC := qcom-ipq4019
+-	DEVICE_DTS_CONFIG := config@10
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-endef
+-
+-define Device/p2w_r619ac-64m
+-	$(call Device/p2w_r619ac)
+-	DEVICE_VARIANT := 64M NAND
+-	IMAGES += factory.bin
+-	IMAGE/factory.bin := append-ubi | qsdk-ipq-factory-nand
+-endef
+-TARGET_DEVICES += p2w_r619ac-64m
+-
+-define Device/p2w_r619ac-128m
+-	$(call Device/p2w_r619ac)
+-	DEVICE_VARIANT := 128M NAND
+-endef
+-TARGET_DEVICES += p2w_r619ac-128m
+-
+-define Device/pakedge_wr-1
+-	$(call Device/FitImageLzma)
+-	DEVICE_VENDOR := Pakedge
+-	DEVICE_MODEL := WR-1
+-	DEVICE_DTS_CONFIG := config@ap.dk01.1-c1
+-	SOC := qcom-ipq4018
+-	BLOCKSIZE := 64k
+-	IMAGE_SIZE := 31232k
+-	IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(BLOCKSIZE) | append-rootfs | pad-rootfs | append-metadata
+-endef
+-TARGET_DEVICES += pakedge_wr-1
+-
+-define Device/plasmacloud_pa1200
+-	$(call Device/FitImageLzma)
+-	DEVICE_VENDOR := Plasma Cloud
+-	DEVICE_MODEL := PA1200
+-	SOC := qcom-ipq4018
+-	DEVICE_DTS_CONFIG := config@pc.pa1200
+-	BLOCKSIZE := 64k
+-	KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb | pad-to $$(BLOCKSIZE)
+-	IMAGE_SIZE := 15616k
+-	IMAGES += factory.bin
+-	IMAGE/factory.bin := append-rootfs | pad-rootfs | openmesh-image ce_type=PA1200
+-	IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | sysupgrade-tar rootfs=$$$$@ | append-metadata
+-endef
+-TARGET_DEVICES += plasmacloud_pa1200
+-
+-define Device/plasmacloud_pa2200
+-	$(call Device/FitImageLzma)
+-	DEVICE_VENDOR := Plasma Cloud
+-	DEVICE_MODEL := PA2200
+-	SOC := qcom-ipq4019
+-	DEVICE_DTS_CONFIG := config@pc.pa2200
+-	BLOCKSIZE := 64k
+-	KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb | pad-to $$(BLOCKSIZE)
+-	IMAGE_SIZE := 15552k
+-	IMAGES += factory.bin
+-	IMAGE/factory.bin := append-rootfs | pad-rootfs | openmesh-image ce_type=PA2200
+-	IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | sysupgrade-tar rootfs=$$$$@ | append-metadata
+-	DEVICE_PACKAGES := ath10k-firmware-qca9888-ct
+-endef
+-TARGET_DEVICES += plasmacloud_pa2200
+-
+-define Device/qcom_ap-dk01.1-c1
+-	DEVICE_VENDOR := Qualcomm Atheros
+-	DEVICE_MODEL := AP-DK01.1
+-	DEVICE_VARIANT := C1
+-	BOARD_NAME := ap-dk01.1-c1
+-	SOC := qcom-ipq4019
+-	DEVICE_DTS := qcom-ipq4019-ap.dk01.1-c1
+-	KERNEL_INSTALL := 1
+-	KERNEL_SIZE := 4096k
+-	IMAGE_SIZE := 26624k
+-	$(call Device/FitImage)
+-	IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | append-metadata
+-	DEFAULT := n
+-endef
+-TARGET_DEVICES += qcom_ap-dk01.1-c1
+-
+-define Device/qcom_ap-dk04.1-c1
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := Qualcomm Atheros
+-	DEVICE_MODEL := AP-DK04.1
+-	DEVICE_VARIANT := C1
+-	SOC := qcom-ipq4019
+-	DEVICE_DTS := qcom-ipq4019-ap.dk04.1-c1
+-	KERNEL_INSTALL := 1
+-	KERNEL_SIZE := 4048k
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	BOARD_NAME := ap-dk04.1-c1
+-	DEFAULT := n
+-endef
+-TARGET_DEVICES += qcom_ap-dk04.1-c1
+-
+-define Device/qxwlan_e2600ac-c1
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := Qxwlan
+-	DEVICE_MODEL := E2600AC
+-	DEVICE_VARIANT := C1
+-	BOARD_NAME := e2600ac-c1
+-	SOC := qcom-ipq4019
+-	IMAGE_SIZE := 31232k
+-	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
+-endef
+-TARGET_DEVICES += qxwlan_e2600ac-c1
+-
+-define Device/qxwlan_e2600ac-c2
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := Qxwlan
+-	DEVICE_MODEL := E2600AC
+-	DEVICE_VARIANT := C2
+-	SOC := qcom-ipq4019
+-	KERNEL_INSTALL := 1
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-endef
+-TARGET_DEVICES += qxwlan_e2600ac-c2
+-
+-define Device/sony_ncp-hg100-cellular
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := Sony
+-	DEVICE_MODEL := NCP-HG100/Cellular
+-	DEVICE_DTS_CONFIG := config@ap.dk04.1-c4
+-	SOC := qcom-ipq4019
+-	KERNEL_SIZE := 8192k
+-	IMAGE_SIZE := 128m
+-	DEVICE_PACKAGES := e2fsprogs kmod-fs-ext4 uqmi
+-endef
+-TARGET_DEVICES += sony_ncp-hg100-cellular
+-
+-define Device/teltonika_rutx10
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := Teltonika
+-	DEVICE_MODEL := RUTX10
+-	SOC := qcom-ipq4018
+-	DEVICE_DTS_CONFIG := config@5
+-	KERNEL_INSTALL := 1
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	FILESYSTEMS := squashfs
+-	IMAGE/factory.ubi := append-ubi | qsdk-ipq-factory-nand | append-rutx-metadata
+-	DEVICE_PACKAGES := kmod-bluetooth
+-endef
+-# Missing DSA Setup
+-#TARGET_DEVICES += teltonika_rutx10
+-
+-define Device/tel_x1pro
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := Telco
+-	DEVICE_MODEL := X1 Pro
+-	SOC := qcom-ipq4019
+-	KERNEL_SIZE := 4096k
+-	IMAGE_SIZE := 31232k
+-	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
+-	DEVICE_PACKAGES := kmod-usb-net-qmi-wwan kmod-usb-serial-option uqmi
+-	DEFAULT := n
+-endef
+-# Missing DSA Setup
+-#TARGET_DEVICES += tel_x1pro
+-
+-define Device/unielec_u4019-32m
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := Unielec
+-	DEVICE_MODEL := U4019
+-	DEVICE_VARIANT := 32M
+-	BOARD_NAME := u4019-32m
+-	SOC := qcom-ipq4019
+-	KERNEL_SIZE := 4096k
+-	IMAGE_SIZE := 31232k
+-	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
+-	DEFAULT := n
+-endef
+-# Missing DSA Setup
+-#TARGET_DEVICES += unielec_u4019-32m
+-
+-define Device/wallys_dr40x9
+-	$(call Device/FitImage)
+-	$(call Device/UbiFit)
+-	DEVICE_VENDOR := Wallys
+-	DEVICE_MODEL := DR40X9
+-	SOC := qcom-ipq40x9
+-	DEVICE_DTS_CONFIG := config@ap.dk07.1-c1
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	DEVICE_PACKAGES := ipq-wifi-wallys_dr40x9
+-endef
+-TARGET_DEVICES += wallys_dr40x9
+-
+-define Device/zte_mf18a
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := ZTE
+-	DEVICE_MODEL := MF18A
+-	SOC := qcom-ipq4019
+-	DEVICE_DTS_CONFIG := config@ap.dk04.1-c1
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	KERNEL_IN_UBI := 1
+-	DEVICE_PACKAGES := ath10k-firmware-qca99x0-ct
+-endef
+-TARGET_DEVICES += zte_mf18a
+-
+-define Device/zte_mf28x_common
+-	$(call Device/FitzImage)
+-	DEVICE_VENDOR := ZTE
+-	SOC := qcom-ipq4019
+-	DEVICE_DTS_CONFIG := config@ap.dk04.1-c1
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	KERNEL_IN_UBI := 1
+-	DEVICE_PACKAGES := kmod-usb-net-qmi-wwan kmod-usb-serial-option uqmi
+-endef
+-
+-define Device/zte_mf286d
+-	$(call Device/zte_mf28x_common)
+-	DEVICE_MODEL := MF286D
+-endef
+-TARGET_DEVICES += zte_mf286d
+-
+-define Device/zte_mf287plus
+-	$(call Device/zte_mf28x_common)
+-	DEVICE_DTS_CONFIG := config@ap.dk01.1-c2
+-	DEVICE_MODEL := MF287Plus
+-	DEVICE_ALT0_VENDOR := ZTE
+-	DEVICE_ALT0_MODEL := MF287
+-	DEVICE_PACKAGES += ipq-wifi-zte_mf287plus
+-	SOC := qcom-ipq4018
+-#	The recovery image is used to return back to stock (an initramfs-based image
+-#	that can be flashed to the device via sysupgrade
+-#	The factory image is used to install from the stock firmware by using an
+-#	exploit for the web interface
+-	IMAGES += factory.bin recovery.bin
+-	IMAGE/factory.bin  := append-ubi
+-	IMAGE/recovery.bin := append-squashfs4-fakeroot | sysupgrade-tar kernel=$$$$(BIN_DIR)/openwrt-$$(BOARD)$$(if $$(SUBTARGET),-$$(SUBTARGET))-$$(DEVICE_NAME)-initramfs-zImage.itb rootfs=$$$$@ | append-metadata
+-endef
+-TARGET_DEVICES += zte_mf287plus
+-
+-define Device/zte_mf289f
+-	$(call Device/zte_mf28x_common)
+-	DEVICE_MODEL := MF289F
+-	DEVICE_PACKAGES += ipq-wifi-zte_mf289f ath10k-firmware-qca9984-ct
+-endef
+-TARGET_DEVICES += zte_mf289f
+-
+-define Device/zyxel_nbg6617
+-	$(call Device/FitImageLzma)
+-	DEVICE_VENDOR := ZyXEL
+-	DEVICE_MODEL := NBG6617
+-	SOC := qcom-ipq4018
+-	KERNEL_SIZE := 4096k
+-	ROOTFS_SIZE := 24960k
+-	RAS_BOARD := NBG6617
+-	RAS_ROOTFS_SIZE := 19840k
+-	RAS_VERSION := "$(VERSION_DIST) $(REVISION)"
+-	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
+-	IMAGES += factory.bin
+-#	The ZyXEL firmware allows flashing thru the web-gui only when the rootfs is
+-#	at least as large as the one of the initial firmware image (not the current
+-#	one on the device). This only applies to the Web-UI, the bootlaoder ignores
+-#	this minimum-size. However, the larger image can be flashed both ways.
+-	IMAGE/factory.bin := append-rootfs | pad-rootfs | pad-to 64k | check-size $$$$(ROOTFS_SIZE) | zyxel-ras-image separate-kernel
+-	IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | check-size $$$$(ROOTFS_SIZE) | sysupgrade-tar rootfs=$$$$@ | append-metadata
+-	DEVICE_PACKAGES := kmod-usb-ledtrig-usbport
+-endef
+-TARGET_DEVICES += zyxel_nbg6617
+-
+-define Device/zyxel_wre6606
+-	$(call Device/FitImage)
+-	DEVICE_VENDOR := ZyXEL
+-	DEVICE_MODEL := WRE6606
+-	DEVICE_DTS_CONFIG := config@4
+-	SOC := qcom-ipq4018
+-	IMAGE_SIZE := 13184k
+-	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | check-size | append-metadata
+-	DEVICE_PACKAGES := -kmod-ath10k-ct kmod-ath10k-ct-smallbuffers
+-endef
+-# Missing DSA Setup
+-#TARGET_DEVICES += zyxel_wre6606
+diff --git a/target/linux/ipq40xx/image/mikrotik.mk b/target/linux/ipq40xx/image/mikrotik.mk
+deleted file mode 100644
+index f0e1f1aad3..0000000000
+--- a/target/linux/ipq40xx/image/mikrotik.mk
++++ /dev/null
+@@ -1,100 +0,0 @@
+-define Device/mikrotik_nor
+-	DEVICE_VENDOR := MikroTik
+-	BLOCKSIZE := 64k
+-	IMAGE_SIZE := 16128k
+-	KERNEL_NAME := vmlinux
+-	KERNEL := kernel-bin | append-dtb-elf
+-	IMAGES = sysupgrade.bin
+-	IMAGE/sysupgrade.bin := append-kernel | kernel2minor -s 1024 | \
+-		pad-to $$$$(BLOCKSIZE) | append-rootfs | pad-rootfs | \
+-		check-size | append-metadata
+-endef
+-
+-define Device/mikrotik_nand
+-	DEVICE_VENDOR := MikroTik
+-	KERNEL_NAME := vmlinux
+-	KERNEL_INITRAMFS := kernel-bin | append-dtb-elf
+-	KERNEL := kernel-bin | append-dtb-elf | package-kernel-ubifs | \
+-		ubinize-kernel
+-	IMAGES := sysupgrade.bin
+-	IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+-endef
+-
+-define Device/mikrotik_cap-ac
+-	$(call Device/mikrotik_nor)
+-	DEVICE_MODEL := cAP ac
+-	SOC := qcom-ipq4018
+-	DEVICE_PACKAGES := -kmod-ath10k-ct kmod-ath10k-ct-smallbuffers
+-endef
+-TARGET_DEVICES += mikrotik_cap-ac
+-
+-define Device/mikrotik_hap-ac2
+-	$(call Device/mikrotik_nor)
+-	DEVICE_MODEL := hAP ac2
+-	SOC := qcom-ipq4018
+-	DEVICE_PACKAGES := -kmod-ath10k-ct kmod-ath10k-ct-smallbuffers
+-endef
+-TARGET_DEVICES += mikrotik_hap-ac2
+-
+-define Device/mikrotik_hap-ac3
+-	$(call Device/mikrotik_nand)
+-	DEVICE_MODEL := hAP ac3
+-	SOC := qcom-ipq4019
+-	BLOCKSIZE := 128k
+-	PAGESIZE := 2048
+-	KERNEL_UBIFS_OPTS = -m $$(PAGESIZE) -e 124KiB -c $$(PAGESIZE) -x none
+-	DEVICE_PACKAGES := kmod-ledtrig-gpio
+-endef
+-TARGET_DEVICES += mikrotik_hap-ac3
+-
+-define Device/mikrotik_hap-ac3-lte6-kit
+-        $(call Device/mikrotik_nor)
+-        DEVICE_MODEL := hAP ac3 LTE6 kit
+-        SOC := qcom-ipq4019
+-        DEVICE_PACKAGES := kmod-ledtrig-gpio kmod-usb-acm kmod-usb-net-rndis
+-endef
+-TARGET_DEVICES += mikrotik_hap-ac3-lte6-kit
+-
+-define Device/mikrotik_lhgg-60ad
+-	$(call Device/mikrotik_nor)
+-	DEVICE_MODEL := Wireless Wire Dish LHGG-60ad
+-	DEVICE_DTS := qcom-ipq4019-lhgg-60ad
+-	DEVICE_PACKAGES += -kmod-ath10k-ct -ath10k-firmware-qca4019-ct kmod-wil6210
+-endef
+-TARGET_DEVICES += mikrotik_lhgg-60ad
+-
+-define Device/mikrotik_sxtsq-5-ac
+-	$(call Device/mikrotik_nor)
+-	DEVICE_MODEL := SXTsq 5 ac (RBSXTsqG-5acD)
+-	SOC := qcom-ipq4018
+-	DEVICE_PACKAGES := rssileds
+-endef
+-TARGET_DEVICES += mikrotik_sxtsq-5-ac
+-
+-define Device/mikrotik_wap-ac
+-	$(call Device/mikrotik_nor)
+-	DEVICE_MODEL := wAP ac
+-	SOC := qcom-ipq4018
+-	DEVICE_PACKAGES := -kmod-ath10k-ct kmod-ath10k-ct-smallbuffers
+-endef
+-TARGET_DEVICES += mikrotik_wap-ac
+-
+-define Device/mikrotik_wap-r-ac
+-	$(call Device/mikrotik_wap-ac)
+-	DEVICE_MODEL := wAP R ac
+-	DEVICE_PACKAGES := kmod-usb-net-qmi-wwan kmod-usb-serial-option uqmi \
+-		kmod-usb-acm kmod-usb-net-rndis
+-	DEVICE_DTS := qcom-ipq4018-wap-r-ac
+-endef
+-TARGET_DEVICES += mikrotik_wap-r-ac
+-
+-define Device/mikrotik_wap-ac-lte
+-	$(call Device/mikrotik_wap-ac)
+-	DEVICE_MODEL := wAP ac LTE
+-	DEVICE_PACKAGES := kmod-usb-net-qmi-wwan kmod-usb-serial-option uqmi \
+-		kmod-usb-acm kmod-usb-net-rndis
+-	DEVICE_DTS := qcom-ipq4018-wap-ac-lte
+-	DEVICE_ALT0_VENDOR = Mikrotik
+-	DEVICE_ALT0_MODEL := wAP ac LTE6
+-endef
+-TARGET_DEVICES += mikrotik_wap-ac-lte
+diff --git a/target/linux/ipq40xx/mikrotik/config-default b/target/linux/ipq40xx/mikrotik/config-default
+deleted file mode 100644
+index 1268d2c810..0000000000
+--- a/target/linux/ipq40xx/mikrotik/config-default
++++ /dev/null
+@@ -1,5 +0,0 @@
+-CONFIG_MIKROTIK=y
+-CONFIG_MIKROTIK_RB_SYSFS=y
+-CONFIG_MTD_ROUTERBOOT_PARTS=y
+-CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y
+-CONFIG_MTD_SPLIT_MINOR_FW=y
+diff --git a/target/linux/ipq40xx/mikrotik/target.mk b/target/linux/ipq40xx/mikrotik/target.mk
+deleted file mode 100644
+index 4530a90985..0000000000
+--- a/target/linux/ipq40xx/mikrotik/target.mk
++++ /dev/null
+@@ -1,4 +0,0 @@
+-BOARDNAME:=MikroTik
+-FEATURES += minor
+-KERNEL_IMAGES:=vmlinux
+-IMAGES_DIR:=compressed
+diff --git a/target/linux/ipq40xx/patches-5.15/104-clk-fix-apss-cpu-overclocking.patch b/target/linux/ipq40xx/patches-5.15/104-clk-fix-apss-cpu-overclocking.patch
+deleted file mode 100644
+index 2de03f7ae0..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/104-clk-fix-apss-cpu-overclocking.patch
++++ /dev/null
+@@ -1,115 +0,0 @@
+-From f2b87dc1028b710ec8ce25808b9d21f92b376184 Mon Sep 17 00:00:00 2001
+-From: Christian Lamparter <chunkeey@googlemail.com>
+-Date: Sun, 11 Mar 2018 14:41:31 +0100
+-Subject: [PATCH 2/2] clk: fix apss cpu overclocking
+-
+-There's an interaction issue between the clk changes:"
+-clk: qcom: ipq4019: Add the apss cpu pll divider clock node
+-clk: qcom: ipq4019: remove fixed clocks and add pll clocks
+-" and the cpufreq-dt.
+-
+-cpufreq-dt is now spamming the kernel-log with the following:
+-
+-[ 1099.190658] cpu cpu0: dev_pm_opp_set_rate: failed to find current OPP
+-for freq 761142857 (-34)
+-
+-This only happens on certain devices like the Compex WPJ428
+-and AVM FritzBox!4040. However, other devices like the Asus
+-RT-AC58U and Meraki MR33 work just fine.
+-
+-The issue stem from the fact that all higher CPU-Clocks
+-are achieved by switching the clock-parent to the P_DDRPLLAPSS
+-(ddrpllapss). Which is set by Qualcomm's proprietary bootcode
+-as part of the DDR calibration.
+-
+-For example, the FB4040 uses 256 MiB Nanya NT5CC128M16IP clocked
+-at round 533 MHz (ddrpllsdcc = 190285714 Hz).
+-
+-whereas the 128 MiB Nanya NT5CC64M16GP-DI in the ASUS RT-AC58U is
+-clocked at a slightly higher 537 MHz ( ddrpllsdcc = 192000000 Hz).
+-
+-This patch attempts to fix the issue by modifying
+-clk_cpu_div_round_rate(), clk_cpu_div_set_rate(), clk_cpu_div_recalc_rate()
+-to use a new qcom_find_freq_close() function, which returns the closest
+-matching frequency, instead of the next higher. This way, the SoC in
+-the FB4040 (with its max clock speed of 710.4 MHz) will no longer
+-try to overclock to 761 MHz.
+-
+-Fixes: d83dcacea18 ("clk: qcom: ipq4019: Add the apss cpu pll divider clock node")
+-Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+-Signed-off-by: John Crispin <john@phrozen.org>
+----
+- drivers/clk/qcom/gcc-ipq4019.c | 34 +++++++++++++++++++++++++++++++---
+- 1 file changed, 31 insertions(+), 3 deletions(-)
+-
+---- a/drivers/clk/qcom/gcc-ipq4019.c
+-+++ b/drivers/clk/qcom/gcc-ipq4019.c
+-@@ -1243,6 +1243,29 @@ static const struct clk_fepll_vco gcc_fe
+- 	.reg = 0x2f020,
+- };
+- 
+-+
+-+const struct freq_tbl *qcom_find_freq_close(const struct freq_tbl *f,
+-+					     unsigned long rate)
+-+{
+-+	const struct freq_tbl *last = NULL;
+-+
+-+	for ( ; f->freq; f++) {
+-+		if (rate == f->freq)
+-+			return f;
+-+
+-+		if (f->freq > rate) {
+-+			if (!last ||
+-+			   (f->freq - rate) < (rate - last->freq))
+-+				return f;
+-+			else
+-+				return last;
+-+		}
+-+		last = f;
+-+	}
+-+
+-+	return last;
+-+}
+-+
+- /*
+-  * Round rate function for APSS CPU PLL Clock divider.
+-  * It looks up the frequency table and returns the next higher frequency
+-@@ -1255,7 +1278,7 @@ static long clk_cpu_div_round_rate(struc
+- 	struct clk_hw *p_hw;
+- 	const struct freq_tbl *f;
+- 
+--	f = qcom_find_freq(pll->freq_tbl, rate);
+-+	f = qcom_find_freq_close(pll->freq_tbl, rate);
+- 	if (!f)
+- 		return -EINVAL;
+- 
+-@@ -1277,7 +1300,7 @@ static int clk_cpu_div_set_rate(struct c
+- 	const struct freq_tbl *f;
+- 	u32 mask;
+- 
+--	f = qcom_find_freq(pll->freq_tbl, rate);
+-+	f = qcom_find_freq_close(pll->freq_tbl, rate);
+- 	if (!f)
+- 		return -EINVAL;
+- 
+-@@ -1304,6 +1327,7 @@ static unsigned long
+- clk_cpu_div_recalc_rate(struct clk_hw *hw,
+- 			unsigned long parent_rate)
+- {
+-+	const struct freq_tbl *f;
+- 	struct clk_fepll *pll = to_clk_fepll(hw);
+- 	u32 cdiv, pre_div;
+- 	u64 rate;
+-@@ -1324,7 +1348,11 @@ clk_cpu_div_recalc_rate(struct clk_hw *h
+- 	rate = clk_fepll_vco_calc_rate(pll, parent_rate) * 2;
+- 	do_div(rate, pre_div);
+- 
+--	return rate;
+-+	f = qcom_find_freq_close(pll->freq_tbl, rate);
+-+	if (!f)
+-+		return rate;
+-+
+-+	return f->freq;
+- };
+- 
+- static const struct clk_ops clk_regmap_cpu_div_ops = {
+diff --git a/target/linux/ipq40xx/patches-5.15/300-clk-qcom-ipq4019-add-ess-reset.patch b/target/linux/ipq40xx/patches-5.15/300-clk-qcom-ipq4019-add-ess-reset.patch
+deleted file mode 100644
+index eb015251a1..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/300-clk-qcom-ipq4019-add-ess-reset.patch
++++ /dev/null
+@@ -1,52 +0,0 @@
+-From 480c1f7648fc586db12d6003c717c23667a4fcf0 Mon Sep 17 00:00:00 2001
+-From: Ram Chandra Jangir <rjangir@codeaurora.org>
+-Date: Tue, 28 Mar 2017 22:35:33 +0530
+-Subject: [PATCH] clk: qcom: ipq4019: add ess reset
+-
+-Added the ESS reset in IPQ4019 GCC.
+-
+-Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
+----
+- drivers/clk/qcom/gcc-ipq4019.c               | 11 +++++++++++
+- include/dt-bindings/clock/qcom,gcc-ipq4019.h | 11 +++++++++++
+- 2 files changed, 22 insertions(+)
+-
+---- a/drivers/clk/qcom/gcc-ipq4019.c
+-+++ b/drivers/clk/qcom/gcc-ipq4019.c
+-@@ -1735,6 +1735,17 @@ static const struct qcom_reset_map gcc_i
+- 	[GCC_TCSR_BCR] = {0x22000, 0},
+- 	[GCC_MPM_BCR] = {0x24000, 0},
+- 	[GCC_SPDM_BCR] = {0x25000, 0},
+-+	[ESS_MAC1_ARES] = {0x1200C, 0},
+-+	[ESS_MAC2_ARES] = {0x1200C, 1},
+-+	[ESS_MAC3_ARES] = {0x1200C, 2},
+-+	[ESS_MAC4_ARES] = {0x1200C, 3},
+-+	[ESS_MAC5_ARES] = {0x1200C, 4},
+-+	[ESS_PSGMII_ARES] = {0x1200C, 5},
+-+	[ESS_MAC1_CLK_DIS] = {0x1200C, 8},
+-+	[ESS_MAC2_CLK_DIS] = {0x1200C, 9},
+-+	[ESS_MAC3_CLK_DIS] = {0x1200C, 10},
+-+	[ESS_MAC4_CLK_DIS] = {0x1200C, 11},
+-+	[ESS_MAC5_CLK_DIS] = {0x1200C, 12},
+- };
+- 
+- static const struct regmap_config gcc_ipq4019_regmap_config = {
+---- a/include/dt-bindings/clock/qcom,gcc-ipq4019.h
+-+++ b/include/dt-bindings/clock/qcom,gcc-ipq4019.h
+-@@ -165,5 +165,16 @@
+- #define GCC_QDSS_BCR					69
+- #define GCC_MPM_BCR					70
+- #define GCC_SPDM_BCR					71
+-+#define ESS_MAC1_ARES					72
+-+#define ESS_MAC2_ARES					73
+-+#define ESS_MAC3_ARES					74
+-+#define ESS_MAC4_ARES					75
+-+#define ESS_MAC5_ARES					76
+-+#define ESS_PSGMII_ARES					77
+-+#define ESS_MAC1_CLK_DIS				78
+-+#define ESS_MAC2_CLK_DIS				79
+-+#define ESS_MAC3_CLK_DIS				80
+-+#define ESS_MAC4_CLK_DIS				81
+-+#define ESS_MAC5_CLK_DIS				82
+- 
+- #endif
+diff --git a/target/linux/ipq40xx/patches-5.15/301-arm-compressed-add-appended-DTB-section.patch b/target/linux/ipq40xx/patches-5.15/301-arm-compressed-add-appended-DTB-section.patch
+deleted file mode 100644
+index 0448574e7e..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/301-arm-compressed-add-appended-DTB-section.patch
++++ /dev/null
+@@ -1,48 +0,0 @@
+-From 0843a61d6913bdac8889eb048ed89f7903059787 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Fri, 30 Oct 2020 13:36:31 +0100
+-Subject: [PATCH] arm: compressed: add appended DTB section
+-
+-This adds a appended_dtb section to the ARM decompressor
+-linker script.
+-
+-This allows using the existing ARM zImage appended DTB support for
+-appending a DTB to the raw ELF kernel.
+-
+-Its size is set to 1MB max to match the zImage appended DTB size limit.
+-
+-To use it to pass the DTB to the kernel, objcopy is used:
+-
+-objcopy --set-section-flags=.appended_dtb=alloc,contents \
+-	--update-section=.appended_dtb=<target>.dtb vmlinux
+-
+-This is based off the following patch:
+-https://github.com/openwrt/openwrt/commit/c063e27e02a9dcac0e7f5877fb154e58fa3e1a69
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- arch/arm/boot/compressed/vmlinux.lds.S | 9 ++++++++-
+- 1 file changed, 8 insertions(+), 1 deletion(-)
+-
+---- a/arch/arm/boot/compressed/vmlinux.lds.S
+-+++ b/arch/arm/boot/compressed/vmlinux.lds.S
+-@@ -103,6 +103,13 @@ SECTIONS
+- 
+-   _edata = .;
+- 
+-+  .appended_dtb : {
+-+    /* leave space for appended DTB */
+-+    . += 0x100000;
+-+  }
+-+
+-+  _edata_dtb = .;
+-+
+-   /*
+-    * The image_end section appears after any additional loadable sections
+-    * that the linker may decide to insert in the binary image.  Having
+-@@ -140,4 +147,4 @@ SECTIONS
+- 
+-   ARM_ASSERTS
+- }
+--ASSERT(_edata_real == _edata, "error: zImage file size is incorrect");
+-+ASSERT(_edata_real == _edata_dtb, "error: zImage file size is incorrect");
+diff --git a/target/linux/ipq40xx/patches-5.15/302-arm-compressed-set-ipq40xx-watchdog-to-allow-boot.patch b/target/linux/ipq40xx/patches-5.15/302-arm-compressed-set-ipq40xx-watchdog-to-allow-boot.patch
+deleted file mode 100644
+index 51891c1f22..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/302-arm-compressed-set-ipq40xx-watchdog-to-allow-boot.patch
++++ /dev/null
+@@ -1,66 +0,0 @@
+-From 11d6a6128a5a07c429941afc202b6e62a19771be Mon Sep 17 00:00:00 2001
+-From: John Thomson <git@johnthomson.fastmail.com.au>
+-Date: Fri, 23 Oct 2020 19:42:36 +1000
+-Subject: [PATCH 2/2] arm: compressed: set ipq40xx watchdog to allow boot
+-
+-For IPQ40XX systems where the SoC watchdog is activated before linux,
+-the watchdog timer may be too small for linux to finish uncompress,
+-boot, and watchdog management start.
+-If the watchdog is enabled, set the timeout for it to 30 seconds.
+-The functionality and offsets were copied from:
+-drivers/watchdog/qcom-wdt.c qcom_wdt_set_timeout & qcom_wdt_start
+-The watchdog memory address was taken from:
+-arch/arm/boot/dts/qcom-ipq4019.dtsi
+-
+-This was required on Mikrotik IPQ40XX consumer hardware using Mikrotik's
+-RouterBoot bootloader.
+-
+-Signed-off-by: John Thomson <git@johnthomson.fastmail.com.au>
+----
+- arch/arm/boot/compressed/head.S | 35 +++++++++++++++++++++++++++++++++
+- 1 file changed, 35 insertions(+)
+-
+---- a/arch/arm/boot/compressed/head.S
+-+++ b/arch/arm/boot/compressed/head.S
+-@@ -624,6 +624,41 @@ not_relocated:	mov	r0, #0
+- 		bic	r4, r4, #1
+- 		blne	cache_on
+- 
+-+/* Set the Qualcom IPQ40xx watchdog timeout to 30 seconds
+-+ * if it is enabled, so that there is time for kernel
+-+ * to decompress, boot, and take over the watchdog.
+-+ * data and functionality from drivers/watchdog/qcom-wdt.c
+-+ * address from arch/arm/boot/dts/qcom-ipq4019.dtsi
+-+ */
+-+#ifdef CONFIG_ARCH_IPQ40XX
+-+watchdog_set:
+-+		/* offsets:
+-+		 * 0x04 reset	(=1 resets countdown)
+-+		 * 0x08 enable	(=0 disables)
+-+		 * 0x0c status	(=1 when SoC was reset by watchdog)
+-+		 * 0x10 bark	(=timeout warning in ticks)
+-+		 * 0x14 bite	(=timeout reset in ticks)
+-+		 * clock rate is 1<<15 hertz
+-+		 */
+-+		.equ watchdog, 0x0b017000	@Store watchdog base address
+-+		movw r0, #:lower16:watchdog
+-+		movt r0, #:upper16:watchdog
+-+		ldr r1, [r0, #0x08]	@Get enabled?
+-+		cmp r1, #1		@If not enabled, do not change
+-+		bne watchdog_finished
+-+		mov r1, #0
+-+		str r1, [r0, #0x08]	@Disable the watchdog
+-+		mov r1, #1
+-+		str r1, [r0, #0x04]	@Pet the watchdog
+-+		mov r1, #30		@30 seconds timeout
+-+		lsl r1, r1, #15		@converted to ticks
+-+		str r1, [r0, #0x10]	@Set the bark timeout
+-+		str r1, [r0, #0x14]	@Set the bite timeout
+-+		mov r1, #1
+-+		str r1, [r0, #0x08]	@Enable the watchdog
+-+watchdog_finished:
+-+#endif /* CONFIG_ARCH_IPQ40XX */
+-+
+- /*
+-  * The C runtime environment should now be setup sufficiently.
+-  * Set up some pointers, and start decompressing.
+diff --git a/target/linux/ipq40xx/patches-5.15/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch b/target/linux/ipq40xx/patches-5.15/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch
+deleted file mode 100644
+index 3a3be91709..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch
++++ /dev/null
+@@ -1,24 +0,0 @@
+-From f63ea127643a605da97090ce585fdd7c2d17fa42 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robert.marko@sartura.hr>
+-Date: Mon, 14 Dec 2020 13:35:35 +0100
+-Subject: [PATCH] mmc: sdhci-msm: use sdhci_set_clock
+-
+-When using sdhci_msm_set_clock clock setting will fail, so lets
+-use the generic sdhci_set_clock.
+-
+-Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+----
+- drivers/mmc/host/sdhci-msm.c | 2 +-
+- 1 file changed, 1 insertion(+), 1 deletion(-)
+-
+---- a/drivers/mmc/host/sdhci-msm.c
+-+++ b/drivers/mmc/host/sdhci-msm.c
+-@@ -2447,7 +2447,7 @@ MODULE_DEVICE_TABLE(of, sdhci_msm_dt_mat
+- 
+- static const struct sdhci_ops sdhci_msm_ops = {
+- 	.reset = sdhci_msm_reset,
+--	.set_clock = sdhci_msm_set_clock,
+-+	.set_clock = sdhci_set_clock,
+- 	.get_min_clock = sdhci_msm_get_min_clock,
+- 	.get_max_clock = sdhci_msm_get_max_clock,
+- 	.set_bus_width = sdhci_set_bus_width,
+diff --git a/target/linux/ipq40xx/patches-5.15/401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch b/target/linux/ipq40xx/patches-5.15/401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch
+deleted file mode 100644
+index b297600171..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch
++++ /dev/null
+@@ -1,108 +0,0 @@
+-From 28edd829133766eb3cefaf2e49d3ee701968061b Mon Sep 17 00:00:00 2001
+-From: Christian Marangi <ansuelsmth@gmail.com>
+-Date: Tue, 9 May 2023 01:57:17 +0200
+-Subject: [PATCH] mmc: sdhci-msm: comment unused sdhci_msm_set_clock
+-
+-comment unused sdhci_msm_set_clock and __sdhci_msm_set_clock as due to some
+-current problem, we are forced to use sdhci_set_clock.
+-
+-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+----
+- drivers/mmc/host/sdhci-msm.c | 86 ++++++++++++++++++------------------
+- 1 file changed, 43 insertions(+), 43 deletions(-)
+-
+---- a/drivers/mmc/host/sdhci-msm.c
+-+++ b/drivers/mmc/host/sdhci-msm.c
+-@@ -1751,49 +1751,49 @@ static unsigned int sdhci_msm_get_min_cl
+- 	return SDHCI_MSM_MIN_CLOCK;
+- }
+- 
+--/*
+-- * __sdhci_msm_set_clock - sdhci_msm clock control.
+-- *
+-- * Description:
+-- * MSM controller does not use internal divider and
+-- * instead directly control the GCC clock as per
+-- * HW recommendation.
+-- **/
+--static void __sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock)
+--{
+--	u16 clk;
+--
+--	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
+--
+--	if (clock == 0)
+--		return;
+--
+--	/*
+--	 * MSM controller do not use clock divider.
+--	 * Thus read SDHCI_CLOCK_CONTROL and only enable
+--	 * clock with no divider value programmed.
+--	 */
+--	clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+--	sdhci_enable_clk(host, clk);
+--}
+--
+--/* sdhci_msm_set_clock - Called with (host->lock) spinlock held. */
+--static void sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock)
+--{
+--	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+--	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
+--
+--	if (!clock) {
+--		host->mmc->actual_clock = msm_host->clk_rate = 0;
+--		goto out;
+--	}
+--
+--	sdhci_msm_hc_select_mode(host);
+--
+--	msm_set_clock_rate_for_bus_mode(host, clock);
+--out:
+--	__sdhci_msm_set_clock(host, clock);
+--}
+-+// /*
+-+//  * __sdhci_msm_set_clock - sdhci_msm clock control.
+-+//  *
+-+//  * Description:
+-+//  * MSM controller does not use internal divider and
+-+//  * instead directly control the GCC clock as per
+-+//  * HW recommendation.
+-+//  **/
+-+// static void __sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock)
+-+// {
+-+// 	u16 clk;
+-+
+-+// 	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
+-+
+-+// 	if (clock == 0)
+-+// 		return;
+-+
+-+// 	/*
+-+// 	 * MSM controller do not use clock divider.
+-+// 	 * Thus read SDHCI_CLOCK_CONTROL and only enable
+-+// 	 * clock with no divider value programmed.
+-+// 	 */
+-+// 	clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+-+// 	sdhci_enable_clk(host, clk);
+-+// }
+-+
+-+// /* sdhci_msm_set_clock - Called with (host->lock) spinlock held. */
+-+// static void sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock)
+-+// {
+-+// 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+-+// 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
+-+
+-+// 	if (!clock) {
+-+// 		host->mmc->actual_clock = msm_host->clk_rate = 0;
+-+// 		goto out;
+-+// 	}
+-+
+-+// 	sdhci_msm_hc_select_mode(host);
+-+
+-+// 	msm_set_clock_rate_for_bus_mode(host, clock);
+-+// out:
+-+// 	__sdhci_msm_set_clock(host, clock);
+-+// }
+- 
+- /*****************************************************************************\
+-  *                                                                           *
+diff --git a/target/linux/ipq40xx/patches-5.15/420-firmware-qcom-scm-disable-SDI.patch b/target/linux/ipq40xx/patches-5.15/420-firmware-qcom-scm-disable-SDI.patch
+deleted file mode 100644
+index a0074103cc..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/420-firmware-qcom-scm-disable-SDI.patch
++++ /dev/null
+@@ -1,47 +0,0 @@
+---- a/drivers/firmware/qcom_scm.c
+-+++ b/drivers/firmware/qcom_scm.c
+-@@ -404,6 +404,20 @@ static int __qcom_scm_set_dload_mode(str
+- 	return qcom_scm_call_atomic(__scm->dev, &desc, NULL);
+- }
+- 
+-+static int __qcom_scm_disable_sdi(struct device *dev)
+-+{
+-+	struct qcom_scm_desc desc = {
+-+		.svc = QCOM_SCM_SVC_BOOT,
+-+		.cmd = QCOM_SCM_BOOT_CONFIG_SDI,
+-+		.arginfo = QCOM_SCM_ARGS(2),
+-+		.args[0] = 1  /* 1: disable watchdog debug */,
+-+		.args[1] = 0  /* 0: disable SDI */,
+-+		.owner = ARM_SMCCC_OWNER_SIP,
+-+	};
+-+
+-+	return qcom_scm_call(__scm->dev, &desc, NULL);
+-+}
+-+
+- static void qcom_scm_set_download_mode(bool enable)
+- {
+- 	bool avail;
+-@@ -1314,6 +1328,13 @@ static int qcom_scm_probe(struct platfor
+- 	if (download_mode)
+- 		qcom_scm_set_download_mode(true);
+- 
+-+	/*
+-+	 * Factory firmware leaves SDI (a debug interface), which prevents
+-+	 * clean reboot.
+-+	 */
+-+	if (of_machine_is_compatible("google,wifi"))
+-+		__qcom_scm_disable_sdi(__scm->dev);
+-+
+- 	return 0;
+- }
+- 
+---- a/drivers/firmware/qcom_scm.h
+-+++ b/drivers/firmware/qcom_scm.h
+-@@ -77,6 +77,7 @@ extern int scm_legacy_call(struct device
+- #define QCOM_SCM_SVC_BOOT		0x01
+- #define QCOM_SCM_BOOT_SET_ADDR		0x01
+- #define QCOM_SCM_BOOT_TERMINATE_PC	0x02
+-+#define QCOM_SCM_BOOT_CONFIG_SDI	0x09
+- #define QCOM_SCM_BOOT_SET_DLOAD_MODE	0x10
+- #define QCOM_SCM_BOOT_SET_REMOTE_STATE	0x0a
+- #define QCOM_SCM_FLUSH_FLAG_MASK	0x3
+diff --git a/target/linux/ipq40xx/patches-5.15/421-firmware-qcom-scm-cold-boot-address.patch b/target/linux/ipq40xx/patches-5.15/421-firmware-qcom-scm-cold-boot-address.patch
+deleted file mode 100644
+index 13ebb5b000..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/421-firmware-qcom-scm-cold-boot-address.patch
++++ /dev/null
+@@ -1,121 +0,0 @@
+---- a/drivers/firmware/qcom_scm-legacy.c
+-+++ b/drivers/firmware/qcom_scm-legacy.c
+-@@ -13,6 +13,9 @@
+- #include <linux/arm-smccc.h>
+- #include <linux/dma-mapping.h>
+- 
+-+#include <asm/cacheflush.h>
+-+#include <asm/outercache.h>
+-+
+- #include "qcom_scm.h"
+- 
+- static DEFINE_MUTEX(qcom_scm_lock);
+-@@ -117,6 +120,25 @@ static void __scm_legacy_do(const struct
+- 	} while (res->a0 == QCOM_SCM_INTERRUPTED);
+- }
+- 
+-+static void qcom_scm_inv_range(unsigned long start, unsigned long end)
+-+{
+-+	u32 cacheline_size, ctr;
+-+
+-+	asm volatile("mrc p15, 0, %0, c0, c0, 1" : "=r" (ctr));
+-+	cacheline_size = 4 << ((ctr >> 16) & 0xf);
+-+
+-+	start = round_down(start, cacheline_size);
+-+	end = round_up(end, cacheline_size);
+-+	outer_inv_range(start, end);
+-+	while (start < end) {
+-+		asm ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start)
+-+		     : "memory");
+-+		start += cacheline_size;
+-+	}
+-+	dsb();
+-+	isb();
+-+}
+-+
+- /**
+-  * scm_legacy_call() - Sends a command to the SCM and waits for the command to
+-  * finish processing.
+-@@ -160,10 +182,16 @@ int scm_legacy_call(struct device *dev,
+- 
+- 	rsp = scm_legacy_command_to_response(cmd);
+- 
+--	cmd_phys = dma_map_single(dev, cmd, alloc_len, DMA_TO_DEVICE);
+--	if (dma_mapping_error(dev, cmd_phys)) {
+--		kfree(cmd);
+--		return -ENOMEM;
+-+	if (dev) {
+-+		cmd_phys = dma_map_single(dev, cmd, alloc_len, DMA_TO_DEVICE);
+-+		if (dma_mapping_error(dev, cmd_phys)) {
+-+			kfree(cmd);
+-+			return -ENOMEM;
+-+		}
+-+	} else {
+-+		cmd_phys = virt_to_phys(cmd);
+-+		__cpuc_flush_dcache_area(cmd, alloc_len);
+-+		outer_flush_range(cmd_phys, cmd_phys + alloc_len);
+- 	}
+- 
+- 	smc.args[0] = 1;
+-@@ -179,13 +207,26 @@ int scm_legacy_call(struct device *dev,
+- 		goto out;
+- 
+- 	do {
+--		dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len,
+--					sizeof(*rsp), DMA_FROM_DEVICE);
+-+		if (dev) {
+-+			dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) +
+-+						cmd_len, sizeof(*rsp),
+-+						DMA_FROM_DEVICE);
+-+		} else {
+-+			unsigned long start = (uintptr_t)cmd + sizeof(*cmd) +
+-+					      cmd_len;
+-+			qcom_scm_inv_range(start, start + sizeof(*rsp));
+-+		}
+- 	} while (!rsp->is_complete);
+- 
+--	dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len +
+--				le32_to_cpu(rsp->buf_offset),
+--				resp_len, DMA_FROM_DEVICE);
+-+	if (dev) {
+-+		dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len +
+-+					le32_to_cpu(rsp->buf_offset),
+-+					resp_len, DMA_FROM_DEVICE);
+-+	} else {
+-+		unsigned long start = (uintptr_t)cmd + sizeof(*cmd) + cmd_len +
+-+				      le32_to_cpu(rsp->buf_offset);
+-+		qcom_scm_inv_range(start, start + resp_len);
+-+	}
+- 
+- 	if (res) {
+- 		res_buf = scm_legacy_get_response_buffer(rsp);
+-@@ -193,7 +234,8 @@ int scm_legacy_call(struct device *dev,
+- 			res->result[i] = le32_to_cpu(res_buf[i]);
+- 	}
+- out:
+--	dma_unmap_single(dev, cmd_phys, alloc_len, DMA_TO_DEVICE);
+-+	if (dev)
+-+		dma_unmap_single(dev, cmd_phys, alloc_len, DMA_TO_DEVICE);
+- 	kfree(cmd);
+- 	return ret;
+- }
+---- a/drivers/firmware/qcom_scm.c
+-+++ b/drivers/firmware/qcom_scm.c
+-@@ -344,6 +344,17 @@ int qcom_scm_set_cold_boot_addr(void *en
+- 	desc.args[0] = flags;
+- 	desc.args[1] = virt_to_phys(entry);
+- 
+-+	/*
+-+	 * Factory firmware doesn't support the atomic variant. Non-atomic SCMs
+-+	 * require ugly DMA invalidation support that was dropped upstream a
+-+	 * while ago. For more info, see:
+-+	 *
+-+	 *  [RFC] qcom_scm: IPQ4019 firmware does not support atomic API?
+-+	 *  https://lore.kernel.org/linux-arm-msm/20200913201608.GA3162100@bDebian/
+-+	 */
+-+	if (of_machine_is_compatible("google,wifi"))
+-+		return qcom_scm_call(__scm ? __scm->dev : NULL, &desc, NULL);
+-+
+- 	return qcom_scm_call_atomic(__scm ? __scm->dev : NULL, &desc, NULL);
+- }
+- EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);
+diff --git a/target/linux/ipq40xx/patches-5.15/444-mtd-nand-rawnand-add-support-for-Toshiba-TC58NVG0S3H.patch b/target/linux/ipq40xx/patches-5.15/444-mtd-nand-rawnand-add-support-for-Toshiba-TC58NVG0S3H.patch
+deleted file mode 100644
+index 91919b2894..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/444-mtd-nand-rawnand-add-support-for-Toshiba-TC58NVG0S3H.patch
++++ /dev/null
+@@ -1,29 +0,0 @@
+-From 35ca7e3e6ccd120d694a3425f37fc6374ad2e11e Mon Sep 17 00:00:00 2001
+-From: =?UTF-8?q?Andreas=20B=C3=B6hler?= <dev@aboehler.at>
+-Date: Wed, 20 Apr 2022 12:08:38 +0200
+-Subject: [PATCH] mtd: rawnand: add support for Toshiba TC58NVG0S3HTA00
+- NAND flash
+-MIME-Version: 1.0
+-Content-Type: text/plain; charset=UTF-8
+-Content-Transfer-Encoding: 8bit
+-
+-The Toshiba TC58NVG0S3HTA00 is detected with 64 byte OOB while the flash
+-has 128 bytes OOB. This adds a static NAND ID entry to correct this.
+-
+-Tested on FRITZ!Box 7530 flashed with OpenWrt.
+-
+-Signed-off-by: Andreas Böhler <dev@aboehler.at>
+-(changed id_len to 8, added comment about possible counterfeits)
+----
+---- a/drivers/mtd/nand/raw/nand_ids.c
+-+++ b/drivers/mtd/nand/raw/nand_ids.c
+-@@ -29,6 +29,9 @@ struct nand_flash_dev nand_flash_ids[] =
+- 	{"TC58NVG0S3E 1G 3.3V 8-bit",
+- 		{ .id = {0x98, 0xd1, 0x90, 0x15, 0x76, 0x14, 0x01, 0x00} },
+- 		  SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
+-+	{"TC58NVG0S3HTA00 1G 3.3V 8-bit", /* possibly counterfeit chip - see commit */
+-+		{ .id = {0x98, 0xf1, 0x80, 0x15} }, /* should be more bytes */
+-+		  SZ_2K, SZ_128, SZ_128K, 0, 8, 128, NAND_ECC_INFO(8, SZ_512), },
+- 	{"TC58NVG2S0F 4G 3.3V 8-bit",
+- 		{ .id = {0x98, 0xdc, 0x90, 0x26, 0x76, 0x15, 0x01, 0x08} },
+- 		  SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
+diff --git a/target/linux/ipq40xx/patches-5.15/700-skbuff-add-DSA-specific-data-to-struct-skb_shared_in.patch b/target/linux/ipq40xx/patches-5.15/700-skbuff-add-DSA-specific-data-to-struct-skb_shared_in.patch
+deleted file mode 100644
+index 385364c076..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/700-skbuff-add-DSA-specific-data-to-struct-skb_shared_in.patch
++++ /dev/null
+@@ -1,43 +0,0 @@
+-From da75807ac41175e9db8c95f7a172b4133763b744 Mon Sep 17 00:00:00 2001
+-From: Gabor Juhos <j4g8y7@gmail.com>
+-Date: Mon, 11 Jan 2021 17:49:36 +0100
+-Subject: [PATCH] skbuff: add DSA specific data to struct skb_shared_info
+-
+-All of the already existing DSA tagging protocol drivers
+-are storing the tagging data directly into the skb. In most
+-cases that is the only way to send the required information
+-to the underlying ethernet switch.
+-
+-However on certain platforms (like the Qualcomm IPQ40xx
+-SoCs) the built-in ethernet switch is connected directly
+-to an ethernet MAC, and the tagging information must be
+-sent out-of-band which is done directly via the hardware
+-TX descriptors of the ethernet MAC.
+-
+-In such cases, putting the information into the skb causes
+-unneccesary overhead, because the ethernet driver must
+-remove that before sending the ethernet frame towards to
+-the hardware.
+-
+-This change adds two new DSA specific fields to struct
+-skb_shared_info which makes it possible to send the
+-tagging information via skb->shinfo. With this approach,
+-the twofold modifications of the skb data can be avoided.
+-
+-Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
+----
+- include/linux/skbuff.h | 3 +++
+- 1 file changed, 3 insertions(+)
+-
+---- a/include/linux/skbuff.h
+-+++ b/include/linux/skbuff.h
+-@@ -564,6 +564,9 @@ struct skb_shared_info {
+- 	unsigned int	gso_type;
+- 	u32		tskey;
+- 
+-+	unsigned int	dsa_tag_proto;
+-+	unsigned char	dsa_tag_data[8];
+-+
+- 	/*
+- 	 * Warning : all fields before dataref are cleared in __alloc_skb()
+- 	 */
+diff --git a/target/linux/ipq40xx/patches-5.15/701-net-dsa-tag_ipq4019-add-shinfo-based-tagging-driver-.patch b/target/linux/ipq40xx/patches-5.15/701-net-dsa-tag_ipq4019-add-shinfo-based-tagging-driver-.patch
+deleted file mode 100644
+index 74079d68a1..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/701-net-dsa-tag_ipq4019-add-shinfo-based-tagging-driver-.patch
++++ /dev/null
+@@ -1,187 +0,0 @@
+-From 29a0c2fae991cab142575c92276c0afdeb260ebe Mon Sep 17 00:00:00 2001
+-From: Gabor Juhos <j4g8y7@gmail.com>
+-Date: Thu, 28 Oct 2021 21:44:52 +0200
+-Subject: [PATCH] net: dsa: tag_ipq4019: add shinfo based tagging driver for
+- IPQ40xx
+-
+-This change adds a tagging protocol driver for the built-in
+-ethernet switch of the Qualcomm Atheros IPQ4019 SoCs.
+-
+-In comparison to the existing tagging protocols this hardware
+-requires a slightly different approach because the switch does
+-not use in-band tags.
+-
+-On the receive path, the source port information is embedded
+-into the RX descriptors of the ethernet MAC hardware. Similarly,
+-the destination port mask must be sent via the TX descriptors
+-of the ethernet MAC when a packet is sent towards the switch.
+-
+-In order to support this special requirements, this patch
+-adds a new tagging protocol driver.
+-
+-The driver extracts the source port information directly
+-from the 'receive return descriptor' of the ethernet MAC.
+-It is possible because that descriptor is part of the skb
+-received from the ethernet driver.
+-
+-Unfortunatley, it is not possible to put the destination
+-port information directly to the TX descriptors, because
+-those are handled internally by the driver of the ethernet
+-hardware.
+-
+-To overcome this limitation, this tagging driver uses the
+-DSA specific fields in skb->shinfo to send the destination
+-port information to the ethernet driver.
+-
+-A similar tagging driver is exist but that uses skb
+-extensions which causes unnecessary overhead.
+-
+-Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
+----
+- include/linux/dsa/ipq4019.h | 11 ++++++
+- include/net/dsa.h           |  2 +
+- net/dsa/Kconfig             |  6 +++
+- net/dsa/Makefile            |  1 +
+- net/dsa/tag_ipq4019.c       | 79 +++++++++++++++++++++++++++++++++++++
+- 5 files changed, 99 insertions(+)
+- create mode 100644 include/linux/dsa/ipq4019.h
+- create mode 100644 net/dsa/tag_ipq4019.c
+-
+---- /dev/null
+-+++ b/include/linux/dsa/ipq4019.h
+-@@ -0,0 +1,11 @@
+-+/* SPDX-License-Identifier: GPL-2.0-only */
+-+
+-+#ifndef DSA_IPQ40XX_H
+-+#define DSA_IPQ40XX_H
+-+
+-+struct ipq40xx_dsa_tag_data {
+-+	u8 from_cpu;
+-+	u8 dp;
+-+};
+-+
+-+#endif /* DSA_IPQ40XX_H */
+---- a/include/net/dsa.h
+-+++ b/include/net/dsa.h
+-@@ -51,6 +51,7 @@ struct phylink_link_state;
+- #define DSA_TAG_PROTO_SEVILLE_VALUE		21
+- #define DSA_TAG_PROTO_BRCM_LEGACY_VALUE		22
+- #define DSA_TAG_PROTO_SJA1110_VALUE		23
+-+#define DSA_TAG_PROTO_IPQ4019_VALUE		24
+- 
+- enum dsa_tag_protocol {
+- 	DSA_TAG_PROTO_NONE		= DSA_TAG_PROTO_NONE_VALUE,
+-@@ -77,6 +78,7 @@ enum dsa_tag_protocol {
+- 	DSA_TAG_PROTO_OCELOT_8021Q	= DSA_TAG_PROTO_OCELOT_8021Q_VALUE,
+- 	DSA_TAG_PROTO_SEVILLE		= DSA_TAG_PROTO_SEVILLE_VALUE,
+- 	DSA_TAG_PROTO_SJA1110		= DSA_TAG_PROTO_SJA1110_VALUE,
+-+	DSA_TAG_PROTO_IPQ4019		= DSA_TAG_PROTO_IPQ4019_VALUE,
+- };
+- 
+- struct dsa_switch;
+---- a/net/dsa/Kconfig
+-+++ b/net/dsa/Kconfig
+-@@ -57,6 +57,12 @@ config NET_DSA_TAG_HELLCREEK
+- 	  Say Y or M if you want to enable support for tagging frames
+- 	  for the Hirschmann Hellcreek TSN switches.
+- 
+-+config NET_DSA_TAG_IPQ4019
+-+	tristate "Tag driver for Qualcomm Atheros IPQ4019 SoC built-in switch"
+-+	help
+-+	  Say Y or M if you want to enable support for tagging frames for
+-+	  the built-in switch of the Qualcomm Atheros IPQ4019 SoC-s.
+-+
+- config NET_DSA_TAG_GSWIP
+- 	tristate "Tag driver for Lantiq / Intel GSWIP switches"
+- 	help
+---- a/net/dsa/Makefile
+-+++ b/net/dsa/Makefile
+-@@ -8,6 +8,7 @@ obj-$(CONFIG_NET_DSA_TAG_AR9331) += tag_
+- obj-$(CONFIG_NET_DSA_TAG_BRCM_COMMON) += tag_brcm.o
+- obj-$(CONFIG_NET_DSA_TAG_DSA_COMMON) += tag_dsa.o
+- obj-$(CONFIG_NET_DSA_TAG_GSWIP) += tag_gswip.o
+-+obj-$(CONFIG_NET_DSA_TAG_IPQ4019) += tag_ipq4019.o
+- obj-$(CONFIG_NET_DSA_TAG_HELLCREEK) += tag_hellcreek.o
+- obj-$(CONFIG_NET_DSA_TAG_KSZ) += tag_ksz.o
+- obj-$(CONFIG_NET_DSA_TAG_RTL4_A) += tag_rtl4_a.o
+---- /dev/null
+-+++ b/net/dsa/tag_ipq4019.c
+-@@ -0,0 +1,78 @@
+-+// SPDX-License-Identifier: GPL-2.0-only
+-+
+-+/* Copyright (c) 2021, Gabor Juhos <j4g8y7@gmail.com> */
+-+
+-+#include <linux/bitfield.h>
+-+#include <linux/dsa/ipq4019.h>
+-+
+-+#include "dsa_priv.h"
+-+
+-+/* Receive Return Descriptor */
+-+struct edma_rrd {
+-+	u16 rrd0;
+-+	u16 rrd1;
+-+	u16 rrd2;
+-+	u16 rrd3;
+-+	u16 rrd4;
+-+	u16 rrd5;
+-+	u16 rrd6;
+-+	u16 rrd7;
+-+} __packed;
+-+
+-+#define EDMA_RRD_SIZE			sizeof(struct edma_rrd)
+-+
+-+#define EDMA_RRD1_PORT_ID_MASK		GENMASK(14, 12)
+-+
+-+static struct sk_buff *ipq4019_sh_tag_xmit(struct sk_buff *skb,
+-+					   struct net_device *dev)
+-+{
+-+	struct dsa_port *dp = dsa_slave_to_port(dev);
+-+	struct ipq40xx_dsa_tag_data *tag_data;
+-+
+-+	BUILD_BUG_ON(sizeof_field(struct skb_shared_info, dsa_tag_data) <
+-+		     sizeof(struct ipq40xx_dsa_tag_data));
+-+
+-+	skb_shinfo(skb)->dsa_tag_proto = DSA_TAG_PROTO_IPQ4019;
+-+	tag_data = (struct ipq40xx_dsa_tag_data *)skb_shinfo(skb)->dsa_tag_data;
+-+
+-+	tag_data->from_cpu = 1;
+-+	/* set the destination port information */
+-+	tag_data->dp = BIT(dp->index);
+-+
+-+	return skb;
+-+}
+-+
+-+static struct sk_buff *ipq4019_sh_tag_rcv(struct sk_buff *skb,
+-+					  struct net_device *dev)
+-+{
+-+	struct edma_rrd *rrd;
+-+	int offset;
+-+	int port;
+-+
+-+	offset = EDMA_RRD_SIZE + ETH_HLEN;
+-+	if (unlikely(skb_headroom(skb) < offset))
+-+		return NULL;
+-+
+-+	rrd = (struct edma_rrd *)(skb->data - offset);
+-+	port = FIELD_GET(EDMA_RRD1_PORT_ID_MASK, rrd->rrd1);
+-+
+-+	skb->dev = dsa_master_find_slave(dev, 0, port);
+-+	if (!skb->dev)
+-+		return NULL;
+-+
+-+	return skb;
+-+}
+-+
+-+const struct dsa_device_ops ipq4019_sh_tag_dsa_ops = {
+-+	.name	= "ipq4019-sh",
+-+	.proto	= DSA_TAG_PROTO_IPQ4019,
+-+	.xmit	= ipq4019_sh_tag_xmit,
+-+	.rcv	= ipq4019_sh_tag_rcv,
+-+};
+-+
+-+MODULE_LICENSE("GPL v2");
+-+MODULE_DESCRIPTION("DSA tag driver for the IPQ4019 SoC built-in ethernet switch");
+-+MODULE_AUTHOR("Gabor Juhos <j4g8y7@gmail.com>");
+-+MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_IPQ4019);
+-+
+-+module_dsa_tag_driver(ipq4019_sh_tag_dsa_ops);
+diff --git a/target/linux/ipq40xx/patches-5.15/702-net-ethernet-qualcomm-add-IPQESS-support.patch b/target/linux/ipq40xx/patches-5.15/702-net-ethernet-qualcomm-add-IPQESS-support.patch
+deleted file mode 100644
+index 72e9345118..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/702-net-ethernet-qualcomm-add-IPQESS-support.patch
++++ /dev/null
+@@ -1,43 +0,0 @@
+-From 4f488235f498db43f2412116dea6e02c7fb20216 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robert.marko@sartura.hr>
+-Date: Mon, 1 Nov 2021 12:36:51 +0100
+-Subject: [PATCH] net: ethernet: qualcomm: add IPQESS support
+-
+-Allow compiling the IPQESS driver that supports the
+-Qualcomm IPQ40xx SoC built-in ethernet controller.
+-
+-Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+----
+- drivers/net/ethernet/qualcomm/Kconfig  | 11 +++++++++++
+- drivers/net/ethernet/qualcomm/Makefile |  1 +
+- 2 files changed, 12 insertions(+)
+-
+---- a/drivers/net/ethernet/qualcomm/Kconfig
+-+++ b/drivers/net/ethernet/qualcomm/Kconfig
+-@@ -60,6 +60,17 @@ config QCOM_EMAC
+- 	  low power, Receive-Side Scaling (RSS), and IEEE 1588-2008
+- 	  Precision Clock Synchronization Protocol.
+- 
+-+config QCOM_IPQ4019_ESS_EDMA
+-+	tristate "Qualcomm Atheros IPQ4019 ESS EDMA support"
+-+	depends on OF
+-+	select PHYLINK
+-+	help
+-+	  This driver supports the Qualcomm Atheros IPQ40xx built-in
+-+	  ESS EDMA ethernet controller.
+-+
+-+	  To compile this driver as a module, choose M here: the
+-+	  module will be called ipqess.
+-+
+- source "drivers/net/ethernet/qualcomm/rmnet/Kconfig"
+- 
+- endif # NET_VENDOR_QUALCOMM
+---- a/drivers/net/ethernet/qualcomm/Makefile
+-+++ b/drivers/net/ethernet/qualcomm/Makefile
+-@@ -10,5 +10,6 @@ obj-$(CONFIG_QCA7000_UART) += qcauart.o
+- qcauart-objs := qca_uart.o
+- 
+- obj-y += emac/
+-+obj-y += ipqess/
+- 
+- obj-$(CONFIG_RMNET) += rmnet/
+diff --git a/target/linux/ipq40xx/patches-5.15/703-arm-dts-ipq4019-add-ethernet-controller-DT-node.patch b/target/linux/ipq40xx/patches-5.15/703-arm-dts-ipq4019-add-ethernet-controller-DT-node.patch
+deleted file mode 100644
+index 68fb4eb4ce..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/703-arm-dts-ipq4019-add-ethernet-controller-DT-node.patch
++++ /dev/null
+@@ -1,81 +0,0 @@
+-From 44327d7098d4f32c24ec8c528e5aff6e030956bc Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robert.marko@sartura.hr>
+-Date: Wed, 20 Oct 2021 13:21:45 +0200
+-Subject: [PATCH] arm: dts: ipq4019: add ethernet controller DT node
+-
+-Since IPQ40xx SoC built-in ethernet controller now has a driver,
+-add its DT node so it can be used.
+-
+-Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+----
+- arch/arm/boot/dts/qcom-ipq4019.dtsi | 48 +++++++++++++++++++++++++++++
+- 1 file changed, 48 insertions(+)
+-
+---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+-+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+-@@ -38,6 +38,7 @@
+- 		spi1 = &blsp1_spi2;
+- 		i2c0 = &blsp1_i2c3;
+- 		i2c1 = &blsp1_i2c4;
+-+		ethernet0 = &gmac;
+- 	};
+- 
+- 	cpus {
+-@@ -589,6 +590,57 @@
+- 			status = "disabled";
+- 		};
+- 
+-+		gmac: ethernet@c080000 {
+-+			compatible = "qcom,ipq4019-ess-edma";
+-+			reg = <0xc080000 0x8000>;
+-+			resets = <&gcc ESS_RESET>;
+-+			reset-names = "ess_rst";
+-+			clocks = <&gcc GCC_ESS_CLK>;
+-+			clock-names = "ess_clk";
+-+			interrupts = <GIC_SPI  65 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI  66 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI  67 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI  68 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI  69 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI  70 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI  71 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI  72 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI  73 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI  74 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI  75 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI  76 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI  77 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI  78 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI  79 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI  80 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 240 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 241 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 242 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 243 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 244 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 245 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 246 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 248 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 249 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 250 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 251 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 252 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 253 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 254 IRQ_TYPE_EDGE_RISING>,
+-+				     <GIC_SPI 255 IRQ_TYPE_EDGE_RISING>;
+-+
+-+			status = "disabled";
+-+
+-+			phy-mode = "internal";
+-+			fixed-link {
+-+				speed = <1000>;
+-+				full-duplex;
+-+				pause;
+-+				asym-pause;
+-+			};
+-+		};
+-+
+- 		mdio: mdio@90000 {
+- 			#address-cells = <1>;
+- 			#size-cells = <0>;
+diff --git a/target/linux/ipq40xx/patches-5.15/704-net-phy-define-PSGMII-PHY-interface-mode.patch b/target/linux/ipq40xx/patches-5.15/704-net-phy-define-PSGMII-PHY-interface-mode.patch
+deleted file mode 100644
+index faac6fa145..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/704-net-phy-define-PSGMII-PHY-interface-mode.patch
++++ /dev/null
+@@ -1,69 +0,0 @@
+-From 157ac9f52fd9b9a22cf12f7755a905fb34ef72f7 Mon Sep 17 00:00:00 2001
+-From: Gabor Juhos <j4g8y7@gmail.com>
+-Date: Fri, 25 Dec 2020 08:02:47 +0100
+-Subject: [PATCH] net: phy: define PSGMII PHY interface mode
+-
+-The PSGMII interface is similar to QSGMII. The main difference
+-is that the PSGMII interface combines five SGMII lines into a
+-single link while in QSGMII only four lines are combined.
+-
+-Similarly to the QSGMII, this interface mode might also needs
+-special handling within the MAC driver.
+-
+-Add definitions for the PHY layer to allow to express this type
+-of connection between the MAC and PHY.
+-
+-Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
+----
+- Documentation/devicetree/bindings/net/ethernet-controller.yaml | 1 +
+- drivers/net/phy/phylink.c                                      | 2 ++
+- include/linux/phy.h                                            | 3 +++
+- 3 files changed, 6 insertions(+)
+-
+---- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml
+-+++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
+-@@ -64,6 +64,7 @@ properties:
+-       - mii
+-       - gmii
+-       - sgmii
+-+      - psgmii
+-       - qsgmii
+-       - tbi
+-       - rev-mii
+---- a/drivers/net/phy/phylink.c
+-+++ b/drivers/net/phy/phylink.c
+-@@ -366,6 +366,7 @@ void phylink_get_linkmodes(unsigned long
+- 	case PHY_INTERFACE_MODE_RGMII_RXID:
+- 	case PHY_INTERFACE_MODE_RGMII_ID:
+- 	case PHY_INTERFACE_MODE_RGMII:
+-+	case PHY_INTERFACE_MODE_PSGMII:
+- 	case PHY_INTERFACE_MODE_QSGMII:
+- 	case PHY_INTERFACE_MODE_SGMII:
+- 	case PHY_INTERFACE_MODE_GMII:
+-@@ -629,6 +630,7 @@ static int phylink_parse_mode(struct phy
+- 
+- 		switch (pl->link_config.interface) {
+- 		case PHY_INTERFACE_MODE_SGMII:
+-+		case PHY_INTERFACE_MODE_PSGMII:
+- 		case PHY_INTERFACE_MODE_QSGMII:
+- 			phylink_set(pl->supported, 10baseT_Half);
+- 			phylink_set(pl->supported, 10baseT_Full);
+---- a/include/linux/phy.h
+-+++ b/include/linux/phy.h
+-@@ -138,6 +138,7 @@ typedef enum {
+- 	PHY_INTERFACE_MODE_XGMII,
+- 	PHY_INTERFACE_MODE_XLGMII,
+- 	PHY_INTERFACE_MODE_MOCA,
+-+	PHY_INTERFACE_MODE_PSGMII,
+- 	PHY_INTERFACE_MODE_QSGMII,
+- 	PHY_INTERFACE_MODE_TRGMII,
+- 	PHY_INTERFACE_MODE_100BASEX,
+-@@ -243,6 +244,8 @@ static inline const char *phy_modes(phy_
+- 		return "xlgmii";
+- 	case PHY_INTERFACE_MODE_MOCA:
+- 		return "moca";
+-+	case PHY_INTERFACE_MODE_PSGMII:
+-+		return "psgmii";
+- 	case PHY_INTERFACE_MODE_QSGMII:
+- 		return "qsgmii";
+- 	case PHY_INTERFACE_MODE_TRGMII:
+diff --git a/target/linux/ipq40xx/patches-5.15/705-net-dsa-add-Qualcomm-IPQ4019-built-in-switch-support.patch b/target/linux/ipq40xx/patches-5.15/705-net-dsa-add-Qualcomm-IPQ4019-built-in-switch-support.patch
+deleted file mode 100644
+index d75b5e514d..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/705-net-dsa-add-Qualcomm-IPQ4019-built-in-switch-support.patch
++++ /dev/null
+@@ -1,56 +0,0 @@
+-From b5f71652b85a85ea53162e9e2b760b84fd0d254f Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robert.marko@sartura.hr>
+-Date: Mon, 1 Nov 2021 18:10:28 +0100
+-Subject: [PATCH] net: dsa: add Qualcomm IPQ4019 built-in switch support
+-
+-Qualcomm IPQ40xx SoC-s have a variant of QCA8337N switch built-in.
+-
+-It shares most of the stuff with its external counterpart, however it is
+-modified for the SoC.
+-Namely, it doesn't have second CPU port (Port 6), so it has 6 ports
+-instead of 7.
+-It also has no built-in PHY-s but rather requires external PSGMII based
+-companion PHY-s (QCA8072 and QCA8075) for which it first needs to carry
+-out calibration before using them.
+-PSGMII has a SoC built-in PHY that is used to connect to the PHY-s which
+-unfortunately requires some magic values as the datasheet doesnt document
+-the bits that are being set or the register at all.
+-
+-Since its built-in it is MMIO like other peripherals and doesn't have its
+-own MDIO bus but depends on the SoC provided one.
+-
+-CPU connection is at Port 0 and it uses some kind of a internal connection
+-and no traditional RGMII/SGMII.
+-It also doesn't use in-band tagging like other qca8k switches so a shinfo
+-based tagger is used.
+-
+-Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+----
+- drivers/net/dsa/qca/Kconfig  | 9 +++++++++
+- drivers/net/dsa/qca/Makefile | 1 +
+- 2 files changed, 10 insertions(+)
+-
+---- a/drivers/net/dsa/qca/Kconfig
+-+++ b/drivers/net/dsa/qca/Kconfig
+-@@ -15,3 +15,13 @@ config NET_DSA_QCA8K
+- 	help
+- 	  This enables support for the Qualcomm Atheros QCA8K Ethernet
+- 	  switch chips.
+-+
+-+config NET_DSA_QCA8K_IPQ4019
+-+	tristate "Qualcomm Atheros IPQ4019 built-in Ethernet switch support"
+-+	depends on HAS_IOMEM && NET_DSA
+-+	select NET_DSA_TAG_IPQ4019
+-+	select REGMAP
+-+	help
+-+	  This enables support for the Qualcomm Atheros IPQ4019 SoC built-in
+-+	  Ethernet switch.
+-+
+---- a/drivers/net/dsa/qca/Makefile
+-+++ b/drivers/net/dsa/qca/Makefile
+-@@ -1,4 +1,5 @@
+- # SPDX-License-Identifier: GPL-2.0-only
+- obj-$(CONFIG_NET_DSA_AR9331)	+= ar9331.o
+-+obj-$(CONFIG_NET_DSA_QCA8K_IPQ4019)	+= qca8k-ipq4019.o
+- obj-$(CONFIG_NET_DSA_QCA8K)	+= qca8k.o
+- qca8k-y 			+= qca8k-common.o qca8k-8xxx.o
+diff --git a/target/linux/ipq40xx/patches-5.15/706-arm-dts-ipq4019-add-switch-node.patch b/target/linux/ipq40xx/patches-5.15/706-arm-dts-ipq4019-add-switch-node.patch
+deleted file mode 100644
+index a231c7331b..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/706-arm-dts-ipq4019-add-switch-node.patch
++++ /dev/null
+@@ -1,98 +0,0 @@
+-From ebb62523990a27b3a25e422fa575619f7f725a20 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robert.marko@sartura.hr>
+-Date: Mon, 1 Nov 2021 18:15:04 +0100
+-Subject: [PATCH] arm: dts: ipq4019: add switch node
+-
+-Since the built-in IPQ40xx switch now has a driver, add the required node
+-for it to work.
+-
+-Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+----
+- arch/arm/boot/dts/qcom-ipq4019.dtsi | 78 +++++++++++++++++++++++++++++
+- 1 file changed, 78 insertions(+)
+-
+---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+-+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+-@@ -590,6 +590,82 @@
+- 			status = "disabled";
+- 		};
+- 
+-+		switch: switch@c000000 {
+-+			compatible = "qca,ipq4019-qca8337n";
+-+			reg = <0xc000000 0x80000>, <0x98000 0x800>;
+-+			reg-names = "base", "psgmii_phy";
+-+			resets = <&gcc ESS_PSGMII_ARES>;
+-+			reset-names = "psgmii_rst";
+-+			mdio = <&mdio>;
+-+			psgmii-ethphy = <&psgmiiphy>;
+-+
+-+			status = "disabled";
+-+
+-+			ports {
+-+				#address-cells = <1>;
+-+				#size-cells = <0>;
+-+
+-+				port@0 { /* MAC0 */
+-+					reg = <0>;
+-+					label = "cpu";
+-+					ethernet = <&gmac>;
+-+					phy-mode = "internal";
+-+
+-+					fixed-link {
+-+						speed = <1000>;
+-+						full-duplex;
+-+						pause;
+-+						asym-pause;
+-+					};
+-+				};
+-+
+-+				swport1: port@1 { /* MAC1 */
+-+					reg = <1>;
+-+					label = "lan1";
+-+					phy-handle = <&ethphy0>;
+-+					phy-mode = "psgmii";
+-+
+-+					status = "disabled";
+-+				};
+-+
+-+				swport2: port@2 { /* MAC2 */
+-+					reg = <2>;
+-+					label = "lan2";
+-+					phy-handle = <&ethphy1>;
+-+					phy-mode = "psgmii";
+-+
+-+					status = "disabled";
+-+				};
+-+
+-+				swport3: port@3 { /* MAC3 */
+-+					reg = <3>;
+-+					label = "lan3";
+-+					phy-handle = <&ethphy2>;
+-+					phy-mode = "psgmii";
+-+
+-+					status = "disabled";
+-+				};
+-+
+-+				swport4: port@4 { /* MAC4 */
+-+					reg = <4>;
+-+					label = "lan4";
+-+					phy-handle = <&ethphy3>;
+-+					phy-mode = "psgmii";
+-+
+-+					status = "disabled";
+-+				};
+-+
+-+				swport5: port@5 { /* MAC5 */
+-+					reg = <5>;
+-+					label = "wan";
+-+					phy-handle = <&ethphy4>;
+-+					phy-mode = "psgmii";
+-+
+-+					status = "disabled";
+-+				};
+-+			};
+-+		};
+-+
+- 		gmac: ethernet@c080000 {
+- 			compatible = "qcom,ipq4019-ess-edma";
+- 			reg = <0xc080000 0x8000>;
+diff --git a/target/linux/ipq40xx/patches-5.15/707-dt-bindings-net-add-QCA807x-PHY.patch b/target/linux/ipq40xx/patches-5.15/707-dt-bindings-net-add-QCA807x-PHY.patch
+deleted file mode 100644
+index dfb8d692ab..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/707-dt-bindings-net-add-QCA807x-PHY.patch
++++ /dev/null
+@@ -1,61 +0,0 @@
+-From c66863c1ba8995b61e6d727d78a241c734f5bb57 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robert.marko@sartura.hr>
+-Date: Thu, 1 Oct 2020 15:05:35 +0200
+-Subject: [PATCH] dt-bindings: net: add QCA807x PHY
+-
+-Add DT bindings for Qualcomm QCA807x PHY series.
+-
+-Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+----
+- include/dt-bindings/net/qcom-qca807x.h | 45 ++++++++++++++++++++++++++
+- 1 file changed, 45 insertions(+)
+- create mode 100644 include/dt-bindings/net/qcom-qca807x.h
+-
+---- /dev/null
+-+++ b/include/dt-bindings/net/qcom-qca807x.h
+-@@ -0,0 +1,45 @@
+-+/* SPDX-License-Identifier: GPL-2.0-or-later */
+-+/*
+-+ * Device Tree constants for the Qualcomm QCA807X PHYs
+-+ */
+-+
+-+#ifndef _DT_BINDINGS_QCOM_QCA807X_H
+-+#define _DT_BINDINGS_QCOM_QCA807X_H
+-+
+-+#define PSGMII_QSGMII_TX_DRIVER_140MV	0
+-+#define PSGMII_QSGMII_TX_DRIVER_160MV	1
+-+#define PSGMII_QSGMII_TX_DRIVER_180MV	2
+-+#define PSGMII_QSGMII_TX_DRIVER_200MV	3
+-+#define PSGMII_QSGMII_TX_DRIVER_220MV	4
+-+#define PSGMII_QSGMII_TX_DRIVER_240MV	5
+-+#define PSGMII_QSGMII_TX_DRIVER_260MV	6
+-+#define PSGMII_QSGMII_TX_DRIVER_280MV	7
+-+#define PSGMII_QSGMII_TX_DRIVER_300MV	8
+-+#define PSGMII_QSGMII_TX_DRIVER_320MV	9
+-+#define PSGMII_QSGMII_TX_DRIVER_400MV	10
+-+#define PSGMII_QSGMII_TX_DRIVER_500MV	11
+-+/* Default value */
+-+#define PSGMII_QSGMII_TX_DRIVER_600MV	12
+-+
+-+/* Full amplitude, full bias current */
+-+#define QCA807X_CONTROL_DAC_FULL_VOLT_BIAS		0
+-+/* Amplitude follow DSP (amplitude is adjusted based on cable length), half bias current */
+-+#define QCA807X_CONTROL_DAC_DSP_VOLT_HALF_BIAS		1
+-+/* Full amplitude, bias current follow DSP (bias current is adjusted based on cable length) */
+-+#define QCA807X_CONTROL_DAC_FULL_VOLT_DSP_BIAS		2
+-+/* Both amplitude and bias current follow DSP */
+-+#define QCA807X_CONTROL_DAC_DSP_VOLT_BIAS		3
+-+/* Full amplitude, half bias current */
+-+#define QCA807X_CONTROL_DAC_FULL_VOLT_HALF_BIAS		4
+-+/* Amplitude follow DSP setting; 1/4 bias current when cable<10m,
+-+ * otherwise half bias current
+-+ */
+-+#define QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS	5
+-+/* Full amplitude; same bias current setting with “010� and “011�,
+-+ * but half more bias is reduced when cable <10m
+-+ */
+-+#define QCA807X_CONTROL_DAC_FULL_VOLT_HALF_BIAS_SHORT	6
+-+/* Amplitude follow DSP; same bias current setting with “110�, default value */
+-+#define QCA807X_CONTROL_DAC_DSP_VOLT_HALF_BIAS_SHORT	7
+-+
+-+#endif
+diff --git a/target/linux/ipq40xx/patches-5.15/708-net-phy-Add-Qualcom-QCA807x-driver.patch b/target/linux/ipq40xx/patches-5.15/708-net-phy-Add-Qualcom-QCA807x-driver.patch
+deleted file mode 100644
+index 87be5980c4..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/708-net-phy-Add-Qualcom-QCA807x-driver.patch
++++ /dev/null
+@@ -1,50 +0,0 @@
+-From f825cdc8bfde7616a14e2163f16303a8973031d2 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robert.marko@sartura.hr>
+-Date: Wed, 7 Oct 2020 17:38:48 +0200
+-Subject: [PATCH] net: phy: Add Qualcom QCA807x driver
+-
+-This adds driver for the Qualcomm QCA8072 and QCA8075 PHY-s.
+-
+-They are 2 or 5 port IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and 1000BASE-T PHY-s.
+-
+-They feature 2 SerDes, one for PSGMII or QSGMII connection with MAC, while second one is SGMII for connection to MAC or fiber.
+-
+-Both models have a combo port that supports 1000BASE-X and 100BASE-FX fiber.
+-
+-Each PHY inside of QCA807x series has 4 digitally controlled output only pins that natively drive LED-s.
+-But some vendors used these to driver generic LED-s controlled by userspace,
+-so lets enable registering each PHY as GPIO controller and add driver for it.
+-
+-These are commonly used in Qualcomm IPQ40xx, IPQ60xx and IPQ807x boards.
+-
+-Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+----
+- drivers/net/phy/Kconfig  | 6 ++++++
+- drivers/net/phy/Makefile | 1 +
+- 2 files changed, 7 insertions(+)
+-
+---- a/drivers/net/phy/Kconfig
+-+++ b/drivers/net/phy/Kconfig
+-@@ -346,6 +346,12 @@ config AT803X_PHY
+- 	  Currently supports the AR8030, AR8031, AR8033, AR8035 and internal
+- 	  QCA8337(Internal qca8k PHY) model
+- 
+-+config QCA807X_PHY
+-+	tristate "Qualcomm QCA807X PHYs"
+-+	depends on OF_MDIO
+-+	help
+-+	  Currently supports the QCA8072 and QCA8075 models.
+-+
+- config QSEMI_PHY
+- 	tristate "Quality Semiconductor PHYs"
+- 	help
+---- a/drivers/net/phy/Makefile
+-+++ b/drivers/net/phy/Makefile
+-@@ -92,6 +92,7 @@ obj-$(CONFIG_NATIONAL_PHY)	+= national.o
+- obj-$(CONFIG_NXP_C45_TJA11XX_PHY)	+= nxp-c45-tja11xx.o
+- obj-$(CONFIG_NXP_TJA11XX_PHY)	+= nxp-tja11xx.o
+- obj-$(CONFIG_QSEMI_PHY)		+= qsemi.o
+-+obj-$(CONFIG_QCA807X_PHY)		+= qca807x.o
+- obj-$(CONFIG_REALTEK_PHY)	+= realtek.o
+- obj-$(CONFIG_RENESAS_PHY)	+= uPD60620.o
+- obj-$(CONFIG_ROCKCHIP_PHY)	+= rockchip.o
+diff --git a/target/linux/ipq40xx/patches-5.15/709-arm-dts-ipq4019-QCA807x-properties.patch b/target/linux/ipq40xx/patches-5.15/709-arm-dts-ipq4019-QCA807x-properties.patch
+deleted file mode 100644
+index cc4b44b393..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/709-arm-dts-ipq4019-QCA807x-properties.patch
++++ /dev/null
+@@ -1,61 +0,0 @@
+-From e0fa88eaa3c176b71e563da68949ac2ab45aaa61 Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robert.marko@sartura.hr>
+-Date: Fri, 2 Oct 2020 10:43:26 +0200
+-Subject: [PATCH] arm: dts: ipq4019: QCA807x properties
+-
+-This adds necessary DT properties for QCA807x PHY-s to IPQ4019 DTSI.
+-
+-Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+----
+- arch/arm/boot/dts/qcom-ipq4019.dtsi | 18 ++++++++++++++++++
+- 1 file changed, 18 insertions(+)
+-
+---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+-+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+-@@ -8,6 +8,7 @@
+- #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
+- #include <dt-bindings/interrupt-controller/arm-gic.h>
+- #include <dt-bindings/interrupt-controller/irq.h>
+-+#include <dt-bindings/net/qcom-qca807x.h>
+- 
+- / {
+- 	#address-cells = <1>;
+-@@ -726,22 +727,38 @@
+- 
+- 			ethphy0: ethernet-phy@0 {
+- 				reg = <0>;
+-+
+-+				qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
+- 			};
+- 
+- 			ethphy1: ethernet-phy@1 {
+- 				reg = <1>;
+-+
+-+				qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
+- 			};
+- 
+- 			ethphy2: ethernet-phy@2 {
+- 				reg = <2>;
+-+
+-+				qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
+- 			};
+- 
+- 			ethphy3: ethernet-phy@3 {
+- 				reg = <3>;
+-+
+-+				qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
+- 			};
+- 
+- 			ethphy4: ethernet-phy@4 {
+- 				reg = <4>;
+-+
+-+				qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
+-+			};
+-+
+-+			psgmiiphy: psgmii-phy@5 {
+-+				reg = <5>;
+-+
+-+				qcom,tx-driver-strength = <PSGMII_QSGMII_TX_DRIVER_300MV>;
+- 			};
+- 		};
+- 
+diff --git a/target/linux/ipq40xx/patches-5.15/850-soc-add-qualcomm-syscon.patch b/target/linux/ipq40xx/patches-5.15/850-soc-add-qualcomm-syscon.patch
+deleted file mode 100644
+index 9b44a4c885..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/850-soc-add-qualcomm-syscon.patch
++++ /dev/null
+@@ -1,180 +0,0 @@
+-From: Christian Lamparter <chunkeey@googlemail.com>
+-Subject: SoC: add qualcomm syscon
+---- a/drivers/soc/qcom/Makefile
+-+++ b/drivers/soc/qcom/Makefile
+-@@ -21,6 +21,7 @@ obj-$(CONFIG_QCOM_SMP2P)	+= smp2p.o
+- obj-$(CONFIG_QCOM_SMSM)	+= smsm.o
+- obj-$(CONFIG_QCOM_SOCINFO)	+= socinfo.o
+- obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
+-+obj-$(CONFIG_QCOM_TCSR)	 += qcom_tcsr.o
+- obj-$(CONFIG_QCOM_APR) += apr.o
+- obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
+- obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
+---- a/drivers/soc/qcom/Kconfig
+-+++ b/drivers/soc/qcom/Kconfig
+-@@ -192,6 +192,13 @@ config QCOM_SOCINFO
+- 	 Say yes here to support the Qualcomm socinfo driver, providing
+- 	 information about the SoC to user space.
+- 
+-+config QCOM_TCSR
+-+	tristate "QCOM Top Control and Status Registers"
+-+	depends on ARCH_QCOM
+-+	help
+-+	  Say y here to enable TCSR support.  The TCSR provides control
+-+	  functions for various peripherals.
+-+
+- config QCOM_WCNSS_CTRL
+- 	tristate "Qualcomm WCNSS control driver"
+- 	depends on ARCH_QCOM || COMPILE_TEST
+---- /dev/null
+-+++ b/drivers/soc/qcom/qcom_tcsr.c
+-@@ -0,0 +1,98 @@
+-+/*
+-+ * Copyright (c) 2014, The Linux foundation. All rights reserved.
+-+ *
+-+ * This program is free software; you can redistribute it and/or modify
+-+ * it under the terms of the GNU General Public License rev 2 and
+-+ * only rev 2 as published by the free Software foundation.
+-+ *
+-+ * This program is distributed in the hope that it will be useful,
+-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+-+ * MERCHANTABILITY or fITNESS fOR A PARTICULAR PURPOSE.  See the
+-+ * GNU General Public License for more details.
+-+ */
+-+
+-+#include <linux/clk.h>
+-+#include <linux/err.h>
+-+#include <linux/io.h>
+-+#include <linux/module.h>
+-+#include <linux/of.h>
+-+#include <linux/of_platform.h>
+-+#include <linux/platform_device.h>
+-+
+-+#define TCSR_USB_PORT_SEL	0xb0
+-+#define TCSR_USB_HSPHY_CONFIG	0xC
+-+
+-+#define TCSR_ESS_INTERFACE_SEL_OFFSET   0x0
+-+#define TCSR_ESS_INTERFACE_SEL_MASK     0xf
+-+
+-+#define TCSR_WIFI0_GLB_CFG_OFFSET	0x0
+-+#define TCSR_WIFI1_GLB_CFG_OFFSET	0x4
+-+#define TCSR_PNOC_SNOC_MEMTYPE_M0_M2	0x4
+-+
+-+static int tcsr_probe(struct platform_device *pdev)
+-+{
+-+	struct resource *res;
+-+	const struct device_node *node = pdev->dev.of_node;
+-+	void __iomem *base;
+-+	u32 val;
+-+
+-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+-+	base = devm_ioremap_resource(&pdev->dev, res);
+-+	if (IS_ERR(base))
+-+		return PTR_ERR(base);
+-+
+-+	if (!of_property_read_u32(node, "qcom,usb-ctrl-select", &val)) {
+-+		dev_err(&pdev->dev, "setting usb port select = %d\n", val);
+-+		writel(val, base + TCSR_USB_PORT_SEL);
+-+	}
+-+
+-+	if (!of_property_read_u32(node, "qcom,usb-hsphy-mode-select", &val)) {
+-+		dev_info(&pdev->dev, "setting usb hs phy mode select = %x\n", val);
+-+		writel(val, base + TCSR_USB_HSPHY_CONFIG);
+-+	}
+-+
+-+	if (!of_property_read_u32(node, "qcom,ess-interface-select", &val)) {
+-+		u32 tmp = 0;
+-+		dev_info(&pdev->dev, "setting ess interface select = %x\n", val);
+-+		tmp = readl(base + TCSR_ESS_INTERFACE_SEL_OFFSET);
+-+		tmp = tmp & (~TCSR_ESS_INTERFACE_SEL_MASK);
+-+		tmp = tmp | (val&TCSR_ESS_INTERFACE_SEL_MASK);
+-+		writel(tmp, base + TCSR_ESS_INTERFACE_SEL_OFFSET);
+-+        }
+-+
+-+	if (!of_property_read_u32(node, "qcom,wifi_glb_cfg", &val)) {
+-+		dev_info(&pdev->dev, "setting wifi_glb_cfg = %x\n", val);
+-+		writel(val, base + TCSR_WIFI0_GLB_CFG_OFFSET);
+-+		writel(val, base + TCSR_WIFI1_GLB_CFG_OFFSET);
+-+	}
+-+
+-+	if (!of_property_read_u32(node, "qcom,wifi_noc_memtype_m0_m2", &val)) {
+-+		dev_info(&pdev->dev,
+-+			"setting wifi_noc_memtype_m0_m2 = %x\n", val);
+-+		writel(val, base + TCSR_PNOC_SNOC_MEMTYPE_M0_M2);
+-+	}
+-+
+-+	return 0;
+-+}
+-+
+-+static const struct of_device_id tcsr_dt_match[] = {
+-+	{ .compatible = "qcom,tcsr", },
+-+	{ },
+-+};
+-+
+-+MODULE_DEVICE_TABLE(of, tcsr_dt_match);
+-+
+-+static struct platform_driver tcsr_driver = {
+-+	.driver = {
+-+		.name		= "tcsr",
+-+		.owner		= THIS_MODULE,
+-+		.of_match_table	= tcsr_dt_match,
+-+	},
+-+	.probe = tcsr_probe,
+-+};
+-+
+-+module_platform_driver(tcsr_driver);
+-+
+-+MODULE_AUTHOR("Andy Gross <agross@codeaurora.org>");
+-+MODULE_DESCRIPTION("QCOM TCSR driver");
+-+MODULE_LICENSE("GPL v2");
+---- /dev/null
+-+++ b/include/dt-bindings/soc/qcom,tcsr.h
+-@@ -0,0 +1,48 @@
+-+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+-+ *
+-+ * This program is free software; you can redistribute it and/or modify
+-+ * it under the terms of the GNU General Public License version 2 and
+-+ * only version 2 as published by the Free Software Foundation.
+-+ *
+-+ * This program is distributed in the hope that it will be useful,
+-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-+ * GNU General Public License for more details.
+-+ */
+-+#ifndef __DT_BINDINGS_QCOM_TCSR_H
+-+#define __DT_BINDINGS_QCOM_TCSR_H
+-+
+-+#define TCSR_USB_SELECT_USB3_P0		0x1
+-+#define TCSR_USB_SELECT_USB3_P1		0x2
+-+#define TCSR_USB_SELECT_USB3_DUAL	0x3
+-+
+-+/* IPQ40xx HS PHY Mode Select */
+-+#define TCSR_USB_HSPHY_HOST_MODE	0x00E700E7
+-+#define TCSR_USB_HSPHY_DEVICE_MODE	0x00C700E7
+-+
+-+/* IPQ40xx ess interface mode select */
+-+#define TCSR_ESS_PSGMII              0
+-+#define TCSR_ESS_PSGMII_RGMII5       1
+-+#define TCSR_ESS_PSGMII_RMII0        2
+-+#define TCSR_ESS_PSGMII_RMII1        4
+-+#define TCSR_ESS_PSGMII_RMII0_RMII1  6
+-+#define TCSR_ESS_PSGMII_RGMII4       9
+-+
+-+/*
+-+ * IPQ40xx WiFi Global Config
+-+ * Bit 30:AXID_EN
+-+ * Enable AXI master bus Axid translating to confirm all txn submitted by order
+-+ * Bit 24: Use locally generated socslv_wxi_bvalid
+-+ * 1:  use locally generate socslv_wxi_bvalid for performance.
+-+ * 0:  use SNOC socslv_wxi_bvalid.
+-+ */
+-+#define TCSR_WIFI_GLB_CFG		0x41000000
+-+
+-+/* IPQ40xx MEM_TYPE_SEL_M0_M2 Select Bit 26:24 - 2 NORMAL */
+-+#define TCSR_WIFI_NOC_MEMTYPE_M0_M2	0x02222222
+-+
+-+/* TCSR A/B REG */
+-+#define IPQ806X_TCSR_REG_A_ADM_CRCI_MUX_SEL     0
+-+#define IPQ806X_TCSR_REG_B_ADM_CRCI_MUX_SEL     1
+-+
+-+#endif
+diff --git a/target/linux/ipq40xx/patches-5.15/900-dts-ipq4019-ap-dk01.1.patch b/target/linux/ipq40xx/patches-5.15/900-dts-ipq4019-ap-dk01.1.patch
+deleted file mode 100644
+index 145d3f49ed..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/900-dts-ipq4019-ap-dk01.1.patch
++++ /dev/null
+@@ -1,164 +0,0 @@
+---- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+-+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+-@@ -15,6 +15,7 @@
+-  */
+- 
+- #include "qcom-ipq4019.dtsi"
+-+#include <dt-bindings/soc/qcom,tcsr.h>
+- 
+- / {
+- 	model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
+-@@ -29,6 +30,32 @@
+- 	};
+- 
+- 	soc {
+-+		tcsr@194b000 {
+-+			/* select hostmode */
+-+			compatible = "qcom,tcsr";
+-+			reg = <0x194b000 0x100>;
+-+			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+-+			status = "okay";
+-+		};
+-+
+-+		ess_tcsr@1953000 {
+-+			compatible = "qcom,tcsr";
+-+			reg = <0x1953000 0x1000>;
+-+			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+-+		};
+-+
+-+		tcsr@1949000 {
+-+			compatible = "qcom,tcsr";
+-+			reg = <0x1949000 0x100>;
+-+			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+-+		};
+-+
+-+		tcsr@1957000 {
+-+			compatible = "qcom,tcsr";
+-+			reg = <0x1957000 0x100>;
+-+			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+-+		};
+-+
+- 		rng@22000 {
+- 			status = "okay";
+- 		};
+-@@ -74,14 +101,6 @@
+- 			pinctrl-names = "default";
+- 			status = "okay";
+- 			cs-gpios = <&tlmm 54 0>;
+--
+--			mx25l25635e@0 {
+--				#address-cells = <1>;
+--				#size-cells = <1>;
+--				reg = <0>;
+--				compatible = "mx25l25635e";
+--				spi-max-frequency = <24000000>;
+--			};
+- 		};
+- 
+- 		serial@78af000 {
+-@@ -109,5 +128,29 @@
+- 		wifi@a800000 {
+- 			status = "okay";
+- 		};
+-+
+-+		mdio@90000 {
+-+			status = "okay";
+-+		};
+-+
+-+		usb3_ss_phy: ssphy@9a000 {
+-+			status = "okay";
+-+		};
+-+
+-+		usb3_hs_phy: hsphy@a6000 {
+-+			status = "okay";
+-+		};
+-+
+-+		usb3: usb3@8af8800 {
+-+			status = "okay";
+-+		};
+-+
+-+		usb2_hs_phy: hsphy@a8000 {
+-+			status = "okay";
+-+		};
+-+
+-+		usb2: usb2@60f8800 {
+-+			status = "okay";
+-+		};
+- 	};
+- };
+---- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
+-+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
+-@@ -18,5 +18,73 @@
+- 
+- / {
+- 	model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
+-+	compatible = "qcom,ap-dk01.1-c1", "qcom,ap-dk01.2-c1";
+- 
+-+	memory {
+-+		device_type = "memory";
+-+		reg = <0x80000000 0x10000000>;
+-+	};
+-+};
+-+
+-+&blsp1_spi1 {
+-+	mx25l25635f@0 {
+-+		compatible = "mx25l25635f", "jedec,spi-nor";
+-+		#address-cells = <1>;
+-+		#size-cells = <1>;
+-+		reg = <0>;
+-+		spi-max-frequency = <24000000>;
+-+
+-+		SBL1@0 {
+-+			label = "SBL1";
+-+			reg = <0x0 0x40000>;
+-+			read-only;
+-+		};
+-+		MIBIB@40000 {
+-+			label = "MIBIB";
+-+			reg = <0x40000 0x20000>;
+-+			read-only;
+-+		};
+-+		QSEE@60000 {
+-+			label = "QSEE";
+-+			reg = <0x60000 0x60000>;
+-+			read-only;
+-+		};
+-+		CDT@c0000 {
+-+			label = "CDT";
+-+			reg = <0xc0000 0x10000>;
+-+			read-only;
+-+		};
+-+		DDRPARAMS@d0000 {
+-+			label = "DDRPARAMS";
+-+			reg = <0xd0000 0x10000>;
+-+			read-only;
+-+		};
+-+		APPSBLENV@e0000 {
+-+			label = "APPSBLENV";
+-+			reg = <0xe0000 0x10000>;
+-+			read-only;
+-+		};
+-+		APPSBL@f0000 {
+-+			label = "APPSBL";
+-+			reg = <0xf0000 0x80000>;
+-+			read-only;
+-+		};
+-+		ART@170000 {
+-+			label = "ART";
+-+			reg = <0x170000 0x10000>;
+-+			read-only;
+-+		};
+-+		kernel@180000 {
+-+			label = "kernel";
+-+			reg = <0x180000 0x400000>;
+-+		};
+-+		rootfs@580000 {
+-+			label = "rootfs";
+-+			reg = <0x580000 0x1600000>;
+-+		};
+-+		firmware@180000 {
+-+			label = "firmware";
+-+			reg = <0x180000 0x1a00000>;
+-+		};
+-+	};
+- };
+diff --git a/target/linux/ipq40xx/patches-5.15/900-pstore.patch b/target/linux/ipq40xx/patches-5.15/900-pstore.patch
+deleted file mode 100644
+index 940ee02020..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/900-pstore.patch
++++ /dev/null
+@@ -1,17 +0,0 @@
+-Index: linux-5.15.120/arch/arm/boot/dts/qcom-ipq4019.dtsi
+-===================================================================
+---- linux-5.15.120.orig/arch/arm/boot/dts/qcom-ipq4019.dtsi
+-+++ linux-5.15.120/arch/arm/boot/dts/qcom-ipq4019.dtsi
+-@@ -32,6 +32,12 @@
+- 			reg = <0x87e80000 0x180000>;
+- 			no-map;
+- 		};
+-+
+-+		ramoops@87f00000 {
+-+			compatible = "ramoops";
+-+			reg = <0x87df0000 0x10000>;
+-+			record-size = <0x1000>;
+-+		};
+- 	};
+- 
+- 	aliases {
+diff --git a/target/linux/ipq40xx/patches-5.15/902-dts-ipq4019-ap-dk04.1.patch b/target/linux/ipq40xx/patches-5.15/902-dts-ipq4019-ap-dk04.1.patch
+deleted file mode 100644
+index 05778a638f..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/902-dts-ipq4019-ap-dk04.1.patch
++++ /dev/null
+@@ -1,167 +0,0 @@
+---- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
+-+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
+-@@ -17,53 +17,79 @@
+- 		stdout-path = "serial0:115200n8";
+- 	};
+- 
+--	memory {
+--		device_type = "memory";
+--		reg = <0x80000000 0x10000000>; /* 256MB */
+--	};
+--
+- 	soc {
+-+		rng@22000 {
+-+			status = "okay";
+-+		};
+-+
+- 		pinctrl@1000000 {
+- 			serial_0_pins: serial0-pinmux {
+--				pins = "gpio16", "gpio17";
+--				function = "blsp_uart0";
+--				bias-disable;
+-+				mux {
+-+					pins = "gpio16", "gpio17";
+-+					function = "blsp_uart0";
+-+					bias-disable;
+-+				};
+- 			};
+- 
+- 			serial_1_pins: serial1-pinmux {
+--				pins = "gpio8", "gpio9",
+--					"gpio10", "gpio11";
+--				function = "blsp_uart1";
+--				bias-disable;
+-+				mux {
+-+					pins = "gpio8", "gpio9";
+-+					function = "blsp_uart1";
+-+					bias-disable;
+-+				};
+- 			};
+- 
+- 			spi_0_pins: spi-0-pinmux {
+- 				pinmux {
+- 					function = "blsp_spi0";
+- 					pins = "gpio13", "gpio14", "gpio15";
+--					bias-disable;
+- 				};
+- 				pinmux_cs {
+- 					function = "gpio";
+- 					pins = "gpio12";
+-+				};
+-+				pinconf {
+-+					pins = "gpio13", "gpio14", "gpio15";
+-+					drive-strength = <12>;
+-+					bias-disable;
+-+				};
+-+				pinconf_cs {
+-+					pins = "gpio12";
+-+					drive-strength = <2>;
+- 					bias-disable;
+- 					output-high;
+- 				};
+- 			};
+- 
+- 			i2c_0_pins: i2c-0-pinmux {
+--				pins = "gpio20", "gpio21";
+--				function = "blsp_i2c0";
+--				bias-disable;
+-+				pinmux {
+-+					function = "blsp_i2c0";
+-+					pins = "gpio10", "gpio11";
+-+				};
+-+				pinconf {
+-+					pins = "gpio10", "gpio11";
+-+					drive-strength = <16>;
+-+					bias-disable;
+-+				};
+- 			};
+- 
+- 			nand_pins: nand-pins {
+--				pins = "gpio53", "gpio55", "gpio56",
+--					"gpio57", "gpio58", "gpio59",
+--					"gpio60", "gpio62", "gpio63",
+--					"gpio64", "gpio65", "gpio66",
+--					"gpio67", "gpio68", "gpio69";
+--				function = "qpic";
+-+				pullups {
+-+					pins = "gpio52", "gpio53", "gpio58",
+-+						"gpio59";
+-+					function = "qpic";
+-+					bias-pull-up;
+-+				};
+-+
+-+				pulldowns {
+-+					pins = "gpio54", "gpio55", "gpio56",
+-+						"gpio57", "gpio60", "gpio61",
+-+						"gpio62", "gpio63", "gpio64",
+-+						"gpio65", "gpio66", "gpio67",
+-+						"gpio68", "gpio69";
+-+					function = "qpic";
+-+					bias-pull-down;
+-+				};
+- 			};
+- 		};
+- 
+-@@ -89,11 +115,11 @@
+- 			status = "okay";
+- 			cs-gpios = <&tlmm 12 0>;
+- 
+--			m25p80@0 {
+-+			mx25l25635e@0 {
+- 				#address-cells = <1>;
+- 				#size-cells = <1>;
+- 				reg = <0>;
+--				compatible = "n25q128a11";
+-+				compatible = "mx25l25635e";
+- 				spi-max-frequency = <24000000>;
+- 			};
+- 		};
+-@@ -103,9 +129,48 @@
+- 			perst-gpio = <&tlmm 38 0x1>;
+- 		};
+- 
+-+		i2c0: i2c@78b7000 { /* BLSP1 QUP2 */
+-+			pinctrl-0 = <&i2c_0_pins>;
+-+			pinctrl-names = "default";
+-+
+-+			status = "okay";
+-+		};
+-+
+- 		qpic-nand@79b0000 {
+- 			pinctrl-0 = <&nand_pins>;
+- 			pinctrl-names = "default";
+- 		};
+-+
+-+		usb3_ss_phy: ssphy@9a000 {
+-+			status = "okay";
+-+		};
+-+
+-+		usb3_hs_phy: hsphy@a6000 {
+-+			status = "okay";
+-+		};
+-+
+-+		usb3: usb3@8af8800 {
+-+			status = "okay";
+-+		};
+-+
+-+		usb2_hs_phy: hsphy@a8000 {
+-+			status = "okay";
+-+		};
+-+
+-+		usb2: usb2@60f8800 {
+-+			status = "okay";
+-+		};
+-+
+-+		cryptobam: dma@8e04000 {
+-+			status = "okay";
+-+		};
+-+
+-+		crypto@8e3a000 {
+-+			status = "okay";
+-+		};
+-+
+-+		watchdog@b017000 {
+-+			status = "okay";
+-+		};
+- 	};
+- };
+diff --git a/target/linux/ipq40xx/patches-5.15/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch b/target/linux/ipq40xx/patches-5.15/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch
+deleted file mode 100644
+index e24895deec..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch
++++ /dev/null
+@@ -1,27 +0,0 @@
+-From c87df89a82c17411cd6b98e5afaa1203ee9508dc Mon Sep 17 00:00:00 2001
+-From: Robert Marko <robimarko@gmail.com>
+-Date: Thu, 18 May 2023 12:16:02 +0200
+-Subject: [PATCH] Revert "firmware: qcom_scm: Clear download bit during reboot"
+-
+-This reverts commit a3ea89b5978dbcd0fa55f675c5a1e04611093709.
+-
+-It is breaking reboot on IPQ4019 boards, so revert until a proper fix
+-is found.
+-
+-Signed-off-by: Robert Marko <robimarko@gmail.com>
+----
+- drivers/firmware/qcom_scm.c | 3 ++-
+- 1 file changed, 2 insertions(+), 1 deletion(-)
+-
+---- a/drivers/firmware/qcom_scm.c
+-+++ b/drivers/firmware/qcom_scm.c
+-@@ -1352,7 +1352,8 @@ static int qcom_scm_probe(struct platfor
+- static void qcom_scm_shutdown(struct platform_device *pdev)
+- {
+- 	/* Clean shutdown, disable download mode to allow normal restart */
+--	qcom_scm_set_download_mode(false);
+-+	if (download_mode)
+-+		qcom_scm_set_download_mode(false);
+- }
+- 
+- static const struct of_device_id qcom_scm_dt_match[] = {
+diff --git a/target/linux/ipq40xx/patches-5.15/998-lantiq-atm-hacks.patch b/target/linux/ipq40xx/patches-5.15/998-lantiq-atm-hacks.patch
+deleted file mode 100644
+index c15a4b3ae3..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/998-lantiq-atm-hacks.patch
++++ /dev/null
+@@ -1,43 +0,0 @@
+-From: John Crispin <blogic@openwrt.org>
+-Date: Fri, 3 Aug 2012 10:27:25 +0200
+-Subject: [PATCH 04/36] MIPS: lantiq: add atm hack
+-
+-Signed-off-by: John Crispin <blogic@openwrt.org>
+---- a/include/uapi/linux/atm.h
+-+++ b/include/uapi/linux/atm.h
+-@@ -131,8 +131,14 @@
+- #define ATM_ABR		4
+- #define ATM_ANYCLASS	5		/* compatible with everything */
+- 
+-+#define ATM_VBR_NRT     ATM_VBR
+-+#define ATM_VBR_RT      6
+-+#define ATM_UBR_PLUS    7
+-+#define ATM_GFR         8
+-+
+- #define ATM_MAX_PCR	-1		/* maximum available PCR */
+- 
+-+
+- struct atm_trafprm {
+- 	unsigned char	traffic_class;	/* traffic class (ATM_UBR, ...) */
+- 	int		max_pcr;	/* maximum PCR in cells per second */
+-@@ -155,6 +161,9 @@ struct atm_trafprm {
+- 	unsigned int adtf      :10;     /* ACR Decrease Time Factor (10-bit) */
+- 	unsigned int cdf       :3;      /* Cutoff Decrease Factor (3-bit) */
+-         unsigned int spare     :9;      /* spare bits */ 
+-+	int		scr;		/* sustained rate in cells per second */
+-+	int		mbs;		/* maximum burst size (MBS) in cells */
+-+	int		cdv;		/* Cell delay variation */
+- };
+- 
+- struct atm_qos {
+---- a/net/atm/proc.c
+-+++ b/net/atm/proc.c
+-@@ -141,7 +141,7 @@ static void *vcc_seq_next(struct seq_fil
+- static void pvc_info(struct seq_file *seq, struct atm_vcc *vcc)
+- {
+- 	static const char *const class_name[] = {
+--		"off", "UBR", "CBR", "VBR", "ABR"};
+-+		"off","UBR","CBR","NTR-VBR","ABR","ANY","RT-VBR","UBR+","GFR"};
+- 	static const char *const aal_name[] = {
+- 		"---",	"1",	"2",	"3/4",	/*  0- 3 */
+- 		"???",	"5",	"???",	"???",	/*  4- 7 */
+diff --git a/target/linux/ipq40xx/patches-5.15/999-atm-mpoa-intel-dsl-phy-support.patch b/target/linux/ipq40xx/patches-5.15/999-atm-mpoa-intel-dsl-phy-support.patch
+deleted file mode 100644
+index b774fc39d8..0000000000
+--- a/target/linux/ipq40xx/patches-5.15/999-atm-mpoa-intel-dsl-phy-support.patch
++++ /dev/null
+@@ -1,137 +0,0 @@
+-From: Subhra Banerjee <subhrax.banerjee@intel.com>
+-Date: Fri, 31 Aug 2018 12:01:19 +0530
+-Subject: [PATCH] UGW_SW-29163: ATM oam support
+-
+---- a/drivers/net/ppp/ppp_generic.c
+-+++ b/drivers/net/ppp/ppp_generic.c
+-@@ -2952,6 +2952,22 @@ char *ppp_dev_name(struct ppp_channel *c
+- 	return name;
+- }
+- 
+-+/*
+-+ * Return the PPP device interface pointer
+-+ */
+-+struct net_device *ppp_device(struct ppp_channel *chan)
+-+{
+-+	struct channel *pch = chan->ppp;
+-+	struct net_device *dev = NULL;
+-+
+-+	if (pch) {
+-+		read_lock_bh(&pch->upl);
+-+		if (pch->ppp && pch->ppp->dev)
+-+			dev = pch->ppp->dev;
+-+		read_unlock_bh(&pch->upl);
+-+	}
+-+	return dev;
+-+}
+- 
+- /*
+-  * Disconnect a channel from the generic layer.
+-@@ -3598,6 +3614,7 @@ EXPORT_SYMBOL(ppp_unregister_channel);
+- EXPORT_SYMBOL(ppp_channel_index);
+- EXPORT_SYMBOL(ppp_unit_number);
+- EXPORT_SYMBOL(ppp_dev_name);
+-+EXPORT_SYMBOL(ppp_device);
+- EXPORT_SYMBOL(ppp_input);
+- EXPORT_SYMBOL(ppp_input_error);
+- EXPORT_SYMBOL(ppp_output_wakeup);
+---- a/include/linux/ppp_channel.h
+-+++ b/include/linux/ppp_channel.h
+-@@ -74,6 +74,9 @@ extern int ppp_unit_number(struct ppp_ch
+- /* Get the device name associated with a channel, or NULL if none */
+- extern char *ppp_dev_name(struct ppp_channel *);
+- 
+-+/* Get the device pointer associated with a channel, or NULL if none */
+-+extern struct net_device *ppp_device(struct ppp_channel *);
+-+
+- /*
+-  * SMP locking notes:
+-  * The channel code must ensure that when it calls ppp_unregister_channel,
+---- a/net/atm/Kconfig
+-+++ b/net/atm/Kconfig
+-@@ -56,6 +56,12 @@ config ATM_MPOA
+- 	  subnetwork boundaries. These shortcut connections bypass routers
+- 	  enhancing overall network performance.
+- 
+-+config ATM_MPOA_INTEL_DSL_PHY_SUPPORT
+-+	bool "Intel DSL Phy MPOA support"
+-+	depends on ATM && INET && ATM_MPOA!=n
+-+	help
+-+	  Add support for Intel DSL Phy ATM MPOA
+-+
+- config ATM_BR2684
+- 	tristate "RFC1483/2684 Bridged protocols"
+- 	depends on ATM && INET
+---- a/net/atm/br2684.c
+-+++ b/net/atm/br2684.c
+-@@ -596,6 +596,11 @@ static int br2684_regvcc(struct atm_vcc
+- 	atmvcc->push = br2684_push;
+- 	atmvcc->pop = br2684_pop;
+- 	atmvcc->release_cb = br2684_release_cb;
+-+#if IS_ENABLED(CONFIG_ATM_MPOA_INTEL_DSL_PHY_SUPPORT)
+-+	if (atm_hook_mpoa_setup) /* IPoA or EoA w/o FCS */
+-+		atm_hook_mpoa_setup(atmvcc, brdev->payload == p_routed ? 3 : 0,
+-+			brvcc->encaps == BR2684_ENCAPS_LLC ? 1 : 0, net_dev);
+-+#endif
+- 	atmvcc->owner = THIS_MODULE;
+- 
+- 	/* initialize netdev carrier state */
+---- a/net/atm/common.c
+-+++ b/net/atm/common.c
+-@@ -137,6 +137,11 @@ static struct proto vcc_proto = {
+- 	.release_cb = vcc_release_cb,
+- };
+- 
+-+#if IS_ENABLED(CONFIG_ATM_MPOA_INTEL_DSL_PHY_SUPPORT)
+-+void (*atm_hook_mpoa_setup)(struct atm_vcc *, int, int, struct net_device *) = NULL;
+-+EXPORT_SYMBOL(atm_hook_mpoa_setup);
+-+#endif
+-+
+- int vcc_create(struct net *net, struct socket *sock, int protocol, int family, int kern)
+- {
+- 	struct sock *sk;
+---- a/net/atm/common.h
+-+++ b/net/atm/common.h
+-@@ -53,4 +53,6 @@ int svc_change_qos(struct atm_vcc *vcc,s
+- 
+- void atm_dev_release_vccs(struct atm_dev *dev);
+- 
+-+extern void (*atm_hook_mpoa_setup)(struct atm_vcc *, int, int, struct net_device *);
+-+
+- #endif
+---- a/net/atm/mpc.c
+-+++ b/net/atm/mpc.c
+-@@ -31,6 +31,7 @@
+- /* Modular too */
+- #include <linux/module.h>
+- 
+-+#include "common.h"
+- #include "lec.h"
+- #include "mpc.h"
+- #include "resources.h"
+-@@ -645,6 +646,10 @@ static int atm_mpoa_vcc_attach(struct at
+- 	vcc->proto_data = mpc->dev;
+- 	vcc->push = mpc_push;
+- 
+-+#if IS_ENABLED(CONFIG_ATM_MPOA_INTEL_DSL_PHY_SUPPORT)
+-+	if (atm_hook_mpoa_setup) /* IPoA, LLC */
+-+		atm_hook_mpoa_setup(vcc, 3, 1, mpc->dev);
+-+#endif
+- 	return 0;
+- }
+- 
+---- a/net/atm/pppoatm.c
+-+++ b/net/atm/pppoatm.c
+-@@ -422,6 +422,12 @@ static int pppoatm_assign_vcc(struct atm
+- 	atmvcc->user_back = pvcc;
+- 	atmvcc->push = pppoatm_push;
+- 	atmvcc->pop = pppoatm_pop;
+-+#if IS_ENABLED(CONFIG_ATM_MPOA_INTEL_DSL_PHY_SUPPORT)
+-+	if (atm_hook_mpoa_setup) /* PPPoA */
+-+		atm_hook_mpoa_setup(atmvcc, 2,
+-+			pvcc->encaps == e_llc ? 1 : 0,
+-+			ppp_device(&pvcc->chan));
+-+#endif
+- 	atmvcc->release_cb = pppoatm_release_cb;
+- 	__module_get(THIS_MODULE);
+- 	atmvcc->owner = THIS_MODULE;
+-- 
+2.34.1
+
diff --git a/patches/0057-ipq40xx-add-v5.4-backport.patch b/patches/0057-ipq40xx-add-v5.4-backport.patch
new file mode 100644
index 000000000..98ffe0251
--- /dev/null
+++ b/patches/0057-ipq40xx-add-v5.4-backport.patch
@@ -0,0 +1,146640 @@
+From a704d32f181200a1d395c8205aa6d95774dfc64a Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Mon, 4 Sep 2023 12:30:52 +0200
+Subject: [PATCH 57/58] ipq40xx: add v5.4 backport
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ ...dcode-path-to-awk-in-scripts-ld-vers.patch |   30 +
+ .../011-kbuild-export-SUBARCH.patch           |   21 +
+ ...lper-to-get-data-pointed-by-a-symbol.patch |   53 +
+ ...-namespace_from_kstrtabns-to-not-har.patch |   62 +
+ ...Implement-optimised-checksum-routine.patch |  176 +
+ ...m-Fix-pathological-zero-length-calls.patch |   28 +
+ ...y-up-lib-crypto-Kconfig-and-Makefile.patch |  112 +
+ ...ve-existing-library-code-into-lib-cr.patch |  668 ++
+ ...a-depend-on-generic-chacha-library-i.patch |  192 +
+ ...a-expose-SIMD-ChaCha-routine-as-libr.patch |  205 +
+ ...cha-depend-on-generic-chacha-library.patch |  129 +
+ ...cha-expose-arm64-ChaCha-routine-as-l.patch |  138 +
+ ...a-import-Eric-Biggers-s-scalar-accel.patch |  480 +
+ ...a-remove-dependency-on-generic-ChaCh.patch |  691 ++
+ ...a-expose-ARM-ChaCha-routine-as-libra.patch |  108 +
+ ...ha-import-32r2-ChaCha-code-from-Zinc.patch |  451 +
+ ...ha-wire-up-accelerated-32r2-code-fro.patch |  559 ++
+ ...cha-unexport-chacha_generic-routines.patch |  115 +
+ ...move-core-routines-into-a-separate-l.patch |  649 ++
+ ...305-unify-Poly1305-state-struct-with.patch |  251 +
+ ...expose-init-update-final-library-int.patch |  224 +
+ ...305-depend-on-generic-library-not-ge.patch |  217 +
+ ...305-expose-existing-driver-as-poly13.patch |  163 +
+ ...y1305-incorporate-OpenSSL-CRYPTOGAMS.patch | 2083 +++++
+ ...305-incorporate-OpenSSL-CRYPTOGAMS-N.patch | 2776 ++++++
+ ...1305-incorporate-OpenSSL-CRYPTOGAMS-.patch | 1563 ++++
+ ...eneric-C-library-implementation-and-.patch | 1097 +++
+ ...o-testmgr-add-test-cases-for-Blake2s.patch |  322 +
+ ...ake2s-implement-generic-shash-driver.patch |  245 +
+ ...o-blake2s-x86_64-SIMD-implementation.patch |  557 ++
+ ...19-generic-C-library-implementations.patch | 1849 ++++
+ ...6-crypto-curve25519-add-kpp-selftest.patch | 1268 +++
+ ...ve25519-implement-generic-KPP-driver.patch |  136 +
+ ...25519-work-around-Clang-stack-spilli.patch |   75 +
+ ...9-x86_64-library-and-KPP-implementat.patch | 2536 ++++++
+ ...25519-import-Bernstein-and-Schwabe-s.patch | 2135 +++++
+ ...rve25519-wire-up-NEON-implementation.patch | 1058 +++
+ ...oly1305-import-construction-and-self.patch | 7677 ++++++++++++++++
+ ...a20poly1305-reimplement-crypt_from_s.patch |  295 +
+ ...neric-remove-unnecessary-setkey-func.patch |   68 +
+ ...a-only-unregister-algorithms-if-regi.patch |   31 +
+ ...-chacha20poly1305-use-chacha20_crypt.patch |   83 +
+ ...itionalize-crypto-api-in-arch-glue-f.patch |  275 +
+ ...a-fix-warning-message-in-header-file.patch |   35 +
+ ...25519-add-arch-specific-key-generati.patch |   38 +
+ ...ypto-lib-curve25519-re-add-selftests.patch | 1387 +++
+ ...add-new-32-and-64-bit-generic-versio.patch | 1164 +++
+ ...305-import-unmodified-cryptogams-imp.patch | 4183 +++++++++
+ ...305-wire-up-faster-implementations-f.patch | 2927 ++++++
+ ...-mips-poly1305-remove-redundant-non-.patch |  171 +
+ ...-curve25519-Fix-selftest-build-error.patch |  102 +
+ ...pto-x86-poly1305-fix-.gitignore-typo.patch |   23 +
+ ...oly1305-add-back-missing-test-vector.patch | 1858 ++++
+ ...305-emit-does-base-conversion-itself.patch |   36 +
+ ...a-fix-build-failured-when-kernel-mod.patch |   58 +
+ ...llow-tests-to-be-disabled-when-manag.patch |   40 +
+ ...oly1305-prevent-integer-overflow-on-.patch |   40 +
+ ...25519-support-assemblers-with-no-adx.patch |   84 +
+ ...chacha-correctly-walk-through-blocks.patch |   68 +
+ ...25519-replace-with-formally-verified.patch | 3765 ++++++++
+ ...rve25519-leave-r12-as-spare-register.patch |  376 +
+ ...ly1305-add-artifact-to-.gitignore-fi.patch |   35 +
+ ...ch-lib-limit-simd-usage-to-4k-chunks.patch |  243 +
+ ...a20poly1305-Add-missing-function-dec.patch |   38 +
+ ...a-sse3-use-unaligned-loads-for-state.patch |  147 +
+ ...e25519-Remove-unused-carry-variables.patch |   46 +
+ ...rve25519-include-linux-scatterlist.h.patch |   36 +
+ ...305-Add-prototype-for-poly1305_block.patch |   33 +
+ ...to-curve25519-x86_64-Use-XORL-r32-32.patch |  261 +
+ ...ypto-poly1305-x86_64-Use-XORL-r32-32.patch |   59 +
+ ...305-Remove-assignments-with-no-effec.patch |   29 +
+ ...oly1305-add-back-a-needed-assignment.patch |   33 +
+ ...RYPTO_MANAGER_EXTRA_TESTS-requires-t.patch |   33 +
+ ...a-neon-optimize-for-non-block-size-m.patch |  272 +
+ ...-chacha-simplify-tail-block-handling.patch |  324 +
+ ...a20poly1305-define-empty-module-exit.patch |   37 +
+ ...a-neon-add-missing-counter-increment.patch |   38 +
+ ...-net-WireGuard-secure-network-tunnel.patch | 8071 +++++++++++++++++
+ ...sts-import-harness-makefile-for-test.patch | 1078 +++
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+ ...al-fix-spelling-mistakes-in-comments.patch |   66 +
+ ...emove-unused-include-linux-version.h.patch |   28 +
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+ ...sts-remove-ancient-kernel-compatibil.patch |  373 +
+ ...ng-do-not-account-for-pfmemalloc-whe.patch |   39 +
+ ...-mark-skbs-as-not-on-list-when-recei.patch |   34 +
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+ ...reject-peers-with-low-order-public-k.patch |  233 +
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+ ...uard-device-use-icmp_ndo_send-helper.patch |   64 +
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+ ...-remove-errant-restriction-on-loopin.patch |  162 +
+ ...eceive-cond_resched-when-processing-.patch |   58 +
+ ...sts-initalize-ipv6-members-to-NULL-t.patch |   51 +
+ ...eceive-use-explicit-unlikely-branch-.patch |   88 +
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+ ...ng-preserve-flow-hash-across-packet-.patch |  116 +
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+ ...do-not-assign-initiation-time-in-if-.patch |   33 +
+ ...vice-avoid-circular-netns-references.patch |  296 +
+ ...e-account-for-napi_gro_receive-never.patch |   42 +
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+ ...ng-make-use-of-ip_tunnel_parse_proto.patch |   68 +
+ ...onsistently-use-NLA_POLICY_EXACT_LEN.patch |   49 +
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+ ...take-lock-when-removing-handshake-en.patch |  127 +
+ ...okup-take-lock-before-checking-hash-.patch |   62 +
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+ ...double-unlikely-notation-when-using-.patch |   55 +
+ ...ocket-remove-bogus-__be32-annotation.patch |   52 +
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+ ...-do-not-generate-ICMP-for-non-IP-pac.patch |   47 +
+ ...ing-get-rid-of-per-peer-ring-buffers.patch |  560 ++
+ ...fig-use-arm-chacha-even-with-no-neon.patch |   30 +
+ ...y1305-enable-for-all-MIPS-processors.patch |   60 +
+ ...ps-add-poly1305-core.S-to-.gitignore.patch |   24 +
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+ ...sts-make-sure-rp_filter-is-disabled-.patch |   31 +
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+ ...d-add-binding-for-BCM4908-partitions.patch |   92 +
+ ...art-support-BCM4908-fixed-partitions.patch |  648 ++
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+ ...em-cells-compatible-to-parse-mtd-as-.patch |   40 +
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+ ...wer-switch-on-address-change-modules.patch |   65 +
+ ...TX_DISABLE-and-phy-only-from-main-st.patch |   52 +
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+ ...an-option-for-drivers-to-always-rece.patch |  121 +
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+ ...dsa-rtl8366-Pass-GENMASK-signed-bits.patch |   27 +
+ ...tl4_a-Implement-Realtek-4-byte-A-tag.patch |  232 +
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+ ...iatek-Integrate-GDM-PSE-setup-operat.patch |   80 +
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+ ...diatek-Enable-GDM-GDMA_DROP_ALL-mode.patch |   33 +
+ ...cally-bring-up-DSA-master-when-openi.patch |   85 +
+ ...y-switchdev-of-disappearance-of-old-.patch |  126 +
+ ...r-when-a-non-legacy-FDB-operation-fa.patch |   52 +
+ ...e-switchdev_notifier_fdb_info-in-dsa.patch |  226 +
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+ create mode 100644 target/linux/generic/pending-5.4/332-arc-add-OWRTDTB-section.patch
+ create mode 100644 target/linux/generic/pending-5.4/333-arc-enable-unaligned-access-in-kernel-mode.patch
+ create mode 100644 target/linux/generic/pending-5.4/342-powerpc-Enable-kernel-XZ-compression-option-on-PPC_8.patch
+ create mode 100644 target/linux/generic/pending-5.4/400-mtd-add-rootfs-split-support.patch
+ create mode 100644 target/linux/generic/pending-5.4/401-mtd-add-support-for-different-partition-parser-types.patch
+ create mode 100644 target/linux/generic/pending-5.4/402-mtd-use-typed-mtd-parsers-for-rootfs-and-firmware-split.patch
+ create mode 100644 target/linux/generic/pending-5.4/403-mtd-hook-mtdsplit-to-Kbuild.patch
+ create mode 100644 target/linux/generic/pending-5.4/404-mtd-add-more-helper-functions.patch
+ create mode 100644 target/linux/generic/pending-5.4/410-mtd-parsers-ofpart-fix-parsing-subpartitions.patch
+ create mode 100644 target/linux/generic/pending-5.4/411-mtd-partial_eraseblock_write.patch
+ create mode 100644 target/linux/generic/pending-5.4/412-mtd-partial_eraseblock_unlock.patch
+ create mode 100644 target/linux/generic/pending-5.4/419-mtd-redboot-add-of_match_table-with-DT-binding.patch
+ create mode 100644 target/linux/generic/pending-5.4/420-mtd-redboot_space.patch
+ create mode 100644 target/linux/generic/pending-5.4/430-mtd-add-myloader-partition-parser.patch
+ create mode 100644 target/linux/generic/pending-5.4/431-mtd-bcm47xxpart-check-for-bad-blocks-when-calculatin.patch
+ create mode 100644 target/linux/generic/pending-5.4/432-mtd-bcm47xxpart-detect-T_Meter-partition.patch
+ create mode 100644 target/linux/generic/pending-5.4/435-mtd-add-routerbootpart-parser-config.patch
+ create mode 100644 target/linux/generic/pending-5.4/447-mtd-spinand-gigadevice-Add-support-for-GD5F4GQ4xC.patch
+ create mode 100644 target/linux/generic/pending-5.4/450-mtd-spi-nor-allow-NOR-driver-to-write-fewer-bytes-th.patch
+ create mode 100644 target/linux/generic/pending-5.4/460-mtd-cfi_cmdset_0002-no-erase_suspend.patch
+ create mode 100644 target/linux/generic/pending-5.4/461-mtd-cfi_cmdset_0002-add-buffer-write-cmd-timeout.patch
+ create mode 100644 target/linux/generic/pending-5.4/465-m25p80-mx-disable-software-protection.patch
+ create mode 100644 target/linux/generic/pending-5.4/466-Revert-mtd-spi-nor-fix-Spansion-regressions-aliased-.patch
+ create mode 100644 target/linux/generic/pending-5.4/470-mtd-spi-nor-support-limiting-4K-sectors-support-base.patch
+ create mode 100644 target/linux/generic/pending-5.4/476-mtd-spi-nor-add-eon-en25q128.patch
+ create mode 100644 target/linux/generic/pending-5.4/479-mtd-spi-nor-add-xtx-xt25f128b.patch
+ create mode 100644 target/linux/generic/pending-5.4/480-mtd-set-rootfs-to-be-root-dev.patch
+ create mode 100644 target/linux/generic/pending-5.4/481-mtd-spi-nor-rework-broken-flash-reset-support.patch
+ create mode 100644 target/linux/generic/pending-5.4/482-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch
+ create mode 100644 target/linux/generic/pending-5.4/482-mtd-spi-nor-fix-4-byte-opcode-support-for-w25q256.patch
+ create mode 100644 target/linux/generic/pending-5.4/490-ubi-auto-attach-mtd-device-named-ubi-or-data-on-boot.patch
+ create mode 100644 target/linux/generic/pending-5.4/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
+ create mode 100644 target/linux/generic/pending-5.4/492-try-auto-mounting-ubi0-rootfs-in-init-do_mounts.c.patch
+ create mode 100644 target/linux/generic/pending-5.4/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch
+ create mode 100644 target/linux/generic/pending-5.4/494-mtd-ubi-add-EOF-marker-support.patch
+ create mode 100644 target/linux/generic/pending-5.4/495-mtd-core-add-get_mtd_device_by_node.patch
+ create mode 100644 target/linux/generic/pending-5.4/496-dt-bindings-add-bindings-for-mtd-concat-devices.patch
+ create mode 100644 target/linux/generic/pending-5.4/497-mtd-mtdconcat-add-dt-driver-for-concat-devices.patch
+ create mode 100644 target/linux/generic/pending-5.4/498-mtd-mtdconcat-select-readwrite-function.patch
+ create mode 100644 target/linux/generic/pending-5.4/530-jffs2_make_lzma_available.patch
+ create mode 100644 target/linux/generic/pending-5.4/532-jffs2_eofdetect.patch
+ create mode 100644 target/linux/generic/pending-5.4/600-netfilter_conntrack_flush.patch
+ create mode 100644 target/linux/generic/pending-5.4/610-netfilter_match_bypass_default_checks.patch
+ create mode 100644 target/linux/generic/pending-5.4/611-netfilter_match_bypass_default_table.patch
+ create mode 100644 target/linux/generic/pending-5.4/612-netfilter_match_reduce_memory_access.patch
+ create mode 100644 target/linux/generic/pending-5.4/613-netfilter_optional_tcp_window_check.patch
+ create mode 100644 target/linux/generic/pending-5.4/620-net_sched-codel-do-not-defer-queue-length-update.patch
+ create mode 100644 target/linux/generic/pending-5.4/630-packet_socket_type.patch
+ create mode 100644 target/linux/generic/pending-5.4/640-netfilter-nf_flow_table-add-hardware-offload-support.patch
+ create mode 100644 target/linux/generic/pending-5.4/641-netfilter-nf_flow_table-support-hw-offload-through-v.patch
+ create mode 100644 target/linux/generic/pending-5.4/642-net-8021q-support-hardware-flow-table-offload.patch
+ create mode 100644 target/linux/generic/pending-5.4/643-net-bridge-support-hardware-flow-table-offload.patch
+ create mode 100644 target/linux/generic/pending-5.4/644-net-pppoe-support-hardware-flow-table-offload.patch
+ create mode 100644 target/linux/generic/pending-5.4/645-netfilter-nf_flow_table-rework-hardware-offload-time.patch
+ create mode 100644 target/linux/generic/pending-5.4/646-netfilter-nf_flow_table-rework-private-driver-data.patch
+ create mode 100644 target/linux/generic/pending-5.4/647-net-dsa-support-hardware-flow-table-offload.patch
+ create mode 100644 target/linux/generic/pending-5.4/655-increase_skb_pad.patch
+ create mode 100644 target/linux/generic/pending-5.4/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch
+ create mode 100644 target/linux/generic/pending-5.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
+ create mode 100644 target/linux/generic/pending-5.4/671-net-provide-defines-for-_POLICY_FAILED-until-all-cod.patch
+ create mode 100644 target/linux/generic/pending-5.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
+ create mode 100644 target/linux/generic/pending-5.4/681-NET-add-of_get_mac_address_mtd.patch
+ create mode 100644 target/linux/generic/pending-5.4/703-phy-add-detach-callback-to-struct-phy_driver.patch
+ create mode 100644 target/linux/generic/pending-5.4/710-bridge-add-sysctl-knob-for-filtering-rx-tx-BPDU-pack.patch
+ create mode 100644 target/linux/generic/pending-5.4/735-net-phy-at803x-fix-at8033-sgmii-mode.patch
+ create mode 100644 target/linux/generic/pending-5.4/739-net-avoid-tx-fault-with-Nokia-GPON-module.patch
+ create mode 100644 target/linux/generic/pending-5.4/740-net-sfp-remove-incomplete-100BASE-FX-and-100BASE-LX-.patch
+ create mode 100644 target/linux/generic/pending-5.4/741-net-sfp-derive-interface-mode-from-ethtool-link-mode.patch
+ create mode 100644 target/linux/generic/pending-5.4/742-net-sfp-add-more-extended-compliance-codes.patch
+ create mode 100644 target/linux/generic/pending-5.4/743-net-sfp-add-module-start-stop-upstream-notifications.patch
+ create mode 100644 target/linux/generic/pending-5.4/744-net-sfp-move-phy_start-phy_stop-to-phylink.patch
+ create mode 100644 target/linux/generic/pending-5.4/745-net-mdio-i2c-add-support-for-Clause-45-accesses.patch
+ create mode 100644 target/linux/generic/pending-5.4/746-net-phylink-re-split-__phylink_connect_phy.patch
+ create mode 100644 target/linux/generic/pending-5.4/747-net-phylink-support-Clause-45-PHYs-on-SFP-modules.patch
+ create mode 100644 target/linux/generic/pending-5.4/748-net-phylink-split-link_an_mode-configured-and-curren.patch
+ create mode 100644 target/linux/generic/pending-5.4/749-net-phylink-split-phylink_sfp_module_insert.patch
+ create mode 100644 target/linux/generic/pending-5.4/750-net-phylink-delay-MAC-configuration-for-copper-SFP-m.patch
+ create mode 100644 target/linux/generic/pending-5.4/751-net-phylink-make-Broadcom-BCM84881-based-SFPs-work.patch
+ create mode 100644 target/linux/generic/pending-5.4/752-net-phy-add-Broadcom-BCM84881-PHY-driver.patch
+ create mode 100644 target/linux/generic/pending-5.4/753-net-sfp-add-support-for-Clause-45-PHYs.patch
+ create mode 100644 target/linux/generic/pending-5.4/754-net-sfp-fix-unbind.patch
+ create mode 100644 target/linux/generic/pending-5.4/755-net-sfp-fix-hwmon.patch
+ create mode 100644 target/linux/generic/pending-5.4/756-net-sfp-use-a-definition-for-the-fault-recovery-atte.patch
+ create mode 100644 target/linux/generic/pending-5.4/757-net-sfp-rename-sm_retries.patch
+ create mode 100644 target/linux/generic/pending-5.4/758-net-sfp-error-handling-for-phy-probe.patch
+ create mode 100644 target/linux/generic/pending-5.4/759-net-sfp-re-attempt-probing-for-phy.patch
+ create mode 100644 target/linux/generic/pending-5.4/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch
+ create mode 100644 target/linux/generic/pending-5.4/761-net-dsa-mt7530-Support-EEE-features.patch
+ create mode 100644 target/linux/generic/pending-5.4/762-net-bridge-switchdev-Refactor-br_switchdev_fdb_notif.patch
+ create mode 100644 target/linux/generic/pending-5.4/763-net-bridge-switchdev-Include-local-flag-in-FDB-notif.patch
+ create mode 100644 target/linux/generic/pending-5.4/764-net-bridge-switchdev-Send-FDB-notifications-for-host.patch
+ create mode 100644 target/linux/generic/pending-5.4/765-net-dsa-Include-local-addresses-in-assisted-CPU-port.patch
+ create mode 100644 target/linux/generic/pending-5.4/766-net-dsa-Include-bridge-addresses-in-assisted-CPU-por.patch
+ create mode 100644 target/linux/generic/pending-5.4/767-net-dsa-Sync-static-FDB-entries-on-foreign-interface.patch
+ create mode 100644 target/linux/generic/pending-5.4/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
+ create mode 100644 target/linux/generic/pending-5.4/770-00-net-ethernet-mtk_eth_soc-use-napi_consume_skb.patch
+ create mode 100644 target/linux/generic/pending-5.4/770-01-net-ethernet-mtk_eth_soc-significantly-reduce-mdio-b.patch
+ create mode 100644 target/linux/generic/pending-5.4/770-03-net-ethernet-mtk_eth_soc-fix-unnecessary-tx-queue-st.patch
+ create mode 100644 target/linux/generic/pending-5.4/770-04-net-ethernet-mtk_eth_soc-use-larger-burst-size-for-q.patch
+ create mode 100644 target/linux/generic/pending-5.4/770-05-net-ethernet-mtk_eth_soc-increase-DMA-ring-sizes.patch
+ create mode 100644 target/linux/generic/pending-5.4/770-06-net-ethernet-mtk_eth_soc-implement-dynamic-interrupt.patch
+ create mode 100644 target/linux/generic/pending-5.4/770-08-net-ethernet-mtk_eth_soc-cache-hardware-pointer-of-l.patch
+ create mode 100644 target/linux/generic/pending-5.4/770-09-net-ethernet-mtk_eth_soc-only-read-the-full-rx-descr.patch
+ create mode 100644 target/linux/generic/pending-5.4/770-10-net-ethernet-mtk_eth_soc-unmap-rx-data-before-callin.patch
+ create mode 100644 target/linux/generic/pending-5.4/770-11-net-ethernet-mtk_eth_soc-avoid-rearming-interrupt-if.patch
+ create mode 100644 target/linux/generic/pending-5.4/770-13-net-ethernet-mtk_eth_soc-fix-parsing-packets-in-GDM.patch
+ create mode 100644 target/linux/generic/pending-5.4/770-14-net-ethernet-mtk_eth_soc-set-PPE-flow-hash-as-skb-ha.patch
+ create mode 100644 target/linux/generic/pending-5.4/770-15-net-ethernet-mediatek-mtk_eth_soc-add-support-for-in.patch
+ create mode 100644 target/linux/generic/pending-5.4/770-16-net-ethernet-mediatek-mtk_eth_soc-add-flow-offloadin.patch
+ create mode 100644 target/linux/generic/pending-5.4/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch
+ create mode 100644 target/linux/generic/pending-5.4/810-pci_disable_common_quirks.patch
+ create mode 100644 target/linux/generic/pending-5.4/811-pci_disable_usb_common_quirks.patch
+ create mode 100644 target/linux/generic/pending-5.4/820-libata-Assign-OF-node-to-the-SCSI-device.patch
+ create mode 100644 target/linux/generic/pending-5.4/834-ledtrig-libata.patch
+ create mode 100644 target/linux/generic/pending-5.4/840-hwrng-bcm2835-set-quality-to-1000.patch
+ create mode 100644 target/linux/generic/pending-5.4/920-mangle_bootargs.patch
+
+diff --git a/target/linux/generic/backport-5.4/010-Kbuild-don-t-hardcode-path-to-awk-in-scripts-ld-vers.patch b/target/linux/generic/backport-5.4/010-Kbuild-don-t-hardcode-path-to-awk-in-scripts-ld-vers.patch
+new file mode 100644
+index 0000000000..7ac4f9d240
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/010-Kbuild-don-t-hardcode-path-to-awk-in-scripts-ld-vers.patch
+@@ -0,0 +1,30 @@
++From 13b1ecc3401653a355798eb1dee10cc1608202f4 Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Mon, 18 Jan 2016 12:27:49 +0100
++Subject: [PATCH 33/34] Kbuild: don't hardcode path to awk in
++ scripts/ld-version.sh
++
++On some systems /usr/bin/awk does not exist, or is broken. Find it via
++$PATH instead.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ scripts/ld-version.sh | 4 +++-
++ 1 file changed, 3 insertions(+), 1 deletion(-)
++
++--- a/scripts/ld-version.sh
+++++ b/scripts/ld-version.sh
++@@ -1,6 +1,7 @@
++-#!/usr/bin/awk -f
+++#!/bin/sh
++ # SPDX-License-Identifier: GPL-2.0
++ # extract linker version number from stdin and turn into single number
+++exec awk '
++ 	{
++ 	gsub(".*\\)", "");
++ 	gsub(".*version ", "");
++@@ -9,3 +10,4 @@
++ 	print a[1]*100000000 + a[2]*1000000 + a[3]*10000;
++ 	exit
++ 	}
+++'
+diff --git a/target/linux/generic/backport-5.4/011-kbuild-export-SUBARCH.patch b/target/linux/generic/backport-5.4/011-kbuild-export-SUBARCH.patch
+new file mode 100644
+index 0000000000..60defa39c5
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/011-kbuild-export-SUBARCH.patch
+@@ -0,0 +1,21 @@
++From 173019b66dcc9d68ad9333aa744dad1e369b5aa8 Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sun, 9 Jul 2017 00:26:53 +0200
++Subject: [PATCH 34/34] kernel: add compile fix for linux 4.9 on x86
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ Makefile | 4 ++--
++ 1 file changed, 2 insertions(+), 2 deletions(-)
++
++--- a/Makefile
+++++ b/Makefile
++@@ -493,7 +493,7 @@ KBUILD_LDFLAGS :=
++ GCC_PLUGINS_CFLAGS :=
++ CLANG_FLAGS :=
++ 
++-export ARCH SRCARCH CONFIG_SHELL BASH HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE LD CC
+++export ARCH SRCARCH SUBARCH CONFIG_SHELL BASH HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE LD CC
++ export CPP AR NM STRIP OBJCOPY OBJDUMP OBJSIZE READELF PAHOLE LEX YACC AWK INSTALLKERNEL
++ export PERL PYTHON PYTHON3 CHECK CHECKFLAGS MAKE UTS_MACHINE HOSTCXX
++ export KGZIP KBZIP2 KLZOP LZMA LZ4 XZ
+diff --git a/target/linux/generic/backport-5.4/030-modpost-add-a-helper-to-get-data-pointed-by-a-symbol.patch b/target/linux/generic/backport-5.4/030-modpost-add-a-helper-to-get-data-pointed-by-a-symbol.patch
+new file mode 100644
+index 0000000000..cf88c0c69f
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/030-modpost-add-a-helper-to-get-data-pointed-by-a-symbol.patch
+@@ -0,0 +1,53 @@
++From afa0459daa7b08c7b2c879705b69d39b734a11d0 Mon Sep 17 00:00:00 2001
++From: Masahiro Yamada <yamada.masahiro@socionext.com>
++Date: Fri, 15 Nov 2019 02:42:21 +0900
++Subject: [PATCH] modpost: add a helper to get data pointed by a symbol
++
++When CONFIG_MODULE_REL_CRCS is enabled, the value of __crc_* is not
++an absolute value, but the address to the CRC data embedded in the
++.rodata section.
++
++Getting the data pointed by the symbol value is somewhat complex.
++Split it out into a new helper, sym_get_data().
++
++I will reuse it to refactor namespace_from_kstrtabns() in the next
++commit.
++
++Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
++---
++ scripts/mod/modpost.c | 17 +++++++++++++----
++ 1 file changed, 13 insertions(+), 4 deletions(-)
++
++--- a/scripts/mod/modpost.c
+++++ b/scripts/mod/modpost.c
++@@ -312,6 +312,18 @@ static const char *sec_name(struct elf_i
++ 	return sech_name(elf, &elf->sechdrs[secindex]);
++ }
++ 
+++static void *sym_get_data(const struct elf_info *info, const Elf_Sym *sym)
+++{
+++	Elf_Shdr *sechdr = &info->sechdrs[sym->st_shndx];
+++	unsigned long offset;
+++
+++	offset = sym->st_value;
+++	if (info->hdr->e_type != ET_REL)
+++		offset -= sechdr->sh_addr;
+++
+++	return (void *)info->hdr + sechdr->sh_offset + offset;
+++}
+++
++ #define strstarts(str, prefix) (strncmp(str, prefix, strlen(prefix)) == 0)
++ 
++ static enum export export_from_secname(struct elf_info *elf, unsigned int sec)
++@@ -701,10 +713,7 @@ static void handle_modversions(struct mo
++ 			unsigned int *crcp;
++ 
++ 			/* symbol points to the CRC in the ELF object */
++-			crcp = (void *)info->hdr + sym->st_value +
++-			       info->sechdrs[sym->st_shndx].sh_offset -
++-			       (info->hdr->e_type != ET_REL ?
++-				info->sechdrs[sym->st_shndx].sh_addr : 0);
+++			crcp = sym_get_data(info, sym);
++ 			crc = TO_NATIVE(*crcp);
++ 		}
++ 		sym_update_crc(symname + strlen("__crc_"), mod, crc,
+diff --git a/target/linux/generic/backport-5.4/031-modpost-refactor-namespace_from_kstrtabns-to-not-har.patch b/target/linux/generic/backport-5.4/031-modpost-refactor-namespace_from_kstrtabns-to-not-har.patch
+new file mode 100644
+index 0000000000..230dc6b89a
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/031-modpost-refactor-namespace_from_kstrtabns-to-not-har.patch
+@@ -0,0 +1,62 @@
++From e84f9fbbece1585f45a03ccc11eeabe121cadc1b Mon Sep 17 00:00:00 2001
++From: Masahiro Yamada <yamada.masahiro@socionext.com>
++Date: Fri, 15 Nov 2019 02:42:22 +0900
++Subject: [PATCH] modpost: refactor namespace_from_kstrtabns() to not hard-code
++ section name
++
++Currently, namespace_from_kstrtabns() relies on the fact that
++namespace strings are recorded in the __ksymtab_strings section.
++Actually, it is coded in include/linux/export.h, but modpost does
++not need to hard-code the section name.
++
++Elf_Sym::st_shndx holds the index of the relevant section. Using it is
++a more portable way to get the namespace string.
++
++Make namespace_from_kstrtabns() simply call sym_get_data(), and delete
++the info->ksymtab_strings .
++
++While I was here, I added more 'const' qualifiers to pointers.
++
++Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
++---
++ scripts/mod/modpost.c | 10 +++-------
++ scripts/mod/modpost.h |  1 -
++ 2 files changed, 3 insertions(+), 8 deletions(-)
++
++--- a/scripts/mod/modpost.c
+++++ b/scripts/mod/modpost.c
++@@ -360,10 +360,10 @@ static enum export export_from_sec(struc
++ 		return export_unknown;
++ }
++ 
++-static const char *namespace_from_kstrtabns(struct elf_info *info,
++-					    Elf_Sym *kstrtabns)
+++static const char *namespace_from_kstrtabns(const struct elf_info *info,
+++					    const Elf_Sym *sym)
++ {
++-	char *value = info->ksymtab_strings + kstrtabns->st_value;
+++	const char *value = sym_get_data(info, sym);
++ 	return value[0] ? value : NULL;
++ }
++ 
++@@ -605,10 +605,6 @@ static int parse_elf(struct elf_info *in
++ 			info->export_unused_gpl_sec = i;
++ 		else if (strcmp(secname, "__ksymtab_gpl_future") == 0)
++ 			info->export_gpl_future_sec = i;
++-		else if (strcmp(secname, "__ksymtab_strings") == 0)
++-			info->ksymtab_strings = (void *)hdr +
++-						sechdrs[i].sh_offset -
++-						sechdrs[i].sh_addr;
++ 
++ 		if (sechdrs[i].sh_type == SHT_SYMTAB) {
++ 			unsigned int sh_link_idx;
++--- a/scripts/mod/modpost.h
+++++ b/scripts/mod/modpost.h
++@@ -143,7 +143,6 @@ struct elf_info {
++ 	Elf_Section  export_gpl_sec;
++ 	Elf_Section  export_unused_gpl_sec;
++ 	Elf_Section  export_gpl_future_sec;
++-	char	     *ksymtab_strings;
++ 	char         *strtab;
++ 	char	     *modinfo;
++ 	unsigned int modinfo_len;
+diff --git a/target/linux/generic/backport-5.4/041-v5.5-arm64-Implement-optimised-checksum-routine.patch b/target/linux/generic/backport-5.4/041-v5.5-arm64-Implement-optimised-checksum-routine.patch
+new file mode 100644
+index 0000000000..00ec7d0207
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/041-v5.5-arm64-Implement-optimised-checksum-routine.patch
+@@ -0,0 +1,176 @@
++From: Robin Murphy <robin.murphy@arm.com>
++Date: Wed, 15 Jan 2020 16:42:39 +0000
++Subject: [PATCH] arm64: Implement optimised checksum routine
++
++Apparently there exist certain workloads which rely heavily on software
++checksumming, for which the generic do_csum() implementation becomes a
++significant bottleneck. Therefore let's give arm64 its own optimised
++version - for ease of maintenance this foregoes assembly or intrisics,
++and is thus not actually arm64-specific, but does rely heavily on C
++idioms that translate well to the A64 ISA and the typical load/store
++capabilities of most ARMv8 CPU cores.
++
++The resulting increase in checksum throughput scales nicely with buffer
++size, tending towards 4x for a small in-order core (Cortex-A53), and up
++to 6x or more for an aggressive big core (Ampere eMAG).
++
++Reported-by: Lingyan Huang <huanglingyan2@huawei.com>
++Tested-by: Lingyan Huang <huanglingyan2@huawei.com>
++Signed-off-by: Robin Murphy <robin.murphy@arm.com>
++Signed-off-by: Will Deacon <will@kernel.org>
++---
++ create mode 100644 arch/arm64/lib/csum.c
++
++--- a/arch/arm64/include/asm/checksum.h
+++++ b/arch/arm64/include/asm/checksum.h
++@@ -36,6 +36,9 @@ static inline __sum16 ip_fast_csum(const
++ }
++ #define ip_fast_csum ip_fast_csum
++ 
+++extern unsigned int do_csum(const unsigned char *buff, int len);
+++#define do_csum do_csum
+++
++ #include <asm-generic/checksum.h>
++ 
++ #endif	/* __ASM_CHECKSUM_H */
++--- a/arch/arm64/lib/Makefile
+++++ b/arch/arm64/lib/Makefile
++@@ -1,9 +1,9 @@
++ # SPDX-License-Identifier: GPL-2.0
++ lib-y		:= clear_user.o delay.o copy_from_user.o		\
++ 		   copy_to_user.o copy_in_user.o copy_page.o		\
++-		   clear_page.o memchr.o memcpy.o memmove.o memset.o	\
++-		   memcmp.o strcmp.o strncmp.o strlen.o strnlen.o	\
++-		   strchr.o strrchr.o tishift.o
+++		   clear_page.o csum.o memchr.o memcpy.o memmove.o	\
+++		   memset.o memcmp.o strcmp.o strncmp.o strlen.o	\
+++		   strnlen.o strchr.o strrchr.o tishift.o
++ 
++ ifeq ($(CONFIG_KERNEL_MODE_NEON), y)
++ obj-$(CONFIG_XOR_BLOCKS)	+= xor-neon.o
++--- /dev/null
+++++ b/arch/arm64/lib/csum.c
++@@ -0,0 +1,123 @@
+++// SPDX-License-Identifier: GPL-2.0-only
+++// Copyright (C) 2019-2020 Arm Ltd.
+++
+++#include <linux/compiler.h>
+++#include <linux/kasan-checks.h>
+++#include <linux/kernel.h>
+++
+++#include <net/checksum.h>
+++
+++/* Looks dumb, but generates nice-ish code */
+++static u64 accumulate(u64 sum, u64 data)
+++{
+++	__uint128_t tmp = (__uint128_t)sum + data;
+++	return tmp + (tmp >> 64);
+++}
+++
+++unsigned int do_csum(const unsigned char *buff, int len)
+++{
+++	unsigned int offset, shift, sum;
+++	const u64 *ptr;
+++	u64 data, sum64 = 0;
+++
+++	offset = (unsigned long)buff & 7;
+++	/*
+++	 * This is to all intents and purposes safe, since rounding down cannot
+++	 * result in a different page or cache line being accessed, and @buff
+++	 * should absolutely not be pointing to anything read-sensitive. We do,
+++	 * however, have to be careful not to piss off KASAN, which means using
+++	 * unchecked reads to accommodate the head and tail, for which we'll
+++	 * compensate with an explicit check up-front.
+++	 */
+++	kasan_check_read(buff, len);
+++	ptr = (u64 *)(buff - offset);
+++	len = len + offset - 8;
+++
+++	/*
+++	 * Head: zero out any excess leading bytes. Shifting back by the same
+++	 * amount should be at least as fast as any other way of handling the
+++	 * odd/even alignment, and means we can ignore it until the very end.
+++	 */
+++	shift = offset * 8;
+++	data = READ_ONCE_NOCHECK(*ptr++);
+++#ifdef __LITTLE_ENDIAN
+++	data = (data >> shift) << shift;
+++#else
+++	data = (data << shift) >> shift;
+++#endif
+++
+++	/*
+++	 * Body: straightforward aligned loads from here on (the paired loads
+++	 * underlying the quadword type still only need dword alignment). The
+++	 * main loop strictly excludes the tail, so the second loop will always
+++	 * run at least once.
+++	 */
+++	while (unlikely(len > 64)) {
+++		__uint128_t tmp1, tmp2, tmp3, tmp4;
+++
+++		tmp1 = READ_ONCE_NOCHECK(*(__uint128_t *)ptr);
+++		tmp2 = READ_ONCE_NOCHECK(*(__uint128_t *)(ptr + 2));
+++		tmp3 = READ_ONCE_NOCHECK(*(__uint128_t *)(ptr + 4));
+++		tmp4 = READ_ONCE_NOCHECK(*(__uint128_t *)(ptr + 6));
+++
+++		len -= 64;
+++		ptr += 8;
+++
+++		/* This is the "don't dump the carry flag into a GPR" idiom */
+++		tmp1 += (tmp1 >> 64) | (tmp1 << 64);
+++		tmp2 += (tmp2 >> 64) | (tmp2 << 64);
+++		tmp3 += (tmp3 >> 64) | (tmp3 << 64);
+++		tmp4 += (tmp4 >> 64) | (tmp4 << 64);
+++		tmp1 = ((tmp1 >> 64) << 64) | (tmp2 >> 64);
+++		tmp1 += (tmp1 >> 64) | (tmp1 << 64);
+++		tmp3 = ((tmp3 >> 64) << 64) | (tmp4 >> 64);
+++		tmp3 += (tmp3 >> 64) | (tmp3 << 64);
+++		tmp1 = ((tmp1 >> 64) << 64) | (tmp3 >> 64);
+++		tmp1 += (tmp1 >> 64) | (tmp1 << 64);
+++		tmp1 = ((tmp1 >> 64) << 64) | sum64;
+++		tmp1 += (tmp1 >> 64) | (tmp1 << 64);
+++		sum64 = tmp1 >> 64;
+++	}
+++	while (len > 8) {
+++		__uint128_t tmp;
+++
+++		sum64 = accumulate(sum64, data);
+++		tmp = READ_ONCE_NOCHECK(*(__uint128_t *)ptr);
+++
+++		len -= 16;
+++		ptr += 2;
+++
+++#ifdef __LITTLE_ENDIAN
+++		data = tmp >> 64;
+++		sum64 = accumulate(sum64, tmp);
+++#else
+++		data = tmp;
+++		sum64 = accumulate(sum64, tmp >> 64);
+++#endif
+++	}
+++	if (len > 0) {
+++		sum64 = accumulate(sum64, data);
+++		data = READ_ONCE_NOCHECK(*ptr);
+++		len -= 8;
+++	}
+++	/*
+++	 * Tail: zero any over-read bytes similarly to the head, again
+++	 * preserving odd/even alignment.
+++	 */
+++	shift = len * -8;
+++#ifdef __LITTLE_ENDIAN
+++	data = (data << shift) >> shift;
+++#else
+++	data = (data >> shift) << shift;
+++#endif
+++	sum64 = accumulate(sum64, data);
+++
+++	/* Finally, folding */
+++	sum64 += (sum64 >> 32) | (sum64 << 32);
+++	sum = sum64 >> 32;
+++	sum += (sum >> 16) | (sum << 16);
+++	if (offset & 1)
+++		return (u16)swab32(sum);
+++
+++	return sum >> 16;
+++}
+diff --git a/target/linux/generic/backport-5.4/042-v5.5-arm64-csum-Fix-pathological-zero-length-calls.patch b/target/linux/generic/backport-5.4/042-v5.5-arm64-csum-Fix-pathological-zero-length-calls.patch
+new file mode 100644
+index 0000000000..50b210e14f
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/042-v5.5-arm64-csum-Fix-pathological-zero-length-calls.patch
+@@ -0,0 +1,28 @@
++From: Robin Murphy <robin.murphy@arm.com>
++Date: Fri, 17 Jan 2020 15:48:39 +0000
++Subject: [PATCH] arm64: csum: Fix pathological zero-length calls
++
++In validating the checksumming results of the new routine, I sadly
++neglected to test its not-checksumming results. Thus it slipped through
++that the one case where @buff is already dword-aligned and @len = 0
++manages to defeat the tail-masking logic and behave as if @len = 8.
++For a zero length it doesn't make much sense to deference @buff anyway,
++so just add an early return (which has essentially zero impact on
++performance).
++
++Signed-off-by: Robin Murphy <robin.murphy@arm.com>
++Signed-off-by: Will Deacon <will@kernel.org>
++---
++
++--- a/arch/arm64/lib/csum.c
+++++ b/arch/arm64/lib/csum.c
++@@ -20,6 +20,9 @@ unsigned int do_csum(const unsigned char
++ 	const u64 *ptr;
++ 	u64 data, sum64 = 0;
++ 
+++	if (unlikely(len == 0))
+++		return 0;
+++
++ 	offset = (unsigned long)buff & 7;
++ 	/*
++ 	 * This is to all intents and purposes safe, since rounding down cannot
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0001-crypto-lib-tidy-up-lib-crypto-Kconfig-and-Makefile.patch b/target/linux/generic/backport-5.4/080-wireguard-0001-crypto-lib-tidy-up-lib-crypto-Kconfig-and-Makefile.patch
+new file mode 100644
+index 0000000000..e32e18a357
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0001-crypto-lib-tidy-up-lib-crypto-Kconfig-and-Makefile.patch
+@@ -0,0 +1,112 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:07 +0100
++Subject: [PATCH] crypto: lib - tidy up lib/crypto Kconfig and Makefile
++
++commit 746b2e024c67aa605ac12d135cd7085a49cf9dc4 upstream.
++
++In preparation of introducing a set of crypto library interfaces, tidy
++up the Makefile and split off the Kconfig symbols into a separate file.
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ crypto/Kconfig      | 13 +------------
++ lib/crypto/Kconfig  | 15 +++++++++++++++
++ lib/crypto/Makefile | 16 ++++++++--------
++ 3 files changed, 24 insertions(+), 20 deletions(-)
++ create mode 100644 lib/crypto/Kconfig
++
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -878,9 +878,6 @@ config CRYPTO_SHA1_PPC_SPE
++ 	  SHA-1 secure hash standard (DFIPS 180-4) implemented
++ 	  using powerpc SPE SIMD instruction set.
++ 
++-config CRYPTO_LIB_SHA256
++-	tristate
++-
++ config CRYPTO_SHA256
++ 	tristate "SHA224 and SHA256 digest algorithm"
++ 	select CRYPTO_HASH
++@@ -1019,9 +1016,6 @@ config CRYPTO_GHASH_CLMUL_NI_INTEL
++ 
++ comment "Ciphers"
++ 
++-config CRYPTO_LIB_AES
++-	tristate
++-
++ config CRYPTO_AES
++ 	tristate "AES cipher algorithms"
++ 	select CRYPTO_ALGAPI
++@@ -1150,9 +1144,6 @@ config CRYPTO_ANUBIS
++ 	  <https://www.cosic.esat.kuleuven.be/nessie/reports/>
++ 	  <http://www.larc.usp.br/~pbarreto/AnubisPage.html>
++ 
++-config CRYPTO_LIB_ARC4
++-	tristate
++-
++ config CRYPTO_ARC4
++ 	tristate "ARC4 cipher algorithm"
++ 	select CRYPTO_BLKCIPHER
++@@ -1339,9 +1330,6 @@ config CRYPTO_CAST6_AVX_X86_64
++ 	  This module provides the Cast6 cipher algorithm that processes
++ 	  eight blocks parallel using the AVX instruction set.
++ 
++-config CRYPTO_LIB_DES
++-	tristate
++-
++ config CRYPTO_DES
++ 	tristate "DES and Triple DES EDE cipher algorithms"
++ 	select CRYPTO_ALGAPI
++@@ -1845,6 +1833,7 @@ config CRYPTO_STATS
++ config CRYPTO_HASH_INFO
++ 	bool
++ 
+++source "lib/crypto/Kconfig"
++ source "drivers/crypto/Kconfig"
++ source "crypto/asymmetric_keys/Kconfig"
++ source "certs/Kconfig"
++--- /dev/null
+++++ b/lib/crypto/Kconfig
++@@ -0,0 +1,15 @@
+++# SPDX-License-Identifier: GPL-2.0
+++
+++comment "Crypto library routines"
+++
+++config CRYPTO_LIB_AES
+++	tristate
+++
+++config CRYPTO_LIB_ARC4
+++	tristate
+++
+++config CRYPTO_LIB_DES
+++	tristate
+++
+++config CRYPTO_LIB_SHA256
+++	tristate
++--- a/lib/crypto/Makefile
+++++ b/lib/crypto/Makefile
++@@ -1,13 +1,13 @@
++ # SPDX-License-Identifier: GPL-2.0
++ 
++-obj-$(CONFIG_CRYPTO_LIB_AES) += libaes.o
++-libaes-y := aes.o
+++obj-$(CONFIG_CRYPTO_LIB_AES)			+= libaes.o
+++libaes-y					:= aes.o
++ 
++-obj-$(CONFIG_CRYPTO_LIB_ARC4) += libarc4.o
++-libarc4-y := arc4.o
+++obj-$(CONFIG_CRYPTO_LIB_ARC4)			+= libarc4.o
+++libarc4-y					:= arc4.o
++ 
++-obj-$(CONFIG_CRYPTO_LIB_DES) += libdes.o
++-libdes-y := des.o
+++obj-$(CONFIG_CRYPTO_LIB_DES)			+= libdes.o
+++libdes-y					:= des.o
++ 
++-obj-$(CONFIG_CRYPTO_LIB_SHA256) += libsha256.o
++-libsha256-y := sha256.o
+++obj-$(CONFIG_CRYPTO_LIB_SHA256)			+= libsha256.o
+++libsha256-y					:= sha256.o
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0002-crypto-chacha-move-existing-library-code-into-lib-cr.patch b/target/linux/generic/backport-5.4/080-wireguard-0002-crypto-chacha-move-existing-library-code-into-lib-cr.patch
+new file mode 100644
+index 0000000000..177b5840d5
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0002-crypto-chacha-move-existing-library-code-into-lib-cr.patch
+@@ -0,0 +1,668 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:08 +0100
++Subject: [PATCH] crypto: chacha - move existing library code into lib/crypto
++
++commit 5fb8ef25803ef33e2eb60b626435828b937bed75 upstream.
++
++Currently, our generic ChaCha implementation consists of a permute
++function in lib/chacha.c that operates on the 64-byte ChaCha state
++directly [and which is always included into the core kernel since it
++is used by the /dev/random driver], and the crypto API plumbing to
++expose it as a skcipher.
++
++In order to support in-kernel users that need the ChaCha streamcipher
++but have no need [or tolerance] for going through the abstractions of
++the crypto API, let's expose the streamcipher bits via a library API
++as well, in a way that permits the implementation to be superseded by
++an architecture specific one if provided.
++
++So move the streamcipher code into a separate module in lib/crypto,
++and expose the init() and crypt() routines to users of the library.
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/chacha-neon-glue.c   |  2 +-
++ arch/arm64/crypto/chacha-neon-glue.c |  2 +-
++ arch/x86/crypto/chacha_glue.c        |  2 +-
++ crypto/Kconfig                       |  1 +
++ crypto/chacha_generic.c              | 60 ++--------------------
++ include/crypto/chacha.h              | 77 ++++++++++++++++++++++------
++ include/crypto/internal/chacha.h     | 53 +++++++++++++++++++
++ lib/Makefile                         |  3 +-
++ lib/crypto/Kconfig                   | 26 ++++++++++
++ lib/crypto/Makefile                  |  4 ++
++ lib/{ => crypto}/chacha.c            | 20 ++++----
++ lib/crypto/libchacha.c               | 35 +++++++++++++
++ 12 files changed, 199 insertions(+), 86 deletions(-)
++ create mode 100644 include/crypto/internal/chacha.h
++ rename lib/{ => crypto}/chacha.c (88%)
++ create mode 100644 lib/crypto/libchacha.c
++
++--- a/arch/arm/crypto/chacha-neon-glue.c
+++++ b/arch/arm/crypto/chacha-neon-glue.c
++@@ -20,7 +20,7 @@
++  */
++ 
++ #include <crypto/algapi.h>
++-#include <crypto/chacha.h>
+++#include <crypto/internal/chacha.h>
++ #include <crypto/internal/simd.h>
++ #include <crypto/internal/skcipher.h>
++ #include <linux/kernel.h>
++--- a/arch/arm64/crypto/chacha-neon-glue.c
+++++ b/arch/arm64/crypto/chacha-neon-glue.c
++@@ -20,7 +20,7 @@
++  */
++ 
++ #include <crypto/algapi.h>
++-#include <crypto/chacha.h>
+++#include <crypto/internal/chacha.h>
++ #include <crypto/internal/simd.h>
++ #include <crypto/internal/skcipher.h>
++ #include <linux/kernel.h>
++--- a/arch/x86/crypto/chacha_glue.c
+++++ b/arch/x86/crypto/chacha_glue.c
++@@ -7,7 +7,7 @@
++  */
++ 
++ #include <crypto/algapi.h>
++-#include <crypto/chacha.h>
+++#include <crypto/internal/chacha.h>
++ #include <crypto/internal/simd.h>
++ #include <crypto/internal/skcipher.h>
++ #include <linux/kernel.h>
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -1393,6 +1393,7 @@ config CRYPTO_SALSA20
++ 
++ config CRYPTO_CHACHA20
++ 	tristate "ChaCha stream cipher algorithms"
+++	select CRYPTO_LIB_CHACHA_GENERIC
++ 	select CRYPTO_BLKCIPHER
++ 	help
++ 	  The ChaCha20, XChaCha20, and XChaCha12 stream cipher algorithms.
++--- a/crypto/chacha_generic.c
+++++ b/crypto/chacha_generic.c
++@@ -8,29 +8,10 @@
++ 
++ #include <asm/unaligned.h>
++ #include <crypto/algapi.h>
++-#include <crypto/chacha.h>
+++#include <crypto/internal/chacha.h>
++ #include <crypto/internal/skcipher.h>
++ #include <linux/module.h>
++ 
++-static void chacha_docrypt(u32 *state, u8 *dst, const u8 *src,
++-			   unsigned int bytes, int nrounds)
++-{
++-	/* aligned to potentially speed up crypto_xor() */
++-	u8 stream[CHACHA_BLOCK_SIZE] __aligned(sizeof(long));
++-
++-	while (bytes >= CHACHA_BLOCK_SIZE) {
++-		chacha_block(state, stream, nrounds);
++-		crypto_xor_cpy(dst, src, stream, CHACHA_BLOCK_SIZE);
++-		bytes -= CHACHA_BLOCK_SIZE;
++-		dst += CHACHA_BLOCK_SIZE;
++-		src += CHACHA_BLOCK_SIZE;
++-	}
++-	if (bytes) {
++-		chacha_block(state, stream, nrounds);
++-		crypto_xor_cpy(dst, src, stream, bytes);
++-	}
++-}
++-
++ static int chacha_stream_xor(struct skcipher_request *req,
++ 			     const struct chacha_ctx *ctx, const u8 *iv)
++ {
++@@ -48,8 +29,8 @@ static int chacha_stream_xor(struct skci
++ 		if (nbytes < walk.total)
++ 			nbytes = round_down(nbytes, CHACHA_BLOCK_SIZE);
++ 
++-		chacha_docrypt(state, walk.dst.virt.addr, walk.src.virt.addr,
++-			       nbytes, ctx->nrounds);
+++		chacha_crypt_generic(state, walk.dst.virt.addr,
+++				     walk.src.virt.addr, nbytes, ctx->nrounds);
++ 		err = skcipher_walk_done(&walk, walk.nbytes - nbytes);
++ 	}
++ 
++@@ -58,41 +39,10 @@ static int chacha_stream_xor(struct skci
++ 
++ void crypto_chacha_init(u32 *state, const struct chacha_ctx *ctx, const u8 *iv)
++ {
++-	state[0]  = 0x61707865; /* "expa" */
++-	state[1]  = 0x3320646e; /* "nd 3" */
++-	state[2]  = 0x79622d32; /* "2-by" */
++-	state[3]  = 0x6b206574; /* "te k" */
++-	state[4]  = ctx->key[0];
++-	state[5]  = ctx->key[1];
++-	state[6]  = ctx->key[2];
++-	state[7]  = ctx->key[3];
++-	state[8]  = ctx->key[4];
++-	state[9]  = ctx->key[5];
++-	state[10] = ctx->key[6];
++-	state[11] = ctx->key[7];
++-	state[12] = get_unaligned_le32(iv +  0);
++-	state[13] = get_unaligned_le32(iv +  4);
++-	state[14] = get_unaligned_le32(iv +  8);
++-	state[15] = get_unaligned_le32(iv + 12);
+++	chacha_init_generic(state, ctx->key, iv);
++ }
++ EXPORT_SYMBOL_GPL(crypto_chacha_init);
++ 
++-static int chacha_setkey(struct crypto_skcipher *tfm, const u8 *key,
++-			 unsigned int keysize, int nrounds)
++-{
++-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
++-	int i;
++-
++-	if (keysize != CHACHA_KEY_SIZE)
++-		return -EINVAL;
++-
++-	for (i = 0; i < ARRAY_SIZE(ctx->key); i++)
++-		ctx->key[i] = get_unaligned_le32(key + i * sizeof(u32));
++-
++-	ctx->nrounds = nrounds;
++-	return 0;
++-}
++-
++ int crypto_chacha20_setkey(struct crypto_skcipher *tfm, const u8 *key,
++ 			   unsigned int keysize)
++ {
++@@ -126,7 +76,7 @@ int crypto_xchacha_crypt(struct skcipher
++ 
++ 	/* Compute the subkey given the original key and first 128 nonce bits */
++ 	crypto_chacha_init(state, ctx, req->iv);
++-	hchacha_block(state, subctx.key, ctx->nrounds);
+++	hchacha_block_generic(state, subctx.key, ctx->nrounds);
++ 	subctx.nrounds = ctx->nrounds;
++ 
++ 	/* Build the real IV */
++--- a/include/crypto/chacha.h
+++++ b/include/crypto/chacha.h
++@@ -15,9 +15,8 @@
++ #ifndef _CRYPTO_CHACHA_H
++ #define _CRYPTO_CHACHA_H
++ 
++-#include <crypto/skcipher.h>
+++#include <asm/unaligned.h>
++ #include <linux/types.h>
++-#include <linux/crypto.h>
++ 
++ /* 32-bit stream position, then 96-bit nonce (RFC7539 convention) */
++ #define CHACHA_IV_SIZE		16
++@@ -29,26 +28,70 @@
++ /* 192-bit nonce, then 64-bit stream position */
++ #define XCHACHA_IV_SIZE		32
++ 
++-struct chacha_ctx {
++-	u32 key[8];
++-	int nrounds;
++-};
++-
++-void chacha_block(u32 *state, u8 *stream, int nrounds);
+++void chacha_block_generic(u32 *state, u8 *stream, int nrounds);
++ static inline void chacha20_block(u32 *state, u8 *stream)
++ {
++-	chacha_block(state, stream, 20);
+++	chacha_block_generic(state, stream, 20);
++ }
++-void hchacha_block(const u32 *in, u32 *out, int nrounds);
++ 
++-void crypto_chacha_init(u32 *state, const struct chacha_ctx *ctx, const u8 *iv);
+++void hchacha_block_arch(const u32 *state, u32 *out, int nrounds);
+++void hchacha_block_generic(const u32 *state, u32 *out, int nrounds);
+++
+++static inline void hchacha_block(const u32 *state, u32 *out, int nrounds)
+++{
+++	if (IS_ENABLED(CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA))
+++		hchacha_block_arch(state, out, nrounds);
+++	else
+++		hchacha_block_generic(state, out, nrounds);
+++}
++ 
++-int crypto_chacha20_setkey(struct crypto_skcipher *tfm, const u8 *key,
++-			   unsigned int keysize);
++-int crypto_chacha12_setkey(struct crypto_skcipher *tfm, const u8 *key,
++-			   unsigned int keysize);
+++void chacha_init_arch(u32 *state, const u32 *key, const u8 *iv);
+++static inline void chacha_init_generic(u32 *state, const u32 *key, const u8 *iv)
+++{
+++	state[0]  = 0x61707865; /* "expa" */
+++	state[1]  = 0x3320646e; /* "nd 3" */
+++	state[2]  = 0x79622d32; /* "2-by" */
+++	state[3]  = 0x6b206574; /* "te k" */
+++	state[4]  = key[0];
+++	state[5]  = key[1];
+++	state[6]  = key[2];
+++	state[7]  = key[3];
+++	state[8]  = key[4];
+++	state[9]  = key[5];
+++	state[10] = key[6];
+++	state[11] = key[7];
+++	state[12] = get_unaligned_le32(iv +  0);
+++	state[13] = get_unaligned_le32(iv +  4);
+++	state[14] = get_unaligned_le32(iv +  8);
+++	state[15] = get_unaligned_le32(iv + 12);
+++}
++ 
++-int crypto_chacha_crypt(struct skcipher_request *req);
++-int crypto_xchacha_crypt(struct skcipher_request *req);
+++static inline void chacha_init(u32 *state, const u32 *key, const u8 *iv)
+++{
+++	if (IS_ENABLED(CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA))
+++		chacha_init_arch(state, key, iv);
+++	else
+++		chacha_init_generic(state, key, iv);
+++}
+++
+++void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src,
+++		       unsigned int bytes, int nrounds);
+++void chacha_crypt_generic(u32 *state, u8 *dst, const u8 *src,
+++			  unsigned int bytes, int nrounds);
+++
+++static inline void chacha_crypt(u32 *state, u8 *dst, const u8 *src,
+++				unsigned int bytes, int nrounds)
+++{
+++	if (IS_ENABLED(CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA))
+++		chacha_crypt_arch(state, dst, src, bytes, nrounds);
+++	else
+++		chacha_crypt_generic(state, dst, src, bytes, nrounds);
+++}
+++
+++static inline void chacha20_crypt(u32 *state, u8 *dst, const u8 *src,
+++				  unsigned int bytes)
+++{
+++	chacha_crypt(state, dst, src, bytes, 20);
+++}
++ 
++ #endif /* _CRYPTO_CHACHA_H */
++--- /dev/null
+++++ b/include/crypto/internal/chacha.h
++@@ -0,0 +1,53 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++
+++#ifndef _CRYPTO_INTERNAL_CHACHA_H
+++#define _CRYPTO_INTERNAL_CHACHA_H
+++
+++#include <crypto/chacha.h>
+++#include <crypto/internal/skcipher.h>
+++#include <linux/crypto.h>
+++
+++struct chacha_ctx {
+++	u32 key[8];
+++	int nrounds;
+++};
+++
+++void crypto_chacha_init(u32 *state, const struct chacha_ctx *ctx, const u8 *iv);
+++
+++static inline int chacha_setkey(struct crypto_skcipher *tfm, const u8 *key,
+++				unsigned int keysize, int nrounds)
+++{
+++	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
+++	int i;
+++
+++	if (keysize != CHACHA_KEY_SIZE)
+++		return -EINVAL;
+++
+++	for (i = 0; i < ARRAY_SIZE(ctx->key); i++)
+++		ctx->key[i] = get_unaligned_le32(key + i * sizeof(u32));
+++
+++	ctx->nrounds = nrounds;
+++	return 0;
+++}
+++
+++static inline int chacha20_setkey(struct crypto_skcipher *tfm, const u8 *key,
+++				  unsigned int keysize)
+++{
+++	return chacha_setkey(tfm, key, keysize, 20);
+++}
+++
+++static int inline chacha12_setkey(struct crypto_skcipher *tfm, const u8 *key,
+++				  unsigned int keysize)
+++{
+++	return chacha_setkey(tfm, key, keysize, 12);
+++}
+++
+++int crypto_chacha20_setkey(struct crypto_skcipher *tfm, const u8 *key,
+++			   unsigned int keysize);
+++int crypto_chacha12_setkey(struct crypto_skcipher *tfm, const u8 *key,
+++			   unsigned int keysize);
+++
+++int crypto_chacha_crypt(struct skcipher_request *req);
+++int crypto_xchacha_crypt(struct skcipher_request *req);
+++
+++#endif /* _CRYPTO_CHACHA_H */
++--- a/lib/Makefile
+++++ b/lib/Makefile
++@@ -26,8 +26,7 @@ endif
++ 
++ lib-y := ctype.o string.o vsprintf.o cmdline.o \
++ 	 rbtree.o radix-tree.o timerqueue.o xarray.o \
++-	 idr.o extable.o \
++-	 sha1.o chacha.o irq_regs.o argv_split.o \
+++	 idr.o extable.o sha1.o irq_regs.o argv_split.o \
++ 	 flex_proportions.o ratelimit.o show_mem.o \
++ 	 is_single_threaded.o plist.o decompress.o kobject_uevent.o \
++ 	 earlycpio.o seq_buf.o siphash.o dec_and_lock.o \
++--- a/lib/crypto/Kconfig
+++++ b/lib/crypto/Kconfig
++@@ -8,6 +8,32 @@ config CRYPTO_LIB_AES
++ config CRYPTO_LIB_ARC4
++ 	tristate
++ 
+++config CRYPTO_ARCH_HAVE_LIB_CHACHA
+++	tristate
+++	help
+++	  Declares whether the architecture provides an arch-specific
+++	  accelerated implementation of the ChaCha library interface,
+++	  either builtin or as a module.
+++
+++config CRYPTO_LIB_CHACHA_GENERIC
+++	tristate
+++	select CRYPTO_ALGAPI
+++	help
+++	  This symbol can be depended upon by arch implementations of the
+++	  ChaCha library interface that require the generic code as a
+++	  fallback, e.g., for SIMD implementations. If no arch specific
+++	  implementation is enabled, this implementation serves the users
+++	  of CRYPTO_LIB_CHACHA.
+++
+++config CRYPTO_LIB_CHACHA
+++	tristate "ChaCha library interface"
+++	depends on CRYPTO_ARCH_HAVE_LIB_CHACHA || !CRYPTO_ARCH_HAVE_LIB_CHACHA
+++	select CRYPTO_LIB_CHACHA_GENERIC if CRYPTO_ARCH_HAVE_LIB_CHACHA=n
+++	help
+++	  Enable the ChaCha library interface. This interface may be fulfilled
+++	  by either the generic implementation or an arch-specific one, if one
+++	  is available and enabled.
+++
++ config CRYPTO_LIB_DES
++ 	tristate
++ 
++--- a/lib/crypto/Makefile
+++++ b/lib/crypto/Makefile
++@@ -1,5 +1,9 @@
++ # SPDX-License-Identifier: GPL-2.0
++ 
+++# chacha is used by the /dev/random driver which is always builtin
+++obj-y						+= chacha.o
+++obj-$(CONFIG_CRYPTO_LIB_CHACHA_GENERIC)		+= libchacha.o
+++
++ obj-$(CONFIG_CRYPTO_LIB_AES)			+= libaes.o
++ libaes-y					:= aes.o
++ 
++--- a/lib/chacha.c
+++++ /dev/null
++@@ -1,113 +0,0 @@
++-// SPDX-License-Identifier: GPL-2.0-or-later
++-/*
++- * The "hash function" used as the core of the ChaCha stream cipher (RFC7539)
++- *
++- * Copyright (C) 2015 Martin Willi
++- */
++-
++-#include <linux/kernel.h>
++-#include <linux/export.h>
++-#include <linux/bitops.h>
++-#include <linux/cryptohash.h>
++-#include <asm/unaligned.h>
++-#include <crypto/chacha.h>
++-
++-static void chacha_permute(u32 *x, int nrounds)
++-{
++-	int i;
++-
++-	/* whitelist the allowed round counts */
++-	WARN_ON_ONCE(nrounds != 20 && nrounds != 12);
++-
++-	for (i = 0; i < nrounds; i += 2) {
++-		x[0]  += x[4];    x[12] = rol32(x[12] ^ x[0],  16);
++-		x[1]  += x[5];    x[13] = rol32(x[13] ^ x[1],  16);
++-		x[2]  += x[6];    x[14] = rol32(x[14] ^ x[2],  16);
++-		x[3]  += x[7];    x[15] = rol32(x[15] ^ x[3],  16);
++-
++-		x[8]  += x[12];   x[4]  = rol32(x[4]  ^ x[8],  12);
++-		x[9]  += x[13];   x[5]  = rol32(x[5]  ^ x[9],  12);
++-		x[10] += x[14];   x[6]  = rol32(x[6]  ^ x[10], 12);
++-		x[11] += x[15];   x[7]  = rol32(x[7]  ^ x[11], 12);
++-
++-		x[0]  += x[4];    x[12] = rol32(x[12] ^ x[0],   8);
++-		x[1]  += x[5];    x[13] = rol32(x[13] ^ x[1],   8);
++-		x[2]  += x[6];    x[14] = rol32(x[14] ^ x[2],   8);
++-		x[3]  += x[7];    x[15] = rol32(x[15] ^ x[3],   8);
++-
++-		x[8]  += x[12];   x[4]  = rol32(x[4]  ^ x[8],   7);
++-		x[9]  += x[13];   x[5]  = rol32(x[5]  ^ x[9],   7);
++-		x[10] += x[14];   x[6]  = rol32(x[6]  ^ x[10],  7);
++-		x[11] += x[15];   x[7]  = rol32(x[7]  ^ x[11],  7);
++-
++-		x[0]  += x[5];    x[15] = rol32(x[15] ^ x[0],  16);
++-		x[1]  += x[6];    x[12] = rol32(x[12] ^ x[1],  16);
++-		x[2]  += x[7];    x[13] = rol32(x[13] ^ x[2],  16);
++-		x[3]  += x[4];    x[14] = rol32(x[14] ^ x[3],  16);
++-
++-		x[10] += x[15];   x[5]  = rol32(x[5]  ^ x[10], 12);
++-		x[11] += x[12];   x[6]  = rol32(x[6]  ^ x[11], 12);
++-		x[8]  += x[13];   x[7]  = rol32(x[7]  ^ x[8],  12);
++-		x[9]  += x[14];   x[4]  = rol32(x[4]  ^ x[9],  12);
++-
++-		x[0]  += x[5];    x[15] = rol32(x[15] ^ x[0],   8);
++-		x[1]  += x[6];    x[12] = rol32(x[12] ^ x[1],   8);
++-		x[2]  += x[7];    x[13] = rol32(x[13] ^ x[2],   8);
++-		x[3]  += x[4];    x[14] = rol32(x[14] ^ x[3],   8);
++-
++-		x[10] += x[15];   x[5]  = rol32(x[5]  ^ x[10],  7);
++-		x[11] += x[12];   x[6]  = rol32(x[6]  ^ x[11],  7);
++-		x[8]  += x[13];   x[7]  = rol32(x[7]  ^ x[8],   7);
++-		x[9]  += x[14];   x[4]  = rol32(x[4]  ^ x[9],   7);
++-	}
++-}
++-
++-/**
++- * chacha_block - generate one keystream block and increment block counter
++- * @state: input state matrix (16 32-bit words)
++- * @stream: output keystream block (64 bytes)
++- * @nrounds: number of rounds (20 or 12; 20 is recommended)
++- *
++- * This is the ChaCha core, a function from 64-byte strings to 64-byte strings.
++- * The caller has already converted the endianness of the input.  This function
++- * also handles incrementing the block counter in the input matrix.
++- */
++-void chacha_block(u32 *state, u8 *stream, int nrounds)
++-{
++-	u32 x[16];
++-	int i;
++-
++-	memcpy(x, state, 64);
++-
++-	chacha_permute(x, nrounds);
++-
++-	for (i = 0; i < ARRAY_SIZE(x); i++)
++-		put_unaligned_le32(x[i] + state[i], &stream[i * sizeof(u32)]);
++-
++-	state[12]++;
++-}
++-EXPORT_SYMBOL(chacha_block);
++-
++-/**
++- * hchacha_block - abbreviated ChaCha core, for XChaCha
++- * @in: input state matrix (16 32-bit words)
++- * @out: output (8 32-bit words)
++- * @nrounds: number of rounds (20 or 12; 20 is recommended)
++- *
++- * HChaCha is the ChaCha equivalent of HSalsa and is an intermediate step
++- * towards XChaCha (see https://cr.yp.to/snuffle/xsalsa-20081128.pdf).  HChaCha
++- * skips the final addition of the initial state, and outputs only certain words
++- * of the state.  It should not be used for streaming directly.
++- */
++-void hchacha_block(const u32 *in, u32 *out, int nrounds)
++-{
++-	u32 x[16];
++-
++-	memcpy(x, in, 64);
++-
++-	chacha_permute(x, nrounds);
++-
++-	memcpy(&out[0], &x[0], 16);
++-	memcpy(&out[4], &x[12], 16);
++-}
++-EXPORT_SYMBOL(hchacha_block);
++--- /dev/null
+++++ b/lib/crypto/chacha.c
++@@ -0,0 +1,115 @@
+++// SPDX-License-Identifier: GPL-2.0-or-later
+++/*
+++ * The "hash function" used as the core of the ChaCha stream cipher (RFC7539)
+++ *
+++ * Copyright (C) 2015 Martin Willi
+++ */
+++
+++#include <linux/bug.h>
+++#include <linux/kernel.h>
+++#include <linux/export.h>
+++#include <linux/bitops.h>
+++#include <linux/string.h>
+++#include <linux/cryptohash.h>
+++#include <asm/unaligned.h>
+++#include <crypto/chacha.h>
+++
+++static void chacha_permute(u32 *x, int nrounds)
+++{
+++	int i;
+++
+++	/* whitelist the allowed round counts */
+++	WARN_ON_ONCE(nrounds != 20 && nrounds != 12);
+++
+++	for (i = 0; i < nrounds; i += 2) {
+++		x[0]  += x[4];    x[12] = rol32(x[12] ^ x[0],  16);
+++		x[1]  += x[5];    x[13] = rol32(x[13] ^ x[1],  16);
+++		x[2]  += x[6];    x[14] = rol32(x[14] ^ x[2],  16);
+++		x[3]  += x[7];    x[15] = rol32(x[15] ^ x[3],  16);
+++
+++		x[8]  += x[12];   x[4]  = rol32(x[4]  ^ x[8],  12);
+++		x[9]  += x[13];   x[5]  = rol32(x[5]  ^ x[9],  12);
+++		x[10] += x[14];   x[6]  = rol32(x[6]  ^ x[10], 12);
+++		x[11] += x[15];   x[7]  = rol32(x[7]  ^ x[11], 12);
+++
+++		x[0]  += x[4];    x[12] = rol32(x[12] ^ x[0],   8);
+++		x[1]  += x[5];    x[13] = rol32(x[13] ^ x[1],   8);
+++		x[2]  += x[6];    x[14] = rol32(x[14] ^ x[2],   8);
+++		x[3]  += x[7];    x[15] = rol32(x[15] ^ x[3],   8);
+++
+++		x[8]  += x[12];   x[4]  = rol32(x[4]  ^ x[8],   7);
+++		x[9]  += x[13];   x[5]  = rol32(x[5]  ^ x[9],   7);
+++		x[10] += x[14];   x[6]  = rol32(x[6]  ^ x[10],  7);
+++		x[11] += x[15];   x[7]  = rol32(x[7]  ^ x[11],  7);
+++
+++		x[0]  += x[5];    x[15] = rol32(x[15] ^ x[0],  16);
+++		x[1]  += x[6];    x[12] = rol32(x[12] ^ x[1],  16);
+++		x[2]  += x[7];    x[13] = rol32(x[13] ^ x[2],  16);
+++		x[3]  += x[4];    x[14] = rol32(x[14] ^ x[3],  16);
+++
+++		x[10] += x[15];   x[5]  = rol32(x[5]  ^ x[10], 12);
+++		x[11] += x[12];   x[6]  = rol32(x[6]  ^ x[11], 12);
+++		x[8]  += x[13];   x[7]  = rol32(x[7]  ^ x[8],  12);
+++		x[9]  += x[14];   x[4]  = rol32(x[4]  ^ x[9],  12);
+++
+++		x[0]  += x[5];    x[15] = rol32(x[15] ^ x[0],   8);
+++		x[1]  += x[6];    x[12] = rol32(x[12] ^ x[1],   8);
+++		x[2]  += x[7];    x[13] = rol32(x[13] ^ x[2],   8);
+++		x[3]  += x[4];    x[14] = rol32(x[14] ^ x[3],   8);
+++
+++		x[10] += x[15];   x[5]  = rol32(x[5]  ^ x[10],  7);
+++		x[11] += x[12];   x[6]  = rol32(x[6]  ^ x[11],  7);
+++		x[8]  += x[13];   x[7]  = rol32(x[7]  ^ x[8],   7);
+++		x[9]  += x[14];   x[4]  = rol32(x[4]  ^ x[9],   7);
+++	}
+++}
+++
+++/**
+++ * chacha_block - generate one keystream block and increment block counter
+++ * @state: input state matrix (16 32-bit words)
+++ * @stream: output keystream block (64 bytes)
+++ * @nrounds: number of rounds (20 or 12; 20 is recommended)
+++ *
+++ * This is the ChaCha core, a function from 64-byte strings to 64-byte strings.
+++ * The caller has already converted the endianness of the input.  This function
+++ * also handles incrementing the block counter in the input matrix.
+++ */
+++void chacha_block_generic(u32 *state, u8 *stream, int nrounds)
+++{
+++	u32 x[16];
+++	int i;
+++
+++	memcpy(x, state, 64);
+++
+++	chacha_permute(x, nrounds);
+++
+++	for (i = 0; i < ARRAY_SIZE(x); i++)
+++		put_unaligned_le32(x[i] + state[i], &stream[i * sizeof(u32)]);
+++
+++	state[12]++;
+++}
+++EXPORT_SYMBOL(chacha_block_generic);
+++
+++/**
+++ * hchacha_block_generic - abbreviated ChaCha core, for XChaCha
+++ * @state: input state matrix (16 32-bit words)
+++ * @out: output (8 32-bit words)
+++ * @nrounds: number of rounds (20 or 12; 20 is recommended)
+++ *
+++ * HChaCha is the ChaCha equivalent of HSalsa and is an intermediate step
+++ * towards XChaCha (see https://cr.yp.to/snuffle/xsalsa-20081128.pdf).  HChaCha
+++ * skips the final addition of the initial state, and outputs only certain words
+++ * of the state.  It should not be used for streaming directly.
+++ */
+++void hchacha_block_generic(const u32 *state, u32 *stream, int nrounds)
+++{
+++	u32 x[16];
+++
+++	memcpy(x, state, 64);
+++
+++	chacha_permute(x, nrounds);
+++
+++	memcpy(&stream[0], &x[0], 16);
+++	memcpy(&stream[4], &x[12], 16);
+++}
+++EXPORT_SYMBOL(hchacha_block_generic);
++--- /dev/null
+++++ b/lib/crypto/libchacha.c
++@@ -0,0 +1,35 @@
+++// SPDX-License-Identifier: GPL-2.0-or-later
+++/*
+++ * The ChaCha stream cipher (RFC7539)
+++ *
+++ * Copyright (C) 2015 Martin Willi
+++ */
+++
+++#include <linux/kernel.h>
+++#include <linux/export.h>
+++#include <linux/module.h>
+++
+++#include <crypto/algapi.h> // for crypto_xor_cpy
+++#include <crypto/chacha.h>
+++
+++void chacha_crypt_generic(u32 *state, u8 *dst, const u8 *src,
+++			  unsigned int bytes, int nrounds)
+++{
+++	/* aligned to potentially speed up crypto_xor() */
+++	u8 stream[CHACHA_BLOCK_SIZE] __aligned(sizeof(long));
+++
+++	while (bytes >= CHACHA_BLOCK_SIZE) {
+++		chacha_block_generic(state, stream, nrounds);
+++		crypto_xor_cpy(dst, src, stream, CHACHA_BLOCK_SIZE);
+++		bytes -= CHACHA_BLOCK_SIZE;
+++		dst += CHACHA_BLOCK_SIZE;
+++		src += CHACHA_BLOCK_SIZE;
+++	}
+++	if (bytes) {
+++		chacha_block_generic(state, stream, nrounds);
+++		crypto_xor_cpy(dst, src, stream, bytes);
+++	}
+++}
+++EXPORT_SYMBOL(chacha_crypt_generic);
+++
+++MODULE_LICENSE("GPL");
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0003-crypto-x86-chacha-depend-on-generic-chacha-library-i.patch b/target/linux/generic/backport-5.4/080-wireguard-0003-crypto-x86-chacha-depend-on-generic-chacha-library-i.patch
+new file mode 100644
+index 0000000000..b1f59cc38f
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0003-crypto-x86-chacha-depend-on-generic-chacha-library-i.patch
+@@ -0,0 +1,192 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:09 +0100
++Subject: [PATCH] crypto: x86/chacha - depend on generic chacha library instead
++ of crypto driver
++
++commit 28e8d89b1ce8d2e7badfb5f69971dd635acb8863 upstream.
++
++In preparation of extending the x86 ChaCha driver to also expose the ChaCha
++library interface, drop the dependency on the chacha_generic crypto driver
++as a non-SIMD fallback, and depend on the generic ChaCha library directly.
++This way, we only pull in the code we actually need, without registering
++a set of ChaCha skciphers that we will never use.
++
++Since turning the FPU on and off is cheap these days, simplify the SIMD
++routine by dropping the per-page yield, which makes for a cleaner switch
++to the library API as well. This also allows use to invoke the skcipher
++walk routines in non-atomic mode.
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/chacha_glue.c | 90 ++++++++++++++---------------------
++ crypto/Kconfig                |  2 +-
++ 2 files changed, 36 insertions(+), 56 deletions(-)
++
++--- a/arch/x86/crypto/chacha_glue.c
+++++ b/arch/x86/crypto/chacha_glue.c
++@@ -123,37 +123,38 @@ static void chacha_dosimd(u32 *state, u8
++ 	}
++ }
++ 
++-static int chacha_simd_stream_xor(struct skcipher_walk *walk,
+++static int chacha_simd_stream_xor(struct skcipher_request *req,
++ 				  const struct chacha_ctx *ctx, const u8 *iv)
++ {
++ 	u32 *state, state_buf[16 + 2] __aligned(8);
++-	int next_yield = 4096; /* bytes until next FPU yield */
++-	int err = 0;
+++	struct skcipher_walk walk;
+++	int err;
+++
+++	err = skcipher_walk_virt(&walk, req, false);
++ 
++ 	BUILD_BUG_ON(CHACHA_STATE_ALIGN != 16);
++ 	state = PTR_ALIGN(state_buf + 0, CHACHA_STATE_ALIGN);
++ 
++-	crypto_chacha_init(state, ctx, iv);
+++	chacha_init_generic(state, ctx->key, iv);
++ 
++-	while (walk->nbytes > 0) {
++-		unsigned int nbytes = walk->nbytes;
+++	while (walk.nbytes > 0) {
+++		unsigned int nbytes = walk.nbytes;
++ 
++-		if (nbytes < walk->total) {
++-			nbytes = round_down(nbytes, walk->stride);
++-			next_yield -= nbytes;
++-		}
++-
++-		chacha_dosimd(state, walk->dst.virt.addr, walk->src.virt.addr,
++-			      nbytes, ctx->nrounds);
+++		if (nbytes < walk.total)
+++			nbytes = round_down(nbytes, walk.stride);
++ 
++-		if (next_yield <= 0) {
++-			/* temporarily allow preemption */
++-			kernel_fpu_end();
+++		if (!crypto_simd_usable()) {
+++			chacha_crypt_generic(state, walk.dst.virt.addr,
+++					     walk.src.virt.addr, nbytes,
+++					     ctx->nrounds);
+++		} else {
++ 			kernel_fpu_begin();
++-			next_yield = 4096;
+++			chacha_dosimd(state, walk.dst.virt.addr,
+++				      walk.src.virt.addr, nbytes,
+++				      ctx->nrounds);
+++			kernel_fpu_end();
++ 		}
++-
++-		err = skcipher_walk_done(walk, walk->nbytes - nbytes);
+++		err = skcipher_walk_done(&walk, walk.nbytes - nbytes);
++ 	}
++ 
++ 	return err;
++@@ -163,55 +164,34 @@ static int chacha_simd(struct skcipher_r
++ {
++ 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
++ 	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
++-	struct skcipher_walk walk;
++-	int err;
++-
++-	if (req->cryptlen <= CHACHA_BLOCK_SIZE || !crypto_simd_usable())
++-		return crypto_chacha_crypt(req);
++ 
++-	err = skcipher_walk_virt(&walk, req, true);
++-	if (err)
++-		return err;
++-
++-	kernel_fpu_begin();
++-	err = chacha_simd_stream_xor(&walk, ctx, req->iv);
++-	kernel_fpu_end();
++-	return err;
+++	return chacha_simd_stream_xor(req, ctx, req->iv);
++ }
++ 
++ static int xchacha_simd(struct skcipher_request *req)
++ {
++ 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
++ 	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
++-	struct skcipher_walk walk;
++-	struct chacha_ctx subctx;
++ 	u32 *state, state_buf[16 + 2] __aligned(8);
+++	struct chacha_ctx subctx;
++ 	u8 real_iv[16];
++-	int err;
++-
++-	if (req->cryptlen <= CHACHA_BLOCK_SIZE || !crypto_simd_usable())
++-		return crypto_xchacha_crypt(req);
++-
++-	err = skcipher_walk_virt(&walk, req, true);
++-	if (err)
++-		return err;
++ 
++ 	BUILD_BUG_ON(CHACHA_STATE_ALIGN != 16);
++ 	state = PTR_ALIGN(state_buf + 0, CHACHA_STATE_ALIGN);
++-	crypto_chacha_init(state, ctx, req->iv);
+++	chacha_init_generic(state, ctx->key, req->iv);
++ 
++-	kernel_fpu_begin();
++-
++-	hchacha_block_ssse3(state, subctx.key, ctx->nrounds);
+++	if (req->cryptlen > CHACHA_BLOCK_SIZE && crypto_simd_usable()) {
+++		kernel_fpu_begin();
+++		hchacha_block_ssse3(state, subctx.key, ctx->nrounds);
+++		kernel_fpu_end();
+++	} else {
+++		hchacha_block_generic(state, subctx.key, ctx->nrounds);
+++	}
++ 	subctx.nrounds = ctx->nrounds;
++ 
++ 	memcpy(&real_iv[0], req->iv + 24, 8);
++ 	memcpy(&real_iv[8], req->iv + 16, 8);
++-	err = chacha_simd_stream_xor(&walk, &subctx, real_iv);
++-
++-	kernel_fpu_end();
++-
++-	return err;
+++	return chacha_simd_stream_xor(req, &subctx, real_iv);
++ }
++ 
++ static struct skcipher_alg algs[] = {
++@@ -227,7 +207,7 @@ static struct skcipher_alg algs[] = {
++ 		.max_keysize		= CHACHA_KEY_SIZE,
++ 		.ivsize			= CHACHA_IV_SIZE,
++ 		.chunksize		= CHACHA_BLOCK_SIZE,
++-		.setkey			= crypto_chacha20_setkey,
+++		.setkey			= chacha20_setkey,
++ 		.encrypt		= chacha_simd,
++ 		.decrypt		= chacha_simd,
++ 	}, {
++@@ -242,7 +222,7 @@ static struct skcipher_alg algs[] = {
++ 		.max_keysize		= CHACHA_KEY_SIZE,
++ 		.ivsize			= XCHACHA_IV_SIZE,
++ 		.chunksize		= CHACHA_BLOCK_SIZE,
++-		.setkey			= crypto_chacha20_setkey,
+++		.setkey			= chacha20_setkey,
++ 		.encrypt		= xchacha_simd,
++ 		.decrypt		= xchacha_simd,
++ 	}, {
++@@ -257,7 +237,7 @@ static struct skcipher_alg algs[] = {
++ 		.max_keysize		= CHACHA_KEY_SIZE,
++ 		.ivsize			= XCHACHA_IV_SIZE,
++ 		.chunksize		= CHACHA_BLOCK_SIZE,
++-		.setkey			= crypto_chacha12_setkey,
+++		.setkey			= chacha12_setkey,
++ 		.encrypt		= xchacha_simd,
++ 		.decrypt		= xchacha_simd,
++ 	},
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -1417,7 +1417,7 @@ config CRYPTO_CHACHA20_X86_64
++ 	tristate "ChaCha stream cipher algorithms (x86_64/SSSE3/AVX2/AVX-512VL)"
++ 	depends on X86 && 64BIT
++ 	select CRYPTO_BLKCIPHER
++-	select CRYPTO_CHACHA20
+++	select CRYPTO_LIB_CHACHA_GENERIC
++ 	help
++ 	  SSSE3, AVX2, and AVX-512VL optimized implementations of the ChaCha20,
++ 	  XChaCha20, and XChaCha12 stream ciphers.
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0004-crypto-x86-chacha-expose-SIMD-ChaCha-routine-as-libr.patch b/target/linux/generic/backport-5.4/080-wireguard-0004-crypto-x86-chacha-expose-SIMD-ChaCha-routine-as-libr.patch
+new file mode 100644
+index 0000000000..0e5462837b
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0004-crypto-x86-chacha-expose-SIMD-ChaCha-routine-as-libr.patch
+@@ -0,0 +1,205 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:10 +0100
++Subject: [PATCH] crypto: x86/chacha - expose SIMD ChaCha routine as library
++ function
++
++commit 84e03fa39fbe95a5567d43bff458c6d3b3a23ad1 upstream.
++
++Wire the existing x86 SIMD ChaCha code into the new ChaCha library
++interface, so that users of the library interface will get the
++accelerated version when available.
++
++Given that calls into the library API will always go through the
++routines in this module if it is enabled, switch to static keys
++to select the optimal implementation available (which may be none
++at all, in which case we defer to the generic implementation for
++all invocations).
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/chacha_glue.c | 91 +++++++++++++++++++++++++----------
++ crypto/Kconfig                |  1 +
++ include/crypto/chacha.h       |  6 +++
++ 3 files changed, 73 insertions(+), 25 deletions(-)
++
++--- a/arch/x86/crypto/chacha_glue.c
+++++ b/arch/x86/crypto/chacha_glue.c
++@@ -21,24 +21,24 @@ asmlinkage void chacha_block_xor_ssse3(u
++ asmlinkage void chacha_4block_xor_ssse3(u32 *state, u8 *dst, const u8 *src,
++ 					unsigned int len, int nrounds);
++ asmlinkage void hchacha_block_ssse3(const u32 *state, u32 *out, int nrounds);
++-#ifdef CONFIG_AS_AVX2
+++
++ asmlinkage void chacha_2block_xor_avx2(u32 *state, u8 *dst, const u8 *src,
++ 				       unsigned int len, int nrounds);
++ asmlinkage void chacha_4block_xor_avx2(u32 *state, u8 *dst, const u8 *src,
++ 				       unsigned int len, int nrounds);
++ asmlinkage void chacha_8block_xor_avx2(u32 *state, u8 *dst, const u8 *src,
++ 				       unsigned int len, int nrounds);
++-static bool chacha_use_avx2;
++-#ifdef CONFIG_AS_AVX512
+++
++ asmlinkage void chacha_2block_xor_avx512vl(u32 *state, u8 *dst, const u8 *src,
++ 					   unsigned int len, int nrounds);
++ asmlinkage void chacha_4block_xor_avx512vl(u32 *state, u8 *dst, const u8 *src,
++ 					   unsigned int len, int nrounds);
++ asmlinkage void chacha_8block_xor_avx512vl(u32 *state, u8 *dst, const u8 *src,
++ 					   unsigned int len, int nrounds);
++-static bool chacha_use_avx512vl;
++-#endif
++-#endif
+++
+++static __ro_after_init DEFINE_STATIC_KEY_FALSE(chacha_use_simd);
+++static __ro_after_init DEFINE_STATIC_KEY_FALSE(chacha_use_avx2);
+++static __ro_after_init DEFINE_STATIC_KEY_FALSE(chacha_use_avx512vl);
++ 
++ static unsigned int chacha_advance(unsigned int len, unsigned int maxblocks)
++ {
++@@ -49,9 +49,8 @@ static unsigned int chacha_advance(unsig
++ static void chacha_dosimd(u32 *state, u8 *dst, const u8 *src,
++ 			  unsigned int bytes, int nrounds)
++ {
++-#ifdef CONFIG_AS_AVX2
++-#ifdef CONFIG_AS_AVX512
++-	if (chacha_use_avx512vl) {
+++	if (IS_ENABLED(CONFIG_AS_AVX512) &&
+++	    static_branch_likely(&chacha_use_avx512vl)) {
++ 		while (bytes >= CHACHA_BLOCK_SIZE * 8) {
++ 			chacha_8block_xor_avx512vl(state, dst, src, bytes,
++ 						   nrounds);
++@@ -79,8 +78,9 @@ static void chacha_dosimd(u32 *state, u8
++ 			return;
++ 		}
++ 	}
++-#endif
++-	if (chacha_use_avx2) {
+++
+++	if (IS_ENABLED(CONFIG_AS_AVX2) &&
+++	    static_branch_likely(&chacha_use_avx2)) {
++ 		while (bytes >= CHACHA_BLOCK_SIZE * 8) {
++ 			chacha_8block_xor_avx2(state, dst, src, bytes, nrounds);
++ 			bytes -= CHACHA_BLOCK_SIZE * 8;
++@@ -104,7 +104,7 @@ static void chacha_dosimd(u32 *state, u8
++ 			return;
++ 		}
++ 	}
++-#endif
+++
++ 	while (bytes >= CHACHA_BLOCK_SIZE * 4) {
++ 		chacha_4block_xor_ssse3(state, dst, src, bytes, nrounds);
++ 		bytes -= CHACHA_BLOCK_SIZE * 4;
++@@ -123,6 +123,43 @@ static void chacha_dosimd(u32 *state, u8
++ 	}
++ }
++ 
+++void hchacha_block_arch(const u32 *state, u32 *stream, int nrounds)
+++{
+++	state = PTR_ALIGN(state, CHACHA_STATE_ALIGN);
+++
+++	if (!static_branch_likely(&chacha_use_simd) || !crypto_simd_usable()) {
+++		hchacha_block_generic(state, stream, nrounds);
+++	} else {
+++		kernel_fpu_begin();
+++		hchacha_block_ssse3(state, stream, nrounds);
+++		kernel_fpu_end();
+++	}
+++}
+++EXPORT_SYMBOL(hchacha_block_arch);
+++
+++void chacha_init_arch(u32 *state, const u32 *key, const u8 *iv)
+++{
+++	state = PTR_ALIGN(state, CHACHA_STATE_ALIGN);
+++
+++	chacha_init_generic(state, key, iv);
+++}
+++EXPORT_SYMBOL(chacha_init_arch);
+++
+++void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src, unsigned int bytes,
+++		       int nrounds)
+++{
+++	state = PTR_ALIGN(state, CHACHA_STATE_ALIGN);
+++
+++	if (!static_branch_likely(&chacha_use_simd) || !crypto_simd_usable() ||
+++	    bytes <= CHACHA_BLOCK_SIZE)
+++		return chacha_crypt_generic(state, dst, src, bytes, nrounds);
+++
+++	kernel_fpu_begin();
+++	chacha_dosimd(state, dst, src, bytes, nrounds);
+++	kernel_fpu_end();
+++}
+++EXPORT_SYMBOL(chacha_crypt_arch);
+++
++ static int chacha_simd_stream_xor(struct skcipher_request *req,
++ 				  const struct chacha_ctx *ctx, const u8 *iv)
++ {
++@@ -143,7 +180,8 @@ static int chacha_simd_stream_xor(struct
++ 		if (nbytes < walk.total)
++ 			nbytes = round_down(nbytes, walk.stride);
++ 
++-		if (!crypto_simd_usable()) {
+++		if (!static_branch_likely(&chacha_use_simd) ||
+++		    !crypto_simd_usable()) {
++ 			chacha_crypt_generic(state, walk.dst.virt.addr,
++ 					     walk.src.virt.addr, nbytes,
++ 					     ctx->nrounds);
++@@ -246,18 +284,21 @@ static struct skcipher_alg algs[] = {
++ static int __init chacha_simd_mod_init(void)
++ {
++ 	if (!boot_cpu_has(X86_FEATURE_SSSE3))
++-		return -ENODEV;
+++		return 0;
++ 
++-#ifdef CONFIG_AS_AVX2
++-	chacha_use_avx2 = boot_cpu_has(X86_FEATURE_AVX) &&
++-			  boot_cpu_has(X86_FEATURE_AVX2) &&
++-			  cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL);
++-#ifdef CONFIG_AS_AVX512
++-	chacha_use_avx512vl = chacha_use_avx2 &&
++-			      boot_cpu_has(X86_FEATURE_AVX512VL) &&
++-			      boot_cpu_has(X86_FEATURE_AVX512BW); /* kmovq */
++-#endif
++-#endif
+++	static_branch_enable(&chacha_use_simd);
+++
+++	if (IS_ENABLED(CONFIG_AS_AVX2) &&
+++	    boot_cpu_has(X86_FEATURE_AVX) &&
+++	    boot_cpu_has(X86_FEATURE_AVX2) &&
+++	    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL)) {
+++		static_branch_enable(&chacha_use_avx2);
+++
+++		if (IS_ENABLED(CONFIG_AS_AVX512) &&
+++		    boot_cpu_has(X86_FEATURE_AVX512VL) &&
+++		    boot_cpu_has(X86_FEATURE_AVX512BW)) /* kmovq */
+++			static_branch_enable(&chacha_use_avx512vl);
+++	}
++ 	return crypto_register_skciphers(algs, ARRAY_SIZE(algs));
++ }
++ 
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -1418,6 +1418,7 @@ config CRYPTO_CHACHA20_X86_64
++ 	depends on X86 && 64BIT
++ 	select CRYPTO_BLKCIPHER
++ 	select CRYPTO_LIB_CHACHA_GENERIC
+++	select CRYPTO_ARCH_HAVE_LIB_CHACHA
++ 	help
++ 	  SSSE3, AVX2, and AVX-512VL optimized implementations of the ChaCha20,
++ 	  XChaCha20, and XChaCha12 stream ciphers.
++--- a/include/crypto/chacha.h
+++++ b/include/crypto/chacha.h
++@@ -25,6 +25,12 @@
++ #define CHACHA_BLOCK_SIZE	64
++ #define CHACHAPOLY_IV_SIZE	12
++ 
+++#ifdef CONFIG_X86_64
+++#define CHACHA_STATE_WORDS	((CHACHA_BLOCK_SIZE + 12) / sizeof(u32))
+++#else
+++#define CHACHA_STATE_WORDS	(CHACHA_BLOCK_SIZE / sizeof(u32))
+++#endif
+++
++ /* 192-bit nonce, then 64-bit stream position */
++ #define XCHACHA_IV_SIZE		32
++ 
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0005-crypto-arm64-chacha-depend-on-generic-chacha-library.patch b/target/linux/generic/backport-5.4/080-wireguard-0005-crypto-arm64-chacha-depend-on-generic-chacha-library.patch
+new file mode 100644
+index 0000000000..10e49c192c
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0005-crypto-arm64-chacha-depend-on-generic-chacha-library.patch
+@@ -0,0 +1,129 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:11 +0100
++Subject: [PATCH] crypto: arm64/chacha - depend on generic chacha library
++ instead of crypto driver
++
++commit c77da4867cbb7841177275dbb250f5c09679fae4 upstream.
++
++Depend on the generic ChaCha library routines instead of pulling in the
++generic ChaCha skcipher driver, which is more than we need, and makes
++managing the dependencies between the generic library, generic driver,
++accelerated library and driver more complicated.
++
++While at it, drop the logic to prefer the scalar code on short inputs.
++Turning the NEON on and off is cheap these days, and one major use case
++for ChaCha20 is ChaCha20-Poly1305, which is guaranteed to hit the scalar
++path upon every invocation  (when doing the Poly1305 nonce generation)
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm64/crypto/Kconfig            |  2 +-
++ arch/arm64/crypto/chacha-neon-glue.c | 40 +++++++++++++++-------------
++ 2 files changed, 23 insertions(+), 19 deletions(-)
++
++--- a/arch/arm64/crypto/Kconfig
+++++ b/arch/arm64/crypto/Kconfig
++@@ -103,7 +103,7 @@ config CRYPTO_CHACHA20_NEON
++ 	tristate "ChaCha20, XChaCha20, and XChaCha12 stream ciphers using NEON instructions"
++ 	depends on KERNEL_MODE_NEON
++ 	select CRYPTO_BLKCIPHER
++-	select CRYPTO_CHACHA20
+++	select CRYPTO_LIB_CHACHA_GENERIC
++ 
++ config CRYPTO_NHPOLY1305_NEON
++ 	tristate "NHPoly1305 hash function using NEON instructions (for Adiantum)"
++--- a/arch/arm64/crypto/chacha-neon-glue.c
+++++ b/arch/arm64/crypto/chacha-neon-glue.c
++@@ -68,7 +68,7 @@ static int chacha_neon_stream_xor(struct
++ 
++ 	err = skcipher_walk_virt(&walk, req, false);
++ 
++-	crypto_chacha_init(state, ctx, iv);
+++	chacha_init_generic(state, ctx->key, iv);
++ 
++ 	while (walk.nbytes > 0) {
++ 		unsigned int nbytes = walk.nbytes;
++@@ -76,10 +76,16 @@ static int chacha_neon_stream_xor(struct
++ 		if (nbytes < walk.total)
++ 			nbytes = rounddown(nbytes, walk.stride);
++ 
++-		kernel_neon_begin();
++-		chacha_doneon(state, walk.dst.virt.addr, walk.src.virt.addr,
++-			      nbytes, ctx->nrounds);
++-		kernel_neon_end();
+++		if (!crypto_simd_usable()) {
+++			chacha_crypt_generic(state, walk.dst.virt.addr,
+++					     walk.src.virt.addr, nbytes,
+++					     ctx->nrounds);
+++		} else {
+++			kernel_neon_begin();
+++			chacha_doneon(state, walk.dst.virt.addr,
+++				      walk.src.virt.addr, nbytes, ctx->nrounds);
+++			kernel_neon_end();
+++		}
++ 		err = skcipher_walk_done(&walk, walk.nbytes - nbytes);
++ 	}
++ 
++@@ -91,9 +97,6 @@ static int chacha_neon(struct skcipher_r
++ 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
++ 	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
++ 
++-	if (req->cryptlen <= CHACHA_BLOCK_SIZE || !crypto_simd_usable())
++-		return crypto_chacha_crypt(req);
++-
++ 	return chacha_neon_stream_xor(req, ctx, req->iv);
++ }
++ 
++@@ -105,14 +108,15 @@ static int xchacha_neon(struct skcipher_
++ 	u32 state[16];
++ 	u8 real_iv[16];
++ 
++-	if (req->cryptlen <= CHACHA_BLOCK_SIZE || !crypto_simd_usable())
++-		return crypto_xchacha_crypt(req);
++-
++-	crypto_chacha_init(state, ctx, req->iv);
+++	chacha_init_generic(state, ctx->key, req->iv);
++ 
++-	kernel_neon_begin();
++-	hchacha_block_neon(state, subctx.key, ctx->nrounds);
++-	kernel_neon_end();
+++	if (crypto_simd_usable()) {
+++		kernel_neon_begin();
+++		hchacha_block_neon(state, subctx.key, ctx->nrounds);
+++		kernel_neon_end();
+++	} else {
+++		hchacha_block_generic(state, subctx.key, ctx->nrounds);
+++	}
++ 	subctx.nrounds = ctx->nrounds;
++ 
++ 	memcpy(&real_iv[0], req->iv + 24, 8);
++@@ -134,7 +138,7 @@ static struct skcipher_alg algs[] = {
++ 		.ivsize			= CHACHA_IV_SIZE,
++ 		.chunksize		= CHACHA_BLOCK_SIZE,
++ 		.walksize		= 5 * CHACHA_BLOCK_SIZE,
++-		.setkey			= crypto_chacha20_setkey,
+++		.setkey			= chacha20_setkey,
++ 		.encrypt		= chacha_neon,
++ 		.decrypt		= chacha_neon,
++ 	}, {
++@@ -150,7 +154,7 @@ static struct skcipher_alg algs[] = {
++ 		.ivsize			= XCHACHA_IV_SIZE,
++ 		.chunksize		= CHACHA_BLOCK_SIZE,
++ 		.walksize		= 5 * CHACHA_BLOCK_SIZE,
++-		.setkey			= crypto_chacha20_setkey,
+++		.setkey			= chacha20_setkey,
++ 		.encrypt		= xchacha_neon,
++ 		.decrypt		= xchacha_neon,
++ 	}, {
++@@ -166,7 +170,7 @@ static struct skcipher_alg algs[] = {
++ 		.ivsize			= XCHACHA_IV_SIZE,
++ 		.chunksize		= CHACHA_BLOCK_SIZE,
++ 		.walksize		= 5 * CHACHA_BLOCK_SIZE,
++-		.setkey			= crypto_chacha12_setkey,
+++		.setkey			= chacha12_setkey,
++ 		.encrypt		= xchacha_neon,
++ 		.decrypt		= xchacha_neon,
++ 	}
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0006-crypto-arm64-chacha-expose-arm64-ChaCha-routine-as-l.patch b/target/linux/generic/backport-5.4/080-wireguard-0006-crypto-arm64-chacha-expose-arm64-ChaCha-routine-as-l.patch
+new file mode 100644
+index 0000000000..71665e8bfd
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0006-crypto-arm64-chacha-expose-arm64-ChaCha-routine-as-l.patch
+@@ -0,0 +1,138 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:12 +0100
++Subject: [PATCH] crypto: arm64/chacha - expose arm64 ChaCha routine as library
++ function
++
++commit b3aad5bad26a01a4bd8c49a5c5f52aec665f3b7c upstream.
++
++Expose the accelerated NEON ChaCha routine directly as a symbol
++export so that users of the ChaCha library API can use it directly.
++
++Given that calls into the library API will always go through the
++routines in this module if it is enabled, switch to static keys
++to select the optimal implementation available (which may be none
++at all, in which case we defer to the generic implementation for
++all invocations).
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm64/crypto/Kconfig            |  1 +
++ arch/arm64/crypto/chacha-neon-glue.c | 53 ++++++++++++++++++++++------
++ 2 files changed, 43 insertions(+), 11 deletions(-)
++
++--- a/arch/arm64/crypto/Kconfig
+++++ b/arch/arm64/crypto/Kconfig
++@@ -104,6 +104,7 @@ config CRYPTO_CHACHA20_NEON
++ 	depends on KERNEL_MODE_NEON
++ 	select CRYPTO_BLKCIPHER
++ 	select CRYPTO_LIB_CHACHA_GENERIC
+++	select CRYPTO_ARCH_HAVE_LIB_CHACHA
++ 
++ config CRYPTO_NHPOLY1305_NEON
++ 	tristate "NHPoly1305 hash function using NEON instructions (for Adiantum)"
++--- a/arch/arm64/crypto/chacha-neon-glue.c
+++++ b/arch/arm64/crypto/chacha-neon-glue.c
++@@ -23,6 +23,7 @@
++ #include <crypto/internal/chacha.h>
++ #include <crypto/internal/simd.h>
++ #include <crypto/internal/skcipher.h>
+++#include <linux/jump_label.h>
++ #include <linux/kernel.h>
++ #include <linux/module.h>
++ 
++@@ -36,6 +37,8 @@ asmlinkage void chacha_4block_xor_neon(u
++ 				       int nrounds, int bytes);
++ asmlinkage void hchacha_block_neon(const u32 *state, u32 *out, int nrounds);
++ 
+++static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);
+++
++ static void chacha_doneon(u32 *state, u8 *dst, const u8 *src,
++ 			  int bytes, int nrounds)
++ {
++@@ -59,6 +62,37 @@ static void chacha_doneon(u32 *state, u8
++ 	}
++ }
++ 
+++void hchacha_block_arch(const u32 *state, u32 *stream, int nrounds)
+++{
+++	if (!static_branch_likely(&have_neon) || !crypto_simd_usable()) {
+++		hchacha_block_generic(state, stream, nrounds);
+++	} else {
+++		kernel_neon_begin();
+++		hchacha_block_neon(state, stream, nrounds);
+++		kernel_neon_end();
+++	}
+++}
+++EXPORT_SYMBOL(hchacha_block_arch);
+++
+++void chacha_init_arch(u32 *state, const u32 *key, const u8 *iv)
+++{
+++	chacha_init_generic(state, key, iv);
+++}
+++EXPORT_SYMBOL(chacha_init_arch);
+++
+++void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src, unsigned int bytes,
+++		       int nrounds)
+++{
+++	if (!static_branch_likely(&have_neon) || bytes <= CHACHA_BLOCK_SIZE ||
+++	    !crypto_simd_usable())
+++		return chacha_crypt_generic(state, dst, src, bytes, nrounds);
+++
+++	kernel_neon_begin();
+++	chacha_doneon(state, dst, src, bytes, nrounds);
+++	kernel_neon_end();
+++}
+++EXPORT_SYMBOL(chacha_crypt_arch);
+++
++ static int chacha_neon_stream_xor(struct skcipher_request *req,
++ 				  const struct chacha_ctx *ctx, const u8 *iv)
++ {
++@@ -76,7 +110,8 @@ static int chacha_neon_stream_xor(struct
++ 		if (nbytes < walk.total)
++ 			nbytes = rounddown(nbytes, walk.stride);
++ 
++-		if (!crypto_simd_usable()) {
+++		if (!static_branch_likely(&have_neon) ||
+++		    !crypto_simd_usable()) {
++ 			chacha_crypt_generic(state, walk.dst.virt.addr,
++ 					     walk.src.virt.addr, nbytes,
++ 					     ctx->nrounds);
++@@ -109,14 +144,7 @@ static int xchacha_neon(struct skcipher_
++ 	u8 real_iv[16];
++ 
++ 	chacha_init_generic(state, ctx->key, req->iv);
++-
++-	if (crypto_simd_usable()) {
++-		kernel_neon_begin();
++-		hchacha_block_neon(state, subctx.key, ctx->nrounds);
++-		kernel_neon_end();
++-	} else {
++-		hchacha_block_generic(state, subctx.key, ctx->nrounds);
++-	}
+++	hchacha_block_arch(state, subctx.key, ctx->nrounds);
++ 	subctx.nrounds = ctx->nrounds;
++ 
++ 	memcpy(&real_iv[0], req->iv + 24, 8);
++@@ -179,14 +207,17 @@ static struct skcipher_alg algs[] = {
++ static int __init chacha_simd_mod_init(void)
++ {
++ 	if (!cpu_have_named_feature(ASIMD))
++-		return -ENODEV;
+++		return 0;
+++
+++	static_branch_enable(&have_neon);
++ 
++ 	return crypto_register_skciphers(algs, ARRAY_SIZE(algs));
++ }
++ 
++ static void __exit chacha_simd_mod_fini(void)
++ {
++-	crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));
+++	if (cpu_have_named_feature(ASIMD))
+++		crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));
++ }
++ 
++ module_init(chacha_simd_mod_init);
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0007-crypto-arm-chacha-import-Eric-Biggers-s-scalar-accel.patch b/target/linux/generic/backport-5.4/080-wireguard-0007-crypto-arm-chacha-import-Eric-Biggers-s-scalar-accel.patch
+new file mode 100644
+index 0000000000..978f2f55be
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0007-crypto-arm-chacha-import-Eric-Biggers-s-scalar-accel.patch
+@@ -0,0 +1,480 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:13 +0100
++Subject: [PATCH] crypto: arm/chacha - import Eric Biggers's scalar accelerated
++ ChaCha code
++
++commit 29621d099f9c642b22a69dc8e7e20c108473a392 upstream.
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/chacha-scalar-core.S | 461 +++++++++++++++++++++++++++
++ 1 file changed, 461 insertions(+)
++ create mode 100644 arch/arm/crypto/chacha-scalar-core.S
++
++--- /dev/null
+++++ b/arch/arm/crypto/chacha-scalar-core.S
++@@ -0,0 +1,461 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++/*
+++ * Copyright (C) 2018 Google, Inc.
+++ */
+++
+++#include <linux/linkage.h>
+++#include <asm/assembler.h>
+++
+++/*
+++ * Design notes:
+++ *
+++ * 16 registers would be needed to hold the state matrix, but only 14 are
+++ * available because 'sp' and 'pc' cannot be used.  So we spill the elements
+++ * (x8, x9) to the stack and swap them out with (x10, x11).  This adds one
+++ * 'ldrd' and one 'strd' instruction per round.
+++ *
+++ * All rotates are performed using the implicit rotate operand accepted by the
+++ * 'add' and 'eor' instructions.  This is faster than using explicit rotate
+++ * instructions.  To make this work, we allow the values in the second and last
+++ * rows of the ChaCha state matrix (rows 'b' and 'd') to temporarily have the
+++ * wrong rotation amount.  The rotation amount is then fixed up just in time
+++ * when the values are used.  'brot' is the number of bits the values in row 'b'
+++ * need to be rotated right to arrive at the correct values, and 'drot'
+++ * similarly for row 'd'.  (brot, drot) start out as (0, 0) but we make it such
+++ * that they end up as (25, 24) after every round.
+++ */
+++
+++	// ChaCha state registers
+++	X0	.req	r0
+++	X1	.req	r1
+++	X2	.req	r2
+++	X3	.req	r3
+++	X4	.req	r4
+++	X5	.req	r5
+++	X6	.req	r6
+++	X7	.req	r7
+++	X8_X10	.req	r8	// shared by x8 and x10
+++	X9_X11	.req	r9	// shared by x9 and x11
+++	X12	.req	r10
+++	X13	.req	r11
+++	X14	.req	r12
+++	X15	.req	r14
+++
+++.Lexpand_32byte_k:
+++	// "expand 32-byte k"
+++	.word	0x61707865, 0x3320646e, 0x79622d32, 0x6b206574
+++
+++#ifdef __thumb2__
+++#  define adrl adr
+++#endif
+++
+++.macro __rev		out, in,  t0, t1, t2
+++.if __LINUX_ARM_ARCH__ >= 6
+++	rev		\out, \in
+++.else
+++	lsl		\t0, \in, #24
+++	and		\t1, \in, #0xff00
+++	and		\t2, \in, #0xff0000
+++	orr		\out, \t0, \in, lsr #24
+++	orr		\out, \out, \t1, lsl #8
+++	orr		\out, \out, \t2, lsr #8
+++.endif
+++.endm
+++
+++.macro _le32_bswap	x,  t0, t1, t2
+++#ifdef __ARMEB__
+++	__rev		\x, \x,  \t0, \t1, \t2
+++#endif
+++.endm
+++
+++.macro _le32_bswap_4x	a, b, c, d,  t0, t1, t2
+++	_le32_bswap	\a,  \t0, \t1, \t2
+++	_le32_bswap	\b,  \t0, \t1, \t2
+++	_le32_bswap	\c,  \t0, \t1, \t2
+++	_le32_bswap	\d,  \t0, \t1, \t2
+++.endm
+++
+++.macro __ldrd		a, b, src, offset
+++#if __LINUX_ARM_ARCH__ >= 6
+++	ldrd		\a, \b, [\src, #\offset]
+++#else
+++	ldr		\a, [\src, #\offset]
+++	ldr		\b, [\src, #\offset + 4]
+++#endif
+++.endm
+++
+++.macro __strd		a, b, dst, offset
+++#if __LINUX_ARM_ARCH__ >= 6
+++	strd		\a, \b, [\dst, #\offset]
+++#else
+++	str		\a, [\dst, #\offset]
+++	str		\b, [\dst, #\offset + 4]
+++#endif
+++.endm
+++
+++.macro _halfround	a1, b1, c1, d1,  a2, b2, c2, d2
+++
+++	// a += b; d ^= a; d = rol(d, 16);
+++	add		\a1, \a1, \b1, ror #brot
+++	add		\a2, \a2, \b2, ror #brot
+++	eor		\d1, \a1, \d1, ror #drot
+++	eor		\d2, \a2, \d2, ror #drot
+++	// drot == 32 - 16 == 16
+++
+++	// c += d; b ^= c; b = rol(b, 12);
+++	add		\c1, \c1, \d1, ror #16
+++	add		\c2, \c2, \d2, ror #16
+++	eor		\b1, \c1, \b1, ror #brot
+++	eor		\b2, \c2, \b2, ror #brot
+++	// brot == 32 - 12 == 20
+++
+++	// a += b; d ^= a; d = rol(d, 8);
+++	add		\a1, \a1, \b1, ror #20
+++	add		\a2, \a2, \b2, ror #20
+++	eor		\d1, \a1, \d1, ror #16
+++	eor		\d2, \a2, \d2, ror #16
+++	// drot == 32 - 8 == 24
+++
+++	// c += d; b ^= c; b = rol(b, 7);
+++	add		\c1, \c1, \d1, ror #24
+++	add		\c2, \c2, \d2, ror #24
+++	eor		\b1, \c1, \b1, ror #20
+++	eor		\b2, \c2, \b2, ror #20
+++	// brot == 32 - 7 == 25
+++.endm
+++
+++.macro _doubleround
+++
+++	// column round
+++
+++	// quarterrounds: (x0, x4, x8, x12) and (x1, x5, x9, x13)
+++	_halfround	X0, X4, X8_X10, X12,  X1, X5, X9_X11, X13
+++
+++	// save (x8, x9); restore (x10, x11)
+++	__strd		X8_X10, X9_X11, sp, 0
+++	__ldrd		X8_X10, X9_X11, sp, 8
+++
+++	// quarterrounds: (x2, x6, x10, x14) and (x3, x7, x11, x15)
+++	_halfround	X2, X6, X8_X10, X14,  X3, X7, X9_X11, X15
+++
+++	.set brot, 25
+++	.set drot, 24
+++
+++	// diagonal round
+++
+++	// quarterrounds: (x0, x5, x10, x15) and (x1, x6, x11, x12)
+++	_halfround	X0, X5, X8_X10, X15,  X1, X6, X9_X11, X12
+++
+++	// save (x10, x11); restore (x8, x9)
+++	__strd		X8_X10, X9_X11, sp, 8
+++	__ldrd		X8_X10, X9_X11, sp, 0
+++
+++	// quarterrounds: (x2, x7, x8, x13) and (x3, x4, x9, x14)
+++	_halfround	X2, X7, X8_X10, X13,  X3, X4, X9_X11, X14
+++.endm
+++
+++.macro _chacha_permute	nrounds
+++	.set brot, 0
+++	.set drot, 0
+++	.rept \nrounds / 2
+++	 _doubleround
+++	.endr
+++.endm
+++
+++.macro _chacha		nrounds
+++
+++.Lnext_block\@:
+++	// Stack: unused0-unused1 x10-x11 x0-x15 OUT IN LEN
+++	// Registers contain x0-x9,x12-x15.
+++
+++	// Do the core ChaCha permutation to update x0-x15.
+++	_chacha_permute	\nrounds
+++
+++	add		sp, #8
+++	// Stack: x10-x11 orig_x0-orig_x15 OUT IN LEN
+++	// Registers contain x0-x9,x12-x15.
+++	// x4-x7 are rotated by 'brot'; x12-x15 are rotated by 'drot'.
+++
+++	// Free up some registers (r8-r12,r14) by pushing (x8-x9,x12-x15).
+++	push		{X8_X10, X9_X11, X12, X13, X14, X15}
+++
+++	// Load (OUT, IN, LEN).
+++	ldr		r14, [sp, #96]
+++	ldr		r12, [sp, #100]
+++	ldr		r11, [sp, #104]
+++
+++	orr		r10, r14, r12
+++
+++	// Use slow path if fewer than 64 bytes remain.
+++	cmp		r11, #64
+++	blt		.Lxor_slowpath\@
+++
+++	// Use slow path if IN and/or OUT isn't 4-byte aligned.  Needed even on
+++	// ARMv6+, since ldmia and stmia (used below) still require alignment.
+++	tst		r10, #3
+++	bne		.Lxor_slowpath\@
+++
+++	// Fast path: XOR 64 bytes of aligned data.
+++
+++	// Stack: x8-x9 x12-x15 x10-x11 orig_x0-orig_x15 OUT IN LEN
+++	// Registers: r0-r7 are x0-x7; r8-r11 are free; r12 is IN; r14 is OUT.
+++	// x4-x7 are rotated by 'brot'; x12-x15 are rotated by 'drot'.
+++
+++	// x0-x3
+++	__ldrd		r8, r9, sp, 32
+++	__ldrd		r10, r11, sp, 40
+++	add		X0, X0, r8
+++	add		X1, X1, r9
+++	add		X2, X2, r10
+++	add		X3, X3, r11
+++	_le32_bswap_4x	X0, X1, X2, X3,  r8, r9, r10
+++	ldmia		r12!, {r8-r11}
+++	eor		X0, X0, r8
+++	eor		X1, X1, r9
+++	eor		X2, X2, r10
+++	eor		X3, X3, r11
+++	stmia		r14!, {X0-X3}
+++
+++	// x4-x7
+++	__ldrd		r8, r9, sp, 48
+++	__ldrd		r10, r11, sp, 56
+++	add		X4, r8, X4, ror #brot
+++	add		X5, r9, X5, ror #brot
+++	ldmia		r12!, {X0-X3}
+++	add		X6, r10, X6, ror #brot
+++	add		X7, r11, X7, ror #brot
+++	_le32_bswap_4x	X4, X5, X6, X7,  r8, r9, r10
+++	eor		X4, X4, X0
+++	eor		X5, X5, X1
+++	eor		X6, X6, X2
+++	eor		X7, X7, X3
+++	stmia		r14!, {X4-X7}
+++
+++	// x8-x15
+++	pop		{r0-r7}			// (x8-x9,x12-x15,x10-x11)
+++	__ldrd		r8, r9, sp, 32
+++	__ldrd		r10, r11, sp, 40
+++	add		r0, r0, r8		// x8
+++	add		r1, r1, r9		// x9
+++	add		r6, r6, r10		// x10
+++	add		r7, r7, r11		// x11
+++	_le32_bswap_4x	r0, r1, r6, r7,  r8, r9, r10
+++	ldmia		r12!, {r8-r11}
+++	eor		r0, r0, r8		// x8
+++	eor		r1, r1, r9		// x9
+++	eor		r6, r6, r10		// x10
+++	eor		r7, r7, r11		// x11
+++	stmia		r14!, {r0,r1,r6,r7}
+++	ldmia		r12!, {r0,r1,r6,r7}
+++	__ldrd		r8, r9, sp, 48
+++	__ldrd		r10, r11, sp, 56
+++	add		r2, r8, r2, ror #drot	// x12
+++	add		r3, r9, r3, ror #drot	// x13
+++	add		r4, r10, r4, ror #drot	// x14
+++	add		r5, r11, r5, ror #drot	// x15
+++	_le32_bswap_4x	r2, r3, r4, r5,  r9, r10, r11
+++	  ldr		r9, [sp, #72]		// load LEN
+++	eor		r2, r2, r0		// x12
+++	eor		r3, r3, r1		// x13
+++	eor		r4, r4, r6		// x14
+++	eor		r5, r5, r7		// x15
+++	  subs		r9, #64			// decrement and check LEN
+++	stmia		r14!, {r2-r5}
+++
+++	beq		.Ldone\@
+++
+++.Lprepare_for_next_block\@:
+++
+++	// Stack: x0-x15 OUT IN LEN
+++
+++	// Increment block counter (x12)
+++	add		r8, #1
+++
+++	// Store updated (OUT, IN, LEN)
+++	str		r14, [sp, #64]
+++	str		r12, [sp, #68]
+++	str		r9, [sp, #72]
+++
+++	  mov		r14, sp
+++
+++	// Store updated block counter (x12)
+++	str		r8, [sp, #48]
+++
+++	  sub		sp, #16
+++
+++	// Reload state and do next block
+++	ldmia		r14!, {r0-r11}		// load x0-x11
+++	__strd		r10, r11, sp, 8		// store x10-x11 before state
+++	ldmia		r14, {r10-r12,r14}	// load x12-x15
+++	b		.Lnext_block\@
+++
+++.Lxor_slowpath\@:
+++	// Slow path: < 64 bytes remaining, or unaligned input or output buffer.
+++	// We handle it by storing the 64 bytes of keystream to the stack, then
+++	// XOR-ing the needed portion with the data.
+++
+++	// Allocate keystream buffer
+++	sub		sp, #64
+++	mov		r14, sp
+++
+++	// Stack: ks0-ks15 x8-x9 x12-x15 x10-x11 orig_x0-orig_x15 OUT IN LEN
+++	// Registers: r0-r7 are x0-x7; r8-r11 are free; r12 is IN; r14 is &ks0.
+++	// x4-x7 are rotated by 'brot'; x12-x15 are rotated by 'drot'.
+++
+++	// Save keystream for x0-x3
+++	__ldrd		r8, r9, sp, 96
+++	__ldrd		r10, r11, sp, 104
+++	add		X0, X0, r8
+++	add		X1, X1, r9
+++	add		X2, X2, r10
+++	add		X3, X3, r11
+++	_le32_bswap_4x	X0, X1, X2, X3,  r8, r9, r10
+++	stmia		r14!, {X0-X3}
+++
+++	// Save keystream for x4-x7
+++	__ldrd		r8, r9, sp, 112
+++	__ldrd		r10, r11, sp, 120
+++	add		X4, r8, X4, ror #brot
+++	add		X5, r9, X5, ror #brot
+++	add		X6, r10, X6, ror #brot
+++	add		X7, r11, X7, ror #brot
+++	_le32_bswap_4x	X4, X5, X6, X7,  r8, r9, r10
+++	  add		r8, sp, #64
+++	stmia		r14!, {X4-X7}
+++
+++	// Save keystream for x8-x15
+++	ldm		r8, {r0-r7}		// (x8-x9,x12-x15,x10-x11)
+++	__ldrd		r8, r9, sp, 128
+++	__ldrd		r10, r11, sp, 136
+++	add		r0, r0, r8		// x8
+++	add		r1, r1, r9		// x9
+++	add		r6, r6, r10		// x10
+++	add		r7, r7, r11		// x11
+++	_le32_bswap_4x	r0, r1, r6, r7,  r8, r9, r10
+++	stmia		r14!, {r0,r1,r6,r7}
+++	__ldrd		r8, r9, sp, 144
+++	__ldrd		r10, r11, sp, 152
+++	add		r2, r8, r2, ror #drot	// x12
+++	add		r3, r9, r3, ror #drot	// x13
+++	add		r4, r10, r4, ror #drot	// x14
+++	add		r5, r11, r5, ror #drot	// x15
+++	_le32_bswap_4x	r2, r3, r4, r5,  r9, r10, r11
+++	stmia		r14, {r2-r5}
+++
+++	// Stack: ks0-ks15 unused0-unused7 x0-x15 OUT IN LEN
+++	// Registers: r8 is block counter, r12 is IN.
+++
+++	ldr		r9, [sp, #168]		// LEN
+++	ldr		r14, [sp, #160]		// OUT
+++	cmp		r9, #64
+++	  mov		r0, sp
+++	movle		r1, r9
+++	movgt		r1, #64
+++	// r1 is number of bytes to XOR, in range [1, 64]
+++
+++.if __LINUX_ARM_ARCH__ < 6
+++	orr		r2, r12, r14
+++	tst		r2, #3			// IN or OUT misaligned?
+++	bne		.Lxor_next_byte\@
+++.endif
+++
+++	// XOR a word at a time
+++.rept 16
+++	subs		r1, #4
+++	blt		.Lxor_words_done\@
+++	ldr		r2, [r12], #4
+++	ldr		r3, [r0], #4
+++	eor		r2, r2, r3
+++	str		r2, [r14], #4
+++.endr
+++	b		.Lxor_slowpath_done\@
+++.Lxor_words_done\@:
+++	ands		r1, r1, #3
+++	beq		.Lxor_slowpath_done\@
+++
+++	// XOR a byte at a time
+++.Lxor_next_byte\@:
+++	ldrb		r2, [r12], #1
+++	ldrb		r3, [r0], #1
+++	eor		r2, r2, r3
+++	strb		r2, [r14], #1
+++	subs		r1, #1
+++	bne		.Lxor_next_byte\@
+++
+++.Lxor_slowpath_done\@:
+++	subs		r9, #64
+++	add		sp, #96
+++	bgt		.Lprepare_for_next_block\@
+++
+++.Ldone\@:
+++.endm	// _chacha
+++
+++/*
+++ * void chacha20_arm(u8 *out, const u8 *in, size_t len, const u32 key[8],
+++ *		     const u32 iv[4]);
+++ */
+++ENTRY(chacha20_arm)
+++	cmp		r2, #0			// len == 0?
+++	reteq		lr
+++
+++	push		{r0-r2,r4-r11,lr}
+++
+++	// Push state x0-x15 onto stack.
+++	// Also store an extra copy of x10-x11 just before the state.
+++
+++	ldr		r4, [sp, #48]		// iv
+++	mov		r0, sp
+++	sub		sp, #80
+++
+++	// iv: x12-x15
+++	ldm		r4, {X12,X13,X14,X15}
+++	stmdb		r0!, {X12,X13,X14,X15}
+++
+++	// key: x4-x11
+++	__ldrd		X8_X10, X9_X11, r3, 24
+++	__strd		X8_X10, X9_X11, sp, 8
+++	stmdb		r0!, {X8_X10, X9_X11}
+++	ldm		r3, {X4-X9_X11}
+++	stmdb		r0!, {X4-X9_X11}
+++
+++	// constants: x0-x3
+++	adrl		X3, .Lexpand_32byte_k
+++	ldm		X3, {X0-X3}
+++	__strd		X0, X1, sp, 16
+++	__strd		X2, X3, sp, 24
+++
+++	_chacha		20
+++
+++	add		sp, #76
+++	pop		{r4-r11, pc}
+++ENDPROC(chacha20_arm)
+++
+++/*
+++ * void hchacha20_arm(const u32 state[16], u32 out[8]);
+++ */
+++ENTRY(hchacha20_arm)
+++	push		{r1,r4-r11,lr}
+++
+++	mov		r14, r0
+++	ldmia		r14!, {r0-r11}		// load x0-x11
+++	push		{r10-r11}		// store x10-x11 to stack
+++	ldm		r14, {r10-r12,r14}	// load x12-x15
+++	sub		sp, #8
+++
+++	_chacha_permute	20
+++
+++	// Skip over (unused0-unused1, x10-x11)
+++	add		sp, #16
+++
+++	// Fix up rotations of x12-x15
+++	ror		X12, X12, #drot
+++	ror		X13, X13, #drot
+++	  pop		{r4}			// load 'out'
+++	ror		X14, X14, #drot
+++	ror		X15, X15, #drot
+++
+++	// Store (x0-x3,x12-x15) to 'out'
+++	stm		r4, {X0,X1,X2,X3,X12,X13,X14,X15}
+++
+++	pop		{r4-r11,pc}
+++ENDPROC(hchacha20_arm)
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0008-crypto-arm-chacha-remove-dependency-on-generic-ChaCh.patch b/target/linux/generic/backport-5.4/080-wireguard-0008-crypto-arm-chacha-remove-dependency-on-generic-ChaCh.patch
+new file mode 100644
+index 0000000000..88c9738dbc
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0008-crypto-arm-chacha-remove-dependency-on-generic-ChaCh.patch
+@@ -0,0 +1,691 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:14 +0100
++Subject: [PATCH] crypto: arm/chacha - remove dependency on generic ChaCha
++ driver
++
++commit b36d8c09e710c71f6a9690b6586fea2d1c9e1e27 upstream.
++
++Instead of falling back to the generic ChaCha skcipher driver for
++non-SIMD cases, use a fast scalar implementation for ARM authored
++by Eric Biggers. This removes the module dependency on chacha-generic
++altogether, which also simplifies things when we expose the ChaCha
++library interface from this module.
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/Kconfig              |   4 +-
++ arch/arm/crypto/Makefile             |   3 +-
++ arch/arm/crypto/chacha-glue.c        | 304 +++++++++++++++++++++++++++
++ arch/arm/crypto/chacha-neon-glue.c   | 202 ------------------
++ arch/arm/crypto/chacha-scalar-core.S |  65 +++---
++ arch/arm64/crypto/chacha-neon-glue.c |   2 +-
++ 6 files changed, 340 insertions(+), 240 deletions(-)
++ create mode 100644 arch/arm/crypto/chacha-glue.c
++ delete mode 100644 arch/arm/crypto/chacha-neon-glue.c
++
++--- a/arch/arm/crypto/Kconfig
+++++ b/arch/arm/crypto/Kconfig
++@@ -127,10 +127,8 @@ config CRYPTO_CRC32_ARM_CE
++ 	select CRYPTO_HASH
++ 
++ config CRYPTO_CHACHA20_NEON
++-	tristate "NEON accelerated ChaCha stream cipher algorithms"
++-	depends on KERNEL_MODE_NEON
+++	tristate "NEON and scalar accelerated ChaCha stream cipher algorithms"
++ 	select CRYPTO_BLKCIPHER
++-	select CRYPTO_CHACHA20
++ 
++ config CRYPTO_NHPOLY1305_NEON
++ 	tristate "NEON accelerated NHPoly1305 hash function (for Adiantum)"
++--- a/arch/arm/crypto/Makefile
+++++ b/arch/arm/crypto/Makefile
++@@ -53,7 +53,8 @@ aes-arm-ce-y	:= aes-ce-core.o aes-ce-glu
++ ghash-arm-ce-y	:= ghash-ce-core.o ghash-ce-glue.o
++ crct10dif-arm-ce-y	:= crct10dif-ce-core.o crct10dif-ce-glue.o
++ crc32-arm-ce-y:= crc32-ce-core.o crc32-ce-glue.o
++-chacha-neon-y := chacha-neon-core.o chacha-neon-glue.o
+++chacha-neon-y := chacha-scalar-core.o chacha-glue.o
+++chacha-neon-$(CONFIG_KERNEL_MODE_NEON) += chacha-neon-core.o
++ nhpoly1305-neon-y := nh-neon-core.o nhpoly1305-neon-glue.o
++ 
++ ifdef REGENERATE_ARM_CRYPTO
++--- /dev/null
+++++ b/arch/arm/crypto/chacha-glue.c
++@@ -0,0 +1,304 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * ARM NEON accelerated ChaCha and XChaCha stream ciphers,
+++ * including ChaCha20 (RFC7539)
+++ *
+++ * Copyright (C) 2016-2019 Linaro, Ltd. <ard.biesheuvel@linaro.org>
+++ * Copyright (C) 2015 Martin Willi
+++ */
+++
+++#include <crypto/algapi.h>
+++#include <crypto/internal/chacha.h>
+++#include <crypto/internal/simd.h>
+++#include <crypto/internal/skcipher.h>
+++#include <linux/kernel.h>
+++#include <linux/module.h>
+++
+++#include <asm/cputype.h>
+++#include <asm/hwcap.h>
+++#include <asm/neon.h>
+++#include <asm/simd.h>
+++
+++asmlinkage void chacha_block_xor_neon(const u32 *state, u8 *dst, const u8 *src,
+++				      int nrounds);
+++asmlinkage void chacha_4block_xor_neon(const u32 *state, u8 *dst, const u8 *src,
+++				       int nrounds);
+++asmlinkage void hchacha_block_arm(const u32 *state, u32 *out, int nrounds);
+++asmlinkage void hchacha_block_neon(const u32 *state, u32 *out, int nrounds);
+++
+++asmlinkage void chacha_doarm(u8 *dst, const u8 *src, unsigned int bytes,
+++			     const u32 *state, int nrounds);
+++
+++static inline bool neon_usable(void)
+++{
+++	return crypto_simd_usable();
+++}
+++
+++static void chacha_doneon(u32 *state, u8 *dst, const u8 *src,
+++			  unsigned int bytes, int nrounds)
+++{
+++	u8 buf[CHACHA_BLOCK_SIZE];
+++
+++	while (bytes >= CHACHA_BLOCK_SIZE * 4) {
+++		chacha_4block_xor_neon(state, dst, src, nrounds);
+++		bytes -= CHACHA_BLOCK_SIZE * 4;
+++		src += CHACHA_BLOCK_SIZE * 4;
+++		dst += CHACHA_BLOCK_SIZE * 4;
+++		state[12] += 4;
+++	}
+++	while (bytes >= CHACHA_BLOCK_SIZE) {
+++		chacha_block_xor_neon(state, dst, src, nrounds);
+++		bytes -= CHACHA_BLOCK_SIZE;
+++		src += CHACHA_BLOCK_SIZE;
+++		dst += CHACHA_BLOCK_SIZE;
+++		state[12]++;
+++	}
+++	if (bytes) {
+++		memcpy(buf, src, bytes);
+++		chacha_block_xor_neon(state, buf, buf, nrounds);
+++		memcpy(dst, buf, bytes);
+++	}
+++}
+++
+++static int chacha_stream_xor(struct skcipher_request *req,
+++			     const struct chacha_ctx *ctx, const u8 *iv,
+++			     bool neon)
+++{
+++	struct skcipher_walk walk;
+++	u32 state[16];
+++	int err;
+++
+++	err = skcipher_walk_virt(&walk, req, false);
+++
+++	chacha_init_generic(state, ctx->key, iv);
+++
+++	while (walk.nbytes > 0) {
+++		unsigned int nbytes = walk.nbytes;
+++
+++		if (nbytes < walk.total)
+++			nbytes = round_down(nbytes, walk.stride);
+++
+++		if (!neon) {
+++			chacha_doarm(walk.dst.virt.addr, walk.src.virt.addr,
+++				     nbytes, state, ctx->nrounds);
+++			state[12] += DIV_ROUND_UP(nbytes, CHACHA_BLOCK_SIZE);
+++		} else {
+++			kernel_neon_begin();
+++			chacha_doneon(state, walk.dst.virt.addr,
+++				      walk.src.virt.addr, nbytes, ctx->nrounds);
+++			kernel_neon_end();
+++		}
+++		err = skcipher_walk_done(&walk, walk.nbytes - nbytes);
+++	}
+++
+++	return err;
+++}
+++
+++static int do_chacha(struct skcipher_request *req, bool neon)
+++{
+++	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
+++	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
+++
+++	return chacha_stream_xor(req, ctx, req->iv, neon);
+++}
+++
+++static int chacha_arm(struct skcipher_request *req)
+++{
+++	return do_chacha(req, false);
+++}
+++
+++static int chacha_neon(struct skcipher_request *req)
+++{
+++	return do_chacha(req, neon_usable());
+++}
+++
+++static int do_xchacha(struct skcipher_request *req, bool neon)
+++{
+++	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
+++	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
+++	struct chacha_ctx subctx;
+++	u32 state[16];
+++	u8 real_iv[16];
+++
+++	chacha_init_generic(state, ctx->key, req->iv);
+++
+++	if (!neon) {
+++		hchacha_block_arm(state, subctx.key, ctx->nrounds);
+++	} else {
+++		kernel_neon_begin();
+++		hchacha_block_neon(state, subctx.key, ctx->nrounds);
+++		kernel_neon_end();
+++	}
+++	subctx.nrounds = ctx->nrounds;
+++
+++	memcpy(&real_iv[0], req->iv + 24, 8);
+++	memcpy(&real_iv[8], req->iv + 16, 8);
+++	return chacha_stream_xor(req, &subctx, real_iv, neon);
+++}
+++
+++static int xchacha_arm(struct skcipher_request *req)
+++{
+++	return do_xchacha(req, false);
+++}
+++
+++static int xchacha_neon(struct skcipher_request *req)
+++{
+++	return do_xchacha(req, neon_usable());
+++}
+++
+++static struct skcipher_alg arm_algs[] = {
+++	{
+++		.base.cra_name		= "chacha20",
+++		.base.cra_driver_name	= "chacha20-arm",
+++		.base.cra_priority	= 200,
+++		.base.cra_blocksize	= 1,
+++		.base.cra_ctxsize	= sizeof(struct chacha_ctx),
+++		.base.cra_module	= THIS_MODULE,
+++
+++		.min_keysize		= CHACHA_KEY_SIZE,
+++		.max_keysize		= CHACHA_KEY_SIZE,
+++		.ivsize			= CHACHA_IV_SIZE,
+++		.chunksize		= CHACHA_BLOCK_SIZE,
+++		.setkey			= chacha20_setkey,
+++		.encrypt		= chacha_arm,
+++		.decrypt		= chacha_arm,
+++	}, {
+++		.base.cra_name		= "xchacha20",
+++		.base.cra_driver_name	= "xchacha20-arm",
+++		.base.cra_priority	= 200,
+++		.base.cra_blocksize	= 1,
+++		.base.cra_ctxsize	= sizeof(struct chacha_ctx),
+++		.base.cra_module	= THIS_MODULE,
+++
+++		.min_keysize		= CHACHA_KEY_SIZE,
+++		.max_keysize		= CHACHA_KEY_SIZE,
+++		.ivsize			= XCHACHA_IV_SIZE,
+++		.chunksize		= CHACHA_BLOCK_SIZE,
+++		.setkey			= chacha20_setkey,
+++		.encrypt		= xchacha_arm,
+++		.decrypt		= xchacha_arm,
+++	}, {
+++		.base.cra_name		= "xchacha12",
+++		.base.cra_driver_name	= "xchacha12-arm",
+++		.base.cra_priority	= 200,
+++		.base.cra_blocksize	= 1,
+++		.base.cra_ctxsize	= sizeof(struct chacha_ctx),
+++		.base.cra_module	= THIS_MODULE,
+++
+++		.min_keysize		= CHACHA_KEY_SIZE,
+++		.max_keysize		= CHACHA_KEY_SIZE,
+++		.ivsize			= XCHACHA_IV_SIZE,
+++		.chunksize		= CHACHA_BLOCK_SIZE,
+++		.setkey			= chacha12_setkey,
+++		.encrypt		= xchacha_arm,
+++		.decrypt		= xchacha_arm,
+++	},
+++};
+++
+++static struct skcipher_alg neon_algs[] = {
+++	{
+++		.base.cra_name		= "chacha20",
+++		.base.cra_driver_name	= "chacha20-neon",
+++		.base.cra_priority	= 300,
+++		.base.cra_blocksize	= 1,
+++		.base.cra_ctxsize	= sizeof(struct chacha_ctx),
+++		.base.cra_module	= THIS_MODULE,
+++
+++		.min_keysize		= CHACHA_KEY_SIZE,
+++		.max_keysize		= CHACHA_KEY_SIZE,
+++		.ivsize			= CHACHA_IV_SIZE,
+++		.chunksize		= CHACHA_BLOCK_SIZE,
+++		.walksize		= 4 * CHACHA_BLOCK_SIZE,
+++		.setkey			= chacha20_setkey,
+++		.encrypt		= chacha_neon,
+++		.decrypt		= chacha_neon,
+++	}, {
+++		.base.cra_name		= "xchacha20",
+++		.base.cra_driver_name	= "xchacha20-neon",
+++		.base.cra_priority	= 300,
+++		.base.cra_blocksize	= 1,
+++		.base.cra_ctxsize	= sizeof(struct chacha_ctx),
+++		.base.cra_module	= THIS_MODULE,
+++
+++		.min_keysize		= CHACHA_KEY_SIZE,
+++		.max_keysize		= CHACHA_KEY_SIZE,
+++		.ivsize			= XCHACHA_IV_SIZE,
+++		.chunksize		= CHACHA_BLOCK_SIZE,
+++		.walksize		= 4 * CHACHA_BLOCK_SIZE,
+++		.setkey			= chacha20_setkey,
+++		.encrypt		= xchacha_neon,
+++		.decrypt		= xchacha_neon,
+++	}, {
+++		.base.cra_name		= "xchacha12",
+++		.base.cra_driver_name	= "xchacha12-neon",
+++		.base.cra_priority	= 300,
+++		.base.cra_blocksize	= 1,
+++		.base.cra_ctxsize	= sizeof(struct chacha_ctx),
+++		.base.cra_module	= THIS_MODULE,
+++
+++		.min_keysize		= CHACHA_KEY_SIZE,
+++		.max_keysize		= CHACHA_KEY_SIZE,
+++		.ivsize			= XCHACHA_IV_SIZE,
+++		.chunksize		= CHACHA_BLOCK_SIZE,
+++		.walksize		= 4 * CHACHA_BLOCK_SIZE,
+++		.setkey			= chacha12_setkey,
+++		.encrypt		= xchacha_neon,
+++		.decrypt		= xchacha_neon,
+++	}
+++};
+++
+++static int __init chacha_simd_mod_init(void)
+++{
+++	int err;
+++
+++	err = crypto_register_skciphers(arm_algs, ARRAY_SIZE(arm_algs));
+++	if (err)
+++		return err;
+++
+++	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) && (elf_hwcap & HWCAP_NEON)) {
+++		int i;
+++
+++		switch (read_cpuid_part()) {
+++		case ARM_CPU_PART_CORTEX_A7:
+++		case ARM_CPU_PART_CORTEX_A5:
+++			/*
+++			 * The Cortex-A7 and Cortex-A5 do not perform well with
+++			 * the NEON implementation but do incredibly with the
+++			 * scalar one and use less power.
+++			 */
+++			for (i = 0; i < ARRAY_SIZE(neon_algs); i++)
+++				neon_algs[i].base.cra_priority = 0;
+++			break;
+++		}
+++
+++		err = crypto_register_skciphers(neon_algs, ARRAY_SIZE(neon_algs));
+++		if (err)
+++			crypto_unregister_skciphers(arm_algs, ARRAY_SIZE(arm_algs));
+++	}
+++	return err;
+++}
+++
+++static void __exit chacha_simd_mod_fini(void)
+++{
+++	crypto_unregister_skciphers(arm_algs, ARRAY_SIZE(arm_algs));
+++	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) && (elf_hwcap & HWCAP_NEON))
+++		crypto_unregister_skciphers(neon_algs, ARRAY_SIZE(neon_algs));
+++}
+++
+++module_init(chacha_simd_mod_init);
+++module_exit(chacha_simd_mod_fini);
+++
+++MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (scalar and NEON accelerated)");
+++MODULE_AUTHOR("Ard Biesheuvel <ard.biesheuvel@linaro.org>");
+++MODULE_LICENSE("GPL v2");
+++MODULE_ALIAS_CRYPTO("chacha20");
+++MODULE_ALIAS_CRYPTO("chacha20-arm");
+++MODULE_ALIAS_CRYPTO("xchacha20");
+++MODULE_ALIAS_CRYPTO("xchacha20-arm");
+++MODULE_ALIAS_CRYPTO("xchacha12");
+++MODULE_ALIAS_CRYPTO("xchacha12-arm");
+++#ifdef CONFIG_KERNEL_MODE_NEON
+++MODULE_ALIAS_CRYPTO("chacha20-neon");
+++MODULE_ALIAS_CRYPTO("xchacha20-neon");
+++MODULE_ALIAS_CRYPTO("xchacha12-neon");
+++#endif
++--- a/arch/arm/crypto/chacha-neon-glue.c
+++++ /dev/null
++@@ -1,202 +0,0 @@
++-/*
++- * ARM NEON accelerated ChaCha and XChaCha stream ciphers,
++- * including ChaCha20 (RFC7539)
++- *
++- * Copyright (C) 2016 Linaro, Ltd. <ard.biesheuvel@linaro.org>
++- *
++- * This program is free software; you can redistribute it and/or modify
++- * it under the terms of the GNU General Public License version 2 as
++- * published by the Free Software Foundation.
++- *
++- * Based on:
++- * ChaCha20 256-bit cipher algorithm, RFC7539, SIMD glue code
++- *
++- * Copyright (C) 2015 Martin Willi
++- *
++- * This program is free software; you can redistribute it and/or modify
++- * it under the terms of the GNU General Public License as published by
++- * the Free Software Foundation; either version 2 of the License, or
++- * (at your option) any later version.
++- */
++-
++-#include <crypto/algapi.h>
++-#include <crypto/internal/chacha.h>
++-#include <crypto/internal/simd.h>
++-#include <crypto/internal/skcipher.h>
++-#include <linux/kernel.h>
++-#include <linux/module.h>
++-
++-#include <asm/hwcap.h>
++-#include <asm/neon.h>
++-#include <asm/simd.h>
++-
++-asmlinkage void chacha_block_xor_neon(const u32 *state, u8 *dst, const u8 *src,
++-				      int nrounds);
++-asmlinkage void chacha_4block_xor_neon(const u32 *state, u8 *dst, const u8 *src,
++-				       int nrounds);
++-asmlinkage void hchacha_block_neon(const u32 *state, u32 *out, int nrounds);
++-
++-static void chacha_doneon(u32 *state, u8 *dst, const u8 *src,
++-			  unsigned int bytes, int nrounds)
++-{
++-	u8 buf[CHACHA_BLOCK_SIZE];
++-
++-	while (bytes >= CHACHA_BLOCK_SIZE * 4) {
++-		chacha_4block_xor_neon(state, dst, src, nrounds);
++-		bytes -= CHACHA_BLOCK_SIZE * 4;
++-		src += CHACHA_BLOCK_SIZE * 4;
++-		dst += CHACHA_BLOCK_SIZE * 4;
++-		state[12] += 4;
++-	}
++-	while (bytes >= CHACHA_BLOCK_SIZE) {
++-		chacha_block_xor_neon(state, dst, src, nrounds);
++-		bytes -= CHACHA_BLOCK_SIZE;
++-		src += CHACHA_BLOCK_SIZE;
++-		dst += CHACHA_BLOCK_SIZE;
++-		state[12]++;
++-	}
++-	if (bytes) {
++-		memcpy(buf, src, bytes);
++-		chacha_block_xor_neon(state, buf, buf, nrounds);
++-		memcpy(dst, buf, bytes);
++-	}
++-}
++-
++-static int chacha_neon_stream_xor(struct skcipher_request *req,
++-				  const struct chacha_ctx *ctx, const u8 *iv)
++-{
++-	struct skcipher_walk walk;
++-	u32 state[16];
++-	int err;
++-
++-	err = skcipher_walk_virt(&walk, req, false);
++-
++-	crypto_chacha_init(state, ctx, iv);
++-
++-	while (walk.nbytes > 0) {
++-		unsigned int nbytes = walk.nbytes;
++-
++-		if (nbytes < walk.total)
++-			nbytes = round_down(nbytes, walk.stride);
++-
++-		kernel_neon_begin();
++-		chacha_doneon(state, walk.dst.virt.addr, walk.src.virt.addr,
++-			      nbytes, ctx->nrounds);
++-		kernel_neon_end();
++-		err = skcipher_walk_done(&walk, walk.nbytes - nbytes);
++-	}
++-
++-	return err;
++-}
++-
++-static int chacha_neon(struct skcipher_request *req)
++-{
++-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
++-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
++-
++-	if (req->cryptlen <= CHACHA_BLOCK_SIZE || !crypto_simd_usable())
++-		return crypto_chacha_crypt(req);
++-
++-	return chacha_neon_stream_xor(req, ctx, req->iv);
++-}
++-
++-static int xchacha_neon(struct skcipher_request *req)
++-{
++-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
++-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
++-	struct chacha_ctx subctx;
++-	u32 state[16];
++-	u8 real_iv[16];
++-
++-	if (req->cryptlen <= CHACHA_BLOCK_SIZE || !crypto_simd_usable())
++-		return crypto_xchacha_crypt(req);
++-
++-	crypto_chacha_init(state, ctx, req->iv);
++-
++-	kernel_neon_begin();
++-	hchacha_block_neon(state, subctx.key, ctx->nrounds);
++-	kernel_neon_end();
++-	subctx.nrounds = ctx->nrounds;
++-
++-	memcpy(&real_iv[0], req->iv + 24, 8);
++-	memcpy(&real_iv[8], req->iv + 16, 8);
++-	return chacha_neon_stream_xor(req, &subctx, real_iv);
++-}
++-
++-static struct skcipher_alg algs[] = {
++-	{
++-		.base.cra_name		= "chacha20",
++-		.base.cra_driver_name	= "chacha20-neon",
++-		.base.cra_priority	= 300,
++-		.base.cra_blocksize	= 1,
++-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),
++-		.base.cra_module	= THIS_MODULE,
++-
++-		.min_keysize		= CHACHA_KEY_SIZE,
++-		.max_keysize		= CHACHA_KEY_SIZE,
++-		.ivsize			= CHACHA_IV_SIZE,
++-		.chunksize		= CHACHA_BLOCK_SIZE,
++-		.walksize		= 4 * CHACHA_BLOCK_SIZE,
++-		.setkey			= crypto_chacha20_setkey,
++-		.encrypt		= chacha_neon,
++-		.decrypt		= chacha_neon,
++-	}, {
++-		.base.cra_name		= "xchacha20",
++-		.base.cra_driver_name	= "xchacha20-neon",
++-		.base.cra_priority	= 300,
++-		.base.cra_blocksize	= 1,
++-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),
++-		.base.cra_module	= THIS_MODULE,
++-
++-		.min_keysize		= CHACHA_KEY_SIZE,
++-		.max_keysize		= CHACHA_KEY_SIZE,
++-		.ivsize			= XCHACHA_IV_SIZE,
++-		.chunksize		= CHACHA_BLOCK_SIZE,
++-		.walksize		= 4 * CHACHA_BLOCK_SIZE,
++-		.setkey			= crypto_chacha20_setkey,
++-		.encrypt		= xchacha_neon,
++-		.decrypt		= xchacha_neon,
++-	}, {
++-		.base.cra_name		= "xchacha12",
++-		.base.cra_driver_name	= "xchacha12-neon",
++-		.base.cra_priority	= 300,
++-		.base.cra_blocksize	= 1,
++-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),
++-		.base.cra_module	= THIS_MODULE,
++-
++-		.min_keysize		= CHACHA_KEY_SIZE,
++-		.max_keysize		= CHACHA_KEY_SIZE,
++-		.ivsize			= XCHACHA_IV_SIZE,
++-		.chunksize		= CHACHA_BLOCK_SIZE,
++-		.walksize		= 4 * CHACHA_BLOCK_SIZE,
++-		.setkey			= crypto_chacha12_setkey,
++-		.encrypt		= xchacha_neon,
++-		.decrypt		= xchacha_neon,
++-	}
++-};
++-
++-static int __init chacha_simd_mod_init(void)
++-{
++-	if (!(elf_hwcap & HWCAP_NEON))
++-		return -ENODEV;
++-
++-	return crypto_register_skciphers(algs, ARRAY_SIZE(algs));
++-}
++-
++-static void __exit chacha_simd_mod_fini(void)
++-{
++-	crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));
++-}
++-
++-module_init(chacha_simd_mod_init);
++-module_exit(chacha_simd_mod_fini);
++-
++-MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (NEON accelerated)");
++-MODULE_AUTHOR("Ard Biesheuvel <ard.biesheuvel@linaro.org>");
++-MODULE_LICENSE("GPL v2");
++-MODULE_ALIAS_CRYPTO("chacha20");
++-MODULE_ALIAS_CRYPTO("chacha20-neon");
++-MODULE_ALIAS_CRYPTO("xchacha20");
++-MODULE_ALIAS_CRYPTO("xchacha20-neon");
++-MODULE_ALIAS_CRYPTO("xchacha12");
++-MODULE_ALIAS_CRYPTO("xchacha12-neon");
++--- a/arch/arm/crypto/chacha-scalar-core.S
+++++ b/arch/arm/crypto/chacha-scalar-core.S
++@@ -41,14 +41,6 @@
++ 	X14	.req	r12
++ 	X15	.req	r14
++ 
++-.Lexpand_32byte_k:
++-	// "expand 32-byte k"
++-	.word	0x61707865, 0x3320646e, 0x79622d32, 0x6b206574
++-
++-#ifdef __thumb2__
++-#  define adrl adr
++-#endif
++-
++ .macro __rev		out, in,  t0, t1, t2
++ .if __LINUX_ARM_ARCH__ >= 6
++ 	rev		\out, \in
++@@ -391,61 +383,65 @@
++ .endm	// _chacha
++ 
++ /*
++- * void chacha20_arm(u8 *out, const u8 *in, size_t len, const u32 key[8],
++- *		     const u32 iv[4]);
+++ * void chacha_doarm(u8 *dst, const u8 *src, unsigned int bytes,
+++ *		     const u32 *state, int nrounds);
++  */
++-ENTRY(chacha20_arm)
+++ENTRY(chacha_doarm)
++ 	cmp		r2, #0			// len == 0?
++ 	reteq		lr
++ 
+++	ldr		ip, [sp]
+++	cmp		ip, #12
+++
++ 	push		{r0-r2,r4-r11,lr}
++ 
++ 	// Push state x0-x15 onto stack.
++ 	// Also store an extra copy of x10-x11 just before the state.
++ 
++-	ldr		r4, [sp, #48]		// iv
++-	mov		r0, sp
++-	sub		sp, #80
++-
++-	// iv: x12-x15
++-	ldm		r4, {X12,X13,X14,X15}
++-	stmdb		r0!, {X12,X13,X14,X15}
+++	add		X12, r3, #48
+++	ldm		X12, {X12,X13,X14,X15}
+++	push		{X12,X13,X14,X15}
+++	sub		sp, sp, #64
++ 
++-	// key: x4-x11
++-	__ldrd		X8_X10, X9_X11, r3, 24
+++	__ldrd		X8_X10, X9_X11, r3, 40
++ 	__strd		X8_X10, X9_X11, sp, 8
++-	stmdb		r0!, {X8_X10, X9_X11}
++-	ldm		r3, {X4-X9_X11}
++-	stmdb		r0!, {X4-X9_X11}
++-
++-	// constants: x0-x3
++-	adrl		X3, .Lexpand_32byte_k
++-	ldm		X3, {X0-X3}
+++	__strd		X8_X10, X9_X11, sp, 56
+++	ldm		r3, {X0-X9_X11}
++ 	__strd		X0, X1, sp, 16
++ 	__strd		X2, X3, sp, 24
+++	__strd		X4, X5, sp, 32
+++	__strd		X6, X7, sp, 40
+++	__strd		X8_X10, X9_X11, sp, 48
++ 
+++	beq		1f
++ 	_chacha		20
++ 
++-	add		sp, #76
+++0:	add		sp, #76
++ 	pop		{r4-r11, pc}
++-ENDPROC(chacha20_arm)
+++
+++1:	_chacha		12
+++	b		0b
+++ENDPROC(chacha_doarm)
++ 
++ /*
++- * void hchacha20_arm(const u32 state[16], u32 out[8]);
+++ * void hchacha_block_arm(const u32 state[16], u32 out[8], int nrounds);
++  */
++-ENTRY(hchacha20_arm)
+++ENTRY(hchacha_block_arm)
++ 	push		{r1,r4-r11,lr}
++ 
+++	cmp		r2, #12			// ChaCha12 ?
+++
++ 	mov		r14, r0
++ 	ldmia		r14!, {r0-r11}		// load x0-x11
++ 	push		{r10-r11}		// store x10-x11 to stack
++ 	ldm		r14, {r10-r12,r14}	// load x12-x15
++ 	sub		sp, #8
++ 
+++	beq		1f
++ 	_chacha_permute	20
++ 
++ 	// Skip over (unused0-unused1, x10-x11)
++-	add		sp, #16
+++0:	add		sp, #16
++ 
++ 	// Fix up rotations of x12-x15
++ 	ror		X12, X12, #drot
++@@ -458,4 +454,7 @@ ENTRY(hchacha20_arm)
++ 	stm		r4, {X0,X1,X2,X3,X12,X13,X14,X15}
++ 
++ 	pop		{r4-r11,pc}
++-ENDPROC(hchacha20_arm)
+++
+++1:	_chacha_permute	12
+++	b		0b
+++ENDPROC(hchacha_block_arm)
++--- a/arch/arm64/crypto/chacha-neon-glue.c
+++++ b/arch/arm64/crypto/chacha-neon-glue.c
++@@ -1,5 +1,5 @@
++ /*
++- * ARM NEON accelerated ChaCha and XChaCha stream ciphers,
+++ * ARM NEON and scalar accelerated ChaCha and XChaCha stream ciphers,
++  * including ChaCha20 (RFC7539)
++  *
++  * Copyright (C) 2016 - 2017 Linaro, Ltd. <ard.biesheuvel@linaro.org>
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0009-crypto-arm-chacha-expose-ARM-ChaCha-routine-as-libra.patch b/target/linux/generic/backport-5.4/080-wireguard-0009-crypto-arm-chacha-expose-ARM-ChaCha-routine-as-libra.patch
+new file mode 100644
+index 0000000000..4006dc63b2
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0009-crypto-arm-chacha-expose-ARM-ChaCha-routine-as-libra.patch
+@@ -0,0 +1,108 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:15 +0100
++Subject: [PATCH] crypto: arm/chacha - expose ARM ChaCha routine as library
++ function
++
++commit a44a3430d71bad4ee56788a59fff099b291ea54c upstream.
++
++Expose the accelerated NEON ChaCha routine directly as a symbol
++export so that users of the ChaCha library API can use it directly.
++
++Given that calls into the library API will always go through the
++routines in this module if it is enabled, switch to static keys
++to select the optimal implementation available (which may be none
++at all, in which case we defer to the generic implementation for
++all invocations).
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/Kconfig       |  1 +
++ arch/arm/crypto/chacha-glue.c | 41 ++++++++++++++++++++++++++++++++++-
++ 2 files changed, 41 insertions(+), 1 deletion(-)
++
++--- a/arch/arm/crypto/Kconfig
+++++ b/arch/arm/crypto/Kconfig
++@@ -129,6 +129,7 @@ config CRYPTO_CRC32_ARM_CE
++ config CRYPTO_CHACHA20_NEON
++ 	tristate "NEON and scalar accelerated ChaCha stream cipher algorithms"
++ 	select CRYPTO_BLKCIPHER
+++	select CRYPTO_ARCH_HAVE_LIB_CHACHA
++ 
++ config CRYPTO_NHPOLY1305_NEON
++ 	tristate "NEON accelerated NHPoly1305 hash function (for Adiantum)"
++--- a/arch/arm/crypto/chacha-glue.c
+++++ b/arch/arm/crypto/chacha-glue.c
++@@ -11,6 +11,7 @@
++ #include <crypto/internal/chacha.h>
++ #include <crypto/internal/simd.h>
++ #include <crypto/internal/skcipher.h>
+++#include <linux/jump_label.h>
++ #include <linux/kernel.h>
++ #include <linux/module.h>
++ 
++@@ -29,9 +30,11 @@ asmlinkage void hchacha_block_neon(const
++ asmlinkage void chacha_doarm(u8 *dst, const u8 *src, unsigned int bytes,
++ 			     const u32 *state, int nrounds);
++ 
+++static __ro_after_init DEFINE_STATIC_KEY_FALSE(use_neon);
+++
++ static inline bool neon_usable(void)
++ {
++-	return crypto_simd_usable();
+++	return static_branch_likely(&use_neon) && crypto_simd_usable();
++ }
++ 
++ static void chacha_doneon(u32 *state, u8 *dst, const u8 *src,
++@@ -60,6 +63,40 @@ static void chacha_doneon(u32 *state, u8
++ 	}
++ }
++ 
+++void hchacha_block_arch(const u32 *state, u32 *stream, int nrounds)
+++{
+++	if (!IS_ENABLED(CONFIG_KERNEL_MODE_NEON) || !neon_usable()) {
+++		hchacha_block_arm(state, stream, nrounds);
+++	} else {
+++		kernel_neon_begin();
+++		hchacha_block_neon(state, stream, nrounds);
+++		kernel_neon_end();
+++	}
+++}
+++EXPORT_SYMBOL(hchacha_block_arch);
+++
+++void chacha_init_arch(u32 *state, const u32 *key, const u8 *iv)
+++{
+++	chacha_init_generic(state, key, iv);
+++}
+++EXPORT_SYMBOL(chacha_init_arch);
+++
+++void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src, unsigned int bytes,
+++		       int nrounds)
+++{
+++	if (!IS_ENABLED(CONFIG_KERNEL_MODE_NEON) || !neon_usable() ||
+++	    bytes <= CHACHA_BLOCK_SIZE) {
+++		chacha_doarm(dst, src, bytes, state, nrounds);
+++		state[12] += DIV_ROUND_UP(bytes, CHACHA_BLOCK_SIZE);
+++		return;
+++	}
+++
+++	kernel_neon_begin();
+++	chacha_doneon(state, dst, src, bytes, nrounds);
+++	kernel_neon_end();
+++}
+++EXPORT_SYMBOL(chacha_crypt_arch);
+++
++ static int chacha_stream_xor(struct skcipher_request *req,
++ 			     const struct chacha_ctx *ctx, const u8 *iv,
++ 			     bool neon)
++@@ -269,6 +306,8 @@ static int __init chacha_simd_mod_init(v
++ 			for (i = 0; i < ARRAY_SIZE(neon_algs); i++)
++ 				neon_algs[i].base.cra_priority = 0;
++ 			break;
+++		default:
+++			static_branch_enable(&use_neon);
++ 		}
++ 
++ 		err = crypto_register_skciphers(neon_algs, ARRAY_SIZE(neon_algs));
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0010-crypto-mips-chacha-import-32r2-ChaCha-code-from-Zinc.patch b/target/linux/generic/backport-5.4/080-wireguard-0010-crypto-mips-chacha-import-32r2-ChaCha-code-from-Zinc.patch
+new file mode 100644
+index 0000000000..0a2b4c4523
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0010-crypto-mips-chacha-import-32r2-ChaCha-code-from-Zinc.patch
+@@ -0,0 +1,451 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 8 Nov 2019 13:22:16 +0100
++Subject: [PATCH] crypto: mips/chacha - import 32r2 ChaCha code from Zinc
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++commit 49aa7c00eddf8d8f462b0256bd82e81762d7b0c6 upstream.
++
++This imports the accelerated MIPS 32r2 ChaCha20 implementation from the
++Zinc patch set.
++
++Co-developed-by: René van Dorst <opensource@vdorst.com>
++Signed-off-by: René van Dorst <opensource@vdorst.com>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/mips/crypto/chacha-core.S | 424 +++++++++++++++++++++++++++++++++
++ 1 file changed, 424 insertions(+)
++ create mode 100644 arch/mips/crypto/chacha-core.S
++
++--- /dev/null
+++++ b/arch/mips/crypto/chacha-core.S
++@@ -0,0 +1,424 @@
+++/* SPDX-License-Identifier: GPL-2.0 OR MIT */
+++/*
+++ * Copyright (C) 2016-2018 René van Dorst <opensource@vdorst.com>. All Rights Reserved.
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#define MASK_U32		0x3c
+++#define CHACHA20_BLOCK_SIZE	64
+++#define STACK_SIZE		32
+++
+++#define X0	$t0
+++#define X1	$t1
+++#define X2	$t2
+++#define X3	$t3
+++#define X4	$t4
+++#define X5	$t5
+++#define X6	$t6
+++#define X7	$t7
+++#define X8	$t8
+++#define X9	$t9
+++#define X10	$v1
+++#define X11	$s6
+++#define X12	$s5
+++#define X13	$s4
+++#define X14	$s3
+++#define X15	$s2
+++/* Use regs which are overwritten on exit for Tx so we don't leak clear data. */
+++#define T0	$s1
+++#define T1	$s0
+++#define T(n)	T ## n
+++#define X(n)	X ## n
+++
+++/* Input arguments */
+++#define STATE		$a0
+++#define OUT		$a1
+++#define IN		$a2
+++#define BYTES		$a3
+++
+++/* Output argument */
+++/* NONCE[0] is kept in a register and not in memory.
+++ * We don't want to touch original value in memory.
+++ * Must be incremented every loop iteration.
+++ */
+++#define NONCE_0		$v0
+++
+++/* SAVED_X and SAVED_CA are set in the jump table.
+++ * Use regs which are overwritten on exit else we don't leak clear data.
+++ * They are used to handling the last bytes which are not multiple of 4.
+++ */
+++#define SAVED_X		X15
+++#define SAVED_CA	$s7
+++
+++#define IS_UNALIGNED	$s7
+++
+++#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+++#define MSB 0
+++#define LSB 3
+++#define ROTx rotl
+++#define ROTR(n) rotr n, 24
+++#define	CPU_TO_LE32(n) \
+++	wsbh	n; \
+++	rotr	n, 16;
+++#else
+++#define MSB 3
+++#define LSB 0
+++#define ROTx rotr
+++#define CPU_TO_LE32(n)
+++#define ROTR(n)
+++#endif
+++
+++#define FOR_EACH_WORD(x) \
+++	x( 0); \
+++	x( 1); \
+++	x( 2); \
+++	x( 3); \
+++	x( 4); \
+++	x( 5); \
+++	x( 6); \
+++	x( 7); \
+++	x( 8); \
+++	x( 9); \
+++	x(10); \
+++	x(11); \
+++	x(12); \
+++	x(13); \
+++	x(14); \
+++	x(15);
+++
+++#define FOR_EACH_WORD_REV(x) \
+++	x(15); \
+++	x(14); \
+++	x(13); \
+++	x(12); \
+++	x(11); \
+++	x(10); \
+++	x( 9); \
+++	x( 8); \
+++	x( 7); \
+++	x( 6); \
+++	x( 5); \
+++	x( 4); \
+++	x( 3); \
+++	x( 2); \
+++	x( 1); \
+++	x( 0);
+++
+++#define PLUS_ONE_0	 1
+++#define PLUS_ONE_1	 2
+++#define PLUS_ONE_2	 3
+++#define PLUS_ONE_3	 4
+++#define PLUS_ONE_4	 5
+++#define PLUS_ONE_5	 6
+++#define PLUS_ONE_6	 7
+++#define PLUS_ONE_7	 8
+++#define PLUS_ONE_8	 9
+++#define PLUS_ONE_9	10
+++#define PLUS_ONE_10	11
+++#define PLUS_ONE_11	12
+++#define PLUS_ONE_12	13
+++#define PLUS_ONE_13	14
+++#define PLUS_ONE_14	15
+++#define PLUS_ONE_15	16
+++#define PLUS_ONE(x)	PLUS_ONE_ ## x
+++#define _CONCAT3(a,b,c)	a ## b ## c
+++#define CONCAT3(a,b,c)	_CONCAT3(a,b,c)
+++
+++#define STORE_UNALIGNED(x) \
+++CONCAT3(.Lchacha20_mips_xor_unaligned_, PLUS_ONE(x), _b: ;) \
+++	.if (x != 12); \
+++		lw	T0, (x*4)(STATE); \
+++	.endif; \
+++	lwl	T1, (x*4)+MSB ## (IN); \
+++	lwr	T1, (x*4)+LSB ## (IN); \
+++	.if (x == 12); \
+++		addu	X ## x, NONCE_0; \
+++	.else; \
+++		addu	X ## x, T0; \
+++	.endif; \
+++	CPU_TO_LE32(X ## x); \
+++	xor	X ## x, T1; \
+++	swl	X ## x, (x*4)+MSB ## (OUT); \
+++	swr	X ## x, (x*4)+LSB ## (OUT);
+++
+++#define STORE_ALIGNED(x) \
+++CONCAT3(.Lchacha20_mips_xor_aligned_, PLUS_ONE(x), _b: ;) \
+++	.if (x != 12); \
+++		lw	T0, (x*4)(STATE); \
+++	.endif; \
+++	lw	T1, (x*4) ## (IN); \
+++	.if (x == 12); \
+++		addu	X ## x, NONCE_0; \
+++	.else; \
+++		addu	X ## x, T0; \
+++	.endif; \
+++	CPU_TO_LE32(X ## x); \
+++	xor	X ## x, T1; \
+++	sw	X ## x, (x*4) ## (OUT);
+++
+++/* Jump table macro.
+++ * Used for setup and handling the last bytes, which are not multiple of 4.
+++ * X15 is free to store Xn
+++ * Every jumptable entry must be equal in size.
+++ */
+++#define JMPTBL_ALIGNED(x) \
+++.Lchacha20_mips_jmptbl_aligned_ ## x: ; \
+++	.set	noreorder; \
+++	b	.Lchacha20_mips_xor_aligned_ ## x ## _b; \
+++	.if (x == 12); \
+++		addu	SAVED_X, X ## x, NONCE_0; \
+++	.else; \
+++		addu	SAVED_X, X ## x, SAVED_CA; \
+++	.endif; \
+++	.set	reorder
+++
+++#define JMPTBL_UNALIGNED(x) \
+++.Lchacha20_mips_jmptbl_unaligned_ ## x: ; \
+++	.set	noreorder; \
+++	b	.Lchacha20_mips_xor_unaligned_ ## x ## _b; \
+++	.if (x == 12); \
+++		addu	SAVED_X, X ## x, NONCE_0; \
+++	.else; \
+++		addu	SAVED_X, X ## x, SAVED_CA; \
+++	.endif; \
+++	.set	reorder
+++
+++#define AXR(A, B, C, D,  K, L, M, N,  V, W, Y, Z,  S) \
+++	addu	X(A), X(K); \
+++	addu	X(B), X(L); \
+++	addu	X(C), X(M); \
+++	addu	X(D), X(N); \
+++	xor	X(V), X(A); \
+++	xor	X(W), X(B); \
+++	xor	X(Y), X(C); \
+++	xor	X(Z), X(D); \
+++	rotl	X(V), S;    \
+++	rotl	X(W), S;    \
+++	rotl	X(Y), S;    \
+++	rotl	X(Z), S;
+++
+++.text
+++.set	reorder
+++.set	noat
+++.globl	chacha20_mips
+++.ent	chacha20_mips
+++chacha20_mips:
+++	.frame	$sp, STACK_SIZE, $ra
+++
+++	addiu	$sp, -STACK_SIZE
+++
+++	/* Return bytes = 0. */
+++	beqz	BYTES, .Lchacha20_mips_end
+++
+++	lw	NONCE_0, 48(STATE)
+++
+++	/* Save s0-s7 */
+++	sw	$s0,  0($sp)
+++	sw	$s1,  4($sp)
+++	sw	$s2,  8($sp)
+++	sw	$s3, 12($sp)
+++	sw	$s4, 16($sp)
+++	sw	$s5, 20($sp)
+++	sw	$s6, 24($sp)
+++	sw	$s7, 28($sp)
+++
+++	/* Test IN or OUT is unaligned.
+++	 * IS_UNALIGNED = ( IN | OUT ) & 0x00000003
+++	 */
+++	or	IS_UNALIGNED, IN, OUT
+++	andi	IS_UNALIGNED, 0x3
+++
+++	/* Set number of rounds */
+++	li	$at, 20
+++
+++	b	.Lchacha20_rounds_start
+++
+++.align 4
+++.Loop_chacha20_rounds:
+++	addiu	IN,  CHACHA20_BLOCK_SIZE
+++	addiu	OUT, CHACHA20_BLOCK_SIZE
+++	addiu	NONCE_0, 1
+++
+++.Lchacha20_rounds_start:
+++	lw	X0,  0(STATE)
+++	lw	X1,  4(STATE)
+++	lw	X2,  8(STATE)
+++	lw	X3,  12(STATE)
+++
+++	lw	X4,  16(STATE)
+++	lw	X5,  20(STATE)
+++	lw	X6,  24(STATE)
+++	lw	X7,  28(STATE)
+++	lw	X8,  32(STATE)
+++	lw	X9,  36(STATE)
+++	lw	X10, 40(STATE)
+++	lw	X11, 44(STATE)
+++
+++	move	X12, NONCE_0
+++	lw	X13, 52(STATE)
+++	lw	X14, 56(STATE)
+++	lw	X15, 60(STATE)
+++
+++.Loop_chacha20_xor_rounds:
+++	addiu	$at, -2
+++	AXR( 0, 1, 2, 3,  4, 5, 6, 7, 12,13,14,15, 16);
+++	AXR( 8, 9,10,11, 12,13,14,15,  4, 5, 6, 7, 12);
+++	AXR( 0, 1, 2, 3,  4, 5, 6, 7, 12,13,14,15,  8);
+++	AXR( 8, 9,10,11, 12,13,14,15,  4, 5, 6, 7,  7);
+++	AXR( 0, 1, 2, 3,  5, 6, 7, 4, 15,12,13,14, 16);
+++	AXR(10,11, 8, 9, 15,12,13,14,  5, 6, 7, 4, 12);
+++	AXR( 0, 1, 2, 3,  5, 6, 7, 4, 15,12,13,14,  8);
+++	AXR(10,11, 8, 9, 15,12,13,14,  5, 6, 7, 4,  7);
+++	bnez	$at, .Loop_chacha20_xor_rounds
+++
+++	addiu	BYTES, -(CHACHA20_BLOCK_SIZE)
+++
+++	/* Is data src/dst unaligned? Jump */
+++	bnez	IS_UNALIGNED, .Loop_chacha20_unaligned
+++
+++	/* Set number rounds here to fill delayslot. */
+++	li	$at, 20
+++
+++	/* BYTES < 0, it has no full block. */
+++	bltz	BYTES, .Lchacha20_mips_no_full_block_aligned
+++
+++	FOR_EACH_WORD_REV(STORE_ALIGNED)
+++
+++	/* BYTES > 0? Loop again. */
+++	bgtz	BYTES, .Loop_chacha20_rounds
+++
+++	/* Place this here to fill delay slot */
+++	addiu	NONCE_0, 1
+++
+++	/* BYTES < 0? Handle last bytes */
+++	bltz	BYTES, .Lchacha20_mips_xor_bytes
+++
+++.Lchacha20_mips_xor_done:
+++	/* Restore used registers */
+++	lw	$s0,  0($sp)
+++	lw	$s1,  4($sp)
+++	lw	$s2,  8($sp)
+++	lw	$s3, 12($sp)
+++	lw	$s4, 16($sp)
+++	lw	$s5, 20($sp)
+++	lw	$s6, 24($sp)
+++	lw	$s7, 28($sp)
+++
+++	/* Write NONCE_0 back to right location in state */
+++	sw	NONCE_0, 48(STATE)
+++
+++.Lchacha20_mips_end:
+++	addiu	$sp, STACK_SIZE
+++	jr	$ra
+++
+++.Lchacha20_mips_no_full_block_aligned:
+++	/* Restore the offset on BYTES */
+++	addiu	BYTES, CHACHA20_BLOCK_SIZE
+++
+++	/* Get number of full WORDS */
+++	andi	$at, BYTES, MASK_U32
+++
+++	/* Load upper half of jump table addr */
+++	lui	T0, %hi(.Lchacha20_mips_jmptbl_aligned_0)
+++
+++	/* Calculate lower half jump table offset */
+++	ins	T0, $at, 1, 6
+++
+++	/* Add offset to STATE */
+++	addu	T1, STATE, $at
+++
+++	/* Add lower half jump table addr */
+++	addiu	T0, %lo(.Lchacha20_mips_jmptbl_aligned_0)
+++
+++	/* Read value from STATE */
+++	lw	SAVED_CA, 0(T1)
+++
+++	/* Store remaining bytecounter as negative value */
+++	subu	BYTES, $at, BYTES
+++
+++	jr	T0
+++
+++	/* Jump table */
+++	FOR_EACH_WORD(JMPTBL_ALIGNED)
+++
+++
+++.Loop_chacha20_unaligned:
+++	/* Set number rounds here to fill delayslot. */
+++	li	$at, 20
+++
+++	/* BYTES > 0, it has no full block. */
+++	bltz	BYTES, .Lchacha20_mips_no_full_block_unaligned
+++
+++	FOR_EACH_WORD_REV(STORE_UNALIGNED)
+++
+++	/* BYTES > 0? Loop again. */
+++	bgtz	BYTES, .Loop_chacha20_rounds
+++
+++	/* Write NONCE_0 back to right location in state */
+++	sw	NONCE_0, 48(STATE)
+++
+++	.set noreorder
+++	/* Fall through to byte handling */
+++	bgez	BYTES, .Lchacha20_mips_xor_done
+++.Lchacha20_mips_xor_unaligned_0_b:
+++.Lchacha20_mips_xor_aligned_0_b:
+++	/* Place this here to fill delay slot */
+++	addiu	NONCE_0, 1
+++	.set reorder
+++
+++.Lchacha20_mips_xor_bytes:
+++	addu	IN, $at
+++	addu	OUT, $at
+++	/* First byte */
+++	lbu	T1, 0(IN)
+++	addiu	$at, BYTES, 1
+++	CPU_TO_LE32(SAVED_X)
+++	ROTR(SAVED_X)
+++	xor	T1, SAVED_X
+++	sb	T1, 0(OUT)
+++	beqz	$at, .Lchacha20_mips_xor_done
+++	/* Second byte */
+++	lbu	T1, 1(IN)
+++	addiu	$at, BYTES, 2
+++	ROTx	SAVED_X, 8
+++	xor	T1, SAVED_X
+++	sb	T1, 1(OUT)
+++	beqz	$at, .Lchacha20_mips_xor_done
+++	/* Third byte */
+++	lbu	T1, 2(IN)
+++	ROTx	SAVED_X, 8
+++	xor	T1, SAVED_X
+++	sb	T1, 2(OUT)
+++	b	.Lchacha20_mips_xor_done
+++
+++.Lchacha20_mips_no_full_block_unaligned:
+++	/* Restore the offset on BYTES */
+++	addiu	BYTES, CHACHA20_BLOCK_SIZE
+++
+++	/* Get number of full WORDS */
+++	andi	$at, BYTES, MASK_U32
+++
+++	/* Load upper half of jump table addr */
+++	lui	T0, %hi(.Lchacha20_mips_jmptbl_unaligned_0)
+++
+++	/* Calculate lower half jump table offset */
+++	ins	T0, $at, 1, 6
+++
+++	/* Add offset to STATE */
+++	addu	T1, STATE, $at
+++
+++	/* Add lower half jump table addr */
+++	addiu	T0, %lo(.Lchacha20_mips_jmptbl_unaligned_0)
+++
+++	/* Read value from STATE */
+++	lw	SAVED_CA, 0(T1)
+++
+++	/* Store remaining bytecounter as negative value */
+++	subu	BYTES, $at, BYTES
+++
+++	jr	T0
+++
+++	/* Jump table */
+++	FOR_EACH_WORD(JMPTBL_UNALIGNED)
+++.end chacha20_mips
+++.set at
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0011-crypto-mips-chacha-wire-up-accelerated-32r2-code-fro.patch b/target/linux/generic/backport-5.4/080-wireguard-0011-crypto-mips-chacha-wire-up-accelerated-32r2-code-fro.patch
+new file mode 100644
+index 0000000000..0d24ce29e5
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0011-crypto-mips-chacha-wire-up-accelerated-32r2-code-fro.patch
+@@ -0,0 +1,559 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:17 +0100
++Subject: [PATCH] crypto: mips/chacha - wire up accelerated 32r2 code from Zinc
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++commit 3a2f58f3ba4f6f44e33d1a48240d5eadb882cb59 upstream.
++
++This integrates the accelerated MIPS 32r2 implementation of ChaCha
++into both the API and library interfaces of the kernel crypto stack.
++
++The significance of this is that, in addition to becoming available
++as an accelerated library implementation, it can also be used by
++existing crypto API code such as Adiantum (for block encryption on
++ultra low performance cores) or IPsec using chacha20poly1305. These
++are use cases that have already opted into using the abstract crypto
++API. In order to support Adiantum, the core assembler routine has
++been adapted to take the round count as a function argument rather
++than hardcoding it to 20.
++
++Co-developed-by: René van Dorst <opensource@vdorst.com>
++Signed-off-by: René van Dorst <opensource@vdorst.com>
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/mips/Makefile             |   2 +-
++ arch/mips/crypto/Makefile      |   4 +
++ arch/mips/crypto/chacha-core.S | 159 ++++++++++++++++++++++++---------
++ arch/mips/crypto/chacha-glue.c | 150 +++++++++++++++++++++++++++++++
++ crypto/Kconfig                 |   6 ++
++ 5 files changed, 277 insertions(+), 44 deletions(-)
++ create mode 100644 arch/mips/crypto/chacha-glue.c
++
++--- a/arch/mips/Makefile
+++++ b/arch/mips/Makefile
++@@ -334,7 +334,7 @@ libs-$(CONFIG_MIPS_FP_SUPPORT) += arch/m
++ # See arch/mips/Kbuild for content of core part of the kernel
++ core-y += arch/mips/
++ 
++-drivers-$(CONFIG_MIPS_CRC_SUPPORT) += arch/mips/crypto/
+++drivers-y			+= arch/mips/crypto/
++ drivers-$(CONFIG_OPROFILE)	+= arch/mips/oprofile/
++ 
++ # suspend and hibernation support
++--- a/arch/mips/crypto/Makefile
+++++ b/arch/mips/crypto/Makefile
++@@ -4,3 +4,7 @@
++ #
++ 
++ obj-$(CONFIG_CRYPTO_CRC32_MIPS) += crc32-mips.o
+++
+++obj-$(CONFIG_CRYPTO_CHACHA_MIPS) += chacha-mips.o
+++chacha-mips-y := chacha-core.o chacha-glue.o
+++AFLAGS_chacha-core.o += -O2 # needed to fill branch delay slots
++--- a/arch/mips/crypto/chacha-core.S
+++++ b/arch/mips/crypto/chacha-core.S
++@@ -125,7 +125,7 @@
++ #define CONCAT3(a,b,c)	_CONCAT3(a,b,c)
++ 
++ #define STORE_UNALIGNED(x) \
++-CONCAT3(.Lchacha20_mips_xor_unaligned_, PLUS_ONE(x), _b: ;) \
+++CONCAT3(.Lchacha_mips_xor_unaligned_, PLUS_ONE(x), _b: ;) \
++ 	.if (x != 12); \
++ 		lw	T0, (x*4)(STATE); \
++ 	.endif; \
++@@ -142,7 +142,7 @@ CONCAT3(.Lchacha20_mips_xor_unaligned_,
++ 	swr	X ## x, (x*4)+LSB ## (OUT);
++ 
++ #define STORE_ALIGNED(x) \
++-CONCAT3(.Lchacha20_mips_xor_aligned_, PLUS_ONE(x), _b: ;) \
+++CONCAT3(.Lchacha_mips_xor_aligned_, PLUS_ONE(x), _b: ;) \
++ 	.if (x != 12); \
++ 		lw	T0, (x*4)(STATE); \
++ 	.endif; \
++@@ -162,9 +162,9 @@ CONCAT3(.Lchacha20_mips_xor_aligned_, PL
++  * Every jumptable entry must be equal in size.
++  */
++ #define JMPTBL_ALIGNED(x) \
++-.Lchacha20_mips_jmptbl_aligned_ ## x: ; \
+++.Lchacha_mips_jmptbl_aligned_ ## x: ; \
++ 	.set	noreorder; \
++-	b	.Lchacha20_mips_xor_aligned_ ## x ## _b; \
+++	b	.Lchacha_mips_xor_aligned_ ## x ## _b; \
++ 	.if (x == 12); \
++ 		addu	SAVED_X, X ## x, NONCE_0; \
++ 	.else; \
++@@ -173,9 +173,9 @@ CONCAT3(.Lchacha20_mips_xor_aligned_, PL
++ 	.set	reorder
++ 
++ #define JMPTBL_UNALIGNED(x) \
++-.Lchacha20_mips_jmptbl_unaligned_ ## x: ; \
+++.Lchacha_mips_jmptbl_unaligned_ ## x: ; \
++ 	.set	noreorder; \
++-	b	.Lchacha20_mips_xor_unaligned_ ## x ## _b; \
+++	b	.Lchacha_mips_xor_unaligned_ ## x ## _b; \
++ 	.if (x == 12); \
++ 		addu	SAVED_X, X ## x, NONCE_0; \
++ 	.else; \
++@@ -200,15 +200,18 @@ CONCAT3(.Lchacha20_mips_xor_aligned_, PL
++ .text
++ .set	reorder
++ .set	noat
++-.globl	chacha20_mips
++-.ent	chacha20_mips
++-chacha20_mips:
+++.globl	chacha_crypt_arch
+++.ent	chacha_crypt_arch
+++chacha_crypt_arch:
++ 	.frame	$sp, STACK_SIZE, $ra
++ 
+++	/* Load number of rounds */
+++	lw	$at, 16($sp)
+++
++ 	addiu	$sp, -STACK_SIZE
++ 
++ 	/* Return bytes = 0. */
++-	beqz	BYTES, .Lchacha20_mips_end
+++	beqz	BYTES, .Lchacha_mips_end
++ 
++ 	lw	NONCE_0, 48(STATE)
++ 
++@@ -228,18 +231,15 @@ chacha20_mips:
++ 	or	IS_UNALIGNED, IN, OUT
++ 	andi	IS_UNALIGNED, 0x3
++ 
++-	/* Set number of rounds */
++-	li	$at, 20
++-
++-	b	.Lchacha20_rounds_start
+++	b	.Lchacha_rounds_start
++ 
++ .align 4
++-.Loop_chacha20_rounds:
+++.Loop_chacha_rounds:
++ 	addiu	IN,  CHACHA20_BLOCK_SIZE
++ 	addiu	OUT, CHACHA20_BLOCK_SIZE
++ 	addiu	NONCE_0, 1
++ 
++-.Lchacha20_rounds_start:
+++.Lchacha_rounds_start:
++ 	lw	X0,  0(STATE)
++ 	lw	X1,  4(STATE)
++ 	lw	X2,  8(STATE)
++@@ -259,7 +259,7 @@ chacha20_mips:
++ 	lw	X14, 56(STATE)
++ 	lw	X15, 60(STATE)
++ 
++-.Loop_chacha20_xor_rounds:
+++.Loop_chacha_xor_rounds:
++ 	addiu	$at, -2
++ 	AXR( 0, 1, 2, 3,  4, 5, 6, 7, 12,13,14,15, 16);
++ 	AXR( 8, 9,10,11, 12,13,14,15,  4, 5, 6, 7, 12);
++@@ -269,31 +269,31 @@ chacha20_mips:
++ 	AXR(10,11, 8, 9, 15,12,13,14,  5, 6, 7, 4, 12);
++ 	AXR( 0, 1, 2, 3,  5, 6, 7, 4, 15,12,13,14,  8);
++ 	AXR(10,11, 8, 9, 15,12,13,14,  5, 6, 7, 4,  7);
++-	bnez	$at, .Loop_chacha20_xor_rounds
+++	bnez	$at, .Loop_chacha_xor_rounds
++ 
++ 	addiu	BYTES, -(CHACHA20_BLOCK_SIZE)
++ 
++ 	/* Is data src/dst unaligned? Jump */
++-	bnez	IS_UNALIGNED, .Loop_chacha20_unaligned
+++	bnez	IS_UNALIGNED, .Loop_chacha_unaligned
++ 
++ 	/* Set number rounds here to fill delayslot. */
++-	li	$at, 20
+++	lw	$at, (STACK_SIZE+16)($sp)
++ 
++ 	/* BYTES < 0, it has no full block. */
++-	bltz	BYTES, .Lchacha20_mips_no_full_block_aligned
+++	bltz	BYTES, .Lchacha_mips_no_full_block_aligned
++ 
++ 	FOR_EACH_WORD_REV(STORE_ALIGNED)
++ 
++ 	/* BYTES > 0? Loop again. */
++-	bgtz	BYTES, .Loop_chacha20_rounds
+++	bgtz	BYTES, .Loop_chacha_rounds
++ 
++ 	/* Place this here to fill delay slot */
++ 	addiu	NONCE_0, 1
++ 
++ 	/* BYTES < 0? Handle last bytes */
++-	bltz	BYTES, .Lchacha20_mips_xor_bytes
+++	bltz	BYTES, .Lchacha_mips_xor_bytes
++ 
++-.Lchacha20_mips_xor_done:
+++.Lchacha_mips_xor_done:
++ 	/* Restore used registers */
++ 	lw	$s0,  0($sp)
++ 	lw	$s1,  4($sp)
++@@ -307,11 +307,11 @@ chacha20_mips:
++ 	/* Write NONCE_0 back to right location in state */
++ 	sw	NONCE_0, 48(STATE)
++ 
++-.Lchacha20_mips_end:
+++.Lchacha_mips_end:
++ 	addiu	$sp, STACK_SIZE
++ 	jr	$ra
++ 
++-.Lchacha20_mips_no_full_block_aligned:
+++.Lchacha_mips_no_full_block_aligned:
++ 	/* Restore the offset on BYTES */
++ 	addiu	BYTES, CHACHA20_BLOCK_SIZE
++ 
++@@ -319,7 +319,7 @@ chacha20_mips:
++ 	andi	$at, BYTES, MASK_U32
++ 
++ 	/* Load upper half of jump table addr */
++-	lui	T0, %hi(.Lchacha20_mips_jmptbl_aligned_0)
+++	lui	T0, %hi(.Lchacha_mips_jmptbl_aligned_0)
++ 
++ 	/* Calculate lower half jump table offset */
++ 	ins	T0, $at, 1, 6
++@@ -328,7 +328,7 @@ chacha20_mips:
++ 	addu	T1, STATE, $at
++ 
++ 	/* Add lower half jump table addr */
++-	addiu	T0, %lo(.Lchacha20_mips_jmptbl_aligned_0)
+++	addiu	T0, %lo(.Lchacha_mips_jmptbl_aligned_0)
++ 
++ 	/* Read value from STATE */
++ 	lw	SAVED_CA, 0(T1)
++@@ -342,31 +342,31 @@ chacha20_mips:
++ 	FOR_EACH_WORD(JMPTBL_ALIGNED)
++ 
++ 
++-.Loop_chacha20_unaligned:
+++.Loop_chacha_unaligned:
++ 	/* Set number rounds here to fill delayslot. */
++-	li	$at, 20
+++	lw	$at, (STACK_SIZE+16)($sp)
++ 
++ 	/* BYTES > 0, it has no full block. */
++-	bltz	BYTES, .Lchacha20_mips_no_full_block_unaligned
+++	bltz	BYTES, .Lchacha_mips_no_full_block_unaligned
++ 
++ 	FOR_EACH_WORD_REV(STORE_UNALIGNED)
++ 
++ 	/* BYTES > 0? Loop again. */
++-	bgtz	BYTES, .Loop_chacha20_rounds
+++	bgtz	BYTES, .Loop_chacha_rounds
++ 
++ 	/* Write NONCE_0 back to right location in state */
++ 	sw	NONCE_0, 48(STATE)
++ 
++ 	.set noreorder
++ 	/* Fall through to byte handling */
++-	bgez	BYTES, .Lchacha20_mips_xor_done
++-.Lchacha20_mips_xor_unaligned_0_b:
++-.Lchacha20_mips_xor_aligned_0_b:
+++	bgez	BYTES, .Lchacha_mips_xor_done
+++.Lchacha_mips_xor_unaligned_0_b:
+++.Lchacha_mips_xor_aligned_0_b:
++ 	/* Place this here to fill delay slot */
++ 	addiu	NONCE_0, 1
++ 	.set reorder
++ 
++-.Lchacha20_mips_xor_bytes:
+++.Lchacha_mips_xor_bytes:
++ 	addu	IN, $at
++ 	addu	OUT, $at
++ 	/* First byte */
++@@ -376,22 +376,22 @@ chacha20_mips:
++ 	ROTR(SAVED_X)
++ 	xor	T1, SAVED_X
++ 	sb	T1, 0(OUT)
++-	beqz	$at, .Lchacha20_mips_xor_done
+++	beqz	$at, .Lchacha_mips_xor_done
++ 	/* Second byte */
++ 	lbu	T1, 1(IN)
++ 	addiu	$at, BYTES, 2
++ 	ROTx	SAVED_X, 8
++ 	xor	T1, SAVED_X
++ 	sb	T1, 1(OUT)
++-	beqz	$at, .Lchacha20_mips_xor_done
+++	beqz	$at, .Lchacha_mips_xor_done
++ 	/* Third byte */
++ 	lbu	T1, 2(IN)
++ 	ROTx	SAVED_X, 8
++ 	xor	T1, SAVED_X
++ 	sb	T1, 2(OUT)
++-	b	.Lchacha20_mips_xor_done
+++	b	.Lchacha_mips_xor_done
++ 
++-.Lchacha20_mips_no_full_block_unaligned:
+++.Lchacha_mips_no_full_block_unaligned:
++ 	/* Restore the offset on BYTES */
++ 	addiu	BYTES, CHACHA20_BLOCK_SIZE
++ 
++@@ -399,7 +399,7 @@ chacha20_mips:
++ 	andi	$at, BYTES, MASK_U32
++ 
++ 	/* Load upper half of jump table addr */
++-	lui	T0, %hi(.Lchacha20_mips_jmptbl_unaligned_0)
+++	lui	T0, %hi(.Lchacha_mips_jmptbl_unaligned_0)
++ 
++ 	/* Calculate lower half jump table offset */
++ 	ins	T0, $at, 1, 6
++@@ -408,7 +408,7 @@ chacha20_mips:
++ 	addu	T1, STATE, $at
++ 
++ 	/* Add lower half jump table addr */
++-	addiu	T0, %lo(.Lchacha20_mips_jmptbl_unaligned_0)
+++	addiu	T0, %lo(.Lchacha_mips_jmptbl_unaligned_0)
++ 
++ 	/* Read value from STATE */
++ 	lw	SAVED_CA, 0(T1)
++@@ -420,5 +420,78 @@ chacha20_mips:
++ 
++ 	/* Jump table */
++ 	FOR_EACH_WORD(JMPTBL_UNALIGNED)
++-.end chacha20_mips
+++.end chacha_crypt_arch
+++.set at
+++
+++/* Input arguments
+++ * STATE	$a0
+++ * OUT		$a1
+++ * NROUND	$a2
+++ */
+++
+++#undef X12
+++#undef X13
+++#undef X14
+++#undef X15
+++
+++#define X12	$a3
+++#define X13	$at
+++#define X14	$v0
+++#define X15	STATE
+++
+++.set noat
+++.globl	hchacha_block_arch
+++.ent	hchacha_block_arch
+++hchacha_block_arch:
+++	.frame	$sp, STACK_SIZE, $ra
+++
+++	addiu	$sp, -STACK_SIZE
+++
+++	/* Save X11(s6) */
+++	sw	X11, 0($sp)
+++
+++	lw	X0,  0(STATE)
+++	lw	X1,  4(STATE)
+++	lw	X2,  8(STATE)
+++	lw	X3,  12(STATE)
+++	lw	X4,  16(STATE)
+++	lw	X5,  20(STATE)
+++	lw	X6,  24(STATE)
+++	lw	X7,  28(STATE)
+++	lw	X8,  32(STATE)
+++	lw	X9,  36(STATE)
+++	lw	X10, 40(STATE)
+++	lw	X11, 44(STATE)
+++	lw	X12, 48(STATE)
+++	lw	X13, 52(STATE)
+++	lw	X14, 56(STATE)
+++	lw	X15, 60(STATE)
+++
+++.Loop_hchacha_xor_rounds:
+++	addiu	$a2, -2
+++	AXR( 0, 1, 2, 3,  4, 5, 6, 7, 12,13,14,15, 16);
+++	AXR( 8, 9,10,11, 12,13,14,15,  4, 5, 6, 7, 12);
+++	AXR( 0, 1, 2, 3,  4, 5, 6, 7, 12,13,14,15,  8);
+++	AXR( 8, 9,10,11, 12,13,14,15,  4, 5, 6, 7,  7);
+++	AXR( 0, 1, 2, 3,  5, 6, 7, 4, 15,12,13,14, 16);
+++	AXR(10,11, 8, 9, 15,12,13,14,  5, 6, 7, 4, 12);
+++	AXR( 0, 1, 2, 3,  5, 6, 7, 4, 15,12,13,14,  8);
+++	AXR(10,11, 8, 9, 15,12,13,14,  5, 6, 7, 4,  7);
+++	bnez	$a2, .Loop_hchacha_xor_rounds
+++
+++	/* Restore used register */
+++	lw	X11, 0($sp)
+++
+++	sw	X0,  0(OUT)
+++	sw	X1,  4(OUT)
+++	sw	X2,  8(OUT)
+++	sw	X3,  12(OUT)
+++	sw	X12, 16(OUT)
+++	sw	X13, 20(OUT)
+++	sw	X14, 24(OUT)
+++	sw	X15, 28(OUT)
+++
+++	addiu	$sp, STACK_SIZE
+++	jr	$ra
+++.end hchacha_block_arch
++ .set at
++--- /dev/null
+++++ b/arch/mips/crypto/chacha-glue.c
++@@ -0,0 +1,150 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * MIPS accelerated ChaCha and XChaCha stream ciphers,
+++ * including ChaCha20 (RFC7539)
+++ *
+++ * Copyright (C) 2019 Linaro, Ltd. <ard.biesheuvel@linaro.org>
+++ */
+++
+++#include <asm/byteorder.h>
+++#include <crypto/algapi.h>
+++#include <crypto/internal/chacha.h>
+++#include <crypto/internal/skcipher.h>
+++#include <linux/kernel.h>
+++#include <linux/module.h>
+++
+++asmlinkage void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src,
+++				  unsigned int bytes, int nrounds);
+++EXPORT_SYMBOL(chacha_crypt_arch);
+++
+++asmlinkage void hchacha_block_arch(const u32 *state, u32 *stream, int nrounds);
+++EXPORT_SYMBOL(hchacha_block_arch);
+++
+++void chacha_init_arch(u32 *state, const u32 *key, const u8 *iv)
+++{
+++	chacha_init_generic(state, key, iv);
+++}
+++EXPORT_SYMBOL(chacha_init_arch);
+++
+++static int chacha_mips_stream_xor(struct skcipher_request *req,
+++				  const struct chacha_ctx *ctx, const u8 *iv)
+++{
+++	struct skcipher_walk walk;
+++	u32 state[16];
+++	int err;
+++
+++	err = skcipher_walk_virt(&walk, req, false);
+++
+++	chacha_init_generic(state, ctx->key, iv);
+++
+++	while (walk.nbytes > 0) {
+++		unsigned int nbytes = walk.nbytes;
+++
+++		if (nbytes < walk.total)
+++			nbytes = round_down(nbytes, walk.stride);
+++
+++		chacha_crypt(state, walk.dst.virt.addr, walk.src.virt.addr,
+++			     nbytes, ctx->nrounds);
+++		err = skcipher_walk_done(&walk, walk.nbytes - nbytes);
+++	}
+++
+++	return err;
+++}
+++
+++static int chacha_mips(struct skcipher_request *req)
+++{
+++	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
+++	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
+++
+++	return chacha_mips_stream_xor(req, ctx, req->iv);
+++}
+++
+++static int xchacha_mips(struct skcipher_request *req)
+++{
+++	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
+++	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
+++	struct chacha_ctx subctx;
+++	u32 state[16];
+++	u8 real_iv[16];
+++
+++	chacha_init_generic(state, ctx->key, req->iv);
+++
+++	hchacha_block(state, subctx.key, ctx->nrounds);
+++	subctx.nrounds = ctx->nrounds;
+++
+++	memcpy(&real_iv[0], req->iv + 24, 8);
+++	memcpy(&real_iv[8], req->iv + 16, 8);
+++	return chacha_mips_stream_xor(req, &subctx, real_iv);
+++}
+++
+++static struct skcipher_alg algs[] = {
+++	{
+++		.base.cra_name		= "chacha20",
+++		.base.cra_driver_name	= "chacha20-mips",
+++		.base.cra_priority	= 200,
+++		.base.cra_blocksize	= 1,
+++		.base.cra_ctxsize	= sizeof(struct chacha_ctx),
+++		.base.cra_module	= THIS_MODULE,
+++
+++		.min_keysize		= CHACHA_KEY_SIZE,
+++		.max_keysize		= CHACHA_KEY_SIZE,
+++		.ivsize			= CHACHA_IV_SIZE,
+++		.chunksize		= CHACHA_BLOCK_SIZE,
+++		.setkey			= chacha20_setkey,
+++		.encrypt		= chacha_mips,
+++		.decrypt		= chacha_mips,
+++	}, {
+++		.base.cra_name		= "xchacha20",
+++		.base.cra_driver_name	= "xchacha20-mips",
+++		.base.cra_priority	= 200,
+++		.base.cra_blocksize	= 1,
+++		.base.cra_ctxsize	= sizeof(struct chacha_ctx),
+++		.base.cra_module	= THIS_MODULE,
+++
+++		.min_keysize		= CHACHA_KEY_SIZE,
+++		.max_keysize		= CHACHA_KEY_SIZE,
+++		.ivsize			= XCHACHA_IV_SIZE,
+++		.chunksize		= CHACHA_BLOCK_SIZE,
+++		.setkey			= chacha20_setkey,
+++		.encrypt		= xchacha_mips,
+++		.decrypt		= xchacha_mips,
+++	}, {
+++		.base.cra_name		= "xchacha12",
+++		.base.cra_driver_name	= "xchacha12-mips",
+++		.base.cra_priority	= 200,
+++		.base.cra_blocksize	= 1,
+++		.base.cra_ctxsize	= sizeof(struct chacha_ctx),
+++		.base.cra_module	= THIS_MODULE,
+++
+++		.min_keysize		= CHACHA_KEY_SIZE,
+++		.max_keysize		= CHACHA_KEY_SIZE,
+++		.ivsize			= XCHACHA_IV_SIZE,
+++		.chunksize		= CHACHA_BLOCK_SIZE,
+++		.setkey			= chacha12_setkey,
+++		.encrypt		= xchacha_mips,
+++		.decrypt		= xchacha_mips,
+++	}
+++};
+++
+++static int __init chacha_simd_mod_init(void)
+++{
+++	return crypto_register_skciphers(algs, ARRAY_SIZE(algs));
+++}
+++
+++static void __exit chacha_simd_mod_fini(void)
+++{
+++	crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));
+++}
+++
+++module_init(chacha_simd_mod_init);
+++module_exit(chacha_simd_mod_fini);
+++
+++MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (MIPS accelerated)");
+++MODULE_AUTHOR("Ard Biesheuvel <ard.biesheuvel@linaro.org>");
+++MODULE_LICENSE("GPL v2");
+++MODULE_ALIAS_CRYPTO("chacha20");
+++MODULE_ALIAS_CRYPTO("chacha20-mips");
+++MODULE_ALIAS_CRYPTO("xchacha20");
+++MODULE_ALIAS_CRYPTO("xchacha20-mips");
+++MODULE_ALIAS_CRYPTO("xchacha12");
+++MODULE_ALIAS_CRYPTO("xchacha12-mips");
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -1423,6 +1423,12 @@ config CRYPTO_CHACHA20_X86_64
++ 	  SSSE3, AVX2, and AVX-512VL optimized implementations of the ChaCha20,
++ 	  XChaCha20, and XChaCha12 stream ciphers.
++ 
+++config CRYPTO_CHACHA_MIPS
+++	tristate "ChaCha stream cipher algorithms (MIPS 32r2 optimized)"
+++	depends on CPU_MIPS32_R2
+++	select CRYPTO_BLKCIPHER
+++	select CRYPTO_ARCH_HAVE_LIB_CHACHA
+++
++ config CRYPTO_SEED
++ 	tristate "SEED cipher algorithm"
++ 	select CRYPTO_ALGAPI
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0012-crypto-chacha-unexport-chacha_generic-routines.patch b/target/linux/generic/backport-5.4/080-wireguard-0012-crypto-chacha-unexport-chacha_generic-routines.patch
+new file mode 100644
+index 0000000000..d06f47a100
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0012-crypto-chacha-unexport-chacha_generic-routines.patch
+@@ -0,0 +1,115 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:18 +0100
++Subject: [PATCH] crypto: chacha - unexport chacha_generic routines
++
++commit 22cf705360707ced15f9fe5423938f313c7df536 upstream.
++
++Now that all users of generic ChaCha code have moved to the core library,
++there is no longer a need for the generic ChaCha skcpiher driver to
++export parts of it implementation for reuse by other drivers. So drop
++the exports, and make the symbols static.
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ crypto/chacha_generic.c          | 26 ++++++++------------------
++ include/crypto/internal/chacha.h | 10 ----------
++ 2 files changed, 8 insertions(+), 28 deletions(-)
++
++--- a/crypto/chacha_generic.c
+++++ b/crypto/chacha_generic.c
++@@ -21,7 +21,7 @@ static int chacha_stream_xor(struct skci
++ 
++ 	err = skcipher_walk_virt(&walk, req, false);
++ 
++-	crypto_chacha_init(state, ctx, iv);
+++	chacha_init_generic(state, ctx->key, iv);
++ 
++ 	while (walk.nbytes > 0) {
++ 		unsigned int nbytes = walk.nbytes;
++@@ -37,36 +37,27 @@ static int chacha_stream_xor(struct skci
++ 	return err;
++ }
++ 
++-void crypto_chacha_init(u32 *state, const struct chacha_ctx *ctx, const u8 *iv)
++-{
++-	chacha_init_generic(state, ctx->key, iv);
++-}
++-EXPORT_SYMBOL_GPL(crypto_chacha_init);
++-
++-int crypto_chacha20_setkey(struct crypto_skcipher *tfm, const u8 *key,
++-			   unsigned int keysize)
+++static int crypto_chacha20_setkey(struct crypto_skcipher *tfm, const u8 *key,
+++				  unsigned int keysize)
++ {
++ 	return chacha_setkey(tfm, key, keysize, 20);
++ }
++-EXPORT_SYMBOL_GPL(crypto_chacha20_setkey);
++ 
++-int crypto_chacha12_setkey(struct crypto_skcipher *tfm, const u8 *key,
++-			   unsigned int keysize)
+++static int crypto_chacha12_setkey(struct crypto_skcipher *tfm, const u8 *key,
+++				 unsigned int keysize)
++ {
++ 	return chacha_setkey(tfm, key, keysize, 12);
++ }
++-EXPORT_SYMBOL_GPL(crypto_chacha12_setkey);
++ 
++-int crypto_chacha_crypt(struct skcipher_request *req)
+++static int crypto_chacha_crypt(struct skcipher_request *req)
++ {
++ 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
++ 	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
++ 
++ 	return chacha_stream_xor(req, ctx, req->iv);
++ }
++-EXPORT_SYMBOL_GPL(crypto_chacha_crypt);
++ 
++-int crypto_xchacha_crypt(struct skcipher_request *req)
+++static int crypto_xchacha_crypt(struct skcipher_request *req)
++ {
++ 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
++ 	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
++@@ -75,7 +66,7 @@ int crypto_xchacha_crypt(struct skcipher
++ 	u8 real_iv[16];
++ 
++ 	/* Compute the subkey given the original key and first 128 nonce bits */
++-	crypto_chacha_init(state, ctx, req->iv);
+++	chacha_init_generic(state, ctx->key, req->iv);
++ 	hchacha_block_generic(state, subctx.key, ctx->nrounds);
++ 	subctx.nrounds = ctx->nrounds;
++ 
++@@ -86,7 +77,6 @@ int crypto_xchacha_crypt(struct skcipher
++ 	/* Generate the stream and XOR it with the data */
++ 	return chacha_stream_xor(req, &subctx, real_iv);
++ }
++-EXPORT_SYMBOL_GPL(crypto_xchacha_crypt);
++ 
++ static struct skcipher_alg algs[] = {
++ 	{
++--- a/include/crypto/internal/chacha.h
+++++ b/include/crypto/internal/chacha.h
++@@ -12,8 +12,6 @@ struct chacha_ctx {
++ 	int nrounds;
++ };
++ 
++-void crypto_chacha_init(u32 *state, const struct chacha_ctx *ctx, const u8 *iv);
++-
++ static inline int chacha_setkey(struct crypto_skcipher *tfm, const u8 *key,
++ 				unsigned int keysize, int nrounds)
++ {
++@@ -42,12 +40,4 @@ static int inline chacha12_setkey(struct
++ 	return chacha_setkey(tfm, key, keysize, 12);
++ }
++ 
++-int crypto_chacha20_setkey(struct crypto_skcipher *tfm, const u8 *key,
++-			   unsigned int keysize);
++-int crypto_chacha12_setkey(struct crypto_skcipher *tfm, const u8 *key,
++-			   unsigned int keysize);
++-
++-int crypto_chacha_crypt(struct skcipher_request *req);
++-int crypto_xchacha_crypt(struct skcipher_request *req);
++-
++ #endif /* _CRYPTO_CHACHA_H */
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0013-crypto-poly1305-move-core-routines-into-a-separate-l.patch b/target/linux/generic/backport-5.4/080-wireguard-0013-crypto-poly1305-move-core-routines-into-a-separate-l.patch
+new file mode 100644
+index 0000000000..960300d2a5
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0013-crypto-poly1305-move-core-routines-into-a-separate-l.patch
+@@ -0,0 +1,649 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:19 +0100
++Subject: [PATCH] crypto: poly1305 - move core routines into a separate library
++
++commit 48ea8c6ebc96bc0990e12ee1c43d0832c23576bb upstream.
++
++Move the core Poly1305 routines shared between the generic Poly1305
++shash driver and the Adiantum and NHPoly1305 drivers into a separate
++library so that using just this pieces does not pull in the crypto
++API pieces of the generic Poly1305 routine.
++
++In a subsequent patch, we will augment this generic library with
++init/update/final routines so that Poyl1305 algorithm can be used
++directly without the need for using the crypto API's shash abstraction.
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/poly1305_glue.c    |   2 +-
++ crypto/Kconfig                     |   5 +-
++ crypto/adiantum.c                  |   5 +-
++ crypto/nhpoly1305.c                |   3 +-
++ crypto/poly1305_generic.c          | 195 ++---------------------------
++ include/crypto/internal/poly1305.h |  67 ++++++++++
++ include/crypto/poly1305.h          |  23 ----
++ lib/crypto/Kconfig                 |   3 +
++ lib/crypto/Makefile                |   3 +
++ lib/crypto/poly1305.c              | 158 +++++++++++++++++++++++
++ 10 files changed, 248 insertions(+), 216 deletions(-)
++ create mode 100644 include/crypto/internal/poly1305.h
++ create mode 100644 lib/crypto/poly1305.c
++
++--- a/arch/x86/crypto/poly1305_glue.c
+++++ b/arch/x86/crypto/poly1305_glue.c
++@@ -7,8 +7,8 @@
++ 
++ #include <crypto/algapi.h>
++ #include <crypto/internal/hash.h>
+++#include <crypto/internal/poly1305.h>
++ #include <crypto/internal/simd.h>
++-#include <crypto/poly1305.h>
++ #include <linux/crypto.h>
++ #include <linux/kernel.h>
++ #include <linux/module.h>
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -446,7 +446,7 @@ config CRYPTO_KEYWRAP
++ config CRYPTO_NHPOLY1305
++ 	tristate
++ 	select CRYPTO_HASH
++-	select CRYPTO_POLY1305
+++	select CRYPTO_LIB_POLY1305_GENERIC
++ 
++ config CRYPTO_NHPOLY1305_SSE2
++ 	tristate "NHPoly1305 hash function (x86_64 SSE2 implementation)"
++@@ -467,7 +467,7 @@ config CRYPTO_NHPOLY1305_AVX2
++ config CRYPTO_ADIANTUM
++ 	tristate "Adiantum support"
++ 	select CRYPTO_CHACHA20
++-	select CRYPTO_POLY1305
+++	select CRYPTO_LIB_POLY1305_GENERIC
++ 	select CRYPTO_NHPOLY1305
++ 	select CRYPTO_MANAGER
++ 	help
++@@ -686,6 +686,7 @@ config CRYPTO_GHASH
++ config CRYPTO_POLY1305
++ 	tristate "Poly1305 authenticator algorithm"
++ 	select CRYPTO_HASH
+++	select CRYPTO_LIB_POLY1305_GENERIC
++ 	help
++ 	  Poly1305 authenticator algorithm, RFC7539.
++ 
++--- a/crypto/adiantum.c
+++++ b/crypto/adiantum.c
++@@ -33,6 +33,7 @@
++ #include <crypto/b128ops.h>
++ #include <crypto/chacha.h>
++ #include <crypto/internal/hash.h>
+++#include <crypto/internal/poly1305.h>
++ #include <crypto/internal/skcipher.h>
++ #include <crypto/nhpoly1305.h>
++ #include <crypto/scatterwalk.h>
++@@ -242,11 +243,11 @@ static void adiantum_hash_header(struct
++ 
++ 	BUILD_BUG_ON(sizeof(header) % POLY1305_BLOCK_SIZE != 0);
++ 	poly1305_core_blocks(&state, &tctx->header_hash_key,
++-			     &header, sizeof(header) / POLY1305_BLOCK_SIZE);
+++			     &header, sizeof(header) / POLY1305_BLOCK_SIZE, 1);
++ 
++ 	BUILD_BUG_ON(TWEAK_SIZE % POLY1305_BLOCK_SIZE != 0);
++ 	poly1305_core_blocks(&state, &tctx->header_hash_key, req->iv,
++-			     TWEAK_SIZE / POLY1305_BLOCK_SIZE);
+++			     TWEAK_SIZE / POLY1305_BLOCK_SIZE, 1);
++ 
++ 	poly1305_core_emit(&state, &rctx->header_hash);
++ }
++--- a/crypto/nhpoly1305.c
+++++ b/crypto/nhpoly1305.c
++@@ -33,6 +33,7 @@
++ #include <asm/unaligned.h>
++ #include <crypto/algapi.h>
++ #include <crypto/internal/hash.h>
+++#include <crypto/internal/poly1305.h>
++ #include <crypto/nhpoly1305.h>
++ #include <linux/crypto.h>
++ #include <linux/kernel.h>
++@@ -78,7 +79,7 @@ static void process_nh_hash_value(struct
++ 	BUILD_BUG_ON(NH_HASH_BYTES % POLY1305_BLOCK_SIZE != 0);
++ 
++ 	poly1305_core_blocks(&state->poly_state, &key->poly_key, state->nh_hash,
++-			     NH_HASH_BYTES / POLY1305_BLOCK_SIZE);
+++			     NH_HASH_BYTES / POLY1305_BLOCK_SIZE, 1);
++ }
++ 
++ /*
++--- a/crypto/poly1305_generic.c
+++++ b/crypto/poly1305_generic.c
++@@ -13,27 +13,12 @@
++ 
++ #include <crypto/algapi.h>
++ #include <crypto/internal/hash.h>
++-#include <crypto/poly1305.h>
+++#include <crypto/internal/poly1305.h>
++ #include <linux/crypto.h>
++ #include <linux/kernel.h>
++ #include <linux/module.h>
++ #include <asm/unaligned.h>
++ 
++-static inline u64 mlt(u64 a, u64 b)
++-{
++-	return a * b;
++-}
++-
++-static inline u32 sr(u64 v, u_char n)
++-{
++-	return v >> n;
++-}
++-
++-static inline u32 and(u32 v, u32 mask)
++-{
++-	return v & mask;
++-}
++-
++ int crypto_poly1305_init(struct shash_desc *desc)
++ {
++ 	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
++@@ -47,124 +32,8 @@ int crypto_poly1305_init(struct shash_de
++ }
++ EXPORT_SYMBOL_GPL(crypto_poly1305_init);
++ 
++-void poly1305_core_setkey(struct poly1305_key *key, const u8 *raw_key)
++-{
++-	/* r &= 0xffffffc0ffffffc0ffffffc0fffffff */
++-	key->r[0] = (get_unaligned_le32(raw_key +  0) >> 0) & 0x3ffffff;
++-	key->r[1] = (get_unaligned_le32(raw_key +  3) >> 2) & 0x3ffff03;
++-	key->r[2] = (get_unaligned_le32(raw_key +  6) >> 4) & 0x3ffc0ff;
++-	key->r[3] = (get_unaligned_le32(raw_key +  9) >> 6) & 0x3f03fff;
++-	key->r[4] = (get_unaligned_le32(raw_key + 12) >> 8) & 0x00fffff;
++-}
++-EXPORT_SYMBOL_GPL(poly1305_core_setkey);
++-
++-/*
++- * Poly1305 requires a unique key for each tag, which implies that we can't set
++- * it on the tfm that gets accessed by multiple users simultaneously. Instead we
++- * expect the key as the first 32 bytes in the update() call.
++- */
++-unsigned int crypto_poly1305_setdesckey(struct poly1305_desc_ctx *dctx,
++-					const u8 *src, unsigned int srclen)
++-{
++-	if (!dctx->sset) {
++-		if (!dctx->rset && srclen >= POLY1305_BLOCK_SIZE) {
++-			poly1305_core_setkey(&dctx->r, src);
++-			src += POLY1305_BLOCK_SIZE;
++-			srclen -= POLY1305_BLOCK_SIZE;
++-			dctx->rset = true;
++-		}
++-		if (srclen >= POLY1305_BLOCK_SIZE) {
++-			dctx->s[0] = get_unaligned_le32(src +  0);
++-			dctx->s[1] = get_unaligned_le32(src +  4);
++-			dctx->s[2] = get_unaligned_le32(src +  8);
++-			dctx->s[3] = get_unaligned_le32(src + 12);
++-			src += POLY1305_BLOCK_SIZE;
++-			srclen -= POLY1305_BLOCK_SIZE;
++-			dctx->sset = true;
++-		}
++-	}
++-	return srclen;
++-}
++-EXPORT_SYMBOL_GPL(crypto_poly1305_setdesckey);
++-
++-static void poly1305_blocks_internal(struct poly1305_state *state,
++-				     const struct poly1305_key *key,
++-				     const void *src, unsigned int nblocks,
++-				     u32 hibit)
++-{
++-	u32 r0, r1, r2, r3, r4;
++-	u32 s1, s2, s3, s4;
++-	u32 h0, h1, h2, h3, h4;
++-	u64 d0, d1, d2, d3, d4;
++-
++-	if (!nblocks)
++-		return;
++-
++-	r0 = key->r[0];
++-	r1 = key->r[1];
++-	r2 = key->r[2];
++-	r3 = key->r[3];
++-	r4 = key->r[4];
++-
++-	s1 = r1 * 5;
++-	s2 = r2 * 5;
++-	s3 = r3 * 5;
++-	s4 = r4 * 5;
++-
++-	h0 = state->h[0];
++-	h1 = state->h[1];
++-	h2 = state->h[2];
++-	h3 = state->h[3];
++-	h4 = state->h[4];
++-
++-	do {
++-		/* h += m[i] */
++-		h0 += (get_unaligned_le32(src +  0) >> 0) & 0x3ffffff;
++-		h1 += (get_unaligned_le32(src +  3) >> 2) & 0x3ffffff;
++-		h2 += (get_unaligned_le32(src +  6) >> 4) & 0x3ffffff;
++-		h3 += (get_unaligned_le32(src +  9) >> 6) & 0x3ffffff;
++-		h4 += (get_unaligned_le32(src + 12) >> 8) | hibit;
++-
++-		/* h *= r */
++-		d0 = mlt(h0, r0) + mlt(h1, s4) + mlt(h2, s3) +
++-		     mlt(h3, s2) + mlt(h4, s1);
++-		d1 = mlt(h0, r1) + mlt(h1, r0) + mlt(h2, s4) +
++-		     mlt(h3, s3) + mlt(h4, s2);
++-		d2 = mlt(h0, r2) + mlt(h1, r1) + mlt(h2, r0) +
++-		     mlt(h3, s4) + mlt(h4, s3);
++-		d3 = mlt(h0, r3) + mlt(h1, r2) + mlt(h2, r1) +
++-		     mlt(h3, r0) + mlt(h4, s4);
++-		d4 = mlt(h0, r4) + mlt(h1, r3) + mlt(h2, r2) +
++-		     mlt(h3, r1) + mlt(h4, r0);
++-
++-		/* (partial) h %= p */
++-		d1 += sr(d0, 26);     h0 = and(d0, 0x3ffffff);
++-		d2 += sr(d1, 26);     h1 = and(d1, 0x3ffffff);
++-		d3 += sr(d2, 26);     h2 = and(d2, 0x3ffffff);
++-		d4 += sr(d3, 26);     h3 = and(d3, 0x3ffffff);
++-		h0 += sr(d4, 26) * 5; h4 = and(d4, 0x3ffffff);
++-		h1 += h0 >> 26;       h0 = h0 & 0x3ffffff;
++-
++-		src += POLY1305_BLOCK_SIZE;
++-	} while (--nblocks);
++-
++-	state->h[0] = h0;
++-	state->h[1] = h1;
++-	state->h[2] = h2;
++-	state->h[3] = h3;
++-	state->h[4] = h4;
++-}
++-
++-void poly1305_core_blocks(struct poly1305_state *state,
++-			  const struct poly1305_key *key,
++-			  const void *src, unsigned int nblocks)
++-{
++-	poly1305_blocks_internal(state, key, src, nblocks, 1 << 24);
++-}
++-EXPORT_SYMBOL_GPL(poly1305_core_blocks);
++-
++-static void poly1305_blocks(struct poly1305_desc_ctx *dctx,
++-			    const u8 *src, unsigned int srclen, u32 hibit)
+++static void poly1305_blocks(struct poly1305_desc_ctx *dctx, const u8 *src,
+++			    unsigned int srclen)
++ {
++ 	unsigned int datalen;
++ 
++@@ -174,8 +43,8 @@ static void poly1305_blocks(struct poly1
++ 		srclen = datalen;
++ 	}
++ 
++-	poly1305_blocks_internal(&dctx->h, &dctx->r,
++-				 src, srclen / POLY1305_BLOCK_SIZE, hibit);
+++	poly1305_core_blocks(&dctx->h, &dctx->r, src,
+++			     srclen / POLY1305_BLOCK_SIZE, 1);
++ }
++ 
++ int crypto_poly1305_update(struct shash_desc *desc,
++@@ -193,13 +62,13 @@ int crypto_poly1305_update(struct shash_
++ 
++ 		if (dctx->buflen == POLY1305_BLOCK_SIZE) {
++ 			poly1305_blocks(dctx, dctx->buf,
++-					POLY1305_BLOCK_SIZE, 1 << 24);
+++					POLY1305_BLOCK_SIZE);
++ 			dctx->buflen = 0;
++ 		}
++ 	}
++ 
++ 	if (likely(srclen >= POLY1305_BLOCK_SIZE)) {
++-		poly1305_blocks(dctx, src, srclen, 1 << 24);
+++		poly1305_blocks(dctx, src, srclen);
++ 		src += srclen - (srclen % POLY1305_BLOCK_SIZE);
++ 		srclen %= POLY1305_BLOCK_SIZE;
++ 	}
++@@ -213,54 +82,6 @@ int crypto_poly1305_update(struct shash_
++ }
++ EXPORT_SYMBOL_GPL(crypto_poly1305_update);
++ 
++-void poly1305_core_emit(const struct poly1305_state *state, void *dst)
++-{
++-	u32 h0, h1, h2, h3, h4;
++-	u32 g0, g1, g2, g3, g4;
++-	u32 mask;
++-
++-	/* fully carry h */
++-	h0 = state->h[0];
++-	h1 = state->h[1];
++-	h2 = state->h[2];
++-	h3 = state->h[3];
++-	h4 = state->h[4];
++-
++-	h2 += (h1 >> 26);     h1 = h1 & 0x3ffffff;
++-	h3 += (h2 >> 26);     h2 = h2 & 0x3ffffff;
++-	h4 += (h3 >> 26);     h3 = h3 & 0x3ffffff;
++-	h0 += (h4 >> 26) * 5; h4 = h4 & 0x3ffffff;
++-	h1 += (h0 >> 26);     h0 = h0 & 0x3ffffff;
++-
++-	/* compute h + -p */
++-	g0 = h0 + 5;
++-	g1 = h1 + (g0 >> 26);             g0 &= 0x3ffffff;
++-	g2 = h2 + (g1 >> 26);             g1 &= 0x3ffffff;
++-	g3 = h3 + (g2 >> 26);             g2 &= 0x3ffffff;
++-	g4 = h4 + (g3 >> 26) - (1 << 26); g3 &= 0x3ffffff;
++-
++-	/* select h if h < p, or h + -p if h >= p */
++-	mask = (g4 >> ((sizeof(u32) * 8) - 1)) - 1;
++-	g0 &= mask;
++-	g1 &= mask;
++-	g2 &= mask;
++-	g3 &= mask;
++-	g4 &= mask;
++-	mask = ~mask;
++-	h0 = (h0 & mask) | g0;
++-	h1 = (h1 & mask) | g1;
++-	h2 = (h2 & mask) | g2;
++-	h3 = (h3 & mask) | g3;
++-	h4 = (h4 & mask) | g4;
++-
++-	/* h = h % (2^128) */
++-	put_unaligned_le32((h0 >>  0) | (h1 << 26), dst +  0);
++-	put_unaligned_le32((h1 >>  6) | (h2 << 20), dst +  4);
++-	put_unaligned_le32((h2 >> 12) | (h3 << 14), dst +  8);
++-	put_unaligned_le32((h3 >> 18) | (h4 <<  8), dst + 12);
++-}
++-EXPORT_SYMBOL_GPL(poly1305_core_emit);
++-
++ int crypto_poly1305_final(struct shash_desc *desc, u8 *dst)
++ {
++ 	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
++@@ -274,7 +95,7 @@ int crypto_poly1305_final(struct shash_d
++ 		dctx->buf[dctx->buflen++] = 1;
++ 		memset(dctx->buf + dctx->buflen, 0,
++ 		       POLY1305_BLOCK_SIZE - dctx->buflen);
++-		poly1305_blocks(dctx, dctx->buf, POLY1305_BLOCK_SIZE, 0);
+++		poly1305_core_blocks(&dctx->h, &dctx->r, dctx->buf, 1, 0);
++ 	}
++ 
++ 	poly1305_core_emit(&dctx->h, digest);
++--- /dev/null
+++++ b/include/crypto/internal/poly1305.h
++@@ -0,0 +1,67 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++/*
+++ * Common values for the Poly1305 algorithm
+++ */
+++
+++#ifndef _CRYPTO_INTERNAL_POLY1305_H
+++#define _CRYPTO_INTERNAL_POLY1305_H
+++
+++#include <asm/unaligned.h>
+++#include <linux/types.h>
+++#include <crypto/poly1305.h>
+++
+++struct shash_desc;
+++
+++/*
+++ * Poly1305 core functions.  These implement the ε-almost-∆-universal hash
+++ * function underlying the Poly1305 MAC, i.e. they don't add an encrypted nonce
+++ * ("s key") at the end.  They also only support block-aligned inputs.
+++ */
+++void poly1305_core_setkey(struct poly1305_key *key, const u8 *raw_key);
+++static inline void poly1305_core_init(struct poly1305_state *state)
+++{
+++	*state = (struct poly1305_state){};
+++}
+++
+++void poly1305_core_blocks(struct poly1305_state *state,
+++			  const struct poly1305_key *key, const void *src,
+++			  unsigned int nblocks, u32 hibit);
+++void poly1305_core_emit(const struct poly1305_state *state, void *dst);
+++
+++/* Crypto API helper functions for the Poly1305 MAC */
+++int crypto_poly1305_init(struct shash_desc *desc);
+++
+++int crypto_poly1305_update(struct shash_desc *desc,
+++			   const u8 *src, unsigned int srclen);
+++int crypto_poly1305_final(struct shash_desc *desc, u8 *dst);
+++
+++/*
+++ * Poly1305 requires a unique key for each tag, which implies that we can't set
+++ * it on the tfm that gets accessed by multiple users simultaneously. Instead we
+++ * expect the key as the first 32 bytes in the update() call.
+++ */
+++static inline
+++unsigned int crypto_poly1305_setdesckey(struct poly1305_desc_ctx *dctx,
+++					const u8 *src, unsigned int srclen)
+++{
+++	if (!dctx->sset) {
+++		if (!dctx->rset && srclen >= POLY1305_BLOCK_SIZE) {
+++			poly1305_core_setkey(&dctx->r, src);
+++			src += POLY1305_BLOCK_SIZE;
+++			srclen -= POLY1305_BLOCK_SIZE;
+++			dctx->rset = true;
+++		}
+++		if (srclen >= POLY1305_BLOCK_SIZE) {
+++			dctx->s[0] = get_unaligned_le32(src +  0);
+++			dctx->s[1] = get_unaligned_le32(src +  4);
+++			dctx->s[2] = get_unaligned_le32(src +  8);
+++			dctx->s[3] = get_unaligned_le32(src + 12);
+++			src += POLY1305_BLOCK_SIZE;
+++			srclen -= POLY1305_BLOCK_SIZE;
+++			dctx->sset = true;
+++		}
+++	}
+++	return srclen;
+++}
+++
+++#endif
++--- a/include/crypto/poly1305.h
+++++ b/include/crypto/poly1305.h
++@@ -38,27 +38,4 @@ struct poly1305_desc_ctx {
++ 	bool sset;
++ };
++ 
++-/*
++- * Poly1305 core functions.  These implement the ε-almost-∆-universal hash
++- * function underlying the Poly1305 MAC, i.e. they don't add an encrypted nonce
++- * ("s key") at the end.  They also only support block-aligned inputs.
++- */
++-void poly1305_core_setkey(struct poly1305_key *key, const u8 *raw_key);
++-static inline void poly1305_core_init(struct poly1305_state *state)
++-{
++-	memset(state->h, 0, sizeof(state->h));
++-}
++-void poly1305_core_blocks(struct poly1305_state *state,
++-			  const struct poly1305_key *key,
++-			  const void *src, unsigned int nblocks);
++-void poly1305_core_emit(const struct poly1305_state *state, void *dst);
++-
++-/* Crypto API helper functions for the Poly1305 MAC */
++-int crypto_poly1305_init(struct shash_desc *desc);
++-unsigned int crypto_poly1305_setdesckey(struct poly1305_desc_ctx *dctx,
++-					const u8 *src, unsigned int srclen);
++-int crypto_poly1305_update(struct shash_desc *desc,
++-			   const u8 *src, unsigned int srclen);
++-int crypto_poly1305_final(struct shash_desc *desc, u8 *dst);
++-
++ #endif
++--- a/lib/crypto/Kconfig
+++++ b/lib/crypto/Kconfig
++@@ -37,5 +37,8 @@ config CRYPTO_LIB_CHACHA
++ config CRYPTO_LIB_DES
++ 	tristate
++ 
+++config CRYPTO_LIB_POLY1305_GENERIC
+++	tristate
+++
++ config CRYPTO_LIB_SHA256
++ 	tristate
++--- a/lib/crypto/Makefile
+++++ b/lib/crypto/Makefile
++@@ -13,5 +13,8 @@ libarc4-y					:= arc4.o
++ obj-$(CONFIG_CRYPTO_LIB_DES)			+= libdes.o
++ libdes-y					:= des.o
++ 
+++obj-$(CONFIG_CRYPTO_LIB_POLY1305_GENERIC)	+= libpoly1305.o
+++libpoly1305-y					:= poly1305.o
+++
++ obj-$(CONFIG_CRYPTO_LIB_SHA256)			+= libsha256.o
++ libsha256-y					:= sha256.o
++--- /dev/null
+++++ b/lib/crypto/poly1305.c
++@@ -0,0 +1,158 @@
+++// SPDX-License-Identifier: GPL-2.0-or-later
+++/*
+++ * Poly1305 authenticator algorithm, RFC7539
+++ *
+++ * Copyright (C) 2015 Martin Willi
+++ *
+++ * Based on public domain code by Andrew Moon and Daniel J. Bernstein.
+++ */
+++
+++#include <crypto/internal/poly1305.h>
+++#include <linux/kernel.h>
+++#include <linux/module.h>
+++#include <asm/unaligned.h>
+++
+++static inline u64 mlt(u64 a, u64 b)
+++{
+++	return a * b;
+++}
+++
+++static inline u32 sr(u64 v, u_char n)
+++{
+++	return v >> n;
+++}
+++
+++static inline u32 and(u32 v, u32 mask)
+++{
+++	return v & mask;
+++}
+++
+++void poly1305_core_setkey(struct poly1305_key *key, const u8 *raw_key)
+++{
+++	/* r &= 0xffffffc0ffffffc0ffffffc0fffffff */
+++	key->r[0] = (get_unaligned_le32(raw_key +  0) >> 0) & 0x3ffffff;
+++	key->r[1] = (get_unaligned_le32(raw_key +  3) >> 2) & 0x3ffff03;
+++	key->r[2] = (get_unaligned_le32(raw_key +  6) >> 4) & 0x3ffc0ff;
+++	key->r[3] = (get_unaligned_le32(raw_key +  9) >> 6) & 0x3f03fff;
+++	key->r[4] = (get_unaligned_le32(raw_key + 12) >> 8) & 0x00fffff;
+++}
+++EXPORT_SYMBOL_GPL(poly1305_core_setkey);
+++
+++void poly1305_core_blocks(struct poly1305_state *state,
+++			  const struct poly1305_key *key, const void *src,
+++			  unsigned int nblocks, u32 hibit)
+++{
+++	u32 r0, r1, r2, r3, r4;
+++	u32 s1, s2, s3, s4;
+++	u32 h0, h1, h2, h3, h4;
+++	u64 d0, d1, d2, d3, d4;
+++
+++	if (!nblocks)
+++		return;
+++
+++	r0 = key->r[0];
+++	r1 = key->r[1];
+++	r2 = key->r[2];
+++	r3 = key->r[3];
+++	r4 = key->r[4];
+++
+++	s1 = r1 * 5;
+++	s2 = r2 * 5;
+++	s3 = r3 * 5;
+++	s4 = r4 * 5;
+++
+++	h0 = state->h[0];
+++	h1 = state->h[1];
+++	h2 = state->h[2];
+++	h3 = state->h[3];
+++	h4 = state->h[4];
+++
+++	do {
+++		/* h += m[i] */
+++		h0 += (get_unaligned_le32(src +  0) >> 0) & 0x3ffffff;
+++		h1 += (get_unaligned_le32(src +  3) >> 2) & 0x3ffffff;
+++		h2 += (get_unaligned_le32(src +  6) >> 4) & 0x3ffffff;
+++		h3 += (get_unaligned_le32(src +  9) >> 6) & 0x3ffffff;
+++		h4 += (get_unaligned_le32(src + 12) >> 8) | (hibit << 24);
+++
+++		/* h *= r */
+++		d0 = mlt(h0, r0) + mlt(h1, s4) + mlt(h2, s3) +
+++		     mlt(h3, s2) + mlt(h4, s1);
+++		d1 = mlt(h0, r1) + mlt(h1, r0) + mlt(h2, s4) +
+++		     mlt(h3, s3) + mlt(h4, s2);
+++		d2 = mlt(h0, r2) + mlt(h1, r1) + mlt(h2, r0) +
+++		     mlt(h3, s4) + mlt(h4, s3);
+++		d3 = mlt(h0, r3) + mlt(h1, r2) + mlt(h2, r1) +
+++		     mlt(h3, r0) + mlt(h4, s4);
+++		d4 = mlt(h0, r4) + mlt(h1, r3) + mlt(h2, r2) +
+++		     mlt(h3, r1) + mlt(h4, r0);
+++
+++		/* (partial) h %= p */
+++		d1 += sr(d0, 26);     h0 = and(d0, 0x3ffffff);
+++		d2 += sr(d1, 26);     h1 = and(d1, 0x3ffffff);
+++		d3 += sr(d2, 26);     h2 = and(d2, 0x3ffffff);
+++		d4 += sr(d3, 26);     h3 = and(d3, 0x3ffffff);
+++		h0 += sr(d4, 26) * 5; h4 = and(d4, 0x3ffffff);
+++		h1 += h0 >> 26;       h0 = h0 & 0x3ffffff;
+++
+++		src += POLY1305_BLOCK_SIZE;
+++	} while (--nblocks);
+++
+++	state->h[0] = h0;
+++	state->h[1] = h1;
+++	state->h[2] = h2;
+++	state->h[3] = h3;
+++	state->h[4] = h4;
+++}
+++EXPORT_SYMBOL_GPL(poly1305_core_blocks);
+++
+++void poly1305_core_emit(const struct poly1305_state *state, void *dst)
+++{
+++	u32 h0, h1, h2, h3, h4;
+++	u32 g0, g1, g2, g3, g4;
+++	u32 mask;
+++
+++	/* fully carry h */
+++	h0 = state->h[0];
+++	h1 = state->h[1];
+++	h2 = state->h[2];
+++	h3 = state->h[3];
+++	h4 = state->h[4];
+++
+++	h2 += (h1 >> 26);     h1 = h1 & 0x3ffffff;
+++	h3 += (h2 >> 26);     h2 = h2 & 0x3ffffff;
+++	h4 += (h3 >> 26);     h3 = h3 & 0x3ffffff;
+++	h0 += (h4 >> 26) * 5; h4 = h4 & 0x3ffffff;
+++	h1 += (h0 >> 26);     h0 = h0 & 0x3ffffff;
+++
+++	/* compute h + -p */
+++	g0 = h0 + 5;
+++	g1 = h1 + (g0 >> 26);             g0 &= 0x3ffffff;
+++	g2 = h2 + (g1 >> 26);             g1 &= 0x3ffffff;
+++	g3 = h3 + (g2 >> 26);             g2 &= 0x3ffffff;
+++	g4 = h4 + (g3 >> 26) - (1 << 26); g3 &= 0x3ffffff;
+++
+++	/* select h if h < p, or h + -p if h >= p */
+++	mask = (g4 >> ((sizeof(u32) * 8) - 1)) - 1;
+++	g0 &= mask;
+++	g1 &= mask;
+++	g2 &= mask;
+++	g3 &= mask;
+++	g4 &= mask;
+++	mask = ~mask;
+++	h0 = (h0 & mask) | g0;
+++	h1 = (h1 & mask) | g1;
+++	h2 = (h2 & mask) | g2;
+++	h3 = (h3 & mask) | g3;
+++	h4 = (h4 & mask) | g4;
+++
+++	/* h = h % (2^128) */
+++	put_unaligned_le32((h0 >>  0) | (h1 << 26), dst +  0);
+++	put_unaligned_le32((h1 >>  6) | (h2 << 20), dst +  4);
+++	put_unaligned_le32((h2 >> 12) | (h3 << 14), dst +  8);
+++	put_unaligned_le32((h3 >> 18) | (h4 <<  8), dst + 12);
+++}
+++EXPORT_SYMBOL_GPL(poly1305_core_emit);
+++
+++MODULE_LICENSE("GPL");
+++MODULE_AUTHOR("Martin Willi <martin@strongswan.org>");
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0014-crypto-x86-poly1305-unify-Poly1305-state-struct-with.patch b/target/linux/generic/backport-5.4/080-wireguard-0014-crypto-x86-poly1305-unify-Poly1305-state-struct-with.patch
+new file mode 100644
+index 0000000000..7d237549b0
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0014-crypto-x86-poly1305-unify-Poly1305-state-struct-with.patch
+@@ -0,0 +1,251 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:20 +0100
++Subject: [PATCH] crypto: x86/poly1305 - unify Poly1305 state struct with
++ generic code
++
++commit ad8f5b88383ea685f2b8df2a12ee3e08089a1287 upstream.
++
++In preparation of exposing a Poly1305 library interface directly from
++the accelerated x86 driver, align the state descriptor of the x86 code
++with the one used by the generic driver. This is needed to make the
++library interface unified between all implementations.
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/poly1305_glue.c    | 88 ++++++++++--------------------
++ crypto/poly1305_generic.c          |  6 +-
++ include/crypto/internal/poly1305.h |  4 +-
++ include/crypto/poly1305.h          | 18 +++---
++ 4 files changed, 43 insertions(+), 73 deletions(-)
++
++--- a/arch/x86/crypto/poly1305_glue.c
+++++ b/arch/x86/crypto/poly1305_glue.c
++@@ -14,40 +14,14 @@
++ #include <linux/module.h>
++ #include <asm/simd.h>
++ 
++-struct poly1305_simd_desc_ctx {
++-	struct poly1305_desc_ctx base;
++-	/* derived key u set? */
++-	bool uset;
++-#ifdef CONFIG_AS_AVX2
++-	/* derived keys r^3, r^4 set? */
++-	bool wset;
++-#endif
++-	/* derived Poly1305 key r^2 */
++-	u32 u[5];
++-	/* ... silently appended r^3 and r^4 when using AVX2 */
++-};
++-
++ asmlinkage void poly1305_block_sse2(u32 *h, const u8 *src,
++ 				    const u32 *r, unsigned int blocks);
++ asmlinkage void poly1305_2block_sse2(u32 *h, const u8 *src, const u32 *r,
++ 				     unsigned int blocks, const u32 *u);
++-#ifdef CONFIG_AS_AVX2
++ asmlinkage void poly1305_4block_avx2(u32 *h, const u8 *src, const u32 *r,
++ 				     unsigned int blocks, const u32 *u);
++-static bool poly1305_use_avx2;
++-#endif
++ 
++-static int poly1305_simd_init(struct shash_desc *desc)
++-{
++-	struct poly1305_simd_desc_ctx *sctx = shash_desc_ctx(desc);
++-
++-	sctx->uset = false;
++-#ifdef CONFIG_AS_AVX2
++-	sctx->wset = false;
++-#endif
++-
++-	return crypto_poly1305_init(desc);
++-}
+++static bool poly1305_use_avx2 __ro_after_init;
++ 
++ static void poly1305_simd_mult(u32 *a, const u32 *b)
++ {
++@@ -63,53 +37,49 @@ static void poly1305_simd_mult(u32 *a, c
++ static unsigned int poly1305_simd_blocks(struct poly1305_desc_ctx *dctx,
++ 					 const u8 *src, unsigned int srclen)
++ {
++-	struct poly1305_simd_desc_ctx *sctx;
++ 	unsigned int blocks, datalen;
++ 
++-	BUILD_BUG_ON(offsetof(struct poly1305_simd_desc_ctx, base));
++-	sctx = container_of(dctx, struct poly1305_simd_desc_ctx, base);
++-
++ 	if (unlikely(!dctx->sset)) {
++ 		datalen = crypto_poly1305_setdesckey(dctx, src, srclen);
++ 		src += srclen - datalen;
++ 		srclen = datalen;
++ 	}
++ 
++-#ifdef CONFIG_AS_AVX2
++-	if (poly1305_use_avx2 && srclen >= POLY1305_BLOCK_SIZE * 4) {
++-		if (unlikely(!sctx->wset)) {
++-			if (!sctx->uset) {
++-				memcpy(sctx->u, dctx->r.r, sizeof(sctx->u));
++-				poly1305_simd_mult(sctx->u, dctx->r.r);
++-				sctx->uset = true;
+++	if (IS_ENABLED(CONFIG_AS_AVX2) &&
+++	    poly1305_use_avx2 &&
+++	    srclen >= POLY1305_BLOCK_SIZE * 4) {
+++		if (unlikely(dctx->rset < 4)) {
+++			if (dctx->rset < 2) {
+++				dctx->r[1] = dctx->r[0];
+++				poly1305_simd_mult(dctx->r[1].r, dctx->r[0].r);
++ 			}
++-			memcpy(sctx->u + 5, sctx->u, sizeof(sctx->u));
++-			poly1305_simd_mult(sctx->u + 5, dctx->r.r);
++-			memcpy(sctx->u + 10, sctx->u + 5, sizeof(sctx->u));
++-			poly1305_simd_mult(sctx->u + 10, dctx->r.r);
++-			sctx->wset = true;
+++			dctx->r[2] = dctx->r[1];
+++			poly1305_simd_mult(dctx->r[2].r, dctx->r[0].r);
+++			dctx->r[3] = dctx->r[2];
+++			poly1305_simd_mult(dctx->r[3].r, dctx->r[0].r);
+++			dctx->rset = 4;
++ 		}
++ 		blocks = srclen / (POLY1305_BLOCK_SIZE * 4);
++-		poly1305_4block_avx2(dctx->h.h, src, dctx->r.r, blocks,
++-				     sctx->u);
+++		poly1305_4block_avx2(dctx->h.h, src, dctx->r[0].r, blocks,
+++				     dctx->r[1].r);
++ 		src += POLY1305_BLOCK_SIZE * 4 * blocks;
++ 		srclen -= POLY1305_BLOCK_SIZE * 4 * blocks;
++ 	}
++-#endif
+++
++ 	if (likely(srclen >= POLY1305_BLOCK_SIZE * 2)) {
++-		if (unlikely(!sctx->uset)) {
++-			memcpy(sctx->u, dctx->r.r, sizeof(sctx->u));
++-			poly1305_simd_mult(sctx->u, dctx->r.r);
++-			sctx->uset = true;
+++		if (unlikely(dctx->rset < 2)) {
+++			dctx->r[1] = dctx->r[0];
+++			poly1305_simd_mult(dctx->r[1].r, dctx->r[0].r);
+++			dctx->rset = 2;
++ 		}
++ 		blocks = srclen / (POLY1305_BLOCK_SIZE * 2);
++-		poly1305_2block_sse2(dctx->h.h, src, dctx->r.r, blocks,
++-				     sctx->u);
+++		poly1305_2block_sse2(dctx->h.h, src, dctx->r[0].r,
+++				     blocks, dctx->r[1].r);
++ 		src += POLY1305_BLOCK_SIZE * 2 * blocks;
++ 		srclen -= POLY1305_BLOCK_SIZE * 2 * blocks;
++ 	}
++ 	if (srclen >= POLY1305_BLOCK_SIZE) {
++-		poly1305_block_sse2(dctx->h.h, src, dctx->r.r, 1);
+++		poly1305_block_sse2(dctx->h.h, src, dctx->r[0].r, 1);
++ 		srclen -= POLY1305_BLOCK_SIZE;
++ 	}
++ 	return srclen;
++@@ -159,10 +129,10 @@ static int poly1305_simd_update(struct s
++ 
++ static struct shash_alg alg = {
++ 	.digestsize	= POLY1305_DIGEST_SIZE,
++-	.init		= poly1305_simd_init,
+++	.init		= crypto_poly1305_init,
++ 	.update		= poly1305_simd_update,
++ 	.final		= crypto_poly1305_final,
++-	.descsize	= sizeof(struct poly1305_simd_desc_ctx),
+++	.descsize	= sizeof(struct poly1305_desc_ctx),
++ 	.base		= {
++ 		.cra_name		= "poly1305",
++ 		.cra_driver_name	= "poly1305-simd",
++@@ -177,14 +147,14 @@ static int __init poly1305_simd_mod_init
++ 	if (!boot_cpu_has(X86_FEATURE_XMM2))
++ 		return -ENODEV;
++ 
++-#ifdef CONFIG_AS_AVX2
++-	poly1305_use_avx2 = boot_cpu_has(X86_FEATURE_AVX) &&
+++	poly1305_use_avx2 = IS_ENABLED(CONFIG_AS_AVX2) &&
+++			    boot_cpu_has(X86_FEATURE_AVX) &&
++ 			    boot_cpu_has(X86_FEATURE_AVX2) &&
++ 			    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL);
++-	alg.descsize = sizeof(struct poly1305_simd_desc_ctx);
+++	alg.descsize = sizeof(struct poly1305_desc_ctx) + 5 * sizeof(u32);
++ 	if (poly1305_use_avx2)
++ 		alg.descsize += 10 * sizeof(u32);
++-#endif
+++
++ 	return crypto_register_shash(&alg);
++ }
++ 
++--- a/crypto/poly1305_generic.c
+++++ b/crypto/poly1305_generic.c
++@@ -25,7 +25,7 @@ int crypto_poly1305_init(struct shash_de
++ 
++ 	poly1305_core_init(&dctx->h);
++ 	dctx->buflen = 0;
++-	dctx->rset = false;
+++	dctx->rset = 0;
++ 	dctx->sset = false;
++ 
++ 	return 0;
++@@ -43,7 +43,7 @@ static void poly1305_blocks(struct poly1
++ 		srclen = datalen;
++ 	}
++ 
++-	poly1305_core_blocks(&dctx->h, &dctx->r, src,
+++	poly1305_core_blocks(&dctx->h, dctx->r, src,
++ 			     srclen / POLY1305_BLOCK_SIZE, 1);
++ }
++ 
++@@ -95,7 +95,7 @@ int crypto_poly1305_final(struct shash_d
++ 		dctx->buf[dctx->buflen++] = 1;
++ 		memset(dctx->buf + dctx->buflen, 0,
++ 		       POLY1305_BLOCK_SIZE - dctx->buflen);
++-		poly1305_core_blocks(&dctx->h, &dctx->r, dctx->buf, 1, 0);
+++		poly1305_core_blocks(&dctx->h, dctx->r, dctx->buf, 1, 0);
++ 	}
++ 
++ 	poly1305_core_emit(&dctx->h, digest);
++--- a/include/crypto/internal/poly1305.h
+++++ b/include/crypto/internal/poly1305.h
++@@ -46,10 +46,10 @@ unsigned int crypto_poly1305_setdesckey(
++ {
++ 	if (!dctx->sset) {
++ 		if (!dctx->rset && srclen >= POLY1305_BLOCK_SIZE) {
++-			poly1305_core_setkey(&dctx->r, src);
+++			poly1305_core_setkey(dctx->r, src);
++ 			src += POLY1305_BLOCK_SIZE;
++ 			srclen -= POLY1305_BLOCK_SIZE;
++-			dctx->rset = true;
+++			dctx->rset = 1;
++ 		}
++ 		if (srclen >= POLY1305_BLOCK_SIZE) {
++ 			dctx->s[0] = get_unaligned_le32(src +  0);
++--- a/include/crypto/poly1305.h
+++++ b/include/crypto/poly1305.h
++@@ -22,20 +22,20 @@ struct poly1305_state {
++ };
++ 
++ struct poly1305_desc_ctx {
++-	/* key */
++-	struct poly1305_key r;
++-	/* finalize key */
++-	u32 s[4];
++-	/* accumulator */
++-	struct poly1305_state h;
++ 	/* partial buffer */
++ 	u8 buf[POLY1305_BLOCK_SIZE];
++ 	/* bytes used in partial buffer */
++ 	unsigned int buflen;
++-	/* r key has been set */
++-	bool rset;
++-	/* s key has been set */
+++	/* how many keys have been set in r[] */
+++	unsigned short rset;
+++	/* whether s[] has been set */
++ 	bool sset;
+++	/* finalize key */
+++	u32 s[4];
+++	/* accumulator */
+++	struct poly1305_state h;
+++	/* key */
+++	struct poly1305_key r[1];
++ };
++ 
++ #endif
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0015-crypto-poly1305-expose-init-update-final-library-int.patch b/target/linux/generic/backport-5.4/080-wireguard-0015-crypto-poly1305-expose-init-update-final-library-int.patch
+new file mode 100644
+index 0000000000..bf8e90bf02
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0015-crypto-poly1305-expose-init-update-final-library-int.patch
+@@ -0,0 +1,224 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:21 +0100
++Subject: [PATCH] crypto: poly1305 - expose init/update/final library interface
++
++commit a1d93064094cc5e24d64e35cf093e7191d0c9344 upstream.
++
++Expose the existing generic Poly1305 code via a init/update/final
++library interface so that callers are not required to go through
++the crypto API's shash abstraction to access it. At the same time,
++make some preparations so that the library implementation can be
++superseded by an accelerated arch-specific version in the future.
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ crypto/poly1305_generic.c | 22 +-----------
++ include/crypto/poly1305.h | 38 +++++++++++++++++++-
++ lib/crypto/Kconfig        | 26 ++++++++++++++
++ lib/crypto/poly1305.c     | 74 +++++++++++++++++++++++++++++++++++++++
++ 4 files changed, 138 insertions(+), 22 deletions(-)
++
++--- a/crypto/poly1305_generic.c
+++++ b/crypto/poly1305_generic.c
++@@ -85,31 +85,11 @@ EXPORT_SYMBOL_GPL(crypto_poly1305_update
++ int crypto_poly1305_final(struct shash_desc *desc, u8 *dst)
++ {
++ 	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
++-	__le32 digest[4];
++-	u64 f = 0;
++ 
++ 	if (unlikely(!dctx->sset))
++ 		return -ENOKEY;
++ 
++-	if (unlikely(dctx->buflen)) {
++-		dctx->buf[dctx->buflen++] = 1;
++-		memset(dctx->buf + dctx->buflen, 0,
++-		       POLY1305_BLOCK_SIZE - dctx->buflen);
++-		poly1305_core_blocks(&dctx->h, dctx->r, dctx->buf, 1, 0);
++-	}
++-
++-	poly1305_core_emit(&dctx->h, digest);
++-
++-	/* mac = (h + s) % (2^128) */
++-	f = (f >> 32) + le32_to_cpu(digest[0]) + dctx->s[0];
++-	put_unaligned_le32(f, dst + 0);
++-	f = (f >> 32) + le32_to_cpu(digest[1]) + dctx->s[1];
++-	put_unaligned_le32(f, dst + 4);
++-	f = (f >> 32) + le32_to_cpu(digest[2]) + dctx->s[2];
++-	put_unaligned_le32(f, dst + 8);
++-	f = (f >> 32) + le32_to_cpu(digest[3]) + dctx->s[3];
++-	put_unaligned_le32(f, dst + 12);
++-
+++	poly1305_final_generic(dctx, dst);
++ 	return 0;
++ }
++ EXPORT_SYMBOL_GPL(crypto_poly1305_final);
++--- a/include/crypto/poly1305.h
+++++ b/include/crypto/poly1305.h
++@@ -35,7 +35,43 @@ struct poly1305_desc_ctx {
++ 	/* accumulator */
++ 	struct poly1305_state h;
++ 	/* key */
++-	struct poly1305_key r[1];
+++	struct poly1305_key r[CONFIG_CRYPTO_LIB_POLY1305_RSIZE];
++ };
++ 
+++void poly1305_init_arch(struct poly1305_desc_ctx *desc, const u8 *key);
+++void poly1305_init_generic(struct poly1305_desc_ctx *desc, const u8 *key);
+++
+++static inline void poly1305_init(struct poly1305_desc_ctx *desc, const u8 *key)
+++{
+++	if (IS_ENABLED(CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305))
+++		poly1305_init_arch(desc, key);
+++	else
+++		poly1305_init_generic(desc, key);
+++}
+++
+++void poly1305_update_arch(struct poly1305_desc_ctx *desc, const u8 *src,
+++			  unsigned int nbytes);
+++void poly1305_update_generic(struct poly1305_desc_ctx *desc, const u8 *src,
+++			     unsigned int nbytes);
+++
+++static inline void poly1305_update(struct poly1305_desc_ctx *desc,
+++				   const u8 *src, unsigned int nbytes)
+++{
+++	if (IS_ENABLED(CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305))
+++		poly1305_update_arch(desc, src, nbytes);
+++	else
+++		poly1305_update_generic(desc, src, nbytes);
+++}
+++
+++void poly1305_final_arch(struct poly1305_desc_ctx *desc, u8 *digest);
+++void poly1305_final_generic(struct poly1305_desc_ctx *desc, u8 *digest);
+++
+++static inline void poly1305_final(struct poly1305_desc_ctx *desc, u8 *digest)
+++{
+++	if (IS_ENABLED(CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305))
+++		poly1305_final_arch(desc, digest);
+++	else
+++		poly1305_final_generic(desc, digest);
+++}
+++
++ #endif
++--- a/lib/crypto/Kconfig
+++++ b/lib/crypto/Kconfig
++@@ -37,8 +37,34 @@ config CRYPTO_LIB_CHACHA
++ config CRYPTO_LIB_DES
++ 	tristate
++ 
+++config CRYPTO_LIB_POLY1305_RSIZE
+++	int
+++	default 1
+++
+++config CRYPTO_ARCH_HAVE_LIB_POLY1305
+++	tristate
+++	help
+++	  Declares whether the architecture provides an arch-specific
+++	  accelerated implementation of the Poly1305 library interface,
+++	  either builtin or as a module.
+++
++ config CRYPTO_LIB_POLY1305_GENERIC
++ 	tristate
+++	help
+++	  This symbol can be depended upon by arch implementations of the
+++	  Poly1305 library interface that require the generic code as a
+++	  fallback, e.g., for SIMD implementations. If no arch specific
+++	  implementation is enabled, this implementation serves the users
+++	  of CRYPTO_LIB_POLY1305.
+++
+++config CRYPTO_LIB_POLY1305
+++	tristate "Poly1305 library interface"
+++	depends on CRYPTO_ARCH_HAVE_LIB_POLY1305 || !CRYPTO_ARCH_HAVE_LIB_POLY1305
+++	select CRYPTO_LIB_POLY1305_GENERIC if CRYPTO_ARCH_HAVE_LIB_POLY1305=n
+++	help
+++	  Enable the Poly1305 library interface. This interface may be fulfilled
+++	  by either the generic implementation or an arch-specific one, if one
+++	  is available and enabled.
++ 
++ config CRYPTO_LIB_SHA256
++ 	tristate
++--- a/lib/crypto/poly1305.c
+++++ b/lib/crypto/poly1305.c
++@@ -154,5 +154,79 @@ void poly1305_core_emit(const struct pol
++ }
++ EXPORT_SYMBOL_GPL(poly1305_core_emit);
++ 
+++void poly1305_init_generic(struct poly1305_desc_ctx *desc, const u8 *key)
+++{
+++	poly1305_core_setkey(desc->r, key);
+++	desc->s[0] = get_unaligned_le32(key + 16);
+++	desc->s[1] = get_unaligned_le32(key + 20);
+++	desc->s[2] = get_unaligned_le32(key + 24);
+++	desc->s[3] = get_unaligned_le32(key + 28);
+++	poly1305_core_init(&desc->h);
+++	desc->buflen = 0;
+++	desc->sset = true;
+++	desc->rset = 1;
+++}
+++EXPORT_SYMBOL_GPL(poly1305_init_generic);
+++
+++void poly1305_update_generic(struct poly1305_desc_ctx *desc, const u8 *src,
+++			     unsigned int nbytes)
+++{
+++	unsigned int bytes;
+++
+++	if (unlikely(desc->buflen)) {
+++		bytes = min(nbytes, POLY1305_BLOCK_SIZE - desc->buflen);
+++		memcpy(desc->buf + desc->buflen, src, bytes);
+++		src += bytes;
+++		nbytes -= bytes;
+++		desc->buflen += bytes;
+++
+++		if (desc->buflen == POLY1305_BLOCK_SIZE) {
+++			poly1305_core_blocks(&desc->h, desc->r, desc->buf, 1, 1);
+++			desc->buflen = 0;
+++		}
+++	}
+++
+++	if (likely(nbytes >= POLY1305_BLOCK_SIZE)) {
+++		poly1305_core_blocks(&desc->h, desc->r, src,
+++				     nbytes / POLY1305_BLOCK_SIZE, 1);
+++		src += nbytes - (nbytes % POLY1305_BLOCK_SIZE);
+++		nbytes %= POLY1305_BLOCK_SIZE;
+++	}
+++
+++	if (unlikely(nbytes)) {
+++		desc->buflen = nbytes;
+++		memcpy(desc->buf, src, nbytes);
+++	}
+++}
+++EXPORT_SYMBOL_GPL(poly1305_update_generic);
+++
+++void poly1305_final_generic(struct poly1305_desc_ctx *desc, u8 *dst)
+++{
+++	__le32 digest[4];
+++	u64 f = 0;
+++
+++	if (unlikely(desc->buflen)) {
+++		desc->buf[desc->buflen++] = 1;
+++		memset(desc->buf + desc->buflen, 0,
+++		       POLY1305_BLOCK_SIZE - desc->buflen);
+++		poly1305_core_blocks(&desc->h, desc->r, desc->buf, 1, 0);
+++	}
+++
+++	poly1305_core_emit(&desc->h, digest);
+++
+++	/* mac = (h + s) % (2^128) */
+++	f = (f >> 32) + le32_to_cpu(digest[0]) + desc->s[0];
+++	put_unaligned_le32(f, dst + 0);
+++	f = (f >> 32) + le32_to_cpu(digest[1]) + desc->s[1];
+++	put_unaligned_le32(f, dst + 4);
+++	f = (f >> 32) + le32_to_cpu(digest[2]) + desc->s[2];
+++	put_unaligned_le32(f, dst + 8);
+++	f = (f >> 32) + le32_to_cpu(digest[3]) + desc->s[3];
+++	put_unaligned_le32(f, dst + 12);
+++
+++	*desc = (struct poly1305_desc_ctx){};
+++}
+++EXPORT_SYMBOL_GPL(poly1305_final_generic);
+++
++ MODULE_LICENSE("GPL");
++ MODULE_AUTHOR("Martin Willi <martin@strongswan.org>");
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0016-crypto-x86-poly1305-depend-on-generic-library-not-ge.patch b/target/linux/generic/backport-5.4/080-wireguard-0016-crypto-x86-poly1305-depend-on-generic-library-not-ge.patch
+new file mode 100644
+index 0000000000..8ea63f3b91
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0016-crypto-x86-poly1305-depend-on-generic-library-not-ge.patch
+@@ -0,0 +1,217 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:22 +0100
++Subject: [PATCH] crypto: x86/poly1305 - depend on generic library not generic
++ shash
++
++commit 1b2c6a5120489d41c8ea3b8dacd0b4586289b158 upstream.
++
++Remove the dependency on the generic Poly1305 driver. Instead, depend
++on the generic library so that we only reuse code without pulling in
++the generic skcipher implementation as well.
++
++While at it, remove the logic that prefers the non-SIMD path for short
++inputs - this is no longer necessary after recent FPU handling changes
++on x86.
++
++Since this removes the last remaining user of the routines exported
++by the generic shash driver, unexport them and make them static.
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/poly1305_glue.c    | 66 +++++++++++++++++++++++++-----
++ crypto/Kconfig                     |  2 +-
++ crypto/poly1305_generic.c          | 11 ++---
++ include/crypto/internal/poly1305.h |  9 ----
++ 4 files changed, 60 insertions(+), 28 deletions(-)
++
++--- a/arch/x86/crypto/poly1305_glue.c
+++++ b/arch/x86/crypto/poly1305_glue.c
++@@ -34,6 +34,24 @@ static void poly1305_simd_mult(u32 *a, c
++ 	poly1305_block_sse2(a, m, b, 1);
++ }
++ 
+++static unsigned int poly1305_scalar_blocks(struct poly1305_desc_ctx *dctx,
+++					   const u8 *src, unsigned int srclen)
+++{
+++	unsigned int datalen;
+++
+++	if (unlikely(!dctx->sset)) {
+++		datalen = crypto_poly1305_setdesckey(dctx, src, srclen);
+++		src += srclen - datalen;
+++		srclen = datalen;
+++	}
+++	if (srclen >= POLY1305_BLOCK_SIZE) {
+++		poly1305_core_blocks(&dctx->h, dctx->r, src,
+++				     srclen / POLY1305_BLOCK_SIZE, 1);
+++		srclen %= POLY1305_BLOCK_SIZE;
+++	}
+++	return srclen;
+++}
+++
++ static unsigned int poly1305_simd_blocks(struct poly1305_desc_ctx *dctx,
++ 					 const u8 *src, unsigned int srclen)
++ {
++@@ -91,12 +109,6 @@ static int poly1305_simd_update(struct s
++ 	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
++ 	unsigned int bytes;
++ 
++-	/* kernel_fpu_begin/end is costly, use fallback for small updates */
++-	if (srclen <= 288 || !crypto_simd_usable())
++-		return crypto_poly1305_update(desc, src, srclen);
++-
++-	kernel_fpu_begin();
++-
++ 	if (unlikely(dctx->buflen)) {
++ 		bytes = min(srclen, POLY1305_BLOCK_SIZE - dctx->buflen);
++ 		memcpy(dctx->buf + dctx->buflen, src, bytes);
++@@ -105,25 +117,57 @@ static int poly1305_simd_update(struct s
++ 		dctx->buflen += bytes;
++ 
++ 		if (dctx->buflen == POLY1305_BLOCK_SIZE) {
++-			poly1305_simd_blocks(dctx, dctx->buf,
++-					     POLY1305_BLOCK_SIZE);
+++			if (likely(crypto_simd_usable())) {
+++				kernel_fpu_begin();
+++				poly1305_simd_blocks(dctx, dctx->buf,
+++						     POLY1305_BLOCK_SIZE);
+++				kernel_fpu_end();
+++			} else {
+++				poly1305_scalar_blocks(dctx, dctx->buf,
+++						       POLY1305_BLOCK_SIZE);
+++			}
++ 			dctx->buflen = 0;
++ 		}
++ 	}
++ 
++ 	if (likely(srclen >= POLY1305_BLOCK_SIZE)) {
++-		bytes = poly1305_simd_blocks(dctx, src, srclen);
+++		if (likely(crypto_simd_usable())) {
+++			kernel_fpu_begin();
+++			bytes = poly1305_simd_blocks(dctx, src, srclen);
+++			kernel_fpu_end();
+++		} else {
+++			bytes = poly1305_scalar_blocks(dctx, src, srclen);
+++		}
++ 		src += srclen - bytes;
++ 		srclen = bytes;
++ 	}
++ 
++-	kernel_fpu_end();
++-
++ 	if (unlikely(srclen)) {
++ 		dctx->buflen = srclen;
++ 		memcpy(dctx->buf, src, srclen);
++ 	}
+++}
+++
+++static int crypto_poly1305_init(struct shash_desc *desc)
+++{
+++	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
+++
+++	poly1305_core_init(&dctx->h);
+++	dctx->buflen = 0;
+++	dctx->rset = 0;
+++	dctx->sset = false;
+++
+++	return 0;
+++}
+++
+++static int crypto_poly1305_final(struct shash_desc *desc, u8 *dst)
+++{
+++	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
+++
+++	if (unlikely(!dctx->sset))
+++		return -ENOKEY;
++ 
+++	poly1305_final_generic(dctx, dst);
++ 	return 0;
++ }
++ 
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -697,7 +697,7 @@ config CRYPTO_POLY1305
++ config CRYPTO_POLY1305_X86_64
++ 	tristate "Poly1305 authenticator algorithm (x86_64/SSE2/AVX2)"
++ 	depends on X86 && 64BIT
++-	select CRYPTO_POLY1305
+++	select CRYPTO_LIB_POLY1305_GENERIC
++ 	help
++ 	  Poly1305 authenticator algorithm, RFC7539.
++ 
++--- a/crypto/poly1305_generic.c
+++++ b/crypto/poly1305_generic.c
++@@ -19,7 +19,7 @@
++ #include <linux/module.h>
++ #include <asm/unaligned.h>
++ 
++-int crypto_poly1305_init(struct shash_desc *desc)
+++static int crypto_poly1305_init(struct shash_desc *desc)
++ {
++ 	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
++ 
++@@ -30,7 +30,6 @@ int crypto_poly1305_init(struct shash_de
++ 
++ 	return 0;
++ }
++-EXPORT_SYMBOL_GPL(crypto_poly1305_init);
++ 
++ static void poly1305_blocks(struct poly1305_desc_ctx *dctx, const u8 *src,
++ 			    unsigned int srclen)
++@@ -47,8 +46,8 @@ static void poly1305_blocks(struct poly1
++ 			     srclen / POLY1305_BLOCK_SIZE, 1);
++ }
++ 
++-int crypto_poly1305_update(struct shash_desc *desc,
++-			   const u8 *src, unsigned int srclen)
+++static int crypto_poly1305_update(struct shash_desc *desc,
+++				  const u8 *src, unsigned int srclen)
++ {
++ 	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
++ 	unsigned int bytes;
++@@ -80,9 +79,8 @@ int crypto_poly1305_update(struct shash_
++ 
++ 	return 0;
++ }
++-EXPORT_SYMBOL_GPL(crypto_poly1305_update);
++ 
++-int crypto_poly1305_final(struct shash_desc *desc, u8 *dst)
+++static int crypto_poly1305_final(struct shash_desc *desc, u8 *dst)
++ {
++ 	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
++ 
++@@ -92,7 +90,6 @@ int crypto_poly1305_final(struct shash_d
++ 	poly1305_final_generic(dctx, dst);
++ 	return 0;
++ }
++-EXPORT_SYMBOL_GPL(crypto_poly1305_final);
++ 
++ static struct shash_alg poly1305_alg = {
++ 	.digestsize	= POLY1305_DIGEST_SIZE,
++--- a/include/crypto/internal/poly1305.h
+++++ b/include/crypto/internal/poly1305.h
++@@ -10,8 +10,6 @@
++ #include <linux/types.h>
++ #include <crypto/poly1305.h>
++ 
++-struct shash_desc;
++-
++ /*
++  * Poly1305 core functions.  These implement the ε-almost-∆-universal hash
++  * function underlying the Poly1305 MAC, i.e. they don't add an encrypted nonce
++@@ -28,13 +26,6 @@ void poly1305_core_blocks(struct poly130
++ 			  unsigned int nblocks, u32 hibit);
++ void poly1305_core_emit(const struct poly1305_state *state, void *dst);
++ 
++-/* Crypto API helper functions for the Poly1305 MAC */
++-int crypto_poly1305_init(struct shash_desc *desc);
++-
++-int crypto_poly1305_update(struct shash_desc *desc,
++-			   const u8 *src, unsigned int srclen);
++-int crypto_poly1305_final(struct shash_desc *desc, u8 *dst);
++-
++ /*
++  * Poly1305 requires a unique key for each tag, which implies that we can't set
++  * it on the tfm that gets accessed by multiple users simultaneously. Instead we
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0017-crypto-x86-poly1305-expose-existing-driver-as-poly13.patch b/target/linux/generic/backport-5.4/080-wireguard-0017-crypto-x86-poly1305-expose-existing-driver-as-poly13.patch
+new file mode 100644
+index 0000000000..6514987b4d
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0017-crypto-x86-poly1305-expose-existing-driver-as-poly13.patch
+@@ -0,0 +1,163 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:23 +0100
++Subject: [PATCH] crypto: x86/poly1305 - expose existing driver as poly1305
++ library
++
++commit f0e89bcfbb894e5844cd1bbf6b3cf7c63cb0f5ac upstream.
++
++Implement the arch init/update/final Poly1305 library routines in the
++accelerated SIMD driver for x86 so they are accessible to users of
++the Poly1305 library interface as well.
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/poly1305_glue.c | 57 ++++++++++++++++++++++++---------
++ crypto/Kconfig                  |  1 +
++ lib/crypto/Kconfig              |  1 +
++ 3 files changed, 43 insertions(+), 16 deletions(-)
++
++--- a/arch/x86/crypto/poly1305_glue.c
+++++ b/arch/x86/crypto/poly1305_glue.c
++@@ -10,6 +10,7 @@
++ #include <crypto/internal/poly1305.h>
++ #include <crypto/internal/simd.h>
++ #include <linux/crypto.h>
+++#include <linux/jump_label.h>
++ #include <linux/kernel.h>
++ #include <linux/module.h>
++ #include <asm/simd.h>
++@@ -21,7 +22,8 @@ asmlinkage void poly1305_2block_sse2(u32
++ asmlinkage void poly1305_4block_avx2(u32 *h, const u8 *src, const u32 *r,
++ 				     unsigned int blocks, const u32 *u);
++ 
++-static bool poly1305_use_avx2 __ro_after_init;
+++static __ro_after_init DEFINE_STATIC_KEY_FALSE(poly1305_use_simd);
+++static __ro_after_init DEFINE_STATIC_KEY_FALSE(poly1305_use_avx2);
++ 
++ static void poly1305_simd_mult(u32 *a, const u32 *b)
++ {
++@@ -64,7 +66,7 @@ static unsigned int poly1305_simd_blocks
++ 	}
++ 
++ 	if (IS_ENABLED(CONFIG_AS_AVX2) &&
++-	    poly1305_use_avx2 &&
+++	    static_branch_likely(&poly1305_use_avx2) &&
++ 	    srclen >= POLY1305_BLOCK_SIZE * 4) {
++ 		if (unlikely(dctx->rset < 4)) {
++ 			if (dctx->rset < 2) {
++@@ -103,10 +105,15 @@ static unsigned int poly1305_simd_blocks
++ 	return srclen;
++ }
++ 
++-static int poly1305_simd_update(struct shash_desc *desc,
++-				const u8 *src, unsigned int srclen)
+++void poly1305_init_arch(struct poly1305_desc_ctx *desc, const u8 *key)
+++{
+++	poly1305_init_generic(desc, key);
+++}
+++EXPORT_SYMBOL(poly1305_init_arch);
+++
+++void poly1305_update_arch(struct poly1305_desc_ctx *dctx, const u8 *src,
+++			  unsigned int srclen)
++ {
++-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
++ 	unsigned int bytes;
++ 
++ 	if (unlikely(dctx->buflen)) {
++@@ -117,7 +124,8 @@ static int poly1305_simd_update(struct s
++ 		dctx->buflen += bytes;
++ 
++ 		if (dctx->buflen == POLY1305_BLOCK_SIZE) {
++-			if (likely(crypto_simd_usable())) {
+++			if (static_branch_likely(&poly1305_use_simd) &&
+++			    likely(crypto_simd_usable())) {
++ 				kernel_fpu_begin();
++ 				poly1305_simd_blocks(dctx, dctx->buf,
++ 						     POLY1305_BLOCK_SIZE);
++@@ -131,7 +139,8 @@ static int poly1305_simd_update(struct s
++ 	}
++ 
++ 	if (likely(srclen >= POLY1305_BLOCK_SIZE)) {
++-		if (likely(crypto_simd_usable())) {
+++		if (static_branch_likely(&poly1305_use_simd) &&
+++		    likely(crypto_simd_usable())) {
++ 			kernel_fpu_begin();
++ 			bytes = poly1305_simd_blocks(dctx, src, srclen);
++ 			kernel_fpu_end();
++@@ -147,6 +156,13 @@ static int poly1305_simd_update(struct s
++ 		memcpy(dctx->buf, src, srclen);
++ 	}
++ }
+++EXPORT_SYMBOL(poly1305_update_arch);
+++
+++void poly1305_final_arch(struct poly1305_desc_ctx *desc, u8 *digest)
+++{
+++	poly1305_final_generic(desc, digest);
+++}
+++EXPORT_SYMBOL(poly1305_final_arch);
++ 
++ static int crypto_poly1305_init(struct shash_desc *desc)
++ {
++@@ -171,6 +187,15 @@ static int crypto_poly1305_final(struct
++ 	return 0;
++ }
++ 
+++static int poly1305_simd_update(struct shash_desc *desc,
+++				const u8 *src, unsigned int srclen)
+++{
+++	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
+++
+++	poly1305_update_arch(dctx, src, srclen);
+++	return 0;
+++}
+++
++ static struct shash_alg alg = {
++ 	.digestsize	= POLY1305_DIGEST_SIZE,
++ 	.init		= crypto_poly1305_init,
++@@ -189,15 +214,15 @@ static struct shash_alg alg = {
++ static int __init poly1305_simd_mod_init(void)
++ {
++ 	if (!boot_cpu_has(X86_FEATURE_XMM2))
++-		return -ENODEV;
+++		return 0;
++ 
++-	poly1305_use_avx2 = IS_ENABLED(CONFIG_AS_AVX2) &&
++-			    boot_cpu_has(X86_FEATURE_AVX) &&
++-			    boot_cpu_has(X86_FEATURE_AVX2) &&
++-			    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL);
++-	alg.descsize = sizeof(struct poly1305_desc_ctx) + 5 * sizeof(u32);
++-	if (poly1305_use_avx2)
++-		alg.descsize += 10 * sizeof(u32);
+++	static_branch_enable(&poly1305_use_simd);
+++
+++	if (IS_ENABLED(CONFIG_AS_AVX2) &&
+++	    boot_cpu_has(X86_FEATURE_AVX) &&
+++	    boot_cpu_has(X86_FEATURE_AVX2) &&
+++	    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL))
+++		static_branch_enable(&poly1305_use_avx2);
++ 
++ 	return crypto_register_shash(&alg);
++ }
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -698,6 +698,7 @@ config CRYPTO_POLY1305_X86_64
++ 	tristate "Poly1305 authenticator algorithm (x86_64/SSE2/AVX2)"
++ 	depends on X86 && 64BIT
++ 	select CRYPTO_LIB_POLY1305_GENERIC
+++	select CRYPTO_ARCH_HAVE_LIB_POLY1305
++ 	help
++ 	  Poly1305 authenticator algorithm, RFC7539.
++ 
++--- a/lib/crypto/Kconfig
+++++ b/lib/crypto/Kconfig
++@@ -39,6 +39,7 @@ config CRYPTO_LIB_DES
++ 
++ config CRYPTO_LIB_POLY1305_RSIZE
++ 	int
+++	default 4 if X86_64
++ 	default 1
++ 
++ config CRYPTO_ARCH_HAVE_LIB_POLY1305
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0018-crypto-arm64-poly1305-incorporate-OpenSSL-CRYPTOGAMS.patch b/target/linux/generic/backport-5.4/080-wireguard-0018-crypto-arm64-poly1305-incorporate-OpenSSL-CRYPTOGAMS.patch
+new file mode 100644
+index 0000000000..464c6568f6
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0018-crypto-arm64-poly1305-incorporate-OpenSSL-CRYPTOGAMS.patch
+@@ -0,0 +1,2083 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:24 +0100
++Subject: [PATCH] crypto: arm64/poly1305 - incorporate OpenSSL/CRYPTOGAMS NEON
++ implementation
++
++commit f569ca16475155013525686d0f73bc379c67e635 upstream.
++
++This is a straight import of the OpenSSL/CRYPTOGAMS Poly1305 implementation
++for NEON authored by Andy Polyakov, and contributed by him to the OpenSSL
++project. The file 'poly1305-armv8.pl' is taken straight from this upstream
++GitHub repository [0] at commit ec55a08dc0244ce570c4fc7cade330c60798952f,
++and already contains all the changes required to build it as part of a
++Linux kernel module.
++
++[0] https://github.com/dot-asm/cryptogams
++
++Co-developed-by: Andy Polyakov <appro@cryptogams.org>
++Signed-off-by: Andy Polyakov <appro@cryptogams.org>
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm64/crypto/Kconfig                 |   6 +
++ arch/arm64/crypto/Makefile                |  10 +-
++ arch/arm64/crypto/poly1305-armv8.pl       | 913 ++++++++++++++++++++++
++ arch/arm64/crypto/poly1305-core.S_shipped | 835 ++++++++++++++++++++
++ arch/arm64/crypto/poly1305-glue.c         | 237 ++++++
++ lib/crypto/Kconfig                        |   1 +
++ 6 files changed, 2001 insertions(+), 1 deletion(-)
++ create mode 100644 arch/arm64/crypto/poly1305-armv8.pl
++ create mode 100644 arch/arm64/crypto/poly1305-core.S_shipped
++ create mode 100644 arch/arm64/crypto/poly1305-glue.c
++
++--- a/arch/arm64/crypto/Kconfig
+++++ b/arch/arm64/crypto/Kconfig
++@@ -106,6 +106,12 @@ config CRYPTO_CHACHA20_NEON
++ 	select CRYPTO_LIB_CHACHA_GENERIC
++ 	select CRYPTO_ARCH_HAVE_LIB_CHACHA
++ 
+++config CRYPTO_POLY1305_NEON
+++	tristate "Poly1305 hash function using scalar or NEON instructions"
+++	depends on KERNEL_MODE_NEON
+++	select CRYPTO_HASH
+++	select CRYPTO_ARCH_HAVE_LIB_POLY1305
+++
++ config CRYPTO_NHPOLY1305_NEON
++ 	tristate "NHPoly1305 hash function using NEON instructions (for Adiantum)"
++ 	depends on KERNEL_MODE_NEON
++--- a/arch/arm64/crypto/Makefile
+++++ b/arch/arm64/crypto/Makefile
++@@ -50,6 +50,10 @@ sha512-arm64-y := sha512-glue.o sha512-c
++ obj-$(CONFIG_CRYPTO_CHACHA20_NEON) += chacha-neon.o
++ chacha-neon-y := chacha-neon-core.o chacha-neon-glue.o
++ 
+++obj-$(CONFIG_CRYPTO_POLY1305_NEON) += poly1305-neon.o
+++poly1305-neon-y := poly1305-core.o poly1305-glue.o
+++AFLAGS_poly1305-core.o += -Dpoly1305_init=poly1305_init_arm64
+++
++ obj-$(CONFIG_CRYPTO_NHPOLY1305_NEON) += nhpoly1305-neon.o
++ nhpoly1305-neon-y := nh-neon-core.o nhpoly1305-neon-glue.o
++ 
++@@ -68,11 +72,15 @@ ifdef REGENERATE_ARM64_CRYPTO
++ quiet_cmd_perlasm = PERLASM $@
++       cmd_perlasm = $(PERL) $(<) void $(@)
++ 
+++$(src)/poly1305-core.S_shipped: $(src)/poly1305-armv8.pl
+++	$(call cmd,perlasm)
+++
++ $(src)/sha256-core.S_shipped: $(src)/sha512-armv8.pl
++ 	$(call cmd,perlasm)
++ 
++ $(src)/sha512-core.S_shipped: $(src)/sha512-armv8.pl
++ 	$(call cmd,perlasm)
+++
++ endif
++ 
++-clean-files += sha256-core.S sha512-core.S
+++clean-files += poly1305-core.S sha256-core.S sha512-core.S
++--- /dev/null
+++++ b/arch/arm64/crypto/poly1305-armv8.pl
++@@ -0,0 +1,913 @@
+++#!/usr/bin/env perl
+++# SPDX-License-Identifier: GPL-1.0+ OR BSD-3-Clause
+++#
+++# ====================================================================
+++# Written by Andy Polyakov, @dot-asm, initially for the OpenSSL
+++# project.
+++# ====================================================================
+++#
+++# This module implements Poly1305 hash for ARMv8.
+++#
+++# June 2015
+++#
+++# Numbers are cycles per processed byte with poly1305_blocks alone.
+++#
+++#		IALU/gcc-4.9	NEON
+++#
+++# Apple A7	1.86/+5%	0.72
+++# Cortex-A53	2.69/+58%	1.47
+++# Cortex-A57	2.70/+7%	1.14
+++# Denver	1.64/+50%	1.18(*)
+++# X-Gene	2.13/+68%	2.27
+++# Mongoose	1.77/+75%	1.12
+++# Kryo		2.70/+55%	1.13
+++# ThunderX2	1.17/+95%	1.36
+++#
+++# (*)	estimate based on resources availability is less than 1.0,
+++#	i.e. measured result is worse than expected, presumably binary
+++#	translator is not almighty;
+++
+++$flavour=shift;
+++$output=shift;
+++
+++if ($flavour && $flavour ne "void") {
+++    $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
+++    ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
+++    ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
+++    die "can't locate arm-xlate.pl";
+++
+++    open STDOUT,"| \"$^X\" $xlate $flavour $output";
+++} else {
+++    open STDOUT,">$output";
+++}
+++
+++my ($ctx,$inp,$len,$padbit) = map("x$_",(0..3));
+++my ($mac,$nonce)=($inp,$len);
+++
+++my ($h0,$h1,$h2,$r0,$r1,$s1,$t0,$t1,$d0,$d1,$d2) = map("x$_",(4..14));
+++
+++$code.=<<___;
+++#ifndef __KERNEL__
+++# include "arm_arch.h"
+++.extern	OPENSSL_armcap_P
+++#endif
+++
+++.text
+++
+++// forward "declarations" are required for Apple
+++.globl	poly1305_blocks
+++.globl	poly1305_emit
+++
+++.globl	poly1305_init
+++.type	poly1305_init,%function
+++.align	5
+++poly1305_init:
+++	cmp	$inp,xzr
+++	stp	xzr,xzr,[$ctx]		// zero hash value
+++	stp	xzr,xzr,[$ctx,#16]	// [along with is_base2_26]
+++
+++	csel	x0,xzr,x0,eq
+++	b.eq	.Lno_key
+++
+++#ifndef	__KERNEL__
+++	adrp	x17,OPENSSL_armcap_P
+++	ldr	w17,[x17,#:lo12:OPENSSL_armcap_P]
+++#endif
+++
+++	ldp	$r0,$r1,[$inp]		// load key
+++	mov	$s1,#0xfffffffc0fffffff
+++	movk	$s1,#0x0fff,lsl#48
+++#ifdef	__AARCH64EB__
+++	rev	$r0,$r0			// flip bytes
+++	rev	$r1,$r1
+++#endif
+++	and	$r0,$r0,$s1		// &=0ffffffc0fffffff
+++	and	$s1,$s1,#-4
+++	and	$r1,$r1,$s1		// &=0ffffffc0ffffffc
+++	mov	w#$s1,#-1
+++	stp	$r0,$r1,[$ctx,#32]	// save key value
+++	str	w#$s1,[$ctx,#48]	// impossible key power value
+++
+++#ifndef	__KERNEL__
+++	tst	w17,#ARMV7_NEON
+++
+++	adr	$d0,.Lpoly1305_blocks
+++	adr	$r0,.Lpoly1305_blocks_neon
+++	adr	$d1,.Lpoly1305_emit
+++
+++	csel	$d0,$d0,$r0,eq
+++
+++# ifdef	__ILP32__
+++	stp	w#$d0,w#$d1,[$len]
+++# else
+++	stp	$d0,$d1,[$len]
+++# endif
+++#endif
+++	mov	x0,#1
+++.Lno_key:
+++	ret
+++.size	poly1305_init,.-poly1305_init
+++
+++.type	poly1305_blocks,%function
+++.align	5
+++poly1305_blocks:
+++.Lpoly1305_blocks:
+++	ands	$len,$len,#-16
+++	b.eq	.Lno_data
+++
+++	ldp	$h0,$h1,[$ctx]		// load hash value
+++	ldp	$h2,x17,[$ctx,#16]	// [along with is_base2_26]
+++	ldp	$r0,$r1,[$ctx,#32]	// load key value
+++
+++#ifdef	__AARCH64EB__
+++	lsr	$d0,$h0,#32
+++	mov	w#$d1,w#$h0
+++	lsr	$d2,$h1,#32
+++	mov	w15,w#$h1
+++	lsr	x16,$h2,#32
+++#else
+++	mov	w#$d0,w#$h0
+++	lsr	$d1,$h0,#32
+++	mov	w#$d2,w#$h1
+++	lsr	x15,$h1,#32
+++	mov	w16,w#$h2
+++#endif
+++
+++	add	$d0,$d0,$d1,lsl#26	// base 2^26 -> base 2^64
+++	lsr	$d1,$d2,#12
+++	adds	$d0,$d0,$d2,lsl#52
+++	add	$d1,$d1,x15,lsl#14
+++	adc	$d1,$d1,xzr
+++	lsr	$d2,x16,#24
+++	adds	$d1,$d1,x16,lsl#40
+++	adc	$d2,$d2,xzr
+++
+++	cmp	x17,#0			// is_base2_26?
+++	add	$s1,$r1,$r1,lsr#2	// s1 = r1 + (r1 >> 2)
+++	csel	$h0,$h0,$d0,eq		// choose between radixes
+++	csel	$h1,$h1,$d1,eq
+++	csel	$h2,$h2,$d2,eq
+++
+++.Loop:
+++	ldp	$t0,$t1,[$inp],#16	// load input
+++	sub	$len,$len,#16
+++#ifdef	__AARCH64EB__
+++	rev	$t0,$t0
+++	rev	$t1,$t1
+++#endif
+++	adds	$h0,$h0,$t0		// accumulate input
+++	adcs	$h1,$h1,$t1
+++
+++	mul	$d0,$h0,$r0		// h0*r0
+++	adc	$h2,$h2,$padbit
+++	umulh	$d1,$h0,$r0
+++
+++	mul	$t0,$h1,$s1		// h1*5*r1
+++	umulh	$t1,$h1,$s1
+++
+++	adds	$d0,$d0,$t0
+++	mul	$t0,$h0,$r1		// h0*r1
+++	adc	$d1,$d1,$t1
+++	umulh	$d2,$h0,$r1
+++
+++	adds	$d1,$d1,$t0
+++	mul	$t0,$h1,$r0		// h1*r0
+++	adc	$d2,$d2,xzr
+++	umulh	$t1,$h1,$r0
+++
+++	adds	$d1,$d1,$t0
+++	mul	$t0,$h2,$s1		// h2*5*r1
+++	adc	$d2,$d2,$t1
+++	mul	$t1,$h2,$r0		// h2*r0
+++
+++	adds	$d1,$d1,$t0
+++	adc	$d2,$d2,$t1
+++
+++	and	$t0,$d2,#-4		// final reduction
+++	and	$h2,$d2,#3
+++	add	$t0,$t0,$d2,lsr#2
+++	adds	$h0,$d0,$t0
+++	adcs	$h1,$d1,xzr
+++	adc	$h2,$h2,xzr
+++
+++	cbnz	$len,.Loop
+++
+++	stp	$h0,$h1,[$ctx]		// store hash value
+++	stp	$h2,xzr,[$ctx,#16]	// [and clear is_base2_26]
+++
+++.Lno_data:
+++	ret
+++.size	poly1305_blocks,.-poly1305_blocks
+++
+++.type	poly1305_emit,%function
+++.align	5
+++poly1305_emit:
+++.Lpoly1305_emit:
+++	ldp	$h0,$h1,[$ctx]		// load hash base 2^64
+++	ldp	$h2,$r0,[$ctx,#16]	// [along with is_base2_26]
+++	ldp	$t0,$t1,[$nonce]	// load nonce
+++
+++#ifdef	__AARCH64EB__
+++	lsr	$d0,$h0,#32
+++	mov	w#$d1,w#$h0
+++	lsr	$d2,$h1,#32
+++	mov	w15,w#$h1
+++	lsr	x16,$h2,#32
+++#else
+++	mov	w#$d0,w#$h0
+++	lsr	$d1,$h0,#32
+++	mov	w#$d2,w#$h1
+++	lsr	x15,$h1,#32
+++	mov	w16,w#$h2
+++#endif
+++
+++	add	$d0,$d0,$d1,lsl#26	// base 2^26 -> base 2^64
+++	lsr	$d1,$d2,#12
+++	adds	$d0,$d0,$d2,lsl#52
+++	add	$d1,$d1,x15,lsl#14
+++	adc	$d1,$d1,xzr
+++	lsr	$d2,x16,#24
+++	adds	$d1,$d1,x16,lsl#40
+++	adc	$d2,$d2,xzr
+++
+++	cmp	$r0,#0			// is_base2_26?
+++	csel	$h0,$h0,$d0,eq		// choose between radixes
+++	csel	$h1,$h1,$d1,eq
+++	csel	$h2,$h2,$d2,eq
+++
+++	adds	$d0,$h0,#5		// compare to modulus
+++	adcs	$d1,$h1,xzr
+++	adc	$d2,$h2,xzr
+++
+++	tst	$d2,#-4			// see if it's carried/borrowed
+++
+++	csel	$h0,$h0,$d0,eq
+++	csel	$h1,$h1,$d1,eq
+++
+++#ifdef	__AARCH64EB__
+++	ror	$t0,$t0,#32		// flip nonce words
+++	ror	$t1,$t1,#32
+++#endif
+++	adds	$h0,$h0,$t0		// accumulate nonce
+++	adc	$h1,$h1,$t1
+++#ifdef	__AARCH64EB__
+++	rev	$h0,$h0			// flip output bytes
+++	rev	$h1,$h1
+++#endif
+++	stp	$h0,$h1,[$mac]		// write result
+++
+++	ret
+++.size	poly1305_emit,.-poly1305_emit
+++___
+++my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("v$_.4s",(0..8));
+++my ($IN01_0,$IN01_1,$IN01_2,$IN01_3,$IN01_4) = map("v$_.2s",(9..13));
+++my ($IN23_0,$IN23_1,$IN23_2,$IN23_3,$IN23_4) = map("v$_.2s",(14..18));
+++my ($ACC0,$ACC1,$ACC2,$ACC3,$ACC4) = map("v$_.2d",(19..23));
+++my ($H0,$H1,$H2,$H3,$H4) = map("v$_.2s",(24..28));
+++my ($T0,$T1,$MASK) = map("v$_",(29..31));
+++
+++my ($in2,$zeros)=("x16","x17");
+++my $is_base2_26 = $zeros;		# borrow
+++
+++$code.=<<___;
+++.type	poly1305_mult,%function
+++.align	5
+++poly1305_mult:
+++	mul	$d0,$h0,$r0		// h0*r0
+++	umulh	$d1,$h0,$r0
+++
+++	mul	$t0,$h1,$s1		// h1*5*r1
+++	umulh	$t1,$h1,$s1
+++
+++	adds	$d0,$d0,$t0
+++	mul	$t0,$h0,$r1		// h0*r1
+++	adc	$d1,$d1,$t1
+++	umulh	$d2,$h0,$r1
+++
+++	adds	$d1,$d1,$t0
+++	mul	$t0,$h1,$r0		// h1*r0
+++	adc	$d2,$d2,xzr
+++	umulh	$t1,$h1,$r0
+++
+++	adds	$d1,$d1,$t0
+++	mul	$t0,$h2,$s1		// h2*5*r1
+++	adc	$d2,$d2,$t1
+++	mul	$t1,$h2,$r0		// h2*r0
+++
+++	adds	$d1,$d1,$t0
+++	adc	$d2,$d2,$t1
+++
+++	and	$t0,$d2,#-4		// final reduction
+++	and	$h2,$d2,#3
+++	add	$t0,$t0,$d2,lsr#2
+++	adds	$h0,$d0,$t0
+++	adcs	$h1,$d1,xzr
+++	adc	$h2,$h2,xzr
+++
+++	ret
+++.size	poly1305_mult,.-poly1305_mult
+++
+++.type	poly1305_splat,%function
+++.align	4
+++poly1305_splat:
+++	and	x12,$h0,#0x03ffffff	// base 2^64 -> base 2^26
+++	ubfx	x13,$h0,#26,#26
+++	extr	x14,$h1,$h0,#52
+++	and	x14,x14,#0x03ffffff
+++	ubfx	x15,$h1,#14,#26
+++	extr	x16,$h2,$h1,#40
+++
+++	str	w12,[$ctx,#16*0]	// r0
+++	add	w12,w13,w13,lsl#2	// r1*5
+++	str	w13,[$ctx,#16*1]	// r1
+++	add	w13,w14,w14,lsl#2	// r2*5
+++	str	w12,[$ctx,#16*2]	// s1
+++	str	w14,[$ctx,#16*3]	// r2
+++	add	w14,w15,w15,lsl#2	// r3*5
+++	str	w13,[$ctx,#16*4]	// s2
+++	str	w15,[$ctx,#16*5]	// r3
+++	add	w15,w16,w16,lsl#2	// r4*5
+++	str	w14,[$ctx,#16*6]	// s3
+++	str	w16,[$ctx,#16*7]	// r4
+++	str	w15,[$ctx,#16*8]	// s4
+++
+++	ret
+++.size	poly1305_splat,.-poly1305_splat
+++
+++#ifdef	__KERNEL__
+++.globl	poly1305_blocks_neon
+++#endif
+++.type	poly1305_blocks_neon,%function
+++.align	5
+++poly1305_blocks_neon:
+++.Lpoly1305_blocks_neon:
+++	ldr	$is_base2_26,[$ctx,#24]
+++	cmp	$len,#128
+++	b.lo	.Lpoly1305_blocks
+++
+++	.inst	0xd503233f		// paciasp
+++	stp	x29,x30,[sp,#-80]!
+++	add	x29,sp,#0
+++
+++	stp	d8,d9,[sp,#16]		// meet ABI requirements
+++	stp	d10,d11,[sp,#32]
+++	stp	d12,d13,[sp,#48]
+++	stp	d14,d15,[sp,#64]
+++
+++	cbz	$is_base2_26,.Lbase2_64_neon
+++
+++	ldp	w10,w11,[$ctx]		// load hash value base 2^26
+++	ldp	w12,w13,[$ctx,#8]
+++	ldr	w14,[$ctx,#16]
+++
+++	tst	$len,#31
+++	b.eq	.Leven_neon
+++
+++	ldp	$r0,$r1,[$ctx,#32]	// load key value
+++
+++	add	$h0,x10,x11,lsl#26	// base 2^26 -> base 2^64
+++	lsr	$h1,x12,#12
+++	adds	$h0,$h0,x12,lsl#52
+++	add	$h1,$h1,x13,lsl#14
+++	adc	$h1,$h1,xzr
+++	lsr	$h2,x14,#24
+++	adds	$h1,$h1,x14,lsl#40
+++	adc	$d2,$h2,xzr		// can be partially reduced...
+++
+++	ldp	$d0,$d1,[$inp],#16	// load input
+++	sub	$len,$len,#16
+++	add	$s1,$r1,$r1,lsr#2	// s1 = r1 + (r1 >> 2)
+++
+++#ifdef	__AARCH64EB__
+++	rev	$d0,$d0
+++	rev	$d1,$d1
+++#endif
+++	adds	$h0,$h0,$d0		// accumulate input
+++	adcs	$h1,$h1,$d1
+++	adc	$h2,$h2,$padbit
+++
+++	bl	poly1305_mult
+++
+++	and	x10,$h0,#0x03ffffff	// base 2^64 -> base 2^26
+++	ubfx	x11,$h0,#26,#26
+++	extr	x12,$h1,$h0,#52
+++	and	x12,x12,#0x03ffffff
+++	ubfx	x13,$h1,#14,#26
+++	extr	x14,$h2,$h1,#40
+++
+++	b	.Leven_neon
+++
+++.align	4
+++.Lbase2_64_neon:
+++	ldp	$r0,$r1,[$ctx,#32]	// load key value
+++
+++	ldp	$h0,$h1,[$ctx]		// load hash value base 2^64
+++	ldr	$h2,[$ctx,#16]
+++
+++	tst	$len,#31
+++	b.eq	.Linit_neon
+++
+++	ldp	$d0,$d1,[$inp],#16	// load input
+++	sub	$len,$len,#16
+++	add	$s1,$r1,$r1,lsr#2	// s1 = r1 + (r1 >> 2)
+++#ifdef	__AARCH64EB__
+++	rev	$d0,$d0
+++	rev	$d1,$d1
+++#endif
+++	adds	$h0,$h0,$d0		// accumulate input
+++	adcs	$h1,$h1,$d1
+++	adc	$h2,$h2,$padbit
+++
+++	bl	poly1305_mult
+++
+++.Linit_neon:
+++	ldr	w17,[$ctx,#48]		// first table element
+++	and	x10,$h0,#0x03ffffff	// base 2^64 -> base 2^26
+++	ubfx	x11,$h0,#26,#26
+++	extr	x12,$h1,$h0,#52
+++	and	x12,x12,#0x03ffffff
+++	ubfx	x13,$h1,#14,#26
+++	extr	x14,$h2,$h1,#40
+++
+++	cmp	w17,#-1			// is value impossible?
+++	b.ne	.Leven_neon
+++
+++	fmov	${H0},x10
+++	fmov	${H1},x11
+++	fmov	${H2},x12
+++	fmov	${H3},x13
+++	fmov	${H4},x14
+++
+++	////////////////////////////////// initialize r^n table
+++	mov	$h0,$r0			// r^1
+++	add	$s1,$r1,$r1,lsr#2	// s1 = r1 + (r1 >> 2)
+++	mov	$h1,$r1
+++	mov	$h2,xzr
+++	add	$ctx,$ctx,#48+12
+++	bl	poly1305_splat
+++
+++	bl	poly1305_mult		// r^2
+++	sub	$ctx,$ctx,#4
+++	bl	poly1305_splat
+++
+++	bl	poly1305_mult		// r^3
+++	sub	$ctx,$ctx,#4
+++	bl	poly1305_splat
+++
+++	bl	poly1305_mult		// r^4
+++	sub	$ctx,$ctx,#4
+++	bl	poly1305_splat
+++	sub	$ctx,$ctx,#48		// restore original $ctx
+++	b	.Ldo_neon
+++
+++.align	4
+++.Leven_neon:
+++	fmov	${H0},x10
+++	fmov	${H1},x11
+++	fmov	${H2},x12
+++	fmov	${H3},x13
+++	fmov	${H4},x14
+++
+++.Ldo_neon:
+++	ldp	x8,x12,[$inp,#32]	// inp[2:3]
+++	subs	$len,$len,#64
+++	ldp	x9,x13,[$inp,#48]
+++	add	$in2,$inp,#96
+++	adr	$zeros,.Lzeros
+++
+++	lsl	$padbit,$padbit,#24
+++	add	x15,$ctx,#48
+++
+++#ifdef	__AARCH64EB__
+++	rev	x8,x8
+++	rev	x12,x12
+++	rev	x9,x9
+++	rev	x13,x13
+++#endif
+++	and	x4,x8,#0x03ffffff	// base 2^64 -> base 2^26
+++	and	x5,x9,#0x03ffffff
+++	ubfx	x6,x8,#26,#26
+++	ubfx	x7,x9,#26,#26
+++	add	x4,x4,x5,lsl#32		// bfi	x4,x5,#32,#32
+++	extr	x8,x12,x8,#52
+++	extr	x9,x13,x9,#52
+++	add	x6,x6,x7,lsl#32		// bfi	x6,x7,#32,#32
+++	fmov	$IN23_0,x4
+++	and	x8,x8,#0x03ffffff
+++	and	x9,x9,#0x03ffffff
+++	ubfx	x10,x12,#14,#26
+++	ubfx	x11,x13,#14,#26
+++	add	x12,$padbit,x12,lsr#40
+++	add	x13,$padbit,x13,lsr#40
+++	add	x8,x8,x9,lsl#32		// bfi	x8,x9,#32,#32
+++	fmov	$IN23_1,x6
+++	add	x10,x10,x11,lsl#32	// bfi	x10,x11,#32,#32
+++	add	x12,x12,x13,lsl#32	// bfi	x12,x13,#32,#32
+++	fmov	$IN23_2,x8
+++	fmov	$IN23_3,x10
+++	fmov	$IN23_4,x12
+++
+++	ldp	x8,x12,[$inp],#16	// inp[0:1]
+++	ldp	x9,x13,[$inp],#48
+++
+++	ld1	{$R0,$R1,$S1,$R2},[x15],#64
+++	ld1	{$S2,$R3,$S3,$R4},[x15],#64
+++	ld1	{$S4},[x15]
+++
+++#ifdef	__AARCH64EB__
+++	rev	x8,x8
+++	rev	x12,x12
+++	rev	x9,x9
+++	rev	x13,x13
+++#endif
+++	and	x4,x8,#0x03ffffff	// base 2^64 -> base 2^26
+++	and	x5,x9,#0x03ffffff
+++	ubfx	x6,x8,#26,#26
+++	ubfx	x7,x9,#26,#26
+++	add	x4,x4,x5,lsl#32		// bfi	x4,x5,#32,#32
+++	extr	x8,x12,x8,#52
+++	extr	x9,x13,x9,#52
+++	add	x6,x6,x7,lsl#32		// bfi	x6,x7,#32,#32
+++	fmov	$IN01_0,x4
+++	and	x8,x8,#0x03ffffff
+++	and	x9,x9,#0x03ffffff
+++	ubfx	x10,x12,#14,#26
+++	ubfx	x11,x13,#14,#26
+++	add	x12,$padbit,x12,lsr#40
+++	add	x13,$padbit,x13,lsr#40
+++	add	x8,x8,x9,lsl#32		// bfi	x8,x9,#32,#32
+++	fmov	$IN01_1,x6
+++	add	x10,x10,x11,lsl#32	// bfi	x10,x11,#32,#32
+++	add	x12,x12,x13,lsl#32	// bfi	x12,x13,#32,#32
+++	movi	$MASK.2d,#-1
+++	fmov	$IN01_2,x8
+++	fmov	$IN01_3,x10
+++	fmov	$IN01_4,x12
+++	ushr	$MASK.2d,$MASK.2d,#38
+++
+++	b.ls	.Lskip_loop
+++
+++.align	4
+++.Loop_neon:
+++	////////////////////////////////////////////////////////////////
+++	// ((inp[0]*r^4+inp[2]*r^2+inp[4])*r^4+inp[6]*r^2
+++	// ((inp[1]*r^4+inp[3]*r^2+inp[5])*r^3+inp[7]*r
+++	//   \___________________/
+++	// ((inp[0]*r^4+inp[2]*r^2+inp[4])*r^4+inp[6]*r^2+inp[8])*r^2
+++	// ((inp[1]*r^4+inp[3]*r^2+inp[5])*r^4+inp[7]*r^2+inp[9])*r
+++	//   \___________________/ \____________________/
+++	//
+++	// Note that we start with inp[2:3]*r^2. This is because it
+++	// doesn't depend on reduction in previous iteration.
+++	////////////////////////////////////////////////////////////////
+++	// d4 = h0*r4 + h1*r3   + h2*r2   + h3*r1   + h4*r0
+++	// d3 = h0*r3 + h1*r2   + h2*r1   + h3*r0   + h4*5*r4
+++	// d2 = h0*r2 + h1*r1   + h2*r0   + h3*5*r4 + h4*5*r3
+++	// d1 = h0*r1 + h1*r0   + h2*5*r4 + h3*5*r3 + h4*5*r2
+++	// d0 = h0*r0 + h1*5*r4 + h2*5*r3 + h3*5*r2 + h4*5*r1
+++
+++	subs	$len,$len,#64
+++	umull	$ACC4,$IN23_0,${R4}[2]
+++	csel	$in2,$zeros,$in2,lo
+++	umull	$ACC3,$IN23_0,${R3}[2]
+++	umull	$ACC2,$IN23_0,${R2}[2]
+++	 ldp	x8,x12,[$in2],#16	// inp[2:3] (or zero)
+++	umull	$ACC1,$IN23_0,${R1}[2]
+++	 ldp	x9,x13,[$in2],#48
+++	umull	$ACC0,$IN23_0,${R0}[2]
+++#ifdef	__AARCH64EB__
+++	 rev	x8,x8
+++	 rev	x12,x12
+++	 rev	x9,x9
+++	 rev	x13,x13
+++#endif
+++
+++	umlal	$ACC4,$IN23_1,${R3}[2]
+++	 and	x4,x8,#0x03ffffff	// base 2^64 -> base 2^26
+++	umlal	$ACC3,$IN23_1,${R2}[2]
+++	 and	x5,x9,#0x03ffffff
+++	umlal	$ACC2,$IN23_1,${R1}[2]
+++	 ubfx	x6,x8,#26,#26
+++	umlal	$ACC1,$IN23_1,${R0}[2]
+++	 ubfx	x7,x9,#26,#26
+++	umlal	$ACC0,$IN23_1,${S4}[2]
+++	 add	x4,x4,x5,lsl#32		// bfi	x4,x5,#32,#32
+++
+++	umlal	$ACC4,$IN23_2,${R2}[2]
+++	 extr	x8,x12,x8,#52
+++	umlal	$ACC3,$IN23_2,${R1}[2]
+++	 extr	x9,x13,x9,#52
+++	umlal	$ACC2,$IN23_2,${R0}[2]
+++	 add	x6,x6,x7,lsl#32		// bfi	x6,x7,#32,#32
+++	umlal	$ACC1,$IN23_2,${S4}[2]
+++	 fmov	$IN23_0,x4
+++	umlal	$ACC0,$IN23_2,${S3}[2]
+++	 and	x8,x8,#0x03ffffff
+++
+++	umlal	$ACC4,$IN23_3,${R1}[2]
+++	 and	x9,x9,#0x03ffffff
+++	umlal	$ACC3,$IN23_3,${R0}[2]
+++	 ubfx	x10,x12,#14,#26
+++	umlal	$ACC2,$IN23_3,${S4}[2]
+++	 ubfx	x11,x13,#14,#26
+++	umlal	$ACC1,$IN23_3,${S3}[2]
+++	 add	x8,x8,x9,lsl#32		// bfi	x8,x9,#32,#32
+++	umlal	$ACC0,$IN23_3,${S2}[2]
+++	 fmov	$IN23_1,x6
+++
+++	add	$IN01_2,$IN01_2,$H2
+++	 add	x12,$padbit,x12,lsr#40
+++	umlal	$ACC4,$IN23_4,${R0}[2]
+++	 add	x13,$padbit,x13,lsr#40
+++	umlal	$ACC3,$IN23_4,${S4}[2]
+++	 add	x10,x10,x11,lsl#32	// bfi	x10,x11,#32,#32
+++	umlal	$ACC2,$IN23_4,${S3}[2]
+++	 add	x12,x12,x13,lsl#32	// bfi	x12,x13,#32,#32
+++	umlal	$ACC1,$IN23_4,${S2}[2]
+++	 fmov	$IN23_2,x8
+++	umlal	$ACC0,$IN23_4,${S1}[2]
+++	 fmov	$IN23_3,x10
+++
+++	////////////////////////////////////////////////////////////////
+++	// (hash+inp[0:1])*r^4 and accumulate
+++
+++	add	$IN01_0,$IN01_0,$H0
+++	 fmov	$IN23_4,x12
+++	umlal	$ACC3,$IN01_2,${R1}[0]
+++	 ldp	x8,x12,[$inp],#16	// inp[0:1]
+++	umlal	$ACC0,$IN01_2,${S3}[0]
+++	 ldp	x9,x13,[$inp],#48
+++	umlal	$ACC4,$IN01_2,${R2}[0]
+++	umlal	$ACC1,$IN01_2,${S4}[0]
+++	umlal	$ACC2,$IN01_2,${R0}[0]
+++#ifdef	__AARCH64EB__
+++	 rev	x8,x8
+++	 rev	x12,x12
+++	 rev	x9,x9
+++	 rev	x13,x13
+++#endif
+++
+++	add	$IN01_1,$IN01_1,$H1
+++	umlal	$ACC3,$IN01_0,${R3}[0]
+++	umlal	$ACC4,$IN01_0,${R4}[0]
+++	 and	x4,x8,#0x03ffffff	// base 2^64 -> base 2^26
+++	umlal	$ACC2,$IN01_0,${R2}[0]
+++	 and	x5,x9,#0x03ffffff
+++	umlal	$ACC0,$IN01_0,${R0}[0]
+++	 ubfx	x6,x8,#26,#26
+++	umlal	$ACC1,$IN01_0,${R1}[0]
+++	 ubfx	x7,x9,#26,#26
+++
+++	add	$IN01_3,$IN01_3,$H3
+++	 add	x4,x4,x5,lsl#32		// bfi	x4,x5,#32,#32
+++	umlal	$ACC3,$IN01_1,${R2}[0]
+++	 extr	x8,x12,x8,#52
+++	umlal	$ACC4,$IN01_1,${R3}[0]
+++	 extr	x9,x13,x9,#52
+++	umlal	$ACC0,$IN01_1,${S4}[0]
+++	 add	x6,x6,x7,lsl#32		// bfi	x6,x7,#32,#32
+++	umlal	$ACC2,$IN01_1,${R1}[0]
+++	 fmov	$IN01_0,x4
+++	umlal	$ACC1,$IN01_1,${R0}[0]
+++	 and	x8,x8,#0x03ffffff
+++
+++	add	$IN01_4,$IN01_4,$H4
+++	 and	x9,x9,#0x03ffffff
+++	umlal	$ACC3,$IN01_3,${R0}[0]
+++	 ubfx	x10,x12,#14,#26
+++	umlal	$ACC0,$IN01_3,${S2}[0]
+++	 ubfx	x11,x13,#14,#26
+++	umlal	$ACC4,$IN01_3,${R1}[0]
+++	 add	x8,x8,x9,lsl#32		// bfi	x8,x9,#32,#32
+++	umlal	$ACC1,$IN01_3,${S3}[0]
+++	 fmov	$IN01_1,x6
+++	umlal	$ACC2,$IN01_3,${S4}[0]
+++	 add	x12,$padbit,x12,lsr#40
+++
+++	umlal	$ACC3,$IN01_4,${S4}[0]
+++	 add	x13,$padbit,x13,lsr#40
+++	umlal	$ACC0,$IN01_4,${S1}[0]
+++	 add	x10,x10,x11,lsl#32	// bfi	x10,x11,#32,#32
+++	umlal	$ACC4,$IN01_4,${R0}[0]
+++	 add	x12,x12,x13,lsl#32	// bfi	x12,x13,#32,#32
+++	umlal	$ACC1,$IN01_4,${S2}[0]
+++	 fmov	$IN01_2,x8
+++	umlal	$ACC2,$IN01_4,${S3}[0]
+++	 fmov	$IN01_3,x10
+++	 fmov	$IN01_4,x12
+++
+++	/////////////////////////////////////////////////////////////////
+++	// lazy reduction as discussed in "NEON crypto" by D.J. Bernstein
+++	// and P. Schwabe
+++	//
+++	// [see discussion in poly1305-armv4 module]
+++
+++	ushr	$T0.2d,$ACC3,#26
+++	xtn	$H3,$ACC3
+++	 ushr	$T1.2d,$ACC0,#26
+++	 and	$ACC0,$ACC0,$MASK.2d
+++	add	$ACC4,$ACC4,$T0.2d	// h3 -> h4
+++	bic	$H3,#0xfc,lsl#24	// &=0x03ffffff
+++	 add	$ACC1,$ACC1,$T1.2d	// h0 -> h1
+++
+++	ushr	$T0.2d,$ACC4,#26
+++	xtn	$H4,$ACC4
+++	 ushr	$T1.2d,$ACC1,#26
+++	 xtn	$H1,$ACC1
+++	bic	$H4,#0xfc,lsl#24
+++	 add	$ACC2,$ACC2,$T1.2d	// h1 -> h2
+++
+++	add	$ACC0,$ACC0,$T0.2d
+++	shl	$T0.2d,$T0.2d,#2
+++	 shrn	$T1.2s,$ACC2,#26
+++	 xtn	$H2,$ACC2
+++	add	$ACC0,$ACC0,$T0.2d	// h4 -> h0
+++	 bic	$H1,#0xfc,lsl#24
+++	 add	$H3,$H3,$T1.2s		// h2 -> h3
+++	 bic	$H2,#0xfc,lsl#24
+++
+++	shrn	$T0.2s,$ACC0,#26
+++	xtn	$H0,$ACC0
+++	 ushr	$T1.2s,$H3,#26
+++	 bic	$H3,#0xfc,lsl#24
+++	 bic	$H0,#0xfc,lsl#24
+++	add	$H1,$H1,$T0.2s		// h0 -> h1
+++	 add	$H4,$H4,$T1.2s		// h3 -> h4
+++
+++	b.hi	.Loop_neon
+++
+++.Lskip_loop:
+++	dup	$IN23_2,${IN23_2}[0]
+++	add	$IN01_2,$IN01_2,$H2
+++
+++	////////////////////////////////////////////////////////////////
+++	// multiply (inp[0:1]+hash) or inp[2:3] by r^2:r^1
+++
+++	adds	$len,$len,#32
+++	b.ne	.Long_tail
+++
+++	dup	$IN23_2,${IN01_2}[0]
+++	add	$IN23_0,$IN01_0,$H0
+++	add	$IN23_3,$IN01_3,$H3
+++	add	$IN23_1,$IN01_1,$H1
+++	add	$IN23_4,$IN01_4,$H4
+++
+++.Long_tail:
+++	dup	$IN23_0,${IN23_0}[0]
+++	umull2	$ACC0,$IN23_2,${S3}
+++	umull2	$ACC3,$IN23_2,${R1}
+++	umull2	$ACC4,$IN23_2,${R2}
+++	umull2	$ACC2,$IN23_2,${R0}
+++	umull2	$ACC1,$IN23_2,${S4}
+++
+++	dup	$IN23_1,${IN23_1}[0]
+++	umlal2	$ACC0,$IN23_0,${R0}
+++	umlal2	$ACC2,$IN23_0,${R2}
+++	umlal2	$ACC3,$IN23_0,${R3}
+++	umlal2	$ACC4,$IN23_0,${R4}
+++	umlal2	$ACC1,$IN23_0,${R1}
+++
+++	dup	$IN23_3,${IN23_3}[0]
+++	umlal2	$ACC0,$IN23_1,${S4}
+++	umlal2	$ACC3,$IN23_1,${R2}
+++	umlal2	$ACC2,$IN23_1,${R1}
+++	umlal2	$ACC4,$IN23_1,${R3}
+++	umlal2	$ACC1,$IN23_1,${R0}
+++
+++	dup	$IN23_4,${IN23_4}[0]
+++	umlal2	$ACC3,$IN23_3,${R0}
+++	umlal2	$ACC4,$IN23_3,${R1}
+++	umlal2	$ACC0,$IN23_3,${S2}
+++	umlal2	$ACC1,$IN23_3,${S3}
+++	umlal2	$ACC2,$IN23_3,${S4}
+++
+++	umlal2	$ACC3,$IN23_4,${S4}
+++	umlal2	$ACC0,$IN23_4,${S1}
+++	umlal2	$ACC4,$IN23_4,${R0}
+++	umlal2	$ACC1,$IN23_4,${S2}
+++	umlal2	$ACC2,$IN23_4,${S3}
+++
+++	b.eq	.Lshort_tail
+++
+++	////////////////////////////////////////////////////////////////
+++	// (hash+inp[0:1])*r^4:r^3 and accumulate
+++
+++	add	$IN01_0,$IN01_0,$H0
+++	umlal	$ACC3,$IN01_2,${R1}
+++	umlal	$ACC0,$IN01_2,${S3}
+++	umlal	$ACC4,$IN01_2,${R2}
+++	umlal	$ACC1,$IN01_2,${S4}
+++	umlal	$ACC2,$IN01_2,${R0}
+++
+++	add	$IN01_1,$IN01_1,$H1
+++	umlal	$ACC3,$IN01_0,${R3}
+++	umlal	$ACC0,$IN01_0,${R0}
+++	umlal	$ACC4,$IN01_0,${R4}
+++	umlal	$ACC1,$IN01_0,${R1}
+++	umlal	$ACC2,$IN01_0,${R2}
+++
+++	add	$IN01_3,$IN01_3,$H3
+++	umlal	$ACC3,$IN01_1,${R2}
+++	umlal	$ACC0,$IN01_1,${S4}
+++	umlal	$ACC4,$IN01_1,${R3}
+++	umlal	$ACC1,$IN01_1,${R0}
+++	umlal	$ACC2,$IN01_1,${R1}
+++
+++	add	$IN01_4,$IN01_4,$H4
+++	umlal	$ACC3,$IN01_3,${R0}
+++	umlal	$ACC0,$IN01_3,${S2}
+++	umlal	$ACC4,$IN01_3,${R1}
+++	umlal	$ACC1,$IN01_3,${S3}
+++	umlal	$ACC2,$IN01_3,${S4}
+++
+++	umlal	$ACC3,$IN01_4,${S4}
+++	umlal	$ACC0,$IN01_4,${S1}
+++	umlal	$ACC4,$IN01_4,${R0}
+++	umlal	$ACC1,$IN01_4,${S2}
+++	umlal	$ACC2,$IN01_4,${S3}
+++
+++.Lshort_tail:
+++	////////////////////////////////////////////////////////////////
+++	// horizontal add
+++
+++	addp	$ACC3,$ACC3,$ACC3
+++	 ldp	d8,d9,[sp,#16]		// meet ABI requirements
+++	addp	$ACC0,$ACC0,$ACC0
+++	 ldp	d10,d11,[sp,#32]
+++	addp	$ACC4,$ACC4,$ACC4
+++	 ldp	d12,d13,[sp,#48]
+++	addp	$ACC1,$ACC1,$ACC1
+++	 ldp	d14,d15,[sp,#64]
+++	addp	$ACC2,$ACC2,$ACC2
+++	 ldr	x30,[sp,#8]
+++	 .inst	0xd50323bf		// autiasp
+++
+++	////////////////////////////////////////////////////////////////
+++	// lazy reduction, but without narrowing
+++
+++	ushr	$T0.2d,$ACC3,#26
+++	and	$ACC3,$ACC3,$MASK.2d
+++	 ushr	$T1.2d,$ACC0,#26
+++	 and	$ACC0,$ACC0,$MASK.2d
+++
+++	add	$ACC4,$ACC4,$T0.2d	// h3 -> h4
+++	 add	$ACC1,$ACC1,$T1.2d	// h0 -> h1
+++
+++	ushr	$T0.2d,$ACC4,#26
+++	and	$ACC4,$ACC4,$MASK.2d
+++	 ushr	$T1.2d,$ACC1,#26
+++	 and	$ACC1,$ACC1,$MASK.2d
+++	 add	$ACC2,$ACC2,$T1.2d	// h1 -> h2
+++
+++	add	$ACC0,$ACC0,$T0.2d
+++	shl	$T0.2d,$T0.2d,#2
+++	 ushr	$T1.2d,$ACC2,#26
+++	 and	$ACC2,$ACC2,$MASK.2d
+++	add	$ACC0,$ACC0,$T0.2d	// h4 -> h0
+++	 add	$ACC3,$ACC3,$T1.2d	// h2 -> h3
+++
+++	ushr	$T0.2d,$ACC0,#26
+++	and	$ACC0,$ACC0,$MASK.2d
+++	 ushr	$T1.2d,$ACC3,#26
+++	 and	$ACC3,$ACC3,$MASK.2d
+++	add	$ACC1,$ACC1,$T0.2d	// h0 -> h1
+++	 add	$ACC4,$ACC4,$T1.2d	// h3 -> h4
+++
+++	////////////////////////////////////////////////////////////////
+++	// write the result, can be partially reduced
+++
+++	st4	{$ACC0,$ACC1,$ACC2,$ACC3}[0],[$ctx],#16
+++	mov	x4,#1
+++	st1	{$ACC4}[0],[$ctx]
+++	str	x4,[$ctx,#8]		// set is_base2_26
+++
+++	ldr	x29,[sp],#80
+++	ret
+++.size	poly1305_blocks_neon,.-poly1305_blocks_neon
+++
+++.align	5
+++.Lzeros:
+++.long	0,0,0,0,0,0,0,0
+++.asciz	"Poly1305 for ARMv8, CRYPTOGAMS by \@dot-asm"
+++.align	2
+++#if !defined(__KERNEL__) && !defined(_WIN64)
+++.comm	OPENSSL_armcap_P,4,4
+++.hidden	OPENSSL_armcap_P
+++#endif
+++___
+++
+++foreach (split("\n",$code)) {
+++	s/\b(shrn\s+v[0-9]+)\.[24]d/$1.2s/			or
+++	s/\b(fmov\s+)v([0-9]+)[^,]*,\s*x([0-9]+)/$1d$2,x$3/	or
+++	(m/\bdup\b/ and (s/\.[24]s/.2d/g or 1))			or
+++	(m/\b(eor|and)/ and (s/\.[248][sdh]/.16b/g or 1))	or
+++	(m/\bum(ul|la)l\b/ and (s/\.4s/.2s/g or 1))		or
+++	(m/\bum(ul|la)l2\b/ and (s/\.2s/.4s/g or 1))		or
+++	(m/\bst[1-4]\s+{[^}]+}\[/ and (s/\.[24]d/.s/g or 1));
+++
+++	s/\.[124]([sd])\[/.$1\[/;
+++	s/w#x([0-9]+)/w$1/g;
+++
+++	print $_,"\n";
+++}
+++close STDOUT;
++--- /dev/null
+++++ b/arch/arm64/crypto/poly1305-core.S_shipped
++@@ -0,0 +1,835 @@
+++#ifndef __KERNEL__
+++# include "arm_arch.h"
+++.extern	OPENSSL_armcap_P
+++#endif
+++
+++.text
+++
+++// forward "declarations" are required for Apple
+++.globl	poly1305_blocks
+++.globl	poly1305_emit
+++
+++.globl	poly1305_init
+++.type	poly1305_init,%function
+++.align	5
+++poly1305_init:
+++	cmp	x1,xzr
+++	stp	xzr,xzr,[x0]		// zero hash value
+++	stp	xzr,xzr,[x0,#16]	// [along with is_base2_26]
+++
+++	csel	x0,xzr,x0,eq
+++	b.eq	.Lno_key
+++
+++#ifndef	__KERNEL__
+++	adrp	x17,OPENSSL_armcap_P
+++	ldr	w17,[x17,#:lo12:OPENSSL_armcap_P]
+++#endif
+++
+++	ldp	x7,x8,[x1]		// load key
+++	mov	x9,#0xfffffffc0fffffff
+++	movk	x9,#0x0fff,lsl#48
+++#ifdef	__AARCH64EB__
+++	rev	x7,x7			// flip bytes
+++	rev	x8,x8
+++#endif
+++	and	x7,x7,x9		// &=0ffffffc0fffffff
+++	and	x9,x9,#-4
+++	and	x8,x8,x9		// &=0ffffffc0ffffffc
+++	mov	w9,#-1
+++	stp	x7,x8,[x0,#32]	// save key value
+++	str	w9,[x0,#48]	// impossible key power value
+++
+++#ifndef	__KERNEL__
+++	tst	w17,#ARMV7_NEON
+++
+++	adr	x12,.Lpoly1305_blocks
+++	adr	x7,.Lpoly1305_blocks_neon
+++	adr	x13,.Lpoly1305_emit
+++
+++	csel	x12,x12,x7,eq
+++
+++# ifdef	__ILP32__
+++	stp	w12,w13,[x2]
+++# else
+++	stp	x12,x13,[x2]
+++# endif
+++#endif
+++	mov	x0,#1
+++.Lno_key:
+++	ret
+++.size	poly1305_init,.-poly1305_init
+++
+++.type	poly1305_blocks,%function
+++.align	5
+++poly1305_blocks:
+++.Lpoly1305_blocks:
+++	ands	x2,x2,#-16
+++	b.eq	.Lno_data
+++
+++	ldp	x4,x5,[x0]		// load hash value
+++	ldp	x6,x17,[x0,#16]	// [along with is_base2_26]
+++	ldp	x7,x8,[x0,#32]	// load key value
+++
+++#ifdef	__AARCH64EB__
+++	lsr	x12,x4,#32
+++	mov	w13,w4
+++	lsr	x14,x5,#32
+++	mov	w15,w5
+++	lsr	x16,x6,#32
+++#else
+++	mov	w12,w4
+++	lsr	x13,x4,#32
+++	mov	w14,w5
+++	lsr	x15,x5,#32
+++	mov	w16,w6
+++#endif
+++
+++	add	x12,x12,x13,lsl#26	// base 2^26 -> base 2^64
+++	lsr	x13,x14,#12
+++	adds	x12,x12,x14,lsl#52
+++	add	x13,x13,x15,lsl#14
+++	adc	x13,x13,xzr
+++	lsr	x14,x16,#24
+++	adds	x13,x13,x16,lsl#40
+++	adc	x14,x14,xzr
+++
+++	cmp	x17,#0			// is_base2_26?
+++	add	x9,x8,x8,lsr#2	// s1 = r1 + (r1 >> 2)
+++	csel	x4,x4,x12,eq		// choose between radixes
+++	csel	x5,x5,x13,eq
+++	csel	x6,x6,x14,eq
+++
+++.Loop:
+++	ldp	x10,x11,[x1],#16	// load input
+++	sub	x2,x2,#16
+++#ifdef	__AARCH64EB__
+++	rev	x10,x10
+++	rev	x11,x11
+++#endif
+++	adds	x4,x4,x10		// accumulate input
+++	adcs	x5,x5,x11
+++
+++	mul	x12,x4,x7		// h0*r0
+++	adc	x6,x6,x3
+++	umulh	x13,x4,x7
+++
+++	mul	x10,x5,x9		// h1*5*r1
+++	umulh	x11,x5,x9
+++
+++	adds	x12,x12,x10
+++	mul	x10,x4,x8		// h0*r1
+++	adc	x13,x13,x11
+++	umulh	x14,x4,x8
+++
+++	adds	x13,x13,x10
+++	mul	x10,x5,x7		// h1*r0
+++	adc	x14,x14,xzr
+++	umulh	x11,x5,x7
+++
+++	adds	x13,x13,x10
+++	mul	x10,x6,x9		// h2*5*r1
+++	adc	x14,x14,x11
+++	mul	x11,x6,x7		// h2*r0
+++
+++	adds	x13,x13,x10
+++	adc	x14,x14,x11
+++
+++	and	x10,x14,#-4		// final reduction
+++	and	x6,x14,#3
+++	add	x10,x10,x14,lsr#2
+++	adds	x4,x12,x10
+++	adcs	x5,x13,xzr
+++	adc	x6,x6,xzr
+++
+++	cbnz	x2,.Loop
+++
+++	stp	x4,x5,[x0]		// store hash value
+++	stp	x6,xzr,[x0,#16]	// [and clear is_base2_26]
+++
+++.Lno_data:
+++	ret
+++.size	poly1305_blocks,.-poly1305_blocks
+++
+++.type	poly1305_emit,%function
+++.align	5
+++poly1305_emit:
+++.Lpoly1305_emit:
+++	ldp	x4,x5,[x0]		// load hash base 2^64
+++	ldp	x6,x7,[x0,#16]	// [along with is_base2_26]
+++	ldp	x10,x11,[x2]	// load nonce
+++
+++#ifdef	__AARCH64EB__
+++	lsr	x12,x4,#32
+++	mov	w13,w4
+++	lsr	x14,x5,#32
+++	mov	w15,w5
+++	lsr	x16,x6,#32
+++#else
+++	mov	w12,w4
+++	lsr	x13,x4,#32
+++	mov	w14,w5
+++	lsr	x15,x5,#32
+++	mov	w16,w6
+++#endif
+++
+++	add	x12,x12,x13,lsl#26	// base 2^26 -> base 2^64
+++	lsr	x13,x14,#12
+++	adds	x12,x12,x14,lsl#52
+++	add	x13,x13,x15,lsl#14
+++	adc	x13,x13,xzr
+++	lsr	x14,x16,#24
+++	adds	x13,x13,x16,lsl#40
+++	adc	x14,x14,xzr
+++
+++	cmp	x7,#0			// is_base2_26?
+++	csel	x4,x4,x12,eq		// choose between radixes
+++	csel	x5,x5,x13,eq
+++	csel	x6,x6,x14,eq
+++
+++	adds	x12,x4,#5		// compare to modulus
+++	adcs	x13,x5,xzr
+++	adc	x14,x6,xzr
+++
+++	tst	x14,#-4			// see if it's carried/borrowed
+++
+++	csel	x4,x4,x12,eq
+++	csel	x5,x5,x13,eq
+++
+++#ifdef	__AARCH64EB__
+++	ror	x10,x10,#32		// flip nonce words
+++	ror	x11,x11,#32
+++#endif
+++	adds	x4,x4,x10		// accumulate nonce
+++	adc	x5,x5,x11
+++#ifdef	__AARCH64EB__
+++	rev	x4,x4			// flip output bytes
+++	rev	x5,x5
+++#endif
+++	stp	x4,x5,[x1]		// write result
+++
+++	ret
+++.size	poly1305_emit,.-poly1305_emit
+++.type	poly1305_mult,%function
+++.align	5
+++poly1305_mult:
+++	mul	x12,x4,x7		// h0*r0
+++	umulh	x13,x4,x7
+++
+++	mul	x10,x5,x9		// h1*5*r1
+++	umulh	x11,x5,x9
+++
+++	adds	x12,x12,x10
+++	mul	x10,x4,x8		// h0*r1
+++	adc	x13,x13,x11
+++	umulh	x14,x4,x8
+++
+++	adds	x13,x13,x10
+++	mul	x10,x5,x7		// h1*r0
+++	adc	x14,x14,xzr
+++	umulh	x11,x5,x7
+++
+++	adds	x13,x13,x10
+++	mul	x10,x6,x9		// h2*5*r1
+++	adc	x14,x14,x11
+++	mul	x11,x6,x7		// h2*r0
+++
+++	adds	x13,x13,x10
+++	adc	x14,x14,x11
+++
+++	and	x10,x14,#-4		// final reduction
+++	and	x6,x14,#3
+++	add	x10,x10,x14,lsr#2
+++	adds	x4,x12,x10
+++	adcs	x5,x13,xzr
+++	adc	x6,x6,xzr
+++
+++	ret
+++.size	poly1305_mult,.-poly1305_mult
+++
+++.type	poly1305_splat,%function
+++.align	4
+++poly1305_splat:
+++	and	x12,x4,#0x03ffffff	// base 2^64 -> base 2^26
+++	ubfx	x13,x4,#26,#26
+++	extr	x14,x5,x4,#52
+++	and	x14,x14,#0x03ffffff
+++	ubfx	x15,x5,#14,#26
+++	extr	x16,x6,x5,#40
+++
+++	str	w12,[x0,#16*0]	// r0
+++	add	w12,w13,w13,lsl#2	// r1*5
+++	str	w13,[x0,#16*1]	// r1
+++	add	w13,w14,w14,lsl#2	// r2*5
+++	str	w12,[x0,#16*2]	// s1
+++	str	w14,[x0,#16*3]	// r2
+++	add	w14,w15,w15,lsl#2	// r3*5
+++	str	w13,[x0,#16*4]	// s2
+++	str	w15,[x0,#16*5]	// r3
+++	add	w15,w16,w16,lsl#2	// r4*5
+++	str	w14,[x0,#16*6]	// s3
+++	str	w16,[x0,#16*7]	// r4
+++	str	w15,[x0,#16*8]	// s4
+++
+++	ret
+++.size	poly1305_splat,.-poly1305_splat
+++
+++#ifdef	__KERNEL__
+++.globl	poly1305_blocks_neon
+++#endif
+++.type	poly1305_blocks_neon,%function
+++.align	5
+++poly1305_blocks_neon:
+++.Lpoly1305_blocks_neon:
+++	ldr	x17,[x0,#24]
+++	cmp	x2,#128
+++	b.lo	.Lpoly1305_blocks
+++
+++	.inst	0xd503233f		// paciasp
+++	stp	x29,x30,[sp,#-80]!
+++	add	x29,sp,#0
+++
+++	stp	d8,d9,[sp,#16]		// meet ABI requirements
+++	stp	d10,d11,[sp,#32]
+++	stp	d12,d13,[sp,#48]
+++	stp	d14,d15,[sp,#64]
+++
+++	cbz	x17,.Lbase2_64_neon
+++
+++	ldp	w10,w11,[x0]		// load hash value base 2^26
+++	ldp	w12,w13,[x0,#8]
+++	ldr	w14,[x0,#16]
+++
+++	tst	x2,#31
+++	b.eq	.Leven_neon
+++
+++	ldp	x7,x8,[x0,#32]	// load key value
+++
+++	add	x4,x10,x11,lsl#26	// base 2^26 -> base 2^64
+++	lsr	x5,x12,#12
+++	adds	x4,x4,x12,lsl#52
+++	add	x5,x5,x13,lsl#14
+++	adc	x5,x5,xzr
+++	lsr	x6,x14,#24
+++	adds	x5,x5,x14,lsl#40
+++	adc	x14,x6,xzr		// can be partially reduced...
+++
+++	ldp	x12,x13,[x1],#16	// load input
+++	sub	x2,x2,#16
+++	add	x9,x8,x8,lsr#2	// s1 = r1 + (r1 >> 2)
+++
+++#ifdef	__AARCH64EB__
+++	rev	x12,x12
+++	rev	x13,x13
+++#endif
+++	adds	x4,x4,x12		// accumulate input
+++	adcs	x5,x5,x13
+++	adc	x6,x6,x3
+++
+++	bl	poly1305_mult
+++
+++	and	x10,x4,#0x03ffffff	// base 2^64 -> base 2^26
+++	ubfx	x11,x4,#26,#26
+++	extr	x12,x5,x4,#52
+++	and	x12,x12,#0x03ffffff
+++	ubfx	x13,x5,#14,#26
+++	extr	x14,x6,x5,#40
+++
+++	b	.Leven_neon
+++
+++.align	4
+++.Lbase2_64_neon:
+++	ldp	x7,x8,[x0,#32]	// load key value
+++
+++	ldp	x4,x5,[x0]		// load hash value base 2^64
+++	ldr	x6,[x0,#16]
+++
+++	tst	x2,#31
+++	b.eq	.Linit_neon
+++
+++	ldp	x12,x13,[x1],#16	// load input
+++	sub	x2,x2,#16
+++	add	x9,x8,x8,lsr#2	// s1 = r1 + (r1 >> 2)
+++#ifdef	__AARCH64EB__
+++	rev	x12,x12
+++	rev	x13,x13
+++#endif
+++	adds	x4,x4,x12		// accumulate input
+++	adcs	x5,x5,x13
+++	adc	x6,x6,x3
+++
+++	bl	poly1305_mult
+++
+++.Linit_neon:
+++	ldr	w17,[x0,#48]		// first table element
+++	and	x10,x4,#0x03ffffff	// base 2^64 -> base 2^26
+++	ubfx	x11,x4,#26,#26
+++	extr	x12,x5,x4,#52
+++	and	x12,x12,#0x03ffffff
+++	ubfx	x13,x5,#14,#26
+++	extr	x14,x6,x5,#40
+++
+++	cmp	w17,#-1			// is value impossible?
+++	b.ne	.Leven_neon
+++
+++	fmov	d24,x10
+++	fmov	d25,x11
+++	fmov	d26,x12
+++	fmov	d27,x13
+++	fmov	d28,x14
+++
+++	////////////////////////////////// initialize r^n table
+++	mov	x4,x7			// r^1
+++	add	x9,x8,x8,lsr#2	// s1 = r1 + (r1 >> 2)
+++	mov	x5,x8
+++	mov	x6,xzr
+++	add	x0,x0,#48+12
+++	bl	poly1305_splat
+++
+++	bl	poly1305_mult		// r^2
+++	sub	x0,x0,#4
+++	bl	poly1305_splat
+++
+++	bl	poly1305_mult		// r^3
+++	sub	x0,x0,#4
+++	bl	poly1305_splat
+++
+++	bl	poly1305_mult		// r^4
+++	sub	x0,x0,#4
+++	bl	poly1305_splat
+++	sub	x0,x0,#48		// restore original x0
+++	b	.Ldo_neon
+++
+++.align	4
+++.Leven_neon:
+++	fmov	d24,x10
+++	fmov	d25,x11
+++	fmov	d26,x12
+++	fmov	d27,x13
+++	fmov	d28,x14
+++
+++.Ldo_neon:
+++	ldp	x8,x12,[x1,#32]	// inp[2:3]
+++	subs	x2,x2,#64
+++	ldp	x9,x13,[x1,#48]
+++	add	x16,x1,#96
+++	adr	x17,.Lzeros
+++
+++	lsl	x3,x3,#24
+++	add	x15,x0,#48
+++
+++#ifdef	__AARCH64EB__
+++	rev	x8,x8
+++	rev	x12,x12
+++	rev	x9,x9
+++	rev	x13,x13
+++#endif
+++	and	x4,x8,#0x03ffffff	// base 2^64 -> base 2^26
+++	and	x5,x9,#0x03ffffff
+++	ubfx	x6,x8,#26,#26
+++	ubfx	x7,x9,#26,#26
+++	add	x4,x4,x5,lsl#32		// bfi	x4,x5,#32,#32
+++	extr	x8,x12,x8,#52
+++	extr	x9,x13,x9,#52
+++	add	x6,x6,x7,lsl#32		// bfi	x6,x7,#32,#32
+++	fmov	d14,x4
+++	and	x8,x8,#0x03ffffff
+++	and	x9,x9,#0x03ffffff
+++	ubfx	x10,x12,#14,#26
+++	ubfx	x11,x13,#14,#26
+++	add	x12,x3,x12,lsr#40
+++	add	x13,x3,x13,lsr#40
+++	add	x8,x8,x9,lsl#32		// bfi	x8,x9,#32,#32
+++	fmov	d15,x6
+++	add	x10,x10,x11,lsl#32	// bfi	x10,x11,#32,#32
+++	add	x12,x12,x13,lsl#32	// bfi	x12,x13,#32,#32
+++	fmov	d16,x8
+++	fmov	d17,x10
+++	fmov	d18,x12
+++
+++	ldp	x8,x12,[x1],#16	// inp[0:1]
+++	ldp	x9,x13,[x1],#48
+++
+++	ld1	{v0.4s,v1.4s,v2.4s,v3.4s},[x15],#64
+++	ld1	{v4.4s,v5.4s,v6.4s,v7.4s},[x15],#64
+++	ld1	{v8.4s},[x15]
+++
+++#ifdef	__AARCH64EB__
+++	rev	x8,x8
+++	rev	x12,x12
+++	rev	x9,x9
+++	rev	x13,x13
+++#endif
+++	and	x4,x8,#0x03ffffff	// base 2^64 -> base 2^26
+++	and	x5,x9,#0x03ffffff
+++	ubfx	x6,x8,#26,#26
+++	ubfx	x7,x9,#26,#26
+++	add	x4,x4,x5,lsl#32		// bfi	x4,x5,#32,#32
+++	extr	x8,x12,x8,#52
+++	extr	x9,x13,x9,#52
+++	add	x6,x6,x7,lsl#32		// bfi	x6,x7,#32,#32
+++	fmov	d9,x4
+++	and	x8,x8,#0x03ffffff
+++	and	x9,x9,#0x03ffffff
+++	ubfx	x10,x12,#14,#26
+++	ubfx	x11,x13,#14,#26
+++	add	x12,x3,x12,lsr#40
+++	add	x13,x3,x13,lsr#40
+++	add	x8,x8,x9,lsl#32		// bfi	x8,x9,#32,#32
+++	fmov	d10,x6
+++	add	x10,x10,x11,lsl#32	// bfi	x10,x11,#32,#32
+++	add	x12,x12,x13,lsl#32	// bfi	x12,x13,#32,#32
+++	movi	v31.2d,#-1
+++	fmov	d11,x8
+++	fmov	d12,x10
+++	fmov	d13,x12
+++	ushr	v31.2d,v31.2d,#38
+++
+++	b.ls	.Lskip_loop
+++
+++.align	4
+++.Loop_neon:
+++	////////////////////////////////////////////////////////////////
+++	// ((inp[0]*r^4+inp[2]*r^2+inp[4])*r^4+inp[6]*r^2
+++	// ((inp[1]*r^4+inp[3]*r^2+inp[5])*r^3+inp[7]*r
+++	//   ___________________/
+++	// ((inp[0]*r^4+inp[2]*r^2+inp[4])*r^4+inp[6]*r^2+inp[8])*r^2
+++	// ((inp[1]*r^4+inp[3]*r^2+inp[5])*r^4+inp[7]*r^2+inp[9])*r
+++	//   ___________________/ ____________________/
+++	//
+++	// Note that we start with inp[2:3]*r^2. This is because it
+++	// doesn't depend on reduction in previous iteration.
+++	////////////////////////////////////////////////////////////////
+++	// d4 = h0*r4 + h1*r3   + h2*r2   + h3*r1   + h4*r0
+++	// d3 = h0*r3 + h1*r2   + h2*r1   + h3*r0   + h4*5*r4
+++	// d2 = h0*r2 + h1*r1   + h2*r0   + h3*5*r4 + h4*5*r3
+++	// d1 = h0*r1 + h1*r0   + h2*5*r4 + h3*5*r3 + h4*5*r2
+++	// d0 = h0*r0 + h1*5*r4 + h2*5*r3 + h3*5*r2 + h4*5*r1
+++
+++	subs	x2,x2,#64
+++	umull	v23.2d,v14.2s,v7.s[2]
+++	csel	x16,x17,x16,lo
+++	umull	v22.2d,v14.2s,v5.s[2]
+++	umull	v21.2d,v14.2s,v3.s[2]
+++	 ldp	x8,x12,[x16],#16	// inp[2:3] (or zero)
+++	umull	v20.2d,v14.2s,v1.s[2]
+++	 ldp	x9,x13,[x16],#48
+++	umull	v19.2d,v14.2s,v0.s[2]
+++#ifdef	__AARCH64EB__
+++	 rev	x8,x8
+++	 rev	x12,x12
+++	 rev	x9,x9
+++	 rev	x13,x13
+++#endif
+++
+++	umlal	v23.2d,v15.2s,v5.s[2]
+++	 and	x4,x8,#0x03ffffff	// base 2^64 -> base 2^26
+++	umlal	v22.2d,v15.2s,v3.s[2]
+++	 and	x5,x9,#0x03ffffff
+++	umlal	v21.2d,v15.2s,v1.s[2]
+++	 ubfx	x6,x8,#26,#26
+++	umlal	v20.2d,v15.2s,v0.s[2]
+++	 ubfx	x7,x9,#26,#26
+++	umlal	v19.2d,v15.2s,v8.s[2]
+++	 add	x4,x4,x5,lsl#32		// bfi	x4,x5,#32,#32
+++
+++	umlal	v23.2d,v16.2s,v3.s[2]
+++	 extr	x8,x12,x8,#52
+++	umlal	v22.2d,v16.2s,v1.s[2]
+++	 extr	x9,x13,x9,#52
+++	umlal	v21.2d,v16.2s,v0.s[2]
+++	 add	x6,x6,x7,lsl#32		// bfi	x6,x7,#32,#32
+++	umlal	v20.2d,v16.2s,v8.s[2]
+++	 fmov	d14,x4
+++	umlal	v19.2d,v16.2s,v6.s[2]
+++	 and	x8,x8,#0x03ffffff
+++
+++	umlal	v23.2d,v17.2s,v1.s[2]
+++	 and	x9,x9,#0x03ffffff
+++	umlal	v22.2d,v17.2s,v0.s[2]
+++	 ubfx	x10,x12,#14,#26
+++	umlal	v21.2d,v17.2s,v8.s[2]
+++	 ubfx	x11,x13,#14,#26
+++	umlal	v20.2d,v17.2s,v6.s[2]
+++	 add	x8,x8,x9,lsl#32		// bfi	x8,x9,#32,#32
+++	umlal	v19.2d,v17.2s,v4.s[2]
+++	 fmov	d15,x6
+++
+++	add	v11.2s,v11.2s,v26.2s
+++	 add	x12,x3,x12,lsr#40
+++	umlal	v23.2d,v18.2s,v0.s[2]
+++	 add	x13,x3,x13,lsr#40
+++	umlal	v22.2d,v18.2s,v8.s[2]
+++	 add	x10,x10,x11,lsl#32	// bfi	x10,x11,#32,#32
+++	umlal	v21.2d,v18.2s,v6.s[2]
+++	 add	x12,x12,x13,lsl#32	// bfi	x12,x13,#32,#32
+++	umlal	v20.2d,v18.2s,v4.s[2]
+++	 fmov	d16,x8
+++	umlal	v19.2d,v18.2s,v2.s[2]
+++	 fmov	d17,x10
+++
+++	////////////////////////////////////////////////////////////////
+++	// (hash+inp[0:1])*r^4 and accumulate
+++
+++	add	v9.2s,v9.2s,v24.2s
+++	 fmov	d18,x12
+++	umlal	v22.2d,v11.2s,v1.s[0]
+++	 ldp	x8,x12,[x1],#16	// inp[0:1]
+++	umlal	v19.2d,v11.2s,v6.s[0]
+++	 ldp	x9,x13,[x1],#48
+++	umlal	v23.2d,v11.2s,v3.s[0]
+++	umlal	v20.2d,v11.2s,v8.s[0]
+++	umlal	v21.2d,v11.2s,v0.s[0]
+++#ifdef	__AARCH64EB__
+++	 rev	x8,x8
+++	 rev	x12,x12
+++	 rev	x9,x9
+++	 rev	x13,x13
+++#endif
+++
+++	add	v10.2s,v10.2s,v25.2s
+++	umlal	v22.2d,v9.2s,v5.s[0]
+++	umlal	v23.2d,v9.2s,v7.s[0]
+++	 and	x4,x8,#0x03ffffff	// base 2^64 -> base 2^26
+++	umlal	v21.2d,v9.2s,v3.s[0]
+++	 and	x5,x9,#0x03ffffff
+++	umlal	v19.2d,v9.2s,v0.s[0]
+++	 ubfx	x6,x8,#26,#26
+++	umlal	v20.2d,v9.2s,v1.s[0]
+++	 ubfx	x7,x9,#26,#26
+++
+++	add	v12.2s,v12.2s,v27.2s
+++	 add	x4,x4,x5,lsl#32		// bfi	x4,x5,#32,#32
+++	umlal	v22.2d,v10.2s,v3.s[0]
+++	 extr	x8,x12,x8,#52
+++	umlal	v23.2d,v10.2s,v5.s[0]
+++	 extr	x9,x13,x9,#52
+++	umlal	v19.2d,v10.2s,v8.s[0]
+++	 add	x6,x6,x7,lsl#32		// bfi	x6,x7,#32,#32
+++	umlal	v21.2d,v10.2s,v1.s[0]
+++	 fmov	d9,x4
+++	umlal	v20.2d,v10.2s,v0.s[0]
+++	 and	x8,x8,#0x03ffffff
+++
+++	add	v13.2s,v13.2s,v28.2s
+++	 and	x9,x9,#0x03ffffff
+++	umlal	v22.2d,v12.2s,v0.s[0]
+++	 ubfx	x10,x12,#14,#26
+++	umlal	v19.2d,v12.2s,v4.s[0]
+++	 ubfx	x11,x13,#14,#26
+++	umlal	v23.2d,v12.2s,v1.s[0]
+++	 add	x8,x8,x9,lsl#32		// bfi	x8,x9,#32,#32
+++	umlal	v20.2d,v12.2s,v6.s[0]
+++	 fmov	d10,x6
+++	umlal	v21.2d,v12.2s,v8.s[0]
+++	 add	x12,x3,x12,lsr#40
+++
+++	umlal	v22.2d,v13.2s,v8.s[0]
+++	 add	x13,x3,x13,lsr#40
+++	umlal	v19.2d,v13.2s,v2.s[0]
+++	 add	x10,x10,x11,lsl#32	// bfi	x10,x11,#32,#32
+++	umlal	v23.2d,v13.2s,v0.s[0]
+++	 add	x12,x12,x13,lsl#32	// bfi	x12,x13,#32,#32
+++	umlal	v20.2d,v13.2s,v4.s[0]
+++	 fmov	d11,x8
+++	umlal	v21.2d,v13.2s,v6.s[0]
+++	 fmov	d12,x10
+++	 fmov	d13,x12
+++
+++	/////////////////////////////////////////////////////////////////
+++	// lazy reduction as discussed in "NEON crypto" by D.J. Bernstein
+++	// and P. Schwabe
+++	//
+++	// [see discussion in poly1305-armv4 module]
+++
+++	ushr	v29.2d,v22.2d,#26
+++	xtn	v27.2s,v22.2d
+++	 ushr	v30.2d,v19.2d,#26
+++	 and	v19.16b,v19.16b,v31.16b
+++	add	v23.2d,v23.2d,v29.2d	// h3 -> h4
+++	bic	v27.2s,#0xfc,lsl#24	// &=0x03ffffff
+++	 add	v20.2d,v20.2d,v30.2d	// h0 -> h1
+++
+++	ushr	v29.2d,v23.2d,#26
+++	xtn	v28.2s,v23.2d
+++	 ushr	v30.2d,v20.2d,#26
+++	 xtn	v25.2s,v20.2d
+++	bic	v28.2s,#0xfc,lsl#24
+++	 add	v21.2d,v21.2d,v30.2d	// h1 -> h2
+++
+++	add	v19.2d,v19.2d,v29.2d
+++	shl	v29.2d,v29.2d,#2
+++	 shrn	v30.2s,v21.2d,#26
+++	 xtn	v26.2s,v21.2d
+++	add	v19.2d,v19.2d,v29.2d	// h4 -> h0
+++	 bic	v25.2s,#0xfc,lsl#24
+++	 add	v27.2s,v27.2s,v30.2s		// h2 -> h3
+++	 bic	v26.2s,#0xfc,lsl#24
+++
+++	shrn	v29.2s,v19.2d,#26
+++	xtn	v24.2s,v19.2d
+++	 ushr	v30.2s,v27.2s,#26
+++	 bic	v27.2s,#0xfc,lsl#24
+++	 bic	v24.2s,#0xfc,lsl#24
+++	add	v25.2s,v25.2s,v29.2s		// h0 -> h1
+++	 add	v28.2s,v28.2s,v30.2s		// h3 -> h4
+++
+++	b.hi	.Loop_neon
+++
+++.Lskip_loop:
+++	dup	v16.2d,v16.d[0]
+++	add	v11.2s,v11.2s,v26.2s
+++
+++	////////////////////////////////////////////////////////////////
+++	// multiply (inp[0:1]+hash) or inp[2:3] by r^2:r^1
+++
+++	adds	x2,x2,#32
+++	b.ne	.Long_tail
+++
+++	dup	v16.2d,v11.d[0]
+++	add	v14.2s,v9.2s,v24.2s
+++	add	v17.2s,v12.2s,v27.2s
+++	add	v15.2s,v10.2s,v25.2s
+++	add	v18.2s,v13.2s,v28.2s
+++
+++.Long_tail:
+++	dup	v14.2d,v14.d[0]
+++	umull2	v19.2d,v16.4s,v6.4s
+++	umull2	v22.2d,v16.4s,v1.4s
+++	umull2	v23.2d,v16.4s,v3.4s
+++	umull2	v21.2d,v16.4s,v0.4s
+++	umull2	v20.2d,v16.4s,v8.4s
+++
+++	dup	v15.2d,v15.d[0]
+++	umlal2	v19.2d,v14.4s,v0.4s
+++	umlal2	v21.2d,v14.4s,v3.4s
+++	umlal2	v22.2d,v14.4s,v5.4s
+++	umlal2	v23.2d,v14.4s,v7.4s
+++	umlal2	v20.2d,v14.4s,v1.4s
+++
+++	dup	v17.2d,v17.d[0]
+++	umlal2	v19.2d,v15.4s,v8.4s
+++	umlal2	v22.2d,v15.4s,v3.4s
+++	umlal2	v21.2d,v15.4s,v1.4s
+++	umlal2	v23.2d,v15.4s,v5.4s
+++	umlal2	v20.2d,v15.4s,v0.4s
+++
+++	dup	v18.2d,v18.d[0]
+++	umlal2	v22.2d,v17.4s,v0.4s
+++	umlal2	v23.2d,v17.4s,v1.4s
+++	umlal2	v19.2d,v17.4s,v4.4s
+++	umlal2	v20.2d,v17.4s,v6.4s
+++	umlal2	v21.2d,v17.4s,v8.4s
+++
+++	umlal2	v22.2d,v18.4s,v8.4s
+++	umlal2	v19.2d,v18.4s,v2.4s
+++	umlal2	v23.2d,v18.4s,v0.4s
+++	umlal2	v20.2d,v18.4s,v4.4s
+++	umlal2	v21.2d,v18.4s,v6.4s
+++
+++	b.eq	.Lshort_tail
+++
+++	////////////////////////////////////////////////////////////////
+++	// (hash+inp[0:1])*r^4:r^3 and accumulate
+++
+++	add	v9.2s,v9.2s,v24.2s
+++	umlal	v22.2d,v11.2s,v1.2s
+++	umlal	v19.2d,v11.2s,v6.2s
+++	umlal	v23.2d,v11.2s,v3.2s
+++	umlal	v20.2d,v11.2s,v8.2s
+++	umlal	v21.2d,v11.2s,v0.2s
+++
+++	add	v10.2s,v10.2s,v25.2s
+++	umlal	v22.2d,v9.2s,v5.2s
+++	umlal	v19.2d,v9.2s,v0.2s
+++	umlal	v23.2d,v9.2s,v7.2s
+++	umlal	v20.2d,v9.2s,v1.2s
+++	umlal	v21.2d,v9.2s,v3.2s
+++
+++	add	v12.2s,v12.2s,v27.2s
+++	umlal	v22.2d,v10.2s,v3.2s
+++	umlal	v19.2d,v10.2s,v8.2s
+++	umlal	v23.2d,v10.2s,v5.2s
+++	umlal	v20.2d,v10.2s,v0.2s
+++	umlal	v21.2d,v10.2s,v1.2s
+++
+++	add	v13.2s,v13.2s,v28.2s
+++	umlal	v22.2d,v12.2s,v0.2s
+++	umlal	v19.2d,v12.2s,v4.2s
+++	umlal	v23.2d,v12.2s,v1.2s
+++	umlal	v20.2d,v12.2s,v6.2s
+++	umlal	v21.2d,v12.2s,v8.2s
+++
+++	umlal	v22.2d,v13.2s,v8.2s
+++	umlal	v19.2d,v13.2s,v2.2s
+++	umlal	v23.2d,v13.2s,v0.2s
+++	umlal	v20.2d,v13.2s,v4.2s
+++	umlal	v21.2d,v13.2s,v6.2s
+++
+++.Lshort_tail:
+++	////////////////////////////////////////////////////////////////
+++	// horizontal add
+++
+++	addp	v22.2d,v22.2d,v22.2d
+++	 ldp	d8,d9,[sp,#16]		// meet ABI requirements
+++	addp	v19.2d,v19.2d,v19.2d
+++	 ldp	d10,d11,[sp,#32]
+++	addp	v23.2d,v23.2d,v23.2d
+++	 ldp	d12,d13,[sp,#48]
+++	addp	v20.2d,v20.2d,v20.2d
+++	 ldp	d14,d15,[sp,#64]
+++	addp	v21.2d,v21.2d,v21.2d
+++	 ldr	x30,[sp,#8]
+++	 .inst	0xd50323bf		// autiasp
+++
+++	////////////////////////////////////////////////////////////////
+++	// lazy reduction, but without narrowing
+++
+++	ushr	v29.2d,v22.2d,#26
+++	and	v22.16b,v22.16b,v31.16b
+++	 ushr	v30.2d,v19.2d,#26
+++	 and	v19.16b,v19.16b,v31.16b
+++
+++	add	v23.2d,v23.2d,v29.2d	// h3 -> h4
+++	 add	v20.2d,v20.2d,v30.2d	// h0 -> h1
+++
+++	ushr	v29.2d,v23.2d,#26
+++	and	v23.16b,v23.16b,v31.16b
+++	 ushr	v30.2d,v20.2d,#26
+++	 and	v20.16b,v20.16b,v31.16b
+++	 add	v21.2d,v21.2d,v30.2d	// h1 -> h2
+++
+++	add	v19.2d,v19.2d,v29.2d
+++	shl	v29.2d,v29.2d,#2
+++	 ushr	v30.2d,v21.2d,#26
+++	 and	v21.16b,v21.16b,v31.16b
+++	add	v19.2d,v19.2d,v29.2d	// h4 -> h0
+++	 add	v22.2d,v22.2d,v30.2d	// h2 -> h3
+++
+++	ushr	v29.2d,v19.2d,#26
+++	and	v19.16b,v19.16b,v31.16b
+++	 ushr	v30.2d,v22.2d,#26
+++	 and	v22.16b,v22.16b,v31.16b
+++	add	v20.2d,v20.2d,v29.2d	// h0 -> h1
+++	 add	v23.2d,v23.2d,v30.2d	// h3 -> h4
+++
+++	////////////////////////////////////////////////////////////////
+++	// write the result, can be partially reduced
+++
+++	st4	{v19.s,v20.s,v21.s,v22.s}[0],[x0],#16
+++	mov	x4,#1
+++	st1	{v23.s}[0],[x0]
+++	str	x4,[x0,#8]		// set is_base2_26
+++
+++	ldr	x29,[sp],#80
+++	ret
+++.size	poly1305_blocks_neon,.-poly1305_blocks_neon
+++
+++.align	5
+++.Lzeros:
+++.long	0,0,0,0,0,0,0,0
+++.asciz	"Poly1305 for ARMv8, CRYPTOGAMS by @dot-asm"
+++.align	2
+++#if !defined(__KERNEL__) && !defined(_WIN64)
+++.comm	OPENSSL_armcap_P,4,4
+++.hidden	OPENSSL_armcap_P
+++#endif
++--- /dev/null
+++++ b/arch/arm64/crypto/poly1305-glue.c
++@@ -0,0 +1,237 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * OpenSSL/Cryptogams accelerated Poly1305 transform for arm64
+++ *
+++ * Copyright (C) 2019 Linaro Ltd. <ard.biesheuvel@linaro.org>
+++ */
+++
+++#include <asm/hwcap.h>
+++#include <asm/neon.h>
+++#include <asm/simd.h>
+++#include <asm/unaligned.h>
+++#include <crypto/algapi.h>
+++#include <crypto/internal/hash.h>
+++#include <crypto/internal/poly1305.h>
+++#include <crypto/internal/simd.h>
+++#include <linux/cpufeature.h>
+++#include <linux/crypto.h>
+++#include <linux/jump_label.h>
+++#include <linux/module.h>
+++
+++asmlinkage void poly1305_init_arm64(void *state, const u8 *key);
+++asmlinkage void poly1305_blocks(void *state, const u8 *src, u32 len, u32 hibit);
+++asmlinkage void poly1305_blocks_neon(void *state, const u8 *src, u32 len, u32 hibit);
+++asmlinkage void poly1305_emit(void *state, __le32 *digest, const u32 *nonce);
+++
+++static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);
+++
+++void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 *key)
+++{
+++	poly1305_init_arm64(&dctx->h, key);
+++	dctx->s[0] = get_unaligned_le32(key + 16);
+++	dctx->s[1] = get_unaligned_le32(key + 20);
+++	dctx->s[2] = get_unaligned_le32(key + 24);
+++	dctx->s[3] = get_unaligned_le32(key + 28);
+++	dctx->buflen = 0;
+++}
+++EXPORT_SYMBOL(poly1305_init_arch);
+++
+++static int neon_poly1305_init(struct shash_desc *desc)
+++{
+++	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
+++
+++	dctx->buflen = 0;
+++	dctx->rset = 0;
+++	dctx->sset = false;
+++
+++	return 0;
+++}
+++
+++static void neon_poly1305_blocks(struct poly1305_desc_ctx *dctx, const u8 *src,
+++				 u32 len, u32 hibit, bool do_neon)
+++{
+++	if (unlikely(!dctx->sset)) {
+++		if (!dctx->rset) {
+++			poly1305_init_arch(dctx, src);
+++			src += POLY1305_BLOCK_SIZE;
+++			len -= POLY1305_BLOCK_SIZE;
+++			dctx->rset = 1;
+++		}
+++		if (len >= POLY1305_BLOCK_SIZE) {
+++			dctx->s[0] = get_unaligned_le32(src +  0);
+++			dctx->s[1] = get_unaligned_le32(src +  4);
+++			dctx->s[2] = get_unaligned_le32(src +  8);
+++			dctx->s[3] = get_unaligned_le32(src + 12);
+++			src += POLY1305_BLOCK_SIZE;
+++			len -= POLY1305_BLOCK_SIZE;
+++			dctx->sset = true;
+++		}
+++		if (len < POLY1305_BLOCK_SIZE)
+++			return;
+++	}
+++
+++	len &= ~(POLY1305_BLOCK_SIZE - 1);
+++
+++	if (static_branch_likely(&have_neon) && likely(do_neon))
+++		poly1305_blocks_neon(&dctx->h, src, len, hibit);
+++	else
+++		poly1305_blocks(&dctx->h, src, len, hibit);
+++}
+++
+++static void neon_poly1305_do_update(struct poly1305_desc_ctx *dctx,
+++				    const u8 *src, u32 len, bool do_neon)
+++{
+++	if (unlikely(dctx->buflen)) {
+++		u32 bytes = min(len, POLY1305_BLOCK_SIZE - dctx->buflen);
+++
+++		memcpy(dctx->buf + dctx->buflen, src, bytes);
+++		src += bytes;
+++		len -= bytes;
+++		dctx->buflen += bytes;
+++
+++		if (dctx->buflen == POLY1305_BLOCK_SIZE) {
+++			neon_poly1305_blocks(dctx, dctx->buf,
+++					     POLY1305_BLOCK_SIZE, 1, false);
+++			dctx->buflen = 0;
+++		}
+++	}
+++
+++	if (likely(len >= POLY1305_BLOCK_SIZE)) {
+++		neon_poly1305_blocks(dctx, src, len, 1, do_neon);
+++		src += round_down(len, POLY1305_BLOCK_SIZE);
+++		len %= POLY1305_BLOCK_SIZE;
+++	}
+++
+++	if (unlikely(len)) {
+++		dctx->buflen = len;
+++		memcpy(dctx->buf, src, len);
+++	}
+++}
+++
+++static int neon_poly1305_update(struct shash_desc *desc,
+++				const u8 *src, unsigned int srclen)
+++{
+++	bool do_neon = crypto_simd_usable() && srclen > 128;
+++	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
+++
+++	if (static_branch_likely(&have_neon) && do_neon)
+++		kernel_neon_begin();
+++	neon_poly1305_do_update(dctx, src, srclen, do_neon);
+++	if (static_branch_likely(&have_neon) && do_neon)
+++		kernel_neon_end();
+++	return 0;
+++}
+++
+++void poly1305_update_arch(struct poly1305_desc_ctx *dctx, const u8 *src,
+++			  unsigned int nbytes)
+++{
+++	if (unlikely(dctx->buflen)) {
+++		u32 bytes = min(nbytes, POLY1305_BLOCK_SIZE - dctx->buflen);
+++
+++		memcpy(dctx->buf + dctx->buflen, src, bytes);
+++		src += bytes;
+++		nbytes -= bytes;
+++		dctx->buflen += bytes;
+++
+++		if (dctx->buflen == POLY1305_BLOCK_SIZE) {
+++			poly1305_blocks(&dctx->h, dctx->buf, POLY1305_BLOCK_SIZE, 1);
+++			dctx->buflen = 0;
+++		}
+++	}
+++
+++	if (likely(nbytes >= POLY1305_BLOCK_SIZE)) {
+++		unsigned int len = round_down(nbytes, POLY1305_BLOCK_SIZE);
+++
+++		if (static_branch_likely(&have_neon) && crypto_simd_usable()) {
+++			kernel_neon_begin();
+++			poly1305_blocks_neon(&dctx->h, src, len, 1);
+++			kernel_neon_end();
+++		} else {
+++			poly1305_blocks(&dctx->h, src, len, 1);
+++		}
+++		src += len;
+++		nbytes %= POLY1305_BLOCK_SIZE;
+++	}
+++
+++	if (unlikely(nbytes)) {
+++		dctx->buflen = nbytes;
+++		memcpy(dctx->buf, src, nbytes);
+++	}
+++}
+++EXPORT_SYMBOL(poly1305_update_arch);
+++
+++void poly1305_final_arch(struct poly1305_desc_ctx *dctx, u8 *dst)
+++{
+++	__le32 digest[4];
+++	u64 f = 0;
+++
+++	if (unlikely(dctx->buflen)) {
+++		dctx->buf[dctx->buflen++] = 1;
+++		memset(dctx->buf + dctx->buflen, 0,
+++		       POLY1305_BLOCK_SIZE - dctx->buflen);
+++		poly1305_blocks(&dctx->h, dctx->buf, POLY1305_BLOCK_SIZE, 0);
+++	}
+++
+++	poly1305_emit(&dctx->h, digest, dctx->s);
+++
+++	/* mac = (h + s) % (2^128) */
+++	f = (f >> 32) + le32_to_cpu(digest[0]);
+++	put_unaligned_le32(f, dst);
+++	f = (f >> 32) + le32_to_cpu(digest[1]);
+++	put_unaligned_le32(f, dst + 4);
+++	f = (f >> 32) + le32_to_cpu(digest[2]);
+++	put_unaligned_le32(f, dst + 8);
+++	f = (f >> 32) + le32_to_cpu(digest[3]);
+++	put_unaligned_le32(f, dst + 12);
+++
+++	*dctx = (struct poly1305_desc_ctx){};
+++}
+++EXPORT_SYMBOL(poly1305_final_arch);
+++
+++static int neon_poly1305_final(struct shash_desc *desc, u8 *dst)
+++{
+++	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
+++
+++	if (unlikely(!dctx->sset))
+++		return -ENOKEY;
+++
+++	poly1305_final_arch(dctx, dst);
+++	return 0;
+++}
+++
+++static struct shash_alg neon_poly1305_alg = {
+++	.init			= neon_poly1305_init,
+++	.update			= neon_poly1305_update,
+++	.final			= neon_poly1305_final,
+++	.digestsize		= POLY1305_DIGEST_SIZE,
+++	.descsize		= sizeof(struct poly1305_desc_ctx),
+++
+++	.base.cra_name		= "poly1305",
+++	.base.cra_driver_name	= "poly1305-neon",
+++	.base.cra_priority	= 200,
+++	.base.cra_blocksize	= POLY1305_BLOCK_SIZE,
+++	.base.cra_module	= THIS_MODULE,
+++};
+++
+++static int __init neon_poly1305_mod_init(void)
+++{
+++	if (!cpu_have_named_feature(ASIMD))
+++		return 0;
+++
+++	static_branch_enable(&have_neon);
+++
+++	return crypto_register_shash(&neon_poly1305_alg);
+++}
+++
+++static void __exit neon_poly1305_mod_exit(void)
+++{
+++	if (cpu_have_named_feature(ASIMD))
+++		crypto_unregister_shash(&neon_poly1305_alg);
+++}
+++
+++module_init(neon_poly1305_mod_init);
+++module_exit(neon_poly1305_mod_exit);
+++
+++MODULE_LICENSE("GPL v2");
+++MODULE_ALIAS_CRYPTO("poly1305");
+++MODULE_ALIAS_CRYPTO("poly1305-neon");
++--- a/lib/crypto/Kconfig
+++++ b/lib/crypto/Kconfig
++@@ -40,6 +40,7 @@ config CRYPTO_LIB_DES
++ config CRYPTO_LIB_POLY1305_RSIZE
++ 	int
++ 	default 4 if X86_64
+++	default 9 if ARM64
++ 	default 1
++ 
++ config CRYPTO_ARCH_HAVE_LIB_POLY1305
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0019-crypto-arm-poly1305-incorporate-OpenSSL-CRYPTOGAMS-N.patch b/target/linux/generic/backport-5.4/080-wireguard-0019-crypto-arm-poly1305-incorporate-OpenSSL-CRYPTOGAMS-N.patch
+new file mode 100644
+index 0000000000..367b20fc3a
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0019-crypto-arm-poly1305-incorporate-OpenSSL-CRYPTOGAMS-N.patch
+@@ -0,0 +1,2776 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:25 +0100
++Subject: [PATCH] crypto: arm/poly1305 - incorporate OpenSSL/CRYPTOGAMS NEON
++ implementation
++
++commit a6b803b3ddc793d6db0c16f12fc12d30d20fa9cc upstream.
++
++This is a straight import of the OpenSSL/CRYPTOGAMS Poly1305 implementation
++for NEON authored by Andy Polyakov, and contributed by him to the OpenSSL
++project. The file 'poly1305-armv4.pl' is taken straight from this upstream
++GitHub repository [0] at commit ec55a08dc0244ce570c4fc7cade330c60798952f,
++and already contains all the changes required to build it as part of a
++Linux kernel module.
++
++[0] https://github.com/dot-asm/cryptogams
++
++Co-developed-by: Andy Polyakov <appro@cryptogams.org>
++Signed-off-by: Andy Polyakov <appro@cryptogams.org>
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/Kconfig                 |    5 +
++ arch/arm/crypto/Makefile                |   12 +-
++ arch/arm/crypto/poly1305-armv4.pl       | 1236 +++++++++++++++++++++++
++ arch/arm/crypto/poly1305-core.S_shipped | 1158 +++++++++++++++++++++
++ arch/arm/crypto/poly1305-glue.c         |  276 +++++
++ lib/crypto/Kconfig                      |    2 +-
++ 6 files changed, 2687 insertions(+), 2 deletions(-)
++ create mode 100644 arch/arm/crypto/poly1305-armv4.pl
++ create mode 100644 arch/arm/crypto/poly1305-core.S_shipped
++ create mode 100644 arch/arm/crypto/poly1305-glue.c
++
++--- a/arch/arm/crypto/Kconfig
+++++ b/arch/arm/crypto/Kconfig
++@@ -131,6 +131,11 @@ config CRYPTO_CHACHA20_NEON
++ 	select CRYPTO_BLKCIPHER
++ 	select CRYPTO_ARCH_HAVE_LIB_CHACHA
++ 
+++config CRYPTO_POLY1305_ARM
+++	tristate "Accelerated scalar and SIMD Poly1305 hash implementations"
+++	select CRYPTO_HASH
+++	select CRYPTO_ARCH_HAVE_LIB_POLY1305
+++
++ config CRYPTO_NHPOLY1305_NEON
++ 	tristate "NEON accelerated NHPoly1305 hash function (for Adiantum)"
++ 	depends on KERNEL_MODE_NEON
++--- a/arch/arm/crypto/Makefile
+++++ b/arch/arm/crypto/Makefile
++@@ -10,6 +10,7 @@ obj-$(CONFIG_CRYPTO_SHA1_ARM_NEON) += sh
++ obj-$(CONFIG_CRYPTO_SHA256_ARM) += sha256-arm.o
++ obj-$(CONFIG_CRYPTO_SHA512_ARM) += sha512-arm.o
++ obj-$(CONFIG_CRYPTO_CHACHA20_NEON) += chacha-neon.o
+++obj-$(CONFIG_CRYPTO_POLY1305_ARM) += poly1305-arm.o
++ obj-$(CONFIG_CRYPTO_NHPOLY1305_NEON) += nhpoly1305-neon.o
++ 
++ ce-obj-$(CONFIG_CRYPTO_AES_ARM_CE) += aes-arm-ce.o
++@@ -55,12 +56,16 @@ crct10dif-arm-ce-y	:= crct10dif-ce-core.
++ crc32-arm-ce-y:= crc32-ce-core.o crc32-ce-glue.o
++ chacha-neon-y := chacha-scalar-core.o chacha-glue.o
++ chacha-neon-$(CONFIG_KERNEL_MODE_NEON) += chacha-neon-core.o
+++poly1305-arm-y := poly1305-core.o poly1305-glue.o
++ nhpoly1305-neon-y := nh-neon-core.o nhpoly1305-neon-glue.o
++ 
++ ifdef REGENERATE_ARM_CRYPTO
++ quiet_cmd_perl = PERL    $@
++       cmd_perl = $(PERL) $(<) > $(@)
++ 
+++$(src)/poly1305-core.S_shipped: $(src)/poly1305-armv4.pl
+++	$(call cmd,perl)
+++
++ $(src)/sha256-core.S_shipped: $(src)/sha256-armv4.pl
++ 	$(call cmd,perl)
++ 
++@@ -68,4 +73,9 @@ $(src)/sha512-core.S_shipped: $(src)/sha
++ 	$(call cmd,perl)
++ endif
++ 
++-clean-files += sha256-core.S sha512-core.S
+++clean-files += poly1305-core.S sha256-core.S sha512-core.S
+++
+++# massage the perlasm code a bit so we only get the NEON routine if we need it
+++poly1305-aflags-$(CONFIG_CPU_V7) := -U__LINUX_ARM_ARCH__ -D__LINUX_ARM_ARCH__=5
+++poly1305-aflags-$(CONFIG_KERNEL_MODE_NEON) := -U__LINUX_ARM_ARCH__ -D__LINUX_ARM_ARCH__=7
+++AFLAGS_poly1305-core.o += $(poly1305-aflags-y)
++--- /dev/null
+++++ b/arch/arm/crypto/poly1305-armv4.pl
++@@ -0,0 +1,1236 @@
+++#!/usr/bin/env perl
+++# SPDX-License-Identifier: GPL-1.0+ OR BSD-3-Clause
+++#
+++# ====================================================================
+++# Written by Andy Polyakov, @dot-asm, initially for the OpenSSL
+++# project.
+++# ====================================================================
+++#
+++#			IALU(*)/gcc-4.4		NEON
+++#
+++# ARM11xx(ARMv6)	7.78/+100%		-
+++# Cortex-A5		6.35/+130%		3.00
+++# Cortex-A8		6.25/+115%		2.36
+++# Cortex-A9		5.10/+95%		2.55
+++# Cortex-A15		3.85/+85%		1.25(**)
+++# Snapdragon S4		5.70/+100%		1.48(**)
+++#
+++# (*)	this is for -march=armv6, i.e. with bunch of ldrb loading data;
+++# (**)	these are trade-off results, they can be improved by ~8% but at
+++#	the cost of 15/12% regression on Cortex-A5/A7, it's even possible
+++#	to improve Cortex-A9 result, but then A5/A7 loose more than 20%;
+++
+++$flavour = shift;
+++if ($flavour=~/\w[\w\-]*\.\w+$/) { $output=$flavour; undef $flavour; }
+++else { while (($output=shift) && ($output!~/\w[\w\-]*\.\w+$/)) {} }
+++
+++if ($flavour && $flavour ne "void") {
+++    $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
+++    ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
+++    ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
+++    die "can't locate arm-xlate.pl";
+++
+++    open STDOUT,"| \"$^X\" $xlate $flavour $output";
+++} else {
+++    open STDOUT,">$output";
+++}
+++
+++($ctx,$inp,$len,$padbit)=map("r$_",(0..3));
+++
+++$code.=<<___;
+++#ifndef	__KERNEL__
+++# include "arm_arch.h"
+++#else
+++# define __ARM_ARCH__ __LINUX_ARM_ARCH__
+++# define __ARM_MAX_ARCH__ __LINUX_ARM_ARCH__
+++# define poly1305_init   poly1305_init_arm
+++# define poly1305_blocks poly1305_blocks_arm
+++# define poly1305_emit   poly1305_emit_arm
+++.globl	poly1305_blocks_neon
+++#endif
+++
+++#if defined(__thumb2__)
+++.syntax	unified
+++.thumb
+++#else
+++.code	32
+++#endif
+++
+++.text
+++
+++.globl	poly1305_emit
+++.globl	poly1305_blocks
+++.globl	poly1305_init
+++.type	poly1305_init,%function
+++.align	5
+++poly1305_init:
+++.Lpoly1305_init:
+++	stmdb	sp!,{r4-r11}
+++
+++	eor	r3,r3,r3
+++	cmp	$inp,#0
+++	str	r3,[$ctx,#0]		@ zero hash value
+++	str	r3,[$ctx,#4]
+++	str	r3,[$ctx,#8]
+++	str	r3,[$ctx,#12]
+++	str	r3,[$ctx,#16]
+++	str	r3,[$ctx,#36]		@ clear is_base2_26
+++	add	$ctx,$ctx,#20
+++
+++#ifdef	__thumb2__
+++	it	eq
+++#endif
+++	moveq	r0,#0
+++	beq	.Lno_key
+++
+++#if	__ARM_MAX_ARCH__>=7
+++	mov	r3,#-1
+++	str	r3,[$ctx,#28]		@ impossible key power value
+++# ifndef __KERNEL__
+++	adr	r11,.Lpoly1305_init
+++	ldr	r12,.LOPENSSL_armcap
+++# endif
+++#endif
+++	ldrb	r4,[$inp,#0]
+++	mov	r10,#0x0fffffff
+++	ldrb	r5,[$inp,#1]
+++	and	r3,r10,#-4		@ 0x0ffffffc
+++	ldrb	r6,[$inp,#2]
+++	ldrb	r7,[$inp,#3]
+++	orr	r4,r4,r5,lsl#8
+++	ldrb	r5,[$inp,#4]
+++	orr	r4,r4,r6,lsl#16
+++	ldrb	r6,[$inp,#5]
+++	orr	r4,r4,r7,lsl#24
+++	ldrb	r7,[$inp,#6]
+++	and	r4,r4,r10
+++
+++#if	__ARM_MAX_ARCH__>=7 && !defined(__KERNEL__)
+++# if !defined(_WIN32)
+++	ldr	r12,[r11,r12]		@ OPENSSL_armcap_P
+++# endif
+++# if defined(__APPLE__) || defined(_WIN32)
+++	ldr	r12,[r12]
+++# endif
+++#endif
+++	ldrb	r8,[$inp,#7]
+++	orr	r5,r5,r6,lsl#8
+++	ldrb	r6,[$inp,#8]
+++	orr	r5,r5,r7,lsl#16
+++	ldrb	r7,[$inp,#9]
+++	orr	r5,r5,r8,lsl#24
+++	ldrb	r8,[$inp,#10]
+++	and	r5,r5,r3
+++
+++#if	__ARM_MAX_ARCH__>=7 && !defined(__KERNEL__)
+++	tst	r12,#ARMV7_NEON		@ check for NEON
+++# ifdef	__thumb2__
+++	adr	r9,.Lpoly1305_blocks_neon
+++	adr	r11,.Lpoly1305_blocks
+++	it	ne
+++	movne	r11,r9
+++	adr	r12,.Lpoly1305_emit
+++	orr	r11,r11,#1		@ thumb-ify addresses
+++	orr	r12,r12,#1
+++# else
+++	add	r12,r11,#(.Lpoly1305_emit-.Lpoly1305_init)
+++	ite	eq
+++	addeq	r11,r11,#(.Lpoly1305_blocks-.Lpoly1305_init)
+++	addne	r11,r11,#(.Lpoly1305_blocks_neon-.Lpoly1305_init)
+++# endif
+++#endif
+++	ldrb	r9,[$inp,#11]
+++	orr	r6,r6,r7,lsl#8
+++	ldrb	r7,[$inp,#12]
+++	orr	r6,r6,r8,lsl#16
+++	ldrb	r8,[$inp,#13]
+++	orr	r6,r6,r9,lsl#24
+++	ldrb	r9,[$inp,#14]
+++	and	r6,r6,r3
+++
+++	ldrb	r10,[$inp,#15]
+++	orr	r7,r7,r8,lsl#8
+++	str	r4,[$ctx,#0]
+++	orr	r7,r7,r9,lsl#16
+++	str	r5,[$ctx,#4]
+++	orr	r7,r7,r10,lsl#24
+++	str	r6,[$ctx,#8]
+++	and	r7,r7,r3
+++	str	r7,[$ctx,#12]
+++#if	__ARM_MAX_ARCH__>=7 && !defined(__KERNEL__)
+++	stmia	r2,{r11,r12}		@ fill functions table
+++	mov	r0,#1
+++#else
+++	mov	r0,#0
+++#endif
+++.Lno_key:
+++	ldmia	sp!,{r4-r11}
+++#if	__ARM_ARCH__>=5
+++	ret				@ bx	lr
+++#else
+++	tst	lr,#1
+++	moveq	pc,lr			@ be binary compatible with V4, yet
+++	bx	lr			@ interoperable with Thumb ISA:-)
+++#endif
+++.size	poly1305_init,.-poly1305_init
+++___
+++{
+++my ($h0,$h1,$h2,$h3,$h4,$r0,$r1,$r2,$r3)=map("r$_",(4..12));
+++my ($s1,$s2,$s3)=($r1,$r2,$r3);
+++
+++$code.=<<___;
+++.type	poly1305_blocks,%function
+++.align	5
+++poly1305_blocks:
+++.Lpoly1305_blocks:
+++	stmdb	sp!,{r3-r11,lr}
+++
+++	ands	$len,$len,#-16
+++	beq	.Lno_data
+++
+++	add	$len,$len,$inp		@ end pointer
+++	sub	sp,sp,#32
+++
+++#if __ARM_ARCH__<7
+++	ldmia	$ctx,{$h0-$r3}		@ load context
+++	add	$ctx,$ctx,#20
+++	str	$len,[sp,#16]		@ offload stuff
+++	str	$ctx,[sp,#12]
+++#else
+++	ldr	lr,[$ctx,#36]		@ is_base2_26
+++	ldmia	$ctx!,{$h0-$h4}		@ load hash value
+++	str	$len,[sp,#16]		@ offload stuff
+++	str	$ctx,[sp,#12]
+++
+++	adds	$r0,$h0,$h1,lsl#26	@ base 2^26 -> base 2^32
+++	mov	$r1,$h1,lsr#6
+++	adcs	$r1,$r1,$h2,lsl#20
+++	mov	$r2,$h2,lsr#12
+++	adcs	$r2,$r2,$h3,lsl#14
+++	mov	$r3,$h3,lsr#18
+++	adcs	$r3,$r3,$h4,lsl#8
+++	mov	$len,#0
+++	teq	lr,#0
+++	str	$len,[$ctx,#16]		@ clear is_base2_26
+++	adc	$len,$len,$h4,lsr#24
+++
+++	itttt	ne
+++	movne	$h0,$r0			@ choose between radixes
+++	movne	$h1,$r1
+++	movne	$h2,$r2
+++	movne	$h3,$r3
+++	ldmia	$ctx,{$r0-$r3}		@ load key
+++	it	ne
+++	movne	$h4,$len
+++#endif
+++
+++	mov	lr,$inp
+++	cmp	$padbit,#0
+++	str	$r1,[sp,#20]
+++	str	$r2,[sp,#24]
+++	str	$r3,[sp,#28]
+++	b	.Loop
+++
+++.align	4
+++.Loop:
+++#if __ARM_ARCH__<7
+++	ldrb	r0,[lr],#16		@ load input
+++# ifdef	__thumb2__
+++	it	hi
+++# endif
+++	addhi	$h4,$h4,#1		@ 1<<128
+++	ldrb	r1,[lr,#-15]
+++	ldrb	r2,[lr,#-14]
+++	ldrb	r3,[lr,#-13]
+++	orr	r1,r0,r1,lsl#8
+++	ldrb	r0,[lr,#-12]
+++	orr	r2,r1,r2,lsl#16
+++	ldrb	r1,[lr,#-11]
+++	orr	r3,r2,r3,lsl#24
+++	ldrb	r2,[lr,#-10]
+++	adds	$h0,$h0,r3		@ accumulate input
+++
+++	ldrb	r3,[lr,#-9]
+++	orr	r1,r0,r1,lsl#8
+++	ldrb	r0,[lr,#-8]
+++	orr	r2,r1,r2,lsl#16
+++	ldrb	r1,[lr,#-7]
+++	orr	r3,r2,r3,lsl#24
+++	ldrb	r2,[lr,#-6]
+++	adcs	$h1,$h1,r3
+++
+++	ldrb	r3,[lr,#-5]
+++	orr	r1,r0,r1,lsl#8
+++	ldrb	r0,[lr,#-4]
+++	orr	r2,r1,r2,lsl#16
+++	ldrb	r1,[lr,#-3]
+++	orr	r3,r2,r3,lsl#24
+++	ldrb	r2,[lr,#-2]
+++	adcs	$h2,$h2,r3
+++
+++	ldrb	r3,[lr,#-1]
+++	orr	r1,r0,r1,lsl#8
+++	str	lr,[sp,#8]		@ offload input pointer
+++	orr	r2,r1,r2,lsl#16
+++	add	$s1,$r1,$r1,lsr#2
+++	orr	r3,r2,r3,lsl#24
+++#else
+++	ldr	r0,[lr],#16		@ load input
+++	it	hi
+++	addhi	$h4,$h4,#1		@ padbit
+++	ldr	r1,[lr,#-12]
+++	ldr	r2,[lr,#-8]
+++	ldr	r3,[lr,#-4]
+++# ifdef	__ARMEB__
+++	rev	r0,r0
+++	rev	r1,r1
+++	rev	r2,r2
+++	rev	r3,r3
+++# endif
+++	adds	$h0,$h0,r0		@ accumulate input
+++	str	lr,[sp,#8]		@ offload input pointer
+++	adcs	$h1,$h1,r1
+++	add	$s1,$r1,$r1,lsr#2
+++	adcs	$h2,$h2,r2
+++#endif
+++	add	$s2,$r2,$r2,lsr#2
+++	adcs	$h3,$h3,r3
+++	add	$s3,$r3,$r3,lsr#2
+++
+++	umull	r2,r3,$h1,$r0
+++	 adc	$h4,$h4,#0
+++	umull	r0,r1,$h0,$r0
+++	umlal	r2,r3,$h4,$s1
+++	umlal	r0,r1,$h3,$s1
+++	ldr	$r1,[sp,#20]		@ reload $r1
+++	umlal	r2,r3,$h2,$s3
+++	umlal	r0,r1,$h1,$s3
+++	umlal	r2,r3,$h3,$s2
+++	umlal	r0,r1,$h2,$s2
+++	umlal	r2,r3,$h0,$r1
+++	str	r0,[sp,#0]		@ future $h0
+++	 mul	r0,$s2,$h4
+++	ldr	$r2,[sp,#24]		@ reload $r2
+++	adds	r2,r2,r1		@ d1+=d0>>32
+++	 eor	r1,r1,r1
+++	adc	lr,r3,#0		@ future $h2
+++	str	r2,[sp,#4]		@ future $h1
+++
+++	mul	r2,$s3,$h4
+++	eor	r3,r3,r3
+++	umlal	r0,r1,$h3,$s3
+++	ldr	$r3,[sp,#28]		@ reload $r3
+++	umlal	r2,r3,$h3,$r0
+++	umlal	r0,r1,$h2,$r0
+++	umlal	r2,r3,$h2,$r1
+++	umlal	r0,r1,$h1,$r1
+++	umlal	r2,r3,$h1,$r2
+++	umlal	r0,r1,$h0,$r2
+++	umlal	r2,r3,$h0,$r3
+++	ldr	$h0,[sp,#0]
+++	mul	$h4,$r0,$h4
+++	ldr	$h1,[sp,#4]
+++
+++	adds	$h2,lr,r0		@ d2+=d1>>32
+++	ldr	lr,[sp,#8]		@ reload input pointer
+++	adc	r1,r1,#0
+++	adds	$h3,r2,r1		@ d3+=d2>>32
+++	ldr	r0,[sp,#16]		@ reload end pointer
+++	adc	r3,r3,#0
+++	add	$h4,$h4,r3		@ h4+=d3>>32
+++
+++	and	r1,$h4,#-4
+++	and	$h4,$h4,#3
+++	add	r1,r1,r1,lsr#2		@ *=5
+++	adds	$h0,$h0,r1
+++	adcs	$h1,$h1,#0
+++	adcs	$h2,$h2,#0
+++	adcs	$h3,$h3,#0
+++	adc	$h4,$h4,#0
+++
+++	cmp	r0,lr			@ done yet?
+++	bhi	.Loop
+++
+++	ldr	$ctx,[sp,#12]
+++	add	sp,sp,#32
+++	stmdb	$ctx,{$h0-$h4}		@ store the result
+++
+++.Lno_data:
+++#if	__ARM_ARCH__>=5
+++	ldmia	sp!,{r3-r11,pc}
+++#else
+++	ldmia	sp!,{r3-r11,lr}
+++	tst	lr,#1
+++	moveq	pc,lr			@ be binary compatible with V4, yet
+++	bx	lr			@ interoperable with Thumb ISA:-)
+++#endif
+++.size	poly1305_blocks,.-poly1305_blocks
+++___
+++}
+++{
+++my ($ctx,$mac,$nonce)=map("r$_",(0..2));
+++my ($h0,$h1,$h2,$h3,$h4,$g0,$g1,$g2,$g3)=map("r$_",(3..11));
+++my $g4=$ctx;
+++
+++$code.=<<___;
+++.type	poly1305_emit,%function
+++.align	5
+++poly1305_emit:
+++.Lpoly1305_emit:
+++	stmdb	sp!,{r4-r11}
+++
+++	ldmia	$ctx,{$h0-$h4}
+++
+++#if __ARM_ARCH__>=7
+++	ldr	ip,[$ctx,#36]		@ is_base2_26
+++
+++	adds	$g0,$h0,$h1,lsl#26	@ base 2^26 -> base 2^32
+++	mov	$g1,$h1,lsr#6
+++	adcs	$g1,$g1,$h2,lsl#20
+++	mov	$g2,$h2,lsr#12
+++	adcs	$g2,$g2,$h3,lsl#14
+++	mov	$g3,$h3,lsr#18
+++	adcs	$g3,$g3,$h4,lsl#8
+++	mov	$g4,#0
+++	adc	$g4,$g4,$h4,lsr#24
+++
+++	tst	ip,ip
+++	itttt	ne
+++	movne	$h0,$g0
+++	movne	$h1,$g1
+++	movne	$h2,$g2
+++	movne	$h3,$g3
+++	it	ne
+++	movne	$h4,$g4
+++#endif
+++
+++	adds	$g0,$h0,#5		@ compare to modulus
+++	adcs	$g1,$h1,#0
+++	adcs	$g2,$h2,#0
+++	adcs	$g3,$h3,#0
+++	adc	$g4,$h4,#0
+++	tst	$g4,#4			@ did it carry/borrow?
+++
+++#ifdef	__thumb2__
+++	it	ne
+++#endif
+++	movne	$h0,$g0
+++	ldr	$g0,[$nonce,#0]
+++#ifdef	__thumb2__
+++	it	ne
+++#endif
+++	movne	$h1,$g1
+++	ldr	$g1,[$nonce,#4]
+++#ifdef	__thumb2__
+++	it	ne
+++#endif
+++	movne	$h2,$g2
+++	ldr	$g2,[$nonce,#8]
+++#ifdef	__thumb2__
+++	it	ne
+++#endif
+++	movne	$h3,$g3
+++	ldr	$g3,[$nonce,#12]
+++
+++	adds	$h0,$h0,$g0
+++	adcs	$h1,$h1,$g1
+++	adcs	$h2,$h2,$g2
+++	adc	$h3,$h3,$g3
+++
+++#if __ARM_ARCH__>=7
+++# ifdef __ARMEB__
+++	rev	$h0,$h0
+++	rev	$h1,$h1
+++	rev	$h2,$h2
+++	rev	$h3,$h3
+++# endif
+++	str	$h0,[$mac,#0]
+++	str	$h1,[$mac,#4]
+++	str	$h2,[$mac,#8]
+++	str	$h3,[$mac,#12]
+++#else
+++	strb	$h0,[$mac,#0]
+++	mov	$h0,$h0,lsr#8
+++	strb	$h1,[$mac,#4]
+++	mov	$h1,$h1,lsr#8
+++	strb	$h2,[$mac,#8]
+++	mov	$h2,$h2,lsr#8
+++	strb	$h3,[$mac,#12]
+++	mov	$h3,$h3,lsr#8
+++
+++	strb	$h0,[$mac,#1]
+++	mov	$h0,$h0,lsr#8
+++	strb	$h1,[$mac,#5]
+++	mov	$h1,$h1,lsr#8
+++	strb	$h2,[$mac,#9]
+++	mov	$h2,$h2,lsr#8
+++	strb	$h3,[$mac,#13]
+++	mov	$h3,$h3,lsr#8
+++
+++	strb	$h0,[$mac,#2]
+++	mov	$h0,$h0,lsr#8
+++	strb	$h1,[$mac,#6]
+++	mov	$h1,$h1,lsr#8
+++	strb	$h2,[$mac,#10]
+++	mov	$h2,$h2,lsr#8
+++	strb	$h3,[$mac,#14]
+++	mov	$h3,$h3,lsr#8
+++
+++	strb	$h0,[$mac,#3]
+++	strb	$h1,[$mac,#7]
+++	strb	$h2,[$mac,#11]
+++	strb	$h3,[$mac,#15]
+++#endif
+++	ldmia	sp!,{r4-r11}
+++#if	__ARM_ARCH__>=5
+++	ret				@ bx	lr
+++#else
+++	tst	lr,#1
+++	moveq	pc,lr			@ be binary compatible with V4, yet
+++	bx	lr			@ interoperable with Thumb ISA:-)
+++#endif
+++.size	poly1305_emit,.-poly1305_emit
+++___
+++{
+++my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("d$_",(0..9));
+++my ($D0,$D1,$D2,$D3,$D4, $H0,$H1,$H2,$H3,$H4) = map("q$_",(5..14));
+++my ($T0,$T1,$MASK) = map("q$_",(15,4,0));
+++
+++my ($in2,$zeros,$tbl0,$tbl1) = map("r$_",(4..7));
+++
+++$code.=<<___;
+++#if	__ARM_MAX_ARCH__>=7
+++.fpu	neon
+++
+++.type	poly1305_init_neon,%function
+++.align	5
+++poly1305_init_neon:
+++.Lpoly1305_init_neon:
+++	ldr	r3,[$ctx,#48]		@ first table element
+++	cmp	r3,#-1			@ is value impossible?
+++	bne	.Lno_init_neon
+++
+++	ldr	r4,[$ctx,#20]		@ load key base 2^32
+++	ldr	r5,[$ctx,#24]
+++	ldr	r6,[$ctx,#28]
+++	ldr	r7,[$ctx,#32]
+++
+++	and	r2,r4,#0x03ffffff	@ base 2^32 -> base 2^26
+++	mov	r3,r4,lsr#26
+++	mov	r4,r5,lsr#20
+++	orr	r3,r3,r5,lsl#6
+++	mov	r5,r6,lsr#14
+++	orr	r4,r4,r6,lsl#12
+++	mov	r6,r7,lsr#8
+++	orr	r5,r5,r7,lsl#18
+++	and	r3,r3,#0x03ffffff
+++	and	r4,r4,#0x03ffffff
+++	and	r5,r5,#0x03ffffff
+++
+++	vdup.32	$R0,r2			@ r^1 in both lanes
+++	add	r2,r3,r3,lsl#2		@ *5
+++	vdup.32	$R1,r3
+++	add	r3,r4,r4,lsl#2
+++	vdup.32	$S1,r2
+++	vdup.32	$R2,r4
+++	add	r4,r5,r5,lsl#2
+++	vdup.32	$S2,r3
+++	vdup.32	$R3,r5
+++	add	r5,r6,r6,lsl#2
+++	vdup.32	$S3,r4
+++	vdup.32	$R4,r6
+++	vdup.32	$S4,r5
+++
+++	mov	$zeros,#2		@ counter
+++
+++.Lsquare_neon:
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ d0 = h0*r0 + h4*5*r1 + h3*5*r2 + h2*5*r3 + h1*5*r4
+++	@ d1 = h1*r0 + h0*r1   + h4*5*r2 + h3*5*r3 + h2*5*r4
+++	@ d2 = h2*r0 + h1*r1   + h0*r2   + h4*5*r3 + h3*5*r4
+++	@ d3 = h3*r0 + h2*r1   + h1*r2   + h0*r3   + h4*5*r4
+++	@ d4 = h4*r0 + h3*r1   + h2*r2   + h1*r3   + h0*r4
+++
+++	vmull.u32	$D0,$R0,${R0}[1]
+++	vmull.u32	$D1,$R1,${R0}[1]
+++	vmull.u32	$D2,$R2,${R0}[1]
+++	vmull.u32	$D3,$R3,${R0}[1]
+++	vmull.u32	$D4,$R4,${R0}[1]
+++
+++	vmlal.u32	$D0,$R4,${S1}[1]
+++	vmlal.u32	$D1,$R0,${R1}[1]
+++	vmlal.u32	$D2,$R1,${R1}[1]
+++	vmlal.u32	$D3,$R2,${R1}[1]
+++	vmlal.u32	$D4,$R3,${R1}[1]
+++
+++	vmlal.u32	$D0,$R3,${S2}[1]
+++	vmlal.u32	$D1,$R4,${S2}[1]
+++	vmlal.u32	$D3,$R1,${R2}[1]
+++	vmlal.u32	$D2,$R0,${R2}[1]
+++	vmlal.u32	$D4,$R2,${R2}[1]
+++
+++	vmlal.u32	$D0,$R2,${S3}[1]
+++	vmlal.u32	$D3,$R0,${R3}[1]
+++	vmlal.u32	$D1,$R3,${S3}[1]
+++	vmlal.u32	$D2,$R4,${S3}[1]
+++	vmlal.u32	$D4,$R1,${R3}[1]
+++
+++	vmlal.u32	$D3,$R4,${S4}[1]
+++	vmlal.u32	$D0,$R1,${S4}[1]
+++	vmlal.u32	$D1,$R2,${S4}[1]
+++	vmlal.u32	$D2,$R3,${S4}[1]
+++	vmlal.u32	$D4,$R0,${R4}[1]
+++
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ lazy reduction as discussed in "NEON crypto" by D.J. Bernstein
+++	@ and P. Schwabe
+++	@
+++	@ H0>>+H1>>+H2>>+H3>>+H4
+++	@ H3>>+H4>>*5+H0>>+H1
+++	@
+++	@ Trivia.
+++	@
+++	@ Result of multiplication of n-bit number by m-bit number is
+++	@ n+m bits wide. However! Even though 2^n is a n+1-bit number,
+++	@ m-bit number multiplied by 2^n is still n+m bits wide.
+++	@
+++	@ Sum of two n-bit numbers is n+1 bits wide, sum of three - n+2,
+++	@ and so is sum of four. Sum of 2^m n-m-bit numbers and n-bit
+++	@ one is n+1 bits wide.
+++	@
+++	@ >>+ denotes Hnext += Hn>>26, Hn &= 0x3ffffff. This means that
+++	@ H0, H2, H3 are guaranteed to be 26 bits wide, while H1 and H4
+++	@ can be 27. However! In cases when their width exceeds 26 bits
+++	@ they are limited by 2^26+2^6. This in turn means that *sum*
+++	@ of the products with these values can still be viewed as sum
+++	@ of 52-bit numbers as long as the amount of addends is not a
+++	@ power of 2. For example,
+++	@
+++	@ H4 = H4*R0 + H3*R1 + H2*R2 + H1*R3 + H0 * R4,
+++	@
+++	@ which can't be larger than 5 * (2^26 + 2^6) * (2^26 + 2^6), or
+++	@ 5 * (2^52 + 2*2^32 + 2^12), which in turn is smaller than
+++	@ 8 * (2^52) or 2^55. However, the value is then multiplied by
+++	@ by 5, so we should be looking at 5 * 5 * (2^52 + 2^33 + 2^12),
+++	@ which is less than 32 * (2^52) or 2^57. And when processing
+++	@ data we are looking at triple as many addends...
+++	@
+++	@ In key setup procedure pre-reduced H0 is limited by 5*4+1 and
+++	@ 5*H4 - by 5*5 52-bit addends, or 57 bits. But when hashing the
+++	@ input H0 is limited by (5*4+1)*3 addends, or 58 bits, while
+++	@ 5*H4 by 5*5*3, or 59[!] bits. How is this relevant? vmlal.u32
+++	@ instruction accepts 2x32-bit input and writes 2x64-bit result.
+++	@ This means that result of reduction have to be compressed upon
+++	@ loop wrap-around. This can be done in the process of reduction
+++	@ to minimize amount of instructions [as well as amount of
+++	@ 128-bit instructions, which benefits low-end processors], but
+++	@ one has to watch for H2 (which is narrower than H0) and 5*H4
+++	@ not being wider than 58 bits, so that result of right shift
+++	@ by 26 bits fits in 32 bits. This is also useful on x86,
+++	@ because it allows to use paddd in place for paddq, which
+++	@ benefits Atom, where paddq is ridiculously slow.
+++
+++	vshr.u64	$T0,$D3,#26
+++	vmovn.i64	$D3#lo,$D3
+++	 vshr.u64	$T1,$D0,#26
+++	 vmovn.i64	$D0#lo,$D0
+++	vadd.i64	$D4,$D4,$T0		@ h3 -> h4
+++	vbic.i32	$D3#lo,#0xfc000000	@ &=0x03ffffff
+++	 vadd.i64	$D1,$D1,$T1		@ h0 -> h1
+++	 vbic.i32	$D0#lo,#0xfc000000
+++
+++	vshrn.u64	$T0#lo,$D4,#26
+++	vmovn.i64	$D4#lo,$D4
+++	 vshr.u64	$T1,$D1,#26
+++	 vmovn.i64	$D1#lo,$D1
+++	 vadd.i64	$D2,$D2,$T1		@ h1 -> h2
+++	vbic.i32	$D4#lo,#0xfc000000
+++	 vbic.i32	$D1#lo,#0xfc000000
+++
+++	vadd.i32	$D0#lo,$D0#lo,$T0#lo
+++	vshl.u32	$T0#lo,$T0#lo,#2
+++	 vshrn.u64	$T1#lo,$D2,#26
+++	 vmovn.i64	$D2#lo,$D2
+++	vadd.i32	$D0#lo,$D0#lo,$T0#lo	@ h4 -> h0
+++	 vadd.i32	$D3#lo,$D3#lo,$T1#lo	@ h2 -> h3
+++	 vbic.i32	$D2#lo,#0xfc000000
+++
+++	vshr.u32	$T0#lo,$D0#lo,#26
+++	vbic.i32	$D0#lo,#0xfc000000
+++	 vshr.u32	$T1#lo,$D3#lo,#26
+++	 vbic.i32	$D3#lo,#0xfc000000
+++	vadd.i32	$D1#lo,$D1#lo,$T0#lo	@ h0 -> h1
+++	 vadd.i32	$D4#lo,$D4#lo,$T1#lo	@ h3 -> h4
+++
+++	subs		$zeros,$zeros,#1
+++	beq		.Lsquare_break_neon
+++
+++	add		$tbl0,$ctx,#(48+0*9*4)
+++	add		$tbl1,$ctx,#(48+1*9*4)
+++
+++	vtrn.32		$R0,$D0#lo		@ r^2:r^1
+++	vtrn.32		$R2,$D2#lo
+++	vtrn.32		$R3,$D3#lo
+++	vtrn.32		$R1,$D1#lo
+++	vtrn.32		$R4,$D4#lo
+++
+++	vshl.u32	$S2,$R2,#2		@ *5
+++	vshl.u32	$S3,$R3,#2
+++	vshl.u32	$S1,$R1,#2
+++	vshl.u32	$S4,$R4,#2
+++	vadd.i32	$S2,$S2,$R2
+++	vadd.i32	$S1,$S1,$R1
+++	vadd.i32	$S3,$S3,$R3
+++	vadd.i32	$S4,$S4,$R4
+++
+++	vst4.32		{${R0}[0],${R1}[0],${S1}[0],${R2}[0]},[$tbl0]!
+++	vst4.32		{${R0}[1],${R1}[1],${S1}[1],${R2}[1]},[$tbl1]!
+++	vst4.32		{${S2}[0],${R3}[0],${S3}[0],${R4}[0]},[$tbl0]!
+++	vst4.32		{${S2}[1],${R3}[1],${S3}[1],${R4}[1]},[$tbl1]!
+++	vst1.32		{${S4}[0]},[$tbl0,:32]
+++	vst1.32		{${S4}[1]},[$tbl1,:32]
+++
+++	b		.Lsquare_neon
+++
+++.align	4
+++.Lsquare_break_neon:
+++	add		$tbl0,$ctx,#(48+2*4*9)
+++	add		$tbl1,$ctx,#(48+3*4*9)
+++
+++	vmov		$R0,$D0#lo		@ r^4:r^3
+++	vshl.u32	$S1,$D1#lo,#2		@ *5
+++	vmov		$R1,$D1#lo
+++	vshl.u32	$S2,$D2#lo,#2
+++	vmov		$R2,$D2#lo
+++	vshl.u32	$S3,$D3#lo,#2
+++	vmov		$R3,$D3#lo
+++	vshl.u32	$S4,$D4#lo,#2
+++	vmov		$R4,$D4#lo
+++	vadd.i32	$S1,$S1,$D1#lo
+++	vadd.i32	$S2,$S2,$D2#lo
+++	vadd.i32	$S3,$S3,$D3#lo
+++	vadd.i32	$S4,$S4,$D4#lo
+++
+++	vst4.32		{${R0}[0],${R1}[0],${S1}[0],${R2}[0]},[$tbl0]!
+++	vst4.32		{${R0}[1],${R1}[1],${S1}[1],${R2}[1]},[$tbl1]!
+++	vst4.32		{${S2}[0],${R3}[0],${S3}[0],${R4}[0]},[$tbl0]!
+++	vst4.32		{${S2}[1],${R3}[1],${S3}[1],${R4}[1]},[$tbl1]!
+++	vst1.32		{${S4}[0]},[$tbl0]
+++	vst1.32		{${S4}[1]},[$tbl1]
+++
+++.Lno_init_neon:
+++	ret				@ bx	lr
+++.size	poly1305_init_neon,.-poly1305_init_neon
+++
+++.type	poly1305_blocks_neon,%function
+++.align	5
+++poly1305_blocks_neon:
+++.Lpoly1305_blocks_neon:
+++	ldr	ip,[$ctx,#36]		@ is_base2_26
+++
+++	cmp	$len,#64
+++	blo	.Lpoly1305_blocks
+++
+++	stmdb	sp!,{r4-r7}
+++	vstmdb	sp!,{d8-d15}		@ ABI specification says so
+++
+++	tst	ip,ip			@ is_base2_26?
+++	bne	.Lbase2_26_neon
+++
+++	stmdb	sp!,{r1-r3,lr}
+++	bl	.Lpoly1305_init_neon
+++
+++	ldr	r4,[$ctx,#0]		@ load hash value base 2^32
+++	ldr	r5,[$ctx,#4]
+++	ldr	r6,[$ctx,#8]
+++	ldr	r7,[$ctx,#12]
+++	ldr	ip,[$ctx,#16]
+++
+++	and	r2,r4,#0x03ffffff	@ base 2^32 -> base 2^26
+++	mov	r3,r4,lsr#26
+++	 veor	$D0#lo,$D0#lo,$D0#lo
+++	mov	r4,r5,lsr#20
+++	orr	r3,r3,r5,lsl#6
+++	 veor	$D1#lo,$D1#lo,$D1#lo
+++	mov	r5,r6,lsr#14
+++	orr	r4,r4,r6,lsl#12
+++	 veor	$D2#lo,$D2#lo,$D2#lo
+++	mov	r6,r7,lsr#8
+++	orr	r5,r5,r7,lsl#18
+++	 veor	$D3#lo,$D3#lo,$D3#lo
+++	and	r3,r3,#0x03ffffff
+++	orr	r6,r6,ip,lsl#24
+++	 veor	$D4#lo,$D4#lo,$D4#lo
+++	and	r4,r4,#0x03ffffff
+++	mov	r1,#1
+++	and	r5,r5,#0x03ffffff
+++	str	r1,[$ctx,#36]		@ set is_base2_26
+++
+++	vmov.32	$D0#lo[0],r2
+++	vmov.32	$D1#lo[0],r3
+++	vmov.32	$D2#lo[0],r4
+++	vmov.32	$D3#lo[0],r5
+++	vmov.32	$D4#lo[0],r6
+++	adr	$zeros,.Lzeros
+++
+++	ldmia	sp!,{r1-r3,lr}
+++	b	.Lhash_loaded
+++
+++.align	4
+++.Lbase2_26_neon:
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ load hash value
+++
+++	veor		$D0#lo,$D0#lo,$D0#lo
+++	veor		$D1#lo,$D1#lo,$D1#lo
+++	veor		$D2#lo,$D2#lo,$D2#lo
+++	veor		$D3#lo,$D3#lo,$D3#lo
+++	veor		$D4#lo,$D4#lo,$D4#lo
+++	vld4.32		{$D0#lo[0],$D1#lo[0],$D2#lo[0],$D3#lo[0]},[$ctx]!
+++	adr		$zeros,.Lzeros
+++	vld1.32		{$D4#lo[0]},[$ctx]
+++	sub		$ctx,$ctx,#16		@ rewind
+++
+++.Lhash_loaded:
+++	add		$in2,$inp,#32
+++	mov		$padbit,$padbit,lsl#24
+++	tst		$len,#31
+++	beq		.Leven
+++
+++	vld4.32		{$H0#lo[0],$H1#lo[0],$H2#lo[0],$H3#lo[0]},[$inp]!
+++	vmov.32		$H4#lo[0],$padbit
+++	sub		$len,$len,#16
+++	add		$in2,$inp,#32
+++
+++# ifdef	__ARMEB__
+++	vrev32.8	$H0,$H0
+++	vrev32.8	$H3,$H3
+++	vrev32.8	$H1,$H1
+++	vrev32.8	$H2,$H2
+++# endif
+++	vsri.u32	$H4#lo,$H3#lo,#8	@ base 2^32 -> base 2^26
+++	vshl.u32	$H3#lo,$H3#lo,#18
+++
+++	vsri.u32	$H3#lo,$H2#lo,#14
+++	vshl.u32	$H2#lo,$H2#lo,#12
+++	vadd.i32	$H4#hi,$H4#lo,$D4#lo	@ add hash value and move to #hi
+++
+++	vbic.i32	$H3#lo,#0xfc000000
+++	vsri.u32	$H2#lo,$H1#lo,#20
+++	vshl.u32	$H1#lo,$H1#lo,#6
+++
+++	vbic.i32	$H2#lo,#0xfc000000
+++	vsri.u32	$H1#lo,$H0#lo,#26
+++	vadd.i32	$H3#hi,$H3#lo,$D3#lo
+++
+++	vbic.i32	$H0#lo,#0xfc000000
+++	vbic.i32	$H1#lo,#0xfc000000
+++	vadd.i32	$H2#hi,$H2#lo,$D2#lo
+++
+++	vadd.i32	$H0#hi,$H0#lo,$D0#lo
+++	vadd.i32	$H1#hi,$H1#lo,$D1#lo
+++
+++	mov		$tbl1,$zeros
+++	add		$tbl0,$ctx,#48
+++
+++	cmp		$len,$len
+++	b		.Long_tail
+++
+++.align	4
+++.Leven:
+++	subs		$len,$len,#64
+++	it		lo
+++	movlo		$in2,$zeros
+++
+++	vmov.i32	$H4,#1<<24		@ padbit, yes, always
+++	vld4.32		{$H0#lo,$H1#lo,$H2#lo,$H3#lo},[$inp]	@ inp[0:1]
+++	add		$inp,$inp,#64
+++	vld4.32		{$H0#hi,$H1#hi,$H2#hi,$H3#hi},[$in2]	@ inp[2:3] (or 0)
+++	add		$in2,$in2,#64
+++	itt		hi
+++	addhi		$tbl1,$ctx,#(48+1*9*4)
+++	addhi		$tbl0,$ctx,#(48+3*9*4)
+++
+++# ifdef	__ARMEB__
+++	vrev32.8	$H0,$H0
+++	vrev32.8	$H3,$H3
+++	vrev32.8	$H1,$H1
+++	vrev32.8	$H2,$H2
+++# endif
+++	vsri.u32	$H4,$H3,#8		@ base 2^32 -> base 2^26
+++	vshl.u32	$H3,$H3,#18
+++
+++	vsri.u32	$H3,$H2,#14
+++	vshl.u32	$H2,$H2,#12
+++
+++	vbic.i32	$H3,#0xfc000000
+++	vsri.u32	$H2,$H1,#20
+++	vshl.u32	$H1,$H1,#6
+++
+++	vbic.i32	$H2,#0xfc000000
+++	vsri.u32	$H1,$H0,#26
+++
+++	vbic.i32	$H0,#0xfc000000
+++	vbic.i32	$H1,#0xfc000000
+++
+++	bls		.Lskip_loop
+++
+++	vld4.32		{${R0}[1],${R1}[1],${S1}[1],${R2}[1]},[$tbl1]!	@ load r^2
+++	vld4.32		{${R0}[0],${R1}[0],${S1}[0],${R2}[0]},[$tbl0]!	@ load r^4
+++	vld4.32		{${S2}[1],${R3}[1],${S3}[1],${R4}[1]},[$tbl1]!
+++	vld4.32		{${S2}[0],${R3}[0],${S3}[0],${R4}[0]},[$tbl0]!
+++	b		.Loop_neon
+++
+++.align	5
+++.Loop_neon:
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ ((inp[0]*r^4+inp[2]*r^2+inp[4])*r^4+inp[6]*r^2
+++	@ ((inp[1]*r^4+inp[3]*r^2+inp[5])*r^3+inp[7]*r
+++	@   \___________________/
+++	@ ((inp[0]*r^4+inp[2]*r^2+inp[4])*r^4+inp[6]*r^2+inp[8])*r^2
+++	@ ((inp[1]*r^4+inp[3]*r^2+inp[5])*r^4+inp[7]*r^2+inp[9])*r
+++	@   \___________________/ \____________________/
+++	@
+++	@ Note that we start with inp[2:3]*r^2. This is because it
+++	@ doesn't depend on reduction in previous iteration.
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ d4 = h4*r0 + h3*r1   + h2*r2   + h1*r3   + h0*r4
+++	@ d3 = h3*r0 + h2*r1   + h1*r2   + h0*r3   + h4*5*r4
+++	@ d2 = h2*r0 + h1*r1   + h0*r2   + h4*5*r3 + h3*5*r4
+++	@ d1 = h1*r0 + h0*r1   + h4*5*r2 + h3*5*r3 + h2*5*r4
+++	@ d0 = h0*r0 + h4*5*r1 + h3*5*r2 + h2*5*r3 + h1*5*r4
+++
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ inp[2:3]*r^2
+++
+++	vadd.i32	$H2#lo,$H2#lo,$D2#lo	@ accumulate inp[0:1]
+++	vmull.u32	$D2,$H2#hi,${R0}[1]
+++	vadd.i32	$H0#lo,$H0#lo,$D0#lo
+++	vmull.u32	$D0,$H0#hi,${R0}[1]
+++	vadd.i32	$H3#lo,$H3#lo,$D3#lo
+++	vmull.u32	$D3,$H3#hi,${R0}[1]
+++	vmlal.u32	$D2,$H1#hi,${R1}[1]
+++	vadd.i32	$H1#lo,$H1#lo,$D1#lo
+++	vmull.u32	$D1,$H1#hi,${R0}[1]
+++
+++	vadd.i32	$H4#lo,$H4#lo,$D4#lo
+++	vmull.u32	$D4,$H4#hi,${R0}[1]
+++	subs		$len,$len,#64
+++	vmlal.u32	$D0,$H4#hi,${S1}[1]
+++	it		lo
+++	movlo		$in2,$zeros
+++	vmlal.u32	$D3,$H2#hi,${R1}[1]
+++	vld1.32		${S4}[1],[$tbl1,:32]
+++	vmlal.u32	$D1,$H0#hi,${R1}[1]
+++	vmlal.u32	$D4,$H3#hi,${R1}[1]
+++
+++	vmlal.u32	$D0,$H3#hi,${S2}[1]
+++	vmlal.u32	$D3,$H1#hi,${R2}[1]
+++	vmlal.u32	$D4,$H2#hi,${R2}[1]
+++	vmlal.u32	$D1,$H4#hi,${S2}[1]
+++	vmlal.u32	$D2,$H0#hi,${R2}[1]
+++
+++	vmlal.u32	$D3,$H0#hi,${R3}[1]
+++	vmlal.u32	$D0,$H2#hi,${S3}[1]
+++	vmlal.u32	$D4,$H1#hi,${R3}[1]
+++	vmlal.u32	$D1,$H3#hi,${S3}[1]
+++	vmlal.u32	$D2,$H4#hi,${S3}[1]
+++
+++	vmlal.u32	$D3,$H4#hi,${S4}[1]
+++	vmlal.u32	$D0,$H1#hi,${S4}[1]
+++	vmlal.u32	$D4,$H0#hi,${R4}[1]
+++	vmlal.u32	$D1,$H2#hi,${S4}[1]
+++	vmlal.u32	$D2,$H3#hi,${S4}[1]
+++
+++	vld4.32		{$H0#hi,$H1#hi,$H2#hi,$H3#hi},[$in2]	@ inp[2:3] (or 0)
+++	add		$in2,$in2,#64
+++
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ (hash+inp[0:1])*r^4 and accumulate
+++
+++	vmlal.u32	$D3,$H3#lo,${R0}[0]
+++	vmlal.u32	$D0,$H0#lo,${R0}[0]
+++	vmlal.u32	$D4,$H4#lo,${R0}[0]
+++	vmlal.u32	$D1,$H1#lo,${R0}[0]
+++	vmlal.u32	$D2,$H2#lo,${R0}[0]
+++	vld1.32		${S4}[0],[$tbl0,:32]
+++
+++	vmlal.u32	$D3,$H2#lo,${R1}[0]
+++	vmlal.u32	$D0,$H4#lo,${S1}[0]
+++	vmlal.u32	$D4,$H3#lo,${R1}[0]
+++	vmlal.u32	$D1,$H0#lo,${R1}[0]
+++	vmlal.u32	$D2,$H1#lo,${R1}[0]
+++
+++	vmlal.u32	$D3,$H1#lo,${R2}[0]
+++	vmlal.u32	$D0,$H3#lo,${S2}[0]
+++	vmlal.u32	$D4,$H2#lo,${R2}[0]
+++	vmlal.u32	$D1,$H4#lo,${S2}[0]
+++	vmlal.u32	$D2,$H0#lo,${R2}[0]
+++
+++	vmlal.u32	$D3,$H0#lo,${R3}[0]
+++	vmlal.u32	$D0,$H2#lo,${S3}[0]
+++	vmlal.u32	$D4,$H1#lo,${R3}[0]
+++	vmlal.u32	$D1,$H3#lo,${S3}[0]
+++	vmlal.u32	$D3,$H4#lo,${S4}[0]
+++
+++	vmlal.u32	$D2,$H4#lo,${S3}[0]
+++	vmlal.u32	$D0,$H1#lo,${S4}[0]
+++	vmlal.u32	$D4,$H0#lo,${R4}[0]
+++	vmov.i32	$H4,#1<<24		@ padbit, yes, always
+++	vmlal.u32	$D1,$H2#lo,${S4}[0]
+++	vmlal.u32	$D2,$H3#lo,${S4}[0]
+++
+++	vld4.32		{$H0#lo,$H1#lo,$H2#lo,$H3#lo},[$inp]	@ inp[0:1]
+++	add		$inp,$inp,#64
+++# ifdef	__ARMEB__
+++	vrev32.8	$H0,$H0
+++	vrev32.8	$H1,$H1
+++	vrev32.8	$H2,$H2
+++	vrev32.8	$H3,$H3
+++# endif
+++
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ lazy reduction interleaved with base 2^32 -> base 2^26 of
+++	@ inp[0:3] previously loaded to $H0-$H3 and smashed to $H0-$H4.
+++
+++	vshr.u64	$T0,$D3,#26
+++	vmovn.i64	$D3#lo,$D3
+++	 vshr.u64	$T1,$D0,#26
+++	 vmovn.i64	$D0#lo,$D0
+++	vadd.i64	$D4,$D4,$T0		@ h3 -> h4
+++	vbic.i32	$D3#lo,#0xfc000000
+++	  vsri.u32	$H4,$H3,#8		@ base 2^32 -> base 2^26
+++	 vadd.i64	$D1,$D1,$T1		@ h0 -> h1
+++	  vshl.u32	$H3,$H3,#18
+++	 vbic.i32	$D0#lo,#0xfc000000
+++
+++	vshrn.u64	$T0#lo,$D4,#26
+++	vmovn.i64	$D4#lo,$D4
+++	 vshr.u64	$T1,$D1,#26
+++	 vmovn.i64	$D1#lo,$D1
+++	 vadd.i64	$D2,$D2,$T1		@ h1 -> h2
+++	  vsri.u32	$H3,$H2,#14
+++	vbic.i32	$D4#lo,#0xfc000000
+++	  vshl.u32	$H2,$H2,#12
+++	 vbic.i32	$D1#lo,#0xfc000000
+++
+++	vadd.i32	$D0#lo,$D0#lo,$T0#lo
+++	vshl.u32	$T0#lo,$T0#lo,#2
+++	  vbic.i32	$H3,#0xfc000000
+++	 vshrn.u64	$T1#lo,$D2,#26
+++	 vmovn.i64	$D2#lo,$D2
+++	vaddl.u32	$D0,$D0#lo,$T0#lo	@ h4 -> h0 [widen for a sec]
+++	  vsri.u32	$H2,$H1,#20
+++	 vadd.i32	$D3#lo,$D3#lo,$T1#lo	@ h2 -> h3
+++	  vshl.u32	$H1,$H1,#6
+++	 vbic.i32	$D2#lo,#0xfc000000
+++	  vbic.i32	$H2,#0xfc000000
+++
+++	vshrn.u64	$T0#lo,$D0,#26		@ re-narrow
+++	vmovn.i64	$D0#lo,$D0
+++	  vsri.u32	$H1,$H0,#26
+++	  vbic.i32	$H0,#0xfc000000
+++	 vshr.u32	$T1#lo,$D3#lo,#26
+++	 vbic.i32	$D3#lo,#0xfc000000
+++	vbic.i32	$D0#lo,#0xfc000000
+++	vadd.i32	$D1#lo,$D1#lo,$T0#lo	@ h0 -> h1
+++	 vadd.i32	$D4#lo,$D4#lo,$T1#lo	@ h3 -> h4
+++	  vbic.i32	$H1,#0xfc000000
+++
+++	bhi		.Loop_neon
+++
+++.Lskip_loop:
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ multiply (inp[0:1]+hash) or inp[2:3] by r^2:r^1
+++
+++	add		$tbl1,$ctx,#(48+0*9*4)
+++	add		$tbl0,$ctx,#(48+1*9*4)
+++	adds		$len,$len,#32
+++	it		ne
+++	movne		$len,#0
+++	bne		.Long_tail
+++
+++	vadd.i32	$H2#hi,$H2#lo,$D2#lo	@ add hash value and move to #hi
+++	vadd.i32	$H0#hi,$H0#lo,$D0#lo
+++	vadd.i32	$H3#hi,$H3#lo,$D3#lo
+++	vadd.i32	$H1#hi,$H1#lo,$D1#lo
+++	vadd.i32	$H4#hi,$H4#lo,$D4#lo
+++
+++.Long_tail:
+++	vld4.32		{${R0}[1],${R1}[1],${S1}[1],${R2}[1]},[$tbl1]!	@ load r^1
+++	vld4.32		{${R0}[0],${R1}[0],${S1}[0],${R2}[0]},[$tbl0]!	@ load r^2
+++
+++	vadd.i32	$H2#lo,$H2#lo,$D2#lo	@ can be redundant
+++	vmull.u32	$D2,$H2#hi,$R0
+++	vadd.i32	$H0#lo,$H0#lo,$D0#lo
+++	vmull.u32	$D0,$H0#hi,$R0
+++	vadd.i32	$H3#lo,$H3#lo,$D3#lo
+++	vmull.u32	$D3,$H3#hi,$R0
+++	vadd.i32	$H1#lo,$H1#lo,$D1#lo
+++	vmull.u32	$D1,$H1#hi,$R0
+++	vadd.i32	$H4#lo,$H4#lo,$D4#lo
+++	vmull.u32	$D4,$H4#hi,$R0
+++
+++	vmlal.u32	$D0,$H4#hi,$S1
+++	vld4.32		{${S2}[1],${R3}[1],${S3}[1],${R4}[1]},[$tbl1]!
+++	vmlal.u32	$D3,$H2#hi,$R1
+++	vld4.32		{${S2}[0],${R3}[0],${S3}[0],${R4}[0]},[$tbl0]!
+++	vmlal.u32	$D1,$H0#hi,$R1
+++	vmlal.u32	$D4,$H3#hi,$R1
+++	vmlal.u32	$D2,$H1#hi,$R1
+++
+++	vmlal.u32	$D3,$H1#hi,$R2
+++	vld1.32		${S4}[1],[$tbl1,:32]
+++	vmlal.u32	$D0,$H3#hi,$S2
+++	vld1.32		${S4}[0],[$tbl0,:32]
+++	vmlal.u32	$D4,$H2#hi,$R2
+++	vmlal.u32	$D1,$H4#hi,$S2
+++	vmlal.u32	$D2,$H0#hi,$R2
+++
+++	vmlal.u32	$D3,$H0#hi,$R3
+++	 it		ne
+++	 addne		$tbl1,$ctx,#(48+2*9*4)
+++	vmlal.u32	$D0,$H2#hi,$S3
+++	 it		ne
+++	 addne		$tbl0,$ctx,#(48+3*9*4)
+++	vmlal.u32	$D4,$H1#hi,$R3
+++	vmlal.u32	$D1,$H3#hi,$S3
+++	vmlal.u32	$D2,$H4#hi,$S3
+++
+++	vmlal.u32	$D3,$H4#hi,$S4
+++	 vorn		$MASK,$MASK,$MASK	@ all-ones, can be redundant
+++	vmlal.u32	$D0,$H1#hi,$S4
+++	 vshr.u64	$MASK,$MASK,#38
+++	vmlal.u32	$D4,$H0#hi,$R4
+++	vmlal.u32	$D1,$H2#hi,$S4
+++	vmlal.u32	$D2,$H3#hi,$S4
+++
+++	beq		.Lshort_tail
+++
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ (hash+inp[0:1])*r^4:r^3 and accumulate
+++
+++	vld4.32		{${R0}[1],${R1}[1],${S1}[1],${R2}[1]},[$tbl1]!	@ load r^3
+++	vld4.32		{${R0}[0],${R1}[0],${S1}[0],${R2}[0]},[$tbl0]!	@ load r^4
+++
+++	vmlal.u32	$D2,$H2#lo,$R0
+++	vmlal.u32	$D0,$H0#lo,$R0
+++	vmlal.u32	$D3,$H3#lo,$R0
+++	vmlal.u32	$D1,$H1#lo,$R0
+++	vmlal.u32	$D4,$H4#lo,$R0
+++
+++	vmlal.u32	$D0,$H4#lo,$S1
+++	vld4.32		{${S2}[1],${R3}[1],${S3}[1],${R4}[1]},[$tbl1]!
+++	vmlal.u32	$D3,$H2#lo,$R1
+++	vld4.32		{${S2}[0],${R3}[0],${S3}[0],${R4}[0]},[$tbl0]!
+++	vmlal.u32	$D1,$H0#lo,$R1
+++	vmlal.u32	$D4,$H3#lo,$R1
+++	vmlal.u32	$D2,$H1#lo,$R1
+++
+++	vmlal.u32	$D3,$H1#lo,$R2
+++	vld1.32		${S4}[1],[$tbl1,:32]
+++	vmlal.u32	$D0,$H3#lo,$S2
+++	vld1.32		${S4}[0],[$tbl0,:32]
+++	vmlal.u32	$D4,$H2#lo,$R2
+++	vmlal.u32	$D1,$H4#lo,$S2
+++	vmlal.u32	$D2,$H0#lo,$R2
+++
+++	vmlal.u32	$D3,$H0#lo,$R3
+++	vmlal.u32	$D0,$H2#lo,$S3
+++	vmlal.u32	$D4,$H1#lo,$R3
+++	vmlal.u32	$D1,$H3#lo,$S3
+++	vmlal.u32	$D2,$H4#lo,$S3
+++
+++	vmlal.u32	$D3,$H4#lo,$S4
+++	 vorn		$MASK,$MASK,$MASK	@ all-ones
+++	vmlal.u32	$D0,$H1#lo,$S4
+++	 vshr.u64	$MASK,$MASK,#38
+++	vmlal.u32	$D4,$H0#lo,$R4
+++	vmlal.u32	$D1,$H2#lo,$S4
+++	vmlal.u32	$D2,$H3#lo,$S4
+++
+++.Lshort_tail:
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ horizontal addition
+++
+++	vadd.i64	$D3#lo,$D3#lo,$D3#hi
+++	vadd.i64	$D0#lo,$D0#lo,$D0#hi
+++	vadd.i64	$D4#lo,$D4#lo,$D4#hi
+++	vadd.i64	$D1#lo,$D1#lo,$D1#hi
+++	vadd.i64	$D2#lo,$D2#lo,$D2#hi
+++
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ lazy reduction, but without narrowing
+++
+++	vshr.u64	$T0,$D3,#26
+++	vand.i64	$D3,$D3,$MASK
+++	 vshr.u64	$T1,$D0,#26
+++	 vand.i64	$D0,$D0,$MASK
+++	vadd.i64	$D4,$D4,$T0		@ h3 -> h4
+++	 vadd.i64	$D1,$D1,$T1		@ h0 -> h1
+++
+++	vshr.u64	$T0,$D4,#26
+++	vand.i64	$D4,$D4,$MASK
+++	 vshr.u64	$T1,$D1,#26
+++	 vand.i64	$D1,$D1,$MASK
+++	 vadd.i64	$D2,$D2,$T1		@ h1 -> h2
+++
+++	vadd.i64	$D0,$D0,$T0
+++	vshl.u64	$T0,$T0,#2
+++	 vshr.u64	$T1,$D2,#26
+++	 vand.i64	$D2,$D2,$MASK
+++	vadd.i64	$D0,$D0,$T0		@ h4 -> h0
+++	 vadd.i64	$D3,$D3,$T1		@ h2 -> h3
+++
+++	vshr.u64	$T0,$D0,#26
+++	vand.i64	$D0,$D0,$MASK
+++	 vshr.u64	$T1,$D3,#26
+++	 vand.i64	$D3,$D3,$MASK
+++	vadd.i64	$D1,$D1,$T0		@ h0 -> h1
+++	 vadd.i64	$D4,$D4,$T1		@ h3 -> h4
+++
+++	cmp		$len,#0
+++	bne		.Leven
+++
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ store hash value
+++
+++	vst4.32		{$D0#lo[0],$D1#lo[0],$D2#lo[0],$D3#lo[0]},[$ctx]!
+++	vst1.32		{$D4#lo[0]},[$ctx]
+++
+++	vldmia	sp!,{d8-d15}			@ epilogue
+++	ldmia	sp!,{r4-r7}
+++	ret					@ bx	lr
+++.size	poly1305_blocks_neon,.-poly1305_blocks_neon
+++
+++.align	5
+++.Lzeros:
+++.long	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+++#ifndef	__KERNEL__
+++.LOPENSSL_armcap:
+++# ifdef	_WIN32
+++.word	OPENSSL_armcap_P
+++# else
+++.word	OPENSSL_armcap_P-.Lpoly1305_init
+++# endif
+++.comm	OPENSSL_armcap_P,4,4
+++.hidden	OPENSSL_armcap_P
+++#endif
+++#endif
+++___
+++}	}
+++$code.=<<___;
+++.asciz	"Poly1305 for ARMv4/NEON, CRYPTOGAMS by \@dot-asm"
+++.align	2
+++___
+++
+++foreach (split("\n",$code)) {
+++	s/\`([^\`]*)\`/eval $1/geo;
+++
+++	s/\bq([0-9]+)#(lo|hi)/sprintf "d%d",2*$1+($2 eq "hi")/geo	or
+++	s/\bret\b/bx	lr/go						or
+++	s/\bbx\s+lr\b/.word\t0xe12fff1e/go;	# make it possible to compile with -march=armv4
+++
+++	print $_,"\n";
+++}
+++close STDOUT; # enforce flush
++--- /dev/null
+++++ b/arch/arm/crypto/poly1305-core.S_shipped
++@@ -0,0 +1,1158 @@
+++#ifndef	__KERNEL__
+++# include "arm_arch.h"
+++#else
+++# define __ARM_ARCH__ __LINUX_ARM_ARCH__
+++# define __ARM_MAX_ARCH__ __LINUX_ARM_ARCH__
+++# define poly1305_init   poly1305_init_arm
+++# define poly1305_blocks poly1305_blocks_arm
+++# define poly1305_emit   poly1305_emit_arm
+++.globl	poly1305_blocks_neon
+++#endif
+++
+++#if defined(__thumb2__)
+++.syntax	unified
+++.thumb
+++#else
+++.code	32
+++#endif
+++
+++.text
+++
+++.globl	poly1305_emit
+++.globl	poly1305_blocks
+++.globl	poly1305_init
+++.type	poly1305_init,%function
+++.align	5
+++poly1305_init:
+++.Lpoly1305_init:
+++	stmdb	sp!,{r4-r11}
+++
+++	eor	r3,r3,r3
+++	cmp	r1,#0
+++	str	r3,[r0,#0]		@ zero hash value
+++	str	r3,[r0,#4]
+++	str	r3,[r0,#8]
+++	str	r3,[r0,#12]
+++	str	r3,[r0,#16]
+++	str	r3,[r0,#36]		@ clear is_base2_26
+++	add	r0,r0,#20
+++
+++#ifdef	__thumb2__
+++	it	eq
+++#endif
+++	moveq	r0,#0
+++	beq	.Lno_key
+++
+++#if	__ARM_MAX_ARCH__>=7
+++	mov	r3,#-1
+++	str	r3,[r0,#28]		@ impossible key power value
+++# ifndef __KERNEL__
+++	adr	r11,.Lpoly1305_init
+++	ldr	r12,.LOPENSSL_armcap
+++# endif
+++#endif
+++	ldrb	r4,[r1,#0]
+++	mov	r10,#0x0fffffff
+++	ldrb	r5,[r1,#1]
+++	and	r3,r10,#-4		@ 0x0ffffffc
+++	ldrb	r6,[r1,#2]
+++	ldrb	r7,[r1,#3]
+++	orr	r4,r4,r5,lsl#8
+++	ldrb	r5,[r1,#4]
+++	orr	r4,r4,r6,lsl#16
+++	ldrb	r6,[r1,#5]
+++	orr	r4,r4,r7,lsl#24
+++	ldrb	r7,[r1,#6]
+++	and	r4,r4,r10
+++
+++#if	__ARM_MAX_ARCH__>=7 && !defined(__KERNEL__)
+++# if !defined(_WIN32)
+++	ldr	r12,[r11,r12]		@ OPENSSL_armcap_P
+++# endif
+++# if defined(__APPLE__) || defined(_WIN32)
+++	ldr	r12,[r12]
+++# endif
+++#endif
+++	ldrb	r8,[r1,#7]
+++	orr	r5,r5,r6,lsl#8
+++	ldrb	r6,[r1,#8]
+++	orr	r5,r5,r7,lsl#16
+++	ldrb	r7,[r1,#9]
+++	orr	r5,r5,r8,lsl#24
+++	ldrb	r8,[r1,#10]
+++	and	r5,r5,r3
+++
+++#if	__ARM_MAX_ARCH__>=7 && !defined(__KERNEL__)
+++	tst	r12,#ARMV7_NEON		@ check for NEON
+++# ifdef	__thumb2__
+++	adr	r9,.Lpoly1305_blocks_neon
+++	adr	r11,.Lpoly1305_blocks
+++	it	ne
+++	movne	r11,r9
+++	adr	r12,.Lpoly1305_emit
+++	orr	r11,r11,#1		@ thumb-ify addresses
+++	orr	r12,r12,#1
+++# else
+++	add	r12,r11,#(.Lpoly1305_emit-.Lpoly1305_init)
+++	ite	eq
+++	addeq	r11,r11,#(.Lpoly1305_blocks-.Lpoly1305_init)
+++	addne	r11,r11,#(.Lpoly1305_blocks_neon-.Lpoly1305_init)
+++# endif
+++#endif
+++	ldrb	r9,[r1,#11]
+++	orr	r6,r6,r7,lsl#8
+++	ldrb	r7,[r1,#12]
+++	orr	r6,r6,r8,lsl#16
+++	ldrb	r8,[r1,#13]
+++	orr	r6,r6,r9,lsl#24
+++	ldrb	r9,[r1,#14]
+++	and	r6,r6,r3
+++
+++	ldrb	r10,[r1,#15]
+++	orr	r7,r7,r8,lsl#8
+++	str	r4,[r0,#0]
+++	orr	r7,r7,r9,lsl#16
+++	str	r5,[r0,#4]
+++	orr	r7,r7,r10,lsl#24
+++	str	r6,[r0,#8]
+++	and	r7,r7,r3
+++	str	r7,[r0,#12]
+++#if	__ARM_MAX_ARCH__>=7 && !defined(__KERNEL__)
+++	stmia	r2,{r11,r12}		@ fill functions table
+++	mov	r0,#1
+++#else
+++	mov	r0,#0
+++#endif
+++.Lno_key:
+++	ldmia	sp!,{r4-r11}
+++#if	__ARM_ARCH__>=5
+++	bx	lr				@ bx	lr
+++#else
+++	tst	lr,#1
+++	moveq	pc,lr			@ be binary compatible with V4, yet
+++	.word	0xe12fff1e			@ interoperable with Thumb ISA:-)
+++#endif
+++.size	poly1305_init,.-poly1305_init
+++.type	poly1305_blocks,%function
+++.align	5
+++poly1305_blocks:
+++.Lpoly1305_blocks:
+++	stmdb	sp!,{r3-r11,lr}
+++
+++	ands	r2,r2,#-16
+++	beq	.Lno_data
+++
+++	add	r2,r2,r1		@ end pointer
+++	sub	sp,sp,#32
+++
+++#if __ARM_ARCH__<7
+++	ldmia	r0,{r4-r12}		@ load context
+++	add	r0,r0,#20
+++	str	r2,[sp,#16]		@ offload stuff
+++	str	r0,[sp,#12]
+++#else
+++	ldr	lr,[r0,#36]		@ is_base2_26
+++	ldmia	r0!,{r4-r8}		@ load hash value
+++	str	r2,[sp,#16]		@ offload stuff
+++	str	r0,[sp,#12]
+++
+++	adds	r9,r4,r5,lsl#26	@ base 2^26 -> base 2^32
+++	mov	r10,r5,lsr#6
+++	adcs	r10,r10,r6,lsl#20
+++	mov	r11,r6,lsr#12
+++	adcs	r11,r11,r7,lsl#14
+++	mov	r12,r7,lsr#18
+++	adcs	r12,r12,r8,lsl#8
+++	mov	r2,#0
+++	teq	lr,#0
+++	str	r2,[r0,#16]		@ clear is_base2_26
+++	adc	r2,r2,r8,lsr#24
+++
+++	itttt	ne
+++	movne	r4,r9			@ choose between radixes
+++	movne	r5,r10
+++	movne	r6,r11
+++	movne	r7,r12
+++	ldmia	r0,{r9-r12}		@ load key
+++	it	ne
+++	movne	r8,r2
+++#endif
+++
+++	mov	lr,r1
+++	cmp	r3,#0
+++	str	r10,[sp,#20]
+++	str	r11,[sp,#24]
+++	str	r12,[sp,#28]
+++	b	.Loop
+++
+++.align	4
+++.Loop:
+++#if __ARM_ARCH__<7
+++	ldrb	r0,[lr],#16		@ load input
+++# ifdef	__thumb2__
+++	it	hi
+++# endif
+++	addhi	r8,r8,#1		@ 1<<128
+++	ldrb	r1,[lr,#-15]
+++	ldrb	r2,[lr,#-14]
+++	ldrb	r3,[lr,#-13]
+++	orr	r1,r0,r1,lsl#8
+++	ldrb	r0,[lr,#-12]
+++	orr	r2,r1,r2,lsl#16
+++	ldrb	r1,[lr,#-11]
+++	orr	r3,r2,r3,lsl#24
+++	ldrb	r2,[lr,#-10]
+++	adds	r4,r4,r3		@ accumulate input
+++
+++	ldrb	r3,[lr,#-9]
+++	orr	r1,r0,r1,lsl#8
+++	ldrb	r0,[lr,#-8]
+++	orr	r2,r1,r2,lsl#16
+++	ldrb	r1,[lr,#-7]
+++	orr	r3,r2,r3,lsl#24
+++	ldrb	r2,[lr,#-6]
+++	adcs	r5,r5,r3
+++
+++	ldrb	r3,[lr,#-5]
+++	orr	r1,r0,r1,lsl#8
+++	ldrb	r0,[lr,#-4]
+++	orr	r2,r1,r2,lsl#16
+++	ldrb	r1,[lr,#-3]
+++	orr	r3,r2,r3,lsl#24
+++	ldrb	r2,[lr,#-2]
+++	adcs	r6,r6,r3
+++
+++	ldrb	r3,[lr,#-1]
+++	orr	r1,r0,r1,lsl#8
+++	str	lr,[sp,#8]		@ offload input pointer
+++	orr	r2,r1,r2,lsl#16
+++	add	r10,r10,r10,lsr#2
+++	orr	r3,r2,r3,lsl#24
+++#else
+++	ldr	r0,[lr],#16		@ load input
+++	it	hi
+++	addhi	r8,r8,#1		@ padbit
+++	ldr	r1,[lr,#-12]
+++	ldr	r2,[lr,#-8]
+++	ldr	r3,[lr,#-4]
+++# ifdef	__ARMEB__
+++	rev	r0,r0
+++	rev	r1,r1
+++	rev	r2,r2
+++	rev	r3,r3
+++# endif
+++	adds	r4,r4,r0		@ accumulate input
+++	str	lr,[sp,#8]		@ offload input pointer
+++	adcs	r5,r5,r1
+++	add	r10,r10,r10,lsr#2
+++	adcs	r6,r6,r2
+++#endif
+++	add	r11,r11,r11,lsr#2
+++	adcs	r7,r7,r3
+++	add	r12,r12,r12,lsr#2
+++
+++	umull	r2,r3,r5,r9
+++	 adc	r8,r8,#0
+++	umull	r0,r1,r4,r9
+++	umlal	r2,r3,r8,r10
+++	umlal	r0,r1,r7,r10
+++	ldr	r10,[sp,#20]		@ reload r10
+++	umlal	r2,r3,r6,r12
+++	umlal	r0,r1,r5,r12
+++	umlal	r2,r3,r7,r11
+++	umlal	r0,r1,r6,r11
+++	umlal	r2,r3,r4,r10
+++	str	r0,[sp,#0]		@ future r4
+++	 mul	r0,r11,r8
+++	ldr	r11,[sp,#24]		@ reload r11
+++	adds	r2,r2,r1		@ d1+=d0>>32
+++	 eor	r1,r1,r1
+++	adc	lr,r3,#0		@ future r6
+++	str	r2,[sp,#4]		@ future r5
+++
+++	mul	r2,r12,r8
+++	eor	r3,r3,r3
+++	umlal	r0,r1,r7,r12
+++	ldr	r12,[sp,#28]		@ reload r12
+++	umlal	r2,r3,r7,r9
+++	umlal	r0,r1,r6,r9
+++	umlal	r2,r3,r6,r10
+++	umlal	r0,r1,r5,r10
+++	umlal	r2,r3,r5,r11
+++	umlal	r0,r1,r4,r11
+++	umlal	r2,r3,r4,r12
+++	ldr	r4,[sp,#0]
+++	mul	r8,r9,r8
+++	ldr	r5,[sp,#4]
+++
+++	adds	r6,lr,r0		@ d2+=d1>>32
+++	ldr	lr,[sp,#8]		@ reload input pointer
+++	adc	r1,r1,#0
+++	adds	r7,r2,r1		@ d3+=d2>>32
+++	ldr	r0,[sp,#16]		@ reload end pointer
+++	adc	r3,r3,#0
+++	add	r8,r8,r3		@ h4+=d3>>32
+++
+++	and	r1,r8,#-4
+++	and	r8,r8,#3
+++	add	r1,r1,r1,lsr#2		@ *=5
+++	adds	r4,r4,r1
+++	adcs	r5,r5,#0
+++	adcs	r6,r6,#0
+++	adcs	r7,r7,#0
+++	adc	r8,r8,#0
+++
+++	cmp	r0,lr			@ done yet?
+++	bhi	.Loop
+++
+++	ldr	r0,[sp,#12]
+++	add	sp,sp,#32
+++	stmdb	r0,{r4-r8}		@ store the result
+++
+++.Lno_data:
+++#if	__ARM_ARCH__>=5
+++	ldmia	sp!,{r3-r11,pc}
+++#else
+++	ldmia	sp!,{r3-r11,lr}
+++	tst	lr,#1
+++	moveq	pc,lr			@ be binary compatible with V4, yet
+++	.word	0xe12fff1e			@ interoperable with Thumb ISA:-)
+++#endif
+++.size	poly1305_blocks,.-poly1305_blocks
+++.type	poly1305_emit,%function
+++.align	5
+++poly1305_emit:
+++.Lpoly1305_emit:
+++	stmdb	sp!,{r4-r11}
+++
+++	ldmia	r0,{r3-r7}
+++
+++#if __ARM_ARCH__>=7
+++	ldr	ip,[r0,#36]		@ is_base2_26
+++
+++	adds	r8,r3,r4,lsl#26	@ base 2^26 -> base 2^32
+++	mov	r9,r4,lsr#6
+++	adcs	r9,r9,r5,lsl#20
+++	mov	r10,r5,lsr#12
+++	adcs	r10,r10,r6,lsl#14
+++	mov	r11,r6,lsr#18
+++	adcs	r11,r11,r7,lsl#8
+++	mov	r0,#0
+++	adc	r0,r0,r7,lsr#24
+++
+++	tst	ip,ip
+++	itttt	ne
+++	movne	r3,r8
+++	movne	r4,r9
+++	movne	r5,r10
+++	movne	r6,r11
+++	it	ne
+++	movne	r7,r0
+++#endif
+++
+++	adds	r8,r3,#5		@ compare to modulus
+++	adcs	r9,r4,#0
+++	adcs	r10,r5,#0
+++	adcs	r11,r6,#0
+++	adc	r0,r7,#0
+++	tst	r0,#4			@ did it carry/borrow?
+++
+++#ifdef	__thumb2__
+++	it	ne
+++#endif
+++	movne	r3,r8
+++	ldr	r8,[r2,#0]
+++#ifdef	__thumb2__
+++	it	ne
+++#endif
+++	movne	r4,r9
+++	ldr	r9,[r2,#4]
+++#ifdef	__thumb2__
+++	it	ne
+++#endif
+++	movne	r5,r10
+++	ldr	r10,[r2,#8]
+++#ifdef	__thumb2__
+++	it	ne
+++#endif
+++	movne	r6,r11
+++	ldr	r11,[r2,#12]
+++
+++	adds	r3,r3,r8
+++	adcs	r4,r4,r9
+++	adcs	r5,r5,r10
+++	adc	r6,r6,r11
+++
+++#if __ARM_ARCH__>=7
+++# ifdef __ARMEB__
+++	rev	r3,r3
+++	rev	r4,r4
+++	rev	r5,r5
+++	rev	r6,r6
+++# endif
+++	str	r3,[r1,#0]
+++	str	r4,[r1,#4]
+++	str	r5,[r1,#8]
+++	str	r6,[r1,#12]
+++#else
+++	strb	r3,[r1,#0]
+++	mov	r3,r3,lsr#8
+++	strb	r4,[r1,#4]
+++	mov	r4,r4,lsr#8
+++	strb	r5,[r1,#8]
+++	mov	r5,r5,lsr#8
+++	strb	r6,[r1,#12]
+++	mov	r6,r6,lsr#8
+++
+++	strb	r3,[r1,#1]
+++	mov	r3,r3,lsr#8
+++	strb	r4,[r1,#5]
+++	mov	r4,r4,lsr#8
+++	strb	r5,[r1,#9]
+++	mov	r5,r5,lsr#8
+++	strb	r6,[r1,#13]
+++	mov	r6,r6,lsr#8
+++
+++	strb	r3,[r1,#2]
+++	mov	r3,r3,lsr#8
+++	strb	r4,[r1,#6]
+++	mov	r4,r4,lsr#8
+++	strb	r5,[r1,#10]
+++	mov	r5,r5,lsr#8
+++	strb	r6,[r1,#14]
+++	mov	r6,r6,lsr#8
+++
+++	strb	r3,[r1,#3]
+++	strb	r4,[r1,#7]
+++	strb	r5,[r1,#11]
+++	strb	r6,[r1,#15]
+++#endif
+++	ldmia	sp!,{r4-r11}
+++#if	__ARM_ARCH__>=5
+++	bx	lr				@ bx	lr
+++#else
+++	tst	lr,#1
+++	moveq	pc,lr			@ be binary compatible with V4, yet
+++	.word	0xe12fff1e			@ interoperable with Thumb ISA:-)
+++#endif
+++.size	poly1305_emit,.-poly1305_emit
+++#if	__ARM_MAX_ARCH__>=7
+++.fpu	neon
+++
+++.type	poly1305_init_neon,%function
+++.align	5
+++poly1305_init_neon:
+++.Lpoly1305_init_neon:
+++	ldr	r3,[r0,#48]		@ first table element
+++	cmp	r3,#-1			@ is value impossible?
+++	bne	.Lno_init_neon
+++
+++	ldr	r4,[r0,#20]		@ load key base 2^32
+++	ldr	r5,[r0,#24]
+++	ldr	r6,[r0,#28]
+++	ldr	r7,[r0,#32]
+++
+++	and	r2,r4,#0x03ffffff	@ base 2^32 -> base 2^26
+++	mov	r3,r4,lsr#26
+++	mov	r4,r5,lsr#20
+++	orr	r3,r3,r5,lsl#6
+++	mov	r5,r6,lsr#14
+++	orr	r4,r4,r6,lsl#12
+++	mov	r6,r7,lsr#8
+++	orr	r5,r5,r7,lsl#18
+++	and	r3,r3,#0x03ffffff
+++	and	r4,r4,#0x03ffffff
+++	and	r5,r5,#0x03ffffff
+++
+++	vdup.32	d0,r2			@ r^1 in both lanes
+++	add	r2,r3,r3,lsl#2		@ *5
+++	vdup.32	d1,r3
+++	add	r3,r4,r4,lsl#2
+++	vdup.32	d2,r2
+++	vdup.32	d3,r4
+++	add	r4,r5,r5,lsl#2
+++	vdup.32	d4,r3
+++	vdup.32	d5,r5
+++	add	r5,r6,r6,lsl#2
+++	vdup.32	d6,r4
+++	vdup.32	d7,r6
+++	vdup.32	d8,r5
+++
+++	mov	r5,#2		@ counter
+++
+++.Lsquare_neon:
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ d0 = h0*r0 + h4*5*r1 + h3*5*r2 + h2*5*r3 + h1*5*r4
+++	@ d1 = h1*r0 + h0*r1   + h4*5*r2 + h3*5*r3 + h2*5*r4
+++	@ d2 = h2*r0 + h1*r1   + h0*r2   + h4*5*r3 + h3*5*r4
+++	@ d3 = h3*r0 + h2*r1   + h1*r2   + h0*r3   + h4*5*r4
+++	@ d4 = h4*r0 + h3*r1   + h2*r2   + h1*r3   + h0*r4
+++
+++	vmull.u32	q5,d0,d0[1]
+++	vmull.u32	q6,d1,d0[1]
+++	vmull.u32	q7,d3,d0[1]
+++	vmull.u32	q8,d5,d0[1]
+++	vmull.u32	q9,d7,d0[1]
+++
+++	vmlal.u32	q5,d7,d2[1]
+++	vmlal.u32	q6,d0,d1[1]
+++	vmlal.u32	q7,d1,d1[1]
+++	vmlal.u32	q8,d3,d1[1]
+++	vmlal.u32	q9,d5,d1[1]
+++
+++	vmlal.u32	q5,d5,d4[1]
+++	vmlal.u32	q6,d7,d4[1]
+++	vmlal.u32	q8,d1,d3[1]
+++	vmlal.u32	q7,d0,d3[1]
+++	vmlal.u32	q9,d3,d3[1]
+++
+++	vmlal.u32	q5,d3,d6[1]
+++	vmlal.u32	q8,d0,d5[1]
+++	vmlal.u32	q6,d5,d6[1]
+++	vmlal.u32	q7,d7,d6[1]
+++	vmlal.u32	q9,d1,d5[1]
+++
+++	vmlal.u32	q8,d7,d8[1]
+++	vmlal.u32	q5,d1,d8[1]
+++	vmlal.u32	q6,d3,d8[1]
+++	vmlal.u32	q7,d5,d8[1]
+++	vmlal.u32	q9,d0,d7[1]
+++
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ lazy reduction as discussed in "NEON crypto" by D.J. Bernstein
+++	@ and P. Schwabe
+++	@
+++	@ H0>>+H1>>+H2>>+H3>>+H4
+++	@ H3>>+H4>>*5+H0>>+H1
+++	@
+++	@ Trivia.
+++	@
+++	@ Result of multiplication of n-bit number by m-bit number is
+++	@ n+m bits wide. However! Even though 2^n is a n+1-bit number,
+++	@ m-bit number multiplied by 2^n is still n+m bits wide.
+++	@
+++	@ Sum of two n-bit numbers is n+1 bits wide, sum of three - n+2,
+++	@ and so is sum of four. Sum of 2^m n-m-bit numbers and n-bit
+++	@ one is n+1 bits wide.
+++	@
+++	@ >>+ denotes Hnext += Hn>>26, Hn &= 0x3ffffff. This means that
+++	@ H0, H2, H3 are guaranteed to be 26 bits wide, while H1 and H4
+++	@ can be 27. However! In cases when their width exceeds 26 bits
+++	@ they are limited by 2^26+2^6. This in turn means that *sum*
+++	@ of the products with these values can still be viewed as sum
+++	@ of 52-bit numbers as long as the amount of addends is not a
+++	@ power of 2. For example,
+++	@
+++	@ H4 = H4*R0 + H3*R1 + H2*R2 + H1*R3 + H0 * R4,
+++	@
+++	@ which can't be larger than 5 * (2^26 + 2^6) * (2^26 + 2^6), or
+++	@ 5 * (2^52 + 2*2^32 + 2^12), which in turn is smaller than
+++	@ 8 * (2^52) or 2^55. However, the value is then multiplied by
+++	@ by 5, so we should be looking at 5 * 5 * (2^52 + 2^33 + 2^12),
+++	@ which is less than 32 * (2^52) or 2^57. And when processing
+++	@ data we are looking at triple as many addends...
+++	@
+++	@ In key setup procedure pre-reduced H0 is limited by 5*4+1 and
+++	@ 5*H4 - by 5*5 52-bit addends, or 57 bits. But when hashing the
+++	@ input H0 is limited by (5*4+1)*3 addends, or 58 bits, while
+++	@ 5*H4 by 5*5*3, or 59[!] bits. How is this relevant? vmlal.u32
+++	@ instruction accepts 2x32-bit input and writes 2x64-bit result.
+++	@ This means that result of reduction have to be compressed upon
+++	@ loop wrap-around. This can be done in the process of reduction
+++	@ to minimize amount of instructions [as well as amount of
+++	@ 128-bit instructions, which benefits low-end processors], but
+++	@ one has to watch for H2 (which is narrower than H0) and 5*H4
+++	@ not being wider than 58 bits, so that result of right shift
+++	@ by 26 bits fits in 32 bits. This is also useful on x86,
+++	@ because it allows to use paddd in place for paddq, which
+++	@ benefits Atom, where paddq is ridiculously slow.
+++
+++	vshr.u64	q15,q8,#26
+++	vmovn.i64	d16,q8
+++	 vshr.u64	q4,q5,#26
+++	 vmovn.i64	d10,q5
+++	vadd.i64	q9,q9,q15		@ h3 -> h4
+++	vbic.i32	d16,#0xfc000000	@ &=0x03ffffff
+++	 vadd.i64	q6,q6,q4		@ h0 -> h1
+++	 vbic.i32	d10,#0xfc000000
+++
+++	vshrn.u64	d30,q9,#26
+++	vmovn.i64	d18,q9
+++	 vshr.u64	q4,q6,#26
+++	 vmovn.i64	d12,q6
+++	 vadd.i64	q7,q7,q4		@ h1 -> h2
+++	vbic.i32	d18,#0xfc000000
+++	 vbic.i32	d12,#0xfc000000
+++
+++	vadd.i32	d10,d10,d30
+++	vshl.u32	d30,d30,#2
+++	 vshrn.u64	d8,q7,#26
+++	 vmovn.i64	d14,q7
+++	vadd.i32	d10,d10,d30	@ h4 -> h0
+++	 vadd.i32	d16,d16,d8	@ h2 -> h3
+++	 vbic.i32	d14,#0xfc000000
+++
+++	vshr.u32	d30,d10,#26
+++	vbic.i32	d10,#0xfc000000
+++	 vshr.u32	d8,d16,#26
+++	 vbic.i32	d16,#0xfc000000
+++	vadd.i32	d12,d12,d30	@ h0 -> h1
+++	 vadd.i32	d18,d18,d8	@ h3 -> h4
+++
+++	subs		r5,r5,#1
+++	beq		.Lsquare_break_neon
+++
+++	add		r6,r0,#(48+0*9*4)
+++	add		r7,r0,#(48+1*9*4)
+++
+++	vtrn.32		d0,d10		@ r^2:r^1
+++	vtrn.32		d3,d14
+++	vtrn.32		d5,d16
+++	vtrn.32		d1,d12
+++	vtrn.32		d7,d18
+++
+++	vshl.u32	d4,d3,#2		@ *5
+++	vshl.u32	d6,d5,#2
+++	vshl.u32	d2,d1,#2
+++	vshl.u32	d8,d7,#2
+++	vadd.i32	d4,d4,d3
+++	vadd.i32	d2,d2,d1
+++	vadd.i32	d6,d6,d5
+++	vadd.i32	d8,d8,d7
+++
+++	vst4.32		{d0[0],d1[0],d2[0],d3[0]},[r6]!
+++	vst4.32		{d0[1],d1[1],d2[1],d3[1]},[r7]!
+++	vst4.32		{d4[0],d5[0],d6[0],d7[0]},[r6]!
+++	vst4.32		{d4[1],d5[1],d6[1],d7[1]},[r7]!
+++	vst1.32		{d8[0]},[r6,:32]
+++	vst1.32		{d8[1]},[r7,:32]
+++
+++	b		.Lsquare_neon
+++
+++.align	4
+++.Lsquare_break_neon:
+++	add		r6,r0,#(48+2*4*9)
+++	add		r7,r0,#(48+3*4*9)
+++
+++	vmov		d0,d10		@ r^4:r^3
+++	vshl.u32	d2,d12,#2		@ *5
+++	vmov		d1,d12
+++	vshl.u32	d4,d14,#2
+++	vmov		d3,d14
+++	vshl.u32	d6,d16,#2
+++	vmov		d5,d16
+++	vshl.u32	d8,d18,#2
+++	vmov		d7,d18
+++	vadd.i32	d2,d2,d12
+++	vadd.i32	d4,d4,d14
+++	vadd.i32	d6,d6,d16
+++	vadd.i32	d8,d8,d18
+++
+++	vst4.32		{d0[0],d1[0],d2[0],d3[0]},[r6]!
+++	vst4.32		{d0[1],d1[1],d2[1],d3[1]},[r7]!
+++	vst4.32		{d4[0],d5[0],d6[0],d7[0]},[r6]!
+++	vst4.32		{d4[1],d5[1],d6[1],d7[1]},[r7]!
+++	vst1.32		{d8[0]},[r6]
+++	vst1.32		{d8[1]},[r7]
+++
+++.Lno_init_neon:
+++	bx	lr				@ bx	lr
+++.size	poly1305_init_neon,.-poly1305_init_neon
+++
+++.type	poly1305_blocks_neon,%function
+++.align	5
+++poly1305_blocks_neon:
+++.Lpoly1305_blocks_neon:
+++	ldr	ip,[r0,#36]		@ is_base2_26
+++
+++	cmp	r2,#64
+++	blo	.Lpoly1305_blocks
+++
+++	stmdb	sp!,{r4-r7}
+++	vstmdb	sp!,{d8-d15}		@ ABI specification says so
+++
+++	tst	ip,ip			@ is_base2_26?
+++	bne	.Lbase2_26_neon
+++
+++	stmdb	sp!,{r1-r3,lr}
+++	bl	.Lpoly1305_init_neon
+++
+++	ldr	r4,[r0,#0]		@ load hash value base 2^32
+++	ldr	r5,[r0,#4]
+++	ldr	r6,[r0,#8]
+++	ldr	r7,[r0,#12]
+++	ldr	ip,[r0,#16]
+++
+++	and	r2,r4,#0x03ffffff	@ base 2^32 -> base 2^26
+++	mov	r3,r4,lsr#26
+++	 veor	d10,d10,d10
+++	mov	r4,r5,lsr#20
+++	orr	r3,r3,r5,lsl#6
+++	 veor	d12,d12,d12
+++	mov	r5,r6,lsr#14
+++	orr	r4,r4,r6,lsl#12
+++	 veor	d14,d14,d14
+++	mov	r6,r7,lsr#8
+++	orr	r5,r5,r7,lsl#18
+++	 veor	d16,d16,d16
+++	and	r3,r3,#0x03ffffff
+++	orr	r6,r6,ip,lsl#24
+++	 veor	d18,d18,d18
+++	and	r4,r4,#0x03ffffff
+++	mov	r1,#1
+++	and	r5,r5,#0x03ffffff
+++	str	r1,[r0,#36]		@ set is_base2_26
+++
+++	vmov.32	d10[0],r2
+++	vmov.32	d12[0],r3
+++	vmov.32	d14[0],r4
+++	vmov.32	d16[0],r5
+++	vmov.32	d18[0],r6
+++	adr	r5,.Lzeros
+++
+++	ldmia	sp!,{r1-r3,lr}
+++	b	.Lhash_loaded
+++
+++.align	4
+++.Lbase2_26_neon:
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ load hash value
+++
+++	veor		d10,d10,d10
+++	veor		d12,d12,d12
+++	veor		d14,d14,d14
+++	veor		d16,d16,d16
+++	veor		d18,d18,d18
+++	vld4.32		{d10[0],d12[0],d14[0],d16[0]},[r0]!
+++	adr		r5,.Lzeros
+++	vld1.32		{d18[0]},[r0]
+++	sub		r0,r0,#16		@ rewind
+++
+++.Lhash_loaded:
+++	add		r4,r1,#32
+++	mov		r3,r3,lsl#24
+++	tst		r2,#31
+++	beq		.Leven
+++
+++	vld4.32		{d20[0],d22[0],d24[0],d26[0]},[r1]!
+++	vmov.32		d28[0],r3
+++	sub		r2,r2,#16
+++	add		r4,r1,#32
+++
+++# ifdef	__ARMEB__
+++	vrev32.8	q10,q10
+++	vrev32.8	q13,q13
+++	vrev32.8	q11,q11
+++	vrev32.8	q12,q12
+++# endif
+++	vsri.u32	d28,d26,#8	@ base 2^32 -> base 2^26
+++	vshl.u32	d26,d26,#18
+++
+++	vsri.u32	d26,d24,#14
+++	vshl.u32	d24,d24,#12
+++	vadd.i32	d29,d28,d18	@ add hash value and move to #hi
+++
+++	vbic.i32	d26,#0xfc000000
+++	vsri.u32	d24,d22,#20
+++	vshl.u32	d22,d22,#6
+++
+++	vbic.i32	d24,#0xfc000000
+++	vsri.u32	d22,d20,#26
+++	vadd.i32	d27,d26,d16
+++
+++	vbic.i32	d20,#0xfc000000
+++	vbic.i32	d22,#0xfc000000
+++	vadd.i32	d25,d24,d14
+++
+++	vadd.i32	d21,d20,d10
+++	vadd.i32	d23,d22,d12
+++
+++	mov		r7,r5
+++	add		r6,r0,#48
+++
+++	cmp		r2,r2
+++	b		.Long_tail
+++
+++.align	4
+++.Leven:
+++	subs		r2,r2,#64
+++	it		lo
+++	movlo		r4,r5
+++
+++	vmov.i32	q14,#1<<24		@ padbit, yes, always
+++	vld4.32		{d20,d22,d24,d26},[r1]	@ inp[0:1]
+++	add		r1,r1,#64
+++	vld4.32		{d21,d23,d25,d27},[r4]	@ inp[2:3] (or 0)
+++	add		r4,r4,#64
+++	itt		hi
+++	addhi		r7,r0,#(48+1*9*4)
+++	addhi		r6,r0,#(48+3*9*4)
+++
+++# ifdef	__ARMEB__
+++	vrev32.8	q10,q10
+++	vrev32.8	q13,q13
+++	vrev32.8	q11,q11
+++	vrev32.8	q12,q12
+++# endif
+++	vsri.u32	q14,q13,#8		@ base 2^32 -> base 2^26
+++	vshl.u32	q13,q13,#18
+++
+++	vsri.u32	q13,q12,#14
+++	vshl.u32	q12,q12,#12
+++
+++	vbic.i32	q13,#0xfc000000
+++	vsri.u32	q12,q11,#20
+++	vshl.u32	q11,q11,#6
+++
+++	vbic.i32	q12,#0xfc000000
+++	vsri.u32	q11,q10,#26
+++
+++	vbic.i32	q10,#0xfc000000
+++	vbic.i32	q11,#0xfc000000
+++
+++	bls		.Lskip_loop
+++
+++	vld4.32		{d0[1],d1[1],d2[1],d3[1]},[r7]!	@ load r^2
+++	vld4.32		{d0[0],d1[0],d2[0],d3[0]},[r6]!	@ load r^4
+++	vld4.32		{d4[1],d5[1],d6[1],d7[1]},[r7]!
+++	vld4.32		{d4[0],d5[0],d6[0],d7[0]},[r6]!
+++	b		.Loop_neon
+++
+++.align	5
+++.Loop_neon:
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ ((inp[0]*r^4+inp[2]*r^2+inp[4])*r^4+inp[6]*r^2
+++	@ ((inp[1]*r^4+inp[3]*r^2+inp[5])*r^3+inp[7]*r
+++	@   ___________________/
+++	@ ((inp[0]*r^4+inp[2]*r^2+inp[4])*r^4+inp[6]*r^2+inp[8])*r^2
+++	@ ((inp[1]*r^4+inp[3]*r^2+inp[5])*r^4+inp[7]*r^2+inp[9])*r
+++	@   ___________________/ ____________________/
+++	@
+++	@ Note that we start with inp[2:3]*r^2. This is because it
+++	@ doesn't depend on reduction in previous iteration.
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ d4 = h4*r0 + h3*r1   + h2*r2   + h1*r3   + h0*r4
+++	@ d3 = h3*r0 + h2*r1   + h1*r2   + h0*r3   + h4*5*r4
+++	@ d2 = h2*r0 + h1*r1   + h0*r2   + h4*5*r3 + h3*5*r4
+++	@ d1 = h1*r0 + h0*r1   + h4*5*r2 + h3*5*r3 + h2*5*r4
+++	@ d0 = h0*r0 + h4*5*r1 + h3*5*r2 + h2*5*r3 + h1*5*r4
+++
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ inp[2:3]*r^2
+++
+++	vadd.i32	d24,d24,d14	@ accumulate inp[0:1]
+++	vmull.u32	q7,d25,d0[1]
+++	vadd.i32	d20,d20,d10
+++	vmull.u32	q5,d21,d0[1]
+++	vadd.i32	d26,d26,d16
+++	vmull.u32	q8,d27,d0[1]
+++	vmlal.u32	q7,d23,d1[1]
+++	vadd.i32	d22,d22,d12
+++	vmull.u32	q6,d23,d0[1]
+++
+++	vadd.i32	d28,d28,d18
+++	vmull.u32	q9,d29,d0[1]
+++	subs		r2,r2,#64
+++	vmlal.u32	q5,d29,d2[1]
+++	it		lo
+++	movlo		r4,r5
+++	vmlal.u32	q8,d25,d1[1]
+++	vld1.32		d8[1],[r7,:32]
+++	vmlal.u32	q6,d21,d1[1]
+++	vmlal.u32	q9,d27,d1[1]
+++
+++	vmlal.u32	q5,d27,d4[1]
+++	vmlal.u32	q8,d23,d3[1]
+++	vmlal.u32	q9,d25,d3[1]
+++	vmlal.u32	q6,d29,d4[1]
+++	vmlal.u32	q7,d21,d3[1]
+++
+++	vmlal.u32	q8,d21,d5[1]
+++	vmlal.u32	q5,d25,d6[1]
+++	vmlal.u32	q9,d23,d5[1]
+++	vmlal.u32	q6,d27,d6[1]
+++	vmlal.u32	q7,d29,d6[1]
+++
+++	vmlal.u32	q8,d29,d8[1]
+++	vmlal.u32	q5,d23,d8[1]
+++	vmlal.u32	q9,d21,d7[1]
+++	vmlal.u32	q6,d25,d8[1]
+++	vmlal.u32	q7,d27,d8[1]
+++
+++	vld4.32		{d21,d23,d25,d27},[r4]	@ inp[2:3] (or 0)
+++	add		r4,r4,#64
+++
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ (hash+inp[0:1])*r^4 and accumulate
+++
+++	vmlal.u32	q8,d26,d0[0]
+++	vmlal.u32	q5,d20,d0[0]
+++	vmlal.u32	q9,d28,d0[0]
+++	vmlal.u32	q6,d22,d0[0]
+++	vmlal.u32	q7,d24,d0[0]
+++	vld1.32		d8[0],[r6,:32]
+++
+++	vmlal.u32	q8,d24,d1[0]
+++	vmlal.u32	q5,d28,d2[0]
+++	vmlal.u32	q9,d26,d1[0]
+++	vmlal.u32	q6,d20,d1[0]
+++	vmlal.u32	q7,d22,d1[0]
+++
+++	vmlal.u32	q8,d22,d3[0]
+++	vmlal.u32	q5,d26,d4[0]
+++	vmlal.u32	q9,d24,d3[0]
+++	vmlal.u32	q6,d28,d4[0]
+++	vmlal.u32	q7,d20,d3[0]
+++
+++	vmlal.u32	q8,d20,d5[0]
+++	vmlal.u32	q5,d24,d6[0]
+++	vmlal.u32	q9,d22,d5[0]
+++	vmlal.u32	q6,d26,d6[0]
+++	vmlal.u32	q8,d28,d8[0]
+++
+++	vmlal.u32	q7,d28,d6[0]
+++	vmlal.u32	q5,d22,d8[0]
+++	vmlal.u32	q9,d20,d7[0]
+++	vmov.i32	q14,#1<<24		@ padbit, yes, always
+++	vmlal.u32	q6,d24,d8[0]
+++	vmlal.u32	q7,d26,d8[0]
+++
+++	vld4.32		{d20,d22,d24,d26},[r1]	@ inp[0:1]
+++	add		r1,r1,#64
+++# ifdef	__ARMEB__
+++	vrev32.8	q10,q10
+++	vrev32.8	q11,q11
+++	vrev32.8	q12,q12
+++	vrev32.8	q13,q13
+++# endif
+++
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ lazy reduction interleaved with base 2^32 -> base 2^26 of
+++	@ inp[0:3] previously loaded to q10-q13 and smashed to q10-q14.
+++
+++	vshr.u64	q15,q8,#26
+++	vmovn.i64	d16,q8
+++	 vshr.u64	q4,q5,#26
+++	 vmovn.i64	d10,q5
+++	vadd.i64	q9,q9,q15		@ h3 -> h4
+++	vbic.i32	d16,#0xfc000000
+++	  vsri.u32	q14,q13,#8		@ base 2^32 -> base 2^26
+++	 vadd.i64	q6,q6,q4		@ h0 -> h1
+++	  vshl.u32	q13,q13,#18
+++	 vbic.i32	d10,#0xfc000000
+++
+++	vshrn.u64	d30,q9,#26
+++	vmovn.i64	d18,q9
+++	 vshr.u64	q4,q6,#26
+++	 vmovn.i64	d12,q6
+++	 vadd.i64	q7,q7,q4		@ h1 -> h2
+++	  vsri.u32	q13,q12,#14
+++	vbic.i32	d18,#0xfc000000
+++	  vshl.u32	q12,q12,#12
+++	 vbic.i32	d12,#0xfc000000
+++
+++	vadd.i32	d10,d10,d30
+++	vshl.u32	d30,d30,#2
+++	  vbic.i32	q13,#0xfc000000
+++	 vshrn.u64	d8,q7,#26
+++	 vmovn.i64	d14,q7
+++	vaddl.u32	q5,d10,d30	@ h4 -> h0 [widen for a sec]
+++	  vsri.u32	q12,q11,#20
+++	 vadd.i32	d16,d16,d8	@ h2 -> h3
+++	  vshl.u32	q11,q11,#6
+++	 vbic.i32	d14,#0xfc000000
+++	  vbic.i32	q12,#0xfc000000
+++
+++	vshrn.u64	d30,q5,#26		@ re-narrow
+++	vmovn.i64	d10,q5
+++	  vsri.u32	q11,q10,#26
+++	  vbic.i32	q10,#0xfc000000
+++	 vshr.u32	d8,d16,#26
+++	 vbic.i32	d16,#0xfc000000
+++	vbic.i32	d10,#0xfc000000
+++	vadd.i32	d12,d12,d30	@ h0 -> h1
+++	 vadd.i32	d18,d18,d8	@ h3 -> h4
+++	  vbic.i32	q11,#0xfc000000
+++
+++	bhi		.Loop_neon
+++
+++.Lskip_loop:
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ multiply (inp[0:1]+hash) or inp[2:3] by r^2:r^1
+++
+++	add		r7,r0,#(48+0*9*4)
+++	add		r6,r0,#(48+1*9*4)
+++	adds		r2,r2,#32
+++	it		ne
+++	movne		r2,#0
+++	bne		.Long_tail
+++
+++	vadd.i32	d25,d24,d14	@ add hash value and move to #hi
+++	vadd.i32	d21,d20,d10
+++	vadd.i32	d27,d26,d16
+++	vadd.i32	d23,d22,d12
+++	vadd.i32	d29,d28,d18
+++
+++.Long_tail:
+++	vld4.32		{d0[1],d1[1],d2[1],d3[1]},[r7]!	@ load r^1
+++	vld4.32		{d0[0],d1[0],d2[0],d3[0]},[r6]!	@ load r^2
+++
+++	vadd.i32	d24,d24,d14	@ can be redundant
+++	vmull.u32	q7,d25,d0
+++	vadd.i32	d20,d20,d10
+++	vmull.u32	q5,d21,d0
+++	vadd.i32	d26,d26,d16
+++	vmull.u32	q8,d27,d0
+++	vadd.i32	d22,d22,d12
+++	vmull.u32	q6,d23,d0
+++	vadd.i32	d28,d28,d18
+++	vmull.u32	q9,d29,d0
+++
+++	vmlal.u32	q5,d29,d2
+++	vld4.32		{d4[1],d5[1],d6[1],d7[1]},[r7]!
+++	vmlal.u32	q8,d25,d1
+++	vld4.32		{d4[0],d5[0],d6[0],d7[0]},[r6]!
+++	vmlal.u32	q6,d21,d1
+++	vmlal.u32	q9,d27,d1
+++	vmlal.u32	q7,d23,d1
+++
+++	vmlal.u32	q8,d23,d3
+++	vld1.32		d8[1],[r7,:32]
+++	vmlal.u32	q5,d27,d4
+++	vld1.32		d8[0],[r6,:32]
+++	vmlal.u32	q9,d25,d3
+++	vmlal.u32	q6,d29,d4
+++	vmlal.u32	q7,d21,d3
+++
+++	vmlal.u32	q8,d21,d5
+++	 it		ne
+++	 addne		r7,r0,#(48+2*9*4)
+++	vmlal.u32	q5,d25,d6
+++	 it		ne
+++	 addne		r6,r0,#(48+3*9*4)
+++	vmlal.u32	q9,d23,d5
+++	vmlal.u32	q6,d27,d6
+++	vmlal.u32	q7,d29,d6
+++
+++	vmlal.u32	q8,d29,d8
+++	 vorn		q0,q0,q0	@ all-ones, can be redundant
+++	vmlal.u32	q5,d23,d8
+++	 vshr.u64	q0,q0,#38
+++	vmlal.u32	q9,d21,d7
+++	vmlal.u32	q6,d25,d8
+++	vmlal.u32	q7,d27,d8
+++
+++	beq		.Lshort_tail
+++
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ (hash+inp[0:1])*r^4:r^3 and accumulate
+++
+++	vld4.32		{d0[1],d1[1],d2[1],d3[1]},[r7]!	@ load r^3
+++	vld4.32		{d0[0],d1[0],d2[0],d3[0]},[r6]!	@ load r^4
+++
+++	vmlal.u32	q7,d24,d0
+++	vmlal.u32	q5,d20,d0
+++	vmlal.u32	q8,d26,d0
+++	vmlal.u32	q6,d22,d0
+++	vmlal.u32	q9,d28,d0
+++
+++	vmlal.u32	q5,d28,d2
+++	vld4.32		{d4[1],d5[1],d6[1],d7[1]},[r7]!
+++	vmlal.u32	q8,d24,d1
+++	vld4.32		{d4[0],d5[0],d6[0],d7[0]},[r6]!
+++	vmlal.u32	q6,d20,d1
+++	vmlal.u32	q9,d26,d1
+++	vmlal.u32	q7,d22,d1
+++
+++	vmlal.u32	q8,d22,d3
+++	vld1.32		d8[1],[r7,:32]
+++	vmlal.u32	q5,d26,d4
+++	vld1.32		d8[0],[r6,:32]
+++	vmlal.u32	q9,d24,d3
+++	vmlal.u32	q6,d28,d4
+++	vmlal.u32	q7,d20,d3
+++
+++	vmlal.u32	q8,d20,d5
+++	vmlal.u32	q5,d24,d6
+++	vmlal.u32	q9,d22,d5
+++	vmlal.u32	q6,d26,d6
+++	vmlal.u32	q7,d28,d6
+++
+++	vmlal.u32	q8,d28,d8
+++	 vorn		q0,q0,q0	@ all-ones
+++	vmlal.u32	q5,d22,d8
+++	 vshr.u64	q0,q0,#38
+++	vmlal.u32	q9,d20,d7
+++	vmlal.u32	q6,d24,d8
+++	vmlal.u32	q7,d26,d8
+++
+++.Lshort_tail:
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ horizontal addition
+++
+++	vadd.i64	d16,d16,d17
+++	vadd.i64	d10,d10,d11
+++	vadd.i64	d18,d18,d19
+++	vadd.i64	d12,d12,d13
+++	vadd.i64	d14,d14,d15
+++
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ lazy reduction, but without narrowing
+++
+++	vshr.u64	q15,q8,#26
+++	vand.i64	q8,q8,q0
+++	 vshr.u64	q4,q5,#26
+++	 vand.i64	q5,q5,q0
+++	vadd.i64	q9,q9,q15		@ h3 -> h4
+++	 vadd.i64	q6,q6,q4		@ h0 -> h1
+++
+++	vshr.u64	q15,q9,#26
+++	vand.i64	q9,q9,q0
+++	 vshr.u64	q4,q6,#26
+++	 vand.i64	q6,q6,q0
+++	 vadd.i64	q7,q7,q4		@ h1 -> h2
+++
+++	vadd.i64	q5,q5,q15
+++	vshl.u64	q15,q15,#2
+++	 vshr.u64	q4,q7,#26
+++	 vand.i64	q7,q7,q0
+++	vadd.i64	q5,q5,q15		@ h4 -> h0
+++	 vadd.i64	q8,q8,q4		@ h2 -> h3
+++
+++	vshr.u64	q15,q5,#26
+++	vand.i64	q5,q5,q0
+++	 vshr.u64	q4,q8,#26
+++	 vand.i64	q8,q8,q0
+++	vadd.i64	q6,q6,q15		@ h0 -> h1
+++	 vadd.i64	q9,q9,q4		@ h3 -> h4
+++
+++	cmp		r2,#0
+++	bne		.Leven
+++
+++	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++	@ store hash value
+++
+++	vst4.32		{d10[0],d12[0],d14[0],d16[0]},[r0]!
+++	vst1.32		{d18[0]},[r0]
+++
+++	vldmia	sp!,{d8-d15}			@ epilogue
+++	ldmia	sp!,{r4-r7}
+++	bx	lr					@ bx	lr
+++.size	poly1305_blocks_neon,.-poly1305_blocks_neon
+++
+++.align	5
+++.Lzeros:
+++.long	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+++#ifndef	__KERNEL__
+++.LOPENSSL_armcap:
+++# ifdef	_WIN32
+++.word	OPENSSL_armcap_P
+++# else
+++.word	OPENSSL_armcap_P-.Lpoly1305_init
+++# endif
+++.comm	OPENSSL_armcap_P,4,4
+++.hidden	OPENSSL_armcap_P
+++#endif
+++#endif
+++.asciz	"Poly1305 for ARMv4/NEON, CRYPTOGAMS by @dot-asm"
+++.align	2
++--- /dev/null
+++++ b/arch/arm/crypto/poly1305-glue.c
++@@ -0,0 +1,276 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * OpenSSL/Cryptogams accelerated Poly1305 transform for ARM
+++ *
+++ * Copyright (C) 2019 Linaro Ltd. <ard.biesheuvel@linaro.org>
+++ */
+++
+++#include <asm/hwcap.h>
+++#include <asm/neon.h>
+++#include <asm/simd.h>
+++#include <asm/unaligned.h>
+++#include <crypto/algapi.h>
+++#include <crypto/internal/hash.h>
+++#include <crypto/internal/poly1305.h>
+++#include <crypto/internal/simd.h>
+++#include <linux/cpufeature.h>
+++#include <linux/crypto.h>
+++#include <linux/jump_label.h>
+++#include <linux/module.h>
+++
+++void poly1305_init_arm(void *state, const u8 *key);
+++void poly1305_blocks_arm(void *state, const u8 *src, u32 len, u32 hibit);
+++void poly1305_emit_arm(void *state, __le32 *digest, const u32 *nonce);
+++
+++void __weak poly1305_blocks_neon(void *state, const u8 *src, u32 len, u32 hibit)
+++{
+++}
+++
+++static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);
+++
+++void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 *key)
+++{
+++	poly1305_init_arm(&dctx->h, key);
+++	dctx->s[0] = get_unaligned_le32(key + 16);
+++	dctx->s[1] = get_unaligned_le32(key + 20);
+++	dctx->s[2] = get_unaligned_le32(key + 24);
+++	dctx->s[3] = get_unaligned_le32(key + 28);
+++	dctx->buflen = 0;
+++}
+++EXPORT_SYMBOL(poly1305_init_arch);
+++
+++static int arm_poly1305_init(struct shash_desc *desc)
+++{
+++	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
+++
+++	dctx->buflen = 0;
+++	dctx->rset = 0;
+++	dctx->sset = false;
+++
+++	return 0;
+++}
+++
+++static void arm_poly1305_blocks(struct poly1305_desc_ctx *dctx, const u8 *src,
+++				 u32 len, u32 hibit, bool do_neon)
+++{
+++	if (unlikely(!dctx->sset)) {
+++		if (!dctx->rset) {
+++			poly1305_init_arm(&dctx->h, src);
+++			src += POLY1305_BLOCK_SIZE;
+++			len -= POLY1305_BLOCK_SIZE;
+++			dctx->rset = 1;
+++		}
+++		if (len >= POLY1305_BLOCK_SIZE) {
+++			dctx->s[0] = get_unaligned_le32(src +  0);
+++			dctx->s[1] = get_unaligned_le32(src +  4);
+++			dctx->s[2] = get_unaligned_le32(src +  8);
+++			dctx->s[3] = get_unaligned_le32(src + 12);
+++			src += POLY1305_BLOCK_SIZE;
+++			len -= POLY1305_BLOCK_SIZE;
+++			dctx->sset = true;
+++		}
+++		if (len < POLY1305_BLOCK_SIZE)
+++			return;
+++	}
+++
+++	len &= ~(POLY1305_BLOCK_SIZE - 1);
+++
+++	if (static_branch_likely(&have_neon) && likely(do_neon))
+++		poly1305_blocks_neon(&dctx->h, src, len, hibit);
+++	else
+++		poly1305_blocks_arm(&dctx->h, src, len, hibit);
+++}
+++
+++static void arm_poly1305_do_update(struct poly1305_desc_ctx *dctx,
+++				    const u8 *src, u32 len, bool do_neon)
+++{
+++	if (unlikely(dctx->buflen)) {
+++		u32 bytes = min(len, POLY1305_BLOCK_SIZE - dctx->buflen);
+++
+++		memcpy(dctx->buf + dctx->buflen, src, bytes);
+++		src += bytes;
+++		len -= bytes;
+++		dctx->buflen += bytes;
+++
+++		if (dctx->buflen == POLY1305_BLOCK_SIZE) {
+++			arm_poly1305_blocks(dctx, dctx->buf,
+++					    POLY1305_BLOCK_SIZE, 1, false);
+++			dctx->buflen = 0;
+++		}
+++	}
+++
+++	if (likely(len >= POLY1305_BLOCK_SIZE)) {
+++		arm_poly1305_blocks(dctx, src, len, 1, do_neon);
+++		src += round_down(len, POLY1305_BLOCK_SIZE);
+++		len %= POLY1305_BLOCK_SIZE;
+++	}
+++
+++	if (unlikely(len)) {
+++		dctx->buflen = len;
+++		memcpy(dctx->buf, src, len);
+++	}
+++}
+++
+++static int arm_poly1305_update(struct shash_desc *desc,
+++			       const u8 *src, unsigned int srclen)
+++{
+++	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
+++
+++	arm_poly1305_do_update(dctx, src, srclen, false);
+++	return 0;
+++}
+++
+++static int __maybe_unused arm_poly1305_update_neon(struct shash_desc *desc,
+++						   const u8 *src,
+++						   unsigned int srclen)
+++{
+++	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
+++	bool do_neon = crypto_simd_usable() && srclen > 128;
+++
+++	if (static_branch_likely(&have_neon) && do_neon)
+++		kernel_neon_begin();
+++	arm_poly1305_do_update(dctx, src, srclen, do_neon);
+++	if (static_branch_likely(&have_neon) && do_neon)
+++		kernel_neon_end();
+++	return 0;
+++}
+++
+++void poly1305_update_arch(struct poly1305_desc_ctx *dctx, const u8 *src,
+++			  unsigned int nbytes)
+++{
+++	bool do_neon = IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &&
+++		       crypto_simd_usable();
+++
+++	if (unlikely(dctx->buflen)) {
+++		u32 bytes = min(nbytes, POLY1305_BLOCK_SIZE - dctx->buflen);
+++
+++		memcpy(dctx->buf + dctx->buflen, src, bytes);
+++		src += bytes;
+++		nbytes -= bytes;
+++		dctx->buflen += bytes;
+++
+++		if (dctx->buflen == POLY1305_BLOCK_SIZE) {
+++			poly1305_blocks_arm(&dctx->h, dctx->buf,
+++					    POLY1305_BLOCK_SIZE, 1);
+++			dctx->buflen = 0;
+++		}
+++	}
+++
+++	if (likely(nbytes >= POLY1305_BLOCK_SIZE)) {
+++		unsigned int len = round_down(nbytes, POLY1305_BLOCK_SIZE);
+++
+++		if (static_branch_likely(&have_neon) && do_neon) {
+++			kernel_neon_begin();
+++			poly1305_blocks_neon(&dctx->h, src, len, 1);
+++			kernel_neon_end();
+++		} else {
+++			poly1305_blocks_arm(&dctx->h, src, len, 1);
+++		}
+++		src += len;
+++		nbytes %= POLY1305_BLOCK_SIZE;
+++	}
+++
+++	if (unlikely(nbytes)) {
+++		dctx->buflen = nbytes;
+++		memcpy(dctx->buf, src, nbytes);
+++	}
+++}
+++EXPORT_SYMBOL(poly1305_update_arch);
+++
+++void poly1305_final_arch(struct poly1305_desc_ctx *dctx, u8 *dst)
+++{
+++	__le32 digest[4];
+++	u64 f = 0;
+++
+++	if (unlikely(dctx->buflen)) {
+++		dctx->buf[dctx->buflen++] = 1;
+++		memset(dctx->buf + dctx->buflen, 0,
+++		       POLY1305_BLOCK_SIZE - dctx->buflen);
+++		poly1305_blocks_arm(&dctx->h, dctx->buf, POLY1305_BLOCK_SIZE, 0);
+++	}
+++
+++	poly1305_emit_arm(&dctx->h, digest, dctx->s);
+++
+++	/* mac = (h + s) % (2^128) */
+++	f = (f >> 32) + le32_to_cpu(digest[0]);
+++	put_unaligned_le32(f, dst);
+++	f = (f >> 32) + le32_to_cpu(digest[1]);
+++	put_unaligned_le32(f, dst + 4);
+++	f = (f >> 32) + le32_to_cpu(digest[2]);
+++	put_unaligned_le32(f, dst + 8);
+++	f = (f >> 32) + le32_to_cpu(digest[3]);
+++	put_unaligned_le32(f, dst + 12);
+++
+++	*dctx = (struct poly1305_desc_ctx){};
+++}
+++EXPORT_SYMBOL(poly1305_final_arch);
+++
+++static int arm_poly1305_final(struct shash_desc *desc, u8 *dst)
+++{
+++	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
+++
+++	if (unlikely(!dctx->sset))
+++		return -ENOKEY;
+++
+++	poly1305_final_arch(dctx, dst);
+++	return 0;
+++}
+++
+++static struct shash_alg arm_poly1305_algs[] = {{
+++	.init			= arm_poly1305_init,
+++	.update			= arm_poly1305_update,
+++	.final			= arm_poly1305_final,
+++	.digestsize		= POLY1305_DIGEST_SIZE,
+++	.descsize		= sizeof(struct poly1305_desc_ctx),
+++
+++	.base.cra_name		= "poly1305",
+++	.base.cra_driver_name	= "poly1305-arm",
+++	.base.cra_priority	= 150,
+++	.base.cra_blocksize	= POLY1305_BLOCK_SIZE,
+++	.base.cra_module	= THIS_MODULE,
+++#ifdef CONFIG_KERNEL_MODE_NEON
+++}, {
+++	.init			= arm_poly1305_init,
+++	.update			= arm_poly1305_update_neon,
+++	.final			= arm_poly1305_final,
+++	.digestsize		= POLY1305_DIGEST_SIZE,
+++	.descsize		= sizeof(struct poly1305_desc_ctx),
+++
+++	.base.cra_name		= "poly1305",
+++	.base.cra_driver_name	= "poly1305-neon",
+++	.base.cra_priority	= 200,
+++	.base.cra_blocksize	= POLY1305_BLOCK_SIZE,
+++	.base.cra_module	= THIS_MODULE,
+++#endif
+++}};
+++
+++static int __init arm_poly1305_mod_init(void)
+++{
+++	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &&
+++	    (elf_hwcap & HWCAP_NEON))
+++		static_branch_enable(&have_neon);
+++	else
+++		/* register only the first entry */
+++		return crypto_register_shash(&arm_poly1305_algs[0]);
+++
+++	return crypto_register_shashes(arm_poly1305_algs,
+++				       ARRAY_SIZE(arm_poly1305_algs));
+++}
+++
+++static void __exit arm_poly1305_mod_exit(void)
+++{
+++	if (!static_branch_likely(&have_neon)) {
+++		crypto_unregister_shash(&arm_poly1305_algs[0]);
+++		return;
+++	}
+++	crypto_unregister_shashes(arm_poly1305_algs,
+++				  ARRAY_SIZE(arm_poly1305_algs));
+++}
+++
+++module_init(arm_poly1305_mod_init);
+++module_exit(arm_poly1305_mod_exit);
+++
+++MODULE_LICENSE("GPL v2");
+++MODULE_ALIAS_CRYPTO("poly1305");
+++MODULE_ALIAS_CRYPTO("poly1305-arm");
+++MODULE_ALIAS_CRYPTO("poly1305-neon");
++--- a/lib/crypto/Kconfig
+++++ b/lib/crypto/Kconfig
++@@ -40,7 +40,7 @@ config CRYPTO_LIB_DES
++ config CRYPTO_LIB_POLY1305_RSIZE
++ 	int
++ 	default 4 if X86_64
++-	default 9 if ARM64
+++	default 9 if ARM || ARM64
++ 	default 1
++ 
++ config CRYPTO_ARCH_HAVE_LIB_POLY1305
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0020-crypto-mips-poly1305-incorporate-OpenSSL-CRYPTOGAMS-.patch b/target/linux/generic/backport-5.4/080-wireguard-0020-crypto-mips-poly1305-incorporate-OpenSSL-CRYPTOGAMS-.patch
+new file mode 100644
+index 0000000000..272e1797da
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0020-crypto-mips-poly1305-incorporate-OpenSSL-CRYPTOGAMS-.patch
+@@ -0,0 +1,1563 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:26 +0100
++Subject: [PATCH] crypto: mips/poly1305 - incorporate OpenSSL/CRYPTOGAMS
++ optimized implementation
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++commit a11d055e7a64ac34a5e99b6fe731299449cbcd58 upstream.
++
++This is a straight import of the OpenSSL/CRYPTOGAMS Poly1305 implementation for
++MIPS authored by Andy Polyakov, a prior 64-bit only version of which has been
++contributed by him to the OpenSSL project. The file 'poly1305-mips.pl' is taken
++straight from this upstream GitHub repository [0] at commit
++d22ade312a7af958ec955620b0d241cf42c37feb, and already contains all the changes
++required to build it as part of a Linux kernel module.
++
++[0] https://github.com/dot-asm/cryptogams
++
++Co-developed-by: Andy Polyakov <appro@cryptogams.org>
++Signed-off-by: Andy Polyakov <appro@cryptogams.org>
++Co-developed-by: René van Dorst <opensource@vdorst.com>
++Signed-off-by: René van Dorst <opensource@vdorst.com>
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/mips/crypto/Makefile         |   14 +
++ arch/mips/crypto/poly1305-glue.c  |  203 +++++
++ arch/mips/crypto/poly1305-mips.pl | 1273 +++++++++++++++++++++++++++++
++ crypto/Kconfig                    |    5 +
++ lib/crypto/Kconfig                |    1 +
++ 5 files changed, 1496 insertions(+)
++ create mode 100644 arch/mips/crypto/poly1305-glue.c
++ create mode 100644 arch/mips/crypto/poly1305-mips.pl
++
++--- a/arch/mips/crypto/Makefile
+++++ b/arch/mips/crypto/Makefile
++@@ -8,3 +8,17 @@ obj-$(CONFIG_CRYPTO_CRC32_MIPS) += crc32
++ obj-$(CONFIG_CRYPTO_CHACHA_MIPS) += chacha-mips.o
++ chacha-mips-y := chacha-core.o chacha-glue.o
++ AFLAGS_chacha-core.o += -O2 # needed to fill branch delay slots
+++
+++obj-$(CONFIG_CRYPTO_POLY1305_MIPS) += poly1305-mips.o
+++poly1305-mips-y := poly1305-core.o poly1305-glue.o
+++
+++perlasm-flavour-$(CONFIG_CPU_MIPS32) := o32
+++perlasm-flavour-$(CONFIG_CPU_MIPS64) := 64
+++
+++quiet_cmd_perlasm = PERLASM $@
+++      cmd_perlasm = $(PERL) $(<) $(perlasm-flavour-y) $(@)
+++
+++$(obj)/poly1305-core.S: $(src)/poly1305-mips.pl FORCE
+++	$(call if_changed,perlasm)
+++
+++targets += poly1305-core.S
++--- /dev/null
+++++ b/arch/mips/crypto/poly1305-glue.c
++@@ -0,0 +1,203 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * OpenSSL/Cryptogams accelerated Poly1305 transform for MIPS
+++ *
+++ * Copyright (C) 2019 Linaro Ltd. <ard.biesheuvel@linaro.org>
+++ */
+++
+++#include <asm/unaligned.h>
+++#include <crypto/algapi.h>
+++#include <crypto/internal/hash.h>
+++#include <crypto/internal/poly1305.h>
+++#include <linux/cpufeature.h>
+++#include <linux/crypto.h>
+++#include <linux/module.h>
+++
+++asmlinkage void poly1305_init_mips(void *state, const u8 *key);
+++asmlinkage void poly1305_blocks_mips(void *state, const u8 *src, u32 len, u32 hibit);
+++asmlinkage void poly1305_emit_mips(void *state, __le32 *digest, const u32 *nonce);
+++
+++void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 *key)
+++{
+++	poly1305_init_mips(&dctx->h, key);
+++	dctx->s[0] = get_unaligned_le32(key + 16);
+++	dctx->s[1] = get_unaligned_le32(key + 20);
+++	dctx->s[2] = get_unaligned_le32(key + 24);
+++	dctx->s[3] = get_unaligned_le32(key + 28);
+++	dctx->buflen = 0;
+++}
+++EXPORT_SYMBOL(poly1305_init_arch);
+++
+++static int mips_poly1305_init(struct shash_desc *desc)
+++{
+++	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
+++
+++	dctx->buflen = 0;
+++	dctx->rset = 0;
+++	dctx->sset = false;
+++
+++	return 0;
+++}
+++
+++static void mips_poly1305_blocks(struct poly1305_desc_ctx *dctx, const u8 *src,
+++				 u32 len, u32 hibit)
+++{
+++	if (unlikely(!dctx->sset)) {
+++		if (!dctx->rset) {
+++			poly1305_init_mips(&dctx->h, src);
+++			src += POLY1305_BLOCK_SIZE;
+++			len -= POLY1305_BLOCK_SIZE;
+++			dctx->rset = 1;
+++		}
+++		if (len >= POLY1305_BLOCK_SIZE) {
+++			dctx->s[0] = get_unaligned_le32(src +  0);
+++			dctx->s[1] = get_unaligned_le32(src +  4);
+++			dctx->s[2] = get_unaligned_le32(src +  8);
+++			dctx->s[3] = get_unaligned_le32(src + 12);
+++			src += POLY1305_BLOCK_SIZE;
+++			len -= POLY1305_BLOCK_SIZE;
+++			dctx->sset = true;
+++		}
+++		if (len < POLY1305_BLOCK_SIZE)
+++			return;
+++	}
+++
+++	len &= ~(POLY1305_BLOCK_SIZE - 1);
+++
+++	poly1305_blocks_mips(&dctx->h, src, len, hibit);
+++}
+++
+++static int mips_poly1305_update(struct shash_desc *desc, const u8 *src,
+++				unsigned int len)
+++{
+++	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
+++
+++	if (unlikely(dctx->buflen)) {
+++		u32 bytes = min(len, POLY1305_BLOCK_SIZE - dctx->buflen);
+++
+++		memcpy(dctx->buf + dctx->buflen, src, bytes);
+++		src += bytes;
+++		len -= bytes;
+++		dctx->buflen += bytes;
+++
+++		if (dctx->buflen == POLY1305_BLOCK_SIZE) {
+++			mips_poly1305_blocks(dctx, dctx->buf, POLY1305_BLOCK_SIZE, 1);
+++			dctx->buflen = 0;
+++		}
+++	}
+++
+++	if (likely(len >= POLY1305_BLOCK_SIZE)) {
+++		mips_poly1305_blocks(dctx, src, len, 1);
+++		src += round_down(len, POLY1305_BLOCK_SIZE);
+++		len %= POLY1305_BLOCK_SIZE;
+++	}
+++
+++	if (unlikely(len)) {
+++		dctx->buflen = len;
+++		memcpy(dctx->buf, src, len);
+++	}
+++	return 0;
+++}
+++
+++void poly1305_update_arch(struct poly1305_desc_ctx *dctx, const u8 *src,
+++			  unsigned int nbytes)
+++{
+++	if (unlikely(dctx->buflen)) {
+++		u32 bytes = min(nbytes, POLY1305_BLOCK_SIZE - dctx->buflen);
+++
+++		memcpy(dctx->buf + dctx->buflen, src, bytes);
+++		src += bytes;
+++		nbytes -= bytes;
+++		dctx->buflen += bytes;
+++
+++		if (dctx->buflen == POLY1305_BLOCK_SIZE) {
+++			poly1305_blocks_mips(&dctx->h, dctx->buf,
+++					     POLY1305_BLOCK_SIZE, 1);
+++			dctx->buflen = 0;
+++		}
+++	}
+++
+++	if (likely(nbytes >= POLY1305_BLOCK_SIZE)) {
+++		unsigned int len = round_down(nbytes, POLY1305_BLOCK_SIZE);
+++
+++		poly1305_blocks_mips(&dctx->h, src, len, 1);
+++		src += len;
+++		nbytes %= POLY1305_BLOCK_SIZE;
+++	}
+++
+++	if (unlikely(nbytes)) {
+++		dctx->buflen = nbytes;
+++		memcpy(dctx->buf, src, nbytes);
+++	}
+++}
+++EXPORT_SYMBOL(poly1305_update_arch);
+++
+++void poly1305_final_arch(struct poly1305_desc_ctx *dctx, u8 *dst)
+++{
+++	__le32 digest[4];
+++	u64 f = 0;
+++
+++	if (unlikely(dctx->buflen)) {
+++		dctx->buf[dctx->buflen++] = 1;
+++		memset(dctx->buf + dctx->buflen, 0,
+++		       POLY1305_BLOCK_SIZE - dctx->buflen);
+++		poly1305_blocks_mips(&dctx->h, dctx->buf, POLY1305_BLOCK_SIZE, 0);
+++	}
+++
+++	poly1305_emit_mips(&dctx->h, digest, dctx->s);
+++
+++	/* mac = (h + s) % (2^128) */
+++	f = (f >> 32) + le32_to_cpu(digest[0]);
+++	put_unaligned_le32(f, dst);
+++	f = (f >> 32) + le32_to_cpu(digest[1]);
+++	put_unaligned_le32(f, dst + 4);
+++	f = (f >> 32) + le32_to_cpu(digest[2]);
+++	put_unaligned_le32(f, dst + 8);
+++	f = (f >> 32) + le32_to_cpu(digest[3]);
+++	put_unaligned_le32(f, dst + 12);
+++
+++	*dctx = (struct poly1305_desc_ctx){};
+++}
+++EXPORT_SYMBOL(poly1305_final_arch);
+++
+++static int mips_poly1305_final(struct shash_desc *desc, u8 *dst)
+++{
+++	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
+++
+++	if (unlikely(!dctx->sset))
+++		return -ENOKEY;
+++
+++	poly1305_final_arch(dctx, dst);
+++	return 0;
+++}
+++
+++static struct shash_alg mips_poly1305_alg = {
+++	.init			= mips_poly1305_init,
+++	.update			= mips_poly1305_update,
+++	.final			= mips_poly1305_final,
+++	.digestsize		= POLY1305_DIGEST_SIZE,
+++	.descsize		= sizeof(struct poly1305_desc_ctx),
+++
+++	.base.cra_name		= "poly1305",
+++	.base.cra_driver_name	= "poly1305-mips",
+++	.base.cra_priority	= 200,
+++	.base.cra_blocksize	= POLY1305_BLOCK_SIZE,
+++	.base.cra_module	= THIS_MODULE,
+++};
+++
+++static int __init mips_poly1305_mod_init(void)
+++{
+++	return crypto_register_shash(&mips_poly1305_alg);
+++}
+++
+++static void __exit mips_poly1305_mod_exit(void)
+++{
+++	crypto_unregister_shash(&mips_poly1305_alg);
+++}
+++
+++module_init(mips_poly1305_mod_init);
+++module_exit(mips_poly1305_mod_exit);
+++
+++MODULE_LICENSE("GPL v2");
+++MODULE_ALIAS_CRYPTO("poly1305");
+++MODULE_ALIAS_CRYPTO("poly1305-mips");
++--- /dev/null
+++++ b/arch/mips/crypto/poly1305-mips.pl
++@@ -0,0 +1,1273 @@
+++#!/usr/bin/env perl
+++# SPDX-License-Identifier: GPL-1.0+ OR BSD-3-Clause
+++#
+++# ====================================================================
+++# Written by Andy Polyakov, @dot-asm, originally for the OpenSSL
+++# project.
+++# ====================================================================
+++
+++# Poly1305 hash for MIPS.
+++#
+++# May 2016
+++#
+++# Numbers are cycles per processed byte with poly1305_blocks alone.
+++#
+++#		IALU/gcc
+++# R1x000	~5.5/+130%	(big-endian)
+++# Octeon II	2.50/+70%	(little-endian)
+++#
+++# March 2019
+++#
+++# Add 32-bit code path.
+++#
+++# October 2019
+++#
+++# Modulo-scheduling reduction allows to omit dependency chain at the
+++# end of inner loop and improve performance. Also optimize MIPS32R2
+++# code path for MIPS 1004K core. Per René von Dorst's suggestions.
+++#
+++#		IALU/gcc
+++# R1x000	~9.8/?		(big-endian)
+++# Octeon II	3.65/+140%	(little-endian)
+++# MT7621/1004K	4.75/?		(little-endian)
+++#
+++######################################################################
+++# There is a number of MIPS ABI in use, O32 and N32/64 are most
+++# widely used. Then there is a new contender: NUBI. It appears that if
+++# one picks the latter, it's possible to arrange code in ABI neutral
+++# manner. Therefore let's stick to NUBI register layout:
+++#
+++($zero,$at,$t0,$t1,$t2)=map("\$$_",(0..2,24,25));
+++($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("\$$_",(4..11));
+++($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7,$s8,$s9,$s10,$s11)=map("\$$_",(12..23));
+++($gp,$tp,$sp,$fp,$ra)=map("\$$_",(3,28..31));
+++#
+++# The return value is placed in $a0. Following coding rules facilitate
+++# interoperability:
+++#
+++# - never ever touch $tp, "thread pointer", former $gp [o32 can be
+++#   excluded from the rule, because it's specified volatile];
+++# - copy return value to $t0, former $v0 [or to $a0 if you're adapting
+++#   old code];
+++# - on O32 populate $a4-$a7 with 'lw $aN,4*N($sp)' if necessary;
+++#
+++# For reference here is register layout for N32/64 MIPS ABIs:
+++#
+++# ($zero,$at,$v0,$v1)=map("\$$_",(0..3));
+++# ($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("\$$_",(4..11));
+++# ($t0,$t1,$t2,$t3,$t8,$t9)=map("\$$_",(12..15,24,25));
+++# ($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7)=map("\$$_",(16..23));
+++# ($gp,$sp,$fp,$ra)=map("\$$_",(28..31));
+++#
+++# <appro@openssl.org>
+++#
+++######################################################################
+++
+++$flavour = shift || "64"; # supported flavours are o32,n32,64,nubi32,nubi64
+++
+++$v0 = ($flavour =~ /nubi/i) ? $a0 : $t0;
+++
+++if ($flavour =~ /64|n32/i) {{{
+++######################################################################
+++# 64-bit code path
+++#
+++
+++my ($ctx,$inp,$len,$padbit) = ($a0,$a1,$a2,$a3);
+++my ($in0,$in1,$tmp0,$tmp1,$tmp2,$tmp3,$tmp4) = ($a4,$a5,$a6,$a7,$at,$t0,$t1);
+++
+++$code.=<<___;
+++#if (defined(_MIPS_ARCH_MIPS64R3) || defined(_MIPS_ARCH_MIPS64R5) || \\
+++     defined(_MIPS_ARCH_MIPS64R6)) \\
+++     && !defined(_MIPS_ARCH_MIPS64R2)
+++# define _MIPS_ARCH_MIPS64R2
+++#endif
+++
+++#if defined(_MIPS_ARCH_MIPS64R6)
+++# define dmultu(rs,rt)
+++# define mflo(rd,rs,rt)	dmulu	rd,rs,rt
+++# define mfhi(rd,rs,rt)	dmuhu	rd,rs,rt
+++#else
+++# define dmultu(rs,rt)		dmultu	rs,rt
+++# define mflo(rd,rs,rt)	mflo	rd
+++# define mfhi(rd,rs,rt)	mfhi	rd
+++#endif
+++
+++#ifdef	__KERNEL__
+++# define poly1305_init   poly1305_init_mips
+++# define poly1305_blocks poly1305_blocks_mips
+++# define poly1305_emit   poly1305_emit_mips
+++#endif
+++
+++#if defined(__MIPSEB__) && !defined(MIPSEB)
+++# define MIPSEB
+++#endif
+++
+++#ifdef MIPSEB
+++# define MSB 0
+++# define LSB 7
+++#else
+++# define MSB 7
+++# define LSB 0
+++#endif
+++
+++.text
+++.set	noat
+++.set	noreorder
+++
+++.align	5
+++.globl	poly1305_init
+++.ent	poly1305_init
+++poly1305_init:
+++	.frame	$sp,0,$ra
+++	.set	reorder
+++
+++	sd	$zero,0($ctx)
+++	sd	$zero,8($ctx)
+++	sd	$zero,16($ctx)
+++
+++	beqz	$inp,.Lno_key
+++
+++#if defined(_MIPS_ARCH_MIPS64R6)
+++	andi	$tmp0,$inp,7		# $inp % 8
+++	dsubu	$inp,$inp,$tmp0		# align $inp
+++	sll	$tmp0,$tmp0,3		# byte to bit offset
+++	ld	$in0,0($inp)
+++	ld	$in1,8($inp)
+++	beqz	$tmp0,.Laligned_key
+++	ld	$tmp2,16($inp)
+++
+++	subu	$tmp1,$zero,$tmp0
+++# ifdef	MIPSEB
+++	dsllv	$in0,$in0,$tmp0
+++	dsrlv	$tmp3,$in1,$tmp1
+++	dsllv	$in1,$in1,$tmp0
+++	dsrlv	$tmp2,$tmp2,$tmp1
+++# else
+++	dsrlv	$in0,$in0,$tmp0
+++	dsllv	$tmp3,$in1,$tmp1
+++	dsrlv	$in1,$in1,$tmp0
+++	dsllv	$tmp2,$tmp2,$tmp1
+++# endif
+++	or	$in0,$in0,$tmp3
+++	or	$in1,$in1,$tmp2
+++.Laligned_key:
+++#else
+++	ldl	$in0,0+MSB($inp)
+++	ldl	$in1,8+MSB($inp)
+++	ldr	$in0,0+LSB($inp)
+++	ldr	$in1,8+LSB($inp)
+++#endif
+++#ifdef	MIPSEB
+++# if defined(_MIPS_ARCH_MIPS64R2)
+++	dsbh	$in0,$in0		# byte swap
+++	 dsbh	$in1,$in1
+++	dshd	$in0,$in0
+++	 dshd	$in1,$in1
+++# else
+++	ori	$tmp0,$zero,0xFF
+++	dsll	$tmp2,$tmp0,32
+++	or	$tmp0,$tmp2		# 0x000000FF000000FF
+++
+++	and	$tmp1,$in0,$tmp0	# byte swap
+++	 and	$tmp3,$in1,$tmp0
+++	dsrl	$tmp2,$in0,24
+++	 dsrl	$tmp4,$in1,24
+++	dsll	$tmp1,24
+++	 dsll	$tmp3,24
+++	and	$tmp2,$tmp0
+++	 and	$tmp4,$tmp0
+++	dsll	$tmp0,8			# 0x0000FF000000FF00
+++	or	$tmp1,$tmp2
+++	 or	$tmp3,$tmp4
+++	and	$tmp2,$in0,$tmp0
+++	 and	$tmp4,$in1,$tmp0
+++	dsrl	$in0,8
+++	 dsrl	$in1,8
+++	dsll	$tmp2,8
+++	 dsll	$tmp4,8
+++	and	$in0,$tmp0
+++	 and	$in1,$tmp0
+++	or	$tmp1,$tmp2
+++	 or	$tmp3,$tmp4
+++	or	$in0,$tmp1
+++	 or	$in1,$tmp3
+++	dsrl	$tmp1,$in0,32
+++	 dsrl	$tmp3,$in1,32
+++	dsll	$in0,32
+++	 dsll	$in1,32
+++	or	$in0,$tmp1
+++	 or	$in1,$tmp3
+++# endif
+++#endif
+++	li	$tmp0,1
+++	dsll	$tmp0,32		# 0x0000000100000000
+++	daddiu	$tmp0,-63		# 0x00000000ffffffc1
+++	dsll	$tmp0,28		# 0x0ffffffc10000000
+++	daddiu	$tmp0,-1		# 0x0ffffffc0fffffff
+++
+++	and	$in0,$tmp0
+++	daddiu	$tmp0,-3		# 0x0ffffffc0ffffffc
+++	and	$in1,$tmp0
+++
+++	sd	$in0,24($ctx)
+++	dsrl	$tmp0,$in1,2
+++	sd	$in1,32($ctx)
+++	daddu	$tmp0,$in1		# s1 = r1 + (r1 >> 2)
+++	sd	$tmp0,40($ctx)
+++
+++.Lno_key:
+++	li	$v0,0			# return 0
+++	jr	$ra
+++.end	poly1305_init
+++___
+++{
+++my $SAVED_REGS_MASK = ($flavour =~ /nubi/i) ? "0x0003f000" : "0x00030000";
+++
+++my ($h0,$h1,$h2,$r0,$r1,$rs1,$d0,$d1,$d2) =
+++   ($s0,$s1,$s2,$s3,$s4,$s5,$in0,$in1,$t2);
+++my ($shr,$shl) = ($s6,$s7);		# used on R6
+++
+++$code.=<<___;
+++.align	5
+++.globl	poly1305_blocks
+++.ent	poly1305_blocks
+++poly1305_blocks:
+++	.set	noreorder
+++	dsrl	$len,4			# number of complete blocks
+++	bnez	$len,poly1305_blocks_internal
+++	nop
+++	jr	$ra
+++	nop
+++.end	poly1305_blocks
+++
+++.align	5
+++.ent	poly1305_blocks_internal
+++poly1305_blocks_internal:
+++	.set	noreorder
+++#if defined(_MIPS_ARCH_MIPS64R6)
+++	.frame	$sp,8*8,$ra
+++	.mask	$SAVED_REGS_MASK|0x000c0000,-8
+++	dsubu	$sp,8*8
+++	sd	$s7,56($sp)
+++	sd	$s6,48($sp)
+++#else
+++	.frame	$sp,6*8,$ra
+++	.mask	$SAVED_REGS_MASK,-8
+++	dsubu	$sp,6*8
+++#endif
+++	sd	$s5,40($sp)
+++	sd	$s4,32($sp)
+++___
+++$code.=<<___ if ($flavour =~ /nubi/i);	# optimize non-nubi prologue
+++	sd	$s3,24($sp)
+++	sd	$s2,16($sp)
+++	sd	$s1,8($sp)
+++	sd	$s0,0($sp)
+++___
+++$code.=<<___;
+++	.set	reorder
+++
+++#if defined(_MIPS_ARCH_MIPS64R6)
+++	andi	$shr,$inp,7
+++	dsubu	$inp,$inp,$shr		# align $inp
+++	sll	$shr,$shr,3		# byte to bit offset
+++	subu	$shl,$zero,$shr
+++#endif
+++
+++	ld	$h0,0($ctx)		# load hash value
+++	ld	$h1,8($ctx)
+++	ld	$h2,16($ctx)
+++
+++	ld	$r0,24($ctx)		# load key
+++	ld	$r1,32($ctx)
+++	ld	$rs1,40($ctx)
+++
+++	dsll	$len,4
+++	daddu	$len,$inp		# end of buffer
+++	b	.Loop
+++
+++.align	4
+++.Loop:
+++#if defined(_MIPS_ARCH_MIPS64R6)
+++	ld	$in0,0($inp)		# load input
+++	ld	$in1,8($inp)
+++	beqz	$shr,.Laligned_inp
+++
+++	ld	$tmp2,16($inp)
+++# ifdef	MIPSEB
+++	dsllv	$in0,$in0,$shr
+++	dsrlv	$tmp3,$in1,$shl
+++	dsllv	$in1,$in1,$shr
+++	dsrlv	$tmp2,$tmp2,$shl
+++# else
+++	dsrlv	$in0,$in0,$shr
+++	dsllv	$tmp3,$in1,$shl
+++	dsrlv	$in1,$in1,$shr
+++	dsllv	$tmp2,$tmp2,$shl
+++# endif
+++	or	$in0,$in0,$tmp3
+++	or	$in1,$in1,$tmp2
+++.Laligned_inp:
+++#else
+++	ldl	$in0,0+MSB($inp)	# load input
+++	ldl	$in1,8+MSB($inp)
+++	ldr	$in0,0+LSB($inp)
+++	ldr	$in1,8+LSB($inp)
+++#endif
+++	daddiu	$inp,16
+++#ifdef	MIPSEB
+++# if defined(_MIPS_ARCH_MIPS64R2)
+++	dsbh	$in0,$in0		# byte swap
+++	 dsbh	$in1,$in1
+++	dshd	$in0,$in0
+++	 dshd	$in1,$in1
+++# else
+++	ori	$tmp0,$zero,0xFF
+++	dsll	$tmp2,$tmp0,32
+++	or	$tmp0,$tmp2		# 0x000000FF000000FF
+++
+++	and	$tmp1,$in0,$tmp0	# byte swap
+++	 and	$tmp3,$in1,$tmp0
+++	dsrl	$tmp2,$in0,24
+++	 dsrl	$tmp4,$in1,24
+++	dsll	$tmp1,24
+++	 dsll	$tmp3,24
+++	and	$tmp2,$tmp0
+++	 and	$tmp4,$tmp0
+++	dsll	$tmp0,8			# 0x0000FF000000FF00
+++	or	$tmp1,$tmp2
+++	 or	$tmp3,$tmp4
+++	and	$tmp2,$in0,$tmp0
+++	 and	$tmp4,$in1,$tmp0
+++	dsrl	$in0,8
+++	 dsrl	$in1,8
+++	dsll	$tmp2,8
+++	 dsll	$tmp4,8
+++	and	$in0,$tmp0
+++	 and	$in1,$tmp0
+++	or	$tmp1,$tmp2
+++	 or	$tmp3,$tmp4
+++	or	$in0,$tmp1
+++	 or	$in1,$tmp3
+++	dsrl	$tmp1,$in0,32
+++	 dsrl	$tmp3,$in1,32
+++	dsll	$in0,32
+++	 dsll	$in1,32
+++	or	$in0,$tmp1
+++	 or	$in1,$tmp3
+++# endif
+++#endif
+++	dsrl	$tmp1,$h2,2		# modulo-scheduled reduction
+++	andi	$h2,$h2,3
+++	dsll	$tmp0,$tmp1,2
+++
+++	daddu	$d0,$h0,$in0		# accumulate input
+++	 daddu	$tmp1,$tmp0
+++	sltu	$tmp0,$d0,$h0
+++	daddu	$d0,$d0,$tmp1		# ... and residue
+++	sltu	$tmp1,$d0,$tmp1
+++	daddu	$d1,$h1,$in1
+++	daddu	$tmp0,$tmp1
+++	sltu	$tmp1,$d1,$h1
+++	daddu	$d1,$tmp0
+++
+++	dmultu	($r0,$d0)		# h0*r0
+++	 daddu	$d2,$h2,$padbit
+++	 sltu	$tmp0,$d1,$tmp0
+++	mflo	($h0,$r0,$d0)
+++	mfhi	($h1,$r0,$d0)
+++
+++	dmultu	($rs1,$d1)		# h1*5*r1
+++	 daddu	$d2,$tmp1
+++	 daddu	$d2,$tmp0
+++	mflo	($tmp0,$rs1,$d1)
+++	mfhi	($tmp1,$rs1,$d1)
+++
+++	dmultu	($r1,$d0)		# h0*r1
+++	mflo	($tmp2,$r1,$d0)
+++	mfhi	($h2,$r1,$d0)
+++	 daddu	$h0,$tmp0
+++	 daddu	$h1,$tmp1
+++	 sltu	$tmp0,$h0,$tmp0
+++
+++	dmultu	($r0,$d1)		# h1*r0
+++	 daddu	$h1,$tmp0
+++	 daddu	$h1,$tmp2
+++	mflo	($tmp0,$r0,$d1)
+++	mfhi	($tmp1,$r0,$d1)
+++
+++	dmultu	($rs1,$d2)		# h2*5*r1
+++	 sltu	$tmp2,$h1,$tmp2
+++	 daddu	$h2,$tmp2
+++	mflo	($tmp2,$rs1,$d2)
+++
+++	dmultu	($r0,$d2)		# h2*r0
+++	 daddu	$h1,$tmp0
+++	 daddu	$h2,$tmp1
+++	mflo	($tmp3,$r0,$d2)
+++	 sltu	$tmp0,$h1,$tmp0
+++	 daddu	$h2,$tmp0
+++
+++	daddu	$h1,$tmp2
+++	sltu	$tmp2,$h1,$tmp2
+++	daddu	$h2,$tmp2
+++	daddu	$h2,$tmp3
+++
+++	bne	$inp,$len,.Loop
+++
+++	sd	$h0,0($ctx)		# store hash value
+++	sd	$h1,8($ctx)
+++	sd	$h2,16($ctx)
+++
+++	.set	noreorder
+++#if defined(_MIPS_ARCH_MIPS64R6)
+++	ld	$s7,56($sp)
+++	ld	$s6,48($sp)
+++#endif
+++	ld	$s5,40($sp)		# epilogue
+++	ld	$s4,32($sp)
+++___
+++$code.=<<___ if ($flavour =~ /nubi/i);	# optimize non-nubi epilogue
+++	ld	$s3,24($sp)
+++	ld	$s2,16($sp)
+++	ld	$s1,8($sp)
+++	ld	$s0,0($sp)
+++___
+++$code.=<<___;
+++	jr	$ra
+++#if defined(_MIPS_ARCH_MIPS64R6)
+++	daddu	$sp,8*8
+++#else
+++	daddu	$sp,6*8
+++#endif
+++.end	poly1305_blocks_internal
+++___
+++}
+++{
+++my ($ctx,$mac,$nonce) = ($a0,$a1,$a2);
+++
+++$code.=<<___;
+++.align	5
+++.globl	poly1305_emit
+++.ent	poly1305_emit
+++poly1305_emit:
+++	.frame	$sp,0,$ra
+++	.set	reorder
+++
+++	ld	$tmp2,16($ctx)
+++	ld	$tmp0,0($ctx)
+++	ld	$tmp1,8($ctx)
+++
+++	li	$in0,-4			# final reduction
+++	dsrl	$in1,$tmp2,2
+++	and	$in0,$tmp2
+++	andi	$tmp2,$tmp2,3
+++	daddu	$in0,$in1
+++
+++	daddu	$tmp0,$tmp0,$in0
+++	sltu	$in1,$tmp0,$in0
+++	 daddiu	$in0,$tmp0,5		# compare to modulus
+++	daddu	$tmp1,$tmp1,$in1
+++	 sltiu	$tmp3,$in0,5
+++	sltu	$tmp4,$tmp1,$in1
+++	 daddu	$in1,$tmp1,$tmp3
+++	daddu	$tmp2,$tmp2,$tmp4
+++	 sltu	$tmp3,$in1,$tmp3
+++	 daddu	$tmp2,$tmp2,$tmp3
+++
+++	dsrl	$tmp2,2			# see if it carried/borrowed
+++	dsubu	$tmp2,$zero,$tmp2
+++
+++	xor	$in0,$tmp0
+++	xor	$in1,$tmp1
+++	and	$in0,$tmp2
+++	and	$in1,$tmp2
+++	xor	$in0,$tmp0
+++	xor	$in1,$tmp1
+++
+++	lwu	$tmp0,0($nonce)		# load nonce
+++	lwu	$tmp1,4($nonce)
+++	lwu	$tmp2,8($nonce)
+++	lwu	$tmp3,12($nonce)
+++	dsll	$tmp1,32
+++	dsll	$tmp3,32
+++	or	$tmp0,$tmp1
+++	or	$tmp2,$tmp3
+++
+++	daddu	$in0,$tmp0		# accumulate nonce
+++	daddu	$in1,$tmp2
+++	sltu	$tmp0,$in0,$tmp0
+++	daddu	$in1,$tmp0
+++
+++	dsrl	$tmp0,$in0,8		# write mac value
+++	dsrl	$tmp1,$in0,16
+++	dsrl	$tmp2,$in0,24
+++	sb	$in0,0($mac)
+++	dsrl	$tmp3,$in0,32
+++	sb	$tmp0,1($mac)
+++	dsrl	$tmp0,$in0,40
+++	sb	$tmp1,2($mac)
+++	dsrl	$tmp1,$in0,48
+++	sb	$tmp2,3($mac)
+++	dsrl	$tmp2,$in0,56
+++	sb	$tmp3,4($mac)
+++	dsrl	$tmp3,$in1,8
+++	sb	$tmp0,5($mac)
+++	dsrl	$tmp0,$in1,16
+++	sb	$tmp1,6($mac)
+++	dsrl	$tmp1,$in1,24
+++	sb	$tmp2,7($mac)
+++
+++	sb	$in1,8($mac)
+++	dsrl	$tmp2,$in1,32
+++	sb	$tmp3,9($mac)
+++	dsrl	$tmp3,$in1,40
+++	sb	$tmp0,10($mac)
+++	dsrl	$tmp0,$in1,48
+++	sb	$tmp1,11($mac)
+++	dsrl	$tmp1,$in1,56
+++	sb	$tmp2,12($mac)
+++	sb	$tmp3,13($mac)
+++	sb	$tmp0,14($mac)
+++	sb	$tmp1,15($mac)
+++
+++	jr	$ra
+++.end	poly1305_emit
+++.rdata
+++.asciiz	"Poly1305 for MIPS64, CRYPTOGAMS by \@dot-asm"
+++.align	2
+++___
+++}
+++}}} else {{{
+++######################################################################
+++# 32-bit code path
+++#
+++
+++my ($ctx,$inp,$len,$padbit) = ($a0,$a1,$a2,$a3);
+++my ($in0,$in1,$in2,$in3,$tmp0,$tmp1,$tmp2,$tmp3) =
+++   ($a4,$a5,$a6,$a7,$at,$t0,$t1,$t2);
+++
+++$code.=<<___;
+++#if (defined(_MIPS_ARCH_MIPS32R3) || defined(_MIPS_ARCH_MIPS32R5) || \\
+++     defined(_MIPS_ARCH_MIPS32R6)) \\
+++     && !defined(_MIPS_ARCH_MIPS32R2)
+++# define _MIPS_ARCH_MIPS32R2
+++#endif
+++
+++#if defined(_MIPS_ARCH_MIPS32R6)
+++# define multu(rs,rt)
+++# define mflo(rd,rs,rt)	mulu	rd,rs,rt
+++# define mfhi(rd,rs,rt)	muhu	rd,rs,rt
+++#else
+++# define multu(rs,rt)	multu	rs,rt
+++# define mflo(rd,rs,rt)	mflo	rd
+++# define mfhi(rd,rs,rt)	mfhi	rd
+++#endif
+++
+++#ifdef	__KERNEL__
+++# define poly1305_init   poly1305_init_mips
+++# define poly1305_blocks poly1305_blocks_mips
+++# define poly1305_emit   poly1305_emit_mips
+++#endif
+++
+++#if defined(__MIPSEB__) && !defined(MIPSEB)
+++# define MIPSEB
+++#endif
+++
+++#ifdef MIPSEB
+++# define MSB 0
+++# define LSB 3
+++#else
+++# define MSB 3
+++# define LSB 0
+++#endif
+++
+++.text
+++.set	noat
+++.set	noreorder
+++
+++.align	5
+++.globl	poly1305_init
+++.ent	poly1305_init
+++poly1305_init:
+++	.frame	$sp,0,$ra
+++	.set	reorder
+++
+++	sw	$zero,0($ctx)
+++	sw	$zero,4($ctx)
+++	sw	$zero,8($ctx)
+++	sw	$zero,12($ctx)
+++	sw	$zero,16($ctx)
+++
+++	beqz	$inp,.Lno_key
+++
+++#if defined(_MIPS_ARCH_MIPS32R6)
+++	andi	$tmp0,$inp,3		# $inp % 4
+++	subu	$inp,$inp,$tmp0		# align $inp
+++	sll	$tmp0,$tmp0,3		# byte to bit offset
+++	lw	$in0,0($inp)
+++	lw	$in1,4($inp)
+++	lw	$in2,8($inp)
+++	lw	$in3,12($inp)
+++	beqz	$tmp0,.Laligned_key
+++
+++	lw	$tmp2,16($inp)
+++	subu	$tmp1,$zero,$tmp0
+++# ifdef	MIPSEB
+++	sllv	$in0,$in0,$tmp0
+++	srlv	$tmp3,$in1,$tmp1
+++	sllv	$in1,$in1,$tmp0
+++	or	$in0,$in0,$tmp3
+++	srlv	$tmp3,$in2,$tmp1
+++	sllv	$in2,$in2,$tmp0
+++	or	$in1,$in1,$tmp3
+++	srlv	$tmp3,$in3,$tmp1
+++	sllv	$in3,$in3,$tmp0
+++	or	$in2,$in2,$tmp3
+++	srlv	$tmp2,$tmp2,$tmp1
+++	or	$in3,$in3,$tmp2
+++# else
+++	srlv	$in0,$in0,$tmp0
+++	sllv	$tmp3,$in1,$tmp1
+++	srlv	$in1,$in1,$tmp0
+++	or	$in0,$in0,$tmp3
+++	sllv	$tmp3,$in2,$tmp1
+++	srlv	$in2,$in2,$tmp0
+++	or	$in1,$in1,$tmp3
+++	sllv	$tmp3,$in3,$tmp1
+++	srlv	$in3,$in3,$tmp0
+++	or	$in2,$in2,$tmp3
+++	sllv	$tmp2,$tmp2,$tmp1
+++	or	$in3,$in3,$tmp2
+++# endif
+++.Laligned_key:
+++#else
+++	lwl	$in0,0+MSB($inp)
+++	lwl	$in1,4+MSB($inp)
+++	lwl	$in2,8+MSB($inp)
+++	lwl	$in3,12+MSB($inp)
+++	lwr	$in0,0+LSB($inp)
+++	lwr	$in1,4+LSB($inp)
+++	lwr	$in2,8+LSB($inp)
+++	lwr	$in3,12+LSB($inp)
+++#endif
+++#ifdef	MIPSEB
+++# if defined(_MIPS_ARCH_MIPS32R2)
+++	wsbh	$in0,$in0		# byte swap
+++	wsbh	$in1,$in1
+++	wsbh	$in2,$in2
+++	wsbh	$in3,$in3
+++	rotr	$in0,$in0,16
+++	rotr	$in1,$in1,16
+++	rotr	$in2,$in2,16
+++	rotr	$in3,$in3,16
+++# else
+++	srl	$tmp0,$in0,24		# byte swap
+++	srl	$tmp1,$in0,8
+++	andi	$tmp2,$in0,0xFF00
+++	sll	$in0,$in0,24
+++	andi	$tmp1,0xFF00
+++	sll	$tmp2,$tmp2,8
+++	or	$in0,$tmp0
+++	 srl	$tmp0,$in1,24
+++	or	$tmp1,$tmp2
+++	 srl	$tmp2,$in1,8
+++	or	$in0,$tmp1
+++	 andi	$tmp1,$in1,0xFF00
+++	 sll	$in1,$in1,24
+++	 andi	$tmp2,0xFF00
+++	 sll	$tmp1,$tmp1,8
+++	 or	$in1,$tmp0
+++	srl	$tmp0,$in2,24
+++	 or	$tmp2,$tmp1
+++	srl	$tmp1,$in2,8
+++	 or	$in1,$tmp2
+++	andi	$tmp2,$in2,0xFF00
+++	sll	$in2,$in2,24
+++	andi	$tmp1,0xFF00
+++	sll	$tmp2,$tmp2,8
+++	or	$in2,$tmp0
+++	 srl	$tmp0,$in3,24
+++	or	$tmp1,$tmp2
+++	 srl	$tmp2,$in3,8
+++	or	$in2,$tmp1
+++	 andi	$tmp1,$in3,0xFF00
+++	 sll	$in3,$in3,24
+++	 andi	$tmp2,0xFF00
+++	 sll	$tmp1,$tmp1,8
+++	 or	$in3,$tmp0
+++	 or	$tmp2,$tmp1
+++	 or	$in3,$tmp2
+++# endif
+++#endif
+++	lui	$tmp0,0x0fff
+++	ori	$tmp0,0xffff		# 0x0fffffff
+++	and	$in0,$in0,$tmp0
+++	subu	$tmp0,3			# 0x0ffffffc
+++	and	$in1,$in1,$tmp0
+++	and	$in2,$in2,$tmp0
+++	and	$in3,$in3,$tmp0
+++
+++	sw	$in0,20($ctx)
+++	sw	$in1,24($ctx)
+++	sw	$in2,28($ctx)
+++	sw	$in3,32($ctx)
+++
+++	srl	$tmp1,$in1,2
+++	srl	$tmp2,$in2,2
+++	srl	$tmp3,$in3,2
+++	addu	$in1,$in1,$tmp1		# s1 = r1 + (r1 >> 2)
+++	addu	$in2,$in2,$tmp2
+++	addu	$in3,$in3,$tmp3
+++	sw	$in1,36($ctx)
+++	sw	$in2,40($ctx)
+++	sw	$in3,44($ctx)
+++.Lno_key:
+++	li	$v0,0
+++	jr	$ra
+++.end	poly1305_init
+++___
+++{
+++my $SAVED_REGS_MASK = ($flavour =~ /nubi/i) ? "0x00fff000" : "0x00ff0000";
+++
+++my ($h0,$h1,$h2,$h3,$h4, $r0,$r1,$r2,$r3, $rs1,$rs2,$rs3) =
+++   ($s0,$s1,$s2,$s3,$s4, $s5,$s6,$s7,$s8, $s9,$s10,$s11);
+++my ($d0,$d1,$d2,$d3) =
+++   ($a4,$a5,$a6,$a7);
+++my $shr = $t2;		# used on R6
+++my $one = $t2;		# used on R2
+++
+++$code.=<<___;
+++.globl	poly1305_blocks
+++.align	5
+++.ent	poly1305_blocks
+++poly1305_blocks:
+++	.frame	$sp,16*4,$ra
+++	.mask	$SAVED_REGS_MASK,-4
+++	.set	noreorder
+++	subu	$sp, $sp,4*12
+++	sw	$s11,4*11($sp)
+++	sw	$s10,4*10($sp)
+++	sw	$s9, 4*9($sp)
+++	sw	$s8, 4*8($sp)
+++	sw	$s7, 4*7($sp)
+++	sw	$s6, 4*6($sp)
+++	sw	$s5, 4*5($sp)
+++	sw	$s4, 4*4($sp)
+++___
+++$code.=<<___ if ($flavour =~ /nubi/i);	# optimize non-nubi prologue
+++	sw	$s3, 4*3($sp)
+++	sw	$s2, 4*2($sp)
+++	sw	$s1, 4*1($sp)
+++	sw	$s0, 4*0($sp)
+++___
+++$code.=<<___;
+++	.set	reorder
+++
+++	srl	$len,4			# number of complete blocks
+++	li	$one,1
+++	beqz	$len,.Labort
+++
+++#if defined(_MIPS_ARCH_MIPS32R6)
+++	andi	$shr,$inp,3
+++	subu	$inp,$inp,$shr		# align $inp
+++	sll	$shr,$shr,3		# byte to bit offset
+++#endif
+++
+++	lw	$h0,0($ctx)		# load hash value
+++	lw	$h1,4($ctx)
+++	lw	$h2,8($ctx)
+++	lw	$h3,12($ctx)
+++	lw	$h4,16($ctx)
+++
+++	lw	$r0,20($ctx)		# load key
+++	lw	$r1,24($ctx)
+++	lw	$r2,28($ctx)
+++	lw	$r3,32($ctx)
+++	lw	$rs1,36($ctx)
+++	lw	$rs2,40($ctx)
+++	lw	$rs3,44($ctx)
+++
+++	sll	$len,4
+++	addu	$len,$len,$inp		# end of buffer
+++	b	.Loop
+++
+++.align	4
+++.Loop:
+++#if defined(_MIPS_ARCH_MIPS32R6)
+++	lw	$d0,0($inp)		# load input
+++	lw	$d1,4($inp)
+++	lw	$d2,8($inp)
+++	lw	$d3,12($inp)
+++	beqz	$shr,.Laligned_inp
+++
+++	lw	$t0,16($inp)
+++	subu	$t1,$zero,$shr
+++# ifdef	MIPSEB
+++	sllv	$d0,$d0,$shr
+++	srlv	$at,$d1,$t1
+++	sllv	$d1,$d1,$shr
+++	or	$d0,$d0,$at
+++	srlv	$at,$d2,$t1
+++	sllv	$d2,$d2,$shr
+++	or	$d1,$d1,$at
+++	srlv	$at,$d3,$t1
+++	sllv	$d3,$d3,$shr
+++	or	$d2,$d2,$at
+++	srlv	$t0,$t0,$t1
+++	or	$d3,$d3,$t0
+++# else
+++	srlv	$d0,$d0,$shr
+++	sllv	$at,$d1,$t1
+++	srlv	$d1,$d1,$shr
+++	or	$d0,$d0,$at
+++	sllv	$at,$d2,$t1
+++	srlv	$d2,$d2,$shr
+++	or	$d1,$d1,$at
+++	sllv	$at,$d3,$t1
+++	srlv	$d3,$d3,$shr
+++	or	$d2,$d2,$at
+++	sllv	$t0,$t0,$t1
+++	or	$d3,$d3,$t0
+++# endif
+++.Laligned_inp:
+++#else
+++	lwl	$d0,0+MSB($inp)		# load input
+++	lwl	$d1,4+MSB($inp)
+++	lwl	$d2,8+MSB($inp)
+++	lwl	$d3,12+MSB($inp)
+++	lwr	$d0,0+LSB($inp)
+++	lwr	$d1,4+LSB($inp)
+++	lwr	$d2,8+LSB($inp)
+++	lwr	$d3,12+LSB($inp)
+++#endif
+++#ifdef	MIPSEB
+++# if defined(_MIPS_ARCH_MIPS32R2)
+++	wsbh	$d0,$d0			# byte swap
+++	wsbh	$d1,$d1
+++	wsbh	$d2,$d2
+++	wsbh	$d3,$d3
+++	rotr	$d0,$d0,16
+++	rotr	$d1,$d1,16
+++	rotr	$d2,$d2,16
+++	rotr	$d3,$d3,16
+++# else
+++	srl	$at,$d0,24		# byte swap
+++	srl	$t0,$d0,8
+++	andi	$t1,$d0,0xFF00
+++	sll	$d0,$d0,24
+++	andi	$t0,0xFF00
+++	sll	$t1,$t1,8
+++	or	$d0,$at
+++	 srl	$at,$d1,24
+++	or	$t0,$t1
+++	 srl	$t1,$d1,8
+++	or	$d0,$t0
+++	 andi	$t0,$d1,0xFF00
+++	 sll	$d1,$d1,24
+++	 andi	$t1,0xFF00
+++	 sll	$t0,$t0,8
+++	 or	$d1,$at
+++	srl	$at,$d2,24
+++	 or	$t1,$t0
+++	srl	$t0,$d2,8
+++	 or	$d1,$t1
+++	andi	$t1,$d2,0xFF00
+++	sll	$d2,$d2,24
+++	andi	$t0,0xFF00
+++	sll	$t1,$t1,8
+++	or	$d2,$at
+++	 srl	$at,$d3,24
+++	or	$t0,$t1
+++	 srl	$t1,$d3,8
+++	or	$d2,$t0
+++	 andi	$t0,$d3,0xFF00
+++	 sll	$d3,$d3,24
+++	 andi	$t1,0xFF00
+++	 sll	$t0,$t0,8
+++	 or	$d3,$at
+++	 or	$t1,$t0
+++	 or	$d3,$t1
+++# endif
+++#endif
+++	srl	$t0,$h4,2		# modulo-scheduled reduction
+++	andi	$h4,$h4,3
+++	sll	$at,$t0,2
+++
+++	addu	$d0,$d0,$h0		# accumulate input
+++	 addu	$t0,$t0,$at
+++	sltu	$h0,$d0,$h0
+++	addu	$d0,$d0,$t0		# ... and residue
+++	sltu	$at,$d0,$t0
+++
+++	addu	$d1,$d1,$h1
+++	 addu	$h0,$h0,$at		# carry
+++	sltu	$h1,$d1,$h1
+++	addu	$d1,$d1,$h0
+++	sltu	$h0,$d1,$h0
+++
+++	addu	$d2,$d2,$h2
+++	 addu	$h1,$h1,$h0		# carry
+++	sltu	$h2,$d2,$h2
+++	addu	$d2,$d2,$h1
+++	sltu	$h1,$d2,$h1
+++
+++	addu	$d3,$d3,$h3
+++	 addu	$h2,$h2,$h1		# carry
+++	sltu	$h3,$d3,$h3
+++	addu	$d3,$d3,$h2
+++
+++#if defined(_MIPS_ARCH_MIPS32R2) && !defined(_MIPS_ARCH_MIPS32R6)
+++	multu	$r0,$d0			# d0*r0
+++	 sltu	$h2,$d3,$h2
+++	maddu	$rs3,$d1		# d1*s3
+++	 addu	$h3,$h3,$h2		# carry
+++	maddu	$rs2,$d2		# d2*s2
+++	 addu	$h4,$h4,$padbit
+++	maddu	$rs1,$d3		# d3*s1
+++	 addu	$h4,$h4,$h3
+++	mfhi	$at
+++	mflo	$h0
+++
+++	multu	$r1,$d0			# d0*r1
+++	maddu	$r0,$d1			# d1*r0
+++	maddu	$rs3,$d2		# d2*s3
+++	maddu	$rs2,$d3		# d3*s2
+++	maddu	$rs1,$h4		# h4*s1
+++	maddu	$at,$one		# hi*1
+++	mfhi	$at
+++	mflo	$h1
+++
+++	multu	$r2,$d0			# d0*r2
+++	maddu	$r1,$d1			# d1*r1
+++	maddu	$r0,$d2			# d2*r0
+++	maddu	$rs3,$d3		# d3*s3
+++	maddu	$rs2,$h4		# h4*s2
+++	maddu	$at,$one		# hi*1
+++	mfhi	$at
+++	mflo	$h2
+++
+++	mul	$t0,$r0,$h4		# h4*r0
+++
+++	multu	$r3,$d0			# d0*r3
+++	maddu	$r2,$d1			# d1*r2
+++	maddu	$r1,$d2			# d2*r1
+++	maddu	$r0,$d3			# d3*r0
+++	maddu	$rs3,$h4		# h4*s3
+++	maddu	$at,$one		# hi*1
+++	mfhi	$at
+++	mflo	$h3
+++
+++	 addiu	$inp,$inp,16
+++
+++	addu	$h4,$t0,$at
+++#else
+++	multu	($r0,$d0)		# d0*r0
+++	mflo	($h0,$r0,$d0)
+++	mfhi	($h1,$r0,$d0)
+++
+++	 sltu	$h2,$d3,$h2
+++	 addu	$h3,$h3,$h2		# carry
+++
+++	multu	($rs3,$d1)		# d1*s3
+++	mflo	($at,$rs3,$d1)
+++	mfhi	($t0,$rs3,$d1)
+++
+++	 addu	$h4,$h4,$padbit
+++	 addiu	$inp,$inp,16
+++	 addu	$h4,$h4,$h3
+++
+++	multu	($rs2,$d2)		# d2*s2
+++	mflo	($a3,$rs2,$d2)
+++	mfhi	($t1,$rs2,$d2)
+++	 addu	$h0,$h0,$at
+++	 addu	$h1,$h1,$t0
+++	multu	($rs1,$d3)		# d3*s1
+++	 sltu	$at,$h0,$at
+++	 addu	$h1,$h1,$at
+++
+++	mflo	($at,$rs1,$d3)
+++	mfhi	($t0,$rs1,$d3)
+++	 addu	$h0,$h0,$a3
+++	 addu	$h1,$h1,$t1
+++	multu	($r1,$d0)		# d0*r1
+++	 sltu	$a3,$h0,$a3
+++	 addu	$h1,$h1,$a3
+++
+++
+++	mflo	($a3,$r1,$d0)
+++	mfhi	($h2,$r1,$d0)
+++	 addu	$h0,$h0,$at
+++	 addu	$h1,$h1,$t0
+++	multu	($r0,$d1)		# d1*r0
+++	 sltu	$at,$h0,$at
+++	 addu	$h1,$h1,$at
+++
+++	mflo	($at,$r0,$d1)
+++	mfhi	($t0,$r0,$d1)
+++	 addu	$h1,$h1,$a3
+++	 sltu	$a3,$h1,$a3
+++	multu	($rs3,$d2)		# d2*s3
+++	 addu	$h2,$h2,$a3
+++
+++	mflo	($a3,$rs3,$d2)
+++	mfhi	($t1,$rs3,$d2)
+++	 addu	$h1,$h1,$at
+++	 addu	$h2,$h2,$t0
+++	multu	($rs2,$d3)		# d3*s2
+++	 sltu	$at,$h1,$at
+++	 addu	$h2,$h2,$at
+++
+++	mflo	($at,$rs2,$d3)
+++	mfhi	($t0,$rs2,$d3)
+++	 addu	$h1,$h1,$a3
+++	 addu	$h2,$h2,$t1
+++	multu	($rs1,$h4)		# h4*s1
+++	 sltu	$a3,$h1,$a3
+++	 addu	$h2,$h2,$a3
+++
+++	mflo	($a3,$rs1,$h4)
+++	 addu	$h1,$h1,$at
+++	 addu	$h2,$h2,$t0
+++	multu	($r2,$d0)		# d0*r2
+++	 sltu	$at,$h1,$at
+++	 addu	$h2,$h2,$at
+++
+++
+++	mflo	($at,$r2,$d0)
+++	mfhi	($h3,$r2,$d0)
+++	 addu	$h1,$h1,$a3
+++	 sltu	$a3,$h1,$a3
+++	multu	($r1,$d1)		# d1*r1
+++	 addu	$h2,$h2,$a3
+++
+++	mflo	($a3,$r1,$d1)
+++	mfhi	($t1,$r1,$d1)
+++	 addu	$h2,$h2,$at
+++	 sltu	$at,$h2,$at
+++	multu	($r0,$d2)		# d2*r0
+++	 addu	$h3,$h3,$at
+++
+++	mflo	($at,$r0,$d2)
+++	mfhi	($t0,$r0,$d2)
+++	 addu	$h2,$h2,$a3
+++	 addu	$h3,$h3,$t1
+++	multu	($rs3,$d3)		# d3*s3
+++	 sltu	$a3,$h2,$a3
+++	 addu	$h3,$h3,$a3
+++
+++	mflo	($a3,$rs3,$d3)
+++	mfhi	($t1,$rs3,$d3)
+++	 addu	$h2,$h2,$at
+++	 addu	$h3,$h3,$t0
+++	multu	($rs2,$h4)		# h4*s2
+++	 sltu	$at,$h2,$at
+++	 addu	$h3,$h3,$at
+++
+++	mflo	($at,$rs2,$h4)
+++	 addu	$h2,$h2,$a3
+++	 addu	$h3,$h3,$t1
+++	multu	($r3,$d0)		# d0*r3
+++	 sltu	$a3,$h2,$a3
+++	 addu	$h3,$h3,$a3
+++
+++
+++	mflo	($a3,$r3,$d0)
+++	mfhi	($t1,$r3,$d0)
+++	 addu	$h2,$h2,$at
+++	 sltu	$at,$h2,$at
+++	multu	($r2,$d1)		# d1*r2
+++	 addu	$h3,$h3,$at
+++
+++	mflo	($at,$r2,$d1)
+++	mfhi	($t0,$r2,$d1)
+++	 addu	$h3,$h3,$a3
+++	 sltu	$a3,$h3,$a3
+++	multu	($r0,$d3)		# d3*r0
+++	 addu	$t1,$t1,$a3
+++
+++	mflo	($a3,$r0,$d3)
+++	mfhi	($d3,$r0,$d3)
+++	 addu	$h3,$h3,$at
+++	 addu	$t1,$t1,$t0
+++	multu	($r1,$d2)		# d2*r1
+++	 sltu	$at,$h3,$at
+++	 addu	$t1,$t1,$at
+++
+++	mflo	($at,$r1,$d2)
+++	mfhi	($t0,$r1,$d2)
+++	 addu	$h3,$h3,$a3
+++	 addu	$t1,$t1,$d3
+++	multu	($rs3,$h4)		# h4*s3
+++	 sltu	$a3,$h3,$a3
+++	 addu	$t1,$t1,$a3
+++
+++	mflo	($a3,$rs3,$h4)
+++	 addu	$h3,$h3,$at
+++	 addu	$t1,$t1,$t0
+++	multu	($r0,$h4)		# h4*r0
+++	 sltu	$at,$h3,$at
+++	 addu	$t1,$t1,$at
+++
+++
+++	mflo	($h4,$r0,$h4)
+++	 addu	$h3,$h3,$a3
+++	 sltu	$a3,$h3,$a3
+++	 addu	$t1,$t1,$a3
+++	addu	$h4,$h4,$t1
+++
+++	li	$padbit,1		# if we loop, padbit is 1
+++#endif
+++	bne	$inp,$len,.Loop
+++
+++	sw	$h0,0($ctx)		# store hash value
+++	sw	$h1,4($ctx)
+++	sw	$h2,8($ctx)
+++	sw	$h3,12($ctx)
+++	sw	$h4,16($ctx)
+++
+++	.set	noreorder
+++.Labort:
+++	lw	$s11,4*11($sp)
+++	lw	$s10,4*10($sp)
+++	lw	$s9, 4*9($sp)
+++	lw	$s8, 4*8($sp)
+++	lw	$s7, 4*7($sp)
+++	lw	$s6, 4*6($sp)
+++	lw	$s5, 4*5($sp)
+++	lw	$s4, 4*4($sp)
+++___
+++$code.=<<___ if ($flavour =~ /nubi/i);	# optimize non-nubi prologue
+++	lw	$s3, 4*3($sp)
+++	lw	$s2, 4*2($sp)
+++	lw	$s1, 4*1($sp)
+++	lw	$s0, 4*0($sp)
+++___
+++$code.=<<___;
+++	jr	$ra
+++	addu	$sp,$sp,4*12
+++.end	poly1305_blocks
+++___
+++}
+++{
+++my ($ctx,$mac,$nonce,$tmp4) = ($a0,$a1,$a2,$a3);
+++
+++$code.=<<___;
+++.align	5
+++.globl	poly1305_emit
+++.ent	poly1305_emit
+++poly1305_emit:
+++	.frame	$sp,0,$ra
+++	.set	reorder
+++
+++	lw	$tmp4,16($ctx)
+++	lw	$tmp0,0($ctx)
+++	lw	$tmp1,4($ctx)
+++	lw	$tmp2,8($ctx)
+++	lw	$tmp3,12($ctx)
+++
+++	li	$in0,-4			# final reduction
+++	srl	$ctx,$tmp4,2
+++	and	$in0,$in0,$tmp4
+++	andi	$tmp4,$tmp4,3
+++	addu	$ctx,$ctx,$in0
+++
+++	addu	$tmp0,$tmp0,$ctx
+++	sltu	$ctx,$tmp0,$ctx
+++	 addiu	$in0,$tmp0,5		# compare to modulus
+++	addu	$tmp1,$tmp1,$ctx
+++	 sltiu	$in1,$in0,5
+++	sltu	$ctx,$tmp1,$ctx
+++	 addu	$in1,$in1,$tmp1
+++	addu	$tmp2,$tmp2,$ctx
+++	 sltu	$in2,$in1,$tmp1
+++	sltu	$ctx,$tmp2,$ctx
+++	 addu	$in2,$in2,$tmp2
+++	addu	$tmp3,$tmp3,$ctx
+++	 sltu	$in3,$in2,$tmp2
+++	sltu	$ctx,$tmp3,$ctx
+++	 addu	$in3,$in3,$tmp3
+++	addu	$tmp4,$tmp4,$ctx
+++	 sltu	$ctx,$in3,$tmp3
+++	 addu	$ctx,$tmp4
+++
+++	srl	$ctx,2			# see if it carried/borrowed
+++	subu	$ctx,$zero,$ctx
+++
+++	xor	$in0,$tmp0
+++	xor	$in1,$tmp1
+++	xor	$in2,$tmp2
+++	xor	$in3,$tmp3
+++	and	$in0,$ctx
+++	and	$in1,$ctx
+++	and	$in2,$ctx
+++	and	$in3,$ctx
+++	xor	$in0,$tmp0
+++	xor	$in1,$tmp1
+++	xor	$in2,$tmp2
+++	xor	$in3,$tmp3
+++
+++	lw	$tmp0,0($nonce)		# load nonce
+++	lw	$tmp1,4($nonce)
+++	lw	$tmp2,8($nonce)
+++	lw	$tmp3,12($nonce)
+++
+++	addu	$in0,$tmp0		# accumulate nonce
+++	sltu	$ctx,$in0,$tmp0
+++
+++	addu	$in1,$tmp1
+++	sltu	$tmp1,$in1,$tmp1
+++	addu	$in1,$ctx
+++	sltu	$ctx,$in1,$ctx
+++	addu	$ctx,$tmp1
+++
+++	addu	$in2,$tmp2
+++	sltu	$tmp2,$in2,$tmp2
+++	addu	$in2,$ctx
+++	sltu	$ctx,$in2,$ctx
+++	addu	$ctx,$tmp2
+++
+++	addu	$in3,$tmp3
+++	addu	$in3,$ctx
+++
+++	srl	$tmp0,$in0,8		# write mac value
+++	srl	$tmp1,$in0,16
+++	srl	$tmp2,$in0,24
+++	sb	$in0, 0($mac)
+++	sb	$tmp0,1($mac)
+++	srl	$tmp0,$in1,8
+++	sb	$tmp1,2($mac)
+++	srl	$tmp1,$in1,16
+++	sb	$tmp2,3($mac)
+++	srl	$tmp2,$in1,24
+++	sb	$in1, 4($mac)
+++	sb	$tmp0,5($mac)
+++	srl	$tmp0,$in2,8
+++	sb	$tmp1,6($mac)
+++	srl	$tmp1,$in2,16
+++	sb	$tmp2,7($mac)
+++	srl	$tmp2,$in2,24
+++	sb	$in2, 8($mac)
+++	sb	$tmp0,9($mac)
+++	srl	$tmp0,$in3,8
+++	sb	$tmp1,10($mac)
+++	srl	$tmp1,$in3,16
+++	sb	$tmp2,11($mac)
+++	srl	$tmp2,$in3,24
+++	sb	$in3, 12($mac)
+++	sb	$tmp0,13($mac)
+++	sb	$tmp1,14($mac)
+++	sb	$tmp2,15($mac)
+++
+++	jr	$ra
+++.end	poly1305_emit
+++.rdata
+++.asciiz	"Poly1305 for MIPS32, CRYPTOGAMS by \@dot-asm"
+++.align	2
+++___
+++}
+++}}}
+++
+++$output=pop and open STDOUT,">$output";
+++print $code;
+++close STDOUT;
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -707,6 +707,11 @@ config CRYPTO_POLY1305_X86_64
++ 	  in IETF protocols. This is the x86_64 assembler implementation using SIMD
++ 	  instructions.
++ 
+++config CRYPTO_POLY1305_MIPS
+++	tristate "Poly1305 authenticator algorithm (MIPS optimized)"
+++	depends on CPU_MIPS32 || (CPU_MIPS64 && 64BIT)
+++	select CRYPTO_ARCH_HAVE_LIB_POLY1305
+++
++ config CRYPTO_MD4
++ 	tristate "MD4 digest algorithm"
++ 	select CRYPTO_HASH
++--- a/lib/crypto/Kconfig
+++++ b/lib/crypto/Kconfig
++@@ -39,6 +39,7 @@ config CRYPTO_LIB_DES
++ 
++ config CRYPTO_LIB_POLY1305_RSIZE
++ 	int
+++	default 2 if MIPS
++ 	default 4 if X86_64
++ 	default 9 if ARM || ARM64
++ 	default 1
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0021-crypto-blake2s-generic-C-library-implementation-and-.patch b/target/linux/generic/backport-5.4/080-wireguard-0021-crypto-blake2s-generic-C-library-implementation-and-.patch
+new file mode 100644
+index 0000000000..97f73b983a
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0021-crypto-blake2s-generic-C-library-implementation-and-.patch
+@@ -0,0 +1,1097 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 8 Nov 2019 13:22:28 +0100
++Subject: [PATCH] crypto: blake2s - generic C library implementation and
++ selftest
++
++commit 66d7fb94e4ffe5acc589e0b2b4710aecc1f07a28 upstream.
++
++The C implementation was originally based on Samuel Neves' public
++domain reference implementation but has since been heavily modified
++for the kernel. We're able to do compile-time optimizations by moving
++some scaffolding around the final function into the header file.
++
++Information: https://blake2.net/
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Samuel Neves <sneves@dei.uc.pt>
++Co-developed-by: Samuel Neves <sneves@dei.uc.pt>
++[ardb: - move from lib/zinc to lib/crypto
++       - remove simd handling
++       - rewrote selftest for better coverage
++       - use fixed digest length for blake2s_hmac() and rename to
++         blake2s256_hmac() ]
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ include/crypto/blake2s.h          | 106 +++++
++ include/crypto/internal/blake2s.h |  19 +
++ lib/crypto/Kconfig                |  25 ++
++ lib/crypto/Makefile               |  10 +
++ lib/crypto/blake2s-generic.c      | 111 ++++++
++ lib/crypto/blake2s-selftest.c     | 622 ++++++++++++++++++++++++++++++
++ lib/crypto/blake2s.c              | 126 ++++++
++ 7 files changed, 1019 insertions(+)
++ create mode 100644 include/crypto/blake2s.h
++ create mode 100644 include/crypto/internal/blake2s.h
++ create mode 100644 lib/crypto/blake2s-generic.c
++ create mode 100644 lib/crypto/blake2s-selftest.c
++ create mode 100644 lib/crypto/blake2s.c
++
++--- /dev/null
+++++ b/include/crypto/blake2s.h
++@@ -0,0 +1,106 @@
+++/* SPDX-License-Identifier: GPL-2.0 OR MIT */
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#ifndef BLAKE2S_H
+++#define BLAKE2S_H
+++
+++#include <linux/types.h>
+++#include <linux/kernel.h>
+++#include <linux/string.h>
+++
+++#include <asm/bug.h>
+++
+++enum blake2s_lengths {
+++	BLAKE2S_BLOCK_SIZE = 64,
+++	BLAKE2S_HASH_SIZE = 32,
+++	BLAKE2S_KEY_SIZE = 32,
+++
+++	BLAKE2S_128_HASH_SIZE = 16,
+++	BLAKE2S_160_HASH_SIZE = 20,
+++	BLAKE2S_224_HASH_SIZE = 28,
+++	BLAKE2S_256_HASH_SIZE = 32,
+++};
+++
+++struct blake2s_state {
+++	u32 h[8];
+++	u32 t[2];
+++	u32 f[2];
+++	u8 buf[BLAKE2S_BLOCK_SIZE];
+++	unsigned int buflen;
+++	unsigned int outlen;
+++};
+++
+++enum blake2s_iv {
+++	BLAKE2S_IV0 = 0x6A09E667UL,
+++	BLAKE2S_IV1 = 0xBB67AE85UL,
+++	BLAKE2S_IV2 = 0x3C6EF372UL,
+++	BLAKE2S_IV3 = 0xA54FF53AUL,
+++	BLAKE2S_IV4 = 0x510E527FUL,
+++	BLAKE2S_IV5 = 0x9B05688CUL,
+++	BLAKE2S_IV6 = 0x1F83D9ABUL,
+++	BLAKE2S_IV7 = 0x5BE0CD19UL,
+++};
+++
+++void blake2s_update(struct blake2s_state *state, const u8 *in, size_t inlen);
+++void blake2s_final(struct blake2s_state *state, u8 *out);
+++
+++static inline void blake2s_init_param(struct blake2s_state *state,
+++				      const u32 param)
+++{
+++	*state = (struct blake2s_state){{
+++		BLAKE2S_IV0 ^ param,
+++		BLAKE2S_IV1,
+++		BLAKE2S_IV2,
+++		BLAKE2S_IV3,
+++		BLAKE2S_IV4,
+++		BLAKE2S_IV5,
+++		BLAKE2S_IV6,
+++		BLAKE2S_IV7,
+++	}};
+++}
+++
+++static inline void blake2s_init(struct blake2s_state *state,
+++				const size_t outlen)
+++{
+++	blake2s_init_param(state, 0x01010000 | outlen);
+++	state->outlen = outlen;
+++}
+++
+++static inline void blake2s_init_key(struct blake2s_state *state,
+++				    const size_t outlen, const void *key,
+++				    const size_t keylen)
+++{
+++	WARN_ON(IS_ENABLED(DEBUG) && (!outlen || outlen > BLAKE2S_HASH_SIZE ||
+++		!key || !keylen || keylen > BLAKE2S_KEY_SIZE));
+++
+++	blake2s_init_param(state, 0x01010000 | keylen << 8 | outlen);
+++	memcpy(state->buf, key, keylen);
+++	state->buflen = BLAKE2S_BLOCK_SIZE;
+++	state->outlen = outlen;
+++}
+++
+++static inline void blake2s(u8 *out, const u8 *in, const u8 *key,
+++			   const size_t outlen, const size_t inlen,
+++			   const size_t keylen)
+++{
+++	struct blake2s_state state;
+++
+++	WARN_ON(IS_ENABLED(DEBUG) && ((!in && inlen > 0) || !out || !outlen ||
+++		outlen > BLAKE2S_HASH_SIZE || keylen > BLAKE2S_KEY_SIZE ||
+++		(!key && keylen)));
+++
+++	if (keylen)
+++		blake2s_init_key(&state, outlen, key, keylen);
+++	else
+++		blake2s_init(&state, outlen);
+++
+++	blake2s_update(&state, in, inlen);
+++	blake2s_final(&state, out);
+++}
+++
+++void blake2s256_hmac(u8 *out, const u8 *in, const u8 *key, const size_t inlen,
+++		     const size_t keylen);
+++
+++#endif /* BLAKE2S_H */
++--- /dev/null
+++++ b/include/crypto/internal/blake2s.h
++@@ -0,0 +1,19 @@
+++/* SPDX-License-Identifier: GPL-2.0 OR MIT */
+++
+++#ifndef BLAKE2S_INTERNAL_H
+++#define BLAKE2S_INTERNAL_H
+++
+++#include <crypto/blake2s.h>
+++
+++void blake2s_compress_generic(struct blake2s_state *state,const u8 *block,
+++			      size_t nblocks, const u32 inc);
+++
+++void blake2s_compress_arch(struct blake2s_state *state,const u8 *block,
+++			   size_t nblocks, const u32 inc);
+++
+++static inline void blake2s_set_lastblock(struct blake2s_state *state)
+++{
+++	state->f[0] = -1;
+++}
+++
+++#endif /* BLAKE2S_INTERNAL_H */
++--- a/lib/crypto/Kconfig
+++++ b/lib/crypto/Kconfig
++@@ -8,6 +8,31 @@ config CRYPTO_LIB_AES
++ config CRYPTO_LIB_ARC4
++ 	tristate
++ 
+++config CRYPTO_ARCH_HAVE_LIB_BLAKE2S
+++	tristate
+++	help
+++	  Declares whether the architecture provides an arch-specific
+++	  accelerated implementation of the Blake2s library interface,
+++	  either builtin or as a module.
+++
+++config CRYPTO_LIB_BLAKE2S_GENERIC
+++	tristate
+++	help
+++	  This symbol can be depended upon by arch implementations of the
+++	  Blake2s library interface that require the generic code as a
+++	  fallback, e.g., for SIMD implementations. If no arch specific
+++	  implementation is enabled, this implementation serves the users
+++	  of CRYPTO_LIB_BLAKE2S.
+++
+++config CRYPTO_LIB_BLAKE2S
+++	tristate "BLAKE2s hash function library"
+++	depends on CRYPTO_ARCH_HAVE_LIB_BLAKE2S || !CRYPTO_ARCH_HAVE_LIB_BLAKE2S
+++	select CRYPTO_LIB_BLAKE2S_GENERIC if CRYPTO_ARCH_HAVE_LIB_BLAKE2S=n
+++	help
+++	  Enable the Blake2s library interface. This interface may be fulfilled
+++	  by either the generic implementation or an arch-specific one, if one
+++	  is available and enabled.
+++
++ config CRYPTO_ARCH_HAVE_LIB_CHACHA
++ 	tristate
++ 	help
++--- a/lib/crypto/Makefile
+++++ b/lib/crypto/Makefile
++@@ -10,6 +10,12 @@ libaes-y					:= aes.o
++ obj-$(CONFIG_CRYPTO_LIB_ARC4)			+= libarc4.o
++ libarc4-y					:= arc4.o
++ 
+++obj-$(CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC)	+= libblake2s-generic.o
+++libblake2s-generic-y				+= blake2s-generic.o
+++
+++obj-$(CONFIG_CRYPTO_LIB_BLAKE2S)		+= libblake2s.o
+++libblake2s-y					+= blake2s.o
+++
++ obj-$(CONFIG_CRYPTO_LIB_DES)			+= libdes.o
++ libdes-y					:= des.o
++ 
++@@ -18,3 +24,7 @@ libpoly1305-y					:= poly1305.o
++ 
++ obj-$(CONFIG_CRYPTO_LIB_SHA256)			+= libsha256.o
++ libsha256-y					:= sha256.o
+++
+++ifneq ($(CONFIG_CRYPTO_MANAGER_DISABLE_TESTS),y)
+++libblake2s-y					+= blake2s-selftest.o
+++endif
++--- /dev/null
+++++ b/lib/crypto/blake2s-generic.c
++@@ -0,0 +1,111 @@
+++// SPDX-License-Identifier: GPL-2.0 OR MIT
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ *
+++ * This is an implementation of the BLAKE2s hash and PRF functions.
+++ *
+++ * Information: https://blake2.net/
+++ *
+++ */
+++
+++#include <crypto/internal/blake2s.h>
+++#include <linux/types.h>
+++#include <linux/string.h>
+++#include <linux/kernel.h>
+++#include <linux/module.h>
+++#include <linux/init.h>
+++#include <linux/bug.h>
+++#include <asm/unaligned.h>
+++
+++static const u8 blake2s_sigma[10][16] = {
+++	{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
+++	{ 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
+++	{ 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
+++	{ 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
+++	{ 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
+++	{ 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
+++	{ 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
+++	{ 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
+++	{ 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
+++	{ 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 },
+++};
+++
+++static inline void blake2s_increment_counter(struct blake2s_state *state,
+++					     const u32 inc)
+++{
+++	state->t[0] += inc;
+++	state->t[1] += (state->t[0] < inc);
+++}
+++
+++void blake2s_compress_generic(struct blake2s_state *state,const u8 *block,
+++			      size_t nblocks, const u32 inc)
+++{
+++	u32 m[16];
+++	u32 v[16];
+++	int i;
+++
+++	WARN_ON(IS_ENABLED(DEBUG) &&
+++		(nblocks > 1 && inc != BLAKE2S_BLOCK_SIZE));
+++
+++	while (nblocks > 0) {
+++		blake2s_increment_counter(state, inc);
+++		memcpy(m, block, BLAKE2S_BLOCK_SIZE);
+++		le32_to_cpu_array(m, ARRAY_SIZE(m));
+++		memcpy(v, state->h, 32);
+++		v[ 8] = BLAKE2S_IV0;
+++		v[ 9] = BLAKE2S_IV1;
+++		v[10] = BLAKE2S_IV2;
+++		v[11] = BLAKE2S_IV3;
+++		v[12] = BLAKE2S_IV4 ^ state->t[0];
+++		v[13] = BLAKE2S_IV5 ^ state->t[1];
+++		v[14] = BLAKE2S_IV6 ^ state->f[0];
+++		v[15] = BLAKE2S_IV7 ^ state->f[1];
+++
+++#define G(r, i, a, b, c, d) do { \
+++	a += b + m[blake2s_sigma[r][2 * i + 0]]; \
+++	d = ror32(d ^ a, 16); \
+++	c += d; \
+++	b = ror32(b ^ c, 12); \
+++	a += b + m[blake2s_sigma[r][2 * i + 1]]; \
+++	d = ror32(d ^ a, 8); \
+++	c += d; \
+++	b = ror32(b ^ c, 7); \
+++} while (0)
+++
+++#define ROUND(r) do { \
+++	G(r, 0, v[0], v[ 4], v[ 8], v[12]); \
+++	G(r, 1, v[1], v[ 5], v[ 9], v[13]); \
+++	G(r, 2, v[2], v[ 6], v[10], v[14]); \
+++	G(r, 3, v[3], v[ 7], v[11], v[15]); \
+++	G(r, 4, v[0], v[ 5], v[10], v[15]); \
+++	G(r, 5, v[1], v[ 6], v[11], v[12]); \
+++	G(r, 6, v[2], v[ 7], v[ 8], v[13]); \
+++	G(r, 7, v[3], v[ 4], v[ 9], v[14]); \
+++} while (0)
+++		ROUND(0);
+++		ROUND(1);
+++		ROUND(2);
+++		ROUND(3);
+++		ROUND(4);
+++		ROUND(5);
+++		ROUND(6);
+++		ROUND(7);
+++		ROUND(8);
+++		ROUND(9);
+++
+++#undef G
+++#undef ROUND
+++
+++		for (i = 0; i < 8; ++i)
+++			state->h[i] ^= v[i] ^ v[i + 8];
+++
+++		block += BLAKE2S_BLOCK_SIZE;
+++		--nblocks;
+++	}
+++}
+++
+++EXPORT_SYMBOL(blake2s_compress_generic);
+++
+++MODULE_LICENSE("GPL v2");
+++MODULE_DESCRIPTION("BLAKE2s hash function");
+++MODULE_AUTHOR("Jason A. Donenfeld <Jason@zx2c4.com>");
++--- /dev/null
+++++ b/lib/crypto/blake2s-selftest.c
++@@ -0,0 +1,622 @@
+++// SPDX-License-Identifier: GPL-2.0 OR MIT
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include <crypto/blake2s.h>
+++#include <linux/string.h>
+++
+++/*
+++ * blake2s_testvecs[] generated with the program below (using libb2-dev and
+++ * libssl-dev [OpenSSL])
+++ *
+++ * #include <blake2.h>
+++ * #include <stdint.h>
+++ * #include <stdio.h>
+++ *
+++ * #include <openssl/evp.h>
+++ * #include <openssl/hmac.h>
+++ *
+++ * #define BLAKE2S_TESTVEC_COUNT	256
+++ *
+++ * static void print_vec(const uint8_t vec[], int len)
+++ * {
+++ *	int i;
+++ *
+++ *	printf("  { ");
+++ *	for (i = 0; i < len; i++) {
+++ *		if (i && (i % 12) == 0)
+++ *			printf("\n    ");
+++ *		printf("0x%02x, ", vec[i]);
+++ *	}
+++ *	printf("},\n");
+++ * }
+++ *
+++ * int main(void)
+++ * {
+++ *	uint8_t key[BLAKE2S_KEYBYTES];
+++ *	uint8_t buf[BLAKE2S_TESTVEC_COUNT];
+++ *	uint8_t hash[BLAKE2S_OUTBYTES];
+++ *	int i, j;
+++ *
+++ *	key[0] = key[1] = 1;
+++ *	for (i = 2; i < BLAKE2S_KEYBYTES; ++i)
+++ *		key[i] = key[i - 2] + key[i - 1];
+++ *
+++ *	for (i = 0; i < BLAKE2S_TESTVEC_COUNT; ++i)
+++ *		buf[i] = (uint8_t)i;
+++ *
+++ *	printf("static const u8 blake2s_testvecs[][BLAKE2S_HASH_SIZE] __initconst = {\n");
+++ *
+++ *	for (i = 0; i < BLAKE2S_TESTVEC_COUNT; ++i) {
+++ *		int outlen = 1 + i % BLAKE2S_OUTBYTES;
+++ *		int keylen = (13 * i) % (BLAKE2S_KEYBYTES + 1);
+++ *
+++ *		blake2s(hash, buf, key + BLAKE2S_KEYBYTES - keylen, outlen, i,
+++ *			keylen);
+++ *		print_vec(hash, outlen);
+++ *	}
+++ *	printf("};\n\n");
+++ *
+++ *	printf("static const u8 blake2s_hmac_testvecs[][BLAKE2S_HASH_SIZE] __initconst = {\n");
+++ *
+++ *	HMAC(EVP_blake2s256(), key, sizeof(key), buf, sizeof(buf), hash, NULL);
+++ *	print_vec(hash, BLAKE2S_OUTBYTES);
+++ *
+++ *	HMAC(EVP_blake2s256(), buf, sizeof(buf), key, sizeof(key), hash, NULL);
+++ *	print_vec(hash, BLAKE2S_OUTBYTES);
+++ *
+++ *	printf("};\n");
+++ *
+++ *	return 0;
+++ *}
+++ */
+++static const u8 blake2s_testvecs[][BLAKE2S_HASH_SIZE] __initconst = {
+++  { 0xa1, },
+++  { 0x7c, 0x89, },
+++  { 0x74, 0x0e, 0xd4, },
+++  { 0x47, 0x0c, 0x21, 0x15, },
+++  { 0x18, 0xd6, 0x9c, 0xa6, 0xc4, },
+++  { 0x13, 0x5d, 0x16, 0x63, 0x2e, 0xf9, },
+++  { 0x2c, 0xb5, 0x04, 0xb7, 0x99, 0xe2, 0x73, },
+++  { 0x9a, 0x0f, 0xd2, 0x39, 0xd6, 0x68, 0x1b, 0x92, },
+++  { 0xc8, 0xde, 0x7a, 0xea, 0x2f, 0xf4, 0xd2, 0xe3, 0x2b, },
+++  { 0x5b, 0xf9, 0x43, 0x52, 0x0c, 0x12, 0xba, 0xb5, 0x93, 0x9f, },
+++  { 0xc6, 0x2c, 0x4e, 0x80, 0xfc, 0x32, 0x5b, 0x33, 0xb8, 0xb8, 0x0a, },
+++  { 0xa7, 0x5c, 0xfd, 0x3a, 0xcc, 0xbf, 0x90, 0xca, 0xb7, 0x97, 0xde, 0xd8, },
+++  { 0x66, 0xca, 0x3c, 0xc4, 0x19, 0xef, 0x92, 0x66, 0x3f, 0x21, 0x8f, 0xda,
+++    0xb7, },
+++  { 0xba, 0xe5, 0xbb, 0x30, 0x25, 0x94, 0x6d, 0xc3, 0x89, 0x09, 0xc4, 0x25,
+++    0x52, 0x3e, },
+++  { 0xa2, 0xef, 0x0e, 0x52, 0x0b, 0x5f, 0xa2, 0x01, 0x6d, 0x0a, 0x25, 0xbc,
+++    0x57, 0xe2, 0x27, },
+++  { 0x4f, 0xe0, 0xf9, 0x52, 0x12, 0xda, 0x84, 0xb7, 0xab, 0xae, 0xb0, 0xa6,
+++    0x47, 0x2a, 0xc7, 0xf5, },
+++  { 0x56, 0xe7, 0xa8, 0x1c, 0x4c, 0xca, 0xed, 0x90, 0x31, 0xec, 0x87, 0x43,
+++    0xe7, 0x72, 0x08, 0xec, 0xbe, },
+++  { 0x7e, 0xdf, 0x80, 0x1c, 0x93, 0x33, 0xfd, 0x53, 0x44, 0xba, 0xfd, 0x96,
+++    0xe1, 0xbb, 0xb5, 0x65, 0xa5, 0x00, },
+++  { 0xec, 0x6b, 0xed, 0xf7, 0x7b, 0x62, 0x1d, 0x7d, 0xf4, 0x82, 0xf3, 0x1e,
+++    0x18, 0xff, 0x2b, 0xc4, 0x06, 0x20, 0x2a, },
+++  { 0x74, 0x98, 0xd7, 0x68, 0x63, 0xed, 0x87, 0xe4, 0x5d, 0x8d, 0x9e, 0x1d,
+++    0xfd, 0x2a, 0xbb, 0x86, 0xac, 0xe9, 0x2a, 0x89, },
+++  { 0x89, 0xc3, 0x88, 0xce, 0x2b, 0x33, 0x1e, 0x10, 0xd1, 0x37, 0x20, 0x86,
+++    0x28, 0x43, 0x70, 0xd9, 0xfb, 0x96, 0xd9, 0xb5, 0xd3, },
+++  { 0xcb, 0x56, 0x74, 0x41, 0x8d, 0x80, 0x01, 0x9a, 0x6b, 0x38, 0xe1, 0x41,
+++    0xad, 0x9c, 0x62, 0x74, 0xce, 0x35, 0xd5, 0x6c, 0x89, 0x6e, },
+++  { 0x79, 0xaf, 0x94, 0x59, 0x99, 0x26, 0xe1, 0xc9, 0x34, 0xfe, 0x7c, 0x22,
+++    0xf7, 0x43, 0xd7, 0x65, 0xd4, 0x48, 0x18, 0xac, 0x3d, 0xfd, 0x93, },
+++  { 0x85, 0x0d, 0xff, 0xb8, 0x3e, 0x87, 0x41, 0xb0, 0x95, 0xd3, 0x3d, 0x00,
+++    0x47, 0x55, 0x9e, 0xd2, 0x69, 0xea, 0xbf, 0xe9, 0x7a, 0x2d, 0x61, 0x45, },
+++  { 0x03, 0xe0, 0x85, 0xec, 0x54, 0xb5, 0x16, 0x53, 0xa8, 0xc4, 0x71, 0xe9,
+++    0x6a, 0xe7, 0xcb, 0xc4, 0x15, 0x02, 0xfc, 0x34, 0xa4, 0xa4, 0x28, 0x13,
+++    0xd1, },
+++  { 0xe3, 0x34, 0x4b, 0xe1, 0xd0, 0x4b, 0x55, 0x61, 0x8f, 0xc0, 0x24, 0x05,
+++    0xe6, 0xe0, 0x3d, 0x70, 0x24, 0x4d, 0xda, 0xb8, 0x91, 0x05, 0x29, 0x07,
+++    0x01, 0x3e, },
+++  { 0x61, 0xff, 0x01, 0x72, 0xb1, 0x4d, 0xf6, 0xfe, 0xd1, 0xd1, 0x08, 0x74,
+++    0xe6, 0x91, 0x44, 0xeb, 0x61, 0xda, 0x40, 0xaf, 0xfc, 0x8c, 0x91, 0x6b,
+++    0xec, 0x13, 0xed, },
+++  { 0xd4, 0x40, 0xd2, 0xa0, 0x7f, 0xc1, 0x58, 0x0c, 0x85, 0xa0, 0x86, 0xc7,
+++    0x86, 0xb9, 0x61, 0xc9, 0xea, 0x19, 0x86, 0x1f, 0xab, 0x07, 0xce, 0x37,
+++    0x72, 0x67, 0x09, 0xfc, },
+++  { 0x9e, 0xf8, 0x18, 0x67, 0x93, 0x10, 0x9b, 0x39, 0x75, 0xe8, 0x8b, 0x38,
+++    0x82, 0x7d, 0xb8, 0xb7, 0xa5, 0xaf, 0xe6, 0x6a, 0x22, 0x5e, 0x1f, 0x9c,
+++    0x95, 0x29, 0x19, 0xf2, 0x4b, },
+++  { 0xc8, 0x62, 0x25, 0xf5, 0x98, 0xc9, 0xea, 0xe5, 0x29, 0x3a, 0xd3, 0x22,
+++    0xeb, 0xeb, 0x07, 0x7c, 0x15, 0x07, 0xee, 0x15, 0x61, 0xbb, 0x05, 0x30,
+++    0x99, 0x7f, 0x11, 0xf6, 0x0a, 0x1d, },
+++  { 0x68, 0x70, 0xf7, 0x90, 0xa1, 0x8b, 0x1f, 0x0f, 0xbb, 0xce, 0xd2, 0x0e,
+++    0x33, 0x1f, 0x7f, 0xa9, 0x78, 0xa8, 0xa6, 0x81, 0x66, 0xab, 0x8d, 0xcd,
+++    0x58, 0x55, 0x3a, 0x0b, 0x7a, 0xdb, 0xb5, },
+++  { 0xdd, 0x35, 0xd2, 0xb4, 0xf6, 0xc7, 0xea, 0xab, 0x64, 0x24, 0x4e, 0xfe,
+++    0xe5, 0x3d, 0x4e, 0x95, 0x8b, 0x6d, 0x6c, 0xbc, 0xb0, 0xf8, 0x88, 0x61,
+++    0x09, 0xb7, 0x78, 0xa3, 0x31, 0xfe, 0xd9, 0x2f, },
+++  { 0x0a, },
+++  { 0x6e, 0xd4, },
+++  { 0x64, 0xe9, 0xd1, },
+++  { 0x30, 0xdd, 0x71, 0xef, },
+++  { 0x11, 0xb5, 0x0c, 0x87, 0xc9, },
+++  { 0x06, 0x1c, 0x6d, 0x04, 0x82, 0xd0, },
+++  { 0x5c, 0x42, 0x0b, 0xee, 0xc5, 0x9c, 0xb2, },
+++  { 0xe8, 0x29, 0xd6, 0xb4, 0x5d, 0xf7, 0x2b, 0x93, },
+++  { 0x18, 0xca, 0x27, 0x72, 0x43, 0x39, 0x16, 0xbc, 0x6a, },
+++  { 0x39, 0x8f, 0xfd, 0x64, 0xf5, 0x57, 0x23, 0xb0, 0x45, 0xf8, },
+++  { 0xbb, 0x3a, 0x78, 0x6b, 0x02, 0x1d, 0x0b, 0x16, 0xe3, 0xb2, 0x9a, },
+++  { 0xb8, 0xb4, 0x0b, 0xe5, 0xd4, 0x1d, 0x0d, 0x85, 0x49, 0x91, 0x35, 0xfa, },
+++  { 0x6d, 0x48, 0x2a, 0x0c, 0x42, 0x08, 0xbd, 0xa9, 0x78, 0x6f, 0x18, 0xaf,
+++    0xe2, },
+++  { 0x10, 0x45, 0xd4, 0x58, 0x88, 0xec, 0x4e, 0x1e, 0xf6, 0x14, 0x92, 0x64,
+++    0x7e, 0xb0, },
+++  { 0x8b, 0x0b, 0x95, 0xee, 0x92, 0xc6, 0x3b, 0x91, 0xf1, 0x1e, 0xeb, 0x51,
+++    0x98, 0x0a, 0x8d, },
+++  { 0xa3, 0x50, 0x4d, 0xa5, 0x1d, 0x03, 0x68, 0xe9, 0x57, 0x78, 0xd6, 0x04,
+++    0xf1, 0xc3, 0x94, 0xd8, },
+++  { 0xb8, 0x66, 0x6e, 0xdd, 0x46, 0x15, 0xae, 0x3d, 0x83, 0x7e, 0xcf, 0xe7,
+++    0x2c, 0xe8, 0x8f, 0xc7, 0x34, },
+++  { 0x2e, 0xc0, 0x1f, 0x29, 0xea, 0xf6, 0xb9, 0xe2, 0xc2, 0x93, 0xeb, 0x41,
+++    0x0d, 0xf0, 0x0a, 0x13, 0x0e, 0xa2, },
+++  { 0x71, 0xb8, 0x33, 0xa9, 0x1b, 0xac, 0xf1, 0xb5, 0x42, 0x8f, 0x5e, 0x81,
+++    0x34, 0x43, 0xb7, 0xa4, 0x18, 0x5c, 0x47, },
+++  { 0xda, 0x45, 0xb8, 0x2e, 0x82, 0x1e, 0xc0, 0x59, 0x77, 0x9d, 0xfa, 0xb4,
+++    0x1c, 0x5e, 0xa0, 0x2b, 0x33, 0x96, 0x5a, 0x58, },
+++  { 0xe3, 0x09, 0x05, 0xa9, 0xeb, 0x48, 0x13, 0xad, 0x71, 0x88, 0x81, 0x9a,
+++    0x3e, 0x2c, 0xe1, 0x23, 0x99, 0x13, 0x35, 0x9f, 0xb5, },
+++  { 0xb7, 0x86, 0x2d, 0x16, 0xe1, 0x04, 0x00, 0x47, 0x47, 0x61, 0x31, 0xfb,
+++    0x14, 0xac, 0xd8, 0xe9, 0xe3, 0x49, 0xbd, 0xf7, 0x9c, 0x3f, },
+++  { 0x7f, 0xd9, 0x95, 0xa8, 0xa7, 0xa0, 0xcc, 0xba, 0xef, 0xb1, 0x0a, 0xa9,
+++    0x21, 0x62, 0x08, 0x0f, 0x1b, 0xff, 0x7b, 0x9d, 0xae, 0xb2, 0x95, },
+++  { 0x85, 0x99, 0xea, 0x33, 0xe0, 0x56, 0xff, 0x13, 0xc6, 0x61, 0x8c, 0xf9,
+++    0x57, 0x05, 0x03, 0x11, 0xf9, 0xfb, 0x3a, 0xf7, 0xce, 0xbb, 0x52, 0x30, },
+++  { 0xb2, 0x72, 0x9c, 0xf8, 0x77, 0x4e, 0x8f, 0x6b, 0x01, 0x6c, 0xff, 0x4e,
+++    0x4f, 0x02, 0xd2, 0xbc, 0xeb, 0x51, 0x28, 0x99, 0x50, 0xab, 0xc4, 0x42,
+++    0xe3, },
+++  { 0x8b, 0x0a, 0xb5, 0x90, 0x8f, 0xf5, 0x7b, 0xdd, 0xba, 0x47, 0x37, 0xc9,
+++    0x2a, 0xd5, 0x4b, 0x25, 0x08, 0x8b, 0x02, 0x17, 0xa7, 0x9e, 0x6b, 0x6e,
+++    0xe3, 0x90, },
+++  { 0x90, 0xdd, 0xf7, 0x75, 0xa7, 0xa3, 0x99, 0x5e, 0x5b, 0x7d, 0x75, 0xc3,
+++    0x39, 0x6b, 0xa0, 0xe2, 0x44, 0x53, 0xb1, 0x9e, 0xc8, 0xf1, 0x77, 0x10,
+++    0x58, 0x06, 0x9a, },
+++  { 0x99, 0x52, 0xf0, 0x49, 0xa8, 0x8c, 0xec, 0xa6, 0x97, 0x32, 0x13, 0xb5,
+++    0xf7, 0xa3, 0x8e, 0xfb, 0x4b, 0x59, 0x31, 0x3d, 0x01, 0x59, 0x98, 0x5d,
+++    0x53, 0x03, 0x1a, 0x39, },
+++  { 0x9f, 0xe0, 0xc2, 0xe5, 0x5d, 0x93, 0xd6, 0x9b, 0x47, 0x8f, 0x9b, 0xe0,
+++    0x26, 0x35, 0x84, 0x20, 0x1d, 0xc5, 0x53, 0x10, 0x0f, 0x22, 0xb9, 0xb5,
+++    0xd4, 0x36, 0xb1, 0xac, 0x73, },
+++  { 0x30, 0x32, 0x20, 0x3b, 0x10, 0x28, 0xec, 0x1f, 0x4f, 0x9b, 0x47, 0x59,
+++    0xeb, 0x7b, 0xee, 0x45, 0xfb, 0x0c, 0x49, 0xd8, 0x3d, 0x69, 0xbd, 0x90,
+++    0x2c, 0xf0, 0x9e, 0x8d, 0xbf, 0xd5, },
+++  { 0x2a, 0x37, 0x73, 0x7f, 0xf9, 0x96, 0x19, 0xaa, 0x25, 0xd8, 0x13, 0x28,
+++    0x01, 0x29, 0x89, 0xdf, 0x6e, 0x0c, 0x9b, 0x43, 0x44, 0x51, 0xe9, 0x75,
+++    0x26, 0x0c, 0xb7, 0x87, 0x66, 0x0b, 0x5f, },
+++  { 0x23, 0xdf, 0x96, 0x68, 0x91, 0x86, 0xd0, 0x93, 0x55, 0x33, 0x24, 0xf6,
+++    0xba, 0x08, 0x75, 0x5b, 0x59, 0x11, 0x69, 0xb8, 0xb9, 0xe5, 0x2c, 0x77,
+++    0x02, 0xf6, 0x47, 0xee, 0x81, 0xdd, 0xb9, 0x06, },
+++  { 0x9d, },
+++  { 0x9d, 0x7d, },
+++  { 0xfd, 0xc3, 0xda, },
+++  { 0xe8, 0x82, 0xcd, 0x21, },
+++  { 0xc3, 0x1d, 0x42, 0x4c, 0x74, },
+++  { 0xe9, 0xda, 0xf1, 0xa2, 0xe5, 0x7c, },
+++  { 0x52, 0xb8, 0x6f, 0x81, 0x5c, 0x3a, 0x4c, },
+++  { 0x5b, 0x39, 0x26, 0xfc, 0x92, 0x5e, 0xe0, 0x49, },
+++  { 0x59, 0xe4, 0x7c, 0x93, 0x1c, 0xf9, 0x28, 0x93, 0xde, },
+++  { 0xde, 0xdf, 0xb2, 0x43, 0x61, 0x0b, 0x86, 0x16, 0x4c, 0x2e, },
+++  { 0x14, 0x8f, 0x75, 0x51, 0xaf, 0xb9, 0xee, 0x51, 0x5a, 0xae, 0x23, },
+++  { 0x43, 0x5f, 0x50, 0xd5, 0x70, 0xb0, 0x5b, 0x87, 0xf5, 0xd9, 0xb3, 0x6d, },
+++  { 0x66, 0x0a, 0x64, 0x93, 0x79, 0x71, 0x94, 0x40, 0xb7, 0x68, 0x2d, 0xd3,
+++    0x63, },
+++  { 0x15, 0x00, 0xc4, 0x0c, 0x7d, 0x1b, 0x10, 0xa9, 0x73, 0x1b, 0x90, 0x6f,
+++    0xe6, 0xa9, },
+++  { 0x34, 0x75, 0xf3, 0x86, 0x8f, 0x56, 0xcf, 0x2a, 0x0a, 0xf2, 0x62, 0x0a,
+++    0xf6, 0x0e, 0x20, },
+++  { 0xb1, 0xde, 0xc9, 0xf5, 0xdb, 0xf3, 0x2f, 0x4c, 0xd6, 0x41, 0x7d, 0x39,
+++    0x18, 0x3e, 0xc7, 0xc3, },
+++  { 0xc5, 0x89, 0xb2, 0xf8, 0xb8, 0xc0, 0xa3, 0xb9, 0x3b, 0x10, 0x6d, 0x7c,
+++    0x92, 0xfc, 0x7f, 0x34, 0x41, },
+++  { 0xc4, 0xd8, 0xef, 0xba, 0xef, 0xd2, 0xaa, 0xc5, 0x6c, 0x8e, 0x3e, 0xbb,
+++    0x12, 0xfc, 0x0f, 0x72, 0xbf, 0x0f, },
+++  { 0xdd, 0x91, 0xd1, 0x15, 0x9e, 0x7d, 0xf8, 0xc1, 0xb9, 0x14, 0x63, 0x96,
+++    0xb5, 0xcb, 0x83, 0x1d, 0x35, 0x1c, 0xec, },
+++  { 0xa9, 0xf8, 0x52, 0xc9, 0x67, 0x76, 0x2b, 0xad, 0xfb, 0xd8, 0x3a, 0xa6,
+++    0x74, 0x02, 0xae, 0xb8, 0x25, 0x2c, 0x63, 0x49, },
+++  { 0x77, 0x1f, 0x66, 0x70, 0xfd, 0x50, 0x29, 0xaa, 0xeb, 0xdc, 0xee, 0xba,
+++    0x75, 0x98, 0xdc, 0x93, 0x12, 0x3f, 0xdc, 0x7c, 0x38, },
+++  { 0xe2, 0xe1, 0x89, 0x5c, 0x37, 0x38, 0x6a, 0xa3, 0x40, 0xac, 0x3f, 0xb0,
+++    0xca, 0xfc, 0xa7, 0xf3, 0xea, 0xf9, 0x0f, 0x5d, 0x8e, 0x39, },
+++  { 0x0f, 0x67, 0xc8, 0x38, 0x01, 0xb1, 0xb7, 0xb8, 0xa2, 0xe7, 0x0a, 0x6d,
+++    0xd2, 0x63, 0x69, 0x9e, 0xcc, 0xf0, 0xf2, 0xbe, 0x9b, 0x98, 0xdd, },
+++  { 0x13, 0xe1, 0x36, 0x30, 0xfe, 0xc6, 0x01, 0x8a, 0xa1, 0x63, 0x96, 0x59,
+++    0xc2, 0xa9, 0x68, 0x3f, 0x58, 0xd4, 0x19, 0x0c, 0x40, 0xf3, 0xde, 0x02, },
+++  { 0xa3, 0x9e, 0xce, 0xda, 0x42, 0xee, 0x8c, 0x6c, 0x5a, 0x7d, 0xdc, 0x89,
+++    0x02, 0x77, 0xdd, 0xe7, 0x95, 0xbb, 0xff, 0x0d, 0xa4, 0xb5, 0x38, 0x1e,
+++    0xaf, },
+++  { 0x9a, 0xf6, 0xb5, 0x9a, 0x4f, 0xa9, 0x4f, 0x2c, 0x35, 0x3c, 0x24, 0xdc,
+++    0x97, 0x6f, 0xd9, 0xa1, 0x7d, 0x1a, 0x85, 0x0b, 0xf5, 0xda, 0x2e, 0xe7,
+++    0xb1, 0x1d, },
+++  { 0x84, 0x1e, 0x8e, 0x3d, 0x45, 0xa5, 0xf2, 0x27, 0xf3, 0x31, 0xfe, 0xb9,
+++    0xfb, 0xc5, 0x45, 0x99, 0x99, 0xdd, 0x93, 0x43, 0x02, 0xee, 0x58, 0xaf,
+++    0xee, 0x6a, 0xbe, },
+++  { 0x07, 0x2f, 0xc0, 0xa2, 0x04, 0xc4, 0xab, 0x7c, 0x26, 0xbb, 0xa8, 0xd8,
+++    0xe3, 0x1c, 0x75, 0x15, 0x64, 0x5d, 0x02, 0x6a, 0xf0, 0x86, 0xe9, 0xcd,
+++    0x5c, 0xef, 0xa3, 0x25, },
+++  { 0x2f, 0x3b, 0x1f, 0xb5, 0x91, 0x8f, 0x86, 0xe0, 0xdc, 0x31, 0x48, 0xb6,
+++    0xa1, 0x8c, 0xfd, 0x75, 0xbb, 0x7d, 0x3d, 0xc1, 0xf0, 0x10, 0x9a, 0xd8,
+++    0x4b, 0x0e, 0xe3, 0x94, 0x9f, },
+++  { 0x29, 0xbb, 0x8f, 0x6c, 0xd1, 0xf2, 0xb6, 0xaf, 0xe5, 0xe3, 0x2d, 0xdc,
+++    0x6f, 0xa4, 0x53, 0x88, 0xd8, 0xcf, 0x4d, 0x45, 0x42, 0x62, 0xdb, 0xdf,
+++    0xf8, 0x45, 0xc2, 0x13, 0xec, 0x35, },
+++  { 0x06, 0x3c, 0xe3, 0x2c, 0x15, 0xc6, 0x43, 0x03, 0x81, 0xfb, 0x08, 0x76,
+++    0x33, 0xcb, 0x02, 0xc1, 0xba, 0x33, 0xe5, 0xe0, 0xd1, 0x92, 0xa8, 0x46,
+++    0x28, 0x3f, 0x3e, 0x9d, 0x2c, 0x44, 0x54, },
+++  { 0xea, 0xbb, 0x96, 0xf8, 0xd1, 0x8b, 0x04, 0x11, 0x40, 0x78, 0x42, 0x02,
+++    0x19, 0xd1, 0xbc, 0x65, 0x92, 0xd3, 0xc3, 0xd6, 0xd9, 0x19, 0xe7, 0xc3,
+++    0x40, 0x97, 0xbd, 0xd4, 0xed, 0xfa, 0x5e, 0x28, },
+++  { 0x02, },
+++  { 0x52, 0xa8, },
+++  { 0x38, 0x25, 0x0d, },
+++  { 0xe3, 0x04, 0xd4, 0x92, },
+++  { 0x97, 0xdb, 0xf7, 0x81, 0xca, },
+++  { 0x8a, 0x56, 0x9d, 0x62, 0x56, 0xcc, },
+++  { 0xa1, 0x8e, 0x3c, 0x72, 0x8f, 0x63, 0x03, },
+++  { 0xf7, 0xf3, 0x39, 0x09, 0x0a, 0xa1, 0xbb, 0x23, },
+++  { 0x6b, 0x03, 0xc0, 0xe9, 0xd9, 0x83, 0x05, 0x22, 0x01, },
+++  { 0x1b, 0x4b, 0xf5, 0xd6, 0x4f, 0x05, 0x75, 0x91, 0x4c, 0x7f, },
+++  { 0x4c, 0x8c, 0x25, 0x20, 0x21, 0xcb, 0xc2, 0x4b, 0x3a, 0x5b, 0x8d, },
+++  { 0x56, 0xe2, 0x77, 0xa0, 0xb6, 0x9f, 0x81, 0xec, 0x83, 0x75, 0xc4, 0xf9, },
+++  { 0x71, 0x70, 0x0f, 0xad, 0x4d, 0x35, 0x81, 0x9d, 0x88, 0x69, 0xf9, 0xaa,
+++    0xd3, },
+++  { 0x50, 0x6e, 0x86, 0x6e, 0x43, 0xc0, 0xc2, 0x44, 0xc2, 0xe2, 0xa0, 0x1c,
+++    0xb7, 0x9a, },
+++  { 0xe4, 0x7e, 0x72, 0xc6, 0x12, 0x8e, 0x7c, 0xfc, 0xbd, 0xe2, 0x08, 0x31,
+++    0x3d, 0x47, 0x3d, },
+++  { 0x08, 0x97, 0x5b, 0x80, 0xae, 0xc4, 0x1d, 0x50, 0x77, 0xdf, 0x1f, 0xd0,
+++    0x24, 0xf0, 0x17, 0xc0, },
+++  { 0x01, 0xb6, 0x29, 0xf4, 0xaf, 0x78, 0x5f, 0xb6, 0x91, 0xdd, 0x76, 0x76,
+++    0xd2, 0xfd, 0x0c, 0x47, 0x40, },
+++  { 0xa1, 0xd8, 0x09, 0x97, 0x7a, 0xa6, 0xc8, 0x94, 0xf6, 0x91, 0x7b, 0xae,
+++    0x2b, 0x9f, 0x0d, 0x83, 0x48, 0xf7, },
+++  { 0x12, 0xd5, 0x53, 0x7d, 0x9a, 0xb0, 0xbe, 0xd9, 0xed, 0xe9, 0x9e, 0xee,
+++    0x61, 0x5b, 0x42, 0xf2, 0xc0, 0x73, 0xc0, },
+++  { 0xd5, 0x77, 0xd6, 0x5c, 0x6e, 0xa5, 0x69, 0x2b, 0x3b, 0x8c, 0xd6, 0x7d,
+++    0x1d, 0xbe, 0x2c, 0xa1, 0x02, 0x21, 0xcd, 0x29, },
+++  { 0xa4, 0x98, 0x80, 0xca, 0x22, 0xcf, 0x6a, 0xab, 0x5e, 0x40, 0x0d, 0x61,
+++    0x08, 0x21, 0xef, 0xc0, 0x6c, 0x52, 0xb4, 0xb0, 0x53, },
+++  { 0xbf, 0xaf, 0x8f, 0x3b, 0x7a, 0x97, 0x33, 0xe5, 0xca, 0x07, 0x37, 0xfd,
+++    0x15, 0xdf, 0xce, 0x26, 0x2a, 0xb1, 0xa7, 0x0b, 0xb3, 0xac, },
+++  { 0x16, 0x22, 0xe1, 0xbc, 0x99, 0x4e, 0x01, 0xf0, 0xfa, 0xff, 0x8f, 0xa5,
+++    0x0c, 0x61, 0xb0, 0xad, 0xcc, 0xb1, 0xe1, 0x21, 0x46, 0xfa, 0x2e, },
+++  { 0x11, 0x5b, 0x0b, 0x2b, 0xe6, 0x14, 0xc1, 0xd5, 0x4d, 0x71, 0x5e, 0x17,
+++    0xea, 0x23, 0xdd, 0x6c, 0xbd, 0x1d, 0xbe, 0x12, 0x1b, 0xee, 0x4c, 0x1a, },
+++  { 0x40, 0x88, 0x22, 0xf3, 0x20, 0x6c, 0xed, 0xe1, 0x36, 0x34, 0x62, 0x2c,
+++    0x98, 0x83, 0x52, 0xe2, 0x25, 0xee, 0xe9, 0xf5, 0xe1, 0x17, 0xf0, 0x5c,
+++    0xae, },
+++  { 0xc3, 0x76, 0x37, 0xde, 0x95, 0x8c, 0xca, 0x2b, 0x0c, 0x23, 0xe7, 0xb5,
+++    0x38, 0x70, 0x61, 0xcc, 0xff, 0xd3, 0x95, 0x7b, 0xf3, 0xff, 0x1f, 0x9d,
+++    0x59, 0x00, },
+++  { 0x0c, 0x19, 0x52, 0x05, 0x22, 0x53, 0xcb, 0x48, 0xd7, 0x10, 0x0e, 0x7e,
+++    0x14, 0x69, 0xb5, 0xa2, 0x92, 0x43, 0xa3, 0x9e, 0x4b, 0x8f, 0x51, 0x2c,
+++    0x5a, 0x2c, 0x3b, },
+++  { 0xe1, 0x9d, 0x70, 0x70, 0x28, 0xec, 0x86, 0x40, 0x55, 0x33, 0x56, 0xda,
+++    0x88, 0xca, 0xee, 0xc8, 0x6a, 0x20, 0xb1, 0xe5, 0x3d, 0x57, 0xf8, 0x3c,
+++    0x10, 0x07, 0x2a, 0xc4, },
+++  { 0x0b, 0xae, 0xf1, 0xc4, 0x79, 0xee, 0x1b, 0x3d, 0x27, 0x35, 0x8d, 0x14,
+++    0xd6, 0xae, 0x4e, 0x3c, 0xe9, 0x53, 0x50, 0xb5, 0xcc, 0x0c, 0xf7, 0xdf,
+++    0xee, 0xa1, 0x74, 0xd6, 0x71, },
+++  { 0xe6, 0xa4, 0xf4, 0x99, 0x98, 0xb9, 0x80, 0xea, 0x96, 0x7f, 0x4f, 0x33,
+++    0xcf, 0x74, 0x25, 0x6f, 0x17, 0x6c, 0xbf, 0xf5, 0x5c, 0x38, 0xd0, 0xff,
+++    0x96, 0xcb, 0x13, 0xf9, 0xdf, 0xfd, },
+++  { 0xbe, 0x92, 0xeb, 0xba, 0x44, 0x2c, 0x24, 0x74, 0xd4, 0x03, 0x27, 0x3c,
+++    0x5d, 0x5b, 0x03, 0x30, 0x87, 0x63, 0x69, 0xe0, 0xb8, 0x94, 0xf4, 0x44,
+++    0x7e, 0xad, 0xcd, 0x20, 0x12, 0x16, 0x79, },
+++  { 0x30, 0xf1, 0xc4, 0x8e, 0x05, 0x90, 0x2a, 0x97, 0x63, 0x94, 0x46, 0xff,
+++    0xce, 0xd8, 0x67, 0xa7, 0xac, 0x33, 0x8c, 0x95, 0xb7, 0xcd, 0xa3, 0x23,
+++    0x98, 0x9d, 0x76, 0x6c, 0x9d, 0xa8, 0xd6, 0x8a, },
+++  { 0xbe, },
+++  { 0x17, 0x6c, },
+++  { 0x1a, 0x42, 0x4f, },
+++  { 0xba, 0xaf, 0xb7, 0x65, },
+++  { 0xc2, 0x63, 0x43, 0x6a, 0xea, },
+++  { 0xe4, 0x4d, 0xad, 0xf2, 0x0b, 0x02, },
+++  { 0x04, 0xc7, 0xc4, 0x7f, 0xa9, 0x2b, 0xce, },
+++  { 0x66, 0xf6, 0x67, 0xcb, 0x03, 0x53, 0xc8, 0xf1, },
+++  { 0x56, 0xa3, 0x60, 0x78, 0xc9, 0x5f, 0x70, 0x1b, 0x5e, },
+++  { 0x99, 0xff, 0x81, 0x7c, 0x13, 0x3c, 0x29, 0x79, 0x4b, 0x65, },
+++  { 0x51, 0x10, 0x50, 0x93, 0x01, 0x93, 0xb7, 0x01, 0xc9, 0x18, 0xb7, },
+++  { 0x8e, 0x3c, 0x42, 0x1e, 0x5e, 0x7d, 0xc1, 0x50, 0x70, 0x1f, 0x00, 0x98, },
+++  { 0x5f, 0xd9, 0x9b, 0xc8, 0xd7, 0xb2, 0x72, 0x62, 0x1a, 0x1e, 0xba, 0x92,
+++    0xe9, },
+++  { 0x70, 0x2b, 0xba, 0xfe, 0xad, 0x5d, 0x96, 0x3f, 0x27, 0xc2, 0x41, 0x6d,
+++    0xc4, 0xb3, },
+++  { 0xae, 0xe0, 0xd5, 0xd4, 0xc7, 0xae, 0x15, 0x5e, 0xdc, 0xdd, 0x33, 0x60,
+++    0xd7, 0xd3, 0x5e, },
+++  { 0x79, 0x8e, 0xbc, 0x9e, 0x20, 0xb9, 0x19, 0x4b, 0x63, 0x80, 0xf3, 0x16,
+++    0xaf, 0x39, 0xbd, 0x92, },
+++  { 0xc2, 0x0e, 0x85, 0xa0, 0x0b, 0x9a, 0xb0, 0xec, 0xde, 0x38, 0xd3, 0x10,
+++    0xd9, 0xa7, 0x66, 0x27, 0xcf, },
+++  { 0x0e, 0x3b, 0x75, 0x80, 0x67, 0x14, 0x0c, 0x02, 0x90, 0xd6, 0xb3, 0x02,
+++    0x81, 0xf6, 0xa6, 0x87, 0xce, 0x58, },
+++  { 0x79, 0xb5, 0xe9, 0x5d, 0x52, 0x4d, 0xf7, 0x59, 0xf4, 0x2e, 0x27, 0xdd,
+++    0xb3, 0xed, 0x57, 0x5b, 0x82, 0xea, 0x6f, },
+++  { 0xa2, 0x97, 0xf5, 0x80, 0x02, 0x3d, 0xde, 0xa3, 0xf9, 0xf6, 0xab, 0xe3,
+++    0x57, 0x63, 0x7b, 0x9b, 0x10, 0x42, 0x6f, 0xf2, },
+++  { 0x12, 0x7a, 0xfc, 0xb7, 0x67, 0x06, 0x0c, 0x78, 0x1a, 0xfe, 0x88, 0x4f,
+++    0xc6, 0xac, 0x52, 0x96, 0x64, 0x28, 0x97, 0x84, 0x06, },
+++  { 0xc5, 0x04, 0x44, 0x6b, 0xb2, 0xa5, 0xa4, 0x66, 0xe1, 0x76, 0xa2, 0x51,
+++    0xf9, 0x59, 0x69, 0x97, 0x56, 0x0b, 0xbf, 0x50, 0xb3, 0x34, },
+++  { 0x21, 0x32, 0x6b, 0x42, 0xb5, 0xed, 0x71, 0x8d, 0xf7, 0x5a, 0x35, 0xe3,
+++    0x90, 0xe2, 0xee, 0xaa, 0x89, 0xf6, 0xc9, 0x9c, 0x4d, 0x73, 0xf4, },
+++  { 0x4c, 0xa6, 0x09, 0xf4, 0x48, 0xe7, 0x46, 0xbc, 0x49, 0xfc, 0xe5, 0xda,
+++    0xd1, 0x87, 0x13, 0x17, 0x4c, 0x59, 0x71, 0x26, 0x5b, 0x2c, 0x42, 0xb7, },
+++  { 0x13, 0x63, 0xf3, 0x40, 0x02, 0xe5, 0xa3, 0x3a, 0x5e, 0x8e, 0xf8, 0xb6,
+++    0x8a, 0x49, 0x60, 0x76, 0x34, 0x72, 0x94, 0x73, 0xf6, 0xd9, 0x21, 0x6a,
+++    0x26, },
+++  { 0xdf, 0x75, 0x16, 0x10, 0x1b, 0x5e, 0x81, 0xc3, 0xc8, 0xde, 0x34, 0x24,
+++    0xb0, 0x98, 0xeb, 0x1b, 0x8f, 0xa1, 0x9b, 0x05, 0xee, 0xa5, 0xe9, 0x35,
+++    0xf4, 0x1d, },
+++  { 0xcd, 0x21, 0x93, 0x6e, 0x5b, 0xa0, 0x26, 0x2b, 0x21, 0x0e, 0xa0, 0xb9,
+++    0x1c, 0xb5, 0xbb, 0xb8, 0xf8, 0x1e, 0xff, 0x5c, 0xa8, 0xf9, 0x39, 0x46,
+++    0x4e, 0x29, 0x26, },
+++  { 0x73, 0x7f, 0x0e, 0x3b, 0x0b, 0x5c, 0xf9, 0x60, 0xaa, 0x88, 0xa1, 0x09,
+++    0xb1, 0x5d, 0x38, 0x7b, 0x86, 0x8f, 0x13, 0x7a, 0x8d, 0x72, 0x7a, 0x98,
+++    0x1a, 0x5b, 0xff, 0xc9, },
+++  { 0xd3, 0x3c, 0x61, 0x71, 0x44, 0x7e, 0x31, 0x74, 0x98, 0x9d, 0x9a, 0xd2,
+++    0x27, 0xf3, 0x46, 0x43, 0x42, 0x51, 0xd0, 0x5f, 0xe9, 0x1c, 0x5c, 0x69,
+++    0xbf, 0xf6, 0xbe, 0x3c, 0x40, },
+++  { 0x31, 0x99, 0x31, 0x9f, 0xaa, 0x43, 0x2e, 0x77, 0x3e, 0x74, 0x26, 0x31,
+++    0x5e, 0x61, 0xf1, 0x87, 0xe2, 0xeb, 0x9b, 0xcd, 0xd0, 0x3a, 0xee, 0x20,
+++    0x7e, 0x10, 0x0a, 0x0b, 0x7e, 0xfa, },
+++  { 0xa4, 0x27, 0x80, 0x67, 0x81, 0x2a, 0xa7, 0x62, 0xf7, 0x6e, 0xda, 0xd4,
+++    0x5c, 0x39, 0x74, 0xad, 0x7e, 0xbe, 0xad, 0xa5, 0x84, 0x7f, 0xa9, 0x30,
+++    0x5d, 0xdb, 0xe2, 0x05, 0x43, 0xf7, 0x1b, },
+++  { 0x0b, 0x37, 0xd8, 0x02, 0xe1, 0x83, 0xd6, 0x80, 0xf2, 0x35, 0xc2, 0xb0,
+++    0x37, 0xef, 0xef, 0x5e, 0x43, 0x93, 0xf0, 0x49, 0x45, 0x0a, 0xef, 0xb5,
+++    0x76, 0x70, 0x12, 0x44, 0xc4, 0xdb, 0xf5, 0x7a, },
+++  { 0x1f, },
+++  { 0x82, 0x60, },
+++  { 0xcc, 0xe3, 0x08, },
+++  { 0x56, 0x17, 0xe4, 0x59, },
+++  { 0xe2, 0xd7, 0x9e, 0xc4, 0x4c, },
+++  { 0xb2, 0xad, 0xd3, 0x78, 0x58, 0x5a, },
+++  { 0xce, 0x43, 0xb4, 0x02, 0x96, 0xab, 0x3c, },
+++  { 0xe6, 0x05, 0x1a, 0x73, 0x22, 0x32, 0xbb, 0x77, },
+++  { 0x23, 0xe7, 0xda, 0xfe, 0x2c, 0xef, 0x8c, 0x22, 0xec, },
+++  { 0xe9, 0x8e, 0x55, 0x38, 0xd1, 0xd7, 0x35, 0x23, 0x98, 0xc7, },
+++  { 0xb5, 0x81, 0x1a, 0xe5, 0xb5, 0xa5, 0xd9, 0x4d, 0xca, 0x41, 0xe7, },
+++  { 0x41, 0x16, 0x16, 0x95, 0x8d, 0x9e, 0x0c, 0xea, 0x8c, 0x71, 0x9a, 0xc1, },
+++  { 0x7c, 0x33, 0xc0, 0xa4, 0x00, 0x62, 0xea, 0x60, 0x67, 0xe4, 0x20, 0xbc,
+++    0x5b, },
+++  { 0xdb, 0xb1, 0xdc, 0xfd, 0x08, 0xc0, 0xde, 0x82, 0xd1, 0xde, 0x38, 0xc0,
+++    0x90, 0x48, },
+++  { 0x37, 0x18, 0x2e, 0x0d, 0x61, 0xaa, 0x61, 0xd7, 0x86, 0x20, 0x16, 0x60,
+++    0x04, 0xd9, 0xd5, },
+++  { 0xb0, 0xcf, 0x2c, 0x4c, 0x5e, 0x5b, 0x4f, 0x2a, 0x23, 0x25, 0x58, 0x47,
+++    0xe5, 0x31, 0x06, 0x70, },
+++  { 0x91, 0xa0, 0xa3, 0x86, 0x4e, 0xe0, 0x72, 0x38, 0x06, 0x67, 0x59, 0x5c,
+++    0x70, 0x25, 0xdb, 0x33, 0x27, },
+++  { 0x44, 0x58, 0x66, 0xb8, 0x58, 0xc7, 0x13, 0xed, 0x4c, 0xc0, 0xf4, 0x9a,
+++    0x1e, 0x67, 0x75, 0x33, 0xb6, 0xb8, },
+++  { 0x7f, 0x98, 0x4a, 0x8e, 0x50, 0xa2, 0x5c, 0xcd, 0x59, 0xde, 0x72, 0xb3,
+++    0x9d, 0xc3, 0x09, 0x8a, 0xab, 0x56, 0xf1, },
+++  { 0x80, 0x96, 0x49, 0x1a, 0x59, 0xa2, 0xc5, 0xd5, 0xa7, 0x20, 0x8a, 0xb7,
+++    0x27, 0x62, 0x84, 0x43, 0xc6, 0xe1, 0x1b, 0x5d, },
+++  { 0x6b, 0xb7, 0x2b, 0x26, 0x62, 0x14, 0x70, 0x19, 0x3d, 0x4d, 0xac, 0xac,
+++    0x63, 0x58, 0x5e, 0x94, 0xb5, 0xb7, 0xe8, 0xe8, 0xa2, },
+++  { 0x20, 0xa8, 0xc0, 0xfd, 0x63, 0x3d, 0x6e, 0x98, 0xcf, 0x0c, 0x49, 0x98,
+++    0xe4, 0x5a, 0xfe, 0x8c, 0xaa, 0x70, 0x82, 0x1c, 0x7b, 0x74, },
+++  { 0xc8, 0xe8, 0xdd, 0xdf, 0x69, 0x30, 0x01, 0xc2, 0x0f, 0x7e, 0x2f, 0x11,
+++    0xcc, 0x3e, 0x17, 0xa5, 0x69, 0x40, 0x3f, 0x0e, 0x79, 0x7f, 0xcf, },
+++  { 0xdb, 0x61, 0xc0, 0xe2, 0x2e, 0x49, 0x07, 0x31, 0x1d, 0x91, 0x42, 0x8a,
+++    0xfc, 0x5e, 0xd3, 0xf8, 0x56, 0x1f, 0x2b, 0x73, 0xfd, 0x9f, 0xb2, 0x8e, },
+++  { 0x0c, 0x89, 0x55, 0x0c, 0x1f, 0x59, 0x2c, 0x9d, 0x1b, 0x29, 0x1d, 0x41,
+++    0x1d, 0xe6, 0x47, 0x8f, 0x8c, 0x2b, 0xea, 0x8f, 0xf0, 0xff, 0x21, 0x70,
+++    0x88, },
+++  { 0x12, 0x18, 0x95, 0xa6, 0x59, 0xb1, 0x31, 0x24, 0x45, 0x67, 0x55, 0xa4,
+++    0x1a, 0x2d, 0x48, 0x67, 0x1b, 0x43, 0x88, 0x2d, 0x8e, 0xa0, 0x70, 0xb3,
+++    0xc6, 0xbb, },
+++  { 0xe7, 0xb1, 0x1d, 0xb2, 0x76, 0x4d, 0x68, 0x68, 0x68, 0x23, 0x02, 0x55,
+++    0x3a, 0xe2, 0xe5, 0xd5, 0x4b, 0x43, 0xf9, 0x34, 0x77, 0x5c, 0xa1, 0xf5,
+++    0x55, 0xfd, 0x4f, },
+++  { 0x8c, 0x87, 0x5a, 0x08, 0x3a, 0x73, 0xad, 0x61, 0xe1, 0xe7, 0x99, 0x7e,
+++    0xf0, 0x5d, 0xe9, 0x5d, 0x16, 0x43, 0x80, 0x2f, 0xd0, 0x66, 0x34, 0xe2,
+++    0x42, 0x64, 0x3b, 0x1a, },
+++  { 0x39, 0xc1, 0x99, 0xcf, 0x22, 0xbf, 0x16, 0x8f, 0x9f, 0x80, 0x7f, 0x95,
+++    0x0a, 0x05, 0x67, 0x27, 0xe7, 0x15, 0xdf, 0x9d, 0xb2, 0xfe, 0x1c, 0xb5,
+++    0x1d, 0x60, 0x8f, 0x8a, 0x1d, },
+++  { 0x9b, 0x6e, 0x08, 0x09, 0x06, 0x73, 0xab, 0x68, 0x02, 0x62, 0x1a, 0xe4,
+++    0xd4, 0xdf, 0xc7, 0x02, 0x4c, 0x6a, 0x5f, 0xfd, 0x23, 0xac, 0xae, 0x6d,
+++    0x43, 0xa4, 0x7a, 0x50, 0x60, 0x3c, },
+++  { 0x1d, 0xb4, 0xc6, 0xe1, 0xb1, 0x4b, 0xe3, 0xf2, 0xe2, 0x1a, 0x73, 0x1b,
+++    0xa0, 0x92, 0xa7, 0xf5, 0xff, 0x8f, 0x8b, 0x5d, 0xdf, 0xa8, 0x04, 0xb3,
+++    0xb0, 0xf7, 0xcc, 0x12, 0xfa, 0x35, 0x46, },
+++  { 0x49, 0x45, 0x97, 0x11, 0x0f, 0x1c, 0x60, 0x8e, 0xe8, 0x47, 0x30, 0xcf,
+++    0x60, 0xa8, 0x71, 0xc5, 0x1b, 0xe9, 0x39, 0x4d, 0x49, 0xb6, 0x12, 0x1f,
+++    0x24, 0xab, 0x37, 0xff, 0x83, 0xc2, 0xe1, 0x3a, },
+++  { 0x60, },
+++  { 0x24, 0x26, },
+++  { 0x47, 0xeb, 0xc9, },
+++  { 0x4a, 0xd0, 0xbc, 0xf0, },
+++  { 0x8e, 0x2b, 0xc9, 0x85, 0x3c, },
+++  { 0xa2, 0x07, 0x15, 0xb8, 0x12, 0x74, },
+++  { 0x0f, 0xdb, 0x5b, 0x33, 0x69, 0xfe, 0x4b, },
+++  { 0xa2, 0x86, 0x54, 0xf4, 0xfd, 0xb2, 0xd4, 0xe6, },
+++  { 0xbb, 0x84, 0x78, 0x49, 0x27, 0x8e, 0x61, 0xda, 0x60, },
+++  { 0x04, 0xc3, 0xcd, 0xaa, 0x8f, 0xa7, 0x03, 0xc9, 0xf9, 0xb6, },
+++  { 0xf8, 0x27, 0x1d, 0x61, 0xdc, 0x21, 0x42, 0xdd, 0xad, 0x92, 0x40, },
+++  { 0x12, 0x87, 0xdf, 0xc2, 0x41, 0x45, 0x5a, 0x36, 0x48, 0x5b, 0x51, 0x2b, },
+++  { 0xbb, 0x37, 0x5d, 0x1f, 0xf1, 0x68, 0x7a, 0xc4, 0xa5, 0xd2, 0xa4, 0x91,
+++    0x8d, },
+++  { 0x5b, 0x27, 0xd1, 0x04, 0x54, 0x52, 0x9f, 0xa3, 0x47, 0x86, 0x33, 0x33,
+++    0xbf, 0xa0, },
+++  { 0xcf, 0x04, 0xea, 0xf8, 0x03, 0x2a, 0x43, 0xff, 0xa6, 0x68, 0x21, 0x4c,
+++    0xd5, 0x4b, 0xed, },
+++  { 0xaf, 0xb8, 0xbc, 0x63, 0x0f, 0x18, 0x4d, 0xe2, 0x7a, 0xdd, 0x46, 0x44,
+++    0xc8, 0x24, 0x0a, 0xb7, },
+++  { 0x3e, 0xdc, 0x36, 0xe4, 0x89, 0xb1, 0xfa, 0xc6, 0x40, 0x93, 0x2e, 0x75,
+++    0xb2, 0x15, 0xd1, 0xb1, 0x10, },
+++  { 0x6c, 0xd8, 0x20, 0x3b, 0x82, 0x79, 0xf9, 0xc8, 0xbc, 0x9d, 0xe0, 0x35,
+++    0xbe, 0x1b, 0x49, 0x1a, 0xbc, 0x3a, },
+++  { 0x78, 0x65, 0x2c, 0xbe, 0x35, 0x67, 0xdc, 0x78, 0xd4, 0x41, 0xf6, 0xc9,
+++    0xde, 0xde, 0x1f, 0x18, 0x13, 0x31, 0x11, },
+++  { 0x8a, 0x7f, 0xb1, 0x33, 0x8f, 0x0c, 0x3c, 0x0a, 0x06, 0x61, 0xf0, 0x47,
+++    0x29, 0x1b, 0x29, 0xbc, 0x1c, 0x47, 0xef, 0x7a, },
+++  { 0x65, 0x91, 0xf1, 0xe6, 0xb3, 0x96, 0xd3, 0x8c, 0xc2, 0x4a, 0x59, 0x35,
+++    0x72, 0x8e, 0x0b, 0x9a, 0x87, 0xca, 0x34, 0x7b, 0x63, },
+++  { 0x5f, 0x08, 0x87, 0x80, 0x56, 0x25, 0x89, 0x77, 0x61, 0x8c, 0x64, 0xa1,
+++    0x59, 0x6d, 0x59, 0x62, 0xe8, 0x4a, 0xc8, 0x58, 0x99, 0xd1, },
+++  { 0x23, 0x87, 0x1d, 0xed, 0x6f, 0xf2, 0x91, 0x90, 0xe2, 0xfe, 0x43, 0x21,
+++    0xaf, 0x97, 0xc6, 0xbc, 0xd7, 0x15, 0xc7, 0x2d, 0x08, 0x77, 0x91, },
+++  { 0x90, 0x47, 0x9a, 0x9e, 0x3a, 0xdf, 0xf3, 0xc9, 0x4c, 0x1e, 0xa7, 0xd4,
+++    0x6a, 0x32, 0x90, 0xfe, 0xb7, 0xb6, 0x7b, 0xfa, 0x96, 0x61, 0xfb, 0xa4, },
+++  { 0xb1, 0x67, 0x60, 0x45, 0xb0, 0x96, 0xc5, 0x15, 0x9f, 0x4d, 0x26, 0xd7,
+++    0x9d, 0xf1, 0xf5, 0x6d, 0x21, 0x00, 0x94, 0x31, 0x64, 0x94, 0xd3, 0xa7,
+++    0xd3, },
+++  { 0x02, 0x3e, 0xaf, 0xf3, 0x79, 0x73, 0xa5, 0xf5, 0xcc, 0x7a, 0x7f, 0xfb,
+++    0x79, 0x2b, 0x85, 0x8c, 0x88, 0x72, 0x06, 0xbe, 0xfe, 0xaf, 0xc1, 0x16,
+++    0xa6, 0xd6, },
+++  { 0x2a, 0xb0, 0x1a, 0xe5, 0xaa, 0x6e, 0xb3, 0xae, 0x53, 0x85, 0x33, 0x80,
+++    0x75, 0xae, 0x30, 0xe6, 0xb8, 0x72, 0x42, 0xf6, 0x25, 0x4f, 0x38, 0x88,
+++    0x55, 0xd1, 0xa9, },
+++  { 0x90, 0xd8, 0x0c, 0xc0, 0x93, 0x4b, 0x4f, 0x9e, 0x65, 0x6c, 0xa1, 0x54,
+++    0xa6, 0xf6, 0x6e, 0xca, 0xd2, 0xbb, 0x7e, 0x6a, 0x1c, 0xd3, 0xce, 0x46,
+++    0xef, 0xb0, 0x00, 0x8d, },
+++  { 0xed, 0x9c, 0x49, 0xcd, 0xc2, 0xde, 0x38, 0x0e, 0xe9, 0x98, 0x6c, 0xc8,
+++    0x90, 0x9e, 0x3c, 0xd4, 0xd3, 0xeb, 0x88, 0x32, 0xc7, 0x28, 0xe3, 0x94,
+++    0x1c, 0x9f, 0x8b, 0xf3, 0xcb, },
+++  { 0xac, 0xe7, 0x92, 0x16, 0xb4, 0x14, 0xa0, 0xe4, 0x04, 0x79, 0xa2, 0xf4,
+++    0x31, 0xe6, 0x0c, 0x26, 0xdc, 0xbf, 0x2f, 0x69, 0x1b, 0x55, 0x94, 0x67,
+++    0xda, 0x0c, 0xd7, 0x32, 0x1f, 0xef, },
+++  { 0x68, 0x63, 0x85, 0x57, 0x95, 0x9e, 0x42, 0x27, 0x41, 0x43, 0x42, 0x02,
+++    0xa5, 0x78, 0xa7, 0xc6, 0x43, 0xc1, 0x6a, 0xba, 0x70, 0x80, 0xcd, 0x04,
+++    0xb6, 0x78, 0x76, 0x29, 0xf3, 0xe8, 0xa0, },
+++  { 0xe6, 0xac, 0x8d, 0x9d, 0xf0, 0xc0, 0xf7, 0xf7, 0xe3, 0x3e, 0x4e, 0x28,
+++    0x0f, 0x59, 0xb2, 0x67, 0x9e, 0x84, 0x34, 0x42, 0x96, 0x30, 0x2b, 0xca,
+++    0x49, 0xb6, 0xc5, 0x9a, 0x84, 0x59, 0xa7, 0x81, },
+++  { 0x7e, },
+++  { 0x1e, 0x21, },
+++  { 0x26, 0xd3, 0xdd, },
+++  { 0x2c, 0xd4, 0xb3, 0x3d, },
+++  { 0x86, 0x7b, 0x76, 0x3c, 0xf0, },
+++  { 0x12, 0xc3, 0x70, 0x1d, 0x55, 0x18, },
+++  { 0x96, 0xc2, 0xbd, 0x61, 0x55, 0xf4, 0x24, },
+++  { 0x20, 0x51, 0xf7, 0x86, 0x58, 0x8f, 0x07, 0x2a, },
+++  { 0x93, 0x15, 0xa8, 0x1d, 0xda, 0x97, 0xee, 0x0e, 0x6c, },
+++  { 0x39, 0x93, 0xdf, 0xd5, 0x0e, 0xca, 0xdc, 0x7a, 0x92, 0xce, },
+++  { 0x60, 0xd5, 0xfd, 0xf5, 0x1b, 0x26, 0x82, 0x26, 0x73, 0x02, 0xbc, },
+++  { 0x98, 0xf2, 0x34, 0xe1, 0xf5, 0xfb, 0x00, 0xac, 0x10, 0x4a, 0x38, 0x9f, },
+++  { 0xda, 0x3a, 0x92, 0x8a, 0xd0, 0xcd, 0x12, 0xcd, 0x15, 0xbb, 0xab, 0x77,
+++    0x66, },
+++  { 0xa2, 0x92, 0x1a, 0xe5, 0xca, 0x0c, 0x30, 0x75, 0xeb, 0xaf, 0x00, 0x31,
+++    0x55, 0x66, },
+++  { 0x06, 0xea, 0xfd, 0x3e, 0x86, 0x38, 0x62, 0x4e, 0xa9, 0x12, 0xa4, 0x12,
+++    0x43, 0xbf, 0xa1, },
+++  { 0xe4, 0x71, 0x7b, 0x94, 0xdb, 0xa0, 0xd2, 0xff, 0x9b, 0xeb, 0xad, 0x8e,
+++    0x95, 0x8a, 0xc5, 0xed, },
+++  { 0x25, 0x5a, 0x77, 0x71, 0x41, 0x0e, 0x7a, 0xe9, 0xed, 0x0c, 0x10, 0xef,
+++    0xf6, 0x2b, 0x3a, 0xba, 0x60, },
+++  { 0xee, 0xe2, 0xa3, 0x67, 0x64, 0x1d, 0xc6, 0x04, 0xc4, 0xe1, 0x68, 0xd2,
+++    0x6e, 0xd2, 0x91, 0x75, 0x53, 0x07, },
+++  { 0xe0, 0xf6, 0x4d, 0x8f, 0x68, 0xfc, 0x06, 0x7e, 0x18, 0x79, 0x7f, 0x2b,
+++    0x6d, 0xef, 0x46, 0x7f, 0xab, 0xb2, 0xad, },
+++  { 0x3d, 0x35, 0x88, 0x9f, 0x2e, 0xcf, 0x96, 0x45, 0x07, 0x60, 0x71, 0x94,
+++    0x00, 0x8d, 0xbf, 0xf4, 0xef, 0x46, 0x2e, 0x3c, },
+++  { 0x43, 0xcf, 0x98, 0xf7, 0x2d, 0xf4, 0x17, 0xe7, 0x8c, 0x05, 0x2d, 0x9b,
+++    0x24, 0xfb, 0x4d, 0xea, 0x4a, 0xec, 0x01, 0x25, 0x29, },
+++  { 0x8e, 0x73, 0x9a, 0x78, 0x11, 0xfe, 0x48, 0xa0, 0x3b, 0x1a, 0x26, 0xdf,
+++    0x25, 0xe9, 0x59, 0x1c, 0x70, 0x07, 0x9f, 0xdc, 0xa0, 0xa6, },
+++  { 0xe8, 0x47, 0x71, 0xc7, 0x3e, 0xdf, 0xb5, 0x13, 0xb9, 0x85, 0x13, 0xa8,
+++    0x54, 0x47, 0x6e, 0x59, 0x96, 0x09, 0x13, 0x5f, 0x82, 0x16, 0x0b, },
+++  { 0xfb, 0xc0, 0x8c, 0x03, 0x21, 0xb3, 0xc4, 0xb5, 0x43, 0x32, 0x6c, 0xea,
+++    0x7f, 0xa8, 0x43, 0x91, 0xe8, 0x4e, 0x3f, 0xbf, 0x45, 0x58, 0x6a, 0xa3, },
+++  { 0x55, 0xf8, 0xf3, 0x00, 0x76, 0x09, 0xef, 0x69, 0x5d, 0xd2, 0x8a, 0xf2,
+++    0x65, 0xc3, 0xcb, 0x9b, 0x43, 0xfd, 0xb1, 0x7e, 0x7f, 0xa1, 0x94, 0xb0,
+++    0xd7, },
+++  { 0xaa, 0x13, 0xc1, 0x51, 0x40, 0x6d, 0x8d, 0x4c, 0x0a, 0x95, 0x64, 0x7b,
+++    0xd1, 0x96, 0xb6, 0x56, 0xb4, 0x5b, 0xcf, 0xd6, 0xd9, 0x15, 0x97, 0xdd,
+++    0xb6, 0xef, },
+++  { 0xaf, 0xb7, 0x36, 0xb0, 0x04, 0xdb, 0xd7, 0x9c, 0x9a, 0x44, 0xc4, 0xf6,
+++    0x1f, 0x12, 0x21, 0x2d, 0x59, 0x30, 0x54, 0xab, 0x27, 0x61, 0xa3, 0x57,
+++    0xef, 0xf8, 0x53, },
+++  { 0x97, 0x34, 0x45, 0x3e, 0xce, 0x7c, 0x35, 0xa2, 0xda, 0x9f, 0x4b, 0x46,
+++    0x6c, 0x11, 0x67, 0xff, 0x2f, 0x76, 0x58, 0x15, 0x71, 0xfa, 0x44, 0x89,
+++    0x89, 0xfd, 0xf7, 0x99, },
+++  { 0x1f, 0xb1, 0x62, 0xeb, 0x83, 0xc5, 0x9c, 0x89, 0xf9, 0x2c, 0xd2, 0x03,
+++    0x61, 0xbc, 0xbb, 0xa5, 0x74, 0x0e, 0x9b, 0x7e, 0x82, 0x3e, 0x70, 0x0a,
+++    0xa9, 0x8f, 0x2b, 0x59, 0xfb, },
+++  { 0xf8, 0xca, 0x5e, 0x3a, 0x4f, 0x9e, 0x10, 0x69, 0x10, 0xd5, 0x4c, 0xeb,
+++    0x1a, 0x0f, 0x3c, 0x6a, 0x98, 0xf5, 0xb0, 0x97, 0x5b, 0x37, 0x2f, 0x0d,
+++    0xbd, 0x42, 0x4b, 0x69, 0xa1, 0x82, },
+++  { 0x12, 0x8c, 0x6d, 0x52, 0x08, 0xef, 0x74, 0xb2, 0xe6, 0xaa, 0xd3, 0xb0,
+++    0x26, 0xb0, 0xd9, 0x94, 0xb6, 0x11, 0x45, 0x0e, 0x36, 0x71, 0x14, 0x2d,
+++    0x41, 0x8c, 0x21, 0x53, 0x31, 0xe9, 0x68, },
+++  { 0xee, 0xea, 0x0d, 0x89, 0x47, 0x7e, 0x72, 0xd1, 0xd8, 0xce, 0x58, 0x4c,
+++    0x94, 0x1f, 0x0d, 0x51, 0x08, 0xa3, 0xb6, 0x3d, 0xe7, 0x82, 0x46, 0x92,
+++    0xd6, 0x98, 0x6b, 0x07, 0x10, 0x65, 0x52, 0x65, },
+++};
+++
+++static const u8 blake2s_hmac_testvecs[][BLAKE2S_HASH_SIZE] __initconst = {
+++  { 0xce, 0xe1, 0x57, 0x69, 0x82, 0xdc, 0xbf, 0x43, 0xad, 0x56, 0x4c, 0x70,
+++    0xed, 0x68, 0x16, 0x96, 0xcf, 0xa4, 0x73, 0xe8, 0xe8, 0xfc, 0x32, 0x79,
+++    0x08, 0x0a, 0x75, 0x82, 0xda, 0x3f, 0x05, 0x11, },
+++  { 0x77, 0x2f, 0x0c, 0x71, 0x41, 0xf4, 0x4b, 0x2b, 0xb3, 0xc6, 0xb6, 0xf9,
+++    0x60, 0xde, 0xe4, 0x52, 0x38, 0x66, 0xe8, 0xbf, 0x9b, 0x96, 0xc4, 0x9f,
+++    0x60, 0xd9, 0x24, 0x37, 0x99, 0xd6, 0xec, 0x31, },
+++};
+++
+++bool __init blake2s_selftest(void)
+++{
+++	u8 key[BLAKE2S_KEY_SIZE];
+++	u8 buf[ARRAY_SIZE(blake2s_testvecs)];
+++	u8 hash[BLAKE2S_HASH_SIZE];
+++	struct blake2s_state state;
+++	bool success = true;
+++	int i, l;
+++
+++	key[0] = key[1] = 1;
+++	for (i = 2; i < sizeof(key); ++i)
+++		key[i] = key[i - 2] + key[i - 1];
+++
+++	for (i = 0; i < sizeof(buf); ++i)
+++		buf[i] = (u8)i;
+++
+++	for (i = l = 0; i < ARRAY_SIZE(blake2s_testvecs); l = (l + 37) % ++i) {
+++		int outlen = 1 + i % BLAKE2S_HASH_SIZE;
+++		int keylen = (13 * i) % (BLAKE2S_KEY_SIZE + 1);
+++
+++		blake2s(hash, buf, key + BLAKE2S_KEY_SIZE - keylen, outlen, i,
+++			keylen);
+++		if (memcmp(hash, blake2s_testvecs[i], outlen)) {
+++			pr_err("blake2s self-test %d: FAIL\n", i + 1);
+++			success = false;
+++		}
+++
+++		if (!keylen)
+++			blake2s_init(&state, outlen);
+++		else
+++			blake2s_init_key(&state, outlen,
+++					 key + BLAKE2S_KEY_SIZE - keylen,
+++					 keylen);
+++
+++		blake2s_update(&state, buf, l);
+++		blake2s_update(&state, buf + l, i - l);
+++		blake2s_final(&state, hash);
+++		if (memcmp(hash, blake2s_testvecs[i], outlen)) {
+++			pr_err("blake2s init/update/final self-test %d: FAIL\n",
+++			       i + 1);
+++			success = false;
+++		}
+++	}
+++
+++	if (success) {
+++		blake2s256_hmac(hash, buf, key, sizeof(buf), sizeof(key));
+++		success &= !memcmp(hash, blake2s_hmac_testvecs[0], BLAKE2S_HASH_SIZE);
+++
+++		blake2s256_hmac(hash, key, buf, sizeof(key), sizeof(buf));
+++		success &= !memcmp(hash, blake2s_hmac_testvecs[1], BLAKE2S_HASH_SIZE);
+++
+++		if (!success)
+++			pr_err("blake2s256_hmac self-test: FAIL\n");
+++	}
+++
+++	return success;
+++}
++--- /dev/null
+++++ b/lib/crypto/blake2s.c
++@@ -0,0 +1,126 @@
+++// SPDX-License-Identifier: GPL-2.0 OR MIT
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ *
+++ * This is an implementation of the BLAKE2s hash and PRF functions.
+++ *
+++ * Information: https://blake2.net/
+++ *
+++ */
+++
+++#include <crypto/internal/blake2s.h>
+++#include <linux/types.h>
+++#include <linux/string.h>
+++#include <linux/kernel.h>
+++#include <linux/module.h>
+++#include <linux/init.h>
+++#include <linux/bug.h>
+++#include <asm/unaligned.h>
+++
+++bool blake2s_selftest(void);
+++
+++void blake2s_update(struct blake2s_state *state, const u8 *in, size_t inlen)
+++{
+++	const size_t fill = BLAKE2S_BLOCK_SIZE - state->buflen;
+++
+++	if (unlikely(!inlen))
+++		return;
+++	if (inlen > fill) {
+++		memcpy(state->buf + state->buflen, in, fill);
+++		if (IS_ENABLED(CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S))
+++			blake2s_compress_arch(state, state->buf, 1,
+++					      BLAKE2S_BLOCK_SIZE);
+++		else
+++			blake2s_compress_generic(state, state->buf, 1,
+++						 BLAKE2S_BLOCK_SIZE);
+++		state->buflen = 0;
+++		in += fill;
+++		inlen -= fill;
+++	}
+++	if (inlen > BLAKE2S_BLOCK_SIZE) {
+++		const size_t nblocks = DIV_ROUND_UP(inlen, BLAKE2S_BLOCK_SIZE);
+++		/* Hash one less (full) block than strictly possible */
+++		if (IS_ENABLED(CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S))
+++			blake2s_compress_arch(state, in, nblocks - 1,
+++					      BLAKE2S_BLOCK_SIZE);
+++		else
+++			blake2s_compress_generic(state, in, nblocks - 1,
+++						 BLAKE2S_BLOCK_SIZE);
+++		in += BLAKE2S_BLOCK_SIZE * (nblocks - 1);
+++		inlen -= BLAKE2S_BLOCK_SIZE * (nblocks - 1);
+++	}
+++	memcpy(state->buf + state->buflen, in, inlen);
+++	state->buflen += inlen;
+++}
+++EXPORT_SYMBOL(blake2s_update);
+++
+++void blake2s_final(struct blake2s_state *state, u8 *out)
+++{
+++	WARN_ON(IS_ENABLED(DEBUG) && !out);
+++	blake2s_set_lastblock(state);
+++	memset(state->buf + state->buflen, 0,
+++	       BLAKE2S_BLOCK_SIZE - state->buflen); /* Padding */
+++	if (IS_ENABLED(CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S))
+++		blake2s_compress_arch(state, state->buf, 1, state->buflen);
+++	else
+++		blake2s_compress_generic(state, state->buf, 1, state->buflen);
+++	cpu_to_le32_array(state->h, ARRAY_SIZE(state->h));
+++	memcpy(out, state->h, state->outlen);
+++	memzero_explicit(state, sizeof(*state));
+++}
+++EXPORT_SYMBOL(blake2s_final);
+++
+++void blake2s256_hmac(u8 *out, const u8 *in, const u8 *key, const size_t inlen,
+++		     const size_t keylen)
+++{
+++	struct blake2s_state state;
+++	u8 x_key[BLAKE2S_BLOCK_SIZE] __aligned(__alignof__(u32)) = { 0 };
+++	u8 i_hash[BLAKE2S_HASH_SIZE] __aligned(__alignof__(u32));
+++	int i;
+++
+++	if (keylen > BLAKE2S_BLOCK_SIZE) {
+++		blake2s_init(&state, BLAKE2S_HASH_SIZE);
+++		blake2s_update(&state, key, keylen);
+++		blake2s_final(&state, x_key);
+++	} else
+++		memcpy(x_key, key, keylen);
+++
+++	for (i = 0; i < BLAKE2S_BLOCK_SIZE; ++i)
+++		x_key[i] ^= 0x36;
+++
+++	blake2s_init(&state, BLAKE2S_HASH_SIZE);
+++	blake2s_update(&state, x_key, BLAKE2S_BLOCK_SIZE);
+++	blake2s_update(&state, in, inlen);
+++	blake2s_final(&state, i_hash);
+++
+++	for (i = 0; i < BLAKE2S_BLOCK_SIZE; ++i)
+++		x_key[i] ^= 0x5c ^ 0x36;
+++
+++	blake2s_init(&state, BLAKE2S_HASH_SIZE);
+++	blake2s_update(&state, x_key, BLAKE2S_BLOCK_SIZE);
+++	blake2s_update(&state, i_hash, BLAKE2S_HASH_SIZE);
+++	blake2s_final(&state, i_hash);
+++
+++	memcpy(out, i_hash, BLAKE2S_HASH_SIZE);
+++	memzero_explicit(x_key, BLAKE2S_BLOCK_SIZE);
+++	memzero_explicit(i_hash, BLAKE2S_HASH_SIZE);
+++}
+++EXPORT_SYMBOL(blake2s256_hmac);
+++
+++static int __init mod_init(void)
+++{
+++	if (!IS_ENABLED(CONFIG_CRYPTO_MANAGER_DISABLE_TESTS) &&
+++	    WARN_ON(!blake2s_selftest()))
+++		return -ENODEV;
+++	return 0;
+++}
+++
+++static void __exit mod_exit(void)
+++{
+++}
+++
+++module_init(mod_init);
+++module_exit(mod_exit);
+++MODULE_LICENSE("GPL v2");
+++MODULE_DESCRIPTION("BLAKE2s hash function");
+++MODULE_AUTHOR("Jason A. Donenfeld <Jason@zx2c4.com>");
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0022-crypto-testmgr-add-test-cases-for-Blake2s.patch b/target/linux/generic/backport-5.4/080-wireguard-0022-crypto-testmgr-add-test-cases-for-Blake2s.patch
+new file mode 100644
+index 0000000000..9adc75eb98
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0022-crypto-testmgr-add-test-cases-for-Blake2s.patch
+@@ -0,0 +1,322 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:29 +0100
++Subject: [PATCH] crypto: testmgr - add test cases for Blake2s
++
++commit 17e1df67023a5c9ccaeb5de8bf5b88f63127ecf7 upstream.
++
++As suggested by Eric for the Blake2b implementation contributed by
++David, introduce a set of test vectors for Blake2s covering different
++digest and key sizes.
++
++          blake2s-128  blake2s-160  blake2s-224  blake2s-256
++         ---------------------------------------------------
++len=0   | klen=0       klen=1       klen=16      klen=32
++len=1   | klen=16      klen=32      klen=0       klen=1
++len=7   | klen=32      klen=0       klen=1       klen=16
++len=15  | klen=1       klen=16      klen=32      klen=0
++len=64  | klen=0       klen=1       klen=16      klen=32
++len=247 | klen=16      klen=32      klen=0       klen=1
++len=256 | klen=32      klen=0       klen=1       klen=16
++
++Cc: David Sterba <dsterba@suse.com>
++Cc: Eric Biggers <ebiggers@google.com>
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ crypto/testmgr.c |  24 +++++
++ crypto/testmgr.h | 251 +++++++++++++++++++++++++++++++++++++++++++++++
++ 2 files changed, 275 insertions(+)
++
++--- a/crypto/testmgr.c
+++++ b/crypto/testmgr.c
++@@ -4035,6 +4035,30 @@ static const struct alg_test_desc alg_te
++ 		.test = alg_test_null,
++ 		.fips_allowed = 1,
++ 	}, {
+++		.alg = "blake2s-128",
+++		.test = alg_test_hash,
+++		.suite = {
+++			.hash = __VECS(blakes2s_128_tv_template)
+++		}
+++	}, {
+++		.alg = "blake2s-160",
+++		.test = alg_test_hash,
+++		.suite = {
+++			.hash = __VECS(blakes2s_160_tv_template)
+++		}
+++	}, {
+++		.alg = "blake2s-224",
+++		.test = alg_test_hash,
+++		.suite = {
+++			.hash = __VECS(blakes2s_224_tv_template)
+++		}
+++	}, {
+++		.alg = "blake2s-256",
+++		.test = alg_test_hash,
+++		.suite = {
+++			.hash = __VECS(blakes2s_256_tv_template)
+++		}
+++	}, {
++ 		.alg = "cbc(aes)",
++ 		.test = alg_test_skcipher,
++ 		.fips_allowed = 1,
++--- a/crypto/testmgr.h
+++++ b/crypto/testmgr.h
++@@ -31567,4 +31567,255 @@ static const struct aead_testvec essiv_h
++ 	},
++ };
++ 
+++static const char blake2_ordered_sequence[] =
+++	"\x00\x01\x02\x03\x04\x05\x06\x07"
+++	"\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f"
+++	"\x10\x11\x12\x13\x14\x15\x16\x17"
+++	"\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f"
+++	"\x20\x21\x22\x23\x24\x25\x26\x27"
+++	"\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+++	"\x30\x31\x32\x33\x34\x35\x36\x37"
+++	"\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+++	"\x40\x41\x42\x43\x44\x45\x46\x47"
+++	"\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+++	"\x50\x51\x52\x53\x54\x55\x56\x57"
+++	"\x58\x59\x5a\x5b\x5c\x5d\x5e\x5f"
+++	"\x60\x61\x62\x63\x64\x65\x66\x67"
+++	"\x68\x69\x6a\x6b\x6c\x6d\x6e\x6f"
+++	"\x70\x71\x72\x73\x74\x75\x76\x77"
+++	"\x78\x79\x7a\x7b\x7c\x7d\x7e\x7f"
+++	"\x80\x81\x82\x83\x84\x85\x86\x87"
+++	"\x88\x89\x8a\x8b\x8c\x8d\x8e\x8f"
+++	"\x90\x91\x92\x93\x94\x95\x96\x97"
+++	"\x98\x99\x9a\x9b\x9c\x9d\x9e\x9f"
+++	"\xa0\xa1\xa2\xa3\xa4\xa5\xa6\xa7"
+++	"\xa8\xa9\xaa\xab\xac\xad\xae\xaf"
+++	"\xb0\xb1\xb2\xb3\xb4\xb5\xb6\xb7"
+++	"\xb8\xb9\xba\xbb\xbc\xbd\xbe\xbf"
+++	"\xc0\xc1\xc2\xc3\xc4\xc5\xc6\xc7"
+++	"\xc8\xc9\xca\xcb\xcc\xcd\xce\xcf"
+++	"\xd0\xd1\xd2\xd3\xd4\xd5\xd6\xd7"
+++	"\xd8\xd9\xda\xdb\xdc\xdd\xde\xdf"
+++	"\xe0\xe1\xe2\xe3\xe4\xe5\xe6\xe7"
+++	"\xe8\xe9\xea\xeb\xec\xed\xee\xef"
+++	"\xf0\xf1\xf2\xf3\xf4\xf5\xf6\xf7"
+++	"\xf8\xf9\xfa\xfb\xfc\xfd\xfe\xff";
+++
+++static const struct hash_testvec blakes2s_128_tv_template[] = {{
+++	.digest = (u8[]){ 0x64, 0x55, 0x0d, 0x6f, 0xfe, 0x2c, 0x0a, 0x01,
+++			  0xa1, 0x4a, 0xba, 0x1e, 0xad, 0xe0, 0x20, 0x0c, },
+++}, {
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 64,
+++	.digest = (u8[]){ 0xdc, 0x66, 0xca, 0x8f, 0x03, 0x86, 0x58, 0x01,
+++			  0xb0, 0xff, 0xe0, 0x6e, 0xd8, 0xa1, 0xa9, 0x0e, },
+++}, {
+++	.ksize = 16,
+++	.key = blake2_ordered_sequence,
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 1,
+++	.digest = (u8[]){ 0x88, 0x1e, 0x42, 0xe7, 0xbb, 0x35, 0x80, 0x82,
+++			  0x63, 0x7c, 0x0a, 0x0f, 0xd7, 0xec, 0x6c, 0x2f, },
+++}, {
+++	.ksize = 32,
+++	.key = blake2_ordered_sequence,
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 7,
+++	.digest = (u8[]){ 0xcf, 0x9e, 0x07, 0x2a, 0xd5, 0x22, 0xf2, 0xcd,
+++			  0xa2, 0xd8, 0x25, 0x21, 0x80, 0x86, 0x73, 0x1c, },
+++}, {
+++	.ksize = 1,
+++	.key = "B",
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 15,
+++	.digest = (u8[]){ 0xf6, 0x33, 0x5a, 0x2c, 0x22, 0xa0, 0x64, 0xb2,
+++			  0xb6, 0x3f, 0xeb, 0xbc, 0xd1, 0xc3, 0xe5, 0xb2, },
+++}, {
+++	.ksize = 16,
+++	.key = blake2_ordered_sequence,
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 247,
+++	.digest = (u8[]){ 0x72, 0x66, 0x49, 0x60, 0xf9, 0x4a, 0xea, 0xbe,
+++			  0x1f, 0xf4, 0x60, 0xce, 0xb7, 0x81, 0xcb, 0x09, },
+++}, {
+++	.ksize = 32,
+++	.key = blake2_ordered_sequence,
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 256,
+++	.digest = (u8[]){ 0xd5, 0xa4, 0x0e, 0xc3, 0x16, 0xc7, 0x51, 0xa6,
+++			  0x3c, 0xd0, 0xd9, 0x11, 0x57, 0xfa, 0x1e, 0xbb, },
+++}};
+++
+++static const struct hash_testvec blakes2s_160_tv_template[] = {{
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 7,
+++	.digest = (u8[]){ 0xb4, 0xf2, 0x03, 0x49, 0x37, 0xed, 0xb1, 0x3e,
+++			  0x5b, 0x2a, 0xca, 0x64, 0x82, 0x74, 0xf6, 0x62,
+++			  0xe3, 0xf2, 0x84, 0xff, },
+++}, {
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 256,
+++	.digest = (u8[]){ 0xaa, 0x56, 0x9b, 0xdc, 0x98, 0x17, 0x75, 0xf2,
+++			  0xb3, 0x68, 0x83, 0xb7, 0x9b, 0x8d, 0x48, 0xb1,
+++			  0x9b, 0x2d, 0x35, 0x05, },
+++}, {
+++	.ksize = 1,
+++	.key = "B",
+++	.digest = (u8[]){ 0x50, 0x16, 0xe7, 0x0c, 0x01, 0xd0, 0xd3, 0xc3,
+++			  0xf4, 0x3e, 0xb1, 0x6e, 0x97, 0xa9, 0x4e, 0xd1,
+++			  0x79, 0x65, 0x32, 0x93, },
+++}, {
+++	.ksize = 32,
+++	.key = blake2_ordered_sequence,
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 1,
+++	.digest = (u8[]){ 0x1c, 0x2b, 0xcd, 0x9a, 0x68, 0xca, 0x8c, 0x71,
+++			  0x90, 0x29, 0x6c, 0x54, 0xfa, 0x56, 0x4a, 0xef,
+++			  0xa2, 0x3a, 0x56, 0x9c, },
+++}, {
+++	.ksize = 16,
+++	.key = blake2_ordered_sequence,
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 15,
+++	.digest = (u8[]){ 0x36, 0xc3, 0x5f, 0x9a, 0xdc, 0x7e, 0xbf, 0x19,
+++			  0x68, 0xaa, 0xca, 0xd8, 0x81, 0xbf, 0x09, 0x34,
+++			  0x83, 0x39, 0x0f, 0x30, },
+++}, {
+++	.ksize = 1,
+++	.key = "B",
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 64,
+++	.digest = (u8[]){ 0x86, 0x80, 0x78, 0xa4, 0x14, 0xec, 0x03, 0xe5,
+++			  0xb6, 0x9a, 0x52, 0x0e, 0x42, 0xee, 0x39, 0x9d,
+++			  0xac, 0xa6, 0x81, 0x63, },
+++}, {
+++	.ksize = 32,
+++	.key = blake2_ordered_sequence,
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 247,
+++	.digest = (u8[]){ 0x2d, 0xd8, 0xd2, 0x53, 0x66, 0xfa, 0xa9, 0x01,
+++			  0x1c, 0x9c, 0xaf, 0xa3, 0xe2, 0x9d, 0x9b, 0x10,
+++			  0x0a, 0xf6, 0x73, 0xe8, },
+++}};
+++
+++static const struct hash_testvec blakes2s_224_tv_template[] = {{
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 1,
+++	.digest = (u8[]){ 0x61, 0xb9, 0x4e, 0xc9, 0x46, 0x22, 0xa3, 0x91,
+++			  0xd2, 0xae, 0x42, 0xe6, 0x45, 0x6c, 0x90, 0x12,
+++			  0xd5, 0x80, 0x07, 0x97, 0xb8, 0x86, 0x5a, 0xfc,
+++			  0x48, 0x21, 0x97, 0xbb, },
+++}, {
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 247,
+++	.digest = (u8[]){ 0x9e, 0xda, 0xc7, 0x20, 0x2c, 0xd8, 0x48, 0x2e,
+++			  0x31, 0x94, 0xab, 0x46, 0x6d, 0x94, 0xd8, 0xb4,
+++			  0x69, 0xcd, 0xae, 0x19, 0x6d, 0x9e, 0x41, 0xcc,
+++			  0x2b, 0xa4, 0xd5, 0xf6, },
+++}, {
+++	.ksize = 16,
+++	.key = blake2_ordered_sequence,
+++	.digest = (u8[]){ 0x32, 0xc0, 0xac, 0xf4, 0x3b, 0xd3, 0x07, 0x9f,
+++			  0xbe, 0xfb, 0xfa, 0x4d, 0x6b, 0x4e, 0x56, 0xb3,
+++			  0xaa, 0xd3, 0x27, 0xf6, 0x14, 0xbf, 0xb9, 0x32,
+++			  0xa7, 0x19, 0xfc, 0xb8, },
+++}, {
+++	.ksize = 1,
+++	.key = "B",
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 7,
+++	.digest = (u8[]){ 0x73, 0xad, 0x5e, 0x6d, 0xb9, 0x02, 0x8e, 0x76,
+++			  0xf2, 0x66, 0x42, 0x4b, 0x4c, 0xfa, 0x1f, 0xe6,
+++			  0x2e, 0x56, 0x40, 0xe5, 0xa2, 0xb0, 0x3c, 0xe8,
+++			  0x7b, 0x45, 0xfe, 0x05, },
+++}, {
+++	.ksize = 32,
+++	.key = blake2_ordered_sequence,
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 15,
+++	.digest = (u8[]){ 0x16, 0x60, 0xfb, 0x92, 0x54, 0xb3, 0x6e, 0x36,
+++			  0x81, 0xf4, 0x16, 0x41, 0xc3, 0x3d, 0xd3, 0x43,
+++			  0x84, 0xed, 0x10, 0x6f, 0x65, 0x80, 0x7a, 0x3e,
+++			  0x25, 0xab, 0xc5, 0x02, },
+++}, {
+++	.ksize = 16,
+++	.key = blake2_ordered_sequence,
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 64,
+++	.digest = (u8[]){ 0xca, 0xaa, 0x39, 0x67, 0x9c, 0xf7, 0x6b, 0xc7,
+++			  0xb6, 0x82, 0xca, 0x0e, 0x65, 0x36, 0x5b, 0x7c,
+++			  0x24, 0x00, 0xfa, 0x5f, 0xda, 0x06, 0x91, 0x93,
+++			  0x6a, 0x31, 0x83, 0xb5, },
+++}, {
+++	.ksize = 1,
+++	.key = "B",
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 256,
+++	.digest = (u8[]){ 0x90, 0x02, 0x26, 0xb5, 0x06, 0x9c, 0x36, 0x86,
+++			  0x94, 0x91, 0x90, 0x1e, 0x7d, 0x2a, 0x71, 0xb2,
+++			  0x48, 0xb5, 0xe8, 0x16, 0xfd, 0x64, 0x33, 0x45,
+++			  0xb3, 0xd7, 0xec, 0xcc, },
+++}};
+++
+++static const struct hash_testvec blakes2s_256_tv_template[] = {{
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 15,
+++	.digest = (u8[]){ 0xd9, 0x7c, 0x82, 0x8d, 0x81, 0x82, 0xa7, 0x21,
+++			  0x80, 0xa0, 0x6a, 0x78, 0x26, 0x83, 0x30, 0x67,
+++			  0x3f, 0x7c, 0x4e, 0x06, 0x35, 0x94, 0x7c, 0x04,
+++			  0xc0, 0x23, 0x23, 0xfd, 0x45, 0xc0, 0xa5, 0x2d, },
+++}, {
+++	.ksize = 32,
+++	.key = blake2_ordered_sequence,
+++	.digest = (u8[]){ 0x48, 0xa8, 0x99, 0x7d, 0xa4, 0x07, 0x87, 0x6b,
+++			  0x3d, 0x79, 0xc0, 0xd9, 0x23, 0x25, 0xad, 0x3b,
+++			  0x89, 0xcb, 0xb7, 0x54, 0xd8, 0x6a, 0xb7, 0x1a,
+++			  0xee, 0x04, 0x7a, 0xd3, 0x45, 0xfd, 0x2c, 0x49, },
+++}, {
+++	.ksize = 1,
+++	.key = "B",
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 1,
+++	.digest = (u8[]){ 0x22, 0x27, 0xae, 0xaa, 0x6e, 0x81, 0x56, 0x03,
+++			  0xa7, 0xe3, 0xa1, 0x18, 0xa5, 0x9a, 0x2c, 0x18,
+++			  0xf4, 0x63, 0xbc, 0x16, 0x70, 0xf1, 0xe7, 0x4b,
+++			  0x00, 0x6d, 0x66, 0x16, 0xae, 0x9e, 0x74, 0x4e, },
+++}, {
+++	.ksize = 16,
+++	.key = blake2_ordered_sequence,
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 7,
+++	.digest = (u8[]){ 0x58, 0x5d, 0xa8, 0x60, 0x1c, 0xa4, 0xd8, 0x03,
+++			  0x86, 0x86, 0x84, 0x64, 0xd7, 0xa0, 0x8e, 0x15,
+++			  0x2f, 0x05, 0xa2, 0x1b, 0xbc, 0xef, 0x7a, 0x34,
+++			  0xb3, 0xc5, 0xbc, 0x4b, 0xf0, 0x32, 0xeb, 0x12, },
+++}, {
+++	.ksize = 32,
+++	.key = blake2_ordered_sequence,
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 64,
+++	.digest = (u8[]){ 0x89, 0x75, 0xb0, 0x57, 0x7f, 0xd3, 0x55, 0x66,
+++			  0xd7, 0x50, 0xb3, 0x62, 0xb0, 0x89, 0x7a, 0x26,
+++			  0xc3, 0x99, 0x13, 0x6d, 0xf0, 0x7b, 0xab, 0xab,
+++			  0xbd, 0xe6, 0x20, 0x3f, 0xf2, 0x95, 0x4e, 0xd4, },
+++}, {
+++	.ksize = 1,
+++	.key = "B",
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 247,
+++	.digest = (u8[]){ 0x2e, 0x74, 0x1c, 0x1d, 0x03, 0xf4, 0x9d, 0x84,
+++			  0x6f, 0xfc, 0x86, 0x32, 0x92, 0x49, 0x7e, 0x66,
+++			  0xd7, 0xc3, 0x10, 0x88, 0xfe, 0x28, 0xb3, 0xe0,
+++			  0xbf, 0x50, 0x75, 0xad, 0x8e, 0xa4, 0xe6, 0xb2, },
+++}, {
+++	.ksize = 16,
+++	.key = blake2_ordered_sequence,
+++	.plaintext = blake2_ordered_sequence,
+++	.psize = 256,
+++	.digest = (u8[]){ 0xb9, 0xd2, 0x81, 0x0e, 0x3a, 0xb1, 0x62, 0x9b,
+++			  0xad, 0x44, 0x05, 0xf4, 0x92, 0x2e, 0x99, 0xc1,
+++			  0x4a, 0x47, 0xbb, 0x5b, 0x6f, 0xb2, 0x96, 0xed,
+++			  0xd5, 0x06, 0xb5, 0x3a, 0x7c, 0x7a, 0x65, 0x1d, },
+++}};
+++
++ #endif	/* _CRYPTO_TESTMGR_H */
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0023-crypto-blake2s-implement-generic-shash-driver.patch b/target/linux/generic/backport-5.4/080-wireguard-0023-crypto-blake2s-implement-generic-shash-driver.patch
+new file mode 100644
+index 0000000000..e25edf5dda
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0023-crypto-blake2s-implement-generic-shash-driver.patch
+@@ -0,0 +1,245 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:30 +0100
++Subject: [PATCH] crypto: blake2s - implement generic shash driver
++
++commit 7f9b0880925f1f9d7d59504ea0892d2ae9cfc233 upstream.
++
++Wire up our newly added Blake2s implementation via the shash API.
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ crypto/Kconfig                    |  18 ++++
++ crypto/Makefile                   |   1 +
++ crypto/blake2s_generic.c          | 171 ++++++++++++++++++++++++++++++
++ include/crypto/internal/blake2s.h |   5 +
++ 4 files changed, 195 insertions(+)
++ create mode 100644 crypto/blake2s_generic.c
++
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -639,6 +639,24 @@ config CRYPTO_XXHASH
++ 	  xxHash non-cryptographic hash algorithm. Extremely fast, working at
++ 	  speeds close to RAM limits.
++ 
+++config CRYPTO_BLAKE2S
+++	tristate "BLAKE2s digest algorithm"
+++	select CRYPTO_LIB_BLAKE2S_GENERIC
+++	select CRYPTO_HASH
+++	help
+++	  Implementation of cryptographic hash function BLAKE2s
+++	  optimized for 8-32bit platforms and can produce digests of any size
+++	  between 1 to 32.  The keyed hash is also implemented.
+++
+++	  This module provides the following algorithms:
+++
+++	  - blake2s-128
+++	  - blake2s-160
+++	  - blake2s-224
+++	  - blake2s-256
+++
+++	  See https://blake2.net for further information.
+++
++ config CRYPTO_CRCT10DIF
++ 	tristate "CRCT10DIF algorithm"
++ 	select CRYPTO_HASH
++--- a/crypto/Makefile
+++++ b/crypto/Makefile
++@@ -74,6 +74,7 @@ obj-$(CONFIG_CRYPTO_STREEBOG) += streebo
++ obj-$(CONFIG_CRYPTO_WP512) += wp512.o
++ CFLAGS_wp512.o := $(call cc-option,-fno-schedule-insns)  # https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79149
++ obj-$(CONFIG_CRYPTO_TGR192) += tgr192.o
+++obj-$(CONFIG_CRYPTO_BLAKE2S) += blake2s_generic.o
++ obj-$(CONFIG_CRYPTO_GF128MUL) += gf128mul.o
++ obj-$(CONFIG_CRYPTO_ECB) += ecb.o
++ obj-$(CONFIG_CRYPTO_CBC) += cbc.o
++--- /dev/null
+++++ b/crypto/blake2s_generic.c
++@@ -0,0 +1,171 @@
+++// SPDX-License-Identifier: GPL-2.0 OR MIT
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include <crypto/internal/blake2s.h>
+++#include <crypto/internal/simd.h>
+++#include <crypto/internal/hash.h>
+++
+++#include <linux/types.h>
+++#include <linux/jump_label.h>
+++#include <linux/kernel.h>
+++#include <linux/module.h>
+++
+++static int crypto_blake2s_setkey(struct crypto_shash *tfm, const u8 *key,
+++				 unsigned int keylen)
+++{
+++	struct blake2s_tfm_ctx *tctx = crypto_shash_ctx(tfm);
+++
+++	if (keylen == 0 || keylen > BLAKE2S_KEY_SIZE) {
+++		crypto_shash_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
+++		return -EINVAL;
+++	}
+++
+++	memcpy(tctx->key, key, keylen);
+++	tctx->keylen = keylen;
+++
+++	return 0;
+++}
+++
+++static int crypto_blake2s_init(struct shash_desc *desc)
+++{
+++	struct blake2s_tfm_ctx *tctx = crypto_shash_ctx(desc->tfm);
+++	struct blake2s_state *state = shash_desc_ctx(desc);
+++	const int outlen = crypto_shash_digestsize(desc->tfm);
+++
+++	if (tctx->keylen)
+++		blake2s_init_key(state, outlen, tctx->key, tctx->keylen);
+++	else
+++		blake2s_init(state, outlen);
+++
+++	return 0;
+++}
+++
+++static int crypto_blake2s_update(struct shash_desc *desc, const u8 *in,
+++				 unsigned int inlen)
+++{
+++	struct blake2s_state *state = shash_desc_ctx(desc);
+++	const size_t fill = BLAKE2S_BLOCK_SIZE - state->buflen;
+++
+++	if (unlikely(!inlen))
+++		return 0;
+++	if (inlen > fill) {
+++		memcpy(state->buf + state->buflen, in, fill);
+++		blake2s_compress_generic(state, state->buf, 1, BLAKE2S_BLOCK_SIZE);
+++		state->buflen = 0;
+++		in += fill;
+++		inlen -= fill;
+++	}
+++	if (inlen > BLAKE2S_BLOCK_SIZE) {
+++		const size_t nblocks = DIV_ROUND_UP(inlen, BLAKE2S_BLOCK_SIZE);
+++		/* Hash one less (full) block than strictly possible */
+++		blake2s_compress_generic(state, in, nblocks - 1, BLAKE2S_BLOCK_SIZE);
+++		in += BLAKE2S_BLOCK_SIZE * (nblocks - 1);
+++		inlen -= BLAKE2S_BLOCK_SIZE * (nblocks - 1);
+++	}
+++	memcpy(state->buf + state->buflen, in, inlen);
+++	state->buflen += inlen;
+++
+++	return 0;
+++}
+++
+++static int crypto_blake2s_final(struct shash_desc *desc, u8 *out)
+++{
+++	struct blake2s_state *state = shash_desc_ctx(desc);
+++
+++	blake2s_set_lastblock(state);
+++	memset(state->buf + state->buflen, 0,
+++	       BLAKE2S_BLOCK_SIZE - state->buflen); /* Padding */
+++	blake2s_compress_generic(state, state->buf, 1, state->buflen);
+++	cpu_to_le32_array(state->h, ARRAY_SIZE(state->h));
+++	memcpy(out, state->h, state->outlen);
+++	memzero_explicit(state, sizeof(*state));
+++
+++	return 0;
+++}
+++
+++static struct shash_alg blake2s_algs[] = {{
+++	.base.cra_name		= "blake2s-128",
+++	.base.cra_driver_name	= "blake2s-128-generic",
+++	.base.cra_flags		= CRYPTO_ALG_OPTIONAL_KEY,
+++	.base.cra_ctxsize	= sizeof(struct blake2s_tfm_ctx),
+++	.base.cra_priority	= 200,
+++	.base.cra_blocksize     = BLAKE2S_BLOCK_SIZE,
+++	.base.cra_module	= THIS_MODULE,
+++
+++	.digestsize		= BLAKE2S_128_HASH_SIZE,
+++	.setkey			= crypto_blake2s_setkey,
+++	.init			= crypto_blake2s_init,
+++	.update			= crypto_blake2s_update,
+++	.final			= crypto_blake2s_final,
+++	.descsize		= sizeof(struct blake2s_state),
+++}, {
+++	.base.cra_name		= "blake2s-160",
+++	.base.cra_driver_name	= "blake2s-160-generic",
+++	.base.cra_flags		= CRYPTO_ALG_OPTIONAL_KEY,
+++	.base.cra_ctxsize	= sizeof(struct blake2s_tfm_ctx),
+++	.base.cra_priority	= 200,
+++	.base.cra_blocksize     = BLAKE2S_BLOCK_SIZE,
+++	.base.cra_module	= THIS_MODULE,
+++
+++	.digestsize		= BLAKE2S_160_HASH_SIZE,
+++	.setkey			= crypto_blake2s_setkey,
+++	.init			= crypto_blake2s_init,
+++	.update			= crypto_blake2s_update,
+++	.final			= crypto_blake2s_final,
+++	.descsize		= sizeof(struct blake2s_state),
+++}, {
+++	.base.cra_name		= "blake2s-224",
+++	.base.cra_driver_name	= "blake2s-224-generic",
+++	.base.cra_flags		= CRYPTO_ALG_OPTIONAL_KEY,
+++	.base.cra_ctxsize	= sizeof(struct blake2s_tfm_ctx),
+++	.base.cra_priority	= 200,
+++	.base.cra_blocksize     = BLAKE2S_BLOCK_SIZE,
+++	.base.cra_module	= THIS_MODULE,
+++
+++	.digestsize		= BLAKE2S_224_HASH_SIZE,
+++	.setkey			= crypto_blake2s_setkey,
+++	.init			= crypto_blake2s_init,
+++	.update			= crypto_blake2s_update,
+++	.final			= crypto_blake2s_final,
+++	.descsize		= sizeof(struct blake2s_state),
+++}, {
+++	.base.cra_name		= "blake2s-256",
+++	.base.cra_driver_name	= "blake2s-256-generic",
+++	.base.cra_flags		= CRYPTO_ALG_OPTIONAL_KEY,
+++	.base.cra_ctxsize	= sizeof(struct blake2s_tfm_ctx),
+++	.base.cra_priority	= 200,
+++	.base.cra_blocksize     = BLAKE2S_BLOCK_SIZE,
+++	.base.cra_module	= THIS_MODULE,
+++
+++	.digestsize		= BLAKE2S_256_HASH_SIZE,
+++	.setkey			= crypto_blake2s_setkey,
+++	.init			= crypto_blake2s_init,
+++	.update			= crypto_blake2s_update,
+++	.final			= crypto_blake2s_final,
+++	.descsize		= sizeof(struct blake2s_state),
+++}};
+++
+++static int __init blake2s_mod_init(void)
+++{
+++	return crypto_register_shashes(blake2s_algs, ARRAY_SIZE(blake2s_algs));
+++}
+++
+++static void __exit blake2s_mod_exit(void)
+++{
+++	crypto_unregister_shashes(blake2s_algs, ARRAY_SIZE(blake2s_algs));
+++}
+++
+++subsys_initcall(blake2s_mod_init);
+++module_exit(blake2s_mod_exit);
+++
+++MODULE_ALIAS_CRYPTO("blake2s-128");
+++MODULE_ALIAS_CRYPTO("blake2s-128-generic");
+++MODULE_ALIAS_CRYPTO("blake2s-160");
+++MODULE_ALIAS_CRYPTO("blake2s-160-generic");
+++MODULE_ALIAS_CRYPTO("blake2s-224");
+++MODULE_ALIAS_CRYPTO("blake2s-224-generic");
+++MODULE_ALIAS_CRYPTO("blake2s-256");
+++MODULE_ALIAS_CRYPTO("blake2s-256-generic");
+++MODULE_LICENSE("GPL v2");
++--- a/include/crypto/internal/blake2s.h
+++++ b/include/crypto/internal/blake2s.h
++@@ -5,6 +5,11 @@
++ 
++ #include <crypto/blake2s.h>
++ 
+++struct blake2s_tfm_ctx {
+++	u8 key[BLAKE2S_KEY_SIZE];
+++	unsigned int keylen;
+++};
+++
++ void blake2s_compress_generic(struct blake2s_state *state,const u8 *block,
++ 			      size_t nblocks, const u32 inc);
++ 
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0024-crypto-blake2s-x86_64-SIMD-implementation.patch b/target/linux/generic/backport-5.4/080-wireguard-0024-crypto-blake2s-x86_64-SIMD-implementation.patch
+new file mode 100644
+index 0000000000..04405581d2
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0024-crypto-blake2s-x86_64-SIMD-implementation.patch
+@@ -0,0 +1,557 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 8 Nov 2019 13:22:31 +0100
++Subject: [PATCH] crypto: blake2s - x86_64 SIMD implementation
++
++commit ed0356eda153f6a95649e11feb7b07083caf9e20 upstream.
++
++These implementations from Samuel Neves support AVX and AVX-512VL.
++Originally this used AVX-512F, but Skylake thermal throttling made
++AVX-512VL more attractive and possible to do with negligable difference.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Samuel Neves <sneves@dei.uc.pt>
++Co-developed-by: Samuel Neves <sneves@dei.uc.pt>
++[ardb: move to arch/x86/crypto, wire into lib/crypto framework]
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/Makefile       |   2 +
++ arch/x86/crypto/blake2s-core.S | 258 +++++++++++++++++++++++++++++++++
++ arch/x86/crypto/blake2s-glue.c | 233 +++++++++++++++++++++++++++++
++ crypto/Kconfig                 |   6 +
++ 4 files changed, 499 insertions(+)
++ create mode 100644 arch/x86/crypto/blake2s-core.S
++ create mode 100644 arch/x86/crypto/blake2s-glue.c
++
++--- a/arch/x86/crypto/Makefile
+++++ b/arch/x86/crypto/Makefile
++@@ -48,6 +48,7 @@ ifeq ($(avx_supported),yes)
++ 	obj-$(CONFIG_CRYPTO_CAST6_AVX_X86_64) += cast6-avx-x86_64.o
++ 	obj-$(CONFIG_CRYPTO_TWOFISH_AVX_X86_64) += twofish-avx-x86_64.o
++ 	obj-$(CONFIG_CRYPTO_SERPENT_AVX_X86_64) += serpent-avx-x86_64.o
+++	obj-$(CONFIG_CRYPTO_BLAKE2S_X86) += blake2s-x86_64.o
++ endif
++ 
++ # These modules require assembler to support AVX2.
++@@ -70,6 +71,7 @@ serpent-sse2-x86_64-y := serpent-sse2-x8
++ aegis128-aesni-y := aegis128-aesni-asm.o aegis128-aesni-glue.o
++ 
++ nhpoly1305-sse2-y := nh-sse2-x86_64.o nhpoly1305-sse2-glue.o
+++blake2s-x86_64-y := blake2s-core.o blake2s-glue.o
++ 
++ ifeq ($(avx_supported),yes)
++ 	camellia-aesni-avx-x86_64-y := camellia-aesni-avx-asm_64.o \
++--- /dev/null
+++++ b/arch/x86/crypto/blake2s-core.S
++@@ -0,0 +1,258 @@
+++/* SPDX-License-Identifier: GPL-2.0 OR MIT */
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ * Copyright (C) 2017-2019 Samuel Neves <sneves@dei.uc.pt>. All Rights Reserved.
+++ */
+++
+++#include <linux/linkage.h>
+++
+++.section .rodata.cst32.BLAKE2S_IV, "aM", @progbits, 32
+++.align 32
+++IV:	.octa 0xA54FF53A3C6EF372BB67AE856A09E667
+++	.octa 0x5BE0CD191F83D9AB9B05688C510E527F
+++.section .rodata.cst16.ROT16, "aM", @progbits, 16
+++.align 16
+++ROT16:	.octa 0x0D0C0F0E09080B0A0504070601000302
+++.section .rodata.cst16.ROR328, "aM", @progbits, 16
+++.align 16
+++ROR328:	.octa 0x0C0F0E0D080B0A090407060500030201
+++.section .rodata.cst64.BLAKE2S_SIGMA, "aM", @progbits, 160
+++.align 64
+++SIGMA:
+++.byte  0,  2,  4,  6,  1,  3,  5,  7, 14,  8, 10, 12, 15,  9, 11, 13
+++.byte 14,  4,  9, 13, 10,  8, 15,  6,  5,  1,  0, 11,  3, 12,  2,  7
+++.byte 11, 12,  5, 15,  8,  0,  2, 13,  9, 10,  3,  7,  4, 14,  6,  1
+++.byte  7,  3, 13, 11,  9,  1, 12, 14, 15,  2,  5,  4,  8,  6, 10,  0
+++.byte  9,  5,  2, 10,  0,  7,  4, 15,  3, 14, 11,  6, 13,  1, 12,  8
+++.byte  2,  6,  0,  8, 12, 10, 11,  3,  1,  4,  7, 15,  9, 13,  5, 14
+++.byte 12,  1, 14,  4,  5, 15, 13, 10,  8,  0,  6,  9, 11,  7,  3,  2
+++.byte 13,  7, 12,  3, 11, 14,  1,  9,  2,  5, 15,  8, 10,  0,  4,  6
+++.byte  6, 14, 11,  0, 15,  9,  3,  8, 10, 12, 13,  1,  5,  2,  7,  4
+++.byte 10,  8,  7,  1,  2,  4,  6,  5, 13, 15,  9,  3,  0, 11, 14, 12
+++#ifdef CONFIG_AS_AVX512
+++.section .rodata.cst64.BLAKE2S_SIGMA2, "aM", @progbits, 640
+++.align 64
+++SIGMA2:
+++.long  0,  2,  4,  6,  1,  3,  5,  7, 14,  8, 10, 12, 15,  9, 11, 13
+++.long  8,  2, 13, 15, 10,  9, 12,  3,  6,  4,  0, 14,  5, 11,  1,  7
+++.long 11, 13,  8,  6,  5, 10, 14,  3,  2,  4, 12, 15,  1,  0,  7,  9
+++.long 11, 10,  7,  0,  8, 15,  1, 13,  3,  6,  2, 12,  4, 14,  9,  5
+++.long  4, 10,  9, 14, 15,  0, 11,  8,  1,  7,  3, 13,  2,  5,  6, 12
+++.long  2, 11,  4, 15, 14,  3, 10,  8, 13,  6,  5,  7,  0, 12,  1,  9
+++.long  4,  8, 15,  9, 14, 11, 13,  5,  3,  2,  1, 12,  6, 10,  7,  0
+++.long  6, 13,  0, 14, 12,  2,  1, 11, 15,  4,  5,  8,  7,  9,  3, 10
+++.long 15,  5,  4, 13, 10,  7,  3, 11, 12,  2,  0,  6,  9,  8,  1, 14
+++.long  8,  7, 14, 11, 13, 15,  0, 12, 10,  4,  5,  6,  3,  2,  1,  9
+++#endif /* CONFIG_AS_AVX512 */
+++
+++.text
+++#ifdef CONFIG_AS_SSSE3
+++ENTRY(blake2s_compress_ssse3)
+++	testq		%rdx,%rdx
+++	je		.Lendofloop
+++	movdqu		(%rdi),%xmm0
+++	movdqu		0x10(%rdi),%xmm1
+++	movdqa		ROT16(%rip),%xmm12
+++	movdqa		ROR328(%rip),%xmm13
+++	movdqu		0x20(%rdi),%xmm14
+++	movq		%rcx,%xmm15
+++	leaq		SIGMA+0xa0(%rip),%r8
+++	jmp		.Lbeginofloop
+++	.align		32
+++.Lbeginofloop:
+++	movdqa		%xmm0,%xmm10
+++	movdqa		%xmm1,%xmm11
+++	paddq		%xmm15,%xmm14
+++	movdqa		IV(%rip),%xmm2
+++	movdqa		%xmm14,%xmm3
+++	pxor		IV+0x10(%rip),%xmm3
+++	leaq		SIGMA(%rip),%rcx
+++.Lroundloop:
+++	movzbl		(%rcx),%eax
+++	movd		(%rsi,%rax,4),%xmm4
+++	movzbl		0x1(%rcx),%eax
+++	movd		(%rsi,%rax,4),%xmm5
+++	movzbl		0x2(%rcx),%eax
+++	movd		(%rsi,%rax,4),%xmm6
+++	movzbl		0x3(%rcx),%eax
+++	movd		(%rsi,%rax,4),%xmm7
+++	punpckldq	%xmm5,%xmm4
+++	punpckldq	%xmm7,%xmm6
+++	punpcklqdq	%xmm6,%xmm4
+++	paddd		%xmm4,%xmm0
+++	paddd		%xmm1,%xmm0
+++	pxor		%xmm0,%xmm3
+++	pshufb		%xmm12,%xmm3
+++	paddd		%xmm3,%xmm2
+++	pxor		%xmm2,%xmm1
+++	movdqa		%xmm1,%xmm8
+++	psrld		$0xc,%xmm1
+++	pslld		$0x14,%xmm8
+++	por		%xmm8,%xmm1
+++	movzbl		0x4(%rcx),%eax
+++	movd		(%rsi,%rax,4),%xmm5
+++	movzbl		0x5(%rcx),%eax
+++	movd		(%rsi,%rax,4),%xmm6
+++	movzbl		0x6(%rcx),%eax
+++	movd		(%rsi,%rax,4),%xmm7
+++	movzbl		0x7(%rcx),%eax
+++	movd		(%rsi,%rax,4),%xmm4
+++	punpckldq	%xmm6,%xmm5
+++	punpckldq	%xmm4,%xmm7
+++	punpcklqdq	%xmm7,%xmm5
+++	paddd		%xmm5,%xmm0
+++	paddd		%xmm1,%xmm0
+++	pxor		%xmm0,%xmm3
+++	pshufb		%xmm13,%xmm3
+++	paddd		%xmm3,%xmm2
+++	pxor		%xmm2,%xmm1
+++	movdqa		%xmm1,%xmm8
+++	psrld		$0x7,%xmm1
+++	pslld		$0x19,%xmm8
+++	por		%xmm8,%xmm1
+++	pshufd		$0x93,%xmm0,%xmm0
+++	pshufd		$0x4e,%xmm3,%xmm3
+++	pshufd		$0x39,%xmm2,%xmm2
+++	movzbl		0x8(%rcx),%eax
+++	movd		(%rsi,%rax,4),%xmm6
+++	movzbl		0x9(%rcx),%eax
+++	movd		(%rsi,%rax,4),%xmm7
+++	movzbl		0xa(%rcx),%eax
+++	movd		(%rsi,%rax,4),%xmm4
+++	movzbl		0xb(%rcx),%eax
+++	movd		(%rsi,%rax,4),%xmm5
+++	punpckldq	%xmm7,%xmm6
+++	punpckldq	%xmm5,%xmm4
+++	punpcklqdq	%xmm4,%xmm6
+++	paddd		%xmm6,%xmm0
+++	paddd		%xmm1,%xmm0
+++	pxor		%xmm0,%xmm3
+++	pshufb		%xmm12,%xmm3
+++	paddd		%xmm3,%xmm2
+++	pxor		%xmm2,%xmm1
+++	movdqa		%xmm1,%xmm8
+++	psrld		$0xc,%xmm1
+++	pslld		$0x14,%xmm8
+++	por		%xmm8,%xmm1
+++	movzbl		0xc(%rcx),%eax
+++	movd		(%rsi,%rax,4),%xmm7
+++	movzbl		0xd(%rcx),%eax
+++	movd		(%rsi,%rax,4),%xmm4
+++	movzbl		0xe(%rcx),%eax
+++	movd		(%rsi,%rax,4),%xmm5
+++	movzbl		0xf(%rcx),%eax
+++	movd		(%rsi,%rax,4),%xmm6
+++	punpckldq	%xmm4,%xmm7
+++	punpckldq	%xmm6,%xmm5
+++	punpcklqdq	%xmm5,%xmm7
+++	paddd		%xmm7,%xmm0
+++	paddd		%xmm1,%xmm0
+++	pxor		%xmm0,%xmm3
+++	pshufb		%xmm13,%xmm3
+++	paddd		%xmm3,%xmm2
+++	pxor		%xmm2,%xmm1
+++	movdqa		%xmm1,%xmm8
+++	psrld		$0x7,%xmm1
+++	pslld		$0x19,%xmm8
+++	por		%xmm8,%xmm1
+++	pshufd		$0x39,%xmm0,%xmm0
+++	pshufd		$0x4e,%xmm3,%xmm3
+++	pshufd		$0x93,%xmm2,%xmm2
+++	addq		$0x10,%rcx
+++	cmpq		%r8,%rcx
+++	jnz		.Lroundloop
+++	pxor		%xmm2,%xmm0
+++	pxor		%xmm3,%xmm1
+++	pxor		%xmm10,%xmm0
+++	pxor		%xmm11,%xmm1
+++	addq		$0x40,%rsi
+++	decq		%rdx
+++	jnz		.Lbeginofloop
+++	movdqu		%xmm0,(%rdi)
+++	movdqu		%xmm1,0x10(%rdi)
+++	movdqu		%xmm14,0x20(%rdi)
+++.Lendofloop:
+++	ret
+++ENDPROC(blake2s_compress_ssse3)
+++#endif /* CONFIG_AS_SSSE3 */
+++
+++#ifdef CONFIG_AS_AVX512
+++ENTRY(blake2s_compress_avx512)
+++	vmovdqu		(%rdi),%xmm0
+++	vmovdqu		0x10(%rdi),%xmm1
+++	vmovdqu		0x20(%rdi),%xmm4
+++	vmovq		%rcx,%xmm5
+++	vmovdqa		IV(%rip),%xmm14
+++	vmovdqa		IV+16(%rip),%xmm15
+++	jmp		.Lblake2s_compress_avx512_mainloop
+++.align 32
+++.Lblake2s_compress_avx512_mainloop:
+++	vmovdqa		%xmm0,%xmm10
+++	vmovdqa		%xmm1,%xmm11
+++	vpaddq		%xmm5,%xmm4,%xmm4
+++	vmovdqa		%xmm14,%xmm2
+++	vpxor		%xmm15,%xmm4,%xmm3
+++	vmovdqu		(%rsi),%ymm6
+++	vmovdqu		0x20(%rsi),%ymm7
+++	addq		$0x40,%rsi
+++	leaq		SIGMA2(%rip),%rax
+++	movb		$0xa,%cl
+++.Lblake2s_compress_avx512_roundloop:
+++	addq		$0x40,%rax
+++	vmovdqa		-0x40(%rax),%ymm8
+++	vmovdqa		-0x20(%rax),%ymm9
+++	vpermi2d	%ymm7,%ymm6,%ymm8
+++	vpermi2d	%ymm7,%ymm6,%ymm9
+++	vmovdqa		%ymm8,%ymm6
+++	vmovdqa		%ymm9,%ymm7
+++	vpaddd		%xmm8,%xmm0,%xmm0
+++	vpaddd		%xmm1,%xmm0,%xmm0
+++	vpxor		%xmm0,%xmm3,%xmm3
+++	vprord		$0x10,%xmm3,%xmm3
+++	vpaddd		%xmm3,%xmm2,%xmm2
+++	vpxor		%xmm2,%xmm1,%xmm1
+++	vprord		$0xc,%xmm1,%xmm1
+++	vextracti128	$0x1,%ymm8,%xmm8
+++	vpaddd		%xmm8,%xmm0,%xmm0
+++	vpaddd		%xmm1,%xmm0,%xmm0
+++	vpxor		%xmm0,%xmm3,%xmm3
+++	vprord		$0x8,%xmm3,%xmm3
+++	vpaddd		%xmm3,%xmm2,%xmm2
+++	vpxor		%xmm2,%xmm1,%xmm1
+++	vprord		$0x7,%xmm1,%xmm1
+++	vpshufd		$0x93,%xmm0,%xmm0
+++	vpshufd		$0x4e,%xmm3,%xmm3
+++	vpshufd		$0x39,%xmm2,%xmm2
+++	vpaddd		%xmm9,%xmm0,%xmm0
+++	vpaddd		%xmm1,%xmm0,%xmm0
+++	vpxor		%xmm0,%xmm3,%xmm3
+++	vprord		$0x10,%xmm3,%xmm3
+++	vpaddd		%xmm3,%xmm2,%xmm2
+++	vpxor		%xmm2,%xmm1,%xmm1
+++	vprord		$0xc,%xmm1,%xmm1
+++	vextracti128	$0x1,%ymm9,%xmm9
+++	vpaddd		%xmm9,%xmm0,%xmm0
+++	vpaddd		%xmm1,%xmm0,%xmm0
+++	vpxor		%xmm0,%xmm3,%xmm3
+++	vprord		$0x8,%xmm3,%xmm3
+++	vpaddd		%xmm3,%xmm2,%xmm2
+++	vpxor		%xmm2,%xmm1,%xmm1
+++	vprord		$0x7,%xmm1,%xmm1
+++	vpshufd		$0x39,%xmm0,%xmm0
+++	vpshufd		$0x4e,%xmm3,%xmm3
+++	vpshufd		$0x93,%xmm2,%xmm2
+++	decb		%cl
+++	jne		.Lblake2s_compress_avx512_roundloop
+++	vpxor		%xmm10,%xmm0,%xmm0
+++	vpxor		%xmm11,%xmm1,%xmm1
+++	vpxor		%xmm2,%xmm0,%xmm0
+++	vpxor		%xmm3,%xmm1,%xmm1
+++	decq		%rdx
+++	jne		.Lblake2s_compress_avx512_mainloop
+++	vmovdqu		%xmm0,(%rdi)
+++	vmovdqu		%xmm1,0x10(%rdi)
+++	vmovdqu		%xmm4,0x20(%rdi)
+++	vzeroupper
+++	retq
+++ENDPROC(blake2s_compress_avx512)
+++#endif /* CONFIG_AS_AVX512 */
++--- /dev/null
+++++ b/arch/x86/crypto/blake2s-glue.c
++@@ -0,0 +1,233 @@
+++// SPDX-License-Identifier: GPL-2.0 OR MIT
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include <crypto/internal/blake2s.h>
+++#include <crypto/internal/simd.h>
+++#include <crypto/internal/hash.h>
+++
+++#include <linux/types.h>
+++#include <linux/jump_label.h>
+++#include <linux/kernel.h>
+++#include <linux/module.h>
+++
+++#include <asm/cpufeature.h>
+++#include <asm/fpu/api.h>
+++#include <asm/processor.h>
+++#include <asm/simd.h>
+++
+++asmlinkage void blake2s_compress_ssse3(struct blake2s_state *state,
+++				       const u8 *block, const size_t nblocks,
+++				       const u32 inc);
+++asmlinkage void blake2s_compress_avx512(struct blake2s_state *state,
+++					const u8 *block, const size_t nblocks,
+++					const u32 inc);
+++
+++static __ro_after_init DEFINE_STATIC_KEY_FALSE(blake2s_use_ssse3);
+++static __ro_after_init DEFINE_STATIC_KEY_FALSE(blake2s_use_avx512);
+++
+++void blake2s_compress_arch(struct blake2s_state *state,
+++			   const u8 *block, size_t nblocks,
+++			   const u32 inc)
+++{
+++	/* SIMD disables preemption, so relax after processing each page. */
+++	BUILD_BUG_ON(PAGE_SIZE / BLAKE2S_BLOCK_SIZE < 8);
+++
+++	if (!static_branch_likely(&blake2s_use_ssse3) || !crypto_simd_usable()) {
+++		blake2s_compress_generic(state, block, nblocks, inc);
+++		return;
+++	}
+++
+++	for (;;) {
+++		const size_t blocks = min_t(size_t, nblocks,
+++					    PAGE_SIZE / BLAKE2S_BLOCK_SIZE);
+++
+++		kernel_fpu_begin();
+++		if (IS_ENABLED(CONFIG_AS_AVX512) &&
+++		    static_branch_likely(&blake2s_use_avx512))
+++			blake2s_compress_avx512(state, block, blocks, inc);
+++		else
+++			blake2s_compress_ssse3(state, block, blocks, inc);
+++		kernel_fpu_end();
+++
+++		nblocks -= blocks;
+++		if (!nblocks)
+++			break;
+++		block += blocks * BLAKE2S_BLOCK_SIZE;
+++	}
+++}
+++EXPORT_SYMBOL(blake2s_compress_arch);
+++
+++static int crypto_blake2s_setkey(struct crypto_shash *tfm, const u8 *key,
+++				 unsigned int keylen)
+++{
+++	struct blake2s_tfm_ctx *tctx = crypto_shash_ctx(tfm);
+++
+++	if (keylen == 0 || keylen > BLAKE2S_KEY_SIZE) {
+++		crypto_shash_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
+++		return -EINVAL;
+++	}
+++
+++	memcpy(tctx->key, key, keylen);
+++	tctx->keylen = keylen;
+++
+++	return 0;
+++}
+++
+++static int crypto_blake2s_init(struct shash_desc *desc)
+++{
+++	struct blake2s_tfm_ctx *tctx = crypto_shash_ctx(desc->tfm);
+++	struct blake2s_state *state = shash_desc_ctx(desc);
+++	const int outlen = crypto_shash_digestsize(desc->tfm);
+++
+++	if (tctx->keylen)
+++		blake2s_init_key(state, outlen, tctx->key, tctx->keylen);
+++	else
+++		blake2s_init(state, outlen);
+++
+++	return 0;
+++}
+++
+++static int crypto_blake2s_update(struct shash_desc *desc, const u8 *in,
+++				 unsigned int inlen)
+++{
+++	struct blake2s_state *state = shash_desc_ctx(desc);
+++	const size_t fill = BLAKE2S_BLOCK_SIZE - state->buflen;
+++
+++	if (unlikely(!inlen))
+++		return 0;
+++	if (inlen > fill) {
+++		memcpy(state->buf + state->buflen, in, fill);
+++		blake2s_compress_arch(state, state->buf, 1, BLAKE2S_BLOCK_SIZE);
+++		state->buflen = 0;
+++		in += fill;
+++		inlen -= fill;
+++	}
+++	if (inlen > BLAKE2S_BLOCK_SIZE) {
+++		const size_t nblocks = DIV_ROUND_UP(inlen, BLAKE2S_BLOCK_SIZE);
+++		/* Hash one less (full) block than strictly possible */
+++		blake2s_compress_arch(state, in, nblocks - 1, BLAKE2S_BLOCK_SIZE);
+++		in += BLAKE2S_BLOCK_SIZE * (nblocks - 1);
+++		inlen -= BLAKE2S_BLOCK_SIZE * (nblocks - 1);
+++	}
+++	memcpy(state->buf + state->buflen, in, inlen);
+++	state->buflen += inlen;
+++
+++	return 0;
+++}
+++
+++static int crypto_blake2s_final(struct shash_desc *desc, u8 *out)
+++{
+++	struct blake2s_state *state = shash_desc_ctx(desc);
+++
+++	blake2s_set_lastblock(state);
+++	memset(state->buf + state->buflen, 0,
+++	       BLAKE2S_BLOCK_SIZE - state->buflen); /* Padding */
+++	blake2s_compress_arch(state, state->buf, 1, state->buflen);
+++	cpu_to_le32_array(state->h, ARRAY_SIZE(state->h));
+++	memcpy(out, state->h, state->outlen);
+++	memzero_explicit(state, sizeof(*state));
+++
+++	return 0;
+++}
+++
+++static struct shash_alg blake2s_algs[] = {{
+++	.base.cra_name		= "blake2s-128",
+++	.base.cra_driver_name	= "blake2s-128-x86",
+++	.base.cra_flags		= CRYPTO_ALG_OPTIONAL_KEY,
+++	.base.cra_ctxsize	= sizeof(struct blake2s_tfm_ctx),
+++	.base.cra_priority	= 200,
+++	.base.cra_blocksize     = BLAKE2S_BLOCK_SIZE,
+++	.base.cra_module	= THIS_MODULE,
+++
+++	.digestsize		= BLAKE2S_128_HASH_SIZE,
+++	.setkey			= crypto_blake2s_setkey,
+++	.init			= crypto_blake2s_init,
+++	.update			= crypto_blake2s_update,
+++	.final			= crypto_blake2s_final,
+++	.descsize		= sizeof(struct blake2s_state),
+++}, {
+++	.base.cra_name		= "blake2s-160",
+++	.base.cra_driver_name	= "blake2s-160-x86",
+++	.base.cra_flags		= CRYPTO_ALG_OPTIONAL_KEY,
+++	.base.cra_ctxsize	= sizeof(struct blake2s_tfm_ctx),
+++	.base.cra_priority	= 200,
+++	.base.cra_blocksize     = BLAKE2S_BLOCK_SIZE,
+++	.base.cra_module	= THIS_MODULE,
+++
+++	.digestsize		= BLAKE2S_160_HASH_SIZE,
+++	.setkey			= crypto_blake2s_setkey,
+++	.init			= crypto_blake2s_init,
+++	.update			= crypto_blake2s_update,
+++	.final			= crypto_blake2s_final,
+++	.descsize		= sizeof(struct blake2s_state),
+++}, {
+++	.base.cra_name		= "blake2s-224",
+++	.base.cra_driver_name	= "blake2s-224-x86",
+++	.base.cra_flags		= CRYPTO_ALG_OPTIONAL_KEY,
+++	.base.cra_ctxsize	= sizeof(struct blake2s_tfm_ctx),
+++	.base.cra_priority	= 200,
+++	.base.cra_blocksize     = BLAKE2S_BLOCK_SIZE,
+++	.base.cra_module	= THIS_MODULE,
+++
+++	.digestsize		= BLAKE2S_224_HASH_SIZE,
+++	.setkey			= crypto_blake2s_setkey,
+++	.init			= crypto_blake2s_init,
+++	.update			= crypto_blake2s_update,
+++	.final			= crypto_blake2s_final,
+++	.descsize		= sizeof(struct blake2s_state),
+++}, {
+++	.base.cra_name		= "blake2s-256",
+++	.base.cra_driver_name	= "blake2s-256-x86",
+++	.base.cra_flags		= CRYPTO_ALG_OPTIONAL_KEY,
+++	.base.cra_ctxsize	= sizeof(struct blake2s_tfm_ctx),
+++	.base.cra_priority	= 200,
+++	.base.cra_blocksize     = BLAKE2S_BLOCK_SIZE,
+++	.base.cra_module	= THIS_MODULE,
+++
+++	.digestsize		= BLAKE2S_256_HASH_SIZE,
+++	.setkey			= crypto_blake2s_setkey,
+++	.init			= crypto_blake2s_init,
+++	.update			= crypto_blake2s_update,
+++	.final			= crypto_blake2s_final,
+++	.descsize		= sizeof(struct blake2s_state),
+++}};
+++
+++static int __init blake2s_mod_init(void)
+++{
+++	if (!boot_cpu_has(X86_FEATURE_SSSE3))
+++		return 0;
+++
+++	static_branch_enable(&blake2s_use_ssse3);
+++
+++	if (IS_ENABLED(CONFIG_AS_AVX512) &&
+++	    boot_cpu_has(X86_FEATURE_AVX) &&
+++	    boot_cpu_has(X86_FEATURE_AVX2) &&
+++	    boot_cpu_has(X86_FEATURE_AVX512F) &&
+++	    boot_cpu_has(X86_FEATURE_AVX512VL) &&
+++	    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM |
+++			      XFEATURE_MASK_AVX512, NULL))
+++		static_branch_enable(&blake2s_use_avx512);
+++
+++	return crypto_register_shashes(blake2s_algs, ARRAY_SIZE(blake2s_algs));
+++}
+++
+++static void __exit blake2s_mod_exit(void)
+++{
+++	if (boot_cpu_has(X86_FEATURE_SSSE3))
+++		crypto_unregister_shashes(blake2s_algs, ARRAY_SIZE(blake2s_algs));
+++}
+++
+++module_init(blake2s_mod_init);
+++module_exit(blake2s_mod_exit);
+++
+++MODULE_ALIAS_CRYPTO("blake2s-128");
+++MODULE_ALIAS_CRYPTO("blake2s-128-x86");
+++MODULE_ALIAS_CRYPTO("blake2s-160");
+++MODULE_ALIAS_CRYPTO("blake2s-160-x86");
+++MODULE_ALIAS_CRYPTO("blake2s-224");
+++MODULE_ALIAS_CRYPTO("blake2s-224-x86");
+++MODULE_ALIAS_CRYPTO("blake2s-256");
+++MODULE_ALIAS_CRYPTO("blake2s-256-x86");
+++MODULE_LICENSE("GPL v2");
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -657,6 +657,12 @@ config CRYPTO_BLAKE2S
++ 
++ 	  See https://blake2.net for further information.
++ 
+++config CRYPTO_BLAKE2S_X86
+++	tristate "BLAKE2s digest algorithm (x86 accelerated version)"
+++	depends on X86 && 64BIT
+++	select CRYPTO_LIB_BLAKE2S_GENERIC
+++	select CRYPTO_ARCH_HAVE_LIB_BLAKE2S
+++
++ config CRYPTO_CRCT10DIF
++ 	tristate "CRCT10DIF algorithm"
++ 	select CRYPTO_HASH
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0025-crypto-curve25519-generic-C-library-implementations.patch b/target/linux/generic/backport-5.4/080-wireguard-0025-crypto-curve25519-generic-C-library-implementations.patch
+new file mode 100644
+index 0000000000..e58dda9213
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0025-crypto-curve25519-generic-C-library-implementations.patch
+@@ -0,0 +1,1849 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 8 Nov 2019 13:22:32 +0100
++Subject: [PATCH] crypto: curve25519 - generic C library implementations
++
++commit 0ed42a6f431e930b2e8fae21955406e09fe75d70 upstream.
++
++This contains two formally verified C implementations of the Curve25519
++scalar multiplication function, one for 32-bit systems, and one for
++64-bit systems whose compiler supports efficient 128-bit integer types.
++Not only are these implementations formally verified, but they are also
++the fastest available C implementations. They have been modified to be
++friendly to kernel space and to be generally less horrendous looking,
++but still an effort has been made to retain their formally verified
++characteristic, and so the C might look slightly unidiomatic.
++
++The 64-bit version comes from HACL*: https://github.com/project-everest/hacl-star
++The 32-bit version comes from Fiat: https://github.com/mit-plv/fiat-crypto
++
++Information: https://cr.yp.to/ecdh.html
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++[ardb: - move from lib/zinc to lib/crypto
++       - replace .c #includes with Kconfig based object selection
++       - drop simd handling and simplify support for per-arch versions ]
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ include/crypto/curve25519.h    |  71 +++
++ lib/crypto/Kconfig             |  25 +
++ lib/crypto/Makefile            |   5 +
++ lib/crypto/curve25519-fiat32.c | 864 +++++++++++++++++++++++++++++++++
++ lib/crypto/curve25519-hacl64.c | 788 ++++++++++++++++++++++++++++++
++ lib/crypto/curve25519.c        |  25 +
++ 6 files changed, 1778 insertions(+)
++ create mode 100644 include/crypto/curve25519.h
++ create mode 100644 lib/crypto/curve25519-fiat32.c
++ create mode 100644 lib/crypto/curve25519-hacl64.c
++ create mode 100644 lib/crypto/curve25519.c
++
++--- /dev/null
+++++ b/include/crypto/curve25519.h
++@@ -0,0 +1,71 @@
+++/* SPDX-License-Identifier: GPL-2.0 OR MIT */
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#ifndef CURVE25519_H
+++#define CURVE25519_H
+++
+++#include <crypto/algapi.h> // For crypto_memneq.
+++#include <linux/types.h>
+++#include <linux/random.h>
+++
+++enum curve25519_lengths {
+++	CURVE25519_KEY_SIZE = 32
+++};
+++
+++extern const u8 curve25519_null_point[];
+++extern const u8 curve25519_base_point[];
+++
+++void curve25519_generic(u8 out[CURVE25519_KEY_SIZE],
+++			const u8 scalar[CURVE25519_KEY_SIZE],
+++			const u8 point[CURVE25519_KEY_SIZE]);
+++
+++void curve25519_arch(u8 out[CURVE25519_KEY_SIZE],
+++		     const u8 scalar[CURVE25519_KEY_SIZE],
+++		     const u8 point[CURVE25519_KEY_SIZE]);
+++
+++void curve25519_base_arch(u8 pub[CURVE25519_KEY_SIZE],
+++			  const u8 secret[CURVE25519_KEY_SIZE]);
+++
+++static inline
+++bool __must_check curve25519(u8 mypublic[CURVE25519_KEY_SIZE],
+++			     const u8 secret[CURVE25519_KEY_SIZE],
+++			     const u8 basepoint[CURVE25519_KEY_SIZE])
+++{
+++	if (IS_ENABLED(CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519))
+++		curve25519_arch(mypublic, secret, basepoint);
+++	else
+++		curve25519_generic(mypublic, secret, basepoint);
+++	return crypto_memneq(mypublic, curve25519_null_point,
+++			     CURVE25519_KEY_SIZE);
+++}
+++
+++static inline bool
+++__must_check curve25519_generate_public(u8 pub[CURVE25519_KEY_SIZE],
+++					const u8 secret[CURVE25519_KEY_SIZE])
+++{
+++	if (unlikely(!crypto_memneq(secret, curve25519_null_point,
+++				    CURVE25519_KEY_SIZE)))
+++		return false;
+++
+++	if (IS_ENABLED(CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519))
+++		curve25519_base_arch(pub, secret);
+++	else
+++		curve25519_generic(pub, secret, curve25519_base_point);
+++	return crypto_memneq(pub, curve25519_null_point, CURVE25519_KEY_SIZE);
+++}
+++
+++static inline void curve25519_clamp_secret(u8 secret[CURVE25519_KEY_SIZE])
+++{
+++	secret[0] &= 248;
+++	secret[31] = (secret[31] & 127) | 64;
+++}
+++
+++static inline void curve25519_generate_secret(u8 secret[CURVE25519_KEY_SIZE])
+++{
+++	get_random_bytes_wait(secret, CURVE25519_KEY_SIZE);
+++	curve25519_clamp_secret(secret);
+++}
+++
+++#endif /* CURVE25519_H */
++--- a/lib/crypto/Kconfig
+++++ b/lib/crypto/Kconfig
++@@ -59,6 +59,31 @@ config CRYPTO_LIB_CHACHA
++ 	  by either the generic implementation or an arch-specific one, if one
++ 	  is available and enabled.
++ 
+++config CRYPTO_ARCH_HAVE_LIB_CURVE25519
+++	tristate
+++	help
+++	  Declares whether the architecture provides an arch-specific
+++	  accelerated implementation of the Curve25519 library interface,
+++	  either builtin or as a module.
+++
+++config CRYPTO_LIB_CURVE25519_GENERIC
+++	tristate
+++	help
+++	  This symbol can be depended upon by arch implementations of the
+++	  Curve25519 library interface that require the generic code as a
+++	  fallback, e.g., for SIMD implementations. If no arch specific
+++	  implementation is enabled, this implementation serves the users
+++	  of CRYPTO_LIB_CURVE25519.
+++
+++config CRYPTO_LIB_CURVE25519
+++	tristate "Curve25519 scalar multiplication library"
+++	depends on CRYPTO_ARCH_HAVE_LIB_CURVE25519 || !CRYPTO_ARCH_HAVE_LIB_CURVE25519
+++	select CRYPTO_LIB_CURVE25519_GENERIC if CRYPTO_ARCH_HAVE_LIB_CURVE25519=n
+++	help
+++	  Enable the Curve25519 library interface. This interface may be
+++	  fulfilled by either the generic implementation or an arch-specific
+++	  one, if one is available and enabled.
+++
++ config CRYPTO_LIB_DES
++ 	tristate
++ 
++--- a/lib/crypto/Makefile
+++++ b/lib/crypto/Makefile
++@@ -16,6 +16,11 @@ libblake2s-generic-y				+= blake2s-gener
++ obj-$(CONFIG_CRYPTO_LIB_BLAKE2S)		+= libblake2s.o
++ libblake2s-y					+= blake2s.o
++ 
+++obj-$(CONFIG_CRYPTO_LIB_CURVE25519_GENERIC)	+= libcurve25519.o
+++libcurve25519-y					:= curve25519-fiat32.o
+++libcurve25519-$(CONFIG_ARCH_SUPPORTS_INT128)	:= curve25519-hacl64.o
+++libcurve25519-y					+= curve25519.o
+++
++ obj-$(CONFIG_CRYPTO_LIB_DES)			+= libdes.o
++ libdes-y					:= des.o
++ 
++--- /dev/null
+++++ b/lib/crypto/curve25519-fiat32.c
++@@ -0,0 +1,864 @@
+++// SPDX-License-Identifier: GPL-2.0 OR MIT
+++/*
+++ * Copyright (C) 2015-2016 The fiat-crypto Authors.
+++ * Copyright (C) 2018-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ *
+++ * This is a machine-generated formally verified implementation of Curve25519
+++ * ECDH from: <https://github.com/mit-plv/fiat-crypto>. Though originally
+++ * machine generated, it has been tweaked to be suitable for use in the kernel.
+++ * It is optimized for 32-bit machines and machines that cannot work efficiently
+++ * with 128-bit integer types.
+++ */
+++
+++#include <asm/unaligned.h>
+++#include <crypto/curve25519.h>
+++#include <linux/string.h>
+++
+++/* fe means field element. Here the field is \Z/(2^255-19). An element t,
+++ * entries t[0]...t[9], represents the integer t[0]+2^26 t[1]+2^51 t[2]+2^77
+++ * t[3]+2^102 t[4]+...+2^230 t[9].
+++ * fe limbs are bounded by 1.125*2^26,1.125*2^25,1.125*2^26,1.125*2^25,etc.
+++ * Multiplication and carrying produce fe from fe_loose.
+++ */
+++typedef struct fe { u32 v[10]; } fe;
+++
+++/* fe_loose limbs are bounded by 3.375*2^26,3.375*2^25,3.375*2^26,3.375*2^25,etc
+++ * Addition and subtraction produce fe_loose from (fe, fe).
+++ */
+++typedef struct fe_loose { u32 v[10]; } fe_loose;
+++
+++static __always_inline void fe_frombytes_impl(u32 h[10], const u8 *s)
+++{
+++	/* Ignores top bit of s. */
+++	u32 a0 = get_unaligned_le32(s);
+++	u32 a1 = get_unaligned_le32(s+4);
+++	u32 a2 = get_unaligned_le32(s+8);
+++	u32 a3 = get_unaligned_le32(s+12);
+++	u32 a4 = get_unaligned_le32(s+16);
+++	u32 a5 = get_unaligned_le32(s+20);
+++	u32 a6 = get_unaligned_le32(s+24);
+++	u32 a7 = get_unaligned_le32(s+28);
+++	h[0] = a0&((1<<26)-1);                    /* 26 used, 32-26 left.   26 */
+++	h[1] = (a0>>26) | ((a1&((1<<19)-1))<< 6); /* (32-26) + 19 =  6+19 = 25 */
+++	h[2] = (a1>>19) | ((a2&((1<<13)-1))<<13); /* (32-19) + 13 = 13+13 = 26 */
+++	h[3] = (a2>>13) | ((a3&((1<< 6)-1))<<19); /* (32-13) +  6 = 19+ 6 = 25 */
+++	h[4] = (a3>> 6);                          /* (32- 6)              = 26 */
+++	h[5] = a4&((1<<25)-1);                    /*                        25 */
+++	h[6] = (a4>>25) | ((a5&((1<<19)-1))<< 7); /* (32-25) + 19 =  7+19 = 26 */
+++	h[7] = (a5>>19) | ((a6&((1<<12)-1))<<13); /* (32-19) + 12 = 13+12 = 25 */
+++	h[8] = (a6>>12) | ((a7&((1<< 6)-1))<<20); /* (32-12) +  6 = 20+ 6 = 26 */
+++	h[9] = (a7>> 6)&((1<<25)-1); /*                                     25 */
+++}
+++
+++static __always_inline void fe_frombytes(fe *h, const u8 *s)
+++{
+++	fe_frombytes_impl(h->v, s);
+++}
+++
+++static __always_inline u8 /*bool*/
+++addcarryx_u25(u8 /*bool*/ c, u32 a, u32 b, u32 *low)
+++{
+++	/* This function extracts 25 bits of result and 1 bit of carry
+++	 * (26 total), so a 32-bit intermediate is sufficient.
+++	 */
+++	u32 x = a + b + c;
+++	*low = x & ((1 << 25) - 1);
+++	return (x >> 25) & 1;
+++}
+++
+++static __always_inline u8 /*bool*/
+++addcarryx_u26(u8 /*bool*/ c, u32 a, u32 b, u32 *low)
+++{
+++	/* This function extracts 26 bits of result and 1 bit of carry
+++	 * (27 total), so a 32-bit intermediate is sufficient.
+++	 */
+++	u32 x = a + b + c;
+++	*low = x & ((1 << 26) - 1);
+++	return (x >> 26) & 1;
+++}
+++
+++static __always_inline u8 /*bool*/
+++subborrow_u25(u8 /*bool*/ c, u32 a, u32 b, u32 *low)
+++{
+++	/* This function extracts 25 bits of result and 1 bit of borrow
+++	 * (26 total), so a 32-bit intermediate is sufficient.
+++	 */
+++	u32 x = a - b - c;
+++	*low = x & ((1 << 25) - 1);
+++	return x >> 31;
+++}
+++
+++static __always_inline u8 /*bool*/
+++subborrow_u26(u8 /*bool*/ c, u32 a, u32 b, u32 *low)
+++{
+++	/* This function extracts 26 bits of result and 1 bit of borrow
+++	 *(27 total), so a 32-bit intermediate is sufficient.
+++	 */
+++	u32 x = a - b - c;
+++	*low = x & ((1 << 26) - 1);
+++	return x >> 31;
+++}
+++
+++static __always_inline u32 cmovznz32(u32 t, u32 z, u32 nz)
+++{
+++	t = -!!t; /* all set if nonzero, 0 if 0 */
+++	return (t&nz) | ((~t)&z);
+++}
+++
+++static __always_inline void fe_freeze(u32 out[10], const u32 in1[10])
+++{
+++	{ const u32 x17 = in1[9];
+++	{ const u32 x18 = in1[8];
+++	{ const u32 x16 = in1[7];
+++	{ const u32 x14 = in1[6];
+++	{ const u32 x12 = in1[5];
+++	{ const u32 x10 = in1[4];
+++	{ const u32 x8 = in1[3];
+++	{ const u32 x6 = in1[2];
+++	{ const u32 x4 = in1[1];
+++	{ const u32 x2 = in1[0];
+++	{ u32 x20; u8/*bool*/ x21 = subborrow_u26(0x0, x2, 0x3ffffed, &x20);
+++	{ u32 x23; u8/*bool*/ x24 = subborrow_u25(x21, x4, 0x1ffffff, &x23);
+++	{ u32 x26; u8/*bool*/ x27 = subborrow_u26(x24, x6, 0x3ffffff, &x26);
+++	{ u32 x29; u8/*bool*/ x30 = subborrow_u25(x27, x8, 0x1ffffff, &x29);
+++	{ u32 x32; u8/*bool*/ x33 = subborrow_u26(x30, x10, 0x3ffffff, &x32);
+++	{ u32 x35; u8/*bool*/ x36 = subborrow_u25(x33, x12, 0x1ffffff, &x35);
+++	{ u32 x38; u8/*bool*/ x39 = subborrow_u26(x36, x14, 0x3ffffff, &x38);
+++	{ u32 x41; u8/*bool*/ x42 = subborrow_u25(x39, x16, 0x1ffffff, &x41);
+++	{ u32 x44; u8/*bool*/ x45 = subborrow_u26(x42, x18, 0x3ffffff, &x44);
+++	{ u32 x47; u8/*bool*/ x48 = subborrow_u25(x45, x17, 0x1ffffff, &x47);
+++	{ u32 x49 = cmovznz32(x48, 0x0, 0xffffffff);
+++	{ u32 x50 = (x49 & 0x3ffffed);
+++	{ u32 x52; u8/*bool*/ x53 = addcarryx_u26(0x0, x20, x50, &x52);
+++	{ u32 x54 = (x49 & 0x1ffffff);
+++	{ u32 x56; u8/*bool*/ x57 = addcarryx_u25(x53, x23, x54, &x56);
+++	{ u32 x58 = (x49 & 0x3ffffff);
+++	{ u32 x60; u8/*bool*/ x61 = addcarryx_u26(x57, x26, x58, &x60);
+++	{ u32 x62 = (x49 & 0x1ffffff);
+++	{ u32 x64; u8/*bool*/ x65 = addcarryx_u25(x61, x29, x62, &x64);
+++	{ u32 x66 = (x49 & 0x3ffffff);
+++	{ u32 x68; u8/*bool*/ x69 = addcarryx_u26(x65, x32, x66, &x68);
+++	{ u32 x70 = (x49 & 0x1ffffff);
+++	{ u32 x72; u8/*bool*/ x73 = addcarryx_u25(x69, x35, x70, &x72);
+++	{ u32 x74 = (x49 & 0x3ffffff);
+++	{ u32 x76; u8/*bool*/ x77 = addcarryx_u26(x73, x38, x74, &x76);
+++	{ u32 x78 = (x49 & 0x1ffffff);
+++	{ u32 x80; u8/*bool*/ x81 = addcarryx_u25(x77, x41, x78, &x80);
+++	{ u32 x82 = (x49 & 0x3ffffff);
+++	{ u32 x84; u8/*bool*/ x85 = addcarryx_u26(x81, x44, x82, &x84);
+++	{ u32 x86 = (x49 & 0x1ffffff);
+++	{ u32 x88; addcarryx_u25(x85, x47, x86, &x88);
+++	out[0] = x52;
+++	out[1] = x56;
+++	out[2] = x60;
+++	out[3] = x64;
+++	out[4] = x68;
+++	out[5] = x72;
+++	out[6] = x76;
+++	out[7] = x80;
+++	out[8] = x84;
+++	out[9] = x88;
+++	}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}
+++}
+++
+++static __always_inline void fe_tobytes(u8 s[32], const fe *f)
+++{
+++	u32 h[10];
+++	fe_freeze(h, f->v);
+++	s[0] = h[0] >> 0;
+++	s[1] = h[0] >> 8;
+++	s[2] = h[0] >> 16;
+++	s[3] = (h[0] >> 24) | (h[1] << 2);
+++	s[4] = h[1] >> 6;
+++	s[5] = h[1] >> 14;
+++	s[6] = (h[1] >> 22) | (h[2] << 3);
+++	s[7] = h[2] >> 5;
+++	s[8] = h[2] >> 13;
+++	s[9] = (h[2] >> 21) | (h[3] << 5);
+++	s[10] = h[3] >> 3;
+++	s[11] = h[3] >> 11;
+++	s[12] = (h[3] >> 19) | (h[4] << 6);
+++	s[13] = h[4] >> 2;
+++	s[14] = h[4] >> 10;
+++	s[15] = h[4] >> 18;
+++	s[16] = h[5] >> 0;
+++	s[17] = h[5] >> 8;
+++	s[18] = h[5] >> 16;
+++	s[19] = (h[5] >> 24) | (h[6] << 1);
+++	s[20] = h[6] >> 7;
+++	s[21] = h[6] >> 15;
+++	s[22] = (h[6] >> 23) | (h[7] << 3);
+++	s[23] = h[7] >> 5;
+++	s[24] = h[7] >> 13;
+++	s[25] = (h[7] >> 21) | (h[8] << 4);
+++	s[26] = h[8] >> 4;
+++	s[27] = h[8] >> 12;
+++	s[28] = (h[8] >> 20) | (h[9] << 6);
+++	s[29] = h[9] >> 2;
+++	s[30] = h[9] >> 10;
+++	s[31] = h[9] >> 18;
+++}
+++
+++/* h = f */
+++static __always_inline void fe_copy(fe *h, const fe *f)
+++{
+++	memmove(h, f, sizeof(u32) * 10);
+++}
+++
+++static __always_inline void fe_copy_lt(fe_loose *h, const fe *f)
+++{
+++	memmove(h, f, sizeof(u32) * 10);
+++}
+++
+++/* h = 0 */
+++static __always_inline void fe_0(fe *h)
+++{
+++	memset(h, 0, sizeof(u32) * 10);
+++}
+++
+++/* h = 1 */
+++static __always_inline void fe_1(fe *h)
+++{
+++	memset(h, 0, sizeof(u32) * 10);
+++	h->v[0] = 1;
+++}
+++
+++static void fe_add_impl(u32 out[10], const u32 in1[10], const u32 in2[10])
+++{
+++	{ const u32 x20 = in1[9];
+++	{ const u32 x21 = in1[8];
+++	{ const u32 x19 = in1[7];
+++	{ const u32 x17 = in1[6];
+++	{ const u32 x15 = in1[5];
+++	{ const u32 x13 = in1[4];
+++	{ const u32 x11 = in1[3];
+++	{ const u32 x9 = in1[2];
+++	{ const u32 x7 = in1[1];
+++	{ const u32 x5 = in1[0];
+++	{ const u32 x38 = in2[9];
+++	{ const u32 x39 = in2[8];
+++	{ const u32 x37 = in2[7];
+++	{ const u32 x35 = in2[6];
+++	{ const u32 x33 = in2[5];
+++	{ const u32 x31 = in2[4];
+++	{ const u32 x29 = in2[3];
+++	{ const u32 x27 = in2[2];
+++	{ const u32 x25 = in2[1];
+++	{ const u32 x23 = in2[0];
+++	out[0] = (x5 + x23);
+++	out[1] = (x7 + x25);
+++	out[2] = (x9 + x27);
+++	out[3] = (x11 + x29);
+++	out[4] = (x13 + x31);
+++	out[5] = (x15 + x33);
+++	out[6] = (x17 + x35);
+++	out[7] = (x19 + x37);
+++	out[8] = (x21 + x39);
+++	out[9] = (x20 + x38);
+++	}}}}}}}}}}}}}}}}}}}}
+++}
+++
+++/* h = f + g
+++ * Can overlap h with f or g.
+++ */
+++static __always_inline void fe_add(fe_loose *h, const fe *f, const fe *g)
+++{
+++	fe_add_impl(h->v, f->v, g->v);
+++}
+++
+++static void fe_sub_impl(u32 out[10], const u32 in1[10], const u32 in2[10])
+++{
+++	{ const u32 x20 = in1[9];
+++	{ const u32 x21 = in1[8];
+++	{ const u32 x19 = in1[7];
+++	{ const u32 x17 = in1[6];
+++	{ const u32 x15 = in1[5];
+++	{ const u32 x13 = in1[4];
+++	{ const u32 x11 = in1[3];
+++	{ const u32 x9 = in1[2];
+++	{ const u32 x7 = in1[1];
+++	{ const u32 x5 = in1[0];
+++	{ const u32 x38 = in2[9];
+++	{ const u32 x39 = in2[8];
+++	{ const u32 x37 = in2[7];
+++	{ const u32 x35 = in2[6];
+++	{ const u32 x33 = in2[5];
+++	{ const u32 x31 = in2[4];
+++	{ const u32 x29 = in2[3];
+++	{ const u32 x27 = in2[2];
+++	{ const u32 x25 = in2[1];
+++	{ const u32 x23 = in2[0];
+++	out[0] = ((0x7ffffda + x5) - x23);
+++	out[1] = ((0x3fffffe + x7) - x25);
+++	out[2] = ((0x7fffffe + x9) - x27);
+++	out[3] = ((0x3fffffe + x11) - x29);
+++	out[4] = ((0x7fffffe + x13) - x31);
+++	out[5] = ((0x3fffffe + x15) - x33);
+++	out[6] = ((0x7fffffe + x17) - x35);
+++	out[7] = ((0x3fffffe + x19) - x37);
+++	out[8] = ((0x7fffffe + x21) - x39);
+++	out[9] = ((0x3fffffe + x20) - x38);
+++	}}}}}}}}}}}}}}}}}}}}
+++}
+++
+++/* h = f - g
+++ * Can overlap h with f or g.
+++ */
+++static __always_inline void fe_sub(fe_loose *h, const fe *f, const fe *g)
+++{
+++	fe_sub_impl(h->v, f->v, g->v);
+++}
+++
+++static void fe_mul_impl(u32 out[10], const u32 in1[10], const u32 in2[10])
+++{
+++	{ const u32 x20 = in1[9];
+++	{ const u32 x21 = in1[8];
+++	{ const u32 x19 = in1[7];
+++	{ const u32 x17 = in1[6];
+++	{ const u32 x15 = in1[5];
+++	{ const u32 x13 = in1[4];
+++	{ const u32 x11 = in1[3];
+++	{ const u32 x9 = in1[2];
+++	{ const u32 x7 = in1[1];
+++	{ const u32 x5 = in1[0];
+++	{ const u32 x38 = in2[9];
+++	{ const u32 x39 = in2[8];
+++	{ const u32 x37 = in2[7];
+++	{ const u32 x35 = in2[6];
+++	{ const u32 x33 = in2[5];
+++	{ const u32 x31 = in2[4];
+++	{ const u32 x29 = in2[3];
+++	{ const u32 x27 = in2[2];
+++	{ const u32 x25 = in2[1];
+++	{ const u32 x23 = in2[0];
+++	{ u64 x40 = ((u64)x23 * x5);
+++	{ u64 x41 = (((u64)x23 * x7) + ((u64)x25 * x5));
+++	{ u64 x42 = ((((u64)(0x2 * x25) * x7) + ((u64)x23 * x9)) + ((u64)x27 * x5));
+++	{ u64 x43 = (((((u64)x25 * x9) + ((u64)x27 * x7)) + ((u64)x23 * x11)) + ((u64)x29 * x5));
+++	{ u64 x44 = (((((u64)x27 * x9) + (0x2 * (((u64)x25 * x11) + ((u64)x29 * x7)))) + ((u64)x23 * x13)) + ((u64)x31 * x5));
+++	{ u64 x45 = (((((((u64)x27 * x11) + ((u64)x29 * x9)) + ((u64)x25 * x13)) + ((u64)x31 * x7)) + ((u64)x23 * x15)) + ((u64)x33 * x5));
+++	{ u64 x46 = (((((0x2 * ((((u64)x29 * x11) + ((u64)x25 * x15)) + ((u64)x33 * x7))) + ((u64)x27 * x13)) + ((u64)x31 * x9)) + ((u64)x23 * x17)) + ((u64)x35 * x5));
+++	{ u64 x47 = (((((((((u64)x29 * x13) + ((u64)x31 * x11)) + ((u64)x27 * x15)) + ((u64)x33 * x9)) + ((u64)x25 * x17)) + ((u64)x35 * x7)) + ((u64)x23 * x19)) + ((u64)x37 * x5));
+++	{ u64 x48 = (((((((u64)x31 * x13) + (0x2 * (((((u64)x29 * x15) + ((u64)x33 * x11)) + ((u64)x25 * x19)) + ((u64)x37 * x7)))) + ((u64)x27 * x17)) + ((u64)x35 * x9)) + ((u64)x23 * x21)) + ((u64)x39 * x5));
+++	{ u64 x49 = (((((((((((u64)x31 * x15) + ((u64)x33 * x13)) + ((u64)x29 * x17)) + ((u64)x35 * x11)) + ((u64)x27 * x19)) + ((u64)x37 * x9)) + ((u64)x25 * x21)) + ((u64)x39 * x7)) + ((u64)x23 * x20)) + ((u64)x38 * x5));
+++	{ u64 x50 = (((((0x2 * ((((((u64)x33 * x15) + ((u64)x29 * x19)) + ((u64)x37 * x11)) + ((u64)x25 * x20)) + ((u64)x38 * x7))) + ((u64)x31 * x17)) + ((u64)x35 * x13)) + ((u64)x27 * x21)) + ((u64)x39 * x9));
+++	{ u64 x51 = (((((((((u64)x33 * x17) + ((u64)x35 * x15)) + ((u64)x31 * x19)) + ((u64)x37 * x13)) + ((u64)x29 * x21)) + ((u64)x39 * x11)) + ((u64)x27 * x20)) + ((u64)x38 * x9));
+++	{ u64 x52 = (((((u64)x35 * x17) + (0x2 * (((((u64)x33 * x19) + ((u64)x37 * x15)) + ((u64)x29 * x20)) + ((u64)x38 * x11)))) + ((u64)x31 * x21)) + ((u64)x39 * x13));
+++	{ u64 x53 = (((((((u64)x35 * x19) + ((u64)x37 * x17)) + ((u64)x33 * x21)) + ((u64)x39 * x15)) + ((u64)x31 * x20)) + ((u64)x38 * x13));
+++	{ u64 x54 = (((0x2 * ((((u64)x37 * x19) + ((u64)x33 * x20)) + ((u64)x38 * x15))) + ((u64)x35 * x21)) + ((u64)x39 * x17));
+++	{ u64 x55 = (((((u64)x37 * x21) + ((u64)x39 * x19)) + ((u64)x35 * x20)) + ((u64)x38 * x17));
+++	{ u64 x56 = (((u64)x39 * x21) + (0x2 * (((u64)x37 * x20) + ((u64)x38 * x19))));
+++	{ u64 x57 = (((u64)x39 * x20) + ((u64)x38 * x21));
+++	{ u64 x58 = ((u64)(0x2 * x38) * x20);
+++	{ u64 x59 = (x48 + (x58 << 0x4));
+++	{ u64 x60 = (x59 + (x58 << 0x1));
+++	{ u64 x61 = (x60 + x58);
+++	{ u64 x62 = (x47 + (x57 << 0x4));
+++	{ u64 x63 = (x62 + (x57 << 0x1));
+++	{ u64 x64 = (x63 + x57);
+++	{ u64 x65 = (x46 + (x56 << 0x4));
+++	{ u64 x66 = (x65 + (x56 << 0x1));
+++	{ u64 x67 = (x66 + x56);
+++	{ u64 x68 = (x45 + (x55 << 0x4));
+++	{ u64 x69 = (x68 + (x55 << 0x1));
+++	{ u64 x70 = (x69 + x55);
+++	{ u64 x71 = (x44 + (x54 << 0x4));
+++	{ u64 x72 = (x71 + (x54 << 0x1));
+++	{ u64 x73 = (x72 + x54);
+++	{ u64 x74 = (x43 + (x53 << 0x4));
+++	{ u64 x75 = (x74 + (x53 << 0x1));
+++	{ u64 x76 = (x75 + x53);
+++	{ u64 x77 = (x42 + (x52 << 0x4));
+++	{ u64 x78 = (x77 + (x52 << 0x1));
+++	{ u64 x79 = (x78 + x52);
+++	{ u64 x80 = (x41 + (x51 << 0x4));
+++	{ u64 x81 = (x80 + (x51 << 0x1));
+++	{ u64 x82 = (x81 + x51);
+++	{ u64 x83 = (x40 + (x50 << 0x4));
+++	{ u64 x84 = (x83 + (x50 << 0x1));
+++	{ u64 x85 = (x84 + x50);
+++	{ u64 x86 = (x85 >> 0x1a);
+++	{ u32 x87 = ((u32)x85 & 0x3ffffff);
+++	{ u64 x88 = (x86 + x82);
+++	{ u64 x89 = (x88 >> 0x19);
+++	{ u32 x90 = ((u32)x88 & 0x1ffffff);
+++	{ u64 x91 = (x89 + x79);
+++	{ u64 x92 = (x91 >> 0x1a);
+++	{ u32 x93 = ((u32)x91 & 0x3ffffff);
+++	{ u64 x94 = (x92 + x76);
+++	{ u64 x95 = (x94 >> 0x19);
+++	{ u32 x96 = ((u32)x94 & 0x1ffffff);
+++	{ u64 x97 = (x95 + x73);
+++	{ u64 x98 = (x97 >> 0x1a);
+++	{ u32 x99 = ((u32)x97 & 0x3ffffff);
+++	{ u64 x100 = (x98 + x70);
+++	{ u64 x101 = (x100 >> 0x19);
+++	{ u32 x102 = ((u32)x100 & 0x1ffffff);
+++	{ u64 x103 = (x101 + x67);
+++	{ u64 x104 = (x103 >> 0x1a);
+++	{ u32 x105 = ((u32)x103 & 0x3ffffff);
+++	{ u64 x106 = (x104 + x64);
+++	{ u64 x107 = (x106 >> 0x19);
+++	{ u32 x108 = ((u32)x106 & 0x1ffffff);
+++	{ u64 x109 = (x107 + x61);
+++	{ u64 x110 = (x109 >> 0x1a);
+++	{ u32 x111 = ((u32)x109 & 0x3ffffff);
+++	{ u64 x112 = (x110 + x49);
+++	{ u64 x113 = (x112 >> 0x19);
+++	{ u32 x114 = ((u32)x112 & 0x1ffffff);
+++	{ u64 x115 = (x87 + (0x13 * x113));
+++	{ u32 x116 = (u32) (x115 >> 0x1a);
+++	{ u32 x117 = ((u32)x115 & 0x3ffffff);
+++	{ u32 x118 = (x116 + x90);
+++	{ u32 x119 = (x118 >> 0x19);
+++	{ u32 x120 = (x118 & 0x1ffffff);
+++	out[0] = x117;
+++	out[1] = x120;
+++	out[2] = (x119 + x93);
+++	out[3] = x96;
+++	out[4] = x99;
+++	out[5] = x102;
+++	out[6] = x105;
+++	out[7] = x108;
+++	out[8] = x111;
+++	out[9] = x114;
+++	}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}
+++}
+++
+++static __always_inline void fe_mul_ttt(fe *h, const fe *f, const fe *g)
+++{
+++	fe_mul_impl(h->v, f->v, g->v);
+++}
+++
+++static __always_inline void fe_mul_tlt(fe *h, const fe_loose *f, const fe *g)
+++{
+++	fe_mul_impl(h->v, f->v, g->v);
+++}
+++
+++static __always_inline void
+++fe_mul_tll(fe *h, const fe_loose *f, const fe_loose *g)
+++{
+++	fe_mul_impl(h->v, f->v, g->v);
+++}
+++
+++static void fe_sqr_impl(u32 out[10], const u32 in1[10])
+++{
+++	{ const u32 x17 = in1[9];
+++	{ const u32 x18 = in1[8];
+++	{ const u32 x16 = in1[7];
+++	{ const u32 x14 = in1[6];
+++	{ const u32 x12 = in1[5];
+++	{ const u32 x10 = in1[4];
+++	{ const u32 x8 = in1[3];
+++	{ const u32 x6 = in1[2];
+++	{ const u32 x4 = in1[1];
+++	{ const u32 x2 = in1[0];
+++	{ u64 x19 = ((u64)x2 * x2);
+++	{ u64 x20 = ((u64)(0x2 * x2) * x4);
+++	{ u64 x21 = (0x2 * (((u64)x4 * x4) + ((u64)x2 * x6)));
+++	{ u64 x22 = (0x2 * (((u64)x4 * x6) + ((u64)x2 * x8)));
+++	{ u64 x23 = ((((u64)x6 * x6) + ((u64)(0x4 * x4) * x8)) + ((u64)(0x2 * x2) * x10));
+++	{ u64 x24 = (0x2 * ((((u64)x6 * x8) + ((u64)x4 * x10)) + ((u64)x2 * x12)));
+++	{ u64 x25 = (0x2 * (((((u64)x8 * x8) + ((u64)x6 * x10)) + ((u64)x2 * x14)) + ((u64)(0x2 * x4) * x12)));
+++	{ u64 x26 = (0x2 * (((((u64)x8 * x10) + ((u64)x6 * x12)) + ((u64)x4 * x14)) + ((u64)x2 * x16)));
+++	{ u64 x27 = (((u64)x10 * x10) + (0x2 * ((((u64)x6 * x14) + ((u64)x2 * x18)) + (0x2 * (((u64)x4 * x16) + ((u64)x8 * x12))))));
+++	{ u64 x28 = (0x2 * ((((((u64)x10 * x12) + ((u64)x8 * x14)) + ((u64)x6 * x16)) + ((u64)x4 * x18)) + ((u64)x2 * x17)));
+++	{ u64 x29 = (0x2 * (((((u64)x12 * x12) + ((u64)x10 * x14)) + ((u64)x6 * x18)) + (0x2 * (((u64)x8 * x16) + ((u64)x4 * x17)))));
+++	{ u64 x30 = (0x2 * (((((u64)x12 * x14) + ((u64)x10 * x16)) + ((u64)x8 * x18)) + ((u64)x6 * x17)));
+++	{ u64 x31 = (((u64)x14 * x14) + (0x2 * (((u64)x10 * x18) + (0x2 * (((u64)x12 * x16) + ((u64)x8 * x17))))));
+++	{ u64 x32 = (0x2 * ((((u64)x14 * x16) + ((u64)x12 * x18)) + ((u64)x10 * x17)));
+++	{ u64 x33 = (0x2 * ((((u64)x16 * x16) + ((u64)x14 * x18)) + ((u64)(0x2 * x12) * x17)));
+++	{ u64 x34 = (0x2 * (((u64)x16 * x18) + ((u64)x14 * x17)));
+++	{ u64 x35 = (((u64)x18 * x18) + ((u64)(0x4 * x16) * x17));
+++	{ u64 x36 = ((u64)(0x2 * x18) * x17);
+++	{ u64 x37 = ((u64)(0x2 * x17) * x17);
+++	{ u64 x38 = (x27 + (x37 << 0x4));
+++	{ u64 x39 = (x38 + (x37 << 0x1));
+++	{ u64 x40 = (x39 + x37);
+++	{ u64 x41 = (x26 + (x36 << 0x4));
+++	{ u64 x42 = (x41 + (x36 << 0x1));
+++	{ u64 x43 = (x42 + x36);
+++	{ u64 x44 = (x25 + (x35 << 0x4));
+++	{ u64 x45 = (x44 + (x35 << 0x1));
+++	{ u64 x46 = (x45 + x35);
+++	{ u64 x47 = (x24 + (x34 << 0x4));
+++	{ u64 x48 = (x47 + (x34 << 0x1));
+++	{ u64 x49 = (x48 + x34);
+++	{ u64 x50 = (x23 + (x33 << 0x4));
+++	{ u64 x51 = (x50 + (x33 << 0x1));
+++	{ u64 x52 = (x51 + x33);
+++	{ u64 x53 = (x22 + (x32 << 0x4));
+++	{ u64 x54 = (x53 + (x32 << 0x1));
+++	{ u64 x55 = (x54 + x32);
+++	{ u64 x56 = (x21 + (x31 << 0x4));
+++	{ u64 x57 = (x56 + (x31 << 0x1));
+++	{ u64 x58 = (x57 + x31);
+++	{ u64 x59 = (x20 + (x30 << 0x4));
+++	{ u64 x60 = (x59 + (x30 << 0x1));
+++	{ u64 x61 = (x60 + x30);
+++	{ u64 x62 = (x19 + (x29 << 0x4));
+++	{ u64 x63 = (x62 + (x29 << 0x1));
+++	{ u64 x64 = (x63 + x29);
+++	{ u64 x65 = (x64 >> 0x1a);
+++	{ u32 x66 = ((u32)x64 & 0x3ffffff);
+++	{ u64 x67 = (x65 + x61);
+++	{ u64 x68 = (x67 >> 0x19);
+++	{ u32 x69 = ((u32)x67 & 0x1ffffff);
+++	{ u64 x70 = (x68 + x58);
+++	{ u64 x71 = (x70 >> 0x1a);
+++	{ u32 x72 = ((u32)x70 & 0x3ffffff);
+++	{ u64 x73 = (x71 + x55);
+++	{ u64 x74 = (x73 >> 0x19);
+++	{ u32 x75 = ((u32)x73 & 0x1ffffff);
+++	{ u64 x76 = (x74 + x52);
+++	{ u64 x77 = (x76 >> 0x1a);
+++	{ u32 x78 = ((u32)x76 & 0x3ffffff);
+++	{ u64 x79 = (x77 + x49);
+++	{ u64 x80 = (x79 >> 0x19);
+++	{ u32 x81 = ((u32)x79 & 0x1ffffff);
+++	{ u64 x82 = (x80 + x46);
+++	{ u64 x83 = (x82 >> 0x1a);
+++	{ u32 x84 = ((u32)x82 & 0x3ffffff);
+++	{ u64 x85 = (x83 + x43);
+++	{ u64 x86 = (x85 >> 0x19);
+++	{ u32 x87 = ((u32)x85 & 0x1ffffff);
+++	{ u64 x88 = (x86 + x40);
+++	{ u64 x89 = (x88 >> 0x1a);
+++	{ u32 x90 = ((u32)x88 & 0x3ffffff);
+++	{ u64 x91 = (x89 + x28);
+++	{ u64 x92 = (x91 >> 0x19);
+++	{ u32 x93 = ((u32)x91 & 0x1ffffff);
+++	{ u64 x94 = (x66 + (0x13 * x92));
+++	{ u32 x95 = (u32) (x94 >> 0x1a);
+++	{ u32 x96 = ((u32)x94 & 0x3ffffff);
+++	{ u32 x97 = (x95 + x69);
+++	{ u32 x98 = (x97 >> 0x19);
+++	{ u32 x99 = (x97 & 0x1ffffff);
+++	out[0] = x96;
+++	out[1] = x99;
+++	out[2] = (x98 + x72);
+++	out[3] = x75;
+++	out[4] = x78;
+++	out[5] = x81;
+++	out[6] = x84;
+++	out[7] = x87;
+++	out[8] = x90;
+++	out[9] = x93;
+++	}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}
+++}
+++
+++static __always_inline void fe_sq_tl(fe *h, const fe_loose *f)
+++{
+++	fe_sqr_impl(h->v, f->v);
+++}
+++
+++static __always_inline void fe_sq_tt(fe *h, const fe *f)
+++{
+++	fe_sqr_impl(h->v, f->v);
+++}
+++
+++static __always_inline void fe_loose_invert(fe *out, const fe_loose *z)
+++{
+++	fe t0;
+++	fe t1;
+++	fe t2;
+++	fe t3;
+++	int i;
+++
+++	fe_sq_tl(&t0, z);
+++	fe_sq_tt(&t1, &t0);
+++	for (i = 1; i < 2; ++i)
+++		fe_sq_tt(&t1, &t1);
+++	fe_mul_tlt(&t1, z, &t1);
+++	fe_mul_ttt(&t0, &t0, &t1);
+++	fe_sq_tt(&t2, &t0);
+++	fe_mul_ttt(&t1, &t1, &t2);
+++	fe_sq_tt(&t2, &t1);
+++	for (i = 1; i < 5; ++i)
+++		fe_sq_tt(&t2, &t2);
+++	fe_mul_ttt(&t1, &t2, &t1);
+++	fe_sq_tt(&t2, &t1);
+++	for (i = 1; i < 10; ++i)
+++		fe_sq_tt(&t2, &t2);
+++	fe_mul_ttt(&t2, &t2, &t1);
+++	fe_sq_tt(&t3, &t2);
+++	for (i = 1; i < 20; ++i)
+++		fe_sq_tt(&t3, &t3);
+++	fe_mul_ttt(&t2, &t3, &t2);
+++	fe_sq_tt(&t2, &t2);
+++	for (i = 1; i < 10; ++i)
+++		fe_sq_tt(&t2, &t2);
+++	fe_mul_ttt(&t1, &t2, &t1);
+++	fe_sq_tt(&t2, &t1);
+++	for (i = 1; i < 50; ++i)
+++		fe_sq_tt(&t2, &t2);
+++	fe_mul_ttt(&t2, &t2, &t1);
+++	fe_sq_tt(&t3, &t2);
+++	for (i = 1; i < 100; ++i)
+++		fe_sq_tt(&t3, &t3);
+++	fe_mul_ttt(&t2, &t3, &t2);
+++	fe_sq_tt(&t2, &t2);
+++	for (i = 1; i < 50; ++i)
+++		fe_sq_tt(&t2, &t2);
+++	fe_mul_ttt(&t1, &t2, &t1);
+++	fe_sq_tt(&t1, &t1);
+++	for (i = 1; i < 5; ++i)
+++		fe_sq_tt(&t1, &t1);
+++	fe_mul_ttt(out, &t1, &t0);
+++}
+++
+++static __always_inline void fe_invert(fe *out, const fe *z)
+++{
+++	fe_loose l;
+++	fe_copy_lt(&l, z);
+++	fe_loose_invert(out, &l);
+++}
+++
+++/* Replace (f,g) with (g,f) if b == 1;
+++ * replace (f,g) with (f,g) if b == 0.
+++ *
+++ * Preconditions: b in {0,1}
+++ */
+++static __always_inline void fe_cswap(fe *f, fe *g, unsigned int b)
+++{
+++	unsigned i;
+++	b = 0 - b;
+++	for (i = 0; i < 10; i++) {
+++		u32 x = f->v[i] ^ g->v[i];
+++		x &= b;
+++		f->v[i] ^= x;
+++		g->v[i] ^= x;
+++	}
+++}
+++
+++/* NOTE: based on fiat-crypto fe_mul, edited for in2=121666, 0, 0.*/
+++static __always_inline void fe_mul_121666_impl(u32 out[10], const u32 in1[10])
+++{
+++	{ const u32 x20 = in1[9];
+++	{ const u32 x21 = in1[8];
+++	{ const u32 x19 = in1[7];
+++	{ const u32 x17 = in1[6];
+++	{ const u32 x15 = in1[5];
+++	{ const u32 x13 = in1[4];
+++	{ const u32 x11 = in1[3];
+++	{ const u32 x9 = in1[2];
+++	{ const u32 x7 = in1[1];
+++	{ const u32 x5 = in1[0];
+++	{ const u32 x38 = 0;
+++	{ const u32 x39 = 0;
+++	{ const u32 x37 = 0;
+++	{ const u32 x35 = 0;
+++	{ const u32 x33 = 0;
+++	{ const u32 x31 = 0;
+++	{ const u32 x29 = 0;
+++	{ const u32 x27 = 0;
+++	{ const u32 x25 = 0;
+++	{ const u32 x23 = 121666;
+++	{ u64 x40 = ((u64)x23 * x5);
+++	{ u64 x41 = (((u64)x23 * x7) + ((u64)x25 * x5));
+++	{ u64 x42 = ((((u64)(0x2 * x25) * x7) + ((u64)x23 * x9)) + ((u64)x27 * x5));
+++	{ u64 x43 = (((((u64)x25 * x9) + ((u64)x27 * x7)) + ((u64)x23 * x11)) + ((u64)x29 * x5));
+++	{ u64 x44 = (((((u64)x27 * x9) + (0x2 * (((u64)x25 * x11) + ((u64)x29 * x7)))) + ((u64)x23 * x13)) + ((u64)x31 * x5));
+++	{ u64 x45 = (((((((u64)x27 * x11) + ((u64)x29 * x9)) + ((u64)x25 * x13)) + ((u64)x31 * x7)) + ((u64)x23 * x15)) + ((u64)x33 * x5));
+++	{ u64 x46 = (((((0x2 * ((((u64)x29 * x11) + ((u64)x25 * x15)) + ((u64)x33 * x7))) + ((u64)x27 * x13)) + ((u64)x31 * x9)) + ((u64)x23 * x17)) + ((u64)x35 * x5));
+++	{ u64 x47 = (((((((((u64)x29 * x13) + ((u64)x31 * x11)) + ((u64)x27 * x15)) + ((u64)x33 * x9)) + ((u64)x25 * x17)) + ((u64)x35 * x7)) + ((u64)x23 * x19)) + ((u64)x37 * x5));
+++	{ u64 x48 = (((((((u64)x31 * x13) + (0x2 * (((((u64)x29 * x15) + ((u64)x33 * x11)) + ((u64)x25 * x19)) + ((u64)x37 * x7)))) + ((u64)x27 * x17)) + ((u64)x35 * x9)) + ((u64)x23 * x21)) + ((u64)x39 * x5));
+++	{ u64 x49 = (((((((((((u64)x31 * x15) + ((u64)x33 * x13)) + ((u64)x29 * x17)) + ((u64)x35 * x11)) + ((u64)x27 * x19)) + ((u64)x37 * x9)) + ((u64)x25 * x21)) + ((u64)x39 * x7)) + ((u64)x23 * x20)) + ((u64)x38 * x5));
+++	{ u64 x50 = (((((0x2 * ((((((u64)x33 * x15) + ((u64)x29 * x19)) + ((u64)x37 * x11)) + ((u64)x25 * x20)) + ((u64)x38 * x7))) + ((u64)x31 * x17)) + ((u64)x35 * x13)) + ((u64)x27 * x21)) + ((u64)x39 * x9));
+++	{ u64 x51 = (((((((((u64)x33 * x17) + ((u64)x35 * x15)) + ((u64)x31 * x19)) + ((u64)x37 * x13)) + ((u64)x29 * x21)) + ((u64)x39 * x11)) + ((u64)x27 * x20)) + ((u64)x38 * x9));
+++	{ u64 x52 = (((((u64)x35 * x17) + (0x2 * (((((u64)x33 * x19) + ((u64)x37 * x15)) + ((u64)x29 * x20)) + ((u64)x38 * x11)))) + ((u64)x31 * x21)) + ((u64)x39 * x13));
+++	{ u64 x53 = (((((((u64)x35 * x19) + ((u64)x37 * x17)) + ((u64)x33 * x21)) + ((u64)x39 * x15)) + ((u64)x31 * x20)) + ((u64)x38 * x13));
+++	{ u64 x54 = (((0x2 * ((((u64)x37 * x19) + ((u64)x33 * x20)) + ((u64)x38 * x15))) + ((u64)x35 * x21)) + ((u64)x39 * x17));
+++	{ u64 x55 = (((((u64)x37 * x21) + ((u64)x39 * x19)) + ((u64)x35 * x20)) + ((u64)x38 * x17));
+++	{ u64 x56 = (((u64)x39 * x21) + (0x2 * (((u64)x37 * x20) + ((u64)x38 * x19))));
+++	{ u64 x57 = (((u64)x39 * x20) + ((u64)x38 * x21));
+++	{ u64 x58 = ((u64)(0x2 * x38) * x20);
+++	{ u64 x59 = (x48 + (x58 << 0x4));
+++	{ u64 x60 = (x59 + (x58 << 0x1));
+++	{ u64 x61 = (x60 + x58);
+++	{ u64 x62 = (x47 + (x57 << 0x4));
+++	{ u64 x63 = (x62 + (x57 << 0x1));
+++	{ u64 x64 = (x63 + x57);
+++	{ u64 x65 = (x46 + (x56 << 0x4));
+++	{ u64 x66 = (x65 + (x56 << 0x1));
+++	{ u64 x67 = (x66 + x56);
+++	{ u64 x68 = (x45 + (x55 << 0x4));
+++	{ u64 x69 = (x68 + (x55 << 0x1));
+++	{ u64 x70 = (x69 + x55);
+++	{ u64 x71 = (x44 + (x54 << 0x4));
+++	{ u64 x72 = (x71 + (x54 << 0x1));
+++	{ u64 x73 = (x72 + x54);
+++	{ u64 x74 = (x43 + (x53 << 0x4));
+++	{ u64 x75 = (x74 + (x53 << 0x1));
+++	{ u64 x76 = (x75 + x53);
+++	{ u64 x77 = (x42 + (x52 << 0x4));
+++	{ u64 x78 = (x77 + (x52 << 0x1));
+++	{ u64 x79 = (x78 + x52);
+++	{ u64 x80 = (x41 + (x51 << 0x4));
+++	{ u64 x81 = (x80 + (x51 << 0x1));
+++	{ u64 x82 = (x81 + x51);
+++	{ u64 x83 = (x40 + (x50 << 0x4));
+++	{ u64 x84 = (x83 + (x50 << 0x1));
+++	{ u64 x85 = (x84 + x50);
+++	{ u64 x86 = (x85 >> 0x1a);
+++	{ u32 x87 = ((u32)x85 & 0x3ffffff);
+++	{ u64 x88 = (x86 + x82);
+++	{ u64 x89 = (x88 >> 0x19);
+++	{ u32 x90 = ((u32)x88 & 0x1ffffff);
+++	{ u64 x91 = (x89 + x79);
+++	{ u64 x92 = (x91 >> 0x1a);
+++	{ u32 x93 = ((u32)x91 & 0x3ffffff);
+++	{ u64 x94 = (x92 + x76);
+++	{ u64 x95 = (x94 >> 0x19);
+++	{ u32 x96 = ((u32)x94 & 0x1ffffff);
+++	{ u64 x97 = (x95 + x73);
+++	{ u64 x98 = (x97 >> 0x1a);
+++	{ u32 x99 = ((u32)x97 & 0x3ffffff);
+++	{ u64 x100 = (x98 + x70);
+++	{ u64 x101 = (x100 >> 0x19);
+++	{ u32 x102 = ((u32)x100 & 0x1ffffff);
+++	{ u64 x103 = (x101 + x67);
+++	{ u64 x104 = (x103 >> 0x1a);
+++	{ u32 x105 = ((u32)x103 & 0x3ffffff);
+++	{ u64 x106 = (x104 + x64);
+++	{ u64 x107 = (x106 >> 0x19);
+++	{ u32 x108 = ((u32)x106 & 0x1ffffff);
+++	{ u64 x109 = (x107 + x61);
+++	{ u64 x110 = (x109 >> 0x1a);
+++	{ u32 x111 = ((u32)x109 & 0x3ffffff);
+++	{ u64 x112 = (x110 + x49);
+++	{ u64 x113 = (x112 >> 0x19);
+++	{ u32 x114 = ((u32)x112 & 0x1ffffff);
+++	{ u64 x115 = (x87 + (0x13 * x113));
+++	{ u32 x116 = (u32) (x115 >> 0x1a);
+++	{ u32 x117 = ((u32)x115 & 0x3ffffff);
+++	{ u32 x118 = (x116 + x90);
+++	{ u32 x119 = (x118 >> 0x19);
+++	{ u32 x120 = (x118 & 0x1ffffff);
+++	out[0] = x117;
+++	out[1] = x120;
+++	out[2] = (x119 + x93);
+++	out[3] = x96;
+++	out[4] = x99;
+++	out[5] = x102;
+++	out[6] = x105;
+++	out[7] = x108;
+++	out[8] = x111;
+++	out[9] = x114;
+++	}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}
+++}
+++
+++static __always_inline void fe_mul121666(fe *h, const fe_loose *f)
+++{
+++	fe_mul_121666_impl(h->v, f->v);
+++}
+++
+++void curve25519_generic(u8 out[CURVE25519_KEY_SIZE],
+++			const u8 scalar[CURVE25519_KEY_SIZE],
+++			const u8 point[CURVE25519_KEY_SIZE])
+++{
+++	fe x1, x2, z2, x3, z3;
+++	fe_loose x2l, z2l, x3l;
+++	unsigned swap = 0;
+++	int pos;
+++	u8 e[32];
+++
+++	memcpy(e, scalar, 32);
+++	curve25519_clamp_secret(e);
+++
+++	/* The following implementation was transcribed to Coq and proven to
+++	 * correspond to unary scalar multiplication in affine coordinates given
+++	 * that x1 != 0 is the x coordinate of some point on the curve. It was
+++	 * also checked in Coq that doing a ladderstep with x1 = x3 = 0 gives
+++	 * z2' = z3' = 0, and z2 = z3 = 0 gives z2' = z3' = 0. The statement was
+++	 * quantified over the underlying field, so it applies to Curve25519
+++	 * itself and the quadratic twist of Curve25519. It was not proven in
+++	 * Coq that prime-field arithmetic correctly simulates extension-field
+++	 * arithmetic on prime-field values. The decoding of the byte array
+++	 * representation of e was not considered.
+++	 *
+++	 * Specification of Montgomery curves in affine coordinates:
+++	 * <https://github.com/mit-plv/fiat-crypto/blob/2456d821825521f7e03e65882cc3521795b0320f/src/Spec/MontgomeryCurve.v#L27>
+++	 *
+++	 * Proof that these form a group that is isomorphic to a Weierstrass
+++	 * curve:
+++	 * <https://github.com/mit-plv/fiat-crypto/blob/2456d821825521f7e03e65882cc3521795b0320f/src/Curves/Montgomery/AffineProofs.v#L35>
+++	 *
+++	 * Coq transcription and correctness proof of the loop
+++	 * (where scalarbits=255):
+++	 * <https://github.com/mit-plv/fiat-crypto/blob/2456d821825521f7e03e65882cc3521795b0320f/src/Curves/Montgomery/XZ.v#L118>
+++	 * <https://github.com/mit-plv/fiat-crypto/blob/2456d821825521f7e03e65882cc3521795b0320f/src/Curves/Montgomery/XZProofs.v#L278>
+++	 * preconditions: 0 <= e < 2^255 (not necessarily e < order),
+++	 * fe_invert(0) = 0
+++	 */
+++	fe_frombytes(&x1, point);
+++	fe_1(&x2);
+++	fe_0(&z2);
+++	fe_copy(&x3, &x1);
+++	fe_1(&z3);
+++
+++	for (pos = 254; pos >= 0; --pos) {
+++		fe tmp0, tmp1;
+++		fe_loose tmp0l, tmp1l;
+++		/* loop invariant as of right before the test, for the case
+++		 * where x1 != 0:
+++		 *   pos >= -1; if z2 = 0 then x2 is nonzero; if z3 = 0 then x3
+++		 *   is nonzero
+++		 *   let r := e >> (pos+1) in the following equalities of
+++		 *   projective points:
+++		 *   to_xz (r*P)     === if swap then (x3, z3) else (x2, z2)
+++		 *   to_xz ((r+1)*P) === if swap then (x2, z2) else (x3, z3)
+++		 *   x1 is the nonzero x coordinate of the nonzero
+++		 *   point (r*P-(r+1)*P)
+++		 */
+++		unsigned b = 1 & (e[pos / 8] >> (pos & 7));
+++		swap ^= b;
+++		fe_cswap(&x2, &x3, swap);
+++		fe_cswap(&z2, &z3, swap);
+++		swap = b;
+++		/* Coq transcription of ladderstep formula (called from
+++		 * transcribed loop):
+++		 * <https://github.com/mit-plv/fiat-crypto/blob/2456d821825521f7e03e65882cc3521795b0320f/src/Curves/Montgomery/XZ.v#L89>
+++		 * <https://github.com/mit-plv/fiat-crypto/blob/2456d821825521f7e03e65882cc3521795b0320f/src/Curves/Montgomery/XZProofs.v#L131>
+++		 * x1 != 0 <https://github.com/mit-plv/fiat-crypto/blob/2456d821825521f7e03e65882cc3521795b0320f/src/Curves/Montgomery/XZProofs.v#L217>
+++		 * x1  = 0 <https://github.com/mit-plv/fiat-crypto/blob/2456d821825521f7e03e65882cc3521795b0320f/src/Curves/Montgomery/XZProofs.v#L147>
+++		 */
+++		fe_sub(&tmp0l, &x3, &z3);
+++		fe_sub(&tmp1l, &x2, &z2);
+++		fe_add(&x2l, &x2, &z2);
+++		fe_add(&z2l, &x3, &z3);
+++		fe_mul_tll(&z3, &tmp0l, &x2l);
+++		fe_mul_tll(&z2, &z2l, &tmp1l);
+++		fe_sq_tl(&tmp0, &tmp1l);
+++		fe_sq_tl(&tmp1, &x2l);
+++		fe_add(&x3l, &z3, &z2);
+++		fe_sub(&z2l, &z3, &z2);
+++		fe_mul_ttt(&x2, &tmp1, &tmp0);
+++		fe_sub(&tmp1l, &tmp1, &tmp0);
+++		fe_sq_tl(&z2, &z2l);
+++		fe_mul121666(&z3, &tmp1l);
+++		fe_sq_tl(&x3, &x3l);
+++		fe_add(&tmp0l, &tmp0, &z3);
+++		fe_mul_ttt(&z3, &x1, &z2);
+++		fe_mul_tll(&z2, &tmp1l, &tmp0l);
+++	}
+++	/* here pos=-1, so r=e, so to_xz (e*P) === if swap then (x3, z3)
+++	 * else (x2, z2)
+++	 */
+++	fe_cswap(&x2, &x3, swap);
+++	fe_cswap(&z2, &z3, swap);
+++
+++	fe_invert(&z2, &z2);
+++	fe_mul_ttt(&x2, &x2, &z2);
+++	fe_tobytes(out, &x2);
+++
+++	memzero_explicit(&x1, sizeof(x1));
+++	memzero_explicit(&x2, sizeof(x2));
+++	memzero_explicit(&z2, sizeof(z2));
+++	memzero_explicit(&x3, sizeof(x3));
+++	memzero_explicit(&z3, sizeof(z3));
+++	memzero_explicit(&x2l, sizeof(x2l));
+++	memzero_explicit(&z2l, sizeof(z2l));
+++	memzero_explicit(&x3l, sizeof(x3l));
+++	memzero_explicit(&e, sizeof(e));
+++}
++--- /dev/null
+++++ b/lib/crypto/curve25519-hacl64.c
++@@ -0,0 +1,788 @@
+++// SPDX-License-Identifier: GPL-2.0 OR MIT
+++/*
+++ * Copyright (C) 2016-2017 INRIA and Microsoft Corporation.
+++ * Copyright (C) 2018-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ *
+++ * This is a machine-generated formally verified implementation of Curve25519
+++ * ECDH from: <https://github.com/mitls/hacl-star>. Though originally machine
+++ * generated, it has been tweaked to be suitable for use in the kernel. It is
+++ * optimized for 64-bit machines that can efficiently work with 128-bit
+++ * integer types.
+++ */
+++
+++#include <asm/unaligned.h>
+++#include <crypto/curve25519.h>
+++#include <linux/string.h>
+++
+++typedef __uint128_t u128;
+++
+++static __always_inline u64 u64_eq_mask(u64 a, u64 b)
+++{
+++	u64 x = a ^ b;
+++	u64 minus_x = ~x + (u64)1U;
+++	u64 x_or_minus_x = x | minus_x;
+++	u64 xnx = x_or_minus_x >> (u32)63U;
+++	u64 c = xnx - (u64)1U;
+++	return c;
+++}
+++
+++static __always_inline u64 u64_gte_mask(u64 a, u64 b)
+++{
+++	u64 x = a;
+++	u64 y = b;
+++	u64 x_xor_y = x ^ y;
+++	u64 x_sub_y = x - y;
+++	u64 x_sub_y_xor_y = x_sub_y ^ y;
+++	u64 q = x_xor_y | x_sub_y_xor_y;
+++	u64 x_xor_q = x ^ q;
+++	u64 x_xor_q_ = x_xor_q >> (u32)63U;
+++	u64 c = x_xor_q_ - (u64)1U;
+++	return c;
+++}
+++
+++static __always_inline void modulo_carry_top(u64 *b)
+++{
+++	u64 b4 = b[4];
+++	u64 b0 = b[0];
+++	u64 b4_ = b4 & 0x7ffffffffffffLLU;
+++	u64 b0_ = b0 + 19 * (b4 >> 51);
+++	b[4] = b4_;
+++	b[0] = b0_;
+++}
+++
+++static __always_inline void fproduct_copy_from_wide_(u64 *output, u128 *input)
+++{
+++	{
+++		u128 xi = input[0];
+++		output[0] = ((u64)(xi));
+++	}
+++	{
+++		u128 xi = input[1];
+++		output[1] = ((u64)(xi));
+++	}
+++	{
+++		u128 xi = input[2];
+++		output[2] = ((u64)(xi));
+++	}
+++	{
+++		u128 xi = input[3];
+++		output[3] = ((u64)(xi));
+++	}
+++	{
+++		u128 xi = input[4];
+++		output[4] = ((u64)(xi));
+++	}
+++}
+++
+++static __always_inline void
+++fproduct_sum_scalar_multiplication_(u128 *output, u64 *input, u64 s)
+++{
+++	output[0] += (u128)input[0] * s;
+++	output[1] += (u128)input[1] * s;
+++	output[2] += (u128)input[2] * s;
+++	output[3] += (u128)input[3] * s;
+++	output[4] += (u128)input[4] * s;
+++}
+++
+++static __always_inline void fproduct_carry_wide_(u128 *tmp)
+++{
+++	{
+++		u32 ctr = 0;
+++		u128 tctr = tmp[ctr];
+++		u128 tctrp1 = tmp[ctr + 1];
+++		u64 r0 = ((u64)(tctr)) & 0x7ffffffffffffLLU;
+++		u128 c = ((tctr) >> (51));
+++		tmp[ctr] = ((u128)(r0));
+++		tmp[ctr + 1] = ((tctrp1) + (c));
+++	}
+++	{
+++		u32 ctr = 1;
+++		u128 tctr = tmp[ctr];
+++		u128 tctrp1 = tmp[ctr + 1];
+++		u64 r0 = ((u64)(tctr)) & 0x7ffffffffffffLLU;
+++		u128 c = ((tctr) >> (51));
+++		tmp[ctr] = ((u128)(r0));
+++		tmp[ctr + 1] = ((tctrp1) + (c));
+++	}
+++
+++	{
+++		u32 ctr = 2;
+++		u128 tctr = tmp[ctr];
+++		u128 tctrp1 = tmp[ctr + 1];
+++		u64 r0 = ((u64)(tctr)) & 0x7ffffffffffffLLU;
+++		u128 c = ((tctr) >> (51));
+++		tmp[ctr] = ((u128)(r0));
+++		tmp[ctr + 1] = ((tctrp1) + (c));
+++	}
+++	{
+++		u32 ctr = 3;
+++		u128 tctr = tmp[ctr];
+++		u128 tctrp1 = tmp[ctr + 1];
+++		u64 r0 = ((u64)(tctr)) & 0x7ffffffffffffLLU;
+++		u128 c = ((tctr) >> (51));
+++		tmp[ctr] = ((u128)(r0));
+++		tmp[ctr + 1] = ((tctrp1) + (c));
+++	}
+++}
+++
+++static __always_inline void fmul_shift_reduce(u64 *output)
+++{
+++	u64 tmp = output[4];
+++	u64 b0;
+++	{
+++		u32 ctr = 5 - 0 - 1;
+++		u64 z = output[ctr - 1];
+++		output[ctr] = z;
+++	}
+++	{
+++		u32 ctr = 5 - 1 - 1;
+++		u64 z = output[ctr - 1];
+++		output[ctr] = z;
+++	}
+++	{
+++		u32 ctr = 5 - 2 - 1;
+++		u64 z = output[ctr - 1];
+++		output[ctr] = z;
+++	}
+++	{
+++		u32 ctr = 5 - 3 - 1;
+++		u64 z = output[ctr - 1];
+++		output[ctr] = z;
+++	}
+++	output[0] = tmp;
+++	b0 = output[0];
+++	output[0] = 19 * b0;
+++}
+++
+++static __always_inline void fmul_mul_shift_reduce_(u128 *output, u64 *input,
+++						   u64 *input21)
+++{
+++	u32 i;
+++	u64 input2i;
+++	{
+++		u64 input2i = input21[0];
+++		fproduct_sum_scalar_multiplication_(output, input, input2i);
+++		fmul_shift_reduce(input);
+++	}
+++	{
+++		u64 input2i = input21[1];
+++		fproduct_sum_scalar_multiplication_(output, input, input2i);
+++		fmul_shift_reduce(input);
+++	}
+++	{
+++		u64 input2i = input21[2];
+++		fproduct_sum_scalar_multiplication_(output, input, input2i);
+++		fmul_shift_reduce(input);
+++	}
+++	{
+++		u64 input2i = input21[3];
+++		fproduct_sum_scalar_multiplication_(output, input, input2i);
+++		fmul_shift_reduce(input);
+++	}
+++	i = 4;
+++	input2i = input21[i];
+++	fproduct_sum_scalar_multiplication_(output, input, input2i);
+++}
+++
+++static __always_inline void fmul_fmul(u64 *output, u64 *input, u64 *input21)
+++{
+++	u64 tmp[5] = { input[0], input[1], input[2], input[3], input[4] };
+++	{
+++		u128 b4;
+++		u128 b0;
+++		u128 b4_;
+++		u128 b0_;
+++		u64 i0;
+++		u64 i1;
+++		u64 i0_;
+++		u64 i1_;
+++		u128 t[5] = { 0 };
+++		fmul_mul_shift_reduce_(t, tmp, input21);
+++		fproduct_carry_wide_(t);
+++		b4 = t[4];
+++		b0 = t[0];
+++		b4_ = ((b4) & (((u128)(0x7ffffffffffffLLU))));
+++		b0_ = ((b0) + (((u128)(19) * (((u64)(((b4) >> (51))))))));
+++		t[4] = b4_;
+++		t[0] = b0_;
+++		fproduct_copy_from_wide_(output, t);
+++		i0 = output[0];
+++		i1 = output[1];
+++		i0_ = i0 & 0x7ffffffffffffLLU;
+++		i1_ = i1 + (i0 >> 51);
+++		output[0] = i0_;
+++		output[1] = i1_;
+++	}
+++}
+++
+++static __always_inline void fsquare_fsquare__(u128 *tmp, u64 *output)
+++{
+++	u64 r0 = output[0];
+++	u64 r1 = output[1];
+++	u64 r2 = output[2];
+++	u64 r3 = output[3];
+++	u64 r4 = output[4];
+++	u64 d0 = r0 * 2;
+++	u64 d1 = r1 * 2;
+++	u64 d2 = r2 * 2 * 19;
+++	u64 d419 = r4 * 19;
+++	u64 d4 = d419 * 2;
+++	u128 s0 = ((((((u128)(r0) * (r0))) + (((u128)(d4) * (r1))))) +
+++		   (((u128)(d2) * (r3))));
+++	u128 s1 = ((((((u128)(d0) * (r1))) + (((u128)(d4) * (r2))))) +
+++		   (((u128)(r3 * 19) * (r3))));
+++	u128 s2 = ((((((u128)(d0) * (r2))) + (((u128)(r1) * (r1))))) +
+++		   (((u128)(d4) * (r3))));
+++	u128 s3 = ((((((u128)(d0) * (r3))) + (((u128)(d1) * (r2))))) +
+++		   (((u128)(r4) * (d419))));
+++	u128 s4 = ((((((u128)(d0) * (r4))) + (((u128)(d1) * (r3))))) +
+++		   (((u128)(r2) * (r2))));
+++	tmp[0] = s0;
+++	tmp[1] = s1;
+++	tmp[2] = s2;
+++	tmp[3] = s3;
+++	tmp[4] = s4;
+++}
+++
+++static __always_inline void fsquare_fsquare_(u128 *tmp, u64 *output)
+++{
+++	u128 b4;
+++	u128 b0;
+++	u128 b4_;
+++	u128 b0_;
+++	u64 i0;
+++	u64 i1;
+++	u64 i0_;
+++	u64 i1_;
+++	fsquare_fsquare__(tmp, output);
+++	fproduct_carry_wide_(tmp);
+++	b4 = tmp[4];
+++	b0 = tmp[0];
+++	b4_ = ((b4) & (((u128)(0x7ffffffffffffLLU))));
+++	b0_ = ((b0) + (((u128)(19) * (((u64)(((b4) >> (51))))))));
+++	tmp[4] = b4_;
+++	tmp[0] = b0_;
+++	fproduct_copy_from_wide_(output, tmp);
+++	i0 = output[0];
+++	i1 = output[1];
+++	i0_ = i0 & 0x7ffffffffffffLLU;
+++	i1_ = i1 + (i0 >> 51);
+++	output[0] = i0_;
+++	output[1] = i1_;
+++}
+++
+++static __always_inline void fsquare_fsquare_times_(u64 *output, u128 *tmp,
+++						   u32 count1)
+++{
+++	u32 i;
+++	fsquare_fsquare_(tmp, output);
+++	for (i = 1; i < count1; ++i)
+++		fsquare_fsquare_(tmp, output);
+++}
+++
+++static __always_inline void fsquare_fsquare_times(u64 *output, u64 *input,
+++						  u32 count1)
+++{
+++	u128 t[5];
+++	memcpy(output, input, 5 * sizeof(*input));
+++	fsquare_fsquare_times_(output, t, count1);
+++}
+++
+++static __always_inline void fsquare_fsquare_times_inplace(u64 *output,
+++							  u32 count1)
+++{
+++	u128 t[5];
+++	fsquare_fsquare_times_(output, t, count1);
+++}
+++
+++static __always_inline void crecip_crecip(u64 *out, u64 *z)
+++{
+++	u64 buf[20] = { 0 };
+++	u64 *a0 = buf;
+++	u64 *t00 = buf + 5;
+++	u64 *b0 = buf + 10;
+++	u64 *t01;
+++	u64 *b1;
+++	u64 *c0;
+++	u64 *a;
+++	u64 *t0;
+++	u64 *b;
+++	u64 *c;
+++	fsquare_fsquare_times(a0, z, 1);
+++	fsquare_fsquare_times(t00, a0, 2);
+++	fmul_fmul(b0, t00, z);
+++	fmul_fmul(a0, b0, a0);
+++	fsquare_fsquare_times(t00, a0, 1);
+++	fmul_fmul(b0, t00, b0);
+++	fsquare_fsquare_times(t00, b0, 5);
+++	t01 = buf + 5;
+++	b1 = buf + 10;
+++	c0 = buf + 15;
+++	fmul_fmul(b1, t01, b1);
+++	fsquare_fsquare_times(t01, b1, 10);
+++	fmul_fmul(c0, t01, b1);
+++	fsquare_fsquare_times(t01, c0, 20);
+++	fmul_fmul(t01, t01, c0);
+++	fsquare_fsquare_times_inplace(t01, 10);
+++	fmul_fmul(b1, t01, b1);
+++	fsquare_fsquare_times(t01, b1, 50);
+++	a = buf;
+++	t0 = buf + 5;
+++	b = buf + 10;
+++	c = buf + 15;
+++	fmul_fmul(c, t0, b);
+++	fsquare_fsquare_times(t0, c, 100);
+++	fmul_fmul(t0, t0, c);
+++	fsquare_fsquare_times_inplace(t0, 50);
+++	fmul_fmul(t0, t0, b);
+++	fsquare_fsquare_times_inplace(t0, 5);
+++	fmul_fmul(out, t0, a);
+++}
+++
+++static __always_inline void fsum(u64 *a, u64 *b)
+++{
+++	a[0] += b[0];
+++	a[1] += b[1];
+++	a[2] += b[2];
+++	a[3] += b[3];
+++	a[4] += b[4];
+++}
+++
+++static __always_inline void fdifference(u64 *a, u64 *b)
+++{
+++	u64 tmp[5] = { 0 };
+++	u64 b0;
+++	u64 b1;
+++	u64 b2;
+++	u64 b3;
+++	u64 b4;
+++	memcpy(tmp, b, 5 * sizeof(*b));
+++	b0 = tmp[0];
+++	b1 = tmp[1];
+++	b2 = tmp[2];
+++	b3 = tmp[3];
+++	b4 = tmp[4];
+++	tmp[0] = b0 + 0x3fffffffffff68LLU;
+++	tmp[1] = b1 + 0x3ffffffffffff8LLU;
+++	tmp[2] = b2 + 0x3ffffffffffff8LLU;
+++	tmp[3] = b3 + 0x3ffffffffffff8LLU;
+++	tmp[4] = b4 + 0x3ffffffffffff8LLU;
+++	{
+++		u64 xi = a[0];
+++		u64 yi = tmp[0];
+++		a[0] = yi - xi;
+++	}
+++	{
+++		u64 xi = a[1];
+++		u64 yi = tmp[1];
+++		a[1] = yi - xi;
+++	}
+++	{
+++		u64 xi = a[2];
+++		u64 yi = tmp[2];
+++		a[2] = yi - xi;
+++	}
+++	{
+++		u64 xi = a[3];
+++		u64 yi = tmp[3];
+++		a[3] = yi - xi;
+++	}
+++	{
+++		u64 xi = a[4];
+++		u64 yi = tmp[4];
+++		a[4] = yi - xi;
+++	}
+++}
+++
+++static __always_inline void fscalar(u64 *output, u64 *b, u64 s)
+++{
+++	u128 tmp[5];
+++	u128 b4;
+++	u128 b0;
+++	u128 b4_;
+++	u128 b0_;
+++	{
+++		u64 xi = b[0];
+++		tmp[0] = ((u128)(xi) * (s));
+++	}
+++	{
+++		u64 xi = b[1];
+++		tmp[1] = ((u128)(xi) * (s));
+++	}
+++	{
+++		u64 xi = b[2];
+++		tmp[2] = ((u128)(xi) * (s));
+++	}
+++	{
+++		u64 xi = b[3];
+++		tmp[3] = ((u128)(xi) * (s));
+++	}
+++	{
+++		u64 xi = b[4];
+++		tmp[4] = ((u128)(xi) * (s));
+++	}
+++	fproduct_carry_wide_(tmp);
+++	b4 = tmp[4];
+++	b0 = tmp[0];
+++	b4_ = ((b4) & (((u128)(0x7ffffffffffffLLU))));
+++	b0_ = ((b0) + (((u128)(19) * (((u64)(((b4) >> (51))))))));
+++	tmp[4] = b4_;
+++	tmp[0] = b0_;
+++	fproduct_copy_from_wide_(output, tmp);
+++}
+++
+++static __always_inline void fmul(u64 *output, u64 *a, u64 *b)
+++{
+++	fmul_fmul(output, a, b);
+++}
+++
+++static __always_inline void crecip(u64 *output, u64 *input)
+++{
+++	crecip_crecip(output, input);
+++}
+++
+++static __always_inline void point_swap_conditional_step(u64 *a, u64 *b,
+++							u64 swap1, u32 ctr)
+++{
+++	u32 i = ctr - 1;
+++	u64 ai = a[i];
+++	u64 bi = b[i];
+++	u64 x = swap1 & (ai ^ bi);
+++	u64 ai1 = ai ^ x;
+++	u64 bi1 = bi ^ x;
+++	a[i] = ai1;
+++	b[i] = bi1;
+++}
+++
+++static __always_inline void point_swap_conditional5(u64 *a, u64 *b, u64 swap1)
+++{
+++	point_swap_conditional_step(a, b, swap1, 5);
+++	point_swap_conditional_step(a, b, swap1, 4);
+++	point_swap_conditional_step(a, b, swap1, 3);
+++	point_swap_conditional_step(a, b, swap1, 2);
+++	point_swap_conditional_step(a, b, swap1, 1);
+++}
+++
+++static __always_inline void point_swap_conditional(u64 *a, u64 *b, u64 iswap)
+++{
+++	u64 swap1 = 0 - iswap;
+++	point_swap_conditional5(a, b, swap1);
+++	point_swap_conditional5(a + 5, b + 5, swap1);
+++}
+++
+++static __always_inline void point_copy(u64 *output, u64 *input)
+++{
+++	memcpy(output, input, 5 * sizeof(*input));
+++	memcpy(output + 5, input + 5, 5 * sizeof(*input));
+++}
+++
+++static __always_inline void addanddouble_fmonty(u64 *pp, u64 *ppq, u64 *p,
+++						u64 *pq, u64 *qmqp)
+++{
+++	u64 *qx = qmqp;
+++	u64 *x2 = pp;
+++	u64 *z2 = pp + 5;
+++	u64 *x3 = ppq;
+++	u64 *z3 = ppq + 5;
+++	u64 *x = p;
+++	u64 *z = p + 5;
+++	u64 *xprime = pq;
+++	u64 *zprime = pq + 5;
+++	u64 buf[40] = { 0 };
+++	u64 *origx = buf;
+++	u64 *origxprime0 = buf + 5;
+++	u64 *xxprime0;
+++	u64 *zzprime0;
+++	u64 *origxprime;
+++	xxprime0 = buf + 25;
+++	zzprime0 = buf + 30;
+++	memcpy(origx, x, 5 * sizeof(*x));
+++	fsum(x, z);
+++	fdifference(z, origx);
+++	memcpy(origxprime0, xprime, 5 * sizeof(*xprime));
+++	fsum(xprime, zprime);
+++	fdifference(zprime, origxprime0);
+++	fmul(xxprime0, xprime, z);
+++	fmul(zzprime0, x, zprime);
+++	origxprime = buf + 5;
+++	{
+++		u64 *xx0;
+++		u64 *zz0;
+++		u64 *xxprime;
+++		u64 *zzprime;
+++		u64 *zzzprime;
+++		xx0 = buf + 15;
+++		zz0 = buf + 20;
+++		xxprime = buf + 25;
+++		zzprime = buf + 30;
+++		zzzprime = buf + 35;
+++		memcpy(origxprime, xxprime, 5 * sizeof(*xxprime));
+++		fsum(xxprime, zzprime);
+++		fdifference(zzprime, origxprime);
+++		fsquare_fsquare_times(x3, xxprime, 1);
+++		fsquare_fsquare_times(zzzprime, zzprime, 1);
+++		fmul(z3, zzzprime, qx);
+++		fsquare_fsquare_times(xx0, x, 1);
+++		fsquare_fsquare_times(zz0, z, 1);
+++		{
+++			u64 *zzz;
+++			u64 *xx;
+++			u64 *zz;
+++			u64 scalar;
+++			zzz = buf + 10;
+++			xx = buf + 15;
+++			zz = buf + 20;
+++			fmul(x2, xx, zz);
+++			fdifference(zz, xx);
+++			scalar = 121665;
+++			fscalar(zzz, zz, scalar);
+++			fsum(zzz, xx);
+++			fmul(z2, zzz, zz);
+++		}
+++	}
+++}
+++
+++static __always_inline void
+++ladder_smallloop_cmult_small_loop_step(u64 *nq, u64 *nqpq, u64 *nq2, u64 *nqpq2,
+++				       u64 *q, u8 byt)
+++{
+++	u64 bit0 = (u64)(byt >> 7);
+++	u64 bit;
+++	point_swap_conditional(nq, nqpq, bit0);
+++	addanddouble_fmonty(nq2, nqpq2, nq, nqpq, q);
+++	bit = (u64)(byt >> 7);
+++	point_swap_conditional(nq2, nqpq2, bit);
+++}
+++
+++static __always_inline void
+++ladder_smallloop_cmult_small_loop_double_step(u64 *nq, u64 *nqpq, u64 *nq2,
+++					      u64 *nqpq2, u64 *q, u8 byt)
+++{
+++	u8 byt1;
+++	ladder_smallloop_cmult_small_loop_step(nq, nqpq, nq2, nqpq2, q, byt);
+++	byt1 = byt << 1;
+++	ladder_smallloop_cmult_small_loop_step(nq2, nqpq2, nq, nqpq, q, byt1);
+++}
+++
+++static __always_inline void
+++ladder_smallloop_cmult_small_loop(u64 *nq, u64 *nqpq, u64 *nq2, u64 *nqpq2,
+++				  u64 *q, u8 byt, u32 i)
+++{
+++	while (i--) {
+++		ladder_smallloop_cmult_small_loop_double_step(nq, nqpq, nq2,
+++							      nqpq2, q, byt);
+++		byt <<= 2;
+++	}
+++}
+++
+++static __always_inline void ladder_bigloop_cmult_big_loop(u8 *n1, u64 *nq,
+++							  u64 *nqpq, u64 *nq2,
+++							  u64 *nqpq2, u64 *q,
+++							  u32 i)
+++{
+++	while (i--) {
+++		u8 byte = n1[i];
+++		ladder_smallloop_cmult_small_loop(nq, nqpq, nq2, nqpq2, q,
+++						  byte, 4);
+++	}
+++}
+++
+++static void ladder_cmult(u64 *result, u8 *n1, u64 *q)
+++{
+++	u64 point_buf[40] = { 0 };
+++	u64 *nq = point_buf;
+++	u64 *nqpq = point_buf + 10;
+++	u64 *nq2 = point_buf + 20;
+++	u64 *nqpq2 = point_buf + 30;
+++	point_copy(nqpq, q);
+++	nq[0] = 1;
+++	ladder_bigloop_cmult_big_loop(n1, nq, nqpq, nq2, nqpq2, q, 32);
+++	point_copy(result, nq);
+++}
+++
+++static __always_inline void format_fexpand(u64 *output, const u8 *input)
+++{
+++	const u8 *x00 = input + 6;
+++	const u8 *x01 = input + 12;
+++	const u8 *x02 = input + 19;
+++	const u8 *x0 = input + 24;
+++	u64 i0, i1, i2, i3, i4, output0, output1, output2, output3, output4;
+++	i0 = get_unaligned_le64(input);
+++	i1 = get_unaligned_le64(x00);
+++	i2 = get_unaligned_le64(x01);
+++	i3 = get_unaligned_le64(x02);
+++	i4 = get_unaligned_le64(x0);
+++	output0 = i0 & 0x7ffffffffffffLLU;
+++	output1 = i1 >> 3 & 0x7ffffffffffffLLU;
+++	output2 = i2 >> 6 & 0x7ffffffffffffLLU;
+++	output3 = i3 >> 1 & 0x7ffffffffffffLLU;
+++	output4 = i4 >> 12 & 0x7ffffffffffffLLU;
+++	output[0] = output0;
+++	output[1] = output1;
+++	output[2] = output2;
+++	output[3] = output3;
+++	output[4] = output4;
+++}
+++
+++static __always_inline void format_fcontract_first_carry_pass(u64 *input)
+++{
+++	u64 t0 = input[0];
+++	u64 t1 = input[1];
+++	u64 t2 = input[2];
+++	u64 t3 = input[3];
+++	u64 t4 = input[4];
+++	u64 t1_ = t1 + (t0 >> 51);
+++	u64 t0_ = t0 & 0x7ffffffffffffLLU;
+++	u64 t2_ = t2 + (t1_ >> 51);
+++	u64 t1__ = t1_ & 0x7ffffffffffffLLU;
+++	u64 t3_ = t3 + (t2_ >> 51);
+++	u64 t2__ = t2_ & 0x7ffffffffffffLLU;
+++	u64 t4_ = t4 + (t3_ >> 51);
+++	u64 t3__ = t3_ & 0x7ffffffffffffLLU;
+++	input[0] = t0_;
+++	input[1] = t1__;
+++	input[2] = t2__;
+++	input[3] = t3__;
+++	input[4] = t4_;
+++}
+++
+++static __always_inline void format_fcontract_first_carry_full(u64 *input)
+++{
+++	format_fcontract_first_carry_pass(input);
+++	modulo_carry_top(input);
+++}
+++
+++static __always_inline void format_fcontract_second_carry_pass(u64 *input)
+++{
+++	u64 t0 = input[0];
+++	u64 t1 = input[1];
+++	u64 t2 = input[2];
+++	u64 t3 = input[3];
+++	u64 t4 = input[4];
+++	u64 t1_ = t1 + (t0 >> 51);
+++	u64 t0_ = t0 & 0x7ffffffffffffLLU;
+++	u64 t2_ = t2 + (t1_ >> 51);
+++	u64 t1__ = t1_ & 0x7ffffffffffffLLU;
+++	u64 t3_ = t3 + (t2_ >> 51);
+++	u64 t2__ = t2_ & 0x7ffffffffffffLLU;
+++	u64 t4_ = t4 + (t3_ >> 51);
+++	u64 t3__ = t3_ & 0x7ffffffffffffLLU;
+++	input[0] = t0_;
+++	input[1] = t1__;
+++	input[2] = t2__;
+++	input[3] = t3__;
+++	input[4] = t4_;
+++}
+++
+++static __always_inline void format_fcontract_second_carry_full(u64 *input)
+++{
+++	u64 i0;
+++	u64 i1;
+++	u64 i0_;
+++	u64 i1_;
+++	format_fcontract_second_carry_pass(input);
+++	modulo_carry_top(input);
+++	i0 = input[0];
+++	i1 = input[1];
+++	i0_ = i0 & 0x7ffffffffffffLLU;
+++	i1_ = i1 + (i0 >> 51);
+++	input[0] = i0_;
+++	input[1] = i1_;
+++}
+++
+++static __always_inline void format_fcontract_trim(u64 *input)
+++{
+++	u64 a0 = input[0];
+++	u64 a1 = input[1];
+++	u64 a2 = input[2];
+++	u64 a3 = input[3];
+++	u64 a4 = input[4];
+++	u64 mask0 = u64_gte_mask(a0, 0x7ffffffffffedLLU);
+++	u64 mask1 = u64_eq_mask(a1, 0x7ffffffffffffLLU);
+++	u64 mask2 = u64_eq_mask(a2, 0x7ffffffffffffLLU);
+++	u64 mask3 = u64_eq_mask(a3, 0x7ffffffffffffLLU);
+++	u64 mask4 = u64_eq_mask(a4, 0x7ffffffffffffLLU);
+++	u64 mask = (((mask0 & mask1) & mask2) & mask3) & mask4;
+++	u64 a0_ = a0 - (0x7ffffffffffedLLU & mask);
+++	u64 a1_ = a1 - (0x7ffffffffffffLLU & mask);
+++	u64 a2_ = a2 - (0x7ffffffffffffLLU & mask);
+++	u64 a3_ = a3 - (0x7ffffffffffffLLU & mask);
+++	u64 a4_ = a4 - (0x7ffffffffffffLLU & mask);
+++	input[0] = a0_;
+++	input[1] = a1_;
+++	input[2] = a2_;
+++	input[3] = a3_;
+++	input[4] = a4_;
+++}
+++
+++static __always_inline void format_fcontract_store(u8 *output, u64 *input)
+++{
+++	u64 t0 = input[0];
+++	u64 t1 = input[1];
+++	u64 t2 = input[2];
+++	u64 t3 = input[3];
+++	u64 t4 = input[4];
+++	u64 o0 = t1 << 51 | t0;
+++	u64 o1 = t2 << 38 | t1 >> 13;
+++	u64 o2 = t3 << 25 | t2 >> 26;
+++	u64 o3 = t4 << 12 | t3 >> 39;
+++	u8 *b0 = output;
+++	u8 *b1 = output + 8;
+++	u8 *b2 = output + 16;
+++	u8 *b3 = output + 24;
+++	put_unaligned_le64(o0, b0);
+++	put_unaligned_le64(o1, b1);
+++	put_unaligned_le64(o2, b2);
+++	put_unaligned_le64(o3, b3);
+++}
+++
+++static __always_inline void format_fcontract(u8 *output, u64 *input)
+++{
+++	format_fcontract_first_carry_full(input);
+++	format_fcontract_second_carry_full(input);
+++	format_fcontract_trim(input);
+++	format_fcontract_store(output, input);
+++}
+++
+++static __always_inline void format_scalar_of_point(u8 *scalar, u64 *point)
+++{
+++	u64 *x = point;
+++	u64 *z = point + 5;
+++	u64 buf[10] __aligned(32) = { 0 };
+++	u64 *zmone = buf;
+++	u64 *sc = buf + 5;
+++	crecip(zmone, z);
+++	fmul(sc, x, zmone);
+++	format_fcontract(scalar, sc);
+++}
+++
+++void curve25519_generic(u8 mypublic[CURVE25519_KEY_SIZE],
+++			const u8 secret[CURVE25519_KEY_SIZE],
+++			const u8 basepoint[CURVE25519_KEY_SIZE])
+++{
+++	u64 buf0[10] __aligned(32) = { 0 };
+++	u64 *x0 = buf0;
+++	u64 *z = buf0 + 5;
+++	u64 *q;
+++	format_fexpand(x0, basepoint);
+++	z[0] = 1;
+++	q = buf0;
+++	{
+++		u8 e[32] __aligned(32) = { 0 };
+++		u8 *scalar;
+++		memcpy(e, secret, 32);
+++		curve25519_clamp_secret(e);
+++		scalar = e;
+++		{
+++			u64 buf[15] = { 0 };
+++			u64 *nq = buf;
+++			u64 *x = nq;
+++			x[0] = 1;
+++			ladder_cmult(nq, scalar, q);
+++			format_scalar_of_point(mypublic, nq);
+++			memzero_explicit(buf, sizeof(buf));
+++		}
+++		memzero_explicit(e, sizeof(e));
+++	}
+++	memzero_explicit(buf0, sizeof(buf0));
+++}
++--- /dev/null
+++++ b/lib/crypto/curve25519.c
++@@ -0,0 +1,25 @@
+++// SPDX-License-Identifier: GPL-2.0 OR MIT
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ *
+++ * This is an implementation of the Curve25519 ECDH algorithm, using either
+++ * a 32-bit implementation or a 64-bit implementation with 128-bit integers,
+++ * depending on what is supported by the target compiler.
+++ *
+++ * Information: https://cr.yp.to/ecdh.html
+++ */
+++
+++#include <crypto/curve25519.h>
+++#include <linux/module.h>
+++#include <linux/init.h>
+++
+++const u8 curve25519_null_point[CURVE25519_KEY_SIZE] __aligned(32) = { 0 };
+++const u8 curve25519_base_point[CURVE25519_KEY_SIZE] __aligned(32) = { 9 };
+++
+++EXPORT_SYMBOL(curve25519_null_point);
+++EXPORT_SYMBOL(curve25519_base_point);
+++EXPORT_SYMBOL(curve25519_generic);
+++
+++MODULE_LICENSE("GPL v2");
+++MODULE_DESCRIPTION("Curve25519 scalar multiplication");
+++MODULE_AUTHOR("Jason A. Donenfeld <Jason@zx2c4.com>");
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0026-crypto-curve25519-add-kpp-selftest.patch b/target/linux/generic/backport-5.4/080-wireguard-0026-crypto-curve25519-add-kpp-selftest.patch
+new file mode 100644
+index 0000000000..b2813aeb6a
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0026-crypto-curve25519-add-kpp-selftest.patch
+@@ -0,0 +1,1268 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:33 +0100
++Subject: [PATCH] crypto: curve25519 - add kpp selftest
++
++commit f613457a7af085728297bef71233c37faf3c01b1 upstream.
++
++In preparation of introducing KPP implementations of Curve25519, import
++the set of test cases proposed by the Zinc patch set, but converted to
++the KPP format.
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ crypto/testmgr.c |    6 +
++ crypto/testmgr.h | 1225 ++++++++++++++++++++++++++++++++++++++++++++++
++ 2 files changed, 1231 insertions(+)
++
++--- a/crypto/testmgr.c
+++++ b/crypto/testmgr.c
++@@ -4296,6 +4296,12 @@ static const struct alg_test_desc alg_te
++ 		.test = alg_test_null,
++ 		.fips_allowed = 1,
++ 	}, {
+++		.alg = "curve25519",
+++		.test = alg_test_kpp,
+++		.suite = {
+++			.kpp = __VECS(curve25519_tv_template)
+++		}
+++	}, {
++ 		.alg = "deflate",
++ 		.test = alg_test_comp,
++ 		.fips_allowed = 1,
++--- a/crypto/testmgr.h
+++++ b/crypto/testmgr.h
++@@ -1030,6 +1030,1231 @@ static const struct kpp_testvec dh_tv_te
++ 	}
++ };
++ 
+++static const struct kpp_testvec curve25519_tv_template[] = {
+++{
+++	.secret = (u8[32]){ 0x77, 0x07, 0x6d, 0x0a, 0x73, 0x18, 0xa5, 0x7d,
+++		     0x3c, 0x16, 0xc1, 0x72, 0x51, 0xb2, 0x66, 0x45,
+++		     0xdf, 0x4c, 0x2f, 0x87, 0xeb, 0xc0, 0x99, 0x2a,
+++		     0xb1, 0x77, 0xfb, 0xa5, 0x1d, 0xb9, 0x2c, 0x2a },
+++	.b_public = (u8[32]){ 0xde, 0x9e, 0xdb, 0x7d, 0x7b, 0x7d, 0xc1, 0xb4,
+++		    0xd3, 0x5b, 0x61, 0xc2, 0xec, 0xe4, 0x35, 0x37,
+++		    0x3f, 0x83, 0x43, 0xc8, 0x5b, 0x78, 0x67, 0x4d,
+++		    0xad, 0xfc, 0x7e, 0x14, 0x6f, 0x88, 0x2b, 0x4f },
+++	.expected_ss = (u8[32]){ 0x4a, 0x5d, 0x9d, 0x5b, 0xa4, 0xce, 0x2d, 0xe1,
+++		    0x72, 0x8e, 0x3b, 0xf4, 0x80, 0x35, 0x0f, 0x25,
+++		    0xe0, 0x7e, 0x21, 0xc9, 0x47, 0xd1, 0x9e, 0x33,
+++		    0x76, 0xf0, 0x9b, 0x3c, 0x1e, 0x16, 0x17, 0x42 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++{
+++	.secret = (u8[32]){ 0x5d, 0xab, 0x08, 0x7e, 0x62, 0x4a, 0x8a, 0x4b,
+++		     0x79, 0xe1, 0x7f, 0x8b, 0x83, 0x80, 0x0e, 0xe6,
+++		     0x6f, 0x3b, 0xb1, 0x29, 0x26, 0x18, 0xb6, 0xfd,
+++		     0x1c, 0x2f, 0x8b, 0x27, 0xff, 0x88, 0xe0, 0xeb },
+++	.b_public = (u8[32]){ 0x85, 0x20, 0xf0, 0x09, 0x89, 0x30, 0xa7, 0x54,
+++		    0x74, 0x8b, 0x7d, 0xdc, 0xb4, 0x3e, 0xf7, 0x5a,
+++		    0x0d, 0xbf, 0x3a, 0x0d, 0x26, 0x38, 0x1a, 0xf4,
+++		    0xeb, 0xa4, 0xa9, 0x8e, 0xaa, 0x9b, 0x4e, 0x6a },
+++	.expected_ss = (u8[32]){ 0x4a, 0x5d, 0x9d, 0x5b, 0xa4, 0xce, 0x2d, 0xe1,
+++		    0x72, 0x8e, 0x3b, 0xf4, 0x80, 0x35, 0x0f, 0x25,
+++		    0xe0, 0x7e, 0x21, 0xc9, 0x47, 0xd1, 0x9e, 0x33,
+++		    0x76, 0xf0, 0x9b, 0x3c, 0x1e, 0x16, 0x17, 0x42 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++{
+++	.secret = (u8[32]){ 1 },
+++	.b_public = (u8[32]){ 0x25, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++	.expected_ss = (u8[32]){ 0x3c, 0x77, 0x77, 0xca, 0xf9, 0x97, 0xb2, 0x64,
+++		    0x41, 0x60, 0x77, 0x66, 0x5b, 0x4e, 0x22, 0x9d,
+++		    0x0b, 0x95, 0x48, 0xdc, 0x0c, 0xd8, 0x19, 0x98,
+++		    0xdd, 0xcd, 0xc5, 0xc8, 0x53, 0x3c, 0x79, 0x7f },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++{
+++	.secret = (u8[32]){ 1 },
+++	.b_public = (u8[32]){ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++	.expected_ss = (u8[32]){ 0xb3, 0x2d, 0x13, 0x62, 0xc2, 0x48, 0xd6, 0x2f,
+++		    0xe6, 0x26, 0x19, 0xcf, 0xf0, 0x4d, 0xd4, 0x3d,
+++		    0xb7, 0x3f, 0xfc, 0x1b, 0x63, 0x08, 0xed, 0xe3,
+++		    0x0b, 0x78, 0xd8, 0x73, 0x80, 0xf1, 0xe8, 0x34 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++{
+++	.secret = (u8[32]){ 0xa5, 0x46, 0xe3, 0x6b, 0xf0, 0x52, 0x7c, 0x9d,
+++		     0x3b, 0x16, 0x15, 0x4b, 0x82, 0x46, 0x5e, 0xdd,
+++		     0x62, 0x14, 0x4c, 0x0a, 0xc1, 0xfc, 0x5a, 0x18,
+++		     0x50, 0x6a, 0x22, 0x44, 0xba, 0x44, 0x9a, 0xc4 },
+++	.b_public = (u8[32]){ 0xe6, 0xdb, 0x68, 0x67, 0x58, 0x30, 0x30, 0xdb,
+++		    0x35, 0x94, 0xc1, 0xa4, 0x24, 0xb1, 0x5f, 0x7c,
+++		    0x72, 0x66, 0x24, 0xec, 0x26, 0xb3, 0x35, 0x3b,
+++		    0x10, 0xa9, 0x03, 0xa6, 0xd0, 0xab, 0x1c, 0x4c },
+++	.expected_ss = (u8[32]){ 0xc3, 0xda, 0x55, 0x37, 0x9d, 0xe9, 0xc6, 0x90,
+++		    0x8e, 0x94, 0xea, 0x4d, 0xf2, 0x8d, 0x08, 0x4f,
+++		    0x32, 0xec, 0xcf, 0x03, 0x49, 0x1c, 0x71, 0xf7,
+++		    0x54, 0xb4, 0x07, 0x55, 0x77, 0xa2, 0x85, 0x52 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++{
+++	.secret = (u8[32]){ 0xff, 0xff, 0xff, 0xff, 0x0a, 0xff, 0xff, 0xff,
+++		     0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		     0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		     0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++	.b_public = (u8[32]){ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0x0a, 0x00, 0xfb, 0x9f },
+++	.expected_ss = (u8[32]){ 0x77, 0x52, 0xb6, 0x18, 0xc1, 0x2d, 0x48, 0xd2,
+++		    0xc6, 0x93, 0x46, 0x83, 0x81, 0x7c, 0xc6, 0x57,
+++		    0xf3, 0x31, 0x03, 0x19, 0x49, 0x48, 0x20, 0x05,
+++		    0x42, 0x2b, 0x4e, 0xae, 0x8d, 0x1d, 0x43, 0x23 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++{
+++	.secret = (u8[32]){ 0x8e, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++	.b_public = (u8[32]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8e, 0x06 },
+++	.expected_ss = (u8[32]){ 0x5a, 0xdf, 0xaa, 0x25, 0x86, 0x8e, 0x32, 0x3d,
+++		    0xae, 0x49, 0x62, 0xc1, 0x01, 0x5c, 0xb3, 0x12,
+++		    0xe1, 0xc5, 0xc7, 0x9e, 0x95, 0x3f, 0x03, 0x99,
+++		    0xb0, 0xba, 0x16, 0x22, 0xf3, 0xb6, 0xf7, 0x0c },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - normal case */
+++{
+++	.secret = (u8[32]){ 0x48, 0x52, 0x83, 0x4d, 0x9d, 0x6b, 0x77, 0xda,
+++		     0xde, 0xab, 0xaa, 0xf2, 0xe1, 0x1d, 0xca, 0x66,
+++		     0xd1, 0x9f, 0xe7, 0x49, 0x93, 0xa7, 0xbe, 0xc3,
+++		     0x6c, 0x6e, 0x16, 0xa0, 0x98, 0x3f, 0xea, 0xba },
+++	.b_public = (u8[32]){ 0x9c, 0x64, 0x7d, 0x9a, 0xe5, 0x89, 0xb9, 0xf5,
+++		    0x8f, 0xdc, 0x3c, 0xa4, 0x94, 0x7e, 0xfb, 0xc9,
+++		    0x15, 0xc4, 0xb2, 0xe0, 0x8e, 0x74, 0x4a, 0x0e,
+++		    0xdf, 0x46, 0x9d, 0xac, 0x59, 0xc8, 0xf8, 0x5a },
+++	.expected_ss = (u8[32]){ 0x87, 0xb7, 0xf2, 0x12, 0xb6, 0x27, 0xf7, 0xa5,
+++		    0x4c, 0xa5, 0xe0, 0xbc, 0xda, 0xdd, 0xd5, 0x38,
+++		    0x9d, 0x9d, 0xe6, 0x15, 0x6c, 0xdb, 0xcf, 0x8e,
+++		    0xbe, 0x14, 0xff, 0xbc, 0xfb, 0x43, 0x65, 0x51 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key on twist */
+++{
+++	.secret = (u8[32]){ 0x58, 0x8c, 0x06, 0x1a, 0x50, 0x80, 0x4a, 0xc4,
+++		     0x88, 0xad, 0x77, 0x4a, 0xc7, 0x16, 0xc3, 0xf5,
+++		     0xba, 0x71, 0x4b, 0x27, 0x12, 0xe0, 0x48, 0x49,
+++		     0x13, 0x79, 0xa5, 0x00, 0x21, 0x19, 0x98, 0xa8 },
+++	.b_public = (u8[32]){ 0x63, 0xaa, 0x40, 0xc6, 0xe3, 0x83, 0x46, 0xc5,
+++		    0xca, 0xf2, 0x3a, 0x6d, 0xf0, 0xa5, 0xe6, 0xc8,
+++		    0x08, 0x89, 0xa0, 0x86, 0x47, 0xe5, 0x51, 0xb3,
+++		    0x56, 0x34, 0x49, 0xbe, 0xfc, 0xfc, 0x97, 0x33 },
+++	.expected_ss = (u8[32]){ 0xb1, 0xa7, 0x07, 0x51, 0x94, 0x95, 0xff, 0xff,
+++		    0xb2, 0x98, 0xff, 0x94, 0x17, 0x16, 0xb0, 0x6d,
+++		    0xfa, 0xb8, 0x7c, 0xf8, 0xd9, 0x11, 0x23, 0xfe,
+++		    0x2b, 0xe9, 0xa2, 0x33, 0xdd, 0xa2, 0x22, 0x12 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key on twist */
+++{
+++	.secret = (u8[32]){ 0xb0, 0x5b, 0xfd, 0x32, 0xe5, 0x53, 0x25, 0xd9,
+++		     0xfd, 0x64, 0x8c, 0xb3, 0x02, 0x84, 0x80, 0x39,
+++		     0x00, 0x0b, 0x39, 0x0e, 0x44, 0xd5, 0x21, 0xe5,
+++		     0x8a, 0xab, 0x3b, 0x29, 0xa6, 0x96, 0x0b, 0xa8 },
+++	.b_public = (u8[32]){ 0x0f, 0x83, 0xc3, 0x6f, 0xde, 0xd9, 0xd3, 0x2f,
+++		    0xad, 0xf4, 0xef, 0xa3, 0xae, 0x93, 0xa9, 0x0b,
+++		    0xb5, 0xcf, 0xa6, 0x68, 0x93, 0xbc, 0x41, 0x2c,
+++		    0x43, 0xfa, 0x72, 0x87, 0xdb, 0xb9, 0x97, 0x79 },
+++	.expected_ss = (u8[32]){ 0x67, 0xdd, 0x4a, 0x6e, 0x16, 0x55, 0x33, 0x53,
+++		    0x4c, 0x0e, 0x3f, 0x17, 0x2e, 0x4a, 0xb8, 0x57,
+++		    0x6b, 0xca, 0x92, 0x3a, 0x5f, 0x07, 0xb2, 0xc0,
+++		    0x69, 0xb4, 0xc3, 0x10, 0xff, 0x2e, 0x93, 0x5b },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key on twist */
+++{
+++	.secret = (u8[32]){ 0x70, 0xe3, 0x4b, 0xcb, 0xe1, 0xf4, 0x7f, 0xbc,
+++		     0x0f, 0xdd, 0xfd, 0x7c, 0x1e, 0x1a, 0xa5, 0x3d,
+++		     0x57, 0xbf, 0xe0, 0xf6, 0x6d, 0x24, 0x30, 0x67,
+++		     0xb4, 0x24, 0xbb, 0x62, 0x10, 0xbe, 0xd1, 0x9c },
+++	.b_public = (u8[32]){ 0x0b, 0x82, 0x11, 0xa2, 0xb6, 0x04, 0x90, 0x97,
+++		    0xf6, 0x87, 0x1c, 0x6c, 0x05, 0x2d, 0x3c, 0x5f,
+++		    0xc1, 0xba, 0x17, 0xda, 0x9e, 0x32, 0xae, 0x45,
+++		    0x84, 0x03, 0xb0, 0x5b, 0xb2, 0x83, 0x09, 0x2a },
+++	.expected_ss = (u8[32]){ 0x4a, 0x06, 0x38, 0xcf, 0xaa, 0x9e, 0xf1, 0x93,
+++		    0x3b, 0x47, 0xf8, 0x93, 0x92, 0x96, 0xa6, 0xb2,
+++		    0x5b, 0xe5, 0x41, 0xef, 0x7f, 0x70, 0xe8, 0x44,
+++		    0xc0, 0xbc, 0xc0, 0x0b, 0x13, 0x4d, 0xe6, 0x4a },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key on twist */
+++{
+++	.secret = (u8[32]){ 0x68, 0xc1, 0xf3, 0xa6, 0x53, 0xa4, 0xcd, 0xb1,
+++		     0xd3, 0x7b, 0xba, 0x94, 0x73, 0x8f, 0x8b, 0x95,
+++		     0x7a, 0x57, 0xbe, 0xb2, 0x4d, 0x64, 0x6e, 0x99,
+++		     0x4d, 0xc2, 0x9a, 0x27, 0x6a, 0xad, 0x45, 0x8d },
+++	.b_public = (u8[32]){ 0x34, 0x3a, 0xc2, 0x0a, 0x3b, 0x9c, 0x6a, 0x27,
+++		    0xb1, 0x00, 0x81, 0x76, 0x50, 0x9a, 0xd3, 0x07,
+++		    0x35, 0x85, 0x6e, 0xc1, 0xc8, 0xd8, 0xfc, 0xae,
+++		    0x13, 0x91, 0x2d, 0x08, 0xd1, 0x52, 0xf4, 0x6c },
+++	.expected_ss = (u8[32]){ 0x39, 0x94, 0x91, 0xfc, 0xe8, 0xdf, 0xab, 0x73,
+++		    0xb4, 0xf9, 0xf6, 0x11, 0xde, 0x8e, 0xa0, 0xb2,
+++		    0x7b, 0x28, 0xf8, 0x59, 0x94, 0x25, 0x0b, 0x0f,
+++		    0x47, 0x5d, 0x58, 0x5d, 0x04, 0x2a, 0xc2, 0x07 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key on twist */
+++{
+++	.secret = (u8[32]){ 0xd8, 0x77, 0xb2, 0x6d, 0x06, 0xdf, 0xf9, 0xd9,
+++		     0xf7, 0xfd, 0x4c, 0x5b, 0x37, 0x69, 0xf8, 0xcd,
+++		     0xd5, 0xb3, 0x05, 0x16, 0xa5, 0xab, 0x80, 0x6b,
+++		     0xe3, 0x24, 0xff, 0x3e, 0xb6, 0x9e, 0xa0, 0xb2 },
+++	.b_public = (u8[32]){ 0xfa, 0x69, 0x5f, 0xc7, 0xbe, 0x8d, 0x1b, 0xe5,
+++		    0xbf, 0x70, 0x48, 0x98, 0xf3, 0x88, 0xc4, 0x52,
+++		    0xba, 0xfd, 0xd3, 0xb8, 0xea, 0xe8, 0x05, 0xf8,
+++		    0x68, 0x1a, 0x8d, 0x15, 0xc2, 0xd4, 0xe1, 0x42 },
+++	.expected_ss = (u8[32]){ 0x2c, 0x4f, 0xe1, 0x1d, 0x49, 0x0a, 0x53, 0x86,
+++		    0x17, 0x76, 0xb1, 0x3b, 0x43, 0x54, 0xab, 0xd4,
+++		    0xcf, 0x5a, 0x97, 0x69, 0x9d, 0xb6, 0xe6, 0xc6,
+++		    0x8c, 0x16, 0x26, 0xd0, 0x76, 0x62, 0xf7, 0x58 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case on twist */
+++{
+++	.secret = (u8[32]){ 0x38, 0xdd, 0xe9, 0xf3, 0xe7, 0xb7, 0x99, 0x04,
+++		     0x5f, 0x9a, 0xc3, 0x79, 0x3d, 0x4a, 0x92, 0x77,
+++		     0xda, 0xde, 0xad, 0xc4, 0x1b, 0xec, 0x02, 0x90,
+++		     0xf8, 0x1f, 0x74, 0x4f, 0x73, 0x77, 0x5f, 0x84 },
+++	.b_public = (u8[32]){ 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++	.expected_ss = (u8[32]){ 0x9a, 0x2c, 0xfe, 0x84, 0xff, 0x9c, 0x4a, 0x97,
+++		    0x39, 0x62, 0x5c, 0xae, 0x4a, 0x3b, 0x82, 0xa9,
+++		    0x06, 0x87, 0x7a, 0x44, 0x19, 0x46, 0xf8, 0xd7,
+++		    0xb3, 0xd7, 0x95, 0xfe, 0x8f, 0x5d, 0x16, 0x39 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case on twist */
+++{
+++	.secret = (u8[32]){ 0x98, 0x57, 0xa9, 0x14, 0xe3, 0xc2, 0x90, 0x36,
+++		     0xfd, 0x9a, 0x44, 0x2b, 0xa5, 0x26, 0xb5, 0xcd,
+++		     0xcd, 0xf2, 0x82, 0x16, 0x15, 0x3e, 0x63, 0x6c,
+++		     0x10, 0x67, 0x7a, 0xca, 0xb6, 0xbd, 0x6a, 0xa5 },
+++	.b_public = (u8[32]){ 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++	.expected_ss = (u8[32]){ 0x4d, 0xa4, 0xe0, 0xaa, 0x07, 0x2c, 0x23, 0x2e,
+++		    0xe2, 0xf0, 0xfa, 0x4e, 0x51, 0x9a, 0xe5, 0x0b,
+++		    0x52, 0xc1, 0xed, 0xd0, 0x8a, 0x53, 0x4d, 0x4e,
+++		    0xf3, 0x46, 0xc2, 0xe1, 0x06, 0xd2, 0x1d, 0x60 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case on twist */
+++{
+++	.secret = (u8[32]){ 0x48, 0xe2, 0x13, 0x0d, 0x72, 0x33, 0x05, 0xed,
+++		     0x05, 0xe6, 0xe5, 0x89, 0x4d, 0x39, 0x8a, 0x5e,
+++		     0x33, 0x36, 0x7a, 0x8c, 0x6a, 0xac, 0x8f, 0xcd,
+++		     0xf0, 0xa8, 0x8e, 0x4b, 0x42, 0x82, 0x0d, 0xb7 },
+++	.b_public = (u8[32]){ 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0xf8, 0xff,
+++		    0xff, 0x1f, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff,
+++		    0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x07, 0x00,
+++		    0x00, 0xf0, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00 },
+++	.expected_ss = (u8[32]){ 0x9e, 0xd1, 0x0c, 0x53, 0x74, 0x7f, 0x64, 0x7f,
+++		    0x82, 0xf4, 0x51, 0x25, 0xd3, 0xde, 0x15, 0xa1,
+++		    0xe6, 0xb8, 0x24, 0x49, 0x6a, 0xb4, 0x04, 0x10,
+++		    0xff, 0xcc, 0x3c, 0xfe, 0x95, 0x76, 0x0f, 0x3b },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case on twist */
+++{
+++	.secret = (u8[32]){ 0x28, 0xf4, 0x10, 0x11, 0x69, 0x18, 0x51, 0xb3,
+++		     0xa6, 0x2b, 0x64, 0x15, 0x53, 0xb3, 0x0d, 0x0d,
+++		     0xfd, 0xdc, 0xb8, 0xff, 0xfc, 0xf5, 0x37, 0x00,
+++		     0xa7, 0xbe, 0x2f, 0x6a, 0x87, 0x2e, 0x9f, 0xb0 },
+++	.b_public = (u8[32]){ 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0x07, 0x00,
+++		    0x00, 0xe0, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00,
+++		    0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0xf8, 0xff,
+++		    0xff, 0x0f, 0x00, 0x00, 0xc0, 0xff, 0xff, 0x7f },
+++	.expected_ss = (u8[32]){ 0xcf, 0x72, 0xb4, 0xaa, 0x6a, 0xa1, 0xc9, 0xf8,
+++		    0x94, 0xf4, 0x16, 0x5b, 0x86, 0x10, 0x9a, 0xa4,
+++		    0x68, 0x51, 0x76, 0x48, 0xe1, 0xf0, 0xcc, 0x70,
+++		    0xe1, 0xab, 0x08, 0x46, 0x01, 0x76, 0x50, 0x6b },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case on twist */
+++{
+++	.secret = (u8[32]){ 0x18, 0xa9, 0x3b, 0x64, 0x99, 0xb9, 0xf6, 0xb3,
+++		     0x22, 0x5c, 0xa0, 0x2f, 0xef, 0x41, 0x0e, 0x0a,
+++		     0xde, 0xc2, 0x35, 0x32, 0x32, 0x1d, 0x2d, 0x8e,
+++		     0xf1, 0xa6, 0xd6, 0x02, 0xa8, 0xc6, 0x5b, 0x83 },
+++	.b_public = (u8[32]){ 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++		    0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++		    0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++		    0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f },
+++	.expected_ss = (u8[32]){ 0x5d, 0x50, 0xb6, 0x28, 0x36, 0xbb, 0x69, 0x57,
+++		    0x94, 0x10, 0x38, 0x6c, 0xf7, 0xbb, 0x81, 0x1c,
+++		    0x14, 0xbf, 0x85, 0xb1, 0xc7, 0xb1, 0x7e, 0x59,
+++		    0x24, 0xc7, 0xff, 0xea, 0x91, 0xef, 0x9e, 0x12 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case on twist */
+++{
+++	.secret = (u8[32]){ 0xc0, 0x1d, 0x13, 0x05, 0xa1, 0x33, 0x8a, 0x1f,
+++		     0xca, 0xc2, 0xba, 0x7e, 0x2e, 0x03, 0x2b, 0x42,
+++		     0x7e, 0x0b, 0x04, 0x90, 0x31, 0x65, 0xac, 0xa9,
+++		     0x57, 0xd8, 0xd0, 0x55, 0x3d, 0x87, 0x17, 0xb0 },
+++	.b_public = (u8[32]){ 0xea, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++	.expected_ss = (u8[32]){ 0x19, 0x23, 0x0e, 0xb1, 0x48, 0xd5, 0xd6, 0x7c,
+++		    0x3c, 0x22, 0xab, 0x1d, 0xae, 0xff, 0x80, 0xa5,
+++		    0x7e, 0xae, 0x42, 0x65, 0xce, 0x28, 0x72, 0x65,
+++		    0x7b, 0x2c, 0x80, 0x99, 0xfc, 0x69, 0x8e, 0x50 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for public key */
+++{
+++	.secret = (u8[32]){ 0x38, 0x6f, 0x7f, 0x16, 0xc5, 0x07, 0x31, 0xd6,
+++		     0x4f, 0x82, 0xe6, 0xa1, 0x70, 0xb1, 0x42, 0xa4,
+++		     0xe3, 0x4f, 0x31, 0xfd, 0x77, 0x68, 0xfc, 0xb8,
+++		     0x90, 0x29, 0x25, 0xe7, 0xd1, 0xe2, 0x1a, 0xbe },
+++	.b_public = (u8[32]){ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++	.expected_ss = (u8[32]){ 0x0f, 0xca, 0xb5, 0xd8, 0x42, 0xa0, 0x78, 0xd7,
+++		    0xa7, 0x1f, 0xc5, 0x9b, 0x57, 0xbf, 0xb4, 0xca,
+++		    0x0b, 0xe6, 0x87, 0x3b, 0x49, 0xdc, 0xdb, 0x9f,
+++		    0x44, 0xe1, 0x4a, 0xe8, 0xfb, 0xdf, 0xa5, 0x42 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for public key */
+++{
+++	.secret = (u8[32]){ 0xe0, 0x23, 0xa2, 0x89, 0xbd, 0x5e, 0x90, 0xfa,
+++		     0x28, 0x04, 0xdd, 0xc0, 0x19, 0xa0, 0x5e, 0xf3,
+++		     0xe7, 0x9d, 0x43, 0x4b, 0xb6, 0xea, 0x2f, 0x52,
+++		     0x2e, 0xcb, 0x64, 0x3a, 0x75, 0x29, 0x6e, 0x95 },
+++	.b_public = (u8[32]){ 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++		    0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++		    0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++		    0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 },
+++	.expected_ss = (u8[32]){ 0x54, 0xce, 0x8f, 0x22, 0x75, 0xc0, 0x77, 0xe3,
+++		    0xb1, 0x30, 0x6a, 0x39, 0x39, 0xc5, 0xe0, 0x3e,
+++		    0xef, 0x6b, 0xbb, 0x88, 0x06, 0x05, 0x44, 0x75,
+++		    0x8d, 0x9f, 0xef, 0x59, 0xb0, 0xbc, 0x3e, 0x4f },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for public key */
+++{
+++	.secret = (u8[32]){ 0x68, 0xf0, 0x10, 0xd6, 0x2e, 0xe8, 0xd9, 0x26,
+++		     0x05, 0x3a, 0x36, 0x1c, 0x3a, 0x75, 0xc6, 0xea,
+++		     0x4e, 0xbd, 0xc8, 0x60, 0x6a, 0xb2, 0x85, 0x00,
+++		     0x3a, 0x6f, 0x8f, 0x40, 0x76, 0xb0, 0x1e, 0x83 },
+++	.b_public = (u8[32]){ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x03 },
+++	.expected_ss = (u8[32]){ 0xf1, 0x36, 0x77, 0x5c, 0x5b, 0xeb, 0x0a, 0xf8,
+++		    0x11, 0x0a, 0xf1, 0x0b, 0x20, 0x37, 0x23, 0x32,
+++		    0x04, 0x3c, 0xab, 0x75, 0x24, 0x19, 0x67, 0x87,
+++		    0x75, 0xa2, 0x23, 0xdf, 0x57, 0xc9, 0xd3, 0x0d },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for public key */
+++{
+++	.secret = (u8[32]){ 0x58, 0xeb, 0xcb, 0x35, 0xb0, 0xf8, 0x84, 0x5c,
+++		     0xaf, 0x1e, 0xc6, 0x30, 0xf9, 0x65, 0x76, 0xb6,
+++		     0x2c, 0x4b, 0x7b, 0x6c, 0x36, 0xb2, 0x9d, 0xeb,
+++		     0x2c, 0xb0, 0x08, 0x46, 0x51, 0x75, 0x5c, 0x96 },
+++	.b_public = (u8[32]){ 0xff, 0xff, 0xff, 0xfb, 0xff, 0xff, 0xfb, 0xff,
+++		    0xff, 0xdf, 0xff, 0xff, 0xdf, 0xff, 0xff, 0xff,
+++		    0xfe, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xf7, 0xff,
+++		    0xff, 0xf7, 0xff, 0xff, 0xbf, 0xff, 0xff, 0x3f },
+++	.expected_ss = (u8[32]){ 0xbf, 0x9a, 0xff, 0xd0, 0x6b, 0x84, 0x40, 0x85,
+++		    0x58, 0x64, 0x60, 0x96, 0x2e, 0xf2, 0x14, 0x6f,
+++		    0xf3, 0xd4, 0x53, 0x3d, 0x94, 0x44, 0xaa, 0xb0,
+++		    0x06, 0xeb, 0x88, 0xcc, 0x30, 0x54, 0x40, 0x7d },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for public key */
+++{
+++	.secret = (u8[32]){ 0x18, 0x8c, 0x4b, 0xc5, 0xb9, 0xc4, 0x4b, 0x38,
+++		     0xbb, 0x65, 0x8b, 0x9b, 0x2a, 0xe8, 0x2d, 0x5b,
+++		     0x01, 0x01, 0x5e, 0x09, 0x31, 0x84, 0xb1, 0x7c,
+++		     0xb7, 0x86, 0x35, 0x03, 0xa7, 0x83, 0xe1, 0xbb },
+++	.b_public = (u8[32]){ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f },
+++	.expected_ss = (u8[32]){ 0xd4, 0x80, 0xde, 0x04, 0xf6, 0x99, 0xcb, 0x3b,
+++		    0xe0, 0x68, 0x4a, 0x9c, 0xc2, 0xe3, 0x12, 0x81,
+++		    0xea, 0x0b, 0xc5, 0xa9, 0xdc, 0xc1, 0x57, 0xd3,
+++		    0xd2, 0x01, 0x58, 0xd4, 0x6c, 0xa5, 0x24, 0x6d },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for public key */
+++{
+++	.secret = (u8[32]){ 0xe0, 0x6c, 0x11, 0xbb, 0x2e, 0x13, 0xce, 0x3d,
+++		     0xc7, 0x67, 0x3f, 0x67, 0xf5, 0x48, 0x22, 0x42,
+++		     0x90, 0x94, 0x23, 0xa9, 0xae, 0x95, 0xee, 0x98,
+++		     0x6a, 0x98, 0x8d, 0x98, 0xfa, 0xee, 0x23, 0xa2 },
+++	.b_public = (u8[32]){ 0xff, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0x7f,
+++		    0xff, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0x7f,
+++		    0xff, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0x7f,
+++		    0xff, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0x7f },
+++	.expected_ss = (u8[32]){ 0x4c, 0x44, 0x01, 0xcc, 0xe6, 0xb5, 0x1e, 0x4c,
+++		    0xb1, 0x8f, 0x27, 0x90, 0x24, 0x6c, 0x9b, 0xf9,
+++		    0x14, 0xdb, 0x66, 0x77, 0x50, 0xa1, 0xcb, 0x89,
+++		    0x06, 0x90, 0x92, 0xaf, 0x07, 0x29, 0x22, 0x76 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for public key */
+++{
+++	.secret = (u8[32]){ 0xc0, 0x65, 0x8c, 0x46, 0xdd, 0xe1, 0x81, 0x29,
+++		     0x29, 0x38, 0x77, 0x53, 0x5b, 0x11, 0x62, 0xb6,
+++		     0xf9, 0xf5, 0x41, 0x4a, 0x23, 0xcf, 0x4d, 0x2c,
+++		     0xbc, 0x14, 0x0a, 0x4d, 0x99, 0xda, 0x2b, 0x8f },
+++	.b_public = (u8[32]){ 0xeb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++	.expected_ss = (u8[32]){ 0x57, 0x8b, 0xa8, 0xcc, 0x2d, 0xbd, 0xc5, 0x75,
+++		    0xaf, 0xcf, 0x9d, 0xf2, 0xb3, 0xee, 0x61, 0x89,
+++		    0xf5, 0x33, 0x7d, 0x68, 0x54, 0xc7, 0x9b, 0x4c,
+++		    0xe1, 0x65, 0xea, 0x12, 0x29, 0x3b, 0x3a, 0x0f },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key >= p */
+++{
+++	.secret = (u8[32]){ 0xf0, 0x1e, 0x48, 0xda, 0xfa, 0xc9, 0xd7, 0xbc,
+++		     0xf5, 0x89, 0xcb, 0xc3, 0x82, 0xc8, 0x78, 0xd1,
+++		     0x8b, 0xda, 0x35, 0x50, 0x58, 0x9f, 0xfb, 0x5d,
+++		     0x50, 0xb5, 0x23, 0xbe, 0xbe, 0x32, 0x9d, 0xae },
+++	.b_public = (u8[32]){ 0xef, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++	.expected_ss = (u8[32]){ 0xbd, 0x36, 0xa0, 0x79, 0x0e, 0xb8, 0x83, 0x09,
+++		    0x8c, 0x98, 0x8b, 0x21, 0x78, 0x67, 0x73, 0xde,
+++		    0x0b, 0x3a, 0x4d, 0xf1, 0x62, 0x28, 0x2c, 0xf1,
+++		    0x10, 0xde, 0x18, 0xdd, 0x48, 0x4c, 0xe7, 0x4b },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key >= p */
+++{
+++	.secret = (u8[32]){ 0x28, 0x87, 0x96, 0xbc, 0x5a, 0xff, 0x4b, 0x81,
+++		     0xa3, 0x75, 0x01, 0x75, 0x7b, 0xc0, 0x75, 0x3a,
+++		     0x3c, 0x21, 0x96, 0x47, 0x90, 0xd3, 0x86, 0x99,
+++		     0x30, 0x8d, 0xeb, 0xc1, 0x7a, 0x6e, 0xaf, 0x8d },
+++	.b_public = (u8[32]){ 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++	.expected_ss = (u8[32]){ 0xb4, 0xe0, 0xdd, 0x76, 0xda, 0x7b, 0x07, 0x17,
+++		    0x28, 0xb6, 0x1f, 0x85, 0x67, 0x71, 0xaa, 0x35,
+++		    0x6e, 0x57, 0xed, 0xa7, 0x8a, 0x5b, 0x16, 0x55,
+++		    0xcc, 0x38, 0x20, 0xfb, 0x5f, 0x85, 0x4c, 0x5c },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key >= p */
+++{
+++	.secret = (u8[32]){ 0x98, 0xdf, 0x84, 0x5f, 0x66, 0x51, 0xbf, 0x11,
+++		     0x38, 0x22, 0x1f, 0x11, 0x90, 0x41, 0xf7, 0x2b,
+++		     0x6d, 0xbc, 0x3c, 0x4a, 0xce, 0x71, 0x43, 0xd9,
+++		     0x9f, 0xd5, 0x5a, 0xd8, 0x67, 0x48, 0x0d, 0xa8 },
+++	.b_public = (u8[32]){ 0xf1, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++	.expected_ss = (u8[32]){ 0x6f, 0xdf, 0x6c, 0x37, 0x61, 0x1d, 0xbd, 0x53,
+++		    0x04, 0xdc, 0x0f, 0x2e, 0xb7, 0xc9, 0x51, 0x7e,
+++		    0xb3, 0xc5, 0x0e, 0x12, 0xfd, 0x05, 0x0a, 0xc6,
+++		    0xde, 0xc2, 0x70, 0x71, 0xd4, 0xbf, 0xc0, 0x34 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key >= p */
+++{
+++	.secret = (u8[32]){ 0xf0, 0x94, 0x98, 0xe4, 0x6f, 0x02, 0xf8, 0x78,
+++		     0x82, 0x9e, 0x78, 0xb8, 0x03, 0xd3, 0x16, 0xa2,
+++		     0xed, 0x69, 0x5d, 0x04, 0x98, 0xa0, 0x8a, 0xbd,
+++		     0xf8, 0x27, 0x69, 0x30, 0xe2, 0x4e, 0xdc, 0xb0 },
+++	.b_public = (u8[32]){ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++	.expected_ss = (u8[32]){ 0x4c, 0x8f, 0xc4, 0xb1, 0xc6, 0xab, 0x88, 0xfb,
+++		    0x21, 0xf1, 0x8f, 0x6d, 0x4c, 0x81, 0x02, 0x40,
+++		    0xd4, 0xe9, 0x46, 0x51, 0xba, 0x44, 0xf7, 0xa2,
+++		    0xc8, 0x63, 0xce, 0xc7, 0xdc, 0x56, 0x60, 0x2d },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key >= p */
+++{
+++	.secret = (u8[32]){ 0x18, 0x13, 0xc1, 0x0a, 0x5c, 0x7f, 0x21, 0xf9,
+++		     0x6e, 0x17, 0xf2, 0x88, 0xc0, 0xcc, 0x37, 0x60,
+++		     0x7c, 0x04, 0xc5, 0xf5, 0xae, 0xa2, 0xdb, 0x13,
+++		     0x4f, 0x9e, 0x2f, 0xfc, 0x66, 0xbd, 0x9d, 0xb8 },
+++	.b_public = (u8[32]){ 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80 },
+++	.expected_ss = (u8[32]){ 0x1c, 0xd0, 0xb2, 0x82, 0x67, 0xdc, 0x54, 0x1c,
+++		    0x64, 0x2d, 0x6d, 0x7d, 0xca, 0x44, 0xa8, 0xb3,
+++		    0x8a, 0x63, 0x73, 0x6e, 0xef, 0x5c, 0x4e, 0x65,
+++		    0x01, 0xff, 0xbb, 0xb1, 0x78, 0x0c, 0x03, 0x3c },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key >= p */
+++{
+++	.secret = (u8[32]){ 0x78, 0x57, 0xfb, 0x80, 0x86, 0x53, 0x64, 0x5a,
+++		     0x0b, 0xeb, 0x13, 0x8a, 0x64, 0xf5, 0xf4, 0xd7,
+++		     0x33, 0xa4, 0x5e, 0xa8, 0x4c, 0x3c, 0xda, 0x11,
+++		     0xa9, 0xc0, 0x6f, 0x7e, 0x71, 0x39, 0x14, 0x9e },
+++	.b_public = (u8[32]){ 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80 },
+++	.expected_ss = (u8[32]){ 0x87, 0x55, 0xbe, 0x01, 0xc6, 0x0a, 0x7e, 0x82,
+++		    0x5c, 0xff, 0x3e, 0x0e, 0x78, 0xcb, 0x3a, 0xa4,
+++		    0x33, 0x38, 0x61, 0x51, 0x6a, 0xa5, 0x9b, 0x1c,
+++		    0x51, 0xa8, 0xb2, 0xa5, 0x43, 0xdf, 0xa8, 0x22 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key >= p */
+++{
+++	.secret = (u8[32]){ 0xe0, 0x3a, 0xa8, 0x42, 0xe2, 0xab, 0xc5, 0x6e,
+++		     0x81, 0xe8, 0x7b, 0x8b, 0x9f, 0x41, 0x7b, 0x2a,
+++		     0x1e, 0x59, 0x13, 0xc7, 0x23, 0xee, 0xd2, 0x8d,
+++		     0x75, 0x2f, 0x8d, 0x47, 0xa5, 0x9f, 0x49, 0x8f },
+++	.b_public = (u8[32]){ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80 },
+++	.expected_ss = (u8[32]){ 0x54, 0xc9, 0xa1, 0xed, 0x95, 0xe5, 0x46, 0xd2,
+++		    0x78, 0x22, 0xa3, 0x60, 0x93, 0x1d, 0xda, 0x60,
+++		    0xa1, 0xdf, 0x04, 0x9d, 0xa6, 0xf9, 0x04, 0x25,
+++		    0x3c, 0x06, 0x12, 0xbb, 0xdc, 0x08, 0x74, 0x76 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key >= p */
+++{
+++	.secret = (u8[32]){ 0xf8, 0xf7, 0x07, 0xb7, 0x99, 0x9b, 0x18, 0xcb,
+++		     0x0d, 0x6b, 0x96, 0x12, 0x4f, 0x20, 0x45, 0x97,
+++		     0x2c, 0xa2, 0x74, 0xbf, 0xc1, 0x54, 0xad, 0x0c,
+++		     0x87, 0x03, 0x8c, 0x24, 0xc6, 0xd0, 0xd4, 0xb2 },
+++	.b_public = (u8[32]){ 0xda, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++	.expected_ss = (u8[32]){ 0xcc, 0x1f, 0x40, 0xd7, 0x43, 0xcd, 0xc2, 0x23,
+++		    0x0e, 0x10, 0x43, 0xda, 0xba, 0x8b, 0x75, 0xe8,
+++		    0x10, 0xf1, 0xfb, 0xab, 0x7f, 0x25, 0x52, 0x69,
+++		    0xbd, 0x9e, 0xbb, 0x29, 0xe6, 0xbf, 0x49, 0x4f },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key >= p */
+++{
+++	.secret = (u8[32]){ 0xa0, 0x34, 0xf6, 0x84, 0xfa, 0x63, 0x1e, 0x1a,
+++		     0x34, 0x81, 0x18, 0xc1, 0xce, 0x4c, 0x98, 0x23,
+++		     0x1f, 0x2d, 0x9e, 0xec, 0x9b, 0xa5, 0x36, 0x5b,
+++		     0x4a, 0x05, 0xd6, 0x9a, 0x78, 0x5b, 0x07, 0x96 },
+++	.b_public = (u8[32]){ 0xdb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++	.expected_ss = (u8[32]){ 0x54, 0x99, 0x8e, 0xe4, 0x3a, 0x5b, 0x00, 0x7b,
+++		    0xf4, 0x99, 0xf0, 0x78, 0xe7, 0x36, 0x52, 0x44,
+++		    0x00, 0xa8, 0xb5, 0xc7, 0xe9, 0xb9, 0xb4, 0x37,
+++		    0x71, 0x74, 0x8c, 0x7c, 0xdf, 0x88, 0x04, 0x12 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key >= p */
+++{
+++	.secret = (u8[32]){ 0x30, 0xb6, 0xc6, 0xa0, 0xf2, 0xff, 0xa6, 0x80,
+++		     0x76, 0x8f, 0x99, 0x2b, 0xa8, 0x9e, 0x15, 0x2d,
+++		     0x5b, 0xc9, 0x89, 0x3d, 0x38, 0xc9, 0x11, 0x9b,
+++		     0xe4, 0xf7, 0x67, 0xbf, 0xab, 0x6e, 0x0c, 0xa5 },
+++	.b_public = (u8[32]){ 0xdc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++	.expected_ss = (u8[32]){ 0xea, 0xd9, 0xb3, 0x8e, 0xfd, 0xd7, 0x23, 0x63,
+++		    0x79, 0x34, 0xe5, 0x5a, 0xb7, 0x17, 0xa7, 0xae,
+++		    0x09, 0xeb, 0x86, 0xa2, 0x1d, 0xc3, 0x6a, 0x3f,
+++		    0xee, 0xb8, 0x8b, 0x75, 0x9e, 0x39, 0x1e, 0x09 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key >= p */
+++{
+++	.secret = (u8[32]){ 0x90, 0x1b, 0x9d, 0xcf, 0x88, 0x1e, 0x01, 0xe0,
+++		     0x27, 0x57, 0x50, 0x35, 0xd4, 0x0b, 0x43, 0xbd,
+++		     0xc1, 0xc5, 0x24, 0x2e, 0x03, 0x08, 0x47, 0x49,
+++		     0x5b, 0x0c, 0x72, 0x86, 0x46, 0x9b, 0x65, 0x91 },
+++	.b_public = (u8[32]){ 0xea, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++	.expected_ss = (u8[32]){ 0x60, 0x2f, 0xf4, 0x07, 0x89, 0xb5, 0x4b, 0x41,
+++		    0x80, 0x59, 0x15, 0xfe, 0x2a, 0x62, 0x21, 0xf0,
+++		    0x7a, 0x50, 0xff, 0xc2, 0xc3, 0xfc, 0x94, 0xcf,
+++		    0x61, 0xf1, 0x3d, 0x79, 0x04, 0xe8, 0x8e, 0x0e },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key >= p */
+++{
+++	.secret = (u8[32]){ 0x80, 0x46, 0x67, 0x7c, 0x28, 0xfd, 0x82, 0xc9,
+++		     0xa1, 0xbd, 0xb7, 0x1a, 0x1a, 0x1a, 0x34, 0xfa,
+++		     0xba, 0x12, 0x25, 0xe2, 0x50, 0x7f, 0xe3, 0xf5,
+++		     0x4d, 0x10, 0xbd, 0x5b, 0x0d, 0x86, 0x5f, 0x8e },
+++	.b_public = (u8[32]){ 0xeb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++	.expected_ss = (u8[32]){ 0xe0, 0x0a, 0xe8, 0xb1, 0x43, 0x47, 0x12, 0x47,
+++		    0xba, 0x24, 0xf1, 0x2c, 0x88, 0x55, 0x36, 0xc3,
+++		    0xcb, 0x98, 0x1b, 0x58, 0xe1, 0xe5, 0x6b, 0x2b,
+++		    0xaf, 0x35, 0xc1, 0x2a, 0xe1, 0xf7, 0x9c, 0x26 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key >= p */
+++{
+++	.secret = (u8[32]){ 0x60, 0x2f, 0x7e, 0x2f, 0x68, 0xa8, 0x46, 0xb8,
+++		     0x2c, 0xc2, 0x69, 0xb1, 0xd4, 0x8e, 0x93, 0x98,
+++		     0x86, 0xae, 0x54, 0xfd, 0x63, 0x6c, 0x1f, 0xe0,
+++		     0x74, 0xd7, 0x10, 0x12, 0x7d, 0x47, 0x24, 0x91 },
+++	.b_public = (u8[32]){ 0xef, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++	.expected_ss = (u8[32]){ 0x98, 0xcb, 0x9b, 0x50, 0xdd, 0x3f, 0xc2, 0xb0,
+++		    0xd4, 0xf2, 0xd2, 0xbf, 0x7c, 0x5c, 0xfd, 0xd1,
+++		    0x0c, 0x8f, 0xcd, 0x31, 0xfc, 0x40, 0xaf, 0x1a,
+++		    0xd4, 0x4f, 0x47, 0xc1, 0x31, 0x37, 0x63, 0x62 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key >= p */
+++{
+++	.secret = (u8[32]){ 0x60, 0x88, 0x7b, 0x3d, 0xc7, 0x24, 0x43, 0x02,
+++		     0x6e, 0xbe, 0xdb, 0xbb, 0xb7, 0x06, 0x65, 0xf4,
+++		     0x2b, 0x87, 0xad, 0xd1, 0x44, 0x0e, 0x77, 0x68,
+++		     0xfb, 0xd7, 0xe8, 0xe2, 0xce, 0x5f, 0x63, 0x9d },
+++	.b_public = (u8[32]){ 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++	.expected_ss = (u8[32]){ 0x38, 0xd6, 0x30, 0x4c, 0x4a, 0x7e, 0x6d, 0x9f,
+++		    0x79, 0x59, 0x33, 0x4f, 0xb5, 0x24, 0x5b, 0xd2,
+++		    0xc7, 0x54, 0x52, 0x5d, 0x4c, 0x91, 0xdb, 0x95,
+++		    0x02, 0x06, 0x92, 0x62, 0x34, 0xc1, 0xf6, 0x33 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key >= p */
+++{
+++	.secret = (u8[32]){ 0x78, 0xd3, 0x1d, 0xfa, 0x85, 0x44, 0x97, 0xd7,
+++		     0x2d, 0x8d, 0xef, 0x8a, 0x1b, 0x7f, 0xb0, 0x06,
+++		     0xce, 0xc2, 0xd8, 0xc4, 0x92, 0x46, 0x47, 0xc9,
+++		     0x38, 0x14, 0xae, 0x56, 0xfa, 0xed, 0xa4, 0x95 },
+++	.b_public = (u8[32]){ 0xf1, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++	.expected_ss = (u8[32]){ 0x78, 0x6c, 0xd5, 0x49, 0x96, 0xf0, 0x14, 0xa5,
+++		    0xa0, 0x31, 0xec, 0x14, 0xdb, 0x81, 0x2e, 0xd0,
+++		    0x83, 0x55, 0x06, 0x1f, 0xdb, 0x5d, 0xe6, 0x80,
+++		    0xa8, 0x00, 0xac, 0x52, 0x1f, 0x31, 0x8e, 0x23 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - public key >= p */
+++{
+++	.secret = (u8[32]){ 0xc0, 0x4c, 0x5b, 0xae, 0xfa, 0x83, 0x02, 0xdd,
+++		     0xde, 0xd6, 0xa4, 0xbb, 0x95, 0x77, 0x61, 0xb4,
+++		     0xeb, 0x97, 0xae, 0xfa, 0x4f, 0xc3, 0xb8, 0x04,
+++		     0x30, 0x85, 0xf9, 0x6a, 0x56, 0x59, 0xb3, 0xa5 },
+++	.b_public = (u8[32]){ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++	.expected_ss = (u8[32]){ 0x29, 0xae, 0x8b, 0xc7, 0x3e, 0x9b, 0x10, 0xa0,
+++		    0x8b, 0x4f, 0x68, 0x1c, 0x43, 0xc3, 0xe0, 0xac,
+++		    0x1a, 0x17, 0x1d, 0x31, 0xb3, 0x8f, 0x1a, 0x48,
+++		    0xef, 0xba, 0x29, 0xae, 0x63, 0x9e, 0xa1, 0x34 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - RFC 7748 */
+++{
+++	.secret = (u8[32]){ 0xa0, 0x46, 0xe3, 0x6b, 0xf0, 0x52, 0x7c, 0x9d,
+++		     0x3b, 0x16, 0x15, 0x4b, 0x82, 0x46, 0x5e, 0xdd,
+++		     0x62, 0x14, 0x4c, 0x0a, 0xc1, 0xfc, 0x5a, 0x18,
+++		     0x50, 0x6a, 0x22, 0x44, 0xba, 0x44, 0x9a, 0x44 },
+++	.b_public = (u8[32]){ 0xe6, 0xdb, 0x68, 0x67, 0x58, 0x30, 0x30, 0xdb,
+++		    0x35, 0x94, 0xc1, 0xa4, 0x24, 0xb1, 0x5f, 0x7c,
+++		    0x72, 0x66, 0x24, 0xec, 0x26, 0xb3, 0x35, 0x3b,
+++		    0x10, 0xa9, 0x03, 0xa6, 0xd0, 0xab, 0x1c, 0x4c },
+++	.expected_ss = (u8[32]){ 0xc3, 0xda, 0x55, 0x37, 0x9d, 0xe9, 0xc6, 0x90,
+++		    0x8e, 0x94, 0xea, 0x4d, 0xf2, 0x8d, 0x08, 0x4f,
+++		    0x32, 0xec, 0xcf, 0x03, 0x49, 0x1c, 0x71, 0xf7,
+++		    0x54, 0xb4, 0x07, 0x55, 0x77, 0xa2, 0x85, 0x52 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - RFC 7748 */
+++{
+++	.secret = (u8[32]){ 0x48, 0x66, 0xe9, 0xd4, 0xd1, 0xb4, 0x67, 0x3c,
+++		     0x5a, 0xd2, 0x26, 0x91, 0x95, 0x7d, 0x6a, 0xf5,
+++		     0xc1, 0x1b, 0x64, 0x21, 0xe0, 0xea, 0x01, 0xd4,
+++		     0x2c, 0xa4, 0x16, 0x9e, 0x79, 0x18, 0xba, 0x4d },
+++	.b_public = (u8[32]){ 0xe5, 0x21, 0x0f, 0x12, 0x78, 0x68, 0x11, 0xd3,
+++		    0xf4, 0xb7, 0x95, 0x9d, 0x05, 0x38, 0xae, 0x2c,
+++		    0x31, 0xdb, 0xe7, 0x10, 0x6f, 0xc0, 0x3c, 0x3e,
+++		    0xfc, 0x4c, 0xd5, 0x49, 0xc7, 0x15, 0xa4, 0x13 },
+++	.expected_ss = (u8[32]){ 0x95, 0xcb, 0xde, 0x94, 0x76, 0xe8, 0x90, 0x7d,
+++		    0x7a, 0xad, 0xe4, 0x5c, 0xb4, 0xb8, 0x73, 0xf8,
+++		    0x8b, 0x59, 0x5a, 0x68, 0x79, 0x9f, 0xa1, 0x52,
+++		    0xe6, 0xf8, 0xf7, 0x64, 0x7a, 0xac, 0x79, 0x57 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for shared secret */
+++{
+++	.secret = (u8[32]){ 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++		     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++		     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++		     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++	.b_public = (u8[32]){ 0x0a, 0xb4, 0xe7, 0x63, 0x80, 0xd8, 0x4d, 0xde,
+++		    0x4f, 0x68, 0x33, 0xc5, 0x8f, 0x2a, 0x9f, 0xb8,
+++		    0xf8, 0x3b, 0xb0, 0x16, 0x9b, 0x17, 0x2b, 0xe4,
+++		    0xb6, 0xe0, 0x59, 0x28, 0x87, 0x74, 0x1a, 0x36 },
+++	.expected_ss = (u8[32]){ 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for shared secret */
+++{
+++	.secret = (u8[32]){ 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++		     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++		     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++		     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++	.b_public = (u8[32]){ 0x89, 0xe1, 0x0d, 0x57, 0x01, 0xb4, 0x33, 0x7d,
+++		    0x2d, 0x03, 0x21, 0x81, 0x53, 0x8b, 0x10, 0x64,
+++		    0xbd, 0x40, 0x84, 0x40, 0x1c, 0xec, 0xa1, 0xfd,
+++		    0x12, 0x66, 0x3a, 0x19, 0x59, 0x38, 0x80, 0x00 },
+++	.expected_ss = (u8[32]){ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for shared secret */
+++{
+++	.secret = (u8[32]){ 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++		     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++		     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++		     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++	.b_public = (u8[32]){ 0x2b, 0x55, 0xd3, 0xaa, 0x4a, 0x8f, 0x80, 0xc8,
+++		    0xc0, 0xb2, 0xae, 0x5f, 0x93, 0x3e, 0x85, 0xaf,
+++		    0x49, 0xbe, 0xac, 0x36, 0xc2, 0xfa, 0x73, 0x94,
+++		    0xba, 0xb7, 0x6c, 0x89, 0x33, 0xf8, 0xf8, 0x1d },
+++	.expected_ss = (u8[32]){ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for shared secret */
+++{
+++	.secret = (u8[32]){ 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++		     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++		     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++		     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++	.b_public = (u8[32]){ 0x63, 0xe5, 0xb1, 0xfe, 0x96, 0x01, 0xfe, 0x84,
+++		    0x38, 0x5d, 0x88, 0x66, 0xb0, 0x42, 0x12, 0x62,
+++		    0xf7, 0x8f, 0xbf, 0xa5, 0xaf, 0xf9, 0x58, 0x5e,
+++		    0x62, 0x66, 0x79, 0xb1, 0x85, 0x47, 0xd9, 0x59 },
+++	.expected_ss = (u8[32]){ 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for shared secret */
+++{
+++	.secret = (u8[32]){ 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++		     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++		     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++		     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++	.b_public = (u8[32]){ 0xe4, 0x28, 0xf3, 0xda, 0xc1, 0x78, 0x09, 0xf8,
+++		    0x27, 0xa5, 0x22, 0xce, 0x32, 0x35, 0x50, 0x58,
+++		    0xd0, 0x73, 0x69, 0x36, 0x4a, 0xa7, 0x89, 0x02,
+++		    0xee, 0x10, 0x13, 0x9b, 0x9f, 0x9d, 0xd6, 0x53 },
+++	.expected_ss = (u8[32]){ 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for shared secret */
+++{
+++	.secret = (u8[32]){ 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++		     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++		     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++		     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++	.b_public = (u8[32]){ 0xb3, 0xb5, 0x0e, 0x3e, 0xd3, 0xa4, 0x07, 0xb9,
+++		    0x5d, 0xe9, 0x42, 0xef, 0x74, 0x57, 0x5b, 0x5a,
+++		    0xb8, 0xa1, 0x0c, 0x09, 0xee, 0x10, 0x35, 0x44,
+++		    0xd6, 0x0b, 0xdf, 0xed, 0x81, 0x38, 0xab, 0x2b },
+++	.expected_ss = (u8[32]){ 0xf9, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for shared secret */
+++{
+++	.secret = (u8[32]){ 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++		     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++		     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++		     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++	.b_public = (u8[32]){ 0x21, 0x3f, 0xff, 0xe9, 0x3d, 0x5e, 0xa8, 0xcd,
+++		    0x24, 0x2e, 0x46, 0x28, 0x44, 0x02, 0x99, 0x22,
+++		    0xc4, 0x3c, 0x77, 0xc9, 0xe3, 0xe4, 0x2f, 0x56,
+++		    0x2f, 0x48, 0x5d, 0x24, 0xc5, 0x01, 0xa2, 0x0b },
+++	.expected_ss = (u8[32]){ 0xf3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for shared secret */
+++{
+++	.secret = (u8[32]){ 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++		     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++		     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++		     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++	.b_public = (u8[32]){ 0x91, 0xb2, 0x32, 0xa1, 0x78, 0xb3, 0xcd, 0x53,
+++		    0x09, 0x32, 0x44, 0x1e, 0x61, 0x39, 0x41, 0x8f,
+++		    0x72, 0x17, 0x22, 0x92, 0xf1, 0xda, 0x4c, 0x18,
+++		    0x34, 0xfc, 0x5e, 0xbf, 0xef, 0xb5, 0x1e, 0x3f },
+++	.expected_ss = (u8[32]){ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x03 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for shared secret */
+++{
+++	.secret = (u8[32]){ 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++		     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++		     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++		     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++	.b_public = (u8[32]){ 0x04, 0x5c, 0x6e, 0x11, 0xc5, 0xd3, 0x32, 0x55,
+++		    0x6c, 0x78, 0x22, 0xfe, 0x94, 0xeb, 0xf8, 0x9b,
+++		    0x56, 0xa3, 0x87, 0x8d, 0xc2, 0x7c, 0xa0, 0x79,
+++		    0x10, 0x30, 0x58, 0x84, 0x9f, 0xab, 0xcb, 0x4f },
+++	.expected_ss = (u8[32]){ 0xe5, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for shared secret */
+++{
+++	.secret = (u8[32]){ 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++		     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++		     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++		     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++	.b_public = (u8[32]){ 0x1c, 0xa2, 0x19, 0x0b, 0x71, 0x16, 0x35, 0x39,
+++		    0x06, 0x3c, 0x35, 0x77, 0x3b, 0xda, 0x0c, 0x9c,
+++		    0x92, 0x8e, 0x91, 0x36, 0xf0, 0x62, 0x0a, 0xeb,
+++		    0x09, 0x3f, 0x09, 0x91, 0x97, 0xb7, 0xf7, 0x4e },
+++	.expected_ss = (u8[32]){ 0xe3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for shared secret */
+++{
+++	.secret = (u8[32]){ 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++		     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++		     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++		     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++	.b_public = (u8[32]){ 0xf7, 0x6e, 0x90, 0x10, 0xac, 0x33, 0xc5, 0x04,
+++		    0x3b, 0x2d, 0x3b, 0x76, 0xa8, 0x42, 0x17, 0x10,
+++		    0x00, 0xc4, 0x91, 0x62, 0x22, 0xe9, 0xe8, 0x58,
+++		    0x97, 0xa0, 0xae, 0xc7, 0xf6, 0x35, 0x0b, 0x3c },
+++	.expected_ss = (u8[32]){ 0xdd, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for shared secret */
+++{
+++	.secret = (u8[32]){ 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++		     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++		     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++		     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++	.b_public = (u8[32]){ 0xbb, 0x72, 0x68, 0x8d, 0x8f, 0x8a, 0xa7, 0xa3,
+++		    0x9c, 0xd6, 0x06, 0x0c, 0xd5, 0xc8, 0x09, 0x3c,
+++		    0xde, 0xc6, 0xfe, 0x34, 0x19, 0x37, 0xc3, 0x88,
+++		    0x6a, 0x99, 0x34, 0x6c, 0xd0, 0x7f, 0xaa, 0x55 },
+++	.expected_ss = (u8[32]){ 0xdb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for shared secret */
+++{
+++	.secret = (u8[32]){ 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++		     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++		     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++		     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++	.b_public = (u8[32]){ 0x88, 0xfd, 0xde, 0xa1, 0x93, 0x39, 0x1c, 0x6a,
+++		    0x59, 0x33, 0xef, 0x9b, 0x71, 0x90, 0x15, 0x49,
+++		    0x44, 0x72, 0x05, 0xaa, 0xe9, 0xda, 0x92, 0x8a,
+++		    0x6b, 0x91, 0xa3, 0x52, 0xba, 0x10, 0xf4, 0x1f },
+++	.expected_ss = (u8[32]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - edge case for shared secret */
+++{
+++	.secret = (u8[32]){ 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++		     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++		     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++		     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++	.b_public = (u8[32]){ 0x30, 0x3b, 0x39, 0x2f, 0x15, 0x31, 0x16, 0xca,
+++		    0xd9, 0xcc, 0x68, 0x2a, 0x00, 0xcc, 0xc4, 0x4c,
+++		    0x95, 0xff, 0x0d, 0x3b, 0xbe, 0x56, 0x8b, 0xeb,
+++		    0x6c, 0x4e, 0x73, 0x9b, 0xaf, 0xdc, 0x2c, 0x68 },
+++	.expected_ss = (u8[32]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - checking for overflow */
+++{
+++	.secret = (u8[32]){ 0xc8, 0x17, 0x24, 0x70, 0x40, 0x00, 0xb2, 0x6d,
+++		     0x31, 0x70, 0x3c, 0xc9, 0x7e, 0x3a, 0x37, 0x8d,
+++		     0x56, 0xfa, 0xd8, 0x21, 0x93, 0x61, 0xc8, 0x8c,
+++		     0xca, 0x8b, 0xd7, 0xc5, 0x71, 0x9b, 0x12, 0xb2 },
+++	.b_public = (u8[32]){ 0xfd, 0x30, 0x0a, 0xeb, 0x40, 0xe1, 0xfa, 0x58,
+++		    0x25, 0x18, 0x41, 0x2b, 0x49, 0xb2, 0x08, 0xa7,
+++		    0x84, 0x2b, 0x1e, 0x1f, 0x05, 0x6a, 0x04, 0x01,
+++		    0x78, 0xea, 0x41, 0x41, 0x53, 0x4f, 0x65, 0x2d },
+++	.expected_ss = (u8[32]){ 0xb7, 0x34, 0x10, 0x5d, 0xc2, 0x57, 0x58, 0x5d,
+++		    0x73, 0xb5, 0x66, 0xcc, 0xb7, 0x6f, 0x06, 0x27,
+++		    0x95, 0xcc, 0xbe, 0xc8, 0x91, 0x28, 0xe5, 0x2b,
+++		    0x02, 0xf3, 0xe5, 0x96, 0x39, 0xf1, 0x3c, 0x46 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - checking for overflow */
+++{
+++	.secret = (u8[32]){ 0xc8, 0x17, 0x24, 0x70, 0x40, 0x00, 0xb2, 0x6d,
+++		     0x31, 0x70, 0x3c, 0xc9, 0x7e, 0x3a, 0x37, 0x8d,
+++		     0x56, 0xfa, 0xd8, 0x21, 0x93, 0x61, 0xc8, 0x8c,
+++		     0xca, 0x8b, 0xd7, 0xc5, 0x71, 0x9b, 0x12, 0xb2 },
+++	.b_public = (u8[32]){ 0xc8, 0xef, 0x79, 0xb5, 0x14, 0xd7, 0x68, 0x26,
+++		    0x77, 0xbc, 0x79, 0x31, 0xe0, 0x6e, 0xe5, 0xc2,
+++		    0x7c, 0x9b, 0x39, 0x2b, 0x4a, 0xe9, 0x48, 0x44,
+++		    0x73, 0xf5, 0x54, 0xe6, 0x67, 0x8e, 0xcc, 0x2e },
+++	.expected_ss = (u8[32]){ 0x64, 0x7a, 0x46, 0xb6, 0xfc, 0x3f, 0x40, 0xd6,
+++		    0x21, 0x41, 0xee, 0x3c, 0xee, 0x70, 0x6b, 0x4d,
+++		    0x7a, 0x92, 0x71, 0x59, 0x3a, 0x7b, 0x14, 0x3e,
+++		    0x8e, 0x2e, 0x22, 0x79, 0x88, 0x3e, 0x45, 0x50 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - checking for overflow */
+++{
+++	.secret = (u8[32]){ 0xc8, 0x17, 0x24, 0x70, 0x40, 0x00, 0xb2, 0x6d,
+++		     0x31, 0x70, 0x3c, 0xc9, 0x7e, 0x3a, 0x37, 0x8d,
+++		     0x56, 0xfa, 0xd8, 0x21, 0x93, 0x61, 0xc8, 0x8c,
+++		     0xca, 0x8b, 0xd7, 0xc5, 0x71, 0x9b, 0x12, 0xb2 },
+++	.b_public = (u8[32]){ 0x64, 0xae, 0xac, 0x25, 0x04, 0x14, 0x48, 0x61,
+++		    0x53, 0x2b, 0x7b, 0xbc, 0xb6, 0xc8, 0x7d, 0x67,
+++		    0xdd, 0x4c, 0x1f, 0x07, 0xeb, 0xc2, 0xe0, 0x6e,
+++		    0xff, 0xb9, 0x5a, 0xec, 0xc6, 0x17, 0x0b, 0x2c },
+++	.expected_ss = (u8[32]){ 0x4f, 0xf0, 0x3d, 0x5f, 0xb4, 0x3c, 0xd8, 0x65,
+++		    0x7a, 0x3c, 0xf3, 0x7c, 0x13, 0x8c, 0xad, 0xce,
+++		    0xcc, 0xe5, 0x09, 0xe4, 0xeb, 0xa0, 0x89, 0xd0,
+++		    0xef, 0x40, 0xb4, 0xe4, 0xfb, 0x94, 0x61, 0x55 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - checking for overflow */
+++{
+++	.secret = (u8[32]){ 0xc8, 0x17, 0x24, 0x70, 0x40, 0x00, 0xb2, 0x6d,
+++		     0x31, 0x70, 0x3c, 0xc9, 0x7e, 0x3a, 0x37, 0x8d,
+++		     0x56, 0xfa, 0xd8, 0x21, 0x93, 0x61, 0xc8, 0x8c,
+++		     0xca, 0x8b, 0xd7, 0xc5, 0x71, 0x9b, 0x12, 0xb2 },
+++	.b_public = (u8[32]){ 0xbf, 0x68, 0xe3, 0x5e, 0x9b, 0xdb, 0x7e, 0xee,
+++		    0x1b, 0x50, 0x57, 0x02, 0x21, 0x86, 0x0f, 0x5d,
+++		    0xcd, 0xad, 0x8a, 0xcb, 0xab, 0x03, 0x1b, 0x14,
+++		    0x97, 0x4c, 0xc4, 0x90, 0x13, 0xc4, 0x98, 0x31 },
+++	.expected_ss = (u8[32]){ 0x21, 0xce, 0xe5, 0x2e, 0xfd, 0xbc, 0x81, 0x2e,
+++		    0x1d, 0x02, 0x1a, 0x4a, 0xf1, 0xe1, 0xd8, 0xbc,
+++		    0x4d, 0xb3, 0xc4, 0x00, 0xe4, 0xd2, 0xa2, 0xc5,
+++		    0x6a, 0x39, 0x26, 0xdb, 0x4d, 0x99, 0xc6, 0x5b },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - checking for overflow */
+++{
+++	.secret = (u8[32]){ 0xc8, 0x17, 0x24, 0x70, 0x40, 0x00, 0xb2, 0x6d,
+++		     0x31, 0x70, 0x3c, 0xc9, 0x7e, 0x3a, 0x37, 0x8d,
+++		     0x56, 0xfa, 0xd8, 0x21, 0x93, 0x61, 0xc8, 0x8c,
+++		     0xca, 0x8b, 0xd7, 0xc5, 0x71, 0x9b, 0x12, 0xb2 },
+++	.b_public = (u8[32]){ 0x53, 0x47, 0xc4, 0x91, 0x33, 0x1a, 0x64, 0xb4,
+++		    0x3d, 0xdc, 0x68, 0x30, 0x34, 0xe6, 0x77, 0xf5,
+++		    0x3d, 0xc3, 0x2b, 0x52, 0xa5, 0x2a, 0x57, 0x7c,
+++		    0x15, 0xa8, 0x3b, 0xf2, 0x98, 0xe9, 0x9f, 0x19 },
+++	.expected_ss = (u8[32]){ 0x18, 0xcb, 0x89, 0xe4, 0xe2, 0x0c, 0x0c, 0x2b,
+++		    0xd3, 0x24, 0x30, 0x52, 0x45, 0x26, 0x6c, 0x93,
+++		    0x27, 0x69, 0x0b, 0xbe, 0x79, 0xac, 0xb8, 0x8f,
+++		    0x5b, 0x8f, 0xb3, 0xf7, 0x4e, 0xca, 0x3e, 0x52 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - private key == -1 (mod order) */
+++{
+++	.secret = (u8[32]){ 0xa0, 0x23, 0xcd, 0xd0, 0x83, 0xef, 0x5b, 0xb8,
+++		     0x2f, 0x10, 0xd6, 0x2e, 0x59, 0xe1, 0x5a, 0x68,
+++		     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++		     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50 },
+++	.b_public = (u8[32]){ 0x25, 0x8e, 0x04, 0x52, 0x3b, 0x8d, 0x25, 0x3e,
+++		    0xe6, 0x57, 0x19, 0xfc, 0x69, 0x06, 0xc6, 0x57,
+++		    0x19, 0x2d, 0x80, 0x71, 0x7e, 0xdc, 0x82, 0x8f,
+++		    0xa0, 0xaf, 0x21, 0x68, 0x6e, 0x2f, 0xaa, 0x75 },
+++	.expected_ss = (u8[32]){ 0x25, 0x8e, 0x04, 0x52, 0x3b, 0x8d, 0x25, 0x3e,
+++		    0xe6, 0x57, 0x19, 0xfc, 0x69, 0x06, 0xc6, 0x57,
+++		    0x19, 0x2d, 0x80, 0x71, 0x7e, 0xdc, 0x82, 0x8f,
+++		    0xa0, 0xaf, 0x21, 0x68, 0x6e, 0x2f, 0xaa, 0x75 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++},
+++/* wycheproof - private key == 1 (mod order) on twist */
+++{
+++	.secret = (u8[32]){ 0x58, 0x08, 0x3d, 0xd2, 0x61, 0xad, 0x91, 0xef,
+++		     0xf9, 0x52, 0x32, 0x2e, 0xc8, 0x24, 0xc6, 0x82,
+++		     0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++		     0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x5f },
+++	.b_public = (u8[32]){ 0x2e, 0xae, 0x5e, 0xc3, 0xdd, 0x49, 0x4e, 0x9f,
+++		    0x2d, 0x37, 0xd2, 0x58, 0xf8, 0x73, 0xa8, 0xe6,
+++		    0xe9, 0xd0, 0xdb, 0xd1, 0xe3, 0x83, 0xef, 0x64,
+++		    0xd9, 0x8b, 0xb9, 0x1b, 0x3e, 0x0b, 0xe0, 0x35 },
+++	.expected_ss = (u8[32]){ 0x2e, 0xae, 0x5e, 0xc3, 0xdd, 0x49, 0x4e, 0x9f,
+++		    0x2d, 0x37, 0xd2, 0x58, 0xf8, 0x73, 0xa8, 0xe6,
+++		    0xe9, 0xd0, 0xdb, 0xd1, 0xe3, 0x83, 0xef, 0x64,
+++		    0xd9, 0x8b, 0xb9, 0x1b, 0x3e, 0x0b, 0xe0, 0x35 },
+++	.secret_size = 32,
+++	.b_public_size = 32,
+++	.expected_ss_size = 32,
+++
+++}
+++};
+++
++ static const struct kpp_testvec ecdh_tv_template[] = {
++ 	{
++ #ifndef CONFIG_CRYPTO_FIPS
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0027-crypto-curve25519-implement-generic-KPP-driver.patch b/target/linux/generic/backport-5.4/080-wireguard-0027-crypto-curve25519-implement-generic-KPP-driver.patch
+new file mode 100644
+index 0000000000..d909561690
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0027-crypto-curve25519-implement-generic-KPP-driver.patch
+@@ -0,0 +1,136 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:34 +0100
++Subject: [PATCH] crypto: curve25519 - implement generic KPP driver
++
++commit ee772cb641135739c1530647391d5a04c39db192 upstream.
++
++Expose the generic Curve25519 library via the crypto API KPP interface.
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ crypto/Kconfig              |  5 +++
++ crypto/Makefile             |  1 +
++ crypto/curve25519-generic.c | 90 +++++++++++++++++++++++++++++++++++++
++ 3 files changed, 96 insertions(+)
++ create mode 100644 crypto/curve25519-generic.c
++
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -264,6 +264,11 @@ config CRYPTO_ECRDSA
++ 	  standard algorithms (called GOST algorithms). Only signature verification
++ 	  is implemented.
++ 
+++config CRYPTO_CURVE25519
+++	tristate "Curve25519 algorithm"
+++	select CRYPTO_KPP
+++	select CRYPTO_LIB_CURVE25519_GENERIC
+++
++ comment "Authenticated Encryption with Associated Data"
++ 
++ config CRYPTO_CCM
++--- a/crypto/Makefile
+++++ b/crypto/Makefile
++@@ -167,6 +167,7 @@ obj-$(CONFIG_CRYPTO_ZSTD) += zstd.o
++ obj-$(CONFIG_CRYPTO_OFB) += ofb.o
++ obj-$(CONFIG_CRYPTO_ECC) += ecc.o
++ obj-$(CONFIG_CRYPTO_ESSIV) += essiv.o
+++obj-$(CONFIG_CRYPTO_CURVE25519) += curve25519-generic.o
++ 
++ ecdh_generic-y += ecdh.o
++ ecdh_generic-y += ecdh_helper.o
++--- /dev/null
+++++ b/crypto/curve25519-generic.c
++@@ -0,0 +1,90 @@
+++// SPDX-License-Identifier: GPL-2.0-or-later
+++
+++#include <crypto/curve25519.h>
+++#include <crypto/internal/kpp.h>
+++#include <crypto/kpp.h>
+++#include <linux/module.h>
+++#include <linux/scatterlist.h>
+++
+++static int curve25519_set_secret(struct crypto_kpp *tfm, const void *buf,
+++				 unsigned int len)
+++{
+++	u8 *secret = kpp_tfm_ctx(tfm);
+++
+++	if (!len)
+++		curve25519_generate_secret(secret);
+++	else if (len == CURVE25519_KEY_SIZE &&
+++		 crypto_memneq(buf, curve25519_null_point, CURVE25519_KEY_SIZE))
+++		memcpy(secret, buf, CURVE25519_KEY_SIZE);
+++	else
+++		return -EINVAL;
+++	return 0;
+++}
+++
+++static int curve25519_compute_value(struct kpp_request *req)
+++{
+++	struct crypto_kpp *tfm = crypto_kpp_reqtfm(req);
+++	const u8 *secret = kpp_tfm_ctx(tfm);
+++	u8 public_key[CURVE25519_KEY_SIZE];
+++	u8 buf[CURVE25519_KEY_SIZE];
+++	int copied, nbytes;
+++	u8 const *bp;
+++
+++	if (req->src) {
+++		copied = sg_copy_to_buffer(req->src,
+++					   sg_nents_for_len(req->src,
+++							    CURVE25519_KEY_SIZE),
+++					   public_key, CURVE25519_KEY_SIZE);
+++		if (copied != CURVE25519_KEY_SIZE)
+++			return -EINVAL;
+++		bp = public_key;
+++	} else {
+++		bp = curve25519_base_point;
+++	}
+++
+++	curve25519_generic(buf, secret, bp);
+++
+++	/* might want less than we've got */
+++	nbytes = min_t(size_t, CURVE25519_KEY_SIZE, req->dst_len);
+++	copied = sg_copy_from_buffer(req->dst, sg_nents_for_len(req->dst,
+++								nbytes),
+++				     buf, nbytes);
+++	if (copied != nbytes)
+++		return -EINVAL;
+++	return 0;
+++}
+++
+++static unsigned int curve25519_max_size(struct crypto_kpp *tfm)
+++{
+++	return CURVE25519_KEY_SIZE;
+++}
+++
+++static struct kpp_alg curve25519_alg = {
+++	.base.cra_name		= "curve25519",
+++	.base.cra_driver_name	= "curve25519-generic",
+++	.base.cra_priority	= 100,
+++	.base.cra_module	= THIS_MODULE,
+++	.base.cra_ctxsize	= CURVE25519_KEY_SIZE,
+++
+++	.set_secret		= curve25519_set_secret,
+++	.generate_public_key	= curve25519_compute_value,
+++	.compute_shared_secret	= curve25519_compute_value,
+++	.max_size		= curve25519_max_size,
+++};
+++
+++static int curve25519_init(void)
+++{
+++	return crypto_register_kpp(&curve25519_alg);
+++}
+++
+++static void curve25519_exit(void)
+++{
+++	crypto_unregister_kpp(&curve25519_alg);
+++}
+++
+++subsys_initcall(curve25519_init);
+++module_exit(curve25519_exit);
+++
+++MODULE_ALIAS_CRYPTO("curve25519");
+++MODULE_ALIAS_CRYPTO("curve25519-generic");
+++MODULE_LICENSE("GPL");
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0028-crypto-lib-curve25519-work-around-Clang-stack-spilli.patch b/target/linux/generic/backport-5.4/080-wireguard-0028-crypto-lib-curve25519-work-around-Clang-stack-spilli.patch
+new file mode 100644
+index 0000000000..36b59c9aae
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0028-crypto-lib-curve25519-work-around-Clang-stack-spilli.patch
+@@ -0,0 +1,75 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:35 +0100
++Subject: [PATCH] crypto: lib/curve25519 - work around Clang stack spilling
++ issue
++
++commit 660bb8e1f833ea63185fe80fde847e3e42f18e3b upstream.
++
++Arnd reports that the 32-bit generic library code for Curve25119 ends
++up using an excessive amount of stack space when built with Clang:
++
++  lib/crypto/curve25519-fiat32.c:756:6: error: stack frame size
++      of 1384 bytes in function 'curve25519_generic'
++      [-Werror,-Wframe-larger-than=]
++
++Let's give some hints to the compiler regarding which routines should
++not be inlined, to prevent it from running out of registers and spilling
++to the stack. The resulting code performs identically under both GCC
++and Clang, and makes the warning go away.
++
++Suggested-by: Arnd Bergmann <arnd@arndb.de>
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ lib/crypto/curve25519-fiat32.c | 10 +++++-----
++ 1 file changed, 5 insertions(+), 5 deletions(-)
++
++--- a/lib/crypto/curve25519-fiat32.c
+++++ b/lib/crypto/curve25519-fiat32.c
++@@ -223,7 +223,7 @@ static __always_inline void fe_1(fe *h)
++ 	h->v[0] = 1;
++ }
++ 
++-static void fe_add_impl(u32 out[10], const u32 in1[10], const u32 in2[10])
+++static noinline void fe_add_impl(u32 out[10], const u32 in1[10], const u32 in2[10])
++ {
++ 	{ const u32 x20 = in1[9];
++ 	{ const u32 x21 = in1[8];
++@@ -266,7 +266,7 @@ static __always_inline void fe_add(fe_lo
++ 	fe_add_impl(h->v, f->v, g->v);
++ }
++ 
++-static void fe_sub_impl(u32 out[10], const u32 in1[10], const u32 in2[10])
+++static noinline void fe_sub_impl(u32 out[10], const u32 in1[10], const u32 in2[10])
++ {
++ 	{ const u32 x20 = in1[9];
++ 	{ const u32 x21 = in1[8];
++@@ -309,7 +309,7 @@ static __always_inline void fe_sub(fe_lo
++ 	fe_sub_impl(h->v, f->v, g->v);
++ }
++ 
++-static void fe_mul_impl(u32 out[10], const u32 in1[10], const u32 in2[10])
+++static noinline void fe_mul_impl(u32 out[10], const u32 in1[10], const u32 in2[10])
++ {
++ 	{ const u32 x20 = in1[9];
++ 	{ const u32 x21 = in1[8];
++@@ -441,7 +441,7 @@ fe_mul_tll(fe *h, const fe_loose *f, con
++ 	fe_mul_impl(h->v, f->v, g->v);
++ }
++ 
++-static void fe_sqr_impl(u32 out[10], const u32 in1[10])
+++static noinline void fe_sqr_impl(u32 out[10], const u32 in1[10])
++ {
++ 	{ const u32 x17 = in1[9];
++ 	{ const u32 x18 = in1[8];
++@@ -619,7 +619,7 @@ static __always_inline void fe_invert(fe
++  *
++  * Preconditions: b in {0,1}
++  */
++-static __always_inline void fe_cswap(fe *f, fe *g, unsigned int b)
+++static noinline void fe_cswap(fe *f, fe *g, unsigned int b)
++ {
++ 	unsigned i;
++ 	b = 0 - b;
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0029-crypto-curve25519-x86_64-library-and-KPP-implementat.patch b/target/linux/generic/backport-5.4/080-wireguard-0029-crypto-curve25519-x86_64-library-and-KPP-implementat.patch
+new file mode 100644
+index 0000000000..49fd970767
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0029-crypto-curve25519-x86_64-library-and-KPP-implementat.patch
+@@ -0,0 +1,2536 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 8 Nov 2019 13:22:36 +0100
++Subject: [PATCH] crypto: curve25519 - x86_64 library and KPP implementations
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++commit bb611bdfd6be34d9f822c73305fcc83720499d38 upstream.
++
++This implementation is the fastest available x86_64 implementation, and
++unlike Sandy2x, it doesn't requie use of the floating point registers at
++all. Instead it makes use of BMI2 and ADX, available on recent
++microarchitectures. The implementation was written by Armando
++Faz-Hernández with contributions (upstream) from Samuel Neves and me,
++in addition to further changes in the kernel implementation from us.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Samuel Neves <sneves@dei.uc.pt>
++Co-developed-by: Samuel Neves <sneves@dei.uc.pt>
++[ardb: - move to arch/x86/crypto
++       - wire into lib/crypto framework
++       - implement crypto API KPP hooks ]
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/Makefile            |    1 +
++ arch/x86/crypto/curve25519-x86_64.c | 2475 +++++++++++++++++++++++++++
++ crypto/Kconfig                      |    6 +
++ 3 files changed, 2482 insertions(+)
++ create mode 100644 arch/x86/crypto/curve25519-x86_64.c
++
++--- a/arch/x86/crypto/Makefile
+++++ b/arch/x86/crypto/Makefile
++@@ -39,6 +39,7 @@ obj-$(CONFIG_CRYPTO_AEGIS128_AESNI_SSE2)
++ 
++ obj-$(CONFIG_CRYPTO_NHPOLY1305_SSE2) += nhpoly1305-sse2.o
++ obj-$(CONFIG_CRYPTO_NHPOLY1305_AVX2) += nhpoly1305-avx2.o
+++obj-$(CONFIG_CRYPTO_CURVE25519_X86) += curve25519-x86_64.o
++ 
++ # These modules require assembler to support AVX.
++ ifeq ($(avx_supported),yes)
++--- /dev/null
+++++ b/arch/x86/crypto/curve25519-x86_64.c
++@@ -0,0 +1,2475 @@
+++// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
+++/*
+++ * Copyright (c) 2017 Armando Faz <armfazh@ic.unicamp.br>. All Rights Reserved.
+++ * Copyright (C) 2018-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ * Copyright (C) 2018 Samuel Neves <sneves@dei.uc.pt>. All Rights Reserved.
+++ */
+++
+++#include <crypto/curve25519.h>
+++#include <crypto/internal/kpp.h>
+++
+++#include <linux/types.h>
+++#include <linux/jump_label.h>
+++#include <linux/kernel.h>
+++#include <linux/module.h>
+++
+++#include <asm/cpufeature.h>
+++#include <asm/processor.h>
+++
+++static __ro_after_init DEFINE_STATIC_KEY_FALSE(curve25519_use_bmi2);
+++static __ro_after_init DEFINE_STATIC_KEY_FALSE(curve25519_use_adx);
+++
+++enum { NUM_WORDS_ELTFP25519 = 4 };
+++typedef __aligned(32) u64 eltfp25519_1w[NUM_WORDS_ELTFP25519];
+++typedef __aligned(32) u64 eltfp25519_1w_buffer[2 * NUM_WORDS_ELTFP25519];
+++
+++#define mul_eltfp25519_1w_adx(c, a, b) do { \
+++	mul_256x256_integer_adx(m.buffer, a, b); \
+++	red_eltfp25519_1w_adx(c, m.buffer); \
+++} while (0)
+++
+++#define mul_eltfp25519_1w_bmi2(c, a, b) do { \
+++	mul_256x256_integer_bmi2(m.buffer, a, b); \
+++	red_eltfp25519_1w_bmi2(c, m.buffer); \
+++} while (0)
+++
+++#define sqr_eltfp25519_1w_adx(a) do { \
+++	sqr_256x256_integer_adx(m.buffer, a); \
+++	red_eltfp25519_1w_adx(a, m.buffer); \
+++} while (0)
+++
+++#define sqr_eltfp25519_1w_bmi2(a) do { \
+++	sqr_256x256_integer_bmi2(m.buffer, a); \
+++	red_eltfp25519_1w_bmi2(a, m.buffer); \
+++} while (0)
+++
+++#define mul_eltfp25519_2w_adx(c, a, b) do { \
+++	mul2_256x256_integer_adx(m.buffer, a, b); \
+++	red_eltfp25519_2w_adx(c, m.buffer); \
+++} while (0)
+++
+++#define mul_eltfp25519_2w_bmi2(c, a, b) do { \
+++	mul2_256x256_integer_bmi2(m.buffer, a, b); \
+++	red_eltfp25519_2w_bmi2(c, m.buffer); \
+++} while (0)
+++
+++#define sqr_eltfp25519_2w_adx(a) do { \
+++	sqr2_256x256_integer_adx(m.buffer, a); \
+++	red_eltfp25519_2w_adx(a, m.buffer); \
+++} while (0)
+++
+++#define sqr_eltfp25519_2w_bmi2(a) do { \
+++	sqr2_256x256_integer_bmi2(m.buffer, a); \
+++	red_eltfp25519_2w_bmi2(a, m.buffer); \
+++} while (0)
+++
+++#define sqrn_eltfp25519_1w_adx(a, times) do { \
+++	int ____counter = (times); \
+++	while (____counter-- > 0) \
+++		sqr_eltfp25519_1w_adx(a); \
+++} while (0)
+++
+++#define sqrn_eltfp25519_1w_bmi2(a, times) do { \
+++	int ____counter = (times); \
+++	while (____counter-- > 0) \
+++		sqr_eltfp25519_1w_bmi2(a); \
+++} while (0)
+++
+++#define copy_eltfp25519_1w(C, A) do { \
+++	(C)[0] = (A)[0]; \
+++	(C)[1] = (A)[1]; \
+++	(C)[2] = (A)[2]; \
+++	(C)[3] = (A)[3]; \
+++} while (0)
+++
+++#define setzero_eltfp25519_1w(C) do { \
+++	(C)[0] = 0; \
+++	(C)[1] = 0; \
+++	(C)[2] = 0; \
+++	(C)[3] = 0; \
+++} while (0)
+++
+++__aligned(32) static const u64 table_ladder_8k[252 * NUM_WORDS_ELTFP25519] = {
+++	/*   1 */ 0xfffffffffffffff3UL, 0xffffffffffffffffUL,
+++		  0xffffffffffffffffUL, 0x5fffffffffffffffUL,
+++	/*   2 */ 0x6b8220f416aafe96UL, 0x82ebeb2b4f566a34UL,
+++		  0xd5a9a5b075a5950fUL, 0x5142b2cf4b2488f4UL,
+++	/*   3 */ 0x6aaebc750069680cUL, 0x89cf7820a0f99c41UL,
+++		  0x2a58d9183b56d0f4UL, 0x4b5aca80e36011a4UL,
+++	/*   4 */ 0x329132348c29745dUL, 0xf4a2e616e1642fd7UL,
+++		  0x1e45bb03ff67bc34UL, 0x306912d0f42a9b4aUL,
+++	/*   5 */ 0xff886507e6af7154UL, 0x04f50e13dfeec82fUL,
+++		  0xaa512fe82abab5ceUL, 0x174e251a68d5f222UL,
+++	/*   6 */ 0xcf96700d82028898UL, 0x1743e3370a2c02c5UL,
+++		  0x379eec98b4e86eaaUL, 0x0c59888a51e0482eUL,
+++	/*   7 */ 0xfbcbf1d699b5d189UL, 0xacaef0d58e9fdc84UL,
+++		  0xc1c20d06231f7614UL, 0x2938218da274f972UL,
+++	/*   8 */ 0xf6af49beff1d7f18UL, 0xcc541c22387ac9c2UL,
+++		  0x96fcc9ef4015c56bUL, 0x69c1627c690913a9UL,
+++	/*   9 */ 0x7a86fd2f4733db0eUL, 0xfdb8c4f29e087de9UL,
+++		  0x095e4b1a8ea2a229UL, 0x1ad7a7c829b37a79UL,
+++	/*  10 */ 0x342d89cad17ea0c0UL, 0x67bedda6cced2051UL,
+++		  0x19ca31bf2bb42f74UL, 0x3df7b4c84980acbbUL,
+++	/*  11 */ 0xa8c6444dc80ad883UL, 0xb91e440366e3ab85UL,
+++		  0xc215cda00164f6d8UL, 0x3d867c6ef247e668UL,
+++	/*  12 */ 0xc7dd582bcc3e658cUL, 0xfd2c4748ee0e5528UL,
+++		  0xa0fd9b95cc9f4f71UL, 0x7529d871b0675ddfUL,
+++	/*  13 */ 0xb8f568b42d3cbd78UL, 0x1233011b91f3da82UL,
+++		  0x2dce6ccd4a7c3b62UL, 0x75e7fc8e9e498603UL,
+++	/*  14 */ 0x2f4f13f1fcd0b6ecUL, 0xf1a8ca1f29ff7a45UL,
+++		  0xc249c1a72981e29bUL, 0x6ebe0dbb8c83b56aUL,
+++	/*  15 */ 0x7114fa8d170bb222UL, 0x65a2dcd5bf93935fUL,
+++		  0xbdc41f68b59c979aUL, 0x2f0eef79a2ce9289UL,
+++	/*  16 */ 0x42ecbf0c083c37ceUL, 0x2930bc09ec496322UL,
+++		  0xf294b0c19cfeac0dUL, 0x3780aa4bedfabb80UL,
+++	/*  17 */ 0x56c17d3e7cead929UL, 0xe7cb4beb2e5722c5UL,
+++		  0x0ce931732dbfe15aUL, 0x41b883c7621052f8UL,
+++	/*  18 */ 0xdbf75ca0c3d25350UL, 0x2936be086eb1e351UL,
+++		  0xc936e03cb4a9b212UL, 0x1d45bf82322225aaUL,
+++	/*  19 */ 0xe81ab1036a024cc5UL, 0xe212201c304c9a72UL,
+++		  0xc5d73fba6832b1fcUL, 0x20ffdb5a4d839581UL,
+++	/*  20 */ 0xa283d367be5d0fadUL, 0x6c2b25ca8b164475UL,
+++		  0x9d4935467caaf22eUL, 0x5166408eee85ff49UL,
+++	/*  21 */ 0x3c67baa2fab4e361UL, 0xb3e433c67ef35cefUL,
+++		  0x5259729241159b1cUL, 0x6a621892d5b0ab33UL,
+++	/*  22 */ 0x20b74a387555cdcbUL, 0x532aa10e1208923fUL,
+++		  0xeaa17b7762281dd1UL, 0x61ab3443f05c44bfUL,
+++	/*  23 */ 0x257a6c422324def8UL, 0x131c6c1017e3cf7fUL,
+++		  0x23758739f630a257UL, 0x295a407a01a78580UL,
+++	/*  24 */ 0xf8c443246d5da8d9UL, 0x19d775450c52fa5dUL,
+++		  0x2afcfc92731bf83dUL, 0x7d10c8e81b2b4700UL,
+++	/*  25 */ 0xc8e0271f70baa20bUL, 0x993748867ca63957UL,
+++		  0x5412efb3cb7ed4bbUL, 0x3196d36173e62975UL,
+++	/*  26 */ 0xde5bcad141c7dffcUL, 0x47cc8cd2b395c848UL,
+++		  0xa34cd942e11af3cbUL, 0x0256dbf2d04ecec2UL,
+++	/*  27 */ 0x875ab7e94b0e667fUL, 0xcad4dd83c0850d10UL,
+++		  0x47f12e8f4e72c79fUL, 0x5f1a87bb8c85b19bUL,
+++	/*  28 */ 0x7ae9d0b6437f51b8UL, 0x12c7ce5518879065UL,
+++		  0x2ade09fe5cf77aeeUL, 0x23a05a2f7d2c5627UL,
+++	/*  29 */ 0x5908e128f17c169aUL, 0xf77498dd8ad0852dUL,
+++		  0x74b4c4ceab102f64UL, 0x183abadd10139845UL,
+++	/*  30 */ 0xb165ba8daa92aaacUL, 0xd5c5ef9599386705UL,
+++		  0xbe2f8f0cf8fc40d1UL, 0x2701e635ee204514UL,
+++	/*  31 */ 0x629fa80020156514UL, 0xf223868764a8c1ceUL,
+++		  0x5b894fff0b3f060eUL, 0x60d9944cf708a3faUL,
+++	/*  32 */ 0xaeea001a1c7a201fUL, 0xebf16a633ee2ce63UL,
+++		  0x6f7709594c7a07e1UL, 0x79b958150d0208cbUL,
+++	/*  33 */ 0x24b55e5301d410e7UL, 0xe3a34edff3fdc84dUL,
+++		  0xd88768e4904032d8UL, 0x131384427b3aaeecUL,
+++	/*  34 */ 0x8405e51286234f14UL, 0x14dc4739adb4c529UL,
+++		  0xb8a2b5b250634ffdUL, 0x2fe2a94ad8a7ff93UL,
+++	/*  35 */ 0xec5c57efe843faddUL, 0x2843ce40f0bb9918UL,
+++		  0xa4b561d6cf3d6305UL, 0x743629bde8fb777eUL,
+++	/*  36 */ 0x343edd46bbaf738fUL, 0xed981828b101a651UL,
+++		  0xa401760b882c797aUL, 0x1fc223e28dc88730UL,
+++	/*  37 */ 0x48604e91fc0fba0eUL, 0xb637f78f052c6fa4UL,
+++		  0x91ccac3d09e9239cUL, 0x23f7eed4437a687cUL,
+++	/*  38 */ 0x5173b1118d9bd800UL, 0x29d641b63189d4a7UL,
+++		  0xfdbf177988bbc586UL, 0x2959894fcad81df5UL,
+++	/*  39 */ 0xaebc8ef3b4bbc899UL, 0x4148995ab26992b9UL,
+++		  0x24e20b0134f92cfbUL, 0x40d158894a05dee8UL,
+++	/*  40 */ 0x46b00b1185af76f6UL, 0x26bac77873187a79UL,
+++		  0x3dc0bf95ab8fff5fUL, 0x2a608bd8945524d7UL,
+++	/*  41 */ 0x26449588bd446302UL, 0x7c4bc21c0388439cUL,
+++		  0x8e98a4f383bd11b2UL, 0x26218d7bc9d876b9UL,
+++	/*  42 */ 0xe3081542997c178aUL, 0x3c2d29a86fb6606fUL,
+++		  0x5c217736fa279374UL, 0x7dde05734afeb1faUL,
+++	/*  43 */ 0x3bf10e3906d42babUL, 0xe4f7803e1980649cUL,
+++		  0xe6053bf89595bf7aUL, 0x394faf38da245530UL,
+++	/*  44 */ 0x7a8efb58896928f4UL, 0xfbc778e9cc6a113cUL,
+++		  0x72670ce330af596fUL, 0x48f222a81d3d6cf7UL,
+++	/*  45 */ 0xf01fce410d72caa7UL, 0x5a20ecc7213b5595UL,
+++		  0x7bc21165c1fa1483UL, 0x07f89ae31da8a741UL,
+++	/*  46 */ 0x05d2c2b4c6830ff9UL, 0xd43e330fc6316293UL,
+++		  0xa5a5590a96d3a904UL, 0x705edb91a65333b6UL,
+++	/*  47 */ 0x048ee15e0bb9a5f7UL, 0x3240cfca9e0aaf5dUL,
+++		  0x8f4b71ceedc4a40bUL, 0x621c0da3de544a6dUL,
+++	/*  48 */ 0x92872836a08c4091UL, 0xce8375b010c91445UL,
+++		  0x8a72eb524f276394UL, 0x2667fcfa7ec83635UL,
+++	/*  49 */ 0x7f4c173345e8752aUL, 0x061b47feee7079a5UL,
+++		  0x25dd9afa9f86ff34UL, 0x3780cef5425dc89cUL,
+++	/*  50 */ 0x1a46035a513bb4e9UL, 0x3e1ef379ac575adaUL,
+++		  0xc78c5f1c5fa24b50UL, 0x321a967634fd9f22UL,
+++	/*  51 */ 0x946707b8826e27faUL, 0x3dca84d64c506fd0UL,
+++		  0xc189218075e91436UL, 0x6d9284169b3b8484UL,
+++	/*  52 */ 0x3a67e840383f2ddfUL, 0x33eec9a30c4f9b75UL,
+++		  0x3ec7c86fa783ef47UL, 0x26ec449fbac9fbc4UL,
+++	/*  53 */ 0x5c0f38cba09b9e7dUL, 0x81168cc762a3478cUL,
+++		  0x3e23b0d306fc121cUL, 0x5a238aa0a5efdcddUL,
+++	/*  54 */ 0x1ba26121c4ea43ffUL, 0x36f8c77f7c8832b5UL,
+++		  0x88fbea0b0adcf99aUL, 0x5ca9938ec25bebf9UL,
+++	/*  55 */ 0xd5436a5e51fccda0UL, 0x1dbc4797c2cd893bUL,
+++		  0x19346a65d3224a08UL, 0x0f5034e49b9af466UL,
+++	/*  56 */ 0xf23c3967a1e0b96eUL, 0xe58b08fa867a4d88UL,
+++		  0xfb2fabc6a7341679UL, 0x2a75381eb6026946UL,
+++	/*  57 */ 0xc80a3be4c19420acUL, 0x66b1f6c681f2b6dcUL,
+++		  0x7cf7036761e93388UL, 0x25abbbd8a660a4c4UL,
+++	/*  58 */ 0x91ea12ba14fd5198UL, 0x684950fc4a3cffa9UL,
+++		  0xf826842130f5ad28UL, 0x3ea988f75301a441UL,
+++	/*  59 */ 0xc978109a695f8c6fUL, 0x1746eb4a0530c3f3UL,
+++		  0x444d6d77b4459995UL, 0x75952b8c054e5cc7UL,
+++	/*  60 */ 0xa3703f7915f4d6aaUL, 0x66c346202f2647d8UL,
+++		  0xd01469df811d644bUL, 0x77fea47d81a5d71fUL,
+++	/*  61 */ 0xc5e9529ef57ca381UL, 0x6eeeb4b9ce2f881aUL,
+++		  0xb6e91a28e8009bd6UL, 0x4b80be3e9afc3fecUL,
+++	/*  62 */ 0x7e3773c526aed2c5UL, 0x1b4afcb453c9a49dUL,
+++		  0xa920bdd7baffb24dUL, 0x7c54699f122d400eUL,
+++	/*  63 */ 0xef46c8e14fa94bc8UL, 0xe0b074ce2952ed5eUL,
+++		  0xbea450e1dbd885d5UL, 0x61b68649320f712cUL,
+++	/*  64 */ 0x8a485f7309ccbdd1UL, 0xbd06320d7d4d1a2dUL,
+++		  0x25232973322dbef4UL, 0x445dc4758c17f770UL,
+++	/*  65 */ 0xdb0434177cc8933cUL, 0xed6fe82175ea059fUL,
+++		  0x1efebefdc053db34UL, 0x4adbe867c65daf99UL,
+++	/*  66 */ 0x3acd71a2a90609dfUL, 0xe5e991856dd04050UL,
+++		  0x1ec69b688157c23cUL, 0x697427f6885cfe4dUL,
+++	/*  67 */ 0xd7be7b9b65e1a851UL, 0xa03d28d522c536ddUL,
+++		  0x28399d658fd2b645UL, 0x49e5b7e17c2641e1UL,
+++	/*  68 */ 0x6f8c3a98700457a4UL, 0x5078f0a25ebb6778UL,
+++		  0xd13c3ccbc382960fUL, 0x2e003258a7df84b1UL,
+++	/*  69 */ 0x8ad1f39be6296a1cUL, 0xc1eeaa652a5fbfb2UL,
+++		  0x33ee0673fd26f3cbUL, 0x59256173a69d2cccUL,
+++	/*  70 */ 0x41ea07aa4e18fc41UL, 0xd9fc19527c87a51eUL,
+++		  0xbdaacb805831ca6fUL, 0x445b652dc916694fUL,
+++	/*  71 */ 0xce92a3a7f2172315UL, 0x1edc282de11b9964UL,
+++		  0xa1823aafe04c314aUL, 0x790a2d94437cf586UL,
+++	/*  72 */ 0x71c447fb93f6e009UL, 0x8922a56722845276UL,
+++		  0xbf70903b204f5169UL, 0x2f7a89891ba319feUL,
+++	/*  73 */ 0x02a08eb577e2140cUL, 0xed9a4ed4427bdcf4UL,
+++		  0x5253ec44e4323cd1UL, 0x3e88363c14e9355bUL,
+++	/*  74 */ 0xaa66c14277110b8cUL, 0x1ae0391610a23390UL,
+++		  0x2030bd12c93fc2a2UL, 0x3ee141579555c7abUL,
+++	/*  75 */ 0x9214de3a6d6e7d41UL, 0x3ccdd88607f17efeUL,
+++		  0x674f1288f8e11217UL, 0x5682250f329f93d0UL,
+++	/*  76 */ 0x6cf00b136d2e396eUL, 0x6e4cf86f1014debfUL,
+++		  0x5930b1b5bfcc4e83UL, 0x047069b48aba16b6UL,
+++	/*  77 */ 0x0d4ce4ab69b20793UL, 0xb24db91a97d0fb9eUL,
+++		  0xcdfa50f54e00d01dUL, 0x221b1085368bddb5UL,
+++	/*  78 */ 0xe7e59468b1e3d8d2UL, 0x53c56563bd122f93UL,
+++		  0xeee8a903e0663f09UL, 0x61efa662cbbe3d42UL,
+++	/*  79 */ 0x2cf8ddddde6eab2aUL, 0x9bf80ad51435f231UL,
+++		  0x5deadacec9f04973UL, 0x29275b5d41d29b27UL,
+++	/*  80 */ 0xcfde0f0895ebf14fUL, 0xb9aab96b054905a7UL,
+++		  0xcae80dd9a1c420fdUL, 0x0a63bf2f1673bbc7UL,
+++	/*  81 */ 0x092f6e11958fbc8cUL, 0x672a81e804822fadUL,
+++		  0xcac8351560d52517UL, 0x6f3f7722c8f192f8UL,
+++	/*  82 */ 0xf8ba90ccc2e894b7UL, 0x2c7557a438ff9f0dUL,
+++		  0x894d1d855ae52359UL, 0x68e122157b743d69UL,
+++	/*  83 */ 0xd87e5570cfb919f3UL, 0x3f2cdecd95798db9UL,
+++		  0x2121154710c0a2ceUL, 0x3c66a115246dc5b2UL,
+++	/*  84 */ 0xcbedc562294ecb72UL, 0xba7143c36a280b16UL,
+++		  0x9610c2efd4078b67UL, 0x6144735d946a4b1eUL,
+++	/*  85 */ 0x536f111ed75b3350UL, 0x0211db8c2041d81bUL,
+++		  0xf93cb1000e10413cUL, 0x149dfd3c039e8876UL,
+++	/*  86 */ 0xd479dde46b63155bUL, 0xb66e15e93c837976UL,
+++		  0xdafde43b1f13e038UL, 0x5fafda1a2e4b0b35UL,
+++	/*  87 */ 0x3600bbdf17197581UL, 0x3972050bbe3cd2c2UL,
+++		  0x5938906dbdd5be86UL, 0x34fce5e43f9b860fUL,
+++	/*  88 */ 0x75a8a4cd42d14d02UL, 0x828dabc53441df65UL,
+++		  0x33dcabedd2e131d3UL, 0x3ebad76fb814d25fUL,
+++	/*  89 */ 0xd4906f566f70e10fUL, 0x5d12f7aa51690f5aUL,
+++		  0x45adb16e76cefcf2UL, 0x01f768aead232999UL,
+++	/*  90 */ 0x2b6cc77b6248febdUL, 0x3cd30628ec3aaffdUL,
+++		  0xce1c0b80d4ef486aUL, 0x4c3bff2ea6f66c23UL,
+++	/*  91 */ 0x3f2ec4094aeaeb5fUL, 0x61b19b286e372ca7UL,
+++		  0x5eefa966de2a701dUL, 0x23b20565de55e3efUL,
+++	/*  92 */ 0xe301ca5279d58557UL, 0x07b2d4ce27c2874fUL,
+++		  0xa532cd8a9dcf1d67UL, 0x2a52fee23f2bff56UL,
+++	/*  93 */ 0x8624efb37cd8663dUL, 0xbbc7ac20ffbd7594UL,
+++		  0x57b85e9c82d37445UL, 0x7b3052cb86a6ec66UL,
+++	/*  94 */ 0x3482f0ad2525e91eUL, 0x2cb68043d28edca0UL,
+++		  0xaf4f6d052e1b003aUL, 0x185f8c2529781b0aUL,
+++	/*  95 */ 0xaa41de5bd80ce0d6UL, 0x9407b2416853e9d6UL,
+++		  0x563ec36e357f4c3aUL, 0x4cc4b8dd0e297bceUL,
+++	/*  96 */ 0xa2fc1a52ffb8730eUL, 0x1811f16e67058e37UL,
+++		  0x10f9a366cddf4ee1UL, 0x72f4a0c4a0b9f099UL,
+++	/*  97 */ 0x8c16c06f663f4ea7UL, 0x693b3af74e970fbaUL,
+++		  0x2102e7f1d69ec345UL, 0x0ba53cbc968a8089UL,
+++	/*  98 */ 0xca3d9dc7fea15537UL, 0x4c6824bb51536493UL,
+++		  0xb9886314844006b1UL, 0x40d2a72ab454cc60UL,
+++	/*  99 */ 0x5936a1b712570975UL, 0x91b9d648debda657UL,
+++		  0x3344094bb64330eaUL, 0x006ba10d12ee51d0UL,
+++	/* 100 */ 0x19228468f5de5d58UL, 0x0eb12f4c38cc05b0UL,
+++		  0xa1039f9dd5601990UL, 0x4502d4ce4fff0e0bUL,
+++	/* 101 */ 0xeb2054106837c189UL, 0xd0f6544c6dd3b93cUL,
+++		  0x40727064c416d74fUL, 0x6e15c6114b502ef0UL,
+++	/* 102 */ 0x4df2a398cfb1a76bUL, 0x11256c7419f2f6b1UL,
+++		  0x4a497962066e6043UL, 0x705b3aab41355b44UL,
+++	/* 103 */ 0x365ef536d797b1d8UL, 0x00076bd622ddf0dbUL,
+++		  0x3bbf33b0e0575a88UL, 0x3777aa05c8e4ca4dUL,
+++	/* 104 */ 0x392745c85578db5fUL, 0x6fda4149dbae5ae2UL,
+++		  0xb1f0b00b8adc9867UL, 0x09963437d36f1da3UL,
+++	/* 105 */ 0x7e824e90a5dc3853UL, 0xccb5f6641f135cbdUL,
+++		  0x6736d86c87ce8fccUL, 0x625f3ce26604249fUL,
+++	/* 106 */ 0xaf8ac8059502f63fUL, 0x0c05e70a2e351469UL,
+++		  0x35292e9c764b6305UL, 0x1a394360c7e23ac3UL,
+++	/* 107 */ 0xd5c6d53251183264UL, 0x62065abd43c2b74fUL,
+++		  0xb5fbf5d03b973f9bUL, 0x13a3da3661206e5eUL,
+++	/* 108 */ 0xc6bd5837725d94e5UL, 0x18e30912205016c5UL,
+++		  0x2088ce1570033c68UL, 0x7fba1f495c837987UL,
+++	/* 109 */ 0x5a8c7423f2f9079dUL, 0x1735157b34023fc5UL,
+++		  0xe4f9b49ad2fab351UL, 0x6691ff72c878e33cUL,
+++	/* 110 */ 0x122c2adedc5eff3eUL, 0xf8dd4bf1d8956cf4UL,
+++		  0xeb86205d9e9e5bdaUL, 0x049b92b9d975c743UL,
+++	/* 111 */ 0xa5379730b0f6c05aUL, 0x72a0ffacc6f3a553UL,
+++		  0xb0032c34b20dcd6dUL, 0x470e9dbc88d5164aUL,
+++	/* 112 */ 0xb19cf10ca237c047UL, 0xb65466711f6c81a2UL,
+++		  0xb3321bd16dd80b43UL, 0x48c14f600c5fbe8eUL,
+++	/* 113 */ 0x66451c264aa6c803UL, 0xb66e3904a4fa7da6UL,
+++		  0xd45f19b0b3128395UL, 0x31602627c3c9bc10UL,
+++	/* 114 */ 0x3120dc4832e4e10dUL, 0xeb20c46756c717f7UL,
+++		  0x00f52e3f67280294UL, 0x566d4fc14730c509UL,
+++	/* 115 */ 0x7e3a5d40fd837206UL, 0xc1e926dc7159547aUL,
+++		  0x216730fba68d6095UL, 0x22e8c3843f69cea7UL,
+++	/* 116 */ 0x33d074e8930e4b2bUL, 0xb6e4350e84d15816UL,
+++		  0x5534c26ad6ba2365UL, 0x7773c12f89f1f3f3UL,
+++	/* 117 */ 0x8cba404da57962aaUL, 0x5b9897a81999ce56UL,
+++		  0x508e862f121692fcUL, 0x3a81907fa093c291UL,
+++	/* 118 */ 0x0dded0ff4725a510UL, 0x10d8cc10673fc503UL,
+++		  0x5b9d151c9f1f4e89UL, 0x32a5c1d5cb09a44cUL,
+++	/* 119 */ 0x1e0aa442b90541fbUL, 0x5f85eb7cc1b485dbUL,
+++		  0xbee595ce8a9df2e5UL, 0x25e496c722422236UL,
+++	/* 120 */ 0x5edf3c46cd0fe5b9UL, 0x34e75a7ed2a43388UL,
+++		  0xe488de11d761e352UL, 0x0e878a01a085545cUL,
+++	/* 121 */ 0xba493c77e021bb04UL, 0x2b4d1843c7df899aUL,
+++		  0x9ea37a487ae80d67UL, 0x67a9958011e41794UL,
+++	/* 122 */ 0x4b58051a6697b065UL, 0x47e33f7d8d6ba6d4UL,
+++		  0xbb4da8d483ca46c1UL, 0x68becaa181c2db0dUL,
+++	/* 123 */ 0x8d8980e90b989aa5UL, 0xf95eb14a2c93c99bUL,
+++		  0x51c6c7c4796e73a2UL, 0x6e228363b5efb569UL,
+++	/* 124 */ 0xc6bbc0b02dd624c8UL, 0x777eb47dec8170eeUL,
+++		  0x3cde15a004cfafa9UL, 0x1dc6bc087160bf9bUL,
+++	/* 125 */ 0x2e07e043eec34002UL, 0x18e9fc677a68dc7fUL,
+++		  0xd8da03188bd15b9aUL, 0x48fbc3bb00568253UL,
+++	/* 126 */ 0x57547d4cfb654ce1UL, 0xd3565b82a058e2adUL,
+++		  0xf63eaf0bbf154478UL, 0x47531ef114dfbb18UL,
+++	/* 127 */ 0xe1ec630a4278c587UL, 0x5507d546ca8e83f3UL,
+++		  0x85e135c63adc0c2bUL, 0x0aa7efa85682844eUL,
+++	/* 128 */ 0x72691ba8b3e1f615UL, 0x32b4e9701fbe3ffaUL,
+++		  0x97b6d92e39bb7868UL, 0x2cfe53dea02e39e8UL,
+++	/* 129 */ 0x687392cd85cd52b0UL, 0x27ff66c910e29831UL,
+++		  0x97134556a9832d06UL, 0x269bb0360a84f8a0UL,
+++	/* 130 */ 0x706e55457643f85cUL, 0x3734a48c9b597d1bUL,
+++		  0x7aee91e8c6efa472UL, 0x5cd6abc198a9d9e0UL,
+++	/* 131 */ 0x0e04de06cb3ce41aUL, 0xd8c6eb893402e138UL,
+++		  0x904659bb686e3772UL, 0x7215c371746ba8c8UL,
+++	/* 132 */ 0xfd12a97eeae4a2d9UL, 0x9514b7516394f2c5UL,
+++		  0x266fd5809208f294UL, 0x5c847085619a26b9UL,
+++	/* 133 */ 0x52985410fed694eaUL, 0x3c905b934a2ed254UL,
+++		  0x10bb47692d3be467UL, 0x063b3d2d69e5e9e1UL,
+++	/* 134 */ 0x472726eedda57debUL, 0xefb6c4ae10f41891UL,
+++		  0x2b1641917b307614UL, 0x117c554fc4f45b7cUL,
+++	/* 135 */ 0xc07cf3118f9d8812UL, 0x01dbd82050017939UL,
+++		  0xd7e803f4171b2827UL, 0x1015e87487d225eaUL,
+++	/* 136 */ 0xc58de3fed23acc4dUL, 0x50db91c294a7be2dUL,
+++		  0x0b94d43d1c9cf457UL, 0x6b1640fa6e37524aUL,
+++	/* 137 */ 0x692f346c5fda0d09UL, 0x200b1c59fa4d3151UL,
+++		  0xb8c46f760777a296UL, 0x4b38395f3ffdfbcfUL,
+++	/* 138 */ 0x18d25e00be54d671UL, 0x60d50582bec8aba6UL,
+++		  0x87ad8f263b78b982UL, 0x50fdf64e9cda0432UL,
+++	/* 139 */ 0x90f567aac578dcf0UL, 0xef1e9b0ef2a3133bUL,
+++		  0x0eebba9242d9de71UL, 0x15473c9bf03101c7UL,
+++	/* 140 */ 0x7c77e8ae56b78095UL, 0xb678e7666e6f078eUL,
+++		  0x2da0b9615348ba1fUL, 0x7cf931c1ff733f0bUL,
+++	/* 141 */ 0x26b357f50a0a366cUL, 0xe9708cf42b87d732UL,
+++		  0xc13aeea5f91cb2c0UL, 0x35d90c991143bb4cUL,
+++	/* 142 */ 0x47c1c404a9a0d9dcUL, 0x659e58451972d251UL,
+++		  0x3875a8c473b38c31UL, 0x1fbd9ed379561f24UL,
+++	/* 143 */ 0x11fabc6fd41ec28dUL, 0x7ef8dfe3cd2a2dcaUL,
+++		  0x72e73b5d8c404595UL, 0x6135fa4954b72f27UL,
+++	/* 144 */ 0xccfc32a2de24b69cUL, 0x3f55698c1f095d88UL,
+++		  0xbe3350ed5ac3f929UL, 0x5e9bf806ca477eebUL,
+++	/* 145 */ 0xe9ce8fb63c309f68UL, 0x5376f63565e1f9f4UL,
+++		  0xd1afcfb35a6393f1UL, 0x6632a1ede5623506UL,
+++	/* 146 */ 0x0b7d6c390c2ded4cUL, 0x56cb3281df04cb1fUL,
+++		  0x66305a1249ecc3c7UL, 0x5d588b60a38ca72aUL,
+++	/* 147 */ 0xa6ecbf78e8e5f42dUL, 0x86eeb44b3c8a3eecUL,
+++		  0xec219c48fbd21604UL, 0x1aaf1af517c36731UL,
+++	/* 148 */ 0xc306a2836769bde7UL, 0x208280622b1e2adbUL,
+++		  0x8027f51ffbff94a6UL, 0x76cfa1ce1124f26bUL,
+++	/* 149 */ 0x18eb00562422abb6UL, 0xf377c4d58f8c29c3UL,
+++		  0x4dbbc207f531561aUL, 0x0253b7f082128a27UL,
+++	/* 150 */ 0x3d1f091cb62c17e0UL, 0x4860e1abd64628a9UL,
+++		  0x52d17436309d4253UL, 0x356f97e13efae576UL,
+++	/* 151 */ 0xd351e11aa150535bUL, 0x3e6b45bb1dd878ccUL,
+++		  0x0c776128bed92c98UL, 0x1d34ae93032885b8UL,
+++	/* 152 */ 0x4ba0488ca85ba4c3UL, 0x985348c33c9ce6ceUL,
+++		  0x66124c6f97bda770UL, 0x0f81a0290654124aUL,
+++	/* 153 */ 0x9ed09ca6569b86fdUL, 0x811009fd18af9a2dUL,
+++		  0xff08d03f93d8c20aUL, 0x52a148199faef26bUL,
+++	/* 154 */ 0x3e03f9dc2d8d1b73UL, 0x4205801873961a70UL,
+++		  0xc0d987f041a35970UL, 0x07aa1f15a1c0d549UL,
+++	/* 155 */ 0xdfd46ce08cd27224UL, 0x6d0a024f934e4239UL,
+++		  0x808a7a6399897b59UL, 0x0a4556e9e13d95a2UL,
+++	/* 156 */ 0xd21a991fe9c13045UL, 0x9b0e8548fe7751b8UL,
+++		  0x5da643cb4bf30035UL, 0x77db28d63940f721UL,
+++	/* 157 */ 0xfc5eeb614adc9011UL, 0x5229419ae8c411ebUL,
+++		  0x9ec3e7787d1dcf74UL, 0x340d053e216e4cb5UL,
+++	/* 158 */ 0xcac7af39b48df2b4UL, 0xc0faec2871a10a94UL,
+++		  0x140a69245ca575edUL, 0x0cf1c37134273a4cUL,
+++	/* 159 */ 0xc8ee306ac224b8a5UL, 0x57eaee7ccb4930b0UL,
+++		  0xa1e806bdaacbe74fUL, 0x7d9a62742eeb657dUL,
+++	/* 160 */ 0x9eb6b6ef546c4830UL, 0x885cca1fddb36e2eUL,
+++		  0xe6b9f383ef0d7105UL, 0x58654fef9d2e0412UL,
+++	/* 161 */ 0xa905c4ffbe0e8e26UL, 0x942de5df9b31816eUL,
+++		  0x497d723f802e88e1UL, 0x30684dea602f408dUL,
+++	/* 162 */ 0x21e5a278a3e6cb34UL, 0xaefb6e6f5b151dc4UL,
+++		  0xb30b8e049d77ca15UL, 0x28c3c9cf53b98981UL,
+++	/* 163 */ 0x287fb721556cdd2aUL, 0x0d317ca897022274UL,
+++		  0x7468c7423a543258UL, 0x4a7f11464eb5642fUL,
+++	/* 164 */ 0xa237a4774d193aa6UL, 0xd865986ea92129a1UL,
+++		  0x24c515ecf87c1a88UL, 0x604003575f39f5ebUL,
+++	/* 165 */ 0x47b9f189570a9b27UL, 0x2b98cede465e4b78UL,
+++		  0x026df551dbb85c20UL, 0x74fcd91047e21901UL,
+++	/* 166 */ 0x13e2a90a23c1bfa3UL, 0x0cb0074e478519f6UL,
+++		  0x5ff1cbbe3af6cf44UL, 0x67fe5438be812dbeUL,
+++	/* 167 */ 0xd13cf64fa40f05b0UL, 0x054dfb2f32283787UL,
+++		  0x4173915b7f0d2aeaUL, 0x482f144f1f610d4eUL,
+++	/* 168 */ 0xf6210201b47f8234UL, 0x5d0ae1929e70b990UL,
+++		  0xdcd7f455b049567cUL, 0x7e93d0f1f0916f01UL,
+++	/* 169 */ 0xdd79cbf18a7db4faUL, 0xbe8391bf6f74c62fUL,
+++		  0x027145d14b8291bdUL, 0x585a73ea2cbf1705UL,
+++	/* 170 */ 0x485ca03e928a0db2UL, 0x10fc01a5742857e7UL,
+++		  0x2f482edbd6d551a7UL, 0x0f0433b5048fdb8aUL,
+++	/* 171 */ 0x60da2e8dd7dc6247UL, 0x88b4c9d38cd4819aUL,
+++		  0x13033ac001f66697UL, 0x273b24fe3b367d75UL,
+++	/* 172 */ 0xc6e8f66a31b3b9d4UL, 0x281514a494df49d5UL,
+++		  0xd1726fdfc8b23da7UL, 0x4b3ae7d103dee548UL,
+++	/* 173 */ 0xc6256e19ce4b9d7eUL, 0xff5c5cf186e3c61cUL,
+++		  0xacc63ca34b8ec145UL, 0x74621888fee66574UL,
+++	/* 174 */ 0x956f409645290a1eUL, 0xef0bf8e3263a962eUL,
+++		  0xed6a50eb5ec2647bUL, 0x0694283a9dca7502UL,
+++	/* 175 */ 0x769b963643a2dcd1UL, 0x42b7c8ea09fc5353UL,
+++		  0x4f002aee13397eabUL, 0x63005e2c19b7d63aUL,
+++	/* 176 */ 0xca6736da63023beaUL, 0x966c7f6db12a99b7UL,
+++		  0xace09390c537c5e1UL, 0x0b696063a1aa89eeUL,
+++	/* 177 */ 0xebb03e97288c56e5UL, 0x432a9f9f938c8be8UL,
+++		  0xa6a5a93d5b717f71UL, 0x1a5fb4c3e18f9d97UL,
+++	/* 178 */ 0x1c94e7ad1c60cdceUL, 0xee202a43fc02c4a0UL,
+++		  0x8dafe4d867c46a20UL, 0x0a10263c8ac27b58UL,
+++	/* 179 */ 0xd0dea9dfe4432a4aUL, 0x856af87bbe9277c5UL,
+++		  0xce8472acc212c71aUL, 0x6f151b6d9bbb1e91UL,
+++	/* 180 */ 0x26776c527ceed56aUL, 0x7d211cb7fbf8faecUL,
+++		  0x37ae66a6fd4609ccUL, 0x1f81b702d2770c42UL,
+++	/* 181 */ 0x2fb0b057eac58392UL, 0xe1dd89fe29744e9dUL,
+++		  0xc964f8eb17beb4f8UL, 0x29571073c9a2d41eUL,
+++	/* 182 */ 0xa948a18981c0e254UL, 0x2df6369b65b22830UL,
+++		  0xa33eb2d75fcfd3c6UL, 0x078cd6ec4199a01fUL,
+++	/* 183 */ 0x4a584a41ad900d2fUL, 0x32142b78e2c74c52UL,
+++		  0x68c4e8338431c978UL, 0x7f69ea9008689fc2UL,
+++	/* 184 */ 0x52f2c81e46a38265UL, 0xfd78072d04a832fdUL,
+++		  0x8cd7d5fa25359e94UL, 0x4de71b7454cc29d2UL,
+++	/* 185 */ 0x42eb60ad1eda6ac9UL, 0x0aad37dfdbc09c3aUL,
+++		  0x81004b71e33cc191UL, 0x44e6be345122803cUL,
+++	/* 186 */ 0x03fe8388ba1920dbUL, 0xf5d57c32150db008UL,
+++		  0x49c8c4281af60c29UL, 0x21edb518de701aeeUL,
+++	/* 187 */ 0x7fb63e418f06dc99UL, 0xa4460d99c166d7b8UL,
+++		  0x24dd5248ce520a83UL, 0x5ec3ad712b928358UL,
+++	/* 188 */ 0x15022a5fbd17930fUL, 0xa4f64a77d82570e3UL,
+++		  0x12bc8d6915783712UL, 0x498194c0fc620abbUL,
+++	/* 189 */ 0x38a2d9d255686c82UL, 0x785c6bd9193e21f0UL,
+++		  0xe4d5c81ab24a5484UL, 0x56307860b2e20989UL,
+++	/* 190 */ 0x429d55f78b4d74c4UL, 0x22f1834643350131UL,
+++		  0x1e60c24598c71fffUL, 0x59f2f014979983efUL,
+++	/* 191 */ 0x46a47d56eb494a44UL, 0x3e22a854d636a18eUL,
+++		  0xb346e15274491c3bUL, 0x2ceafd4e5390cde7UL,
+++	/* 192 */ 0xba8a8538be0d6675UL, 0x4b9074bb50818e23UL,
+++		  0xcbdab89085d304c3UL, 0x61a24fe0e56192c4UL,
+++	/* 193 */ 0xcb7615e6db525bcbUL, 0xdd7d8c35a567e4caUL,
+++		  0xe6b4153acafcdd69UL, 0x2d668e097f3c9766UL,
+++	/* 194 */ 0xa57e7e265ce55ef0UL, 0x5d9f4e527cd4b967UL,
+++		  0xfbc83606492fd1e5UL, 0x090d52beb7c3f7aeUL,
+++	/* 195 */ 0x09b9515a1e7b4d7cUL, 0x1f266a2599da44c0UL,
+++		  0xa1c49548e2c55504UL, 0x7ef04287126f15ccUL,
+++	/* 196 */ 0xfed1659dbd30ef15UL, 0x8b4ab9eec4e0277bUL,
+++		  0x884d6236a5df3291UL, 0x1fd96ea6bf5cf788UL,
+++	/* 197 */ 0x42a161981f190d9aUL, 0x61d849507e6052c1UL,
+++		  0x9fe113bf285a2cd5UL, 0x7c22d676dbad85d8UL,
+++	/* 198 */ 0x82e770ed2bfbd27dUL, 0x4c05b2ece996f5a5UL,
+++		  0xcd40a9c2b0900150UL, 0x5895319213d9bf64UL,
+++	/* 199 */ 0xe7cc5d703fea2e08UL, 0xb50c491258e2188cUL,
+++		  0xcce30baa48205bf0UL, 0x537c659ccfa32d62UL,
+++	/* 200 */ 0x37b6623a98cfc088UL, 0xfe9bed1fa4d6aca4UL,
+++		  0x04d29b8e56a8d1b0UL, 0x725f71c40b519575UL,
+++	/* 201 */ 0x28c7f89cd0339ce6UL, 0x8367b14469ddc18bUL,
+++		  0x883ada83a6a1652cUL, 0x585f1974034d6c17UL,
+++	/* 202 */ 0x89cfb266f1b19188UL, 0xe63b4863e7c35217UL,
+++		  0xd88c9da6b4c0526aUL, 0x3e035c9df0954635UL,
+++	/* 203 */ 0xdd9d5412fb45de9dUL, 0xdd684532e4cff40dUL,
+++		  0x4b5c999b151d671cUL, 0x2d8c2cc811e7f690UL,
+++	/* 204 */ 0x7f54be1d90055d40UL, 0xa464c5df464aaf40UL,
+++		  0x33979624f0e917beUL, 0x2c018dc527356b30UL,
+++	/* 205 */ 0xa5415024e330b3d4UL, 0x73ff3d96691652d3UL,
+++		  0x94ec42c4ef9b59f1UL, 0x0747201618d08e5aUL,
+++	/* 206 */ 0x4d6ca48aca411c53UL, 0x66415f2fcfa66119UL,
+++		  0x9c4dd40051e227ffUL, 0x59810bc09a02f7ebUL,
+++	/* 207 */ 0x2a7eb171b3dc101dUL, 0x441c5ab99ffef68eUL,
+++		  0x32025c9b93b359eaUL, 0x5e8ce0a71e9d112fUL,
+++	/* 208 */ 0xbfcccb92429503fdUL, 0xd271ba752f095d55UL,
+++		  0x345ead5e972d091eUL, 0x18c8df11a83103baUL,
+++	/* 209 */ 0x90cd949a9aed0f4cUL, 0xc5d1f4cb6660e37eUL,
+++		  0xb8cac52d56c52e0bUL, 0x6e42e400c5808e0dUL,
+++	/* 210 */ 0xa3b46966eeaefd23UL, 0x0c4f1f0be39ecdcaUL,
+++		  0x189dc8c9d683a51dUL, 0x51f27f054c09351bUL,
+++	/* 211 */ 0x4c487ccd2a320682UL, 0x587ea95bb3df1c96UL,
+++		  0xc8ccf79e555cb8e8UL, 0x547dc829a206d73dUL,
+++	/* 212 */ 0xb822a6cd80c39b06UL, 0xe96d54732000d4c6UL,
+++		  0x28535b6f91463b4dUL, 0x228f4660e2486e1dUL,
+++	/* 213 */ 0x98799538de8d3abfUL, 0x8cd8330045ebca6eUL,
+++		  0x79952a008221e738UL, 0x4322e1a7535cd2bbUL,
+++	/* 214 */ 0xb114c11819d1801cUL, 0x2016e4d84f3f5ec7UL,
+++		  0xdd0e2df409260f4cUL, 0x5ec362c0ae5f7266UL,
+++	/* 215 */ 0xc0462b18b8b2b4eeUL, 0x7cc8d950274d1afbUL,
+++		  0xf25f7105436b02d2UL, 0x43bbf8dcbff9ccd3UL,
+++	/* 216 */ 0xb6ad1767a039e9dfUL, 0xb0714da8f69d3583UL,
+++		  0x5e55fa18b42931f5UL, 0x4ed5558f33c60961UL,
+++	/* 217 */ 0x1fe37901c647a5ddUL, 0x593ddf1f8081d357UL,
+++		  0x0249a4fd813fd7a6UL, 0x69acca274e9caf61UL,
+++	/* 218 */ 0x047ba3ea330721c9UL, 0x83423fc20e7e1ea0UL,
+++		  0x1df4c0af01314a60UL, 0x09a62dab89289527UL,
+++	/* 219 */ 0xa5b325a49cc6cb00UL, 0xe94b5dc654b56cb6UL,
+++		  0x3be28779adc994a0UL, 0x4296e8f8ba3a4aadUL,
+++	/* 220 */ 0x328689761e451eabUL, 0x2e4d598bff59594aUL,
+++		  0x49b96853d7a7084aUL, 0x4980a319601420a8UL,
+++	/* 221 */ 0x9565b9e12f552c42UL, 0x8a5318db7100fe96UL,
+++		  0x05c90b4d43add0d7UL, 0x538b4cd66a5d4edaUL,
+++	/* 222 */ 0xf4e94fc3e89f039fUL, 0x592c9af26f618045UL,
+++		  0x08a36eb5fd4b9550UL, 0x25fffaf6c2ed1419UL,
+++	/* 223 */ 0x34434459cc79d354UL, 0xeeecbfb4b1d5476bUL,
+++		  0xddeb34a061615d99UL, 0x5129cecceb64b773UL,
+++	/* 224 */ 0xee43215894993520UL, 0x772f9c7cf14c0b3bUL,
+++		  0xd2e2fce306bedad5UL, 0x715f42b546f06a97UL,
+++	/* 225 */ 0x434ecdceda5b5f1aUL, 0x0da17115a49741a9UL,
+++		  0x680bd77c73edad2eUL, 0x487c02354edd9041UL,
+++	/* 226 */ 0xb8efeff3a70ed9c4UL, 0x56a32aa3e857e302UL,
+++		  0xdf3a68bd48a2a5a0UL, 0x07f650b73176c444UL,
+++	/* 227 */ 0xe38b9b1626e0ccb1UL, 0x79e053c18b09fb36UL,
+++		  0x56d90319c9f94964UL, 0x1ca941e7ac9ff5c4UL,
+++	/* 228 */ 0x49c4df29162fa0bbUL, 0x8488cf3282b33305UL,
+++		  0x95dfda14cabb437dUL, 0x3391f78264d5ad86UL,
+++	/* 229 */ 0x729ae06ae2b5095dUL, 0xd58a58d73259a946UL,
+++		  0xe9834262d13921edUL, 0x27fedafaa54bb592UL,
+++	/* 230 */ 0xa99dc5b829ad48bbUL, 0x5f025742499ee260UL,
+++		  0x802c8ecd5d7513fdUL, 0x78ceb3ef3f6dd938UL,
+++	/* 231 */ 0xc342f44f8a135d94UL, 0x7b9edb44828cdda3UL,
+++		  0x9436d11a0537cfe7UL, 0x5064b164ec1ab4c8UL,
+++	/* 232 */ 0x7020eccfd37eb2fcUL, 0x1f31ea3ed90d25fcUL,
+++		  0x1b930d7bdfa1bb34UL, 0x5344467a48113044UL,
+++	/* 233 */ 0x70073170f25e6dfbUL, 0xe385dc1a50114cc8UL,
+++		  0x2348698ac8fc4f00UL, 0x2a77a55284dd40d8UL,
+++	/* 234 */ 0xfe06afe0c98c6ce4UL, 0xc235df96dddfd6e4UL,
+++		  0x1428d01e33bf1ed3UL, 0x785768ec9300bdafUL,
+++	/* 235 */ 0x9702e57a91deb63bUL, 0x61bdb8bfe5ce8b80UL,
+++		  0x645b426f3d1d58acUL, 0x4804a82227a557bcUL,
+++	/* 236 */ 0x8e57048ab44d2601UL, 0x68d6501a4b3a6935UL,
+++		  0xc39c9ec3f9e1c293UL, 0x4172f257d4de63e2UL,
+++	/* 237 */ 0xd368b450330c6401UL, 0x040d3017418f2391UL,
+++		  0x2c34bb6090b7d90dUL, 0x16f649228fdfd51fUL,
+++	/* 238 */ 0xbea6818e2b928ef5UL, 0xe28ccf91cdc11e72UL,
+++		  0x594aaa68e77a36cdUL, 0x313034806c7ffd0fUL,
+++	/* 239 */ 0x8a9d27ac2249bd65UL, 0x19a3b464018e9512UL,
+++		  0xc26ccff352b37ec7UL, 0x056f68341d797b21UL,
+++	/* 240 */ 0x5e79d6757efd2327UL, 0xfabdbcb6553afe15UL,
+++		  0xd3e7222c6eaf5a60UL, 0x7046c76d4dae743bUL,
+++	/* 241 */ 0x660be872b18d4a55UL, 0x19992518574e1496UL,
+++		  0xc103053a302bdcbbUL, 0x3ed8e9800b218e8eUL,
+++	/* 242 */ 0x7b0b9239fa75e03eUL, 0xefe9fb684633c083UL,
+++		  0x98a35fbe391a7793UL, 0x6065510fe2d0fe34UL,
+++	/* 243 */ 0x55cb668548abad0cUL, 0xb4584548da87e527UL,
+++		  0x2c43ecea0107c1ddUL, 0x526028809372de35UL,
+++	/* 244 */ 0x3415c56af9213b1fUL, 0x5bee1a4d017e98dbUL,
+++		  0x13f6b105b5cf709bUL, 0x5ff20e3482b29ab6UL,
+++	/* 245 */ 0x0aa29c75cc2e6c90UL, 0xfc7d73ca3a70e206UL,
+++		  0x899fc38fc4b5c515UL, 0x250386b124ffc207UL,
+++	/* 246 */ 0x54ea28d5ae3d2b56UL, 0x9913149dd6de60ceUL,
+++		  0x16694fc58f06d6c1UL, 0x46b23975eb018fc7UL,
+++	/* 247 */ 0x470a6a0fb4b7b4e2UL, 0x5d92475a8f7253deUL,
+++		  0xabeee5b52fbd3adbUL, 0x7fa20801a0806968UL,
+++	/* 248 */ 0x76f3faf19f7714d2UL, 0xb3e840c12f4660c3UL,
+++		  0x0fb4cd8df212744eUL, 0x4b065a251d3a2dd2UL,
+++	/* 249 */ 0x5cebde383d77cd4aUL, 0x6adf39df882c9cb1UL,
+++		  0xa2dd242eb09af759UL, 0x3147c0e50e5f6422UL,
+++	/* 250 */ 0x164ca5101d1350dbUL, 0xf8d13479c33fc962UL,
+++		  0xe640ce4d13e5da08UL, 0x4bdee0c45061f8baUL,
+++	/* 251 */ 0xd7c46dc1a4edb1c9UL, 0x5514d7b6437fd98aUL,
+++		  0x58942f6bb2a1c00bUL, 0x2dffb2ab1d70710eUL,
+++	/* 252 */ 0xccdfcf2fc18b6d68UL, 0xa8ebcba8b7806167UL,
+++		  0x980697f95e2937e3UL, 0x02fbba1cd0126e8cUL
+++};
+++
+++/* c is two 512-bit products: c0[0:7]=a0[0:3]*b0[0:3] and c1[8:15]=a1[4:7]*b1[4:7]
+++ * a is two 256-bit integers: a0[0:3] and a1[4:7]
+++ * b is two 256-bit integers: b0[0:3] and b1[4:7]
+++ */
+++static void mul2_256x256_integer_adx(u64 *const c, const u64 *const a,
+++				     const u64 *const b)
+++{
+++	asm volatile(
+++		"xorl %%r14d, %%r14d ;"
+++		"movq   (%1), %%rdx; "	/* A[0] */
+++		"mulx   (%2),  %%r8, %%r15; " /* A[0]*B[0] */
+++		"xorl %%r10d, %%r10d ;"
+++		"movq %%r8, (%0) ;"
+++		"mulx  8(%2), %%r10, %%rax; " /* A[0]*B[1] */
+++		"adox %%r10, %%r15 ;"
+++		"mulx 16(%2),  %%r8, %%rbx; " /* A[0]*B[2] */
+++		"adox  %%r8, %%rax ;"
+++		"mulx 24(%2), %%r10, %%rcx; " /* A[0]*B[3] */
+++		"adox %%r10, %%rbx ;"
+++		/******************************************/
+++		"adox %%r14, %%rcx ;"
+++
+++		"movq  8(%1), %%rdx; "	/* A[1] */
+++		"mulx   (%2),  %%r8,  %%r9; " /* A[1]*B[0] */
+++		"adox %%r15,  %%r8 ;"
+++		"movq  %%r8, 8(%0) ;"
+++		"mulx  8(%2), %%r10, %%r11; " /* A[1]*B[1] */
+++		"adox %%r10,  %%r9 ;"
+++		"adcx  %%r9, %%rax ;"
+++		"mulx 16(%2),  %%r8, %%r13; " /* A[1]*B[2] */
+++		"adox  %%r8, %%r11 ;"
+++		"adcx %%r11, %%rbx ;"
+++		"mulx 24(%2), %%r10, %%r15; " /* A[1]*B[3] */
+++		"adox %%r10, %%r13 ;"
+++		"adcx %%r13, %%rcx ;"
+++		/******************************************/
+++		"adox %%r14, %%r15 ;"
+++		"adcx %%r14, %%r15 ;"
+++
+++		"movq 16(%1), %%rdx; " /* A[2] */
+++		"xorl %%r10d, %%r10d ;"
+++		"mulx   (%2),  %%r8,  %%r9; " /* A[2]*B[0] */
+++		"adox %%rax,  %%r8 ;"
+++		"movq %%r8, 16(%0) ;"
+++		"mulx  8(%2), %%r10, %%r11; " /* A[2]*B[1] */
+++		"adox %%r10,  %%r9 ;"
+++		"adcx  %%r9, %%rbx ;"
+++		"mulx 16(%2),  %%r8, %%r13; " /* A[2]*B[2] */
+++		"adox  %%r8, %%r11 ;"
+++		"adcx %%r11, %%rcx ;"
+++		"mulx 24(%2), %%r10, %%rax; " /* A[2]*B[3] */
+++		"adox %%r10, %%r13 ;"
+++		"adcx %%r13, %%r15 ;"
+++		/******************************************/
+++		"adox %%r14, %%rax ;"
+++		"adcx %%r14, %%rax ;"
+++
+++		"movq 24(%1), %%rdx; " /* A[3] */
+++		"xorl %%r10d, %%r10d ;"
+++		"mulx   (%2),  %%r8,  %%r9; " /* A[3]*B[0] */
+++		"adox %%rbx,  %%r8 ;"
+++		"movq %%r8, 24(%0) ;"
+++		"mulx  8(%2), %%r10, %%r11; " /* A[3]*B[1] */
+++		"adox %%r10,  %%r9 ;"
+++		"adcx  %%r9, %%rcx ;"
+++		"movq %%rcx, 32(%0) ;"
+++		"mulx 16(%2),  %%r8, %%r13; " /* A[3]*B[2] */
+++		"adox  %%r8, %%r11 ;"
+++		"adcx %%r11, %%r15 ;"
+++		"movq %%r15, 40(%0) ;"
+++		"mulx 24(%2), %%r10, %%rbx; " /* A[3]*B[3] */
+++		"adox %%r10, %%r13 ;"
+++		"adcx %%r13, %%rax ;"
+++		"movq %%rax, 48(%0) ;"
+++		/******************************************/
+++		"adox %%r14, %%rbx ;"
+++		"adcx %%r14, %%rbx ;"
+++		"movq %%rbx, 56(%0) ;"
+++
+++		"movq 32(%1), %%rdx; "	/* C[0] */
+++		"mulx 32(%2),  %%r8, %%r15; " /* C[0]*D[0] */
+++		"xorl %%r10d, %%r10d ;"
+++		"movq %%r8, 64(%0);"
+++		"mulx 40(%2), %%r10, %%rax; " /* C[0]*D[1] */
+++		"adox %%r10, %%r15 ;"
+++		"mulx 48(%2),  %%r8, %%rbx; " /* C[0]*D[2] */
+++		"adox  %%r8, %%rax ;"
+++		"mulx 56(%2), %%r10, %%rcx; " /* C[0]*D[3] */
+++		"adox %%r10, %%rbx ;"
+++		/******************************************/
+++		"adox %%r14, %%rcx ;"
+++
+++		"movq 40(%1), %%rdx; " /* C[1] */
+++		"xorl %%r10d, %%r10d ;"
+++		"mulx 32(%2),  %%r8,  %%r9; " /* C[1]*D[0] */
+++		"adox %%r15,  %%r8 ;"
+++		"movq  %%r8, 72(%0);"
+++		"mulx 40(%2), %%r10, %%r11; " /* C[1]*D[1] */
+++		"adox %%r10,  %%r9 ;"
+++		"adcx  %%r9, %%rax ;"
+++		"mulx 48(%2),  %%r8, %%r13; " /* C[1]*D[2] */
+++		"adox  %%r8, %%r11 ;"
+++		"adcx %%r11, %%rbx ;"
+++		"mulx 56(%2), %%r10, %%r15; " /* C[1]*D[3] */
+++		"adox %%r10, %%r13 ;"
+++		"adcx %%r13, %%rcx ;"
+++		/******************************************/
+++		"adox %%r14, %%r15 ;"
+++		"adcx %%r14, %%r15 ;"
+++
+++		"movq 48(%1), %%rdx; " /* C[2] */
+++		"xorl %%r10d, %%r10d ;"
+++		"mulx 32(%2),  %%r8,  %%r9; " /* C[2]*D[0] */
+++		"adox %%rax,  %%r8 ;"
+++		"movq  %%r8, 80(%0);"
+++		"mulx 40(%2), %%r10, %%r11; " /* C[2]*D[1] */
+++		"adox %%r10,  %%r9 ;"
+++		"adcx  %%r9, %%rbx ;"
+++		"mulx 48(%2),  %%r8, %%r13; " /* C[2]*D[2] */
+++		"adox  %%r8, %%r11 ;"
+++		"adcx %%r11, %%rcx ;"
+++		"mulx 56(%2), %%r10, %%rax; " /* C[2]*D[3] */
+++		"adox %%r10, %%r13 ;"
+++		"adcx %%r13, %%r15 ;"
+++		/******************************************/
+++		"adox %%r14, %%rax ;"
+++		"adcx %%r14, %%rax ;"
+++
+++		"movq 56(%1), %%rdx; " /* C[3] */
+++		"xorl %%r10d, %%r10d ;"
+++		"mulx 32(%2),  %%r8,  %%r9; " /* C[3]*D[0] */
+++		"adox %%rbx,  %%r8 ;"
+++		"movq  %%r8, 88(%0);"
+++		"mulx 40(%2), %%r10, %%r11; " /* C[3]*D[1] */
+++		"adox %%r10,  %%r9 ;"
+++		"adcx  %%r9, %%rcx ;"
+++		"movq %%rcx,  96(%0) ;"
+++		"mulx 48(%2),  %%r8, %%r13; " /* C[3]*D[2] */
+++		"adox  %%r8, %%r11 ;"
+++		"adcx %%r11, %%r15 ;"
+++		"movq %%r15, 104(%0) ;"
+++		"mulx 56(%2), %%r10, %%rbx; " /* C[3]*D[3] */
+++		"adox %%r10, %%r13 ;"
+++		"adcx %%r13, %%rax ;"
+++		"movq %%rax, 112(%0) ;"
+++		/******************************************/
+++		"adox %%r14, %%rbx ;"
+++		"adcx %%r14, %%rbx ;"
+++		"movq %%rbx, 120(%0) ;"
+++		:
+++		: "r"(c), "r"(a), "r"(b)
+++		: "memory", "cc", "%rax", "%rbx", "%rcx", "%rdx", "%r8", "%r9",
+++		  "%r10", "%r11", "%r13", "%r14", "%r15");
+++}
+++
+++static void mul2_256x256_integer_bmi2(u64 *const c, const u64 *const a,
+++				      const u64 *const b)
+++{
+++	asm volatile(
+++		"movq   (%1), %%rdx; "	/* A[0] */
+++		"mulx   (%2),  %%r8, %%r15; " /* A[0]*B[0] */
+++		"movq %%r8,  (%0) ;"
+++		"mulx  8(%2), %%r10, %%rax; " /* A[0]*B[1] */
+++		"addq %%r10, %%r15 ;"
+++		"mulx 16(%2),  %%r8, %%rbx; " /* A[0]*B[2] */
+++		"adcq  %%r8, %%rax ;"
+++		"mulx 24(%2), %%r10, %%rcx; " /* A[0]*B[3] */
+++		"adcq %%r10, %%rbx ;"
+++		/******************************************/
+++		"adcq    $0, %%rcx ;"
+++
+++		"movq  8(%1), %%rdx; "	/* A[1] */
+++		"mulx   (%2),  %%r8,  %%r9; " /* A[1]*B[0] */
+++		"addq %%r15,  %%r8 ;"
+++		"movq %%r8, 8(%0) ;"
+++		"mulx  8(%2), %%r10, %%r11; " /* A[1]*B[1] */
+++		"adcq %%r10,  %%r9 ;"
+++		"mulx 16(%2),  %%r8, %%r13; " /* A[1]*B[2] */
+++		"adcq  %%r8, %%r11 ;"
+++		"mulx 24(%2), %%r10, %%r15; " /* A[1]*B[3] */
+++		"adcq %%r10, %%r13 ;"
+++		/******************************************/
+++		"adcq    $0, %%r15 ;"
+++
+++		"addq  %%r9, %%rax ;"
+++		"adcq %%r11, %%rbx ;"
+++		"adcq %%r13, %%rcx ;"
+++		"adcq    $0, %%r15 ;"
+++
+++		"movq 16(%1), %%rdx; "	/* A[2] */
+++		"mulx   (%2),  %%r8,  %%r9; " /* A[2]*B[0] */
+++		"addq %%rax,  %%r8 ;"
+++		"movq %%r8, 16(%0) ;"
+++		"mulx  8(%2), %%r10, %%r11; " /* A[2]*B[1] */
+++		"adcq %%r10,  %%r9 ;"
+++		"mulx 16(%2),  %%r8, %%r13; " /* A[2]*B[2] */
+++		"adcq  %%r8, %%r11 ;"
+++		"mulx 24(%2), %%r10, %%rax; " /* A[2]*B[3] */
+++		"adcq %%r10, %%r13 ;"
+++		/******************************************/
+++		"adcq    $0, %%rax ;"
+++
+++		"addq  %%r9, %%rbx ;"
+++		"adcq %%r11, %%rcx ;"
+++		"adcq %%r13, %%r15 ;"
+++		"adcq    $0, %%rax ;"
+++
+++		"movq 24(%1), %%rdx; "	/* A[3] */
+++		"mulx   (%2),  %%r8,  %%r9; " /* A[3]*B[0] */
+++		"addq %%rbx,  %%r8 ;"
+++		"movq %%r8, 24(%0) ;"
+++		"mulx  8(%2), %%r10, %%r11; " /* A[3]*B[1] */
+++		"adcq %%r10,  %%r9 ;"
+++		"mulx 16(%2),  %%r8, %%r13; " /* A[3]*B[2] */
+++		"adcq  %%r8, %%r11 ;"
+++		"mulx 24(%2), %%r10, %%rbx; " /* A[3]*B[3] */
+++		"adcq %%r10, %%r13 ;"
+++		/******************************************/
+++		"adcq    $0, %%rbx ;"
+++
+++		"addq  %%r9, %%rcx ;"
+++		"movq %%rcx, 32(%0) ;"
+++		"adcq %%r11, %%r15 ;"
+++		"movq %%r15, 40(%0) ;"
+++		"adcq %%r13, %%rax ;"
+++		"movq %%rax, 48(%0) ;"
+++		"adcq    $0, %%rbx ;"
+++		"movq %%rbx, 56(%0) ;"
+++
+++		"movq 32(%1), %%rdx; "	/* C[0] */
+++		"mulx 32(%2),  %%r8, %%r15; " /* C[0]*D[0] */
+++		"movq %%r8, 64(%0) ;"
+++		"mulx 40(%2), %%r10, %%rax; " /* C[0]*D[1] */
+++		"addq %%r10, %%r15 ;"
+++		"mulx 48(%2),  %%r8, %%rbx; " /* C[0]*D[2] */
+++		"adcq  %%r8, %%rax ;"
+++		"mulx 56(%2), %%r10, %%rcx; " /* C[0]*D[3] */
+++		"adcq %%r10, %%rbx ;"
+++		/******************************************/
+++		"adcq    $0, %%rcx ;"
+++
+++		"movq 40(%1), %%rdx; "	/* C[1] */
+++		"mulx 32(%2),  %%r8,  %%r9; " /* C[1]*D[0] */
+++		"addq %%r15,  %%r8 ;"
+++		"movq %%r8, 72(%0) ;"
+++		"mulx 40(%2), %%r10, %%r11; " /* C[1]*D[1] */
+++		"adcq %%r10,  %%r9 ;"
+++		"mulx 48(%2),  %%r8, %%r13; " /* C[1]*D[2] */
+++		"adcq  %%r8, %%r11 ;"
+++		"mulx 56(%2), %%r10, %%r15; " /* C[1]*D[3] */
+++		"adcq %%r10, %%r13 ;"
+++		/******************************************/
+++		"adcq    $0, %%r15 ;"
+++
+++		"addq  %%r9, %%rax ;"
+++		"adcq %%r11, %%rbx ;"
+++		"adcq %%r13, %%rcx ;"
+++		"adcq    $0, %%r15 ;"
+++
+++		"movq 48(%1), %%rdx; "	/* C[2] */
+++		"mulx 32(%2),  %%r8,  %%r9; " /* C[2]*D[0] */
+++		"addq %%rax,  %%r8 ;"
+++		"movq %%r8, 80(%0) ;"
+++		"mulx 40(%2), %%r10, %%r11; " /* C[2]*D[1] */
+++		"adcq %%r10,  %%r9 ;"
+++		"mulx 48(%2),  %%r8, %%r13; " /* C[2]*D[2] */
+++		"adcq  %%r8, %%r11 ;"
+++		"mulx 56(%2), %%r10, %%rax; " /* C[2]*D[3] */
+++		"adcq %%r10, %%r13 ;"
+++		/******************************************/
+++		"adcq    $0, %%rax ;"
+++
+++		"addq  %%r9, %%rbx ;"
+++		"adcq %%r11, %%rcx ;"
+++		"adcq %%r13, %%r15 ;"
+++		"adcq    $0, %%rax ;"
+++
+++		"movq 56(%1), %%rdx; "	/* C[3] */
+++		"mulx 32(%2),  %%r8,  %%r9; " /* C[3]*D[0] */
+++		"addq %%rbx,  %%r8 ;"
+++		"movq %%r8, 88(%0) ;"
+++		"mulx 40(%2), %%r10, %%r11; " /* C[3]*D[1] */
+++		"adcq %%r10,  %%r9 ;"
+++		"mulx 48(%2),  %%r8, %%r13; " /* C[3]*D[2] */
+++		"adcq  %%r8, %%r11 ;"
+++		"mulx 56(%2), %%r10, %%rbx; " /* C[3]*D[3] */
+++		"adcq %%r10, %%r13 ;"
+++		/******************************************/
+++		"adcq    $0, %%rbx ;"
+++
+++		"addq  %%r9, %%rcx ;"
+++		"movq %%rcx,  96(%0) ;"
+++		"adcq %%r11, %%r15 ;"
+++		"movq %%r15, 104(%0) ;"
+++		"adcq %%r13, %%rax ;"
+++		"movq %%rax, 112(%0) ;"
+++		"adcq    $0, %%rbx ;"
+++		"movq %%rbx, 120(%0) ;"
+++		:
+++		: "r"(c), "r"(a), "r"(b)
+++		: "memory", "cc", "%rax", "%rbx", "%rcx", "%rdx", "%r8", "%r9",
+++		  "%r10", "%r11", "%r13", "%r15");
+++}
+++
+++static void sqr2_256x256_integer_adx(u64 *const c, const u64 *const a)
+++{
+++	asm volatile(
+++		"movq   (%1), %%rdx        ;" /* A[0]      */
+++		"mulx  8(%1),  %%r8, %%r14 ;" /* A[1]*A[0] */
+++		"xorl %%r15d, %%r15d;"
+++		"mulx 16(%1),  %%r9, %%r10 ;" /* A[2]*A[0] */
+++		"adcx %%r14,  %%r9 ;"
+++		"mulx 24(%1), %%rax, %%rcx ;" /* A[3]*A[0] */
+++		"adcx %%rax, %%r10 ;"
+++		"movq 24(%1), %%rdx        ;" /* A[3]      */
+++		"mulx  8(%1), %%r11, %%rbx ;" /* A[1]*A[3] */
+++		"adcx %%rcx, %%r11 ;"
+++		"mulx 16(%1), %%rax, %%r13 ;" /* A[2]*A[3] */
+++		"adcx %%rax, %%rbx ;"
+++		"movq  8(%1), %%rdx        ;" /* A[1]      */
+++		"adcx %%r15, %%r13 ;"
+++		"mulx 16(%1), %%rax, %%rcx ;" /* A[2]*A[1] */
+++		"movq    $0, %%r14 ;"
+++		/******************************************/
+++		"adcx %%r15, %%r14 ;"
+++
+++		"xorl %%r15d, %%r15d;"
+++		"adox %%rax, %%r10 ;"
+++		"adcx  %%r8,  %%r8 ;"
+++		"adox %%rcx, %%r11 ;"
+++		"adcx  %%r9,  %%r9 ;"
+++		"adox %%r15, %%rbx ;"
+++		"adcx %%r10, %%r10 ;"
+++		"adox %%r15, %%r13 ;"
+++		"adcx %%r11, %%r11 ;"
+++		"adox %%r15, %%r14 ;"
+++		"adcx %%rbx, %%rbx ;"
+++		"adcx %%r13, %%r13 ;"
+++		"adcx %%r14, %%r14 ;"
+++
+++		"movq   (%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ;" /* A[0]^2 */
+++		/*******************/
+++		"movq %%rax,  0(%0) ;"
+++		"addq %%rcx,  %%r8 ;"
+++		"movq  %%r8,  8(%0) ;"
+++		"movq  8(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ;" /* A[1]^2 */
+++		"adcq %%rax,  %%r9 ;"
+++		"movq  %%r9, 16(%0) ;"
+++		"adcq %%rcx, %%r10 ;"
+++		"movq %%r10, 24(%0) ;"
+++		"movq 16(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ;" /* A[2]^2 */
+++		"adcq %%rax, %%r11 ;"
+++		"movq %%r11, 32(%0) ;"
+++		"adcq %%rcx, %%rbx ;"
+++		"movq %%rbx, 40(%0) ;"
+++		"movq 24(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ;" /* A[3]^2 */
+++		"adcq %%rax, %%r13 ;"
+++		"movq %%r13, 48(%0) ;"
+++		"adcq %%rcx, %%r14 ;"
+++		"movq %%r14, 56(%0) ;"
+++
+++
+++		"movq 32(%1), %%rdx        ;" /* B[0]      */
+++		"mulx 40(%1),  %%r8, %%r14 ;" /* B[1]*B[0] */
+++		"xorl %%r15d, %%r15d;"
+++		"mulx 48(%1),  %%r9, %%r10 ;" /* B[2]*B[0] */
+++		"adcx %%r14,  %%r9 ;"
+++		"mulx 56(%1), %%rax, %%rcx ;" /* B[3]*B[0] */
+++		"adcx %%rax, %%r10 ;"
+++		"movq 56(%1), %%rdx        ;" /* B[3]      */
+++		"mulx 40(%1), %%r11, %%rbx ;" /* B[1]*B[3] */
+++		"adcx %%rcx, %%r11 ;"
+++		"mulx 48(%1), %%rax, %%r13 ;" /* B[2]*B[3] */
+++		"adcx %%rax, %%rbx ;"
+++		"movq 40(%1), %%rdx        ;" /* B[1]      */
+++		"adcx %%r15, %%r13 ;"
+++		"mulx 48(%1), %%rax, %%rcx ;" /* B[2]*B[1] */
+++		"movq    $0, %%r14 ;"
+++		/******************************************/
+++		"adcx %%r15, %%r14 ;"
+++
+++		"xorl %%r15d, %%r15d;"
+++		"adox %%rax, %%r10 ;"
+++		"adcx  %%r8,  %%r8 ;"
+++		"adox %%rcx, %%r11 ;"
+++		"adcx  %%r9,  %%r9 ;"
+++		"adox %%r15, %%rbx ;"
+++		"adcx %%r10, %%r10 ;"
+++		"adox %%r15, %%r13 ;"
+++		"adcx %%r11, %%r11 ;"
+++		"adox %%r15, %%r14 ;"
+++		"adcx %%rbx, %%rbx ;"
+++		"adcx %%r13, %%r13 ;"
+++		"adcx %%r14, %%r14 ;"
+++
+++		"movq 32(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ;" /* B[0]^2 */
+++		/*******************/
+++		"movq %%rax,  64(%0) ;"
+++		"addq %%rcx,  %%r8 ;"
+++		"movq  %%r8,  72(%0) ;"
+++		"movq 40(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ;" /* B[1]^2 */
+++		"adcq %%rax,  %%r9 ;"
+++		"movq  %%r9,  80(%0) ;"
+++		"adcq %%rcx, %%r10 ;"
+++		"movq %%r10,  88(%0) ;"
+++		"movq 48(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ;" /* B[2]^2 */
+++		"adcq %%rax, %%r11 ;"
+++		"movq %%r11,  96(%0) ;"
+++		"adcq %%rcx, %%rbx ;"
+++		"movq %%rbx, 104(%0) ;"
+++		"movq 56(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ;" /* B[3]^2 */
+++		"adcq %%rax, %%r13 ;"
+++		"movq %%r13, 112(%0) ;"
+++		"adcq %%rcx, %%r14 ;"
+++		"movq %%r14, 120(%0) ;"
+++		:
+++		: "r"(c), "r"(a)
+++		: "memory", "cc", "%rax", "%rbx", "%rcx", "%rdx", "%r8", "%r9",
+++		  "%r10", "%r11", "%r13", "%r14", "%r15");
+++}
+++
+++static void sqr2_256x256_integer_bmi2(u64 *const c, const u64 *const a)
+++{
+++	asm volatile(
+++		"movq  8(%1), %%rdx        ;" /* A[1]      */
+++		"mulx   (%1),  %%r8,  %%r9 ;" /* A[0]*A[1] */
+++		"mulx 16(%1), %%r10, %%r11 ;" /* A[2]*A[1] */
+++		"mulx 24(%1), %%rcx, %%r14 ;" /* A[3]*A[1] */
+++
+++		"movq 16(%1), %%rdx        ;" /* A[2]      */
+++		"mulx 24(%1), %%r15, %%r13 ;" /* A[3]*A[2] */
+++		"mulx   (%1), %%rax, %%rdx ;" /* A[0]*A[2] */
+++
+++		"addq %%rax,  %%r9 ;"
+++		"adcq %%rdx, %%r10 ;"
+++		"adcq %%rcx, %%r11 ;"
+++		"adcq %%r14, %%r15 ;"
+++		"adcq    $0, %%r13 ;"
+++		"movq    $0, %%r14 ;"
+++		"adcq    $0, %%r14 ;"
+++
+++		"movq   (%1), %%rdx        ;" /* A[0]      */
+++		"mulx 24(%1), %%rax, %%rcx ;" /* A[0]*A[3] */
+++
+++		"addq %%rax, %%r10 ;"
+++		"adcq %%rcx, %%r11 ;"
+++		"adcq    $0, %%r15 ;"
+++		"adcq    $0, %%r13 ;"
+++		"adcq    $0, %%r14 ;"
+++
+++		"shldq $1, %%r13, %%r14 ;"
+++		"shldq $1, %%r15, %%r13 ;"
+++		"shldq $1, %%r11, %%r15 ;"
+++		"shldq $1, %%r10, %%r11 ;"
+++		"shldq $1,  %%r9, %%r10 ;"
+++		"shldq $1,  %%r8,  %%r9 ;"
+++		"shlq  $1,  %%r8        ;"
+++
+++		/*******************/
+++		"mulx %%rdx, %%rax, %%rcx ; " /* A[0]^2 */
+++		/*******************/
+++		"movq %%rax,  0(%0) ;"
+++		"addq %%rcx,  %%r8 ;"
+++		"movq  %%r8,  8(%0) ;"
+++		"movq  8(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ; " /* A[1]^2 */
+++		"adcq %%rax,  %%r9 ;"
+++		"movq  %%r9, 16(%0) ;"
+++		"adcq %%rcx, %%r10 ;"
+++		"movq %%r10, 24(%0) ;"
+++		"movq 16(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ; " /* A[2]^2 */
+++		"adcq %%rax, %%r11 ;"
+++		"movq %%r11, 32(%0) ;"
+++		"adcq %%rcx, %%r15 ;"
+++		"movq %%r15, 40(%0) ;"
+++		"movq 24(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ; " /* A[3]^2 */
+++		"adcq %%rax, %%r13 ;"
+++		"movq %%r13, 48(%0) ;"
+++		"adcq %%rcx, %%r14 ;"
+++		"movq %%r14, 56(%0) ;"
+++
+++		"movq 40(%1), %%rdx        ;" /* B[1]      */
+++		"mulx 32(%1),  %%r8,  %%r9 ;" /* B[0]*B[1] */
+++		"mulx 48(%1), %%r10, %%r11 ;" /* B[2]*B[1] */
+++		"mulx 56(%1), %%rcx, %%r14 ;" /* B[3]*B[1] */
+++
+++		"movq 48(%1), %%rdx        ;" /* B[2]      */
+++		"mulx 56(%1), %%r15, %%r13 ;" /* B[3]*B[2] */
+++		"mulx 32(%1), %%rax, %%rdx ;" /* B[0]*B[2] */
+++
+++		"addq %%rax,  %%r9 ;"
+++		"adcq %%rdx, %%r10 ;"
+++		"adcq %%rcx, %%r11 ;"
+++		"adcq %%r14, %%r15 ;"
+++		"adcq    $0, %%r13 ;"
+++		"movq    $0, %%r14 ;"
+++		"adcq    $0, %%r14 ;"
+++
+++		"movq 32(%1), %%rdx        ;" /* B[0]      */
+++		"mulx 56(%1), %%rax, %%rcx ;" /* B[0]*B[3] */
+++
+++		"addq %%rax, %%r10 ;"
+++		"adcq %%rcx, %%r11 ;"
+++		"adcq    $0, %%r15 ;"
+++		"adcq    $0, %%r13 ;"
+++		"adcq    $0, %%r14 ;"
+++
+++		"shldq $1, %%r13, %%r14 ;"
+++		"shldq $1, %%r15, %%r13 ;"
+++		"shldq $1, %%r11, %%r15 ;"
+++		"shldq $1, %%r10, %%r11 ;"
+++		"shldq $1,  %%r9, %%r10 ;"
+++		"shldq $1,  %%r8,  %%r9 ;"
+++		"shlq  $1,  %%r8        ;"
+++
+++		/*******************/
+++		"mulx %%rdx, %%rax, %%rcx ; " /* B[0]^2 */
+++		/*******************/
+++		"movq %%rax,  64(%0) ;"
+++		"addq %%rcx,  %%r8 ;"
+++		"movq  %%r8,  72(%0) ;"
+++		"movq 40(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ; " /* B[1]^2 */
+++		"adcq %%rax,  %%r9 ;"
+++		"movq  %%r9,  80(%0) ;"
+++		"adcq %%rcx, %%r10 ;"
+++		"movq %%r10,  88(%0) ;"
+++		"movq 48(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ; " /* B[2]^2 */
+++		"adcq %%rax, %%r11 ;"
+++		"movq %%r11,  96(%0) ;"
+++		"adcq %%rcx, %%r15 ;"
+++		"movq %%r15, 104(%0) ;"
+++		"movq 56(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ; " /* B[3]^2 */
+++		"adcq %%rax, %%r13 ;"
+++		"movq %%r13, 112(%0) ;"
+++		"adcq %%rcx, %%r14 ;"
+++		"movq %%r14, 120(%0) ;"
+++		:
+++		: "r"(c), "r"(a)
+++		: "memory", "cc", "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10",
+++		  "%r11", "%r13", "%r14", "%r15");
+++}
+++
+++static void red_eltfp25519_2w_adx(u64 *const c, const u64 *const a)
+++{
+++	asm volatile(
+++		"movl    $38, %%edx; "	/* 2*c = 38 = 2^256 */
+++		"mulx 32(%1),  %%r8, %%r10; " /* c*C[4] */
+++		"xorl %%ebx, %%ebx ;"
+++		"adox   (%1),  %%r8 ;"
+++		"mulx 40(%1),  %%r9, %%r11; " /* c*C[5] */
+++		"adcx %%r10,  %%r9 ;"
+++		"adox  8(%1),  %%r9 ;"
+++		"mulx 48(%1), %%r10, %%rax; " /* c*C[6] */
+++		"adcx %%r11, %%r10 ;"
+++		"adox 16(%1), %%r10 ;"
+++		"mulx 56(%1), %%r11, %%rcx; " /* c*C[7] */
+++		"adcx %%rax, %%r11 ;"
+++		"adox 24(%1), %%r11 ;"
+++		/***************************************/
+++		"adcx %%rbx, %%rcx ;"
+++		"adox  %%rbx, %%rcx ;"
+++		"imul %%rdx, %%rcx ;" /* c*C[4], cf=0, of=0 */
+++		"adcx %%rcx,  %%r8 ;"
+++		"adcx %%rbx,  %%r9 ;"
+++		"movq  %%r9,  8(%0) ;"
+++		"adcx %%rbx, %%r10 ;"
+++		"movq %%r10, 16(%0) ;"
+++		"adcx %%rbx, %%r11 ;"
+++		"movq %%r11, 24(%0) ;"
+++		"mov     $0, %%ecx ;"
+++		"cmovc %%edx, %%ecx ;"
+++		"addq %%rcx,  %%r8 ;"
+++		"movq  %%r8,   (%0) ;"
+++
+++		"mulx  96(%1),  %%r8, %%r10; " /* c*C[4] */
+++		"xorl %%ebx, %%ebx ;"
+++		"adox 64(%1),  %%r8 ;"
+++		"mulx 104(%1),  %%r9, %%r11; " /* c*C[5] */
+++		"adcx %%r10,  %%r9 ;"
+++		"adox 72(%1),  %%r9 ;"
+++		"mulx 112(%1), %%r10, %%rax; " /* c*C[6] */
+++		"adcx %%r11, %%r10 ;"
+++		"adox 80(%1), %%r10 ;"
+++		"mulx 120(%1), %%r11, %%rcx; " /* c*C[7] */
+++		"adcx %%rax, %%r11 ;"
+++		"adox 88(%1), %%r11 ;"
+++		/****************************************/
+++		"adcx %%rbx, %%rcx ;"
+++		"adox  %%rbx, %%rcx ;"
+++		"imul %%rdx, %%rcx ;" /* c*C[4], cf=0, of=0 */
+++		"adcx %%rcx,  %%r8 ;"
+++		"adcx %%rbx,  %%r9 ;"
+++		"movq  %%r9, 40(%0) ;"
+++		"adcx %%rbx, %%r10 ;"
+++		"movq %%r10, 48(%0) ;"
+++		"adcx %%rbx, %%r11 ;"
+++		"movq %%r11, 56(%0) ;"
+++		"mov     $0, %%ecx ;"
+++		"cmovc %%edx, %%ecx ;"
+++		"addq %%rcx,  %%r8 ;"
+++		"movq  %%r8, 32(%0) ;"
+++		:
+++		: "r"(c), "r"(a)
+++		: "memory", "cc", "%rax", "%rbx", "%rcx", "%rdx", "%r8", "%r9",
+++		  "%r10", "%r11");
+++}
+++
+++static void red_eltfp25519_2w_bmi2(u64 *const c, const u64 *const a)
+++{
+++	asm volatile(
+++		"movl    $38, %%edx ; "       /* 2*c = 38 = 2^256 */
+++		"mulx 32(%1),  %%r8, %%r10 ;" /* c*C[4] */
+++		"mulx 40(%1),  %%r9, %%r11 ;" /* c*C[5] */
+++		"addq %%r10,  %%r9 ;"
+++		"mulx 48(%1), %%r10, %%rax ;" /* c*C[6] */
+++		"adcq %%r11, %%r10 ;"
+++		"mulx 56(%1), %%r11, %%rcx ;" /* c*C[7] */
+++		"adcq %%rax, %%r11 ;"
+++		/***************************************/
+++		"adcq    $0, %%rcx ;"
+++		"addq   (%1),  %%r8 ;"
+++		"adcq  8(%1),  %%r9 ;"
+++		"adcq 16(%1), %%r10 ;"
+++		"adcq 24(%1), %%r11 ;"
+++		"adcq     $0, %%rcx ;"
+++		"imul %%rdx, %%rcx ;" /* c*C[4], cf=0 */
+++		"addq %%rcx,  %%r8 ;"
+++		"adcq    $0,  %%r9 ;"
+++		"movq  %%r9,  8(%0) ;"
+++		"adcq    $0, %%r10 ;"
+++		"movq %%r10, 16(%0) ;"
+++		"adcq    $0, %%r11 ;"
+++		"movq %%r11, 24(%0) ;"
+++		"mov     $0, %%ecx ;"
+++		"cmovc %%edx, %%ecx ;"
+++		"addq %%rcx,  %%r8 ;"
+++		"movq  %%r8,   (%0) ;"
+++
+++		"mulx  96(%1),  %%r8, %%r10 ;" /* c*C[4] */
+++		"mulx 104(%1),  %%r9, %%r11 ;" /* c*C[5] */
+++		"addq %%r10,  %%r9 ;"
+++		"mulx 112(%1), %%r10, %%rax ;" /* c*C[6] */
+++		"adcq %%r11, %%r10 ;"
+++		"mulx 120(%1), %%r11, %%rcx ;" /* c*C[7] */
+++		"adcq %%rax, %%r11 ;"
+++		/****************************************/
+++		"adcq    $0, %%rcx ;"
+++		"addq 64(%1),  %%r8 ;"
+++		"adcq 72(%1),  %%r9 ;"
+++		"adcq 80(%1), %%r10 ;"
+++		"adcq 88(%1), %%r11 ;"
+++		"adcq     $0, %%rcx ;"
+++		"imul %%rdx, %%rcx ;" /* c*C[4], cf=0 */
+++		"addq %%rcx,  %%r8 ;"
+++		"adcq    $0,  %%r9 ;"
+++		"movq  %%r9, 40(%0) ;"
+++		"adcq    $0, %%r10 ;"
+++		"movq %%r10, 48(%0) ;"
+++		"adcq    $0, %%r11 ;"
+++		"movq %%r11, 56(%0) ;"
+++		"mov     $0, %%ecx ;"
+++		"cmovc %%edx, %%ecx ;"
+++		"addq %%rcx,  %%r8 ;"
+++		"movq  %%r8, 32(%0) ;"
+++		:
+++		: "r"(c), "r"(a)
+++		: "memory", "cc", "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10",
+++		  "%r11");
+++}
+++
+++static void mul_256x256_integer_adx(u64 *const c, const u64 *const a,
+++				    const u64 *const b)
+++{
+++	asm volatile(
+++		"movq   (%1), %%rdx; "	/* A[0] */
+++		"mulx   (%2),  %%r8,  %%r9; " /* A[0]*B[0] */
+++		"xorl %%r10d, %%r10d ;"
+++		"movq  %%r8,  (%0) ;"
+++		"mulx  8(%2), %%r10, %%r11; " /* A[0]*B[1] */
+++		"adox  %%r9, %%r10 ;"
+++		"movq %%r10, 8(%0) ;"
+++		"mulx 16(%2), %%r15, %%r13; " /* A[0]*B[2] */
+++		"adox %%r11, %%r15 ;"
+++		"mulx 24(%2), %%r14, %%rdx; " /* A[0]*B[3] */
+++		"adox %%r13, %%r14 ;"
+++		"movq $0, %%rax ;"
+++		/******************************************/
+++		"adox %%rdx, %%rax ;"
+++
+++		"movq  8(%1), %%rdx; "	/* A[1] */
+++		"mulx   (%2),  %%r8,  %%r9; " /* A[1]*B[0] */
+++		"xorl %%r10d, %%r10d ;"
+++		"adcx 8(%0),  %%r8 ;"
+++		"movq  %%r8,  8(%0) ;"
+++		"mulx  8(%2), %%r10, %%r11; " /* A[1]*B[1] */
+++		"adox  %%r9, %%r10 ;"
+++		"adcx %%r15, %%r10 ;"
+++		"movq %%r10, 16(%0) ;"
+++		"mulx 16(%2), %%r15, %%r13; " /* A[1]*B[2] */
+++		"adox %%r11, %%r15 ;"
+++		"adcx %%r14, %%r15 ;"
+++		"movq $0, %%r8  ;"
+++		"mulx 24(%2), %%r14, %%rdx; " /* A[1]*B[3] */
+++		"adox %%r13, %%r14 ;"
+++		"adcx %%rax, %%r14 ;"
+++		"movq $0, %%rax ;"
+++		/******************************************/
+++		"adox %%rdx, %%rax ;"
+++		"adcx  %%r8, %%rax ;"
+++
+++		"movq 16(%1), %%rdx; "	/* A[2] */
+++		"mulx   (%2),  %%r8,  %%r9; " /* A[2]*B[0] */
+++		"xorl %%r10d, %%r10d ;"
+++		"adcx 16(%0), %%r8 ;"
+++		"movq  %%r8, 16(%0) ;"
+++		"mulx  8(%2), %%r10, %%r11; " /* A[2]*B[1] */
+++		"adox  %%r9, %%r10 ;"
+++		"adcx %%r15, %%r10 ;"
+++		"movq %%r10, 24(%0) ;"
+++		"mulx 16(%2), %%r15, %%r13; " /* A[2]*B[2] */
+++		"adox %%r11, %%r15 ;"
+++		"adcx %%r14, %%r15 ;"
+++		"movq $0, %%r8  ;"
+++		"mulx 24(%2), %%r14, %%rdx; " /* A[2]*B[3] */
+++		"adox %%r13, %%r14 ;"
+++		"adcx %%rax, %%r14 ;"
+++		"movq $0, %%rax ;"
+++		/******************************************/
+++		"adox %%rdx, %%rax ;"
+++		"adcx  %%r8, %%rax ;"
+++
+++		"movq 24(%1), %%rdx; "	/* A[3] */
+++		"mulx   (%2),  %%r8,  %%r9; " /* A[3]*B[0] */
+++		"xorl %%r10d, %%r10d ;"
+++		"adcx 24(%0), %%r8 ;"
+++		"movq  %%r8, 24(%0) ;"
+++		"mulx  8(%2), %%r10, %%r11; " /* A[3]*B[1] */
+++		"adox  %%r9, %%r10 ;"
+++		"adcx %%r15, %%r10 ;"
+++		"movq %%r10, 32(%0) ;"
+++		"mulx 16(%2), %%r15, %%r13; " /* A[3]*B[2] */
+++		"adox %%r11, %%r15 ;"
+++		"adcx %%r14, %%r15 ;"
+++		"movq %%r15, 40(%0) ;"
+++		"movq $0, %%r8  ;"
+++		"mulx 24(%2), %%r14, %%rdx; " /* A[3]*B[3] */
+++		"adox %%r13, %%r14 ;"
+++		"adcx %%rax, %%r14 ;"
+++		"movq %%r14, 48(%0) ;"
+++		"movq $0, %%rax ;"
+++		/******************************************/
+++		"adox %%rdx, %%rax ;"
+++		"adcx  %%r8, %%rax ;"
+++		"movq %%rax, 56(%0) ;"
+++		:
+++		: "r"(c), "r"(a), "r"(b)
+++		: "memory", "cc", "%rax", "%rdx", "%r8", "%r9", "%r10", "%r11",
+++		  "%r13", "%r14", "%r15");
+++}
+++
+++static void mul_256x256_integer_bmi2(u64 *const c, const u64 *const a,
+++				     const u64 *const b)
+++{
+++	asm volatile(
+++		"movq   (%1), %%rdx; "	/* A[0] */
+++		"mulx   (%2),  %%r8, %%r15; " /* A[0]*B[0] */
+++		"movq %%r8,  (%0) ;"
+++		"mulx  8(%2), %%r10, %%rax; " /* A[0]*B[1] */
+++		"addq %%r10, %%r15 ;"
+++		"mulx 16(%2),  %%r8, %%rbx; " /* A[0]*B[2] */
+++		"adcq  %%r8, %%rax ;"
+++		"mulx 24(%2), %%r10, %%rcx; " /* A[0]*B[3] */
+++		"adcq %%r10, %%rbx ;"
+++		/******************************************/
+++		"adcq    $0, %%rcx ;"
+++
+++		"movq  8(%1), %%rdx; "	/* A[1] */
+++		"mulx   (%2),  %%r8,  %%r9; " /* A[1]*B[0] */
+++		"addq %%r15,  %%r8 ;"
+++		"movq %%r8, 8(%0) ;"
+++		"mulx  8(%2), %%r10, %%r11; " /* A[1]*B[1] */
+++		"adcq %%r10,  %%r9 ;"
+++		"mulx 16(%2),  %%r8, %%r13; " /* A[1]*B[2] */
+++		"adcq  %%r8, %%r11 ;"
+++		"mulx 24(%2), %%r10, %%r15; " /* A[1]*B[3] */
+++		"adcq %%r10, %%r13 ;"
+++		/******************************************/
+++		"adcq    $0, %%r15 ;"
+++
+++		"addq  %%r9, %%rax ;"
+++		"adcq %%r11, %%rbx ;"
+++		"adcq %%r13, %%rcx ;"
+++		"adcq    $0, %%r15 ;"
+++
+++		"movq 16(%1), %%rdx; "	/* A[2] */
+++		"mulx   (%2),  %%r8,  %%r9; " /* A[2]*B[0] */
+++		"addq %%rax,  %%r8 ;"
+++		"movq %%r8, 16(%0) ;"
+++		"mulx  8(%2), %%r10, %%r11; " /* A[2]*B[1] */
+++		"adcq %%r10,  %%r9 ;"
+++		"mulx 16(%2),  %%r8, %%r13; " /* A[2]*B[2] */
+++		"adcq  %%r8, %%r11 ;"
+++		"mulx 24(%2), %%r10, %%rax; " /* A[2]*B[3] */
+++		"adcq %%r10, %%r13 ;"
+++		/******************************************/
+++		"adcq    $0, %%rax ;"
+++
+++		"addq  %%r9, %%rbx ;"
+++		"adcq %%r11, %%rcx ;"
+++		"adcq %%r13, %%r15 ;"
+++		"adcq    $0, %%rax ;"
+++
+++		"movq 24(%1), %%rdx; "	/* A[3] */
+++		"mulx   (%2),  %%r8,  %%r9; " /* A[3]*B[0] */
+++		"addq %%rbx,  %%r8 ;"
+++		"movq %%r8, 24(%0) ;"
+++		"mulx  8(%2), %%r10, %%r11; " /* A[3]*B[1] */
+++		"adcq %%r10,  %%r9 ;"
+++		"mulx 16(%2),  %%r8, %%r13; " /* A[3]*B[2] */
+++		"adcq  %%r8, %%r11 ;"
+++		"mulx 24(%2), %%r10, %%rbx; " /* A[3]*B[3] */
+++		"adcq %%r10, %%r13 ;"
+++		/******************************************/
+++		"adcq    $0, %%rbx ;"
+++
+++		"addq  %%r9, %%rcx ;"
+++		"movq %%rcx, 32(%0) ;"
+++		"adcq %%r11, %%r15 ;"
+++		"movq %%r15, 40(%0) ;"
+++		"adcq %%r13, %%rax ;"
+++		"movq %%rax, 48(%0) ;"
+++		"adcq    $0, %%rbx ;"
+++		"movq %%rbx, 56(%0) ;"
+++		:
+++		: "r"(c), "r"(a), "r"(b)
+++		: "memory", "cc", "%rax", "%rbx", "%rcx", "%rdx", "%r8", "%r9",
+++		  "%r10", "%r11", "%r13", "%r15");
+++}
+++
+++static void sqr_256x256_integer_adx(u64 *const c, const u64 *const a)
+++{
+++	asm volatile(
+++		"movq   (%1), %%rdx        ;" /* A[0]      */
+++		"mulx  8(%1),  %%r8, %%r14 ;" /* A[1]*A[0] */
+++		"xorl %%r15d, %%r15d;"
+++		"mulx 16(%1),  %%r9, %%r10 ;" /* A[2]*A[0] */
+++		"adcx %%r14,  %%r9 ;"
+++		"mulx 24(%1), %%rax, %%rcx ;" /* A[3]*A[0] */
+++		"adcx %%rax, %%r10 ;"
+++		"movq 24(%1), %%rdx        ;" /* A[3]      */
+++		"mulx  8(%1), %%r11, %%rbx ;" /* A[1]*A[3] */
+++		"adcx %%rcx, %%r11 ;"
+++		"mulx 16(%1), %%rax, %%r13 ;" /* A[2]*A[3] */
+++		"adcx %%rax, %%rbx ;"
+++		"movq  8(%1), %%rdx        ;" /* A[1]      */
+++		"adcx %%r15, %%r13 ;"
+++		"mulx 16(%1), %%rax, %%rcx ;" /* A[2]*A[1] */
+++		"movq    $0, %%r14 ;"
+++		/******************************************/
+++		"adcx %%r15, %%r14 ;"
+++
+++		"xorl %%r15d, %%r15d;"
+++		"adox %%rax, %%r10 ;"
+++		"adcx  %%r8,  %%r8 ;"
+++		"adox %%rcx, %%r11 ;"
+++		"adcx  %%r9,  %%r9 ;"
+++		"adox %%r15, %%rbx ;"
+++		"adcx %%r10, %%r10 ;"
+++		"adox %%r15, %%r13 ;"
+++		"adcx %%r11, %%r11 ;"
+++		"adox %%r15, %%r14 ;"
+++		"adcx %%rbx, %%rbx ;"
+++		"adcx %%r13, %%r13 ;"
+++		"adcx %%r14, %%r14 ;"
+++
+++		"movq   (%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ;" /* A[0]^2 */
+++		/*******************/
+++		"movq %%rax,  0(%0) ;"
+++		"addq %%rcx,  %%r8 ;"
+++		"movq  %%r8,  8(%0) ;"
+++		"movq  8(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ;" /* A[1]^2 */
+++		"adcq %%rax,  %%r9 ;"
+++		"movq  %%r9, 16(%0) ;"
+++		"adcq %%rcx, %%r10 ;"
+++		"movq %%r10, 24(%0) ;"
+++		"movq 16(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ;" /* A[2]^2 */
+++		"adcq %%rax, %%r11 ;"
+++		"movq %%r11, 32(%0) ;"
+++		"adcq %%rcx, %%rbx ;"
+++		"movq %%rbx, 40(%0) ;"
+++		"movq 24(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ;" /* A[3]^2 */
+++		"adcq %%rax, %%r13 ;"
+++		"movq %%r13, 48(%0) ;"
+++		"adcq %%rcx, %%r14 ;"
+++		"movq %%r14, 56(%0) ;"
+++		:
+++		: "r"(c), "r"(a)
+++		: "memory", "cc", "%rax", "%rbx", "%rcx", "%rdx", "%r8", "%r9",
+++		  "%r10", "%r11", "%r13", "%r14", "%r15");
+++}
+++
+++static void sqr_256x256_integer_bmi2(u64 *const c, const u64 *const a)
+++{
+++	asm volatile(
+++		"movq  8(%1), %%rdx        ;" /* A[1]      */
+++		"mulx   (%1),  %%r8,  %%r9 ;" /* A[0]*A[1] */
+++		"mulx 16(%1), %%r10, %%r11 ;" /* A[2]*A[1] */
+++		"mulx 24(%1), %%rcx, %%r14 ;" /* A[3]*A[1] */
+++
+++		"movq 16(%1), %%rdx        ;" /* A[2]      */
+++		"mulx 24(%1), %%r15, %%r13 ;" /* A[3]*A[2] */
+++		"mulx   (%1), %%rax, %%rdx ;" /* A[0]*A[2] */
+++
+++		"addq %%rax,  %%r9 ;"
+++		"adcq %%rdx, %%r10 ;"
+++		"adcq %%rcx, %%r11 ;"
+++		"adcq %%r14, %%r15 ;"
+++		"adcq    $0, %%r13 ;"
+++		"movq    $0, %%r14 ;"
+++		"adcq    $0, %%r14 ;"
+++
+++		"movq   (%1), %%rdx        ;" /* A[0]      */
+++		"mulx 24(%1), %%rax, %%rcx ;" /* A[0]*A[3] */
+++
+++		"addq %%rax, %%r10 ;"
+++		"adcq %%rcx, %%r11 ;"
+++		"adcq    $0, %%r15 ;"
+++		"adcq    $0, %%r13 ;"
+++		"adcq    $0, %%r14 ;"
+++
+++		"shldq $1, %%r13, %%r14 ;"
+++		"shldq $1, %%r15, %%r13 ;"
+++		"shldq $1, %%r11, %%r15 ;"
+++		"shldq $1, %%r10, %%r11 ;"
+++		"shldq $1,  %%r9, %%r10 ;"
+++		"shldq $1,  %%r8,  %%r9 ;"
+++		"shlq  $1,  %%r8        ;"
+++
+++		/*******************/
+++		"mulx %%rdx, %%rax, %%rcx ;" /* A[0]^2 */
+++		/*******************/
+++		"movq %%rax,  0(%0) ;"
+++		"addq %%rcx,  %%r8 ;"
+++		"movq  %%r8,  8(%0) ;"
+++		"movq  8(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ;" /* A[1]^2 */
+++		"adcq %%rax,  %%r9 ;"
+++		"movq  %%r9, 16(%0) ;"
+++		"adcq %%rcx, %%r10 ;"
+++		"movq %%r10, 24(%0) ;"
+++		"movq 16(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ;" /* A[2]^2 */
+++		"adcq %%rax, %%r11 ;"
+++		"movq %%r11, 32(%0) ;"
+++		"adcq %%rcx, %%r15 ;"
+++		"movq %%r15, 40(%0) ;"
+++		"movq 24(%1), %%rdx ;"
+++		"mulx %%rdx, %%rax, %%rcx ;" /* A[3]^2 */
+++		"adcq %%rax, %%r13 ;"
+++		"movq %%r13, 48(%0) ;"
+++		"adcq %%rcx, %%r14 ;"
+++		"movq %%r14, 56(%0) ;"
+++		:
+++		: "r"(c), "r"(a)
+++		: "memory", "cc", "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10",
+++		  "%r11", "%r13", "%r14", "%r15");
+++}
+++
+++static void red_eltfp25519_1w_adx(u64 *const c, const u64 *const a)
+++{
+++	asm volatile(
+++		"movl    $38, %%edx ;"	/* 2*c = 38 = 2^256 */
+++		"mulx 32(%1),  %%r8, %%r10 ;" /* c*C[4] */
+++		"xorl %%ebx, %%ebx ;"
+++		"adox   (%1),  %%r8 ;"
+++		"mulx 40(%1),  %%r9, %%r11 ;" /* c*C[5] */
+++		"adcx %%r10,  %%r9 ;"
+++		"adox  8(%1),  %%r9 ;"
+++		"mulx 48(%1), %%r10, %%rax ;" /* c*C[6] */
+++		"adcx %%r11, %%r10 ;"
+++		"adox 16(%1), %%r10 ;"
+++		"mulx 56(%1), %%r11, %%rcx ;" /* c*C[7] */
+++		"adcx %%rax, %%r11 ;"
+++		"adox 24(%1), %%r11 ;"
+++		/***************************************/
+++		"adcx %%rbx, %%rcx ;"
+++		"adox  %%rbx, %%rcx ;"
+++		"imul %%rdx, %%rcx ;" /* c*C[4], cf=0, of=0 */
+++		"adcx %%rcx,  %%r8 ;"
+++		"adcx %%rbx,  %%r9 ;"
+++		"movq  %%r9,  8(%0) ;"
+++		"adcx %%rbx, %%r10 ;"
+++		"movq %%r10, 16(%0) ;"
+++		"adcx %%rbx, %%r11 ;"
+++		"movq %%r11, 24(%0) ;"
+++		"mov     $0, %%ecx ;"
+++		"cmovc %%edx, %%ecx ;"
+++		"addq %%rcx,  %%r8 ;"
+++		"movq  %%r8,   (%0) ;"
+++		:
+++		: "r"(c), "r"(a)
+++		: "memory", "cc", "%rax", "%rbx", "%rcx", "%rdx", "%r8", "%r9",
+++		  "%r10", "%r11");
+++}
+++
+++static void red_eltfp25519_1w_bmi2(u64 *const c, const u64 *const a)
+++{
+++	asm volatile(
+++		"movl    $38, %%edx ;"	/* 2*c = 38 = 2^256 */
+++		"mulx 32(%1),  %%r8, %%r10 ;" /* c*C[4] */
+++		"mulx 40(%1),  %%r9, %%r11 ;" /* c*C[5] */
+++		"addq %%r10,  %%r9 ;"
+++		"mulx 48(%1), %%r10, %%rax ;" /* c*C[6] */
+++		"adcq %%r11, %%r10 ;"
+++		"mulx 56(%1), %%r11, %%rcx ;" /* c*C[7] */
+++		"adcq %%rax, %%r11 ;"
+++		/***************************************/
+++		"adcq    $0, %%rcx ;"
+++		"addq   (%1),  %%r8 ;"
+++		"adcq  8(%1),  %%r9 ;"
+++		"adcq 16(%1), %%r10 ;"
+++		"adcq 24(%1), %%r11 ;"
+++		"adcq     $0, %%rcx ;"
+++		"imul %%rdx, %%rcx ;" /* c*C[4], cf=0 */
+++		"addq %%rcx,  %%r8 ;"
+++		"adcq    $0,  %%r9 ;"
+++		"movq  %%r9,  8(%0) ;"
+++		"adcq    $0, %%r10 ;"
+++		"movq %%r10, 16(%0) ;"
+++		"adcq    $0, %%r11 ;"
+++		"movq %%r11, 24(%0) ;"
+++		"mov     $0, %%ecx ;"
+++		"cmovc %%edx, %%ecx ;"
+++		"addq %%rcx,  %%r8 ;"
+++		"movq  %%r8,   (%0) ;"
+++		:
+++		: "r"(c), "r"(a)
+++		: "memory", "cc", "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10",
+++		  "%r11");
+++}
+++
+++static __always_inline void
+++add_eltfp25519_1w_adx(u64 *const c, const u64 *const a, const u64 *const b)
+++{
+++	asm volatile(
+++		"mov     $38, %%eax ;"
+++		"xorl  %%ecx, %%ecx ;"
+++		"movq   (%2),  %%r8 ;"
+++		"adcx   (%1),  %%r8 ;"
+++		"movq  8(%2),  %%r9 ;"
+++		"adcx  8(%1),  %%r9 ;"
+++		"movq 16(%2), %%r10 ;"
+++		"adcx 16(%1), %%r10 ;"
+++		"movq 24(%2), %%r11 ;"
+++		"adcx 24(%1), %%r11 ;"
+++		"cmovc %%eax, %%ecx ;"
+++		"xorl %%eax, %%eax  ;"
+++		"adcx %%rcx,  %%r8  ;"
+++		"adcx %%rax,  %%r9  ;"
+++		"movq  %%r9,  8(%0) ;"
+++		"adcx %%rax, %%r10  ;"
+++		"movq %%r10, 16(%0) ;"
+++		"adcx %%rax, %%r11  ;"
+++		"movq %%r11, 24(%0) ;"
+++		"mov     $38, %%ecx ;"
+++		"cmovc %%ecx, %%eax ;"
+++		"addq %%rax,  %%r8  ;"
+++		"movq  %%r8,   (%0) ;"
+++		:
+++		: "r"(c), "r"(a), "r"(b)
+++		: "memory", "cc", "%rax", "%rcx", "%r8", "%r9", "%r10", "%r11");
+++}
+++
+++static __always_inline void
+++add_eltfp25519_1w_bmi2(u64 *const c, const u64 *const a, const u64 *const b)
+++{
+++	asm volatile(
+++		"mov     $38, %%eax ;"
+++		"movq   (%2),  %%r8 ;"
+++		"addq   (%1),  %%r8 ;"
+++		"movq  8(%2),  %%r9 ;"
+++		"adcq  8(%1),  %%r9 ;"
+++		"movq 16(%2), %%r10 ;"
+++		"adcq 16(%1), %%r10 ;"
+++		"movq 24(%2), %%r11 ;"
+++		"adcq 24(%1), %%r11 ;"
+++		"mov      $0, %%ecx ;"
+++		"cmovc %%eax, %%ecx ;"
+++		"addq %%rcx,  %%r8  ;"
+++		"adcq    $0,  %%r9  ;"
+++		"movq  %%r9,  8(%0) ;"
+++		"adcq    $0, %%r10  ;"
+++		"movq %%r10, 16(%0) ;"
+++		"adcq    $0, %%r11  ;"
+++		"movq %%r11, 24(%0) ;"
+++		"mov     $0, %%ecx  ;"
+++		"cmovc %%eax, %%ecx ;"
+++		"addq %%rcx,  %%r8  ;"
+++		"movq  %%r8,   (%0) ;"
+++		:
+++		: "r"(c), "r"(a), "r"(b)
+++		: "memory", "cc", "%rax", "%rcx", "%r8", "%r9", "%r10", "%r11");
+++}
+++
+++static __always_inline void
+++sub_eltfp25519_1w(u64 *const c, const u64 *const a, const u64 *const b)
+++{
+++	asm volatile(
+++		"mov     $38, %%eax ;"
+++		"movq   (%1),  %%r8 ;"
+++		"subq   (%2),  %%r8 ;"
+++		"movq  8(%1),  %%r9 ;"
+++		"sbbq  8(%2),  %%r9 ;"
+++		"movq 16(%1), %%r10 ;"
+++		"sbbq 16(%2), %%r10 ;"
+++		"movq 24(%1), %%r11 ;"
+++		"sbbq 24(%2), %%r11 ;"
+++		"mov      $0, %%ecx ;"
+++		"cmovc %%eax, %%ecx ;"
+++		"subq %%rcx,  %%r8  ;"
+++		"sbbq    $0,  %%r9  ;"
+++		"movq  %%r9,  8(%0) ;"
+++		"sbbq    $0, %%r10  ;"
+++		"movq %%r10, 16(%0) ;"
+++		"sbbq    $0, %%r11  ;"
+++		"movq %%r11, 24(%0) ;"
+++		"mov     $0, %%ecx  ;"
+++		"cmovc %%eax, %%ecx ;"
+++		"subq %%rcx,  %%r8  ;"
+++		"movq  %%r8,   (%0) ;"
+++		:
+++		: "r"(c), "r"(a), "r"(b)
+++		: "memory", "cc", "%rax", "%rcx", "%r8", "%r9", "%r10", "%r11");
+++}
+++
+++/* Multiplication by a24 = (A+2)/4 = (486662+2)/4 = 121666 */
+++static __always_inline void
+++mul_a24_eltfp25519_1w(u64 *const c, const u64 *const a)
+++{
+++	const u64 a24 = 121666;
+++	asm volatile(
+++		"movq     %2, %%rdx ;"
+++		"mulx   (%1),  %%r8, %%r10 ;"
+++		"mulx  8(%1),  %%r9, %%r11 ;"
+++		"addq %%r10,  %%r9 ;"
+++		"mulx 16(%1), %%r10, %%rax ;"
+++		"adcq %%r11, %%r10 ;"
+++		"mulx 24(%1), %%r11, %%rcx ;"
+++		"adcq %%rax, %%r11 ;"
+++		/**************************/
+++		"adcq    $0, %%rcx ;"
+++		"movl   $38, %%edx ;" /* 2*c = 38 = 2^256 mod 2^255-19*/
+++		"imul %%rdx, %%rcx ;"
+++		"addq %%rcx,  %%r8 ;"
+++		"adcq    $0,  %%r9 ;"
+++		"movq  %%r9,  8(%0) ;"
+++		"adcq    $0, %%r10 ;"
+++		"movq %%r10, 16(%0) ;"
+++		"adcq    $0, %%r11 ;"
+++		"movq %%r11, 24(%0) ;"
+++		"mov     $0, %%ecx ;"
+++		"cmovc %%edx, %%ecx ;"
+++		"addq %%rcx,  %%r8 ;"
+++		"movq  %%r8,   (%0) ;"
+++		:
+++		: "r"(c), "r"(a), "r"(a24)
+++		: "memory", "cc", "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10",
+++		  "%r11");
+++}
+++
+++static void inv_eltfp25519_1w_adx(u64 *const c, const u64 *const a)
+++{
+++	struct {
+++		eltfp25519_1w_buffer buffer;
+++		eltfp25519_1w x0, x1, x2;
+++	} __aligned(32) m;
+++	u64 *T[4];
+++
+++	T[0] = m.x0;
+++	T[1] = c; /* x^(-1) */
+++	T[2] = m.x1;
+++	T[3] = m.x2;
+++
+++	copy_eltfp25519_1w(T[1], a);
+++	sqrn_eltfp25519_1w_adx(T[1], 1);
+++	copy_eltfp25519_1w(T[2], T[1]);
+++	sqrn_eltfp25519_1w_adx(T[2], 2);
+++	mul_eltfp25519_1w_adx(T[0], a, T[2]);
+++	mul_eltfp25519_1w_adx(T[1], T[1], T[0]);
+++	copy_eltfp25519_1w(T[2], T[1]);
+++	sqrn_eltfp25519_1w_adx(T[2], 1);
+++	mul_eltfp25519_1w_adx(T[0], T[0], T[2]);
+++	copy_eltfp25519_1w(T[2], T[0]);
+++	sqrn_eltfp25519_1w_adx(T[2], 5);
+++	mul_eltfp25519_1w_adx(T[0], T[0], T[2]);
+++	copy_eltfp25519_1w(T[2], T[0]);
+++	sqrn_eltfp25519_1w_adx(T[2], 10);
+++	mul_eltfp25519_1w_adx(T[2], T[2], T[0]);
+++	copy_eltfp25519_1w(T[3], T[2]);
+++	sqrn_eltfp25519_1w_adx(T[3], 20);
+++	mul_eltfp25519_1w_adx(T[3], T[3], T[2]);
+++	sqrn_eltfp25519_1w_adx(T[3], 10);
+++	mul_eltfp25519_1w_adx(T[3], T[3], T[0]);
+++	copy_eltfp25519_1w(T[0], T[3]);
+++	sqrn_eltfp25519_1w_adx(T[0], 50);
+++	mul_eltfp25519_1w_adx(T[0], T[0], T[3]);
+++	copy_eltfp25519_1w(T[2], T[0]);
+++	sqrn_eltfp25519_1w_adx(T[2], 100);
+++	mul_eltfp25519_1w_adx(T[2], T[2], T[0]);
+++	sqrn_eltfp25519_1w_adx(T[2], 50);
+++	mul_eltfp25519_1w_adx(T[2], T[2], T[3]);
+++	sqrn_eltfp25519_1w_adx(T[2], 5);
+++	mul_eltfp25519_1w_adx(T[1], T[1], T[2]);
+++
+++	memzero_explicit(&m, sizeof(m));
+++}
+++
+++static void inv_eltfp25519_1w_bmi2(u64 *const c, const u64 *const a)
+++{
+++	struct {
+++		eltfp25519_1w_buffer buffer;
+++		eltfp25519_1w x0, x1, x2;
+++	} __aligned(32) m;
+++	u64 *T[5];
+++
+++	T[0] = m.x0;
+++	T[1] = c; /* x^(-1) */
+++	T[2] = m.x1;
+++	T[3] = m.x2;
+++
+++	copy_eltfp25519_1w(T[1], a);
+++	sqrn_eltfp25519_1w_bmi2(T[1], 1);
+++	copy_eltfp25519_1w(T[2], T[1]);
+++	sqrn_eltfp25519_1w_bmi2(T[2], 2);
+++	mul_eltfp25519_1w_bmi2(T[0], a, T[2]);
+++	mul_eltfp25519_1w_bmi2(T[1], T[1], T[0]);
+++	copy_eltfp25519_1w(T[2], T[1]);
+++	sqrn_eltfp25519_1w_bmi2(T[2], 1);
+++	mul_eltfp25519_1w_bmi2(T[0], T[0], T[2]);
+++	copy_eltfp25519_1w(T[2], T[0]);
+++	sqrn_eltfp25519_1w_bmi2(T[2], 5);
+++	mul_eltfp25519_1w_bmi2(T[0], T[0], T[2]);
+++	copy_eltfp25519_1w(T[2], T[0]);
+++	sqrn_eltfp25519_1w_bmi2(T[2], 10);
+++	mul_eltfp25519_1w_bmi2(T[2], T[2], T[0]);
+++	copy_eltfp25519_1w(T[3], T[2]);
+++	sqrn_eltfp25519_1w_bmi2(T[3], 20);
+++	mul_eltfp25519_1w_bmi2(T[3], T[3], T[2]);
+++	sqrn_eltfp25519_1w_bmi2(T[3], 10);
+++	mul_eltfp25519_1w_bmi2(T[3], T[3], T[0]);
+++	copy_eltfp25519_1w(T[0], T[3]);
+++	sqrn_eltfp25519_1w_bmi2(T[0], 50);
+++	mul_eltfp25519_1w_bmi2(T[0], T[0], T[3]);
+++	copy_eltfp25519_1w(T[2], T[0]);
+++	sqrn_eltfp25519_1w_bmi2(T[2], 100);
+++	mul_eltfp25519_1w_bmi2(T[2], T[2], T[0]);
+++	sqrn_eltfp25519_1w_bmi2(T[2], 50);
+++	mul_eltfp25519_1w_bmi2(T[2], T[2], T[3]);
+++	sqrn_eltfp25519_1w_bmi2(T[2], 5);
+++	mul_eltfp25519_1w_bmi2(T[1], T[1], T[2]);
+++
+++	memzero_explicit(&m, sizeof(m));
+++}
+++
+++/* Given c, a 256-bit number, fred_eltfp25519_1w updates c
+++ * with a number such that 0 <= C < 2**255-19.
+++ */
+++static __always_inline void fred_eltfp25519_1w(u64 *const c)
+++{
+++	u64 tmp0 = 38, tmp1 = 19;
+++	asm volatile(
+++		"btrq   $63,    %3 ;" /* Put bit 255 in carry flag and clear */
+++		"cmovncl %k5,   %k4 ;" /* c[255] ? 38 : 19 */
+++
+++		/* Add either 19 or 38 to c */
+++		"addq    %4,   %0 ;"
+++		"adcq    $0,   %1 ;"
+++		"adcq    $0,   %2 ;"
+++		"adcq    $0,   %3 ;"
+++
+++		/* Test for bit 255 again; only triggered on overflow modulo 2^255-19 */
+++		"movl    $0,  %k4 ;"
+++		"cmovnsl %k5,  %k4 ;" /* c[255] ? 0 : 19 */
+++		"btrq   $63,   %3 ;" /* Clear bit 255 */
+++
+++		/* Subtract 19 if necessary */
+++		"subq    %4,   %0 ;"
+++		"sbbq    $0,   %1 ;"
+++		"sbbq    $0,   %2 ;"
+++		"sbbq    $0,   %3 ;"
+++
+++		: "+r"(c[0]), "+r"(c[1]), "+r"(c[2]), "+r"(c[3]), "+r"(tmp0),
+++		  "+r"(tmp1)
+++		:
+++		: "memory", "cc");
+++}
+++
+++static __always_inline void cswap(u8 bit, u64 *const px, u64 *const py)
+++{
+++	u64 temp;
+++	asm volatile(
+++		"test %9, %9 ;"
+++		"movq %0, %8 ;"
+++		"cmovnzq %4, %0 ;"
+++		"cmovnzq %8, %4 ;"
+++		"movq %1, %8 ;"
+++		"cmovnzq %5, %1 ;"
+++		"cmovnzq %8, %5 ;"
+++		"movq %2, %8 ;"
+++		"cmovnzq %6, %2 ;"
+++		"cmovnzq %8, %6 ;"
+++		"movq %3, %8 ;"
+++		"cmovnzq %7, %3 ;"
+++		"cmovnzq %8, %7 ;"
+++		: "+r"(px[0]), "+r"(px[1]), "+r"(px[2]), "+r"(px[3]),
+++		  "+r"(py[0]), "+r"(py[1]), "+r"(py[2]), "+r"(py[3]),
+++		  "=r"(temp)
+++		: "r"(bit)
+++		: "cc"
+++	);
+++}
+++
+++static __always_inline void cselect(u8 bit, u64 *const px, const u64 *const py)
+++{
+++	asm volatile(
+++		"test %4, %4 ;"
+++		"cmovnzq %5, %0 ;"
+++		"cmovnzq %6, %1 ;"
+++		"cmovnzq %7, %2 ;"
+++		"cmovnzq %8, %3 ;"
+++		: "+r"(px[0]), "+r"(px[1]), "+r"(px[2]), "+r"(px[3])
+++		: "r"(bit), "rm"(py[0]), "rm"(py[1]), "rm"(py[2]), "rm"(py[3])
+++		: "cc"
+++	);
+++}
+++
+++static void curve25519_adx(u8 shared[CURVE25519_KEY_SIZE],
+++			   const u8 private_key[CURVE25519_KEY_SIZE],
+++			   const u8 session_key[CURVE25519_KEY_SIZE])
+++{
+++	struct {
+++		u64 buffer[4 * NUM_WORDS_ELTFP25519];
+++		u64 coordinates[4 * NUM_WORDS_ELTFP25519];
+++		u64 workspace[6 * NUM_WORDS_ELTFP25519];
+++		u8 session[CURVE25519_KEY_SIZE];
+++		u8 private[CURVE25519_KEY_SIZE];
+++	} __aligned(32) m;
+++
+++	int i = 0, j = 0;
+++	u64 prev = 0;
+++	u64 *const X1 = (u64 *)m.session;
+++	u64 *const key = (u64 *)m.private;
+++	u64 *const Px = m.coordinates + 0;
+++	u64 *const Pz = m.coordinates + 4;
+++	u64 *const Qx = m.coordinates + 8;
+++	u64 *const Qz = m.coordinates + 12;
+++	u64 *const X2 = Qx;
+++	u64 *const Z2 = Qz;
+++	u64 *const X3 = Px;
+++	u64 *const Z3 = Pz;
+++	u64 *const X2Z2 = Qx;
+++	u64 *const X3Z3 = Px;
+++
+++	u64 *const A = m.workspace + 0;
+++	u64 *const B = m.workspace + 4;
+++	u64 *const D = m.workspace + 8;
+++	u64 *const C = m.workspace + 12;
+++	u64 *const DA = m.workspace + 16;
+++	u64 *const CB = m.workspace + 20;
+++	u64 *const AB = A;
+++	u64 *const DC = D;
+++	u64 *const DACB = DA;
+++
+++	memcpy(m.private, private_key, sizeof(m.private));
+++	memcpy(m.session, session_key, sizeof(m.session));
+++
+++	curve25519_clamp_secret(m.private);
+++
+++	/* As in the draft:
+++	 * When receiving such an array, implementations of curve25519
+++	 * MUST mask the most-significant bit in the final byte. This
+++	 * is done to preserve compatibility with point formats which
+++	 * reserve the sign bit for use in other protocols and to
+++	 * increase resistance to implementation fingerprinting
+++	 */
+++	m.session[CURVE25519_KEY_SIZE - 1] &= (1 << (255 % 8)) - 1;
+++
+++	copy_eltfp25519_1w(Px, X1);
+++	setzero_eltfp25519_1w(Pz);
+++	setzero_eltfp25519_1w(Qx);
+++	setzero_eltfp25519_1w(Qz);
+++
+++	Pz[0] = 1;
+++	Qx[0] = 1;
+++
+++	/* main-loop */
+++	prev = 0;
+++	j = 62;
+++	for (i = 3; i >= 0; --i) {
+++		while (j >= 0) {
+++			u64 bit = (key[i] >> j) & 0x1;
+++			u64 swap = bit ^ prev;
+++			prev = bit;
+++
+++			add_eltfp25519_1w_adx(A, X2, Z2);	/* A = (X2+Z2) */
+++			sub_eltfp25519_1w(B, X2, Z2);		/* B = (X2-Z2) */
+++			add_eltfp25519_1w_adx(C, X3, Z3);	/* C = (X3+Z3) */
+++			sub_eltfp25519_1w(D, X3, Z3);		/* D = (X3-Z3) */
+++			mul_eltfp25519_2w_adx(DACB, AB, DC);	/* [DA|CB] = [A|B]*[D|C] */
+++
+++			cselect(swap, A, C);
+++			cselect(swap, B, D);
+++
+++			sqr_eltfp25519_2w_adx(AB);		/* [AA|BB] = [A^2|B^2] */
+++			add_eltfp25519_1w_adx(X3, DA, CB);	/* X3 = (DA+CB) */
+++			sub_eltfp25519_1w(Z3, DA, CB);		/* Z3 = (DA-CB) */
+++			sqr_eltfp25519_2w_adx(X3Z3);		/* [X3|Z3] = [(DA+CB)|(DA+CB)]^2 */
+++
+++			copy_eltfp25519_1w(X2, B);		/* X2 = B^2 */
+++			sub_eltfp25519_1w(Z2, A, B);		/* Z2 = E = AA-BB */
+++
+++			mul_a24_eltfp25519_1w(B, Z2);		/* B = a24*E */
+++			add_eltfp25519_1w_adx(B, B, X2);	/* B = a24*E+B */
+++			mul_eltfp25519_2w_adx(X2Z2, X2Z2, AB);	/* [X2|Z2] = [B|E]*[A|a24*E+B] */
+++			mul_eltfp25519_1w_adx(Z3, Z3, X1);	/* Z3 = Z3*X1 */
+++			--j;
+++		}
+++		j = 63;
+++	}
+++
+++	inv_eltfp25519_1w_adx(A, Qz);
+++	mul_eltfp25519_1w_adx((u64 *)shared, Qx, A);
+++	fred_eltfp25519_1w((u64 *)shared);
+++
+++	memzero_explicit(&m, sizeof(m));
+++}
+++
+++static void curve25519_adx_base(u8 session_key[CURVE25519_KEY_SIZE],
+++				const u8 private_key[CURVE25519_KEY_SIZE])
+++{
+++	struct {
+++		u64 buffer[4 * NUM_WORDS_ELTFP25519];
+++		u64 coordinates[4 * NUM_WORDS_ELTFP25519];
+++		u64 workspace[4 * NUM_WORDS_ELTFP25519];
+++		u8 private[CURVE25519_KEY_SIZE];
+++	} __aligned(32) m;
+++
+++	const int ite[4] = { 64, 64, 64, 63 };
+++	const int q = 3;
+++	u64 swap = 1;
+++
+++	int i = 0, j = 0, k = 0;
+++	u64 *const key = (u64 *)m.private;
+++	u64 *const Ur1 = m.coordinates + 0;
+++	u64 *const Zr1 = m.coordinates + 4;
+++	u64 *const Ur2 = m.coordinates + 8;
+++	u64 *const Zr2 = m.coordinates + 12;
+++
+++	u64 *const UZr1 = m.coordinates + 0;
+++	u64 *const ZUr2 = m.coordinates + 8;
+++
+++	u64 *const A = m.workspace + 0;
+++	u64 *const B = m.workspace + 4;
+++	u64 *const C = m.workspace + 8;
+++	u64 *const D = m.workspace + 12;
+++
+++	u64 *const AB = m.workspace + 0;
+++	u64 *const CD = m.workspace + 8;
+++
+++	const u64 *const P = table_ladder_8k;
+++
+++	memcpy(m.private, private_key, sizeof(m.private));
+++
+++	curve25519_clamp_secret(m.private);
+++
+++	setzero_eltfp25519_1w(Ur1);
+++	setzero_eltfp25519_1w(Zr1);
+++	setzero_eltfp25519_1w(Zr2);
+++	Ur1[0] = 1;
+++	Zr1[0] = 1;
+++	Zr2[0] = 1;
+++
+++	/* G-S */
+++	Ur2[3] = 0x1eaecdeee27cab34UL;
+++	Ur2[2] = 0xadc7a0b9235d48e2UL;
+++	Ur2[1] = 0xbbf095ae14b2edf8UL;
+++	Ur2[0] = 0x7e94e1fec82faabdUL;
+++
+++	/* main-loop */
+++	j = q;
+++	for (i = 0; i < NUM_WORDS_ELTFP25519; ++i) {
+++		while (j < ite[i]) {
+++			u64 bit = (key[i] >> j) & 0x1;
+++			k = (64 * i + j - q);
+++			swap = swap ^ bit;
+++			cswap(swap, Ur1, Ur2);
+++			cswap(swap, Zr1, Zr2);
+++			swap = bit;
+++			/* Addition */
+++			sub_eltfp25519_1w(B, Ur1, Zr1);		/* B = Ur1-Zr1 */
+++			add_eltfp25519_1w_adx(A, Ur1, Zr1);	/* A = Ur1+Zr1 */
+++			mul_eltfp25519_1w_adx(C, &P[4 * k], B);	/* C = M0-B */
+++			sub_eltfp25519_1w(B, A, C);		/* B = (Ur1+Zr1) - M*(Ur1-Zr1) */
+++			add_eltfp25519_1w_adx(A, A, C);		/* A = (Ur1+Zr1) + M*(Ur1-Zr1) */
+++			sqr_eltfp25519_2w_adx(AB);		/* A = A^2      |  B = B^2 */
+++			mul_eltfp25519_2w_adx(UZr1, ZUr2, AB);	/* Ur1 = Zr2*A  |  Zr1 = Ur2*B */
+++			++j;
+++		}
+++		j = 0;
+++	}
+++
+++	/* Doubling */
+++	for (i = 0; i < q; ++i) {
+++		add_eltfp25519_1w_adx(A, Ur1, Zr1);	/*  A = Ur1+Zr1 */
+++		sub_eltfp25519_1w(B, Ur1, Zr1);		/*  B = Ur1-Zr1 */
+++		sqr_eltfp25519_2w_adx(AB);		/*  A = A**2     B = B**2 */
+++		copy_eltfp25519_1w(C, B);		/*  C = B */
+++		sub_eltfp25519_1w(B, A, B);		/*  B = A-B */
+++		mul_a24_eltfp25519_1w(D, B);		/*  D = my_a24*B */
+++		add_eltfp25519_1w_adx(D, D, C);		/*  D = D+C */
+++		mul_eltfp25519_2w_adx(UZr1, AB, CD);	/*  Ur1 = A*B   Zr1 = Zr1*A */
+++	}
+++
+++	/* Convert to affine coordinates */
+++	inv_eltfp25519_1w_adx(A, Zr1);
+++	mul_eltfp25519_1w_adx((u64 *)session_key, Ur1, A);
+++	fred_eltfp25519_1w((u64 *)session_key);
+++
+++	memzero_explicit(&m, sizeof(m));
+++}
+++
+++static void curve25519_bmi2(u8 shared[CURVE25519_KEY_SIZE],
+++			    const u8 private_key[CURVE25519_KEY_SIZE],
+++			    const u8 session_key[CURVE25519_KEY_SIZE])
+++{
+++	struct {
+++		u64 buffer[4 * NUM_WORDS_ELTFP25519];
+++		u64 coordinates[4 * NUM_WORDS_ELTFP25519];
+++		u64 workspace[6 * NUM_WORDS_ELTFP25519];
+++		u8 session[CURVE25519_KEY_SIZE];
+++		u8 private[CURVE25519_KEY_SIZE];
+++	} __aligned(32) m;
+++
+++	int i = 0, j = 0;
+++	u64 prev = 0;
+++	u64 *const X1 = (u64 *)m.session;
+++	u64 *const key = (u64 *)m.private;
+++	u64 *const Px = m.coordinates + 0;
+++	u64 *const Pz = m.coordinates + 4;
+++	u64 *const Qx = m.coordinates + 8;
+++	u64 *const Qz = m.coordinates + 12;
+++	u64 *const X2 = Qx;
+++	u64 *const Z2 = Qz;
+++	u64 *const X3 = Px;
+++	u64 *const Z3 = Pz;
+++	u64 *const X2Z2 = Qx;
+++	u64 *const X3Z3 = Px;
+++
+++	u64 *const A = m.workspace + 0;
+++	u64 *const B = m.workspace + 4;
+++	u64 *const D = m.workspace + 8;
+++	u64 *const C = m.workspace + 12;
+++	u64 *const DA = m.workspace + 16;
+++	u64 *const CB = m.workspace + 20;
+++	u64 *const AB = A;
+++	u64 *const DC = D;
+++	u64 *const DACB = DA;
+++
+++	memcpy(m.private, private_key, sizeof(m.private));
+++	memcpy(m.session, session_key, sizeof(m.session));
+++
+++	curve25519_clamp_secret(m.private);
+++
+++	/* As in the draft:
+++	 * When receiving such an array, implementations of curve25519
+++	 * MUST mask the most-significant bit in the final byte. This
+++	 * is done to preserve compatibility with point formats which
+++	 * reserve the sign bit for use in other protocols and to
+++	 * increase resistance to implementation fingerprinting
+++	 */
+++	m.session[CURVE25519_KEY_SIZE - 1] &= (1 << (255 % 8)) - 1;
+++
+++	copy_eltfp25519_1w(Px, X1);
+++	setzero_eltfp25519_1w(Pz);
+++	setzero_eltfp25519_1w(Qx);
+++	setzero_eltfp25519_1w(Qz);
+++
+++	Pz[0] = 1;
+++	Qx[0] = 1;
+++
+++	/* main-loop */
+++	prev = 0;
+++	j = 62;
+++	for (i = 3; i >= 0; --i) {
+++		while (j >= 0) {
+++			u64 bit = (key[i] >> j) & 0x1;
+++			u64 swap = bit ^ prev;
+++			prev = bit;
+++
+++			add_eltfp25519_1w_bmi2(A, X2, Z2);	/* A = (X2+Z2) */
+++			sub_eltfp25519_1w(B, X2, Z2);		/* B = (X2-Z2) */
+++			add_eltfp25519_1w_bmi2(C, X3, Z3);	/* C = (X3+Z3) */
+++			sub_eltfp25519_1w(D, X3, Z3);		/* D = (X3-Z3) */
+++			mul_eltfp25519_2w_bmi2(DACB, AB, DC);	/* [DA|CB] = [A|B]*[D|C] */
+++
+++			cselect(swap, A, C);
+++			cselect(swap, B, D);
+++
+++			sqr_eltfp25519_2w_bmi2(AB);		/* [AA|BB] = [A^2|B^2] */
+++			add_eltfp25519_1w_bmi2(X3, DA, CB);	/* X3 = (DA+CB) */
+++			sub_eltfp25519_1w(Z3, DA, CB);		/* Z3 = (DA-CB) */
+++			sqr_eltfp25519_2w_bmi2(X3Z3);		/* [X3|Z3] = [(DA+CB)|(DA+CB)]^2 */
+++
+++			copy_eltfp25519_1w(X2, B);		/* X2 = B^2 */
+++			sub_eltfp25519_1w(Z2, A, B);		/* Z2 = E = AA-BB */
+++
+++			mul_a24_eltfp25519_1w(B, Z2);		/* B = a24*E */
+++			add_eltfp25519_1w_bmi2(B, B, X2);	/* B = a24*E+B */
+++			mul_eltfp25519_2w_bmi2(X2Z2, X2Z2, AB);	/* [X2|Z2] = [B|E]*[A|a24*E+B] */
+++			mul_eltfp25519_1w_bmi2(Z3, Z3, X1);	/* Z3 = Z3*X1 */
+++			--j;
+++		}
+++		j = 63;
+++	}
+++
+++	inv_eltfp25519_1w_bmi2(A, Qz);
+++	mul_eltfp25519_1w_bmi2((u64 *)shared, Qx, A);
+++	fred_eltfp25519_1w((u64 *)shared);
+++
+++	memzero_explicit(&m, sizeof(m));
+++}
+++
+++static void curve25519_bmi2_base(u8 session_key[CURVE25519_KEY_SIZE],
+++				 const u8 private_key[CURVE25519_KEY_SIZE])
+++{
+++	struct {
+++		u64 buffer[4 * NUM_WORDS_ELTFP25519];
+++		u64 coordinates[4 * NUM_WORDS_ELTFP25519];
+++		u64 workspace[4 * NUM_WORDS_ELTFP25519];
+++		u8 private[CURVE25519_KEY_SIZE];
+++	} __aligned(32) m;
+++
+++	const int ite[4] = { 64, 64, 64, 63 };
+++	const int q = 3;
+++	u64 swap = 1;
+++
+++	int i = 0, j = 0, k = 0;
+++	u64 *const key = (u64 *)m.private;
+++	u64 *const Ur1 = m.coordinates + 0;
+++	u64 *const Zr1 = m.coordinates + 4;
+++	u64 *const Ur2 = m.coordinates + 8;
+++	u64 *const Zr2 = m.coordinates + 12;
+++
+++	u64 *const UZr1 = m.coordinates + 0;
+++	u64 *const ZUr2 = m.coordinates + 8;
+++
+++	u64 *const A = m.workspace + 0;
+++	u64 *const B = m.workspace + 4;
+++	u64 *const C = m.workspace + 8;
+++	u64 *const D = m.workspace + 12;
+++
+++	u64 *const AB = m.workspace + 0;
+++	u64 *const CD = m.workspace + 8;
+++
+++	const u64 *const P = table_ladder_8k;
+++
+++	memcpy(m.private, private_key, sizeof(m.private));
+++
+++	curve25519_clamp_secret(m.private);
+++
+++	setzero_eltfp25519_1w(Ur1);
+++	setzero_eltfp25519_1w(Zr1);
+++	setzero_eltfp25519_1w(Zr2);
+++	Ur1[0] = 1;
+++	Zr1[0] = 1;
+++	Zr2[0] = 1;
+++
+++	/* G-S */
+++	Ur2[3] = 0x1eaecdeee27cab34UL;
+++	Ur2[2] = 0xadc7a0b9235d48e2UL;
+++	Ur2[1] = 0xbbf095ae14b2edf8UL;
+++	Ur2[0] = 0x7e94e1fec82faabdUL;
+++
+++	/* main-loop */
+++	j = q;
+++	for (i = 0; i < NUM_WORDS_ELTFP25519; ++i) {
+++		while (j < ite[i]) {
+++			u64 bit = (key[i] >> j) & 0x1;
+++			k = (64 * i + j - q);
+++			swap = swap ^ bit;
+++			cswap(swap, Ur1, Ur2);
+++			cswap(swap, Zr1, Zr2);
+++			swap = bit;
+++			/* Addition */
+++			sub_eltfp25519_1w(B, Ur1, Zr1);		/* B = Ur1-Zr1 */
+++			add_eltfp25519_1w_bmi2(A, Ur1, Zr1);	/* A = Ur1+Zr1 */
+++			mul_eltfp25519_1w_bmi2(C, &P[4 * k], B);/* C = M0-B */
+++			sub_eltfp25519_1w(B, A, C);		/* B = (Ur1+Zr1) - M*(Ur1-Zr1) */
+++			add_eltfp25519_1w_bmi2(A, A, C);	/* A = (Ur1+Zr1) + M*(Ur1-Zr1) */
+++			sqr_eltfp25519_2w_bmi2(AB);		/* A = A^2      |  B = B^2 */
+++			mul_eltfp25519_2w_bmi2(UZr1, ZUr2, AB);	/* Ur1 = Zr2*A  |  Zr1 = Ur2*B */
+++			++j;
+++		}
+++		j = 0;
+++	}
+++
+++	/* Doubling */
+++	for (i = 0; i < q; ++i) {
+++		add_eltfp25519_1w_bmi2(A, Ur1, Zr1);	/*  A = Ur1+Zr1 */
+++		sub_eltfp25519_1w(B, Ur1, Zr1);		/*  B = Ur1-Zr1 */
+++		sqr_eltfp25519_2w_bmi2(AB);		/*  A = A**2     B = B**2 */
+++		copy_eltfp25519_1w(C, B);		/*  C = B */
+++		sub_eltfp25519_1w(B, A, B);		/*  B = A-B */
+++		mul_a24_eltfp25519_1w(D, B);		/*  D = my_a24*B */
+++		add_eltfp25519_1w_bmi2(D, D, C);	/*  D = D+C */
+++		mul_eltfp25519_2w_bmi2(UZr1, AB, CD);	/*  Ur1 = A*B   Zr1 = Zr1*A */
+++	}
+++
+++	/* Convert to affine coordinates */
+++	inv_eltfp25519_1w_bmi2(A, Zr1);
+++	mul_eltfp25519_1w_bmi2((u64 *)session_key, Ur1, A);
+++	fred_eltfp25519_1w((u64 *)session_key);
+++
+++	memzero_explicit(&m, sizeof(m));
+++}
+++
+++void curve25519_arch(u8 mypublic[CURVE25519_KEY_SIZE],
+++		     const u8 secret[CURVE25519_KEY_SIZE],
+++		     const u8 basepoint[CURVE25519_KEY_SIZE])
+++{
+++	if (static_branch_likely(&curve25519_use_adx))
+++		curve25519_adx(mypublic, secret, basepoint);
+++	else if (static_branch_likely(&curve25519_use_bmi2))
+++		curve25519_bmi2(mypublic, secret, basepoint);
+++	else
+++		curve25519_generic(mypublic, secret, basepoint);
+++}
+++EXPORT_SYMBOL(curve25519_arch);
+++
+++void curve25519_base_arch(u8 pub[CURVE25519_KEY_SIZE],
+++			  const u8 secret[CURVE25519_KEY_SIZE])
+++{
+++	if (static_branch_likely(&curve25519_use_adx))
+++		curve25519_adx_base(pub, secret);
+++	else if (static_branch_likely(&curve25519_use_bmi2))
+++		curve25519_bmi2_base(pub, secret);
+++	else
+++		curve25519_generic(pub, secret, curve25519_base_point);
+++}
+++EXPORT_SYMBOL(curve25519_base_arch);
+++
+++static int curve25519_set_secret(struct crypto_kpp *tfm, const void *buf,
+++				 unsigned int len)
+++{
+++	u8 *secret = kpp_tfm_ctx(tfm);
+++
+++	if (!len)
+++		curve25519_generate_secret(secret);
+++	else if (len == CURVE25519_KEY_SIZE &&
+++		 crypto_memneq(buf, curve25519_null_point, CURVE25519_KEY_SIZE))
+++		memcpy(secret, buf, CURVE25519_KEY_SIZE);
+++	else
+++		return -EINVAL;
+++	return 0;
+++}
+++
+++static int curve25519_generate_public_key(struct kpp_request *req)
+++{
+++	struct crypto_kpp *tfm = crypto_kpp_reqtfm(req);
+++	const u8 *secret = kpp_tfm_ctx(tfm);
+++	u8 buf[CURVE25519_KEY_SIZE];
+++	int copied, nbytes;
+++
+++	if (req->src)
+++		return -EINVAL;
+++
+++	curve25519_base_arch(buf, secret);
+++
+++	/* might want less than we've got */
+++	nbytes = min_t(size_t, CURVE25519_KEY_SIZE, req->dst_len);
+++	copied = sg_copy_from_buffer(req->dst, sg_nents_for_len(req->dst,
+++								nbytes),
+++				     buf, nbytes);
+++	if (copied != nbytes)
+++		return -EINVAL;
+++	return 0;
+++}
+++
+++static int curve25519_compute_shared_secret(struct kpp_request *req)
+++{
+++	struct crypto_kpp *tfm = crypto_kpp_reqtfm(req);
+++	const u8 *secret = kpp_tfm_ctx(tfm);
+++	u8 public_key[CURVE25519_KEY_SIZE];
+++	u8 buf[CURVE25519_KEY_SIZE];
+++	int copied, nbytes;
+++
+++	if (!req->src)
+++		return -EINVAL;
+++
+++	copied = sg_copy_to_buffer(req->src,
+++				   sg_nents_for_len(req->src,
+++						    CURVE25519_KEY_SIZE),
+++				   public_key, CURVE25519_KEY_SIZE);
+++	if (copied != CURVE25519_KEY_SIZE)
+++		return -EINVAL;
+++
+++	curve25519_arch(buf, secret, public_key);
+++
+++	/* might want less than we've got */
+++	nbytes = min_t(size_t, CURVE25519_KEY_SIZE, req->dst_len);
+++	copied = sg_copy_from_buffer(req->dst, sg_nents_for_len(req->dst,
+++								nbytes),
+++				     buf, nbytes);
+++	if (copied != nbytes)
+++		return -EINVAL;
+++	return 0;
+++}
+++
+++static unsigned int curve25519_max_size(struct crypto_kpp *tfm)
+++{
+++	return CURVE25519_KEY_SIZE;
+++}
+++
+++static struct kpp_alg curve25519_alg = {
+++	.base.cra_name		= "curve25519",
+++	.base.cra_driver_name	= "curve25519-x86",
+++	.base.cra_priority	= 200,
+++	.base.cra_module	= THIS_MODULE,
+++	.base.cra_ctxsize	= CURVE25519_KEY_SIZE,
+++
+++	.set_secret		= curve25519_set_secret,
+++	.generate_public_key	= curve25519_generate_public_key,
+++	.compute_shared_secret	= curve25519_compute_shared_secret,
+++	.max_size		= curve25519_max_size,
+++};
+++
+++static int __init curve25519_mod_init(void)
+++{
+++	if (boot_cpu_has(X86_FEATURE_BMI2))
+++		static_branch_enable(&curve25519_use_bmi2);
+++	else if (boot_cpu_has(X86_FEATURE_ADX))
+++		static_branch_enable(&curve25519_use_adx);
+++	else
+++		return 0;
+++	return crypto_register_kpp(&curve25519_alg);
+++}
+++
+++static void __exit curve25519_mod_exit(void)
+++{
+++	if (boot_cpu_has(X86_FEATURE_BMI2) ||
+++	    boot_cpu_has(X86_FEATURE_ADX))
+++		crypto_unregister_kpp(&curve25519_alg);
+++}
+++
+++module_init(curve25519_mod_init);
+++module_exit(curve25519_mod_exit);
+++
+++MODULE_ALIAS_CRYPTO("curve25519");
+++MODULE_ALIAS_CRYPTO("curve25519-x86");
+++MODULE_LICENSE("GPL v2");
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -269,6 +269,12 @@ config CRYPTO_CURVE25519
++ 	select CRYPTO_KPP
++ 	select CRYPTO_LIB_CURVE25519_GENERIC
++ 
+++config CRYPTO_CURVE25519_X86
+++	tristate "x86_64 accelerated Curve25519 scalar multiplication library"
+++	depends on X86 && 64BIT
+++	select CRYPTO_LIB_CURVE25519_GENERIC
+++	select CRYPTO_ARCH_HAVE_LIB_CURVE25519
+++
++ comment "Authenticated Encryption with Associated Data"
++ 
++ config CRYPTO_CCM
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0030-crypto-arm-curve25519-import-Bernstein-and-Schwabe-s.patch b/target/linux/generic/backport-5.4/080-wireguard-0030-crypto-arm-curve25519-import-Bernstein-and-Schwabe-s.patch
+new file mode 100644
+index 0000000000..8fda25d60a
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0030-crypto-arm-curve25519-import-Bernstein-and-Schwabe-s.patch
+@@ -0,0 +1,2135 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 8 Nov 2019 13:22:37 +0100
++Subject: [PATCH] crypto: arm/curve25519 - import Bernstein and Schwabe's
++ Curve25519 ARM implementation
++
++commit f0fb006b604f98e2309a30f34ef455ac734f7c1c upstream.
++
++This comes from Dan Bernstein and Peter Schwabe's public domain NEON
++code, and is included here in raw form so that subsequent commits that
++fix these up for the kernel can see how it has changed. This code does
++have some entirely cosmetic formatting differences, adding indentation
++and so forth, so that when we actually port it for use in the kernel in
++the subsequent commit, it's obvious what's changed in the process.
++
++This code originates from SUPERCOP 20180818, available at
++<https://bench.cr.yp.to/supercop.html>.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/curve25519-core.S | 2105 +++++++++++++++++++++++++++++
++ 1 file changed, 2105 insertions(+)
++ create mode 100644 arch/arm/crypto/curve25519-core.S
++
++--- /dev/null
+++++ b/arch/arm/crypto/curve25519-core.S
++@@ -0,0 +1,2105 @@
+++/*
+++ * Public domain code from Daniel J. Bernstein and Peter Schwabe, from
+++ * SUPERCOP's curve25519/neon2/scalarmult.s.
+++ */
+++
+++.fpu neon
+++.text
+++.align 4
+++.global _crypto_scalarmult_curve25519_neon2
+++.global crypto_scalarmult_curve25519_neon2
+++.type _crypto_scalarmult_curve25519_neon2 STT_FUNC
+++.type crypto_scalarmult_curve25519_neon2 STT_FUNC
+++	_crypto_scalarmult_curve25519_neon2:
+++	crypto_scalarmult_curve25519_neon2:
+++	vpush		{q4, q5, q6, q7}
+++	mov		r12, sp
+++	sub		sp, sp, #736
+++	and		sp, sp, #0xffffffe0
+++	strd		r4, [sp, #0]
+++	strd		r6, [sp, #8]
+++	strd		r8, [sp, #16]
+++	strd		r10, [sp, #24]
+++	str		r12, [sp, #480]
+++	str		r14, [sp, #484]
+++	mov		r0, r0
+++	mov		r1, r1
+++	mov		r2, r2
+++	add		r3, sp, #32
+++	ldr		r4, =0
+++	ldr		r5, =254
+++	vmov.i32	q0, #1
+++	vshr.u64	q1, q0, #7
+++	vshr.u64	q0, q0, #8
+++	vmov.i32	d4, #19
+++	vmov.i32	d5, #38
+++	add		r6, sp, #512
+++	vst1.8		{d2-d3}, [r6, : 128]
+++	add		r6, sp, #528
+++	vst1.8		{d0-d1}, [r6, : 128]
+++	add		r6, sp, #544
+++	vst1.8		{d4-d5}, [r6, : 128]
+++	add		r6, r3, #0
+++	vmov.i32	q2, #0
+++	vst1.8		{d4-d5}, [r6, : 128]!
+++	vst1.8		{d4-d5}, [r6, : 128]!
+++	vst1.8		d4, [r6, : 64]
+++	add		r6, r3, #0
+++	ldr		r7, =960
+++	sub		r7, r7, #2
+++	neg		r7, r7
+++	sub		r7, r7, r7, LSL #7
+++	str		r7, [r6]
+++	add		r6, sp, #704
+++	vld1.8		{d4-d5}, [r1]!
+++	vld1.8		{d6-d7}, [r1]
+++	vst1.8		{d4-d5}, [r6, : 128]!
+++	vst1.8		{d6-d7}, [r6, : 128]
+++	sub		r1, r6, #16
+++	ldrb		r6, [r1]
+++	and		r6, r6, #248
+++	strb		r6, [r1]
+++	ldrb		r6, [r1, #31]
+++	and		r6, r6, #127
+++	orr		r6, r6, #64
+++	strb		r6, [r1, #31]
+++	vmov.i64	q2, #0xffffffff
+++	vshr.u64	q3, q2, #7
+++	vshr.u64	q2, q2, #6
+++	vld1.8		{d8}, [r2]
+++	vld1.8		{d10}, [r2]
+++	add		r2, r2, #6
+++	vld1.8		{d12}, [r2]
+++	vld1.8		{d14}, [r2]
+++	add		r2, r2, #6
+++	vld1.8		{d16}, [r2]
+++	add		r2, r2, #4
+++	vld1.8		{d18}, [r2]
+++	vld1.8		{d20}, [r2]
+++	add		r2, r2, #6
+++	vld1.8		{d22}, [r2]
+++	add		r2, r2, #2
+++	vld1.8		{d24}, [r2]
+++	vld1.8		{d26}, [r2]
+++	vshr.u64	q5, q5, #26
+++	vshr.u64	q6, q6, #3
+++	vshr.u64	q7, q7, #29
+++	vshr.u64	q8, q8, #6
+++	vshr.u64	q10, q10, #25
+++	vshr.u64	q11, q11, #3
+++	vshr.u64	q12, q12, #12
+++	vshr.u64	q13, q13, #38
+++	vand		q4, q4, q2
+++	vand		q6, q6, q2
+++	vand		q8, q8, q2
+++	vand		q10, q10, q2
+++	vand		q2, q12, q2
+++	vand		q5, q5, q3
+++	vand		q7, q7, q3
+++	vand		q9, q9, q3
+++	vand		q11, q11, q3
+++	vand		q3, q13, q3
+++	add		r2, r3, #48
+++	vadd.i64	q12, q4, q1
+++	vadd.i64	q13, q10, q1
+++	vshr.s64	q12, q12, #26
+++	vshr.s64	q13, q13, #26
+++	vadd.i64	q5, q5, q12
+++	vshl.i64	q12, q12, #26
+++	vadd.i64	q14, q5, q0
+++	vadd.i64	q11, q11, q13
+++	vshl.i64	q13, q13, #26
+++	vadd.i64	q15, q11, q0
+++	vsub.i64	q4, q4, q12
+++	vshr.s64	q12, q14, #25
+++	vsub.i64	q10, q10, q13
+++	vshr.s64	q13, q15, #25
+++	vadd.i64	q6, q6, q12
+++	vshl.i64	q12, q12, #25
+++	vadd.i64	q14, q6, q1
+++	vadd.i64	q2, q2, q13
+++	vsub.i64	q5, q5, q12
+++	vshr.s64	q12, q14, #26
+++	vshl.i64	q13, q13, #25
+++	vadd.i64	q14, q2, q1
+++	vadd.i64	q7, q7, q12
+++	vshl.i64	q12, q12, #26
+++	vadd.i64	q15, q7, q0
+++	vsub.i64	q11, q11, q13
+++	vshr.s64	q13, q14, #26
+++	vsub.i64	q6, q6, q12
+++	vshr.s64	q12, q15, #25
+++	vadd.i64	q3, q3, q13
+++	vshl.i64	q13, q13, #26
+++	vadd.i64	q14, q3, q0
+++	vadd.i64	q8, q8, q12
+++	vshl.i64	q12, q12, #25
+++	vadd.i64	q15, q8, q1
+++	add		r2, r2, #8
+++	vsub.i64	q2, q2, q13
+++	vshr.s64	q13, q14, #25
+++	vsub.i64	q7, q7, q12
+++	vshr.s64	q12, q15, #26
+++	vadd.i64	q14, q13, q13
+++	vadd.i64	q9, q9, q12
+++	vtrn.32		d12, d14
+++	vshl.i64	q12, q12, #26
+++	vtrn.32		d13, d15
+++	vadd.i64	q0, q9, q0
+++	vadd.i64	q4, q4, q14
+++	vst1.8		d12, [r2, : 64]!
+++	vshl.i64	q6, q13, #4
+++	vsub.i64	q7, q8, q12
+++	vshr.s64	q0, q0, #25
+++	vadd.i64	q4, q4, q6
+++	vadd.i64	q6, q10, q0
+++	vshl.i64	q0, q0, #25
+++	vadd.i64	q8, q6, q1
+++	vadd.i64	q4, q4, q13
+++	vshl.i64	q10, q13, #25
+++	vadd.i64	q1, q4, q1
+++	vsub.i64	q0, q9, q0
+++	vshr.s64	q8, q8, #26
+++	vsub.i64	q3, q3, q10
+++	vtrn.32		d14, d0
+++	vshr.s64	q1, q1, #26
+++	vtrn.32		d15, d1
+++	vadd.i64	q0, q11, q8
+++	vst1.8		d14, [r2, : 64]
+++	vshl.i64	q7, q8, #26
+++	vadd.i64	q5, q5, q1
+++	vtrn.32		d4, d6
+++	vshl.i64	q1, q1, #26
+++	vtrn.32		d5, d7
+++	vsub.i64	q3, q6, q7
+++	add		r2, r2, #16
+++	vsub.i64	q1, q4, q1
+++	vst1.8		d4, [r2, : 64]
+++	vtrn.32		d6, d0
+++	vtrn.32		d7, d1
+++	sub		r2, r2, #8
+++	vtrn.32		d2, d10
+++	vtrn.32		d3, d11
+++	vst1.8		d6, [r2, : 64]
+++	sub		r2, r2, #24
+++	vst1.8		d2, [r2, : 64]
+++	add		r2, r3, #96
+++	vmov.i32	q0, #0
+++	vmov.i64	d2, #0xff
+++	vmov.i64	d3, #0
+++	vshr.u32	q1, q1, #7
+++	vst1.8		{d2-d3}, [r2, : 128]!
+++	vst1.8		{d0-d1}, [r2, : 128]!
+++	vst1.8		d0, [r2, : 64]
+++	add		r2, r3, #144
+++	vmov.i32	q0, #0
+++	vst1.8		{d0-d1}, [r2, : 128]!
+++	vst1.8		{d0-d1}, [r2, : 128]!
+++	vst1.8		d0, [r2, : 64]
+++	add		r2, r3, #240
+++	vmov.i32	q0, #0
+++	vmov.i64	d2, #0xff
+++	vmov.i64	d3, #0
+++	vshr.u32	q1, q1, #7
+++	vst1.8		{d2-d3}, [r2, : 128]!
+++	vst1.8		{d0-d1}, [r2, : 128]!
+++	vst1.8		d0, [r2, : 64]
+++	add		r2, r3, #48
+++	add		r6, r3, #192
+++	vld1.8		{d0-d1}, [r2, : 128]!
+++	vld1.8		{d2-d3}, [r2, : 128]!
+++	vld1.8		{d4}, [r2, : 64]
+++	vst1.8		{d0-d1}, [r6, : 128]!
+++	vst1.8		{d2-d3}, [r6, : 128]!
+++	vst1.8		d4, [r6, : 64]
+++._mainloop:
+++	mov		r2, r5, LSR #3
+++	and		r6, r5, #7
+++	ldrb		r2, [r1, r2]
+++	mov		r2, r2, LSR r6
+++	and		r2, r2, #1
+++	str		r5, [sp, #488]
+++	eor		r4, r4, r2
+++	str		r2, [sp, #492]
+++	neg		r2, r4
+++	add		r4, r3, #96
+++	add		r5, r3, #192
+++	add		r6, r3, #144
+++	vld1.8		{d8-d9}, [r4, : 128]!
+++	add		r7, r3, #240
+++	vld1.8		{d10-d11}, [r5, : 128]!
+++	veor		q6, q4, q5
+++	vld1.8		{d14-d15}, [r6, : 128]!
+++	vdup.i32	q8, r2
+++	vld1.8		{d18-d19}, [r7, : 128]!
+++	veor		q10, q7, q9
+++	vld1.8		{d22-d23}, [r4, : 128]!
+++	vand		q6, q6, q8
+++	vld1.8		{d24-d25}, [r5, : 128]!
+++	vand		q10, q10, q8
+++	vld1.8		{d26-d27}, [r6, : 128]!
+++	veor		q4, q4, q6
+++	vld1.8		{d28-d29}, [r7, : 128]!
+++	veor		q5, q5, q6
+++	vld1.8		{d0}, [r4, : 64]
+++	veor		q6, q7, q10
+++	vld1.8		{d2}, [r5, : 64]
+++	veor		q7, q9, q10
+++	vld1.8		{d4}, [r6, : 64]
+++	veor		q9, q11, q12
+++	vld1.8		{d6}, [r7, : 64]
+++	veor		q10, q0, q1
+++	sub		r2, r4, #32
+++	vand		q9, q9, q8
+++	sub		r4, r5, #32
+++	vand		q10, q10, q8
+++	sub		r5, r6, #32
+++	veor		q11, q11, q9
+++	sub		r6, r7, #32
+++	veor		q0, q0, q10
+++	veor		q9, q12, q9
+++	veor		q1, q1, q10
+++	veor		q10, q13, q14
+++	veor		q12, q2, q3
+++	vand		q10, q10, q8
+++	vand		q8, q12, q8
+++	veor		q12, q13, q10
+++	veor		q2, q2, q8
+++	veor		q10, q14, q10
+++	veor		q3, q3, q8
+++	vadd.i32	q8, q4, q6
+++	vsub.i32	q4, q4, q6
+++	vst1.8		{d16-d17}, [r2, : 128]!
+++	vadd.i32	q6, q11, q12
+++	vst1.8		{d8-d9}, [r5, : 128]!
+++	vsub.i32	q4, q11, q12
+++	vst1.8		{d12-d13}, [r2, : 128]!
+++	vadd.i32	q6, q0, q2
+++	vst1.8		{d8-d9}, [r5, : 128]!
+++	vsub.i32	q0, q0, q2
+++	vst1.8		d12, [r2, : 64]
+++	vadd.i32	q2, q5, q7
+++	vst1.8		d0, [r5, : 64]
+++	vsub.i32	q0, q5, q7
+++	vst1.8		{d4-d5}, [r4, : 128]!
+++	vadd.i32	q2, q9, q10
+++	vst1.8		{d0-d1}, [r6, : 128]!
+++	vsub.i32	q0, q9, q10
+++	vst1.8		{d4-d5}, [r4, : 128]!
+++	vadd.i32	q2, q1, q3
+++	vst1.8		{d0-d1}, [r6, : 128]!
+++	vsub.i32	q0, q1, q3
+++	vst1.8		d4, [r4, : 64]
+++	vst1.8		d0, [r6, : 64]
+++	add		r2, sp, #544
+++	add		r4, r3, #96
+++	add		r5, r3, #144
+++	vld1.8		{d0-d1}, [r2, : 128]
+++	vld1.8		{d2-d3}, [r4, : 128]!
+++	vld1.8		{d4-d5}, [r5, : 128]!
+++	vzip.i32	q1, q2
+++	vld1.8		{d6-d7}, [r4, : 128]!
+++	vld1.8		{d8-d9}, [r5, : 128]!
+++	vshl.i32	q5, q1, #1
+++	vzip.i32	q3, q4
+++	vshl.i32	q6, q2, #1
+++	vld1.8		{d14}, [r4, : 64]
+++	vshl.i32	q8, q3, #1
+++	vld1.8		{d15}, [r5, : 64]
+++	vshl.i32	q9, q4, #1
+++	vmul.i32	d21, d7, d1
+++	vtrn.32		d14, d15
+++	vmul.i32	q11, q4, q0
+++	vmul.i32	q0, q7, q0
+++	vmull.s32	q12, d2, d2
+++	vmlal.s32	q12, d11, d1
+++	vmlal.s32	q12, d12, d0
+++	vmlal.s32	q12, d13, d23
+++	vmlal.s32	q12, d16, d22
+++	vmlal.s32	q12, d7, d21
+++	vmull.s32	q10, d2, d11
+++	vmlal.s32	q10, d4, d1
+++	vmlal.s32	q10, d13, d0
+++	vmlal.s32	q10, d6, d23
+++	vmlal.s32	q10, d17, d22
+++	vmull.s32	q13, d10, d4
+++	vmlal.s32	q13, d11, d3
+++	vmlal.s32	q13, d13, d1
+++	vmlal.s32	q13, d16, d0
+++	vmlal.s32	q13, d17, d23
+++	vmlal.s32	q13, d8, d22
+++	vmull.s32	q1, d10, d5
+++	vmlal.s32	q1, d11, d4
+++	vmlal.s32	q1, d6, d1
+++	vmlal.s32	q1, d17, d0
+++	vmlal.s32	q1, d8, d23
+++	vmull.s32	q14, d10, d6
+++	vmlal.s32	q14, d11, d13
+++	vmlal.s32	q14, d4, d4
+++	vmlal.s32	q14, d17, d1
+++	vmlal.s32	q14, d18, d0
+++	vmlal.s32	q14, d9, d23
+++	vmull.s32	q11, d10, d7
+++	vmlal.s32	q11, d11, d6
+++	vmlal.s32	q11, d12, d5
+++	vmlal.s32	q11, d8, d1
+++	vmlal.s32	q11, d19, d0
+++	vmull.s32	q15, d10, d8
+++	vmlal.s32	q15, d11, d17
+++	vmlal.s32	q15, d12, d6
+++	vmlal.s32	q15, d13, d5
+++	vmlal.s32	q15, d19, d1
+++	vmlal.s32	q15, d14, d0
+++	vmull.s32	q2, d10, d9
+++	vmlal.s32	q2, d11, d8
+++	vmlal.s32	q2, d12, d7
+++	vmlal.s32	q2, d13, d6
+++	vmlal.s32	q2, d14, d1
+++	vmull.s32	q0, d15, d1
+++	vmlal.s32	q0, d10, d14
+++	vmlal.s32	q0, d11, d19
+++	vmlal.s32	q0, d12, d8
+++	vmlal.s32	q0, d13, d17
+++	vmlal.s32	q0, d6, d6
+++	add		r2, sp, #512
+++	vld1.8		{d18-d19}, [r2, : 128]
+++	vmull.s32	q3, d16, d7
+++	vmlal.s32	q3, d10, d15
+++	vmlal.s32	q3, d11, d14
+++	vmlal.s32	q3, d12, d9
+++	vmlal.s32	q3, d13, d8
+++	add		r2, sp, #528
+++	vld1.8		{d8-d9}, [r2, : 128]
+++	vadd.i64	q5, q12, q9
+++	vadd.i64	q6, q15, q9
+++	vshr.s64	q5, q5, #26
+++	vshr.s64	q6, q6, #26
+++	vadd.i64	q7, q10, q5
+++	vshl.i64	q5, q5, #26
+++	vadd.i64	q8, q7, q4
+++	vadd.i64	q2, q2, q6
+++	vshl.i64	q6, q6, #26
+++	vadd.i64	q10, q2, q4
+++	vsub.i64	q5, q12, q5
+++	vshr.s64	q8, q8, #25
+++	vsub.i64	q6, q15, q6
+++	vshr.s64	q10, q10, #25
+++	vadd.i64	q12, q13, q8
+++	vshl.i64	q8, q8, #25
+++	vadd.i64	q13, q12, q9
+++	vadd.i64	q0, q0, q10
+++	vsub.i64	q7, q7, q8
+++	vshr.s64	q8, q13, #26
+++	vshl.i64	q10, q10, #25
+++	vadd.i64	q13, q0, q9
+++	vadd.i64	q1, q1, q8
+++	vshl.i64	q8, q8, #26
+++	vadd.i64	q15, q1, q4
+++	vsub.i64	q2, q2, q10
+++	vshr.s64	q10, q13, #26
+++	vsub.i64	q8, q12, q8
+++	vshr.s64	q12, q15, #25
+++	vadd.i64	q3, q3, q10
+++	vshl.i64	q10, q10, #26
+++	vadd.i64	q13, q3, q4
+++	vadd.i64	q14, q14, q12
+++	add		r2, r3, #288
+++	vshl.i64	q12, q12, #25
+++	add		r4, r3, #336
+++	vadd.i64	q15, q14, q9
+++	add		r2, r2, #8
+++	vsub.i64	q0, q0, q10
+++	add		r4, r4, #8
+++	vshr.s64	q10, q13, #25
+++	vsub.i64	q1, q1, q12
+++	vshr.s64	q12, q15, #26
+++	vadd.i64	q13, q10, q10
+++	vadd.i64	q11, q11, q12
+++	vtrn.32		d16, d2
+++	vshl.i64	q12, q12, #26
+++	vtrn.32		d17, d3
+++	vadd.i64	q1, q11, q4
+++	vadd.i64	q4, q5, q13
+++	vst1.8		d16, [r2, : 64]!
+++	vshl.i64	q5, q10, #4
+++	vst1.8		d17, [r4, : 64]!
+++	vsub.i64	q8, q14, q12
+++	vshr.s64	q1, q1, #25
+++	vadd.i64	q4, q4, q5
+++	vadd.i64	q5, q6, q1
+++	vshl.i64	q1, q1, #25
+++	vadd.i64	q6, q5, q9
+++	vadd.i64	q4, q4, q10
+++	vshl.i64	q10, q10, #25
+++	vadd.i64	q9, q4, q9
+++	vsub.i64	q1, q11, q1
+++	vshr.s64	q6, q6, #26
+++	vsub.i64	q3, q3, q10
+++	vtrn.32		d16, d2
+++	vshr.s64	q9, q9, #26
+++	vtrn.32		d17, d3
+++	vadd.i64	q1, q2, q6
+++	vst1.8		d16, [r2, : 64]
+++	vshl.i64	q2, q6, #26
+++	vst1.8		d17, [r4, : 64]
+++	vadd.i64	q6, q7, q9
+++	vtrn.32		d0, d6
+++	vshl.i64	q7, q9, #26
+++	vtrn.32		d1, d7
+++	vsub.i64	q2, q5, q2
+++	add		r2, r2, #16
+++	vsub.i64	q3, q4, q7
+++	vst1.8		d0, [r2, : 64]
+++	add		r4, r4, #16
+++	vst1.8		d1, [r4, : 64]
+++	vtrn.32		d4, d2
+++	vtrn.32		d5, d3
+++	sub		r2, r2, #8
+++	sub		r4, r4, #8
+++	vtrn.32		d6, d12
+++	vtrn.32		d7, d13
+++	vst1.8		d4, [r2, : 64]
+++	vst1.8		d5, [r4, : 64]
+++	sub		r2, r2, #24
+++	sub		r4, r4, #24
+++	vst1.8		d6, [r2, : 64]
+++	vst1.8		d7, [r4, : 64]
+++	add		r2, r3, #240
+++	add		r4, r3, #96
+++	vld1.8		{d0-d1}, [r4, : 128]!
+++	vld1.8		{d2-d3}, [r4, : 128]!
+++	vld1.8		{d4}, [r4, : 64]
+++	add		r4, r3, #144
+++	vld1.8		{d6-d7}, [r4, : 128]!
+++	vtrn.32		q0, q3
+++	vld1.8		{d8-d9}, [r4, : 128]!
+++	vshl.i32	q5, q0, #4
+++	vtrn.32		q1, q4
+++	vshl.i32	q6, q3, #4
+++	vadd.i32	q5, q5, q0
+++	vadd.i32	q6, q6, q3
+++	vshl.i32	q7, q1, #4
+++	vld1.8		{d5}, [r4, : 64]
+++	vshl.i32	q8, q4, #4
+++	vtrn.32		d4, d5
+++	vadd.i32	q7, q7, q1
+++	vadd.i32	q8, q8, q4
+++	vld1.8		{d18-d19}, [r2, : 128]!
+++	vshl.i32	q10, q2, #4
+++	vld1.8		{d22-d23}, [r2, : 128]!
+++	vadd.i32	q10, q10, q2
+++	vld1.8		{d24}, [r2, : 64]
+++	vadd.i32	q5, q5, q0
+++	add		r2, r3, #192
+++	vld1.8		{d26-d27}, [r2, : 128]!
+++	vadd.i32	q6, q6, q3
+++	vld1.8		{d28-d29}, [r2, : 128]!
+++	vadd.i32	q8, q8, q4
+++	vld1.8		{d25}, [r2, : 64]
+++	vadd.i32	q10, q10, q2
+++	vtrn.32		q9, q13
+++	vadd.i32	q7, q7, q1
+++	vadd.i32	q5, q5, q0
+++	vtrn.32		q11, q14
+++	vadd.i32	q6, q6, q3
+++	add		r2, sp, #560
+++	vadd.i32	q10, q10, q2
+++	vtrn.32		d24, d25
+++	vst1.8		{d12-d13}, [r2, : 128]
+++	vshl.i32	q6, q13, #1
+++	add		r2, sp, #576
+++	vst1.8		{d20-d21}, [r2, : 128]
+++	vshl.i32	q10, q14, #1
+++	add		r2, sp, #592
+++	vst1.8		{d12-d13}, [r2, : 128]
+++	vshl.i32	q15, q12, #1
+++	vadd.i32	q8, q8, q4
+++	vext.32		d10, d31, d30, #0
+++	vadd.i32	q7, q7, q1
+++	add		r2, sp, #608
+++	vst1.8		{d16-d17}, [r2, : 128]
+++	vmull.s32	q8, d18, d5
+++	vmlal.s32	q8, d26, d4
+++	vmlal.s32	q8, d19, d9
+++	vmlal.s32	q8, d27, d3
+++	vmlal.s32	q8, d22, d8
+++	vmlal.s32	q8, d28, d2
+++	vmlal.s32	q8, d23, d7
+++	vmlal.s32	q8, d29, d1
+++	vmlal.s32	q8, d24, d6
+++	vmlal.s32	q8, d25, d0
+++	add		r2, sp, #624
+++	vst1.8		{d14-d15}, [r2, : 128]
+++	vmull.s32	q2, d18, d4
+++	vmlal.s32	q2, d12, d9
+++	vmlal.s32	q2, d13, d8
+++	vmlal.s32	q2, d19, d3
+++	vmlal.s32	q2, d22, d2
+++	vmlal.s32	q2, d23, d1
+++	vmlal.s32	q2, d24, d0
+++	add		r2, sp, #640
+++	vst1.8		{d20-d21}, [r2, : 128]
+++	vmull.s32	q7, d18, d9
+++	vmlal.s32	q7, d26, d3
+++	vmlal.s32	q7, d19, d8
+++	vmlal.s32	q7, d27, d2
+++	vmlal.s32	q7, d22, d7
+++	vmlal.s32	q7, d28, d1
+++	vmlal.s32	q7, d23, d6
+++	vmlal.s32	q7, d29, d0
+++	add		r2, sp, #656
+++	vst1.8		{d10-d11}, [r2, : 128]
+++	vmull.s32	q5, d18, d3
+++	vmlal.s32	q5, d19, d2
+++	vmlal.s32	q5, d22, d1
+++	vmlal.s32	q5, d23, d0
+++	vmlal.s32	q5, d12, d8
+++	add		r2, sp, #672
+++	vst1.8		{d16-d17}, [r2, : 128]
+++	vmull.s32	q4, d18, d8
+++	vmlal.s32	q4, d26, d2
+++	vmlal.s32	q4, d19, d7
+++	vmlal.s32	q4, d27, d1
+++	vmlal.s32	q4, d22, d6
+++	vmlal.s32	q4, d28, d0
+++	vmull.s32	q8, d18, d7
+++	vmlal.s32	q8, d26, d1
+++	vmlal.s32	q8, d19, d6
+++	vmlal.s32	q8, d27, d0
+++	add		r2, sp, #576
+++	vld1.8		{d20-d21}, [r2, : 128]
+++	vmlal.s32	q7, d24, d21
+++	vmlal.s32	q7, d25, d20
+++	vmlal.s32	q4, d23, d21
+++	vmlal.s32	q4, d29, d20
+++	vmlal.s32	q8, d22, d21
+++	vmlal.s32	q8, d28, d20
+++	vmlal.s32	q5, d24, d20
+++	add		r2, sp, #576
+++	vst1.8		{d14-d15}, [r2, : 128]
+++	vmull.s32	q7, d18, d6
+++	vmlal.s32	q7, d26, d0
+++	add		r2, sp, #656
+++	vld1.8		{d30-d31}, [r2, : 128]
+++	vmlal.s32	q2, d30, d21
+++	vmlal.s32	q7, d19, d21
+++	vmlal.s32	q7, d27, d20
+++	add		r2, sp, #624
+++	vld1.8		{d26-d27}, [r2, : 128]
+++	vmlal.s32	q4, d25, d27
+++	vmlal.s32	q8, d29, d27
+++	vmlal.s32	q8, d25, d26
+++	vmlal.s32	q7, d28, d27
+++	vmlal.s32	q7, d29, d26
+++	add		r2, sp, #608
+++	vld1.8		{d28-d29}, [r2, : 128]
+++	vmlal.s32	q4, d24, d29
+++	vmlal.s32	q8, d23, d29
+++	vmlal.s32	q8, d24, d28
+++	vmlal.s32	q7, d22, d29
+++	vmlal.s32	q7, d23, d28
+++	add		r2, sp, #608
+++	vst1.8		{d8-d9}, [r2, : 128]
+++	add		r2, sp, #560
+++	vld1.8		{d8-d9}, [r2, : 128]
+++	vmlal.s32	q7, d24, d9
+++	vmlal.s32	q7, d25, d31
+++	vmull.s32	q1, d18, d2
+++	vmlal.s32	q1, d19, d1
+++	vmlal.s32	q1, d22, d0
+++	vmlal.s32	q1, d24, d27
+++	vmlal.s32	q1, d23, d20
+++	vmlal.s32	q1, d12, d7
+++	vmlal.s32	q1, d13, d6
+++	vmull.s32	q6, d18, d1
+++	vmlal.s32	q6, d19, d0
+++	vmlal.s32	q6, d23, d27
+++	vmlal.s32	q6, d22, d20
+++	vmlal.s32	q6, d24, d26
+++	vmull.s32	q0, d18, d0
+++	vmlal.s32	q0, d22, d27
+++	vmlal.s32	q0, d23, d26
+++	vmlal.s32	q0, d24, d31
+++	vmlal.s32	q0, d19, d20
+++	add		r2, sp, #640
+++	vld1.8		{d18-d19}, [r2, : 128]
+++	vmlal.s32	q2, d18, d7
+++	vmlal.s32	q2, d19, d6
+++	vmlal.s32	q5, d18, d6
+++	vmlal.s32	q5, d19, d21
+++	vmlal.s32	q1, d18, d21
+++	vmlal.s32	q1, d19, d29
+++	vmlal.s32	q0, d18, d28
+++	vmlal.s32	q0, d19, d9
+++	vmlal.s32	q6, d18, d29
+++	vmlal.s32	q6, d19, d28
+++	add		r2, sp, #592
+++	vld1.8		{d18-d19}, [r2, : 128]
+++	add		r2, sp, #512
+++	vld1.8		{d22-d23}, [r2, : 128]
+++	vmlal.s32	q5, d19, d7
+++	vmlal.s32	q0, d18, d21
+++	vmlal.s32	q0, d19, d29
+++	vmlal.s32	q6, d18, d6
+++	add		r2, sp, #528
+++	vld1.8		{d6-d7}, [r2, : 128]
+++	vmlal.s32	q6, d19, d21
+++	add		r2, sp, #576
+++	vld1.8		{d18-d19}, [r2, : 128]
+++	vmlal.s32	q0, d30, d8
+++	add		r2, sp, #672
+++	vld1.8		{d20-d21}, [r2, : 128]
+++	vmlal.s32	q5, d30, d29
+++	add		r2, sp, #608
+++	vld1.8		{d24-d25}, [r2, : 128]
+++	vmlal.s32	q1, d30, d28
+++	vadd.i64	q13, q0, q11
+++	vadd.i64	q14, q5, q11
+++	vmlal.s32	q6, d30, d9
+++	vshr.s64	q4, q13, #26
+++	vshr.s64	q13, q14, #26
+++	vadd.i64	q7, q7, q4
+++	vshl.i64	q4, q4, #26
+++	vadd.i64	q14, q7, q3
+++	vadd.i64	q9, q9, q13
+++	vshl.i64	q13, q13, #26
+++	vadd.i64	q15, q9, q3
+++	vsub.i64	q0, q0, q4
+++	vshr.s64	q4, q14, #25
+++	vsub.i64	q5, q5, q13
+++	vshr.s64	q13, q15, #25
+++	vadd.i64	q6, q6, q4
+++	vshl.i64	q4, q4, #25
+++	vadd.i64	q14, q6, q11
+++	vadd.i64	q2, q2, q13
+++	vsub.i64	q4, q7, q4
+++	vshr.s64	q7, q14, #26
+++	vshl.i64	q13, q13, #25
+++	vadd.i64	q14, q2, q11
+++	vadd.i64	q8, q8, q7
+++	vshl.i64	q7, q7, #26
+++	vadd.i64	q15, q8, q3
+++	vsub.i64	q9, q9, q13
+++	vshr.s64	q13, q14, #26
+++	vsub.i64	q6, q6, q7
+++	vshr.s64	q7, q15, #25
+++	vadd.i64	q10, q10, q13
+++	vshl.i64	q13, q13, #26
+++	vadd.i64	q14, q10, q3
+++	vadd.i64	q1, q1, q7
+++	add		r2, r3, #144
+++	vshl.i64	q7, q7, #25
+++	add		r4, r3, #96
+++	vadd.i64	q15, q1, q11
+++	add		r2, r2, #8
+++	vsub.i64	q2, q2, q13
+++	add		r4, r4, #8
+++	vshr.s64	q13, q14, #25
+++	vsub.i64	q7, q8, q7
+++	vshr.s64	q8, q15, #26
+++	vadd.i64	q14, q13, q13
+++	vadd.i64	q12, q12, q8
+++	vtrn.32		d12, d14
+++	vshl.i64	q8, q8, #26
+++	vtrn.32		d13, d15
+++	vadd.i64	q3, q12, q3
+++	vadd.i64	q0, q0, q14
+++	vst1.8		d12, [r2, : 64]!
+++	vshl.i64	q7, q13, #4
+++	vst1.8		d13, [r4, : 64]!
+++	vsub.i64	q1, q1, q8
+++	vshr.s64	q3, q3, #25
+++	vadd.i64	q0, q0, q7
+++	vadd.i64	q5, q5, q3
+++	vshl.i64	q3, q3, #25
+++	vadd.i64	q6, q5, q11
+++	vadd.i64	q0, q0, q13
+++	vshl.i64	q7, q13, #25
+++	vadd.i64	q8, q0, q11
+++	vsub.i64	q3, q12, q3
+++	vshr.s64	q6, q6, #26
+++	vsub.i64	q7, q10, q7
+++	vtrn.32		d2, d6
+++	vshr.s64	q8, q8, #26
+++	vtrn.32		d3, d7
+++	vadd.i64	q3, q9, q6
+++	vst1.8		d2, [r2, : 64]
+++	vshl.i64	q6, q6, #26
+++	vst1.8		d3, [r4, : 64]
+++	vadd.i64	q1, q4, q8
+++	vtrn.32		d4, d14
+++	vshl.i64	q4, q8, #26
+++	vtrn.32		d5, d15
+++	vsub.i64	q5, q5, q6
+++	add		r2, r2, #16
+++	vsub.i64	q0, q0, q4
+++	vst1.8		d4, [r2, : 64]
+++	add		r4, r4, #16
+++	vst1.8		d5, [r4, : 64]
+++	vtrn.32		d10, d6
+++	vtrn.32		d11, d7
+++	sub		r2, r2, #8
+++	sub		r4, r4, #8
+++	vtrn.32		d0, d2
+++	vtrn.32		d1, d3
+++	vst1.8		d10, [r2, : 64]
+++	vst1.8		d11, [r4, : 64]
+++	sub		r2, r2, #24
+++	sub		r4, r4, #24
+++	vst1.8		d0, [r2, : 64]
+++	vst1.8		d1, [r4, : 64]
+++	add		r2, r3, #288
+++	add		r4, r3, #336
+++	vld1.8		{d0-d1}, [r2, : 128]!
+++	vld1.8		{d2-d3}, [r4, : 128]!
+++	vsub.i32	q0, q0, q1
+++	vld1.8		{d2-d3}, [r2, : 128]!
+++	vld1.8		{d4-d5}, [r4, : 128]!
+++	vsub.i32	q1, q1, q2
+++	add		r5, r3, #240
+++	vld1.8		{d4}, [r2, : 64]
+++	vld1.8		{d6}, [r4, : 64]
+++	vsub.i32	q2, q2, q3
+++	vst1.8		{d0-d1}, [r5, : 128]!
+++	vst1.8		{d2-d3}, [r5, : 128]!
+++	vst1.8		d4, [r5, : 64]
+++	add		r2, r3, #144
+++	add		r4, r3, #96
+++	add		r5, r3, #144
+++	add		r6, r3, #192
+++	vld1.8		{d0-d1}, [r2, : 128]!
+++	vld1.8		{d2-d3}, [r4, : 128]!
+++	vsub.i32	q2, q0, q1
+++	vadd.i32	q0, q0, q1
+++	vld1.8		{d2-d3}, [r2, : 128]!
+++	vld1.8		{d6-d7}, [r4, : 128]!
+++	vsub.i32	q4, q1, q3
+++	vadd.i32	q1, q1, q3
+++	vld1.8		{d6}, [r2, : 64]
+++	vld1.8		{d10}, [r4, : 64]
+++	vsub.i32	q6, q3, q5
+++	vadd.i32	q3, q3, q5
+++	vst1.8		{d4-d5}, [r5, : 128]!
+++	vst1.8		{d0-d1}, [r6, : 128]!
+++	vst1.8		{d8-d9}, [r5, : 128]!
+++	vst1.8		{d2-d3}, [r6, : 128]!
+++	vst1.8		d12, [r5, : 64]
+++	vst1.8		d6, [r6, : 64]
+++	add		r2, r3, #0
+++	add		r4, r3, #240
+++	vld1.8		{d0-d1}, [r4, : 128]!
+++	vld1.8		{d2-d3}, [r4, : 128]!
+++	vld1.8		{d4}, [r4, : 64]
+++	add		r4, r3, #336
+++	vld1.8		{d6-d7}, [r4, : 128]!
+++	vtrn.32		q0, q3
+++	vld1.8		{d8-d9}, [r4, : 128]!
+++	vshl.i32	q5, q0, #4
+++	vtrn.32		q1, q4
+++	vshl.i32	q6, q3, #4
+++	vadd.i32	q5, q5, q0
+++	vadd.i32	q6, q6, q3
+++	vshl.i32	q7, q1, #4
+++	vld1.8		{d5}, [r4, : 64]
+++	vshl.i32	q8, q4, #4
+++	vtrn.32		d4, d5
+++	vadd.i32	q7, q7, q1
+++	vadd.i32	q8, q8, q4
+++	vld1.8		{d18-d19}, [r2, : 128]!
+++	vshl.i32	q10, q2, #4
+++	vld1.8		{d22-d23}, [r2, : 128]!
+++	vadd.i32	q10, q10, q2
+++	vld1.8		{d24}, [r2, : 64]
+++	vadd.i32	q5, q5, q0
+++	add		r2, r3, #288
+++	vld1.8		{d26-d27}, [r2, : 128]!
+++	vadd.i32	q6, q6, q3
+++	vld1.8		{d28-d29}, [r2, : 128]!
+++	vadd.i32	q8, q8, q4
+++	vld1.8		{d25}, [r2, : 64]
+++	vadd.i32	q10, q10, q2
+++	vtrn.32		q9, q13
+++	vadd.i32	q7, q7, q1
+++	vadd.i32	q5, q5, q0
+++	vtrn.32		q11, q14
+++	vadd.i32	q6, q6, q3
+++	add		r2, sp, #560
+++	vadd.i32	q10, q10, q2
+++	vtrn.32		d24, d25
+++	vst1.8		{d12-d13}, [r2, : 128]
+++	vshl.i32	q6, q13, #1
+++	add		r2, sp, #576
+++	vst1.8		{d20-d21}, [r2, : 128]
+++	vshl.i32	q10, q14, #1
+++	add		r2, sp, #592
+++	vst1.8		{d12-d13}, [r2, : 128]
+++	vshl.i32	q15, q12, #1
+++	vadd.i32	q8, q8, q4
+++	vext.32		d10, d31, d30, #0
+++	vadd.i32	q7, q7, q1
+++	add		r2, sp, #608
+++	vst1.8		{d16-d17}, [r2, : 128]
+++	vmull.s32	q8, d18, d5
+++	vmlal.s32	q8, d26, d4
+++	vmlal.s32	q8, d19, d9
+++	vmlal.s32	q8, d27, d3
+++	vmlal.s32	q8, d22, d8
+++	vmlal.s32	q8, d28, d2
+++	vmlal.s32	q8, d23, d7
+++	vmlal.s32	q8, d29, d1
+++	vmlal.s32	q8, d24, d6
+++	vmlal.s32	q8, d25, d0
+++	add		r2, sp, #624
+++	vst1.8		{d14-d15}, [r2, : 128]
+++	vmull.s32	q2, d18, d4
+++	vmlal.s32	q2, d12, d9
+++	vmlal.s32	q2, d13, d8
+++	vmlal.s32	q2, d19, d3
+++	vmlal.s32	q2, d22, d2
+++	vmlal.s32	q2, d23, d1
+++	vmlal.s32	q2, d24, d0
+++	add		r2, sp, #640
+++	vst1.8		{d20-d21}, [r2, : 128]
+++	vmull.s32	q7, d18, d9
+++	vmlal.s32	q7, d26, d3
+++	vmlal.s32	q7, d19, d8
+++	vmlal.s32	q7, d27, d2
+++	vmlal.s32	q7, d22, d7
+++	vmlal.s32	q7, d28, d1
+++	vmlal.s32	q7, d23, d6
+++	vmlal.s32	q7, d29, d0
+++	add		r2, sp, #656
+++	vst1.8		{d10-d11}, [r2, : 128]
+++	vmull.s32	q5, d18, d3
+++	vmlal.s32	q5, d19, d2
+++	vmlal.s32	q5, d22, d1
+++	vmlal.s32	q5, d23, d0
+++	vmlal.s32	q5, d12, d8
+++	add		r2, sp, #672
+++	vst1.8		{d16-d17}, [r2, : 128]
+++	vmull.s32	q4, d18, d8
+++	vmlal.s32	q4, d26, d2
+++	vmlal.s32	q4, d19, d7
+++	vmlal.s32	q4, d27, d1
+++	vmlal.s32	q4, d22, d6
+++	vmlal.s32	q4, d28, d0
+++	vmull.s32	q8, d18, d7
+++	vmlal.s32	q8, d26, d1
+++	vmlal.s32	q8, d19, d6
+++	vmlal.s32	q8, d27, d0
+++	add		r2, sp, #576
+++	vld1.8		{d20-d21}, [r2, : 128]
+++	vmlal.s32	q7, d24, d21
+++	vmlal.s32	q7, d25, d20
+++	vmlal.s32	q4, d23, d21
+++	vmlal.s32	q4, d29, d20
+++	vmlal.s32	q8, d22, d21
+++	vmlal.s32	q8, d28, d20
+++	vmlal.s32	q5, d24, d20
+++	add		r2, sp, #576
+++	vst1.8		{d14-d15}, [r2, : 128]
+++	vmull.s32	q7, d18, d6
+++	vmlal.s32	q7, d26, d0
+++	add		r2, sp, #656
+++	vld1.8		{d30-d31}, [r2, : 128]
+++	vmlal.s32	q2, d30, d21
+++	vmlal.s32	q7, d19, d21
+++	vmlal.s32	q7, d27, d20
+++	add		r2, sp, #624
+++	vld1.8		{d26-d27}, [r2, : 128]
+++	vmlal.s32	q4, d25, d27
+++	vmlal.s32	q8, d29, d27
+++	vmlal.s32	q8, d25, d26
+++	vmlal.s32	q7, d28, d27
+++	vmlal.s32	q7, d29, d26
+++	add		r2, sp, #608
+++	vld1.8		{d28-d29}, [r2, : 128]
+++	vmlal.s32	q4, d24, d29
+++	vmlal.s32	q8, d23, d29
+++	vmlal.s32	q8, d24, d28
+++	vmlal.s32	q7, d22, d29
+++	vmlal.s32	q7, d23, d28
+++	add		r2, sp, #608
+++	vst1.8		{d8-d9}, [r2, : 128]
+++	add		r2, sp, #560
+++	vld1.8		{d8-d9}, [r2, : 128]
+++	vmlal.s32	q7, d24, d9
+++	vmlal.s32	q7, d25, d31
+++	vmull.s32	q1, d18, d2
+++	vmlal.s32	q1, d19, d1
+++	vmlal.s32	q1, d22, d0
+++	vmlal.s32	q1, d24, d27
+++	vmlal.s32	q1, d23, d20
+++	vmlal.s32	q1, d12, d7
+++	vmlal.s32	q1, d13, d6
+++	vmull.s32	q6, d18, d1
+++	vmlal.s32	q6, d19, d0
+++	vmlal.s32	q6, d23, d27
+++	vmlal.s32	q6, d22, d20
+++	vmlal.s32	q6, d24, d26
+++	vmull.s32	q0, d18, d0
+++	vmlal.s32	q0, d22, d27
+++	vmlal.s32	q0, d23, d26
+++	vmlal.s32	q0, d24, d31
+++	vmlal.s32	q0, d19, d20
+++	add		r2, sp, #640
+++	vld1.8		{d18-d19}, [r2, : 128]
+++	vmlal.s32	q2, d18, d7
+++	vmlal.s32	q2, d19, d6
+++	vmlal.s32	q5, d18, d6
+++	vmlal.s32	q5, d19, d21
+++	vmlal.s32	q1, d18, d21
+++	vmlal.s32	q1, d19, d29
+++	vmlal.s32	q0, d18, d28
+++	vmlal.s32	q0, d19, d9
+++	vmlal.s32	q6, d18, d29
+++	vmlal.s32	q6, d19, d28
+++	add		r2, sp, #592
+++	vld1.8		{d18-d19}, [r2, : 128]
+++	add		r2, sp, #512
+++	vld1.8		{d22-d23}, [r2, : 128]
+++	vmlal.s32	q5, d19, d7
+++	vmlal.s32	q0, d18, d21
+++	vmlal.s32	q0, d19, d29
+++	vmlal.s32	q6, d18, d6
+++	add		r2, sp, #528
+++	vld1.8		{d6-d7}, [r2, : 128]
+++	vmlal.s32	q6, d19, d21
+++	add		r2, sp, #576
+++	vld1.8		{d18-d19}, [r2, : 128]
+++	vmlal.s32	q0, d30, d8
+++	add		r2, sp, #672
+++	vld1.8		{d20-d21}, [r2, : 128]
+++	vmlal.s32	q5, d30, d29
+++	add		r2, sp, #608
+++	vld1.8		{d24-d25}, [r2, : 128]
+++	vmlal.s32	q1, d30, d28
+++	vadd.i64	q13, q0, q11
+++	vadd.i64	q14, q5, q11
+++	vmlal.s32	q6, d30, d9
+++	vshr.s64	q4, q13, #26
+++	vshr.s64	q13, q14, #26
+++	vadd.i64	q7, q7, q4
+++	vshl.i64	q4, q4, #26
+++	vadd.i64	q14, q7, q3
+++	vadd.i64	q9, q9, q13
+++	vshl.i64	q13, q13, #26
+++	vadd.i64	q15, q9, q3
+++	vsub.i64	q0, q0, q4
+++	vshr.s64	q4, q14, #25
+++	vsub.i64	q5, q5, q13
+++	vshr.s64	q13, q15, #25
+++	vadd.i64	q6, q6, q4
+++	vshl.i64	q4, q4, #25
+++	vadd.i64	q14, q6, q11
+++	vadd.i64	q2, q2, q13
+++	vsub.i64	q4, q7, q4
+++	vshr.s64	q7, q14, #26
+++	vshl.i64	q13, q13, #25
+++	vadd.i64	q14, q2, q11
+++	vadd.i64	q8, q8, q7
+++	vshl.i64	q7, q7, #26
+++	vadd.i64	q15, q8, q3
+++	vsub.i64	q9, q9, q13
+++	vshr.s64	q13, q14, #26
+++	vsub.i64	q6, q6, q7
+++	vshr.s64	q7, q15, #25
+++	vadd.i64	q10, q10, q13
+++	vshl.i64	q13, q13, #26
+++	vadd.i64	q14, q10, q3
+++	vadd.i64	q1, q1, q7
+++	add		r2, r3, #288
+++	vshl.i64	q7, q7, #25
+++	add		r4, r3, #96
+++	vadd.i64	q15, q1, q11
+++	add		r2, r2, #8
+++	vsub.i64	q2, q2, q13
+++	add		r4, r4, #8
+++	vshr.s64	q13, q14, #25
+++	vsub.i64	q7, q8, q7
+++	vshr.s64	q8, q15, #26
+++	vadd.i64	q14, q13, q13
+++	vadd.i64	q12, q12, q8
+++	vtrn.32		d12, d14
+++	vshl.i64	q8, q8, #26
+++	vtrn.32		d13, d15
+++	vadd.i64	q3, q12, q3
+++	vadd.i64	q0, q0, q14
+++	vst1.8		d12, [r2, : 64]!
+++	vshl.i64	q7, q13, #4
+++	vst1.8		d13, [r4, : 64]!
+++	vsub.i64	q1, q1, q8
+++	vshr.s64	q3, q3, #25
+++	vadd.i64	q0, q0, q7
+++	vadd.i64	q5, q5, q3
+++	vshl.i64	q3, q3, #25
+++	vadd.i64	q6, q5, q11
+++	vadd.i64	q0, q0, q13
+++	vshl.i64	q7, q13, #25
+++	vadd.i64	q8, q0, q11
+++	vsub.i64	q3, q12, q3
+++	vshr.s64	q6, q6, #26
+++	vsub.i64	q7, q10, q7
+++	vtrn.32		d2, d6
+++	vshr.s64	q8, q8, #26
+++	vtrn.32		d3, d7
+++	vadd.i64	q3, q9, q6
+++	vst1.8		d2, [r2, : 64]
+++	vshl.i64	q6, q6, #26
+++	vst1.8		d3, [r4, : 64]
+++	vadd.i64	q1, q4, q8
+++	vtrn.32		d4, d14
+++	vshl.i64	q4, q8, #26
+++	vtrn.32		d5, d15
+++	vsub.i64	q5, q5, q6
+++	add		r2, r2, #16
+++	vsub.i64	q0, q0, q4
+++	vst1.8		d4, [r2, : 64]
+++	add		r4, r4, #16
+++	vst1.8		d5, [r4, : 64]
+++	vtrn.32		d10, d6
+++	vtrn.32		d11, d7
+++	sub		r2, r2, #8
+++	sub		r4, r4, #8
+++	vtrn.32		d0, d2
+++	vtrn.32		d1, d3
+++	vst1.8		d10, [r2, : 64]
+++	vst1.8		d11, [r4, : 64]
+++	sub		r2, r2, #24
+++	sub		r4, r4, #24
+++	vst1.8		d0, [r2, : 64]
+++	vst1.8		d1, [r4, : 64]
+++	add		r2, sp, #544
+++	add		r4, r3, #144
+++	add		r5, r3, #192
+++	vld1.8		{d0-d1}, [r2, : 128]
+++	vld1.8		{d2-d3}, [r4, : 128]!
+++	vld1.8		{d4-d5}, [r5, : 128]!
+++	vzip.i32	q1, q2
+++	vld1.8		{d6-d7}, [r4, : 128]!
+++	vld1.8		{d8-d9}, [r5, : 128]!
+++	vshl.i32	q5, q1, #1
+++	vzip.i32	q3, q4
+++	vshl.i32	q6, q2, #1
+++	vld1.8		{d14}, [r4, : 64]
+++	vshl.i32	q8, q3, #1
+++	vld1.8		{d15}, [r5, : 64]
+++	vshl.i32	q9, q4, #1
+++	vmul.i32	d21, d7, d1
+++	vtrn.32		d14, d15
+++	vmul.i32	q11, q4, q0
+++	vmul.i32	q0, q7, q0
+++	vmull.s32	q12, d2, d2
+++	vmlal.s32	q12, d11, d1
+++	vmlal.s32	q12, d12, d0
+++	vmlal.s32	q12, d13, d23
+++	vmlal.s32	q12, d16, d22
+++	vmlal.s32	q12, d7, d21
+++	vmull.s32	q10, d2, d11
+++	vmlal.s32	q10, d4, d1
+++	vmlal.s32	q10, d13, d0
+++	vmlal.s32	q10, d6, d23
+++	vmlal.s32	q10, d17, d22
+++	vmull.s32	q13, d10, d4
+++	vmlal.s32	q13, d11, d3
+++	vmlal.s32	q13, d13, d1
+++	vmlal.s32	q13, d16, d0
+++	vmlal.s32	q13, d17, d23
+++	vmlal.s32	q13, d8, d22
+++	vmull.s32	q1, d10, d5
+++	vmlal.s32	q1, d11, d4
+++	vmlal.s32	q1, d6, d1
+++	vmlal.s32	q1, d17, d0
+++	vmlal.s32	q1, d8, d23
+++	vmull.s32	q14, d10, d6
+++	vmlal.s32	q14, d11, d13
+++	vmlal.s32	q14, d4, d4
+++	vmlal.s32	q14, d17, d1
+++	vmlal.s32	q14, d18, d0
+++	vmlal.s32	q14, d9, d23
+++	vmull.s32	q11, d10, d7
+++	vmlal.s32	q11, d11, d6
+++	vmlal.s32	q11, d12, d5
+++	vmlal.s32	q11, d8, d1
+++	vmlal.s32	q11, d19, d0
+++	vmull.s32	q15, d10, d8
+++	vmlal.s32	q15, d11, d17
+++	vmlal.s32	q15, d12, d6
+++	vmlal.s32	q15, d13, d5
+++	vmlal.s32	q15, d19, d1
+++	vmlal.s32	q15, d14, d0
+++	vmull.s32	q2, d10, d9
+++	vmlal.s32	q2, d11, d8
+++	vmlal.s32	q2, d12, d7
+++	vmlal.s32	q2, d13, d6
+++	vmlal.s32	q2, d14, d1
+++	vmull.s32	q0, d15, d1
+++	vmlal.s32	q0, d10, d14
+++	vmlal.s32	q0, d11, d19
+++	vmlal.s32	q0, d12, d8
+++	vmlal.s32	q0, d13, d17
+++	vmlal.s32	q0, d6, d6
+++	add		r2, sp, #512
+++	vld1.8		{d18-d19}, [r2, : 128]
+++	vmull.s32	q3, d16, d7
+++	vmlal.s32	q3, d10, d15
+++	vmlal.s32	q3, d11, d14
+++	vmlal.s32	q3, d12, d9
+++	vmlal.s32	q3, d13, d8
+++	add		r2, sp, #528
+++	vld1.8		{d8-d9}, [r2, : 128]
+++	vadd.i64	q5, q12, q9
+++	vadd.i64	q6, q15, q9
+++	vshr.s64	q5, q5, #26
+++	vshr.s64	q6, q6, #26
+++	vadd.i64	q7, q10, q5
+++	vshl.i64	q5, q5, #26
+++	vadd.i64	q8, q7, q4
+++	vadd.i64	q2, q2, q6
+++	vshl.i64	q6, q6, #26
+++	vadd.i64	q10, q2, q4
+++	vsub.i64	q5, q12, q5
+++	vshr.s64	q8, q8, #25
+++	vsub.i64	q6, q15, q6
+++	vshr.s64	q10, q10, #25
+++	vadd.i64	q12, q13, q8
+++	vshl.i64	q8, q8, #25
+++	vadd.i64	q13, q12, q9
+++	vadd.i64	q0, q0, q10
+++	vsub.i64	q7, q7, q8
+++	vshr.s64	q8, q13, #26
+++	vshl.i64	q10, q10, #25
+++	vadd.i64	q13, q0, q9
+++	vadd.i64	q1, q1, q8
+++	vshl.i64	q8, q8, #26
+++	vadd.i64	q15, q1, q4
+++	vsub.i64	q2, q2, q10
+++	vshr.s64	q10, q13, #26
+++	vsub.i64	q8, q12, q8
+++	vshr.s64	q12, q15, #25
+++	vadd.i64	q3, q3, q10
+++	vshl.i64	q10, q10, #26
+++	vadd.i64	q13, q3, q4
+++	vadd.i64	q14, q14, q12
+++	add		r2, r3, #144
+++	vshl.i64	q12, q12, #25
+++	add		r4, r3, #192
+++	vadd.i64	q15, q14, q9
+++	add		r2, r2, #8
+++	vsub.i64	q0, q0, q10
+++	add		r4, r4, #8
+++	vshr.s64	q10, q13, #25
+++	vsub.i64	q1, q1, q12
+++	vshr.s64	q12, q15, #26
+++	vadd.i64	q13, q10, q10
+++	vadd.i64	q11, q11, q12
+++	vtrn.32		d16, d2
+++	vshl.i64	q12, q12, #26
+++	vtrn.32		d17, d3
+++	vadd.i64	q1, q11, q4
+++	vadd.i64	q4, q5, q13
+++	vst1.8		d16, [r2, : 64]!
+++	vshl.i64	q5, q10, #4
+++	vst1.8		d17, [r4, : 64]!
+++	vsub.i64	q8, q14, q12
+++	vshr.s64	q1, q1, #25
+++	vadd.i64	q4, q4, q5
+++	vadd.i64	q5, q6, q1
+++	vshl.i64	q1, q1, #25
+++	vadd.i64	q6, q5, q9
+++	vadd.i64	q4, q4, q10
+++	vshl.i64	q10, q10, #25
+++	vadd.i64	q9, q4, q9
+++	vsub.i64	q1, q11, q1
+++	vshr.s64	q6, q6, #26
+++	vsub.i64	q3, q3, q10
+++	vtrn.32		d16, d2
+++	vshr.s64	q9, q9, #26
+++	vtrn.32		d17, d3
+++	vadd.i64	q1, q2, q6
+++	vst1.8		d16, [r2, : 64]
+++	vshl.i64	q2, q6, #26
+++	vst1.8		d17, [r4, : 64]
+++	vadd.i64	q6, q7, q9
+++	vtrn.32		d0, d6
+++	vshl.i64	q7, q9, #26
+++	vtrn.32		d1, d7
+++	vsub.i64	q2, q5, q2
+++	add		r2, r2, #16
+++	vsub.i64	q3, q4, q7
+++	vst1.8		d0, [r2, : 64]
+++	add		r4, r4, #16
+++	vst1.8		d1, [r4, : 64]
+++	vtrn.32		d4, d2
+++	vtrn.32		d5, d3
+++	sub		r2, r2, #8
+++	sub		r4, r4, #8
+++	vtrn.32		d6, d12
+++	vtrn.32		d7, d13
+++	vst1.8		d4, [r2, : 64]
+++	vst1.8		d5, [r4, : 64]
+++	sub		r2, r2, #24
+++	sub		r4, r4, #24
+++	vst1.8		d6, [r2, : 64]
+++	vst1.8		d7, [r4, : 64]
+++	add		r2, r3, #336
+++	add		r4, r3, #288
+++	vld1.8		{d0-d1}, [r2, : 128]!
+++	vld1.8		{d2-d3}, [r4, : 128]!
+++	vadd.i32	q0, q0, q1
+++	vld1.8		{d2-d3}, [r2, : 128]!
+++	vld1.8		{d4-d5}, [r4, : 128]!
+++	vadd.i32	q1, q1, q2
+++	add		r5, r3, #288
+++	vld1.8		{d4}, [r2, : 64]
+++	vld1.8		{d6}, [r4, : 64]
+++	vadd.i32	q2, q2, q3
+++	vst1.8		{d0-d1}, [r5, : 128]!
+++	vst1.8		{d2-d3}, [r5, : 128]!
+++	vst1.8		d4, [r5, : 64]
+++	add		r2, r3, #48
+++	add		r4, r3, #144
+++	vld1.8		{d0-d1}, [r4, : 128]!
+++	vld1.8		{d2-d3}, [r4, : 128]!
+++	vld1.8		{d4}, [r4, : 64]
+++	add		r4, r3, #288
+++	vld1.8		{d6-d7}, [r4, : 128]!
+++	vtrn.32		q0, q3
+++	vld1.8		{d8-d9}, [r4, : 128]!
+++	vshl.i32	q5, q0, #4
+++	vtrn.32		q1, q4
+++	vshl.i32	q6, q3, #4
+++	vadd.i32	q5, q5, q0
+++	vadd.i32	q6, q6, q3
+++	vshl.i32	q7, q1, #4
+++	vld1.8		{d5}, [r4, : 64]
+++	vshl.i32	q8, q4, #4
+++	vtrn.32		d4, d5
+++	vadd.i32	q7, q7, q1
+++	vadd.i32	q8, q8, q4
+++	vld1.8		{d18-d19}, [r2, : 128]!
+++	vshl.i32	q10, q2, #4
+++	vld1.8		{d22-d23}, [r2, : 128]!
+++	vadd.i32	q10, q10, q2
+++	vld1.8		{d24}, [r2, : 64]
+++	vadd.i32	q5, q5, q0
+++	add		r2, r3, #240
+++	vld1.8		{d26-d27}, [r2, : 128]!
+++	vadd.i32	q6, q6, q3
+++	vld1.8		{d28-d29}, [r2, : 128]!
+++	vadd.i32	q8, q8, q4
+++	vld1.8		{d25}, [r2, : 64]
+++	vadd.i32	q10, q10, q2
+++	vtrn.32		q9, q13
+++	vadd.i32	q7, q7, q1
+++	vadd.i32	q5, q5, q0
+++	vtrn.32		q11, q14
+++	vadd.i32	q6, q6, q3
+++	add		r2, sp, #560
+++	vadd.i32	q10, q10, q2
+++	vtrn.32		d24, d25
+++	vst1.8		{d12-d13}, [r2, : 128]
+++	vshl.i32	q6, q13, #1
+++	add		r2, sp, #576
+++	vst1.8		{d20-d21}, [r2, : 128]
+++	vshl.i32	q10, q14, #1
+++	add		r2, sp, #592
+++	vst1.8		{d12-d13}, [r2, : 128]
+++	vshl.i32	q15, q12, #1
+++	vadd.i32	q8, q8, q4
+++	vext.32		d10, d31, d30, #0
+++	vadd.i32	q7, q7, q1
+++	add		r2, sp, #608
+++	vst1.8		{d16-d17}, [r2, : 128]
+++	vmull.s32	q8, d18, d5
+++	vmlal.s32	q8, d26, d4
+++	vmlal.s32	q8, d19, d9
+++	vmlal.s32	q8, d27, d3
+++	vmlal.s32	q8, d22, d8
+++	vmlal.s32	q8, d28, d2
+++	vmlal.s32	q8, d23, d7
+++	vmlal.s32	q8, d29, d1
+++	vmlal.s32	q8, d24, d6
+++	vmlal.s32	q8, d25, d0
+++	add		r2, sp, #624
+++	vst1.8		{d14-d15}, [r2, : 128]
+++	vmull.s32	q2, d18, d4
+++	vmlal.s32	q2, d12, d9
+++	vmlal.s32	q2, d13, d8
+++	vmlal.s32	q2, d19, d3
+++	vmlal.s32	q2, d22, d2
+++	vmlal.s32	q2, d23, d1
+++	vmlal.s32	q2, d24, d0
+++	add		r2, sp, #640
+++	vst1.8		{d20-d21}, [r2, : 128]
+++	vmull.s32	q7, d18, d9
+++	vmlal.s32	q7, d26, d3
+++	vmlal.s32	q7, d19, d8
+++	vmlal.s32	q7, d27, d2
+++	vmlal.s32	q7, d22, d7
+++	vmlal.s32	q7, d28, d1
+++	vmlal.s32	q7, d23, d6
+++	vmlal.s32	q7, d29, d0
+++	add		r2, sp, #656
+++	vst1.8		{d10-d11}, [r2, : 128]
+++	vmull.s32	q5, d18, d3
+++	vmlal.s32	q5, d19, d2
+++	vmlal.s32	q5, d22, d1
+++	vmlal.s32	q5, d23, d0
+++	vmlal.s32	q5, d12, d8
+++	add		r2, sp, #672
+++	vst1.8		{d16-d17}, [r2, : 128]
+++	vmull.s32	q4, d18, d8
+++	vmlal.s32	q4, d26, d2
+++	vmlal.s32	q4, d19, d7
+++	vmlal.s32	q4, d27, d1
+++	vmlal.s32	q4, d22, d6
+++	vmlal.s32	q4, d28, d0
+++	vmull.s32	q8, d18, d7
+++	vmlal.s32	q8, d26, d1
+++	vmlal.s32	q8, d19, d6
+++	vmlal.s32	q8, d27, d0
+++	add		r2, sp, #576
+++	vld1.8		{d20-d21}, [r2, : 128]
+++	vmlal.s32	q7, d24, d21
+++	vmlal.s32	q7, d25, d20
+++	vmlal.s32	q4, d23, d21
+++	vmlal.s32	q4, d29, d20
+++	vmlal.s32	q8, d22, d21
+++	vmlal.s32	q8, d28, d20
+++	vmlal.s32	q5, d24, d20
+++	add		r2, sp, #576
+++	vst1.8		{d14-d15}, [r2, : 128]
+++	vmull.s32	q7, d18, d6
+++	vmlal.s32	q7, d26, d0
+++	add		r2, sp, #656
+++	vld1.8		{d30-d31}, [r2, : 128]
+++	vmlal.s32	q2, d30, d21
+++	vmlal.s32	q7, d19, d21
+++	vmlal.s32	q7, d27, d20
+++	add		r2, sp, #624
+++	vld1.8		{d26-d27}, [r2, : 128]
+++	vmlal.s32	q4, d25, d27
+++	vmlal.s32	q8, d29, d27
+++	vmlal.s32	q8, d25, d26
+++	vmlal.s32	q7, d28, d27
+++	vmlal.s32	q7, d29, d26
+++	add		r2, sp, #608
+++	vld1.8		{d28-d29}, [r2, : 128]
+++	vmlal.s32	q4, d24, d29
+++	vmlal.s32	q8, d23, d29
+++	vmlal.s32	q8, d24, d28
+++	vmlal.s32	q7, d22, d29
+++	vmlal.s32	q7, d23, d28
+++	add		r2, sp, #608
+++	vst1.8		{d8-d9}, [r2, : 128]
+++	add		r2, sp, #560
+++	vld1.8		{d8-d9}, [r2, : 128]
+++	vmlal.s32	q7, d24, d9
+++	vmlal.s32	q7, d25, d31
+++	vmull.s32	q1, d18, d2
+++	vmlal.s32	q1, d19, d1
+++	vmlal.s32	q1, d22, d0
+++	vmlal.s32	q1, d24, d27
+++	vmlal.s32	q1, d23, d20
+++	vmlal.s32	q1, d12, d7
+++	vmlal.s32	q1, d13, d6
+++	vmull.s32	q6, d18, d1
+++	vmlal.s32	q6, d19, d0
+++	vmlal.s32	q6, d23, d27
+++	vmlal.s32	q6, d22, d20
+++	vmlal.s32	q6, d24, d26
+++	vmull.s32	q0, d18, d0
+++	vmlal.s32	q0, d22, d27
+++	vmlal.s32	q0, d23, d26
+++	vmlal.s32	q0, d24, d31
+++	vmlal.s32	q0, d19, d20
+++	add		r2, sp, #640
+++	vld1.8		{d18-d19}, [r2, : 128]
+++	vmlal.s32	q2, d18, d7
+++	vmlal.s32	q2, d19, d6
+++	vmlal.s32	q5, d18, d6
+++	vmlal.s32	q5, d19, d21
+++	vmlal.s32	q1, d18, d21
+++	vmlal.s32	q1, d19, d29
+++	vmlal.s32	q0, d18, d28
+++	vmlal.s32	q0, d19, d9
+++	vmlal.s32	q6, d18, d29
+++	vmlal.s32	q6, d19, d28
+++	add		r2, sp, #592
+++	vld1.8		{d18-d19}, [r2, : 128]
+++	add		r2, sp, #512
+++	vld1.8		{d22-d23}, [r2, : 128]
+++	vmlal.s32	q5, d19, d7
+++	vmlal.s32	q0, d18, d21
+++	vmlal.s32	q0, d19, d29
+++	vmlal.s32	q6, d18, d6
+++	add		r2, sp, #528
+++	vld1.8		{d6-d7}, [r2, : 128]
+++	vmlal.s32	q6, d19, d21
+++	add		r2, sp, #576
+++	vld1.8		{d18-d19}, [r2, : 128]
+++	vmlal.s32	q0, d30, d8
+++	add		r2, sp, #672
+++	vld1.8		{d20-d21}, [r2, : 128]
+++	vmlal.s32	q5, d30, d29
+++	add		r2, sp, #608
+++	vld1.8		{d24-d25}, [r2, : 128]
+++	vmlal.s32	q1, d30, d28
+++	vadd.i64	q13, q0, q11
+++	vadd.i64	q14, q5, q11
+++	vmlal.s32	q6, d30, d9
+++	vshr.s64	q4, q13, #26
+++	vshr.s64	q13, q14, #26
+++	vadd.i64	q7, q7, q4
+++	vshl.i64	q4, q4, #26
+++	vadd.i64	q14, q7, q3
+++	vadd.i64	q9, q9, q13
+++	vshl.i64	q13, q13, #26
+++	vadd.i64	q15, q9, q3
+++	vsub.i64	q0, q0, q4
+++	vshr.s64	q4, q14, #25
+++	vsub.i64	q5, q5, q13
+++	vshr.s64	q13, q15, #25
+++	vadd.i64	q6, q6, q4
+++	vshl.i64	q4, q4, #25
+++	vadd.i64	q14, q6, q11
+++	vadd.i64	q2, q2, q13
+++	vsub.i64	q4, q7, q4
+++	vshr.s64	q7, q14, #26
+++	vshl.i64	q13, q13, #25
+++	vadd.i64	q14, q2, q11
+++	vadd.i64	q8, q8, q7
+++	vshl.i64	q7, q7, #26
+++	vadd.i64	q15, q8, q3
+++	vsub.i64	q9, q9, q13
+++	vshr.s64	q13, q14, #26
+++	vsub.i64	q6, q6, q7
+++	vshr.s64	q7, q15, #25
+++	vadd.i64	q10, q10, q13
+++	vshl.i64	q13, q13, #26
+++	vadd.i64	q14, q10, q3
+++	vadd.i64	q1, q1, q7
+++	add		r2, r3, #240
+++	vshl.i64	q7, q7, #25
+++	add		r4, r3, #144
+++	vadd.i64	q15, q1, q11
+++	add		r2, r2, #8
+++	vsub.i64	q2, q2, q13
+++	add		r4, r4, #8
+++	vshr.s64	q13, q14, #25
+++	vsub.i64	q7, q8, q7
+++	vshr.s64	q8, q15, #26
+++	vadd.i64	q14, q13, q13
+++	vadd.i64	q12, q12, q8
+++	vtrn.32		d12, d14
+++	vshl.i64	q8, q8, #26
+++	vtrn.32		d13, d15
+++	vadd.i64	q3, q12, q3
+++	vadd.i64	q0, q0, q14
+++	vst1.8		d12, [r2, : 64]!
+++	vshl.i64	q7, q13, #4
+++	vst1.8		d13, [r4, : 64]!
+++	vsub.i64	q1, q1, q8
+++	vshr.s64	q3, q3, #25
+++	vadd.i64	q0, q0, q7
+++	vadd.i64	q5, q5, q3
+++	vshl.i64	q3, q3, #25
+++	vadd.i64	q6, q5, q11
+++	vadd.i64	q0, q0, q13
+++	vshl.i64	q7, q13, #25
+++	vadd.i64	q8, q0, q11
+++	vsub.i64	q3, q12, q3
+++	vshr.s64	q6, q6, #26
+++	vsub.i64	q7, q10, q7
+++	vtrn.32		d2, d6
+++	vshr.s64	q8, q8, #26
+++	vtrn.32		d3, d7
+++	vadd.i64	q3, q9, q6
+++	vst1.8		d2, [r2, : 64]
+++	vshl.i64	q6, q6, #26
+++	vst1.8		d3, [r4, : 64]
+++	vadd.i64	q1, q4, q8
+++	vtrn.32		d4, d14
+++	vshl.i64	q4, q8, #26
+++	vtrn.32		d5, d15
+++	vsub.i64	q5, q5, q6
+++	add		r2, r2, #16
+++	vsub.i64	q0, q0, q4
+++	vst1.8		d4, [r2, : 64]
+++	add		r4, r4, #16
+++	vst1.8		d5, [r4, : 64]
+++	vtrn.32		d10, d6
+++	vtrn.32		d11, d7
+++	sub		r2, r2, #8
+++	sub		r4, r4, #8
+++	vtrn.32		d0, d2
+++	vtrn.32		d1, d3
+++	vst1.8		d10, [r2, : 64]
+++	vst1.8		d11, [r4, : 64]
+++	sub		r2, r2, #24
+++	sub		r4, r4, #24
+++	vst1.8		d0, [r2, : 64]
+++	vst1.8		d1, [r4, : 64]
+++	ldr		r2, [sp, #488]
+++	ldr		r4, [sp, #492]
+++	subs		r5, r2, #1
+++	bge		._mainloop
+++	add		r1, r3, #144
+++	add		r2, r3, #336
+++	vld1.8		{d0-d1}, [r1, : 128]!
+++	vld1.8		{d2-d3}, [r1, : 128]!
+++	vld1.8		{d4}, [r1, : 64]
+++	vst1.8		{d0-d1}, [r2, : 128]!
+++	vst1.8		{d2-d3}, [r2, : 128]!
+++	vst1.8		d4, [r2, : 64]
+++	ldr		r1, =0
+++._invertloop:
+++	add		r2, r3, #144
+++	ldr		r4, =0
+++	ldr		r5, =2
+++	cmp		r1, #1
+++	ldreq		r5, =1
+++	addeq		r2, r3, #336
+++	addeq		r4, r3, #48
+++	cmp		r1, #2
+++	ldreq		r5, =1
+++	addeq		r2, r3, #48
+++	cmp		r1, #3
+++	ldreq		r5, =5
+++	addeq		r4, r3, #336
+++	cmp		r1, #4
+++	ldreq		r5, =10
+++	cmp		r1, #5
+++	ldreq		r5, =20
+++	cmp		r1, #6
+++	ldreq		r5, =10
+++	addeq		r2, r3, #336
+++	addeq		r4, r3, #336
+++	cmp		r1, #7
+++	ldreq		r5, =50
+++	cmp		r1, #8
+++	ldreq		r5, =100
+++	cmp		r1, #9
+++	ldreq		r5, =50
+++	addeq		r2, r3, #336
+++	cmp		r1, #10
+++	ldreq		r5, =5
+++	addeq		r2, r3, #48
+++	cmp		r1, #11
+++	ldreq		r5, =0
+++	addeq		r2, r3, #96
+++	add		r6, r3, #144
+++	add		r7, r3, #288
+++	vld1.8		{d0-d1}, [r6, : 128]!
+++	vld1.8		{d2-d3}, [r6, : 128]!
+++	vld1.8		{d4}, [r6, : 64]
+++	vst1.8		{d0-d1}, [r7, : 128]!
+++	vst1.8		{d2-d3}, [r7, : 128]!
+++	vst1.8		d4, [r7, : 64]
+++	cmp		r5, #0
+++	beq		._skipsquaringloop
+++._squaringloop:
+++	add		r6, r3, #288
+++	add		r7, r3, #288
+++	add		r8, r3, #288
+++	vmov.i32	q0, #19
+++	vmov.i32	q1, #0
+++	vmov.i32	q2, #1
+++	vzip.i32	q1, q2
+++	vld1.8		{d4-d5}, [r7, : 128]!
+++	vld1.8		{d6-d7}, [r7, : 128]!
+++	vld1.8		{d9}, [r7, : 64]
+++	vld1.8		{d10-d11}, [r6, : 128]!
+++	add		r7, sp, #416
+++	vld1.8		{d12-d13}, [r6, : 128]!
+++	vmul.i32	q7, q2, q0
+++	vld1.8		{d8}, [r6, : 64]
+++	vext.32		d17, d11, d10, #1
+++	vmul.i32	q9, q3, q0
+++	vext.32		d16, d10, d8, #1
+++	vshl.u32	q10, q5, q1
+++	vext.32		d22, d14, d4, #1
+++	vext.32		d24, d18, d6, #1
+++	vshl.u32	q13, q6, q1
+++	vshl.u32	d28, d8, d2
+++	vrev64.i32	d22, d22
+++	vmul.i32	d1, d9, d1
+++	vrev64.i32	d24, d24
+++	vext.32		d29, d8, d13, #1
+++	vext.32		d0, d1, d9, #1
+++	vrev64.i32	d0, d0
+++	vext.32		d2, d9, d1, #1
+++	vext.32		d23, d15, d5, #1
+++	vmull.s32	q4, d20, d4
+++	vrev64.i32	d23, d23
+++	vmlal.s32	q4, d21, d1
+++	vrev64.i32	d2, d2
+++	vmlal.s32	q4, d26, d19
+++	vext.32		d3, d5, d15, #1
+++	vmlal.s32	q4, d27, d18
+++	vrev64.i32	d3, d3
+++	vmlal.s32	q4, d28, d15
+++	vext.32		d14, d12, d11, #1
+++	vmull.s32	q5, d16, d23
+++	vext.32		d15, d13, d12, #1
+++	vmlal.s32	q5, d17, d4
+++	vst1.8		d8, [r7, : 64]!
+++	vmlal.s32	q5, d14, d1
+++	vext.32		d12, d9, d8, #0
+++	vmlal.s32	q5, d15, d19
+++	vmov.i64	d13, #0
+++	vmlal.s32	q5, d29, d18
+++	vext.32		d25, d19, d7, #1
+++	vmlal.s32	q6, d20, d5
+++	vrev64.i32	d25, d25
+++	vmlal.s32	q6, d21, d4
+++	vst1.8		d11, [r7, : 64]!
+++	vmlal.s32	q6, d26, d1
+++	vext.32		d9, d10, d10, #0
+++	vmlal.s32	q6, d27, d19
+++	vmov.i64	d8, #0
+++	vmlal.s32	q6, d28, d18
+++	vmlal.s32	q4, d16, d24
+++	vmlal.s32	q4, d17, d5
+++	vmlal.s32	q4, d14, d4
+++	vst1.8		d12, [r7, : 64]!
+++	vmlal.s32	q4, d15, d1
+++	vext.32		d10, d13, d12, #0
+++	vmlal.s32	q4, d29, d19
+++	vmov.i64	d11, #0
+++	vmlal.s32	q5, d20, d6
+++	vmlal.s32	q5, d21, d5
+++	vmlal.s32	q5, d26, d4
+++	vext.32		d13, d8, d8, #0
+++	vmlal.s32	q5, d27, d1
+++	vmov.i64	d12, #0
+++	vmlal.s32	q5, d28, d19
+++	vst1.8		d9, [r7, : 64]!
+++	vmlal.s32	q6, d16, d25
+++	vmlal.s32	q6, d17, d6
+++	vst1.8		d10, [r7, : 64]
+++	vmlal.s32	q6, d14, d5
+++	vext.32		d8, d11, d10, #0
+++	vmlal.s32	q6, d15, d4
+++	vmov.i64	d9, #0
+++	vmlal.s32	q6, d29, d1
+++	vmlal.s32	q4, d20, d7
+++	vmlal.s32	q4, d21, d6
+++	vmlal.s32	q4, d26, d5
+++	vext.32		d11, d12, d12, #0
+++	vmlal.s32	q4, d27, d4
+++	vmov.i64	d10, #0
+++	vmlal.s32	q4, d28, d1
+++	vmlal.s32	q5, d16, d0
+++	sub		r6, r7, #32
+++	vmlal.s32	q5, d17, d7
+++	vmlal.s32	q5, d14, d6
+++	vext.32		d30, d9, d8, #0
+++	vmlal.s32	q5, d15, d5
+++	vld1.8		{d31}, [r6, : 64]!
+++	vmlal.s32	q5, d29, d4
+++	vmlal.s32	q15, d20, d0
+++	vext.32		d0, d6, d18, #1
+++	vmlal.s32	q15, d21, d25
+++	vrev64.i32	d0, d0
+++	vmlal.s32	q15, d26, d24
+++	vext.32		d1, d7, d19, #1
+++	vext.32		d7, d10, d10, #0
+++	vmlal.s32	q15, d27, d23
+++	vrev64.i32	d1, d1
+++	vld1.8		{d6}, [r6, : 64]
+++	vmlal.s32	q15, d28, d22
+++	vmlal.s32	q3, d16, d4
+++	add		r6, r6, #24
+++	vmlal.s32	q3, d17, d2
+++	vext.32		d4, d31, d30, #0
+++	vmov		d17, d11
+++	vmlal.s32	q3, d14, d1
+++	vext.32		d11, d13, d13, #0
+++	vext.32		d13, d30, d30, #0
+++	vmlal.s32	q3, d15, d0
+++	vext.32		d1, d8, d8, #0
+++	vmlal.s32	q3, d29, d3
+++	vld1.8		{d5}, [r6, : 64]
+++	sub		r6, r6, #16
+++	vext.32		d10, d6, d6, #0
+++	vmov.i32	q1, #0xffffffff
+++	vshl.i64	q4, q1, #25
+++	add		r7, sp, #512
+++	vld1.8		{d14-d15}, [r7, : 128]
+++	vadd.i64	q9, q2, q7
+++	vshl.i64	q1, q1, #26
+++	vshr.s64	q10, q9, #26
+++	vld1.8		{d0}, [r6, : 64]!
+++	vadd.i64	q5, q5, q10
+++	vand		q9, q9, q1
+++	vld1.8		{d16}, [r6, : 64]!
+++	add		r6, sp, #528
+++	vld1.8		{d20-d21}, [r6, : 128]
+++	vadd.i64	q11, q5, q10
+++	vsub.i64	q2, q2, q9
+++	vshr.s64	q9, q11, #25
+++	vext.32		d12, d5, d4, #0
+++	vand		q11, q11, q4
+++	vadd.i64	q0, q0, q9
+++	vmov		d19, d7
+++	vadd.i64	q3, q0, q7
+++	vsub.i64	q5, q5, q11
+++	vshr.s64	q11, q3, #26
+++	vext.32		d18, d11, d10, #0
+++	vand		q3, q3, q1
+++	vadd.i64	q8, q8, q11
+++	vadd.i64	q11, q8, q10
+++	vsub.i64	q0, q0, q3
+++	vshr.s64	q3, q11, #25
+++	vand		q11, q11, q4
+++	vadd.i64	q3, q6, q3
+++	vadd.i64	q6, q3, q7
+++	vsub.i64	q8, q8, q11
+++	vshr.s64	q11, q6, #26
+++	vand		q6, q6, q1
+++	vadd.i64	q9, q9, q11
+++	vadd.i64	d25, d19, d21
+++	vsub.i64	q3, q3, q6
+++	vshr.s64	d23, d25, #25
+++	vand		q4, q12, q4
+++	vadd.i64	d21, d23, d23
+++	vshl.i64	d25, d23, #4
+++	vadd.i64	d21, d21, d23
+++	vadd.i64	d25, d25, d21
+++	vadd.i64	d4, d4, d25
+++	vzip.i32	q0, q8
+++	vadd.i64	d12, d4, d14
+++	add		r6, r8, #8
+++	vst1.8		d0, [r6, : 64]
+++	vsub.i64	d19, d19, d9
+++	add		r6, r6, #16
+++	vst1.8		d16, [r6, : 64]
+++	vshr.s64	d22, d12, #26
+++	vand		q0, q6, q1
+++	vadd.i64	d10, d10, d22
+++	vzip.i32	q3, q9
+++	vsub.i64	d4, d4, d0
+++	sub		r6, r6, #8
+++	vst1.8		d6, [r6, : 64]
+++	add		r6, r6, #16
+++	vst1.8		d18, [r6, : 64]
+++	vzip.i32	q2, q5
+++	sub		r6, r6, #32
+++	vst1.8		d4, [r6, : 64]
+++	subs		r5, r5, #1
+++	bhi		._squaringloop
+++._skipsquaringloop:
+++	mov		r2, r2
+++	add		r5, r3, #288
+++	add		r6, r3, #144
+++	vmov.i32	q0, #19
+++	vmov.i32	q1, #0
+++	vmov.i32	q2, #1
+++	vzip.i32	q1, q2
+++	vld1.8		{d4-d5}, [r5, : 128]!
+++	vld1.8		{d6-d7}, [r5, : 128]!
+++	vld1.8		{d9}, [r5, : 64]
+++	vld1.8		{d10-d11}, [r2, : 128]!
+++	add		r5, sp, #416
+++	vld1.8		{d12-d13}, [r2, : 128]!
+++	vmul.i32	q7, q2, q0
+++	vld1.8		{d8}, [r2, : 64]
+++	vext.32		d17, d11, d10, #1
+++	vmul.i32	q9, q3, q0
+++	vext.32		d16, d10, d8, #1
+++	vshl.u32	q10, q5, q1
+++	vext.32		d22, d14, d4, #1
+++	vext.32		d24, d18, d6, #1
+++	vshl.u32	q13, q6, q1
+++	vshl.u32	d28, d8, d2
+++	vrev64.i32	d22, d22
+++	vmul.i32	d1, d9, d1
+++	vrev64.i32	d24, d24
+++	vext.32		d29, d8, d13, #1
+++	vext.32		d0, d1, d9, #1
+++	vrev64.i32	d0, d0
+++	vext.32		d2, d9, d1, #1
+++	vext.32		d23, d15, d5, #1
+++	vmull.s32	q4, d20, d4
+++	vrev64.i32	d23, d23
+++	vmlal.s32	q4, d21, d1
+++	vrev64.i32	d2, d2
+++	vmlal.s32	q4, d26, d19
+++	vext.32		d3, d5, d15, #1
+++	vmlal.s32	q4, d27, d18
+++	vrev64.i32	d3, d3
+++	vmlal.s32	q4, d28, d15
+++	vext.32		d14, d12, d11, #1
+++	vmull.s32	q5, d16, d23
+++	vext.32		d15, d13, d12, #1
+++	vmlal.s32	q5, d17, d4
+++	vst1.8		d8, [r5, : 64]!
+++	vmlal.s32	q5, d14, d1
+++	vext.32		d12, d9, d8, #0
+++	vmlal.s32	q5, d15, d19
+++	vmov.i64	d13, #0
+++	vmlal.s32	q5, d29, d18
+++	vext.32		d25, d19, d7, #1
+++	vmlal.s32	q6, d20, d5
+++	vrev64.i32	d25, d25
+++	vmlal.s32	q6, d21, d4
+++	vst1.8		d11, [r5, : 64]!
+++	vmlal.s32	q6, d26, d1
+++	vext.32		d9, d10, d10, #0
+++	vmlal.s32	q6, d27, d19
+++	vmov.i64	d8, #0
+++	vmlal.s32	q6, d28, d18
+++	vmlal.s32	q4, d16, d24
+++	vmlal.s32	q4, d17, d5
+++	vmlal.s32	q4, d14, d4
+++	vst1.8		d12, [r5, : 64]!
+++	vmlal.s32	q4, d15, d1
+++	vext.32		d10, d13, d12, #0
+++	vmlal.s32	q4, d29, d19
+++	vmov.i64	d11, #0
+++	vmlal.s32	q5, d20, d6
+++	vmlal.s32	q5, d21, d5
+++	vmlal.s32	q5, d26, d4
+++	vext.32		d13, d8, d8, #0
+++	vmlal.s32	q5, d27, d1
+++	vmov.i64	d12, #0
+++	vmlal.s32	q5, d28, d19
+++	vst1.8		d9, [r5, : 64]!
+++	vmlal.s32	q6, d16, d25
+++	vmlal.s32	q6, d17, d6
+++	vst1.8		d10, [r5, : 64]
+++	vmlal.s32	q6, d14, d5
+++	vext.32		d8, d11, d10, #0
+++	vmlal.s32	q6, d15, d4
+++	vmov.i64	d9, #0
+++	vmlal.s32	q6, d29, d1
+++	vmlal.s32	q4, d20, d7
+++	vmlal.s32	q4, d21, d6
+++	vmlal.s32	q4, d26, d5
+++	vext.32		d11, d12, d12, #0
+++	vmlal.s32	q4, d27, d4
+++	vmov.i64	d10, #0
+++	vmlal.s32	q4, d28, d1
+++	vmlal.s32	q5, d16, d0
+++	sub		r2, r5, #32
+++	vmlal.s32	q5, d17, d7
+++	vmlal.s32	q5, d14, d6
+++	vext.32		d30, d9, d8, #0
+++	vmlal.s32	q5, d15, d5
+++	vld1.8		{d31}, [r2, : 64]!
+++	vmlal.s32	q5, d29, d4
+++	vmlal.s32	q15, d20, d0
+++	vext.32		d0, d6, d18, #1
+++	vmlal.s32	q15, d21, d25
+++	vrev64.i32	d0, d0
+++	vmlal.s32	q15, d26, d24
+++	vext.32		d1, d7, d19, #1
+++	vext.32		d7, d10, d10, #0
+++	vmlal.s32	q15, d27, d23
+++	vrev64.i32	d1, d1
+++	vld1.8		{d6}, [r2, : 64]
+++	vmlal.s32	q15, d28, d22
+++	vmlal.s32	q3, d16, d4
+++	add		r2, r2, #24
+++	vmlal.s32	q3, d17, d2
+++	vext.32		d4, d31, d30, #0
+++	vmov		d17, d11
+++	vmlal.s32	q3, d14, d1
+++	vext.32		d11, d13, d13, #0
+++	vext.32		d13, d30, d30, #0
+++	vmlal.s32	q3, d15, d0
+++	vext.32		d1, d8, d8, #0
+++	vmlal.s32	q3, d29, d3
+++	vld1.8		{d5}, [r2, : 64]
+++	sub		r2, r2, #16
+++	vext.32		d10, d6, d6, #0
+++	vmov.i32	q1, #0xffffffff
+++	vshl.i64	q4, q1, #25
+++	add		r5, sp, #512
+++	vld1.8		{d14-d15}, [r5, : 128]
+++	vadd.i64	q9, q2, q7
+++	vshl.i64	q1, q1, #26
+++	vshr.s64	q10, q9, #26
+++	vld1.8		{d0}, [r2, : 64]!
+++	vadd.i64	q5, q5, q10
+++	vand		q9, q9, q1
+++	vld1.8		{d16}, [r2, : 64]!
+++	add		r2, sp, #528
+++	vld1.8		{d20-d21}, [r2, : 128]
+++	vadd.i64	q11, q5, q10
+++	vsub.i64	q2, q2, q9
+++	vshr.s64	q9, q11, #25
+++	vext.32		d12, d5, d4, #0
+++	vand		q11, q11, q4
+++	vadd.i64	q0, q0, q9
+++	vmov		d19, d7
+++	vadd.i64	q3, q0, q7
+++	vsub.i64	q5, q5, q11
+++	vshr.s64	q11, q3, #26
+++	vext.32		d18, d11, d10, #0
+++	vand		q3, q3, q1
+++	vadd.i64	q8, q8, q11
+++	vadd.i64	q11, q8, q10
+++	vsub.i64	q0, q0, q3
+++	vshr.s64	q3, q11, #25
+++	vand		q11, q11, q4
+++	vadd.i64	q3, q6, q3
+++	vadd.i64	q6, q3, q7
+++	vsub.i64	q8, q8, q11
+++	vshr.s64	q11, q6, #26
+++	vand		q6, q6, q1
+++	vadd.i64	q9, q9, q11
+++	vadd.i64	d25, d19, d21
+++	vsub.i64	q3, q3, q6
+++	vshr.s64	d23, d25, #25
+++	vand		q4, q12, q4
+++	vadd.i64	d21, d23, d23
+++	vshl.i64	d25, d23, #4
+++	vadd.i64	d21, d21, d23
+++	vadd.i64	d25, d25, d21
+++	vadd.i64	d4, d4, d25
+++	vzip.i32	q0, q8
+++	vadd.i64	d12, d4, d14
+++	add		r2, r6, #8
+++	vst1.8		d0, [r2, : 64]
+++	vsub.i64	d19, d19, d9
+++	add		r2, r2, #16
+++	vst1.8		d16, [r2, : 64]
+++	vshr.s64	d22, d12, #26
+++	vand		q0, q6, q1
+++	vadd.i64	d10, d10, d22
+++	vzip.i32	q3, q9
+++	vsub.i64	d4, d4, d0
+++	sub		r2, r2, #8
+++	vst1.8		d6, [r2, : 64]
+++	add		r2, r2, #16
+++	vst1.8		d18, [r2, : 64]
+++	vzip.i32	q2, q5
+++	sub		r2, r2, #32
+++	vst1.8		d4, [r2, : 64]
+++	cmp		r4, #0
+++	beq		._skippostcopy
+++	add		r2, r3, #144
+++	mov		r4, r4
+++	vld1.8		{d0-d1}, [r2, : 128]!
+++	vld1.8		{d2-d3}, [r2, : 128]!
+++	vld1.8		{d4}, [r2, : 64]
+++	vst1.8		{d0-d1}, [r4, : 128]!
+++	vst1.8		{d2-d3}, [r4, : 128]!
+++	vst1.8		d4, [r4, : 64]
+++._skippostcopy:
+++	cmp		r1, #1
+++	bne		._skipfinalcopy
+++	add		r2, r3, #288
+++	add		r4, r3, #144
+++	vld1.8		{d0-d1}, [r2, : 128]!
+++	vld1.8		{d2-d3}, [r2, : 128]!
+++	vld1.8		{d4}, [r2, : 64]
+++	vst1.8		{d0-d1}, [r4, : 128]!
+++	vst1.8		{d2-d3}, [r4, : 128]!
+++	vst1.8		d4, [r4, : 64]
+++._skipfinalcopy:
+++	add		r1, r1, #1
+++	cmp		r1, #12
+++	blo		._invertloop
+++	add		r1, r3, #144
+++	ldr		r2, [r1], #4
+++	ldr		r3, [r1], #4
+++	ldr		r4, [r1], #4
+++	ldr		r5, [r1], #4
+++	ldr		r6, [r1], #4
+++	ldr		r7, [r1], #4
+++	ldr		r8, [r1], #4
+++	ldr		r9, [r1], #4
+++	ldr		r10, [r1], #4
+++	ldr		r1, [r1]
+++	add		r11, r1, r1, LSL #4
+++	add		r11, r11, r1, LSL #1
+++	add		r11, r11, #16777216
+++	mov		r11, r11, ASR #25
+++	add		r11, r11, r2
+++	mov		r11, r11, ASR #26
+++	add		r11, r11, r3
+++	mov		r11, r11, ASR #25
+++	add		r11, r11, r4
+++	mov		r11, r11, ASR #26
+++	add		r11, r11, r5
+++	mov		r11, r11, ASR #25
+++	add		r11, r11, r6
+++	mov		r11, r11, ASR #26
+++	add		r11, r11, r7
+++	mov		r11, r11, ASR #25
+++	add		r11, r11, r8
+++	mov		r11, r11, ASR #26
+++	add		r11, r11, r9
+++	mov		r11, r11, ASR #25
+++	add		r11, r11, r10
+++	mov		r11, r11, ASR #26
+++	add		r11, r11, r1
+++	mov		r11, r11, ASR #25
+++	add		r2, r2, r11
+++	add		r2, r2, r11, LSL #1
+++	add		r2, r2, r11, LSL #4
+++	mov		r11, r2, ASR #26
+++	add		r3, r3, r11
+++	sub		r2, r2, r11, LSL #26
+++	mov		r11, r3, ASR #25
+++	add		r4, r4, r11
+++	sub		r3, r3, r11, LSL #25
+++	mov		r11, r4, ASR #26
+++	add		r5, r5, r11
+++	sub		r4, r4, r11, LSL #26
+++	mov		r11, r5, ASR #25
+++	add		r6, r6, r11
+++	sub		r5, r5, r11, LSL #25
+++	mov		r11, r6, ASR #26
+++	add		r7, r7, r11
+++	sub		r6, r6, r11, LSL #26
+++	mov		r11, r7, ASR #25
+++	add		r8, r8, r11
+++	sub		r7, r7, r11, LSL #25
+++	mov		r11, r8, ASR #26
+++	add		r9, r9, r11
+++	sub		r8, r8, r11, LSL #26
+++	mov		r11, r9, ASR #25
+++	add		r10, r10, r11
+++	sub		r9, r9, r11, LSL #25
+++	mov		r11, r10, ASR #26
+++	add		r1, r1, r11
+++	sub		r10, r10, r11, LSL #26
+++	mov		r11, r1, ASR #25
+++	sub		r1, r1, r11, LSL #25
+++	add		r2, r2, r3, LSL #26
+++	mov		r3, r3, LSR #6
+++	add		r3, r3, r4, LSL #19
+++	mov		r4, r4, LSR #13
+++	add		r4, r4, r5, LSL #13
+++	mov		r5, r5, LSR #19
+++	add		r5, r5, r6, LSL #6
+++	add		r6, r7, r8, LSL #25
+++	mov		r7, r8, LSR #7
+++	add		r7, r7, r9, LSL #19
+++	mov		r8, r9, LSR #13
+++	add		r8, r8, r10, LSL #12
+++	mov		r9, r10, LSR #20
+++	add		r1, r9, r1, LSL #6
+++	str		r2, [r0], #4
+++	str		r3, [r0], #4
+++	str		r4, [r0], #4
+++	str		r5, [r0], #4
+++	str		r6, [r0], #4
+++	str		r7, [r0], #4
+++	str		r8, [r0], #4
+++	str		r1, [r0]
+++	ldrd		r4, [sp, #0]
+++	ldrd		r6, [sp, #8]
+++	ldrd		r8, [sp, #16]
+++	ldrd		r10, [sp, #24]
+++	ldr		r12, [sp, #480]
+++	ldr		r14, [sp, #484]
+++	ldr		r0, =0
+++	mov		sp, r12
+++	vpop		{q4, q5, q6, q7}
+++	bx		lr
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0031-crypto-arm-curve25519-wire-up-NEON-implementation.patch b/target/linux/generic/backport-5.4/080-wireguard-0031-crypto-arm-curve25519-wire-up-NEON-implementation.patch
+new file mode 100644
+index 0000000000..d84726b616
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0031-crypto-arm-curve25519-wire-up-NEON-implementation.patch
+@@ -0,0 +1,1058 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 8 Nov 2019 13:22:38 +0100
++Subject: [PATCH] crypto: arm/curve25519 - wire up NEON implementation
++
++commit d8f1308a025fc7e00414194ed742d5f05a21e13c upstream.
++
++This ports the SUPERCOP implementation for usage in kernel space. In
++addition to the usual header, macro, and style changes required for
++kernel space, it makes a few small changes to the code:
++
++  - The stack alignment is relaxed to 16 bytes.
++  - Superfluous mov statements have been removed.
++  - ldr for constants has been replaced with movw.
++  - ldreq has been replaced with moveq.
++  - The str epilogue has been made more idiomatic.
++  - SIMD registers are not pushed and popped at the beginning and end.
++  - The prologue and epilogue have been made idiomatic.
++  - A hole has been removed from the stack, saving 32 bytes.
++  - We write-back the base register whenever possible for vld1.8.
++  - Some multiplications have been reordered for better A7 performance.
++
++There are more opportunities for cleanup, since this code is from qhasm,
++which doesn't always do the most opportune thing. But even prior to
++extensive hand optimizations, this code delivers significant performance
++improvements (given in get_cycles() per call):
++
++		      ----------- -------------
++	             | generic C | this commit |
++	 ------------ ----------- -------------
++	| Cortex-A7  |     49136 |       22395 |
++	 ------------ ----------- -------------
++	| Cortex-A17 |     17326 |        4983 |
++	 ------------ ----------- -------------
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++[ardb: - move to arch/arm/crypto
++       - wire into lib/crypto framework
++       - implement crypto API KPP hooks ]
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/Kconfig           |   6 +
++ arch/arm/crypto/Makefile          |   2 +
++ arch/arm/crypto/curve25519-core.S | 347 +++++++++++++-----------------
++ arch/arm/crypto/curve25519-glue.c | 127 +++++++++++
++ 4 files changed, 287 insertions(+), 195 deletions(-)
++ create mode 100644 arch/arm/crypto/curve25519-glue.c
++
++--- a/arch/arm/crypto/Kconfig
+++++ b/arch/arm/crypto/Kconfig
++@@ -141,4 +141,10 @@ config CRYPTO_NHPOLY1305_NEON
++ 	depends on KERNEL_MODE_NEON
++ 	select CRYPTO_NHPOLY1305
++ 
+++config CRYPTO_CURVE25519_NEON
+++	tristate "NEON accelerated Curve25519 scalar multiplication library"
+++	depends on KERNEL_MODE_NEON
+++	select CRYPTO_LIB_CURVE25519_GENERIC
+++	select CRYPTO_ARCH_HAVE_LIB_CURVE25519
+++
++ endif
++--- a/arch/arm/crypto/Makefile
+++++ b/arch/arm/crypto/Makefile
++@@ -12,6 +12,7 @@ obj-$(CONFIG_CRYPTO_SHA512_ARM) += sha51
++ obj-$(CONFIG_CRYPTO_CHACHA20_NEON) += chacha-neon.o
++ obj-$(CONFIG_CRYPTO_POLY1305_ARM) += poly1305-arm.o
++ obj-$(CONFIG_CRYPTO_NHPOLY1305_NEON) += nhpoly1305-neon.o
+++obj-$(CONFIG_CRYPTO_CURVE25519_NEON) += curve25519-neon.o
++ 
++ ce-obj-$(CONFIG_CRYPTO_AES_ARM_CE) += aes-arm-ce.o
++ ce-obj-$(CONFIG_CRYPTO_SHA1_ARM_CE) += sha1-arm-ce.o
++@@ -58,6 +59,7 @@ chacha-neon-y := chacha-scalar-core.o ch
++ chacha-neon-$(CONFIG_KERNEL_MODE_NEON) += chacha-neon-core.o
++ poly1305-arm-y := poly1305-core.o poly1305-glue.o
++ nhpoly1305-neon-y := nh-neon-core.o nhpoly1305-neon-glue.o
+++curve25519-neon-y := curve25519-core.o curve25519-glue.o
++ 
++ ifdef REGENERATE_ARM_CRYPTO
++ quiet_cmd_perl = PERL    $@
++--- a/arch/arm/crypto/curve25519-core.S
+++++ b/arch/arm/crypto/curve25519-core.S
++@@ -1,43 +1,35 @@
+++/* SPDX-License-Identifier: GPL-2.0 OR MIT */
++ /*
++- * Public domain code from Daniel J. Bernstein and Peter Schwabe, from
++- * SUPERCOP's curve25519/neon2/scalarmult.s.
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ *
+++ * Based on public domain code from Daniel J. Bernstein and Peter Schwabe. This
+++ * began from SUPERCOP's curve25519/neon2/scalarmult.s, but has subsequently been
+++ * manually reworked for use in kernel space.
++  */
++ 
++-.fpu neon
+++#include <linux/linkage.h>
+++
++ .text
+++.fpu neon
+++.arch armv7-a
++ .align 4
++-.global _crypto_scalarmult_curve25519_neon2
++-.global crypto_scalarmult_curve25519_neon2
++-.type _crypto_scalarmult_curve25519_neon2 STT_FUNC
++-.type crypto_scalarmult_curve25519_neon2 STT_FUNC
++-	_crypto_scalarmult_curve25519_neon2:
++-	crypto_scalarmult_curve25519_neon2:
++-	vpush		{q4, q5, q6, q7}
++-	mov		r12, sp
++-	sub		sp, sp, #736
++-	and		sp, sp, #0xffffffe0
++-	strd		r4, [sp, #0]
++-	strd		r6, [sp, #8]
++-	strd		r8, [sp, #16]
++-	strd		r10, [sp, #24]
++-	str		r12, [sp, #480]
++-	str		r14, [sp, #484]
++-	mov		r0, r0
++-	mov		r1, r1
++-	mov		r2, r2
++-	add		r3, sp, #32
++-	ldr		r4, =0
++-	ldr		r5, =254
+++
+++ENTRY(curve25519_neon)
+++	push		{r4-r11, lr}
+++	mov		ip, sp
+++	sub		r3, sp, #704
+++	and		r3, r3, #0xfffffff0
+++	mov		sp, r3
+++	movw		r4, #0
+++	movw		r5, #254
++ 	vmov.i32	q0, #1
++ 	vshr.u64	q1, q0, #7
++ 	vshr.u64	q0, q0, #8
++ 	vmov.i32	d4, #19
++ 	vmov.i32	d5, #38
++-	add		r6, sp, #512
++-	vst1.8		{d2-d3}, [r6, : 128]
++-	add		r6, sp, #528
++-	vst1.8		{d0-d1}, [r6, : 128]
++-	add		r6, sp, #544
+++	add		r6, sp, #480
+++	vst1.8		{d2-d3}, [r6, : 128]!
+++	vst1.8		{d0-d1}, [r6, : 128]!
++ 	vst1.8		{d4-d5}, [r6, : 128]
++ 	add		r6, r3, #0
++ 	vmov.i32	q2, #0
++@@ -45,12 +37,12 @@
++ 	vst1.8		{d4-d5}, [r6, : 128]!
++ 	vst1.8		d4, [r6, : 64]
++ 	add		r6, r3, #0
++-	ldr		r7, =960
+++	movw		r7, #960
++ 	sub		r7, r7, #2
++ 	neg		r7, r7
++ 	sub		r7, r7, r7, LSL #7
++ 	str		r7, [r6]
++-	add		r6, sp, #704
+++	add		r6, sp, #672
++ 	vld1.8		{d4-d5}, [r1]!
++ 	vld1.8		{d6-d7}, [r1]
++ 	vst1.8		{d4-d5}, [r6, : 128]!
++@@ -212,15 +204,15 @@
++ 	vst1.8		{d0-d1}, [r6, : 128]!
++ 	vst1.8		{d2-d3}, [r6, : 128]!
++ 	vst1.8		d4, [r6, : 64]
++-._mainloop:
+++.Lmainloop:
++ 	mov		r2, r5, LSR #3
++ 	and		r6, r5, #7
++ 	ldrb		r2, [r1, r2]
++ 	mov		r2, r2, LSR r6
++ 	and		r2, r2, #1
++-	str		r5, [sp, #488]
+++	str		r5, [sp, #456]
++ 	eor		r4, r4, r2
++-	str		r2, [sp, #492]
+++	str		r2, [sp, #460]
++ 	neg		r2, r4
++ 	add		r4, r3, #96
++ 	add		r5, r3, #192
++@@ -291,7 +283,7 @@
++ 	vsub.i32	q0, q1, q3
++ 	vst1.8		d4, [r4, : 64]
++ 	vst1.8		d0, [r6, : 64]
++-	add		r2, sp, #544
+++	add		r2, sp, #512
++ 	add		r4, r3, #96
++ 	add		r5, r3, #144
++ 	vld1.8		{d0-d1}, [r2, : 128]
++@@ -361,14 +353,13 @@
++ 	vmlal.s32	q0, d12, d8
++ 	vmlal.s32	q0, d13, d17
++ 	vmlal.s32	q0, d6, d6
++-	add		r2, sp, #512
++-	vld1.8		{d18-d19}, [r2, : 128]
+++	add		r2, sp, #480
+++	vld1.8		{d18-d19}, [r2, : 128]!
++ 	vmull.s32	q3, d16, d7
++ 	vmlal.s32	q3, d10, d15
++ 	vmlal.s32	q3, d11, d14
++ 	vmlal.s32	q3, d12, d9
++ 	vmlal.s32	q3, d13, d8
++-	add		r2, sp, #528
++ 	vld1.8		{d8-d9}, [r2, : 128]
++ 	vadd.i64	q5, q12, q9
++ 	vadd.i64	q6, q15, q9
++@@ -502,22 +493,19 @@
++ 	vadd.i32	q5, q5, q0
++ 	vtrn.32		q11, q14
++ 	vadd.i32	q6, q6, q3
++-	add		r2, sp, #560
+++	add		r2, sp, #528
++ 	vadd.i32	q10, q10, q2
++ 	vtrn.32		d24, d25
++-	vst1.8		{d12-d13}, [r2, : 128]
+++	vst1.8		{d12-d13}, [r2, : 128]!
++ 	vshl.i32	q6, q13, #1
++-	add		r2, sp, #576
++-	vst1.8		{d20-d21}, [r2, : 128]
+++	vst1.8		{d20-d21}, [r2, : 128]!
++ 	vshl.i32	q10, q14, #1
++-	add		r2, sp, #592
++-	vst1.8		{d12-d13}, [r2, : 128]
+++	vst1.8		{d12-d13}, [r2, : 128]!
++ 	vshl.i32	q15, q12, #1
++ 	vadd.i32	q8, q8, q4
++ 	vext.32		d10, d31, d30, #0
++ 	vadd.i32	q7, q7, q1
++-	add		r2, sp, #608
++-	vst1.8		{d16-d17}, [r2, : 128]
+++	vst1.8		{d16-d17}, [r2, : 128]!
++ 	vmull.s32	q8, d18, d5
++ 	vmlal.s32	q8, d26, d4
++ 	vmlal.s32	q8, d19, d9
++@@ -528,8 +516,7 @@
++ 	vmlal.s32	q8, d29, d1
++ 	vmlal.s32	q8, d24, d6
++ 	vmlal.s32	q8, d25, d0
++-	add		r2, sp, #624
++-	vst1.8		{d14-d15}, [r2, : 128]
+++	vst1.8		{d14-d15}, [r2, : 128]!
++ 	vmull.s32	q2, d18, d4
++ 	vmlal.s32	q2, d12, d9
++ 	vmlal.s32	q2, d13, d8
++@@ -537,8 +524,7 @@
++ 	vmlal.s32	q2, d22, d2
++ 	vmlal.s32	q2, d23, d1
++ 	vmlal.s32	q2, d24, d0
++-	add		r2, sp, #640
++-	vst1.8		{d20-d21}, [r2, : 128]
+++	vst1.8		{d20-d21}, [r2, : 128]!
++ 	vmull.s32	q7, d18, d9
++ 	vmlal.s32	q7, d26, d3
++ 	vmlal.s32	q7, d19, d8
++@@ -547,14 +533,12 @@
++ 	vmlal.s32	q7, d28, d1
++ 	vmlal.s32	q7, d23, d6
++ 	vmlal.s32	q7, d29, d0
++-	add		r2, sp, #656
++-	vst1.8		{d10-d11}, [r2, : 128]
+++	vst1.8		{d10-d11}, [r2, : 128]!
++ 	vmull.s32	q5, d18, d3
++ 	vmlal.s32	q5, d19, d2
++ 	vmlal.s32	q5, d22, d1
++ 	vmlal.s32	q5, d23, d0
++ 	vmlal.s32	q5, d12, d8
++-	add		r2, sp, #672
++ 	vst1.8		{d16-d17}, [r2, : 128]
++ 	vmull.s32	q4, d18, d8
++ 	vmlal.s32	q4, d26, d2
++@@ -566,7 +550,7 @@
++ 	vmlal.s32	q8, d26, d1
++ 	vmlal.s32	q8, d19, d6
++ 	vmlal.s32	q8, d27, d0
++-	add		r2, sp, #576
+++	add		r2, sp, #544
++ 	vld1.8		{d20-d21}, [r2, : 128]
++ 	vmlal.s32	q7, d24, d21
++ 	vmlal.s32	q7, d25, d20
++@@ -575,32 +559,30 @@
++ 	vmlal.s32	q8, d22, d21
++ 	vmlal.s32	q8, d28, d20
++ 	vmlal.s32	q5, d24, d20
++-	add		r2, sp, #576
++ 	vst1.8		{d14-d15}, [r2, : 128]
++ 	vmull.s32	q7, d18, d6
++ 	vmlal.s32	q7, d26, d0
++-	add		r2, sp, #656
+++	add		r2, sp, #624
++ 	vld1.8		{d30-d31}, [r2, : 128]
++ 	vmlal.s32	q2, d30, d21
++ 	vmlal.s32	q7, d19, d21
++ 	vmlal.s32	q7, d27, d20
++-	add		r2, sp, #624
+++	add		r2, sp, #592
++ 	vld1.8		{d26-d27}, [r2, : 128]
++ 	vmlal.s32	q4, d25, d27
++ 	vmlal.s32	q8, d29, d27
++ 	vmlal.s32	q8, d25, d26
++ 	vmlal.s32	q7, d28, d27
++ 	vmlal.s32	q7, d29, d26
++-	add		r2, sp, #608
+++	add		r2, sp, #576
++ 	vld1.8		{d28-d29}, [r2, : 128]
++ 	vmlal.s32	q4, d24, d29
++ 	vmlal.s32	q8, d23, d29
++ 	vmlal.s32	q8, d24, d28
++ 	vmlal.s32	q7, d22, d29
++ 	vmlal.s32	q7, d23, d28
++-	add		r2, sp, #608
++ 	vst1.8		{d8-d9}, [r2, : 128]
++-	add		r2, sp, #560
+++	add		r2, sp, #528
++ 	vld1.8		{d8-d9}, [r2, : 128]
++ 	vmlal.s32	q7, d24, d9
++ 	vmlal.s32	q7, d25, d31
++@@ -621,36 +603,36 @@
++ 	vmlal.s32	q0, d23, d26
++ 	vmlal.s32	q0, d24, d31
++ 	vmlal.s32	q0, d19, d20
++-	add		r2, sp, #640
+++	add		r2, sp, #608
++ 	vld1.8		{d18-d19}, [r2, : 128]
++ 	vmlal.s32	q2, d18, d7
++-	vmlal.s32	q2, d19, d6
++ 	vmlal.s32	q5, d18, d6
++-	vmlal.s32	q5, d19, d21
++ 	vmlal.s32	q1, d18, d21
++-	vmlal.s32	q1, d19, d29
++ 	vmlal.s32	q0, d18, d28
++-	vmlal.s32	q0, d19, d9
++ 	vmlal.s32	q6, d18, d29
+++	vmlal.s32	q2, d19, d6
+++	vmlal.s32	q5, d19, d21
+++	vmlal.s32	q1, d19, d29
+++	vmlal.s32	q0, d19, d9
++ 	vmlal.s32	q6, d19, d28
++-	add		r2, sp, #592
+++	add		r2, sp, #560
++ 	vld1.8		{d18-d19}, [r2, : 128]
++-	add		r2, sp, #512
+++	add		r2, sp, #480
++ 	vld1.8		{d22-d23}, [r2, : 128]
++ 	vmlal.s32	q5, d19, d7
++ 	vmlal.s32	q0, d18, d21
++ 	vmlal.s32	q0, d19, d29
++ 	vmlal.s32	q6, d18, d6
++-	add		r2, sp, #528
+++	add		r2, sp, #496
++ 	vld1.8		{d6-d7}, [r2, : 128]
++ 	vmlal.s32	q6, d19, d21
++-	add		r2, sp, #576
+++	add		r2, sp, #544
++ 	vld1.8		{d18-d19}, [r2, : 128]
++ 	vmlal.s32	q0, d30, d8
++-	add		r2, sp, #672
+++	add		r2, sp, #640
++ 	vld1.8		{d20-d21}, [r2, : 128]
++ 	vmlal.s32	q5, d30, d29
++-	add		r2, sp, #608
+++	add		r2, sp, #576
++ 	vld1.8		{d24-d25}, [r2, : 128]
++ 	vmlal.s32	q1, d30, d28
++ 	vadd.i64	q13, q0, q11
++@@ -823,22 +805,19 @@
++ 	vadd.i32	q5, q5, q0
++ 	vtrn.32		q11, q14
++ 	vadd.i32	q6, q6, q3
++-	add		r2, sp, #560
+++	add		r2, sp, #528
++ 	vadd.i32	q10, q10, q2
++ 	vtrn.32		d24, d25
++-	vst1.8		{d12-d13}, [r2, : 128]
+++	vst1.8		{d12-d13}, [r2, : 128]!
++ 	vshl.i32	q6, q13, #1
++-	add		r2, sp, #576
++-	vst1.8		{d20-d21}, [r2, : 128]
+++	vst1.8		{d20-d21}, [r2, : 128]!
++ 	vshl.i32	q10, q14, #1
++-	add		r2, sp, #592
++-	vst1.8		{d12-d13}, [r2, : 128]
+++	vst1.8		{d12-d13}, [r2, : 128]!
++ 	vshl.i32	q15, q12, #1
++ 	vadd.i32	q8, q8, q4
++ 	vext.32		d10, d31, d30, #0
++ 	vadd.i32	q7, q7, q1
++-	add		r2, sp, #608
++-	vst1.8		{d16-d17}, [r2, : 128]
+++	vst1.8		{d16-d17}, [r2, : 128]!
++ 	vmull.s32	q8, d18, d5
++ 	vmlal.s32	q8, d26, d4
++ 	vmlal.s32	q8, d19, d9
++@@ -849,8 +828,7 @@
++ 	vmlal.s32	q8, d29, d1
++ 	vmlal.s32	q8, d24, d6
++ 	vmlal.s32	q8, d25, d0
++-	add		r2, sp, #624
++-	vst1.8		{d14-d15}, [r2, : 128]
+++	vst1.8		{d14-d15}, [r2, : 128]!
++ 	vmull.s32	q2, d18, d4
++ 	vmlal.s32	q2, d12, d9
++ 	vmlal.s32	q2, d13, d8
++@@ -858,8 +836,7 @@
++ 	vmlal.s32	q2, d22, d2
++ 	vmlal.s32	q2, d23, d1
++ 	vmlal.s32	q2, d24, d0
++-	add		r2, sp, #640
++-	vst1.8		{d20-d21}, [r2, : 128]
+++	vst1.8		{d20-d21}, [r2, : 128]!
++ 	vmull.s32	q7, d18, d9
++ 	vmlal.s32	q7, d26, d3
++ 	vmlal.s32	q7, d19, d8
++@@ -868,15 +845,13 @@
++ 	vmlal.s32	q7, d28, d1
++ 	vmlal.s32	q7, d23, d6
++ 	vmlal.s32	q7, d29, d0
++-	add		r2, sp, #656
++-	vst1.8		{d10-d11}, [r2, : 128]
+++	vst1.8		{d10-d11}, [r2, : 128]!
++ 	vmull.s32	q5, d18, d3
++ 	vmlal.s32	q5, d19, d2
++ 	vmlal.s32	q5, d22, d1
++ 	vmlal.s32	q5, d23, d0
++ 	vmlal.s32	q5, d12, d8
++-	add		r2, sp, #672
++-	vst1.8		{d16-d17}, [r2, : 128]
+++	vst1.8		{d16-d17}, [r2, : 128]!
++ 	vmull.s32	q4, d18, d8
++ 	vmlal.s32	q4, d26, d2
++ 	vmlal.s32	q4, d19, d7
++@@ -887,7 +862,7 @@
++ 	vmlal.s32	q8, d26, d1
++ 	vmlal.s32	q8, d19, d6
++ 	vmlal.s32	q8, d27, d0
++-	add		r2, sp, #576
+++	add		r2, sp, #544
++ 	vld1.8		{d20-d21}, [r2, : 128]
++ 	vmlal.s32	q7, d24, d21
++ 	vmlal.s32	q7, d25, d20
++@@ -896,32 +871,30 @@
++ 	vmlal.s32	q8, d22, d21
++ 	vmlal.s32	q8, d28, d20
++ 	vmlal.s32	q5, d24, d20
++-	add		r2, sp, #576
++ 	vst1.8		{d14-d15}, [r2, : 128]
++ 	vmull.s32	q7, d18, d6
++ 	vmlal.s32	q7, d26, d0
++-	add		r2, sp, #656
+++	add		r2, sp, #624
++ 	vld1.8		{d30-d31}, [r2, : 128]
++ 	vmlal.s32	q2, d30, d21
++ 	vmlal.s32	q7, d19, d21
++ 	vmlal.s32	q7, d27, d20
++-	add		r2, sp, #624
+++	add		r2, sp, #592
++ 	vld1.8		{d26-d27}, [r2, : 128]
++ 	vmlal.s32	q4, d25, d27
++ 	vmlal.s32	q8, d29, d27
++ 	vmlal.s32	q8, d25, d26
++ 	vmlal.s32	q7, d28, d27
++ 	vmlal.s32	q7, d29, d26
++-	add		r2, sp, #608
+++	add		r2, sp, #576
++ 	vld1.8		{d28-d29}, [r2, : 128]
++ 	vmlal.s32	q4, d24, d29
++ 	vmlal.s32	q8, d23, d29
++ 	vmlal.s32	q8, d24, d28
++ 	vmlal.s32	q7, d22, d29
++ 	vmlal.s32	q7, d23, d28
++-	add		r2, sp, #608
++ 	vst1.8		{d8-d9}, [r2, : 128]
++-	add		r2, sp, #560
+++	add		r2, sp, #528
++ 	vld1.8		{d8-d9}, [r2, : 128]
++ 	vmlal.s32	q7, d24, d9
++ 	vmlal.s32	q7, d25, d31
++@@ -942,36 +915,36 @@
++ 	vmlal.s32	q0, d23, d26
++ 	vmlal.s32	q0, d24, d31
++ 	vmlal.s32	q0, d19, d20
++-	add		r2, sp, #640
+++	add		r2, sp, #608
++ 	vld1.8		{d18-d19}, [r2, : 128]
++ 	vmlal.s32	q2, d18, d7
++-	vmlal.s32	q2, d19, d6
++ 	vmlal.s32	q5, d18, d6
++-	vmlal.s32	q5, d19, d21
++ 	vmlal.s32	q1, d18, d21
++-	vmlal.s32	q1, d19, d29
++ 	vmlal.s32	q0, d18, d28
++-	vmlal.s32	q0, d19, d9
++ 	vmlal.s32	q6, d18, d29
+++	vmlal.s32	q2, d19, d6
+++	vmlal.s32	q5, d19, d21
+++	vmlal.s32	q1, d19, d29
+++	vmlal.s32	q0, d19, d9
++ 	vmlal.s32	q6, d19, d28
++-	add		r2, sp, #592
+++	add		r2, sp, #560
++ 	vld1.8		{d18-d19}, [r2, : 128]
++-	add		r2, sp, #512
+++	add		r2, sp, #480
++ 	vld1.8		{d22-d23}, [r2, : 128]
++ 	vmlal.s32	q5, d19, d7
++ 	vmlal.s32	q0, d18, d21
++ 	vmlal.s32	q0, d19, d29
++ 	vmlal.s32	q6, d18, d6
++-	add		r2, sp, #528
+++	add		r2, sp, #496
++ 	vld1.8		{d6-d7}, [r2, : 128]
++ 	vmlal.s32	q6, d19, d21
++-	add		r2, sp, #576
+++	add		r2, sp, #544
++ 	vld1.8		{d18-d19}, [r2, : 128]
++ 	vmlal.s32	q0, d30, d8
++-	add		r2, sp, #672
+++	add		r2, sp, #640
++ 	vld1.8		{d20-d21}, [r2, : 128]
++ 	vmlal.s32	q5, d30, d29
++-	add		r2, sp, #608
+++	add		r2, sp, #576
++ 	vld1.8		{d24-d25}, [r2, : 128]
++ 	vmlal.s32	q1, d30, d28
++ 	vadd.i64	q13, q0, q11
++@@ -1069,7 +1042,7 @@
++ 	sub		r4, r4, #24
++ 	vst1.8		d0, [r2, : 64]
++ 	vst1.8		d1, [r4, : 64]
++-	add		r2, sp, #544
+++	add		r2, sp, #512
++ 	add		r4, r3, #144
++ 	add		r5, r3, #192
++ 	vld1.8		{d0-d1}, [r2, : 128]
++@@ -1139,14 +1112,13 @@
++ 	vmlal.s32	q0, d12, d8
++ 	vmlal.s32	q0, d13, d17
++ 	vmlal.s32	q0, d6, d6
++-	add		r2, sp, #512
++-	vld1.8		{d18-d19}, [r2, : 128]
+++	add		r2, sp, #480
+++	vld1.8		{d18-d19}, [r2, : 128]!
++ 	vmull.s32	q3, d16, d7
++ 	vmlal.s32	q3, d10, d15
++ 	vmlal.s32	q3, d11, d14
++ 	vmlal.s32	q3, d12, d9
++ 	vmlal.s32	q3, d13, d8
++-	add		r2, sp, #528
++ 	vld1.8		{d8-d9}, [r2, : 128]
++ 	vadd.i64	q5, q12, q9
++ 	vadd.i64	q6, q15, q9
++@@ -1295,22 +1267,19 @@
++ 	vadd.i32	q5, q5, q0
++ 	vtrn.32		q11, q14
++ 	vadd.i32	q6, q6, q3
++-	add		r2, sp, #560
+++	add		r2, sp, #528
++ 	vadd.i32	q10, q10, q2
++ 	vtrn.32		d24, d25
++-	vst1.8		{d12-d13}, [r2, : 128]
+++	vst1.8		{d12-d13}, [r2, : 128]!
++ 	vshl.i32	q6, q13, #1
++-	add		r2, sp, #576
++-	vst1.8		{d20-d21}, [r2, : 128]
+++	vst1.8		{d20-d21}, [r2, : 128]!
++ 	vshl.i32	q10, q14, #1
++-	add		r2, sp, #592
++-	vst1.8		{d12-d13}, [r2, : 128]
+++	vst1.8		{d12-d13}, [r2, : 128]!
++ 	vshl.i32	q15, q12, #1
++ 	vadd.i32	q8, q8, q4
++ 	vext.32		d10, d31, d30, #0
++ 	vadd.i32	q7, q7, q1
++-	add		r2, sp, #608
++-	vst1.8		{d16-d17}, [r2, : 128]
+++	vst1.8		{d16-d17}, [r2, : 128]!
++ 	vmull.s32	q8, d18, d5
++ 	vmlal.s32	q8, d26, d4
++ 	vmlal.s32	q8, d19, d9
++@@ -1321,8 +1290,7 @@
++ 	vmlal.s32	q8, d29, d1
++ 	vmlal.s32	q8, d24, d6
++ 	vmlal.s32	q8, d25, d0
++-	add		r2, sp, #624
++-	vst1.8		{d14-d15}, [r2, : 128]
+++	vst1.8		{d14-d15}, [r2, : 128]!
++ 	vmull.s32	q2, d18, d4
++ 	vmlal.s32	q2, d12, d9
++ 	vmlal.s32	q2, d13, d8
++@@ -1330,8 +1298,7 @@
++ 	vmlal.s32	q2, d22, d2
++ 	vmlal.s32	q2, d23, d1
++ 	vmlal.s32	q2, d24, d0
++-	add		r2, sp, #640
++-	vst1.8		{d20-d21}, [r2, : 128]
+++	vst1.8		{d20-d21}, [r2, : 128]!
++ 	vmull.s32	q7, d18, d9
++ 	vmlal.s32	q7, d26, d3
++ 	vmlal.s32	q7, d19, d8
++@@ -1340,15 +1307,13 @@
++ 	vmlal.s32	q7, d28, d1
++ 	vmlal.s32	q7, d23, d6
++ 	vmlal.s32	q7, d29, d0
++-	add		r2, sp, #656
++-	vst1.8		{d10-d11}, [r2, : 128]
+++	vst1.8		{d10-d11}, [r2, : 128]!
++ 	vmull.s32	q5, d18, d3
++ 	vmlal.s32	q5, d19, d2
++ 	vmlal.s32	q5, d22, d1
++ 	vmlal.s32	q5, d23, d0
++ 	vmlal.s32	q5, d12, d8
++-	add		r2, sp, #672
++-	vst1.8		{d16-d17}, [r2, : 128]
+++	vst1.8		{d16-d17}, [r2, : 128]!
++ 	vmull.s32	q4, d18, d8
++ 	vmlal.s32	q4, d26, d2
++ 	vmlal.s32	q4, d19, d7
++@@ -1359,7 +1324,7 @@
++ 	vmlal.s32	q8, d26, d1
++ 	vmlal.s32	q8, d19, d6
++ 	vmlal.s32	q8, d27, d0
++-	add		r2, sp, #576
+++	add		r2, sp, #544
++ 	vld1.8		{d20-d21}, [r2, : 128]
++ 	vmlal.s32	q7, d24, d21
++ 	vmlal.s32	q7, d25, d20
++@@ -1368,32 +1333,30 @@
++ 	vmlal.s32	q8, d22, d21
++ 	vmlal.s32	q8, d28, d20
++ 	vmlal.s32	q5, d24, d20
++-	add		r2, sp, #576
++ 	vst1.8		{d14-d15}, [r2, : 128]
++ 	vmull.s32	q7, d18, d6
++ 	vmlal.s32	q7, d26, d0
++-	add		r2, sp, #656
+++	add		r2, sp, #624
++ 	vld1.8		{d30-d31}, [r2, : 128]
++ 	vmlal.s32	q2, d30, d21
++ 	vmlal.s32	q7, d19, d21
++ 	vmlal.s32	q7, d27, d20
++-	add		r2, sp, #624
+++	add		r2, sp, #592
++ 	vld1.8		{d26-d27}, [r2, : 128]
++ 	vmlal.s32	q4, d25, d27
++ 	vmlal.s32	q8, d29, d27
++ 	vmlal.s32	q8, d25, d26
++ 	vmlal.s32	q7, d28, d27
++ 	vmlal.s32	q7, d29, d26
++-	add		r2, sp, #608
+++	add		r2, sp, #576
++ 	vld1.8		{d28-d29}, [r2, : 128]
++ 	vmlal.s32	q4, d24, d29
++ 	vmlal.s32	q8, d23, d29
++ 	vmlal.s32	q8, d24, d28
++ 	vmlal.s32	q7, d22, d29
++ 	vmlal.s32	q7, d23, d28
++-	add		r2, sp, #608
++ 	vst1.8		{d8-d9}, [r2, : 128]
++-	add		r2, sp, #560
+++	add		r2, sp, #528
++ 	vld1.8		{d8-d9}, [r2, : 128]
++ 	vmlal.s32	q7, d24, d9
++ 	vmlal.s32	q7, d25, d31
++@@ -1414,36 +1377,36 @@
++ 	vmlal.s32	q0, d23, d26
++ 	vmlal.s32	q0, d24, d31
++ 	vmlal.s32	q0, d19, d20
++-	add		r2, sp, #640
+++	add		r2, sp, #608
++ 	vld1.8		{d18-d19}, [r2, : 128]
++ 	vmlal.s32	q2, d18, d7
++-	vmlal.s32	q2, d19, d6
++ 	vmlal.s32	q5, d18, d6
++-	vmlal.s32	q5, d19, d21
++ 	vmlal.s32	q1, d18, d21
++-	vmlal.s32	q1, d19, d29
++ 	vmlal.s32	q0, d18, d28
++-	vmlal.s32	q0, d19, d9
++ 	vmlal.s32	q6, d18, d29
+++	vmlal.s32	q2, d19, d6
+++	vmlal.s32	q5, d19, d21
+++	vmlal.s32	q1, d19, d29
+++	vmlal.s32	q0, d19, d9
++ 	vmlal.s32	q6, d19, d28
++-	add		r2, sp, #592
+++	add		r2, sp, #560
++ 	vld1.8		{d18-d19}, [r2, : 128]
++-	add		r2, sp, #512
+++	add		r2, sp, #480
++ 	vld1.8		{d22-d23}, [r2, : 128]
++ 	vmlal.s32	q5, d19, d7
++ 	vmlal.s32	q0, d18, d21
++ 	vmlal.s32	q0, d19, d29
++ 	vmlal.s32	q6, d18, d6
++-	add		r2, sp, #528
+++	add		r2, sp, #496
++ 	vld1.8		{d6-d7}, [r2, : 128]
++ 	vmlal.s32	q6, d19, d21
++-	add		r2, sp, #576
+++	add		r2, sp, #544
++ 	vld1.8		{d18-d19}, [r2, : 128]
++ 	vmlal.s32	q0, d30, d8
++-	add		r2, sp, #672
+++	add		r2, sp, #640
++ 	vld1.8		{d20-d21}, [r2, : 128]
++ 	vmlal.s32	q5, d30, d29
++-	add		r2, sp, #608
+++	add		r2, sp, #576
++ 	vld1.8		{d24-d25}, [r2, : 128]
++ 	vmlal.s32	q1, d30, d28
++ 	vadd.i64	q13, q0, q11
++@@ -1541,10 +1504,10 @@
++ 	sub		r4, r4, #24
++ 	vst1.8		d0, [r2, : 64]
++ 	vst1.8		d1, [r4, : 64]
++-	ldr		r2, [sp, #488]
++-	ldr		r4, [sp, #492]
+++	ldr		r2, [sp, #456]
+++	ldr		r4, [sp, #460]
++ 	subs		r5, r2, #1
++-	bge		._mainloop
+++	bge		.Lmainloop
++ 	add		r1, r3, #144
++ 	add		r2, r3, #336
++ 	vld1.8		{d0-d1}, [r1, : 128]!
++@@ -1553,41 +1516,41 @@
++ 	vst1.8		{d0-d1}, [r2, : 128]!
++ 	vst1.8		{d2-d3}, [r2, : 128]!
++ 	vst1.8		d4, [r2, : 64]
++-	ldr		r1, =0
++-._invertloop:
+++	movw		r1, #0
+++.Linvertloop:
++ 	add		r2, r3, #144
++-	ldr		r4, =0
++-	ldr		r5, =2
+++	movw		r4, #0
+++	movw		r5, #2
++ 	cmp		r1, #1
++-	ldreq		r5, =1
+++	moveq		r5, #1
++ 	addeq		r2, r3, #336
++ 	addeq		r4, r3, #48
++ 	cmp		r1, #2
++-	ldreq		r5, =1
+++	moveq		r5, #1
++ 	addeq		r2, r3, #48
++ 	cmp		r1, #3
++-	ldreq		r5, =5
+++	moveq		r5, #5
++ 	addeq		r4, r3, #336
++ 	cmp		r1, #4
++-	ldreq		r5, =10
+++	moveq		r5, #10
++ 	cmp		r1, #5
++-	ldreq		r5, =20
+++	moveq		r5, #20
++ 	cmp		r1, #6
++-	ldreq		r5, =10
+++	moveq		r5, #10
++ 	addeq		r2, r3, #336
++ 	addeq		r4, r3, #336
++ 	cmp		r1, #7
++-	ldreq		r5, =50
+++	moveq		r5, #50
++ 	cmp		r1, #8
++-	ldreq		r5, =100
+++	moveq		r5, #100
++ 	cmp		r1, #9
++-	ldreq		r5, =50
+++	moveq		r5, #50
++ 	addeq		r2, r3, #336
++ 	cmp		r1, #10
++-	ldreq		r5, =5
+++	moveq		r5, #5
++ 	addeq		r2, r3, #48
++ 	cmp		r1, #11
++-	ldreq		r5, =0
+++	moveq		r5, #0
++ 	addeq		r2, r3, #96
++ 	add		r6, r3, #144
++ 	add		r7, r3, #288
++@@ -1598,8 +1561,8 @@
++ 	vst1.8		{d2-d3}, [r7, : 128]!
++ 	vst1.8		d4, [r7, : 64]
++ 	cmp		r5, #0
++-	beq		._skipsquaringloop
++-._squaringloop:
+++	beq		.Lskipsquaringloop
+++.Lsquaringloop:
++ 	add		r6, r3, #288
++ 	add		r7, r3, #288
++ 	add		r8, r3, #288
++@@ -1611,7 +1574,7 @@
++ 	vld1.8		{d6-d7}, [r7, : 128]!
++ 	vld1.8		{d9}, [r7, : 64]
++ 	vld1.8		{d10-d11}, [r6, : 128]!
++-	add		r7, sp, #416
+++	add		r7, sp, #384
++ 	vld1.8		{d12-d13}, [r6, : 128]!
++ 	vmul.i32	q7, q2, q0
++ 	vld1.8		{d8}, [r6, : 64]
++@@ -1726,7 +1689,7 @@
++ 	vext.32		d10, d6, d6, #0
++ 	vmov.i32	q1, #0xffffffff
++ 	vshl.i64	q4, q1, #25
++-	add		r7, sp, #512
+++	add		r7, sp, #480
++ 	vld1.8		{d14-d15}, [r7, : 128]
++ 	vadd.i64	q9, q2, q7
++ 	vshl.i64	q1, q1, #26
++@@ -1735,7 +1698,7 @@
++ 	vadd.i64	q5, q5, q10
++ 	vand		q9, q9, q1
++ 	vld1.8		{d16}, [r6, : 64]!
++-	add		r6, sp, #528
+++	add		r6, sp, #496
++ 	vld1.8		{d20-d21}, [r6, : 128]
++ 	vadd.i64	q11, q5, q10
++ 	vsub.i64	q2, q2, q9
++@@ -1789,8 +1752,8 @@
++ 	sub		r6, r6, #32
++ 	vst1.8		d4, [r6, : 64]
++ 	subs		r5, r5, #1
++-	bhi		._squaringloop
++-._skipsquaringloop:
+++	bhi		.Lsquaringloop
+++.Lskipsquaringloop:
++ 	mov		r2, r2
++ 	add		r5, r3, #288
++ 	add		r6, r3, #144
++@@ -1802,7 +1765,7 @@
++ 	vld1.8		{d6-d7}, [r5, : 128]!
++ 	vld1.8		{d9}, [r5, : 64]
++ 	vld1.8		{d10-d11}, [r2, : 128]!
++-	add		r5, sp, #416
+++	add		r5, sp, #384
++ 	vld1.8		{d12-d13}, [r2, : 128]!
++ 	vmul.i32	q7, q2, q0
++ 	vld1.8		{d8}, [r2, : 64]
++@@ -1917,7 +1880,7 @@
++ 	vext.32		d10, d6, d6, #0
++ 	vmov.i32	q1, #0xffffffff
++ 	vshl.i64	q4, q1, #25
++-	add		r5, sp, #512
+++	add		r5, sp, #480
++ 	vld1.8		{d14-d15}, [r5, : 128]
++ 	vadd.i64	q9, q2, q7
++ 	vshl.i64	q1, q1, #26
++@@ -1926,7 +1889,7 @@
++ 	vadd.i64	q5, q5, q10
++ 	vand		q9, q9, q1
++ 	vld1.8		{d16}, [r2, : 64]!
++-	add		r2, sp, #528
+++	add		r2, sp, #496
++ 	vld1.8		{d20-d21}, [r2, : 128]
++ 	vadd.i64	q11, q5, q10
++ 	vsub.i64	q2, q2, q9
++@@ -1980,7 +1943,7 @@
++ 	sub		r2, r2, #32
++ 	vst1.8		d4, [r2, : 64]
++ 	cmp		r4, #0
++-	beq		._skippostcopy
+++	beq		.Lskippostcopy
++ 	add		r2, r3, #144
++ 	mov		r4, r4
++ 	vld1.8		{d0-d1}, [r2, : 128]!
++@@ -1989,9 +1952,9 @@
++ 	vst1.8		{d0-d1}, [r4, : 128]!
++ 	vst1.8		{d2-d3}, [r4, : 128]!
++ 	vst1.8		d4, [r4, : 64]
++-._skippostcopy:
+++.Lskippostcopy:
++ 	cmp		r1, #1
++-	bne		._skipfinalcopy
+++	bne		.Lskipfinalcopy
++ 	add		r2, r3, #288
++ 	add		r4, r3, #144
++ 	vld1.8		{d0-d1}, [r2, : 128]!
++@@ -2000,10 +1963,10 @@
++ 	vst1.8		{d0-d1}, [r4, : 128]!
++ 	vst1.8		{d2-d3}, [r4, : 128]!
++ 	vst1.8		d4, [r4, : 64]
++-._skipfinalcopy:
+++.Lskipfinalcopy:
++ 	add		r1, r1, #1
++ 	cmp		r1, #12
++-	blo		._invertloop
+++	blo		.Linvertloop
++ 	add		r1, r3, #144
++ 	ldr		r2, [r1], #4
++ 	ldr		r3, [r1], #4
++@@ -2085,21 +2048,15 @@
++ 	add		r8, r8, r10, LSL #12
++ 	mov		r9, r10, LSR #20
++ 	add		r1, r9, r1, LSL #6
++-	str		r2, [r0], #4
++-	str		r3, [r0], #4
++-	str		r4, [r0], #4
++-	str		r5, [r0], #4
++-	str		r6, [r0], #4
++-	str		r7, [r0], #4
++-	str		r8, [r0], #4
++-	str		r1, [r0]
++-	ldrd		r4, [sp, #0]
++-	ldrd		r6, [sp, #8]
++-	ldrd		r8, [sp, #16]
++-	ldrd		r10, [sp, #24]
++-	ldr		r12, [sp, #480]
++-	ldr		r14, [sp, #484]
++-	ldr		r0, =0
++-	mov		sp, r12
++-	vpop		{q4, q5, q6, q7}
++-	bx		lr
+++	str		r2, [r0]
+++	str		r3, [r0, #4]
+++	str		r4, [r0, #8]
+++	str		r5, [r0, #12]
+++	str		r6, [r0, #16]
+++	str		r7, [r0, #20]
+++	str		r8, [r0, #24]
+++	str		r1, [r0, #28]
+++	movw		r0, #0
+++	mov		sp, ip
+++	pop		{r4-r11, pc}
+++ENDPROC(curve25519_neon)
++--- /dev/null
+++++ b/arch/arm/crypto/curve25519-glue.c
++@@ -0,0 +1,127 @@
+++// SPDX-License-Identifier: GPL-2.0 OR MIT
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ *
+++ * Based on public domain code from Daniel J. Bernstein and Peter Schwabe. This
+++ * began from SUPERCOP's curve25519/neon2/scalarmult.s, but has subsequently been
+++ * manually reworked for use in kernel space.
+++ */
+++
+++#include <asm/hwcap.h>
+++#include <asm/neon.h>
+++#include <asm/simd.h>
+++#include <crypto/internal/kpp.h>
+++#include <crypto/internal/simd.h>
+++#include <linux/types.h>
+++#include <linux/module.h>
+++#include <linux/init.h>
+++#include <linux/jump_label.h>
+++#include <crypto/curve25519.h>
+++
+++asmlinkage void curve25519_neon(u8 mypublic[CURVE25519_KEY_SIZE],
+++				const u8 secret[CURVE25519_KEY_SIZE],
+++				const u8 basepoint[CURVE25519_KEY_SIZE]);
+++
+++static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);
+++
+++void curve25519_arch(u8 out[CURVE25519_KEY_SIZE],
+++		     const u8 scalar[CURVE25519_KEY_SIZE],
+++		     const u8 point[CURVE25519_KEY_SIZE])
+++{
+++	if (static_branch_likely(&have_neon) && crypto_simd_usable()) {
+++		kernel_neon_begin();
+++		curve25519_neon(out, scalar, point);
+++		kernel_neon_end();
+++	} else {
+++		curve25519_generic(out, scalar, point);
+++	}
+++}
+++EXPORT_SYMBOL(curve25519_arch);
+++
+++static int curve25519_set_secret(struct crypto_kpp *tfm, const void *buf,
+++				 unsigned int len)
+++{
+++	u8 *secret = kpp_tfm_ctx(tfm);
+++
+++	if (!len)
+++		curve25519_generate_secret(secret);
+++	else if (len == CURVE25519_KEY_SIZE &&
+++		 crypto_memneq(buf, curve25519_null_point, CURVE25519_KEY_SIZE))
+++		memcpy(secret, buf, CURVE25519_KEY_SIZE);
+++	else
+++		return -EINVAL;
+++	return 0;
+++}
+++
+++static int curve25519_compute_value(struct kpp_request *req)
+++{
+++	struct crypto_kpp *tfm = crypto_kpp_reqtfm(req);
+++	const u8 *secret = kpp_tfm_ctx(tfm);
+++	u8 public_key[CURVE25519_KEY_SIZE];
+++	u8 buf[CURVE25519_KEY_SIZE];
+++	int copied, nbytes;
+++	u8 const *bp;
+++
+++	if (req->src) {
+++		copied = sg_copy_to_buffer(req->src,
+++					   sg_nents_for_len(req->src,
+++							    CURVE25519_KEY_SIZE),
+++					   public_key, CURVE25519_KEY_SIZE);
+++		if (copied != CURVE25519_KEY_SIZE)
+++			return -EINVAL;
+++		bp = public_key;
+++	} else {
+++		bp = curve25519_base_point;
+++	}
+++
+++	curve25519_arch(buf, secret, bp);
+++
+++	/* might want less than we've got */
+++	nbytes = min_t(size_t, CURVE25519_KEY_SIZE, req->dst_len);
+++	copied = sg_copy_from_buffer(req->dst, sg_nents_for_len(req->dst,
+++								nbytes),
+++				     buf, nbytes);
+++	if (copied != nbytes)
+++		return -EINVAL;
+++	return 0;
+++}
+++
+++static unsigned int curve25519_max_size(struct crypto_kpp *tfm)
+++{
+++	return CURVE25519_KEY_SIZE;
+++}
+++
+++static struct kpp_alg curve25519_alg = {
+++	.base.cra_name		= "curve25519",
+++	.base.cra_driver_name	= "curve25519-neon",
+++	.base.cra_priority	= 200,
+++	.base.cra_module	= THIS_MODULE,
+++	.base.cra_ctxsize	= CURVE25519_KEY_SIZE,
+++
+++	.set_secret		= curve25519_set_secret,
+++	.generate_public_key	= curve25519_compute_value,
+++	.compute_shared_secret	= curve25519_compute_value,
+++	.max_size		= curve25519_max_size,
+++};
+++
+++static int __init mod_init(void)
+++{
+++	if (elf_hwcap & HWCAP_NEON) {
+++		static_branch_enable(&have_neon);
+++		return crypto_register_kpp(&curve25519_alg);
+++	}
+++	return 0;
+++}
+++
+++static void __exit mod_exit(void)
+++{
+++	if (elf_hwcap & HWCAP_NEON)
+++		crypto_unregister_kpp(&curve25519_alg);
+++}
+++
+++module_init(mod_init);
+++module_exit(mod_exit);
+++
+++MODULE_ALIAS_CRYPTO("curve25519");
+++MODULE_ALIAS_CRYPTO("curve25519-neon");
+++MODULE_LICENSE("GPL v2");
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0032-crypto-chacha20poly1305-import-construction-and-self.patch b/target/linux/generic/backport-5.4/080-wireguard-0032-crypto-chacha20poly1305-import-construction-and-self.patch
+new file mode 100644
+index 0000000000..2d5601d7ac
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0032-crypto-chacha20poly1305-import-construction-and-self.patch
+@@ -0,0 +1,7677 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:39 +0100
++Subject: [PATCH] crypto: chacha20poly1305 - import construction and selftest
++ from Zinc
++
++commit ed20078b7e3331e82828be357147af6a3282e4ce upstream.
++
++This incorporates the chacha20poly1305 from the Zinc library, retaining
++the library interface, but replacing the implementation with calls into
++the code that already existed in the kernel's crypto API.
++
++Note that this library API does not implement RFC7539 fully, given that
++it is limited to 64-bit nonces. (The 96-bit nonce version that was part
++of the selftest only has been removed, along with the 96-bit nonce test
++vectors that only tested the selftest but not the actual library itself)
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ include/crypto/chacha20poly1305.h      |   37 +
++ lib/crypto/Kconfig                     |    7 +
++ lib/crypto/Makefile                    |    4 +
++ lib/crypto/chacha20poly1305-selftest.c | 7348 ++++++++++++++++++++++++
++ lib/crypto/chacha20poly1305.c          |  219 +
++ 5 files changed, 7615 insertions(+)
++ create mode 100644 include/crypto/chacha20poly1305.h
++ create mode 100644 lib/crypto/chacha20poly1305-selftest.c
++ create mode 100644 lib/crypto/chacha20poly1305.c
++
++--- /dev/null
+++++ b/include/crypto/chacha20poly1305.h
++@@ -0,0 +1,37 @@
+++/* SPDX-License-Identifier: GPL-2.0 OR MIT */
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#ifndef __CHACHA20POLY1305_H
+++#define __CHACHA20POLY1305_H
+++
+++#include <linux/types.h>
+++
+++enum chacha20poly1305_lengths {
+++	XCHACHA20POLY1305_NONCE_SIZE = 24,
+++	CHACHA20POLY1305_KEY_SIZE = 32,
+++	CHACHA20POLY1305_AUTHTAG_SIZE = 16
+++};
+++
+++void chacha20poly1305_encrypt(u8 *dst, const u8 *src, const size_t src_len,
+++			      const u8 *ad, const size_t ad_len,
+++			      const u64 nonce,
+++			      const u8 key[CHACHA20POLY1305_KEY_SIZE]);
+++
+++bool __must_check
+++chacha20poly1305_decrypt(u8 *dst, const u8 *src, const size_t src_len,
+++			 const u8 *ad, const size_t ad_len, const u64 nonce,
+++			 const u8 key[CHACHA20POLY1305_KEY_SIZE]);
+++
+++void xchacha20poly1305_encrypt(u8 *dst, const u8 *src, const size_t src_len,
+++			       const u8 *ad, const size_t ad_len,
+++			       const u8 nonce[XCHACHA20POLY1305_NONCE_SIZE],
+++			       const u8 key[CHACHA20POLY1305_KEY_SIZE]);
+++
+++bool __must_check xchacha20poly1305_decrypt(
+++	u8 *dst, const u8 *src, const size_t src_len, const u8 *ad,
+++	const size_t ad_len, const u8 nonce[XCHACHA20POLY1305_NONCE_SIZE],
+++	const u8 key[CHACHA20POLY1305_KEY_SIZE]);
+++
+++#endif /* __CHACHA20POLY1305_H */
++--- a/lib/crypto/Kconfig
+++++ b/lib/crypto/Kconfig
++@@ -119,5 +119,12 @@ config CRYPTO_LIB_POLY1305
++ 	  by either the generic implementation or an arch-specific one, if one
++ 	  is available and enabled.
++ 
+++config CRYPTO_LIB_CHACHA20POLY1305
+++	tristate "ChaCha20-Poly1305 AEAD support (8-byte nonce library version)"
+++	depends on CRYPTO_ARCH_HAVE_LIB_CHACHA || !CRYPTO_ARCH_HAVE_LIB_CHACHA
+++	depends on CRYPTO_ARCH_HAVE_LIB_POLY1305 || !CRYPTO_ARCH_HAVE_LIB_POLY1305
+++	select CRYPTO_LIB_CHACHA
+++	select CRYPTO_LIB_POLY1305
+++
++ config CRYPTO_LIB_SHA256
++ 	tristate
++--- a/lib/crypto/Makefile
+++++ b/lib/crypto/Makefile
++@@ -16,6 +16,9 @@ libblake2s-generic-y				+= blake2s-gener
++ obj-$(CONFIG_CRYPTO_LIB_BLAKE2S)		+= libblake2s.o
++ libblake2s-y					+= blake2s.o
++ 
+++obj-$(CONFIG_CRYPTO_LIB_CHACHA20POLY1305)	+= libchacha20poly1305.o
+++libchacha20poly1305-y				+= chacha20poly1305.o
+++
++ obj-$(CONFIG_CRYPTO_LIB_CURVE25519_GENERIC)	+= libcurve25519.o
++ libcurve25519-y					:= curve25519-fiat32.o
++ libcurve25519-$(CONFIG_ARCH_SUPPORTS_INT128)	:= curve25519-hacl64.o
++@@ -32,4 +35,5 @@ libsha256-y					:= sha256.o
++ 
++ ifneq ($(CONFIG_CRYPTO_MANAGER_DISABLE_TESTS),y)
++ libblake2s-y					+= blake2s-selftest.o
+++libchacha20poly1305-y				+= chacha20poly1305-selftest.o
++ endif
++--- /dev/null
+++++ b/lib/crypto/chacha20poly1305-selftest.c
++@@ -0,0 +1,7348 @@
+++// SPDX-License-Identifier: GPL-2.0 OR MIT
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include <crypto/chacha20poly1305.h>
+++#include <crypto/poly1305.h>
+++
+++#include <asm/unaligned.h>
+++#include <linux/bug.h>
+++#include <linux/init.h>
+++#include <linux/mm.h>
+++#include <linux/kernel.h>
+++#include <linux/slab.h>
+++
+++struct chacha20poly1305_testvec {
+++	const u8 *input, *output, *assoc, *nonce, *key;
+++	size_t ilen, alen, nlen;
+++	bool failure;
+++};
+++
+++/* The first of these are the ChaCha20-Poly1305 AEAD test vectors from RFC7539
+++ * 2.8.2. After they are generated by reference implementations. And the final
+++ * marked ones are taken from wycheproof, but we only do these for the encrypt
+++ * side, because mostly we're stressing the primitives rather than the actual
+++ * chapoly construction.
+++ */
+++
+++static const u8 enc_input001[] __initconst = {
+++	0x49, 0x6e, 0x74, 0x65, 0x72, 0x6e, 0x65, 0x74,
+++	0x2d, 0x44, 0x72, 0x61, 0x66, 0x74, 0x73, 0x20,
+++	0x61, 0x72, 0x65, 0x20, 0x64, 0x72, 0x61, 0x66,
+++	0x74, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65,
+++	0x6e, 0x74, 0x73, 0x20, 0x76, 0x61, 0x6c, 0x69,
+++	0x64, 0x20, 0x66, 0x6f, 0x72, 0x20, 0x61, 0x20,
+++	0x6d, 0x61, 0x78, 0x69, 0x6d, 0x75, 0x6d, 0x20,
+++	0x6f, 0x66, 0x20, 0x73, 0x69, 0x78, 0x20, 0x6d,
+++	0x6f, 0x6e, 0x74, 0x68, 0x73, 0x20, 0x61, 0x6e,
+++	0x64, 0x20, 0x6d, 0x61, 0x79, 0x20, 0x62, 0x65,
+++	0x20, 0x75, 0x70, 0x64, 0x61, 0x74, 0x65, 0x64,
+++	0x2c, 0x20, 0x72, 0x65, 0x70, 0x6c, 0x61, 0x63,
+++	0x65, 0x64, 0x2c, 0x20, 0x6f, 0x72, 0x20, 0x6f,
+++	0x62, 0x73, 0x6f, 0x6c, 0x65, 0x74, 0x65, 0x64,
+++	0x20, 0x62, 0x79, 0x20, 0x6f, 0x74, 0x68, 0x65,
+++	0x72, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65,
+++	0x6e, 0x74, 0x73, 0x20, 0x61, 0x74, 0x20, 0x61,
+++	0x6e, 0x79, 0x20, 0x74, 0x69, 0x6d, 0x65, 0x2e,
+++	0x20, 0x49, 0x74, 0x20, 0x69, 0x73, 0x20, 0x69,
+++	0x6e, 0x61, 0x70, 0x70, 0x72, 0x6f, 0x70, 0x72,
+++	0x69, 0x61, 0x74, 0x65, 0x20, 0x74, 0x6f, 0x20,
+++	0x75, 0x73, 0x65, 0x20, 0x49, 0x6e, 0x74, 0x65,
+++	0x72, 0x6e, 0x65, 0x74, 0x2d, 0x44, 0x72, 0x61,
+++	0x66, 0x74, 0x73, 0x20, 0x61, 0x73, 0x20, 0x72,
+++	0x65, 0x66, 0x65, 0x72, 0x65, 0x6e, 0x63, 0x65,
+++	0x20, 0x6d, 0x61, 0x74, 0x65, 0x72, 0x69, 0x61,
+++	0x6c, 0x20, 0x6f, 0x72, 0x20, 0x74, 0x6f, 0x20,
+++	0x63, 0x69, 0x74, 0x65, 0x20, 0x74, 0x68, 0x65,
+++	0x6d, 0x20, 0x6f, 0x74, 0x68, 0x65, 0x72, 0x20,
+++	0x74, 0x68, 0x61, 0x6e, 0x20, 0x61, 0x73, 0x20,
+++	0x2f, 0xe2, 0x80, 0x9c, 0x77, 0x6f, 0x72, 0x6b,
+++	0x20, 0x69, 0x6e, 0x20, 0x70, 0x72, 0x6f, 0x67,
+++	0x72, 0x65, 0x73, 0x73, 0x2e, 0x2f, 0xe2, 0x80,
+++	0x9d
+++};
+++static const u8 enc_output001[] __initconst = {
+++	0x64, 0xa0, 0x86, 0x15, 0x75, 0x86, 0x1a, 0xf4,
+++	0x60, 0xf0, 0x62, 0xc7, 0x9b, 0xe6, 0x43, 0xbd,
+++	0x5e, 0x80, 0x5c, 0xfd, 0x34, 0x5c, 0xf3, 0x89,
+++	0xf1, 0x08, 0x67, 0x0a, 0xc7, 0x6c, 0x8c, 0xb2,
+++	0x4c, 0x6c, 0xfc, 0x18, 0x75, 0x5d, 0x43, 0xee,
+++	0xa0, 0x9e, 0xe9, 0x4e, 0x38, 0x2d, 0x26, 0xb0,
+++	0xbd, 0xb7, 0xb7, 0x3c, 0x32, 0x1b, 0x01, 0x00,
+++	0xd4, 0xf0, 0x3b, 0x7f, 0x35, 0x58, 0x94, 0xcf,
+++	0x33, 0x2f, 0x83, 0x0e, 0x71, 0x0b, 0x97, 0xce,
+++	0x98, 0xc8, 0xa8, 0x4a, 0xbd, 0x0b, 0x94, 0x81,
+++	0x14, 0xad, 0x17, 0x6e, 0x00, 0x8d, 0x33, 0xbd,
+++	0x60, 0xf9, 0x82, 0xb1, 0xff, 0x37, 0xc8, 0x55,
+++	0x97, 0x97, 0xa0, 0x6e, 0xf4, 0xf0, 0xef, 0x61,
+++	0xc1, 0x86, 0x32, 0x4e, 0x2b, 0x35, 0x06, 0x38,
+++	0x36, 0x06, 0x90, 0x7b, 0x6a, 0x7c, 0x02, 0xb0,
+++	0xf9, 0xf6, 0x15, 0x7b, 0x53, 0xc8, 0x67, 0xe4,
+++	0xb9, 0x16, 0x6c, 0x76, 0x7b, 0x80, 0x4d, 0x46,
+++	0xa5, 0x9b, 0x52, 0x16, 0xcd, 0xe7, 0xa4, 0xe9,
+++	0x90, 0x40, 0xc5, 0xa4, 0x04, 0x33, 0x22, 0x5e,
+++	0xe2, 0x82, 0xa1, 0xb0, 0xa0, 0x6c, 0x52, 0x3e,
+++	0xaf, 0x45, 0x34, 0xd7, 0xf8, 0x3f, 0xa1, 0x15,
+++	0x5b, 0x00, 0x47, 0x71, 0x8c, 0xbc, 0x54, 0x6a,
+++	0x0d, 0x07, 0x2b, 0x04, 0xb3, 0x56, 0x4e, 0xea,
+++	0x1b, 0x42, 0x22, 0x73, 0xf5, 0x48, 0x27, 0x1a,
+++	0x0b, 0xb2, 0x31, 0x60, 0x53, 0xfa, 0x76, 0x99,
+++	0x19, 0x55, 0xeb, 0xd6, 0x31, 0x59, 0x43, 0x4e,
+++	0xce, 0xbb, 0x4e, 0x46, 0x6d, 0xae, 0x5a, 0x10,
+++	0x73, 0xa6, 0x72, 0x76, 0x27, 0x09, 0x7a, 0x10,
+++	0x49, 0xe6, 0x17, 0xd9, 0x1d, 0x36, 0x10, 0x94,
+++	0xfa, 0x68, 0xf0, 0xff, 0x77, 0x98, 0x71, 0x30,
+++	0x30, 0x5b, 0xea, 0xba, 0x2e, 0xda, 0x04, 0xdf,
+++	0x99, 0x7b, 0x71, 0x4d, 0x6c, 0x6f, 0x2c, 0x29,
+++	0xa6, 0xad, 0x5c, 0xb4, 0x02, 0x2b, 0x02, 0x70,
+++	0x9b, 0xee, 0xad, 0x9d, 0x67, 0x89, 0x0c, 0xbb,
+++	0x22, 0x39, 0x23, 0x36, 0xfe, 0xa1, 0x85, 0x1f,
+++	0x38
+++};
+++static const u8 enc_assoc001[] __initconst = {
+++	0xf3, 0x33, 0x88, 0x86, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x4e, 0x91
+++};
+++static const u8 enc_nonce001[] __initconst = {
+++	0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08
+++};
+++static const u8 enc_key001[] __initconst = {
+++	0x1c, 0x92, 0x40, 0xa5, 0xeb, 0x55, 0xd3, 0x8a,
+++	0xf3, 0x33, 0x88, 0x86, 0x04, 0xf6, 0xb5, 0xf0,
+++	0x47, 0x39, 0x17, 0xc1, 0x40, 0x2b, 0x80, 0x09,
+++	0x9d, 0xca, 0x5c, 0xbc, 0x20, 0x70, 0x75, 0xc0
+++};
+++
+++static const u8 enc_input002[] __initconst = { };
+++static const u8 enc_output002[] __initconst = {
+++	0xea, 0xe0, 0x1e, 0x9e, 0x2c, 0x91, 0xaa, 0xe1,
+++	0xdb, 0x5d, 0x99, 0x3f, 0x8a, 0xf7, 0x69, 0x92
+++};
+++static const u8 enc_assoc002[] __initconst = { };
+++static const u8 enc_nonce002[] __initconst = {
+++	0xca, 0xbf, 0x33, 0x71, 0x32, 0x45, 0x77, 0x8e
+++};
+++static const u8 enc_key002[] __initconst = {
+++	0x4c, 0xf5, 0x96, 0x83, 0x38, 0xe6, 0xae, 0x7f,
+++	0x2d, 0x29, 0x25, 0x76, 0xd5, 0x75, 0x27, 0x86,
+++	0x91, 0x9a, 0x27, 0x7a, 0xfb, 0x46, 0xc5, 0xef,
+++	0x94, 0x81, 0x79, 0x57, 0x14, 0x59, 0x40, 0x68
+++};
+++
+++static const u8 enc_input003[] __initconst = { };
+++static const u8 enc_output003[] __initconst = {
+++	0xdd, 0x6b, 0x3b, 0x82, 0xce, 0x5a, 0xbd, 0xd6,
+++	0xa9, 0x35, 0x83, 0xd8, 0x8c, 0x3d, 0x85, 0x77
+++};
+++static const u8 enc_assoc003[] __initconst = {
+++	0x33, 0x10, 0x41, 0x12, 0x1f, 0xf3, 0xd2, 0x6b
+++};
+++static const u8 enc_nonce003[] __initconst = {
+++	0x3d, 0x86, 0xb5, 0x6b, 0xc8, 0xa3, 0x1f, 0x1d
+++};
+++static const u8 enc_key003[] __initconst = {
+++	0x2d, 0xb0, 0x5d, 0x40, 0xc8, 0xed, 0x44, 0x88,
+++	0x34, 0xd1, 0x13, 0xaf, 0x57, 0xa1, 0xeb, 0x3a,
+++	0x2a, 0x80, 0x51, 0x36, 0xec, 0x5b, 0xbc, 0x08,
+++	0x93, 0x84, 0x21, 0xb5, 0x13, 0x88, 0x3c, 0x0d
+++};
+++
+++static const u8 enc_input004[] __initconst = {
+++	0xa4
+++};
+++static const u8 enc_output004[] __initconst = {
+++	0xb7, 0x1b, 0xb0, 0x73, 0x59, 0xb0, 0x84, 0xb2,
+++	0x6d, 0x8e, 0xab, 0x94, 0x31, 0xa1, 0xae, 0xac,
+++	0x89
+++};
+++static const u8 enc_assoc004[] __initconst = {
+++	0x6a, 0xe2, 0xad, 0x3f, 0x88, 0x39, 0x5a, 0x40
+++};
+++static const u8 enc_nonce004[] __initconst = {
+++	0xd2, 0x32, 0x1f, 0x29, 0x28, 0xc6, 0xc4, 0xc4
+++};
+++static const u8 enc_key004[] __initconst = {
+++	0x4b, 0x28, 0x4b, 0xa3, 0x7b, 0xbe, 0xe9, 0xf8,
+++	0x31, 0x80, 0x82, 0xd7, 0xd8, 0xe8, 0xb5, 0xa1,
+++	0xe2, 0x18, 0x18, 0x8a, 0x9c, 0xfa, 0xa3, 0x3d,
+++	0x25, 0x71, 0x3e, 0x40, 0xbc, 0x54, 0x7a, 0x3e
+++};
+++
+++static const u8 enc_input005[] __initconst = {
+++	0x2d
+++};
+++static const u8 enc_output005[] __initconst = {
+++	0xbf, 0xe1, 0x5b, 0x0b, 0xdb, 0x6b, 0xf5, 0x5e,
+++	0x6c, 0x5d, 0x84, 0x44, 0x39, 0x81, 0xc1, 0x9c,
+++	0xac
+++};
+++static const u8 enc_assoc005[] __initconst = { };
+++static const u8 enc_nonce005[] __initconst = {
+++	0x20, 0x1c, 0xaa, 0x5f, 0x9c, 0xbf, 0x92, 0x30
+++};
+++static const u8 enc_key005[] __initconst = {
+++	0x66, 0xca, 0x9c, 0x23, 0x2a, 0x4b, 0x4b, 0x31,
+++	0x0e, 0x92, 0x89, 0x8b, 0xf4, 0x93, 0xc7, 0x87,
+++	0x98, 0xa3, 0xd8, 0x39, 0xf8, 0xf4, 0xa7, 0x01,
+++	0xc0, 0x2e, 0x0a, 0xa6, 0x7e, 0x5a, 0x78, 0x87
+++};
+++
+++static const u8 enc_input006[] __initconst = {
+++	0x33, 0x2f, 0x94, 0xc1, 0xa4, 0xef, 0xcc, 0x2a,
+++	0x5b, 0xa6, 0xe5, 0x8f, 0x1d, 0x40, 0xf0, 0x92,
+++	0x3c, 0xd9, 0x24, 0x11, 0xa9, 0x71, 0xf9, 0x37,
+++	0x14, 0x99, 0xfa, 0xbe, 0xe6, 0x80, 0xde, 0x50,
+++	0xc9, 0x96, 0xd4, 0xb0, 0xec, 0x9e, 0x17, 0xec,
+++	0xd2, 0x5e, 0x72, 0x99, 0xfc, 0x0a, 0xe1, 0xcb,
+++	0x48, 0xd2, 0x85, 0xdd, 0x2f, 0x90, 0xe0, 0x66,
+++	0x3b, 0xe6, 0x20, 0x74, 0xbe, 0x23, 0x8f, 0xcb,
+++	0xb4, 0xe4, 0xda, 0x48, 0x40, 0xa6, 0xd1, 0x1b,
+++	0xc7, 0x42, 0xce, 0x2f, 0x0c, 0xa6, 0x85, 0x6e,
+++	0x87, 0x37, 0x03, 0xb1, 0x7c, 0x25, 0x96, 0xa3,
+++	0x05, 0xd8, 0xb0, 0xf4, 0xed, 0xea, 0xc2, 0xf0,
+++	0x31, 0x98, 0x6c, 0xd1, 0x14, 0x25, 0xc0, 0xcb,
+++	0x01, 0x74, 0xd0, 0x82, 0xf4, 0x36, 0xf5, 0x41,
+++	0xd5, 0xdc, 0xca, 0xc5, 0xbb, 0x98, 0xfe, 0xfc,
+++	0x69, 0x21, 0x70, 0xd8, 0xa4, 0x4b, 0xc8, 0xde,
+++	0x8f
+++};
+++static const u8 enc_output006[] __initconst = {
+++	0x8b, 0x06, 0xd3, 0x31, 0xb0, 0x93, 0x45, 0xb1,
+++	0x75, 0x6e, 0x26, 0xf9, 0x67, 0xbc, 0x90, 0x15,
+++	0x81, 0x2c, 0xb5, 0xf0, 0xc6, 0x2b, 0xc7, 0x8c,
+++	0x56, 0xd1, 0xbf, 0x69, 0x6c, 0x07, 0xa0, 0xda,
+++	0x65, 0x27, 0xc9, 0x90, 0x3d, 0xef, 0x4b, 0x11,
+++	0x0f, 0x19, 0x07, 0xfd, 0x29, 0x92, 0xd9, 0xc8,
+++	0xf7, 0x99, 0x2e, 0x4a, 0xd0, 0xb8, 0x2c, 0xdc,
+++	0x93, 0xf5, 0x9e, 0x33, 0x78, 0xd1, 0x37, 0xc3,
+++	0x66, 0xd7, 0x5e, 0xbc, 0x44, 0xbf, 0x53, 0xa5,
+++	0xbc, 0xc4, 0xcb, 0x7b, 0x3a, 0x8e, 0x7f, 0x02,
+++	0xbd, 0xbb, 0xe7, 0xca, 0xa6, 0x6c, 0x6b, 0x93,
+++	0x21, 0x93, 0x10, 0x61, 0xe7, 0x69, 0xd0, 0x78,
+++	0xf3, 0x07, 0x5a, 0x1a, 0x8f, 0x73, 0xaa, 0xb1,
+++	0x4e, 0xd3, 0xda, 0x4f, 0xf3, 0x32, 0xe1, 0x66,
+++	0x3e, 0x6c, 0xc6, 0x13, 0xba, 0x06, 0x5b, 0xfc,
+++	0x6a, 0xe5, 0x6f, 0x60, 0xfb, 0x07, 0x40, 0xb0,
+++	0x8c, 0x9d, 0x84, 0x43, 0x6b, 0xc1, 0xf7, 0x8d,
+++	0x8d, 0x31, 0xf7, 0x7a, 0x39, 0x4d, 0x8f, 0x9a,
+++	0xeb
+++};
+++static const u8 enc_assoc006[] __initconst = {
+++	0x70, 0xd3, 0x33, 0xf3, 0x8b, 0x18, 0x0b
+++};
+++static const u8 enc_nonce006[] __initconst = {
+++	0xdf, 0x51, 0x84, 0x82, 0x42, 0x0c, 0x75, 0x9c
+++};
+++static const u8 enc_key006[] __initconst = {
+++	0x68, 0x7b, 0x8d, 0x8e, 0xe3, 0xc4, 0xdd, 0xae,
+++	0xdf, 0x72, 0x7f, 0x53, 0x72, 0x25, 0x1e, 0x78,
+++	0x91, 0xcb, 0x69, 0x76, 0x1f, 0x49, 0x93, 0xf9,
+++	0x6f, 0x21, 0xcc, 0x39, 0x9c, 0xad, 0xb1, 0x01
+++};
+++
+++static const u8 enc_input007[] __initconst = {
+++	0x9b, 0x18, 0xdb, 0xdd, 0x9a, 0x0f, 0x3e, 0xa5,
+++	0x15, 0x17, 0xde, 0xdf, 0x08, 0x9d, 0x65, 0x0a,
+++	0x67, 0x30, 0x12, 0xe2, 0x34, 0x77, 0x4b, 0xc1,
+++	0xd9, 0xc6, 0x1f, 0xab, 0xc6, 0x18, 0x50, 0x17,
+++	0xa7, 0x9d, 0x3c, 0xa6, 0xc5, 0x35, 0x8c, 0x1c,
+++	0xc0, 0xa1, 0x7c, 0x9f, 0x03, 0x89, 0xca, 0xe1,
+++	0xe6, 0xe9, 0xd4, 0xd3, 0x88, 0xdb, 0xb4, 0x51,
+++	0x9d, 0xec, 0xb4, 0xfc, 0x52, 0xee, 0x6d, 0xf1,
+++	0x75, 0x42, 0xc6, 0xfd, 0xbd, 0x7a, 0x8e, 0x86,
+++	0xfc, 0x44, 0xb3, 0x4f, 0xf3, 0xea, 0x67, 0x5a,
+++	0x41, 0x13, 0xba, 0xb0, 0xdc, 0xe1, 0xd3, 0x2a,
+++	0x7c, 0x22, 0xb3, 0xca, 0xac, 0x6a, 0x37, 0x98,
+++	0x3e, 0x1d, 0x40, 0x97, 0xf7, 0x9b, 0x1d, 0x36,
+++	0x6b, 0xb3, 0x28, 0xbd, 0x60, 0x82, 0x47, 0x34,
+++	0xaa, 0x2f, 0x7d, 0xe9, 0xa8, 0x70, 0x81, 0x57,
+++	0xd4, 0xb9, 0x77, 0x0a, 0x9d, 0x29, 0xa7, 0x84,
+++	0x52, 0x4f, 0xc2, 0x4a, 0x40, 0x3b, 0x3c, 0xd4,
+++	0xc9, 0x2a, 0xdb, 0x4a, 0x53, 0xc4, 0xbe, 0x80,
+++	0xe9, 0x51, 0x7f, 0x8f, 0xc7, 0xa2, 0xce, 0x82,
+++	0x5c, 0x91, 0x1e, 0x74, 0xd9, 0xd0, 0xbd, 0xd5,
+++	0xf3, 0xfd, 0xda, 0x4d, 0x25, 0xb4, 0xbb, 0x2d,
+++	0xac, 0x2f, 0x3d, 0x71, 0x85, 0x7b, 0xcf, 0x3c,
+++	0x7b, 0x3e, 0x0e, 0x22, 0x78, 0x0c, 0x29, 0xbf,
+++	0xe4, 0xf4, 0x57, 0xb3, 0xcb, 0x49, 0xa0, 0xfc,
+++	0x1e, 0x05, 0x4e, 0x16, 0xbc, 0xd5, 0xa8, 0xa3,
+++	0xee, 0x05, 0x35, 0xc6, 0x7c, 0xab, 0x60, 0x14,
+++	0x55, 0x1a, 0x8e, 0xc5, 0x88, 0x5d, 0xd5, 0x81,
+++	0xc2, 0x81, 0xa5, 0xc4, 0x60, 0xdb, 0xaf, 0x77,
+++	0x91, 0xe1, 0xce, 0xa2, 0x7e, 0x7f, 0x42, 0xe3,
+++	0xb0, 0x13, 0x1c, 0x1f, 0x25, 0x60, 0x21, 0xe2,
+++	0x40, 0x5f, 0x99, 0xb7, 0x73, 0xec, 0x9b, 0x2b,
+++	0xf0, 0x65, 0x11, 0xc8, 0xd0, 0x0a, 0x9f, 0xd3
+++};
+++static const u8 enc_output007[] __initconst = {
+++	0x85, 0x04, 0xc2, 0xed, 0x8d, 0xfd, 0x97, 0x5c,
+++	0xd2, 0xb7, 0xe2, 0xc1, 0x6b, 0xa3, 0xba, 0xf8,
+++	0xc9, 0x50, 0xc3, 0xc6, 0xa5, 0xe3, 0xa4, 0x7c,
+++	0xc3, 0x23, 0x49, 0x5e, 0xa9, 0xb9, 0x32, 0xeb,
+++	0x8a, 0x7c, 0xca, 0xe5, 0xec, 0xfb, 0x7c, 0xc0,
+++	0xcb, 0x7d, 0xdc, 0x2c, 0x9d, 0x92, 0x55, 0x21,
+++	0x0a, 0xc8, 0x43, 0x63, 0x59, 0x0a, 0x31, 0x70,
+++	0x82, 0x67, 0x41, 0x03, 0xf8, 0xdf, 0xf2, 0xac,
+++	0xa7, 0x02, 0xd4, 0xd5, 0x8a, 0x2d, 0xc8, 0x99,
+++	0x19, 0x66, 0xd0, 0xf6, 0x88, 0x2c, 0x77, 0xd9,
+++	0xd4, 0x0d, 0x6c, 0xbd, 0x98, 0xde, 0xe7, 0x7f,
+++	0xad, 0x7e, 0x8a, 0xfb, 0xe9, 0x4b, 0xe5, 0xf7,
+++	0xe5, 0x50, 0xa0, 0x90, 0x3f, 0xd6, 0x22, 0x53,
+++	0xe3, 0xfe, 0x1b, 0xcc, 0x79, 0x3b, 0xec, 0x12,
+++	0x47, 0x52, 0xa7, 0xd6, 0x04, 0xe3, 0x52, 0xe6,
+++	0x93, 0x90, 0x91, 0x32, 0x73, 0x79, 0xb8, 0xd0,
+++	0x31, 0xde, 0x1f, 0x9f, 0x2f, 0x05, 0x38, 0x54,
+++	0x2f, 0x35, 0x04, 0x39, 0xe0, 0xa7, 0xba, 0xc6,
+++	0x52, 0xf6, 0x37, 0x65, 0x4c, 0x07, 0xa9, 0x7e,
+++	0xb3, 0x21, 0x6f, 0x74, 0x8c, 0xc9, 0xde, 0xdb,
+++	0x65, 0x1b, 0x9b, 0xaa, 0x60, 0xb1, 0x03, 0x30,
+++	0x6b, 0xb2, 0x03, 0xc4, 0x1c, 0x04, 0xf8, 0x0f,
+++	0x64, 0xaf, 0x46, 0xe4, 0x65, 0x99, 0x49, 0xe2,
+++	0xea, 0xce, 0x78, 0x00, 0xd8, 0x8b, 0xd5, 0x2e,
+++	0xcf, 0xfc, 0x40, 0x49, 0xe8, 0x58, 0xdc, 0x34,
+++	0x9c, 0x8c, 0x61, 0xbf, 0x0a, 0x8e, 0xec, 0x39,
+++	0xa9, 0x30, 0x05, 0x5a, 0xd2, 0x56, 0x01, 0xc7,
+++	0xda, 0x8f, 0x4e, 0xbb, 0x43, 0xa3, 0x3a, 0xf9,
+++	0x15, 0x2a, 0xd0, 0xa0, 0x7a, 0x87, 0x34, 0x82,
+++	0xfe, 0x8a, 0xd1, 0x2d, 0x5e, 0xc7, 0xbf, 0x04,
+++	0x53, 0x5f, 0x3b, 0x36, 0xd4, 0x25, 0x5c, 0x34,
+++	0x7a, 0x8d, 0xd5, 0x05, 0xce, 0x72, 0xca, 0xef,
+++	0x7a, 0x4b, 0xbc, 0xb0, 0x10, 0x5c, 0x96, 0x42,
+++	0x3a, 0x00, 0x98, 0xcd, 0x15, 0xe8, 0xb7, 0x53
+++};
+++static const u8 enc_assoc007[] __initconst = { };
+++static const u8 enc_nonce007[] __initconst = {
+++	0xde, 0x7b, 0xef, 0xc3, 0x65, 0x1b, 0x68, 0xb0
+++};
+++static const u8 enc_key007[] __initconst = {
+++	0x8d, 0xb8, 0x91, 0x48, 0xf0, 0xe7, 0x0a, 0xbd,
+++	0xf9, 0x3f, 0xcd, 0xd9, 0xa0, 0x1e, 0x42, 0x4c,
+++	0xe7, 0xde, 0x25, 0x3d, 0xa3, 0xd7, 0x05, 0x80,
+++	0x8d, 0xf2, 0x82, 0xac, 0x44, 0x16, 0x51, 0x01
+++};
+++
+++static const u8 enc_input008[] __initconst = {
+++	0xc3, 0x09, 0x94, 0x62, 0xe6, 0x46, 0x2e, 0x10,
+++	0xbe, 0x00, 0xe4, 0xfc, 0xf3, 0x40, 0xa3, 0xe2,
+++	0x0f, 0xc2, 0x8b, 0x28, 0xdc, 0xba, 0xb4, 0x3c,
+++	0xe4, 0x21, 0x58, 0x61, 0xcd, 0x8b, 0xcd, 0xfb,
+++	0xac, 0x94, 0xa1, 0x45, 0xf5, 0x1c, 0xe1, 0x12,
+++	0xe0, 0x3b, 0x67, 0x21, 0x54, 0x5e, 0x8c, 0xaa,
+++	0xcf, 0xdb, 0xb4, 0x51, 0xd4, 0x13, 0xda, 0xe6,
+++	0x83, 0x89, 0xb6, 0x92, 0xe9, 0x21, 0x76, 0xa4,
+++	0x93, 0x7d, 0x0e, 0xfd, 0x96, 0x36, 0x03, 0x91,
+++	0x43, 0x5c, 0x92, 0x49, 0x62, 0x61, 0x7b, 0xeb,
+++	0x43, 0x89, 0xb8, 0x12, 0x20, 0x43, 0xd4, 0x47,
+++	0x06, 0x84, 0xee, 0x47, 0xe9, 0x8a, 0x73, 0x15,
+++	0x0f, 0x72, 0xcf, 0xed, 0xce, 0x96, 0xb2, 0x7f,
+++	0x21, 0x45, 0x76, 0xeb, 0x26, 0x28, 0x83, 0x6a,
+++	0xad, 0xaa, 0xa6, 0x81, 0xd8, 0x55, 0xb1, 0xa3,
+++	0x85, 0xb3, 0x0c, 0xdf, 0xf1, 0x69, 0x2d, 0x97,
+++	0x05, 0x2a, 0xbc, 0x7c, 0x7b, 0x25, 0xf8, 0x80,
+++	0x9d, 0x39, 0x25, 0xf3, 0x62, 0xf0, 0x66, 0x5e,
+++	0xf4, 0xa0, 0xcf, 0xd8, 0xfd, 0x4f, 0xb1, 0x1f,
+++	0x60, 0x3a, 0x08, 0x47, 0xaf, 0xe1, 0xf6, 0x10,
+++	0x77, 0x09, 0xa7, 0x27, 0x8f, 0x9a, 0x97, 0x5a,
+++	0x26, 0xfa, 0xfe, 0x41, 0x32, 0x83, 0x10, 0xe0,
+++	0x1d, 0xbf, 0x64, 0x0d, 0xf4, 0x1c, 0x32, 0x35,
+++	0xe5, 0x1b, 0x36, 0xef, 0xd4, 0x4a, 0x93, 0x4d,
+++	0x00, 0x7c, 0xec, 0x02, 0x07, 0x8b, 0x5d, 0x7d,
+++	0x1b, 0x0e, 0xd1, 0xa6, 0xa5, 0x5d, 0x7d, 0x57,
+++	0x88, 0xa8, 0xcc, 0x81, 0xb4, 0x86, 0x4e, 0xb4,
+++	0x40, 0xe9, 0x1d, 0xc3, 0xb1, 0x24, 0x3e, 0x7f,
+++	0xcc, 0x8a, 0x24, 0x9b, 0xdf, 0x6d, 0xf0, 0x39,
+++	0x69, 0x3e, 0x4c, 0xc0, 0x96, 0xe4, 0x13, 0xda,
+++	0x90, 0xda, 0xf4, 0x95, 0x66, 0x8b, 0x17, 0x17,
+++	0xfe, 0x39, 0x43, 0x25, 0xaa, 0xda, 0xa0, 0x43,
+++	0x3c, 0xb1, 0x41, 0x02, 0xa3, 0xf0, 0xa7, 0x19,
+++	0x59, 0xbc, 0x1d, 0x7d, 0x6c, 0x6d, 0x91, 0x09,
+++	0x5c, 0xb7, 0x5b, 0x01, 0xd1, 0x6f, 0x17, 0x21,
+++	0x97, 0xbf, 0x89, 0x71, 0xa5, 0xb0, 0x6e, 0x07,
+++	0x45, 0xfd, 0x9d, 0xea, 0x07, 0xf6, 0x7a, 0x9f,
+++	0x10, 0x18, 0x22, 0x30, 0x73, 0xac, 0xd4, 0x6b,
+++	0x72, 0x44, 0xed, 0xd9, 0x19, 0x9b, 0x2d, 0x4a,
+++	0x41, 0xdd, 0xd1, 0x85, 0x5e, 0x37, 0x19, 0xed,
+++	0xd2, 0x15, 0x8f, 0x5e, 0x91, 0xdb, 0x33, 0xf2,
+++	0xe4, 0xdb, 0xff, 0x98, 0xfb, 0xa3, 0xb5, 0xca,
+++	0x21, 0x69, 0x08, 0xe7, 0x8a, 0xdf, 0x90, 0xff,
+++	0x3e, 0xe9, 0x20, 0x86, 0x3c, 0xe9, 0xfc, 0x0b,
+++	0xfe, 0x5c, 0x61, 0xaa, 0x13, 0x92, 0x7f, 0x7b,
+++	0xec, 0xe0, 0x6d, 0xa8, 0x23, 0x22, 0xf6, 0x6b,
+++	0x77, 0xc4, 0xfe, 0x40, 0x07, 0x3b, 0xb6, 0xf6,
+++	0x8e, 0x5f, 0xd4, 0xb9, 0xb7, 0x0f, 0x21, 0x04,
+++	0xef, 0x83, 0x63, 0x91, 0x69, 0x40, 0xa3, 0x48,
+++	0x5c, 0xd2, 0x60, 0xf9, 0x4f, 0x6c, 0x47, 0x8b,
+++	0x3b, 0xb1, 0x9f, 0x8e, 0xee, 0x16, 0x8a, 0x13,
+++	0xfc, 0x46, 0x17, 0xc3, 0xc3, 0x32, 0x56, 0xf8,
+++	0x3c, 0x85, 0x3a, 0xb6, 0x3e, 0xaa, 0x89, 0x4f,
+++	0xb3, 0xdf, 0x38, 0xfd, 0xf1, 0xe4, 0x3a, 0xc0,
+++	0xe6, 0x58, 0xb5, 0x8f, 0xc5, 0x29, 0xa2, 0x92,
+++	0x4a, 0xb6, 0xa0, 0x34, 0x7f, 0xab, 0xb5, 0x8a,
+++	0x90, 0xa1, 0xdb, 0x4d, 0xca, 0xb6, 0x2c, 0x41,
+++	0x3c, 0xf7, 0x2b, 0x21, 0xc3, 0xfd, 0xf4, 0x17,
+++	0x5c, 0xb5, 0x33, 0x17, 0x68, 0x2b, 0x08, 0x30,
+++	0xf3, 0xf7, 0x30, 0x3c, 0x96, 0xe6, 0x6a, 0x20,
+++	0x97, 0xe7, 0x4d, 0x10, 0x5f, 0x47, 0x5f, 0x49,
+++	0x96, 0x09, 0xf0, 0x27, 0x91, 0xc8, 0xf8, 0x5a,
+++	0x2e, 0x79, 0xb5, 0xe2, 0xb8, 0xe8, 0xb9, 0x7b,
+++	0xd5, 0x10, 0xcb, 0xff, 0x5d, 0x14, 0x73, 0xf3
+++};
+++static const u8 enc_output008[] __initconst = {
+++	0x14, 0xf6, 0x41, 0x37, 0xa6, 0xd4, 0x27, 0xcd,
+++	0xdb, 0x06, 0x3e, 0x9a, 0x4e, 0xab, 0xd5, 0xb1,
+++	0x1e, 0x6b, 0xd2, 0xbc, 0x11, 0xf4, 0x28, 0x93,
+++	0x63, 0x54, 0xef, 0xbb, 0x5e, 0x1d, 0x3a, 0x1d,
+++	0x37, 0x3c, 0x0a, 0x6c, 0x1e, 0xc2, 0xd1, 0x2c,
+++	0xb5, 0xa3, 0xb5, 0x7b, 0xb8, 0x8f, 0x25, 0xa6,
+++	0x1b, 0x61, 0x1c, 0xec, 0x28, 0x58, 0x26, 0xa4,
+++	0xa8, 0x33, 0x28, 0x25, 0x5c, 0x45, 0x05, 0xe5,
+++	0x6c, 0x99, 0xe5, 0x45, 0xc4, 0xa2, 0x03, 0x84,
+++	0x03, 0x73, 0x1e, 0x8c, 0x49, 0xac, 0x20, 0xdd,
+++	0x8d, 0xb3, 0xc4, 0xf5, 0xe7, 0x4f, 0xf1, 0xed,
+++	0xa1, 0x98, 0xde, 0xa4, 0x96, 0xdd, 0x2f, 0xab,
+++	0xab, 0x97, 0xcf, 0x3e, 0xd2, 0x9e, 0xb8, 0x13,
+++	0x07, 0x28, 0x29, 0x19, 0xaf, 0xfd, 0xf2, 0x49,
+++	0x43, 0xea, 0x49, 0x26, 0x91, 0xc1, 0x07, 0xd6,
+++	0xbb, 0x81, 0x75, 0x35, 0x0d, 0x24, 0x7f, 0xc8,
+++	0xda, 0xd4, 0xb7, 0xeb, 0xe8, 0x5c, 0x09, 0xa2,
+++	0x2f, 0xdc, 0x28, 0x7d, 0x3a, 0x03, 0xfa, 0x94,
+++	0xb5, 0x1d, 0x17, 0x99, 0x36, 0xc3, 0x1c, 0x18,
+++	0x34, 0xe3, 0x9f, 0xf5, 0x55, 0x7c, 0xb0, 0x60,
+++	0x9d, 0xff, 0xac, 0xd4, 0x61, 0xf2, 0xad, 0xf8,
+++	0xce, 0xc7, 0xbe, 0x5c, 0xd2, 0x95, 0xa8, 0x4b,
+++	0x77, 0x13, 0x19, 0x59, 0x26, 0xc9, 0xb7, 0x8f,
+++	0x6a, 0xcb, 0x2d, 0x37, 0x91, 0xea, 0x92, 0x9c,
+++	0x94, 0x5b, 0xda, 0x0b, 0xce, 0xfe, 0x30, 0x20,
+++	0xf8, 0x51, 0xad, 0xf2, 0xbe, 0xe7, 0xc7, 0xff,
+++	0xb3, 0x33, 0x91, 0x6a, 0xc9, 0x1a, 0x41, 0xc9,
+++	0x0f, 0xf3, 0x10, 0x0e, 0xfd, 0x53, 0xff, 0x6c,
+++	0x16, 0x52, 0xd9, 0xf3, 0xf7, 0x98, 0x2e, 0xc9,
+++	0x07, 0x31, 0x2c, 0x0c, 0x72, 0xd7, 0xc5, 0xc6,
+++	0x08, 0x2a, 0x7b, 0xda, 0xbd, 0x7e, 0x02, 0xea,
+++	0x1a, 0xbb, 0xf2, 0x04, 0x27, 0x61, 0x28, 0x8e,
+++	0xf5, 0x04, 0x03, 0x1f, 0x4c, 0x07, 0x55, 0x82,
+++	0xec, 0x1e, 0xd7, 0x8b, 0x2f, 0x65, 0x56, 0xd1,
+++	0xd9, 0x1e, 0x3c, 0xe9, 0x1f, 0x5e, 0x98, 0x70,
+++	0x38, 0x4a, 0x8c, 0x49, 0xc5, 0x43, 0xa0, 0xa1,
+++	0x8b, 0x74, 0x9d, 0x4c, 0x62, 0x0d, 0x10, 0x0c,
+++	0xf4, 0x6c, 0x8f, 0xe0, 0xaa, 0x9a, 0x8d, 0xb7,
+++	0xe0, 0xbe, 0x4c, 0x87, 0xf1, 0x98, 0x2f, 0xcc,
+++	0xed, 0xc0, 0x52, 0x29, 0xdc, 0x83, 0xf8, 0xfc,
+++	0x2c, 0x0e, 0xa8, 0x51, 0x4d, 0x80, 0x0d, 0xa3,
+++	0xfe, 0xd8, 0x37, 0xe7, 0x41, 0x24, 0xfc, 0xfb,
+++	0x75, 0xe3, 0x71, 0x7b, 0x57, 0x45, 0xf5, 0x97,
+++	0x73, 0x65, 0x63, 0x14, 0x74, 0xb8, 0x82, 0x9f,
+++	0xf8, 0x60, 0x2f, 0x8a, 0xf2, 0x4e, 0xf1, 0x39,
+++	0xda, 0x33, 0x91, 0xf8, 0x36, 0xe0, 0x8d, 0x3f,
+++	0x1f, 0x3b, 0x56, 0xdc, 0xa0, 0x8f, 0x3c, 0x9d,
+++	0x71, 0x52, 0xa7, 0xb8, 0xc0, 0xa5, 0xc6, 0xa2,
+++	0x73, 0xda, 0xf4, 0x4b, 0x74, 0x5b, 0x00, 0x3d,
+++	0x99, 0xd7, 0x96, 0xba, 0xe6, 0xe1, 0xa6, 0x96,
+++	0x38, 0xad, 0xb3, 0xc0, 0xd2, 0xba, 0x91, 0x6b,
+++	0xf9, 0x19, 0xdd, 0x3b, 0xbe, 0xbe, 0x9c, 0x20,
+++	0x50, 0xba, 0xa1, 0xd0, 0xce, 0x11, 0xbd, 0x95,
+++	0xd8, 0xd1, 0xdd, 0x33, 0x85, 0x74, 0xdc, 0xdb,
+++	0x66, 0x76, 0x44, 0xdc, 0x03, 0x74, 0x48, 0x35,
+++	0x98, 0xb1, 0x18, 0x47, 0x94, 0x7d, 0xff, 0x62,
+++	0xe4, 0x58, 0x78, 0xab, 0xed, 0x95, 0x36, 0xd9,
+++	0x84, 0x91, 0x82, 0x64, 0x41, 0xbb, 0x58, 0xe6,
+++	0x1c, 0x20, 0x6d, 0x15, 0x6b, 0x13, 0x96, 0xe8,
+++	0x35, 0x7f, 0xdc, 0x40, 0x2c, 0xe9, 0xbc, 0x8a,
+++	0x4f, 0x92, 0xec, 0x06, 0x2d, 0x50, 0xdf, 0x93,
+++	0x5d, 0x65, 0x5a, 0xa8, 0xfc, 0x20, 0x50, 0x14,
+++	0xa9, 0x8a, 0x7e, 0x1d, 0x08, 0x1f, 0xe2, 0x99,
+++	0xd0, 0xbe, 0xfb, 0x3a, 0x21, 0x9d, 0xad, 0x86,
+++	0x54, 0xfd, 0x0d, 0x98, 0x1c, 0x5a, 0x6f, 0x1f,
+++	0x9a, 0x40, 0xcd, 0xa2, 0xff, 0x6a, 0xf1, 0x54
+++};
+++static const u8 enc_assoc008[] __initconst = { };
+++static const u8 enc_nonce008[] __initconst = {
+++	0x0e, 0x0d, 0x57, 0xbb, 0x7b, 0x40, 0x54, 0x02
+++};
+++static const u8 enc_key008[] __initconst = {
+++	0xf2, 0xaa, 0x4f, 0x99, 0xfd, 0x3e, 0xa8, 0x53,
+++	0xc1, 0x44, 0xe9, 0x81, 0x18, 0xdc, 0xf5, 0xf0,
+++	0x3e, 0x44, 0x15, 0x59, 0xe0, 0xc5, 0x44, 0x86,
+++	0xc3, 0x91, 0xa8, 0x75, 0xc0, 0x12, 0x46, 0xba
+++};
+++
+++static const u8 enc_input009[] __initconst = {
+++	0xe6, 0xc3, 0xdb, 0x63, 0x55, 0x15, 0xe3, 0x5b,
+++	0xb7, 0x4b, 0x27, 0x8b, 0x5a, 0xdd, 0xc2, 0xe8,
+++	0x3a, 0x6b, 0xd7, 0x81, 0x96, 0x35, 0x97, 0xca,
+++	0xd7, 0x68, 0xe8, 0xef, 0xce, 0xab, 0xda, 0x09,
+++	0x6e, 0xd6, 0x8e, 0xcb, 0x55, 0xb5, 0xe1, 0xe5,
+++	0x57, 0xfd, 0xc4, 0xe3, 0xe0, 0x18, 0x4f, 0x85,
+++	0xf5, 0x3f, 0x7e, 0x4b, 0x88, 0xc9, 0x52, 0x44,
+++	0x0f, 0xea, 0xaf, 0x1f, 0x71, 0x48, 0x9f, 0x97,
+++	0x6d, 0xb9, 0x6f, 0x00, 0xa6, 0xde, 0x2b, 0x77,
+++	0x8b, 0x15, 0xad, 0x10, 0xa0, 0x2b, 0x7b, 0x41,
+++	0x90, 0x03, 0x2d, 0x69, 0xae, 0xcc, 0x77, 0x7c,
+++	0xa5, 0x9d, 0x29, 0x22, 0xc2, 0xea, 0xb4, 0x00,
+++	0x1a, 0xd2, 0x7a, 0x98, 0x8a, 0xf9, 0xf7, 0x82,
+++	0xb0, 0xab, 0xd8, 0xa6, 0x94, 0x8d, 0x58, 0x2f,
+++	0x01, 0x9e, 0x00, 0x20, 0xfc, 0x49, 0xdc, 0x0e,
+++	0x03, 0xe8, 0x45, 0x10, 0xd6, 0xa8, 0xda, 0x55,
+++	0x10, 0x9a, 0xdf, 0x67, 0x22, 0x8b, 0x43, 0xab,
+++	0x00, 0xbb, 0x02, 0xc8, 0xdd, 0x7b, 0x97, 0x17,
+++	0xd7, 0x1d, 0x9e, 0x02, 0x5e, 0x48, 0xde, 0x8e,
+++	0xcf, 0x99, 0x07, 0x95, 0x92, 0x3c, 0x5f, 0x9f,
+++	0xc5, 0x8a, 0xc0, 0x23, 0xaa, 0xd5, 0x8c, 0x82,
+++	0x6e, 0x16, 0x92, 0xb1, 0x12, 0x17, 0x07, 0xc3,
+++	0xfb, 0x36, 0xf5, 0x6c, 0x35, 0xd6, 0x06, 0x1f,
+++	0x9f, 0xa7, 0x94, 0xa2, 0x38, 0x63, 0x9c, 0xb0,
+++	0x71, 0xb3, 0xa5, 0xd2, 0xd8, 0xba, 0x9f, 0x08,
+++	0x01, 0xb3, 0xff, 0x04, 0x97, 0x73, 0x45, 0x1b,
+++	0xd5, 0xa9, 0x9c, 0x80, 0xaf, 0x04, 0x9a, 0x85,
+++	0xdb, 0x32, 0x5b, 0x5d, 0x1a, 0xc1, 0x36, 0x28,
+++	0x10, 0x79, 0xf1, 0x3c, 0xbf, 0x1a, 0x41, 0x5c,
+++	0x4e, 0xdf, 0xb2, 0x7c, 0x79, 0x3b, 0x7a, 0x62,
+++	0x3d, 0x4b, 0xc9, 0x9b, 0x2a, 0x2e, 0x7c, 0xa2,
+++	0xb1, 0x11, 0x98, 0xa7, 0x34, 0x1a, 0x00, 0xf3,
+++	0xd1, 0xbc, 0x18, 0x22, 0xba, 0x02, 0x56, 0x62,
+++	0x31, 0x10, 0x11, 0x6d, 0xe0, 0x54, 0x9d, 0x40,
+++	0x1f, 0x26, 0x80, 0x41, 0xca, 0x3f, 0x68, 0x0f,
+++	0x32, 0x1d, 0x0a, 0x8e, 0x79, 0xd8, 0xa4, 0x1b,
+++	0x29, 0x1c, 0x90, 0x8e, 0xc5, 0xe3, 0xb4, 0x91,
+++	0x37, 0x9a, 0x97, 0x86, 0x99, 0xd5, 0x09, 0xc5,
+++	0xbb, 0xa3, 0x3f, 0x21, 0x29, 0x82, 0x14, 0x5c,
+++	0xab, 0x25, 0xfb, 0xf2, 0x4f, 0x58, 0x26, 0xd4,
+++	0x83, 0xaa, 0x66, 0x89, 0x67, 0x7e, 0xc0, 0x49,
+++	0xe1, 0x11, 0x10, 0x7f, 0x7a, 0xda, 0x29, 0x04,
+++	0xff, 0xf0, 0xcb, 0x09, 0x7c, 0x9d, 0xfa, 0x03,
+++	0x6f, 0x81, 0x09, 0x31, 0x60, 0xfb, 0x08, 0xfa,
+++	0x74, 0xd3, 0x64, 0x44, 0x7c, 0x55, 0x85, 0xec,
+++	0x9c, 0x6e, 0x25, 0xb7, 0x6c, 0xc5, 0x37, 0xb6,
+++	0x83, 0x87, 0x72, 0x95, 0x8b, 0x9d, 0xe1, 0x69,
+++	0x5c, 0x31, 0x95, 0x42, 0xa6, 0x2c, 0xd1, 0x36,
+++	0x47, 0x1f, 0xec, 0x54, 0xab, 0xa2, 0x1c, 0xd8,
+++	0x00, 0xcc, 0xbc, 0x0d, 0x65, 0xe2, 0x67, 0xbf,
+++	0xbc, 0xea, 0xee, 0x9e, 0xe4, 0x36, 0x95, 0xbe,
+++	0x73, 0xd9, 0xa6, 0xd9, 0x0f, 0xa0, 0xcc, 0x82,
+++	0x76, 0x26, 0xad, 0x5b, 0x58, 0x6c, 0x4e, 0xab,
+++	0x29, 0x64, 0xd3, 0xd9, 0xa9, 0x08, 0x8c, 0x1d,
+++	0xa1, 0x4f, 0x80, 0xd8, 0x3f, 0x94, 0xfb, 0xd3,
+++	0x7b, 0xfc, 0xd1, 0x2b, 0xc3, 0x21, 0xeb, 0xe5,
+++	0x1c, 0x84, 0x23, 0x7f, 0x4b, 0xfa, 0xdb, 0x34,
+++	0x18, 0xa2, 0xc2, 0xe5, 0x13, 0xfe, 0x6c, 0x49,
+++	0x81, 0xd2, 0x73, 0xe7, 0xe2, 0xd7, 0xe4, 0x4f,
+++	0x4b, 0x08, 0x6e, 0xb1, 0x12, 0x22, 0x10, 0x9d,
+++	0xac, 0x51, 0x1e, 0x17, 0xd9, 0x8a, 0x0b, 0x42,
+++	0x88, 0x16, 0x81, 0x37, 0x7c, 0x6a, 0xf7, 0xef,
+++	0x2d, 0xe3, 0xd9, 0xf8, 0x5f, 0xe0, 0x53, 0x27,
+++	0x74, 0xb9, 0xe2, 0xd6, 0x1c, 0x80, 0x2c, 0x52,
+++	0x65
+++};
+++static const u8 enc_output009[] __initconst = {
+++	0xfd, 0x81, 0x8d, 0xd0, 0x3d, 0xb4, 0xd5, 0xdf,
+++	0xd3, 0x42, 0x47, 0x5a, 0x6d, 0x19, 0x27, 0x66,
+++	0x4b, 0x2e, 0x0c, 0x27, 0x9c, 0x96, 0x4c, 0x72,
+++	0x02, 0xa3, 0x65, 0xc3, 0xb3, 0x6f, 0x2e, 0xbd,
+++	0x63, 0x8a, 0x4a, 0x5d, 0x29, 0xa2, 0xd0, 0x28,
+++	0x48, 0xc5, 0x3d, 0x98, 0xa3, 0xbc, 0xe0, 0xbe,
+++	0x3b, 0x3f, 0xe6, 0x8a, 0xa4, 0x7f, 0x53, 0x06,
+++	0xfa, 0x7f, 0x27, 0x76, 0x72, 0x31, 0xa1, 0xf5,
+++	0xd6, 0x0c, 0x52, 0x47, 0xba, 0xcd, 0x4f, 0xd7,
+++	0xeb, 0x05, 0x48, 0x0d, 0x7c, 0x35, 0x4a, 0x09,
+++	0xc9, 0x76, 0x71, 0x02, 0xa3, 0xfb, 0xb7, 0x1a,
+++	0x65, 0xb7, 0xed, 0x98, 0xc6, 0x30, 0x8a, 0x00,
+++	0xae, 0xa1, 0x31, 0xe5, 0xb5, 0x9e, 0x6d, 0x62,
+++	0xda, 0xda, 0x07, 0x0f, 0x38, 0x38, 0xd3, 0xcb,
+++	0xc1, 0xb0, 0xad, 0xec, 0x72, 0xec, 0xb1, 0xa2,
+++	0x7b, 0x59, 0xf3, 0x3d, 0x2b, 0xef, 0xcd, 0x28,
+++	0x5b, 0x83, 0xcc, 0x18, 0x91, 0x88, 0xb0, 0x2e,
+++	0xf9, 0x29, 0x31, 0x18, 0xf9, 0x4e, 0xe9, 0x0a,
+++	0x91, 0x92, 0x9f, 0xae, 0x2d, 0xad, 0xf4, 0xe6,
+++	0x1a, 0xe2, 0xa4, 0xee, 0x47, 0x15, 0xbf, 0x83,
+++	0x6e, 0xd7, 0x72, 0x12, 0x3b, 0x2d, 0x24, 0xe9,
+++	0xb2, 0x55, 0xcb, 0x3c, 0x10, 0xf0, 0x24, 0x8a,
+++	0x4a, 0x02, 0xea, 0x90, 0x25, 0xf0, 0xb4, 0x79,
+++	0x3a, 0xef, 0x6e, 0xf5, 0x52, 0xdf, 0xb0, 0x0a,
+++	0xcd, 0x24, 0x1c, 0xd3, 0x2e, 0x22, 0x74, 0xea,
+++	0x21, 0x6f, 0xe9, 0xbd, 0xc8, 0x3e, 0x36, 0x5b,
+++	0x19, 0xf1, 0xca, 0x99, 0x0a, 0xb4, 0xa7, 0x52,
+++	0x1a, 0x4e, 0xf2, 0xad, 0x8d, 0x56, 0x85, 0xbb,
+++	0x64, 0x89, 0xba, 0x26, 0xf9, 0xc7, 0xe1, 0x89,
+++	0x19, 0x22, 0x77, 0xc3, 0xa8, 0xfc, 0xff, 0xad,
+++	0xfe, 0xb9, 0x48, 0xae, 0x12, 0x30, 0x9f, 0x19,
+++	0xfb, 0x1b, 0xef, 0x14, 0x87, 0x8a, 0x78, 0x71,
+++	0xf3, 0xf4, 0xb7, 0x00, 0x9c, 0x1d, 0xb5, 0x3d,
+++	0x49, 0x00, 0x0c, 0x06, 0xd4, 0x50, 0xf9, 0x54,
+++	0x45, 0xb2, 0x5b, 0x43, 0xdb, 0x6d, 0xcf, 0x1a,
+++	0xe9, 0x7a, 0x7a, 0xcf, 0xfc, 0x8a, 0x4e, 0x4d,
+++	0x0b, 0x07, 0x63, 0x28, 0xd8, 0xe7, 0x08, 0x95,
+++	0xdf, 0xa6, 0x72, 0x93, 0x2e, 0xbb, 0xa0, 0x42,
+++	0x89, 0x16, 0xf1, 0xd9, 0x0c, 0xf9, 0xa1, 0x16,
+++	0xfd, 0xd9, 0x03, 0xb4, 0x3b, 0x8a, 0xf5, 0xf6,
+++	0xe7, 0x6b, 0x2e, 0x8e, 0x4c, 0x3d, 0xe2, 0xaf,
+++	0x08, 0x45, 0x03, 0xff, 0x09, 0xb6, 0xeb, 0x2d,
+++	0xc6, 0x1b, 0x88, 0x94, 0xac, 0x3e, 0xf1, 0x9f,
+++	0x0e, 0x0e, 0x2b, 0xd5, 0x00, 0x4d, 0x3f, 0x3b,
+++	0x53, 0xae, 0xaf, 0x1c, 0x33, 0x5f, 0x55, 0x6e,
+++	0x8d, 0xaf, 0x05, 0x7a, 0x10, 0x34, 0xc9, 0xf4,
+++	0x66, 0xcb, 0x62, 0x12, 0xa6, 0xee, 0xe8, 0x1c,
+++	0x5d, 0x12, 0x86, 0xdb, 0x6f, 0x1c, 0x33, 0xc4,
+++	0x1c, 0xda, 0x82, 0x2d, 0x3b, 0x59, 0xfe, 0xb1,
+++	0xa4, 0x59, 0x41, 0x86, 0xd0, 0xef, 0xae, 0xfb,
+++	0xda, 0x6d, 0x11, 0xb8, 0xca, 0xe9, 0x6e, 0xff,
+++	0xf7, 0xa9, 0xd9, 0x70, 0x30, 0xfc, 0x53, 0xe2,
+++	0xd7, 0xa2, 0x4e, 0xc7, 0x91, 0xd9, 0x07, 0x06,
+++	0xaa, 0xdd, 0xb0, 0x59, 0x28, 0x1d, 0x00, 0x66,
+++	0xc5, 0x54, 0xc2, 0xfc, 0x06, 0xda, 0x05, 0x90,
+++	0x52, 0x1d, 0x37, 0x66, 0xee, 0xf0, 0xb2, 0x55,
+++	0x8a, 0x5d, 0xd2, 0x38, 0x86, 0x94, 0x9b, 0xfc,
+++	0x10, 0x4c, 0xa1, 0xb9, 0x64, 0x3e, 0x44, 0xb8,
+++	0x5f, 0xb0, 0x0c, 0xec, 0xe0, 0xc9, 0xe5, 0x62,
+++	0x75, 0x3f, 0x09, 0xd5, 0xf5, 0xd9, 0x26, 0xba,
+++	0x9e, 0xd2, 0xf4, 0xb9, 0x48, 0x0a, 0xbc, 0xa2,
+++	0xd6, 0x7c, 0x36, 0x11, 0x7d, 0x26, 0x81, 0x89,
+++	0xcf, 0xa4, 0xad, 0x73, 0x0e, 0xee, 0xcc, 0x06,
+++	0xa9, 0xdb, 0xb1, 0xfd, 0xfb, 0x09, 0x7f, 0x90,
+++	0x42, 0x37, 0x2f, 0xe1, 0x9c, 0x0f, 0x6f, 0xcf,
+++	0x43, 0xb5, 0xd9, 0x90, 0xe1, 0x85, 0xf5, 0xa8,
+++	0xae
+++};
+++static const u8 enc_assoc009[] __initconst = {
+++	0x5a, 0x27, 0xff, 0xeb, 0xdf, 0x84, 0xb2, 0x9e,
+++	0xef
+++};
+++static const u8 enc_nonce009[] __initconst = {
+++	0xef, 0x2d, 0x63, 0xee, 0x6b, 0x80, 0x8b, 0x78
+++};
+++static const u8 enc_key009[] __initconst = {
+++	0xea, 0xbc, 0x56, 0x99, 0xe3, 0x50, 0xff, 0xc5,
+++	0xcc, 0x1a, 0xd7, 0xc1, 0x57, 0x72, 0xea, 0x86,
+++	0x5b, 0x89, 0x88, 0x61, 0x3d, 0x2f, 0x9b, 0xb2,
+++	0xe7, 0x9c, 0xec, 0x74, 0x6e, 0x3e, 0xf4, 0x3b
+++};
+++
+++static const u8 enc_input010[] __initconst = {
+++	0x42, 0x93, 0xe4, 0xeb, 0x97, 0xb0, 0x57, 0xbf,
+++	0x1a, 0x8b, 0x1f, 0xe4, 0x5f, 0x36, 0x20, 0x3c,
+++	0xef, 0x0a, 0xa9, 0x48, 0x5f, 0x5f, 0x37, 0x22,
+++	0x3a, 0xde, 0xe3, 0xae, 0xbe, 0xad, 0x07, 0xcc,
+++	0xb1, 0xf6, 0xf5, 0xf9, 0x56, 0xdd, 0xe7, 0x16,
+++	0x1e, 0x7f, 0xdf, 0x7a, 0x9e, 0x75, 0xb7, 0xc7,
+++	0xbe, 0xbe, 0x8a, 0x36, 0x04, 0xc0, 0x10, 0xf4,
+++	0x95, 0x20, 0x03, 0xec, 0xdc, 0x05, 0xa1, 0x7d,
+++	0xc4, 0xa9, 0x2c, 0x82, 0xd0, 0xbc, 0x8b, 0xc5,
+++	0xc7, 0x45, 0x50, 0xf6, 0xa2, 0x1a, 0xb5, 0x46,
+++	0x3b, 0x73, 0x02, 0xa6, 0x83, 0x4b, 0x73, 0x82,
+++	0x58, 0x5e, 0x3b, 0x65, 0x2f, 0x0e, 0xfd, 0x2b,
+++	0x59, 0x16, 0xce, 0xa1, 0x60, 0x9c, 0xe8, 0x3a,
+++	0x99, 0xed, 0x8d, 0x5a, 0xcf, 0xf6, 0x83, 0xaf,
+++	0xba, 0xd7, 0x73, 0x73, 0x40, 0x97, 0x3d, 0xca,
+++	0xef, 0x07, 0x57, 0xe6, 0xd9, 0x70, 0x0e, 0x95,
+++	0xae, 0xa6, 0x8d, 0x04, 0xcc, 0xee, 0xf7, 0x09,
+++	0x31, 0x77, 0x12, 0xa3, 0x23, 0x97, 0x62, 0xb3,
+++	0x7b, 0x32, 0xfb, 0x80, 0x14, 0x48, 0x81, 0xc3,
+++	0xe5, 0xea, 0x91, 0x39, 0x52, 0x81, 0xa2, 0x4f,
+++	0xe4, 0xb3, 0x09, 0xff, 0xde, 0x5e, 0xe9, 0x58,
+++	0x84, 0x6e, 0xf9, 0x3d, 0xdf, 0x25, 0xea, 0xad,
+++	0xae, 0xe6, 0x9a, 0xd1, 0x89, 0x55, 0xd3, 0xde,
+++	0x6c, 0x52, 0xdb, 0x70, 0xfe, 0x37, 0xce, 0x44,
+++	0x0a, 0xa8, 0x25, 0x5f, 0x92, 0xc1, 0x33, 0x4a,
+++	0x4f, 0x9b, 0x62, 0x35, 0xff, 0xce, 0xc0, 0xa9,
+++	0x60, 0xce, 0x52, 0x00, 0x97, 0x51, 0x35, 0x26,
+++	0x2e, 0xb9, 0x36, 0xa9, 0x87, 0x6e, 0x1e, 0xcc,
+++	0x91, 0x78, 0x53, 0x98, 0x86, 0x5b, 0x9c, 0x74,
+++	0x7d, 0x88, 0x33, 0xe1, 0xdf, 0x37, 0x69, 0x2b,
+++	0xbb, 0xf1, 0x4d, 0xf4, 0xd1, 0xf1, 0x39, 0x93,
+++	0x17, 0x51, 0x19, 0xe3, 0x19, 0x1e, 0x76, 0x37,
+++	0x25, 0xfb, 0x09, 0x27, 0x6a, 0xab, 0x67, 0x6f,
+++	0x14, 0x12, 0x64, 0xe7, 0xc4, 0x07, 0xdf, 0x4d,
+++	0x17, 0xbb, 0x6d, 0xe0, 0xe9, 0xb9, 0xab, 0xca,
+++	0x10, 0x68, 0xaf, 0x7e, 0xb7, 0x33, 0x54, 0x73,
+++	0x07, 0x6e, 0xf7, 0x81, 0x97, 0x9c, 0x05, 0x6f,
+++	0x84, 0x5f, 0xd2, 0x42, 0xfb, 0x38, 0xcf, 0xd1,
+++	0x2f, 0x14, 0x30, 0x88, 0x98, 0x4d, 0x5a, 0xa9,
+++	0x76, 0xd5, 0x4f, 0x3e, 0x70, 0x6c, 0x85, 0x76,
+++	0xd7, 0x01, 0xa0, 0x1a, 0xc8, 0x4e, 0xaa, 0xac,
+++	0x78, 0xfe, 0x46, 0xde, 0x6a, 0x05, 0x46, 0xa7,
+++	0x43, 0x0c, 0xb9, 0xde, 0xb9, 0x68, 0xfb, 0xce,
+++	0x42, 0x99, 0x07, 0x4d, 0x0b, 0x3b, 0x5a, 0x30,
+++	0x35, 0xa8, 0xf9, 0x3a, 0x73, 0xef, 0x0f, 0xdb,
+++	0x1e, 0x16, 0x42, 0xc4, 0xba, 0xae, 0x58, 0xaa,
+++	0xf8, 0xe5, 0x75, 0x2f, 0x1b, 0x15, 0x5c, 0xfd,
+++	0x0a, 0x97, 0xd0, 0xe4, 0x37, 0x83, 0x61, 0x5f,
+++	0x43, 0xa6, 0xc7, 0x3f, 0x38, 0x59, 0xe6, 0xeb,
+++	0xa3, 0x90, 0xc3, 0xaa, 0xaa, 0x5a, 0xd3, 0x34,
+++	0xd4, 0x17, 0xc8, 0x65, 0x3e, 0x57, 0xbc, 0x5e,
+++	0xdd, 0x9e, 0xb7, 0xf0, 0x2e, 0x5b, 0xb2, 0x1f,
+++	0x8a, 0x08, 0x0d, 0x45, 0x91, 0x0b, 0x29, 0x53,
+++	0x4f, 0x4c, 0x5a, 0x73, 0x56, 0xfe, 0xaf, 0x41,
+++	0x01, 0x39, 0x0a, 0x24, 0x3c, 0x7e, 0xbe, 0x4e,
+++	0x53, 0xf3, 0xeb, 0x06, 0x66, 0x51, 0x28, 0x1d,
+++	0xbd, 0x41, 0x0a, 0x01, 0xab, 0x16, 0x47, 0x27,
+++	0x47, 0x47, 0xf7, 0xcb, 0x46, 0x0a, 0x70, 0x9e,
+++	0x01, 0x9c, 0x09, 0xe1, 0x2a, 0x00, 0x1a, 0xd8,
+++	0xd4, 0x79, 0x9d, 0x80, 0x15, 0x8e, 0x53, 0x2a,
+++	0x65, 0x83, 0x78, 0x3e, 0x03, 0x00, 0x07, 0x12,
+++	0x1f, 0x33, 0x3e, 0x7b, 0x13, 0x37, 0xf1, 0xc3,
+++	0xef, 0xb7, 0xc1, 0x20, 0x3c, 0x3e, 0x67, 0x66,
+++	0x5d, 0x88, 0xa7, 0x7d, 0x33, 0x50, 0x77, 0xb0,
+++	0x28, 0x8e, 0xe7, 0x2c, 0x2e, 0x7a, 0xf4, 0x3c,
+++	0x8d, 0x74, 0x83, 0xaf, 0x8e, 0x87, 0x0f, 0xe4,
+++	0x50, 0xff, 0x84, 0x5c, 0x47, 0x0c, 0x6a, 0x49,
+++	0xbf, 0x42, 0x86, 0x77, 0x15, 0x48, 0xa5, 0x90,
+++	0x5d, 0x93, 0xd6, 0x2a, 0x11, 0xd5, 0xd5, 0x11,
+++	0xaa, 0xce, 0xe7, 0x6f, 0xa5, 0xb0, 0x09, 0x2c,
+++	0x8d, 0xd3, 0x92, 0xf0, 0x5a, 0x2a, 0xda, 0x5b,
+++	0x1e, 0xd5, 0x9a, 0xc4, 0xc4, 0xf3, 0x49, 0x74,
+++	0x41, 0xca, 0xe8, 0xc1, 0xf8, 0x44, 0xd6, 0x3c,
+++	0xae, 0x6c, 0x1d, 0x9a, 0x30, 0x04, 0x4d, 0x27,
+++	0x0e, 0xb1, 0x5f, 0x59, 0xa2, 0x24, 0xe8, 0xe1,
+++	0x98, 0xc5, 0x6a, 0x4c, 0xfe, 0x41, 0xd2, 0x27,
+++	0x42, 0x52, 0xe1, 0xe9, 0x7d, 0x62, 0xe4, 0x88,
+++	0x0f, 0xad, 0xb2, 0x70, 0xcb, 0x9d, 0x4c, 0x27,
+++	0x2e, 0x76, 0x1e, 0x1a, 0x63, 0x65, 0xf5, 0x3b,
+++	0xf8, 0x57, 0x69, 0xeb, 0x5b, 0x38, 0x26, 0x39,
+++	0x33, 0x25, 0x45, 0x3e, 0x91, 0xb8, 0xd8, 0xc7,
+++	0xd5, 0x42, 0xc0, 0x22, 0x31, 0x74, 0xf4, 0xbc,
+++	0x0c, 0x23, 0xf1, 0xca, 0xc1, 0x8d, 0xd7, 0xbe,
+++	0xc9, 0x62, 0xe4, 0x08, 0x1a, 0xcf, 0x36, 0xd5,
+++	0xfe, 0x55, 0x21, 0x59, 0x91, 0x87, 0x87, 0xdf,
+++	0x06, 0xdb, 0xdf, 0x96, 0x45, 0x58, 0xda, 0x05,
+++	0xcd, 0x50, 0x4d, 0xd2, 0x7d, 0x05, 0x18, 0x73,
+++	0x6a, 0x8d, 0x11, 0x85, 0xa6, 0x88, 0xe8, 0xda,
+++	0xe6, 0x30, 0x33, 0xa4, 0x89, 0x31, 0x75, 0xbe,
+++	0x69, 0x43, 0x84, 0x43, 0x50, 0x87, 0xdd, 0x71,
+++	0x36, 0x83, 0xc3, 0x78, 0x74, 0x24, 0x0a, 0xed,
+++	0x7b, 0xdb, 0xa4, 0x24, 0x0b, 0xb9, 0x7e, 0x5d,
+++	0xff, 0xde, 0xb1, 0xef, 0x61, 0x5a, 0x45, 0x33,
+++	0xf6, 0x17, 0x07, 0x08, 0x98, 0x83, 0x92, 0x0f,
+++	0x23, 0x6d, 0xe6, 0xaa, 0x17, 0x54, 0xad, 0x6a,
+++	0xc8, 0xdb, 0x26, 0xbe, 0xb8, 0xb6, 0x08, 0xfa,
+++	0x68, 0xf1, 0xd7, 0x79, 0x6f, 0x18, 0xb4, 0x9e,
+++	0x2d, 0x3f, 0x1b, 0x64, 0xaf, 0x8d, 0x06, 0x0e,
+++	0x49, 0x28, 0xe0, 0x5d, 0x45, 0x68, 0x13, 0x87,
+++	0xfa, 0xde, 0x40, 0x7b, 0xd2, 0xc3, 0x94, 0xd5,
+++	0xe1, 0xd9, 0xc2, 0xaf, 0x55, 0x89, 0xeb, 0xb4,
+++	0x12, 0x59, 0xa8, 0xd4, 0xc5, 0x29, 0x66, 0x38,
+++	0xe6, 0xac, 0x22, 0x22, 0xd9, 0x64, 0x9b, 0x34,
+++	0x0a, 0x32, 0x9f, 0xc2, 0xbf, 0x17, 0x6c, 0x3f,
+++	0x71, 0x7a, 0x38, 0x6b, 0x98, 0xfb, 0x49, 0x36,
+++	0x89, 0xc9, 0xe2, 0xd6, 0xc7, 0x5d, 0xd0, 0x69,
+++	0x5f, 0x23, 0x35, 0xc9, 0x30, 0xe2, 0xfd, 0x44,
+++	0x58, 0x39, 0xd7, 0x97, 0xfb, 0x5c, 0x00, 0xd5,
+++	0x4f, 0x7a, 0x1a, 0x95, 0x8b, 0x62, 0x4b, 0xce,
+++	0xe5, 0x91, 0x21, 0x7b, 0x30, 0x00, 0xd6, 0xdd,
+++	0x6d, 0x02, 0x86, 0x49, 0x0f, 0x3c, 0x1a, 0x27,
+++	0x3c, 0xd3, 0x0e, 0x71, 0xf2, 0xff, 0xf5, 0x2f,
+++	0x87, 0xac, 0x67, 0x59, 0x81, 0xa3, 0xf7, 0xf8,
+++	0xd6, 0x11, 0x0c, 0x84, 0xa9, 0x03, 0xee, 0x2a,
+++	0xc4, 0xf3, 0x22, 0xab, 0x7c, 0xe2, 0x25, 0xf5,
+++	0x67, 0xa3, 0xe4, 0x11, 0xe0, 0x59, 0xb3, 0xca,
+++	0x87, 0xa0, 0xae, 0xc9, 0xa6, 0x62, 0x1b, 0x6e,
+++	0x4d, 0x02, 0x6b, 0x07, 0x9d, 0xfd, 0xd0, 0x92,
+++	0x06, 0xe1, 0xb2, 0x9a, 0x4a, 0x1f, 0x1f, 0x13,
+++	0x49, 0x99, 0x97, 0x08, 0xde, 0x7f, 0x98, 0xaf,
+++	0x51, 0x98, 0xee, 0x2c, 0xcb, 0xf0, 0x0b, 0xc6,
+++	0xb6, 0xb7, 0x2d, 0x9a, 0xb1, 0xac, 0xa6, 0xe3,
+++	0x15, 0x77, 0x9d, 0x6b, 0x1a, 0xe4, 0xfc, 0x8b,
+++	0xf2, 0x17, 0x59, 0x08, 0x04, 0x58, 0x81, 0x9d,
+++	0x1b, 0x1b, 0x69, 0x55, 0xc2, 0xb4, 0x3c, 0x1f,
+++	0x50, 0xf1, 0x7f, 0x77, 0x90, 0x4c, 0x66, 0x40,
+++	0x5a, 0xc0, 0x33, 0x1f, 0xcb, 0x05, 0x6d, 0x5c,
+++	0x06, 0x87, 0x52, 0xa2, 0x8f, 0x26, 0xd5, 0x4f
+++};
+++static const u8 enc_output010[] __initconst = {
+++	0xe5, 0x26, 0xa4, 0x3d, 0xbd, 0x33, 0xd0, 0x4b,
+++	0x6f, 0x05, 0xa7, 0x6e, 0x12, 0x7a, 0xd2, 0x74,
+++	0xa6, 0xdd, 0xbd, 0x95, 0xeb, 0xf9, 0xa4, 0xf1,
+++	0x59, 0x93, 0x91, 0x70, 0xd9, 0xfe, 0x9a, 0xcd,
+++	0x53, 0x1f, 0x3a, 0xab, 0xa6, 0x7c, 0x9f, 0xa6,
+++	0x9e, 0xbd, 0x99, 0xd9, 0xb5, 0x97, 0x44, 0xd5,
+++	0x14, 0x48, 0x4d, 0x9d, 0xc0, 0xd0, 0x05, 0x96,
+++	0xeb, 0x4c, 0x78, 0x55, 0x09, 0x08, 0x01, 0x02,
+++	0x30, 0x90, 0x7b, 0x96, 0x7a, 0x7b, 0x5f, 0x30,
+++	0x41, 0x24, 0xce, 0x68, 0x61, 0x49, 0x86, 0x57,
+++	0x82, 0xdd, 0x53, 0x1c, 0x51, 0x28, 0x2b, 0x53,
+++	0x6e, 0x2d, 0xc2, 0x20, 0x4c, 0xdd, 0x8f, 0x65,
+++	0x10, 0x20, 0x50, 0xdd, 0x9d, 0x50, 0xe5, 0x71,
+++	0x40, 0x53, 0x69, 0xfc, 0x77, 0x48, 0x11, 0xb9,
+++	0xde, 0xa4, 0x8d, 0x58, 0xe4, 0xa6, 0x1a, 0x18,
+++	0x47, 0x81, 0x7e, 0xfc, 0xdd, 0xf6, 0xef, 0xce,
+++	0x2f, 0x43, 0x68, 0xd6, 0x06, 0xe2, 0x74, 0x6a,
+++	0xad, 0x90, 0xf5, 0x37, 0xf3, 0x3d, 0x82, 0x69,
+++	0x40, 0xe9, 0x6b, 0xa7, 0x3d, 0xa8, 0x1e, 0xd2,
+++	0x02, 0x7c, 0xb7, 0x9b, 0xe4, 0xda, 0x8f, 0x95,
+++	0x06, 0xc5, 0xdf, 0x73, 0xa3, 0x20, 0x9a, 0x49,
+++	0xde, 0x9c, 0xbc, 0xee, 0x14, 0x3f, 0x81, 0x5e,
+++	0xf8, 0x3b, 0x59, 0x3c, 0xe1, 0x68, 0x12, 0x5a,
+++	0x3a, 0x76, 0x3a, 0x3f, 0xf7, 0x87, 0x33, 0x0a,
+++	0x01, 0xb8, 0xd4, 0xed, 0xb6, 0xbe, 0x94, 0x5e,
+++	0x70, 0x40, 0x56, 0x67, 0x1f, 0x50, 0x44, 0x19,
+++	0xce, 0x82, 0x70, 0x10, 0x87, 0x13, 0x20, 0x0b,
+++	0x4c, 0x5a, 0xb6, 0xf6, 0xa7, 0xae, 0x81, 0x75,
+++	0x01, 0x81, 0xe6, 0x4b, 0x57, 0x7c, 0xdd, 0x6d,
+++	0xf8, 0x1c, 0x29, 0x32, 0xf7, 0xda, 0x3c, 0x2d,
+++	0xf8, 0x9b, 0x25, 0x6e, 0x00, 0xb4, 0xf7, 0x2f,
+++	0xf7, 0x04, 0xf7, 0xa1, 0x56, 0xac, 0x4f, 0x1a,
+++	0x64, 0xb8, 0x47, 0x55, 0x18, 0x7b, 0x07, 0x4d,
+++	0xbd, 0x47, 0x24, 0x80, 0x5d, 0xa2, 0x70, 0xc5,
+++	0xdd, 0x8e, 0x82, 0xd4, 0xeb, 0xec, 0xb2, 0x0c,
+++	0x39, 0xd2, 0x97, 0xc1, 0xcb, 0xeb, 0xf4, 0x77,
+++	0x59, 0xb4, 0x87, 0xef, 0xcb, 0x43, 0x2d, 0x46,
+++	0x54, 0xd1, 0xa7, 0xd7, 0x15, 0x99, 0x0a, 0x43,
+++	0xa1, 0xe0, 0x99, 0x33, 0x71, 0xc1, 0xed, 0xfe,
+++	0x72, 0x46, 0x33, 0x8e, 0x91, 0x08, 0x9f, 0xc8,
+++	0x2e, 0xca, 0xfa, 0xdc, 0x59, 0xd5, 0xc3, 0x76,
+++	0x84, 0x9f, 0xa3, 0x37, 0x68, 0xc3, 0xf0, 0x47,
+++	0x2c, 0x68, 0xdb, 0x5e, 0xc3, 0x49, 0x4c, 0xe8,
+++	0x92, 0x85, 0xe2, 0x23, 0xd3, 0x3f, 0xad, 0x32,
+++	0xe5, 0x2b, 0x82, 0xd7, 0x8f, 0x99, 0x0a, 0x59,
+++	0x5c, 0x45, 0xd9, 0xb4, 0x51, 0x52, 0xc2, 0xae,
+++	0xbf, 0x80, 0xcf, 0xc9, 0xc9, 0x51, 0x24, 0x2a,
+++	0x3b, 0x3a, 0x4d, 0xae, 0xeb, 0xbd, 0x22, 0xc3,
+++	0x0e, 0x0f, 0x59, 0x25, 0x92, 0x17, 0xe9, 0x74,
+++	0xc7, 0x8b, 0x70, 0x70, 0x36, 0x55, 0x95, 0x75,
+++	0x4b, 0xad, 0x61, 0x2b, 0x09, 0xbc, 0x82, 0xf2,
+++	0x6e, 0x94, 0x43, 0xae, 0xc3, 0xd5, 0xcd, 0x8e,
+++	0xfe, 0x5b, 0x9a, 0x88, 0x43, 0x01, 0x75, 0xb2,
+++	0x23, 0x09, 0xf7, 0x89, 0x83, 0xe7, 0xfa, 0xf9,
+++	0xb4, 0x9b, 0xf8, 0xef, 0xbd, 0x1c, 0x92, 0xc1,
+++	0xda, 0x7e, 0xfe, 0x05, 0xba, 0x5a, 0xcd, 0x07,
+++	0x6a, 0x78, 0x9e, 0x5d, 0xfb, 0x11, 0x2f, 0x79,
+++	0x38, 0xb6, 0xc2, 0x5b, 0x6b, 0x51, 0xb4, 0x71,
+++	0xdd, 0xf7, 0x2a, 0xe4, 0xf4, 0x72, 0x76, 0xad,
+++	0xc2, 0xdd, 0x64, 0x5d, 0x79, 0xb6, 0xf5, 0x7a,
+++	0x77, 0x20, 0x05, 0x3d, 0x30, 0x06, 0xd4, 0x4c,
+++	0x0a, 0x2c, 0x98, 0x5a, 0xb9, 0xd4, 0x98, 0xa9,
+++	0x3f, 0xc6, 0x12, 0xea, 0x3b, 0x4b, 0xc5, 0x79,
+++	0x64, 0x63, 0x6b, 0x09, 0x54, 0x3b, 0x14, 0x27,
+++	0xba, 0x99, 0x80, 0xc8, 0x72, 0xa8, 0x12, 0x90,
+++	0x29, 0xba, 0x40, 0x54, 0x97, 0x2b, 0x7b, 0xfe,
+++	0xeb, 0xcd, 0x01, 0x05, 0x44, 0x72, 0xdb, 0x99,
+++	0xe4, 0x61, 0xc9, 0x69, 0xd6, 0xb9, 0x28, 0xd1,
+++	0x05, 0x3e, 0xf9, 0x0b, 0x49, 0x0a, 0x49, 0xe9,
+++	0x8d, 0x0e, 0xa7, 0x4a, 0x0f, 0xaf, 0x32, 0xd0,
+++	0xe0, 0xb2, 0x3a, 0x55, 0x58, 0xfe, 0x5c, 0x28,
+++	0x70, 0x51, 0x23, 0xb0, 0x7b, 0x6a, 0x5f, 0x1e,
+++	0xb8, 0x17, 0xd7, 0x94, 0x15, 0x8f, 0xee, 0x20,
+++	0xc7, 0x42, 0x25, 0x3e, 0x9a, 0x14, 0xd7, 0x60,
+++	0x72, 0x39, 0x47, 0x48, 0xa9, 0xfe, 0xdd, 0x47,
+++	0x0a, 0xb1, 0xe6, 0x60, 0x28, 0x8c, 0x11, 0x68,
+++	0xe1, 0xff, 0xd7, 0xce, 0xc8, 0xbe, 0xb3, 0xfe,
+++	0x27, 0x30, 0x09, 0x70, 0xd7, 0xfa, 0x02, 0x33,
+++	0x3a, 0x61, 0x2e, 0xc7, 0xff, 0xa4, 0x2a, 0xa8,
+++	0x6e, 0xb4, 0x79, 0x35, 0x6d, 0x4c, 0x1e, 0x38,
+++	0xf8, 0xee, 0xd4, 0x84, 0x4e, 0x6e, 0x28, 0xa7,
+++	0xce, 0xc8, 0xc1, 0xcf, 0x80, 0x05, 0xf3, 0x04,
+++	0xef, 0xc8, 0x18, 0x28, 0x2e, 0x8d, 0x5e, 0x0c,
+++	0xdf, 0xb8, 0x5f, 0x96, 0xe8, 0xc6, 0x9c, 0x2f,
+++	0xe5, 0xa6, 0x44, 0xd7, 0xe7, 0x99, 0x44, 0x0c,
+++	0xec, 0xd7, 0x05, 0x60, 0x97, 0xbb, 0x74, 0x77,
+++	0x58, 0xd5, 0xbb, 0x48, 0xde, 0x5a, 0xb2, 0x54,
+++	0x7f, 0x0e, 0x46, 0x70, 0x6a, 0x6f, 0x78, 0xa5,
+++	0x08, 0x89, 0x05, 0x4e, 0x7e, 0xa0, 0x69, 0xb4,
+++	0x40, 0x60, 0x55, 0x77, 0x75, 0x9b, 0x19, 0xf2,
+++	0xd5, 0x13, 0x80, 0x77, 0xf9, 0x4b, 0x3f, 0x1e,
+++	0xee, 0xe6, 0x76, 0x84, 0x7b, 0x8c, 0xe5, 0x27,
+++	0xa8, 0x0a, 0x91, 0x01, 0x68, 0x71, 0x8a, 0x3f,
+++	0x06, 0xab, 0xf6, 0xa9, 0xa5, 0xe6, 0x72, 0x92,
+++	0xe4, 0x67, 0xe2, 0xa2, 0x46, 0x35, 0x84, 0x55,
+++	0x7d, 0xca, 0xa8, 0x85, 0xd0, 0xf1, 0x3f, 0xbe,
+++	0xd7, 0x34, 0x64, 0xfc, 0xae, 0xe3, 0xe4, 0x04,
+++	0x9f, 0x66, 0x02, 0xb9, 0x88, 0x10, 0xd9, 0xc4,
+++	0x4c, 0x31, 0x43, 0x7a, 0x93, 0xe2, 0x9b, 0x56,
+++	0x43, 0x84, 0xdc, 0xdc, 0xde, 0x1d, 0xa4, 0x02,
+++	0x0e, 0xc2, 0xef, 0xc3, 0xf8, 0x78, 0xd1, 0xb2,
+++	0x6b, 0x63, 0x18, 0xc9, 0xa9, 0xe5, 0x72, 0xd8,
+++	0xf3, 0xb9, 0xd1, 0x8a, 0xc7, 0x1a, 0x02, 0x27,
+++	0x20, 0x77, 0x10, 0xe5, 0xc8, 0xd4, 0x4a, 0x47,
+++	0xe5, 0xdf, 0x5f, 0x01, 0xaa, 0xb0, 0xd4, 0x10,
+++	0xbb, 0x69, 0xe3, 0x36, 0xc8, 0xe1, 0x3d, 0x43,
+++	0xfb, 0x86, 0xcd, 0xcc, 0xbf, 0xf4, 0x88, 0xe0,
+++	0x20, 0xca, 0xb7, 0x1b, 0xf1, 0x2f, 0x5c, 0xee,
+++	0xd4, 0xd3, 0xa3, 0xcc, 0xa4, 0x1e, 0x1c, 0x47,
+++	0xfb, 0xbf, 0xfc, 0xa2, 0x41, 0x55, 0x9d, 0xf6,
+++	0x5a, 0x5e, 0x65, 0x32, 0x34, 0x7b, 0x52, 0x8d,
+++	0xd5, 0xd0, 0x20, 0x60, 0x03, 0xab, 0x3f, 0x8c,
+++	0xd4, 0x21, 0xea, 0x2a, 0xd9, 0xc4, 0xd0, 0xd3,
+++	0x65, 0xd8, 0x7a, 0x13, 0x28, 0x62, 0x32, 0x4b,
+++	0x2c, 0x87, 0x93, 0xa8, 0xb4, 0x52, 0x45, 0x09,
+++	0x44, 0xec, 0xec, 0xc3, 0x17, 0xdb, 0x9a, 0x4d,
+++	0x5c, 0xa9, 0x11, 0xd4, 0x7d, 0xaf, 0x9e, 0xf1,
+++	0x2d, 0xb2, 0x66, 0xc5, 0x1d, 0xed, 0xb7, 0xcd,
+++	0x0b, 0x25, 0x5e, 0x30, 0x47, 0x3f, 0x40, 0xf4,
+++	0xa1, 0xa0, 0x00, 0x94, 0x10, 0xc5, 0x6a, 0x63,
+++	0x1a, 0xd5, 0x88, 0x92, 0x8e, 0x82, 0x39, 0x87,
+++	0x3c, 0x78, 0x65, 0x58, 0x42, 0x75, 0x5b, 0xdd,
+++	0x77, 0x3e, 0x09, 0x4e, 0x76, 0x5b, 0xe6, 0x0e,
+++	0x4d, 0x38, 0xb2, 0xc0, 0xb8, 0x95, 0x01, 0x7a,
+++	0x10, 0xe0, 0xfb, 0x07, 0xf2, 0xab, 0x2d, 0x8c,
+++	0x32, 0xed, 0x2b, 0xc0, 0x46, 0xc2, 0xf5, 0x38,
+++	0x83, 0xf0, 0x17, 0xec, 0xc1, 0x20, 0x6a, 0x9a,
+++	0x0b, 0x00, 0xa0, 0x98, 0x22, 0x50, 0x23, 0xd5,
+++	0x80, 0x6b, 0xf6, 0x1f, 0xc3, 0xcc, 0x97, 0xc9,
+++	0x24, 0x9f, 0xf3, 0xaf, 0x43, 0x14, 0xd5, 0xa0
+++};
+++static const u8 enc_assoc010[] __initconst = {
+++	0xd2, 0xa1, 0x70, 0xdb, 0x7a, 0xf8, 0xfa, 0x27,
+++	0xba, 0x73, 0x0f, 0xbf, 0x3d, 0x1e, 0x82, 0xb2
+++};
+++static const u8 enc_nonce010[] __initconst = {
+++	0xdb, 0x92, 0x0f, 0x7f, 0x17, 0x54, 0x0c, 0x30
+++};
+++static const u8 enc_key010[] __initconst = {
+++	0x47, 0x11, 0xeb, 0x86, 0x2b, 0x2c, 0xab, 0x44,
+++	0x34, 0xda, 0x7f, 0x57, 0x03, 0x39, 0x0c, 0xaf,
+++	0x2c, 0x14, 0xfd, 0x65, 0x23, 0xe9, 0x8e, 0x74,
+++	0xd5, 0x08, 0x68, 0x08, 0xe7, 0xb4, 0x72, 0xd7
+++};
+++
+++static const u8 enc_input011[] __initconst = {
+++	0x7a, 0x57, 0xf2, 0xc7, 0x06, 0x3f, 0x50, 0x7b,
+++	0x36, 0x1a, 0x66, 0x5c, 0xb9, 0x0e, 0x5e, 0x3b,
+++	0x45, 0x60, 0xbe, 0x9a, 0x31, 0x9f, 0xff, 0x5d,
+++	0x66, 0x34, 0xb4, 0xdc, 0xfb, 0x9d, 0x8e, 0xee,
+++	0x6a, 0x33, 0xa4, 0x07, 0x3c, 0xf9, 0x4c, 0x30,
+++	0xa1, 0x24, 0x52, 0xf9, 0x50, 0x46, 0x88, 0x20,
+++	0x02, 0x32, 0x3a, 0x0e, 0x99, 0x63, 0xaf, 0x1f,
+++	0x15, 0x28, 0x2a, 0x05, 0xff, 0x57, 0x59, 0x5e,
+++	0x18, 0xa1, 0x1f, 0xd0, 0x92, 0x5c, 0x88, 0x66,
+++	0x1b, 0x00, 0x64, 0xa5, 0x93, 0x8d, 0x06, 0x46,
+++	0xb0, 0x64, 0x8b, 0x8b, 0xef, 0x99, 0x05, 0x35,
+++	0x85, 0xb3, 0xf3, 0x33, 0xbb, 0xec, 0x66, 0xb6,
+++	0x3d, 0x57, 0x42, 0xe3, 0xb4, 0xc6, 0xaa, 0xb0,
+++	0x41, 0x2a, 0xb9, 0x59, 0xa9, 0xf6, 0x3e, 0x15,
+++	0x26, 0x12, 0x03, 0x21, 0x4c, 0x74, 0x43, 0x13,
+++	0x2a, 0x03, 0x27, 0x09, 0xb4, 0xfb, 0xe7, 0xb7,
+++	0x40, 0xff, 0x5e, 0xce, 0x48, 0x9a, 0x60, 0xe3,
+++	0x8b, 0x80, 0x8c, 0x38, 0x2d, 0xcb, 0x93, 0x37,
+++	0x74, 0x05, 0x52, 0x6f, 0x73, 0x3e, 0xc3, 0xbc,
+++	0xca, 0x72, 0x0a, 0xeb, 0xf1, 0x3b, 0xa0, 0x95,
+++	0xdc, 0x8a, 0xc4, 0xa9, 0xdc, 0xca, 0x44, 0xd8,
+++	0x08, 0x63, 0x6a, 0x36, 0xd3, 0x3c, 0xb8, 0xac,
+++	0x46, 0x7d, 0xfd, 0xaa, 0xeb, 0x3e, 0x0f, 0x45,
+++	0x8f, 0x49, 0xda, 0x2b, 0xf2, 0x12, 0xbd, 0xaf,
+++	0x67, 0x8a, 0x63, 0x48, 0x4b, 0x55, 0x5f, 0x6d,
+++	0x8c, 0xb9, 0x76, 0x34, 0x84, 0xae, 0xc2, 0xfc,
+++	0x52, 0x64, 0x82, 0xf7, 0xb0, 0x06, 0xf0, 0x45,
+++	0x73, 0x12, 0x50, 0x30, 0x72, 0xea, 0x78, 0x9a,
+++	0xa8, 0xaf, 0xb5, 0xe3, 0xbb, 0x77, 0x52, 0xec,
+++	0x59, 0x84, 0xbf, 0x6b, 0x8f, 0xce, 0x86, 0x5e,
+++	0x1f, 0x23, 0xe9, 0xfb, 0x08, 0x86, 0xf7, 0x10,
+++	0xb9, 0xf2, 0x44, 0x96, 0x44, 0x63, 0xa9, 0xa8,
+++	0x78, 0x00, 0x23, 0xd6, 0xc7, 0xe7, 0x6e, 0x66,
+++	0x4f, 0xcc, 0xee, 0x15, 0xb3, 0xbd, 0x1d, 0xa0,
+++	0xe5, 0x9c, 0x1b, 0x24, 0x2c, 0x4d, 0x3c, 0x62,
+++	0x35, 0x9c, 0x88, 0x59, 0x09, 0xdd, 0x82, 0x1b,
+++	0xcf, 0x0a, 0x83, 0x6b, 0x3f, 0xae, 0x03, 0xc4,
+++	0xb4, 0xdd, 0x7e, 0x5b, 0x28, 0x76, 0x25, 0x96,
+++	0xd9, 0xc9, 0x9d, 0x5f, 0x86, 0xfa, 0xf6, 0xd7,
+++	0xd2, 0xe6, 0x76, 0x1d, 0x0f, 0xa1, 0xdc, 0x74,
+++	0x05, 0x1b, 0x1d, 0xe0, 0xcd, 0x16, 0xb0, 0xa8,
+++	0x8a, 0x34, 0x7b, 0x15, 0x11, 0x77, 0xe5, 0x7b,
+++	0x7e, 0x20, 0xf7, 0xda, 0x38, 0xda, 0xce, 0x70,
+++	0xe9, 0xf5, 0x6c, 0xd9, 0xbe, 0x0c, 0x4c, 0x95,
+++	0x4c, 0xc2, 0x9b, 0x34, 0x55, 0x55, 0xe1, 0xf3,
+++	0x46, 0x8e, 0x48, 0x74, 0x14, 0x4f, 0x9d, 0xc9,
+++	0xf5, 0xe8, 0x1a, 0xf0, 0x11, 0x4a, 0xc1, 0x8d,
+++	0xe0, 0x93, 0xa0, 0xbe, 0x09, 0x1c, 0x2b, 0x4e,
+++	0x0f, 0xb2, 0x87, 0x8b, 0x84, 0xfe, 0x92, 0x32,
+++	0x14, 0xd7, 0x93, 0xdf, 0xe7, 0x44, 0xbc, 0xc5,
+++	0xae, 0x53, 0x69, 0xd8, 0xb3, 0x79, 0x37, 0x80,
+++	0xe3, 0x17, 0x5c, 0xec, 0x53, 0x00, 0x9a, 0xe3,
+++	0x8e, 0xdc, 0x38, 0xb8, 0x66, 0xf0, 0xd3, 0xad,
+++	0x1d, 0x02, 0x96, 0x86, 0x3e, 0x9d, 0x3b, 0x5d,
+++	0xa5, 0x7f, 0x21, 0x10, 0xf1, 0x1f, 0x13, 0x20,
+++	0xf9, 0x57, 0x87, 0x20, 0xf5, 0x5f, 0xf1, 0x17,
+++	0x48, 0x0a, 0x51, 0x5a, 0xcd, 0x19, 0x03, 0xa6,
+++	0x5a, 0xd1, 0x12, 0x97, 0xe9, 0x48, 0xe2, 0x1d,
+++	0x83, 0x75, 0x50, 0xd9, 0x75, 0x7d, 0x6a, 0x82,
+++	0xa1, 0xf9, 0x4e, 0x54, 0x87, 0x89, 0xc9, 0x0c,
+++	0xb7, 0x5b, 0x6a, 0x91, 0xc1, 0x9c, 0xb2, 0xa9,
+++	0xdc, 0x9a, 0xa4, 0x49, 0x0a, 0x6d, 0x0d, 0xbb,
+++	0xde, 0x86, 0x44, 0xdd, 0x5d, 0x89, 0x2b, 0x96,
+++	0x0f, 0x23, 0x95, 0xad, 0xcc, 0xa2, 0xb3, 0xb9,
+++	0x7e, 0x74, 0x38, 0xba, 0x9f, 0x73, 0xae, 0x5f,
+++	0xf8, 0x68, 0xa2, 0xe0, 0xa9, 0xce, 0xbd, 0x40,
+++	0xd4, 0x4c, 0x6b, 0xd2, 0x56, 0x62, 0xb0, 0xcc,
+++	0x63, 0x7e, 0x5b, 0xd3, 0xae, 0xd1, 0x75, 0xce,
+++	0xbb, 0xb4, 0x5b, 0xa8, 0xf8, 0xb4, 0xac, 0x71,
+++	0x75, 0xaa, 0xc9, 0x9f, 0xbb, 0x6c, 0xad, 0x0f,
+++	0x55, 0x5d, 0xe8, 0x85, 0x7d, 0xf9, 0x21, 0x35,
+++	0xea, 0x92, 0x85, 0x2b, 0x00, 0xec, 0x84, 0x90,
+++	0x0a, 0x63, 0x96, 0xe4, 0x6b, 0xa9, 0x77, 0xb8,
+++	0x91, 0xf8, 0x46, 0x15, 0x72, 0x63, 0x70, 0x01,
+++	0x40, 0xa3, 0xa5, 0x76, 0x62, 0x2b, 0xbf, 0xf1,
+++	0xe5, 0x8d, 0x9f, 0xa3, 0xfa, 0x9b, 0x03, 0xbe,
+++	0xfe, 0x65, 0x6f, 0xa2, 0x29, 0x0d, 0x54, 0xb4,
+++	0x71, 0xce, 0xa9, 0xd6, 0x3d, 0x88, 0xf9, 0xaf,
+++	0x6b, 0xa8, 0x9e, 0xf4, 0x16, 0x96, 0x36, 0xb9,
+++	0x00, 0xdc, 0x10, 0xab, 0xb5, 0x08, 0x31, 0x1f,
+++	0x00, 0xb1, 0x3c, 0xd9, 0x38, 0x3e, 0xc6, 0x04,
+++	0xa7, 0x4e, 0xe8, 0xae, 0xed, 0x98, 0xc2, 0xf7,
+++	0xb9, 0x00, 0x5f, 0x8c, 0x60, 0xd1, 0xe5, 0x15,
+++	0xf7, 0xae, 0x1e, 0x84, 0x88, 0xd1, 0xf6, 0xbc,
+++	0x3a, 0x89, 0x35, 0x22, 0x83, 0x7c, 0xca, 0xf0,
+++	0x33, 0x82, 0x4c, 0x79, 0x3c, 0xfd, 0xb1, 0xae,
+++	0x52, 0x62, 0x55, 0xd2, 0x41, 0x60, 0xc6, 0xbb,
+++	0xfa, 0x0e, 0x59, 0xd6, 0xa8, 0xfe, 0x5d, 0xed,
+++	0x47, 0x3d, 0xe0, 0xea, 0x1f, 0x6e, 0x43, 0x51,
+++	0xec, 0x10, 0x52, 0x56, 0x77, 0x42, 0x6b, 0x52,
+++	0x87, 0xd8, 0xec, 0xe0, 0xaa, 0x76, 0xa5, 0x84,
+++	0x2a, 0x22, 0x24, 0xfd, 0x92, 0x40, 0x88, 0xd5,
+++	0x85, 0x1c, 0x1f, 0x6b, 0x47, 0xa0, 0xc4, 0xe4,
+++	0xef, 0xf4, 0xea, 0xd7, 0x59, 0xac, 0x2a, 0x9e,
+++	0x8c, 0xfa, 0x1f, 0x42, 0x08, 0xfe, 0x4f, 0x74,
+++	0xa0, 0x26, 0xf5, 0xb3, 0x84, 0xf6, 0x58, 0x5f,
+++	0x26, 0x66, 0x3e, 0xd7, 0xe4, 0x22, 0x91, 0x13,
+++	0xc8, 0xac, 0x25, 0x96, 0x23, 0xd8, 0x09, 0xea,
+++	0x45, 0x75, 0x23, 0xb8, 0x5f, 0xc2, 0x90, 0x8b,
+++	0x09, 0xc4, 0xfc, 0x47, 0x6c, 0x6d, 0x0a, 0xef,
+++	0x69, 0xa4, 0x38, 0x19, 0xcf, 0x7d, 0xf9, 0x09,
+++	0x73, 0x9b, 0x60, 0x5a, 0xf7, 0x37, 0xb5, 0xfe,
+++	0x9f, 0xe3, 0x2b, 0x4c, 0x0d, 0x6e, 0x19, 0xf1,
+++	0xd6, 0xc0, 0x70, 0xf3, 0x9d, 0x22, 0x3c, 0xf9,
+++	0x49, 0xce, 0x30, 0x8e, 0x44, 0xb5, 0x76, 0x15,
+++	0x8f, 0x52, 0xfd, 0xa5, 0x04, 0xb8, 0x55, 0x6a,
+++	0x36, 0x59, 0x7c, 0xc4, 0x48, 0xb8, 0xd7, 0xab,
+++	0x05, 0x66, 0xe9, 0x5e, 0x21, 0x6f, 0x6b, 0x36,
+++	0x29, 0xbb, 0xe9, 0xe3, 0xa2, 0x9a, 0xa8, 0xcd,
+++	0x55, 0x25, 0x11, 0xba, 0x5a, 0x58, 0xa0, 0xde,
+++	0xae, 0x19, 0x2a, 0x48, 0x5a, 0xff, 0x36, 0xcd,
+++	0x6d, 0x16, 0x7a, 0x73, 0x38, 0x46, 0xe5, 0x47,
+++	0x59, 0xc8, 0xa2, 0xf6, 0xe2, 0x6c, 0x83, 0xc5,
+++	0x36, 0x2c, 0x83, 0x7d, 0xb4, 0x01, 0x05, 0x69,
+++	0xe7, 0xaf, 0x5c, 0xc4, 0x64, 0x82, 0x12, 0x21,
+++	0xef, 0xf7, 0xd1, 0x7d, 0xb8, 0x8d, 0x8c, 0x98,
+++	0x7c, 0x5f, 0x7d, 0x92, 0x88, 0xb9, 0x94, 0x07,
+++	0x9c, 0xd8, 0xe9, 0x9c, 0x17, 0x38, 0xe3, 0x57,
+++	0x6c, 0xe0, 0xdc, 0xa5, 0x92, 0x42, 0xb3, 0xbd,
+++	0x50, 0xa2, 0x7e, 0xb5, 0xb1, 0x52, 0x72, 0x03,
+++	0x97, 0xd8, 0xaa, 0x9a, 0x1e, 0x75, 0x41, 0x11,
+++	0xa3, 0x4f, 0xcc, 0xd4, 0xe3, 0x73, 0xad, 0x96,
+++	0xdc, 0x47, 0x41, 0x9f, 0xb0, 0xbe, 0x79, 0x91,
+++	0xf5, 0xb6, 0x18, 0xfe, 0xc2, 0x83, 0x18, 0x7d,
+++	0x73, 0xd9, 0x4f, 0x83, 0x84, 0x03, 0xb3, 0xf0,
+++	0x77, 0x66, 0x3d, 0x83, 0x63, 0x2e, 0x2c, 0xf9,
+++	0xdd, 0xa6, 0x1f, 0x89, 0x82, 0xb8, 0x23, 0x42,
+++	0xeb, 0xe2, 0xca, 0x70, 0x82, 0x61, 0x41, 0x0a,
+++	0x6d, 0x5f, 0x75, 0xc5, 0xe2, 0xc4, 0x91, 0x18,
+++	0x44, 0x22, 0xfa, 0x34, 0x10, 0xf5, 0x20, 0xdc,
+++	0xb7, 0xdd, 0x2a, 0x20, 0x77, 0xf5, 0xf9, 0xce,
+++	0xdb, 0xa0, 0x0a, 0x52, 0x2a, 0x4e, 0xdd, 0xcc,
+++	0x97, 0xdf, 0x05, 0xe4, 0x5e, 0xb7, 0xaa, 0xf0,
+++	0xe2, 0x80, 0xff, 0xba, 0x1a, 0x0f, 0xac, 0xdf,
+++	0x02, 0x32, 0xe6, 0xf7, 0xc7, 0x17, 0x13, 0xb7,
+++	0xfc, 0x98, 0x48, 0x8c, 0x0d, 0x82, 0xc9, 0x80,
+++	0x7a, 0xe2, 0x0a, 0xc5, 0xb4, 0xde, 0x7c, 0x3c,
+++	0x79, 0x81, 0x0e, 0x28, 0x65, 0x79, 0x67, 0x82,
+++	0x69, 0x44, 0x66, 0x09, 0xf7, 0x16, 0x1a, 0xf9,
+++	0x7d, 0x80, 0xa1, 0x79, 0x14, 0xa9, 0xc8, 0x20,
+++	0xfb, 0xa2, 0x46, 0xbe, 0x08, 0x35, 0x17, 0x58,
+++	0xc1, 0x1a, 0xda, 0x2a, 0x6b, 0x2e, 0x1e, 0xe6,
+++	0x27, 0x55, 0x7b, 0x19, 0xe2, 0xfb, 0x64, 0xfc,
+++	0x5e, 0x15, 0x54, 0x3c, 0xe7, 0xc2, 0x11, 0x50,
+++	0x30, 0xb8, 0x72, 0x03, 0x0b, 0x1a, 0x9f, 0x86,
+++	0x27, 0x11, 0x5c, 0x06, 0x2b, 0xbd, 0x75, 0x1a,
+++	0x0a, 0xda, 0x01, 0xfa, 0x5c, 0x4a, 0xc1, 0x80,
+++	0x3a, 0x6e, 0x30, 0xc8, 0x2c, 0xeb, 0x56, 0xec,
+++	0x89, 0xfa, 0x35, 0x7b, 0xb2, 0xf0, 0x97, 0x08,
+++	0x86, 0x53, 0xbe, 0xbd, 0x40, 0x41, 0x38, 0x1c,
+++	0xb4, 0x8b, 0x79, 0x2e, 0x18, 0x96, 0x94, 0xde,
+++	0xe8, 0xca, 0xe5, 0x9f, 0x92, 0x9f, 0x15, 0x5d,
+++	0x56, 0x60, 0x5c, 0x09, 0xf9, 0x16, 0xf4, 0x17,
+++	0x0f, 0xf6, 0x4c, 0xda, 0xe6, 0x67, 0x89, 0x9f,
+++	0xca, 0x6c, 0xe7, 0x9b, 0x04, 0x62, 0x0e, 0x26,
+++	0xa6, 0x52, 0xbd, 0x29, 0xff, 0xc7, 0xa4, 0x96,
+++	0xe6, 0x6a, 0x02, 0xa5, 0x2e, 0x7b, 0xfe, 0x97,
+++	0x68, 0x3e, 0x2e, 0x5f, 0x3b, 0x0f, 0x36, 0xd6,
+++	0x98, 0x19, 0x59, 0x48, 0xd2, 0xc6, 0xe1, 0x55,
+++	0x1a, 0x6e, 0xd6, 0xed, 0x2c, 0xba, 0xc3, 0x9e,
+++	0x64, 0xc9, 0x95, 0x86, 0x35, 0x5e, 0x3e, 0x88,
+++	0x69, 0x99, 0x4b, 0xee, 0xbe, 0x9a, 0x99, 0xb5,
+++	0x6e, 0x58, 0xae, 0xdd, 0x22, 0xdb, 0xdd, 0x6b,
+++	0xfc, 0xaf, 0x90, 0xa3, 0x3d, 0xa4, 0xc1, 0x15,
+++	0x92, 0x18, 0x8d, 0xd2, 0x4b, 0x7b, 0x06, 0xd1,
+++	0x37, 0xb5, 0xe2, 0x7c, 0x2c, 0xf0, 0x25, 0xe4,
+++	0x94, 0x2a, 0xbd, 0xe3, 0x82, 0x70, 0x78, 0xa3,
+++	0x82, 0x10, 0x5a, 0x90, 0xd7, 0xa4, 0xfa, 0xaf,
+++	0x1a, 0x88, 0x59, 0xdc, 0x74, 0x12, 0xb4, 0x8e,
+++	0xd7, 0x19, 0x46, 0xf4, 0x84, 0x69, 0x9f, 0xbb,
+++	0x70, 0xa8, 0x4c, 0x52, 0x81, 0xa9, 0xff, 0x76,
+++	0x1c, 0xae, 0xd8, 0x11, 0x3d, 0x7f, 0x7d, 0xc5,
+++	0x12, 0x59, 0x28, 0x18, 0xc2, 0xa2, 0xb7, 0x1c,
+++	0x88, 0xf8, 0xd6, 0x1b, 0xa6, 0x7d, 0x9e, 0xde,
+++	0x29, 0xf8, 0xed, 0xff, 0xeb, 0x92, 0x24, 0x4f,
+++	0x05, 0xaa, 0xd9, 0x49, 0xba, 0x87, 0x59, 0x51,
+++	0xc9, 0x20, 0x5c, 0x9b, 0x74, 0xcf, 0x03, 0xd9,
+++	0x2d, 0x34, 0xc7, 0x5b, 0xa5, 0x40, 0xb2, 0x99,
+++	0xf5, 0xcb, 0xb4, 0xf6, 0xb7, 0x72, 0x4a, 0xd6,
+++	0xbd, 0xb0, 0xf3, 0x93, 0xe0, 0x1b, 0xa8, 0x04,
+++	0x1e, 0x35, 0xd4, 0x80, 0x20, 0xf4, 0x9c, 0x31,
+++	0x6b, 0x45, 0xb9, 0x15, 0xb0, 0x5e, 0xdd, 0x0a,
+++	0x33, 0x9c, 0x83, 0xcd, 0x58, 0x89, 0x50, 0x56,
+++	0xbb, 0x81, 0x00, 0x91, 0x32, 0xf3, 0x1b, 0x3e,
+++	0xcf, 0x45, 0xe1, 0xf9, 0xe1, 0x2c, 0x26, 0x78,
+++	0x93, 0x9a, 0x60, 0x46, 0xc9, 0xb5, 0x5e, 0x6a,
+++	0x28, 0x92, 0x87, 0x3f, 0x63, 0x7b, 0xdb, 0xf7,
+++	0xd0, 0x13, 0x9d, 0x32, 0x40, 0x5e, 0xcf, 0xfb,
+++	0x79, 0x68, 0x47, 0x4c, 0xfd, 0x01, 0x17, 0xe6,
+++	0x97, 0x93, 0x78, 0xbb, 0xa6, 0x27, 0xa3, 0xe8,
+++	0x1a, 0xe8, 0x94, 0x55, 0x7d, 0x08, 0xe5, 0xdc,
+++	0x66, 0xa3, 0x69, 0xc8, 0xca, 0xc5, 0xa1, 0x84,
+++	0x55, 0xde, 0x08, 0x91, 0x16, 0x3a, 0x0c, 0x86,
+++	0xab, 0x27, 0x2b, 0x64, 0x34, 0x02, 0x6c, 0x76,
+++	0x8b, 0xc6, 0xaf, 0xcc, 0xe1, 0xd6, 0x8c, 0x2a,
+++	0x18, 0x3d, 0xa6, 0x1b, 0x37, 0x75, 0x45, 0x73,
+++	0xc2, 0x75, 0xd7, 0x53, 0x78, 0x3a, 0xd6, 0xe8,
+++	0x29, 0xd2, 0x4a, 0xa8, 0x1e, 0x82, 0xf6, 0xb6,
+++	0x81, 0xde, 0x21, 0xed, 0x2b, 0x56, 0xbb, 0xf2,
+++	0xd0, 0x57, 0xc1, 0x7c, 0xd2, 0x6a, 0xd2, 0x56,
+++	0xf5, 0x13, 0x5f, 0x1c, 0x6a, 0x0b, 0x74, 0xfb,
+++	0xe9, 0xfe, 0x9e, 0xea, 0x95, 0xb2, 0x46, 0xab,
+++	0x0a, 0xfc, 0xfd, 0xf3, 0xbb, 0x04, 0x2b, 0x76,
+++	0x1b, 0xa4, 0x74, 0xb0, 0xc1, 0x78, 0xc3, 0x69,
+++	0xe2, 0xb0, 0x01, 0xe1, 0xde, 0x32, 0x4c, 0x8d,
+++	0x1a, 0xb3, 0x38, 0x08, 0xd5, 0xfc, 0x1f, 0xdc,
+++	0x0e, 0x2c, 0x9c, 0xb1, 0xa1, 0x63, 0x17, 0x22,
+++	0xf5, 0x6c, 0x93, 0x70, 0x74, 0x00, 0xf8, 0x39,
+++	0x01, 0x94, 0xd1, 0x32, 0x23, 0x56, 0x5d, 0xa6,
+++	0x02, 0x76, 0x76, 0x93, 0xce, 0x2f, 0x19, 0xe9,
+++	0x17, 0x52, 0xae, 0x6e, 0x2c, 0x6d, 0x61, 0x7f,
+++	0x3b, 0xaa, 0xe0, 0x52, 0x85, 0xc5, 0x65, 0xc1,
+++	0xbb, 0x8e, 0x5b, 0x21, 0xd5, 0xc9, 0x78, 0x83,
+++	0x07, 0x97, 0x4c, 0x62, 0x61, 0x41, 0xd4, 0xfc,
+++	0xc9, 0x39, 0xe3, 0x9b, 0xd0, 0xcc, 0x75, 0xc4,
+++	0x97, 0xe6, 0xdd, 0x2a, 0x5f, 0xa6, 0xe8, 0x59,
+++	0x6c, 0x98, 0xb9, 0x02, 0xe2, 0xa2, 0xd6, 0x68,
+++	0xee, 0x3b, 0x1d, 0xe3, 0x4d, 0x5b, 0x30, 0xef,
+++	0x03, 0xf2, 0xeb, 0x18, 0x57, 0x36, 0xe8, 0xa1,
+++	0xf4, 0x47, 0xfb, 0xcb, 0x8f, 0xcb, 0xc8, 0xf3,
+++	0x4f, 0x74, 0x9d, 0x9d, 0xb1, 0x8d, 0x14, 0x44,
+++	0xd9, 0x19, 0xb4, 0x54, 0x4f, 0x75, 0x19, 0x09,
+++	0xa0, 0x75, 0xbc, 0x3b, 0x82, 0xc6, 0x3f, 0xb8,
+++	0x83, 0x19, 0x6e, 0xd6, 0x37, 0xfe, 0x6e, 0x8a,
+++	0x4e, 0xe0, 0x4a, 0xab, 0x7b, 0xc8, 0xb4, 0x1d,
+++	0xf4, 0xed, 0x27, 0x03, 0x65, 0xa2, 0xa1, 0xae,
+++	0x11, 0xe7, 0x98, 0x78, 0x48, 0x91, 0xd2, 0xd2,
+++	0xd4, 0x23, 0x78, 0x50, 0xb1, 0x5b, 0x85, 0x10,
+++	0x8d, 0xca, 0x5f, 0x0f, 0x71, 0xae, 0x72, 0x9a,
+++	0xf6, 0x25, 0x19, 0x60, 0x06, 0xf7, 0x10, 0x34,
+++	0x18, 0x0d, 0xc9, 0x9f, 0x7b, 0x0c, 0x9b, 0x8f,
+++	0x91, 0x1b, 0x9f, 0xcd, 0x10, 0xee, 0x75, 0xf9,
+++	0x97, 0x66, 0xfc, 0x4d, 0x33, 0x6e, 0x28, 0x2b,
+++	0x92, 0x85, 0x4f, 0xab, 0x43, 0x8d, 0x8f, 0x7d,
+++	0x86, 0xa7, 0xc7, 0xd8, 0xd3, 0x0b, 0x8b, 0x57,
+++	0xb6, 0x1d, 0x95, 0x0d, 0xe9, 0xbc, 0xd9, 0x03,
+++	0xd9, 0x10, 0x19, 0xc3, 0x46, 0x63, 0x55, 0x87,
+++	0x61, 0x79, 0x6c, 0x95, 0x0e, 0x9c, 0xdd, 0xca,
+++	0xc3, 0xf3, 0x64, 0xf0, 0x7d, 0x76, 0xb7, 0x53,
+++	0x67, 0x2b, 0x1e, 0x44, 0x56, 0x81, 0xea, 0x8f,
+++	0x5c, 0x42, 0x16, 0xb8, 0x28, 0xeb, 0x1b, 0x61,
+++	0x10, 0x1e, 0xbf, 0xec, 0xa8
+++};
+++static const u8 enc_output011[] __initconst = {
+++	0x6a, 0xfc, 0x4b, 0x25, 0xdf, 0xc0, 0xe4, 0xe8,
+++	0x17, 0x4d, 0x4c, 0xc9, 0x7e, 0xde, 0x3a, 0xcc,
+++	0x3c, 0xba, 0x6a, 0x77, 0x47, 0xdb, 0xe3, 0x74,
+++	0x7a, 0x4d, 0x5f, 0x8d, 0x37, 0x55, 0x80, 0x73,
+++	0x90, 0x66, 0x5d, 0x3a, 0x7d, 0x5d, 0x86, 0x5e,
+++	0x8d, 0xfd, 0x83, 0xff, 0x4e, 0x74, 0x6f, 0xf9,
+++	0xe6, 0x70, 0x17, 0x70, 0x3e, 0x96, 0xa7, 0x7e,
+++	0xcb, 0xab, 0x8f, 0x58, 0x24, 0x9b, 0x01, 0xfd,
+++	0xcb, 0xe6, 0x4d, 0x9b, 0xf0, 0x88, 0x94, 0x57,
+++	0x66, 0xef, 0x72, 0x4c, 0x42, 0x6e, 0x16, 0x19,
+++	0x15, 0xea, 0x70, 0x5b, 0xac, 0x13, 0xdb, 0x9f,
+++	0x18, 0xe2, 0x3c, 0x26, 0x97, 0xbc, 0xdc, 0x45,
+++	0x8c, 0x6c, 0x24, 0x69, 0x9c, 0xf7, 0x65, 0x1e,
+++	0x18, 0x59, 0x31, 0x7c, 0xe4, 0x73, 0xbc, 0x39,
+++	0x62, 0xc6, 0x5c, 0x9f, 0xbf, 0xfa, 0x90, 0x03,
+++	0xc9, 0x72, 0x26, 0xb6, 0x1b, 0xc2, 0xb7, 0x3f,
+++	0xf2, 0x13, 0x77, 0xf2, 0x8d, 0xb9, 0x47, 0xd0,
+++	0x53, 0xdd, 0xc8, 0x91, 0x83, 0x8b, 0xb1, 0xce,
+++	0xa3, 0xfe, 0xcd, 0xd9, 0xdd, 0x92, 0x7b, 0xdb,
+++	0xb8, 0xfb, 0xc9, 0x2d, 0x01, 0x59, 0x39, 0x52,
+++	0xad, 0x1b, 0xec, 0xcf, 0xd7, 0x70, 0x13, 0x21,
+++	0xf5, 0x47, 0xaa, 0x18, 0x21, 0x5c, 0xc9, 0x9a,
+++	0xd2, 0x6b, 0x05, 0x9c, 0x01, 0xa1, 0xda, 0x35,
+++	0x5d, 0xb3, 0x70, 0xe6, 0xa9, 0x80, 0x8b, 0x91,
+++	0xb7, 0xb3, 0x5f, 0x24, 0x9a, 0xb7, 0xd1, 0x6b,
+++	0xa1, 0x1c, 0x50, 0xba, 0x49, 0xe0, 0xee, 0x2e,
+++	0x75, 0xac, 0x69, 0xc0, 0xeb, 0x03, 0xdd, 0x19,
+++	0xe5, 0xf6, 0x06, 0xdd, 0xc3, 0xd7, 0x2b, 0x07,
+++	0x07, 0x30, 0xa7, 0x19, 0x0c, 0xbf, 0xe6, 0x18,
+++	0xcc, 0xb1, 0x01, 0x11, 0x85, 0x77, 0x1d, 0x96,
+++	0xa7, 0xa3, 0x00, 0x84, 0x02, 0xa2, 0x83, 0x68,
+++	0xda, 0x17, 0x27, 0xc8, 0x7f, 0x23, 0xb7, 0xf4,
+++	0x13, 0x85, 0xcf, 0xdd, 0x7a, 0x7d, 0x24, 0x57,
+++	0xfe, 0x05, 0x93, 0xf5, 0x74, 0xce, 0xed, 0x0c,
+++	0x20, 0x98, 0x8d, 0x92, 0x30, 0xa1, 0x29, 0x23,
+++	0x1a, 0xa0, 0x4f, 0x69, 0x56, 0x4c, 0xe1, 0xc8,
+++	0xce, 0xf6, 0x9a, 0x0c, 0xa4, 0xfa, 0x04, 0xf6,
+++	0x62, 0x95, 0xf2, 0xfa, 0xc7, 0x40, 0x68, 0x40,
+++	0x8f, 0x41, 0xda, 0xb4, 0x26, 0x6f, 0x70, 0xab,
+++	0x40, 0x61, 0xa4, 0x0e, 0x75, 0xfb, 0x86, 0xeb,
+++	0x9d, 0x9a, 0x1f, 0xec, 0x76, 0x99, 0xe7, 0xea,
+++	0xaa, 0x1e, 0x2d, 0xb5, 0xd4, 0xa6, 0x1a, 0xb8,
+++	0x61, 0x0a, 0x1d, 0x16, 0x5b, 0x98, 0xc2, 0x31,
+++	0x40, 0xe7, 0x23, 0x1d, 0x66, 0x99, 0xc8, 0xc0,
+++	0xd7, 0xce, 0xf3, 0x57, 0x40, 0x04, 0x3f, 0xfc,
+++	0xea, 0xb3, 0xfc, 0xd2, 0xd3, 0x99, 0xa4, 0x94,
+++	0x69, 0xa0, 0xef, 0xd1, 0x85, 0xb3, 0xa6, 0xb1,
+++	0x28, 0xbf, 0x94, 0x67, 0x22, 0xc3, 0x36, 0x46,
+++	0xf8, 0xd2, 0x0f, 0x5f, 0xf4, 0x59, 0x80, 0xe6,
+++	0x2d, 0x43, 0x08, 0x7d, 0x19, 0x09, 0x97, 0xa7,
+++	0x4c, 0x3d, 0x8d, 0xba, 0x65, 0x62, 0xa3, 0x71,
+++	0x33, 0x29, 0x62, 0xdb, 0xc1, 0x33, 0x34, 0x1a,
+++	0x63, 0x33, 0x16, 0xb6, 0x64, 0x7e, 0xab, 0x33,
+++	0xf0, 0xe6, 0x26, 0x68, 0xba, 0x1d, 0x2e, 0x38,
+++	0x08, 0xe6, 0x02, 0xd3, 0x25, 0x2c, 0x47, 0x23,
+++	0x58, 0x34, 0x0f, 0x9d, 0x63, 0x4f, 0x63, 0xbb,
+++	0x7f, 0x3b, 0x34, 0x38, 0xa7, 0xb5, 0x8d, 0x65,
+++	0xd9, 0x9f, 0x79, 0x55, 0x3e, 0x4d, 0xe7, 0x73,
+++	0xd8, 0xf6, 0x98, 0x97, 0x84, 0x60, 0x9c, 0xc8,
+++	0xa9, 0x3c, 0xf6, 0xdc, 0x12, 0x5c, 0xe1, 0xbb,
+++	0x0b, 0x8b, 0x98, 0x9c, 0x9d, 0x26, 0x7c, 0x4a,
+++	0xe6, 0x46, 0x36, 0x58, 0x21, 0x4a, 0xee, 0xca,
+++	0xd7, 0x3b, 0xc2, 0x6c, 0x49, 0x2f, 0xe5, 0xd5,
+++	0x03, 0x59, 0x84, 0x53, 0xcb, 0xfe, 0x92, 0x71,
+++	0x2e, 0x7c, 0x21, 0xcc, 0x99, 0x85, 0x7f, 0xb8,
+++	0x74, 0x90, 0x13, 0x42, 0x3f, 0xe0, 0x6b, 0x1d,
+++	0xf2, 0x4d, 0x54, 0xd4, 0xfc, 0x3a, 0x05, 0xe6,
+++	0x74, 0xaf, 0xa6, 0xa0, 0x2a, 0x20, 0x23, 0x5d,
+++	0x34, 0x5c, 0xd9, 0x3e, 0x4e, 0xfa, 0x93, 0xe7,
+++	0xaa, 0xe9, 0x6f, 0x08, 0x43, 0x67, 0x41, 0xc5,
+++	0xad, 0xfb, 0x31, 0x95, 0x82, 0x73, 0x32, 0xd8,
+++	0xa6, 0xa3, 0xed, 0x0e, 0x2d, 0xf6, 0x5f, 0xfd,
+++	0x80, 0xa6, 0x7a, 0xe0, 0xdf, 0x78, 0x15, 0x29,
+++	0x74, 0x33, 0xd0, 0x9e, 0x83, 0x86, 0x72, 0x22,
+++	0x57, 0x29, 0xb9, 0x9e, 0x5d, 0xd3, 0x1a, 0xb5,
+++	0x96, 0x72, 0x41, 0x3d, 0xf1, 0x64, 0x43, 0x67,
+++	0xee, 0xaa, 0x5c, 0xd3, 0x9a, 0x96, 0x13, 0x11,
+++	0x5d, 0xf3, 0x0c, 0x87, 0x82, 0x1e, 0x41, 0x9e,
+++	0xd0, 0x27, 0xd7, 0x54, 0x3b, 0x67, 0x73, 0x09,
+++	0x91, 0xe9, 0xd5, 0x36, 0xa7, 0xb5, 0x55, 0xe4,
+++	0xf3, 0x21, 0x51, 0x49, 0x22, 0x07, 0x55, 0x4f,
+++	0x44, 0x4b, 0xd2, 0x15, 0x93, 0x17, 0x2a, 0xfa,
+++	0x4d, 0x4a, 0x57, 0xdb, 0x4c, 0xa6, 0xeb, 0xec,
+++	0x53, 0x25, 0x6c, 0x21, 0xed, 0x00, 0x4c, 0x3b,
+++	0xca, 0x14, 0x57, 0xa9, 0xd6, 0x6a, 0xcd, 0x8d,
+++	0x5e, 0x74, 0xac, 0x72, 0xc1, 0x97, 0xe5, 0x1b,
+++	0x45, 0x4e, 0xda, 0xfc, 0xcc, 0x40, 0xe8, 0x48,
+++	0x88, 0x0b, 0xa3, 0xe3, 0x8d, 0x83, 0x42, 0xc3,
+++	0x23, 0xfd, 0x68, 0xb5, 0x8e, 0xf1, 0x9d, 0x63,
+++	0x77, 0xe9, 0xa3, 0x8e, 0x8c, 0x26, 0x6b, 0xbd,
+++	0x72, 0x73, 0x35, 0x0c, 0x03, 0xf8, 0x43, 0x78,
+++	0x52, 0x71, 0x15, 0x1f, 0x71, 0x5d, 0x6e, 0xed,
+++	0xb9, 0xcc, 0x86, 0x30, 0xdb, 0x2b, 0xd3, 0x82,
+++	0x88, 0x23, 0x71, 0x90, 0x53, 0x5c, 0xa9, 0x2f,
+++	0x76, 0x01, 0xb7, 0x9a, 0xfe, 0x43, 0x55, 0xa3,
+++	0x04, 0x9b, 0x0e, 0xe4, 0x59, 0xdf, 0xc9, 0xe9,
+++	0xb1, 0xea, 0x29, 0x28, 0x3c, 0x5c, 0xae, 0x72,
+++	0x84, 0xb6, 0xc6, 0xeb, 0x0c, 0x27, 0x07, 0x74,
+++	0x90, 0x0d, 0x31, 0xb0, 0x00, 0x77, 0xe9, 0x40,
+++	0x70, 0x6f, 0x68, 0xa7, 0xfd, 0x06, 0xec, 0x4b,
+++	0xc0, 0xb7, 0xac, 0xbc, 0x33, 0xb7, 0x6d, 0x0a,
+++	0xbd, 0x12, 0x1b, 0x59, 0xcb, 0xdd, 0x32, 0xf5,
+++	0x1d, 0x94, 0x57, 0x76, 0x9e, 0x0c, 0x18, 0x98,
+++	0x71, 0xd7, 0x2a, 0xdb, 0x0b, 0x7b, 0xa7, 0x71,
+++	0xb7, 0x67, 0x81, 0x23, 0x96, 0xae, 0xb9, 0x7e,
+++	0x32, 0x43, 0x92, 0x8a, 0x19, 0xa0, 0xc4, 0xd4,
+++	0x3b, 0x57, 0xf9, 0x4a, 0x2c, 0xfb, 0x51, 0x46,
+++	0xbb, 0xcb, 0x5d, 0xb3, 0xef, 0x13, 0x93, 0x6e,
+++	0x68, 0x42, 0x54, 0x57, 0xd3, 0x6a, 0x3a, 0x8f,
+++	0x9d, 0x66, 0xbf, 0xbd, 0x36, 0x23, 0xf5, 0x93,
+++	0x83, 0x7b, 0x9c, 0xc0, 0xdd, 0xc5, 0x49, 0xc0,
+++	0x64, 0xed, 0x07, 0x12, 0xb3, 0xe6, 0xe4, 0xe5,
+++	0x38, 0x95, 0x23, 0xb1, 0xa0, 0x3b, 0x1a, 0x61,
+++	0xda, 0x17, 0xac, 0xc3, 0x58, 0xdd, 0x74, 0x64,
+++	0x22, 0x11, 0xe8, 0x32, 0x1d, 0x16, 0x93, 0x85,
+++	0x99, 0xa5, 0x9c, 0x34, 0x55, 0xb1, 0xe9, 0x20,
+++	0x72, 0xc9, 0x28, 0x7b, 0x79, 0x00, 0xa1, 0xa6,
+++	0xa3, 0x27, 0x40, 0x18, 0x8a, 0x54, 0xe0, 0xcc,
+++	0xe8, 0x4e, 0x8e, 0x43, 0x96, 0xe7, 0x3f, 0xc8,
+++	0xe9, 0xb2, 0xf9, 0xc9, 0xda, 0x04, 0x71, 0x50,
+++	0x47, 0xe4, 0xaa, 0xce, 0xa2, 0x30, 0xc8, 0xe4,
+++	0xac, 0xc7, 0x0d, 0x06, 0x2e, 0xe6, 0xe8, 0x80,
+++	0x36, 0x29, 0x9e, 0x01, 0xb8, 0xc3, 0xf0, 0xa0,
+++	0x5d, 0x7a, 0xca, 0x4d, 0xa0, 0x57, 0xbd, 0x2a,
+++	0x45, 0xa7, 0x7f, 0x9c, 0x93, 0x07, 0x8f, 0x35,
+++	0x67, 0x92, 0xe3, 0xe9, 0x7f, 0xa8, 0x61, 0x43,
+++	0x9e, 0x25, 0x4f, 0x33, 0x76, 0x13, 0x6e, 0x12,
+++	0xb9, 0xdd, 0xa4, 0x7c, 0x08, 0x9f, 0x7c, 0xe7,
+++	0x0a, 0x8d, 0x84, 0x06, 0xa4, 0x33, 0x17, 0x34,
+++	0x5e, 0x10, 0x7c, 0xc0, 0xa8, 0x3d, 0x1f, 0x42,
+++	0x20, 0x51, 0x65, 0x5d, 0x09, 0xc3, 0xaa, 0xc0,
+++	0xc8, 0x0d, 0xf0, 0x79, 0xbc, 0x20, 0x1b, 0x95,
+++	0xe7, 0x06, 0x7d, 0x47, 0x20, 0x03, 0x1a, 0x74,
+++	0xdd, 0xe2, 0xd4, 0xae, 0x38, 0x71, 0x9b, 0xf5,
+++	0x80, 0xec, 0x08, 0x4e, 0x56, 0xba, 0x76, 0x12,
+++	0x1a, 0xdf, 0x48, 0xf3, 0xae, 0xb3, 0xe6, 0xe6,
+++	0xbe, 0xc0, 0x91, 0x2e, 0x01, 0xb3, 0x01, 0x86,
+++	0xa2, 0xb9, 0x52, 0xd1, 0x21, 0xae, 0xd4, 0x97,
+++	0x1d, 0xef, 0x41, 0x12, 0x95, 0x3d, 0x48, 0x45,
+++	0x1c, 0x56, 0x32, 0x8f, 0xb8, 0x43, 0xbb, 0x19,
+++	0xf3, 0xca, 0xe9, 0xeb, 0x6d, 0x84, 0xbe, 0x86,
+++	0x06, 0xe2, 0x36, 0xb2, 0x62, 0x9d, 0xd3, 0x4c,
+++	0x48, 0x18, 0x54, 0x13, 0x4e, 0xcf, 0xfd, 0xba,
+++	0x84, 0xb9, 0x30, 0x53, 0xcf, 0xfb, 0xb9, 0x29,
+++	0x8f, 0xdc, 0x9f, 0xef, 0x60, 0x0b, 0x64, 0xf6,
+++	0x8b, 0xee, 0xa6, 0x91, 0xc2, 0x41, 0x6c, 0xf6,
+++	0xfa, 0x79, 0x67, 0x4b, 0xc1, 0x3f, 0xaf, 0x09,
+++	0x81, 0xd4, 0x5d, 0xcb, 0x09, 0xdf, 0x36, 0x31,
+++	0xc0, 0x14, 0x3c, 0x7c, 0x0e, 0x65, 0x95, 0x99,
+++	0x6d, 0xa3, 0xf4, 0xd7, 0x38, 0xee, 0x1a, 0x2b,
+++	0x37, 0xe2, 0xa4, 0x3b, 0x4b, 0xd0, 0x65, 0xca,
+++	0xf8, 0xc3, 0xe8, 0x15, 0x20, 0xef, 0xf2, 0x00,
+++	0xfd, 0x01, 0x09, 0xc5, 0xc8, 0x17, 0x04, 0x93,
+++	0xd0, 0x93, 0x03, 0x55, 0xc5, 0xfe, 0x32, 0xa3,
+++	0x3e, 0x28, 0x2d, 0x3b, 0x93, 0x8a, 0xcc, 0x07,
+++	0x72, 0x80, 0x8b, 0x74, 0x16, 0x24, 0xbb, 0xda,
+++	0x94, 0x39, 0x30, 0x8f, 0xb1, 0xcd, 0x4a, 0x90,
+++	0x92, 0x7c, 0x14, 0x8f, 0x95, 0x4e, 0xac, 0x9b,
+++	0xd8, 0x8f, 0x1a, 0x87, 0xa4, 0x32, 0x27, 0x8a,
+++	0xba, 0xf7, 0x41, 0xcf, 0x84, 0x37, 0x19, 0xe6,
+++	0x06, 0xf5, 0x0e, 0xcf, 0x36, 0xf5, 0x9e, 0x6c,
+++	0xde, 0xbc, 0xff, 0x64, 0x7e, 0x4e, 0x59, 0x57,
+++	0x48, 0xfe, 0x14, 0xf7, 0x9c, 0x93, 0x5d, 0x15,
+++	0xad, 0xcc, 0x11, 0xb1, 0x17, 0x18, 0xb2, 0x7e,
+++	0xcc, 0xab, 0xe9, 0xce, 0x7d, 0x77, 0x5b, 0x51,
+++	0x1b, 0x1e, 0x20, 0xa8, 0x32, 0x06, 0x0e, 0x75,
+++	0x93, 0xac, 0xdb, 0x35, 0x37, 0x1f, 0xe9, 0x19,
+++	0x1d, 0xb4, 0x71, 0x97, 0xd6, 0x4e, 0x2c, 0x08,
+++	0xa5, 0x13, 0xf9, 0x0e, 0x7e, 0x78, 0x6e, 0x14,
+++	0xe0, 0xa9, 0xb9, 0x96, 0x4c, 0x80, 0x82, 0xba,
+++	0x17, 0xb3, 0x9d, 0x69, 0xb0, 0x84, 0x46, 0xff,
+++	0xf9, 0x52, 0x79, 0x94, 0x58, 0x3a, 0x62, 0x90,
+++	0x15, 0x35, 0x71, 0x10, 0x37, 0xed, 0xa1, 0x8e,
+++	0x53, 0x6e, 0xf4, 0x26, 0x57, 0x93, 0x15, 0x93,
+++	0xf6, 0x81, 0x2c, 0x5a, 0x10, 0xda, 0x92, 0xad,
+++	0x2f, 0xdb, 0x28, 0x31, 0x2d, 0x55, 0x04, 0xd2,
+++	0x06, 0x28, 0x8c, 0x1e, 0xdc, 0xea, 0x54, 0xac,
+++	0xff, 0xb7, 0x6c, 0x30, 0x15, 0xd4, 0xb4, 0x0d,
+++	0x00, 0x93, 0x57, 0xdd, 0xd2, 0x07, 0x07, 0x06,
+++	0xd9, 0x43, 0x9b, 0xcd, 0x3a, 0xf4, 0x7d, 0x4c,
+++	0x36, 0x5d, 0x23, 0xa2, 0xcc, 0x57, 0x40, 0x91,
+++	0xe9, 0x2c, 0x2f, 0x2c, 0xd5, 0x30, 0x9b, 0x17,
+++	0xb0, 0xc9, 0xf7, 0xa7, 0x2f, 0xd1, 0x93, 0x20,
+++	0x6b, 0xc6, 0xc1, 0xe4, 0x6f, 0xcb, 0xd1, 0xe7,
+++	0x09, 0x0f, 0x9e, 0xdc, 0xaa, 0x9f, 0x2f, 0xdf,
+++	0x56, 0x9f, 0xd4, 0x33, 0x04, 0xaf, 0xd3, 0x6c,
+++	0x58, 0x61, 0xf0, 0x30, 0xec, 0xf2, 0x7f, 0xf2,
+++	0x9c, 0xdf, 0x39, 0xbb, 0x6f, 0xa2, 0x8c, 0x7e,
+++	0xc4, 0x22, 0x51, 0x71, 0xc0, 0x4d, 0x14, 0x1a,
+++	0xc4, 0xcd, 0x04, 0xd9, 0x87, 0x08, 0x50, 0x05,
+++	0xcc, 0xaf, 0xf6, 0xf0, 0x8f, 0x92, 0x54, 0x58,
+++	0xc2, 0xc7, 0x09, 0x7a, 0x59, 0x02, 0x05, 0xe8,
+++	0xb0, 0x86, 0xd9, 0xbf, 0x7b, 0x35, 0x51, 0x4d,
+++	0xaf, 0x08, 0x97, 0x2c, 0x65, 0xda, 0x2a, 0x71,
+++	0x3a, 0xa8, 0x51, 0xcc, 0xf2, 0x73, 0x27, 0xc3,
+++	0xfd, 0x62, 0xcf, 0xe3, 0xb2, 0xca, 0xcb, 0xbe,
+++	0x1a, 0x0a, 0xa1, 0x34, 0x7b, 0x77, 0xc4, 0x62,
+++	0x68, 0x78, 0x5f, 0x94, 0x07, 0x04, 0x65, 0x16,
+++	0x4b, 0x61, 0xcb, 0xff, 0x75, 0x26, 0x50, 0x66,
+++	0x1f, 0x6e, 0x93, 0xf8, 0xc5, 0x51, 0xeb, 0xa4,
+++	0x4a, 0x48, 0x68, 0x6b, 0xe2, 0x5e, 0x44, 0xb2,
+++	0x50, 0x2c, 0x6c, 0xae, 0x79, 0x4e, 0x66, 0x35,
+++	0x81, 0x50, 0xac, 0xbc, 0x3f, 0xb1, 0x0c, 0xf3,
+++	0x05, 0x3c, 0x4a, 0xa3, 0x6c, 0x2a, 0x79, 0xb4,
+++	0xb7, 0xab, 0xca, 0xc7, 0x9b, 0x8e, 0xcd, 0x5f,
+++	0x11, 0x03, 0xcb, 0x30, 0xa3, 0xab, 0xda, 0xfe,
+++	0x64, 0xb9, 0xbb, 0xd8, 0x5e, 0x3a, 0x1a, 0x56,
+++	0xe5, 0x05, 0x48, 0x90, 0x1e, 0x61, 0x69, 0x1b,
+++	0x22, 0xe6, 0x1a, 0x3c, 0x75, 0xad, 0x1f, 0x37,
+++	0x28, 0xdc, 0xe4, 0x6d, 0xbd, 0x42, 0xdc, 0xd3,
+++	0xc8, 0xb6, 0x1c, 0x48, 0xfe, 0x94, 0x77, 0x7f,
+++	0xbd, 0x62, 0xac, 0xa3, 0x47, 0x27, 0xcf, 0x5f,
+++	0xd9, 0xdb, 0xaf, 0xec, 0xf7, 0x5e, 0xc1, 0xb0,
+++	0x9d, 0x01, 0x26, 0x99, 0x7e, 0x8f, 0x03, 0x70,
+++	0xb5, 0x42, 0xbe, 0x67, 0x28, 0x1b, 0x7c, 0xbd,
+++	0x61, 0x21, 0x97, 0xcc, 0x5c, 0xe1, 0x97, 0x8f,
+++	0x8d, 0xde, 0x2b, 0xaa, 0xa7, 0x71, 0x1d, 0x1e,
+++	0x02, 0x73, 0x70, 0x58, 0x32, 0x5b, 0x1d, 0x67,
+++	0x3d, 0xe0, 0x74, 0x4f, 0x03, 0xf2, 0x70, 0x51,
+++	0x79, 0xf1, 0x61, 0x70, 0x15, 0x74, 0x9d, 0x23,
+++	0x89, 0xde, 0xac, 0xfd, 0xde, 0xd0, 0x1f, 0xc3,
+++	0x87, 0x44, 0x35, 0x4b, 0xe5, 0xb0, 0x60, 0xc5,
+++	0x22, 0xe4, 0x9e, 0xca, 0xeb, 0xd5, 0x3a, 0x09,
+++	0x45, 0xa4, 0xdb, 0xfa, 0x3f, 0xeb, 0x1b, 0xc7,
+++	0xc8, 0x14, 0x99, 0x51, 0x92, 0x10, 0xed, 0xed,
+++	0x28, 0xe0, 0xa1, 0xf8, 0x26, 0xcf, 0xcd, 0xcb,
+++	0x63, 0xa1, 0x3b, 0xe3, 0xdf, 0x7e, 0xfe, 0xa6,
+++	0xf0, 0x81, 0x9a, 0xbf, 0x55, 0xde, 0x54, 0xd5,
+++	0x56, 0x60, 0x98, 0x10, 0x68, 0xf4, 0x38, 0x96,
+++	0x8e, 0x6f, 0x1d, 0x44, 0x7f, 0xd6, 0x2f, 0xfe,
+++	0x55, 0xfb, 0x0c, 0x7e, 0x67, 0xe2, 0x61, 0x44,
+++	0xed, 0xf2, 0x35, 0x30, 0x5d, 0xe9, 0xc7, 0xd6,
+++	0x6d, 0xe0, 0xa0, 0xed, 0xf3, 0xfc, 0xd8, 0x3e,
+++	0x0a, 0x7b, 0xcd, 0xaf, 0x65, 0x68, 0x18, 0xc0,
+++	0xec, 0x04, 0x1c, 0x74, 0x6d, 0xe2, 0x6e, 0x79,
+++	0xd4, 0x11, 0x2b, 0x62, 0xd5, 0x27, 0xad, 0x4f,
+++	0x01, 0x59, 0x73, 0xcc, 0x6a, 0x53, 0xfb, 0x2d,
+++	0xd5, 0x4e, 0x99, 0x21, 0x65, 0x4d, 0xf5, 0x82,
+++	0xf7, 0xd8, 0x42, 0xce, 0x6f, 0x3d, 0x36, 0x47,
+++	0xf1, 0x05, 0x16, 0xe8, 0x1b, 0x6a, 0x8f, 0x93,
+++	0xf2, 0x8f, 0x37, 0x40, 0x12, 0x28, 0xa3, 0xe6,
+++	0xb9, 0x17, 0x4a, 0x1f, 0xb1, 0xd1, 0x66, 0x69,
+++	0x86, 0xc4, 0xfc, 0x97, 0xae, 0x3f, 0x8f, 0x1e,
+++	0x2b, 0xdf, 0xcd, 0xf9, 0x3c
+++};
+++static const u8 enc_assoc011[] __initconst = {
+++	0xd6, 0x31, 0xda, 0x5d, 0x42, 0x5e, 0xd7
+++};
+++static const u8 enc_nonce011[] __initconst = {
+++	0xfd, 0x87, 0xd4, 0xd8, 0x62, 0xfd, 0xec, 0xaa
+++};
+++static const u8 enc_key011[] __initconst = {
+++	0x35, 0x4e, 0xb5, 0x70, 0x50, 0x42, 0x8a, 0x85,
+++	0xf2, 0xfb, 0xed, 0x7b, 0xd0, 0x9e, 0x97, 0xca,
+++	0xfa, 0x98, 0x66, 0x63, 0xee, 0x37, 0xcc, 0x52,
+++	0xfe, 0xd1, 0xdf, 0x95, 0x15, 0x34, 0x29, 0x38
+++};
+++
+++static const u8 enc_input012[] __initconst = {
+++	0x74, 0xa6, 0x3e, 0xe4, 0xb1, 0xcb, 0xaf, 0xb0,
+++	0x40, 0xe5, 0x0f, 0x9e, 0xf1, 0xf2, 0x89, 0xb5,
+++	0x42, 0x34, 0x8a, 0xa1, 0x03, 0xb7, 0xe9, 0x57,
+++	0x46, 0xbe, 0x20, 0xe4, 0x6e, 0xb0, 0xeb, 0xff,
+++	0xea, 0x07, 0x7e, 0xef, 0xe2, 0x55, 0x9f, 0xe5,
+++	0x78, 0x3a, 0xb7, 0x83, 0xc2, 0x18, 0x40, 0x7b,
+++	0xeb, 0xcd, 0x81, 0xfb, 0x90, 0x12, 0x9e, 0x46,
+++	0xa9, 0xd6, 0x4a, 0xba, 0xb0, 0x62, 0xdb, 0x6b,
+++	0x99, 0xc4, 0xdb, 0x54, 0x4b, 0xb8, 0xa5, 0x71,
+++	0xcb, 0xcd, 0x63, 0x32, 0x55, 0xfb, 0x31, 0xf0,
+++	0x38, 0xf5, 0xbe, 0x78, 0xe4, 0x45, 0xce, 0x1b,
+++	0x6a, 0x5b, 0x0e, 0xf4, 0x16, 0xe4, 0xb1, 0x3d,
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+++	0x46, 0xb0, 0xa6, 0x63, 0x5b, 0x8a, 0x73, 0xae,
+++	0x6f, 0xd5, 0x9d, 0xf8, 0x4f, 0x40, 0xb5, 0xb2,
+++	0x6e, 0xd3, 0xb6, 0x01, 0xa9, 0x26, 0xa2, 0x21,
+++	0xcf, 0x33, 0x7a, 0x3a, 0xa4, 0x23, 0x13, 0xb0,
+++	0x69, 0x6a, 0xee, 0xce, 0xd8, 0x9d, 0x01, 0x1d,
+++	0x50, 0xc1, 0x30, 0x6c, 0xb1, 0xcd, 0xa0, 0xf0,
+++	0xf0, 0xa2, 0x64, 0x6f, 0xbb, 0xbf, 0x5e, 0xe6,
+++	0xab, 0x87, 0xb4, 0x0f, 0x4f, 0x15, 0xaf, 0xb5,
+++	0x25, 0xa1, 0xb2, 0xd0, 0x80, 0x2c, 0xfb, 0xf9,
+++	0xfe, 0xd2, 0x33, 0xbb, 0x76, 0xfe, 0x7c, 0xa8,
+++	0x66, 0xf7, 0xe7, 0x85, 0x9f, 0x1f, 0x85, 0x57,
+++	0x88, 0xe1, 0xe9, 0x63, 0xe4, 0xd8, 0x1c, 0xa1,
+++	0xfb, 0xda, 0x44, 0x05, 0x2e, 0x1d, 0x3a, 0x1c,
+++	0xff, 0xc8, 0x3b, 0xc0, 0xfe, 0xda, 0x22, 0x0b,
+++	0x43, 0xd6, 0x88, 0x39, 0x4c, 0x4a, 0xa6, 0x69,
+++	0x18, 0x93, 0x42, 0x4e, 0xb5, 0xcc, 0x66, 0x0d,
+++	0x09, 0xf8, 0x1e, 0x7c, 0xd3, 0x3c, 0x99, 0x0d,
+++	0x50, 0x1d, 0x62, 0xe9, 0x57, 0x06, 0xbf, 0x19,
+++	0x88, 0xdd, 0xad, 0x7b, 0x4f, 0xf9, 0xc7, 0x82,
+++	0x6d, 0x8d, 0xc8, 0xc4, 0xc5, 0x78, 0x17, 0x20,
+++	0x15, 0xc5, 0x52, 0x41, 0xcf, 0x5b, 0xd6, 0x7f,
+++	0x94, 0x02, 0x41, 0xe0, 0x40, 0x22, 0x03, 0x5e,
+++	0xd1, 0x53, 0xd4, 0x86, 0xd3, 0x2c, 0x9f, 0x0f,
+++	0x96, 0xe3, 0x6b, 0x9a, 0x76, 0x32, 0x06, 0x47,
+++	0x4b, 0x11, 0xb3, 0xdd, 0x03, 0x65, 0xbd, 0x9b,
+++	0x01, 0xda, 0x9c, 0xb9, 0x7e, 0x3f, 0x6a, 0xc4,
+++	0x7b, 0xea, 0xd4, 0x3c, 0xb9, 0xfb, 0x5c, 0x6b,
+++	0x64, 0x33, 0x52, 0xba, 0x64, 0x78, 0x8f, 0xa4,
+++	0xaf, 0x7a, 0x61, 0x8d, 0xbc, 0xc5, 0x73, 0xe9,
+++	0x6b, 0x58, 0x97, 0x4b, 0xbf, 0x63, 0x22, 0xd3,
+++	0x37, 0x02, 0x54, 0xc5, 0xb9, 0x16, 0x4a, 0xf0,
+++	0x19, 0xd8, 0x94, 0x57, 0xb8, 0x8a, 0xb3, 0x16,
+++	0x3b, 0xd0, 0x84, 0x8e, 0x67, 0xa6, 0xa3, 0x7d,
+++	0x78, 0xec, 0x00
+++};
+++static const u8 enc_output012[] __initconst = {
+++	0x52, 0x34, 0xb3, 0x65, 0x3b, 0xb7, 0xe5, 0xd3,
+++	0xab, 0x49, 0x17, 0x60, 0xd2, 0x52, 0x56, 0xdf,
+++	0xdf, 0x34, 0x56, 0x82, 0xe2, 0xbe, 0xe5, 0xe1,
+++	0x28, 0xd1, 0x4e, 0x5f, 0x4f, 0x01, 0x7d, 0x3f,
+++	0x99, 0x6b, 0x30, 0x6e, 0x1a, 0x7c, 0x4c, 0x8e,
+++	0x62, 0x81, 0xae, 0x86, 0x3f, 0x6b, 0xd0, 0xb5,
+++	0xa9, 0xcf, 0x50, 0xf1, 0x02, 0x12, 0xa0, 0x0b,
+++	0x24, 0xe9, 0xe6, 0x72, 0x89, 0x2c, 0x52, 0x1b,
+++	0x34, 0x38, 0xf8, 0x75, 0x5f, 0xa0, 0x74, 0xe2,
+++	0x99, 0xdd, 0xa6, 0x4b, 0x14, 0x50, 0x4e, 0xf1,
+++	0xbe, 0xd6, 0x9e, 0xdb, 0xb2, 0x24, 0x27, 0x74,
+++	0x12, 0x4a, 0x78, 0x78, 0x17, 0xa5, 0x58, 0x8e,
+++	0x2f, 0xf9, 0xf4, 0x8d, 0xee, 0x03, 0x88, 0xae,
+++	0xb8, 0x29, 0xa1, 0x2f, 0x4b, 0xee, 0x92, 0xbd,
+++	0x87, 0xb3, 0xce, 0x34, 0x21, 0x57, 0x46, 0x04,
+++	0x49, 0x0c, 0x80, 0xf2, 0x01, 0x13, 0xa1, 0x55,
+++	0xb3, 0xff, 0x44, 0x30, 0x3c, 0x1c, 0xd0, 0xef,
+++	0xbc, 0x18, 0x74, 0x26, 0xad, 0x41, 0x5b, 0x5b,
+++	0x3e, 0x9a, 0x7a, 0x46, 0x4f, 0x16, 0xd6, 0x74,
+++	0x5a, 0xb7, 0x3a, 0x28, 0x31, 0xd8, 0xae, 0x26,
+++	0xac, 0x50, 0x53, 0x86, 0xf2, 0x56, 0xd7, 0x3f,
+++	0x29, 0xbc, 0x45, 0x68, 0x8e, 0xcb, 0x98, 0x64,
+++	0xdd, 0xc9, 0xba, 0xb8, 0x4b, 0x7b, 0x82, 0xdd,
+++	0x14, 0xa7, 0xcb, 0x71, 0x72, 0x00, 0x5c, 0xad,
+++	0x7b, 0x6a, 0x89, 0xa4, 0x3d, 0xbf, 0xb5, 0x4b,
+++	0x3e, 0x7c, 0x5a, 0xcf, 0xb8, 0xa1, 0xc5, 0x6e,
+++	0xc8, 0xb6, 0x31, 0x57, 0x7b, 0xdf, 0xa5, 0x7e,
+++	0xb1, 0xd6, 0x42, 0x2a, 0x31, 0x36, 0xd1, 0xd0,
+++	0x3f, 0x7a, 0xe5, 0x94, 0xd6, 0x36, 0xa0, 0x6f,
+++	0xb7, 0x40, 0x7d, 0x37, 0xc6, 0x55, 0x7c, 0x50,
+++	0x40, 0x6d, 0x29, 0x89, 0xe3, 0x5a, 0xae, 0x97,
+++	0xe7, 0x44, 0x49, 0x6e, 0xbd, 0x81, 0x3d, 0x03,
+++	0x93, 0x06, 0x12, 0x06, 0xe2, 0x41, 0x12, 0x4a,
+++	0xf1, 0x6a, 0xa4, 0x58, 0xa2, 0xfb, 0xd2, 0x15,
+++	0xba, 0xc9, 0x79, 0xc9, 0xce, 0x5e, 0x13, 0xbb,
+++	0xf1, 0x09, 0x04, 0xcc, 0xfd, 0xe8, 0x51, 0x34,
+++	0x6a, 0xe8, 0x61, 0x88, 0xda, 0xed, 0x01, 0x47,
+++	0x84, 0xf5, 0x73, 0x25, 0xf9, 0x1c, 0x42, 0x86,
+++	0x07, 0xf3, 0x5b, 0x1a, 0x01, 0xb3, 0xeb, 0x24,
+++	0x32, 0x8d, 0xf6, 0xed, 0x7c, 0x4b, 0xeb, 0x3c,
+++	0x36, 0x42, 0x28, 0xdf, 0xdf, 0xb6, 0xbe, 0xd9,
+++	0x8c, 0x52, 0xd3, 0x2b, 0x08, 0x90, 0x8c, 0xe7,
+++	0x98, 0x31, 0xe2, 0x32, 0x8e, 0xfc, 0x11, 0x48,
+++	0x00, 0xa8, 0x6a, 0x42, 0x4a, 0x02, 0xc6, 0x4b,
+++	0x09, 0xf1, 0xe3, 0x49, 0xf3, 0x45, 0x1f, 0x0e,
+++	0xbc, 0x56, 0xe2, 0xe4, 0xdf, 0xfb, 0xeb, 0x61,
+++	0xfa, 0x24, 0xc1, 0x63, 0x75, 0xbb, 0x47, 0x75,
+++	0xaf, 0xe1, 0x53, 0x16, 0x96, 0x21, 0x85, 0x26,
+++	0x11, 0xb3, 0x76, 0xe3, 0x23, 0xa1, 0x6b, 0x74,
+++	0x37, 0xd0, 0xde, 0x06, 0x90, 0x71, 0x5d, 0x43,
+++	0x88, 0x9b, 0x00, 0x54, 0xa6, 0x75, 0x2f, 0xa1,
+++	0xc2, 0x0b, 0x73, 0x20, 0x1d, 0xb6, 0x21, 0x79,
+++	0x57, 0x3f, 0xfa, 0x09, 0xbe, 0x8a, 0x33, 0xc3,
+++	0x52, 0xf0, 0x1d, 0x82, 0x31, 0xd1, 0x55, 0xb5,
+++	0x6c, 0x99, 0x25, 0xcf, 0x5c, 0x32, 0xce, 0xe9,
+++	0x0d, 0xfa, 0x69, 0x2c, 0xd5, 0x0d, 0xc5, 0x6d,
+++	0x86, 0xd0, 0x0c, 0x3b, 0x06, 0x50, 0x79, 0xe8,
+++	0xc3, 0xae, 0x04, 0xe6, 0xcd, 0x51, 0xe4, 0x26,
+++	0x9b, 0x4f, 0x7e, 0xa6, 0x0f, 0xab, 0xd8, 0xe5,
+++	0xde, 0xa9, 0x00, 0x95, 0xbe, 0xa3, 0x9d, 0x5d,
+++	0xb2, 0x09, 0x70, 0x18, 0x1c, 0xf0, 0xac, 0x29,
+++	0x23, 0x02, 0x29, 0x28, 0xd2, 0x74, 0x35, 0x57,
+++	0x62, 0x0f, 0x24, 0xea, 0x5e, 0x33, 0xc2, 0x92,
+++	0xf3, 0x78, 0x4d, 0x30, 0x1e, 0xa1, 0x99, 0xa9,
+++	0x82, 0xb0, 0x42, 0x31, 0x8d, 0xad, 0x8a, 0xbc,
+++	0xfc, 0xd4, 0x57, 0x47, 0x3e, 0xb4, 0x50, 0xdd,
+++	0x6e, 0x2c, 0x80, 0x4d, 0x22, 0xf1, 0xfb, 0x57,
+++	0xc4, 0xdd, 0x17, 0xe1, 0x8a, 0x36, 0x4a, 0xb3,
+++	0x37, 0xca, 0xc9, 0x4e, 0xab, 0xd5, 0x69, 0xc4,
+++	0xf4, 0xbc, 0x0b, 0x3b, 0x44, 0x4b, 0x29, 0x9c,
+++	0xee, 0xd4, 0x35, 0x22, 0x21, 0xb0, 0x1f, 0x27,
+++	0x64, 0xa8, 0x51, 0x1b, 0xf0, 0x9f, 0x19, 0x5c,
+++	0xfb, 0x5a, 0x64, 0x74, 0x70, 0x45, 0x09, 0xf5,
+++	0x64, 0xfe, 0x1a, 0x2d, 0xc9, 0x14, 0x04, 0x14,
+++	0xcf, 0xd5, 0x7d, 0x60, 0xaf, 0x94, 0x39, 0x94,
+++	0xe2, 0x7d, 0x79, 0x82, 0xd0, 0x65, 0x3b, 0x6b,
+++	0x9c, 0x19, 0x84, 0xb4, 0x6d, 0xb3, 0x0c, 0x99,
+++	0xc0, 0x56, 0xa8, 0xbd, 0x73, 0xce, 0x05, 0x84,
+++	0x3e, 0x30, 0xaa, 0xc4, 0x9b, 0x1b, 0x04, 0x2a,
+++	0x9f, 0xd7, 0x43, 0x2b, 0x23, 0xdf, 0xbf, 0xaa,
+++	0xd5, 0xc2, 0x43, 0x2d, 0x70, 0xab, 0xdc, 0x75,
+++	0xad, 0xac, 0xf7, 0xc0, 0xbe, 0x67, 0xb2, 0x74,
+++	0xed, 0x67, 0x10, 0x4a, 0x92, 0x60, 0xc1, 0x40,
+++	0x50, 0x19, 0x8a, 0x8a, 0x8c, 0x09, 0x0e, 0x72,
+++	0xe1, 0x73, 0x5e, 0xe8, 0x41, 0x85, 0x63, 0x9f,
+++	0x3f, 0xd7, 0x7d, 0xc4, 0xfb, 0x22, 0x5d, 0x92,
+++	0x6c, 0xb3, 0x1e, 0xe2, 0x50, 0x2f, 0x82, 0xa8,
+++	0x28, 0xc0, 0xb5, 0xd7, 0x5f, 0x68, 0x0d, 0x2c,
+++	0x2d, 0xaf, 0x7e, 0xfa, 0x2e, 0x08, 0x0f, 0x1f,
+++	0x70, 0x9f, 0xe9, 0x19, 0x72, 0x55, 0xf8, 0xfb,
+++	0x51, 0xd2, 0x33, 0x5d, 0xa0, 0xd3, 0x2b, 0x0a,
+++	0x6c, 0xbc, 0x4e, 0xcf, 0x36, 0x4d, 0xdc, 0x3b,
+++	0xe9, 0x3e, 0x81, 0x7c, 0x61, 0xdb, 0x20, 0x2d,
+++	0x3a, 0xc3, 0xb3, 0x0c, 0x1e, 0x00, 0xb9, 0x7c,
+++	0xf5, 0xca, 0x10, 0x5f, 0x3a, 0x71, 0xb3, 0xe4,
+++	0x20, 0xdb, 0x0c, 0x2a, 0x98, 0x63, 0x45, 0x00,
+++	0x58, 0xf6, 0x68, 0xe4, 0x0b, 0xda, 0x13, 0x3b,
+++	0x60, 0x5c, 0x76, 0xdb, 0xb9, 0x97, 0x71, 0xe4,
+++	0xd9, 0xb7, 0xdb, 0xbd, 0x68, 0xc7, 0x84, 0x84,
+++	0xaa, 0x7c, 0x68, 0x62, 0x5e, 0x16, 0xfc, 0xba,
+++	0x72, 0xaa, 0x9a, 0xa9, 0xeb, 0x7c, 0x75, 0x47,
+++	0x97, 0x7e, 0xad, 0xe2, 0xd9, 0x91, 0xe8, 0xe4,
+++	0xa5, 0x31, 0xd7, 0x01, 0x8e, 0xa2, 0x11, 0x88,
+++	0x95, 0xb9, 0xf2, 0x9b, 0xd3, 0x7f, 0x1b, 0x81,
+++	0x22, 0xf7, 0x98, 0x60, 0x0a, 0x64, 0xa6, 0xc1,
+++	0xf6, 0x49, 0xc7, 0xe3, 0x07, 0x4d, 0x94, 0x7a,
+++	0xcf, 0x6e, 0x68, 0x0c, 0x1b, 0x3f, 0x6e, 0x2e,
+++	0xee, 0x92, 0xfa, 0x52, 0xb3, 0x59, 0xf8, 0xf1,
+++	0x8f, 0x6a, 0x66, 0xa3, 0x82, 0x76, 0x4a, 0x07,
+++	0x1a, 0xc7, 0xdd, 0xf5, 0xda, 0x9c, 0x3c, 0x24,
+++	0xbf, 0xfd, 0x42, 0xa1, 0x10, 0x64, 0x6a, 0x0f,
+++	0x89, 0xee, 0x36, 0xa5, 0xce, 0x99, 0x48, 0x6a,
+++	0xf0, 0x9f, 0x9e, 0x69, 0xa4, 0x40, 0x20, 0xe9,
+++	0x16, 0x15, 0xf7, 0xdb, 0x75, 0x02, 0xcb, 0xe9,
+++	0x73, 0x8b, 0x3b, 0x49, 0x2f, 0xf0, 0xaf, 0x51,
+++	0x06, 0x5c, 0xdf, 0x27, 0x27, 0x49, 0x6a, 0xd1,
+++	0xcc, 0xc7, 0xb5, 0x63, 0xb5, 0xfc, 0xb8, 0x5c,
+++	0x87, 0x7f, 0x84, 0xb4, 0xcc, 0x14, 0xa9, 0x53,
+++	0xda, 0xa4, 0x56, 0xf8, 0xb6, 0x1b, 0xcc, 0x40,
+++	0x27, 0x52, 0x06, 0x5a, 0x13, 0x81, 0xd7, 0x3a,
+++	0xd4, 0x3b, 0xfb, 0x49, 0x65, 0x31, 0x33, 0xb2,
+++	0xfa, 0xcd, 0xad, 0x58, 0x4e, 0x2b, 0xae, 0xd2,
+++	0x20, 0xfb, 0x1a, 0x48, 0xb4, 0x3f, 0x9a, 0xd8,
+++	0x7a, 0x35, 0x4a, 0xc8, 0xee, 0x88, 0x5e, 0x07,
+++	0x66, 0x54, 0xb9, 0xec, 0x9f, 0xa3, 0xe3, 0xb9,
+++	0x37, 0xaa, 0x49, 0x76, 0x31, 0xda, 0x74, 0x2d,
+++	0x3c, 0xa4, 0x65, 0x10, 0x32, 0x38, 0xf0, 0xde,
+++	0xd3, 0x99, 0x17, 0xaa, 0x71, 0xaa, 0x8f, 0x0f,
+++	0x8c, 0xaf, 0xa2, 0xf8, 0x5d, 0x64, 0xba, 0x1d,
+++	0xa3, 0xef, 0x96, 0x73, 0xe8, 0xa1, 0x02, 0x8d,
+++	0x0c, 0x6d, 0xb8, 0x06, 0x90, 0xb8, 0x08, 0x56,
+++	0x2c, 0xa7, 0x06, 0xc9, 0xc2, 0x38, 0xdb, 0x7c,
+++	0x63, 0xb1, 0x57, 0x8e, 0xea, 0x7c, 0x79, 0xf3,
+++	0x49, 0x1d, 0xfe, 0x9f, 0xf3, 0x6e, 0xb1, 0x1d,
+++	0xba, 0x19, 0x80, 0x1a, 0x0a, 0xd3, 0xb0, 0x26,
+++	0x21, 0x40, 0xb1, 0x7c, 0xf9, 0x4d, 0x8d, 0x10,
+++	0xc1, 0x7e, 0xf4, 0xf6, 0x3c, 0xa8, 0xfd, 0x7c,
+++	0xa3, 0x92, 0xb2, 0x0f, 0xaa, 0xcc, 0xa6, 0x11,
+++	0xfe, 0x04, 0xe3, 0xd1, 0x7a, 0x32, 0x89, 0xdf,
+++	0x0d, 0xc4, 0x8f, 0x79, 0x6b, 0xca, 0x16, 0x7c,
+++	0x6e, 0xf9, 0xad, 0x0f, 0xf6, 0xfe, 0x27, 0xdb,
+++	0xc4, 0x13, 0x70, 0xf1, 0x62, 0x1a, 0x4f, 0x79,
+++	0x40, 0xc9, 0x9b, 0x8b, 0x21, 0xea, 0x84, 0xfa,
+++	0xf5, 0xf1, 0x89, 0xce, 0xb7, 0x55, 0x0a, 0x80,
+++	0x39, 0x2f, 0x55, 0x36, 0x16, 0x9c, 0x7b, 0x08,
+++	0xbd, 0x87, 0x0d, 0xa5, 0x32, 0xf1, 0x52, 0x7c,
+++	0xe8, 0x55, 0x60, 0x5b, 0xd7, 0x69, 0xe4, 0xfc,
+++	0xfa, 0x12, 0x85, 0x96, 0xea, 0x50, 0x28, 0xab,
+++	0x8a, 0xf7, 0xbb, 0x0e, 0x53, 0x74, 0xca, 0xa6,
+++	0x27, 0x09, 0xc2, 0xb5, 0xde, 0x18, 0x14, 0xd9,
+++	0xea, 0xe5, 0x29, 0x1c, 0x40, 0x56, 0xcf, 0xd7,
+++	0xae, 0x05, 0x3f, 0x65, 0xaf, 0x05, 0x73, 0xe2,
+++	0x35, 0x96, 0x27, 0x07, 0x14, 0xc0, 0xad, 0x33,
+++	0xf1, 0xdc, 0x44, 0x7a, 0x89, 0x17, 0x77, 0xd2,
+++	0x9c, 0x58, 0x60, 0xf0, 0x3f, 0x7b, 0x2d, 0x2e,
+++	0x57, 0x95, 0x54, 0x87, 0xed, 0xf2, 0xc7, 0x4c,
+++	0xf0, 0xae, 0x56, 0x29, 0x19, 0x7d, 0x66, 0x4b,
+++	0x9b, 0x83, 0x84, 0x42, 0x3b, 0x01, 0x25, 0x66,
+++	0x8e, 0x02, 0xde, 0xb9, 0x83, 0x54, 0x19, 0xf6,
+++	0x9f, 0x79, 0x0d, 0x67, 0xc5, 0x1d, 0x7a, 0x44,
+++	0x02, 0x98, 0xa7, 0x16, 0x1c, 0x29, 0x0d, 0x74,
+++	0xff, 0x85, 0x40, 0x06, 0xef, 0x2c, 0xa9, 0xc6,
+++	0xf5, 0x53, 0x07, 0x06, 0xae, 0xe4, 0xfa, 0x5f,
+++	0xd8, 0x39, 0x4d, 0xf1, 0x9b, 0x6b, 0xd9, 0x24,
+++	0x84, 0xfe, 0x03, 0x4c, 0xb2, 0x3f, 0xdf, 0xa1,
+++	0x05, 0x9e, 0x50, 0x14, 0x5a, 0xd9, 0x1a, 0xa2,
+++	0xa7, 0xfa, 0xfa, 0x17, 0xf7, 0x78, 0xd6, 0xb5,
+++	0x92, 0x61, 0x91, 0xac, 0x36, 0xfa, 0x56, 0x0d,
+++	0x38, 0x32, 0x18, 0x85, 0x08, 0x58, 0x37, 0xf0,
+++	0x4b, 0xdb, 0x59, 0xe7, 0xa4, 0x34, 0xc0, 0x1b,
+++	0x01, 0xaf, 0x2d, 0xde, 0xa1, 0xaa, 0x5d, 0xd3,
+++	0xec, 0xe1, 0xd4, 0xf7, 0xe6, 0x54, 0x68, 0xf0,
+++	0x51, 0x97, 0xa7, 0x89, 0xea, 0x24, 0xad, 0xd3,
+++	0x6e, 0x47, 0x93, 0x8b, 0x4b, 0xb4, 0xf7, 0x1c,
+++	0x42, 0x06, 0x67, 0xe8, 0x99, 0xf6, 0xf5, 0x7b,
+++	0x85, 0xb5, 0x65, 0xb5, 0xb5, 0xd2, 0x37, 0xf5,
+++	0xf3, 0x02, 0xa6, 0x4d, 0x11, 0xa7, 0xdc, 0x51,
+++	0x09, 0x7f, 0xa0, 0xd8, 0x88, 0x1c, 0x13, 0x71,
+++	0xae, 0x9c, 0xb7, 0x7b, 0x34, 0xd6, 0x4e, 0x68,
+++	0x26, 0x83, 0x51, 0xaf, 0x1d, 0xee, 0x8b, 0xbb,
+++	0x69, 0x43, 0x2b, 0x9e, 0x8a, 0xbc, 0x02, 0x0e,
+++	0xa0, 0x1b, 0xe0, 0xa8, 0x5f, 0x6f, 0xaf, 0x1b,
+++	0x8f, 0xe7, 0x64, 0x71, 0x74, 0x11, 0x7e, 0xa8,
+++	0xd8, 0xf9, 0x97, 0x06, 0xc3, 0xb6, 0xfb, 0xfb,
+++	0xb7, 0x3d, 0x35, 0x9d, 0x3b, 0x52, 0xed, 0x54,
+++	0xca, 0xf4, 0x81, 0x01, 0x2d, 0x1b, 0xc3, 0xa7,
+++	0x00, 0x3d, 0x1a, 0x39, 0x54, 0xe1, 0xf6, 0xff,
+++	0xed, 0x6f, 0x0b, 0x5a, 0x68, 0xda, 0x58, 0xdd,
+++	0xa9, 0xcf, 0x5c, 0x4a, 0xe5, 0x09, 0x4e, 0xde,
+++	0x9d, 0xbc, 0x3e, 0xee, 0x5a, 0x00, 0x3b, 0x2c,
+++	0x87, 0x10, 0x65, 0x60, 0xdd, 0xd7, 0x56, 0xd1,
+++	0x4c, 0x64, 0x45, 0xe4, 0x21, 0xec, 0x78, 0xf8,
+++	0x25, 0x7a, 0x3e, 0x16, 0x5d, 0x09, 0x53, 0x14,
+++	0xbe, 0x4f, 0xae, 0x87, 0xd8, 0xd1, 0xaa, 0x3c,
+++	0xf6, 0x3e, 0xa4, 0x70, 0x8c, 0x5e, 0x70, 0xa4,
+++	0xb3, 0x6b, 0x66, 0x73, 0xd3, 0xbf, 0x31, 0x06,
+++	0x19, 0x62, 0x93, 0x15, 0xf2, 0x86, 0xe4, 0x52,
+++	0x7e, 0x53, 0x4c, 0x12, 0x38, 0xcc, 0x34, 0x7d,
+++	0x57, 0xf6, 0x42, 0x93, 0x8a, 0xc4, 0xee, 0x5c,
+++	0x8a, 0xe1, 0x52, 0x8f, 0x56, 0x64, 0xf6, 0xa6,
+++	0xd1, 0x91, 0x57, 0x70, 0xcd, 0x11, 0x76, 0xf5,
+++	0x59, 0x60, 0x60, 0x3c, 0xc1, 0xc3, 0x0b, 0x7f,
+++	0x58, 0x1a, 0x50, 0x91, 0xf1, 0x68, 0x8f, 0x6e,
+++	0x74, 0x74, 0xa8, 0x51, 0x0b, 0xf7, 0x7a, 0x98,
+++	0x37, 0xf2, 0x0a, 0x0e, 0xa4, 0x97, 0x04, 0xb8,
+++	0x9b, 0xfd, 0xa0, 0xea, 0xf7, 0x0d, 0xe1, 0xdb,
+++	0x03, 0xf0, 0x31, 0x29, 0xf8, 0xdd, 0x6b, 0x8b,
+++	0x5d, 0xd8, 0x59, 0xa9, 0x29, 0xcf, 0x9a, 0x79,
+++	0x89, 0x19, 0x63, 0x46, 0x09, 0x79, 0x6a, 0x11,
+++	0xda, 0x63, 0x68, 0x48, 0x77, 0x23, 0xfb, 0x7d,
+++	0x3a, 0x43, 0xcb, 0x02, 0x3b, 0x7a, 0x6d, 0x10,
+++	0x2a, 0x9e, 0xac, 0xf1, 0xd4, 0x19, 0xf8, 0x23,
+++	0x64, 0x1d, 0x2c, 0x5f, 0xf2, 0xb0, 0x5c, 0x23,
+++	0x27, 0xf7, 0x27, 0x30, 0x16, 0x37, 0xb1, 0x90,
+++	0xab, 0x38, 0xfb, 0x55, 0xcd, 0x78, 0x58, 0xd4,
+++	0x7d, 0x43, 0xf6, 0x45, 0x5e, 0x55, 0x8d, 0xb1,
+++	0x02, 0x65, 0x58, 0xb4, 0x13, 0x4b, 0x36, 0xf7,
+++	0xcc, 0xfe, 0x3d, 0x0b, 0x82, 0xe2, 0x12, 0x11,
+++	0xbb, 0xe6, 0xb8, 0x3a, 0x48, 0x71, 0xc7, 0x50,
+++	0x06, 0x16, 0x3a, 0xe6, 0x7c, 0x05, 0xc7, 0xc8,
+++	0x4d, 0x2f, 0x08, 0x6a, 0x17, 0x9a, 0x95, 0x97,
+++	0x50, 0x68, 0xdc, 0x28, 0x18, 0xc4, 0x61, 0x38,
+++	0xb9, 0xe0, 0x3e, 0x78, 0xdb, 0x29, 0xe0, 0x9f,
+++	0x52, 0xdd, 0xf8, 0x4f, 0x91, 0xc1, 0xd0, 0x33,
+++	0xa1, 0x7a, 0x8e, 0x30, 0x13, 0x82, 0x07, 0x9f,
+++	0xd3, 0x31, 0x0f, 0x23, 0xbe, 0x32, 0x5a, 0x75,
+++	0xcf, 0x96, 0xb2, 0xec, 0xb5, 0x32, 0xac, 0x21,
+++	0xd1, 0x82, 0x33, 0xd3, 0x15, 0x74, 0xbd, 0x90,
+++	0xf1, 0x2c, 0xe6, 0x5f, 0x8d, 0xe3, 0x02, 0xe8,
+++	0xe9, 0xc4, 0xca, 0x96, 0xeb, 0x0e, 0xbc, 0x91,
+++	0xf4, 0xb9, 0xea, 0xd9, 0x1b, 0x75, 0xbd, 0xe1,
+++	0xac, 0x2a, 0x05, 0x37, 0x52, 0x9b, 0x1b, 0x3f,
+++	0x5a, 0xdc, 0x21, 0xc3, 0x98, 0xbb, 0xaf, 0xa3,
+++	0xf2, 0x00, 0xbf, 0x0d, 0x30, 0x89, 0x05, 0xcc,
+++	0xa5, 0x76, 0xf5, 0x06, 0xf0, 0xc6, 0x54, 0x8a,
+++	0x5d, 0xd4, 0x1e, 0xc1, 0xf2, 0xce, 0xb0, 0x62,
+++	0xc8, 0xfc, 0x59, 0x42, 0x9a, 0x90, 0x60, 0x55,
+++	0xfe, 0x88, 0xa5, 0x8b, 0xb8, 0x33, 0x0c, 0x23,
+++	0x24, 0x0d, 0x15, 0x70, 0x37, 0x1e, 0x3d, 0xf6,
+++	0xd2, 0xea, 0x92, 0x10, 0xb2, 0xc4, 0x51, 0xac,
+++	0xf2, 0xac, 0xf3, 0x6b, 0x6c, 0xaa, 0xcf, 0x12,
+++	0xc5, 0x6c, 0x90, 0x50, 0xb5, 0x0c, 0xfc, 0x1a,
+++	0x15, 0x52, 0xe9, 0x26, 0xc6, 0x52, 0xa4, 0xe7,
+++	0x81, 0x69, 0xe1, 0xe7, 0x9e, 0x30, 0x01, 0xec,
+++	0x84, 0x89, 0xb2, 0x0d, 0x66, 0xdd, 0xce, 0x28,
+++	0x5c, 0xec, 0x98, 0x46, 0x68, 0x21, 0x9f, 0x88,
+++	0x3f, 0x1f, 0x42, 0x77, 0xce, 0xd0, 0x61, 0xd4,
+++	0x20, 0xa7, 0xff, 0x53, 0xad, 0x37, 0xd0, 0x17,
+++	0x35, 0xc9, 0xfc, 0xba, 0x0a, 0x78, 0x3f, 0xf2,
+++	0xcc, 0x86, 0x89, 0xe8, 0x4b, 0x3c, 0x48, 0x33,
+++	0x09, 0x7f, 0xc6, 0xc0, 0xdd, 0xb8, 0xfd, 0x7a,
+++	0x66, 0x66, 0x65, 0xeb, 0x47, 0xa7, 0x04, 0x28,
+++	0xa3, 0x19, 0x8e, 0xa9, 0xb1, 0x13, 0x67, 0x62,
+++	0x70, 0xcf, 0xd6
+++};
+++static const u8 enc_assoc012[] __initconst = {
+++	0xb1, 0x69, 0x83, 0x87, 0x30, 0xaa, 0x5d, 0xb8,
+++	0x77, 0xe8, 0x21, 0xff, 0x06, 0x59, 0x35, 0xce,
+++	0x75, 0xfe, 0x38, 0xef, 0xb8, 0x91, 0x43, 0x8c,
+++	0xcf, 0x70, 0xdd, 0x0a, 0x68, 0xbf, 0xd4, 0xbc,
+++	0x16, 0x76, 0x99, 0x36, 0x1e, 0x58, 0x79, 0x5e,
+++	0xd4, 0x29, 0xf7, 0x33, 0x93, 0x48, 0xdb, 0x5f,
+++	0x01, 0xae, 0x9c, 0xb6, 0xe4, 0x88, 0x6d, 0x2b,
+++	0x76, 0x75, 0xe0, 0xf3, 0x74, 0xe2, 0xc9
+++};
+++static const u8 enc_nonce012[] __initconst = {
+++	0x05, 0xa3, 0x93, 0xed, 0x30, 0xc5, 0xa2, 0x06
+++};
+++static const u8 enc_key012[] __initconst = {
+++	0xb3, 0x35, 0x50, 0x03, 0x54, 0x2e, 0x40, 0x5e,
+++	0x8f, 0x59, 0x8e, 0xc5, 0x90, 0xd5, 0x27, 0x2d,
+++	0xba, 0x29, 0x2e, 0xcb, 0x1b, 0x70, 0x44, 0x1e,
+++	0x65, 0x91, 0x6e, 0x2a, 0x79, 0x22, 0xda, 0x64
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input053[] __initconst = {
+++	0x25, 0x6d, 0x40, 0x88, 0x80, 0x94, 0x17, 0x83,
+++	0x55, 0xd3, 0x04, 0x84, 0x64, 0x43, 0xfe, 0xe8,
+++	0xdf, 0x99, 0x47, 0x03, 0x03, 0xfb, 0x3b, 0x7b,
+++	0x80, 0xe0, 0x30, 0xbe, 0xeb, 0xd3, 0x29, 0xbe
+++};
+++static const u8 enc_output053[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0xe6, 0xd3, 0xd7, 0x32, 0x4a, 0x1c, 0xbb, 0xa7,
+++	0x77, 0xbb, 0xb0, 0xec, 0xdd, 0xa3, 0x78, 0x07
+++};
+++static const u8 enc_assoc053[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+++};
+++static const u8 enc_nonce053[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key053[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input054[] __initconst = {
+++	0x25, 0x6d, 0x40, 0x88, 0x80, 0x94, 0x17, 0x83,
+++	0x55, 0xd3, 0x04, 0x84, 0x64, 0x43, 0xfe, 0xe8,
+++	0xdf, 0x99, 0x47, 0x03, 0x03, 0xfb, 0x3b, 0x7b,
+++	0x80, 0xe0, 0x30, 0xbe, 0xeb, 0xd3, 0x29, 0xbe,
+++	0xe3, 0xbc, 0xdb, 0x5b, 0x1e, 0xde, 0xfc, 0xfe,
+++	0x8b, 0xcd, 0xa1, 0xb6, 0xa1, 0x5c, 0x8c, 0x2b,
+++	0x08, 0x69, 0xff, 0xd2, 0xec, 0x5e, 0x26, 0xe5,
+++	0x53, 0xb7, 0xb2, 0x27, 0xfe, 0x87, 0xfd, 0xbd
+++};
+++static const u8 enc_output054[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x06, 0x2d, 0xe6, 0x79, 0x5f, 0x27, 0x4f, 0xd2,
+++	0xa3, 0x05, 0xd7, 0x69, 0x80, 0xbc, 0x9c, 0xce
+++};
+++static const u8 enc_assoc054[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+++};
+++static const u8 enc_nonce054[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key054[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input055[] __initconst = {
+++	0x25, 0x6d, 0x40, 0x88, 0x80, 0x94, 0x17, 0x83,
+++	0x55, 0xd3, 0x04, 0x84, 0x64, 0x43, 0xfe, 0xe8,
+++	0xdf, 0x99, 0x47, 0x03, 0x03, 0xfb, 0x3b, 0x7b,
+++	0x80, 0xe0, 0x30, 0xbe, 0xeb, 0xd3, 0x29, 0xbe,
+++	0xe3, 0xbc, 0xdb, 0x5b, 0x1e, 0xde, 0xfc, 0xfe,
+++	0x8b, 0xcd, 0xa1, 0xb6, 0xa1, 0x5c, 0x8c, 0x2b,
+++	0x08, 0x69, 0xff, 0xd2, 0xec, 0x5e, 0x26, 0xe5,
+++	0x53, 0xb7, 0xb2, 0x27, 0xfe, 0x87, 0xfd, 0xbd,
+++	0x7a, 0xda, 0x44, 0x42, 0x42, 0x69, 0xbf, 0xfa,
+++	0x55, 0x27, 0xf2, 0x70, 0xac, 0xf6, 0x85, 0x02,
+++	0xb7, 0x4c, 0x5a, 0xe2, 0xe6, 0x0c, 0x05, 0x80,
+++	0x98, 0x1a, 0x49, 0x38, 0x45, 0x93, 0x92, 0xc4,
+++	0x9b, 0xb2, 0xf2, 0x84, 0xb6, 0x46, 0xef, 0xc7,
+++	0xf3, 0xf0, 0xb1, 0x36, 0x1d, 0xc3, 0x48, 0xed,
+++	0x77, 0xd3, 0x0b, 0xc5, 0x76, 0x92, 0xed, 0x38,
+++	0xfb, 0xac, 0x01, 0x88, 0x38, 0x04, 0x88, 0xc7
+++};
+++static const u8 enc_output055[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0xd8, 0xb4, 0x79, 0x02, 0xba, 0xae, 0xaf, 0xb3,
+++	0x42, 0x03, 0x05, 0x15, 0x29, 0xaf, 0x28, 0x2e
+++};
+++static const u8 enc_assoc055[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+++};
+++static const u8 enc_nonce055[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key055[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input056[] __initconst = {
+++	0xda, 0x92, 0xbf, 0x77, 0x7f, 0x6b, 0xe8, 0x7c,
+++	0xaa, 0x2c, 0xfb, 0x7b, 0x9b, 0xbc, 0x01, 0x17,
+++	0x20, 0x66, 0xb8, 0xfc, 0xfc, 0x04, 0xc4, 0x84,
+++	0x7f, 0x1f, 0xcf, 0x41, 0x14, 0x2c, 0xd6, 0x41
+++};
+++static const u8 enc_output056[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xb3, 0x89, 0x1c, 0x84, 0x9c, 0xb5, 0x2c, 0x27,
+++	0x74, 0x7e, 0xdf, 0xcf, 0x31, 0x21, 0x3b, 0xb6
+++};
+++static const u8 enc_assoc056[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce056[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key056[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input057[] __initconst = {
+++	0xda, 0x92, 0xbf, 0x77, 0x7f, 0x6b, 0xe8, 0x7c,
+++	0xaa, 0x2c, 0xfb, 0x7b, 0x9b, 0xbc, 0x01, 0x17,
+++	0x20, 0x66, 0xb8, 0xfc, 0xfc, 0x04, 0xc4, 0x84,
+++	0x7f, 0x1f, 0xcf, 0x41, 0x14, 0x2c, 0xd6, 0x41,
+++	0x1c, 0x43, 0x24, 0xa4, 0xe1, 0x21, 0x03, 0x01,
+++	0x74, 0x32, 0x5e, 0x49, 0x5e, 0xa3, 0x73, 0xd4,
+++	0xf7, 0x96, 0x00, 0x2d, 0x13, 0xa1, 0xd9, 0x1a,
+++	0xac, 0x48, 0x4d, 0xd8, 0x01, 0x78, 0x02, 0x42
+++};
+++static const u8 enc_output057[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xf0, 0xc1, 0x2d, 0x26, 0xef, 0x03, 0x02, 0x9b,
+++	0x62, 0xc0, 0x08, 0xda, 0x27, 0xc5, 0xdc, 0x68
+++};
+++static const u8 enc_assoc057[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce057[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key057[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input058[] __initconst = {
+++	0xda, 0x92, 0xbf, 0x77, 0x7f, 0x6b, 0xe8, 0x7c,
+++	0xaa, 0x2c, 0xfb, 0x7b, 0x9b, 0xbc, 0x01, 0x17,
+++	0x20, 0x66, 0xb8, 0xfc, 0xfc, 0x04, 0xc4, 0x84,
+++	0x7f, 0x1f, 0xcf, 0x41, 0x14, 0x2c, 0xd6, 0x41,
+++	0x1c, 0x43, 0x24, 0xa4, 0xe1, 0x21, 0x03, 0x01,
+++	0x74, 0x32, 0x5e, 0x49, 0x5e, 0xa3, 0x73, 0xd4,
+++	0xf7, 0x96, 0x00, 0x2d, 0x13, 0xa1, 0xd9, 0x1a,
+++	0xac, 0x48, 0x4d, 0xd8, 0x01, 0x78, 0x02, 0x42,
+++	0x85, 0x25, 0xbb, 0xbd, 0xbd, 0x96, 0x40, 0x05,
+++	0xaa, 0xd8, 0x0d, 0x8f, 0x53, 0x09, 0x7a, 0xfd,
+++	0x48, 0xb3, 0xa5, 0x1d, 0x19, 0xf3, 0xfa, 0x7f,
+++	0x67, 0xe5, 0xb6, 0xc7, 0xba, 0x6c, 0x6d, 0x3b,
+++	0x64, 0x4d, 0x0d, 0x7b, 0x49, 0xb9, 0x10, 0x38,
+++	0x0c, 0x0f, 0x4e, 0xc9, 0xe2, 0x3c, 0xb7, 0x12,
+++	0x88, 0x2c, 0xf4, 0x3a, 0x89, 0x6d, 0x12, 0xc7,
+++	0x04, 0x53, 0xfe, 0x77, 0xc7, 0xfb, 0x77, 0x38
+++};
+++static const u8 enc_output058[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xee, 0x65, 0x78, 0x30, 0x01, 0xc2, 0x56, 0x91,
+++	0xfa, 0x28, 0xd0, 0xf5, 0xf1, 0xc1, 0xd7, 0x62
+++};
+++static const u8 enc_assoc058[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce058[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key058[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input059[] __initconst = {
+++	0x25, 0x6d, 0x40, 0x08, 0x80, 0x94, 0x17, 0x03,
+++	0x55, 0xd3, 0x04, 0x04, 0x64, 0x43, 0xfe, 0x68,
+++	0xdf, 0x99, 0x47, 0x83, 0x03, 0xfb, 0x3b, 0xfb,
+++	0x80, 0xe0, 0x30, 0x3e, 0xeb, 0xd3, 0x29, 0x3e
+++};
+++static const u8 enc_output059[] __initconst = {
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x79, 0xba, 0x7a, 0x29, 0xf5, 0xa7, 0xbb, 0x75,
+++	0x79, 0x7a, 0xf8, 0x7a, 0x61, 0x01, 0x29, 0xa4
+++};
+++static const u8 enc_assoc059[] __initconst = {
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80
+++};
+++static const u8 enc_nonce059[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key059[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input060[] __initconst = {
+++	0x25, 0x6d, 0x40, 0x08, 0x80, 0x94, 0x17, 0x03,
+++	0x55, 0xd3, 0x04, 0x04, 0x64, 0x43, 0xfe, 0x68,
+++	0xdf, 0x99, 0x47, 0x83, 0x03, 0xfb, 0x3b, 0xfb,
+++	0x80, 0xe0, 0x30, 0x3e, 0xeb, 0xd3, 0x29, 0x3e,
+++	0xe3, 0xbc, 0xdb, 0xdb, 0x1e, 0xde, 0xfc, 0x7e,
+++	0x8b, 0xcd, 0xa1, 0x36, 0xa1, 0x5c, 0x8c, 0xab,
+++	0x08, 0x69, 0xff, 0x52, 0xec, 0x5e, 0x26, 0x65,
+++	0x53, 0xb7, 0xb2, 0xa7, 0xfe, 0x87, 0xfd, 0x3d
+++};
+++static const u8 enc_output060[] __initconst = {
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x36, 0xb1, 0x74, 0x38, 0x19, 0xe1, 0xb9, 0xba,
+++	0x15, 0x51, 0xe8, 0xed, 0x92, 0x2a, 0x95, 0x9a
+++};
+++static const u8 enc_assoc060[] __initconst = {
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80
+++};
+++static const u8 enc_nonce060[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key060[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input061[] __initconst = {
+++	0x25, 0x6d, 0x40, 0x08, 0x80, 0x94, 0x17, 0x03,
+++	0x55, 0xd3, 0x04, 0x04, 0x64, 0x43, 0xfe, 0x68,
+++	0xdf, 0x99, 0x47, 0x83, 0x03, 0xfb, 0x3b, 0xfb,
+++	0x80, 0xe0, 0x30, 0x3e, 0xeb, 0xd3, 0x29, 0x3e,
+++	0xe3, 0xbc, 0xdb, 0xdb, 0x1e, 0xde, 0xfc, 0x7e,
+++	0x8b, 0xcd, 0xa1, 0x36, 0xa1, 0x5c, 0x8c, 0xab,
+++	0x08, 0x69, 0xff, 0x52, 0xec, 0x5e, 0x26, 0x65,
+++	0x53, 0xb7, 0xb2, 0xa7, 0xfe, 0x87, 0xfd, 0x3d,
+++	0x7a, 0xda, 0x44, 0xc2, 0x42, 0x69, 0xbf, 0x7a,
+++	0x55, 0x27, 0xf2, 0xf0, 0xac, 0xf6, 0x85, 0x82,
+++	0xb7, 0x4c, 0x5a, 0x62, 0xe6, 0x0c, 0x05, 0x00,
+++	0x98, 0x1a, 0x49, 0xb8, 0x45, 0x93, 0x92, 0x44,
+++	0x9b, 0xb2, 0xf2, 0x04, 0xb6, 0x46, 0xef, 0x47,
+++	0xf3, 0xf0, 0xb1, 0xb6, 0x1d, 0xc3, 0x48, 0x6d,
+++	0x77, 0xd3, 0x0b, 0x45, 0x76, 0x92, 0xed, 0xb8,
+++	0xfb, 0xac, 0x01, 0x08, 0x38, 0x04, 0x88, 0x47
+++};
+++static const u8 enc_output061[] __initconst = {
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0xfe, 0xac, 0x49, 0x55, 0x55, 0x4e, 0x80, 0x6f,
+++	0x3a, 0x19, 0x02, 0xe2, 0x44, 0x32, 0xc0, 0x8a
+++};
+++static const u8 enc_assoc061[] __initconst = {
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80
+++};
+++static const u8 enc_nonce061[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key061[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input062[] __initconst = {
+++	0xda, 0x92, 0xbf, 0xf7, 0x7f, 0x6b, 0xe8, 0xfc,
+++	0xaa, 0x2c, 0xfb, 0xfb, 0x9b, 0xbc, 0x01, 0x97,
+++	0x20, 0x66, 0xb8, 0x7c, 0xfc, 0x04, 0xc4, 0x04,
+++	0x7f, 0x1f, 0xcf, 0xc1, 0x14, 0x2c, 0xd6, 0xc1
+++};
+++static const u8 enc_output062[] __initconst = {
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0x20, 0xa3, 0x79, 0x8d, 0xf1, 0x29, 0x2c, 0x59,
+++	0x72, 0xbf, 0x97, 0x41, 0xae, 0xc3, 0x8a, 0x19
+++};
+++static const u8 enc_assoc062[] __initconst = {
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f
+++};
+++static const u8 enc_nonce062[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key062[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input063[] __initconst = {
+++	0xda, 0x92, 0xbf, 0xf7, 0x7f, 0x6b, 0xe8, 0xfc,
+++	0xaa, 0x2c, 0xfb, 0xfb, 0x9b, 0xbc, 0x01, 0x97,
+++	0x20, 0x66, 0xb8, 0x7c, 0xfc, 0x04, 0xc4, 0x04,
+++	0x7f, 0x1f, 0xcf, 0xc1, 0x14, 0x2c, 0xd6, 0xc1,
+++	0x1c, 0x43, 0x24, 0x24, 0xe1, 0x21, 0x03, 0x81,
+++	0x74, 0x32, 0x5e, 0xc9, 0x5e, 0xa3, 0x73, 0x54,
+++	0xf7, 0x96, 0x00, 0xad, 0x13, 0xa1, 0xd9, 0x9a,
+++	0xac, 0x48, 0x4d, 0x58, 0x01, 0x78, 0x02, 0xc2
+++};
+++static const u8 enc_output063[] __initconst = {
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xc0, 0x3d, 0x9f, 0x67, 0x35, 0x4a, 0x97, 0xb2,
+++	0xf0, 0x74, 0xf7, 0x55, 0x15, 0x57, 0xe4, 0x9c
+++};
+++static const u8 enc_assoc063[] __initconst = {
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f
+++};
+++static const u8 enc_nonce063[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key063[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input064[] __initconst = {
+++	0xda, 0x92, 0xbf, 0xf7, 0x7f, 0x6b, 0xe8, 0xfc,
+++	0xaa, 0x2c, 0xfb, 0xfb, 0x9b, 0xbc, 0x01, 0x97,
+++	0x20, 0x66, 0xb8, 0x7c, 0xfc, 0x04, 0xc4, 0x04,
+++	0x7f, 0x1f, 0xcf, 0xc1, 0x14, 0x2c, 0xd6, 0xc1,
+++	0x1c, 0x43, 0x24, 0x24, 0xe1, 0x21, 0x03, 0x81,
+++	0x74, 0x32, 0x5e, 0xc9, 0x5e, 0xa3, 0x73, 0x54,
+++	0xf7, 0x96, 0x00, 0xad, 0x13, 0xa1, 0xd9, 0x9a,
+++	0xac, 0x48, 0x4d, 0x58, 0x01, 0x78, 0x02, 0xc2,
+++	0x85, 0x25, 0xbb, 0x3d, 0xbd, 0x96, 0x40, 0x85,
+++	0xaa, 0xd8, 0x0d, 0x0f, 0x53, 0x09, 0x7a, 0x7d,
+++	0x48, 0xb3, 0xa5, 0x9d, 0x19, 0xf3, 0xfa, 0xff,
+++	0x67, 0xe5, 0xb6, 0x47, 0xba, 0x6c, 0x6d, 0xbb,
+++	0x64, 0x4d, 0x0d, 0xfb, 0x49, 0xb9, 0x10, 0xb8,
+++	0x0c, 0x0f, 0x4e, 0x49, 0xe2, 0x3c, 0xb7, 0x92,
+++	0x88, 0x2c, 0xf4, 0xba, 0x89, 0x6d, 0x12, 0x47,
+++	0x04, 0x53, 0xfe, 0xf7, 0xc7, 0xfb, 0x77, 0xb8
+++};
+++static const u8 enc_output064[] __initconst = {
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xc8, 0x6d, 0xa8, 0xdd, 0x65, 0x22, 0x86, 0xd5,
+++	0x02, 0x13, 0xd3, 0x28, 0xd6, 0x3e, 0x40, 0x06
+++};
+++static const u8 enc_assoc064[] __initconst = {
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f
+++};
+++static const u8 enc_nonce064[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key064[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input065[] __initconst = {
+++	0x5a, 0x92, 0xbf, 0x77, 0xff, 0x6b, 0xe8, 0x7c,
+++	0x2a, 0x2c, 0xfb, 0x7b, 0x1b, 0xbc, 0x01, 0x17,
+++	0xa0, 0x66, 0xb8, 0xfc, 0x7c, 0x04, 0xc4, 0x84,
+++	0xff, 0x1f, 0xcf, 0x41, 0x94, 0x2c, 0xd6, 0x41
+++};
+++static const u8 enc_output065[] __initconst = {
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0xbe, 0xde, 0x90, 0x83, 0xce, 0xb3, 0x6d, 0xdf,
+++	0xe5, 0xfa, 0x81, 0x1f, 0x95, 0x47, 0x1c, 0x67
+++};
+++static const u8 enc_assoc065[] __initconst = {
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce065[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key065[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input066[] __initconst = {
+++	0x5a, 0x92, 0xbf, 0x77, 0xff, 0x6b, 0xe8, 0x7c,
+++	0x2a, 0x2c, 0xfb, 0x7b, 0x1b, 0xbc, 0x01, 0x17,
+++	0xa0, 0x66, 0xb8, 0xfc, 0x7c, 0x04, 0xc4, 0x84,
+++	0xff, 0x1f, 0xcf, 0x41, 0x94, 0x2c, 0xd6, 0x41,
+++	0x9c, 0x43, 0x24, 0xa4, 0x61, 0x21, 0x03, 0x01,
+++	0xf4, 0x32, 0x5e, 0x49, 0xde, 0xa3, 0x73, 0xd4,
+++	0x77, 0x96, 0x00, 0x2d, 0x93, 0xa1, 0xd9, 0x1a,
+++	0x2c, 0x48, 0x4d, 0xd8, 0x81, 0x78, 0x02, 0x42
+++};
+++static const u8 enc_output066[] __initconst = {
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x30, 0x08, 0x74, 0xbb, 0x06, 0x92, 0xb6, 0x89,
+++	0xde, 0xad, 0x9a, 0xe1, 0x5b, 0x06, 0x73, 0x90
+++};
+++static const u8 enc_assoc066[] __initconst = {
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce066[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key066[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input067[] __initconst = {
+++	0x5a, 0x92, 0xbf, 0x77, 0xff, 0x6b, 0xe8, 0x7c,
+++	0x2a, 0x2c, 0xfb, 0x7b, 0x1b, 0xbc, 0x01, 0x17,
+++	0xa0, 0x66, 0xb8, 0xfc, 0x7c, 0x04, 0xc4, 0x84,
+++	0xff, 0x1f, 0xcf, 0x41, 0x94, 0x2c, 0xd6, 0x41,
+++	0x9c, 0x43, 0x24, 0xa4, 0x61, 0x21, 0x03, 0x01,
+++	0xf4, 0x32, 0x5e, 0x49, 0xde, 0xa3, 0x73, 0xd4,
+++	0x77, 0x96, 0x00, 0x2d, 0x93, 0xa1, 0xd9, 0x1a,
+++	0x2c, 0x48, 0x4d, 0xd8, 0x81, 0x78, 0x02, 0x42,
+++	0x05, 0x25, 0xbb, 0xbd, 0x3d, 0x96, 0x40, 0x05,
+++	0x2a, 0xd8, 0x0d, 0x8f, 0xd3, 0x09, 0x7a, 0xfd,
+++	0xc8, 0xb3, 0xa5, 0x1d, 0x99, 0xf3, 0xfa, 0x7f,
+++	0xe7, 0xe5, 0xb6, 0xc7, 0x3a, 0x6c, 0x6d, 0x3b,
+++	0xe4, 0x4d, 0x0d, 0x7b, 0xc9, 0xb9, 0x10, 0x38,
+++	0x8c, 0x0f, 0x4e, 0xc9, 0x62, 0x3c, 0xb7, 0x12,
+++	0x08, 0x2c, 0xf4, 0x3a, 0x09, 0x6d, 0x12, 0xc7,
+++	0x84, 0x53, 0xfe, 0x77, 0x47, 0xfb, 0x77, 0x38
+++};
+++static const u8 enc_output067[] __initconst = {
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x99, 0xca, 0xd8, 0x5f, 0x45, 0xca, 0x40, 0x94,
+++	0x2d, 0x0d, 0x4d, 0x5e, 0x95, 0x0a, 0xde, 0x22
+++};
+++static const u8 enc_assoc067[] __initconst = {
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff,
+++	0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce067[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key067[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input068[] __initconst = {
+++	0x25, 0x6d, 0x40, 0x88, 0x7f, 0x6b, 0xe8, 0x7c,
+++	0x55, 0xd3, 0x04, 0x84, 0x9b, 0xbc, 0x01, 0x17,
+++	0xdf, 0x99, 0x47, 0x03, 0xfc, 0x04, 0xc4, 0x84,
+++	0x80, 0xe0, 0x30, 0xbe, 0x14, 0x2c, 0xd6, 0x41
+++};
+++static const u8 enc_output068[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x8b, 0xbe, 0x14, 0x52, 0x72, 0xe7, 0xc2, 0xd9,
+++	0xa1, 0x89, 0x1a, 0x3a, 0xb0, 0x98, 0x3d, 0x9d
+++};
+++static const u8 enc_assoc068[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce068[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key068[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input069[] __initconst = {
+++	0x25, 0x6d, 0x40, 0x88, 0x7f, 0x6b, 0xe8, 0x7c,
+++	0x55, 0xd3, 0x04, 0x84, 0x9b, 0xbc, 0x01, 0x17,
+++	0xdf, 0x99, 0x47, 0x03, 0xfc, 0x04, 0xc4, 0x84,
+++	0x80, 0xe0, 0x30, 0xbe, 0x14, 0x2c, 0xd6, 0x41,
+++	0xe3, 0xbc, 0xdb, 0x5b, 0xe1, 0x21, 0x03, 0x01,
+++	0x8b, 0xcd, 0xa1, 0xb6, 0x5e, 0xa3, 0x73, 0xd4,
+++	0x08, 0x69, 0xff, 0xd2, 0x13, 0xa1, 0xd9, 0x1a,
+++	0x53, 0xb7, 0xb2, 0x27, 0x01, 0x78, 0x02, 0x42
+++};
+++static const u8 enc_output069[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x3b, 0x41, 0x86, 0x19, 0x13, 0xa8, 0xf6, 0xde,
+++	0x7f, 0x61, 0xe2, 0x25, 0x63, 0x1b, 0xc3, 0x82
+++};
+++static const u8 enc_assoc069[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce069[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key069[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input070[] __initconst = {
+++	0x25, 0x6d, 0x40, 0x88, 0x7f, 0x6b, 0xe8, 0x7c,
+++	0x55, 0xd3, 0x04, 0x84, 0x9b, 0xbc, 0x01, 0x17,
+++	0xdf, 0x99, 0x47, 0x03, 0xfc, 0x04, 0xc4, 0x84,
+++	0x80, 0xe0, 0x30, 0xbe, 0x14, 0x2c, 0xd6, 0x41,
+++	0xe3, 0xbc, 0xdb, 0x5b, 0xe1, 0x21, 0x03, 0x01,
+++	0x8b, 0xcd, 0xa1, 0xb6, 0x5e, 0xa3, 0x73, 0xd4,
+++	0x08, 0x69, 0xff, 0xd2, 0x13, 0xa1, 0xd9, 0x1a,
+++	0x53, 0xb7, 0xb2, 0x27, 0x01, 0x78, 0x02, 0x42,
+++	0x7a, 0xda, 0x44, 0x42, 0xbd, 0x96, 0x40, 0x05,
+++	0x55, 0x27, 0xf2, 0x70, 0x53, 0x09, 0x7a, 0xfd,
+++	0xb7, 0x4c, 0x5a, 0xe2, 0x19, 0xf3, 0xfa, 0x7f,
+++	0x98, 0x1a, 0x49, 0x38, 0xba, 0x6c, 0x6d, 0x3b,
+++	0x9b, 0xb2, 0xf2, 0x84, 0x49, 0xb9, 0x10, 0x38,
+++	0xf3, 0xf0, 0xb1, 0x36, 0xe2, 0x3c, 0xb7, 0x12,
+++	0x77, 0xd3, 0x0b, 0xc5, 0x89, 0x6d, 0x12, 0xc7,
+++	0xfb, 0xac, 0x01, 0x88, 0xc7, 0xfb, 0x77, 0x38
+++};
+++static const u8 enc_output070[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x84, 0x28, 0xbc, 0xf0, 0x23, 0xec, 0x6b, 0xf3,
+++	0x1f, 0xd9, 0xef, 0xb2, 0x03, 0xff, 0x08, 0x71
+++};
+++static const u8 enc_assoc070[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce070[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key070[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input071[] __initconst = {
+++	0xda, 0x92, 0xbf, 0x77, 0x80, 0x94, 0x17, 0x83,
+++	0xaa, 0x2c, 0xfb, 0x7b, 0x64, 0x43, 0xfe, 0xe8,
+++	0x20, 0x66, 0xb8, 0xfc, 0x03, 0xfb, 0x3b, 0x7b,
+++	0x7f, 0x1f, 0xcf, 0x41, 0xeb, 0xd3, 0x29, 0xbe
+++};
+++static const u8 enc_output071[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0x13, 0x9f, 0xdf, 0x64, 0x74, 0xea, 0x24, 0xf5,
+++	0x49, 0xb0, 0x75, 0x82, 0x5f, 0x2c, 0x76, 0x20
+++};
+++static const u8 enc_assoc071[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00
+++};
+++static const u8 enc_nonce071[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key071[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input072[] __initconst = {
+++	0xda, 0x92, 0xbf, 0x77, 0x80, 0x94, 0x17, 0x83,
+++	0xaa, 0x2c, 0xfb, 0x7b, 0x64, 0x43, 0xfe, 0xe8,
+++	0x20, 0x66, 0xb8, 0xfc, 0x03, 0xfb, 0x3b, 0x7b,
+++	0x7f, 0x1f, 0xcf, 0x41, 0xeb, 0xd3, 0x29, 0xbe,
+++	0x1c, 0x43, 0x24, 0xa4, 0x1e, 0xde, 0xfc, 0xfe,
+++	0x74, 0x32, 0x5e, 0x49, 0xa1, 0x5c, 0x8c, 0x2b,
+++	0xf7, 0x96, 0x00, 0x2d, 0xec, 0x5e, 0x26, 0xe5,
+++	0xac, 0x48, 0x4d, 0xd8, 0xfe, 0x87, 0xfd, 0xbd
+++};
+++static const u8 enc_output072[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xbb, 0xad, 0x8d, 0x86, 0x3b, 0x83, 0x5a, 0x8e,
+++	0x86, 0x64, 0xfd, 0x1d, 0x45, 0x66, 0xb6, 0xb4
+++};
+++static const u8 enc_assoc072[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00
+++};
+++static const u8 enc_nonce072[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key072[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input073[] __initconst = {
+++	0xda, 0x92, 0xbf, 0x77, 0x80, 0x94, 0x17, 0x83,
+++	0xaa, 0x2c, 0xfb, 0x7b, 0x64, 0x43, 0xfe, 0xe8,
+++	0x20, 0x66, 0xb8, 0xfc, 0x03, 0xfb, 0x3b, 0x7b,
+++	0x7f, 0x1f, 0xcf, 0x41, 0xeb, 0xd3, 0x29, 0xbe,
+++	0x1c, 0x43, 0x24, 0xa4, 0x1e, 0xde, 0xfc, 0xfe,
+++	0x74, 0x32, 0x5e, 0x49, 0xa1, 0x5c, 0x8c, 0x2b,
+++	0xf7, 0x96, 0x00, 0x2d, 0xec, 0x5e, 0x26, 0xe5,
+++	0xac, 0x48, 0x4d, 0xd8, 0xfe, 0x87, 0xfd, 0xbd,
+++	0x85, 0x25, 0xbb, 0xbd, 0x42, 0x69, 0xbf, 0xfa,
+++	0xaa, 0xd8, 0x0d, 0x8f, 0xac, 0xf6, 0x85, 0x02,
+++	0x48, 0xb3, 0xa5, 0x1d, 0xe6, 0x0c, 0x05, 0x80,
+++	0x67, 0xe5, 0xb6, 0xc7, 0x45, 0x93, 0x92, 0xc4,
+++	0x64, 0x4d, 0x0d, 0x7b, 0xb6, 0x46, 0xef, 0xc7,
+++	0x0c, 0x0f, 0x4e, 0xc9, 0x1d, 0xc3, 0x48, 0xed,
+++	0x88, 0x2c, 0xf4, 0x3a, 0x76, 0x92, 0xed, 0x38,
+++	0x04, 0x53, 0xfe, 0x77, 0x38, 0x04, 0x88, 0xc7
+++};
+++static const u8 enc_output073[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0x42, 0xf2, 0x35, 0x42, 0x97, 0x84, 0x9a, 0x51,
+++	0x1d, 0x53, 0xe5, 0x57, 0x17, 0x72, 0xf7, 0x1f
+++};
+++static const u8 enc_assoc073[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00
+++};
+++static const u8 enc_nonce073[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0xee, 0x32, 0x00
+++};
+++static const u8 enc_key073[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - checking for int overflows */
+++static const u8 enc_input076[] __initconst = {
+++	0x1b, 0x99, 0x6f, 0x9a, 0x3c, 0xcc, 0x67, 0x85,
+++	0xde, 0x22, 0xff, 0x5b, 0x8a, 0xdd, 0x95, 0x02,
+++	0xce, 0x03, 0xa0, 0xfa, 0xf5, 0x99, 0x2a, 0x09,
+++	0x52, 0x2c, 0xdd, 0x12, 0x06, 0xd2, 0x20, 0xb8,
+++	0xf8, 0xbd, 0x07, 0xd1, 0xf1, 0xf5, 0xa1, 0xbd,
+++	0x9a, 0x71, 0xd1, 0x1c, 0x7f, 0x57, 0x9b, 0x85,
+++	0x58, 0x18, 0xc0, 0x8d, 0x4d, 0xe0, 0x36, 0x39,
+++	0x31, 0x83, 0xb7, 0xf5, 0x90, 0xb3, 0x35, 0xae,
+++	0xd8, 0xde, 0x5b, 0x57, 0xb1, 0x3c, 0x5f, 0xed,
+++	0xe2, 0x44, 0x1c, 0x3e, 0x18, 0x4a, 0xa9, 0xd4,
+++	0x6e, 0x61, 0x59, 0x85, 0x06, 0xb3, 0xe1, 0x1c,
+++	0x43, 0xc6, 0x2c, 0xbc, 0xac, 0xec, 0xed, 0x33,
+++	0x19, 0x08, 0x75, 0xb0, 0x12, 0x21, 0x8b, 0x19,
+++	0x30, 0xfb, 0x7c, 0x38, 0xec, 0x45, 0xac, 0x11,
+++	0xc3, 0x53, 0xd0, 0xcf, 0x93, 0x8d, 0xcc, 0xb9,
+++	0xef, 0xad, 0x8f, 0xed, 0xbe, 0x46, 0xda, 0xa5
+++};
+++static const u8 enc_output076[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x4b, 0x0b, 0xda, 0x8a, 0xd0, 0x43, 0x83, 0x0d,
+++	0x83, 0x19, 0xab, 0x82, 0xc5, 0x0c, 0x76, 0x63
+++};
+++static const u8 enc_assoc076[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce076[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0xb4, 0xf0
+++};
+++static const u8 enc_key076[] __initconst = {
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30
+++};
+++
+++/* wycheproof - checking for int overflows */
+++static const u8 enc_input077[] __initconst = {
+++	0x86, 0xcb, 0xac, 0xae, 0x4d, 0x3f, 0x74, 0xae,
+++	0x01, 0x21, 0x3e, 0x05, 0x51, 0xcc, 0x15, 0x16,
+++	0x0e, 0xa1, 0xbe, 0x84, 0x08, 0xe3, 0xd5, 0xd7,
+++	0x4f, 0x01, 0x46, 0x49, 0x95, 0xa6, 0x9e, 0x61,
+++	0x76, 0xcb, 0x9e, 0x02, 0xb2, 0x24, 0x7e, 0xd2,
+++	0x99, 0x89, 0x2f, 0x91, 0x82, 0xa4, 0x5c, 0xaf,
+++	0x4c, 0x69, 0x40, 0x56, 0x11, 0x76, 0x6e, 0xdf,
+++	0xaf, 0xdc, 0x28, 0x55, 0x19, 0xea, 0x30, 0x48,
+++	0x0c, 0x44, 0xf0, 0x5e, 0x78, 0x1e, 0xac, 0xf8,
+++	0xfc, 0xec, 0xc7, 0x09, 0x0a, 0xbb, 0x28, 0xfa,
+++	0x5f, 0xd5, 0x85, 0xac, 0x8c, 0xda, 0x7e, 0x87,
+++	0x72, 0xe5, 0x94, 0xe4, 0xce, 0x6c, 0x88, 0x32,
+++	0x81, 0x93, 0x2e, 0x0f, 0x89, 0xf8, 0x77, 0xa1,
+++	0xf0, 0x4d, 0x9c, 0x32, 0xb0, 0x6c, 0xf9, 0x0b,
+++	0x0e, 0x76, 0x2b, 0x43, 0x0c, 0x4d, 0x51, 0x7c,
+++	0x97, 0x10, 0x70, 0x68, 0xf4, 0x98, 0xef, 0x7f
+++};
+++static const u8 enc_output077[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x4b, 0xc9, 0x8f, 0x72, 0xc4, 0x94, 0xc2, 0xa4,
+++	0x3c, 0x2b, 0x15, 0xa1, 0x04, 0x3f, 0x1c, 0xfa
+++};
+++static const u8 enc_assoc077[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce077[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0xfb, 0x66
+++};
+++static const u8 enc_key077[] __initconst = {
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30
+++};
+++
+++/* wycheproof - checking for int overflows */
+++static const u8 enc_input078[] __initconst = {
+++	0xfa, 0xb1, 0xcd, 0xdf, 0x4f, 0xe1, 0x98, 0xef,
+++	0x63, 0xad, 0xd8, 0x81, 0xd6, 0xea, 0xd6, 0xc5,
+++	0x76, 0x37, 0xbb, 0xe9, 0x20, 0x18, 0xca, 0x7c,
+++	0x0b, 0x96, 0xfb, 0xa0, 0x87, 0x1e, 0x93, 0x2d,
+++	0xb1, 0xfb, 0xf9, 0x07, 0x61, 0xbe, 0x25, 0xdf,
+++	0x8d, 0xfa, 0xf9, 0x31, 0xce, 0x57, 0x57, 0xe6,
+++	0x17, 0xb3, 0xd7, 0xa9, 0xf0, 0xbf, 0x0f, 0xfe,
+++	0x5d, 0x59, 0x1a, 0x33, 0xc1, 0x43, 0xb8, 0xf5,
+++	0x3f, 0xd0, 0xb5, 0xa1, 0x96, 0x09, 0xfd, 0x62,
+++	0xe5, 0xc2, 0x51, 0xa4, 0x28, 0x1a, 0x20, 0x0c,
+++	0xfd, 0xc3, 0x4f, 0x28, 0x17, 0x10, 0x40, 0x6f,
+++	0x4e, 0x37, 0x62, 0x54, 0x46, 0xff, 0x6e, 0xf2,
+++	0x24, 0x91, 0x3d, 0xeb, 0x0d, 0x89, 0xaf, 0x33,
+++	0x71, 0x28, 0xe3, 0xd1, 0x55, 0xd1, 0x6d, 0x3e,
+++	0xc3, 0x24, 0x60, 0x41, 0x43, 0x21, 0x43, 0xe9,
+++	0xab, 0x3a, 0x6d, 0x2c, 0xcc, 0x2f, 0x4d, 0x62
+++};
+++static const u8 enc_output078[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xf7, 0xe9, 0xe1, 0x51, 0xb0, 0x25, 0x33, 0xc7,
+++	0x46, 0x58, 0xbf, 0xc7, 0x73, 0x7c, 0x68, 0x0d
+++};
+++static const u8 enc_assoc078[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce078[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0xbb, 0x90
+++};
+++static const u8 enc_key078[] __initconst = {
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30
+++};
+++
+++/* wycheproof - checking for int overflows */
+++static const u8 enc_input079[] __initconst = {
+++	0x22, 0x72, 0x02, 0xbe, 0x7f, 0x35, 0x15, 0xe9,
+++	0xd1, 0xc0, 0x2e, 0xea, 0x2f, 0x19, 0x50, 0xb6,
+++	0x48, 0x1b, 0x04, 0x8a, 0x4c, 0x91, 0x50, 0x6c,
+++	0xb4, 0x0d, 0x50, 0x4e, 0x6c, 0x94, 0x9f, 0x82,
+++	0xd1, 0x97, 0xc2, 0x5a, 0xd1, 0x7d, 0xc7, 0x21,
+++	0x65, 0x11, 0x25, 0x78, 0x2a, 0xc7, 0xa7, 0x12,
+++	0x47, 0xfe, 0xae, 0xf3, 0x2f, 0x1f, 0x25, 0x0c,
+++	0xe4, 0xbb, 0x8f, 0x79, 0xac, 0xaa, 0x17, 0x9d,
+++	0x45, 0xa7, 0xb0, 0x54, 0x5f, 0x09, 0x24, 0x32,
+++	0x5e, 0xfa, 0x87, 0xd5, 0xe4, 0x41, 0xd2, 0x84,
+++	0x78, 0xc6, 0x1f, 0x22, 0x23, 0xee, 0x67, 0xc3,
+++	0xb4, 0x1f, 0x43, 0x94, 0x53, 0x5e, 0x2a, 0x24,
+++	0x36, 0x9a, 0x2e, 0x16, 0x61, 0x3c, 0x45, 0x94,
+++	0x90, 0xc1, 0x4f, 0xb1, 0xd7, 0x55, 0xfe, 0x53,
+++	0xfb, 0xe1, 0xee, 0x45, 0xb1, 0xb2, 0x1f, 0x71,
+++	0x62, 0xe2, 0xfc, 0xaa, 0x74, 0x2a, 0xbe, 0xfd
+++};
+++static const u8 enc_output079[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x79, 0x5b, 0xcf, 0xf6, 0x47, 0xc5, 0x53, 0xc2,
+++	0xe4, 0xeb, 0x6e, 0x0e, 0xaf, 0xd9, 0xe0, 0x4e
+++};
+++static const u8 enc_assoc079[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce079[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x48, 0x4a
+++};
+++static const u8 enc_key079[] __initconst = {
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30
+++};
+++
+++/* wycheproof - checking for int overflows */
+++static const u8 enc_input080[] __initconst = {
+++	0xfa, 0xe5, 0x83, 0x45, 0xc1, 0x6c, 0xb0, 0xf5,
+++	0xcc, 0x53, 0x7f, 0x2b, 0x1b, 0x34, 0x69, 0xc9,
+++	0x69, 0x46, 0x3b, 0x3e, 0xa7, 0x1b, 0xcf, 0x6b,
+++	0x98, 0xd6, 0x69, 0xa8, 0xe6, 0x0e, 0x04, 0xfc,
+++	0x08, 0xd5, 0xfd, 0x06, 0x9c, 0x36, 0x26, 0x38,
+++	0xe3, 0x40, 0x0e, 0xf4, 0xcb, 0x24, 0x2e, 0x27,
+++	0xe2, 0x24, 0x5e, 0x68, 0xcb, 0x9e, 0xc5, 0x83,
+++	0xda, 0x53, 0x40, 0xb1, 0x2e, 0xdf, 0x42, 0x3b,
+++	0x73, 0x26, 0xad, 0x20, 0xfe, 0xeb, 0x57, 0xda,
+++	0xca, 0x2e, 0x04, 0x67, 0xa3, 0x28, 0x99, 0xb4,
+++	0x2d, 0xf8, 0xe5, 0x6d, 0x84, 0xe0, 0x06, 0xbc,
+++	0x8a, 0x7a, 0xcc, 0x73, 0x1e, 0x7c, 0x1f, 0x6b,
+++	0xec, 0xb5, 0x71, 0x9f, 0x70, 0x77, 0xf0, 0xd4,
+++	0xf4, 0xc6, 0x1a, 0xb1, 0x1e, 0xba, 0xc1, 0x00,
+++	0x18, 0x01, 0xce, 0x33, 0xc4, 0xe4, 0xa7, 0x7d,
+++	0x83, 0x1d, 0x3c, 0xe3, 0x4e, 0x84, 0x10, 0xe1
+++};
+++static const u8 enc_output080[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x19, 0x46, 0xd6, 0x53, 0x96, 0x0f, 0x94, 0x7a,
+++	0x74, 0xd3, 0xe8, 0x09, 0x3c, 0xf4, 0x85, 0x02
+++};
+++static const u8 enc_assoc080[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce080[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x93, 0x2f, 0x40
+++};
+++static const u8 enc_key080[] __initconst = {
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30
+++};
+++
+++/* wycheproof - checking for int overflows */
+++static const u8 enc_input081[] __initconst = {
+++	0xeb, 0xb2, 0x16, 0xdd, 0xd7, 0xca, 0x70, 0x92,
+++	0x15, 0xf5, 0x03, 0xdf, 0x9c, 0xe6, 0x3c, 0x5c,
+++	0xd2, 0x19, 0x4e, 0x7d, 0x90, 0x99, 0xe8, 0xa9,
+++	0x0b, 0x2a, 0xfa, 0xad, 0x5e, 0xba, 0x35, 0x06,
+++	0x99, 0x25, 0xa6, 0x03, 0xfd, 0xbc, 0x34, 0x1a,
+++	0xae, 0xd4, 0x15, 0x05, 0xb1, 0x09, 0x41, 0xfa,
+++	0x38, 0x56, 0xa7, 0xe2, 0x47, 0xb1, 0x04, 0x07,
+++	0x09, 0x74, 0x6c, 0xfc, 0x20, 0x96, 0xca, 0xa6,
+++	0x31, 0xb2, 0xff, 0xf4, 0x1c, 0x25, 0x05, 0x06,
+++	0xd8, 0x89, 0xc1, 0xc9, 0x06, 0x71, 0xad, 0xe8,
+++	0x53, 0xee, 0x63, 0x94, 0xc1, 0x91, 0x92, 0xa5,
+++	0xcf, 0x37, 0x10, 0xd1, 0x07, 0x30, 0x99, 0xe5,
+++	0xbc, 0x94, 0x65, 0x82, 0xfc, 0x0f, 0xab, 0x9f,
+++	0x54, 0x3c, 0x71, 0x6a, 0xe2, 0x48, 0x6a, 0x86,
+++	0x83, 0xfd, 0xca, 0x39, 0xd2, 0xe1, 0x4f, 0x23,
+++	0xd0, 0x0a, 0x58, 0x26, 0x64, 0xf4, 0xec, 0xb1
+++};
+++static const u8 enc_output081[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x36, 0xc3, 0x00, 0x29, 0x85, 0xdd, 0x21, 0xba,
+++	0xf8, 0x95, 0xd6, 0x33, 0x57, 0x3f, 0x12, 0xc0
+++};
+++static const u8 enc_assoc081[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce081[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0xe2, 0x93, 0x35
+++};
+++static const u8 enc_key081[] __initconst = {
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30
+++};
+++
+++/* wycheproof - checking for int overflows */
+++static const u8 enc_input082[] __initconst = {
+++	0x40, 0x8a, 0xe6, 0xef, 0x1c, 0x7e, 0xf0, 0xfb,
+++	0x2c, 0x2d, 0x61, 0x08, 0x16, 0xfc, 0x78, 0x49,
+++	0xef, 0xa5, 0x8f, 0x78, 0x27, 0x3f, 0x5f, 0x16,
+++	0x6e, 0xa6, 0x5f, 0x81, 0xb5, 0x75, 0x74, 0x7d,
+++	0x03, 0x5b, 0x30, 0x40, 0xfe, 0xde, 0x1e, 0xb9,
+++	0x45, 0x97, 0x88, 0x66, 0x97, 0x88, 0x40, 0x8e,
+++	0x00, 0x41, 0x3b, 0x3e, 0x37, 0x6d, 0x15, 0x2d,
+++	0x20, 0x4a, 0xa2, 0xb7, 0xa8, 0x35, 0x58, 0xfc,
+++	0xd4, 0x8a, 0x0e, 0xf7, 0xa2, 0x6b, 0x1c, 0xd6,
+++	0xd3, 0x5d, 0x23, 0xb3, 0xf5, 0xdf, 0xe0, 0xca,
+++	0x77, 0xa4, 0xce, 0x32, 0xb9, 0x4a, 0xbf, 0x83,
+++	0xda, 0x2a, 0xef, 0xca, 0xf0, 0x68, 0x38, 0x08,
+++	0x79, 0xe8, 0x9f, 0xb0, 0xa3, 0x82, 0x95, 0x95,
+++	0xcf, 0x44, 0xc3, 0x85, 0x2a, 0xe2, 0xcc, 0x66,
+++	0x2b, 0x68, 0x9f, 0x93, 0x55, 0xd9, 0xc1, 0x83,
+++	0x80, 0x1f, 0x6a, 0xcc, 0x31, 0x3f, 0x89, 0x07
+++};
+++static const u8 enc_output082[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x65, 0x14, 0x51, 0x8e, 0x0a, 0x26, 0x41, 0x42,
+++	0xe0, 0xb7, 0x35, 0x1f, 0x96, 0x7f, 0xc2, 0xae
+++};
+++static const u8 enc_assoc082[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce082[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x0e, 0xf7, 0xd5
+++};
+++static const u8 enc_key082[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - checking for int overflows */
+++static const u8 enc_input083[] __initconst = {
+++	0x0a, 0x0a, 0x24, 0x49, 0x9b, 0xca, 0xde, 0x58,
+++	0xcf, 0x15, 0x76, 0xc3, 0x12, 0xac, 0xa9, 0x84,
+++	0x71, 0x8c, 0xb4, 0xcc, 0x7e, 0x01, 0x53, 0xf5,
+++	0xa9, 0x01, 0x58, 0x10, 0x85, 0x96, 0x44, 0xdf,
+++	0xc0, 0x21, 0x17, 0x4e, 0x0b, 0x06, 0x0a, 0x39,
+++	0x74, 0x48, 0xde, 0x8b, 0x48, 0x4a, 0x86, 0x03,
+++	0xbe, 0x68, 0x0a, 0x69, 0x34, 0xc0, 0x90, 0x6f,
+++	0x30, 0xdd, 0x17, 0xea, 0xe2, 0xd4, 0xc5, 0xfa,
+++	0xa7, 0x77, 0xf8, 0xca, 0x53, 0x37, 0x0e, 0x08,
+++	0x33, 0x1b, 0x88, 0xc3, 0x42, 0xba, 0xc9, 0x59,
+++	0x78, 0x7b, 0xbb, 0x33, 0x93, 0x0e, 0x3b, 0x56,
+++	0xbe, 0x86, 0xda, 0x7f, 0x2a, 0x6e, 0xb1, 0xf9,
+++	0x40, 0x89, 0xd1, 0xd1, 0x81, 0x07, 0x4d, 0x43,
+++	0x02, 0xf8, 0xe0, 0x55, 0x2d, 0x0d, 0xe1, 0xfa,
+++	0xb3, 0x06, 0xa2, 0x1b, 0x42, 0xd4, 0xc3, 0xba,
+++	0x6e, 0x6f, 0x0c, 0xbc, 0xc8, 0x1e, 0x87, 0x7a
+++};
+++static const u8 enc_output083[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x4c, 0x19, 0x4d, 0xa6, 0xa9, 0x9f, 0xd6, 0x5b,
+++	0x40, 0xe9, 0xca, 0xd7, 0x98, 0xf4, 0x4b, 0x19
+++};
+++static const u8 enc_assoc083[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce083[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x3d, 0xfc, 0xe4
+++};
+++static const u8 enc_key083[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - checking for int overflows */
+++static const u8 enc_input084[] __initconst = {
+++	0x4a, 0x0a, 0xaf, 0xf8, 0x49, 0x47, 0x29, 0x18,
+++	0x86, 0x91, 0x70, 0x13, 0x40, 0xf3, 0xce, 0x2b,
+++	0x8a, 0x78, 0xee, 0xd3, 0xa0, 0xf0, 0x65, 0x99,
+++	0x4b, 0x72, 0x48, 0x4e, 0x79, 0x91, 0xd2, 0x5c,
+++	0x29, 0xaa, 0x07, 0x5e, 0xb1, 0xfc, 0x16, 0xde,
+++	0x93, 0xfe, 0x06, 0x90, 0x58, 0x11, 0x2a, 0xb2,
+++	0x84, 0xa3, 0xed, 0x18, 0x78, 0x03, 0x26, 0xd1,
+++	0x25, 0x8a, 0x47, 0x22, 0x2f, 0xa6, 0x33, 0xd8,
+++	0xb2, 0x9f, 0x3b, 0xd9, 0x15, 0x0b, 0x23, 0x9b,
+++	0x15, 0x46, 0xc2, 0xbb, 0x9b, 0x9f, 0x41, 0x0f,
+++	0xeb, 0xea, 0xd3, 0x96, 0x00, 0x0e, 0xe4, 0x77,
+++	0x70, 0x15, 0x32, 0xc3, 0xd0, 0xf5, 0xfb, 0xf8,
+++	0x95, 0xd2, 0x80, 0x19, 0x6d, 0x2f, 0x73, 0x7c,
+++	0x5e, 0x9f, 0xec, 0x50, 0xd9, 0x2b, 0xb0, 0xdf,
+++	0x5d, 0x7e, 0x51, 0x3b, 0xe5, 0xb8, 0xea, 0x97,
+++	0x13, 0x10, 0xd5, 0xbf, 0x16, 0xba, 0x7a, 0xee
+++};
+++static const u8 enc_output084[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xc8, 0xae, 0x77, 0x88, 0xcd, 0x28, 0x74, 0xab,
+++	0xc1, 0x38, 0x54, 0x1e, 0x11, 0xfd, 0x05, 0x87
+++};
+++static const u8 enc_assoc084[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce084[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x01, 0x84, 0x86, 0xa8
+++};
+++static const u8 enc_key084[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - checking for int overflows */
+++static const u8 enc_input085[] __initconst = {
+++	0xff, 0x94, 0x28, 0xd0, 0x79, 0x35, 0x1f, 0x66,
+++	0x5c, 0xd0, 0x01, 0x35, 0x43, 0x19, 0x87, 0x5c,
+++	0x78, 0x3d, 0x35, 0xf6, 0x13, 0xe6, 0xd9, 0x09,
+++	0x3d, 0x38, 0xe9, 0x75, 0xc3, 0x8f, 0xe3, 0xb8,
+++	0x9f, 0x7a, 0xed, 0x35, 0xcb, 0x5a, 0x2f, 0xca,
+++	0xa0, 0x34, 0x6e, 0xfb, 0x93, 0x65, 0x54, 0x64,
+++	0x9c, 0xf6, 0x37, 0x81, 0x71, 0xea, 0xe4, 0x39,
+++	0x6e, 0xa1, 0x5d, 0xc2, 0x40, 0xd1, 0xab, 0xf4,
+++	0x47, 0x2d, 0x90, 0x96, 0x52, 0x4f, 0xa1, 0xb2,
+++	0xb0, 0x23, 0xb8, 0xb2, 0x88, 0x22, 0x27, 0x73,
+++	0xd4, 0xd2, 0x06, 0x61, 0x6f, 0x92, 0x93, 0xf6,
+++	0x5b, 0x45, 0xdb, 0xbc, 0x74, 0xe7, 0xc2, 0xed,
+++	0xfb, 0xcb, 0xbf, 0x1c, 0xfb, 0x67, 0x9b, 0xb7,
+++	0x39, 0xa5, 0x86, 0x2d, 0xe2, 0xbc, 0xb9, 0x37,
+++	0xf7, 0x4d, 0x5b, 0xf8, 0x67, 0x1c, 0x5a, 0x8a,
+++	0x50, 0x92, 0xf6, 0x1d, 0x54, 0xc9, 0xaa, 0x5b
+++};
+++static const u8 enc_output085[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x93, 0x3a, 0x51, 0x63, 0xc7, 0xf6, 0x23, 0x68,
+++	0x32, 0x7b, 0x3f, 0xbc, 0x10, 0x36, 0xc9, 0x43
+++};
+++static const u8 enc_assoc085[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce085[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key085[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input093[] __initconst = {
+++	0x00, 0x52, 0x35, 0xd2, 0xa9, 0x19, 0xf2, 0x8d,
+++	0x3d, 0xb7, 0x66, 0x4a, 0x34, 0xae, 0x6b, 0x44,
+++	0x4d, 0x3d, 0x35, 0xf6, 0x13, 0xe6, 0xd9, 0x09,
+++	0x3d, 0x38, 0xe9, 0x75, 0xc3, 0x8f, 0xe3, 0xb8,
+++	0x5b, 0x8b, 0x94, 0x50, 0x9e, 0x2b, 0x74, 0xa3,
+++	0x6d, 0x34, 0x6e, 0x33, 0xd5, 0x72, 0x65, 0x9b,
+++	0xa9, 0xf6, 0x37, 0x81, 0x71, 0xea, 0xe4, 0x39,
+++	0x6e, 0xa1, 0x5d, 0xc2, 0x40, 0xd1, 0xab, 0xf4,
+++	0x83, 0xdc, 0xe9, 0xf3, 0x07, 0x3e, 0xfa, 0xdb,
+++	0x7d, 0x23, 0xb8, 0x7a, 0xce, 0x35, 0x16, 0x8c
+++};
+++static const u8 enc_output093[] __initconst = {
+++	0x00, 0x39, 0xe2, 0xfd, 0x2f, 0xd3, 0x12, 0x14,
+++	0x9e, 0x98, 0x98, 0x80, 0x88, 0x48, 0x13, 0xe7,
+++	0xca, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x3b, 0x0e, 0x86, 0x9a, 0xaa, 0x8e, 0xa4, 0x96,
+++	0x32, 0xff, 0xff, 0x37, 0xb9, 0xe8, 0xce, 0x00,
+++	0xca, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x3b, 0x0e, 0x86, 0x9a, 0xaa, 0x8e, 0xa4, 0x96,
+++	0x32, 0xff, 0xff, 0x37, 0xb9, 0xe8, 0xce, 0x00,
+++	0xa5, 0x19, 0xac, 0x1a, 0x35, 0xb4, 0xa5, 0x77,
+++	0x87, 0x51, 0x0a, 0xf7, 0x8d, 0x8d, 0x20, 0x0a
+++};
+++static const u8 enc_assoc093[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce093[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key093[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input094[] __initconst = {
+++	0xd3, 0x94, 0x28, 0xd0, 0x79, 0x35, 0x1f, 0x66,
+++	0x5c, 0xd0, 0x01, 0x35, 0x43, 0x19, 0x87, 0x5c,
+++	0xe5, 0xda, 0x78, 0x76, 0x6f, 0xa1, 0x92, 0x90,
+++	0xc0, 0x31, 0xf7, 0x52, 0x08, 0x50, 0x67, 0x45,
+++	0xae, 0x7a, 0xed, 0x35, 0xcb, 0x5a, 0x2f, 0xca,
+++	0xa0, 0x34, 0x6e, 0xfb, 0x93, 0x65, 0x54, 0x64,
+++	0x49, 0x6d, 0xde, 0xb0, 0x55, 0x09, 0xc6, 0xef,
+++	0xff, 0xab, 0x75, 0xeb, 0x2d, 0xf4, 0xab, 0x09,
+++	0x76, 0x2d, 0x90, 0x96, 0x52, 0x4f, 0xa1, 0xb2,
+++	0xb0, 0x23, 0xb8, 0xb2, 0x88, 0x22, 0x27, 0x73,
+++	0x01, 0x49, 0xef, 0x50, 0x4b, 0x71, 0xb1, 0x20,
+++	0xca, 0x4f, 0xf3, 0x95, 0x19, 0xc2, 0xc2, 0x10
+++};
+++static const u8 enc_output094[] __initconst = {
+++	0xd3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x62, 0x18, 0xb2, 0x7f, 0x83, 0xb8, 0xb4, 0x66,
+++	0x02, 0xf6, 0xe1, 0xd8, 0x34, 0x20, 0x7b, 0x02,
+++	0xce, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x2a, 0x64, 0x16, 0xce, 0xdb, 0x1c, 0xdd, 0x29,
+++	0x6e, 0xf5, 0xd7, 0xd6, 0x92, 0xda, 0xff, 0x02,
+++	0xce, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x2a, 0x64, 0x16, 0xce, 0xdb, 0x1c, 0xdd, 0x29,
+++	0x6e, 0xf5, 0xd7, 0xd6, 0x92, 0xda, 0xff, 0x02,
+++	0x30, 0x2f, 0xe8, 0x2a, 0xb0, 0xa0, 0x9a, 0xf6,
+++	0x44, 0x00, 0xd0, 0x15, 0xae, 0x83, 0xd9, 0xcc
+++};
+++static const u8 enc_assoc094[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce094[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key094[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input095[] __initconst = {
+++	0xe9, 0x94, 0x28, 0xd0, 0x79, 0x35, 0x1f, 0x66,
+++	0x5c, 0xd0, 0x01, 0x35, 0x43, 0x19, 0x87, 0x5c,
+++	0x6d, 0xf1, 0x39, 0x4e, 0xdc, 0x53, 0x9b, 0x5b,
+++	0x3a, 0x09, 0x57, 0xbe, 0x0f, 0xb8, 0x59, 0x46,
+++	0x80, 0x7a, 0xed, 0x35, 0xcb, 0x5a, 0x2f, 0xca,
+++	0xa0, 0x34, 0x6e, 0xfb, 0x93, 0x65, 0x54, 0x64,
+++	0xd1, 0x76, 0x9f, 0xe8, 0x06, 0xbb, 0xfe, 0xb6,
+++	0xf5, 0x90, 0x95, 0x0f, 0x2e, 0xac, 0x9e, 0x0a,
+++	0x58, 0x2d, 0x90, 0x96, 0x52, 0x4f, 0xa1, 0xb2,
+++	0xb0, 0x23, 0xb8, 0xb2, 0x88, 0x22, 0x27, 0x73,
+++	0x99, 0x52, 0xae, 0x08, 0x18, 0xc3, 0x89, 0x79,
+++	0xc0, 0x74, 0x13, 0x71, 0x1a, 0x9a, 0xf7, 0x13
+++};
+++static const u8 enc_output095[] __initconst = {
+++	0xe9, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xea, 0x33, 0xf3, 0x47, 0x30, 0x4a, 0xbd, 0xad,
+++	0xf8, 0xce, 0x41, 0x34, 0x33, 0xc8, 0x45, 0x01,
+++	0xe0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xb2, 0x7f, 0x57, 0x96, 0x88, 0xae, 0xe5, 0x70,
+++	0x64, 0xce, 0x37, 0x32, 0x91, 0x82, 0xca, 0x01,
+++	0xe0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xb2, 0x7f, 0x57, 0x96, 0x88, 0xae, 0xe5, 0x70,
+++	0x64, 0xce, 0x37, 0x32, 0x91, 0x82, 0xca, 0x01,
+++	0x98, 0xa7, 0xe8, 0x36, 0xe0, 0xee, 0x4d, 0x02,
+++	0x35, 0x00, 0xd0, 0x55, 0x7e, 0xc2, 0xcb, 0xe0
+++};
+++static const u8 enc_assoc095[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce095[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key095[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input096[] __initconst = {
+++	0xff, 0x94, 0x28, 0xd0, 0x79, 0x35, 0x1f, 0x66,
+++	0x5c, 0xd0, 0x01, 0x35, 0x43, 0x19, 0x87, 0x5c,
+++	0x64, 0xf9, 0x0f, 0x5b, 0x26, 0x92, 0xb8, 0x60,
+++	0xd4, 0x59, 0x6f, 0xf4, 0xb3, 0x40, 0x2c, 0x5c,
+++	0x00, 0xb9, 0xbb, 0x53, 0x70, 0x7a, 0xa6, 0x67,
+++	0xd3, 0x56, 0xfe, 0x50, 0xc7, 0x19, 0x96, 0x94,
+++	0x03, 0x35, 0x61, 0xe7, 0xca, 0xca, 0x6d, 0x94,
+++	0x1d, 0xc3, 0xcd, 0x69, 0x14, 0xad, 0x69, 0x04
+++};
+++static const u8 enc_output096[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xe3, 0x3b, 0xc5, 0x52, 0xca, 0x8b, 0x9e, 0x96,
+++	0x16, 0x9e, 0x79, 0x7e, 0x8f, 0x30, 0x30, 0x1b,
+++	0x60, 0x3c, 0xa9, 0x99, 0x44, 0xdf, 0x76, 0x52,
+++	0x8c, 0x9d, 0x6f, 0x54, 0xab, 0x83, 0x3d, 0x0f,
+++	0x60, 0x3c, 0xa9, 0x99, 0x44, 0xdf, 0x76, 0x52,
+++	0x8c, 0x9d, 0x6f, 0x54, 0xab, 0x83, 0x3d, 0x0f,
+++	0x6a, 0xb8, 0xdc, 0xe2, 0xc5, 0x9d, 0xa4, 0x73,
+++	0x71, 0x30, 0xb0, 0x25, 0x2f, 0x68, 0xa8, 0xd8
+++};
+++static const u8 enc_assoc096[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce096[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key096[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input097[] __initconst = {
+++	0x68, 0x94, 0x28, 0xd0, 0x79, 0x35, 0x1f, 0x66,
+++	0x5c, 0xd0, 0x01, 0x35, 0x43, 0x19, 0x87, 0x5c,
+++	0xb0, 0x8f, 0x25, 0x67, 0x5b, 0x9b, 0xcb, 0xf6,
+++	0xe3, 0x84, 0x07, 0xde, 0x2e, 0xc7, 0x5a, 0x47,
+++	0x9f, 0x7a, 0xed, 0x35, 0xcb, 0x5a, 0x2f, 0xca,
+++	0xa0, 0x34, 0x6e, 0xfb, 0x93, 0x65, 0x54, 0x64,
+++	0x2d, 0x2a, 0xf7, 0xcd, 0x6b, 0x08, 0x05, 0x01,
+++	0xd3, 0x1b, 0xa5, 0x4f, 0xb2, 0xeb, 0x75, 0x96,
+++	0x47, 0x2d, 0x90, 0x96, 0x52, 0x4f, 0xa1, 0xb2,
+++	0xb0, 0x23, 0xb8, 0xb2, 0x88, 0x22, 0x27, 0x73,
+++	0x65, 0x0e, 0xc6, 0x2d, 0x75, 0x70, 0x72, 0xce,
+++	0xe6, 0xff, 0x23, 0x31, 0x86, 0xdd, 0x1c, 0x8f
+++};
+++static const u8 enc_output097[] __initconst = {
+++	0x68, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x37, 0x4d, 0xef, 0x6e, 0xb7, 0x82, 0xed, 0x00,
+++	0x21, 0x43, 0x11, 0x54, 0x12, 0xb7, 0x46, 0x00,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x4e, 0x23, 0x3f, 0xb3, 0xe5, 0x1d, 0x1e, 0xc7,
+++	0x42, 0x45, 0x07, 0x72, 0x0d, 0xc5, 0x21, 0x9d,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x4e, 0x23, 0x3f, 0xb3, 0xe5, 0x1d, 0x1e, 0xc7,
+++	0x42, 0x45, 0x07, 0x72, 0x0d, 0xc5, 0x21, 0x9d,
+++	0x04, 0x4d, 0xea, 0x60, 0x88, 0x80, 0x41, 0x2b,
+++	0xfd, 0xff, 0xcf, 0x35, 0x57, 0x9e, 0x9b, 0x26
+++};
+++static const u8 enc_assoc097[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce097[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key097[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input098[] __initconst = {
+++	0x6d, 0x94, 0x28, 0xd0, 0x79, 0x35, 0x1f, 0x66,
+++	0x5c, 0xd0, 0x01, 0x35, 0x43, 0x19, 0x87, 0x5c,
+++	0xa1, 0x61, 0xb5, 0xab, 0x04, 0x09, 0x00, 0x62,
+++	0x9e, 0xfe, 0xff, 0x78, 0xd7, 0xd8, 0x6b, 0x45,
+++	0x9f, 0x7a, 0xed, 0x35, 0xcb, 0x5a, 0x2f, 0xca,
+++	0xa0, 0x34, 0x6e, 0xfb, 0x93, 0x65, 0x54, 0x64,
+++	0xc6, 0xf8, 0x07, 0x8c, 0xc8, 0xef, 0x12, 0xa0,
+++	0xff, 0x65, 0x7d, 0x6d, 0x08, 0xdb, 0x10, 0xb8,
+++	0x47, 0x2d, 0x90, 0x96, 0x52, 0x4f, 0xa1, 0xb2,
+++	0xb0, 0x23, 0xb8, 0xb2, 0x88, 0x22, 0x27, 0x73,
+++	0x8e, 0xdc, 0x36, 0x6c, 0xd6, 0x97, 0x65, 0x6f,
+++	0xca, 0x81, 0xfb, 0x13, 0x3c, 0xed, 0x79, 0xa1
+++};
+++static const u8 enc_output098[] __initconst = {
+++	0x6d, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x26, 0xa3, 0x7f, 0xa2, 0xe8, 0x10, 0x26, 0x94,
+++	0x5c, 0x39, 0xe9, 0xf2, 0xeb, 0xa8, 0x77, 0x02,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xa5, 0xf1, 0xcf, 0xf2, 0x46, 0xfa, 0x09, 0x66,
+++	0x6e, 0x3b, 0xdf, 0x50, 0xb7, 0xf5, 0x44, 0xb3,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xa5, 0xf1, 0xcf, 0xf2, 0x46, 0xfa, 0x09, 0x66,
+++	0x6e, 0x3b, 0xdf, 0x50, 0xb7, 0xf5, 0x44, 0xb3,
+++	0x1e, 0x6b, 0xea, 0x63, 0x14, 0x54, 0x2e, 0x2e,
+++	0xf9, 0xff, 0xcf, 0x45, 0x0b, 0x2e, 0x98, 0x2b
+++};
+++static const u8 enc_assoc098[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce098[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key098[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input099[] __initconst = {
+++	0xff, 0x94, 0x28, 0xd0, 0x79, 0x35, 0x1f, 0x66,
+++	0x5c, 0xd0, 0x01, 0x35, 0x43, 0x19, 0x87, 0x5c,
+++	0xfc, 0x01, 0xb8, 0x91, 0xe5, 0xf0, 0xf9, 0x12,
+++	0x8d, 0x7d, 0x1c, 0x57, 0x91, 0x92, 0xb6, 0x98,
+++	0x63, 0x41, 0x44, 0x15, 0xb6, 0x99, 0x68, 0x95,
+++	0x9a, 0x72, 0x91, 0xb7, 0xa5, 0xaf, 0x13, 0x48,
+++	0x60, 0xcd, 0x9e, 0xa1, 0x0c, 0x29, 0xa3, 0x66,
+++	0x54, 0xe7, 0xa2, 0x8e, 0x76, 0x1b, 0xec, 0xd8
+++};
+++static const u8 enc_output099[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x7b, 0xc3, 0x72, 0x98, 0x09, 0xe9, 0xdf, 0xe4,
+++	0x4f, 0xba, 0x0a, 0xdd, 0xad, 0xe2, 0xaa, 0xdf,
+++	0x03, 0xc4, 0x56, 0xdf, 0x82, 0x3c, 0xb8, 0xa0,
+++	0xc5, 0xb9, 0x00, 0xb3, 0xc9, 0x35, 0xb8, 0xd3,
+++	0x03, 0xc4, 0x56, 0xdf, 0x82, 0x3c, 0xb8, 0xa0,
+++	0xc5, 0xb9, 0x00, 0xb3, 0xc9, 0x35, 0xb8, 0xd3,
+++	0xed, 0x20, 0x17, 0xc8, 0xdb, 0xa4, 0x77, 0x56,
+++	0x29, 0x04, 0x9d, 0x78, 0x6e, 0x3b, 0xce, 0xb1
+++};
+++static const u8 enc_assoc099[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce099[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key099[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input100[] __initconst = {
+++	0xff, 0x94, 0x28, 0xd0, 0x79, 0x35, 0x1f, 0x66,
+++	0x5c, 0xd0, 0x01, 0x35, 0x43, 0x19, 0x87, 0x5c,
+++	0x6b, 0x6d, 0xc9, 0xd2, 0x1a, 0x81, 0x9e, 0x70,
+++	0xb5, 0x77, 0xf4, 0x41, 0x37, 0xd3, 0xd6, 0xbd,
+++	0x13, 0x35, 0xf5, 0xeb, 0x44, 0x49, 0x40, 0x77,
+++	0xb2, 0x64, 0x49, 0xa5, 0x4b, 0x6c, 0x7c, 0x75,
+++	0x10, 0xb9, 0x2f, 0x5f, 0xfe, 0xf9, 0x8b, 0x84,
+++	0x7c, 0xf1, 0x7a, 0x9c, 0x98, 0xd8, 0x83, 0xe5
+++};
+++static const u8 enc_output100[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xec, 0xaf, 0x03, 0xdb, 0xf6, 0x98, 0xb8, 0x86,
+++	0x77, 0xb0, 0xe2, 0xcb, 0x0b, 0xa3, 0xca, 0xfa,
+++	0x73, 0xb0, 0xe7, 0x21, 0x70, 0xec, 0x90, 0x42,
+++	0xed, 0xaf, 0xd8, 0xa1, 0x27, 0xf6, 0xd7, 0xee,
+++	0x73, 0xb0, 0xe7, 0x21, 0x70, 0xec, 0x90, 0x42,
+++	0xed, 0xaf, 0xd8, 0xa1, 0x27, 0xf6, 0xd7, 0xee,
+++	0x07, 0x3f, 0x17, 0xcb, 0x67, 0x78, 0x64, 0x59,
+++	0x25, 0x04, 0x9d, 0x88, 0x22, 0xcb, 0xca, 0xb6
+++};
+++static const u8 enc_assoc100[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce100[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key100[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input101[] __initconst = {
+++	0xff, 0xcb, 0x2b, 0x11, 0x06, 0xf8, 0x23, 0x4c,
+++	0x5e, 0x99, 0xd4, 0xdb, 0x4c, 0x70, 0x48, 0xde,
+++	0x32, 0x3d, 0x35, 0xf6, 0x13, 0xe6, 0xd9, 0x09,
+++	0x3d, 0x38, 0xe9, 0x75, 0xc3, 0x8f, 0xe3, 0xb8,
+++	0x16, 0xe9, 0x88, 0x4a, 0x11, 0x4f, 0x0e, 0x92,
+++	0x66, 0xce, 0xa3, 0x88, 0x5f, 0xe3, 0x6b, 0x9f,
+++	0xd6, 0xf6, 0x37, 0x81, 0x71, 0xea, 0xe4, 0x39,
+++	0x6e, 0xa1, 0x5d, 0xc2, 0x40, 0xd1, 0xab, 0xf4,
+++	0xce, 0xbe, 0xf5, 0xe9, 0x88, 0x5a, 0x80, 0xea,
+++	0x76, 0xd9, 0x75, 0xc1, 0x44, 0xa4, 0x18, 0x88
+++};
+++static const u8 enc_output101[] __initconst = {
+++	0xff, 0xa0, 0xfc, 0x3e, 0x80, 0x32, 0xc3, 0xd5,
+++	0xfd, 0xb6, 0x2a, 0x11, 0xf0, 0x96, 0x30, 0x7d,
+++	0xb5, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x76, 0x6c, 0x9a, 0x80, 0x25, 0xea, 0xde, 0xa7,
+++	0x39, 0x05, 0x32, 0x8c, 0x33, 0x79, 0xc0, 0x04,
+++	0xb5, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x76, 0x6c, 0x9a, 0x80, 0x25, 0xea, 0xde, 0xa7,
+++	0x39, 0x05, 0x32, 0x8c, 0x33, 0x79, 0xc0, 0x04,
+++	0x8b, 0x9b, 0xb4, 0xb4, 0x86, 0x12, 0x89, 0x65,
+++	0x8c, 0x69, 0x6a, 0x83, 0x40, 0x15, 0x04, 0x05
+++};
+++static const u8 enc_assoc101[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce101[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key101[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input102[] __initconst = {
+++	0x6f, 0x9e, 0x70, 0xed, 0x3b, 0x8b, 0xac, 0xa0,
+++	0x26, 0xe4, 0x6a, 0x5a, 0x09, 0x43, 0x15, 0x8d,
+++	0x21, 0x3d, 0x35, 0xf6, 0x13, 0xe6, 0xd9, 0x09,
+++	0x3d, 0x38, 0xe9, 0x75, 0xc3, 0x8f, 0xe3, 0xb8,
+++	0x0c, 0x61, 0x2c, 0x5e, 0x8d, 0x89, 0xa8, 0x73,
+++	0xdb, 0xca, 0xad, 0x5b, 0x73, 0x46, 0x42, 0x9b,
+++	0xc5, 0xf6, 0x37, 0x81, 0x71, 0xea, 0xe4, 0x39,
+++	0x6e, 0xa1, 0x5d, 0xc2, 0x40, 0xd1, 0xab, 0xf4,
+++	0xd4, 0x36, 0x51, 0xfd, 0x14, 0x9c, 0x26, 0x0b,
+++	0xcb, 0xdd, 0x7b, 0x12, 0x68, 0x01, 0x31, 0x8c
+++};
+++static const u8 enc_output102[] __initconst = {
+++	0x6f, 0xf5, 0xa7, 0xc2, 0xbd, 0x41, 0x4c, 0x39,
+++	0x85, 0xcb, 0x94, 0x90, 0xb5, 0xa5, 0x6d, 0x2e,
+++	0xa6, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x6c, 0xe4, 0x3e, 0x94, 0xb9, 0x2c, 0x78, 0x46,
+++	0x84, 0x01, 0x3c, 0x5f, 0x1f, 0xdc, 0xe9, 0x00,
+++	0xa6, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x6c, 0xe4, 0x3e, 0x94, 0xb9, 0x2c, 0x78, 0x46,
+++	0x84, 0x01, 0x3c, 0x5f, 0x1f, 0xdc, 0xe9, 0x00,
+++	0x8b, 0x3b, 0xbd, 0x51, 0x64, 0x44, 0x59, 0x56,
+++	0x8d, 0x81, 0xca, 0x1f, 0xa7, 0x2c, 0xe4, 0x04
+++};
+++static const u8 enc_assoc102[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce102[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key102[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input103[] __initconst = {
+++	0x41, 0x2b, 0x08, 0x0a, 0x3e, 0x19, 0xc1, 0x0d,
+++	0x44, 0xa1, 0xaf, 0x1e, 0xab, 0xde, 0xb4, 0xce,
+++	0x35, 0x3d, 0x35, 0xf6, 0x13, 0xe6, 0xd9, 0x09,
+++	0x3d, 0x38, 0xe9, 0x75, 0xc3, 0x8f, 0xe3, 0xb8,
+++	0x6b, 0x83, 0x94, 0x33, 0x09, 0x21, 0x48, 0x6c,
+++	0xa1, 0x1d, 0x29, 0x1c, 0x3e, 0x97, 0xee, 0x9a,
+++	0xd1, 0xf6, 0x37, 0x81, 0x71, 0xea, 0xe4, 0x39,
+++	0x6e, 0xa1, 0x5d, 0xc2, 0x40, 0xd1, 0xab, 0xf4,
+++	0xb3, 0xd4, 0xe9, 0x90, 0x90, 0x34, 0xc6, 0x14,
+++	0xb1, 0x0a, 0xff, 0x55, 0x25, 0xd0, 0x9d, 0x8d
+++};
+++static const u8 enc_output103[] __initconst = {
+++	0x41, 0x40, 0xdf, 0x25, 0xb8, 0xd3, 0x21, 0x94,
+++	0xe7, 0x8e, 0x51, 0xd4, 0x17, 0x38, 0xcc, 0x6d,
+++	0xb2, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x0b, 0x06, 0x86, 0xf9, 0x3d, 0x84, 0x98, 0x59,
+++	0xfe, 0xd6, 0xb8, 0x18, 0x52, 0x0d, 0x45, 0x01,
+++	0xb2, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x0b, 0x06, 0x86, 0xf9, 0x3d, 0x84, 0x98, 0x59,
+++	0xfe, 0xd6, 0xb8, 0x18, 0x52, 0x0d, 0x45, 0x01,
+++	0x86, 0xfb, 0xab, 0x2b, 0x4a, 0x94, 0xf4, 0x7a,
+++	0xa5, 0x6f, 0x0a, 0xea, 0x65, 0xd1, 0x10, 0x08
+++};
+++static const u8 enc_assoc103[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce103[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key103[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input104[] __initconst = {
+++	0xb2, 0x47, 0xa7, 0x47, 0x23, 0x49, 0x1a, 0xac,
+++	0xac, 0xaa, 0xd7, 0x09, 0xc9, 0x1e, 0x93, 0x2b,
+++	0x31, 0x3d, 0x35, 0xf6, 0x13, 0xe6, 0xd9, 0x09,
+++	0x3d, 0x38, 0xe9, 0x75, 0xc3, 0x8f, 0xe3, 0xb8,
+++	0x9a, 0xde, 0x04, 0xe7, 0x5b, 0xb7, 0x01, 0xd9,
+++	0x66, 0x06, 0x01, 0xb3, 0x47, 0x65, 0xde, 0x98,
+++	0xd5, 0xf6, 0x37, 0x81, 0x71, 0xea, 0xe4, 0x39,
+++	0x6e, 0xa1, 0x5d, 0xc2, 0x40, 0xd1, 0xab, 0xf4,
+++	0x42, 0x89, 0x79, 0x44, 0xc2, 0xa2, 0x8f, 0xa1,
+++	0x76, 0x11, 0xd7, 0xfa, 0x5c, 0x22, 0xad, 0x8f
+++};
+++static const u8 enc_output104[] __initconst = {
+++	0xb2, 0x2c, 0x70, 0x68, 0xa5, 0x83, 0xfa, 0x35,
+++	0x0f, 0x85, 0x29, 0xc3, 0x75, 0xf8, 0xeb, 0x88,
+++	0xb6, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xfa, 0x5b, 0x16, 0x2d, 0x6f, 0x12, 0xd1, 0xec,
+++	0x39, 0xcd, 0x90, 0xb7, 0x2b, 0xff, 0x75, 0x03,
+++	0xb6, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xfa, 0x5b, 0x16, 0x2d, 0x6f, 0x12, 0xd1, 0xec,
+++	0x39, 0xcd, 0x90, 0xb7, 0x2b, 0xff, 0x75, 0x03,
+++	0xa0, 0x19, 0xac, 0x2e, 0xd6, 0x67, 0xe1, 0x7d,
+++	0xa1, 0x6f, 0x0a, 0xfa, 0x19, 0x61, 0x0d, 0x0d
+++};
+++static const u8 enc_assoc104[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce104[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key104[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input105[] __initconst = {
+++	0x74, 0x0f, 0x9e, 0x49, 0xf6, 0x10, 0xef, 0xa5,
+++	0x85, 0xb6, 0x59, 0xca, 0x6e, 0xd8, 0xb4, 0x99,
+++	0x2d, 0x3d, 0x35, 0xf6, 0x13, 0xe6, 0xd9, 0x09,
+++	0x3d, 0x38, 0xe9, 0x75, 0xc3, 0x8f, 0xe3, 0xb8,
+++	0x41, 0x2d, 0x96, 0xaf, 0xbe, 0x80, 0xec, 0x3e,
+++	0x79, 0xd4, 0x51, 0xb0, 0x0a, 0x2d, 0xb2, 0x9a,
+++	0xc9, 0xf6, 0x37, 0x81, 0x71, 0xea, 0xe4, 0x39,
+++	0x6e, 0xa1, 0x5d, 0xc2, 0x40, 0xd1, 0xab, 0xf4,
+++	0x99, 0x7a, 0xeb, 0x0c, 0x27, 0x95, 0x62, 0x46,
+++	0x69, 0xc3, 0x87, 0xf9, 0x11, 0x6a, 0xc1, 0x8d
+++};
+++static const u8 enc_output105[] __initconst = {
+++	0x74, 0x64, 0x49, 0x66, 0x70, 0xda, 0x0f, 0x3c,
+++	0x26, 0x99, 0xa7, 0x00, 0xd2, 0x3e, 0xcc, 0x3a,
+++	0xaa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x21, 0xa8, 0x84, 0x65, 0x8a, 0x25, 0x3c, 0x0b,
+++	0x26, 0x1f, 0xc0, 0xb4, 0x66, 0xb7, 0x19, 0x01,
+++	0xaa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x21, 0xa8, 0x84, 0x65, 0x8a, 0x25, 0x3c, 0x0b,
+++	0x26, 0x1f, 0xc0, 0xb4, 0x66, 0xb7, 0x19, 0x01,
+++	0x73, 0x6e, 0x18, 0x18, 0x16, 0x96, 0xa5, 0x88,
+++	0x9c, 0x31, 0x59, 0xfa, 0xab, 0xab, 0x20, 0xfd
+++};
+++static const u8 enc_assoc105[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce105[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key105[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input106[] __initconst = {
+++	0xad, 0xba, 0x5d, 0x10, 0x5b, 0xc8, 0xaa, 0x06,
+++	0x2c, 0x23, 0x36, 0xcb, 0x88, 0x9d, 0xdb, 0xd5,
+++	0x37, 0x3d, 0x35, 0xf6, 0x13, 0xe6, 0xd9, 0x09,
+++	0x3d, 0x38, 0xe9, 0x75, 0xc3, 0x8f, 0xe3, 0xb8,
+++	0x17, 0x7c, 0x5f, 0xfe, 0x28, 0x75, 0xf4, 0x68,
+++	0xf6, 0xc2, 0x96, 0x57, 0x48, 0xf3, 0x59, 0x9a,
+++	0xd3, 0xf6, 0x37, 0x81, 0x71, 0xea, 0xe4, 0x39,
+++	0x6e, 0xa1, 0x5d, 0xc2, 0x40, 0xd1, 0xab, 0xf4,
+++	0xcf, 0x2b, 0x22, 0x5d, 0xb1, 0x60, 0x7a, 0x10,
+++	0xe6, 0xd5, 0x40, 0x1e, 0x53, 0xb4, 0x2a, 0x8d
+++};
+++static const u8 enc_output106[] __initconst = {
+++	0xad, 0xd1, 0x8a, 0x3f, 0xdd, 0x02, 0x4a, 0x9f,
+++	0x8f, 0x0c, 0xc8, 0x01, 0x34, 0x7b, 0xa3, 0x76,
+++	0xb0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x77, 0xf9, 0x4d, 0x34, 0x1c, 0xd0, 0x24, 0x5d,
+++	0xa9, 0x09, 0x07, 0x53, 0x24, 0x69, 0xf2, 0x01,
+++	0xb0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x77, 0xf9, 0x4d, 0x34, 0x1c, 0xd0, 0x24, 0x5d,
+++	0xa9, 0x09, 0x07, 0x53, 0x24, 0x69, 0xf2, 0x01,
+++	0xba, 0xd5, 0x8f, 0x10, 0xa9, 0x1e, 0x6a, 0x88,
+++	0x9a, 0xba, 0x32, 0xfd, 0x17, 0xd8, 0x33, 0x1a
+++};
+++static const u8 enc_assoc106[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce106[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key106[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input107[] __initconst = {
+++	0xfe, 0x94, 0x28, 0xd0, 0x79, 0x35, 0x1f, 0x66,
+++	0x5c, 0xd0, 0x01, 0x35, 0x43, 0x19, 0x87, 0x5c,
+++	0xc0, 0x01, 0xed, 0xc5, 0xda, 0x44, 0x2e, 0x71,
+++	0x9b, 0xce, 0x9a, 0xbe, 0x27, 0x3a, 0xf1, 0x44,
+++	0xb4, 0x7a, 0xed, 0x35, 0xcb, 0x5a, 0x2f, 0xca,
+++	0xa0, 0x34, 0x6e, 0xfb, 0x93, 0x65, 0x54, 0x64,
+++	0x48, 0x02, 0x5f, 0x41, 0xfa, 0x4e, 0x33, 0x6c,
+++	0x78, 0x69, 0x57, 0xa2, 0xa7, 0xc4, 0x93, 0x0a,
+++	0x6c, 0x2d, 0x90, 0x96, 0x52, 0x4f, 0xa1, 0xb2,
+++	0xb0, 0x23, 0xb8, 0xb2, 0x88, 0x22, 0x27, 0x73,
+++	0x00, 0x26, 0x6e, 0xa1, 0xe4, 0x36, 0x44, 0xa3,
+++	0x4d, 0x8d, 0xd1, 0xdc, 0x93, 0xf2, 0xfa, 0x13
+++};
+++static const u8 enc_output107[] __initconst = {
+++	0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x47, 0xc3, 0x27, 0xcc, 0x36, 0x5d, 0x08, 0x87,
+++	0x59, 0x09, 0x8c, 0x34, 0x1b, 0x4a, 0xed, 0x03,
+++	0xd4, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x2b, 0x0b, 0x97, 0x3f, 0x74, 0x5b, 0x28, 0xaa,
+++	0xe9, 0x37, 0xf5, 0x9f, 0x18, 0xea, 0xc7, 0x01,
+++	0xd4, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x2b, 0x0b, 0x97, 0x3f, 0x74, 0x5b, 0x28, 0xaa,
+++	0xe9, 0x37, 0xf5, 0x9f, 0x18, 0xea, 0xc7, 0x01,
+++	0xd6, 0x8c, 0xe1, 0x74, 0x07, 0x9a, 0xdd, 0x02,
+++	0x8d, 0xd0, 0x5c, 0xf8, 0x14, 0x63, 0x04, 0x88
+++};
+++static const u8 enc_assoc107[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce107[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key107[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input108[] __initconst = {
+++	0xb5, 0x13, 0xb0, 0x6a, 0xb9, 0xac, 0x14, 0x43,
+++	0x5a, 0xcb, 0x8a, 0xa3, 0xa3, 0x7a, 0xfd, 0xb6,
+++	0x54, 0x3d, 0x35, 0xf6, 0x13, 0xe6, 0xd9, 0x09,
+++	0x3d, 0x38, 0xe9, 0x75, 0xc3, 0x8f, 0xe3, 0xb8,
+++	0x61, 0x95, 0x01, 0x93, 0xb1, 0xbf, 0x03, 0x11,
+++	0xff, 0x11, 0x79, 0x89, 0xae, 0xd9, 0xa9, 0x99,
+++	0xb0, 0xf6, 0x37, 0x81, 0x71, 0xea, 0xe4, 0x39,
+++	0x6e, 0xa1, 0x5d, 0xc2, 0x40, 0xd1, 0xab, 0xf4,
+++	0xb9, 0xc2, 0x7c, 0x30, 0x28, 0xaa, 0x8d, 0x69,
+++	0xef, 0x06, 0xaf, 0xc0, 0xb5, 0x9e, 0xda, 0x8e
+++};
+++static const u8 enc_output108[] __initconst = {
+++	0xb5, 0x78, 0x67, 0x45, 0x3f, 0x66, 0xf4, 0xda,
+++	0xf9, 0xe4, 0x74, 0x69, 0x1f, 0x9c, 0x85, 0x15,
+++	0xd3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x01, 0x10, 0x13, 0x59, 0x85, 0x1a, 0xd3, 0x24,
+++	0xa0, 0xda, 0xe8, 0x8d, 0xc2, 0x43, 0x02, 0x02,
+++	0xd3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x01, 0x10, 0x13, 0x59, 0x85, 0x1a, 0xd3, 0x24,
+++	0xa0, 0xda, 0xe8, 0x8d, 0xc2, 0x43, 0x02, 0x02,
+++	0xaa, 0x48, 0xa3, 0x88, 0x7d, 0x4b, 0x05, 0x96,
+++	0x99, 0xc2, 0xfd, 0xf9, 0xc6, 0x78, 0x7e, 0x0a
+++};
+++static const u8 enc_assoc108[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce108[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key108[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input109[] __initconst = {
+++	0xff, 0x94, 0x28, 0xd0, 0x79, 0x35, 0x1f, 0x66,
+++	0x5c, 0xd0, 0x01, 0x35, 0x43, 0x19, 0x87, 0x5c,
+++	0xd4, 0xf1, 0x09, 0xe8, 0x14, 0xce, 0xa8, 0x5a,
+++	0x08, 0xc0, 0x11, 0xd8, 0x50, 0xdd, 0x1d, 0xcb,
+++	0xcf, 0x7a, 0xed, 0x35, 0xcb, 0x5a, 0x2f, 0xca,
+++	0xa0, 0x34, 0x6e, 0xfb, 0x93, 0x65, 0x54, 0x64,
+++	0x53, 0x40, 0xb8, 0x5a, 0x9a, 0xa0, 0x82, 0x96,
+++	0xb7, 0x7a, 0x5f, 0xc3, 0x96, 0x1f, 0x66, 0x0f,
+++	0x17, 0x2d, 0x90, 0x96, 0x52, 0x4f, 0xa1, 0xb2,
+++	0xb0, 0x23, 0xb8, 0xb2, 0x88, 0x22, 0x27, 0x73,
+++	0x1b, 0x64, 0x89, 0xba, 0x84, 0xd8, 0xf5, 0x59,
+++	0x82, 0x9e, 0xd9, 0xbd, 0xa2, 0x29, 0x0f, 0x16
+++};
+++static const u8 enc_output109[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x53, 0x33, 0xc3, 0xe1, 0xf8, 0xd7, 0x8e, 0xac,
+++	0xca, 0x07, 0x07, 0x52, 0x6c, 0xad, 0x01, 0x8c,
+++	0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x30, 0x49, 0x70, 0x24, 0x14, 0xb5, 0x99, 0x50,
+++	0x26, 0x24, 0xfd, 0xfe, 0x29, 0x31, 0x32, 0x04,
+++	0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x30, 0x49, 0x70, 0x24, 0x14, 0xb5, 0x99, 0x50,
+++	0x26, 0x24, 0xfd, 0xfe, 0x29, 0x31, 0x32, 0x04,
+++	0xb9, 0x36, 0xa8, 0x17, 0xf2, 0x21, 0x1a, 0xf1,
+++	0x29, 0xe2, 0xcf, 0x16, 0x0f, 0xd4, 0x2b, 0xcb
+++};
+++static const u8 enc_assoc109[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce109[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key109[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input110[] __initconst = {
+++	0xff, 0x94, 0x28, 0xd0, 0x79, 0x35, 0x1f, 0x66,
+++	0x5c, 0xd0, 0x01, 0x35, 0x43, 0x19, 0x87, 0x5c,
+++	0xdf, 0x4c, 0x62, 0x03, 0x2d, 0x41, 0x19, 0xb5,
+++	0x88, 0x47, 0x7e, 0x99, 0x92, 0x5a, 0x56, 0xd9,
+++	0xd6, 0x7a, 0xed, 0x35, 0xcb, 0x5a, 0x2f, 0xca,
+++	0xa0, 0x34, 0x6e, 0xfb, 0x93, 0x65, 0x54, 0x64,
+++	0xfa, 0x84, 0xf0, 0x64, 0x55, 0x36, 0x42, 0x1b,
+++	0x2b, 0xb9, 0x24, 0x6e, 0xc2, 0x19, 0xed, 0x0b,
+++	0x0e, 0x2d, 0x90, 0x96, 0x52, 0x4f, 0xa1, 0xb2,
+++	0xb0, 0x23, 0xb8, 0xb2, 0x88, 0x22, 0x27, 0x73,
+++	0xb2, 0xa0, 0xc1, 0x84, 0x4b, 0x4e, 0x35, 0xd4,
+++	0x1e, 0x5d, 0xa2, 0x10, 0xf6, 0x2f, 0x84, 0x12
+++};
+++static const u8 enc_output110[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x58, 0x8e, 0xa8, 0x0a, 0xc1, 0x58, 0x3f, 0x43,
+++	0x4a, 0x80, 0x68, 0x13, 0xae, 0x2a, 0x4a, 0x9e,
+++	0xb6, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x99, 0x8d, 0x38, 0x1a, 0xdb, 0x23, 0x59, 0xdd,
+++	0xba, 0xe7, 0x86, 0x53, 0x7d, 0x37, 0xb9, 0x00,
+++	0xb6, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x99, 0x8d, 0x38, 0x1a, 0xdb, 0x23, 0x59, 0xdd,
+++	0xba, 0xe7, 0x86, 0x53, 0x7d, 0x37, 0xb9, 0x00,
+++	0x9f, 0x7a, 0xc4, 0x35, 0x1f, 0x6b, 0x91, 0xe6,
+++	0x30, 0x97, 0xa7, 0x13, 0x11, 0x5d, 0x05, 0xbe
+++};
+++static const u8 enc_assoc110[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce110[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key110[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input111[] __initconst = {
+++	0xff, 0x94, 0x28, 0xd0, 0x79, 0x35, 0x1f, 0x66,
+++	0x5c, 0xd0, 0x01, 0x35, 0x43, 0x19, 0x87, 0x5c,
+++	0x13, 0xf8, 0x0a, 0x00, 0x6d, 0xc1, 0xbb, 0xda,
+++	0xd6, 0x39, 0xa9, 0x2f, 0xc7, 0xec, 0xa6, 0x55,
+++	0xf7, 0x7a, 0xed, 0x35, 0xcb, 0x5a, 0x2f, 0xca,
+++	0xa0, 0x34, 0x6e, 0xfb, 0x93, 0x65, 0x54, 0x64,
+++	0x63, 0x48, 0xb8, 0xfd, 0x29, 0xbf, 0x96, 0xd5,
+++	0x63, 0xa5, 0x17, 0xe2, 0x7d, 0x7b, 0xfc, 0x0f,
+++	0x2f, 0x2d, 0x90, 0x96, 0x52, 0x4f, 0xa1, 0xb2,
+++	0xb0, 0x23, 0xb8, 0xb2, 0x88, 0x22, 0x27, 0x73,
+++	0x2b, 0x6c, 0x89, 0x1d, 0x37, 0xc7, 0xe1, 0x1a,
+++	0x56, 0x41, 0x91, 0x9c, 0x49, 0x4d, 0x95, 0x16
+++};
+++static const u8 enc_output111[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x94, 0x3a, 0xc0, 0x09, 0x81, 0xd8, 0x9d, 0x2c,
+++	0x14, 0xfe, 0xbf, 0xa5, 0xfb, 0x9c, 0xba, 0x12,
+++	0x97, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x41, 0x70, 0x83, 0xa7, 0xaa, 0x8d, 0x13,
+++	0xf2, 0xfb, 0xb5, 0xdf, 0xc2, 0x55, 0xa8, 0x04,
+++	0x97, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x41, 0x70, 0x83, 0xa7, 0xaa, 0x8d, 0x13,
+++	0xf2, 0xfb, 0xb5, 0xdf, 0xc2, 0x55, 0xa8, 0x04,
+++	0x9a, 0x18, 0xa8, 0x28, 0x07, 0x02, 0x69, 0xf4,
+++	0x47, 0x00, 0xd0, 0x09, 0xe7, 0x17, 0x1c, 0xc9
+++};
+++static const u8 enc_assoc111[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce111[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key111[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input112[] __initconst = {
+++	0xff, 0x94, 0x28, 0xd0, 0x79, 0x35, 0x1f, 0x66,
+++	0x5c, 0xd0, 0x01, 0x35, 0x43, 0x19, 0x87, 0x5c,
+++	0x82, 0xe5, 0x9b, 0x45, 0x82, 0x91, 0x50, 0x38,
+++	0xf9, 0x33, 0x81, 0x1e, 0x65, 0x2d, 0xc6, 0x6a,
+++	0xfc, 0x7a, 0xed, 0x35, 0xcb, 0x5a, 0x2f, 0xca,
+++	0xa0, 0x34, 0x6e, 0xfb, 0x93, 0x65, 0x54, 0x64,
+++	0xb6, 0x71, 0xc8, 0xca, 0xc2, 0x70, 0xc2, 0x65,
+++	0xa0, 0xac, 0x2f, 0x53, 0x57, 0x99, 0x88, 0x0a,
+++	0x24, 0x2d, 0x90, 0x96, 0x52, 0x4f, 0xa1, 0xb2,
+++	0xb0, 0x23, 0xb8, 0xb2, 0x88, 0x22, 0x27, 0x73,
+++	0xfe, 0x55, 0xf9, 0x2a, 0xdc, 0x08, 0xb5, 0xaa,
+++	0x95, 0x48, 0xa9, 0x2d, 0x63, 0xaf, 0xe1, 0x13
+++};
+++static const u8 enc_output112[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x05, 0x27, 0x51, 0x4c, 0x6e, 0x88, 0x76, 0xce,
+++	0x3b, 0xf4, 0x97, 0x94, 0x59, 0x5d, 0xda, 0x2d,
+++	0x9c, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xd5, 0x78, 0x00, 0xb4, 0x4c, 0x65, 0xd9, 0xa3,
+++	0x31, 0xf2, 0x8d, 0x6e, 0xe8, 0xb7, 0xdc, 0x01,
+++	0x9c, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xd5, 0x78, 0x00, 0xb4, 0x4c, 0x65, 0xd9, 0xa3,
+++	0x31, 0xf2, 0x8d, 0x6e, 0xe8, 0xb7, 0xdc, 0x01,
+++	0xb4, 0x36, 0xa8, 0x2b, 0x93, 0xd5, 0x55, 0xf7,
+++	0x43, 0x00, 0xd0, 0x19, 0x9b, 0xa7, 0x18, 0xce
+++};
+++static const u8 enc_assoc112[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce112[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key112[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input113[] __initconst = {
+++	0xff, 0x94, 0x28, 0xd0, 0x79, 0x35, 0x1f, 0x66,
+++	0x5c, 0xd0, 0x01, 0x35, 0x43, 0x19, 0x87, 0x5c,
+++	0xf1, 0xd1, 0x28, 0x87, 0xb7, 0x21, 0x69, 0x86,
+++	0xa1, 0x2d, 0x79, 0x09, 0x8b, 0x6d, 0xe6, 0x0f,
+++	0xc0, 0x7a, 0xed, 0x35, 0xcb, 0x5a, 0x2f, 0xca,
+++	0xa0, 0x34, 0x6e, 0xfb, 0x93, 0x65, 0x54, 0x64,
+++	0xa7, 0xc7, 0x58, 0x99, 0xf3, 0xe6, 0x0a, 0xf1,
+++	0xfc, 0xb6, 0xc7, 0x30, 0x7d, 0x87, 0x59, 0x0f,
+++	0x18, 0x2d, 0x90, 0x96, 0x52, 0x4f, 0xa1, 0xb2,
+++	0xb0, 0x23, 0xb8, 0xb2, 0x88, 0x22, 0x27, 0x73,
+++	0xef, 0xe3, 0x69, 0x79, 0xed, 0x9e, 0x7d, 0x3e,
+++	0xc9, 0x52, 0x41, 0x4e, 0x49, 0xb1, 0x30, 0x16
+++};
+++static const u8 enc_output113[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x76, 0x13, 0xe2, 0x8e, 0x5b, 0x38, 0x4f, 0x70,
+++	0x63, 0xea, 0x6f, 0x83, 0xb7, 0x1d, 0xfa, 0x48,
+++	0xa0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xc4, 0xce, 0x90, 0xe7, 0x7d, 0xf3, 0x11, 0x37,
+++	0x6d, 0xe8, 0x65, 0x0d, 0xc2, 0xa9, 0x0d, 0x04,
+++	0xa0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xc4, 0xce, 0x90, 0xe7, 0x7d, 0xf3, 0x11, 0x37,
+++	0x6d, 0xe8, 0x65, 0x0d, 0xc2, 0xa9, 0x0d, 0x04,
+++	0xce, 0x54, 0xa8, 0x2e, 0x1f, 0xa9, 0x42, 0xfa,
+++	0x3f, 0x00, 0xd0, 0x29, 0x4f, 0x37, 0x15, 0xd3
+++};
+++static const u8 enc_assoc113[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce113[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key113[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input114[] __initconst = {
+++	0xcb, 0xf1, 0xda, 0x9e, 0x0b, 0xa9, 0x37, 0x73,
+++	0x74, 0xe6, 0x9e, 0x1c, 0x0e, 0x60, 0x0c, 0xfc,
+++	0x34, 0x3d, 0x35, 0xf6, 0x13, 0xe6, 0xd9, 0x09,
+++	0x3d, 0x38, 0xe9, 0x75, 0xc3, 0x8f, 0xe3, 0xb8,
+++	0xbe, 0x3f, 0xa6, 0x6b, 0x6c, 0xe7, 0x80, 0x8a,
+++	0xa3, 0xe4, 0x59, 0x49, 0xf9, 0x44, 0x64, 0x9f,
+++	0xd0, 0xf6, 0x37, 0x81, 0x71, 0xea, 0xe4, 0x39,
+++	0x6e, 0xa1, 0x5d, 0xc2, 0x40, 0xd1, 0xab, 0xf4,
+++	0x66, 0x68, 0xdb, 0xc8, 0xf5, 0xf2, 0x0e, 0xf2,
+++	0xb3, 0xf3, 0x8f, 0x00, 0xe2, 0x03, 0x17, 0x88
+++};
+++static const u8 enc_output114[] __initconst = {
+++	0xcb, 0x9a, 0x0d, 0xb1, 0x8d, 0x63, 0xd7, 0xea,
+++	0xd7, 0xc9, 0x60, 0xd6, 0xb2, 0x86, 0x74, 0x5f,
+++	0xb3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xde, 0xba, 0xb4, 0xa1, 0x58, 0x42, 0x50, 0xbf,
+++	0xfc, 0x2f, 0xc8, 0x4d, 0x95, 0xde, 0xcf, 0x04,
+++	0xb3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xde, 0xba, 0xb4, 0xa1, 0x58, 0x42, 0x50, 0xbf,
+++	0xfc, 0x2f, 0xc8, 0x4d, 0x95, 0xde, 0xcf, 0x04,
+++	0x23, 0x83, 0xab, 0x0b, 0x79, 0x92, 0x05, 0x69,
+++	0x9b, 0x51, 0x0a, 0xa7, 0x09, 0xbf, 0x31, 0xf1
+++};
+++static const u8 enc_assoc114[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce114[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key114[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input115[] __initconst = {
+++	0x8f, 0x27, 0x86, 0x94, 0xc4, 0xe9, 0xda, 0xeb,
+++	0xd5, 0x8d, 0x3e, 0x5b, 0x96, 0x6e, 0x8b, 0x68,
+++	0x42, 0x3d, 0x35, 0xf6, 0x13, 0xe6, 0xd9, 0x09,
+++	0x3d, 0x38, 0xe9, 0x75, 0xc3, 0x8f, 0xe3, 0xb8,
+++	0x06, 0x53, 0xe7, 0xa3, 0x31, 0x71, 0x88, 0x33,
+++	0xac, 0xc3, 0xb9, 0xad, 0xff, 0x1c, 0x31, 0x98,
+++	0xa6, 0xf6, 0x37, 0x81, 0x71, 0xea, 0xe4, 0x39,
+++	0x6e, 0xa1, 0x5d, 0xc2, 0x40, 0xd1, 0xab, 0xf4,
+++	0xde, 0x04, 0x9a, 0x00, 0xa8, 0x64, 0x06, 0x4b,
+++	0xbc, 0xd4, 0x6f, 0xe4, 0xe4, 0x5b, 0x42, 0x8f
+++};
+++static const u8 enc_output115[] __initconst = {
+++	0x8f, 0x4c, 0x51, 0xbb, 0x42, 0x23, 0x3a, 0x72,
+++	0x76, 0xa2, 0xc0, 0x91, 0x2a, 0x88, 0xf3, 0xcb,
+++	0xc5, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x66, 0xd6, 0xf5, 0x69, 0x05, 0xd4, 0x58, 0x06,
+++	0xf3, 0x08, 0x28, 0xa9, 0x93, 0x86, 0x9a, 0x03,
+++	0xc5, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x66, 0xd6, 0xf5, 0x69, 0x05, 0xd4, 0x58, 0x06,
+++	0xf3, 0x08, 0x28, 0xa9, 0x93, 0x86, 0x9a, 0x03,
+++	0x8b, 0xfb, 0xab, 0x17, 0xa9, 0xe0, 0xb8, 0x74,
+++	0x8b, 0x51, 0x0a, 0xe7, 0xd9, 0xfd, 0x23, 0x05
+++};
+++static const u8 enc_assoc115[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce115[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key115[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input116[] __initconst = {
+++	0xd5, 0x94, 0x28, 0xd0, 0x79, 0x35, 0x1f, 0x66,
+++	0x5c, 0xd0, 0x01, 0x35, 0x43, 0x19, 0x87, 0x5c,
+++	0x9a, 0x22, 0xd7, 0x0a, 0x48, 0xe2, 0x4f, 0xdd,
+++	0xcd, 0xd4, 0x41, 0x9d, 0xe6, 0x4c, 0x8f, 0x44,
+++	0xfc, 0x7a, 0xed, 0x35, 0xcb, 0x5a, 0x2f, 0xca,
+++	0xa0, 0x34, 0x6e, 0xfb, 0x93, 0x65, 0x54, 0x64,
+++	0x77, 0xb5, 0xc9, 0x07, 0xd9, 0xc9, 0xe1, 0xea,
+++	0x51, 0x85, 0x1a, 0x20, 0x4a, 0xad, 0x9f, 0x0a,
+++	0x24, 0x2d, 0x90, 0x96, 0x52, 0x4f, 0xa1, 0xb2,
+++	0xb0, 0x23, 0xb8, 0xb2, 0x88, 0x22, 0x27, 0x73,
+++	0x3f, 0x91, 0xf8, 0xe7, 0xc7, 0xb1, 0x96, 0x25,
+++	0x64, 0x61, 0x9c, 0x5e, 0x7e, 0x9b, 0xf6, 0x13
+++};
+++static const u8 enc_output116[] __initconst = {
+++	0xd5, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x1d, 0xe0, 0x1d, 0x03, 0xa4, 0xfb, 0x69, 0x2b,
+++	0x0f, 0x13, 0x57, 0x17, 0xda, 0x3c, 0x93, 0x03,
+++	0x9c, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x14, 0xbc, 0x01, 0x79, 0x57, 0xdc, 0xfa, 0x2c,
+++	0xc0, 0xdb, 0xb8, 0x1d, 0xf5, 0x83, 0xcb, 0x01,
+++	0x9c, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x14, 0xbc, 0x01, 0x79, 0x57, 0xdc, 0xfa, 0x2c,
+++	0xc0, 0xdb, 0xb8, 0x1d, 0xf5, 0x83, 0xcb, 0x01,
+++	0x49, 0xbc, 0x6e, 0x9f, 0xc5, 0x1c, 0x4d, 0x50,
+++	0x30, 0x36, 0x64, 0x4d, 0x84, 0x27, 0x73, 0xd2
+++};
+++static const u8 enc_assoc116[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce116[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key116[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input117[] __initconst = {
+++	0xdb, 0x94, 0x28, 0xd0, 0x79, 0x35, 0x1f, 0x66,
+++	0x5c, 0xd0, 0x01, 0x35, 0x43, 0x19, 0x87, 0x5c,
+++	0x75, 0xd5, 0x64, 0x3a, 0xa5, 0xaf, 0x93, 0x4d,
+++	0x8c, 0xce, 0x39, 0x2c, 0xc3, 0xee, 0xdb, 0x47,
+++	0xc0, 0x7a, 0xed, 0x35, 0xcb, 0x5a, 0x2f, 0xca,
+++	0xa0, 0x34, 0x6e, 0xfb, 0x93, 0x65, 0x54, 0x64,
+++	0x60, 0x1b, 0x5a, 0xd2, 0x06, 0x7f, 0x28, 0x06,
+++	0x6a, 0x8f, 0x32, 0x81, 0x71, 0x5b, 0xa8, 0x08,
+++	0x18, 0x2d, 0x90, 0x96, 0x52, 0x4f, 0xa1, 0xb2,
+++	0xb0, 0x23, 0xb8, 0xb2, 0x88, 0x22, 0x27, 0x73,
+++	0x28, 0x3f, 0x6b, 0x32, 0x18, 0x07, 0x5f, 0xc9,
+++	0x5f, 0x6b, 0xb4, 0xff, 0x45, 0x6d, 0xc1, 0x11
+++};
+++static const u8 enc_output117[] __initconst = {
+++	0xdb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xf2, 0x17, 0xae, 0x33, 0x49, 0xb6, 0xb5, 0xbb,
+++	0x4e, 0x09, 0x2f, 0xa6, 0xff, 0x9e, 0xc7, 0x00,
+++	0xa0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x03, 0x12, 0x92, 0xac, 0x88, 0x6a, 0x33, 0xc0,
+++	0xfb, 0xd1, 0x90, 0xbc, 0xce, 0x75, 0xfc, 0x03,
+++	0xa0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x03, 0x12, 0x92, 0xac, 0x88, 0x6a, 0x33, 0xc0,
+++	0xfb, 0xd1, 0x90, 0xbc, 0xce, 0x75, 0xfc, 0x03,
+++	0x63, 0xda, 0x6e, 0xa2, 0x51, 0xf0, 0x39, 0x53,
+++	0x2c, 0x36, 0x64, 0x5d, 0x38, 0xb7, 0x6f, 0xd7
+++};
+++static const u8 enc_assoc117[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce117[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key117[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - edge case intermediate sums in poly1305 */
+++static const u8 enc_input118[] __initconst = {
+++	0x93, 0x94, 0x28, 0xd0, 0x79, 0x35, 0x1f, 0x66,
+++	0x5c, 0xd0, 0x01, 0x35, 0x43, 0x19, 0x87, 0x5c,
+++	0x62, 0x48, 0x39, 0x60, 0x42, 0x16, 0xe4, 0x03,
+++	0xeb, 0xcc, 0x6a, 0xf5, 0x59, 0xec, 0x8b, 0x43,
+++	0x97, 0x7a, 0xed, 0x35, 0xcb, 0x5a, 0x2f, 0xca,
+++	0xa0, 0x34, 0x6e, 0xfb, 0x93, 0x65, 0x54, 0x64,
+++	0xd8, 0xc8, 0xc3, 0xfa, 0x1a, 0x9e, 0x47, 0x4a,
+++	0xbe, 0x52, 0xd0, 0x2c, 0x81, 0x87, 0xe9, 0x0f,
+++	0x4f, 0x2d, 0x90, 0x96, 0x52, 0x4f, 0xa1, 0xb2,
+++	0xb0, 0x23, 0xb8, 0xb2, 0x88, 0x22, 0x27, 0x73,
+++	0x90, 0xec, 0xf2, 0x1a, 0x04, 0xe6, 0x30, 0x85,
+++	0x8b, 0xb6, 0x56, 0x52, 0xb5, 0xb1, 0x80, 0x16
+++};
+++static const u8 enc_output118[] __initconst = {
+++	0x93, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xe5, 0x8a, 0xf3, 0x69, 0xae, 0x0f, 0xc2, 0xf5,
+++	0x29, 0x0b, 0x7c, 0x7f, 0x65, 0x9c, 0x97, 0x04,
+++	0xf7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xbb, 0xc1, 0x0b, 0x84, 0x94, 0x8b, 0x5c, 0x8c,
+++	0x2f, 0x0c, 0x72, 0x11, 0x3e, 0xa9, 0xbd, 0x04,
+++	0xf7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xbb, 0xc1, 0x0b, 0x84, 0x94, 0x8b, 0x5c, 0x8c,
+++	0x2f, 0x0c, 0x72, 0x11, 0x3e, 0xa9, 0xbd, 0x04,
+++	0x73, 0xeb, 0x27, 0x24, 0xb5, 0xc4, 0x05, 0xf0,
+++	0x4d, 0x00, 0xd0, 0xf1, 0x58, 0x40, 0xa1, 0xc1
+++};
+++static const u8 enc_assoc118[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce118[] __initconst = {
+++	0x00, 0x00, 0x00, 0x00, 0x06, 0x4c, 0x2d, 0x52
+++};
+++static const u8 enc_key118[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++static const struct chacha20poly1305_testvec
+++chacha20poly1305_enc_vectors[] __initconst = {
+++	{ enc_input001, enc_output001, enc_assoc001, enc_nonce001, enc_key001,
+++	  sizeof(enc_input001), sizeof(enc_assoc001), sizeof(enc_nonce001) },
+++	{ enc_input002, enc_output002, enc_assoc002, enc_nonce002, enc_key002,
+++	  sizeof(enc_input002), sizeof(enc_assoc002), sizeof(enc_nonce002) },
+++	{ enc_input003, enc_output003, enc_assoc003, enc_nonce003, enc_key003,
+++	  sizeof(enc_input003), sizeof(enc_assoc003), sizeof(enc_nonce003) },
+++	{ enc_input004, enc_output004, enc_assoc004, enc_nonce004, enc_key004,
+++	  sizeof(enc_input004), sizeof(enc_assoc004), sizeof(enc_nonce004) },
+++	{ enc_input005, enc_output005, enc_assoc005, enc_nonce005, enc_key005,
+++	  sizeof(enc_input005), sizeof(enc_assoc005), sizeof(enc_nonce005) },
+++	{ enc_input006, enc_output006, enc_assoc006, enc_nonce006, enc_key006,
+++	  sizeof(enc_input006), sizeof(enc_assoc006), sizeof(enc_nonce006) },
+++	{ enc_input007, enc_output007, enc_assoc007, enc_nonce007, enc_key007,
+++	  sizeof(enc_input007), sizeof(enc_assoc007), sizeof(enc_nonce007) },
+++	{ enc_input008, enc_output008, enc_assoc008, enc_nonce008, enc_key008,
+++	  sizeof(enc_input008), sizeof(enc_assoc008), sizeof(enc_nonce008) },
+++	{ enc_input009, enc_output009, enc_assoc009, enc_nonce009, enc_key009,
+++	  sizeof(enc_input009), sizeof(enc_assoc009), sizeof(enc_nonce009) },
+++	{ enc_input010, enc_output010, enc_assoc010, enc_nonce010, enc_key010,
+++	  sizeof(enc_input010), sizeof(enc_assoc010), sizeof(enc_nonce010) },
+++	{ enc_input011, enc_output011, enc_assoc011, enc_nonce011, enc_key011,
+++	  sizeof(enc_input011), sizeof(enc_assoc011), sizeof(enc_nonce011) },
+++	{ enc_input012, enc_output012, enc_assoc012, enc_nonce012, enc_key012,
+++	  sizeof(enc_input012), sizeof(enc_assoc012), sizeof(enc_nonce012) },
+++	{ enc_input053, enc_output053, enc_assoc053, enc_nonce053, enc_key053,
+++	  sizeof(enc_input053), sizeof(enc_assoc053), sizeof(enc_nonce053) },
+++	{ enc_input054, enc_output054, enc_assoc054, enc_nonce054, enc_key054,
+++	  sizeof(enc_input054), sizeof(enc_assoc054), sizeof(enc_nonce054) },
+++	{ enc_input055, enc_output055, enc_assoc055, enc_nonce055, enc_key055,
+++	  sizeof(enc_input055), sizeof(enc_assoc055), sizeof(enc_nonce055) },
+++	{ enc_input056, enc_output056, enc_assoc056, enc_nonce056, enc_key056,
+++	  sizeof(enc_input056), sizeof(enc_assoc056), sizeof(enc_nonce056) },
+++	{ enc_input057, enc_output057, enc_assoc057, enc_nonce057, enc_key057,
+++	  sizeof(enc_input057), sizeof(enc_assoc057), sizeof(enc_nonce057) },
+++	{ enc_input058, enc_output058, enc_assoc058, enc_nonce058, enc_key058,
+++	  sizeof(enc_input058), sizeof(enc_assoc058), sizeof(enc_nonce058) },
+++	{ enc_input059, enc_output059, enc_assoc059, enc_nonce059, enc_key059,
+++	  sizeof(enc_input059), sizeof(enc_assoc059), sizeof(enc_nonce059) },
+++	{ enc_input060, enc_output060, enc_assoc060, enc_nonce060, enc_key060,
+++	  sizeof(enc_input060), sizeof(enc_assoc060), sizeof(enc_nonce060) },
+++	{ enc_input061, enc_output061, enc_assoc061, enc_nonce061, enc_key061,
+++	  sizeof(enc_input061), sizeof(enc_assoc061), sizeof(enc_nonce061) },
+++	{ enc_input062, enc_output062, enc_assoc062, enc_nonce062, enc_key062,
+++	  sizeof(enc_input062), sizeof(enc_assoc062), sizeof(enc_nonce062) },
+++	{ enc_input063, enc_output063, enc_assoc063, enc_nonce063, enc_key063,
+++	  sizeof(enc_input063), sizeof(enc_assoc063), sizeof(enc_nonce063) },
+++	{ enc_input064, enc_output064, enc_assoc064, enc_nonce064, enc_key064,
+++	  sizeof(enc_input064), sizeof(enc_assoc064), sizeof(enc_nonce064) },
+++	{ enc_input065, enc_output065, enc_assoc065, enc_nonce065, enc_key065,
+++	  sizeof(enc_input065), sizeof(enc_assoc065), sizeof(enc_nonce065) },
+++	{ enc_input066, enc_output066, enc_assoc066, enc_nonce066, enc_key066,
+++	  sizeof(enc_input066), sizeof(enc_assoc066), sizeof(enc_nonce066) },
+++	{ enc_input067, enc_output067, enc_assoc067, enc_nonce067, enc_key067,
+++	  sizeof(enc_input067), sizeof(enc_assoc067), sizeof(enc_nonce067) },
+++	{ enc_input068, enc_output068, enc_assoc068, enc_nonce068, enc_key068,
+++	  sizeof(enc_input068), sizeof(enc_assoc068), sizeof(enc_nonce068) },
+++	{ enc_input069, enc_output069, enc_assoc069, enc_nonce069, enc_key069,
+++	  sizeof(enc_input069), sizeof(enc_assoc069), sizeof(enc_nonce069) },
+++	{ enc_input070, enc_output070, enc_assoc070, enc_nonce070, enc_key070,
+++	  sizeof(enc_input070), sizeof(enc_assoc070), sizeof(enc_nonce070) },
+++	{ enc_input071, enc_output071, enc_assoc071, enc_nonce071, enc_key071,
+++	  sizeof(enc_input071), sizeof(enc_assoc071), sizeof(enc_nonce071) },
+++	{ enc_input072, enc_output072, enc_assoc072, enc_nonce072, enc_key072,
+++	  sizeof(enc_input072), sizeof(enc_assoc072), sizeof(enc_nonce072) },
+++	{ enc_input073, enc_output073, enc_assoc073, enc_nonce073, enc_key073,
+++	  sizeof(enc_input073), sizeof(enc_assoc073), sizeof(enc_nonce073) },
+++	{ enc_input076, enc_output076, enc_assoc076, enc_nonce076, enc_key076,
+++	  sizeof(enc_input076), sizeof(enc_assoc076), sizeof(enc_nonce076) },
+++	{ enc_input077, enc_output077, enc_assoc077, enc_nonce077, enc_key077,
+++	  sizeof(enc_input077), sizeof(enc_assoc077), sizeof(enc_nonce077) },
+++	{ enc_input078, enc_output078, enc_assoc078, enc_nonce078, enc_key078,
+++	  sizeof(enc_input078), sizeof(enc_assoc078), sizeof(enc_nonce078) },
+++	{ enc_input079, enc_output079, enc_assoc079, enc_nonce079, enc_key079,
+++	  sizeof(enc_input079), sizeof(enc_assoc079), sizeof(enc_nonce079) },
+++	{ enc_input080, enc_output080, enc_assoc080, enc_nonce080, enc_key080,
+++	  sizeof(enc_input080), sizeof(enc_assoc080), sizeof(enc_nonce080) },
+++	{ enc_input081, enc_output081, enc_assoc081, enc_nonce081, enc_key081,
+++	  sizeof(enc_input081), sizeof(enc_assoc081), sizeof(enc_nonce081) },
+++	{ enc_input082, enc_output082, enc_assoc082, enc_nonce082, enc_key082,
+++	  sizeof(enc_input082), sizeof(enc_assoc082), sizeof(enc_nonce082) },
+++	{ enc_input083, enc_output083, enc_assoc083, enc_nonce083, enc_key083,
+++	  sizeof(enc_input083), sizeof(enc_assoc083), sizeof(enc_nonce083) },
+++	{ enc_input084, enc_output084, enc_assoc084, enc_nonce084, enc_key084,
+++	  sizeof(enc_input084), sizeof(enc_assoc084), sizeof(enc_nonce084) },
+++	{ enc_input085, enc_output085, enc_assoc085, enc_nonce085, enc_key085,
+++	  sizeof(enc_input085), sizeof(enc_assoc085), sizeof(enc_nonce085) },
+++	{ enc_input093, enc_output093, enc_assoc093, enc_nonce093, enc_key093,
+++	  sizeof(enc_input093), sizeof(enc_assoc093), sizeof(enc_nonce093) },
+++	{ enc_input094, enc_output094, enc_assoc094, enc_nonce094, enc_key094,
+++	  sizeof(enc_input094), sizeof(enc_assoc094), sizeof(enc_nonce094) },
+++	{ enc_input095, enc_output095, enc_assoc095, enc_nonce095, enc_key095,
+++	  sizeof(enc_input095), sizeof(enc_assoc095), sizeof(enc_nonce095) },
+++	{ enc_input096, enc_output096, enc_assoc096, enc_nonce096, enc_key096,
+++	  sizeof(enc_input096), sizeof(enc_assoc096), sizeof(enc_nonce096) },
+++	{ enc_input097, enc_output097, enc_assoc097, enc_nonce097, enc_key097,
+++	  sizeof(enc_input097), sizeof(enc_assoc097), sizeof(enc_nonce097) },
+++	{ enc_input098, enc_output098, enc_assoc098, enc_nonce098, enc_key098,
+++	  sizeof(enc_input098), sizeof(enc_assoc098), sizeof(enc_nonce098) },
+++	{ enc_input099, enc_output099, enc_assoc099, enc_nonce099, enc_key099,
+++	  sizeof(enc_input099), sizeof(enc_assoc099), sizeof(enc_nonce099) },
+++	{ enc_input100, enc_output100, enc_assoc100, enc_nonce100, enc_key100,
+++	  sizeof(enc_input100), sizeof(enc_assoc100), sizeof(enc_nonce100) },
+++	{ enc_input101, enc_output101, enc_assoc101, enc_nonce101, enc_key101,
+++	  sizeof(enc_input101), sizeof(enc_assoc101), sizeof(enc_nonce101) },
+++	{ enc_input102, enc_output102, enc_assoc102, enc_nonce102, enc_key102,
+++	  sizeof(enc_input102), sizeof(enc_assoc102), sizeof(enc_nonce102) },
+++	{ enc_input103, enc_output103, enc_assoc103, enc_nonce103, enc_key103,
+++	  sizeof(enc_input103), sizeof(enc_assoc103), sizeof(enc_nonce103) },
+++	{ enc_input104, enc_output104, enc_assoc104, enc_nonce104, enc_key104,
+++	  sizeof(enc_input104), sizeof(enc_assoc104), sizeof(enc_nonce104) },
+++	{ enc_input105, enc_output105, enc_assoc105, enc_nonce105, enc_key105,
+++	  sizeof(enc_input105), sizeof(enc_assoc105), sizeof(enc_nonce105) },
+++	{ enc_input106, enc_output106, enc_assoc106, enc_nonce106, enc_key106,
+++	  sizeof(enc_input106), sizeof(enc_assoc106), sizeof(enc_nonce106) },
+++	{ enc_input107, enc_output107, enc_assoc107, enc_nonce107, enc_key107,
+++	  sizeof(enc_input107), sizeof(enc_assoc107), sizeof(enc_nonce107) },
+++	{ enc_input108, enc_output108, enc_assoc108, enc_nonce108, enc_key108,
+++	  sizeof(enc_input108), sizeof(enc_assoc108), sizeof(enc_nonce108) },
+++	{ enc_input109, enc_output109, enc_assoc109, enc_nonce109, enc_key109,
+++	  sizeof(enc_input109), sizeof(enc_assoc109), sizeof(enc_nonce109) },
+++	{ enc_input110, enc_output110, enc_assoc110, enc_nonce110, enc_key110,
+++	  sizeof(enc_input110), sizeof(enc_assoc110), sizeof(enc_nonce110) },
+++	{ enc_input111, enc_output111, enc_assoc111, enc_nonce111, enc_key111,
+++	  sizeof(enc_input111), sizeof(enc_assoc111), sizeof(enc_nonce111) },
+++	{ enc_input112, enc_output112, enc_assoc112, enc_nonce112, enc_key112,
+++	  sizeof(enc_input112), sizeof(enc_assoc112), sizeof(enc_nonce112) },
+++	{ enc_input113, enc_output113, enc_assoc113, enc_nonce113, enc_key113,
+++	  sizeof(enc_input113), sizeof(enc_assoc113), sizeof(enc_nonce113) },
+++	{ enc_input114, enc_output114, enc_assoc114, enc_nonce114, enc_key114,
+++	  sizeof(enc_input114), sizeof(enc_assoc114), sizeof(enc_nonce114) },
+++	{ enc_input115, enc_output115, enc_assoc115, enc_nonce115, enc_key115,
+++	  sizeof(enc_input115), sizeof(enc_assoc115), sizeof(enc_nonce115) },
+++	{ enc_input116, enc_output116, enc_assoc116, enc_nonce116, enc_key116,
+++	  sizeof(enc_input116), sizeof(enc_assoc116), sizeof(enc_nonce116) },
+++	{ enc_input117, enc_output117, enc_assoc117, enc_nonce117, enc_key117,
+++	  sizeof(enc_input117), sizeof(enc_assoc117), sizeof(enc_nonce117) },
+++	{ enc_input118, enc_output118, enc_assoc118, enc_nonce118, enc_key118,
+++	  sizeof(enc_input118), sizeof(enc_assoc118), sizeof(enc_nonce118) }
+++};
+++
+++static const u8 dec_input001[] __initconst = {
+++	0x64, 0xa0, 0x86, 0x15, 0x75, 0x86, 0x1a, 0xf4,
+++	0x60, 0xf0, 0x62, 0xc7, 0x9b, 0xe6, 0x43, 0xbd,
+++	0x5e, 0x80, 0x5c, 0xfd, 0x34, 0x5c, 0xf3, 0x89,
+++	0xf1, 0x08, 0x67, 0x0a, 0xc7, 0x6c, 0x8c, 0xb2,
+++	0x4c, 0x6c, 0xfc, 0x18, 0x75, 0x5d, 0x43, 0xee,
+++	0xa0, 0x9e, 0xe9, 0x4e, 0x38, 0x2d, 0x26, 0xb0,
+++	0xbd, 0xb7, 0xb7, 0x3c, 0x32, 0x1b, 0x01, 0x00,
+++	0xd4, 0xf0, 0x3b, 0x7f, 0x35, 0x58, 0x94, 0xcf,
+++	0x33, 0x2f, 0x83, 0x0e, 0x71, 0x0b, 0x97, 0xce,
+++	0x98, 0xc8, 0xa8, 0x4a, 0xbd, 0x0b, 0x94, 0x81,
+++	0x14, 0xad, 0x17, 0x6e, 0x00, 0x8d, 0x33, 0xbd,
+++	0x60, 0xf9, 0x82, 0xb1, 0xff, 0x37, 0xc8, 0x55,
+++	0x97, 0x97, 0xa0, 0x6e, 0xf4, 0xf0, 0xef, 0x61,
+++	0xc1, 0x86, 0x32, 0x4e, 0x2b, 0x35, 0x06, 0x38,
+++	0x36, 0x06, 0x90, 0x7b, 0x6a, 0x7c, 0x02, 0xb0,
+++	0xf9, 0xf6, 0x15, 0x7b, 0x53, 0xc8, 0x67, 0xe4,
+++	0xb9, 0x16, 0x6c, 0x76, 0x7b, 0x80, 0x4d, 0x46,
+++	0xa5, 0x9b, 0x52, 0x16, 0xcd, 0xe7, 0xa4, 0xe9,
+++	0x90, 0x40, 0xc5, 0xa4, 0x04, 0x33, 0x22, 0x5e,
+++	0xe2, 0x82, 0xa1, 0xb0, 0xa0, 0x6c, 0x52, 0x3e,
+++	0xaf, 0x45, 0x34, 0xd7, 0xf8, 0x3f, 0xa1, 0x15,
+++	0x5b, 0x00, 0x47, 0x71, 0x8c, 0xbc, 0x54, 0x6a,
+++	0x0d, 0x07, 0x2b, 0x04, 0xb3, 0x56, 0x4e, 0xea,
+++	0x1b, 0x42, 0x22, 0x73, 0xf5, 0x48, 0x27, 0x1a,
+++	0x0b, 0xb2, 0x31, 0x60, 0x53, 0xfa, 0x76, 0x99,
+++	0x19, 0x55, 0xeb, 0xd6, 0x31, 0x59, 0x43, 0x4e,
+++	0xce, 0xbb, 0x4e, 0x46, 0x6d, 0xae, 0x5a, 0x10,
+++	0x73, 0xa6, 0x72, 0x76, 0x27, 0x09, 0x7a, 0x10,
+++	0x49, 0xe6, 0x17, 0xd9, 0x1d, 0x36, 0x10, 0x94,
+++	0xfa, 0x68, 0xf0, 0xff, 0x77, 0x98, 0x71, 0x30,
+++	0x30, 0x5b, 0xea, 0xba, 0x2e, 0xda, 0x04, 0xdf,
+++	0x99, 0x7b, 0x71, 0x4d, 0x6c, 0x6f, 0x2c, 0x29,
+++	0xa6, 0xad, 0x5c, 0xb4, 0x02, 0x2b, 0x02, 0x70,
+++	0x9b, 0xee, 0xad, 0x9d, 0x67, 0x89, 0x0c, 0xbb,
+++	0x22, 0x39, 0x23, 0x36, 0xfe, 0xa1, 0x85, 0x1f,
+++	0x38
+++};
+++static const u8 dec_output001[] __initconst = {
+++	0x49, 0x6e, 0x74, 0x65, 0x72, 0x6e, 0x65, 0x74,
+++	0x2d, 0x44, 0x72, 0x61, 0x66, 0x74, 0x73, 0x20,
+++	0x61, 0x72, 0x65, 0x20, 0x64, 0x72, 0x61, 0x66,
+++	0x74, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65,
+++	0x6e, 0x74, 0x73, 0x20, 0x76, 0x61, 0x6c, 0x69,
+++	0x64, 0x20, 0x66, 0x6f, 0x72, 0x20, 0x61, 0x20,
+++	0x6d, 0x61, 0x78, 0x69, 0x6d, 0x75, 0x6d, 0x20,
+++	0x6f, 0x66, 0x20, 0x73, 0x69, 0x78, 0x20, 0x6d,
+++	0x6f, 0x6e, 0x74, 0x68, 0x73, 0x20, 0x61, 0x6e,
+++	0x64, 0x20, 0x6d, 0x61, 0x79, 0x20, 0x62, 0x65,
+++	0x20, 0x75, 0x70, 0x64, 0x61, 0x74, 0x65, 0x64,
+++	0x2c, 0x20, 0x72, 0x65, 0x70, 0x6c, 0x61, 0x63,
+++	0x65, 0x64, 0x2c, 0x20, 0x6f, 0x72, 0x20, 0x6f,
+++	0x62, 0x73, 0x6f, 0x6c, 0x65, 0x74, 0x65, 0x64,
+++	0x20, 0x62, 0x79, 0x20, 0x6f, 0x74, 0x68, 0x65,
+++	0x72, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65,
+++	0x6e, 0x74, 0x73, 0x20, 0x61, 0x74, 0x20, 0x61,
+++	0x6e, 0x79, 0x20, 0x74, 0x69, 0x6d, 0x65, 0x2e,
+++	0x20, 0x49, 0x74, 0x20, 0x69, 0x73, 0x20, 0x69,
+++	0x6e, 0x61, 0x70, 0x70, 0x72, 0x6f, 0x70, 0x72,
+++	0x69, 0x61, 0x74, 0x65, 0x20, 0x74, 0x6f, 0x20,
+++	0x75, 0x73, 0x65, 0x20, 0x49, 0x6e, 0x74, 0x65,
+++	0x72, 0x6e, 0x65, 0x74, 0x2d, 0x44, 0x72, 0x61,
+++	0x66, 0x74, 0x73, 0x20, 0x61, 0x73, 0x20, 0x72,
+++	0x65, 0x66, 0x65, 0x72, 0x65, 0x6e, 0x63, 0x65,
+++	0x20, 0x6d, 0x61, 0x74, 0x65, 0x72, 0x69, 0x61,
+++	0x6c, 0x20, 0x6f, 0x72, 0x20, 0x74, 0x6f, 0x20,
+++	0x63, 0x69, 0x74, 0x65, 0x20, 0x74, 0x68, 0x65,
+++	0x6d, 0x20, 0x6f, 0x74, 0x68, 0x65, 0x72, 0x20,
+++	0x74, 0x68, 0x61, 0x6e, 0x20, 0x61, 0x73, 0x20,
+++	0x2f, 0xe2, 0x80, 0x9c, 0x77, 0x6f, 0x72, 0x6b,
+++	0x20, 0x69, 0x6e, 0x20, 0x70, 0x72, 0x6f, 0x67,
+++	0x72, 0x65, 0x73, 0x73, 0x2e, 0x2f, 0xe2, 0x80,
+++	0x9d
+++};
+++static const u8 dec_assoc001[] __initconst = {
+++	0xf3, 0x33, 0x88, 0x86, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x4e, 0x91
+++};
+++static const u8 dec_nonce001[] __initconst = {
+++	0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08
+++};
+++static const u8 dec_key001[] __initconst = {
+++	0x1c, 0x92, 0x40, 0xa5, 0xeb, 0x55, 0xd3, 0x8a,
+++	0xf3, 0x33, 0x88, 0x86, 0x04, 0xf6, 0xb5, 0xf0,
+++	0x47, 0x39, 0x17, 0xc1, 0x40, 0x2b, 0x80, 0x09,
+++	0x9d, 0xca, 0x5c, 0xbc, 0x20, 0x70, 0x75, 0xc0
+++};
+++
+++static const u8 dec_input002[] __initconst = {
+++	0xea, 0xe0, 0x1e, 0x9e, 0x2c, 0x91, 0xaa, 0xe1,
+++	0xdb, 0x5d, 0x99, 0x3f, 0x8a, 0xf7, 0x69, 0x92
+++};
+++static const u8 dec_output002[] __initconst = { };
+++static const u8 dec_assoc002[] __initconst = { };
+++static const u8 dec_nonce002[] __initconst = {
+++	0xca, 0xbf, 0x33, 0x71, 0x32, 0x45, 0x77, 0x8e
+++};
+++static const u8 dec_key002[] __initconst = {
+++	0x4c, 0xf5, 0x96, 0x83, 0x38, 0xe6, 0xae, 0x7f,
+++	0x2d, 0x29, 0x25, 0x76, 0xd5, 0x75, 0x27, 0x86,
+++	0x91, 0x9a, 0x27, 0x7a, 0xfb, 0x46, 0xc5, 0xef,
+++	0x94, 0x81, 0x79, 0x57, 0x14, 0x59, 0x40, 0x68
+++};
+++
+++static const u8 dec_input003[] __initconst = {
+++	0xdd, 0x6b, 0x3b, 0x82, 0xce, 0x5a, 0xbd, 0xd6,
+++	0xa9, 0x35, 0x83, 0xd8, 0x8c, 0x3d, 0x85, 0x77
+++};
+++static const u8 dec_output003[] __initconst = { };
+++static const u8 dec_assoc003[] __initconst = {
+++	0x33, 0x10, 0x41, 0x12, 0x1f, 0xf3, 0xd2, 0x6b
+++};
+++static const u8 dec_nonce003[] __initconst = {
+++	0x3d, 0x86, 0xb5, 0x6b, 0xc8, 0xa3, 0x1f, 0x1d
+++};
+++static const u8 dec_key003[] __initconst = {
+++	0x2d, 0xb0, 0x5d, 0x40, 0xc8, 0xed, 0x44, 0x88,
+++	0x34, 0xd1, 0x13, 0xaf, 0x57, 0xa1, 0xeb, 0x3a,
+++	0x2a, 0x80, 0x51, 0x36, 0xec, 0x5b, 0xbc, 0x08,
+++	0x93, 0x84, 0x21, 0xb5, 0x13, 0x88, 0x3c, 0x0d
+++};
+++
+++static const u8 dec_input004[] __initconst = {
+++	0xb7, 0x1b, 0xb0, 0x73, 0x59, 0xb0, 0x84, 0xb2,
+++	0x6d, 0x8e, 0xab, 0x94, 0x31, 0xa1, 0xae, 0xac,
+++	0x89
+++};
+++static const u8 dec_output004[] __initconst = {
+++	0xa4
+++};
+++static const u8 dec_assoc004[] __initconst = {
+++	0x6a, 0xe2, 0xad, 0x3f, 0x88, 0x39, 0x5a, 0x40
+++};
+++static const u8 dec_nonce004[] __initconst = {
+++	0xd2, 0x32, 0x1f, 0x29, 0x28, 0xc6, 0xc4, 0xc4
+++};
+++static const u8 dec_key004[] __initconst = {
+++	0x4b, 0x28, 0x4b, 0xa3, 0x7b, 0xbe, 0xe9, 0xf8,
+++	0x31, 0x80, 0x82, 0xd7, 0xd8, 0xe8, 0xb5, 0xa1,
+++	0xe2, 0x18, 0x18, 0x8a, 0x9c, 0xfa, 0xa3, 0x3d,
+++	0x25, 0x71, 0x3e, 0x40, 0xbc, 0x54, 0x7a, 0x3e
+++};
+++
+++static const u8 dec_input005[] __initconst = {
+++	0xbf, 0xe1, 0x5b, 0x0b, 0xdb, 0x6b, 0xf5, 0x5e,
+++	0x6c, 0x5d, 0x84, 0x44, 0x39, 0x81, 0xc1, 0x9c,
+++	0xac
+++};
+++static const u8 dec_output005[] __initconst = {
+++	0x2d
+++};
+++static const u8 dec_assoc005[] __initconst = { };
+++static const u8 dec_nonce005[] __initconst = {
+++	0x20, 0x1c, 0xaa, 0x5f, 0x9c, 0xbf, 0x92, 0x30
+++};
+++static const u8 dec_key005[] __initconst = {
+++	0x66, 0xca, 0x9c, 0x23, 0x2a, 0x4b, 0x4b, 0x31,
+++	0x0e, 0x92, 0x89, 0x8b, 0xf4, 0x93, 0xc7, 0x87,
+++	0x98, 0xa3, 0xd8, 0x39, 0xf8, 0xf4, 0xa7, 0x01,
+++	0xc0, 0x2e, 0x0a, 0xa6, 0x7e, 0x5a, 0x78, 0x87
+++};
+++
+++static const u8 dec_input006[] __initconst = {
+++	0x8b, 0x06, 0xd3, 0x31, 0xb0, 0x93, 0x45, 0xb1,
+++	0x75, 0x6e, 0x26, 0xf9, 0x67, 0xbc, 0x90, 0x15,
+++	0x81, 0x2c, 0xb5, 0xf0, 0xc6, 0x2b, 0xc7, 0x8c,
+++	0x56, 0xd1, 0xbf, 0x69, 0x6c, 0x07, 0xa0, 0xda,
+++	0x65, 0x27, 0xc9, 0x90, 0x3d, 0xef, 0x4b, 0x11,
+++	0x0f, 0x19, 0x07, 0xfd, 0x29, 0x92, 0xd9, 0xc8,
+++	0xf7, 0x99, 0x2e, 0x4a, 0xd0, 0xb8, 0x2c, 0xdc,
+++	0x93, 0xf5, 0x9e, 0x33, 0x78, 0xd1, 0x37, 0xc3,
+++	0x66, 0xd7, 0x5e, 0xbc, 0x44, 0xbf, 0x53, 0xa5,
+++	0xbc, 0xc4, 0xcb, 0x7b, 0x3a, 0x8e, 0x7f, 0x02,
+++	0xbd, 0xbb, 0xe7, 0xca, 0xa6, 0x6c, 0x6b, 0x93,
+++	0x21, 0x93, 0x10, 0x61, 0xe7, 0x69, 0xd0, 0x78,
+++	0xf3, 0x07, 0x5a, 0x1a, 0x8f, 0x73, 0xaa, 0xb1,
+++	0x4e, 0xd3, 0xda, 0x4f, 0xf3, 0x32, 0xe1, 0x66,
+++	0x3e, 0x6c, 0xc6, 0x13, 0xba, 0x06, 0x5b, 0xfc,
+++	0x6a, 0xe5, 0x6f, 0x60, 0xfb, 0x07, 0x40, 0xb0,
+++	0x8c, 0x9d, 0x84, 0x43, 0x6b, 0xc1, 0xf7, 0x8d,
+++	0x8d, 0x31, 0xf7, 0x7a, 0x39, 0x4d, 0x8f, 0x9a,
+++	0xeb
+++};
+++static const u8 dec_output006[] __initconst = {
+++	0x33, 0x2f, 0x94, 0xc1, 0xa4, 0xef, 0xcc, 0x2a,
+++	0x5b, 0xa6, 0xe5, 0x8f, 0x1d, 0x40, 0xf0, 0x92,
+++	0x3c, 0xd9, 0x24, 0x11, 0xa9, 0x71, 0xf9, 0x37,
+++	0x14, 0x99, 0xfa, 0xbe, 0xe6, 0x80, 0xde, 0x50,
+++	0xc9, 0x96, 0xd4, 0xb0, 0xec, 0x9e, 0x17, 0xec,
+++	0xd2, 0x5e, 0x72, 0x99, 0xfc, 0x0a, 0xe1, 0xcb,
+++	0x48, 0xd2, 0x85, 0xdd, 0x2f, 0x90, 0xe0, 0x66,
+++	0x3b, 0xe6, 0x20, 0x74, 0xbe, 0x23, 0x8f, 0xcb,
+++	0xb4, 0xe4, 0xda, 0x48, 0x40, 0xa6, 0xd1, 0x1b,
+++	0xc7, 0x42, 0xce, 0x2f, 0x0c, 0xa6, 0x85, 0x6e,
+++	0x87, 0x37, 0x03, 0xb1, 0x7c, 0x25, 0x96, 0xa3,
+++	0x05, 0xd8, 0xb0, 0xf4, 0xed, 0xea, 0xc2, 0xf0,
+++	0x31, 0x98, 0x6c, 0xd1, 0x14, 0x25, 0xc0, 0xcb,
+++	0x01, 0x74, 0xd0, 0x82, 0xf4, 0x36, 0xf5, 0x41,
+++	0xd5, 0xdc, 0xca, 0xc5, 0xbb, 0x98, 0xfe, 0xfc,
+++	0x69, 0x21, 0x70, 0xd8, 0xa4, 0x4b, 0xc8, 0xde,
+++	0x8f
+++};
+++static const u8 dec_assoc006[] __initconst = {
+++	0x70, 0xd3, 0x33, 0xf3, 0x8b, 0x18, 0x0b
+++};
+++static const u8 dec_nonce006[] __initconst = {
+++	0xdf, 0x51, 0x84, 0x82, 0x42, 0x0c, 0x75, 0x9c
+++};
+++static const u8 dec_key006[] __initconst = {
+++	0x68, 0x7b, 0x8d, 0x8e, 0xe3, 0xc4, 0xdd, 0xae,
+++	0xdf, 0x72, 0x7f, 0x53, 0x72, 0x25, 0x1e, 0x78,
+++	0x91, 0xcb, 0x69, 0x76, 0x1f, 0x49, 0x93, 0xf9,
+++	0x6f, 0x21, 0xcc, 0x39, 0x9c, 0xad, 0xb1, 0x01
+++};
+++
+++static const u8 dec_input007[] __initconst = {
+++	0x85, 0x04, 0xc2, 0xed, 0x8d, 0xfd, 0x97, 0x5c,
+++	0xd2, 0xb7, 0xe2, 0xc1, 0x6b, 0xa3, 0xba, 0xf8,
+++	0xc9, 0x50, 0xc3, 0xc6, 0xa5, 0xe3, 0xa4, 0x7c,
+++	0xc3, 0x23, 0x49, 0x5e, 0xa9, 0xb9, 0x32, 0xeb,
+++	0x8a, 0x7c, 0xca, 0xe5, 0xec, 0xfb, 0x7c, 0xc0,
+++	0xcb, 0x7d, 0xdc, 0x2c, 0x9d, 0x92, 0x55, 0x21,
+++	0x0a, 0xc8, 0x43, 0x63, 0x59, 0x0a, 0x31, 0x70,
+++	0x82, 0x67, 0x41, 0x03, 0xf8, 0xdf, 0xf2, 0xac,
+++	0xa7, 0x02, 0xd4, 0xd5, 0x8a, 0x2d, 0xc8, 0x99,
+++	0x19, 0x66, 0xd0, 0xf6, 0x88, 0x2c, 0x77, 0xd9,
+++	0xd4, 0x0d, 0x6c, 0xbd, 0x98, 0xde, 0xe7, 0x7f,
+++	0xad, 0x7e, 0x8a, 0xfb, 0xe9, 0x4b, 0xe5, 0xf7,
+++	0xe5, 0x50, 0xa0, 0x90, 0x3f, 0xd6, 0x22, 0x53,
+++	0xe3, 0xfe, 0x1b, 0xcc, 0x79, 0x3b, 0xec, 0x12,
+++	0x47, 0x52, 0xa7, 0xd6, 0x04, 0xe3, 0x52, 0xe6,
+++	0x93, 0x90, 0x91, 0x32, 0x73, 0x79, 0xb8, 0xd0,
+++	0x31, 0xde, 0x1f, 0x9f, 0x2f, 0x05, 0x38, 0x54,
+++	0x2f, 0x35, 0x04, 0x39, 0xe0, 0xa7, 0xba, 0xc6,
+++	0x52, 0xf6, 0x37, 0x65, 0x4c, 0x07, 0xa9, 0x7e,
+++	0xb3, 0x21, 0x6f, 0x74, 0x8c, 0xc9, 0xde, 0xdb,
+++	0x65, 0x1b, 0x9b, 0xaa, 0x60, 0xb1, 0x03, 0x30,
+++	0x6b, 0xb2, 0x03, 0xc4, 0x1c, 0x04, 0xf8, 0x0f,
+++	0x64, 0xaf, 0x46, 0xe4, 0x65, 0x99, 0x49, 0xe2,
+++	0xea, 0xce, 0x78, 0x00, 0xd8, 0x8b, 0xd5, 0x2e,
+++	0xcf, 0xfc, 0x40, 0x49, 0xe8, 0x58, 0xdc, 0x34,
+++	0x9c, 0x8c, 0x61, 0xbf, 0x0a, 0x8e, 0xec, 0x39,
+++	0xa9, 0x30, 0x05, 0x5a, 0xd2, 0x56, 0x01, 0xc7,
+++	0xda, 0x8f, 0x4e, 0xbb, 0x43, 0xa3, 0x3a, 0xf9,
+++	0x15, 0x2a, 0xd0, 0xa0, 0x7a, 0x87, 0x34, 0x82,
+++	0xfe, 0x8a, 0xd1, 0x2d, 0x5e, 0xc7, 0xbf, 0x04,
+++	0x53, 0x5f, 0x3b, 0x36, 0xd4, 0x25, 0x5c, 0x34,
+++	0x7a, 0x8d, 0xd5, 0x05, 0xce, 0x72, 0xca, 0xef,
+++	0x7a, 0x4b, 0xbc, 0xb0, 0x10, 0x5c, 0x96, 0x42,
+++	0x3a, 0x00, 0x98, 0xcd, 0x15, 0xe8, 0xb7, 0x53
+++};
+++static const u8 dec_output007[] __initconst = {
+++	0x9b, 0x18, 0xdb, 0xdd, 0x9a, 0x0f, 0x3e, 0xa5,
+++	0x15, 0x17, 0xde, 0xdf, 0x08, 0x9d, 0x65, 0x0a,
+++	0x67, 0x30, 0x12, 0xe2, 0x34, 0x77, 0x4b, 0xc1,
+++	0xd9, 0xc6, 0x1f, 0xab, 0xc6, 0x18, 0x50, 0x17,
+++	0xa7, 0x9d, 0x3c, 0xa6, 0xc5, 0x35, 0x8c, 0x1c,
+++	0xc0, 0xa1, 0x7c, 0x9f, 0x03, 0x89, 0xca, 0xe1,
+++	0xe6, 0xe9, 0xd4, 0xd3, 0x88, 0xdb, 0xb4, 0x51,
+++	0x9d, 0xec, 0xb4, 0xfc, 0x52, 0xee, 0x6d, 0xf1,
+++	0x75, 0x42, 0xc6, 0xfd, 0xbd, 0x7a, 0x8e, 0x86,
+++	0xfc, 0x44, 0xb3, 0x4f, 0xf3, 0xea, 0x67, 0x5a,
+++	0x41, 0x13, 0xba, 0xb0, 0xdc, 0xe1, 0xd3, 0x2a,
+++	0x7c, 0x22, 0xb3, 0xca, 0xac, 0x6a, 0x37, 0x98,
+++	0x3e, 0x1d, 0x40, 0x97, 0xf7, 0x9b, 0x1d, 0x36,
+++	0x6b, 0xb3, 0x28, 0xbd, 0x60, 0x82, 0x47, 0x34,
+++	0xaa, 0x2f, 0x7d, 0xe9, 0xa8, 0x70, 0x81, 0x57,
+++	0xd4, 0xb9, 0x77, 0x0a, 0x9d, 0x29, 0xa7, 0x84,
+++	0x52, 0x4f, 0xc2, 0x4a, 0x40, 0x3b, 0x3c, 0xd4,
+++	0xc9, 0x2a, 0xdb, 0x4a, 0x53, 0xc4, 0xbe, 0x80,
+++	0xe9, 0x51, 0x7f, 0x8f, 0xc7, 0xa2, 0xce, 0x82,
+++	0x5c, 0x91, 0x1e, 0x74, 0xd9, 0xd0, 0xbd, 0xd5,
+++	0xf3, 0xfd, 0xda, 0x4d, 0x25, 0xb4, 0xbb, 0x2d,
+++	0xac, 0x2f, 0x3d, 0x71, 0x85, 0x7b, 0xcf, 0x3c,
+++	0x7b, 0x3e, 0x0e, 0x22, 0x78, 0x0c, 0x29, 0xbf,
+++	0xe4, 0xf4, 0x57, 0xb3, 0xcb, 0x49, 0xa0, 0xfc,
+++	0x1e, 0x05, 0x4e, 0x16, 0xbc, 0xd5, 0xa8, 0xa3,
+++	0xee, 0x05, 0x35, 0xc6, 0x7c, 0xab, 0x60, 0x14,
+++	0x55, 0x1a, 0x8e, 0xc5, 0x88, 0x5d, 0xd5, 0x81,
+++	0xc2, 0x81, 0xa5, 0xc4, 0x60, 0xdb, 0xaf, 0x77,
+++	0x91, 0xe1, 0xce, 0xa2, 0x7e, 0x7f, 0x42, 0xe3,
+++	0xb0, 0x13, 0x1c, 0x1f, 0x25, 0x60, 0x21, 0xe2,
+++	0x40, 0x5f, 0x99, 0xb7, 0x73, 0xec, 0x9b, 0x2b,
+++	0xf0, 0x65, 0x11, 0xc8, 0xd0, 0x0a, 0x9f, 0xd3
+++};
+++static const u8 dec_assoc007[] __initconst = { };
+++static const u8 dec_nonce007[] __initconst = {
+++	0xde, 0x7b, 0xef, 0xc3, 0x65, 0x1b, 0x68, 0xb0
+++};
+++static const u8 dec_key007[] __initconst = {
+++	0x8d, 0xb8, 0x91, 0x48, 0xf0, 0xe7, 0x0a, 0xbd,
+++	0xf9, 0x3f, 0xcd, 0xd9, 0xa0, 0x1e, 0x42, 0x4c,
+++	0xe7, 0xde, 0x25, 0x3d, 0xa3, 0xd7, 0x05, 0x80,
+++	0x8d, 0xf2, 0x82, 0xac, 0x44, 0x16, 0x51, 0x01
+++};
+++
+++static const u8 dec_input008[] __initconst = {
+++	0x14, 0xf6, 0x41, 0x37, 0xa6, 0xd4, 0x27, 0xcd,
+++	0xdb, 0x06, 0x3e, 0x9a, 0x4e, 0xab, 0xd5, 0xb1,
+++	0x1e, 0x6b, 0xd2, 0xbc, 0x11, 0xf4, 0x28, 0x93,
+++	0x63, 0x54, 0xef, 0xbb, 0x5e, 0x1d, 0x3a, 0x1d,
+++	0x37, 0x3c, 0x0a, 0x6c, 0x1e, 0xc2, 0xd1, 0x2c,
+++	0xb5, 0xa3, 0xb5, 0x7b, 0xb8, 0x8f, 0x25, 0xa6,
+++	0x1b, 0x61, 0x1c, 0xec, 0x28, 0x58, 0x26, 0xa4,
+++	0xa8, 0x33, 0x28, 0x25, 0x5c, 0x45, 0x05, 0xe5,
+++	0x6c, 0x99, 0xe5, 0x45, 0xc4, 0xa2, 0x03, 0x84,
+++	0x03, 0x73, 0x1e, 0x8c, 0x49, 0xac, 0x20, 0xdd,
+++	0x8d, 0xb3, 0xc4, 0xf5, 0xe7, 0x4f, 0xf1, 0xed,
+++	0xa1, 0x98, 0xde, 0xa4, 0x96, 0xdd, 0x2f, 0xab,
+++	0xab, 0x97, 0xcf, 0x3e, 0xd2, 0x9e, 0xb8, 0x13,
+++	0x07, 0x28, 0x29, 0x19, 0xaf, 0xfd, 0xf2, 0x49,
+++	0x43, 0xea, 0x49, 0x26, 0x91, 0xc1, 0x07, 0xd6,
+++	0xbb, 0x81, 0x75, 0x35, 0x0d, 0x24, 0x7f, 0xc8,
+++	0xda, 0xd4, 0xb7, 0xeb, 0xe8, 0x5c, 0x09, 0xa2,
+++	0x2f, 0xdc, 0x28, 0x7d, 0x3a, 0x03, 0xfa, 0x94,
+++	0xb5, 0x1d, 0x17, 0x99, 0x36, 0xc3, 0x1c, 0x18,
+++	0x34, 0xe3, 0x9f, 0xf5, 0x55, 0x7c, 0xb0, 0x60,
+++	0x9d, 0xff, 0xac, 0xd4, 0x61, 0xf2, 0xad, 0xf8,
+++	0xce, 0xc7, 0xbe, 0x5c, 0xd2, 0x95, 0xa8, 0x4b,
+++	0x77, 0x13, 0x19, 0x59, 0x26, 0xc9, 0xb7, 0x8f,
+++	0x6a, 0xcb, 0x2d, 0x37, 0x91, 0xea, 0x92, 0x9c,
+++	0x94, 0x5b, 0xda, 0x0b, 0xce, 0xfe, 0x30, 0x20,
+++	0xf8, 0x51, 0xad, 0xf2, 0xbe, 0xe7, 0xc7, 0xff,
+++	0xb3, 0x33, 0x91, 0x6a, 0xc9, 0x1a, 0x41, 0xc9,
+++	0x0f, 0xf3, 0x10, 0x0e, 0xfd, 0x53, 0xff, 0x6c,
+++	0x16, 0x52, 0xd9, 0xf3, 0xf7, 0x98, 0x2e, 0xc9,
+++	0x07, 0x31, 0x2c, 0x0c, 0x72, 0xd7, 0xc5, 0xc6,
+++	0x08, 0x2a, 0x7b, 0xda, 0xbd, 0x7e, 0x02, 0xea,
+++	0x1a, 0xbb, 0xf2, 0x04, 0x27, 0x61, 0x28, 0x8e,
+++	0xf5, 0x04, 0x03, 0x1f, 0x4c, 0x07, 0x55, 0x82,
+++	0xec, 0x1e, 0xd7, 0x8b, 0x2f, 0x65, 0x56, 0xd1,
+++	0xd9, 0x1e, 0x3c, 0xe9, 0x1f, 0x5e, 0x98, 0x70,
+++	0x38, 0x4a, 0x8c, 0x49, 0xc5, 0x43, 0xa0, 0xa1,
+++	0x8b, 0x74, 0x9d, 0x4c, 0x62, 0x0d, 0x10, 0x0c,
+++	0xf4, 0x6c, 0x8f, 0xe0, 0xaa, 0x9a, 0x8d, 0xb7,
+++	0xe0, 0xbe, 0x4c, 0x87, 0xf1, 0x98, 0x2f, 0xcc,
+++	0xed, 0xc0, 0x52, 0x29, 0xdc, 0x83, 0xf8, 0xfc,
+++	0x2c, 0x0e, 0xa8, 0x51, 0x4d, 0x80, 0x0d, 0xa3,
+++	0xfe, 0xd8, 0x37, 0xe7, 0x41, 0x24, 0xfc, 0xfb,
+++	0x75, 0xe3, 0x71, 0x7b, 0x57, 0x45, 0xf5, 0x97,
+++	0x73, 0x65, 0x63, 0x14, 0x74, 0xb8, 0x82, 0x9f,
+++	0xf8, 0x60, 0x2f, 0x8a, 0xf2, 0x4e, 0xf1, 0x39,
+++	0xda, 0x33, 0x91, 0xf8, 0x36, 0xe0, 0x8d, 0x3f,
+++	0x1f, 0x3b, 0x56, 0xdc, 0xa0, 0x8f, 0x3c, 0x9d,
+++	0x71, 0x52, 0xa7, 0xb8, 0xc0, 0xa5, 0xc6, 0xa2,
+++	0x73, 0xda, 0xf4, 0x4b, 0x74, 0x5b, 0x00, 0x3d,
+++	0x99, 0xd7, 0x96, 0xba, 0xe6, 0xe1, 0xa6, 0x96,
+++	0x38, 0xad, 0xb3, 0xc0, 0xd2, 0xba, 0x91, 0x6b,
+++	0xf9, 0x19, 0xdd, 0x3b, 0xbe, 0xbe, 0x9c, 0x20,
+++	0x50, 0xba, 0xa1, 0xd0, 0xce, 0x11, 0xbd, 0x95,
+++	0xd8, 0xd1, 0xdd, 0x33, 0x85, 0x74, 0xdc, 0xdb,
+++	0x66, 0x76, 0x44, 0xdc, 0x03, 0x74, 0x48, 0x35,
+++	0x98, 0xb1, 0x18, 0x47, 0x94, 0x7d, 0xff, 0x62,
+++	0xe4, 0x58, 0x78, 0xab, 0xed, 0x95, 0x36, 0xd9,
+++	0x84, 0x91, 0x82, 0x64, 0x41, 0xbb, 0x58, 0xe6,
+++	0x1c, 0x20, 0x6d, 0x15, 0x6b, 0x13, 0x96, 0xe8,
+++	0x35, 0x7f, 0xdc, 0x40, 0x2c, 0xe9, 0xbc, 0x8a,
+++	0x4f, 0x92, 0xec, 0x06, 0x2d, 0x50, 0xdf, 0x93,
+++	0x5d, 0x65, 0x5a, 0xa8, 0xfc, 0x20, 0x50, 0x14,
+++	0xa9, 0x8a, 0x7e, 0x1d, 0x08, 0x1f, 0xe2, 0x99,
+++	0xd0, 0xbe, 0xfb, 0x3a, 0x21, 0x9d, 0xad, 0x86,
+++	0x54, 0xfd, 0x0d, 0x98, 0x1c, 0x5a, 0x6f, 0x1f,
+++	0x9a, 0x40, 0xcd, 0xa2, 0xff, 0x6a, 0xf1, 0x54
+++};
+++static const u8 dec_output008[] __initconst = {
+++	0xc3, 0x09, 0x94, 0x62, 0xe6, 0x46, 0x2e, 0x10,
+++	0xbe, 0x00, 0xe4, 0xfc, 0xf3, 0x40, 0xa3, 0xe2,
+++	0x0f, 0xc2, 0x8b, 0x28, 0xdc, 0xba, 0xb4, 0x3c,
+++	0xe4, 0x21, 0x58, 0x61, 0xcd, 0x8b, 0xcd, 0xfb,
+++	0xac, 0x94, 0xa1, 0x45, 0xf5, 0x1c, 0xe1, 0x12,
+++	0xe0, 0x3b, 0x67, 0x21, 0x54, 0x5e, 0x8c, 0xaa,
+++	0xcf, 0xdb, 0xb4, 0x51, 0xd4, 0x13, 0xda, 0xe6,
+++	0x83, 0x89, 0xb6, 0x92, 0xe9, 0x21, 0x76, 0xa4,
+++	0x93, 0x7d, 0x0e, 0xfd, 0x96, 0x36, 0x03, 0x91,
+++	0x43, 0x5c, 0x92, 0x49, 0x62, 0x61, 0x7b, 0xeb,
+++	0x43, 0x89, 0xb8, 0x12, 0x20, 0x43, 0xd4, 0x47,
+++	0x06, 0x84, 0xee, 0x47, 0xe9, 0x8a, 0x73, 0x15,
+++	0x0f, 0x72, 0xcf, 0xed, 0xce, 0x96, 0xb2, 0x7f,
+++	0x21, 0x45, 0x76, 0xeb, 0x26, 0x28, 0x83, 0x6a,
+++	0xad, 0xaa, 0xa6, 0x81, 0xd8, 0x55, 0xb1, 0xa3,
+++	0x85, 0xb3, 0x0c, 0xdf, 0xf1, 0x69, 0x2d, 0x97,
+++	0x05, 0x2a, 0xbc, 0x7c, 0x7b, 0x25, 0xf8, 0x80,
+++	0x9d, 0x39, 0x25, 0xf3, 0x62, 0xf0, 0x66, 0x5e,
+++	0xf4, 0xa0, 0xcf, 0xd8, 0xfd, 0x4f, 0xb1, 0x1f,
+++	0x60, 0x3a, 0x08, 0x47, 0xaf, 0xe1, 0xf6, 0x10,
+++	0x77, 0x09, 0xa7, 0x27, 0x8f, 0x9a, 0x97, 0x5a,
+++	0x26, 0xfa, 0xfe, 0x41, 0x32, 0x83, 0x10, 0xe0,
+++	0x1d, 0xbf, 0x64, 0x0d, 0xf4, 0x1c, 0x32, 0x35,
+++	0xe5, 0x1b, 0x36, 0xef, 0xd4, 0x4a, 0x93, 0x4d,
+++	0x00, 0x7c, 0xec, 0x02, 0x07, 0x8b, 0x5d, 0x7d,
+++	0x1b, 0x0e, 0xd1, 0xa6, 0xa5, 0x5d, 0x7d, 0x57,
+++	0x88, 0xa8, 0xcc, 0x81, 0xb4, 0x86, 0x4e, 0xb4,
+++	0x40, 0xe9, 0x1d, 0xc3, 0xb1, 0x24, 0x3e, 0x7f,
+++	0xcc, 0x8a, 0x24, 0x9b, 0xdf, 0x6d, 0xf0, 0x39,
+++	0x69, 0x3e, 0x4c, 0xc0, 0x96, 0xe4, 0x13, 0xda,
+++	0x90, 0xda, 0xf4, 0x95, 0x66, 0x8b, 0x17, 0x17,
+++	0xfe, 0x39, 0x43, 0x25, 0xaa, 0xda, 0xa0, 0x43,
+++	0x3c, 0xb1, 0x41, 0x02, 0xa3, 0xf0, 0xa7, 0x19,
+++	0x59, 0xbc, 0x1d, 0x7d, 0x6c, 0x6d, 0x91, 0x09,
+++	0x5c, 0xb7, 0x5b, 0x01, 0xd1, 0x6f, 0x17, 0x21,
+++	0x97, 0xbf, 0x89, 0x71, 0xa5, 0xb0, 0x6e, 0x07,
+++	0x45, 0xfd, 0x9d, 0xea, 0x07, 0xf6, 0x7a, 0x9f,
+++	0x10, 0x18, 0x22, 0x30, 0x73, 0xac, 0xd4, 0x6b,
+++	0x72, 0x44, 0xed, 0xd9, 0x19, 0x9b, 0x2d, 0x4a,
+++	0x41, 0xdd, 0xd1, 0x85, 0x5e, 0x37, 0x19, 0xed,
+++	0xd2, 0x15, 0x8f, 0x5e, 0x91, 0xdb, 0x33, 0xf2,
+++	0xe4, 0xdb, 0xff, 0x98, 0xfb, 0xa3, 0xb5, 0xca,
+++	0x21, 0x69, 0x08, 0xe7, 0x8a, 0xdf, 0x90, 0xff,
+++	0x3e, 0xe9, 0x20, 0x86, 0x3c, 0xe9, 0xfc, 0x0b,
+++	0xfe, 0x5c, 0x61, 0xaa, 0x13, 0x92, 0x7f, 0x7b,
+++	0xec, 0xe0, 0x6d, 0xa8, 0x23, 0x22, 0xf6, 0x6b,
+++	0x77, 0xc4, 0xfe, 0x40, 0x07, 0x3b, 0xb6, 0xf6,
+++	0x8e, 0x5f, 0xd4, 0xb9, 0xb7, 0x0f, 0x21, 0x04,
+++	0xef, 0x83, 0x63, 0x91, 0x69, 0x40, 0xa3, 0x48,
+++	0x5c, 0xd2, 0x60, 0xf9, 0x4f, 0x6c, 0x47, 0x8b,
+++	0x3b, 0xb1, 0x9f, 0x8e, 0xee, 0x16, 0x8a, 0x13,
+++	0xfc, 0x46, 0x17, 0xc3, 0xc3, 0x32, 0x56, 0xf8,
+++	0x3c, 0x85, 0x3a, 0xb6, 0x3e, 0xaa, 0x89, 0x4f,
+++	0xb3, 0xdf, 0x38, 0xfd, 0xf1, 0xe4, 0x3a, 0xc0,
+++	0xe6, 0x58, 0xb5, 0x8f, 0xc5, 0x29, 0xa2, 0x92,
+++	0x4a, 0xb6, 0xa0, 0x34, 0x7f, 0xab, 0xb5, 0x8a,
+++	0x90, 0xa1, 0xdb, 0x4d, 0xca, 0xb6, 0x2c, 0x41,
+++	0x3c, 0xf7, 0x2b, 0x21, 0xc3, 0xfd, 0xf4, 0x17,
+++	0x5c, 0xb5, 0x33, 0x17, 0x68, 0x2b, 0x08, 0x30,
+++	0xf3, 0xf7, 0x30, 0x3c, 0x96, 0xe6, 0x6a, 0x20,
+++	0x97, 0xe7, 0x4d, 0x10, 0x5f, 0x47, 0x5f, 0x49,
+++	0x96, 0x09, 0xf0, 0x27, 0x91, 0xc8, 0xf8, 0x5a,
+++	0x2e, 0x79, 0xb5, 0xe2, 0xb8, 0xe8, 0xb9, 0x7b,
+++	0xd5, 0x10, 0xcb, 0xff, 0x5d, 0x14, 0x73, 0xf3
+++};
+++static const u8 dec_assoc008[] __initconst = { };
+++static const u8 dec_nonce008[] __initconst = {
+++	0x0e, 0x0d, 0x57, 0xbb, 0x7b, 0x40, 0x54, 0x02
+++};
+++static const u8 dec_key008[] __initconst = {
+++	0xf2, 0xaa, 0x4f, 0x99, 0xfd, 0x3e, 0xa8, 0x53,
+++	0xc1, 0x44, 0xe9, 0x81, 0x18, 0xdc, 0xf5, 0xf0,
+++	0x3e, 0x44, 0x15, 0x59, 0xe0, 0xc5, 0x44, 0x86,
+++	0xc3, 0x91, 0xa8, 0x75, 0xc0, 0x12, 0x46, 0xba
+++};
+++
+++static const u8 dec_input009[] __initconst = {
+++	0xfd, 0x81, 0x8d, 0xd0, 0x3d, 0xb4, 0xd5, 0xdf,
+++	0xd3, 0x42, 0x47, 0x5a, 0x6d, 0x19, 0x27, 0x66,
+++	0x4b, 0x2e, 0x0c, 0x27, 0x9c, 0x96, 0x4c, 0x72,
+++	0x02, 0xa3, 0x65, 0xc3, 0xb3, 0x6f, 0x2e, 0xbd,
+++	0x63, 0x8a, 0x4a, 0x5d, 0x29, 0xa2, 0xd0, 0x28,
+++	0x48, 0xc5, 0x3d, 0x98, 0xa3, 0xbc, 0xe0, 0xbe,
+++	0x3b, 0x3f, 0xe6, 0x8a, 0xa4, 0x7f, 0x53, 0x06,
+++	0xfa, 0x7f, 0x27, 0x76, 0x72, 0x31, 0xa1, 0xf5,
+++	0xd6, 0x0c, 0x52, 0x47, 0xba, 0xcd, 0x4f, 0xd7,
+++	0xeb, 0x05, 0x48, 0x0d, 0x7c, 0x35, 0x4a, 0x09,
+++	0xc9, 0x76, 0x71, 0x02, 0xa3, 0xfb, 0xb7, 0x1a,
+++	0x65, 0xb7, 0xed, 0x98, 0xc6, 0x30, 0x8a, 0x00,
+++	0xae, 0xa1, 0x31, 0xe5, 0xb5, 0x9e, 0x6d, 0x62,
+++	0xda, 0xda, 0x07, 0x0f, 0x38, 0x38, 0xd3, 0xcb,
+++	0xc1, 0xb0, 0xad, 0xec, 0x72, 0xec, 0xb1, 0xa2,
+++	0x7b, 0x59, 0xf3, 0x3d, 0x2b, 0xef, 0xcd, 0x28,
+++	0x5b, 0x83, 0xcc, 0x18, 0x91, 0x88, 0xb0, 0x2e,
+++	0xf9, 0x29, 0x31, 0x18, 0xf9, 0x4e, 0xe9, 0x0a,
+++	0x91, 0x92, 0x9f, 0xae, 0x2d, 0xad, 0xf4, 0xe6,
+++	0x1a, 0xe2, 0xa4, 0xee, 0x47, 0x15, 0xbf, 0x83,
+++	0x6e, 0xd7, 0x72, 0x12, 0x3b, 0x2d, 0x24, 0xe9,
+++	0xb2, 0x55, 0xcb, 0x3c, 0x10, 0xf0, 0x24, 0x8a,
+++	0x4a, 0x02, 0xea, 0x90, 0x25, 0xf0, 0xb4, 0x79,
+++	0x3a, 0xef, 0x6e, 0xf5, 0x52, 0xdf, 0xb0, 0x0a,
+++	0xcd, 0x24, 0x1c, 0xd3, 0x2e, 0x22, 0x74, 0xea,
+++	0x21, 0x6f, 0xe9, 0xbd, 0xc8, 0x3e, 0x36, 0x5b,
+++	0x19, 0xf1, 0xca, 0x99, 0x0a, 0xb4, 0xa7, 0x52,
+++	0x1a, 0x4e, 0xf2, 0xad, 0x8d, 0x56, 0x85, 0xbb,
+++	0x64, 0x89, 0xba, 0x26, 0xf9, 0xc7, 0xe1, 0x89,
+++	0x19, 0x22, 0x77, 0xc3, 0xa8, 0xfc, 0xff, 0xad,
+++	0xfe, 0xb9, 0x48, 0xae, 0x12, 0x30, 0x9f, 0x19,
+++	0xfb, 0x1b, 0xef, 0x14, 0x87, 0x8a, 0x78, 0x71,
+++	0xf3, 0xf4, 0xb7, 0x00, 0x9c, 0x1d, 0xb5, 0x3d,
+++	0x49, 0x00, 0x0c, 0x06, 0xd4, 0x50, 0xf9, 0x54,
+++	0x45, 0xb2, 0x5b, 0x43, 0xdb, 0x6d, 0xcf, 0x1a,
+++	0xe9, 0x7a, 0x7a, 0xcf, 0xfc, 0x8a, 0x4e, 0x4d,
+++	0x0b, 0x07, 0x63, 0x28, 0xd8, 0xe7, 0x08, 0x95,
+++	0xdf, 0xa6, 0x72, 0x93, 0x2e, 0xbb, 0xa0, 0x42,
+++	0x89, 0x16, 0xf1, 0xd9, 0x0c, 0xf9, 0xa1, 0x16,
+++	0xfd, 0xd9, 0x03, 0xb4, 0x3b, 0x8a, 0xf5, 0xf6,
+++	0xe7, 0x6b, 0x2e, 0x8e, 0x4c, 0x3d, 0xe2, 0xaf,
+++	0x08, 0x45, 0x03, 0xff, 0x09, 0xb6, 0xeb, 0x2d,
+++	0xc6, 0x1b, 0x88, 0x94, 0xac, 0x3e, 0xf1, 0x9f,
+++	0x0e, 0x0e, 0x2b, 0xd5, 0x00, 0x4d, 0x3f, 0x3b,
+++	0x53, 0xae, 0xaf, 0x1c, 0x33, 0x5f, 0x55, 0x6e,
+++	0x8d, 0xaf, 0x05, 0x7a, 0x10, 0x34, 0xc9, 0xf4,
+++	0x66, 0xcb, 0x62, 0x12, 0xa6, 0xee, 0xe8, 0x1c,
+++	0x5d, 0x12, 0x86, 0xdb, 0x6f, 0x1c, 0x33, 0xc4,
+++	0x1c, 0xda, 0x82, 0x2d, 0x3b, 0x59, 0xfe, 0xb1,
+++	0xa4, 0x59, 0x41, 0x86, 0xd0, 0xef, 0xae, 0xfb,
+++	0xda, 0x6d, 0x11, 0xb8, 0xca, 0xe9, 0x6e, 0xff,
+++	0xf7, 0xa9, 0xd9, 0x70, 0x30, 0xfc, 0x53, 0xe2,
+++	0xd7, 0xa2, 0x4e, 0xc7, 0x91, 0xd9, 0x07, 0x06,
+++	0xaa, 0xdd, 0xb0, 0x59, 0x28, 0x1d, 0x00, 0x66,
+++	0xc5, 0x54, 0xc2, 0xfc, 0x06, 0xda, 0x05, 0x90,
+++	0x52, 0x1d, 0x37, 0x66, 0xee, 0xf0, 0xb2, 0x55,
+++	0x8a, 0x5d, 0xd2, 0x38, 0x86, 0x94, 0x9b, 0xfc,
+++	0x10, 0x4c, 0xa1, 0xb9, 0x64, 0x3e, 0x44, 0xb8,
+++	0x5f, 0xb0, 0x0c, 0xec, 0xe0, 0xc9, 0xe5, 0x62,
+++	0x75, 0x3f, 0x09, 0xd5, 0xf5, 0xd9, 0x26, 0xba,
+++	0x9e, 0xd2, 0xf4, 0xb9, 0x48, 0x0a, 0xbc, 0xa2,
+++	0xd6, 0x7c, 0x36, 0x11, 0x7d, 0x26, 0x81, 0x89,
+++	0xcf, 0xa4, 0xad, 0x73, 0x0e, 0xee, 0xcc, 0x06,
+++	0xa9, 0xdb, 0xb1, 0xfd, 0xfb, 0x09, 0x7f, 0x90,
+++	0x42, 0x37, 0x2f, 0xe1, 0x9c, 0x0f, 0x6f, 0xcf,
+++	0x43, 0xb5, 0xd9, 0x90, 0xe1, 0x85, 0xf5, 0xa8,
+++	0xae
+++};
+++static const u8 dec_output009[] __initconst = {
+++	0xe6, 0xc3, 0xdb, 0x63, 0x55, 0x15, 0xe3, 0x5b,
+++	0xb7, 0x4b, 0x27, 0x8b, 0x5a, 0xdd, 0xc2, 0xe8,
+++	0x3a, 0x6b, 0xd7, 0x81, 0x96, 0x35, 0x97, 0xca,
+++	0xd7, 0x68, 0xe8, 0xef, 0xce, 0xab, 0xda, 0x09,
+++	0x6e, 0xd6, 0x8e, 0xcb, 0x55, 0xb5, 0xe1, 0xe5,
+++	0x57, 0xfd, 0xc4, 0xe3, 0xe0, 0x18, 0x4f, 0x85,
+++	0xf5, 0x3f, 0x7e, 0x4b, 0x88, 0xc9, 0x52, 0x44,
+++	0x0f, 0xea, 0xaf, 0x1f, 0x71, 0x48, 0x9f, 0x97,
+++	0x6d, 0xb9, 0x6f, 0x00, 0xa6, 0xde, 0x2b, 0x77,
+++	0x8b, 0x15, 0xad, 0x10, 0xa0, 0x2b, 0x7b, 0x41,
+++	0x90, 0x03, 0x2d, 0x69, 0xae, 0xcc, 0x77, 0x7c,
+++	0xa5, 0x9d, 0x29, 0x22, 0xc2, 0xea, 0xb4, 0x00,
+++	0x1a, 0xd2, 0x7a, 0x98, 0x8a, 0xf9, 0xf7, 0x82,
+++	0xb0, 0xab, 0xd8, 0xa6, 0x94, 0x8d, 0x58, 0x2f,
+++	0x01, 0x9e, 0x00, 0x20, 0xfc, 0x49, 0xdc, 0x0e,
+++	0x03, 0xe8, 0x45, 0x10, 0xd6, 0xa8, 0xda, 0x55,
+++	0x10, 0x9a, 0xdf, 0x67, 0x22, 0x8b, 0x43, 0xab,
+++	0x00, 0xbb, 0x02, 0xc8, 0xdd, 0x7b, 0x97, 0x17,
+++	0xd7, 0x1d, 0x9e, 0x02, 0x5e, 0x48, 0xde, 0x8e,
+++	0xcf, 0x99, 0x07, 0x95, 0x92, 0x3c, 0x5f, 0x9f,
+++	0xc5, 0x8a, 0xc0, 0x23, 0xaa, 0xd5, 0x8c, 0x82,
+++	0x6e, 0x16, 0x92, 0xb1, 0x12, 0x17, 0x07, 0xc3,
+++	0xfb, 0x36, 0xf5, 0x6c, 0x35, 0xd6, 0x06, 0x1f,
+++	0x9f, 0xa7, 0x94, 0xa2, 0x38, 0x63, 0x9c, 0xb0,
+++	0x71, 0xb3, 0xa5, 0xd2, 0xd8, 0xba, 0x9f, 0x08,
+++	0x01, 0xb3, 0xff, 0x04, 0x97, 0x73, 0x45, 0x1b,
+++	0xd5, 0xa9, 0x9c, 0x80, 0xaf, 0x04, 0x9a, 0x85,
+++	0xdb, 0x32, 0x5b, 0x5d, 0x1a, 0xc1, 0x36, 0x28,
+++	0x10, 0x79, 0xf1, 0x3c, 0xbf, 0x1a, 0x41, 0x5c,
+++	0x4e, 0xdf, 0xb2, 0x7c, 0x79, 0x3b, 0x7a, 0x62,
+++	0x3d, 0x4b, 0xc9, 0x9b, 0x2a, 0x2e, 0x7c, 0xa2,
+++	0xb1, 0x11, 0x98, 0xa7, 0x34, 0x1a, 0x00, 0xf3,
+++	0xd1, 0xbc, 0x18, 0x22, 0xba, 0x02, 0x56, 0x62,
+++	0x31, 0x10, 0x11, 0x6d, 0xe0, 0x54, 0x9d, 0x40,
+++	0x1f, 0x26, 0x80, 0x41, 0xca, 0x3f, 0x68, 0x0f,
+++	0x32, 0x1d, 0x0a, 0x8e, 0x79, 0xd8, 0xa4, 0x1b,
+++	0x29, 0x1c, 0x90, 0x8e, 0xc5, 0xe3, 0xb4, 0x91,
+++	0x37, 0x9a, 0x97, 0x86, 0x99, 0xd5, 0x09, 0xc5,
+++	0xbb, 0xa3, 0x3f, 0x21, 0x29, 0x82, 0x14, 0x5c,
+++	0xab, 0x25, 0xfb, 0xf2, 0x4f, 0x58, 0x26, 0xd4,
+++	0x83, 0xaa, 0x66, 0x89, 0x67, 0x7e, 0xc0, 0x49,
+++	0xe1, 0x11, 0x10, 0x7f, 0x7a, 0xda, 0x29, 0x04,
+++	0xff, 0xf0, 0xcb, 0x09, 0x7c, 0x9d, 0xfa, 0x03,
+++	0x6f, 0x81, 0x09, 0x31, 0x60, 0xfb, 0x08, 0xfa,
+++	0x74, 0xd3, 0x64, 0x44, 0x7c, 0x55, 0x85, 0xec,
+++	0x9c, 0x6e, 0x25, 0xb7, 0x6c, 0xc5, 0x37, 0xb6,
+++	0x83, 0x87, 0x72, 0x95, 0x8b, 0x9d, 0xe1, 0x69,
+++	0x5c, 0x31, 0x95, 0x42, 0xa6, 0x2c, 0xd1, 0x36,
+++	0x47, 0x1f, 0xec, 0x54, 0xab, 0xa2, 0x1c, 0xd8,
+++	0x00, 0xcc, 0xbc, 0x0d, 0x65, 0xe2, 0x67, 0xbf,
+++	0xbc, 0xea, 0xee, 0x9e, 0xe4, 0x36, 0x95, 0xbe,
+++	0x73, 0xd9, 0xa6, 0xd9, 0x0f, 0xa0, 0xcc, 0x82,
+++	0x76, 0x26, 0xad, 0x5b, 0x58, 0x6c, 0x4e, 0xab,
+++	0x29, 0x64, 0xd3, 0xd9, 0xa9, 0x08, 0x8c, 0x1d,
+++	0xa1, 0x4f, 0x80, 0xd8, 0x3f, 0x94, 0xfb, 0xd3,
+++	0x7b, 0xfc, 0xd1, 0x2b, 0xc3, 0x21, 0xeb, 0xe5,
+++	0x1c, 0x84, 0x23, 0x7f, 0x4b, 0xfa, 0xdb, 0x34,
+++	0x18, 0xa2, 0xc2, 0xe5, 0x13, 0xfe, 0x6c, 0x49,
+++	0x81, 0xd2, 0x73, 0xe7, 0xe2, 0xd7, 0xe4, 0x4f,
+++	0x4b, 0x08, 0x6e, 0xb1, 0x12, 0x22, 0x10, 0x9d,
+++	0xac, 0x51, 0x1e, 0x17, 0xd9, 0x8a, 0x0b, 0x42,
+++	0x88, 0x16, 0x81, 0x37, 0x7c, 0x6a, 0xf7, 0xef,
+++	0x2d, 0xe3, 0xd9, 0xf8, 0x5f, 0xe0, 0x53, 0x27,
+++	0x74, 0xb9, 0xe2, 0xd6, 0x1c, 0x80, 0x2c, 0x52,
+++	0x65
+++};
+++static const u8 dec_assoc009[] __initconst = {
+++	0x5a, 0x27, 0xff, 0xeb, 0xdf, 0x84, 0xb2, 0x9e,
+++	0xef
+++};
+++static const u8 dec_nonce009[] __initconst = {
+++	0xef, 0x2d, 0x63, 0xee, 0x6b, 0x80, 0x8b, 0x78
+++};
+++static const u8 dec_key009[] __initconst = {
+++	0xea, 0xbc, 0x56, 0x99, 0xe3, 0x50, 0xff, 0xc5,
+++	0xcc, 0x1a, 0xd7, 0xc1, 0x57, 0x72, 0xea, 0x86,
+++	0x5b, 0x89, 0x88, 0x61, 0x3d, 0x2f, 0x9b, 0xb2,
+++	0xe7, 0x9c, 0xec, 0x74, 0x6e, 0x3e, 0xf4, 0x3b
+++};
+++
+++static const u8 dec_input010[] __initconst = {
+++	0xe5, 0x26, 0xa4, 0x3d, 0xbd, 0x33, 0xd0, 0x4b,
+++	0x6f, 0x05, 0xa7, 0x6e, 0x12, 0x7a, 0xd2, 0x74,
+++	0xa6, 0xdd, 0xbd, 0x95, 0xeb, 0xf9, 0xa4, 0xf1,
+++	0x59, 0x93, 0x91, 0x70, 0xd9, 0xfe, 0x9a, 0xcd,
+++	0x53, 0x1f, 0x3a, 0xab, 0xa6, 0x7c, 0x9f, 0xa6,
+++	0x9e, 0xbd, 0x99, 0xd9, 0xb5, 0x97, 0x44, 0xd5,
+++	0x14, 0x48, 0x4d, 0x9d, 0xc0, 0xd0, 0x05, 0x96,
+++	0xeb, 0x4c, 0x78, 0x55, 0x09, 0x08, 0x01, 0x02,
+++	0x30, 0x90, 0x7b, 0x96, 0x7a, 0x7b, 0x5f, 0x30,
+++	0x41, 0x24, 0xce, 0x68, 0x61, 0x49, 0x86, 0x57,
+++	0x82, 0xdd, 0x53, 0x1c, 0x51, 0x28, 0x2b, 0x53,
+++	0x6e, 0x2d, 0xc2, 0x20, 0x4c, 0xdd, 0x8f, 0x65,
+++	0x10, 0x20, 0x50, 0xdd, 0x9d, 0x50, 0xe5, 0x71,
+++	0x40, 0x53, 0x69, 0xfc, 0x77, 0x48, 0x11, 0xb9,
+++	0xde, 0xa4, 0x8d, 0x58, 0xe4, 0xa6, 0x1a, 0x18,
+++	0x47, 0x81, 0x7e, 0xfc, 0xdd, 0xf6, 0xef, 0xce,
+++	0x2f, 0x43, 0x68, 0xd6, 0x06, 0xe2, 0x74, 0x6a,
+++	0xad, 0x90, 0xf5, 0x37, 0xf3, 0x3d, 0x82, 0x69,
+++	0x40, 0xe9, 0x6b, 0xa7, 0x3d, 0xa8, 0x1e, 0xd2,
+++	0x02, 0x7c, 0xb7, 0x9b, 0xe4, 0xda, 0x8f, 0x95,
+++	0x06, 0xc5, 0xdf, 0x73, 0xa3, 0x20, 0x9a, 0x49,
+++	0xde, 0x9c, 0xbc, 0xee, 0x14, 0x3f, 0x81, 0x5e,
+++	0xf8, 0x3b, 0x59, 0x3c, 0xe1, 0x68, 0x12, 0x5a,
+++	0x3a, 0x76, 0x3a, 0x3f, 0xf7, 0x87, 0x33, 0x0a,
+++	0x01, 0xb8, 0xd4, 0xed, 0xb6, 0xbe, 0x94, 0x5e,
+++	0x70, 0x40, 0x56, 0x67, 0x1f, 0x50, 0x44, 0x19,
+++	0xce, 0x82, 0x70, 0x10, 0x87, 0x13, 0x20, 0x0b,
+++	0x4c, 0x5a, 0xb6, 0xf6, 0xa7, 0xae, 0x81, 0x75,
+++	0x01, 0x81, 0xe6, 0x4b, 0x57, 0x7c, 0xdd, 0x6d,
+++	0xf8, 0x1c, 0x29, 0x32, 0xf7, 0xda, 0x3c, 0x2d,
+++	0xf8, 0x9b, 0x25, 0x6e, 0x00, 0xb4, 0xf7, 0x2f,
+++	0xf7, 0x04, 0xf7, 0xa1, 0x56, 0xac, 0x4f, 0x1a,
+++	0x64, 0xb8, 0x47, 0x55, 0x18, 0x7b, 0x07, 0x4d,
+++	0xbd, 0x47, 0x24, 0x80, 0x5d, 0xa2, 0x70, 0xc5,
+++	0xdd, 0x8e, 0x82, 0xd4, 0xeb, 0xec, 0xb2, 0x0c,
+++	0x39, 0xd2, 0x97, 0xc1, 0xcb, 0xeb, 0xf4, 0x77,
+++	0x59, 0xb4, 0x87, 0xef, 0xcb, 0x43, 0x2d, 0x46,
+++	0x54, 0xd1, 0xa7, 0xd7, 0x15, 0x99, 0x0a, 0x43,
+++	0xa1, 0xe0, 0x99, 0x33, 0x71, 0xc1, 0xed, 0xfe,
+++	0x72, 0x46, 0x33, 0x8e, 0x91, 0x08, 0x9f, 0xc8,
+++	0x2e, 0xca, 0xfa, 0xdc, 0x59, 0xd5, 0xc3, 0x76,
+++	0x84, 0x9f, 0xa3, 0x37, 0x68, 0xc3, 0xf0, 0x47,
+++	0x2c, 0x68, 0xdb, 0x5e, 0xc3, 0x49, 0x4c, 0xe8,
+++	0x92, 0x85, 0xe2, 0x23, 0xd3, 0x3f, 0xad, 0x32,
+++	0xe5, 0x2b, 0x82, 0xd7, 0x8f, 0x99, 0x0a, 0x59,
+++	0x5c, 0x45, 0xd9, 0xb4, 0x51, 0x52, 0xc2, 0xae,
+++	0xbf, 0x80, 0xcf, 0xc9, 0xc9, 0x51, 0x24, 0x2a,
+++	0x3b, 0x3a, 0x4d, 0xae, 0xeb, 0xbd, 0x22, 0xc3,
+++	0x0e, 0x0f, 0x59, 0x25, 0x92, 0x17, 0xe9, 0x74,
+++	0xc7, 0x8b, 0x70, 0x70, 0x36, 0x55, 0x95, 0x75,
+++	0x4b, 0xad, 0x61, 0x2b, 0x09, 0xbc, 0x82, 0xf2,
+++	0x6e, 0x94, 0x43, 0xae, 0xc3, 0xd5, 0xcd, 0x8e,
+++	0xfe, 0x5b, 0x9a, 0x88, 0x43, 0x01, 0x75, 0xb2,
+++	0x23, 0x09, 0xf7, 0x89, 0x83, 0xe7, 0xfa, 0xf9,
+++	0xb4, 0x9b, 0xf8, 0xef, 0xbd, 0x1c, 0x92, 0xc1,
+++	0xda, 0x7e, 0xfe, 0x05, 0xba, 0x5a, 0xcd, 0x07,
+++	0x6a, 0x78, 0x9e, 0x5d, 0xfb, 0x11, 0x2f, 0x79,
+++	0x38, 0xb6, 0xc2, 0x5b, 0x6b, 0x51, 0xb4, 0x71,
+++	0xdd, 0xf7, 0x2a, 0xe4, 0xf4, 0x72, 0x76, 0xad,
+++	0xc2, 0xdd, 0x64, 0x5d, 0x79, 0xb6, 0xf5, 0x7a,
+++	0x77, 0x20, 0x05, 0x3d, 0x30, 0x06, 0xd4, 0x4c,
+++	0x0a, 0x2c, 0x98, 0x5a, 0xb9, 0xd4, 0x98, 0xa9,
+++	0x3f, 0xc6, 0x12, 0xea, 0x3b, 0x4b, 0xc5, 0x79,
+++	0x64, 0x63, 0x6b, 0x09, 0x54, 0x3b, 0x14, 0x27,
+++	0xba, 0x99, 0x80, 0xc8, 0x72, 0xa8, 0x12, 0x90,
+++	0x29, 0xba, 0x40, 0x54, 0x97, 0x2b, 0x7b, 0xfe,
+++	0xeb, 0xcd, 0x01, 0x05, 0x44, 0x72, 0xdb, 0x99,
+++	0xe4, 0x61, 0xc9, 0x69, 0xd6, 0xb9, 0x28, 0xd1,
+++	0x05, 0x3e, 0xf9, 0x0b, 0x49, 0x0a, 0x49, 0xe9,
+++	0x8d, 0x0e, 0xa7, 0x4a, 0x0f, 0xaf, 0x32, 0xd0,
+++	0xe0, 0xb2, 0x3a, 0x55, 0x58, 0xfe, 0x5c, 0x28,
+++	0x70, 0x51, 0x23, 0xb0, 0x7b, 0x6a, 0x5f, 0x1e,
+++	0xb8, 0x17, 0xd7, 0x94, 0x15, 0x8f, 0xee, 0x20,
+++	0xc7, 0x42, 0x25, 0x3e, 0x9a, 0x14, 0xd7, 0x60,
+++	0x72, 0x39, 0x47, 0x48, 0xa9, 0xfe, 0xdd, 0x47,
+++	0x0a, 0xb1, 0xe6, 0x60, 0x28, 0x8c, 0x11, 0x68,
+++	0xe1, 0xff, 0xd7, 0xce, 0xc8, 0xbe, 0xb3, 0xfe,
+++	0x27, 0x30, 0x09, 0x70, 0xd7, 0xfa, 0x02, 0x33,
+++	0x3a, 0x61, 0x2e, 0xc7, 0xff, 0xa4, 0x2a, 0xa8,
+++	0x6e, 0xb4, 0x79, 0x35, 0x6d, 0x4c, 0x1e, 0x38,
+++	0xf8, 0xee, 0xd4, 0x84, 0x4e, 0x6e, 0x28, 0xa7,
+++	0xce, 0xc8, 0xc1, 0xcf, 0x80, 0x05, 0xf3, 0x04,
+++	0xef, 0xc8, 0x18, 0x28, 0x2e, 0x8d, 0x5e, 0x0c,
+++	0xdf, 0xb8, 0x5f, 0x96, 0xe8, 0xc6, 0x9c, 0x2f,
+++	0xe5, 0xa6, 0x44, 0xd7, 0xe7, 0x99, 0x44, 0x0c,
+++	0xec, 0xd7, 0x05, 0x60, 0x97, 0xbb, 0x74, 0x77,
+++	0x58, 0xd5, 0xbb, 0x48, 0xde, 0x5a, 0xb2, 0x54,
+++	0x7f, 0x0e, 0x46, 0x70, 0x6a, 0x6f, 0x78, 0xa5,
+++	0x08, 0x89, 0x05, 0x4e, 0x7e, 0xa0, 0x69, 0xb4,
+++	0x40, 0x60, 0x55, 0x77, 0x75, 0x9b, 0x19, 0xf2,
+++	0xd5, 0x13, 0x80, 0x77, 0xf9, 0x4b, 0x3f, 0x1e,
+++	0xee, 0xe6, 0x76, 0x84, 0x7b, 0x8c, 0xe5, 0x27,
+++	0xa8, 0x0a, 0x91, 0x01, 0x68, 0x71, 0x8a, 0x3f,
+++	0x06, 0xab, 0xf6, 0xa9, 0xa5, 0xe6, 0x72, 0x92,
+++	0xe4, 0x67, 0xe2, 0xa2, 0x46, 0x35, 0x84, 0x55,
+++	0x7d, 0xca, 0xa8, 0x85, 0xd0, 0xf1, 0x3f, 0xbe,
+++	0xd7, 0x34, 0x64, 0xfc, 0xae, 0xe3, 0xe4, 0x04,
+++	0x9f, 0x66, 0x02, 0xb9, 0x88, 0x10, 0xd9, 0xc4,
+++	0x4c, 0x31, 0x43, 0x7a, 0x93, 0xe2, 0x9b, 0x56,
+++	0x43, 0x84, 0xdc, 0xdc, 0xde, 0x1d, 0xa4, 0x02,
+++	0x0e, 0xc2, 0xef, 0xc3, 0xf8, 0x78, 0xd1, 0xb2,
+++	0x6b, 0x63, 0x18, 0xc9, 0xa9, 0xe5, 0x72, 0xd8,
+++	0xf3, 0xb9, 0xd1, 0x8a, 0xc7, 0x1a, 0x02, 0x27,
+++	0x20, 0x77, 0x10, 0xe5, 0xc8, 0xd4, 0x4a, 0x47,
+++	0xe5, 0xdf, 0x5f, 0x01, 0xaa, 0xb0, 0xd4, 0x10,
+++	0xbb, 0x69, 0xe3, 0x36, 0xc8, 0xe1, 0x3d, 0x43,
+++	0xfb, 0x86, 0xcd, 0xcc, 0xbf, 0xf4, 0x88, 0xe0,
+++	0x20, 0xca, 0xb7, 0x1b, 0xf1, 0x2f, 0x5c, 0xee,
+++	0xd4, 0xd3, 0xa3, 0xcc, 0xa4, 0x1e, 0x1c, 0x47,
+++	0xfb, 0xbf, 0xfc, 0xa2, 0x41, 0x55, 0x9d, 0xf6,
+++	0x5a, 0x5e, 0x65, 0x32, 0x34, 0x7b, 0x52, 0x8d,
+++	0xd5, 0xd0, 0x20, 0x60, 0x03, 0xab, 0x3f, 0x8c,
+++	0xd4, 0x21, 0xea, 0x2a, 0xd9, 0xc4, 0xd0, 0xd3,
+++	0x65, 0xd8, 0x7a, 0x13, 0x28, 0x62, 0x32, 0x4b,
+++	0x2c, 0x87, 0x93, 0xa8, 0xb4, 0x52, 0x45, 0x09,
+++	0x44, 0xec, 0xec, 0xc3, 0x17, 0xdb, 0x9a, 0x4d,
+++	0x5c, 0xa9, 0x11, 0xd4, 0x7d, 0xaf, 0x9e, 0xf1,
+++	0x2d, 0xb2, 0x66, 0xc5, 0x1d, 0xed, 0xb7, 0xcd,
+++	0x0b, 0x25, 0x5e, 0x30, 0x47, 0x3f, 0x40, 0xf4,
+++	0xa1, 0xa0, 0x00, 0x94, 0x10, 0xc5, 0x6a, 0x63,
+++	0x1a, 0xd5, 0x88, 0x92, 0x8e, 0x82, 0x39, 0x87,
+++	0x3c, 0x78, 0x65, 0x58, 0x42, 0x75, 0x5b, 0xdd,
+++	0x77, 0x3e, 0x09, 0x4e, 0x76, 0x5b, 0xe6, 0x0e,
+++	0x4d, 0x38, 0xb2, 0xc0, 0xb8, 0x95, 0x01, 0x7a,
+++	0x10, 0xe0, 0xfb, 0x07, 0xf2, 0xab, 0x2d, 0x8c,
+++	0x32, 0xed, 0x2b, 0xc0, 0x46, 0xc2, 0xf5, 0x38,
+++	0x83, 0xf0, 0x17, 0xec, 0xc1, 0x20, 0x6a, 0x9a,
+++	0x0b, 0x00, 0xa0, 0x98, 0x22, 0x50, 0x23, 0xd5,
+++	0x80, 0x6b, 0xf6, 0x1f, 0xc3, 0xcc, 0x97, 0xc9,
+++	0x24, 0x9f, 0xf3, 0xaf, 0x43, 0x14, 0xd5, 0xa0
+++};
+++static const u8 dec_output010[] __initconst = {
+++	0x42, 0x93, 0xe4, 0xeb, 0x97, 0xb0, 0x57, 0xbf,
+++	0x1a, 0x8b, 0x1f, 0xe4, 0x5f, 0x36, 0x20, 0x3c,
+++	0xef, 0x0a, 0xa9, 0x48, 0x5f, 0x5f, 0x37, 0x22,
+++	0x3a, 0xde, 0xe3, 0xae, 0xbe, 0xad, 0x07, 0xcc,
+++	0xb1, 0xf6, 0xf5, 0xf9, 0x56, 0xdd, 0xe7, 0x16,
+++	0x1e, 0x7f, 0xdf, 0x7a, 0x9e, 0x75, 0xb7, 0xc7,
+++	0xbe, 0xbe, 0x8a, 0x36, 0x04, 0xc0, 0x10, 0xf4,
+++	0x95, 0x20, 0x03, 0xec, 0xdc, 0x05, 0xa1, 0x7d,
+++	0xc4, 0xa9, 0x2c, 0x82, 0xd0, 0xbc, 0x8b, 0xc5,
+++	0xc7, 0x45, 0x50, 0xf6, 0xa2, 0x1a, 0xb5, 0x46,
+++	0x3b, 0x73, 0x02, 0xa6, 0x83, 0x4b, 0x73, 0x82,
+++	0x58, 0x5e, 0x3b, 0x65, 0x2f, 0x0e, 0xfd, 0x2b,
+++	0x59, 0x16, 0xce, 0xa1, 0x60, 0x9c, 0xe8, 0x3a,
+++	0x99, 0xed, 0x8d, 0x5a, 0xcf, 0xf6, 0x83, 0xaf,
+++	0xba, 0xd7, 0x73, 0x73, 0x40, 0x97, 0x3d, 0xca,
+++	0xef, 0x07, 0x57, 0xe6, 0xd9, 0x70, 0x0e, 0x95,
+++	0xae, 0xa6, 0x8d, 0x04, 0xcc, 0xee, 0xf7, 0x09,
+++	0x31, 0x77, 0x12, 0xa3, 0x23, 0x97, 0x62, 0xb3,
+++	0x7b, 0x32, 0xfb, 0x80, 0x14, 0x48, 0x81, 0xc3,
+++	0xe5, 0xea, 0x91, 0x39, 0x52, 0x81, 0xa2, 0x4f,
+++	0xe4, 0xb3, 0x09, 0xff, 0xde, 0x5e, 0xe9, 0x58,
+++	0x84, 0x6e, 0xf9, 0x3d, 0xdf, 0x25, 0xea, 0xad,
+++	0xae, 0xe6, 0x9a, 0xd1, 0x89, 0x55, 0xd3, 0xde,
+++	0x6c, 0x52, 0xdb, 0x70, 0xfe, 0x37, 0xce, 0x44,
+++	0x0a, 0xa8, 0x25, 0x5f, 0x92, 0xc1, 0x33, 0x4a,
+++	0x4f, 0x9b, 0x62, 0x35, 0xff, 0xce, 0xc0, 0xa9,
+++	0x60, 0xce, 0x52, 0x00, 0x97, 0x51, 0x35, 0x26,
+++	0x2e, 0xb9, 0x36, 0xa9, 0x87, 0x6e, 0x1e, 0xcc,
+++	0x91, 0x78, 0x53, 0x98, 0x86, 0x5b, 0x9c, 0x74,
+++	0x7d, 0x88, 0x33, 0xe1, 0xdf, 0x37, 0x69, 0x2b,
+++	0xbb, 0xf1, 0x4d, 0xf4, 0xd1, 0xf1, 0x39, 0x93,
+++	0x17, 0x51, 0x19, 0xe3, 0x19, 0x1e, 0x76, 0x37,
+++	0x25, 0xfb, 0x09, 0x27, 0x6a, 0xab, 0x67, 0x6f,
+++	0x14, 0x12, 0x64, 0xe7, 0xc4, 0x07, 0xdf, 0x4d,
+++	0x17, 0xbb, 0x6d, 0xe0, 0xe9, 0xb9, 0xab, 0xca,
+++	0x10, 0x68, 0xaf, 0x7e, 0xb7, 0x33, 0x54, 0x73,
+++	0x07, 0x6e, 0xf7, 0x81, 0x97, 0x9c, 0x05, 0x6f,
+++	0x84, 0x5f, 0xd2, 0x42, 0xfb, 0x38, 0xcf, 0xd1,
+++	0x2f, 0x14, 0x30, 0x88, 0x98, 0x4d, 0x5a, 0xa9,
+++	0x76, 0xd5, 0x4f, 0x3e, 0x70, 0x6c, 0x85, 0x76,
+++	0xd7, 0x01, 0xa0, 0x1a, 0xc8, 0x4e, 0xaa, 0xac,
+++	0x78, 0xfe, 0x46, 0xde, 0x6a, 0x05, 0x46, 0xa7,
+++	0x43, 0x0c, 0xb9, 0xde, 0xb9, 0x68, 0xfb, 0xce,
+++	0x42, 0x99, 0x07, 0x4d, 0x0b, 0x3b, 0x5a, 0x30,
+++	0x35, 0xa8, 0xf9, 0x3a, 0x73, 0xef, 0x0f, 0xdb,
+++	0x1e, 0x16, 0x42, 0xc4, 0xba, 0xae, 0x58, 0xaa,
+++	0xf8, 0xe5, 0x75, 0x2f, 0x1b, 0x15, 0x5c, 0xfd,
+++	0x0a, 0x97, 0xd0, 0xe4, 0x37, 0x83, 0x61, 0x5f,
+++	0x43, 0xa6, 0xc7, 0x3f, 0x38, 0x59, 0xe6, 0xeb,
+++	0xa3, 0x90, 0xc3, 0xaa, 0xaa, 0x5a, 0xd3, 0x34,
+++	0xd4, 0x17, 0xc8, 0x65, 0x3e, 0x57, 0xbc, 0x5e,
+++	0xdd, 0x9e, 0xb7, 0xf0, 0x2e, 0x5b, 0xb2, 0x1f,
+++	0x8a, 0x08, 0x0d, 0x45, 0x91, 0x0b, 0x29, 0x53,
+++	0x4f, 0x4c, 0x5a, 0x73, 0x56, 0xfe, 0xaf, 0x41,
+++	0x01, 0x39, 0x0a, 0x24, 0x3c, 0x7e, 0xbe, 0x4e,
+++	0x53, 0xf3, 0xeb, 0x06, 0x66, 0x51, 0x28, 0x1d,
+++	0xbd, 0x41, 0x0a, 0x01, 0xab, 0x16, 0x47, 0x27,
+++	0x47, 0x47, 0xf7, 0xcb, 0x46, 0x0a, 0x70, 0x9e,
+++	0x01, 0x9c, 0x09, 0xe1, 0x2a, 0x00, 0x1a, 0xd8,
+++	0xd4, 0x79, 0x9d, 0x80, 0x15, 0x8e, 0x53, 0x2a,
+++	0x65, 0x83, 0x78, 0x3e, 0x03, 0x00, 0x07, 0x12,
+++	0x1f, 0x33, 0x3e, 0x7b, 0x13, 0x37, 0xf1, 0xc3,
+++	0xef, 0xb7, 0xc1, 0x20, 0x3c, 0x3e, 0x67, 0x66,
+++	0x5d, 0x88, 0xa7, 0x7d, 0x33, 0x50, 0x77, 0xb0,
+++	0x28, 0x8e, 0xe7, 0x2c, 0x2e, 0x7a, 0xf4, 0x3c,
+++	0x8d, 0x74, 0x83, 0xaf, 0x8e, 0x87, 0x0f, 0xe4,
+++	0x50, 0xff, 0x84, 0x5c, 0x47, 0x0c, 0x6a, 0x49,
+++	0xbf, 0x42, 0x86, 0x77, 0x15, 0x48, 0xa5, 0x90,
+++	0x5d, 0x93, 0xd6, 0x2a, 0x11, 0xd5, 0xd5, 0x11,
+++	0xaa, 0xce, 0xe7, 0x6f, 0xa5, 0xb0, 0x09, 0x2c,
+++	0x8d, 0xd3, 0x92, 0xf0, 0x5a, 0x2a, 0xda, 0x5b,
+++	0x1e, 0xd5, 0x9a, 0xc4, 0xc4, 0xf3, 0x49, 0x74,
+++	0x41, 0xca, 0xe8, 0xc1, 0xf8, 0x44, 0xd6, 0x3c,
+++	0xae, 0x6c, 0x1d, 0x9a, 0x30, 0x04, 0x4d, 0x27,
+++	0x0e, 0xb1, 0x5f, 0x59, 0xa2, 0x24, 0xe8, 0xe1,
+++	0x98, 0xc5, 0x6a, 0x4c, 0xfe, 0x41, 0xd2, 0x27,
+++	0x42, 0x52, 0xe1, 0xe9, 0x7d, 0x62, 0xe4, 0x88,
+++	0x0f, 0xad, 0xb2, 0x70, 0xcb, 0x9d, 0x4c, 0x27,
+++	0x2e, 0x76, 0x1e, 0x1a, 0x63, 0x65, 0xf5, 0x3b,
+++	0xf8, 0x57, 0x69, 0xeb, 0x5b, 0x38, 0x26, 0x39,
+++	0x33, 0x25, 0x45, 0x3e, 0x91, 0xb8, 0xd8, 0xc7,
+++	0xd5, 0x42, 0xc0, 0x22, 0x31, 0x74, 0xf4, 0xbc,
+++	0x0c, 0x23, 0xf1, 0xca, 0xc1, 0x8d, 0xd7, 0xbe,
+++	0xc9, 0x62, 0xe4, 0x08, 0x1a, 0xcf, 0x36, 0xd5,
+++	0xfe, 0x55, 0x21, 0x59, 0x91, 0x87, 0x87, 0xdf,
+++	0x06, 0xdb, 0xdf, 0x96, 0x45, 0x58, 0xda, 0x05,
+++	0xcd, 0x50, 0x4d, 0xd2, 0x7d, 0x05, 0x18, 0x73,
+++	0x6a, 0x8d, 0x11, 0x85, 0xa6, 0x88, 0xe8, 0xda,
+++	0xe6, 0x30, 0x33, 0xa4, 0x89, 0x31, 0x75, 0xbe,
+++	0x69, 0x43, 0x84, 0x43, 0x50, 0x87, 0xdd, 0x71,
+++	0x36, 0x83, 0xc3, 0x78, 0x74, 0x24, 0x0a, 0xed,
+++	0x7b, 0xdb, 0xa4, 0x24, 0x0b, 0xb9, 0x7e, 0x5d,
+++	0xff, 0xde, 0xb1, 0xef, 0x61, 0x5a, 0x45, 0x33,
+++	0xf6, 0x17, 0x07, 0x08, 0x98, 0x83, 0x92, 0x0f,
+++	0x23, 0x6d, 0xe6, 0xaa, 0x17, 0x54, 0xad, 0x6a,
+++	0xc8, 0xdb, 0x26, 0xbe, 0xb8, 0xb6, 0x08, 0xfa,
+++	0x68, 0xf1, 0xd7, 0x79, 0x6f, 0x18, 0xb4, 0x9e,
+++	0x2d, 0x3f, 0x1b, 0x64, 0xaf, 0x8d, 0x06, 0x0e,
+++	0x49, 0x28, 0xe0, 0x5d, 0x45, 0x68, 0x13, 0x87,
+++	0xfa, 0xde, 0x40, 0x7b, 0xd2, 0xc3, 0x94, 0xd5,
+++	0xe1, 0xd9, 0xc2, 0xaf, 0x55, 0x89, 0xeb, 0xb4,
+++	0x12, 0x59, 0xa8, 0xd4, 0xc5, 0x29, 0x66, 0x38,
+++	0xe6, 0xac, 0x22, 0x22, 0xd9, 0x64, 0x9b, 0x34,
+++	0x0a, 0x32, 0x9f, 0xc2, 0xbf, 0x17, 0x6c, 0x3f,
+++	0x71, 0x7a, 0x38, 0x6b, 0x98, 0xfb, 0x49, 0x36,
+++	0x89, 0xc9, 0xe2, 0xd6, 0xc7, 0x5d, 0xd0, 0x69,
+++	0x5f, 0x23, 0x35, 0xc9, 0x30, 0xe2, 0xfd, 0x44,
+++	0x58, 0x39, 0xd7, 0x97, 0xfb, 0x5c, 0x00, 0xd5,
+++	0x4f, 0x7a, 0x1a, 0x95, 0x8b, 0x62, 0x4b, 0xce,
+++	0xe5, 0x91, 0x21, 0x7b, 0x30, 0x00, 0xd6, 0xdd,
+++	0x6d, 0x02, 0x86, 0x49, 0x0f, 0x3c, 0x1a, 0x27,
+++	0x3c, 0xd3, 0x0e, 0x71, 0xf2, 0xff, 0xf5, 0x2f,
+++	0x87, 0xac, 0x67, 0x59, 0x81, 0xa3, 0xf7, 0xf8,
+++	0xd6, 0x11, 0x0c, 0x84, 0xa9, 0x03, 0xee, 0x2a,
+++	0xc4, 0xf3, 0x22, 0xab, 0x7c, 0xe2, 0x25, 0xf5,
+++	0x67, 0xa3, 0xe4, 0x11, 0xe0, 0x59, 0xb3, 0xca,
+++	0x87, 0xa0, 0xae, 0xc9, 0xa6, 0x62, 0x1b, 0x6e,
+++	0x4d, 0x02, 0x6b, 0x07, 0x9d, 0xfd, 0xd0, 0x92,
+++	0x06, 0xe1, 0xb2, 0x9a, 0x4a, 0x1f, 0x1f, 0x13,
+++	0x49, 0x99, 0x97, 0x08, 0xde, 0x7f, 0x98, 0xaf,
+++	0x51, 0x98, 0xee, 0x2c, 0xcb, 0xf0, 0x0b, 0xc6,
+++	0xb6, 0xb7, 0x2d, 0x9a, 0xb1, 0xac, 0xa6, 0xe3,
+++	0x15, 0x77, 0x9d, 0x6b, 0x1a, 0xe4, 0xfc, 0x8b,
+++	0xf2, 0x17, 0x59, 0x08, 0x04, 0x58, 0x81, 0x9d,
+++	0x1b, 0x1b, 0x69, 0x55, 0xc2, 0xb4, 0x3c, 0x1f,
+++	0x50, 0xf1, 0x7f, 0x77, 0x90, 0x4c, 0x66, 0x40,
+++	0x5a, 0xc0, 0x33, 0x1f, 0xcb, 0x05, 0x6d, 0x5c,
+++	0x06, 0x87, 0x52, 0xa2, 0x8f, 0x26, 0xd5, 0x4f
+++};
+++static const u8 dec_assoc010[] __initconst = {
+++	0xd2, 0xa1, 0x70, 0xdb, 0x7a, 0xf8, 0xfa, 0x27,
+++	0xba, 0x73, 0x0f, 0xbf, 0x3d, 0x1e, 0x82, 0xb2
+++};
+++static const u8 dec_nonce010[] __initconst = {
+++	0xdb, 0x92, 0x0f, 0x7f, 0x17, 0x54, 0x0c, 0x30
+++};
+++static const u8 dec_key010[] __initconst = {
+++	0x47, 0x11, 0xeb, 0x86, 0x2b, 0x2c, 0xab, 0x44,
+++	0x34, 0xda, 0x7f, 0x57, 0x03, 0x39, 0x0c, 0xaf,
+++	0x2c, 0x14, 0xfd, 0x65, 0x23, 0xe9, 0x8e, 0x74,
+++	0xd5, 0x08, 0x68, 0x08, 0xe7, 0xb4, 0x72, 0xd7
+++};
+++
+++static const u8 dec_input011[] __initconst = {
+++	0x6a, 0xfc, 0x4b, 0x25, 0xdf, 0xc0, 0xe4, 0xe8,
+++	0x17, 0x4d, 0x4c, 0xc9, 0x7e, 0xde, 0x3a, 0xcc,
+++	0x3c, 0xba, 0x6a, 0x77, 0x47, 0xdb, 0xe3, 0x74,
+++	0x7a, 0x4d, 0x5f, 0x8d, 0x37, 0x55, 0x80, 0x73,
+++	0x90, 0x66, 0x5d, 0x3a, 0x7d, 0x5d, 0x86, 0x5e,
+++	0x8d, 0xfd, 0x83, 0xff, 0x4e, 0x74, 0x6f, 0xf9,
+++	0xe6, 0x70, 0x17, 0x70, 0x3e, 0x96, 0xa7, 0x7e,
+++	0xcb, 0xab, 0x8f, 0x58, 0x24, 0x9b, 0x01, 0xfd,
+++	0xcb, 0xe6, 0x4d, 0x9b, 0xf0, 0x88, 0x94, 0x57,
+++	0x66, 0xef, 0x72, 0x4c, 0x42, 0x6e, 0x16, 0x19,
+++	0x15, 0xea, 0x70, 0x5b, 0xac, 0x13, 0xdb, 0x9f,
+++	0x18, 0xe2, 0x3c, 0x26, 0x97, 0xbc, 0xdc, 0x45,
+++	0x8c, 0x6c, 0x24, 0x69, 0x9c, 0xf7, 0x65, 0x1e,
+++	0x18, 0x59, 0x31, 0x7c, 0xe4, 0x73, 0xbc, 0x39,
+++	0x62, 0xc6, 0x5c, 0x9f, 0xbf, 0xfa, 0x90, 0x03,
+++	0xc9, 0x72, 0x26, 0xb6, 0x1b, 0xc2, 0xb7, 0x3f,
+++	0xf2, 0x13, 0x77, 0xf2, 0x8d, 0xb9, 0x47, 0xd0,
+++	0x53, 0xdd, 0xc8, 0x91, 0x83, 0x8b, 0xb1, 0xce,
+++	0xa3, 0xfe, 0xcd, 0xd9, 0xdd, 0x92, 0x7b, 0xdb,
+++	0xb8, 0xfb, 0xc9, 0x2d, 0x01, 0x59, 0x39, 0x52,
+++	0xad, 0x1b, 0xec, 0xcf, 0xd7, 0x70, 0x13, 0x21,
+++	0xf5, 0x47, 0xaa, 0x18, 0x21, 0x5c, 0xc9, 0x9a,
+++	0xd2, 0x6b, 0x05, 0x9c, 0x01, 0xa1, 0xda, 0x35,
+++	0x5d, 0xb3, 0x70, 0xe6, 0xa9, 0x80, 0x8b, 0x91,
+++	0xb7, 0xb3, 0x5f, 0x24, 0x9a, 0xb7, 0xd1, 0x6b,
+++	0xa1, 0x1c, 0x50, 0xba, 0x49, 0xe0, 0xee, 0x2e,
+++	0x75, 0xac, 0x69, 0xc0, 0xeb, 0x03, 0xdd, 0x19,
+++	0xe5, 0xf6, 0x06, 0xdd, 0xc3, 0xd7, 0x2b, 0x07,
+++	0x07, 0x30, 0xa7, 0x19, 0x0c, 0xbf, 0xe6, 0x18,
+++	0xcc, 0xb1, 0x01, 0x11, 0x85, 0x77, 0x1d, 0x96,
+++	0xa7, 0xa3, 0x00, 0x84, 0x02, 0xa2, 0x83, 0x68,
+++	0xda, 0x17, 0x27, 0xc8, 0x7f, 0x23, 0xb7, 0xf4,
+++	0x13, 0x85, 0xcf, 0xdd, 0x7a, 0x7d, 0x24, 0x57,
+++	0xfe, 0x05, 0x93, 0xf5, 0x74, 0xce, 0xed, 0x0c,
+++	0x20, 0x98, 0x8d, 0x92, 0x30, 0xa1, 0x29, 0x23,
+++	0x1a, 0xa0, 0x4f, 0x69, 0x56, 0x4c, 0xe1, 0xc8,
+++	0xce, 0xf6, 0x9a, 0x0c, 0xa4, 0xfa, 0x04, 0xf6,
+++	0x62, 0x95, 0xf2, 0xfa, 0xc7, 0x40, 0x68, 0x40,
+++	0x8f, 0x41, 0xda, 0xb4, 0x26, 0x6f, 0x70, 0xab,
+++	0x40, 0x61, 0xa4, 0x0e, 0x75, 0xfb, 0x86, 0xeb,
+++	0x9d, 0x9a, 0x1f, 0xec, 0x76, 0x99, 0xe7, 0xea,
+++	0xaa, 0x1e, 0x2d, 0xb5, 0xd4, 0xa6, 0x1a, 0xb8,
+++	0x61, 0x0a, 0x1d, 0x16, 0x5b, 0x98, 0xc2, 0x31,
+++	0x40, 0xe7, 0x23, 0x1d, 0x66, 0x99, 0xc8, 0xc0,
+++	0xd7, 0xce, 0xf3, 0x57, 0x40, 0x04, 0x3f, 0xfc,
+++	0xea, 0xb3, 0xfc, 0xd2, 0xd3, 0x99, 0xa4, 0x94,
+++	0x69, 0xa0, 0xef, 0xd1, 0x85, 0xb3, 0xa6, 0xb1,
+++	0x28, 0xbf, 0x94, 0x67, 0x22, 0xc3, 0x36, 0x46,
+++	0xf8, 0xd2, 0x0f, 0x5f, 0xf4, 0x59, 0x80, 0xe6,
+++	0x2d, 0x43, 0x08, 0x7d, 0x19, 0x09, 0x97, 0xa7,
+++	0x4c, 0x3d, 0x8d, 0xba, 0x65, 0x62, 0xa3, 0x71,
+++	0x33, 0x29, 0x62, 0xdb, 0xc1, 0x33, 0x34, 0x1a,
+++	0x63, 0x33, 0x16, 0xb6, 0x64, 0x7e, 0xab, 0x33,
+++	0xf0, 0xe6, 0x26, 0x68, 0xba, 0x1d, 0x2e, 0x38,
+++	0x08, 0xe6, 0x02, 0xd3, 0x25, 0x2c, 0x47, 0x23,
+++	0x58, 0x34, 0x0f, 0x9d, 0x63, 0x4f, 0x63, 0xbb,
+++	0x7f, 0x3b, 0x34, 0x38, 0xa7, 0xb5, 0x8d, 0x65,
+++	0xd9, 0x9f, 0x79, 0x55, 0x3e, 0x4d, 0xe7, 0x73,
+++	0xd8, 0xf6, 0x98, 0x97, 0x84, 0x60, 0x9c, 0xc8,
+++	0xa9, 0x3c, 0xf6, 0xdc, 0x12, 0x5c, 0xe1, 0xbb,
+++	0x0b, 0x8b, 0x98, 0x9c, 0x9d, 0x26, 0x7c, 0x4a,
+++	0xe6, 0x46, 0x36, 0x58, 0x21, 0x4a, 0xee, 0xca,
+++	0xd7, 0x3b, 0xc2, 0x6c, 0x49, 0x2f, 0xe5, 0xd5,
+++	0x03, 0x59, 0x84, 0x53, 0xcb, 0xfe, 0x92, 0x71,
+++	0x2e, 0x7c, 0x21, 0xcc, 0x99, 0x85, 0x7f, 0xb8,
+++	0x74, 0x90, 0x13, 0x42, 0x3f, 0xe0, 0x6b, 0x1d,
+++	0xf2, 0x4d, 0x54, 0xd4, 0xfc, 0x3a, 0x05, 0xe6,
+++	0x74, 0xaf, 0xa6, 0xa0, 0x2a, 0x20, 0x23, 0x5d,
+++	0x34, 0x5c, 0xd9, 0x3e, 0x4e, 0xfa, 0x93, 0xe7,
+++	0xaa, 0xe9, 0x6f, 0x08, 0x43, 0x67, 0x41, 0xc5,
+++	0xad, 0xfb, 0x31, 0x95, 0x82, 0x73, 0x32, 0xd8,
+++	0xa6, 0xa3, 0xed, 0x0e, 0x2d, 0xf6, 0x5f, 0xfd,
+++	0x80, 0xa6, 0x7a, 0xe0, 0xdf, 0x78, 0x15, 0x29,
+++	0x74, 0x33, 0xd0, 0x9e, 0x83, 0x86, 0x72, 0x22,
+++	0x57, 0x29, 0xb9, 0x9e, 0x5d, 0xd3, 0x1a, 0xb5,
+++	0x96, 0x72, 0x41, 0x3d, 0xf1, 0x64, 0x43, 0x67,
+++	0xee, 0xaa, 0x5c, 0xd3, 0x9a, 0x96, 0x13, 0x11,
+++	0x5d, 0xf3, 0x0c, 0x87, 0x82, 0x1e, 0x41, 0x9e,
+++	0xd0, 0x27, 0xd7, 0x54, 0x3b, 0x67, 0x73, 0x09,
+++	0x91, 0xe9, 0xd5, 0x36, 0xa7, 0xb5, 0x55, 0xe4,
+++	0xf3, 0x21, 0x51, 0x49, 0x22, 0x07, 0x55, 0x4f,
+++	0x44, 0x4b, 0xd2, 0x15, 0x93, 0x17, 0x2a, 0xfa,
+++	0x4d, 0x4a, 0x57, 0xdb, 0x4c, 0xa6, 0xeb, 0xec,
+++	0x53, 0x25, 0x6c, 0x21, 0xed, 0x00, 0x4c, 0x3b,
+++	0xca, 0x14, 0x57, 0xa9, 0xd6, 0x6a, 0xcd, 0x8d,
+++	0x5e, 0x74, 0xac, 0x72, 0xc1, 0x97, 0xe5, 0x1b,
+++	0x45, 0x4e, 0xda, 0xfc, 0xcc, 0x40, 0xe8, 0x48,
+++	0x88, 0x0b, 0xa3, 0xe3, 0x8d, 0x83, 0x42, 0xc3,
+++	0x23, 0xfd, 0x68, 0xb5, 0x8e, 0xf1, 0x9d, 0x63,
+++	0x77, 0xe9, 0xa3, 0x8e, 0x8c, 0x26, 0x6b, 0xbd,
+++	0x72, 0x73, 0x35, 0x0c, 0x03, 0xf8, 0x43, 0x78,
+++	0x52, 0x71, 0x15, 0x1f, 0x71, 0x5d, 0x6e, 0xed,
+++	0xb9, 0xcc, 0x86, 0x30, 0xdb, 0x2b, 0xd3, 0x82,
+++	0x88, 0x23, 0x71, 0x90, 0x53, 0x5c, 0xa9, 0x2f,
+++	0x76, 0x01, 0xb7, 0x9a, 0xfe, 0x43, 0x55, 0xa3,
+++	0x04, 0x9b, 0x0e, 0xe4, 0x59, 0xdf, 0xc9, 0xe9,
+++	0xb1, 0xea, 0x29, 0x28, 0x3c, 0x5c, 0xae, 0x72,
+++	0x84, 0xb6, 0xc6, 0xeb, 0x0c, 0x27, 0x07, 0x74,
+++	0x90, 0x0d, 0x31, 0xb0, 0x00, 0x77, 0xe9, 0x40,
+++	0x70, 0x6f, 0x68, 0xa7, 0xfd, 0x06, 0xec, 0x4b,
+++	0xc0, 0xb7, 0xac, 0xbc, 0x33, 0xb7, 0x6d, 0x0a,
+++	0xbd, 0x12, 0x1b, 0x59, 0xcb, 0xdd, 0x32, 0xf5,
+++	0x1d, 0x94, 0x57, 0x76, 0x9e, 0x0c, 0x18, 0x98,
+++	0x71, 0xd7, 0x2a, 0xdb, 0x0b, 0x7b, 0xa7, 0x71,
+++	0xb7, 0x67, 0x81, 0x23, 0x96, 0xae, 0xb9, 0x7e,
+++	0x32, 0x43, 0x92, 0x8a, 0x19, 0xa0, 0xc4, 0xd4,
+++	0x3b, 0x57, 0xf9, 0x4a, 0x2c, 0xfb, 0x51, 0x46,
+++	0xbb, 0xcb, 0x5d, 0xb3, 0xef, 0x13, 0x93, 0x6e,
+++	0x68, 0x42, 0x54, 0x57, 0xd3, 0x6a, 0x3a, 0x8f,
+++	0x9d, 0x66, 0xbf, 0xbd, 0x36, 0x23, 0xf5, 0x93,
+++	0x83, 0x7b, 0x9c, 0xc0, 0xdd, 0xc5, 0x49, 0xc0,
+++	0x64, 0xed, 0x07, 0x12, 0xb3, 0xe6, 0xe4, 0xe5,
+++	0x38, 0x95, 0x23, 0xb1, 0xa0, 0x3b, 0x1a, 0x61,
+++	0xda, 0x17, 0xac, 0xc3, 0x58, 0xdd, 0x74, 0x64,
+++	0x22, 0x11, 0xe8, 0x32, 0x1d, 0x16, 0x93, 0x85,
+++	0x99, 0xa5, 0x9c, 0x34, 0x55, 0xb1, 0xe9, 0x20,
+++	0x72, 0xc9, 0x28, 0x7b, 0x79, 0x00, 0xa1, 0xa6,
+++	0xa3, 0x27, 0x40, 0x18, 0x8a, 0x54, 0xe0, 0xcc,
+++	0xe8, 0x4e, 0x8e, 0x43, 0x96, 0xe7, 0x3f, 0xc8,
+++	0xe9, 0xb2, 0xf9, 0xc9, 0xda, 0x04, 0x71, 0x50,
+++	0x47, 0xe4, 0xaa, 0xce, 0xa2, 0x30, 0xc8, 0xe4,
+++	0xac, 0xc7, 0x0d, 0x06, 0x2e, 0xe6, 0xe8, 0x80,
+++	0x36, 0x29, 0x9e, 0x01, 0xb8, 0xc3, 0xf0, 0xa0,
+++	0x5d, 0x7a, 0xca, 0x4d, 0xa0, 0x57, 0xbd, 0x2a,
+++	0x45, 0xa7, 0x7f, 0x9c, 0x93, 0x07, 0x8f, 0x35,
+++	0x67, 0x92, 0xe3, 0xe9, 0x7f, 0xa8, 0x61, 0x43,
+++	0x9e, 0x25, 0x4f, 0x33, 0x76, 0x13, 0x6e, 0x12,
+++	0xb9, 0xdd, 0xa4, 0x7c, 0x08, 0x9f, 0x7c, 0xe7,
+++	0x0a, 0x8d, 0x84, 0x06, 0xa4, 0x33, 0x17, 0x34,
+++	0x5e, 0x10, 0x7c, 0xc0, 0xa8, 0x3d, 0x1f, 0x42,
+++	0x20, 0x51, 0x65, 0x5d, 0x09, 0xc3, 0xaa, 0xc0,
+++	0xc8, 0x0d, 0xf0, 0x79, 0xbc, 0x20, 0x1b, 0x95,
+++	0xe7, 0x06, 0x7d, 0x47, 0x20, 0x03, 0x1a, 0x74,
+++	0xdd, 0xe2, 0xd4, 0xae, 0x38, 0x71, 0x9b, 0xf5,
+++	0x80, 0xec, 0x08, 0x4e, 0x56, 0xba, 0x76, 0x12,
+++	0x1a, 0xdf, 0x48, 0xf3, 0xae, 0xb3, 0xe6, 0xe6,
+++	0xbe, 0xc0, 0x91, 0x2e, 0x01, 0xb3, 0x01, 0x86,
+++	0xa2, 0xb9, 0x52, 0xd1, 0x21, 0xae, 0xd4, 0x97,
+++	0x1d, 0xef, 0x41, 0x12, 0x95, 0x3d, 0x48, 0x45,
+++	0x1c, 0x56, 0x32, 0x8f, 0xb8, 0x43, 0xbb, 0x19,
+++	0xf3, 0xca, 0xe9, 0xeb, 0x6d, 0x84, 0xbe, 0x86,
+++	0x06, 0xe2, 0x36, 0xb2, 0x62, 0x9d, 0xd3, 0x4c,
+++	0x48, 0x18, 0x54, 0x13, 0x4e, 0xcf, 0xfd, 0xba,
+++	0x84, 0xb9, 0x30, 0x53, 0xcf, 0xfb, 0xb9, 0x29,
+++	0x8f, 0xdc, 0x9f, 0xef, 0x60, 0x0b, 0x64, 0xf6,
+++	0x8b, 0xee, 0xa6, 0x91, 0xc2, 0x41, 0x6c, 0xf6,
+++	0xfa, 0x79, 0x67, 0x4b, 0xc1, 0x3f, 0xaf, 0x09,
+++	0x81, 0xd4, 0x5d, 0xcb, 0x09, 0xdf, 0x36, 0x31,
+++	0xc0, 0x14, 0x3c, 0x7c, 0x0e, 0x65, 0x95, 0x99,
+++	0x6d, 0xa3, 0xf4, 0xd7, 0x38, 0xee, 0x1a, 0x2b,
+++	0x37, 0xe2, 0xa4, 0x3b, 0x4b, 0xd0, 0x65, 0xca,
+++	0xf8, 0xc3, 0xe8, 0x15, 0x20, 0xef, 0xf2, 0x00,
+++	0xfd, 0x01, 0x09, 0xc5, 0xc8, 0x17, 0x04, 0x93,
+++	0xd0, 0x93, 0x03, 0x55, 0xc5, 0xfe, 0x32, 0xa3,
+++	0x3e, 0x28, 0x2d, 0x3b, 0x93, 0x8a, 0xcc, 0x07,
+++	0x72, 0x80, 0x8b, 0x74, 0x16, 0x24, 0xbb, 0xda,
+++	0x94, 0x39, 0x30, 0x8f, 0xb1, 0xcd, 0x4a, 0x90,
+++	0x92, 0x7c, 0x14, 0x8f, 0x95, 0x4e, 0xac, 0x9b,
+++	0xd8, 0x8f, 0x1a, 0x87, 0xa4, 0x32, 0x27, 0x8a,
+++	0xba, 0xf7, 0x41, 0xcf, 0x84, 0x37, 0x19, 0xe6,
+++	0x06, 0xf5, 0x0e, 0xcf, 0x36, 0xf5, 0x9e, 0x6c,
+++	0xde, 0xbc, 0xff, 0x64, 0x7e, 0x4e, 0x59, 0x57,
+++	0x48, 0xfe, 0x14, 0xf7, 0x9c, 0x93, 0x5d, 0x15,
+++	0xad, 0xcc, 0x11, 0xb1, 0x17, 0x18, 0xb2, 0x7e,
+++	0xcc, 0xab, 0xe9, 0xce, 0x7d, 0x77, 0x5b, 0x51,
+++	0x1b, 0x1e, 0x20, 0xa8, 0x32, 0x06, 0x0e, 0x75,
+++	0x93, 0xac, 0xdb, 0x35, 0x37, 0x1f, 0xe9, 0x19,
+++	0x1d, 0xb4, 0x71, 0x97, 0xd6, 0x4e, 0x2c, 0x08,
+++	0xa5, 0x13, 0xf9, 0x0e, 0x7e, 0x78, 0x6e, 0x14,
+++	0xe0, 0xa9, 0xb9, 0x96, 0x4c, 0x80, 0x82, 0xba,
+++	0x17, 0xb3, 0x9d, 0x69, 0xb0, 0x84, 0x46, 0xff,
+++	0xf9, 0x52, 0x79, 0x94, 0x58, 0x3a, 0x62, 0x90,
+++	0x15, 0x35, 0x71, 0x10, 0x37, 0xed, 0xa1, 0x8e,
+++	0x53, 0x6e, 0xf4, 0x26, 0x57, 0x93, 0x15, 0x93,
+++	0xf6, 0x81, 0x2c, 0x5a, 0x10, 0xda, 0x92, 0xad,
+++	0x2f, 0xdb, 0x28, 0x31, 0x2d, 0x55, 0x04, 0xd2,
+++	0x06, 0x28, 0x8c, 0x1e, 0xdc, 0xea, 0x54, 0xac,
+++	0xff, 0xb7, 0x6c, 0x30, 0x15, 0xd4, 0xb4, 0x0d,
+++	0x00, 0x93, 0x57, 0xdd, 0xd2, 0x07, 0x07, 0x06,
+++	0xd9, 0x43, 0x9b, 0xcd, 0x3a, 0xf4, 0x7d, 0x4c,
+++	0x36, 0x5d, 0x23, 0xa2, 0xcc, 0x57, 0x40, 0x91,
+++	0xe9, 0x2c, 0x2f, 0x2c, 0xd5, 0x30, 0x9b, 0x17,
+++	0xb0, 0xc9, 0xf7, 0xa7, 0x2f, 0xd1, 0x93, 0x20,
+++	0x6b, 0xc6, 0xc1, 0xe4, 0x6f, 0xcb, 0xd1, 0xe7,
+++	0x09, 0x0f, 0x9e, 0xdc, 0xaa, 0x9f, 0x2f, 0xdf,
+++	0x56, 0x9f, 0xd4, 0x33, 0x04, 0xaf, 0xd3, 0x6c,
+++	0x58, 0x61, 0xf0, 0x30, 0xec, 0xf2, 0x7f, 0xf2,
+++	0x9c, 0xdf, 0x39, 0xbb, 0x6f, 0xa2, 0x8c, 0x7e,
+++	0xc4, 0x22, 0x51, 0x71, 0xc0, 0x4d, 0x14, 0x1a,
+++	0xc4, 0xcd, 0x04, 0xd9, 0x87, 0x08, 0x50, 0x05,
+++	0xcc, 0xaf, 0xf6, 0xf0, 0x8f, 0x92, 0x54, 0x58,
+++	0xc2, 0xc7, 0x09, 0x7a, 0x59, 0x02, 0x05, 0xe8,
+++	0xb0, 0x86, 0xd9, 0xbf, 0x7b, 0x35, 0x51, 0x4d,
+++	0xaf, 0x08, 0x97, 0x2c, 0x65, 0xda, 0x2a, 0x71,
+++	0x3a, 0xa8, 0x51, 0xcc, 0xf2, 0x73, 0x27, 0xc3,
+++	0xfd, 0x62, 0xcf, 0xe3, 0xb2, 0xca, 0xcb, 0xbe,
+++	0x1a, 0x0a, 0xa1, 0x34, 0x7b, 0x77, 0xc4, 0x62,
+++	0x68, 0x78, 0x5f, 0x94, 0x07, 0x04, 0x65, 0x16,
+++	0x4b, 0x61, 0xcb, 0xff, 0x75, 0x26, 0x50, 0x66,
+++	0x1f, 0x6e, 0x93, 0xf8, 0xc5, 0x51, 0xeb, 0xa4,
+++	0x4a, 0x48, 0x68, 0x6b, 0xe2, 0x5e, 0x44, 0xb2,
+++	0x50, 0x2c, 0x6c, 0xae, 0x79, 0x4e, 0x66, 0x35,
+++	0x81, 0x50, 0xac, 0xbc, 0x3f, 0xb1, 0x0c, 0xf3,
+++	0x05, 0x3c, 0x4a, 0xa3, 0x6c, 0x2a, 0x79, 0xb4,
+++	0xb7, 0xab, 0xca, 0xc7, 0x9b, 0x8e, 0xcd, 0x5f,
+++	0x11, 0x03, 0xcb, 0x30, 0xa3, 0xab, 0xda, 0xfe,
+++	0x64, 0xb9, 0xbb, 0xd8, 0x5e, 0x3a, 0x1a, 0x56,
+++	0xe5, 0x05, 0x48, 0x90, 0x1e, 0x61, 0x69, 0x1b,
+++	0x22, 0xe6, 0x1a, 0x3c, 0x75, 0xad, 0x1f, 0x37,
+++	0x28, 0xdc, 0xe4, 0x6d, 0xbd, 0x42, 0xdc, 0xd3,
+++	0xc8, 0xb6, 0x1c, 0x48, 0xfe, 0x94, 0x77, 0x7f,
+++	0xbd, 0x62, 0xac, 0xa3, 0x47, 0x27, 0xcf, 0x5f,
+++	0xd9, 0xdb, 0xaf, 0xec, 0xf7, 0x5e, 0xc1, 0xb0,
+++	0x9d, 0x01, 0x26, 0x99, 0x7e, 0x8f, 0x03, 0x70,
+++	0xb5, 0x42, 0xbe, 0x67, 0x28, 0x1b, 0x7c, 0xbd,
+++	0x61, 0x21, 0x97, 0xcc, 0x5c, 0xe1, 0x97, 0x8f,
+++	0x8d, 0xde, 0x2b, 0xaa, 0xa7, 0x71, 0x1d, 0x1e,
+++	0x02, 0x73, 0x70, 0x58, 0x32, 0x5b, 0x1d, 0x67,
+++	0x3d, 0xe0, 0x74, 0x4f, 0x03, 0xf2, 0x70, 0x51,
+++	0x79, 0xf1, 0x61, 0x70, 0x15, 0x74, 0x9d, 0x23,
+++	0x89, 0xde, 0xac, 0xfd, 0xde, 0xd0, 0x1f, 0xc3,
+++	0x87, 0x44, 0x35, 0x4b, 0xe5, 0xb0, 0x60, 0xc5,
+++	0x22, 0xe4, 0x9e, 0xca, 0xeb, 0xd5, 0x3a, 0x09,
+++	0x45, 0xa4, 0xdb, 0xfa, 0x3f, 0xeb, 0x1b, 0xc7,
+++	0xc8, 0x14, 0x99, 0x51, 0x92, 0x10, 0xed, 0xed,
+++	0x28, 0xe0, 0xa1, 0xf8, 0x26, 0xcf, 0xcd, 0xcb,
+++	0x63, 0xa1, 0x3b, 0xe3, 0xdf, 0x7e, 0xfe, 0xa6,
+++	0xf0, 0x81, 0x9a, 0xbf, 0x55, 0xde, 0x54, 0xd5,
+++	0x56, 0x60, 0x98, 0x10, 0x68, 0xf4, 0x38, 0x96,
+++	0x8e, 0x6f, 0x1d, 0x44, 0x7f, 0xd6, 0x2f, 0xfe,
+++	0x55, 0xfb, 0x0c, 0x7e, 0x67, 0xe2, 0x61, 0x44,
+++	0xed, 0xf2, 0x35, 0x30, 0x5d, 0xe9, 0xc7, 0xd6,
+++	0x6d, 0xe0, 0xa0, 0xed, 0xf3, 0xfc, 0xd8, 0x3e,
+++	0x0a, 0x7b, 0xcd, 0xaf, 0x65, 0x68, 0x18, 0xc0,
+++	0xec, 0x04, 0x1c, 0x74, 0x6d, 0xe2, 0x6e, 0x79,
+++	0xd4, 0x11, 0x2b, 0x62, 0xd5, 0x27, 0xad, 0x4f,
+++	0x01, 0x59, 0x73, 0xcc, 0x6a, 0x53, 0xfb, 0x2d,
+++	0xd5, 0x4e, 0x99, 0x21, 0x65, 0x4d, 0xf5, 0x82,
+++	0xf7, 0xd8, 0x42, 0xce, 0x6f, 0x3d, 0x36, 0x47,
+++	0xf1, 0x05, 0x16, 0xe8, 0x1b, 0x6a, 0x8f, 0x93,
+++	0xf2, 0x8f, 0x37, 0x40, 0x12, 0x28, 0xa3, 0xe6,
+++	0xb9, 0x17, 0x4a, 0x1f, 0xb1, 0xd1, 0x66, 0x69,
+++	0x86, 0xc4, 0xfc, 0x97, 0xae, 0x3f, 0x8f, 0x1e,
+++	0x2b, 0xdf, 0xcd, 0xf9, 0x3c
+++};
+++static const u8 dec_output011[] __initconst = {
+++	0x7a, 0x57, 0xf2, 0xc7, 0x06, 0x3f, 0x50, 0x7b,
+++	0x36, 0x1a, 0x66, 0x5c, 0xb9, 0x0e, 0x5e, 0x3b,
+++	0x45, 0x60, 0xbe, 0x9a, 0x31, 0x9f, 0xff, 0x5d,
+++	0x66, 0x34, 0xb4, 0xdc, 0xfb, 0x9d, 0x8e, 0xee,
+++	0x6a, 0x33, 0xa4, 0x07, 0x3c, 0xf9, 0x4c, 0x30,
+++	0xa1, 0x24, 0x52, 0xf9, 0x50, 0x46, 0x88, 0x20,
+++	0x02, 0x32, 0x3a, 0x0e, 0x99, 0x63, 0xaf, 0x1f,
+++	0x15, 0x28, 0x2a, 0x05, 0xff, 0x57, 0x59, 0x5e,
+++	0x18, 0xa1, 0x1f, 0xd0, 0x92, 0x5c, 0x88, 0x66,
+++	0x1b, 0x00, 0x64, 0xa5, 0x93, 0x8d, 0x06, 0x46,
+++	0xb0, 0x64, 0x8b, 0x8b, 0xef, 0x99, 0x05, 0x35,
+++	0x85, 0xb3, 0xf3, 0x33, 0xbb, 0xec, 0x66, 0xb6,
+++	0x3d, 0x57, 0x42, 0xe3, 0xb4, 0xc6, 0xaa, 0xb0,
+++	0x41, 0x2a, 0xb9, 0x59, 0xa9, 0xf6, 0x3e, 0x15,
+++	0x26, 0x12, 0x03, 0x21, 0x4c, 0x74, 0x43, 0x13,
+++	0x2a, 0x03, 0x27, 0x09, 0xb4, 0xfb, 0xe7, 0xb7,
+++	0x40, 0xff, 0x5e, 0xce, 0x48, 0x9a, 0x60, 0xe3,
+++	0x8b, 0x80, 0x8c, 0x38, 0x2d, 0xcb, 0x93, 0x37,
+++	0x74, 0x05, 0x52, 0x6f, 0x73, 0x3e, 0xc3, 0xbc,
+++	0xca, 0x72, 0x0a, 0xeb, 0xf1, 0x3b, 0xa0, 0x95,
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+++	0xd4, 0x23, 0x78, 0x50, 0xb1, 0x5b, 0x85, 0x10,
+++	0x8d, 0xca, 0x5f, 0x0f, 0x71, 0xae, 0x72, 0x9a,
+++	0xf6, 0x25, 0x19, 0x60, 0x06, 0xf7, 0x10, 0x34,
+++	0x18, 0x0d, 0xc9, 0x9f, 0x7b, 0x0c, 0x9b, 0x8f,
+++	0x91, 0x1b, 0x9f, 0xcd, 0x10, 0xee, 0x75, 0xf9,
+++	0x97, 0x66, 0xfc, 0x4d, 0x33, 0x6e, 0x28, 0x2b,
+++	0x92, 0x85, 0x4f, 0xab, 0x43, 0x8d, 0x8f, 0x7d,
+++	0x86, 0xa7, 0xc7, 0xd8, 0xd3, 0x0b, 0x8b, 0x57,
+++	0xb6, 0x1d, 0x95, 0x0d, 0xe9, 0xbc, 0xd9, 0x03,
+++	0xd9, 0x10, 0x19, 0xc3, 0x46, 0x63, 0x55, 0x87,
+++	0x61, 0x79, 0x6c, 0x95, 0x0e, 0x9c, 0xdd, 0xca,
+++	0xc3, 0xf3, 0x64, 0xf0, 0x7d, 0x76, 0xb7, 0x53,
+++	0x67, 0x2b, 0x1e, 0x44, 0x56, 0x81, 0xea, 0x8f,
+++	0x5c, 0x42, 0x16, 0xb8, 0x28, 0xeb, 0x1b, 0x61,
+++	0x10, 0x1e, 0xbf, 0xec, 0xa8
+++};
+++static const u8 dec_assoc011[] __initconst = {
+++	0xd6, 0x31, 0xda, 0x5d, 0x42, 0x5e, 0xd7
+++};
+++static const u8 dec_nonce011[] __initconst = {
+++	0xfd, 0x87, 0xd4, 0xd8, 0x62, 0xfd, 0xec, 0xaa
+++};
+++static const u8 dec_key011[] __initconst = {
+++	0x35, 0x4e, 0xb5, 0x70, 0x50, 0x42, 0x8a, 0x85,
+++	0xf2, 0xfb, 0xed, 0x7b, 0xd0, 0x9e, 0x97, 0xca,
+++	0xfa, 0x98, 0x66, 0x63, 0xee, 0x37, 0xcc, 0x52,
+++	0xfe, 0xd1, 0xdf, 0x95, 0x15, 0x34, 0x29, 0x38
+++};
+++
+++static const u8 dec_input012[] __initconst = {
+++	0x52, 0x34, 0xb3, 0x65, 0x3b, 0xb7, 0xe5, 0xd3,
+++	0xab, 0x49, 0x17, 0x60, 0xd2, 0x52, 0x56, 0xdf,
+++	0xdf, 0x34, 0x56, 0x82, 0xe2, 0xbe, 0xe5, 0xe1,
+++	0x28, 0xd1, 0x4e, 0x5f, 0x4f, 0x01, 0x7d, 0x3f,
+++	0x99, 0x6b, 0x30, 0x6e, 0x1a, 0x7c, 0x4c, 0x8e,
+++	0x62, 0x81, 0xae, 0x86, 0x3f, 0x6b, 0xd0, 0xb5,
+++	0xa9, 0xcf, 0x50, 0xf1, 0x02, 0x12, 0xa0, 0x0b,
+++	0x24, 0xe9, 0xe6, 0x72, 0x89, 0x2c, 0x52, 0x1b,
+++	0x34, 0x38, 0xf8, 0x75, 0x5f, 0xa0, 0x74, 0xe2,
+++	0x99, 0xdd, 0xa6, 0x4b, 0x14, 0x50, 0x4e, 0xf1,
+++	0xbe, 0xd6, 0x9e, 0xdb, 0xb2, 0x24, 0x27, 0x74,
+++	0x12, 0x4a, 0x78, 0x78, 0x17, 0xa5, 0x58, 0x8e,
+++	0x2f, 0xf9, 0xf4, 0x8d, 0xee, 0x03, 0x88, 0xae,
+++	0xb8, 0x29, 0xa1, 0x2f, 0x4b, 0xee, 0x92, 0xbd,
+++	0x87, 0xb3, 0xce, 0x34, 0x21, 0x57, 0x46, 0x04,
+++	0x49, 0x0c, 0x80, 0xf2, 0x01, 0x13, 0xa1, 0x55,
+++	0xb3, 0xff, 0x44, 0x30, 0x3c, 0x1c, 0xd0, 0xef,
+++	0xbc, 0x18, 0x74, 0x26, 0xad, 0x41, 0x5b, 0x5b,
+++	0x3e, 0x9a, 0x7a, 0x46, 0x4f, 0x16, 0xd6, 0x74,
+++	0x5a, 0xb7, 0x3a, 0x28, 0x31, 0xd8, 0xae, 0x26,
+++	0xac, 0x50, 0x53, 0x86, 0xf2, 0x56, 0xd7, 0x3f,
+++	0x29, 0xbc, 0x45, 0x68, 0x8e, 0xcb, 0x98, 0x64,
+++	0xdd, 0xc9, 0xba, 0xb8, 0x4b, 0x7b, 0x82, 0xdd,
+++	0x14, 0xa7, 0xcb, 0x71, 0x72, 0x00, 0x5c, 0xad,
+++	0x7b, 0x6a, 0x89, 0xa4, 0x3d, 0xbf, 0xb5, 0x4b,
+++	0x3e, 0x7c, 0x5a, 0xcf, 0xb8, 0xa1, 0xc5, 0x6e,
+++	0xc8, 0xb6, 0x31, 0x57, 0x7b, 0xdf, 0xa5, 0x7e,
+++	0xb1, 0xd6, 0x42, 0x2a, 0x31, 0x36, 0xd1, 0xd0,
+++	0x3f, 0x7a, 0xe5, 0x94, 0xd6, 0x36, 0xa0, 0x6f,
+++	0xb7, 0x40, 0x7d, 0x37, 0xc6, 0x55, 0x7c, 0x50,
+++	0x40, 0x6d, 0x29, 0x89, 0xe3, 0x5a, 0xae, 0x97,
+++	0xe7, 0x44, 0x49, 0x6e, 0xbd, 0x81, 0x3d, 0x03,
+++	0x93, 0x06, 0x12, 0x06, 0xe2, 0x41, 0x12, 0x4a,
+++	0xf1, 0x6a, 0xa4, 0x58, 0xa2, 0xfb, 0xd2, 0x15,
+++	0xba, 0xc9, 0x79, 0xc9, 0xce, 0x5e, 0x13, 0xbb,
+++	0xf1, 0x09, 0x04, 0xcc, 0xfd, 0xe8, 0x51, 0x34,
+++	0x6a, 0xe8, 0x61, 0x88, 0xda, 0xed, 0x01, 0x47,
+++	0x84, 0xf5, 0x73, 0x25, 0xf9, 0x1c, 0x42, 0x86,
+++	0x07, 0xf3, 0x5b, 0x1a, 0x01, 0xb3, 0xeb, 0x24,
+++	0x32, 0x8d, 0xf6, 0xed, 0x7c, 0x4b, 0xeb, 0x3c,
+++	0x36, 0x42, 0x28, 0xdf, 0xdf, 0xb6, 0xbe, 0xd9,
+++	0x8c, 0x52, 0xd3, 0x2b, 0x08, 0x90, 0x8c, 0xe7,
+++	0x98, 0x31, 0xe2, 0x32, 0x8e, 0xfc, 0x11, 0x48,
+++	0x00, 0xa8, 0x6a, 0x42, 0x4a, 0x02, 0xc6, 0x4b,
+++	0x09, 0xf1, 0xe3, 0x49, 0xf3, 0x45, 0x1f, 0x0e,
+++	0xbc, 0x56, 0xe2, 0xe4, 0xdf, 0xfb, 0xeb, 0x61,
+++	0xfa, 0x24, 0xc1, 0x63, 0x75, 0xbb, 0x47, 0x75,
+++	0xaf, 0xe1, 0x53, 0x16, 0x96, 0x21, 0x85, 0x26,
+++	0x11, 0xb3, 0x76, 0xe3, 0x23, 0xa1, 0x6b, 0x74,
+++	0x37, 0xd0, 0xde, 0x06, 0x90, 0x71, 0x5d, 0x43,
+++	0x88, 0x9b, 0x00, 0x54, 0xa6, 0x75, 0x2f, 0xa1,
+++	0xc2, 0x0b, 0x73, 0x20, 0x1d, 0xb6, 0x21, 0x79,
+++	0x57, 0x3f, 0xfa, 0x09, 0xbe, 0x8a, 0x33, 0xc3,
+++	0x52, 0xf0, 0x1d, 0x82, 0x31, 0xd1, 0x55, 0xb5,
+++	0x6c, 0x99, 0x25, 0xcf, 0x5c, 0x32, 0xce, 0xe9,
+++	0x0d, 0xfa, 0x69, 0x2c, 0xd5, 0x0d, 0xc5, 0x6d,
+++	0x86, 0xd0, 0x0c, 0x3b, 0x06, 0x50, 0x79, 0xe8,
+++	0xc3, 0xae, 0x04, 0xe6, 0xcd, 0x51, 0xe4, 0x26,
+++	0x9b, 0x4f, 0x7e, 0xa6, 0x0f, 0xab, 0xd8, 0xe5,
+++	0xde, 0xa9, 0x00, 0x95, 0xbe, 0xa3, 0x9d, 0x5d,
+++	0xb2, 0x09, 0x70, 0x18, 0x1c, 0xf0, 0xac, 0x29,
+++	0x23, 0x02, 0x29, 0x28, 0xd2, 0x74, 0x35, 0x57,
+++	0x62, 0x0f, 0x24, 0xea, 0x5e, 0x33, 0xc2, 0x92,
+++	0xf3, 0x78, 0x4d, 0x30, 0x1e, 0xa1, 0x99, 0xa9,
+++	0x82, 0xb0, 0x42, 0x31, 0x8d, 0xad, 0x8a, 0xbc,
+++	0xfc, 0xd4, 0x57, 0x47, 0x3e, 0xb4, 0x50, 0xdd,
+++	0x6e, 0x2c, 0x80, 0x4d, 0x22, 0xf1, 0xfb, 0x57,
+++	0xc4, 0xdd, 0x17, 0xe1, 0x8a, 0x36, 0x4a, 0xb3,
+++	0x37, 0xca, 0xc9, 0x4e, 0xab, 0xd5, 0x69, 0xc4,
+++	0xf4, 0xbc, 0x0b, 0x3b, 0x44, 0x4b, 0x29, 0x9c,
+++	0xee, 0xd4, 0x35, 0x22, 0x21, 0xb0, 0x1f, 0x27,
+++	0x64, 0xa8, 0x51, 0x1b, 0xf0, 0x9f, 0x19, 0x5c,
+++	0xfb, 0x5a, 0x64, 0x74, 0x70, 0x45, 0x09, 0xf5,
+++	0x64, 0xfe, 0x1a, 0x2d, 0xc9, 0x14, 0x04, 0x14,
+++	0xcf, 0xd5, 0x7d, 0x60, 0xaf, 0x94, 0x39, 0x94,
+++	0xe2, 0x7d, 0x79, 0x82, 0xd0, 0x65, 0x3b, 0x6b,
+++	0x9c, 0x19, 0x84, 0xb4, 0x6d, 0xb3, 0x0c, 0x99,
+++	0xc0, 0x56, 0xa8, 0xbd, 0x73, 0xce, 0x05, 0x84,
+++	0x3e, 0x30, 0xaa, 0xc4, 0x9b, 0x1b, 0x04, 0x2a,
+++	0x9f, 0xd7, 0x43, 0x2b, 0x23, 0xdf, 0xbf, 0xaa,
+++	0xd5, 0xc2, 0x43, 0x2d, 0x70, 0xab, 0xdc, 0x75,
+++	0xad, 0xac, 0xf7, 0xc0, 0xbe, 0x67, 0xb2, 0x74,
+++	0xed, 0x67, 0x10, 0x4a, 0x92, 0x60, 0xc1, 0x40,
+++	0x50, 0x19, 0x8a, 0x8a, 0x8c, 0x09, 0x0e, 0x72,
+++	0xe1, 0x73, 0x5e, 0xe8, 0x41, 0x85, 0x63, 0x9f,
+++	0x3f, 0xd7, 0x7d, 0xc4, 0xfb, 0x22, 0x5d, 0x92,
+++	0x6c, 0xb3, 0x1e, 0xe2, 0x50, 0x2f, 0x82, 0xa8,
+++	0x28, 0xc0, 0xb5, 0xd7, 0x5f, 0x68, 0x0d, 0x2c,
+++	0x2d, 0xaf, 0x7e, 0xfa, 0x2e, 0x08, 0x0f, 0x1f,
+++	0x70, 0x9f, 0xe9, 0x19, 0x72, 0x55, 0xf8, 0xfb,
+++	0x51, 0xd2, 0x33, 0x5d, 0xa0, 0xd3, 0x2b, 0x0a,
+++	0x6c, 0xbc, 0x4e, 0xcf, 0x36, 0x4d, 0xdc, 0x3b,
+++	0xe9, 0x3e, 0x81, 0x7c, 0x61, 0xdb, 0x20, 0x2d,
+++	0x3a, 0xc3, 0xb3, 0x0c, 0x1e, 0x00, 0xb9, 0x7c,
+++	0xf5, 0xca, 0x10, 0x5f, 0x3a, 0x71, 0xb3, 0xe4,
+++	0x20, 0xdb, 0x0c, 0x2a, 0x98, 0x63, 0x45, 0x00,
+++	0x58, 0xf6, 0x68, 0xe4, 0x0b, 0xda, 0x13, 0x3b,
+++	0x60, 0x5c, 0x76, 0xdb, 0xb9, 0x97, 0x71, 0xe4,
+++	0xd9, 0xb7, 0xdb, 0xbd, 0x68, 0xc7, 0x84, 0x84,
+++	0xaa, 0x7c, 0x68, 0x62, 0x5e, 0x16, 0xfc, 0xba,
+++	0x72, 0xaa, 0x9a, 0xa9, 0xeb, 0x7c, 0x75, 0x47,
+++	0x97, 0x7e, 0xad, 0xe2, 0xd9, 0x91, 0xe8, 0xe4,
+++	0xa5, 0x31, 0xd7, 0x01, 0x8e, 0xa2, 0x11, 0x88,
+++	0x95, 0xb9, 0xf2, 0x9b, 0xd3, 0x7f, 0x1b, 0x81,
+++	0x22, 0xf7, 0x98, 0x60, 0x0a, 0x64, 0xa6, 0xc1,
+++	0xf6, 0x49, 0xc7, 0xe3, 0x07, 0x4d, 0x94, 0x7a,
+++	0xcf, 0x6e, 0x68, 0x0c, 0x1b, 0x3f, 0x6e, 0x2e,
+++	0xee, 0x92, 0xfa, 0x52, 0xb3, 0x59, 0xf8, 0xf1,
+++	0x8f, 0x6a, 0x66, 0xa3, 0x82, 0x76, 0x4a, 0x07,
+++	0x1a, 0xc7, 0xdd, 0xf5, 0xda, 0x9c, 0x3c, 0x24,
+++	0xbf, 0xfd, 0x42, 0xa1, 0x10, 0x64, 0x6a, 0x0f,
+++	0x89, 0xee, 0x36, 0xa5, 0xce, 0x99, 0x48, 0x6a,
+++	0xf0, 0x9f, 0x9e, 0x69, 0xa4, 0x40, 0x20, 0xe9,
+++	0x16, 0x15, 0xf7, 0xdb, 0x75, 0x02, 0xcb, 0xe9,
+++	0x73, 0x8b, 0x3b, 0x49, 0x2f, 0xf0, 0xaf, 0x51,
+++	0x06, 0x5c, 0xdf, 0x27, 0x27, 0x49, 0x6a, 0xd1,
+++	0xcc, 0xc7, 0xb5, 0x63, 0xb5, 0xfc, 0xb8, 0x5c,
+++	0x87, 0x7f, 0x84, 0xb4, 0xcc, 0x14, 0xa9, 0x53,
+++	0xda, 0xa4, 0x56, 0xf8, 0xb6, 0x1b, 0xcc, 0x40,
+++	0x27, 0x52, 0x06, 0x5a, 0x13, 0x81, 0xd7, 0x3a,
+++	0xd4, 0x3b, 0xfb, 0x49, 0x65, 0x31, 0x33, 0xb2,
+++	0xfa, 0xcd, 0xad, 0x58, 0x4e, 0x2b, 0xae, 0xd2,
+++	0x20, 0xfb, 0x1a, 0x48, 0xb4, 0x3f, 0x9a, 0xd8,
+++	0x7a, 0x35, 0x4a, 0xc8, 0xee, 0x88, 0x5e, 0x07,
+++	0x66, 0x54, 0xb9, 0xec, 0x9f, 0xa3, 0xe3, 0xb9,
+++	0x37, 0xaa, 0x49, 0x76, 0x31, 0xda, 0x74, 0x2d,
+++	0x3c, 0xa4, 0x65, 0x10, 0x32, 0x38, 0xf0, 0xde,
+++	0xd3, 0x99, 0x17, 0xaa, 0x71, 0xaa, 0x8f, 0x0f,
+++	0x8c, 0xaf, 0xa2, 0xf8, 0x5d, 0x64, 0xba, 0x1d,
+++	0xa3, 0xef, 0x96, 0x73, 0xe8, 0xa1, 0x02, 0x8d,
+++	0x0c, 0x6d, 0xb8, 0x06, 0x90, 0xb8, 0x08, 0x56,
+++	0x2c, 0xa7, 0x06, 0xc9, 0xc2, 0x38, 0xdb, 0x7c,
+++	0x63, 0xb1, 0x57, 0x8e, 0xea, 0x7c, 0x79, 0xf3,
+++	0x49, 0x1d, 0xfe, 0x9f, 0xf3, 0x6e, 0xb1, 0x1d,
+++	0xba, 0x19, 0x80, 0x1a, 0x0a, 0xd3, 0xb0, 0x26,
+++	0x21, 0x40, 0xb1, 0x7c, 0xf9, 0x4d, 0x8d, 0x10,
+++	0xc1, 0x7e, 0xf4, 0xf6, 0x3c, 0xa8, 0xfd, 0x7c,
+++	0xa3, 0x92, 0xb2, 0x0f, 0xaa, 0xcc, 0xa6, 0x11,
+++	0xfe, 0x04, 0xe3, 0xd1, 0x7a, 0x32, 0x89, 0xdf,
+++	0x0d, 0xc4, 0x8f, 0x79, 0x6b, 0xca, 0x16, 0x7c,
+++	0x6e, 0xf9, 0xad, 0x0f, 0xf6, 0xfe, 0x27, 0xdb,
+++	0xc4, 0x13, 0x70, 0xf1, 0x62, 0x1a, 0x4f, 0x79,
+++	0x40, 0xc9, 0x9b, 0x8b, 0x21, 0xea, 0x84, 0xfa,
+++	0xf5, 0xf1, 0x89, 0xce, 0xb7, 0x55, 0x0a, 0x80,
+++	0x39, 0x2f, 0x55, 0x36, 0x16, 0x9c, 0x7b, 0x08,
+++	0xbd, 0x87, 0x0d, 0xa5, 0x32, 0xf1, 0x52, 0x7c,
+++	0xe8, 0x55, 0x60, 0x5b, 0xd7, 0x69, 0xe4, 0xfc,
+++	0xfa, 0x12, 0x85, 0x96, 0xea, 0x50, 0x28, 0xab,
+++	0x8a, 0xf7, 0xbb, 0x0e, 0x53, 0x74, 0xca, 0xa6,
+++	0x27, 0x09, 0xc2, 0xb5, 0xde, 0x18, 0x14, 0xd9,
+++	0xea, 0xe5, 0x29, 0x1c, 0x40, 0x56, 0xcf, 0xd7,
+++	0xae, 0x05, 0x3f, 0x65, 0xaf, 0x05, 0x73, 0xe2,
+++	0x35, 0x96, 0x27, 0x07, 0x14, 0xc0, 0xad, 0x33,
+++	0xf1, 0xdc, 0x44, 0x7a, 0x89, 0x17, 0x77, 0xd2,
+++	0x9c, 0x58, 0x60, 0xf0, 0x3f, 0x7b, 0x2d, 0x2e,
+++	0x57, 0x95, 0x54, 0x87, 0xed, 0xf2, 0xc7, 0x4c,
+++	0xf0, 0xae, 0x56, 0x29, 0x19, 0x7d, 0x66, 0x4b,
+++	0x9b, 0x83, 0x84, 0x42, 0x3b, 0x01, 0x25, 0x66,
+++	0x8e, 0x02, 0xde, 0xb9, 0x83, 0x54, 0x19, 0xf6,
+++	0x9f, 0x79, 0x0d, 0x67, 0xc5, 0x1d, 0x7a, 0x44,
+++	0x02, 0x98, 0xa7, 0x16, 0x1c, 0x29, 0x0d, 0x74,
+++	0xff, 0x85, 0x40, 0x06, 0xef, 0x2c, 0xa9, 0xc6,
+++	0xf5, 0x53, 0x07, 0x06, 0xae, 0xe4, 0xfa, 0x5f,
+++	0xd8, 0x39, 0x4d, 0xf1, 0x9b, 0x6b, 0xd9, 0x24,
+++	0x84, 0xfe, 0x03, 0x4c, 0xb2, 0x3f, 0xdf, 0xa1,
+++	0x05, 0x9e, 0x50, 0x14, 0x5a, 0xd9, 0x1a, 0xa2,
+++	0xa7, 0xfa, 0xfa, 0x17, 0xf7, 0x78, 0xd6, 0xb5,
+++	0x92, 0x61, 0x91, 0xac, 0x36, 0xfa, 0x56, 0x0d,
+++	0x38, 0x32, 0x18, 0x85, 0x08, 0x58, 0x37, 0xf0,
+++	0x4b, 0xdb, 0x59, 0xe7, 0xa4, 0x34, 0xc0, 0x1b,
+++	0x01, 0xaf, 0x2d, 0xde, 0xa1, 0xaa, 0x5d, 0xd3,
+++	0xec, 0xe1, 0xd4, 0xf7, 0xe6, 0x54, 0x68, 0xf0,
+++	0x51, 0x97, 0xa7, 0x89, 0xea, 0x24, 0xad, 0xd3,
+++	0x6e, 0x47, 0x93, 0x8b, 0x4b, 0xb4, 0xf7, 0x1c,
+++	0x42, 0x06, 0x67, 0xe8, 0x99, 0xf6, 0xf5, 0x7b,
+++	0x85, 0xb5, 0x65, 0xb5, 0xb5, 0xd2, 0x37, 0xf5,
+++	0xf3, 0x02, 0xa6, 0x4d, 0x11, 0xa7, 0xdc, 0x51,
+++	0x09, 0x7f, 0xa0, 0xd8, 0x88, 0x1c, 0x13, 0x71,
+++	0xae, 0x9c, 0xb7, 0x7b, 0x34, 0xd6, 0x4e, 0x68,
+++	0x26, 0x83, 0x51, 0xaf, 0x1d, 0xee, 0x8b, 0xbb,
+++	0x69, 0x43, 0x2b, 0x9e, 0x8a, 0xbc, 0x02, 0x0e,
+++	0xa0, 0x1b, 0xe0, 0xa8, 0x5f, 0x6f, 0xaf, 0x1b,
+++	0x8f, 0xe7, 0x64, 0x71, 0x74, 0x11, 0x7e, 0xa8,
+++	0xd8, 0xf9, 0x97, 0x06, 0xc3, 0xb6, 0xfb, 0xfb,
+++	0xb7, 0x3d, 0x35, 0x9d, 0x3b, 0x52, 0xed, 0x54,
+++	0xca, 0xf4, 0x81, 0x01, 0x2d, 0x1b, 0xc3, 0xa7,
+++	0x00, 0x3d, 0x1a, 0x39, 0x54, 0xe1, 0xf6, 0xff,
+++	0xed, 0x6f, 0x0b, 0x5a, 0x68, 0xda, 0x58, 0xdd,
+++	0xa9, 0xcf, 0x5c, 0x4a, 0xe5, 0x09, 0x4e, 0xde,
+++	0x9d, 0xbc, 0x3e, 0xee, 0x5a, 0x00, 0x3b, 0x2c,
+++	0x87, 0x10, 0x65, 0x60, 0xdd, 0xd7, 0x56, 0xd1,
+++	0x4c, 0x64, 0x45, 0xe4, 0x21, 0xec, 0x78, 0xf8,
+++	0x25, 0x7a, 0x3e, 0x16, 0x5d, 0x09, 0x53, 0x14,
+++	0xbe, 0x4f, 0xae, 0x87, 0xd8, 0xd1, 0xaa, 0x3c,
+++	0xf6, 0x3e, 0xa4, 0x70, 0x8c, 0x5e, 0x70, 0xa4,
+++	0xb3, 0x6b, 0x66, 0x73, 0xd3, 0xbf, 0x31, 0x06,
+++	0x19, 0x62, 0x93, 0x15, 0xf2, 0x86, 0xe4, 0x52,
+++	0x7e, 0x53, 0x4c, 0x12, 0x38, 0xcc, 0x34, 0x7d,
+++	0x57, 0xf6, 0x42, 0x93, 0x8a, 0xc4, 0xee, 0x5c,
+++	0x8a, 0xe1, 0x52, 0x8f, 0x56, 0x64, 0xf6, 0xa6,
+++	0xd1, 0x91, 0x57, 0x70, 0xcd, 0x11, 0x76, 0xf5,
+++	0x59, 0x60, 0x60, 0x3c, 0xc1, 0xc3, 0x0b, 0x7f,
+++	0x58, 0x1a, 0x50, 0x91, 0xf1, 0x68, 0x8f, 0x6e,
+++	0x74, 0x74, 0xa8, 0x51, 0x0b, 0xf7, 0x7a, 0x98,
+++	0x37, 0xf2, 0x0a, 0x0e, 0xa4, 0x97, 0x04, 0xb8,
+++	0x9b, 0xfd, 0xa0, 0xea, 0xf7, 0x0d, 0xe1, 0xdb,
+++	0x03, 0xf0, 0x31, 0x29, 0xf8, 0xdd, 0x6b, 0x8b,
+++	0x5d, 0xd8, 0x59, 0xa9, 0x29, 0xcf, 0x9a, 0x79,
+++	0x89, 0x19, 0x63, 0x46, 0x09, 0x79, 0x6a, 0x11,
+++	0xda, 0x63, 0x68, 0x48, 0x77, 0x23, 0xfb, 0x7d,
+++	0x3a, 0x43, 0xcb, 0x02, 0x3b, 0x7a, 0x6d, 0x10,
+++	0x2a, 0x9e, 0xac, 0xf1, 0xd4, 0x19, 0xf8, 0x23,
+++	0x64, 0x1d, 0x2c, 0x5f, 0xf2, 0xb0, 0x5c, 0x23,
+++	0x27, 0xf7, 0x27, 0x30, 0x16, 0x37, 0xb1, 0x90,
+++	0xab, 0x38, 0xfb, 0x55, 0xcd, 0x78, 0x58, 0xd4,
+++	0x7d, 0x43, 0xf6, 0x45, 0x5e, 0x55, 0x8d, 0xb1,
+++	0x02, 0x65, 0x58, 0xb4, 0x13, 0x4b, 0x36, 0xf7,
+++	0xcc, 0xfe, 0x3d, 0x0b, 0x82, 0xe2, 0x12, 0x11,
+++	0xbb, 0xe6, 0xb8, 0x3a, 0x48, 0x71, 0xc7, 0x50,
+++	0x06, 0x16, 0x3a, 0xe6, 0x7c, 0x05, 0xc7, 0xc8,
+++	0x4d, 0x2f, 0x08, 0x6a, 0x17, 0x9a, 0x95, 0x97,
+++	0x50, 0x68, 0xdc, 0x28, 0x18, 0xc4, 0x61, 0x38,
+++	0xb9, 0xe0, 0x3e, 0x78, 0xdb, 0x29, 0xe0, 0x9f,
+++	0x52, 0xdd, 0xf8, 0x4f, 0x91, 0xc1, 0xd0, 0x33,
+++	0xa1, 0x7a, 0x8e, 0x30, 0x13, 0x82, 0x07, 0x9f,
+++	0xd3, 0x31, 0x0f, 0x23, 0xbe, 0x32, 0x5a, 0x75,
+++	0xcf, 0x96, 0xb2, 0xec, 0xb5, 0x32, 0xac, 0x21,
+++	0xd1, 0x82, 0x33, 0xd3, 0x15, 0x74, 0xbd, 0x90,
+++	0xf1, 0x2c, 0xe6, 0x5f, 0x8d, 0xe3, 0x02, 0xe8,
+++	0xe9, 0xc4, 0xca, 0x96, 0xeb, 0x0e, 0xbc, 0x91,
+++	0xf4, 0xb9, 0xea, 0xd9, 0x1b, 0x75, 0xbd, 0xe1,
+++	0xac, 0x2a, 0x05, 0x37, 0x52, 0x9b, 0x1b, 0x3f,
+++	0x5a, 0xdc, 0x21, 0xc3, 0x98, 0xbb, 0xaf, 0xa3,
+++	0xf2, 0x00, 0xbf, 0x0d, 0x30, 0x89, 0x05, 0xcc,
+++	0xa5, 0x76, 0xf5, 0x06, 0xf0, 0xc6, 0x54, 0x8a,
+++	0x5d, 0xd4, 0x1e, 0xc1, 0xf2, 0xce, 0xb0, 0x62,
+++	0xc8, 0xfc, 0x59, 0x42, 0x9a, 0x90, 0x60, 0x55,
+++	0xfe, 0x88, 0xa5, 0x8b, 0xb8, 0x33, 0x0c, 0x23,
+++	0x24, 0x0d, 0x15, 0x70, 0x37, 0x1e, 0x3d, 0xf6,
+++	0xd2, 0xea, 0x92, 0x10, 0xb2, 0xc4, 0x51, 0xac,
+++	0xf2, 0xac, 0xf3, 0x6b, 0x6c, 0xaa, 0xcf, 0x12,
+++	0xc5, 0x6c, 0x90, 0x50, 0xb5, 0x0c, 0xfc, 0x1a,
+++	0x15, 0x52, 0xe9, 0x26, 0xc6, 0x52, 0xa4, 0xe7,
+++	0x81, 0x69, 0xe1, 0xe7, 0x9e, 0x30, 0x01, 0xec,
+++	0x84, 0x89, 0xb2, 0x0d, 0x66, 0xdd, 0xce, 0x28,
+++	0x5c, 0xec, 0x98, 0x46, 0x68, 0x21, 0x9f, 0x88,
+++	0x3f, 0x1f, 0x42, 0x77, 0xce, 0xd0, 0x61, 0xd4,
+++	0x20, 0xa7, 0xff, 0x53, 0xad, 0x37, 0xd0, 0x17,
+++	0x35, 0xc9, 0xfc, 0xba, 0x0a, 0x78, 0x3f, 0xf2,
+++	0xcc, 0x86, 0x89, 0xe8, 0x4b, 0x3c, 0x48, 0x33,
+++	0x09, 0x7f, 0xc6, 0xc0, 0xdd, 0xb8, 0xfd, 0x7a,
+++	0x66, 0x66, 0x65, 0xeb, 0x47, 0xa7, 0x04, 0x28,
+++	0xa3, 0x19, 0x8e, 0xa9, 0xb1, 0x13, 0x67, 0x62,
+++	0x70, 0xcf, 0xd6
+++};
+++static const u8 dec_output012[] __initconst = {
+++	0x74, 0xa6, 0x3e, 0xe4, 0xb1, 0xcb, 0xaf, 0xb0,
+++	0x40, 0xe5, 0x0f, 0x9e, 0xf1, 0xf2, 0x89, 0xb5,
+++	0x42, 0x34, 0x8a, 0xa1, 0x03, 0xb7, 0xe9, 0x57,
+++	0x46, 0xbe, 0x20, 0xe4, 0x6e, 0xb0, 0xeb, 0xff,
+++	0xea, 0x07, 0x7e, 0xef, 0xe2, 0x55, 0x9f, 0xe5,
+++	0x78, 0x3a, 0xb7, 0x83, 0xc2, 0x18, 0x40, 0x7b,
+++	0xeb, 0xcd, 0x81, 0xfb, 0x90, 0x12, 0x9e, 0x46,
+++	0xa9, 0xd6, 0x4a, 0xba, 0xb0, 0x62, 0xdb, 0x6b,
+++	0x99, 0xc4, 0xdb, 0x54, 0x4b, 0xb8, 0xa5, 0x71,
+++	0xcb, 0xcd, 0x63, 0x32, 0x55, 0xfb, 0x31, 0xf0,
+++	0x38, 0xf5, 0xbe, 0x78, 0xe4, 0x45, 0xce, 0x1b,
+++	0x6a, 0x5b, 0x0e, 0xf4, 0x16, 0xe4, 0xb1, 0x3d,
+++	0xf6, 0x63, 0x7b, 0xa7, 0x0c, 0xde, 0x6f, 0x8f,
+++	0x74, 0xdf, 0xe0, 0x1e, 0x9d, 0xce, 0x8f, 0x24,
+++	0xef, 0x23, 0x35, 0x33, 0x7b, 0x83, 0x34, 0x23,
+++	0x58, 0x74, 0x14, 0x77, 0x1f, 0xc2, 0x4f, 0x4e,
+++	0xc6, 0x89, 0xf9, 0x52, 0x09, 0x37, 0x64, 0x14,
+++	0xc4, 0x01, 0x6b, 0x9d, 0x77, 0xe8, 0x90, 0x5d,
+++	0xa8, 0x4a, 0x2a, 0xef, 0x5c, 0x7f, 0xeb, 0xbb,
+++	0xb2, 0xc6, 0x93, 0x99, 0x66, 0xdc, 0x7f, 0xd4,
+++	0x9e, 0x2a, 0xca, 0x8d, 0xdb, 0xe7, 0x20, 0xcf,
+++	0xe4, 0x73, 0xae, 0x49, 0x7d, 0x64, 0x0f, 0x0e,
+++	0x28, 0x46, 0xa9, 0xa8, 0x32, 0xe4, 0x0e, 0xf6,
+++	0x51, 0x53, 0xb8, 0x3c, 0xb1, 0xff, 0xa3, 0x33,
+++	0x41, 0x75, 0xff, 0xf1, 0x6f, 0xf1, 0xfb, 0xbb,
+++	0x83, 0x7f, 0x06, 0x9b, 0xe7, 0x1b, 0x0a, 0xe0,
+++	0x5c, 0x33, 0x60, 0x5b, 0xdb, 0x5b, 0xed, 0xfe,
+++	0xa5, 0x16, 0x19, 0x72, 0xa3, 0x64, 0x23, 0x00,
+++	0x02, 0xc7, 0xf3, 0x6a, 0x81, 0x3e, 0x44, 0x1d,
+++	0x79, 0x15, 0x5f, 0x9a, 0xde, 0xe2, 0xfd, 0x1b,
+++	0x73, 0xc1, 0xbc, 0x23, 0xba, 0x31, 0xd2, 0x50,
+++	0xd5, 0xad, 0x7f, 0x74, 0xa7, 0xc9, 0xf8, 0x3e,
+++	0x2b, 0x26, 0x10, 0xf6, 0x03, 0x36, 0x74, 0xe4,
+++	0x0e, 0x6a, 0x72, 0xb7, 0x73, 0x0a, 0x42, 0x28,
+++	0xc2, 0xad, 0x5e, 0x03, 0xbe, 0xb8, 0x0b, 0xa8,
+++	0x5b, 0xd4, 0xb8, 0xba, 0x52, 0x89, 0xb1, 0x9b,
+++	0xc1, 0xc3, 0x65, 0x87, 0xed, 0xa5, 0xf4, 0x86,
+++	0xfd, 0x41, 0x80, 0x91, 0x27, 0x59, 0x53, 0x67,
+++	0x15, 0x78, 0x54, 0x8b, 0x2d, 0x3d, 0xc7, 0xff,
+++	0x02, 0x92, 0x07, 0x5f, 0x7a, 0x4b, 0x60, 0x59,
+++	0x3c, 0x6f, 0x5c, 0xd8, 0xec, 0x95, 0xd2, 0xfe,
+++	0xa0, 0x3b, 0xd8, 0x3f, 0xd1, 0x69, 0xa6, 0xd6,
+++	0x41, 0xb2, 0xf4, 0x4d, 0x12, 0xf4, 0x58, 0x3e,
+++	0x66, 0x64, 0x80, 0x31, 0x9b, 0xa8, 0x4c, 0x8b,
+++	0x07, 0xb2, 0xec, 0x66, 0x94, 0x66, 0x47, 0x50,
+++	0x50, 0x5f, 0x18, 0x0b, 0x0e, 0xd6, 0xc0, 0x39,
+++	0x21, 0x13, 0x9e, 0x33, 0xbc, 0x79, 0x36, 0x02,
+++	0x96, 0x70, 0xf0, 0x48, 0x67, 0x2f, 0x26, 0xe9,
+++	0x6d, 0x10, 0xbb, 0xd6, 0x3f, 0xd1, 0x64, 0x7a,
+++	0x2e, 0xbe, 0x0c, 0x61, 0xf0, 0x75, 0x42, 0x38,
+++	0x23, 0xb1, 0x9e, 0x9f, 0x7c, 0x67, 0x66, 0xd9,
+++	0x58, 0x9a, 0xf1, 0xbb, 0x41, 0x2a, 0x8d, 0x65,
+++	0x84, 0x94, 0xfc, 0xdc, 0x6a, 0x50, 0x64, 0xdb,
+++	0x56, 0x33, 0x76, 0x00, 0x10, 0xed, 0xbe, 0xd2,
+++	0x12, 0xf6, 0xf6, 0x1b, 0xa2, 0x16, 0xde, 0xae,
+++	0x31, 0x95, 0xdd, 0xb1, 0x08, 0x7e, 0x4e, 0xee,
+++	0xe7, 0xf9, 0xa5, 0xfb, 0x5b, 0x61, 0x43, 0x00,
+++	0x40, 0xf6, 0x7e, 0x02, 0x04, 0x32, 0x4e, 0x0c,
+++	0xe2, 0x66, 0x0d, 0xd7, 0x07, 0x98, 0x0e, 0xf8,
+++	0x72, 0x34, 0x6d, 0x95, 0x86, 0xd7, 0xcb, 0x31,
+++	0x54, 0x47, 0xd0, 0x38, 0x29, 0x9c, 0x5a, 0x68,
+++	0xd4, 0x87, 0x76, 0xc9, 0xe7, 0x7e, 0xe3, 0xf4,
+++	0x81, 0x6d, 0x18, 0xcb, 0xc9, 0x05, 0xaf, 0xa0,
+++	0xfb, 0x66, 0xf7, 0xf1, 0x1c, 0xc6, 0x14, 0x11,
+++	0x4f, 0x2b, 0x79, 0x42, 0x8b, 0xbc, 0xac, 0xe7,
+++	0x6c, 0xfe, 0x0f, 0x58, 0xe7, 0x7c, 0x78, 0x39,
+++	0x30, 0xb0, 0x66, 0x2c, 0x9b, 0x6d, 0x3a, 0xe1,
+++	0xcf, 0xc9, 0xa4, 0x0e, 0x6d, 0x6d, 0x8a, 0xa1,
+++	0x3a, 0xe7, 0x28, 0xd4, 0x78, 0x4c, 0xa6, 0xa2,
+++	0x2a, 0xa6, 0x03, 0x30, 0xd7, 0xa8, 0x25, 0x66,
+++	0x87, 0x2f, 0x69, 0x5c, 0x4e, 0xdd, 0xa5, 0x49,
+++	0x5d, 0x37, 0x4a, 0x59, 0xc4, 0xaf, 0x1f, 0xa2,
+++	0xe4, 0xf8, 0xa6, 0x12, 0x97, 0xd5, 0x79, 0xf5,
+++	0xe2, 0x4a, 0x2b, 0x5f, 0x61, 0xe4, 0x9e, 0xe3,
+++	0xee, 0xb8, 0xa7, 0x5b, 0x2f, 0xf4, 0x9e, 0x6c,
+++	0xfb, 0xd1, 0xc6, 0x56, 0x77, 0xba, 0x75, 0xaa,
+++	0x3d, 0x1a, 0xa8, 0x0b, 0xb3, 0x68, 0x24, 0x00,
+++	0x10, 0x7f, 0xfd, 0xd7, 0xa1, 0x8d, 0x83, 0x54,
+++	0x4f, 0x1f, 0xd8, 0x2a, 0xbe, 0x8a, 0x0c, 0x87,
+++	0xab, 0xa2, 0xde, 0xc3, 0x39, 0xbf, 0x09, 0x03,
+++	0xa5, 0xf3, 0x05, 0x28, 0xe1, 0xe1, 0xee, 0x39,
+++	0x70, 0x9c, 0xd8, 0x81, 0x12, 0x1e, 0x02, 0x40,
+++	0xd2, 0x6e, 0xf0, 0xeb, 0x1b, 0x3d, 0x22, 0xc6,
+++	0xe5, 0xe3, 0xb4, 0x5a, 0x98, 0xbb, 0xf0, 0x22,
+++	0x28, 0x8d, 0xe5, 0xd3, 0x16, 0x48, 0x24, 0xa5,
+++	0xe6, 0x66, 0x0c, 0xf9, 0x08, 0xf9, 0x7e, 0x1e,
+++	0xe1, 0x28, 0x26, 0x22, 0xc7, 0xc7, 0x0a, 0x32,
+++	0x47, 0xfa, 0xa3, 0xbe, 0x3c, 0xc4, 0xc5, 0x53,
+++	0x0a, 0xd5, 0x94, 0x4a, 0xd7, 0x93, 0xd8, 0x42,
+++	0x99, 0xb9, 0x0a, 0xdb, 0x56, 0xf7, 0xb9, 0x1c,
+++	0x53, 0x4f, 0xfa, 0xd3, 0x74, 0xad, 0xd9, 0x68,
+++	0xf1, 0x1b, 0xdf, 0x61, 0xc6, 0x5e, 0xa8, 0x48,
+++	0xfc, 0xd4, 0x4a, 0x4c, 0x3c, 0x32, 0xf7, 0x1c,
+++	0x96, 0x21, 0x9b, 0xf9, 0xa3, 0xcc, 0x5a, 0xce,
+++	0xd5, 0xd7, 0x08, 0x24, 0xf6, 0x1c, 0xfd, 0xdd,
+++	0x38, 0xc2, 0x32, 0xe9, 0xb8, 0xe7, 0xb6, 0xfa,
+++	0x9d, 0x45, 0x13, 0x2c, 0x83, 0xfd, 0x4a, 0x69,
+++	0x82, 0xcd, 0xdc, 0xb3, 0x76, 0x0c, 0x9e, 0xd8,
+++	0xf4, 0x1b, 0x45, 0x15, 0xb4, 0x97, 0xe7, 0x58,
+++	0x34, 0xe2, 0x03, 0x29, 0x5a, 0xbf, 0xb6, 0xe0,
+++	0x5d, 0x13, 0xd9, 0x2b, 0xb4, 0x80, 0xb2, 0x45,
+++	0x81, 0x6a, 0x2e, 0x6c, 0x89, 0x7d, 0xee, 0xbb,
+++	0x52, 0xdd, 0x1f, 0x18, 0xe7, 0x13, 0x6b, 0x33,
+++	0x0e, 0xea, 0x36, 0x92, 0x77, 0x7b, 0x6d, 0x9c,
+++	0x5a, 0x5f, 0x45, 0x7b, 0x7b, 0x35, 0x62, 0x23,
+++	0xd1, 0xbf, 0x0f, 0xd0, 0x08, 0x1b, 0x2b, 0x80,
+++	0x6b, 0x7e, 0xf1, 0x21, 0x47, 0xb0, 0x57, 0xd1,
+++	0x98, 0x72, 0x90, 0x34, 0x1c, 0x20, 0x04, 0xff,
+++	0x3d, 0x5c, 0xee, 0x0e, 0x57, 0x5f, 0x6f, 0x24,
+++	0x4e, 0x3c, 0xea, 0xfc, 0xa5, 0xa9, 0x83, 0xc9,
+++	0x61, 0xb4, 0x51, 0x24, 0xf8, 0x27, 0x5e, 0x46,
+++	0x8c, 0xb1, 0x53, 0x02, 0x96, 0x35, 0xba, 0xb8,
+++	0x4c, 0x71, 0xd3, 0x15, 0x59, 0x35, 0x22, 0x20,
+++	0xad, 0x03, 0x9f, 0x66, 0x44, 0x3b, 0x9c, 0x35,
+++	0x37, 0x1f, 0x9b, 0xbb, 0xf3, 0xdb, 0x35, 0x63,
+++	0x30, 0x64, 0xaa, 0xa2, 0x06, 0xa8, 0x5d, 0xbb,
+++	0xe1, 0x9f, 0x70, 0xec, 0x82, 0x11, 0x06, 0x36,
+++	0xec, 0x8b, 0x69, 0x66, 0x24, 0x44, 0xc9, 0x4a,
+++	0x57, 0xbb, 0x9b, 0x78, 0x13, 0xce, 0x9c, 0x0c,
+++	0xba, 0x92, 0x93, 0x63, 0xb8, 0xe2, 0x95, 0x0f,
+++	0x0f, 0x16, 0x39, 0x52, 0xfd, 0x3a, 0x6d, 0x02,
+++	0x4b, 0xdf, 0x13, 0xd3, 0x2a, 0x22, 0xb4, 0x03,
+++	0x7c, 0x54, 0x49, 0x96, 0x68, 0x54, 0x10, 0xfa,
+++	0xef, 0xaa, 0x6c, 0xe8, 0x22, 0xdc, 0x71, 0x16,
+++	0x13, 0x1a, 0xf6, 0x28, 0xe5, 0x6d, 0x77, 0x3d,
+++	0xcd, 0x30, 0x63, 0xb1, 0x70, 0x52, 0xa1, 0xc5,
+++	0x94, 0x5f, 0xcf, 0xe8, 0xb8, 0x26, 0x98, 0xf7,
+++	0x06, 0xa0, 0x0a, 0x70, 0xfa, 0x03, 0x80, 0xac,
+++	0xc1, 0xec, 0xd6, 0x4c, 0x54, 0xd7, 0xfe, 0x47,
+++	0xb6, 0x88, 0x4a, 0xf7, 0x71, 0x24, 0xee, 0xf3,
+++	0xd2, 0xc2, 0x4a, 0x7f, 0xfe, 0x61, 0xc7, 0x35,
+++	0xc9, 0x37, 0x67, 0xcb, 0x24, 0x35, 0xda, 0x7e,
+++	0xca, 0x5f, 0xf3, 0x8d, 0xd4, 0x13, 0x8e, 0xd6,
+++	0xcb, 0x4d, 0x53, 0x8f, 0x53, 0x1f, 0xc0, 0x74,
+++	0xf7, 0x53, 0xb9, 0x5e, 0x23, 0x37, 0xba, 0x6e,
+++	0xe3, 0x9d, 0x07, 0x55, 0x25, 0x7b, 0xe6, 0x2a,
+++	0x64, 0xd1, 0x32, 0xdd, 0x54, 0x1b, 0x4b, 0xc0,
+++	0xe1, 0xd7, 0x69, 0x58, 0xf8, 0x93, 0x29, 0xc4,
+++	0xdd, 0x23, 0x2f, 0xa5, 0xfc, 0x9d, 0x7e, 0xf8,
+++	0xd4, 0x90, 0xcd, 0x82, 0x55, 0xdc, 0x16, 0x16,
+++	0x9f, 0x07, 0x52, 0x9b, 0x9d, 0x25, 0xed, 0x32,
+++	0xc5, 0x7b, 0xdf, 0xf6, 0x83, 0x46, 0x3d, 0x65,
+++	0xb7, 0xef, 0x87, 0x7a, 0x12, 0x69, 0x8f, 0x06,
+++	0x7c, 0x51, 0x15, 0x4a, 0x08, 0xe8, 0xac, 0x9a,
+++	0x0c, 0x24, 0xa7, 0x27, 0xd8, 0x46, 0x2f, 0xe7,
+++	0x01, 0x0e, 0x1c, 0xc6, 0x91, 0xb0, 0x6e, 0x85,
+++	0x65, 0xf0, 0x29, 0x0d, 0x2e, 0x6b, 0x3b, 0xfb,
+++	0x4b, 0xdf, 0xe4, 0x80, 0x93, 0x03, 0x66, 0x46,
+++	0x3e, 0x8a, 0x6e, 0xf3, 0x5e, 0x4d, 0x62, 0x0e,
+++	0x49, 0x05, 0xaf, 0xd4, 0xf8, 0x21, 0x20, 0x61,
+++	0x1d, 0x39, 0x17, 0xf4, 0x61, 0x47, 0x95, 0xfb,
+++	0x15, 0x2e, 0xb3, 0x4f, 0xd0, 0x5d, 0xf5, 0x7d,
+++	0x40, 0xda, 0x90, 0x3c, 0x6b, 0xcb, 0x17, 0x00,
+++	0x13, 0x3b, 0x64, 0x34, 0x1b, 0xf0, 0xf2, 0xe5,
+++	0x3b, 0xb2, 0xc7, 0xd3, 0x5f, 0x3a, 0x44, 0xa6,
+++	0x9b, 0xb7, 0x78, 0x0e, 0x42, 0x5d, 0x4c, 0xc1,
+++	0xe9, 0xd2, 0xcb, 0xb7, 0x78, 0xd1, 0xfe, 0x9a,
+++	0xb5, 0x07, 0xe9, 0xe0, 0xbe, 0xe2, 0x8a, 0xa7,
+++	0x01, 0x83, 0x00, 0x8c, 0x5c, 0x08, 0xe6, 0x63,
+++	0x12, 0x92, 0xb7, 0xb7, 0xa6, 0x19, 0x7d, 0x38,
+++	0x13, 0x38, 0x92, 0x87, 0x24, 0xf9, 0x48, 0xb3,
+++	0x5e, 0x87, 0x6a, 0x40, 0x39, 0x5c, 0x3f, 0xed,
+++	0x8f, 0xee, 0xdb, 0x15, 0x82, 0x06, 0xda, 0x49,
+++	0x21, 0x2b, 0xb5, 0xbf, 0x32, 0x7c, 0x9f, 0x42,
+++	0x28, 0x63, 0xcf, 0xaf, 0x1e, 0xf8, 0xc6, 0xa0,
+++	0xd1, 0x02, 0x43, 0x57, 0x62, 0xec, 0x9b, 0x0f,
+++	0x01, 0x9e, 0x71, 0xd8, 0x87, 0x9d, 0x01, 0xc1,
+++	0x58, 0x77, 0xd9, 0xaf, 0xb1, 0x10, 0x7e, 0xdd,
+++	0xa6, 0x50, 0x96, 0xe5, 0xf0, 0x72, 0x00, 0x6d,
+++	0x4b, 0xf8, 0x2a, 0x8f, 0x19, 0xf3, 0x22, 0x88,
+++	0x11, 0x4a, 0x8b, 0x7c, 0xfd, 0xb7, 0xed, 0xe1,
+++	0xf6, 0x40, 0x39, 0xe0, 0xe9, 0xf6, 0x3d, 0x25,
+++	0xe6, 0x74, 0x3c, 0x58, 0x57, 0x7f, 0xe1, 0x22,
+++	0x96, 0x47, 0x31, 0x91, 0xba, 0x70, 0x85, 0x28,
+++	0x6b, 0x9f, 0x6e, 0x25, 0xac, 0x23, 0x66, 0x2f,
+++	0x29, 0x88, 0x28, 0xce, 0x8c, 0x5c, 0x88, 0x53,
+++	0xd1, 0x3b, 0xcc, 0x6a, 0x51, 0xb2, 0xe1, 0x28,
+++	0x3f, 0x91, 0xb4, 0x0d, 0x00, 0x3a, 0xe3, 0xf8,
+++	0xc3, 0x8f, 0xd7, 0x96, 0x62, 0x0e, 0x2e, 0xfc,
+++	0xc8, 0x6c, 0x77, 0xa6, 0x1d, 0x22, 0xc1, 0xb8,
+++	0xe6, 0x61, 0xd7, 0x67, 0x36, 0x13, 0x7b, 0xbb,
+++	0x9b, 0x59, 0x09, 0xa6, 0xdf, 0xf7, 0x6b, 0xa3,
+++	0x40, 0x1a, 0xf5, 0x4f, 0xb4, 0xda, 0xd3, 0xf3,
+++	0x81, 0x93, 0xc6, 0x18, 0xd9, 0x26, 0xee, 0xac,
+++	0xf0, 0xaa, 0xdf, 0xc5, 0x9c, 0xca, 0xc2, 0xa2,
+++	0xcc, 0x7b, 0x5c, 0x24, 0xb0, 0xbc, 0xd0, 0x6a,
+++	0x4d, 0x89, 0x09, 0xb8, 0x07, 0xfe, 0x87, 0xad,
+++	0x0a, 0xea, 0xb8, 0x42, 0xf9, 0x5e, 0xb3, 0x3e,
+++	0x36, 0x4c, 0xaf, 0x75, 0x9e, 0x1c, 0xeb, 0xbd,
+++	0xbc, 0xbb, 0x80, 0x40, 0xa7, 0x3a, 0x30, 0xbf,
+++	0xa8, 0x44, 0xf4, 0xeb, 0x38, 0xad, 0x29, 0xba,
+++	0x23, 0xed, 0x41, 0x0c, 0xea, 0xd2, 0xbb, 0x41,
+++	0x18, 0xd6, 0xb9, 0xba, 0x65, 0x2b, 0xa3, 0x91,
+++	0x6d, 0x1f, 0xa9, 0xf4, 0xd1, 0x25, 0x8d, 0x4d,
+++	0x38, 0xff, 0x64, 0xa0, 0xec, 0xde, 0xa6, 0xb6,
+++	0x79, 0xab, 0x8e, 0x33, 0x6c, 0x47, 0xde, 0xaf,
+++	0x94, 0xa4, 0xa5, 0x86, 0x77, 0x55, 0x09, 0x92,
+++	0x81, 0x31, 0x76, 0xc7, 0x34, 0x22, 0x89, 0x8e,
+++	0x3d, 0x26, 0x26, 0xd7, 0xfc, 0x1e, 0x16, 0x72,
+++	0x13, 0x33, 0x63, 0xd5, 0x22, 0xbe, 0xb8, 0x04,
+++	0x34, 0x84, 0x41, 0xbb, 0x80, 0xd0, 0x9f, 0x46,
+++	0x48, 0x07, 0xa7, 0xfc, 0x2b, 0x3a, 0x75, 0x55,
+++	0x8c, 0xc7, 0x6a, 0xbd, 0x7e, 0x46, 0x08, 0x84,
+++	0x0f, 0xd5, 0x74, 0xc0, 0x82, 0x8e, 0xaa, 0x61,
+++	0x05, 0x01, 0xb2, 0x47, 0x6e, 0x20, 0x6a, 0x2d,
+++	0x58, 0x70, 0x48, 0x32, 0xa7, 0x37, 0xd2, 0xb8,
+++	0x82, 0x1a, 0x51, 0xb9, 0x61, 0xdd, 0xfd, 0x9d,
+++	0x6b, 0x0e, 0x18, 0x97, 0xf8, 0x45, 0x5f, 0x87,
+++	0x10, 0xcf, 0x34, 0x72, 0x45, 0x26, 0x49, 0x70,
+++	0xe7, 0xa3, 0x78, 0xe0, 0x52, 0x89, 0x84, 0x94,
+++	0x83, 0x82, 0xc2, 0x69, 0x8f, 0xe3, 0xe1, 0x3f,
+++	0x60, 0x74, 0x88, 0xc4, 0xf7, 0x75, 0x2c, 0xfb,
+++	0xbd, 0xb6, 0xc4, 0x7e, 0x10, 0x0a, 0x6c, 0x90,
+++	0x04, 0x9e, 0xc3, 0x3f, 0x59, 0x7c, 0xce, 0x31,
+++	0x18, 0x60, 0x57, 0x73, 0x46, 0x94, 0x7d, 0x06,
+++	0xa0, 0x6d, 0x44, 0xec, 0xa2, 0x0a, 0x9e, 0x05,
+++	0x15, 0xef, 0xca, 0x5c, 0xbf, 0x00, 0xeb, 0xf7,
+++	0x3d, 0x32, 0xd4, 0xa5, 0xef, 0x49, 0x89, 0x5e,
+++	0x46, 0xb0, 0xa6, 0x63, 0x5b, 0x8a, 0x73, 0xae,
+++	0x6f, 0xd5, 0x9d, 0xf8, 0x4f, 0x40, 0xb5, 0xb2,
+++	0x6e, 0xd3, 0xb6, 0x01, 0xa9, 0x26, 0xa2, 0x21,
+++	0xcf, 0x33, 0x7a, 0x3a, 0xa4, 0x23, 0x13, 0xb0,
+++	0x69, 0x6a, 0xee, 0xce, 0xd8, 0x9d, 0x01, 0x1d,
+++	0x50, 0xc1, 0x30, 0x6c, 0xb1, 0xcd, 0xa0, 0xf0,
+++	0xf0, 0xa2, 0x64, 0x6f, 0xbb, 0xbf, 0x5e, 0xe6,
+++	0xab, 0x87, 0xb4, 0x0f, 0x4f, 0x15, 0xaf, 0xb5,
+++	0x25, 0xa1, 0xb2, 0xd0, 0x80, 0x2c, 0xfb, 0xf9,
+++	0xfe, 0xd2, 0x33, 0xbb, 0x76, 0xfe, 0x7c, 0xa8,
+++	0x66, 0xf7, 0xe7, 0x85, 0x9f, 0x1f, 0x85, 0x57,
+++	0x88, 0xe1, 0xe9, 0x63, 0xe4, 0xd8, 0x1c, 0xa1,
+++	0xfb, 0xda, 0x44, 0x05, 0x2e, 0x1d, 0x3a, 0x1c,
+++	0xff, 0xc8, 0x3b, 0xc0, 0xfe, 0xda, 0x22, 0x0b,
+++	0x43, 0xd6, 0x88, 0x39, 0x4c, 0x4a, 0xa6, 0x69,
+++	0x18, 0x93, 0x42, 0x4e, 0xb5, 0xcc, 0x66, 0x0d,
+++	0x09, 0xf8, 0x1e, 0x7c, 0xd3, 0x3c, 0x99, 0x0d,
+++	0x50, 0x1d, 0x62, 0xe9, 0x57, 0x06, 0xbf, 0x19,
+++	0x88, 0xdd, 0xad, 0x7b, 0x4f, 0xf9, 0xc7, 0x82,
+++	0x6d, 0x8d, 0xc8, 0xc4, 0xc5, 0x78, 0x17, 0x20,
+++	0x15, 0xc5, 0x52, 0x41, 0xcf, 0x5b, 0xd6, 0x7f,
+++	0x94, 0x02, 0x41, 0xe0, 0x40, 0x22, 0x03, 0x5e,
+++	0xd1, 0x53, 0xd4, 0x86, 0xd3, 0x2c, 0x9f, 0x0f,
+++	0x96, 0xe3, 0x6b, 0x9a, 0x76, 0x32, 0x06, 0x47,
+++	0x4b, 0x11, 0xb3, 0xdd, 0x03, 0x65, 0xbd, 0x9b,
+++	0x01, 0xda, 0x9c, 0xb9, 0x7e, 0x3f, 0x6a, 0xc4,
+++	0x7b, 0xea, 0xd4, 0x3c, 0xb9, 0xfb, 0x5c, 0x6b,
+++	0x64, 0x33, 0x52, 0xba, 0x64, 0x78, 0x8f, 0xa4,
+++	0xaf, 0x7a, 0x61, 0x8d, 0xbc, 0xc5, 0x73, 0xe9,
+++	0x6b, 0x58, 0x97, 0x4b, 0xbf, 0x63, 0x22, 0xd3,
+++	0x37, 0x02, 0x54, 0xc5, 0xb9, 0x16, 0x4a, 0xf0,
+++	0x19, 0xd8, 0x94, 0x57, 0xb8, 0x8a, 0xb3, 0x16,
+++	0x3b, 0xd0, 0x84, 0x8e, 0x67, 0xa6, 0xa3, 0x7d,
+++	0x78, 0xec, 0x00
+++};
+++static const u8 dec_assoc012[] __initconst = {
+++	0xb1, 0x69, 0x83, 0x87, 0x30, 0xaa, 0x5d, 0xb8,
+++	0x77, 0xe8, 0x21, 0xff, 0x06, 0x59, 0x35, 0xce,
+++	0x75, 0xfe, 0x38, 0xef, 0xb8, 0x91, 0x43, 0x8c,
+++	0xcf, 0x70, 0xdd, 0x0a, 0x68, 0xbf, 0xd4, 0xbc,
+++	0x16, 0x76, 0x99, 0x36, 0x1e, 0x58, 0x79, 0x5e,
+++	0xd4, 0x29, 0xf7, 0x33, 0x93, 0x48, 0xdb, 0x5f,
+++	0x01, 0xae, 0x9c, 0xb6, 0xe4, 0x88, 0x6d, 0x2b,
+++	0x76, 0x75, 0xe0, 0xf3, 0x74, 0xe2, 0xc9
+++};
+++static const u8 dec_nonce012[] __initconst = {
+++	0x05, 0xa3, 0x93, 0xed, 0x30, 0xc5, 0xa2, 0x06
+++};
+++static const u8 dec_key012[] __initconst = {
+++	0xb3, 0x35, 0x50, 0x03, 0x54, 0x2e, 0x40, 0x5e,
+++	0x8f, 0x59, 0x8e, 0xc5, 0x90, 0xd5, 0x27, 0x2d,
+++	0xba, 0x29, 0x2e, 0xcb, 0x1b, 0x70, 0x44, 0x1e,
+++	0x65, 0x91, 0x6e, 0x2a, 0x79, 0x22, 0xda, 0x64
+++};
+++
+++static const u8 dec_input013[] __initconst = {
+++	0x52, 0x34, 0xb3, 0x65, 0x3b, 0xb7, 0xe5, 0xd3,
+++	0xab, 0x49, 0x17, 0x60, 0xd2, 0x52, 0x56, 0xdf,
+++	0xdf, 0x34, 0x56, 0x82, 0xe2, 0xbe, 0xe5, 0xe1,
+++	0x28, 0xd1, 0x4e, 0x5f, 0x4f, 0x01, 0x7d, 0x3f,
+++	0x99, 0x6b, 0x30, 0x6e, 0x1a, 0x7c, 0x4c, 0x8e,
+++	0x62, 0x81, 0xae, 0x86, 0x3f, 0x6b, 0xd0, 0xb5,
+++	0xa9, 0xcf, 0x50, 0xf1, 0x02, 0x12, 0xa0, 0x0b,
+++	0x24, 0xe9, 0xe6, 0x72, 0x89, 0x2c, 0x52, 0x1b,
+++	0x34, 0x38, 0xf8, 0x75, 0x5f, 0xa0, 0x74, 0xe2,
+++	0x99, 0xdd, 0xa6, 0x4b, 0x14, 0x50, 0x4e, 0xf1,
+++	0xbe, 0xd6, 0x9e, 0xdb, 0xb2, 0x24, 0x27, 0x74,
+++	0x12, 0x4a, 0x78, 0x78, 0x17, 0xa5, 0x58, 0x8e,
+++	0x2f, 0xf9, 0xf4, 0x8d, 0xee, 0x03, 0x88, 0xae,
+++	0xb8, 0x29, 0xa1, 0x2f, 0x4b, 0xee, 0x92, 0xbd,
+++	0x87, 0xb3, 0xce, 0x34, 0x21, 0x57, 0x46, 0x04,
+++	0x49, 0x0c, 0x80, 0xf2, 0x01, 0x13, 0xa1, 0x55,
+++	0xb3, 0xff, 0x44, 0x30, 0x3c, 0x1c, 0xd0, 0xef,
+++	0xbc, 0x18, 0x74, 0x26, 0xad, 0x41, 0x5b, 0x5b,
+++	0x3e, 0x9a, 0x7a, 0x46, 0x4f, 0x16, 0xd6, 0x74,
+++	0x5a, 0xb7, 0x3a, 0x28, 0x31, 0xd8, 0xae, 0x26,
+++	0xac, 0x50, 0x53, 0x86, 0xf2, 0x56, 0xd7, 0x3f,
+++	0x29, 0xbc, 0x45, 0x68, 0x8e, 0xcb, 0x98, 0x64,
+++	0xdd, 0xc9, 0xba, 0xb8, 0x4b, 0x7b, 0x82, 0xdd,
+++	0x14, 0xa7, 0xcb, 0x71, 0x72, 0x00, 0x5c, 0xad,
+++	0x7b, 0x6a, 0x89, 0xa4, 0x3d, 0xbf, 0xb5, 0x4b,
+++	0x3e, 0x7c, 0x5a, 0xcf, 0xb8, 0xa1, 0xc5, 0x6e,
+++	0xc8, 0xb6, 0x31, 0x57, 0x7b, 0xdf, 0xa5, 0x7e,
+++	0xb1, 0xd6, 0x42, 0x2a, 0x31, 0x36, 0xd1, 0xd0,
+++	0x3f, 0x7a, 0xe5, 0x94, 0xd6, 0x36, 0xa0, 0x6f,
+++	0xb7, 0x40, 0x7d, 0x37, 0xc6, 0x55, 0x7c, 0x50,
+++	0x40, 0x6d, 0x29, 0x89, 0xe3, 0x5a, 0xae, 0x97,
+++	0xe7, 0x44, 0x49, 0x6e, 0xbd, 0x81, 0x3d, 0x03,
+++	0x93, 0x06, 0x12, 0x06, 0xe2, 0x41, 0x12, 0x4a,
+++	0xf1, 0x6a, 0xa4, 0x58, 0xa2, 0xfb, 0xd2, 0x15,
+++	0xba, 0xc9, 0x79, 0xc9, 0xce, 0x5e, 0x13, 0xbb,
+++	0xf1, 0x09, 0x04, 0xcc, 0xfd, 0xe8, 0x51, 0x34,
+++	0x6a, 0xe8, 0x61, 0x88, 0xda, 0xed, 0x01, 0x47,
+++	0x84, 0xf5, 0x73, 0x25, 0xf9, 0x1c, 0x42, 0x86,
+++	0x07, 0xf3, 0x5b, 0x1a, 0x01, 0xb3, 0xeb, 0x24,
+++	0x32, 0x8d, 0xf6, 0xed, 0x7c, 0x4b, 0xeb, 0x3c,
+++	0x36, 0x42, 0x28, 0xdf, 0xdf, 0xb6, 0xbe, 0xd9,
+++	0x8c, 0x52, 0xd3, 0x2b, 0x08, 0x90, 0x8c, 0xe7,
+++	0x98, 0x31, 0xe2, 0x32, 0x8e, 0xfc, 0x11, 0x48,
+++	0x00, 0xa8, 0x6a, 0x42, 0x4a, 0x02, 0xc6, 0x4b,
+++	0x09, 0xf1, 0xe3, 0x49, 0xf3, 0x45, 0x1f, 0x0e,
+++	0xbc, 0x56, 0xe2, 0xe4, 0xdf, 0xfb, 0xeb, 0x61,
+++	0xfa, 0x24, 0xc1, 0x63, 0x75, 0xbb, 0x47, 0x75,
+++	0xaf, 0xe1, 0x53, 0x16, 0x96, 0x21, 0x85, 0x26,
+++	0x11, 0xb3, 0x76, 0xe3, 0x23, 0xa1, 0x6b, 0x74,
+++	0x37, 0xd0, 0xde, 0x06, 0x90, 0x71, 0x5d, 0x43,
+++	0x88, 0x9b, 0x00, 0x54, 0xa6, 0x75, 0x2f, 0xa1,
+++	0xc2, 0x0b, 0x73, 0x20, 0x1d, 0xb6, 0x21, 0x79,
+++	0x57, 0x3f, 0xfa, 0x09, 0xbe, 0x8a, 0x33, 0xc3,
+++	0x52, 0xf0, 0x1d, 0x82, 0x31, 0xd1, 0x55, 0xb5,
+++	0x6c, 0x99, 0x25, 0xcf, 0x5c, 0x32, 0xce, 0xe9,
+++	0x0d, 0xfa, 0x69, 0x2c, 0xd5, 0x0d, 0xc5, 0x6d,
+++	0x86, 0xd0, 0x0c, 0x3b, 0x06, 0x50, 0x79, 0xe8,
+++	0xc3, 0xae, 0x04, 0xe6, 0xcd, 0x51, 0xe4, 0x26,
+++	0x9b, 0x4f, 0x7e, 0xa6, 0x0f, 0xab, 0xd8, 0xe5,
+++	0xde, 0xa9, 0x00, 0x95, 0xbe, 0xa3, 0x9d, 0x5d,
+++	0xb2, 0x09, 0x70, 0x18, 0x1c, 0xf0, 0xac, 0x29,
+++	0x23, 0x02, 0x29, 0x28, 0xd2, 0x74, 0x35, 0x57,
+++	0x62, 0x0f, 0x24, 0xea, 0x5e, 0x33, 0xc2, 0x92,
+++	0xf3, 0x78, 0x4d, 0x30, 0x1e, 0xa1, 0x99, 0xa9,
+++	0x82, 0xb0, 0x42, 0x31, 0x8d, 0xad, 0x8a, 0xbc,
+++	0xfc, 0xd4, 0x57, 0x47, 0x3e, 0xb4, 0x50, 0xdd,
+++	0x6e, 0x2c, 0x80, 0x4d, 0x22, 0xf1, 0xfb, 0x57,
+++	0xc4, 0xdd, 0x17, 0xe1, 0x8a, 0x36, 0x4a, 0xb3,
+++	0x37, 0xca, 0xc9, 0x4e, 0xab, 0xd5, 0x69, 0xc4,
+++	0xf4, 0xbc, 0x0b, 0x3b, 0x44, 0x4b, 0x29, 0x9c,
+++	0xee, 0xd4, 0x35, 0x22, 0x21, 0xb0, 0x1f, 0x27,
+++	0x64, 0xa8, 0x51, 0x1b, 0xf0, 0x9f, 0x19, 0x5c,
+++	0xfb, 0x5a, 0x64, 0x74, 0x70, 0x45, 0x09, 0xf5,
+++	0x64, 0xfe, 0x1a, 0x2d, 0xc9, 0x14, 0x04, 0x14,
+++	0xcf, 0xd5, 0x7d, 0x60, 0xaf, 0x94, 0x39, 0x94,
+++	0xe2, 0x7d, 0x79, 0x82, 0xd0, 0x65, 0x3b, 0x6b,
+++	0x9c, 0x19, 0x84, 0xb4, 0x6d, 0xb3, 0x0c, 0x99,
+++	0xc0, 0x56, 0xa8, 0xbd, 0x73, 0xce, 0x05, 0x84,
+++	0x3e, 0x30, 0xaa, 0xc4, 0x9b, 0x1b, 0x04, 0x2a,
+++	0x9f, 0xd7, 0x43, 0x2b, 0x23, 0xdf, 0xbf, 0xaa,
+++	0xd5, 0xc2, 0x43, 0x2d, 0x70, 0xab, 0xdc, 0x75,
+++	0xad, 0xac, 0xf7, 0xc0, 0xbe, 0x67, 0xb2, 0x74,
+++	0xed, 0x67, 0x10, 0x4a, 0x92, 0x60, 0xc1, 0x40,
+++	0x50, 0x19, 0x8a, 0x8a, 0x8c, 0x09, 0x0e, 0x72,
+++	0xe1, 0x73, 0x5e, 0xe8, 0x41, 0x85, 0x63, 0x9f,
+++	0x3f, 0xd7, 0x7d, 0xc4, 0xfb, 0x22, 0x5d, 0x92,
+++	0x6c, 0xb3, 0x1e, 0xe2, 0x50, 0x2f, 0x82, 0xa8,
+++	0x28, 0xc0, 0xb5, 0xd7, 0x5f, 0x68, 0x0d, 0x2c,
+++	0x2d, 0xaf, 0x7e, 0xfa, 0x2e, 0x08, 0x0f, 0x1f,
+++	0x70, 0x9f, 0xe9, 0x19, 0x72, 0x55, 0xf8, 0xfb,
+++	0x51, 0xd2, 0x33, 0x5d, 0xa0, 0xd3, 0x2b, 0x0a,
+++	0x6c, 0xbc, 0x4e, 0xcf, 0x36, 0x4d, 0xdc, 0x3b,
+++	0xe9, 0x3e, 0x81, 0x7c, 0x61, 0xdb, 0x20, 0x2d,
+++	0x3a, 0xc3, 0xb3, 0x0c, 0x1e, 0x00, 0xb9, 0x7c,
+++	0xf5, 0xca, 0x10, 0x5f, 0x3a, 0x71, 0xb3, 0xe4,
+++	0x20, 0xdb, 0x0c, 0x2a, 0x98, 0x63, 0x45, 0x00,
+++	0x58, 0xf6, 0x68, 0xe4, 0x0b, 0xda, 0x13, 0x3b,
+++	0x60, 0x5c, 0x76, 0xdb, 0xb9, 0x97, 0x71, 0xe4,
+++	0xd9, 0xb7, 0xdb, 0xbd, 0x68, 0xc7, 0x84, 0x84,
+++	0xaa, 0x7c, 0x68, 0x62, 0x5e, 0x16, 0xfc, 0xba,
+++	0x72, 0xaa, 0x9a, 0xa9, 0xeb, 0x7c, 0x75, 0x47,
+++	0x97, 0x7e, 0xad, 0xe2, 0xd9, 0x91, 0xe8, 0xe4,
+++	0xa5, 0x31, 0xd7, 0x01, 0x8e, 0xa2, 0x11, 0x88,
+++	0x95, 0xb9, 0xf2, 0x9b, 0xd3, 0x7f, 0x1b, 0x81,
+++	0x22, 0xf7, 0x98, 0x60, 0x0a, 0x64, 0xa6, 0xc1,
+++	0xf6, 0x49, 0xc7, 0xe3, 0x07, 0x4d, 0x94, 0x7a,
+++	0xcf, 0x6e, 0x68, 0x0c, 0x1b, 0x3f, 0x6e, 0x2e,
+++	0xee, 0x92, 0xfa, 0x52, 0xb3, 0x59, 0xf8, 0xf1,
+++	0x8f, 0x6a, 0x66, 0xa3, 0x82, 0x76, 0x4a, 0x07,
+++	0x1a, 0xc7, 0xdd, 0xf5, 0xda, 0x9c, 0x3c, 0x24,
+++	0xbf, 0xfd, 0x42, 0xa1, 0x10, 0x64, 0x6a, 0x0f,
+++	0x89, 0xee, 0x36, 0xa5, 0xce, 0x99, 0x48, 0x6a,
+++	0xf0, 0x9f, 0x9e, 0x69, 0xa4, 0x40, 0x20, 0xe9,
+++	0x16, 0x15, 0xf7, 0xdb, 0x75, 0x02, 0xcb, 0xe9,
+++	0x73, 0x8b, 0x3b, 0x49, 0x2f, 0xf0, 0xaf, 0x51,
+++	0x06, 0x5c, 0xdf, 0x27, 0x27, 0x49, 0x6a, 0xd1,
+++	0xcc, 0xc7, 0xb5, 0x63, 0xb5, 0xfc, 0xb8, 0x5c,
+++	0x87, 0x7f, 0x84, 0xb4, 0xcc, 0x14, 0xa9, 0x53,
+++	0xda, 0xa4, 0x56, 0xf8, 0xb6, 0x1b, 0xcc, 0x40,
+++	0x27, 0x52, 0x06, 0x5a, 0x13, 0x81, 0xd7, 0x3a,
+++	0xd4, 0x3b, 0xfb, 0x49, 0x65, 0x31, 0x33, 0xb2,
+++	0xfa, 0xcd, 0xad, 0x58, 0x4e, 0x2b, 0xae, 0xd2,
+++	0x20, 0xfb, 0x1a, 0x48, 0xb4, 0x3f, 0x9a, 0xd8,
+++	0x7a, 0x35, 0x4a, 0xc8, 0xee, 0x88, 0x5e, 0x07,
+++	0x66, 0x54, 0xb9, 0xec, 0x9f, 0xa3, 0xe3, 0xb9,
+++	0x37, 0xaa, 0x49, 0x76, 0x31, 0xda, 0x74, 0x2d,
+++	0x3c, 0xa4, 0x65, 0x10, 0x32, 0x38, 0xf0, 0xde,
+++	0xd3, 0x99, 0x17, 0xaa, 0x71, 0xaa, 0x8f, 0x0f,
+++	0x8c, 0xaf, 0xa2, 0xf8, 0x5d, 0x64, 0xba, 0x1d,
+++	0xa3, 0xef, 0x96, 0x73, 0xe8, 0xa1, 0x02, 0x8d,
+++	0x0c, 0x6d, 0xb8, 0x06, 0x90, 0xb8, 0x08, 0x56,
+++	0x2c, 0xa7, 0x06, 0xc9, 0xc2, 0x38, 0xdb, 0x7c,
+++	0x63, 0xb1, 0x57, 0x8e, 0xea, 0x7c, 0x79, 0xf3,
+++	0x49, 0x1d, 0xfe, 0x9f, 0xf3, 0x6e, 0xb1, 0x1d,
+++	0xba, 0x19, 0x80, 0x1a, 0x0a, 0xd3, 0xb0, 0x26,
+++	0x21, 0x40, 0xb1, 0x7c, 0xf9, 0x4d, 0x8d, 0x10,
+++	0xc1, 0x7e, 0xf4, 0xf6, 0x3c, 0xa8, 0xfd, 0x7c,
+++	0xa3, 0x92, 0xb2, 0x0f, 0xaa, 0xcc, 0xa6, 0x11,
+++	0xfe, 0x04, 0xe3, 0xd1, 0x7a, 0x32, 0x89, 0xdf,
+++	0x0d, 0xc4, 0x8f, 0x79, 0x6b, 0xca, 0x16, 0x7c,
+++	0x6e, 0xf9, 0xad, 0x0f, 0xf6, 0xfe, 0x27, 0xdb,
+++	0xc4, 0x13, 0x70, 0xf1, 0x62, 0x1a, 0x4f, 0x79,
+++	0x40, 0xc9, 0x9b, 0x8b, 0x21, 0xea, 0x84, 0xfa,
+++	0xf5, 0xf1, 0x89, 0xce, 0xb7, 0x55, 0x0a, 0x80,
+++	0x39, 0x2f, 0x55, 0x36, 0x16, 0x9c, 0x7b, 0x08,
+++	0xbd, 0x87, 0x0d, 0xa5, 0x32, 0xf1, 0x52, 0x7c,
+++	0xe8, 0x55, 0x60, 0x5b, 0xd7, 0x69, 0xe4, 0xfc,
+++	0xfa, 0x12, 0x85, 0x96, 0xea, 0x50, 0x28, 0xab,
+++	0x8a, 0xf7, 0xbb, 0x0e, 0x53, 0x74, 0xca, 0xa6,
+++	0x27, 0x09, 0xc2, 0xb5, 0xde, 0x18, 0x14, 0xd9,
+++	0xea, 0xe5, 0x29, 0x1c, 0x40, 0x56, 0xcf, 0xd7,
+++	0xae, 0x05, 0x3f, 0x65, 0xaf, 0x05, 0x73, 0xe2,
+++	0x35, 0x96, 0x27, 0x07, 0x14, 0xc0, 0xad, 0x33,
+++	0xf1, 0xdc, 0x44, 0x7a, 0x89, 0x17, 0x77, 0xd2,
+++	0x9c, 0x58, 0x60, 0xf0, 0x3f, 0x7b, 0x2d, 0x2e,
+++	0x57, 0x95, 0x54, 0x87, 0xed, 0xf2, 0xc7, 0x4c,
+++	0xf0, 0xae, 0x56, 0x29, 0x19, 0x7d, 0x66, 0x4b,
+++	0x9b, 0x83, 0x84, 0x42, 0x3b, 0x01, 0x25, 0x66,
+++	0x8e, 0x02, 0xde, 0xb9, 0x83, 0x54, 0x19, 0xf6,
+++	0x9f, 0x79, 0x0d, 0x67, 0xc5, 0x1d, 0x7a, 0x44,
+++	0x02, 0x98, 0xa7, 0x16, 0x1c, 0x29, 0x0d, 0x74,
+++	0xff, 0x85, 0x40, 0x06, 0xef, 0x2c, 0xa9, 0xc6,
+++	0xf5, 0x53, 0x07, 0x06, 0xae, 0xe4, 0xfa, 0x5f,
+++	0xd8, 0x39, 0x4d, 0xf1, 0x9b, 0x6b, 0xd9, 0x24,
+++	0x84, 0xfe, 0x03, 0x4c, 0xb2, 0x3f, 0xdf, 0xa1,
+++	0x05, 0x9e, 0x50, 0x14, 0x5a, 0xd9, 0x1a, 0xa2,
+++	0xa7, 0xfa, 0xfa, 0x17, 0xf7, 0x78, 0xd6, 0xb5,
+++	0x92, 0x61, 0x91, 0xac, 0x36, 0xfa, 0x56, 0x0d,
+++	0x38, 0x32, 0x18, 0x85, 0x08, 0x58, 0x37, 0xf0,
+++	0x4b, 0xdb, 0x59, 0xe7, 0xa4, 0x34, 0xc0, 0x1b,
+++	0x01, 0xaf, 0x2d, 0xde, 0xa1, 0xaa, 0x5d, 0xd3,
+++	0xec, 0xe1, 0xd4, 0xf7, 0xe6, 0x54, 0x68, 0xf0,
+++	0x51, 0x97, 0xa7, 0x89, 0xea, 0x24, 0xad, 0xd3,
+++	0x6e, 0x47, 0x93, 0x8b, 0x4b, 0xb4, 0xf7, 0x1c,
+++	0x42, 0x06, 0x67, 0xe8, 0x99, 0xf6, 0xf5, 0x7b,
+++	0x85, 0xb5, 0x65, 0xb5, 0xb5, 0xd2, 0x37, 0xf5,
+++	0xf3, 0x02, 0xa6, 0x4d, 0x11, 0xa7, 0xdc, 0x51,
+++	0x09, 0x7f, 0xa0, 0xd8, 0x88, 0x1c, 0x13, 0x71,
+++	0xae, 0x9c, 0xb7, 0x7b, 0x34, 0xd6, 0x4e, 0x68,
+++	0x26, 0x83, 0x51, 0xaf, 0x1d, 0xee, 0x8b, 0xbb,
+++	0x69, 0x43, 0x2b, 0x9e, 0x8a, 0xbc, 0x02, 0x0e,
+++	0xa0, 0x1b, 0xe0, 0xa8, 0x5f, 0x6f, 0xaf, 0x1b,
+++	0x8f, 0xe7, 0x64, 0x71, 0x74, 0x11, 0x7e, 0xa8,
+++	0xd8, 0xf9, 0x97, 0x06, 0xc3, 0xb6, 0xfb, 0xfb,
+++	0xb7, 0x3d, 0x35, 0x9d, 0x3b, 0x52, 0xed, 0x54,
+++	0xca, 0xf4, 0x81, 0x01, 0x2d, 0x1b, 0xc3, 0xa7,
+++	0x00, 0x3d, 0x1a, 0x39, 0x54, 0xe1, 0xf6, 0xff,
+++	0xed, 0x6f, 0x0b, 0x5a, 0x68, 0xda, 0x58, 0xdd,
+++	0xa9, 0xcf, 0x5c, 0x4a, 0xe5, 0x09, 0x4e, 0xde,
+++	0x9d, 0xbc, 0x3e, 0xee, 0x5a, 0x00, 0x3b, 0x2c,
+++	0x87, 0x10, 0x65, 0x60, 0xdd, 0xd7, 0x56, 0xd1,
+++	0x4c, 0x64, 0x45, 0xe4, 0x21, 0xec, 0x78, 0xf8,
+++	0x25, 0x7a, 0x3e, 0x16, 0x5d, 0x09, 0x53, 0x14,
+++	0xbe, 0x4f, 0xae, 0x87, 0xd8, 0xd1, 0xaa, 0x3c,
+++	0xf6, 0x3e, 0xa4, 0x70, 0x8c, 0x5e, 0x70, 0xa4,
+++	0xb3, 0x6b, 0x66, 0x73, 0xd3, 0xbf, 0x31, 0x06,
+++	0x19, 0x62, 0x93, 0x15, 0xf2, 0x86, 0xe4, 0x52,
+++	0x7e, 0x53, 0x4c, 0x12, 0x38, 0xcc, 0x34, 0x7d,
+++	0x57, 0xf6, 0x42, 0x93, 0x8a, 0xc4, 0xee, 0x5c,
+++	0x8a, 0xe1, 0x52, 0x8f, 0x56, 0x64, 0xf6, 0xa6,
+++	0xd1, 0x91, 0x57, 0x70, 0xcd, 0x11, 0x76, 0xf5,
+++	0x59, 0x60, 0x60, 0x3c, 0xc1, 0xc3, 0x0b, 0x7f,
+++	0x58, 0x1a, 0x50, 0x91, 0xf1, 0x68, 0x8f, 0x6e,
+++	0x74, 0x74, 0xa8, 0x51, 0x0b, 0xf7, 0x7a, 0x98,
+++	0x37, 0xf2, 0x0a, 0x0e, 0xa4, 0x97, 0x04, 0xb8,
+++	0x9b, 0xfd, 0xa0, 0xea, 0xf7, 0x0d, 0xe1, 0xdb,
+++	0x03, 0xf0, 0x31, 0x29, 0xf8, 0xdd, 0x6b, 0x8b,
+++	0x5d, 0xd8, 0x59, 0xa9, 0x29, 0xcf, 0x9a, 0x79,
+++	0x89, 0x19, 0x63, 0x46, 0x09, 0x79, 0x6a, 0x11,
+++	0xda, 0x63, 0x68, 0x48, 0x77, 0x23, 0xfb, 0x7d,
+++	0x3a, 0x43, 0xcb, 0x02, 0x3b, 0x7a, 0x6d, 0x10,
+++	0x2a, 0x9e, 0xac, 0xf1, 0xd4, 0x19, 0xf8, 0x23,
+++	0x64, 0x1d, 0x2c, 0x5f, 0xf2, 0xb0, 0x5c, 0x23,
+++	0x27, 0xf7, 0x27, 0x30, 0x16, 0x37, 0xb1, 0x90,
+++	0xab, 0x38, 0xfb, 0x55, 0xcd, 0x78, 0x58, 0xd4,
+++	0x7d, 0x43, 0xf6, 0x45, 0x5e, 0x55, 0x8d, 0xb1,
+++	0x02, 0x65, 0x58, 0xb4, 0x13, 0x4b, 0x36, 0xf7,
+++	0xcc, 0xfe, 0x3d, 0x0b, 0x82, 0xe2, 0x12, 0x11,
+++	0xbb, 0xe6, 0xb8, 0x3a, 0x48, 0x71, 0xc7, 0x50,
+++	0x06, 0x16, 0x3a, 0xe6, 0x7c, 0x05, 0xc7, 0xc8,
+++	0x4d, 0x2f, 0x08, 0x6a, 0x17, 0x9a, 0x95, 0x97,
+++	0x50, 0x68, 0xdc, 0x28, 0x18, 0xc4, 0x61, 0x38,
+++	0xb9, 0xe0, 0x3e, 0x78, 0xdb, 0x29, 0xe0, 0x9f,
+++	0x52, 0xdd, 0xf8, 0x4f, 0x91, 0xc1, 0xd0, 0x33,
+++	0xa1, 0x7a, 0x8e, 0x30, 0x13, 0x82, 0x07, 0x9f,
+++	0xd3, 0x31, 0x0f, 0x23, 0xbe, 0x32, 0x5a, 0x75,
+++	0xcf, 0x96, 0xb2, 0xec, 0xb5, 0x32, 0xac, 0x21,
+++	0xd1, 0x82, 0x33, 0xd3, 0x15, 0x74, 0xbd, 0x90,
+++	0xf1, 0x2c, 0xe6, 0x5f, 0x8d, 0xe3, 0x02, 0xe8,
+++	0xe9, 0xc4, 0xca, 0x96, 0xeb, 0x0e, 0xbc, 0x91,
+++	0xf4, 0xb9, 0xea, 0xd9, 0x1b, 0x75, 0xbd, 0xe1,
+++	0xac, 0x2a, 0x05, 0x37, 0x52, 0x9b, 0x1b, 0x3f,
+++	0x5a, 0xdc, 0x21, 0xc3, 0x98, 0xbb, 0xaf, 0xa3,
+++	0xf2, 0x00, 0xbf, 0x0d, 0x30, 0x89, 0x05, 0xcc,
+++	0xa5, 0x76, 0xf5, 0x06, 0xf0, 0xc6, 0x54, 0x8a,
+++	0x5d, 0xd4, 0x1e, 0xc1, 0xf2, 0xce, 0xb0, 0x62,
+++	0xc8, 0xfc, 0x59, 0x42, 0x9a, 0x90, 0x60, 0x55,
+++	0xfe, 0x88, 0xa5, 0x8b, 0xb8, 0x33, 0x0c, 0x23,
+++	0x24, 0x0d, 0x15, 0x70, 0x37, 0x1e, 0x3d, 0xf6,
+++	0xd2, 0xea, 0x92, 0x10, 0xb2, 0xc4, 0x51, 0xac,
+++	0xf2, 0xac, 0xf3, 0x6b, 0x6c, 0xaa, 0xcf, 0x12,
+++	0xc5, 0x6c, 0x90, 0x50, 0xb5, 0x0c, 0xfc, 0x1a,
+++	0x15, 0x52, 0xe9, 0x26, 0xc6, 0x52, 0xa4, 0xe7,
+++	0x81, 0x69, 0xe1, 0xe7, 0x9e, 0x30, 0x01, 0xec,
+++	0x84, 0x89, 0xb2, 0x0d, 0x66, 0xdd, 0xce, 0x28,
+++	0x5c, 0xec, 0x98, 0x46, 0x68, 0x21, 0x9f, 0x88,
+++	0x3f, 0x1f, 0x42, 0x77, 0xce, 0xd0, 0x61, 0xd4,
+++	0x20, 0xa7, 0xff, 0x53, 0xad, 0x37, 0xd0, 0x17,
+++	0x35, 0xc9, 0xfc, 0xba, 0x0a, 0x78, 0x3f, 0xf2,
+++	0xcc, 0x86, 0x89, 0xe8, 0x4b, 0x3c, 0x48, 0x33,
+++	0x09, 0x7f, 0xc6, 0xc0, 0xdd, 0xb8, 0xfd, 0x7a,
+++	0x66, 0x66, 0x65, 0xeb, 0x47, 0xa7, 0x04, 0x28,
+++	0xa3, 0x19, 0x8e, 0xa9, 0xb1, 0x13, 0x67, 0x62,
+++	0x70, 0xcf, 0xd7
+++};
+++static const u8 dec_output013[] __initconst = {
+++	0x74, 0xa6, 0x3e, 0xe4, 0xb1, 0xcb, 0xaf, 0xb0,
+++	0x40, 0xe5, 0x0f, 0x9e, 0xf1, 0xf2, 0x89, 0xb5,
+++	0x42, 0x34, 0x8a, 0xa1, 0x03, 0xb7, 0xe9, 0x57,
+++	0x46, 0xbe, 0x20, 0xe4, 0x6e, 0xb0, 0xeb, 0xff,
+++	0xea, 0x07, 0x7e, 0xef, 0xe2, 0x55, 0x9f, 0xe5,
+++	0x78, 0x3a, 0xb7, 0x83, 0xc2, 0x18, 0x40, 0x7b,
+++	0xeb, 0xcd, 0x81, 0xfb, 0x90, 0x12, 0x9e, 0x46,
+++	0xa9, 0xd6, 0x4a, 0xba, 0xb0, 0x62, 0xdb, 0x6b,
+++	0x99, 0xc4, 0xdb, 0x54, 0x4b, 0xb8, 0xa5, 0x71,
+++	0xcb, 0xcd, 0x63, 0x32, 0x55, 0xfb, 0x31, 0xf0,
+++	0x38, 0xf5, 0xbe, 0x78, 0xe4, 0x45, 0xce, 0x1b,
+++	0x6a, 0x5b, 0x0e, 0xf4, 0x16, 0xe4, 0xb1, 0x3d,
+++	0xf6, 0x63, 0x7b, 0xa7, 0x0c, 0xde, 0x6f, 0x8f,
+++	0x74, 0xdf, 0xe0, 0x1e, 0x9d, 0xce, 0x8f, 0x24,
+++	0xef, 0x23, 0x35, 0x33, 0x7b, 0x83, 0x34, 0x23,
+++	0x58, 0x74, 0x14, 0x77, 0x1f, 0xc2, 0x4f, 0x4e,
+++	0xc6, 0x89, 0xf9, 0x52, 0x09, 0x37, 0x64, 0x14,
+++	0xc4, 0x01, 0x6b, 0x9d, 0x77, 0xe8, 0x90, 0x5d,
+++	0xa8, 0x4a, 0x2a, 0xef, 0x5c, 0x7f, 0xeb, 0xbb,
+++	0xb2, 0xc6, 0x93, 0x99, 0x66, 0xdc, 0x7f, 0xd4,
+++	0x9e, 0x2a, 0xca, 0x8d, 0xdb, 0xe7, 0x20, 0xcf,
+++	0xe4, 0x73, 0xae, 0x49, 0x7d, 0x64, 0x0f, 0x0e,
+++	0x28, 0x46, 0xa9, 0xa8, 0x32, 0xe4, 0x0e, 0xf6,
+++	0x51, 0x53, 0xb8, 0x3c, 0xb1, 0xff, 0xa3, 0x33,
+++	0x41, 0x75, 0xff, 0xf1, 0x6f, 0xf1, 0xfb, 0xbb,
+++	0x83, 0x7f, 0x06, 0x9b, 0xe7, 0x1b, 0x0a, 0xe0,
+++	0x5c, 0x33, 0x60, 0x5b, 0xdb, 0x5b, 0xed, 0xfe,
+++	0xa5, 0x16, 0x19, 0x72, 0xa3, 0x64, 0x23, 0x00,
+++	0x02, 0xc7, 0xf3, 0x6a, 0x81, 0x3e, 0x44, 0x1d,
+++	0x79, 0x15, 0x5f, 0x9a, 0xde, 0xe2, 0xfd, 0x1b,
+++	0x73, 0xc1, 0xbc, 0x23, 0xba, 0x31, 0xd2, 0x50,
+++	0xd5, 0xad, 0x7f, 0x74, 0xa7, 0xc9, 0xf8, 0x3e,
+++	0x2b, 0x26, 0x10, 0xf6, 0x03, 0x36, 0x74, 0xe4,
+++	0x0e, 0x6a, 0x72, 0xb7, 0x73, 0x0a, 0x42, 0x28,
+++	0xc2, 0xad, 0x5e, 0x03, 0xbe, 0xb8, 0x0b, 0xa8,
+++	0x5b, 0xd4, 0xb8, 0xba, 0x52, 0x89, 0xb1, 0x9b,
+++	0xc1, 0xc3, 0x65, 0x87, 0xed, 0xa5, 0xf4, 0x86,
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+++	0x01, 0xda, 0x9c, 0xb9, 0x7e, 0x3f, 0x6a, 0xc4,
+++	0x7b, 0xea, 0xd4, 0x3c, 0xb9, 0xfb, 0x5c, 0x6b,
+++	0x64, 0x33, 0x52, 0xba, 0x64, 0x78, 0x8f, 0xa4,
+++	0xaf, 0x7a, 0x61, 0x8d, 0xbc, 0xc5, 0x73, 0xe9,
+++	0x6b, 0x58, 0x97, 0x4b, 0xbf, 0x63, 0x22, 0xd3,
+++	0x37, 0x02, 0x54, 0xc5, 0xb9, 0x16, 0x4a, 0xf0,
+++	0x19, 0xd8, 0x94, 0x57, 0xb8, 0x8a, 0xb3, 0x16,
+++	0x3b, 0xd0, 0x84, 0x8e, 0x67, 0xa6, 0xa3, 0x7d,
+++	0x78, 0xec, 0x00
+++};
+++static const u8 dec_assoc013[] __initconst = {
+++	0xb1, 0x69, 0x83, 0x87, 0x30, 0xaa, 0x5d, 0xb8,
+++	0x77, 0xe8, 0x21, 0xff, 0x06, 0x59, 0x35, 0xce,
+++	0x75, 0xfe, 0x38, 0xef, 0xb8, 0x91, 0x43, 0x8c,
+++	0xcf, 0x70, 0xdd, 0x0a, 0x68, 0xbf, 0xd4, 0xbc,
+++	0x16, 0x76, 0x99, 0x36, 0x1e, 0x58, 0x79, 0x5e,
+++	0xd4, 0x29, 0xf7, 0x33, 0x93, 0x48, 0xdb, 0x5f,
+++	0x01, 0xae, 0x9c, 0xb6, 0xe4, 0x88, 0x6d, 0x2b,
+++	0x76, 0x75, 0xe0, 0xf3, 0x74, 0xe2, 0xc9
+++};
+++static const u8 dec_nonce013[] __initconst = {
+++	0x05, 0xa3, 0x93, 0xed, 0x30, 0xc5, 0xa2, 0x06
+++};
+++static const u8 dec_key013[] __initconst = {
+++	0xb3, 0x35, 0x50, 0x03, 0x54, 0x2e, 0x40, 0x5e,
+++	0x8f, 0x59, 0x8e, 0xc5, 0x90, 0xd5, 0x27, 0x2d,
+++	0xba, 0x29, 0x2e, 0xcb, 0x1b, 0x70, 0x44, 0x1e,
+++	0x65, 0x91, 0x6e, 0x2a, 0x79, 0x22, 0xda, 0x64
+++};
+++
+++static const struct chacha20poly1305_testvec
+++chacha20poly1305_dec_vectors[] __initconst = {
+++	{ dec_input001, dec_output001, dec_assoc001, dec_nonce001, dec_key001,
+++	  sizeof(dec_input001), sizeof(dec_assoc001), sizeof(dec_nonce001) },
+++	{ dec_input002, dec_output002, dec_assoc002, dec_nonce002, dec_key002,
+++	  sizeof(dec_input002), sizeof(dec_assoc002), sizeof(dec_nonce002) },
+++	{ dec_input003, dec_output003, dec_assoc003, dec_nonce003, dec_key003,
+++	  sizeof(dec_input003), sizeof(dec_assoc003), sizeof(dec_nonce003) },
+++	{ dec_input004, dec_output004, dec_assoc004, dec_nonce004, dec_key004,
+++	  sizeof(dec_input004), sizeof(dec_assoc004), sizeof(dec_nonce004) },
+++	{ dec_input005, dec_output005, dec_assoc005, dec_nonce005, dec_key005,
+++	  sizeof(dec_input005), sizeof(dec_assoc005), sizeof(dec_nonce005) },
+++	{ dec_input006, dec_output006, dec_assoc006, dec_nonce006, dec_key006,
+++	  sizeof(dec_input006), sizeof(dec_assoc006), sizeof(dec_nonce006) },
+++	{ dec_input007, dec_output007, dec_assoc007, dec_nonce007, dec_key007,
+++	  sizeof(dec_input007), sizeof(dec_assoc007), sizeof(dec_nonce007) },
+++	{ dec_input008, dec_output008, dec_assoc008, dec_nonce008, dec_key008,
+++	  sizeof(dec_input008), sizeof(dec_assoc008), sizeof(dec_nonce008) },
+++	{ dec_input009, dec_output009, dec_assoc009, dec_nonce009, dec_key009,
+++	  sizeof(dec_input009), sizeof(dec_assoc009), sizeof(dec_nonce009) },
+++	{ dec_input010, dec_output010, dec_assoc010, dec_nonce010, dec_key010,
+++	  sizeof(dec_input010), sizeof(dec_assoc010), sizeof(dec_nonce010) },
+++	{ dec_input011, dec_output011, dec_assoc011, dec_nonce011, dec_key011,
+++	  sizeof(dec_input011), sizeof(dec_assoc011), sizeof(dec_nonce011) },
+++	{ dec_input012, dec_output012, dec_assoc012, dec_nonce012, dec_key012,
+++	  sizeof(dec_input012), sizeof(dec_assoc012), sizeof(dec_nonce012) },
+++	{ dec_input013, dec_output013, dec_assoc013, dec_nonce013, dec_key013,
+++	  sizeof(dec_input013), sizeof(dec_assoc013), sizeof(dec_nonce013),
+++	  true }
+++};
+++
+++static const u8 xenc_input001[] __initconst = {
+++	0x49, 0x6e, 0x74, 0x65, 0x72, 0x6e, 0x65, 0x74,
+++	0x2d, 0x44, 0x72, 0x61, 0x66, 0x74, 0x73, 0x20,
+++	0x61, 0x72, 0x65, 0x20, 0x64, 0x72, 0x61, 0x66,
+++	0x74, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65,
+++	0x6e, 0x74, 0x73, 0x20, 0x76, 0x61, 0x6c, 0x69,
+++	0x64, 0x20, 0x66, 0x6f, 0x72, 0x20, 0x61, 0x20,
+++	0x6d, 0x61, 0x78, 0x69, 0x6d, 0x75, 0x6d, 0x20,
+++	0x6f, 0x66, 0x20, 0x73, 0x69, 0x78, 0x20, 0x6d,
+++	0x6f, 0x6e, 0x74, 0x68, 0x73, 0x20, 0x61, 0x6e,
+++	0x64, 0x20, 0x6d, 0x61, 0x79, 0x20, 0x62, 0x65,
+++	0x20, 0x75, 0x70, 0x64, 0x61, 0x74, 0x65, 0x64,
+++	0x2c, 0x20, 0x72, 0x65, 0x70, 0x6c, 0x61, 0x63,
+++	0x65, 0x64, 0x2c, 0x20, 0x6f, 0x72, 0x20, 0x6f,
+++	0x62, 0x73, 0x6f, 0x6c, 0x65, 0x74, 0x65, 0x64,
+++	0x20, 0x62, 0x79, 0x20, 0x6f, 0x74, 0x68, 0x65,
+++	0x72, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65,
+++	0x6e, 0x74, 0x73, 0x20, 0x61, 0x74, 0x20, 0x61,
+++	0x6e, 0x79, 0x20, 0x74, 0x69, 0x6d, 0x65, 0x2e,
+++	0x20, 0x49, 0x74, 0x20, 0x69, 0x73, 0x20, 0x69,
+++	0x6e, 0x61, 0x70, 0x70, 0x72, 0x6f, 0x70, 0x72,
+++	0x69, 0x61, 0x74, 0x65, 0x20, 0x74, 0x6f, 0x20,
+++	0x75, 0x73, 0x65, 0x20, 0x49, 0x6e, 0x74, 0x65,
+++	0x72, 0x6e, 0x65, 0x74, 0x2d, 0x44, 0x72, 0x61,
+++	0x66, 0x74, 0x73, 0x20, 0x61, 0x73, 0x20, 0x72,
+++	0x65, 0x66, 0x65, 0x72, 0x65, 0x6e, 0x63, 0x65,
+++	0x20, 0x6d, 0x61, 0x74, 0x65, 0x72, 0x69, 0x61,
+++	0x6c, 0x20, 0x6f, 0x72, 0x20, 0x74, 0x6f, 0x20,
+++	0x63, 0x69, 0x74, 0x65, 0x20, 0x74, 0x68, 0x65,
+++	0x6d, 0x20, 0x6f, 0x74, 0x68, 0x65, 0x72, 0x20,
+++	0x74, 0x68, 0x61, 0x6e, 0x20, 0x61, 0x73, 0x20,
+++	0x2f, 0xe2, 0x80, 0x9c, 0x77, 0x6f, 0x72, 0x6b,
+++	0x20, 0x69, 0x6e, 0x20, 0x70, 0x72, 0x6f, 0x67,
+++	0x72, 0x65, 0x73, 0x73, 0x2e, 0x2f, 0xe2, 0x80,
+++	0x9d
+++};
+++static const u8 xenc_output001[] __initconst = {
+++	0x1a, 0x6e, 0x3a, 0xd9, 0xfd, 0x41, 0x3f, 0x77,
+++	0x54, 0x72, 0x0a, 0x70, 0x9a, 0xa0, 0x29, 0x92,
+++	0x2e, 0xed, 0x93, 0xcf, 0x0f, 0x71, 0x88, 0x18,
+++	0x7a, 0x9d, 0x2d, 0x24, 0xe0, 0xf5, 0xea, 0x3d,
+++	0x55, 0x64, 0xd7, 0xad, 0x2a, 0x1a, 0x1f, 0x7e,
+++	0x86, 0x6d, 0xb0, 0xce, 0x80, 0x41, 0x72, 0x86,
+++	0x26, 0xee, 0x84, 0xd7, 0xef, 0x82, 0x9e, 0xe2,
+++	0x60, 0x9d, 0x5a, 0xfc, 0xf0, 0xe4, 0x19, 0x85,
+++	0xea, 0x09, 0xc6, 0xfb, 0xb3, 0xa9, 0x50, 0x09,
+++	0xec, 0x5e, 0x11, 0x90, 0xa1, 0xc5, 0x4e, 0x49,
+++	0xef, 0x50, 0xd8, 0x8f, 0xe0, 0x78, 0xd7, 0xfd,
+++	0xb9, 0x3b, 0xc9, 0xf2, 0x91, 0xc8, 0x25, 0xc8,
+++	0xa7, 0x63, 0x60, 0xce, 0x10, 0xcd, 0xc6, 0x7f,
+++	0xf8, 0x16, 0xf8, 0xe1, 0x0a, 0xd9, 0xde, 0x79,
+++	0x50, 0x33, 0xf2, 0x16, 0x0f, 0x17, 0xba, 0xb8,
+++	0x5d, 0xd8, 0xdf, 0x4e, 0x51, 0xa8, 0x39, 0xd0,
+++	0x85, 0xca, 0x46, 0x6a, 0x10, 0xa7, 0xa3, 0x88,
+++	0xef, 0x79, 0xb9, 0xf8, 0x24, 0xf3, 0xe0, 0x71,
+++	0x7b, 0x76, 0x28, 0x46, 0x3a, 0x3a, 0x1b, 0x91,
+++	0xb6, 0xd4, 0x3e, 0x23, 0xe5, 0x44, 0x15, 0xbf,
+++	0x60, 0x43, 0x9d, 0xa4, 0xbb, 0xd5, 0x5f, 0x89,
+++	0xeb, 0xef, 0x8e, 0xfd, 0xdd, 0xb4, 0x0d, 0x46,
+++	0xf0, 0x69, 0x23, 0x63, 0xae, 0x94, 0xf5, 0x5e,
+++	0xa5, 0xad, 0x13, 0x1c, 0x41, 0x76, 0xe6, 0x90,
+++	0xd6, 0x6d, 0xa2, 0x8f, 0x97, 0x4c, 0xa8, 0x0b,
+++	0xcf, 0x8d, 0x43, 0x2b, 0x9c, 0x9b, 0xc5, 0x58,
+++	0xa5, 0xb6, 0x95, 0x9a, 0xbf, 0x81, 0xc6, 0x54,
+++	0xc9, 0x66, 0x0c, 0xe5, 0x4f, 0x6a, 0x53, 0xa1,
+++	0xe5, 0x0c, 0xba, 0x31, 0xde, 0x34, 0x64, 0x73,
+++	0x8a, 0x3b, 0xbd, 0x92, 0x01, 0xdb, 0x71, 0x69,
+++	0xf3, 0x58, 0x99, 0xbc, 0xd1, 0xcb, 0x4a, 0x05,
+++	0xe2, 0x58, 0x9c, 0x25, 0x17, 0xcd, 0xdc, 0x83,
+++	0xb7, 0xff, 0xfb, 0x09, 0x61, 0xad, 0xbf, 0x13,
+++	0x5b, 0x5e, 0xed, 0x46, 0x82, 0x6f, 0x22, 0xd8,
+++	0x93, 0xa6, 0x85, 0x5b, 0x40, 0x39, 0x5c, 0xc5,
+++	0x9c
+++};
+++static const u8 xenc_assoc001[] __initconst = {
+++	0xf3, 0x33, 0x88, 0x86, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x4e, 0x91
+++};
+++static const u8 xenc_nonce001[] __initconst = {
+++	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+++	0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+++	0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17
+++};
+++static const u8 xenc_key001[] __initconst = {
+++	0x1c, 0x92, 0x40, 0xa5, 0xeb, 0x55, 0xd3, 0x8a,
+++	0xf3, 0x33, 0x88, 0x86, 0x04, 0xf6, 0xb5, 0xf0,
+++	0x47, 0x39, 0x17, 0xc1, 0x40, 0x2b, 0x80, 0x09,
+++	0x9d, 0xca, 0x5c, 0xbc, 0x20, 0x70, 0x75, 0xc0
+++};
+++
+++static const struct chacha20poly1305_testvec
+++xchacha20poly1305_enc_vectors[] __initconst = {
+++	{ xenc_input001, xenc_output001, xenc_assoc001, xenc_nonce001, xenc_key001,
+++	  sizeof(xenc_input001), sizeof(xenc_assoc001), sizeof(xenc_nonce001) }
+++};
+++
+++static const u8 xdec_input001[] __initconst = {
+++	0x1a, 0x6e, 0x3a, 0xd9, 0xfd, 0x41, 0x3f, 0x77,
+++	0x54, 0x72, 0x0a, 0x70, 0x9a, 0xa0, 0x29, 0x92,
+++	0x2e, 0xed, 0x93, 0xcf, 0x0f, 0x71, 0x88, 0x18,
+++	0x7a, 0x9d, 0x2d, 0x24, 0xe0, 0xf5, 0xea, 0x3d,
+++	0x55, 0x64, 0xd7, 0xad, 0x2a, 0x1a, 0x1f, 0x7e,
+++	0x86, 0x6d, 0xb0, 0xce, 0x80, 0x41, 0x72, 0x86,
+++	0x26, 0xee, 0x84, 0xd7, 0xef, 0x82, 0x9e, 0xe2,
+++	0x60, 0x9d, 0x5a, 0xfc, 0xf0, 0xe4, 0x19, 0x85,
+++	0xea, 0x09, 0xc6, 0xfb, 0xb3, 0xa9, 0x50, 0x09,
+++	0xec, 0x5e, 0x11, 0x90, 0xa1, 0xc5, 0x4e, 0x49,
+++	0xef, 0x50, 0xd8, 0x8f, 0xe0, 0x78, 0xd7, 0xfd,
+++	0xb9, 0x3b, 0xc9, 0xf2, 0x91, 0xc8, 0x25, 0xc8,
+++	0xa7, 0x63, 0x60, 0xce, 0x10, 0xcd, 0xc6, 0x7f,
+++	0xf8, 0x16, 0xf8, 0xe1, 0x0a, 0xd9, 0xde, 0x79,
+++	0x50, 0x33, 0xf2, 0x16, 0x0f, 0x17, 0xba, 0xb8,
+++	0x5d, 0xd8, 0xdf, 0x4e, 0x51, 0xa8, 0x39, 0xd0,
+++	0x85, 0xca, 0x46, 0x6a, 0x10, 0xa7, 0xa3, 0x88,
+++	0xef, 0x79, 0xb9, 0xf8, 0x24, 0xf3, 0xe0, 0x71,
+++	0x7b, 0x76, 0x28, 0x46, 0x3a, 0x3a, 0x1b, 0x91,
+++	0xb6, 0xd4, 0x3e, 0x23, 0xe5, 0x44, 0x15, 0xbf,
+++	0x60, 0x43, 0x9d, 0xa4, 0xbb, 0xd5, 0x5f, 0x89,
+++	0xeb, 0xef, 0x8e, 0xfd, 0xdd, 0xb4, 0x0d, 0x46,
+++	0xf0, 0x69, 0x23, 0x63, 0xae, 0x94, 0xf5, 0x5e,
+++	0xa5, 0xad, 0x13, 0x1c, 0x41, 0x76, 0xe6, 0x90,
+++	0xd6, 0x6d, 0xa2, 0x8f, 0x97, 0x4c, 0xa8, 0x0b,
+++	0xcf, 0x8d, 0x43, 0x2b, 0x9c, 0x9b, 0xc5, 0x58,
+++	0xa5, 0xb6, 0x95, 0x9a, 0xbf, 0x81, 0xc6, 0x54,
+++	0xc9, 0x66, 0x0c, 0xe5, 0x4f, 0x6a, 0x53, 0xa1,
+++	0xe5, 0x0c, 0xba, 0x31, 0xde, 0x34, 0x64, 0x73,
+++	0x8a, 0x3b, 0xbd, 0x92, 0x01, 0xdb, 0x71, 0x69,
+++	0xf3, 0x58, 0x99, 0xbc, 0xd1, 0xcb, 0x4a, 0x05,
+++	0xe2, 0x58, 0x9c, 0x25, 0x17, 0xcd, 0xdc, 0x83,
+++	0xb7, 0xff, 0xfb, 0x09, 0x61, 0xad, 0xbf, 0x13,
+++	0x5b, 0x5e, 0xed, 0x46, 0x82, 0x6f, 0x22, 0xd8,
+++	0x93, 0xa6, 0x85, 0x5b, 0x40, 0x39, 0x5c, 0xc5,
+++	0x9c
+++};
+++static const u8 xdec_output001[] __initconst = {
+++	0x49, 0x6e, 0x74, 0x65, 0x72, 0x6e, 0x65, 0x74,
+++	0x2d, 0x44, 0x72, 0x61, 0x66, 0x74, 0x73, 0x20,
+++	0x61, 0x72, 0x65, 0x20, 0x64, 0x72, 0x61, 0x66,
+++	0x74, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65,
+++	0x6e, 0x74, 0x73, 0x20, 0x76, 0x61, 0x6c, 0x69,
+++	0x64, 0x20, 0x66, 0x6f, 0x72, 0x20, 0x61, 0x20,
+++	0x6d, 0x61, 0x78, 0x69, 0x6d, 0x75, 0x6d, 0x20,
+++	0x6f, 0x66, 0x20, 0x73, 0x69, 0x78, 0x20, 0x6d,
+++	0x6f, 0x6e, 0x74, 0x68, 0x73, 0x20, 0x61, 0x6e,
+++	0x64, 0x20, 0x6d, 0x61, 0x79, 0x20, 0x62, 0x65,
+++	0x20, 0x75, 0x70, 0x64, 0x61, 0x74, 0x65, 0x64,
+++	0x2c, 0x20, 0x72, 0x65, 0x70, 0x6c, 0x61, 0x63,
+++	0x65, 0x64, 0x2c, 0x20, 0x6f, 0x72, 0x20, 0x6f,
+++	0x62, 0x73, 0x6f, 0x6c, 0x65, 0x74, 0x65, 0x64,
+++	0x20, 0x62, 0x79, 0x20, 0x6f, 0x74, 0x68, 0x65,
+++	0x72, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65,
+++	0x6e, 0x74, 0x73, 0x20, 0x61, 0x74, 0x20, 0x61,
+++	0x6e, 0x79, 0x20, 0x74, 0x69, 0x6d, 0x65, 0x2e,
+++	0x20, 0x49, 0x74, 0x20, 0x69, 0x73, 0x20, 0x69,
+++	0x6e, 0x61, 0x70, 0x70, 0x72, 0x6f, 0x70, 0x72,
+++	0x69, 0x61, 0x74, 0x65, 0x20, 0x74, 0x6f, 0x20,
+++	0x75, 0x73, 0x65, 0x20, 0x49, 0x6e, 0x74, 0x65,
+++	0x72, 0x6e, 0x65, 0x74, 0x2d, 0x44, 0x72, 0x61,
+++	0x66, 0x74, 0x73, 0x20, 0x61, 0x73, 0x20, 0x72,
+++	0x65, 0x66, 0x65, 0x72, 0x65, 0x6e, 0x63, 0x65,
+++	0x20, 0x6d, 0x61, 0x74, 0x65, 0x72, 0x69, 0x61,
+++	0x6c, 0x20, 0x6f, 0x72, 0x20, 0x74, 0x6f, 0x20,
+++	0x63, 0x69, 0x74, 0x65, 0x20, 0x74, 0x68, 0x65,
+++	0x6d, 0x20, 0x6f, 0x74, 0x68, 0x65, 0x72, 0x20,
+++	0x74, 0x68, 0x61, 0x6e, 0x20, 0x61, 0x73, 0x20,
+++	0x2f, 0xe2, 0x80, 0x9c, 0x77, 0x6f, 0x72, 0x6b,
+++	0x20, 0x69, 0x6e, 0x20, 0x70, 0x72, 0x6f, 0x67,
+++	0x72, 0x65, 0x73, 0x73, 0x2e, 0x2f, 0xe2, 0x80,
+++	0x9d
+++};
+++static const u8 xdec_assoc001[] __initconst = {
+++	0xf3, 0x33, 0x88, 0x86, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x4e, 0x91
+++};
+++static const u8 xdec_nonce001[] __initconst = {
+++	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+++	0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+++	0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17
+++};
+++static const u8 xdec_key001[] __initconst = {
+++	0x1c, 0x92, 0x40, 0xa5, 0xeb, 0x55, 0xd3, 0x8a,
+++	0xf3, 0x33, 0x88, 0x86, 0x04, 0xf6, 0xb5, 0xf0,
+++	0x47, 0x39, 0x17, 0xc1, 0x40, 0x2b, 0x80, 0x09,
+++	0x9d, 0xca, 0x5c, 0xbc, 0x20, 0x70, 0x75, 0xc0
+++};
+++
+++static const struct chacha20poly1305_testvec
+++xchacha20poly1305_dec_vectors[] __initconst = {
+++	{ xdec_input001, xdec_output001, xdec_assoc001, xdec_nonce001, xdec_key001,
+++	  sizeof(xdec_input001), sizeof(xdec_assoc001), sizeof(xdec_nonce001) }
+++};
+++
+++static void __init
+++chacha20poly1305_selftest_encrypt(u8 *dst, const u8 *src, const size_t src_len,
+++				  const u8 *ad, const size_t ad_len,
+++				  const u8 *nonce, const size_t nonce_len,
+++				  const u8 key[CHACHA20POLY1305_KEY_SIZE])
+++{
+++	if (nonce_len == 8)
+++		chacha20poly1305_encrypt(dst, src, src_len, ad, ad_len,
+++					 get_unaligned_le64(nonce), key);
+++	else
+++		BUG();
+++}
+++
+++static bool __init
+++decryption_success(bool func_ret, bool expect_failure, int memcmp_result)
+++{
+++	if (expect_failure)
+++		return !func_ret;
+++	return func_ret && !memcmp_result;
+++}
+++
+++bool __init chacha20poly1305_selftest(void)
+++{
+++	enum { MAXIMUM_TEST_BUFFER_LEN = 1UL << 12 };
+++	size_t i;
+++	u8 *computed_output = NULL, *heap_src = NULL;
+++	bool success = true, ret;
+++
+++	heap_src = kmalloc(MAXIMUM_TEST_BUFFER_LEN, GFP_KERNEL);
+++	computed_output = kmalloc(MAXIMUM_TEST_BUFFER_LEN, GFP_KERNEL);
+++	if (!heap_src || !computed_output) {
+++		pr_err("chacha20poly1305 self-test malloc: FAIL\n");
+++		success = false;
+++		goto out;
+++	}
+++
+++	for (i = 0; i < ARRAY_SIZE(chacha20poly1305_enc_vectors); ++i) {
+++		memset(computed_output, 0, MAXIMUM_TEST_BUFFER_LEN);
+++		chacha20poly1305_selftest_encrypt(computed_output,
+++					chacha20poly1305_enc_vectors[i].input,
+++					chacha20poly1305_enc_vectors[i].ilen,
+++					chacha20poly1305_enc_vectors[i].assoc,
+++					chacha20poly1305_enc_vectors[i].alen,
+++					chacha20poly1305_enc_vectors[i].nonce,
+++					chacha20poly1305_enc_vectors[i].nlen,
+++					chacha20poly1305_enc_vectors[i].key);
+++		if (memcmp(computed_output,
+++			   chacha20poly1305_enc_vectors[i].output,
+++			   chacha20poly1305_enc_vectors[i].ilen +
+++							POLY1305_DIGEST_SIZE)) {
+++			pr_err("chacha20poly1305 encryption self-test %zu: FAIL\n",
+++			       i + 1);
+++			success = false;
+++		}
+++	}
+++
+++	for (i = 0; i < ARRAY_SIZE(chacha20poly1305_dec_vectors); ++i) {
+++		memset(computed_output, 0, MAXIMUM_TEST_BUFFER_LEN);
+++		ret = chacha20poly1305_decrypt(computed_output,
+++			chacha20poly1305_dec_vectors[i].input,
+++			chacha20poly1305_dec_vectors[i].ilen,
+++			chacha20poly1305_dec_vectors[i].assoc,
+++			chacha20poly1305_dec_vectors[i].alen,
+++			get_unaligned_le64(chacha20poly1305_dec_vectors[i].nonce),
+++			chacha20poly1305_dec_vectors[i].key);
+++		if (!decryption_success(ret,
+++				chacha20poly1305_dec_vectors[i].failure,
+++				memcmp(computed_output,
+++				       chacha20poly1305_dec_vectors[i].output,
+++				       chacha20poly1305_dec_vectors[i].ilen -
+++							POLY1305_DIGEST_SIZE))) {
+++			pr_err("chacha20poly1305 decryption self-test %zu: FAIL\n",
+++			       i + 1);
+++			success = false;
+++		}
+++	}
+++
+++
+++	for (i = 0; i < ARRAY_SIZE(xchacha20poly1305_enc_vectors); ++i) {
+++		memset(computed_output, 0, MAXIMUM_TEST_BUFFER_LEN);
+++		xchacha20poly1305_encrypt(computed_output,
+++					xchacha20poly1305_enc_vectors[i].input,
+++					xchacha20poly1305_enc_vectors[i].ilen,
+++					xchacha20poly1305_enc_vectors[i].assoc,
+++					xchacha20poly1305_enc_vectors[i].alen,
+++					xchacha20poly1305_enc_vectors[i].nonce,
+++					xchacha20poly1305_enc_vectors[i].key);
+++		if (memcmp(computed_output,
+++			   xchacha20poly1305_enc_vectors[i].output,
+++			   xchacha20poly1305_enc_vectors[i].ilen +
+++							POLY1305_DIGEST_SIZE)) {
+++			pr_err("xchacha20poly1305 encryption self-test %zu: FAIL\n",
+++			       i + 1);
+++			success = false;
+++		}
+++	}
+++	for (i = 0; i < ARRAY_SIZE(xchacha20poly1305_dec_vectors); ++i) {
+++		memset(computed_output, 0, MAXIMUM_TEST_BUFFER_LEN);
+++		ret = xchacha20poly1305_decrypt(computed_output,
+++					xchacha20poly1305_dec_vectors[i].input,
+++					xchacha20poly1305_dec_vectors[i].ilen,
+++					xchacha20poly1305_dec_vectors[i].assoc,
+++					xchacha20poly1305_dec_vectors[i].alen,
+++					xchacha20poly1305_dec_vectors[i].nonce,
+++					xchacha20poly1305_dec_vectors[i].key);
+++		if (!decryption_success(ret,
+++				xchacha20poly1305_dec_vectors[i].failure,
+++				memcmp(computed_output,
+++				       xchacha20poly1305_dec_vectors[i].output,
+++				       xchacha20poly1305_dec_vectors[i].ilen -
+++							POLY1305_DIGEST_SIZE))) {
+++			pr_err("xchacha20poly1305 decryption self-test %zu: FAIL\n",
+++			       i + 1);
+++			success = false;
+++		}
+++	}
+++
+++out:
+++	kfree(heap_src);
+++	kfree(computed_output);
+++	return success;
+++}
++--- /dev/null
+++++ b/lib/crypto/chacha20poly1305.c
++@@ -0,0 +1,219 @@
+++// SPDX-License-Identifier: GPL-2.0 OR MIT
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ *
+++ * This is an implementation of the ChaCha20Poly1305 AEAD construction.
+++ *
+++ * Information: https://tools.ietf.org/html/rfc8439
+++ */
+++
+++#include <crypto/algapi.h>
+++#include <crypto/chacha20poly1305.h>
+++#include <crypto/chacha.h>
+++#include <crypto/poly1305.h>
+++
+++#include <asm/unaligned.h>
+++#include <linux/kernel.h>
+++#include <linux/init.h>
+++#include <linux/mm.h>
+++#include <linux/module.h>
+++
+++#define CHACHA_KEY_WORDS	(CHACHA_KEY_SIZE / sizeof(u32))
+++
+++bool __init chacha20poly1305_selftest(void);
+++
+++static void chacha_load_key(u32 *k, const u8 *in)
+++{
+++	k[0] = get_unaligned_le32(in);
+++	k[1] = get_unaligned_le32(in + 4);
+++	k[2] = get_unaligned_le32(in + 8);
+++	k[3] = get_unaligned_le32(in + 12);
+++	k[4] = get_unaligned_le32(in + 16);
+++	k[5] = get_unaligned_le32(in + 20);
+++	k[6] = get_unaligned_le32(in + 24);
+++	k[7] = get_unaligned_le32(in + 28);
+++}
+++
+++static void xchacha_init(u32 *chacha_state, const u8 *key, const u8 *nonce)
+++{
+++	u32 k[CHACHA_KEY_WORDS];
+++	u8 iv[CHACHA_IV_SIZE];
+++
+++	memset(iv, 0, 8);
+++	memcpy(iv + 8, nonce + 16, 8);
+++
+++	chacha_load_key(k, key);
+++
+++	/* Compute the subkey given the original key and first 128 nonce bits */
+++	chacha_init(chacha_state, k, nonce);
+++	hchacha_block(chacha_state, k, 20);
+++
+++	chacha_init(chacha_state, k, iv);
+++
+++	memzero_explicit(k, sizeof(k));
+++	memzero_explicit(iv, sizeof(iv));
+++}
+++
+++static void
+++__chacha20poly1305_encrypt(u8 *dst, const u8 *src, const size_t src_len,
+++			   const u8 *ad, const size_t ad_len, u32 *chacha_state)
+++{
+++	const u8 *pad0 = page_address(ZERO_PAGE(0));
+++	struct poly1305_desc_ctx poly1305_state;
+++	union {
+++		u8 block0[POLY1305_KEY_SIZE];
+++		__le64 lens[2];
+++	} b;
+++
+++	chacha_crypt(chacha_state, b.block0, pad0, sizeof(b.block0), 20);
+++	poly1305_init(&poly1305_state, b.block0);
+++
+++	poly1305_update(&poly1305_state, ad, ad_len);
+++	if (ad_len & 0xf)
+++		poly1305_update(&poly1305_state, pad0, 0x10 - (ad_len & 0xf));
+++
+++	chacha_crypt(chacha_state, dst, src, src_len, 20);
+++
+++	poly1305_update(&poly1305_state, dst, src_len);
+++	if (src_len & 0xf)
+++		poly1305_update(&poly1305_state, pad0, 0x10 - (src_len & 0xf));
+++
+++	b.lens[0] = cpu_to_le64(ad_len);
+++	b.lens[1] = cpu_to_le64(src_len);
+++	poly1305_update(&poly1305_state, (u8 *)b.lens, sizeof(b.lens));
+++
+++	poly1305_final(&poly1305_state, dst + src_len);
+++
+++	memzero_explicit(chacha_state, CHACHA_STATE_WORDS * sizeof(u32));
+++	memzero_explicit(&b, sizeof(b));
+++}
+++
+++void chacha20poly1305_encrypt(u8 *dst, const u8 *src, const size_t src_len,
+++			      const u8 *ad, const size_t ad_len,
+++			      const u64 nonce,
+++			      const u8 key[CHACHA20POLY1305_KEY_SIZE])
+++{
+++	u32 chacha_state[CHACHA_STATE_WORDS];
+++	u32 k[CHACHA_KEY_WORDS];
+++	__le64 iv[2];
+++
+++	chacha_load_key(k, key);
+++
+++	iv[0] = 0;
+++	iv[1] = cpu_to_le64(nonce);
+++
+++	chacha_init(chacha_state, k, (u8 *)iv);
+++	__chacha20poly1305_encrypt(dst, src, src_len, ad, ad_len, chacha_state);
+++
+++	memzero_explicit(iv, sizeof(iv));
+++	memzero_explicit(k, sizeof(k));
+++}
+++EXPORT_SYMBOL(chacha20poly1305_encrypt);
+++
+++void xchacha20poly1305_encrypt(u8 *dst, const u8 *src, const size_t src_len,
+++			       const u8 *ad, const size_t ad_len,
+++			       const u8 nonce[XCHACHA20POLY1305_NONCE_SIZE],
+++			       const u8 key[CHACHA20POLY1305_KEY_SIZE])
+++{
+++	u32 chacha_state[CHACHA_STATE_WORDS];
+++
+++	xchacha_init(chacha_state, key, nonce);
+++	__chacha20poly1305_encrypt(dst, src, src_len, ad, ad_len, chacha_state);
+++}
+++EXPORT_SYMBOL(xchacha20poly1305_encrypt);
+++
+++static bool
+++__chacha20poly1305_decrypt(u8 *dst, const u8 *src, const size_t src_len,
+++			   const u8 *ad, const size_t ad_len, u32 *chacha_state)
+++{
+++	const u8 *pad0 = page_address(ZERO_PAGE(0));
+++	struct poly1305_desc_ctx poly1305_state;
+++	size_t dst_len;
+++	int ret;
+++	union {
+++		u8 block0[POLY1305_KEY_SIZE];
+++		u8 mac[POLY1305_DIGEST_SIZE];
+++		__le64 lens[2];
+++	} b;
+++
+++	if (unlikely(src_len < POLY1305_DIGEST_SIZE))
+++		return false;
+++
+++	chacha_crypt(chacha_state, b.block0, pad0, sizeof(b.block0), 20);
+++	poly1305_init(&poly1305_state, b.block0);
+++
+++	poly1305_update(&poly1305_state, ad, ad_len);
+++	if (ad_len & 0xf)
+++		poly1305_update(&poly1305_state, pad0, 0x10 - (ad_len & 0xf));
+++
+++	dst_len = src_len - POLY1305_DIGEST_SIZE;
+++	poly1305_update(&poly1305_state, src, dst_len);
+++	if (dst_len & 0xf)
+++		poly1305_update(&poly1305_state, pad0, 0x10 - (dst_len & 0xf));
+++
+++	b.lens[0] = cpu_to_le64(ad_len);
+++	b.lens[1] = cpu_to_le64(dst_len);
+++	poly1305_update(&poly1305_state, (u8 *)b.lens, sizeof(b.lens));
+++
+++	poly1305_final(&poly1305_state, b.mac);
+++
+++	ret = crypto_memneq(b.mac, src + dst_len, POLY1305_DIGEST_SIZE);
+++	if (likely(!ret))
+++		chacha_crypt(chacha_state, dst, src, dst_len, 20);
+++
+++	memzero_explicit(&b, sizeof(b));
+++
+++	return !ret;
+++}
+++
+++bool chacha20poly1305_decrypt(u8 *dst, const u8 *src, const size_t src_len,
+++			      const u8 *ad, const size_t ad_len,
+++			      const u64 nonce,
+++			      const u8 key[CHACHA20POLY1305_KEY_SIZE])
+++{
+++	u32 chacha_state[CHACHA_STATE_WORDS];
+++	u32 k[CHACHA_KEY_WORDS];
+++	__le64 iv[2];
+++	bool ret;
+++
+++	chacha_load_key(k, key);
+++
+++	iv[0] = 0;
+++	iv[1] = cpu_to_le64(nonce);
+++
+++	chacha_init(chacha_state, k, (u8 *)iv);
+++	ret = __chacha20poly1305_decrypt(dst, src, src_len, ad, ad_len,
+++					 chacha_state);
+++
+++	memzero_explicit(chacha_state, sizeof(chacha_state));
+++	memzero_explicit(iv, sizeof(iv));
+++	memzero_explicit(k, sizeof(k));
+++	return ret;
+++}
+++EXPORT_SYMBOL(chacha20poly1305_decrypt);
+++
+++bool xchacha20poly1305_decrypt(u8 *dst, const u8 *src, const size_t src_len,
+++			       const u8 *ad, const size_t ad_len,
+++			       const u8 nonce[XCHACHA20POLY1305_NONCE_SIZE],
+++			       const u8 key[CHACHA20POLY1305_KEY_SIZE])
+++{
+++	u32 chacha_state[CHACHA_STATE_WORDS];
+++
+++	xchacha_init(chacha_state, key, nonce);
+++	return __chacha20poly1305_decrypt(dst, src, src_len, ad, ad_len,
+++					  chacha_state);
+++}
+++EXPORT_SYMBOL(xchacha20poly1305_decrypt);
+++
+++static int __init mod_init(void)
+++{
+++	if (!IS_ENABLED(CONFIG_CRYPTO_MANAGER_DISABLE_TESTS) &&
+++	    WARN_ON(!chacha20poly1305_selftest()))
+++		return -ENODEV;
+++	return 0;
+++}
+++
+++module_init(mod_init);
+++MODULE_LICENSE("GPL v2");
+++MODULE_DESCRIPTION("ChaCha20Poly1305 AEAD construction");
+++MODULE_AUTHOR("Jason A. Donenfeld <Jason@zx2c4.com>");
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0033-crypto-lib-chacha20poly1305-reimplement-crypt_from_s.patch b/target/linux/generic/backport-5.4/080-wireguard-0033-crypto-lib-chacha20poly1305-reimplement-crypt_from_s.patch
+new file mode 100644
+index 0000000000..e4b2b58b82
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0033-crypto-lib-chacha20poly1305-reimplement-crypt_from_s.patch
+@@ -0,0 +1,295 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 8 Nov 2019 13:22:40 +0100
++Subject: [PATCH] crypto: lib/chacha20poly1305 - reimplement crypt_from_sg()
++ routine
++
++commit d95312a3ccc0cd544d374be2fc45aeaa803e5fd9 upstream.
++
++Reimplement the library routines to perform chacha20poly1305 en/decryption
++on scatterlists, without [ab]using the [deprecated] blkcipher interface,
++which is rather heavyweight and does things we don't really need.
++
++Instead, we use the sg_miter API in a novel and clever way, to iterate
++over the scatterlist in-place (i.e., source == destination, which is the
++only way this library is expected to be used). That way, we don't have to
++iterate over two scatterlists in parallel.
++
++Another optimization is that, instead of relying on the blkcipher walker
++to present the input in suitable chunks, we recognize that ChaCha is a
++streamcipher, and so we can simply deal with partial blocks by keeping a
++block of cipherstream on the stack and use crypto_xor() to mix it with
++the in/output.
++
++Finally, we omit the scatterwalk_and_copy() call if the last element of
++the scatterlist covers the MAC as well (which is the common case),
++avoiding the need to walk the scatterlist and kmap() the page twice.
++
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ include/crypto/chacha20poly1305.h      |  11 ++
++ lib/crypto/chacha20poly1305-selftest.c |  45 ++++++++
++ lib/crypto/chacha20poly1305.c          | 150 +++++++++++++++++++++++++
++ 3 files changed, 206 insertions(+)
++
++--- a/include/crypto/chacha20poly1305.h
+++++ b/include/crypto/chacha20poly1305.h
++@@ -7,6 +7,7 @@
++ #define __CHACHA20POLY1305_H
++ 
++ #include <linux/types.h>
+++#include <linux/scatterlist.h>
++ 
++ enum chacha20poly1305_lengths {
++ 	XCHACHA20POLY1305_NONCE_SIZE = 24,
++@@ -34,4 +35,14 @@ bool __must_check xchacha20poly1305_decr
++ 	const size_t ad_len, const u8 nonce[XCHACHA20POLY1305_NONCE_SIZE],
++ 	const u8 key[CHACHA20POLY1305_KEY_SIZE]);
++ 
+++bool chacha20poly1305_encrypt_sg_inplace(struct scatterlist *src, size_t src_len,
+++					 const u8 *ad, const size_t ad_len,
+++					 const u64 nonce,
+++					 const u8 key[CHACHA20POLY1305_KEY_SIZE]);
+++
+++bool chacha20poly1305_decrypt_sg_inplace(struct scatterlist *src, size_t src_len,
+++					 const u8 *ad, const size_t ad_len,
+++					 const u64 nonce,
+++					 const u8 key[CHACHA20POLY1305_KEY_SIZE]);
+++
++ #endif /* __CHACHA20POLY1305_H */
++--- a/lib/crypto/chacha20poly1305-selftest.c
+++++ b/lib/crypto/chacha20poly1305-selftest.c
++@@ -7250,6 +7250,7 @@ bool __init chacha20poly1305_selftest(vo
++ 	enum { MAXIMUM_TEST_BUFFER_LEN = 1UL << 12 };
++ 	size_t i;
++ 	u8 *computed_output = NULL, *heap_src = NULL;
+++	struct scatterlist sg_src;
++ 	bool success = true, ret;
++ 
++ 	heap_src = kmalloc(MAXIMUM_TEST_BUFFER_LEN, GFP_KERNEL);
++@@ -7280,6 +7281,29 @@ bool __init chacha20poly1305_selftest(vo
++ 		}
++ 	}
++ 
+++	for (i = 0; i < ARRAY_SIZE(chacha20poly1305_enc_vectors); ++i) {
+++		if (chacha20poly1305_enc_vectors[i].nlen != 8)
+++			continue;
+++		memcpy(heap_src, chacha20poly1305_enc_vectors[i].input,
+++		       chacha20poly1305_enc_vectors[i].ilen);
+++		sg_init_one(&sg_src, heap_src,
+++			    chacha20poly1305_enc_vectors[i].ilen + POLY1305_DIGEST_SIZE);
+++		chacha20poly1305_encrypt_sg_inplace(&sg_src,
+++			chacha20poly1305_enc_vectors[i].ilen,
+++			chacha20poly1305_enc_vectors[i].assoc,
+++			chacha20poly1305_enc_vectors[i].alen,
+++			get_unaligned_le64(chacha20poly1305_enc_vectors[i].nonce),
+++			chacha20poly1305_enc_vectors[i].key);
+++		if (memcmp(heap_src,
+++				   chacha20poly1305_enc_vectors[i].output,
+++				   chacha20poly1305_enc_vectors[i].ilen +
+++							POLY1305_DIGEST_SIZE)) {
+++			pr_err("chacha20poly1305 sg encryption self-test %zu: FAIL\n",
+++			       i + 1);
+++			success = false;
+++		}
+++	}
+++
++ 	for (i = 0; i < ARRAY_SIZE(chacha20poly1305_dec_vectors); ++i) {
++ 		memset(computed_output, 0, MAXIMUM_TEST_BUFFER_LEN);
++ 		ret = chacha20poly1305_decrypt(computed_output,
++@@ -7301,6 +7325,27 @@ bool __init chacha20poly1305_selftest(vo
++ 		}
++ 	}
++ 
+++	for (i = 0; i < ARRAY_SIZE(chacha20poly1305_dec_vectors); ++i) {
+++		memcpy(heap_src, chacha20poly1305_dec_vectors[i].input,
+++		       chacha20poly1305_dec_vectors[i].ilen);
+++		sg_init_one(&sg_src, heap_src,
+++			    chacha20poly1305_dec_vectors[i].ilen);
+++		ret = chacha20poly1305_decrypt_sg_inplace(&sg_src,
+++			chacha20poly1305_dec_vectors[i].ilen,
+++			chacha20poly1305_dec_vectors[i].assoc,
+++			chacha20poly1305_dec_vectors[i].alen,
+++			get_unaligned_le64(chacha20poly1305_dec_vectors[i].nonce),
+++			chacha20poly1305_dec_vectors[i].key);
+++		if (!decryption_success(ret,
+++			chacha20poly1305_dec_vectors[i].failure,
+++			memcmp(heap_src, chacha20poly1305_dec_vectors[i].output,
+++			       chacha20poly1305_dec_vectors[i].ilen -
+++							POLY1305_DIGEST_SIZE))) {
+++			pr_err("chacha20poly1305 sg decryption self-test %zu: FAIL\n",
+++			       i + 1);
+++			success = false;
+++		}
+++	}
++ 
++ 	for (i = 0; i < ARRAY_SIZE(xchacha20poly1305_enc_vectors); ++i) {
++ 		memset(computed_output, 0, MAXIMUM_TEST_BUFFER_LEN);
++--- a/lib/crypto/chacha20poly1305.c
+++++ b/lib/crypto/chacha20poly1305.c
++@@ -11,6 +11,7 @@
++ #include <crypto/chacha20poly1305.h>
++ #include <crypto/chacha.h>
++ #include <crypto/poly1305.h>
+++#include <crypto/scatterwalk.h>
++ 
++ #include <asm/unaligned.h>
++ #include <linux/kernel.h>
++@@ -205,6 +206,155 @@ bool xchacha20poly1305_decrypt(u8 *dst,
++ }
++ EXPORT_SYMBOL(xchacha20poly1305_decrypt);
++ 
+++static
+++bool chacha20poly1305_crypt_sg_inplace(struct scatterlist *src,
+++				       const size_t src_len,
+++				       const u8 *ad, const size_t ad_len,
+++				       const u64 nonce,
+++				       const u8 key[CHACHA20POLY1305_KEY_SIZE],
+++				       int encrypt)
+++{
+++	const u8 *pad0 = page_address(ZERO_PAGE(0));
+++	struct poly1305_desc_ctx poly1305_state;
+++	u32 chacha_state[CHACHA_STATE_WORDS];
+++	struct sg_mapping_iter miter;
+++	size_t partial = 0;
+++	unsigned int flags;
+++	bool ret = true;
+++	int sl;
+++	union {
+++		struct {
+++			u32 k[CHACHA_KEY_WORDS];
+++			__le64 iv[2];
+++		};
+++		u8 block0[POLY1305_KEY_SIZE];
+++		u8 chacha_stream[CHACHA_BLOCK_SIZE];
+++		struct {
+++			u8 mac[2][POLY1305_DIGEST_SIZE];
+++		};
+++		__le64 lens[2];
+++	} b __aligned(16);
+++
+++	chacha_load_key(b.k, key);
+++
+++	b.iv[0] = 0;
+++	b.iv[1] = cpu_to_le64(nonce);
+++
+++	chacha_init(chacha_state, b.k, (u8 *)b.iv);
+++	chacha_crypt(chacha_state, b.block0, pad0, sizeof(b.block0), 20);
+++	poly1305_init(&poly1305_state, b.block0);
+++
+++	if (unlikely(ad_len)) {
+++		poly1305_update(&poly1305_state, ad, ad_len);
+++		if (ad_len & 0xf)
+++			poly1305_update(&poly1305_state, pad0, 0x10 - (ad_len & 0xf));
+++	}
+++
+++	flags = SG_MITER_TO_SG;
+++	if (!preemptible())
+++		flags |= SG_MITER_ATOMIC;
+++
+++	sg_miter_start(&miter, src, sg_nents(src), flags);
+++
+++	for (sl = src_len; sl > 0 && sg_miter_next(&miter); sl -= miter.length) {
+++		u8 *addr = miter.addr;
+++		size_t length = min_t(size_t, sl, miter.length);
+++
+++		if (!encrypt)
+++			poly1305_update(&poly1305_state, addr, length);
+++
+++		if (unlikely(partial)) {
+++			size_t l = min(length, CHACHA_BLOCK_SIZE - partial);
+++
+++			crypto_xor(addr, b.chacha_stream + partial, l);
+++			partial = (partial + l) & (CHACHA_BLOCK_SIZE - 1);
+++
+++			addr += l;
+++			length -= l;
+++		}
+++
+++		if (likely(length >= CHACHA_BLOCK_SIZE || length == sl)) {
+++			size_t l = length;
+++
+++			if (unlikely(length < sl))
+++				l &= ~(CHACHA_BLOCK_SIZE - 1);
+++			chacha_crypt(chacha_state, addr, addr, l, 20);
+++			addr += l;
+++			length -= l;
+++		}
+++
+++		if (unlikely(length > 0)) {
+++			chacha_crypt(chacha_state, b.chacha_stream, pad0,
+++				     CHACHA_BLOCK_SIZE, 20);
+++			crypto_xor(addr, b.chacha_stream, length);
+++			partial = length;
+++		}
+++
+++		if (encrypt)
+++			poly1305_update(&poly1305_state, miter.addr,
+++					min_t(size_t, sl, miter.length));
+++	}
+++
+++	if (src_len & 0xf)
+++		poly1305_update(&poly1305_state, pad0, 0x10 - (src_len & 0xf));
+++
+++	b.lens[0] = cpu_to_le64(ad_len);
+++	b.lens[1] = cpu_to_le64(src_len);
+++	poly1305_update(&poly1305_state, (u8 *)b.lens, sizeof(b.lens));
+++
+++	if (likely(sl <= -POLY1305_DIGEST_SIZE)) {
+++		if (encrypt) {
+++			poly1305_final(&poly1305_state,
+++				       miter.addr + miter.length + sl);
+++			ret = true;
+++		} else {
+++			poly1305_final(&poly1305_state, b.mac[0]);
+++			ret = !crypto_memneq(b.mac[0],
+++					     miter.addr + miter.length + sl,
+++					     POLY1305_DIGEST_SIZE);
+++		}
+++	}
+++
+++	sg_miter_stop(&miter);
+++
+++	if (unlikely(sl > -POLY1305_DIGEST_SIZE)) {
+++		poly1305_final(&poly1305_state, b.mac[1]);
+++		scatterwalk_map_and_copy(b.mac[encrypt], src, src_len,
+++					 sizeof(b.mac[1]), encrypt);
+++		ret = encrypt ||
+++		      !crypto_memneq(b.mac[0], b.mac[1], POLY1305_DIGEST_SIZE);
+++	}
+++
+++	memzero_explicit(chacha_state, sizeof(chacha_state));
+++	memzero_explicit(&b, sizeof(b));
+++
+++	return ret;
+++}
+++
+++bool chacha20poly1305_encrypt_sg_inplace(struct scatterlist *src, size_t src_len,
+++					 const u8 *ad, const size_t ad_len,
+++					 const u64 nonce,
+++					 const u8 key[CHACHA20POLY1305_KEY_SIZE])
+++{
+++	return chacha20poly1305_crypt_sg_inplace(src, src_len, ad, ad_len,
+++						 nonce, key, 1);
+++}
+++EXPORT_SYMBOL(chacha20poly1305_encrypt_sg_inplace);
+++
+++bool chacha20poly1305_decrypt_sg_inplace(struct scatterlist *src, size_t src_len,
+++					 const u8 *ad, const size_t ad_len,
+++					 const u64 nonce,
+++					 const u8 key[CHACHA20POLY1305_KEY_SIZE])
+++{
+++	if (unlikely(src_len < POLY1305_DIGEST_SIZE))
+++		return false;
+++
+++	return chacha20poly1305_crypt_sg_inplace(src,
+++						 src_len - POLY1305_DIGEST_SIZE,
+++						 ad, ad_len, nonce, key, 0);
+++}
+++EXPORT_SYMBOL(chacha20poly1305_decrypt_sg_inplace);
+++
++ static int __init mod_init(void)
++ {
++ 	if (!IS_ENABLED(CONFIG_CRYPTO_MANAGER_DISABLE_TESTS) &&
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0034-crypto-chacha_generic-remove-unnecessary-setkey-func.patch b/target/linux/generic/backport-5.4/080-wireguard-0034-crypto-chacha_generic-remove-unnecessary-setkey-func.patch
+new file mode 100644
+index 0000000000..709b1fbcf5
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0034-crypto-chacha_generic-remove-unnecessary-setkey-func.patch
+@@ -0,0 +1,68 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Eric Biggers <ebiggers@google.com>
++Date: Sun, 17 Nov 2019 23:21:29 -0800
++Subject: [PATCH] crypto: chacha_generic - remove unnecessary setkey()
++ functions
++
++commit 2043323a799a660bc84bbee404cf7a2617ec6157 upstream.
++
++Use chacha20_setkey() and chacha12_setkey() from
++<crypto/internal/chacha.h> instead of defining them again in
++chacha_generic.c.
++
++Signed-off-by: Eric Biggers <ebiggers@google.com>
++Acked-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ crypto/chacha_generic.c | 18 +++---------------
++ 1 file changed, 3 insertions(+), 15 deletions(-)
++
++--- a/crypto/chacha_generic.c
+++++ b/crypto/chacha_generic.c
++@@ -37,18 +37,6 @@ static int chacha_stream_xor(struct skci
++ 	return err;
++ }
++ 
++-static int crypto_chacha20_setkey(struct crypto_skcipher *tfm, const u8 *key,
++-				  unsigned int keysize)
++-{
++-	return chacha_setkey(tfm, key, keysize, 20);
++-}
++-
++-static int crypto_chacha12_setkey(struct crypto_skcipher *tfm, const u8 *key,
++-				 unsigned int keysize)
++-{
++-	return chacha_setkey(tfm, key, keysize, 12);
++-}
++-
++ static int crypto_chacha_crypt(struct skcipher_request *req)
++ {
++ 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
++@@ -91,7 +79,7 @@ static struct skcipher_alg algs[] = {
++ 		.max_keysize		= CHACHA_KEY_SIZE,
++ 		.ivsize			= CHACHA_IV_SIZE,
++ 		.chunksize		= CHACHA_BLOCK_SIZE,
++-		.setkey			= crypto_chacha20_setkey,
+++		.setkey			= chacha20_setkey,
++ 		.encrypt		= crypto_chacha_crypt,
++ 		.decrypt		= crypto_chacha_crypt,
++ 	}, {
++@@ -106,7 +94,7 @@ static struct skcipher_alg algs[] = {
++ 		.max_keysize		= CHACHA_KEY_SIZE,
++ 		.ivsize			= XCHACHA_IV_SIZE,
++ 		.chunksize		= CHACHA_BLOCK_SIZE,
++-		.setkey			= crypto_chacha20_setkey,
+++		.setkey			= chacha20_setkey,
++ 		.encrypt		= crypto_xchacha_crypt,
++ 		.decrypt		= crypto_xchacha_crypt,
++ 	}, {
++@@ -121,7 +109,7 @@ static struct skcipher_alg algs[] = {
++ 		.max_keysize		= CHACHA_KEY_SIZE,
++ 		.ivsize			= XCHACHA_IV_SIZE,
++ 		.chunksize		= CHACHA_BLOCK_SIZE,
++-		.setkey			= crypto_chacha12_setkey,
+++		.setkey			= chacha12_setkey,
++ 		.encrypt		= crypto_xchacha_crypt,
++ 		.decrypt		= crypto_xchacha_crypt,
++ 	}
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0035-crypto-x86-chacha-only-unregister-algorithms-if-regi.patch b/target/linux/generic/backport-5.4/080-wireguard-0035-crypto-x86-chacha-only-unregister-algorithms-if-regi.patch
+new file mode 100644
+index 0000000000..4554ea898b
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0035-crypto-x86-chacha-only-unregister-algorithms-if-regi.patch
+@@ -0,0 +1,31 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Eric Biggers <ebiggers@google.com>
++Date: Sun, 17 Nov 2019 23:21:58 -0800
++Subject: [PATCH] crypto: x86/chacha - only unregister algorithms if registered
++
++commit b62755aed3a3f5ca9edd2718339ccea3b6bbbe57 upstream.
++
++It's not valid to call crypto_unregister_skciphers() without a prior
++call to crypto_register_skciphers().
++
++Fixes: 84e03fa39fbe ("crypto: x86/chacha - expose SIMD ChaCha routine as library function")
++Signed-off-by: Eric Biggers <ebiggers@google.com>
++Acked-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/chacha_glue.c | 3 ++-
++ 1 file changed, 2 insertions(+), 1 deletion(-)
++
++--- a/arch/x86/crypto/chacha_glue.c
+++++ b/arch/x86/crypto/chacha_glue.c
++@@ -304,7 +304,8 @@ static int __init chacha_simd_mod_init(v
++ 
++ static void __exit chacha_simd_mod_fini(void)
++ {
++-	crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));
+++	if (boot_cpu_has(X86_FEATURE_SSSE3))
+++		crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));
++ }
++ 
++ module_init(chacha_simd_mod_init);
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0036-crypto-lib-chacha20poly1305-use-chacha20_crypt.patch b/target/linux/generic/backport-5.4/080-wireguard-0036-crypto-lib-chacha20poly1305-use-chacha20_crypt.patch
+new file mode 100644
+index 0000000000..6ad20b999e
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0036-crypto-lib-chacha20poly1305-use-chacha20_crypt.patch
+@@ -0,0 +1,83 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Eric Biggers <ebiggers@google.com>
++Date: Sun, 17 Nov 2019 23:22:16 -0800
++Subject: [PATCH] crypto: lib/chacha20poly1305 - use chacha20_crypt()
++
++commit 413808b71e6204b0cc1eeaa77960f7c3cd381d33 upstream.
++
++Use chacha20_crypt() instead of chacha_crypt(), since it's not really
++appropriate for users of the ChaCha library API to be passing the number
++of rounds as an argument.
++
++Signed-off-by: Eric Biggers <ebiggers@google.com>
++Acked-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ lib/crypto/chacha20poly1305.c | 16 ++++++++--------
++ 1 file changed, 8 insertions(+), 8 deletions(-)
++
++--- a/lib/crypto/chacha20poly1305.c
+++++ b/lib/crypto/chacha20poly1305.c
++@@ -66,14 +66,14 @@ __chacha20poly1305_encrypt(u8 *dst, cons
++ 		__le64 lens[2];
++ 	} b;
++ 
++-	chacha_crypt(chacha_state, b.block0, pad0, sizeof(b.block0), 20);
+++	chacha20_crypt(chacha_state, b.block0, pad0, sizeof(b.block0));
++ 	poly1305_init(&poly1305_state, b.block0);
++ 
++ 	poly1305_update(&poly1305_state, ad, ad_len);
++ 	if (ad_len & 0xf)
++ 		poly1305_update(&poly1305_state, pad0, 0x10 - (ad_len & 0xf));
++ 
++-	chacha_crypt(chacha_state, dst, src, src_len, 20);
+++	chacha20_crypt(chacha_state, dst, src, src_len);
++ 
++ 	poly1305_update(&poly1305_state, dst, src_len);
++ 	if (src_len & 0xf)
++@@ -140,7 +140,7 @@ __chacha20poly1305_decrypt(u8 *dst, cons
++ 	if (unlikely(src_len < POLY1305_DIGEST_SIZE))
++ 		return false;
++ 
++-	chacha_crypt(chacha_state, b.block0, pad0, sizeof(b.block0), 20);
+++	chacha20_crypt(chacha_state, b.block0, pad0, sizeof(b.block0));
++ 	poly1305_init(&poly1305_state, b.block0);
++ 
++ 	poly1305_update(&poly1305_state, ad, ad_len);
++@@ -160,7 +160,7 @@ __chacha20poly1305_decrypt(u8 *dst, cons
++ 
++ 	ret = crypto_memneq(b.mac, src + dst_len, POLY1305_DIGEST_SIZE);
++ 	if (likely(!ret))
++-		chacha_crypt(chacha_state, dst, src, dst_len, 20);
+++		chacha20_crypt(chacha_state, dst, src, dst_len);
++ 
++ 	memzero_explicit(&b, sizeof(b));
++ 
++@@ -241,7 +241,7 @@ bool chacha20poly1305_crypt_sg_inplace(s
++ 	b.iv[1] = cpu_to_le64(nonce);
++ 
++ 	chacha_init(chacha_state, b.k, (u8 *)b.iv);
++-	chacha_crypt(chacha_state, b.block0, pad0, sizeof(b.block0), 20);
+++	chacha20_crypt(chacha_state, b.block0, pad0, sizeof(b.block0));
++ 	poly1305_init(&poly1305_state, b.block0);
++ 
++ 	if (unlikely(ad_len)) {
++@@ -278,14 +278,14 @@ bool chacha20poly1305_crypt_sg_inplace(s
++ 
++ 			if (unlikely(length < sl))
++ 				l &= ~(CHACHA_BLOCK_SIZE - 1);
++-			chacha_crypt(chacha_state, addr, addr, l, 20);
+++			chacha20_crypt(chacha_state, addr, addr, l);
++ 			addr += l;
++ 			length -= l;
++ 		}
++ 
++ 		if (unlikely(length > 0)) {
++-			chacha_crypt(chacha_state, b.chacha_stream, pad0,
++-				     CHACHA_BLOCK_SIZE, 20);
+++			chacha20_crypt(chacha_state, b.chacha_stream, pad0,
+++				       CHACHA_BLOCK_SIZE);
++ 			crypto_xor(addr, b.chacha_stream, length);
++ 			partial = length;
++ 		}
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0037-crypto-arch-conditionalize-crypto-api-in-arch-glue-f.patch b/target/linux/generic/backport-5.4/080-wireguard-0037-crypto-arch-conditionalize-crypto-api-in-arch-glue-f.patch
+new file mode 100644
+index 0000000000..d510438f1d
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0037-crypto-arch-conditionalize-crypto-api-in-arch-glue-f.patch
+@@ -0,0 +1,275 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Mon, 25 Nov 2019 11:31:12 +0100
++Subject: [PATCH] crypto: arch - conditionalize crypto api in arch glue for lib
++ code
++
++commit 8394bfec51e0e565556101bcc4e2fe7551104cd8 upstream.
++
++For glue code that's used by Zinc, the actual Crypto API functions might
++not necessarily exist, and don't need to exist either. Before this
++patch, there are valid build configurations that lead to a unbuildable
++kernel. This fixes it to conditionalize those symbols on the existence
++of the proper config entry.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Acked-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/chacha-glue.c        | 26 ++++++++++++++++----------
++ arch/arm/crypto/curve25519-glue.c    |  5 +++--
++ arch/arm/crypto/poly1305-glue.c      |  9 ++++++---
++ arch/arm64/crypto/chacha-neon-glue.c |  5 +++--
++ arch/arm64/crypto/poly1305-glue.c    |  5 +++--
++ arch/mips/crypto/chacha-glue.c       |  6 ++++--
++ arch/mips/crypto/poly1305-glue.c     |  6 ++++--
++ arch/x86/crypto/blake2s-glue.c       |  6 ++++--
++ arch/x86/crypto/chacha_glue.c        |  5 +++--
++ arch/x86/crypto/curve25519-x86_64.c  |  7 ++++---
++ arch/x86/crypto/poly1305_glue.c      |  5 +++--
++ 11 files changed, 53 insertions(+), 32 deletions(-)
++
++--- a/arch/arm/crypto/chacha-glue.c
+++++ b/arch/arm/crypto/chacha-glue.c
++@@ -286,11 +286,13 @@ static struct skcipher_alg neon_algs[] =
++ 
++ static int __init chacha_simd_mod_init(void)
++ {
++-	int err;
+++	int err = 0;
++ 
++-	err = crypto_register_skciphers(arm_algs, ARRAY_SIZE(arm_algs));
++-	if (err)
++-		return err;
+++	if (IS_REACHABLE(CONFIG_CRYPTO_BLKCIPHER)) {
+++		err = crypto_register_skciphers(arm_algs, ARRAY_SIZE(arm_algs));
+++		if (err)
+++			return err;
+++	}
++ 
++ 	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) && (elf_hwcap & HWCAP_NEON)) {
++ 		int i;
++@@ -310,18 +312,22 @@ static int __init chacha_simd_mod_init(v
++ 			static_branch_enable(&use_neon);
++ 		}
++ 
++-		err = crypto_register_skciphers(neon_algs, ARRAY_SIZE(neon_algs));
++-		if (err)
++-			crypto_unregister_skciphers(arm_algs, ARRAY_SIZE(arm_algs));
+++		if (IS_REACHABLE(CONFIG_CRYPTO_BLKCIPHER)) {
+++			err = crypto_register_skciphers(neon_algs, ARRAY_SIZE(neon_algs));
+++			if (err)
+++				crypto_unregister_skciphers(arm_algs, ARRAY_SIZE(arm_algs));
+++		}
++ 	}
++ 	return err;
++ }
++ 
++ static void __exit chacha_simd_mod_fini(void)
++ {
++-	crypto_unregister_skciphers(arm_algs, ARRAY_SIZE(arm_algs));
++-	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) && (elf_hwcap & HWCAP_NEON))
++-		crypto_unregister_skciphers(neon_algs, ARRAY_SIZE(neon_algs));
+++	if (IS_REACHABLE(CONFIG_CRYPTO_BLKCIPHER)) {
+++		crypto_unregister_skciphers(arm_algs, ARRAY_SIZE(arm_algs));
+++		if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) && (elf_hwcap & HWCAP_NEON))
+++			crypto_unregister_skciphers(neon_algs, ARRAY_SIZE(neon_algs));
+++	}
++ }
++ 
++ module_init(chacha_simd_mod_init);
++--- a/arch/arm/crypto/curve25519-glue.c
+++++ b/arch/arm/crypto/curve25519-glue.c
++@@ -108,14 +108,15 @@ static int __init mod_init(void)
++ {
++ 	if (elf_hwcap & HWCAP_NEON) {
++ 		static_branch_enable(&have_neon);
++-		return crypto_register_kpp(&curve25519_alg);
+++		return IS_REACHABLE(CONFIG_CRYPTO_KPP) ?
+++			crypto_register_kpp(&curve25519_alg) : 0;
++ 	}
++ 	return 0;
++ }
++ 
++ static void __exit mod_exit(void)
++ {
++-	if (elf_hwcap & HWCAP_NEON)
+++	if (IS_REACHABLE(CONFIG_CRYPTO_KPP) && elf_hwcap & HWCAP_NEON)
++ 		crypto_unregister_kpp(&curve25519_alg);
++ }
++ 
++--- a/arch/arm/crypto/poly1305-glue.c
+++++ b/arch/arm/crypto/poly1305-glue.c
++@@ -249,16 +249,19 @@ static int __init arm_poly1305_mod_init(
++ 	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &&
++ 	    (elf_hwcap & HWCAP_NEON))
++ 		static_branch_enable(&have_neon);
++-	else
+++	else if (IS_REACHABLE(CONFIG_CRYPTO_HASH))
++ 		/* register only the first entry */
++ 		return crypto_register_shash(&arm_poly1305_algs[0]);
++ 
++-	return crypto_register_shashes(arm_poly1305_algs,
++-				       ARRAY_SIZE(arm_poly1305_algs));
+++	return IS_REACHABLE(CONFIG_CRYPTO_HASH) ?
+++		crypto_register_shashes(arm_poly1305_algs,
+++					ARRAY_SIZE(arm_poly1305_algs)) : 0;
++ }
++ 
++ static void __exit arm_poly1305_mod_exit(void)
++ {
+++	if (!IS_REACHABLE(CONFIG_CRYPTO_HASH))
+++		return;
++ 	if (!static_branch_likely(&have_neon)) {
++ 		crypto_unregister_shash(&arm_poly1305_algs[0]);
++ 		return;
++--- a/arch/arm64/crypto/chacha-neon-glue.c
+++++ b/arch/arm64/crypto/chacha-neon-glue.c
++@@ -211,12 +211,13 @@ static int __init chacha_simd_mod_init(v
++ 
++ 	static_branch_enable(&have_neon);
++ 
++-	return crypto_register_skciphers(algs, ARRAY_SIZE(algs));
+++	return IS_REACHABLE(CONFIG_CRYPTO_BLKCIPHER) ?
+++		crypto_register_skciphers(algs, ARRAY_SIZE(algs)) : 0;
++ }
++ 
++ static void __exit chacha_simd_mod_fini(void)
++ {
++-	if (cpu_have_named_feature(ASIMD))
+++	if (IS_REACHABLE(CONFIG_CRYPTO_BLKCIPHER) && cpu_have_named_feature(ASIMD))
++ 		crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));
++ }
++ 
++--- a/arch/arm64/crypto/poly1305-glue.c
+++++ b/arch/arm64/crypto/poly1305-glue.c
++@@ -220,12 +220,13 @@ static int __init neon_poly1305_mod_init
++ 
++ 	static_branch_enable(&have_neon);
++ 
++-	return crypto_register_shash(&neon_poly1305_alg);
+++	return IS_REACHABLE(CONFIG_CRYPTO_HASH) ?
+++		crypto_register_shash(&neon_poly1305_alg) : 0;
++ }
++ 
++ static void __exit neon_poly1305_mod_exit(void)
++ {
++-	if (cpu_have_named_feature(ASIMD))
+++	if (IS_REACHABLE(CONFIG_CRYPTO_HASH) && cpu_have_named_feature(ASIMD))
++ 		crypto_unregister_shash(&neon_poly1305_alg);
++ }
++ 
++--- a/arch/mips/crypto/chacha-glue.c
+++++ b/arch/mips/crypto/chacha-glue.c
++@@ -128,12 +128,14 @@ static struct skcipher_alg algs[] = {
++ 
++ static int __init chacha_simd_mod_init(void)
++ {
++-	return crypto_register_skciphers(algs, ARRAY_SIZE(algs));
+++	return IS_REACHABLE(CONFIG_CRYPTO_BLKCIPHER) ?
+++		crypto_register_skciphers(algs, ARRAY_SIZE(algs)) : 0;
++ }
++ 
++ static void __exit chacha_simd_mod_fini(void)
++ {
++-	crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));
+++	if (IS_REACHABLE(CONFIG_CRYPTO_BLKCIPHER))
+++		crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));
++ }
++ 
++ module_init(chacha_simd_mod_init);
++--- a/arch/mips/crypto/poly1305-glue.c
+++++ b/arch/mips/crypto/poly1305-glue.c
++@@ -187,12 +187,14 @@ static struct shash_alg mips_poly1305_al
++ 
++ static int __init mips_poly1305_mod_init(void)
++ {
++-	return crypto_register_shash(&mips_poly1305_alg);
+++	return IS_REACHABLE(CONFIG_CRYPTO_HASH) ?
+++		crypto_register_shash(&mips_poly1305_alg) : 0;
++ }
++ 
++ static void __exit mips_poly1305_mod_exit(void)
++ {
++-	crypto_unregister_shash(&mips_poly1305_alg);
+++	if (IS_REACHABLE(CONFIG_CRYPTO_HASH))
+++		crypto_unregister_shash(&mips_poly1305_alg);
++ }
++ 
++ module_init(mips_poly1305_mod_init);
++--- a/arch/x86/crypto/blake2s-glue.c
+++++ b/arch/x86/crypto/blake2s-glue.c
++@@ -210,12 +210,14 @@ static int __init blake2s_mod_init(void)
++ 			      XFEATURE_MASK_AVX512, NULL))
++ 		static_branch_enable(&blake2s_use_avx512);
++ 
++-	return crypto_register_shashes(blake2s_algs, ARRAY_SIZE(blake2s_algs));
+++	return IS_REACHABLE(CONFIG_CRYPTO_HASH) ?
+++		crypto_register_shashes(blake2s_algs,
+++					ARRAY_SIZE(blake2s_algs)) : 0;
++ }
++ 
++ static void __exit blake2s_mod_exit(void)
++ {
++-	if (boot_cpu_has(X86_FEATURE_SSSE3))
+++	if (IS_REACHABLE(CONFIG_CRYPTO_HASH) && boot_cpu_has(X86_FEATURE_SSSE3))
++ 		crypto_unregister_shashes(blake2s_algs, ARRAY_SIZE(blake2s_algs));
++ }
++ 
++--- a/arch/x86/crypto/chacha_glue.c
+++++ b/arch/x86/crypto/chacha_glue.c
++@@ -299,12 +299,13 @@ static int __init chacha_simd_mod_init(v
++ 		    boot_cpu_has(X86_FEATURE_AVX512BW)) /* kmovq */
++ 			static_branch_enable(&chacha_use_avx512vl);
++ 	}
++-	return crypto_register_skciphers(algs, ARRAY_SIZE(algs));
+++	return IS_REACHABLE(CONFIG_CRYPTO_BLKCIPHER) ?
+++		crypto_register_skciphers(algs, ARRAY_SIZE(algs)) : 0;
++ }
++ 
++ static void __exit chacha_simd_mod_fini(void)
++ {
++-	if (boot_cpu_has(X86_FEATURE_SSSE3))
+++	if (IS_REACHABLE(CONFIG_CRYPTO_BLKCIPHER) && boot_cpu_has(X86_FEATURE_SSSE3))
++ 		crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));
++ }
++ 
++--- a/arch/x86/crypto/curve25519-x86_64.c
+++++ b/arch/x86/crypto/curve25519-x86_64.c
++@@ -2457,13 +2457,14 @@ static int __init curve25519_mod_init(vo
++ 		static_branch_enable(&curve25519_use_adx);
++ 	else
++ 		return 0;
++-	return crypto_register_kpp(&curve25519_alg);
+++	return IS_REACHABLE(CONFIG_CRYPTO_KPP) ?
+++		crypto_register_kpp(&curve25519_alg) : 0;
++ }
++ 
++ static void __exit curve25519_mod_exit(void)
++ {
++-	if (boot_cpu_has(X86_FEATURE_BMI2) ||
++-	    boot_cpu_has(X86_FEATURE_ADX))
+++	if (IS_REACHABLE(CONFIG_CRYPTO_KPP) &&
+++	    (boot_cpu_has(X86_FEATURE_BMI2) || boot_cpu_has(X86_FEATURE_ADX)))
++ 		crypto_unregister_kpp(&curve25519_alg);
++ }
++ 
++--- a/arch/x86/crypto/poly1305_glue.c
+++++ b/arch/x86/crypto/poly1305_glue.c
++@@ -224,12 +224,13 @@ static int __init poly1305_simd_mod_init
++ 	    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL))
++ 		static_branch_enable(&poly1305_use_avx2);
++ 
++-	return crypto_register_shash(&alg);
+++	return IS_REACHABLE(CONFIG_CRYPTO_HASH) ? crypto_register_shash(&alg) : 0;
++ }
++ 
++ static void __exit poly1305_simd_mod_exit(void)
++ {
++-	crypto_unregister_shash(&alg);
+++	if (IS_REACHABLE(CONFIG_CRYPTO_HASH))
+++		crypto_unregister_shash(&alg);
++ }
++ 
++ module_init(poly1305_simd_mod_init);
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0038-crypto-chacha-fix-warning-message-in-header-file.patch b/target/linux/generic/backport-5.4/080-wireguard-0038-crypto-chacha-fix-warning-message-in-header-file.patch
+new file mode 100644
+index 0000000000..ccd03e3525
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0038-crypto-chacha-fix-warning-message-in-header-file.patch
+@@ -0,0 +1,35 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Valdis=20Kl=C4=93tnieks?= <valdis.kletnieks@vt.edu>
++Date: Thu, 5 Dec 2019 20:58:36 -0500
++Subject: [PATCH] crypto: chacha - fix warning message in header file
++
++commit 579d705cd64e44f3fcda1a6cfd5f37468a5ddf63 upstream.
++
++Building with W=1 causes a warning:
++
++  CC [M]  arch/x86/crypto/chacha_glue.o
++In file included from arch/x86/crypto/chacha_glue.c:10:
++./include/crypto/internal/chacha.h:37:1: warning: 'inline' is not at beginning of declaration [-Wold-style-declaration]
++   37 | static int inline chacha12_setkey(struct crypto_skcipher *tfm, const u8 *key,
++      | ^~~~~~
++
++Straighten out the order to match the rest of the header file.
++
++Signed-off-by: Valdis Kletnieks <valdis.kletnieks@vt.edu>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ include/crypto/internal/chacha.h | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/include/crypto/internal/chacha.h
+++++ b/include/crypto/internal/chacha.h
++@@ -34,7 +34,7 @@ static inline int chacha20_setkey(struct
++ 	return chacha_setkey(tfm, key, keysize, 20);
++ }
++ 
++-static int inline chacha12_setkey(struct crypto_skcipher *tfm, const u8 *key,
+++static inline int chacha12_setkey(struct crypto_skcipher *tfm, const u8 *key,
++ 				  unsigned int keysize)
++ {
++ 	return chacha_setkey(tfm, key, keysize, 12);
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0039-crypto-arm-curve25519-add-arch-specific-key-generati.patch b/target/linux/generic/backport-5.4/080-wireguard-0039-crypto-arm-curve25519-add-arch-specific-key-generati.patch
+new file mode 100644
+index 0000000000..67de22deb6
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0039-crypto-arm-curve25519-add-arch-specific-key-generati.patch
+@@ -0,0 +1,38 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Wed, 11 Dec 2019 10:26:39 +0100
++Subject: [PATCH] crypto: arm/curve25519 - add arch-specific key generation
++ function
++
++commit 84faa307249b341f6ad8de3e1869d77a65e26669 upstream.
++
++Somehow this was forgotten when Zinc was being split into oddly shaped
++pieces, resulting in linker errors. The x86_64 glue has a specific key
++generation implementation, but the Arm one does not. However, it can
++still receive the NEON speedups by calling the ordinary DH function
++using the base point.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Acked-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/curve25519-glue.c | 7 +++++++
++ 1 file changed, 7 insertions(+)
++
++--- a/arch/arm/crypto/curve25519-glue.c
+++++ b/arch/arm/crypto/curve25519-glue.c
++@@ -38,6 +38,13 @@ void curve25519_arch(u8 out[CURVE25519_K
++ }
++ EXPORT_SYMBOL(curve25519_arch);
++ 
+++void curve25519_base_arch(u8 pub[CURVE25519_KEY_SIZE],
+++			  const u8 secret[CURVE25519_KEY_SIZE])
+++{
+++	return curve25519_arch(pub, secret, curve25519_base_point);
+++}
+++EXPORT_SYMBOL(curve25519_base_arch);
+++
++ static int curve25519_set_secret(struct crypto_kpp *tfm, const void *buf,
++ 				 unsigned int len)
++ {
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0040-crypto-lib-curve25519-re-add-selftests.patch b/target/linux/generic/backport-5.4/080-wireguard-0040-crypto-lib-curve25519-re-add-selftests.patch
+new file mode 100644
+index 0000000000..e43d196a3b
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0040-crypto-lib-curve25519-re-add-selftests.patch
+@@ -0,0 +1,1387 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Mon, 16 Dec 2019 19:53:26 +0100
++Subject: [PATCH] crypto: lib/curve25519 - re-add selftests
++
++commit aa127963f1cab2b93c74c9b128a84610203fb674 upstream.
++
++Somehow these were dropped when Zinc was being integrated, which is
++problematic, because testing the library interface for Curve25519 is
++important.. This commit simply adds them back and wires them in in the
++same way that the blake2s selftests are wired in.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ lib/crypto/Makefile              |    1 +
++ lib/crypto/curve25519-selftest.c | 1321 ++++++++++++++++++++++++++++++
++ lib/crypto/curve25519.c          |   17 +
++ 3 files changed, 1339 insertions(+)
++ create mode 100644 lib/crypto/curve25519-selftest.c
++
++--- a/lib/crypto/Makefile
+++++ b/lib/crypto/Makefile
++@@ -36,4 +36,5 @@ libsha256-y					:= sha256.o
++ ifneq ($(CONFIG_CRYPTO_MANAGER_DISABLE_TESTS),y)
++ libblake2s-y					+= blake2s-selftest.o
++ libchacha20poly1305-y				+= chacha20poly1305-selftest.o
+++libcurve25519-y					+= curve25519-selftest.o
++ endif
++--- /dev/null
+++++ b/lib/crypto/curve25519-selftest.c
++@@ -0,0 +1,1321 @@
+++// SPDX-License-Identifier: GPL-2.0 OR MIT
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include <crypto/curve25519.h>
+++
+++struct curve25519_test_vector {
+++	u8 private[CURVE25519_KEY_SIZE];
+++	u8 public[CURVE25519_KEY_SIZE];
+++	u8 result[CURVE25519_KEY_SIZE];
+++	bool valid;
+++};
+++static const struct curve25519_test_vector curve25519_test_vectors[] __initconst = {
+++	{
+++		.private = { 0x77, 0x07, 0x6d, 0x0a, 0x73, 0x18, 0xa5, 0x7d,
+++			     0x3c, 0x16, 0xc1, 0x72, 0x51, 0xb2, 0x66, 0x45,
+++			     0xdf, 0x4c, 0x2f, 0x87, 0xeb, 0xc0, 0x99, 0x2a,
+++			     0xb1, 0x77, 0xfb, 0xa5, 0x1d, 0xb9, 0x2c, 0x2a },
+++		.public = { 0xde, 0x9e, 0xdb, 0x7d, 0x7b, 0x7d, 0xc1, 0xb4,
+++			    0xd3, 0x5b, 0x61, 0xc2, 0xec, 0xe4, 0x35, 0x37,
+++			    0x3f, 0x83, 0x43, 0xc8, 0x5b, 0x78, 0x67, 0x4d,
+++			    0xad, 0xfc, 0x7e, 0x14, 0x6f, 0x88, 0x2b, 0x4f },
+++		.result = { 0x4a, 0x5d, 0x9d, 0x5b, 0xa4, 0xce, 0x2d, 0xe1,
+++			    0x72, 0x8e, 0x3b, 0xf4, 0x80, 0x35, 0x0f, 0x25,
+++			    0xe0, 0x7e, 0x21, 0xc9, 0x47, 0xd1, 0x9e, 0x33,
+++			    0x76, 0xf0, 0x9b, 0x3c, 0x1e, 0x16, 0x17, 0x42 },
+++		.valid = true
+++	},
+++	{
+++		.private = { 0x5d, 0xab, 0x08, 0x7e, 0x62, 0x4a, 0x8a, 0x4b,
+++			     0x79, 0xe1, 0x7f, 0x8b, 0x83, 0x80, 0x0e, 0xe6,
+++			     0x6f, 0x3b, 0xb1, 0x29, 0x26, 0x18, 0xb6, 0xfd,
+++			     0x1c, 0x2f, 0x8b, 0x27, 0xff, 0x88, 0xe0, 0xeb },
+++		.public = { 0x85, 0x20, 0xf0, 0x09, 0x89, 0x30, 0xa7, 0x54,
+++			    0x74, 0x8b, 0x7d, 0xdc, 0xb4, 0x3e, 0xf7, 0x5a,
+++			    0x0d, 0xbf, 0x3a, 0x0d, 0x26, 0x38, 0x1a, 0xf4,
+++			    0xeb, 0xa4, 0xa9, 0x8e, 0xaa, 0x9b, 0x4e, 0x6a },
+++		.result = { 0x4a, 0x5d, 0x9d, 0x5b, 0xa4, 0xce, 0x2d, 0xe1,
+++			    0x72, 0x8e, 0x3b, 0xf4, 0x80, 0x35, 0x0f, 0x25,
+++			    0xe0, 0x7e, 0x21, 0xc9, 0x47, 0xd1, 0x9e, 0x33,
+++			    0x76, 0xf0, 0x9b, 0x3c, 0x1e, 0x16, 0x17, 0x42 },
+++		.valid = true
+++	},
+++	{
+++		.private = { 1 },
+++		.public = { 0x25, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.result = { 0x3c, 0x77, 0x77, 0xca, 0xf9, 0x97, 0xb2, 0x64,
+++			    0x41, 0x60, 0x77, 0x66, 0x5b, 0x4e, 0x22, 0x9d,
+++			    0x0b, 0x95, 0x48, 0xdc, 0x0c, 0xd8, 0x19, 0x98,
+++			    0xdd, 0xcd, 0xc5, 0xc8, 0x53, 0x3c, 0x79, 0x7f },
+++		.valid = true
+++	},
+++	{
+++		.private = { 1 },
+++		.public = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++		.result = { 0xb3, 0x2d, 0x13, 0x62, 0xc2, 0x48, 0xd6, 0x2f,
+++			    0xe6, 0x26, 0x19, 0xcf, 0xf0, 0x4d, 0xd4, 0x3d,
+++			    0xb7, 0x3f, 0xfc, 0x1b, 0x63, 0x08, 0xed, 0xe3,
+++			    0x0b, 0x78, 0xd8, 0x73, 0x80, 0xf1, 0xe8, 0x34 },
+++		.valid = true
+++	},
+++	{
+++		.private = { 0xa5, 0x46, 0xe3, 0x6b, 0xf0, 0x52, 0x7c, 0x9d,
+++			     0x3b, 0x16, 0x15, 0x4b, 0x82, 0x46, 0x5e, 0xdd,
+++			     0x62, 0x14, 0x4c, 0x0a, 0xc1, 0xfc, 0x5a, 0x18,
+++			     0x50, 0x6a, 0x22, 0x44, 0xba, 0x44, 0x9a, 0xc4 },
+++		.public = { 0xe6, 0xdb, 0x68, 0x67, 0x58, 0x30, 0x30, 0xdb,
+++			    0x35, 0x94, 0xc1, 0xa4, 0x24, 0xb1, 0x5f, 0x7c,
+++			    0x72, 0x66, 0x24, 0xec, 0x26, 0xb3, 0x35, 0x3b,
+++			    0x10, 0xa9, 0x03, 0xa6, 0xd0, 0xab, 0x1c, 0x4c },
+++		.result = { 0xc3, 0xda, 0x55, 0x37, 0x9d, 0xe9, 0xc6, 0x90,
+++			    0x8e, 0x94, 0xea, 0x4d, 0xf2, 0x8d, 0x08, 0x4f,
+++			    0x32, 0xec, 0xcf, 0x03, 0x49, 0x1c, 0x71, 0xf7,
+++			    0x54, 0xb4, 0x07, 0x55, 0x77, 0xa2, 0x85, 0x52 },
+++		.valid = true
+++	},
+++	{
+++		.private = { 1, 2, 3, 4 },
+++		.public = { 0 },
+++		.result = { 0 },
+++		.valid = false
+++	},
+++	{
+++		.private = { 2, 4, 6, 8 },
+++		.public = { 0xe0, 0xeb, 0x7a, 0x7c, 0x3b, 0x41, 0xb8, 0xae,
+++			    0x16, 0x56, 0xe3, 0xfa, 0xf1, 0x9f, 0xc4, 0x6a,
+++			    0xda, 0x09, 0x8d, 0xeb, 0x9c, 0x32, 0xb1, 0xfd,
+++			    0x86, 0x62, 0x05, 0x16, 0x5f, 0x49, 0xb8 },
+++		.result = { 0 },
+++		.valid = false
+++	},
+++	{
+++		.private = { 0xff, 0xff, 0xff, 0xff, 0x0a, 0xff, 0xff, 0xff,
+++			     0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			     0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			     0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++		.public = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0x0a, 0x00, 0xfb, 0x9f },
+++		.result = { 0x77, 0x52, 0xb6, 0x18, 0xc1, 0x2d, 0x48, 0xd2,
+++			    0xc6, 0x93, 0x46, 0x83, 0x81, 0x7c, 0xc6, 0x57,
+++			    0xf3, 0x31, 0x03, 0x19, 0x49, 0x48, 0x20, 0x05,
+++			    0x42, 0x2b, 0x4e, 0xae, 0x8d, 0x1d, 0x43, 0x23 },
+++		.valid = true
+++	},
+++	{
+++		.private = { 0x8e, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.public = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8e, 0x06 },
+++		.result = { 0x5a, 0xdf, 0xaa, 0x25, 0x86, 0x8e, 0x32, 0x3d,
+++			    0xae, 0x49, 0x62, 0xc1, 0x01, 0x5c, 0xb3, 0x12,
+++			    0xe1, 0xc5, 0xc7, 0x9e, 0x95, 0x3f, 0x03, 0x99,
+++			    0xb0, 0xba, 0x16, 0x22, 0xf3, 0xb6, 0xf7, 0x0c },
+++		.valid = true
+++	},
+++	/* wycheproof - normal case */
+++	{
+++		.private = { 0x48, 0x52, 0x83, 0x4d, 0x9d, 0x6b, 0x77, 0xda,
+++			     0xde, 0xab, 0xaa, 0xf2, 0xe1, 0x1d, 0xca, 0x66,
+++			     0xd1, 0x9f, 0xe7, 0x49, 0x93, 0xa7, 0xbe, 0xc3,
+++			     0x6c, 0x6e, 0x16, 0xa0, 0x98, 0x3f, 0xea, 0xba },
+++		.public = { 0x9c, 0x64, 0x7d, 0x9a, 0xe5, 0x89, 0xb9, 0xf5,
+++			    0x8f, 0xdc, 0x3c, 0xa4, 0x94, 0x7e, 0xfb, 0xc9,
+++			    0x15, 0xc4, 0xb2, 0xe0, 0x8e, 0x74, 0x4a, 0x0e,
+++			    0xdf, 0x46, 0x9d, 0xac, 0x59, 0xc8, 0xf8, 0x5a },
+++		.result = { 0x87, 0xb7, 0xf2, 0x12, 0xb6, 0x27, 0xf7, 0xa5,
+++			    0x4c, 0xa5, 0xe0, 0xbc, 0xda, 0xdd, 0xd5, 0x38,
+++			    0x9d, 0x9d, 0xe6, 0x15, 0x6c, 0xdb, 0xcf, 0x8e,
+++			    0xbe, 0x14, 0xff, 0xbc, 0xfb, 0x43, 0x65, 0x51 },
+++		.valid = true
+++	},
+++	/* wycheproof - public key on twist */
+++	{
+++		.private = { 0x58, 0x8c, 0x06, 0x1a, 0x50, 0x80, 0x4a, 0xc4,
+++			     0x88, 0xad, 0x77, 0x4a, 0xc7, 0x16, 0xc3, 0xf5,
+++			     0xba, 0x71, 0x4b, 0x27, 0x12, 0xe0, 0x48, 0x49,
+++			     0x13, 0x79, 0xa5, 0x00, 0x21, 0x19, 0x98, 0xa8 },
+++		.public = { 0x63, 0xaa, 0x40, 0xc6, 0xe3, 0x83, 0x46, 0xc5,
+++			    0xca, 0xf2, 0x3a, 0x6d, 0xf0, 0xa5, 0xe6, 0xc8,
+++			    0x08, 0x89, 0xa0, 0x86, 0x47, 0xe5, 0x51, 0xb3,
+++			    0x56, 0x34, 0x49, 0xbe, 0xfc, 0xfc, 0x97, 0x33 },
+++		.result = { 0xb1, 0xa7, 0x07, 0x51, 0x94, 0x95, 0xff, 0xff,
+++			    0xb2, 0x98, 0xff, 0x94, 0x17, 0x16, 0xb0, 0x6d,
+++			    0xfa, 0xb8, 0x7c, 0xf8, 0xd9, 0x11, 0x23, 0xfe,
+++			    0x2b, 0xe9, 0xa2, 0x33, 0xdd, 0xa2, 0x22, 0x12 },
+++		.valid = true
+++	},
+++	/* wycheproof - public key on twist */
+++	{
+++		.private = { 0xb0, 0x5b, 0xfd, 0x32, 0xe5, 0x53, 0x25, 0xd9,
+++			     0xfd, 0x64, 0x8c, 0xb3, 0x02, 0x84, 0x80, 0x39,
+++			     0x00, 0x0b, 0x39, 0x0e, 0x44, 0xd5, 0x21, 0xe5,
+++			     0x8a, 0xab, 0x3b, 0x29, 0xa6, 0x96, 0x0b, 0xa8 },
+++		.public = { 0x0f, 0x83, 0xc3, 0x6f, 0xde, 0xd9, 0xd3, 0x2f,
+++			    0xad, 0xf4, 0xef, 0xa3, 0xae, 0x93, 0xa9, 0x0b,
+++			    0xb5, 0xcf, 0xa6, 0x68, 0x93, 0xbc, 0x41, 0x2c,
+++			    0x43, 0xfa, 0x72, 0x87, 0xdb, 0xb9, 0x97, 0x79 },
+++		.result = { 0x67, 0xdd, 0x4a, 0x6e, 0x16, 0x55, 0x33, 0x53,
+++			    0x4c, 0x0e, 0x3f, 0x17, 0x2e, 0x4a, 0xb8, 0x57,
+++			    0x6b, 0xca, 0x92, 0x3a, 0x5f, 0x07, 0xb2, 0xc0,
+++			    0x69, 0xb4, 0xc3, 0x10, 0xff, 0x2e, 0x93, 0x5b },
+++		.valid = true
+++	},
+++	/* wycheproof - public key on twist */
+++	{
+++		.private = { 0x70, 0xe3, 0x4b, 0xcb, 0xe1, 0xf4, 0x7f, 0xbc,
+++			     0x0f, 0xdd, 0xfd, 0x7c, 0x1e, 0x1a, 0xa5, 0x3d,
+++			     0x57, 0xbf, 0xe0, 0xf6, 0x6d, 0x24, 0x30, 0x67,
+++			     0xb4, 0x24, 0xbb, 0x62, 0x10, 0xbe, 0xd1, 0x9c },
+++		.public = { 0x0b, 0x82, 0x11, 0xa2, 0xb6, 0x04, 0x90, 0x97,
+++			    0xf6, 0x87, 0x1c, 0x6c, 0x05, 0x2d, 0x3c, 0x5f,
+++			    0xc1, 0xba, 0x17, 0xda, 0x9e, 0x32, 0xae, 0x45,
+++			    0x84, 0x03, 0xb0, 0x5b, 0xb2, 0x83, 0x09, 0x2a },
+++		.result = { 0x4a, 0x06, 0x38, 0xcf, 0xaa, 0x9e, 0xf1, 0x93,
+++			    0x3b, 0x47, 0xf8, 0x93, 0x92, 0x96, 0xa6, 0xb2,
+++			    0x5b, 0xe5, 0x41, 0xef, 0x7f, 0x70, 0xe8, 0x44,
+++			    0xc0, 0xbc, 0xc0, 0x0b, 0x13, 0x4d, 0xe6, 0x4a },
+++		.valid = true
+++	},
+++	/* wycheproof - public key on twist */
+++	{
+++		.private = { 0x68, 0xc1, 0xf3, 0xa6, 0x53, 0xa4, 0xcd, 0xb1,
+++			     0xd3, 0x7b, 0xba, 0x94, 0x73, 0x8f, 0x8b, 0x95,
+++			     0x7a, 0x57, 0xbe, 0xb2, 0x4d, 0x64, 0x6e, 0x99,
+++			     0x4d, 0xc2, 0x9a, 0x27, 0x6a, 0xad, 0x45, 0x8d },
+++		.public = { 0x34, 0x3a, 0xc2, 0x0a, 0x3b, 0x9c, 0x6a, 0x27,
+++			    0xb1, 0x00, 0x81, 0x76, 0x50, 0x9a, 0xd3, 0x07,
+++			    0x35, 0x85, 0x6e, 0xc1, 0xc8, 0xd8, 0xfc, 0xae,
+++			    0x13, 0x91, 0x2d, 0x08, 0xd1, 0x52, 0xf4, 0x6c },
+++		.result = { 0x39, 0x94, 0x91, 0xfc, 0xe8, 0xdf, 0xab, 0x73,
+++			    0xb4, 0xf9, 0xf6, 0x11, 0xde, 0x8e, 0xa0, 0xb2,
+++			    0x7b, 0x28, 0xf8, 0x59, 0x94, 0x25, 0x0b, 0x0f,
+++			    0x47, 0x5d, 0x58, 0x5d, 0x04, 0x2a, 0xc2, 0x07 },
+++		.valid = true
+++	},
+++	/* wycheproof - public key on twist */
+++	{
+++		.private = { 0xd8, 0x77, 0xb2, 0x6d, 0x06, 0xdf, 0xf9, 0xd9,
+++			     0xf7, 0xfd, 0x4c, 0x5b, 0x37, 0x69, 0xf8, 0xcd,
+++			     0xd5, 0xb3, 0x05, 0x16, 0xa5, 0xab, 0x80, 0x6b,
+++			     0xe3, 0x24, 0xff, 0x3e, 0xb6, 0x9e, 0xa0, 0xb2 },
+++		.public = { 0xfa, 0x69, 0x5f, 0xc7, 0xbe, 0x8d, 0x1b, 0xe5,
+++			    0xbf, 0x70, 0x48, 0x98, 0xf3, 0x88, 0xc4, 0x52,
+++			    0xba, 0xfd, 0xd3, 0xb8, 0xea, 0xe8, 0x05, 0xf8,
+++			    0x68, 0x1a, 0x8d, 0x15, 0xc2, 0xd4, 0xe1, 0x42 },
+++		.result = { 0x2c, 0x4f, 0xe1, 0x1d, 0x49, 0x0a, 0x53, 0x86,
+++			    0x17, 0x76, 0xb1, 0x3b, 0x43, 0x54, 0xab, 0xd4,
+++			    0xcf, 0x5a, 0x97, 0x69, 0x9d, 0xb6, 0xe6, 0xc6,
+++			    0x8c, 0x16, 0x26, 0xd0, 0x76, 0x62, 0xf7, 0x58 },
+++		.valid = true
+++	},
+++	/* wycheproof - public key = 0 */
+++	{
+++		.private = { 0x20, 0x74, 0x94, 0x03, 0x8f, 0x2b, 0xb8, 0x11,
+++			     0xd4, 0x78, 0x05, 0xbc, 0xdf, 0x04, 0xa2, 0xac,
+++			     0x58, 0x5a, 0xda, 0x7f, 0x2f, 0x23, 0x38, 0x9b,
+++			     0xfd, 0x46, 0x58, 0xf9, 0xdd, 0xd4, 0xde, 0xbc },
+++		.public = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.result = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.valid = false
+++	},
+++	/* wycheproof - public key = 1 */
+++	{
+++		.private = { 0x20, 0x2e, 0x89, 0x72, 0xb6, 0x1c, 0x7e, 0x61,
+++			     0x93, 0x0e, 0xb9, 0x45, 0x0b, 0x50, 0x70, 0xea,
+++			     0xe1, 0xc6, 0x70, 0x47, 0x56, 0x85, 0x54, 0x1f,
+++			     0x04, 0x76, 0x21, 0x7e, 0x48, 0x18, 0xcf, 0xab },
+++		.public = { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.result = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.valid = false
+++	},
+++	/* wycheproof - edge case on twist */
+++	{
+++		.private = { 0x38, 0xdd, 0xe9, 0xf3, 0xe7, 0xb7, 0x99, 0x04,
+++			     0x5f, 0x9a, 0xc3, 0x79, 0x3d, 0x4a, 0x92, 0x77,
+++			     0xda, 0xde, 0xad, 0xc4, 0x1b, 0xec, 0x02, 0x90,
+++			     0xf8, 0x1f, 0x74, 0x4f, 0x73, 0x77, 0x5f, 0x84 },
+++		.public = { 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.result = { 0x9a, 0x2c, 0xfe, 0x84, 0xff, 0x9c, 0x4a, 0x97,
+++			    0x39, 0x62, 0x5c, 0xae, 0x4a, 0x3b, 0x82, 0xa9,
+++			    0x06, 0x87, 0x7a, 0x44, 0x19, 0x46, 0xf8, 0xd7,
+++			    0xb3, 0xd7, 0x95, 0xfe, 0x8f, 0x5d, 0x16, 0x39 },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case on twist */
+++	{
+++		.private = { 0x98, 0x57, 0xa9, 0x14, 0xe3, 0xc2, 0x90, 0x36,
+++			     0xfd, 0x9a, 0x44, 0x2b, 0xa5, 0x26, 0xb5, 0xcd,
+++			     0xcd, 0xf2, 0x82, 0x16, 0x15, 0x3e, 0x63, 0x6c,
+++			     0x10, 0x67, 0x7a, 0xca, 0xb6, 0xbd, 0x6a, 0xa5 },
+++		.public = { 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.result = { 0x4d, 0xa4, 0xe0, 0xaa, 0x07, 0x2c, 0x23, 0x2e,
+++			    0xe2, 0xf0, 0xfa, 0x4e, 0x51, 0x9a, 0xe5, 0x0b,
+++			    0x52, 0xc1, 0xed, 0xd0, 0x8a, 0x53, 0x4d, 0x4e,
+++			    0xf3, 0x46, 0xc2, 0xe1, 0x06, 0xd2, 0x1d, 0x60 },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case on twist */
+++	{
+++		.private = { 0x48, 0xe2, 0x13, 0x0d, 0x72, 0x33, 0x05, 0xed,
+++			     0x05, 0xe6, 0xe5, 0x89, 0x4d, 0x39, 0x8a, 0x5e,
+++			     0x33, 0x36, 0x7a, 0x8c, 0x6a, 0xac, 0x8f, 0xcd,
+++			     0xf0, 0xa8, 0x8e, 0x4b, 0x42, 0x82, 0x0d, 0xb7 },
+++		.public = { 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0xf8, 0xff,
+++			    0xff, 0x1f, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff,
+++			    0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x07, 0x00,
+++			    0x00, 0xf0, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00 },
+++		.result = { 0x9e, 0xd1, 0x0c, 0x53, 0x74, 0x7f, 0x64, 0x7f,
+++			    0x82, 0xf4, 0x51, 0x25, 0xd3, 0xde, 0x15, 0xa1,
+++			    0xe6, 0xb8, 0x24, 0x49, 0x6a, 0xb4, 0x04, 0x10,
+++			    0xff, 0xcc, 0x3c, 0xfe, 0x95, 0x76, 0x0f, 0x3b },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case on twist */
+++	{
+++		.private = { 0x28, 0xf4, 0x10, 0x11, 0x69, 0x18, 0x51, 0xb3,
+++			     0xa6, 0x2b, 0x64, 0x15, 0x53, 0xb3, 0x0d, 0x0d,
+++			     0xfd, 0xdc, 0xb8, 0xff, 0xfc, 0xf5, 0x37, 0x00,
+++			     0xa7, 0xbe, 0x2f, 0x6a, 0x87, 0x2e, 0x9f, 0xb0 },
+++		.public = { 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0x07, 0x00,
+++			    0x00, 0xe0, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00,
+++			    0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0xf8, 0xff,
+++			    0xff, 0x0f, 0x00, 0x00, 0xc0, 0xff, 0xff, 0x7f },
+++		.result = { 0xcf, 0x72, 0xb4, 0xaa, 0x6a, 0xa1, 0xc9, 0xf8,
+++			    0x94, 0xf4, 0x16, 0x5b, 0x86, 0x10, 0x9a, 0xa4,
+++			    0x68, 0x51, 0x76, 0x48, 0xe1, 0xf0, 0xcc, 0x70,
+++			    0xe1, 0xab, 0x08, 0x46, 0x01, 0x76, 0x50, 0x6b },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case on twist */
+++	{
+++		.private = { 0x18, 0xa9, 0x3b, 0x64, 0x99, 0xb9, 0xf6, 0xb3,
+++			     0x22, 0x5c, 0xa0, 0x2f, 0xef, 0x41, 0x0e, 0x0a,
+++			     0xde, 0xc2, 0x35, 0x32, 0x32, 0x1d, 0x2d, 0x8e,
+++			     0xf1, 0xa6, 0xd6, 0x02, 0xa8, 0xc6, 0x5b, 0x83 },
+++		.public = { 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++			    0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++			    0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+++			    0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f },
+++		.result = { 0x5d, 0x50, 0xb6, 0x28, 0x36, 0xbb, 0x69, 0x57,
+++			    0x94, 0x10, 0x38, 0x6c, 0xf7, 0xbb, 0x81, 0x1c,
+++			    0x14, 0xbf, 0x85, 0xb1, 0xc7, 0xb1, 0x7e, 0x59,
+++			    0x24, 0xc7, 0xff, 0xea, 0x91, 0xef, 0x9e, 0x12 },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case on twist */
+++	{
+++		.private = { 0xc0, 0x1d, 0x13, 0x05, 0xa1, 0x33, 0x8a, 0x1f,
+++			     0xca, 0xc2, 0xba, 0x7e, 0x2e, 0x03, 0x2b, 0x42,
+++			     0x7e, 0x0b, 0x04, 0x90, 0x31, 0x65, 0xac, 0xa9,
+++			     0x57, 0xd8, 0xd0, 0x55, 0x3d, 0x87, 0x17, 0xb0 },
+++		.public = { 0xea, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++		.result = { 0x19, 0x23, 0x0e, 0xb1, 0x48, 0xd5, 0xd6, 0x7c,
+++			    0x3c, 0x22, 0xab, 0x1d, 0xae, 0xff, 0x80, 0xa5,
+++			    0x7e, 0xae, 0x42, 0x65, 0xce, 0x28, 0x72, 0x65,
+++			    0x7b, 0x2c, 0x80, 0x99, 0xfc, 0x69, 0x8e, 0x50 },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for public key */
+++	{
+++		.private = { 0x38, 0x6f, 0x7f, 0x16, 0xc5, 0x07, 0x31, 0xd6,
+++			     0x4f, 0x82, 0xe6, 0xa1, 0x70, 0xb1, 0x42, 0xa4,
+++			     0xe3, 0x4f, 0x31, 0xfd, 0x77, 0x68, 0xfc, 0xb8,
+++			     0x90, 0x29, 0x25, 0xe7, 0xd1, 0xe2, 0x1a, 0xbe },
+++		.public = { 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.result = { 0x0f, 0xca, 0xb5, 0xd8, 0x42, 0xa0, 0x78, 0xd7,
+++			    0xa7, 0x1f, 0xc5, 0x9b, 0x57, 0xbf, 0xb4, 0xca,
+++			    0x0b, 0xe6, 0x87, 0x3b, 0x49, 0xdc, 0xdb, 0x9f,
+++			    0x44, 0xe1, 0x4a, 0xe8, 0xfb, 0xdf, 0xa5, 0x42 },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for public key */
+++	{
+++		.private = { 0xe0, 0x23, 0xa2, 0x89, 0xbd, 0x5e, 0x90, 0xfa,
+++			     0x28, 0x04, 0xdd, 0xc0, 0x19, 0xa0, 0x5e, 0xf3,
+++			     0xe7, 0x9d, 0x43, 0x4b, 0xb6, 0xea, 0x2f, 0x52,
+++			     0x2e, 0xcb, 0x64, 0x3a, 0x75, 0x29, 0x6e, 0x95 },
+++		.public = { 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++			    0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++			    0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++			    0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 },
+++		.result = { 0x54, 0xce, 0x8f, 0x22, 0x75, 0xc0, 0x77, 0xe3,
+++			    0xb1, 0x30, 0x6a, 0x39, 0x39, 0xc5, 0xe0, 0x3e,
+++			    0xef, 0x6b, 0xbb, 0x88, 0x06, 0x05, 0x44, 0x75,
+++			    0x8d, 0x9f, 0xef, 0x59, 0xb0, 0xbc, 0x3e, 0x4f },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for public key */
+++	{
+++		.private = { 0x68, 0xf0, 0x10, 0xd6, 0x2e, 0xe8, 0xd9, 0x26,
+++			     0x05, 0x3a, 0x36, 0x1c, 0x3a, 0x75, 0xc6, 0xea,
+++			     0x4e, 0xbd, 0xc8, 0x60, 0x6a, 0xb2, 0x85, 0x00,
+++			     0x3a, 0x6f, 0x8f, 0x40, 0x76, 0xb0, 0x1e, 0x83 },
+++		.public = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x03 },
+++		.result = { 0xf1, 0x36, 0x77, 0x5c, 0x5b, 0xeb, 0x0a, 0xf8,
+++			    0x11, 0x0a, 0xf1, 0x0b, 0x20, 0x37, 0x23, 0x32,
+++			    0x04, 0x3c, 0xab, 0x75, 0x24, 0x19, 0x67, 0x87,
+++			    0x75, 0xa2, 0x23, 0xdf, 0x57, 0xc9, 0xd3, 0x0d },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for public key */
+++	{
+++		.private = { 0x58, 0xeb, 0xcb, 0x35, 0xb0, 0xf8, 0x84, 0x5c,
+++			     0xaf, 0x1e, 0xc6, 0x30, 0xf9, 0x65, 0x76, 0xb6,
+++			     0x2c, 0x4b, 0x7b, 0x6c, 0x36, 0xb2, 0x9d, 0xeb,
+++			     0x2c, 0xb0, 0x08, 0x46, 0x51, 0x75, 0x5c, 0x96 },
+++		.public = { 0xff, 0xff, 0xff, 0xfb, 0xff, 0xff, 0xfb, 0xff,
+++			    0xff, 0xdf, 0xff, 0xff, 0xdf, 0xff, 0xff, 0xff,
+++			    0xfe, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xf7, 0xff,
+++			    0xff, 0xf7, 0xff, 0xff, 0xbf, 0xff, 0xff, 0x3f },
+++		.result = { 0xbf, 0x9a, 0xff, 0xd0, 0x6b, 0x84, 0x40, 0x85,
+++			    0x58, 0x64, 0x60, 0x96, 0x2e, 0xf2, 0x14, 0x6f,
+++			    0xf3, 0xd4, 0x53, 0x3d, 0x94, 0x44, 0xaa, 0xb0,
+++			    0x06, 0xeb, 0x88, 0xcc, 0x30, 0x54, 0x40, 0x7d },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for public key */
+++	{
+++		.private = { 0x18, 0x8c, 0x4b, 0xc5, 0xb9, 0xc4, 0x4b, 0x38,
+++			     0xbb, 0x65, 0x8b, 0x9b, 0x2a, 0xe8, 0x2d, 0x5b,
+++			     0x01, 0x01, 0x5e, 0x09, 0x31, 0x84, 0xb1, 0x7c,
+++			     0xb7, 0x86, 0x35, 0x03, 0xa7, 0x83, 0xe1, 0xbb },
+++		.public = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f },
+++		.result = { 0xd4, 0x80, 0xde, 0x04, 0xf6, 0x99, 0xcb, 0x3b,
+++			    0xe0, 0x68, 0x4a, 0x9c, 0xc2, 0xe3, 0x12, 0x81,
+++			    0xea, 0x0b, 0xc5, 0xa9, 0xdc, 0xc1, 0x57, 0xd3,
+++			    0xd2, 0x01, 0x58, 0xd4, 0x6c, 0xa5, 0x24, 0x6d },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for public key */
+++	{
+++		.private = { 0xe0, 0x6c, 0x11, 0xbb, 0x2e, 0x13, 0xce, 0x3d,
+++			     0xc7, 0x67, 0x3f, 0x67, 0xf5, 0x48, 0x22, 0x42,
+++			     0x90, 0x94, 0x23, 0xa9, 0xae, 0x95, 0xee, 0x98,
+++			     0x6a, 0x98, 0x8d, 0x98, 0xfa, 0xee, 0x23, 0xa2 },
+++		.public = { 0xff, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0x7f,
+++			    0xff, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0x7f,
+++			    0xff, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0x7f,
+++			    0xff, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0x7f },
+++		.result = { 0x4c, 0x44, 0x01, 0xcc, 0xe6, 0xb5, 0x1e, 0x4c,
+++			    0xb1, 0x8f, 0x27, 0x90, 0x24, 0x6c, 0x9b, 0xf9,
+++			    0x14, 0xdb, 0x66, 0x77, 0x50, 0xa1, 0xcb, 0x89,
+++			    0x06, 0x90, 0x92, 0xaf, 0x07, 0x29, 0x22, 0x76 },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for public key */
+++	{
+++		.private = { 0xc0, 0x65, 0x8c, 0x46, 0xdd, 0xe1, 0x81, 0x29,
+++			     0x29, 0x38, 0x77, 0x53, 0x5b, 0x11, 0x62, 0xb6,
+++			     0xf9, 0xf5, 0x41, 0x4a, 0x23, 0xcf, 0x4d, 0x2c,
+++			     0xbc, 0x14, 0x0a, 0x4d, 0x99, 0xda, 0x2b, 0x8f },
+++		.public = { 0xeb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++		.result = { 0x57, 0x8b, 0xa8, 0xcc, 0x2d, 0xbd, 0xc5, 0x75,
+++			    0xaf, 0xcf, 0x9d, 0xf2, 0xb3, 0xee, 0x61, 0x89,
+++			    0xf5, 0x33, 0x7d, 0x68, 0x54, 0xc7, 0x9b, 0x4c,
+++			    0xe1, 0x65, 0xea, 0x12, 0x29, 0x3b, 0x3a, 0x0f },
+++		.valid = true
+++	},
+++	/* wycheproof - public key with low order */
+++	{
+++		.private = { 0x10, 0x25, 0x5c, 0x92, 0x30, 0xa9, 0x7a, 0x30,
+++			     0xa4, 0x58, 0xca, 0x28, 0x4a, 0x62, 0x96, 0x69,
+++			     0x29, 0x3a, 0x31, 0x89, 0x0c, 0xda, 0x9d, 0x14,
+++			     0x7f, 0xeb, 0xc7, 0xd1, 0xe2, 0x2d, 0x6b, 0xb1 },
+++		.public = { 0xe0, 0xeb, 0x7a, 0x7c, 0x3b, 0x41, 0xb8, 0xae,
+++			    0x16, 0x56, 0xe3, 0xfa, 0xf1, 0x9f, 0xc4, 0x6a,
+++			    0xda, 0x09, 0x8d, 0xeb, 0x9c, 0x32, 0xb1, 0xfd,
+++			    0x86, 0x62, 0x05, 0x16, 0x5f, 0x49, 0xb8, 0x00 },
+++		.result = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.valid = false
+++	},
+++	/* wycheproof - public key with low order */
+++	{
+++		.private = { 0x78, 0xf1, 0xe8, 0xed, 0xf1, 0x44, 0x81, 0xb3,
+++			     0x89, 0x44, 0x8d, 0xac, 0x8f, 0x59, 0xc7, 0x0b,
+++			     0x03, 0x8e, 0x7c, 0xf9, 0x2e, 0xf2, 0xc7, 0xef,
+++			     0xf5, 0x7a, 0x72, 0x46, 0x6e, 0x11, 0x52, 0x96 },
+++		.public = { 0x5f, 0x9c, 0x95, 0xbc, 0xa3, 0x50, 0x8c, 0x24,
+++			    0xb1, 0xd0, 0xb1, 0x55, 0x9c, 0x83, 0xef, 0x5b,
+++			    0x04, 0x44, 0x5c, 0xc4, 0x58, 0x1c, 0x8e, 0x86,
+++			    0xd8, 0x22, 0x4e, 0xdd, 0xd0, 0x9f, 0x11, 0x57 },
+++		.result = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.valid = false
+++	},
+++	/* wycheproof - public key with low order */
+++	{
+++		.private = { 0xa0, 0xa0, 0x5a, 0x3e, 0x8f, 0x9f, 0x44, 0x20,
+++			     0x4d, 0x5f, 0x80, 0x59, 0xa9, 0x4a, 0xc7, 0xdf,
+++			     0xc3, 0x9a, 0x49, 0xac, 0x01, 0x6d, 0xd7, 0x43,
+++			     0xdb, 0xfa, 0x43, 0xc5, 0xd6, 0x71, 0xfd, 0x88 },
+++		.public = { 0xec, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++		.result = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.valid = false
+++	},
+++	/* wycheproof - public key with low order */
+++	{
+++		.private = { 0xd0, 0xdb, 0xb3, 0xed, 0x19, 0x06, 0x66, 0x3f,
+++			     0x15, 0x42, 0x0a, 0xf3, 0x1f, 0x4e, 0xaf, 0x65,
+++			     0x09, 0xd9, 0xa9, 0x94, 0x97, 0x23, 0x50, 0x06,
+++			     0x05, 0xad, 0x7c, 0x1c, 0x6e, 0x74, 0x50, 0xa9 },
+++		.public = { 0xed, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++		.result = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.valid = false
+++	},
+++	/* wycheproof - public key with low order */
+++	{
+++		.private = { 0xc0, 0xb1, 0xd0, 0xeb, 0x22, 0xb2, 0x44, 0xfe,
+++			     0x32, 0x91, 0x14, 0x00, 0x72, 0xcd, 0xd9, 0xd9,
+++			     0x89, 0xb5, 0xf0, 0xec, 0xd9, 0x6c, 0x10, 0x0f,
+++			     0xeb, 0x5b, 0xca, 0x24, 0x1c, 0x1d, 0x9f, 0x8f },
+++		.public = { 0xee, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++		.result = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.valid = false
+++	},
+++	/* wycheproof - public key with low order */
+++	{
+++		.private = { 0x48, 0x0b, 0xf4, 0x5f, 0x59, 0x49, 0x42, 0xa8,
+++			     0xbc, 0x0f, 0x33, 0x53, 0xc6, 0xe8, 0xb8, 0x85,
+++			     0x3d, 0x77, 0xf3, 0x51, 0xf1, 0xc2, 0xca, 0x6c,
+++			     0x2d, 0x1a, 0xbf, 0x8a, 0x00, 0xb4, 0x22, 0x9c },
+++		.public = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80 },
+++		.result = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.valid = false
+++	},
+++	/* wycheproof - public key with low order */
+++	{
+++		.private = { 0x30, 0xf9, 0x93, 0xfc, 0xf8, 0x51, 0x4f, 0xc8,
+++			     0x9b, 0xd8, 0xdb, 0x14, 0xcd, 0x43, 0xba, 0x0d,
+++			     0x4b, 0x25, 0x30, 0xe7, 0x3c, 0x42, 0x76, 0xa0,
+++			     0x5e, 0x1b, 0x14, 0x5d, 0x42, 0x0c, 0xed, 0xb4 },
+++		.public = { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80 },
+++		.result = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.valid = false
+++	},
+++	/* wycheproof - public key with low order */
+++	{
+++		.private = { 0xc0, 0x49, 0x74, 0xb7, 0x58, 0x38, 0x0e, 0x2a,
+++			     0x5b, 0x5d, 0xf6, 0xeb, 0x09, 0xbb, 0x2f, 0x6b,
+++			     0x34, 0x34, 0xf9, 0x82, 0x72, 0x2a, 0x8e, 0x67,
+++			     0x6d, 0x3d, 0xa2, 0x51, 0xd1, 0xb3, 0xde, 0x83 },
+++		.public = { 0xe0, 0xeb, 0x7a, 0x7c, 0x3b, 0x41, 0xb8, 0xae,
+++			    0x16, 0x56, 0xe3, 0xfa, 0xf1, 0x9f, 0xc4, 0x6a,
+++			    0xda, 0x09, 0x8d, 0xeb, 0x9c, 0x32, 0xb1, 0xfd,
+++			    0x86, 0x62, 0x05, 0x16, 0x5f, 0x49, 0xb8, 0x80 },
+++		.result = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.valid = false
+++	},
+++	/* wycheproof - public key with low order */
+++	{
+++		.private = { 0x50, 0x2a, 0x31, 0x37, 0x3d, 0xb3, 0x24, 0x46,
+++			     0x84, 0x2f, 0xe5, 0xad, 0xd3, 0xe0, 0x24, 0x02,
+++			     0x2e, 0xa5, 0x4f, 0x27, 0x41, 0x82, 0xaf, 0xc3,
+++			     0xd9, 0xf1, 0xbb, 0x3d, 0x39, 0x53, 0x4e, 0xb5 },
+++		.public = { 0x5f, 0x9c, 0x95, 0xbc, 0xa3, 0x50, 0x8c, 0x24,
+++			    0xb1, 0xd0, 0xb1, 0x55, 0x9c, 0x83, 0xef, 0x5b,
+++			    0x04, 0x44, 0x5c, 0xc4, 0x58, 0x1c, 0x8e, 0x86,
+++			    0xd8, 0x22, 0x4e, 0xdd, 0xd0, 0x9f, 0x11, 0xd7 },
+++		.result = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.valid = false
+++	},
+++	/* wycheproof - public key with low order */
+++	{
+++		.private = { 0x90, 0xfa, 0x64, 0x17, 0xb0, 0xe3, 0x70, 0x30,
+++			     0xfd, 0x6e, 0x43, 0xef, 0xf2, 0xab, 0xae, 0xf1,
+++			     0x4c, 0x67, 0x93, 0x11, 0x7a, 0x03, 0x9c, 0xf6,
+++			     0x21, 0x31, 0x8b, 0xa9, 0x0f, 0x4e, 0x98, 0xbe },
+++		.public = { 0xec, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++		.result = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.valid = false
+++	},
+++	/* wycheproof - public key with low order */
+++	{
+++		.private = { 0x78, 0xad, 0x3f, 0x26, 0x02, 0x7f, 0x1c, 0x9f,
+++			     0xdd, 0x97, 0x5a, 0x16, 0x13, 0xb9, 0x47, 0x77,
+++			     0x9b, 0xad, 0x2c, 0xf2, 0xb7, 0x41, 0xad, 0xe0,
+++			     0x18, 0x40, 0x88, 0x5a, 0x30, 0xbb, 0x97, 0x9c },
+++		.public = { 0xed, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++		.result = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.valid = false
+++	},
+++	/* wycheproof - public key with low order */
+++	{
+++		.private = { 0x98, 0xe2, 0x3d, 0xe7, 0xb1, 0xe0, 0x92, 0x6e,
+++			     0xd9, 0xc8, 0x7e, 0x7b, 0x14, 0xba, 0xf5, 0x5f,
+++			     0x49, 0x7a, 0x1d, 0x70, 0x96, 0xf9, 0x39, 0x77,
+++			     0x68, 0x0e, 0x44, 0xdc, 0x1c, 0x7b, 0x7b, 0x8b },
+++		.public = { 0xee, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++		.result = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.valid = false
+++	},
+++	/* wycheproof - public key >= p */
+++	{
+++		.private = { 0xf0, 0x1e, 0x48, 0xda, 0xfa, 0xc9, 0xd7, 0xbc,
+++			     0xf5, 0x89, 0xcb, 0xc3, 0x82, 0xc8, 0x78, 0xd1,
+++			     0x8b, 0xda, 0x35, 0x50, 0x58, 0x9f, 0xfb, 0x5d,
+++			     0x50, 0xb5, 0x23, 0xbe, 0xbe, 0x32, 0x9d, 0xae },
+++		.public = { 0xef, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++		.result = { 0xbd, 0x36, 0xa0, 0x79, 0x0e, 0xb8, 0x83, 0x09,
+++			    0x8c, 0x98, 0x8b, 0x21, 0x78, 0x67, 0x73, 0xde,
+++			    0x0b, 0x3a, 0x4d, 0xf1, 0x62, 0x28, 0x2c, 0xf1,
+++			    0x10, 0xde, 0x18, 0xdd, 0x48, 0x4c, 0xe7, 0x4b },
+++		.valid = true
+++	},
+++	/* wycheproof - public key >= p */
+++	{
+++		.private = { 0x28, 0x87, 0x96, 0xbc, 0x5a, 0xff, 0x4b, 0x81,
+++			     0xa3, 0x75, 0x01, 0x75, 0x7b, 0xc0, 0x75, 0x3a,
+++			     0x3c, 0x21, 0x96, 0x47, 0x90, 0xd3, 0x86, 0x99,
+++			     0x30, 0x8d, 0xeb, 0xc1, 0x7a, 0x6e, 0xaf, 0x8d },
+++		.public = { 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++		.result = { 0xb4, 0xe0, 0xdd, 0x76, 0xda, 0x7b, 0x07, 0x17,
+++			    0x28, 0xb6, 0x1f, 0x85, 0x67, 0x71, 0xaa, 0x35,
+++			    0x6e, 0x57, 0xed, 0xa7, 0x8a, 0x5b, 0x16, 0x55,
+++			    0xcc, 0x38, 0x20, 0xfb, 0x5f, 0x85, 0x4c, 0x5c },
+++		.valid = true
+++	},
+++	/* wycheproof - public key >= p */
+++	{
+++		.private = { 0x98, 0xdf, 0x84, 0x5f, 0x66, 0x51, 0xbf, 0x11,
+++			     0x38, 0x22, 0x1f, 0x11, 0x90, 0x41, 0xf7, 0x2b,
+++			     0x6d, 0xbc, 0x3c, 0x4a, 0xce, 0x71, 0x43, 0xd9,
+++			     0x9f, 0xd5, 0x5a, 0xd8, 0x67, 0x48, 0x0d, 0xa8 },
+++		.public = { 0xf1, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++		.result = { 0x6f, 0xdf, 0x6c, 0x37, 0x61, 0x1d, 0xbd, 0x53,
+++			    0x04, 0xdc, 0x0f, 0x2e, 0xb7, 0xc9, 0x51, 0x7e,
+++			    0xb3, 0xc5, 0x0e, 0x12, 0xfd, 0x05, 0x0a, 0xc6,
+++			    0xde, 0xc2, 0x70, 0x71, 0xd4, 0xbf, 0xc0, 0x34 },
+++		.valid = true
+++	},
+++	/* wycheproof - public key >= p */
+++	{
+++		.private = { 0xf0, 0x94, 0x98, 0xe4, 0x6f, 0x02, 0xf8, 0x78,
+++			     0x82, 0x9e, 0x78, 0xb8, 0x03, 0xd3, 0x16, 0xa2,
+++			     0xed, 0x69, 0x5d, 0x04, 0x98, 0xa0, 0x8a, 0xbd,
+++			     0xf8, 0x27, 0x69, 0x30, 0xe2, 0x4e, 0xdc, 0xb0 },
+++		.public = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++		.result = { 0x4c, 0x8f, 0xc4, 0xb1, 0xc6, 0xab, 0x88, 0xfb,
+++			    0x21, 0xf1, 0x8f, 0x6d, 0x4c, 0x81, 0x02, 0x40,
+++			    0xd4, 0xe9, 0x46, 0x51, 0xba, 0x44, 0xf7, 0xa2,
+++			    0xc8, 0x63, 0xce, 0xc7, 0xdc, 0x56, 0x60, 0x2d },
+++		.valid = true
+++	},
+++	/* wycheproof - public key >= p */
+++	{
+++		.private = { 0x18, 0x13, 0xc1, 0x0a, 0x5c, 0x7f, 0x21, 0xf9,
+++			     0x6e, 0x17, 0xf2, 0x88, 0xc0, 0xcc, 0x37, 0x60,
+++			     0x7c, 0x04, 0xc5, 0xf5, 0xae, 0xa2, 0xdb, 0x13,
+++			     0x4f, 0x9e, 0x2f, 0xfc, 0x66, 0xbd, 0x9d, 0xb8 },
+++		.public = { 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80 },
+++		.result = { 0x1c, 0xd0, 0xb2, 0x82, 0x67, 0xdc, 0x54, 0x1c,
+++			    0x64, 0x2d, 0x6d, 0x7d, 0xca, 0x44, 0xa8, 0xb3,
+++			    0x8a, 0x63, 0x73, 0x6e, 0xef, 0x5c, 0x4e, 0x65,
+++			    0x01, 0xff, 0xbb, 0xb1, 0x78, 0x0c, 0x03, 0x3c },
+++		.valid = true
+++	},
+++	/* wycheproof - public key >= p */
+++	{
+++		.private = { 0x78, 0x57, 0xfb, 0x80, 0x86, 0x53, 0x64, 0x5a,
+++			     0x0b, 0xeb, 0x13, 0x8a, 0x64, 0xf5, 0xf4, 0xd7,
+++			     0x33, 0xa4, 0x5e, 0xa8, 0x4c, 0x3c, 0xda, 0x11,
+++			     0xa9, 0xc0, 0x6f, 0x7e, 0x71, 0x39, 0x14, 0x9e },
+++		.public = { 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80 },
+++		.result = { 0x87, 0x55, 0xbe, 0x01, 0xc6, 0x0a, 0x7e, 0x82,
+++			    0x5c, 0xff, 0x3e, 0x0e, 0x78, 0xcb, 0x3a, 0xa4,
+++			    0x33, 0x38, 0x61, 0x51, 0x6a, 0xa5, 0x9b, 0x1c,
+++			    0x51, 0xa8, 0xb2, 0xa5, 0x43, 0xdf, 0xa8, 0x22 },
+++		.valid = true
+++	},
+++	/* wycheproof - public key >= p */
+++	{
+++		.private = { 0xe0, 0x3a, 0xa8, 0x42, 0xe2, 0xab, 0xc5, 0x6e,
+++			     0x81, 0xe8, 0x7b, 0x8b, 0x9f, 0x41, 0x7b, 0x2a,
+++			     0x1e, 0x59, 0x13, 0xc7, 0x23, 0xee, 0xd2, 0x8d,
+++			     0x75, 0x2f, 0x8d, 0x47, 0xa5, 0x9f, 0x49, 0x8f },
+++		.public = { 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80 },
+++		.result = { 0x54, 0xc9, 0xa1, 0xed, 0x95, 0xe5, 0x46, 0xd2,
+++			    0x78, 0x22, 0xa3, 0x60, 0x93, 0x1d, 0xda, 0x60,
+++			    0xa1, 0xdf, 0x04, 0x9d, 0xa6, 0xf9, 0x04, 0x25,
+++			    0x3c, 0x06, 0x12, 0xbb, 0xdc, 0x08, 0x74, 0x76 },
+++		.valid = true
+++	},
+++	/* wycheproof - public key >= p */
+++	{
+++		.private = { 0xf8, 0xf7, 0x07, 0xb7, 0x99, 0x9b, 0x18, 0xcb,
+++			     0x0d, 0x6b, 0x96, 0x12, 0x4f, 0x20, 0x45, 0x97,
+++			     0x2c, 0xa2, 0x74, 0xbf, 0xc1, 0x54, 0xad, 0x0c,
+++			     0x87, 0x03, 0x8c, 0x24, 0xc6, 0xd0, 0xd4, 0xb2 },
+++		.public = { 0xda, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++		.result = { 0xcc, 0x1f, 0x40, 0xd7, 0x43, 0xcd, 0xc2, 0x23,
+++			    0x0e, 0x10, 0x43, 0xda, 0xba, 0x8b, 0x75, 0xe8,
+++			    0x10, 0xf1, 0xfb, 0xab, 0x7f, 0x25, 0x52, 0x69,
+++			    0xbd, 0x9e, 0xbb, 0x29, 0xe6, 0xbf, 0x49, 0x4f },
+++		.valid = true
+++	},
+++	/* wycheproof - public key >= p */
+++	{
+++		.private = { 0xa0, 0x34, 0xf6, 0x84, 0xfa, 0x63, 0x1e, 0x1a,
+++			     0x34, 0x81, 0x18, 0xc1, 0xce, 0x4c, 0x98, 0x23,
+++			     0x1f, 0x2d, 0x9e, 0xec, 0x9b, 0xa5, 0x36, 0x5b,
+++			     0x4a, 0x05, 0xd6, 0x9a, 0x78, 0x5b, 0x07, 0x96 },
+++		.public = { 0xdb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++		.result = { 0x54, 0x99, 0x8e, 0xe4, 0x3a, 0x5b, 0x00, 0x7b,
+++			    0xf4, 0x99, 0xf0, 0x78, 0xe7, 0x36, 0x52, 0x44,
+++			    0x00, 0xa8, 0xb5, 0xc7, 0xe9, 0xb9, 0xb4, 0x37,
+++			    0x71, 0x74, 0x8c, 0x7c, 0xdf, 0x88, 0x04, 0x12 },
+++		.valid = true
+++	},
+++	/* wycheproof - public key >= p */
+++	{
+++		.private = { 0x30, 0xb6, 0xc6, 0xa0, 0xf2, 0xff, 0xa6, 0x80,
+++			     0x76, 0x8f, 0x99, 0x2b, 0xa8, 0x9e, 0x15, 0x2d,
+++			     0x5b, 0xc9, 0x89, 0x3d, 0x38, 0xc9, 0x11, 0x9b,
+++			     0xe4, 0xf7, 0x67, 0xbf, 0xab, 0x6e, 0x0c, 0xa5 },
+++		.public = { 0xdc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++		.result = { 0xea, 0xd9, 0xb3, 0x8e, 0xfd, 0xd7, 0x23, 0x63,
+++			    0x79, 0x34, 0xe5, 0x5a, 0xb7, 0x17, 0xa7, 0xae,
+++			    0x09, 0xeb, 0x86, 0xa2, 0x1d, 0xc3, 0x6a, 0x3f,
+++			    0xee, 0xb8, 0x8b, 0x75, 0x9e, 0x39, 0x1e, 0x09 },
+++		.valid = true
+++	},
+++	/* wycheproof - public key >= p */
+++	{
+++		.private = { 0x90, 0x1b, 0x9d, 0xcf, 0x88, 0x1e, 0x01, 0xe0,
+++			     0x27, 0x57, 0x50, 0x35, 0xd4, 0x0b, 0x43, 0xbd,
+++			     0xc1, 0xc5, 0x24, 0x2e, 0x03, 0x08, 0x47, 0x49,
+++			     0x5b, 0x0c, 0x72, 0x86, 0x46, 0x9b, 0x65, 0x91 },
+++		.public = { 0xea, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++		.result = { 0x60, 0x2f, 0xf4, 0x07, 0x89, 0xb5, 0x4b, 0x41,
+++			    0x80, 0x59, 0x15, 0xfe, 0x2a, 0x62, 0x21, 0xf0,
+++			    0x7a, 0x50, 0xff, 0xc2, 0xc3, 0xfc, 0x94, 0xcf,
+++			    0x61, 0xf1, 0x3d, 0x79, 0x04, 0xe8, 0x8e, 0x0e },
+++		.valid = true
+++	},
+++	/* wycheproof - public key >= p */
+++	{
+++		.private = { 0x80, 0x46, 0x67, 0x7c, 0x28, 0xfd, 0x82, 0xc9,
+++			     0xa1, 0xbd, 0xb7, 0x1a, 0x1a, 0x1a, 0x34, 0xfa,
+++			     0xba, 0x12, 0x25, 0xe2, 0x50, 0x7f, 0xe3, 0xf5,
+++			     0x4d, 0x10, 0xbd, 0x5b, 0x0d, 0x86, 0x5f, 0x8e },
+++		.public = { 0xeb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++		.result = { 0xe0, 0x0a, 0xe8, 0xb1, 0x43, 0x47, 0x12, 0x47,
+++			    0xba, 0x24, 0xf1, 0x2c, 0x88, 0x55, 0x36, 0xc3,
+++			    0xcb, 0x98, 0x1b, 0x58, 0xe1, 0xe5, 0x6b, 0x2b,
+++			    0xaf, 0x35, 0xc1, 0x2a, 0xe1, 0xf7, 0x9c, 0x26 },
+++		.valid = true
+++	},
+++	/* wycheproof - public key >= p */
+++	{
+++		.private = { 0x60, 0x2f, 0x7e, 0x2f, 0x68, 0xa8, 0x46, 0xb8,
+++			     0x2c, 0xc2, 0x69, 0xb1, 0xd4, 0x8e, 0x93, 0x98,
+++			     0x86, 0xae, 0x54, 0xfd, 0x63, 0x6c, 0x1f, 0xe0,
+++			     0x74, 0xd7, 0x10, 0x12, 0x7d, 0x47, 0x24, 0x91 },
+++		.public = { 0xef, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++		.result = { 0x98, 0xcb, 0x9b, 0x50, 0xdd, 0x3f, 0xc2, 0xb0,
+++			    0xd4, 0xf2, 0xd2, 0xbf, 0x7c, 0x5c, 0xfd, 0xd1,
+++			    0x0c, 0x8f, 0xcd, 0x31, 0xfc, 0x40, 0xaf, 0x1a,
+++			    0xd4, 0x4f, 0x47, 0xc1, 0x31, 0x37, 0x63, 0x62 },
+++		.valid = true
+++	},
+++	/* wycheproof - public key >= p */
+++	{
+++		.private = { 0x60, 0x88, 0x7b, 0x3d, 0xc7, 0x24, 0x43, 0x02,
+++			     0x6e, 0xbe, 0xdb, 0xbb, 0xb7, 0x06, 0x65, 0xf4,
+++			     0x2b, 0x87, 0xad, 0xd1, 0x44, 0x0e, 0x77, 0x68,
+++			     0xfb, 0xd7, 0xe8, 0xe2, 0xce, 0x5f, 0x63, 0x9d },
+++		.public = { 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++		.result = { 0x38, 0xd6, 0x30, 0x4c, 0x4a, 0x7e, 0x6d, 0x9f,
+++			    0x79, 0x59, 0x33, 0x4f, 0xb5, 0x24, 0x5b, 0xd2,
+++			    0xc7, 0x54, 0x52, 0x5d, 0x4c, 0x91, 0xdb, 0x95,
+++			    0x02, 0x06, 0x92, 0x62, 0x34, 0xc1, 0xf6, 0x33 },
+++		.valid = true
+++	},
+++	/* wycheproof - public key >= p */
+++	{
+++		.private = { 0x78, 0xd3, 0x1d, 0xfa, 0x85, 0x44, 0x97, 0xd7,
+++			     0x2d, 0x8d, 0xef, 0x8a, 0x1b, 0x7f, 0xb0, 0x06,
+++			     0xce, 0xc2, 0xd8, 0xc4, 0x92, 0x46, 0x47, 0xc9,
+++			     0x38, 0x14, 0xae, 0x56, 0xfa, 0xed, 0xa4, 0x95 },
+++		.public = { 0xf1, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++		.result = { 0x78, 0x6c, 0xd5, 0x49, 0x96, 0xf0, 0x14, 0xa5,
+++			    0xa0, 0x31, 0xec, 0x14, 0xdb, 0x81, 0x2e, 0xd0,
+++			    0x83, 0x55, 0x06, 0x1f, 0xdb, 0x5d, 0xe6, 0x80,
+++			    0xa8, 0x00, 0xac, 0x52, 0x1f, 0x31, 0x8e, 0x23 },
+++		.valid = true
+++	},
+++	/* wycheproof - public key >= p */
+++	{
+++		.private = { 0xc0, 0x4c, 0x5b, 0xae, 0xfa, 0x83, 0x02, 0xdd,
+++			     0xde, 0xd6, 0xa4, 0xbb, 0x95, 0x77, 0x61, 0xb4,
+++			     0xeb, 0x97, 0xae, 0xfa, 0x4f, 0xc3, 0xb8, 0x04,
+++			     0x30, 0x85, 0xf9, 0x6a, 0x56, 0x59, 0xb3, 0xa5 },
+++		.public = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+++		.result = { 0x29, 0xae, 0x8b, 0xc7, 0x3e, 0x9b, 0x10, 0xa0,
+++			    0x8b, 0x4f, 0x68, 0x1c, 0x43, 0xc3, 0xe0, 0xac,
+++			    0x1a, 0x17, 0x1d, 0x31, 0xb3, 0x8f, 0x1a, 0x48,
+++			    0xef, 0xba, 0x29, 0xae, 0x63, 0x9e, 0xa1, 0x34 },
+++		.valid = true
+++	},
+++	/* wycheproof - RFC 7748 */
+++	{
+++		.private = { 0xa0, 0x46, 0xe3, 0x6b, 0xf0, 0x52, 0x7c, 0x9d,
+++			     0x3b, 0x16, 0x15, 0x4b, 0x82, 0x46, 0x5e, 0xdd,
+++			     0x62, 0x14, 0x4c, 0x0a, 0xc1, 0xfc, 0x5a, 0x18,
+++			     0x50, 0x6a, 0x22, 0x44, 0xba, 0x44, 0x9a, 0x44 },
+++		.public = { 0xe6, 0xdb, 0x68, 0x67, 0x58, 0x30, 0x30, 0xdb,
+++			    0x35, 0x94, 0xc1, 0xa4, 0x24, 0xb1, 0x5f, 0x7c,
+++			    0x72, 0x66, 0x24, 0xec, 0x26, 0xb3, 0x35, 0x3b,
+++			    0x10, 0xa9, 0x03, 0xa6, 0xd0, 0xab, 0x1c, 0x4c },
+++		.result = { 0xc3, 0xda, 0x55, 0x37, 0x9d, 0xe9, 0xc6, 0x90,
+++			    0x8e, 0x94, 0xea, 0x4d, 0xf2, 0x8d, 0x08, 0x4f,
+++			    0x32, 0xec, 0xcf, 0x03, 0x49, 0x1c, 0x71, 0xf7,
+++			    0x54, 0xb4, 0x07, 0x55, 0x77, 0xa2, 0x85, 0x52 },
+++		.valid = true
+++	},
+++	/* wycheproof - RFC 7748 */
+++	{
+++		.private = { 0x48, 0x66, 0xe9, 0xd4, 0xd1, 0xb4, 0x67, 0x3c,
+++			     0x5a, 0xd2, 0x26, 0x91, 0x95, 0x7d, 0x6a, 0xf5,
+++			     0xc1, 0x1b, 0x64, 0x21, 0xe0, 0xea, 0x01, 0xd4,
+++			     0x2c, 0xa4, 0x16, 0x9e, 0x79, 0x18, 0xba, 0x4d },
+++		.public = { 0xe5, 0x21, 0x0f, 0x12, 0x78, 0x68, 0x11, 0xd3,
+++			    0xf4, 0xb7, 0x95, 0x9d, 0x05, 0x38, 0xae, 0x2c,
+++			    0x31, 0xdb, 0xe7, 0x10, 0x6f, 0xc0, 0x3c, 0x3e,
+++			    0xfc, 0x4c, 0xd5, 0x49, 0xc7, 0x15, 0xa4, 0x13 },
+++		.result = { 0x95, 0xcb, 0xde, 0x94, 0x76, 0xe8, 0x90, 0x7d,
+++			    0x7a, 0xad, 0xe4, 0x5c, 0xb4, 0xb8, 0x73, 0xf8,
+++			    0x8b, 0x59, 0x5a, 0x68, 0x79, 0x9f, 0xa1, 0x52,
+++			    0xe6, 0xf8, 0xf7, 0x64, 0x7a, 0xac, 0x79, 0x57 },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for shared secret */
+++	{
+++		.private = { 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++			     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++			     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++			     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++		.public = { 0x0a, 0xb4, 0xe7, 0x63, 0x80, 0xd8, 0x4d, 0xde,
+++			    0x4f, 0x68, 0x33, 0xc5, 0x8f, 0x2a, 0x9f, 0xb8,
+++			    0xf8, 0x3b, 0xb0, 0x16, 0x9b, 0x17, 0x2b, 0xe4,
+++			    0xb6, 0xe0, 0x59, 0x28, 0x87, 0x74, 0x1a, 0x36 },
+++		.result = { 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for shared secret */
+++	{
+++		.private = { 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++			     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++			     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++			     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++		.public = { 0x89, 0xe1, 0x0d, 0x57, 0x01, 0xb4, 0x33, 0x7d,
+++			    0x2d, 0x03, 0x21, 0x81, 0x53, 0x8b, 0x10, 0x64,
+++			    0xbd, 0x40, 0x84, 0x40, 0x1c, 0xec, 0xa1, 0xfd,
+++			    0x12, 0x66, 0x3a, 0x19, 0x59, 0x38, 0x80, 0x00 },
+++		.result = { 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for shared secret */
+++	{
+++		.private = { 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++			     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++			     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++			     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++		.public = { 0x2b, 0x55, 0xd3, 0xaa, 0x4a, 0x8f, 0x80, 0xc8,
+++			    0xc0, 0xb2, 0xae, 0x5f, 0x93, 0x3e, 0x85, 0xaf,
+++			    0x49, 0xbe, 0xac, 0x36, 0xc2, 0xfa, 0x73, 0x94,
+++			    0xba, 0xb7, 0x6c, 0x89, 0x33, 0xf8, 0xf8, 0x1d },
+++		.result = { 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for shared secret */
+++	{
+++		.private = { 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++			     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++			     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++			     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++		.public = { 0x63, 0xe5, 0xb1, 0xfe, 0x96, 0x01, 0xfe, 0x84,
+++			    0x38, 0x5d, 0x88, 0x66, 0xb0, 0x42, 0x12, 0x62,
+++			    0xf7, 0x8f, 0xbf, 0xa5, 0xaf, 0xf9, 0x58, 0x5e,
+++			    0x62, 0x66, 0x79, 0xb1, 0x85, 0x47, 0xd9, 0x59 },
+++		.result = { 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for shared secret */
+++	{
+++		.private = { 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++			     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++			     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++			     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++		.public = { 0xe4, 0x28, 0xf3, 0xda, 0xc1, 0x78, 0x09, 0xf8,
+++			    0x27, 0xa5, 0x22, 0xce, 0x32, 0x35, 0x50, 0x58,
+++			    0xd0, 0x73, 0x69, 0x36, 0x4a, 0xa7, 0x89, 0x02,
+++			    0xee, 0x10, 0x13, 0x9b, 0x9f, 0x9d, 0xd6, 0x53 },
+++		.result = { 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for shared secret */
+++	{
+++		.private = { 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++			     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++			     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++			     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++		.public = { 0xb3, 0xb5, 0x0e, 0x3e, 0xd3, 0xa4, 0x07, 0xb9,
+++			    0x5d, 0xe9, 0x42, 0xef, 0x74, 0x57, 0x5b, 0x5a,
+++			    0xb8, 0xa1, 0x0c, 0x09, 0xee, 0x10, 0x35, 0x44,
+++			    0xd6, 0x0b, 0xdf, 0xed, 0x81, 0x38, 0xab, 0x2b },
+++		.result = { 0xf9, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for shared secret */
+++	{
+++		.private = { 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++			     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++			     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++			     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++		.public = { 0x21, 0x3f, 0xff, 0xe9, 0x3d, 0x5e, 0xa8, 0xcd,
+++			    0x24, 0x2e, 0x46, 0x28, 0x44, 0x02, 0x99, 0x22,
+++			    0xc4, 0x3c, 0x77, 0xc9, 0xe3, 0xe4, 0x2f, 0x56,
+++			    0x2f, 0x48, 0x5d, 0x24, 0xc5, 0x01, 0xa2, 0x0b },
+++		.result = { 0xf3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for shared secret */
+++	{
+++		.private = { 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++			     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++			     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++			     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++		.public = { 0x91, 0xb2, 0x32, 0xa1, 0x78, 0xb3, 0xcd, 0x53,
+++			    0x09, 0x32, 0x44, 0x1e, 0x61, 0x39, 0x41, 0x8f,
+++			    0x72, 0x17, 0x22, 0x92, 0xf1, 0xda, 0x4c, 0x18,
+++			    0x34, 0xfc, 0x5e, 0xbf, 0xef, 0xb5, 0x1e, 0x3f },
+++		.result = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x03 },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for shared secret */
+++	{
+++		.private = { 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++			     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++			     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++			     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++		.public = { 0x04, 0x5c, 0x6e, 0x11, 0xc5, 0xd3, 0x32, 0x55,
+++			    0x6c, 0x78, 0x22, 0xfe, 0x94, 0xeb, 0xf8, 0x9b,
+++			    0x56, 0xa3, 0x87, 0x8d, 0xc2, 0x7c, 0xa0, 0x79,
+++			    0x10, 0x30, 0x58, 0x84, 0x9f, 0xab, 0xcb, 0x4f },
+++		.result = { 0xe5, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for shared secret */
+++	{
+++		.private = { 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++			     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++			     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++			     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++		.public = { 0x1c, 0xa2, 0x19, 0x0b, 0x71, 0x16, 0x35, 0x39,
+++			    0x06, 0x3c, 0x35, 0x77, 0x3b, 0xda, 0x0c, 0x9c,
+++			    0x92, 0x8e, 0x91, 0x36, 0xf0, 0x62, 0x0a, 0xeb,
+++			    0x09, 0x3f, 0x09, 0x91, 0x97, 0xb7, 0xf7, 0x4e },
+++		.result = { 0xe3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for shared secret */
+++	{
+++		.private = { 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++			     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++			     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++			     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++		.public = { 0xf7, 0x6e, 0x90, 0x10, 0xac, 0x33, 0xc5, 0x04,
+++			    0x3b, 0x2d, 0x3b, 0x76, 0xa8, 0x42, 0x17, 0x10,
+++			    0x00, 0xc4, 0x91, 0x62, 0x22, 0xe9, 0xe8, 0x58,
+++			    0x97, 0xa0, 0xae, 0xc7, 0xf6, 0x35, 0x0b, 0x3c },
+++		.result = { 0xdd, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for shared secret */
+++	{
+++		.private = { 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++			     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++			     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++			     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++		.public = { 0xbb, 0x72, 0x68, 0x8d, 0x8f, 0x8a, 0xa7, 0xa3,
+++			    0x9c, 0xd6, 0x06, 0x0c, 0xd5, 0xc8, 0x09, 0x3c,
+++			    0xde, 0xc6, 0xfe, 0x34, 0x19, 0x37, 0xc3, 0x88,
+++			    0x6a, 0x99, 0x34, 0x6c, 0xd0, 0x7f, 0xaa, 0x55 },
+++		.result = { 0xdb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for shared secret */
+++	{
+++		.private = { 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++			     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++			     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++			     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++		.public = { 0x88, 0xfd, 0xde, 0xa1, 0x93, 0x39, 0x1c, 0x6a,
+++			    0x59, 0x33, 0xef, 0x9b, 0x71, 0x90, 0x15, 0x49,
+++			    0x44, 0x72, 0x05, 0xaa, 0xe9, 0xda, 0x92, 0x8a,
+++			    0x6b, 0x91, 0xa3, 0x52, 0xba, 0x10, 0xf4, 0x1f },
+++		.result = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02 },
+++		.valid = true
+++	},
+++	/* wycheproof - edge case for shared secret */
+++	{
+++		.private = { 0xa0, 0xa4, 0xf1, 0x30, 0xb9, 0x8a, 0x5b, 0xe4,
+++			     0xb1, 0xce, 0xdb, 0x7c, 0xb8, 0x55, 0x84, 0xa3,
+++			     0x52, 0x0e, 0x14, 0x2d, 0x47, 0x4d, 0xc9, 0xcc,
+++			     0xb9, 0x09, 0xa0, 0x73, 0xa9, 0x76, 0xbf, 0x63 },
+++		.public = { 0x30, 0x3b, 0x39, 0x2f, 0x15, 0x31, 0x16, 0xca,
+++			    0xd9, 0xcc, 0x68, 0x2a, 0x00, 0xcc, 0xc4, 0x4c,
+++			    0x95, 0xff, 0x0d, 0x3b, 0xbe, 0x56, 0x8b, 0xeb,
+++			    0x6c, 0x4e, 0x73, 0x9b, 0xaf, 0xdc, 0x2c, 0x68 },
+++		.result = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00 },
+++		.valid = true
+++	},
+++	/* wycheproof - checking for overflow */
+++	{
+++		.private = { 0xc8, 0x17, 0x24, 0x70, 0x40, 0x00, 0xb2, 0x6d,
+++			     0x31, 0x70, 0x3c, 0xc9, 0x7e, 0x3a, 0x37, 0x8d,
+++			     0x56, 0xfa, 0xd8, 0x21, 0x93, 0x61, 0xc8, 0x8c,
+++			     0xca, 0x8b, 0xd7, 0xc5, 0x71, 0x9b, 0x12, 0xb2 },
+++		.public = { 0xfd, 0x30, 0x0a, 0xeb, 0x40, 0xe1, 0xfa, 0x58,
+++			    0x25, 0x18, 0x41, 0x2b, 0x49, 0xb2, 0x08, 0xa7,
+++			    0x84, 0x2b, 0x1e, 0x1f, 0x05, 0x6a, 0x04, 0x01,
+++			    0x78, 0xea, 0x41, 0x41, 0x53, 0x4f, 0x65, 0x2d },
+++		.result = { 0xb7, 0x34, 0x10, 0x5d, 0xc2, 0x57, 0x58, 0x5d,
+++			    0x73, 0xb5, 0x66, 0xcc, 0xb7, 0x6f, 0x06, 0x27,
+++			    0x95, 0xcc, 0xbe, 0xc8, 0x91, 0x28, 0xe5, 0x2b,
+++			    0x02, 0xf3, 0xe5, 0x96, 0x39, 0xf1, 0x3c, 0x46 },
+++		.valid = true
+++	},
+++	/* wycheproof - checking for overflow */
+++	{
+++		.private = { 0xc8, 0x17, 0x24, 0x70, 0x40, 0x00, 0xb2, 0x6d,
+++			     0x31, 0x70, 0x3c, 0xc9, 0x7e, 0x3a, 0x37, 0x8d,
+++			     0x56, 0xfa, 0xd8, 0x21, 0x93, 0x61, 0xc8, 0x8c,
+++			     0xca, 0x8b, 0xd7, 0xc5, 0x71, 0x9b, 0x12, 0xb2 },
+++		.public = { 0xc8, 0xef, 0x79, 0xb5, 0x14, 0xd7, 0x68, 0x26,
+++			    0x77, 0xbc, 0x79, 0x31, 0xe0, 0x6e, 0xe5, 0xc2,
+++			    0x7c, 0x9b, 0x39, 0x2b, 0x4a, 0xe9, 0x48, 0x44,
+++			    0x73, 0xf5, 0x54, 0xe6, 0x67, 0x8e, 0xcc, 0x2e },
+++		.result = { 0x64, 0x7a, 0x46, 0xb6, 0xfc, 0x3f, 0x40, 0xd6,
+++			    0x21, 0x41, 0xee, 0x3c, 0xee, 0x70, 0x6b, 0x4d,
+++			    0x7a, 0x92, 0x71, 0x59, 0x3a, 0x7b, 0x14, 0x3e,
+++			    0x8e, 0x2e, 0x22, 0x79, 0x88, 0x3e, 0x45, 0x50 },
+++		.valid = true
+++	},
+++	/* wycheproof - checking for overflow */
+++	{
+++		.private = { 0xc8, 0x17, 0x24, 0x70, 0x40, 0x00, 0xb2, 0x6d,
+++			     0x31, 0x70, 0x3c, 0xc9, 0x7e, 0x3a, 0x37, 0x8d,
+++			     0x56, 0xfa, 0xd8, 0x21, 0x93, 0x61, 0xc8, 0x8c,
+++			     0xca, 0x8b, 0xd7, 0xc5, 0x71, 0x9b, 0x12, 0xb2 },
+++		.public = { 0x64, 0xae, 0xac, 0x25, 0x04, 0x14, 0x48, 0x61,
+++			    0x53, 0x2b, 0x7b, 0xbc, 0xb6, 0xc8, 0x7d, 0x67,
+++			    0xdd, 0x4c, 0x1f, 0x07, 0xeb, 0xc2, 0xe0, 0x6e,
+++			    0xff, 0xb9, 0x5a, 0xec, 0xc6, 0x17, 0x0b, 0x2c },
+++		.result = { 0x4f, 0xf0, 0x3d, 0x5f, 0xb4, 0x3c, 0xd8, 0x65,
+++			    0x7a, 0x3c, 0xf3, 0x7c, 0x13, 0x8c, 0xad, 0xce,
+++			    0xcc, 0xe5, 0x09, 0xe4, 0xeb, 0xa0, 0x89, 0xd0,
+++			    0xef, 0x40, 0xb4, 0xe4, 0xfb, 0x94, 0x61, 0x55 },
+++		.valid = true
+++	},
+++	/* wycheproof - checking for overflow */
+++	{
+++		.private = { 0xc8, 0x17, 0x24, 0x70, 0x40, 0x00, 0xb2, 0x6d,
+++			     0x31, 0x70, 0x3c, 0xc9, 0x7e, 0x3a, 0x37, 0x8d,
+++			     0x56, 0xfa, 0xd8, 0x21, 0x93, 0x61, 0xc8, 0x8c,
+++			     0xca, 0x8b, 0xd7, 0xc5, 0x71, 0x9b, 0x12, 0xb2 },
+++		.public = { 0xbf, 0x68, 0xe3, 0x5e, 0x9b, 0xdb, 0x7e, 0xee,
+++			    0x1b, 0x50, 0x57, 0x02, 0x21, 0x86, 0x0f, 0x5d,
+++			    0xcd, 0xad, 0x8a, 0xcb, 0xab, 0x03, 0x1b, 0x14,
+++			    0x97, 0x4c, 0xc4, 0x90, 0x13, 0xc4, 0x98, 0x31 },
+++		.result = { 0x21, 0xce, 0xe5, 0x2e, 0xfd, 0xbc, 0x81, 0x2e,
+++			    0x1d, 0x02, 0x1a, 0x4a, 0xf1, 0xe1, 0xd8, 0xbc,
+++			    0x4d, 0xb3, 0xc4, 0x00, 0xe4, 0xd2, 0xa2, 0xc5,
+++			    0x6a, 0x39, 0x26, 0xdb, 0x4d, 0x99, 0xc6, 0x5b },
+++		.valid = true
+++	},
+++	/* wycheproof - checking for overflow */
+++	{
+++		.private = { 0xc8, 0x17, 0x24, 0x70, 0x40, 0x00, 0xb2, 0x6d,
+++			     0x31, 0x70, 0x3c, 0xc9, 0x7e, 0x3a, 0x37, 0x8d,
+++			     0x56, 0xfa, 0xd8, 0x21, 0x93, 0x61, 0xc8, 0x8c,
+++			     0xca, 0x8b, 0xd7, 0xc5, 0x71, 0x9b, 0x12, 0xb2 },
+++		.public = { 0x53, 0x47, 0xc4, 0x91, 0x33, 0x1a, 0x64, 0xb4,
+++			    0x3d, 0xdc, 0x68, 0x30, 0x34, 0xe6, 0x77, 0xf5,
+++			    0x3d, 0xc3, 0x2b, 0x52, 0xa5, 0x2a, 0x57, 0x7c,
+++			    0x15, 0xa8, 0x3b, 0xf2, 0x98, 0xe9, 0x9f, 0x19 },
+++		.result = { 0x18, 0xcb, 0x89, 0xe4, 0xe2, 0x0c, 0x0c, 0x2b,
+++			    0xd3, 0x24, 0x30, 0x52, 0x45, 0x26, 0x6c, 0x93,
+++			    0x27, 0x69, 0x0b, 0xbe, 0x79, 0xac, 0xb8, 0x8f,
+++			    0x5b, 0x8f, 0xb3, 0xf7, 0x4e, 0xca, 0x3e, 0x52 },
+++		.valid = true
+++	},
+++	/* wycheproof - private key == -1 (mod order) */
+++	{
+++		.private = { 0xa0, 0x23, 0xcd, 0xd0, 0x83, 0xef, 0x5b, 0xb8,
+++			     0x2f, 0x10, 0xd6, 0x2e, 0x59, 0xe1, 0x5a, 0x68,
+++			     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++			     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50 },
+++		.public = { 0x25, 0x8e, 0x04, 0x52, 0x3b, 0x8d, 0x25, 0x3e,
+++			    0xe6, 0x57, 0x19, 0xfc, 0x69, 0x06, 0xc6, 0x57,
+++			    0x19, 0x2d, 0x80, 0x71, 0x7e, 0xdc, 0x82, 0x8f,
+++			    0xa0, 0xaf, 0x21, 0x68, 0x6e, 0x2f, 0xaa, 0x75 },
+++		.result = { 0x25, 0x8e, 0x04, 0x52, 0x3b, 0x8d, 0x25, 0x3e,
+++			    0xe6, 0x57, 0x19, 0xfc, 0x69, 0x06, 0xc6, 0x57,
+++			    0x19, 0x2d, 0x80, 0x71, 0x7e, 0xdc, 0x82, 0x8f,
+++			    0xa0, 0xaf, 0x21, 0x68, 0x6e, 0x2f, 0xaa, 0x75 },
+++		.valid = true
+++	},
+++	/* wycheproof - private key == 1 (mod order) on twist */
+++	{
+++		.private = { 0x58, 0x08, 0x3d, 0xd2, 0x61, 0xad, 0x91, 0xef,
+++			     0xf9, 0x52, 0x32, 0x2e, 0xc8, 0x24, 0xc6, 0x82,
+++			     0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++			     0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x5f },
+++		.public = { 0x2e, 0xae, 0x5e, 0xc3, 0xdd, 0x49, 0x4e, 0x9f,
+++			    0x2d, 0x37, 0xd2, 0x58, 0xf8, 0x73, 0xa8, 0xe6,
+++			    0xe9, 0xd0, 0xdb, 0xd1, 0xe3, 0x83, 0xef, 0x64,
+++			    0xd9, 0x8b, 0xb9, 0x1b, 0x3e, 0x0b, 0xe0, 0x35 },
+++		.result = { 0x2e, 0xae, 0x5e, 0xc3, 0xdd, 0x49, 0x4e, 0x9f,
+++			    0x2d, 0x37, 0xd2, 0x58, 0xf8, 0x73, 0xa8, 0xe6,
+++			    0xe9, 0xd0, 0xdb, 0xd1, 0xe3, 0x83, 0xef, 0x64,
+++			    0xd9, 0x8b, 0xb9, 0x1b, 0x3e, 0x0b, 0xe0, 0x35 },
+++		.valid = true
+++	}
+++};
+++
+++bool __init curve25519_selftest(void)
+++{
+++	bool success = true, ret, ret2;
+++	size_t i = 0, j;
+++	u8 in[CURVE25519_KEY_SIZE];
+++	u8 out[CURVE25519_KEY_SIZE], out2[CURVE25519_KEY_SIZE],
+++	   out3[CURVE25519_KEY_SIZE];
+++
+++	for (i = 0; i < ARRAY_SIZE(curve25519_test_vectors); ++i) {
+++		memset(out, 0, CURVE25519_KEY_SIZE);
+++		ret = curve25519(out, curve25519_test_vectors[i].private,
+++				 curve25519_test_vectors[i].public);
+++		if (ret != curve25519_test_vectors[i].valid ||
+++		    memcmp(out, curve25519_test_vectors[i].result,
+++			   CURVE25519_KEY_SIZE)) {
+++			pr_err("curve25519 self-test %zu: FAIL\n", i + 1);
+++			success = false;
+++		}
+++	}
+++
+++	for (i = 0; i < 5; ++i) {
+++		get_random_bytes(in, sizeof(in));
+++		ret = curve25519_generate_public(out, in);
+++		ret2 = curve25519(out2, in, (u8[CURVE25519_KEY_SIZE]){ 9 });
+++		curve25519_generic(out3, in, (u8[CURVE25519_KEY_SIZE]){ 9 });
+++		if (ret != ret2 ||
+++		    memcmp(out, out2, CURVE25519_KEY_SIZE) ||
+++		    memcmp(out, out3, CURVE25519_KEY_SIZE)) {
+++			pr_err("curve25519 basepoint self-test %zu: FAIL: input - 0x",
+++			       i + 1);
+++			for (j = CURVE25519_KEY_SIZE; j-- > 0;)
+++				printk(KERN_CONT "%02x", in[j]);
+++			printk(KERN_CONT "\n");
+++			success = false;
+++		}
+++	}
+++
+++	return success;
+++}
++--- a/lib/crypto/curve25519.c
+++++ b/lib/crypto/curve25519.c
++@@ -13,6 +13,8 @@
++ #include <linux/module.h>
++ #include <linux/init.h>
++ 
+++bool curve25519_selftest(void);
+++
++ const u8 curve25519_null_point[CURVE25519_KEY_SIZE] __aligned(32) = { 0 };
++ const u8 curve25519_base_point[CURVE25519_KEY_SIZE] __aligned(32) = { 9 };
++ 
++@@ -20,6 +22,21 @@ EXPORT_SYMBOL(curve25519_null_point);
++ EXPORT_SYMBOL(curve25519_base_point);
++ EXPORT_SYMBOL(curve25519_generic);
++ 
+++static int __init mod_init(void)
+++{
+++	if (!IS_ENABLED(CONFIG_CRYPTO_MANAGER_DISABLE_TESTS) &&
+++	    WARN_ON(!curve25519_selftest()))
+++		return -ENODEV;
+++	return 0;
+++}
+++
+++static void __exit mod_exit(void)
+++{
+++}
+++
+++module_init(mod_init);
+++module_exit(mod_exit);
+++
++ MODULE_LICENSE("GPL v2");
++ MODULE_DESCRIPTION("Curve25519 scalar multiplication");
++ MODULE_AUTHOR("Jason A. Donenfeld <Jason@zx2c4.com>");
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0041-crypto-poly1305-add-new-32-and-64-bit-generic-versio.patch b/target/linux/generic/backport-5.4/080-wireguard-0041-crypto-poly1305-add-new-32-and-64-bit-generic-versio.patch
+new file mode 100644
+index 0000000000..c41ef55b14
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0041-crypto-poly1305-add-new-32-and-64-bit-generic-versio.patch
+@@ -0,0 +1,1164 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Sun, 5 Jan 2020 22:40:46 -0500
++Subject: [PATCH] crypto: poly1305 - add new 32 and 64-bit generic versions
++
++commit 1c08a104360f3e18f4ee6346c21cc3923efb952e upstream.
++
++These two C implementations from Zinc -- a 32x32 one and a 64x64 one,
++depending on the platform -- come from Andrew Moon's public domain
++poly1305-donna portable code, modified for usage in the kernel. The
++precomputation in the 32-bit version and the use of 64x64 multiplies in
++the 64-bit version make these perform better than the code it replaces.
++Moon's code is also very widespread and has received many eyeballs of
++scrutiny.
++
++There's a bit of interference between the x86 implementation, which
++relies on internal details of the old scalar implementation. In the next
++commit, the x86 implementation will be replaced with a faster one that
++doesn't rely on this, so none of this matters much. But for now, to keep
++this passing the tests, we inline the bits of the old implementation
++that the x86 implementation relied on. Also, since we now support a
++slightly larger key space, via the union, some offsets had to be fixed
++up.
++
++Nonce calculation was folded in with the emit function, to take
++advantage of 64x64 arithmetic. However, Adiantum appeared to rely on no
++nonce handling in emit, so this path was conditionalized. We also
++introduced a new struct, poly1305_core_key, to represent the precise
++amount of space that particular implementation uses.
++
++Testing with kbench9000, depending on the CPU, the update function for
++the 32x32 version has been improved by 4%-7%, and for the 64x64 by
++19%-30%. The 32x32 gains are small, but I think there's great value in
++having a parallel implementation to the 64x64 one so that the two can be
++compared side-by-side as nice stand-alone units.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/poly1305-avx2-x86_64.S |  20 +--
++ arch/x86/crypto/poly1305_glue.c        | 215 +++++++++++++++++++++++--
++ crypto/adiantum.c                      |   4 +-
++ crypto/nhpoly1305.c                    |   2 +-
++ crypto/poly1305_generic.c              |  25 ++-
++ include/crypto/internal/poly1305.h     |  45 ++----
++ include/crypto/nhpoly1305.h            |   4 +-
++ include/crypto/poly1305.h              |  26 ++-
++ lib/crypto/Makefile                    |   4 +-
++ lib/crypto/poly1305-donna32.c          | 204 +++++++++++++++++++++++
++ lib/crypto/poly1305-donna64.c          | 185 +++++++++++++++++++++
++ lib/crypto/poly1305.c                  | 169 +------------------
++ 12 files changed, 675 insertions(+), 228 deletions(-)
++ create mode 100644 lib/crypto/poly1305-donna32.c
++ create mode 100644 lib/crypto/poly1305-donna64.c
++
++--- a/arch/x86/crypto/poly1305-avx2-x86_64.S
+++++ b/arch/x86/crypto/poly1305-avx2-x86_64.S
++@@ -34,16 +34,16 @@ ORMASK:	.octa 0x000000000100000000000000
++ #define u2 0x08(%r8)
++ #define u3 0x0c(%r8)
++ #define u4 0x10(%r8)
++-#define w0 0x14(%r8)
++-#define w1 0x18(%r8)
++-#define w2 0x1c(%r8)
++-#define w3 0x20(%r8)
++-#define w4 0x24(%r8)
++-#define y0 0x28(%r8)
++-#define y1 0x2c(%r8)
++-#define y2 0x30(%r8)
++-#define y3 0x34(%r8)
++-#define y4 0x38(%r8)
+++#define w0 0x18(%r8)
+++#define w1 0x1c(%r8)
+++#define w2 0x20(%r8)
+++#define w3 0x24(%r8)
+++#define w4 0x28(%r8)
+++#define y0 0x30(%r8)
+++#define y1 0x34(%r8)
+++#define y2 0x38(%r8)
+++#define y3 0x3c(%r8)
+++#define y4 0x40(%r8)
++ #define m %rsi
++ #define hc0 %ymm0
++ #define hc1 %ymm1
++--- a/arch/x86/crypto/poly1305_glue.c
+++++ b/arch/x86/crypto/poly1305_glue.c
++@@ -25,6 +25,21 @@ asmlinkage void poly1305_4block_avx2(u32
++ static __ro_after_init DEFINE_STATIC_KEY_FALSE(poly1305_use_simd);
++ static __ro_after_init DEFINE_STATIC_KEY_FALSE(poly1305_use_avx2);
++ 
+++static inline u64 mlt(u64 a, u64 b)
+++{
+++	return a * b;
+++}
+++
+++static inline u32 sr(u64 v, u_char n)
+++{
+++	return v >> n;
+++}
+++
+++static inline u32 and(u32 v, u32 mask)
+++{
+++	return v & mask;
+++}
+++
++ static void poly1305_simd_mult(u32 *a, const u32 *b)
++ {
++ 	u8 m[POLY1305_BLOCK_SIZE];
++@@ -36,6 +51,168 @@ static void poly1305_simd_mult(u32 *a, c
++ 	poly1305_block_sse2(a, m, b, 1);
++ }
++ 
+++static void poly1305_integer_setkey(struct poly1305_key *key, const u8 *raw_key)
+++{
+++	/* r &= 0xffffffc0ffffffc0ffffffc0fffffff */
+++	key->r[0] = (get_unaligned_le32(raw_key +  0) >> 0) & 0x3ffffff;
+++	key->r[1] = (get_unaligned_le32(raw_key +  3) >> 2) & 0x3ffff03;
+++	key->r[2] = (get_unaligned_le32(raw_key +  6) >> 4) & 0x3ffc0ff;
+++	key->r[3] = (get_unaligned_le32(raw_key +  9) >> 6) & 0x3f03fff;
+++	key->r[4] = (get_unaligned_le32(raw_key + 12) >> 8) & 0x00fffff;
+++}
+++
+++static void poly1305_integer_blocks(struct poly1305_state *state,
+++				    const struct poly1305_key *key,
+++				    const void *src,
+++				    unsigned int nblocks, u32 hibit)
+++{
+++	u32 r0, r1, r2, r3, r4;
+++	u32 s1, s2, s3, s4;
+++	u32 h0, h1, h2, h3, h4;
+++	u64 d0, d1, d2, d3, d4;
+++
+++	if (!nblocks)
+++		return;
+++
+++	r0 = key->r[0];
+++	r1 = key->r[1];
+++	r2 = key->r[2];
+++	r3 = key->r[3];
+++	r4 = key->r[4];
+++
+++	s1 = r1 * 5;
+++	s2 = r2 * 5;
+++	s3 = r3 * 5;
+++	s4 = r4 * 5;
+++
+++	h0 = state->h[0];
+++	h1 = state->h[1];
+++	h2 = state->h[2];
+++	h3 = state->h[3];
+++	h4 = state->h[4];
+++
+++	do {
+++		/* h += m[i] */
+++		h0 += (get_unaligned_le32(src +  0) >> 0) & 0x3ffffff;
+++		h1 += (get_unaligned_le32(src +  3) >> 2) & 0x3ffffff;
+++		h2 += (get_unaligned_le32(src +  6) >> 4) & 0x3ffffff;
+++		h3 += (get_unaligned_le32(src +  9) >> 6) & 0x3ffffff;
+++		h4 += (get_unaligned_le32(src + 12) >> 8) | (hibit << 24);
+++
+++		/* h *= r */
+++		d0 = mlt(h0, r0) + mlt(h1, s4) + mlt(h2, s3) +
+++		     mlt(h3, s2) + mlt(h4, s1);
+++		d1 = mlt(h0, r1) + mlt(h1, r0) + mlt(h2, s4) +
+++		     mlt(h3, s3) + mlt(h4, s2);
+++		d2 = mlt(h0, r2) + mlt(h1, r1) + mlt(h2, r0) +
+++		     mlt(h3, s4) + mlt(h4, s3);
+++		d3 = mlt(h0, r3) + mlt(h1, r2) + mlt(h2, r1) +
+++		     mlt(h3, r0) + mlt(h4, s4);
+++		d4 = mlt(h0, r4) + mlt(h1, r3) + mlt(h2, r2) +
+++		     mlt(h3, r1) + mlt(h4, r0);
+++
+++		/* (partial) h %= p */
+++		d1 += sr(d0, 26);     h0 = and(d0, 0x3ffffff);
+++		d2 += sr(d1, 26);     h1 = and(d1, 0x3ffffff);
+++		d3 += sr(d2, 26);     h2 = and(d2, 0x3ffffff);
+++		d4 += sr(d3, 26);     h3 = and(d3, 0x3ffffff);
+++		h0 += sr(d4, 26) * 5; h4 = and(d4, 0x3ffffff);
+++		h1 += h0 >> 26;       h0 = h0 & 0x3ffffff;
+++
+++		src += POLY1305_BLOCK_SIZE;
+++	} while (--nblocks);
+++
+++	state->h[0] = h0;
+++	state->h[1] = h1;
+++	state->h[2] = h2;
+++	state->h[3] = h3;
+++	state->h[4] = h4;
+++}
+++
+++static void poly1305_integer_emit(const struct poly1305_state *state, void *dst)
+++{
+++	u32 h0, h1, h2, h3, h4;
+++	u32 g0, g1, g2, g3, g4;
+++	u32 mask;
+++
+++	/* fully carry h */
+++	h0 = state->h[0];
+++	h1 = state->h[1];
+++	h2 = state->h[2];
+++	h3 = state->h[3];
+++	h4 = state->h[4];
+++
+++	h2 += (h1 >> 26);     h1 = h1 & 0x3ffffff;
+++	h3 += (h2 >> 26);     h2 = h2 & 0x3ffffff;
+++	h4 += (h3 >> 26);     h3 = h3 & 0x3ffffff;
+++	h0 += (h4 >> 26) * 5; h4 = h4 & 0x3ffffff;
+++	h1 += (h0 >> 26);     h0 = h0 & 0x3ffffff;
+++
+++	/* compute h + -p */
+++	g0 = h0 + 5;
+++	g1 = h1 + (g0 >> 26);             g0 &= 0x3ffffff;
+++	g2 = h2 + (g1 >> 26);             g1 &= 0x3ffffff;
+++	g3 = h3 + (g2 >> 26);             g2 &= 0x3ffffff;
+++	g4 = h4 + (g3 >> 26) - (1 << 26); g3 &= 0x3ffffff;
+++
+++	/* select h if h < p, or h + -p if h >= p */
+++	mask = (g4 >> ((sizeof(u32) * 8) - 1)) - 1;
+++	g0 &= mask;
+++	g1 &= mask;
+++	g2 &= mask;
+++	g3 &= mask;
+++	g4 &= mask;
+++	mask = ~mask;
+++	h0 = (h0 & mask) | g0;
+++	h1 = (h1 & mask) | g1;
+++	h2 = (h2 & mask) | g2;
+++	h3 = (h3 & mask) | g3;
+++	h4 = (h4 & mask) | g4;
+++
+++	/* h = h % (2^128) */
+++	put_unaligned_le32((h0 >>  0) | (h1 << 26), dst +  0);
+++	put_unaligned_le32((h1 >>  6) | (h2 << 20), dst +  4);
+++	put_unaligned_le32((h2 >> 12) | (h3 << 14), dst +  8);
+++	put_unaligned_le32((h3 >> 18) | (h4 <<  8), dst + 12);
+++}
+++
+++void poly1305_init_arch(struct poly1305_desc_ctx *desc, const u8 *key)
+++{
+++	poly1305_integer_setkey(desc->opaque_r, key);
+++	desc->s[0] = get_unaligned_le32(key + 16);
+++	desc->s[1] = get_unaligned_le32(key + 20);
+++	desc->s[2] = get_unaligned_le32(key + 24);
+++	desc->s[3] = get_unaligned_le32(key + 28);
+++	poly1305_core_init(&desc->h);
+++	desc->buflen = 0;
+++	desc->sset = true;
+++	desc->rset = 1;
+++}
+++EXPORT_SYMBOL_GPL(poly1305_init_arch);
+++
+++static unsigned int crypto_poly1305_setdesckey(struct poly1305_desc_ctx *dctx,
+++					       const u8 *src, unsigned int srclen)
+++{
+++	if (!dctx->sset) {
+++		if (!dctx->rset && srclen >= POLY1305_BLOCK_SIZE) {
+++			poly1305_integer_setkey(dctx->r, src);
+++			src += POLY1305_BLOCK_SIZE;
+++			srclen -= POLY1305_BLOCK_SIZE;
+++			dctx->rset = 1;
+++		}
+++		if (srclen >= POLY1305_BLOCK_SIZE) {
+++			dctx->s[0] = get_unaligned_le32(src +  0);
+++			dctx->s[1] = get_unaligned_le32(src +  4);
+++			dctx->s[2] = get_unaligned_le32(src +  8);
+++			dctx->s[3] = get_unaligned_le32(src + 12);
+++			src += POLY1305_BLOCK_SIZE;
+++			srclen -= POLY1305_BLOCK_SIZE;
+++			dctx->sset = true;
+++		}
+++	}
+++	return srclen;
+++}
+++
++ static unsigned int poly1305_scalar_blocks(struct poly1305_desc_ctx *dctx,
++ 					   const u8 *src, unsigned int srclen)
++ {
++@@ -47,8 +224,8 @@ static unsigned int poly1305_scalar_bloc
++ 		srclen = datalen;
++ 	}
++ 	if (srclen >= POLY1305_BLOCK_SIZE) {
++-		poly1305_core_blocks(&dctx->h, dctx->r, src,
++-				     srclen / POLY1305_BLOCK_SIZE, 1);
+++		poly1305_integer_blocks(&dctx->h, dctx->opaque_r, src,
+++					srclen / POLY1305_BLOCK_SIZE, 1);
++ 		srclen %= POLY1305_BLOCK_SIZE;
++ 	}
++ 	return srclen;
++@@ -105,12 +282,6 @@ static unsigned int poly1305_simd_blocks
++ 	return srclen;
++ }
++ 
++-void poly1305_init_arch(struct poly1305_desc_ctx *desc, const u8 *key)
++-{
++-	poly1305_init_generic(desc, key);
++-}
++-EXPORT_SYMBOL(poly1305_init_arch);
++-
++ void poly1305_update_arch(struct poly1305_desc_ctx *dctx, const u8 *src,
++ 			  unsigned int srclen)
++ {
++@@ -158,9 +329,31 @@ void poly1305_update_arch(struct poly130
++ }
++ EXPORT_SYMBOL(poly1305_update_arch);
++ 
++-void poly1305_final_arch(struct poly1305_desc_ctx *desc, u8 *digest)
+++void poly1305_final_arch(struct poly1305_desc_ctx *desc, u8 *dst)
++ {
++-	poly1305_final_generic(desc, digest);
+++	__le32 digest[4];
+++	u64 f = 0;
+++
+++	if (unlikely(desc->buflen)) {
+++		desc->buf[desc->buflen++] = 1;
+++		memset(desc->buf + desc->buflen, 0,
+++		       POLY1305_BLOCK_SIZE - desc->buflen);
+++		poly1305_integer_blocks(&desc->h, desc->opaque_r, desc->buf, 1, 0);
+++	}
+++
+++	poly1305_integer_emit(&desc->h, digest);
+++
+++	/* mac = (h + s) % (2^128) */
+++	f = (f >> 32) + le32_to_cpu(digest[0]) + desc->s[0];
+++	put_unaligned_le32(f, dst + 0);
+++	f = (f >> 32) + le32_to_cpu(digest[1]) + desc->s[1];
+++	put_unaligned_le32(f, dst + 4);
+++	f = (f >> 32) + le32_to_cpu(digest[2]) + desc->s[2];
+++	put_unaligned_le32(f, dst + 8);
+++	f = (f >> 32) + le32_to_cpu(digest[3]) + desc->s[3];
+++	put_unaligned_le32(f, dst + 12);
+++
+++	*desc = (struct poly1305_desc_ctx){};
++ }
++ EXPORT_SYMBOL(poly1305_final_arch);
++ 
++@@ -183,7 +376,7 @@ static int crypto_poly1305_final(struct
++ 	if (unlikely(!dctx->sset))
++ 		return -ENOKEY;
++ 
++-	poly1305_final_generic(dctx, dst);
+++	poly1305_final_arch(dctx, dst);
++ 	return 0;
++ }
++ 
++--- a/crypto/adiantum.c
+++++ b/crypto/adiantum.c
++@@ -72,7 +72,7 @@ struct adiantum_tfm_ctx {
++ 	struct crypto_skcipher *streamcipher;
++ 	struct crypto_cipher *blockcipher;
++ 	struct crypto_shash *hash;
++-	struct poly1305_key header_hash_key;
+++	struct poly1305_core_key header_hash_key;
++ };
++ 
++ struct adiantum_request_ctx {
++@@ -249,7 +249,7 @@ static void adiantum_hash_header(struct
++ 	poly1305_core_blocks(&state, &tctx->header_hash_key, req->iv,
++ 			     TWEAK_SIZE / POLY1305_BLOCK_SIZE, 1);
++ 
++-	poly1305_core_emit(&state, &rctx->header_hash);
+++	poly1305_core_emit(&state, NULL, &rctx->header_hash);
++ }
++ 
++ /* Hash the left-hand part (the "bulk") of the message using NHPoly1305 */
++--- a/crypto/nhpoly1305.c
+++++ b/crypto/nhpoly1305.c
++@@ -210,7 +210,7 @@ int crypto_nhpoly1305_final_helper(struc
++ 	if (state->nh_remaining)
++ 		process_nh_hash_value(state, key);
++ 
++-	poly1305_core_emit(&state->poly_state, dst);
+++	poly1305_core_emit(&state->poly_state, NULL, dst);
++ 	return 0;
++ }
++ EXPORT_SYMBOL(crypto_nhpoly1305_final_helper);
++--- a/crypto/poly1305_generic.c
+++++ b/crypto/poly1305_generic.c
++@@ -31,6 +31,29 @@ static int crypto_poly1305_init(struct s
++ 	return 0;
++ }
++ 
+++static unsigned int crypto_poly1305_setdesckey(struct poly1305_desc_ctx *dctx,
+++					       const u8 *src, unsigned int srclen)
+++{
+++	if (!dctx->sset) {
+++		if (!dctx->rset && srclen >= POLY1305_BLOCK_SIZE) {
+++			poly1305_core_setkey(&dctx->core_r, src);
+++			src += POLY1305_BLOCK_SIZE;
+++			srclen -= POLY1305_BLOCK_SIZE;
+++			dctx->rset = 2;
+++		}
+++		if (srclen >= POLY1305_BLOCK_SIZE) {
+++			dctx->s[0] = get_unaligned_le32(src +  0);
+++			dctx->s[1] = get_unaligned_le32(src +  4);
+++			dctx->s[2] = get_unaligned_le32(src +  8);
+++			dctx->s[3] = get_unaligned_le32(src + 12);
+++			src += POLY1305_BLOCK_SIZE;
+++			srclen -= POLY1305_BLOCK_SIZE;
+++			dctx->sset = true;
+++		}
+++	}
+++	return srclen;
+++}
+++
++ static void poly1305_blocks(struct poly1305_desc_ctx *dctx, const u8 *src,
++ 			    unsigned int srclen)
++ {
++@@ -42,7 +65,7 @@ static void poly1305_blocks(struct poly1
++ 		srclen = datalen;
++ 	}
++ 
++-	poly1305_core_blocks(&dctx->h, dctx->r, src,
+++	poly1305_core_blocks(&dctx->h, &dctx->core_r, src,
++ 			     srclen / POLY1305_BLOCK_SIZE, 1);
++ }
++ 
++--- a/include/crypto/internal/poly1305.h
+++++ b/include/crypto/internal/poly1305.h
++@@ -11,48 +11,23 @@
++ #include <crypto/poly1305.h>
++ 
++ /*
++- * Poly1305 core functions.  These implement the ε-almost-∆-universal hash
++- * function underlying the Poly1305 MAC, i.e. they don't add an encrypted nonce
++- * ("s key") at the end.  They also only support block-aligned inputs.
+++ * Poly1305 core functions.  These only accept whole blocks; the caller must
+++ * handle any needed block buffering and padding.  'hibit' must be 1 for any
+++ * full blocks, or 0 for the final block if it had to be padded.  If 'nonce' is
+++ * non-NULL, then it's added at the end to compute the Poly1305 MAC.  Otherwise,
+++ * only the ε-almost-∆-universal hash function (not the full MAC) is computed.
++  */
++-void poly1305_core_setkey(struct poly1305_key *key, const u8 *raw_key);
+++
+++void poly1305_core_setkey(struct poly1305_core_key *key, const u8 *raw_key);
++ static inline void poly1305_core_init(struct poly1305_state *state)
++ {
++ 	*state = (struct poly1305_state){};
++ }
++ 
++ void poly1305_core_blocks(struct poly1305_state *state,
++-			  const struct poly1305_key *key, const void *src,
+++			  const struct poly1305_core_key *key, const void *src,
++ 			  unsigned int nblocks, u32 hibit);
++-void poly1305_core_emit(const struct poly1305_state *state, void *dst);
++-
++-/*
++- * Poly1305 requires a unique key for each tag, which implies that we can't set
++- * it on the tfm that gets accessed by multiple users simultaneously. Instead we
++- * expect the key as the first 32 bytes in the update() call.
++- */
++-static inline
++-unsigned int crypto_poly1305_setdesckey(struct poly1305_desc_ctx *dctx,
++-					const u8 *src, unsigned int srclen)
++-{
++-	if (!dctx->sset) {
++-		if (!dctx->rset && srclen >= POLY1305_BLOCK_SIZE) {
++-			poly1305_core_setkey(dctx->r, src);
++-			src += POLY1305_BLOCK_SIZE;
++-			srclen -= POLY1305_BLOCK_SIZE;
++-			dctx->rset = 1;
++-		}
++-		if (srclen >= POLY1305_BLOCK_SIZE) {
++-			dctx->s[0] = get_unaligned_le32(src +  0);
++-			dctx->s[1] = get_unaligned_le32(src +  4);
++-			dctx->s[2] = get_unaligned_le32(src +  8);
++-			dctx->s[3] = get_unaligned_le32(src + 12);
++-			src += POLY1305_BLOCK_SIZE;
++-			srclen -= POLY1305_BLOCK_SIZE;
++-			dctx->sset = true;
++-		}
++-	}
++-	return srclen;
++-}
+++void poly1305_core_emit(const struct poly1305_state *state, const u32 nonce[4],
+++			void *dst);
++ 
++ #endif
++--- a/include/crypto/nhpoly1305.h
+++++ b/include/crypto/nhpoly1305.h
++@@ -7,7 +7,7 @@
++ #define _NHPOLY1305_H
++ 
++ #include <crypto/hash.h>
++-#include <crypto/poly1305.h>
+++#include <crypto/internal/poly1305.h>
++ 
++ /* NH parameterization: */
++ 
++@@ -33,7 +33,7 @@
++ #define NHPOLY1305_KEY_SIZE	(POLY1305_BLOCK_SIZE + NH_KEY_BYTES)
++ 
++ struct nhpoly1305_key {
++-	struct poly1305_key poly_key;
+++	struct poly1305_core_key poly_key;
++ 	u32 nh_key[NH_KEY_WORDS];
++ };
++ 
++--- a/include/crypto/poly1305.h
+++++ b/include/crypto/poly1305.h
++@@ -13,12 +13,29 @@
++ #define POLY1305_KEY_SIZE	32
++ #define POLY1305_DIGEST_SIZE	16
++ 
+++/* The poly1305_key and poly1305_state types are mostly opaque and
+++ * implementation-defined. Limbs might be in base 2^64 or base 2^26, or
+++ * different yet. The union type provided keeps these 64-bit aligned for the
+++ * case in which this is implemented using 64x64 multiplies.
+++ */
+++
++ struct poly1305_key {
++-	u32 r[5];	/* key, base 2^26 */
+++	union {
+++		u32 r[5];
+++		u64 r64[3];
+++	};
+++};
+++
+++struct poly1305_core_key {
+++	struct poly1305_key key;
+++	struct poly1305_key precomputed_s;
++ };
++ 
++ struct poly1305_state {
++-	u32 h[5];	/* accumulator, base 2^26 */
+++	union {
+++		u32 h[5];
+++		u64 h64[3];
+++	};
++ };
++ 
++ struct poly1305_desc_ctx {
++@@ -35,7 +52,10 @@ struct poly1305_desc_ctx {
++ 	/* accumulator */
++ 	struct poly1305_state h;
++ 	/* key */
++-	struct poly1305_key r[CONFIG_CRYPTO_LIB_POLY1305_RSIZE];
+++	union {
+++		struct poly1305_key opaque_r[CONFIG_CRYPTO_LIB_POLY1305_RSIZE];
+++		struct poly1305_core_key core_r;
+++	};
++ };
++ 
++ void poly1305_init_arch(struct poly1305_desc_ctx *desc, const u8 *key);
++--- a/lib/crypto/Makefile
+++++ b/lib/crypto/Makefile
++@@ -28,7 +28,9 @@ obj-$(CONFIG_CRYPTO_LIB_DES)			+= libdes
++ libdes-y					:= des.o
++ 
++ obj-$(CONFIG_CRYPTO_LIB_POLY1305_GENERIC)	+= libpoly1305.o
++-libpoly1305-y					:= poly1305.o
+++libpoly1305-y					:= poly1305-donna32.o
+++libpoly1305-$(CONFIG_ARCH_SUPPORTS_INT128)	:= poly1305-donna64.o
+++libpoly1305-y					+= poly1305.o
++ 
++ obj-$(CONFIG_CRYPTO_LIB_SHA256)			+= libsha256.o
++ libsha256-y					:= sha256.o
++--- /dev/null
+++++ b/lib/crypto/poly1305-donna32.c
++@@ -0,0 +1,204 @@
+++// SPDX-License-Identifier: GPL-2.0 OR MIT
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ *
+++ * This is based in part on Andrew Moon's poly1305-donna, which is in the
+++ * public domain.
+++ */
+++
+++#include <linux/kernel.h>
+++#include <asm/unaligned.h>
+++#include <crypto/internal/poly1305.h>
+++
+++void poly1305_core_setkey(struct poly1305_core_key *key, const u8 raw_key[16])
+++{
+++	/* r &= 0xffffffc0ffffffc0ffffffc0fffffff */
+++	key->key.r[0] = (get_unaligned_le32(&raw_key[0])) & 0x3ffffff;
+++	key->key.r[1] = (get_unaligned_le32(&raw_key[3]) >> 2) & 0x3ffff03;
+++	key->key.r[2] = (get_unaligned_le32(&raw_key[6]) >> 4) & 0x3ffc0ff;
+++	key->key.r[3] = (get_unaligned_le32(&raw_key[9]) >> 6) & 0x3f03fff;
+++	key->key.r[4] = (get_unaligned_le32(&raw_key[12]) >> 8) & 0x00fffff;
+++
+++	/* s = 5*r */
+++	key->precomputed_s.r[0] = key->key.r[1] * 5;
+++	key->precomputed_s.r[1] = key->key.r[2] * 5;
+++	key->precomputed_s.r[2] = key->key.r[3] * 5;
+++	key->precomputed_s.r[3] = key->key.r[4] * 5;
+++}
+++EXPORT_SYMBOL(poly1305_core_setkey);
+++
+++void poly1305_core_blocks(struct poly1305_state *state,
+++			  const struct poly1305_core_key *key, const void *src,
+++			  unsigned int nblocks, u32 hibit)
+++{
+++	const u8 *input = src;
+++	u32 r0, r1, r2, r3, r4;
+++	u32 s1, s2, s3, s4;
+++	u32 h0, h1, h2, h3, h4;
+++	u64 d0, d1, d2, d3, d4;
+++	u32 c;
+++
+++	if (!nblocks)
+++		return;
+++
+++	hibit <<= 24;
+++
+++	r0 = key->key.r[0];
+++	r1 = key->key.r[1];
+++	r2 = key->key.r[2];
+++	r3 = key->key.r[3];
+++	r4 = key->key.r[4];
+++
+++	s1 = key->precomputed_s.r[0];
+++	s2 = key->precomputed_s.r[1];
+++	s3 = key->precomputed_s.r[2];
+++	s4 = key->precomputed_s.r[3];
+++
+++	h0 = state->h[0];
+++	h1 = state->h[1];
+++	h2 = state->h[2];
+++	h3 = state->h[3];
+++	h4 = state->h[4];
+++
+++	do {
+++		/* h += m[i] */
+++		h0 += (get_unaligned_le32(&input[0])) & 0x3ffffff;
+++		h1 += (get_unaligned_le32(&input[3]) >> 2) & 0x3ffffff;
+++		h2 += (get_unaligned_le32(&input[6]) >> 4) & 0x3ffffff;
+++		h3 += (get_unaligned_le32(&input[9]) >> 6) & 0x3ffffff;
+++		h4 += (get_unaligned_le32(&input[12]) >> 8) | hibit;
+++
+++		/* h *= r */
+++		d0 = ((u64)h0 * r0) + ((u64)h1 * s4) +
+++		     ((u64)h2 * s3) + ((u64)h3 * s2) +
+++		     ((u64)h4 * s1);
+++		d1 = ((u64)h0 * r1) + ((u64)h1 * r0) +
+++		     ((u64)h2 * s4) + ((u64)h3 * s3) +
+++		     ((u64)h4 * s2);
+++		d2 = ((u64)h0 * r2) + ((u64)h1 * r1) +
+++		     ((u64)h2 * r0) + ((u64)h3 * s4) +
+++		     ((u64)h4 * s3);
+++		d3 = ((u64)h0 * r3) + ((u64)h1 * r2) +
+++		     ((u64)h2 * r1) + ((u64)h3 * r0) +
+++		     ((u64)h4 * s4);
+++		d4 = ((u64)h0 * r4) + ((u64)h1 * r3) +
+++		     ((u64)h2 * r2) + ((u64)h3 * r1) +
+++		     ((u64)h4 * r0);
+++
+++		/* (partial) h %= p */
+++		c = (u32)(d0 >> 26);
+++		h0 = (u32)d0 & 0x3ffffff;
+++		d1 += c;
+++		c = (u32)(d1 >> 26);
+++		h1 = (u32)d1 & 0x3ffffff;
+++		d2 += c;
+++		c = (u32)(d2 >> 26);
+++		h2 = (u32)d2 & 0x3ffffff;
+++		d3 += c;
+++		c = (u32)(d3 >> 26);
+++		h3 = (u32)d3 & 0x3ffffff;
+++		d4 += c;
+++		c = (u32)(d4 >> 26);
+++		h4 = (u32)d4 & 0x3ffffff;
+++		h0 += c * 5;
+++		c = (h0 >> 26);
+++		h0 = h0 & 0x3ffffff;
+++		h1 += c;
+++
+++		input += POLY1305_BLOCK_SIZE;
+++	} while (--nblocks);
+++
+++	state->h[0] = h0;
+++	state->h[1] = h1;
+++	state->h[2] = h2;
+++	state->h[3] = h3;
+++	state->h[4] = h4;
+++}
+++EXPORT_SYMBOL(poly1305_core_blocks);
+++
+++void poly1305_core_emit(const struct poly1305_state *state, const u32 nonce[4],
+++			void *dst)
+++{
+++	u8 *mac = dst;
+++	u32 h0, h1, h2, h3, h4, c;
+++	u32 g0, g1, g2, g3, g4;
+++	u64 f;
+++	u32 mask;
+++
+++	/* fully carry h */
+++	h0 = state->h[0];
+++	h1 = state->h[1];
+++	h2 = state->h[2];
+++	h3 = state->h[3];
+++	h4 = state->h[4];
+++
+++	c = h1 >> 26;
+++	h1 = h1 & 0x3ffffff;
+++	h2 += c;
+++	c = h2 >> 26;
+++	h2 = h2 & 0x3ffffff;
+++	h3 += c;
+++	c = h3 >> 26;
+++	h3 = h3 & 0x3ffffff;
+++	h4 += c;
+++	c = h4 >> 26;
+++	h4 = h4 & 0x3ffffff;
+++	h0 += c * 5;
+++	c = h0 >> 26;
+++	h0 = h0 & 0x3ffffff;
+++	h1 += c;
+++
+++	/* compute h + -p */
+++	g0 = h0 + 5;
+++	c = g0 >> 26;
+++	g0 &= 0x3ffffff;
+++	g1 = h1 + c;
+++	c = g1 >> 26;
+++	g1 &= 0x3ffffff;
+++	g2 = h2 + c;
+++	c = g2 >> 26;
+++	g2 &= 0x3ffffff;
+++	g3 = h3 + c;
+++	c = g3 >> 26;
+++	g3 &= 0x3ffffff;
+++	g4 = h4 + c - (1UL << 26);
+++
+++	/* select h if h < p, or h + -p if h >= p */
+++	mask = (g4 >> ((sizeof(u32) * 8) - 1)) - 1;
+++	g0 &= mask;
+++	g1 &= mask;
+++	g2 &= mask;
+++	g3 &= mask;
+++	g4 &= mask;
+++	mask = ~mask;
+++
+++	h0 = (h0 & mask) | g0;
+++	h1 = (h1 & mask) | g1;
+++	h2 = (h2 & mask) | g2;
+++	h3 = (h3 & mask) | g3;
+++	h4 = (h4 & mask) | g4;
+++
+++	/* h = h % (2^128) */
+++	h0 = ((h0) | (h1 << 26)) & 0xffffffff;
+++	h1 = ((h1 >> 6) | (h2 << 20)) & 0xffffffff;
+++	h2 = ((h2 >> 12) | (h3 << 14)) & 0xffffffff;
+++	h3 = ((h3 >> 18) | (h4 << 8)) & 0xffffffff;
+++
+++	if (likely(nonce)) {
+++		/* mac = (h + nonce) % (2^128) */
+++		f = (u64)h0 + nonce[0];
+++		h0 = (u32)f;
+++		f = (u64)h1 + nonce[1] + (f >> 32);
+++		h1 = (u32)f;
+++		f = (u64)h2 + nonce[2] + (f >> 32);
+++		h2 = (u32)f;
+++		f = (u64)h3 + nonce[3] + (f >> 32);
+++		h3 = (u32)f;
+++	}
+++
+++	put_unaligned_le32(h0, &mac[0]);
+++	put_unaligned_le32(h1, &mac[4]);
+++	put_unaligned_le32(h2, &mac[8]);
+++	put_unaligned_le32(h3, &mac[12]);
+++}
+++EXPORT_SYMBOL(poly1305_core_emit);
++--- /dev/null
+++++ b/lib/crypto/poly1305-donna64.c
++@@ -0,0 +1,185 @@
+++// SPDX-License-Identifier: GPL-2.0 OR MIT
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ *
+++ * This is based in part on Andrew Moon's poly1305-donna, which is in the
+++ * public domain.
+++ */
+++
+++#include <linux/kernel.h>
+++#include <asm/unaligned.h>
+++#include <crypto/internal/poly1305.h>
+++
+++typedef __uint128_t u128;
+++
+++void poly1305_core_setkey(struct poly1305_core_key *key, const u8 raw_key[16])
+++{
+++	u64 t0, t1;
+++
+++	/* r &= 0xffffffc0ffffffc0ffffffc0fffffff */
+++	t0 = get_unaligned_le64(&raw_key[0]);
+++	t1 = get_unaligned_le64(&raw_key[8]);
+++
+++	key->key.r64[0] = t0 & 0xffc0fffffffULL;
+++	key->key.r64[1] = ((t0 >> 44) | (t1 << 20)) & 0xfffffc0ffffULL;
+++	key->key.r64[2] = ((t1 >> 24)) & 0x00ffffffc0fULL;
+++
+++	/* s = 20*r */
+++	key->precomputed_s.r64[0] = key->key.r64[1] * 20;
+++	key->precomputed_s.r64[1] = key->key.r64[2] * 20;
+++}
+++EXPORT_SYMBOL(poly1305_core_setkey);
+++
+++void poly1305_core_blocks(struct poly1305_state *state,
+++			  const struct poly1305_core_key *key, const void *src,
+++			  unsigned int nblocks, u32 hibit)
+++{
+++	const u8 *input = src;
+++	u64 hibit64;
+++	u64 r0, r1, r2;
+++	u64 s1, s2;
+++	u64 h0, h1, h2;
+++	u64 c;
+++	u128 d0, d1, d2, d;
+++
+++	if (!nblocks)
+++		return;
+++
+++	hibit64 = ((u64)hibit) << 40;
+++
+++	r0 = key->key.r64[0];
+++	r1 = key->key.r64[1];
+++	r2 = key->key.r64[2];
+++
+++	h0 = state->h64[0];
+++	h1 = state->h64[1];
+++	h2 = state->h64[2];
+++
+++	s1 = key->precomputed_s.r64[0];
+++	s2 = key->precomputed_s.r64[1];
+++
+++	do {
+++		u64 t0, t1;
+++
+++		/* h += m[i] */
+++		t0 = get_unaligned_le64(&input[0]);
+++		t1 = get_unaligned_le64(&input[8]);
+++
+++		h0 += t0 & 0xfffffffffffULL;
+++		h1 += ((t0 >> 44) | (t1 << 20)) & 0xfffffffffffULL;
+++		h2 += (((t1 >> 24)) & 0x3ffffffffffULL) | hibit64;
+++
+++		/* h *= r */
+++		d0 = (u128)h0 * r0;
+++		d = (u128)h1 * s2;
+++		d0 += d;
+++		d = (u128)h2 * s1;
+++		d0 += d;
+++		d1 = (u128)h0 * r1;
+++		d = (u128)h1 * r0;
+++		d1 += d;
+++		d = (u128)h2 * s2;
+++		d1 += d;
+++		d2 = (u128)h0 * r2;
+++		d = (u128)h1 * r1;
+++		d2 += d;
+++		d = (u128)h2 * r0;
+++		d2 += d;
+++
+++		/* (partial) h %= p */
+++		c = (u64)(d0 >> 44);
+++		h0 = (u64)d0 & 0xfffffffffffULL;
+++		d1 += c;
+++		c = (u64)(d1 >> 44);
+++		h1 = (u64)d1 & 0xfffffffffffULL;
+++		d2 += c;
+++		c = (u64)(d2 >> 42);
+++		h2 = (u64)d2 & 0x3ffffffffffULL;
+++		h0 += c * 5;
+++		c = h0 >> 44;
+++		h0 = h0 & 0xfffffffffffULL;
+++		h1 += c;
+++
+++		input += POLY1305_BLOCK_SIZE;
+++	} while (--nblocks);
+++
+++	state->h64[0] = h0;
+++	state->h64[1] = h1;
+++	state->h64[2] = h2;
+++}
+++EXPORT_SYMBOL(poly1305_core_blocks);
+++
+++void poly1305_core_emit(const struct poly1305_state *state, const u32 nonce[4],
+++			void *dst)
+++{
+++	u8 *mac = dst;
+++	u64 h0, h1, h2, c;
+++	u64 g0, g1, g2;
+++	u64 t0, t1;
+++
+++	/* fully carry h */
+++	h0 = state->h64[0];
+++	h1 = state->h64[1];
+++	h2 = state->h64[2];
+++
+++	c = h1 >> 44;
+++	h1 &= 0xfffffffffffULL;
+++	h2 += c;
+++	c = h2 >> 42;
+++	h2 &= 0x3ffffffffffULL;
+++	h0 += c * 5;
+++	c = h0 >> 44;
+++	h0 &= 0xfffffffffffULL;
+++	h1 += c;
+++	c = h1 >> 44;
+++	h1 &= 0xfffffffffffULL;
+++	h2 += c;
+++	c = h2 >> 42;
+++	h2 &= 0x3ffffffffffULL;
+++	h0 += c * 5;
+++	c = h0 >> 44;
+++	h0 &= 0xfffffffffffULL;
+++	h1 += c;
+++
+++	/* compute h + -p */
+++	g0 = h0 + 5;
+++	c  = g0 >> 44;
+++	g0 &= 0xfffffffffffULL;
+++	g1 = h1 + c;
+++	c  = g1 >> 44;
+++	g1 &= 0xfffffffffffULL;
+++	g2 = h2 + c - (1ULL << 42);
+++
+++	/* select h if h < p, or h + -p if h >= p */
+++	c = (g2 >> ((sizeof(u64) * 8) - 1)) - 1;
+++	g0 &= c;
+++	g1 &= c;
+++	g2 &= c;
+++	c  = ~c;
+++	h0 = (h0 & c) | g0;
+++	h1 = (h1 & c) | g1;
+++	h2 = (h2 & c) | g2;
+++
+++	if (likely(nonce)) {
+++		/* h = (h + nonce) */
+++		t0 = ((u64)nonce[1] << 32) | nonce[0];
+++		t1 = ((u64)nonce[3] << 32) | nonce[2];
+++
+++		h0 += t0 & 0xfffffffffffULL;
+++		c = h0 >> 44;
+++		h0 &= 0xfffffffffffULL;
+++		h1 += (((t0 >> 44) | (t1 << 20)) & 0xfffffffffffULL) + c;
+++		c = h1 >> 44;
+++		h1 &= 0xfffffffffffULL;
+++		h2 += (((t1 >> 24)) & 0x3ffffffffffULL) + c;
+++		h2 &= 0x3ffffffffffULL;
+++	}
+++
+++	/* mac = h % (2^128) */
+++	h0 = h0 | (h1 << 44);
+++	h1 = (h1 >> 20) | (h2 << 24);
+++
+++	put_unaligned_le64(h0, &mac[0]);
+++	put_unaligned_le64(h1, &mac[8]);
+++}
+++EXPORT_SYMBOL(poly1305_core_emit);
++--- a/lib/crypto/poly1305.c
+++++ b/lib/crypto/poly1305.c
++@@ -12,151 +12,9 @@
++ #include <linux/module.h>
++ #include <asm/unaligned.h>
++ 
++-static inline u64 mlt(u64 a, u64 b)
++-{
++-	return a * b;
++-}
++-
++-static inline u32 sr(u64 v, u_char n)
++-{
++-	return v >> n;
++-}
++-
++-static inline u32 and(u32 v, u32 mask)
++-{
++-	return v & mask;
++-}
++-
++-void poly1305_core_setkey(struct poly1305_key *key, const u8 *raw_key)
++-{
++-	/* r &= 0xffffffc0ffffffc0ffffffc0fffffff */
++-	key->r[0] = (get_unaligned_le32(raw_key +  0) >> 0) & 0x3ffffff;
++-	key->r[1] = (get_unaligned_le32(raw_key +  3) >> 2) & 0x3ffff03;
++-	key->r[2] = (get_unaligned_le32(raw_key +  6) >> 4) & 0x3ffc0ff;
++-	key->r[3] = (get_unaligned_le32(raw_key +  9) >> 6) & 0x3f03fff;
++-	key->r[4] = (get_unaligned_le32(raw_key + 12) >> 8) & 0x00fffff;
++-}
++-EXPORT_SYMBOL_GPL(poly1305_core_setkey);
++-
++-void poly1305_core_blocks(struct poly1305_state *state,
++-			  const struct poly1305_key *key, const void *src,
++-			  unsigned int nblocks, u32 hibit)
++-{
++-	u32 r0, r1, r2, r3, r4;
++-	u32 s1, s2, s3, s4;
++-	u32 h0, h1, h2, h3, h4;
++-	u64 d0, d1, d2, d3, d4;
++-
++-	if (!nblocks)
++-		return;
++-
++-	r0 = key->r[0];
++-	r1 = key->r[1];
++-	r2 = key->r[2];
++-	r3 = key->r[3];
++-	r4 = key->r[4];
++-
++-	s1 = r1 * 5;
++-	s2 = r2 * 5;
++-	s3 = r3 * 5;
++-	s4 = r4 * 5;
++-
++-	h0 = state->h[0];
++-	h1 = state->h[1];
++-	h2 = state->h[2];
++-	h3 = state->h[3];
++-	h4 = state->h[4];
++-
++-	do {
++-		/* h += m[i] */
++-		h0 += (get_unaligned_le32(src +  0) >> 0) & 0x3ffffff;
++-		h1 += (get_unaligned_le32(src +  3) >> 2) & 0x3ffffff;
++-		h2 += (get_unaligned_le32(src +  6) >> 4) & 0x3ffffff;
++-		h3 += (get_unaligned_le32(src +  9) >> 6) & 0x3ffffff;
++-		h4 += (get_unaligned_le32(src + 12) >> 8) | (hibit << 24);
++-
++-		/* h *= r */
++-		d0 = mlt(h0, r0) + mlt(h1, s4) + mlt(h2, s3) +
++-		     mlt(h3, s2) + mlt(h4, s1);
++-		d1 = mlt(h0, r1) + mlt(h1, r0) + mlt(h2, s4) +
++-		     mlt(h3, s3) + mlt(h4, s2);
++-		d2 = mlt(h0, r2) + mlt(h1, r1) + mlt(h2, r0) +
++-		     mlt(h3, s4) + mlt(h4, s3);
++-		d3 = mlt(h0, r3) + mlt(h1, r2) + mlt(h2, r1) +
++-		     mlt(h3, r0) + mlt(h4, s4);
++-		d4 = mlt(h0, r4) + mlt(h1, r3) + mlt(h2, r2) +
++-		     mlt(h3, r1) + mlt(h4, r0);
++-
++-		/* (partial) h %= p */
++-		d1 += sr(d0, 26);     h0 = and(d0, 0x3ffffff);
++-		d2 += sr(d1, 26);     h1 = and(d1, 0x3ffffff);
++-		d3 += sr(d2, 26);     h2 = and(d2, 0x3ffffff);
++-		d4 += sr(d3, 26);     h3 = and(d3, 0x3ffffff);
++-		h0 += sr(d4, 26) * 5; h4 = and(d4, 0x3ffffff);
++-		h1 += h0 >> 26;       h0 = h0 & 0x3ffffff;
++-
++-		src += POLY1305_BLOCK_SIZE;
++-	} while (--nblocks);
++-
++-	state->h[0] = h0;
++-	state->h[1] = h1;
++-	state->h[2] = h2;
++-	state->h[3] = h3;
++-	state->h[4] = h4;
++-}
++-EXPORT_SYMBOL_GPL(poly1305_core_blocks);
++-
++-void poly1305_core_emit(const struct poly1305_state *state, void *dst)
++-{
++-	u32 h0, h1, h2, h3, h4;
++-	u32 g0, g1, g2, g3, g4;
++-	u32 mask;
++-
++-	/* fully carry h */
++-	h0 = state->h[0];
++-	h1 = state->h[1];
++-	h2 = state->h[2];
++-	h3 = state->h[3];
++-	h4 = state->h[4];
++-
++-	h2 += (h1 >> 26);     h1 = h1 & 0x3ffffff;
++-	h3 += (h2 >> 26);     h2 = h2 & 0x3ffffff;
++-	h4 += (h3 >> 26);     h3 = h3 & 0x3ffffff;
++-	h0 += (h4 >> 26) * 5; h4 = h4 & 0x3ffffff;
++-	h1 += (h0 >> 26);     h0 = h0 & 0x3ffffff;
++-
++-	/* compute h + -p */
++-	g0 = h0 + 5;
++-	g1 = h1 + (g0 >> 26);             g0 &= 0x3ffffff;
++-	g2 = h2 + (g1 >> 26);             g1 &= 0x3ffffff;
++-	g3 = h3 + (g2 >> 26);             g2 &= 0x3ffffff;
++-	g4 = h4 + (g3 >> 26) - (1 << 26); g3 &= 0x3ffffff;
++-
++-	/* select h if h < p, or h + -p if h >= p */
++-	mask = (g4 >> ((sizeof(u32) * 8) - 1)) - 1;
++-	g0 &= mask;
++-	g1 &= mask;
++-	g2 &= mask;
++-	g3 &= mask;
++-	g4 &= mask;
++-	mask = ~mask;
++-	h0 = (h0 & mask) | g0;
++-	h1 = (h1 & mask) | g1;
++-	h2 = (h2 & mask) | g2;
++-	h3 = (h3 & mask) | g3;
++-	h4 = (h4 & mask) | g4;
++-
++-	/* h = h % (2^128) */
++-	put_unaligned_le32((h0 >>  0) | (h1 << 26), dst +  0);
++-	put_unaligned_le32((h1 >>  6) | (h2 << 20), dst +  4);
++-	put_unaligned_le32((h2 >> 12) | (h3 << 14), dst +  8);
++-	put_unaligned_le32((h3 >> 18) | (h4 <<  8), dst + 12);
++-}
++-EXPORT_SYMBOL_GPL(poly1305_core_emit);
++-
++ void poly1305_init_generic(struct poly1305_desc_ctx *desc, const u8 *key)
++ {
++-	poly1305_core_setkey(desc->r, key);
+++	poly1305_core_setkey(&desc->core_r, key);
++ 	desc->s[0] = get_unaligned_le32(key + 16);
++ 	desc->s[1] = get_unaligned_le32(key + 20);
++ 	desc->s[2] = get_unaligned_le32(key + 24);
++@@ -164,7 +22,7 @@ void poly1305_init_generic(struct poly13
++ 	poly1305_core_init(&desc->h);
++ 	desc->buflen = 0;
++ 	desc->sset = true;
++-	desc->rset = 1;
+++	desc->rset = 2;
++ }
++ EXPORT_SYMBOL_GPL(poly1305_init_generic);
++ 
++@@ -181,13 +39,14 @@ void poly1305_update_generic(struct poly
++ 		desc->buflen += bytes;
++ 
++ 		if (desc->buflen == POLY1305_BLOCK_SIZE) {
++-			poly1305_core_blocks(&desc->h, desc->r, desc->buf, 1, 1);
+++			poly1305_core_blocks(&desc->h, &desc->core_r, desc->buf,
+++					     1, 1);
++ 			desc->buflen = 0;
++ 		}
++ 	}
++ 
++ 	if (likely(nbytes >= POLY1305_BLOCK_SIZE)) {
++-		poly1305_core_blocks(&desc->h, desc->r, src,
+++		poly1305_core_blocks(&desc->h, &desc->core_r, src,
++ 				     nbytes / POLY1305_BLOCK_SIZE, 1);
++ 		src += nbytes - (nbytes % POLY1305_BLOCK_SIZE);
++ 		nbytes %= POLY1305_BLOCK_SIZE;
++@@ -202,28 +61,14 @@ EXPORT_SYMBOL_GPL(poly1305_update_generi
++ 
++ void poly1305_final_generic(struct poly1305_desc_ctx *desc, u8 *dst)
++ {
++-	__le32 digest[4];
++-	u64 f = 0;
++-
++ 	if (unlikely(desc->buflen)) {
++ 		desc->buf[desc->buflen++] = 1;
++ 		memset(desc->buf + desc->buflen, 0,
++ 		       POLY1305_BLOCK_SIZE - desc->buflen);
++-		poly1305_core_blocks(&desc->h, desc->r, desc->buf, 1, 0);
+++		poly1305_core_blocks(&desc->h, &desc->core_r, desc->buf, 1, 0);
++ 	}
++ 
++-	poly1305_core_emit(&desc->h, digest);
++-
++-	/* mac = (h + s) % (2^128) */
++-	f = (f >> 32) + le32_to_cpu(digest[0]) + desc->s[0];
++-	put_unaligned_le32(f, dst + 0);
++-	f = (f >> 32) + le32_to_cpu(digest[1]) + desc->s[1];
++-	put_unaligned_le32(f, dst + 4);
++-	f = (f >> 32) + le32_to_cpu(digest[2]) + desc->s[2];
++-	put_unaligned_le32(f, dst + 8);
++-	f = (f >> 32) + le32_to_cpu(digest[3]) + desc->s[3];
++-	put_unaligned_le32(f, dst + 12);
++-
+++	poly1305_core_emit(&desc->h, desc->s, dst);
++ 	*desc = (struct poly1305_desc_ctx){};
++ }
++ EXPORT_SYMBOL_GPL(poly1305_final_generic);
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0042-crypto-x86-poly1305-import-unmodified-cryptogams-imp.patch b/target/linux/generic/backport-5.4/080-wireguard-0042-crypto-x86-poly1305-import-unmodified-cryptogams-imp.patch
+new file mode 100644
+index 0000000000..8e52383ae1
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0042-crypto-x86-poly1305-import-unmodified-cryptogams-imp.patch
+@@ -0,0 +1,4183 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Sun, 5 Jan 2020 22:40:47 -0500
++Subject: [PATCH] crypto: x86/poly1305 - import unmodified cryptogams
++ implementation
++
++commit 0896ca2a0cb6127e8a129f1f2a680d49b6b0f65c upstream.
++
++These x86_64 vectorized implementations come from Andy Polyakov's
++CRYPTOGAMS implementation, and are included here in raw form without
++modification, so that subsequent commits that fix these up for the
++kernel can see how it has changed.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/poly1305-x86_64-cryptogams.pl | 4159 +++++++++++++++++
++ 1 file changed, 4159 insertions(+)
++ create mode 100644 arch/x86/crypto/poly1305-x86_64-cryptogams.pl
++
++--- /dev/null
+++++ b/arch/x86/crypto/poly1305-x86_64-cryptogams.pl
++@@ -0,0 +1,4159 @@
+++#! /usr/bin/env perl
+++# Copyright 2016-2018 The OpenSSL Project Authors. All Rights Reserved.
+++#
+++# Licensed under the OpenSSL license (the "License").  You may not use
+++# this file except in compliance with the License.  You can obtain a copy
+++# in the file LICENSE in the source distribution or at
+++# https://www.openssl.org/source/license.html
+++
+++#
+++# ====================================================================
+++# Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
+++# project. The module is, however, dual licensed under OpenSSL and
+++# CRYPTOGAMS licenses depending on where you obtain it. For further
+++# details see http://www.openssl.org/~appro/cryptogams/.
+++# ====================================================================
+++#
+++# This module implements Poly1305 hash for x86_64.
+++#
+++# March 2015
+++#
+++# Initial release.
+++#
+++# December 2016
+++#
+++# Add AVX512F+VL+BW code path.
+++#
+++# November 2017
+++#
+++# Convert AVX512F+VL+BW code path to pure AVX512F, so that it can be
+++# executed even on Knights Landing. Trigger for modification was
+++# observation that AVX512 code paths can negatively affect overall
+++# Skylake-X system performance. Since we are likely to suppress
+++# AVX512F capability flag [at least on Skylake-X], conversion serves
+++# as kind of "investment protection". Note that next *lake processor,
+++# Cannolake, has AVX512IFMA code path to execute...
+++#
+++# Numbers are cycles per processed byte with poly1305_blocks alone,
+++# measured with rdtsc at fixed clock frequency.
+++#
+++#		IALU/gcc-4.8(*)	AVX(**)		AVX2	AVX-512
+++# P4		4.46/+120%	-
+++# Core 2	2.41/+90%	-
+++# Westmere	1.88/+120%	-
+++# Sandy Bridge	1.39/+140%	1.10
+++# Haswell	1.14/+175%	1.11		0.65
+++# Skylake[-X]	1.13/+120%	0.96		0.51	[0.35]
+++# Silvermont	2.83/+95%	-
+++# Knights L	3.60/?		1.65		1.10	0.41(***)
+++# Goldmont	1.70/+180%	-
+++# VIA Nano	1.82/+150%	-
+++# Sledgehammer	1.38/+160%	-
+++# Bulldozer	2.30/+130%	0.97
+++# Ryzen		1.15/+200%	1.08		1.18
+++#
+++# (*)	improvement coefficients relative to clang are more modest and
+++#	are ~50% on most processors, in both cases we are comparing to
+++#	__int128 code;
+++# (**)	SSE2 implementation was attempted, but among non-AVX processors
+++#	it was faster than integer-only code only on older Intel P4 and
+++#	Core processors, 50-30%, less newer processor is, but slower on
+++#	contemporary ones, for example almost 2x slower on Atom, and as
+++#	former are naturally disappearing, SSE2 is deemed unnecessary;
+++# (***)	strangely enough performance seems to vary from core to core,
+++#	listed result is best case;
+++
+++$flavour = shift;
+++$output  = shift;
+++if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
+++
+++$win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
+++
+++$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
+++( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
+++( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
+++die "can't locate x86_64-xlate.pl";
+++
+++if (`$ENV{CC} -Wa,-v -c -o /dev/null -x assembler /dev/null 2>&1`
+++		=~ /GNU assembler version ([2-9]\.[0-9]+)/) {
+++	$avx = ($1>=2.19) + ($1>=2.22) + ($1>=2.25) + ($1>=2.26);
+++}
+++
+++if (!$avx && $win64 && ($flavour =~ /nasm/ || $ENV{ASM} =~ /nasm/) &&
+++	   `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)(?:\.([0-9]+))?/) {
+++	$avx = ($1>=2.09) + ($1>=2.10) + 2 * ($1>=2.12);
+++	$avx += 2 if ($1==2.11 && $2>=8);
+++}
+++
+++if (!$avx && $win64 && ($flavour =~ /masm/ || $ENV{ASM} =~ /ml64/) &&
+++	   `ml64 2>&1` =~ /Version ([0-9]+)\./) {
+++	$avx = ($1>=10) + ($1>=12);
+++}
+++
+++if (!$avx && `$ENV{CC} -v 2>&1` =~ /((?:^clang|LLVM) version|.*based on LLVM) ([3-9]\.[0-9]+)/) {
+++	$avx = ($2>=3.0) + ($2>3.0);
+++}
+++
+++open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\"";
+++*STDOUT=*OUT;
+++
+++my ($ctx,$inp,$len,$padbit)=("%rdi","%rsi","%rdx","%rcx");
+++my ($mac,$nonce)=($inp,$len);	# *_emit arguments
+++my ($d1,$d2,$d3, $r0,$r1,$s1)=map("%r$_",(8..13));
+++my ($h0,$h1,$h2)=("%r14","%rbx","%rbp");
+++
+++sub poly1305_iteration {
+++# input:	copy of $r1 in %rax, $h0-$h2, $r0-$r1
+++# output:	$h0-$h2 *= $r0-$r1
+++$code.=<<___;
+++	mulq	$h0			# h0*r1
+++	mov	%rax,$d2
+++	 mov	$r0,%rax
+++	mov	%rdx,$d3
+++
+++	mulq	$h0			# h0*r0
+++	mov	%rax,$h0		# future $h0
+++	 mov	$r0,%rax
+++	mov	%rdx,$d1
+++
+++	mulq	$h1			# h1*r0
+++	add	%rax,$d2
+++	 mov	$s1,%rax
+++	adc	%rdx,$d3
+++
+++	mulq	$h1			# h1*s1
+++	 mov	$h2,$h1			# borrow $h1
+++	add	%rax,$h0
+++	adc	%rdx,$d1
+++
+++	imulq	$s1,$h1			# h2*s1
+++	add	$h1,$d2
+++	 mov	$d1,$h1
+++	adc	\$0,$d3
+++
+++	imulq	$r0,$h2			# h2*r0
+++	add	$d2,$h1
+++	mov	\$-4,%rax		# mask value
+++	adc	$h2,$d3
+++
+++	and	$d3,%rax		# last reduction step
+++	mov	$d3,$h2
+++	shr	\$2,$d3
+++	and	\$3,$h2
+++	add	$d3,%rax
+++	add	%rax,$h0
+++	adc	\$0,$h1
+++	adc	\$0,$h2
+++___
+++}
+++
+++########################################################################
+++# Layout of opaque area is following.
+++#
+++#	unsigned __int64 h[3];		# current hash value base 2^64
+++#	unsigned __int64 r[2];		# key value base 2^64
+++
+++$code.=<<___;
+++.text
+++
+++.extern	OPENSSL_ia32cap_P
+++
+++.globl	poly1305_init
+++.hidden	poly1305_init
+++.globl	poly1305_blocks
+++.hidden	poly1305_blocks
+++.globl	poly1305_emit
+++.hidden	poly1305_emit
+++
+++.type	poly1305_init,\@function,3
+++.align	32
+++poly1305_init:
+++	xor	%rax,%rax
+++	mov	%rax,0($ctx)		# initialize hash value
+++	mov	%rax,8($ctx)
+++	mov	%rax,16($ctx)
+++
+++	cmp	\$0,$inp
+++	je	.Lno_key
+++
+++	lea	poly1305_blocks(%rip),%r10
+++	lea	poly1305_emit(%rip),%r11
+++___
+++$code.=<<___	if ($avx);
+++	mov	OPENSSL_ia32cap_P+4(%rip),%r9
+++	lea	poly1305_blocks_avx(%rip),%rax
+++	lea	poly1305_emit_avx(%rip),%rcx
+++	bt	\$`60-32`,%r9		# AVX?
+++	cmovc	%rax,%r10
+++	cmovc	%rcx,%r11
+++___
+++$code.=<<___	if ($avx>1);
+++	lea	poly1305_blocks_avx2(%rip),%rax
+++	bt	\$`5+32`,%r9		# AVX2?
+++	cmovc	%rax,%r10
+++___
+++$code.=<<___	if ($avx>3);
+++	mov	\$`(1<<31|1<<21|1<<16)`,%rax
+++	shr	\$32,%r9
+++	and	%rax,%r9
+++	cmp	%rax,%r9
+++	je	.Linit_base2_44
+++___
+++$code.=<<___;
+++	mov	\$0x0ffffffc0fffffff,%rax
+++	mov	\$0x0ffffffc0ffffffc,%rcx
+++	and	0($inp),%rax
+++	and	8($inp),%rcx
+++	mov	%rax,24($ctx)
+++	mov	%rcx,32($ctx)
+++___
+++$code.=<<___	if ($flavour !~ /elf32/);
+++	mov	%r10,0(%rdx)
+++	mov	%r11,8(%rdx)
+++___
+++$code.=<<___	if ($flavour =~ /elf32/);
+++	mov	%r10d,0(%rdx)
+++	mov	%r11d,4(%rdx)
+++___
+++$code.=<<___;
+++	mov	\$1,%eax
+++.Lno_key:
+++	ret
+++.size	poly1305_init,.-poly1305_init
+++
+++.type	poly1305_blocks,\@function,4
+++.align	32
+++poly1305_blocks:
+++.cfi_startproc
+++.Lblocks:
+++	shr	\$4,$len
+++	jz	.Lno_data		# too short
+++
+++	push	%rbx
+++.cfi_push	%rbx
+++	push	%rbp
+++.cfi_push	%rbp
+++	push	%r12
+++.cfi_push	%r12
+++	push	%r13
+++.cfi_push	%r13
+++	push	%r14
+++.cfi_push	%r14
+++	push	%r15
+++.cfi_push	%r15
+++.Lblocks_body:
+++
+++	mov	$len,%r15		# reassign $len
+++
+++	mov	24($ctx),$r0		# load r
+++	mov	32($ctx),$s1
+++
+++	mov	0($ctx),$h0		# load hash value
+++	mov	8($ctx),$h1
+++	mov	16($ctx),$h2
+++
+++	mov	$s1,$r1
+++	shr	\$2,$s1
+++	mov	$r1,%rax
+++	add	$r1,$s1			# s1 = r1 + (r1 >> 2)
+++	jmp	.Loop
+++
+++.align	32
+++.Loop:
+++	add	0($inp),$h0		# accumulate input
+++	adc	8($inp),$h1
+++	lea	16($inp),$inp
+++	adc	$padbit,$h2
+++___
+++	&poly1305_iteration();
+++$code.=<<___;
+++	mov	$r1,%rax
+++	dec	%r15			# len-=16
+++	jnz	.Loop
+++
+++	mov	$h0,0($ctx)		# store hash value
+++	mov	$h1,8($ctx)
+++	mov	$h2,16($ctx)
+++
+++	mov	0(%rsp),%r15
+++.cfi_restore	%r15
+++	mov	8(%rsp),%r14
+++.cfi_restore	%r14
+++	mov	16(%rsp),%r13
+++.cfi_restore	%r13
+++	mov	24(%rsp),%r12
+++.cfi_restore	%r12
+++	mov	32(%rsp),%rbp
+++.cfi_restore	%rbp
+++	mov	40(%rsp),%rbx
+++.cfi_restore	%rbx
+++	lea	48(%rsp),%rsp
+++.cfi_adjust_cfa_offset	-48
+++.Lno_data:
+++.Lblocks_epilogue:
+++	ret
+++.cfi_endproc
+++.size	poly1305_blocks,.-poly1305_blocks
+++
+++.type	poly1305_emit,\@function,3
+++.align	32
+++poly1305_emit:
+++.Lemit:
+++	mov	0($ctx),%r8	# load hash value
+++	mov	8($ctx),%r9
+++	mov	16($ctx),%r10
+++
+++	mov	%r8,%rax
+++	add	\$5,%r8		# compare to modulus
+++	mov	%r9,%rcx
+++	adc	\$0,%r9
+++	adc	\$0,%r10
+++	shr	\$2,%r10	# did 130-bit value overflow?
+++	cmovnz	%r8,%rax
+++	cmovnz	%r9,%rcx
+++
+++	add	0($nonce),%rax	# accumulate nonce
+++	adc	8($nonce),%rcx
+++	mov	%rax,0($mac)	# write result
+++	mov	%rcx,8($mac)
+++
+++	ret
+++.size	poly1305_emit,.-poly1305_emit
+++___
+++if ($avx) {
+++
+++########################################################################
+++# Layout of opaque area is following.
+++#
+++#	unsigned __int32 h[5];		# current hash value base 2^26
+++#	unsigned __int32 is_base2_26;
+++#	unsigned __int64 r[2];		# key value base 2^64
+++#	unsigned __int64 pad;
+++#	struct { unsigned __int32 r^2, r^1, r^4, r^3; } r[9];
+++#
+++# where r^n are base 2^26 digits of degrees of multiplier key. There are
+++# 5 digits, but last four are interleaved with multiples of 5, totalling
+++# in 9 elements: r0, r1, 5*r1, r2, 5*r2, r3, 5*r3, r4, 5*r4.
+++
+++my ($H0,$H1,$H2,$H3,$H4, $T0,$T1,$T2,$T3,$T4, $D0,$D1,$D2,$D3,$D4, $MASK) =
+++    map("%xmm$_",(0..15));
+++
+++$code.=<<___;
+++.type	__poly1305_block,\@abi-omnipotent
+++.align	32
+++__poly1305_block:
+++___
+++	&poly1305_iteration();
+++$code.=<<___;
+++	ret
+++.size	__poly1305_block,.-__poly1305_block
+++
+++.type	__poly1305_init_avx,\@abi-omnipotent
+++.align	32
+++__poly1305_init_avx:
+++	mov	$r0,$h0
+++	mov	$r1,$h1
+++	xor	$h2,$h2
+++
+++	lea	48+64($ctx),$ctx	# size optimization
+++
+++	mov	$r1,%rax
+++	call	__poly1305_block	# r^2
+++
+++	mov	\$0x3ffffff,%eax	# save interleaved r^2 and r base 2^26
+++	mov	\$0x3ffffff,%edx
+++	mov	$h0,$d1
+++	and	$h0#d,%eax
+++	mov	$r0,$d2
+++	and	$r0#d,%edx
+++	mov	%eax,`16*0+0-64`($ctx)
+++	shr	\$26,$d1
+++	mov	%edx,`16*0+4-64`($ctx)
+++	shr	\$26,$d2
+++
+++	mov	\$0x3ffffff,%eax
+++	mov	\$0x3ffffff,%edx
+++	and	$d1#d,%eax
+++	and	$d2#d,%edx
+++	mov	%eax,`16*1+0-64`($ctx)
+++	lea	(%rax,%rax,4),%eax	# *5
+++	mov	%edx,`16*1+4-64`($ctx)
+++	lea	(%rdx,%rdx,4),%edx	# *5
+++	mov	%eax,`16*2+0-64`($ctx)
+++	shr	\$26,$d1
+++	mov	%edx,`16*2+4-64`($ctx)
+++	shr	\$26,$d2
+++
+++	mov	$h1,%rax
+++	mov	$r1,%rdx
+++	shl	\$12,%rax
+++	shl	\$12,%rdx
+++	or	$d1,%rax
+++	or	$d2,%rdx
+++	and	\$0x3ffffff,%eax
+++	and	\$0x3ffffff,%edx
+++	mov	%eax,`16*3+0-64`($ctx)
+++	lea	(%rax,%rax,4),%eax	# *5
+++	mov	%edx,`16*3+4-64`($ctx)
+++	lea	(%rdx,%rdx,4),%edx	# *5
+++	mov	%eax,`16*4+0-64`($ctx)
+++	mov	$h1,$d1
+++	mov	%edx,`16*4+4-64`($ctx)
+++	mov	$r1,$d2
+++
+++	mov	\$0x3ffffff,%eax
+++	mov	\$0x3ffffff,%edx
+++	shr	\$14,$d1
+++	shr	\$14,$d2
+++	and	$d1#d,%eax
+++	and	$d2#d,%edx
+++	mov	%eax,`16*5+0-64`($ctx)
+++	lea	(%rax,%rax,4),%eax	# *5
+++	mov	%edx,`16*5+4-64`($ctx)
+++	lea	(%rdx,%rdx,4),%edx	# *5
+++	mov	%eax,`16*6+0-64`($ctx)
+++	shr	\$26,$d1
+++	mov	%edx,`16*6+4-64`($ctx)
+++	shr	\$26,$d2
+++
+++	mov	$h2,%rax
+++	shl	\$24,%rax
+++	or	%rax,$d1
+++	mov	$d1#d,`16*7+0-64`($ctx)
+++	lea	($d1,$d1,4),$d1		# *5
+++	mov	$d2#d,`16*7+4-64`($ctx)
+++	lea	($d2,$d2,4),$d2		# *5
+++	mov	$d1#d,`16*8+0-64`($ctx)
+++	mov	$d2#d,`16*8+4-64`($ctx)
+++
+++	mov	$r1,%rax
+++	call	__poly1305_block	# r^3
+++
+++	mov	\$0x3ffffff,%eax	# save r^3 base 2^26
+++	mov	$h0,$d1
+++	and	$h0#d,%eax
+++	shr	\$26,$d1
+++	mov	%eax,`16*0+12-64`($ctx)
+++
+++	mov	\$0x3ffffff,%edx
+++	and	$d1#d,%edx
+++	mov	%edx,`16*1+12-64`($ctx)
+++	lea	(%rdx,%rdx,4),%edx	# *5
+++	shr	\$26,$d1
+++	mov	%edx,`16*2+12-64`($ctx)
+++
+++	mov	$h1,%rax
+++	shl	\$12,%rax
+++	or	$d1,%rax
+++	and	\$0x3ffffff,%eax
+++	mov	%eax,`16*3+12-64`($ctx)
+++	lea	(%rax,%rax,4),%eax	# *5
+++	mov	$h1,$d1
+++	mov	%eax,`16*4+12-64`($ctx)
+++
+++	mov	\$0x3ffffff,%edx
+++	shr	\$14,$d1
+++	and	$d1#d,%edx
+++	mov	%edx,`16*5+12-64`($ctx)
+++	lea	(%rdx,%rdx,4),%edx	# *5
+++	shr	\$26,$d1
+++	mov	%edx,`16*6+12-64`($ctx)
+++
+++	mov	$h2,%rax
+++	shl	\$24,%rax
+++	or	%rax,$d1
+++	mov	$d1#d,`16*7+12-64`($ctx)
+++	lea	($d1,$d1,4),$d1		# *5
+++	mov	$d1#d,`16*8+12-64`($ctx)
+++
+++	mov	$r1,%rax
+++	call	__poly1305_block	# r^4
+++
+++	mov	\$0x3ffffff,%eax	# save r^4 base 2^26
+++	mov	$h0,$d1
+++	and	$h0#d,%eax
+++	shr	\$26,$d1
+++	mov	%eax,`16*0+8-64`($ctx)
+++
+++	mov	\$0x3ffffff,%edx
+++	and	$d1#d,%edx
+++	mov	%edx,`16*1+8-64`($ctx)
+++	lea	(%rdx,%rdx,4),%edx	# *5
+++	shr	\$26,$d1
+++	mov	%edx,`16*2+8-64`($ctx)
+++
+++	mov	$h1,%rax
+++	shl	\$12,%rax
+++	or	$d1,%rax
+++	and	\$0x3ffffff,%eax
+++	mov	%eax,`16*3+8-64`($ctx)
+++	lea	(%rax,%rax,4),%eax	# *5
+++	mov	$h1,$d1
+++	mov	%eax,`16*4+8-64`($ctx)
+++
+++	mov	\$0x3ffffff,%edx
+++	shr	\$14,$d1
+++	and	$d1#d,%edx
+++	mov	%edx,`16*5+8-64`($ctx)
+++	lea	(%rdx,%rdx,4),%edx	# *5
+++	shr	\$26,$d1
+++	mov	%edx,`16*6+8-64`($ctx)
+++
+++	mov	$h2,%rax
+++	shl	\$24,%rax
+++	or	%rax,$d1
+++	mov	$d1#d,`16*7+8-64`($ctx)
+++	lea	($d1,$d1,4),$d1		# *5
+++	mov	$d1#d,`16*8+8-64`($ctx)
+++
+++	lea	-48-64($ctx),$ctx	# size [de-]optimization
+++	ret
+++.size	__poly1305_init_avx,.-__poly1305_init_avx
+++
+++.type	poly1305_blocks_avx,\@function,4
+++.align	32
+++poly1305_blocks_avx:
+++.cfi_startproc
+++	mov	20($ctx),%r8d		# is_base2_26
+++	cmp	\$128,$len
+++	jae	.Lblocks_avx
+++	test	%r8d,%r8d
+++	jz	.Lblocks
+++
+++.Lblocks_avx:
+++	and	\$-16,$len
+++	jz	.Lno_data_avx
+++
+++	vzeroupper
+++
+++	test	%r8d,%r8d
+++	jz	.Lbase2_64_avx
+++
+++	test	\$31,$len
+++	jz	.Leven_avx
+++
+++	push	%rbx
+++.cfi_push	%rbx
+++	push	%rbp
+++.cfi_push	%rbp
+++	push	%r12
+++.cfi_push	%r12
+++	push	%r13
+++.cfi_push	%r13
+++	push	%r14
+++.cfi_push	%r14
+++	push	%r15
+++.cfi_push	%r15
+++.Lblocks_avx_body:
+++
+++	mov	$len,%r15		# reassign $len
+++
+++	mov	0($ctx),$d1		# load hash value
+++	mov	8($ctx),$d2
+++	mov	16($ctx),$h2#d
+++
+++	mov	24($ctx),$r0		# load r
+++	mov	32($ctx),$s1
+++
+++	################################# base 2^26 -> base 2^64
+++	mov	$d1#d,$h0#d
+++	and	\$`-1*(1<<31)`,$d1
+++	mov	$d2,$r1			# borrow $r1
+++	mov	$d2#d,$h1#d
+++	and	\$`-1*(1<<31)`,$d2
+++
+++	shr	\$6,$d1
+++	shl	\$52,$r1
+++	add	$d1,$h0
+++	shr	\$12,$h1
+++	shr	\$18,$d2
+++	add	$r1,$h0
+++	adc	$d2,$h1
+++
+++	mov	$h2,$d1
+++	shl	\$40,$d1
+++	shr	\$24,$h2
+++	add	$d1,$h1
+++	adc	\$0,$h2			# can be partially reduced...
+++
+++	mov	\$-4,$d2		# ... so reduce
+++	mov	$h2,$d1
+++	and	$h2,$d2
+++	shr	\$2,$d1
+++	and	\$3,$h2
+++	add	$d2,$d1			# =*5
+++	add	$d1,$h0
+++	adc	\$0,$h1
+++	adc	\$0,$h2
+++
+++	mov	$s1,$r1
+++	mov	$s1,%rax
+++	shr	\$2,$s1
+++	add	$r1,$s1			# s1 = r1 + (r1 >> 2)
+++
+++	add	0($inp),$h0		# accumulate input
+++	adc	8($inp),$h1
+++	lea	16($inp),$inp
+++	adc	$padbit,$h2
+++
+++	call	__poly1305_block
+++
+++	test	$padbit,$padbit		# if $padbit is zero,
+++	jz	.Lstore_base2_64_avx	# store hash in base 2^64 format
+++
+++	################################# base 2^64 -> base 2^26
+++	mov	$h0,%rax
+++	mov	$h0,%rdx
+++	shr	\$52,$h0
+++	mov	$h1,$r0
+++	mov	$h1,$r1
+++	shr	\$26,%rdx
+++	and	\$0x3ffffff,%rax	# h[0]
+++	shl	\$12,$r0
+++	and	\$0x3ffffff,%rdx	# h[1]
+++	shr	\$14,$h1
+++	or	$r0,$h0
+++	shl	\$24,$h2
+++	and	\$0x3ffffff,$h0		# h[2]
+++	shr	\$40,$r1
+++	and	\$0x3ffffff,$h1		# h[3]
+++	or	$r1,$h2			# h[4]
+++
+++	sub	\$16,%r15
+++	jz	.Lstore_base2_26_avx
+++
+++	vmovd	%rax#d,$H0
+++	vmovd	%rdx#d,$H1
+++	vmovd	$h0#d,$H2
+++	vmovd	$h1#d,$H3
+++	vmovd	$h2#d,$H4
+++	jmp	.Lproceed_avx
+++
+++.align	32
+++.Lstore_base2_64_avx:
+++	mov	$h0,0($ctx)
+++	mov	$h1,8($ctx)
+++	mov	$h2,16($ctx)		# note that is_base2_26 is zeroed
+++	jmp	.Ldone_avx
+++
+++.align	16
+++.Lstore_base2_26_avx:
+++	mov	%rax#d,0($ctx)		# store hash value base 2^26
+++	mov	%rdx#d,4($ctx)
+++	mov	$h0#d,8($ctx)
+++	mov	$h1#d,12($ctx)
+++	mov	$h2#d,16($ctx)
+++.align	16
+++.Ldone_avx:
+++	mov	0(%rsp),%r15
+++.cfi_restore	%r15
+++	mov	8(%rsp),%r14
+++.cfi_restore	%r14
+++	mov	16(%rsp),%r13
+++.cfi_restore	%r13
+++	mov	24(%rsp),%r12
+++.cfi_restore	%r12
+++	mov	32(%rsp),%rbp
+++.cfi_restore	%rbp
+++	mov	40(%rsp),%rbx
+++.cfi_restore	%rbx
+++	lea	48(%rsp),%rsp
+++.cfi_adjust_cfa_offset	-48
+++.Lno_data_avx:
+++.Lblocks_avx_epilogue:
+++	ret
+++.cfi_endproc
+++
+++.align	32
+++.Lbase2_64_avx:
+++.cfi_startproc
+++	push	%rbx
+++.cfi_push	%rbx
+++	push	%rbp
+++.cfi_push	%rbp
+++	push	%r12
+++.cfi_push	%r12
+++	push	%r13
+++.cfi_push	%r13
+++	push	%r14
+++.cfi_push	%r14
+++	push	%r15
+++.cfi_push	%r15
+++.Lbase2_64_avx_body:
+++
+++	mov	$len,%r15		# reassign $len
+++
+++	mov	24($ctx),$r0		# load r
+++	mov	32($ctx),$s1
+++
+++	mov	0($ctx),$h0		# load hash value
+++	mov	8($ctx),$h1
+++	mov	16($ctx),$h2#d
+++
+++	mov	$s1,$r1
+++	mov	$s1,%rax
+++	shr	\$2,$s1
+++	add	$r1,$s1			# s1 = r1 + (r1 >> 2)
+++
+++	test	\$31,$len
+++	jz	.Linit_avx
+++
+++	add	0($inp),$h0		# accumulate input
+++	adc	8($inp),$h1
+++	lea	16($inp),$inp
+++	adc	$padbit,$h2
+++	sub	\$16,%r15
+++
+++	call	__poly1305_block
+++
+++.Linit_avx:
+++	################################# base 2^64 -> base 2^26
+++	mov	$h0,%rax
+++	mov	$h0,%rdx
+++	shr	\$52,$h0
+++	mov	$h1,$d1
+++	mov	$h1,$d2
+++	shr	\$26,%rdx
+++	and	\$0x3ffffff,%rax	# h[0]
+++	shl	\$12,$d1
+++	and	\$0x3ffffff,%rdx	# h[1]
+++	shr	\$14,$h1
+++	or	$d1,$h0
+++	shl	\$24,$h2
+++	and	\$0x3ffffff,$h0		# h[2]
+++	shr	\$40,$d2
+++	and	\$0x3ffffff,$h1		# h[3]
+++	or	$d2,$h2			# h[4]
+++
+++	vmovd	%rax#d,$H0
+++	vmovd	%rdx#d,$H1
+++	vmovd	$h0#d,$H2
+++	vmovd	$h1#d,$H3
+++	vmovd	$h2#d,$H4
+++	movl	\$1,20($ctx)		# set is_base2_26
+++
+++	call	__poly1305_init_avx
+++
+++.Lproceed_avx:
+++	mov	%r15,$len
+++
+++	mov	0(%rsp),%r15
+++.cfi_restore	%r15
+++	mov	8(%rsp),%r14
+++.cfi_restore	%r14
+++	mov	16(%rsp),%r13
+++.cfi_restore	%r13
+++	mov	24(%rsp),%r12
+++.cfi_restore	%r12
+++	mov	32(%rsp),%rbp
+++.cfi_restore	%rbp
+++	mov	40(%rsp),%rbx
+++.cfi_restore	%rbx
+++	lea	48(%rsp),%rax
+++	lea	48(%rsp),%rsp
+++.cfi_adjust_cfa_offset	-48
+++.Lbase2_64_avx_epilogue:
+++	jmp	.Ldo_avx
+++.cfi_endproc
+++
+++.align	32
+++.Leven_avx:
+++.cfi_startproc
+++	vmovd		4*0($ctx),$H0		# load hash value
+++	vmovd		4*1($ctx),$H1
+++	vmovd		4*2($ctx),$H2
+++	vmovd		4*3($ctx),$H3
+++	vmovd		4*4($ctx),$H4
+++
+++.Ldo_avx:
+++___
+++$code.=<<___	if (!$win64);
+++	lea		-0x58(%rsp),%r11
+++.cfi_def_cfa		%r11,0x60
+++	sub		\$0x178,%rsp
+++___
+++$code.=<<___	if ($win64);
+++	lea		-0xf8(%rsp),%r11
+++	sub		\$0x218,%rsp
+++	vmovdqa		%xmm6,0x50(%r11)
+++	vmovdqa		%xmm7,0x60(%r11)
+++	vmovdqa		%xmm8,0x70(%r11)
+++	vmovdqa		%xmm9,0x80(%r11)
+++	vmovdqa		%xmm10,0x90(%r11)
+++	vmovdqa		%xmm11,0xa0(%r11)
+++	vmovdqa		%xmm12,0xb0(%r11)
+++	vmovdqa		%xmm13,0xc0(%r11)
+++	vmovdqa		%xmm14,0xd0(%r11)
+++	vmovdqa		%xmm15,0xe0(%r11)
+++.Ldo_avx_body:
+++___
+++$code.=<<___;
+++	sub		\$64,$len
+++	lea		-32($inp),%rax
+++	cmovc		%rax,$inp
+++
+++	vmovdqu		`16*3`($ctx),$D4	# preload r0^2
+++	lea		`16*3+64`($ctx),$ctx	# size optimization
+++	lea		.Lconst(%rip),%rcx
+++
+++	################################################################
+++	# load input
+++	vmovdqu		16*2($inp),$T0
+++	vmovdqu		16*3($inp),$T1
+++	vmovdqa		64(%rcx),$MASK		# .Lmask26
+++
+++	vpsrldq		\$6,$T0,$T2		# splat input
+++	vpsrldq		\$6,$T1,$T3
+++	vpunpckhqdq	$T1,$T0,$T4		# 4
+++	vpunpcklqdq	$T1,$T0,$T0		# 0:1
+++	vpunpcklqdq	$T3,$T2,$T3		# 2:3
+++
+++	vpsrlq		\$40,$T4,$T4		# 4
+++	vpsrlq		\$26,$T0,$T1
+++	vpand		$MASK,$T0,$T0		# 0
+++	vpsrlq		\$4,$T3,$T2
+++	vpand		$MASK,$T1,$T1		# 1
+++	vpsrlq		\$30,$T3,$T3
+++	vpand		$MASK,$T2,$T2		# 2
+++	vpand		$MASK,$T3,$T3		# 3
+++	vpor		32(%rcx),$T4,$T4	# padbit, yes, always
+++
+++	jbe		.Lskip_loop_avx
+++
+++	# expand and copy pre-calculated table to stack
+++	vmovdqu		`16*1-64`($ctx),$D1
+++	vmovdqu		`16*2-64`($ctx),$D2
+++	vpshufd		\$0xEE,$D4,$D3		# 34xx -> 3434
+++	vpshufd		\$0x44,$D4,$D0		# xx12 -> 1212
+++	vmovdqa		$D3,-0x90(%r11)
+++	vmovdqa		$D0,0x00(%rsp)
+++	vpshufd		\$0xEE,$D1,$D4
+++	vmovdqu		`16*3-64`($ctx),$D0
+++	vpshufd		\$0x44,$D1,$D1
+++	vmovdqa		$D4,-0x80(%r11)
+++	vmovdqa		$D1,0x10(%rsp)
+++	vpshufd		\$0xEE,$D2,$D3
+++	vmovdqu		`16*4-64`($ctx),$D1
+++	vpshufd		\$0x44,$D2,$D2
+++	vmovdqa		$D3,-0x70(%r11)
+++	vmovdqa		$D2,0x20(%rsp)
+++	vpshufd		\$0xEE,$D0,$D4
+++	vmovdqu		`16*5-64`($ctx),$D2
+++	vpshufd		\$0x44,$D0,$D0
+++	vmovdqa		$D4,-0x60(%r11)
+++	vmovdqa		$D0,0x30(%rsp)
+++	vpshufd		\$0xEE,$D1,$D3
+++	vmovdqu		`16*6-64`($ctx),$D0
+++	vpshufd		\$0x44,$D1,$D1
+++	vmovdqa		$D3,-0x50(%r11)
+++	vmovdqa		$D1,0x40(%rsp)
+++	vpshufd		\$0xEE,$D2,$D4
+++	vmovdqu		`16*7-64`($ctx),$D1
+++	vpshufd		\$0x44,$D2,$D2
+++	vmovdqa		$D4,-0x40(%r11)
+++	vmovdqa		$D2,0x50(%rsp)
+++	vpshufd		\$0xEE,$D0,$D3
+++	vmovdqu		`16*8-64`($ctx),$D2
+++	vpshufd		\$0x44,$D0,$D0
+++	vmovdqa		$D3,-0x30(%r11)
+++	vmovdqa		$D0,0x60(%rsp)
+++	vpshufd		\$0xEE,$D1,$D4
+++	vpshufd		\$0x44,$D1,$D1
+++	vmovdqa		$D4,-0x20(%r11)
+++	vmovdqa		$D1,0x70(%rsp)
+++	vpshufd		\$0xEE,$D2,$D3
+++	 vmovdqa	0x00(%rsp),$D4		# preload r0^2
+++	vpshufd		\$0x44,$D2,$D2
+++	vmovdqa		$D3,-0x10(%r11)
+++	vmovdqa		$D2,0x80(%rsp)
+++
+++	jmp		.Loop_avx
+++
+++.align	32
+++.Loop_avx:
+++	################################################################
+++	# ((inp[0]*r^4+inp[2]*r^2+inp[4])*r^4+inp[6]*r^2
+++	# ((inp[1]*r^4+inp[3]*r^2+inp[5])*r^3+inp[7]*r
+++	#   \___________________/
+++	# ((inp[0]*r^4+inp[2]*r^2+inp[4])*r^4+inp[6]*r^2+inp[8])*r^2
+++	# ((inp[1]*r^4+inp[3]*r^2+inp[5])*r^4+inp[7]*r^2+inp[9])*r
+++	#   \___________________/ \____________________/
+++	#
+++	# Note that we start with inp[2:3]*r^2. This is because it
+++	# doesn't depend on reduction in previous iteration.
+++	################################################################
+++	# d4 = h4*r0 + h3*r1   + h2*r2   + h1*r3   + h0*r4
+++	# d3 = h3*r0 + h2*r1   + h1*r2   + h0*r3   + h4*5*r4
+++	# d2 = h2*r0 + h1*r1   + h0*r2   + h4*5*r3 + h3*5*r4
+++	# d1 = h1*r0 + h0*r1   + h4*5*r2 + h3*5*r3 + h2*5*r4
+++	# d0 = h0*r0 + h4*5*r1 + h3*5*r2 + h2*5*r3 + h1*5*r4
+++	#
+++	# though note that $Tx and $Hx are "reversed" in this section,
+++	# and $D4 is preloaded with r0^2...
+++
+++	vpmuludq	$T0,$D4,$D0		# d0 = h0*r0
+++	vpmuludq	$T1,$D4,$D1		# d1 = h1*r0
+++	  vmovdqa	$H2,0x20(%r11)				# offload hash
+++	vpmuludq	$T2,$D4,$D2		# d3 = h2*r0
+++	 vmovdqa	0x10(%rsp),$H2		# r1^2
+++	vpmuludq	$T3,$D4,$D3		# d3 = h3*r0
+++	vpmuludq	$T4,$D4,$D4		# d4 = h4*r0
+++
+++	  vmovdqa	$H0,0x00(%r11)				#
+++	vpmuludq	0x20(%rsp),$T4,$H0	# h4*s1
+++	  vmovdqa	$H1,0x10(%r11)				#
+++	vpmuludq	$T3,$H2,$H1		# h3*r1
+++	vpaddq		$H0,$D0,$D0		# d0 += h4*s1
+++	vpaddq		$H1,$D4,$D4		# d4 += h3*r1
+++	  vmovdqa	$H3,0x30(%r11)				#
+++	vpmuludq	$T2,$H2,$H0		# h2*r1
+++	vpmuludq	$T1,$H2,$H1		# h1*r1
+++	vpaddq		$H0,$D3,$D3		# d3 += h2*r1
+++	 vmovdqa	0x30(%rsp),$H3		# r2^2
+++	vpaddq		$H1,$D2,$D2		# d2 += h1*r1
+++	  vmovdqa	$H4,0x40(%r11)				#
+++	vpmuludq	$T0,$H2,$H2		# h0*r1
+++	 vpmuludq	$T2,$H3,$H0		# h2*r2
+++	vpaddq		$H2,$D1,$D1		# d1 += h0*r1
+++
+++	 vmovdqa	0x40(%rsp),$H4		# s2^2
+++	vpaddq		$H0,$D4,$D4		# d4 += h2*r2
+++	vpmuludq	$T1,$H3,$H1		# h1*r2
+++	vpmuludq	$T0,$H3,$H3		# h0*r2
+++	vpaddq		$H1,$D3,$D3		# d3 += h1*r2
+++	 vmovdqa	0x50(%rsp),$H2		# r3^2
+++	vpaddq		$H3,$D2,$D2		# d2 += h0*r2
+++	vpmuludq	$T4,$H4,$H0		# h4*s2
+++	vpmuludq	$T3,$H4,$H4		# h3*s2
+++	vpaddq		$H0,$D1,$D1		# d1 += h4*s2
+++	 vmovdqa	0x60(%rsp),$H3		# s3^2
+++	vpaddq		$H4,$D0,$D0		# d0 += h3*s2
+++
+++	 vmovdqa	0x80(%rsp),$H4		# s4^2
+++	vpmuludq	$T1,$H2,$H1		# h1*r3
+++	vpmuludq	$T0,$H2,$H2		# h0*r3
+++	vpaddq		$H1,$D4,$D4		# d4 += h1*r3
+++	vpaddq		$H2,$D3,$D3		# d3 += h0*r3
+++	vpmuludq	$T4,$H3,$H0		# h4*s3
+++	vpmuludq	$T3,$H3,$H1		# h3*s3
+++	vpaddq		$H0,$D2,$D2		# d2 += h4*s3
+++	 vmovdqu	16*0($inp),$H0				# load input
+++	vpaddq		$H1,$D1,$D1		# d1 += h3*s3
+++	vpmuludq	$T2,$H3,$H3		# h2*s3
+++	 vpmuludq	$T2,$H4,$T2		# h2*s4
+++	vpaddq		$H3,$D0,$D0		# d0 += h2*s3
+++
+++	 vmovdqu	16*1($inp),$H1				#
+++	vpaddq		$T2,$D1,$D1		# d1 += h2*s4
+++	vpmuludq	$T3,$H4,$T3		# h3*s4
+++	vpmuludq	$T4,$H4,$T4		# h4*s4
+++	 vpsrldq	\$6,$H0,$H2				# splat input
+++	vpaddq		$T3,$D2,$D2		# d2 += h3*s4
+++	vpaddq		$T4,$D3,$D3		# d3 += h4*s4
+++	 vpsrldq	\$6,$H1,$H3				#
+++	vpmuludq	0x70(%rsp),$T0,$T4	# h0*r4
+++	vpmuludq	$T1,$H4,$T0		# h1*s4
+++	 vpunpckhqdq	$H1,$H0,$H4		# 4
+++	vpaddq		$T4,$D4,$D4		# d4 += h0*r4
+++	 vmovdqa	-0x90(%r11),$T4		# r0^4
+++	vpaddq		$T0,$D0,$D0		# d0 += h1*s4
+++
+++	vpunpcklqdq	$H1,$H0,$H0		# 0:1
+++	vpunpcklqdq	$H3,$H2,$H3		# 2:3
+++
+++	#vpsrlq		\$40,$H4,$H4		# 4
+++	vpsrldq		\$`40/8`,$H4,$H4	# 4
+++	vpsrlq		\$26,$H0,$H1
+++	vpand		$MASK,$H0,$H0		# 0
+++	vpsrlq		\$4,$H3,$H2
+++	vpand		$MASK,$H1,$H1		# 1
+++	vpand		0(%rcx),$H4,$H4		# .Lmask24
+++	vpsrlq		\$30,$H3,$H3
+++	vpand		$MASK,$H2,$H2		# 2
+++	vpand		$MASK,$H3,$H3		# 3
+++	vpor		32(%rcx),$H4,$H4	# padbit, yes, always
+++
+++	vpaddq		0x00(%r11),$H0,$H0	# add hash value
+++	vpaddq		0x10(%r11),$H1,$H1
+++	vpaddq		0x20(%r11),$H2,$H2
+++	vpaddq		0x30(%r11),$H3,$H3
+++	vpaddq		0x40(%r11),$H4,$H4
+++
+++	lea		16*2($inp),%rax
+++	lea		16*4($inp),$inp
+++	sub		\$64,$len
+++	cmovc		%rax,$inp
+++
+++	################################################################
+++	# Now we accumulate (inp[0:1]+hash)*r^4
+++	################################################################
+++	# d4 = h4*r0 + h3*r1   + h2*r2   + h1*r3   + h0*r4
+++	# d3 = h3*r0 + h2*r1   + h1*r2   + h0*r3   + h4*5*r4
+++	# d2 = h2*r0 + h1*r1   + h0*r2   + h4*5*r3 + h3*5*r4
+++	# d1 = h1*r0 + h0*r1   + h4*5*r2 + h3*5*r3 + h2*5*r4
+++	# d0 = h0*r0 + h4*5*r1 + h3*5*r2 + h2*5*r3 + h1*5*r4
+++
+++	vpmuludq	$H0,$T4,$T0		# h0*r0
+++	vpmuludq	$H1,$T4,$T1		# h1*r0
+++	vpaddq		$T0,$D0,$D0
+++	vpaddq		$T1,$D1,$D1
+++	 vmovdqa	-0x80(%r11),$T2		# r1^4
+++	vpmuludq	$H2,$T4,$T0		# h2*r0
+++	vpmuludq	$H3,$T4,$T1		# h3*r0
+++	vpaddq		$T0,$D2,$D2
+++	vpaddq		$T1,$D3,$D3
+++	vpmuludq	$H4,$T4,$T4		# h4*r0
+++	 vpmuludq	-0x70(%r11),$H4,$T0	# h4*s1
+++	vpaddq		$T4,$D4,$D4
+++
+++	vpaddq		$T0,$D0,$D0		# d0 += h4*s1
+++	vpmuludq	$H2,$T2,$T1		# h2*r1
+++	vpmuludq	$H3,$T2,$T0		# h3*r1
+++	vpaddq		$T1,$D3,$D3		# d3 += h2*r1
+++	 vmovdqa	-0x60(%r11),$T3		# r2^4
+++	vpaddq		$T0,$D4,$D4		# d4 += h3*r1
+++	vpmuludq	$H1,$T2,$T1		# h1*r1
+++	vpmuludq	$H0,$T2,$T2		# h0*r1
+++	vpaddq		$T1,$D2,$D2		# d2 += h1*r1
+++	vpaddq		$T2,$D1,$D1		# d1 += h0*r1
+++
+++	 vmovdqa	-0x50(%r11),$T4		# s2^4
+++	vpmuludq	$H2,$T3,$T0		# h2*r2
+++	vpmuludq	$H1,$T3,$T1		# h1*r2
+++	vpaddq		$T0,$D4,$D4		# d4 += h2*r2
+++	vpaddq		$T1,$D3,$D3		# d3 += h1*r2
+++	 vmovdqa	-0x40(%r11),$T2		# r3^4
+++	vpmuludq	$H0,$T3,$T3		# h0*r2
+++	vpmuludq	$H4,$T4,$T0		# h4*s2
+++	vpaddq		$T3,$D2,$D2		# d2 += h0*r2
+++	vpaddq		$T0,$D1,$D1		# d1 += h4*s2
+++	 vmovdqa	-0x30(%r11),$T3		# s3^4
+++	vpmuludq	$H3,$T4,$T4		# h3*s2
+++	 vpmuludq	$H1,$T2,$T1		# h1*r3
+++	vpaddq		$T4,$D0,$D0		# d0 += h3*s2
+++
+++	 vmovdqa	-0x10(%r11),$T4		# s4^4
+++	vpaddq		$T1,$D4,$D4		# d4 += h1*r3
+++	vpmuludq	$H0,$T2,$T2		# h0*r3
+++	vpmuludq	$H4,$T3,$T0		# h4*s3
+++	vpaddq		$T2,$D3,$D3		# d3 += h0*r3
+++	vpaddq		$T0,$D2,$D2		# d2 += h4*s3
+++	 vmovdqu	16*2($inp),$T0				# load input
+++	vpmuludq	$H3,$T3,$T2		# h3*s3
+++	vpmuludq	$H2,$T3,$T3		# h2*s3
+++	vpaddq		$T2,$D1,$D1		# d1 += h3*s3
+++	 vmovdqu	16*3($inp),$T1				#
+++	vpaddq		$T3,$D0,$D0		# d0 += h2*s3
+++
+++	vpmuludq	$H2,$T4,$H2		# h2*s4
+++	vpmuludq	$H3,$T4,$H3		# h3*s4
+++	 vpsrldq	\$6,$T0,$T2				# splat input
+++	vpaddq		$H2,$D1,$D1		# d1 += h2*s4
+++	vpmuludq	$H4,$T4,$H4		# h4*s4
+++	 vpsrldq	\$6,$T1,$T3				#
+++	vpaddq		$H3,$D2,$H2		# h2 = d2 + h3*s4
+++	vpaddq		$H4,$D3,$H3		# h3 = d3 + h4*s4
+++	vpmuludq	-0x20(%r11),$H0,$H4	# h0*r4
+++	vpmuludq	$H1,$T4,$H0
+++	 vpunpckhqdq	$T1,$T0,$T4		# 4
+++	vpaddq		$H4,$D4,$H4		# h4 = d4 + h0*r4
+++	vpaddq		$H0,$D0,$H0		# h0 = d0 + h1*s4
+++
+++	vpunpcklqdq	$T1,$T0,$T0		# 0:1
+++	vpunpcklqdq	$T3,$T2,$T3		# 2:3
+++
+++	#vpsrlq		\$40,$T4,$T4		# 4
+++	vpsrldq		\$`40/8`,$T4,$T4	# 4
+++	vpsrlq		\$26,$T0,$T1
+++	 vmovdqa	0x00(%rsp),$D4		# preload r0^2
+++	vpand		$MASK,$T0,$T0		# 0
+++	vpsrlq		\$4,$T3,$T2
+++	vpand		$MASK,$T1,$T1		# 1
+++	vpand		0(%rcx),$T4,$T4		# .Lmask24
+++	vpsrlq		\$30,$T3,$T3
+++	vpand		$MASK,$T2,$T2		# 2
+++	vpand		$MASK,$T3,$T3		# 3
+++	vpor		32(%rcx),$T4,$T4	# padbit, yes, always
+++
+++	################################################################
+++	# lazy reduction as discussed in "NEON crypto" by D.J. Bernstein
+++	# and P. Schwabe
+++
+++	vpsrlq		\$26,$H3,$D3
+++	vpand		$MASK,$H3,$H3
+++	vpaddq		$D3,$H4,$H4		# h3 -> h4
+++
+++	vpsrlq		\$26,$H0,$D0
+++	vpand		$MASK,$H0,$H0
+++	vpaddq		$D0,$D1,$H1		# h0 -> h1
+++
+++	vpsrlq		\$26,$H4,$D0
+++	vpand		$MASK,$H4,$H4
+++
+++	vpsrlq		\$26,$H1,$D1
+++	vpand		$MASK,$H1,$H1
+++	vpaddq		$D1,$H2,$H2		# h1 -> h2
+++
+++	vpaddq		$D0,$H0,$H0
+++	vpsllq		\$2,$D0,$D0
+++	vpaddq		$D0,$H0,$H0		# h4 -> h0
+++
+++	vpsrlq		\$26,$H2,$D2
+++	vpand		$MASK,$H2,$H2
+++	vpaddq		$D2,$H3,$H3		# h2 -> h3
+++
+++	vpsrlq		\$26,$H0,$D0
+++	vpand		$MASK,$H0,$H0
+++	vpaddq		$D0,$H1,$H1		# h0 -> h1
+++
+++	vpsrlq		\$26,$H3,$D3
+++	vpand		$MASK,$H3,$H3
+++	vpaddq		$D3,$H4,$H4		# h3 -> h4
+++
+++	ja		.Loop_avx
+++
+++.Lskip_loop_avx:
+++	################################################################
+++	# multiply (inp[0:1]+hash) or inp[2:3] by r^2:r^1
+++
+++	vpshufd		\$0x10,$D4,$D4		# r0^n, xx12 -> x1x2
+++	add		\$32,$len
+++	jnz		.Long_tail_avx
+++
+++	vpaddq		$H2,$T2,$T2
+++	vpaddq		$H0,$T0,$T0
+++	vpaddq		$H1,$T1,$T1
+++	vpaddq		$H3,$T3,$T3
+++	vpaddq		$H4,$T4,$T4
+++
+++.Long_tail_avx:
+++	vmovdqa		$H2,0x20(%r11)
+++	vmovdqa		$H0,0x00(%r11)
+++	vmovdqa		$H1,0x10(%r11)
+++	vmovdqa		$H3,0x30(%r11)
+++	vmovdqa		$H4,0x40(%r11)
+++
+++	# d4 = h4*r0 + h3*r1   + h2*r2   + h1*r3   + h0*r4
+++	# d3 = h3*r0 + h2*r1   + h1*r2   + h0*r3   + h4*5*r4
+++	# d2 = h2*r0 + h1*r1   + h0*r2   + h4*5*r3 + h3*5*r4
+++	# d1 = h1*r0 + h0*r1   + h4*5*r2 + h3*5*r3 + h2*5*r4
+++	# d0 = h0*r0 + h4*5*r1 + h3*5*r2 + h2*5*r3 + h1*5*r4
+++
+++	vpmuludq	$T2,$D4,$D2		# d2 = h2*r0
+++	vpmuludq	$T0,$D4,$D0		# d0 = h0*r0
+++	 vpshufd	\$0x10,`16*1-64`($ctx),$H2		# r1^n
+++	vpmuludq	$T1,$D4,$D1		# d1 = h1*r0
+++	vpmuludq	$T3,$D4,$D3		# d3 = h3*r0
+++	vpmuludq	$T4,$D4,$D4		# d4 = h4*r0
+++
+++	vpmuludq	$T3,$H2,$H0		# h3*r1
+++	vpaddq		$H0,$D4,$D4		# d4 += h3*r1
+++	 vpshufd	\$0x10,`16*2-64`($ctx),$H3		# s1^n
+++	vpmuludq	$T2,$H2,$H1		# h2*r1
+++	vpaddq		$H1,$D3,$D3		# d3 += h2*r1
+++	 vpshufd	\$0x10,`16*3-64`($ctx),$H4		# r2^n
+++	vpmuludq	$T1,$H2,$H0		# h1*r1
+++	vpaddq		$H0,$D2,$D2		# d2 += h1*r1
+++	vpmuludq	$T0,$H2,$H2		# h0*r1
+++	vpaddq		$H2,$D1,$D1		# d1 += h0*r1
+++	vpmuludq	$T4,$H3,$H3		# h4*s1
+++	vpaddq		$H3,$D0,$D0		# d0 += h4*s1
+++
+++	 vpshufd	\$0x10,`16*4-64`($ctx),$H2		# s2^n
+++	vpmuludq	$T2,$H4,$H1		# h2*r2
+++	vpaddq		$H1,$D4,$D4		# d4 += h2*r2
+++	vpmuludq	$T1,$H4,$H0		# h1*r2
+++	vpaddq		$H0,$D3,$D3		# d3 += h1*r2
+++	 vpshufd	\$0x10,`16*5-64`($ctx),$H3		# r3^n
+++	vpmuludq	$T0,$H4,$H4		# h0*r2
+++	vpaddq		$H4,$D2,$D2		# d2 += h0*r2
+++	vpmuludq	$T4,$H2,$H1		# h4*s2
+++	vpaddq		$H1,$D1,$D1		# d1 += h4*s2
+++	 vpshufd	\$0x10,`16*6-64`($ctx),$H4		# s3^n
+++	vpmuludq	$T3,$H2,$H2		# h3*s2
+++	vpaddq		$H2,$D0,$D0		# d0 += h3*s2
+++
+++	vpmuludq	$T1,$H3,$H0		# h1*r3
+++	vpaddq		$H0,$D4,$D4		# d4 += h1*r3
+++	vpmuludq	$T0,$H3,$H3		# h0*r3
+++	vpaddq		$H3,$D3,$D3		# d3 += h0*r3
+++	 vpshufd	\$0x10,`16*7-64`($ctx),$H2		# r4^n
+++	vpmuludq	$T4,$H4,$H1		# h4*s3
+++	vpaddq		$H1,$D2,$D2		# d2 += h4*s3
+++	 vpshufd	\$0x10,`16*8-64`($ctx),$H3		# s4^n
+++	vpmuludq	$T3,$H4,$H0		# h3*s3
+++	vpaddq		$H0,$D1,$D1		# d1 += h3*s3
+++	vpmuludq	$T2,$H4,$H4		# h2*s3
+++	vpaddq		$H4,$D0,$D0		# d0 += h2*s3
+++
+++	vpmuludq	$T0,$H2,$H2		# h0*r4
+++	vpaddq		$H2,$D4,$D4		# h4 = d4 + h0*r4
+++	vpmuludq	$T4,$H3,$H1		# h4*s4
+++	vpaddq		$H1,$D3,$D3		# h3 = d3 + h4*s4
+++	vpmuludq	$T3,$H3,$H0		# h3*s4
+++	vpaddq		$H0,$D2,$D2		# h2 = d2 + h3*s4
+++	vpmuludq	$T2,$H3,$H1		# h2*s4
+++	vpaddq		$H1,$D1,$D1		# h1 = d1 + h2*s4
+++	vpmuludq	$T1,$H3,$H3		# h1*s4
+++	vpaddq		$H3,$D0,$D0		# h0 = d0 + h1*s4
+++
+++	jz		.Lshort_tail_avx
+++
+++	vmovdqu		16*0($inp),$H0		# load input
+++	vmovdqu		16*1($inp),$H1
+++
+++	vpsrldq		\$6,$H0,$H2		# splat input
+++	vpsrldq		\$6,$H1,$H3
+++	vpunpckhqdq	$H1,$H0,$H4		# 4
+++	vpunpcklqdq	$H1,$H0,$H0		# 0:1
+++	vpunpcklqdq	$H3,$H2,$H3		# 2:3
+++
+++	vpsrlq		\$40,$H4,$H4		# 4
+++	vpsrlq		\$26,$H0,$H1
+++	vpand		$MASK,$H0,$H0		# 0
+++	vpsrlq		\$4,$H3,$H2
+++	vpand		$MASK,$H1,$H1		# 1
+++	vpsrlq		\$30,$H3,$H3
+++	vpand		$MASK,$H2,$H2		# 2
+++	vpand		$MASK,$H3,$H3		# 3
+++	vpor		32(%rcx),$H4,$H4	# padbit, yes, always
+++
+++	vpshufd		\$0x32,`16*0-64`($ctx),$T4	# r0^n, 34xx -> x3x4
+++	vpaddq		0x00(%r11),$H0,$H0
+++	vpaddq		0x10(%r11),$H1,$H1
+++	vpaddq		0x20(%r11),$H2,$H2
+++	vpaddq		0x30(%r11),$H3,$H3
+++	vpaddq		0x40(%r11),$H4,$H4
+++
+++	################################################################
+++	# multiply (inp[0:1]+hash) by r^4:r^3 and accumulate
+++
+++	vpmuludq	$H0,$T4,$T0		# h0*r0
+++	vpaddq		$T0,$D0,$D0		# d0 += h0*r0
+++	vpmuludq	$H1,$T4,$T1		# h1*r0
+++	vpaddq		$T1,$D1,$D1		# d1 += h1*r0
+++	vpmuludq	$H2,$T4,$T0		# h2*r0
+++	vpaddq		$T0,$D2,$D2		# d2 += h2*r0
+++	 vpshufd	\$0x32,`16*1-64`($ctx),$T2		# r1^n
+++	vpmuludq	$H3,$T4,$T1		# h3*r0
+++	vpaddq		$T1,$D3,$D3		# d3 += h3*r0
+++	vpmuludq	$H4,$T4,$T4		# h4*r0
+++	vpaddq		$T4,$D4,$D4		# d4 += h4*r0
+++
+++	vpmuludq	$H3,$T2,$T0		# h3*r1
+++	vpaddq		$T0,$D4,$D4		# d4 += h3*r1
+++	 vpshufd	\$0x32,`16*2-64`($ctx),$T3		# s1
+++	vpmuludq	$H2,$T2,$T1		# h2*r1
+++	vpaddq		$T1,$D3,$D3		# d3 += h2*r1
+++	 vpshufd	\$0x32,`16*3-64`($ctx),$T4		# r2
+++	vpmuludq	$H1,$T2,$T0		# h1*r1
+++	vpaddq		$T0,$D2,$D2		# d2 += h1*r1
+++	vpmuludq	$H0,$T2,$T2		# h0*r1
+++	vpaddq		$T2,$D1,$D1		# d1 += h0*r1
+++	vpmuludq	$H4,$T3,$T3		# h4*s1
+++	vpaddq		$T3,$D0,$D0		# d0 += h4*s1
+++
+++	 vpshufd	\$0x32,`16*4-64`($ctx),$T2		# s2
+++	vpmuludq	$H2,$T4,$T1		# h2*r2
+++	vpaddq		$T1,$D4,$D4		# d4 += h2*r2
+++	vpmuludq	$H1,$T4,$T0		# h1*r2
+++	vpaddq		$T0,$D3,$D3		# d3 += h1*r2
+++	 vpshufd	\$0x32,`16*5-64`($ctx),$T3		# r3
+++	vpmuludq	$H0,$T4,$T4		# h0*r2
+++	vpaddq		$T4,$D2,$D2		# d2 += h0*r2
+++	vpmuludq	$H4,$T2,$T1		# h4*s2
+++	vpaddq		$T1,$D1,$D1		# d1 += h4*s2
+++	 vpshufd	\$0x32,`16*6-64`($ctx),$T4		# s3
+++	vpmuludq	$H3,$T2,$T2		# h3*s2
+++	vpaddq		$T2,$D0,$D0		# d0 += h3*s2
+++
+++	vpmuludq	$H1,$T3,$T0		# h1*r3
+++	vpaddq		$T0,$D4,$D4		# d4 += h1*r3
+++	vpmuludq	$H0,$T3,$T3		# h0*r3
+++	vpaddq		$T3,$D3,$D3		# d3 += h0*r3
+++	 vpshufd	\$0x32,`16*7-64`($ctx),$T2		# r4
+++	vpmuludq	$H4,$T4,$T1		# h4*s3
+++	vpaddq		$T1,$D2,$D2		# d2 += h4*s3
+++	 vpshufd	\$0x32,`16*8-64`($ctx),$T3		# s4
+++	vpmuludq	$H3,$T4,$T0		# h3*s3
+++	vpaddq		$T0,$D1,$D1		# d1 += h3*s3
+++	vpmuludq	$H2,$T4,$T4		# h2*s3
+++	vpaddq		$T4,$D0,$D0		# d0 += h2*s3
+++
+++	vpmuludq	$H0,$T2,$T2		# h0*r4
+++	vpaddq		$T2,$D4,$D4		# d4 += h0*r4
+++	vpmuludq	$H4,$T3,$T1		# h4*s4
+++	vpaddq		$T1,$D3,$D3		# d3 += h4*s4
+++	vpmuludq	$H3,$T3,$T0		# h3*s4
+++	vpaddq		$T0,$D2,$D2		# d2 += h3*s4
+++	vpmuludq	$H2,$T3,$T1		# h2*s4
+++	vpaddq		$T1,$D1,$D1		# d1 += h2*s4
+++	vpmuludq	$H1,$T3,$T3		# h1*s4
+++	vpaddq		$T3,$D0,$D0		# d0 += h1*s4
+++
+++.Lshort_tail_avx:
+++	################################################################
+++	# horizontal addition
+++
+++	vpsrldq		\$8,$D4,$T4
+++	vpsrldq		\$8,$D3,$T3
+++	vpsrldq		\$8,$D1,$T1
+++	vpsrldq		\$8,$D0,$T0
+++	vpsrldq		\$8,$D2,$T2
+++	vpaddq		$T3,$D3,$D3
+++	vpaddq		$T4,$D4,$D4
+++	vpaddq		$T0,$D0,$D0
+++	vpaddq		$T1,$D1,$D1
+++	vpaddq		$T2,$D2,$D2
+++
+++	################################################################
+++	# lazy reduction
+++
+++	vpsrlq		\$26,$D3,$H3
+++	vpand		$MASK,$D3,$D3
+++	vpaddq		$H3,$D4,$D4		# h3 -> h4
+++
+++	vpsrlq		\$26,$D0,$H0
+++	vpand		$MASK,$D0,$D0
+++	vpaddq		$H0,$D1,$D1		# h0 -> h1
+++
+++	vpsrlq		\$26,$D4,$H4
+++	vpand		$MASK,$D4,$D4
+++
+++	vpsrlq		\$26,$D1,$H1
+++	vpand		$MASK,$D1,$D1
+++	vpaddq		$H1,$D2,$D2		# h1 -> h2
+++
+++	vpaddq		$H4,$D0,$D0
+++	vpsllq		\$2,$H4,$H4
+++	vpaddq		$H4,$D0,$D0		# h4 -> h0
+++
+++	vpsrlq		\$26,$D2,$H2
+++	vpand		$MASK,$D2,$D2
+++	vpaddq		$H2,$D3,$D3		# h2 -> h3
+++
+++	vpsrlq		\$26,$D0,$H0
+++	vpand		$MASK,$D0,$D0
+++	vpaddq		$H0,$D1,$D1		# h0 -> h1
+++
+++	vpsrlq		\$26,$D3,$H3
+++	vpand		$MASK,$D3,$D3
+++	vpaddq		$H3,$D4,$D4		# h3 -> h4
+++
+++	vmovd		$D0,`4*0-48-64`($ctx)	# save partially reduced
+++	vmovd		$D1,`4*1-48-64`($ctx)
+++	vmovd		$D2,`4*2-48-64`($ctx)
+++	vmovd		$D3,`4*3-48-64`($ctx)
+++	vmovd		$D4,`4*4-48-64`($ctx)
+++___
+++$code.=<<___	if ($win64);
+++	vmovdqa		0x50(%r11),%xmm6
+++	vmovdqa		0x60(%r11),%xmm7
+++	vmovdqa		0x70(%r11),%xmm8
+++	vmovdqa		0x80(%r11),%xmm9
+++	vmovdqa		0x90(%r11),%xmm10
+++	vmovdqa		0xa0(%r11),%xmm11
+++	vmovdqa		0xb0(%r11),%xmm12
+++	vmovdqa		0xc0(%r11),%xmm13
+++	vmovdqa		0xd0(%r11),%xmm14
+++	vmovdqa		0xe0(%r11),%xmm15
+++	lea		0xf8(%r11),%rsp
+++.Ldo_avx_epilogue:
+++___
+++$code.=<<___	if (!$win64);
+++	lea		0x58(%r11),%rsp
+++.cfi_def_cfa		%rsp,8
+++___
+++$code.=<<___;
+++	vzeroupper
+++	ret
+++.cfi_endproc
+++.size	poly1305_blocks_avx,.-poly1305_blocks_avx
+++
+++.type	poly1305_emit_avx,\@function,3
+++.align	32
+++poly1305_emit_avx:
+++	cmpl	\$0,20($ctx)	# is_base2_26?
+++	je	.Lemit
+++
+++	mov	0($ctx),%eax	# load hash value base 2^26
+++	mov	4($ctx),%ecx
+++	mov	8($ctx),%r8d
+++	mov	12($ctx),%r11d
+++	mov	16($ctx),%r10d
+++
+++	shl	\$26,%rcx	# base 2^26 -> base 2^64
+++	mov	%r8,%r9
+++	shl	\$52,%r8
+++	add	%rcx,%rax
+++	shr	\$12,%r9
+++	add	%rax,%r8	# h0
+++	adc	\$0,%r9
+++
+++	shl	\$14,%r11
+++	mov	%r10,%rax
+++	shr	\$24,%r10
+++	add	%r11,%r9
+++	shl	\$40,%rax
+++	add	%rax,%r9	# h1
+++	adc	\$0,%r10	# h2
+++
+++	mov	%r10,%rax	# could be partially reduced, so reduce
+++	mov	%r10,%rcx
+++	and	\$3,%r10
+++	shr	\$2,%rax
+++	and	\$-4,%rcx
+++	add	%rcx,%rax
+++	add	%rax,%r8
+++	adc	\$0,%r9
+++	adc	\$0,%r10
+++
+++	mov	%r8,%rax
+++	add	\$5,%r8		# compare to modulus
+++	mov	%r9,%rcx
+++	adc	\$0,%r9
+++	adc	\$0,%r10
+++	shr	\$2,%r10	# did 130-bit value overflow?
+++	cmovnz	%r8,%rax
+++	cmovnz	%r9,%rcx
+++
+++	add	0($nonce),%rax	# accumulate nonce
+++	adc	8($nonce),%rcx
+++	mov	%rax,0($mac)	# write result
+++	mov	%rcx,8($mac)
+++
+++	ret
+++.size	poly1305_emit_avx,.-poly1305_emit_avx
+++___
+++
+++if ($avx>1) {
+++my ($H0,$H1,$H2,$H3,$H4, $MASK, $T4,$T0,$T1,$T2,$T3, $D0,$D1,$D2,$D3,$D4) =
+++    map("%ymm$_",(0..15));
+++my $S4=$MASK;
+++
+++$code.=<<___;
+++.type	poly1305_blocks_avx2,\@function,4
+++.align	32
+++poly1305_blocks_avx2:
+++.cfi_startproc
+++	mov	20($ctx),%r8d		# is_base2_26
+++	cmp	\$128,$len
+++	jae	.Lblocks_avx2
+++	test	%r8d,%r8d
+++	jz	.Lblocks
+++
+++.Lblocks_avx2:
+++	and	\$-16,$len
+++	jz	.Lno_data_avx2
+++
+++	vzeroupper
+++
+++	test	%r8d,%r8d
+++	jz	.Lbase2_64_avx2
+++
+++	test	\$63,$len
+++	jz	.Leven_avx2
+++
+++	push	%rbx
+++.cfi_push	%rbx
+++	push	%rbp
+++.cfi_push	%rbp
+++	push	%r12
+++.cfi_push	%r12
+++	push	%r13
+++.cfi_push	%r13
+++	push	%r14
+++.cfi_push	%r14
+++	push	%r15
+++.cfi_push	%r15
+++.Lblocks_avx2_body:
+++
+++	mov	$len,%r15		# reassign $len
+++
+++	mov	0($ctx),$d1		# load hash value
+++	mov	8($ctx),$d2
+++	mov	16($ctx),$h2#d
+++
+++	mov	24($ctx),$r0		# load r
+++	mov	32($ctx),$s1
+++
+++	################################# base 2^26 -> base 2^64
+++	mov	$d1#d,$h0#d
+++	and	\$`-1*(1<<31)`,$d1
+++	mov	$d2,$r1			# borrow $r1
+++	mov	$d2#d,$h1#d
+++	and	\$`-1*(1<<31)`,$d2
+++
+++	shr	\$6,$d1
+++	shl	\$52,$r1
+++	add	$d1,$h0
+++	shr	\$12,$h1
+++	shr	\$18,$d2
+++	add	$r1,$h0
+++	adc	$d2,$h1
+++
+++	mov	$h2,$d1
+++	shl	\$40,$d1
+++	shr	\$24,$h2
+++	add	$d1,$h1
+++	adc	\$0,$h2			# can be partially reduced...
+++
+++	mov	\$-4,$d2		# ... so reduce
+++	mov	$h2,$d1
+++	and	$h2,$d2
+++	shr	\$2,$d1
+++	and	\$3,$h2
+++	add	$d2,$d1			# =*5
+++	add	$d1,$h0
+++	adc	\$0,$h1
+++	adc	\$0,$h2
+++
+++	mov	$s1,$r1
+++	mov	$s1,%rax
+++	shr	\$2,$s1
+++	add	$r1,$s1			# s1 = r1 + (r1 >> 2)
+++
+++.Lbase2_26_pre_avx2:
+++	add	0($inp),$h0		# accumulate input
+++	adc	8($inp),$h1
+++	lea	16($inp),$inp
+++	adc	$padbit,$h2
+++	sub	\$16,%r15
+++
+++	call	__poly1305_block
+++	mov	$r1,%rax
+++
+++	test	\$63,%r15
+++	jnz	.Lbase2_26_pre_avx2
+++
+++	test	$padbit,$padbit		# if $padbit is zero,
+++	jz	.Lstore_base2_64_avx2	# store hash in base 2^64 format
+++
+++	################################# base 2^64 -> base 2^26
+++	mov	$h0,%rax
+++	mov	$h0,%rdx
+++	shr	\$52,$h0
+++	mov	$h1,$r0
+++	mov	$h1,$r1
+++	shr	\$26,%rdx
+++	and	\$0x3ffffff,%rax	# h[0]
+++	shl	\$12,$r0
+++	and	\$0x3ffffff,%rdx	# h[1]
+++	shr	\$14,$h1
+++	or	$r0,$h0
+++	shl	\$24,$h2
+++	and	\$0x3ffffff,$h0		# h[2]
+++	shr	\$40,$r1
+++	and	\$0x3ffffff,$h1		# h[3]
+++	or	$r1,$h2			# h[4]
+++
+++	test	%r15,%r15
+++	jz	.Lstore_base2_26_avx2
+++
+++	vmovd	%rax#d,%x#$H0
+++	vmovd	%rdx#d,%x#$H1
+++	vmovd	$h0#d,%x#$H2
+++	vmovd	$h1#d,%x#$H3
+++	vmovd	$h2#d,%x#$H4
+++	jmp	.Lproceed_avx2
+++
+++.align	32
+++.Lstore_base2_64_avx2:
+++	mov	$h0,0($ctx)
+++	mov	$h1,8($ctx)
+++	mov	$h2,16($ctx)		# note that is_base2_26 is zeroed
+++	jmp	.Ldone_avx2
+++
+++.align	16
+++.Lstore_base2_26_avx2:
+++	mov	%rax#d,0($ctx)		# store hash value base 2^26
+++	mov	%rdx#d,4($ctx)
+++	mov	$h0#d,8($ctx)
+++	mov	$h1#d,12($ctx)
+++	mov	$h2#d,16($ctx)
+++.align	16
+++.Ldone_avx2:
+++	mov	0(%rsp),%r15
+++.cfi_restore	%r15
+++	mov	8(%rsp),%r14
+++.cfi_restore	%r14
+++	mov	16(%rsp),%r13
+++.cfi_restore	%r13
+++	mov	24(%rsp),%r12
+++.cfi_restore	%r12
+++	mov	32(%rsp),%rbp
+++.cfi_restore	%rbp
+++	mov	40(%rsp),%rbx
+++.cfi_restore	%rbx
+++	lea	48(%rsp),%rsp
+++.cfi_adjust_cfa_offset	-48
+++.Lno_data_avx2:
+++.Lblocks_avx2_epilogue:
+++	ret
+++.cfi_endproc
+++
+++.align	32
+++.Lbase2_64_avx2:
+++.cfi_startproc
+++	push	%rbx
+++.cfi_push	%rbx
+++	push	%rbp
+++.cfi_push	%rbp
+++	push	%r12
+++.cfi_push	%r12
+++	push	%r13
+++.cfi_push	%r13
+++	push	%r14
+++.cfi_push	%r14
+++	push	%r15
+++.cfi_push	%r15
+++.Lbase2_64_avx2_body:
+++
+++	mov	$len,%r15		# reassign $len
+++
+++	mov	24($ctx),$r0		# load r
+++	mov	32($ctx),$s1
+++
+++	mov	0($ctx),$h0		# load hash value
+++	mov	8($ctx),$h1
+++	mov	16($ctx),$h2#d
+++
+++	mov	$s1,$r1
+++	mov	$s1,%rax
+++	shr	\$2,$s1
+++	add	$r1,$s1			# s1 = r1 + (r1 >> 2)
+++
+++	test	\$63,$len
+++	jz	.Linit_avx2
+++
+++.Lbase2_64_pre_avx2:
+++	add	0($inp),$h0		# accumulate input
+++	adc	8($inp),$h1
+++	lea	16($inp),$inp
+++	adc	$padbit,$h2
+++	sub	\$16,%r15
+++
+++	call	__poly1305_block
+++	mov	$r1,%rax
+++
+++	test	\$63,%r15
+++	jnz	.Lbase2_64_pre_avx2
+++
+++.Linit_avx2:
+++	################################# base 2^64 -> base 2^26
+++	mov	$h0,%rax
+++	mov	$h0,%rdx
+++	shr	\$52,$h0
+++	mov	$h1,$d1
+++	mov	$h1,$d2
+++	shr	\$26,%rdx
+++	and	\$0x3ffffff,%rax	# h[0]
+++	shl	\$12,$d1
+++	and	\$0x3ffffff,%rdx	# h[1]
+++	shr	\$14,$h1
+++	or	$d1,$h0
+++	shl	\$24,$h2
+++	and	\$0x3ffffff,$h0		# h[2]
+++	shr	\$40,$d2
+++	and	\$0x3ffffff,$h1		# h[3]
+++	or	$d2,$h2			# h[4]
+++
+++	vmovd	%rax#d,%x#$H0
+++	vmovd	%rdx#d,%x#$H1
+++	vmovd	$h0#d,%x#$H2
+++	vmovd	$h1#d,%x#$H3
+++	vmovd	$h2#d,%x#$H4
+++	movl	\$1,20($ctx)		# set is_base2_26
+++
+++	call	__poly1305_init_avx
+++
+++.Lproceed_avx2:
+++	mov	%r15,$len			# restore $len
+++	mov	OPENSSL_ia32cap_P+8(%rip),%r10d
+++	mov	\$`(1<<31|1<<30|1<<16)`,%r11d
+++
+++	mov	0(%rsp),%r15
+++.cfi_restore	%r15
+++	mov	8(%rsp),%r14
+++.cfi_restore	%r14
+++	mov	16(%rsp),%r13
+++.cfi_restore	%r13
+++	mov	24(%rsp),%r12
+++.cfi_restore	%r12
+++	mov	32(%rsp),%rbp
+++.cfi_restore	%rbp
+++	mov	40(%rsp),%rbx
+++.cfi_restore	%rbx
+++	lea	48(%rsp),%rax
+++	lea	48(%rsp),%rsp
+++.cfi_adjust_cfa_offset	-48
+++.Lbase2_64_avx2_epilogue:
+++	jmp	.Ldo_avx2
+++.cfi_endproc
+++
+++.align	32
+++.Leven_avx2:
+++.cfi_startproc
+++	mov		OPENSSL_ia32cap_P+8(%rip),%r10d
+++	vmovd		4*0($ctx),%x#$H0	# load hash value base 2^26
+++	vmovd		4*1($ctx),%x#$H1
+++	vmovd		4*2($ctx),%x#$H2
+++	vmovd		4*3($ctx),%x#$H3
+++	vmovd		4*4($ctx),%x#$H4
+++
+++.Ldo_avx2:
+++___
+++$code.=<<___		if ($avx>2);
+++	cmp		\$512,$len
+++	jb		.Lskip_avx512
+++	and		%r11d,%r10d
+++	test		\$`1<<16`,%r10d		# check for AVX512F
+++	jnz		.Lblocks_avx512
+++.Lskip_avx512:
+++___
+++$code.=<<___	if (!$win64);
+++	lea		-8(%rsp),%r11
+++.cfi_def_cfa		%r11,16
+++	sub		\$0x128,%rsp
+++___
+++$code.=<<___	if ($win64);
+++	lea		-0xf8(%rsp),%r11
+++	sub		\$0x1c8,%rsp
+++	vmovdqa		%xmm6,0x50(%r11)
+++	vmovdqa		%xmm7,0x60(%r11)
+++	vmovdqa		%xmm8,0x70(%r11)
+++	vmovdqa		%xmm9,0x80(%r11)
+++	vmovdqa		%xmm10,0x90(%r11)
+++	vmovdqa		%xmm11,0xa0(%r11)
+++	vmovdqa		%xmm12,0xb0(%r11)
+++	vmovdqa		%xmm13,0xc0(%r11)
+++	vmovdqa		%xmm14,0xd0(%r11)
+++	vmovdqa		%xmm15,0xe0(%r11)
+++.Ldo_avx2_body:
+++___
+++$code.=<<___;
+++	lea		.Lconst(%rip),%rcx
+++	lea		48+64($ctx),$ctx	# size optimization
+++	vmovdqa		96(%rcx),$T0		# .Lpermd_avx2
+++
+++	# expand and copy pre-calculated table to stack
+++	vmovdqu		`16*0-64`($ctx),%x#$T2
+++	and		\$-512,%rsp
+++	vmovdqu		`16*1-64`($ctx),%x#$T3
+++	vmovdqu		`16*2-64`($ctx),%x#$T4
+++	vmovdqu		`16*3-64`($ctx),%x#$D0
+++	vmovdqu		`16*4-64`($ctx),%x#$D1
+++	vmovdqu		`16*5-64`($ctx),%x#$D2
+++	lea		0x90(%rsp),%rax		# size optimization
+++	vmovdqu		`16*6-64`($ctx),%x#$D3
+++	vpermd		$T2,$T0,$T2		# 00003412 -> 14243444
+++	vmovdqu		`16*7-64`($ctx),%x#$D4
+++	vpermd		$T3,$T0,$T3
+++	vmovdqu		`16*8-64`($ctx),%x#$MASK
+++	vpermd		$T4,$T0,$T4
+++	vmovdqa		$T2,0x00(%rsp)
+++	vpermd		$D0,$T0,$D0
+++	vmovdqa		$T3,0x20-0x90(%rax)
+++	vpermd		$D1,$T0,$D1
+++	vmovdqa		$T4,0x40-0x90(%rax)
+++	vpermd		$D2,$T0,$D2
+++	vmovdqa		$D0,0x60-0x90(%rax)
+++	vpermd		$D3,$T0,$D3
+++	vmovdqa		$D1,0x80-0x90(%rax)
+++	vpermd		$D4,$T0,$D4
+++	vmovdqa		$D2,0xa0-0x90(%rax)
+++	vpermd		$MASK,$T0,$MASK
+++	vmovdqa		$D3,0xc0-0x90(%rax)
+++	vmovdqa		$D4,0xe0-0x90(%rax)
+++	vmovdqa		$MASK,0x100-0x90(%rax)
+++	vmovdqa		64(%rcx),$MASK		# .Lmask26
+++
+++	################################################################
+++	# load input
+++	vmovdqu		16*0($inp),%x#$T0
+++	vmovdqu		16*1($inp),%x#$T1
+++	vinserti128	\$1,16*2($inp),$T0,$T0
+++	vinserti128	\$1,16*3($inp),$T1,$T1
+++	lea		16*4($inp),$inp
+++
+++	vpsrldq		\$6,$T0,$T2		# splat input
+++	vpsrldq		\$6,$T1,$T3
+++	vpunpckhqdq	$T1,$T0,$T4		# 4
+++	vpunpcklqdq	$T3,$T2,$T2		# 2:3
+++	vpunpcklqdq	$T1,$T0,$T0		# 0:1
+++
+++	vpsrlq		\$30,$T2,$T3
+++	vpsrlq		\$4,$T2,$T2
+++	vpsrlq		\$26,$T0,$T1
+++	vpsrlq		\$40,$T4,$T4		# 4
+++	vpand		$MASK,$T2,$T2		# 2
+++	vpand		$MASK,$T0,$T0		# 0
+++	vpand		$MASK,$T1,$T1		# 1
+++	vpand		$MASK,$T3,$T3		# 3
+++	vpor		32(%rcx),$T4,$T4	# padbit, yes, always
+++
+++	vpaddq		$H2,$T2,$H2		# accumulate input
+++	sub		\$64,$len
+++	jz		.Ltail_avx2
+++	jmp		.Loop_avx2
+++
+++.align	32
+++.Loop_avx2:
+++	################################################################
+++	# ((inp[0]*r^4+inp[4])*r^4+inp[ 8])*r^4
+++	# ((inp[1]*r^4+inp[5])*r^4+inp[ 9])*r^3
+++	# ((inp[2]*r^4+inp[6])*r^4+inp[10])*r^2
+++	# ((inp[3]*r^4+inp[7])*r^4+inp[11])*r^1
+++	#   \________/\__________/
+++	################################################################
+++	#vpaddq		$H2,$T2,$H2		# accumulate input
+++	vpaddq		$H0,$T0,$H0
+++	vmovdqa		`32*0`(%rsp),$T0	# r0^4
+++	vpaddq		$H1,$T1,$H1
+++	vmovdqa		`32*1`(%rsp),$T1	# r1^4
+++	vpaddq		$H3,$T3,$H3
+++	vmovdqa		`32*3`(%rsp),$T2	# r2^4
+++	vpaddq		$H4,$T4,$H4
+++	vmovdqa		`32*6-0x90`(%rax),$T3	# s3^4
+++	vmovdqa		`32*8-0x90`(%rax),$S4	# s4^4
+++
+++	# d4 = h4*r0 + h3*r1   + h2*r2   + h1*r3   + h0*r4
+++	# d3 = h3*r0 + h2*r1   + h1*r2   + h0*r3   + h4*5*r4
+++	# d2 = h2*r0 + h1*r1   + h0*r2   + h4*5*r3 + h3*5*r4
+++	# d1 = h1*r0 + h0*r1   + h4*5*r2 + h3*5*r3 + h2*5*r4
+++	# d0 = h0*r0 + h4*5*r1 + h3*5*r2 + h2*5*r3 + h1*5*r4
+++	#
+++	# however, as h2 is "chronologically" first one available pull
+++	# corresponding operations up, so it's
+++	#
+++	# d4 = h2*r2   + h4*r0 + h3*r1             + h1*r3   + h0*r4
+++	# d3 = h2*r1   + h3*r0           + h1*r2   + h0*r3   + h4*5*r4
+++	# d2 = h2*r0           + h1*r1   + h0*r2   + h4*5*r3 + h3*5*r4
+++	# d1 = h2*5*r4 + h1*r0 + h0*r1   + h4*5*r2 + h3*5*r3
+++	# d0 = h2*5*r3 + h0*r0 + h4*5*r1 + h3*5*r2           + h1*5*r4
+++
+++	vpmuludq	$H2,$T0,$D2		# d2 = h2*r0
+++	vpmuludq	$H2,$T1,$D3		# d3 = h2*r1
+++	vpmuludq	$H2,$T2,$D4		# d4 = h2*r2
+++	vpmuludq	$H2,$T3,$D0		# d0 = h2*s3
+++	vpmuludq	$H2,$S4,$D1		# d1 = h2*s4
+++
+++	vpmuludq	$H0,$T1,$T4		# h0*r1
+++	vpmuludq	$H1,$T1,$H2		# h1*r1, borrow $H2 as temp
+++	vpaddq		$T4,$D1,$D1		# d1 += h0*r1
+++	vpaddq		$H2,$D2,$D2		# d2 += h1*r1
+++	vpmuludq	$H3,$T1,$T4		# h3*r1
+++	vpmuludq	`32*2`(%rsp),$H4,$H2	# h4*s1
+++	vpaddq		$T4,$D4,$D4		# d4 += h3*r1
+++	vpaddq		$H2,$D0,$D0		# d0 += h4*s1
+++	 vmovdqa	`32*4-0x90`(%rax),$T1	# s2
+++
+++	vpmuludq	$H0,$T0,$T4		# h0*r0
+++	vpmuludq	$H1,$T0,$H2		# h1*r0
+++	vpaddq		$T4,$D0,$D0		# d0 += h0*r0
+++	vpaddq		$H2,$D1,$D1		# d1 += h1*r0
+++	vpmuludq	$H3,$T0,$T4		# h3*r0
+++	vpmuludq	$H4,$T0,$H2		# h4*r0
+++	 vmovdqu	16*0($inp),%x#$T0	# load input
+++	vpaddq		$T4,$D3,$D3		# d3 += h3*r0
+++	vpaddq		$H2,$D4,$D4		# d4 += h4*r0
+++	 vinserti128	\$1,16*2($inp),$T0,$T0
+++
+++	vpmuludq	$H3,$T1,$T4		# h3*s2
+++	vpmuludq	$H4,$T1,$H2		# h4*s2
+++	 vmovdqu	16*1($inp),%x#$T1
+++	vpaddq		$T4,$D0,$D0		# d0 += h3*s2
+++	vpaddq		$H2,$D1,$D1		# d1 += h4*s2
+++	 vmovdqa	`32*5-0x90`(%rax),$H2	# r3
+++	vpmuludq	$H1,$T2,$T4		# h1*r2
+++	vpmuludq	$H0,$T2,$T2		# h0*r2
+++	vpaddq		$T4,$D3,$D3		# d3 += h1*r2
+++	vpaddq		$T2,$D2,$D2		# d2 += h0*r2
+++	 vinserti128	\$1,16*3($inp),$T1,$T1
+++	 lea		16*4($inp),$inp
+++
+++	vpmuludq	$H1,$H2,$T4		# h1*r3
+++	vpmuludq	$H0,$H2,$H2		# h0*r3
+++	 vpsrldq	\$6,$T0,$T2		# splat input
+++	vpaddq		$T4,$D4,$D4		# d4 += h1*r3
+++	vpaddq		$H2,$D3,$D3		# d3 += h0*r3
+++	vpmuludq	$H3,$T3,$T4		# h3*s3
+++	vpmuludq	$H4,$T3,$H2		# h4*s3
+++	 vpsrldq	\$6,$T1,$T3
+++	vpaddq		$T4,$D1,$D1		# d1 += h3*s3
+++	vpaddq		$H2,$D2,$D2		# d2 += h4*s3
+++	 vpunpckhqdq	$T1,$T0,$T4		# 4
+++
+++	vpmuludq	$H3,$S4,$H3		# h3*s4
+++	vpmuludq	$H4,$S4,$H4		# h4*s4
+++	 vpunpcklqdq	$T1,$T0,$T0		# 0:1
+++	vpaddq		$H3,$D2,$H2		# h2 = d2 + h3*r4
+++	vpaddq		$H4,$D3,$H3		# h3 = d3 + h4*r4
+++	 vpunpcklqdq	$T3,$T2,$T3		# 2:3
+++	vpmuludq	`32*7-0x90`(%rax),$H0,$H4	# h0*r4
+++	vpmuludq	$H1,$S4,$H0		# h1*s4
+++	vmovdqa		64(%rcx),$MASK		# .Lmask26
+++	vpaddq		$H4,$D4,$H4		# h4 = d4 + h0*r4
+++	vpaddq		$H0,$D0,$H0		# h0 = d0 + h1*s4
+++
+++	################################################################
+++	# lazy reduction (interleaved with tail of input splat)
+++
+++	vpsrlq		\$26,$H3,$D3
+++	vpand		$MASK,$H3,$H3
+++	vpaddq		$D3,$H4,$H4		# h3 -> h4
+++
+++	vpsrlq		\$26,$H0,$D0
+++	vpand		$MASK,$H0,$H0
+++	vpaddq		$D0,$D1,$H1		# h0 -> h1
+++
+++	vpsrlq		\$26,$H4,$D4
+++	vpand		$MASK,$H4,$H4
+++
+++	 vpsrlq		\$4,$T3,$T2
+++
+++	vpsrlq		\$26,$H1,$D1
+++	vpand		$MASK,$H1,$H1
+++	vpaddq		$D1,$H2,$H2		# h1 -> h2
+++
+++	vpaddq		$D4,$H0,$H0
+++	vpsllq		\$2,$D4,$D4
+++	vpaddq		$D4,$H0,$H0		# h4 -> h0
+++
+++	 vpand		$MASK,$T2,$T2		# 2
+++	 vpsrlq		\$26,$T0,$T1
+++
+++	vpsrlq		\$26,$H2,$D2
+++	vpand		$MASK,$H2,$H2
+++	vpaddq		$D2,$H3,$H3		# h2 -> h3
+++
+++	 vpaddq		$T2,$H2,$H2		# modulo-scheduled
+++	 vpsrlq		\$30,$T3,$T3
+++
+++	vpsrlq		\$26,$H0,$D0
+++	vpand		$MASK,$H0,$H0
+++	vpaddq		$D0,$H1,$H1		# h0 -> h1
+++
+++	 vpsrlq		\$40,$T4,$T4		# 4
+++
+++	vpsrlq		\$26,$H3,$D3
+++	vpand		$MASK,$H3,$H3
+++	vpaddq		$D3,$H4,$H4		# h3 -> h4
+++
+++	 vpand		$MASK,$T0,$T0		# 0
+++	 vpand		$MASK,$T1,$T1		# 1
+++	 vpand		$MASK,$T3,$T3		# 3
+++	 vpor		32(%rcx),$T4,$T4	# padbit, yes, always
+++
+++	sub		\$64,$len
+++	jnz		.Loop_avx2
+++
+++	.byte		0x66,0x90
+++.Ltail_avx2:
+++	################################################################
+++	# while above multiplications were by r^4 in all lanes, in last
+++	# iteration we multiply least significant lane by r^4 and most
+++	# significant one by r, so copy of above except that references
+++	# to the precomputed table are displaced by 4...
+++
+++	#vpaddq		$H2,$T2,$H2		# accumulate input
+++	vpaddq		$H0,$T0,$H0
+++	vmovdqu		`32*0+4`(%rsp),$T0	# r0^4
+++	vpaddq		$H1,$T1,$H1
+++	vmovdqu		`32*1+4`(%rsp),$T1	# r1^4
+++	vpaddq		$H3,$T3,$H3
+++	vmovdqu		`32*3+4`(%rsp),$T2	# r2^4
+++	vpaddq		$H4,$T4,$H4
+++	vmovdqu		`32*6+4-0x90`(%rax),$T3	# s3^4
+++	vmovdqu		`32*8+4-0x90`(%rax),$S4	# s4^4
+++
+++	vpmuludq	$H2,$T0,$D2		# d2 = h2*r0
+++	vpmuludq	$H2,$T1,$D3		# d3 = h2*r1
+++	vpmuludq	$H2,$T2,$D4		# d4 = h2*r2
+++	vpmuludq	$H2,$T3,$D0		# d0 = h2*s3
+++	vpmuludq	$H2,$S4,$D1		# d1 = h2*s4
+++
+++	vpmuludq	$H0,$T1,$T4		# h0*r1
+++	vpmuludq	$H1,$T1,$H2		# h1*r1
+++	vpaddq		$T4,$D1,$D1		# d1 += h0*r1
+++	vpaddq		$H2,$D2,$D2		# d2 += h1*r1
+++	vpmuludq	$H3,$T1,$T4		# h3*r1
+++	vpmuludq	`32*2+4`(%rsp),$H4,$H2	# h4*s1
+++	vpaddq		$T4,$D4,$D4		# d4 += h3*r1
+++	vpaddq		$H2,$D0,$D0		# d0 += h4*s1
+++
+++	vpmuludq	$H0,$T0,$T4		# h0*r0
+++	vpmuludq	$H1,$T0,$H2		# h1*r0
+++	vpaddq		$T4,$D0,$D0		# d0 += h0*r0
+++	 vmovdqu	`32*4+4-0x90`(%rax),$T1	# s2
+++	vpaddq		$H2,$D1,$D1		# d1 += h1*r0
+++	vpmuludq	$H3,$T0,$T4		# h3*r0
+++	vpmuludq	$H4,$T0,$H2		# h4*r0
+++	vpaddq		$T4,$D3,$D3		# d3 += h3*r0
+++	vpaddq		$H2,$D4,$D4		# d4 += h4*r0
+++
+++	vpmuludq	$H3,$T1,$T4		# h3*s2
+++	vpmuludq	$H4,$T1,$H2		# h4*s2
+++	vpaddq		$T4,$D0,$D0		# d0 += h3*s2
+++	vpaddq		$H2,$D1,$D1		# d1 += h4*s2
+++	 vmovdqu	`32*5+4-0x90`(%rax),$H2	# r3
+++	vpmuludq	$H1,$T2,$T4		# h1*r2
+++	vpmuludq	$H0,$T2,$T2		# h0*r2
+++	vpaddq		$T4,$D3,$D3		# d3 += h1*r2
+++	vpaddq		$T2,$D2,$D2		# d2 += h0*r2
+++
+++	vpmuludq	$H1,$H2,$T4		# h1*r3
+++	vpmuludq	$H0,$H2,$H2		# h0*r3
+++	vpaddq		$T4,$D4,$D4		# d4 += h1*r3
+++	vpaddq		$H2,$D3,$D3		# d3 += h0*r3
+++	vpmuludq	$H3,$T3,$T4		# h3*s3
+++	vpmuludq	$H4,$T3,$H2		# h4*s3
+++	vpaddq		$T4,$D1,$D1		# d1 += h3*s3
+++	vpaddq		$H2,$D2,$D2		# d2 += h4*s3
+++
+++	vpmuludq	$H3,$S4,$H3		# h3*s4
+++	vpmuludq	$H4,$S4,$H4		# h4*s4
+++	vpaddq		$H3,$D2,$H2		# h2 = d2 + h3*r4
+++	vpaddq		$H4,$D3,$H3		# h3 = d3 + h4*r4
+++	vpmuludq	`32*7+4-0x90`(%rax),$H0,$H4		# h0*r4
+++	vpmuludq	$H1,$S4,$H0		# h1*s4
+++	vmovdqa		64(%rcx),$MASK		# .Lmask26
+++	vpaddq		$H4,$D4,$H4		# h4 = d4 + h0*r4
+++	vpaddq		$H0,$D0,$H0		# h0 = d0 + h1*s4
+++
+++	################################################################
+++	# horizontal addition
+++
+++	vpsrldq		\$8,$D1,$T1
+++	vpsrldq		\$8,$H2,$T2
+++	vpsrldq		\$8,$H3,$T3
+++	vpsrldq		\$8,$H4,$T4
+++	vpsrldq		\$8,$H0,$T0
+++	vpaddq		$T1,$D1,$D1
+++	vpaddq		$T2,$H2,$H2
+++	vpaddq		$T3,$H3,$H3
+++	vpaddq		$T4,$H4,$H4
+++	vpaddq		$T0,$H0,$H0
+++
+++	vpermq		\$0x2,$H3,$T3
+++	vpermq		\$0x2,$H4,$T4
+++	vpermq		\$0x2,$H0,$T0
+++	vpermq		\$0x2,$D1,$T1
+++	vpermq		\$0x2,$H2,$T2
+++	vpaddq		$T3,$H3,$H3
+++	vpaddq		$T4,$H4,$H4
+++	vpaddq		$T0,$H0,$H0
+++	vpaddq		$T1,$D1,$D1
+++	vpaddq		$T2,$H2,$H2
+++
+++	################################################################
+++	# lazy reduction
+++
+++	vpsrlq		\$26,$H3,$D3
+++	vpand		$MASK,$H3,$H3
+++	vpaddq		$D3,$H4,$H4		# h3 -> h4
+++
+++	vpsrlq		\$26,$H0,$D0
+++	vpand		$MASK,$H0,$H0
+++	vpaddq		$D0,$D1,$H1		# h0 -> h1
+++
+++	vpsrlq		\$26,$H4,$D4
+++	vpand		$MASK,$H4,$H4
+++
+++	vpsrlq		\$26,$H1,$D1
+++	vpand		$MASK,$H1,$H1
+++	vpaddq		$D1,$H2,$H2		# h1 -> h2
+++
+++	vpaddq		$D4,$H0,$H0
+++	vpsllq		\$2,$D4,$D4
+++	vpaddq		$D4,$H0,$H0		# h4 -> h0
+++
+++	vpsrlq		\$26,$H2,$D2
+++	vpand		$MASK,$H2,$H2
+++	vpaddq		$D2,$H3,$H3		# h2 -> h3
+++
+++	vpsrlq		\$26,$H0,$D0
+++	vpand		$MASK,$H0,$H0
+++	vpaddq		$D0,$H1,$H1		# h0 -> h1
+++
+++	vpsrlq		\$26,$H3,$D3
+++	vpand		$MASK,$H3,$H3
+++	vpaddq		$D3,$H4,$H4		# h3 -> h4
+++
+++	vmovd		%x#$H0,`4*0-48-64`($ctx)# save partially reduced
+++	vmovd		%x#$H1,`4*1-48-64`($ctx)
+++	vmovd		%x#$H2,`4*2-48-64`($ctx)
+++	vmovd		%x#$H3,`4*3-48-64`($ctx)
+++	vmovd		%x#$H4,`4*4-48-64`($ctx)
+++___
+++$code.=<<___	if ($win64);
+++	vmovdqa		0x50(%r11),%xmm6
+++	vmovdqa		0x60(%r11),%xmm7
+++	vmovdqa		0x70(%r11),%xmm8
+++	vmovdqa		0x80(%r11),%xmm9
+++	vmovdqa		0x90(%r11),%xmm10
+++	vmovdqa		0xa0(%r11),%xmm11
+++	vmovdqa		0xb0(%r11),%xmm12
+++	vmovdqa		0xc0(%r11),%xmm13
+++	vmovdqa		0xd0(%r11),%xmm14
+++	vmovdqa		0xe0(%r11),%xmm15
+++	lea		0xf8(%r11),%rsp
+++.Ldo_avx2_epilogue:
+++___
+++$code.=<<___	if (!$win64);
+++	lea		8(%r11),%rsp
+++.cfi_def_cfa		%rsp,8
+++___
+++$code.=<<___;
+++	vzeroupper
+++	ret
+++.cfi_endproc
+++.size	poly1305_blocks_avx2,.-poly1305_blocks_avx2
+++___
+++#######################################################################
+++if ($avx>2) {
+++# On entry we have input length divisible by 64. But since inner loop
+++# processes 128 bytes per iteration, cases when length is not divisible
+++# by 128 are handled by passing tail 64 bytes to .Ltail_avx2. For this
+++# reason stack layout is kept identical to poly1305_blocks_avx2. If not
+++# for this tail, we wouldn't have to even allocate stack frame...
+++
+++my ($R0,$R1,$R2,$R3,$R4, $S1,$S2,$S3,$S4) = map("%zmm$_",(16..24));
+++my ($M0,$M1,$M2,$M3,$M4) = map("%zmm$_",(25..29));
+++my $PADBIT="%zmm30";
+++
+++map(s/%y/%z/,($T4,$T0,$T1,$T2,$T3));		# switch to %zmm domain
+++map(s/%y/%z/,($D0,$D1,$D2,$D3,$D4));
+++map(s/%y/%z/,($H0,$H1,$H2,$H3,$H4));
+++map(s/%y/%z/,($MASK));
+++
+++$code.=<<___;
+++.type	poly1305_blocks_avx512,\@function,4
+++.align	32
+++poly1305_blocks_avx512:
+++.cfi_startproc
+++.Lblocks_avx512:
+++	mov		\$15,%eax
+++	kmovw		%eax,%k2
+++___
+++$code.=<<___	if (!$win64);
+++	lea		-8(%rsp),%r11
+++.cfi_def_cfa		%r11,16
+++	sub		\$0x128,%rsp
+++___
+++$code.=<<___	if ($win64);
+++	lea		-0xf8(%rsp),%r11
+++	sub		\$0x1c8,%rsp
+++	vmovdqa		%xmm6,0x50(%r11)
+++	vmovdqa		%xmm7,0x60(%r11)
+++	vmovdqa		%xmm8,0x70(%r11)
+++	vmovdqa		%xmm9,0x80(%r11)
+++	vmovdqa		%xmm10,0x90(%r11)
+++	vmovdqa		%xmm11,0xa0(%r11)
+++	vmovdqa		%xmm12,0xb0(%r11)
+++	vmovdqa		%xmm13,0xc0(%r11)
+++	vmovdqa		%xmm14,0xd0(%r11)
+++	vmovdqa		%xmm15,0xe0(%r11)
+++.Ldo_avx512_body:
+++___
+++$code.=<<___;
+++	lea		.Lconst(%rip),%rcx
+++	lea		48+64($ctx),$ctx	# size optimization
+++	vmovdqa		96(%rcx),%y#$T2		# .Lpermd_avx2
+++
+++	# expand pre-calculated table
+++	vmovdqu		`16*0-64`($ctx),%x#$D0	# will become expanded ${R0}
+++	and		\$-512,%rsp
+++	vmovdqu		`16*1-64`($ctx),%x#$D1	# will become ... ${R1}
+++	mov		\$0x20,%rax
+++	vmovdqu		`16*2-64`($ctx),%x#$T0	# ... ${S1}
+++	vmovdqu		`16*3-64`($ctx),%x#$D2	# ... ${R2}
+++	vmovdqu		`16*4-64`($ctx),%x#$T1	# ... ${S2}
+++	vmovdqu		`16*5-64`($ctx),%x#$D3	# ... ${R3}
+++	vmovdqu		`16*6-64`($ctx),%x#$T3	# ... ${S3}
+++	vmovdqu		`16*7-64`($ctx),%x#$D4	# ... ${R4}
+++	vmovdqu		`16*8-64`($ctx),%x#$T4	# ... ${S4}
+++	vpermd		$D0,$T2,$R0		# 00003412 -> 14243444
+++	vpbroadcastq	64(%rcx),$MASK		# .Lmask26
+++	vpermd		$D1,$T2,$R1
+++	vpermd		$T0,$T2,$S1
+++	vpermd		$D2,$T2,$R2
+++	vmovdqa64	$R0,0x00(%rsp){%k2}	# save in case $len%128 != 0
+++	 vpsrlq		\$32,$R0,$T0		# 14243444 -> 01020304
+++	vpermd		$T1,$T2,$S2
+++	vmovdqu64	$R1,0x00(%rsp,%rax){%k2}
+++	 vpsrlq		\$32,$R1,$T1
+++	vpermd		$D3,$T2,$R3
+++	vmovdqa64	$S1,0x40(%rsp){%k2}
+++	vpermd		$T3,$T2,$S3
+++	vpermd		$D4,$T2,$R4
+++	vmovdqu64	$R2,0x40(%rsp,%rax){%k2}
+++	vpermd		$T4,$T2,$S4
+++	vmovdqa64	$S2,0x80(%rsp){%k2}
+++	vmovdqu64	$R3,0x80(%rsp,%rax){%k2}
+++	vmovdqa64	$S3,0xc0(%rsp){%k2}
+++	vmovdqu64	$R4,0xc0(%rsp,%rax){%k2}
+++	vmovdqa64	$S4,0x100(%rsp){%k2}
+++
+++	################################################################
+++	# calculate 5th through 8th powers of the key
+++	#
+++	# d0 = r0'*r0 + r1'*5*r4 + r2'*5*r3 + r3'*5*r2 + r4'*5*r1
+++	# d1 = r0'*r1 + r1'*r0   + r2'*5*r4 + r3'*5*r3 + r4'*5*r2
+++	# d2 = r0'*r2 + r1'*r1   + r2'*r0   + r3'*5*r4 + r4'*5*r3
+++	# d3 = r0'*r3 + r1'*r2   + r2'*r1   + r3'*r0   + r4'*5*r4
+++	# d4 = r0'*r4 + r1'*r3   + r2'*r2   + r3'*r1   + r4'*r0
+++
+++	vpmuludq	$T0,$R0,$D0		# d0 = r0'*r0
+++	vpmuludq	$T0,$R1,$D1		# d1 = r0'*r1
+++	vpmuludq	$T0,$R2,$D2		# d2 = r0'*r2
+++	vpmuludq	$T0,$R3,$D3		# d3 = r0'*r3
+++	vpmuludq	$T0,$R4,$D4		# d4 = r0'*r4
+++	 vpsrlq		\$32,$R2,$T2
+++
+++	vpmuludq	$T1,$S4,$M0
+++	vpmuludq	$T1,$R0,$M1
+++	vpmuludq	$T1,$R1,$M2
+++	vpmuludq	$T1,$R2,$M3
+++	vpmuludq	$T1,$R3,$M4
+++	 vpsrlq		\$32,$R3,$T3
+++	vpaddq		$M0,$D0,$D0		# d0 += r1'*5*r4
+++	vpaddq		$M1,$D1,$D1		# d1 += r1'*r0
+++	vpaddq		$M2,$D2,$D2		# d2 += r1'*r1
+++	vpaddq		$M3,$D3,$D3		# d3 += r1'*r2
+++	vpaddq		$M4,$D4,$D4		# d4 += r1'*r3
+++
+++	vpmuludq	$T2,$S3,$M0
+++	vpmuludq	$T2,$S4,$M1
+++	vpmuludq	$T2,$R1,$M3
+++	vpmuludq	$T2,$R2,$M4
+++	vpmuludq	$T2,$R0,$M2
+++	 vpsrlq		\$32,$R4,$T4
+++	vpaddq		$M0,$D0,$D0		# d0 += r2'*5*r3
+++	vpaddq		$M1,$D1,$D1		# d1 += r2'*5*r4
+++	vpaddq		$M3,$D3,$D3		# d3 += r2'*r1
+++	vpaddq		$M4,$D4,$D4		# d4 += r2'*r2
+++	vpaddq		$M2,$D2,$D2		# d2 += r2'*r0
+++
+++	vpmuludq	$T3,$S2,$M0
+++	vpmuludq	$T3,$R0,$M3
+++	vpmuludq	$T3,$R1,$M4
+++	vpmuludq	$T3,$S3,$M1
+++	vpmuludq	$T3,$S4,$M2
+++	vpaddq		$M0,$D0,$D0		# d0 += r3'*5*r2
+++	vpaddq		$M3,$D3,$D3		# d3 += r3'*r0
+++	vpaddq		$M4,$D4,$D4		# d4 += r3'*r1
+++	vpaddq		$M1,$D1,$D1		# d1 += r3'*5*r3
+++	vpaddq		$M2,$D2,$D2		# d2 += r3'*5*r4
+++
+++	vpmuludq	$T4,$S4,$M3
+++	vpmuludq	$T4,$R0,$M4
+++	vpmuludq	$T4,$S1,$M0
+++	vpmuludq	$T4,$S2,$M1
+++	vpmuludq	$T4,$S3,$M2
+++	vpaddq		$M3,$D3,$D3		# d3 += r2'*5*r4
+++	vpaddq		$M4,$D4,$D4		# d4 += r2'*r0
+++	vpaddq		$M0,$D0,$D0		# d0 += r2'*5*r1
+++	vpaddq		$M1,$D1,$D1		# d1 += r2'*5*r2
+++	vpaddq		$M2,$D2,$D2		# d2 += r2'*5*r3
+++
+++	################################################################
+++	# load input
+++	vmovdqu64	16*0($inp),%z#$T3
+++	vmovdqu64	16*4($inp),%z#$T4
+++	lea		16*8($inp),$inp
+++
+++	################################################################
+++	# lazy reduction
+++
+++	vpsrlq		\$26,$D3,$M3
+++	vpandq		$MASK,$D3,$D3
+++	vpaddq		$M3,$D4,$D4		# d3 -> d4
+++
+++	vpsrlq		\$26,$D0,$M0
+++	vpandq		$MASK,$D0,$D0
+++	vpaddq		$M0,$D1,$D1		# d0 -> d1
+++
+++	vpsrlq		\$26,$D4,$M4
+++	vpandq		$MASK,$D4,$D4
+++
+++	vpsrlq		\$26,$D1,$M1
+++	vpandq		$MASK,$D1,$D1
+++	vpaddq		$M1,$D2,$D2		# d1 -> d2
+++
+++	vpaddq		$M4,$D0,$D0
+++	vpsllq		\$2,$M4,$M4
+++	vpaddq		$M4,$D0,$D0		# d4 -> d0
+++
+++	vpsrlq		\$26,$D2,$M2
+++	vpandq		$MASK,$D2,$D2
+++	vpaddq		$M2,$D3,$D3		# d2 -> d3
+++
+++	vpsrlq		\$26,$D0,$M0
+++	vpandq		$MASK,$D0,$D0
+++	vpaddq		$M0,$D1,$D1		# d0 -> d1
+++
+++	vpsrlq		\$26,$D3,$M3
+++	vpandq		$MASK,$D3,$D3
+++	vpaddq		$M3,$D4,$D4		# d3 -> d4
+++
+++	################################################################
+++	# at this point we have 14243444 in $R0-$S4 and 05060708 in
+++	# $D0-$D4, ...
+++
+++	vpunpcklqdq	$T4,$T3,$T0	# transpose input
+++	vpunpckhqdq	$T4,$T3,$T4
+++
+++	# ... since input 64-bit lanes are ordered as 73625140, we could
+++	# "vperm" it to 76543210 (here and in each loop iteration), *or*
+++	# we could just flow along, hence the goal for $R0-$S4 is
+++	# 1858286838784888 ...
+++
+++	vmovdqa32	128(%rcx),$M0		# .Lpermd_avx512:
+++	mov		\$0x7777,%eax
+++	kmovw		%eax,%k1
+++
+++	vpermd		$R0,$M0,$R0		# 14243444 -> 1---2---3---4---
+++	vpermd		$R1,$M0,$R1
+++	vpermd		$R2,$M0,$R2
+++	vpermd		$R3,$M0,$R3
+++	vpermd		$R4,$M0,$R4
+++
+++	vpermd		$D0,$M0,${R0}{%k1}	# 05060708 -> 1858286838784888
+++	vpermd		$D1,$M0,${R1}{%k1}
+++	vpermd		$D2,$M0,${R2}{%k1}
+++	vpermd		$D3,$M0,${R3}{%k1}
+++	vpermd		$D4,$M0,${R4}{%k1}
+++
+++	vpslld		\$2,$R1,$S1		# *5
+++	vpslld		\$2,$R2,$S2
+++	vpslld		\$2,$R3,$S3
+++	vpslld		\$2,$R4,$S4
+++	vpaddd		$R1,$S1,$S1
+++	vpaddd		$R2,$S2,$S2
+++	vpaddd		$R3,$S3,$S3
+++	vpaddd		$R4,$S4,$S4
+++
+++	vpbroadcastq	32(%rcx),$PADBIT	# .L129
+++
+++	vpsrlq		\$52,$T0,$T2		# splat input
+++	vpsllq		\$12,$T4,$T3
+++	vporq		$T3,$T2,$T2
+++	vpsrlq		\$26,$T0,$T1
+++	vpsrlq		\$14,$T4,$T3
+++	vpsrlq		\$40,$T4,$T4		# 4
+++	vpandq		$MASK,$T2,$T2		# 2
+++	vpandq		$MASK,$T0,$T0		# 0
+++	#vpandq		$MASK,$T1,$T1		# 1
+++	#vpandq		$MASK,$T3,$T3		# 3
+++	#vporq		$PADBIT,$T4,$T4		# padbit, yes, always
+++
+++	vpaddq		$H2,$T2,$H2		# accumulate input
+++	sub		\$192,$len
+++	jbe		.Ltail_avx512
+++	jmp		.Loop_avx512
+++
+++.align	32
+++.Loop_avx512:
+++	################################################################
+++	# ((inp[0]*r^8+inp[ 8])*r^8+inp[16])*r^8
+++	# ((inp[1]*r^8+inp[ 9])*r^8+inp[17])*r^7
+++	# ((inp[2]*r^8+inp[10])*r^8+inp[18])*r^6
+++	# ((inp[3]*r^8+inp[11])*r^8+inp[19])*r^5
+++	# ((inp[4]*r^8+inp[12])*r^8+inp[20])*r^4
+++	# ((inp[5]*r^8+inp[13])*r^8+inp[21])*r^3
+++	# ((inp[6]*r^8+inp[14])*r^8+inp[22])*r^2
+++	# ((inp[7]*r^8+inp[15])*r^8+inp[23])*r^1
+++	#   \________/\___________/
+++	################################################################
+++	#vpaddq		$H2,$T2,$H2		# accumulate input
+++
+++	# d4 = h4*r0 + h3*r1   + h2*r2   + h1*r3   + h0*r4
+++	# d3 = h3*r0 + h2*r1   + h1*r2   + h0*r3   + h4*5*r4
+++	# d2 = h2*r0 + h1*r1   + h0*r2   + h4*5*r3 + h3*5*r4
+++	# d1 = h1*r0 + h0*r1   + h4*5*r2 + h3*5*r3 + h2*5*r4
+++	# d0 = h0*r0 + h4*5*r1 + h3*5*r2 + h2*5*r3 + h1*5*r4
+++	#
+++	# however, as h2 is "chronologically" first one available pull
+++	# corresponding operations up, so it's
+++	#
+++	# d3 = h2*r1   + h0*r3 + h1*r2   + h3*r0 + h4*5*r4
+++	# d4 = h2*r2   + h0*r4 + h1*r3   + h3*r1 + h4*r0
+++	# d0 = h2*5*r3 + h0*r0 + h1*5*r4         + h3*5*r2 + h4*5*r1
+++	# d1 = h2*5*r4 + h0*r1           + h1*r0 + h3*5*r3 + h4*5*r2
+++	# d2 = h2*r0           + h0*r2   + h1*r1 + h3*5*r4 + h4*5*r3
+++
+++	vpmuludq	$H2,$R1,$D3		# d3 = h2*r1
+++	 vpaddq		$H0,$T0,$H0
+++	vpmuludq	$H2,$R2,$D4		# d4 = h2*r2
+++	 vpandq		$MASK,$T1,$T1		# 1
+++	vpmuludq	$H2,$S3,$D0		# d0 = h2*s3
+++	 vpandq		$MASK,$T3,$T3		# 3
+++	vpmuludq	$H2,$S4,$D1		# d1 = h2*s4
+++	 vporq		$PADBIT,$T4,$T4		# padbit, yes, always
+++	vpmuludq	$H2,$R0,$D2		# d2 = h2*r0
+++	 vpaddq		$H1,$T1,$H1		# accumulate input
+++	 vpaddq		$H3,$T3,$H3
+++	 vpaddq		$H4,$T4,$H4
+++
+++	  vmovdqu64	16*0($inp),$T3		# load input
+++	  vmovdqu64	16*4($inp),$T4
+++	  lea		16*8($inp),$inp
+++	vpmuludq	$H0,$R3,$M3
+++	vpmuludq	$H0,$R4,$M4
+++	vpmuludq	$H0,$R0,$M0
+++	vpmuludq	$H0,$R1,$M1
+++	vpaddq		$M3,$D3,$D3		# d3 += h0*r3
+++	vpaddq		$M4,$D4,$D4		# d4 += h0*r4
+++	vpaddq		$M0,$D0,$D0		# d0 += h0*r0
+++	vpaddq		$M1,$D1,$D1		# d1 += h0*r1
+++
+++	vpmuludq	$H1,$R2,$M3
+++	vpmuludq	$H1,$R3,$M4
+++	vpmuludq	$H1,$S4,$M0
+++	vpmuludq	$H0,$R2,$M2
+++	vpaddq		$M3,$D3,$D3		# d3 += h1*r2
+++	vpaddq		$M4,$D4,$D4		# d4 += h1*r3
+++	vpaddq		$M0,$D0,$D0		# d0 += h1*s4
+++	vpaddq		$M2,$D2,$D2		# d2 += h0*r2
+++
+++	  vpunpcklqdq	$T4,$T3,$T0		# transpose input
+++	  vpunpckhqdq	$T4,$T3,$T4
+++
+++	vpmuludq	$H3,$R0,$M3
+++	vpmuludq	$H3,$R1,$M4
+++	vpmuludq	$H1,$R0,$M1
+++	vpmuludq	$H1,$R1,$M2
+++	vpaddq		$M3,$D3,$D3		# d3 += h3*r0
+++	vpaddq		$M4,$D4,$D4		# d4 += h3*r1
+++	vpaddq		$M1,$D1,$D1		# d1 += h1*r0
+++	vpaddq		$M2,$D2,$D2		# d2 += h1*r1
+++
+++	vpmuludq	$H4,$S4,$M3
+++	vpmuludq	$H4,$R0,$M4
+++	vpmuludq	$H3,$S2,$M0
+++	vpmuludq	$H3,$S3,$M1
+++	vpaddq		$M3,$D3,$D3		# d3 += h4*s4
+++	vpmuludq	$H3,$S4,$M2
+++	vpaddq		$M4,$D4,$D4		# d4 += h4*r0
+++	vpaddq		$M0,$D0,$D0		# d0 += h3*s2
+++	vpaddq		$M1,$D1,$D1		# d1 += h3*s3
+++	vpaddq		$M2,$D2,$D2		# d2 += h3*s4
+++
+++	vpmuludq	$H4,$S1,$M0
+++	vpmuludq	$H4,$S2,$M1
+++	vpmuludq	$H4,$S3,$M2
+++	vpaddq		$M0,$D0,$H0		# h0 = d0 + h4*s1
+++	vpaddq		$M1,$D1,$H1		# h1 = d2 + h4*s2
+++	vpaddq		$M2,$D2,$H2		# h2 = d3 + h4*s3
+++
+++	################################################################
+++	# lazy reduction (interleaved with input splat)
+++
+++	 vpsrlq		\$52,$T0,$T2		# splat input
+++	 vpsllq		\$12,$T4,$T3
+++
+++	vpsrlq		\$26,$D3,$H3
+++	vpandq		$MASK,$D3,$D3
+++	vpaddq		$H3,$D4,$H4		# h3 -> h4
+++
+++	 vporq		$T3,$T2,$T2
+++
+++	vpsrlq		\$26,$H0,$D0
+++	vpandq		$MASK,$H0,$H0
+++	vpaddq		$D0,$H1,$H1		# h0 -> h1
+++
+++	 vpandq		$MASK,$T2,$T2		# 2
+++
+++	vpsrlq		\$26,$H4,$D4
+++	vpandq		$MASK,$H4,$H4
+++
+++	vpsrlq		\$26,$H1,$D1
+++	vpandq		$MASK,$H1,$H1
+++	vpaddq		$D1,$H2,$H2		# h1 -> h2
+++
+++	vpaddq		$D4,$H0,$H0
+++	vpsllq		\$2,$D4,$D4
+++	vpaddq		$D4,$H0,$H0		# h4 -> h0
+++
+++	 vpaddq		$T2,$H2,$H2		# modulo-scheduled
+++	 vpsrlq		\$26,$T0,$T1
+++
+++	vpsrlq		\$26,$H2,$D2
+++	vpandq		$MASK,$H2,$H2
+++	vpaddq		$D2,$D3,$H3		# h2 -> h3
+++
+++	 vpsrlq		\$14,$T4,$T3
+++
+++	vpsrlq		\$26,$H0,$D0
+++	vpandq		$MASK,$H0,$H0
+++	vpaddq		$D0,$H1,$H1		# h0 -> h1
+++
+++	 vpsrlq		\$40,$T4,$T4		# 4
+++
+++	vpsrlq		\$26,$H3,$D3
+++	vpandq		$MASK,$H3,$H3
+++	vpaddq		$D3,$H4,$H4		# h3 -> h4
+++
+++	 vpandq		$MASK,$T0,$T0		# 0
+++	 #vpandq	$MASK,$T1,$T1		# 1
+++	 #vpandq	$MASK,$T3,$T3		# 3
+++	 #vporq		$PADBIT,$T4,$T4		# padbit, yes, always
+++
+++	sub		\$128,$len
+++	ja		.Loop_avx512
+++
+++.Ltail_avx512:
+++	################################################################
+++	# while above multiplications were by r^8 in all lanes, in last
+++	# iteration we multiply least significant lane by r^8 and most
+++	# significant one by r, that's why table gets shifted...
+++
+++	vpsrlq		\$32,$R0,$R0		# 0105020603070408
+++	vpsrlq		\$32,$R1,$R1
+++	vpsrlq		\$32,$R2,$R2
+++	vpsrlq		\$32,$S3,$S3
+++	vpsrlq		\$32,$S4,$S4
+++	vpsrlq		\$32,$R3,$R3
+++	vpsrlq		\$32,$R4,$R4
+++	vpsrlq		\$32,$S1,$S1
+++	vpsrlq		\$32,$S2,$S2
+++
+++	################################################################
+++	# load either next or last 64 byte of input
+++	lea		($inp,$len),$inp
+++
+++	#vpaddq		$H2,$T2,$H2		# accumulate input
+++	vpaddq		$H0,$T0,$H0
+++
+++	vpmuludq	$H2,$R1,$D3		# d3 = h2*r1
+++	vpmuludq	$H2,$R2,$D4		# d4 = h2*r2
+++	vpmuludq	$H2,$S3,$D0		# d0 = h2*s3
+++	 vpandq		$MASK,$T1,$T1		# 1
+++	vpmuludq	$H2,$S4,$D1		# d1 = h2*s4
+++	 vpandq		$MASK,$T3,$T3		# 3
+++	vpmuludq	$H2,$R0,$D2		# d2 = h2*r0
+++	 vporq		$PADBIT,$T4,$T4		# padbit, yes, always
+++	 vpaddq		$H1,$T1,$H1		# accumulate input
+++	 vpaddq		$H3,$T3,$H3
+++	 vpaddq		$H4,$T4,$H4
+++
+++	  vmovdqu	16*0($inp),%x#$T0
+++	vpmuludq	$H0,$R3,$M3
+++	vpmuludq	$H0,$R4,$M4
+++	vpmuludq	$H0,$R0,$M0
+++	vpmuludq	$H0,$R1,$M1
+++	vpaddq		$M3,$D3,$D3		# d3 += h0*r3
+++	vpaddq		$M4,$D4,$D4		# d4 += h0*r4
+++	vpaddq		$M0,$D0,$D0		# d0 += h0*r0
+++	vpaddq		$M1,$D1,$D1		# d1 += h0*r1
+++
+++	  vmovdqu	16*1($inp),%x#$T1
+++	vpmuludq	$H1,$R2,$M3
+++	vpmuludq	$H1,$R3,$M4
+++	vpmuludq	$H1,$S4,$M0
+++	vpmuludq	$H0,$R2,$M2
+++	vpaddq		$M3,$D3,$D3		# d3 += h1*r2
+++	vpaddq		$M4,$D4,$D4		# d4 += h1*r3
+++	vpaddq		$M0,$D0,$D0		# d0 += h1*s4
+++	vpaddq		$M2,$D2,$D2		# d2 += h0*r2
+++
+++	  vinserti128	\$1,16*2($inp),%y#$T0,%y#$T0
+++	vpmuludq	$H3,$R0,$M3
+++	vpmuludq	$H3,$R1,$M4
+++	vpmuludq	$H1,$R0,$M1
+++	vpmuludq	$H1,$R1,$M2
+++	vpaddq		$M3,$D3,$D3		# d3 += h3*r0
+++	vpaddq		$M4,$D4,$D4		# d4 += h3*r1
+++	vpaddq		$M1,$D1,$D1		# d1 += h1*r0
+++	vpaddq		$M2,$D2,$D2		# d2 += h1*r1
+++
+++	  vinserti128	\$1,16*3($inp),%y#$T1,%y#$T1
+++	vpmuludq	$H4,$S4,$M3
+++	vpmuludq	$H4,$R0,$M4
+++	vpmuludq	$H3,$S2,$M0
+++	vpmuludq	$H3,$S3,$M1
+++	vpmuludq	$H3,$S4,$M2
+++	vpaddq		$M3,$D3,$H3		# h3 = d3 + h4*s4
+++	vpaddq		$M4,$D4,$D4		# d4 += h4*r0
+++	vpaddq		$M0,$D0,$D0		# d0 += h3*s2
+++	vpaddq		$M1,$D1,$D1		# d1 += h3*s3
+++	vpaddq		$M2,$D2,$D2		# d2 += h3*s4
+++
+++	vpmuludq	$H4,$S1,$M0
+++	vpmuludq	$H4,$S2,$M1
+++	vpmuludq	$H4,$S3,$M2
+++	vpaddq		$M0,$D0,$H0		# h0 = d0 + h4*s1
+++	vpaddq		$M1,$D1,$H1		# h1 = d2 + h4*s2
+++	vpaddq		$M2,$D2,$H2		# h2 = d3 + h4*s3
+++
+++	################################################################
+++	# horizontal addition
+++
+++	mov		\$1,%eax
+++	vpermq		\$0xb1,$H3,$D3
+++	vpermq		\$0xb1,$D4,$H4
+++	vpermq		\$0xb1,$H0,$D0
+++	vpermq		\$0xb1,$H1,$D1
+++	vpermq		\$0xb1,$H2,$D2
+++	vpaddq		$D3,$H3,$H3
+++	vpaddq		$D4,$H4,$H4
+++	vpaddq		$D0,$H0,$H0
+++	vpaddq		$D1,$H1,$H1
+++	vpaddq		$D2,$H2,$H2
+++
+++	kmovw		%eax,%k3
+++	vpermq		\$0x2,$H3,$D3
+++	vpermq		\$0x2,$H4,$D4
+++	vpermq		\$0x2,$H0,$D0
+++	vpermq		\$0x2,$H1,$D1
+++	vpermq		\$0x2,$H2,$D2
+++	vpaddq		$D3,$H3,$H3
+++	vpaddq		$D4,$H4,$H4
+++	vpaddq		$D0,$H0,$H0
+++	vpaddq		$D1,$H1,$H1
+++	vpaddq		$D2,$H2,$H2
+++
+++	vextracti64x4	\$0x1,$H3,%y#$D3
+++	vextracti64x4	\$0x1,$H4,%y#$D4
+++	vextracti64x4	\$0x1,$H0,%y#$D0
+++	vextracti64x4	\$0x1,$H1,%y#$D1
+++	vextracti64x4	\$0x1,$H2,%y#$D2
+++	vpaddq		$D3,$H3,${H3}{%k3}{z}	# keep single qword in case
+++	vpaddq		$D4,$H4,${H4}{%k3}{z}	# it's passed to .Ltail_avx2
+++	vpaddq		$D0,$H0,${H0}{%k3}{z}
+++	vpaddq		$D1,$H1,${H1}{%k3}{z}
+++	vpaddq		$D2,$H2,${H2}{%k3}{z}
+++___
+++map(s/%z/%y/,($T0,$T1,$T2,$T3,$T4, $PADBIT));
+++map(s/%z/%y/,($H0,$H1,$H2,$H3,$H4, $D0,$D1,$D2,$D3,$D4, $MASK));
+++$code.=<<___;
+++	################################################################
+++	# lazy reduction (interleaved with input splat)
+++
+++	vpsrlq		\$26,$H3,$D3
+++	vpand		$MASK,$H3,$H3
+++	 vpsrldq	\$6,$T0,$T2		# splat input
+++	 vpsrldq	\$6,$T1,$T3
+++	 vpunpckhqdq	$T1,$T0,$T4		# 4
+++	vpaddq		$D3,$H4,$H4		# h3 -> h4
+++
+++	vpsrlq		\$26,$H0,$D0
+++	vpand		$MASK,$H0,$H0
+++	 vpunpcklqdq	$T3,$T2,$T2		# 2:3
+++	 vpunpcklqdq	$T1,$T0,$T0		# 0:1
+++	vpaddq		$D0,$H1,$H1		# h0 -> h1
+++
+++	vpsrlq		\$26,$H4,$D4
+++	vpand		$MASK,$H4,$H4
+++
+++	vpsrlq		\$26,$H1,$D1
+++	vpand		$MASK,$H1,$H1
+++	 vpsrlq		\$30,$T2,$T3
+++	 vpsrlq		\$4,$T2,$T2
+++	vpaddq		$D1,$H2,$H2		# h1 -> h2
+++
+++	vpaddq		$D4,$H0,$H0
+++	vpsllq		\$2,$D4,$D4
+++	 vpsrlq		\$26,$T0,$T1
+++	 vpsrlq		\$40,$T4,$T4		# 4
+++	vpaddq		$D4,$H0,$H0		# h4 -> h0
+++
+++	vpsrlq		\$26,$H2,$D2
+++	vpand		$MASK,$H2,$H2
+++	 vpand		$MASK,$T2,$T2		# 2
+++	 vpand		$MASK,$T0,$T0		# 0
+++	vpaddq		$D2,$H3,$H3		# h2 -> h3
+++
+++	vpsrlq		\$26,$H0,$D0
+++	vpand		$MASK,$H0,$H0
+++	 vpaddq		$H2,$T2,$H2		# accumulate input for .Ltail_avx2
+++	 vpand		$MASK,$T1,$T1		# 1
+++	vpaddq		$D0,$H1,$H1		# h0 -> h1
+++
+++	vpsrlq		\$26,$H3,$D3
+++	vpand		$MASK,$H3,$H3
+++	 vpand		$MASK,$T3,$T3		# 3
+++	 vpor		32(%rcx),$T4,$T4	# padbit, yes, always
+++	vpaddq		$D3,$H4,$H4		# h3 -> h4
+++
+++	lea		0x90(%rsp),%rax		# size optimization for .Ltail_avx2
+++	add		\$64,$len
+++	jnz		.Ltail_avx2
+++
+++	vpsubq		$T2,$H2,$H2		# undo input accumulation
+++	vmovd		%x#$H0,`4*0-48-64`($ctx)# save partially reduced
+++	vmovd		%x#$H1,`4*1-48-64`($ctx)
+++	vmovd		%x#$H2,`4*2-48-64`($ctx)
+++	vmovd		%x#$H3,`4*3-48-64`($ctx)
+++	vmovd		%x#$H4,`4*4-48-64`($ctx)
+++	vzeroall
+++___
+++$code.=<<___	if ($win64);
+++	movdqa		0x50(%r11),%xmm6
+++	movdqa		0x60(%r11),%xmm7
+++	movdqa		0x70(%r11),%xmm8
+++	movdqa		0x80(%r11),%xmm9
+++	movdqa		0x90(%r11),%xmm10
+++	movdqa		0xa0(%r11),%xmm11
+++	movdqa		0xb0(%r11),%xmm12
+++	movdqa		0xc0(%r11),%xmm13
+++	movdqa		0xd0(%r11),%xmm14
+++	movdqa		0xe0(%r11),%xmm15
+++	lea		0xf8(%r11),%rsp
+++.Ldo_avx512_epilogue:
+++___
+++$code.=<<___	if (!$win64);
+++	lea		8(%r11),%rsp
+++.cfi_def_cfa		%rsp,8
+++___
+++$code.=<<___;
+++	ret
+++.cfi_endproc
+++.size	poly1305_blocks_avx512,.-poly1305_blocks_avx512
+++___
+++if ($avx>3) {
+++########################################################################
+++# VPMADD52 version using 2^44 radix.
+++#
+++# One can argue that base 2^52 would be more natural. Well, even though
+++# some operations would be more natural, one has to recognize couple of
+++# things. Base 2^52 doesn't provide advantage over base 2^44 if you look
+++# at amount of multiply-n-accumulate operations. Secondly, it makes it
+++# impossible to pre-compute multiples of 5 [referred to as s[]/sN in
+++# reference implementations], which means that more such operations
+++# would have to be performed in inner loop, which in turn makes critical
+++# path longer. In other words, even though base 2^44 reduction might
+++# look less elegant, overall critical path is actually shorter...
+++
+++########################################################################
+++# Layout of opaque area is following.
+++#
+++#	unsigned __int64 h[3];		# current hash value base 2^44
+++#	unsigned __int64 s[2];		# key value*20 base 2^44
+++#	unsigned __int64 r[3];		# key value base 2^44
+++#	struct { unsigned __int64 r^1, r^3, r^2, r^4; } R[4];
+++#					# r^n positions reflect
+++#					# placement in register, not
+++#					# memory, R[3] is R[1]*20
+++
+++$code.=<<___;
+++.type	poly1305_init_base2_44,\@function,3
+++.align	32
+++poly1305_init_base2_44:
+++	xor	%rax,%rax
+++	mov	%rax,0($ctx)		# initialize hash value
+++	mov	%rax,8($ctx)
+++	mov	%rax,16($ctx)
+++
+++.Linit_base2_44:
+++	lea	poly1305_blocks_vpmadd52(%rip),%r10
+++	lea	poly1305_emit_base2_44(%rip),%r11
+++
+++	mov	\$0x0ffffffc0fffffff,%rax
+++	mov	\$0x0ffffffc0ffffffc,%rcx
+++	and	0($inp),%rax
+++	mov	\$0x00000fffffffffff,%r8
+++	and	8($inp),%rcx
+++	mov	\$0x00000fffffffffff,%r9
+++	and	%rax,%r8
+++	shrd	\$44,%rcx,%rax
+++	mov	%r8,40($ctx)		# r0
+++	and	%r9,%rax
+++	shr	\$24,%rcx
+++	mov	%rax,48($ctx)		# r1
+++	lea	(%rax,%rax,4),%rax	# *5
+++	mov	%rcx,56($ctx)		# r2
+++	shl	\$2,%rax		# magic <<2
+++	lea	(%rcx,%rcx,4),%rcx	# *5
+++	shl	\$2,%rcx		# magic <<2
+++	mov	%rax,24($ctx)		# s1
+++	mov	%rcx,32($ctx)		# s2
+++	movq	\$-1,64($ctx)		# write impossible value
+++___
+++$code.=<<___	if ($flavour !~ /elf32/);
+++	mov	%r10,0(%rdx)
+++	mov	%r11,8(%rdx)
+++___
+++$code.=<<___	if ($flavour =~ /elf32/);
+++	mov	%r10d,0(%rdx)
+++	mov	%r11d,4(%rdx)
+++___
+++$code.=<<___;
+++	mov	\$1,%eax
+++	ret
+++.size	poly1305_init_base2_44,.-poly1305_init_base2_44
+++___
+++{
+++my ($H0,$H1,$H2,$r2r1r0,$r1r0s2,$r0s2s1,$Dlo,$Dhi) = map("%ymm$_",(0..5,16,17));
+++my ($T0,$inp_permd,$inp_shift,$PAD) = map("%ymm$_",(18..21));
+++my ($reduc_mask,$reduc_rght,$reduc_left) = map("%ymm$_",(22..25));
+++
+++$code.=<<___;
+++.type	poly1305_blocks_vpmadd52,\@function,4
+++.align	32
+++poly1305_blocks_vpmadd52:
+++	shr	\$4,$len
+++	jz	.Lno_data_vpmadd52		# too short
+++
+++	shl	\$40,$padbit
+++	mov	64($ctx),%r8			# peek on power of the key
+++
+++	# if powers of the key are not calculated yet, process up to 3
+++	# blocks with this single-block subroutine, otherwise ensure that
+++	# length is divisible by 2 blocks and pass the rest down to next
+++	# subroutine...
+++
+++	mov	\$3,%rax
+++	mov	\$1,%r10
+++	cmp	\$4,$len			# is input long
+++	cmovae	%r10,%rax
+++	test	%r8,%r8				# is power value impossible?
+++	cmovns	%r10,%rax
+++
+++	and	$len,%rax			# is input of favourable length?
+++	jz	.Lblocks_vpmadd52_4x
+++
+++	sub		%rax,$len
+++	mov		\$7,%r10d
+++	mov		\$1,%r11d
+++	kmovw		%r10d,%k7
+++	lea		.L2_44_inp_permd(%rip),%r10
+++	kmovw		%r11d,%k1
+++
+++	vmovq		$padbit,%x#$PAD
+++	vmovdqa64	0(%r10),$inp_permd	# .L2_44_inp_permd
+++	vmovdqa64	32(%r10),$inp_shift	# .L2_44_inp_shift
+++	vpermq		\$0xcf,$PAD,$PAD
+++	vmovdqa64	64(%r10),$reduc_mask	# .L2_44_mask
+++
+++	vmovdqu64	0($ctx),${Dlo}{%k7}{z}		# load hash value
+++	vmovdqu64	40($ctx),${r2r1r0}{%k7}{z}	# load keys
+++	vmovdqu64	32($ctx),${r1r0s2}{%k7}{z}
+++	vmovdqu64	24($ctx),${r0s2s1}{%k7}{z}
+++
+++	vmovdqa64	96(%r10),$reduc_rght	# .L2_44_shift_rgt
+++	vmovdqa64	128(%r10),$reduc_left	# .L2_44_shift_lft
+++
+++	jmp		.Loop_vpmadd52
+++
+++.align	32
+++.Loop_vpmadd52:
+++	vmovdqu32	0($inp),%x#$T0		# load input as ----3210
+++	lea		16($inp),$inp
+++
+++	vpermd		$T0,$inp_permd,$T0	# ----3210 -> --322110
+++	vpsrlvq		$inp_shift,$T0,$T0
+++	vpandq		$reduc_mask,$T0,$T0
+++	vporq		$PAD,$T0,$T0
+++
+++	vpaddq		$T0,$Dlo,$Dlo		# accumulate input
+++
+++	vpermq		\$0,$Dlo,${H0}{%k7}{z}	# smash hash value
+++	vpermq		\$0b01010101,$Dlo,${H1}{%k7}{z}
+++	vpermq		\$0b10101010,$Dlo,${H2}{%k7}{z}
+++
+++	vpxord		$Dlo,$Dlo,$Dlo
+++	vpxord		$Dhi,$Dhi,$Dhi
+++
+++	vpmadd52luq	$r2r1r0,$H0,$Dlo
+++	vpmadd52huq	$r2r1r0,$H0,$Dhi
+++
+++	vpmadd52luq	$r1r0s2,$H1,$Dlo
+++	vpmadd52huq	$r1r0s2,$H1,$Dhi
+++
+++	vpmadd52luq	$r0s2s1,$H2,$Dlo
+++	vpmadd52huq	$r0s2s1,$H2,$Dhi
+++
+++	vpsrlvq		$reduc_rght,$Dlo,$T0	# 0 in topmost qword
+++	vpsllvq		$reduc_left,$Dhi,$Dhi	# 0 in topmost qword
+++	vpandq		$reduc_mask,$Dlo,$Dlo
+++
+++	vpaddq		$T0,$Dhi,$Dhi
+++
+++	vpermq		\$0b10010011,$Dhi,$Dhi	# 0 in lowest qword
+++
+++	vpaddq		$Dhi,$Dlo,$Dlo		# note topmost qword :-)
+++
+++	vpsrlvq		$reduc_rght,$Dlo,$T0	# 0 in topmost word
+++	vpandq		$reduc_mask,$Dlo,$Dlo
+++
+++	vpermq		\$0b10010011,$T0,$T0
+++
+++	vpaddq		$T0,$Dlo,$Dlo
+++
+++	vpermq		\$0b10010011,$Dlo,${T0}{%k1}{z}
+++
+++	vpaddq		$T0,$Dlo,$Dlo
+++	vpsllq		\$2,$T0,$T0
+++
+++	vpaddq		$T0,$Dlo,$Dlo
+++
+++	dec		%rax			# len-=16
+++	jnz		.Loop_vpmadd52
+++
+++	vmovdqu64	$Dlo,0($ctx){%k7}	# store hash value
+++
+++	test		$len,$len
+++	jnz		.Lblocks_vpmadd52_4x
+++
+++.Lno_data_vpmadd52:
+++	ret
+++.size	poly1305_blocks_vpmadd52,.-poly1305_blocks_vpmadd52
+++___
+++}
+++{
+++########################################################################
+++# As implied by its name 4x subroutine processes 4 blocks in parallel
+++# (but handles even 4*n+2 blocks lengths). It takes up to 4th key power
+++# and is handled in 256-bit %ymm registers.
+++
+++my ($H0,$H1,$H2,$R0,$R1,$R2,$S1,$S2) = map("%ymm$_",(0..5,16,17));
+++my ($D0lo,$D0hi,$D1lo,$D1hi,$D2lo,$D2hi) = map("%ymm$_",(18..23));
+++my ($T0,$T1,$T2,$T3,$mask44,$mask42,$tmp,$PAD) = map("%ymm$_",(24..31));
+++
+++$code.=<<___;
+++.type	poly1305_blocks_vpmadd52_4x,\@function,4
+++.align	32
+++poly1305_blocks_vpmadd52_4x:
+++	shr	\$4,$len
+++	jz	.Lno_data_vpmadd52_4x		# too short
+++
+++	shl	\$40,$padbit
+++	mov	64($ctx),%r8			# peek on power of the key
+++
+++.Lblocks_vpmadd52_4x:
+++	vpbroadcastq	$padbit,$PAD
+++
+++	vmovdqa64	.Lx_mask44(%rip),$mask44
+++	mov		\$5,%eax
+++	vmovdqa64	.Lx_mask42(%rip),$mask42
+++	kmovw		%eax,%k1		# used in 2x path
+++
+++	test		%r8,%r8			# is power value impossible?
+++	js		.Linit_vpmadd52		# if it is, then init R[4]
+++
+++	vmovq		0($ctx),%x#$H0		# load current hash value
+++	vmovq		8($ctx),%x#$H1
+++	vmovq		16($ctx),%x#$H2
+++
+++	test		\$3,$len		# is length 4*n+2?
+++	jnz		.Lblocks_vpmadd52_2x_do
+++
+++.Lblocks_vpmadd52_4x_do:
+++	vpbroadcastq	64($ctx),$R0		# load 4th power of the key
+++	vpbroadcastq	96($ctx),$R1
+++	vpbroadcastq	128($ctx),$R2
+++	vpbroadcastq	160($ctx),$S1
+++
+++.Lblocks_vpmadd52_4x_key_loaded:
+++	vpsllq		\$2,$R2,$S2		# S2 = R2*5*4
+++	vpaddq		$R2,$S2,$S2
+++	vpsllq		\$2,$S2,$S2
+++
+++	test		\$7,$len		# is len 8*n?
+++	jz		.Lblocks_vpmadd52_8x
+++
+++	vmovdqu64	16*0($inp),$T2		# load data
+++	vmovdqu64	16*2($inp),$T3
+++	lea		16*4($inp),$inp
+++
+++	vpunpcklqdq	$T3,$T2,$T1		# transpose data
+++	vpunpckhqdq	$T3,$T2,$T3
+++
+++	# at this point 64-bit lanes are ordered as 3-1-2-0
+++
+++	vpsrlq		\$24,$T3,$T2		# splat the data
+++	vporq		$PAD,$T2,$T2
+++	 vpaddq		$T2,$H2,$H2		# accumulate input
+++	vpandq		$mask44,$T1,$T0
+++	vpsrlq		\$44,$T1,$T1
+++	vpsllq		\$20,$T3,$T3
+++	vporq		$T3,$T1,$T1
+++	vpandq		$mask44,$T1,$T1
+++
+++	sub		\$4,$len
+++	jz		.Ltail_vpmadd52_4x
+++	jmp		.Loop_vpmadd52_4x
+++	ud2
+++
+++.align	32
+++.Linit_vpmadd52:
+++	vmovq		24($ctx),%x#$S1		# load key
+++	vmovq		56($ctx),%x#$H2
+++	vmovq		32($ctx),%x#$S2
+++	vmovq		40($ctx),%x#$R0
+++	vmovq		48($ctx),%x#$R1
+++
+++	vmovdqa		$R0,$H0
+++	vmovdqa		$R1,$H1
+++	vmovdqa		$H2,$R2
+++
+++	mov		\$2,%eax
+++
+++.Lmul_init_vpmadd52:
+++	vpxorq		$D0lo,$D0lo,$D0lo
+++	vpmadd52luq	$H2,$S1,$D0lo
+++	vpxorq		$D0hi,$D0hi,$D0hi
+++	vpmadd52huq	$H2,$S1,$D0hi
+++	vpxorq		$D1lo,$D1lo,$D1lo
+++	vpmadd52luq	$H2,$S2,$D1lo
+++	vpxorq		$D1hi,$D1hi,$D1hi
+++	vpmadd52huq	$H2,$S2,$D1hi
+++	vpxorq		$D2lo,$D2lo,$D2lo
+++	vpmadd52luq	$H2,$R0,$D2lo
+++	vpxorq		$D2hi,$D2hi,$D2hi
+++	vpmadd52huq	$H2,$R0,$D2hi
+++
+++	vpmadd52luq	$H0,$R0,$D0lo
+++	vpmadd52huq	$H0,$R0,$D0hi
+++	vpmadd52luq	$H0,$R1,$D1lo
+++	vpmadd52huq	$H0,$R1,$D1hi
+++	vpmadd52luq	$H0,$R2,$D2lo
+++	vpmadd52huq	$H0,$R2,$D2hi
+++
+++	vpmadd52luq	$H1,$S2,$D0lo
+++	vpmadd52huq	$H1,$S2,$D0hi
+++	vpmadd52luq	$H1,$R0,$D1lo
+++	vpmadd52huq	$H1,$R0,$D1hi
+++	vpmadd52luq	$H1,$R1,$D2lo
+++	vpmadd52huq	$H1,$R1,$D2hi
+++
+++	################################################################
+++	# partial reduction
+++	vpsrlq		\$44,$D0lo,$tmp
+++	vpsllq		\$8,$D0hi,$D0hi
+++	vpandq		$mask44,$D0lo,$H0
+++	vpaddq		$tmp,$D0hi,$D0hi
+++
+++	vpaddq		$D0hi,$D1lo,$D1lo
+++
+++	vpsrlq		\$44,$D1lo,$tmp
+++	vpsllq		\$8,$D1hi,$D1hi
+++	vpandq		$mask44,$D1lo,$H1
+++	vpaddq		$tmp,$D1hi,$D1hi
+++
+++	vpaddq		$D1hi,$D2lo,$D2lo
+++
+++	vpsrlq		\$42,$D2lo,$tmp
+++	vpsllq		\$10,$D2hi,$D2hi
+++	vpandq		$mask42,$D2lo,$H2
+++	vpaddq		$tmp,$D2hi,$D2hi
+++
+++	vpaddq		$D2hi,$H0,$H0
+++	vpsllq		\$2,$D2hi,$D2hi
+++
+++	vpaddq		$D2hi,$H0,$H0
+++
+++	vpsrlq		\$44,$H0,$tmp		# additional step
+++	vpandq		$mask44,$H0,$H0
+++
+++	vpaddq		$tmp,$H1,$H1
+++
+++	dec		%eax
+++	jz		.Ldone_init_vpmadd52
+++
+++	vpunpcklqdq	$R1,$H1,$R1		# 1,2
+++	vpbroadcastq	%x#$H1,%x#$H1		# 2,2
+++	vpunpcklqdq	$R2,$H2,$R2
+++	vpbroadcastq	%x#$H2,%x#$H2
+++	vpunpcklqdq	$R0,$H0,$R0
+++	vpbroadcastq	%x#$H0,%x#$H0
+++
+++	vpsllq		\$2,$R1,$S1		# S1 = R1*5*4
+++	vpsllq		\$2,$R2,$S2		# S2 = R2*5*4
+++	vpaddq		$R1,$S1,$S1
+++	vpaddq		$R2,$S2,$S2
+++	vpsllq		\$2,$S1,$S1
+++	vpsllq		\$2,$S2,$S2
+++
+++	jmp		.Lmul_init_vpmadd52
+++	ud2
+++
+++.align	32
+++.Ldone_init_vpmadd52:
+++	vinserti128	\$1,%x#$R1,$H1,$R1	# 1,2,3,4
+++	vinserti128	\$1,%x#$R2,$H2,$R2
+++	vinserti128	\$1,%x#$R0,$H0,$R0
+++
+++	vpermq		\$0b11011000,$R1,$R1	# 1,3,2,4
+++	vpermq		\$0b11011000,$R2,$R2
+++	vpermq		\$0b11011000,$R0,$R0
+++
+++	vpsllq		\$2,$R1,$S1		# S1 = R1*5*4
+++	vpaddq		$R1,$S1,$S1
+++	vpsllq		\$2,$S1,$S1
+++
+++	vmovq		0($ctx),%x#$H0		# load current hash value
+++	vmovq		8($ctx),%x#$H1
+++	vmovq		16($ctx),%x#$H2
+++
+++	test		\$3,$len		# is length 4*n+2?
+++	jnz		.Ldone_init_vpmadd52_2x
+++
+++	vmovdqu64	$R0,64($ctx)		# save key powers
+++	vpbroadcastq	%x#$R0,$R0		# broadcast 4th power
+++	vmovdqu64	$R1,96($ctx)
+++	vpbroadcastq	%x#$R1,$R1
+++	vmovdqu64	$R2,128($ctx)
+++	vpbroadcastq	%x#$R2,$R2
+++	vmovdqu64	$S1,160($ctx)
+++	vpbroadcastq	%x#$S1,$S1
+++
+++	jmp		.Lblocks_vpmadd52_4x_key_loaded
+++	ud2
+++
+++.align	32
+++.Ldone_init_vpmadd52_2x:
+++	vmovdqu64	$R0,64($ctx)		# save key powers
+++	vpsrldq		\$8,$R0,$R0		# 0-1-0-2
+++	vmovdqu64	$R1,96($ctx)
+++	vpsrldq		\$8,$R1,$R1
+++	vmovdqu64	$R2,128($ctx)
+++	vpsrldq		\$8,$R2,$R2
+++	vmovdqu64	$S1,160($ctx)
+++	vpsrldq		\$8,$S1,$S1
+++	jmp		.Lblocks_vpmadd52_2x_key_loaded
+++	ud2
+++
+++.align	32
+++.Lblocks_vpmadd52_2x_do:
+++	vmovdqu64	128+8($ctx),${R2}{%k1}{z}# load 2nd and 1st key powers
+++	vmovdqu64	160+8($ctx),${S1}{%k1}{z}
+++	vmovdqu64	64+8($ctx),${R0}{%k1}{z}
+++	vmovdqu64	96+8($ctx),${R1}{%k1}{z}
+++
+++.Lblocks_vpmadd52_2x_key_loaded:
+++	vmovdqu64	16*0($inp),$T2		# load data
+++	vpxorq		$T3,$T3,$T3
+++	lea		16*2($inp),$inp
+++
+++	vpunpcklqdq	$T3,$T2,$T1		# transpose data
+++	vpunpckhqdq	$T3,$T2,$T3
+++
+++	# at this point 64-bit lanes are ordered as x-1-x-0
+++
+++	vpsrlq		\$24,$T3,$T2		# splat the data
+++	vporq		$PAD,$T2,$T2
+++	 vpaddq		$T2,$H2,$H2		# accumulate input
+++	vpandq		$mask44,$T1,$T0
+++	vpsrlq		\$44,$T1,$T1
+++	vpsllq		\$20,$T3,$T3
+++	vporq		$T3,$T1,$T1
+++	vpandq		$mask44,$T1,$T1
+++
+++	jmp		.Ltail_vpmadd52_2x
+++	ud2
+++
+++.align	32
+++.Loop_vpmadd52_4x:
+++	#vpaddq		$T2,$H2,$H2		# accumulate input
+++	vpaddq		$T0,$H0,$H0
+++	vpaddq		$T1,$H1,$H1
+++
+++	vpxorq		$D0lo,$D0lo,$D0lo
+++	vpmadd52luq	$H2,$S1,$D0lo
+++	vpxorq		$D0hi,$D0hi,$D0hi
+++	vpmadd52huq	$H2,$S1,$D0hi
+++	vpxorq		$D1lo,$D1lo,$D1lo
+++	vpmadd52luq	$H2,$S2,$D1lo
+++	vpxorq		$D1hi,$D1hi,$D1hi
+++	vpmadd52huq	$H2,$S2,$D1hi
+++	vpxorq		$D2lo,$D2lo,$D2lo
+++	vpmadd52luq	$H2,$R0,$D2lo
+++	vpxorq		$D2hi,$D2hi,$D2hi
+++	vpmadd52huq	$H2,$R0,$D2hi
+++
+++	 vmovdqu64	16*0($inp),$T2		# load data
+++	 vmovdqu64	16*2($inp),$T3
+++	 lea		16*4($inp),$inp
+++	vpmadd52luq	$H0,$R0,$D0lo
+++	vpmadd52huq	$H0,$R0,$D0hi
+++	vpmadd52luq	$H0,$R1,$D1lo
+++	vpmadd52huq	$H0,$R1,$D1hi
+++	vpmadd52luq	$H0,$R2,$D2lo
+++	vpmadd52huq	$H0,$R2,$D2hi
+++
+++	 vpunpcklqdq	$T3,$T2,$T1		# transpose data
+++	 vpunpckhqdq	$T3,$T2,$T3
+++	vpmadd52luq	$H1,$S2,$D0lo
+++	vpmadd52huq	$H1,$S2,$D0hi
+++	vpmadd52luq	$H1,$R0,$D1lo
+++	vpmadd52huq	$H1,$R0,$D1hi
+++	vpmadd52luq	$H1,$R1,$D2lo
+++	vpmadd52huq	$H1,$R1,$D2hi
+++
+++	################################################################
+++	# partial reduction (interleaved with data splat)
+++	vpsrlq		\$44,$D0lo,$tmp
+++	vpsllq		\$8,$D0hi,$D0hi
+++	vpandq		$mask44,$D0lo,$H0
+++	vpaddq		$tmp,$D0hi,$D0hi
+++
+++	 vpsrlq		\$24,$T3,$T2
+++	 vporq		$PAD,$T2,$T2
+++	vpaddq		$D0hi,$D1lo,$D1lo
+++
+++	vpsrlq		\$44,$D1lo,$tmp
+++	vpsllq		\$8,$D1hi,$D1hi
+++	vpandq		$mask44,$D1lo,$H1
+++	vpaddq		$tmp,$D1hi,$D1hi
+++
+++	 vpandq		$mask44,$T1,$T0
+++	 vpsrlq		\$44,$T1,$T1
+++	 vpsllq		\$20,$T3,$T3
+++	vpaddq		$D1hi,$D2lo,$D2lo
+++
+++	vpsrlq		\$42,$D2lo,$tmp
+++	vpsllq		\$10,$D2hi,$D2hi
+++	vpandq		$mask42,$D2lo,$H2
+++	vpaddq		$tmp,$D2hi,$D2hi
+++
+++	  vpaddq	$T2,$H2,$H2		# accumulate input
+++	vpaddq		$D2hi,$H0,$H0
+++	vpsllq		\$2,$D2hi,$D2hi
+++
+++	vpaddq		$D2hi,$H0,$H0
+++	 vporq		$T3,$T1,$T1
+++	 vpandq		$mask44,$T1,$T1
+++
+++	vpsrlq		\$44,$H0,$tmp		# additional step
+++	vpandq		$mask44,$H0,$H0
+++
+++	vpaddq		$tmp,$H1,$H1
+++
+++	sub		\$4,$len		# len-=64
+++	jnz		.Loop_vpmadd52_4x
+++
+++.Ltail_vpmadd52_4x:
+++	vmovdqu64	128($ctx),$R2		# load all key powers
+++	vmovdqu64	160($ctx),$S1
+++	vmovdqu64	64($ctx),$R0
+++	vmovdqu64	96($ctx),$R1
+++
+++.Ltail_vpmadd52_2x:
+++	vpsllq		\$2,$R2,$S2		# S2 = R2*5*4
+++	vpaddq		$R2,$S2,$S2
+++	vpsllq		\$2,$S2,$S2
+++
+++	#vpaddq		$T2,$H2,$H2		# accumulate input
+++	vpaddq		$T0,$H0,$H0
+++	vpaddq		$T1,$H1,$H1
+++
+++	vpxorq		$D0lo,$D0lo,$D0lo
+++	vpmadd52luq	$H2,$S1,$D0lo
+++	vpxorq		$D0hi,$D0hi,$D0hi
+++	vpmadd52huq	$H2,$S1,$D0hi
+++	vpxorq		$D1lo,$D1lo,$D1lo
+++	vpmadd52luq	$H2,$S2,$D1lo
+++	vpxorq		$D1hi,$D1hi,$D1hi
+++	vpmadd52huq	$H2,$S2,$D1hi
+++	vpxorq		$D2lo,$D2lo,$D2lo
+++	vpmadd52luq	$H2,$R0,$D2lo
+++	vpxorq		$D2hi,$D2hi,$D2hi
+++	vpmadd52huq	$H2,$R0,$D2hi
+++
+++	vpmadd52luq	$H0,$R0,$D0lo
+++	vpmadd52huq	$H0,$R0,$D0hi
+++	vpmadd52luq	$H0,$R1,$D1lo
+++	vpmadd52huq	$H0,$R1,$D1hi
+++	vpmadd52luq	$H0,$R2,$D2lo
+++	vpmadd52huq	$H0,$R2,$D2hi
+++
+++	vpmadd52luq	$H1,$S2,$D0lo
+++	vpmadd52huq	$H1,$S2,$D0hi
+++	vpmadd52luq	$H1,$R0,$D1lo
+++	vpmadd52huq	$H1,$R0,$D1hi
+++	vpmadd52luq	$H1,$R1,$D2lo
+++	vpmadd52huq	$H1,$R1,$D2hi
+++
+++	################################################################
+++	# horizontal addition
+++
+++	mov		\$1,%eax
+++	kmovw		%eax,%k1
+++	vpsrldq		\$8,$D0lo,$T0
+++	vpsrldq		\$8,$D0hi,$H0
+++	vpsrldq		\$8,$D1lo,$T1
+++	vpsrldq		\$8,$D1hi,$H1
+++	vpaddq		$T0,$D0lo,$D0lo
+++	vpaddq		$H0,$D0hi,$D0hi
+++	vpsrldq		\$8,$D2lo,$T2
+++	vpsrldq		\$8,$D2hi,$H2
+++	vpaddq		$T1,$D1lo,$D1lo
+++	vpaddq		$H1,$D1hi,$D1hi
+++	 vpermq		\$0x2,$D0lo,$T0
+++	 vpermq		\$0x2,$D0hi,$H0
+++	vpaddq		$T2,$D2lo,$D2lo
+++	vpaddq		$H2,$D2hi,$D2hi
+++
+++	vpermq		\$0x2,$D1lo,$T1
+++	vpermq		\$0x2,$D1hi,$H1
+++	vpaddq		$T0,$D0lo,${D0lo}{%k1}{z}
+++	vpaddq		$H0,$D0hi,${D0hi}{%k1}{z}
+++	vpermq		\$0x2,$D2lo,$T2
+++	vpermq		\$0x2,$D2hi,$H2
+++	vpaddq		$T1,$D1lo,${D1lo}{%k1}{z}
+++	vpaddq		$H1,$D1hi,${D1hi}{%k1}{z}
+++	vpaddq		$T2,$D2lo,${D2lo}{%k1}{z}
+++	vpaddq		$H2,$D2hi,${D2hi}{%k1}{z}
+++
+++	################################################################
+++	# partial reduction
+++	vpsrlq		\$44,$D0lo,$tmp
+++	vpsllq		\$8,$D0hi,$D0hi
+++	vpandq		$mask44,$D0lo,$H0
+++	vpaddq		$tmp,$D0hi,$D0hi
+++
+++	vpaddq		$D0hi,$D1lo,$D1lo
+++
+++	vpsrlq		\$44,$D1lo,$tmp
+++	vpsllq		\$8,$D1hi,$D1hi
+++	vpandq		$mask44,$D1lo,$H1
+++	vpaddq		$tmp,$D1hi,$D1hi
+++
+++	vpaddq		$D1hi,$D2lo,$D2lo
+++
+++	vpsrlq		\$42,$D2lo,$tmp
+++	vpsllq		\$10,$D2hi,$D2hi
+++	vpandq		$mask42,$D2lo,$H2
+++	vpaddq		$tmp,$D2hi,$D2hi
+++
+++	vpaddq		$D2hi,$H0,$H0
+++	vpsllq		\$2,$D2hi,$D2hi
+++
+++	vpaddq		$D2hi,$H0,$H0
+++
+++	vpsrlq		\$44,$H0,$tmp		# additional step
+++	vpandq		$mask44,$H0,$H0
+++
+++	vpaddq		$tmp,$H1,$H1
+++						# at this point $len is
+++						# either 4*n+2 or 0...
+++	sub		\$2,$len		# len-=32
+++	ja		.Lblocks_vpmadd52_4x_do
+++
+++	vmovq		%x#$H0,0($ctx)
+++	vmovq		%x#$H1,8($ctx)
+++	vmovq		%x#$H2,16($ctx)
+++	vzeroall
+++
+++.Lno_data_vpmadd52_4x:
+++	ret
+++.size	poly1305_blocks_vpmadd52_4x,.-poly1305_blocks_vpmadd52_4x
+++___
+++}
+++{
+++########################################################################
+++# As implied by its name 8x subroutine processes 8 blocks in parallel...
+++# This is intermediate version, as it's used only in cases when input
+++# length is either 8*n, 8*n+1 or 8*n+2...
+++
+++my ($H0,$H1,$H2,$R0,$R1,$R2,$S1,$S2) = map("%ymm$_",(0..5,16,17));
+++my ($D0lo,$D0hi,$D1lo,$D1hi,$D2lo,$D2hi) = map("%ymm$_",(18..23));
+++my ($T0,$T1,$T2,$T3,$mask44,$mask42,$tmp,$PAD) = map("%ymm$_",(24..31));
+++my ($RR0,$RR1,$RR2,$SS1,$SS2) = map("%ymm$_",(6..10));
+++
+++$code.=<<___;
+++.type	poly1305_blocks_vpmadd52_8x,\@function,4
+++.align	32
+++poly1305_blocks_vpmadd52_8x:
+++	shr	\$4,$len
+++	jz	.Lno_data_vpmadd52_8x		# too short
+++
+++	shl	\$40,$padbit
+++	mov	64($ctx),%r8			# peek on power of the key
+++
+++	vmovdqa64	.Lx_mask44(%rip),$mask44
+++	vmovdqa64	.Lx_mask42(%rip),$mask42
+++
+++	test	%r8,%r8				# is power value impossible?
+++	js	.Linit_vpmadd52			# if it is, then init R[4]
+++
+++	vmovq	0($ctx),%x#$H0			# load current hash value
+++	vmovq	8($ctx),%x#$H1
+++	vmovq	16($ctx),%x#$H2
+++
+++.Lblocks_vpmadd52_8x:
+++	################################################################
+++	# fist we calculate more key powers
+++
+++	vmovdqu64	128($ctx),$R2		# load 1-3-2-4 powers
+++	vmovdqu64	160($ctx),$S1
+++	vmovdqu64	64($ctx),$R0
+++	vmovdqu64	96($ctx),$R1
+++
+++	vpsllq		\$2,$R2,$S2		# S2 = R2*5*4
+++	vpaddq		$R2,$S2,$S2
+++	vpsllq		\$2,$S2,$S2
+++
+++	vpbroadcastq	%x#$R2,$RR2		# broadcast 4th power
+++	vpbroadcastq	%x#$R0,$RR0
+++	vpbroadcastq	%x#$R1,$RR1
+++
+++	vpxorq		$D0lo,$D0lo,$D0lo
+++	vpmadd52luq	$RR2,$S1,$D0lo
+++	vpxorq		$D0hi,$D0hi,$D0hi
+++	vpmadd52huq	$RR2,$S1,$D0hi
+++	vpxorq		$D1lo,$D1lo,$D1lo
+++	vpmadd52luq	$RR2,$S2,$D1lo
+++	vpxorq		$D1hi,$D1hi,$D1hi
+++	vpmadd52huq	$RR2,$S2,$D1hi
+++	vpxorq		$D2lo,$D2lo,$D2lo
+++	vpmadd52luq	$RR2,$R0,$D2lo
+++	vpxorq		$D2hi,$D2hi,$D2hi
+++	vpmadd52huq	$RR2,$R0,$D2hi
+++
+++	vpmadd52luq	$RR0,$R0,$D0lo
+++	vpmadd52huq	$RR0,$R0,$D0hi
+++	vpmadd52luq	$RR0,$R1,$D1lo
+++	vpmadd52huq	$RR0,$R1,$D1hi
+++	vpmadd52luq	$RR0,$R2,$D2lo
+++	vpmadd52huq	$RR0,$R2,$D2hi
+++
+++	vpmadd52luq	$RR1,$S2,$D0lo
+++	vpmadd52huq	$RR1,$S2,$D0hi
+++	vpmadd52luq	$RR1,$R0,$D1lo
+++	vpmadd52huq	$RR1,$R0,$D1hi
+++	vpmadd52luq	$RR1,$R1,$D2lo
+++	vpmadd52huq	$RR1,$R1,$D2hi
+++
+++	################################################################
+++	# partial reduction
+++	vpsrlq		\$44,$D0lo,$tmp
+++	vpsllq		\$8,$D0hi,$D0hi
+++	vpandq		$mask44,$D0lo,$RR0
+++	vpaddq		$tmp,$D0hi,$D0hi
+++
+++	vpaddq		$D0hi,$D1lo,$D1lo
+++
+++	vpsrlq		\$44,$D1lo,$tmp
+++	vpsllq		\$8,$D1hi,$D1hi
+++	vpandq		$mask44,$D1lo,$RR1
+++	vpaddq		$tmp,$D1hi,$D1hi
+++
+++	vpaddq		$D1hi,$D2lo,$D2lo
+++
+++	vpsrlq		\$42,$D2lo,$tmp
+++	vpsllq		\$10,$D2hi,$D2hi
+++	vpandq		$mask42,$D2lo,$RR2
+++	vpaddq		$tmp,$D2hi,$D2hi
+++
+++	vpaddq		$D2hi,$RR0,$RR0
+++	vpsllq		\$2,$D2hi,$D2hi
+++
+++	vpaddq		$D2hi,$RR0,$RR0
+++
+++	vpsrlq		\$44,$RR0,$tmp		# additional step
+++	vpandq		$mask44,$RR0,$RR0
+++
+++	vpaddq		$tmp,$RR1,$RR1
+++
+++	################################################################
+++	# At this point Rx holds 1324 powers, RRx - 5768, and the goal
+++	# is 15263748, which reflects how data is loaded...
+++
+++	vpunpcklqdq	$R2,$RR2,$T2		# 3748
+++	vpunpckhqdq	$R2,$RR2,$R2		# 1526
+++	vpunpcklqdq	$R0,$RR0,$T0
+++	vpunpckhqdq	$R0,$RR0,$R0
+++	vpunpcklqdq	$R1,$RR1,$T1
+++	vpunpckhqdq	$R1,$RR1,$R1
+++___
+++######## switch to %zmm
+++map(s/%y/%z/, $H0,$H1,$H2,$R0,$R1,$R2,$S1,$S2);
+++map(s/%y/%z/, $D0lo,$D0hi,$D1lo,$D1hi,$D2lo,$D2hi);
+++map(s/%y/%z/, $T0,$T1,$T2,$T3,$mask44,$mask42,$tmp,$PAD);
+++map(s/%y/%z/, $RR0,$RR1,$RR2,$SS1,$SS2);
+++
+++$code.=<<___;
+++	vshufi64x2	\$0x44,$R2,$T2,$RR2	# 15263748
+++	vshufi64x2	\$0x44,$R0,$T0,$RR0
+++	vshufi64x2	\$0x44,$R1,$T1,$RR1
+++
+++	vmovdqu64	16*0($inp),$T2		# load data
+++	vmovdqu64	16*4($inp),$T3
+++	lea		16*8($inp),$inp
+++
+++	vpsllq		\$2,$RR2,$SS2		# S2 = R2*5*4
+++	vpsllq		\$2,$RR1,$SS1		# S1 = R1*5*4
+++	vpaddq		$RR2,$SS2,$SS2
+++	vpaddq		$RR1,$SS1,$SS1
+++	vpsllq		\$2,$SS2,$SS2
+++	vpsllq		\$2,$SS1,$SS1
+++
+++	vpbroadcastq	$padbit,$PAD
+++	vpbroadcastq	%x#$mask44,$mask44
+++	vpbroadcastq	%x#$mask42,$mask42
+++
+++	vpbroadcastq	%x#$SS1,$S1		# broadcast 8th power
+++	vpbroadcastq	%x#$SS2,$S2
+++	vpbroadcastq	%x#$RR0,$R0
+++	vpbroadcastq	%x#$RR1,$R1
+++	vpbroadcastq	%x#$RR2,$R2
+++
+++	vpunpcklqdq	$T3,$T2,$T1		# transpose data
+++	vpunpckhqdq	$T3,$T2,$T3
+++
+++	# at this point 64-bit lanes are ordered as 73625140
+++
+++	vpsrlq		\$24,$T3,$T2		# splat the data
+++	vporq		$PAD,$T2,$T2
+++	 vpaddq		$T2,$H2,$H2		# accumulate input
+++	vpandq		$mask44,$T1,$T0
+++	vpsrlq		\$44,$T1,$T1
+++	vpsllq		\$20,$T3,$T3
+++	vporq		$T3,$T1,$T1
+++	vpandq		$mask44,$T1,$T1
+++
+++	sub		\$8,$len
+++	jz		.Ltail_vpmadd52_8x
+++	jmp		.Loop_vpmadd52_8x
+++
+++.align	32
+++.Loop_vpmadd52_8x:
+++	#vpaddq		$T2,$H2,$H2		# accumulate input
+++	vpaddq		$T0,$H0,$H0
+++	vpaddq		$T1,$H1,$H1
+++
+++	vpxorq		$D0lo,$D0lo,$D0lo
+++	vpmadd52luq	$H2,$S1,$D0lo
+++	vpxorq		$D0hi,$D0hi,$D0hi
+++	vpmadd52huq	$H2,$S1,$D0hi
+++	vpxorq		$D1lo,$D1lo,$D1lo
+++	vpmadd52luq	$H2,$S2,$D1lo
+++	vpxorq		$D1hi,$D1hi,$D1hi
+++	vpmadd52huq	$H2,$S2,$D1hi
+++	vpxorq		$D2lo,$D2lo,$D2lo
+++	vpmadd52luq	$H2,$R0,$D2lo
+++	vpxorq		$D2hi,$D2hi,$D2hi
+++	vpmadd52huq	$H2,$R0,$D2hi
+++
+++	 vmovdqu64	16*0($inp),$T2		# load data
+++	 vmovdqu64	16*4($inp),$T3
+++	 lea		16*8($inp),$inp
+++	vpmadd52luq	$H0,$R0,$D0lo
+++	vpmadd52huq	$H0,$R0,$D0hi
+++	vpmadd52luq	$H0,$R1,$D1lo
+++	vpmadd52huq	$H0,$R1,$D1hi
+++	vpmadd52luq	$H0,$R2,$D2lo
+++	vpmadd52huq	$H0,$R2,$D2hi
+++
+++	 vpunpcklqdq	$T3,$T2,$T1		# transpose data
+++	 vpunpckhqdq	$T3,$T2,$T3
+++	vpmadd52luq	$H1,$S2,$D0lo
+++	vpmadd52huq	$H1,$S2,$D0hi
+++	vpmadd52luq	$H1,$R0,$D1lo
+++	vpmadd52huq	$H1,$R0,$D1hi
+++	vpmadd52luq	$H1,$R1,$D2lo
+++	vpmadd52huq	$H1,$R1,$D2hi
+++
+++	################################################################
+++	# partial reduction (interleaved with data splat)
+++	vpsrlq		\$44,$D0lo,$tmp
+++	vpsllq		\$8,$D0hi,$D0hi
+++	vpandq		$mask44,$D0lo,$H0
+++	vpaddq		$tmp,$D0hi,$D0hi
+++
+++	 vpsrlq		\$24,$T3,$T2
+++	 vporq		$PAD,$T2,$T2
+++	vpaddq		$D0hi,$D1lo,$D1lo
+++
+++	vpsrlq		\$44,$D1lo,$tmp
+++	vpsllq		\$8,$D1hi,$D1hi
+++	vpandq		$mask44,$D1lo,$H1
+++	vpaddq		$tmp,$D1hi,$D1hi
+++
+++	 vpandq		$mask44,$T1,$T0
+++	 vpsrlq		\$44,$T1,$T1
+++	 vpsllq		\$20,$T3,$T3
+++	vpaddq		$D1hi,$D2lo,$D2lo
+++
+++	vpsrlq		\$42,$D2lo,$tmp
+++	vpsllq		\$10,$D2hi,$D2hi
+++	vpandq		$mask42,$D2lo,$H2
+++	vpaddq		$tmp,$D2hi,$D2hi
+++
+++	  vpaddq	$T2,$H2,$H2		# accumulate input
+++	vpaddq		$D2hi,$H0,$H0
+++	vpsllq		\$2,$D2hi,$D2hi
+++
+++	vpaddq		$D2hi,$H0,$H0
+++	 vporq		$T3,$T1,$T1
+++	 vpandq		$mask44,$T1,$T1
+++
+++	vpsrlq		\$44,$H0,$tmp		# additional step
+++	vpandq		$mask44,$H0,$H0
+++
+++	vpaddq		$tmp,$H1,$H1
+++
+++	sub		\$8,$len		# len-=128
+++	jnz		.Loop_vpmadd52_8x
+++
+++.Ltail_vpmadd52_8x:
+++	#vpaddq		$T2,$H2,$H2		# accumulate input
+++	vpaddq		$T0,$H0,$H0
+++	vpaddq		$T1,$H1,$H1
+++
+++	vpxorq		$D0lo,$D0lo,$D0lo
+++	vpmadd52luq	$H2,$SS1,$D0lo
+++	vpxorq		$D0hi,$D0hi,$D0hi
+++	vpmadd52huq	$H2,$SS1,$D0hi
+++	vpxorq		$D1lo,$D1lo,$D1lo
+++	vpmadd52luq	$H2,$SS2,$D1lo
+++	vpxorq		$D1hi,$D1hi,$D1hi
+++	vpmadd52huq	$H2,$SS2,$D1hi
+++	vpxorq		$D2lo,$D2lo,$D2lo
+++	vpmadd52luq	$H2,$RR0,$D2lo
+++	vpxorq		$D2hi,$D2hi,$D2hi
+++	vpmadd52huq	$H2,$RR0,$D2hi
+++
+++	vpmadd52luq	$H0,$RR0,$D0lo
+++	vpmadd52huq	$H0,$RR0,$D0hi
+++	vpmadd52luq	$H0,$RR1,$D1lo
+++	vpmadd52huq	$H0,$RR1,$D1hi
+++	vpmadd52luq	$H0,$RR2,$D2lo
+++	vpmadd52huq	$H0,$RR2,$D2hi
+++
+++	vpmadd52luq	$H1,$SS2,$D0lo
+++	vpmadd52huq	$H1,$SS2,$D0hi
+++	vpmadd52luq	$H1,$RR0,$D1lo
+++	vpmadd52huq	$H1,$RR0,$D1hi
+++	vpmadd52luq	$H1,$RR1,$D2lo
+++	vpmadd52huq	$H1,$RR1,$D2hi
+++
+++	################################################################
+++	# horizontal addition
+++
+++	mov		\$1,%eax
+++	kmovw		%eax,%k1
+++	vpsrldq		\$8,$D0lo,$T0
+++	vpsrldq		\$8,$D0hi,$H0
+++	vpsrldq		\$8,$D1lo,$T1
+++	vpsrldq		\$8,$D1hi,$H1
+++	vpaddq		$T0,$D0lo,$D0lo
+++	vpaddq		$H0,$D0hi,$D0hi
+++	vpsrldq		\$8,$D2lo,$T2
+++	vpsrldq		\$8,$D2hi,$H2
+++	vpaddq		$T1,$D1lo,$D1lo
+++	vpaddq		$H1,$D1hi,$D1hi
+++	 vpermq		\$0x2,$D0lo,$T0
+++	 vpermq		\$0x2,$D0hi,$H0
+++	vpaddq		$T2,$D2lo,$D2lo
+++	vpaddq		$H2,$D2hi,$D2hi
+++
+++	vpermq		\$0x2,$D1lo,$T1
+++	vpermq		\$0x2,$D1hi,$H1
+++	vpaddq		$T0,$D0lo,$D0lo
+++	vpaddq		$H0,$D0hi,$D0hi
+++	vpermq		\$0x2,$D2lo,$T2
+++	vpermq		\$0x2,$D2hi,$H2
+++	vpaddq		$T1,$D1lo,$D1lo
+++	vpaddq		$H1,$D1hi,$D1hi
+++	 vextracti64x4	\$1,$D0lo,%y#$T0
+++	 vextracti64x4	\$1,$D0hi,%y#$H0
+++	vpaddq		$T2,$D2lo,$D2lo
+++	vpaddq		$H2,$D2hi,$D2hi
+++
+++	vextracti64x4	\$1,$D1lo,%y#$T1
+++	vextracti64x4	\$1,$D1hi,%y#$H1
+++	vextracti64x4	\$1,$D2lo,%y#$T2
+++	vextracti64x4	\$1,$D2hi,%y#$H2
+++___
+++######## switch back to %ymm
+++map(s/%z/%y/, $H0,$H1,$H2,$R0,$R1,$R2,$S1,$S2);
+++map(s/%z/%y/, $D0lo,$D0hi,$D1lo,$D1hi,$D2lo,$D2hi);
+++map(s/%z/%y/, $T0,$T1,$T2,$T3,$mask44,$mask42,$tmp,$PAD);
+++
+++$code.=<<___;
+++	vpaddq		$T0,$D0lo,${D0lo}{%k1}{z}
+++	vpaddq		$H0,$D0hi,${D0hi}{%k1}{z}
+++	vpaddq		$T1,$D1lo,${D1lo}{%k1}{z}
+++	vpaddq		$H1,$D1hi,${D1hi}{%k1}{z}
+++	vpaddq		$T2,$D2lo,${D2lo}{%k1}{z}
+++	vpaddq		$H2,$D2hi,${D2hi}{%k1}{z}
+++
+++	################################################################
+++	# partial reduction
+++	vpsrlq		\$44,$D0lo,$tmp
+++	vpsllq		\$8,$D0hi,$D0hi
+++	vpandq		$mask44,$D0lo,$H0
+++	vpaddq		$tmp,$D0hi,$D0hi
+++
+++	vpaddq		$D0hi,$D1lo,$D1lo
+++
+++	vpsrlq		\$44,$D1lo,$tmp
+++	vpsllq		\$8,$D1hi,$D1hi
+++	vpandq		$mask44,$D1lo,$H1
+++	vpaddq		$tmp,$D1hi,$D1hi
+++
+++	vpaddq		$D1hi,$D2lo,$D2lo
+++
+++	vpsrlq		\$42,$D2lo,$tmp
+++	vpsllq		\$10,$D2hi,$D2hi
+++	vpandq		$mask42,$D2lo,$H2
+++	vpaddq		$tmp,$D2hi,$D2hi
+++
+++	vpaddq		$D2hi,$H0,$H0
+++	vpsllq		\$2,$D2hi,$D2hi
+++
+++	vpaddq		$D2hi,$H0,$H0
+++
+++	vpsrlq		\$44,$H0,$tmp		# additional step
+++	vpandq		$mask44,$H0,$H0
+++
+++	vpaddq		$tmp,$H1,$H1
+++
+++	################################################################
+++
+++	vmovq		%x#$H0,0($ctx)
+++	vmovq		%x#$H1,8($ctx)
+++	vmovq		%x#$H2,16($ctx)
+++	vzeroall
+++
+++.Lno_data_vpmadd52_8x:
+++	ret
+++.size	poly1305_blocks_vpmadd52_8x,.-poly1305_blocks_vpmadd52_8x
+++___
+++}
+++$code.=<<___;
+++.type	poly1305_emit_base2_44,\@function,3
+++.align	32
+++poly1305_emit_base2_44:
+++	mov	0($ctx),%r8	# load hash value
+++	mov	8($ctx),%r9
+++	mov	16($ctx),%r10
+++
+++	mov	%r9,%rax
+++	shr	\$20,%r9
+++	shl	\$44,%rax
+++	mov	%r10,%rcx
+++	shr	\$40,%r10
+++	shl	\$24,%rcx
+++
+++	add	%rax,%r8
+++	adc	%rcx,%r9
+++	adc	\$0,%r10
+++
+++	mov	%r8,%rax
+++	add	\$5,%r8		# compare to modulus
+++	mov	%r9,%rcx
+++	adc	\$0,%r9
+++	adc	\$0,%r10
+++	shr	\$2,%r10	# did 130-bit value overflow?
+++	cmovnz	%r8,%rax
+++	cmovnz	%r9,%rcx
+++
+++	add	0($nonce),%rax	# accumulate nonce
+++	adc	8($nonce),%rcx
+++	mov	%rax,0($mac)	# write result
+++	mov	%rcx,8($mac)
+++
+++	ret
+++.size	poly1305_emit_base2_44,.-poly1305_emit_base2_44
+++___
+++}	}	}
+++$code.=<<___;
+++.align	64
+++.Lconst:
+++.Lmask24:
+++.long	0x0ffffff,0,0x0ffffff,0,0x0ffffff,0,0x0ffffff,0
+++.L129:
+++.long	`1<<24`,0,`1<<24`,0,`1<<24`,0,`1<<24`,0
+++.Lmask26:
+++.long	0x3ffffff,0,0x3ffffff,0,0x3ffffff,0,0x3ffffff,0
+++.Lpermd_avx2:
+++.long	2,2,2,3,2,0,2,1
+++.Lpermd_avx512:
+++.long	0,0,0,1, 0,2,0,3, 0,4,0,5, 0,6,0,7
+++
+++.L2_44_inp_permd:
+++.long	0,1,1,2,2,3,7,7
+++.L2_44_inp_shift:
+++.quad	0,12,24,64
+++.L2_44_mask:
+++.quad	0xfffffffffff,0xfffffffffff,0x3ffffffffff,0xffffffffffffffff
+++.L2_44_shift_rgt:
+++.quad	44,44,42,64
+++.L2_44_shift_lft:
+++.quad	8,8,10,64
+++
+++.align	64
+++.Lx_mask44:
+++.quad	0xfffffffffff,0xfffffffffff,0xfffffffffff,0xfffffffffff
+++.quad	0xfffffffffff,0xfffffffffff,0xfffffffffff,0xfffffffffff
+++.Lx_mask42:
+++.quad	0x3ffffffffff,0x3ffffffffff,0x3ffffffffff,0x3ffffffffff
+++.quad	0x3ffffffffff,0x3ffffffffff,0x3ffffffffff,0x3ffffffffff
+++___
+++}
+++$code.=<<___;
+++.asciz	"Poly1305 for x86_64, CRYPTOGAMS by <appro\@openssl.org>"
+++.align	16
+++___
+++
+++{	# chacha20-poly1305 helpers
+++my ($out,$inp,$otp,$len)=$win64 ? ("%rcx","%rdx","%r8", "%r9") :  # Win64 order
+++                                  ("%rdi","%rsi","%rdx","%rcx");  # Unix order
+++$code.=<<___;
+++.globl	xor128_encrypt_n_pad
+++.type	xor128_encrypt_n_pad,\@abi-omnipotent
+++.align	16
+++xor128_encrypt_n_pad:
+++	sub	$otp,$inp
+++	sub	$otp,$out
+++	mov	$len,%r10		# put len aside
+++	shr	\$4,$len		# len / 16
+++	jz	.Ltail_enc
+++	nop
+++.Loop_enc_xmm:
+++	movdqu	($inp,$otp),%xmm0
+++	pxor	($otp),%xmm0
+++	movdqu	%xmm0,($out,$otp)
+++	movdqa	%xmm0,($otp)
+++	lea	16($otp),$otp
+++	dec	$len
+++	jnz	.Loop_enc_xmm
+++
+++	and	\$15,%r10		# len % 16
+++	jz	.Ldone_enc
+++
+++.Ltail_enc:
+++	mov	\$16,$len
+++	sub	%r10,$len
+++	xor	%eax,%eax
+++.Loop_enc_byte:
+++	mov	($inp,$otp),%al
+++	xor	($otp),%al
+++	mov	%al,($out,$otp)
+++	mov	%al,($otp)
+++	lea	1($otp),$otp
+++	dec	%r10
+++	jnz	.Loop_enc_byte
+++
+++	xor	%eax,%eax
+++.Loop_enc_pad:
+++	mov	%al,($otp)
+++	lea	1($otp),$otp
+++	dec	$len
+++	jnz	.Loop_enc_pad
+++
+++.Ldone_enc:
+++	mov	$otp,%rax
+++	ret
+++.size	xor128_encrypt_n_pad,.-xor128_encrypt_n_pad
+++
+++.globl	xor128_decrypt_n_pad
+++.type	xor128_decrypt_n_pad,\@abi-omnipotent
+++.align	16
+++xor128_decrypt_n_pad:
+++	sub	$otp,$inp
+++	sub	$otp,$out
+++	mov	$len,%r10		# put len aside
+++	shr	\$4,$len		# len / 16
+++	jz	.Ltail_dec
+++	nop
+++.Loop_dec_xmm:
+++	movdqu	($inp,$otp),%xmm0
+++	movdqa	($otp),%xmm1
+++	pxor	%xmm0,%xmm1
+++	movdqu	%xmm1,($out,$otp)
+++	movdqa	%xmm0,($otp)
+++	lea	16($otp),$otp
+++	dec	$len
+++	jnz	.Loop_dec_xmm
+++
+++	pxor	%xmm1,%xmm1
+++	and	\$15,%r10		# len % 16
+++	jz	.Ldone_dec
+++
+++.Ltail_dec:
+++	mov	\$16,$len
+++	sub	%r10,$len
+++	xor	%eax,%eax
+++	xor	%r11,%r11
+++.Loop_dec_byte:
+++	mov	($inp,$otp),%r11b
+++	mov	($otp),%al
+++	xor	%r11b,%al
+++	mov	%al,($out,$otp)
+++	mov	%r11b,($otp)
+++	lea	1($otp),$otp
+++	dec	%r10
+++	jnz	.Loop_dec_byte
+++
+++	xor	%eax,%eax
+++.Loop_dec_pad:
+++	mov	%al,($otp)
+++	lea	1($otp),$otp
+++	dec	$len
+++	jnz	.Loop_dec_pad
+++
+++.Ldone_dec:
+++	mov	$otp,%rax
+++	ret
+++.size	xor128_decrypt_n_pad,.-xor128_decrypt_n_pad
+++___
+++}
+++
+++# EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame,
+++#		CONTEXT *context,DISPATCHER_CONTEXT *disp)
+++if ($win64) {
+++$rec="%rcx";
+++$frame="%rdx";
+++$context="%r8";
+++$disp="%r9";
+++
+++$code.=<<___;
+++.extern	__imp_RtlVirtualUnwind
+++.type	se_handler,\@abi-omnipotent
+++.align	16
+++se_handler:
+++	push	%rsi
+++	push	%rdi
+++	push	%rbx
+++	push	%rbp
+++	push	%r12
+++	push	%r13
+++	push	%r14
+++	push	%r15
+++	pushfq
+++	sub	\$64,%rsp
+++
+++	mov	120($context),%rax	# pull context->Rax
+++	mov	248($context),%rbx	# pull context->Rip
+++
+++	mov	8($disp),%rsi		# disp->ImageBase
+++	mov	56($disp),%r11		# disp->HandlerData
+++
+++	mov	0(%r11),%r10d		# HandlerData[0]
+++	lea	(%rsi,%r10),%r10	# prologue label
+++	cmp	%r10,%rbx		# context->Rip<.Lprologue
+++	jb	.Lcommon_seh_tail
+++
+++	mov	152($context),%rax	# pull context->Rsp
+++
+++	mov	4(%r11),%r10d		# HandlerData[1]
+++	lea	(%rsi,%r10),%r10	# epilogue label
+++	cmp	%r10,%rbx		# context->Rip>=.Lepilogue
+++	jae	.Lcommon_seh_tail
+++
+++	lea	48(%rax),%rax
+++
+++	mov	-8(%rax),%rbx
+++	mov	-16(%rax),%rbp
+++	mov	-24(%rax),%r12
+++	mov	-32(%rax),%r13
+++	mov	-40(%rax),%r14
+++	mov	-48(%rax),%r15
+++	mov	%rbx,144($context)	# restore context->Rbx
+++	mov	%rbp,160($context)	# restore context->Rbp
+++	mov	%r12,216($context)	# restore context->R12
+++	mov	%r13,224($context)	# restore context->R13
+++	mov	%r14,232($context)	# restore context->R14
+++	mov	%r15,240($context)	# restore context->R14
+++
+++	jmp	.Lcommon_seh_tail
+++.size	se_handler,.-se_handler
+++
+++.type	avx_handler,\@abi-omnipotent
+++.align	16
+++avx_handler:
+++	push	%rsi
+++	push	%rdi
+++	push	%rbx
+++	push	%rbp
+++	push	%r12
+++	push	%r13
+++	push	%r14
+++	push	%r15
+++	pushfq
+++	sub	\$64,%rsp
+++
+++	mov	120($context),%rax	# pull context->Rax
+++	mov	248($context),%rbx	# pull context->Rip
+++
+++	mov	8($disp),%rsi		# disp->ImageBase
+++	mov	56($disp),%r11		# disp->HandlerData
+++
+++	mov	0(%r11),%r10d		# HandlerData[0]
+++	lea	(%rsi,%r10),%r10	# prologue label
+++	cmp	%r10,%rbx		# context->Rip<prologue label
+++	jb	.Lcommon_seh_tail
+++
+++	mov	152($context),%rax	# pull context->Rsp
+++
+++	mov	4(%r11),%r10d		# HandlerData[1]
+++	lea	(%rsi,%r10),%r10	# epilogue label
+++	cmp	%r10,%rbx		# context->Rip>=epilogue label
+++	jae	.Lcommon_seh_tail
+++
+++	mov	208($context),%rax	# pull context->R11
+++
+++	lea	0x50(%rax),%rsi
+++	lea	0xf8(%rax),%rax
+++	lea	512($context),%rdi	# &context.Xmm6
+++	mov	\$20,%ecx
+++	.long	0xa548f3fc		# cld; rep movsq
+++
+++.Lcommon_seh_tail:
+++	mov	8(%rax),%rdi
+++	mov	16(%rax),%rsi
+++	mov	%rax,152($context)	# restore context->Rsp
+++	mov	%rsi,168($context)	# restore context->Rsi
+++	mov	%rdi,176($context)	# restore context->Rdi
+++
+++	mov	40($disp),%rdi		# disp->ContextRecord
+++	mov	$context,%rsi		# context
+++	mov	\$154,%ecx		# sizeof(CONTEXT)
+++	.long	0xa548f3fc		# cld; rep movsq
+++
+++	mov	$disp,%rsi
+++	xor	%rcx,%rcx		# arg1, UNW_FLAG_NHANDLER
+++	mov	8(%rsi),%rdx		# arg2, disp->ImageBase
+++	mov	0(%rsi),%r8		# arg3, disp->ControlPc
+++	mov	16(%rsi),%r9		# arg4, disp->FunctionEntry
+++	mov	40(%rsi),%r10		# disp->ContextRecord
+++	lea	56(%rsi),%r11		# &disp->HandlerData
+++	lea	24(%rsi),%r12		# &disp->EstablisherFrame
+++	mov	%r10,32(%rsp)		# arg5
+++	mov	%r11,40(%rsp)		# arg6
+++	mov	%r12,48(%rsp)		# arg7
+++	mov	%rcx,56(%rsp)		# arg8, (NULL)
+++	call	*__imp_RtlVirtualUnwind(%rip)
+++
+++	mov	\$1,%eax		# ExceptionContinueSearch
+++	add	\$64,%rsp
+++	popfq
+++	pop	%r15
+++	pop	%r14
+++	pop	%r13
+++	pop	%r12
+++	pop	%rbp
+++	pop	%rbx
+++	pop	%rdi
+++	pop	%rsi
+++	ret
+++.size	avx_handler,.-avx_handler
+++
+++.section	.pdata
+++.align	4
+++	.rva	.LSEH_begin_poly1305_init
+++	.rva	.LSEH_end_poly1305_init
+++	.rva	.LSEH_info_poly1305_init
+++
+++	.rva	.LSEH_begin_poly1305_blocks
+++	.rva	.LSEH_end_poly1305_blocks
+++	.rva	.LSEH_info_poly1305_blocks
+++
+++	.rva	.LSEH_begin_poly1305_emit
+++	.rva	.LSEH_end_poly1305_emit
+++	.rva	.LSEH_info_poly1305_emit
+++___
+++$code.=<<___ if ($avx);
+++	.rva	.LSEH_begin_poly1305_blocks_avx
+++	.rva	.Lbase2_64_avx
+++	.rva	.LSEH_info_poly1305_blocks_avx_1
+++
+++	.rva	.Lbase2_64_avx
+++	.rva	.Leven_avx
+++	.rva	.LSEH_info_poly1305_blocks_avx_2
+++
+++	.rva	.Leven_avx
+++	.rva	.LSEH_end_poly1305_blocks_avx
+++	.rva	.LSEH_info_poly1305_blocks_avx_3
+++
+++	.rva	.LSEH_begin_poly1305_emit_avx
+++	.rva	.LSEH_end_poly1305_emit_avx
+++	.rva	.LSEH_info_poly1305_emit_avx
+++___
+++$code.=<<___ if ($avx>1);
+++	.rva	.LSEH_begin_poly1305_blocks_avx2
+++	.rva	.Lbase2_64_avx2
+++	.rva	.LSEH_info_poly1305_blocks_avx2_1
+++
+++	.rva	.Lbase2_64_avx2
+++	.rva	.Leven_avx2
+++	.rva	.LSEH_info_poly1305_blocks_avx2_2
+++
+++	.rva	.Leven_avx2
+++	.rva	.LSEH_end_poly1305_blocks_avx2
+++	.rva	.LSEH_info_poly1305_blocks_avx2_3
+++___
+++$code.=<<___ if ($avx>2);
+++	.rva	.LSEH_begin_poly1305_blocks_avx512
+++	.rva	.LSEH_end_poly1305_blocks_avx512
+++	.rva	.LSEH_info_poly1305_blocks_avx512
+++___
+++$code.=<<___;
+++.section	.xdata
+++.align	8
+++.LSEH_info_poly1305_init:
+++	.byte	9,0,0,0
+++	.rva	se_handler
+++	.rva	.LSEH_begin_poly1305_init,.LSEH_begin_poly1305_init
+++
+++.LSEH_info_poly1305_blocks:
+++	.byte	9,0,0,0
+++	.rva	se_handler
+++	.rva	.Lblocks_body,.Lblocks_epilogue
+++
+++.LSEH_info_poly1305_emit:
+++	.byte	9,0,0,0
+++	.rva	se_handler
+++	.rva	.LSEH_begin_poly1305_emit,.LSEH_begin_poly1305_emit
+++___
+++$code.=<<___ if ($avx);
+++.LSEH_info_poly1305_blocks_avx_1:
+++	.byte	9,0,0,0
+++	.rva	se_handler
+++	.rva	.Lblocks_avx_body,.Lblocks_avx_epilogue		# HandlerData[]
+++
+++.LSEH_info_poly1305_blocks_avx_2:
+++	.byte	9,0,0,0
+++	.rva	se_handler
+++	.rva	.Lbase2_64_avx_body,.Lbase2_64_avx_epilogue	# HandlerData[]
+++
+++.LSEH_info_poly1305_blocks_avx_3:
+++	.byte	9,0,0,0
+++	.rva	avx_handler
+++	.rva	.Ldo_avx_body,.Ldo_avx_epilogue			# HandlerData[]
+++
+++.LSEH_info_poly1305_emit_avx:
+++	.byte	9,0,0,0
+++	.rva	se_handler
+++	.rva	.LSEH_begin_poly1305_emit_avx,.LSEH_begin_poly1305_emit_avx
+++___
+++$code.=<<___ if ($avx>1);
+++.LSEH_info_poly1305_blocks_avx2_1:
+++	.byte	9,0,0,0
+++	.rva	se_handler
+++	.rva	.Lblocks_avx2_body,.Lblocks_avx2_epilogue	# HandlerData[]
+++
+++.LSEH_info_poly1305_blocks_avx2_2:
+++	.byte	9,0,0,0
+++	.rva	se_handler
+++	.rva	.Lbase2_64_avx2_body,.Lbase2_64_avx2_epilogue	# HandlerData[]
+++
+++.LSEH_info_poly1305_blocks_avx2_3:
+++	.byte	9,0,0,0
+++	.rva	avx_handler
+++	.rva	.Ldo_avx2_body,.Ldo_avx2_epilogue		# HandlerData[]
+++___
+++$code.=<<___ if ($avx>2);
+++.LSEH_info_poly1305_blocks_avx512:
+++	.byte	9,0,0,0
+++	.rva	avx_handler
+++	.rva	.Ldo_avx512_body,.Ldo_avx512_epilogue		# HandlerData[]
+++___
+++}
+++
+++foreach (split('\n',$code)) {
+++	s/\`([^\`]*)\`/eval($1)/ge;
+++	s/%r([a-z]+)#d/%e$1/g;
+++	s/%r([0-9]+)#d/%r$1d/g;
+++	s/%x#%[yz]/%x/g or s/%y#%z/%y/g or s/%z#%[yz]/%z/g;
+++
+++	print $_,"\n";
+++}
+++close STDOUT;
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0043-crypto-x86-poly1305-wire-up-faster-implementations-f.patch b/target/linux/generic/backport-5.4/080-wireguard-0043-crypto-x86-poly1305-wire-up-faster-implementations-f.patch
+new file mode 100644
+index 0000000000..0fc8348585
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0043-crypto-x86-poly1305-wire-up-faster-implementations-f.patch
+@@ -0,0 +1,2927 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Sun, 5 Jan 2020 22:40:48 -0500
++Subject: [PATCH] crypto: x86/poly1305 - wire up faster implementations for
++ kernel
++
++commit d7d7b853566254648df59f7ea27ea05952a6cfa8 upstream.
++
++These x86_64 vectorized implementations support AVX, AVX-2, and AVX512F.
++The AVX-512F implementation is disabled on Skylake, due to throttling,
++but it is quite fast on >= Cannonlake.
++
++On the left is cycle counts on a Core i7 6700HQ using the AVX-2
++codepath, comparing this implementation ("new") to the implementation in
++the current crypto api ("old"). On the right are benchmarks on a Xeon
++Gold 5120 using the AVX-512 codepath. The new implementation is faster
++on all benchmarks.
++
++        AVX-2                  AVX-512
++      ---------              -----------
++
++    size    old     new      size   old     new
++    ----    ----    ----     ----   ----    ----
++    0       70      68       0      74      70
++    16      92      90       16     96      92
++    32      134     104      32     136     106
++    48      172     120      48     184     124
++    64      218     136      64     218     138
++    80      254     158      80     260     160
++    96      298     174      96     300     176
++    112     342     192      112    342     194
++    128     388     212      128    384     212
++    144     428     228      144    420     226
++    160     466     246      160    464     248
++    176     510     264      176    504     264
++    192     550     282      192    544     282
++    208     594     302      208    582     300
++    224     628     316      224    624     318
++    240     676     334      240    662     338
++    256     716     354      256    708     358
++    272     764     374      272    748     372
++    288     802     352      288    788     358
++    304     420     366      304    422     370
++    320     428     360      320    432     364
++    336     484     378      336    486     380
++    352     426     384      352    434     390
++    368     478     400      368    480     408
++    384     488     394      384    490     398
++    400     542     408      400    542     412
++    416     486     416      416    492     426
++    432     534     430      432    538     436
++    448     544     422      448    546     432
++    464     600     438      464    600     448
++    480     540     448      480    548     456
++    496     594     464      496    594     476
++    512     602     456      512    606     470
++    528     656     476      528    656     480
++    544     600     480      544    606     498
++    560     650     494      560    652     512
++    576     664     490      576    662     508
++    592     714     508      592    716     522
++    608     656     514      608    664     538
++    624     708     532      624    710     552
++    640     716     524      640    720     516
++    656     770     536      656    772     526
++    672     716     548      672    722     544
++    688     770     562      688    768     556
++    704     774     552      704    778     556
++    720     826     568      720    832     568
++    736     768     574      736    780     584
++    752     822     592      752    826     600
++    768     830     584      768    836     560
++    784     884     602      784    888     572
++    800     828     610      800    838     588
++    816     884     628      816    884     604
++    832     888     618      832    894     598
++    848     942     632      848    946     612
++    864     884     644      864    896     628
++    880     936     660      880    942     644
++    896     948     652      896    952     608
++    912     1000    664      912    1004    616
++    928     942     676      928    954     634
++    944     994     690      944    1000    646
++    960     1002    680      960    1008    646
++    976     1054    694      976    1062    658
++    992     1002    706      992    1012    674
++    1008    1052    720      1008   1058    690
++
++This commit wires in the prior implementation from Andy, and makes the
++following changes to be suitable for kernel land.
++
++  - Some cosmetic and structural changes, like renaming labels to
++    .Lname, constants, and other Linux conventions, as well as making
++    the code easy for us to maintain moving forward.
++
++  - CPU feature checking is done in C by the glue code.
++
++  - We avoid jumping into the middle of functions, to appease objtool,
++    and instead parameterize shared code.
++
++  - We maintain frame pointers so that stack traces make sense.
++
++  - We remove the dependency on the perl xlate code, which transforms
++    the output into things that assemblers we don't care about use.
++
++Importantly, none of our changes affect the arithmetic or core code, but
++just involve the differing environment of kernel space.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Samuel Neves <sneves@dei.uc.pt>
++Co-developed-by: Samuel Neves <sneves@dei.uc.pt>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/.gitignore                    |   1 +
++ arch/x86/crypto/Makefile                      |  11 +-
++ arch/x86/crypto/poly1305-avx2-x86_64.S        | 390 ----------
++ arch/x86/crypto/poly1305-sse2-x86_64.S        | 590 ---------------
++ arch/x86/crypto/poly1305-x86_64-cryptogams.pl | 682 ++++++++++--------
++ arch/x86/crypto/poly1305_glue.c               | 473 +++++-------
++ lib/crypto/Kconfig                            |   2 +-
++ 7 files changed, 572 insertions(+), 1577 deletions(-)
++ create mode 100644 arch/x86/crypto/.gitignore
++ delete mode 100644 arch/x86/crypto/poly1305-avx2-x86_64.S
++ delete mode 100644 arch/x86/crypto/poly1305-sse2-x86_64.S
++
++--- /dev/null
+++++ b/arch/x86/crypto/.gitignore
++@@ -0,0 +1 @@
+++poly1305-x86_64.S
++--- a/arch/x86/crypto/Makefile
+++++ b/arch/x86/crypto/Makefile
++@@ -73,6 +73,10 @@ aegis128-aesni-y := aegis128-aesni-asm.o
++ 
++ nhpoly1305-sse2-y := nh-sse2-x86_64.o nhpoly1305-sse2-glue.o
++ blake2s-x86_64-y := blake2s-core.o blake2s-glue.o
+++poly1305-x86_64-y := poly1305-x86_64-cryptogams.o poly1305_glue.o
+++ifneq ($(CONFIG_CRYPTO_POLY1305_X86_64),)
+++targets += poly1305-x86_64-cryptogams.S
+++endif
++ 
++ ifeq ($(avx_supported),yes)
++ 	camellia-aesni-avx-x86_64-y := camellia-aesni-avx-asm_64.o \
++@@ -101,10 +105,8 @@ aesni-intel-y := aesni-intel_asm.o aesni
++ aesni-intel-$(CONFIG_64BIT) += aesni-intel_avx-x86_64.o aes_ctrby8_avx-x86_64.o
++ ghash-clmulni-intel-y := ghash-clmulni-intel_asm.o ghash-clmulni-intel_glue.o
++ sha1-ssse3-y := sha1_ssse3_asm.o sha1_ssse3_glue.o
++-poly1305-x86_64-y := poly1305-sse2-x86_64.o poly1305_glue.o
++ ifeq ($(avx2_supported),yes)
++ sha1-ssse3-y += sha1_avx2_x86_64_asm.o
++-poly1305-x86_64-y += poly1305-avx2-x86_64.o
++ endif
++ ifeq ($(sha1_ni_supported),yes)
++ sha1-ssse3-y += sha1_ni_asm.o
++@@ -118,3 +120,8 @@ sha256-ssse3-y += sha256_ni_asm.o
++ endif
++ sha512-ssse3-y := sha512-ssse3-asm.o sha512-avx-asm.o sha512-avx2-asm.o sha512_ssse3_glue.o
++ crct10dif-pclmul-y := crct10dif-pcl-asm_64.o crct10dif-pclmul_glue.o
+++
+++quiet_cmd_perlasm = PERLASM $@
+++      cmd_perlasm = $(PERL) $< > $@
+++$(obj)/%.S: $(src)/%.pl FORCE
+++	$(call if_changed,perlasm)
++--- a/arch/x86/crypto/poly1305-avx2-x86_64.S
+++++ /dev/null
++@@ -1,390 +0,0 @@
++-/* SPDX-License-Identifier: GPL-2.0-or-later */
++-/*
++- * Poly1305 authenticator algorithm, RFC7539, x64 AVX2 functions
++- *
++- * Copyright (C) 2015 Martin Willi
++- */
++-
++-#include <linux/linkage.h>
++-
++-.section	.rodata.cst32.ANMASK, "aM", @progbits, 32
++-.align 32
++-ANMASK:	.octa 0x0000000003ffffff0000000003ffffff
++-	.octa 0x0000000003ffffff0000000003ffffff
++-
++-.section	.rodata.cst32.ORMASK, "aM", @progbits, 32
++-.align 32
++-ORMASK:	.octa 0x00000000010000000000000001000000
++-	.octa 0x00000000010000000000000001000000
++-
++-.text
++-
++-#define h0 0x00(%rdi)
++-#define h1 0x04(%rdi)
++-#define h2 0x08(%rdi)
++-#define h3 0x0c(%rdi)
++-#define h4 0x10(%rdi)
++-#define r0 0x00(%rdx)
++-#define r1 0x04(%rdx)
++-#define r2 0x08(%rdx)
++-#define r3 0x0c(%rdx)
++-#define r4 0x10(%rdx)
++-#define u0 0x00(%r8)
++-#define u1 0x04(%r8)
++-#define u2 0x08(%r8)
++-#define u3 0x0c(%r8)
++-#define u4 0x10(%r8)
++-#define w0 0x18(%r8)
++-#define w1 0x1c(%r8)
++-#define w2 0x20(%r8)
++-#define w3 0x24(%r8)
++-#define w4 0x28(%r8)
++-#define y0 0x30(%r8)
++-#define y1 0x34(%r8)
++-#define y2 0x38(%r8)
++-#define y3 0x3c(%r8)
++-#define y4 0x40(%r8)
++-#define m %rsi
++-#define hc0 %ymm0
++-#define hc1 %ymm1
++-#define hc2 %ymm2
++-#define hc3 %ymm3
++-#define hc4 %ymm4
++-#define hc0x %xmm0
++-#define hc1x %xmm1
++-#define hc2x %xmm2
++-#define hc3x %xmm3
++-#define hc4x %xmm4
++-#define t1 %ymm5
++-#define t2 %ymm6
++-#define t1x %xmm5
++-#define t2x %xmm6
++-#define ruwy0 %ymm7
++-#define ruwy1 %ymm8
++-#define ruwy2 %ymm9
++-#define ruwy3 %ymm10
++-#define ruwy4 %ymm11
++-#define ruwy0x %xmm7
++-#define ruwy1x %xmm8
++-#define ruwy2x %xmm9
++-#define ruwy3x %xmm10
++-#define ruwy4x %xmm11
++-#define svxz1 %ymm12
++-#define svxz2 %ymm13
++-#define svxz3 %ymm14
++-#define svxz4 %ymm15
++-#define d0 %r9
++-#define d1 %r10
++-#define d2 %r11
++-#define d3 %r12
++-#define d4 %r13
++-
++-ENTRY(poly1305_4block_avx2)
++-	# %rdi: Accumulator h[5]
++-	# %rsi: 64 byte input block m
++-	# %rdx: Poly1305 key r[5]
++-	# %rcx: Quadblock count
++-	# %r8:  Poly1305 derived key r^2 u[5], r^3 w[5], r^4 y[5],
++-
++-	# This four-block variant uses loop unrolled block processing. It
++-	# requires 4 Poly1305 keys: r, r^2, r^3 and r^4:
++-	# h = (h + m) * r  =>  h = (h + m1) * r^4 + m2 * r^3 + m3 * r^2 + m4 * r
++-
++-	vzeroupper
++-	push		%rbx
++-	push		%r12
++-	push		%r13
++-
++-	# combine r0,u0,w0,y0
++-	vmovd		y0,ruwy0x
++-	vmovd		w0,t1x
++-	vpunpcklqdq	t1,ruwy0,ruwy0
++-	vmovd		u0,t1x
++-	vmovd		r0,t2x
++-	vpunpcklqdq	t2,t1,t1
++-	vperm2i128	$0x20,t1,ruwy0,ruwy0
++-
++-	# combine r1,u1,w1,y1 and s1=r1*5,v1=u1*5,x1=w1*5,z1=y1*5
++-	vmovd		y1,ruwy1x
++-	vmovd		w1,t1x
++-	vpunpcklqdq	t1,ruwy1,ruwy1
++-	vmovd		u1,t1x
++-	vmovd		r1,t2x
++-	vpunpcklqdq	t2,t1,t1
++-	vperm2i128	$0x20,t1,ruwy1,ruwy1
++-	vpslld		$2,ruwy1,svxz1
++-	vpaddd		ruwy1,svxz1,svxz1
++-
++-	# combine r2,u2,w2,y2 and s2=r2*5,v2=u2*5,x2=w2*5,z2=y2*5
++-	vmovd		y2,ruwy2x
++-	vmovd		w2,t1x
++-	vpunpcklqdq	t1,ruwy2,ruwy2
++-	vmovd		u2,t1x
++-	vmovd		r2,t2x
++-	vpunpcklqdq	t2,t1,t1
++-	vperm2i128	$0x20,t1,ruwy2,ruwy2
++-	vpslld		$2,ruwy2,svxz2
++-	vpaddd		ruwy2,svxz2,svxz2
++-
++-	# combine r3,u3,w3,y3 and s3=r3*5,v3=u3*5,x3=w3*5,z3=y3*5
++-	vmovd		y3,ruwy3x
++-	vmovd		w3,t1x
++-	vpunpcklqdq	t1,ruwy3,ruwy3
++-	vmovd		u3,t1x
++-	vmovd		r3,t2x
++-	vpunpcklqdq	t2,t1,t1
++-	vperm2i128	$0x20,t1,ruwy3,ruwy3
++-	vpslld		$2,ruwy3,svxz3
++-	vpaddd		ruwy3,svxz3,svxz3
++-
++-	# combine r4,u4,w4,y4 and s4=r4*5,v4=u4*5,x4=w4*5,z4=y4*5
++-	vmovd		y4,ruwy4x
++-	vmovd		w4,t1x
++-	vpunpcklqdq	t1,ruwy4,ruwy4
++-	vmovd		u4,t1x
++-	vmovd		r4,t2x
++-	vpunpcklqdq	t2,t1,t1
++-	vperm2i128	$0x20,t1,ruwy4,ruwy4
++-	vpslld		$2,ruwy4,svxz4
++-	vpaddd		ruwy4,svxz4,svxz4
++-
++-.Ldoblock4:
++-	# hc0 = [m[48-51] & 0x3ffffff, m[32-35] & 0x3ffffff,
++-	#	 m[16-19] & 0x3ffffff, m[ 0- 3] & 0x3ffffff + h0]
++-	vmovd		0x00(m),hc0x
++-	vmovd		0x10(m),t1x
++-	vpunpcklqdq	t1,hc0,hc0
++-	vmovd		0x20(m),t1x
++-	vmovd		0x30(m),t2x
++-	vpunpcklqdq	t2,t1,t1
++-	vperm2i128	$0x20,t1,hc0,hc0
++-	vpand		ANMASK(%rip),hc0,hc0
++-	vmovd		h0,t1x
++-	vpaddd		t1,hc0,hc0
++-	# hc1 = [(m[51-54] >> 2) & 0x3ffffff, (m[35-38] >> 2) & 0x3ffffff,
++-	#	 (m[19-22] >> 2) & 0x3ffffff, (m[ 3- 6] >> 2) & 0x3ffffff + h1]
++-	vmovd		0x03(m),hc1x
++-	vmovd		0x13(m),t1x
++-	vpunpcklqdq	t1,hc1,hc1
++-	vmovd		0x23(m),t1x
++-	vmovd		0x33(m),t2x
++-	vpunpcklqdq	t2,t1,t1
++-	vperm2i128	$0x20,t1,hc1,hc1
++-	vpsrld		$2,hc1,hc1
++-	vpand		ANMASK(%rip),hc1,hc1
++-	vmovd		h1,t1x
++-	vpaddd		t1,hc1,hc1
++-	# hc2 = [(m[54-57] >> 4) & 0x3ffffff, (m[38-41] >> 4) & 0x3ffffff,
++-	#	 (m[22-25] >> 4) & 0x3ffffff, (m[ 6- 9] >> 4) & 0x3ffffff + h2]
++-	vmovd		0x06(m),hc2x
++-	vmovd		0x16(m),t1x
++-	vpunpcklqdq	t1,hc2,hc2
++-	vmovd		0x26(m),t1x
++-	vmovd		0x36(m),t2x
++-	vpunpcklqdq	t2,t1,t1
++-	vperm2i128	$0x20,t1,hc2,hc2
++-	vpsrld		$4,hc2,hc2
++-	vpand		ANMASK(%rip),hc2,hc2
++-	vmovd		h2,t1x
++-	vpaddd		t1,hc2,hc2
++-	# hc3 = [(m[57-60] >> 6) & 0x3ffffff, (m[41-44] >> 6) & 0x3ffffff,
++-	#	 (m[25-28] >> 6) & 0x3ffffff, (m[ 9-12] >> 6) & 0x3ffffff + h3]
++-	vmovd		0x09(m),hc3x
++-	vmovd		0x19(m),t1x
++-	vpunpcklqdq	t1,hc3,hc3
++-	vmovd		0x29(m),t1x
++-	vmovd		0x39(m),t2x
++-	vpunpcklqdq	t2,t1,t1
++-	vperm2i128	$0x20,t1,hc3,hc3
++-	vpsrld		$6,hc3,hc3
++-	vpand		ANMASK(%rip),hc3,hc3
++-	vmovd		h3,t1x
++-	vpaddd		t1,hc3,hc3
++-	# hc4 = [(m[60-63] >> 8) | (1<<24), (m[44-47] >> 8) | (1<<24),
++-	#	 (m[28-31] >> 8) | (1<<24), (m[12-15] >> 8) | (1<<24) + h4]
++-	vmovd		0x0c(m),hc4x
++-	vmovd		0x1c(m),t1x
++-	vpunpcklqdq	t1,hc4,hc4
++-	vmovd		0x2c(m),t1x
++-	vmovd		0x3c(m),t2x
++-	vpunpcklqdq	t2,t1,t1
++-	vperm2i128	$0x20,t1,hc4,hc4
++-	vpsrld		$8,hc4,hc4
++-	vpor		ORMASK(%rip),hc4,hc4
++-	vmovd		h4,t1x
++-	vpaddd		t1,hc4,hc4
++-
++-	# t1 = [ hc0[3] * r0, hc0[2] * u0, hc0[1] * w0, hc0[0] * y0 ]
++-	vpmuludq	hc0,ruwy0,t1
++-	# t1 += [ hc1[3] * s4, hc1[2] * v4, hc1[1] * x4, hc1[0] * z4 ]
++-	vpmuludq	hc1,svxz4,t2
++-	vpaddq		t2,t1,t1
++-	# t1 += [ hc2[3] * s3, hc2[2] * v3, hc2[1] * x3, hc2[0] * z3 ]
++-	vpmuludq	hc2,svxz3,t2
++-	vpaddq		t2,t1,t1
++-	# t1 += [ hc3[3] * s2, hc3[2] * v2, hc3[1] * x2, hc3[0] * z2 ]
++-	vpmuludq	hc3,svxz2,t2
++-	vpaddq		t2,t1,t1
++-	# t1 += [ hc4[3] * s1, hc4[2] * v1, hc4[1] * x1, hc4[0] * z1 ]
++-	vpmuludq	hc4,svxz1,t2
++-	vpaddq		t2,t1,t1
++-	# d0 = t1[0] + t1[1] + t[2] + t[3]
++-	vpermq		$0xee,t1,t2
++-	vpaddq		t2,t1,t1
++-	vpsrldq		$8,t1,t2
++-	vpaddq		t2,t1,t1
++-	vmovq		t1x,d0
++-
++-	# t1 = [ hc0[3] * r1, hc0[2] * u1,hc0[1] * w1, hc0[0] * y1 ]
++-	vpmuludq	hc0,ruwy1,t1
++-	# t1 += [ hc1[3] * r0, hc1[2] * u0, hc1[1] * w0, hc1[0] * y0 ]
++-	vpmuludq	hc1,ruwy0,t2
++-	vpaddq		t2,t1,t1
++-	# t1 += [ hc2[3] * s4, hc2[2] * v4, hc2[1] * x4, hc2[0] * z4 ]
++-	vpmuludq	hc2,svxz4,t2
++-	vpaddq		t2,t1,t1
++-	# t1 += [ hc3[3] * s3, hc3[2] * v3, hc3[1] * x3, hc3[0] * z3 ]
++-	vpmuludq	hc3,svxz3,t2
++-	vpaddq		t2,t1,t1
++-	# t1 += [ hc4[3] * s2, hc4[2] * v2, hc4[1] * x2, hc4[0] * z2 ]
++-	vpmuludq	hc4,svxz2,t2
++-	vpaddq		t2,t1,t1
++-	# d1 = t1[0] + t1[1] + t1[3] + t1[4]
++-	vpermq		$0xee,t1,t2
++-	vpaddq		t2,t1,t1
++-	vpsrldq		$8,t1,t2
++-	vpaddq		t2,t1,t1
++-	vmovq		t1x,d1
++-
++-	# t1 = [ hc0[3] * r2, hc0[2] * u2, hc0[1] * w2, hc0[0] * y2 ]
++-	vpmuludq	hc0,ruwy2,t1
++-	# t1 += [ hc1[3] * r1, hc1[2] * u1, hc1[1] * w1, hc1[0] * y1 ]
++-	vpmuludq	hc1,ruwy1,t2
++-	vpaddq		t2,t1,t1
++-	# t1 += [ hc2[3] * r0, hc2[2] * u0, hc2[1] * w0, hc2[0] * y0 ]
++-	vpmuludq	hc2,ruwy0,t2
++-	vpaddq		t2,t1,t1
++-	# t1 += [ hc3[3] * s4, hc3[2] * v4, hc3[1] * x4, hc3[0] * z4 ]
++-	vpmuludq	hc3,svxz4,t2
++-	vpaddq		t2,t1,t1
++-	# t1 += [ hc4[3] * s3, hc4[2] * v3, hc4[1] * x3, hc4[0] * z3 ]
++-	vpmuludq	hc4,svxz3,t2
++-	vpaddq		t2,t1,t1
++-	# d2 = t1[0] + t1[1] + t1[2] + t1[3]
++-	vpermq		$0xee,t1,t2
++-	vpaddq		t2,t1,t1
++-	vpsrldq		$8,t1,t2
++-	vpaddq		t2,t1,t1
++-	vmovq		t1x,d2
++-
++-	# t1 = [ hc0[3] * r3, hc0[2] * u3, hc0[1] * w3, hc0[0] * y3 ]
++-	vpmuludq	hc0,ruwy3,t1
++-	# t1 += [ hc1[3] * r2, hc1[2] * u2, hc1[1] * w2, hc1[0] * y2 ]
++-	vpmuludq	hc1,ruwy2,t2
++-	vpaddq		t2,t1,t1
++-	# t1 += [ hc2[3] * r1, hc2[2] * u1, hc2[1] * w1, hc2[0] * y1 ]
++-	vpmuludq	hc2,ruwy1,t2
++-	vpaddq		t2,t1,t1
++-	# t1 += [ hc3[3] * r0, hc3[2] * u0, hc3[1] * w0, hc3[0] * y0 ]
++-	vpmuludq	hc3,ruwy0,t2
++-	vpaddq		t2,t1,t1
++-	# t1 += [ hc4[3] * s4, hc4[2] * v4, hc4[1] * x4, hc4[0] * z4 ]
++-	vpmuludq	hc4,svxz4,t2
++-	vpaddq		t2,t1,t1
++-	# d3 = t1[0] + t1[1] + t1[2] + t1[3]
++-	vpermq		$0xee,t1,t2
++-	vpaddq		t2,t1,t1
++-	vpsrldq		$8,t1,t2
++-	vpaddq		t2,t1,t1
++-	vmovq		t1x,d3
++-
++-	# t1 = [ hc0[3] * r4, hc0[2] * u4, hc0[1] * w4, hc0[0] * y4 ]
++-	vpmuludq	hc0,ruwy4,t1
++-	# t1 += [ hc1[3] * r3, hc1[2] * u3, hc1[1] * w3, hc1[0] * y3 ]
++-	vpmuludq	hc1,ruwy3,t2
++-	vpaddq		t2,t1,t1
++-	# t1 += [ hc2[3] * r2, hc2[2] * u2, hc2[1] * w2, hc2[0] * y2 ]
++-	vpmuludq	hc2,ruwy2,t2
++-	vpaddq		t2,t1,t1
++-	# t1 += [ hc3[3] * r1, hc3[2] * u1, hc3[1] * w1, hc3[0] * y1 ]
++-	vpmuludq	hc3,ruwy1,t2
++-	vpaddq		t2,t1,t1
++-	# t1 += [ hc4[3] * r0, hc4[2] * u0, hc4[1] * w0, hc4[0] * y0 ]
++-	vpmuludq	hc4,ruwy0,t2
++-	vpaddq		t2,t1,t1
++-	# d4 = t1[0] + t1[1] + t1[2] + t1[3]
++-	vpermq		$0xee,t1,t2
++-	vpaddq		t2,t1,t1
++-	vpsrldq		$8,t1,t2
++-	vpaddq		t2,t1,t1
++-	vmovq		t1x,d4
++-
++-	# Now do a partial reduction mod (2^130)-5, carrying h0 -> h1 -> h2 ->
++-	# h3 -> h4 -> h0 -> h1 to get h0,h2,h3,h4 < 2^26 and h1 < 2^26 + a small
++-	# amount.  Careful: we must not assume the carry bits 'd0 >> 26',
++-	# 'd1 >> 26', 'd2 >> 26', 'd3 >> 26', and '(d4 >> 26) * 5' fit in 32-bit
++-	# integers.  It's true in a single-block implementation, but not here.
++-
++-	# d1 += d0 >> 26
++-	mov		d0,%rax
++-	shr		$26,%rax
++-	add		%rax,d1
++-	# h0 = d0 & 0x3ffffff
++-	mov		d0,%rbx
++-	and		$0x3ffffff,%ebx
++-
++-	# d2 += d1 >> 26
++-	mov		d1,%rax
++-	shr		$26,%rax
++-	add		%rax,d2
++-	# h1 = d1 & 0x3ffffff
++-	mov		d1,%rax
++-	and		$0x3ffffff,%eax
++-	mov		%eax,h1
++-
++-	# d3 += d2 >> 26
++-	mov		d2,%rax
++-	shr		$26,%rax
++-	add		%rax,d3
++-	# h2 = d2 & 0x3ffffff
++-	mov		d2,%rax
++-	and		$0x3ffffff,%eax
++-	mov		%eax,h2
++-
++-	# d4 += d3 >> 26
++-	mov		d3,%rax
++-	shr		$26,%rax
++-	add		%rax,d4
++-	# h3 = d3 & 0x3ffffff
++-	mov		d3,%rax
++-	and		$0x3ffffff,%eax
++-	mov		%eax,h3
++-
++-	# h0 += (d4 >> 26) * 5
++-	mov		d4,%rax
++-	shr		$26,%rax
++-	lea		(%rax,%rax,4),%rax
++-	add		%rax,%rbx
++-	# h4 = d4 & 0x3ffffff
++-	mov		d4,%rax
++-	and		$0x3ffffff,%eax
++-	mov		%eax,h4
++-
++-	# h1 += h0 >> 26
++-	mov		%rbx,%rax
++-	shr		$26,%rax
++-	add		%eax,h1
++-	# h0 = h0 & 0x3ffffff
++-	andl		$0x3ffffff,%ebx
++-	mov		%ebx,h0
++-
++-	add		$0x40,m
++-	dec		%rcx
++-	jnz		.Ldoblock4
++-
++-	vzeroupper
++-	pop		%r13
++-	pop		%r12
++-	pop		%rbx
++-	ret
++-ENDPROC(poly1305_4block_avx2)
++--- a/arch/x86/crypto/poly1305-sse2-x86_64.S
+++++ /dev/null
++@@ -1,590 +0,0 @@
++-/* SPDX-License-Identifier: GPL-2.0-or-later */
++-/*
++- * Poly1305 authenticator algorithm, RFC7539, x64 SSE2 functions
++- *
++- * Copyright (C) 2015 Martin Willi
++- */
++-
++-#include <linux/linkage.h>
++-
++-.section	.rodata.cst16.ANMASK, "aM", @progbits, 16
++-.align 16
++-ANMASK:	.octa 0x0000000003ffffff0000000003ffffff
++-
++-.section	.rodata.cst16.ORMASK, "aM", @progbits, 16
++-.align 16
++-ORMASK:	.octa 0x00000000010000000000000001000000
++-
++-.text
++-
++-#define h0 0x00(%rdi)
++-#define h1 0x04(%rdi)
++-#define h2 0x08(%rdi)
++-#define h3 0x0c(%rdi)
++-#define h4 0x10(%rdi)
++-#define r0 0x00(%rdx)
++-#define r1 0x04(%rdx)
++-#define r2 0x08(%rdx)
++-#define r3 0x0c(%rdx)
++-#define r4 0x10(%rdx)
++-#define s1 0x00(%rsp)
++-#define s2 0x04(%rsp)
++-#define s3 0x08(%rsp)
++-#define s4 0x0c(%rsp)
++-#define m %rsi
++-#define h01 %xmm0
++-#define h23 %xmm1
++-#define h44 %xmm2
++-#define t1 %xmm3
++-#define t2 %xmm4
++-#define t3 %xmm5
++-#define t4 %xmm6
++-#define mask %xmm7
++-#define d0 %r8
++-#define d1 %r9
++-#define d2 %r10
++-#define d3 %r11
++-#define d4 %r12
++-
++-ENTRY(poly1305_block_sse2)
++-	# %rdi: Accumulator h[5]
++-	# %rsi: 16 byte input block m
++-	# %rdx: Poly1305 key r[5]
++-	# %rcx: Block count
++-
++-	# This single block variant tries to improve performance by doing two
++-	# multiplications in parallel using SSE instructions. There is quite
++-	# some quardword packing involved, hence the speedup is marginal.
++-
++-	push		%rbx
++-	push		%r12
++-	sub		$0x10,%rsp
++-
++-	# s1..s4 = r1..r4 * 5
++-	mov		r1,%eax
++-	lea		(%eax,%eax,4),%eax
++-	mov		%eax,s1
++-	mov		r2,%eax
++-	lea		(%eax,%eax,4),%eax
++-	mov		%eax,s2
++-	mov		r3,%eax
++-	lea		(%eax,%eax,4),%eax
++-	mov		%eax,s3
++-	mov		r4,%eax
++-	lea		(%eax,%eax,4),%eax
++-	mov		%eax,s4
++-
++-	movdqa		ANMASK(%rip),mask
++-
++-.Ldoblock:
++-	# h01 = [0, h1, 0, h0]
++-	# h23 = [0, h3, 0, h2]
++-	# h44 = [0, h4, 0, h4]
++-	movd		h0,h01
++-	movd		h1,t1
++-	movd		h2,h23
++-	movd		h3,t2
++-	movd		h4,h44
++-	punpcklqdq	t1,h01
++-	punpcklqdq	t2,h23
++-	punpcklqdq	h44,h44
++-
++-	# h01 += [ (m[3-6] >> 2) & 0x3ffffff, m[0-3] & 0x3ffffff ]
++-	movd		0x00(m),t1
++-	movd		0x03(m),t2
++-	psrld		$2,t2
++-	punpcklqdq	t2,t1
++-	pand		mask,t1
++-	paddd		t1,h01
++-	# h23 += [ (m[9-12] >> 6) & 0x3ffffff, (m[6-9] >> 4) & 0x3ffffff ]
++-	movd		0x06(m),t1
++-	movd		0x09(m),t2
++-	psrld		$4,t1
++-	psrld		$6,t2
++-	punpcklqdq	t2,t1
++-	pand		mask,t1
++-	paddd		t1,h23
++-	# h44 += [ (m[12-15] >> 8) | (1 << 24), (m[12-15] >> 8) | (1 << 24) ]
++-	mov		0x0c(m),%eax
++-	shr		$8,%eax
++-	or		$0x01000000,%eax
++-	movd		%eax,t1
++-	pshufd		$0xc4,t1,t1
++-	paddd		t1,h44
++-
++-	# t1[0] = h0 * r0 + h2 * s3
++-	# t1[1] = h1 * s4 + h3 * s2
++-	movd		r0,t1
++-	movd		s4,t2
++-	punpcklqdq	t2,t1
++-	pmuludq		h01,t1
++-	movd		s3,t2
++-	movd		s2,t3
++-	punpcklqdq	t3,t2
++-	pmuludq		h23,t2
++-	paddq		t2,t1
++-	# t2[0] = h0 * r1 + h2 * s4
++-	# t2[1] = h1 * r0 + h3 * s3
++-	movd		r1,t2
++-	movd		r0,t3
++-	punpcklqdq	t3,t2
++-	pmuludq		h01,t2
++-	movd		s4,t3
++-	movd		s3,t4
++-	punpcklqdq	t4,t3
++-	pmuludq		h23,t3
++-	paddq		t3,t2
++-	# t3[0] = h4 * s1
++-	# t3[1] = h4 * s2
++-	movd		s1,t3
++-	movd		s2,t4
++-	punpcklqdq	t4,t3
++-	pmuludq		h44,t3
++-	# d0 = t1[0] + t1[1] + t3[0]
++-	# d1 = t2[0] + t2[1] + t3[1]
++-	movdqa		t1,t4
++-	punpcklqdq	t2,t4
++-	punpckhqdq	t2,t1
++-	paddq		t4,t1
++-	paddq		t3,t1
++-	movq		t1,d0
++-	psrldq		$8,t1
++-	movq		t1,d1
++-
++-	# t1[0] = h0 * r2 + h2 * r0
++-	# t1[1] = h1 * r1 + h3 * s4
++-	movd		r2,t1
++-	movd		r1,t2
++-	punpcklqdq 	t2,t1
++-	pmuludq		h01,t1
++-	movd		r0,t2
++-	movd		s4,t3
++-	punpcklqdq	t3,t2
++-	pmuludq		h23,t2
++-	paddq		t2,t1
++-	# t2[0] = h0 * r3 + h2 * r1
++-	# t2[1] = h1 * r2 + h3 * r0
++-	movd		r3,t2
++-	movd		r2,t3
++-	punpcklqdq	t3,t2
++-	pmuludq		h01,t2
++-	movd		r1,t3
++-	movd		r0,t4
++-	punpcklqdq	t4,t3
++-	pmuludq		h23,t3
++-	paddq		t3,t2
++-	# t3[0] = h4 * s3
++-	# t3[1] = h4 * s4
++-	movd		s3,t3
++-	movd		s4,t4
++-	punpcklqdq	t4,t3
++-	pmuludq		h44,t3
++-	# d2 = t1[0] + t1[1] + t3[0]
++-	# d3 = t2[0] + t2[1] + t3[1]
++-	movdqa		t1,t4
++-	punpcklqdq	t2,t4
++-	punpckhqdq	t2,t1
++-	paddq		t4,t1
++-	paddq		t3,t1
++-	movq		t1,d2
++-	psrldq		$8,t1
++-	movq		t1,d3
++-
++-	# t1[0] = h0 * r4 + h2 * r2
++-	# t1[1] = h1 * r3 + h3 * r1
++-	movd		r4,t1
++-	movd		r3,t2
++-	punpcklqdq	t2,t1
++-	pmuludq		h01,t1
++-	movd		r2,t2
++-	movd		r1,t3
++-	punpcklqdq	t3,t2
++-	pmuludq		h23,t2
++-	paddq		t2,t1
++-	# t3[0] = h4 * r0
++-	movd		r0,t3
++-	pmuludq		h44,t3
++-	# d4 = t1[0] + t1[1] + t3[0]
++-	movdqa		t1,t4
++-	psrldq		$8,t4
++-	paddq		t4,t1
++-	paddq		t3,t1
++-	movq		t1,d4
++-
++-	# d1 += d0 >> 26
++-	mov		d0,%rax
++-	shr		$26,%rax
++-	add		%rax,d1
++-	# h0 = d0 & 0x3ffffff
++-	mov		d0,%rbx
++-	and		$0x3ffffff,%ebx
++-
++-	# d2 += d1 >> 26
++-	mov		d1,%rax
++-	shr		$26,%rax
++-	add		%rax,d2
++-	# h1 = d1 & 0x3ffffff
++-	mov		d1,%rax
++-	and		$0x3ffffff,%eax
++-	mov		%eax,h1
++-
++-	# d3 += d2 >> 26
++-	mov		d2,%rax
++-	shr		$26,%rax
++-	add		%rax,d3
++-	# h2 = d2 & 0x3ffffff
++-	mov		d2,%rax
++-	and		$0x3ffffff,%eax
++-	mov		%eax,h2
++-
++-	# d4 += d3 >> 26
++-	mov		d3,%rax
++-	shr		$26,%rax
++-	add		%rax,d4
++-	# h3 = d3 & 0x3ffffff
++-	mov		d3,%rax
++-	and		$0x3ffffff,%eax
++-	mov		%eax,h3
++-
++-	# h0 += (d4 >> 26) * 5
++-	mov		d4,%rax
++-	shr		$26,%rax
++-	lea		(%rax,%rax,4),%rax
++-	add		%rax,%rbx
++-	# h4 = d4 & 0x3ffffff
++-	mov		d4,%rax
++-	and		$0x3ffffff,%eax
++-	mov		%eax,h4
++-
++-	# h1 += h0 >> 26
++-	mov		%rbx,%rax
++-	shr		$26,%rax
++-	add		%eax,h1
++-	# h0 = h0 & 0x3ffffff
++-	andl		$0x3ffffff,%ebx
++-	mov		%ebx,h0
++-
++-	add		$0x10,m
++-	dec		%rcx
++-	jnz		.Ldoblock
++-
++-	# Zeroing of key material
++-	mov		%rcx,0x00(%rsp)
++-	mov		%rcx,0x08(%rsp)
++-
++-	add		$0x10,%rsp
++-	pop		%r12
++-	pop		%rbx
++-	ret
++-ENDPROC(poly1305_block_sse2)
++-
++-
++-#define u0 0x00(%r8)
++-#define u1 0x04(%r8)
++-#define u2 0x08(%r8)
++-#define u3 0x0c(%r8)
++-#define u4 0x10(%r8)
++-#define hc0 %xmm0
++-#define hc1 %xmm1
++-#define hc2 %xmm2
++-#define hc3 %xmm5
++-#define hc4 %xmm6
++-#define ru0 %xmm7
++-#define ru1 %xmm8
++-#define ru2 %xmm9
++-#define ru3 %xmm10
++-#define ru4 %xmm11
++-#define sv1 %xmm12
++-#define sv2 %xmm13
++-#define sv3 %xmm14
++-#define sv4 %xmm15
++-#undef d0
++-#define d0 %r13
++-
++-ENTRY(poly1305_2block_sse2)
++-	# %rdi: Accumulator h[5]
++-	# %rsi: 16 byte input block m
++-	# %rdx: Poly1305 key r[5]
++-	# %rcx: Doubleblock count
++-	# %r8:  Poly1305 derived key r^2 u[5]
++-
++-	# This two-block variant further improves performance by using loop
++-	# unrolled block processing. This is more straight forward and does
++-	# less byte shuffling, but requires a second Poly1305 key r^2:
++-	# h = (h + m) * r    =>    h = (h + m1) * r^2 + m2 * r
++-
++-	push		%rbx
++-	push		%r12
++-	push		%r13
++-
++-	# combine r0,u0
++-	movd		u0,ru0
++-	movd		r0,t1
++-	punpcklqdq	t1,ru0
++-
++-	# combine r1,u1 and s1=r1*5,v1=u1*5
++-	movd		u1,ru1
++-	movd		r1,t1
++-	punpcklqdq	t1,ru1
++-	movdqa		ru1,sv1
++-	pslld		$2,sv1
++-	paddd		ru1,sv1
++-
++-	# combine r2,u2 and s2=r2*5,v2=u2*5
++-	movd		u2,ru2
++-	movd		r2,t1
++-	punpcklqdq	t1,ru2
++-	movdqa		ru2,sv2
++-	pslld		$2,sv2
++-	paddd		ru2,sv2
++-
++-	# combine r3,u3 and s3=r3*5,v3=u3*5
++-	movd		u3,ru3
++-	movd		r3,t1
++-	punpcklqdq	t1,ru3
++-	movdqa		ru3,sv3
++-	pslld		$2,sv3
++-	paddd		ru3,sv3
++-
++-	# combine r4,u4 and s4=r4*5,v4=u4*5
++-	movd		u4,ru4
++-	movd		r4,t1
++-	punpcklqdq	t1,ru4
++-	movdqa		ru4,sv4
++-	pslld		$2,sv4
++-	paddd		ru4,sv4
++-
++-.Ldoblock2:
++-	# hc0 = [ m[16-19] & 0x3ffffff, h0 + m[0-3] & 0x3ffffff ]
++-	movd		0x00(m),hc0
++-	movd		0x10(m),t1
++-	punpcklqdq	t1,hc0
++-	pand		ANMASK(%rip),hc0
++-	movd		h0,t1
++-	paddd		t1,hc0
++-	# hc1 = [ (m[19-22] >> 2) & 0x3ffffff, h1 + (m[3-6] >> 2) & 0x3ffffff ]
++-	movd		0x03(m),hc1
++-	movd		0x13(m),t1
++-	punpcklqdq	t1,hc1
++-	psrld		$2,hc1
++-	pand		ANMASK(%rip),hc1
++-	movd		h1,t1
++-	paddd		t1,hc1
++-	# hc2 = [ (m[22-25] >> 4) & 0x3ffffff, h2 + (m[6-9] >> 4) & 0x3ffffff ]
++-	movd		0x06(m),hc2
++-	movd		0x16(m),t1
++-	punpcklqdq	t1,hc2
++-	psrld		$4,hc2
++-	pand		ANMASK(%rip),hc2
++-	movd		h2,t1
++-	paddd		t1,hc2
++-	# hc3 = [ (m[25-28] >> 6) & 0x3ffffff, h3 + (m[9-12] >> 6) & 0x3ffffff ]
++-	movd		0x09(m),hc3
++-	movd		0x19(m),t1
++-	punpcklqdq	t1,hc3
++-	psrld		$6,hc3
++-	pand		ANMASK(%rip),hc3
++-	movd		h3,t1
++-	paddd		t1,hc3
++-	# hc4 = [ (m[28-31] >> 8) | (1<<24), h4 + (m[12-15] >> 8) | (1<<24) ]
++-	movd		0x0c(m),hc4
++-	movd		0x1c(m),t1
++-	punpcklqdq	t1,hc4
++-	psrld		$8,hc4
++-	por		ORMASK(%rip),hc4
++-	movd		h4,t1
++-	paddd		t1,hc4
++-
++-	# t1 = [ hc0[1] * r0, hc0[0] * u0 ]
++-	movdqa		ru0,t1
++-	pmuludq		hc0,t1
++-	# t1 += [ hc1[1] * s4, hc1[0] * v4 ]
++-	movdqa		sv4,t2
++-	pmuludq		hc1,t2
++-	paddq		t2,t1
++-	# t1 += [ hc2[1] * s3, hc2[0] * v3 ]
++-	movdqa		sv3,t2
++-	pmuludq		hc2,t2
++-	paddq		t2,t1
++-	# t1 += [ hc3[1] * s2, hc3[0] * v2 ]
++-	movdqa		sv2,t2
++-	pmuludq		hc3,t2
++-	paddq		t2,t1
++-	# t1 += [ hc4[1] * s1, hc4[0] * v1 ]
++-	movdqa		sv1,t2
++-	pmuludq		hc4,t2
++-	paddq		t2,t1
++-	# d0 = t1[0] + t1[1]
++-	movdqa		t1,t2
++-	psrldq		$8,t2
++-	paddq		t2,t1
++-	movq		t1,d0
++-
++-	# t1 = [ hc0[1] * r1, hc0[0] * u1 ]
++-	movdqa		ru1,t1
++-	pmuludq		hc0,t1
++-	# t1 += [ hc1[1] * r0, hc1[0] * u0 ]
++-	movdqa		ru0,t2
++-	pmuludq		hc1,t2
++-	paddq		t2,t1
++-	# t1 += [ hc2[1] * s4, hc2[0] * v4 ]
++-	movdqa		sv4,t2
++-	pmuludq		hc2,t2
++-	paddq		t2,t1
++-	# t1 += [ hc3[1] * s3, hc3[0] * v3 ]
++-	movdqa		sv3,t2
++-	pmuludq		hc3,t2
++-	paddq		t2,t1
++-	# t1 += [ hc4[1] * s2, hc4[0] * v2 ]
++-	movdqa		sv2,t2
++-	pmuludq		hc4,t2
++-	paddq		t2,t1
++-	# d1 = t1[0] + t1[1]
++-	movdqa		t1,t2
++-	psrldq		$8,t2
++-	paddq		t2,t1
++-	movq		t1,d1
++-
++-	# t1 = [ hc0[1] * r2, hc0[0] * u2 ]
++-	movdqa		ru2,t1
++-	pmuludq		hc0,t1
++-	# t1 += [ hc1[1] * r1, hc1[0] * u1 ]
++-	movdqa		ru1,t2
++-	pmuludq		hc1,t2
++-	paddq		t2,t1
++-	# t1 += [ hc2[1] * r0, hc2[0] * u0 ]
++-	movdqa		ru0,t2
++-	pmuludq		hc2,t2
++-	paddq		t2,t1
++-	# t1 += [ hc3[1] * s4, hc3[0] * v4 ]
++-	movdqa		sv4,t2
++-	pmuludq		hc3,t2
++-	paddq		t2,t1
++-	# t1 += [ hc4[1] * s3, hc4[0] * v3 ]
++-	movdqa		sv3,t2
++-	pmuludq		hc4,t2
++-	paddq		t2,t1
++-	# d2 = t1[0] + t1[1]
++-	movdqa		t1,t2
++-	psrldq		$8,t2
++-	paddq		t2,t1
++-	movq		t1,d2
++-
++-	# t1 = [ hc0[1] * r3, hc0[0] * u3 ]
++-	movdqa		ru3,t1
++-	pmuludq		hc0,t1
++-	# t1 += [ hc1[1] * r2, hc1[0] * u2 ]
++-	movdqa		ru2,t2
++-	pmuludq		hc1,t2
++-	paddq		t2,t1
++-	# t1 += [ hc2[1] * r1, hc2[0] * u1 ]
++-	movdqa		ru1,t2
++-	pmuludq		hc2,t2
++-	paddq		t2,t1
++-	# t1 += [ hc3[1] * r0, hc3[0] * u0 ]
++-	movdqa		ru0,t2
++-	pmuludq		hc3,t2
++-	paddq		t2,t1
++-	# t1 += [ hc4[1] * s4, hc4[0] * v4 ]
++-	movdqa		sv4,t2
++-	pmuludq		hc4,t2
++-	paddq		t2,t1
++-	# d3 = t1[0] + t1[1]
++-	movdqa		t1,t2
++-	psrldq		$8,t2
++-	paddq		t2,t1
++-	movq		t1,d3
++-
++-	# t1 = [ hc0[1] * r4, hc0[0] * u4 ]
++-	movdqa		ru4,t1
++-	pmuludq		hc0,t1
++-	# t1 += [ hc1[1] * r3, hc1[0] * u3 ]
++-	movdqa		ru3,t2
++-	pmuludq		hc1,t2
++-	paddq		t2,t1
++-	# t1 += [ hc2[1] * r2, hc2[0] * u2 ]
++-	movdqa		ru2,t2
++-	pmuludq		hc2,t2
++-	paddq		t2,t1
++-	# t1 += [ hc3[1] * r1, hc3[0] * u1 ]
++-	movdqa		ru1,t2
++-	pmuludq		hc3,t2
++-	paddq		t2,t1
++-	# t1 += [ hc4[1] * r0, hc4[0] * u0 ]
++-	movdqa		ru0,t2
++-	pmuludq		hc4,t2
++-	paddq		t2,t1
++-	# d4 = t1[0] + t1[1]
++-	movdqa		t1,t2
++-	psrldq		$8,t2
++-	paddq		t2,t1
++-	movq		t1,d4
++-
++-	# Now do a partial reduction mod (2^130)-5, carrying h0 -> h1 -> h2 ->
++-	# h3 -> h4 -> h0 -> h1 to get h0,h2,h3,h4 < 2^26 and h1 < 2^26 + a small
++-	# amount.  Careful: we must not assume the carry bits 'd0 >> 26',
++-	# 'd1 >> 26', 'd2 >> 26', 'd3 >> 26', and '(d4 >> 26) * 5' fit in 32-bit
++-	# integers.  It's true in a single-block implementation, but not here.
++-
++-	# d1 += d0 >> 26
++-	mov		d0,%rax
++-	shr		$26,%rax
++-	add		%rax,d1
++-	# h0 = d0 & 0x3ffffff
++-	mov		d0,%rbx
++-	and		$0x3ffffff,%ebx
++-
++-	# d2 += d1 >> 26
++-	mov		d1,%rax
++-	shr		$26,%rax
++-	add		%rax,d2
++-	# h1 = d1 & 0x3ffffff
++-	mov		d1,%rax
++-	and		$0x3ffffff,%eax
++-	mov		%eax,h1
++-
++-	# d3 += d2 >> 26
++-	mov		d2,%rax
++-	shr		$26,%rax
++-	add		%rax,d3
++-	# h2 = d2 & 0x3ffffff
++-	mov		d2,%rax
++-	and		$0x3ffffff,%eax
++-	mov		%eax,h2
++-
++-	# d4 += d3 >> 26
++-	mov		d3,%rax
++-	shr		$26,%rax
++-	add		%rax,d4
++-	# h3 = d3 & 0x3ffffff
++-	mov		d3,%rax
++-	and		$0x3ffffff,%eax
++-	mov		%eax,h3
++-
++-	# h0 += (d4 >> 26) * 5
++-	mov		d4,%rax
++-	shr		$26,%rax
++-	lea		(%rax,%rax,4),%rax
++-	add		%rax,%rbx
++-	# h4 = d4 & 0x3ffffff
++-	mov		d4,%rax
++-	and		$0x3ffffff,%eax
++-	mov		%eax,h4
++-
++-	# h1 += h0 >> 26
++-	mov		%rbx,%rax
++-	shr		$26,%rax
++-	add		%eax,h1
++-	# h0 = h0 & 0x3ffffff
++-	andl		$0x3ffffff,%ebx
++-	mov		%ebx,h0
++-
++-	add		$0x20,m
++-	dec		%rcx
++-	jnz		.Ldoblock2
++-
++-	pop		%r13
++-	pop		%r12
++-	pop		%rbx
++-	ret
++-ENDPROC(poly1305_2block_sse2)
++--- a/arch/x86/crypto/poly1305-x86_64-cryptogams.pl
+++++ b/arch/x86/crypto/poly1305-x86_64-cryptogams.pl
++@@ -1,11 +1,14 @@
++-#! /usr/bin/env perl
++-# Copyright 2016-2018 The OpenSSL Project Authors. All Rights Reserved.
+++#!/usr/bin/env perl
+++# SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
++ #
++-# Licensed under the OpenSSL license (the "License").  You may not use
++-# this file except in compliance with the License.  You can obtain a copy
++-# in the file LICENSE in the source distribution or at
++-# https://www.openssl.org/source/license.html
++-
+++# Copyright (C) 2017-2018 Samuel Neves <sneves@dei.uc.pt>. All Rights Reserved.
+++# Copyright (C) 2017-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++# Copyright (C) 2006-2017 CRYPTOGAMS by <appro@openssl.org>. All Rights Reserved.
+++#
+++# This code is taken from the OpenSSL project but the author, Andy Polyakov,
+++# has relicensed it under the licenses specified in the SPDX header above.
+++# The original headers, including the original license headers, are
+++# included below for completeness.
++ #
++ # ====================================================================
++ # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
++@@ -32,7 +35,7 @@
++ # Skylake-X system performance. Since we are likely to suppress
++ # AVX512F capability flag [at least on Skylake-X], conversion serves
++ # as kind of "investment protection". Note that next *lake processor,
++-# Cannolake, has AVX512IFMA code path to execute...
+++# Cannonlake, has AVX512IFMA code path to execute...
++ #
++ # Numbers are cycles per processed byte with poly1305_blocks alone,
++ # measured with rdtsc at fixed clock frequency.
++@@ -68,39 +71,114 @@ $output  = shift;
++ if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
++ 
++ $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
+++$kernel=0; $kernel=1 if (!$flavour && !$output);
++ 
++-$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
++-( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
++-( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
++-die "can't locate x86_64-xlate.pl";
++-
++-if (`$ENV{CC} -Wa,-v -c -o /dev/null -x assembler /dev/null 2>&1`
++-		=~ /GNU assembler version ([2-9]\.[0-9]+)/) {
++-	$avx = ($1>=2.19) + ($1>=2.22) + ($1>=2.25) + ($1>=2.26);
+++if (!$kernel) {
+++	$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
+++	( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
+++	( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
+++	die "can't locate x86_64-xlate.pl";
+++
+++	open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\"";
+++	*STDOUT=*OUT;
+++
+++	if (`$ENV{CC} -Wa,-v -c -o /dev/null -x assembler /dev/null 2>&1`
+++	    =~ /GNU assembler version ([2-9]\.[0-9]+)/) {
+++		$avx = ($1>=2.19) + ($1>=2.22) + ($1>=2.25);
+++	}
+++
+++	if (!$avx && $win64 && ($flavour =~ /nasm/ || $ENV{ASM} =~ /nasm/) &&
+++	    `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)(?:\.([0-9]+))?/) {
+++		$avx = ($1>=2.09) + ($1>=2.10) + ($1>=2.12);
+++		$avx += 1 if ($1==2.11 && $2>=8);
+++	}
+++
+++	if (!$avx && $win64 && ($flavour =~ /masm/ || $ENV{ASM} =~ /ml64/) &&
+++	    `ml64 2>&1` =~ /Version ([0-9]+)\./) {
+++		$avx = ($1>=10) + ($1>=11);
+++	}
+++
+++	if (!$avx && `$ENV{CC} -v 2>&1` =~ /((?:^clang|LLVM) version|.*based on LLVM) ([3-9]\.[0-9]+)/) {
+++		$avx = ($2>=3.0) + ($2>3.0);
+++	}
+++} else {
+++	$avx = 4; # The kernel uses ifdefs for this.
++ }
++ 
++-if (!$avx && $win64 && ($flavour =~ /nasm/ || $ENV{ASM} =~ /nasm/) &&
++-	   `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)(?:\.([0-9]+))?/) {
++-	$avx = ($1>=2.09) + ($1>=2.10) + 2 * ($1>=2.12);
++-	$avx += 2 if ($1==2.11 && $2>=8);
+++sub declare_function() {
+++	my ($name, $align, $nargs) = @_;
+++	if($kernel) {
+++		$code .= ".align $align\n";
+++		$code .= "ENTRY($name)\n";
+++		$code .= ".L$name:\n";
+++	} else {
+++		$code .= ".globl	$name\n";
+++		$code .= ".type	$name,\@function,$nargs\n";
+++		$code .= ".align	$align\n";
+++		$code .= "$name:\n";
+++	}
++ }
++ 
++-if (!$avx && $win64 && ($flavour =~ /masm/ || $ENV{ASM} =~ /ml64/) &&
++-	   `ml64 2>&1` =~ /Version ([0-9]+)\./) {
++-	$avx = ($1>=10) + ($1>=12);
+++sub end_function() {
+++	my ($name) = @_;
+++	if($kernel) {
+++		$code .= "ENDPROC($name)\n";
+++	} else {
+++		$code .= ".size   $name,.-$name\n";
+++	}
++ }
++ 
++-if (!$avx && `$ENV{CC} -v 2>&1` =~ /((?:^clang|LLVM) version|.*based on LLVM) ([3-9]\.[0-9]+)/) {
++-	$avx = ($2>=3.0) + ($2>3.0);
++-}
+++$code.=<<___ if $kernel;
+++#include <linux/linkage.h>
+++___
++ 
++-open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\"";
++-*STDOUT=*OUT;
+++if ($avx) {
+++$code.=<<___ if $kernel;
+++.section .rodata
+++___
+++$code.=<<___;
+++.align	64
+++.Lconst:
+++.Lmask24:
+++.long	0x0ffffff,0,0x0ffffff,0,0x0ffffff,0,0x0ffffff,0
+++.L129:
+++.long	`1<<24`,0,`1<<24`,0,`1<<24`,0,`1<<24`,0
+++.Lmask26:
+++.long	0x3ffffff,0,0x3ffffff,0,0x3ffffff,0,0x3ffffff,0
+++.Lpermd_avx2:
+++.long	2,2,2,3,2,0,2,1
+++.Lpermd_avx512:
+++.long	0,0,0,1, 0,2,0,3, 0,4,0,5, 0,6,0,7
+++
+++.L2_44_inp_permd:
+++.long	0,1,1,2,2,3,7,7
+++.L2_44_inp_shift:
+++.quad	0,12,24,64
+++.L2_44_mask:
+++.quad	0xfffffffffff,0xfffffffffff,0x3ffffffffff,0xffffffffffffffff
+++.L2_44_shift_rgt:
+++.quad	44,44,42,64
+++.L2_44_shift_lft:
+++.quad	8,8,10,64
+++
+++.align	64
+++.Lx_mask44:
+++.quad	0xfffffffffff,0xfffffffffff,0xfffffffffff,0xfffffffffff
+++.quad	0xfffffffffff,0xfffffffffff,0xfffffffffff,0xfffffffffff
+++.Lx_mask42:
+++.quad	0x3ffffffffff,0x3ffffffffff,0x3ffffffffff,0x3ffffffffff
+++.quad	0x3ffffffffff,0x3ffffffffff,0x3ffffffffff,0x3ffffffffff
+++___
+++}
+++$code.=<<___ if (!$kernel);
+++.asciz	"Poly1305 for x86_64, CRYPTOGAMS by <appro\@openssl.org>"
+++.align	16
+++___
++ 
++ my ($ctx,$inp,$len,$padbit)=("%rdi","%rsi","%rdx","%rcx");
++ my ($mac,$nonce)=($inp,$len);	# *_emit arguments
++-my ($d1,$d2,$d3, $r0,$r1,$s1)=map("%r$_",(8..13));
++-my ($h0,$h1,$h2)=("%r14","%rbx","%rbp");
+++my ($d1,$d2,$d3, $r0,$r1,$s1)=("%r8","%r9","%rdi","%r11","%r12","%r13");
+++my ($h0,$h1,$h2)=("%r14","%rbx","%r10");
++ 
++ sub poly1305_iteration {
++ # input:	copy of $r1 in %rax, $h0-$h2, $r0-$r1
++@@ -155,19 +233,19 @@ ___
++ 
++ $code.=<<___;
++ .text
++-
+++___
+++$code.=<<___ if (!$kernel);
++ .extern	OPENSSL_ia32cap_P
++ 
++-.globl	poly1305_init
++-.hidden	poly1305_init
++-.globl	poly1305_blocks
++-.hidden	poly1305_blocks
++-.globl	poly1305_emit
++-.hidden	poly1305_emit
++-
++-.type	poly1305_init,\@function,3
++-.align	32
++-poly1305_init:
+++.globl	poly1305_init_x86_64
+++.hidden	poly1305_init_x86_64
+++.globl	poly1305_blocks_x86_64
+++.hidden	poly1305_blocks_x86_64
+++.globl	poly1305_emit_x86_64
+++.hidden	poly1305_emit_x86_64
+++___
+++&declare_function("poly1305_init_x86_64", 32, 3);
+++$code.=<<___;
++ 	xor	%rax,%rax
++ 	mov	%rax,0($ctx)		# initialize hash value
++ 	mov	%rax,8($ctx)
++@@ -175,11 +253,12 @@ poly1305_init:
++ 
++ 	cmp	\$0,$inp
++ 	je	.Lno_key
++-
++-	lea	poly1305_blocks(%rip),%r10
++-	lea	poly1305_emit(%rip),%r11
++ ___
++-$code.=<<___	if ($avx);
+++$code.=<<___ if (!$kernel);
+++	lea	poly1305_blocks_x86_64(%rip),%r10
+++	lea	poly1305_emit_x86_64(%rip),%r11
+++___
+++$code.=<<___	if (!$kernel && $avx);
++ 	mov	OPENSSL_ia32cap_P+4(%rip),%r9
++ 	lea	poly1305_blocks_avx(%rip),%rax
++ 	lea	poly1305_emit_avx(%rip),%rcx
++@@ -187,12 +266,12 @@ $code.=<<___	if ($avx);
++ 	cmovc	%rax,%r10
++ 	cmovc	%rcx,%r11
++ ___
++-$code.=<<___	if ($avx>1);
+++$code.=<<___	if (!$kernel && $avx>1);
++ 	lea	poly1305_blocks_avx2(%rip),%rax
++ 	bt	\$`5+32`,%r9		# AVX2?
++ 	cmovc	%rax,%r10
++ ___
++-$code.=<<___	if ($avx>3);
+++$code.=<<___	if (!$kernel && $avx>3);
++ 	mov	\$`(1<<31|1<<21|1<<16)`,%rax
++ 	shr	\$32,%r9
++ 	and	%rax,%r9
++@@ -207,11 +286,11 @@ $code.=<<___;
++ 	mov	%rax,24($ctx)
++ 	mov	%rcx,32($ctx)
++ ___
++-$code.=<<___	if ($flavour !~ /elf32/);
+++$code.=<<___	if (!$kernel && $flavour !~ /elf32/);
++ 	mov	%r10,0(%rdx)
++ 	mov	%r11,8(%rdx)
++ ___
++-$code.=<<___	if ($flavour =~ /elf32/);
+++$code.=<<___	if (!$kernel && $flavour =~ /elf32/);
++ 	mov	%r10d,0(%rdx)
++ 	mov	%r11d,4(%rdx)
++ ___
++@@ -219,11 +298,11 @@ $code.=<<___;
++ 	mov	\$1,%eax
++ .Lno_key:
++ 	ret
++-.size	poly1305_init,.-poly1305_init
+++___
+++&end_function("poly1305_init_x86_64");
++ 
++-.type	poly1305_blocks,\@function,4
++-.align	32
++-poly1305_blocks:
+++&declare_function("poly1305_blocks_x86_64", 32, 4);
+++$code.=<<___;
++ .cfi_startproc
++ .Lblocks:
++ 	shr	\$4,$len
++@@ -231,8 +310,6 @@ poly1305_blocks:
++ 
++ 	push	%rbx
++ .cfi_push	%rbx
++-	push	%rbp
++-.cfi_push	%rbp
++ 	push	%r12
++ .cfi_push	%r12
++ 	push	%r13
++@@ -241,6 +318,8 @@ poly1305_blocks:
++ .cfi_push	%r14
++ 	push	%r15
++ .cfi_push	%r15
+++	push	$ctx
+++.cfi_push	$ctx
++ .Lblocks_body:
++ 
++ 	mov	$len,%r15		# reassign $len
++@@ -265,26 +344,29 @@ poly1305_blocks:
++ 	lea	16($inp),$inp
++ 	adc	$padbit,$h2
++ ___
+++
++ 	&poly1305_iteration();
+++
++ $code.=<<___;
++ 	mov	$r1,%rax
++ 	dec	%r15			# len-=16
++ 	jnz	.Loop
++ 
+++	mov	0(%rsp),$ctx
+++.cfi_restore	$ctx
+++
++ 	mov	$h0,0($ctx)		# store hash value
++ 	mov	$h1,8($ctx)
++ 	mov	$h2,16($ctx)
++ 
++-	mov	0(%rsp),%r15
+++	mov	8(%rsp),%r15
++ .cfi_restore	%r15
++-	mov	8(%rsp),%r14
+++	mov	16(%rsp),%r14
++ .cfi_restore	%r14
++-	mov	16(%rsp),%r13
+++	mov	24(%rsp),%r13
++ .cfi_restore	%r13
++-	mov	24(%rsp),%r12
+++	mov	32(%rsp),%r12
++ .cfi_restore	%r12
++-	mov	32(%rsp),%rbp
++-.cfi_restore	%rbp
++ 	mov	40(%rsp),%rbx
++ .cfi_restore	%rbx
++ 	lea	48(%rsp),%rsp
++@@ -293,11 +375,11 @@ $code.=<<___;
++ .Lblocks_epilogue:
++ 	ret
++ .cfi_endproc
++-.size	poly1305_blocks,.-poly1305_blocks
+++___
+++&end_function("poly1305_blocks_x86_64");
++ 
++-.type	poly1305_emit,\@function,3
++-.align	32
++-poly1305_emit:
+++&declare_function("poly1305_emit_x86_64", 32, 3);
+++$code.=<<___;
++ .Lemit:
++ 	mov	0($ctx),%r8	# load hash value
++ 	mov	8($ctx),%r9
++@@ -318,10 +400,14 @@ poly1305_emit:
++ 	mov	%rcx,8($mac)
++ 
++ 	ret
++-.size	poly1305_emit,.-poly1305_emit
++ ___
+++&end_function("poly1305_emit_x86_64");
++ if ($avx) {
++ 
+++if($kernel) {
+++	$code .= "#ifdef CONFIG_AS_AVX\n";
+++}
+++
++ ########################################################################
++ # Layout of opaque area is following.
++ #
++@@ -342,15 +428,19 @@ $code.=<<___;
++ .type	__poly1305_block,\@abi-omnipotent
++ .align	32
++ __poly1305_block:
+++	push $ctx
++ ___
++ 	&poly1305_iteration();
++ $code.=<<___;
+++	pop $ctx
++ 	ret
++ .size	__poly1305_block,.-__poly1305_block
++ 
++ .type	__poly1305_init_avx,\@abi-omnipotent
++ .align	32
++ __poly1305_init_avx:
+++	push %rbp
+++	mov %rsp,%rbp
++ 	mov	$r0,$h0
++ 	mov	$r1,$h1
++ 	xor	$h2,$h2
++@@ -507,12 +597,13 @@ __poly1305_init_avx:
++ 	mov	$d1#d,`16*8+8-64`($ctx)
++ 
++ 	lea	-48-64($ctx),$ctx	# size [de-]optimization
+++	pop %rbp
++ 	ret
++ .size	__poly1305_init_avx,.-__poly1305_init_avx
+++___
++ 
++-.type	poly1305_blocks_avx,\@function,4
++-.align	32
++-poly1305_blocks_avx:
+++&declare_function("poly1305_blocks_avx", 32, 4);
+++$code.=<<___;
++ .cfi_startproc
++ 	mov	20($ctx),%r8d		# is_base2_26
++ 	cmp	\$128,$len
++@@ -532,10 +623,11 @@ poly1305_blocks_avx:
++ 	test	\$31,$len
++ 	jz	.Leven_avx
++ 
++-	push	%rbx
++-.cfi_push	%rbx
++ 	push	%rbp
++ .cfi_push	%rbp
+++	mov 	%rsp,%rbp
+++	push	%rbx
+++.cfi_push	%rbx
++ 	push	%r12
++ .cfi_push	%r12
++ 	push	%r13
++@@ -645,20 +737,18 @@ poly1305_blocks_avx:
++ 	mov	$h2#d,16($ctx)
++ .align	16
++ .Ldone_avx:
++-	mov	0(%rsp),%r15
+++	pop 		%r15
++ .cfi_restore	%r15
++-	mov	8(%rsp),%r14
+++	pop 		%r14
++ .cfi_restore	%r14
++-	mov	16(%rsp),%r13
+++	pop 		%r13
++ .cfi_restore	%r13
++-	mov	24(%rsp),%r12
+++	pop 		%r12
++ .cfi_restore	%r12
++-	mov	32(%rsp),%rbp
++-.cfi_restore	%rbp
++-	mov	40(%rsp),%rbx
+++	pop 		%rbx
++ .cfi_restore	%rbx
++-	lea	48(%rsp),%rsp
++-.cfi_adjust_cfa_offset	-48
+++	pop 		%rbp
+++.cfi_restore	%rbp
++ .Lno_data_avx:
++ .Lblocks_avx_epilogue:
++ 	ret
++@@ -667,10 +757,11 @@ poly1305_blocks_avx:
++ .align	32
++ .Lbase2_64_avx:
++ .cfi_startproc
++-	push	%rbx
++-.cfi_push	%rbx
++ 	push	%rbp
++ .cfi_push	%rbp
+++	mov 	%rsp,%rbp
+++	push	%rbx
+++.cfi_push	%rbx
++ 	push	%r12
++ .cfi_push	%r12
++ 	push	%r13
++@@ -736,22 +827,18 @@ poly1305_blocks_avx:
++ 
++ .Lproceed_avx:
++ 	mov	%r15,$len
++-
++-	mov	0(%rsp),%r15
+++	pop 		%r15
++ .cfi_restore	%r15
++-	mov	8(%rsp),%r14
+++	pop 		%r14
++ .cfi_restore	%r14
++-	mov	16(%rsp),%r13
+++	pop 		%r13
++ .cfi_restore	%r13
++-	mov	24(%rsp),%r12
+++	pop 		%r12
++ .cfi_restore	%r12
++-	mov	32(%rsp),%rbp
++-.cfi_restore	%rbp
++-	mov	40(%rsp),%rbx
+++	pop 		%rbx
++ .cfi_restore	%rbx
++-	lea	48(%rsp),%rax
++-	lea	48(%rsp),%rsp
++-.cfi_adjust_cfa_offset	-48
+++	pop 		%rbp
+++.cfi_restore	%rbp
++ .Lbase2_64_avx_epilogue:
++ 	jmp	.Ldo_avx
++ .cfi_endproc
++@@ -768,8 +855,11 @@ poly1305_blocks_avx:
++ .Ldo_avx:
++ ___
++ $code.=<<___	if (!$win64);
+++	lea		8(%rsp),%r10
+++.cfi_def_cfa_register	%r10
+++	and		\$-32,%rsp
+++	sub		\$-8,%rsp
++ 	lea		-0x58(%rsp),%r11
++-.cfi_def_cfa		%r11,0x60
++ 	sub		\$0x178,%rsp
++ ___
++ $code.=<<___	if ($win64);
++@@ -1361,18 +1451,18 @@ $code.=<<___	if ($win64);
++ .Ldo_avx_epilogue:
++ ___
++ $code.=<<___	if (!$win64);
++-	lea		0x58(%r11),%rsp
++-.cfi_def_cfa		%rsp,8
+++	lea		-8(%r10),%rsp
+++.cfi_def_cfa_register	%rsp
++ ___
++ $code.=<<___;
++ 	vzeroupper
++ 	ret
++ .cfi_endproc
++-.size	poly1305_blocks_avx,.-poly1305_blocks_avx
+++___
+++&end_function("poly1305_blocks_avx");
++ 
++-.type	poly1305_emit_avx,\@function,3
++-.align	32
++-poly1305_emit_avx:
+++&declare_function("poly1305_emit_avx", 32, 3);
+++$code.=<<___;
++ 	cmpl	\$0,20($ctx)	# is_base2_26?
++ 	je	.Lemit
++ 
++@@ -1423,41 +1513,51 @@ poly1305_emit_avx:
++ 	mov	%rcx,8($mac)
++ 
++ 	ret
++-.size	poly1305_emit_avx,.-poly1305_emit_avx
++ ___
+++&end_function("poly1305_emit_avx");
+++
+++if ($kernel) {
+++	$code .= "#endif\n";
+++}
++ 
++ if ($avx>1) {
+++
+++if ($kernel) {
+++	$code .= "#ifdef CONFIG_AS_AVX2\n";
+++}
+++
++ my ($H0,$H1,$H2,$H3,$H4, $MASK, $T4,$T0,$T1,$T2,$T3, $D0,$D1,$D2,$D3,$D4) =
++     map("%ymm$_",(0..15));
++ my $S4=$MASK;
++ 
+++sub poly1305_blocks_avxN {
+++	my ($avx512) = @_;
+++	my $suffix = $avx512 ? "_avx512" : "";
++ $code.=<<___;
++-.type	poly1305_blocks_avx2,\@function,4
++-.align	32
++-poly1305_blocks_avx2:
++ .cfi_startproc
++ 	mov	20($ctx),%r8d		# is_base2_26
++ 	cmp	\$128,$len
++-	jae	.Lblocks_avx2
+++	jae	.Lblocks_avx2$suffix
++ 	test	%r8d,%r8d
++ 	jz	.Lblocks
++ 
++-.Lblocks_avx2:
+++.Lblocks_avx2$suffix:
++ 	and	\$-16,$len
++-	jz	.Lno_data_avx2
+++	jz	.Lno_data_avx2$suffix
++ 
++ 	vzeroupper
++ 
++ 	test	%r8d,%r8d
++-	jz	.Lbase2_64_avx2
+++	jz	.Lbase2_64_avx2$suffix
++ 
++ 	test	\$63,$len
++-	jz	.Leven_avx2
+++	jz	.Leven_avx2$suffix
++ 
++-	push	%rbx
++-.cfi_push	%rbx
++ 	push	%rbp
++ .cfi_push	%rbp
+++	mov 	%rsp,%rbp
+++	push	%rbx
+++.cfi_push	%rbx
++ 	push	%r12
++ .cfi_push	%r12
++ 	push	%r13
++@@ -1466,7 +1566,7 @@ poly1305_blocks_avx2:
++ .cfi_push	%r14
++ 	push	%r15
++ .cfi_push	%r15
++-.Lblocks_avx2_body:
+++.Lblocks_avx2_body$suffix:
++ 
++ 	mov	$len,%r15		# reassign $len
++ 
++@@ -1513,7 +1613,7 @@ poly1305_blocks_avx2:
++ 	shr	\$2,$s1
++ 	add	$r1,$s1			# s1 = r1 + (r1 >> 2)
++ 
++-.Lbase2_26_pre_avx2:
+++.Lbase2_26_pre_avx2$suffix:
++ 	add	0($inp),$h0		# accumulate input
++ 	adc	8($inp),$h1
++ 	lea	16($inp),$inp
++@@ -1524,10 +1624,10 @@ poly1305_blocks_avx2:
++ 	mov	$r1,%rax
++ 
++ 	test	\$63,%r15
++-	jnz	.Lbase2_26_pre_avx2
+++	jnz	.Lbase2_26_pre_avx2$suffix
++ 
++ 	test	$padbit,$padbit		# if $padbit is zero,
++-	jz	.Lstore_base2_64_avx2	# store hash in base 2^64 format
+++	jz	.Lstore_base2_64_avx2$suffix	# store hash in base 2^64 format
++ 
++ 	################################# base 2^64 -> base 2^26
++ 	mov	$h0,%rax
++@@ -1548,57 +1648,56 @@ poly1305_blocks_avx2:
++ 	or	$r1,$h2			# h[4]
++ 
++ 	test	%r15,%r15
++-	jz	.Lstore_base2_26_avx2
+++	jz	.Lstore_base2_26_avx2$suffix
++ 
++ 	vmovd	%rax#d,%x#$H0
++ 	vmovd	%rdx#d,%x#$H1
++ 	vmovd	$h0#d,%x#$H2
++ 	vmovd	$h1#d,%x#$H3
++ 	vmovd	$h2#d,%x#$H4
++-	jmp	.Lproceed_avx2
+++	jmp	.Lproceed_avx2$suffix
++ 
++ .align	32
++-.Lstore_base2_64_avx2:
+++.Lstore_base2_64_avx2$suffix:
++ 	mov	$h0,0($ctx)
++ 	mov	$h1,8($ctx)
++ 	mov	$h2,16($ctx)		# note that is_base2_26 is zeroed
++-	jmp	.Ldone_avx2
+++	jmp	.Ldone_avx2$suffix
++ 
++ .align	16
++-.Lstore_base2_26_avx2:
+++.Lstore_base2_26_avx2$suffix:
++ 	mov	%rax#d,0($ctx)		# store hash value base 2^26
++ 	mov	%rdx#d,4($ctx)
++ 	mov	$h0#d,8($ctx)
++ 	mov	$h1#d,12($ctx)
++ 	mov	$h2#d,16($ctx)
++ .align	16
++-.Ldone_avx2:
++-	mov	0(%rsp),%r15
+++.Ldone_avx2$suffix:
+++	pop 		%r15
++ .cfi_restore	%r15
++-	mov	8(%rsp),%r14
+++	pop 		%r14
++ .cfi_restore	%r14
++-	mov	16(%rsp),%r13
+++	pop 		%r13
++ .cfi_restore	%r13
++-	mov	24(%rsp),%r12
+++	pop 		%r12
++ .cfi_restore	%r12
++-	mov	32(%rsp),%rbp
++-.cfi_restore	%rbp
++-	mov	40(%rsp),%rbx
+++	pop 		%rbx
++ .cfi_restore	%rbx
++-	lea	48(%rsp),%rsp
++-.cfi_adjust_cfa_offset	-48
++-.Lno_data_avx2:
++-.Lblocks_avx2_epilogue:
+++	pop 		%rbp
+++.cfi_restore 	%rbp
+++.Lno_data_avx2$suffix:
+++.Lblocks_avx2_epilogue$suffix:
++ 	ret
++ .cfi_endproc
++ 
++ .align	32
++-.Lbase2_64_avx2:
+++.Lbase2_64_avx2$suffix:
++ .cfi_startproc
++-	push	%rbx
++-.cfi_push	%rbx
++ 	push	%rbp
++ .cfi_push	%rbp
+++	mov 	%rsp,%rbp
+++	push	%rbx
+++.cfi_push	%rbx
++ 	push	%r12
++ .cfi_push	%r12
++ 	push	%r13
++@@ -1607,7 +1706,7 @@ poly1305_blocks_avx2:
++ .cfi_push	%r14
++ 	push	%r15
++ .cfi_push	%r15
++-.Lbase2_64_avx2_body:
+++.Lbase2_64_avx2_body$suffix:
++ 
++ 	mov	$len,%r15		# reassign $len
++ 
++@@ -1624,9 +1723,9 @@ poly1305_blocks_avx2:
++ 	add	$r1,$s1			# s1 = r1 + (r1 >> 2)
++ 
++ 	test	\$63,$len
++-	jz	.Linit_avx2
+++	jz	.Linit_avx2$suffix
++ 
++-.Lbase2_64_pre_avx2:
+++.Lbase2_64_pre_avx2$suffix:
++ 	add	0($inp),$h0		# accumulate input
++ 	adc	8($inp),$h1
++ 	lea	16($inp),$inp
++@@ -1637,9 +1736,9 @@ poly1305_blocks_avx2:
++ 	mov	$r1,%rax
++ 
++ 	test	\$63,%r15
++-	jnz	.Lbase2_64_pre_avx2
+++	jnz	.Lbase2_64_pre_avx2$suffix
++ 
++-.Linit_avx2:
+++.Linit_avx2$suffix:
++ 	################################# base 2^64 -> base 2^26
++ 	mov	$h0,%rax
++ 	mov	$h0,%rdx
++@@ -1667,69 +1766,77 @@ poly1305_blocks_avx2:
++ 
++ 	call	__poly1305_init_avx
++ 
++-.Lproceed_avx2:
+++.Lproceed_avx2$suffix:
++ 	mov	%r15,$len			# restore $len
++-	mov	OPENSSL_ia32cap_P+8(%rip),%r10d
+++___
+++$code.=<<___ if (!$kernel);
+++	mov	OPENSSL_ia32cap_P+8(%rip),%r9d
++ 	mov	\$`(1<<31|1<<30|1<<16)`,%r11d
++-
++-	mov	0(%rsp),%r15
+++___
+++$code.=<<___;
+++	pop 		%r15
++ .cfi_restore	%r15
++-	mov	8(%rsp),%r14
+++	pop 		%r14
++ .cfi_restore	%r14
++-	mov	16(%rsp),%r13
+++	pop 		%r13
++ .cfi_restore	%r13
++-	mov	24(%rsp),%r12
+++	pop 		%r12
++ .cfi_restore	%r12
++-	mov	32(%rsp),%rbp
++-.cfi_restore	%rbp
++-	mov	40(%rsp),%rbx
+++	pop 		%rbx
++ .cfi_restore	%rbx
++-	lea	48(%rsp),%rax
++-	lea	48(%rsp),%rsp
++-.cfi_adjust_cfa_offset	-48
++-.Lbase2_64_avx2_epilogue:
++-	jmp	.Ldo_avx2
+++	pop 		%rbp
+++.cfi_restore 	%rbp
+++.Lbase2_64_avx2_epilogue$suffix:
+++	jmp	.Ldo_avx2$suffix
++ .cfi_endproc
++ 
++ .align	32
++-.Leven_avx2:
+++.Leven_avx2$suffix:
++ .cfi_startproc
++-	mov		OPENSSL_ia32cap_P+8(%rip),%r10d
+++___
+++$code.=<<___ if (!$kernel);
+++	mov		OPENSSL_ia32cap_P+8(%rip),%r9d
+++___
+++$code.=<<___;
++ 	vmovd		4*0($ctx),%x#$H0	# load hash value base 2^26
++ 	vmovd		4*1($ctx),%x#$H1
++ 	vmovd		4*2($ctx),%x#$H2
++ 	vmovd		4*3($ctx),%x#$H3
++ 	vmovd		4*4($ctx),%x#$H4
++ 
++-.Ldo_avx2:
+++.Ldo_avx2$suffix:
++ ___
++-$code.=<<___		if ($avx>2);
+++$code.=<<___		if (!$kernel && $avx>2);
++ 	cmp		\$512,$len
++ 	jb		.Lskip_avx512
++-	and		%r11d,%r10d
++-	test		\$`1<<16`,%r10d		# check for AVX512F
+++	and		%r11d,%r9d
+++	test		\$`1<<16`,%r9d		# check for AVX512F
++ 	jnz		.Lblocks_avx512
++-.Lskip_avx512:
+++.Lskip_avx512$suffix:
+++___
+++$code.=<<___ if ($avx > 2 && $avx512 && $kernel);
+++	cmp		\$512,$len
+++	jae		.Lblocks_avx512
++ ___
++ $code.=<<___	if (!$win64);
++-	lea		-8(%rsp),%r11
++-.cfi_def_cfa		%r11,16
+++	lea		8(%rsp),%r10
+++.cfi_def_cfa_register	%r10
++ 	sub		\$0x128,%rsp
++ ___
++ $code.=<<___	if ($win64);
++-	lea		-0xf8(%rsp),%r11
+++	lea		8(%rsp),%r10
++ 	sub		\$0x1c8,%rsp
++-	vmovdqa		%xmm6,0x50(%r11)
++-	vmovdqa		%xmm7,0x60(%r11)
++-	vmovdqa		%xmm8,0x70(%r11)
++-	vmovdqa		%xmm9,0x80(%r11)
++-	vmovdqa		%xmm10,0x90(%r11)
++-	vmovdqa		%xmm11,0xa0(%r11)
++-	vmovdqa		%xmm12,0xb0(%r11)
++-	vmovdqa		%xmm13,0xc0(%r11)
++-	vmovdqa		%xmm14,0xd0(%r11)
++-	vmovdqa		%xmm15,0xe0(%r11)
++-.Ldo_avx2_body:
+++	vmovdqa		%xmm6,-0xb0(%r10)
+++	vmovdqa		%xmm7,-0xa0(%r10)
+++	vmovdqa		%xmm8,-0x90(%r10)
+++	vmovdqa		%xmm9,-0x80(%r10)
+++	vmovdqa		%xmm10,-0x70(%r10)
+++	vmovdqa		%xmm11,-0x60(%r10)
+++	vmovdqa		%xmm12,-0x50(%r10)
+++	vmovdqa		%xmm13,-0x40(%r10)
+++	vmovdqa		%xmm14,-0x30(%r10)
+++	vmovdqa		%xmm15,-0x20(%r10)
+++.Ldo_avx2_body$suffix:
++ ___
++ $code.=<<___;
++ 	lea		.Lconst(%rip),%rcx
++@@ -1794,11 +1901,11 @@ $code.=<<___;
++ 
++ 	vpaddq		$H2,$T2,$H2		# accumulate input
++ 	sub		\$64,$len
++-	jz		.Ltail_avx2
++-	jmp		.Loop_avx2
+++	jz		.Ltail_avx2$suffix
+++	jmp		.Loop_avx2$suffix
++ 
++ .align	32
++-.Loop_avx2:
+++.Loop_avx2$suffix:
++ 	################################################################
++ 	# ((inp[0]*r^4+inp[4])*r^4+inp[ 8])*r^4
++ 	# ((inp[1]*r^4+inp[5])*r^4+inp[ 9])*r^3
++@@ -1946,10 +2053,10 @@ $code.=<<___;
++ 	 vpor		32(%rcx),$T4,$T4	# padbit, yes, always
++ 
++ 	sub		\$64,$len
++-	jnz		.Loop_avx2
+++	jnz		.Loop_avx2$suffix
++ 
++ 	.byte		0x66,0x90
++-.Ltail_avx2:
+++.Ltail_avx2$suffix:
++ 	################################################################
++ 	# while above multiplications were by r^4 in all lanes, in last
++ 	# iteration we multiply least significant lane by r^4 and most
++@@ -2087,37 +2194,29 @@ $code.=<<___;
++ 	vmovd		%x#$H4,`4*4-48-64`($ctx)
++ ___
++ $code.=<<___	if ($win64);
++-	vmovdqa		0x50(%r11),%xmm6
++-	vmovdqa		0x60(%r11),%xmm7
++-	vmovdqa		0x70(%r11),%xmm8
++-	vmovdqa		0x80(%r11),%xmm9
++-	vmovdqa		0x90(%r11),%xmm10
++-	vmovdqa		0xa0(%r11),%xmm11
++-	vmovdqa		0xb0(%r11),%xmm12
++-	vmovdqa		0xc0(%r11),%xmm13
++-	vmovdqa		0xd0(%r11),%xmm14
++-	vmovdqa		0xe0(%r11),%xmm15
++-	lea		0xf8(%r11),%rsp
++-.Ldo_avx2_epilogue:
+++	vmovdqa		-0xb0(%r10),%xmm6
+++	vmovdqa		-0xa0(%r10),%xmm7
+++	vmovdqa		-0x90(%r10),%xmm8
+++	vmovdqa		-0x80(%r10),%xmm9
+++	vmovdqa		-0x70(%r10),%xmm10
+++	vmovdqa		-0x60(%r10),%xmm11
+++	vmovdqa		-0x50(%r10),%xmm12
+++	vmovdqa		-0x40(%r10),%xmm13
+++	vmovdqa		-0x30(%r10),%xmm14
+++	vmovdqa		-0x20(%r10),%xmm15
+++	lea		-8(%r10),%rsp
+++.Ldo_avx2_epilogue$suffix:
++ ___
++ $code.=<<___	if (!$win64);
++-	lea		8(%r11),%rsp
++-.cfi_def_cfa		%rsp,8
+++	lea		-8(%r10),%rsp
+++.cfi_def_cfa_register	%rsp
++ ___
++ $code.=<<___;
++ 	vzeroupper
++ 	ret
++ .cfi_endproc
++-.size	poly1305_blocks_avx2,.-poly1305_blocks_avx2
++ ___
++-#######################################################################
++-if ($avx>2) {
++-# On entry we have input length divisible by 64. But since inner loop
++-# processes 128 bytes per iteration, cases when length is not divisible
++-# by 128 are handled by passing tail 64 bytes to .Ltail_avx2. For this
++-# reason stack layout is kept identical to poly1305_blocks_avx2. If not
++-# for this tail, we wouldn't have to even allocate stack frame...
++-
+++if($avx > 2 && $avx512) {
++ my ($R0,$R1,$R2,$R3,$R4, $S1,$S2,$S3,$S4) = map("%zmm$_",(16..24));
++ my ($M0,$M1,$M2,$M3,$M4) = map("%zmm$_",(25..29));
++ my $PADBIT="%zmm30";
++@@ -2128,32 +2227,29 @@ map(s/%y/%z/,($H0,$H1,$H2,$H3,$H4));
++ map(s/%y/%z/,($MASK));
++ 
++ $code.=<<___;
++-.type	poly1305_blocks_avx512,\@function,4
++-.align	32
++-poly1305_blocks_avx512:
++ .cfi_startproc
++ .Lblocks_avx512:
++ 	mov		\$15,%eax
++ 	kmovw		%eax,%k2
++ ___
++ $code.=<<___	if (!$win64);
++-	lea		-8(%rsp),%r11
++-.cfi_def_cfa		%r11,16
+++	lea		8(%rsp),%r10
+++.cfi_def_cfa_register	%r10
++ 	sub		\$0x128,%rsp
++ ___
++ $code.=<<___	if ($win64);
++-	lea		-0xf8(%rsp),%r11
+++	lea		8(%rsp),%r10
++ 	sub		\$0x1c8,%rsp
++-	vmovdqa		%xmm6,0x50(%r11)
++-	vmovdqa		%xmm7,0x60(%r11)
++-	vmovdqa		%xmm8,0x70(%r11)
++-	vmovdqa		%xmm9,0x80(%r11)
++-	vmovdqa		%xmm10,0x90(%r11)
++-	vmovdqa		%xmm11,0xa0(%r11)
++-	vmovdqa		%xmm12,0xb0(%r11)
++-	vmovdqa		%xmm13,0xc0(%r11)
++-	vmovdqa		%xmm14,0xd0(%r11)
++-	vmovdqa		%xmm15,0xe0(%r11)
+++	vmovdqa		%xmm6,-0xb0(%r10)
+++	vmovdqa		%xmm7,-0xa0(%r10)
+++	vmovdqa		%xmm8,-0x90(%r10)
+++	vmovdqa		%xmm9,-0x80(%r10)
+++	vmovdqa		%xmm10,-0x70(%r10)
+++	vmovdqa		%xmm11,-0x60(%r10)
+++	vmovdqa		%xmm12,-0x50(%r10)
+++	vmovdqa		%xmm13,-0x40(%r10)
+++	vmovdqa		%xmm14,-0x30(%r10)
+++	vmovdqa		%xmm15,-0x20(%r10)
++ .Ldo_avx512_body:
++ ___
++ $code.=<<___;
++@@ -2679,7 +2775,7 @@ $code.=<<___;
++ 
++ 	lea		0x90(%rsp),%rax		# size optimization for .Ltail_avx2
++ 	add		\$64,$len
++-	jnz		.Ltail_avx2
+++	jnz		.Ltail_avx2$suffix
++ 
++ 	vpsubq		$T2,$H2,$H2		# undo input accumulation
++ 	vmovd		%x#$H0,`4*0-48-64`($ctx)# save partially reduced
++@@ -2690,29 +2786,61 @@ $code.=<<___;
++ 	vzeroall
++ ___
++ $code.=<<___	if ($win64);
++-	movdqa		0x50(%r11),%xmm6
++-	movdqa		0x60(%r11),%xmm7
++-	movdqa		0x70(%r11),%xmm8
++-	movdqa		0x80(%r11),%xmm9
++-	movdqa		0x90(%r11),%xmm10
++-	movdqa		0xa0(%r11),%xmm11
++-	movdqa		0xb0(%r11),%xmm12
++-	movdqa		0xc0(%r11),%xmm13
++-	movdqa		0xd0(%r11),%xmm14
++-	movdqa		0xe0(%r11),%xmm15
++-	lea		0xf8(%r11),%rsp
+++	movdqa		-0xb0(%r10),%xmm6
+++	movdqa		-0xa0(%r10),%xmm7
+++	movdqa		-0x90(%r10),%xmm8
+++	movdqa		-0x80(%r10),%xmm9
+++	movdqa		-0x70(%r10),%xmm10
+++	movdqa		-0x60(%r10),%xmm11
+++	movdqa		-0x50(%r10),%xmm12
+++	movdqa		-0x40(%r10),%xmm13
+++	movdqa		-0x30(%r10),%xmm14
+++	movdqa		-0x20(%r10),%xmm15
+++	lea		-8(%r10),%rsp
++ .Ldo_avx512_epilogue:
++ ___
++ $code.=<<___	if (!$win64);
++-	lea		8(%r11),%rsp
++-.cfi_def_cfa		%rsp,8
+++	lea		-8(%r10),%rsp
+++.cfi_def_cfa_register	%rsp
++ ___
++ $code.=<<___;
++ 	ret
++ .cfi_endproc
++-.size	poly1305_blocks_avx512,.-poly1305_blocks_avx512
++ ___
++-if ($avx>3) {
+++
+++}
+++
+++}
+++
+++&declare_function("poly1305_blocks_avx2", 32, 4);
+++poly1305_blocks_avxN(0);
+++&end_function("poly1305_blocks_avx2");
+++
+++if($kernel) {
+++	$code .= "#endif\n";
+++}
+++
+++#######################################################################
+++if ($avx>2) {
+++# On entry we have input length divisible by 64. But since inner loop
+++# processes 128 bytes per iteration, cases when length is not divisible
+++# by 128 are handled by passing tail 64 bytes to .Ltail_avx2. For this
+++# reason stack layout is kept identical to poly1305_blocks_avx2. If not
+++# for this tail, we wouldn't have to even allocate stack frame...
+++
+++if($kernel) {
+++	$code .= "#ifdef CONFIG_AS_AVX512\n";
+++}
+++
+++&declare_function("poly1305_blocks_avx512", 32, 4);
+++poly1305_blocks_avxN(1);
+++&end_function("poly1305_blocks_avx512");
+++
+++if ($kernel) {
+++	$code .= "#endif\n";
+++}
+++
+++if (!$kernel && $avx>3) {
++ ########################################################################
++ # VPMADD52 version using 2^44 radix.
++ #
++@@ -3753,45 +3881,9 @@ poly1305_emit_base2_44:
++ .size	poly1305_emit_base2_44,.-poly1305_emit_base2_44
++ ___
++ }	}	}
++-$code.=<<___;
++-.align	64
++-.Lconst:
++-.Lmask24:
++-.long	0x0ffffff,0,0x0ffffff,0,0x0ffffff,0,0x0ffffff,0
++-.L129:
++-.long	`1<<24`,0,`1<<24`,0,`1<<24`,0,`1<<24`,0
++-.Lmask26:
++-.long	0x3ffffff,0,0x3ffffff,0,0x3ffffff,0,0x3ffffff,0
++-.Lpermd_avx2:
++-.long	2,2,2,3,2,0,2,1
++-.Lpermd_avx512:
++-.long	0,0,0,1, 0,2,0,3, 0,4,0,5, 0,6,0,7
++-
++-.L2_44_inp_permd:
++-.long	0,1,1,2,2,3,7,7
++-.L2_44_inp_shift:
++-.quad	0,12,24,64
++-.L2_44_mask:
++-.quad	0xfffffffffff,0xfffffffffff,0x3ffffffffff,0xffffffffffffffff
++-.L2_44_shift_rgt:
++-.quad	44,44,42,64
++-.L2_44_shift_lft:
++-.quad	8,8,10,64
++-
++-.align	64
++-.Lx_mask44:
++-.quad	0xfffffffffff,0xfffffffffff,0xfffffffffff,0xfffffffffff
++-.quad	0xfffffffffff,0xfffffffffff,0xfffffffffff,0xfffffffffff
++-.Lx_mask42:
++-.quad	0x3ffffffffff,0x3ffffffffff,0x3ffffffffff,0x3ffffffffff
++-.quad	0x3ffffffffff,0x3ffffffffff,0x3ffffffffff,0x3ffffffffff
++-___
++ }
++-$code.=<<___;
++-.asciz	"Poly1305 for x86_64, CRYPTOGAMS by <appro\@openssl.org>"
++-.align	16
++-___
++ 
+++if (!$kernel)
++ {	# chacha20-poly1305 helpers
++ my ($out,$inp,$otp,$len)=$win64 ? ("%rcx","%rdx","%r8", "%r9") :  # Win64 order
++                                   ("%rdi","%rsi","%rdx","%rcx");  # Unix order
++@@ -4038,17 +4130,17 @@ avx_handler:
++ 
++ .section	.pdata
++ .align	4
++-	.rva	.LSEH_begin_poly1305_init
++-	.rva	.LSEH_end_poly1305_init
++-	.rva	.LSEH_info_poly1305_init
++-
++-	.rva	.LSEH_begin_poly1305_blocks
++-	.rva	.LSEH_end_poly1305_blocks
++-	.rva	.LSEH_info_poly1305_blocks
++-
++-	.rva	.LSEH_begin_poly1305_emit
++-	.rva	.LSEH_end_poly1305_emit
++-	.rva	.LSEH_info_poly1305_emit
+++	.rva	.LSEH_begin_poly1305_init_x86_64
+++	.rva	.LSEH_end_poly1305_init_x86_64
+++	.rva	.LSEH_info_poly1305_init_x86_64
+++
+++	.rva	.LSEH_begin_poly1305_blocks_x86_64
+++	.rva	.LSEH_end_poly1305_blocks_x86_64
+++	.rva	.LSEH_info_poly1305_blocks_x86_64
+++
+++	.rva	.LSEH_begin_poly1305_emit_x86_64
+++	.rva	.LSEH_end_poly1305_emit_x86_64
+++	.rva	.LSEH_info_poly1305_emit_x86_64
++ ___
++ $code.=<<___ if ($avx);
++ 	.rva	.LSEH_begin_poly1305_blocks_avx
++@@ -4088,20 +4180,20 @@ ___
++ $code.=<<___;
++ .section	.xdata
++ .align	8
++-.LSEH_info_poly1305_init:
+++.LSEH_info_poly1305_init_x86_64:
++ 	.byte	9,0,0,0
++ 	.rva	se_handler
++-	.rva	.LSEH_begin_poly1305_init,.LSEH_begin_poly1305_init
+++	.rva	.LSEH_begin_poly1305_init_x86_64,.LSEH_begin_poly1305_init_x86_64
++ 
++-.LSEH_info_poly1305_blocks:
+++.LSEH_info_poly1305_blocks_x86_64:
++ 	.byte	9,0,0,0
++ 	.rva	se_handler
++ 	.rva	.Lblocks_body,.Lblocks_epilogue
++ 
++-.LSEH_info_poly1305_emit:
+++.LSEH_info_poly1305_emit_x86_64:
++ 	.byte	9,0,0,0
++ 	.rva	se_handler
++-	.rva	.LSEH_begin_poly1305_emit,.LSEH_begin_poly1305_emit
+++	.rva	.LSEH_begin_poly1305_emit_x86_64,.LSEH_begin_poly1305_emit_x86_64
++ ___
++ $code.=<<___ if ($avx);
++ .LSEH_info_poly1305_blocks_avx_1:
++@@ -4148,12 +4240,26 @@ $code.=<<___ if ($avx>2);
++ ___
++ }
++ 
+++open SELF,$0;
+++while(<SELF>) {
+++	next if (/^#!/);
+++	last if (!s/^#/\/\// and !/^$/);
+++	print;
+++}
+++close SELF;
+++
++ foreach (split('\n',$code)) {
++ 	s/\`([^\`]*)\`/eval($1)/ge;
++ 	s/%r([a-z]+)#d/%e$1/g;
++ 	s/%r([0-9]+)#d/%r$1d/g;
++ 	s/%x#%[yz]/%x/g or s/%y#%z/%y/g or s/%z#%[yz]/%z/g;
++ 
+++	if ($kernel) {
+++		s/(^\.type.*),[0-9]+$/\1/;
+++		s/(^\.type.*),\@abi-omnipotent+$/\1,\@function/;
+++		next if /^\.cfi.*/;
+++	}
+++
++ 	print $_,"\n";
++ }
++ close STDOUT;
++--- a/arch/x86/crypto/poly1305_glue.c
+++++ b/arch/x86/crypto/poly1305_glue.c
++@@ -1,8 +1,6 @@
++-// SPDX-License-Identifier: GPL-2.0-or-later
+++// SPDX-License-Identifier: GPL-2.0 OR MIT
++ /*
++- * Poly1305 authenticator algorithm, RFC7539, SIMD glue code
++- *
++- * Copyright (C) 2015 Martin Willi
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
++  */
++ 
++ #include <crypto/algapi.h>
++@@ -13,279 +11,170 @@
++ #include <linux/jump_label.h>
++ #include <linux/kernel.h>
++ #include <linux/module.h>
+++#include <asm/intel-family.h>
++ #include <asm/simd.h>
++ 
++-asmlinkage void poly1305_block_sse2(u32 *h, const u8 *src,
++-				    const u32 *r, unsigned int blocks);
++-asmlinkage void poly1305_2block_sse2(u32 *h, const u8 *src, const u32 *r,
++-				     unsigned int blocks, const u32 *u);
++-asmlinkage void poly1305_4block_avx2(u32 *h, const u8 *src, const u32 *r,
++-				     unsigned int blocks, const u32 *u);
+++asmlinkage void poly1305_init_x86_64(void *ctx,
+++				     const u8 key[POLY1305_KEY_SIZE]);
+++asmlinkage void poly1305_blocks_x86_64(void *ctx, const u8 *inp,
+++				       const size_t len, const u32 padbit);
+++asmlinkage void poly1305_emit_x86_64(void *ctx, u8 mac[POLY1305_DIGEST_SIZE],
+++				     const u32 nonce[4]);
+++asmlinkage void poly1305_emit_avx(void *ctx, u8 mac[POLY1305_DIGEST_SIZE],
+++				  const u32 nonce[4]);
+++asmlinkage void poly1305_blocks_avx(void *ctx, const u8 *inp, const size_t len,
+++				    const u32 padbit);
+++asmlinkage void poly1305_blocks_avx2(void *ctx, const u8 *inp, const size_t len,
+++				     const u32 padbit);
+++asmlinkage void poly1305_blocks_avx512(void *ctx, const u8 *inp,
+++				       const size_t len, const u32 padbit);
++ 
++-static __ro_after_init DEFINE_STATIC_KEY_FALSE(poly1305_use_simd);
+++static __ro_after_init DEFINE_STATIC_KEY_FALSE(poly1305_use_avx);
++ static __ro_after_init DEFINE_STATIC_KEY_FALSE(poly1305_use_avx2);
+++static __ro_after_init DEFINE_STATIC_KEY_FALSE(poly1305_use_avx512);
++ 
++-static inline u64 mlt(u64 a, u64 b)
++-{
++-	return a * b;
++-}
++-
++-static inline u32 sr(u64 v, u_char n)
++-{
++-	return v >> n;
++-}
++-
++-static inline u32 and(u32 v, u32 mask)
++-{
++-	return v & mask;
++-}
++-
++-static void poly1305_simd_mult(u32 *a, const u32 *b)
++-{
++-	u8 m[POLY1305_BLOCK_SIZE];
++-
++-	memset(m, 0, sizeof(m));
++-	/* The poly1305 block function adds a hi-bit to the accumulator which
++-	 * we don't need for key multiplication; compensate for it. */
++-	a[4] -= 1 << 24;
++-	poly1305_block_sse2(a, m, b, 1);
++-}
++-
++-static void poly1305_integer_setkey(struct poly1305_key *key, const u8 *raw_key)
++-{
++-	/* r &= 0xffffffc0ffffffc0ffffffc0fffffff */
++-	key->r[0] = (get_unaligned_le32(raw_key +  0) >> 0) & 0x3ffffff;
++-	key->r[1] = (get_unaligned_le32(raw_key +  3) >> 2) & 0x3ffff03;
++-	key->r[2] = (get_unaligned_le32(raw_key +  6) >> 4) & 0x3ffc0ff;
++-	key->r[3] = (get_unaligned_le32(raw_key +  9) >> 6) & 0x3f03fff;
++-	key->r[4] = (get_unaligned_le32(raw_key + 12) >> 8) & 0x00fffff;
++-}
+++struct poly1305_arch_internal {
+++	union {
+++		struct {
+++			u32 h[5];
+++			u32 is_base2_26;
+++		};
+++		u64 hs[3];
+++	};
+++	u64 r[2];
+++	u64 pad;
+++	struct { u32 r2, r1, r4, r3; } rn[9];
+++};
++ 
++-static void poly1305_integer_blocks(struct poly1305_state *state,
++-				    const struct poly1305_key *key,
++-				    const void *src,
++-				    unsigned int nblocks, u32 hibit)
+++/* The AVX code uses base 2^26, while the scalar code uses base 2^64. If we hit
+++ * the unfortunate situation of using AVX and then having to go back to scalar
+++ * -- because the user is silly and has called the update function from two
+++ * separate contexts -- then we need to convert back to the original base before
+++ * proceeding. It is possible to reason that the initial reduction below is
+++ * sufficient given the implementation invariants. However, for an avoidance of
+++ * doubt and because this is not performance critical, we do the full reduction
+++ * anyway. Z3 proof of below function: https://xn--4db.cc/ltPtHCKN/py
+++ */
+++static void convert_to_base2_64(void *ctx)
++ {
++-	u32 r0, r1, r2, r3, r4;
++-	u32 s1, s2, s3, s4;
++-	u32 h0, h1, h2, h3, h4;
++-	u64 d0, d1, d2, d3, d4;
+++	struct poly1305_arch_internal *state = ctx;
+++	u32 cy;
++ 
++-	if (!nblocks)
+++	if (!state->is_base2_26)
++ 		return;
++ 
++-	r0 = key->r[0];
++-	r1 = key->r[1];
++-	r2 = key->r[2];
++-	r3 = key->r[3];
++-	r4 = key->r[4];
++-
++-	s1 = r1 * 5;
++-	s2 = r2 * 5;
++-	s3 = r3 * 5;
++-	s4 = r4 * 5;
++-
++-	h0 = state->h[0];
++-	h1 = state->h[1];
++-	h2 = state->h[2];
++-	h3 = state->h[3];
++-	h4 = state->h[4];
++-
++-	do {
++-		/* h += m[i] */
++-		h0 += (get_unaligned_le32(src +  0) >> 0) & 0x3ffffff;
++-		h1 += (get_unaligned_le32(src +  3) >> 2) & 0x3ffffff;
++-		h2 += (get_unaligned_le32(src +  6) >> 4) & 0x3ffffff;
++-		h3 += (get_unaligned_le32(src +  9) >> 6) & 0x3ffffff;
++-		h4 += (get_unaligned_le32(src + 12) >> 8) | (hibit << 24);
++-
++-		/* h *= r */
++-		d0 = mlt(h0, r0) + mlt(h1, s4) + mlt(h2, s3) +
++-		     mlt(h3, s2) + mlt(h4, s1);
++-		d1 = mlt(h0, r1) + mlt(h1, r0) + mlt(h2, s4) +
++-		     mlt(h3, s3) + mlt(h4, s2);
++-		d2 = mlt(h0, r2) + mlt(h1, r1) + mlt(h2, r0) +
++-		     mlt(h3, s4) + mlt(h4, s3);
++-		d3 = mlt(h0, r3) + mlt(h1, r2) + mlt(h2, r1) +
++-		     mlt(h3, r0) + mlt(h4, s4);
++-		d4 = mlt(h0, r4) + mlt(h1, r3) + mlt(h2, r2) +
++-		     mlt(h3, r1) + mlt(h4, r0);
++-
++-		/* (partial) h %= p */
++-		d1 += sr(d0, 26);     h0 = and(d0, 0x3ffffff);
++-		d2 += sr(d1, 26);     h1 = and(d1, 0x3ffffff);
++-		d3 += sr(d2, 26);     h2 = and(d2, 0x3ffffff);
++-		d4 += sr(d3, 26);     h3 = and(d3, 0x3ffffff);
++-		h0 += sr(d4, 26) * 5; h4 = and(d4, 0x3ffffff);
++-		h1 += h0 >> 26;       h0 = h0 & 0x3ffffff;
++-
++-		src += POLY1305_BLOCK_SIZE;
++-	} while (--nblocks);
++-
++-	state->h[0] = h0;
++-	state->h[1] = h1;
++-	state->h[2] = h2;
++-	state->h[3] = h3;
++-	state->h[4] = h4;
++-}
++-
++-static void poly1305_integer_emit(const struct poly1305_state *state, void *dst)
++-{
++-	u32 h0, h1, h2, h3, h4;
++-	u32 g0, g1, g2, g3, g4;
++-	u32 mask;
++-
++-	/* fully carry h */
++-	h0 = state->h[0];
++-	h1 = state->h[1];
++-	h2 = state->h[2];
++-	h3 = state->h[3];
++-	h4 = state->h[4];
++-
++-	h2 += (h1 >> 26);     h1 = h1 & 0x3ffffff;
++-	h3 += (h2 >> 26);     h2 = h2 & 0x3ffffff;
++-	h4 += (h3 >> 26);     h3 = h3 & 0x3ffffff;
++-	h0 += (h4 >> 26) * 5; h4 = h4 & 0x3ffffff;
++-	h1 += (h0 >> 26);     h0 = h0 & 0x3ffffff;
++-
++-	/* compute h + -p */
++-	g0 = h0 + 5;
++-	g1 = h1 + (g0 >> 26);             g0 &= 0x3ffffff;
++-	g2 = h2 + (g1 >> 26);             g1 &= 0x3ffffff;
++-	g3 = h3 + (g2 >> 26);             g2 &= 0x3ffffff;
++-	g4 = h4 + (g3 >> 26) - (1 << 26); g3 &= 0x3ffffff;
++-
++-	/* select h if h < p, or h + -p if h >= p */
++-	mask = (g4 >> ((sizeof(u32) * 8) - 1)) - 1;
++-	g0 &= mask;
++-	g1 &= mask;
++-	g2 &= mask;
++-	g3 &= mask;
++-	g4 &= mask;
++-	mask = ~mask;
++-	h0 = (h0 & mask) | g0;
++-	h1 = (h1 & mask) | g1;
++-	h2 = (h2 & mask) | g2;
++-	h3 = (h3 & mask) | g3;
++-	h4 = (h4 & mask) | g4;
++-
++-	/* h = h % (2^128) */
++-	put_unaligned_le32((h0 >>  0) | (h1 << 26), dst +  0);
++-	put_unaligned_le32((h1 >>  6) | (h2 << 20), dst +  4);
++-	put_unaligned_le32((h2 >> 12) | (h3 << 14), dst +  8);
++-	put_unaligned_le32((h3 >> 18) | (h4 <<  8), dst + 12);
++-}
++-
++-void poly1305_init_arch(struct poly1305_desc_ctx *desc, const u8 *key)
++-{
++-	poly1305_integer_setkey(desc->opaque_r, key);
++-	desc->s[0] = get_unaligned_le32(key + 16);
++-	desc->s[1] = get_unaligned_le32(key + 20);
++-	desc->s[2] = get_unaligned_le32(key + 24);
++-	desc->s[3] = get_unaligned_le32(key + 28);
++-	poly1305_core_init(&desc->h);
++-	desc->buflen = 0;
++-	desc->sset = true;
++-	desc->rset = 1;
++-}
++-EXPORT_SYMBOL_GPL(poly1305_init_arch);
++-
++-static unsigned int crypto_poly1305_setdesckey(struct poly1305_desc_ctx *dctx,
++-					       const u8 *src, unsigned int srclen)
++-{
++-	if (!dctx->sset) {
++-		if (!dctx->rset && srclen >= POLY1305_BLOCK_SIZE) {
++-			poly1305_integer_setkey(dctx->r, src);
++-			src += POLY1305_BLOCK_SIZE;
++-			srclen -= POLY1305_BLOCK_SIZE;
++-			dctx->rset = 1;
++-		}
++-		if (srclen >= POLY1305_BLOCK_SIZE) {
++-			dctx->s[0] = get_unaligned_le32(src +  0);
++-			dctx->s[1] = get_unaligned_le32(src +  4);
++-			dctx->s[2] = get_unaligned_le32(src +  8);
++-			dctx->s[3] = get_unaligned_le32(src + 12);
++-			src += POLY1305_BLOCK_SIZE;
++-			srclen -= POLY1305_BLOCK_SIZE;
++-			dctx->sset = true;
++-		}
+++	cy = state->h[0] >> 26; state->h[0] &= 0x3ffffff; state->h[1] += cy;
+++	cy = state->h[1] >> 26; state->h[1] &= 0x3ffffff; state->h[2] += cy;
+++	cy = state->h[2] >> 26; state->h[2] &= 0x3ffffff; state->h[3] += cy;
+++	cy = state->h[3] >> 26; state->h[3] &= 0x3ffffff; state->h[4] += cy;
+++	state->hs[0] = ((u64)state->h[2] << 52) | ((u64)state->h[1] << 26) | state->h[0];
+++	state->hs[1] = ((u64)state->h[4] << 40) | ((u64)state->h[3] << 14) | (state->h[2] >> 12);
+++	state->hs[2] = state->h[4] >> 24;
+++#define ULT(a, b) ((a ^ ((a ^ b) | ((a - b) ^ b))) >> (sizeof(a) * 8 - 1))
+++	cy = (state->hs[2] >> 2) + (state->hs[2] & ~3ULL);
+++	state->hs[2] &= 3;
+++	state->hs[0] += cy;
+++	state->hs[1] += (cy = ULT(state->hs[0], cy));
+++	state->hs[2] += ULT(state->hs[1], cy);
+++#undef ULT
+++	state->is_base2_26 = 0;
+++}
+++
+++static void poly1305_simd_init(void *ctx, const u8 key[POLY1305_KEY_SIZE])
+++{
+++	poly1305_init_x86_64(ctx, key);
+++}
+++
+++static void poly1305_simd_blocks(void *ctx, const u8 *inp, size_t len,
+++				 const u32 padbit)
+++{
+++	struct poly1305_arch_internal *state = ctx;
+++
+++	/* SIMD disables preemption, so relax after processing each page. */
+++	BUILD_BUG_ON(PAGE_SIZE < POLY1305_BLOCK_SIZE ||
+++		     PAGE_SIZE % POLY1305_BLOCK_SIZE);
+++
+++	if (!IS_ENABLED(CONFIG_AS_AVX) || !static_branch_likely(&poly1305_use_avx) ||
+++	    (len < (POLY1305_BLOCK_SIZE * 18) && !state->is_base2_26) ||
+++	    !crypto_simd_usable()) {
+++		convert_to_base2_64(ctx);
+++		poly1305_blocks_x86_64(ctx, inp, len, padbit);
+++		return;
++ 	}
++-	return srclen;
++-}
++ 
++-static unsigned int poly1305_scalar_blocks(struct poly1305_desc_ctx *dctx,
++-					   const u8 *src, unsigned int srclen)
++-{
++-	unsigned int datalen;
+++	for (;;) {
+++		const size_t bytes = min_t(size_t, len, PAGE_SIZE);
++ 
++-	if (unlikely(!dctx->sset)) {
++-		datalen = crypto_poly1305_setdesckey(dctx, src, srclen);
++-		src += srclen - datalen;
++-		srclen = datalen;
++-	}
++-	if (srclen >= POLY1305_BLOCK_SIZE) {
++-		poly1305_integer_blocks(&dctx->h, dctx->opaque_r, src,
++-					srclen / POLY1305_BLOCK_SIZE, 1);
++-		srclen %= POLY1305_BLOCK_SIZE;
+++		kernel_fpu_begin();
+++		if (IS_ENABLED(CONFIG_AS_AVX512) && static_branch_likely(&poly1305_use_avx512))
+++			poly1305_blocks_avx512(ctx, inp, bytes, padbit);
+++		else if (IS_ENABLED(CONFIG_AS_AVX2) && static_branch_likely(&poly1305_use_avx2))
+++			poly1305_blocks_avx2(ctx, inp, bytes, padbit);
+++		else
+++			poly1305_blocks_avx(ctx, inp, bytes, padbit);
+++		kernel_fpu_end();
+++		len -= bytes;
+++		if (!len)
+++			break;
+++		inp += bytes;
++ 	}
++-	return srclen;
++ }
++ 
++-static unsigned int poly1305_simd_blocks(struct poly1305_desc_ctx *dctx,
++-					 const u8 *src, unsigned int srclen)
++-{
++-	unsigned int blocks, datalen;
+++static void poly1305_simd_emit(void *ctx, u8 mac[POLY1305_DIGEST_SIZE],
+++			       const u32 nonce[4])
+++{
+++	struct poly1305_arch_internal *state = ctx;
+++
+++	if (!IS_ENABLED(CONFIG_AS_AVX) || !static_branch_likely(&poly1305_use_avx) ||
+++	    !state->is_base2_26 || !crypto_simd_usable()) {
+++		convert_to_base2_64(ctx);
+++		poly1305_emit_x86_64(ctx, mac, nonce);
+++	} else
+++		poly1305_emit_avx(ctx, mac, nonce);
+++}
+++
+++void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 *key)
+++{
+++	poly1305_simd_init(&dctx->h, key);
+++	dctx->s[0] = get_unaligned_le32(&key[16]);
+++	dctx->s[1] = get_unaligned_le32(&key[20]);
+++	dctx->s[2] = get_unaligned_le32(&key[24]);
+++	dctx->s[3] = get_unaligned_le32(&key[28]);
+++	dctx->buflen = 0;
+++	dctx->sset = true;
+++}
+++EXPORT_SYMBOL(poly1305_init_arch);
++ 
+++static unsigned int crypto_poly1305_setdctxkey(struct poly1305_desc_ctx *dctx,
+++					       const u8 *inp, unsigned int len)
+++{
+++	unsigned int acc = 0;
++ 	if (unlikely(!dctx->sset)) {
++-		datalen = crypto_poly1305_setdesckey(dctx, src, srclen);
++-		src += srclen - datalen;
++-		srclen = datalen;
++-	}
++-
++-	if (IS_ENABLED(CONFIG_AS_AVX2) &&
++-	    static_branch_likely(&poly1305_use_avx2) &&
++-	    srclen >= POLY1305_BLOCK_SIZE * 4) {
++-		if (unlikely(dctx->rset < 4)) {
++-			if (dctx->rset < 2) {
++-				dctx->r[1] = dctx->r[0];
++-				poly1305_simd_mult(dctx->r[1].r, dctx->r[0].r);
++-			}
++-			dctx->r[2] = dctx->r[1];
++-			poly1305_simd_mult(dctx->r[2].r, dctx->r[0].r);
++-			dctx->r[3] = dctx->r[2];
++-			poly1305_simd_mult(dctx->r[3].r, dctx->r[0].r);
++-			dctx->rset = 4;
+++		if (!dctx->rset && len >= POLY1305_BLOCK_SIZE) {
+++			poly1305_simd_init(&dctx->h, inp);
+++			inp += POLY1305_BLOCK_SIZE;
+++			len -= POLY1305_BLOCK_SIZE;
+++			acc += POLY1305_BLOCK_SIZE;
+++			dctx->rset = 1;
++ 		}
++-		blocks = srclen / (POLY1305_BLOCK_SIZE * 4);
++-		poly1305_4block_avx2(dctx->h.h, src, dctx->r[0].r, blocks,
++-				     dctx->r[1].r);
++-		src += POLY1305_BLOCK_SIZE * 4 * blocks;
++-		srclen -= POLY1305_BLOCK_SIZE * 4 * blocks;
++-	}
++-
++-	if (likely(srclen >= POLY1305_BLOCK_SIZE * 2)) {
++-		if (unlikely(dctx->rset < 2)) {
++-			dctx->r[1] = dctx->r[0];
++-			poly1305_simd_mult(dctx->r[1].r, dctx->r[0].r);
++-			dctx->rset = 2;
+++		if (len >= POLY1305_BLOCK_SIZE) {
+++			dctx->s[0] = get_unaligned_le32(&inp[0]);
+++			dctx->s[1] = get_unaligned_le32(&inp[4]);
+++			dctx->s[2] = get_unaligned_le32(&inp[8]);
+++			dctx->s[3] = get_unaligned_le32(&inp[12]);
+++			inp += POLY1305_BLOCK_SIZE;
+++			len -= POLY1305_BLOCK_SIZE;
+++			acc += POLY1305_BLOCK_SIZE;
+++			dctx->sset = true;
++ 		}
++-		blocks = srclen / (POLY1305_BLOCK_SIZE * 2);
++-		poly1305_2block_sse2(dctx->h.h, src, dctx->r[0].r,
++-				     blocks, dctx->r[1].r);
++-		src += POLY1305_BLOCK_SIZE * 2 * blocks;
++-		srclen -= POLY1305_BLOCK_SIZE * 2 * blocks;
++-	}
++-	if (srclen >= POLY1305_BLOCK_SIZE) {
++-		poly1305_block_sse2(dctx->h.h, src, dctx->r[0].r, 1);
++-		srclen -= POLY1305_BLOCK_SIZE;
++ 	}
++-	return srclen;
+++	return acc;
++ }
++ 
++ void poly1305_update_arch(struct poly1305_desc_ctx *dctx, const u8 *src,
++ 			  unsigned int srclen)
++ {
++-	unsigned int bytes;
+++	unsigned int bytes, used;
++ 
++ 	if (unlikely(dctx->buflen)) {
++ 		bytes = min(srclen, POLY1305_BLOCK_SIZE - dctx->buflen);
++@@ -295,31 +184,19 @@ void poly1305_update_arch(struct poly130
++ 		dctx->buflen += bytes;
++ 
++ 		if (dctx->buflen == POLY1305_BLOCK_SIZE) {
++-			if (static_branch_likely(&poly1305_use_simd) &&
++-			    likely(crypto_simd_usable())) {
++-				kernel_fpu_begin();
++-				poly1305_simd_blocks(dctx, dctx->buf,
++-						     POLY1305_BLOCK_SIZE);
++-				kernel_fpu_end();
++-			} else {
++-				poly1305_scalar_blocks(dctx, dctx->buf,
++-						       POLY1305_BLOCK_SIZE);
++-			}
+++			if (likely(!crypto_poly1305_setdctxkey(dctx, dctx->buf, POLY1305_BLOCK_SIZE)))
+++				poly1305_simd_blocks(&dctx->h, dctx->buf, POLY1305_BLOCK_SIZE, 1);
++ 			dctx->buflen = 0;
++ 		}
++ 	}
++ 
++ 	if (likely(srclen >= POLY1305_BLOCK_SIZE)) {
++-		if (static_branch_likely(&poly1305_use_simd) &&
++-		    likely(crypto_simd_usable())) {
++-			kernel_fpu_begin();
++-			bytes = poly1305_simd_blocks(dctx, src, srclen);
++-			kernel_fpu_end();
++-		} else {
++-			bytes = poly1305_scalar_blocks(dctx, src, srclen);
++-		}
++-		src += srclen - bytes;
++-		srclen = bytes;
+++		bytes = round_down(srclen, POLY1305_BLOCK_SIZE);
+++		srclen -= bytes;
+++		used = crypto_poly1305_setdctxkey(dctx, src, bytes);
+++		if (likely(bytes - used))
+++			poly1305_simd_blocks(&dctx->h, src + used, bytes - used, 1);
+++		src += bytes;
++ 	}
++ 
++ 	if (unlikely(srclen)) {
++@@ -329,31 +206,17 @@ void poly1305_update_arch(struct poly130
++ }
++ EXPORT_SYMBOL(poly1305_update_arch);
++ 
++-void poly1305_final_arch(struct poly1305_desc_ctx *desc, u8 *dst)
+++void poly1305_final_arch(struct poly1305_desc_ctx *dctx, u8 *dst)
++ {
++-	__le32 digest[4];
++-	u64 f = 0;
++-
++-	if (unlikely(desc->buflen)) {
++-		desc->buf[desc->buflen++] = 1;
++-		memset(desc->buf + desc->buflen, 0,
++-		       POLY1305_BLOCK_SIZE - desc->buflen);
++-		poly1305_integer_blocks(&desc->h, desc->opaque_r, desc->buf, 1, 0);
+++	if (unlikely(dctx->buflen)) {
+++		dctx->buf[dctx->buflen++] = 1;
+++		memset(dctx->buf + dctx->buflen, 0,
+++		       POLY1305_BLOCK_SIZE - dctx->buflen);
+++		poly1305_simd_blocks(&dctx->h, dctx->buf, POLY1305_BLOCK_SIZE, 0);
++ 	}
++ 
++-	poly1305_integer_emit(&desc->h, digest);
++-
++-	/* mac = (h + s) % (2^128) */
++-	f = (f >> 32) + le32_to_cpu(digest[0]) + desc->s[0];
++-	put_unaligned_le32(f, dst + 0);
++-	f = (f >> 32) + le32_to_cpu(digest[1]) + desc->s[1];
++-	put_unaligned_le32(f, dst + 4);
++-	f = (f >> 32) + le32_to_cpu(digest[2]) + desc->s[2];
++-	put_unaligned_le32(f, dst + 8);
++-	f = (f >> 32) + le32_to_cpu(digest[3]) + desc->s[3];
++-	put_unaligned_le32(f, dst + 12);
++-
++-	*desc = (struct poly1305_desc_ctx){};
+++	poly1305_simd_emit(&dctx->h, dst, dctx->s);
+++	*dctx = (struct poly1305_desc_ctx){};
++ }
++ EXPORT_SYMBOL(poly1305_final_arch);
++ 
++@@ -361,38 +224,34 @@ static int crypto_poly1305_init(struct s
++ {
++ 	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
++ 
++-	poly1305_core_init(&dctx->h);
++-	dctx->buflen = 0;
++-	dctx->rset = 0;
++-	dctx->sset = false;
++-
+++	*dctx = (struct poly1305_desc_ctx){};
++ 	return 0;
++ }
++ 
++-static int crypto_poly1305_final(struct shash_desc *desc, u8 *dst)
+++static int crypto_poly1305_update(struct shash_desc *desc,
+++				  const u8 *src, unsigned int srclen)
++ {
++ 	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
++ 
++-	if (unlikely(!dctx->sset))
++-		return -ENOKEY;
++-
++-	poly1305_final_arch(dctx, dst);
+++	poly1305_update_arch(dctx, src, srclen);
++ 	return 0;
++ }
++ 
++-static int poly1305_simd_update(struct shash_desc *desc,
++-				const u8 *src, unsigned int srclen)
+++static int crypto_poly1305_final(struct shash_desc *desc, u8 *dst)
++ {
++ 	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);
++ 
++-	poly1305_update_arch(dctx, src, srclen);
+++	if (unlikely(!dctx->sset))
+++		return -ENOKEY;
+++
+++	poly1305_final_arch(dctx, dst);
++ 	return 0;
++ }
++ 
++ static struct shash_alg alg = {
++ 	.digestsize	= POLY1305_DIGEST_SIZE,
++ 	.init		= crypto_poly1305_init,
++-	.update		= poly1305_simd_update,
+++	.update		= crypto_poly1305_update,
++ 	.final		= crypto_poly1305_final,
++ 	.descsize	= sizeof(struct poly1305_desc_ctx),
++ 	.base		= {
++@@ -406,17 +265,19 @@ static struct shash_alg alg = {
++ 
++ static int __init poly1305_simd_mod_init(void)
++ {
++-	if (!boot_cpu_has(X86_FEATURE_XMM2))
++-		return 0;
++-
++-	static_branch_enable(&poly1305_use_simd);
++-
++-	if (IS_ENABLED(CONFIG_AS_AVX2) &&
++-	    boot_cpu_has(X86_FEATURE_AVX) &&
+++	if (IS_ENABLED(CONFIG_AS_AVX) && boot_cpu_has(X86_FEATURE_AVX) &&
+++	    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL))
+++		static_branch_enable(&poly1305_use_avx);
+++	if (IS_ENABLED(CONFIG_AS_AVX2) && boot_cpu_has(X86_FEATURE_AVX) &&
++ 	    boot_cpu_has(X86_FEATURE_AVX2) &&
++ 	    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL))
++ 		static_branch_enable(&poly1305_use_avx2);
++-
+++	if (IS_ENABLED(CONFIG_AS_AVX512) && boot_cpu_has(X86_FEATURE_AVX) &&
+++	    boot_cpu_has(X86_FEATURE_AVX2) && boot_cpu_has(X86_FEATURE_AVX512F) &&
+++	    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM | XFEATURE_MASK_AVX512, NULL) &&
+++	    /* Skylake downclocks unacceptably much when using zmm, but later generations are fast. */
+++	    boot_cpu_data.x86_model != INTEL_FAM6_SKYLAKE_X)
+++		static_branch_enable(&poly1305_use_avx512);
++ 	return IS_REACHABLE(CONFIG_CRYPTO_HASH) ? crypto_register_shash(&alg) : 0;
++ }
++ 
++@@ -430,7 +291,7 @@ module_init(poly1305_simd_mod_init);
++ module_exit(poly1305_simd_mod_exit);
++ 
++ MODULE_LICENSE("GPL");
++-MODULE_AUTHOR("Martin Willi <martin@strongswan.org>");
+++MODULE_AUTHOR("Jason A. Donenfeld <Jason@zx2c4.com>");
++ MODULE_DESCRIPTION("Poly1305 authenticator");
++ MODULE_ALIAS_CRYPTO("poly1305");
++ MODULE_ALIAS_CRYPTO("poly1305-simd");
++--- a/lib/crypto/Kconfig
+++++ b/lib/crypto/Kconfig
++@@ -90,7 +90,7 @@ config CRYPTO_LIB_DES
++ config CRYPTO_LIB_POLY1305_RSIZE
++ 	int
++ 	default 2 if MIPS
++-	default 4 if X86_64
+++	default 11 if X86_64
++ 	default 9 if ARM || ARM64
++ 	default 1
++ 
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0044-crypto-arm-arm64-mips-poly1305-remove-redundant-non-.patch b/target/linux/generic/backport-5.4/080-wireguard-0044-crypto-arm-arm64-mips-poly1305-remove-redundant-non-.patch
+new file mode 100644
+index 0000000000..b95b998880
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0044-crypto-arm-arm64-mips-poly1305-remove-redundant-non-.patch
+@@ -0,0 +1,171 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Sun, 5 Jan 2020 22:40:49 -0500
++Subject: [PATCH] crypto: {arm,arm64,mips}/poly1305 - remove redundant
++ non-reduction from emit
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++commit 31899908a0d248b030b4464425b86c717e0007d4 upstream.
++
++This appears to be some kind of copy and paste error, and is actually
++dead code.
++
++Pre: f = 0 ⇒ (f >> 32) = 0
++    f = (f >> 32) + le32_to_cpu(digest[0]);
++Post: 0 ≤ f < 2³²
++    put_unaligned_le32(f, dst);
++
++Pre: 0 ≤ f < 2³² ⇒ (f >> 32) = 0
++    f = (f >> 32) + le32_to_cpu(digest[1]);
++Post: 0 ≤ f < 2³²
++    put_unaligned_le32(f, dst + 4);
++
++Pre: 0 ≤ f < 2³² ⇒ (f >> 32) = 0
++    f = (f >> 32) + le32_to_cpu(digest[2]);
++Post: 0 ≤ f < 2³²
++    put_unaligned_le32(f, dst + 8);
++
++Pre: 0 ≤ f < 2³² ⇒ (f >> 32) = 0
++    f = (f >> 32) + le32_to_cpu(digest[3]);
++Post: 0 ≤ f < 2³²
++    put_unaligned_le32(f, dst + 12);
++
++Therefore this sequence is redundant. And Andy's code appears to handle
++misalignment acceptably.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Tested-by: Ard Biesheuvel <ardb@kernel.org>
++Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/poly1305-glue.c   | 18 ++----------------
++ arch/arm64/crypto/poly1305-glue.c | 18 ++----------------
++ arch/mips/crypto/poly1305-glue.c  | 18 ++----------------
++ 3 files changed, 6 insertions(+), 48 deletions(-)
++
++--- a/arch/arm/crypto/poly1305-glue.c
+++++ b/arch/arm/crypto/poly1305-glue.c
++@@ -20,7 +20,7 @@
++ 
++ void poly1305_init_arm(void *state, const u8 *key);
++ void poly1305_blocks_arm(void *state, const u8 *src, u32 len, u32 hibit);
++-void poly1305_emit_arm(void *state, __le32 *digest, const u32 *nonce);
+++void poly1305_emit_arm(void *state, u8 *digest, const u32 *nonce);
++ 
++ void __weak poly1305_blocks_neon(void *state, const u8 *src, u32 len, u32 hibit)
++ {
++@@ -179,9 +179,6 @@ EXPORT_SYMBOL(poly1305_update_arch);
++ 
++ void poly1305_final_arch(struct poly1305_desc_ctx *dctx, u8 *dst)
++ {
++-	__le32 digest[4];
++-	u64 f = 0;
++-
++ 	if (unlikely(dctx->buflen)) {
++ 		dctx->buf[dctx->buflen++] = 1;
++ 		memset(dctx->buf + dctx->buflen, 0,
++@@ -189,18 +186,7 @@ void poly1305_final_arch(struct poly1305
++ 		poly1305_blocks_arm(&dctx->h, dctx->buf, POLY1305_BLOCK_SIZE, 0);
++ 	}
++ 
++-	poly1305_emit_arm(&dctx->h, digest, dctx->s);
++-
++-	/* mac = (h + s) % (2^128) */
++-	f = (f >> 32) + le32_to_cpu(digest[0]);
++-	put_unaligned_le32(f, dst);
++-	f = (f >> 32) + le32_to_cpu(digest[1]);
++-	put_unaligned_le32(f, dst + 4);
++-	f = (f >> 32) + le32_to_cpu(digest[2]);
++-	put_unaligned_le32(f, dst + 8);
++-	f = (f >> 32) + le32_to_cpu(digest[3]);
++-	put_unaligned_le32(f, dst + 12);
++-
+++	poly1305_emit_arm(&dctx->h, dst, dctx->s);
++ 	*dctx = (struct poly1305_desc_ctx){};
++ }
++ EXPORT_SYMBOL(poly1305_final_arch);
++--- a/arch/arm64/crypto/poly1305-glue.c
+++++ b/arch/arm64/crypto/poly1305-glue.c
++@@ -21,7 +21,7 @@
++ asmlinkage void poly1305_init_arm64(void *state, const u8 *key);
++ asmlinkage void poly1305_blocks(void *state, const u8 *src, u32 len, u32 hibit);
++ asmlinkage void poly1305_blocks_neon(void *state, const u8 *src, u32 len, u32 hibit);
++-asmlinkage void poly1305_emit(void *state, __le32 *digest, const u32 *nonce);
+++asmlinkage void poly1305_emit(void *state, u8 *digest, const u32 *nonce);
++ 
++ static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);
++ 
++@@ -162,9 +162,6 @@ EXPORT_SYMBOL(poly1305_update_arch);
++ 
++ void poly1305_final_arch(struct poly1305_desc_ctx *dctx, u8 *dst)
++ {
++-	__le32 digest[4];
++-	u64 f = 0;
++-
++ 	if (unlikely(dctx->buflen)) {
++ 		dctx->buf[dctx->buflen++] = 1;
++ 		memset(dctx->buf + dctx->buflen, 0,
++@@ -172,18 +169,7 @@ void poly1305_final_arch(struct poly1305
++ 		poly1305_blocks(&dctx->h, dctx->buf, POLY1305_BLOCK_SIZE, 0);
++ 	}
++ 
++-	poly1305_emit(&dctx->h, digest, dctx->s);
++-
++-	/* mac = (h + s) % (2^128) */
++-	f = (f >> 32) + le32_to_cpu(digest[0]);
++-	put_unaligned_le32(f, dst);
++-	f = (f >> 32) + le32_to_cpu(digest[1]);
++-	put_unaligned_le32(f, dst + 4);
++-	f = (f >> 32) + le32_to_cpu(digest[2]);
++-	put_unaligned_le32(f, dst + 8);
++-	f = (f >> 32) + le32_to_cpu(digest[3]);
++-	put_unaligned_le32(f, dst + 12);
++-
+++	poly1305_emit(&dctx->h, dst, dctx->s);
++ 	*dctx = (struct poly1305_desc_ctx){};
++ }
++ EXPORT_SYMBOL(poly1305_final_arch);
++--- a/arch/mips/crypto/poly1305-glue.c
+++++ b/arch/mips/crypto/poly1305-glue.c
++@@ -15,7 +15,7 @@
++ 
++ asmlinkage void poly1305_init_mips(void *state, const u8 *key);
++ asmlinkage void poly1305_blocks_mips(void *state, const u8 *src, u32 len, u32 hibit);
++-asmlinkage void poly1305_emit_mips(void *state, __le32 *digest, const u32 *nonce);
+++asmlinkage void poly1305_emit_mips(void *state, u8 *digest, const u32 *nonce);
++ 
++ void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 *key)
++ {
++@@ -134,9 +134,6 @@ EXPORT_SYMBOL(poly1305_update_arch);
++ 
++ void poly1305_final_arch(struct poly1305_desc_ctx *dctx, u8 *dst)
++ {
++-	__le32 digest[4];
++-	u64 f = 0;
++-
++ 	if (unlikely(dctx->buflen)) {
++ 		dctx->buf[dctx->buflen++] = 1;
++ 		memset(dctx->buf + dctx->buflen, 0,
++@@ -144,18 +141,7 @@ void poly1305_final_arch(struct poly1305
++ 		poly1305_blocks_mips(&dctx->h, dctx->buf, POLY1305_BLOCK_SIZE, 0);
++ 	}
++ 
++-	poly1305_emit_mips(&dctx->h, digest, dctx->s);
++-
++-	/* mac = (h + s) % (2^128) */
++-	f = (f >> 32) + le32_to_cpu(digest[0]);
++-	put_unaligned_le32(f, dst);
++-	f = (f >> 32) + le32_to_cpu(digest[1]);
++-	put_unaligned_le32(f, dst + 4);
++-	f = (f >> 32) + le32_to_cpu(digest[2]);
++-	put_unaligned_le32(f, dst + 8);
++-	f = (f >> 32) + le32_to_cpu(digest[3]);
++-	put_unaligned_le32(f, dst + 12);
++-
+++	poly1305_emit_mips(&dctx->h, dst, dctx->s);
++ 	*dctx = (struct poly1305_desc_ctx){};
++ }
++ EXPORT_SYMBOL(poly1305_final_arch);
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0045-crypto-curve25519-Fix-selftest-build-error.patch b/target/linux/generic/backport-5.4/080-wireguard-0045-crypto-curve25519-Fix-selftest-build-error.patch
+new file mode 100644
+index 0000000000..fa8d8fd6a9
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0045-crypto-curve25519-Fix-selftest-build-error.patch
+@@ -0,0 +1,102 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Herbert Xu <herbert@gondor.apana.org.au>
++Date: Wed, 8 Jan 2020 12:37:35 +0800
++Subject: [PATCH] crypto: curve25519 - Fix selftest build error
++
++commit a8bdf2c42ee4d1ee42af1f3601f85de94e70a421 upstream.
++
++If CRYPTO_CURVE25519 is y, CRYPTO_LIB_CURVE25519_GENERIC will be
++y, but CRYPTO_LIB_CURVE25519 may be set to m, this causes build
++errors:
++
++lib/crypto/curve25519-selftest.o: In function `curve25519':
++curve25519-selftest.c:(.text.unlikely+0xc): undefined reference to `curve25519_arch'
++lib/crypto/curve25519-selftest.o: In function `curve25519_selftest':
++curve25519-selftest.c:(.init.text+0x17e): undefined reference to `curve25519_base_arch'
++
++This is because the curve25519 self-test code is being controlled
++by the GENERIC option rather than the overall CURVE25519 option,
++as is the case with blake2s.  To recap, the GENERIC and ARCH options
++for CURVE25519 are internal only and selected by users such as
++the Crypto API, or the externally visible CURVE25519 option which
++in turn is selected by wireguard.  The self-test is specific to the
++the external CURVE25519 option and should not be enabled by the
++Crypto API.
++
++This patch fixes this by splitting the GENERIC module from the
++CURVE25519 module with the latter now containing just the self-test.
++
++Reported-by: Hulk Robot <hulkci@huawei.com>
++Fixes: aa127963f1ca ("crypto: lib/curve25519 - re-add selftests")
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Reviewed-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ lib/crypto/Makefile             |  9 ++++++---
++ lib/crypto/curve25519-generic.c | 24 ++++++++++++++++++++++++
++ lib/crypto/curve25519.c         |  7 -------
++ 3 files changed, 30 insertions(+), 10 deletions(-)
++ create mode 100644 lib/crypto/curve25519-generic.c
++
++--- a/lib/crypto/Makefile
+++++ b/lib/crypto/Makefile
++@@ -19,9 +19,12 @@ libblake2s-y					+= blake2s.o
++ obj-$(CONFIG_CRYPTO_LIB_CHACHA20POLY1305)	+= libchacha20poly1305.o
++ libchacha20poly1305-y				+= chacha20poly1305.o
++ 
++-obj-$(CONFIG_CRYPTO_LIB_CURVE25519_GENERIC)	+= libcurve25519.o
++-libcurve25519-y					:= curve25519-fiat32.o
++-libcurve25519-$(CONFIG_ARCH_SUPPORTS_INT128)	:= curve25519-hacl64.o
+++obj-$(CONFIG_CRYPTO_LIB_CURVE25519_GENERIC)	+= libcurve25519-generic.o
+++libcurve25519-generic-y				:= curve25519-fiat32.o
+++libcurve25519-generic-$(CONFIG_ARCH_SUPPORTS_INT128)	:= curve25519-hacl64.o
+++libcurve25519-generic-y				+= curve25519-generic.o
+++
+++obj-$(CONFIG_CRYPTO_LIB_CURVE25519)		+= libcurve25519.o
++ libcurve25519-y					+= curve25519.o
++ 
++ obj-$(CONFIG_CRYPTO_LIB_DES)			+= libdes.o
++--- /dev/null
+++++ b/lib/crypto/curve25519-generic.c
++@@ -0,0 +1,24 @@
+++// SPDX-License-Identifier: GPL-2.0 OR MIT
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ *
+++ * This is an implementation of the Curve25519 ECDH algorithm, using either
+++ * a 32-bit implementation or a 64-bit implementation with 128-bit integers,
+++ * depending on what is supported by the target compiler.
+++ *
+++ * Information: https://cr.yp.to/ecdh.html
+++ */
+++
+++#include <crypto/curve25519.h>
+++#include <linux/module.h>
+++
+++const u8 curve25519_null_point[CURVE25519_KEY_SIZE] __aligned(32) = { 0 };
+++const u8 curve25519_base_point[CURVE25519_KEY_SIZE] __aligned(32) = { 9 };
+++
+++EXPORT_SYMBOL(curve25519_null_point);
+++EXPORT_SYMBOL(curve25519_base_point);
+++EXPORT_SYMBOL(curve25519_generic);
+++
+++MODULE_LICENSE("GPL v2");
+++MODULE_DESCRIPTION("Curve25519 scalar multiplication");
+++MODULE_AUTHOR("Jason A. Donenfeld <Jason@zx2c4.com>");
++--- a/lib/crypto/curve25519.c
+++++ b/lib/crypto/curve25519.c
++@@ -15,13 +15,6 @@
++ 
++ bool curve25519_selftest(void);
++ 
++-const u8 curve25519_null_point[CURVE25519_KEY_SIZE] __aligned(32) = { 0 };
++-const u8 curve25519_base_point[CURVE25519_KEY_SIZE] __aligned(32) = { 9 };
++-
++-EXPORT_SYMBOL(curve25519_null_point);
++-EXPORT_SYMBOL(curve25519_base_point);
++-EXPORT_SYMBOL(curve25519_generic);
++-
++ static int __init mod_init(void)
++ {
++ 	if (!IS_ENABLED(CONFIG_CRYPTO_MANAGER_DISABLE_TESTS) &&
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0046-crypto-x86-poly1305-fix-.gitignore-typo.patch b/target/linux/generic/backport-5.4/080-wireguard-0046-crypto-x86-poly1305-fix-.gitignore-typo.patch
+new file mode 100644
+index 0000000000..27f0417ac3
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0046-crypto-x86-poly1305-fix-.gitignore-typo.patch
+@@ -0,0 +1,23 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Thu, 16 Jan 2020 18:23:55 +0100
++Subject: [PATCH] crypto: x86/poly1305 - fix .gitignore typo
++
++commit 1f6868995326cc82102049e349d8dbd116bdb656 upstream.
++
++Admist the kbuild robot induced changes, the .gitignore file for the
++generated file wasn't updated with the non-clashing filename. This
++commit adjusts that.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/.gitignore | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/arch/x86/crypto/.gitignore
+++++ b/arch/x86/crypto/.gitignore
++@@ -1 +1 @@
++-poly1305-x86_64.S
+++poly1305-x86_64-cryptogams.S
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0047-crypto-chacha20poly1305-add-back-missing-test-vector.patch b/target/linux/generic/backport-5.4/080-wireguard-0047-crypto-chacha20poly1305-add-back-missing-test-vector.patch
+new file mode 100644
+index 0000000000..eda969577a
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0047-crypto-chacha20poly1305-add-back-missing-test-vector.patch
+@@ -0,0 +1,1858 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Thu, 16 Jan 2020 21:26:34 +0100
++Subject: [PATCH] crypto: chacha20poly1305 - add back missing test vectors and
++ test chunking
++
++commit 72c7943792c9e7788ddd182337bcf8f650cf56f5 upstream.
++
++When this was originally ported, the 12-byte nonce vectors were left out
++to keep things simple. I agree that we don't need nor want a library
++interface for 12-byte nonces. But these test vectors were specially
++crafted to look at issues in the underlying primitives and related
++interactions.  Therefore, we actually want to keep around all of the
++test vectors, and simply have a helper function to test them with.
++
++Secondly, the sglist-based chunking code in the library interface is
++rather complicated, so this adds a developer-only test for ensuring that
++all the book keeping is correct, across a wide array of possibilities.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ lib/crypto/chacha20poly1305-selftest.c | 1712 +++++++++++++++++++++++-
++ 1 file changed, 1698 insertions(+), 14 deletions(-)
++
++--- a/lib/crypto/chacha20poly1305-selftest.c
+++++ b/lib/crypto/chacha20poly1305-selftest.c
++@@ -4,6 +4,7 @@
++  */
++ 
++ #include <crypto/chacha20poly1305.h>
+++#include <crypto/chacha.h>
++ #include <crypto/poly1305.h>
++ 
++ #include <asm/unaligned.h>
++@@ -1926,6 +1927,1104 @@ static const u8 enc_key012[] __initconst
++ 	0x65, 0x91, 0x6e, 0x2a, 0x79, 0x22, 0xda, 0x64
++ };
++ 
+++/* wycheproof - rfc7539 */
+++static const u8 enc_input013[] __initconst = {
+++	0x4c, 0x61, 0x64, 0x69, 0x65, 0x73, 0x20, 0x61,
+++	0x6e, 0x64, 0x20, 0x47, 0x65, 0x6e, 0x74, 0x6c,
+++	0x65, 0x6d, 0x65, 0x6e, 0x20, 0x6f, 0x66, 0x20,
+++	0x74, 0x68, 0x65, 0x20, 0x63, 0x6c, 0x61, 0x73,
+++	0x73, 0x20, 0x6f, 0x66, 0x20, 0x27, 0x39, 0x39,
+++	0x3a, 0x20, 0x49, 0x66, 0x20, 0x49, 0x20, 0x63,
+++	0x6f, 0x75, 0x6c, 0x64, 0x20, 0x6f, 0x66, 0x66,
+++	0x65, 0x72, 0x20, 0x79, 0x6f, 0x75, 0x20, 0x6f,
+++	0x6e, 0x6c, 0x79, 0x20, 0x6f, 0x6e, 0x65, 0x20,
+++	0x74, 0x69, 0x70, 0x20, 0x66, 0x6f, 0x72, 0x20,
+++	0x74, 0x68, 0x65, 0x20, 0x66, 0x75, 0x74, 0x75,
+++	0x72, 0x65, 0x2c, 0x20, 0x73, 0x75, 0x6e, 0x73,
+++	0x63, 0x72, 0x65, 0x65, 0x6e, 0x20, 0x77, 0x6f,
+++	0x75, 0x6c, 0x64, 0x20, 0x62, 0x65, 0x20, 0x69,
+++	0x74, 0x2e
+++};
+++static const u8 enc_output013[] __initconst = {
+++	0xd3, 0x1a, 0x8d, 0x34, 0x64, 0x8e, 0x60, 0xdb,
+++	0x7b, 0x86, 0xaf, 0xbc, 0x53, 0xef, 0x7e, 0xc2,
+++	0xa4, 0xad, 0xed, 0x51, 0x29, 0x6e, 0x08, 0xfe,
+++	0xa9, 0xe2, 0xb5, 0xa7, 0x36, 0xee, 0x62, 0xd6,
+++	0x3d, 0xbe, 0xa4, 0x5e, 0x8c, 0xa9, 0x67, 0x12,
+++	0x82, 0xfa, 0xfb, 0x69, 0xda, 0x92, 0x72, 0x8b,
+++	0x1a, 0x71, 0xde, 0x0a, 0x9e, 0x06, 0x0b, 0x29,
+++	0x05, 0xd6, 0xa5, 0xb6, 0x7e, 0xcd, 0x3b, 0x36,
+++	0x92, 0xdd, 0xbd, 0x7f, 0x2d, 0x77, 0x8b, 0x8c,
+++	0x98, 0x03, 0xae, 0xe3, 0x28, 0x09, 0x1b, 0x58,
+++	0xfa, 0xb3, 0x24, 0xe4, 0xfa, 0xd6, 0x75, 0x94,
+++	0x55, 0x85, 0x80, 0x8b, 0x48, 0x31, 0xd7, 0xbc,
+++	0x3f, 0xf4, 0xde, 0xf0, 0x8e, 0x4b, 0x7a, 0x9d,
+++	0xe5, 0x76, 0xd2, 0x65, 0x86, 0xce, 0xc6, 0x4b,
+++	0x61, 0x16, 0x1a, 0xe1, 0x0b, 0x59, 0x4f, 0x09,
+++	0xe2, 0x6a, 0x7e, 0x90, 0x2e, 0xcb, 0xd0, 0x60,
+++	0x06, 0x91
+++};
+++static const u8 enc_assoc013[] __initconst = {
+++	0x50, 0x51, 0x52, 0x53, 0xc0, 0xc1, 0xc2, 0xc3,
+++	0xc4, 0xc5, 0xc6, 0xc7
+++};
+++static const u8 enc_nonce013[] __initconst = {
+++	0x07, 0x00, 0x00, 0x00, 0x40, 0x41, 0x42, 0x43,
+++	0x44, 0x45, 0x46, 0x47
+++};
+++static const u8 enc_key013[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input014[] __initconst = { };
+++static const u8 enc_output014[] __initconst = {
+++	0x76, 0xac, 0xb3, 0x42, 0xcf, 0x31, 0x66, 0xa5,
+++	0xb6, 0x3c, 0x0c, 0x0e, 0xa1, 0x38, 0x3c, 0x8d
+++};
+++static const u8 enc_assoc014[] __initconst = { };
+++static const u8 enc_nonce014[] __initconst = {
+++	0x4d, 0xa5, 0xbf, 0x8d, 0xfd, 0x58, 0x52, 0xc1,
+++	0xea, 0x12, 0x37, 0x9d
+++};
+++static const u8 enc_key014[] __initconst = {
+++	0x80, 0xba, 0x31, 0x92, 0xc8, 0x03, 0xce, 0x96,
+++	0x5e, 0xa3, 0x71, 0xd5, 0xff, 0x07, 0x3c, 0xf0,
+++	0xf4, 0x3b, 0x6a, 0x2a, 0xb5, 0x76, 0xb2, 0x08,
+++	0x42, 0x6e, 0x11, 0x40, 0x9c, 0x09, 0xb9, 0xb0
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input015[] __initconst = { };
+++static const u8 enc_output015[] __initconst = {
+++	0x90, 0x6f, 0xa6, 0x28, 0x4b, 0x52, 0xf8, 0x7b,
+++	0x73, 0x59, 0xcb, 0xaa, 0x75, 0x63, 0xc7, 0x09
+++};
+++static const u8 enc_assoc015[] __initconst = {
+++	0xbd, 0x50, 0x67, 0x64, 0xf2, 0xd2, 0xc4, 0x10
+++};
+++static const u8 enc_nonce015[] __initconst = {
+++	0xa9, 0x2e, 0xf0, 0xac, 0x99, 0x1d, 0xd5, 0x16,
+++	0xa3, 0xc6, 0xf6, 0x89
+++};
+++static const u8 enc_key015[] __initconst = {
+++	0x7a, 0x4c, 0xd7, 0x59, 0x17, 0x2e, 0x02, 0xeb,
+++	0x20, 0x4d, 0xb2, 0xc3, 0xf5, 0xc7, 0x46, 0x22,
+++	0x7d, 0xf5, 0x84, 0xfc, 0x13, 0x45, 0x19, 0x63,
+++	0x91, 0xdb, 0xb9, 0x57, 0x7a, 0x25, 0x07, 0x42
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input016[] __initconst = {
+++	0x2a
+++};
+++static const u8 enc_output016[] __initconst = {
+++	0x3a, 0xca, 0xc2, 0x7d, 0xec, 0x09, 0x68, 0x80,
+++	0x1e, 0x9f, 0x6e, 0xde, 0xd6, 0x9d, 0x80, 0x75,
+++	0x22
+++};
+++static const u8 enc_assoc016[] __initconst = { };
+++static const u8 enc_nonce016[] __initconst = {
+++	0x99, 0xe2, 0x3e, 0xc4, 0x89, 0x85, 0xbc, 0xcd,
+++	0xee, 0xab, 0x60, 0xf1
+++};
+++static const u8 enc_key016[] __initconst = {
+++	0xcc, 0x56, 0xb6, 0x80, 0x55, 0x2e, 0xb7, 0x50,
+++	0x08, 0xf5, 0x48, 0x4b, 0x4c, 0xb8, 0x03, 0xfa,
+++	0x50, 0x63, 0xeb, 0xd6, 0xea, 0xb9, 0x1f, 0x6a,
+++	0xb6, 0xae, 0xf4, 0x91, 0x6a, 0x76, 0x62, 0x73
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input017[] __initconst = {
+++	0x51
+++};
+++static const u8 enc_output017[] __initconst = {
+++	0xc4, 0x16, 0x83, 0x10, 0xca, 0x45, 0xb1, 0xf7,
+++	0xc6, 0x6c, 0xad, 0x4e, 0x99, 0xe4, 0x3f, 0x72,
+++	0xb9
+++};
+++static const u8 enc_assoc017[] __initconst = {
+++	0x91, 0xca, 0x6c, 0x59, 0x2c, 0xbc, 0xca, 0x53
+++};
+++static const u8 enc_nonce017[] __initconst = {
+++	0xab, 0x0d, 0xca, 0x71, 0x6e, 0xe0, 0x51, 0xd2,
+++	0x78, 0x2f, 0x44, 0x03
+++};
+++static const u8 enc_key017[] __initconst = {
+++	0x46, 0xf0, 0x25, 0x49, 0x65, 0xf7, 0x69, 0xd5,
+++	0x2b, 0xdb, 0x4a, 0x70, 0xb4, 0x43, 0x19, 0x9f,
+++	0x8e, 0xf2, 0x07, 0x52, 0x0d, 0x12, 0x20, 0xc5,
+++	0x5e, 0x4b, 0x70, 0xf0, 0xfd, 0xa6, 0x20, 0xee
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input018[] __initconst = {
+++	0x5c, 0x60
+++};
+++static const u8 enc_output018[] __initconst = {
+++	0x4d, 0x13, 0x91, 0xe8, 0xb6, 0x1e, 0xfb, 0x39,
+++	0xc1, 0x22, 0x19, 0x54, 0x53, 0x07, 0x7b, 0x22,
+++	0xe5, 0xe2
+++};
+++static const u8 enc_assoc018[] __initconst = { };
+++static const u8 enc_nonce018[] __initconst = {
+++	0x46, 0x1a, 0xf1, 0x22, 0xe9, 0xf2, 0xe0, 0x34,
+++	0x7e, 0x03, 0xf2, 0xdb
+++};
+++static const u8 enc_key018[] __initconst = {
+++	0x2f, 0x7f, 0x7e, 0x4f, 0x59, 0x2b, 0xb3, 0x89,
+++	0x19, 0x49, 0x89, 0x74, 0x35, 0x07, 0xbf, 0x3e,
+++	0xe9, 0xcb, 0xde, 0x17, 0x86, 0xb6, 0x69, 0x5f,
+++	0xe6, 0xc0, 0x25, 0xfd, 0x9b, 0xa4, 0xc1, 0x00
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input019[] __initconst = {
+++	0xdd, 0xf2
+++};
+++static const u8 enc_output019[] __initconst = {
+++	0xb6, 0x0d, 0xea, 0xd0, 0xfd, 0x46, 0x97, 0xec,
+++	0x2e, 0x55, 0x58, 0x23, 0x77, 0x19, 0xd0, 0x24,
+++	0x37, 0xa2
+++};
+++static const u8 enc_assoc019[] __initconst = {
+++	0x88, 0x36, 0x4f, 0xc8, 0x06, 0x05, 0x18, 0xbf
+++};
+++static const u8 enc_nonce019[] __initconst = {
+++	0x61, 0x54, 0x6b, 0xa5, 0xf1, 0x72, 0x05, 0x90,
+++	0xb6, 0x04, 0x0a, 0xc6
+++};
+++static const u8 enc_key019[] __initconst = {
+++	0xc8, 0x83, 0x3d, 0xce, 0x5e, 0xa9, 0xf2, 0x48,
+++	0xaa, 0x20, 0x30, 0xea, 0xcf, 0xe7, 0x2b, 0xff,
+++	0xe6, 0x9a, 0x62, 0x0c, 0xaf, 0x79, 0x33, 0x44,
+++	0xe5, 0x71, 0x8f, 0xe0, 0xd7, 0xab, 0x1a, 0x58
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input020[] __initconst = {
+++	0xab, 0x85, 0xe9, 0xc1, 0x57, 0x17, 0x31
+++};
+++static const u8 enc_output020[] __initconst = {
+++	0x5d, 0xfe, 0x34, 0x40, 0xdb, 0xb3, 0xc3, 0xed,
+++	0x7a, 0x43, 0x4e, 0x26, 0x02, 0xd3, 0x94, 0x28,
+++	0x1e, 0x0a, 0xfa, 0x9f, 0xb7, 0xaa, 0x42
+++};
+++static const u8 enc_assoc020[] __initconst = { };
+++static const u8 enc_nonce020[] __initconst = {
+++	0x3c, 0x4e, 0x65, 0x4d, 0x66, 0x3f, 0xa4, 0x59,
+++	0x6d, 0xc5, 0x5b, 0xb7
+++};
+++static const u8 enc_key020[] __initconst = {
+++	0x55, 0x56, 0x81, 0x58, 0xd3, 0xa6, 0x48, 0x3f,
+++	0x1f, 0x70, 0x21, 0xea, 0xb6, 0x9b, 0x70, 0x3f,
+++	0x61, 0x42, 0x51, 0xca, 0xdc, 0x1a, 0xf5, 0xd3,
+++	0x4a, 0x37, 0x4f, 0xdb, 0xfc, 0x5a, 0xda, 0xc7
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input021[] __initconst = {
+++	0x4e, 0xe5, 0xcd, 0xa2, 0x0d, 0x42, 0x90
+++};
+++static const u8 enc_output021[] __initconst = {
+++	0x4b, 0xd4, 0x72, 0x12, 0x94, 0x1c, 0xe3, 0x18,
+++	0x5f, 0x14, 0x08, 0xee, 0x7f, 0xbf, 0x18, 0xf5,
+++	0xab, 0xad, 0x6e, 0x22, 0x53, 0xa1, 0xba
+++};
+++static const u8 enc_assoc021[] __initconst = {
+++	0x84, 0xe4, 0x6b, 0xe8, 0xc0, 0x91, 0x90, 0x53
+++};
+++static const u8 enc_nonce021[] __initconst = {
+++	0x58, 0x38, 0x93, 0x75, 0xc6, 0x9e, 0xe3, 0x98,
+++	0xde, 0x94, 0x83, 0x96
+++};
+++static const u8 enc_key021[] __initconst = {
+++	0xe3, 0xc0, 0x9e, 0x7f, 0xab, 0x1a, 0xef, 0xb5,
+++	0x16, 0xda, 0x6a, 0x33, 0x02, 0x2a, 0x1d, 0xd4,
+++	0xeb, 0x27, 0x2c, 0x80, 0xd5, 0x40, 0xc5, 0xda,
+++	0x52, 0xa7, 0x30, 0xf3, 0x4d, 0x84, 0x0d, 0x7f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input022[] __initconst = {
+++	0xbe, 0x33, 0x08, 0xf7, 0x2a, 0x2c, 0x6a, 0xed
+++};
+++static const u8 enc_output022[] __initconst = {
+++	0x8e, 0x94, 0x39, 0xa5, 0x6e, 0xee, 0xc8, 0x17,
+++	0xfb, 0xe8, 0xa6, 0xed, 0x8f, 0xab, 0xb1, 0x93,
+++	0x75, 0x39, 0xdd, 0x6c, 0x00, 0xe9, 0x00, 0x21
+++};
+++static const u8 enc_assoc022[] __initconst = { };
+++static const u8 enc_nonce022[] __initconst = {
+++	0x4f, 0x07, 0xaf, 0xed, 0xfd, 0xc3, 0xb6, 0xc2,
+++	0x36, 0x18, 0x23, 0xd3
+++};
+++static const u8 enc_key022[] __initconst = {
+++	0x51, 0xe4, 0xbf, 0x2b, 0xad, 0x92, 0xb7, 0xaf,
+++	0xf1, 0xa4, 0xbc, 0x05, 0x55, 0x0b, 0xa8, 0x1d,
+++	0xf4, 0xb9, 0x6f, 0xab, 0xf4, 0x1c, 0x12, 0xc7,
+++	0xb0, 0x0e, 0x60, 0xe4, 0x8d, 0xb7, 0xe1, 0x52
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input023[] __initconst = {
+++	0xa4, 0xc9, 0xc2, 0x80, 0x1b, 0x71, 0xf7, 0xdf
+++};
+++static const u8 enc_output023[] __initconst = {
+++	0xb9, 0xb9, 0x10, 0x43, 0x3a, 0xf0, 0x52, 0xb0,
+++	0x45, 0x30, 0xf5, 0x1a, 0xee, 0xe0, 0x24, 0xe0,
+++	0xa4, 0x45, 0xa6, 0x32, 0x8f, 0xa6, 0x7a, 0x18
+++};
+++static const u8 enc_assoc023[] __initconst = {
+++	0x66, 0xc0, 0xae, 0x70, 0x07, 0x6c, 0xb1, 0x4d
+++};
+++static const u8 enc_nonce023[] __initconst = {
+++	0xb4, 0xea, 0x66, 0x6e, 0xe1, 0x19, 0x56, 0x33,
+++	0x66, 0x48, 0x4a, 0x78
+++};
+++static const u8 enc_key023[] __initconst = {
+++	0x11, 0x31, 0xc1, 0x41, 0x85, 0x77, 0xa0, 0x54,
+++	0xde, 0x7a, 0x4a, 0xc5, 0x51, 0x95, 0x0f, 0x1a,
+++	0x05, 0x3f, 0x9a, 0xe4, 0x6e, 0x5b, 0x75, 0xfe,
+++	0x4a, 0xbd, 0x56, 0x08, 0xd7, 0xcd, 0xda, 0xdd
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input024[] __initconst = {
+++	0x42, 0xba, 0xae, 0x59, 0x78, 0xfe, 0xaf, 0x5c,
+++	0x36, 0x8d, 0x14, 0xe0
+++};
+++static const u8 enc_output024[] __initconst = {
+++	0xff, 0x7d, 0xc2, 0x03, 0xb2, 0x6c, 0x46, 0x7a,
+++	0x6b, 0x50, 0xdb, 0x33, 0x57, 0x8c, 0x0f, 0x27,
+++	0x58, 0xc2, 0xe1, 0x4e, 0x36, 0xd4, 0xfc, 0x10,
+++	0x6d, 0xcb, 0x29, 0xb4
+++};
+++static const u8 enc_assoc024[] __initconst = { };
+++static const u8 enc_nonce024[] __initconst = {
+++	0x9a, 0x59, 0xfc, 0xe2, 0x6d, 0xf0, 0x00, 0x5e,
+++	0x07, 0x53, 0x86, 0x56
+++};
+++static const u8 enc_key024[] __initconst = {
+++	0x99, 0xb6, 0x2b, 0xd5, 0xaf, 0xbe, 0x3f, 0xb0,
+++	0x15, 0xbd, 0xe9, 0x3f, 0x0a, 0xbf, 0x48, 0x39,
+++	0x57, 0xa1, 0xc3, 0xeb, 0x3c, 0xa5, 0x9c, 0xb5,
+++	0x0b, 0x39, 0xf7, 0xf8, 0xa9, 0xcc, 0x51, 0xbe
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input025[] __initconst = {
+++	0xfd, 0xc8, 0x5b, 0x94, 0xa4, 0xb2, 0xa6, 0xb7,
+++	0x59, 0xb1, 0xa0, 0xda
+++};
+++static const u8 enc_output025[] __initconst = {
+++	0x9f, 0x88, 0x16, 0xde, 0x09, 0x94, 0xe9, 0x38,
+++	0xd9, 0xe5, 0x3f, 0x95, 0xd0, 0x86, 0xfc, 0x6c,
+++	0x9d, 0x8f, 0xa9, 0x15, 0xfd, 0x84, 0x23, 0xa7,
+++	0xcf, 0x05, 0x07, 0x2f
+++};
+++static const u8 enc_assoc025[] __initconst = {
+++	0xa5, 0x06, 0xe1, 0xa5, 0xc6, 0x90, 0x93, 0xf9
+++};
+++static const u8 enc_nonce025[] __initconst = {
+++	0x58, 0xdb, 0xd4, 0xad, 0x2c, 0x4a, 0xd3, 0x5d,
+++	0xd9, 0x06, 0xe9, 0xce
+++};
+++static const u8 enc_key025[] __initconst = {
+++	0x85, 0xf3, 0x5b, 0x62, 0x82, 0xcf, 0xf4, 0x40,
+++	0xbc, 0x10, 0x20, 0xc8, 0x13, 0x6f, 0xf2, 0x70,
+++	0x31, 0x11, 0x0f, 0xa6, 0x3e, 0xc1, 0x6f, 0x1e,
+++	0x82, 0x51, 0x18, 0xb0, 0x06, 0xb9, 0x12, 0x57
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input026[] __initconst = {
+++	0x51, 0xf8, 0xc1, 0xf7, 0x31, 0xea, 0x14, 0xac,
+++	0xdb, 0x21, 0x0a, 0x6d, 0x97, 0x3e, 0x07
+++};
+++static const u8 enc_output026[] __initconst = {
+++	0x0b, 0x29, 0x63, 0x8e, 0x1f, 0xbd, 0xd6, 0xdf,
+++	0x53, 0x97, 0x0b, 0xe2, 0x21, 0x00, 0x42, 0x2a,
+++	0x91, 0x34, 0x08, 0x7d, 0x67, 0xa4, 0x6e, 0x79,
+++	0x17, 0x8d, 0x0a, 0x93, 0xf5, 0xe1, 0xd2
+++};
+++static const u8 enc_assoc026[] __initconst = { };
+++static const u8 enc_nonce026[] __initconst = {
+++	0x68, 0xab, 0x7f, 0xdb, 0xf6, 0x19, 0x01, 0xda,
+++	0xd4, 0x61, 0xd2, 0x3c
+++};
+++static const u8 enc_key026[] __initconst = {
+++	0x67, 0x11, 0x96, 0x27, 0xbd, 0x98, 0x8e, 0xda,
+++	0x90, 0x62, 0x19, 0xe0, 0x8c, 0x0d, 0x0d, 0x77,
+++	0x9a, 0x07, 0xd2, 0x08, 0xce, 0x8a, 0x4f, 0xe0,
+++	0x70, 0x9a, 0xf7, 0x55, 0xee, 0xec, 0x6d, 0xcb
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input027[] __initconst = {
+++	0x97, 0x46, 0x9d, 0xa6, 0x67, 0xd6, 0x11, 0x0f,
+++	0x9c, 0xbd, 0xa1, 0xd1, 0xa2, 0x06, 0x73
+++};
+++static const u8 enc_output027[] __initconst = {
+++	0x32, 0xdb, 0x66, 0xc4, 0xa3, 0x81, 0x9d, 0x81,
+++	0x55, 0x74, 0x55, 0xe5, 0x98, 0x0f, 0xed, 0xfe,
+++	0xae, 0x30, 0xde, 0xc9, 0x4e, 0x6a, 0xd3, 0xa9,
+++	0xee, 0xa0, 0x6a, 0x0d, 0x70, 0x39, 0x17
+++};
+++static const u8 enc_assoc027[] __initconst = {
+++	0x64, 0x53, 0xa5, 0x33, 0x84, 0x63, 0x22, 0x12
+++};
+++static const u8 enc_nonce027[] __initconst = {
+++	0xd9, 0x5b, 0x32, 0x43, 0xaf, 0xae, 0xf7, 0x14,
+++	0xc5, 0x03, 0x5b, 0x6a
+++};
+++static const u8 enc_key027[] __initconst = {
+++	0xe6, 0xf1, 0x11, 0x8d, 0x41, 0xe4, 0xb4, 0x3f,
+++	0xb5, 0x82, 0x21, 0xb7, 0xed, 0x79, 0x67, 0x38,
+++	0x34, 0xe0, 0xd8, 0xac, 0x5c, 0x4f, 0xa6, 0x0b,
+++	0xbc, 0x8b, 0xc4, 0x89, 0x3a, 0x58, 0x89, 0x4d
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input028[] __initconst = {
+++	0x54, 0x9b, 0x36, 0x5a, 0xf9, 0x13, 0xf3, 0xb0,
+++	0x81, 0x13, 0x1c, 0xcb, 0x6b, 0x82, 0x55, 0x88
+++};
+++static const u8 enc_output028[] __initconst = {
+++	0xe9, 0x11, 0x0e, 0x9f, 0x56, 0xab, 0x3c, 0xa4,
+++	0x83, 0x50, 0x0c, 0xea, 0xba, 0xb6, 0x7a, 0x13,
+++	0x83, 0x6c, 0xca, 0xbf, 0x15, 0xa6, 0xa2, 0x2a,
+++	0x51, 0xc1, 0x07, 0x1c, 0xfa, 0x68, 0xfa, 0x0c
+++};
+++static const u8 enc_assoc028[] __initconst = { };
+++static const u8 enc_nonce028[] __initconst = {
+++	0x2f, 0xcb, 0x1b, 0x38, 0xa9, 0x9e, 0x71, 0xb8,
+++	0x47, 0x40, 0xad, 0x9b
+++};
+++static const u8 enc_key028[] __initconst = {
+++	0x59, 0xd4, 0xea, 0xfb, 0x4d, 0xe0, 0xcf, 0xc7,
+++	0xd3, 0xdb, 0x99, 0xa8, 0xf5, 0x4b, 0x15, 0xd7,
+++	0xb3, 0x9f, 0x0a, 0xcc, 0x8d, 0xa6, 0x97, 0x63,
+++	0xb0, 0x19, 0xc1, 0x69, 0x9f, 0x87, 0x67, 0x4a
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input029[] __initconst = {
+++	0x55, 0xa4, 0x65, 0x64, 0x4f, 0x5b, 0x65, 0x09,
+++	0x28, 0xcb, 0xee, 0x7c, 0x06, 0x32, 0x14, 0xd6
+++};
+++static const u8 enc_output029[] __initconst = {
+++	0xe4, 0xb1, 0x13, 0xcb, 0x77, 0x59, 0x45, 0xf3,
+++	0xd3, 0xa8, 0xae, 0x9e, 0xc1, 0x41, 0xc0, 0x0c,
+++	0x7c, 0x43, 0xf1, 0x6c, 0xe0, 0x96, 0xd0, 0xdc,
+++	0x27, 0xc9, 0x58, 0x49, 0xdc, 0x38, 0x3b, 0x7d
+++};
+++static const u8 enc_assoc029[] __initconst = {
+++	0x03, 0x45, 0x85, 0x62, 0x1a, 0xf8, 0xd7, 0xff
+++};
+++static const u8 enc_nonce029[] __initconst = {
+++	0x11, 0x8a, 0x69, 0x64, 0xc2, 0xd3, 0xe3, 0x80,
+++	0x07, 0x1f, 0x52, 0x66
+++};
+++static const u8 enc_key029[] __initconst = {
+++	0xb9, 0x07, 0xa4, 0x50, 0x75, 0x51, 0x3f, 0xe8,
+++	0xa8, 0x01, 0x9e, 0xde, 0xe3, 0xf2, 0x59, 0x14,
+++	0x87, 0xb2, 0xa0, 0x30, 0xb0, 0x3c, 0x6e, 0x1d,
+++	0x77, 0x1c, 0x86, 0x25, 0x71, 0xd2, 0xea, 0x1e
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input030[] __initconst = {
+++	0x3f, 0xf1, 0x51, 0x4b, 0x1c, 0x50, 0x39, 0x15,
+++	0x91, 0x8f, 0x0c, 0x0c, 0x31, 0x09, 0x4a, 0x6e,
+++	0x1f
+++};
+++static const u8 enc_output030[] __initconst = {
+++	0x02, 0xcc, 0x3a, 0xcb, 0x5e, 0xe1, 0xfc, 0xdd,
+++	0x12, 0xa0, 0x3b, 0xb8, 0x57, 0x97, 0x64, 0x74,
+++	0xd3, 0xd8, 0x3b, 0x74, 0x63, 0xa2, 0xc3, 0x80,
+++	0x0f, 0xe9, 0x58, 0xc2, 0x8e, 0xaa, 0x29, 0x08,
+++	0x13
+++};
+++static const u8 enc_assoc030[] __initconst = { };
+++static const u8 enc_nonce030[] __initconst = {
+++	0x45, 0xaa, 0xa3, 0xe5, 0xd1, 0x6d, 0x2d, 0x42,
+++	0xdc, 0x03, 0x44, 0x5d
+++};
+++static const u8 enc_key030[] __initconst = {
+++	0x3b, 0x24, 0x58, 0xd8, 0x17, 0x6e, 0x16, 0x21,
+++	0xc0, 0xcc, 0x24, 0xc0, 0xc0, 0xe2, 0x4c, 0x1e,
+++	0x80, 0xd7, 0x2f, 0x7e, 0xe9, 0x14, 0x9a, 0x4b,
+++	0x16, 0x61, 0x76, 0x62, 0x96, 0x16, 0xd0, 0x11
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input031[] __initconst = {
+++	0x63, 0x85, 0x8c, 0xa3, 0xe2, 0xce, 0x69, 0x88,
+++	0x7b, 0x57, 0x8a, 0x3c, 0x16, 0x7b, 0x42, 0x1c,
+++	0x9c
+++};
+++static const u8 enc_output031[] __initconst = {
+++	0x35, 0x76, 0x64, 0x88, 0xd2, 0xbc, 0x7c, 0x2b,
+++	0x8d, 0x17, 0xcb, 0xbb, 0x9a, 0xbf, 0xad, 0x9e,
+++	0x6d, 0x1f, 0x39, 0x1e, 0x65, 0x7b, 0x27, 0x38,
+++	0xdd, 0xa0, 0x84, 0x48, 0xcb, 0xa2, 0x81, 0x1c,
+++	0xeb
+++};
+++static const u8 enc_assoc031[] __initconst = {
+++	0x9a, 0xaf, 0x29, 0x9e, 0xee, 0xa7, 0x8f, 0x79
+++};
+++static const u8 enc_nonce031[] __initconst = {
+++	0xf0, 0x38, 0x4f, 0xb8, 0x76, 0x12, 0x14, 0x10,
+++	0x63, 0x3d, 0x99, 0x3d
+++};
+++static const u8 enc_key031[] __initconst = {
+++	0xf6, 0x0c, 0x6a, 0x1b, 0x62, 0x57, 0x25, 0xf7,
+++	0x6c, 0x70, 0x37, 0xb4, 0x8f, 0xe3, 0x57, 0x7f,
+++	0xa7, 0xf7, 0xb8, 0x7b, 0x1b, 0xd5, 0xa9, 0x82,
+++	0x17, 0x6d, 0x18, 0x23, 0x06, 0xff, 0xb8, 0x70
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input032[] __initconst = {
+++	0x10, 0xf1, 0xec, 0xf9, 0xc6, 0x05, 0x84, 0x66,
+++	0x5d, 0x9a, 0xe5, 0xef, 0xe2, 0x79, 0xe7, 0xf7,
+++	0x37, 0x7e, 0xea, 0x69, 0x16, 0xd2, 0xb1, 0x11
+++};
+++static const u8 enc_output032[] __initconst = {
+++	0x42, 0xf2, 0x6c, 0x56, 0xcb, 0x4b, 0xe2, 0x1d,
+++	0x9d, 0x8d, 0x0c, 0x80, 0xfc, 0x99, 0xdd, 0xe0,
+++	0x0d, 0x75, 0xf3, 0x80, 0x74, 0xbf, 0xe7, 0x64,
+++	0x54, 0xaa, 0x7e, 0x13, 0xd4, 0x8f, 0xff, 0x7d,
+++	0x75, 0x57, 0x03, 0x94, 0x57, 0x04, 0x0a, 0x3a
+++};
+++static const u8 enc_assoc032[] __initconst = { };
+++static const u8 enc_nonce032[] __initconst = {
+++	0xe6, 0xb1, 0xad, 0xf2, 0xfd, 0x58, 0xa8, 0x76,
+++	0x2c, 0x65, 0xf3, 0x1b
+++};
+++static const u8 enc_key032[] __initconst = {
+++	0x02, 0x12, 0xa8, 0xde, 0x50, 0x07, 0xed, 0x87,
+++	0xb3, 0x3f, 0x1a, 0x70, 0x90, 0xb6, 0x11, 0x4f,
+++	0x9e, 0x08, 0xce, 0xfd, 0x96, 0x07, 0xf2, 0xc2,
+++	0x76, 0xbd, 0xcf, 0xdb, 0xc5, 0xce, 0x9c, 0xd7
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input033[] __initconst = {
+++	0x92, 0x22, 0xf9, 0x01, 0x8e, 0x54, 0xfd, 0x6d,
+++	0xe1, 0x20, 0x08, 0x06, 0xa9, 0xee, 0x8e, 0x4c,
+++	0xc9, 0x04, 0xd2, 0x9f, 0x25, 0xcb, 0xa1, 0x93
+++};
+++static const u8 enc_output033[] __initconst = {
+++	0x12, 0x30, 0x32, 0x43, 0x7b, 0x4b, 0xfd, 0x69,
+++	0x20, 0xe8, 0xf7, 0xe7, 0xe0, 0x08, 0x7a, 0xe4,
+++	0x88, 0x9e, 0xbe, 0x7a, 0x0a, 0xd0, 0xe9, 0x00,
+++	0x3c, 0xf6, 0x8f, 0x17, 0x95, 0x50, 0xda, 0x63,
+++	0xd3, 0xb9, 0x6c, 0x2d, 0x55, 0x41, 0x18, 0x65
+++};
+++static const u8 enc_assoc033[] __initconst = {
+++	0x3e, 0x8b, 0xc5, 0xad, 0xe1, 0x82, 0xff, 0x08
+++};
+++static const u8 enc_nonce033[] __initconst = {
+++	0x6b, 0x28, 0x2e, 0xbe, 0xcc, 0x54, 0x1b, 0xcd,
+++	0x78, 0x34, 0xed, 0x55
+++};
+++static const u8 enc_key033[] __initconst = {
+++	0xc5, 0xbc, 0x09, 0x56, 0x56, 0x46, 0xe7, 0xed,
+++	0xda, 0x95, 0x4f, 0x1f, 0x73, 0x92, 0x23, 0xda,
+++	0xda, 0x20, 0xb9, 0x5c, 0x44, 0xab, 0x03, 0x3d,
+++	0x0f, 0xae, 0x4b, 0x02, 0x83, 0xd1, 0x8b, 0xe3
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input034[] __initconst = {
+++	0xb0, 0x53, 0x99, 0x92, 0x86, 0xa2, 0x82, 0x4f,
+++	0x42, 0xcc, 0x8c, 0x20, 0x3a, 0xb2, 0x4e, 0x2c,
+++	0x97, 0xa6, 0x85, 0xad, 0xcc, 0x2a, 0xd3, 0x26,
+++	0x62, 0x55, 0x8e, 0x55, 0xa5, 0xc7, 0x29
+++};
+++static const u8 enc_output034[] __initconst = {
+++	0x45, 0xc7, 0xd6, 0xb5, 0x3a, 0xca, 0xd4, 0xab,
+++	0xb6, 0x88, 0x76, 0xa6, 0xe9, 0x6a, 0x48, 0xfb,
+++	0x59, 0x52, 0x4d, 0x2c, 0x92, 0xc9, 0xd8, 0xa1,
+++	0x89, 0xc9, 0xfd, 0x2d, 0xb9, 0x17, 0x46, 0x56,
+++	0x6d, 0x3c, 0xa1, 0x0e, 0x31, 0x1b, 0x69, 0x5f,
+++	0x3e, 0xae, 0x15, 0x51, 0x65, 0x24, 0x93
+++};
+++static const u8 enc_assoc034[] __initconst = { };
+++static const u8 enc_nonce034[] __initconst = {
+++	0x04, 0xa9, 0xbe, 0x03, 0x50, 0x8a, 0x5f, 0x31,
+++	0x37, 0x1a, 0x6f, 0xd2
+++};
+++static const u8 enc_key034[] __initconst = {
+++	0x2e, 0xb5, 0x1c, 0x46, 0x9a, 0xa8, 0xeb, 0x9e,
+++	0x6c, 0x54, 0xa8, 0x34, 0x9b, 0xae, 0x50, 0xa2,
+++	0x0f, 0x0e, 0x38, 0x27, 0x11, 0xbb, 0xa1, 0x15,
+++	0x2c, 0x42, 0x4f, 0x03, 0xb6, 0x67, 0x1d, 0x71
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input035[] __initconst = {
+++	0xf4, 0x52, 0x06, 0xab, 0xc2, 0x55, 0x52, 0xb2,
+++	0xab, 0xc9, 0xab, 0x7f, 0xa2, 0x43, 0x03, 0x5f,
+++	0xed, 0xaa, 0xdd, 0xc3, 0xb2, 0x29, 0x39, 0x56,
+++	0xf1, 0xea, 0x6e, 0x71, 0x56, 0xe7, 0xeb
+++};
+++static const u8 enc_output035[] __initconst = {
+++	0x46, 0xa8, 0x0c, 0x41, 0x87, 0x02, 0x47, 0x20,
+++	0x08, 0x46, 0x27, 0x58, 0x00, 0x80, 0xdd, 0xe5,
+++	0xa3, 0xf4, 0xa1, 0x10, 0x93, 0xa7, 0x07, 0x6e,
+++	0xd6, 0xf3, 0xd3, 0x26, 0xbc, 0x7b, 0x70, 0x53,
+++	0x4d, 0x4a, 0xa2, 0x83, 0x5a, 0x52, 0xe7, 0x2d,
+++	0x14, 0xdf, 0x0e, 0x4f, 0x47, 0xf2, 0x5f
+++};
+++static const u8 enc_assoc035[] __initconst = {
+++	0x37, 0x46, 0x18, 0xa0, 0x6e, 0xa9, 0x8a, 0x48
+++};
+++static const u8 enc_nonce035[] __initconst = {
+++	0x47, 0x0a, 0x33, 0x9e, 0xcb, 0x32, 0x19, 0xb8,
+++	0xb8, 0x1a, 0x1f, 0x8b
+++};
+++static const u8 enc_key035[] __initconst = {
+++	0x7f, 0x5b, 0x74, 0xc0, 0x7e, 0xd1, 0xb4, 0x0f,
+++	0xd1, 0x43, 0x58, 0xfe, 0x2f, 0xf2, 0xa7, 0x40,
+++	0xc1, 0x16, 0xc7, 0x70, 0x65, 0x10, 0xe6, 0xa4,
+++	0x37, 0xf1, 0x9e, 0xa4, 0x99, 0x11, 0xce, 0xc4
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input036[] __initconst = {
+++	0xb9, 0xc5, 0x54, 0xcb, 0xc3, 0x6a, 0xc1, 0x8a,
+++	0xe8, 0x97, 0xdf, 0x7b, 0xee, 0xca, 0xc1, 0xdb,
+++	0xeb, 0x4e, 0xaf, 0xa1, 0x56, 0xbb, 0x60, 0xce,
+++	0x2e, 0x5d, 0x48, 0xf0, 0x57, 0x15, 0xe6, 0x78
+++};
+++static const u8 enc_output036[] __initconst = {
+++	0xea, 0x29, 0xaf, 0xa4, 0x9d, 0x36, 0xe8, 0x76,
+++	0x0f, 0x5f, 0xe1, 0x97, 0x23, 0xb9, 0x81, 0x1e,
+++	0xd5, 0xd5, 0x19, 0x93, 0x4a, 0x44, 0x0f, 0x50,
+++	0x81, 0xac, 0x43, 0x0b, 0x95, 0x3b, 0x0e, 0x21,
+++	0x22, 0x25, 0x41, 0xaf, 0x46, 0xb8, 0x65, 0x33,
+++	0xc6, 0xb6, 0x8d, 0x2f, 0xf1, 0x08, 0xa7, 0xea
+++};
+++static const u8 enc_assoc036[] __initconst = { };
+++static const u8 enc_nonce036[] __initconst = {
+++	0x72, 0xcf, 0xd9, 0x0e, 0xf3, 0x02, 0x6c, 0xa2,
+++	0x2b, 0x7e, 0x6e, 0x6a
+++};
+++static const u8 enc_key036[] __initconst = {
+++	0xe1, 0x73, 0x1d, 0x58, 0x54, 0xe1, 0xb7, 0x0c,
+++	0xb3, 0xff, 0xe8, 0xb7, 0x86, 0xa2, 0xb3, 0xeb,
+++	0xf0, 0x99, 0x43, 0x70, 0x95, 0x47, 0x57, 0xb9,
+++	0xdc, 0x8c, 0x7b, 0xc5, 0x35, 0x46, 0x34, 0xa3
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input037[] __initconst = {
+++	0x6b, 0x26, 0x04, 0x99, 0x6c, 0xd3, 0x0c, 0x14,
+++	0xa1, 0x3a, 0x52, 0x57, 0xed, 0x6c, 0xff, 0xd3,
+++	0xbc, 0x5e, 0x29, 0xd6, 0xb9, 0x7e, 0xb1, 0x79,
+++	0x9e, 0xb3, 0x35, 0xe2, 0x81, 0xea, 0x45, 0x1e
+++};
+++static const u8 enc_output037[] __initconst = {
+++	0x6d, 0xad, 0x63, 0x78, 0x97, 0x54, 0x4d, 0x8b,
+++	0xf6, 0xbe, 0x95, 0x07, 0xed, 0x4d, 0x1b, 0xb2,
+++	0xe9, 0x54, 0xbc, 0x42, 0x7e, 0x5d, 0xe7, 0x29,
+++	0xda, 0xf5, 0x07, 0x62, 0x84, 0x6f, 0xf2, 0xf4,
+++	0x7b, 0x99, 0x7d, 0x93, 0xc9, 0x82, 0x18, 0x9d,
+++	0x70, 0x95, 0xdc, 0x79, 0x4c, 0x74, 0x62, 0x32
+++};
+++static const u8 enc_assoc037[] __initconst = {
+++	0x23, 0x33, 0xe5, 0xce, 0x0f, 0x93, 0xb0, 0x59
+++};
+++static const u8 enc_nonce037[] __initconst = {
+++	0x26, 0x28, 0x80, 0xd4, 0x75, 0xf3, 0xda, 0xc5,
+++	0x34, 0x0d, 0xd1, 0xb8
+++};
+++static const u8 enc_key037[] __initconst = {
+++	0x27, 0xd8, 0x60, 0x63, 0x1b, 0x04, 0x85, 0xa4,
+++	0x10, 0x70, 0x2f, 0xea, 0x61, 0xbc, 0x87, 0x3f,
+++	0x34, 0x42, 0x26, 0x0c, 0xad, 0xed, 0x4a, 0xbd,
+++	0xe2, 0x5b, 0x78, 0x6a, 0x2d, 0x97, 0xf1, 0x45
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input038[] __initconst = {
+++	0x97, 0x3d, 0x0c, 0x75, 0x38, 0x26, 0xba, 0xe4,
+++	0x66, 0xcf, 0x9a, 0xbb, 0x34, 0x93, 0x15, 0x2e,
+++	0x9d, 0xe7, 0x81, 0x9e, 0x2b, 0xd0, 0xc7, 0x11,
+++	0x71, 0x34, 0x6b, 0x4d, 0x2c, 0xeb, 0xf8, 0x04,
+++	0x1a, 0xa3, 0xce, 0xdc, 0x0d, 0xfd, 0x7b, 0x46,
+++	0x7e, 0x26, 0x22, 0x8b, 0xc8, 0x6c, 0x9a
+++};
+++static const u8 enc_output038[] __initconst = {
+++	0xfb, 0xa7, 0x8a, 0xe4, 0xf9, 0xd8, 0x08, 0xa6,
+++	0x2e, 0x3d, 0xa4, 0x0b, 0xe2, 0xcb, 0x77, 0x00,
+++	0xc3, 0x61, 0x3d, 0x9e, 0xb2, 0xc5, 0x29, 0xc6,
+++	0x52, 0xe7, 0x6a, 0x43, 0x2c, 0x65, 0x8d, 0x27,
+++	0x09, 0x5f, 0x0e, 0xb8, 0xf9, 0x40, 0xc3, 0x24,
+++	0x98, 0x1e, 0xa9, 0x35, 0xe5, 0x07, 0xf9, 0x8f,
+++	0x04, 0x69, 0x56, 0xdb, 0x3a, 0x51, 0x29, 0x08,
+++	0xbd, 0x7a, 0xfc, 0x8f, 0x2a, 0xb0, 0xa9
+++};
+++static const u8 enc_assoc038[] __initconst = { };
+++static const u8 enc_nonce038[] __initconst = {
+++	0xe7, 0x4a, 0x51, 0x5e, 0x7e, 0x21, 0x02, 0xb9,
+++	0x0b, 0xef, 0x55, 0xd2
+++};
+++static const u8 enc_key038[] __initconst = {
+++	0xcf, 0x0d, 0x40, 0xa4, 0x64, 0x4e, 0x5f, 0x51,
+++	0x81, 0x51, 0x65, 0xd5, 0x30, 0x1b, 0x22, 0x63,
+++	0x1f, 0x45, 0x44, 0xc4, 0x9a, 0x18, 0x78, 0xe3,
+++	0xa0, 0xa5, 0xe8, 0xe1, 0xaa, 0xe0, 0xf2, 0x64
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input039[] __initconst = {
+++	0xa9, 0x89, 0x95, 0x50, 0x4d, 0xf1, 0x6f, 0x74,
+++	0x8b, 0xfb, 0x77, 0x85, 0xff, 0x91, 0xee, 0xb3,
+++	0xb6, 0x60, 0xea, 0x9e, 0xd3, 0x45, 0x0c, 0x3d,
+++	0x5e, 0x7b, 0x0e, 0x79, 0xef, 0x65, 0x36, 0x59,
+++	0xa9, 0x97, 0x8d, 0x75, 0x54, 0x2e, 0xf9, 0x1c,
+++	0x45, 0x67, 0x62, 0x21, 0x56, 0x40, 0xb9
+++};
+++static const u8 enc_output039[] __initconst = {
+++	0xa1, 0xff, 0xed, 0x80, 0x76, 0x18, 0x29, 0xec,
+++	0xce, 0x24, 0x2e, 0x0e, 0x88, 0xb1, 0x38, 0x04,
+++	0x90, 0x16, 0xbc, 0xa0, 0x18, 0xda, 0x2b, 0x6e,
+++	0x19, 0x98, 0x6b, 0x3e, 0x31, 0x8c, 0xae, 0x8d,
+++	0x80, 0x61, 0x98, 0xfb, 0x4c, 0x52, 0x7c, 0xc3,
+++	0x93, 0x50, 0xeb, 0xdd, 0xea, 0xc5, 0x73, 0xc4,
+++	0xcb, 0xf0, 0xbe, 0xfd, 0xa0, 0xb7, 0x02, 0x42,
+++	0xc6, 0x40, 0xd7, 0xcd, 0x02, 0xd7, 0xa3
+++};
+++static const u8 enc_assoc039[] __initconst = {
+++	0xb3, 0xe4, 0x06, 0x46, 0x83, 0xb0, 0x2d, 0x84
+++};
+++static const u8 enc_nonce039[] __initconst = {
+++	0xd4, 0xd8, 0x07, 0x34, 0x16, 0x83, 0x82, 0x5b,
+++	0x31, 0xcd, 0x4d, 0x95
+++};
+++static const u8 enc_key039[] __initconst = {
+++	0x6c, 0xbf, 0xd7, 0x1c, 0x64, 0x5d, 0x18, 0x4c,
+++	0xf5, 0xd2, 0x3c, 0x40, 0x2b, 0xdb, 0x0d, 0x25,
+++	0xec, 0x54, 0x89, 0x8c, 0x8a, 0x02, 0x73, 0xd4,
+++	0x2e, 0xb5, 0xbe, 0x10, 0x9f, 0xdc, 0xb2, 0xac
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input040[] __initconst = {
+++	0xd0, 0x96, 0x80, 0x31, 0x81, 0xbe, 0xef, 0x9e,
+++	0x00, 0x8f, 0xf8, 0x5d, 0x5d, 0xdc, 0x38, 0xdd,
+++	0xac, 0xf0, 0xf0, 0x9e, 0xe5, 0xf7, 0xe0, 0x7f,
+++	0x1e, 0x40, 0x79, 0xcb, 0x64, 0xd0, 0xdc, 0x8f,
+++	0x5e, 0x67, 0x11, 0xcd, 0x49, 0x21, 0xa7, 0x88,
+++	0x7d, 0xe7, 0x6e, 0x26, 0x78, 0xfd, 0xc6, 0x76,
+++	0x18, 0xf1, 0x18, 0x55, 0x86, 0xbf, 0xea, 0x9d,
+++	0x4c, 0x68, 0x5d, 0x50, 0xe4, 0xbb, 0x9a, 0x82
+++};
+++static const u8 enc_output040[] __initconst = {
+++	0x9a, 0x4e, 0xf2, 0x2b, 0x18, 0x16, 0x77, 0xb5,
+++	0x75, 0x5c, 0x08, 0xf7, 0x47, 0xc0, 0xf8, 0xd8,
+++	0xe8, 0xd4, 0xc1, 0x8a, 0x9c, 0xc2, 0x40, 0x5c,
+++	0x12, 0xbb, 0x51, 0xbb, 0x18, 0x72, 0xc8, 0xe8,
+++	0xb8, 0x77, 0x67, 0x8b, 0xec, 0x44, 0x2c, 0xfc,
+++	0xbb, 0x0f, 0xf4, 0x64, 0xa6, 0x4b, 0x74, 0x33,
+++	0x2c, 0xf0, 0x72, 0x89, 0x8c, 0x7e, 0x0e, 0xdd,
+++	0xf6, 0x23, 0x2e, 0xa6, 0xe2, 0x7e, 0xfe, 0x50,
+++	0x9f, 0xf3, 0x42, 0x7a, 0x0f, 0x32, 0xfa, 0x56,
+++	0x6d, 0x9c, 0xa0, 0xa7, 0x8a, 0xef, 0xc0, 0x13
+++};
+++static const u8 enc_assoc040[] __initconst = { };
+++static const u8 enc_nonce040[] __initconst = {
+++	0xd6, 0x10, 0x40, 0xa3, 0x13, 0xed, 0x49, 0x28,
+++	0x23, 0xcc, 0x06, 0x5b
+++};
+++static const u8 enc_key040[] __initconst = {
+++	0x5b, 0x1d, 0x10, 0x35, 0xc0, 0xb1, 0x7e, 0xe0,
+++	0xb0, 0x44, 0x47, 0x67, 0xf8, 0x0a, 0x25, 0xb8,
+++	0xc1, 0xb7, 0x41, 0xf4, 0xb5, 0x0a, 0x4d, 0x30,
+++	0x52, 0x22, 0x6b, 0xaa, 0x1c, 0x6f, 0xb7, 0x01
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input041[] __initconst = {
+++	0x94, 0xee, 0x16, 0x6d, 0x6d, 0x6e, 0xcf, 0x88,
+++	0x32, 0x43, 0x71, 0x36, 0xb4, 0xae, 0x80, 0x5d,
+++	0x42, 0x88, 0x64, 0x35, 0x95, 0x86, 0xd9, 0x19,
+++	0x3a, 0x25, 0x01, 0x62, 0x93, 0xed, 0xba, 0x44,
+++	0x3c, 0x58, 0xe0, 0x7e, 0x7b, 0x71, 0x95, 0xec,
+++	0x5b, 0xd8, 0x45, 0x82, 0xa9, 0xd5, 0x6c, 0x8d,
+++	0x4a, 0x10, 0x8c, 0x7d, 0x7c, 0xe3, 0x4e, 0x6c,
+++	0x6f, 0x8e, 0xa1, 0xbe, 0xc0, 0x56, 0x73, 0x17
+++};
+++static const u8 enc_output041[] __initconst = {
+++	0x5f, 0xbb, 0xde, 0xcc, 0x34, 0xbe, 0x20, 0x16,
+++	0x14, 0xf6, 0x36, 0x03, 0x1e, 0xeb, 0x42, 0xf1,
+++	0xca, 0xce, 0x3c, 0x79, 0xa1, 0x2c, 0xff, 0xd8,
+++	0x71, 0xee, 0x8e, 0x73, 0x82, 0x0c, 0x82, 0x97,
+++	0x49, 0xf1, 0xab, 0xb4, 0x29, 0x43, 0x67, 0x84,
+++	0x9f, 0xb6, 0xc2, 0xaa, 0x56, 0xbd, 0xa8, 0xa3,
+++	0x07, 0x8f, 0x72, 0x3d, 0x7c, 0x1c, 0x85, 0x20,
+++	0x24, 0xb0, 0x17, 0xb5, 0x89, 0x73, 0xfb, 0x1e,
+++	0x09, 0x26, 0x3d, 0xa7, 0xb4, 0xcb, 0x92, 0x14,
+++	0x52, 0xf9, 0x7d, 0xca, 0x40, 0xf5, 0x80, 0xec
+++};
+++static const u8 enc_assoc041[] __initconst = {
+++	0x71, 0x93, 0xf6, 0x23, 0x66, 0x33, 0x21, 0xa2
+++};
+++static const u8 enc_nonce041[] __initconst = {
+++	0xd3, 0x1c, 0x21, 0xab, 0xa1, 0x75, 0xb7, 0x0d,
+++	0xe4, 0xeb, 0xb1, 0x9c
+++};
+++static const u8 enc_key041[] __initconst = {
+++	0x97, 0xd6, 0x35, 0xc4, 0xf4, 0x75, 0x74, 0xd9,
+++	0x99, 0x8a, 0x90, 0x87, 0x5d, 0xa1, 0xd3, 0xa2,
+++	0x84, 0xb7, 0x55, 0xb2, 0xd3, 0x92, 0x97, 0xa5,
+++	0x72, 0x52, 0x35, 0x19, 0x0e, 0x10, 0xa9, 0x7e
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input042[] __initconst = {
+++	0xb4, 0x29, 0xeb, 0x80, 0xfb, 0x8f, 0xe8, 0xba,
+++	0xed, 0xa0, 0xc8, 0x5b, 0x9c, 0x33, 0x34, 0x58,
+++	0xe7, 0xc2, 0x99, 0x2e, 0x55, 0x84, 0x75, 0x06,
+++	0x9d, 0x12, 0xd4, 0x5c, 0x22, 0x21, 0x75, 0x64,
+++	0x12, 0x15, 0x88, 0x03, 0x22, 0x97, 0xef, 0xf5,
+++	0x67, 0x83, 0x74, 0x2a, 0x5f, 0xc2, 0x2d, 0x74,
+++	0x10, 0xff, 0xb2, 0x9d, 0x66, 0x09, 0x86, 0x61,
+++	0xd7, 0x6f, 0x12, 0x6c, 0x3c, 0x27, 0x68, 0x9e,
+++	0x43, 0xb3, 0x72, 0x67, 0xca, 0xc5, 0xa3, 0xa6,
+++	0xd3, 0xab, 0x49, 0xe3, 0x91, 0xda, 0x29, 0xcd,
+++	0x30, 0x54, 0xa5, 0x69, 0x2e, 0x28, 0x07, 0xe4,
+++	0xc3, 0xea, 0x46, 0xc8, 0x76, 0x1d, 0x50, 0xf5,
+++	0x92
+++};
+++static const u8 enc_output042[] __initconst = {
+++	0xd0, 0x10, 0x2f, 0x6c, 0x25, 0x8b, 0xf4, 0x97,
+++	0x42, 0xce, 0xc3, 0x4c, 0xf2, 0xd0, 0xfe, 0xdf,
+++	0x23, 0xd1, 0x05, 0xfb, 0x4c, 0x84, 0xcf, 0x98,
+++	0x51, 0x5e, 0x1b, 0xc9, 0xa6, 0x4f, 0x8a, 0xd5,
+++	0xbe, 0x8f, 0x07, 0x21, 0xbd, 0xe5, 0x06, 0x45,
+++	0xd0, 0x00, 0x83, 0xc3, 0xa2, 0x63, 0xa3, 0x10,
+++	0x53, 0xb7, 0x60, 0x24, 0x5f, 0x52, 0xae, 0x28,
+++	0x66, 0xa5, 0xec, 0x83, 0xb1, 0x9f, 0x61, 0xbe,
+++	0x1d, 0x30, 0xd5, 0xc5, 0xd9, 0xfe, 0xcc, 0x4c,
+++	0xbb, 0xe0, 0x8f, 0xd3, 0x85, 0x81, 0x3a, 0x2a,
+++	0xa3, 0x9a, 0x00, 0xff, 0x9c, 0x10, 0xf7, 0xf2,
+++	0x37, 0x02, 0xad, 0xd1, 0xe4, 0xb2, 0xff, 0xa3,
+++	0x1c, 0x41, 0x86, 0x5f, 0xc7, 0x1d, 0xe1, 0x2b,
+++	0x19, 0x61, 0x21, 0x27, 0xce, 0x49, 0x99, 0x3b,
+++	0xb0
+++};
+++static const u8 enc_assoc042[] __initconst = { };
+++static const u8 enc_nonce042[] __initconst = {
+++	0x17, 0xc8, 0x6a, 0x8a, 0xbb, 0xb7, 0xe0, 0x03,
+++	0xac, 0xde, 0x27, 0x99
+++};
+++static const u8 enc_key042[] __initconst = {
+++	0xfe, 0x6e, 0x55, 0xbd, 0xae, 0xd1, 0xf7, 0x28,
+++	0x4c, 0xa5, 0xfc, 0x0f, 0x8c, 0x5f, 0x2b, 0x8d,
+++	0xf5, 0x6d, 0xc0, 0xf4, 0x9e, 0x8c, 0xa6, 0x6a,
+++	0x41, 0x99, 0x5e, 0x78, 0x33, 0x51, 0xf9, 0x01
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input043[] __initconst = {
+++	0xce, 0xb5, 0x34, 0xce, 0x50, 0xdc, 0x23, 0xff,
+++	0x63, 0x8a, 0xce, 0x3e, 0xf6, 0x3a, 0xb2, 0xcc,
+++	0x29, 0x73, 0xee, 0xad, 0xa8, 0x07, 0x85, 0xfc,
+++	0x16, 0x5d, 0x06, 0xc2, 0xf5, 0x10, 0x0f, 0xf5,
+++	0xe8, 0xab, 0x28, 0x82, 0xc4, 0x75, 0xaf, 0xcd,
+++	0x05, 0xcc, 0xd4, 0x9f, 0x2e, 0x7d, 0x8f, 0x55,
+++	0xef, 0x3a, 0x72, 0xe3, 0xdc, 0x51, 0xd6, 0x85,
+++	0x2b, 0x8e, 0x6b, 0x9e, 0x7a, 0xec, 0xe5, 0x7b,
+++	0xe6, 0x55, 0x6b, 0x0b, 0x6d, 0x94, 0x13, 0xe3,
+++	0x3f, 0xc5, 0xfc, 0x24, 0xa9, 0xa2, 0x05, 0xad,
+++	0x59, 0x57, 0x4b, 0xb3, 0x9d, 0x94, 0x4a, 0x92,
+++	0xdc, 0x47, 0x97, 0x0d, 0x84, 0xa6, 0xad, 0x31,
+++	0x76
+++};
+++static const u8 enc_output043[] __initconst = {
+++	0x75, 0x45, 0x39, 0x1b, 0x51, 0xde, 0x01, 0xd5,
+++	0xc5, 0x3d, 0xfa, 0xca, 0x77, 0x79, 0x09, 0x06,
+++	0x3e, 0x58, 0xed, 0xee, 0x4b, 0xb1, 0x22, 0x7e,
+++	0x71, 0x10, 0xac, 0x4d, 0x26, 0x20, 0xc2, 0xae,
+++	0xc2, 0xf8, 0x48, 0xf5, 0x6d, 0xee, 0xb0, 0x37,
+++	0xa8, 0xdc, 0xed, 0x75, 0xaf, 0xa8, 0xa6, 0xc8,
+++	0x90, 0xe2, 0xde, 0xe4, 0x2f, 0x95, 0x0b, 0xb3,
+++	0x3d, 0x9e, 0x24, 0x24, 0xd0, 0x8a, 0x50, 0x5d,
+++	0x89, 0x95, 0x63, 0x97, 0x3e, 0xd3, 0x88, 0x70,
+++	0xf3, 0xde, 0x6e, 0xe2, 0xad, 0xc7, 0xfe, 0x07,
+++	0x2c, 0x36, 0x6c, 0x14, 0xe2, 0xcf, 0x7c, 0xa6,
+++	0x2f, 0xb3, 0xd3, 0x6b, 0xee, 0x11, 0x68, 0x54,
+++	0x61, 0xb7, 0x0d, 0x44, 0xef, 0x8c, 0x66, 0xc5,
+++	0xc7, 0xbb, 0xf1, 0x0d, 0xca, 0xdd, 0x7f, 0xac,
+++	0xf6
+++};
+++static const u8 enc_assoc043[] __initconst = {
+++	0xa1, 0x1c, 0x40, 0xb6, 0x03, 0x76, 0x73, 0x30
+++};
+++static const u8 enc_nonce043[] __initconst = {
+++	0x46, 0x36, 0x2f, 0x45, 0xd6, 0x37, 0x9e, 0x63,
+++	0xe5, 0x22, 0x94, 0x60
+++};
+++static const u8 enc_key043[] __initconst = {
+++	0xaa, 0xbc, 0x06, 0x34, 0x74, 0xe6, 0x5c, 0x4c,
+++	0x3e, 0x9b, 0xdc, 0x48, 0x0d, 0xea, 0x97, 0xb4,
+++	0x51, 0x10, 0xc8, 0x61, 0x88, 0x46, 0xff, 0x6b,
+++	0x15, 0xbd, 0xd2, 0xa4, 0xa5, 0x68, 0x2c, 0x4e
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input044[] __initconst = {
+++	0xe5, 0xcc, 0xaa, 0x44, 0x1b, 0xc8, 0x14, 0x68,
+++	0x8f, 0x8f, 0x6e, 0x8f, 0x28, 0xb5, 0x00, 0xb2
+++};
+++static const u8 enc_output044[] __initconst = {
+++	0x7e, 0x72, 0xf5, 0xa1, 0x85, 0xaf, 0x16, 0xa6,
+++	0x11, 0x92, 0x1b, 0x43, 0x8f, 0x74, 0x9f, 0x0b,
+++	0x12, 0x42, 0xc6, 0x70, 0x73, 0x23, 0x34, 0x02,
+++	0x9a, 0xdf, 0xe1, 0xc5, 0x00, 0x16, 0x51, 0xe4
+++};
+++static const u8 enc_assoc044[] __initconst = {
+++	0x02
+++};
+++static const u8 enc_nonce044[] __initconst = {
+++	0x87, 0x34, 0x5f, 0x10, 0x55, 0xfd, 0x9e, 0x21,
+++	0x02, 0xd5, 0x06, 0x56
+++};
+++static const u8 enc_key044[] __initconst = {
+++	0x7d, 0x00, 0xb4, 0x80, 0x95, 0xad, 0xfa, 0x32,
+++	0x72, 0x05, 0x06, 0x07, 0xb2, 0x64, 0x18, 0x50,
+++	0x02, 0xba, 0x99, 0x95, 0x7c, 0x49, 0x8b, 0xe0,
+++	0x22, 0x77, 0x0f, 0x2c, 0xe2, 0xf3, 0x14, 0x3c
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input045[] __initconst = {
+++	0x02, 0xcd, 0xe1, 0x68, 0xfb, 0xa3, 0xf5, 0x44,
+++	0xbb, 0xd0, 0x33, 0x2f, 0x7a, 0xde, 0xad, 0xa8
+++};
+++static const u8 enc_output045[] __initconst = {
+++	0x85, 0xf2, 0x9a, 0x71, 0x95, 0x57, 0xcd, 0xd1,
+++	0x4d, 0x1f, 0x8f, 0xff, 0xab, 0x6d, 0x9e, 0x60,
+++	0x73, 0x2c, 0xa3, 0x2b, 0xec, 0xd5, 0x15, 0xa1,
+++	0xed, 0x35, 0x3f, 0x54, 0x2e, 0x99, 0x98, 0x58
+++};
+++static const u8 enc_assoc045[] __initconst = {
+++	0xb6, 0x48
+++};
+++static const u8 enc_nonce045[] __initconst = {
+++	0x87, 0xa3, 0x16, 0x3e, 0xc0, 0x59, 0x8a, 0xd9,
+++	0x5b, 0x3a, 0xa7, 0x13
+++};
+++static const u8 enc_key045[] __initconst = {
+++	0x64, 0x32, 0x71, 0x7f, 0x1d, 0xb8, 0x5e, 0x41,
+++	0xac, 0x78, 0x36, 0xbc, 0xe2, 0x51, 0x85, 0xa0,
+++	0x80, 0xd5, 0x76, 0x2b, 0x9e, 0x2b, 0x18, 0x44,
+++	0x4b, 0x6e, 0xc7, 0x2c, 0x3b, 0xd8, 0xe4, 0xdc
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input046[] __initconst = {
+++	0x16, 0xdd, 0xd2, 0x3f, 0xf5, 0x3f, 0x3d, 0x23,
+++	0xc0, 0x63, 0x34, 0x48, 0x70, 0x40, 0xeb, 0x47
+++};
+++static const u8 enc_output046[] __initconst = {
+++	0xc1, 0xb2, 0x95, 0x93, 0x6d, 0x56, 0xfa, 0xda,
+++	0xc0, 0x3e, 0x5f, 0x74, 0x2b, 0xff, 0x73, 0xa1,
+++	0x39, 0xc4, 0x57, 0xdb, 0xab, 0x66, 0x38, 0x2b,
+++	0xab, 0xb3, 0xb5, 0x58, 0x00, 0xcd, 0xa5, 0xb8
+++};
+++static const u8 enc_assoc046[] __initconst = {
+++	0xbd, 0x4c, 0xd0, 0x2f, 0xc7, 0x50, 0x2b, 0xbd,
+++	0xbd, 0xf6, 0xc9, 0xa3, 0xcb, 0xe8, 0xf0
+++};
+++static const u8 enc_nonce046[] __initconst = {
+++	0x6f, 0x57, 0x3a, 0xa8, 0x6b, 0xaa, 0x49, 0x2b,
+++	0xa4, 0x65, 0x96, 0xdf
+++};
+++static const u8 enc_key046[] __initconst = {
+++	0x8e, 0x34, 0xcf, 0x73, 0xd2, 0x45, 0xa1, 0x08,
+++	0x2a, 0x92, 0x0b, 0x86, 0x36, 0x4e, 0xb8, 0x96,
+++	0xc4, 0x94, 0x64, 0x67, 0xbc, 0xb3, 0xd5, 0x89,
+++	0x29, 0xfc, 0xb3, 0x66, 0x90, 0xe6, 0x39, 0x4f
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input047[] __initconst = {
+++	0x62, 0x3b, 0x78, 0x50, 0xc3, 0x21, 0xe2, 0xcf,
+++	0x0c, 0x6f, 0xbc, 0xc8, 0xdf, 0xd1, 0xaf, 0xf2
+++};
+++static const u8 enc_output047[] __initconst = {
+++	0xc8, 0x4c, 0x9b, 0xb7, 0xc6, 0x1c, 0x1b, 0xcb,
+++	0x17, 0x77, 0x2a, 0x1c, 0x50, 0x0c, 0x50, 0x95,
+++	0xdb, 0xad, 0xf7, 0xa5, 0x13, 0x8c, 0xa0, 0x34,
+++	0x59, 0xa2, 0xcd, 0x65, 0x83, 0x1e, 0x09, 0x2f
+++};
+++static const u8 enc_assoc047[] __initconst = {
+++	0x89, 0xcc, 0xe9, 0xfb, 0x47, 0x44, 0x1d, 0x07,
+++	0xe0, 0x24, 0x5a, 0x66, 0xfe, 0x8b, 0x77, 0x8b
+++};
+++static const u8 enc_nonce047[] __initconst = {
+++	0x1a, 0x65, 0x18, 0xf0, 0x2e, 0xde, 0x1d, 0xa6,
+++	0x80, 0x92, 0x66, 0xd9
+++};
+++static const u8 enc_key047[] __initconst = {
+++	0xcb, 0x55, 0x75, 0xf5, 0xc7, 0xc4, 0x5c, 0x91,
+++	0xcf, 0x32, 0x0b, 0x13, 0x9f, 0xb5, 0x94, 0x23,
+++	0x75, 0x60, 0xd0, 0xa3, 0xe6, 0xf8, 0x65, 0xa6,
+++	0x7d, 0x4f, 0x63, 0x3f, 0x2c, 0x08, 0xf0, 0x16
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input048[] __initconst = {
+++	0x87, 0xb3, 0xa4, 0xd7, 0xb2, 0x6d, 0x8d, 0x32,
+++	0x03, 0xa0, 0xde, 0x1d, 0x64, 0xef, 0x82, 0xe3
+++};
+++static const u8 enc_output048[] __initconst = {
+++	0x94, 0xbc, 0x80, 0x62, 0x1e, 0xd1, 0xe7, 0x1b,
+++	0x1f, 0xd2, 0xb5, 0xc3, 0xa1, 0x5e, 0x35, 0x68,
+++	0x33, 0x35, 0x11, 0x86, 0x17, 0x96, 0x97, 0x84,
+++	0x01, 0x59, 0x8b, 0x96, 0x37, 0x22, 0xf5, 0xb3
+++};
+++static const u8 enc_assoc048[] __initconst = {
+++	0xd1, 0x9f, 0x2d, 0x98, 0x90, 0x95, 0xf7, 0xab,
+++	0x03, 0xa5, 0xfd, 0xe8, 0x44, 0x16, 0xe0, 0x0c,
+++	0x0e
+++};
+++static const u8 enc_nonce048[] __initconst = {
+++	0x56, 0x4d, 0xee, 0x49, 0xab, 0x00, 0xd2, 0x40,
+++	0xfc, 0x10, 0x68, 0xc3
+++};
+++static const u8 enc_key048[] __initconst = {
+++	0xa5, 0x56, 0x9e, 0x72, 0x9a, 0x69, 0xb2, 0x4b,
+++	0xa6, 0xe0, 0xff, 0x15, 0xc4, 0x62, 0x78, 0x97,
+++	0x43, 0x68, 0x24, 0xc9, 0x41, 0xe9, 0xd0, 0x0b,
+++	0x2e, 0x93, 0xfd, 0xdc, 0x4b, 0xa7, 0x76, 0x57
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input049[] __initconst = {
+++	0xe6, 0x01, 0xb3, 0x85, 0x57, 0x79, 0x7d, 0xa2,
+++	0xf8, 0xa4, 0x10, 0x6a, 0x08, 0x9d, 0x1d, 0xa6
+++};
+++static const u8 enc_output049[] __initconst = {
+++	0x29, 0x9b, 0x5d, 0x3f, 0x3d, 0x03, 0xc0, 0x87,
+++	0x20, 0x9a, 0x16, 0xe2, 0x85, 0x14, 0x31, 0x11,
+++	0x4b, 0x45, 0x4e, 0xd1, 0x98, 0xde, 0x11, 0x7e,
+++	0x83, 0xec, 0x49, 0xfa, 0x8d, 0x85, 0x08, 0xd6
+++};
+++static const u8 enc_assoc049[] __initconst = {
+++	0x5e, 0x64, 0x70, 0xfa, 0xcd, 0x99, 0xc1, 0xd8,
+++	0x1e, 0x37, 0xcd, 0x44, 0x01, 0x5f, 0xe1, 0x94,
+++	0x80, 0xa2, 0xa4, 0xd3, 0x35, 0x2a, 0x4f, 0xf5,
+++	0x60, 0xc0, 0x64, 0x0f, 0xdb, 0xda
+++};
+++static const u8 enc_nonce049[] __initconst = {
+++	0xdf, 0x87, 0x13, 0xe8, 0x7e, 0xc3, 0xdb, 0xcf,
+++	0xad, 0x14, 0xd5, 0x3e
+++};
+++static const u8 enc_key049[] __initconst = {
+++	0x56, 0x20, 0x74, 0x65, 0xb4, 0xe4, 0x8e, 0x6d,
+++	0x04, 0x63, 0x0f, 0x4a, 0x42, 0xf3, 0x5c, 0xfc,
+++	0x16, 0x3a, 0xb2, 0x89, 0xc2, 0x2a, 0x2b, 0x47,
+++	0x84, 0xf6, 0xf9, 0x29, 0x03, 0x30, 0xbe, 0xe0
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input050[] __initconst = {
+++	0xdc, 0x9e, 0x9e, 0xaf, 0x11, 0xe3, 0x14, 0x18,
+++	0x2d, 0xf6, 0xa4, 0xeb, 0xa1, 0x7a, 0xec, 0x9c
+++};
+++static const u8 enc_output050[] __initconst = {
+++	0x60, 0x5b, 0xbf, 0x90, 0xae, 0xb9, 0x74, 0xf6,
+++	0x60, 0x2b, 0xc7, 0x78, 0x05, 0x6f, 0x0d, 0xca,
+++	0x38, 0xea, 0x23, 0xd9, 0x90, 0x54, 0xb4, 0x6b,
+++	0x42, 0xff, 0xe0, 0x04, 0x12, 0x9d, 0x22, 0x04
+++};
+++static const u8 enc_assoc050[] __initconst = {
+++	0xba, 0x44, 0x6f, 0x6f, 0x9a, 0x0c, 0xed, 0x22,
+++	0x45, 0x0f, 0xeb, 0x10, 0x73, 0x7d, 0x90, 0x07,
+++	0xfd, 0x69, 0xab, 0xc1, 0x9b, 0x1d, 0x4d, 0x90,
+++	0x49, 0xa5, 0x55, 0x1e, 0x86, 0xec, 0x2b, 0x37
+++};
+++static const u8 enc_nonce050[] __initconst = {
+++	0x8d, 0xf4, 0xb1, 0x5a, 0x88, 0x8c, 0x33, 0x28,
+++	0x6a, 0x7b, 0x76, 0x51
+++};
+++static const u8 enc_key050[] __initconst = {
+++	0x39, 0x37, 0x98, 0x6a, 0xf8, 0x6d, 0xaf, 0xc1,
+++	0xba, 0x0c, 0x46, 0x72, 0xd8, 0xab, 0xc4, 0x6c,
+++	0x20, 0x70, 0x62, 0x68, 0x2d, 0x9c, 0x26, 0x4a,
+++	0xb0, 0x6d, 0x6c, 0x58, 0x07, 0x20, 0x51, 0x30
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input051[] __initconst = {
+++	0x81, 0xce, 0x84, 0xed, 0xe9, 0xb3, 0x58, 0x59,
+++	0xcc, 0x8c, 0x49, 0xa8, 0xf6, 0xbe, 0x7d, 0xc6
+++};
+++static const u8 enc_output051[] __initconst = {
+++	0x7b, 0x7c, 0xe0, 0xd8, 0x24, 0x80, 0x9a, 0x70,
+++	0xde, 0x32, 0x56, 0x2c, 0xcf, 0x2c, 0x2b, 0xbd,
+++	0x15, 0xd4, 0x4a, 0x00, 0xce, 0x0d, 0x19, 0xb4,
+++	0x23, 0x1f, 0x92, 0x1e, 0x22, 0xbc, 0x0a, 0x43
+++};
+++static const u8 enc_assoc051[] __initconst = {
+++	0xd4, 0x1a, 0x82, 0x8d, 0x5e, 0x71, 0x82, 0x92,
+++	0x47, 0x02, 0x19, 0x05, 0x40, 0x2e, 0xa2, 0x57,
+++	0xdc, 0xcb, 0xc3, 0xb8, 0x0f, 0xcd, 0x56, 0x75,
+++	0x05, 0x6b, 0x68, 0xbb, 0x59, 0xe6, 0x2e, 0x88,
+++	0x73
+++};
+++static const u8 enc_nonce051[] __initconst = {
+++	0xbe, 0x40, 0xe5, 0xf1, 0xa1, 0x18, 0x17, 0xa0,
+++	0xa8, 0xfa, 0x89, 0x49
+++};
+++static const u8 enc_key051[] __initconst = {
+++	0x36, 0x37, 0x2a, 0xbc, 0xdb, 0x78, 0xe0, 0x27,
+++	0x96, 0x46, 0xac, 0x3d, 0x17, 0x6b, 0x96, 0x74,
+++	0xe9, 0x15, 0x4e, 0xec, 0xf0, 0xd5, 0x46, 0x9c,
+++	0x65, 0x1e, 0xc7, 0xe1, 0x6b, 0x4c, 0x11, 0x99
+++};
+++
+++/* wycheproof - misc */
+++static const u8 enc_input052[] __initconst = {
+++	0xa6, 0x67, 0x47, 0xc8, 0x9e, 0x85, 0x7a, 0xf3,
+++	0xa1, 0x8e, 0x2c, 0x79, 0x50, 0x00, 0x87, 0xed
+++};
+++static const u8 enc_output052[] __initconst = {
+++	0xca, 0x82, 0xbf, 0xf3, 0xe2, 0xf3, 0x10, 0xcc,
+++	0xc9, 0x76, 0x67, 0x2c, 0x44, 0x15, 0xe6, 0x9b,
+++	0x57, 0x63, 0x8c, 0x62, 0xa5, 0xd8, 0x5d, 0xed,
+++	0x77, 0x4f, 0x91, 0x3c, 0x81, 0x3e, 0xa0, 0x32
+++};
+++static const u8 enc_assoc052[] __initconst = {
+++	0x3f, 0x2d, 0xd4, 0x9b, 0xbf, 0x09, 0xd6, 0x9a,
+++	0x78, 0xa3, 0xd8, 0x0e, 0xa2, 0x56, 0x66, 0x14,
+++	0xfc, 0x37, 0x94, 0x74, 0x19, 0x6c, 0x1a, 0xae,
+++	0x84, 0x58, 0x3d, 0xa7, 0x3d, 0x7f, 0xf8, 0x5c,
+++	0x6f, 0x42, 0xca, 0x42, 0x05, 0x6a, 0x97, 0x92,
+++	0xcc, 0x1b, 0x9f, 0xb3, 0xc7, 0xd2, 0x61
+++};
+++static const u8 enc_nonce052[] __initconst = {
+++	0x84, 0xc8, 0x7d, 0xae, 0x4e, 0xee, 0x27, 0x73,
+++	0x0e, 0xc3, 0x5d, 0x12
+++};
+++static const u8 enc_key052[] __initconst = {
+++	0x9f, 0x14, 0x79, 0xed, 0x09, 0x7d, 0x7f, 0xe5,
+++	0x29, 0xc1, 0x1f, 0x2f, 0x5a, 0xdd, 0x9a, 0xaf,
+++	0xf4, 0xa1, 0xca, 0x0b, 0x68, 0x99, 0x7a, 0x2c,
+++	0xb7, 0xf7, 0x97, 0x49, 0xbd, 0x90, 0xaa, 0xf4
+++};
+++
++ /* wycheproof - misc */
++ static const u8 enc_input053[] __initconst = {
++ 	0x25, 0x6d, 0x40, 0x88, 0x80, 0x94, 0x17, 0x83,
++@@ -2760,6 +3859,126 @@ static const u8 enc_key073[] __initconst
++ };
++ 
++ /* wycheproof - checking for int overflows */
+++static const u8 enc_input074[] __initconst = {
+++	0xd4, 0x50, 0x0b, 0xf0, 0x09, 0x49, 0x35, 0x51,
+++	0xc3, 0x80, 0xad, 0xf5, 0x2c, 0x57, 0x3a, 0x69,
+++	0xdf, 0x7e, 0x8b, 0x76, 0x24, 0x63, 0x33, 0x0f,
+++	0xac, 0xc1, 0x6a, 0x57, 0x26, 0xbe, 0x71, 0x90,
+++	0xc6, 0x3c, 0x5a, 0x1c, 0x92, 0x65, 0x84, 0xa0,
+++	0x96, 0x75, 0x68, 0x28, 0xdc, 0xdc, 0x64, 0xac,
+++	0xdf, 0x96, 0x3d, 0x93, 0x1b, 0xf1, 0xda, 0xe2,
+++	0x38, 0xf3, 0xf1, 0x57, 0x22, 0x4a, 0xc4, 0xb5,
+++	0x42, 0xd7, 0x85, 0xb0, 0xdd, 0x84, 0xdb, 0x6b,
+++	0xe3, 0xbc, 0x5a, 0x36, 0x63, 0xe8, 0x41, 0x49,
+++	0xff, 0xbe, 0xd0, 0x9e, 0x54, 0xf7, 0x8f, 0x16,
+++	0xa8, 0x22, 0x3b, 0x24, 0xcb, 0x01, 0x9f, 0x58,
+++	0xb2, 0x1b, 0x0e, 0x55, 0x1e, 0x7a, 0xa0, 0x73,
+++	0x27, 0x62, 0x95, 0x51, 0x37, 0x6c, 0xcb, 0xc3,
+++	0x93, 0x76, 0x71, 0xa0, 0x62, 0x9b, 0xd9, 0x5c,
+++	0x99, 0x15, 0xc7, 0x85, 0x55, 0x77, 0x1e, 0x7a
+++};
+++static const u8 enc_output074[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x0b, 0x30, 0x0d, 0x8d, 0xa5, 0x6c, 0x21, 0x85,
+++	0x75, 0x52, 0x79, 0x55, 0x3c, 0x4c, 0x82, 0xca
+++};
+++static const u8 enc_assoc074[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce074[] __initconst = {
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x00, 0x02, 0x50, 0x6e
+++};
+++static const u8 enc_key074[] __initconst = {
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30
+++};
+++
+++/* wycheproof - checking for int overflows */
+++static const u8 enc_input075[] __initconst = {
+++	0x7d, 0xe8, 0x7f, 0x67, 0x29, 0x94, 0x52, 0x75,
+++	0xd0, 0x65, 0x5d, 0xa4, 0xc7, 0xfd, 0xe4, 0x56,
+++	0x9e, 0x16, 0xf1, 0x11, 0xb5, 0xeb, 0x26, 0xc2,
+++	0x2d, 0x85, 0x9e, 0x3f, 0xf8, 0x22, 0xec, 0xed,
+++	0x3a, 0x6d, 0xd9, 0xa6, 0x0f, 0x22, 0x95, 0x7f,
+++	0x7b, 0x7c, 0x85, 0x7e, 0x88, 0x22, 0xeb, 0x9f,
+++	0xe0, 0xb8, 0xd7, 0x02, 0x21, 0x41, 0xf2, 0xd0,
+++	0xb4, 0x8f, 0x4b, 0x56, 0x12, 0xd3, 0x22, 0xa8,
+++	0x8d, 0xd0, 0xfe, 0x0b, 0x4d, 0x91, 0x79, 0x32,
+++	0x4f, 0x7c, 0x6c, 0x9e, 0x99, 0x0e, 0xfb, 0xd8,
+++	0x0e, 0x5e, 0xd6, 0x77, 0x58, 0x26, 0x49, 0x8b,
+++	0x1e, 0xfe, 0x0f, 0x71, 0xa0, 0xf3, 0xec, 0x5b,
+++	0x29, 0xcb, 0x28, 0xc2, 0x54, 0x0a, 0x7d, 0xcd,
+++	0x51, 0xb7, 0xda, 0xae, 0xe0, 0xff, 0x4a, 0x7f,
+++	0x3a, 0xc1, 0xee, 0x54, 0xc2, 0x9e, 0xe4, 0xc1,
+++	0x70, 0xde, 0x40, 0x8f, 0x66, 0x69, 0x21, 0x94
+++};
+++static const u8 enc_output075[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xc5, 0x78, 0xe2, 0xaa, 0x44, 0xd3, 0x09, 0xb7,
+++	0xb6, 0xa5, 0x19, 0x3b, 0xdc, 0x61, 0x18, 0xf5
+++};
+++static const u8 enc_assoc075[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_nonce075[] __initconst = {
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x00, 0x03, 0x18, 0xa5
+++};
+++static const u8 enc_key075[] __initconst = {
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
+++	0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30
+++};
+++
+++/* wycheproof - checking for int overflows */
++ static const u8 enc_input076[] __initconst = {
++ 	0x1b, 0x99, 0x6f, 0x9a, 0x3c, 0xcc, 0x67, 0x85,
++ 	0xde, 0x22, 0xff, 0x5b, 0x8a, 0xdd, 0x95, 0x02,
++@@ -3349,6 +4568,286 @@ static const u8 enc_key085[] __initconst
++ 	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
++ };
++ 
+++/* wycheproof - special case tag */
+++static const u8 enc_input086[] __initconst = {
+++	0x9a, 0x49, 0xc4, 0x0f, 0x8b, 0x48, 0xd7, 0xc6,
+++	0x6d, 0x1d, 0xb4, 0xe5, 0x3f, 0x20, 0xf2, 0xdd,
+++	0x4a, 0xaa, 0x24, 0x1d, 0xda, 0xb2, 0x6b, 0x5b,
+++	0xc0, 0xe2, 0x18, 0xb7, 0x2c, 0x33, 0x90, 0xf2,
+++	0xdf, 0x3e, 0xbd, 0x01, 0x76, 0x70, 0x44, 0x19,
+++	0x97, 0x2b, 0xcd, 0xbc, 0x6b, 0xbc, 0xb3, 0xe4,
+++	0xe7, 0x4a, 0x71, 0x52, 0x8e, 0xf5, 0x12, 0x63,
+++	0xce, 0x24, 0xe0, 0xd5, 0x75, 0xe0, 0xe4, 0x4d
+++};
+++static const u8 enc_output086[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+++	0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
+++};
+++static const u8 enc_assoc086[] __initconst = {
+++	0x85, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xa6, 0x90, 0x2f, 0xcb, 0xc8, 0x83, 0xbb, 0xc1,
+++	0x80, 0xb2, 0x56, 0xae, 0x34, 0xad, 0x7f, 0x00
+++};
+++static const u8 enc_nonce086[] __initconst = {
+++	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+++	0x08, 0x09, 0x0a, 0x0b
+++};
+++static const u8 enc_key086[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - special case tag */
+++static const u8 enc_input087[] __initconst = {
+++	0x9a, 0x49, 0xc4, 0x0f, 0x8b, 0x48, 0xd7, 0xc6,
+++	0x6d, 0x1d, 0xb4, 0xe5, 0x3f, 0x20, 0xf2, 0xdd,
+++	0x4a, 0xaa, 0x24, 0x1d, 0xda, 0xb2, 0x6b, 0x5b,
+++	0xc0, 0xe2, 0x18, 0xb7, 0x2c, 0x33, 0x90, 0xf2,
+++	0xdf, 0x3e, 0xbd, 0x01, 0x76, 0x70, 0x44, 0x19,
+++	0x97, 0x2b, 0xcd, 0xbc, 0x6b, 0xbc, 0xb3, 0xe4,
+++	0xe7, 0x4a, 0x71, 0x52, 0x8e, 0xf5, 0x12, 0x63,
+++	0xce, 0x24, 0xe0, 0xd5, 0x75, 0xe0, 0xe4, 0x4d
+++};
+++static const u8 enc_output087[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+++};
+++static const u8 enc_assoc087[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x24, 0x7e, 0x50, 0x64, 0x2a, 0x1c, 0x0a, 0x2f,
+++	0x8f, 0x77, 0x21, 0x96, 0x09, 0xdb, 0xa9, 0x58
+++};
+++static const u8 enc_nonce087[] __initconst = {
+++	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+++	0x08, 0x09, 0x0a, 0x0b
+++};
+++static const u8 enc_key087[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - special case tag */
+++static const u8 enc_input088[] __initconst = {
+++	0x9a, 0x49, 0xc4, 0x0f, 0x8b, 0x48, 0xd7, 0xc6,
+++	0x6d, 0x1d, 0xb4, 0xe5, 0x3f, 0x20, 0xf2, 0xdd,
+++	0x4a, 0xaa, 0x24, 0x1d, 0xda, 0xb2, 0x6b, 0x5b,
+++	0xc0, 0xe2, 0x18, 0xb7, 0x2c, 0x33, 0x90, 0xf2,
+++	0xdf, 0x3e, 0xbd, 0x01, 0x76, 0x70, 0x44, 0x19,
+++	0x97, 0x2b, 0xcd, 0xbc, 0x6b, 0xbc, 0xb3, 0xe4,
+++	0xe7, 0x4a, 0x71, 0x52, 0x8e, 0xf5, 0x12, 0x63,
+++	0xce, 0x24, 0xe0, 0xd5, 0x75, 0xe0, 0xe4, 0x4d
+++};
+++static const u8 enc_output088[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+++};
+++static const u8 enc_assoc088[] __initconst = {
+++	0x7c, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xd9, 0xe7, 0x2c, 0x06, 0x4a, 0xc8, 0x96, 0x1f,
+++	0x3f, 0xa5, 0x85, 0xe0, 0xe2, 0xab, 0xd6, 0x00
+++};
+++static const u8 enc_nonce088[] __initconst = {
+++	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+++	0x08, 0x09, 0x0a, 0x0b
+++};
+++static const u8 enc_key088[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - special case tag */
+++static const u8 enc_input089[] __initconst = {
+++	0x9a, 0x49, 0xc4, 0x0f, 0x8b, 0x48, 0xd7, 0xc6,
+++	0x6d, 0x1d, 0xb4, 0xe5, 0x3f, 0x20, 0xf2, 0xdd,
+++	0x4a, 0xaa, 0x24, 0x1d, 0xda, 0xb2, 0x6b, 0x5b,
+++	0xc0, 0xe2, 0x18, 0xb7, 0x2c, 0x33, 0x90, 0xf2,
+++	0xdf, 0x3e, 0xbd, 0x01, 0x76, 0x70, 0x44, 0x19,
+++	0x97, 0x2b, 0xcd, 0xbc, 0x6b, 0xbc, 0xb3, 0xe4,
+++	0xe7, 0x4a, 0x71, 0x52, 0x8e, 0xf5, 0x12, 0x63,
+++	0xce, 0x24, 0xe0, 0xd5, 0x75, 0xe0, 0xe4, 0x4d
+++};
+++static const u8 enc_output089[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
+++	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80
+++};
+++static const u8 enc_assoc089[] __initconst = {
+++	0x65, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x95, 0xaf, 0x0f, 0x4d, 0x0b, 0x68, 0x6e, 0xae,
+++	0xcc, 0xca, 0x43, 0x07, 0xd5, 0x96, 0xf5, 0x02
+++};
+++static const u8 enc_nonce089[] __initconst = {
+++	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+++	0x08, 0x09, 0x0a, 0x0b
+++};
+++static const u8 enc_key089[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - special case tag */
+++static const u8 enc_input090[] __initconst = {
+++	0x9a, 0x49, 0xc4, 0x0f, 0x8b, 0x48, 0xd7, 0xc6,
+++	0x6d, 0x1d, 0xb4, 0xe5, 0x3f, 0x20, 0xf2, 0xdd,
+++	0x4a, 0xaa, 0x24, 0x1d, 0xda, 0xb2, 0x6b, 0x5b,
+++	0xc0, 0xe2, 0x18, 0xb7, 0x2c, 0x33, 0x90, 0xf2,
+++	0xdf, 0x3e, 0xbd, 0x01, 0x76, 0x70, 0x44, 0x19,
+++	0x97, 0x2b, 0xcd, 0xbc, 0x6b, 0xbc, 0xb3, 0xe4,
+++	0xe7, 0x4a, 0x71, 0x52, 0x8e, 0xf5, 0x12, 0x63,
+++	0xce, 0x24, 0xe0, 0xd5, 0x75, 0xe0, 0xe4, 0x4d
+++};
+++static const u8 enc_output090[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f,
+++	0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f
+++};
+++static const u8 enc_assoc090[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x85, 0x40, 0xb4, 0x64, 0x35, 0x77, 0x07, 0xbe,
+++	0x3a, 0x39, 0xd5, 0x5c, 0x34, 0xf8, 0xbc, 0xb3
+++};
+++static const u8 enc_nonce090[] __initconst = {
+++	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+++	0x08, 0x09, 0x0a, 0x0b
+++};
+++static const u8 enc_key090[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - special case tag */
+++static const u8 enc_input091[] __initconst = {
+++	0x9a, 0x49, 0xc4, 0x0f, 0x8b, 0x48, 0xd7, 0xc6,
+++	0x6d, 0x1d, 0xb4, 0xe5, 0x3f, 0x20, 0xf2, 0xdd,
+++	0x4a, 0xaa, 0x24, 0x1d, 0xda, 0xb2, 0x6b, 0x5b,
+++	0xc0, 0xe2, 0x18, 0xb7, 0x2c, 0x33, 0x90, 0xf2,
+++	0xdf, 0x3e, 0xbd, 0x01, 0x76, 0x70, 0x44, 0x19,
+++	0x97, 0x2b, 0xcd, 0xbc, 0x6b, 0xbc, 0xb3, 0xe4,
+++	0xe7, 0x4a, 0x71, 0x52, 0x8e, 0xf5, 0x12, 0x63,
+++	0xce, 0x24, 0xe0, 0xd5, 0x75, 0xe0, 0xe4, 0x4d
+++};
+++static const u8 enc_output091[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+++	0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00
+++};
+++static const u8 enc_assoc091[] __initconst = {
+++	0x4f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x66, 0x23, 0xd9, 0x90, 0xb8, 0x98, 0xd8, 0x30,
+++	0xd2, 0x12, 0xaf, 0x23, 0x83, 0x33, 0x07, 0x01
+++};
+++static const u8 enc_nonce091[] __initconst = {
+++	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+++	0x08, 0x09, 0x0a, 0x0b
+++};
+++static const u8 enc_key091[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
+++/* wycheproof - special case tag */
+++static const u8 enc_input092[] __initconst = {
+++	0x9a, 0x49, 0xc4, 0x0f, 0x8b, 0x48, 0xd7, 0xc6,
+++	0x6d, 0x1d, 0xb4, 0xe5, 0x3f, 0x20, 0xf2, 0xdd,
+++	0x4a, 0xaa, 0x24, 0x1d, 0xda, 0xb2, 0x6b, 0x5b,
+++	0xc0, 0xe2, 0x18, 0xb7, 0x2c, 0x33, 0x90, 0xf2,
+++	0xdf, 0x3e, 0xbd, 0x01, 0x76, 0x70, 0x44, 0x19,
+++	0x97, 0x2b, 0xcd, 0xbc, 0x6b, 0xbc, 0xb3, 0xe4,
+++	0xe7, 0x4a, 0x71, 0x52, 0x8e, 0xf5, 0x12, 0x63,
+++	0xce, 0x24, 0xe0, 0xd5, 0x75, 0xe0, 0xe4, 0x4d
+++};
+++static const u8 enc_output092[] __initconst = {
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+++	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+++};
+++static const u8 enc_assoc092[] __initconst = {
+++	0x83, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+++	0x5f, 0x16, 0xd0, 0x9f, 0x17, 0x78, 0x72, 0x11,
+++	0xb7, 0xd4, 0x84, 0xe0, 0x24, 0xf8, 0x97, 0x01
+++};
+++static const u8 enc_nonce092[] __initconst = {
+++	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+++	0x08, 0x09, 0x0a, 0x0b
+++};
+++static const u8 enc_key092[] __initconst = {
+++	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+++	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+++	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+++	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f
+++};
+++
++ /* wycheproof - edge case intermediate sums in poly1305 */
++ static const u8 enc_input093[] __initconst = {
++ 	0x00, 0x52, 0x35, 0xd2, 0xa9, 0x19, 0xf2, 0x8d,
++@@ -4455,6 +5954,86 @@ chacha20poly1305_enc_vectors[] __initcon
++ 	  sizeof(enc_input011), sizeof(enc_assoc011), sizeof(enc_nonce011) },
++ 	{ enc_input012, enc_output012, enc_assoc012, enc_nonce012, enc_key012,
++ 	  sizeof(enc_input012), sizeof(enc_assoc012), sizeof(enc_nonce012) },
+++	{ enc_input013, enc_output013, enc_assoc013, enc_nonce013, enc_key013,
+++	  sizeof(enc_input013), sizeof(enc_assoc013), sizeof(enc_nonce013) },
+++	{ enc_input014, enc_output014, enc_assoc014, enc_nonce014, enc_key014,
+++	  sizeof(enc_input014), sizeof(enc_assoc014), sizeof(enc_nonce014) },
+++	{ enc_input015, enc_output015, enc_assoc015, enc_nonce015, enc_key015,
+++	  sizeof(enc_input015), sizeof(enc_assoc015), sizeof(enc_nonce015) },
+++	{ enc_input016, enc_output016, enc_assoc016, enc_nonce016, enc_key016,
+++	  sizeof(enc_input016), sizeof(enc_assoc016), sizeof(enc_nonce016) },
+++	{ enc_input017, enc_output017, enc_assoc017, enc_nonce017, enc_key017,
+++	  sizeof(enc_input017), sizeof(enc_assoc017), sizeof(enc_nonce017) },
+++	{ enc_input018, enc_output018, enc_assoc018, enc_nonce018, enc_key018,
+++	  sizeof(enc_input018), sizeof(enc_assoc018), sizeof(enc_nonce018) },
+++	{ enc_input019, enc_output019, enc_assoc019, enc_nonce019, enc_key019,
+++	  sizeof(enc_input019), sizeof(enc_assoc019), sizeof(enc_nonce019) },
+++	{ enc_input020, enc_output020, enc_assoc020, enc_nonce020, enc_key020,
+++	  sizeof(enc_input020), sizeof(enc_assoc020), sizeof(enc_nonce020) },
+++	{ enc_input021, enc_output021, enc_assoc021, enc_nonce021, enc_key021,
+++	  sizeof(enc_input021), sizeof(enc_assoc021), sizeof(enc_nonce021) },
+++	{ enc_input022, enc_output022, enc_assoc022, enc_nonce022, enc_key022,
+++	  sizeof(enc_input022), sizeof(enc_assoc022), sizeof(enc_nonce022) },
+++	{ enc_input023, enc_output023, enc_assoc023, enc_nonce023, enc_key023,
+++	  sizeof(enc_input023), sizeof(enc_assoc023), sizeof(enc_nonce023) },
+++	{ enc_input024, enc_output024, enc_assoc024, enc_nonce024, enc_key024,
+++	  sizeof(enc_input024), sizeof(enc_assoc024), sizeof(enc_nonce024) },
+++	{ enc_input025, enc_output025, enc_assoc025, enc_nonce025, enc_key025,
+++	  sizeof(enc_input025), sizeof(enc_assoc025), sizeof(enc_nonce025) },
+++	{ enc_input026, enc_output026, enc_assoc026, enc_nonce026, enc_key026,
+++	  sizeof(enc_input026), sizeof(enc_assoc026), sizeof(enc_nonce026) },
+++	{ enc_input027, enc_output027, enc_assoc027, enc_nonce027, enc_key027,
+++	  sizeof(enc_input027), sizeof(enc_assoc027), sizeof(enc_nonce027) },
+++	{ enc_input028, enc_output028, enc_assoc028, enc_nonce028, enc_key028,
+++	  sizeof(enc_input028), sizeof(enc_assoc028), sizeof(enc_nonce028) },
+++	{ enc_input029, enc_output029, enc_assoc029, enc_nonce029, enc_key029,
+++	  sizeof(enc_input029), sizeof(enc_assoc029), sizeof(enc_nonce029) },
+++	{ enc_input030, enc_output030, enc_assoc030, enc_nonce030, enc_key030,
+++	  sizeof(enc_input030), sizeof(enc_assoc030), sizeof(enc_nonce030) },
+++	{ enc_input031, enc_output031, enc_assoc031, enc_nonce031, enc_key031,
+++	  sizeof(enc_input031), sizeof(enc_assoc031), sizeof(enc_nonce031) },
+++	{ enc_input032, enc_output032, enc_assoc032, enc_nonce032, enc_key032,
+++	  sizeof(enc_input032), sizeof(enc_assoc032), sizeof(enc_nonce032) },
+++	{ enc_input033, enc_output033, enc_assoc033, enc_nonce033, enc_key033,
+++	  sizeof(enc_input033), sizeof(enc_assoc033), sizeof(enc_nonce033) },
+++	{ enc_input034, enc_output034, enc_assoc034, enc_nonce034, enc_key034,
+++	  sizeof(enc_input034), sizeof(enc_assoc034), sizeof(enc_nonce034) },
+++	{ enc_input035, enc_output035, enc_assoc035, enc_nonce035, enc_key035,
+++	  sizeof(enc_input035), sizeof(enc_assoc035), sizeof(enc_nonce035) },
+++	{ enc_input036, enc_output036, enc_assoc036, enc_nonce036, enc_key036,
+++	  sizeof(enc_input036), sizeof(enc_assoc036), sizeof(enc_nonce036) },
+++	{ enc_input037, enc_output037, enc_assoc037, enc_nonce037, enc_key037,
+++	  sizeof(enc_input037), sizeof(enc_assoc037), sizeof(enc_nonce037) },
+++	{ enc_input038, enc_output038, enc_assoc038, enc_nonce038, enc_key038,
+++	  sizeof(enc_input038), sizeof(enc_assoc038), sizeof(enc_nonce038) },
+++	{ enc_input039, enc_output039, enc_assoc039, enc_nonce039, enc_key039,
+++	  sizeof(enc_input039), sizeof(enc_assoc039), sizeof(enc_nonce039) },
+++	{ enc_input040, enc_output040, enc_assoc040, enc_nonce040, enc_key040,
+++	  sizeof(enc_input040), sizeof(enc_assoc040), sizeof(enc_nonce040) },
+++	{ enc_input041, enc_output041, enc_assoc041, enc_nonce041, enc_key041,
+++	  sizeof(enc_input041), sizeof(enc_assoc041), sizeof(enc_nonce041) },
+++	{ enc_input042, enc_output042, enc_assoc042, enc_nonce042, enc_key042,
+++	  sizeof(enc_input042), sizeof(enc_assoc042), sizeof(enc_nonce042) },
+++	{ enc_input043, enc_output043, enc_assoc043, enc_nonce043, enc_key043,
+++	  sizeof(enc_input043), sizeof(enc_assoc043), sizeof(enc_nonce043) },
+++	{ enc_input044, enc_output044, enc_assoc044, enc_nonce044, enc_key044,
+++	  sizeof(enc_input044), sizeof(enc_assoc044), sizeof(enc_nonce044) },
+++	{ enc_input045, enc_output045, enc_assoc045, enc_nonce045, enc_key045,
+++	  sizeof(enc_input045), sizeof(enc_assoc045), sizeof(enc_nonce045) },
+++	{ enc_input046, enc_output046, enc_assoc046, enc_nonce046, enc_key046,
+++	  sizeof(enc_input046), sizeof(enc_assoc046), sizeof(enc_nonce046) },
+++	{ enc_input047, enc_output047, enc_assoc047, enc_nonce047, enc_key047,
+++	  sizeof(enc_input047), sizeof(enc_assoc047), sizeof(enc_nonce047) },
+++	{ enc_input048, enc_output048, enc_assoc048, enc_nonce048, enc_key048,
+++	  sizeof(enc_input048), sizeof(enc_assoc048), sizeof(enc_nonce048) },
+++	{ enc_input049, enc_output049, enc_assoc049, enc_nonce049, enc_key049,
+++	  sizeof(enc_input049), sizeof(enc_assoc049), sizeof(enc_nonce049) },
+++	{ enc_input050, enc_output050, enc_assoc050, enc_nonce050, enc_key050,
+++	  sizeof(enc_input050), sizeof(enc_assoc050), sizeof(enc_nonce050) },
+++	{ enc_input051, enc_output051, enc_assoc051, enc_nonce051, enc_key051,
+++	  sizeof(enc_input051), sizeof(enc_assoc051), sizeof(enc_nonce051) },
+++	{ enc_input052, enc_output052, enc_assoc052, enc_nonce052, enc_key052,
+++	  sizeof(enc_input052), sizeof(enc_assoc052), sizeof(enc_nonce052) },
++ 	{ enc_input053, enc_output053, enc_assoc053, enc_nonce053, enc_key053,
++ 	  sizeof(enc_input053), sizeof(enc_assoc053), sizeof(enc_nonce053) },
++ 	{ enc_input054, enc_output054, enc_assoc054, enc_nonce054, enc_key054,
++@@ -4497,6 +6076,10 @@ chacha20poly1305_enc_vectors[] __initcon
++ 	  sizeof(enc_input072), sizeof(enc_assoc072), sizeof(enc_nonce072) },
++ 	{ enc_input073, enc_output073, enc_assoc073, enc_nonce073, enc_key073,
++ 	  sizeof(enc_input073), sizeof(enc_assoc073), sizeof(enc_nonce073) },
+++	{ enc_input074, enc_output074, enc_assoc074, enc_nonce074, enc_key074,
+++	  sizeof(enc_input074), sizeof(enc_assoc074), sizeof(enc_nonce074) },
+++	{ enc_input075, enc_output075, enc_assoc075, enc_nonce075, enc_key075,
+++	  sizeof(enc_input075), sizeof(enc_assoc075), sizeof(enc_nonce075) },
++ 	{ enc_input076, enc_output076, enc_assoc076, enc_nonce076, enc_key076,
++ 	  sizeof(enc_input076), sizeof(enc_assoc076), sizeof(enc_nonce076) },
++ 	{ enc_input077, enc_output077, enc_assoc077, enc_nonce077, enc_key077,
++@@ -4517,6 +6100,20 @@ chacha20poly1305_enc_vectors[] __initcon
++ 	  sizeof(enc_input084), sizeof(enc_assoc084), sizeof(enc_nonce084) },
++ 	{ enc_input085, enc_output085, enc_assoc085, enc_nonce085, enc_key085,
++ 	  sizeof(enc_input085), sizeof(enc_assoc085), sizeof(enc_nonce085) },
+++	{ enc_input086, enc_output086, enc_assoc086, enc_nonce086, enc_key086,
+++	  sizeof(enc_input086), sizeof(enc_assoc086), sizeof(enc_nonce086) },
+++	{ enc_input087, enc_output087, enc_assoc087, enc_nonce087, enc_key087,
+++	  sizeof(enc_input087), sizeof(enc_assoc087), sizeof(enc_nonce087) },
+++	{ enc_input088, enc_output088, enc_assoc088, enc_nonce088, enc_key088,
+++	  sizeof(enc_input088), sizeof(enc_assoc088), sizeof(enc_nonce088) },
+++	{ enc_input089, enc_output089, enc_assoc089, enc_nonce089, enc_key089,
+++	  sizeof(enc_input089), sizeof(enc_assoc089), sizeof(enc_nonce089) },
+++	{ enc_input090, enc_output090, enc_assoc090, enc_nonce090, enc_key090,
+++	  sizeof(enc_input090), sizeof(enc_assoc090), sizeof(enc_nonce090) },
+++	{ enc_input091, enc_output091, enc_assoc091, enc_nonce091, enc_key091,
+++	  sizeof(enc_input091), sizeof(enc_assoc091), sizeof(enc_nonce091) },
+++	{ enc_input092, enc_output092, enc_assoc092, enc_nonce092, enc_key092,
+++	  sizeof(enc_input092), sizeof(enc_assoc092), sizeof(enc_nonce092) },
++ 	{ enc_input093, enc_output093, enc_assoc093, enc_nonce093, enc_key093,
++ 	  sizeof(enc_input093), sizeof(enc_assoc093), sizeof(enc_nonce093) },
++ 	{ enc_input094, enc_output094, enc_assoc094, enc_nonce094, enc_key094,
++@@ -7224,6 +8821,43 @@ xchacha20poly1305_dec_vectors[] __initco
++ 	  sizeof(xdec_input001), sizeof(xdec_assoc001), sizeof(xdec_nonce001) }
++ };
++ 
+++/* This is for the selftests-only, since it is only useful for the purpose of
+++ * testing the underlying primitives and interactions.
+++ */
+++static void __init
+++chacha20poly1305_encrypt_bignonce(u8 *dst, const u8 *src, const size_t src_len,
+++				  const u8 *ad, const size_t ad_len,
+++				  const u8 nonce[12],
+++				  const u8 key[CHACHA20POLY1305_KEY_SIZE])
+++{
+++	const u8 *pad0 = page_address(ZERO_PAGE(0));
+++	struct poly1305_desc_ctx poly1305_state;
+++	u32 chacha20_state[CHACHA_STATE_WORDS];
+++	union {
+++		u8 block0[POLY1305_KEY_SIZE];
+++		__le64 lens[2];
+++	} b = {{ 0 }};
+++	u8 bottom_row[16] = { 0 };
+++	u32 le_key[8];
+++	int i;
+++
+++	memcpy(&bottom_row[4], nonce, 12);
+++	for (i = 0; i < 8; ++i)
+++		le_key[i] = get_unaligned_le32(key + sizeof(le_key[i]) * i);
+++	chacha_init(chacha20_state, le_key, bottom_row);
+++	chacha20_crypt(chacha20_state, b.block0, b.block0, sizeof(b.block0));
+++	poly1305_init(&poly1305_state, b.block0);
+++	poly1305_update(&poly1305_state, ad, ad_len);
+++	poly1305_update(&poly1305_state, pad0, (0x10 - ad_len) & 0xf);
+++	chacha20_crypt(chacha20_state, dst, src, src_len);
+++	poly1305_update(&poly1305_state, dst, src_len);
+++	poly1305_update(&poly1305_state, pad0, (0x10 - src_len) & 0xf);
+++	b.lens[0] = cpu_to_le64(ad_len);
+++	b.lens[1] = cpu_to_le64(src_len);
+++	poly1305_update(&poly1305_state, (u8 *)b.lens, sizeof(b.lens));
+++	poly1305_final(&poly1305_state, dst + src_len);
+++}
+++
++ static void __init
++ chacha20poly1305_selftest_encrypt(u8 *dst, const u8 *src, const size_t src_len,
++ 				  const u8 *ad, const size_t ad_len,
++@@ -7233,6 +8867,9 @@ chacha20poly1305_selftest_encrypt(u8 *ds
++ 	if (nonce_len == 8)
++ 		chacha20poly1305_encrypt(dst, src, src_len, ad, ad_len,
++ 					 get_unaligned_le64(nonce), key);
+++	else if (nonce_len == 12)
+++		chacha20poly1305_encrypt_bignonce(dst, src, src_len, ad,
+++						  ad_len, nonce, key);
++ 	else
++ 		BUG();
++ }
++@@ -7248,14 +8885,14 @@ decryption_success(bool func_ret, bool e
++ bool __init chacha20poly1305_selftest(void)
++ {
++ 	enum { MAXIMUM_TEST_BUFFER_LEN = 1UL << 12 };
++-	size_t i;
++-	u8 *computed_output = NULL, *heap_src = NULL;
++-	struct scatterlist sg_src;
+++	size_t i, j, k, total_len;
+++	u8 *computed_output = NULL, *input = NULL;
++ 	bool success = true, ret;
+++	struct scatterlist sg_src[3];
++ 
++-	heap_src = kmalloc(MAXIMUM_TEST_BUFFER_LEN, GFP_KERNEL);
++ 	computed_output = kmalloc(MAXIMUM_TEST_BUFFER_LEN, GFP_KERNEL);
++-	if (!heap_src || !computed_output) {
+++	input = kmalloc(MAXIMUM_TEST_BUFFER_LEN, GFP_KERNEL);
+++	if (!computed_output || !input) {
++ 		pr_err("chacha20poly1305 self-test malloc: FAIL\n");
++ 		success = false;
++ 		goto out;
++@@ -7284,17 +8921,17 @@ bool __init chacha20poly1305_selftest(vo
++ 	for (i = 0; i < ARRAY_SIZE(chacha20poly1305_enc_vectors); ++i) {
++ 		if (chacha20poly1305_enc_vectors[i].nlen != 8)
++ 			continue;
++-		memcpy(heap_src, chacha20poly1305_enc_vectors[i].input,
+++		memcpy(computed_output, chacha20poly1305_enc_vectors[i].input,
++ 		       chacha20poly1305_enc_vectors[i].ilen);
++-		sg_init_one(&sg_src, heap_src,
+++		sg_init_one(sg_src, computed_output,
++ 			    chacha20poly1305_enc_vectors[i].ilen + POLY1305_DIGEST_SIZE);
++-		chacha20poly1305_encrypt_sg_inplace(&sg_src,
+++		ret = chacha20poly1305_encrypt_sg_inplace(sg_src,
++ 			chacha20poly1305_enc_vectors[i].ilen,
++ 			chacha20poly1305_enc_vectors[i].assoc,
++ 			chacha20poly1305_enc_vectors[i].alen,
++ 			get_unaligned_le64(chacha20poly1305_enc_vectors[i].nonce),
++ 			chacha20poly1305_enc_vectors[i].key);
++-		if (memcmp(heap_src,
+++		if (!ret || memcmp(computed_output,
++ 				   chacha20poly1305_enc_vectors[i].output,
++ 				   chacha20poly1305_enc_vectors[i].ilen +
++ 							POLY1305_DIGEST_SIZE)) {
++@@ -7326,11 +8963,11 @@ bool __init chacha20poly1305_selftest(vo
++ 	}
++ 
++ 	for (i = 0; i < ARRAY_SIZE(chacha20poly1305_dec_vectors); ++i) {
++-		memcpy(heap_src, chacha20poly1305_dec_vectors[i].input,
+++		memcpy(computed_output, chacha20poly1305_dec_vectors[i].input,
++ 		       chacha20poly1305_dec_vectors[i].ilen);
++-		sg_init_one(&sg_src, heap_src,
+++		sg_init_one(sg_src, computed_output,
++ 			    chacha20poly1305_dec_vectors[i].ilen);
++-		ret = chacha20poly1305_decrypt_sg_inplace(&sg_src,
+++		ret = chacha20poly1305_decrypt_sg_inplace(sg_src,
++ 			chacha20poly1305_dec_vectors[i].ilen,
++ 			chacha20poly1305_dec_vectors[i].assoc,
++ 			chacha20poly1305_dec_vectors[i].alen,
++@@ -7338,7 +8975,7 @@ bool __init chacha20poly1305_selftest(vo
++ 			chacha20poly1305_dec_vectors[i].key);
++ 		if (!decryption_success(ret,
++ 			chacha20poly1305_dec_vectors[i].failure,
++-			memcmp(heap_src, chacha20poly1305_dec_vectors[i].output,
+++			memcmp(computed_output, chacha20poly1305_dec_vectors[i].output,
++ 			       chacha20poly1305_dec_vectors[i].ilen -
++ 							POLY1305_DIGEST_SIZE))) {
++ 			pr_err("chacha20poly1305 sg decryption self-test %zu: FAIL\n",
++@@ -7365,6 +9002,7 @@ bool __init chacha20poly1305_selftest(vo
++ 			success = false;
++ 		}
++ 	}
+++
++ 	for (i = 0; i < ARRAY_SIZE(xchacha20poly1305_dec_vectors); ++i) {
++ 		memset(computed_output, 0, MAXIMUM_TEST_BUFFER_LEN);
++ 		ret = xchacha20poly1305_decrypt(computed_output,
++@@ -7386,8 +9024,54 @@ bool __init chacha20poly1305_selftest(vo
++ 		}
++ 	}
++ 
+++	for (total_len = POLY1305_DIGEST_SIZE; IS_ENABLED(DEBUG_CHACHA20POLY1305_SLOW_CHUNK_TEST)
+++	     && total_len <= 1 << 10; ++total_len) {
+++		for (i = 0; i <= total_len; ++i) {
+++			for (j = i; j <= total_len; ++j) {
+++				sg_init_table(sg_src, 3);
+++				sg_set_buf(&sg_src[0], input, i);
+++				sg_set_buf(&sg_src[1], input + i, j - i);
+++				sg_set_buf(&sg_src[2], input + j, total_len - j);
+++				memset(computed_output, 0, total_len);
+++				memset(input, 0, total_len);
+++
+++				if (!chacha20poly1305_encrypt_sg_inplace(sg_src,
+++					total_len - POLY1305_DIGEST_SIZE, NULL, 0,
+++					0, enc_key001))
+++					goto chunkfail;
+++				chacha20poly1305_encrypt(computed_output,
+++					computed_output,
+++					total_len - POLY1305_DIGEST_SIZE, NULL, 0, 0,
+++					enc_key001);
+++				if (memcmp(computed_output, input, total_len))
+++					goto chunkfail;
+++				if (!chacha20poly1305_decrypt(computed_output,
+++					input, total_len, NULL, 0, 0, enc_key001))
+++					goto chunkfail;
+++				for (k = 0; k < total_len - POLY1305_DIGEST_SIZE; ++k) {
+++					if (computed_output[k])
+++						goto chunkfail;
+++				}
+++				if (!chacha20poly1305_decrypt_sg_inplace(sg_src,
+++					total_len, NULL, 0, 0, enc_key001))
+++					goto chunkfail;
+++				for (k = 0; k < total_len - POLY1305_DIGEST_SIZE; ++k) {
+++					if (input[k])
+++						goto chunkfail;
+++				}
+++				continue;
+++
+++			chunkfail:
+++				pr_err("chacha20poly1305 chunked self-test %zu/%zu/%zu: FAIL\n",
+++				       total_len, i, j);
+++				success = false;
+++			}
+++
+++		}
+++	}
+++
++ out:
++-	kfree(heap_src);
++ 	kfree(computed_output);
+++	kfree(input);
++ 	return success;
++ }
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0048-crypto-x86-poly1305-emit-does-base-conversion-itself.patch b/target/linux/generic/backport-5.4/080-wireguard-0048-crypto-x86-poly1305-emit-does-base-conversion-itself.patch
+new file mode 100644
+index 0000000000..8209ca2898
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0048-crypto-x86-poly1305-emit-does-base-conversion-itself.patch
+@@ -0,0 +1,36 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 17 Jan 2020 11:42:22 +0100
++Subject: [PATCH] crypto: x86/poly1305 - emit does base conversion itself
++
++commit f9e7fe32a792726186301423ff63a465d63386e1 upstream.
++
++The emit code does optional base conversion itself in assembly, so we
++don't need to do that here. Also, neither one of these functions uses
++simd instructions, so checking for that doesn't make sense either.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/poly1305_glue.c | 8 ++------
++ 1 file changed, 2 insertions(+), 6 deletions(-)
++
++--- a/arch/x86/crypto/poly1305_glue.c
+++++ b/arch/x86/crypto/poly1305_glue.c
++@@ -123,13 +123,9 @@ static void poly1305_simd_blocks(void *c
++ static void poly1305_simd_emit(void *ctx, u8 mac[POLY1305_DIGEST_SIZE],
++ 			       const u32 nonce[4])
++ {
++-	struct poly1305_arch_internal *state = ctx;
++-
++-	if (!IS_ENABLED(CONFIG_AS_AVX) || !static_branch_likely(&poly1305_use_avx) ||
++-	    !state->is_base2_26 || !crypto_simd_usable()) {
++-		convert_to_base2_64(ctx);
+++	if (!IS_ENABLED(CONFIG_AS_AVX) || !static_branch_likely(&poly1305_use_avx))
++ 		poly1305_emit_x86_64(ctx, mac, nonce);
++-	} else
+++	else
++ 		poly1305_emit_avx(ctx, mac, nonce);
++ }
++ 
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0049-crypto-arm-chacha-fix-build-failured-when-kernel-mod.patch b/target/linux/generic/backport-5.4/080-wireguard-0049-crypto-arm-chacha-fix-build-failured-when-kernel-mod.patch
+new file mode 100644
+index 0000000000..354f584315
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0049-crypto-arm-chacha-fix-build-failured-when-kernel-mod.patch
+@@ -0,0 +1,58 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 17 Jan 2020 17:43:18 +0100
++Subject: [PATCH] crypto: arm/chacha - fix build failured when kernel mode NEON
++ is disabled
++
++commit 0bc81767c5bd9d005fae1099fb39eb3688370cb1 upstream.
++
++When the ARM accelerated ChaCha driver is built as part of a configuration
++that has kernel mode NEON disabled, we expect the compiler to propagate
++the build time constant expression IS_ENABLED(CONFIG_KERNEL_MODE_NEON) in
++a way that eliminates all the cross-object references to the actual NEON
++routines, which allows the chacha-neon-core.o object to be omitted from
++the build entirely.
++
++Unfortunately, this fails to work as expected in some cases, and we may
++end up with a build error such as
++
++  chacha-glue.c:(.text+0xc0): undefined reference to `chacha_4block_xor_neon'
++
++caused by the fact that chacha_doneon() has not been eliminated from the
++object code, even though it will never be called in practice.
++
++Let's fix this by adding some IS_ENABLED(CONFIG_KERNEL_MODE_NEON) tests
++that are not strictly needed from a logical point of view, but should
++help the compiler infer that the NEON code paths are unreachable in
++those cases.
++
++Fixes: b36d8c09e710c71f ("crypto: arm/chacha - remove dependency on generic ...")
++Reported-by: Russell King <linux@armlinux.org.uk>
++Cc: Arnd Bergmann <arnd@arndb.de>
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/chacha-glue.c | 4 ++--
++ 1 file changed, 2 insertions(+), 2 deletions(-)
++
++--- a/arch/arm/crypto/chacha-glue.c
+++++ b/arch/arm/crypto/chacha-glue.c
++@@ -115,7 +115,7 @@ static int chacha_stream_xor(struct skci
++ 		if (nbytes < walk.total)
++ 			nbytes = round_down(nbytes, walk.stride);
++ 
++-		if (!neon) {
+++		if (!IS_ENABLED(CONFIG_KERNEL_MODE_NEON) || !neon) {
++ 			chacha_doarm(walk.dst.virt.addr, walk.src.virt.addr,
++ 				     nbytes, state, ctx->nrounds);
++ 			state[12] += DIV_ROUND_UP(nbytes, CHACHA_BLOCK_SIZE);
++@@ -159,7 +159,7 @@ static int do_xchacha(struct skcipher_re
++ 
++ 	chacha_init_generic(state, ctx->key, req->iv);
++ 
++-	if (!neon) {
+++	if (!IS_ENABLED(CONFIG_KERNEL_MODE_NEON) || !neon) {
++ 		hchacha_block_arm(state, subctx.key, ctx->nrounds);
++ 	} else {
++ 		kernel_neon_begin();
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0050-crypto-Kconfig-allow-tests-to-be-disabled-when-manag.patch b/target/linux/generic/backport-5.4/080-wireguard-0050-crypto-Kconfig-allow-tests-to-be-disabled-when-manag.patch
+new file mode 100644
+index 0000000000..c52bf0a2a7
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0050-crypto-Kconfig-allow-tests-to-be-disabled-when-manag.patch
+@@ -0,0 +1,40 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 17 Jan 2020 12:01:36 +0100
++Subject: [PATCH] crypto: Kconfig - allow tests to be disabled when manager is
++ disabled
++
++commit 2343d1529aff8b552589f622c23932035ed7a05d upstream.
++
++The library code uses CRYPTO_MANAGER_DISABLE_TESTS to conditionalize its
++tests, but the library code can also exist without CRYPTO_MANAGER. That
++means on minimal configs, the test code winds up being built with no way
++to disable it.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ crypto/Kconfig | 4 ----
++ 1 file changed, 4 deletions(-)
++
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -136,8 +136,6 @@ config CRYPTO_USER
++ 	  Userspace configuration for cryptographic instantiations such as
++ 	  cbc(aes).
++ 
++-if CRYPTO_MANAGER2
++-
++ config CRYPTO_MANAGER_DISABLE_TESTS
++ 	bool "Disable run-time self tests"
++ 	default y
++@@ -155,8 +153,6 @@ config CRYPTO_MANAGER_EXTRA_TESTS
++ 	  This is intended for developer use only, as these tests take much
++ 	  longer to run than the normal self tests.
++ 
++-endif	# if CRYPTO_MANAGER2
++-
++ config CRYPTO_GF128MUL
++ 	tristate
++ 
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0051-crypto-chacha20poly1305-prevent-integer-overflow-on-.patch b/target/linux/generic/backport-5.4/080-wireguard-0051-crypto-chacha20poly1305-prevent-integer-overflow-on-.patch
+new file mode 100644
+index 0000000000..1ed49e5b6c
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0051-crypto-chacha20poly1305-prevent-integer-overflow-on-.patch
+@@ -0,0 +1,40 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Thu, 6 Feb 2020 12:42:01 +0100
++Subject: [PATCH] crypto: chacha20poly1305 - prevent integer overflow on large
++ input
++
++commit c9cc0517bba9f0213f1e55172feceb99e5512daf upstream.
++
++This code assigns src_len (size_t) to sl (int), which causes problems
++when src_len is very large. Probably nobody in the kernel should be
++passing this much data to chacha20poly1305 all in one go anyway, so I
++don't think we need to change the algorithm or introduce larger types
++or anything. But we should at least error out early in this case and
++print a warning so that we get reports if this does happen and can look
++into why anybody is possibly passing it that much data or if they're
++accidently passing -1 or similar.
++
++Fixes: d95312a3ccc0 ("crypto: lib/chacha20poly1305 - reimplement crypt_from_sg() routine")
++Cc: Ard Biesheuvel <ardb@kernel.org>
++Cc: stable@vger.kernel.org # 5.5+
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Acked-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ lib/crypto/chacha20poly1305.c | 3 +++
++ 1 file changed, 3 insertions(+)
++
++--- a/lib/crypto/chacha20poly1305.c
+++++ b/lib/crypto/chacha20poly1305.c
++@@ -235,6 +235,9 @@ bool chacha20poly1305_crypt_sg_inplace(s
++ 		__le64 lens[2];
++ 	} b __aligned(16);
++ 
+++	if (WARN_ON(src_len > INT_MAX))
+++		return false;
+++
++ 	chacha_load_key(b.k, key);
++ 
++ 	b.iv[0] = 0;
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0052-crypto-x86-curve25519-support-assemblers-with-no-adx.patch b/target/linux/generic/backport-5.4/080-wireguard-0052-crypto-x86-curve25519-support-assemblers-with-no-adx.patch
+new file mode 100644
+index 0000000000..cd507b1e44
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0052-crypto-x86-curve25519-support-assemblers-with-no-adx.patch
+@@ -0,0 +1,84 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Sun, 1 Mar 2020 22:52:35 +0800
++Subject: [PATCH] crypto: x86/curve25519 - support assemblers with no adx
++ support
++
++commit 1579f1bc3b753d17a44de3457d5c6f4a5b14c752 upstream.
++
++Some older version of GAS do not support the ADX instructions, similarly
++to how they also don't support AVX and such. This commit adds the same
++build-time detection mechanisms we use for AVX and others for ADX, and
++then makes sure that the curve25519 library dispatcher calls the right
++functions.
++
++Reported-by: Willy Tarreau <w@1wt.eu>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/Makefile           | 5 +++--
++ arch/x86/crypto/Makefile    | 7 ++++++-
++ include/crypto/curve25519.h | 6 ++++--
++ 3 files changed, 13 insertions(+), 5 deletions(-)
++
++--- a/arch/x86/Makefile
+++++ b/arch/x86/Makefile
++@@ -198,9 +198,10 @@ avx2_instr :=$(call as-instr,vpbroadcast
++ avx512_instr :=$(call as-instr,vpmovm2b %k1$(comma)%zmm5,-DCONFIG_AS_AVX512=1)
++ sha1_ni_instr :=$(call as-instr,sha1msg1 %xmm0$(comma)%xmm1,-DCONFIG_AS_SHA1_NI=1)
++ sha256_ni_instr :=$(call as-instr,sha256msg1 %xmm0$(comma)%xmm1,-DCONFIG_AS_SHA256_NI=1)
+++adx_instr := $(call as-instr,adox %r10$(comma)%r10,-DCONFIG_AS_ADX=1)
++ 
++-KBUILD_AFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr) $(avx_instr) $(avx2_instr) $(avx512_instr) $(sha1_ni_instr) $(sha256_ni_instr)
++-KBUILD_CFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr) $(avx_instr) $(avx2_instr) $(avx512_instr) $(sha1_ni_instr) $(sha256_ni_instr)
+++KBUILD_AFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr) $(avx_instr) $(avx2_instr) $(avx512_instr) $(sha1_ni_instr) $(sha256_ni_instr) $(adx_instr)
+++KBUILD_CFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr) $(avx_instr) $(avx2_instr) $(avx512_instr) $(sha1_ni_instr) $(sha256_ni_instr) $(adx_instr)
++ 
++ KBUILD_LDFLAGS := -m elf_$(UTS_MACHINE)
++ 
++--- a/arch/x86/crypto/Makefile
+++++ b/arch/x86/crypto/Makefile
++@@ -11,6 +11,7 @@ avx2_supported := $(call as-instr,vpgath
++ avx512_supported :=$(call as-instr,vpmovm2b %k1$(comma)%zmm5,yes,no)
++ sha1_ni_supported :=$(call as-instr,sha1msg1 %xmm0$(comma)%xmm1,yes,no)
++ sha256_ni_supported :=$(call as-instr,sha256msg1 %xmm0$(comma)%xmm1,yes,no)
+++adx_supported := $(call as-instr,adox %r10$(comma)%r10,yes,no)
++ 
++ obj-$(CONFIG_CRYPTO_GLUE_HELPER_X86) += glue_helper.o
++ 
++@@ -39,7 +40,11 @@ obj-$(CONFIG_CRYPTO_AEGIS128_AESNI_SSE2)
++ 
++ obj-$(CONFIG_CRYPTO_NHPOLY1305_SSE2) += nhpoly1305-sse2.o
++ obj-$(CONFIG_CRYPTO_NHPOLY1305_AVX2) += nhpoly1305-avx2.o
++-obj-$(CONFIG_CRYPTO_CURVE25519_X86) += curve25519-x86_64.o
+++
+++# These modules require the assembler to support ADX.
+++ifeq ($(adx_supported),yes)
+++	obj-$(CONFIG_CRYPTO_CURVE25519_X86) += curve25519-x86_64.o
+++endif
++ 
++ # These modules require assembler to support AVX.
++ ifeq ($(avx_supported),yes)
++--- a/include/crypto/curve25519.h
+++++ b/include/crypto/curve25519.h
++@@ -33,7 +33,8 @@ bool __must_check curve25519(u8 mypublic
++ 			     const u8 secret[CURVE25519_KEY_SIZE],
++ 			     const u8 basepoint[CURVE25519_KEY_SIZE])
++ {
++-	if (IS_ENABLED(CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519))
+++	if (IS_ENABLED(CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519) &&
+++	    (!IS_ENABLED(CONFIG_CRYPTO_CURVE25519_X86) || IS_ENABLED(CONFIG_AS_ADX)))
++ 		curve25519_arch(mypublic, secret, basepoint);
++ 	else
++ 		curve25519_generic(mypublic, secret, basepoint);
++@@ -49,7 +50,8 @@ __must_check curve25519_generate_public(
++ 				    CURVE25519_KEY_SIZE)))
++ 		return false;
++ 
++-	if (IS_ENABLED(CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519))
+++	if (IS_ENABLED(CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519) &&
+++	    (!IS_ENABLED(CONFIG_CRYPTO_CURVE25519_X86) || IS_ENABLED(CONFIG_AS_ADX)))
++ 		curve25519_base_arch(pub, secret);
++ 	else
++ 		curve25519_generic(pub, secret, curve25519_base_point);
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0053-crypto-arm64-chacha-correctly-walk-through-blocks.patch b/target/linux/generic/backport-5.4/080-wireguard-0053-crypto-arm64-chacha-correctly-walk-through-blocks.patch
+new file mode 100644
+index 0000000000..823a908373
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0053-crypto-arm64-chacha-correctly-walk-through-blocks.patch
+@@ -0,0 +1,68 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Wed, 18 Mar 2020 20:27:32 -0600
++Subject: [PATCH] crypto: arm64/chacha - correctly walk through blocks
++
++commit c8cfcb78c65877313cda7bcbace624d3dbd1f3b3 upstream.
++
++Prior, passing in chunks of 2, 3, or 4, followed by any additional
++chunks would result in the chacha state counter getting out of sync,
++resulting in incorrect encryption/decryption, which is a pretty nasty
++crypto vuln: "why do images look weird on webpages?" WireGuard users
++never experienced this prior, because we have always, out of tree, used
++a different crypto library, until the recent Frankenzinc addition. This
++commit fixes the issue by advancing the pointers and state counter by
++the actual size processed. It also fixes up a bug in the (optional,
++costly) stride test that prevented it from running on arm64.
++
++Fixes: b3aad5bad26a ("crypto: arm64/chacha - expose arm64 ChaCha routine as library function")
++Reported-and-tested-by: Emil Renner Berthing <kernel@esmil.dk>
++Cc: Ard Biesheuvel <ardb@kernel.org>
++Cc: stable@vger.kernel.org # v5.5+
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Reviewed-by: Eric Biggers <ebiggers@google.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm64/crypto/chacha-neon-glue.c   |  8 ++++----
++ lib/crypto/chacha20poly1305-selftest.c | 11 ++++++++---
++ 2 files changed, 12 insertions(+), 7 deletions(-)
++
++--- a/arch/arm64/crypto/chacha-neon-glue.c
+++++ b/arch/arm64/crypto/chacha-neon-glue.c
++@@ -55,10 +55,10 @@ static void chacha_doneon(u32 *state, u8
++ 			break;
++ 		}
++ 		chacha_4block_xor_neon(state, dst, src, nrounds, l);
++-		bytes -= CHACHA_BLOCK_SIZE * 5;
++-		src += CHACHA_BLOCK_SIZE * 5;
++-		dst += CHACHA_BLOCK_SIZE * 5;
++-		state[12] += 5;
+++		bytes -= l;
+++		src += l;
+++		dst += l;
+++		state[12] += DIV_ROUND_UP(l, CHACHA_BLOCK_SIZE);
++ 	}
++ }
++ 
++--- a/lib/crypto/chacha20poly1305-selftest.c
+++++ b/lib/crypto/chacha20poly1305-selftest.c
++@@ -9028,10 +9028,15 @@ bool __init chacha20poly1305_selftest(vo
++ 	     && total_len <= 1 << 10; ++total_len) {
++ 		for (i = 0; i <= total_len; ++i) {
++ 			for (j = i; j <= total_len; ++j) {
+++				k = 0;
++ 				sg_init_table(sg_src, 3);
++-				sg_set_buf(&sg_src[0], input, i);
++-				sg_set_buf(&sg_src[1], input + i, j - i);
++-				sg_set_buf(&sg_src[2], input + j, total_len - j);
+++				if (i)
+++					sg_set_buf(&sg_src[k++], input, i);
+++				if (j - i)
+++					sg_set_buf(&sg_src[k++], input + i, j - i);
+++				if (total_len - j)
+++					sg_set_buf(&sg_src[k++], input + j, total_len - j);
+++				sg_init_marker(sg_src, k);
++ 				memset(computed_output, 0, total_len);
++ 				memset(input, 0, total_len);
++ 
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0054-crypto-x86-curve25519-replace-with-formally-verified.patch b/target/linux/generic/backport-5.4/080-wireguard-0054-crypto-x86-curve25519-replace-with-formally-verified.patch
+new file mode 100644
+index 0000000000..938d700da2
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0054-crypto-x86-curve25519-replace-with-formally-verified.patch
+@@ -0,0 +1,3765 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Mon, 20 Jan 2020 18:18:15 +0100
++Subject: [PATCH] crypto: x86/curve25519 - replace with formally verified
++ implementation
++
++commit 07b586fe06625b0b610dc3d3a969c51913d143d4 upstream.
++
++This comes from INRIA's HACL*/Vale. It implements the same algorithm and
++implementation strategy as the code it replaces, only this code has been
++formally verified, sans the base point multiplication, which uses code
++similar to prior, only it uses the formally verified field arithmetic
++alongside reproducable ladder generation steps. This doesn't have a
++pure-bmi2 version, which means haswell no longer benefits, but the
++increased (doubled) code complexity is not worth it for a single
++generation of chips that's already old.
++
++Performance-wise, this is around 1% slower on older microarchitectures,
++and slightly faster on newer microarchitectures, mainly 10nm ones or
++backports of 10nm to 14nm. This implementation is "everest" below:
++
++Xeon E5-2680 v4 (Broadwell)
++
++     armfazh: 133340 cycles per call
++     everest: 133436 cycles per call
++
++Xeon Gold 5120 (Sky Lake Server)
++
++     armfazh: 112636 cycles per call
++     everest: 113906 cycles per call
++
++Core i5-6300U (Sky Lake Client)
++
++     armfazh: 116810 cycles per call
++     everest: 117916 cycles per call
++
++Core i7-7600U (Kaby Lake)
++
++     armfazh: 119523 cycles per call
++     everest: 119040 cycles per call
++
++Core i7-8750H (Coffee Lake)
++
++     armfazh: 113914 cycles per call
++     everest: 113650 cycles per call
++
++Core i9-9880H (Coffee Lake Refresh)
++
++     armfazh: 112616 cycles per call
++     everest: 114082 cycles per call
++
++Core i3-8121U (Cannon Lake)
++
++     armfazh: 113202 cycles per call
++     everest: 111382 cycles per call
++
++Core i7-8265U (Whiskey Lake)
++
++     armfazh: 127307 cycles per call
++     everest: 127697 cycles per call
++
++Core i7-8550U (Kaby Lake Refresh)
++
++     armfazh: 127522 cycles per call
++     everest: 127083 cycles per call
++
++Xeon Platinum 8275CL (Cascade Lake)
++
++     armfazh: 114380 cycles per call
++     everest: 114656 cycles per call
++
++Achieving these kind of results with formally verified code is quite
++remarkable, especialy considering that performance is favorable for
++newer chips.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/curve25519-x86_64.c | 3546 ++++++++++-----------------
++ 1 file changed, 1292 insertions(+), 2254 deletions(-)
++
++--- a/arch/x86/crypto/curve25519-x86_64.c
+++++ b/arch/x86/crypto/curve25519-x86_64.c
++@@ -1,8 +1,7 @@
++-// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
+++// SPDX-License-Identifier: GPL-2.0 OR MIT
++ /*
++- * Copyright (c) 2017 Armando Faz <armfazh@ic.unicamp.br>. All Rights Reserved.
++- * Copyright (C) 2018-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
++- * Copyright (C) 2018 Samuel Neves <sneves@dei.uc.pt>. All Rights Reserved.
+++ * Copyright (C) 2020 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ * Copyright (c) 2016-2020 INRIA, CMU and Microsoft Corporation
++  */
++ 
++ #include <crypto/curve25519.h>
++@@ -16,2337 +15,1378 @@
++ #include <asm/cpufeature.h>
++ #include <asm/processor.h>
++ 
++-static __ro_after_init DEFINE_STATIC_KEY_FALSE(curve25519_use_bmi2);
++-static __ro_after_init DEFINE_STATIC_KEY_FALSE(curve25519_use_adx);
++-
++-enum { NUM_WORDS_ELTFP25519 = 4 };
++-typedef __aligned(32) u64 eltfp25519_1w[NUM_WORDS_ELTFP25519];
++-typedef __aligned(32) u64 eltfp25519_1w_buffer[2 * NUM_WORDS_ELTFP25519];
++-
++-#define mul_eltfp25519_1w_adx(c, a, b) do { \
++-	mul_256x256_integer_adx(m.buffer, a, b); \
++-	red_eltfp25519_1w_adx(c, m.buffer); \
++-} while (0)
++-
++-#define mul_eltfp25519_1w_bmi2(c, a, b) do { \
++-	mul_256x256_integer_bmi2(m.buffer, a, b); \
++-	red_eltfp25519_1w_bmi2(c, m.buffer); \
++-} while (0)
++-
++-#define sqr_eltfp25519_1w_adx(a) do { \
++-	sqr_256x256_integer_adx(m.buffer, a); \
++-	red_eltfp25519_1w_adx(a, m.buffer); \
++-} while (0)
++-
++-#define sqr_eltfp25519_1w_bmi2(a) do { \
++-	sqr_256x256_integer_bmi2(m.buffer, a); \
++-	red_eltfp25519_1w_bmi2(a, m.buffer); \
++-} while (0)
++-
++-#define mul_eltfp25519_2w_adx(c, a, b) do { \
++-	mul2_256x256_integer_adx(m.buffer, a, b); \
++-	red_eltfp25519_2w_adx(c, m.buffer); \
++-} while (0)
++-
++-#define mul_eltfp25519_2w_bmi2(c, a, b) do { \
++-	mul2_256x256_integer_bmi2(m.buffer, a, b); \
++-	red_eltfp25519_2w_bmi2(c, m.buffer); \
++-} while (0)
++-
++-#define sqr_eltfp25519_2w_adx(a) do { \
++-	sqr2_256x256_integer_adx(m.buffer, a); \
++-	red_eltfp25519_2w_adx(a, m.buffer); \
++-} while (0)
++-
++-#define sqr_eltfp25519_2w_bmi2(a) do { \
++-	sqr2_256x256_integer_bmi2(m.buffer, a); \
++-	red_eltfp25519_2w_bmi2(a, m.buffer); \
++-} while (0)
++-
++-#define sqrn_eltfp25519_1w_adx(a, times) do { \
++-	int ____counter = (times); \
++-	while (____counter-- > 0) \
++-		sqr_eltfp25519_1w_adx(a); \
++-} while (0)
++-
++-#define sqrn_eltfp25519_1w_bmi2(a, times) do { \
++-	int ____counter = (times); \
++-	while (____counter-- > 0) \
++-		sqr_eltfp25519_1w_bmi2(a); \
++-} while (0)
++-
++-#define copy_eltfp25519_1w(C, A) do { \
++-	(C)[0] = (A)[0]; \
++-	(C)[1] = (A)[1]; \
++-	(C)[2] = (A)[2]; \
++-	(C)[3] = (A)[3]; \
++-} while (0)
++-
++-#define setzero_eltfp25519_1w(C) do { \
++-	(C)[0] = 0; \
++-	(C)[1] = 0; \
++-	(C)[2] = 0; \
++-	(C)[3] = 0; \
++-} while (0)
++-
++-__aligned(32) static const u64 table_ladder_8k[252 * NUM_WORDS_ELTFP25519] = {
++-	/*   1 */ 0xfffffffffffffff3UL, 0xffffffffffffffffUL,
++-		  0xffffffffffffffffUL, 0x5fffffffffffffffUL,
++-	/*   2 */ 0x6b8220f416aafe96UL, 0x82ebeb2b4f566a34UL,
++-		  0xd5a9a5b075a5950fUL, 0x5142b2cf4b2488f4UL,
++-	/*   3 */ 0x6aaebc750069680cUL, 0x89cf7820a0f99c41UL,
++-		  0x2a58d9183b56d0f4UL, 0x4b5aca80e36011a4UL,
++-	/*   4 */ 0x329132348c29745dUL, 0xf4a2e616e1642fd7UL,
++-		  0x1e45bb03ff67bc34UL, 0x306912d0f42a9b4aUL,
++-	/*   5 */ 0xff886507e6af7154UL, 0x04f50e13dfeec82fUL,
++-		  0xaa512fe82abab5ceUL, 0x174e251a68d5f222UL,
++-	/*   6 */ 0xcf96700d82028898UL, 0x1743e3370a2c02c5UL,
++-		  0x379eec98b4e86eaaUL, 0x0c59888a51e0482eUL,
++-	/*   7 */ 0xfbcbf1d699b5d189UL, 0xacaef0d58e9fdc84UL,
++-		  0xc1c20d06231f7614UL, 0x2938218da274f972UL,
++-	/*   8 */ 0xf6af49beff1d7f18UL, 0xcc541c22387ac9c2UL,
++-		  0x96fcc9ef4015c56bUL, 0x69c1627c690913a9UL,
++-	/*   9 */ 0x7a86fd2f4733db0eUL, 0xfdb8c4f29e087de9UL,
++-		  0x095e4b1a8ea2a229UL, 0x1ad7a7c829b37a79UL,
++-	/*  10 */ 0x342d89cad17ea0c0UL, 0x67bedda6cced2051UL,
++-		  0x19ca31bf2bb42f74UL, 0x3df7b4c84980acbbUL,
++-	/*  11 */ 0xa8c6444dc80ad883UL, 0xb91e440366e3ab85UL,
++-		  0xc215cda00164f6d8UL, 0x3d867c6ef247e668UL,
++-	/*  12 */ 0xc7dd582bcc3e658cUL, 0xfd2c4748ee0e5528UL,
++-		  0xa0fd9b95cc9f4f71UL, 0x7529d871b0675ddfUL,
++-	/*  13 */ 0xb8f568b42d3cbd78UL, 0x1233011b91f3da82UL,
++-		  0x2dce6ccd4a7c3b62UL, 0x75e7fc8e9e498603UL,
++-	/*  14 */ 0x2f4f13f1fcd0b6ecUL, 0xf1a8ca1f29ff7a45UL,
++-		  0xc249c1a72981e29bUL, 0x6ebe0dbb8c83b56aUL,
++-	/*  15 */ 0x7114fa8d170bb222UL, 0x65a2dcd5bf93935fUL,
++-		  0xbdc41f68b59c979aUL, 0x2f0eef79a2ce9289UL,
++-	/*  16 */ 0x42ecbf0c083c37ceUL, 0x2930bc09ec496322UL,
++-		  0xf294b0c19cfeac0dUL, 0x3780aa4bedfabb80UL,
++-	/*  17 */ 0x56c17d3e7cead929UL, 0xe7cb4beb2e5722c5UL,
++-		  0x0ce931732dbfe15aUL, 0x41b883c7621052f8UL,
++-	/*  18 */ 0xdbf75ca0c3d25350UL, 0x2936be086eb1e351UL,
++-		  0xc936e03cb4a9b212UL, 0x1d45bf82322225aaUL,
++-	/*  19 */ 0xe81ab1036a024cc5UL, 0xe212201c304c9a72UL,
++-		  0xc5d73fba6832b1fcUL, 0x20ffdb5a4d839581UL,
++-	/*  20 */ 0xa283d367be5d0fadUL, 0x6c2b25ca8b164475UL,
++-		  0x9d4935467caaf22eUL, 0x5166408eee85ff49UL,
++-	/*  21 */ 0x3c67baa2fab4e361UL, 0xb3e433c67ef35cefUL,
++-		  0x5259729241159b1cUL, 0x6a621892d5b0ab33UL,
++-	/*  22 */ 0x20b74a387555cdcbUL, 0x532aa10e1208923fUL,
++-		  0xeaa17b7762281dd1UL, 0x61ab3443f05c44bfUL,
++-	/*  23 */ 0x257a6c422324def8UL, 0x131c6c1017e3cf7fUL,
++-		  0x23758739f630a257UL, 0x295a407a01a78580UL,
++-	/*  24 */ 0xf8c443246d5da8d9UL, 0x19d775450c52fa5dUL,
++-		  0x2afcfc92731bf83dUL, 0x7d10c8e81b2b4700UL,
++-	/*  25 */ 0xc8e0271f70baa20bUL, 0x993748867ca63957UL,
++-		  0x5412efb3cb7ed4bbUL, 0x3196d36173e62975UL,
++-	/*  26 */ 0xde5bcad141c7dffcUL, 0x47cc8cd2b395c848UL,
++-		  0xa34cd942e11af3cbUL, 0x0256dbf2d04ecec2UL,
++-	/*  27 */ 0x875ab7e94b0e667fUL, 0xcad4dd83c0850d10UL,
++-		  0x47f12e8f4e72c79fUL, 0x5f1a87bb8c85b19bUL,
++-	/*  28 */ 0x7ae9d0b6437f51b8UL, 0x12c7ce5518879065UL,
++-		  0x2ade09fe5cf77aeeUL, 0x23a05a2f7d2c5627UL,
++-	/*  29 */ 0x5908e128f17c169aUL, 0xf77498dd8ad0852dUL,
++-		  0x74b4c4ceab102f64UL, 0x183abadd10139845UL,
++-	/*  30 */ 0xb165ba8daa92aaacUL, 0xd5c5ef9599386705UL,
++-		  0xbe2f8f0cf8fc40d1UL, 0x2701e635ee204514UL,
++-	/*  31 */ 0x629fa80020156514UL, 0xf223868764a8c1ceUL,
++-		  0x5b894fff0b3f060eUL, 0x60d9944cf708a3faUL,
++-	/*  32 */ 0xaeea001a1c7a201fUL, 0xebf16a633ee2ce63UL,
++-		  0x6f7709594c7a07e1UL, 0x79b958150d0208cbUL,
++-	/*  33 */ 0x24b55e5301d410e7UL, 0xe3a34edff3fdc84dUL,
++-		  0xd88768e4904032d8UL, 0x131384427b3aaeecUL,
++-	/*  34 */ 0x8405e51286234f14UL, 0x14dc4739adb4c529UL,
++-		  0xb8a2b5b250634ffdUL, 0x2fe2a94ad8a7ff93UL,
++-	/*  35 */ 0xec5c57efe843faddUL, 0x2843ce40f0bb9918UL,
++-		  0xa4b561d6cf3d6305UL, 0x743629bde8fb777eUL,
++-	/*  36 */ 0x343edd46bbaf738fUL, 0xed981828b101a651UL,
++-		  0xa401760b882c797aUL, 0x1fc223e28dc88730UL,
++-	/*  37 */ 0x48604e91fc0fba0eUL, 0xb637f78f052c6fa4UL,
++-		  0x91ccac3d09e9239cUL, 0x23f7eed4437a687cUL,
++-	/*  38 */ 0x5173b1118d9bd800UL, 0x29d641b63189d4a7UL,
++-		  0xfdbf177988bbc586UL, 0x2959894fcad81df5UL,
++-	/*  39 */ 0xaebc8ef3b4bbc899UL, 0x4148995ab26992b9UL,
++-		  0x24e20b0134f92cfbUL, 0x40d158894a05dee8UL,
++-	/*  40 */ 0x46b00b1185af76f6UL, 0x26bac77873187a79UL,
++-		  0x3dc0bf95ab8fff5fUL, 0x2a608bd8945524d7UL,
++-	/*  41 */ 0x26449588bd446302UL, 0x7c4bc21c0388439cUL,
++-		  0x8e98a4f383bd11b2UL, 0x26218d7bc9d876b9UL,
++-	/*  42 */ 0xe3081542997c178aUL, 0x3c2d29a86fb6606fUL,
++-		  0x5c217736fa279374UL, 0x7dde05734afeb1faUL,
++-	/*  43 */ 0x3bf10e3906d42babUL, 0xe4f7803e1980649cUL,
++-		  0xe6053bf89595bf7aUL, 0x394faf38da245530UL,
++-	/*  44 */ 0x7a8efb58896928f4UL, 0xfbc778e9cc6a113cUL,
++-		  0x72670ce330af596fUL, 0x48f222a81d3d6cf7UL,
++-	/*  45 */ 0xf01fce410d72caa7UL, 0x5a20ecc7213b5595UL,
++-		  0x7bc21165c1fa1483UL, 0x07f89ae31da8a741UL,
++-	/*  46 */ 0x05d2c2b4c6830ff9UL, 0xd43e330fc6316293UL,
++-		  0xa5a5590a96d3a904UL, 0x705edb91a65333b6UL,
++-	/*  47 */ 0x048ee15e0bb9a5f7UL, 0x3240cfca9e0aaf5dUL,
++-		  0x8f4b71ceedc4a40bUL, 0x621c0da3de544a6dUL,
++-	/*  48 */ 0x92872836a08c4091UL, 0xce8375b010c91445UL,
++-		  0x8a72eb524f276394UL, 0x2667fcfa7ec83635UL,
++-	/*  49 */ 0x7f4c173345e8752aUL, 0x061b47feee7079a5UL,
++-		  0x25dd9afa9f86ff34UL, 0x3780cef5425dc89cUL,
++-	/*  50 */ 0x1a46035a513bb4e9UL, 0x3e1ef379ac575adaUL,
++-		  0xc78c5f1c5fa24b50UL, 0x321a967634fd9f22UL,
++-	/*  51 */ 0x946707b8826e27faUL, 0x3dca84d64c506fd0UL,
++-		  0xc189218075e91436UL, 0x6d9284169b3b8484UL,
++-	/*  52 */ 0x3a67e840383f2ddfUL, 0x33eec9a30c4f9b75UL,
++-		  0x3ec7c86fa783ef47UL, 0x26ec449fbac9fbc4UL,
++-	/*  53 */ 0x5c0f38cba09b9e7dUL, 0x81168cc762a3478cUL,
++-		  0x3e23b0d306fc121cUL, 0x5a238aa0a5efdcddUL,
++-	/*  54 */ 0x1ba26121c4ea43ffUL, 0x36f8c77f7c8832b5UL,
++-		  0x88fbea0b0adcf99aUL, 0x5ca9938ec25bebf9UL,
++-	/*  55 */ 0xd5436a5e51fccda0UL, 0x1dbc4797c2cd893bUL,
++-		  0x19346a65d3224a08UL, 0x0f5034e49b9af466UL,
++-	/*  56 */ 0xf23c3967a1e0b96eUL, 0xe58b08fa867a4d88UL,
++-		  0xfb2fabc6a7341679UL, 0x2a75381eb6026946UL,
++-	/*  57 */ 0xc80a3be4c19420acUL, 0x66b1f6c681f2b6dcUL,
++-		  0x7cf7036761e93388UL, 0x25abbbd8a660a4c4UL,
++-	/*  58 */ 0x91ea12ba14fd5198UL, 0x684950fc4a3cffa9UL,
++-		  0xf826842130f5ad28UL, 0x3ea988f75301a441UL,
++-	/*  59 */ 0xc978109a695f8c6fUL, 0x1746eb4a0530c3f3UL,
++-		  0x444d6d77b4459995UL, 0x75952b8c054e5cc7UL,
++-	/*  60 */ 0xa3703f7915f4d6aaUL, 0x66c346202f2647d8UL,
++-		  0xd01469df811d644bUL, 0x77fea47d81a5d71fUL,
++-	/*  61 */ 0xc5e9529ef57ca381UL, 0x6eeeb4b9ce2f881aUL,
++-		  0xb6e91a28e8009bd6UL, 0x4b80be3e9afc3fecUL,
++-	/*  62 */ 0x7e3773c526aed2c5UL, 0x1b4afcb453c9a49dUL,
++-		  0xa920bdd7baffb24dUL, 0x7c54699f122d400eUL,
++-	/*  63 */ 0xef46c8e14fa94bc8UL, 0xe0b074ce2952ed5eUL,
++-		  0xbea450e1dbd885d5UL, 0x61b68649320f712cUL,
++-	/*  64 */ 0x8a485f7309ccbdd1UL, 0xbd06320d7d4d1a2dUL,
++-		  0x25232973322dbef4UL, 0x445dc4758c17f770UL,
++-	/*  65 */ 0xdb0434177cc8933cUL, 0xed6fe82175ea059fUL,
++-		  0x1efebefdc053db34UL, 0x4adbe867c65daf99UL,
++-	/*  66 */ 0x3acd71a2a90609dfUL, 0xe5e991856dd04050UL,
++-		  0x1ec69b688157c23cUL, 0x697427f6885cfe4dUL,
++-	/*  67 */ 0xd7be7b9b65e1a851UL, 0xa03d28d522c536ddUL,
++-		  0x28399d658fd2b645UL, 0x49e5b7e17c2641e1UL,
++-	/*  68 */ 0x6f8c3a98700457a4UL, 0x5078f0a25ebb6778UL,
++-		  0xd13c3ccbc382960fUL, 0x2e003258a7df84b1UL,
++-	/*  69 */ 0x8ad1f39be6296a1cUL, 0xc1eeaa652a5fbfb2UL,
++-		  0x33ee0673fd26f3cbUL, 0x59256173a69d2cccUL,
++-	/*  70 */ 0x41ea07aa4e18fc41UL, 0xd9fc19527c87a51eUL,
++-		  0xbdaacb805831ca6fUL, 0x445b652dc916694fUL,
++-	/*  71 */ 0xce92a3a7f2172315UL, 0x1edc282de11b9964UL,
++-		  0xa1823aafe04c314aUL, 0x790a2d94437cf586UL,
++-	/*  72 */ 0x71c447fb93f6e009UL, 0x8922a56722845276UL,
++-		  0xbf70903b204f5169UL, 0x2f7a89891ba319feUL,
++-	/*  73 */ 0x02a08eb577e2140cUL, 0xed9a4ed4427bdcf4UL,
++-		  0x5253ec44e4323cd1UL, 0x3e88363c14e9355bUL,
++-	/*  74 */ 0xaa66c14277110b8cUL, 0x1ae0391610a23390UL,
++-		  0x2030bd12c93fc2a2UL, 0x3ee141579555c7abUL,
++-	/*  75 */ 0x9214de3a6d6e7d41UL, 0x3ccdd88607f17efeUL,
++-		  0x674f1288f8e11217UL, 0x5682250f329f93d0UL,
++-	/*  76 */ 0x6cf00b136d2e396eUL, 0x6e4cf86f1014debfUL,
++-		  0x5930b1b5bfcc4e83UL, 0x047069b48aba16b6UL,
++-	/*  77 */ 0x0d4ce4ab69b20793UL, 0xb24db91a97d0fb9eUL,
++-		  0xcdfa50f54e00d01dUL, 0x221b1085368bddb5UL,
++-	/*  78 */ 0xe7e59468b1e3d8d2UL, 0x53c56563bd122f93UL,
++-		  0xeee8a903e0663f09UL, 0x61efa662cbbe3d42UL,
++-	/*  79 */ 0x2cf8ddddde6eab2aUL, 0x9bf80ad51435f231UL,
++-		  0x5deadacec9f04973UL, 0x29275b5d41d29b27UL,
++-	/*  80 */ 0xcfde0f0895ebf14fUL, 0xb9aab96b054905a7UL,
++-		  0xcae80dd9a1c420fdUL, 0x0a63bf2f1673bbc7UL,
++-	/*  81 */ 0x092f6e11958fbc8cUL, 0x672a81e804822fadUL,
++-		  0xcac8351560d52517UL, 0x6f3f7722c8f192f8UL,
++-	/*  82 */ 0xf8ba90ccc2e894b7UL, 0x2c7557a438ff9f0dUL,
++-		  0x894d1d855ae52359UL, 0x68e122157b743d69UL,
++-	/*  83 */ 0xd87e5570cfb919f3UL, 0x3f2cdecd95798db9UL,
++-		  0x2121154710c0a2ceUL, 0x3c66a115246dc5b2UL,
++-	/*  84 */ 0xcbedc562294ecb72UL, 0xba7143c36a280b16UL,
++-		  0x9610c2efd4078b67UL, 0x6144735d946a4b1eUL,
++-	/*  85 */ 0x536f111ed75b3350UL, 0x0211db8c2041d81bUL,
++-		  0xf93cb1000e10413cUL, 0x149dfd3c039e8876UL,
++-	/*  86 */ 0xd479dde46b63155bUL, 0xb66e15e93c837976UL,
++-		  0xdafde43b1f13e038UL, 0x5fafda1a2e4b0b35UL,
++-	/*  87 */ 0x3600bbdf17197581UL, 0x3972050bbe3cd2c2UL,
++-		  0x5938906dbdd5be86UL, 0x34fce5e43f9b860fUL,
++-	/*  88 */ 0x75a8a4cd42d14d02UL, 0x828dabc53441df65UL,
++-		  0x33dcabedd2e131d3UL, 0x3ebad76fb814d25fUL,
++-	/*  89 */ 0xd4906f566f70e10fUL, 0x5d12f7aa51690f5aUL,
++-		  0x45adb16e76cefcf2UL, 0x01f768aead232999UL,
++-	/*  90 */ 0x2b6cc77b6248febdUL, 0x3cd30628ec3aaffdUL,
++-		  0xce1c0b80d4ef486aUL, 0x4c3bff2ea6f66c23UL,
++-	/*  91 */ 0x3f2ec4094aeaeb5fUL, 0x61b19b286e372ca7UL,
++-		  0x5eefa966de2a701dUL, 0x23b20565de55e3efUL,
++-	/*  92 */ 0xe301ca5279d58557UL, 0x07b2d4ce27c2874fUL,
++-		  0xa532cd8a9dcf1d67UL, 0x2a52fee23f2bff56UL,
++-	/*  93 */ 0x8624efb37cd8663dUL, 0xbbc7ac20ffbd7594UL,
++-		  0x57b85e9c82d37445UL, 0x7b3052cb86a6ec66UL,
++-	/*  94 */ 0x3482f0ad2525e91eUL, 0x2cb68043d28edca0UL,
++-		  0xaf4f6d052e1b003aUL, 0x185f8c2529781b0aUL,
++-	/*  95 */ 0xaa41de5bd80ce0d6UL, 0x9407b2416853e9d6UL,
++-		  0x563ec36e357f4c3aUL, 0x4cc4b8dd0e297bceUL,
++-	/*  96 */ 0xa2fc1a52ffb8730eUL, 0x1811f16e67058e37UL,
++-		  0x10f9a366cddf4ee1UL, 0x72f4a0c4a0b9f099UL,
++-	/*  97 */ 0x8c16c06f663f4ea7UL, 0x693b3af74e970fbaUL,
++-		  0x2102e7f1d69ec345UL, 0x0ba53cbc968a8089UL,
++-	/*  98 */ 0xca3d9dc7fea15537UL, 0x4c6824bb51536493UL,
++-		  0xb9886314844006b1UL, 0x40d2a72ab454cc60UL,
++-	/*  99 */ 0x5936a1b712570975UL, 0x91b9d648debda657UL,
++-		  0x3344094bb64330eaUL, 0x006ba10d12ee51d0UL,
++-	/* 100 */ 0x19228468f5de5d58UL, 0x0eb12f4c38cc05b0UL,
++-		  0xa1039f9dd5601990UL, 0x4502d4ce4fff0e0bUL,
++-	/* 101 */ 0xeb2054106837c189UL, 0xd0f6544c6dd3b93cUL,
++-		  0x40727064c416d74fUL, 0x6e15c6114b502ef0UL,
++-	/* 102 */ 0x4df2a398cfb1a76bUL, 0x11256c7419f2f6b1UL,
++-		  0x4a497962066e6043UL, 0x705b3aab41355b44UL,
++-	/* 103 */ 0x365ef536d797b1d8UL, 0x00076bd622ddf0dbUL,
++-		  0x3bbf33b0e0575a88UL, 0x3777aa05c8e4ca4dUL,
++-	/* 104 */ 0x392745c85578db5fUL, 0x6fda4149dbae5ae2UL,
++-		  0xb1f0b00b8adc9867UL, 0x09963437d36f1da3UL,
++-	/* 105 */ 0x7e824e90a5dc3853UL, 0xccb5f6641f135cbdUL,
++-		  0x6736d86c87ce8fccUL, 0x625f3ce26604249fUL,
++-	/* 106 */ 0xaf8ac8059502f63fUL, 0x0c05e70a2e351469UL,
++-		  0x35292e9c764b6305UL, 0x1a394360c7e23ac3UL,
++-	/* 107 */ 0xd5c6d53251183264UL, 0x62065abd43c2b74fUL,
++-		  0xb5fbf5d03b973f9bUL, 0x13a3da3661206e5eUL,
++-	/* 108 */ 0xc6bd5837725d94e5UL, 0x18e30912205016c5UL,
++-		  0x2088ce1570033c68UL, 0x7fba1f495c837987UL,
++-	/* 109 */ 0x5a8c7423f2f9079dUL, 0x1735157b34023fc5UL,
++-		  0xe4f9b49ad2fab351UL, 0x6691ff72c878e33cUL,
++-	/* 110 */ 0x122c2adedc5eff3eUL, 0xf8dd4bf1d8956cf4UL,
++-		  0xeb86205d9e9e5bdaUL, 0x049b92b9d975c743UL,
++-	/* 111 */ 0xa5379730b0f6c05aUL, 0x72a0ffacc6f3a553UL,
++-		  0xb0032c34b20dcd6dUL, 0x470e9dbc88d5164aUL,
++-	/* 112 */ 0xb19cf10ca237c047UL, 0xb65466711f6c81a2UL,
++-		  0xb3321bd16dd80b43UL, 0x48c14f600c5fbe8eUL,
++-	/* 113 */ 0x66451c264aa6c803UL, 0xb66e3904a4fa7da6UL,
++-		  0xd45f19b0b3128395UL, 0x31602627c3c9bc10UL,
++-	/* 114 */ 0x3120dc4832e4e10dUL, 0xeb20c46756c717f7UL,
++-		  0x00f52e3f67280294UL, 0x566d4fc14730c509UL,
++-	/* 115 */ 0x7e3a5d40fd837206UL, 0xc1e926dc7159547aUL,
++-		  0x216730fba68d6095UL, 0x22e8c3843f69cea7UL,
++-	/* 116 */ 0x33d074e8930e4b2bUL, 0xb6e4350e84d15816UL,
++-		  0x5534c26ad6ba2365UL, 0x7773c12f89f1f3f3UL,
++-	/* 117 */ 0x8cba404da57962aaUL, 0x5b9897a81999ce56UL,
++-		  0x508e862f121692fcUL, 0x3a81907fa093c291UL,
++-	/* 118 */ 0x0dded0ff4725a510UL, 0x10d8cc10673fc503UL,
++-		  0x5b9d151c9f1f4e89UL, 0x32a5c1d5cb09a44cUL,
++-	/* 119 */ 0x1e0aa442b90541fbUL, 0x5f85eb7cc1b485dbUL,
++-		  0xbee595ce8a9df2e5UL, 0x25e496c722422236UL,
++-	/* 120 */ 0x5edf3c46cd0fe5b9UL, 0x34e75a7ed2a43388UL,
++-		  0xe488de11d761e352UL, 0x0e878a01a085545cUL,
++-	/* 121 */ 0xba493c77e021bb04UL, 0x2b4d1843c7df899aUL,
++-		  0x9ea37a487ae80d67UL, 0x67a9958011e41794UL,
++-	/* 122 */ 0x4b58051a6697b065UL, 0x47e33f7d8d6ba6d4UL,
++-		  0xbb4da8d483ca46c1UL, 0x68becaa181c2db0dUL,
++-	/* 123 */ 0x8d8980e90b989aa5UL, 0xf95eb14a2c93c99bUL,
++-		  0x51c6c7c4796e73a2UL, 0x6e228363b5efb569UL,
++-	/* 124 */ 0xc6bbc0b02dd624c8UL, 0x777eb47dec8170eeUL,
++-		  0x3cde15a004cfafa9UL, 0x1dc6bc087160bf9bUL,
++-	/* 125 */ 0x2e07e043eec34002UL, 0x18e9fc677a68dc7fUL,
++-		  0xd8da03188bd15b9aUL, 0x48fbc3bb00568253UL,
++-	/* 126 */ 0x57547d4cfb654ce1UL, 0xd3565b82a058e2adUL,
++-		  0xf63eaf0bbf154478UL, 0x47531ef114dfbb18UL,
++-	/* 127 */ 0xe1ec630a4278c587UL, 0x5507d546ca8e83f3UL,
++-		  0x85e135c63adc0c2bUL, 0x0aa7efa85682844eUL,
++-	/* 128 */ 0x72691ba8b3e1f615UL, 0x32b4e9701fbe3ffaUL,
++-		  0x97b6d92e39bb7868UL, 0x2cfe53dea02e39e8UL,
++-	/* 129 */ 0x687392cd85cd52b0UL, 0x27ff66c910e29831UL,
++-		  0x97134556a9832d06UL, 0x269bb0360a84f8a0UL,
++-	/* 130 */ 0x706e55457643f85cUL, 0x3734a48c9b597d1bUL,
++-		  0x7aee91e8c6efa472UL, 0x5cd6abc198a9d9e0UL,
++-	/* 131 */ 0x0e04de06cb3ce41aUL, 0xd8c6eb893402e138UL,
++-		  0x904659bb686e3772UL, 0x7215c371746ba8c8UL,
++-	/* 132 */ 0xfd12a97eeae4a2d9UL, 0x9514b7516394f2c5UL,
++-		  0x266fd5809208f294UL, 0x5c847085619a26b9UL,
++-	/* 133 */ 0x52985410fed694eaUL, 0x3c905b934a2ed254UL,
++-		  0x10bb47692d3be467UL, 0x063b3d2d69e5e9e1UL,
++-	/* 134 */ 0x472726eedda57debUL, 0xefb6c4ae10f41891UL,
++-		  0x2b1641917b307614UL, 0x117c554fc4f45b7cUL,
++-	/* 135 */ 0xc07cf3118f9d8812UL, 0x01dbd82050017939UL,
++-		  0xd7e803f4171b2827UL, 0x1015e87487d225eaUL,
++-	/* 136 */ 0xc58de3fed23acc4dUL, 0x50db91c294a7be2dUL,
++-		  0x0b94d43d1c9cf457UL, 0x6b1640fa6e37524aUL,
++-	/* 137 */ 0x692f346c5fda0d09UL, 0x200b1c59fa4d3151UL,
++-		  0xb8c46f760777a296UL, 0x4b38395f3ffdfbcfUL,
++-	/* 138 */ 0x18d25e00be54d671UL, 0x60d50582bec8aba6UL,
++-		  0x87ad8f263b78b982UL, 0x50fdf64e9cda0432UL,
++-	/* 139 */ 0x90f567aac578dcf0UL, 0xef1e9b0ef2a3133bUL,
++-		  0x0eebba9242d9de71UL, 0x15473c9bf03101c7UL,
++-	/* 140 */ 0x7c77e8ae56b78095UL, 0xb678e7666e6f078eUL,
++-		  0x2da0b9615348ba1fUL, 0x7cf931c1ff733f0bUL,
++-	/* 141 */ 0x26b357f50a0a366cUL, 0xe9708cf42b87d732UL,
++-		  0xc13aeea5f91cb2c0UL, 0x35d90c991143bb4cUL,
++-	/* 142 */ 0x47c1c404a9a0d9dcUL, 0x659e58451972d251UL,
++-		  0x3875a8c473b38c31UL, 0x1fbd9ed379561f24UL,
++-	/* 143 */ 0x11fabc6fd41ec28dUL, 0x7ef8dfe3cd2a2dcaUL,
++-		  0x72e73b5d8c404595UL, 0x6135fa4954b72f27UL,
++-	/* 144 */ 0xccfc32a2de24b69cUL, 0x3f55698c1f095d88UL,
++-		  0xbe3350ed5ac3f929UL, 0x5e9bf806ca477eebUL,
++-	/* 145 */ 0xe9ce8fb63c309f68UL, 0x5376f63565e1f9f4UL,
++-		  0xd1afcfb35a6393f1UL, 0x6632a1ede5623506UL,
++-	/* 146 */ 0x0b7d6c390c2ded4cUL, 0x56cb3281df04cb1fUL,
++-		  0x66305a1249ecc3c7UL, 0x5d588b60a38ca72aUL,
++-	/* 147 */ 0xa6ecbf78e8e5f42dUL, 0x86eeb44b3c8a3eecUL,
++-		  0xec219c48fbd21604UL, 0x1aaf1af517c36731UL,
++-	/* 148 */ 0xc306a2836769bde7UL, 0x208280622b1e2adbUL,
++-		  0x8027f51ffbff94a6UL, 0x76cfa1ce1124f26bUL,
++-	/* 149 */ 0x18eb00562422abb6UL, 0xf377c4d58f8c29c3UL,
++-		  0x4dbbc207f531561aUL, 0x0253b7f082128a27UL,
++-	/* 150 */ 0x3d1f091cb62c17e0UL, 0x4860e1abd64628a9UL,
++-		  0x52d17436309d4253UL, 0x356f97e13efae576UL,
++-	/* 151 */ 0xd351e11aa150535bUL, 0x3e6b45bb1dd878ccUL,
++-		  0x0c776128bed92c98UL, 0x1d34ae93032885b8UL,
++-	/* 152 */ 0x4ba0488ca85ba4c3UL, 0x985348c33c9ce6ceUL,
++-		  0x66124c6f97bda770UL, 0x0f81a0290654124aUL,
++-	/* 153 */ 0x9ed09ca6569b86fdUL, 0x811009fd18af9a2dUL,
++-		  0xff08d03f93d8c20aUL, 0x52a148199faef26bUL,
++-	/* 154 */ 0x3e03f9dc2d8d1b73UL, 0x4205801873961a70UL,
++-		  0xc0d987f041a35970UL, 0x07aa1f15a1c0d549UL,
++-	/* 155 */ 0xdfd46ce08cd27224UL, 0x6d0a024f934e4239UL,
++-		  0x808a7a6399897b59UL, 0x0a4556e9e13d95a2UL,
++-	/* 156 */ 0xd21a991fe9c13045UL, 0x9b0e8548fe7751b8UL,
++-		  0x5da643cb4bf30035UL, 0x77db28d63940f721UL,
++-	/* 157 */ 0xfc5eeb614adc9011UL, 0x5229419ae8c411ebUL,
++-		  0x9ec3e7787d1dcf74UL, 0x340d053e216e4cb5UL,
++-	/* 158 */ 0xcac7af39b48df2b4UL, 0xc0faec2871a10a94UL,
++-		  0x140a69245ca575edUL, 0x0cf1c37134273a4cUL,
++-	/* 159 */ 0xc8ee306ac224b8a5UL, 0x57eaee7ccb4930b0UL,
++-		  0xa1e806bdaacbe74fUL, 0x7d9a62742eeb657dUL,
++-	/* 160 */ 0x9eb6b6ef546c4830UL, 0x885cca1fddb36e2eUL,
++-		  0xe6b9f383ef0d7105UL, 0x58654fef9d2e0412UL,
++-	/* 161 */ 0xa905c4ffbe0e8e26UL, 0x942de5df9b31816eUL,
++-		  0x497d723f802e88e1UL, 0x30684dea602f408dUL,
++-	/* 162 */ 0x21e5a278a3e6cb34UL, 0xaefb6e6f5b151dc4UL,
++-		  0xb30b8e049d77ca15UL, 0x28c3c9cf53b98981UL,
++-	/* 163 */ 0x287fb721556cdd2aUL, 0x0d317ca897022274UL,
++-		  0x7468c7423a543258UL, 0x4a7f11464eb5642fUL,
++-	/* 164 */ 0xa237a4774d193aa6UL, 0xd865986ea92129a1UL,
++-		  0x24c515ecf87c1a88UL, 0x604003575f39f5ebUL,
++-	/* 165 */ 0x47b9f189570a9b27UL, 0x2b98cede465e4b78UL,
++-		  0x026df551dbb85c20UL, 0x74fcd91047e21901UL,
++-	/* 166 */ 0x13e2a90a23c1bfa3UL, 0x0cb0074e478519f6UL,
++-		  0x5ff1cbbe3af6cf44UL, 0x67fe5438be812dbeUL,
++-	/* 167 */ 0xd13cf64fa40f05b0UL, 0x054dfb2f32283787UL,
++-		  0x4173915b7f0d2aeaUL, 0x482f144f1f610d4eUL,
++-	/* 168 */ 0xf6210201b47f8234UL, 0x5d0ae1929e70b990UL,
++-		  0xdcd7f455b049567cUL, 0x7e93d0f1f0916f01UL,
++-	/* 169 */ 0xdd79cbf18a7db4faUL, 0xbe8391bf6f74c62fUL,
++-		  0x027145d14b8291bdUL, 0x585a73ea2cbf1705UL,
++-	/* 170 */ 0x485ca03e928a0db2UL, 0x10fc01a5742857e7UL,
++-		  0x2f482edbd6d551a7UL, 0x0f0433b5048fdb8aUL,
++-	/* 171 */ 0x60da2e8dd7dc6247UL, 0x88b4c9d38cd4819aUL,
++-		  0x13033ac001f66697UL, 0x273b24fe3b367d75UL,
++-	/* 172 */ 0xc6e8f66a31b3b9d4UL, 0x281514a494df49d5UL,
++-		  0xd1726fdfc8b23da7UL, 0x4b3ae7d103dee548UL,
++-	/* 173 */ 0xc6256e19ce4b9d7eUL, 0xff5c5cf186e3c61cUL,
++-		  0xacc63ca34b8ec145UL, 0x74621888fee66574UL,
++-	/* 174 */ 0x956f409645290a1eUL, 0xef0bf8e3263a962eUL,
++-		  0xed6a50eb5ec2647bUL, 0x0694283a9dca7502UL,
++-	/* 175 */ 0x769b963643a2dcd1UL, 0x42b7c8ea09fc5353UL,
++-		  0x4f002aee13397eabUL, 0x63005e2c19b7d63aUL,
++-	/* 176 */ 0xca6736da63023beaUL, 0x966c7f6db12a99b7UL,
++-		  0xace09390c537c5e1UL, 0x0b696063a1aa89eeUL,
++-	/* 177 */ 0xebb03e97288c56e5UL, 0x432a9f9f938c8be8UL,
++-		  0xa6a5a93d5b717f71UL, 0x1a5fb4c3e18f9d97UL,
++-	/* 178 */ 0x1c94e7ad1c60cdceUL, 0xee202a43fc02c4a0UL,
++-		  0x8dafe4d867c46a20UL, 0x0a10263c8ac27b58UL,
++-	/* 179 */ 0xd0dea9dfe4432a4aUL, 0x856af87bbe9277c5UL,
++-		  0xce8472acc212c71aUL, 0x6f151b6d9bbb1e91UL,
++-	/* 180 */ 0x26776c527ceed56aUL, 0x7d211cb7fbf8faecUL,
++-		  0x37ae66a6fd4609ccUL, 0x1f81b702d2770c42UL,
++-	/* 181 */ 0x2fb0b057eac58392UL, 0xe1dd89fe29744e9dUL,
++-		  0xc964f8eb17beb4f8UL, 0x29571073c9a2d41eUL,
++-	/* 182 */ 0xa948a18981c0e254UL, 0x2df6369b65b22830UL,
++-		  0xa33eb2d75fcfd3c6UL, 0x078cd6ec4199a01fUL,
++-	/* 183 */ 0x4a584a41ad900d2fUL, 0x32142b78e2c74c52UL,
++-		  0x68c4e8338431c978UL, 0x7f69ea9008689fc2UL,
++-	/* 184 */ 0x52f2c81e46a38265UL, 0xfd78072d04a832fdUL,
++-		  0x8cd7d5fa25359e94UL, 0x4de71b7454cc29d2UL,
++-	/* 185 */ 0x42eb60ad1eda6ac9UL, 0x0aad37dfdbc09c3aUL,
++-		  0x81004b71e33cc191UL, 0x44e6be345122803cUL,
++-	/* 186 */ 0x03fe8388ba1920dbUL, 0xf5d57c32150db008UL,
++-		  0x49c8c4281af60c29UL, 0x21edb518de701aeeUL,
++-	/* 187 */ 0x7fb63e418f06dc99UL, 0xa4460d99c166d7b8UL,
++-		  0x24dd5248ce520a83UL, 0x5ec3ad712b928358UL,
++-	/* 188 */ 0x15022a5fbd17930fUL, 0xa4f64a77d82570e3UL,
++-		  0x12bc8d6915783712UL, 0x498194c0fc620abbUL,
++-	/* 189 */ 0x38a2d9d255686c82UL, 0x785c6bd9193e21f0UL,
++-		  0xe4d5c81ab24a5484UL, 0x56307860b2e20989UL,
++-	/* 190 */ 0x429d55f78b4d74c4UL, 0x22f1834643350131UL,
++-		  0x1e60c24598c71fffUL, 0x59f2f014979983efUL,
++-	/* 191 */ 0x46a47d56eb494a44UL, 0x3e22a854d636a18eUL,
++-		  0xb346e15274491c3bUL, 0x2ceafd4e5390cde7UL,
++-	/* 192 */ 0xba8a8538be0d6675UL, 0x4b9074bb50818e23UL,
++-		  0xcbdab89085d304c3UL, 0x61a24fe0e56192c4UL,
++-	/* 193 */ 0xcb7615e6db525bcbUL, 0xdd7d8c35a567e4caUL,
++-		  0xe6b4153acafcdd69UL, 0x2d668e097f3c9766UL,
++-	/* 194 */ 0xa57e7e265ce55ef0UL, 0x5d9f4e527cd4b967UL,
++-		  0xfbc83606492fd1e5UL, 0x090d52beb7c3f7aeUL,
++-	/* 195 */ 0x09b9515a1e7b4d7cUL, 0x1f266a2599da44c0UL,
++-		  0xa1c49548e2c55504UL, 0x7ef04287126f15ccUL,
++-	/* 196 */ 0xfed1659dbd30ef15UL, 0x8b4ab9eec4e0277bUL,
++-		  0x884d6236a5df3291UL, 0x1fd96ea6bf5cf788UL,
++-	/* 197 */ 0x42a161981f190d9aUL, 0x61d849507e6052c1UL,
++-		  0x9fe113bf285a2cd5UL, 0x7c22d676dbad85d8UL,
++-	/* 198 */ 0x82e770ed2bfbd27dUL, 0x4c05b2ece996f5a5UL,
++-		  0xcd40a9c2b0900150UL, 0x5895319213d9bf64UL,
++-	/* 199 */ 0xe7cc5d703fea2e08UL, 0xb50c491258e2188cUL,
++-		  0xcce30baa48205bf0UL, 0x537c659ccfa32d62UL,
++-	/* 200 */ 0x37b6623a98cfc088UL, 0xfe9bed1fa4d6aca4UL,
++-		  0x04d29b8e56a8d1b0UL, 0x725f71c40b519575UL,
++-	/* 201 */ 0x28c7f89cd0339ce6UL, 0x8367b14469ddc18bUL,
++-		  0x883ada83a6a1652cUL, 0x585f1974034d6c17UL,
++-	/* 202 */ 0x89cfb266f1b19188UL, 0xe63b4863e7c35217UL,
++-		  0xd88c9da6b4c0526aUL, 0x3e035c9df0954635UL,
++-	/* 203 */ 0xdd9d5412fb45de9dUL, 0xdd684532e4cff40dUL,
++-		  0x4b5c999b151d671cUL, 0x2d8c2cc811e7f690UL,
++-	/* 204 */ 0x7f54be1d90055d40UL, 0xa464c5df464aaf40UL,
++-		  0x33979624f0e917beUL, 0x2c018dc527356b30UL,
++-	/* 205 */ 0xa5415024e330b3d4UL, 0x73ff3d96691652d3UL,
++-		  0x94ec42c4ef9b59f1UL, 0x0747201618d08e5aUL,
++-	/* 206 */ 0x4d6ca48aca411c53UL, 0x66415f2fcfa66119UL,
++-		  0x9c4dd40051e227ffUL, 0x59810bc09a02f7ebUL,
++-	/* 207 */ 0x2a7eb171b3dc101dUL, 0x441c5ab99ffef68eUL,
++-		  0x32025c9b93b359eaUL, 0x5e8ce0a71e9d112fUL,
++-	/* 208 */ 0xbfcccb92429503fdUL, 0xd271ba752f095d55UL,
++-		  0x345ead5e972d091eUL, 0x18c8df11a83103baUL,
++-	/* 209 */ 0x90cd949a9aed0f4cUL, 0xc5d1f4cb6660e37eUL,
++-		  0xb8cac52d56c52e0bUL, 0x6e42e400c5808e0dUL,
++-	/* 210 */ 0xa3b46966eeaefd23UL, 0x0c4f1f0be39ecdcaUL,
++-		  0x189dc8c9d683a51dUL, 0x51f27f054c09351bUL,
++-	/* 211 */ 0x4c487ccd2a320682UL, 0x587ea95bb3df1c96UL,
++-		  0xc8ccf79e555cb8e8UL, 0x547dc829a206d73dUL,
++-	/* 212 */ 0xb822a6cd80c39b06UL, 0xe96d54732000d4c6UL,
++-		  0x28535b6f91463b4dUL, 0x228f4660e2486e1dUL,
++-	/* 213 */ 0x98799538de8d3abfUL, 0x8cd8330045ebca6eUL,
++-		  0x79952a008221e738UL, 0x4322e1a7535cd2bbUL,
++-	/* 214 */ 0xb114c11819d1801cUL, 0x2016e4d84f3f5ec7UL,
++-		  0xdd0e2df409260f4cUL, 0x5ec362c0ae5f7266UL,
++-	/* 215 */ 0xc0462b18b8b2b4eeUL, 0x7cc8d950274d1afbUL,
++-		  0xf25f7105436b02d2UL, 0x43bbf8dcbff9ccd3UL,
++-	/* 216 */ 0xb6ad1767a039e9dfUL, 0xb0714da8f69d3583UL,
++-		  0x5e55fa18b42931f5UL, 0x4ed5558f33c60961UL,
++-	/* 217 */ 0x1fe37901c647a5ddUL, 0x593ddf1f8081d357UL,
++-		  0x0249a4fd813fd7a6UL, 0x69acca274e9caf61UL,
++-	/* 218 */ 0x047ba3ea330721c9UL, 0x83423fc20e7e1ea0UL,
++-		  0x1df4c0af01314a60UL, 0x09a62dab89289527UL,
++-	/* 219 */ 0xa5b325a49cc6cb00UL, 0xe94b5dc654b56cb6UL,
++-		  0x3be28779adc994a0UL, 0x4296e8f8ba3a4aadUL,
++-	/* 220 */ 0x328689761e451eabUL, 0x2e4d598bff59594aUL,
++-		  0x49b96853d7a7084aUL, 0x4980a319601420a8UL,
++-	/* 221 */ 0x9565b9e12f552c42UL, 0x8a5318db7100fe96UL,
++-		  0x05c90b4d43add0d7UL, 0x538b4cd66a5d4edaUL,
++-	/* 222 */ 0xf4e94fc3e89f039fUL, 0x592c9af26f618045UL,
++-		  0x08a36eb5fd4b9550UL, 0x25fffaf6c2ed1419UL,
++-	/* 223 */ 0x34434459cc79d354UL, 0xeeecbfb4b1d5476bUL,
++-		  0xddeb34a061615d99UL, 0x5129cecceb64b773UL,
++-	/* 224 */ 0xee43215894993520UL, 0x772f9c7cf14c0b3bUL,
++-		  0xd2e2fce306bedad5UL, 0x715f42b546f06a97UL,
++-	/* 225 */ 0x434ecdceda5b5f1aUL, 0x0da17115a49741a9UL,
++-		  0x680bd77c73edad2eUL, 0x487c02354edd9041UL,
++-	/* 226 */ 0xb8efeff3a70ed9c4UL, 0x56a32aa3e857e302UL,
++-		  0xdf3a68bd48a2a5a0UL, 0x07f650b73176c444UL,
++-	/* 227 */ 0xe38b9b1626e0ccb1UL, 0x79e053c18b09fb36UL,
++-		  0x56d90319c9f94964UL, 0x1ca941e7ac9ff5c4UL,
++-	/* 228 */ 0x49c4df29162fa0bbUL, 0x8488cf3282b33305UL,
++-		  0x95dfda14cabb437dUL, 0x3391f78264d5ad86UL,
++-	/* 229 */ 0x729ae06ae2b5095dUL, 0xd58a58d73259a946UL,
++-		  0xe9834262d13921edUL, 0x27fedafaa54bb592UL,
++-	/* 230 */ 0xa99dc5b829ad48bbUL, 0x5f025742499ee260UL,
++-		  0x802c8ecd5d7513fdUL, 0x78ceb3ef3f6dd938UL,
++-	/* 231 */ 0xc342f44f8a135d94UL, 0x7b9edb44828cdda3UL,
++-		  0x9436d11a0537cfe7UL, 0x5064b164ec1ab4c8UL,
++-	/* 232 */ 0x7020eccfd37eb2fcUL, 0x1f31ea3ed90d25fcUL,
++-		  0x1b930d7bdfa1bb34UL, 0x5344467a48113044UL,
++-	/* 233 */ 0x70073170f25e6dfbUL, 0xe385dc1a50114cc8UL,
++-		  0x2348698ac8fc4f00UL, 0x2a77a55284dd40d8UL,
++-	/* 234 */ 0xfe06afe0c98c6ce4UL, 0xc235df96dddfd6e4UL,
++-		  0x1428d01e33bf1ed3UL, 0x785768ec9300bdafUL,
++-	/* 235 */ 0x9702e57a91deb63bUL, 0x61bdb8bfe5ce8b80UL,
++-		  0x645b426f3d1d58acUL, 0x4804a82227a557bcUL,
++-	/* 236 */ 0x8e57048ab44d2601UL, 0x68d6501a4b3a6935UL,
++-		  0xc39c9ec3f9e1c293UL, 0x4172f257d4de63e2UL,
++-	/* 237 */ 0xd368b450330c6401UL, 0x040d3017418f2391UL,
++-		  0x2c34bb6090b7d90dUL, 0x16f649228fdfd51fUL,
++-	/* 238 */ 0xbea6818e2b928ef5UL, 0xe28ccf91cdc11e72UL,
++-		  0x594aaa68e77a36cdUL, 0x313034806c7ffd0fUL,
++-	/* 239 */ 0x8a9d27ac2249bd65UL, 0x19a3b464018e9512UL,
++-		  0xc26ccff352b37ec7UL, 0x056f68341d797b21UL,
++-	/* 240 */ 0x5e79d6757efd2327UL, 0xfabdbcb6553afe15UL,
++-		  0xd3e7222c6eaf5a60UL, 0x7046c76d4dae743bUL,
++-	/* 241 */ 0x660be872b18d4a55UL, 0x19992518574e1496UL,
++-		  0xc103053a302bdcbbUL, 0x3ed8e9800b218e8eUL,
++-	/* 242 */ 0x7b0b9239fa75e03eUL, 0xefe9fb684633c083UL,
++-		  0x98a35fbe391a7793UL, 0x6065510fe2d0fe34UL,
++-	/* 243 */ 0x55cb668548abad0cUL, 0xb4584548da87e527UL,
++-		  0x2c43ecea0107c1ddUL, 0x526028809372de35UL,
++-	/* 244 */ 0x3415c56af9213b1fUL, 0x5bee1a4d017e98dbUL,
++-		  0x13f6b105b5cf709bUL, 0x5ff20e3482b29ab6UL,
++-	/* 245 */ 0x0aa29c75cc2e6c90UL, 0xfc7d73ca3a70e206UL,
++-		  0x899fc38fc4b5c515UL, 0x250386b124ffc207UL,
++-	/* 246 */ 0x54ea28d5ae3d2b56UL, 0x9913149dd6de60ceUL,
++-		  0x16694fc58f06d6c1UL, 0x46b23975eb018fc7UL,
++-	/* 247 */ 0x470a6a0fb4b7b4e2UL, 0x5d92475a8f7253deUL,
++-		  0xabeee5b52fbd3adbUL, 0x7fa20801a0806968UL,
++-	/* 248 */ 0x76f3faf19f7714d2UL, 0xb3e840c12f4660c3UL,
++-		  0x0fb4cd8df212744eUL, 0x4b065a251d3a2dd2UL,
++-	/* 249 */ 0x5cebde383d77cd4aUL, 0x6adf39df882c9cb1UL,
++-		  0xa2dd242eb09af759UL, 0x3147c0e50e5f6422UL,
++-	/* 250 */ 0x164ca5101d1350dbUL, 0xf8d13479c33fc962UL,
++-		  0xe640ce4d13e5da08UL, 0x4bdee0c45061f8baUL,
++-	/* 251 */ 0xd7c46dc1a4edb1c9UL, 0x5514d7b6437fd98aUL,
++-		  0x58942f6bb2a1c00bUL, 0x2dffb2ab1d70710eUL,
++-	/* 252 */ 0xccdfcf2fc18b6d68UL, 0xa8ebcba8b7806167UL,
++-		  0x980697f95e2937e3UL, 0x02fbba1cd0126e8cUL
++-};
++-
++-/* c is two 512-bit products: c0[0:7]=a0[0:3]*b0[0:3] and c1[8:15]=a1[4:7]*b1[4:7]
++- * a is two 256-bit integers: a0[0:3] and a1[4:7]
++- * b is two 256-bit integers: b0[0:3] and b1[4:7]
++- */
++-static void mul2_256x256_integer_adx(u64 *const c, const u64 *const a,
++-				     const u64 *const b)
++-{
++-	asm volatile(
++-		"xorl %%r14d, %%r14d ;"
++-		"movq   (%1), %%rdx; "	/* A[0] */
++-		"mulx   (%2),  %%r8, %%r15; " /* A[0]*B[0] */
++-		"xorl %%r10d, %%r10d ;"
++-		"movq %%r8, (%0) ;"
++-		"mulx  8(%2), %%r10, %%rax; " /* A[0]*B[1] */
++-		"adox %%r10, %%r15 ;"
++-		"mulx 16(%2),  %%r8, %%rbx; " /* A[0]*B[2] */
++-		"adox  %%r8, %%rax ;"
++-		"mulx 24(%2), %%r10, %%rcx; " /* A[0]*B[3] */
++-		"adox %%r10, %%rbx ;"
++-		/******************************************/
++-		"adox %%r14, %%rcx ;"
++-
++-		"movq  8(%1), %%rdx; "	/* A[1] */
++-		"mulx   (%2),  %%r8,  %%r9; " /* A[1]*B[0] */
++-		"adox %%r15,  %%r8 ;"
++-		"movq  %%r8, 8(%0) ;"
++-		"mulx  8(%2), %%r10, %%r11; " /* A[1]*B[1] */
++-		"adox %%r10,  %%r9 ;"
++-		"adcx  %%r9, %%rax ;"
++-		"mulx 16(%2),  %%r8, %%r13; " /* A[1]*B[2] */
++-		"adox  %%r8, %%r11 ;"
++-		"adcx %%r11, %%rbx ;"
++-		"mulx 24(%2), %%r10, %%r15; " /* A[1]*B[3] */
++-		"adox %%r10, %%r13 ;"
++-		"adcx %%r13, %%rcx ;"
++-		/******************************************/
++-		"adox %%r14, %%r15 ;"
++-		"adcx %%r14, %%r15 ;"
++-
++-		"movq 16(%1), %%rdx; " /* A[2] */
++-		"xorl %%r10d, %%r10d ;"
++-		"mulx   (%2),  %%r8,  %%r9; " /* A[2]*B[0] */
++-		"adox %%rax,  %%r8 ;"
++-		"movq %%r8, 16(%0) ;"
++-		"mulx  8(%2), %%r10, %%r11; " /* A[2]*B[1] */
++-		"adox %%r10,  %%r9 ;"
++-		"adcx  %%r9, %%rbx ;"
++-		"mulx 16(%2),  %%r8, %%r13; " /* A[2]*B[2] */
++-		"adox  %%r8, %%r11 ;"
++-		"adcx %%r11, %%rcx ;"
++-		"mulx 24(%2), %%r10, %%rax; " /* A[2]*B[3] */
++-		"adox %%r10, %%r13 ;"
++-		"adcx %%r13, %%r15 ;"
++-		/******************************************/
++-		"adox %%r14, %%rax ;"
++-		"adcx %%r14, %%rax ;"
++-
++-		"movq 24(%1), %%rdx; " /* A[3] */
++-		"xorl %%r10d, %%r10d ;"
++-		"mulx   (%2),  %%r8,  %%r9; " /* A[3]*B[0] */
++-		"adox %%rbx,  %%r8 ;"
++-		"movq %%r8, 24(%0) ;"
++-		"mulx  8(%2), %%r10, %%r11; " /* A[3]*B[1] */
++-		"adox %%r10,  %%r9 ;"
++-		"adcx  %%r9, %%rcx ;"
++-		"movq %%rcx, 32(%0) ;"
++-		"mulx 16(%2),  %%r8, %%r13; " /* A[3]*B[2] */
++-		"adox  %%r8, %%r11 ;"
++-		"adcx %%r11, %%r15 ;"
++-		"movq %%r15, 40(%0) ;"
++-		"mulx 24(%2), %%r10, %%rbx; " /* A[3]*B[3] */
++-		"adox %%r10, %%r13 ;"
++-		"adcx %%r13, %%rax ;"
++-		"movq %%rax, 48(%0) ;"
++-		/******************************************/
++-		"adox %%r14, %%rbx ;"
++-		"adcx %%r14, %%rbx ;"
++-		"movq %%rbx, 56(%0) ;"
++-
++-		"movq 32(%1), %%rdx; "	/* C[0] */
++-		"mulx 32(%2),  %%r8, %%r15; " /* C[0]*D[0] */
++-		"xorl %%r10d, %%r10d ;"
++-		"movq %%r8, 64(%0);"
++-		"mulx 40(%2), %%r10, %%rax; " /* C[0]*D[1] */
++-		"adox %%r10, %%r15 ;"
++-		"mulx 48(%2),  %%r8, %%rbx; " /* C[0]*D[2] */
++-		"adox  %%r8, %%rax ;"
++-		"mulx 56(%2), %%r10, %%rcx; " /* C[0]*D[3] */
++-		"adox %%r10, %%rbx ;"
++-		/******************************************/
++-		"adox %%r14, %%rcx ;"
++-
++-		"movq 40(%1), %%rdx; " /* C[1] */
++-		"xorl %%r10d, %%r10d ;"
++-		"mulx 32(%2),  %%r8,  %%r9; " /* C[1]*D[0] */
++-		"adox %%r15,  %%r8 ;"
++-		"movq  %%r8, 72(%0);"
++-		"mulx 40(%2), %%r10, %%r11; " /* C[1]*D[1] */
++-		"adox %%r10,  %%r9 ;"
++-		"adcx  %%r9, %%rax ;"
++-		"mulx 48(%2),  %%r8, %%r13; " /* C[1]*D[2] */
++-		"adox  %%r8, %%r11 ;"
++-		"adcx %%r11, %%rbx ;"
++-		"mulx 56(%2), %%r10, %%r15; " /* C[1]*D[3] */
++-		"adox %%r10, %%r13 ;"
++-		"adcx %%r13, %%rcx ;"
++-		/******************************************/
++-		"adox %%r14, %%r15 ;"
++-		"adcx %%r14, %%r15 ;"
++-
++-		"movq 48(%1), %%rdx; " /* C[2] */
++-		"xorl %%r10d, %%r10d ;"
++-		"mulx 32(%2),  %%r8,  %%r9; " /* C[2]*D[0] */
++-		"adox %%rax,  %%r8 ;"
++-		"movq  %%r8, 80(%0);"
++-		"mulx 40(%2), %%r10, %%r11; " /* C[2]*D[1] */
++-		"adox %%r10,  %%r9 ;"
++-		"adcx  %%r9, %%rbx ;"
++-		"mulx 48(%2),  %%r8, %%r13; " /* C[2]*D[2] */
++-		"adox  %%r8, %%r11 ;"
++-		"adcx %%r11, %%rcx ;"
++-		"mulx 56(%2), %%r10, %%rax; " /* C[2]*D[3] */
++-		"adox %%r10, %%r13 ;"
++-		"adcx %%r13, %%r15 ;"
++-		/******************************************/
++-		"adox %%r14, %%rax ;"
++-		"adcx %%r14, %%rax ;"
++-
++-		"movq 56(%1), %%rdx; " /* C[3] */
++-		"xorl %%r10d, %%r10d ;"
++-		"mulx 32(%2),  %%r8,  %%r9; " /* C[3]*D[0] */
++-		"adox %%rbx,  %%r8 ;"
++-		"movq  %%r8, 88(%0);"
++-		"mulx 40(%2), %%r10, %%r11; " /* C[3]*D[1] */
++-		"adox %%r10,  %%r9 ;"
++-		"adcx  %%r9, %%rcx ;"
++-		"movq %%rcx,  96(%0) ;"
++-		"mulx 48(%2),  %%r8, %%r13; " /* C[3]*D[2] */
++-		"adox  %%r8, %%r11 ;"
++-		"adcx %%r11, %%r15 ;"
++-		"movq %%r15, 104(%0) ;"
++-		"mulx 56(%2), %%r10, %%rbx; " /* C[3]*D[3] */
++-		"adox %%r10, %%r13 ;"
++-		"adcx %%r13, %%rax ;"
++-		"movq %%rax, 112(%0) ;"
++-		/******************************************/
++-		"adox %%r14, %%rbx ;"
++-		"adcx %%r14, %%rbx ;"
++-		"movq %%rbx, 120(%0) ;"
++-		:
++-		: "r"(c), "r"(a), "r"(b)
++-		: "memory", "cc", "%rax", "%rbx", "%rcx", "%rdx", "%r8", "%r9",
++-		  "%r10", "%r11", "%r13", "%r14", "%r15");
++-}
++-
++-static void mul2_256x256_integer_bmi2(u64 *const c, const u64 *const a,
++-				      const u64 *const b)
+++static __always_inline u64 eq_mask(u64 a, u64 b)
++ {
++-	asm volatile(
++-		"movq   (%1), %%rdx; "	/* A[0] */
++-		"mulx   (%2),  %%r8, %%r15; " /* A[0]*B[0] */
++-		"movq %%r8,  (%0) ;"
++-		"mulx  8(%2), %%r10, %%rax; " /* A[0]*B[1] */
++-		"addq %%r10, %%r15 ;"
++-		"mulx 16(%2),  %%r8, %%rbx; " /* A[0]*B[2] */
++-		"adcq  %%r8, %%rax ;"
++-		"mulx 24(%2), %%r10, %%rcx; " /* A[0]*B[3] */
++-		"adcq %%r10, %%rbx ;"
++-		/******************************************/
++-		"adcq    $0, %%rcx ;"
++-
++-		"movq  8(%1), %%rdx; "	/* A[1] */
++-		"mulx   (%2),  %%r8,  %%r9; " /* A[1]*B[0] */
++-		"addq %%r15,  %%r8 ;"
++-		"movq %%r8, 8(%0) ;"
++-		"mulx  8(%2), %%r10, %%r11; " /* A[1]*B[1] */
++-		"adcq %%r10,  %%r9 ;"
++-		"mulx 16(%2),  %%r8, %%r13; " /* A[1]*B[2] */
++-		"adcq  %%r8, %%r11 ;"
++-		"mulx 24(%2), %%r10, %%r15; " /* A[1]*B[3] */
++-		"adcq %%r10, %%r13 ;"
++-		/******************************************/
++-		"adcq    $0, %%r15 ;"
++-
++-		"addq  %%r9, %%rax ;"
++-		"adcq %%r11, %%rbx ;"
++-		"adcq %%r13, %%rcx ;"
++-		"adcq    $0, %%r15 ;"
++-
++-		"movq 16(%1), %%rdx; "	/* A[2] */
++-		"mulx   (%2),  %%r8,  %%r9; " /* A[2]*B[0] */
++-		"addq %%rax,  %%r8 ;"
++-		"movq %%r8, 16(%0) ;"
++-		"mulx  8(%2), %%r10, %%r11; " /* A[2]*B[1] */
++-		"adcq %%r10,  %%r9 ;"
++-		"mulx 16(%2),  %%r8, %%r13; " /* A[2]*B[2] */
++-		"adcq  %%r8, %%r11 ;"
++-		"mulx 24(%2), %%r10, %%rax; " /* A[2]*B[3] */
++-		"adcq %%r10, %%r13 ;"
++-		/******************************************/
++-		"adcq    $0, %%rax ;"
++-
++-		"addq  %%r9, %%rbx ;"
++-		"adcq %%r11, %%rcx ;"
++-		"adcq %%r13, %%r15 ;"
++-		"adcq    $0, %%rax ;"
++-
++-		"movq 24(%1), %%rdx; "	/* A[3] */
++-		"mulx   (%2),  %%r8,  %%r9; " /* A[3]*B[0] */
++-		"addq %%rbx,  %%r8 ;"
++-		"movq %%r8, 24(%0) ;"
++-		"mulx  8(%2), %%r10, %%r11; " /* A[3]*B[1] */
++-		"adcq %%r10,  %%r9 ;"
++-		"mulx 16(%2),  %%r8, %%r13; " /* A[3]*B[2] */
++-		"adcq  %%r8, %%r11 ;"
++-		"mulx 24(%2), %%r10, %%rbx; " /* A[3]*B[3] */
++-		"adcq %%r10, %%r13 ;"
++-		/******************************************/
++-		"adcq    $0, %%rbx ;"
++-
++-		"addq  %%r9, %%rcx ;"
++-		"movq %%rcx, 32(%0) ;"
++-		"adcq %%r11, %%r15 ;"
++-		"movq %%r15, 40(%0) ;"
++-		"adcq %%r13, %%rax ;"
++-		"movq %%rax, 48(%0) ;"
++-		"adcq    $0, %%rbx ;"
++-		"movq %%rbx, 56(%0) ;"
++-
++-		"movq 32(%1), %%rdx; "	/* C[0] */
++-		"mulx 32(%2),  %%r8, %%r15; " /* C[0]*D[0] */
++-		"movq %%r8, 64(%0) ;"
++-		"mulx 40(%2), %%r10, %%rax; " /* C[0]*D[1] */
++-		"addq %%r10, %%r15 ;"
++-		"mulx 48(%2),  %%r8, %%rbx; " /* C[0]*D[2] */
++-		"adcq  %%r8, %%rax ;"
++-		"mulx 56(%2), %%r10, %%rcx; " /* C[0]*D[3] */
++-		"adcq %%r10, %%rbx ;"
++-		/******************************************/
++-		"adcq    $0, %%rcx ;"
++-
++-		"movq 40(%1), %%rdx; "	/* C[1] */
++-		"mulx 32(%2),  %%r8,  %%r9; " /* C[1]*D[0] */
++-		"addq %%r15,  %%r8 ;"
++-		"movq %%r8, 72(%0) ;"
++-		"mulx 40(%2), %%r10, %%r11; " /* C[1]*D[1] */
++-		"adcq %%r10,  %%r9 ;"
++-		"mulx 48(%2),  %%r8, %%r13; " /* C[1]*D[2] */
++-		"adcq  %%r8, %%r11 ;"
++-		"mulx 56(%2), %%r10, %%r15; " /* C[1]*D[3] */
++-		"adcq %%r10, %%r13 ;"
++-		/******************************************/
++-		"adcq    $0, %%r15 ;"
++-
++-		"addq  %%r9, %%rax ;"
++-		"adcq %%r11, %%rbx ;"
++-		"adcq %%r13, %%rcx ;"
++-		"adcq    $0, %%r15 ;"
++-
++-		"movq 48(%1), %%rdx; "	/* C[2] */
++-		"mulx 32(%2),  %%r8,  %%r9; " /* C[2]*D[0] */
++-		"addq %%rax,  %%r8 ;"
++-		"movq %%r8, 80(%0) ;"
++-		"mulx 40(%2), %%r10, %%r11; " /* C[2]*D[1] */
++-		"adcq %%r10,  %%r9 ;"
++-		"mulx 48(%2),  %%r8, %%r13; " /* C[2]*D[2] */
++-		"adcq  %%r8, %%r11 ;"
++-		"mulx 56(%2), %%r10, %%rax; " /* C[2]*D[3] */
++-		"adcq %%r10, %%r13 ;"
++-		/******************************************/
++-		"adcq    $0, %%rax ;"
++-
++-		"addq  %%r9, %%rbx ;"
++-		"adcq %%r11, %%rcx ;"
++-		"adcq %%r13, %%r15 ;"
++-		"adcq    $0, %%rax ;"
++-
++-		"movq 56(%1), %%rdx; "	/* C[3] */
++-		"mulx 32(%2),  %%r8,  %%r9; " /* C[3]*D[0] */
++-		"addq %%rbx,  %%r8 ;"
++-		"movq %%r8, 88(%0) ;"
++-		"mulx 40(%2), %%r10, %%r11; " /* C[3]*D[1] */
++-		"adcq %%r10,  %%r9 ;"
++-		"mulx 48(%2),  %%r8, %%r13; " /* C[3]*D[2] */
++-		"adcq  %%r8, %%r11 ;"
++-		"mulx 56(%2), %%r10, %%rbx; " /* C[3]*D[3] */
++-		"adcq %%r10, %%r13 ;"
++-		/******************************************/
++-		"adcq    $0, %%rbx ;"
++-
++-		"addq  %%r9, %%rcx ;"
++-		"movq %%rcx,  96(%0) ;"
++-		"adcq %%r11, %%r15 ;"
++-		"movq %%r15, 104(%0) ;"
++-		"adcq %%r13, %%rax ;"
++-		"movq %%rax, 112(%0) ;"
++-		"adcq    $0, %%rbx ;"
++-		"movq %%rbx, 120(%0) ;"
++-		:
++-		: "r"(c), "r"(a), "r"(b)
++-		: "memory", "cc", "%rax", "%rbx", "%rcx", "%rdx", "%r8", "%r9",
++-		  "%r10", "%r11", "%r13", "%r15");
+++	u64 x = a ^ b;
+++	u64 minus_x = ~x + (u64)1U;
+++	u64 x_or_minus_x = x | minus_x;
+++	u64 xnx = x_or_minus_x >> (u32)63U;
+++	return xnx - (u64)1U;
++ }
++ 
++-static void sqr2_256x256_integer_adx(u64 *const c, const u64 *const a)
+++static __always_inline u64 gte_mask(u64 a, u64 b)
++ {
++-	asm volatile(
++-		"movq   (%1), %%rdx        ;" /* A[0]      */
++-		"mulx  8(%1),  %%r8, %%r14 ;" /* A[1]*A[0] */
++-		"xorl %%r15d, %%r15d;"
++-		"mulx 16(%1),  %%r9, %%r10 ;" /* A[2]*A[0] */
++-		"adcx %%r14,  %%r9 ;"
++-		"mulx 24(%1), %%rax, %%rcx ;" /* A[3]*A[0] */
++-		"adcx %%rax, %%r10 ;"
++-		"movq 24(%1), %%rdx        ;" /* A[3]      */
++-		"mulx  8(%1), %%r11, %%rbx ;" /* A[1]*A[3] */
++-		"adcx %%rcx, %%r11 ;"
++-		"mulx 16(%1), %%rax, %%r13 ;" /* A[2]*A[3] */
++-		"adcx %%rax, %%rbx ;"
++-		"movq  8(%1), %%rdx        ;" /* A[1]      */
++-		"adcx %%r15, %%r13 ;"
++-		"mulx 16(%1), %%rax, %%rcx ;" /* A[2]*A[1] */
++-		"movq    $0, %%r14 ;"
++-		/******************************************/
++-		"adcx %%r15, %%r14 ;"
++-
++-		"xorl %%r15d, %%r15d;"
++-		"adox %%rax, %%r10 ;"
++-		"adcx  %%r8,  %%r8 ;"
++-		"adox %%rcx, %%r11 ;"
++-		"adcx  %%r9,  %%r9 ;"
++-		"adox %%r15, %%rbx ;"
++-		"adcx %%r10, %%r10 ;"
++-		"adox %%r15, %%r13 ;"
++-		"adcx %%r11, %%r11 ;"
++-		"adox %%r15, %%r14 ;"
++-		"adcx %%rbx, %%rbx ;"
++-		"adcx %%r13, %%r13 ;"
++-		"adcx %%r14, %%r14 ;"
++-
++-		"movq   (%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ;" /* A[0]^2 */
++-		/*******************/
++-		"movq %%rax,  0(%0) ;"
++-		"addq %%rcx,  %%r8 ;"
++-		"movq  %%r8,  8(%0) ;"
++-		"movq  8(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ;" /* A[1]^2 */
++-		"adcq %%rax,  %%r9 ;"
++-		"movq  %%r9, 16(%0) ;"
++-		"adcq %%rcx, %%r10 ;"
++-		"movq %%r10, 24(%0) ;"
++-		"movq 16(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ;" /* A[2]^2 */
++-		"adcq %%rax, %%r11 ;"
++-		"movq %%r11, 32(%0) ;"
++-		"adcq %%rcx, %%rbx ;"
++-		"movq %%rbx, 40(%0) ;"
++-		"movq 24(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ;" /* A[3]^2 */
++-		"adcq %%rax, %%r13 ;"
++-		"movq %%r13, 48(%0) ;"
++-		"adcq %%rcx, %%r14 ;"
++-		"movq %%r14, 56(%0) ;"
++-
++-
++-		"movq 32(%1), %%rdx        ;" /* B[0]      */
++-		"mulx 40(%1),  %%r8, %%r14 ;" /* B[1]*B[0] */
++-		"xorl %%r15d, %%r15d;"
++-		"mulx 48(%1),  %%r9, %%r10 ;" /* B[2]*B[0] */
++-		"adcx %%r14,  %%r9 ;"
++-		"mulx 56(%1), %%rax, %%rcx ;" /* B[3]*B[0] */
++-		"adcx %%rax, %%r10 ;"
++-		"movq 56(%1), %%rdx        ;" /* B[3]      */
++-		"mulx 40(%1), %%r11, %%rbx ;" /* B[1]*B[3] */
++-		"adcx %%rcx, %%r11 ;"
++-		"mulx 48(%1), %%rax, %%r13 ;" /* B[2]*B[3] */
++-		"adcx %%rax, %%rbx ;"
++-		"movq 40(%1), %%rdx        ;" /* B[1]      */
++-		"adcx %%r15, %%r13 ;"
++-		"mulx 48(%1), %%rax, %%rcx ;" /* B[2]*B[1] */
++-		"movq    $0, %%r14 ;"
++-		/******************************************/
++-		"adcx %%r15, %%r14 ;"
++-
++-		"xorl %%r15d, %%r15d;"
++-		"adox %%rax, %%r10 ;"
++-		"adcx  %%r8,  %%r8 ;"
++-		"adox %%rcx, %%r11 ;"
++-		"adcx  %%r9,  %%r9 ;"
++-		"adox %%r15, %%rbx ;"
++-		"adcx %%r10, %%r10 ;"
++-		"adox %%r15, %%r13 ;"
++-		"adcx %%r11, %%r11 ;"
++-		"adox %%r15, %%r14 ;"
++-		"adcx %%rbx, %%rbx ;"
++-		"adcx %%r13, %%r13 ;"
++-		"adcx %%r14, %%r14 ;"
++-
++-		"movq 32(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ;" /* B[0]^2 */
++-		/*******************/
++-		"movq %%rax,  64(%0) ;"
++-		"addq %%rcx,  %%r8 ;"
++-		"movq  %%r8,  72(%0) ;"
++-		"movq 40(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ;" /* B[1]^2 */
++-		"adcq %%rax,  %%r9 ;"
++-		"movq  %%r9,  80(%0) ;"
++-		"adcq %%rcx, %%r10 ;"
++-		"movq %%r10,  88(%0) ;"
++-		"movq 48(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ;" /* B[2]^2 */
++-		"adcq %%rax, %%r11 ;"
++-		"movq %%r11,  96(%0) ;"
++-		"adcq %%rcx, %%rbx ;"
++-		"movq %%rbx, 104(%0) ;"
++-		"movq 56(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ;" /* B[3]^2 */
++-		"adcq %%rax, %%r13 ;"
++-		"movq %%r13, 112(%0) ;"
++-		"adcq %%rcx, %%r14 ;"
++-		"movq %%r14, 120(%0) ;"
++-		:
++-		: "r"(c), "r"(a)
++-		: "memory", "cc", "%rax", "%rbx", "%rcx", "%rdx", "%r8", "%r9",
++-		  "%r10", "%r11", "%r13", "%r14", "%r15");
+++	u64 x = a;
+++	u64 y = b;
+++	u64 x_xor_y = x ^ y;
+++	u64 x_sub_y = x - y;
+++	u64 x_sub_y_xor_y = x_sub_y ^ y;
+++	u64 q = x_xor_y | x_sub_y_xor_y;
+++	u64 x_xor_q = x ^ q;
+++	u64 x_xor_q_ = x_xor_q >> (u32)63U;
+++	return x_xor_q_ - (u64)1U;
++ }
++ 
++-static void sqr2_256x256_integer_bmi2(u64 *const c, const u64 *const a)
+++/* Computes the addition of four-element f1 with value in f2
+++ * and returns the carry (if any) */
+++static inline u64 add_scalar(u64 *out, const u64 *f1, u64 f2)
++ {
++-	asm volatile(
++-		"movq  8(%1), %%rdx        ;" /* A[1]      */
++-		"mulx   (%1),  %%r8,  %%r9 ;" /* A[0]*A[1] */
++-		"mulx 16(%1), %%r10, %%r11 ;" /* A[2]*A[1] */
++-		"mulx 24(%1), %%rcx, %%r14 ;" /* A[3]*A[1] */
++-
++-		"movq 16(%1), %%rdx        ;" /* A[2]      */
++-		"mulx 24(%1), %%r15, %%r13 ;" /* A[3]*A[2] */
++-		"mulx   (%1), %%rax, %%rdx ;" /* A[0]*A[2] */
++-
++-		"addq %%rax,  %%r9 ;"
++-		"adcq %%rdx, %%r10 ;"
++-		"adcq %%rcx, %%r11 ;"
++-		"adcq %%r14, %%r15 ;"
++-		"adcq    $0, %%r13 ;"
++-		"movq    $0, %%r14 ;"
++-		"adcq    $0, %%r14 ;"
++-
++-		"movq   (%1), %%rdx        ;" /* A[0]      */
++-		"mulx 24(%1), %%rax, %%rcx ;" /* A[0]*A[3] */
++-
++-		"addq %%rax, %%r10 ;"
++-		"adcq %%rcx, %%r11 ;"
++-		"adcq    $0, %%r15 ;"
++-		"adcq    $0, %%r13 ;"
++-		"adcq    $0, %%r14 ;"
++-
++-		"shldq $1, %%r13, %%r14 ;"
++-		"shldq $1, %%r15, %%r13 ;"
++-		"shldq $1, %%r11, %%r15 ;"
++-		"shldq $1, %%r10, %%r11 ;"
++-		"shldq $1,  %%r9, %%r10 ;"
++-		"shldq $1,  %%r8,  %%r9 ;"
++-		"shlq  $1,  %%r8        ;"
++-
++-		/*******************/
++-		"mulx %%rdx, %%rax, %%rcx ; " /* A[0]^2 */
++-		/*******************/
++-		"movq %%rax,  0(%0) ;"
++-		"addq %%rcx,  %%r8 ;"
++-		"movq  %%r8,  8(%0) ;"
++-		"movq  8(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ; " /* A[1]^2 */
++-		"adcq %%rax,  %%r9 ;"
++-		"movq  %%r9, 16(%0) ;"
++-		"adcq %%rcx, %%r10 ;"
++-		"movq %%r10, 24(%0) ;"
++-		"movq 16(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ; " /* A[2]^2 */
++-		"adcq %%rax, %%r11 ;"
++-		"movq %%r11, 32(%0) ;"
++-		"adcq %%rcx, %%r15 ;"
++-		"movq %%r15, 40(%0) ;"
++-		"movq 24(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ; " /* A[3]^2 */
++-		"adcq %%rax, %%r13 ;"
++-		"movq %%r13, 48(%0) ;"
++-		"adcq %%rcx, %%r14 ;"
++-		"movq %%r14, 56(%0) ;"
++-
++-		"movq 40(%1), %%rdx        ;" /* B[1]      */
++-		"mulx 32(%1),  %%r8,  %%r9 ;" /* B[0]*B[1] */
++-		"mulx 48(%1), %%r10, %%r11 ;" /* B[2]*B[1] */
++-		"mulx 56(%1), %%rcx, %%r14 ;" /* B[3]*B[1] */
++-
++-		"movq 48(%1), %%rdx        ;" /* B[2]      */
++-		"mulx 56(%1), %%r15, %%r13 ;" /* B[3]*B[2] */
++-		"mulx 32(%1), %%rax, %%rdx ;" /* B[0]*B[2] */
++-
++-		"addq %%rax,  %%r9 ;"
++-		"adcq %%rdx, %%r10 ;"
++-		"adcq %%rcx, %%r11 ;"
++-		"adcq %%r14, %%r15 ;"
++-		"adcq    $0, %%r13 ;"
++-		"movq    $0, %%r14 ;"
++-		"adcq    $0, %%r14 ;"
++-
++-		"movq 32(%1), %%rdx        ;" /* B[0]      */
++-		"mulx 56(%1), %%rax, %%rcx ;" /* B[0]*B[3] */
++-
++-		"addq %%rax, %%r10 ;"
++-		"adcq %%rcx, %%r11 ;"
++-		"adcq    $0, %%r15 ;"
++-		"adcq    $0, %%r13 ;"
++-		"adcq    $0, %%r14 ;"
++-
++-		"shldq $1, %%r13, %%r14 ;"
++-		"shldq $1, %%r15, %%r13 ;"
++-		"shldq $1, %%r11, %%r15 ;"
++-		"shldq $1, %%r10, %%r11 ;"
++-		"shldq $1,  %%r9, %%r10 ;"
++-		"shldq $1,  %%r8,  %%r9 ;"
++-		"shlq  $1,  %%r8        ;"
++-
++-		/*******************/
++-		"mulx %%rdx, %%rax, %%rcx ; " /* B[0]^2 */
++-		/*******************/
++-		"movq %%rax,  64(%0) ;"
++-		"addq %%rcx,  %%r8 ;"
++-		"movq  %%r8,  72(%0) ;"
++-		"movq 40(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ; " /* B[1]^2 */
++-		"adcq %%rax,  %%r9 ;"
++-		"movq  %%r9,  80(%0) ;"
++-		"adcq %%rcx, %%r10 ;"
++-		"movq %%r10,  88(%0) ;"
++-		"movq 48(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ; " /* B[2]^2 */
++-		"adcq %%rax, %%r11 ;"
++-		"movq %%r11,  96(%0) ;"
++-		"adcq %%rcx, %%r15 ;"
++-		"movq %%r15, 104(%0) ;"
++-		"movq 56(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ; " /* B[3]^2 */
++-		"adcq %%rax, %%r13 ;"
++-		"movq %%r13, 112(%0) ;"
++-		"adcq %%rcx, %%r14 ;"
++-		"movq %%r14, 120(%0) ;"
++-		:
++-		: "r"(c), "r"(a)
++-		: "memory", "cc", "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10",
++-		  "%r11", "%r13", "%r14", "%r15");
++-}
+++	u64 carry_r;
++ 
++-static void red_eltfp25519_2w_adx(u64 *const c, const u64 *const a)
++-{
++ 	asm volatile(
++-		"movl    $38, %%edx; "	/* 2*c = 38 = 2^256 */
++-		"mulx 32(%1),  %%r8, %%r10; " /* c*C[4] */
++-		"xorl %%ebx, %%ebx ;"
++-		"adox   (%1),  %%r8 ;"
++-		"mulx 40(%1),  %%r9, %%r11; " /* c*C[5] */
++-		"adcx %%r10,  %%r9 ;"
++-		"adox  8(%1),  %%r9 ;"
++-		"mulx 48(%1), %%r10, %%rax; " /* c*C[6] */
++-		"adcx %%r11, %%r10 ;"
++-		"adox 16(%1), %%r10 ;"
++-		"mulx 56(%1), %%r11, %%rcx; " /* c*C[7] */
++-		"adcx %%rax, %%r11 ;"
++-		"adox 24(%1), %%r11 ;"
++-		/***************************************/
++-		"adcx %%rbx, %%rcx ;"
++-		"adox  %%rbx, %%rcx ;"
++-		"imul %%rdx, %%rcx ;" /* c*C[4], cf=0, of=0 */
++-		"adcx %%rcx,  %%r8 ;"
++-		"adcx %%rbx,  %%r9 ;"
++-		"movq  %%r9,  8(%0) ;"
++-		"adcx %%rbx, %%r10 ;"
++-		"movq %%r10, 16(%0) ;"
++-		"adcx %%rbx, %%r11 ;"
++-		"movq %%r11, 24(%0) ;"
++-		"mov     $0, %%ecx ;"
++-		"cmovc %%edx, %%ecx ;"
++-		"addq %%rcx,  %%r8 ;"
++-		"movq  %%r8,   (%0) ;"
++-
++-		"mulx  96(%1),  %%r8, %%r10; " /* c*C[4] */
++-		"xorl %%ebx, %%ebx ;"
++-		"adox 64(%1),  %%r8 ;"
++-		"mulx 104(%1),  %%r9, %%r11; " /* c*C[5] */
++-		"adcx %%r10,  %%r9 ;"
++-		"adox 72(%1),  %%r9 ;"
++-		"mulx 112(%1), %%r10, %%rax; " /* c*C[6] */
++-		"adcx %%r11, %%r10 ;"
++-		"adox 80(%1), %%r10 ;"
++-		"mulx 120(%1), %%r11, %%rcx; " /* c*C[7] */
++-		"adcx %%rax, %%r11 ;"
++-		"adox 88(%1), %%r11 ;"
++-		/****************************************/
++-		"adcx %%rbx, %%rcx ;"
++-		"adox  %%rbx, %%rcx ;"
++-		"imul %%rdx, %%rcx ;" /* c*C[4], cf=0, of=0 */
++-		"adcx %%rcx,  %%r8 ;"
++-		"adcx %%rbx,  %%r9 ;"
++-		"movq  %%r9, 40(%0) ;"
++-		"adcx %%rbx, %%r10 ;"
++-		"movq %%r10, 48(%0) ;"
++-		"adcx %%rbx, %%r11 ;"
++-		"movq %%r11, 56(%0) ;"
++-		"mov     $0, %%ecx ;"
++-		"cmovc %%edx, %%ecx ;"
++-		"addq %%rcx,  %%r8 ;"
++-		"movq  %%r8, 32(%0) ;"
++-		:
++-		: "r"(c), "r"(a)
++-		: "memory", "cc", "%rax", "%rbx", "%rcx", "%rdx", "%r8", "%r9",
++-		  "%r10", "%r11");
++-}
+++		/* Clear registers to propagate the carry bit */
+++		"  xor %%r8, %%r8;"
+++		"  xor %%r9, %%r9;"
+++		"  xor %%r10, %%r10;"
+++		"  xor %%r11, %%r11;"
+++		"  xor %1, %1;"
+++
+++		/* Begin addition chain */
+++		"  addq 0(%3), %0;"
+++		"  movq %0, 0(%2);"
+++		"  adcxq 8(%3), %%r8;"
+++		"  movq %%r8, 8(%2);"
+++		"  adcxq 16(%3), %%r9;"
+++		"  movq %%r9, 16(%2);"
+++		"  adcxq 24(%3), %%r10;"
+++		"  movq %%r10, 24(%2);"
+++
+++		/* Return the carry bit in a register */
+++		"  adcx %%r11, %1;"
+++	: "+&r" (f2), "=&r" (carry_r)
+++	: "r" (out), "r" (f1)
+++	: "%r8", "%r9", "%r10", "%r11", "memory", "cc"
+++	);
++ 
++-static void red_eltfp25519_2w_bmi2(u64 *const c, const u64 *const a)
++-{
++-	asm volatile(
++-		"movl    $38, %%edx ; "       /* 2*c = 38 = 2^256 */
++-		"mulx 32(%1),  %%r8, %%r10 ;" /* c*C[4] */
++-		"mulx 40(%1),  %%r9, %%r11 ;" /* c*C[5] */
++-		"addq %%r10,  %%r9 ;"
++-		"mulx 48(%1), %%r10, %%rax ;" /* c*C[6] */
++-		"adcq %%r11, %%r10 ;"
++-		"mulx 56(%1), %%r11, %%rcx ;" /* c*C[7] */
++-		"adcq %%rax, %%r11 ;"
++-		/***************************************/
++-		"adcq    $0, %%rcx ;"
++-		"addq   (%1),  %%r8 ;"
++-		"adcq  8(%1),  %%r9 ;"
++-		"adcq 16(%1), %%r10 ;"
++-		"adcq 24(%1), %%r11 ;"
++-		"adcq     $0, %%rcx ;"
++-		"imul %%rdx, %%rcx ;" /* c*C[4], cf=0 */
++-		"addq %%rcx,  %%r8 ;"
++-		"adcq    $0,  %%r9 ;"
++-		"movq  %%r9,  8(%0) ;"
++-		"adcq    $0, %%r10 ;"
++-		"movq %%r10, 16(%0) ;"
++-		"adcq    $0, %%r11 ;"
++-		"movq %%r11, 24(%0) ;"
++-		"mov     $0, %%ecx ;"
++-		"cmovc %%edx, %%ecx ;"
++-		"addq %%rcx,  %%r8 ;"
++-		"movq  %%r8,   (%0) ;"
++-
++-		"mulx  96(%1),  %%r8, %%r10 ;" /* c*C[4] */
++-		"mulx 104(%1),  %%r9, %%r11 ;" /* c*C[5] */
++-		"addq %%r10,  %%r9 ;"
++-		"mulx 112(%1), %%r10, %%rax ;" /* c*C[6] */
++-		"adcq %%r11, %%r10 ;"
++-		"mulx 120(%1), %%r11, %%rcx ;" /* c*C[7] */
++-		"adcq %%rax, %%r11 ;"
++-		/****************************************/
++-		"adcq    $0, %%rcx ;"
++-		"addq 64(%1),  %%r8 ;"
++-		"adcq 72(%1),  %%r9 ;"
++-		"adcq 80(%1), %%r10 ;"
++-		"adcq 88(%1), %%r11 ;"
++-		"adcq     $0, %%rcx ;"
++-		"imul %%rdx, %%rcx ;" /* c*C[4], cf=0 */
++-		"addq %%rcx,  %%r8 ;"
++-		"adcq    $0,  %%r9 ;"
++-		"movq  %%r9, 40(%0) ;"
++-		"adcq    $0, %%r10 ;"
++-		"movq %%r10, 48(%0) ;"
++-		"adcq    $0, %%r11 ;"
++-		"movq %%r11, 56(%0) ;"
++-		"mov     $0, %%ecx ;"
++-		"cmovc %%edx, %%ecx ;"
++-		"addq %%rcx,  %%r8 ;"
++-		"movq  %%r8, 32(%0) ;"
++-		:
++-		: "r"(c), "r"(a)
++-		: "memory", "cc", "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10",
++-		  "%r11");
+++	return carry_r;
++ }
++ 
++-static void mul_256x256_integer_adx(u64 *const c, const u64 *const a,
++-				    const u64 *const b)
+++/* Computes the field addition of two field elements */
+++static inline void fadd(u64 *out, const u64 *f1, const u64 *f2)
++ {
++ 	asm volatile(
++-		"movq   (%1), %%rdx; "	/* A[0] */
++-		"mulx   (%2),  %%r8,  %%r9; " /* A[0]*B[0] */
++-		"xorl %%r10d, %%r10d ;"
++-		"movq  %%r8,  (%0) ;"
++-		"mulx  8(%2), %%r10, %%r11; " /* A[0]*B[1] */
++-		"adox  %%r9, %%r10 ;"
++-		"movq %%r10, 8(%0) ;"
++-		"mulx 16(%2), %%r15, %%r13; " /* A[0]*B[2] */
++-		"adox %%r11, %%r15 ;"
++-		"mulx 24(%2), %%r14, %%rdx; " /* A[0]*B[3] */
++-		"adox %%r13, %%r14 ;"
++-		"movq $0, %%rax ;"
++-		/******************************************/
++-		"adox %%rdx, %%rax ;"
++-
++-		"movq  8(%1), %%rdx; "	/* A[1] */
++-		"mulx   (%2),  %%r8,  %%r9; " /* A[1]*B[0] */
++-		"xorl %%r10d, %%r10d ;"
++-		"adcx 8(%0),  %%r8 ;"
++-		"movq  %%r8,  8(%0) ;"
++-		"mulx  8(%2), %%r10, %%r11; " /* A[1]*B[1] */
++-		"adox  %%r9, %%r10 ;"
++-		"adcx %%r15, %%r10 ;"
++-		"movq %%r10, 16(%0) ;"
++-		"mulx 16(%2), %%r15, %%r13; " /* A[1]*B[2] */
++-		"adox %%r11, %%r15 ;"
++-		"adcx %%r14, %%r15 ;"
++-		"movq $0, %%r8  ;"
++-		"mulx 24(%2), %%r14, %%rdx; " /* A[1]*B[3] */
++-		"adox %%r13, %%r14 ;"
++-		"adcx %%rax, %%r14 ;"
++-		"movq $0, %%rax ;"
++-		/******************************************/
++-		"adox %%rdx, %%rax ;"
++-		"adcx  %%r8, %%rax ;"
++-
++-		"movq 16(%1), %%rdx; "	/* A[2] */
++-		"mulx   (%2),  %%r8,  %%r9; " /* A[2]*B[0] */
++-		"xorl %%r10d, %%r10d ;"
++-		"adcx 16(%0), %%r8 ;"
++-		"movq  %%r8, 16(%0) ;"
++-		"mulx  8(%2), %%r10, %%r11; " /* A[2]*B[1] */
++-		"adox  %%r9, %%r10 ;"
++-		"adcx %%r15, %%r10 ;"
++-		"movq %%r10, 24(%0) ;"
++-		"mulx 16(%2), %%r15, %%r13; " /* A[2]*B[2] */
++-		"adox %%r11, %%r15 ;"
++-		"adcx %%r14, %%r15 ;"
++-		"movq $0, %%r8  ;"
++-		"mulx 24(%2), %%r14, %%rdx; " /* A[2]*B[3] */
++-		"adox %%r13, %%r14 ;"
++-		"adcx %%rax, %%r14 ;"
++-		"movq $0, %%rax ;"
++-		/******************************************/
++-		"adox %%rdx, %%rax ;"
++-		"adcx  %%r8, %%rax ;"
++-
++-		"movq 24(%1), %%rdx; "	/* A[3] */
++-		"mulx   (%2),  %%r8,  %%r9; " /* A[3]*B[0] */
++-		"xorl %%r10d, %%r10d ;"
++-		"adcx 24(%0), %%r8 ;"
++-		"movq  %%r8, 24(%0) ;"
++-		"mulx  8(%2), %%r10, %%r11; " /* A[3]*B[1] */
++-		"adox  %%r9, %%r10 ;"
++-		"adcx %%r15, %%r10 ;"
++-		"movq %%r10, 32(%0) ;"
++-		"mulx 16(%2), %%r15, %%r13; " /* A[3]*B[2] */
++-		"adox %%r11, %%r15 ;"
++-		"adcx %%r14, %%r15 ;"
++-		"movq %%r15, 40(%0) ;"
++-		"movq $0, %%r8  ;"
++-		"mulx 24(%2), %%r14, %%rdx; " /* A[3]*B[3] */
++-		"adox %%r13, %%r14 ;"
++-		"adcx %%rax, %%r14 ;"
++-		"movq %%r14, 48(%0) ;"
++-		"movq $0, %%rax ;"
++-		/******************************************/
++-		"adox %%rdx, %%rax ;"
++-		"adcx  %%r8, %%rax ;"
++-		"movq %%rax, 56(%0) ;"
++-		:
++-		: "r"(c), "r"(a), "r"(b)
++-		: "memory", "cc", "%rax", "%rdx", "%r8", "%r9", "%r10", "%r11",
++-		  "%r13", "%r14", "%r15");
+++		/* Compute the raw addition of f1 + f2 */
+++		"  movq 0(%0), %%r8;"
+++		"  addq 0(%2), %%r8;"
+++		"  movq 8(%0), %%r9;"
+++		"  adcxq 8(%2), %%r9;"
+++		"  movq 16(%0), %%r10;"
+++		"  adcxq 16(%2), %%r10;"
+++		"  movq 24(%0), %%r11;"
+++		"  adcxq 24(%2), %%r11;"
+++
+++		/* Wrap the result back into the field */
+++
+++		/* Step 1: Compute carry*38 */
+++		"  mov $0, %%rax;"
+++		"  mov $38, %0;"
+++		"  cmovc %0, %%rax;"
+++
+++		/* Step 2: Add carry*38 to the original sum */
+++		"  xor %%rcx, %%rcx;"
+++		"  add %%rax, %%r8;"
+++		"  adcx %%rcx, %%r9;"
+++		"  movq %%r9, 8(%1);"
+++		"  adcx %%rcx, %%r10;"
+++		"  movq %%r10, 16(%1);"
+++		"  adcx %%rcx, %%r11;"
+++		"  movq %%r11, 24(%1);"
+++
+++		/* Step 3: Fold the carry bit back in; guaranteed not to carry at this point */
+++		"  mov $0, %%rax;"
+++		"  cmovc %0, %%rax;"
+++		"  add %%rax, %%r8;"
+++		"  movq %%r8, 0(%1);"
+++	: "+&r" (f2)
+++	: "r" (out), "r" (f1)
+++	: "%rax", "%rcx", "%r8", "%r9", "%r10", "%r11", "memory", "cc"
+++	);
++ }
++ 
++-static void mul_256x256_integer_bmi2(u64 *const c, const u64 *const a,
++-				     const u64 *const b)
+++/* Computes the field substraction of two field elements */
+++static inline void fsub(u64 *out, const u64 *f1, const u64 *f2)
++ {
++ 	asm volatile(
++-		"movq   (%1), %%rdx; "	/* A[0] */
++-		"mulx   (%2),  %%r8, %%r15; " /* A[0]*B[0] */
++-		"movq %%r8,  (%0) ;"
++-		"mulx  8(%2), %%r10, %%rax; " /* A[0]*B[1] */
++-		"addq %%r10, %%r15 ;"
++-		"mulx 16(%2),  %%r8, %%rbx; " /* A[0]*B[2] */
++-		"adcq  %%r8, %%rax ;"
++-		"mulx 24(%2), %%r10, %%rcx; " /* A[0]*B[3] */
++-		"adcq %%r10, %%rbx ;"
++-		/******************************************/
++-		"adcq    $0, %%rcx ;"
++-
++-		"movq  8(%1), %%rdx; "	/* A[1] */
++-		"mulx   (%2),  %%r8,  %%r9; " /* A[1]*B[0] */
++-		"addq %%r15,  %%r8 ;"
++-		"movq %%r8, 8(%0) ;"
++-		"mulx  8(%2), %%r10, %%r11; " /* A[1]*B[1] */
++-		"adcq %%r10,  %%r9 ;"
++-		"mulx 16(%2),  %%r8, %%r13; " /* A[1]*B[2] */
++-		"adcq  %%r8, %%r11 ;"
++-		"mulx 24(%2), %%r10, %%r15; " /* A[1]*B[3] */
++-		"adcq %%r10, %%r13 ;"
++-		/******************************************/
++-		"adcq    $0, %%r15 ;"
++-
++-		"addq  %%r9, %%rax ;"
++-		"adcq %%r11, %%rbx ;"
++-		"adcq %%r13, %%rcx ;"
++-		"adcq    $0, %%r15 ;"
++-
++-		"movq 16(%1), %%rdx; "	/* A[2] */
++-		"mulx   (%2),  %%r8,  %%r9; " /* A[2]*B[0] */
++-		"addq %%rax,  %%r8 ;"
++-		"movq %%r8, 16(%0) ;"
++-		"mulx  8(%2), %%r10, %%r11; " /* A[2]*B[1] */
++-		"adcq %%r10,  %%r9 ;"
++-		"mulx 16(%2),  %%r8, %%r13; " /* A[2]*B[2] */
++-		"adcq  %%r8, %%r11 ;"
++-		"mulx 24(%2), %%r10, %%rax; " /* A[2]*B[3] */
++-		"adcq %%r10, %%r13 ;"
++-		/******************************************/
++-		"adcq    $0, %%rax ;"
++-
++-		"addq  %%r9, %%rbx ;"
++-		"adcq %%r11, %%rcx ;"
++-		"adcq %%r13, %%r15 ;"
++-		"adcq    $0, %%rax ;"
++-
++-		"movq 24(%1), %%rdx; "	/* A[3] */
++-		"mulx   (%2),  %%r8,  %%r9; " /* A[3]*B[0] */
++-		"addq %%rbx,  %%r8 ;"
++-		"movq %%r8, 24(%0) ;"
++-		"mulx  8(%2), %%r10, %%r11; " /* A[3]*B[1] */
++-		"adcq %%r10,  %%r9 ;"
++-		"mulx 16(%2),  %%r8, %%r13; " /* A[3]*B[2] */
++-		"adcq  %%r8, %%r11 ;"
++-		"mulx 24(%2), %%r10, %%rbx; " /* A[3]*B[3] */
++-		"adcq %%r10, %%r13 ;"
++-		/******************************************/
++-		"adcq    $0, %%rbx ;"
++-
++-		"addq  %%r9, %%rcx ;"
++-		"movq %%rcx, 32(%0) ;"
++-		"adcq %%r11, %%r15 ;"
++-		"movq %%r15, 40(%0) ;"
++-		"adcq %%r13, %%rax ;"
++-		"movq %%rax, 48(%0) ;"
++-		"adcq    $0, %%rbx ;"
++-		"movq %%rbx, 56(%0) ;"
++-		:
++-		: "r"(c), "r"(a), "r"(b)
++-		: "memory", "cc", "%rax", "%rbx", "%rcx", "%rdx", "%r8", "%r9",
++-		  "%r10", "%r11", "%r13", "%r15");
+++		/* Compute the raw substraction of f1-f2 */
+++		"  movq 0(%1), %%r8;"
+++		"  subq 0(%2), %%r8;"
+++		"  movq 8(%1), %%r9;"
+++		"  sbbq 8(%2), %%r9;"
+++		"  movq 16(%1), %%r10;"
+++		"  sbbq 16(%2), %%r10;"
+++		"  movq 24(%1), %%r11;"
+++		"  sbbq 24(%2), %%r11;"
+++
+++		/* Wrap the result back into the field */
+++
+++		/* Step 1: Compute carry*38 */
+++		"  mov $0, %%rax;"
+++		"  mov $38, %%rcx;"
+++		"  cmovc %%rcx, %%rax;"
+++
+++		/* Step 2: Substract carry*38 from the original difference */
+++		"  sub %%rax, %%r8;"
+++		"  sbb $0, %%r9;"
+++		"  sbb $0, %%r10;"
+++		"  sbb $0, %%r11;"
+++
+++		/* Step 3: Fold the carry bit back in; guaranteed not to carry at this point */
+++		"  mov $0, %%rax;"
+++		"  cmovc %%rcx, %%rax;"
+++		"  sub %%rax, %%r8;"
+++
+++		/* Store the result */
+++		"  movq %%r8, 0(%0);"
+++		"  movq %%r9, 8(%0);"
+++		"  movq %%r10, 16(%0);"
+++		"  movq %%r11, 24(%0);"
+++	:
+++	: "r" (out), "r" (f1), "r" (f2)
+++	: "%rax", "%rcx", "%r8", "%r9", "%r10", "%r11", "memory", "cc"
+++	);
++ }
++ 
++-static void sqr_256x256_integer_adx(u64 *const c, const u64 *const a)
+++/* Computes a field multiplication: out <- f1 * f2
+++ * Uses the 8-element buffer tmp for intermediate results */
+++static inline void fmul(u64 *out, const u64 *f1, const u64 *f2, u64 *tmp)
++ {
++ 	asm volatile(
++-		"movq   (%1), %%rdx        ;" /* A[0]      */
++-		"mulx  8(%1),  %%r8, %%r14 ;" /* A[1]*A[0] */
++-		"xorl %%r15d, %%r15d;"
++-		"mulx 16(%1),  %%r9, %%r10 ;" /* A[2]*A[0] */
++-		"adcx %%r14,  %%r9 ;"
++-		"mulx 24(%1), %%rax, %%rcx ;" /* A[3]*A[0] */
++-		"adcx %%rax, %%r10 ;"
++-		"movq 24(%1), %%rdx        ;" /* A[3]      */
++-		"mulx  8(%1), %%r11, %%rbx ;" /* A[1]*A[3] */
++-		"adcx %%rcx, %%r11 ;"
++-		"mulx 16(%1), %%rax, %%r13 ;" /* A[2]*A[3] */
++-		"adcx %%rax, %%rbx ;"
++-		"movq  8(%1), %%rdx        ;" /* A[1]      */
++-		"adcx %%r15, %%r13 ;"
++-		"mulx 16(%1), %%rax, %%rcx ;" /* A[2]*A[1] */
++-		"movq    $0, %%r14 ;"
++-		/******************************************/
++-		"adcx %%r15, %%r14 ;"
++-
++-		"xorl %%r15d, %%r15d;"
++-		"adox %%rax, %%r10 ;"
++-		"adcx  %%r8,  %%r8 ;"
++-		"adox %%rcx, %%r11 ;"
++-		"adcx  %%r9,  %%r9 ;"
++-		"adox %%r15, %%rbx ;"
++-		"adcx %%r10, %%r10 ;"
++-		"adox %%r15, %%r13 ;"
++-		"adcx %%r11, %%r11 ;"
++-		"adox %%r15, %%r14 ;"
++-		"adcx %%rbx, %%rbx ;"
++-		"adcx %%r13, %%r13 ;"
++-		"adcx %%r14, %%r14 ;"
++-
++-		"movq   (%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ;" /* A[0]^2 */
++-		/*******************/
++-		"movq %%rax,  0(%0) ;"
++-		"addq %%rcx,  %%r8 ;"
++-		"movq  %%r8,  8(%0) ;"
++-		"movq  8(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ;" /* A[1]^2 */
++-		"adcq %%rax,  %%r9 ;"
++-		"movq  %%r9, 16(%0) ;"
++-		"adcq %%rcx, %%r10 ;"
++-		"movq %%r10, 24(%0) ;"
++-		"movq 16(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ;" /* A[2]^2 */
++-		"adcq %%rax, %%r11 ;"
++-		"movq %%r11, 32(%0) ;"
++-		"adcq %%rcx, %%rbx ;"
++-		"movq %%rbx, 40(%0) ;"
++-		"movq 24(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ;" /* A[3]^2 */
++-		"adcq %%rax, %%r13 ;"
++-		"movq %%r13, 48(%0) ;"
++-		"adcq %%rcx, %%r14 ;"
++-		"movq %%r14, 56(%0) ;"
++-		:
++-		: "r"(c), "r"(a)
++-		: "memory", "cc", "%rax", "%rbx", "%rcx", "%rdx", "%r8", "%r9",
++-		  "%r10", "%r11", "%r13", "%r14", "%r15");
++-}
+++		/* Compute the raw multiplication: tmp <- src1 * src2 */
++ 
++-static void sqr_256x256_integer_bmi2(u64 *const c, const u64 *const a)
++-{
++-	asm volatile(
++-		"movq  8(%1), %%rdx        ;" /* A[1]      */
++-		"mulx   (%1),  %%r8,  %%r9 ;" /* A[0]*A[1] */
++-		"mulx 16(%1), %%r10, %%r11 ;" /* A[2]*A[1] */
++-		"mulx 24(%1), %%rcx, %%r14 ;" /* A[3]*A[1] */
++-
++-		"movq 16(%1), %%rdx        ;" /* A[2]      */
++-		"mulx 24(%1), %%r15, %%r13 ;" /* A[3]*A[2] */
++-		"mulx   (%1), %%rax, %%rdx ;" /* A[0]*A[2] */
++-
++-		"addq %%rax,  %%r9 ;"
++-		"adcq %%rdx, %%r10 ;"
++-		"adcq %%rcx, %%r11 ;"
++-		"adcq %%r14, %%r15 ;"
++-		"adcq    $0, %%r13 ;"
++-		"movq    $0, %%r14 ;"
++-		"adcq    $0, %%r14 ;"
++-
++-		"movq   (%1), %%rdx        ;" /* A[0]      */
++-		"mulx 24(%1), %%rax, %%rcx ;" /* A[0]*A[3] */
++-
++-		"addq %%rax, %%r10 ;"
++-		"adcq %%rcx, %%r11 ;"
++-		"adcq    $0, %%r15 ;"
++-		"adcq    $0, %%r13 ;"
++-		"adcq    $0, %%r14 ;"
++-
++-		"shldq $1, %%r13, %%r14 ;"
++-		"shldq $1, %%r15, %%r13 ;"
++-		"shldq $1, %%r11, %%r15 ;"
++-		"shldq $1, %%r10, %%r11 ;"
++-		"shldq $1,  %%r9, %%r10 ;"
++-		"shldq $1,  %%r8,  %%r9 ;"
++-		"shlq  $1,  %%r8        ;"
++-
++-		/*******************/
++-		"mulx %%rdx, %%rax, %%rcx ;" /* A[0]^2 */
++-		/*******************/
++-		"movq %%rax,  0(%0) ;"
++-		"addq %%rcx,  %%r8 ;"
++-		"movq  %%r8,  8(%0) ;"
++-		"movq  8(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ;" /* A[1]^2 */
++-		"adcq %%rax,  %%r9 ;"
++-		"movq  %%r9, 16(%0) ;"
++-		"adcq %%rcx, %%r10 ;"
++-		"movq %%r10, 24(%0) ;"
++-		"movq 16(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ;" /* A[2]^2 */
++-		"adcq %%rax, %%r11 ;"
++-		"movq %%r11, 32(%0) ;"
++-		"adcq %%rcx, %%r15 ;"
++-		"movq %%r15, 40(%0) ;"
++-		"movq 24(%1), %%rdx ;"
++-		"mulx %%rdx, %%rax, %%rcx ;" /* A[3]^2 */
++-		"adcq %%rax, %%r13 ;"
++-		"movq %%r13, 48(%0) ;"
++-		"adcq %%rcx, %%r14 ;"
++-		"movq %%r14, 56(%0) ;"
++-		:
++-		: "r"(c), "r"(a)
++-		: "memory", "cc", "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10",
++-		  "%r11", "%r13", "%r14", "%r15");
+++		/* Compute src1[0] * src2 */
+++		"  movq 0(%1), %%rdx;"
+++		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  movq %%r8, 0(%0);"
+++		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  movq %%r10, 8(%0);"
+++		"  mulxq 16(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"
+++		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  mov $0, %%rax;"
+++		                                   "  adox %%rdx, %%rax;"
+++		/* Compute src1[1] * src2 */
+++		"  movq 8(%1), %%rdx;"
+++		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  adcxq 8(%0), %%r8;"    "  movq %%r8, 8(%0);"
+++		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 16(%0);"
+++		"  mulxq 16(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  mov $0, %%r8;"
+++		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
+++		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
+++		/* Compute src1[2] * src2 */
+++		"  movq 16(%1), %%rdx;"
+++		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 16(%0), %%r8;"    "  movq %%r8, 16(%0);"
+++		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 24(%0);"
+++		"  mulxq 16(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  mov $0, %%r8;"
+++		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
+++		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
+++		/* Compute src1[3] * src2 */
+++		"  movq 24(%1), %%rdx;"
+++		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 24(%0), %%r8;"    "  movq %%r8, 24(%0);"
+++		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 32(%0);"
+++		"  mulxq 16(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  movq %%r12, 40(%0);"    "  mov $0, %%r8;"
+++		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  movq %%r14, 48(%0);"    "  mov $0, %%rax;"
+++		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"     "  movq %%rax, 56(%0);"
+++		/* Line up pointers */
+++		"  mov %0, %1;"
+++		"  mov %2, %0;"
+++
+++		/* Wrap the result back into the field */
+++
+++		/* Step 1: Compute dst + carry == tmp_hi * 38 + tmp_lo */
+++		"  mov $38, %%rdx;"
+++		"  mulxq 32(%1), %%r8, %%r13;"
+++		"  xor %3, %3;"
+++		"  adoxq 0(%1), %%r8;"
+++		"  mulxq 40(%1), %%r9, %%r12;"
+++		"  adcx %%r13, %%r9;"
+++		"  adoxq 8(%1), %%r9;"
+++		"  mulxq 48(%1), %%r10, %%r13;"
+++		"  adcx %%r12, %%r10;"
+++		"  adoxq 16(%1), %%r10;"
+++		"  mulxq 56(%1), %%r11, %%rax;"
+++		"  adcx %%r13, %%r11;"
+++		"  adoxq 24(%1), %%r11;"
+++		"  adcx %3, %%rax;"
+++		"  adox %3, %%rax;"
+++		"  imul %%rdx, %%rax;"
+++
+++		/* Step 2: Fold the carry back into dst */
+++		"  add %%rax, %%r8;"
+++		"  adcx %3, %%r9;"
+++		"  movq %%r9, 8(%0);"
+++		"  adcx %3, %%r10;"
+++		"  movq %%r10, 16(%0);"
+++		"  adcx %3, %%r11;"
+++		"  movq %%r11, 24(%0);"
+++
+++		/* Step 3: Fold the carry bit back in; guaranteed not to carry at this point */
+++		"  mov $0, %%rax;"
+++		"  cmovc %%rdx, %%rax;"
+++		"  add %%rax, %%r8;"
+++		"  movq %%r8, 0(%0);"
+++	: "+&r" (tmp), "+&r" (f1), "+&r" (out), "+&r" (f2)
+++	:
+++	: "%rax", "%rdx", "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "memory", "cc"
+++	);
++ }
++ 
++-static void red_eltfp25519_1w_adx(u64 *const c, const u64 *const a)
+++/* Computes two field multiplications:
+++ * out[0] <- f1[0] * f2[0]
+++ * out[1] <- f1[1] * f2[1]
+++ * Uses the 16-element buffer tmp for intermediate results. */
+++static inline void fmul2(u64 *out, const u64 *f1, const u64 *f2, u64 *tmp)
++ {
++ 	asm volatile(
++-		"movl    $38, %%edx ;"	/* 2*c = 38 = 2^256 */
++-		"mulx 32(%1),  %%r8, %%r10 ;" /* c*C[4] */
++-		"xorl %%ebx, %%ebx ;"
++-		"adox   (%1),  %%r8 ;"
++-		"mulx 40(%1),  %%r9, %%r11 ;" /* c*C[5] */
++-		"adcx %%r10,  %%r9 ;"
++-		"adox  8(%1),  %%r9 ;"
++-		"mulx 48(%1), %%r10, %%rax ;" /* c*C[6] */
++-		"adcx %%r11, %%r10 ;"
++-		"adox 16(%1), %%r10 ;"
++-		"mulx 56(%1), %%r11, %%rcx ;" /* c*C[7] */
++-		"adcx %%rax, %%r11 ;"
++-		"adox 24(%1), %%r11 ;"
++-		/***************************************/
++-		"adcx %%rbx, %%rcx ;"
++-		"adox  %%rbx, %%rcx ;"
++-		"imul %%rdx, %%rcx ;" /* c*C[4], cf=0, of=0 */
++-		"adcx %%rcx,  %%r8 ;"
++-		"adcx %%rbx,  %%r9 ;"
++-		"movq  %%r9,  8(%0) ;"
++-		"adcx %%rbx, %%r10 ;"
++-		"movq %%r10, 16(%0) ;"
++-		"adcx %%rbx, %%r11 ;"
++-		"movq %%r11, 24(%0) ;"
++-		"mov     $0, %%ecx ;"
++-		"cmovc %%edx, %%ecx ;"
++-		"addq %%rcx,  %%r8 ;"
++-		"movq  %%r8,   (%0) ;"
++-		:
++-		: "r"(c), "r"(a)
++-		: "memory", "cc", "%rax", "%rbx", "%rcx", "%rdx", "%r8", "%r9",
++-		  "%r10", "%r11");
++-}
+++		/* Compute the raw multiplication tmp[0] <- f1[0] * f2[0] */
++ 
++-static void red_eltfp25519_1w_bmi2(u64 *const c, const u64 *const a)
++-{
++-	asm volatile(
++-		"movl    $38, %%edx ;"	/* 2*c = 38 = 2^256 */
++-		"mulx 32(%1),  %%r8, %%r10 ;" /* c*C[4] */
++-		"mulx 40(%1),  %%r9, %%r11 ;" /* c*C[5] */
++-		"addq %%r10,  %%r9 ;"
++-		"mulx 48(%1), %%r10, %%rax ;" /* c*C[6] */
++-		"adcq %%r11, %%r10 ;"
++-		"mulx 56(%1), %%r11, %%rcx ;" /* c*C[7] */
++-		"adcq %%rax, %%r11 ;"
++-		/***************************************/
++-		"adcq    $0, %%rcx ;"
++-		"addq   (%1),  %%r8 ;"
++-		"adcq  8(%1),  %%r9 ;"
++-		"adcq 16(%1), %%r10 ;"
++-		"adcq 24(%1), %%r11 ;"
++-		"adcq     $0, %%rcx ;"
++-		"imul %%rdx, %%rcx ;" /* c*C[4], cf=0 */
++-		"addq %%rcx,  %%r8 ;"
++-		"adcq    $0,  %%r9 ;"
++-		"movq  %%r9,  8(%0) ;"
++-		"adcq    $0, %%r10 ;"
++-		"movq %%r10, 16(%0) ;"
++-		"adcq    $0, %%r11 ;"
++-		"movq %%r11, 24(%0) ;"
++-		"mov     $0, %%ecx ;"
++-		"cmovc %%edx, %%ecx ;"
++-		"addq %%rcx,  %%r8 ;"
++-		"movq  %%r8,   (%0) ;"
++-		:
++-		: "r"(c), "r"(a)
++-		: "memory", "cc", "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10",
++-		  "%r11");
+++		/* Compute src1[0] * src2 */
+++		"  movq 0(%1), %%rdx;"
+++		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  movq %%r8, 0(%0);"
+++		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  movq %%r10, 8(%0);"
+++		"  mulxq 16(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"
+++		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  mov $0, %%rax;"
+++		                                   "  adox %%rdx, %%rax;"
+++		/* Compute src1[1] * src2 */
+++		"  movq 8(%1), %%rdx;"
+++		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  adcxq 8(%0), %%r8;"    "  movq %%r8, 8(%0);"
+++		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 16(%0);"
+++		"  mulxq 16(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  mov $0, %%r8;"
+++		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
+++		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
+++		/* Compute src1[2] * src2 */
+++		"  movq 16(%1), %%rdx;"
+++		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 16(%0), %%r8;"    "  movq %%r8, 16(%0);"
+++		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 24(%0);"
+++		"  mulxq 16(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  mov $0, %%r8;"
+++		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
+++		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
+++		/* Compute src1[3] * src2 */
+++		"  movq 24(%1), %%rdx;"
+++		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 24(%0), %%r8;"    "  movq %%r8, 24(%0);"
+++		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 32(%0);"
+++		"  mulxq 16(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  movq %%r12, 40(%0);"    "  mov $0, %%r8;"
+++		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  movq %%r14, 48(%0);"    "  mov $0, %%rax;"
+++		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"     "  movq %%rax, 56(%0);"
+++
+++		/* Compute the raw multiplication tmp[1] <- f1[1] * f2[1] */
+++
+++		/* Compute src1[0] * src2 */
+++		"  movq 32(%1), %%rdx;"
+++		"  mulxq 32(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  movq %%r8, 64(%0);"
+++		"  mulxq 40(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  movq %%r10, 72(%0);"
+++		"  mulxq 48(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"
+++		"  mulxq 56(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  mov $0, %%rax;"
+++		                                   "  adox %%rdx, %%rax;"
+++		/* Compute src1[1] * src2 */
+++		"  movq 40(%1), %%rdx;"
+++		"  mulxq 32(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  adcxq 72(%0), %%r8;"    "  movq %%r8, 72(%0);"
+++		"  mulxq 40(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 80(%0);"
+++		"  mulxq 48(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  mov $0, %%r8;"
+++		"  mulxq 56(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
+++		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
+++		/* Compute src1[2] * src2 */
+++		"  movq 48(%1), %%rdx;"
+++		"  mulxq 32(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 80(%0), %%r8;"    "  movq %%r8, 80(%0);"
+++		"  mulxq 40(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 88(%0);"
+++		"  mulxq 48(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  mov $0, %%r8;"
+++		"  mulxq 56(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
+++		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
+++		/* Compute src1[3] * src2 */
+++		"  movq 56(%1), %%rdx;"
+++		"  mulxq 32(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 88(%0), %%r8;"    "  movq %%r8, 88(%0);"
+++		"  mulxq 40(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 96(%0);"
+++		"  mulxq 48(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  movq %%r12, 104(%0);"    "  mov $0, %%r8;"
+++		"  mulxq 56(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  movq %%r14, 112(%0);"    "  mov $0, %%rax;"
+++		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"     "  movq %%rax, 120(%0);"
+++		/* Line up pointers */
+++		"  mov %0, %1;"
+++		"  mov %2, %0;"
+++
+++		/* Wrap the results back into the field */
+++
+++		/* Step 1: Compute dst + carry == tmp_hi * 38 + tmp_lo */
+++		"  mov $38, %%rdx;"
+++		"  mulxq 32(%1), %%r8, %%r13;"
+++		"  xor %3, %3;"
+++		"  adoxq 0(%1), %%r8;"
+++		"  mulxq 40(%1), %%r9, %%r12;"
+++		"  adcx %%r13, %%r9;"
+++		"  adoxq 8(%1), %%r9;"
+++		"  mulxq 48(%1), %%r10, %%r13;"
+++		"  adcx %%r12, %%r10;"
+++		"  adoxq 16(%1), %%r10;"
+++		"  mulxq 56(%1), %%r11, %%rax;"
+++		"  adcx %%r13, %%r11;"
+++		"  adoxq 24(%1), %%r11;"
+++		"  adcx %3, %%rax;"
+++		"  adox %3, %%rax;"
+++		"  imul %%rdx, %%rax;"
+++
+++		/* Step 2: Fold the carry back into dst */
+++		"  add %%rax, %%r8;"
+++		"  adcx %3, %%r9;"
+++		"  movq %%r9, 8(%0);"
+++		"  adcx %3, %%r10;"
+++		"  movq %%r10, 16(%0);"
+++		"  adcx %3, %%r11;"
+++		"  movq %%r11, 24(%0);"
+++
+++		/* Step 3: Fold the carry bit back in; guaranteed not to carry at this point */
+++		"  mov $0, %%rax;"
+++		"  cmovc %%rdx, %%rax;"
+++		"  add %%rax, %%r8;"
+++		"  movq %%r8, 0(%0);"
+++
+++		/* Step 1: Compute dst + carry == tmp_hi * 38 + tmp_lo */
+++		"  mov $38, %%rdx;"
+++		"  mulxq 96(%1), %%r8, %%r13;"
+++		"  xor %3, %3;"
+++		"  adoxq 64(%1), %%r8;"
+++		"  mulxq 104(%1), %%r9, %%r12;"
+++		"  adcx %%r13, %%r9;"
+++		"  adoxq 72(%1), %%r9;"
+++		"  mulxq 112(%1), %%r10, %%r13;"
+++		"  adcx %%r12, %%r10;"
+++		"  adoxq 80(%1), %%r10;"
+++		"  mulxq 120(%1), %%r11, %%rax;"
+++		"  adcx %%r13, %%r11;"
+++		"  adoxq 88(%1), %%r11;"
+++		"  adcx %3, %%rax;"
+++		"  adox %3, %%rax;"
+++		"  imul %%rdx, %%rax;"
+++
+++		/* Step 2: Fold the carry back into dst */
+++		"  add %%rax, %%r8;"
+++		"  adcx %3, %%r9;"
+++		"  movq %%r9, 40(%0);"
+++		"  adcx %3, %%r10;"
+++		"  movq %%r10, 48(%0);"
+++		"  adcx %3, %%r11;"
+++		"  movq %%r11, 56(%0);"
+++
+++		/* Step 3: Fold the carry bit back in; guaranteed not to carry at this point */
+++		"  mov $0, %%rax;"
+++		"  cmovc %%rdx, %%rax;"
+++		"  add %%rax, %%r8;"
+++		"  movq %%r8, 32(%0);"
+++	: "+&r" (tmp), "+&r" (f1), "+&r" (out), "+&r" (f2)
+++	:
+++	: "%rax", "%rdx", "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "memory", "cc"
+++	);
++ }
++ 
++-static __always_inline void
++-add_eltfp25519_1w_adx(u64 *const c, const u64 *const a, const u64 *const b)
+++/* Computes the field multiplication of four-element f1 with value in f2 */
+++static inline void fmul_scalar(u64 *out, const u64 *f1, u64 f2)
++ {
++-	asm volatile(
++-		"mov     $38, %%eax ;"
++-		"xorl  %%ecx, %%ecx ;"
++-		"movq   (%2),  %%r8 ;"
++-		"adcx   (%1),  %%r8 ;"
++-		"movq  8(%2),  %%r9 ;"
++-		"adcx  8(%1),  %%r9 ;"
++-		"movq 16(%2), %%r10 ;"
++-		"adcx 16(%1), %%r10 ;"
++-		"movq 24(%2), %%r11 ;"
++-		"adcx 24(%1), %%r11 ;"
++-		"cmovc %%eax, %%ecx ;"
++-		"xorl %%eax, %%eax  ;"
++-		"adcx %%rcx,  %%r8  ;"
++-		"adcx %%rax,  %%r9  ;"
++-		"movq  %%r9,  8(%0) ;"
++-		"adcx %%rax, %%r10  ;"
++-		"movq %%r10, 16(%0) ;"
++-		"adcx %%rax, %%r11  ;"
++-		"movq %%r11, 24(%0) ;"
++-		"mov     $38, %%ecx ;"
++-		"cmovc %%ecx, %%eax ;"
++-		"addq %%rax,  %%r8  ;"
++-		"movq  %%r8,   (%0) ;"
++-		:
++-		: "r"(c), "r"(a), "r"(b)
++-		: "memory", "cc", "%rax", "%rcx", "%r8", "%r9", "%r10", "%r11");
++-}
+++	register u64 f2_r asm("rdx") = f2;
++ 
++-static __always_inline void
++-add_eltfp25519_1w_bmi2(u64 *const c, const u64 *const a, const u64 *const b)
++-{
++ 	asm volatile(
++-		"mov     $38, %%eax ;"
++-		"movq   (%2),  %%r8 ;"
++-		"addq   (%1),  %%r8 ;"
++-		"movq  8(%2),  %%r9 ;"
++-		"adcq  8(%1),  %%r9 ;"
++-		"movq 16(%2), %%r10 ;"
++-		"adcq 16(%1), %%r10 ;"
++-		"movq 24(%2), %%r11 ;"
++-		"adcq 24(%1), %%r11 ;"
++-		"mov      $0, %%ecx ;"
++-		"cmovc %%eax, %%ecx ;"
++-		"addq %%rcx,  %%r8  ;"
++-		"adcq    $0,  %%r9  ;"
++-		"movq  %%r9,  8(%0) ;"
++-		"adcq    $0, %%r10  ;"
++-		"movq %%r10, 16(%0) ;"
++-		"adcq    $0, %%r11  ;"
++-		"movq %%r11, 24(%0) ;"
++-		"mov     $0, %%ecx  ;"
++-		"cmovc %%eax, %%ecx ;"
++-		"addq %%rcx,  %%r8  ;"
++-		"movq  %%r8,   (%0) ;"
++-		:
++-		: "r"(c), "r"(a), "r"(b)
++-		: "memory", "cc", "%rax", "%rcx", "%r8", "%r9", "%r10", "%r11");
+++		/* Compute the raw multiplication of f1*f2 */
+++		"  mulxq 0(%2), %%r8, %%rcx;"      /* f1[0]*f2 */
+++		"  mulxq 8(%2), %%r9, %%r12;"      /* f1[1]*f2 */
+++		"  add %%rcx, %%r9;"
+++		"  mov $0, %%rcx;"
+++		"  mulxq 16(%2), %%r10, %%r13;"    /* f1[2]*f2 */
+++		"  adcx %%r12, %%r10;"
+++		"  mulxq 24(%2), %%r11, %%rax;"    /* f1[3]*f2 */
+++		"  adcx %%r13, %%r11;"
+++		"  adcx %%rcx, %%rax;"
+++
+++		/* Wrap the result back into the field */
+++
+++		/* Step 1: Compute carry*38 */
+++		"  mov $38, %%rdx;"
+++		"  imul %%rdx, %%rax;"
+++
+++		/* Step 2: Fold the carry back into dst */
+++		"  add %%rax, %%r8;"
+++		"  adcx %%rcx, %%r9;"
+++		"  movq %%r9, 8(%1);"
+++		"  adcx %%rcx, %%r10;"
+++		"  movq %%r10, 16(%1);"
+++		"  adcx %%rcx, %%r11;"
+++		"  movq %%r11, 24(%1);"
+++
+++		/* Step 3: Fold the carry bit back in; guaranteed not to carry at this point */
+++		"  mov $0, %%rax;"
+++		"  cmovc %%rdx, %%rax;"
+++		"  add %%rax, %%r8;"
+++		"  movq %%r8, 0(%1);"
+++	: "+&r" (f2_r)
+++	: "r" (out), "r" (f1)
+++	: "%rax", "%rcx", "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "memory", "cc"
+++	);
++ }
++ 
++-static __always_inline void
++-sub_eltfp25519_1w(u64 *const c, const u64 *const a, const u64 *const b)
++-{
++-	asm volatile(
++-		"mov     $38, %%eax ;"
++-		"movq   (%1),  %%r8 ;"
++-		"subq   (%2),  %%r8 ;"
++-		"movq  8(%1),  %%r9 ;"
++-		"sbbq  8(%2),  %%r9 ;"
++-		"movq 16(%1), %%r10 ;"
++-		"sbbq 16(%2), %%r10 ;"
++-		"movq 24(%1), %%r11 ;"
++-		"sbbq 24(%2), %%r11 ;"
++-		"mov      $0, %%ecx ;"
++-		"cmovc %%eax, %%ecx ;"
++-		"subq %%rcx,  %%r8  ;"
++-		"sbbq    $0,  %%r9  ;"
++-		"movq  %%r9,  8(%0) ;"
++-		"sbbq    $0, %%r10  ;"
++-		"movq %%r10, 16(%0) ;"
++-		"sbbq    $0, %%r11  ;"
++-		"movq %%r11, 24(%0) ;"
++-		"mov     $0, %%ecx  ;"
++-		"cmovc %%eax, %%ecx ;"
++-		"subq %%rcx,  %%r8  ;"
++-		"movq  %%r8,   (%0) ;"
++-		:
++-		: "r"(c), "r"(a), "r"(b)
++-		: "memory", "cc", "%rax", "%rcx", "%r8", "%r9", "%r10", "%r11");
++-}
++-
++-/* Multiplication by a24 = (A+2)/4 = (486662+2)/4 = 121666 */
++-static __always_inline void
++-mul_a24_eltfp25519_1w(u64 *const c, const u64 *const a)
+++/* Computes p1 <- bit ? p2 : p1 in constant time */
+++static inline void cswap2(u64 bit, const u64 *p1, const u64 *p2)
++ {
++-	const u64 a24 = 121666;
++ 	asm volatile(
++-		"movq     %2, %%rdx ;"
++-		"mulx   (%1),  %%r8, %%r10 ;"
++-		"mulx  8(%1),  %%r9, %%r11 ;"
++-		"addq %%r10,  %%r9 ;"
++-		"mulx 16(%1), %%r10, %%rax ;"
++-		"adcq %%r11, %%r10 ;"
++-		"mulx 24(%1), %%r11, %%rcx ;"
++-		"adcq %%rax, %%r11 ;"
++-		/**************************/
++-		"adcq    $0, %%rcx ;"
++-		"movl   $38, %%edx ;" /* 2*c = 38 = 2^256 mod 2^255-19*/
++-		"imul %%rdx, %%rcx ;"
++-		"addq %%rcx,  %%r8 ;"
++-		"adcq    $0,  %%r9 ;"
++-		"movq  %%r9,  8(%0) ;"
++-		"adcq    $0, %%r10 ;"
++-		"movq %%r10, 16(%0) ;"
++-		"adcq    $0, %%r11 ;"
++-		"movq %%r11, 24(%0) ;"
++-		"mov     $0, %%ecx ;"
++-		"cmovc %%edx, %%ecx ;"
++-		"addq %%rcx,  %%r8 ;"
++-		"movq  %%r8,   (%0) ;"
++-		:
++-		: "r"(c), "r"(a), "r"(a24)
++-		: "memory", "cc", "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10",
++-		  "%r11");
++-}
++-
++-static void inv_eltfp25519_1w_adx(u64 *const c, const u64 *const a)
++-{
++-	struct {
++-		eltfp25519_1w_buffer buffer;
++-		eltfp25519_1w x0, x1, x2;
++-	} __aligned(32) m;
++-	u64 *T[4];
++-
++-	T[0] = m.x0;
++-	T[1] = c; /* x^(-1) */
++-	T[2] = m.x1;
++-	T[3] = m.x2;
++-
++-	copy_eltfp25519_1w(T[1], a);
++-	sqrn_eltfp25519_1w_adx(T[1], 1);
++-	copy_eltfp25519_1w(T[2], T[1]);
++-	sqrn_eltfp25519_1w_adx(T[2], 2);
++-	mul_eltfp25519_1w_adx(T[0], a, T[2]);
++-	mul_eltfp25519_1w_adx(T[1], T[1], T[0]);
++-	copy_eltfp25519_1w(T[2], T[1]);
++-	sqrn_eltfp25519_1w_adx(T[2], 1);
++-	mul_eltfp25519_1w_adx(T[0], T[0], T[2]);
++-	copy_eltfp25519_1w(T[2], T[0]);
++-	sqrn_eltfp25519_1w_adx(T[2], 5);
++-	mul_eltfp25519_1w_adx(T[0], T[0], T[2]);
++-	copy_eltfp25519_1w(T[2], T[0]);
++-	sqrn_eltfp25519_1w_adx(T[2], 10);
++-	mul_eltfp25519_1w_adx(T[2], T[2], T[0]);
++-	copy_eltfp25519_1w(T[3], T[2]);
++-	sqrn_eltfp25519_1w_adx(T[3], 20);
++-	mul_eltfp25519_1w_adx(T[3], T[3], T[2]);
++-	sqrn_eltfp25519_1w_adx(T[3], 10);
++-	mul_eltfp25519_1w_adx(T[3], T[3], T[0]);
++-	copy_eltfp25519_1w(T[0], T[3]);
++-	sqrn_eltfp25519_1w_adx(T[0], 50);
++-	mul_eltfp25519_1w_adx(T[0], T[0], T[3]);
++-	copy_eltfp25519_1w(T[2], T[0]);
++-	sqrn_eltfp25519_1w_adx(T[2], 100);
++-	mul_eltfp25519_1w_adx(T[2], T[2], T[0]);
++-	sqrn_eltfp25519_1w_adx(T[2], 50);
++-	mul_eltfp25519_1w_adx(T[2], T[2], T[3]);
++-	sqrn_eltfp25519_1w_adx(T[2], 5);
++-	mul_eltfp25519_1w_adx(T[1], T[1], T[2]);
++-
++-	memzero_explicit(&m, sizeof(m));
++-}
++-
++-static void inv_eltfp25519_1w_bmi2(u64 *const c, const u64 *const a)
++-{
++-	struct {
++-		eltfp25519_1w_buffer buffer;
++-		eltfp25519_1w x0, x1, x2;
++-	} __aligned(32) m;
++-	u64 *T[5];
++-
++-	T[0] = m.x0;
++-	T[1] = c; /* x^(-1) */
++-	T[2] = m.x1;
++-	T[3] = m.x2;
++-
++-	copy_eltfp25519_1w(T[1], a);
++-	sqrn_eltfp25519_1w_bmi2(T[1], 1);
++-	copy_eltfp25519_1w(T[2], T[1]);
++-	sqrn_eltfp25519_1w_bmi2(T[2], 2);
++-	mul_eltfp25519_1w_bmi2(T[0], a, T[2]);
++-	mul_eltfp25519_1w_bmi2(T[1], T[1], T[0]);
++-	copy_eltfp25519_1w(T[2], T[1]);
++-	sqrn_eltfp25519_1w_bmi2(T[2], 1);
++-	mul_eltfp25519_1w_bmi2(T[0], T[0], T[2]);
++-	copy_eltfp25519_1w(T[2], T[0]);
++-	sqrn_eltfp25519_1w_bmi2(T[2], 5);
++-	mul_eltfp25519_1w_bmi2(T[0], T[0], T[2]);
++-	copy_eltfp25519_1w(T[2], T[0]);
++-	sqrn_eltfp25519_1w_bmi2(T[2], 10);
++-	mul_eltfp25519_1w_bmi2(T[2], T[2], T[0]);
++-	copy_eltfp25519_1w(T[3], T[2]);
++-	sqrn_eltfp25519_1w_bmi2(T[3], 20);
++-	mul_eltfp25519_1w_bmi2(T[3], T[3], T[2]);
++-	sqrn_eltfp25519_1w_bmi2(T[3], 10);
++-	mul_eltfp25519_1w_bmi2(T[3], T[3], T[0]);
++-	copy_eltfp25519_1w(T[0], T[3]);
++-	sqrn_eltfp25519_1w_bmi2(T[0], 50);
++-	mul_eltfp25519_1w_bmi2(T[0], T[0], T[3]);
++-	copy_eltfp25519_1w(T[2], T[0]);
++-	sqrn_eltfp25519_1w_bmi2(T[2], 100);
++-	mul_eltfp25519_1w_bmi2(T[2], T[2], T[0]);
++-	sqrn_eltfp25519_1w_bmi2(T[2], 50);
++-	mul_eltfp25519_1w_bmi2(T[2], T[2], T[3]);
++-	sqrn_eltfp25519_1w_bmi2(T[2], 5);
++-	mul_eltfp25519_1w_bmi2(T[1], T[1], T[2]);
+++		/* Invert the polarity of bit to match cmov expectations */
+++		"  add $18446744073709551615, %0;"
++ 
++-	memzero_explicit(&m, sizeof(m));
+++		/* cswap p1[0], p2[0] */
+++		"  movq 0(%1), %%r8;"
+++		"  movq 0(%2), %%r9;"
+++		"  mov %%r8, %%r10;"
+++		"  cmovc %%r9, %%r8;"
+++		"  cmovc %%r10, %%r9;"
+++		"  movq %%r8, 0(%1);"
+++		"  movq %%r9, 0(%2);"
+++
+++		/* cswap p1[1], p2[1] */
+++		"  movq 8(%1), %%r8;"
+++		"  movq 8(%2), %%r9;"
+++		"  mov %%r8, %%r10;"
+++		"  cmovc %%r9, %%r8;"
+++		"  cmovc %%r10, %%r9;"
+++		"  movq %%r8, 8(%1);"
+++		"  movq %%r9, 8(%2);"
+++
+++		/* cswap p1[2], p2[2] */
+++		"  movq 16(%1), %%r8;"
+++		"  movq 16(%2), %%r9;"
+++		"  mov %%r8, %%r10;"
+++		"  cmovc %%r9, %%r8;"
+++		"  cmovc %%r10, %%r9;"
+++		"  movq %%r8, 16(%1);"
+++		"  movq %%r9, 16(%2);"
+++
+++		/* cswap p1[3], p2[3] */
+++		"  movq 24(%1), %%r8;"
+++		"  movq 24(%2), %%r9;"
+++		"  mov %%r8, %%r10;"
+++		"  cmovc %%r9, %%r8;"
+++		"  cmovc %%r10, %%r9;"
+++		"  movq %%r8, 24(%1);"
+++		"  movq %%r9, 24(%2);"
+++
+++		/* cswap p1[4], p2[4] */
+++		"  movq 32(%1), %%r8;"
+++		"  movq 32(%2), %%r9;"
+++		"  mov %%r8, %%r10;"
+++		"  cmovc %%r9, %%r8;"
+++		"  cmovc %%r10, %%r9;"
+++		"  movq %%r8, 32(%1);"
+++		"  movq %%r9, 32(%2);"
+++
+++		/* cswap p1[5], p2[5] */
+++		"  movq 40(%1), %%r8;"
+++		"  movq 40(%2), %%r9;"
+++		"  mov %%r8, %%r10;"
+++		"  cmovc %%r9, %%r8;"
+++		"  cmovc %%r10, %%r9;"
+++		"  movq %%r8, 40(%1);"
+++		"  movq %%r9, 40(%2);"
+++
+++		/* cswap p1[6], p2[6] */
+++		"  movq 48(%1), %%r8;"
+++		"  movq 48(%2), %%r9;"
+++		"  mov %%r8, %%r10;"
+++		"  cmovc %%r9, %%r8;"
+++		"  cmovc %%r10, %%r9;"
+++		"  movq %%r8, 48(%1);"
+++		"  movq %%r9, 48(%2);"
+++
+++		/* cswap p1[7], p2[7] */
+++		"  movq 56(%1), %%r8;"
+++		"  movq 56(%2), %%r9;"
+++		"  mov %%r8, %%r10;"
+++		"  cmovc %%r9, %%r8;"
+++		"  cmovc %%r10, %%r9;"
+++		"  movq %%r8, 56(%1);"
+++		"  movq %%r9, 56(%2);"
+++	: "+&r" (bit)
+++	: "r" (p1), "r" (p2)
+++	: "%r8", "%r9", "%r10", "memory", "cc"
+++	);
++ }
++ 
++-/* Given c, a 256-bit number, fred_eltfp25519_1w updates c
++- * with a number such that 0 <= C < 2**255-19.
++- */
++-static __always_inline void fred_eltfp25519_1w(u64 *const c)
+++/* Computes the square of a field element: out <- f * f
+++ * Uses the 8-element buffer tmp for intermediate results */
+++static inline void fsqr(u64 *out, const u64 *f, u64 *tmp)
++ {
++-	u64 tmp0 = 38, tmp1 = 19;
++ 	asm volatile(
++-		"btrq   $63,    %3 ;" /* Put bit 255 in carry flag and clear */
++-		"cmovncl %k5,   %k4 ;" /* c[255] ? 38 : 19 */
++-
++-		/* Add either 19 or 38 to c */
++-		"addq    %4,   %0 ;"
++-		"adcq    $0,   %1 ;"
++-		"adcq    $0,   %2 ;"
++-		"adcq    $0,   %3 ;"
++-
++-		/* Test for bit 255 again; only triggered on overflow modulo 2^255-19 */
++-		"movl    $0,  %k4 ;"
++-		"cmovnsl %k5,  %k4 ;" /* c[255] ? 0 : 19 */
++-		"btrq   $63,   %3 ;" /* Clear bit 255 */
++-
++-		/* Subtract 19 if necessary */
++-		"subq    %4,   %0 ;"
++-		"sbbq    $0,   %1 ;"
++-		"sbbq    $0,   %2 ;"
++-		"sbbq    $0,   %3 ;"
++-
++-		: "+r"(c[0]), "+r"(c[1]), "+r"(c[2]), "+r"(c[3]), "+r"(tmp0),
++-		  "+r"(tmp1)
++-		:
++-		: "memory", "cc");
++-}
+++		/* Compute the raw multiplication: tmp <- f * f */
++ 
++-static __always_inline void cswap(u8 bit, u64 *const px, u64 *const py)
++-{
++-	u64 temp;
++-	asm volatile(
++-		"test %9, %9 ;"
++-		"movq %0, %8 ;"
++-		"cmovnzq %4, %0 ;"
++-		"cmovnzq %8, %4 ;"
++-		"movq %1, %8 ;"
++-		"cmovnzq %5, %1 ;"
++-		"cmovnzq %8, %5 ;"
++-		"movq %2, %8 ;"
++-		"cmovnzq %6, %2 ;"
++-		"cmovnzq %8, %6 ;"
++-		"movq %3, %8 ;"
++-		"cmovnzq %7, %3 ;"
++-		"cmovnzq %8, %7 ;"
++-		: "+r"(px[0]), "+r"(px[1]), "+r"(px[2]), "+r"(px[3]),
++-		  "+r"(py[0]), "+r"(py[1]), "+r"(py[2]), "+r"(py[3]),
++-		  "=r"(temp)
++-		: "r"(bit)
++-		: "cc"
+++		/* Step 1: Compute all partial products */
+++		"  movq 0(%1), %%rdx;"                                       /* f[0] */
+++		"  mulxq 8(%1), %%r8, %%r14;"      "  xor %%r15, %%r15;"     /* f[1]*f[0] */
+++		"  mulxq 16(%1), %%r9, %%r10;"     "  adcx %%r14, %%r9;"     /* f[2]*f[0] */
+++		"  mulxq 24(%1), %%rax, %%rcx;"    "  adcx %%rax, %%r10;"    /* f[3]*f[0] */
+++		"  movq 24(%1), %%rdx;"                                      /* f[3] */
+++		"  mulxq 8(%1), %%r11, %%r12;"     "  adcx %%rcx, %%r11;"    /* f[1]*f[3] */
+++		"  mulxq 16(%1), %%rax, %%r13;"    "  adcx %%rax, %%r12;"    /* f[2]*f[3] */
+++		"  movq 8(%1), %%rdx;"             "  adcx %%r15, %%r13;"    /* f1 */
+++		"  mulxq 16(%1), %%rax, %%rcx;"    "  mov $0, %%r14;"        /* f[2]*f[1] */
+++
+++		/* Step 2: Compute two parallel carry chains */
+++		"  xor %%r15, %%r15;"
+++		"  adox %%rax, %%r10;"
+++		"  adcx %%r8, %%r8;"
+++		"  adox %%rcx, %%r11;"
+++		"  adcx %%r9, %%r9;"
+++		"  adox %%r15, %%r12;"
+++		"  adcx %%r10, %%r10;"
+++		"  adox %%r15, %%r13;"
+++		"  adcx %%r11, %%r11;"
+++		"  adox %%r15, %%r14;"
+++		"  adcx %%r12, %%r12;"
+++		"  adcx %%r13, %%r13;"
+++		"  adcx %%r14, %%r14;"
+++
+++		/* Step 3: Compute intermediate squares */
+++		"  movq 0(%1), %%rdx;"     "  mulx %%rdx, %%rax, %%rcx;"    /* f[0]^2 */
+++		                           "  movq %%rax, 0(%0);"
+++		"  add %%rcx, %%r8;"       "  movq %%r8, 8(%0);"
+++		"  movq 8(%1), %%rdx;"     "  mulx %%rdx, %%rax, %%rcx;"    /* f[1]^2 */
+++		"  adcx %%rax, %%r9;"      "  movq %%r9, 16(%0);"
+++		"  adcx %%rcx, %%r10;"     "  movq %%r10, 24(%0);"
+++		"  movq 16(%1), %%rdx;"    "  mulx %%rdx, %%rax, %%rcx;"    /* f[2]^2 */
+++		"  adcx %%rax, %%r11;"     "  movq %%r11, 32(%0);"
+++		"  adcx %%rcx, %%r12;"     "  movq %%r12, 40(%0);"
+++		"  movq 24(%1), %%rdx;"    "  mulx %%rdx, %%rax, %%rcx;"    /* f[3]^2 */
+++		"  adcx %%rax, %%r13;"     "  movq %%r13, 48(%0);"
+++		"  adcx %%rcx, %%r14;"     "  movq %%r14, 56(%0);"
+++
+++		/* Line up pointers */
+++		"  mov %0, %1;"
+++		"  mov %2, %0;"
+++
+++		/* Wrap the result back into the field */
+++
+++		/* Step 1: Compute dst + carry == tmp_hi * 38 + tmp_lo */
+++		"  mov $38, %%rdx;"
+++		"  mulxq 32(%1), %%r8, %%r13;"
+++		"  xor %%rcx, %%rcx;"
+++		"  adoxq 0(%1), %%r8;"
+++		"  mulxq 40(%1), %%r9, %%r12;"
+++		"  adcx %%r13, %%r9;"
+++		"  adoxq 8(%1), %%r9;"
+++		"  mulxq 48(%1), %%r10, %%r13;"
+++		"  adcx %%r12, %%r10;"
+++		"  adoxq 16(%1), %%r10;"
+++		"  mulxq 56(%1), %%r11, %%rax;"
+++		"  adcx %%r13, %%r11;"
+++		"  adoxq 24(%1), %%r11;"
+++		"  adcx %%rcx, %%rax;"
+++		"  adox %%rcx, %%rax;"
+++		"  imul %%rdx, %%rax;"
+++
+++		/* Step 2: Fold the carry back into dst */
+++		"  add %%rax, %%r8;"
+++		"  adcx %%rcx, %%r9;"
+++		"  movq %%r9, 8(%0);"
+++		"  adcx %%rcx, %%r10;"
+++		"  movq %%r10, 16(%0);"
+++		"  adcx %%rcx, %%r11;"
+++		"  movq %%r11, 24(%0);"
+++
+++		/* Step 3: Fold the carry bit back in; guaranteed not to carry at this point */
+++		"  mov $0, %%rax;"
+++		"  cmovc %%rdx, %%rax;"
+++		"  add %%rax, %%r8;"
+++		"  movq %%r8, 0(%0);"
+++	: "+&r" (tmp), "+&r" (f), "+&r" (out)
+++	:
+++	: "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", "memory", "cc"
++ 	);
++ }
++ 
++-static __always_inline void cselect(u8 bit, u64 *const px, const u64 *const py)
+++/* Computes two field squarings:
+++ * out[0] <- f[0] * f[0]
+++ * out[1] <- f[1] * f[1]
+++ * Uses the 16-element buffer tmp for intermediate results */
+++static inline void fsqr2(u64 *out, const u64 *f, u64 *tmp)
++ {
++ 	asm volatile(
++-		"test %4, %4 ;"
++-		"cmovnzq %5, %0 ;"
++-		"cmovnzq %6, %1 ;"
++-		"cmovnzq %7, %2 ;"
++-		"cmovnzq %8, %3 ;"
++-		: "+r"(px[0]), "+r"(px[1]), "+r"(px[2]), "+r"(px[3])
++-		: "r"(bit), "rm"(py[0]), "rm"(py[1]), "rm"(py[2]), "rm"(py[3])
++-		: "cc"
+++		/* Step 1: Compute all partial products */
+++		"  movq 0(%1), %%rdx;"                                       /* f[0] */
+++		"  mulxq 8(%1), %%r8, %%r14;"      "  xor %%r15, %%r15;"     /* f[1]*f[0] */
+++		"  mulxq 16(%1), %%r9, %%r10;"     "  adcx %%r14, %%r9;"     /* f[2]*f[0] */
+++		"  mulxq 24(%1), %%rax, %%rcx;"    "  adcx %%rax, %%r10;"    /* f[3]*f[0] */
+++		"  movq 24(%1), %%rdx;"                                      /* f[3] */
+++		"  mulxq 8(%1), %%r11, %%r12;"     "  adcx %%rcx, %%r11;"    /* f[1]*f[3] */
+++		"  mulxq 16(%1), %%rax, %%r13;"    "  adcx %%rax, %%r12;"    /* f[2]*f[3] */
+++		"  movq 8(%1), %%rdx;"             "  adcx %%r15, %%r13;"    /* f1 */
+++		"  mulxq 16(%1), %%rax, %%rcx;"    "  mov $0, %%r14;"        /* f[2]*f[1] */
+++
+++		/* Step 2: Compute two parallel carry chains */
+++		"  xor %%r15, %%r15;"
+++		"  adox %%rax, %%r10;"
+++		"  adcx %%r8, %%r8;"
+++		"  adox %%rcx, %%r11;"
+++		"  adcx %%r9, %%r9;"
+++		"  adox %%r15, %%r12;"
+++		"  adcx %%r10, %%r10;"
+++		"  adox %%r15, %%r13;"
+++		"  adcx %%r11, %%r11;"
+++		"  adox %%r15, %%r14;"
+++		"  adcx %%r12, %%r12;"
+++		"  adcx %%r13, %%r13;"
+++		"  adcx %%r14, %%r14;"
+++
+++		/* Step 3: Compute intermediate squares */
+++		"  movq 0(%1), %%rdx;"     "  mulx %%rdx, %%rax, %%rcx;"    /* f[0]^2 */
+++		                           "  movq %%rax, 0(%0);"
+++		"  add %%rcx, %%r8;"       "  movq %%r8, 8(%0);"
+++		"  movq 8(%1), %%rdx;"     "  mulx %%rdx, %%rax, %%rcx;"    /* f[1]^2 */
+++		"  adcx %%rax, %%r9;"      "  movq %%r9, 16(%0);"
+++		"  adcx %%rcx, %%r10;"     "  movq %%r10, 24(%0);"
+++		"  movq 16(%1), %%rdx;"    "  mulx %%rdx, %%rax, %%rcx;"    /* f[2]^2 */
+++		"  adcx %%rax, %%r11;"     "  movq %%r11, 32(%0);"
+++		"  adcx %%rcx, %%r12;"     "  movq %%r12, 40(%0);"
+++		"  movq 24(%1), %%rdx;"    "  mulx %%rdx, %%rax, %%rcx;"    /* f[3]^2 */
+++		"  adcx %%rax, %%r13;"     "  movq %%r13, 48(%0);"
+++		"  adcx %%rcx, %%r14;"     "  movq %%r14, 56(%0);"
+++
+++		/* Step 1: Compute all partial products */
+++		"  movq 32(%1), %%rdx;"                                       /* f[0] */
+++		"  mulxq 40(%1), %%r8, %%r14;"      "  xor %%r15, %%r15;"     /* f[1]*f[0] */
+++		"  mulxq 48(%1), %%r9, %%r10;"     "  adcx %%r14, %%r9;"     /* f[2]*f[0] */
+++		"  mulxq 56(%1), %%rax, %%rcx;"    "  adcx %%rax, %%r10;"    /* f[3]*f[0] */
+++		"  movq 56(%1), %%rdx;"                                      /* f[3] */
+++		"  mulxq 40(%1), %%r11, %%r12;"     "  adcx %%rcx, %%r11;"    /* f[1]*f[3] */
+++		"  mulxq 48(%1), %%rax, %%r13;"    "  adcx %%rax, %%r12;"    /* f[2]*f[3] */
+++		"  movq 40(%1), %%rdx;"             "  adcx %%r15, %%r13;"    /* f1 */
+++		"  mulxq 48(%1), %%rax, %%rcx;"    "  mov $0, %%r14;"        /* f[2]*f[1] */
+++
+++		/* Step 2: Compute two parallel carry chains */
+++		"  xor %%r15, %%r15;"
+++		"  adox %%rax, %%r10;"
+++		"  adcx %%r8, %%r8;"
+++		"  adox %%rcx, %%r11;"
+++		"  adcx %%r9, %%r9;"
+++		"  adox %%r15, %%r12;"
+++		"  adcx %%r10, %%r10;"
+++		"  adox %%r15, %%r13;"
+++		"  adcx %%r11, %%r11;"
+++		"  adox %%r15, %%r14;"
+++		"  adcx %%r12, %%r12;"
+++		"  adcx %%r13, %%r13;"
+++		"  adcx %%r14, %%r14;"
+++
+++		/* Step 3: Compute intermediate squares */
+++		"  movq 32(%1), %%rdx;"     "  mulx %%rdx, %%rax, %%rcx;"    /* f[0]^2 */
+++		                           "  movq %%rax, 64(%0);"
+++		"  add %%rcx, %%r8;"       "  movq %%r8, 72(%0);"
+++		"  movq 40(%1), %%rdx;"     "  mulx %%rdx, %%rax, %%rcx;"    /* f[1]^2 */
+++		"  adcx %%rax, %%r9;"      "  movq %%r9, 80(%0);"
+++		"  adcx %%rcx, %%r10;"     "  movq %%r10, 88(%0);"
+++		"  movq 48(%1), %%rdx;"    "  mulx %%rdx, %%rax, %%rcx;"    /* f[2]^2 */
+++		"  adcx %%rax, %%r11;"     "  movq %%r11, 96(%0);"
+++		"  adcx %%rcx, %%r12;"     "  movq %%r12, 104(%0);"
+++		"  movq 56(%1), %%rdx;"    "  mulx %%rdx, %%rax, %%rcx;"    /* f[3]^2 */
+++		"  adcx %%rax, %%r13;"     "  movq %%r13, 112(%0);"
+++		"  adcx %%rcx, %%r14;"     "  movq %%r14, 120(%0);"
+++
+++		/* Line up pointers */
+++		"  mov %0, %1;"
+++		"  mov %2, %0;"
+++
+++		/* Step 1: Compute dst + carry == tmp_hi * 38 + tmp_lo */
+++		"  mov $38, %%rdx;"
+++		"  mulxq 32(%1), %%r8, %%r13;"
+++		"  xor %%rcx, %%rcx;"
+++		"  adoxq 0(%1), %%r8;"
+++		"  mulxq 40(%1), %%r9, %%r12;"
+++		"  adcx %%r13, %%r9;"
+++		"  adoxq 8(%1), %%r9;"
+++		"  mulxq 48(%1), %%r10, %%r13;"
+++		"  adcx %%r12, %%r10;"
+++		"  adoxq 16(%1), %%r10;"
+++		"  mulxq 56(%1), %%r11, %%rax;"
+++		"  adcx %%r13, %%r11;"
+++		"  adoxq 24(%1), %%r11;"
+++		"  adcx %%rcx, %%rax;"
+++		"  adox %%rcx, %%rax;"
+++		"  imul %%rdx, %%rax;"
+++
+++		/* Step 2: Fold the carry back into dst */
+++		"  add %%rax, %%r8;"
+++		"  adcx %%rcx, %%r9;"
+++		"  movq %%r9, 8(%0);"
+++		"  adcx %%rcx, %%r10;"
+++		"  movq %%r10, 16(%0);"
+++		"  adcx %%rcx, %%r11;"
+++		"  movq %%r11, 24(%0);"
+++
+++		/* Step 3: Fold the carry bit back in; guaranteed not to carry at this point */
+++		"  mov $0, %%rax;"
+++		"  cmovc %%rdx, %%rax;"
+++		"  add %%rax, %%r8;"
+++		"  movq %%r8, 0(%0);"
+++
+++		/* Step 1: Compute dst + carry == tmp_hi * 38 + tmp_lo */
+++		"  mov $38, %%rdx;"
+++		"  mulxq 96(%1), %%r8, %%r13;"
+++		"  xor %%rcx, %%rcx;"
+++		"  adoxq 64(%1), %%r8;"
+++		"  mulxq 104(%1), %%r9, %%r12;"
+++		"  adcx %%r13, %%r9;"
+++		"  adoxq 72(%1), %%r9;"
+++		"  mulxq 112(%1), %%r10, %%r13;"
+++		"  adcx %%r12, %%r10;"
+++		"  adoxq 80(%1), %%r10;"
+++		"  mulxq 120(%1), %%r11, %%rax;"
+++		"  adcx %%r13, %%r11;"
+++		"  adoxq 88(%1), %%r11;"
+++		"  adcx %%rcx, %%rax;"
+++		"  adox %%rcx, %%rax;"
+++		"  imul %%rdx, %%rax;"
+++
+++		/* Step 2: Fold the carry back into dst */
+++		"  add %%rax, %%r8;"
+++		"  adcx %%rcx, %%r9;"
+++		"  movq %%r9, 40(%0);"
+++		"  adcx %%rcx, %%r10;"
+++		"  movq %%r10, 48(%0);"
+++		"  adcx %%rcx, %%r11;"
+++		"  movq %%r11, 56(%0);"
+++
+++		/* Step 3: Fold the carry bit back in; guaranteed not to carry at this point */
+++		"  mov $0, %%rax;"
+++		"  cmovc %%rdx, %%rax;"
+++		"  add %%rax, %%r8;"
+++		"  movq %%r8, 32(%0);"
+++	: "+&r" (tmp), "+&r" (f), "+&r" (out)
+++	:
+++	: "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", "memory", "cc"
++ 	);
++ }
++ 
++-static void curve25519_adx(u8 shared[CURVE25519_KEY_SIZE],
++-			   const u8 private_key[CURVE25519_KEY_SIZE],
++-			   const u8 session_key[CURVE25519_KEY_SIZE])
++-{
++-	struct {
++-		u64 buffer[4 * NUM_WORDS_ELTFP25519];
++-		u64 coordinates[4 * NUM_WORDS_ELTFP25519];
++-		u64 workspace[6 * NUM_WORDS_ELTFP25519];
++-		u8 session[CURVE25519_KEY_SIZE];
++-		u8 private[CURVE25519_KEY_SIZE];
++-	} __aligned(32) m;
++-
++-	int i = 0, j = 0;
++-	u64 prev = 0;
++-	u64 *const X1 = (u64 *)m.session;
++-	u64 *const key = (u64 *)m.private;
++-	u64 *const Px = m.coordinates + 0;
++-	u64 *const Pz = m.coordinates + 4;
++-	u64 *const Qx = m.coordinates + 8;
++-	u64 *const Qz = m.coordinates + 12;
++-	u64 *const X2 = Qx;
++-	u64 *const Z2 = Qz;
++-	u64 *const X3 = Px;
++-	u64 *const Z3 = Pz;
++-	u64 *const X2Z2 = Qx;
++-	u64 *const X3Z3 = Px;
++-
++-	u64 *const A = m.workspace + 0;
++-	u64 *const B = m.workspace + 4;
++-	u64 *const D = m.workspace + 8;
++-	u64 *const C = m.workspace + 12;
++-	u64 *const DA = m.workspace + 16;
++-	u64 *const CB = m.workspace + 20;
++-	u64 *const AB = A;
++-	u64 *const DC = D;
++-	u64 *const DACB = DA;
++-
++-	memcpy(m.private, private_key, sizeof(m.private));
++-	memcpy(m.session, session_key, sizeof(m.session));
++-
++-	curve25519_clamp_secret(m.private);
++-
++-	/* As in the draft:
++-	 * When receiving such an array, implementations of curve25519
++-	 * MUST mask the most-significant bit in the final byte. This
++-	 * is done to preserve compatibility with point formats which
++-	 * reserve the sign bit for use in other protocols and to
++-	 * increase resistance to implementation fingerprinting
++-	 */
++-	m.session[CURVE25519_KEY_SIZE - 1] &= (1 << (255 % 8)) - 1;
++-
++-	copy_eltfp25519_1w(Px, X1);
++-	setzero_eltfp25519_1w(Pz);
++-	setzero_eltfp25519_1w(Qx);
++-	setzero_eltfp25519_1w(Qz);
++-
++-	Pz[0] = 1;
++-	Qx[0] = 1;
++-
++-	/* main-loop */
++-	prev = 0;
++-	j = 62;
++-	for (i = 3; i >= 0; --i) {
++-		while (j >= 0) {
++-			u64 bit = (key[i] >> j) & 0x1;
++-			u64 swap = bit ^ prev;
++-			prev = bit;
++-
++-			add_eltfp25519_1w_adx(A, X2, Z2);	/* A = (X2+Z2) */
++-			sub_eltfp25519_1w(B, X2, Z2);		/* B = (X2-Z2) */
++-			add_eltfp25519_1w_adx(C, X3, Z3);	/* C = (X3+Z3) */
++-			sub_eltfp25519_1w(D, X3, Z3);		/* D = (X3-Z3) */
++-			mul_eltfp25519_2w_adx(DACB, AB, DC);	/* [DA|CB] = [A|B]*[D|C] */
++-
++-			cselect(swap, A, C);
++-			cselect(swap, B, D);
++-
++-			sqr_eltfp25519_2w_adx(AB);		/* [AA|BB] = [A^2|B^2] */
++-			add_eltfp25519_1w_adx(X3, DA, CB);	/* X3 = (DA+CB) */
++-			sub_eltfp25519_1w(Z3, DA, CB);		/* Z3 = (DA-CB) */
++-			sqr_eltfp25519_2w_adx(X3Z3);		/* [X3|Z3] = [(DA+CB)|(DA+CB)]^2 */
++-
++-			copy_eltfp25519_1w(X2, B);		/* X2 = B^2 */
++-			sub_eltfp25519_1w(Z2, A, B);		/* Z2 = E = AA-BB */
++-
++-			mul_a24_eltfp25519_1w(B, Z2);		/* B = a24*E */
++-			add_eltfp25519_1w_adx(B, B, X2);	/* B = a24*E+B */
++-			mul_eltfp25519_2w_adx(X2Z2, X2Z2, AB);	/* [X2|Z2] = [B|E]*[A|a24*E+B] */
++-			mul_eltfp25519_1w_adx(Z3, Z3, X1);	/* Z3 = Z3*X1 */
++-			--j;
++-		}
++-		j = 63;
++-	}
++-
++-	inv_eltfp25519_1w_adx(A, Qz);
++-	mul_eltfp25519_1w_adx((u64 *)shared, Qx, A);
++-	fred_eltfp25519_1w((u64 *)shared);
++-
++-	memzero_explicit(&m, sizeof(m));
++-}
++-
++-static void curve25519_adx_base(u8 session_key[CURVE25519_KEY_SIZE],
++-				const u8 private_key[CURVE25519_KEY_SIZE])
+++static void point_add_and_double(u64 *q, u64 *p01_tmp1, u64 *tmp2)
++ {
++-	struct {
++-		u64 buffer[4 * NUM_WORDS_ELTFP25519];
++-		u64 coordinates[4 * NUM_WORDS_ELTFP25519];
++-		u64 workspace[4 * NUM_WORDS_ELTFP25519];
++-		u8 private[CURVE25519_KEY_SIZE];
++-	} __aligned(32) m;
++-
++-	const int ite[4] = { 64, 64, 64, 63 };
++-	const int q = 3;
++-	u64 swap = 1;
++-
++-	int i = 0, j = 0, k = 0;
++-	u64 *const key = (u64 *)m.private;
++-	u64 *const Ur1 = m.coordinates + 0;
++-	u64 *const Zr1 = m.coordinates + 4;
++-	u64 *const Ur2 = m.coordinates + 8;
++-	u64 *const Zr2 = m.coordinates + 12;
++-
++-	u64 *const UZr1 = m.coordinates + 0;
++-	u64 *const ZUr2 = m.coordinates + 8;
++-
++-	u64 *const A = m.workspace + 0;
++-	u64 *const B = m.workspace + 4;
++-	u64 *const C = m.workspace + 8;
++-	u64 *const D = m.workspace + 12;
++-
++-	u64 *const AB = m.workspace + 0;
++-	u64 *const CD = m.workspace + 8;
++-
++-	const u64 *const P = table_ladder_8k;
++-
++-	memcpy(m.private, private_key, sizeof(m.private));
++-
++-	curve25519_clamp_secret(m.private);
++-
++-	setzero_eltfp25519_1w(Ur1);
++-	setzero_eltfp25519_1w(Zr1);
++-	setzero_eltfp25519_1w(Zr2);
++-	Ur1[0] = 1;
++-	Zr1[0] = 1;
++-	Zr2[0] = 1;
++-
++-	/* G-S */
++-	Ur2[3] = 0x1eaecdeee27cab34UL;
++-	Ur2[2] = 0xadc7a0b9235d48e2UL;
++-	Ur2[1] = 0xbbf095ae14b2edf8UL;
++-	Ur2[0] = 0x7e94e1fec82faabdUL;
++-
++-	/* main-loop */
++-	j = q;
++-	for (i = 0; i < NUM_WORDS_ELTFP25519; ++i) {
++-		while (j < ite[i]) {
++-			u64 bit = (key[i] >> j) & 0x1;
++-			k = (64 * i + j - q);
++-			swap = swap ^ bit;
++-			cswap(swap, Ur1, Ur2);
++-			cswap(swap, Zr1, Zr2);
++-			swap = bit;
++-			/* Addition */
++-			sub_eltfp25519_1w(B, Ur1, Zr1);		/* B = Ur1-Zr1 */
++-			add_eltfp25519_1w_adx(A, Ur1, Zr1);	/* A = Ur1+Zr1 */
++-			mul_eltfp25519_1w_adx(C, &P[4 * k], B);	/* C = M0-B */
++-			sub_eltfp25519_1w(B, A, C);		/* B = (Ur1+Zr1) - M*(Ur1-Zr1) */
++-			add_eltfp25519_1w_adx(A, A, C);		/* A = (Ur1+Zr1) + M*(Ur1-Zr1) */
++-			sqr_eltfp25519_2w_adx(AB);		/* A = A^2      |  B = B^2 */
++-			mul_eltfp25519_2w_adx(UZr1, ZUr2, AB);	/* Ur1 = Zr2*A  |  Zr1 = Ur2*B */
++-			++j;
+++	u64 *nq = p01_tmp1;
+++	u64 *nq_p1 = p01_tmp1 + (u32)8U;
+++	u64 *tmp1 = p01_tmp1 + (u32)16U;
+++	u64 *x1 = q;
+++	u64 *x2 = nq;
+++	u64 *z2 = nq + (u32)4U;
+++	u64 *z3 = nq_p1 + (u32)4U;
+++	u64 *a = tmp1;
+++	u64 *b = tmp1 + (u32)4U;
+++	u64 *ab = tmp1;
+++	u64 *dc = tmp1 + (u32)8U;
+++	u64 *x3;
+++	u64 *z31;
+++	u64 *d0;
+++	u64 *c0;
+++	u64 *a1;
+++	u64 *b1;
+++	u64 *d;
+++	u64 *c;
+++	u64 *ab1;
+++	u64 *dc1;
+++	fadd(a, x2, z2);
+++	fsub(b, x2, z2);
+++	x3 = nq_p1;
+++	z31 = nq_p1 + (u32)4U;
+++	d0 = dc;
+++	c0 = dc + (u32)4U;
+++	fadd(c0, x3, z31);
+++	fsub(d0, x3, z31);
+++	fmul2(dc, dc, ab, tmp2);
+++	fadd(x3, d0, c0);
+++	fsub(z31, d0, c0);
+++	a1 = tmp1;
+++	b1 = tmp1 + (u32)4U;
+++	d = tmp1 + (u32)8U;
+++	c = tmp1 + (u32)12U;
+++	ab1 = tmp1;
+++	dc1 = tmp1 + (u32)8U;
+++	fsqr2(dc1, ab1, tmp2);
+++	fsqr2(nq_p1, nq_p1, tmp2);
+++	a1[0U] = c[0U];
+++	a1[1U] = c[1U];
+++	a1[2U] = c[2U];
+++	a1[3U] = c[3U];
+++	fsub(c, d, c);
+++	fmul_scalar(b1, c, (u64)121665U);
+++	fadd(b1, b1, d);
+++	fmul2(nq, dc1, ab1, tmp2);
+++	fmul(z3, z3, x1, tmp2);
+++}
+++
+++static void point_double(u64 *nq, u64 *tmp1, u64 *tmp2)
+++{
+++	u64 *x2 = nq;
+++	u64 *z2 = nq + (u32)4U;
+++	u64 *a = tmp1;
+++	u64 *b = tmp1 + (u32)4U;
+++	u64 *d = tmp1 + (u32)8U;
+++	u64 *c = tmp1 + (u32)12U;
+++	u64 *ab = tmp1;
+++	u64 *dc = tmp1 + (u32)8U;
+++	fadd(a, x2, z2);
+++	fsub(b, x2, z2);
+++	fsqr2(dc, ab, tmp2);
+++	a[0U] = c[0U];
+++	a[1U] = c[1U];
+++	a[2U] = c[2U];
+++	a[3U] = c[3U];
+++	fsub(c, d, c);
+++	fmul_scalar(b, c, (u64)121665U);
+++	fadd(b, b, d);
+++	fmul2(nq, dc, ab, tmp2);
+++}
+++
+++static void montgomery_ladder(u64 *out, const u8 *key, u64 *init1)
+++{
+++	u64 tmp2[16U] = { 0U };
+++	u64 p01_tmp1_swap[33U] = { 0U };
+++	u64 *p0 = p01_tmp1_swap;
+++	u64 *p01 = p01_tmp1_swap;
+++	u64 *p03 = p01;
+++	u64 *p11 = p01 + (u32)8U;
+++	u64 *x0;
+++	u64 *z0;
+++	u64 *p01_tmp1;
+++	u64 *p01_tmp11;
+++	u64 *nq10;
+++	u64 *nq_p11;
+++	u64 *swap1;
+++	u64 sw0;
+++	u64 *nq1;
+++	u64 *tmp1;
+++	memcpy(p11, init1, (u32)8U * sizeof(init1[0U]));
+++	x0 = p03;
+++	z0 = p03 + (u32)4U;
+++	x0[0U] = (u64)1U;
+++	x0[1U] = (u64)0U;
+++	x0[2U] = (u64)0U;
+++	x0[3U] = (u64)0U;
+++	z0[0U] = (u64)0U;
+++	z0[1U] = (u64)0U;
+++	z0[2U] = (u64)0U;
+++	z0[3U] = (u64)0U;
+++	p01_tmp1 = p01_tmp1_swap;
+++	p01_tmp11 = p01_tmp1_swap;
+++	nq10 = p01_tmp1_swap;
+++	nq_p11 = p01_tmp1_swap + (u32)8U;
+++	swap1 = p01_tmp1_swap + (u32)32U;
+++	cswap2((u64)1U, nq10, nq_p11);
+++	point_add_and_double(init1, p01_tmp11, tmp2);
+++	swap1[0U] = (u64)1U;
+++	{
+++		u32 i;
+++		for (i = (u32)0U; i < (u32)251U; i = i + (u32)1U) {
+++			u64 *p01_tmp12 = p01_tmp1_swap;
+++			u64 *swap2 = p01_tmp1_swap + (u32)32U;
+++			u64 *nq2 = p01_tmp12;
+++			u64 *nq_p12 = p01_tmp12 + (u32)8U;
+++			u64 bit = (u64)(key[((u32)253U - i) / (u32)8U] >> ((u32)253U - i) % (u32)8U & (u8)1U);
+++			u64 sw = swap2[0U] ^ bit;
+++			cswap2(sw, nq2, nq_p12);
+++			point_add_and_double(init1, p01_tmp12, tmp2);
+++			swap2[0U] = bit;
++ 		}
++-		j = 0;
++ 	}
++-
++-	/* Doubling */
++-	for (i = 0; i < q; ++i) {
++-		add_eltfp25519_1w_adx(A, Ur1, Zr1);	/*  A = Ur1+Zr1 */
++-		sub_eltfp25519_1w(B, Ur1, Zr1);		/*  B = Ur1-Zr1 */
++-		sqr_eltfp25519_2w_adx(AB);		/*  A = A**2     B = B**2 */
++-		copy_eltfp25519_1w(C, B);		/*  C = B */
++-		sub_eltfp25519_1w(B, A, B);		/*  B = A-B */
++-		mul_a24_eltfp25519_1w(D, B);		/*  D = my_a24*B */
++-		add_eltfp25519_1w_adx(D, D, C);		/*  D = D+C */
++-		mul_eltfp25519_2w_adx(UZr1, AB, CD);	/*  Ur1 = A*B   Zr1 = Zr1*A */
++-	}
++-
++-	/* Convert to affine coordinates */
++-	inv_eltfp25519_1w_adx(A, Zr1);
++-	mul_eltfp25519_1w_adx((u64 *)session_key, Ur1, A);
++-	fred_eltfp25519_1w((u64 *)session_key);
++-
++-	memzero_explicit(&m, sizeof(m));
++-}
++-
++-static void curve25519_bmi2(u8 shared[CURVE25519_KEY_SIZE],
++-			    const u8 private_key[CURVE25519_KEY_SIZE],
++-			    const u8 session_key[CURVE25519_KEY_SIZE])
++-{
++-	struct {
++-		u64 buffer[4 * NUM_WORDS_ELTFP25519];
++-		u64 coordinates[4 * NUM_WORDS_ELTFP25519];
++-		u64 workspace[6 * NUM_WORDS_ELTFP25519];
++-		u8 session[CURVE25519_KEY_SIZE];
++-		u8 private[CURVE25519_KEY_SIZE];
++-	} __aligned(32) m;
++-
++-	int i = 0, j = 0;
++-	u64 prev = 0;
++-	u64 *const X1 = (u64 *)m.session;
++-	u64 *const key = (u64 *)m.private;
++-	u64 *const Px = m.coordinates + 0;
++-	u64 *const Pz = m.coordinates + 4;
++-	u64 *const Qx = m.coordinates + 8;
++-	u64 *const Qz = m.coordinates + 12;
++-	u64 *const X2 = Qx;
++-	u64 *const Z2 = Qz;
++-	u64 *const X3 = Px;
++-	u64 *const Z3 = Pz;
++-	u64 *const X2Z2 = Qx;
++-	u64 *const X3Z3 = Px;
++-
++-	u64 *const A = m.workspace + 0;
++-	u64 *const B = m.workspace + 4;
++-	u64 *const D = m.workspace + 8;
++-	u64 *const C = m.workspace + 12;
++-	u64 *const DA = m.workspace + 16;
++-	u64 *const CB = m.workspace + 20;
++-	u64 *const AB = A;
++-	u64 *const DC = D;
++-	u64 *const DACB = DA;
++-
++-	memcpy(m.private, private_key, sizeof(m.private));
++-	memcpy(m.session, session_key, sizeof(m.session));
++-
++-	curve25519_clamp_secret(m.private);
++-
++-	/* As in the draft:
++-	 * When receiving such an array, implementations of curve25519
++-	 * MUST mask the most-significant bit in the final byte. This
++-	 * is done to preserve compatibility with point formats which
++-	 * reserve the sign bit for use in other protocols and to
++-	 * increase resistance to implementation fingerprinting
++-	 */
++-	m.session[CURVE25519_KEY_SIZE - 1] &= (1 << (255 % 8)) - 1;
++-
++-	copy_eltfp25519_1w(Px, X1);
++-	setzero_eltfp25519_1w(Pz);
++-	setzero_eltfp25519_1w(Qx);
++-	setzero_eltfp25519_1w(Qz);
++-
++-	Pz[0] = 1;
++-	Qx[0] = 1;
++-
++-	/* main-loop */
++-	prev = 0;
++-	j = 62;
++-	for (i = 3; i >= 0; --i) {
++-		while (j >= 0) {
++-			u64 bit = (key[i] >> j) & 0x1;
++-			u64 swap = bit ^ prev;
++-			prev = bit;
++-
++-			add_eltfp25519_1w_bmi2(A, X2, Z2);	/* A = (X2+Z2) */
++-			sub_eltfp25519_1w(B, X2, Z2);		/* B = (X2-Z2) */
++-			add_eltfp25519_1w_bmi2(C, X3, Z3);	/* C = (X3+Z3) */
++-			sub_eltfp25519_1w(D, X3, Z3);		/* D = (X3-Z3) */
++-			mul_eltfp25519_2w_bmi2(DACB, AB, DC);	/* [DA|CB] = [A|B]*[D|C] */
++-
++-			cselect(swap, A, C);
++-			cselect(swap, B, D);
++-
++-			sqr_eltfp25519_2w_bmi2(AB);		/* [AA|BB] = [A^2|B^2] */
++-			add_eltfp25519_1w_bmi2(X3, DA, CB);	/* X3 = (DA+CB) */
++-			sub_eltfp25519_1w(Z3, DA, CB);		/* Z3 = (DA-CB) */
++-			sqr_eltfp25519_2w_bmi2(X3Z3);		/* [X3|Z3] = [(DA+CB)|(DA+CB)]^2 */
++-
++-			copy_eltfp25519_1w(X2, B);		/* X2 = B^2 */
++-			sub_eltfp25519_1w(Z2, A, B);		/* Z2 = E = AA-BB */
++-
++-			mul_a24_eltfp25519_1w(B, Z2);		/* B = a24*E */
++-			add_eltfp25519_1w_bmi2(B, B, X2);	/* B = a24*E+B */
++-			mul_eltfp25519_2w_bmi2(X2Z2, X2Z2, AB);	/* [X2|Z2] = [B|E]*[A|a24*E+B] */
++-			mul_eltfp25519_1w_bmi2(Z3, Z3, X1);	/* Z3 = Z3*X1 */
++-			--j;
+++	sw0 = swap1[0U];
+++	cswap2(sw0, nq10, nq_p11);
+++	nq1 = p01_tmp1;
+++	tmp1 = p01_tmp1 + (u32)16U;
+++	point_double(nq1, tmp1, tmp2);
+++	point_double(nq1, tmp1, tmp2);
+++	point_double(nq1, tmp1, tmp2);
+++	memcpy(out, p0, (u32)8U * sizeof(p0[0U]));
+++
+++	memzero_explicit(tmp2, sizeof(tmp2));
+++	memzero_explicit(p01_tmp1_swap, sizeof(p01_tmp1_swap));
+++}
+++
+++static void fsquare_times(u64 *o, const u64 *inp, u64 *tmp, u32 n1)
+++{
+++	u32 i;
+++	fsqr(o, inp, tmp);
+++	for (i = (u32)0U; i < n1 - (u32)1U; i = i + (u32)1U)
+++		fsqr(o, o, tmp);
+++}
+++
+++static void finv(u64 *o, const u64 *i, u64 *tmp)
+++{
+++	u64 t1[16U] = { 0U };
+++	u64 *a0 = t1;
+++	u64 *b = t1 + (u32)4U;
+++	u64 *c = t1 + (u32)8U;
+++	u64 *t00 = t1 + (u32)12U;
+++	u64 *tmp1 = tmp;
+++	u64 *a;
+++	u64 *t0;
+++	fsquare_times(a0, i, tmp1, (u32)1U);
+++	fsquare_times(t00, a0, tmp1, (u32)2U);
+++	fmul(b, t00, i, tmp);
+++	fmul(a0, b, a0, tmp);
+++	fsquare_times(t00, a0, tmp1, (u32)1U);
+++	fmul(b, t00, b, tmp);
+++	fsquare_times(t00, b, tmp1, (u32)5U);
+++	fmul(b, t00, b, tmp);
+++	fsquare_times(t00, b, tmp1, (u32)10U);
+++	fmul(c, t00, b, tmp);
+++	fsquare_times(t00, c, tmp1, (u32)20U);
+++	fmul(t00, t00, c, tmp);
+++	fsquare_times(t00, t00, tmp1, (u32)10U);
+++	fmul(b, t00, b, tmp);
+++	fsquare_times(t00, b, tmp1, (u32)50U);
+++	fmul(c, t00, b, tmp);
+++	fsquare_times(t00, c, tmp1, (u32)100U);
+++	fmul(t00, t00, c, tmp);
+++	fsquare_times(t00, t00, tmp1, (u32)50U);
+++	fmul(t00, t00, b, tmp);
+++	fsquare_times(t00, t00, tmp1, (u32)5U);
+++	a = t1;
+++	t0 = t1 + (u32)12U;
+++	fmul(o, t0, a, tmp);
+++}
+++
+++static void store_felem(u64 *b, u64 *f)
+++{
+++	u64 f30 = f[3U];
+++	u64 top_bit0 = f30 >> (u32)63U;
+++	u64 carry0;
+++	u64 f31;
+++	u64 top_bit;
+++	u64 carry;
+++	u64 f0;
+++	u64 f1;
+++	u64 f2;
+++	u64 f3;
+++	u64 m0;
+++	u64 m1;
+++	u64 m2;
+++	u64 m3;
+++	u64 mask;
+++	u64 f0_;
+++	u64 f1_;
+++	u64 f2_;
+++	u64 f3_;
+++	u64 o0;
+++	u64 o1;
+++	u64 o2;
+++	u64 o3;
+++	f[3U] = f30 & (u64)0x7fffffffffffffffU;
+++	carry0 = add_scalar(f, f, (u64)19U * top_bit0);
+++	f31 = f[3U];
+++	top_bit = f31 >> (u32)63U;
+++	f[3U] = f31 & (u64)0x7fffffffffffffffU;
+++	carry = add_scalar(f, f, (u64)19U * top_bit);
+++	f0 = f[0U];
+++	f1 = f[1U];
+++	f2 = f[2U];
+++	f3 = f[3U];
+++	m0 = gte_mask(f0, (u64)0xffffffffffffffedU);
+++	m1 = eq_mask(f1, (u64)0xffffffffffffffffU);
+++	m2 = eq_mask(f2, (u64)0xffffffffffffffffU);
+++	m3 = eq_mask(f3, (u64)0x7fffffffffffffffU);
+++	mask = ((m0 & m1) & m2) & m3;
+++	f0_ = f0 - (mask & (u64)0xffffffffffffffedU);
+++	f1_ = f1 - (mask & (u64)0xffffffffffffffffU);
+++	f2_ = f2 - (mask & (u64)0xffffffffffffffffU);
+++	f3_ = f3 - (mask & (u64)0x7fffffffffffffffU);
+++	o0 = f0_;
+++	o1 = f1_;
+++	o2 = f2_;
+++	o3 = f3_;
+++	b[0U] = o0;
+++	b[1U] = o1;
+++	b[2U] = o2;
+++	b[3U] = o3;
+++}
+++
+++static void encode_point(u8 *o, const u64 *i)
+++{
+++	const u64 *x = i;
+++	const u64 *z = i + (u32)4U;
+++	u64 tmp[4U] = { 0U };
+++	u64 tmp_w[16U] = { 0U };
+++	finv(tmp, z, tmp_w);
+++	fmul(tmp, tmp, x, tmp_w);
+++	store_felem((u64 *)o, tmp);
+++}
+++
+++static void curve25519_ever64(u8 *out, const u8 *priv, const u8 *pub)
+++{
+++	u64 init1[8U] = { 0U };
+++	u64 tmp[4U] = { 0U };
+++	u64 tmp3;
+++	u64 *x;
+++	u64 *z;
+++	{
+++		u32 i;
+++		for (i = (u32)0U; i < (u32)4U; i = i + (u32)1U) {
+++			u64 *os = tmp;
+++			const u8 *bj = pub + i * (u32)8U;
+++			u64 u = *(u64 *)bj;
+++			u64 r = u;
+++			u64 x0 = r;
+++			os[i] = x0;
++ 		}
++-		j = 63;
++ 	}
+++	tmp3 = tmp[3U];
+++	tmp[3U] = tmp3 & (u64)0x7fffffffffffffffU;
+++	x = init1;
+++	z = init1 + (u32)4U;
+++	z[0U] = (u64)1U;
+++	z[1U] = (u64)0U;
+++	z[2U] = (u64)0U;
+++	z[3U] = (u64)0U;
+++	x[0U] = tmp[0U];
+++	x[1U] = tmp[1U];
+++	x[2U] = tmp[2U];
+++	x[3U] = tmp[3U];
+++	montgomery_ladder(init1, priv, init1);
+++	encode_point(out, init1);
+++}
+++
+++/* The below constants were generated using this sage script:
+++ *
+++ * #!/usr/bin/env sage
+++ * import sys
+++ * from sage.all import *
+++ * def limbs(n):
+++ * 	n = int(n)
+++ * 	l = ((n >> 0) % 2^64, (n >> 64) % 2^64, (n >> 128) % 2^64, (n >> 192) % 2^64)
+++ * 	return "0x%016xULL, 0x%016xULL, 0x%016xULL, 0x%016xULL" % l
+++ * ec = EllipticCurve(GF(2^255 - 19), [0, 486662, 0, 1, 0])
+++ * p_minus_s = (ec.lift_x(9) - ec.lift_x(1))[0]
+++ * print("static const u64 p_minus_s[] = { %s };\n" % limbs(p_minus_s))
+++ * print("static const u64 table_ladder[] = {")
+++ * p = ec.lift_x(9)
+++ * for i in range(252):
+++ * 	l = (p[0] + p[2]) / (p[0] - p[2])
+++ * 	print(("\t%s" + ("," if i != 251 else "")) % limbs(l))
+++ * 	p = p * 2
+++ * print("};")
+++ *
+++ */
++ 
++-	inv_eltfp25519_1w_bmi2(A, Qz);
++-	mul_eltfp25519_1w_bmi2((u64 *)shared, Qx, A);
++-	fred_eltfp25519_1w((u64 *)shared);
+++static const u64 p_minus_s[] = { 0x816b1e0137d48290ULL, 0x440f6a51eb4d1207ULL, 0x52385f46dca2b71dULL, 0x215132111d8354cbULL };
++ 
++-	memzero_explicit(&m, sizeof(m));
++-}
+++static const u64 table_ladder[] = {
+++	0xfffffffffffffff3ULL, 0xffffffffffffffffULL, 0xffffffffffffffffULL, 0x5fffffffffffffffULL,
+++	0x6b8220f416aafe96ULL, 0x82ebeb2b4f566a34ULL, 0xd5a9a5b075a5950fULL, 0x5142b2cf4b2488f4ULL,
+++	0x6aaebc750069680cULL, 0x89cf7820a0f99c41ULL, 0x2a58d9183b56d0f4ULL, 0x4b5aca80e36011a4ULL,
+++	0x329132348c29745dULL, 0xf4a2e616e1642fd7ULL, 0x1e45bb03ff67bc34ULL, 0x306912d0f42a9b4aULL,
+++	0xff886507e6af7154ULL, 0x04f50e13dfeec82fULL, 0xaa512fe82abab5ceULL, 0x174e251a68d5f222ULL,
+++	0xcf96700d82028898ULL, 0x1743e3370a2c02c5ULL, 0x379eec98b4e86eaaULL, 0x0c59888a51e0482eULL,
+++	0xfbcbf1d699b5d189ULL, 0xacaef0d58e9fdc84ULL, 0xc1c20d06231f7614ULL, 0x2938218da274f972ULL,
+++	0xf6af49beff1d7f18ULL, 0xcc541c22387ac9c2ULL, 0x96fcc9ef4015c56bULL, 0x69c1627c690913a9ULL,
+++	0x7a86fd2f4733db0eULL, 0xfdb8c4f29e087de9ULL, 0x095e4b1a8ea2a229ULL, 0x1ad7a7c829b37a79ULL,
+++	0x342d89cad17ea0c0ULL, 0x67bedda6cced2051ULL, 0x19ca31bf2bb42f74ULL, 0x3df7b4c84980acbbULL,
+++	0xa8c6444dc80ad883ULL, 0xb91e440366e3ab85ULL, 0xc215cda00164f6d8ULL, 0x3d867c6ef247e668ULL,
+++	0xc7dd582bcc3e658cULL, 0xfd2c4748ee0e5528ULL, 0xa0fd9b95cc9f4f71ULL, 0x7529d871b0675ddfULL,
+++	0xb8f568b42d3cbd78ULL, 0x1233011b91f3da82ULL, 0x2dce6ccd4a7c3b62ULL, 0x75e7fc8e9e498603ULL,
+++	0x2f4f13f1fcd0b6ecULL, 0xf1a8ca1f29ff7a45ULL, 0xc249c1a72981e29bULL, 0x6ebe0dbb8c83b56aULL,
+++	0x7114fa8d170bb222ULL, 0x65a2dcd5bf93935fULL, 0xbdc41f68b59c979aULL, 0x2f0eef79a2ce9289ULL,
+++	0x42ecbf0c083c37ceULL, 0x2930bc09ec496322ULL, 0xf294b0c19cfeac0dULL, 0x3780aa4bedfabb80ULL,
+++	0x56c17d3e7cead929ULL, 0xe7cb4beb2e5722c5ULL, 0x0ce931732dbfe15aULL, 0x41b883c7621052f8ULL,
+++	0xdbf75ca0c3d25350ULL, 0x2936be086eb1e351ULL, 0xc936e03cb4a9b212ULL, 0x1d45bf82322225aaULL,
+++	0xe81ab1036a024cc5ULL, 0xe212201c304c9a72ULL, 0xc5d73fba6832b1fcULL, 0x20ffdb5a4d839581ULL,
+++	0xa283d367be5d0fadULL, 0x6c2b25ca8b164475ULL, 0x9d4935467caaf22eULL, 0x5166408eee85ff49ULL,
+++	0x3c67baa2fab4e361ULL, 0xb3e433c67ef35cefULL, 0x5259729241159b1cULL, 0x6a621892d5b0ab33ULL,
+++	0x20b74a387555cdcbULL, 0x532aa10e1208923fULL, 0xeaa17b7762281dd1ULL, 0x61ab3443f05c44bfULL,
+++	0x257a6c422324def8ULL, 0x131c6c1017e3cf7fULL, 0x23758739f630a257ULL, 0x295a407a01a78580ULL,
+++	0xf8c443246d5da8d9ULL, 0x19d775450c52fa5dULL, 0x2afcfc92731bf83dULL, 0x7d10c8e81b2b4700ULL,
+++	0xc8e0271f70baa20bULL, 0x993748867ca63957ULL, 0x5412efb3cb7ed4bbULL, 0x3196d36173e62975ULL,
+++	0xde5bcad141c7dffcULL, 0x47cc8cd2b395c848ULL, 0xa34cd942e11af3cbULL, 0x0256dbf2d04ecec2ULL,
+++	0x875ab7e94b0e667fULL, 0xcad4dd83c0850d10ULL, 0x47f12e8f4e72c79fULL, 0x5f1a87bb8c85b19bULL,
+++	0x7ae9d0b6437f51b8ULL, 0x12c7ce5518879065ULL, 0x2ade09fe5cf77aeeULL, 0x23a05a2f7d2c5627ULL,
+++	0x5908e128f17c169aULL, 0xf77498dd8ad0852dULL, 0x74b4c4ceab102f64ULL, 0x183abadd10139845ULL,
+++	0xb165ba8daa92aaacULL, 0xd5c5ef9599386705ULL, 0xbe2f8f0cf8fc40d1ULL, 0x2701e635ee204514ULL,
+++	0x629fa80020156514ULL, 0xf223868764a8c1ceULL, 0x5b894fff0b3f060eULL, 0x60d9944cf708a3faULL,
+++	0xaeea001a1c7a201fULL, 0xebf16a633ee2ce63ULL, 0x6f7709594c7a07e1ULL, 0x79b958150d0208cbULL,
+++	0x24b55e5301d410e7ULL, 0xe3a34edff3fdc84dULL, 0xd88768e4904032d8ULL, 0x131384427b3aaeecULL,
+++	0x8405e51286234f14ULL, 0x14dc4739adb4c529ULL, 0xb8a2b5b250634ffdULL, 0x2fe2a94ad8a7ff93ULL,
+++	0xec5c57efe843faddULL, 0x2843ce40f0bb9918ULL, 0xa4b561d6cf3d6305ULL, 0x743629bde8fb777eULL,
+++	0x343edd46bbaf738fULL, 0xed981828b101a651ULL, 0xa401760b882c797aULL, 0x1fc223e28dc88730ULL,
+++	0x48604e91fc0fba0eULL, 0xb637f78f052c6fa4ULL, 0x91ccac3d09e9239cULL, 0x23f7eed4437a687cULL,
+++	0x5173b1118d9bd800ULL, 0x29d641b63189d4a7ULL, 0xfdbf177988bbc586ULL, 0x2959894fcad81df5ULL,
+++	0xaebc8ef3b4bbc899ULL, 0x4148995ab26992b9ULL, 0x24e20b0134f92cfbULL, 0x40d158894a05dee8ULL,
+++	0x46b00b1185af76f6ULL, 0x26bac77873187a79ULL, 0x3dc0bf95ab8fff5fULL, 0x2a608bd8945524d7ULL,
+++	0x26449588bd446302ULL, 0x7c4bc21c0388439cULL, 0x8e98a4f383bd11b2ULL, 0x26218d7bc9d876b9ULL,
+++	0xe3081542997c178aULL, 0x3c2d29a86fb6606fULL, 0x5c217736fa279374ULL, 0x7dde05734afeb1faULL,
+++	0x3bf10e3906d42babULL, 0xe4f7803e1980649cULL, 0xe6053bf89595bf7aULL, 0x394faf38da245530ULL,
+++	0x7a8efb58896928f4ULL, 0xfbc778e9cc6a113cULL, 0x72670ce330af596fULL, 0x48f222a81d3d6cf7ULL,
+++	0xf01fce410d72caa7ULL, 0x5a20ecc7213b5595ULL, 0x7bc21165c1fa1483ULL, 0x07f89ae31da8a741ULL,
+++	0x05d2c2b4c6830ff9ULL, 0xd43e330fc6316293ULL, 0xa5a5590a96d3a904ULL, 0x705edb91a65333b6ULL,
+++	0x048ee15e0bb9a5f7ULL, 0x3240cfca9e0aaf5dULL, 0x8f4b71ceedc4a40bULL, 0x621c0da3de544a6dULL,
+++	0x92872836a08c4091ULL, 0xce8375b010c91445ULL, 0x8a72eb524f276394ULL, 0x2667fcfa7ec83635ULL,
+++	0x7f4c173345e8752aULL, 0x061b47feee7079a5ULL, 0x25dd9afa9f86ff34ULL, 0x3780cef5425dc89cULL,
+++	0x1a46035a513bb4e9ULL, 0x3e1ef379ac575adaULL, 0xc78c5f1c5fa24b50ULL, 0x321a967634fd9f22ULL,
+++	0x946707b8826e27faULL, 0x3dca84d64c506fd0ULL, 0xc189218075e91436ULL, 0x6d9284169b3b8484ULL,
+++	0x3a67e840383f2ddfULL, 0x33eec9a30c4f9b75ULL, 0x3ec7c86fa783ef47ULL, 0x26ec449fbac9fbc4ULL,
+++	0x5c0f38cba09b9e7dULL, 0x81168cc762a3478cULL, 0x3e23b0d306fc121cULL, 0x5a238aa0a5efdcddULL,
+++	0x1ba26121c4ea43ffULL, 0x36f8c77f7c8832b5ULL, 0x88fbea0b0adcf99aULL, 0x5ca9938ec25bebf9ULL,
+++	0xd5436a5e51fccda0ULL, 0x1dbc4797c2cd893bULL, 0x19346a65d3224a08ULL, 0x0f5034e49b9af466ULL,
+++	0xf23c3967a1e0b96eULL, 0xe58b08fa867a4d88ULL, 0xfb2fabc6a7341679ULL, 0x2a75381eb6026946ULL,
+++	0xc80a3be4c19420acULL, 0x66b1f6c681f2b6dcULL, 0x7cf7036761e93388ULL, 0x25abbbd8a660a4c4ULL,
+++	0x91ea12ba14fd5198ULL, 0x684950fc4a3cffa9ULL, 0xf826842130f5ad28ULL, 0x3ea988f75301a441ULL,
+++	0xc978109a695f8c6fULL, 0x1746eb4a0530c3f3ULL, 0x444d6d77b4459995ULL, 0x75952b8c054e5cc7ULL,
+++	0xa3703f7915f4d6aaULL, 0x66c346202f2647d8ULL, 0xd01469df811d644bULL, 0x77fea47d81a5d71fULL,
+++	0xc5e9529ef57ca381ULL, 0x6eeeb4b9ce2f881aULL, 0xb6e91a28e8009bd6ULL, 0x4b80be3e9afc3fecULL,
+++	0x7e3773c526aed2c5ULL, 0x1b4afcb453c9a49dULL, 0xa920bdd7baffb24dULL, 0x7c54699f122d400eULL,
+++	0xef46c8e14fa94bc8ULL, 0xe0b074ce2952ed5eULL, 0xbea450e1dbd885d5ULL, 0x61b68649320f712cULL,
+++	0x8a485f7309ccbdd1ULL, 0xbd06320d7d4d1a2dULL, 0x25232973322dbef4ULL, 0x445dc4758c17f770ULL,
+++	0xdb0434177cc8933cULL, 0xed6fe82175ea059fULL, 0x1efebefdc053db34ULL, 0x4adbe867c65daf99ULL,
+++	0x3acd71a2a90609dfULL, 0xe5e991856dd04050ULL, 0x1ec69b688157c23cULL, 0x697427f6885cfe4dULL,
+++	0xd7be7b9b65e1a851ULL, 0xa03d28d522c536ddULL, 0x28399d658fd2b645ULL, 0x49e5b7e17c2641e1ULL,
+++	0x6f8c3a98700457a4ULL, 0x5078f0a25ebb6778ULL, 0xd13c3ccbc382960fULL, 0x2e003258a7df84b1ULL,
+++	0x8ad1f39be6296a1cULL, 0xc1eeaa652a5fbfb2ULL, 0x33ee0673fd26f3cbULL, 0x59256173a69d2cccULL,
+++	0x41ea07aa4e18fc41ULL, 0xd9fc19527c87a51eULL, 0xbdaacb805831ca6fULL, 0x445b652dc916694fULL,
+++	0xce92a3a7f2172315ULL, 0x1edc282de11b9964ULL, 0xa1823aafe04c314aULL, 0x790a2d94437cf586ULL,
+++	0x71c447fb93f6e009ULL, 0x8922a56722845276ULL, 0xbf70903b204f5169ULL, 0x2f7a89891ba319feULL,
+++	0x02a08eb577e2140cULL, 0xed9a4ed4427bdcf4ULL, 0x5253ec44e4323cd1ULL, 0x3e88363c14e9355bULL,
+++	0xaa66c14277110b8cULL, 0x1ae0391610a23390ULL, 0x2030bd12c93fc2a2ULL, 0x3ee141579555c7abULL,
+++	0x9214de3a6d6e7d41ULL, 0x3ccdd88607f17efeULL, 0x674f1288f8e11217ULL, 0x5682250f329f93d0ULL,
+++	0x6cf00b136d2e396eULL, 0x6e4cf86f1014debfULL, 0x5930b1b5bfcc4e83ULL, 0x047069b48aba16b6ULL,
+++	0x0d4ce4ab69b20793ULL, 0xb24db91a97d0fb9eULL, 0xcdfa50f54e00d01dULL, 0x221b1085368bddb5ULL,
+++	0xe7e59468b1e3d8d2ULL, 0x53c56563bd122f93ULL, 0xeee8a903e0663f09ULL, 0x61efa662cbbe3d42ULL,
+++	0x2cf8ddddde6eab2aULL, 0x9bf80ad51435f231ULL, 0x5deadacec9f04973ULL, 0x29275b5d41d29b27ULL,
+++	0xcfde0f0895ebf14fULL, 0xb9aab96b054905a7ULL, 0xcae80dd9a1c420fdULL, 0x0a63bf2f1673bbc7ULL,
+++	0x092f6e11958fbc8cULL, 0x672a81e804822fadULL, 0xcac8351560d52517ULL, 0x6f3f7722c8f192f8ULL,
+++	0xf8ba90ccc2e894b7ULL, 0x2c7557a438ff9f0dULL, 0x894d1d855ae52359ULL, 0x68e122157b743d69ULL,
+++	0xd87e5570cfb919f3ULL, 0x3f2cdecd95798db9ULL, 0x2121154710c0a2ceULL, 0x3c66a115246dc5b2ULL,
+++	0xcbedc562294ecb72ULL, 0xba7143c36a280b16ULL, 0x9610c2efd4078b67ULL, 0x6144735d946a4b1eULL,
+++	0x536f111ed75b3350ULL, 0x0211db8c2041d81bULL, 0xf93cb1000e10413cULL, 0x149dfd3c039e8876ULL,
+++	0xd479dde46b63155bULL, 0xb66e15e93c837976ULL, 0xdafde43b1f13e038ULL, 0x5fafda1a2e4b0b35ULL,
+++	0x3600bbdf17197581ULL, 0x3972050bbe3cd2c2ULL, 0x5938906dbdd5be86ULL, 0x34fce5e43f9b860fULL,
+++	0x75a8a4cd42d14d02ULL, 0x828dabc53441df65ULL, 0x33dcabedd2e131d3ULL, 0x3ebad76fb814d25fULL,
+++	0xd4906f566f70e10fULL, 0x5d12f7aa51690f5aULL, 0x45adb16e76cefcf2ULL, 0x01f768aead232999ULL,
+++	0x2b6cc77b6248febdULL, 0x3cd30628ec3aaffdULL, 0xce1c0b80d4ef486aULL, 0x4c3bff2ea6f66c23ULL,
+++	0x3f2ec4094aeaeb5fULL, 0x61b19b286e372ca7ULL, 0x5eefa966de2a701dULL, 0x23b20565de55e3efULL,
+++	0xe301ca5279d58557ULL, 0x07b2d4ce27c2874fULL, 0xa532cd8a9dcf1d67ULL, 0x2a52fee23f2bff56ULL,
+++	0x8624efb37cd8663dULL, 0xbbc7ac20ffbd7594ULL, 0x57b85e9c82d37445ULL, 0x7b3052cb86a6ec66ULL,
+++	0x3482f0ad2525e91eULL, 0x2cb68043d28edca0ULL, 0xaf4f6d052e1b003aULL, 0x185f8c2529781b0aULL,
+++	0xaa41de5bd80ce0d6ULL, 0x9407b2416853e9d6ULL, 0x563ec36e357f4c3aULL, 0x4cc4b8dd0e297bceULL,
+++	0xa2fc1a52ffb8730eULL, 0x1811f16e67058e37ULL, 0x10f9a366cddf4ee1ULL, 0x72f4a0c4a0b9f099ULL,
+++	0x8c16c06f663f4ea7ULL, 0x693b3af74e970fbaULL, 0x2102e7f1d69ec345ULL, 0x0ba53cbc968a8089ULL,
+++	0xca3d9dc7fea15537ULL, 0x4c6824bb51536493ULL, 0xb9886314844006b1ULL, 0x40d2a72ab454cc60ULL,
+++	0x5936a1b712570975ULL, 0x91b9d648debda657ULL, 0x3344094bb64330eaULL, 0x006ba10d12ee51d0ULL,
+++	0x19228468f5de5d58ULL, 0x0eb12f4c38cc05b0ULL, 0xa1039f9dd5601990ULL, 0x4502d4ce4fff0e0bULL,
+++	0xeb2054106837c189ULL, 0xd0f6544c6dd3b93cULL, 0x40727064c416d74fULL, 0x6e15c6114b502ef0ULL,
+++	0x4df2a398cfb1a76bULL, 0x11256c7419f2f6b1ULL, 0x4a497962066e6043ULL, 0x705b3aab41355b44ULL,
+++	0x365ef536d797b1d8ULL, 0x00076bd622ddf0dbULL, 0x3bbf33b0e0575a88ULL, 0x3777aa05c8e4ca4dULL,
+++	0x392745c85578db5fULL, 0x6fda4149dbae5ae2ULL, 0xb1f0b00b8adc9867ULL, 0x09963437d36f1da3ULL,
+++	0x7e824e90a5dc3853ULL, 0xccb5f6641f135cbdULL, 0x6736d86c87ce8fccULL, 0x625f3ce26604249fULL,
+++	0xaf8ac8059502f63fULL, 0x0c05e70a2e351469ULL, 0x35292e9c764b6305ULL, 0x1a394360c7e23ac3ULL,
+++	0xd5c6d53251183264ULL, 0x62065abd43c2b74fULL, 0xb5fbf5d03b973f9bULL, 0x13a3da3661206e5eULL,
+++	0xc6bd5837725d94e5ULL, 0x18e30912205016c5ULL, 0x2088ce1570033c68ULL, 0x7fba1f495c837987ULL,
+++	0x5a8c7423f2f9079dULL, 0x1735157b34023fc5ULL, 0xe4f9b49ad2fab351ULL, 0x6691ff72c878e33cULL,
+++	0x122c2adedc5eff3eULL, 0xf8dd4bf1d8956cf4ULL, 0xeb86205d9e9e5bdaULL, 0x049b92b9d975c743ULL,
+++	0xa5379730b0f6c05aULL, 0x72a0ffacc6f3a553ULL, 0xb0032c34b20dcd6dULL, 0x470e9dbc88d5164aULL,
+++	0xb19cf10ca237c047ULL, 0xb65466711f6c81a2ULL, 0xb3321bd16dd80b43ULL, 0x48c14f600c5fbe8eULL,
+++	0x66451c264aa6c803ULL, 0xb66e3904a4fa7da6ULL, 0xd45f19b0b3128395ULL, 0x31602627c3c9bc10ULL,
+++	0x3120dc4832e4e10dULL, 0xeb20c46756c717f7ULL, 0x00f52e3f67280294ULL, 0x566d4fc14730c509ULL,
+++	0x7e3a5d40fd837206ULL, 0xc1e926dc7159547aULL, 0x216730fba68d6095ULL, 0x22e8c3843f69cea7ULL,
+++	0x33d074e8930e4b2bULL, 0xb6e4350e84d15816ULL, 0x5534c26ad6ba2365ULL, 0x7773c12f89f1f3f3ULL,
+++	0x8cba404da57962aaULL, 0x5b9897a81999ce56ULL, 0x508e862f121692fcULL, 0x3a81907fa093c291ULL,
+++	0x0dded0ff4725a510ULL, 0x10d8cc10673fc503ULL, 0x5b9d151c9f1f4e89ULL, 0x32a5c1d5cb09a44cULL,
+++	0x1e0aa442b90541fbULL, 0x5f85eb7cc1b485dbULL, 0xbee595ce8a9df2e5ULL, 0x25e496c722422236ULL,
+++	0x5edf3c46cd0fe5b9ULL, 0x34e75a7ed2a43388ULL, 0xe488de11d761e352ULL, 0x0e878a01a085545cULL,
+++	0xba493c77e021bb04ULL, 0x2b4d1843c7df899aULL, 0x9ea37a487ae80d67ULL, 0x67a9958011e41794ULL,
+++	0x4b58051a6697b065ULL, 0x47e33f7d8d6ba6d4ULL, 0xbb4da8d483ca46c1ULL, 0x68becaa181c2db0dULL,
+++	0x8d8980e90b989aa5ULL, 0xf95eb14a2c93c99bULL, 0x51c6c7c4796e73a2ULL, 0x6e228363b5efb569ULL,
+++	0xc6bbc0b02dd624c8ULL, 0x777eb47dec8170eeULL, 0x3cde15a004cfafa9ULL, 0x1dc6bc087160bf9bULL,
+++	0x2e07e043eec34002ULL, 0x18e9fc677a68dc7fULL, 0xd8da03188bd15b9aULL, 0x48fbc3bb00568253ULL,
+++	0x57547d4cfb654ce1ULL, 0xd3565b82a058e2adULL, 0xf63eaf0bbf154478ULL, 0x47531ef114dfbb18ULL,
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+++	0x90f567aac578dcf0ULL, 0xef1e9b0ef2a3133bULL, 0x0eebba9242d9de71ULL, 0x15473c9bf03101c7ULL,
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+++	0x0b7d6c390c2ded4cULL, 0x56cb3281df04cb1fULL, 0x66305a1249ecc3c7ULL, 0x5d588b60a38ca72aULL,
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+++	0xfc5eeb614adc9011ULL, 0x5229419ae8c411ebULL, 0x9ec3e7787d1dcf74ULL, 0x340d053e216e4cb5ULL,
+++	0xcac7af39b48df2b4ULL, 0xc0faec2871a10a94ULL, 0x140a69245ca575edULL, 0x0cf1c37134273a4cULL,
+++	0xc8ee306ac224b8a5ULL, 0x57eaee7ccb4930b0ULL, 0xa1e806bdaacbe74fULL, 0x7d9a62742eeb657dULL,
+++	0x9eb6b6ef546c4830ULL, 0x885cca1fddb36e2eULL, 0xe6b9f383ef0d7105ULL, 0x58654fef9d2e0412ULL,
+++	0xa905c4ffbe0e8e26ULL, 0x942de5df9b31816eULL, 0x497d723f802e88e1ULL, 0x30684dea602f408dULL,
+++	0x21e5a278a3e6cb34ULL, 0xaefb6e6f5b151dc4ULL, 0xb30b8e049d77ca15ULL, 0x28c3c9cf53b98981ULL,
+++	0x287fb721556cdd2aULL, 0x0d317ca897022274ULL, 0x7468c7423a543258ULL, 0x4a7f11464eb5642fULL,
+++	0xa237a4774d193aa6ULL, 0xd865986ea92129a1ULL, 0x24c515ecf87c1a88ULL, 0x604003575f39f5ebULL,
+++	0x47b9f189570a9b27ULL, 0x2b98cede465e4b78ULL, 0x026df551dbb85c20ULL, 0x74fcd91047e21901ULL,
+++	0x13e2a90a23c1bfa3ULL, 0x0cb0074e478519f6ULL, 0x5ff1cbbe3af6cf44ULL, 0x67fe5438be812dbeULL,
+++	0xd13cf64fa40f05b0ULL, 0x054dfb2f32283787ULL, 0x4173915b7f0d2aeaULL, 0x482f144f1f610d4eULL,
+++	0xf6210201b47f8234ULL, 0x5d0ae1929e70b990ULL, 0xdcd7f455b049567cULL, 0x7e93d0f1f0916f01ULL,
+++	0xdd79cbf18a7db4faULL, 0xbe8391bf6f74c62fULL, 0x027145d14b8291bdULL, 0x585a73ea2cbf1705ULL,
+++	0x485ca03e928a0db2ULL, 0x10fc01a5742857e7ULL, 0x2f482edbd6d551a7ULL, 0x0f0433b5048fdb8aULL,
+++	0x60da2e8dd7dc6247ULL, 0x88b4c9d38cd4819aULL, 0x13033ac001f66697ULL, 0x273b24fe3b367d75ULL,
+++	0xc6e8f66a31b3b9d4ULL, 0x281514a494df49d5ULL, 0xd1726fdfc8b23da7ULL, 0x4b3ae7d103dee548ULL,
+++	0xc6256e19ce4b9d7eULL, 0xff5c5cf186e3c61cULL, 0xacc63ca34b8ec145ULL, 0x74621888fee66574ULL,
+++	0x956f409645290a1eULL, 0xef0bf8e3263a962eULL, 0xed6a50eb5ec2647bULL, 0x0694283a9dca7502ULL,
+++	0x769b963643a2dcd1ULL, 0x42b7c8ea09fc5353ULL, 0x4f002aee13397eabULL, 0x63005e2c19b7d63aULL,
+++	0xca6736da63023beaULL, 0x966c7f6db12a99b7ULL, 0xace09390c537c5e1ULL, 0x0b696063a1aa89eeULL,
+++	0xebb03e97288c56e5ULL, 0x432a9f9f938c8be8ULL, 0xa6a5a93d5b717f71ULL, 0x1a5fb4c3e18f9d97ULL,
+++	0x1c94e7ad1c60cdceULL, 0xee202a43fc02c4a0ULL, 0x8dafe4d867c46a20ULL, 0x0a10263c8ac27b58ULL,
+++	0xd0dea9dfe4432a4aULL, 0x856af87bbe9277c5ULL, 0xce8472acc212c71aULL, 0x6f151b6d9bbb1e91ULL,
+++	0x26776c527ceed56aULL, 0x7d211cb7fbf8faecULL, 0x37ae66a6fd4609ccULL, 0x1f81b702d2770c42ULL,
+++	0x2fb0b057eac58392ULL, 0xe1dd89fe29744e9dULL, 0xc964f8eb17beb4f8ULL, 0x29571073c9a2d41eULL,
+++	0xa948a18981c0e254ULL, 0x2df6369b65b22830ULL, 0xa33eb2d75fcfd3c6ULL, 0x078cd6ec4199a01fULL,
+++	0x4a584a41ad900d2fULL, 0x32142b78e2c74c52ULL, 0x68c4e8338431c978ULL, 0x7f69ea9008689fc2ULL,
+++	0x52f2c81e46a38265ULL, 0xfd78072d04a832fdULL, 0x8cd7d5fa25359e94ULL, 0x4de71b7454cc29d2ULL,
+++	0x42eb60ad1eda6ac9ULL, 0x0aad37dfdbc09c3aULL, 0x81004b71e33cc191ULL, 0x44e6be345122803cULL,
+++	0x03fe8388ba1920dbULL, 0xf5d57c32150db008ULL, 0x49c8c4281af60c29ULL, 0x21edb518de701aeeULL,
+++	0x7fb63e418f06dc99ULL, 0xa4460d99c166d7b8ULL, 0x24dd5248ce520a83ULL, 0x5ec3ad712b928358ULL,
+++	0x15022a5fbd17930fULL, 0xa4f64a77d82570e3ULL, 0x12bc8d6915783712ULL, 0x498194c0fc620abbULL,
+++	0x38a2d9d255686c82ULL, 0x785c6bd9193e21f0ULL, 0xe4d5c81ab24a5484ULL, 0x56307860b2e20989ULL,
+++	0x429d55f78b4d74c4ULL, 0x22f1834643350131ULL, 0x1e60c24598c71fffULL, 0x59f2f014979983efULL,
+++	0x46a47d56eb494a44ULL, 0x3e22a854d636a18eULL, 0xb346e15274491c3bULL, 0x2ceafd4e5390cde7ULL,
+++	0xba8a8538be0d6675ULL, 0x4b9074bb50818e23ULL, 0xcbdab89085d304c3ULL, 0x61a24fe0e56192c4ULL,
+++	0xcb7615e6db525bcbULL, 0xdd7d8c35a567e4caULL, 0xe6b4153acafcdd69ULL, 0x2d668e097f3c9766ULL,
+++	0xa57e7e265ce55ef0ULL, 0x5d9f4e527cd4b967ULL, 0xfbc83606492fd1e5ULL, 0x090d52beb7c3f7aeULL,
+++	0x09b9515a1e7b4d7cULL, 0x1f266a2599da44c0ULL, 0xa1c49548e2c55504ULL, 0x7ef04287126f15ccULL,
+++	0xfed1659dbd30ef15ULL, 0x8b4ab9eec4e0277bULL, 0x884d6236a5df3291ULL, 0x1fd96ea6bf5cf788ULL,
+++	0x42a161981f190d9aULL, 0x61d849507e6052c1ULL, 0x9fe113bf285a2cd5ULL, 0x7c22d676dbad85d8ULL,
+++	0x82e770ed2bfbd27dULL, 0x4c05b2ece996f5a5ULL, 0xcd40a9c2b0900150ULL, 0x5895319213d9bf64ULL,
+++	0xe7cc5d703fea2e08ULL, 0xb50c491258e2188cULL, 0xcce30baa48205bf0ULL, 0x537c659ccfa32d62ULL,
+++	0x37b6623a98cfc088ULL, 0xfe9bed1fa4d6aca4ULL, 0x04d29b8e56a8d1b0ULL, 0x725f71c40b519575ULL,
+++	0x28c7f89cd0339ce6ULL, 0x8367b14469ddc18bULL, 0x883ada83a6a1652cULL, 0x585f1974034d6c17ULL,
+++	0x89cfb266f1b19188ULL, 0xe63b4863e7c35217ULL, 0xd88c9da6b4c0526aULL, 0x3e035c9df0954635ULL,
+++	0xdd9d5412fb45de9dULL, 0xdd684532e4cff40dULL, 0x4b5c999b151d671cULL, 0x2d8c2cc811e7f690ULL,
+++	0x7f54be1d90055d40ULL, 0xa464c5df464aaf40ULL, 0x33979624f0e917beULL, 0x2c018dc527356b30ULL,
+++	0xa5415024e330b3d4ULL, 0x73ff3d96691652d3ULL, 0x94ec42c4ef9b59f1ULL, 0x0747201618d08e5aULL,
+++	0x4d6ca48aca411c53ULL, 0x66415f2fcfa66119ULL, 0x9c4dd40051e227ffULL, 0x59810bc09a02f7ebULL,
+++	0x2a7eb171b3dc101dULL, 0x441c5ab99ffef68eULL, 0x32025c9b93b359eaULL, 0x5e8ce0a71e9d112fULL,
+++	0xbfcccb92429503fdULL, 0xd271ba752f095d55ULL, 0x345ead5e972d091eULL, 0x18c8df11a83103baULL,
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+++	0xa3b46966eeaefd23ULL, 0x0c4f1f0be39ecdcaULL, 0x189dc8c9d683a51dULL, 0x51f27f054c09351bULL,
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+++	0xb114c11819d1801cULL, 0x2016e4d84f3f5ec7ULL, 0xdd0e2df409260f4cULL, 0x5ec362c0ae5f7266ULL,
+++	0xc0462b18b8b2b4eeULL, 0x7cc8d950274d1afbULL, 0xf25f7105436b02d2ULL, 0x43bbf8dcbff9ccd3ULL,
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+++	0x047ba3ea330721c9ULL, 0x83423fc20e7e1ea0ULL, 0x1df4c0af01314a60ULL, 0x09a62dab89289527ULL,
+++	0xa5b325a49cc6cb00ULL, 0xe94b5dc654b56cb6ULL, 0x3be28779adc994a0ULL, 0x4296e8f8ba3a4aadULL,
+++	0x328689761e451eabULL, 0x2e4d598bff59594aULL, 0x49b96853d7a7084aULL, 0x4980a319601420a8ULL,
+++	0x9565b9e12f552c42ULL, 0x8a5318db7100fe96ULL, 0x05c90b4d43add0d7ULL, 0x538b4cd66a5d4edaULL,
+++	0xf4e94fc3e89f039fULL, 0x592c9af26f618045ULL, 0x08a36eb5fd4b9550ULL, 0x25fffaf6c2ed1419ULL,
+++	0x34434459cc79d354ULL, 0xeeecbfb4b1d5476bULL, 0xddeb34a061615d99ULL, 0x5129cecceb64b773ULL,
+++	0xee43215894993520ULL, 0x772f9c7cf14c0b3bULL, 0xd2e2fce306bedad5ULL, 0x715f42b546f06a97ULL,
+++	0x434ecdceda5b5f1aULL, 0x0da17115a49741a9ULL, 0x680bd77c73edad2eULL, 0x487c02354edd9041ULL,
+++	0xb8efeff3a70ed9c4ULL, 0x56a32aa3e857e302ULL, 0xdf3a68bd48a2a5a0ULL, 0x07f650b73176c444ULL,
+++	0xe38b9b1626e0ccb1ULL, 0x79e053c18b09fb36ULL, 0x56d90319c9f94964ULL, 0x1ca941e7ac9ff5c4ULL,
+++	0x49c4df29162fa0bbULL, 0x8488cf3282b33305ULL, 0x95dfda14cabb437dULL, 0x3391f78264d5ad86ULL,
+++	0x729ae06ae2b5095dULL, 0xd58a58d73259a946ULL, 0xe9834262d13921edULL, 0x27fedafaa54bb592ULL,
+++	0xa99dc5b829ad48bbULL, 0x5f025742499ee260ULL, 0x802c8ecd5d7513fdULL, 0x78ceb3ef3f6dd938ULL,
+++	0xc342f44f8a135d94ULL, 0x7b9edb44828cdda3ULL, 0x9436d11a0537cfe7ULL, 0x5064b164ec1ab4c8ULL,
+++	0x7020eccfd37eb2fcULL, 0x1f31ea3ed90d25fcULL, 0x1b930d7bdfa1bb34ULL, 0x5344467a48113044ULL,
+++	0x70073170f25e6dfbULL, 0xe385dc1a50114cc8ULL, 0x2348698ac8fc4f00ULL, 0x2a77a55284dd40d8ULL,
+++	0xfe06afe0c98c6ce4ULL, 0xc235df96dddfd6e4ULL, 0x1428d01e33bf1ed3ULL, 0x785768ec9300bdafULL,
+++	0x9702e57a91deb63bULL, 0x61bdb8bfe5ce8b80ULL, 0x645b426f3d1d58acULL, 0x4804a82227a557bcULL,
+++	0x8e57048ab44d2601ULL, 0x68d6501a4b3a6935ULL, 0xc39c9ec3f9e1c293ULL, 0x4172f257d4de63e2ULL,
+++	0xd368b450330c6401ULL, 0x040d3017418f2391ULL, 0x2c34bb6090b7d90dULL, 0x16f649228fdfd51fULL,
+++	0xbea6818e2b928ef5ULL, 0xe28ccf91cdc11e72ULL, 0x594aaa68e77a36cdULL, 0x313034806c7ffd0fULL,
+++	0x8a9d27ac2249bd65ULL, 0x19a3b464018e9512ULL, 0xc26ccff352b37ec7ULL, 0x056f68341d797b21ULL,
+++	0x5e79d6757efd2327ULL, 0xfabdbcb6553afe15ULL, 0xd3e7222c6eaf5a60ULL, 0x7046c76d4dae743bULL,
+++	0x660be872b18d4a55ULL, 0x19992518574e1496ULL, 0xc103053a302bdcbbULL, 0x3ed8e9800b218e8eULL,
+++	0x7b0b9239fa75e03eULL, 0xefe9fb684633c083ULL, 0x98a35fbe391a7793ULL, 0x6065510fe2d0fe34ULL,
+++	0x55cb668548abad0cULL, 0xb4584548da87e527ULL, 0x2c43ecea0107c1ddULL, 0x526028809372de35ULL,
+++	0x3415c56af9213b1fULL, 0x5bee1a4d017e98dbULL, 0x13f6b105b5cf709bULL, 0x5ff20e3482b29ab6ULL,
+++	0x0aa29c75cc2e6c90ULL, 0xfc7d73ca3a70e206ULL, 0x899fc38fc4b5c515ULL, 0x250386b124ffc207ULL,
+++	0x54ea28d5ae3d2b56ULL, 0x9913149dd6de60ceULL, 0x16694fc58f06d6c1ULL, 0x46b23975eb018fc7ULL,
+++	0x470a6a0fb4b7b4e2ULL, 0x5d92475a8f7253deULL, 0xabeee5b52fbd3adbULL, 0x7fa20801a0806968ULL,
+++	0x76f3faf19f7714d2ULL, 0xb3e840c12f4660c3ULL, 0x0fb4cd8df212744eULL, 0x4b065a251d3a2dd2ULL,
+++	0x5cebde383d77cd4aULL, 0x6adf39df882c9cb1ULL, 0xa2dd242eb09af759ULL, 0x3147c0e50e5f6422ULL,
+++	0x164ca5101d1350dbULL, 0xf8d13479c33fc962ULL, 0xe640ce4d13e5da08ULL, 0x4bdee0c45061f8baULL,
+++	0xd7c46dc1a4edb1c9ULL, 0x5514d7b6437fd98aULL, 0x58942f6bb2a1c00bULL, 0x2dffb2ab1d70710eULL,
+++	0xccdfcf2fc18b6d68ULL, 0xa8ebcba8b7806167ULL, 0x980697f95e2937e3ULL, 0x02fbba1cd0126e8cULL
+++};
++ 
++-static void curve25519_bmi2_base(u8 session_key[CURVE25519_KEY_SIZE],
++-				 const u8 private_key[CURVE25519_KEY_SIZE])
+++static void curve25519_ever64_base(u8 *out, const u8 *priv)
++ {
++-	struct {
++-		u64 buffer[4 * NUM_WORDS_ELTFP25519];
++-		u64 coordinates[4 * NUM_WORDS_ELTFP25519];
++-		u64 workspace[4 * NUM_WORDS_ELTFP25519];
++-		u8 private[CURVE25519_KEY_SIZE];
++-	} __aligned(32) m;
++-
++-	const int ite[4] = { 64, 64, 64, 63 };
++-	const int q = 3;
++ 	u64 swap = 1;
++-
++-	int i = 0, j = 0, k = 0;
++-	u64 *const key = (u64 *)m.private;
++-	u64 *const Ur1 = m.coordinates + 0;
++-	u64 *const Zr1 = m.coordinates + 4;
++-	u64 *const Ur2 = m.coordinates + 8;
++-	u64 *const Zr2 = m.coordinates + 12;
++-
++-	u64 *const UZr1 = m.coordinates + 0;
++-	u64 *const ZUr2 = m.coordinates + 8;
++-
++-	u64 *const A = m.workspace + 0;
++-	u64 *const B = m.workspace + 4;
++-	u64 *const C = m.workspace + 8;
++-	u64 *const D = m.workspace + 12;
++-
++-	u64 *const AB = m.workspace + 0;
++-	u64 *const CD = m.workspace + 8;
++-
++-	const u64 *const P = table_ladder_8k;
++-
++-	memcpy(m.private, private_key, sizeof(m.private));
++-
++-	curve25519_clamp_secret(m.private);
++-
++-	setzero_eltfp25519_1w(Ur1);
++-	setzero_eltfp25519_1w(Zr1);
++-	setzero_eltfp25519_1w(Zr2);
++-	Ur1[0] = 1;
++-	Zr1[0] = 1;
++-	Zr2[0] = 1;
++-
++-	/* G-S */
++-	Ur2[3] = 0x1eaecdeee27cab34UL;
++-	Ur2[2] = 0xadc7a0b9235d48e2UL;
++-	Ur2[1] = 0xbbf095ae14b2edf8UL;
++-	Ur2[0] = 0x7e94e1fec82faabdUL;
++-
++-	/* main-loop */
++-	j = q;
++-	for (i = 0; i < NUM_WORDS_ELTFP25519; ++i) {
++-		while (j < ite[i]) {
++-			u64 bit = (key[i] >> j) & 0x1;
++-			k = (64 * i + j - q);
+++	int i, j, k;
+++	u64 tmp[16 + 32 + 4];
+++	u64 *x1 = &tmp[0];
+++	u64 *z1 = &tmp[4];
+++	u64 *x2 = &tmp[8];
+++	u64 *z2 = &tmp[12];
+++	u64 *xz1 = &tmp[0];
+++	u64 *xz2 = &tmp[8];
+++	u64 *a = &tmp[0 + 16];
+++	u64 *b = &tmp[4 + 16];
+++	u64 *c = &tmp[8 + 16];
+++	u64 *ab = &tmp[0 + 16];
+++	u64 *abcd = &tmp[0 + 16];
+++	u64 *ef = &tmp[16 + 16];
+++	u64 *efgh = &tmp[16 + 16];
+++	u64 *key = &tmp[0 + 16 + 32];
+++
+++	memcpy(key, priv, 32);
+++	((u8 *)key)[0] &= 248;
+++	((u8 *)key)[31] = (((u8 *)key)[31] & 127) | 64;
+++
+++	x1[0] = 1, x1[1] = x1[2] = x1[3] = 0;
+++	z1[0] = 1, z1[1] = z1[2] = z1[3] = 0;
+++	z2[0] = 1, z2[1] = z2[2] = z2[3] = 0;
+++	memcpy(x2, p_minus_s, sizeof(p_minus_s));
+++
+++	j = 3;
+++	for (i = 0; i < 4; ++i) {
+++		while (j < (const int[]){ 64, 64, 64, 63 }[i]) {
+++			u64 bit = (key[i] >> j) & 1;
+++			k = (64 * i + j - 3);
++ 			swap = swap ^ bit;
++-			cswap(swap, Ur1, Ur2);
++-			cswap(swap, Zr1, Zr2);
+++			cswap2(swap, xz1, xz2);
++ 			swap = bit;
++-			/* Addition */
++-			sub_eltfp25519_1w(B, Ur1, Zr1);		/* B = Ur1-Zr1 */
++-			add_eltfp25519_1w_bmi2(A, Ur1, Zr1);	/* A = Ur1+Zr1 */
++-			mul_eltfp25519_1w_bmi2(C, &P[4 * k], B);/* C = M0-B */
++-			sub_eltfp25519_1w(B, A, C);		/* B = (Ur1+Zr1) - M*(Ur1-Zr1) */
++-			add_eltfp25519_1w_bmi2(A, A, C);	/* A = (Ur1+Zr1) + M*(Ur1-Zr1) */
++-			sqr_eltfp25519_2w_bmi2(AB);		/* A = A^2      |  B = B^2 */
++-			mul_eltfp25519_2w_bmi2(UZr1, ZUr2, AB);	/* Ur1 = Zr2*A  |  Zr1 = Ur2*B */
+++			fsub(b, x1, z1);
+++			fadd(a, x1, z1);
+++			fmul(c, &table_ladder[4 * k], b, ef);
+++			fsub(b, a, c);
+++			fadd(a, a, c);
+++			fsqr2(ab, ab, efgh);
+++			fmul2(xz1, xz2, ab, efgh);
++ 			++j;
++ 		}
++ 		j = 0;
++ 	}
++ 
++-	/* Doubling */
++-	for (i = 0; i < q; ++i) {
++-		add_eltfp25519_1w_bmi2(A, Ur1, Zr1);	/*  A = Ur1+Zr1 */
++-		sub_eltfp25519_1w(B, Ur1, Zr1);		/*  B = Ur1-Zr1 */
++-		sqr_eltfp25519_2w_bmi2(AB);		/*  A = A**2     B = B**2 */
++-		copy_eltfp25519_1w(C, B);		/*  C = B */
++-		sub_eltfp25519_1w(B, A, B);		/*  B = A-B */
++-		mul_a24_eltfp25519_1w(D, B);		/*  D = my_a24*B */
++-		add_eltfp25519_1w_bmi2(D, D, C);	/*  D = D+C */
++-		mul_eltfp25519_2w_bmi2(UZr1, AB, CD);	/*  Ur1 = A*B   Zr1 = Zr1*A */
++-	}
++-
++-	/* Convert to affine coordinates */
++-	inv_eltfp25519_1w_bmi2(A, Zr1);
++-	mul_eltfp25519_1w_bmi2((u64 *)session_key, Ur1, A);
++-	fred_eltfp25519_1w((u64 *)session_key);
+++	point_double(xz1, abcd, efgh);
+++	point_double(xz1, abcd, efgh);
+++	point_double(xz1, abcd, efgh);
+++	encode_point(out, xz1);
++ 
++-	memzero_explicit(&m, sizeof(m));
+++	memzero_explicit(tmp, sizeof(tmp));
++ }
++ 
+++static __ro_after_init DEFINE_STATIC_KEY_FALSE(curve25519_use_bmi2_adx);
+++
++ void curve25519_arch(u8 mypublic[CURVE25519_KEY_SIZE],
++ 		     const u8 secret[CURVE25519_KEY_SIZE],
++ 		     const u8 basepoint[CURVE25519_KEY_SIZE])
++ {
++-	if (static_branch_likely(&curve25519_use_adx))
++-		curve25519_adx(mypublic, secret, basepoint);
++-	else if (static_branch_likely(&curve25519_use_bmi2))
++-		curve25519_bmi2(mypublic, secret, basepoint);
+++	if (static_branch_likely(&curve25519_use_bmi2_adx))
+++		curve25519_ever64(mypublic, secret, basepoint);
++ 	else
++ 		curve25519_generic(mypublic, secret, basepoint);
++ }
++@@ -2355,10 +1395,8 @@ EXPORT_SYMBOL(curve25519_arch);
++ void curve25519_base_arch(u8 pub[CURVE25519_KEY_SIZE],
++ 			  const u8 secret[CURVE25519_KEY_SIZE])
++ {
++-	if (static_branch_likely(&curve25519_use_adx))
++-		curve25519_adx_base(pub, secret);
++-	else if (static_branch_likely(&curve25519_use_bmi2))
++-		curve25519_bmi2_base(pub, secret);
+++	if (static_branch_likely(&curve25519_use_bmi2_adx))
+++		curve25519_ever64_base(pub, secret);
++ 	else
++ 		curve25519_generic(pub, secret, curve25519_base_point);
++ }
++@@ -2449,12 +1487,11 @@ static struct kpp_alg curve25519_alg = {
++ 	.max_size		= curve25519_max_size,
++ };
++ 
+++
++ static int __init curve25519_mod_init(void)
++ {
++-	if (boot_cpu_has(X86_FEATURE_BMI2))
++-		static_branch_enable(&curve25519_use_bmi2);
++-	else if (boot_cpu_has(X86_FEATURE_ADX))
++-		static_branch_enable(&curve25519_use_adx);
+++	if (boot_cpu_has(X86_FEATURE_BMI2) && boot_cpu_has(X86_FEATURE_ADX))
+++		static_branch_enable(&curve25519_use_bmi2_adx);
++ 	else
++ 		return 0;
++ 	return IS_REACHABLE(CONFIG_CRYPTO_KPP) ?
++@@ -2474,3 +1511,4 @@ module_exit(curve25519_mod_exit);
++ MODULE_ALIAS_CRYPTO("curve25519");
++ MODULE_ALIAS_CRYPTO("curve25519-x86");
++ MODULE_LICENSE("GPL v2");
+++MODULE_AUTHOR("Jason A. Donenfeld <Jason@zx2c4.com>");
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0055-crypto-x86-curve25519-leave-r12-as-spare-register.patch b/target/linux/generic/backport-5.4/080-wireguard-0055-crypto-x86-curve25519-leave-r12-as-spare-register.patch
+new file mode 100644
+index 0000000000..d5b11e0d36
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0055-crypto-x86-curve25519-leave-r12-as-spare-register.patch
+@@ -0,0 +1,376 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Sun, 1 Mar 2020 16:06:56 +0800
++Subject: [PATCH] crypto: x86/curve25519 - leave r12 as spare register
++
++commit dc7fc3a53ae158263196b1892b672aedf67796c5 upstream.
++
++This updates to the newer register selection proved by HACL*, which
++leads to a more compact instruction encoding, and saves around 100
++cycles.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/curve25519-x86_64.c | 110 ++++++++++++++--------------
++ 1 file changed, 55 insertions(+), 55 deletions(-)
++
++--- a/arch/x86/crypto/curve25519-x86_64.c
+++++ b/arch/x86/crypto/curve25519-x86_64.c
++@@ -167,28 +167,28 @@ static inline void fmul(u64 *out, const
++ 		"  movq 0(%1), %%rdx;"
++ 		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  movq %%r8, 0(%0);"
++ 		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  movq %%r10, 8(%0);"
++-		"  mulxq 16(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"
+++		"  mulxq 16(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"
++ 		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"
++ 		/* Compute src1[1] * src2 */
++ 		"  movq 8(%1), %%rdx;"
++ 		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  adcxq 8(%0), %%r8;"    "  movq %%r8, 8(%0);"
++-		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 16(%0);"
++-		"  mulxq 16(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  mov $0, %%r8;"
+++		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 16(%0);"
+++		"  mulxq 16(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  mov $0, %%r8;"
++ 		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
++ 		/* Compute src1[2] * src2 */
++ 		"  movq 16(%1), %%rdx;"
++ 		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 16(%0), %%r8;"    "  movq %%r8, 16(%0);"
++-		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 24(%0);"
++-		"  mulxq 16(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  mov $0, %%r8;"
+++		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 24(%0);"
+++		"  mulxq 16(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  mov $0, %%r8;"
++ 		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
++ 		/* Compute src1[3] * src2 */
++ 		"  movq 24(%1), %%rdx;"
++ 		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 24(%0), %%r8;"    "  movq %%r8, 24(%0);"
++-		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 32(%0);"
++-		"  mulxq 16(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  movq %%r12, 40(%0);"    "  mov $0, %%r8;"
+++		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 32(%0);"
+++		"  mulxq 16(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  movq %%rbx, 40(%0);"    "  mov $0, %%r8;"
++ 		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  movq %%r14, 48(%0);"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"     "  movq %%rax, 56(%0);"
++ 		/* Line up pointers */
++@@ -202,11 +202,11 @@ static inline void fmul(u64 *out, const
++ 		"  mulxq 32(%1), %%r8, %%r13;"
++ 		"  xor %3, %3;"
++ 		"  adoxq 0(%1), %%r8;"
++-		"  mulxq 40(%1), %%r9, %%r12;"
+++		"  mulxq 40(%1), %%r9, %%rbx;"
++ 		"  adcx %%r13, %%r9;"
++ 		"  adoxq 8(%1), %%r9;"
++ 		"  mulxq 48(%1), %%r10, %%r13;"
++-		"  adcx %%r12, %%r10;"
+++		"  adcx %%rbx, %%r10;"
++ 		"  adoxq 16(%1), %%r10;"
++ 		"  mulxq 56(%1), %%r11, %%rax;"
++ 		"  adcx %%r13, %%r11;"
++@@ -231,7 +231,7 @@ static inline void fmul(u64 *out, const
++ 		"  movq %%r8, 0(%0);"
++ 	: "+&r" (tmp), "+&r" (f1), "+&r" (out), "+&r" (f2)
++ 	:
++-	: "%rax", "%rdx", "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "memory", "cc"
+++	: "%rax", "%rdx", "%r8", "%r9", "%r10", "%r11", "%rbx", "%r13", "%r14", "memory", "cc"
++ 	);
++ }
++ 
++@@ -248,28 +248,28 @@ static inline void fmul2(u64 *out, const
++ 		"  movq 0(%1), %%rdx;"
++ 		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  movq %%r8, 0(%0);"
++ 		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  movq %%r10, 8(%0);"
++-		"  mulxq 16(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"
+++		"  mulxq 16(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"
++ 		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"
++ 		/* Compute src1[1] * src2 */
++ 		"  movq 8(%1), %%rdx;"
++ 		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  adcxq 8(%0), %%r8;"    "  movq %%r8, 8(%0);"
++-		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 16(%0);"
++-		"  mulxq 16(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  mov $0, %%r8;"
+++		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 16(%0);"
+++		"  mulxq 16(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  mov $0, %%r8;"
++ 		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
++ 		/* Compute src1[2] * src2 */
++ 		"  movq 16(%1), %%rdx;"
++ 		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 16(%0), %%r8;"    "  movq %%r8, 16(%0);"
++-		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 24(%0);"
++-		"  mulxq 16(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  mov $0, %%r8;"
+++		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 24(%0);"
+++		"  mulxq 16(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  mov $0, %%r8;"
++ 		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
++ 		/* Compute src1[3] * src2 */
++ 		"  movq 24(%1), %%rdx;"
++ 		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 24(%0), %%r8;"    "  movq %%r8, 24(%0);"
++-		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 32(%0);"
++-		"  mulxq 16(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  movq %%r12, 40(%0);"    "  mov $0, %%r8;"
+++		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 32(%0);"
+++		"  mulxq 16(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  movq %%rbx, 40(%0);"    "  mov $0, %%r8;"
++ 		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  movq %%r14, 48(%0);"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"     "  movq %%rax, 56(%0);"
++ 
++@@ -279,28 +279,28 @@ static inline void fmul2(u64 *out, const
++ 		"  movq 32(%1), %%rdx;"
++ 		"  mulxq 32(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  movq %%r8, 64(%0);"
++ 		"  mulxq 40(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  movq %%r10, 72(%0);"
++-		"  mulxq 48(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"
+++		"  mulxq 48(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"
++ 		"  mulxq 56(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"
++ 		/* Compute src1[1] * src2 */
++ 		"  movq 40(%1), %%rdx;"
++ 		"  mulxq 32(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  adcxq 72(%0), %%r8;"    "  movq %%r8, 72(%0);"
++-		"  mulxq 40(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 80(%0);"
++-		"  mulxq 48(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  mov $0, %%r8;"
+++		"  mulxq 40(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 80(%0);"
+++		"  mulxq 48(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  mov $0, %%r8;"
++ 		"  mulxq 56(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
++ 		/* Compute src1[2] * src2 */
++ 		"  movq 48(%1), %%rdx;"
++ 		"  mulxq 32(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 80(%0), %%r8;"    "  movq %%r8, 80(%0);"
++-		"  mulxq 40(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 88(%0);"
++-		"  mulxq 48(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  mov $0, %%r8;"
+++		"  mulxq 40(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 88(%0);"
+++		"  mulxq 48(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  mov $0, %%r8;"
++ 		"  mulxq 56(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
++ 		/* Compute src1[3] * src2 */
++ 		"  movq 56(%1), %%rdx;"
++ 		"  mulxq 32(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 88(%0), %%r8;"    "  movq %%r8, 88(%0);"
++-		"  mulxq 40(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%r12, %%r10;"    "  movq %%r10, 96(%0);"
++-		"  mulxq 48(%3), %%r12, %%r13;"    "  adox %%r11, %%r12;"    "  adcx %%r14, %%r12;"    "  movq %%r12, 104(%0);"    "  mov $0, %%r8;"
+++		"  mulxq 40(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 96(%0);"
+++		"  mulxq 48(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  movq %%rbx, 104(%0);"    "  mov $0, %%r8;"
++ 		"  mulxq 56(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  movq %%r14, 112(%0);"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"     "  movq %%rax, 120(%0);"
++ 		/* Line up pointers */
++@@ -314,11 +314,11 @@ static inline void fmul2(u64 *out, const
++ 		"  mulxq 32(%1), %%r8, %%r13;"
++ 		"  xor %3, %3;"
++ 		"  adoxq 0(%1), %%r8;"
++-		"  mulxq 40(%1), %%r9, %%r12;"
+++		"  mulxq 40(%1), %%r9, %%rbx;"
++ 		"  adcx %%r13, %%r9;"
++ 		"  adoxq 8(%1), %%r9;"
++ 		"  mulxq 48(%1), %%r10, %%r13;"
++-		"  adcx %%r12, %%r10;"
+++		"  adcx %%rbx, %%r10;"
++ 		"  adoxq 16(%1), %%r10;"
++ 		"  mulxq 56(%1), %%r11, %%rax;"
++ 		"  adcx %%r13, %%r11;"
++@@ -347,11 +347,11 @@ static inline void fmul2(u64 *out, const
++ 		"  mulxq 96(%1), %%r8, %%r13;"
++ 		"  xor %3, %3;"
++ 		"  adoxq 64(%1), %%r8;"
++-		"  mulxq 104(%1), %%r9, %%r12;"
+++		"  mulxq 104(%1), %%r9, %%rbx;"
++ 		"  adcx %%r13, %%r9;"
++ 		"  adoxq 72(%1), %%r9;"
++ 		"  mulxq 112(%1), %%r10, %%r13;"
++-		"  adcx %%r12, %%r10;"
+++		"  adcx %%rbx, %%r10;"
++ 		"  adoxq 80(%1), %%r10;"
++ 		"  mulxq 120(%1), %%r11, %%rax;"
++ 		"  adcx %%r13, %%r11;"
++@@ -376,7 +376,7 @@ static inline void fmul2(u64 *out, const
++ 		"  movq %%r8, 32(%0);"
++ 	: "+&r" (tmp), "+&r" (f1), "+&r" (out), "+&r" (f2)
++ 	:
++-	: "%rax", "%rdx", "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "memory", "cc"
+++	: "%rax", "%rdx", "%r8", "%r9", "%r10", "%r11", "%rbx", "%r13", "%r14", "memory", "cc"
++ 	);
++ }
++ 
++@@ -388,11 +388,11 @@ static inline void fmul_scalar(u64 *out,
++ 	asm volatile(
++ 		/* Compute the raw multiplication of f1*f2 */
++ 		"  mulxq 0(%2), %%r8, %%rcx;"      /* f1[0]*f2 */
++-		"  mulxq 8(%2), %%r9, %%r12;"      /* f1[1]*f2 */
+++		"  mulxq 8(%2), %%r9, %%rbx;"      /* f1[1]*f2 */
++ 		"  add %%rcx, %%r9;"
++ 		"  mov $0, %%rcx;"
++ 		"  mulxq 16(%2), %%r10, %%r13;"    /* f1[2]*f2 */
++-		"  adcx %%r12, %%r10;"
+++		"  adcx %%rbx, %%r10;"
++ 		"  mulxq 24(%2), %%r11, %%rax;"    /* f1[3]*f2 */
++ 		"  adcx %%r13, %%r11;"
++ 		"  adcx %%rcx, %%rax;"
++@@ -419,7 +419,7 @@ static inline void fmul_scalar(u64 *out,
++ 		"  movq %%r8, 0(%1);"
++ 	: "+&r" (f2_r)
++ 	: "r" (out), "r" (f1)
++-	: "%rax", "%rcx", "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "memory", "cc"
+++	: "%rax", "%rcx", "%r8", "%r9", "%r10", "%r11", "%rbx", "%r13", "memory", "cc"
++ 	);
++ }
++ 
++@@ -520,8 +520,8 @@ static inline void fsqr(u64 *out, const
++ 		"  mulxq 16(%1), %%r9, %%r10;"     "  adcx %%r14, %%r9;"     /* f[2]*f[0] */
++ 		"  mulxq 24(%1), %%rax, %%rcx;"    "  adcx %%rax, %%r10;"    /* f[3]*f[0] */
++ 		"  movq 24(%1), %%rdx;"                                      /* f[3] */
++-		"  mulxq 8(%1), %%r11, %%r12;"     "  adcx %%rcx, %%r11;"    /* f[1]*f[3] */
++-		"  mulxq 16(%1), %%rax, %%r13;"    "  adcx %%rax, %%r12;"    /* f[2]*f[3] */
+++		"  mulxq 8(%1), %%r11, %%rbx;"     "  adcx %%rcx, %%r11;"    /* f[1]*f[3] */
+++		"  mulxq 16(%1), %%rax, %%r13;"    "  adcx %%rax, %%rbx;"    /* f[2]*f[3] */
++ 		"  movq 8(%1), %%rdx;"             "  adcx %%r15, %%r13;"    /* f1 */
++ 		"  mulxq 16(%1), %%rax, %%rcx;"    "  mov $0, %%r14;"        /* f[2]*f[1] */
++ 
++@@ -531,12 +531,12 @@ static inline void fsqr(u64 *out, const
++ 		"  adcx %%r8, %%r8;"
++ 		"  adox %%rcx, %%r11;"
++ 		"  adcx %%r9, %%r9;"
++-		"  adox %%r15, %%r12;"
+++		"  adox %%r15, %%rbx;"
++ 		"  adcx %%r10, %%r10;"
++ 		"  adox %%r15, %%r13;"
++ 		"  adcx %%r11, %%r11;"
++ 		"  adox %%r15, %%r14;"
++-		"  adcx %%r12, %%r12;"
+++		"  adcx %%rbx, %%rbx;"
++ 		"  adcx %%r13, %%r13;"
++ 		"  adcx %%r14, %%r14;"
++ 
++@@ -549,7 +549,7 @@ static inline void fsqr(u64 *out, const
++ 		"  adcx %%rcx, %%r10;"     "  movq %%r10, 24(%0);"
++ 		"  movq 16(%1), %%rdx;"    "  mulx %%rdx, %%rax, %%rcx;"    /* f[2]^2 */
++ 		"  adcx %%rax, %%r11;"     "  movq %%r11, 32(%0);"
++-		"  adcx %%rcx, %%r12;"     "  movq %%r12, 40(%0);"
+++		"  adcx %%rcx, %%rbx;"     "  movq %%rbx, 40(%0);"
++ 		"  movq 24(%1), %%rdx;"    "  mulx %%rdx, %%rax, %%rcx;"    /* f[3]^2 */
++ 		"  adcx %%rax, %%r13;"     "  movq %%r13, 48(%0);"
++ 		"  adcx %%rcx, %%r14;"     "  movq %%r14, 56(%0);"
++@@ -565,11 +565,11 @@ static inline void fsqr(u64 *out, const
++ 		"  mulxq 32(%1), %%r8, %%r13;"
++ 		"  xor %%rcx, %%rcx;"
++ 		"  adoxq 0(%1), %%r8;"
++-		"  mulxq 40(%1), %%r9, %%r12;"
+++		"  mulxq 40(%1), %%r9, %%rbx;"
++ 		"  adcx %%r13, %%r9;"
++ 		"  adoxq 8(%1), %%r9;"
++ 		"  mulxq 48(%1), %%r10, %%r13;"
++-		"  adcx %%r12, %%r10;"
+++		"  adcx %%rbx, %%r10;"
++ 		"  adoxq 16(%1), %%r10;"
++ 		"  mulxq 56(%1), %%r11, %%rax;"
++ 		"  adcx %%r13, %%r11;"
++@@ -594,7 +594,7 @@ static inline void fsqr(u64 *out, const
++ 		"  movq %%r8, 0(%0);"
++ 	: "+&r" (tmp), "+&r" (f), "+&r" (out)
++ 	:
++-	: "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", "memory", "cc"
+++	: "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10", "%r11", "%rbx", "%r13", "%r14", "%r15", "memory", "cc"
++ 	);
++ }
++ 
++@@ -611,8 +611,8 @@ static inline void fsqr2(u64 *out, const
++ 		"  mulxq 16(%1), %%r9, %%r10;"     "  adcx %%r14, %%r9;"     /* f[2]*f[0] */
++ 		"  mulxq 24(%1), %%rax, %%rcx;"    "  adcx %%rax, %%r10;"    /* f[3]*f[0] */
++ 		"  movq 24(%1), %%rdx;"                                      /* f[3] */
++-		"  mulxq 8(%1), %%r11, %%r12;"     "  adcx %%rcx, %%r11;"    /* f[1]*f[3] */
++-		"  mulxq 16(%1), %%rax, %%r13;"    "  adcx %%rax, %%r12;"    /* f[2]*f[3] */
+++		"  mulxq 8(%1), %%r11, %%rbx;"     "  adcx %%rcx, %%r11;"    /* f[1]*f[3] */
+++		"  mulxq 16(%1), %%rax, %%r13;"    "  adcx %%rax, %%rbx;"    /* f[2]*f[3] */
++ 		"  movq 8(%1), %%rdx;"             "  adcx %%r15, %%r13;"    /* f1 */
++ 		"  mulxq 16(%1), %%rax, %%rcx;"    "  mov $0, %%r14;"        /* f[2]*f[1] */
++ 
++@@ -622,12 +622,12 @@ static inline void fsqr2(u64 *out, const
++ 		"  adcx %%r8, %%r8;"
++ 		"  adox %%rcx, %%r11;"
++ 		"  adcx %%r9, %%r9;"
++-		"  adox %%r15, %%r12;"
+++		"  adox %%r15, %%rbx;"
++ 		"  adcx %%r10, %%r10;"
++ 		"  adox %%r15, %%r13;"
++ 		"  adcx %%r11, %%r11;"
++ 		"  adox %%r15, %%r14;"
++-		"  adcx %%r12, %%r12;"
+++		"  adcx %%rbx, %%rbx;"
++ 		"  adcx %%r13, %%r13;"
++ 		"  adcx %%r14, %%r14;"
++ 
++@@ -640,7 +640,7 @@ static inline void fsqr2(u64 *out, const
++ 		"  adcx %%rcx, %%r10;"     "  movq %%r10, 24(%0);"
++ 		"  movq 16(%1), %%rdx;"    "  mulx %%rdx, %%rax, %%rcx;"    /* f[2]^2 */
++ 		"  adcx %%rax, %%r11;"     "  movq %%r11, 32(%0);"
++-		"  adcx %%rcx, %%r12;"     "  movq %%r12, 40(%0);"
+++		"  adcx %%rcx, %%rbx;"     "  movq %%rbx, 40(%0);"
++ 		"  movq 24(%1), %%rdx;"    "  mulx %%rdx, %%rax, %%rcx;"    /* f[3]^2 */
++ 		"  adcx %%rax, %%r13;"     "  movq %%r13, 48(%0);"
++ 		"  adcx %%rcx, %%r14;"     "  movq %%r14, 56(%0);"
++@@ -651,8 +651,8 @@ static inline void fsqr2(u64 *out, const
++ 		"  mulxq 48(%1), %%r9, %%r10;"     "  adcx %%r14, %%r9;"     /* f[2]*f[0] */
++ 		"  mulxq 56(%1), %%rax, %%rcx;"    "  adcx %%rax, %%r10;"    /* f[3]*f[0] */
++ 		"  movq 56(%1), %%rdx;"                                      /* f[3] */
++-		"  mulxq 40(%1), %%r11, %%r12;"     "  adcx %%rcx, %%r11;"    /* f[1]*f[3] */
++-		"  mulxq 48(%1), %%rax, %%r13;"    "  adcx %%rax, %%r12;"    /* f[2]*f[3] */
+++		"  mulxq 40(%1), %%r11, %%rbx;"     "  adcx %%rcx, %%r11;"    /* f[1]*f[3] */
+++		"  mulxq 48(%1), %%rax, %%r13;"    "  adcx %%rax, %%rbx;"    /* f[2]*f[3] */
++ 		"  movq 40(%1), %%rdx;"             "  adcx %%r15, %%r13;"    /* f1 */
++ 		"  mulxq 48(%1), %%rax, %%rcx;"    "  mov $0, %%r14;"        /* f[2]*f[1] */
++ 
++@@ -662,12 +662,12 @@ static inline void fsqr2(u64 *out, const
++ 		"  adcx %%r8, %%r8;"
++ 		"  adox %%rcx, %%r11;"
++ 		"  adcx %%r9, %%r9;"
++-		"  adox %%r15, %%r12;"
+++		"  adox %%r15, %%rbx;"
++ 		"  adcx %%r10, %%r10;"
++ 		"  adox %%r15, %%r13;"
++ 		"  adcx %%r11, %%r11;"
++ 		"  adox %%r15, %%r14;"
++-		"  adcx %%r12, %%r12;"
+++		"  adcx %%rbx, %%rbx;"
++ 		"  adcx %%r13, %%r13;"
++ 		"  adcx %%r14, %%r14;"
++ 
++@@ -680,7 +680,7 @@ static inline void fsqr2(u64 *out, const
++ 		"  adcx %%rcx, %%r10;"     "  movq %%r10, 88(%0);"
++ 		"  movq 48(%1), %%rdx;"    "  mulx %%rdx, %%rax, %%rcx;"    /* f[2]^2 */
++ 		"  adcx %%rax, %%r11;"     "  movq %%r11, 96(%0);"
++-		"  adcx %%rcx, %%r12;"     "  movq %%r12, 104(%0);"
+++		"  adcx %%rcx, %%rbx;"     "  movq %%rbx, 104(%0);"
++ 		"  movq 56(%1), %%rdx;"    "  mulx %%rdx, %%rax, %%rcx;"    /* f[3]^2 */
++ 		"  adcx %%rax, %%r13;"     "  movq %%r13, 112(%0);"
++ 		"  adcx %%rcx, %%r14;"     "  movq %%r14, 120(%0);"
++@@ -694,11 +694,11 @@ static inline void fsqr2(u64 *out, const
++ 		"  mulxq 32(%1), %%r8, %%r13;"
++ 		"  xor %%rcx, %%rcx;"
++ 		"  adoxq 0(%1), %%r8;"
++-		"  mulxq 40(%1), %%r9, %%r12;"
+++		"  mulxq 40(%1), %%r9, %%rbx;"
++ 		"  adcx %%r13, %%r9;"
++ 		"  adoxq 8(%1), %%r9;"
++ 		"  mulxq 48(%1), %%r10, %%r13;"
++-		"  adcx %%r12, %%r10;"
+++		"  adcx %%rbx, %%r10;"
++ 		"  adoxq 16(%1), %%r10;"
++ 		"  mulxq 56(%1), %%r11, %%rax;"
++ 		"  adcx %%r13, %%r11;"
++@@ -727,11 +727,11 @@ static inline void fsqr2(u64 *out, const
++ 		"  mulxq 96(%1), %%r8, %%r13;"
++ 		"  xor %%rcx, %%rcx;"
++ 		"  adoxq 64(%1), %%r8;"
++-		"  mulxq 104(%1), %%r9, %%r12;"
+++		"  mulxq 104(%1), %%r9, %%rbx;"
++ 		"  adcx %%r13, %%r9;"
++ 		"  adoxq 72(%1), %%r9;"
++ 		"  mulxq 112(%1), %%r10, %%r13;"
++-		"  adcx %%r12, %%r10;"
+++		"  adcx %%rbx, %%r10;"
++ 		"  adoxq 80(%1), %%r10;"
++ 		"  mulxq 120(%1), %%r11, %%rax;"
++ 		"  adcx %%r13, %%r11;"
++@@ -756,7 +756,7 @@ static inline void fsqr2(u64 *out, const
++ 		"  movq %%r8, 32(%0);"
++ 	: "+&r" (tmp), "+&r" (f), "+&r" (out)
++ 	:
++-	: "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", "memory", "cc"
+++	: "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10", "%r11", "%rbx", "%r13", "%r14", "%r15", "memory", "cc"
++ 	);
++ }
++ 
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0056-crypto-arm-64-poly1305-add-artifact-to-.gitignore-fi.patch b/target/linux/generic/backport-5.4/080-wireguard-0056-crypto-arm-64-poly1305-add-artifact-to-.gitignore-fi.patch
+new file mode 100644
+index 0000000000..655371630c
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0056-crypto-arm-64-poly1305-add-artifact-to-.gitignore-fi.patch
+@@ -0,0 +1,35 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Thu, 19 Mar 2020 11:56:17 -0600
++Subject: [PATCH] crypto: arm[64]/poly1305 - add artifact to .gitignore files
++
++commit 6e4e00d8b68ca7eb30d08afb740033e0d36abe55 upstream.
++
++The .S_shipped yields a .S, and the pattern in these directories is to
++add that to .gitignore so that git-status doesn't raise a fuss.
++
++Fixes: a6b803b3ddc7 ("crypto: arm/poly1305 - incorporate OpenSSL/CRYPTOGAMS NEON implementation")
++Fixes: f569ca164751 ("crypto: arm64/poly1305 - incorporate OpenSSL/CRYPTOGAMS NEON implementation")
++Reported-by: Emil Renner Berthing <kernel@esmil.dk>
++Cc: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/.gitignore   | 1 +
++ arch/arm64/crypto/.gitignore | 1 +
++ 2 files changed, 2 insertions(+)
++
++--- a/arch/arm/crypto/.gitignore
+++++ b/arch/arm/crypto/.gitignore
++@@ -1,3 +1,4 @@
++ aesbs-core.S
++ sha256-core.S
++ sha512-core.S
+++poly1305-core.S
++--- a/arch/arm64/crypto/.gitignore
+++++ b/arch/arm64/crypto/.gitignore
++@@ -1,2 +1,3 @@
++ sha256-core.S
++ sha512-core.S
+++poly1305-core.S
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0057-crypto-arch-lib-limit-simd-usage-to-4k-chunks.patch b/target/linux/generic/backport-5.4/080-wireguard-0057-crypto-arch-lib-limit-simd-usage-to-4k-chunks.patch
+new file mode 100644
+index 0000000000..f8828f243e
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0057-crypto-arch-lib-limit-simd-usage-to-4k-chunks.patch
+@@ -0,0 +1,243 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Thu, 23 Apr 2020 15:54:04 -0600
++Subject: [PATCH] crypto: arch/lib - limit simd usage to 4k chunks
++
++commit 706024a52c614b478b63f7728d202532ce6591a9 upstream.
++
++The initial Zinc patchset, after some mailing list discussion, contained
++code to ensure that kernel_fpu_enable would not be kept on for more than
++a 4k chunk, since it disables preemption. The choice of 4k isn't totally
++scientific, but it's not a bad guess either, and it's what's used in
++both the x86 poly1305, blake2s, and nhpoly1305 code already (in the form
++of PAGE_SIZE, which this commit corrects to be explicitly 4k for the
++former two).
++
++Ard did some back of the envelope calculations and found that
++at 5 cycles/byte (overestimate) on a 1ghz processor (pretty slow), 4k
++means we have a maximum preemption disabling of 20us, which Sebastian
++confirmed was probably a good limit.
++
++Unfortunately the chunking appears to have been left out of the final
++patchset that added the glue code. So, this commit adds it back in.
++
++Fixes: 84e03fa39fbe ("crypto: x86/chacha - expose SIMD ChaCha routine as library function")
++Fixes: b3aad5bad26a ("crypto: arm64/chacha - expose arm64 ChaCha routine as library function")
++Fixes: a44a3430d71b ("crypto: arm/chacha - expose ARM ChaCha routine as library function")
++Fixes: d7d7b8535662 ("crypto: x86/poly1305 - wire up faster implementations for kernel")
++Fixes: f569ca164751 ("crypto: arm64/poly1305 - incorporate OpenSSL/CRYPTOGAMS NEON implementation")
++Fixes: a6b803b3ddc7 ("crypto: arm/poly1305 - incorporate OpenSSL/CRYPTOGAMS NEON implementation")
++Fixes: ed0356eda153 ("crypto: blake2s - x86_64 SIMD implementation")
++Cc: Eric Biggers <ebiggers@google.com>
++Cc: Ard Biesheuvel <ardb@kernel.org>
++Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
++Cc: stable@vger.kernel.org
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/chacha-glue.c        | 14 +++++++++++---
++ arch/arm/crypto/poly1305-glue.c      | 15 +++++++++++----
++ arch/arm64/crypto/chacha-neon-glue.c | 14 +++++++++++---
++ arch/arm64/crypto/poly1305-glue.c    | 15 +++++++++++----
++ arch/x86/crypto/blake2s-glue.c       | 10 ++++------
++ arch/x86/crypto/chacha_glue.c        | 14 +++++++++++---
++ arch/x86/crypto/poly1305_glue.c      | 13 ++++++-------
++ 7 files changed, 65 insertions(+), 30 deletions(-)
++
++--- a/arch/arm/crypto/chacha-glue.c
+++++ b/arch/arm/crypto/chacha-glue.c
++@@ -91,9 +91,17 @@ void chacha_crypt_arch(u32 *state, u8 *d
++ 		return;
++ 	}
++ 
++-	kernel_neon_begin();
++-	chacha_doneon(state, dst, src, bytes, nrounds);
++-	kernel_neon_end();
+++	do {
+++		unsigned int todo = min_t(unsigned int, bytes, SZ_4K);
+++
+++		kernel_neon_begin();
+++		chacha_doneon(state, dst, src, todo, nrounds);
+++		kernel_neon_end();
+++
+++		bytes -= todo;
+++		src += todo;
+++		dst += todo;
+++	} while (bytes);
++ }
++ EXPORT_SYMBOL(chacha_crypt_arch);
++ 
++--- a/arch/arm/crypto/poly1305-glue.c
+++++ b/arch/arm/crypto/poly1305-glue.c
++@@ -160,13 +160,20 @@ void poly1305_update_arch(struct poly130
++ 		unsigned int len = round_down(nbytes, POLY1305_BLOCK_SIZE);
++ 
++ 		if (static_branch_likely(&have_neon) && do_neon) {
++-			kernel_neon_begin();
++-			poly1305_blocks_neon(&dctx->h, src, len, 1);
++-			kernel_neon_end();
+++			do {
+++				unsigned int todo = min_t(unsigned int, len, SZ_4K);
+++
+++				kernel_neon_begin();
+++				poly1305_blocks_neon(&dctx->h, src, todo, 1);
+++				kernel_neon_end();
+++
+++				len -= todo;
+++				src += todo;
+++			} while (len);
++ 		} else {
++ 			poly1305_blocks_arm(&dctx->h, src, len, 1);
+++			src += len;
++ 		}
++-		src += len;
++ 		nbytes %= POLY1305_BLOCK_SIZE;
++ 	}
++ 
++--- a/arch/arm64/crypto/chacha-neon-glue.c
+++++ b/arch/arm64/crypto/chacha-neon-glue.c
++@@ -87,9 +87,17 @@ void chacha_crypt_arch(u32 *state, u8 *d
++ 	    !crypto_simd_usable())
++ 		return chacha_crypt_generic(state, dst, src, bytes, nrounds);
++ 
++-	kernel_neon_begin();
++-	chacha_doneon(state, dst, src, bytes, nrounds);
++-	kernel_neon_end();
+++	do {
+++		unsigned int todo = min_t(unsigned int, bytes, SZ_4K);
+++
+++		kernel_neon_begin();
+++		chacha_doneon(state, dst, src, todo, nrounds);
+++		kernel_neon_end();
+++
+++		bytes -= todo;
+++		src += todo;
+++		dst += todo;
+++	} while (bytes);
++ }
++ EXPORT_SYMBOL(chacha_crypt_arch);
++ 
++--- a/arch/arm64/crypto/poly1305-glue.c
+++++ b/arch/arm64/crypto/poly1305-glue.c
++@@ -143,13 +143,20 @@ void poly1305_update_arch(struct poly130
++ 		unsigned int len = round_down(nbytes, POLY1305_BLOCK_SIZE);
++ 
++ 		if (static_branch_likely(&have_neon) && crypto_simd_usable()) {
++-			kernel_neon_begin();
++-			poly1305_blocks_neon(&dctx->h, src, len, 1);
++-			kernel_neon_end();
+++			do {
+++				unsigned int todo = min_t(unsigned int, len, SZ_4K);
+++
+++				kernel_neon_begin();
+++				poly1305_blocks_neon(&dctx->h, src, todo, 1);
+++				kernel_neon_end();
+++
+++				len -= todo;
+++				src += todo;
+++			} while (len);
++ 		} else {
++ 			poly1305_blocks(&dctx->h, src, len, 1);
+++			src += len;
++ 		}
++-		src += len;
++ 		nbytes %= POLY1305_BLOCK_SIZE;
++ 	}
++ 
++--- a/arch/x86/crypto/blake2s-glue.c
+++++ b/arch/x86/crypto/blake2s-glue.c
++@@ -32,16 +32,16 @@ void blake2s_compress_arch(struct blake2
++ 			   const u32 inc)
++ {
++ 	/* SIMD disables preemption, so relax after processing each page. */
++-	BUILD_BUG_ON(PAGE_SIZE / BLAKE2S_BLOCK_SIZE < 8);
+++	BUILD_BUG_ON(SZ_4K / BLAKE2S_BLOCK_SIZE < 8);
++ 
++ 	if (!static_branch_likely(&blake2s_use_ssse3) || !crypto_simd_usable()) {
++ 		blake2s_compress_generic(state, block, nblocks, inc);
++ 		return;
++ 	}
++ 
++-	for (;;) {
+++	do {
++ 		const size_t blocks = min_t(size_t, nblocks,
++-					    PAGE_SIZE / BLAKE2S_BLOCK_SIZE);
+++					    SZ_4K / BLAKE2S_BLOCK_SIZE);
++ 
++ 		kernel_fpu_begin();
++ 		if (IS_ENABLED(CONFIG_AS_AVX512) &&
++@@ -52,10 +52,8 @@ void blake2s_compress_arch(struct blake2
++ 		kernel_fpu_end();
++ 
++ 		nblocks -= blocks;
++-		if (!nblocks)
++-			break;
++ 		block += blocks * BLAKE2S_BLOCK_SIZE;
++-	}
+++	} while (nblocks);
++ }
++ EXPORT_SYMBOL(blake2s_compress_arch);
++ 
++--- a/arch/x86/crypto/chacha_glue.c
+++++ b/arch/x86/crypto/chacha_glue.c
++@@ -154,9 +154,17 @@ void chacha_crypt_arch(u32 *state, u8 *d
++ 	    bytes <= CHACHA_BLOCK_SIZE)
++ 		return chacha_crypt_generic(state, dst, src, bytes, nrounds);
++ 
++-	kernel_fpu_begin();
++-	chacha_dosimd(state, dst, src, bytes, nrounds);
++-	kernel_fpu_end();
+++	do {
+++		unsigned int todo = min_t(unsigned int, bytes, SZ_4K);
+++
+++		kernel_fpu_begin();
+++		chacha_dosimd(state, dst, src, todo, nrounds);
+++		kernel_fpu_end();
+++
+++		bytes -= todo;
+++		src += todo;
+++		dst += todo;
+++	} while (bytes);
++ }
++ EXPORT_SYMBOL(chacha_crypt_arch);
++ 
++--- a/arch/x86/crypto/poly1305_glue.c
+++++ b/arch/x86/crypto/poly1305_glue.c
++@@ -91,8 +91,8 @@ static void poly1305_simd_blocks(void *c
++ 	struct poly1305_arch_internal *state = ctx;
++ 
++ 	/* SIMD disables preemption, so relax after processing each page. */
++-	BUILD_BUG_ON(PAGE_SIZE < POLY1305_BLOCK_SIZE ||
++-		     PAGE_SIZE % POLY1305_BLOCK_SIZE);
+++	BUILD_BUG_ON(SZ_4K < POLY1305_BLOCK_SIZE ||
+++		     SZ_4K % POLY1305_BLOCK_SIZE);
++ 
++ 	if (!IS_ENABLED(CONFIG_AS_AVX) || !static_branch_likely(&poly1305_use_avx) ||
++ 	    (len < (POLY1305_BLOCK_SIZE * 18) && !state->is_base2_26) ||
++@@ -102,8 +102,8 @@ static void poly1305_simd_blocks(void *c
++ 		return;
++ 	}
++ 
++-	for (;;) {
++-		const size_t bytes = min_t(size_t, len, PAGE_SIZE);
+++	do {
+++		const size_t bytes = min_t(size_t, len, SZ_4K);
++ 
++ 		kernel_fpu_begin();
++ 		if (IS_ENABLED(CONFIG_AS_AVX512) && static_branch_likely(&poly1305_use_avx512))
++@@ -113,11 +113,10 @@ static void poly1305_simd_blocks(void *c
++ 		else
++ 			poly1305_blocks_avx(ctx, inp, bytes, padbit);
++ 		kernel_fpu_end();
+++
++ 		len -= bytes;
++-		if (!len)
++-			break;
++ 		inp += bytes;
++-	}
+++	} while (len);
++ }
++ 
++ static void poly1305_simd_emit(void *ctx, u8 mac[POLY1305_DIGEST_SIZE],
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0058-crypto-lib-chacha20poly1305-Add-missing-function-dec.patch b/target/linux/generic/backport-5.4/080-wireguard-0058-crypto-lib-chacha20poly1305-Add-missing-function-dec.patch
+new file mode 100644
+index 0000000000..736147f934
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0058-crypto-lib-chacha20poly1305-Add-missing-function-dec.patch
+@@ -0,0 +1,38 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Herbert Xu <herbert@gondor.apana.org.au>
++Date: Wed, 8 Jul 2020 12:41:13 +1000
++Subject: [PATCH] crypto: lib/chacha20poly1305 - Add missing function
++ declaration
++
++commit 06cc2afbbdf9a9e8df3e2f8db724997dd6e1b4ac upstream.
++
++This patch adds a declaration for chacha20poly1305_selftest to
++silence a sparse warning.
++
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ include/crypto/chacha20poly1305.h | 2 ++
++ lib/crypto/chacha20poly1305.c     | 2 --
++ 2 files changed, 2 insertions(+), 2 deletions(-)
++
++--- a/include/crypto/chacha20poly1305.h
+++++ b/include/crypto/chacha20poly1305.h
++@@ -45,4 +45,6 @@ bool chacha20poly1305_decrypt_sg_inplace
++ 					 const u64 nonce,
++ 					 const u8 key[CHACHA20POLY1305_KEY_SIZE]);
++ 
+++bool chacha20poly1305_selftest(void);
+++
++ #endif /* __CHACHA20POLY1305_H */
++--- a/lib/crypto/chacha20poly1305.c
+++++ b/lib/crypto/chacha20poly1305.c
++@@ -21,8 +21,6 @@
++ 
++ #define CHACHA_KEY_WORDS	(CHACHA_KEY_SIZE / sizeof(u32))
++ 
++-bool __init chacha20poly1305_selftest(void);
++-
++ static void chacha_load_key(u32 *k, const u8 *in)
++ {
++ 	k[0] = get_unaligned_le32(in);
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0059-crypto-x86-chacha-sse3-use-unaligned-loads-for-state.patch b/target/linux/generic/backport-5.4/080-wireguard-0059-crypto-x86-chacha-sse3-use-unaligned-loads-for-state.patch
+new file mode 100644
+index 0000000000..52847877f6
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0059-crypto-x86-chacha-sse3-use-unaligned-loads-for-state.patch
+@@ -0,0 +1,147 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Wed, 8 Jul 2020 12:11:18 +0300
++Subject: [PATCH] crypto: x86/chacha-sse3 - use unaligned loads for state array
++
++commit e79a31715193686e92dadb4caedfbb1f5de3659c upstream.
++
++Due to the fact that the x86 port does not support allocating objects
++on the stack with an alignment that exceeds 8 bytes, we have a rather
++ugly hack in the x86 code for ChaCha to ensure that the state array is
++aligned to 16 bytes, allowing the SSE3 implementation of the algorithm
++to use aligned loads.
++
++Given that the performance benefit of using of aligned loads appears to
++be limited (~0.25% for 1k blocks using tcrypt on a Corei7-8650U), and
++the fact that this hack has leaked into generic ChaCha code, let's just
++remove it.
++
++Cc: Martin Willi <martin@strongswan.org>
++Cc: Herbert Xu <herbert@gondor.apana.org.au>
++Cc: Eric Biggers <ebiggers@kernel.org>
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Reviewed-by: Martin Willi <martin@strongswan.org>
++Reviewed-by: Eric Biggers <ebiggers@google.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/chacha-ssse3-x86_64.S | 16 ++++++++--------
++ arch/x86/crypto/chacha_glue.c         | 17 ++---------------
++ include/crypto/chacha.h               |  4 ----
++ 3 files changed, 10 insertions(+), 27 deletions(-)
++
++--- a/arch/x86/crypto/chacha-ssse3-x86_64.S
+++++ b/arch/x86/crypto/chacha-ssse3-x86_64.S
++@@ -120,10 +120,10 @@ ENTRY(chacha_block_xor_ssse3)
++ 	FRAME_BEGIN
++ 
++ 	# x0..3 = s0..3
++-	movdqa		0x00(%rdi),%xmm0
++-	movdqa		0x10(%rdi),%xmm1
++-	movdqa		0x20(%rdi),%xmm2
++-	movdqa		0x30(%rdi),%xmm3
+++	movdqu		0x00(%rdi),%xmm0
+++	movdqu		0x10(%rdi),%xmm1
+++	movdqu		0x20(%rdi),%xmm2
+++	movdqu		0x30(%rdi),%xmm3
++ 	movdqa		%xmm0,%xmm8
++ 	movdqa		%xmm1,%xmm9
++ 	movdqa		%xmm2,%xmm10
++@@ -205,10 +205,10 @@ ENTRY(hchacha_block_ssse3)
++ 	# %edx: nrounds
++ 	FRAME_BEGIN
++ 
++-	movdqa		0x00(%rdi),%xmm0
++-	movdqa		0x10(%rdi),%xmm1
++-	movdqa		0x20(%rdi),%xmm2
++-	movdqa		0x30(%rdi),%xmm3
+++	movdqu		0x00(%rdi),%xmm0
+++	movdqu		0x10(%rdi),%xmm1
+++	movdqu		0x20(%rdi),%xmm2
+++	movdqu		0x30(%rdi),%xmm3
++ 
++ 	mov		%edx,%r8d
++ 	call		chacha_permute
++--- a/arch/x86/crypto/chacha_glue.c
+++++ b/arch/x86/crypto/chacha_glue.c
++@@ -14,8 +14,6 @@
++ #include <linux/module.h>
++ #include <asm/simd.h>
++ 
++-#define CHACHA_STATE_ALIGN 16
++-
++ asmlinkage void chacha_block_xor_ssse3(u32 *state, u8 *dst, const u8 *src,
++ 				       unsigned int len, int nrounds);
++ asmlinkage void chacha_4block_xor_ssse3(u32 *state, u8 *dst, const u8 *src,
++@@ -125,8 +123,6 @@ static void chacha_dosimd(u32 *state, u8
++ 
++ void hchacha_block_arch(const u32 *state, u32 *stream, int nrounds)
++ {
++-	state = PTR_ALIGN(state, CHACHA_STATE_ALIGN);
++-
++ 	if (!static_branch_likely(&chacha_use_simd) || !crypto_simd_usable()) {
++ 		hchacha_block_generic(state, stream, nrounds);
++ 	} else {
++@@ -139,8 +135,6 @@ EXPORT_SYMBOL(hchacha_block_arch);
++ 
++ void chacha_init_arch(u32 *state, const u32 *key, const u8 *iv)
++ {
++-	state = PTR_ALIGN(state, CHACHA_STATE_ALIGN);
++-
++ 	chacha_init_generic(state, key, iv);
++ }
++ EXPORT_SYMBOL(chacha_init_arch);
++@@ -148,8 +142,6 @@ EXPORT_SYMBOL(chacha_init_arch);
++ void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src, unsigned int bytes,
++ 		       int nrounds)
++ {
++-	state = PTR_ALIGN(state, CHACHA_STATE_ALIGN);
++-
++ 	if (!static_branch_likely(&chacha_use_simd) || !crypto_simd_usable() ||
++ 	    bytes <= CHACHA_BLOCK_SIZE)
++ 		return chacha_crypt_generic(state, dst, src, bytes, nrounds);
++@@ -171,15 +163,12 @@ EXPORT_SYMBOL(chacha_crypt_arch);
++ static int chacha_simd_stream_xor(struct skcipher_request *req,
++ 				  const struct chacha_ctx *ctx, const u8 *iv)
++ {
++-	u32 *state, state_buf[16 + 2] __aligned(8);
+++	u32 state[CHACHA_STATE_WORDS] __aligned(8);
++ 	struct skcipher_walk walk;
++ 	int err;
++ 
++ 	err = skcipher_walk_virt(&walk, req, false);
++ 
++-	BUILD_BUG_ON(CHACHA_STATE_ALIGN != 16);
++-	state = PTR_ALIGN(state_buf + 0, CHACHA_STATE_ALIGN);
++-
++ 	chacha_init_generic(state, ctx->key, iv);
++ 
++ 	while (walk.nbytes > 0) {
++@@ -218,12 +207,10 @@ static int xchacha_simd(struct skcipher_
++ {
++ 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
++ 	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
++-	u32 *state, state_buf[16 + 2] __aligned(8);
+++	u32 state[CHACHA_STATE_WORDS] __aligned(8);
++ 	struct chacha_ctx subctx;
++ 	u8 real_iv[16];
++ 
++-	BUILD_BUG_ON(CHACHA_STATE_ALIGN != 16);
++-	state = PTR_ALIGN(state_buf + 0, CHACHA_STATE_ALIGN);
++ 	chacha_init_generic(state, ctx->key, req->iv);
++ 
++ 	if (req->cryptlen > CHACHA_BLOCK_SIZE && crypto_simd_usable()) {
++--- a/include/crypto/chacha.h
+++++ b/include/crypto/chacha.h
++@@ -25,11 +25,7 @@
++ #define CHACHA_BLOCK_SIZE	64
++ #define CHACHAPOLY_IV_SIZE	12
++ 
++-#ifdef CONFIG_X86_64
++-#define CHACHA_STATE_WORDS	((CHACHA_BLOCK_SIZE + 12) / sizeof(u32))
++-#else
++ #define CHACHA_STATE_WORDS	(CHACHA_BLOCK_SIZE / sizeof(u32))
++-#endif
++ 
++ /* 192-bit nonce, then 64-bit stream position */
++ #define XCHACHA_IV_SIZE		32
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0060-crypto-x86-curve25519-Remove-unused-carry-variables.patch b/target/linux/generic/backport-5.4/080-wireguard-0060-crypto-x86-curve25519-Remove-unused-carry-variables.patch
+new file mode 100644
+index 0000000000..5a2d20a982
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0060-crypto-x86-curve25519-Remove-unused-carry-variables.patch
+@@ -0,0 +1,46 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Herbert Xu <herbert@gondor.apana.org.au>
++Date: Thu, 23 Jul 2020 17:50:48 +1000
++Subject: [PATCH] crypto: x86/curve25519 - Remove unused carry variables
++
++commit 054a5540fb8f7268e2c79e9deab4242db15c8cba upstream.
++
++The carry variables are assigned but never used, which upsets
++the compiler.  This patch removes them.
++
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Reviewed-by: Karthikeyan Bhargavan <karthik.bhargavan@gmail.com>
++Acked-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/curve25519-x86_64.c | 6 ++----
++ 1 file changed, 2 insertions(+), 4 deletions(-)
++
++--- a/arch/x86/crypto/curve25519-x86_64.c
+++++ b/arch/x86/crypto/curve25519-x86_64.c
++@@ -948,10 +948,8 @@ static void store_felem(u64 *b, u64 *f)
++ {
++ 	u64 f30 = f[3U];
++ 	u64 top_bit0 = f30 >> (u32)63U;
++-	u64 carry0;
++ 	u64 f31;
++ 	u64 top_bit;
++-	u64 carry;
++ 	u64 f0;
++ 	u64 f1;
++ 	u64 f2;
++@@ -970,11 +968,11 @@ static void store_felem(u64 *b, u64 *f)
++ 	u64 o2;
++ 	u64 o3;
++ 	f[3U] = f30 & (u64)0x7fffffffffffffffU;
++-	carry0 = add_scalar(f, f, (u64)19U * top_bit0);
+++	add_scalar(f, f, (u64)19U * top_bit0);
++ 	f31 = f[3U];
++ 	top_bit = f31 >> (u32)63U;
++ 	f[3U] = f31 & (u64)0x7fffffffffffffffU;
++-	carry = add_scalar(f, f, (u64)19U * top_bit);
+++	add_scalar(f, f, (u64)19U * top_bit);
++ 	f0 = f[0U];
++ 	f1 = f[1U];
++ 	f2 = f[2U];
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0061-crypto-arm-curve25519-include-linux-scatterlist.h.patch b/target/linux/generic/backport-5.4/080-wireguard-0061-crypto-arm-curve25519-include-linux-scatterlist.h.patch
+new file mode 100644
+index 0000000000..b58fd08fc9
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0061-crypto-arm-curve25519-include-linux-scatterlist.h.patch
+@@ -0,0 +1,36 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Fabio Estevam <festevam@gmail.com>
++Date: Mon, 24 Aug 2020 11:09:53 -0300
++Subject: [PATCH] crypto: arm/curve25519 - include <linux/scatterlist.h>
++
++commit 6779d0e6b0fe193ab3010ea201782ca6f75a3862 upstream.
++
++Building ARM allmodconfig leads to the following warnings:
++
++arch/arm/crypto/curve25519-glue.c:73:12: error: implicit declaration of function 'sg_copy_to_buffer' [-Werror=implicit-function-declaration]
++arch/arm/crypto/curve25519-glue.c:74:9: error: implicit declaration of function 'sg_nents_for_len' [-Werror=implicit-function-declaration]
++arch/arm/crypto/curve25519-glue.c:88:11: error: implicit declaration of function 'sg_copy_from_buffer' [-Werror=implicit-function-declaration]
++
++Include <linux/scatterlist.h> to fix such warnings
++
++Reported-by: Olof's autobuilder <build@lixom.net>
++Fixes: 0c3dc787a62a ("crypto: algapi - Remove skbuff.h inclusion")
++Signed-off-by: Fabio Estevam <festevam@gmail.com>
++Acked-by: Ard Biesheuvel <ardb@kernel.org>
++Acked-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/curve25519-glue.c | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/arch/arm/crypto/curve25519-glue.c
+++++ b/arch/arm/crypto/curve25519-glue.c
++@@ -16,6 +16,7 @@
++ #include <linux/module.h>
++ #include <linux/init.h>
++ #include <linux/jump_label.h>
+++#include <linux/scatterlist.h>
++ #include <crypto/curve25519.h>
++ 
++ asmlinkage void curve25519_neon(u8 mypublic[CURVE25519_KEY_SIZE],
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0062-crypto-arm-poly1305-Add-prototype-for-poly1305_block.patch b/target/linux/generic/backport-5.4/080-wireguard-0062-crypto-arm-poly1305-Add-prototype-for-poly1305_block.patch
+new file mode 100644
+index 0000000000..cf3724a499
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0062-crypto-arm-poly1305-Add-prototype-for-poly1305_block.patch
+@@ -0,0 +1,33 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Herbert Xu <herbert@gondor.apana.org.au>
++Date: Tue, 25 Aug 2020 11:23:00 +1000
++Subject: [PATCH] crypto: arm/poly1305 - Add prototype for poly1305_blocks_neon
++
++commit 51982ea02aef972132eb35c583d3e4c5b83166e5 upstream.
++
++This patch adds a prototype for poly1305_blocks_neon to slience
++a compiler warning:
++
++  CC [M]  arch/arm/crypto/poly1305-glue.o
++../arch/arm/crypto/poly1305-glue.c:25:13: warning: no previous prototype for `poly1305_blocks_neon' [-Wmissing-prototypes]
++ void __weak poly1305_blocks_neon(void *state, const u8 *src, u32 len, u32 hibit)
++             ^~~~~~~~~~~~~~~~~~~~
++
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Acked-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/poly1305-glue.c | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/arch/arm/crypto/poly1305-glue.c
+++++ b/arch/arm/crypto/poly1305-glue.c
++@@ -20,6 +20,7 @@
++ 
++ void poly1305_init_arm(void *state, const u8 *key);
++ void poly1305_blocks_arm(void *state, const u8 *src, u32 len, u32 hibit);
+++void poly1305_blocks_neon(void *state, const u8 *src, u32 len, u32 hibit);
++ void poly1305_emit_arm(void *state, u8 *digest, const u32 *nonce);
++ 
++ void __weak poly1305_blocks_neon(void *state, const u8 *src, u32 len, u32 hibit)
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0063-crypto-curve25519-x86_64-Use-XORL-r32-32.patch b/target/linux/generic/backport-5.4/080-wireguard-0063-crypto-curve25519-x86_64-Use-XORL-r32-32.patch
+new file mode 100644
+index 0000000000..dd76e2a1f2
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0063-crypto-curve25519-x86_64-Use-XORL-r32-32.patch
+@@ -0,0 +1,261 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Uros Bizjak <ubizjak@gmail.com>
++Date: Thu, 27 Aug 2020 19:30:58 +0200
++Subject: [PATCH] crypto: curve25519-x86_64 - Use XORL r32,32
++
++commit db719539fd3889836900bf912755aa30a5985e9a upstream.
++
++x86_64 zero extends 32bit operations, so for 64bit operands,
++XORL r32,r32 is functionally equal to XORL r64,r64, but avoids
++a REX prefix byte when legacy registers are used.
++
++Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
++Cc: Herbert Xu <herbert@gondor.apana.org.au>
++Cc: "David S. Miller" <davem@davemloft.net>
++Acked-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/curve25519-x86_64.c | 68 ++++++++++++++---------------
++ 1 file changed, 34 insertions(+), 34 deletions(-)
++
++--- a/arch/x86/crypto/curve25519-x86_64.c
+++++ b/arch/x86/crypto/curve25519-x86_64.c
++@@ -45,11 +45,11 @@ static inline u64 add_scalar(u64 *out, c
++ 
++ 	asm volatile(
++ 		/* Clear registers to propagate the carry bit */
++-		"  xor %%r8, %%r8;"
++-		"  xor %%r9, %%r9;"
++-		"  xor %%r10, %%r10;"
++-		"  xor %%r11, %%r11;"
++-		"  xor %1, %1;"
+++		"  xor %%r8d, %%r8d;"
+++		"  xor %%r9d, %%r9d;"
+++		"  xor %%r10d, %%r10d;"
+++		"  xor %%r11d, %%r11d;"
+++		"  xor %k1, %k1;"
++ 
++ 		/* Begin addition chain */
++ 		"  addq 0(%3), %0;"
++@@ -93,7 +93,7 @@ static inline void fadd(u64 *out, const
++ 		"  cmovc %0, %%rax;"
++ 
++ 		/* Step 2: Add carry*38 to the original sum */
++-		"  xor %%rcx, %%rcx;"
+++		"  xor %%ecx, %%ecx;"
++ 		"  add %%rax, %%r8;"
++ 		"  adcx %%rcx, %%r9;"
++ 		"  movq %%r9, 8(%1);"
++@@ -165,28 +165,28 @@ static inline void fmul(u64 *out, const
++ 
++ 		/* Compute src1[0] * src2 */
++ 		"  movq 0(%1), %%rdx;"
++-		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  movq %%r8, 0(%0);"
+++		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10d, %%r10d;"   "  movq %%r8, 0(%0);"
++ 		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  movq %%r10, 8(%0);"
++ 		"  mulxq 16(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"
++ 		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"
++ 		/* Compute src1[1] * src2 */
++ 		"  movq 8(%1), %%rdx;"
++-		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  adcxq 8(%0), %%r8;"    "  movq %%r8, 8(%0);"
+++		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10d, %%r10d;"   "  adcxq 8(%0), %%r8;"    "  movq %%r8, 8(%0);"
++ 		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 16(%0);"
++ 		"  mulxq 16(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  mov $0, %%r8;"
++ 		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
++ 		/* Compute src1[2] * src2 */
++ 		"  movq 16(%1), %%rdx;"
++-		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 16(%0), %%r8;"    "  movq %%r8, 16(%0);"
+++		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10d, %%r10d;"   "  adcxq 16(%0), %%r8;"   "  movq %%r8, 16(%0);"
++ 		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 24(%0);"
++ 		"  mulxq 16(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  mov $0, %%r8;"
++ 		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
++ 		/* Compute src1[3] * src2 */
++ 		"  movq 24(%1), %%rdx;"
++-		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 24(%0), %%r8;"    "  movq %%r8, 24(%0);"
+++		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10d, %%r10d;"   "  adcxq 24(%0), %%r8;"   "  movq %%r8, 24(%0);"
++ 		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 32(%0);"
++ 		"  mulxq 16(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  movq %%rbx, 40(%0);"    "  mov $0, %%r8;"
++ 		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  movq %%r14, 48(%0);"    "  mov $0, %%rax;"
++@@ -200,7 +200,7 @@ static inline void fmul(u64 *out, const
++ 		/* Step 1: Compute dst + carry == tmp_hi * 38 + tmp_lo */
++ 		"  mov $38, %%rdx;"
++ 		"  mulxq 32(%1), %%r8, %%r13;"
++-		"  xor %3, %3;"
+++		"  xor %k3, %k3;"
++ 		"  adoxq 0(%1), %%r8;"
++ 		"  mulxq 40(%1), %%r9, %%rbx;"
++ 		"  adcx %%r13, %%r9;"
++@@ -246,28 +246,28 @@ static inline void fmul2(u64 *out, const
++ 
++ 		/* Compute src1[0] * src2 */
++ 		"  movq 0(%1), %%rdx;"
++-		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  movq %%r8, 0(%0);"
+++		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10d, %%r10d;"   "  movq %%r8, 0(%0);"
++ 		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  movq %%r10, 8(%0);"
++ 		"  mulxq 16(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"
++ 		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"
++ 		/* Compute src1[1] * src2 */
++ 		"  movq 8(%1), %%rdx;"
++-		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  adcxq 8(%0), %%r8;"    "  movq %%r8, 8(%0);"
+++		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10d, %%r10d;"   "  adcxq 8(%0), %%r8;"    "  movq %%r8, 8(%0);"
++ 		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 16(%0);"
++ 		"  mulxq 16(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  mov $0, %%r8;"
++ 		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
++ 		/* Compute src1[2] * src2 */
++ 		"  movq 16(%1), %%rdx;"
++-		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 16(%0), %%r8;"    "  movq %%r8, 16(%0);"
+++		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10d, %%r10d;"   "  adcxq 16(%0), %%r8;"   "  movq %%r8, 16(%0);"
++ 		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 24(%0);"
++ 		"  mulxq 16(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  mov $0, %%r8;"
++ 		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
++ 		/* Compute src1[3] * src2 */
++ 		"  movq 24(%1), %%rdx;"
++-		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 24(%0), %%r8;"    "  movq %%r8, 24(%0);"
+++		"  mulxq 0(%3), %%r8, %%r9;"       "  xor %%r10d, %%r10d;"   "  adcxq 24(%0), %%r8;"   "  movq %%r8, 24(%0);"
++ 		"  mulxq 8(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 32(%0);"
++ 		"  mulxq 16(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  movq %%rbx, 40(%0);"    "  mov $0, %%r8;"
++ 		"  mulxq 24(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  movq %%r14, 48(%0);"    "  mov $0, %%rax;"
++@@ -277,29 +277,29 @@ static inline void fmul2(u64 *out, const
++ 
++ 		/* Compute src1[0] * src2 */
++ 		"  movq 32(%1), %%rdx;"
++-		"  mulxq 32(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  movq %%r8, 64(%0);"
++-		"  mulxq 40(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  movq %%r10, 72(%0);"
+++		"  mulxq 32(%3), %%r8, %%r9;"      "  xor %%r10d, %%r10d;"   "  movq %%r8, 64(%0);"
+++		"  mulxq 40(%3), %%r10, %%r11;"    "  adox %%r9, %%r10;"     "  movq %%r10, 72(%0);"
++ 		"  mulxq 48(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"
++ 		"  mulxq 56(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"
++ 		/* Compute src1[1] * src2 */
++ 		"  movq 40(%1), %%rdx;"
++-		"  mulxq 32(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"     "  adcxq 72(%0), %%r8;"    "  movq %%r8, 72(%0);"
++-		"  mulxq 40(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 80(%0);"
+++		"  mulxq 32(%3), %%r8, %%r9;"      "  xor %%r10d, %%r10d;"   "  adcxq 72(%0), %%r8;"   "  movq %%r8, 72(%0);"
+++		"  mulxq 40(%3), %%r10, %%r11;"    "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 80(%0);"
++ 		"  mulxq 48(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  mov $0, %%r8;"
++ 		"  mulxq 56(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
++ 		/* Compute src1[2] * src2 */
++ 		"  movq 48(%1), %%rdx;"
++-		"  mulxq 32(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 80(%0), %%r8;"    "  movq %%r8, 80(%0);"
++-		"  mulxq 40(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 88(%0);"
+++		"  mulxq 32(%3), %%r8, %%r9;"      "  xor %%r10d, %%r10d;"   "  adcxq 80(%0), %%r8;"   "  movq %%r8, 80(%0);"
+++		"  mulxq 40(%3), %%r10, %%r11;"    "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 88(%0);"
++ 		"  mulxq 48(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  mov $0, %%r8;"
++ 		"  mulxq 56(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"
++ 		/* Compute src1[3] * src2 */
++ 		"  movq 56(%1), %%rdx;"
++-		"  mulxq 32(%3), %%r8, %%r9;"       "  xor %%r10, %%r10;"    "  adcxq 88(%0), %%r8;"    "  movq %%r8, 88(%0);"
++-		"  mulxq 40(%3), %%r10, %%r11;"     "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 96(%0);"
+++		"  mulxq 32(%3), %%r8, %%r9;"      "  xor %%r10d, %%r10d;"   "  adcxq 88(%0), %%r8;"   "  movq %%r8, 88(%0);"
+++		"  mulxq 40(%3), %%r10, %%r11;"    "  adox %%r9, %%r10;"     "  adcx %%rbx, %%r10;"    "  movq %%r10, 96(%0);"
++ 		"  mulxq 48(%3), %%rbx, %%r13;"    "  adox %%r11, %%rbx;"    "  adcx %%r14, %%rbx;"    "  movq %%rbx, 104(%0);"    "  mov $0, %%r8;"
++ 		"  mulxq 56(%3), %%r14, %%rdx;"    "  adox %%r13, %%r14;"    "  adcx %%rax, %%r14;"    "  movq %%r14, 112(%0);"    "  mov $0, %%rax;"
++ 		                                   "  adox %%rdx, %%rax;"    "  adcx %%r8, %%rax;"     "  movq %%rax, 120(%0);"
++@@ -312,7 +312,7 @@ static inline void fmul2(u64 *out, const
++ 		/* Step 1: Compute dst + carry == tmp_hi * 38 + tmp_lo */
++ 		"  mov $38, %%rdx;"
++ 		"  mulxq 32(%1), %%r8, %%r13;"
++-		"  xor %3, %3;"
+++		"  xor %k3, %k3;"
++ 		"  adoxq 0(%1), %%r8;"
++ 		"  mulxq 40(%1), %%r9, %%rbx;"
++ 		"  adcx %%r13, %%r9;"
++@@ -345,7 +345,7 @@ static inline void fmul2(u64 *out, const
++ 		/* Step 1: Compute dst + carry == tmp_hi * 38 + tmp_lo */
++ 		"  mov $38, %%rdx;"
++ 		"  mulxq 96(%1), %%r8, %%r13;"
++-		"  xor %3, %3;"
+++		"  xor %k3, %k3;"
++ 		"  adoxq 64(%1), %%r8;"
++ 		"  mulxq 104(%1), %%r9, %%rbx;"
++ 		"  adcx %%r13, %%r9;"
++@@ -516,7 +516,7 @@ static inline void fsqr(u64 *out, const
++ 
++ 		/* Step 1: Compute all partial products */
++ 		"  movq 0(%1), %%rdx;"                                       /* f[0] */
++-		"  mulxq 8(%1), %%r8, %%r14;"      "  xor %%r15, %%r15;"     /* f[1]*f[0] */
+++		"  mulxq 8(%1), %%r8, %%r14;"      "  xor %%r15d, %%r15d;"   /* f[1]*f[0] */
++ 		"  mulxq 16(%1), %%r9, %%r10;"     "  adcx %%r14, %%r9;"     /* f[2]*f[0] */
++ 		"  mulxq 24(%1), %%rax, %%rcx;"    "  adcx %%rax, %%r10;"    /* f[3]*f[0] */
++ 		"  movq 24(%1), %%rdx;"                                      /* f[3] */
++@@ -526,7 +526,7 @@ static inline void fsqr(u64 *out, const
++ 		"  mulxq 16(%1), %%rax, %%rcx;"    "  mov $0, %%r14;"        /* f[2]*f[1] */
++ 
++ 		/* Step 2: Compute two parallel carry chains */
++-		"  xor %%r15, %%r15;"
+++		"  xor %%r15d, %%r15d;"
++ 		"  adox %%rax, %%r10;"
++ 		"  adcx %%r8, %%r8;"
++ 		"  adox %%rcx, %%r11;"
++@@ -563,7 +563,7 @@ static inline void fsqr(u64 *out, const
++ 		/* Step 1: Compute dst + carry == tmp_hi * 38 + tmp_lo */
++ 		"  mov $38, %%rdx;"
++ 		"  mulxq 32(%1), %%r8, %%r13;"
++-		"  xor %%rcx, %%rcx;"
+++		"  xor %%ecx, %%ecx;"
++ 		"  adoxq 0(%1), %%r8;"
++ 		"  mulxq 40(%1), %%r9, %%rbx;"
++ 		"  adcx %%r13, %%r9;"
++@@ -607,7 +607,7 @@ static inline void fsqr2(u64 *out, const
++ 	asm volatile(
++ 		/* Step 1: Compute all partial products */
++ 		"  movq 0(%1), %%rdx;"                                       /* f[0] */
++-		"  mulxq 8(%1), %%r8, %%r14;"      "  xor %%r15, %%r15;"     /* f[1]*f[0] */
+++		"  mulxq 8(%1), %%r8, %%r14;"      "  xor %%r15d, %%r15d;"   /* f[1]*f[0] */
++ 		"  mulxq 16(%1), %%r9, %%r10;"     "  adcx %%r14, %%r9;"     /* f[2]*f[0] */
++ 		"  mulxq 24(%1), %%rax, %%rcx;"    "  adcx %%rax, %%r10;"    /* f[3]*f[0] */
++ 		"  movq 24(%1), %%rdx;"                                      /* f[3] */
++@@ -617,7 +617,7 @@ static inline void fsqr2(u64 *out, const
++ 		"  mulxq 16(%1), %%rax, %%rcx;"    "  mov $0, %%r14;"        /* f[2]*f[1] */
++ 
++ 		/* Step 2: Compute two parallel carry chains */
++-		"  xor %%r15, %%r15;"
+++		"  xor %%r15d, %%r15d;"
++ 		"  adox %%rax, %%r10;"
++ 		"  adcx %%r8, %%r8;"
++ 		"  adox %%rcx, %%r11;"
++@@ -647,7 +647,7 @@ static inline void fsqr2(u64 *out, const
++ 
++ 		/* Step 1: Compute all partial products */
++ 		"  movq 32(%1), %%rdx;"                                       /* f[0] */
++-		"  mulxq 40(%1), %%r8, %%r14;"      "  xor %%r15, %%r15;"     /* f[1]*f[0] */
+++		"  mulxq 40(%1), %%r8, %%r14;"     "  xor %%r15d, %%r15d;"   /* f[1]*f[0] */
++ 		"  mulxq 48(%1), %%r9, %%r10;"     "  adcx %%r14, %%r9;"     /* f[2]*f[0] */
++ 		"  mulxq 56(%1), %%rax, %%rcx;"    "  adcx %%rax, %%r10;"    /* f[3]*f[0] */
++ 		"  movq 56(%1), %%rdx;"                                      /* f[3] */
++@@ -657,7 +657,7 @@ static inline void fsqr2(u64 *out, const
++ 		"  mulxq 48(%1), %%rax, %%rcx;"    "  mov $0, %%r14;"        /* f[2]*f[1] */
++ 
++ 		/* Step 2: Compute two parallel carry chains */
++-		"  xor %%r15, %%r15;"
+++		"  xor %%r15d, %%r15d;"
++ 		"  adox %%rax, %%r10;"
++ 		"  adcx %%r8, %%r8;"
++ 		"  adox %%rcx, %%r11;"
++@@ -692,7 +692,7 @@ static inline void fsqr2(u64 *out, const
++ 		/* Step 1: Compute dst + carry == tmp_hi * 38 + tmp_lo */
++ 		"  mov $38, %%rdx;"
++ 		"  mulxq 32(%1), %%r8, %%r13;"
++-		"  xor %%rcx, %%rcx;"
+++		"  xor %%ecx, %%ecx;"
++ 		"  adoxq 0(%1), %%r8;"
++ 		"  mulxq 40(%1), %%r9, %%rbx;"
++ 		"  adcx %%r13, %%r9;"
++@@ -725,7 +725,7 @@ static inline void fsqr2(u64 *out, const
++ 		/* Step 1: Compute dst + carry == tmp_hi * 38 + tmp_lo */
++ 		"  mov $38, %%rdx;"
++ 		"  mulxq 96(%1), %%r8, %%r13;"
++-		"  xor %%rcx, %%rcx;"
+++		"  xor %%ecx, %%ecx;"
++ 		"  adoxq 64(%1), %%r8;"
++ 		"  mulxq 104(%1), %%r9, %%rbx;"
++ 		"  adcx %%r13, %%r9;"
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0064-crypto-poly1305-x86_64-Use-XORL-r32-32.patch b/target/linux/generic/backport-5.4/080-wireguard-0064-crypto-poly1305-x86_64-Use-XORL-r32-32.patch
+new file mode 100644
+index 0000000000..4fcaa1eb75
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0064-crypto-poly1305-x86_64-Use-XORL-r32-32.patch
+@@ -0,0 +1,59 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Uros Bizjak <ubizjak@gmail.com>
++Date: Thu, 27 Aug 2020 19:38:31 +0200
++Subject: [PATCH] crypto: poly1305-x86_64 - Use XORL r32,32
++
++commit 7dfd1e01b3dfc13431b1b25720cf2692a7e111ef upstream.
++
++x86_64 zero extends 32bit operations, so for 64bit operands,
++XORL r32,r32 is functionally equal to XORQ r64,r64, but avoids
++a REX prefix byte when legacy registers are used.
++
++Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
++Cc: Herbert Xu <herbert@gondor.apana.org.au>
++Cc: "David S. Miller" <davem@davemloft.net>
++Acked-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/poly1305-x86_64-cryptogams.pl | 8 ++++----
++ 1 file changed, 4 insertions(+), 4 deletions(-)
++
++--- a/arch/x86/crypto/poly1305-x86_64-cryptogams.pl
+++++ b/arch/x86/crypto/poly1305-x86_64-cryptogams.pl
++@@ -246,7 +246,7 @@ $code.=<<___ if (!$kernel);
++ ___
++ &declare_function("poly1305_init_x86_64", 32, 3);
++ $code.=<<___;
++-	xor	%rax,%rax
+++	xor	%eax,%eax
++ 	mov	%rax,0($ctx)		# initialize hash value
++ 	mov	%rax,8($ctx)
++ 	mov	%rax,16($ctx)
++@@ -2869,7 +2869,7 @@ $code.=<<___;
++ .type	poly1305_init_base2_44,\@function,3
++ .align	32
++ poly1305_init_base2_44:
++-	xor	%rax,%rax
+++	xor	%eax,%eax
++ 	mov	%rax,0($ctx)		# initialize hash value
++ 	mov	%rax,8($ctx)
++ 	mov	%rax,16($ctx)
++@@ -3963,7 +3963,7 @@ xor128_decrypt_n_pad:
++ 	mov	\$16,$len
++ 	sub	%r10,$len
++ 	xor	%eax,%eax
++-	xor	%r11,%r11
+++	xor	%r11d,%r11d
++ .Loop_dec_byte:
++ 	mov	($inp,$otp),%r11b
++ 	mov	($otp),%al
++@@ -4101,7 +4101,7 @@ avx_handler:
++ 	.long	0xa548f3fc		# cld; rep movsq
++ 
++ 	mov	$disp,%rsi
++-	xor	%rcx,%rcx		# arg1, UNW_FLAG_NHANDLER
+++	xor	%ecx,%ecx		# arg1, UNW_FLAG_NHANDLER
++ 	mov	8(%rsi),%rdx		# arg2, disp->ImageBase
++ 	mov	0(%rsi),%r8		# arg3, disp->ControlPc
++ 	mov	16(%rsi),%r9		# arg4, disp->FunctionEntry
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0065-crypto-x86-poly1305-Remove-assignments-with-no-effec.patch b/target/linux/generic/backport-5.4/080-wireguard-0065-crypto-x86-poly1305-Remove-assignments-with-no-effec.patch
+new file mode 100644
+index 0000000000..ee64bfe1fc
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0065-crypto-x86-poly1305-Remove-assignments-with-no-effec.patch
+@@ -0,0 +1,29 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Herbert Xu <herbert@gondor.apana.org.au>
++Date: Thu, 24 Sep 2020 13:29:04 +1000
++Subject: [PATCH] crypto: x86/poly1305 - Remove assignments with no effect
++
++commit 4a0c1de64bf9d9027a6f19adfba89fc27893db23 upstream.
++
++This patch removes a few ineffectual assignments from the function
++crypto_poly1305_setdctxkey.
++
++Reported-by: kernel test robot <lkp@intel.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/poly1305_glue.c | 3 ---
++ 1 file changed, 3 deletions(-)
++
++--- a/arch/x86/crypto/poly1305_glue.c
+++++ b/arch/x86/crypto/poly1305_glue.c
++@@ -157,9 +157,6 @@ static unsigned int crypto_poly1305_setd
++ 			dctx->s[1] = get_unaligned_le32(&inp[4]);
++ 			dctx->s[2] = get_unaligned_le32(&inp[8]);
++ 			dctx->s[3] = get_unaligned_le32(&inp[12]);
++-			inp += POLY1305_BLOCK_SIZE;
++-			len -= POLY1305_BLOCK_SIZE;
++-			acc += POLY1305_BLOCK_SIZE;
++ 			dctx->sset = true;
++ 		}
++ 	}
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0066-crypto-x86-poly1305-add-back-a-needed-assignment.patch b/target/linux/generic/backport-5.4/080-wireguard-0066-crypto-x86-poly1305-add-back-a-needed-assignment.patch
+new file mode 100644
+index 0000000000..dce8bb912b
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0066-crypto-x86-poly1305-add-back-a-needed-assignment.patch
+@@ -0,0 +1,33 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Eric Biggers <ebiggers@google.com>
++Date: Fri, 23 Oct 2020 15:27:48 -0700
++Subject: [PATCH] crypto: x86/poly1305 - add back a needed assignment
++
++commit c3a98c3ad5c0dc60a1ac66bf91147a3f39cac96b upstream.
++
++One of the assignments that was removed by commit 4a0c1de64bf9 ("crypto:
++x86/poly1305 - Remove assignments with no effect") is actually needed,
++since it affects the return value.
++
++This fixes the following crypto self-test failure:
++
++    alg: shash: poly1305-simd test failed (wrong result) on test vector 2, cfg="init+update+final aligned buffer"
++
++Fixes: 4a0c1de64bf9 ("crypto: x86/poly1305 - Remove assignments with no effect")
++Signed-off-by: Eric Biggers <ebiggers@google.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/x86/crypto/poly1305_glue.c | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/arch/x86/crypto/poly1305_glue.c
+++++ b/arch/x86/crypto/poly1305_glue.c
++@@ -157,6 +157,7 @@ static unsigned int crypto_poly1305_setd
++ 			dctx->s[1] = get_unaligned_le32(&inp[4]);
++ 			dctx->s[2] = get_unaligned_le32(&inp[8]);
++ 			dctx->s[3] = get_unaligned_le32(&inp[12]);
+++			acc += POLY1305_BLOCK_SIZE;
++ 			dctx->sset = true;
++ 		}
++ 	}
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0067-crypto-Kconfig-CRYPTO_MANAGER_EXTRA_TESTS-requires-t.patch b/target/linux/generic/backport-5.4/080-wireguard-0067-crypto-Kconfig-CRYPTO_MANAGER_EXTRA_TESTS-requires-t.patch
+new file mode 100644
+index 0000000000..31c47df4b3
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0067-crypto-Kconfig-CRYPTO_MANAGER_EXTRA_TESTS-requires-t.patch
+@@ -0,0 +1,33 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Mon, 2 Nov 2020 14:48:15 +0100
++Subject: [PATCH] crypto: Kconfig - CRYPTO_MANAGER_EXTRA_TESTS requires the
++ manager
++
++commit 6569e3097f1c4a490bdf2b23d326855e04942dfd upstream.
++
++The extra tests in the manager actually require the manager to be
++selected too. Otherwise the linker gives errors like:
++
++ld: arch/x86/crypto/chacha_glue.o: in function `chacha_simd_stream_xor':
++chacha_glue.c:(.text+0x422): undefined reference to `crypto_simd_disabled_for_test'
++
++Fixes: 2343d1529aff ("crypto: Kconfig - allow tests to be disabled when manager is disabled")
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ crypto/Kconfig | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -145,7 +145,7 @@ config CRYPTO_MANAGER_DISABLE_TESTS
++ 
++ config CRYPTO_MANAGER_EXTRA_TESTS
++ 	bool "Enable extra run-time crypto self tests"
++-	depends on DEBUG_KERNEL && !CRYPTO_MANAGER_DISABLE_TESTS
+++	depends on DEBUG_KERNEL && !CRYPTO_MANAGER_DISABLE_TESTS && CRYPTO_MANAGER
++ 	help
++ 	  Enable extra run-time self tests of registered crypto algorithms,
++ 	  including randomized fuzz tests.
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0068-crypto-arm-chacha-neon-optimize-for-non-block-size-m.patch b/target/linux/generic/backport-5.4/080-wireguard-0068-crypto-arm-chacha-neon-optimize-for-non-block-size-m.patch
+new file mode 100644
+index 0000000000..b31b8d9a0e
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0068-crypto-arm-chacha-neon-optimize-for-non-block-size-m.patch
+@@ -0,0 +1,272 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Tue, 3 Nov 2020 17:28:09 +0100
++Subject: [PATCH] crypto: arm/chacha-neon - optimize for non-block size
++ multiples
++
++commit 86cd97ec4b943af35562a74688bc4e909b32c3d1 upstream.
++
++The current NEON based ChaCha implementation for ARM is optimized for
++multiples of 4x the ChaCha block size (64 bytes). This makes sense for
++block encryption, but given that ChaCha is also often used in the
++context of networking, it makes sense to consider arbitrary length
++inputs as well.
++
++For example, WireGuard typically uses 1420 byte packets, and performing
++ChaCha encryption involves 5 invocations of chacha_4block_xor_neon()
++and 3 invocations of chacha_block_xor_neon(), where the last one also
++involves a memcpy() using a buffer on the stack to process the final
++chunk of 1420 % 64 == 12 bytes.
++
++Let's optimize for this case as well, by letting chacha_4block_xor_neon()
++deal with any input size between 64 and 256 bytes, using NEON permutation
++instructions and overlapping loads and stores. This way, the 140 byte
++tail of a 1420 byte input buffer can simply be processed in one go.
++
++This results in the following performance improvements for 1420 byte
++blocks, without significant impact on power-of-2 input sizes. (Note
++that Raspberry Pi is widely used in combination with a 32-bit kernel,
++even though the core is 64-bit capable)
++
++   Cortex-A8  (BeagleBone)       :   7%
++   Cortex-A15 (Calxeda Midway)   :  21%
++   Cortex-A53 (Raspberry Pi 3)   :   3%
++   Cortex-A72 (Raspberry Pi 4)   :  19%
++
++Cc: Eric Biggers <ebiggers@google.com>
++Cc: "Jason A . Donenfeld" <Jason@zx2c4.com>
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/chacha-glue.c      | 34 +++++------
++ arch/arm/crypto/chacha-neon-core.S | 97 +++++++++++++++++++++++++++---
++ 2 files changed, 107 insertions(+), 24 deletions(-)
++
++--- a/arch/arm/crypto/chacha-glue.c
+++++ b/arch/arm/crypto/chacha-glue.c
++@@ -23,7 +23,7 @@
++ asmlinkage void chacha_block_xor_neon(const u32 *state, u8 *dst, const u8 *src,
++ 				      int nrounds);
++ asmlinkage void chacha_4block_xor_neon(const u32 *state, u8 *dst, const u8 *src,
++-				       int nrounds);
+++				       int nrounds, unsigned int nbytes);
++ asmlinkage void hchacha_block_arm(const u32 *state, u32 *out, int nrounds);
++ asmlinkage void hchacha_block_neon(const u32 *state, u32 *out, int nrounds);
++ 
++@@ -42,24 +42,24 @@ static void chacha_doneon(u32 *state, u8
++ {
++ 	u8 buf[CHACHA_BLOCK_SIZE];
++ 
++-	while (bytes >= CHACHA_BLOCK_SIZE * 4) {
++-		chacha_4block_xor_neon(state, dst, src, nrounds);
++-		bytes -= CHACHA_BLOCK_SIZE * 4;
++-		src += CHACHA_BLOCK_SIZE * 4;
++-		dst += CHACHA_BLOCK_SIZE * 4;
++-		state[12] += 4;
++-	}
++-	while (bytes >= CHACHA_BLOCK_SIZE) {
++-		chacha_block_xor_neon(state, dst, src, nrounds);
++-		bytes -= CHACHA_BLOCK_SIZE;
++-		src += CHACHA_BLOCK_SIZE;
++-		dst += CHACHA_BLOCK_SIZE;
++-		state[12]++;
+++	while (bytes > CHACHA_BLOCK_SIZE) {
+++		unsigned int l = min(bytes, CHACHA_BLOCK_SIZE * 4U);
+++
+++		chacha_4block_xor_neon(state, dst, src, nrounds, l);
+++		bytes -= l;
+++		src += l;
+++		dst += l;
+++		state[12] += DIV_ROUND_UP(l, CHACHA_BLOCK_SIZE);
++ 	}
++ 	if (bytes) {
++-		memcpy(buf, src, bytes);
++-		chacha_block_xor_neon(state, buf, buf, nrounds);
++-		memcpy(dst, buf, bytes);
+++		const u8 *s = src;
+++		u8 *d = dst;
+++
+++		if (bytes != CHACHA_BLOCK_SIZE)
+++			s = d = memcpy(buf, src, bytes);
+++		chacha_block_xor_neon(state, d, s, nrounds);
+++		if (d != dst)
+++			memcpy(dst, buf, bytes);
++ 	}
++ }
++ 
++--- a/arch/arm/crypto/chacha-neon-core.S
+++++ b/arch/arm/crypto/chacha-neon-core.S
++@@ -47,6 +47,7 @@
++   */
++ 
++ #include <linux/linkage.h>
+++#include <asm/cache.h>
++ 
++ 	.text
++ 	.fpu		neon
++@@ -205,7 +206,7 @@ ENDPROC(hchacha_block_neon)
++ 
++ 	.align		5
++ ENTRY(chacha_4block_xor_neon)
++-	push		{r4-r5}
+++	push		{r4, lr}
++ 	mov		r4, sp			// preserve the stack pointer
++ 	sub		ip, sp, #0x20		// allocate a 32 byte buffer
++ 	bic		ip, ip, #0x1f		// aligned to 32 bytes
++@@ -229,10 +230,10 @@ ENTRY(chacha_4block_xor_neon)
++ 	vld1.32		{q0-q1}, [r0]
++ 	vld1.32		{q2-q3}, [ip]
++ 
++-	adr		r5, .Lctrinc
+++	adr		lr, .Lctrinc
++ 	vdup.32		q15, d7[1]
++ 	vdup.32		q14, d7[0]
++-	vld1.32		{q4}, [r5, :128]
+++	vld1.32		{q4}, [lr, :128]
++ 	vdup.32		q13, d6[1]
++ 	vdup.32		q12, d6[0]
++ 	vdup.32		q11, d5[1]
++@@ -455,7 +456,7 @@ ENTRY(chacha_4block_xor_neon)
++ 
++ 	// Re-interleave the words in the first two rows of each block (x0..7).
++ 	// Also add the counter values 0-3 to x12[0-3].
++-	  vld1.32	{q8}, [r5, :128]	// load counter values 0-3
+++	  vld1.32	{q8}, [lr, :128]	// load counter values 0-3
++ 	vzip.32		q0, q1			// => (0 1 0 1) (0 1 0 1)
++ 	vzip.32		q2, q3			// => (2 3 2 3) (2 3 2 3)
++ 	vzip.32		q4, q5			// => (4 5 4 5) (4 5 4 5)
++@@ -493,6 +494,8 @@ ENTRY(chacha_4block_xor_neon)
++ 
++ 	// Re-interleave the words in the last two rows of each block (x8..15).
++ 	vld1.32		{q8-q9}, [sp, :256]
+++	  mov		sp, r4		// restore original stack pointer
+++	  ldr		r4, [r4, #8]	// load number of bytes
++ 	vzip.32		q12, q13	// => (12 13 12 13) (12 13 12 13)
++ 	vzip.32		q14, q15	// => (14 15 14 15) (14 15 14 15)
++ 	vzip.32		q8, q9		// => (8 9 8 9) (8 9 8 9)
++@@ -520,41 +523,121 @@ ENTRY(chacha_4block_xor_neon)
++ 	// XOR the rest of the data with the keystream
++ 
++ 	vld1.8		{q0-q1}, [r2]!
+++	subs		r4, r4, #96
++ 	veor		q0, q0, q8
++ 	veor		q1, q1, q12
+++	ble		.Lle96
++ 	vst1.8		{q0-q1}, [r1]!
++ 
++ 	vld1.8		{q0-q1}, [r2]!
+++	subs		r4, r4, #32
++ 	veor		q0, q0, q2
++ 	veor		q1, q1, q6
+++	ble		.Lle128
++ 	vst1.8		{q0-q1}, [r1]!
++ 
++ 	vld1.8		{q0-q1}, [r2]!
+++	subs		r4, r4, #32
++ 	veor		q0, q0, q10
++ 	veor		q1, q1, q14
+++	ble		.Lle160
++ 	vst1.8		{q0-q1}, [r1]!
++ 
++ 	vld1.8		{q0-q1}, [r2]!
+++	subs		r4, r4, #32
++ 	veor		q0, q0, q4
++ 	veor		q1, q1, q5
+++	ble		.Lle192
++ 	vst1.8		{q0-q1}, [r1]!
++ 
++ 	vld1.8		{q0-q1}, [r2]!
+++	subs		r4, r4, #32
++ 	veor		q0, q0, q9
++ 	veor		q1, q1, q13
+++	ble		.Lle224
++ 	vst1.8		{q0-q1}, [r1]!
++ 
++ 	vld1.8		{q0-q1}, [r2]!
+++	subs		r4, r4, #32
++ 	veor		q0, q0, q3
++ 	veor		q1, q1, q7
+++	blt		.Llt256
+++.Lout:
++ 	vst1.8		{q0-q1}, [r1]!
++ 
++ 	vld1.8		{q0-q1}, [r2]
++-	  mov		sp, r4		// restore original stack pointer
++ 	veor		q0, q0, q11
++ 	veor		q1, q1, q15
++ 	vst1.8		{q0-q1}, [r1]
++ 
++-	pop		{r4-r5}
++-	bx		lr
+++	pop		{r4, pc}
+++
+++.Lle192:
+++	vmov		q4, q9
+++	vmov		q5, q13
+++
+++.Lle160:
+++	// nothing to do
+++
+++.Lfinalblock:
+++	// Process the final block if processing less than 4 full blocks.
+++	// Entered with 32 bytes of ChaCha cipher stream in q4-q5, and the
+++	// previous 32 byte output block that still needs to be written at
+++	// [r1] in q0-q1.
+++	beq		.Lfullblock
+++
+++.Lpartialblock:
+++	adr		lr, .Lpermute + 32
+++	add		r2, r2, r4
+++	add		lr, lr, r4
+++	add		r4, r4, r1
+++
+++	vld1.8		{q2-q3}, [lr]
+++	vld1.8		{q6-q7}, [r2]
+++
+++	add		r4, r4, #32
+++
+++	vtbl.8		d4, {q4-q5}, d4
+++	vtbl.8		d5, {q4-q5}, d5
+++	vtbl.8		d6, {q4-q5}, d6
+++	vtbl.8		d7, {q4-q5}, d7
+++
+++	veor		q6, q6, q2
+++	veor		q7, q7, q3
+++
+++	vst1.8		{q6-q7}, [r4]	// overlapping stores
+++	vst1.8		{q0-q1}, [r1]
+++	pop		{r4, pc}
+++
+++.Lfullblock:
+++	vmov		q11, q4
+++	vmov		q15, q5
+++	b		.Lout
+++.Lle96:
+++	vmov		q4, q2
+++	vmov		q5, q6
+++	b		.Lfinalblock
+++.Lle128:
+++	vmov		q4, q10
+++	vmov		q5, q14
+++	b		.Lfinalblock
+++.Lle224:
+++	vmov		q4, q3
+++	vmov		q5, q7
+++	b		.Lfinalblock
+++.Llt256:
+++	vmov		q4, q11
+++	vmov		q5, q15
+++	b		.Lpartialblock
++ ENDPROC(chacha_4block_xor_neon)
+++
+++	.align		L1_CACHE_SHIFT
+++.Lpermute:
+++	.byte		0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07
+++	.byte		0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
+++	.byte		0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17
+++	.byte		0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f
+++	.byte		0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07
+++	.byte		0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
+++	.byte		0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17
+++	.byte		0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0069-crypto-arm64-chacha-simplify-tail-block-handling.patch b/target/linux/generic/backport-5.4/080-wireguard-0069-crypto-arm64-chacha-simplify-tail-block-handling.patch
+new file mode 100644
+index 0000000000..42e9048b99
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0069-crypto-arm64-chacha-simplify-tail-block-handling.patch
+@@ -0,0 +1,324 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Fri, 6 Nov 2020 17:39:38 +0100
++Subject: [PATCH] crypto: arm64/chacha - simplify tail block handling
++
++commit c4fc6328d6c67690a7e6e03f43a5a976a13120ef upstream.
++
++Based on lessons learnt from optimizing the 32-bit version of this driver,
++we can simplify the arm64 version considerably, by reordering the final
++two stores when the last block is not a multiple of 64 bytes. This removes
++the need to use permutation instructions to calculate the elements that are
++clobbered by the final overlapping store, given that the store of the
++penultimate block now follows it, and that one carries the correct values
++for those elements already.
++
++While at it, simplify the overlapping loads as well, by calculating the
++address of the final overlapping load upfront, and switching to this
++address for every load that would otherwise extend past the end of the
++source buffer.
++
++There is no impact on performance, but the resulting code is substantially
++smaller and easier to follow.
++
++Cc: Eric Biggers <ebiggers@google.com>
++Cc: "Jason A . Donenfeld" <Jason@zx2c4.com>
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm64/crypto/chacha-neon-core.S | 193 ++++++++++-----------------
++ 1 file changed, 69 insertions(+), 124 deletions(-)
++
++--- a/arch/arm64/crypto/chacha-neon-core.S
+++++ b/arch/arm64/crypto/chacha-neon-core.S
++@@ -195,7 +195,6 @@ ENTRY(chacha_4block_xor_neon)
++ 	adr_l		x10, .Lpermute
++ 	and		x5, x4, #63
++ 	add		x10, x10, x5
++-	add		x11, x10, #64
++ 
++ 	//
++ 	// This function encrypts four consecutive ChaCha blocks by loading
++@@ -645,11 +644,11 @@ CPU_BE(	  rev		a15, a15	)
++ 	zip2		v31.4s, v14.4s, v15.4s
++ 	  eor		a15, a15, w9
++ 
++-	mov		x3, #64
+++	add		x3, x2, x4
+++	sub		x3, x3, #128		// start of last block
+++
++ 	subs		x5, x4, #128
++-	add		x6, x5, x2
++-	csel		x3, x3, xzr, ge
++-	csel		x2, x2, x6, ge
+++	csel		x2, x2, x3, ge
++ 
++ 	// interleave 64-bit words in state n, n+2
++ 	zip1		v0.2d, v16.2d, v18.2d
++@@ -658,13 +657,10 @@ CPU_BE(	  rev		a15, a15	)
++ 	zip1		v8.2d, v17.2d, v19.2d
++ 	zip2		v12.2d, v17.2d, v19.2d
++ 	  stp		a2, a3, [x1, #-56]
++-	ld1		{v16.16b-v19.16b}, [x2], x3
++ 
++ 	subs		x6, x4, #192
++-	ccmp		x3, xzr, #4, lt
++-	add		x7, x6, x2
++-	csel		x3, x3, xzr, eq
++-	csel		x2, x2, x7, eq
+++	ld1		{v16.16b-v19.16b}, [x2], #64
+++	csel		x2, x2, x3, ge
++ 
++ 	zip1		v1.2d, v20.2d, v22.2d
++ 	zip2		v5.2d, v20.2d, v22.2d
++@@ -672,13 +668,10 @@ CPU_BE(	  rev		a15, a15	)
++ 	zip1		v9.2d, v21.2d, v23.2d
++ 	zip2		v13.2d, v21.2d, v23.2d
++ 	  stp		a6, a7, [x1, #-40]
++-	ld1		{v20.16b-v23.16b}, [x2], x3
++ 
++ 	subs		x7, x4, #256
++-	ccmp		x3, xzr, #4, lt
++-	add		x8, x7, x2
++-	csel		x3, x3, xzr, eq
++-	csel		x2, x2, x8, eq
+++	ld1		{v20.16b-v23.16b}, [x2], #64
+++	csel		x2, x2, x3, ge
++ 
++ 	zip1		v2.2d, v24.2d, v26.2d
++ 	zip2		v6.2d, v24.2d, v26.2d
++@@ -686,12 +679,10 @@ CPU_BE(	  rev		a15, a15	)
++ 	zip1		v10.2d, v25.2d, v27.2d
++ 	zip2		v14.2d, v25.2d, v27.2d
++ 	  stp		a10, a11, [x1, #-24]
++-	ld1		{v24.16b-v27.16b}, [x2], x3
++ 
++ 	subs		x8, x4, #320
++-	ccmp		x3, xzr, #4, lt
++-	add		x9, x8, x2
++-	csel		x2, x2, x9, eq
+++	ld1		{v24.16b-v27.16b}, [x2], #64
+++	csel		x2, x2, x3, ge
++ 
++ 	zip1		v3.2d, v28.2d, v30.2d
++ 	zip2		v7.2d, v28.2d, v30.2d
++@@ -699,151 +690,105 @@ CPU_BE(	  rev		a15, a15	)
++ 	zip1		v11.2d, v29.2d, v31.2d
++ 	zip2		v15.2d, v29.2d, v31.2d
++ 	  stp		a14, a15, [x1, #-8]
+++
+++	tbnz		x5, #63, .Lt128
++ 	ld1		{v28.16b-v31.16b}, [x2]
++ 
++ 	// xor with corresponding input, write to output
++-	tbnz		x5, #63, 0f
++ 	eor		v16.16b, v16.16b, v0.16b
++ 	eor		v17.16b, v17.16b, v1.16b
++ 	eor		v18.16b, v18.16b, v2.16b
++ 	eor		v19.16b, v19.16b, v3.16b
++-	st1		{v16.16b-v19.16b}, [x1], #64
++-	cbz		x5, .Lout
++ 
++-	tbnz		x6, #63, 1f
+++	tbnz		x6, #63, .Lt192
+++
++ 	eor		v20.16b, v20.16b, v4.16b
++ 	eor		v21.16b, v21.16b, v5.16b
++ 	eor		v22.16b, v22.16b, v6.16b
++ 	eor		v23.16b, v23.16b, v7.16b
++-	st1		{v20.16b-v23.16b}, [x1], #64
++-	cbz		x6, .Lout
++ 
++-	tbnz		x7, #63, 2f
+++	st1		{v16.16b-v19.16b}, [x1], #64
+++	tbnz		x7, #63, .Lt256
+++
++ 	eor		v24.16b, v24.16b, v8.16b
++ 	eor		v25.16b, v25.16b, v9.16b
++ 	eor		v26.16b, v26.16b, v10.16b
++ 	eor		v27.16b, v27.16b, v11.16b
++-	st1		{v24.16b-v27.16b}, [x1], #64
++-	cbz		x7, .Lout
++ 
++-	tbnz		x8, #63, 3f
+++	st1		{v20.16b-v23.16b}, [x1], #64
+++	tbnz		x8, #63, .Lt320
+++
++ 	eor		v28.16b, v28.16b, v12.16b
++ 	eor		v29.16b, v29.16b, v13.16b
++ 	eor		v30.16b, v30.16b, v14.16b
++ 	eor		v31.16b, v31.16b, v15.16b
+++
+++	st1		{v24.16b-v27.16b}, [x1], #64
++ 	st1		{v28.16b-v31.16b}, [x1]
++ 
++ .Lout:	frame_pop
++ 	ret
++ 
++-	// fewer than 128 bytes of in/output
++-0:	ld1		{v8.16b}, [x10]
++-	ld1		{v9.16b}, [x11]
++-	movi		v10.16b, #16
++-	sub		x2, x1, #64
++-	add		x1, x1, x5
++-	ld1		{v16.16b-v19.16b}, [x2]
++-	tbl		v4.16b, {v0.16b-v3.16b}, v8.16b
++-	tbx		v20.16b, {v16.16b-v19.16b}, v9.16b
++-	add		v8.16b, v8.16b, v10.16b
++-	add		v9.16b, v9.16b, v10.16b
++-	tbl		v5.16b, {v0.16b-v3.16b}, v8.16b
++-	tbx		v21.16b, {v16.16b-v19.16b}, v9.16b
++-	add		v8.16b, v8.16b, v10.16b
++-	add		v9.16b, v9.16b, v10.16b
++-	tbl		v6.16b, {v0.16b-v3.16b}, v8.16b
++-	tbx		v22.16b, {v16.16b-v19.16b}, v9.16b
++-	add		v8.16b, v8.16b, v10.16b
++-	add		v9.16b, v9.16b, v10.16b
++-	tbl		v7.16b, {v0.16b-v3.16b}, v8.16b
++-	tbx		v23.16b, {v16.16b-v19.16b}, v9.16b
++-
++-	eor		v20.16b, v20.16b, v4.16b
++-	eor		v21.16b, v21.16b, v5.16b
++-	eor		v22.16b, v22.16b, v6.16b
++-	eor		v23.16b, v23.16b, v7.16b
++-	st1		{v20.16b-v23.16b}, [x1]
++-	b		.Lout
++-
++ 	// fewer than 192 bytes of in/output
++-1:	ld1		{v8.16b}, [x10]
++-	ld1		{v9.16b}, [x11]
++-	movi		v10.16b, #16
++-	add		x1, x1, x6
++-	tbl		v0.16b, {v4.16b-v7.16b}, v8.16b
++-	tbx		v20.16b, {v16.16b-v19.16b}, v9.16b
++-	add		v8.16b, v8.16b, v10.16b
++-	add		v9.16b, v9.16b, v10.16b
++-	tbl		v1.16b, {v4.16b-v7.16b}, v8.16b
++-	tbx		v21.16b, {v16.16b-v19.16b}, v9.16b
++-	add		v8.16b, v8.16b, v10.16b
++-	add		v9.16b, v9.16b, v10.16b
++-	tbl		v2.16b, {v4.16b-v7.16b}, v8.16b
++-	tbx		v22.16b, {v16.16b-v19.16b}, v9.16b
++-	add		v8.16b, v8.16b, v10.16b
++-	add		v9.16b, v9.16b, v10.16b
++-	tbl		v3.16b, {v4.16b-v7.16b}, v8.16b
++-	tbx		v23.16b, {v16.16b-v19.16b}, v9.16b
++-
++-	eor		v20.16b, v20.16b, v0.16b
++-	eor		v21.16b, v21.16b, v1.16b
++-	eor		v22.16b, v22.16b, v2.16b
++-	eor		v23.16b, v23.16b, v3.16b
++-	st1		{v20.16b-v23.16b}, [x1]
+++.Lt192:	cbz		x5, 1f				// exactly 128 bytes?
+++	ld1		{v28.16b-v31.16b}, [x10]
+++	add		x5, x5, x1
+++	tbl		v28.16b, {v4.16b-v7.16b}, v28.16b
+++	tbl		v29.16b, {v4.16b-v7.16b}, v29.16b
+++	tbl		v30.16b, {v4.16b-v7.16b}, v30.16b
+++	tbl		v31.16b, {v4.16b-v7.16b}, v31.16b
+++
+++0:	eor		v20.16b, v20.16b, v28.16b
+++	eor		v21.16b, v21.16b, v29.16b
+++	eor		v22.16b, v22.16b, v30.16b
+++	eor		v23.16b, v23.16b, v31.16b
+++	st1		{v20.16b-v23.16b}, [x5]		// overlapping stores
+++1:	st1		{v16.16b-v19.16b}, [x1]
++ 	b		.Lout
++ 
+++	// fewer than 128 bytes of in/output
+++.Lt128:	ld1		{v28.16b-v31.16b}, [x10]
+++	add		x5, x5, x1
+++	sub		x1, x1, #64
+++	tbl		v28.16b, {v0.16b-v3.16b}, v28.16b
+++	tbl		v29.16b, {v0.16b-v3.16b}, v29.16b
+++	tbl		v30.16b, {v0.16b-v3.16b}, v30.16b
+++	tbl		v31.16b, {v0.16b-v3.16b}, v31.16b
+++	ld1		{v16.16b-v19.16b}, [x1]		// reload first output block
+++	b		0b
+++
++ 	// fewer than 256 bytes of in/output
++-2:	ld1		{v4.16b}, [x10]
++-	ld1		{v5.16b}, [x11]
++-	movi		v6.16b, #16
++-	add		x1, x1, x7
+++.Lt256:	cbz		x6, 2f				// exactly 192 bytes?
+++	ld1		{v4.16b-v7.16b}, [x10]
+++	add		x6, x6, x1
++ 	tbl		v0.16b, {v8.16b-v11.16b}, v4.16b
++-	tbx		v24.16b, {v20.16b-v23.16b}, v5.16b
++-	add		v4.16b, v4.16b, v6.16b
++-	add		v5.16b, v5.16b, v6.16b
++-	tbl		v1.16b, {v8.16b-v11.16b}, v4.16b
++-	tbx		v25.16b, {v20.16b-v23.16b}, v5.16b
++-	add		v4.16b, v4.16b, v6.16b
++-	add		v5.16b, v5.16b, v6.16b
++-	tbl		v2.16b, {v8.16b-v11.16b}, v4.16b
++-	tbx		v26.16b, {v20.16b-v23.16b}, v5.16b
++-	add		v4.16b, v4.16b, v6.16b
++-	add		v5.16b, v5.16b, v6.16b
++-	tbl		v3.16b, {v8.16b-v11.16b}, v4.16b
++-	tbx		v27.16b, {v20.16b-v23.16b}, v5.16b
++-
++-	eor		v24.16b, v24.16b, v0.16b
++-	eor		v25.16b, v25.16b, v1.16b
++-	eor		v26.16b, v26.16b, v2.16b
++-	eor		v27.16b, v27.16b, v3.16b
++-	st1		{v24.16b-v27.16b}, [x1]
+++	tbl		v1.16b, {v8.16b-v11.16b}, v5.16b
+++	tbl		v2.16b, {v8.16b-v11.16b}, v6.16b
+++	tbl		v3.16b, {v8.16b-v11.16b}, v7.16b
+++
+++	eor		v28.16b, v28.16b, v0.16b
+++	eor		v29.16b, v29.16b, v1.16b
+++	eor		v30.16b, v30.16b, v2.16b
+++	eor		v31.16b, v31.16b, v3.16b
+++	st1		{v28.16b-v31.16b}, [x6]		// overlapping stores
+++2:	st1		{v20.16b-v23.16b}, [x1]
++ 	b		.Lout
++ 
++ 	// fewer than 320 bytes of in/output
++-3:	ld1		{v4.16b}, [x10]
++-	ld1		{v5.16b}, [x11]
++-	movi		v6.16b, #16
++-	add		x1, x1, x8
+++.Lt320:	cbz		x7, 3f				// exactly 256 bytes?
+++	ld1		{v4.16b-v7.16b}, [x10]
+++	add		x7, x7, x1
++ 	tbl		v0.16b, {v12.16b-v15.16b}, v4.16b
++-	tbx		v28.16b, {v24.16b-v27.16b}, v5.16b
++-	add		v4.16b, v4.16b, v6.16b
++-	add		v5.16b, v5.16b, v6.16b
++-	tbl		v1.16b, {v12.16b-v15.16b}, v4.16b
++-	tbx		v29.16b, {v24.16b-v27.16b}, v5.16b
++-	add		v4.16b, v4.16b, v6.16b
++-	add		v5.16b, v5.16b, v6.16b
++-	tbl		v2.16b, {v12.16b-v15.16b}, v4.16b
++-	tbx		v30.16b, {v24.16b-v27.16b}, v5.16b
++-	add		v4.16b, v4.16b, v6.16b
++-	add		v5.16b, v5.16b, v6.16b
++-	tbl		v3.16b, {v12.16b-v15.16b}, v4.16b
++-	tbx		v31.16b, {v24.16b-v27.16b}, v5.16b
+++	tbl		v1.16b, {v12.16b-v15.16b}, v5.16b
+++	tbl		v2.16b, {v12.16b-v15.16b}, v6.16b
+++	tbl		v3.16b, {v12.16b-v15.16b}, v7.16b
++ 
++ 	eor		v28.16b, v28.16b, v0.16b
++ 	eor		v29.16b, v29.16b, v1.16b
++ 	eor		v30.16b, v30.16b, v2.16b
++ 	eor		v31.16b, v31.16b, v3.16b
++-	st1		{v28.16b-v31.16b}, [x1]
+++	st1		{v28.16b-v31.16b}, [x7]		// overlapping stores
+++3:	st1		{v24.16b-v27.16b}, [x1]
++ 	b		.Lout
++ ENDPROC(chacha_4block_xor_neon)
++ 
++@@ -851,7 +796,7 @@ ENDPROC(chacha_4block_xor_neon)
++ 	.align		L1_CACHE_SHIFT
++ .Lpermute:
++ 	.set		.Li, 0
++-	.rept		192
+++	.rept		128
++ 	.byte		(.Li - 64)
++ 	.set		.Li, .Li + 1
++ 	.endr
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0070-crypto-lib-chacha20poly1305-define-empty-module-exit.patch b/target/linux/generic/backport-5.4/080-wireguard-0070-crypto-lib-chacha20poly1305-define-empty-module-exit.patch
+new file mode 100644
+index 0000000000..084ae74bfd
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0070-crypto-lib-chacha20poly1305-define-empty-module-exit.patch
+@@ -0,0 +1,37 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 15 Jan 2021 20:30:12 +0100
++Subject: [PATCH] crypto: lib/chacha20poly1305 - define empty module exit
++ function
++
++commit ac88c322d0f2917d41d13553c69e9d7f043c8b6f upstream.
++
++With no mod_exit function, users are unable to unload the module after
++use. I'm not aware of any reason why module unloading should be
++prohibited for this one, so this commit simply adds an empty exit
++function.
++
++Reported-and-tested-by: John Donnelly <john.p.donnelly@oracle.com>
++Acked-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ lib/crypto/chacha20poly1305.c | 5 +++++
++ 1 file changed, 5 insertions(+)
++
++--- a/lib/crypto/chacha20poly1305.c
+++++ b/lib/crypto/chacha20poly1305.c
++@@ -364,7 +364,12 @@ static int __init mod_init(void)
++ 	return 0;
++ }
++ 
+++static void __exit mod_exit(void)
+++{
+++}
+++
++ module_init(mod_init);
+++module_exit(mod_exit);
++ MODULE_LICENSE("GPL v2");
++ MODULE_DESCRIPTION("ChaCha20Poly1305 AEAD construction");
++ MODULE_AUTHOR("Jason A. Donenfeld <Jason@zx2c4.com>");
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0071-crypto-arm-chacha-neon-add-missing-counter-increment.patch b/target/linux/generic/backport-5.4/080-wireguard-0071-crypto-arm-chacha-neon-add-missing-counter-increment.patch
+new file mode 100644
+index 0000000000..ea3cc802a9
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0071-crypto-arm-chacha-neon-add-missing-counter-increment.patch
+@@ -0,0 +1,38 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ard Biesheuvel <ardb@kernel.org>
++Date: Sun, 13 Dec 2020 15:39:29 +0100
++Subject: [PATCH] crypto: arm/chacha-neon - add missing counter increment
++
++commit fd16931a2f518a32753920ff20895e5cf04c8ff1 upstream.
++
++Commit 86cd97ec4b943af3 ("crypto: arm/chacha-neon - optimize for non-block
++size multiples") refactored the chacha block handling in the glue code in
++a way that may result in the counter increment to be omitted when calling
++chacha_block_xor_neon() to process a full block. This violates the skcipher
++API, which requires that the output IV is suitable for handling more input
++as long as the preceding input has been presented in round multiples of the
++block size. Also, the same code is exposed via the chacha library interface
++whose callers may actually rely on this increment to occur even for final
++blocks that are smaller than the chacha block size.
++
++So increment the counter after calling chacha_block_xor_neon().
++
++Fixes: 86cd97ec4b943af3 ("crypto: arm/chacha-neon - optimize for non-block size multiples")
++Reported-by: Eric Biggers <ebiggers@kernel.org>
++Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/chacha-glue.c | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/arch/arm/crypto/chacha-glue.c
+++++ b/arch/arm/crypto/chacha-glue.c
++@@ -60,6 +60,7 @@ static void chacha_doneon(u32 *state, u8
++ 		chacha_block_xor_neon(state, d, s, nrounds);
++ 		if (d != dst)
++ 			memcpy(dst, buf, bytes);
+++		state[12]++;
++ 	}
++ }
++ 
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0072-net-WireGuard-secure-network-tunnel.patch b/target/linux/generic/backport-5.4/080-wireguard-0072-net-WireGuard-secure-network-tunnel.patch
+new file mode 100644
+index 0000000000..9e37bbb60c
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0072-net-WireGuard-secure-network-tunnel.patch
+@@ -0,0 +1,8071 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Mon, 9 Dec 2019 00:27:34 +0100
++Subject: [PATCH] net: WireGuard secure network tunnel
++
++commit e7096c131e5161fa3b8e52a650d7719d2857adfd upstream.
++
++WireGuard is a layer 3 secure networking tunnel made specifically for
++the kernel, that aims to be much simpler and easier to audit than IPsec.
++Extensive documentation and description of the protocol and
++considerations, along with formal proofs of the cryptography, are
++available at:
++
++  * https://www.wireguard.com/
++  * https://www.wireguard.com/papers/wireguard.pdf
++
++This commit implements WireGuard as a simple network device driver,
++accessible in the usual RTNL way used by virtual network drivers. It
++makes use of the udp_tunnel APIs, GRO, GSO, NAPI, and the usual set of
++networking subsystem APIs. It has a somewhat novel multicore queueing
++system designed for maximum throughput and minimal latency of encryption
++operations, but it is implemented modestly using workqueues and NAPI.
++Configuration is done via generic Netlink, and following a review from
++the Netlink maintainer a year ago, several high profile userspace tools
++have already implemented the API.
++
++This commit also comes with several different tests, both in-kernel
++tests and out-of-kernel tests based on network namespaces, taking profit
++of the fact that sockets used by WireGuard intentionally stay in the
++namespace the WireGuard interface was originally created, exactly like
++the semantics of userspace tun devices. See wireguard.com/netns/ for
++pictures and examples.
++
++The source code is fairly short, but rather than combining everything
++into a single file, WireGuard is developed as cleanly separable files,
++making auditing and comprehension easier. Things are laid out as
++follows:
++
++  * noise.[ch], cookie.[ch], messages.h: These implement the bulk of the
++    cryptographic aspects of the protocol, and are mostly data-only in
++    nature, taking in buffers of bytes and spitting out buffers of
++    bytes. They also handle reference counting for their various shared
++    pieces of data, like keys and key lists.
++
++  * ratelimiter.[ch]: Used as an integral part of cookie.[ch] for
++    ratelimiting certain types of cryptographic operations in accordance
++    with particular WireGuard semantics.
++
++  * allowedips.[ch], peerlookup.[ch]: The main lookup structures of
++    WireGuard, the former being trie-like with particular semantics, an
++    integral part of the design of the protocol, and the latter just
++    being nice helper functions around the various hashtables we use.
++
++  * device.[ch]: Implementation of functions for the netdevice and for
++    rtnl, responsible for maintaining the life of a given interface and
++    wiring it up to the rest of WireGuard.
++
++  * peer.[ch]: Each interface has a list of peers, with helper functions
++    available here for creation, destruction, and reference counting.
++
++  * socket.[ch]: Implementation of functions related to udp_socket and
++    the general set of kernel socket APIs, for sending and receiving
++    ciphertext UDP packets, and taking care of WireGuard-specific sticky
++    socket routing semantics for the automatic roaming.
++
++  * netlink.[ch]: Userspace API entry point for configuring WireGuard
++    peers and devices. The API has been implemented by several userspace
++    tools and network management utility, and the WireGuard project
++    distributes the basic wg(8) tool.
++
++  * queueing.[ch]: Shared function on the rx and tx path for handling
++    the various queues used in the multicore algorithms.
++
++  * send.c: Handles encrypting outgoing packets in parallel on
++    multiple cores, before sending them in order on a single core, via
++    workqueues and ring buffers. Also handles sending handshake and cookie
++    messages as part of the protocol, in parallel.
++
++  * receive.c: Handles decrypting incoming packets in parallel on
++    multiple cores, before passing them off in order to be ingested via
++    the rest of the networking subsystem with GRO via the typical NAPI
++    poll function. Also handles receiving handshake and cookie messages
++    as part of the protocol, in parallel.
++
++  * timers.[ch]: Uses the timer wheel to implement protocol particular
++    event timeouts, and gives a set of very simple event-driven entry
++    point functions for callers.
++
++  * main.c, version.h: Initialization and deinitialization of the module.
++
++  * selftest/*.h: Runtime unit tests for some of the most security
++    sensitive functions.
++
++  * tools/testing/selftests/wireguard/netns.sh: Aforementioned testing
++    script using network namespaces.
++
++This commit aims to be as self-contained as possible, implementing
++WireGuard as a standalone module not needing much special handling or
++coordination from the network subsystem. I expect for future
++optimizations to the network stack to positively improve WireGuard, and
++vice-versa, but for the time being, this exists as intentionally
++standalone.
++
++We introduce a menu option for CONFIG_WIREGUARD, as well as providing a
++verbose debug log and self-tests via CONFIG_WIREGUARD_DEBUG.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Cc: David Miller <davem@davemloft.net>
++Cc: Greg KH <gregkh@linuxfoundation.org>
++Cc: Linus Torvalds <torvalds@linux-foundation.org>
++Cc: Herbert Xu <herbert@gondor.apana.org.au>
++Cc: linux-crypto@vger.kernel.org
++Cc: linux-kernel@vger.kernel.org
++Cc: netdev@vger.kernel.org
++Signed-off-by: David S. Miller <davem@davemloft.net>
++[Jason: ported to 5.4 by doing the following:
++ - wg_get_device_start uses genl_family_attrbuf
++ - trival skb_redirect_reset change from 2c64605b590e is folded in
++ - skb_list_walk_safe was already backported prior]
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ MAINTAINERS                                  |   8 +
++ drivers/net/Kconfig                          |  41 +
++ drivers/net/Makefile                         |   1 +
++ drivers/net/wireguard/Makefile               |  18 +
++ drivers/net/wireguard/allowedips.c           | 381 +++++++++
++ drivers/net/wireguard/allowedips.h           |  59 ++
++ drivers/net/wireguard/cookie.c               | 236 ++++++
++ drivers/net/wireguard/cookie.h               |  59 ++
++ drivers/net/wireguard/device.c               | 458 ++++++++++
++ drivers/net/wireguard/device.h               |  65 ++
++ drivers/net/wireguard/main.c                 |  64 ++
++ drivers/net/wireguard/messages.h             | 128 +++
++ drivers/net/wireguard/netlink.c              | 648 +++++++++++++++
++ drivers/net/wireguard/netlink.h              |  12 +
++ drivers/net/wireguard/noise.c                | 828 +++++++++++++++++++
++ drivers/net/wireguard/noise.h                | 137 +++
++ drivers/net/wireguard/peer.c                 | 240 ++++++
++ drivers/net/wireguard/peer.h                 |  83 ++
++ drivers/net/wireguard/peerlookup.c           | 221 +++++
++ drivers/net/wireguard/peerlookup.h           |  64 ++
++ drivers/net/wireguard/queueing.c             |  53 ++
++ drivers/net/wireguard/queueing.h             | 197 +++++
++ drivers/net/wireguard/ratelimiter.c          | 223 +++++
++ drivers/net/wireguard/ratelimiter.h          |  19 +
++ drivers/net/wireguard/receive.c              | 595 +++++++++++++
++ drivers/net/wireguard/selftest/allowedips.c  | 683 +++++++++++++++
++ drivers/net/wireguard/selftest/counter.c     | 104 +++
++ drivers/net/wireguard/selftest/ratelimiter.c | 226 +++++
++ drivers/net/wireguard/send.c                 | 413 +++++++++
++ drivers/net/wireguard/socket.c               | 437 ++++++++++
++ drivers/net/wireguard/socket.h               |  44 +
++ drivers/net/wireguard/timers.c               | 243 ++++++
++ drivers/net/wireguard/timers.h               |  31 +
++ drivers/net/wireguard/version.h              |   1 +
++ include/uapi/linux/wireguard.h               | 196 +++++
++ tools/testing/selftests/wireguard/netns.sh   | 537 ++++++++++++
++ 36 files changed, 7753 insertions(+)
++ create mode 100644 drivers/net/wireguard/Makefile
++ create mode 100644 drivers/net/wireguard/allowedips.c
++ create mode 100644 drivers/net/wireguard/allowedips.h
++ create mode 100644 drivers/net/wireguard/cookie.c
++ create mode 100644 drivers/net/wireguard/cookie.h
++ create mode 100644 drivers/net/wireguard/device.c
++ create mode 100644 drivers/net/wireguard/device.h
++ create mode 100644 drivers/net/wireguard/main.c
++ create mode 100644 drivers/net/wireguard/messages.h
++ create mode 100644 drivers/net/wireguard/netlink.c
++ create mode 100644 drivers/net/wireguard/netlink.h
++ create mode 100644 drivers/net/wireguard/noise.c
++ create mode 100644 drivers/net/wireguard/noise.h
++ create mode 100644 drivers/net/wireguard/peer.c
++ create mode 100644 drivers/net/wireguard/peer.h
++ create mode 100644 drivers/net/wireguard/peerlookup.c
++ create mode 100644 drivers/net/wireguard/peerlookup.h
++ create mode 100644 drivers/net/wireguard/queueing.c
++ create mode 100644 drivers/net/wireguard/queueing.h
++ create mode 100644 drivers/net/wireguard/ratelimiter.c
++ create mode 100644 drivers/net/wireguard/ratelimiter.h
++ create mode 100644 drivers/net/wireguard/receive.c
++ create mode 100644 drivers/net/wireguard/selftest/allowedips.c
++ create mode 100644 drivers/net/wireguard/selftest/counter.c
++ create mode 100644 drivers/net/wireguard/selftest/ratelimiter.c
++ create mode 100644 drivers/net/wireguard/send.c
++ create mode 100644 drivers/net/wireguard/socket.c
++ create mode 100644 drivers/net/wireguard/socket.h
++ create mode 100644 drivers/net/wireguard/timers.c
++ create mode 100644 drivers/net/wireguard/timers.h
++ create mode 100644 drivers/net/wireguard/version.h
++ create mode 100644 include/uapi/linux/wireguard.h
++ create mode 100755 tools/testing/selftests/wireguard/netns.sh
++
++--- a/MAINTAINERS
+++++ b/MAINTAINERS
++@@ -17584,6 +17584,14 @@ L:	linux-gpio@vger.kernel.org
++ S:	Maintained
++ F:	drivers/gpio/gpio-ws16c48.c
++ 
+++WIREGUARD SECURE NETWORK TUNNEL
+++M:	Jason A. Donenfeld <Jason@zx2c4.com>
+++S:	Maintained
+++F:	drivers/net/wireguard/
+++F:	tools/testing/selftests/wireguard/
+++L:	wireguard@lists.zx2c4.com
+++L:	netdev@vger.kernel.org
+++
++ WISTRON LAPTOP BUTTON DRIVER
++ M:	Miloslav Trmac <mitr@volny.cz>
++ S:	Maintained
++--- a/drivers/net/Kconfig
+++++ b/drivers/net/Kconfig
++@@ -71,6 +71,47 @@ config DUMMY
++ 	  To compile this driver as a module, choose M here: the module
++ 	  will be called dummy.
++ 
+++config WIREGUARD
+++	tristate "WireGuard secure network tunnel"
+++	depends on NET && INET
+++	depends on IPV6 || !IPV6
+++	select NET_UDP_TUNNEL
+++	select DST_CACHE
+++	select CRYPTO
+++	select CRYPTO_LIB_CURVE25519
+++	select CRYPTO_LIB_CHACHA20POLY1305
+++	select CRYPTO_LIB_BLAKE2S
+++	select CRYPTO_CHACHA20_X86_64 if X86 && 64BIT
+++	select CRYPTO_POLY1305_X86_64 if X86 && 64BIT
+++	select CRYPTO_BLAKE2S_X86 if X86 && 64BIT
+++	select CRYPTO_CURVE25519_X86 if X86 && 64BIT
+++	select CRYPTO_CHACHA20_NEON if (ARM || ARM64) && KERNEL_MODE_NEON
+++	select CRYPTO_POLY1305_NEON if ARM64 && KERNEL_MODE_NEON
+++	select CRYPTO_POLY1305_ARM if ARM
+++	select CRYPTO_CURVE25519_NEON if ARM && KERNEL_MODE_NEON
+++	select CRYPTO_CHACHA_MIPS if CPU_MIPS32_R2
+++	select CRYPTO_POLY1305_MIPS if CPU_MIPS32 || (CPU_MIPS64 && 64BIT)
+++	help
+++	  WireGuard is a secure, fast, and easy to use replacement for IPSec
+++	  that uses modern cryptography and clever networking tricks. It's
+++	  designed to be fairly general purpose and abstract enough to fit most
+++	  use cases, while at the same time remaining extremely simple to
+++	  configure. See www.wireguard.com for more info.
+++
+++	  It's safe to say Y or M here, as the driver is very lightweight and
+++	  is only in use when an administrator chooses to add an interface.
+++
+++config WIREGUARD_DEBUG
+++	bool "Debugging checks and verbose messages"
+++	depends on WIREGUARD
+++	help
+++	  This will write log messages for handshake and other events
+++	  that occur for a WireGuard interface. It will also perform some
+++	  extra validation checks and unit tests at various points. This is
+++	  only useful for debugging.
+++
+++	  Say N here unless you know what you're doing.
+++
++ config EQUALIZER
++ 	tristate "EQL (serial line load balancing) support"
++ 	---help---
++--- a/drivers/net/Makefile
+++++ b/drivers/net/Makefile
++@@ -10,6 +10,7 @@ obj-$(CONFIG_BONDING) += bonding/
++ obj-$(CONFIG_IPVLAN) += ipvlan/
++ obj-$(CONFIG_IPVTAP) += ipvlan/
++ obj-$(CONFIG_DUMMY) += dummy.o
+++obj-$(CONFIG_WIREGUARD) += wireguard/
++ obj-$(CONFIG_EQUALIZER) += eql.o
++ obj-$(CONFIG_IFB) += ifb.o
++ obj-$(CONFIG_MACSEC) += macsec.o
++--- /dev/null
+++++ b/drivers/net/wireguard/Makefile
++@@ -0,0 +1,18 @@
+++ccflags-y := -O3
+++ccflags-y += -D'pr_fmt(fmt)=KBUILD_MODNAME ": " fmt'
+++ccflags-$(CONFIG_WIREGUARD_DEBUG) += -DDEBUG
+++wireguard-y := main.o
+++wireguard-y += noise.o
+++wireguard-y += device.o
+++wireguard-y += peer.o
+++wireguard-y += timers.o
+++wireguard-y += queueing.o
+++wireguard-y += send.o
+++wireguard-y += receive.o
+++wireguard-y += socket.o
+++wireguard-y += peerlookup.o
+++wireguard-y += allowedips.o
+++wireguard-y += ratelimiter.o
+++wireguard-y += cookie.o
+++wireguard-y += netlink.o
+++obj-$(CONFIG_WIREGUARD) := wireguard.o
++--- /dev/null
+++++ b/drivers/net/wireguard/allowedips.c
++@@ -0,0 +1,381 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include "allowedips.h"
+++#include "peer.h"
+++
+++static void swap_endian(u8 *dst, const u8 *src, u8 bits)
+++{
+++	if (bits == 32) {
+++		*(u32 *)dst = be32_to_cpu(*(const __be32 *)src);
+++	} else if (bits == 128) {
+++		((u64 *)dst)[0] = be64_to_cpu(((const __be64 *)src)[0]);
+++		((u64 *)dst)[1] = be64_to_cpu(((const __be64 *)src)[1]);
+++	}
+++}
+++
+++static void copy_and_assign_cidr(struct allowedips_node *node, const u8 *src,
+++				 u8 cidr, u8 bits)
+++{
+++	node->cidr = cidr;
+++	node->bit_at_a = cidr / 8U;
+++#ifdef __LITTLE_ENDIAN
+++	node->bit_at_a ^= (bits / 8U - 1U) % 8U;
+++#endif
+++	node->bit_at_b = 7U - (cidr % 8U);
+++	node->bitlen = bits;
+++	memcpy(node->bits, src, bits / 8U);
+++}
+++#define CHOOSE_NODE(parent, key) \
+++	parent->bit[(key[parent->bit_at_a] >> parent->bit_at_b) & 1]
+++
+++static void node_free_rcu(struct rcu_head *rcu)
+++{
+++	kfree(container_of(rcu, struct allowedips_node, rcu));
+++}
+++
+++static void push_rcu(struct allowedips_node **stack,
+++		     struct allowedips_node __rcu *p, unsigned int *len)
+++{
+++	if (rcu_access_pointer(p)) {
+++		WARN_ON(IS_ENABLED(DEBUG) && *len >= 128);
+++		stack[(*len)++] = rcu_dereference_raw(p);
+++	}
+++}
+++
+++static void root_free_rcu(struct rcu_head *rcu)
+++{
+++	struct allowedips_node *node, *stack[128] = {
+++		container_of(rcu, struct allowedips_node, rcu) };
+++	unsigned int len = 1;
+++
+++	while (len > 0 && (node = stack[--len])) {
+++		push_rcu(stack, node->bit[0], &len);
+++		push_rcu(stack, node->bit[1], &len);
+++		kfree(node);
+++	}
+++}
+++
+++static void root_remove_peer_lists(struct allowedips_node *root)
+++{
+++	struct allowedips_node *node, *stack[128] = { root };
+++	unsigned int len = 1;
+++
+++	while (len > 0 && (node = stack[--len])) {
+++		push_rcu(stack, node->bit[0], &len);
+++		push_rcu(stack, node->bit[1], &len);
+++		if (rcu_access_pointer(node->peer))
+++			list_del(&node->peer_list);
+++	}
+++}
+++
+++static void walk_remove_by_peer(struct allowedips_node __rcu **top,
+++				struct wg_peer *peer, struct mutex *lock)
+++{
+++#define REF(p) rcu_access_pointer(p)
+++#define DEREF(p) rcu_dereference_protected(*(p), lockdep_is_held(lock))
+++#define PUSH(p) ({                                                             \
+++		WARN_ON(IS_ENABLED(DEBUG) && len >= 128);                      \
+++		stack[len++] = p;                                              \
+++	})
+++
+++	struct allowedips_node __rcu **stack[128], **nptr;
+++	struct allowedips_node *node, *prev;
+++	unsigned int len;
+++
+++	if (unlikely(!peer || !REF(*top)))
+++		return;
+++
+++	for (prev = NULL, len = 0, PUSH(top); len > 0; prev = node) {
+++		nptr = stack[len - 1];
+++		node = DEREF(nptr);
+++		if (!node) {
+++			--len;
+++			continue;
+++		}
+++		if (!prev || REF(prev->bit[0]) == node ||
+++		    REF(prev->bit[1]) == node) {
+++			if (REF(node->bit[0]))
+++				PUSH(&node->bit[0]);
+++			else if (REF(node->bit[1]))
+++				PUSH(&node->bit[1]);
+++		} else if (REF(node->bit[0]) == prev) {
+++			if (REF(node->bit[1]))
+++				PUSH(&node->bit[1]);
+++		} else {
+++			if (rcu_dereference_protected(node->peer,
+++				lockdep_is_held(lock)) == peer) {
+++				RCU_INIT_POINTER(node->peer, NULL);
+++				list_del_init(&node->peer_list);
+++				if (!node->bit[0] || !node->bit[1]) {
+++					rcu_assign_pointer(*nptr, DEREF(
+++					       &node->bit[!REF(node->bit[0])]));
+++					call_rcu(&node->rcu, node_free_rcu);
+++					node = DEREF(nptr);
+++				}
+++			}
+++			--len;
+++		}
+++	}
+++
+++#undef REF
+++#undef DEREF
+++#undef PUSH
+++}
+++
+++static unsigned int fls128(u64 a, u64 b)
+++{
+++	return a ? fls64(a) + 64U : fls64(b);
+++}
+++
+++static u8 common_bits(const struct allowedips_node *node, const u8 *key,
+++		      u8 bits)
+++{
+++	if (bits == 32)
+++		return 32U - fls(*(const u32 *)node->bits ^ *(const u32 *)key);
+++	else if (bits == 128)
+++		return 128U - fls128(
+++			*(const u64 *)&node->bits[0] ^ *(const u64 *)&key[0],
+++			*(const u64 *)&node->bits[8] ^ *(const u64 *)&key[8]);
+++	return 0;
+++}
+++
+++static bool prefix_matches(const struct allowedips_node *node, const u8 *key,
+++			   u8 bits)
+++{
+++	/* This could be much faster if it actually just compared the common
+++	 * bits properly, by precomputing a mask bswap(~0 << (32 - cidr)), and
+++	 * the rest, but it turns out that common_bits is already super fast on
+++	 * modern processors, even taking into account the unfortunate bswap.
+++	 * So, we just inline it like this instead.
+++	 */
+++	return common_bits(node, key, bits) >= node->cidr;
+++}
+++
+++static struct allowedips_node *find_node(struct allowedips_node *trie, u8 bits,
+++					 const u8 *key)
+++{
+++	struct allowedips_node *node = trie, *found = NULL;
+++
+++	while (node && prefix_matches(node, key, bits)) {
+++		if (rcu_access_pointer(node->peer))
+++			found = node;
+++		if (node->cidr == bits)
+++			break;
+++		node = rcu_dereference_bh(CHOOSE_NODE(node, key));
+++	}
+++	return found;
+++}
+++
+++/* Returns a strong reference to a peer */
+++static struct wg_peer *lookup(struct allowedips_node __rcu *root, u8 bits,
+++			      const void *be_ip)
+++{
+++	/* Aligned so it can be passed to fls/fls64 */
+++	u8 ip[16] __aligned(__alignof(u64));
+++	struct allowedips_node *node;
+++	struct wg_peer *peer = NULL;
+++
+++	swap_endian(ip, be_ip, bits);
+++
+++	rcu_read_lock_bh();
+++retry:
+++	node = find_node(rcu_dereference_bh(root), bits, ip);
+++	if (node) {
+++		peer = wg_peer_get_maybe_zero(rcu_dereference_bh(node->peer));
+++		if (!peer)
+++			goto retry;
+++	}
+++	rcu_read_unlock_bh();
+++	return peer;
+++}
+++
+++static bool node_placement(struct allowedips_node __rcu *trie, const u8 *key,
+++			   u8 cidr, u8 bits, struct allowedips_node **rnode,
+++			   struct mutex *lock)
+++{
+++	struct allowedips_node *node = rcu_dereference_protected(trie,
+++						lockdep_is_held(lock));
+++	struct allowedips_node *parent = NULL;
+++	bool exact = false;
+++
+++	while (node && node->cidr <= cidr && prefix_matches(node, key, bits)) {
+++		parent = node;
+++		if (parent->cidr == cidr) {
+++			exact = true;
+++			break;
+++		}
+++		node = rcu_dereference_protected(CHOOSE_NODE(parent, key),
+++						 lockdep_is_held(lock));
+++	}
+++	*rnode = parent;
+++	return exact;
+++}
+++
+++static int add(struct allowedips_node __rcu **trie, u8 bits, const u8 *key,
+++	       u8 cidr, struct wg_peer *peer, struct mutex *lock)
+++{
+++	struct allowedips_node *node, *parent, *down, *newnode;
+++
+++	if (unlikely(cidr > bits || !peer))
+++		return -EINVAL;
+++
+++	if (!rcu_access_pointer(*trie)) {
+++		node = kzalloc(sizeof(*node), GFP_KERNEL);
+++		if (unlikely(!node))
+++			return -ENOMEM;
+++		RCU_INIT_POINTER(node->peer, peer);
+++		list_add_tail(&node->peer_list, &peer->allowedips_list);
+++		copy_and_assign_cidr(node, key, cidr, bits);
+++		rcu_assign_pointer(*trie, node);
+++		return 0;
+++	}
+++	if (node_placement(*trie, key, cidr, bits, &node, lock)) {
+++		rcu_assign_pointer(node->peer, peer);
+++		list_move_tail(&node->peer_list, &peer->allowedips_list);
+++		return 0;
+++	}
+++
+++	newnode = kzalloc(sizeof(*newnode), GFP_KERNEL);
+++	if (unlikely(!newnode))
+++		return -ENOMEM;
+++	RCU_INIT_POINTER(newnode->peer, peer);
+++	list_add_tail(&newnode->peer_list, &peer->allowedips_list);
+++	copy_and_assign_cidr(newnode, key, cidr, bits);
+++
+++	if (!node) {
+++		down = rcu_dereference_protected(*trie, lockdep_is_held(lock));
+++	} else {
+++		down = rcu_dereference_protected(CHOOSE_NODE(node, key),
+++						 lockdep_is_held(lock));
+++		if (!down) {
+++			rcu_assign_pointer(CHOOSE_NODE(node, key), newnode);
+++			return 0;
+++		}
+++	}
+++	cidr = min(cidr, common_bits(down, key, bits));
+++	parent = node;
+++
+++	if (newnode->cidr == cidr) {
+++		rcu_assign_pointer(CHOOSE_NODE(newnode, down->bits), down);
+++		if (!parent)
+++			rcu_assign_pointer(*trie, newnode);
+++		else
+++			rcu_assign_pointer(CHOOSE_NODE(parent, newnode->bits),
+++					   newnode);
+++	} else {
+++		node = kzalloc(sizeof(*node), GFP_KERNEL);
+++		if (unlikely(!node)) {
+++			kfree(newnode);
+++			return -ENOMEM;
+++		}
+++		INIT_LIST_HEAD(&node->peer_list);
+++		copy_and_assign_cidr(node, newnode->bits, cidr, bits);
+++
+++		rcu_assign_pointer(CHOOSE_NODE(node, down->bits), down);
+++		rcu_assign_pointer(CHOOSE_NODE(node, newnode->bits), newnode);
+++		if (!parent)
+++			rcu_assign_pointer(*trie, node);
+++		else
+++			rcu_assign_pointer(CHOOSE_NODE(parent, node->bits),
+++					   node);
+++	}
+++	return 0;
+++}
+++
+++void wg_allowedips_init(struct allowedips *table)
+++{
+++	table->root4 = table->root6 = NULL;
+++	table->seq = 1;
+++}
+++
+++void wg_allowedips_free(struct allowedips *table, struct mutex *lock)
+++{
+++	struct allowedips_node __rcu *old4 = table->root4, *old6 = table->root6;
+++
+++	++table->seq;
+++	RCU_INIT_POINTER(table->root4, NULL);
+++	RCU_INIT_POINTER(table->root6, NULL);
+++	if (rcu_access_pointer(old4)) {
+++		struct allowedips_node *node = rcu_dereference_protected(old4,
+++							lockdep_is_held(lock));
+++
+++		root_remove_peer_lists(node);
+++		call_rcu(&node->rcu, root_free_rcu);
+++	}
+++	if (rcu_access_pointer(old6)) {
+++		struct allowedips_node *node = rcu_dereference_protected(old6,
+++							lockdep_is_held(lock));
+++
+++		root_remove_peer_lists(node);
+++		call_rcu(&node->rcu, root_free_rcu);
+++	}
+++}
+++
+++int wg_allowedips_insert_v4(struct allowedips *table, const struct in_addr *ip,
+++			    u8 cidr, struct wg_peer *peer, struct mutex *lock)
+++{
+++	/* Aligned so it can be passed to fls */
+++	u8 key[4] __aligned(__alignof(u32));
+++
+++	++table->seq;
+++	swap_endian(key, (const u8 *)ip, 32);
+++	return add(&table->root4, 32, key, cidr, peer, lock);
+++}
+++
+++int wg_allowedips_insert_v6(struct allowedips *table, const struct in6_addr *ip,
+++			    u8 cidr, struct wg_peer *peer, struct mutex *lock)
+++{
+++	/* Aligned so it can be passed to fls64 */
+++	u8 key[16] __aligned(__alignof(u64));
+++
+++	++table->seq;
+++	swap_endian(key, (const u8 *)ip, 128);
+++	return add(&table->root6, 128, key, cidr, peer, lock);
+++}
+++
+++void wg_allowedips_remove_by_peer(struct allowedips *table,
+++				  struct wg_peer *peer, struct mutex *lock)
+++{
+++	++table->seq;
+++	walk_remove_by_peer(&table->root4, peer, lock);
+++	walk_remove_by_peer(&table->root6, peer, lock);
+++}
+++
+++int wg_allowedips_read_node(struct allowedips_node *node, u8 ip[16], u8 *cidr)
+++{
+++	const unsigned int cidr_bytes = DIV_ROUND_UP(node->cidr, 8U);
+++	swap_endian(ip, node->bits, node->bitlen);
+++	memset(ip + cidr_bytes, 0, node->bitlen / 8U - cidr_bytes);
+++	if (node->cidr)
+++		ip[cidr_bytes - 1U] &= ~0U << (-node->cidr % 8U);
+++
+++	*cidr = node->cidr;
+++	return node->bitlen == 32 ? AF_INET : AF_INET6;
+++}
+++
+++/* Returns a strong reference to a peer */
+++struct wg_peer *wg_allowedips_lookup_dst(struct allowedips *table,
+++					 struct sk_buff *skb)
+++{
+++	if (skb->protocol == htons(ETH_P_IP))
+++		return lookup(table->root4, 32, &ip_hdr(skb)->daddr);
+++	else if (skb->protocol == htons(ETH_P_IPV6))
+++		return lookup(table->root6, 128, &ipv6_hdr(skb)->daddr);
+++	return NULL;
+++}
+++
+++/* Returns a strong reference to a peer */
+++struct wg_peer *wg_allowedips_lookup_src(struct allowedips *table,
+++					 struct sk_buff *skb)
+++{
+++	if (skb->protocol == htons(ETH_P_IP))
+++		return lookup(table->root4, 32, &ip_hdr(skb)->saddr);
+++	else if (skb->protocol == htons(ETH_P_IPV6))
+++		return lookup(table->root6, 128, &ipv6_hdr(skb)->saddr);
+++	return NULL;
+++}
+++
+++#include "selftest/allowedips.c"
++--- /dev/null
+++++ b/drivers/net/wireguard/allowedips.h
++@@ -0,0 +1,59 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#ifndef _WG_ALLOWEDIPS_H
+++#define _WG_ALLOWEDIPS_H
+++
+++#include <linux/mutex.h>
+++#include <linux/ip.h>
+++#include <linux/ipv6.h>
+++
+++struct wg_peer;
+++
+++struct allowedips_node {
+++	struct wg_peer __rcu *peer;
+++	struct allowedips_node __rcu *bit[2];
+++	/* While it may seem scandalous that we waste space for v4,
+++	 * we're alloc'ing to the nearest power of 2 anyway, so this
+++	 * doesn't actually make a difference.
+++	 */
+++	u8 bits[16] __aligned(__alignof(u64));
+++	u8 cidr, bit_at_a, bit_at_b, bitlen;
+++
+++	/* Keep rarely used list at bottom to be beyond cache line. */
+++	union {
+++		struct list_head peer_list;
+++		struct rcu_head rcu;
+++	};
+++};
+++
+++struct allowedips {
+++	struct allowedips_node __rcu *root4;
+++	struct allowedips_node __rcu *root6;
+++	u64 seq;
+++};
+++
+++void wg_allowedips_init(struct allowedips *table);
+++void wg_allowedips_free(struct allowedips *table, struct mutex *mutex);
+++int wg_allowedips_insert_v4(struct allowedips *table, const struct in_addr *ip,
+++			    u8 cidr, struct wg_peer *peer, struct mutex *lock);
+++int wg_allowedips_insert_v6(struct allowedips *table, const struct in6_addr *ip,
+++			    u8 cidr, struct wg_peer *peer, struct mutex *lock);
+++void wg_allowedips_remove_by_peer(struct allowedips *table,
+++				  struct wg_peer *peer, struct mutex *lock);
+++/* The ip input pointer should be __aligned(__alignof(u64))) */
+++int wg_allowedips_read_node(struct allowedips_node *node, u8 ip[16], u8 *cidr);
+++
+++/* These return a strong reference to a peer: */
+++struct wg_peer *wg_allowedips_lookup_dst(struct allowedips *table,
+++					 struct sk_buff *skb);
+++struct wg_peer *wg_allowedips_lookup_src(struct allowedips *table,
+++					 struct sk_buff *skb);
+++
+++#ifdef DEBUG
+++bool wg_allowedips_selftest(void);
+++#endif
+++
+++#endif /* _WG_ALLOWEDIPS_H */
++--- /dev/null
+++++ b/drivers/net/wireguard/cookie.c
++@@ -0,0 +1,236 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include "cookie.h"
+++#include "peer.h"
+++#include "device.h"
+++#include "messages.h"
+++#include "ratelimiter.h"
+++#include "timers.h"
+++
+++#include <crypto/blake2s.h>
+++#include <crypto/chacha20poly1305.h>
+++
+++#include <net/ipv6.h>
+++#include <crypto/algapi.h>
+++
+++void wg_cookie_checker_init(struct cookie_checker *checker,
+++			    struct wg_device *wg)
+++{
+++	init_rwsem(&checker->secret_lock);
+++	checker->secret_birthdate = ktime_get_coarse_boottime_ns();
+++	get_random_bytes(checker->secret, NOISE_HASH_LEN);
+++	checker->device = wg;
+++}
+++
+++enum { COOKIE_KEY_LABEL_LEN = 8 };
+++static const u8 mac1_key_label[COOKIE_KEY_LABEL_LEN] = "mac1----";
+++static const u8 cookie_key_label[COOKIE_KEY_LABEL_LEN] = "cookie--";
+++
+++static void precompute_key(u8 key[NOISE_SYMMETRIC_KEY_LEN],
+++			   const u8 pubkey[NOISE_PUBLIC_KEY_LEN],
+++			   const u8 label[COOKIE_KEY_LABEL_LEN])
+++{
+++	struct blake2s_state blake;
+++
+++	blake2s_init(&blake, NOISE_SYMMETRIC_KEY_LEN);
+++	blake2s_update(&blake, label, COOKIE_KEY_LABEL_LEN);
+++	blake2s_update(&blake, pubkey, NOISE_PUBLIC_KEY_LEN);
+++	blake2s_final(&blake, key);
+++}
+++
+++/* Must hold peer->handshake.static_identity->lock */
+++void wg_cookie_checker_precompute_device_keys(struct cookie_checker *checker)
+++{
+++	if (likely(checker->device->static_identity.has_identity)) {
+++		precompute_key(checker->cookie_encryption_key,
+++			       checker->device->static_identity.static_public,
+++			       cookie_key_label);
+++		precompute_key(checker->message_mac1_key,
+++			       checker->device->static_identity.static_public,
+++			       mac1_key_label);
+++	} else {
+++		memset(checker->cookie_encryption_key, 0,
+++		       NOISE_SYMMETRIC_KEY_LEN);
+++		memset(checker->message_mac1_key, 0, NOISE_SYMMETRIC_KEY_LEN);
+++	}
+++}
+++
+++void wg_cookie_checker_precompute_peer_keys(struct wg_peer *peer)
+++{
+++	precompute_key(peer->latest_cookie.cookie_decryption_key,
+++		       peer->handshake.remote_static, cookie_key_label);
+++	precompute_key(peer->latest_cookie.message_mac1_key,
+++		       peer->handshake.remote_static, mac1_key_label);
+++}
+++
+++void wg_cookie_init(struct cookie *cookie)
+++{
+++	memset(cookie, 0, sizeof(*cookie));
+++	init_rwsem(&cookie->lock);
+++}
+++
+++static void compute_mac1(u8 mac1[COOKIE_LEN], const void *message, size_t len,
+++			 const u8 key[NOISE_SYMMETRIC_KEY_LEN])
+++{
+++	len = len - sizeof(struct message_macs) +
+++	      offsetof(struct message_macs, mac1);
+++	blake2s(mac1, message, key, COOKIE_LEN, len, NOISE_SYMMETRIC_KEY_LEN);
+++}
+++
+++static void compute_mac2(u8 mac2[COOKIE_LEN], const void *message, size_t len,
+++			 const u8 cookie[COOKIE_LEN])
+++{
+++	len = len - sizeof(struct message_macs) +
+++	      offsetof(struct message_macs, mac2);
+++	blake2s(mac2, message, cookie, COOKIE_LEN, len, COOKIE_LEN);
+++}
+++
+++static void make_cookie(u8 cookie[COOKIE_LEN], struct sk_buff *skb,
+++			struct cookie_checker *checker)
+++{
+++	struct blake2s_state state;
+++
+++	if (wg_birthdate_has_expired(checker->secret_birthdate,
+++				     COOKIE_SECRET_MAX_AGE)) {
+++		down_write(&checker->secret_lock);
+++		checker->secret_birthdate = ktime_get_coarse_boottime_ns();
+++		get_random_bytes(checker->secret, NOISE_HASH_LEN);
+++		up_write(&checker->secret_lock);
+++	}
+++
+++	down_read(&checker->secret_lock);
+++
+++	blake2s_init_key(&state, COOKIE_LEN, checker->secret, NOISE_HASH_LEN);
+++	if (skb->protocol == htons(ETH_P_IP))
+++		blake2s_update(&state, (u8 *)&ip_hdr(skb)->saddr,
+++			       sizeof(struct in_addr));
+++	else if (skb->protocol == htons(ETH_P_IPV6))
+++		blake2s_update(&state, (u8 *)&ipv6_hdr(skb)->saddr,
+++			       sizeof(struct in6_addr));
+++	blake2s_update(&state, (u8 *)&udp_hdr(skb)->source, sizeof(__be16));
+++	blake2s_final(&state, cookie);
+++
+++	up_read(&checker->secret_lock);
+++}
+++
+++enum cookie_mac_state wg_cookie_validate_packet(struct cookie_checker *checker,
+++						struct sk_buff *skb,
+++						bool check_cookie)
+++{
+++	struct message_macs *macs = (struct message_macs *)
+++		(skb->data + skb->len - sizeof(*macs));
+++	enum cookie_mac_state ret;
+++	u8 computed_mac[COOKIE_LEN];
+++	u8 cookie[COOKIE_LEN];
+++
+++	ret = INVALID_MAC;
+++	compute_mac1(computed_mac, skb->data, skb->len,
+++		     checker->message_mac1_key);
+++	if (crypto_memneq(computed_mac, macs->mac1, COOKIE_LEN))
+++		goto out;
+++
+++	ret = VALID_MAC_BUT_NO_COOKIE;
+++
+++	if (!check_cookie)
+++		goto out;
+++
+++	make_cookie(cookie, skb, checker);
+++
+++	compute_mac2(computed_mac, skb->data, skb->len, cookie);
+++	if (crypto_memneq(computed_mac, macs->mac2, COOKIE_LEN))
+++		goto out;
+++
+++	ret = VALID_MAC_WITH_COOKIE_BUT_RATELIMITED;
+++	if (!wg_ratelimiter_allow(skb, dev_net(checker->device->dev)))
+++		goto out;
+++
+++	ret = VALID_MAC_WITH_COOKIE;
+++
+++out:
+++	return ret;
+++}
+++
+++void wg_cookie_add_mac_to_packet(void *message, size_t len,
+++				 struct wg_peer *peer)
+++{
+++	struct message_macs *macs = (struct message_macs *)
+++		((u8 *)message + len - sizeof(*macs));
+++
+++	down_write(&peer->latest_cookie.lock);
+++	compute_mac1(macs->mac1, message, len,
+++		     peer->latest_cookie.message_mac1_key);
+++	memcpy(peer->latest_cookie.last_mac1_sent, macs->mac1, COOKIE_LEN);
+++	peer->latest_cookie.have_sent_mac1 = true;
+++	up_write(&peer->latest_cookie.lock);
+++
+++	down_read(&peer->latest_cookie.lock);
+++	if (peer->latest_cookie.is_valid &&
+++	    !wg_birthdate_has_expired(peer->latest_cookie.birthdate,
+++				COOKIE_SECRET_MAX_AGE - COOKIE_SECRET_LATENCY))
+++		compute_mac2(macs->mac2, message, len,
+++			     peer->latest_cookie.cookie);
+++	else
+++		memset(macs->mac2, 0, COOKIE_LEN);
+++	up_read(&peer->latest_cookie.lock);
+++}
+++
+++void wg_cookie_message_create(struct message_handshake_cookie *dst,
+++			      struct sk_buff *skb, __le32 index,
+++			      struct cookie_checker *checker)
+++{
+++	struct message_macs *macs = (struct message_macs *)
+++		((u8 *)skb->data + skb->len - sizeof(*macs));
+++	u8 cookie[COOKIE_LEN];
+++
+++	dst->header.type = cpu_to_le32(MESSAGE_HANDSHAKE_COOKIE);
+++	dst->receiver_index = index;
+++	get_random_bytes_wait(dst->nonce, COOKIE_NONCE_LEN);
+++
+++	make_cookie(cookie, skb, checker);
+++	xchacha20poly1305_encrypt(dst->encrypted_cookie, cookie, COOKIE_LEN,
+++				  macs->mac1, COOKIE_LEN, dst->nonce,
+++				  checker->cookie_encryption_key);
+++}
+++
+++void wg_cookie_message_consume(struct message_handshake_cookie *src,
+++			       struct wg_device *wg)
+++{
+++	struct wg_peer *peer = NULL;
+++	u8 cookie[COOKIE_LEN];
+++	bool ret;
+++
+++	if (unlikely(!wg_index_hashtable_lookup(wg->index_hashtable,
+++						INDEX_HASHTABLE_HANDSHAKE |
+++						INDEX_HASHTABLE_KEYPAIR,
+++						src->receiver_index, &peer)))
+++		return;
+++
+++	down_read(&peer->latest_cookie.lock);
+++	if (unlikely(!peer->latest_cookie.have_sent_mac1)) {
+++		up_read(&peer->latest_cookie.lock);
+++		goto out;
+++	}
+++	ret = xchacha20poly1305_decrypt(
+++		cookie, src->encrypted_cookie, sizeof(src->encrypted_cookie),
+++		peer->latest_cookie.last_mac1_sent, COOKIE_LEN, src->nonce,
+++		peer->latest_cookie.cookie_decryption_key);
+++	up_read(&peer->latest_cookie.lock);
+++
+++	if (ret) {
+++		down_write(&peer->latest_cookie.lock);
+++		memcpy(peer->latest_cookie.cookie, cookie, COOKIE_LEN);
+++		peer->latest_cookie.birthdate = ktime_get_coarse_boottime_ns();
+++		peer->latest_cookie.is_valid = true;
+++		peer->latest_cookie.have_sent_mac1 = false;
+++		up_write(&peer->latest_cookie.lock);
+++	} else {
+++		net_dbg_ratelimited("%s: Could not decrypt invalid cookie response\n",
+++				    wg->dev->name);
+++	}
+++
+++out:
+++	wg_peer_put(peer);
+++}
++--- /dev/null
+++++ b/drivers/net/wireguard/cookie.h
++@@ -0,0 +1,59 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#ifndef _WG_COOKIE_H
+++#define _WG_COOKIE_H
+++
+++#include "messages.h"
+++#include <linux/rwsem.h>
+++
+++struct wg_peer;
+++
+++struct cookie_checker {
+++	u8 secret[NOISE_HASH_LEN];
+++	u8 cookie_encryption_key[NOISE_SYMMETRIC_KEY_LEN];
+++	u8 message_mac1_key[NOISE_SYMMETRIC_KEY_LEN];
+++	u64 secret_birthdate;
+++	struct rw_semaphore secret_lock;
+++	struct wg_device *device;
+++};
+++
+++struct cookie {
+++	u64 birthdate;
+++	bool is_valid;
+++	u8 cookie[COOKIE_LEN];
+++	bool have_sent_mac1;
+++	u8 last_mac1_sent[COOKIE_LEN];
+++	u8 cookie_decryption_key[NOISE_SYMMETRIC_KEY_LEN];
+++	u8 message_mac1_key[NOISE_SYMMETRIC_KEY_LEN];
+++	struct rw_semaphore lock;
+++};
+++
+++enum cookie_mac_state {
+++	INVALID_MAC,
+++	VALID_MAC_BUT_NO_COOKIE,
+++	VALID_MAC_WITH_COOKIE_BUT_RATELIMITED,
+++	VALID_MAC_WITH_COOKIE
+++};
+++
+++void wg_cookie_checker_init(struct cookie_checker *checker,
+++			    struct wg_device *wg);
+++void wg_cookie_checker_precompute_device_keys(struct cookie_checker *checker);
+++void wg_cookie_checker_precompute_peer_keys(struct wg_peer *peer);
+++void wg_cookie_init(struct cookie *cookie);
+++
+++enum cookie_mac_state wg_cookie_validate_packet(struct cookie_checker *checker,
+++						struct sk_buff *skb,
+++						bool check_cookie);
+++void wg_cookie_add_mac_to_packet(void *message, size_t len,
+++				 struct wg_peer *peer);
+++
+++void wg_cookie_message_create(struct message_handshake_cookie *src,
+++			      struct sk_buff *skb, __le32 index,
+++			      struct cookie_checker *checker);
+++void wg_cookie_message_consume(struct message_handshake_cookie *src,
+++			       struct wg_device *wg);
+++
+++#endif /* _WG_COOKIE_H */
++--- /dev/null
+++++ b/drivers/net/wireguard/device.c
++@@ -0,0 +1,458 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include "queueing.h"
+++#include "socket.h"
+++#include "timers.h"
+++#include "device.h"
+++#include "ratelimiter.h"
+++#include "peer.h"
+++#include "messages.h"
+++
+++#include <linux/module.h>
+++#include <linux/rtnetlink.h>
+++#include <linux/inet.h>
+++#include <linux/netdevice.h>
+++#include <linux/inetdevice.h>
+++#include <linux/if_arp.h>
+++#include <linux/icmp.h>
+++#include <linux/suspend.h>
+++#include <net/icmp.h>
+++#include <net/rtnetlink.h>
+++#include <net/ip_tunnels.h>
+++#include <net/addrconf.h>
+++
+++static LIST_HEAD(device_list);
+++
+++static int wg_open(struct net_device *dev)
+++{
+++	struct in_device *dev_v4 = __in_dev_get_rtnl(dev);
+++	struct inet6_dev *dev_v6 = __in6_dev_get(dev);
+++	struct wg_device *wg = netdev_priv(dev);
+++	struct wg_peer *peer;
+++	int ret;
+++
+++	if (dev_v4) {
+++		/* At some point we might put this check near the ip_rt_send_
+++		 * redirect call of ip_forward in net/ipv4/ip_forward.c, similar
+++		 * to the current secpath check.
+++		 */
+++		IN_DEV_CONF_SET(dev_v4, SEND_REDIRECTS, false);
+++		IPV4_DEVCONF_ALL(dev_net(dev), SEND_REDIRECTS) = false;
+++	}
+++	if (dev_v6)
+++		dev_v6->cnf.addr_gen_mode = IN6_ADDR_GEN_MODE_NONE;
+++
+++	ret = wg_socket_init(wg, wg->incoming_port);
+++	if (ret < 0)
+++		return ret;
+++	mutex_lock(&wg->device_update_lock);
+++	list_for_each_entry(peer, &wg->peer_list, peer_list) {
+++		wg_packet_send_staged_packets(peer);
+++		if (peer->persistent_keepalive_interval)
+++			wg_packet_send_keepalive(peer);
+++	}
+++	mutex_unlock(&wg->device_update_lock);
+++	return 0;
+++}
+++
+++#ifdef CONFIG_PM_SLEEP
+++static int wg_pm_notification(struct notifier_block *nb, unsigned long action,
+++			      void *data)
+++{
+++	struct wg_device *wg;
+++	struct wg_peer *peer;
+++
+++	/* If the machine is constantly suspending and resuming, as part of
+++	 * its normal operation rather than as a somewhat rare event, then we
+++	 * don't actually want to clear keys.
+++	 */
+++	if (IS_ENABLED(CONFIG_PM_AUTOSLEEP) || IS_ENABLED(CONFIG_ANDROID))
+++		return 0;
+++
+++	if (action != PM_HIBERNATION_PREPARE && action != PM_SUSPEND_PREPARE)
+++		return 0;
+++
+++	rtnl_lock();
+++	list_for_each_entry(wg, &device_list, device_list) {
+++		mutex_lock(&wg->device_update_lock);
+++		list_for_each_entry(peer, &wg->peer_list, peer_list) {
+++			del_timer(&peer->timer_zero_key_material);
+++			wg_noise_handshake_clear(&peer->handshake);
+++			wg_noise_keypairs_clear(&peer->keypairs);
+++		}
+++		mutex_unlock(&wg->device_update_lock);
+++	}
+++	rtnl_unlock();
+++	rcu_barrier();
+++	return 0;
+++}
+++
+++static struct notifier_block pm_notifier = { .notifier_call = wg_pm_notification };
+++#endif
+++
+++static int wg_stop(struct net_device *dev)
+++{
+++	struct wg_device *wg = netdev_priv(dev);
+++	struct wg_peer *peer;
+++
+++	mutex_lock(&wg->device_update_lock);
+++	list_for_each_entry(peer, &wg->peer_list, peer_list) {
+++		wg_packet_purge_staged_packets(peer);
+++		wg_timers_stop(peer);
+++		wg_noise_handshake_clear(&peer->handshake);
+++		wg_noise_keypairs_clear(&peer->keypairs);
+++		wg_noise_reset_last_sent_handshake(&peer->last_sent_handshake);
+++	}
+++	mutex_unlock(&wg->device_update_lock);
+++	skb_queue_purge(&wg->incoming_handshakes);
+++	wg_socket_reinit(wg, NULL, NULL);
+++	return 0;
+++}
+++
+++static netdev_tx_t wg_xmit(struct sk_buff *skb, struct net_device *dev)
+++{
+++	struct wg_device *wg = netdev_priv(dev);
+++	struct sk_buff_head packets;
+++	struct wg_peer *peer;
+++	struct sk_buff *next;
+++	sa_family_t family;
+++	u32 mtu;
+++	int ret;
+++
+++	if (unlikely(wg_skb_examine_untrusted_ip_hdr(skb) != skb->protocol)) {
+++		ret = -EPROTONOSUPPORT;
+++		net_dbg_ratelimited("%s: Invalid IP packet\n", dev->name);
+++		goto err;
+++	}
+++
+++	peer = wg_allowedips_lookup_dst(&wg->peer_allowedips, skb);
+++	if (unlikely(!peer)) {
+++		ret = -ENOKEY;
+++		if (skb->protocol == htons(ETH_P_IP))
+++			net_dbg_ratelimited("%s: No peer has allowed IPs matching %pI4\n",
+++					    dev->name, &ip_hdr(skb)->daddr);
+++		else if (skb->protocol == htons(ETH_P_IPV6))
+++			net_dbg_ratelimited("%s: No peer has allowed IPs matching %pI6\n",
+++					    dev->name, &ipv6_hdr(skb)->daddr);
+++		goto err;
+++	}
+++
+++	family = READ_ONCE(peer->endpoint.addr.sa_family);
+++	if (unlikely(family != AF_INET && family != AF_INET6)) {
+++		ret = -EDESTADDRREQ;
+++		net_dbg_ratelimited("%s: No valid endpoint has been configured or discovered for peer %llu\n",
+++				    dev->name, peer->internal_id);
+++		goto err_peer;
+++	}
+++
+++	mtu = skb_dst(skb) ? dst_mtu(skb_dst(skb)) : dev->mtu;
+++
+++	__skb_queue_head_init(&packets);
+++	if (!skb_is_gso(skb)) {
+++		skb_mark_not_on_list(skb);
+++	} else {
+++		struct sk_buff *segs = skb_gso_segment(skb, 0);
+++
+++		if (unlikely(IS_ERR(segs))) {
+++			ret = PTR_ERR(segs);
+++			goto err_peer;
+++		}
+++		dev_kfree_skb(skb);
+++		skb = segs;
+++	}
+++
+++	skb_list_walk_safe(skb, skb, next) {
+++		skb_mark_not_on_list(skb);
+++
+++		skb = skb_share_check(skb, GFP_ATOMIC);
+++		if (unlikely(!skb))
+++			continue;
+++
+++		/* We only need to keep the original dst around for icmp,
+++		 * so at this point we're in a position to drop it.
+++		 */
+++		skb_dst_drop(skb);
+++
+++		PACKET_CB(skb)->mtu = mtu;
+++
+++		__skb_queue_tail(&packets, skb);
+++	}
+++
+++	spin_lock_bh(&peer->staged_packet_queue.lock);
+++	/* If the queue is getting too big, we start removing the oldest packets
+++	 * until it's small again. We do this before adding the new packet, so
+++	 * we don't remove GSO segments that are in excess.
+++	 */
+++	while (skb_queue_len(&peer->staged_packet_queue) > MAX_STAGED_PACKETS) {
+++		dev_kfree_skb(__skb_dequeue(&peer->staged_packet_queue));
+++		++dev->stats.tx_dropped;
+++	}
+++	skb_queue_splice_tail(&packets, &peer->staged_packet_queue);
+++	spin_unlock_bh(&peer->staged_packet_queue.lock);
+++
+++	wg_packet_send_staged_packets(peer);
+++
+++	wg_peer_put(peer);
+++	return NETDEV_TX_OK;
+++
+++err_peer:
+++	wg_peer_put(peer);
+++err:
+++	++dev->stats.tx_errors;
+++	if (skb->protocol == htons(ETH_P_IP))
+++		icmp_send(skb, ICMP_DEST_UNREACH, ICMP_HOST_UNREACH, 0);
+++	else if (skb->protocol == htons(ETH_P_IPV6))
+++		icmpv6_send(skb, ICMPV6_DEST_UNREACH, ICMPV6_ADDR_UNREACH, 0);
+++	kfree_skb(skb);
+++	return ret;
+++}
+++
+++static const struct net_device_ops netdev_ops = {
+++	.ndo_open		= wg_open,
+++	.ndo_stop		= wg_stop,
+++	.ndo_start_xmit		= wg_xmit,
+++	.ndo_get_stats64	= ip_tunnel_get_stats64
+++};
+++
+++static void wg_destruct(struct net_device *dev)
+++{
+++	struct wg_device *wg = netdev_priv(dev);
+++
+++	rtnl_lock();
+++	list_del(&wg->device_list);
+++	rtnl_unlock();
+++	mutex_lock(&wg->device_update_lock);
+++	wg->incoming_port = 0;
+++	wg_socket_reinit(wg, NULL, NULL);
+++	/* The final references are cleared in the below calls to destroy_workqueue. */
+++	wg_peer_remove_all(wg);
+++	destroy_workqueue(wg->handshake_receive_wq);
+++	destroy_workqueue(wg->handshake_send_wq);
+++	destroy_workqueue(wg->packet_crypt_wq);
+++	wg_packet_queue_free(&wg->decrypt_queue, true);
+++	wg_packet_queue_free(&wg->encrypt_queue, true);
+++	rcu_barrier(); /* Wait for all the peers to be actually freed. */
+++	wg_ratelimiter_uninit();
+++	memzero_explicit(&wg->static_identity, sizeof(wg->static_identity));
+++	skb_queue_purge(&wg->incoming_handshakes);
+++	free_percpu(dev->tstats);
+++	free_percpu(wg->incoming_handshakes_worker);
+++	if (wg->have_creating_net_ref)
+++		put_net(wg->creating_net);
+++	kvfree(wg->index_hashtable);
+++	kvfree(wg->peer_hashtable);
+++	mutex_unlock(&wg->device_update_lock);
+++
+++	pr_debug("%s: Interface deleted\n", dev->name);
+++	free_netdev(dev);
+++}
+++
+++static const struct device_type device_type = { .name = KBUILD_MODNAME };
+++
+++static void wg_setup(struct net_device *dev)
+++{
+++	struct wg_device *wg = netdev_priv(dev);
+++	enum { WG_NETDEV_FEATURES = NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
+++				    NETIF_F_SG | NETIF_F_GSO |
+++				    NETIF_F_GSO_SOFTWARE | NETIF_F_HIGHDMA };
+++
+++	dev->netdev_ops = &netdev_ops;
+++	dev->hard_header_len = 0;
+++	dev->addr_len = 0;
+++	dev->needed_headroom = DATA_PACKET_HEAD_ROOM;
+++	dev->needed_tailroom = noise_encrypted_len(MESSAGE_PADDING_MULTIPLE);
+++	dev->type = ARPHRD_NONE;
+++	dev->flags = IFF_POINTOPOINT | IFF_NOARP;
+++	dev->priv_flags |= IFF_NO_QUEUE;
+++	dev->features |= NETIF_F_LLTX;
+++	dev->features |= WG_NETDEV_FEATURES;
+++	dev->hw_features |= WG_NETDEV_FEATURES;
+++	dev->hw_enc_features |= WG_NETDEV_FEATURES;
+++	dev->mtu = ETH_DATA_LEN - MESSAGE_MINIMUM_LENGTH -
+++		   sizeof(struct udphdr) -
+++		   max(sizeof(struct ipv6hdr), sizeof(struct iphdr));
+++
+++	SET_NETDEV_DEVTYPE(dev, &device_type);
+++
+++	/* We need to keep the dst around in case of icmp replies. */
+++	netif_keep_dst(dev);
+++
+++	memset(wg, 0, sizeof(*wg));
+++	wg->dev = dev;
+++}
+++
+++static int wg_newlink(struct net *src_net, struct net_device *dev,
+++		      struct nlattr *tb[], struct nlattr *data[],
+++		      struct netlink_ext_ack *extack)
+++{
+++	struct wg_device *wg = netdev_priv(dev);
+++	int ret = -ENOMEM;
+++
+++	wg->creating_net = src_net;
+++	init_rwsem(&wg->static_identity.lock);
+++	mutex_init(&wg->socket_update_lock);
+++	mutex_init(&wg->device_update_lock);
+++	skb_queue_head_init(&wg->incoming_handshakes);
+++	wg_allowedips_init(&wg->peer_allowedips);
+++	wg_cookie_checker_init(&wg->cookie_checker, wg);
+++	INIT_LIST_HEAD(&wg->peer_list);
+++	wg->device_update_gen = 1;
+++
+++	wg->peer_hashtable = wg_pubkey_hashtable_alloc();
+++	if (!wg->peer_hashtable)
+++		return ret;
+++
+++	wg->index_hashtable = wg_index_hashtable_alloc();
+++	if (!wg->index_hashtable)
+++		goto err_free_peer_hashtable;
+++
+++	dev->tstats = netdev_alloc_pcpu_stats(struct pcpu_sw_netstats);
+++	if (!dev->tstats)
+++		goto err_free_index_hashtable;
+++
+++	wg->incoming_handshakes_worker =
+++		wg_packet_percpu_multicore_worker_alloc(
+++				wg_packet_handshake_receive_worker, wg);
+++	if (!wg->incoming_handshakes_worker)
+++		goto err_free_tstats;
+++
+++	wg->handshake_receive_wq = alloc_workqueue("wg-kex-%s",
+++			WQ_CPU_INTENSIVE | WQ_FREEZABLE, 0, dev->name);
+++	if (!wg->handshake_receive_wq)
+++		goto err_free_incoming_handshakes;
+++
+++	wg->handshake_send_wq = alloc_workqueue("wg-kex-%s",
+++			WQ_UNBOUND | WQ_FREEZABLE, 0, dev->name);
+++	if (!wg->handshake_send_wq)
+++		goto err_destroy_handshake_receive;
+++
+++	wg->packet_crypt_wq = alloc_workqueue("wg-crypt-%s",
+++			WQ_CPU_INTENSIVE | WQ_MEM_RECLAIM, 0, dev->name);
+++	if (!wg->packet_crypt_wq)
+++		goto err_destroy_handshake_send;
+++
+++	ret = wg_packet_queue_init(&wg->encrypt_queue, wg_packet_encrypt_worker,
+++				   true, MAX_QUEUED_PACKETS);
+++	if (ret < 0)
+++		goto err_destroy_packet_crypt;
+++
+++	ret = wg_packet_queue_init(&wg->decrypt_queue, wg_packet_decrypt_worker,
+++				   true, MAX_QUEUED_PACKETS);
+++	if (ret < 0)
+++		goto err_free_encrypt_queue;
+++
+++	ret = wg_ratelimiter_init();
+++	if (ret < 0)
+++		goto err_free_decrypt_queue;
+++
+++	ret = register_netdevice(dev);
+++	if (ret < 0)
+++		goto err_uninit_ratelimiter;
+++
+++	list_add(&wg->device_list, &device_list);
+++
+++	/* We wait until the end to assign priv_destructor, so that
+++	 * register_netdevice doesn't call it for us if it fails.
+++	 */
+++	dev->priv_destructor = wg_destruct;
+++
+++	pr_debug("%s: Interface created\n", dev->name);
+++	return ret;
+++
+++err_uninit_ratelimiter:
+++	wg_ratelimiter_uninit();
+++err_free_decrypt_queue:
+++	wg_packet_queue_free(&wg->decrypt_queue, true);
+++err_free_encrypt_queue:
+++	wg_packet_queue_free(&wg->encrypt_queue, true);
+++err_destroy_packet_crypt:
+++	destroy_workqueue(wg->packet_crypt_wq);
+++err_destroy_handshake_send:
+++	destroy_workqueue(wg->handshake_send_wq);
+++err_destroy_handshake_receive:
+++	destroy_workqueue(wg->handshake_receive_wq);
+++err_free_incoming_handshakes:
+++	free_percpu(wg->incoming_handshakes_worker);
+++err_free_tstats:
+++	free_percpu(dev->tstats);
+++err_free_index_hashtable:
+++	kvfree(wg->index_hashtable);
+++err_free_peer_hashtable:
+++	kvfree(wg->peer_hashtable);
+++	return ret;
+++}
+++
+++static struct rtnl_link_ops link_ops __read_mostly = {
+++	.kind			= KBUILD_MODNAME,
+++	.priv_size		= sizeof(struct wg_device),
+++	.setup			= wg_setup,
+++	.newlink		= wg_newlink,
+++};
+++
+++static int wg_netdevice_notification(struct notifier_block *nb,
+++				     unsigned long action, void *data)
+++{
+++	struct net_device *dev = ((struct netdev_notifier_info *)data)->dev;
+++	struct wg_device *wg = netdev_priv(dev);
+++
+++	ASSERT_RTNL();
+++
+++	if (action != NETDEV_REGISTER || dev->netdev_ops != &netdev_ops)
+++		return 0;
+++
+++	if (dev_net(dev) == wg->creating_net && wg->have_creating_net_ref) {
+++		put_net(wg->creating_net);
+++		wg->have_creating_net_ref = false;
+++	} else if (dev_net(dev) != wg->creating_net &&
+++		   !wg->have_creating_net_ref) {
+++		wg->have_creating_net_ref = true;
+++		get_net(wg->creating_net);
+++	}
+++	return 0;
+++}
+++
+++static struct notifier_block netdevice_notifier = {
+++	.notifier_call = wg_netdevice_notification
+++};
+++
+++int __init wg_device_init(void)
+++{
+++	int ret;
+++
+++#ifdef CONFIG_PM_SLEEP
+++	ret = register_pm_notifier(&pm_notifier);
+++	if (ret)
+++		return ret;
+++#endif
+++
+++	ret = register_netdevice_notifier(&netdevice_notifier);
+++	if (ret)
+++		goto error_pm;
+++
+++	ret = rtnl_link_register(&link_ops);
+++	if (ret)
+++		goto error_netdevice;
+++
+++	return 0;
+++
+++error_netdevice:
+++	unregister_netdevice_notifier(&netdevice_notifier);
+++error_pm:
+++#ifdef CONFIG_PM_SLEEP
+++	unregister_pm_notifier(&pm_notifier);
+++#endif
+++	return ret;
+++}
+++
+++void wg_device_uninit(void)
+++{
+++	rtnl_link_unregister(&link_ops);
+++	unregister_netdevice_notifier(&netdevice_notifier);
+++#ifdef CONFIG_PM_SLEEP
+++	unregister_pm_notifier(&pm_notifier);
+++#endif
+++	rcu_barrier();
+++}
++--- /dev/null
+++++ b/drivers/net/wireguard/device.h
++@@ -0,0 +1,65 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#ifndef _WG_DEVICE_H
+++#define _WG_DEVICE_H
+++
+++#include "noise.h"
+++#include "allowedips.h"
+++#include "peerlookup.h"
+++#include "cookie.h"
+++
+++#include <linux/types.h>
+++#include <linux/netdevice.h>
+++#include <linux/workqueue.h>
+++#include <linux/mutex.h>
+++#include <linux/net.h>
+++#include <linux/ptr_ring.h>
+++
+++struct wg_device;
+++
+++struct multicore_worker {
+++	void *ptr;
+++	struct work_struct work;
+++};
+++
+++struct crypt_queue {
+++	struct ptr_ring ring;
+++	union {
+++		struct {
+++			struct multicore_worker __percpu *worker;
+++			int last_cpu;
+++		};
+++		struct work_struct work;
+++	};
+++};
+++
+++struct wg_device {
+++	struct net_device *dev;
+++	struct crypt_queue encrypt_queue, decrypt_queue;
+++	struct sock __rcu *sock4, *sock6;
+++	struct net *creating_net;
+++	struct noise_static_identity static_identity;
+++	struct workqueue_struct *handshake_receive_wq, *handshake_send_wq;
+++	struct workqueue_struct *packet_crypt_wq;
+++	struct sk_buff_head incoming_handshakes;
+++	int incoming_handshake_cpu;
+++	struct multicore_worker __percpu *incoming_handshakes_worker;
+++	struct cookie_checker cookie_checker;
+++	struct pubkey_hashtable *peer_hashtable;
+++	struct index_hashtable *index_hashtable;
+++	struct allowedips peer_allowedips;
+++	struct mutex device_update_lock, socket_update_lock;
+++	struct list_head device_list, peer_list;
+++	unsigned int num_peers, device_update_gen;
+++	u32 fwmark;
+++	u16 incoming_port;
+++	bool have_creating_net_ref;
+++};
+++
+++int wg_device_init(void);
+++void wg_device_uninit(void);
+++
+++#endif /* _WG_DEVICE_H */
++--- /dev/null
+++++ b/drivers/net/wireguard/main.c
++@@ -0,0 +1,64 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include "version.h"
+++#include "device.h"
+++#include "noise.h"
+++#include "queueing.h"
+++#include "ratelimiter.h"
+++#include "netlink.h"
+++
+++#include <uapi/linux/wireguard.h>
+++
+++#include <linux/version.h>
+++#include <linux/init.h>
+++#include <linux/module.h>
+++#include <linux/genetlink.h>
+++#include <net/rtnetlink.h>
+++
+++static int __init mod_init(void)
+++{
+++	int ret;
+++
+++#ifdef DEBUG
+++	if (!wg_allowedips_selftest() || !wg_packet_counter_selftest() ||
+++	    !wg_ratelimiter_selftest())
+++		return -ENOTRECOVERABLE;
+++#endif
+++	wg_noise_init();
+++
+++	ret = wg_device_init();
+++	if (ret < 0)
+++		goto err_device;
+++
+++	ret = wg_genetlink_init();
+++	if (ret < 0)
+++		goto err_netlink;
+++
+++	pr_info("WireGuard " WIREGUARD_VERSION " loaded. See www.wireguard.com for information.\n");
+++	pr_info("Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.\n");
+++
+++	return 0;
+++
+++err_netlink:
+++	wg_device_uninit();
+++err_device:
+++	return ret;
+++}
+++
+++static void __exit mod_exit(void)
+++{
+++	wg_genetlink_uninit();
+++	wg_device_uninit();
+++}
+++
+++module_init(mod_init);
+++module_exit(mod_exit);
+++MODULE_LICENSE("GPL v2");
+++MODULE_DESCRIPTION("WireGuard secure network tunnel");
+++MODULE_AUTHOR("Jason A. Donenfeld <Jason@zx2c4.com>");
+++MODULE_VERSION(WIREGUARD_VERSION);
+++MODULE_ALIAS_RTNL_LINK(KBUILD_MODNAME);
+++MODULE_ALIAS_GENL_FAMILY(WG_GENL_NAME);
++--- /dev/null
+++++ b/drivers/net/wireguard/messages.h
++@@ -0,0 +1,128 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#ifndef _WG_MESSAGES_H
+++#define _WG_MESSAGES_H
+++
+++#include <crypto/curve25519.h>
+++#include <crypto/chacha20poly1305.h>
+++#include <crypto/blake2s.h>
+++
+++#include <linux/kernel.h>
+++#include <linux/param.h>
+++#include <linux/skbuff.h>
+++
+++enum noise_lengths {
+++	NOISE_PUBLIC_KEY_LEN = CURVE25519_KEY_SIZE,
+++	NOISE_SYMMETRIC_KEY_LEN = CHACHA20POLY1305_KEY_SIZE,
+++	NOISE_TIMESTAMP_LEN = sizeof(u64) + sizeof(u32),
+++	NOISE_AUTHTAG_LEN = CHACHA20POLY1305_AUTHTAG_SIZE,
+++	NOISE_HASH_LEN = BLAKE2S_HASH_SIZE
+++};
+++
+++#define noise_encrypted_len(plain_len) ((plain_len) + NOISE_AUTHTAG_LEN)
+++
+++enum cookie_values {
+++	COOKIE_SECRET_MAX_AGE = 2 * 60,
+++	COOKIE_SECRET_LATENCY = 5,
+++	COOKIE_NONCE_LEN = XCHACHA20POLY1305_NONCE_SIZE,
+++	COOKIE_LEN = 16
+++};
+++
+++enum counter_values {
+++	COUNTER_BITS_TOTAL = 2048,
+++	COUNTER_REDUNDANT_BITS = BITS_PER_LONG,
+++	COUNTER_WINDOW_SIZE = COUNTER_BITS_TOTAL - COUNTER_REDUNDANT_BITS
+++};
+++
+++enum limits {
+++	REKEY_AFTER_MESSAGES = 1ULL << 60,
+++	REJECT_AFTER_MESSAGES = U64_MAX - COUNTER_WINDOW_SIZE - 1,
+++	REKEY_TIMEOUT = 5,
+++	REKEY_TIMEOUT_JITTER_MAX_JIFFIES = HZ / 3,
+++	REKEY_AFTER_TIME = 120,
+++	REJECT_AFTER_TIME = 180,
+++	INITIATIONS_PER_SECOND = 50,
+++	MAX_PEERS_PER_DEVICE = 1U << 20,
+++	KEEPALIVE_TIMEOUT = 10,
+++	MAX_TIMER_HANDSHAKES = 90 / REKEY_TIMEOUT,
+++	MAX_QUEUED_INCOMING_HANDSHAKES = 4096, /* TODO: replace this with DQL */
+++	MAX_STAGED_PACKETS = 128,
+++	MAX_QUEUED_PACKETS = 1024 /* TODO: replace this with DQL */
+++};
+++
+++enum message_type {
+++	MESSAGE_INVALID = 0,
+++	MESSAGE_HANDSHAKE_INITIATION = 1,
+++	MESSAGE_HANDSHAKE_RESPONSE = 2,
+++	MESSAGE_HANDSHAKE_COOKIE = 3,
+++	MESSAGE_DATA = 4
+++};
+++
+++struct message_header {
+++	/* The actual layout of this that we want is:
+++	 * u8 type
+++	 * u8 reserved_zero[3]
+++	 *
+++	 * But it turns out that by encoding this as little endian,
+++	 * we achieve the same thing, and it makes checking faster.
+++	 */
+++	__le32 type;
+++};
+++
+++struct message_macs {
+++	u8 mac1[COOKIE_LEN];
+++	u8 mac2[COOKIE_LEN];
+++};
+++
+++struct message_handshake_initiation {
+++	struct message_header header;
+++	__le32 sender_index;
+++	u8 unencrypted_ephemeral[NOISE_PUBLIC_KEY_LEN];
+++	u8 encrypted_static[noise_encrypted_len(NOISE_PUBLIC_KEY_LEN)];
+++	u8 encrypted_timestamp[noise_encrypted_len(NOISE_TIMESTAMP_LEN)];
+++	struct message_macs macs;
+++};
+++
+++struct message_handshake_response {
+++	struct message_header header;
+++	__le32 sender_index;
+++	__le32 receiver_index;
+++	u8 unencrypted_ephemeral[NOISE_PUBLIC_KEY_LEN];
+++	u8 encrypted_nothing[noise_encrypted_len(0)];
+++	struct message_macs macs;
+++};
+++
+++struct message_handshake_cookie {
+++	struct message_header header;
+++	__le32 receiver_index;
+++	u8 nonce[COOKIE_NONCE_LEN];
+++	u8 encrypted_cookie[noise_encrypted_len(COOKIE_LEN)];
+++};
+++
+++struct message_data {
+++	struct message_header header;
+++	__le32 key_idx;
+++	__le64 counter;
+++	u8 encrypted_data[];
+++};
+++
+++#define message_data_len(plain_len) \
+++	(noise_encrypted_len(plain_len) + sizeof(struct message_data))
+++
+++enum message_alignments {
+++	MESSAGE_PADDING_MULTIPLE = 16,
+++	MESSAGE_MINIMUM_LENGTH = message_data_len(0)
+++};
+++
+++#define SKB_HEADER_LEN                                       \
+++	(max(sizeof(struct iphdr), sizeof(struct ipv6hdr)) + \
+++	 sizeof(struct udphdr) + NET_SKB_PAD)
+++#define DATA_PACKET_HEAD_ROOM \
+++	ALIGN(sizeof(struct message_data) + SKB_HEADER_LEN, 4)
+++
+++enum { HANDSHAKE_DSCP = 0x88 /* AF41, plus 00 ECN */ };
+++
+++#endif /* _WG_MESSAGES_H */
++--- /dev/null
+++++ b/drivers/net/wireguard/netlink.c
++@@ -0,0 +1,648 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include "netlink.h"
+++#include "device.h"
+++#include "peer.h"
+++#include "socket.h"
+++#include "queueing.h"
+++#include "messages.h"
+++
+++#include <uapi/linux/wireguard.h>
+++
+++#include <linux/if.h>
+++#include <net/genetlink.h>
+++#include <net/sock.h>
+++#include <crypto/algapi.h>
+++
+++static struct genl_family genl_family;
+++
+++static const struct nla_policy device_policy[WGDEVICE_A_MAX + 1] = {
+++	[WGDEVICE_A_IFINDEX]		= { .type = NLA_U32 },
+++	[WGDEVICE_A_IFNAME]		= { .type = NLA_NUL_STRING, .len = IFNAMSIZ - 1 },
+++	[WGDEVICE_A_PRIVATE_KEY]	= { .type = NLA_EXACT_LEN, .len = NOISE_PUBLIC_KEY_LEN },
+++	[WGDEVICE_A_PUBLIC_KEY]		= { .type = NLA_EXACT_LEN, .len = NOISE_PUBLIC_KEY_LEN },
+++	[WGDEVICE_A_FLAGS]		= { .type = NLA_U32 },
+++	[WGDEVICE_A_LISTEN_PORT]	= { .type = NLA_U16 },
+++	[WGDEVICE_A_FWMARK]		= { .type = NLA_U32 },
+++	[WGDEVICE_A_PEERS]		= { .type = NLA_NESTED }
+++};
+++
+++static const struct nla_policy peer_policy[WGPEER_A_MAX + 1] = {
+++	[WGPEER_A_PUBLIC_KEY]				= { .type = NLA_EXACT_LEN, .len = NOISE_PUBLIC_KEY_LEN },
+++	[WGPEER_A_PRESHARED_KEY]			= { .type = NLA_EXACT_LEN, .len = NOISE_SYMMETRIC_KEY_LEN },
+++	[WGPEER_A_FLAGS]				= { .type = NLA_U32 },
+++	[WGPEER_A_ENDPOINT]				= { .type = NLA_MIN_LEN, .len = sizeof(struct sockaddr) },
+++	[WGPEER_A_PERSISTENT_KEEPALIVE_INTERVAL]	= { .type = NLA_U16 },
+++	[WGPEER_A_LAST_HANDSHAKE_TIME]			= { .type = NLA_EXACT_LEN, .len = sizeof(struct __kernel_timespec) },
+++	[WGPEER_A_RX_BYTES]				= { .type = NLA_U64 },
+++	[WGPEER_A_TX_BYTES]				= { .type = NLA_U64 },
+++	[WGPEER_A_ALLOWEDIPS]				= { .type = NLA_NESTED },
+++	[WGPEER_A_PROTOCOL_VERSION]			= { .type = NLA_U32 }
+++};
+++
+++static const struct nla_policy allowedip_policy[WGALLOWEDIP_A_MAX + 1] = {
+++	[WGALLOWEDIP_A_FAMILY]		= { .type = NLA_U16 },
+++	[WGALLOWEDIP_A_IPADDR]		= { .type = NLA_MIN_LEN, .len = sizeof(struct in_addr) },
+++	[WGALLOWEDIP_A_CIDR_MASK]	= { .type = NLA_U8 }
+++};
+++
+++static struct wg_device *lookup_interface(struct nlattr **attrs,
+++					  struct sk_buff *skb)
+++{
+++	struct net_device *dev = NULL;
+++
+++	if (!attrs[WGDEVICE_A_IFINDEX] == !attrs[WGDEVICE_A_IFNAME])
+++		return ERR_PTR(-EBADR);
+++	if (attrs[WGDEVICE_A_IFINDEX])
+++		dev = dev_get_by_index(sock_net(skb->sk),
+++				       nla_get_u32(attrs[WGDEVICE_A_IFINDEX]));
+++	else if (attrs[WGDEVICE_A_IFNAME])
+++		dev = dev_get_by_name(sock_net(skb->sk),
+++				      nla_data(attrs[WGDEVICE_A_IFNAME]));
+++	if (!dev)
+++		return ERR_PTR(-ENODEV);
+++	if (!dev->rtnl_link_ops || !dev->rtnl_link_ops->kind ||
+++	    strcmp(dev->rtnl_link_ops->kind, KBUILD_MODNAME)) {
+++		dev_put(dev);
+++		return ERR_PTR(-EOPNOTSUPP);
+++	}
+++	return netdev_priv(dev);
+++}
+++
+++static int get_allowedips(struct sk_buff *skb, const u8 *ip, u8 cidr,
+++			  int family)
+++{
+++	struct nlattr *allowedip_nest;
+++
+++	allowedip_nest = nla_nest_start(skb, 0);
+++	if (!allowedip_nest)
+++		return -EMSGSIZE;
+++
+++	if (nla_put_u8(skb, WGALLOWEDIP_A_CIDR_MASK, cidr) ||
+++	    nla_put_u16(skb, WGALLOWEDIP_A_FAMILY, family) ||
+++	    nla_put(skb, WGALLOWEDIP_A_IPADDR, family == AF_INET6 ?
+++		    sizeof(struct in6_addr) : sizeof(struct in_addr), ip)) {
+++		nla_nest_cancel(skb, allowedip_nest);
+++		return -EMSGSIZE;
+++	}
+++
+++	nla_nest_end(skb, allowedip_nest);
+++	return 0;
+++}
+++
+++struct dump_ctx {
+++	struct wg_device *wg;
+++	struct wg_peer *next_peer;
+++	u64 allowedips_seq;
+++	struct allowedips_node *next_allowedip;
+++};
+++
+++#define DUMP_CTX(cb) ((struct dump_ctx *)(cb)->args)
+++
+++static int
+++get_peer(struct wg_peer *peer, struct sk_buff *skb, struct dump_ctx *ctx)
+++{
+++
+++	struct nlattr *allowedips_nest, *peer_nest = nla_nest_start(skb, 0);
+++	struct allowedips_node *allowedips_node = ctx->next_allowedip;
+++	bool fail;
+++
+++	if (!peer_nest)
+++		return -EMSGSIZE;
+++
+++	down_read(&peer->handshake.lock);
+++	fail = nla_put(skb, WGPEER_A_PUBLIC_KEY, NOISE_PUBLIC_KEY_LEN,
+++		       peer->handshake.remote_static);
+++	up_read(&peer->handshake.lock);
+++	if (fail)
+++		goto err;
+++
+++	if (!allowedips_node) {
+++		const struct __kernel_timespec last_handshake = {
+++			.tv_sec = peer->walltime_last_handshake.tv_sec,
+++			.tv_nsec = peer->walltime_last_handshake.tv_nsec
+++		};
+++
+++		down_read(&peer->handshake.lock);
+++		fail = nla_put(skb, WGPEER_A_PRESHARED_KEY,
+++			       NOISE_SYMMETRIC_KEY_LEN,
+++			       peer->handshake.preshared_key);
+++		up_read(&peer->handshake.lock);
+++		if (fail)
+++			goto err;
+++
+++		if (nla_put(skb, WGPEER_A_LAST_HANDSHAKE_TIME,
+++			    sizeof(last_handshake), &last_handshake) ||
+++		    nla_put_u16(skb, WGPEER_A_PERSISTENT_KEEPALIVE_INTERVAL,
+++				peer->persistent_keepalive_interval) ||
+++		    nla_put_u64_64bit(skb, WGPEER_A_TX_BYTES, peer->tx_bytes,
+++				      WGPEER_A_UNSPEC) ||
+++		    nla_put_u64_64bit(skb, WGPEER_A_RX_BYTES, peer->rx_bytes,
+++				      WGPEER_A_UNSPEC) ||
+++		    nla_put_u32(skb, WGPEER_A_PROTOCOL_VERSION, 1))
+++			goto err;
+++
+++		read_lock_bh(&peer->endpoint_lock);
+++		if (peer->endpoint.addr.sa_family == AF_INET)
+++			fail = nla_put(skb, WGPEER_A_ENDPOINT,
+++				       sizeof(peer->endpoint.addr4),
+++				       &peer->endpoint.addr4);
+++		else if (peer->endpoint.addr.sa_family == AF_INET6)
+++			fail = nla_put(skb, WGPEER_A_ENDPOINT,
+++				       sizeof(peer->endpoint.addr6),
+++				       &peer->endpoint.addr6);
+++		read_unlock_bh(&peer->endpoint_lock);
+++		if (fail)
+++			goto err;
+++		allowedips_node =
+++			list_first_entry_or_null(&peer->allowedips_list,
+++					struct allowedips_node, peer_list);
+++	}
+++	if (!allowedips_node)
+++		goto no_allowedips;
+++	if (!ctx->allowedips_seq)
+++		ctx->allowedips_seq = peer->device->peer_allowedips.seq;
+++	else if (ctx->allowedips_seq != peer->device->peer_allowedips.seq)
+++		goto no_allowedips;
+++
+++	allowedips_nest = nla_nest_start(skb, WGPEER_A_ALLOWEDIPS);
+++	if (!allowedips_nest)
+++		goto err;
+++
+++	list_for_each_entry_from(allowedips_node, &peer->allowedips_list,
+++				 peer_list) {
+++		u8 cidr, ip[16] __aligned(__alignof(u64));
+++		int family;
+++
+++		family = wg_allowedips_read_node(allowedips_node, ip, &cidr);
+++		if (get_allowedips(skb, ip, cidr, family)) {
+++			nla_nest_end(skb, allowedips_nest);
+++			nla_nest_end(skb, peer_nest);
+++			ctx->next_allowedip = allowedips_node;
+++			return -EMSGSIZE;
+++		}
+++	}
+++	nla_nest_end(skb, allowedips_nest);
+++no_allowedips:
+++	nla_nest_end(skb, peer_nest);
+++	ctx->next_allowedip = NULL;
+++	ctx->allowedips_seq = 0;
+++	return 0;
+++err:
+++	nla_nest_cancel(skb, peer_nest);
+++	return -EMSGSIZE;
+++}
+++
+++static int wg_get_device_start(struct netlink_callback *cb)
+++{
+++	struct nlattr **attrs = genl_family_attrbuf(&genl_family);
+++	struct wg_device *wg;
+++	int ret;
+++
+++	ret = nlmsg_parse(cb->nlh, GENL_HDRLEN + genl_family.hdrsize, attrs,
+++			  genl_family.maxattr, device_policy, NULL);
+++	if (ret < 0)
+++		return ret;
+++	wg = lookup_interface(attrs, cb->skb);
+++	if (IS_ERR(wg))
+++		return PTR_ERR(wg);
+++	DUMP_CTX(cb)->wg = wg;
+++	return 0;
+++}
+++
+++static int wg_get_device_dump(struct sk_buff *skb, struct netlink_callback *cb)
+++{
+++	struct wg_peer *peer, *next_peer_cursor;
+++	struct dump_ctx *ctx = DUMP_CTX(cb);
+++	struct wg_device *wg = ctx->wg;
+++	struct nlattr *peers_nest;
+++	int ret = -EMSGSIZE;
+++	bool done = true;
+++	void *hdr;
+++
+++	rtnl_lock();
+++	mutex_lock(&wg->device_update_lock);
+++	cb->seq = wg->device_update_gen;
+++	next_peer_cursor = ctx->next_peer;
+++
+++	hdr = genlmsg_put(skb, NETLINK_CB(cb->skb).portid, cb->nlh->nlmsg_seq,
+++			  &genl_family, NLM_F_MULTI, WG_CMD_GET_DEVICE);
+++	if (!hdr)
+++		goto out;
+++	genl_dump_check_consistent(cb, hdr);
+++
+++	if (!ctx->next_peer) {
+++		if (nla_put_u16(skb, WGDEVICE_A_LISTEN_PORT,
+++				wg->incoming_port) ||
+++		    nla_put_u32(skb, WGDEVICE_A_FWMARK, wg->fwmark) ||
+++		    nla_put_u32(skb, WGDEVICE_A_IFINDEX, wg->dev->ifindex) ||
+++		    nla_put_string(skb, WGDEVICE_A_IFNAME, wg->dev->name))
+++			goto out;
+++
+++		down_read(&wg->static_identity.lock);
+++		if (wg->static_identity.has_identity) {
+++			if (nla_put(skb, WGDEVICE_A_PRIVATE_KEY,
+++				    NOISE_PUBLIC_KEY_LEN,
+++				    wg->static_identity.static_private) ||
+++			    nla_put(skb, WGDEVICE_A_PUBLIC_KEY,
+++				    NOISE_PUBLIC_KEY_LEN,
+++				    wg->static_identity.static_public)) {
+++				up_read(&wg->static_identity.lock);
+++				goto out;
+++			}
+++		}
+++		up_read(&wg->static_identity.lock);
+++	}
+++
+++	peers_nest = nla_nest_start(skb, WGDEVICE_A_PEERS);
+++	if (!peers_nest)
+++		goto out;
+++	ret = 0;
+++	/* If the last cursor was removed via list_del_init in peer_remove, then
+++	 * we just treat this the same as there being no more peers left. The
+++	 * reason is that seq_nr should indicate to userspace that this isn't a
+++	 * coherent dump anyway, so they'll try again.
+++	 */
+++	if (list_empty(&wg->peer_list) ||
+++	    (ctx->next_peer && list_empty(&ctx->next_peer->peer_list))) {
+++		nla_nest_cancel(skb, peers_nest);
+++		goto out;
+++	}
+++	lockdep_assert_held(&wg->device_update_lock);
+++	peer = list_prepare_entry(ctx->next_peer, &wg->peer_list, peer_list);
+++	list_for_each_entry_continue(peer, &wg->peer_list, peer_list) {
+++		if (get_peer(peer, skb, ctx)) {
+++			done = false;
+++			break;
+++		}
+++		next_peer_cursor = peer;
+++	}
+++	nla_nest_end(skb, peers_nest);
+++
+++out:
+++	if (!ret && !done && next_peer_cursor)
+++		wg_peer_get(next_peer_cursor);
+++	wg_peer_put(ctx->next_peer);
+++	mutex_unlock(&wg->device_update_lock);
+++	rtnl_unlock();
+++
+++	if (ret) {
+++		genlmsg_cancel(skb, hdr);
+++		return ret;
+++	}
+++	genlmsg_end(skb, hdr);
+++	if (done) {
+++		ctx->next_peer = NULL;
+++		return 0;
+++	}
+++	ctx->next_peer = next_peer_cursor;
+++	return skb->len;
+++
+++	/* At this point, we can't really deal ourselves with safely zeroing out
+++	 * the private key material after usage. This will need an additional API
+++	 * in the kernel for marking skbs as zero_on_free.
+++	 */
+++}
+++
+++static int wg_get_device_done(struct netlink_callback *cb)
+++{
+++	struct dump_ctx *ctx = DUMP_CTX(cb);
+++
+++	if (ctx->wg)
+++		dev_put(ctx->wg->dev);
+++	wg_peer_put(ctx->next_peer);
+++	return 0;
+++}
+++
+++static int set_port(struct wg_device *wg, u16 port)
+++{
+++	struct wg_peer *peer;
+++
+++	if (wg->incoming_port == port)
+++		return 0;
+++	list_for_each_entry(peer, &wg->peer_list, peer_list)
+++		wg_socket_clear_peer_endpoint_src(peer);
+++	if (!netif_running(wg->dev)) {
+++		wg->incoming_port = port;
+++		return 0;
+++	}
+++	return wg_socket_init(wg, port);
+++}
+++
+++static int set_allowedip(struct wg_peer *peer, struct nlattr **attrs)
+++{
+++	int ret = -EINVAL;
+++	u16 family;
+++	u8 cidr;
+++
+++	if (!attrs[WGALLOWEDIP_A_FAMILY] || !attrs[WGALLOWEDIP_A_IPADDR] ||
+++	    !attrs[WGALLOWEDIP_A_CIDR_MASK])
+++		return ret;
+++	family = nla_get_u16(attrs[WGALLOWEDIP_A_FAMILY]);
+++	cidr = nla_get_u8(attrs[WGALLOWEDIP_A_CIDR_MASK]);
+++
+++	if (family == AF_INET && cidr <= 32 &&
+++	    nla_len(attrs[WGALLOWEDIP_A_IPADDR]) == sizeof(struct in_addr))
+++		ret = wg_allowedips_insert_v4(
+++			&peer->device->peer_allowedips,
+++			nla_data(attrs[WGALLOWEDIP_A_IPADDR]), cidr, peer,
+++			&peer->device->device_update_lock);
+++	else if (family == AF_INET6 && cidr <= 128 &&
+++		 nla_len(attrs[WGALLOWEDIP_A_IPADDR]) == sizeof(struct in6_addr))
+++		ret = wg_allowedips_insert_v6(
+++			&peer->device->peer_allowedips,
+++			nla_data(attrs[WGALLOWEDIP_A_IPADDR]), cidr, peer,
+++			&peer->device->device_update_lock);
+++
+++	return ret;
+++}
+++
+++static int set_peer(struct wg_device *wg, struct nlattr **attrs)
+++{
+++	u8 *public_key = NULL, *preshared_key = NULL;
+++	struct wg_peer *peer = NULL;
+++	u32 flags = 0;
+++	int ret;
+++
+++	ret = -EINVAL;
+++	if (attrs[WGPEER_A_PUBLIC_KEY] &&
+++	    nla_len(attrs[WGPEER_A_PUBLIC_KEY]) == NOISE_PUBLIC_KEY_LEN)
+++		public_key = nla_data(attrs[WGPEER_A_PUBLIC_KEY]);
+++	else
+++		goto out;
+++	if (attrs[WGPEER_A_PRESHARED_KEY] &&
+++	    nla_len(attrs[WGPEER_A_PRESHARED_KEY]) == NOISE_SYMMETRIC_KEY_LEN)
+++		preshared_key = nla_data(attrs[WGPEER_A_PRESHARED_KEY]);
+++
+++	if (attrs[WGPEER_A_FLAGS])
+++		flags = nla_get_u32(attrs[WGPEER_A_FLAGS]);
+++	ret = -EOPNOTSUPP;
+++	if (flags & ~__WGPEER_F_ALL)
+++		goto out;
+++
+++	ret = -EPFNOSUPPORT;
+++	if (attrs[WGPEER_A_PROTOCOL_VERSION]) {
+++		if (nla_get_u32(attrs[WGPEER_A_PROTOCOL_VERSION]) != 1)
+++			goto out;
+++	}
+++
+++	peer = wg_pubkey_hashtable_lookup(wg->peer_hashtable,
+++					  nla_data(attrs[WGPEER_A_PUBLIC_KEY]));
+++	ret = 0;
+++	if (!peer) { /* Peer doesn't exist yet. Add a new one. */
+++		if (flags & (WGPEER_F_REMOVE_ME | WGPEER_F_UPDATE_ONLY))
+++			goto out;
+++
+++		/* The peer is new, so there aren't allowed IPs to remove. */
+++		flags &= ~WGPEER_F_REPLACE_ALLOWEDIPS;
+++
+++		down_read(&wg->static_identity.lock);
+++		if (wg->static_identity.has_identity &&
+++		    !memcmp(nla_data(attrs[WGPEER_A_PUBLIC_KEY]),
+++			    wg->static_identity.static_public,
+++			    NOISE_PUBLIC_KEY_LEN)) {
+++			/* We silently ignore peers that have the same public
+++			 * key as the device. The reason we do it silently is
+++			 * that we'd like for people to be able to reuse the
+++			 * same set of API calls across peers.
+++			 */
+++			up_read(&wg->static_identity.lock);
+++			ret = 0;
+++			goto out;
+++		}
+++		up_read(&wg->static_identity.lock);
+++
+++		peer = wg_peer_create(wg, public_key, preshared_key);
+++		if (IS_ERR(peer)) {
+++			/* Similar to the above, if the key is invalid, we skip
+++			 * it without fanfare, so that services don't need to
+++			 * worry about doing key validation themselves.
+++			 */
+++			ret = PTR_ERR(peer) == -EKEYREJECTED ? 0 : PTR_ERR(peer);
+++			peer = NULL;
+++			goto out;
+++		}
+++		/* Take additional reference, as though we've just been
+++		 * looked up.
+++		 */
+++		wg_peer_get(peer);
+++	}
+++
+++	if (flags & WGPEER_F_REMOVE_ME) {
+++		wg_peer_remove(peer);
+++		goto out;
+++	}
+++
+++	if (preshared_key) {
+++		down_write(&peer->handshake.lock);
+++		memcpy(&peer->handshake.preshared_key, preshared_key,
+++		       NOISE_SYMMETRIC_KEY_LEN);
+++		up_write(&peer->handshake.lock);
+++	}
+++
+++	if (attrs[WGPEER_A_ENDPOINT]) {
+++		struct sockaddr *addr = nla_data(attrs[WGPEER_A_ENDPOINT]);
+++		size_t len = nla_len(attrs[WGPEER_A_ENDPOINT]);
+++
+++		if ((len == sizeof(struct sockaddr_in) &&
+++		     addr->sa_family == AF_INET) ||
+++		    (len == sizeof(struct sockaddr_in6) &&
+++		     addr->sa_family == AF_INET6)) {
+++			struct endpoint endpoint = { { { 0 } } };
+++
+++			memcpy(&endpoint.addr, addr, len);
+++			wg_socket_set_peer_endpoint(peer, &endpoint);
+++		}
+++	}
+++
+++	if (flags & WGPEER_F_REPLACE_ALLOWEDIPS)
+++		wg_allowedips_remove_by_peer(&wg->peer_allowedips, peer,
+++					     &wg->device_update_lock);
+++
+++	if (attrs[WGPEER_A_ALLOWEDIPS]) {
+++		struct nlattr *attr, *allowedip[WGALLOWEDIP_A_MAX + 1];
+++		int rem;
+++
+++		nla_for_each_nested(attr, attrs[WGPEER_A_ALLOWEDIPS], rem) {
+++			ret = nla_parse_nested(allowedip, WGALLOWEDIP_A_MAX,
+++					       attr, allowedip_policy, NULL);
+++			if (ret < 0)
+++				goto out;
+++			ret = set_allowedip(peer, allowedip);
+++			if (ret < 0)
+++				goto out;
+++		}
+++	}
+++
+++	if (attrs[WGPEER_A_PERSISTENT_KEEPALIVE_INTERVAL]) {
+++		const u16 persistent_keepalive_interval = nla_get_u16(
+++				attrs[WGPEER_A_PERSISTENT_KEEPALIVE_INTERVAL]);
+++		const bool send_keepalive =
+++			!peer->persistent_keepalive_interval &&
+++			persistent_keepalive_interval &&
+++			netif_running(wg->dev);
+++
+++		peer->persistent_keepalive_interval = persistent_keepalive_interval;
+++		if (send_keepalive)
+++			wg_packet_send_keepalive(peer);
+++	}
+++
+++	if (netif_running(wg->dev))
+++		wg_packet_send_staged_packets(peer);
+++
+++out:
+++	wg_peer_put(peer);
+++	if (attrs[WGPEER_A_PRESHARED_KEY])
+++		memzero_explicit(nla_data(attrs[WGPEER_A_PRESHARED_KEY]),
+++				 nla_len(attrs[WGPEER_A_PRESHARED_KEY]));
+++	return ret;
+++}
+++
+++static int wg_set_device(struct sk_buff *skb, struct genl_info *info)
+++{
+++	struct wg_device *wg = lookup_interface(info->attrs, skb);
+++	u32 flags = 0;
+++	int ret;
+++
+++	if (IS_ERR(wg)) {
+++		ret = PTR_ERR(wg);
+++		goto out_nodev;
+++	}
+++
+++	rtnl_lock();
+++	mutex_lock(&wg->device_update_lock);
+++
+++	if (info->attrs[WGDEVICE_A_FLAGS])
+++		flags = nla_get_u32(info->attrs[WGDEVICE_A_FLAGS]);
+++	ret = -EOPNOTSUPP;
+++	if (flags & ~__WGDEVICE_F_ALL)
+++		goto out;
+++
+++	ret = -EPERM;
+++	if ((info->attrs[WGDEVICE_A_LISTEN_PORT] ||
+++	     info->attrs[WGDEVICE_A_FWMARK]) &&
+++	    !ns_capable(wg->creating_net->user_ns, CAP_NET_ADMIN))
+++		goto out;
+++
+++	++wg->device_update_gen;
+++
+++	if (info->attrs[WGDEVICE_A_FWMARK]) {
+++		struct wg_peer *peer;
+++
+++		wg->fwmark = nla_get_u32(info->attrs[WGDEVICE_A_FWMARK]);
+++		list_for_each_entry(peer, &wg->peer_list, peer_list)
+++			wg_socket_clear_peer_endpoint_src(peer);
+++	}
+++
+++	if (info->attrs[WGDEVICE_A_LISTEN_PORT]) {
+++		ret = set_port(wg,
+++			nla_get_u16(info->attrs[WGDEVICE_A_LISTEN_PORT]));
+++		if (ret)
+++			goto out;
+++	}
+++
+++	if (flags & WGDEVICE_F_REPLACE_PEERS)
+++		wg_peer_remove_all(wg);
+++
+++	if (info->attrs[WGDEVICE_A_PRIVATE_KEY] &&
+++	    nla_len(info->attrs[WGDEVICE_A_PRIVATE_KEY]) ==
+++		    NOISE_PUBLIC_KEY_LEN) {
+++		u8 *private_key = nla_data(info->attrs[WGDEVICE_A_PRIVATE_KEY]);
+++		u8 public_key[NOISE_PUBLIC_KEY_LEN];
+++		struct wg_peer *peer, *temp;
+++
+++		if (!crypto_memneq(wg->static_identity.static_private,
+++				   private_key, NOISE_PUBLIC_KEY_LEN))
+++			goto skip_set_private_key;
+++
+++		/* We remove before setting, to prevent race, which means doing
+++		 * two 25519-genpub ops.
+++		 */
+++		if (curve25519_generate_public(public_key, private_key)) {
+++			peer = wg_pubkey_hashtable_lookup(wg->peer_hashtable,
+++							  public_key);
+++			if (peer) {
+++				wg_peer_put(peer);
+++				wg_peer_remove(peer);
+++			}
+++		}
+++
+++		down_write(&wg->static_identity.lock);
+++		wg_noise_set_static_identity_private_key(&wg->static_identity,
+++							 private_key);
+++		list_for_each_entry_safe(peer, temp, &wg->peer_list,
+++					 peer_list) {
+++			if (wg_noise_precompute_static_static(peer))
+++				wg_noise_expire_current_peer_keypairs(peer);
+++			else
+++				wg_peer_remove(peer);
+++		}
+++		wg_cookie_checker_precompute_device_keys(&wg->cookie_checker);
+++		up_write(&wg->static_identity.lock);
+++	}
+++skip_set_private_key:
+++
+++	if (info->attrs[WGDEVICE_A_PEERS]) {
+++		struct nlattr *attr, *peer[WGPEER_A_MAX + 1];
+++		int rem;
+++
+++		nla_for_each_nested(attr, info->attrs[WGDEVICE_A_PEERS], rem) {
+++			ret = nla_parse_nested(peer, WGPEER_A_MAX, attr,
+++					       peer_policy, NULL);
+++			if (ret < 0)
+++				goto out;
+++			ret = set_peer(wg, peer);
+++			if (ret < 0)
+++				goto out;
+++		}
+++	}
+++	ret = 0;
+++
+++out:
+++	mutex_unlock(&wg->device_update_lock);
+++	rtnl_unlock();
+++	dev_put(wg->dev);
+++out_nodev:
+++	if (info->attrs[WGDEVICE_A_PRIVATE_KEY])
+++		memzero_explicit(nla_data(info->attrs[WGDEVICE_A_PRIVATE_KEY]),
+++				 nla_len(info->attrs[WGDEVICE_A_PRIVATE_KEY]));
+++	return ret;
+++}
+++
+++static const struct genl_ops genl_ops[] = {
+++	{
+++		.cmd = WG_CMD_GET_DEVICE,
+++		.start = wg_get_device_start,
+++		.dumpit = wg_get_device_dump,
+++		.done = wg_get_device_done,
+++		.flags = GENL_UNS_ADMIN_PERM
+++	}, {
+++		.cmd = WG_CMD_SET_DEVICE,
+++		.doit = wg_set_device,
+++		.flags = GENL_UNS_ADMIN_PERM
+++	}
+++};
+++
+++static struct genl_family genl_family __ro_after_init = {
+++	.ops = genl_ops,
+++	.n_ops = ARRAY_SIZE(genl_ops),
+++	.name = WG_GENL_NAME,
+++	.version = WG_GENL_VERSION,
+++	.maxattr = WGDEVICE_A_MAX,
+++	.module = THIS_MODULE,
+++	.policy = device_policy,
+++	.netnsok = true
+++};
+++
+++int __init wg_genetlink_init(void)
+++{
+++	return genl_register_family(&genl_family);
+++}
+++
+++void __exit wg_genetlink_uninit(void)
+++{
+++	genl_unregister_family(&genl_family);
+++}
++--- /dev/null
+++++ b/drivers/net/wireguard/netlink.h
++@@ -0,0 +1,12 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#ifndef _WG_NETLINK_H
+++#define _WG_NETLINK_H
+++
+++int wg_genetlink_init(void);
+++void wg_genetlink_uninit(void);
+++
+++#endif /* _WG_NETLINK_H */
++--- /dev/null
+++++ b/drivers/net/wireguard/noise.c
++@@ -0,0 +1,828 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include "noise.h"
+++#include "device.h"
+++#include "peer.h"
+++#include "messages.h"
+++#include "queueing.h"
+++#include "peerlookup.h"
+++
+++#include <linux/rcupdate.h>
+++#include <linux/slab.h>
+++#include <linux/bitmap.h>
+++#include <linux/scatterlist.h>
+++#include <linux/highmem.h>
+++#include <crypto/algapi.h>
+++
+++/* This implements Noise_IKpsk2:
+++ *
+++ * <- s
+++ * ******
+++ * -> e, es, s, ss, {t}
+++ * <- e, ee, se, psk, {}
+++ */
+++
+++static const u8 handshake_name[37] = "Noise_IKpsk2_25519_ChaChaPoly_BLAKE2s";
+++static const u8 identifier_name[34] = "WireGuard v1 zx2c4 Jason@zx2c4.com";
+++static u8 handshake_init_hash[NOISE_HASH_LEN] __ro_after_init;
+++static u8 handshake_init_chaining_key[NOISE_HASH_LEN] __ro_after_init;
+++static atomic64_t keypair_counter = ATOMIC64_INIT(0);
+++
+++void __init wg_noise_init(void)
+++{
+++	struct blake2s_state blake;
+++
+++	blake2s(handshake_init_chaining_key, handshake_name, NULL,
+++		NOISE_HASH_LEN, sizeof(handshake_name), 0);
+++	blake2s_init(&blake, NOISE_HASH_LEN);
+++	blake2s_update(&blake, handshake_init_chaining_key, NOISE_HASH_LEN);
+++	blake2s_update(&blake, identifier_name, sizeof(identifier_name));
+++	blake2s_final(&blake, handshake_init_hash);
+++}
+++
+++/* Must hold peer->handshake.static_identity->lock */
+++bool wg_noise_precompute_static_static(struct wg_peer *peer)
+++{
+++	bool ret = true;
+++
+++	down_write(&peer->handshake.lock);
+++	if (peer->handshake.static_identity->has_identity)
+++		ret = curve25519(
+++			peer->handshake.precomputed_static_static,
+++			peer->handshake.static_identity->static_private,
+++			peer->handshake.remote_static);
+++	else
+++		memset(peer->handshake.precomputed_static_static, 0,
+++		       NOISE_PUBLIC_KEY_LEN);
+++	up_write(&peer->handshake.lock);
+++	return ret;
+++}
+++
+++bool wg_noise_handshake_init(struct noise_handshake *handshake,
+++			   struct noise_static_identity *static_identity,
+++			   const u8 peer_public_key[NOISE_PUBLIC_KEY_LEN],
+++			   const u8 peer_preshared_key[NOISE_SYMMETRIC_KEY_LEN],
+++			   struct wg_peer *peer)
+++{
+++	memset(handshake, 0, sizeof(*handshake));
+++	init_rwsem(&handshake->lock);
+++	handshake->entry.type = INDEX_HASHTABLE_HANDSHAKE;
+++	handshake->entry.peer = peer;
+++	memcpy(handshake->remote_static, peer_public_key, NOISE_PUBLIC_KEY_LEN);
+++	if (peer_preshared_key)
+++		memcpy(handshake->preshared_key, peer_preshared_key,
+++		       NOISE_SYMMETRIC_KEY_LEN);
+++	handshake->static_identity = static_identity;
+++	handshake->state = HANDSHAKE_ZEROED;
+++	return wg_noise_precompute_static_static(peer);
+++}
+++
+++static void handshake_zero(struct noise_handshake *handshake)
+++{
+++	memset(&handshake->ephemeral_private, 0, NOISE_PUBLIC_KEY_LEN);
+++	memset(&handshake->remote_ephemeral, 0, NOISE_PUBLIC_KEY_LEN);
+++	memset(&handshake->hash, 0, NOISE_HASH_LEN);
+++	memset(&handshake->chaining_key, 0, NOISE_HASH_LEN);
+++	handshake->remote_index = 0;
+++	handshake->state = HANDSHAKE_ZEROED;
+++}
+++
+++void wg_noise_handshake_clear(struct noise_handshake *handshake)
+++{
+++	wg_index_hashtable_remove(
+++			handshake->entry.peer->device->index_hashtable,
+++			&handshake->entry);
+++	down_write(&handshake->lock);
+++	handshake_zero(handshake);
+++	up_write(&handshake->lock);
+++	wg_index_hashtable_remove(
+++			handshake->entry.peer->device->index_hashtable,
+++			&handshake->entry);
+++}
+++
+++static struct noise_keypair *keypair_create(struct wg_peer *peer)
+++{
+++	struct noise_keypair *keypair = kzalloc(sizeof(*keypair), GFP_KERNEL);
+++
+++	if (unlikely(!keypair))
+++		return NULL;
+++	keypair->internal_id = atomic64_inc_return(&keypair_counter);
+++	keypair->entry.type = INDEX_HASHTABLE_KEYPAIR;
+++	keypair->entry.peer = peer;
+++	kref_init(&keypair->refcount);
+++	return keypair;
+++}
+++
+++static void keypair_free_rcu(struct rcu_head *rcu)
+++{
+++	kzfree(container_of(rcu, struct noise_keypair, rcu));
+++}
+++
+++static void keypair_free_kref(struct kref *kref)
+++{
+++	struct noise_keypair *keypair =
+++		container_of(kref, struct noise_keypair, refcount);
+++
+++	net_dbg_ratelimited("%s: Keypair %llu destroyed for peer %llu\n",
+++			    keypair->entry.peer->device->dev->name,
+++			    keypair->internal_id,
+++			    keypair->entry.peer->internal_id);
+++	wg_index_hashtable_remove(keypair->entry.peer->device->index_hashtable,
+++				  &keypair->entry);
+++	call_rcu(&keypair->rcu, keypair_free_rcu);
+++}
+++
+++void wg_noise_keypair_put(struct noise_keypair *keypair, bool unreference_now)
+++{
+++	if (unlikely(!keypair))
+++		return;
+++	if (unlikely(unreference_now))
+++		wg_index_hashtable_remove(
+++			keypair->entry.peer->device->index_hashtable,
+++			&keypair->entry);
+++	kref_put(&keypair->refcount, keypair_free_kref);
+++}
+++
+++struct noise_keypair *wg_noise_keypair_get(struct noise_keypair *keypair)
+++{
+++	RCU_LOCKDEP_WARN(!rcu_read_lock_bh_held(),
+++		"Taking noise keypair reference without holding the RCU BH read lock");
+++	if (unlikely(!keypair || !kref_get_unless_zero(&keypair->refcount)))
+++		return NULL;
+++	return keypair;
+++}
+++
+++void wg_noise_keypairs_clear(struct noise_keypairs *keypairs)
+++{
+++	struct noise_keypair *old;
+++
+++	spin_lock_bh(&keypairs->keypair_update_lock);
+++
+++	/* We zero the next_keypair before zeroing the others, so that
+++	 * wg_noise_received_with_keypair returns early before subsequent ones
+++	 * are zeroed.
+++	 */
+++	old = rcu_dereference_protected(keypairs->next_keypair,
+++		lockdep_is_held(&keypairs->keypair_update_lock));
+++	RCU_INIT_POINTER(keypairs->next_keypair, NULL);
+++	wg_noise_keypair_put(old, true);
+++
+++	old = rcu_dereference_protected(keypairs->previous_keypair,
+++		lockdep_is_held(&keypairs->keypair_update_lock));
+++	RCU_INIT_POINTER(keypairs->previous_keypair, NULL);
+++	wg_noise_keypair_put(old, true);
+++
+++	old = rcu_dereference_protected(keypairs->current_keypair,
+++		lockdep_is_held(&keypairs->keypair_update_lock));
+++	RCU_INIT_POINTER(keypairs->current_keypair, NULL);
+++	wg_noise_keypair_put(old, true);
+++
+++	spin_unlock_bh(&keypairs->keypair_update_lock);
+++}
+++
+++void wg_noise_expire_current_peer_keypairs(struct wg_peer *peer)
+++{
+++	struct noise_keypair *keypair;
+++
+++	wg_noise_handshake_clear(&peer->handshake);
+++	wg_noise_reset_last_sent_handshake(&peer->last_sent_handshake);
+++
+++	spin_lock_bh(&peer->keypairs.keypair_update_lock);
+++	keypair = rcu_dereference_protected(peer->keypairs.next_keypair,
+++			lockdep_is_held(&peer->keypairs.keypair_update_lock));
+++	if (keypair)
+++		keypair->sending.is_valid = false;
+++	keypair = rcu_dereference_protected(peer->keypairs.current_keypair,
+++			lockdep_is_held(&peer->keypairs.keypair_update_lock));
+++	if (keypair)
+++		keypair->sending.is_valid = false;
+++	spin_unlock_bh(&peer->keypairs.keypair_update_lock);
+++}
+++
+++static void add_new_keypair(struct noise_keypairs *keypairs,
+++			    struct noise_keypair *new_keypair)
+++{
+++	struct noise_keypair *previous_keypair, *next_keypair, *current_keypair;
+++
+++	spin_lock_bh(&keypairs->keypair_update_lock);
+++	previous_keypair = rcu_dereference_protected(keypairs->previous_keypair,
+++		lockdep_is_held(&keypairs->keypair_update_lock));
+++	next_keypair = rcu_dereference_protected(keypairs->next_keypair,
+++		lockdep_is_held(&keypairs->keypair_update_lock));
+++	current_keypair = rcu_dereference_protected(keypairs->current_keypair,
+++		lockdep_is_held(&keypairs->keypair_update_lock));
+++	if (new_keypair->i_am_the_initiator) {
+++		/* If we're the initiator, it means we've sent a handshake, and
+++		 * received a confirmation response, which means this new
+++		 * keypair can now be used.
+++		 */
+++		if (next_keypair) {
+++			/* If there already was a next keypair pending, we
+++			 * demote it to be the previous keypair, and free the
+++			 * existing current. Note that this means KCI can result
+++			 * in this transition. It would perhaps be more sound to
+++			 * always just get rid of the unused next keypair
+++			 * instead of putting it in the previous slot, but this
+++			 * might be a bit less robust. Something to think about
+++			 * for the future.
+++			 */
+++			RCU_INIT_POINTER(keypairs->next_keypair, NULL);
+++			rcu_assign_pointer(keypairs->previous_keypair,
+++					   next_keypair);
+++			wg_noise_keypair_put(current_keypair, true);
+++		} else /* If there wasn't an existing next keypair, we replace
+++			* the previous with the current one.
+++			*/
+++			rcu_assign_pointer(keypairs->previous_keypair,
+++					   current_keypair);
+++		/* At this point we can get rid of the old previous keypair, and
+++		 * set up the new keypair.
+++		 */
+++		wg_noise_keypair_put(previous_keypair, true);
+++		rcu_assign_pointer(keypairs->current_keypair, new_keypair);
+++	} else {
+++		/* If we're the responder, it means we can't use the new keypair
+++		 * until we receive confirmation via the first data packet, so
+++		 * we get rid of the existing previous one, the possibly
+++		 * existing next one, and slide in the new next one.
+++		 */
+++		rcu_assign_pointer(keypairs->next_keypair, new_keypair);
+++		wg_noise_keypair_put(next_keypair, true);
+++		RCU_INIT_POINTER(keypairs->previous_keypair, NULL);
+++		wg_noise_keypair_put(previous_keypair, true);
+++	}
+++	spin_unlock_bh(&keypairs->keypair_update_lock);
+++}
+++
+++bool wg_noise_received_with_keypair(struct noise_keypairs *keypairs,
+++				    struct noise_keypair *received_keypair)
+++{
+++	struct noise_keypair *old_keypair;
+++	bool key_is_new;
+++
+++	/* We first check without taking the spinlock. */
+++	key_is_new = received_keypair ==
+++		     rcu_access_pointer(keypairs->next_keypair);
+++	if (likely(!key_is_new))
+++		return false;
+++
+++	spin_lock_bh(&keypairs->keypair_update_lock);
+++	/* After locking, we double check that things didn't change from
+++	 * beneath us.
+++	 */
+++	if (unlikely(received_keypair !=
+++		    rcu_dereference_protected(keypairs->next_keypair,
+++			    lockdep_is_held(&keypairs->keypair_update_lock)))) {
+++		spin_unlock_bh(&keypairs->keypair_update_lock);
+++		return false;
+++	}
+++
+++	/* When we've finally received the confirmation, we slide the next
+++	 * into the current, the current into the previous, and get rid of
+++	 * the old previous.
+++	 */
+++	old_keypair = rcu_dereference_protected(keypairs->previous_keypair,
+++		lockdep_is_held(&keypairs->keypair_update_lock));
+++	rcu_assign_pointer(keypairs->previous_keypair,
+++		rcu_dereference_protected(keypairs->current_keypair,
+++			lockdep_is_held(&keypairs->keypair_update_lock)));
+++	wg_noise_keypair_put(old_keypair, true);
+++	rcu_assign_pointer(keypairs->current_keypair, received_keypair);
+++	RCU_INIT_POINTER(keypairs->next_keypair, NULL);
+++
+++	spin_unlock_bh(&keypairs->keypair_update_lock);
+++	return true;
+++}
+++
+++/* Must hold static_identity->lock */
+++void wg_noise_set_static_identity_private_key(
+++	struct noise_static_identity *static_identity,
+++	const u8 private_key[NOISE_PUBLIC_KEY_LEN])
+++{
+++	memcpy(static_identity->static_private, private_key,
+++	       NOISE_PUBLIC_KEY_LEN);
+++	curve25519_clamp_secret(static_identity->static_private);
+++	static_identity->has_identity = curve25519_generate_public(
+++		static_identity->static_public, private_key);
+++}
+++
+++/* This is Hugo Krawczyk's HKDF:
+++ *  - https://eprint.iacr.org/2010/264.pdf
+++ *  - https://tools.ietf.org/html/rfc5869
+++ */
+++static void kdf(u8 *first_dst, u8 *second_dst, u8 *third_dst, const u8 *data,
+++		size_t first_len, size_t second_len, size_t third_len,
+++		size_t data_len, const u8 chaining_key[NOISE_HASH_LEN])
+++{
+++	u8 output[BLAKE2S_HASH_SIZE + 1];
+++	u8 secret[BLAKE2S_HASH_SIZE];
+++
+++	WARN_ON(IS_ENABLED(DEBUG) &&
+++		(first_len > BLAKE2S_HASH_SIZE ||
+++		 second_len > BLAKE2S_HASH_SIZE ||
+++		 third_len > BLAKE2S_HASH_SIZE ||
+++		 ((second_len || second_dst || third_len || third_dst) &&
+++		  (!first_len || !first_dst)) ||
+++		 ((third_len || third_dst) && (!second_len || !second_dst))));
+++
+++	/* Extract entropy from data into secret */
+++	blake2s256_hmac(secret, data, chaining_key, data_len, NOISE_HASH_LEN);
+++
+++	if (!first_dst || !first_len)
+++		goto out;
+++
+++	/* Expand first key: key = secret, data = 0x1 */
+++	output[0] = 1;
+++	blake2s256_hmac(output, output, secret, 1, BLAKE2S_HASH_SIZE);
+++	memcpy(first_dst, output, first_len);
+++
+++	if (!second_dst || !second_len)
+++		goto out;
+++
+++	/* Expand second key: key = secret, data = first-key || 0x2 */
+++	output[BLAKE2S_HASH_SIZE] = 2;
+++	blake2s256_hmac(output, output, secret, BLAKE2S_HASH_SIZE + 1,
+++			BLAKE2S_HASH_SIZE);
+++	memcpy(second_dst, output, second_len);
+++
+++	if (!third_dst || !third_len)
+++		goto out;
+++
+++	/* Expand third key: key = secret, data = second-key || 0x3 */
+++	output[BLAKE2S_HASH_SIZE] = 3;
+++	blake2s256_hmac(output, output, secret, BLAKE2S_HASH_SIZE + 1,
+++			BLAKE2S_HASH_SIZE);
+++	memcpy(third_dst, output, third_len);
+++
+++out:
+++	/* Clear sensitive data from stack */
+++	memzero_explicit(secret, BLAKE2S_HASH_SIZE);
+++	memzero_explicit(output, BLAKE2S_HASH_SIZE + 1);
+++}
+++
+++static void symmetric_key_init(struct noise_symmetric_key *key)
+++{
+++	spin_lock_init(&key->counter.receive.lock);
+++	atomic64_set(&key->counter.counter, 0);
+++	memset(key->counter.receive.backtrack, 0,
+++	       sizeof(key->counter.receive.backtrack));
+++	key->birthdate = ktime_get_coarse_boottime_ns();
+++	key->is_valid = true;
+++}
+++
+++static void derive_keys(struct noise_symmetric_key *first_dst,
+++			struct noise_symmetric_key *second_dst,
+++			const u8 chaining_key[NOISE_HASH_LEN])
+++{
+++	kdf(first_dst->key, second_dst->key, NULL, NULL,
+++	    NOISE_SYMMETRIC_KEY_LEN, NOISE_SYMMETRIC_KEY_LEN, 0, 0,
+++	    chaining_key);
+++	symmetric_key_init(first_dst);
+++	symmetric_key_init(second_dst);
+++}
+++
+++static bool __must_check mix_dh(u8 chaining_key[NOISE_HASH_LEN],
+++				u8 key[NOISE_SYMMETRIC_KEY_LEN],
+++				const u8 private[NOISE_PUBLIC_KEY_LEN],
+++				const u8 public[NOISE_PUBLIC_KEY_LEN])
+++{
+++	u8 dh_calculation[NOISE_PUBLIC_KEY_LEN];
+++
+++	if (unlikely(!curve25519(dh_calculation, private, public)))
+++		return false;
+++	kdf(chaining_key, key, NULL, dh_calculation, NOISE_HASH_LEN,
+++	    NOISE_SYMMETRIC_KEY_LEN, 0, NOISE_PUBLIC_KEY_LEN, chaining_key);
+++	memzero_explicit(dh_calculation, NOISE_PUBLIC_KEY_LEN);
+++	return true;
+++}
+++
+++static void mix_hash(u8 hash[NOISE_HASH_LEN], const u8 *src, size_t src_len)
+++{
+++	struct blake2s_state blake;
+++
+++	blake2s_init(&blake, NOISE_HASH_LEN);
+++	blake2s_update(&blake, hash, NOISE_HASH_LEN);
+++	blake2s_update(&blake, src, src_len);
+++	blake2s_final(&blake, hash);
+++}
+++
+++static void mix_psk(u8 chaining_key[NOISE_HASH_LEN], u8 hash[NOISE_HASH_LEN],
+++		    u8 key[NOISE_SYMMETRIC_KEY_LEN],
+++		    const u8 psk[NOISE_SYMMETRIC_KEY_LEN])
+++{
+++	u8 temp_hash[NOISE_HASH_LEN];
+++
+++	kdf(chaining_key, temp_hash, key, psk, NOISE_HASH_LEN, NOISE_HASH_LEN,
+++	    NOISE_SYMMETRIC_KEY_LEN, NOISE_SYMMETRIC_KEY_LEN, chaining_key);
+++	mix_hash(hash, temp_hash, NOISE_HASH_LEN);
+++	memzero_explicit(temp_hash, NOISE_HASH_LEN);
+++}
+++
+++static void handshake_init(u8 chaining_key[NOISE_HASH_LEN],
+++			   u8 hash[NOISE_HASH_LEN],
+++			   const u8 remote_static[NOISE_PUBLIC_KEY_LEN])
+++{
+++	memcpy(hash, handshake_init_hash, NOISE_HASH_LEN);
+++	memcpy(chaining_key, handshake_init_chaining_key, NOISE_HASH_LEN);
+++	mix_hash(hash, remote_static, NOISE_PUBLIC_KEY_LEN);
+++}
+++
+++static void message_encrypt(u8 *dst_ciphertext, const u8 *src_plaintext,
+++			    size_t src_len, u8 key[NOISE_SYMMETRIC_KEY_LEN],
+++			    u8 hash[NOISE_HASH_LEN])
+++{
+++	chacha20poly1305_encrypt(dst_ciphertext, src_plaintext, src_len, hash,
+++				 NOISE_HASH_LEN,
+++				 0 /* Always zero for Noise_IK */, key);
+++	mix_hash(hash, dst_ciphertext, noise_encrypted_len(src_len));
+++}
+++
+++static bool message_decrypt(u8 *dst_plaintext, const u8 *src_ciphertext,
+++			    size_t src_len, u8 key[NOISE_SYMMETRIC_KEY_LEN],
+++			    u8 hash[NOISE_HASH_LEN])
+++{
+++	if (!chacha20poly1305_decrypt(dst_plaintext, src_ciphertext, src_len,
+++				      hash, NOISE_HASH_LEN,
+++				      0 /* Always zero for Noise_IK */, key))
+++		return false;
+++	mix_hash(hash, src_ciphertext, src_len);
+++	return true;
+++}
+++
+++static void message_ephemeral(u8 ephemeral_dst[NOISE_PUBLIC_KEY_LEN],
+++			      const u8 ephemeral_src[NOISE_PUBLIC_KEY_LEN],
+++			      u8 chaining_key[NOISE_HASH_LEN],
+++			      u8 hash[NOISE_HASH_LEN])
+++{
+++	if (ephemeral_dst != ephemeral_src)
+++		memcpy(ephemeral_dst, ephemeral_src, NOISE_PUBLIC_KEY_LEN);
+++	mix_hash(hash, ephemeral_src, NOISE_PUBLIC_KEY_LEN);
+++	kdf(chaining_key, NULL, NULL, ephemeral_src, NOISE_HASH_LEN, 0, 0,
+++	    NOISE_PUBLIC_KEY_LEN, chaining_key);
+++}
+++
+++static void tai64n_now(u8 output[NOISE_TIMESTAMP_LEN])
+++{
+++	struct timespec64 now;
+++
+++	ktime_get_real_ts64(&now);
+++
+++	/* In order to prevent some sort of infoleak from precise timers, we
+++	 * round down the nanoseconds part to the closest rounded-down power of
+++	 * two to the maximum initiations per second allowed anyway by the
+++	 * implementation.
+++	 */
+++	now.tv_nsec = ALIGN_DOWN(now.tv_nsec,
+++		rounddown_pow_of_two(NSEC_PER_SEC / INITIATIONS_PER_SECOND));
+++
+++	/* https://cr.yp.to/libtai/tai64.html */
+++	*(__be64 *)output = cpu_to_be64(0x400000000000000aULL + now.tv_sec);
+++	*(__be32 *)(output + sizeof(__be64)) = cpu_to_be32(now.tv_nsec);
+++}
+++
+++bool
+++wg_noise_handshake_create_initiation(struct message_handshake_initiation *dst,
+++				     struct noise_handshake *handshake)
+++{
+++	u8 timestamp[NOISE_TIMESTAMP_LEN];
+++	u8 key[NOISE_SYMMETRIC_KEY_LEN];
+++	bool ret = false;
+++
+++	/* We need to wait for crng _before_ taking any locks, since
+++	 * curve25519_generate_secret uses get_random_bytes_wait.
+++	 */
+++	wait_for_random_bytes();
+++
+++	down_read(&handshake->static_identity->lock);
+++	down_write(&handshake->lock);
+++
+++	if (unlikely(!handshake->static_identity->has_identity))
+++		goto out;
+++
+++	dst->header.type = cpu_to_le32(MESSAGE_HANDSHAKE_INITIATION);
+++
+++	handshake_init(handshake->chaining_key, handshake->hash,
+++		       handshake->remote_static);
+++
+++	/* e */
+++	curve25519_generate_secret(handshake->ephemeral_private);
+++	if (!curve25519_generate_public(dst->unencrypted_ephemeral,
+++					handshake->ephemeral_private))
+++		goto out;
+++	message_ephemeral(dst->unencrypted_ephemeral,
+++			  dst->unencrypted_ephemeral, handshake->chaining_key,
+++			  handshake->hash);
+++
+++	/* es */
+++	if (!mix_dh(handshake->chaining_key, key, handshake->ephemeral_private,
+++		    handshake->remote_static))
+++		goto out;
+++
+++	/* s */
+++	message_encrypt(dst->encrypted_static,
+++			handshake->static_identity->static_public,
+++			NOISE_PUBLIC_KEY_LEN, key, handshake->hash);
+++
+++	/* ss */
+++	kdf(handshake->chaining_key, key, NULL,
+++	    handshake->precomputed_static_static, NOISE_HASH_LEN,
+++	    NOISE_SYMMETRIC_KEY_LEN, 0, NOISE_PUBLIC_KEY_LEN,
+++	    handshake->chaining_key);
+++
+++	/* {t} */
+++	tai64n_now(timestamp);
+++	message_encrypt(dst->encrypted_timestamp, timestamp,
+++			NOISE_TIMESTAMP_LEN, key, handshake->hash);
+++
+++	dst->sender_index = wg_index_hashtable_insert(
+++		handshake->entry.peer->device->index_hashtable,
+++		&handshake->entry);
+++
+++	handshake->state = HANDSHAKE_CREATED_INITIATION;
+++	ret = true;
+++
+++out:
+++	up_write(&handshake->lock);
+++	up_read(&handshake->static_identity->lock);
+++	memzero_explicit(key, NOISE_SYMMETRIC_KEY_LEN);
+++	return ret;
+++}
+++
+++struct wg_peer *
+++wg_noise_handshake_consume_initiation(struct message_handshake_initiation *src,
+++				      struct wg_device *wg)
+++{
+++	struct wg_peer *peer = NULL, *ret_peer = NULL;
+++	struct noise_handshake *handshake;
+++	bool replay_attack, flood_attack;
+++	u8 key[NOISE_SYMMETRIC_KEY_LEN];
+++	u8 chaining_key[NOISE_HASH_LEN];
+++	u8 hash[NOISE_HASH_LEN];
+++	u8 s[NOISE_PUBLIC_KEY_LEN];
+++	u8 e[NOISE_PUBLIC_KEY_LEN];
+++	u8 t[NOISE_TIMESTAMP_LEN];
+++	u64 initiation_consumption;
+++
+++	down_read(&wg->static_identity.lock);
+++	if (unlikely(!wg->static_identity.has_identity))
+++		goto out;
+++
+++	handshake_init(chaining_key, hash, wg->static_identity.static_public);
+++
+++	/* e */
+++	message_ephemeral(e, src->unencrypted_ephemeral, chaining_key, hash);
+++
+++	/* es */
+++	if (!mix_dh(chaining_key, key, wg->static_identity.static_private, e))
+++		goto out;
+++
+++	/* s */
+++	if (!message_decrypt(s, src->encrypted_static,
+++			     sizeof(src->encrypted_static), key, hash))
+++		goto out;
+++
+++	/* Lookup which peer we're actually talking to */
+++	peer = wg_pubkey_hashtable_lookup(wg->peer_hashtable, s);
+++	if (!peer)
+++		goto out;
+++	handshake = &peer->handshake;
+++
+++	/* ss */
+++	kdf(chaining_key, key, NULL, handshake->precomputed_static_static,
+++	    NOISE_HASH_LEN, NOISE_SYMMETRIC_KEY_LEN, 0, NOISE_PUBLIC_KEY_LEN,
+++	    chaining_key);
+++
+++	/* {t} */
+++	if (!message_decrypt(t, src->encrypted_timestamp,
+++			     sizeof(src->encrypted_timestamp), key, hash))
+++		goto out;
+++
+++	down_read(&handshake->lock);
+++	replay_attack = memcmp(t, handshake->latest_timestamp,
+++			       NOISE_TIMESTAMP_LEN) <= 0;
+++	flood_attack = (s64)handshake->last_initiation_consumption +
+++			       NSEC_PER_SEC / INITIATIONS_PER_SECOND >
+++		       (s64)ktime_get_coarse_boottime_ns();
+++	up_read(&handshake->lock);
+++	if (replay_attack || flood_attack)
+++		goto out;
+++
+++	/* Success! Copy everything to peer */
+++	down_write(&handshake->lock);
+++	memcpy(handshake->remote_ephemeral, e, NOISE_PUBLIC_KEY_LEN);
+++	if (memcmp(t, handshake->latest_timestamp, NOISE_TIMESTAMP_LEN) > 0)
+++		memcpy(handshake->latest_timestamp, t, NOISE_TIMESTAMP_LEN);
+++	memcpy(handshake->hash, hash, NOISE_HASH_LEN);
+++	memcpy(handshake->chaining_key, chaining_key, NOISE_HASH_LEN);
+++	handshake->remote_index = src->sender_index;
+++	if ((s64)(handshake->last_initiation_consumption -
+++	    (initiation_consumption = ktime_get_coarse_boottime_ns())) < 0)
+++		handshake->last_initiation_consumption = initiation_consumption;
+++	handshake->state = HANDSHAKE_CONSUMED_INITIATION;
+++	up_write(&handshake->lock);
+++	ret_peer = peer;
+++
+++out:
+++	memzero_explicit(key, NOISE_SYMMETRIC_KEY_LEN);
+++	memzero_explicit(hash, NOISE_HASH_LEN);
+++	memzero_explicit(chaining_key, NOISE_HASH_LEN);
+++	up_read(&wg->static_identity.lock);
+++	if (!ret_peer)
+++		wg_peer_put(peer);
+++	return ret_peer;
+++}
+++
+++bool wg_noise_handshake_create_response(struct message_handshake_response *dst,
+++					struct noise_handshake *handshake)
+++{
+++	u8 key[NOISE_SYMMETRIC_KEY_LEN];
+++	bool ret = false;
+++
+++	/* We need to wait for crng _before_ taking any locks, since
+++	 * curve25519_generate_secret uses get_random_bytes_wait.
+++	 */
+++	wait_for_random_bytes();
+++
+++	down_read(&handshake->static_identity->lock);
+++	down_write(&handshake->lock);
+++
+++	if (handshake->state != HANDSHAKE_CONSUMED_INITIATION)
+++		goto out;
+++
+++	dst->header.type = cpu_to_le32(MESSAGE_HANDSHAKE_RESPONSE);
+++	dst->receiver_index = handshake->remote_index;
+++
+++	/* e */
+++	curve25519_generate_secret(handshake->ephemeral_private);
+++	if (!curve25519_generate_public(dst->unencrypted_ephemeral,
+++					handshake->ephemeral_private))
+++		goto out;
+++	message_ephemeral(dst->unencrypted_ephemeral,
+++			  dst->unencrypted_ephemeral, handshake->chaining_key,
+++			  handshake->hash);
+++
+++	/* ee */
+++	if (!mix_dh(handshake->chaining_key, NULL, handshake->ephemeral_private,
+++		    handshake->remote_ephemeral))
+++		goto out;
+++
+++	/* se */
+++	if (!mix_dh(handshake->chaining_key, NULL, handshake->ephemeral_private,
+++		    handshake->remote_static))
+++		goto out;
+++
+++	/* psk */
+++	mix_psk(handshake->chaining_key, handshake->hash, key,
+++		handshake->preshared_key);
+++
+++	/* {} */
+++	message_encrypt(dst->encrypted_nothing, NULL, 0, key, handshake->hash);
+++
+++	dst->sender_index = wg_index_hashtable_insert(
+++		handshake->entry.peer->device->index_hashtable,
+++		&handshake->entry);
+++
+++	handshake->state = HANDSHAKE_CREATED_RESPONSE;
+++	ret = true;
+++
+++out:
+++	up_write(&handshake->lock);
+++	up_read(&handshake->static_identity->lock);
+++	memzero_explicit(key, NOISE_SYMMETRIC_KEY_LEN);
+++	return ret;
+++}
+++
+++struct wg_peer *
+++wg_noise_handshake_consume_response(struct message_handshake_response *src,
+++				    struct wg_device *wg)
+++{
+++	enum noise_handshake_state state = HANDSHAKE_ZEROED;
+++	struct wg_peer *peer = NULL, *ret_peer = NULL;
+++	struct noise_handshake *handshake;
+++	u8 key[NOISE_SYMMETRIC_KEY_LEN];
+++	u8 hash[NOISE_HASH_LEN];
+++	u8 chaining_key[NOISE_HASH_LEN];
+++	u8 e[NOISE_PUBLIC_KEY_LEN];
+++	u8 ephemeral_private[NOISE_PUBLIC_KEY_LEN];
+++	u8 static_private[NOISE_PUBLIC_KEY_LEN];
+++
+++	down_read(&wg->static_identity.lock);
+++
+++	if (unlikely(!wg->static_identity.has_identity))
+++		goto out;
+++
+++	handshake = (struct noise_handshake *)wg_index_hashtable_lookup(
+++		wg->index_hashtable, INDEX_HASHTABLE_HANDSHAKE,
+++		src->receiver_index, &peer);
+++	if (unlikely(!handshake))
+++		goto out;
+++
+++	down_read(&handshake->lock);
+++	state = handshake->state;
+++	memcpy(hash, handshake->hash, NOISE_HASH_LEN);
+++	memcpy(chaining_key, handshake->chaining_key, NOISE_HASH_LEN);
+++	memcpy(ephemeral_private, handshake->ephemeral_private,
+++	       NOISE_PUBLIC_KEY_LEN);
+++	up_read(&handshake->lock);
+++
+++	if (state != HANDSHAKE_CREATED_INITIATION)
+++		goto fail;
+++
+++	/* e */
+++	message_ephemeral(e, src->unencrypted_ephemeral, chaining_key, hash);
+++
+++	/* ee */
+++	if (!mix_dh(chaining_key, NULL, ephemeral_private, e))
+++		goto fail;
+++
+++	/* se */
+++	if (!mix_dh(chaining_key, NULL, wg->static_identity.static_private, e))
+++		goto fail;
+++
+++	/* psk */
+++	mix_psk(chaining_key, hash, key, handshake->preshared_key);
+++
+++	/* {} */
+++	if (!message_decrypt(NULL, src->encrypted_nothing,
+++			     sizeof(src->encrypted_nothing), key, hash))
+++		goto fail;
+++
+++	/* Success! Copy everything to peer */
+++	down_write(&handshake->lock);
+++	/* It's important to check that the state is still the same, while we
+++	 * have an exclusive lock.
+++	 */
+++	if (handshake->state != state) {
+++		up_write(&handshake->lock);
+++		goto fail;
+++	}
+++	memcpy(handshake->remote_ephemeral, e, NOISE_PUBLIC_KEY_LEN);
+++	memcpy(handshake->hash, hash, NOISE_HASH_LEN);
+++	memcpy(handshake->chaining_key, chaining_key, NOISE_HASH_LEN);
+++	handshake->remote_index = src->sender_index;
+++	handshake->state = HANDSHAKE_CONSUMED_RESPONSE;
+++	up_write(&handshake->lock);
+++	ret_peer = peer;
+++	goto out;
+++
+++fail:
+++	wg_peer_put(peer);
+++out:
+++	memzero_explicit(key, NOISE_SYMMETRIC_KEY_LEN);
+++	memzero_explicit(hash, NOISE_HASH_LEN);
+++	memzero_explicit(chaining_key, NOISE_HASH_LEN);
+++	memzero_explicit(ephemeral_private, NOISE_PUBLIC_KEY_LEN);
+++	memzero_explicit(static_private, NOISE_PUBLIC_KEY_LEN);
+++	up_read(&wg->static_identity.lock);
+++	return ret_peer;
+++}
+++
+++bool wg_noise_handshake_begin_session(struct noise_handshake *handshake,
+++				      struct noise_keypairs *keypairs)
+++{
+++	struct noise_keypair *new_keypair;
+++	bool ret = false;
+++
+++	down_write(&handshake->lock);
+++	if (handshake->state != HANDSHAKE_CREATED_RESPONSE &&
+++	    handshake->state != HANDSHAKE_CONSUMED_RESPONSE)
+++		goto out;
+++
+++	new_keypair = keypair_create(handshake->entry.peer);
+++	if (!new_keypair)
+++		goto out;
+++	new_keypair->i_am_the_initiator = handshake->state ==
+++					  HANDSHAKE_CONSUMED_RESPONSE;
+++	new_keypair->remote_index = handshake->remote_index;
+++
+++	if (new_keypair->i_am_the_initiator)
+++		derive_keys(&new_keypair->sending, &new_keypair->receiving,
+++			    handshake->chaining_key);
+++	else
+++		derive_keys(&new_keypair->receiving, &new_keypair->sending,
+++			    handshake->chaining_key);
+++
+++	handshake_zero(handshake);
+++	rcu_read_lock_bh();
+++	if (likely(!READ_ONCE(container_of(handshake, struct wg_peer,
+++					   handshake)->is_dead))) {
+++		add_new_keypair(keypairs, new_keypair);
+++		net_dbg_ratelimited("%s: Keypair %llu created for peer %llu\n",
+++				    handshake->entry.peer->device->dev->name,
+++				    new_keypair->internal_id,
+++				    handshake->entry.peer->internal_id);
+++		ret = wg_index_hashtable_replace(
+++			handshake->entry.peer->device->index_hashtable,
+++			&handshake->entry, &new_keypair->entry);
+++	} else {
+++		kzfree(new_keypair);
+++	}
+++	rcu_read_unlock_bh();
+++
+++out:
+++	up_write(&handshake->lock);
+++	return ret;
+++}
++--- /dev/null
+++++ b/drivers/net/wireguard/noise.h
++@@ -0,0 +1,137 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++#ifndef _WG_NOISE_H
+++#define _WG_NOISE_H
+++
+++#include "messages.h"
+++#include "peerlookup.h"
+++
+++#include <linux/types.h>
+++#include <linux/spinlock.h>
+++#include <linux/atomic.h>
+++#include <linux/rwsem.h>
+++#include <linux/mutex.h>
+++#include <linux/kref.h>
+++
+++union noise_counter {
+++	struct {
+++		u64 counter;
+++		unsigned long backtrack[COUNTER_BITS_TOTAL / BITS_PER_LONG];
+++		spinlock_t lock;
+++	} receive;
+++	atomic64_t counter;
+++};
+++
+++struct noise_symmetric_key {
+++	u8 key[NOISE_SYMMETRIC_KEY_LEN];
+++	union noise_counter counter;
+++	u64 birthdate;
+++	bool is_valid;
+++};
+++
+++struct noise_keypair {
+++	struct index_hashtable_entry entry;
+++	struct noise_symmetric_key sending;
+++	struct noise_symmetric_key receiving;
+++	__le32 remote_index;
+++	bool i_am_the_initiator;
+++	struct kref refcount;
+++	struct rcu_head rcu;
+++	u64 internal_id;
+++};
+++
+++struct noise_keypairs {
+++	struct noise_keypair __rcu *current_keypair;
+++	struct noise_keypair __rcu *previous_keypair;
+++	struct noise_keypair __rcu *next_keypair;
+++	spinlock_t keypair_update_lock;
+++};
+++
+++struct noise_static_identity {
+++	u8 static_public[NOISE_PUBLIC_KEY_LEN];
+++	u8 static_private[NOISE_PUBLIC_KEY_LEN];
+++	struct rw_semaphore lock;
+++	bool has_identity;
+++};
+++
+++enum noise_handshake_state {
+++	HANDSHAKE_ZEROED,
+++	HANDSHAKE_CREATED_INITIATION,
+++	HANDSHAKE_CONSUMED_INITIATION,
+++	HANDSHAKE_CREATED_RESPONSE,
+++	HANDSHAKE_CONSUMED_RESPONSE
+++};
+++
+++struct noise_handshake {
+++	struct index_hashtable_entry entry;
+++
+++	enum noise_handshake_state state;
+++	u64 last_initiation_consumption;
+++
+++	struct noise_static_identity *static_identity;
+++
+++	u8 ephemeral_private[NOISE_PUBLIC_KEY_LEN];
+++	u8 remote_static[NOISE_PUBLIC_KEY_LEN];
+++	u8 remote_ephemeral[NOISE_PUBLIC_KEY_LEN];
+++	u8 precomputed_static_static[NOISE_PUBLIC_KEY_LEN];
+++
+++	u8 preshared_key[NOISE_SYMMETRIC_KEY_LEN];
+++
+++	u8 hash[NOISE_HASH_LEN];
+++	u8 chaining_key[NOISE_HASH_LEN];
+++
+++	u8 latest_timestamp[NOISE_TIMESTAMP_LEN];
+++	__le32 remote_index;
+++
+++	/* Protects all members except the immutable (after noise_handshake_
+++	 * init): remote_static, precomputed_static_static, static_identity.
+++	 */
+++	struct rw_semaphore lock;
+++};
+++
+++struct wg_device;
+++
+++void wg_noise_init(void);
+++bool wg_noise_handshake_init(struct noise_handshake *handshake,
+++			   struct noise_static_identity *static_identity,
+++			   const u8 peer_public_key[NOISE_PUBLIC_KEY_LEN],
+++			   const u8 peer_preshared_key[NOISE_SYMMETRIC_KEY_LEN],
+++			   struct wg_peer *peer);
+++void wg_noise_handshake_clear(struct noise_handshake *handshake);
+++static inline void wg_noise_reset_last_sent_handshake(atomic64_t *handshake_ns)
+++{
+++	atomic64_set(handshake_ns, ktime_get_coarse_boottime_ns() -
+++				       (u64)(REKEY_TIMEOUT + 1) * NSEC_PER_SEC);
+++}
+++
+++void wg_noise_keypair_put(struct noise_keypair *keypair, bool unreference_now);
+++struct noise_keypair *wg_noise_keypair_get(struct noise_keypair *keypair);
+++void wg_noise_keypairs_clear(struct noise_keypairs *keypairs);
+++bool wg_noise_received_with_keypair(struct noise_keypairs *keypairs,
+++				    struct noise_keypair *received_keypair);
+++void wg_noise_expire_current_peer_keypairs(struct wg_peer *peer);
+++
+++void wg_noise_set_static_identity_private_key(
+++	struct noise_static_identity *static_identity,
+++	const u8 private_key[NOISE_PUBLIC_KEY_LEN]);
+++bool wg_noise_precompute_static_static(struct wg_peer *peer);
+++
+++bool
+++wg_noise_handshake_create_initiation(struct message_handshake_initiation *dst,
+++				     struct noise_handshake *handshake);
+++struct wg_peer *
+++wg_noise_handshake_consume_initiation(struct message_handshake_initiation *src,
+++				      struct wg_device *wg);
+++
+++bool wg_noise_handshake_create_response(struct message_handshake_response *dst,
+++					struct noise_handshake *handshake);
+++struct wg_peer *
+++wg_noise_handshake_consume_response(struct message_handshake_response *src,
+++				    struct wg_device *wg);
+++
+++bool wg_noise_handshake_begin_session(struct noise_handshake *handshake,
+++				      struct noise_keypairs *keypairs);
+++
+++#endif /* _WG_NOISE_H */
++--- /dev/null
+++++ b/drivers/net/wireguard/peer.c
++@@ -0,0 +1,240 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include "peer.h"
+++#include "device.h"
+++#include "queueing.h"
+++#include "timers.h"
+++#include "peerlookup.h"
+++#include "noise.h"
+++
+++#include <linux/kref.h>
+++#include <linux/lockdep.h>
+++#include <linux/rcupdate.h>
+++#include <linux/list.h>
+++
+++static atomic64_t peer_counter = ATOMIC64_INIT(0);
+++
+++struct wg_peer *wg_peer_create(struct wg_device *wg,
+++			       const u8 public_key[NOISE_PUBLIC_KEY_LEN],
+++			       const u8 preshared_key[NOISE_SYMMETRIC_KEY_LEN])
+++{
+++	struct wg_peer *peer;
+++	int ret = -ENOMEM;
+++
+++	lockdep_assert_held(&wg->device_update_lock);
+++
+++	if (wg->num_peers >= MAX_PEERS_PER_DEVICE)
+++		return ERR_PTR(ret);
+++
+++	peer = kzalloc(sizeof(*peer), GFP_KERNEL);
+++	if (unlikely(!peer))
+++		return ERR_PTR(ret);
+++	peer->device = wg;
+++
+++	if (!wg_noise_handshake_init(&peer->handshake, &wg->static_identity,
+++				     public_key, preshared_key, peer)) {
+++		ret = -EKEYREJECTED;
+++		goto err_1;
+++	}
+++	if (dst_cache_init(&peer->endpoint_cache, GFP_KERNEL))
+++		goto err_1;
+++	if (wg_packet_queue_init(&peer->tx_queue, wg_packet_tx_worker, false,
+++				 MAX_QUEUED_PACKETS))
+++		goto err_2;
+++	if (wg_packet_queue_init(&peer->rx_queue, NULL, false,
+++				 MAX_QUEUED_PACKETS))
+++		goto err_3;
+++
+++	peer->internal_id = atomic64_inc_return(&peer_counter);
+++	peer->serial_work_cpu = nr_cpumask_bits;
+++	wg_cookie_init(&peer->latest_cookie);
+++	wg_timers_init(peer);
+++	wg_cookie_checker_precompute_peer_keys(peer);
+++	spin_lock_init(&peer->keypairs.keypair_update_lock);
+++	INIT_WORK(&peer->transmit_handshake_work,
+++		  wg_packet_handshake_send_worker);
+++	rwlock_init(&peer->endpoint_lock);
+++	kref_init(&peer->refcount);
+++	skb_queue_head_init(&peer->staged_packet_queue);
+++	wg_noise_reset_last_sent_handshake(&peer->last_sent_handshake);
+++	set_bit(NAPI_STATE_NO_BUSY_POLL, &peer->napi.state);
+++	netif_napi_add(wg->dev, &peer->napi, wg_packet_rx_poll,
+++		       NAPI_POLL_WEIGHT);
+++	napi_enable(&peer->napi);
+++	list_add_tail(&peer->peer_list, &wg->peer_list);
+++	INIT_LIST_HEAD(&peer->allowedips_list);
+++	wg_pubkey_hashtable_add(wg->peer_hashtable, peer);
+++	++wg->num_peers;
+++	pr_debug("%s: Peer %llu created\n", wg->dev->name, peer->internal_id);
+++	return peer;
+++
+++err_3:
+++	wg_packet_queue_free(&peer->tx_queue, false);
+++err_2:
+++	dst_cache_destroy(&peer->endpoint_cache);
+++err_1:
+++	kfree(peer);
+++	return ERR_PTR(ret);
+++}
+++
+++struct wg_peer *wg_peer_get_maybe_zero(struct wg_peer *peer)
+++{
+++	RCU_LOCKDEP_WARN(!rcu_read_lock_bh_held(),
+++			 "Taking peer reference without holding the RCU read lock");
+++	if (unlikely(!peer || !kref_get_unless_zero(&peer->refcount)))
+++		return NULL;
+++	return peer;
+++}
+++
+++static void peer_make_dead(struct wg_peer *peer)
+++{
+++	/* Remove from configuration-time lookup structures. */
+++	list_del_init(&peer->peer_list);
+++	wg_allowedips_remove_by_peer(&peer->device->peer_allowedips, peer,
+++				     &peer->device->device_update_lock);
+++	wg_pubkey_hashtable_remove(peer->device->peer_hashtable, peer);
+++
+++	/* Mark as dead, so that we don't allow jumping contexts after. */
+++	WRITE_ONCE(peer->is_dead, true);
+++
+++	/* The caller must now synchronize_rcu() for this to take effect. */
+++}
+++
+++static void peer_remove_after_dead(struct wg_peer *peer)
+++{
+++	WARN_ON(!peer->is_dead);
+++
+++	/* No more keypairs can be created for this peer, since is_dead protects
+++	 * add_new_keypair, so we can now destroy existing ones.
+++	 */
+++	wg_noise_keypairs_clear(&peer->keypairs);
+++
+++	/* Destroy all ongoing timers that were in-flight at the beginning of
+++	 * this function.
+++	 */
+++	wg_timers_stop(peer);
+++
+++	/* The transition between packet encryption/decryption queues isn't
+++	 * guarded by is_dead, but each reference's life is strictly bounded by
+++	 * two generations: once for parallel crypto and once for serial
+++	 * ingestion, so we can simply flush twice, and be sure that we no
+++	 * longer have references inside these queues.
+++	 */
+++
+++	/* a) For encrypt/decrypt. */
+++	flush_workqueue(peer->device->packet_crypt_wq);
+++	/* b.1) For send (but not receive, since that's napi). */
+++	flush_workqueue(peer->device->packet_crypt_wq);
+++	/* b.2.1) For receive (but not send, since that's wq). */
+++	napi_disable(&peer->napi);
+++	/* b.2.1) It's now safe to remove the napi struct, which must be done
+++	 * here from process context.
+++	 */
+++	netif_napi_del(&peer->napi);
+++
+++	/* Ensure any workstructs we own (like transmit_handshake_work or
+++	 * clear_peer_work) no longer are in use.
+++	 */
+++	flush_workqueue(peer->device->handshake_send_wq);
+++
+++	/* After the above flushes, a peer might still be active in a few
+++	 * different contexts: 1) from xmit(), before hitting is_dead and
+++	 * returning, 2) from wg_packet_consume_data(), before hitting is_dead
+++	 * and returning, 3) from wg_receive_handshake_packet() after a point
+++	 * where it has processed an incoming handshake packet, but where
+++	 * all calls to pass it off to timers fails because of is_dead. We won't
+++	 * have new references in (1) eventually, because we're removed from
+++	 * allowedips; we won't have new references in (2) eventually, because
+++	 * wg_index_hashtable_lookup will always return NULL, since we removed
+++	 * all existing keypairs and no more can be created; we won't have new
+++	 * references in (3) eventually, because we're removed from the pubkey
+++	 * hash table, which allows for a maximum of one handshake response,
+++	 * via the still-uncleared index hashtable entry, but not more than one,
+++	 * and in wg_cookie_message_consume, the lookup eventually gets a peer
+++	 * with a refcount of zero, so no new reference is taken.
+++	 */
+++
+++	--peer->device->num_peers;
+++	wg_peer_put(peer);
+++}
+++
+++/* We have a separate "remove" function make sure that all active places where
+++ * a peer is currently operating will eventually come to an end and not pass
+++ * their reference onto another context.
+++ */
+++void wg_peer_remove(struct wg_peer *peer)
+++{
+++	if (unlikely(!peer))
+++		return;
+++	lockdep_assert_held(&peer->device->device_update_lock);
+++
+++	peer_make_dead(peer);
+++	synchronize_rcu();
+++	peer_remove_after_dead(peer);
+++}
+++
+++void wg_peer_remove_all(struct wg_device *wg)
+++{
+++	struct wg_peer *peer, *temp;
+++	LIST_HEAD(dead_peers);
+++
+++	lockdep_assert_held(&wg->device_update_lock);
+++
+++	/* Avoid having to traverse individually for each one. */
+++	wg_allowedips_free(&wg->peer_allowedips, &wg->device_update_lock);
+++
+++	list_for_each_entry_safe(peer, temp, &wg->peer_list, peer_list) {
+++		peer_make_dead(peer);
+++		list_add_tail(&peer->peer_list, &dead_peers);
+++	}
+++	synchronize_rcu();
+++	list_for_each_entry_safe(peer, temp, &dead_peers, peer_list)
+++		peer_remove_after_dead(peer);
+++}
+++
+++static void rcu_release(struct rcu_head *rcu)
+++{
+++	struct wg_peer *peer = container_of(rcu, struct wg_peer, rcu);
+++
+++	dst_cache_destroy(&peer->endpoint_cache);
+++	wg_packet_queue_free(&peer->rx_queue, false);
+++	wg_packet_queue_free(&peer->tx_queue, false);
+++
+++	/* The final zeroing takes care of clearing any remaining handshake key
+++	 * material and other potentially sensitive information.
+++	 */
+++	kzfree(peer);
+++}
+++
+++static void kref_release(struct kref *refcount)
+++{
+++	struct wg_peer *peer = container_of(refcount, struct wg_peer, refcount);
+++
+++	pr_debug("%s: Peer %llu (%pISpfsc) destroyed\n",
+++		 peer->device->dev->name, peer->internal_id,
+++		 &peer->endpoint.addr);
+++
+++	/* Remove ourself from dynamic runtime lookup structures, now that the
+++	 * last reference is gone.
+++	 */
+++	wg_index_hashtable_remove(peer->device->index_hashtable,
+++				  &peer->handshake.entry);
+++
+++	/* Remove any lingering packets that didn't have a chance to be
+++	 * transmitted.
+++	 */
+++	wg_packet_purge_staged_packets(peer);
+++
+++	/* Free the memory used. */
+++	call_rcu(&peer->rcu, rcu_release);
+++}
+++
+++void wg_peer_put(struct wg_peer *peer)
+++{
+++	if (unlikely(!peer))
+++		return;
+++	kref_put(&peer->refcount, kref_release);
+++}
++--- /dev/null
+++++ b/drivers/net/wireguard/peer.h
++@@ -0,0 +1,83 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#ifndef _WG_PEER_H
+++#define _WG_PEER_H
+++
+++#include "device.h"
+++#include "noise.h"
+++#include "cookie.h"
+++
+++#include <linux/types.h>
+++#include <linux/netfilter.h>
+++#include <linux/spinlock.h>
+++#include <linux/kref.h>
+++#include <net/dst_cache.h>
+++
+++struct wg_device;
+++
+++struct endpoint {
+++	union {
+++		struct sockaddr addr;
+++		struct sockaddr_in addr4;
+++		struct sockaddr_in6 addr6;
+++	};
+++	union {
+++		struct {
+++			struct in_addr src4;
+++			/* Essentially the same as addr6->scope_id */
+++			int src_if4;
+++		};
+++		struct in6_addr src6;
+++	};
+++};
+++
+++struct wg_peer {
+++	struct wg_device *device;
+++	struct crypt_queue tx_queue, rx_queue;
+++	struct sk_buff_head staged_packet_queue;
+++	int serial_work_cpu;
+++	struct noise_keypairs keypairs;
+++	struct endpoint endpoint;
+++	struct dst_cache endpoint_cache;
+++	rwlock_t endpoint_lock;
+++	struct noise_handshake handshake;
+++	atomic64_t last_sent_handshake;
+++	struct work_struct transmit_handshake_work, clear_peer_work;
+++	struct cookie latest_cookie;
+++	struct hlist_node pubkey_hash;
+++	u64 rx_bytes, tx_bytes;
+++	struct timer_list timer_retransmit_handshake, timer_send_keepalive;
+++	struct timer_list timer_new_handshake, timer_zero_key_material;
+++	struct timer_list timer_persistent_keepalive;
+++	unsigned int timer_handshake_attempts;
+++	u16 persistent_keepalive_interval;
+++	bool timer_need_another_keepalive;
+++	bool sent_lastminute_handshake;
+++	struct timespec64 walltime_last_handshake;
+++	struct kref refcount;
+++	struct rcu_head rcu;
+++	struct list_head peer_list;
+++	struct list_head allowedips_list;
+++	u64 internal_id;
+++	struct napi_struct napi;
+++	bool is_dead;
+++};
+++
+++struct wg_peer *wg_peer_create(struct wg_device *wg,
+++			       const u8 public_key[NOISE_PUBLIC_KEY_LEN],
+++			       const u8 preshared_key[NOISE_SYMMETRIC_KEY_LEN]);
+++
+++struct wg_peer *__must_check wg_peer_get_maybe_zero(struct wg_peer *peer);
+++static inline struct wg_peer *wg_peer_get(struct wg_peer *peer)
+++{
+++	kref_get(&peer->refcount);
+++	return peer;
+++}
+++void wg_peer_put(struct wg_peer *peer);
+++void wg_peer_remove(struct wg_peer *peer);
+++void wg_peer_remove_all(struct wg_device *wg);
+++
+++#endif /* _WG_PEER_H */
++--- /dev/null
+++++ b/drivers/net/wireguard/peerlookup.c
++@@ -0,0 +1,221 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include "peerlookup.h"
+++#include "peer.h"
+++#include "noise.h"
+++
+++static struct hlist_head *pubkey_bucket(struct pubkey_hashtable *table,
+++					const u8 pubkey[NOISE_PUBLIC_KEY_LEN])
+++{
+++	/* siphash gives us a secure 64bit number based on a random key. Since
+++	 * the bits are uniformly distributed, we can then mask off to get the
+++	 * bits we need.
+++	 */
+++	const u64 hash = siphash(pubkey, NOISE_PUBLIC_KEY_LEN, &table->key);
+++
+++	return &table->hashtable[hash & (HASH_SIZE(table->hashtable) - 1)];
+++}
+++
+++struct pubkey_hashtable *wg_pubkey_hashtable_alloc(void)
+++{
+++	struct pubkey_hashtable *table = kvmalloc(sizeof(*table), GFP_KERNEL);
+++
+++	if (!table)
+++		return NULL;
+++
+++	get_random_bytes(&table->key, sizeof(table->key));
+++	hash_init(table->hashtable);
+++	mutex_init(&table->lock);
+++	return table;
+++}
+++
+++void wg_pubkey_hashtable_add(struct pubkey_hashtable *table,
+++			     struct wg_peer *peer)
+++{
+++	mutex_lock(&table->lock);
+++	hlist_add_head_rcu(&peer->pubkey_hash,
+++			   pubkey_bucket(table, peer->handshake.remote_static));
+++	mutex_unlock(&table->lock);
+++}
+++
+++void wg_pubkey_hashtable_remove(struct pubkey_hashtable *table,
+++				struct wg_peer *peer)
+++{
+++	mutex_lock(&table->lock);
+++	hlist_del_init_rcu(&peer->pubkey_hash);
+++	mutex_unlock(&table->lock);
+++}
+++
+++/* Returns a strong reference to a peer */
+++struct wg_peer *
+++wg_pubkey_hashtable_lookup(struct pubkey_hashtable *table,
+++			   const u8 pubkey[NOISE_PUBLIC_KEY_LEN])
+++{
+++	struct wg_peer *iter_peer, *peer = NULL;
+++
+++	rcu_read_lock_bh();
+++	hlist_for_each_entry_rcu_bh(iter_peer, pubkey_bucket(table, pubkey),
+++				    pubkey_hash) {
+++		if (!memcmp(pubkey, iter_peer->handshake.remote_static,
+++			    NOISE_PUBLIC_KEY_LEN)) {
+++			peer = iter_peer;
+++			break;
+++		}
+++	}
+++	peer = wg_peer_get_maybe_zero(peer);
+++	rcu_read_unlock_bh();
+++	return peer;
+++}
+++
+++static struct hlist_head *index_bucket(struct index_hashtable *table,
+++				       const __le32 index)
+++{
+++	/* Since the indices are random and thus all bits are uniformly
+++	 * distributed, we can find its bucket simply by masking.
+++	 */
+++	return &table->hashtable[(__force u32)index &
+++				 (HASH_SIZE(table->hashtable) - 1)];
+++}
+++
+++struct index_hashtable *wg_index_hashtable_alloc(void)
+++{
+++	struct index_hashtable *table = kvmalloc(sizeof(*table), GFP_KERNEL);
+++
+++	if (!table)
+++		return NULL;
+++
+++	hash_init(table->hashtable);
+++	spin_lock_init(&table->lock);
+++	return table;
+++}
+++
+++/* At the moment, we limit ourselves to 2^20 total peers, which generally might
+++ * amount to 2^20*3 items in this hashtable. The algorithm below works by
+++ * picking a random number and testing it. We can see that these limits mean we
+++ * usually succeed pretty quickly:
+++ *
+++ * >>> def calculation(tries, size):
+++ * ...     return (size / 2**32)**(tries - 1) *  (1 - (size / 2**32))
+++ * ...
+++ * >>> calculation(1, 2**20 * 3)
+++ * 0.999267578125
+++ * >>> calculation(2, 2**20 * 3)
+++ * 0.0007318854331970215
+++ * >>> calculation(3, 2**20 * 3)
+++ * 5.360489012673497e-07
+++ * >>> calculation(4, 2**20 * 3)
+++ * 3.9261394135792216e-10
+++ *
+++ * At the moment, we don't do any masking, so this algorithm isn't exactly
+++ * constant time in either the random guessing or in the hash list lookup. We
+++ * could require a minimum of 3 tries, which would successfully mask the
+++ * guessing. this would not, however, help with the growing hash lengths, which
+++ * is another thing to consider moving forward.
+++ */
+++
+++__le32 wg_index_hashtable_insert(struct index_hashtable *table,
+++				 struct index_hashtable_entry *entry)
+++{
+++	struct index_hashtable_entry *existing_entry;
+++
+++	spin_lock_bh(&table->lock);
+++	hlist_del_init_rcu(&entry->index_hash);
+++	spin_unlock_bh(&table->lock);
+++
+++	rcu_read_lock_bh();
+++
+++search_unused_slot:
+++	/* First we try to find an unused slot, randomly, while unlocked. */
+++	entry->index = (__force __le32)get_random_u32();
+++	hlist_for_each_entry_rcu_bh(existing_entry,
+++				    index_bucket(table, entry->index),
+++				    index_hash) {
+++		if (existing_entry->index == entry->index)
+++			/* If it's already in use, we continue searching. */
+++			goto search_unused_slot;
+++	}
+++
+++	/* Once we've found an unused slot, we lock it, and then double-check
+++	 * that nobody else stole it from us.
+++	 */
+++	spin_lock_bh(&table->lock);
+++	hlist_for_each_entry_rcu_bh(existing_entry,
+++				    index_bucket(table, entry->index),
+++				    index_hash) {
+++		if (existing_entry->index == entry->index) {
+++			spin_unlock_bh(&table->lock);
+++			/* If it was stolen, we start over. */
+++			goto search_unused_slot;
+++		}
+++	}
+++	/* Otherwise, we know we have it exclusively (since we're locked),
+++	 * so we insert.
+++	 */
+++	hlist_add_head_rcu(&entry->index_hash,
+++			   index_bucket(table, entry->index));
+++	spin_unlock_bh(&table->lock);
+++
+++	rcu_read_unlock_bh();
+++
+++	return entry->index;
+++}
+++
+++bool wg_index_hashtable_replace(struct index_hashtable *table,
+++				struct index_hashtable_entry *old,
+++				struct index_hashtable_entry *new)
+++{
+++	if (unlikely(hlist_unhashed(&old->index_hash)))
+++		return false;
+++	spin_lock_bh(&table->lock);
+++	new->index = old->index;
+++	hlist_replace_rcu(&old->index_hash, &new->index_hash);
+++
+++	/* Calling init here NULLs out index_hash, and in fact after this
+++	 * function returns, it's theoretically possible for this to get
+++	 * reinserted elsewhere. That means the RCU lookup below might either
+++	 * terminate early or jump between buckets, in which case the packet
+++	 * simply gets dropped, which isn't terrible.
+++	 */
+++	INIT_HLIST_NODE(&old->index_hash);
+++	spin_unlock_bh(&table->lock);
+++	return true;
+++}
+++
+++void wg_index_hashtable_remove(struct index_hashtable *table,
+++			       struct index_hashtable_entry *entry)
+++{
+++	spin_lock_bh(&table->lock);
+++	hlist_del_init_rcu(&entry->index_hash);
+++	spin_unlock_bh(&table->lock);
+++}
+++
+++/* Returns a strong reference to a entry->peer */
+++struct index_hashtable_entry *
+++wg_index_hashtable_lookup(struct index_hashtable *table,
+++			  const enum index_hashtable_type type_mask,
+++			  const __le32 index, struct wg_peer **peer)
+++{
+++	struct index_hashtable_entry *iter_entry, *entry = NULL;
+++
+++	rcu_read_lock_bh();
+++	hlist_for_each_entry_rcu_bh(iter_entry, index_bucket(table, index),
+++				    index_hash) {
+++		if (iter_entry->index == index) {
+++			if (likely(iter_entry->type & type_mask))
+++				entry = iter_entry;
+++			break;
+++		}
+++	}
+++	if (likely(entry)) {
+++		entry->peer = wg_peer_get_maybe_zero(entry->peer);
+++		if (likely(entry->peer))
+++			*peer = entry->peer;
+++		else
+++			entry = NULL;
+++	}
+++	rcu_read_unlock_bh();
+++	return entry;
+++}
++--- /dev/null
+++++ b/drivers/net/wireguard/peerlookup.h
++@@ -0,0 +1,64 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#ifndef _WG_PEERLOOKUP_H
+++#define _WG_PEERLOOKUP_H
+++
+++#include "messages.h"
+++
+++#include <linux/hashtable.h>
+++#include <linux/mutex.h>
+++#include <linux/siphash.h>
+++
+++struct wg_peer;
+++
+++struct pubkey_hashtable {
+++	/* TODO: move to rhashtable */
+++	DECLARE_HASHTABLE(hashtable, 11);
+++	siphash_key_t key;
+++	struct mutex lock;
+++};
+++
+++struct pubkey_hashtable *wg_pubkey_hashtable_alloc(void);
+++void wg_pubkey_hashtable_add(struct pubkey_hashtable *table,
+++			     struct wg_peer *peer);
+++void wg_pubkey_hashtable_remove(struct pubkey_hashtable *table,
+++				struct wg_peer *peer);
+++struct wg_peer *
+++wg_pubkey_hashtable_lookup(struct pubkey_hashtable *table,
+++			   const u8 pubkey[NOISE_PUBLIC_KEY_LEN]);
+++
+++struct index_hashtable {
+++	/* TODO: move to rhashtable */
+++	DECLARE_HASHTABLE(hashtable, 13);
+++	spinlock_t lock;
+++};
+++
+++enum index_hashtable_type {
+++	INDEX_HASHTABLE_HANDSHAKE = 1U << 0,
+++	INDEX_HASHTABLE_KEYPAIR = 1U << 1
+++};
+++
+++struct index_hashtable_entry {
+++	struct wg_peer *peer;
+++	struct hlist_node index_hash;
+++	enum index_hashtable_type type;
+++	__le32 index;
+++};
+++
+++struct index_hashtable *wg_index_hashtable_alloc(void);
+++__le32 wg_index_hashtable_insert(struct index_hashtable *table,
+++				 struct index_hashtable_entry *entry);
+++bool wg_index_hashtable_replace(struct index_hashtable *table,
+++				struct index_hashtable_entry *old,
+++				struct index_hashtable_entry *new);
+++void wg_index_hashtable_remove(struct index_hashtable *table,
+++			       struct index_hashtable_entry *entry);
+++struct index_hashtable_entry *
+++wg_index_hashtable_lookup(struct index_hashtable *table,
+++			  const enum index_hashtable_type type_mask,
+++			  const __le32 index, struct wg_peer **peer);
+++
+++#endif /* _WG_PEERLOOKUP_H */
++--- /dev/null
+++++ b/drivers/net/wireguard/queueing.c
++@@ -0,0 +1,53 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include "queueing.h"
+++
+++struct multicore_worker __percpu *
+++wg_packet_percpu_multicore_worker_alloc(work_func_t function, void *ptr)
+++{
+++	int cpu;
+++	struct multicore_worker __percpu *worker =
+++		alloc_percpu(struct multicore_worker);
+++
+++	if (!worker)
+++		return NULL;
+++
+++	for_each_possible_cpu(cpu) {
+++		per_cpu_ptr(worker, cpu)->ptr = ptr;
+++		INIT_WORK(&per_cpu_ptr(worker, cpu)->work, function);
+++	}
+++	return worker;
+++}
+++
+++int wg_packet_queue_init(struct crypt_queue *queue, work_func_t function,
+++			 bool multicore, unsigned int len)
+++{
+++	int ret;
+++
+++	memset(queue, 0, sizeof(*queue));
+++	ret = ptr_ring_init(&queue->ring, len, GFP_KERNEL);
+++	if (ret)
+++		return ret;
+++	if (function) {
+++		if (multicore) {
+++			queue->worker = wg_packet_percpu_multicore_worker_alloc(
+++				function, queue);
+++			if (!queue->worker)
+++				return -ENOMEM;
+++		} else {
+++			INIT_WORK(&queue->work, function);
+++		}
+++	}
+++	return 0;
+++}
+++
+++void wg_packet_queue_free(struct crypt_queue *queue, bool multicore)
+++{
+++	if (multicore)
+++		free_percpu(queue->worker);
+++	WARN_ON(!__ptr_ring_empty(&queue->ring));
+++	ptr_ring_cleanup(&queue->ring, NULL);
+++}
++--- /dev/null
+++++ b/drivers/net/wireguard/queueing.h
++@@ -0,0 +1,197 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#ifndef _WG_QUEUEING_H
+++#define _WG_QUEUEING_H
+++
+++#include "peer.h"
+++#include <linux/types.h>
+++#include <linux/skbuff.h>
+++#include <linux/ip.h>
+++#include <linux/ipv6.h>
+++
+++struct wg_device;
+++struct wg_peer;
+++struct multicore_worker;
+++struct crypt_queue;
+++struct sk_buff;
+++
+++/* queueing.c APIs: */
+++int wg_packet_queue_init(struct crypt_queue *queue, work_func_t function,
+++			 bool multicore, unsigned int len);
+++void wg_packet_queue_free(struct crypt_queue *queue, bool multicore);
+++struct multicore_worker __percpu *
+++wg_packet_percpu_multicore_worker_alloc(work_func_t function, void *ptr);
+++
+++/* receive.c APIs: */
+++void wg_packet_receive(struct wg_device *wg, struct sk_buff *skb);
+++void wg_packet_handshake_receive_worker(struct work_struct *work);
+++/* NAPI poll function: */
+++int wg_packet_rx_poll(struct napi_struct *napi, int budget);
+++/* Workqueue worker: */
+++void wg_packet_decrypt_worker(struct work_struct *work);
+++
+++/* send.c APIs: */
+++void wg_packet_send_queued_handshake_initiation(struct wg_peer *peer,
+++						bool is_retry);
+++void wg_packet_send_handshake_response(struct wg_peer *peer);
+++void wg_packet_send_handshake_cookie(struct wg_device *wg,
+++				     struct sk_buff *initiating_skb,
+++				     __le32 sender_index);
+++void wg_packet_send_keepalive(struct wg_peer *peer);
+++void wg_packet_purge_staged_packets(struct wg_peer *peer);
+++void wg_packet_send_staged_packets(struct wg_peer *peer);
+++/* Workqueue workers: */
+++void wg_packet_handshake_send_worker(struct work_struct *work);
+++void wg_packet_tx_worker(struct work_struct *work);
+++void wg_packet_encrypt_worker(struct work_struct *work);
+++
+++enum packet_state {
+++	PACKET_STATE_UNCRYPTED,
+++	PACKET_STATE_CRYPTED,
+++	PACKET_STATE_DEAD
+++};
+++
+++struct packet_cb {
+++	u64 nonce;
+++	struct noise_keypair *keypair;
+++	atomic_t state;
+++	u32 mtu;
+++	u8 ds;
+++};
+++
+++#define PACKET_CB(skb) ((struct packet_cb *)((skb)->cb))
+++#define PACKET_PEER(skb) (PACKET_CB(skb)->keypair->entry.peer)
+++
+++/* Returns either the correct skb->protocol value, or 0 if invalid. */
+++static inline __be16 wg_skb_examine_untrusted_ip_hdr(struct sk_buff *skb)
+++{
+++	if (skb_network_header(skb) >= skb->head &&
+++	    (skb_network_header(skb) + sizeof(struct iphdr)) <=
+++		    skb_tail_pointer(skb) &&
+++	    ip_hdr(skb)->version == 4)
+++		return htons(ETH_P_IP);
+++	if (skb_network_header(skb) >= skb->head &&
+++	    (skb_network_header(skb) + sizeof(struct ipv6hdr)) <=
+++		    skb_tail_pointer(skb) &&
+++	    ipv6_hdr(skb)->version == 6)
+++		return htons(ETH_P_IPV6);
+++	return 0;
+++}
+++
+++static inline void wg_reset_packet(struct sk_buff *skb)
+++{
+++	const int pfmemalloc = skb->pfmemalloc;
+++
+++	skb_scrub_packet(skb, true);
+++	memset(&skb->headers_start, 0,
+++	       offsetof(struct sk_buff, headers_end) -
+++		       offsetof(struct sk_buff, headers_start));
+++	skb->pfmemalloc = pfmemalloc;
+++	skb->queue_mapping = 0;
+++	skb->nohdr = 0;
+++	skb->peeked = 0;
+++	skb->mac_len = 0;
+++	skb->dev = NULL;
+++#ifdef CONFIG_NET_SCHED
+++	skb->tc_index = 0;
+++#endif
+++	skb_reset_redirect(skb);
+++	skb->hdr_len = skb_headroom(skb);
+++	skb_reset_mac_header(skb);
+++	skb_reset_network_header(skb);
+++	skb_reset_transport_header(skb);
+++	skb_probe_transport_header(skb);
+++	skb_reset_inner_headers(skb);
+++}
+++
+++static inline int wg_cpumask_choose_online(int *stored_cpu, unsigned int id)
+++{
+++	unsigned int cpu = *stored_cpu, cpu_index, i;
+++
+++	if (unlikely(cpu == nr_cpumask_bits ||
+++		     !cpumask_test_cpu(cpu, cpu_online_mask))) {
+++		cpu_index = id % cpumask_weight(cpu_online_mask);
+++		cpu = cpumask_first(cpu_online_mask);
+++		for (i = 0; i < cpu_index; ++i)
+++			cpu = cpumask_next(cpu, cpu_online_mask);
+++		*stored_cpu = cpu;
+++	}
+++	return cpu;
+++}
+++
+++/* This function is racy, in the sense that next is unlocked, so it could return
+++ * the same CPU twice. A race-free version of this would be to instead store an
+++ * atomic sequence number, do an increment-and-return, and then iterate through
+++ * every possible CPU until we get to that index -- choose_cpu. However that's
+++ * a bit slower, and it doesn't seem like this potential race actually
+++ * introduces any performance loss, so we live with it.
+++ */
+++static inline int wg_cpumask_next_online(int *next)
+++{
+++	int cpu = *next;
+++
+++	while (unlikely(!cpumask_test_cpu(cpu, cpu_online_mask)))
+++		cpu = cpumask_next(cpu, cpu_online_mask) % nr_cpumask_bits;
+++	*next = cpumask_next(cpu, cpu_online_mask) % nr_cpumask_bits;
+++	return cpu;
+++}
+++
+++static inline int wg_queue_enqueue_per_device_and_peer(
+++	struct crypt_queue *device_queue, struct crypt_queue *peer_queue,
+++	struct sk_buff *skb, struct workqueue_struct *wq, int *next_cpu)
+++{
+++	int cpu;
+++
+++	atomic_set_release(&PACKET_CB(skb)->state, PACKET_STATE_UNCRYPTED);
+++	/* We first queue this up for the peer ingestion, but the consumer
+++	 * will wait for the state to change to CRYPTED or DEAD before.
+++	 */
+++	if (unlikely(ptr_ring_produce_bh(&peer_queue->ring, skb)))
+++		return -ENOSPC;
+++	/* Then we queue it up in the device queue, which consumes the
+++	 * packet as soon as it can.
+++	 */
+++	cpu = wg_cpumask_next_online(next_cpu);
+++	if (unlikely(ptr_ring_produce_bh(&device_queue->ring, skb)))
+++		return -EPIPE;
+++	queue_work_on(cpu, wq, &per_cpu_ptr(device_queue->worker, cpu)->work);
+++	return 0;
+++}
+++
+++static inline void wg_queue_enqueue_per_peer(struct crypt_queue *queue,
+++					     struct sk_buff *skb,
+++					     enum packet_state state)
+++{
+++	/* We take a reference, because as soon as we call atomic_set, the
+++	 * peer can be freed from below us.
+++	 */
+++	struct wg_peer *peer = wg_peer_get(PACKET_PEER(skb));
+++
+++	atomic_set_release(&PACKET_CB(skb)->state, state);
+++	queue_work_on(wg_cpumask_choose_online(&peer->serial_work_cpu,
+++					       peer->internal_id),
+++		      peer->device->packet_crypt_wq, &queue->work);
+++	wg_peer_put(peer);
+++}
+++
+++static inline void wg_queue_enqueue_per_peer_napi(struct sk_buff *skb,
+++						  enum packet_state state)
+++{
+++	/* We take a reference, because as soon as we call atomic_set, the
+++	 * peer can be freed from below us.
+++	 */
+++	struct wg_peer *peer = wg_peer_get(PACKET_PEER(skb));
+++
+++	atomic_set_release(&PACKET_CB(skb)->state, state);
+++	napi_schedule(&peer->napi);
+++	wg_peer_put(peer);
+++}
+++
+++#ifdef DEBUG
+++bool wg_packet_counter_selftest(void);
+++#endif
+++
+++#endif /* _WG_QUEUEING_H */
++--- /dev/null
+++++ b/drivers/net/wireguard/ratelimiter.c
++@@ -0,0 +1,223 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include "ratelimiter.h"
+++#include <linux/siphash.h>
+++#include <linux/mm.h>
+++#include <linux/slab.h>
+++#include <net/ip.h>
+++
+++static struct kmem_cache *entry_cache;
+++static hsiphash_key_t key;
+++static spinlock_t table_lock = __SPIN_LOCK_UNLOCKED("ratelimiter_table_lock");
+++static DEFINE_MUTEX(init_lock);
+++static u64 init_refcnt; /* Protected by init_lock, hence not atomic. */
+++static atomic_t total_entries = ATOMIC_INIT(0);
+++static unsigned int max_entries, table_size;
+++static void wg_ratelimiter_gc_entries(struct work_struct *);
+++static DECLARE_DEFERRABLE_WORK(gc_work, wg_ratelimiter_gc_entries);
+++static struct hlist_head *table_v4;
+++#if IS_ENABLED(CONFIG_IPV6)
+++static struct hlist_head *table_v6;
+++#endif
+++
+++struct ratelimiter_entry {
+++	u64 last_time_ns, tokens, ip;
+++	void *net;
+++	spinlock_t lock;
+++	struct hlist_node hash;
+++	struct rcu_head rcu;
+++};
+++
+++enum {
+++	PACKETS_PER_SECOND = 20,
+++	PACKETS_BURSTABLE = 5,
+++	PACKET_COST = NSEC_PER_SEC / PACKETS_PER_SECOND,
+++	TOKEN_MAX = PACKET_COST * PACKETS_BURSTABLE
+++};
+++
+++static void entry_free(struct rcu_head *rcu)
+++{
+++	kmem_cache_free(entry_cache,
+++			container_of(rcu, struct ratelimiter_entry, rcu));
+++	atomic_dec(&total_entries);
+++}
+++
+++static void entry_uninit(struct ratelimiter_entry *entry)
+++{
+++	hlist_del_rcu(&entry->hash);
+++	call_rcu(&entry->rcu, entry_free);
+++}
+++
+++/* Calling this function with a NULL work uninits all entries. */
+++static void wg_ratelimiter_gc_entries(struct work_struct *work)
+++{
+++	const u64 now = ktime_get_coarse_boottime_ns();
+++	struct ratelimiter_entry *entry;
+++	struct hlist_node *temp;
+++	unsigned int i;
+++
+++	for (i = 0; i < table_size; ++i) {
+++		spin_lock(&table_lock);
+++		hlist_for_each_entry_safe(entry, temp, &table_v4[i], hash) {
+++			if (unlikely(!work) ||
+++			    now - entry->last_time_ns > NSEC_PER_SEC)
+++				entry_uninit(entry);
+++		}
+++#if IS_ENABLED(CONFIG_IPV6)
+++		hlist_for_each_entry_safe(entry, temp, &table_v6[i], hash) {
+++			if (unlikely(!work) ||
+++			    now - entry->last_time_ns > NSEC_PER_SEC)
+++				entry_uninit(entry);
+++		}
+++#endif
+++		spin_unlock(&table_lock);
+++		if (likely(work))
+++			cond_resched();
+++	}
+++	if (likely(work))
+++		queue_delayed_work(system_power_efficient_wq, &gc_work, HZ);
+++}
+++
+++bool wg_ratelimiter_allow(struct sk_buff *skb, struct net *net)
+++{
+++	/* We only take the bottom half of the net pointer, so that we can hash
+++	 * 3 words in the end. This way, siphash's len param fits into the final
+++	 * u32, and we don't incur an extra round.
+++	 */
+++	const u32 net_word = (unsigned long)net;
+++	struct ratelimiter_entry *entry;
+++	struct hlist_head *bucket;
+++	u64 ip;
+++
+++	if (skb->protocol == htons(ETH_P_IP)) {
+++		ip = (u64 __force)ip_hdr(skb)->saddr;
+++		bucket = &table_v4[hsiphash_2u32(net_word, ip, &key) &
+++				   (table_size - 1)];
+++	}
+++#if IS_ENABLED(CONFIG_IPV6)
+++	else if (skb->protocol == htons(ETH_P_IPV6)) {
+++		/* Only use 64 bits, so as to ratelimit the whole /64. */
+++		memcpy(&ip, &ipv6_hdr(skb)->saddr, sizeof(ip));
+++		bucket = &table_v6[hsiphash_3u32(net_word, ip >> 32, ip, &key) &
+++				   (table_size - 1)];
+++	}
+++#endif
+++	else
+++		return false;
+++	rcu_read_lock();
+++	hlist_for_each_entry_rcu(entry, bucket, hash) {
+++		if (entry->net == net && entry->ip == ip) {
+++			u64 now, tokens;
+++			bool ret;
+++			/* Quasi-inspired by nft_limit.c, but this is actually a
+++			 * slightly different algorithm. Namely, we incorporate
+++			 * the burst as part of the maximum tokens, rather than
+++			 * as part of the rate.
+++			 */
+++			spin_lock(&entry->lock);
+++			now = ktime_get_coarse_boottime_ns();
+++			tokens = min_t(u64, TOKEN_MAX,
+++				       entry->tokens + now -
+++					       entry->last_time_ns);
+++			entry->last_time_ns = now;
+++			ret = tokens >= PACKET_COST;
+++			entry->tokens = ret ? tokens - PACKET_COST : tokens;
+++			spin_unlock(&entry->lock);
+++			rcu_read_unlock();
+++			return ret;
+++		}
+++	}
+++	rcu_read_unlock();
+++
+++	if (atomic_inc_return(&total_entries) > max_entries)
+++		goto err_oom;
+++
+++	entry = kmem_cache_alloc(entry_cache, GFP_KERNEL);
+++	if (unlikely(!entry))
+++		goto err_oom;
+++
+++	entry->net = net;
+++	entry->ip = ip;
+++	INIT_HLIST_NODE(&entry->hash);
+++	spin_lock_init(&entry->lock);
+++	entry->last_time_ns = ktime_get_coarse_boottime_ns();
+++	entry->tokens = TOKEN_MAX - PACKET_COST;
+++	spin_lock(&table_lock);
+++	hlist_add_head_rcu(&entry->hash, bucket);
+++	spin_unlock(&table_lock);
+++	return true;
+++
+++err_oom:
+++	atomic_dec(&total_entries);
+++	return false;
+++}
+++
+++int wg_ratelimiter_init(void)
+++{
+++	mutex_lock(&init_lock);
+++	if (++init_refcnt != 1)
+++		goto out;
+++
+++	entry_cache = KMEM_CACHE(ratelimiter_entry, 0);
+++	if (!entry_cache)
+++		goto err;
+++
+++	/* xt_hashlimit.c uses a slightly different algorithm for ratelimiting,
+++	 * but what it shares in common is that it uses a massive hashtable. So,
+++	 * we borrow their wisdom about good table sizes on different systems
+++	 * dependent on RAM. This calculation here comes from there.
+++	 */
+++	table_size = (totalram_pages() > (1U << 30) / PAGE_SIZE) ? 8192 :
+++		max_t(unsigned long, 16, roundup_pow_of_two(
+++			(totalram_pages() << PAGE_SHIFT) /
+++			(1U << 14) / sizeof(struct hlist_head)));
+++	max_entries = table_size * 8;
+++
+++	table_v4 = kvzalloc(table_size * sizeof(*table_v4), GFP_KERNEL);
+++	if (unlikely(!table_v4))
+++		goto err_kmemcache;
+++
+++#if IS_ENABLED(CONFIG_IPV6)
+++	table_v6 = kvzalloc(table_size * sizeof(*table_v6), GFP_KERNEL);
+++	if (unlikely(!table_v6)) {
+++		kvfree(table_v4);
+++		goto err_kmemcache;
+++	}
+++#endif
+++
+++	queue_delayed_work(system_power_efficient_wq, &gc_work, HZ);
+++	get_random_bytes(&key, sizeof(key));
+++out:
+++	mutex_unlock(&init_lock);
+++	return 0;
+++
+++err_kmemcache:
+++	kmem_cache_destroy(entry_cache);
+++err:
+++	--init_refcnt;
+++	mutex_unlock(&init_lock);
+++	return -ENOMEM;
+++}
+++
+++void wg_ratelimiter_uninit(void)
+++{
+++	mutex_lock(&init_lock);
+++	if (!init_refcnt || --init_refcnt)
+++		goto out;
+++
+++	cancel_delayed_work_sync(&gc_work);
+++	wg_ratelimiter_gc_entries(NULL);
+++	rcu_barrier();
+++	kvfree(table_v4);
+++#if IS_ENABLED(CONFIG_IPV6)
+++	kvfree(table_v6);
+++#endif
+++	kmem_cache_destroy(entry_cache);
+++out:
+++	mutex_unlock(&init_lock);
+++}
+++
+++#include "selftest/ratelimiter.c"
++--- /dev/null
+++++ b/drivers/net/wireguard/ratelimiter.h
++@@ -0,0 +1,19 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#ifndef _WG_RATELIMITER_H
+++#define _WG_RATELIMITER_H
+++
+++#include <linux/skbuff.h>
+++
+++int wg_ratelimiter_init(void);
+++void wg_ratelimiter_uninit(void);
+++bool wg_ratelimiter_allow(struct sk_buff *skb, struct net *net);
+++
+++#ifdef DEBUG
+++bool wg_ratelimiter_selftest(void);
+++#endif
+++
+++#endif /* _WG_RATELIMITER_H */
++--- /dev/null
+++++ b/drivers/net/wireguard/receive.c
++@@ -0,0 +1,595 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include "queueing.h"
+++#include "device.h"
+++#include "peer.h"
+++#include "timers.h"
+++#include "messages.h"
+++#include "cookie.h"
+++#include "socket.h"
+++
+++#include <linux/ip.h>
+++#include <linux/ipv6.h>
+++#include <linux/udp.h>
+++#include <net/ip_tunnels.h>
+++
+++/* Must be called with bh disabled. */
+++static void update_rx_stats(struct wg_peer *peer, size_t len)
+++{
+++	struct pcpu_sw_netstats *tstats =
+++		get_cpu_ptr(peer->device->dev->tstats);
+++
+++	u64_stats_update_begin(&tstats->syncp);
+++	++tstats->rx_packets;
+++	tstats->rx_bytes += len;
+++	peer->rx_bytes += len;
+++	u64_stats_update_end(&tstats->syncp);
+++	put_cpu_ptr(tstats);
+++}
+++
+++#define SKB_TYPE_LE32(skb) (((struct message_header *)(skb)->data)->type)
+++
+++static size_t validate_header_len(struct sk_buff *skb)
+++{
+++	if (unlikely(skb->len < sizeof(struct message_header)))
+++		return 0;
+++	if (SKB_TYPE_LE32(skb) == cpu_to_le32(MESSAGE_DATA) &&
+++	    skb->len >= MESSAGE_MINIMUM_LENGTH)
+++		return sizeof(struct message_data);
+++	if (SKB_TYPE_LE32(skb) == cpu_to_le32(MESSAGE_HANDSHAKE_INITIATION) &&
+++	    skb->len == sizeof(struct message_handshake_initiation))
+++		return sizeof(struct message_handshake_initiation);
+++	if (SKB_TYPE_LE32(skb) == cpu_to_le32(MESSAGE_HANDSHAKE_RESPONSE) &&
+++	    skb->len == sizeof(struct message_handshake_response))
+++		return sizeof(struct message_handshake_response);
+++	if (SKB_TYPE_LE32(skb) == cpu_to_le32(MESSAGE_HANDSHAKE_COOKIE) &&
+++	    skb->len == sizeof(struct message_handshake_cookie))
+++		return sizeof(struct message_handshake_cookie);
+++	return 0;
+++}
+++
+++static int prepare_skb_header(struct sk_buff *skb, struct wg_device *wg)
+++{
+++	size_t data_offset, data_len, header_len;
+++	struct udphdr *udp;
+++
+++	if (unlikely(wg_skb_examine_untrusted_ip_hdr(skb) != skb->protocol ||
+++		     skb_transport_header(skb) < skb->head ||
+++		     (skb_transport_header(skb) + sizeof(struct udphdr)) >
+++			     skb_tail_pointer(skb)))
+++		return -EINVAL; /* Bogus IP header */
+++	udp = udp_hdr(skb);
+++	data_offset = (u8 *)udp - skb->data;
+++	if (unlikely(data_offset > U16_MAX ||
+++		     data_offset + sizeof(struct udphdr) > skb->len))
+++		/* Packet has offset at impossible location or isn't big enough
+++		 * to have UDP fields.
+++		 */
+++		return -EINVAL;
+++	data_len = ntohs(udp->len);
+++	if (unlikely(data_len < sizeof(struct udphdr) ||
+++		     data_len > skb->len - data_offset))
+++		/* UDP packet is reporting too small of a size or lying about
+++		 * its size.
+++		 */
+++		return -EINVAL;
+++	data_len -= sizeof(struct udphdr);
+++	data_offset = (u8 *)udp + sizeof(struct udphdr) - skb->data;
+++	if (unlikely(!pskb_may_pull(skb,
+++				data_offset + sizeof(struct message_header)) ||
+++		     pskb_trim(skb, data_len + data_offset) < 0))
+++		return -EINVAL;
+++	skb_pull(skb, data_offset);
+++	if (unlikely(skb->len != data_len))
+++		/* Final len does not agree with calculated len */
+++		return -EINVAL;
+++	header_len = validate_header_len(skb);
+++	if (unlikely(!header_len))
+++		return -EINVAL;
+++	__skb_push(skb, data_offset);
+++	if (unlikely(!pskb_may_pull(skb, data_offset + header_len)))
+++		return -EINVAL;
+++	__skb_pull(skb, data_offset);
+++	return 0;
+++}
+++
+++static void wg_receive_handshake_packet(struct wg_device *wg,
+++					struct sk_buff *skb)
+++{
+++	enum cookie_mac_state mac_state;
+++	struct wg_peer *peer = NULL;
+++	/* This is global, so that our load calculation applies to the whole
+++	 * system. We don't care about races with it at all.
+++	 */
+++	static u64 last_under_load;
+++	bool packet_needs_cookie;
+++	bool under_load;
+++
+++	if (SKB_TYPE_LE32(skb) == cpu_to_le32(MESSAGE_HANDSHAKE_COOKIE)) {
+++		net_dbg_skb_ratelimited("%s: Receiving cookie response from %pISpfsc\n",
+++					wg->dev->name, skb);
+++		wg_cookie_message_consume(
+++			(struct message_handshake_cookie *)skb->data, wg);
+++		return;
+++	}
+++
+++	under_load = skb_queue_len(&wg->incoming_handshakes) >=
+++		     MAX_QUEUED_INCOMING_HANDSHAKES / 8;
+++	if (under_load)
+++		last_under_load = ktime_get_coarse_boottime_ns();
+++	else if (last_under_load)
+++		under_load = !wg_birthdate_has_expired(last_under_load, 1);
+++	mac_state = wg_cookie_validate_packet(&wg->cookie_checker, skb,
+++					      under_load);
+++	if ((under_load && mac_state == VALID_MAC_WITH_COOKIE) ||
+++	    (!under_load && mac_state == VALID_MAC_BUT_NO_COOKIE)) {
+++		packet_needs_cookie = false;
+++	} else if (under_load && mac_state == VALID_MAC_BUT_NO_COOKIE) {
+++		packet_needs_cookie = true;
+++	} else {
+++		net_dbg_skb_ratelimited("%s: Invalid MAC of handshake, dropping packet from %pISpfsc\n",
+++					wg->dev->name, skb);
+++		return;
+++	}
+++
+++	switch (SKB_TYPE_LE32(skb)) {
+++	case cpu_to_le32(MESSAGE_HANDSHAKE_INITIATION): {
+++		struct message_handshake_initiation *message =
+++			(struct message_handshake_initiation *)skb->data;
+++
+++		if (packet_needs_cookie) {
+++			wg_packet_send_handshake_cookie(wg, skb,
+++							message->sender_index);
+++			return;
+++		}
+++		peer = wg_noise_handshake_consume_initiation(message, wg);
+++		if (unlikely(!peer)) {
+++			net_dbg_skb_ratelimited("%s: Invalid handshake initiation from %pISpfsc\n",
+++						wg->dev->name, skb);
+++			return;
+++		}
+++		wg_socket_set_peer_endpoint_from_skb(peer, skb);
+++		net_dbg_ratelimited("%s: Receiving handshake initiation from peer %llu (%pISpfsc)\n",
+++				    wg->dev->name, peer->internal_id,
+++				    &peer->endpoint.addr);
+++		wg_packet_send_handshake_response(peer);
+++		break;
+++	}
+++	case cpu_to_le32(MESSAGE_HANDSHAKE_RESPONSE): {
+++		struct message_handshake_response *message =
+++			(struct message_handshake_response *)skb->data;
+++
+++		if (packet_needs_cookie) {
+++			wg_packet_send_handshake_cookie(wg, skb,
+++							message->sender_index);
+++			return;
+++		}
+++		peer = wg_noise_handshake_consume_response(message, wg);
+++		if (unlikely(!peer)) {
+++			net_dbg_skb_ratelimited("%s: Invalid handshake response from %pISpfsc\n",
+++						wg->dev->name, skb);
+++			return;
+++		}
+++		wg_socket_set_peer_endpoint_from_skb(peer, skb);
+++		net_dbg_ratelimited("%s: Receiving handshake response from peer %llu (%pISpfsc)\n",
+++				    wg->dev->name, peer->internal_id,
+++				    &peer->endpoint.addr);
+++		if (wg_noise_handshake_begin_session(&peer->handshake,
+++						     &peer->keypairs)) {
+++			wg_timers_session_derived(peer);
+++			wg_timers_handshake_complete(peer);
+++			/* Calling this function will either send any existing
+++			 * packets in the queue and not send a keepalive, which
+++			 * is the best case, Or, if there's nothing in the
+++			 * queue, it will send a keepalive, in order to give
+++			 * immediate confirmation of the session.
+++			 */
+++			wg_packet_send_keepalive(peer);
+++		}
+++		break;
+++	}
+++	}
+++
+++	if (unlikely(!peer)) {
+++		WARN(1, "Somehow a wrong type of packet wound up in the handshake queue!\n");
+++		return;
+++	}
+++
+++	local_bh_disable();
+++	update_rx_stats(peer, skb->len);
+++	local_bh_enable();
+++
+++	wg_timers_any_authenticated_packet_received(peer);
+++	wg_timers_any_authenticated_packet_traversal(peer);
+++	wg_peer_put(peer);
+++}
+++
+++void wg_packet_handshake_receive_worker(struct work_struct *work)
+++{
+++	struct wg_device *wg = container_of(work, struct multicore_worker,
+++					    work)->ptr;
+++	struct sk_buff *skb;
+++
+++	while ((skb = skb_dequeue(&wg->incoming_handshakes)) != NULL) {
+++		wg_receive_handshake_packet(wg, skb);
+++		dev_kfree_skb(skb);
+++		cond_resched();
+++	}
+++}
+++
+++static void keep_key_fresh(struct wg_peer *peer)
+++{
+++	struct noise_keypair *keypair;
+++	bool send = false;
+++
+++	if (peer->sent_lastminute_handshake)
+++		return;
+++
+++	rcu_read_lock_bh();
+++	keypair = rcu_dereference_bh(peer->keypairs.current_keypair);
+++	if (likely(keypair && READ_ONCE(keypair->sending.is_valid)) &&
+++	    keypair->i_am_the_initiator &&
+++	    unlikely(wg_birthdate_has_expired(keypair->sending.birthdate,
+++			REJECT_AFTER_TIME - KEEPALIVE_TIMEOUT - REKEY_TIMEOUT)))
+++		send = true;
+++	rcu_read_unlock_bh();
+++
+++	if (send) {
+++		peer->sent_lastminute_handshake = true;
+++		wg_packet_send_queued_handshake_initiation(peer, false);
+++	}
+++}
+++
+++static bool decrypt_packet(struct sk_buff *skb, struct noise_symmetric_key *key)
+++{
+++	struct scatterlist sg[MAX_SKB_FRAGS + 8];
+++	struct sk_buff *trailer;
+++	unsigned int offset;
+++	int num_frags;
+++
+++	if (unlikely(!key))
+++		return false;
+++
+++	if (unlikely(!READ_ONCE(key->is_valid) ||
+++		  wg_birthdate_has_expired(key->birthdate, REJECT_AFTER_TIME) ||
+++		  key->counter.receive.counter >= REJECT_AFTER_MESSAGES)) {
+++		WRITE_ONCE(key->is_valid, false);
+++		return false;
+++	}
+++
+++	PACKET_CB(skb)->nonce =
+++		le64_to_cpu(((struct message_data *)skb->data)->counter);
+++
+++	/* We ensure that the network header is part of the packet before we
+++	 * call skb_cow_data, so that there's no chance that data is removed
+++	 * from the skb, so that later we can extract the original endpoint.
+++	 */
+++	offset = skb->data - skb_network_header(skb);
+++	skb_push(skb, offset);
+++	num_frags = skb_cow_data(skb, 0, &trailer);
+++	offset += sizeof(struct message_data);
+++	skb_pull(skb, offset);
+++	if (unlikely(num_frags < 0 || num_frags > ARRAY_SIZE(sg)))
+++		return false;
+++
+++	sg_init_table(sg, num_frags);
+++	if (skb_to_sgvec(skb, sg, 0, skb->len) <= 0)
+++		return false;
+++
+++	if (!chacha20poly1305_decrypt_sg_inplace(sg, skb->len, NULL, 0,
+++					         PACKET_CB(skb)->nonce,
+++						 key->key))
+++		return false;
+++
+++	/* Another ugly situation of pushing and pulling the header so as to
+++	 * keep endpoint information intact.
+++	 */
+++	skb_push(skb, offset);
+++	if (pskb_trim(skb, skb->len - noise_encrypted_len(0)))
+++		return false;
+++	skb_pull(skb, offset);
+++
+++	return true;
+++}
+++
+++/* This is RFC6479, a replay detection bitmap algorithm that avoids bitshifts */
+++static bool counter_validate(union noise_counter *counter, u64 their_counter)
+++{
+++	unsigned long index, index_current, top, i;
+++	bool ret = false;
+++
+++	spin_lock_bh(&counter->receive.lock);
+++
+++	if (unlikely(counter->receive.counter >= REJECT_AFTER_MESSAGES + 1 ||
+++		     their_counter >= REJECT_AFTER_MESSAGES))
+++		goto out;
+++
+++	++their_counter;
+++
+++	if (unlikely((COUNTER_WINDOW_SIZE + their_counter) <
+++		     counter->receive.counter))
+++		goto out;
+++
+++	index = their_counter >> ilog2(BITS_PER_LONG);
+++
+++	if (likely(their_counter > counter->receive.counter)) {
+++		index_current = counter->receive.counter >> ilog2(BITS_PER_LONG);
+++		top = min_t(unsigned long, index - index_current,
+++			    COUNTER_BITS_TOTAL / BITS_PER_LONG);
+++		for (i = 1; i <= top; ++i)
+++			counter->receive.backtrack[(i + index_current) &
+++				((COUNTER_BITS_TOTAL / BITS_PER_LONG) - 1)] = 0;
+++		counter->receive.counter = their_counter;
+++	}
+++
+++	index &= (COUNTER_BITS_TOTAL / BITS_PER_LONG) - 1;
+++	ret = !test_and_set_bit(their_counter & (BITS_PER_LONG - 1),
+++				&counter->receive.backtrack[index]);
+++
+++out:
+++	spin_unlock_bh(&counter->receive.lock);
+++	return ret;
+++}
+++
+++#include "selftest/counter.c"
+++
+++static void wg_packet_consume_data_done(struct wg_peer *peer,
+++					struct sk_buff *skb,
+++					struct endpoint *endpoint)
+++{
+++	struct net_device *dev = peer->device->dev;
+++	unsigned int len, len_before_trim;
+++	struct wg_peer *routed_peer;
+++
+++	wg_socket_set_peer_endpoint(peer, endpoint);
+++
+++	if (unlikely(wg_noise_received_with_keypair(&peer->keypairs,
+++						    PACKET_CB(skb)->keypair))) {
+++		wg_timers_handshake_complete(peer);
+++		wg_packet_send_staged_packets(peer);
+++	}
+++
+++	keep_key_fresh(peer);
+++
+++	wg_timers_any_authenticated_packet_received(peer);
+++	wg_timers_any_authenticated_packet_traversal(peer);
+++
+++	/* A packet with length 0 is a keepalive packet */
+++	if (unlikely(!skb->len)) {
+++		update_rx_stats(peer, message_data_len(0));
+++		net_dbg_ratelimited("%s: Receiving keepalive packet from peer %llu (%pISpfsc)\n",
+++				    dev->name, peer->internal_id,
+++				    &peer->endpoint.addr);
+++		goto packet_processed;
+++	}
+++
+++	wg_timers_data_received(peer);
+++
+++	if (unlikely(skb_network_header(skb) < skb->head))
+++		goto dishonest_packet_size;
+++	if (unlikely(!(pskb_network_may_pull(skb, sizeof(struct iphdr)) &&
+++		       (ip_hdr(skb)->version == 4 ||
+++			(ip_hdr(skb)->version == 6 &&
+++			 pskb_network_may_pull(skb, sizeof(struct ipv6hdr)))))))
+++		goto dishonest_packet_type;
+++
+++	skb->dev = dev;
+++	/* We've already verified the Poly1305 auth tag, which means this packet
+++	 * was not modified in transit. We can therefore tell the networking
+++	 * stack that all checksums of every layer of encapsulation have already
+++	 * been checked "by the hardware" and therefore is unneccessary to check
+++	 * again in software.
+++	 */
+++	skb->ip_summed = CHECKSUM_UNNECESSARY;
+++	skb->csum_level = ~0; /* All levels */
+++	skb->protocol = wg_skb_examine_untrusted_ip_hdr(skb);
+++	if (skb->protocol == htons(ETH_P_IP)) {
+++		len = ntohs(ip_hdr(skb)->tot_len);
+++		if (unlikely(len < sizeof(struct iphdr)))
+++			goto dishonest_packet_size;
+++		if (INET_ECN_is_ce(PACKET_CB(skb)->ds))
+++			IP_ECN_set_ce(ip_hdr(skb));
+++	} else if (skb->protocol == htons(ETH_P_IPV6)) {
+++		len = ntohs(ipv6_hdr(skb)->payload_len) +
+++		      sizeof(struct ipv6hdr);
+++		if (INET_ECN_is_ce(PACKET_CB(skb)->ds))
+++			IP6_ECN_set_ce(skb, ipv6_hdr(skb));
+++	} else {
+++		goto dishonest_packet_type;
+++	}
+++
+++	if (unlikely(len > skb->len))
+++		goto dishonest_packet_size;
+++	len_before_trim = skb->len;
+++	if (unlikely(pskb_trim(skb, len)))
+++		goto packet_processed;
+++
+++	routed_peer = wg_allowedips_lookup_src(&peer->device->peer_allowedips,
+++					       skb);
+++	wg_peer_put(routed_peer); /* We don't need the extra reference. */
+++
+++	if (unlikely(routed_peer != peer))
+++		goto dishonest_packet_peer;
+++
+++	if (unlikely(napi_gro_receive(&peer->napi, skb) == GRO_DROP)) {
+++		++dev->stats.rx_dropped;
+++		net_dbg_ratelimited("%s: Failed to give packet to userspace from peer %llu (%pISpfsc)\n",
+++				    dev->name, peer->internal_id,
+++				    &peer->endpoint.addr);
+++	} else {
+++		update_rx_stats(peer, message_data_len(len_before_trim));
+++	}
+++	return;
+++
+++dishonest_packet_peer:
+++	net_dbg_skb_ratelimited("%s: Packet has unallowed src IP (%pISc) from peer %llu (%pISpfsc)\n",
+++				dev->name, skb, peer->internal_id,
+++				&peer->endpoint.addr);
+++	++dev->stats.rx_errors;
+++	++dev->stats.rx_frame_errors;
+++	goto packet_processed;
+++dishonest_packet_type:
+++	net_dbg_ratelimited("%s: Packet is neither ipv4 nor ipv6 from peer %llu (%pISpfsc)\n",
+++			    dev->name, peer->internal_id, &peer->endpoint.addr);
+++	++dev->stats.rx_errors;
+++	++dev->stats.rx_frame_errors;
+++	goto packet_processed;
+++dishonest_packet_size:
+++	net_dbg_ratelimited("%s: Packet has incorrect size from peer %llu (%pISpfsc)\n",
+++			    dev->name, peer->internal_id, &peer->endpoint.addr);
+++	++dev->stats.rx_errors;
+++	++dev->stats.rx_length_errors;
+++	goto packet_processed;
+++packet_processed:
+++	dev_kfree_skb(skb);
+++}
+++
+++int wg_packet_rx_poll(struct napi_struct *napi, int budget)
+++{
+++	struct wg_peer *peer = container_of(napi, struct wg_peer, napi);
+++	struct crypt_queue *queue = &peer->rx_queue;
+++	struct noise_keypair *keypair;
+++	struct endpoint endpoint;
+++	enum packet_state state;
+++	struct sk_buff *skb;
+++	int work_done = 0;
+++	bool free;
+++
+++	if (unlikely(budget <= 0))
+++		return 0;
+++
+++	while ((skb = __ptr_ring_peek(&queue->ring)) != NULL &&
+++	       (state = atomic_read_acquire(&PACKET_CB(skb)->state)) !=
+++		       PACKET_STATE_UNCRYPTED) {
+++		__ptr_ring_discard_one(&queue->ring);
+++		peer = PACKET_PEER(skb);
+++		keypair = PACKET_CB(skb)->keypair;
+++		free = true;
+++
+++		if (unlikely(state != PACKET_STATE_CRYPTED))
+++			goto next;
+++
+++		if (unlikely(!counter_validate(&keypair->receiving.counter,
+++					       PACKET_CB(skb)->nonce))) {
+++			net_dbg_ratelimited("%s: Packet has invalid nonce %llu (max %llu)\n",
+++					    peer->device->dev->name,
+++					    PACKET_CB(skb)->nonce,
+++					    keypair->receiving.counter.receive.counter);
+++			goto next;
+++		}
+++
+++		if (unlikely(wg_socket_endpoint_from_skb(&endpoint, skb)))
+++			goto next;
+++
+++		wg_reset_packet(skb);
+++		wg_packet_consume_data_done(peer, skb, &endpoint);
+++		free = false;
+++
+++next:
+++		wg_noise_keypair_put(keypair, false);
+++		wg_peer_put(peer);
+++		if (unlikely(free))
+++			dev_kfree_skb(skb);
+++
+++		if (++work_done >= budget)
+++			break;
+++	}
+++
+++	if (work_done < budget)
+++		napi_complete_done(napi, work_done);
+++
+++	return work_done;
+++}
+++
+++void wg_packet_decrypt_worker(struct work_struct *work)
+++{
+++	struct crypt_queue *queue = container_of(work, struct multicore_worker,
+++						 work)->ptr;
+++	struct sk_buff *skb;
+++
+++	while ((skb = ptr_ring_consume_bh(&queue->ring)) != NULL) {
+++		enum packet_state state = likely(decrypt_packet(skb,
+++				&PACKET_CB(skb)->keypair->receiving)) ?
+++				PACKET_STATE_CRYPTED : PACKET_STATE_DEAD;
+++		wg_queue_enqueue_per_peer_napi(skb, state);
+++	}
+++}
+++
+++static void wg_packet_consume_data(struct wg_device *wg, struct sk_buff *skb)
+++{
+++	__le32 idx = ((struct message_data *)skb->data)->key_idx;
+++	struct wg_peer *peer = NULL;
+++	int ret;
+++
+++	rcu_read_lock_bh();
+++	PACKET_CB(skb)->keypair =
+++		(struct noise_keypair *)wg_index_hashtable_lookup(
+++			wg->index_hashtable, INDEX_HASHTABLE_KEYPAIR, idx,
+++			&peer);
+++	if (unlikely(!wg_noise_keypair_get(PACKET_CB(skb)->keypair)))
+++		goto err_keypair;
+++
+++	if (unlikely(READ_ONCE(peer->is_dead)))
+++		goto err;
+++
+++	ret = wg_queue_enqueue_per_device_and_peer(&wg->decrypt_queue,
+++						   &peer->rx_queue, skb,
+++						   wg->packet_crypt_wq,
+++						   &wg->decrypt_queue.last_cpu);
+++	if (unlikely(ret == -EPIPE))
+++		wg_queue_enqueue_per_peer_napi(skb, PACKET_STATE_DEAD);
+++	if (likely(!ret || ret == -EPIPE)) {
+++		rcu_read_unlock_bh();
+++		return;
+++	}
+++err:
+++	wg_noise_keypair_put(PACKET_CB(skb)->keypair, false);
+++err_keypair:
+++	rcu_read_unlock_bh();
+++	wg_peer_put(peer);
+++	dev_kfree_skb(skb);
+++}
+++
+++void wg_packet_receive(struct wg_device *wg, struct sk_buff *skb)
+++{
+++	if (unlikely(prepare_skb_header(skb, wg) < 0))
+++		goto err;
+++	switch (SKB_TYPE_LE32(skb)) {
+++	case cpu_to_le32(MESSAGE_HANDSHAKE_INITIATION):
+++	case cpu_to_le32(MESSAGE_HANDSHAKE_RESPONSE):
+++	case cpu_to_le32(MESSAGE_HANDSHAKE_COOKIE): {
+++		int cpu;
+++
+++		if (skb_queue_len(&wg->incoming_handshakes) >
+++			    MAX_QUEUED_INCOMING_HANDSHAKES ||
+++		    unlikely(!rng_is_initialized())) {
+++			net_dbg_skb_ratelimited("%s: Dropping handshake packet from %pISpfsc\n",
+++						wg->dev->name, skb);
+++			goto err;
+++		}
+++		skb_queue_tail(&wg->incoming_handshakes, skb);
+++		/* Queues up a call to packet_process_queued_handshake_
+++		 * packets(skb):
+++		 */
+++		cpu = wg_cpumask_next_online(&wg->incoming_handshake_cpu);
+++		queue_work_on(cpu, wg->handshake_receive_wq,
+++			&per_cpu_ptr(wg->incoming_handshakes_worker, cpu)->work);
+++		break;
+++	}
+++	case cpu_to_le32(MESSAGE_DATA):
+++		PACKET_CB(skb)->ds = ip_tunnel_get_dsfield(ip_hdr(skb), skb);
+++		wg_packet_consume_data(wg, skb);
+++		break;
+++	default:
+++		net_dbg_skb_ratelimited("%s: Invalid packet from %pISpfsc\n",
+++					wg->dev->name, skb);
+++		goto err;
+++	}
+++	return;
+++
+++err:
+++	dev_kfree_skb(skb);
+++}
++--- /dev/null
+++++ b/drivers/net/wireguard/selftest/allowedips.c
++@@ -0,0 +1,683 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ *
+++ * This contains some basic static unit tests for the allowedips data structure.
+++ * It also has two additional modes that are disabled and meant to be used by
+++ * folks directly playing with this file. If you define the macro
+++ * DEBUG_PRINT_TRIE_GRAPHVIZ to be 1, then every time there's a full tree in
+++ * memory, it will be printed out as KERN_DEBUG in a format that can be passed
+++ * to graphviz (the dot command) to visualize it. If you define the macro
+++ * DEBUG_RANDOM_TRIE to be 1, then there will be an extremely costly set of
+++ * randomized tests done against a trivial implementation, which may take
+++ * upwards of a half-hour to complete. There's no set of users who should be
+++ * enabling these, and the only developers that should go anywhere near these
+++ * nobs are the ones who are reading this comment.
+++ */
+++
+++#ifdef DEBUG
+++
+++#include <linux/siphash.h>
+++
+++static __init void swap_endian_and_apply_cidr(u8 *dst, const u8 *src, u8 bits,
+++					      u8 cidr)
+++{
+++	swap_endian(dst, src, bits);
+++	memset(dst + (cidr + 7) / 8, 0, bits / 8 - (cidr + 7) / 8);
+++	if (cidr)
+++		dst[(cidr + 7) / 8 - 1] &= ~0U << ((8 - (cidr % 8)) % 8);
+++}
+++
+++static __init void print_node(struct allowedips_node *node, u8 bits)
+++{
+++	char *fmt_connection = KERN_DEBUG "\t\"%p/%d\" -> \"%p/%d\";\n";
+++	char *fmt_declaration = KERN_DEBUG
+++		"\t\"%p/%d\"[style=%s, color=\"#%06x\"];\n";
+++	char *style = "dotted";
+++	u8 ip1[16], ip2[16];
+++	u32 color = 0;
+++
+++	if (bits == 32) {
+++		fmt_connection = KERN_DEBUG "\t\"%pI4/%d\" -> \"%pI4/%d\";\n";
+++		fmt_declaration = KERN_DEBUG
+++			"\t\"%pI4/%d\"[style=%s, color=\"#%06x\"];\n";
+++	} else if (bits == 128) {
+++		fmt_connection = KERN_DEBUG "\t\"%pI6/%d\" -> \"%pI6/%d\";\n";
+++		fmt_declaration = KERN_DEBUG
+++			"\t\"%pI6/%d\"[style=%s, color=\"#%06x\"];\n";
+++	}
+++	if (node->peer) {
+++		hsiphash_key_t key = { { 0 } };
+++
+++		memcpy(&key, &node->peer, sizeof(node->peer));
+++		color = hsiphash_1u32(0xdeadbeef, &key) % 200 << 16 |
+++			hsiphash_1u32(0xbabecafe, &key) % 200 << 8 |
+++			hsiphash_1u32(0xabad1dea, &key) % 200;
+++		style = "bold";
+++	}
+++	swap_endian_and_apply_cidr(ip1, node->bits, bits, node->cidr);
+++	printk(fmt_declaration, ip1, node->cidr, style, color);
+++	if (node->bit[0]) {
+++		swap_endian_and_apply_cidr(ip2,
+++				rcu_dereference_raw(node->bit[0])->bits, bits,
+++				node->cidr);
+++		printk(fmt_connection, ip1, node->cidr, ip2,
+++		       rcu_dereference_raw(node->bit[0])->cidr);
+++		print_node(rcu_dereference_raw(node->bit[0]), bits);
+++	}
+++	if (node->bit[1]) {
+++		swap_endian_and_apply_cidr(ip2,
+++				rcu_dereference_raw(node->bit[1])->bits,
+++				bits, node->cidr);
+++		printk(fmt_connection, ip1, node->cidr, ip2,
+++		       rcu_dereference_raw(node->bit[1])->cidr);
+++		print_node(rcu_dereference_raw(node->bit[1]), bits);
+++	}
+++}
+++
+++static __init void print_tree(struct allowedips_node __rcu *top, u8 bits)
+++{
+++	printk(KERN_DEBUG "digraph trie {\n");
+++	print_node(rcu_dereference_raw(top), bits);
+++	printk(KERN_DEBUG "}\n");
+++}
+++
+++enum {
+++	NUM_PEERS = 2000,
+++	NUM_RAND_ROUTES = 400,
+++	NUM_MUTATED_ROUTES = 100,
+++	NUM_QUERIES = NUM_RAND_ROUTES * NUM_MUTATED_ROUTES * 30
+++};
+++
+++struct horrible_allowedips {
+++	struct hlist_head head;
+++};
+++
+++struct horrible_allowedips_node {
+++	struct hlist_node table;
+++	union nf_inet_addr ip;
+++	union nf_inet_addr mask;
+++	u8 ip_version;
+++	void *value;
+++};
+++
+++static __init void horrible_allowedips_init(struct horrible_allowedips *table)
+++{
+++	INIT_HLIST_HEAD(&table->head);
+++}
+++
+++static __init void horrible_allowedips_free(struct horrible_allowedips *table)
+++{
+++	struct horrible_allowedips_node *node;
+++	struct hlist_node *h;
+++
+++	hlist_for_each_entry_safe(node, h, &table->head, table) {
+++		hlist_del(&node->table);
+++		kfree(node);
+++	}
+++}
+++
+++static __init inline union nf_inet_addr horrible_cidr_to_mask(u8 cidr)
+++{
+++	union nf_inet_addr mask;
+++
+++	memset(&mask, 0x00, 128 / 8);
+++	memset(&mask, 0xff, cidr / 8);
+++	if (cidr % 32)
+++		mask.all[cidr / 32] = (__force u32)htonl(
+++			(0xFFFFFFFFUL << (32 - (cidr % 32))) & 0xFFFFFFFFUL);
+++	return mask;
+++}
+++
+++static __init inline u8 horrible_mask_to_cidr(union nf_inet_addr subnet)
+++{
+++	return hweight32(subnet.all[0]) + hweight32(subnet.all[1]) +
+++	       hweight32(subnet.all[2]) + hweight32(subnet.all[3]);
+++}
+++
+++static __init inline void
+++horrible_mask_self(struct horrible_allowedips_node *node)
+++{
+++	if (node->ip_version == 4) {
+++		node->ip.ip &= node->mask.ip;
+++	} else if (node->ip_version == 6) {
+++		node->ip.ip6[0] &= node->mask.ip6[0];
+++		node->ip.ip6[1] &= node->mask.ip6[1];
+++		node->ip.ip6[2] &= node->mask.ip6[2];
+++		node->ip.ip6[3] &= node->mask.ip6[3];
+++	}
+++}
+++
+++static __init inline bool
+++horrible_match_v4(const struct horrible_allowedips_node *node,
+++		  struct in_addr *ip)
+++{
+++	return (ip->s_addr & node->mask.ip) == node->ip.ip;
+++}
+++
+++static __init inline bool
+++horrible_match_v6(const struct horrible_allowedips_node *node,
+++		  struct in6_addr *ip)
+++{
+++	return (ip->in6_u.u6_addr32[0] & node->mask.ip6[0]) ==
+++		       node->ip.ip6[0] &&
+++	       (ip->in6_u.u6_addr32[1] & node->mask.ip6[1]) ==
+++		       node->ip.ip6[1] &&
+++	       (ip->in6_u.u6_addr32[2] & node->mask.ip6[2]) ==
+++		       node->ip.ip6[2] &&
+++	       (ip->in6_u.u6_addr32[3] & node->mask.ip6[3]) == node->ip.ip6[3];
+++}
+++
+++static __init void
+++horrible_insert_ordered(struct horrible_allowedips *table,
+++			struct horrible_allowedips_node *node)
+++{
+++	struct horrible_allowedips_node *other = NULL, *where = NULL;
+++	u8 my_cidr = horrible_mask_to_cidr(node->mask);
+++
+++	hlist_for_each_entry(other, &table->head, table) {
+++		if (!memcmp(&other->mask, &node->mask,
+++			    sizeof(union nf_inet_addr)) &&
+++		    !memcmp(&other->ip, &node->ip,
+++			    sizeof(union nf_inet_addr)) &&
+++		    other->ip_version == node->ip_version) {
+++			other->value = node->value;
+++			kfree(node);
+++			return;
+++		}
+++		where = other;
+++		if (horrible_mask_to_cidr(other->mask) <= my_cidr)
+++			break;
+++	}
+++	if (!other && !where)
+++		hlist_add_head(&node->table, &table->head);
+++	else if (!other)
+++		hlist_add_behind(&node->table, &where->table);
+++	else
+++		hlist_add_before(&node->table, &where->table);
+++}
+++
+++static __init int
+++horrible_allowedips_insert_v4(struct horrible_allowedips *table,
+++			      struct in_addr *ip, u8 cidr, void *value)
+++{
+++	struct horrible_allowedips_node *node = kzalloc(sizeof(*node),
+++							GFP_KERNEL);
+++
+++	if (unlikely(!node))
+++		return -ENOMEM;
+++	node->ip.in = *ip;
+++	node->mask = horrible_cidr_to_mask(cidr);
+++	node->ip_version = 4;
+++	node->value = value;
+++	horrible_mask_self(node);
+++	horrible_insert_ordered(table, node);
+++	return 0;
+++}
+++
+++static __init int
+++horrible_allowedips_insert_v6(struct horrible_allowedips *table,
+++			      struct in6_addr *ip, u8 cidr, void *value)
+++{
+++	struct horrible_allowedips_node *node = kzalloc(sizeof(*node),
+++							GFP_KERNEL);
+++
+++	if (unlikely(!node))
+++		return -ENOMEM;
+++	node->ip.in6 = *ip;
+++	node->mask = horrible_cidr_to_mask(cidr);
+++	node->ip_version = 6;
+++	node->value = value;
+++	horrible_mask_self(node);
+++	horrible_insert_ordered(table, node);
+++	return 0;
+++}
+++
+++static __init void *
+++horrible_allowedips_lookup_v4(struct horrible_allowedips *table,
+++			      struct in_addr *ip)
+++{
+++	struct horrible_allowedips_node *node;
+++	void *ret = NULL;
+++
+++	hlist_for_each_entry(node, &table->head, table) {
+++		if (node->ip_version != 4)
+++			continue;
+++		if (horrible_match_v4(node, ip)) {
+++			ret = node->value;
+++			break;
+++		}
+++	}
+++	return ret;
+++}
+++
+++static __init void *
+++horrible_allowedips_lookup_v6(struct horrible_allowedips *table,
+++			      struct in6_addr *ip)
+++{
+++	struct horrible_allowedips_node *node;
+++	void *ret = NULL;
+++
+++	hlist_for_each_entry(node, &table->head, table) {
+++		if (node->ip_version != 6)
+++			continue;
+++		if (horrible_match_v6(node, ip)) {
+++			ret = node->value;
+++			break;
+++		}
+++	}
+++	return ret;
+++}
+++
+++static __init bool randomized_test(void)
+++{
+++	unsigned int i, j, k, mutate_amount, cidr;
+++	u8 ip[16], mutate_mask[16], mutated[16];
+++	struct wg_peer **peers, *peer;
+++	struct horrible_allowedips h;
+++	DEFINE_MUTEX(mutex);
+++	struct allowedips t;
+++	bool ret = false;
+++
+++	mutex_init(&mutex);
+++
+++	wg_allowedips_init(&t);
+++	horrible_allowedips_init(&h);
+++
+++	peers = kcalloc(NUM_PEERS, sizeof(*peers), GFP_KERNEL);
+++	if (unlikely(!peers)) {
+++		pr_err("allowedips random self-test malloc: FAIL\n");
+++		goto free;
+++	}
+++	for (i = 0; i < NUM_PEERS; ++i) {
+++		peers[i] = kzalloc(sizeof(*peers[i]), GFP_KERNEL);
+++		if (unlikely(!peers[i])) {
+++			pr_err("allowedips random self-test malloc: FAIL\n");
+++			goto free;
+++		}
+++		kref_init(&peers[i]->refcount);
+++	}
+++
+++	mutex_lock(&mutex);
+++
+++	for (i = 0; i < NUM_RAND_ROUTES; ++i) {
+++		prandom_bytes(ip, 4);
+++		cidr = prandom_u32_max(32) + 1;
+++		peer = peers[prandom_u32_max(NUM_PEERS)];
+++		if (wg_allowedips_insert_v4(&t, (struct in_addr *)ip, cidr,
+++					    peer, &mutex) < 0) {
+++			pr_err("allowedips random self-test malloc: FAIL\n");
+++			goto free_locked;
+++		}
+++		if (horrible_allowedips_insert_v4(&h, (struct in_addr *)ip,
+++						  cidr, peer) < 0) {
+++			pr_err("allowedips random self-test malloc: FAIL\n");
+++			goto free_locked;
+++		}
+++		for (j = 0; j < NUM_MUTATED_ROUTES; ++j) {
+++			memcpy(mutated, ip, 4);
+++			prandom_bytes(mutate_mask, 4);
+++			mutate_amount = prandom_u32_max(32);
+++			for (k = 0; k < mutate_amount / 8; ++k)
+++				mutate_mask[k] = 0xff;
+++			mutate_mask[k] = 0xff
+++					 << ((8 - (mutate_amount % 8)) % 8);
+++			for (; k < 4; ++k)
+++				mutate_mask[k] = 0;
+++			for (k = 0; k < 4; ++k)
+++				mutated[k] = (mutated[k] & mutate_mask[k]) |
+++					     (~mutate_mask[k] &
+++					      prandom_u32_max(256));
+++			cidr = prandom_u32_max(32) + 1;
+++			peer = peers[prandom_u32_max(NUM_PEERS)];
+++			if (wg_allowedips_insert_v4(&t,
+++						    (struct in_addr *)mutated,
+++						    cidr, peer, &mutex) < 0) {
+++				pr_err("allowedips random malloc: FAIL\n");
+++				goto free_locked;
+++			}
+++			if (horrible_allowedips_insert_v4(&h,
+++				(struct in_addr *)mutated, cidr, peer)) {
+++				pr_err("allowedips random self-test malloc: FAIL\n");
+++				goto free_locked;
+++			}
+++		}
+++	}
+++
+++	for (i = 0; i < NUM_RAND_ROUTES; ++i) {
+++		prandom_bytes(ip, 16);
+++		cidr = prandom_u32_max(128) + 1;
+++		peer = peers[prandom_u32_max(NUM_PEERS)];
+++		if (wg_allowedips_insert_v6(&t, (struct in6_addr *)ip, cidr,
+++					    peer, &mutex) < 0) {
+++			pr_err("allowedips random self-test malloc: FAIL\n");
+++			goto free_locked;
+++		}
+++		if (horrible_allowedips_insert_v6(&h, (struct in6_addr *)ip,
+++						  cidr, peer) < 0) {
+++			pr_err("allowedips random self-test malloc: FAIL\n");
+++			goto free_locked;
+++		}
+++		for (j = 0; j < NUM_MUTATED_ROUTES; ++j) {
+++			memcpy(mutated, ip, 16);
+++			prandom_bytes(mutate_mask, 16);
+++			mutate_amount = prandom_u32_max(128);
+++			for (k = 0; k < mutate_amount / 8; ++k)
+++				mutate_mask[k] = 0xff;
+++			mutate_mask[k] = 0xff
+++					 << ((8 - (mutate_amount % 8)) % 8);
+++			for (; k < 4; ++k)
+++				mutate_mask[k] = 0;
+++			for (k = 0; k < 4; ++k)
+++				mutated[k] = (mutated[k] & mutate_mask[k]) |
+++					     (~mutate_mask[k] &
+++					      prandom_u32_max(256));
+++			cidr = prandom_u32_max(128) + 1;
+++			peer = peers[prandom_u32_max(NUM_PEERS)];
+++			if (wg_allowedips_insert_v6(&t,
+++						    (struct in6_addr *)mutated,
+++						    cidr, peer, &mutex) < 0) {
+++				pr_err("allowedips random self-test malloc: FAIL\n");
+++				goto free_locked;
+++			}
+++			if (horrible_allowedips_insert_v6(
+++				    &h, (struct in6_addr *)mutated, cidr,
+++				    peer)) {
+++				pr_err("allowedips random self-test malloc: FAIL\n");
+++				goto free_locked;
+++			}
+++		}
+++	}
+++
+++	mutex_unlock(&mutex);
+++
+++	if (IS_ENABLED(DEBUG_PRINT_TRIE_GRAPHVIZ)) {
+++		print_tree(t.root4, 32);
+++		print_tree(t.root6, 128);
+++	}
+++
+++	for (i = 0; i < NUM_QUERIES; ++i) {
+++		prandom_bytes(ip, 4);
+++		if (lookup(t.root4, 32, ip) !=
+++		    horrible_allowedips_lookup_v4(&h, (struct in_addr *)ip)) {
+++			pr_err("allowedips random self-test: FAIL\n");
+++			goto free;
+++		}
+++	}
+++
+++	for (i = 0; i < NUM_QUERIES; ++i) {
+++		prandom_bytes(ip, 16);
+++		if (lookup(t.root6, 128, ip) !=
+++		    horrible_allowedips_lookup_v6(&h, (struct in6_addr *)ip)) {
+++			pr_err("allowedips random self-test: FAIL\n");
+++			goto free;
+++		}
+++	}
+++	ret = true;
+++
+++free:
+++	mutex_lock(&mutex);
+++free_locked:
+++	wg_allowedips_free(&t, &mutex);
+++	mutex_unlock(&mutex);
+++	horrible_allowedips_free(&h);
+++	if (peers) {
+++		for (i = 0; i < NUM_PEERS; ++i)
+++			kfree(peers[i]);
+++	}
+++	kfree(peers);
+++	return ret;
+++}
+++
+++static __init inline struct in_addr *ip4(u8 a, u8 b, u8 c, u8 d)
+++{
+++	static struct in_addr ip;
+++	u8 *split = (u8 *)&ip;
+++
+++	split[0] = a;
+++	split[1] = b;
+++	split[2] = c;
+++	split[3] = d;
+++	return &ip;
+++}
+++
+++static __init inline struct in6_addr *ip6(u32 a, u32 b, u32 c, u32 d)
+++{
+++	static struct in6_addr ip;
+++	__be32 *split = (__be32 *)&ip;
+++
+++	split[0] = cpu_to_be32(a);
+++	split[1] = cpu_to_be32(b);
+++	split[2] = cpu_to_be32(c);
+++	split[3] = cpu_to_be32(d);
+++	return &ip;
+++}
+++
+++static __init struct wg_peer *init_peer(void)
+++{
+++	struct wg_peer *peer = kzalloc(sizeof(*peer), GFP_KERNEL);
+++
+++	if (!peer)
+++		return NULL;
+++	kref_init(&peer->refcount);
+++	INIT_LIST_HEAD(&peer->allowedips_list);
+++	return peer;
+++}
+++
+++#define insert(version, mem, ipa, ipb, ipc, ipd, cidr)                       \
+++	wg_allowedips_insert_v##version(&t, ip##version(ipa, ipb, ipc, ipd), \
+++					cidr, mem, &mutex)
+++
+++#define maybe_fail() do {                                               \
+++		++i;                                                    \
+++		if (!_s) {                                              \
+++			pr_info("allowedips self-test %zu: FAIL\n", i); \
+++			success = false;                                \
+++		}                                                       \
+++	} while (0)
+++
+++#define test(version, mem, ipa, ipb, ipc, ipd) do {                          \
+++		bool _s = lookup(t.root##version, (version) == 4 ? 32 : 128, \
+++				 ip##version(ipa, ipb, ipc, ipd)) == (mem);  \
+++		maybe_fail();                                                \
+++	} while (0)
+++
+++#define test_negative(version, mem, ipa, ipb, ipc, ipd) do {                 \
+++		bool _s = lookup(t.root##version, (version) == 4 ? 32 : 128, \
+++				 ip##version(ipa, ipb, ipc, ipd)) != (mem);  \
+++		maybe_fail();                                                \
+++	} while (0)
+++
+++#define test_boolean(cond) do {   \
+++		bool _s = (cond); \
+++		maybe_fail();     \
+++	} while (0)
+++
+++bool __init wg_allowedips_selftest(void)
+++{
+++	bool found_a = false, found_b = false, found_c = false, found_d = false,
+++	     found_e = false, found_other = false;
+++	struct wg_peer *a = init_peer(), *b = init_peer(), *c = init_peer(),
+++		       *d = init_peer(), *e = init_peer(), *f = init_peer(),
+++		       *g = init_peer(), *h = init_peer();
+++	struct allowedips_node *iter_node;
+++	bool success = false;
+++	struct allowedips t;
+++	DEFINE_MUTEX(mutex);
+++	struct in6_addr ip;
+++	size_t i = 0, count = 0;
+++	__be64 part;
+++
+++	mutex_init(&mutex);
+++	mutex_lock(&mutex);
+++	wg_allowedips_init(&t);
+++
+++	if (!a || !b || !c || !d || !e || !f || !g || !h) {
+++		pr_err("allowedips self-test malloc: FAIL\n");
+++		goto free;
+++	}
+++
+++	insert(4, a, 192, 168, 4, 0, 24);
+++	insert(4, b, 192, 168, 4, 4, 32);
+++	insert(4, c, 192, 168, 0, 0, 16);
+++	insert(4, d, 192, 95, 5, 64, 27);
+++	/* replaces previous entry, and maskself is required */
+++	insert(4, c, 192, 95, 5, 65, 27);
+++	insert(6, d, 0x26075300, 0x60006b00, 0, 0xc05f0543, 128);
+++	insert(6, c, 0x26075300, 0x60006b00, 0, 0, 64);
+++	insert(4, e, 0, 0, 0, 0, 0);
+++	insert(6, e, 0, 0, 0, 0, 0);
+++	/* replaces previous entry */
+++	insert(6, f, 0, 0, 0, 0, 0);
+++	insert(6, g, 0x24046800, 0, 0, 0, 32);
+++	/* maskself is required */
+++	insert(6, h, 0x24046800, 0x40040800, 0xdeadbeef, 0xdeadbeef, 64);
+++	insert(6, a, 0x24046800, 0x40040800, 0xdeadbeef, 0xdeadbeef, 128);
+++	insert(6, c, 0x24446800, 0x40e40800, 0xdeaebeef, 0xdefbeef, 128);
+++	insert(6, b, 0x24446800, 0xf0e40800, 0xeeaebeef, 0, 98);
+++	insert(4, g, 64, 15, 112, 0, 20);
+++	/* maskself is required */
+++	insert(4, h, 64, 15, 123, 211, 25);
+++	insert(4, a, 10, 0, 0, 0, 25);
+++	insert(4, b, 10, 0, 0, 128, 25);
+++	insert(4, a, 10, 1, 0, 0, 30);
+++	insert(4, b, 10, 1, 0, 4, 30);
+++	insert(4, c, 10, 1, 0, 8, 29);
+++	insert(4, d, 10, 1, 0, 16, 29);
+++
+++	if (IS_ENABLED(DEBUG_PRINT_TRIE_GRAPHVIZ)) {
+++		print_tree(t.root4, 32);
+++		print_tree(t.root6, 128);
+++	}
+++
+++	success = true;
+++
+++	test(4, a, 192, 168, 4, 20);
+++	test(4, a, 192, 168, 4, 0);
+++	test(4, b, 192, 168, 4, 4);
+++	test(4, c, 192, 168, 200, 182);
+++	test(4, c, 192, 95, 5, 68);
+++	test(4, e, 192, 95, 5, 96);
+++	test(6, d, 0x26075300, 0x60006b00, 0, 0xc05f0543);
+++	test(6, c, 0x26075300, 0x60006b00, 0, 0xc02e01ee);
+++	test(6, f, 0x26075300, 0x60006b01, 0, 0);
+++	test(6, g, 0x24046800, 0x40040806, 0, 0x1006);
+++	test(6, g, 0x24046800, 0x40040806, 0x1234, 0x5678);
+++	test(6, f, 0x240467ff, 0x40040806, 0x1234, 0x5678);
+++	test(6, f, 0x24046801, 0x40040806, 0x1234, 0x5678);
+++	test(6, h, 0x24046800, 0x40040800, 0x1234, 0x5678);
+++	test(6, h, 0x24046800, 0x40040800, 0, 0);
+++	test(6, h, 0x24046800, 0x40040800, 0x10101010, 0x10101010);
+++	test(6, a, 0x24046800, 0x40040800, 0xdeadbeef, 0xdeadbeef);
+++	test(4, g, 64, 15, 116, 26);
+++	test(4, g, 64, 15, 127, 3);
+++	test(4, g, 64, 15, 123, 1);
+++	test(4, h, 64, 15, 123, 128);
+++	test(4, h, 64, 15, 123, 129);
+++	test(4, a, 10, 0, 0, 52);
+++	test(4, b, 10, 0, 0, 220);
+++	test(4, a, 10, 1, 0, 2);
+++	test(4, b, 10, 1, 0, 6);
+++	test(4, c, 10, 1, 0, 10);
+++	test(4, d, 10, 1, 0, 20);
+++
+++	insert(4, a, 1, 0, 0, 0, 32);
+++	insert(4, a, 64, 0, 0, 0, 32);
+++	insert(4, a, 128, 0, 0, 0, 32);
+++	insert(4, a, 192, 0, 0, 0, 32);
+++	insert(4, a, 255, 0, 0, 0, 32);
+++	wg_allowedips_remove_by_peer(&t, a, &mutex);
+++	test_negative(4, a, 1, 0, 0, 0);
+++	test_negative(4, a, 64, 0, 0, 0);
+++	test_negative(4, a, 128, 0, 0, 0);
+++	test_negative(4, a, 192, 0, 0, 0);
+++	test_negative(4, a, 255, 0, 0, 0);
+++
+++	wg_allowedips_free(&t, &mutex);
+++	wg_allowedips_init(&t);
+++	insert(4, a, 192, 168, 0, 0, 16);
+++	insert(4, a, 192, 168, 0, 0, 24);
+++	wg_allowedips_remove_by_peer(&t, a, &mutex);
+++	test_negative(4, a, 192, 168, 0, 1);
+++
+++	/* These will hit the WARN_ON(len >= 128) in free_node if something
+++	 * goes wrong.
+++	 */
+++	for (i = 0; i < 128; ++i) {
+++		part = cpu_to_be64(~(1LLU << (i % 64)));
+++		memset(&ip, 0xff, 16);
+++		memcpy((u8 *)&ip + (i < 64) * 8, &part, 8);
+++		wg_allowedips_insert_v6(&t, &ip, 128, a, &mutex);
+++	}
+++
+++	wg_allowedips_free(&t, &mutex);
+++
+++	wg_allowedips_init(&t);
+++	insert(4, a, 192, 95, 5, 93, 27);
+++	insert(6, a, 0x26075300, 0x60006b00, 0, 0xc05f0543, 128);
+++	insert(4, a, 10, 1, 0, 20, 29);
+++	insert(6, a, 0x26075300, 0x6d8a6bf8, 0xdab1f1df, 0xc05f1523, 83);
+++	insert(6, a, 0x26075300, 0x6d8a6bf8, 0xdab1f1df, 0xc05f1523, 21);
+++	list_for_each_entry(iter_node, &a->allowedips_list, peer_list) {
+++		u8 cidr, ip[16] __aligned(__alignof(u64));
+++		int family = wg_allowedips_read_node(iter_node, ip, &cidr);
+++
+++		count++;
+++
+++		if (cidr == 27 && family == AF_INET &&
+++		    !memcmp(ip, ip4(192, 95, 5, 64), sizeof(struct in_addr)))
+++			found_a = true;
+++		else if (cidr == 128 && family == AF_INET6 &&
+++			 !memcmp(ip, ip6(0x26075300, 0x60006b00, 0, 0xc05f0543),
+++				 sizeof(struct in6_addr)))
+++			found_b = true;
+++		else if (cidr == 29 && family == AF_INET &&
+++			 !memcmp(ip, ip4(10, 1, 0, 16), sizeof(struct in_addr)))
+++			found_c = true;
+++		else if (cidr == 83 && family == AF_INET6 &&
+++			 !memcmp(ip, ip6(0x26075300, 0x6d8a6bf8, 0xdab1e000, 0),
+++				 sizeof(struct in6_addr)))
+++			found_d = true;
+++		else if (cidr == 21 && family == AF_INET6 &&
+++			 !memcmp(ip, ip6(0x26075000, 0, 0, 0),
+++				 sizeof(struct in6_addr)))
+++			found_e = true;
+++		else
+++			found_other = true;
+++	}
+++	test_boolean(count == 5);
+++	test_boolean(found_a);
+++	test_boolean(found_b);
+++	test_boolean(found_c);
+++	test_boolean(found_d);
+++	test_boolean(found_e);
+++	test_boolean(!found_other);
+++
+++	if (IS_ENABLED(DEBUG_RANDOM_TRIE) && success)
+++		success = randomized_test();
+++
+++	if (success)
+++		pr_info("allowedips self-tests: pass\n");
+++
+++free:
+++	wg_allowedips_free(&t, &mutex);
+++	kfree(a);
+++	kfree(b);
+++	kfree(c);
+++	kfree(d);
+++	kfree(e);
+++	kfree(f);
+++	kfree(g);
+++	kfree(h);
+++	mutex_unlock(&mutex);
+++
+++	return success;
+++}
+++
+++#undef test_negative
+++#undef test
+++#undef remove
+++#undef insert
+++#undef init_peer
+++
+++#endif
++--- /dev/null
+++++ b/drivers/net/wireguard/selftest/counter.c
++@@ -0,0 +1,104 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#ifdef DEBUG
+++bool __init wg_packet_counter_selftest(void)
+++{
+++	unsigned int test_num = 0, i;
+++	union noise_counter counter;
+++	bool success = true;
+++
+++#define T_INIT do {                                               \
+++		memset(&counter, 0, sizeof(union noise_counter)); \
+++		spin_lock_init(&counter.receive.lock);            \
+++	} while (0)
+++#define T_LIM (COUNTER_WINDOW_SIZE + 1)
+++#define T(n, v) do {                                                  \
+++		++test_num;                                           \
+++		if (counter_validate(&counter, n) != (v)) {           \
+++			pr_err("nonce counter self-test %u: FAIL\n",  \
+++			       test_num);                             \
+++			success = false;                              \
+++		}                                                     \
+++	} while (0)
+++
+++	T_INIT;
+++	/*  1 */ T(0, true);
+++	/*  2 */ T(1, true);
+++	/*  3 */ T(1, false);
+++	/*  4 */ T(9, true);
+++	/*  5 */ T(8, true);
+++	/*  6 */ T(7, true);
+++	/*  7 */ T(7, false);
+++	/*  8 */ T(T_LIM, true);
+++	/*  9 */ T(T_LIM - 1, true);
+++	/* 10 */ T(T_LIM - 1, false);
+++	/* 11 */ T(T_LIM - 2, true);
+++	/* 12 */ T(2, true);
+++	/* 13 */ T(2, false);
+++	/* 14 */ T(T_LIM + 16, true);
+++	/* 15 */ T(3, false);
+++	/* 16 */ T(T_LIM + 16, false);
+++	/* 17 */ T(T_LIM * 4, true);
+++	/* 18 */ T(T_LIM * 4 - (T_LIM - 1), true);
+++	/* 19 */ T(10, false);
+++	/* 20 */ T(T_LIM * 4 - T_LIM, false);
+++	/* 21 */ T(T_LIM * 4 - (T_LIM + 1), false);
+++	/* 22 */ T(T_LIM * 4 - (T_LIM - 2), true);
+++	/* 23 */ T(T_LIM * 4 + 1 - T_LIM, false);
+++	/* 24 */ T(0, false);
+++	/* 25 */ T(REJECT_AFTER_MESSAGES, false);
+++	/* 26 */ T(REJECT_AFTER_MESSAGES - 1, true);
+++	/* 27 */ T(REJECT_AFTER_MESSAGES, false);
+++	/* 28 */ T(REJECT_AFTER_MESSAGES - 1, false);
+++	/* 29 */ T(REJECT_AFTER_MESSAGES - 2, true);
+++	/* 30 */ T(REJECT_AFTER_MESSAGES + 1, false);
+++	/* 31 */ T(REJECT_AFTER_MESSAGES + 2, false);
+++	/* 32 */ T(REJECT_AFTER_MESSAGES - 2, false);
+++	/* 33 */ T(REJECT_AFTER_MESSAGES - 3, true);
+++	/* 34 */ T(0, false);
+++
+++	T_INIT;
+++	for (i = 1; i <= COUNTER_WINDOW_SIZE; ++i)
+++		T(i, true);
+++	T(0, true);
+++	T(0, false);
+++
+++	T_INIT;
+++	for (i = 2; i <= COUNTER_WINDOW_SIZE + 1; ++i)
+++		T(i, true);
+++	T(1, true);
+++	T(0, false);
+++
+++	T_INIT;
+++	for (i = COUNTER_WINDOW_SIZE + 1; i-- > 0;)
+++		T(i, true);
+++
+++	T_INIT;
+++	for (i = COUNTER_WINDOW_SIZE + 2; i-- > 1;)
+++		T(i, true);
+++	T(0, false);
+++
+++	T_INIT;
+++	for (i = COUNTER_WINDOW_SIZE + 1; i-- > 1;)
+++		T(i, true);
+++	T(COUNTER_WINDOW_SIZE + 1, true);
+++	T(0, false);
+++
+++	T_INIT;
+++	for (i = COUNTER_WINDOW_SIZE + 1; i-- > 1;)
+++		T(i, true);
+++	T(0, true);
+++	T(COUNTER_WINDOW_SIZE + 1, true);
+++
+++#undef T
+++#undef T_LIM
+++#undef T_INIT
+++
+++	if (success)
+++		pr_info("nonce counter self-tests: pass\n");
+++	return success;
+++}
+++#endif
++--- /dev/null
+++++ b/drivers/net/wireguard/selftest/ratelimiter.c
++@@ -0,0 +1,226 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#ifdef DEBUG
+++
+++#include <linux/jiffies.h>
+++
+++static const struct {
+++	bool result;
+++	unsigned int msec_to_sleep_before;
+++} expected_results[] __initconst = {
+++	[0 ... PACKETS_BURSTABLE - 1] = { true, 0 },
+++	[PACKETS_BURSTABLE] = { false, 0 },
+++	[PACKETS_BURSTABLE + 1] = { true, MSEC_PER_SEC / PACKETS_PER_SECOND },
+++	[PACKETS_BURSTABLE + 2] = { false, 0 },
+++	[PACKETS_BURSTABLE + 3] = { true, (MSEC_PER_SEC / PACKETS_PER_SECOND) * 2 },
+++	[PACKETS_BURSTABLE + 4] = { true, 0 },
+++	[PACKETS_BURSTABLE + 5] = { false, 0 }
+++};
+++
+++static __init unsigned int maximum_jiffies_at_index(int index)
+++{
+++	unsigned int total_msecs = 2 * MSEC_PER_SEC / PACKETS_PER_SECOND / 3;
+++	int i;
+++
+++	for (i = 0; i <= index; ++i)
+++		total_msecs += expected_results[i].msec_to_sleep_before;
+++	return msecs_to_jiffies(total_msecs);
+++}
+++
+++static __init int timings_test(struct sk_buff *skb4, struct iphdr *hdr4,
+++			       struct sk_buff *skb6, struct ipv6hdr *hdr6,
+++			       int *test)
+++{
+++	unsigned long loop_start_time;
+++	int i;
+++
+++	wg_ratelimiter_gc_entries(NULL);
+++	rcu_barrier();
+++	loop_start_time = jiffies;
+++
+++	for (i = 0; i < ARRAY_SIZE(expected_results); ++i) {
+++		if (expected_results[i].msec_to_sleep_before)
+++			msleep(expected_results[i].msec_to_sleep_before);
+++
+++		if (time_is_before_jiffies(loop_start_time +
+++					   maximum_jiffies_at_index(i)))
+++			return -ETIMEDOUT;
+++		if (wg_ratelimiter_allow(skb4, &init_net) !=
+++					expected_results[i].result)
+++			return -EXFULL;
+++		++(*test);
+++
+++		hdr4->saddr = htonl(ntohl(hdr4->saddr) + i + 1);
+++		if (time_is_before_jiffies(loop_start_time +
+++					   maximum_jiffies_at_index(i)))
+++			return -ETIMEDOUT;
+++		if (!wg_ratelimiter_allow(skb4, &init_net))
+++			return -EXFULL;
+++		++(*test);
+++
+++		hdr4->saddr = htonl(ntohl(hdr4->saddr) - i - 1);
+++
+++#if IS_ENABLED(CONFIG_IPV6)
+++		hdr6->saddr.in6_u.u6_addr32[2] = htonl(i);
+++		hdr6->saddr.in6_u.u6_addr32[3] = htonl(i);
+++		if (time_is_before_jiffies(loop_start_time +
+++					   maximum_jiffies_at_index(i)))
+++			return -ETIMEDOUT;
+++		if (wg_ratelimiter_allow(skb6, &init_net) !=
+++					expected_results[i].result)
+++			return -EXFULL;
+++		++(*test);
+++
+++		hdr6->saddr.in6_u.u6_addr32[0] =
+++			htonl(ntohl(hdr6->saddr.in6_u.u6_addr32[0]) + i + 1);
+++		if (time_is_before_jiffies(loop_start_time +
+++					   maximum_jiffies_at_index(i)))
+++			return -ETIMEDOUT;
+++		if (!wg_ratelimiter_allow(skb6, &init_net))
+++			return -EXFULL;
+++		++(*test);
+++
+++		hdr6->saddr.in6_u.u6_addr32[0] =
+++			htonl(ntohl(hdr6->saddr.in6_u.u6_addr32[0]) - i - 1);
+++
+++		if (time_is_before_jiffies(loop_start_time +
+++					   maximum_jiffies_at_index(i)))
+++			return -ETIMEDOUT;
+++#endif
+++	}
+++	return 0;
+++}
+++
+++static __init int capacity_test(struct sk_buff *skb4, struct iphdr *hdr4,
+++				int *test)
+++{
+++	int i;
+++
+++	wg_ratelimiter_gc_entries(NULL);
+++	rcu_barrier();
+++
+++	if (atomic_read(&total_entries))
+++		return -EXFULL;
+++	++(*test);
+++
+++	for (i = 0; i <= max_entries; ++i) {
+++		hdr4->saddr = htonl(i);
+++		if (wg_ratelimiter_allow(skb4, &init_net) != (i != max_entries))
+++			return -EXFULL;
+++		++(*test);
+++	}
+++	return 0;
+++}
+++
+++bool __init wg_ratelimiter_selftest(void)
+++{
+++	enum { TRIALS_BEFORE_GIVING_UP = 5000 };
+++	bool success = false;
+++	int test = 0, trials;
+++	struct sk_buff *skb4, *skb6;
+++	struct iphdr *hdr4;
+++	struct ipv6hdr *hdr6;
+++
+++	if (IS_ENABLED(CONFIG_KASAN) || IS_ENABLED(CONFIG_UBSAN))
+++		return true;
+++
+++	BUILD_BUG_ON(MSEC_PER_SEC % PACKETS_PER_SECOND != 0);
+++
+++	if (wg_ratelimiter_init())
+++		goto out;
+++	++test;
+++	if (wg_ratelimiter_init()) {
+++		wg_ratelimiter_uninit();
+++		goto out;
+++	}
+++	++test;
+++	if (wg_ratelimiter_init()) {
+++		wg_ratelimiter_uninit();
+++		wg_ratelimiter_uninit();
+++		goto out;
+++	}
+++	++test;
+++
+++	skb4 = alloc_skb(sizeof(struct iphdr), GFP_KERNEL);
+++	if (unlikely(!skb4))
+++		goto err_nofree;
+++	skb4->protocol = htons(ETH_P_IP);
+++	hdr4 = (struct iphdr *)skb_put(skb4, sizeof(*hdr4));
+++	hdr4->saddr = htonl(8182);
+++	skb_reset_network_header(skb4);
+++	++test;
+++
+++#if IS_ENABLED(CONFIG_IPV6)
+++	skb6 = alloc_skb(sizeof(struct ipv6hdr), GFP_KERNEL);
+++	if (unlikely(!skb6)) {
+++		kfree_skb(skb4);
+++		goto err_nofree;
+++	}
+++	skb6->protocol = htons(ETH_P_IPV6);
+++	hdr6 = (struct ipv6hdr *)skb_put(skb6, sizeof(*hdr6));
+++	hdr6->saddr.in6_u.u6_addr32[0] = htonl(1212);
+++	hdr6->saddr.in6_u.u6_addr32[1] = htonl(289188);
+++	skb_reset_network_header(skb6);
+++	++test;
+++#endif
+++
+++	for (trials = TRIALS_BEFORE_GIVING_UP;;) {
+++		int test_count = 0, ret;
+++
+++		ret = timings_test(skb4, hdr4, skb6, hdr6, &test_count);
+++		if (ret == -ETIMEDOUT) {
+++			if (!trials--) {
+++				test += test_count;
+++				goto err;
+++			}
+++			msleep(500);
+++			continue;
+++		} else if (ret < 0) {
+++			test += test_count;
+++			goto err;
+++		} else {
+++			test += test_count;
+++			break;
+++		}
+++	}
+++
+++	for (trials = TRIALS_BEFORE_GIVING_UP;;) {
+++		int test_count = 0;
+++
+++		if (capacity_test(skb4, hdr4, &test_count) < 0) {
+++			if (!trials--) {
+++				test += test_count;
+++				goto err;
+++			}
+++			msleep(50);
+++			continue;
+++		}
+++		test += test_count;
+++		break;
+++	}
+++
+++	success = true;
+++
+++err:
+++	kfree_skb(skb4);
+++#if IS_ENABLED(CONFIG_IPV6)
+++	kfree_skb(skb6);
+++#endif
+++err_nofree:
+++	wg_ratelimiter_uninit();
+++	wg_ratelimiter_uninit();
+++	wg_ratelimiter_uninit();
+++	/* Uninit one extra time to check underflow detection. */
+++	wg_ratelimiter_uninit();
+++out:
+++	if (success)
+++		pr_info("ratelimiter self-tests: pass\n");
+++	else
+++		pr_err("ratelimiter self-test %d: FAIL\n", test);
+++
+++	return success;
+++}
+++#endif
++--- /dev/null
+++++ b/drivers/net/wireguard/send.c
++@@ -0,0 +1,413 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include "queueing.h"
+++#include "timers.h"
+++#include "device.h"
+++#include "peer.h"
+++#include "socket.h"
+++#include "messages.h"
+++#include "cookie.h"
+++
+++#include <linux/uio.h>
+++#include <linux/inetdevice.h>
+++#include <linux/socket.h>
+++#include <net/ip_tunnels.h>
+++#include <net/udp.h>
+++#include <net/sock.h>
+++
+++static void wg_packet_send_handshake_initiation(struct wg_peer *peer)
+++{
+++	struct message_handshake_initiation packet;
+++
+++	if (!wg_birthdate_has_expired(atomic64_read(&peer->last_sent_handshake),
+++				      REKEY_TIMEOUT))
+++		return; /* This function is rate limited. */
+++
+++	atomic64_set(&peer->last_sent_handshake, ktime_get_coarse_boottime_ns());
+++	net_dbg_ratelimited("%s: Sending handshake initiation to peer %llu (%pISpfsc)\n",
+++			    peer->device->dev->name, peer->internal_id,
+++			    &peer->endpoint.addr);
+++
+++	if (wg_noise_handshake_create_initiation(&packet, &peer->handshake)) {
+++		wg_cookie_add_mac_to_packet(&packet, sizeof(packet), peer);
+++		wg_timers_any_authenticated_packet_traversal(peer);
+++		wg_timers_any_authenticated_packet_sent(peer);
+++		atomic64_set(&peer->last_sent_handshake,
+++			     ktime_get_coarse_boottime_ns());
+++		wg_socket_send_buffer_to_peer(peer, &packet, sizeof(packet),
+++					      HANDSHAKE_DSCP);
+++		wg_timers_handshake_initiated(peer);
+++	}
+++}
+++
+++void wg_packet_handshake_send_worker(struct work_struct *work)
+++{
+++	struct wg_peer *peer = container_of(work, struct wg_peer,
+++					    transmit_handshake_work);
+++
+++	wg_packet_send_handshake_initiation(peer);
+++	wg_peer_put(peer);
+++}
+++
+++void wg_packet_send_queued_handshake_initiation(struct wg_peer *peer,
+++						bool is_retry)
+++{
+++	if (!is_retry)
+++		peer->timer_handshake_attempts = 0;
+++
+++	rcu_read_lock_bh();
+++	/* We check last_sent_handshake here in addition to the actual function
+++	 * we're queueing up, so that we don't queue things if not strictly
+++	 * necessary:
+++	 */
+++	if (!wg_birthdate_has_expired(atomic64_read(&peer->last_sent_handshake),
+++				      REKEY_TIMEOUT) ||
+++			unlikely(READ_ONCE(peer->is_dead)))
+++		goto out;
+++
+++	wg_peer_get(peer);
+++	/* Queues up calling packet_send_queued_handshakes(peer), where we do a
+++	 * peer_put(peer) after:
+++	 */
+++	if (!queue_work(peer->device->handshake_send_wq,
+++			&peer->transmit_handshake_work))
+++		/* If the work was already queued, we want to drop the
+++		 * extra reference:
+++		 */
+++		wg_peer_put(peer);
+++out:
+++	rcu_read_unlock_bh();
+++}
+++
+++void wg_packet_send_handshake_response(struct wg_peer *peer)
+++{
+++	struct message_handshake_response packet;
+++
+++	atomic64_set(&peer->last_sent_handshake, ktime_get_coarse_boottime_ns());
+++	net_dbg_ratelimited("%s: Sending handshake response to peer %llu (%pISpfsc)\n",
+++			    peer->device->dev->name, peer->internal_id,
+++			    &peer->endpoint.addr);
+++
+++	if (wg_noise_handshake_create_response(&packet, &peer->handshake)) {
+++		wg_cookie_add_mac_to_packet(&packet, sizeof(packet), peer);
+++		if (wg_noise_handshake_begin_session(&peer->handshake,
+++						     &peer->keypairs)) {
+++			wg_timers_session_derived(peer);
+++			wg_timers_any_authenticated_packet_traversal(peer);
+++			wg_timers_any_authenticated_packet_sent(peer);
+++			atomic64_set(&peer->last_sent_handshake,
+++				     ktime_get_coarse_boottime_ns());
+++			wg_socket_send_buffer_to_peer(peer, &packet,
+++						      sizeof(packet),
+++						      HANDSHAKE_DSCP);
+++		}
+++	}
+++}
+++
+++void wg_packet_send_handshake_cookie(struct wg_device *wg,
+++				     struct sk_buff *initiating_skb,
+++				     __le32 sender_index)
+++{
+++	struct message_handshake_cookie packet;
+++
+++	net_dbg_skb_ratelimited("%s: Sending cookie response for denied handshake message for %pISpfsc\n",
+++				wg->dev->name, initiating_skb);
+++	wg_cookie_message_create(&packet, initiating_skb, sender_index,
+++				 &wg->cookie_checker);
+++	wg_socket_send_buffer_as_reply_to_skb(wg, initiating_skb, &packet,
+++					      sizeof(packet));
+++}
+++
+++static void keep_key_fresh(struct wg_peer *peer)
+++{
+++	struct noise_keypair *keypair;
+++	bool send = false;
+++
+++	rcu_read_lock_bh();
+++	keypair = rcu_dereference_bh(peer->keypairs.current_keypair);
+++	if (likely(keypair && READ_ONCE(keypair->sending.is_valid)) &&
+++	    (unlikely(atomic64_read(&keypair->sending.counter.counter) >
+++		      REKEY_AFTER_MESSAGES) ||
+++	     (keypair->i_am_the_initiator &&
+++	      unlikely(wg_birthdate_has_expired(keypair->sending.birthdate,
+++						REKEY_AFTER_TIME)))))
+++		send = true;
+++	rcu_read_unlock_bh();
+++
+++	if (send)
+++		wg_packet_send_queued_handshake_initiation(peer, false);
+++}
+++
+++static unsigned int calculate_skb_padding(struct sk_buff *skb)
+++{
+++	/* We do this modulo business with the MTU, just in case the networking
+++	 * layer gives us a packet that's bigger than the MTU. In that case, we
+++	 * wouldn't want the final subtraction to overflow in the case of the
+++	 * padded_size being clamped.
+++	 */
+++	unsigned int last_unit = skb->len % PACKET_CB(skb)->mtu;
+++	unsigned int padded_size = ALIGN(last_unit, MESSAGE_PADDING_MULTIPLE);
+++
+++	if (padded_size > PACKET_CB(skb)->mtu)
+++		padded_size = PACKET_CB(skb)->mtu;
+++	return padded_size - last_unit;
+++}
+++
+++static bool encrypt_packet(struct sk_buff *skb, struct noise_keypair *keypair)
+++{
+++	unsigned int padding_len, plaintext_len, trailer_len;
+++	struct scatterlist sg[MAX_SKB_FRAGS + 8];
+++	struct message_data *header;
+++	struct sk_buff *trailer;
+++	int num_frags;
+++
+++	/* Calculate lengths. */
+++	padding_len = calculate_skb_padding(skb);
+++	trailer_len = padding_len + noise_encrypted_len(0);
+++	plaintext_len = skb->len + padding_len;
+++
+++	/* Expand data section to have room for padding and auth tag. */
+++	num_frags = skb_cow_data(skb, trailer_len, &trailer);
+++	if (unlikely(num_frags < 0 || num_frags > ARRAY_SIZE(sg)))
+++		return false;
+++
+++	/* Set the padding to zeros, and make sure it and the auth tag are part
+++	 * of the skb.
+++	 */
+++	memset(skb_tail_pointer(trailer), 0, padding_len);
+++
+++	/* Expand head section to have room for our header and the network
+++	 * stack's headers.
+++	 */
+++	if (unlikely(skb_cow_head(skb, DATA_PACKET_HEAD_ROOM) < 0))
+++		return false;
+++
+++	/* Finalize checksum calculation for the inner packet, if required. */
+++	if (unlikely(skb->ip_summed == CHECKSUM_PARTIAL &&
+++		     skb_checksum_help(skb)))
+++		return false;
+++
+++	/* Only after checksumming can we safely add on the padding at the end
+++	 * and the header.
+++	 */
+++	skb_set_inner_network_header(skb, 0);
+++	header = (struct message_data *)skb_push(skb, sizeof(*header));
+++	header->header.type = cpu_to_le32(MESSAGE_DATA);
+++	header->key_idx = keypair->remote_index;
+++	header->counter = cpu_to_le64(PACKET_CB(skb)->nonce);
+++	pskb_put(skb, trailer, trailer_len);
+++
+++	/* Now we can encrypt the scattergather segments */
+++	sg_init_table(sg, num_frags);
+++	if (skb_to_sgvec(skb, sg, sizeof(struct message_data),
+++			 noise_encrypted_len(plaintext_len)) <= 0)
+++		return false;
+++	return chacha20poly1305_encrypt_sg_inplace(sg, plaintext_len, NULL, 0,
+++						   PACKET_CB(skb)->nonce,
+++						   keypair->sending.key);
+++}
+++
+++void wg_packet_send_keepalive(struct wg_peer *peer)
+++{
+++	struct sk_buff *skb;
+++
+++	if (skb_queue_empty(&peer->staged_packet_queue)) {
+++		skb = alloc_skb(DATA_PACKET_HEAD_ROOM + MESSAGE_MINIMUM_LENGTH,
+++				GFP_ATOMIC);
+++		if (unlikely(!skb))
+++			return;
+++		skb_reserve(skb, DATA_PACKET_HEAD_ROOM);
+++		skb->dev = peer->device->dev;
+++		PACKET_CB(skb)->mtu = skb->dev->mtu;
+++		skb_queue_tail(&peer->staged_packet_queue, skb);
+++		net_dbg_ratelimited("%s: Sending keepalive packet to peer %llu (%pISpfsc)\n",
+++				    peer->device->dev->name, peer->internal_id,
+++				    &peer->endpoint.addr);
+++	}
+++
+++	wg_packet_send_staged_packets(peer);
+++}
+++
+++static void wg_packet_create_data_done(struct sk_buff *first,
+++				       struct wg_peer *peer)
+++{
+++	struct sk_buff *skb, *next;
+++	bool is_keepalive, data_sent = false;
+++
+++	wg_timers_any_authenticated_packet_traversal(peer);
+++	wg_timers_any_authenticated_packet_sent(peer);
+++	skb_list_walk_safe(first, skb, next) {
+++		is_keepalive = skb->len == message_data_len(0);
+++		if (likely(!wg_socket_send_skb_to_peer(peer, skb,
+++				PACKET_CB(skb)->ds) && !is_keepalive))
+++			data_sent = true;
+++	}
+++
+++	if (likely(data_sent))
+++		wg_timers_data_sent(peer);
+++
+++	keep_key_fresh(peer);
+++}
+++
+++void wg_packet_tx_worker(struct work_struct *work)
+++{
+++	struct crypt_queue *queue = container_of(work, struct crypt_queue,
+++						 work);
+++	struct noise_keypair *keypair;
+++	enum packet_state state;
+++	struct sk_buff *first;
+++	struct wg_peer *peer;
+++
+++	while ((first = __ptr_ring_peek(&queue->ring)) != NULL &&
+++	       (state = atomic_read_acquire(&PACKET_CB(first)->state)) !=
+++		       PACKET_STATE_UNCRYPTED) {
+++		__ptr_ring_discard_one(&queue->ring);
+++		peer = PACKET_PEER(first);
+++		keypair = PACKET_CB(first)->keypair;
+++
+++		if (likely(state == PACKET_STATE_CRYPTED))
+++			wg_packet_create_data_done(first, peer);
+++		else
+++			kfree_skb_list(first);
+++
+++		wg_noise_keypair_put(keypair, false);
+++		wg_peer_put(peer);
+++	}
+++}
+++
+++void wg_packet_encrypt_worker(struct work_struct *work)
+++{
+++	struct crypt_queue *queue = container_of(work, struct multicore_worker,
+++						 work)->ptr;
+++	struct sk_buff *first, *skb, *next;
+++
+++	while ((first = ptr_ring_consume_bh(&queue->ring)) != NULL) {
+++		enum packet_state state = PACKET_STATE_CRYPTED;
+++
+++		skb_list_walk_safe(first, skb, next) {
+++			if (likely(encrypt_packet(skb,
+++					PACKET_CB(first)->keypair))) {
+++				wg_reset_packet(skb);
+++			} else {
+++				state = PACKET_STATE_DEAD;
+++				break;
+++			}
+++		}
+++		wg_queue_enqueue_per_peer(&PACKET_PEER(first)->tx_queue, first,
+++					  state);
+++
+++	}
+++}
+++
+++static void wg_packet_create_data(struct sk_buff *first)
+++{
+++	struct wg_peer *peer = PACKET_PEER(first);
+++	struct wg_device *wg = peer->device;
+++	int ret = -EINVAL;
+++
+++	rcu_read_lock_bh();
+++	if (unlikely(READ_ONCE(peer->is_dead)))
+++		goto err;
+++
+++	ret = wg_queue_enqueue_per_device_and_peer(&wg->encrypt_queue,
+++						   &peer->tx_queue, first,
+++						   wg->packet_crypt_wq,
+++						   &wg->encrypt_queue.last_cpu);
+++	if (unlikely(ret == -EPIPE))
+++		wg_queue_enqueue_per_peer(&peer->tx_queue, first,
+++					  PACKET_STATE_DEAD);
+++err:
+++	rcu_read_unlock_bh();
+++	if (likely(!ret || ret == -EPIPE))
+++		return;
+++	wg_noise_keypair_put(PACKET_CB(first)->keypair, false);
+++	wg_peer_put(peer);
+++	kfree_skb_list(first);
+++}
+++
+++void wg_packet_purge_staged_packets(struct wg_peer *peer)
+++{
+++	spin_lock_bh(&peer->staged_packet_queue.lock);
+++	peer->device->dev->stats.tx_dropped += peer->staged_packet_queue.qlen;
+++	__skb_queue_purge(&peer->staged_packet_queue);
+++	spin_unlock_bh(&peer->staged_packet_queue.lock);
+++}
+++
+++void wg_packet_send_staged_packets(struct wg_peer *peer)
+++{
+++	struct noise_symmetric_key *key;
+++	struct noise_keypair *keypair;
+++	struct sk_buff_head packets;
+++	struct sk_buff *skb;
+++
+++	/* Steal the current queue into our local one. */
+++	__skb_queue_head_init(&packets);
+++	spin_lock_bh(&peer->staged_packet_queue.lock);
+++	skb_queue_splice_init(&peer->staged_packet_queue, &packets);
+++	spin_unlock_bh(&peer->staged_packet_queue.lock);
+++	if (unlikely(skb_queue_empty(&packets)))
+++		return;
+++
+++	/* First we make sure we have a valid reference to a valid key. */
+++	rcu_read_lock_bh();
+++	keypair = wg_noise_keypair_get(
+++		rcu_dereference_bh(peer->keypairs.current_keypair));
+++	rcu_read_unlock_bh();
+++	if (unlikely(!keypair))
+++		goto out_nokey;
+++	key = &keypair->sending;
+++	if (unlikely(!READ_ONCE(key->is_valid)))
+++		goto out_nokey;
+++	if (unlikely(wg_birthdate_has_expired(key->birthdate,
+++					      REJECT_AFTER_TIME)))
+++		goto out_invalid;
+++
+++	/* After we know we have a somewhat valid key, we now try to assign
+++	 * nonces to all of the packets in the queue. If we can't assign nonces
+++	 * for all of them, we just consider it a failure and wait for the next
+++	 * handshake.
+++	 */
+++	skb_queue_walk(&packets, skb) {
+++		/* 0 for no outer TOS: no leak. TODO: at some later point, we
+++		 * might consider using flowi->tos as outer instead.
+++		 */
+++		PACKET_CB(skb)->ds = ip_tunnel_ecn_encap(0, ip_hdr(skb), skb);
+++		PACKET_CB(skb)->nonce =
+++				atomic64_inc_return(&key->counter.counter) - 1;
+++		if (unlikely(PACKET_CB(skb)->nonce >= REJECT_AFTER_MESSAGES))
+++			goto out_invalid;
+++	}
+++
+++	packets.prev->next = NULL;
+++	wg_peer_get(keypair->entry.peer);
+++	PACKET_CB(packets.next)->keypair = keypair;
+++	wg_packet_create_data(packets.next);
+++	return;
+++
+++out_invalid:
+++	WRITE_ONCE(key->is_valid, false);
+++out_nokey:
+++	wg_noise_keypair_put(keypair, false);
+++
+++	/* We orphan the packets if we're waiting on a handshake, so that they
+++	 * don't block a socket's pool.
+++	 */
+++	skb_queue_walk(&packets, skb)
+++		skb_orphan(skb);
+++	/* Then we put them back on the top of the queue. We're not too
+++	 * concerned about accidentally getting things a little out of order if
+++	 * packets are being added really fast, because this queue is for before
+++	 * packets can even be sent and it's small anyway.
+++	 */
+++	spin_lock_bh(&peer->staged_packet_queue.lock);
+++	skb_queue_splice(&packets, &peer->staged_packet_queue);
+++	spin_unlock_bh(&peer->staged_packet_queue.lock);
+++
+++	/* If we're exiting because there's something wrong with the key, it
+++	 * means we should initiate a new handshake.
+++	 */
+++	wg_packet_send_queued_handshake_initiation(peer, false);
+++}
++--- /dev/null
+++++ b/drivers/net/wireguard/socket.c
++@@ -0,0 +1,437 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include "device.h"
+++#include "peer.h"
+++#include "socket.h"
+++#include "queueing.h"
+++#include "messages.h"
+++
+++#include <linux/ctype.h>
+++#include <linux/net.h>
+++#include <linux/if_vlan.h>
+++#include <linux/if_ether.h>
+++#include <linux/inetdevice.h>
+++#include <net/udp_tunnel.h>
+++#include <net/ipv6.h>
+++
+++static int send4(struct wg_device *wg, struct sk_buff *skb,
+++		 struct endpoint *endpoint, u8 ds, struct dst_cache *cache)
+++{
+++	struct flowi4 fl = {
+++		.saddr = endpoint->src4.s_addr,
+++		.daddr = endpoint->addr4.sin_addr.s_addr,
+++		.fl4_dport = endpoint->addr4.sin_port,
+++		.flowi4_mark = wg->fwmark,
+++		.flowi4_proto = IPPROTO_UDP
+++	};
+++	struct rtable *rt = NULL;
+++	struct sock *sock;
+++	int ret = 0;
+++
+++	skb_mark_not_on_list(skb);
+++	skb->dev = wg->dev;
+++	skb->mark = wg->fwmark;
+++
+++	rcu_read_lock_bh();
+++	sock = rcu_dereference_bh(wg->sock4);
+++
+++	if (unlikely(!sock)) {
+++		ret = -ENONET;
+++		goto err;
+++	}
+++
+++	fl.fl4_sport = inet_sk(sock)->inet_sport;
+++
+++	if (cache)
+++		rt = dst_cache_get_ip4(cache, &fl.saddr);
+++
+++	if (!rt) {
+++		security_sk_classify_flow(sock, flowi4_to_flowi(&fl));
+++		if (unlikely(!inet_confirm_addr(sock_net(sock), NULL, 0,
+++						fl.saddr, RT_SCOPE_HOST))) {
+++			endpoint->src4.s_addr = 0;
+++			*(__force __be32 *)&endpoint->src_if4 = 0;
+++			fl.saddr = 0;
+++			if (cache)
+++				dst_cache_reset(cache);
+++		}
+++		rt = ip_route_output_flow(sock_net(sock), &fl, sock);
+++		if (unlikely(endpoint->src_if4 && ((IS_ERR(rt) &&
+++			     PTR_ERR(rt) == -EINVAL) || (!IS_ERR(rt) &&
+++			     rt->dst.dev->ifindex != endpoint->src_if4)))) {
+++			endpoint->src4.s_addr = 0;
+++			*(__force __be32 *)&endpoint->src_if4 = 0;
+++			fl.saddr = 0;
+++			if (cache)
+++				dst_cache_reset(cache);
+++			if (!IS_ERR(rt))
+++				ip_rt_put(rt);
+++			rt = ip_route_output_flow(sock_net(sock), &fl, sock);
+++		}
+++		if (unlikely(IS_ERR(rt))) {
+++			ret = PTR_ERR(rt);
+++			net_dbg_ratelimited("%s: No route to %pISpfsc, error %d\n",
+++					    wg->dev->name, &endpoint->addr, ret);
+++			goto err;
+++		} else if (unlikely(rt->dst.dev == skb->dev)) {
+++			ip_rt_put(rt);
+++			ret = -ELOOP;
+++			net_dbg_ratelimited("%s: Avoiding routing loop to %pISpfsc\n",
+++					    wg->dev->name, &endpoint->addr);
+++			goto err;
+++		}
+++		if (cache)
+++			dst_cache_set_ip4(cache, &rt->dst, fl.saddr);
+++	}
+++
+++	skb->ignore_df = 1;
+++	udp_tunnel_xmit_skb(rt, sock, skb, fl.saddr, fl.daddr, ds,
+++			    ip4_dst_hoplimit(&rt->dst), 0, fl.fl4_sport,
+++			    fl.fl4_dport, false, false);
+++	goto out;
+++
+++err:
+++	kfree_skb(skb);
+++out:
+++	rcu_read_unlock_bh();
+++	return ret;
+++}
+++
+++static int send6(struct wg_device *wg, struct sk_buff *skb,
+++		 struct endpoint *endpoint, u8 ds, struct dst_cache *cache)
+++{
+++#if IS_ENABLED(CONFIG_IPV6)
+++	struct flowi6 fl = {
+++		.saddr = endpoint->src6,
+++		.daddr = endpoint->addr6.sin6_addr,
+++		.fl6_dport = endpoint->addr6.sin6_port,
+++		.flowi6_mark = wg->fwmark,
+++		.flowi6_oif = endpoint->addr6.sin6_scope_id,
+++		.flowi6_proto = IPPROTO_UDP
+++		/* TODO: addr->sin6_flowinfo */
+++	};
+++	struct dst_entry *dst = NULL;
+++	struct sock *sock;
+++	int ret = 0;
+++
+++	skb_mark_not_on_list(skb);
+++	skb->dev = wg->dev;
+++	skb->mark = wg->fwmark;
+++
+++	rcu_read_lock_bh();
+++	sock = rcu_dereference_bh(wg->sock6);
+++
+++	if (unlikely(!sock)) {
+++		ret = -ENONET;
+++		goto err;
+++	}
+++
+++	fl.fl6_sport = inet_sk(sock)->inet_sport;
+++
+++	if (cache)
+++		dst = dst_cache_get_ip6(cache, &fl.saddr);
+++
+++	if (!dst) {
+++		security_sk_classify_flow(sock, flowi6_to_flowi(&fl));
+++		if (unlikely(!ipv6_addr_any(&fl.saddr) &&
+++			     !ipv6_chk_addr(sock_net(sock), &fl.saddr, NULL, 0))) {
+++			endpoint->src6 = fl.saddr = in6addr_any;
+++			if (cache)
+++				dst_cache_reset(cache);
+++		}
+++		dst = ipv6_stub->ipv6_dst_lookup_flow(sock_net(sock), sock, &fl,
+++						      NULL);
+++		if (unlikely(IS_ERR(dst))) {
+++			ret = PTR_ERR(dst);
+++			net_dbg_ratelimited("%s: No route to %pISpfsc, error %d\n",
+++					    wg->dev->name, &endpoint->addr, ret);
+++			goto err;
+++		} else if (unlikely(dst->dev == skb->dev)) {
+++			dst_release(dst);
+++			ret = -ELOOP;
+++			net_dbg_ratelimited("%s: Avoiding routing loop to %pISpfsc\n",
+++					    wg->dev->name, &endpoint->addr);
+++			goto err;
+++		}
+++		if (cache)
+++			dst_cache_set_ip6(cache, dst, &fl.saddr);
+++	}
+++
+++	skb->ignore_df = 1;
+++	udp_tunnel6_xmit_skb(dst, sock, skb, skb->dev, &fl.saddr, &fl.daddr, ds,
+++			     ip6_dst_hoplimit(dst), 0, fl.fl6_sport,
+++			     fl.fl6_dport, false);
+++	goto out;
+++
+++err:
+++	kfree_skb(skb);
+++out:
+++	rcu_read_unlock_bh();
+++	return ret;
+++#else
+++	return -EAFNOSUPPORT;
+++#endif
+++}
+++
+++int wg_socket_send_skb_to_peer(struct wg_peer *peer, struct sk_buff *skb, u8 ds)
+++{
+++	size_t skb_len = skb->len;
+++	int ret = -EAFNOSUPPORT;
+++
+++	read_lock_bh(&peer->endpoint_lock);
+++	if (peer->endpoint.addr.sa_family == AF_INET)
+++		ret = send4(peer->device, skb, &peer->endpoint, ds,
+++			    &peer->endpoint_cache);
+++	else if (peer->endpoint.addr.sa_family == AF_INET6)
+++		ret = send6(peer->device, skb, &peer->endpoint, ds,
+++			    &peer->endpoint_cache);
+++	else
+++		dev_kfree_skb(skb);
+++	if (likely(!ret))
+++		peer->tx_bytes += skb_len;
+++	read_unlock_bh(&peer->endpoint_lock);
+++
+++	return ret;
+++}
+++
+++int wg_socket_send_buffer_to_peer(struct wg_peer *peer, void *buffer,
+++				  size_t len, u8 ds)
+++{
+++	struct sk_buff *skb = alloc_skb(len + SKB_HEADER_LEN, GFP_ATOMIC);
+++
+++	if (unlikely(!skb))
+++		return -ENOMEM;
+++
+++	skb_reserve(skb, SKB_HEADER_LEN);
+++	skb_set_inner_network_header(skb, 0);
+++	skb_put_data(skb, buffer, len);
+++	return wg_socket_send_skb_to_peer(peer, skb, ds);
+++}
+++
+++int wg_socket_send_buffer_as_reply_to_skb(struct wg_device *wg,
+++					  struct sk_buff *in_skb, void *buffer,
+++					  size_t len)
+++{
+++	int ret = 0;
+++	struct sk_buff *skb;
+++	struct endpoint endpoint;
+++
+++	if (unlikely(!in_skb))
+++		return -EINVAL;
+++	ret = wg_socket_endpoint_from_skb(&endpoint, in_skb);
+++	if (unlikely(ret < 0))
+++		return ret;
+++
+++	skb = alloc_skb(len + SKB_HEADER_LEN, GFP_ATOMIC);
+++	if (unlikely(!skb))
+++		return -ENOMEM;
+++	skb_reserve(skb, SKB_HEADER_LEN);
+++	skb_set_inner_network_header(skb, 0);
+++	skb_put_data(skb, buffer, len);
+++
+++	if (endpoint.addr.sa_family == AF_INET)
+++		ret = send4(wg, skb, &endpoint, 0, NULL);
+++	else if (endpoint.addr.sa_family == AF_INET6)
+++		ret = send6(wg, skb, &endpoint, 0, NULL);
+++	/* No other possibilities if the endpoint is valid, which it is,
+++	 * as we checked above.
+++	 */
+++
+++	return ret;
+++}
+++
+++int wg_socket_endpoint_from_skb(struct endpoint *endpoint,
+++				const struct sk_buff *skb)
+++{
+++	memset(endpoint, 0, sizeof(*endpoint));
+++	if (skb->protocol == htons(ETH_P_IP)) {
+++		endpoint->addr4.sin_family = AF_INET;
+++		endpoint->addr4.sin_port = udp_hdr(skb)->source;
+++		endpoint->addr4.sin_addr.s_addr = ip_hdr(skb)->saddr;
+++		endpoint->src4.s_addr = ip_hdr(skb)->daddr;
+++		endpoint->src_if4 = skb->skb_iif;
+++	} else if (skb->protocol == htons(ETH_P_IPV6)) {
+++		endpoint->addr6.sin6_family = AF_INET6;
+++		endpoint->addr6.sin6_port = udp_hdr(skb)->source;
+++		endpoint->addr6.sin6_addr = ipv6_hdr(skb)->saddr;
+++		endpoint->addr6.sin6_scope_id = ipv6_iface_scope_id(
+++			&ipv6_hdr(skb)->saddr, skb->skb_iif);
+++		endpoint->src6 = ipv6_hdr(skb)->daddr;
+++	} else {
+++		return -EINVAL;
+++	}
+++	return 0;
+++}
+++
+++static bool endpoint_eq(const struct endpoint *a, const struct endpoint *b)
+++{
+++	return (a->addr.sa_family == AF_INET && b->addr.sa_family == AF_INET &&
+++		a->addr4.sin_port == b->addr4.sin_port &&
+++		a->addr4.sin_addr.s_addr == b->addr4.sin_addr.s_addr &&
+++		a->src4.s_addr == b->src4.s_addr && a->src_if4 == b->src_if4) ||
+++	       (a->addr.sa_family == AF_INET6 &&
+++		b->addr.sa_family == AF_INET6 &&
+++		a->addr6.sin6_port == b->addr6.sin6_port &&
+++		ipv6_addr_equal(&a->addr6.sin6_addr, &b->addr6.sin6_addr) &&
+++		a->addr6.sin6_scope_id == b->addr6.sin6_scope_id &&
+++		ipv6_addr_equal(&a->src6, &b->src6)) ||
+++	       unlikely(!a->addr.sa_family && !b->addr.sa_family);
+++}
+++
+++void wg_socket_set_peer_endpoint(struct wg_peer *peer,
+++				 const struct endpoint *endpoint)
+++{
+++	/* First we check unlocked, in order to optimize, since it's pretty rare
+++	 * that an endpoint will change. If we happen to be mid-write, and two
+++	 * CPUs wind up writing the same thing or something slightly different,
+++	 * it doesn't really matter much either.
+++	 */
+++	if (endpoint_eq(endpoint, &peer->endpoint))
+++		return;
+++	write_lock_bh(&peer->endpoint_lock);
+++	if (endpoint->addr.sa_family == AF_INET) {
+++		peer->endpoint.addr4 = endpoint->addr4;
+++		peer->endpoint.src4 = endpoint->src4;
+++		peer->endpoint.src_if4 = endpoint->src_if4;
+++	} else if (endpoint->addr.sa_family == AF_INET6) {
+++		peer->endpoint.addr6 = endpoint->addr6;
+++		peer->endpoint.src6 = endpoint->src6;
+++	} else {
+++		goto out;
+++	}
+++	dst_cache_reset(&peer->endpoint_cache);
+++out:
+++	write_unlock_bh(&peer->endpoint_lock);
+++}
+++
+++void wg_socket_set_peer_endpoint_from_skb(struct wg_peer *peer,
+++					  const struct sk_buff *skb)
+++{
+++	struct endpoint endpoint;
+++
+++	if (!wg_socket_endpoint_from_skb(&endpoint, skb))
+++		wg_socket_set_peer_endpoint(peer, &endpoint);
+++}
+++
+++void wg_socket_clear_peer_endpoint_src(struct wg_peer *peer)
+++{
+++	write_lock_bh(&peer->endpoint_lock);
+++	memset(&peer->endpoint.src6, 0, sizeof(peer->endpoint.src6));
+++	dst_cache_reset(&peer->endpoint_cache);
+++	write_unlock_bh(&peer->endpoint_lock);
+++}
+++
+++static int wg_receive(struct sock *sk, struct sk_buff *skb)
+++{
+++	struct wg_device *wg;
+++
+++	if (unlikely(!sk))
+++		goto err;
+++	wg = sk->sk_user_data;
+++	if (unlikely(!wg))
+++		goto err;
+++	wg_packet_receive(wg, skb);
+++	return 0;
+++
+++err:
+++	kfree_skb(skb);
+++	return 0;
+++}
+++
+++static void sock_free(struct sock *sock)
+++{
+++	if (unlikely(!sock))
+++		return;
+++	sk_clear_memalloc(sock);
+++	udp_tunnel_sock_release(sock->sk_socket);
+++}
+++
+++static void set_sock_opts(struct socket *sock)
+++{
+++	sock->sk->sk_allocation = GFP_ATOMIC;
+++	sock->sk->sk_sndbuf = INT_MAX;
+++	sk_set_memalloc(sock->sk);
+++}
+++
+++int wg_socket_init(struct wg_device *wg, u16 port)
+++{
+++	int ret;
+++	struct udp_tunnel_sock_cfg cfg = {
+++		.sk_user_data = wg,
+++		.encap_type = 1,
+++		.encap_rcv = wg_receive
+++	};
+++	struct socket *new4 = NULL, *new6 = NULL;
+++	struct udp_port_cfg port4 = {
+++		.family = AF_INET,
+++		.local_ip.s_addr = htonl(INADDR_ANY),
+++		.local_udp_port = htons(port),
+++		.use_udp_checksums = true
+++	};
+++#if IS_ENABLED(CONFIG_IPV6)
+++	int retries = 0;
+++	struct udp_port_cfg port6 = {
+++		.family = AF_INET6,
+++		.local_ip6 = IN6ADDR_ANY_INIT,
+++		.use_udp6_tx_checksums = true,
+++		.use_udp6_rx_checksums = true,
+++		.ipv6_v6only = true
+++	};
+++#endif
+++
+++#if IS_ENABLED(CONFIG_IPV6)
+++retry:
+++#endif
+++
+++	ret = udp_sock_create(wg->creating_net, &port4, &new4);
+++	if (ret < 0) {
+++		pr_err("%s: Could not create IPv4 socket\n", wg->dev->name);
+++		return ret;
+++	}
+++	set_sock_opts(new4);
+++	setup_udp_tunnel_sock(wg->creating_net, new4, &cfg);
+++
+++#if IS_ENABLED(CONFIG_IPV6)
+++	if (ipv6_mod_enabled()) {
+++		port6.local_udp_port = inet_sk(new4->sk)->inet_sport;
+++		ret = udp_sock_create(wg->creating_net, &port6, &new6);
+++		if (ret < 0) {
+++			udp_tunnel_sock_release(new4);
+++			if (ret == -EADDRINUSE && !port && retries++ < 100)
+++				goto retry;
+++			pr_err("%s: Could not create IPv6 socket\n",
+++			       wg->dev->name);
+++			return ret;
+++		}
+++		set_sock_opts(new6);
+++		setup_udp_tunnel_sock(wg->creating_net, new6, &cfg);
+++	}
+++#endif
+++
+++	wg_socket_reinit(wg, new4->sk, new6 ? new6->sk : NULL);
+++	return 0;
+++}
+++
+++void wg_socket_reinit(struct wg_device *wg, struct sock *new4,
+++		      struct sock *new6)
+++{
+++	struct sock *old4, *old6;
+++
+++	mutex_lock(&wg->socket_update_lock);
+++	old4 = rcu_dereference_protected(wg->sock4,
+++				lockdep_is_held(&wg->socket_update_lock));
+++	old6 = rcu_dereference_protected(wg->sock6,
+++				lockdep_is_held(&wg->socket_update_lock));
+++	rcu_assign_pointer(wg->sock4, new4);
+++	rcu_assign_pointer(wg->sock6, new6);
+++	if (new4)
+++		wg->incoming_port = ntohs(inet_sk(new4)->inet_sport);
+++	mutex_unlock(&wg->socket_update_lock);
+++	synchronize_rcu();
+++	synchronize_net();
+++	sock_free(old4);
+++	sock_free(old6);
+++}
++--- /dev/null
+++++ b/drivers/net/wireguard/socket.h
++@@ -0,0 +1,44 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#ifndef _WG_SOCKET_H
+++#define _WG_SOCKET_H
+++
+++#include <linux/netdevice.h>
+++#include <linux/udp.h>
+++#include <linux/if_vlan.h>
+++#include <linux/if_ether.h>
+++
+++int wg_socket_init(struct wg_device *wg, u16 port);
+++void wg_socket_reinit(struct wg_device *wg, struct sock *new4,
+++		      struct sock *new6);
+++int wg_socket_send_buffer_to_peer(struct wg_peer *peer, void *data,
+++				  size_t len, u8 ds);
+++int wg_socket_send_skb_to_peer(struct wg_peer *peer, struct sk_buff *skb,
+++			       u8 ds);
+++int wg_socket_send_buffer_as_reply_to_skb(struct wg_device *wg,
+++					  struct sk_buff *in_skb,
+++					  void *out_buffer, size_t len);
+++
+++int wg_socket_endpoint_from_skb(struct endpoint *endpoint,
+++				const struct sk_buff *skb);
+++void wg_socket_set_peer_endpoint(struct wg_peer *peer,
+++				 const struct endpoint *endpoint);
+++void wg_socket_set_peer_endpoint_from_skb(struct wg_peer *peer,
+++					  const struct sk_buff *skb);
+++void wg_socket_clear_peer_endpoint_src(struct wg_peer *peer);
+++
+++#if defined(CONFIG_DYNAMIC_DEBUG) || defined(DEBUG)
+++#define net_dbg_skb_ratelimited(fmt, dev, skb, ...) do {                       \
+++		struct endpoint __endpoint;                                    \
+++		wg_socket_endpoint_from_skb(&__endpoint, skb);                 \
+++		net_dbg_ratelimited(fmt, dev, &__endpoint.addr,                \
+++				    ##__VA_ARGS__);                            \
+++	} while (0)
+++#else
+++#define net_dbg_skb_ratelimited(fmt, skb, ...)
+++#endif
+++
+++#endif /* _WG_SOCKET_H */
++--- /dev/null
+++++ b/drivers/net/wireguard/timers.c
++@@ -0,0 +1,243 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#include "timers.h"
+++#include "device.h"
+++#include "peer.h"
+++#include "queueing.h"
+++#include "socket.h"
+++
+++/*
+++ * - Timer for retransmitting the handshake if we don't hear back after
+++ * `REKEY_TIMEOUT + jitter` ms.
+++ *
+++ * - Timer for sending empty packet if we have received a packet but after have
+++ * not sent one for `KEEPALIVE_TIMEOUT` ms.
+++ *
+++ * - Timer for initiating new handshake if we have sent a packet but after have
+++ * not received one (even empty) for `(KEEPALIVE_TIMEOUT + REKEY_TIMEOUT) +
+++ * jitter` ms.
+++ *
+++ * - Timer for zeroing out all ephemeral keys after `(REJECT_AFTER_TIME * 3)` ms
+++ * if no new keys have been received.
+++ *
+++ * - Timer for, if enabled, sending an empty authenticated packet every user-
+++ * specified seconds.
+++ */
+++
+++static inline void mod_peer_timer(struct wg_peer *peer,
+++				  struct timer_list *timer,
+++				  unsigned long expires)
+++{
+++	rcu_read_lock_bh();
+++	if (likely(netif_running(peer->device->dev) &&
+++		   !READ_ONCE(peer->is_dead)))
+++		mod_timer(timer, expires);
+++	rcu_read_unlock_bh();
+++}
+++
+++static void wg_expired_retransmit_handshake(struct timer_list *timer)
+++{
+++	struct wg_peer *peer = from_timer(peer, timer,
+++					  timer_retransmit_handshake);
+++
+++	if (peer->timer_handshake_attempts > MAX_TIMER_HANDSHAKES) {
+++		pr_debug("%s: Handshake for peer %llu (%pISpfsc) did not complete after %d attempts, giving up\n",
+++			 peer->device->dev->name, peer->internal_id,
+++			 &peer->endpoint.addr, MAX_TIMER_HANDSHAKES + 2);
+++
+++		del_timer(&peer->timer_send_keepalive);
+++		/* We drop all packets without a keypair and don't try again,
+++		 * if we try unsuccessfully for too long to make a handshake.
+++		 */
+++		wg_packet_purge_staged_packets(peer);
+++
+++		/* We set a timer for destroying any residue that might be left
+++		 * of a partial exchange.
+++		 */
+++		if (!timer_pending(&peer->timer_zero_key_material))
+++			mod_peer_timer(peer, &peer->timer_zero_key_material,
+++				       jiffies + REJECT_AFTER_TIME * 3 * HZ);
+++	} else {
+++		++peer->timer_handshake_attempts;
+++		pr_debug("%s: Handshake for peer %llu (%pISpfsc) did not complete after %d seconds, retrying (try %d)\n",
+++			 peer->device->dev->name, peer->internal_id,
+++			 &peer->endpoint.addr, REKEY_TIMEOUT,
+++			 peer->timer_handshake_attempts + 1);
+++
+++		/* We clear the endpoint address src address, in case this is
+++		 * the cause of trouble.
+++		 */
+++		wg_socket_clear_peer_endpoint_src(peer);
+++
+++		wg_packet_send_queued_handshake_initiation(peer, true);
+++	}
+++}
+++
+++static void wg_expired_send_keepalive(struct timer_list *timer)
+++{
+++	struct wg_peer *peer = from_timer(peer, timer, timer_send_keepalive);
+++
+++	wg_packet_send_keepalive(peer);
+++	if (peer->timer_need_another_keepalive) {
+++		peer->timer_need_another_keepalive = false;
+++		mod_peer_timer(peer, &peer->timer_send_keepalive,
+++			       jiffies + KEEPALIVE_TIMEOUT * HZ);
+++	}
+++}
+++
+++static void wg_expired_new_handshake(struct timer_list *timer)
+++{
+++	struct wg_peer *peer = from_timer(peer, timer, timer_new_handshake);
+++
+++	pr_debug("%s: Retrying handshake with peer %llu (%pISpfsc) because we stopped hearing back after %d seconds\n",
+++		 peer->device->dev->name, peer->internal_id,
+++		 &peer->endpoint.addr, KEEPALIVE_TIMEOUT + REKEY_TIMEOUT);
+++	/* We clear the endpoint address src address, in case this is the cause
+++	 * of trouble.
+++	 */
+++	wg_socket_clear_peer_endpoint_src(peer);
+++	wg_packet_send_queued_handshake_initiation(peer, false);
+++}
+++
+++static void wg_expired_zero_key_material(struct timer_list *timer)
+++{
+++	struct wg_peer *peer = from_timer(peer, timer, timer_zero_key_material);
+++
+++	rcu_read_lock_bh();
+++	if (!READ_ONCE(peer->is_dead)) {
+++		wg_peer_get(peer);
+++		if (!queue_work(peer->device->handshake_send_wq,
+++				&peer->clear_peer_work))
+++			/* If the work was already on the queue, we want to drop
+++			 * the extra reference.
+++			 */
+++			wg_peer_put(peer);
+++	}
+++	rcu_read_unlock_bh();
+++}
+++
+++static void wg_queued_expired_zero_key_material(struct work_struct *work)
+++{
+++	struct wg_peer *peer = container_of(work, struct wg_peer,
+++					    clear_peer_work);
+++
+++	pr_debug("%s: Zeroing out all keys for peer %llu (%pISpfsc), since we haven't received a new one in %d seconds\n",
+++		 peer->device->dev->name, peer->internal_id,
+++		 &peer->endpoint.addr, REJECT_AFTER_TIME * 3);
+++	wg_noise_handshake_clear(&peer->handshake);
+++	wg_noise_keypairs_clear(&peer->keypairs);
+++	wg_peer_put(peer);
+++}
+++
+++static void wg_expired_send_persistent_keepalive(struct timer_list *timer)
+++{
+++	struct wg_peer *peer = from_timer(peer, timer,
+++					  timer_persistent_keepalive);
+++
+++	if (likely(peer->persistent_keepalive_interval))
+++		wg_packet_send_keepalive(peer);
+++}
+++
+++/* Should be called after an authenticated data packet is sent. */
+++void wg_timers_data_sent(struct wg_peer *peer)
+++{
+++	if (!timer_pending(&peer->timer_new_handshake))
+++		mod_peer_timer(peer, &peer->timer_new_handshake,
+++			jiffies + (KEEPALIVE_TIMEOUT + REKEY_TIMEOUT) * HZ +
+++			prandom_u32_max(REKEY_TIMEOUT_JITTER_MAX_JIFFIES));
+++}
+++
+++/* Should be called after an authenticated data packet is received. */
+++void wg_timers_data_received(struct wg_peer *peer)
+++{
+++	if (likely(netif_running(peer->device->dev))) {
+++		if (!timer_pending(&peer->timer_send_keepalive))
+++			mod_peer_timer(peer, &peer->timer_send_keepalive,
+++				       jiffies + KEEPALIVE_TIMEOUT * HZ);
+++		else
+++			peer->timer_need_another_keepalive = true;
+++	}
+++}
+++
+++/* Should be called after any type of authenticated packet is sent, whether
+++ * keepalive, data, or handshake.
+++ */
+++void wg_timers_any_authenticated_packet_sent(struct wg_peer *peer)
+++{
+++	del_timer(&peer->timer_send_keepalive);
+++}
+++
+++/* Should be called after any type of authenticated packet is received, whether
+++ * keepalive, data, or handshake.
+++ */
+++void wg_timers_any_authenticated_packet_received(struct wg_peer *peer)
+++{
+++	del_timer(&peer->timer_new_handshake);
+++}
+++
+++/* Should be called after a handshake initiation message is sent. */
+++void wg_timers_handshake_initiated(struct wg_peer *peer)
+++{
+++	mod_peer_timer(peer, &peer->timer_retransmit_handshake,
+++		       jiffies + REKEY_TIMEOUT * HZ +
+++		       prandom_u32_max(REKEY_TIMEOUT_JITTER_MAX_JIFFIES));
+++}
+++
+++/* Should be called after a handshake response message is received and processed
+++ * or when getting key confirmation via the first data message.
+++ */
+++void wg_timers_handshake_complete(struct wg_peer *peer)
+++{
+++	del_timer(&peer->timer_retransmit_handshake);
+++	peer->timer_handshake_attempts = 0;
+++	peer->sent_lastminute_handshake = false;
+++	ktime_get_real_ts64(&peer->walltime_last_handshake);
+++}
+++
+++/* Should be called after an ephemeral key is created, which is before sending a
+++ * handshake response or after receiving a handshake response.
+++ */
+++void wg_timers_session_derived(struct wg_peer *peer)
+++{
+++	mod_peer_timer(peer, &peer->timer_zero_key_material,
+++		       jiffies + REJECT_AFTER_TIME * 3 * HZ);
+++}
+++
+++/* Should be called before a packet with authentication, whether
+++ * keepalive, data, or handshakem is sent, or after one is received.
+++ */
+++void wg_timers_any_authenticated_packet_traversal(struct wg_peer *peer)
+++{
+++	if (peer->persistent_keepalive_interval)
+++		mod_peer_timer(peer, &peer->timer_persistent_keepalive,
+++			jiffies + peer->persistent_keepalive_interval * HZ);
+++}
+++
+++void wg_timers_init(struct wg_peer *peer)
+++{
+++	timer_setup(&peer->timer_retransmit_handshake,
+++		    wg_expired_retransmit_handshake, 0);
+++	timer_setup(&peer->timer_send_keepalive, wg_expired_send_keepalive, 0);
+++	timer_setup(&peer->timer_new_handshake, wg_expired_new_handshake, 0);
+++	timer_setup(&peer->timer_zero_key_material,
+++		    wg_expired_zero_key_material, 0);
+++	timer_setup(&peer->timer_persistent_keepalive,
+++		    wg_expired_send_persistent_keepalive, 0);
+++	INIT_WORK(&peer->clear_peer_work, wg_queued_expired_zero_key_material);
+++	peer->timer_handshake_attempts = 0;
+++	peer->sent_lastminute_handshake = false;
+++	peer->timer_need_another_keepalive = false;
+++}
+++
+++void wg_timers_stop(struct wg_peer *peer)
+++{
+++	del_timer_sync(&peer->timer_retransmit_handshake);
+++	del_timer_sync(&peer->timer_send_keepalive);
+++	del_timer_sync(&peer->timer_new_handshake);
+++	del_timer_sync(&peer->timer_zero_key_material);
+++	del_timer_sync(&peer->timer_persistent_keepalive);
+++	flush_work(&peer->clear_peer_work);
+++}
++--- /dev/null
+++++ b/drivers/net/wireguard/timers.h
++@@ -0,0 +1,31 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#ifndef _WG_TIMERS_H
+++#define _WG_TIMERS_H
+++
+++#include <linux/ktime.h>
+++
+++struct wg_peer;
+++
+++void wg_timers_init(struct wg_peer *peer);
+++void wg_timers_stop(struct wg_peer *peer);
+++void wg_timers_data_sent(struct wg_peer *peer);
+++void wg_timers_data_received(struct wg_peer *peer);
+++void wg_timers_any_authenticated_packet_sent(struct wg_peer *peer);
+++void wg_timers_any_authenticated_packet_received(struct wg_peer *peer);
+++void wg_timers_handshake_initiated(struct wg_peer *peer);
+++void wg_timers_handshake_complete(struct wg_peer *peer);
+++void wg_timers_session_derived(struct wg_peer *peer);
+++void wg_timers_any_authenticated_packet_traversal(struct wg_peer *peer);
+++
+++static inline bool wg_birthdate_has_expired(u64 birthday_nanoseconds,
+++					    u64 expiration_seconds)
+++{
+++	return (s64)(birthday_nanoseconds + expiration_seconds * NSEC_PER_SEC)
+++		<= (s64)ktime_get_coarse_boottime_ns();
+++}
+++
+++#endif /* _WG_TIMERS_H */
++--- /dev/null
+++++ b/drivers/net/wireguard/version.h
++@@ -0,0 +1 @@
+++#define WIREGUARD_VERSION "1.0.0"
++--- /dev/null
+++++ b/include/uapi/linux/wireguard.h
++@@ -0,0 +1,196 @@
+++/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR MIT */
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ *
+++ * Documentation
+++ * =============
+++ *
+++ * The below enums and macros are for interfacing with WireGuard, using generic
+++ * netlink, with family WG_GENL_NAME and version WG_GENL_VERSION. It defines two
+++ * methods: get and set. Note that while they share many common attributes,
+++ * these two functions actually accept a slightly different set of inputs and
+++ * outputs.
+++ *
+++ * WG_CMD_GET_DEVICE
+++ * -----------------
+++ *
+++ * May only be called via NLM_F_REQUEST | NLM_F_DUMP. The command should contain
+++ * one but not both of:
+++ *
+++ *    WGDEVICE_A_IFINDEX: NLA_U32
+++ *    WGDEVICE_A_IFNAME: NLA_NUL_STRING, maxlen IFNAMESIZ - 1
+++ *
+++ * The kernel will then return several messages (NLM_F_MULTI) containing the
+++ * following tree of nested items:
+++ *
+++ *    WGDEVICE_A_IFINDEX: NLA_U32
+++ *    WGDEVICE_A_IFNAME: NLA_NUL_STRING, maxlen IFNAMESIZ - 1
+++ *    WGDEVICE_A_PRIVATE_KEY: NLA_EXACT_LEN, len WG_KEY_LEN
+++ *    WGDEVICE_A_PUBLIC_KEY: NLA_EXACT_LEN, len WG_KEY_LEN
+++ *    WGDEVICE_A_LISTEN_PORT: NLA_U16
+++ *    WGDEVICE_A_FWMARK: NLA_U32
+++ *    WGDEVICE_A_PEERS: NLA_NESTED
+++ *        0: NLA_NESTED
+++ *            WGPEER_A_PUBLIC_KEY: NLA_EXACT_LEN, len WG_KEY_LEN
+++ *            WGPEER_A_PRESHARED_KEY: NLA_EXACT_LEN, len WG_KEY_LEN
+++ *            WGPEER_A_ENDPOINT: NLA_MIN_LEN(struct sockaddr), struct sockaddr_in or struct sockaddr_in6
+++ *            WGPEER_A_PERSISTENT_KEEPALIVE_INTERVAL: NLA_U16
+++ *            WGPEER_A_LAST_HANDSHAKE_TIME: NLA_EXACT_LEN, struct __kernel_timespec
+++ *            WGPEER_A_RX_BYTES: NLA_U64
+++ *            WGPEER_A_TX_BYTES: NLA_U64
+++ *            WGPEER_A_ALLOWEDIPS: NLA_NESTED
+++ *                0: NLA_NESTED
+++ *                    WGALLOWEDIP_A_FAMILY: NLA_U16
+++ *                    WGALLOWEDIP_A_IPADDR: NLA_MIN_LEN(struct in_addr), struct in_addr or struct in6_addr
+++ *                    WGALLOWEDIP_A_CIDR_MASK: NLA_U8
+++ *                0: NLA_NESTED
+++ *                    ...
+++ *                0: NLA_NESTED
+++ *                    ...
+++ *                ...
+++ *            WGPEER_A_PROTOCOL_VERSION: NLA_U32
+++ *        0: NLA_NESTED
+++ *            ...
+++ *        ...
+++ *
+++ * It is possible that all of the allowed IPs of a single peer will not
+++ * fit within a single netlink message. In that case, the same peer will
+++ * be written in the following message, except it will only contain
+++ * WGPEER_A_PUBLIC_KEY and WGPEER_A_ALLOWEDIPS. This may occur several
+++ * times in a row for the same peer. It is then up to the receiver to
+++ * coalesce adjacent peers. Likewise, it is possible that all peers will
+++ * not fit within a single message. So, subsequent peers will be sent
+++ * in following messages, except those will only contain WGDEVICE_A_IFNAME
+++ * and WGDEVICE_A_PEERS. It is then up to the receiver to coalesce these
+++ * messages to form the complete list of peers.
+++ *
+++ * Since this is an NLA_F_DUMP command, the final message will always be
+++ * NLMSG_DONE, even if an error occurs. However, this NLMSG_DONE message
+++ * contains an integer error code. It is either zero or a negative error
+++ * code corresponding to the errno.
+++ *
+++ * WG_CMD_SET_DEVICE
+++ * -----------------
+++ *
+++ * May only be called via NLM_F_REQUEST. The command should contain the
+++ * following tree of nested items, containing one but not both of
+++ * WGDEVICE_A_IFINDEX and WGDEVICE_A_IFNAME:
+++ *
+++ *    WGDEVICE_A_IFINDEX: NLA_U32
+++ *    WGDEVICE_A_IFNAME: NLA_NUL_STRING, maxlen IFNAMESIZ - 1
+++ *    WGDEVICE_A_FLAGS: NLA_U32, 0 or WGDEVICE_F_REPLACE_PEERS if all current
+++ *                      peers should be removed prior to adding the list below.
+++ *    WGDEVICE_A_PRIVATE_KEY: len WG_KEY_LEN, all zeros to remove
+++ *    WGDEVICE_A_LISTEN_PORT: NLA_U16, 0 to choose randomly
+++ *    WGDEVICE_A_FWMARK: NLA_U32, 0 to disable
+++ *    WGDEVICE_A_PEERS: NLA_NESTED
+++ *        0: NLA_NESTED
+++ *            WGPEER_A_PUBLIC_KEY: len WG_KEY_LEN
+++ *            WGPEER_A_FLAGS: NLA_U32, 0 and/or WGPEER_F_REMOVE_ME if the
+++ *                            specified peer should not exist at the end of the
+++ *                            operation, rather than added/updated and/or
+++ *                            WGPEER_F_REPLACE_ALLOWEDIPS if all current allowed
+++ *                            IPs of this peer should be removed prior to adding
+++ *                            the list below and/or WGPEER_F_UPDATE_ONLY if the
+++ *                            peer should only be set if it already exists.
+++ *            WGPEER_A_PRESHARED_KEY: len WG_KEY_LEN, all zeros to remove
+++ *            WGPEER_A_ENDPOINT: struct sockaddr_in or struct sockaddr_in6
+++ *            WGPEER_A_PERSISTENT_KEEPALIVE_INTERVAL: NLA_U16, 0 to disable
+++ *            WGPEER_A_ALLOWEDIPS: NLA_NESTED
+++ *                0: NLA_NESTED
+++ *                    WGALLOWEDIP_A_FAMILY: NLA_U16
+++ *                    WGALLOWEDIP_A_IPADDR: struct in_addr or struct in6_addr
+++ *                    WGALLOWEDIP_A_CIDR_MASK: NLA_U8
+++ *                0: NLA_NESTED
+++ *                    ...
+++ *                0: NLA_NESTED
+++ *                    ...
+++ *                ...
+++ *            WGPEER_A_PROTOCOL_VERSION: NLA_U32, should not be set or used at
+++ *                                       all by most users of this API, as the
+++ *                                       most recent protocol will be used when
+++ *                                       this is unset. Otherwise, must be set
+++ *                                       to 1.
+++ *        0: NLA_NESTED
+++ *            ...
+++ *        ...
+++ *
+++ * It is possible that the amount of configuration data exceeds that of
+++ * the maximum message length accepted by the kernel. In that case, several
+++ * messages should be sent one after another, with each successive one
+++ * filling in information not contained in the prior. Note that if
+++ * WGDEVICE_F_REPLACE_PEERS is specified in the first message, it probably
+++ * should not be specified in fragments that come after, so that the list
+++ * of peers is only cleared the first time but appened after. Likewise for
+++ * peers, if WGPEER_F_REPLACE_ALLOWEDIPS is specified in the first message
+++ * of a peer, it likely should not be specified in subsequent fragments.
+++ *
+++ * If an error occurs, NLMSG_ERROR will reply containing an errno.
+++ */
+++
+++#ifndef _WG_UAPI_WIREGUARD_H
+++#define _WG_UAPI_WIREGUARD_H
+++
+++#define WG_GENL_NAME "wireguard"
+++#define WG_GENL_VERSION 1
+++
+++#define WG_KEY_LEN 32
+++
+++enum wg_cmd {
+++	WG_CMD_GET_DEVICE,
+++	WG_CMD_SET_DEVICE,
+++	__WG_CMD_MAX
+++};
+++#define WG_CMD_MAX (__WG_CMD_MAX - 1)
+++
+++enum wgdevice_flag {
+++	WGDEVICE_F_REPLACE_PEERS = 1U << 0,
+++	__WGDEVICE_F_ALL = WGDEVICE_F_REPLACE_PEERS
+++};
+++enum wgdevice_attribute {
+++	WGDEVICE_A_UNSPEC,
+++	WGDEVICE_A_IFINDEX,
+++	WGDEVICE_A_IFNAME,
+++	WGDEVICE_A_PRIVATE_KEY,
+++	WGDEVICE_A_PUBLIC_KEY,
+++	WGDEVICE_A_FLAGS,
+++	WGDEVICE_A_LISTEN_PORT,
+++	WGDEVICE_A_FWMARK,
+++	WGDEVICE_A_PEERS,
+++	__WGDEVICE_A_LAST
+++};
+++#define WGDEVICE_A_MAX (__WGDEVICE_A_LAST - 1)
+++
+++enum wgpeer_flag {
+++	WGPEER_F_REMOVE_ME = 1U << 0,
+++	WGPEER_F_REPLACE_ALLOWEDIPS = 1U << 1,
+++	WGPEER_F_UPDATE_ONLY = 1U << 2,
+++	__WGPEER_F_ALL = WGPEER_F_REMOVE_ME | WGPEER_F_REPLACE_ALLOWEDIPS |
+++			 WGPEER_F_UPDATE_ONLY
+++};
+++enum wgpeer_attribute {
+++	WGPEER_A_UNSPEC,
+++	WGPEER_A_PUBLIC_KEY,
+++	WGPEER_A_PRESHARED_KEY,
+++	WGPEER_A_FLAGS,
+++	WGPEER_A_ENDPOINT,
+++	WGPEER_A_PERSISTENT_KEEPALIVE_INTERVAL,
+++	WGPEER_A_LAST_HANDSHAKE_TIME,
+++	WGPEER_A_RX_BYTES,
+++	WGPEER_A_TX_BYTES,
+++	WGPEER_A_ALLOWEDIPS,
+++	WGPEER_A_PROTOCOL_VERSION,
+++	__WGPEER_A_LAST
+++};
+++#define WGPEER_A_MAX (__WGPEER_A_LAST - 1)
+++
+++enum wgallowedip_attribute {
+++	WGALLOWEDIP_A_UNSPEC,
+++	WGALLOWEDIP_A_FAMILY,
+++	WGALLOWEDIP_A_IPADDR,
+++	WGALLOWEDIP_A_CIDR_MASK,
+++	__WGALLOWEDIP_A_LAST
+++};
+++#define WGALLOWEDIP_A_MAX (__WGALLOWEDIP_A_LAST - 1)
+++
+++#endif /* _WG_UAPI_WIREGUARD_H */
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/netns.sh
++@@ -0,0 +1,537 @@
+++#!/bin/bash
+++# SPDX-License-Identifier: GPL-2.0
+++#
+++# Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++#
+++# This script tests the below topology:
+++#
+++# ┌─────────────────────�   ┌──────────────────────────────────�   ┌─────────────────────�
+++# │   $ns1 namespace    │   │          $ns0 namespace          │   │   $ns2 namespace    │
+++# │                     │   │                                  │   │                     │
+++# │┌────────�           │   │            ┌────────�            │   │           ┌────────�│
+++# ││  wg0   │───────────┼───┼────────────│   lo   │────────────┼───┼───────────│  wg0   ││
+++# │├────────┴──────────�│   │    ┌───────┴────────┴────────�   │   │┌──────────┴────────┤│
+++# ││192.168.241.1/24   ││   │    │(ns1)         (ns2)      │   │   ││192.168.241.2/24   ││
+++# ││fd00::1/24         ││   │    │127.0.0.1:1   127.0.0.1:2│   │   ││fd00::2/24         ││
+++# │└───────────────────┘│   │    │[::]:1        [::]:2     │   │   │└───────────────────┘│
+++# └─────────────────────┘   │    └─────────────────────────┘   │   └─────────────────────┘
+++#                           └──────────────────────────────────┘
+++#
+++# After the topology is prepared we run a series of TCP/UDP iperf3 tests between the
+++# wireguard peers in $ns1 and $ns2. Note that $ns0 is the endpoint for the wg0
+++# interfaces in $ns1 and $ns2. See https://www.wireguard.com/netns/ for further
+++# details on how this is accomplished.
+++set -e
+++
+++exec 3>&1
+++export WG_HIDE_KEYS=never
+++netns0="wg-test-$$-0"
+++netns1="wg-test-$$-1"
+++netns2="wg-test-$$-2"
+++pretty() { echo -e "\x1b[32m\x1b[1m[+] ${1:+NS$1: }${2}\x1b[0m" >&3; }
+++pp() { pretty "" "$*"; "$@"; }
+++maybe_exec() { if [[ $BASHPID -eq $$ ]]; then "$@"; else exec "$@"; fi; }
+++n0() { pretty 0 "$*"; maybe_exec ip netns exec $netns0 "$@"; }
+++n1() { pretty 1 "$*"; maybe_exec ip netns exec $netns1 "$@"; }
+++n2() { pretty 2 "$*"; maybe_exec ip netns exec $netns2 "$@"; }
+++ip0() { pretty 0 "ip $*"; ip -n $netns0 "$@"; }
+++ip1() { pretty 1 "ip $*"; ip -n $netns1 "$@"; }
+++ip2() { pretty 2 "ip $*"; ip -n $netns2 "$@"; }
+++sleep() { read -t "$1" -N 0 || true; }
+++waitiperf() { pretty "${1//*-}" "wait for iperf:5201"; while [[ $(ss -N "$1" -tlp 'sport = 5201') != *iperf3* ]]; do sleep 0.1; done; }
+++waitncatudp() { pretty "${1//*-}" "wait for udp:1111"; while [[ $(ss -N "$1" -ulp 'sport = 1111') != *ncat* ]]; do sleep 0.1; done; }
+++waitncattcp() { pretty "${1//*-}" "wait for tcp:1111"; while [[ $(ss -N "$1" -tlp 'sport = 1111') != *ncat* ]]; do sleep 0.1; done; }
+++waitiface() { pretty "${1//*-}" "wait for $2 to come up"; ip netns exec "$1" bash -c "while [[ \$(< \"/sys/class/net/$2/operstate\") != up ]]; do read -t .1 -N 0 || true; done;"; }
+++
+++cleanup() {
+++	set +e
+++	exec 2>/dev/null
+++	printf "$orig_message_cost" > /proc/sys/net/core/message_cost
+++	ip0 link del dev wg0
+++	ip1 link del dev wg0
+++	ip2 link del dev wg0
+++	local to_kill="$(ip netns pids $netns0) $(ip netns pids $netns1) $(ip netns pids $netns2)"
+++	[[ -n $to_kill ]] && kill $to_kill
+++	pp ip netns del $netns1
+++	pp ip netns del $netns2
+++	pp ip netns del $netns0
+++	exit
+++}
+++
+++orig_message_cost="$(< /proc/sys/net/core/message_cost)"
+++trap cleanup EXIT
+++printf 0 > /proc/sys/net/core/message_cost
+++
+++ip netns del $netns0 2>/dev/null || true
+++ip netns del $netns1 2>/dev/null || true
+++ip netns del $netns2 2>/dev/null || true
+++pp ip netns add $netns0
+++pp ip netns add $netns1
+++pp ip netns add $netns2
+++ip0 link set up dev lo
+++
+++ip0 link add dev wg0 type wireguard
+++ip0 link set wg0 netns $netns1
+++ip0 link add dev wg0 type wireguard
+++ip0 link set wg0 netns $netns2
+++key1="$(pp wg genkey)"
+++key2="$(pp wg genkey)"
+++key3="$(pp wg genkey)"
+++pub1="$(pp wg pubkey <<<"$key1")"
+++pub2="$(pp wg pubkey <<<"$key2")"
+++pub3="$(pp wg pubkey <<<"$key3")"
+++psk="$(pp wg genpsk)"
+++[[ -n $key1 && -n $key2 && -n $psk ]]
+++
+++configure_peers() {
+++	ip1 addr add 192.168.241.1/24 dev wg0
+++	ip1 addr add fd00::1/24 dev wg0
+++
+++	ip2 addr add 192.168.241.2/24 dev wg0
+++	ip2 addr add fd00::2/24 dev wg0
+++
+++	n1 wg set wg0 \
+++		private-key <(echo "$key1") \
+++		listen-port 1 \
+++		peer "$pub2" \
+++			preshared-key <(echo "$psk") \
+++			allowed-ips 192.168.241.2/32,fd00::2/128
+++	n2 wg set wg0 \
+++		private-key <(echo "$key2") \
+++		listen-port 2 \
+++		peer "$pub1" \
+++			preshared-key <(echo "$psk") \
+++			allowed-ips 192.168.241.1/32,fd00::1/128
+++
+++	ip1 link set up dev wg0
+++	ip2 link set up dev wg0
+++}
+++configure_peers
+++
+++tests() {
+++	# Ping over IPv4
+++	n2 ping -c 10 -f -W 1 192.168.241.1
+++	n1 ping -c 10 -f -W 1 192.168.241.2
+++
+++	# Ping over IPv6
+++	n2 ping6 -c 10 -f -W 1 fd00::1
+++	n1 ping6 -c 10 -f -W 1 fd00::2
+++
+++	# TCP over IPv4
+++	n2 iperf3 -s -1 -B 192.168.241.2 &
+++	waitiperf $netns2
+++	n1 iperf3 -Z -t 3 -c 192.168.241.2
+++
+++	# TCP over IPv6
+++	n1 iperf3 -s -1 -B fd00::1 &
+++	waitiperf $netns1
+++	n2 iperf3 -Z -t 3 -c fd00::1
+++
+++	# UDP over IPv4
+++	n1 iperf3 -s -1 -B 192.168.241.1 &
+++	waitiperf $netns1
+++	n2 iperf3 -Z -t 3 -b 0 -u -c 192.168.241.1
+++
+++	# UDP over IPv6
+++	n2 iperf3 -s -1 -B fd00::2 &
+++	waitiperf $netns2
+++	n1 iperf3 -Z -t 3 -b 0 -u -c fd00::2
+++}
+++
+++[[ $(ip1 link show dev wg0) =~ mtu\ ([0-9]+) ]] && orig_mtu="${BASH_REMATCH[1]}"
+++big_mtu=$(( 34816 - 1500 + $orig_mtu ))
+++
+++# Test using IPv4 as outer transport
+++n1 wg set wg0 peer "$pub2" endpoint 127.0.0.1:2
+++n2 wg set wg0 peer "$pub1" endpoint 127.0.0.1:1
+++# Before calling tests, we first make sure that the stats counters and timestamper are working
+++n2 ping -c 10 -f -W 1 192.168.241.1
+++{ read _; read _; read _; read rx_bytes _; read _; read tx_bytes _; } < <(ip2 -stats link show dev wg0)
+++(( rx_bytes == 1372 && (tx_bytes == 1428 || tx_bytes == 1460) ))
+++{ read _; read _; read _; read rx_bytes _; read _; read tx_bytes _; } < <(ip1 -stats link show dev wg0)
+++(( tx_bytes == 1372 && (rx_bytes == 1428 || rx_bytes == 1460) ))
+++read _ rx_bytes tx_bytes < <(n2 wg show wg0 transfer)
+++(( rx_bytes == 1372 && (tx_bytes == 1428 || tx_bytes == 1460) ))
+++read _ rx_bytes tx_bytes < <(n1 wg show wg0 transfer)
+++(( tx_bytes == 1372 && (rx_bytes == 1428 || rx_bytes == 1460) ))
+++read _ timestamp < <(n1 wg show wg0 latest-handshakes)
+++(( timestamp != 0 ))
+++
+++tests
+++ip1 link set wg0 mtu $big_mtu
+++ip2 link set wg0 mtu $big_mtu
+++tests
+++
+++ip1 link set wg0 mtu $orig_mtu
+++ip2 link set wg0 mtu $orig_mtu
+++
+++# Test using IPv6 as outer transport
+++n1 wg set wg0 peer "$pub2" endpoint [::1]:2
+++n2 wg set wg0 peer "$pub1" endpoint [::1]:1
+++tests
+++ip1 link set wg0 mtu $big_mtu
+++ip2 link set wg0 mtu $big_mtu
+++tests
+++
+++# Test that route MTUs work with the padding
+++ip1 link set wg0 mtu 1300
+++ip2 link set wg0 mtu 1300
+++n1 wg set wg0 peer "$pub2" endpoint 127.0.0.1:2
+++n2 wg set wg0 peer "$pub1" endpoint 127.0.0.1:1
+++n0 iptables -A INPUT -m length --length 1360 -j DROP
+++n1 ip route add 192.168.241.2/32 dev wg0 mtu 1299
+++n2 ip route add 192.168.241.1/32 dev wg0 mtu 1299
+++n2 ping -c 1 -W 1 -s 1269 192.168.241.1
+++n2 ip route delete 192.168.241.1/32 dev wg0 mtu 1299
+++n1 ip route delete 192.168.241.2/32 dev wg0 mtu 1299
+++n0 iptables -F INPUT
+++
+++ip1 link set wg0 mtu $orig_mtu
+++ip2 link set wg0 mtu $orig_mtu
+++
+++# Test using IPv4 that roaming works
+++ip0 -4 addr del 127.0.0.1/8 dev lo
+++ip0 -4 addr add 127.212.121.99/8 dev lo
+++n1 wg set wg0 listen-port 9999
+++n1 wg set wg0 peer "$pub2" endpoint 127.0.0.1:2
+++n1 ping6 -W 1 -c 1 fd00::2
+++[[ $(n2 wg show wg0 endpoints) == "$pub1	127.212.121.99:9999" ]]
+++
+++# Test using IPv6 that roaming works
+++n1 wg set wg0 listen-port 9998
+++n1 wg set wg0 peer "$pub2" endpoint [::1]:2
+++n1 ping -W 1 -c 1 192.168.241.2
+++[[ $(n2 wg show wg0 endpoints) == "$pub1	[::1]:9998" ]]
+++
+++# Test that crypto-RP filter works
+++n1 wg set wg0 peer "$pub2" allowed-ips 192.168.241.0/24
+++exec 4< <(n1 ncat -l -u -p 1111)
+++ncat_pid=$!
+++waitncatudp $netns1
+++n2 ncat -u 192.168.241.1 1111 <<<"X"
+++read -r -N 1 -t 1 out <&4 && [[ $out == "X" ]]
+++kill $ncat_pid
+++more_specific_key="$(pp wg genkey | pp wg pubkey)"
+++n1 wg set wg0 peer "$more_specific_key" allowed-ips 192.168.241.2/32
+++n2 wg set wg0 listen-port 9997
+++exec 4< <(n1 ncat -l -u -p 1111)
+++ncat_pid=$!
+++waitncatudp $netns1
+++n2 ncat -u 192.168.241.1 1111 <<<"X"
+++! read -r -N 1 -t 1 out <&4 || false
+++kill $ncat_pid
+++n1 wg set wg0 peer "$more_specific_key" remove
+++[[ $(n1 wg show wg0 endpoints) == "$pub2	[::1]:9997" ]]
+++
+++# Test that we can change private keys keys and immediately handshake
+++n1 wg set wg0 private-key <(echo "$key1") peer "$pub2" preshared-key <(echo "$psk") allowed-ips 192.168.241.2/32 endpoint 127.0.0.1:2
+++n2 wg set wg0 private-key <(echo "$key2") listen-port 2 peer "$pub1" preshared-key <(echo "$psk") allowed-ips 192.168.241.1/32
+++n1 ping -W 1 -c 1 192.168.241.2
+++n1 wg set wg0 private-key <(echo "$key3")
+++n2 wg set wg0 peer "$pub3" preshared-key <(echo "$psk") allowed-ips 192.168.241.1/32 peer "$pub1" remove
+++n1 ping -W 1 -c 1 192.168.241.2
+++
+++ip1 link del wg0
+++ip2 link del wg0
+++
+++# Test using NAT. We now change the topology to this:
+++# ┌────────────────────────────────────────�    ┌────────────────────────────────────────────────�     ┌────────────────────────────────────────�
+++# │             $ns1 namespace             │    │                 $ns0 namespace                 │     │             $ns2 namespace             │
+++# │                                        │    │                                                │     │                                        │
+++# │  ┌─────�             ┌─────�           │    │    ┌──────�              ┌──────�              │     │  ┌─────�            ┌─────�            │
+++# │  │ wg0 │─────────────│vethc│───────────┼────┼────│vethrc│              │vethrs│──────────────┼─────┼──│veths│────────────│ wg0 │            │
+++# │  ├─────┴──────────�  ├─────┴──────────�│    │    ├──────┴─────────�    ├──────┴────────────� │     │  ├─────┴──────────� ├─────┴──────────� │
+++# │  │192.168.241.1/24│  │192.168.1.100/24││    │    │192.168.1.1/24  │    │10.0.0.1/24        │ │     │  │10.0.0.100/24   │ │192.168.241.2/24│ │
+++# │  │fd00::1/24      │  │                ││    │    │                │    │SNAT:192.168.1.0/24│ │     │  │                │ │fd00::2/24      │ │
+++# │  └────────────────┘  └────────────────┘│    │    └────────────────┘    └───────────────────┘ │     │  └────────────────┘ └────────────────┘ │
+++# └────────────────────────────────────────┘    └────────────────────────────────────────────────┘     └────────────────────────────────────────┘
+++
+++ip1 link add dev wg0 type wireguard
+++ip2 link add dev wg0 type wireguard
+++configure_peers
+++
+++ip0 link add vethrc type veth peer name vethc
+++ip0 link add vethrs type veth peer name veths
+++ip0 link set vethc netns $netns1
+++ip0 link set veths netns $netns2
+++ip0 link set vethrc up
+++ip0 link set vethrs up
+++ip0 addr add 192.168.1.1/24 dev vethrc
+++ip0 addr add 10.0.0.1/24 dev vethrs
+++ip1 addr add 192.168.1.100/24 dev vethc
+++ip1 link set vethc up
+++ip1 route add default via 192.168.1.1
+++ip2 addr add 10.0.0.100/24 dev veths
+++ip2 link set veths up
+++waitiface $netns0 vethrc
+++waitiface $netns0 vethrs
+++waitiface $netns1 vethc
+++waitiface $netns2 veths
+++
+++n0 bash -c 'printf 1 > /proc/sys/net/ipv4/ip_forward'
+++n0 bash -c 'printf 2 > /proc/sys/net/netfilter/nf_conntrack_udp_timeout'
+++n0 bash -c 'printf 2 > /proc/sys/net/netfilter/nf_conntrack_udp_timeout_stream'
+++n0 iptables -t nat -A POSTROUTING -s 192.168.1.0/24 -d 10.0.0.0/24 -j SNAT --to 10.0.0.1
+++
+++n1 wg set wg0 peer "$pub2" endpoint 10.0.0.100:2 persistent-keepalive 1
+++n1 ping -W 1 -c 1 192.168.241.2
+++n2 ping -W 1 -c 1 192.168.241.1
+++[[ $(n2 wg show wg0 endpoints) == "$pub1	10.0.0.1:1" ]]
+++# Demonstrate n2 can still send packets to n1, since persistent-keepalive will prevent connection tracking entry from expiring (to see entries: `n0 conntrack -L`).
+++pp sleep 3
+++n2 ping -W 1 -c 1 192.168.241.1
+++n1 wg set wg0 peer "$pub2" persistent-keepalive 0
+++
+++# Do a wg-quick(8)-style policy routing for the default route, making sure vethc has a v6 address to tease out bugs.
+++ip1 -6 addr add fc00::9/96 dev vethc
+++ip1 -6 route add default via fc00::1
+++ip2 -4 addr add 192.168.99.7/32 dev wg0
+++ip2 -6 addr add abab::1111/128 dev wg0
+++n1 wg set wg0 fwmark 51820 peer "$pub2" allowed-ips 192.168.99.7,abab::1111
+++ip1 -6 route add default dev wg0 table 51820
+++ip1 -6 rule add not fwmark 51820 table 51820
+++ip1 -6 rule add table main suppress_prefixlength 0
+++ip1 -4 route add default dev wg0 table 51820
+++ip1 -4 rule add not fwmark 51820 table 51820
+++ip1 -4 rule add table main suppress_prefixlength 0
+++# suppress_prefixlength only got added in 3.12, and we want to support 3.10+.
+++if [[ $(ip1 -4 rule show all) == *suppress_prefixlength* ]]; then
+++	# Flood the pings instead of sending just one, to trigger routing table reference counting bugs.
+++	n1 ping -W 1 -c 100 -f 192.168.99.7
+++	n1 ping -W 1 -c 100 -f abab::1111
+++fi
+++
+++n0 iptables -t nat -F
+++ip0 link del vethrc
+++ip0 link del vethrs
+++ip1 link del wg0
+++ip2 link del wg0
+++
+++# Test that saddr routing is sticky but not too sticky, changing to this topology:
+++# ┌────────────────────────────────────────�    ┌────────────────────────────────────────�
+++# │             $ns1 namespace             │    │             $ns2 namespace             │
+++# │                                        │    │                                        │
+++# │  ┌─────�             ┌─────�           │    │  ┌─────�            ┌─────�            │
+++# │  │ wg0 │─────────────│veth1│───────────┼────┼──│veth2│────────────│ wg0 │            │
+++# │  ├─────┴──────────�  ├─────┴──────────�│    │  ├─────┴──────────� ├─────┴──────────� │
+++# │  │192.168.241.1/24│  │10.0.0.1/24     ││    │  │10.0.0.2/24     │ │192.168.241.2/24│ │
+++# │  │fd00::1/24      │  │fd00:aa::1/96   ││    │  │fd00:aa::2/96   │ │fd00::2/24      │ │
+++# │  └────────────────┘  └────────────────┘│    │  └────────────────┘ └────────────────┘ │
+++# └────────────────────────────────────────┘    └────────────────────────────────────────┘
+++
+++ip1 link add dev wg0 type wireguard
+++ip2 link add dev wg0 type wireguard
+++configure_peers
+++ip1 link add veth1 type veth peer name veth2
+++ip1 link set veth2 netns $netns2
+++n1 bash -c 'printf 0 > /proc/sys/net/ipv6/conf/all/accept_dad'
+++n2 bash -c 'printf 0 > /proc/sys/net/ipv6/conf/all/accept_dad'
+++n1 bash -c 'printf 0 > /proc/sys/net/ipv6/conf/veth1/accept_dad'
+++n2 bash -c 'printf 0 > /proc/sys/net/ipv6/conf/veth2/accept_dad'
+++n1 bash -c 'printf 1 > /proc/sys/net/ipv4/conf/veth1/promote_secondaries'
+++
+++# First we check that we aren't overly sticky and can fall over to new IPs when old ones are removed
+++ip1 addr add 10.0.0.1/24 dev veth1
+++ip1 addr add fd00:aa::1/96 dev veth1
+++ip2 addr add 10.0.0.2/24 dev veth2
+++ip2 addr add fd00:aa::2/96 dev veth2
+++ip1 link set veth1 up
+++ip2 link set veth2 up
+++waitiface $netns1 veth1
+++waitiface $netns2 veth2
+++n1 wg set wg0 peer "$pub2" endpoint 10.0.0.2:2
+++n1 ping -W 1 -c 1 192.168.241.2
+++ip1 addr add 10.0.0.10/24 dev veth1
+++ip1 addr del 10.0.0.1/24 dev veth1
+++n1 ping -W 1 -c 1 192.168.241.2
+++n1 wg set wg0 peer "$pub2" endpoint [fd00:aa::2]:2
+++n1 ping -W 1 -c 1 192.168.241.2
+++ip1 addr add fd00:aa::10/96 dev veth1
+++ip1 addr del fd00:aa::1/96 dev veth1
+++n1 ping -W 1 -c 1 192.168.241.2
+++
+++# Now we show that we can successfully do reply to sender routing
+++ip1 link set veth1 down
+++ip2 link set veth2 down
+++ip1 addr flush dev veth1
+++ip2 addr flush dev veth2
+++ip1 addr add 10.0.0.1/24 dev veth1
+++ip1 addr add 10.0.0.2/24 dev veth1
+++ip1 addr add fd00:aa::1/96 dev veth1
+++ip1 addr add fd00:aa::2/96 dev veth1
+++ip2 addr add 10.0.0.3/24 dev veth2
+++ip2 addr add fd00:aa::3/96 dev veth2
+++ip1 link set veth1 up
+++ip2 link set veth2 up
+++waitiface $netns1 veth1
+++waitiface $netns2 veth2
+++n2 wg set wg0 peer "$pub1" endpoint 10.0.0.1:1
+++n2 ping -W 1 -c 1 192.168.241.1
+++[[ $(n2 wg show wg0 endpoints) == "$pub1	10.0.0.1:1" ]]
+++n2 wg set wg0 peer "$pub1" endpoint [fd00:aa::1]:1
+++n2 ping -W 1 -c 1 192.168.241.1
+++[[ $(n2 wg show wg0 endpoints) == "$pub1	[fd00:aa::1]:1" ]]
+++n2 wg set wg0 peer "$pub1" endpoint 10.0.0.2:1
+++n2 ping -W 1 -c 1 192.168.241.1
+++[[ $(n2 wg show wg0 endpoints) == "$pub1	10.0.0.2:1" ]]
+++n2 wg set wg0 peer "$pub1" endpoint [fd00:aa::2]:1
+++n2 ping -W 1 -c 1 192.168.241.1
+++[[ $(n2 wg show wg0 endpoints) == "$pub1	[fd00:aa::2]:1" ]]
+++
+++# What happens if the inbound destination address belongs to a different interface as the default route?
+++ip1 link add dummy0 type dummy
+++ip1 addr add 10.50.0.1/24 dev dummy0
+++ip1 link set dummy0 up
+++ip2 route add 10.50.0.0/24 dev veth2
+++n2 wg set wg0 peer "$pub1" endpoint 10.50.0.1:1
+++n2 ping -W 1 -c 1 192.168.241.1
+++[[ $(n2 wg show wg0 endpoints) == "$pub1	10.50.0.1:1" ]]
+++
+++ip1 link del dummy0
+++ip1 addr flush dev veth1
+++ip2 addr flush dev veth2
+++ip1 route flush dev veth1
+++ip2 route flush dev veth2
+++
+++# Now we see what happens if another interface route takes precedence over an ongoing one
+++ip1 link add veth3 type veth peer name veth4
+++ip1 link set veth4 netns $netns2
+++ip1 addr add 10.0.0.1/24 dev veth1
+++ip2 addr add 10.0.0.2/24 dev veth2
+++ip1 addr add 10.0.0.3/24 dev veth3
+++ip1 link set veth1 up
+++ip2 link set veth2 up
+++ip1 link set veth3 up
+++ip2 link set veth4 up
+++waitiface $netns1 veth1
+++waitiface $netns2 veth2
+++waitiface $netns1 veth3
+++waitiface $netns2 veth4
+++ip1 route flush dev veth1
+++ip1 route flush dev veth3
+++ip1 route add 10.0.0.0/24 dev veth1 src 10.0.0.1 metric 2
+++n1 wg set wg0 peer "$pub2" endpoint 10.0.0.2:2
+++n1 ping -W 1 -c 1 192.168.241.2
+++[[ $(n2 wg show wg0 endpoints) == "$pub1	10.0.0.1:1" ]]
+++ip1 route add 10.0.0.0/24 dev veth3 src 10.0.0.3 metric 1
+++n1 bash -c 'printf 0 > /proc/sys/net/ipv4/conf/veth1/rp_filter'
+++n2 bash -c 'printf 0 > /proc/sys/net/ipv4/conf/veth4/rp_filter'
+++n1 bash -c 'printf 0 > /proc/sys/net/ipv4/conf/all/rp_filter'
+++n2 bash -c 'printf 0 > /proc/sys/net/ipv4/conf/all/rp_filter'
+++n1 ping -W 1 -c 1 192.168.241.2
+++[[ $(n2 wg show wg0 endpoints) == "$pub1	10.0.0.3:1" ]]
+++
+++ip1 link del veth1
+++ip1 link del veth3
+++ip1 link del wg0
+++ip2 link del wg0
+++
+++# We test that Netlink/IPC is working properly by doing things that usually cause split responses
+++ip0 link add dev wg0 type wireguard
+++config=( "[Interface]" "PrivateKey=$(wg genkey)" "[Peer]" "PublicKey=$(wg genkey)" )
+++for a in {1..255}; do
+++	for b in {0..255}; do
+++		config+=( "AllowedIPs=$a.$b.0.0/16,$a::$b/128" )
+++	done
+++done
+++n0 wg setconf wg0 <(printf '%s\n' "${config[@]}")
+++i=0
+++for ip in $(n0 wg show wg0 allowed-ips); do
+++	((++i))
+++done
+++((i == 255*256*2+1))
+++ip0 link del wg0
+++ip0 link add dev wg0 type wireguard
+++config=( "[Interface]" "PrivateKey=$(wg genkey)" )
+++for a in {1..40}; do
+++	config+=( "[Peer]" "PublicKey=$(wg genkey)" )
+++	for b in {1..52}; do
+++		config+=( "AllowedIPs=$a.$b.0.0/16" )
+++	done
+++done
+++n0 wg setconf wg0 <(printf '%s\n' "${config[@]}")
+++i=0
+++while read -r line; do
+++	j=0
+++	for ip in $line; do
+++		((++j))
+++	done
+++	((j == 53))
+++	((++i))
+++done < <(n0 wg show wg0 allowed-ips)
+++((i == 40))
+++ip0 link del wg0
+++ip0 link add wg0 type wireguard
+++config=( )
+++for i in {1..29}; do
+++	config+=( "[Peer]" "PublicKey=$(wg genkey)" )
+++done
+++config+=( "[Peer]" "PublicKey=$(wg genkey)" "AllowedIPs=255.2.3.4/32,abcd::255/128" )
+++n0 wg setconf wg0 <(printf '%s\n' "${config[@]}")
+++n0 wg showconf wg0 > /dev/null
+++ip0 link del wg0
+++
+++allowedips=( )
+++for i in {1..197}; do
+++        allowedips+=( abcd::$i )
+++done
+++saved_ifs="$IFS"
+++IFS=,
+++allowedips="${allowedips[*]}"
+++IFS="$saved_ifs"
+++ip0 link add wg0 type wireguard
+++n0 wg set wg0 peer "$pub1"
+++n0 wg set wg0 peer "$pub2" allowed-ips "$allowedips"
+++{
+++	read -r pub allowedips
+++	[[ $pub == "$pub1" && $allowedips == "(none)" ]]
+++	read -r pub allowedips
+++	[[ $pub == "$pub2" ]]
+++	i=0
+++	for _ in $allowedips; do
+++		((++i))
+++	done
+++	((i == 197))
+++} < <(n0 wg show wg0 allowed-ips)
+++ip0 link del wg0
+++
+++! n0 wg show doesnotexist || false
+++
+++ip0 link add wg0 type wireguard
+++n0 wg set wg0 private-key <(echo "$key1") peer "$pub2" preshared-key <(echo "$psk")
+++[[ $(n0 wg show wg0 private-key) == "$key1" ]]
+++[[ $(n0 wg show wg0 preshared-keys) == "$pub2	$psk" ]]
+++n0 wg set wg0 private-key /dev/null peer "$pub2" preshared-key /dev/null
+++[[ $(n0 wg show wg0 private-key) == "(none)" ]]
+++[[ $(n0 wg show wg0 preshared-keys) == "$pub2	(none)" ]]
+++n0 wg set wg0 peer "$pub2"
+++n0 wg set wg0 private-key <(echo "$key2")
+++[[ $(n0 wg show wg0 public-key) == "$pub2" ]]
+++[[ -z $(n0 wg show wg0 peers) ]]
+++n0 wg set wg0 peer "$pub2"
+++[[ -z $(n0 wg show wg0 peers) ]]
+++n0 wg set wg0 private-key <(echo "$key1")
+++n0 wg set wg0 peer "$pub2"
+++[[ $(n0 wg show wg0 peers) == "$pub2" ]]
+++n0 wg set wg0 private-key <(echo "/${key1:1}")
+++[[ $(n0 wg show wg0 private-key) == "+${key1:1}" ]]
+++n0 wg set wg0 peer "$pub2" allowed-ips 0.0.0.0/0,10.0.0.0/8,100.0.0.0/10,172.16.0.0/12,192.168.0.0/16
+++n0 wg set wg0 peer "$pub2" allowed-ips 0.0.0.0/0
+++n0 wg set wg0 peer "$pub2" allowed-ips ::/0,1700::/111,5000::/4,e000::/37,9000::/75
+++n0 wg set wg0 peer "$pub2" allowed-ips ::/0
+++ip0 link del wg0
+++
+++declare -A objects
+++while read -t 0.1 -r line 2>/dev/null || [[ $? -ne 142 ]]; do
+++	[[ $line =~ .*(wg[0-9]+:\ [A-Z][a-z]+\ [0-9]+)\ .*(created|destroyed).* ]] || continue
+++	objects["${BASH_REMATCH[1]}"]+="${BASH_REMATCH[2]}"
+++done < /dev/kmsg
+++alldeleted=1
+++for object in "${!objects[@]}"; do
+++	if [[ ${objects["$object"]} != *createddestroyed ]]; then
+++		echo "Error: $object: merely ${objects["$object"]}" >&3
+++		alldeleted=0
+++	fi
+++done
+++[[ $alldeleted -eq 1 ]]
+++pretty "" "Objects that were created were also destroyed."
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0073-wireguard-selftests-import-harness-makefile-for-test.patch b/target/linux/generic/backport-5.4/080-wireguard-0073-wireguard-selftests-import-harness-makefile-for-test.patch
+new file mode 100644
+index 0000000000..ca3853aa19
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0073-wireguard-selftests-import-harness-makefile-for-test.patch
+@@ -0,0 +1,1078 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Sun, 15 Dec 2019 22:08:00 +0100
++Subject: [PATCH] wireguard: selftests: import harness makefile for test suite
++
++commit 65d88d04114bca7d85faebd5fed61069cb2b632c upstream.
++
++WireGuard has been using this on build.wireguard.com for the last
++several years with considerable success. It allows for very quick and
++iterative development cycles, and supports several platforms.
++
++To run the test suite on your current platform in QEMU:
++
++  $ make -C tools/testing/selftests/wireguard/qemu -j$(nproc)
++
++To run it with KASAN and such turned on:
++
++  $ DEBUG_KERNEL=yes make -C tools/testing/selftests/wireguard/qemu -j$(nproc)
++
++To run it emulated for another platform in QEMU:
++
++  $ ARCH=arm make -C tools/testing/selftests/wireguard/qemu -j$(nproc)
++
++At the moment, we support aarch64_be, aarch64, arm, armeb, i686, m68k,
++mips64, mips64el, mips, mipsel, powerpc64le, powerpc, and x86_64.
++
++The system supports incremental rebuilding, so it should be very fast to
++change a single file and then test it out and have immediate feedback.
++
++This requires for the right toolchain and qemu to be installed prior.
++I've had success with those from musl.cc.
++
++This is tailored for WireGuard at the moment, though later projects
++might generalize it for other network testing.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ .../selftests/wireguard/qemu/.gitignore       |   2 +
++ .../testing/selftests/wireguard/qemu/Makefile | 385 ++++++++++++++++++
++ .../wireguard/qemu/arch/aarch64.config        |   5 +
++ .../wireguard/qemu/arch/aarch64_be.config     |   6 +
++ .../selftests/wireguard/qemu/arch/arm.config  |   9 +
++ .../wireguard/qemu/arch/armeb.config          |  10 +
++ .../selftests/wireguard/qemu/arch/i686.config |   5 +
++ .../selftests/wireguard/qemu/arch/m68k.config |   9 +
++ .../selftests/wireguard/qemu/arch/mips.config |  11 +
++ .../wireguard/qemu/arch/mips64.config         |  14 +
++ .../wireguard/qemu/arch/mips64el.config       |  15 +
++ .../wireguard/qemu/arch/mipsel.config         |  12 +
++ .../wireguard/qemu/arch/powerpc.config        |  10 +
++ .../wireguard/qemu/arch/powerpc64le.config    |  12 +
++ .../wireguard/qemu/arch/x86_64.config         |   5 +
++ .../selftests/wireguard/qemu/debug.config     |  67 +++
++ tools/testing/selftests/wireguard/qemu/init.c | 284 +++++++++++++
++ .../selftests/wireguard/qemu/kernel.config    |  86 ++++
++ 18 files changed, 947 insertions(+)
++ create mode 100644 tools/testing/selftests/wireguard/qemu/.gitignore
++ create mode 100644 tools/testing/selftests/wireguard/qemu/Makefile
++ create mode 100644 tools/testing/selftests/wireguard/qemu/arch/aarch64.config
++ create mode 100644 tools/testing/selftests/wireguard/qemu/arch/aarch64_be.config
++ create mode 100644 tools/testing/selftests/wireguard/qemu/arch/arm.config
++ create mode 100644 tools/testing/selftests/wireguard/qemu/arch/armeb.config
++ create mode 100644 tools/testing/selftests/wireguard/qemu/arch/i686.config
++ create mode 100644 tools/testing/selftests/wireguard/qemu/arch/m68k.config
++ create mode 100644 tools/testing/selftests/wireguard/qemu/arch/mips.config
++ create mode 100644 tools/testing/selftests/wireguard/qemu/arch/mips64.config
++ create mode 100644 tools/testing/selftests/wireguard/qemu/arch/mips64el.config
++ create mode 100644 tools/testing/selftests/wireguard/qemu/arch/mipsel.config
++ create mode 100644 tools/testing/selftests/wireguard/qemu/arch/powerpc.config
++ create mode 100644 tools/testing/selftests/wireguard/qemu/arch/powerpc64le.config
++ create mode 100644 tools/testing/selftests/wireguard/qemu/arch/x86_64.config
++ create mode 100644 tools/testing/selftests/wireguard/qemu/debug.config
++ create mode 100644 tools/testing/selftests/wireguard/qemu/init.c
++ create mode 100644 tools/testing/selftests/wireguard/qemu/kernel.config
++
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/.gitignore
++@@ -0,0 +1,2 @@
+++build/
+++distfiles/
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/Makefile
++@@ -0,0 +1,385 @@
+++# SPDX-License-Identifier: GPL-2.0
+++#
+++# Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++
+++PWD := $(shell pwd)
+++
+++CHOST := $(shell gcc -dumpmachine)
+++ifneq (,$(ARCH))
+++CBUILD := $(subst -gcc,,$(lastword $(subst /, ,$(firstword $(wildcard $(foreach bindir,$(subst :, ,$(PATH)),$(bindir)/$(ARCH)-*-gcc))))))
+++ifeq (,$(CBUILD))
+++$(error The toolchain for $(ARCH) is not installed)
+++endif
+++else
+++CBUILD := $(CHOST)
+++ARCH := $(firstword $(subst -, ,$(CBUILD)))
+++endif
+++
+++# Set these from the environment to override
+++KERNEL_PATH ?= $(PWD)/../../../../..
+++BUILD_PATH ?= $(PWD)/build/$(ARCH)
+++DISTFILES_PATH ?= $(PWD)/distfiles
+++NR_CPUS ?= 4
+++
+++MIRROR := https://download.wireguard.com/qemu-test/distfiles/
+++
+++default: qemu
+++
+++# variable name, tarball project name, version, tarball extension, default URI base
+++define tar_download =
+++$(1)_VERSION := $(3)
+++$(1)_NAME := $(2)-$$($(1)_VERSION)
+++$(1)_TAR := $(DISTFILES_PATH)/$$($(1)_NAME)$(4)
+++$(1)_PATH := $(BUILD_PATH)/$$($(1)_NAME)
+++$(call file_download,$$($(1)_NAME)$(4),$(5),$(6))
+++endef
+++
+++define file_download =
+++$(DISTFILES_PATH)/$(1):
+++	mkdir -p $(DISTFILES_PATH)
+++	flock -x $$@.lock -c '[ -f $$@ ] && exit 0; wget -O $$@.tmp $(MIRROR)$(1) || wget -t inf --retry-on-http-error=404 -O $$@.tmp $(2)$(1) || rm -f $$@.tmp'
+++	if echo "$(3)  $$@.tmp" | sha256sum -c -; then mv $$@.tmp $$@; else rm -f $$@.tmp; exit 71; fi
+++endef
+++
+++$(eval $(call tar_download,MUSL,musl,1.1.20,.tar.gz,https://www.musl-libc.org/releases/,44be8771d0e6c6b5f82dd15662eb2957c9a3173a19a8b49966ac0542bbd40d61))
+++$(eval $(call tar_download,LIBMNL,libmnl,1.0.4,.tar.bz2,https://www.netfilter.org/projects/libmnl/files/,171f89699f286a5854b72b91d06e8f8e3683064c5901fb09d954a9ab6f551f81))
+++$(eval $(call tar_download,IPERF,iperf,3.1.7,.tar.gz,http://downloads.es.net/pub/iperf/,a4ef73406fe92250602b8da2ae89ec53211f805df97a1d1d629db5a14043734f))
+++$(eval $(call tar_download,BASH,bash,5.0,.tar.gz,https://ftp.gnu.org/gnu/bash/,b4a80f2ac66170b2913efbfb9f2594f1f76c7b1afd11f799e22035d63077fb4d))
+++$(eval $(call tar_download,IPROUTE2,iproute2,5.1.0,.tar.gz,https://www.kernel.org/pub/linux/utils/net/iproute2/,9b43707d6075ecdca14803ca8ce0c8553848c49fa1586d12fd508d66577243f2))
+++$(eval $(call tar_download,IPTABLES,iptables,1.6.1,.tar.bz2,https://www.netfilter.org/projects/iptables/files/,0fc2d7bd5d7be11311726466789d4c65fb4c8e096c9182b56ce97440864f0cf5))
+++$(eval $(call tar_download,NMAP,nmap,7.60,.tar.bz2,https://nmap.org/dist/,a8796ecc4fa6c38aad6139d9515dc8113023a82e9d787e5a5fb5fa1b05516f21))
+++$(eval $(call tar_download,IPUTILS,iputils,s20161105,.tar.gz,https://github.com/iputils/iputils/archive/s20161105.tar.gz/#,f813092f03d17294fd23544b129b95cdb87fe19f7970a51908a6b88509acad8a))
+++$(eval $(call tar_download,WIREGUARD_TOOLS,WireGuard,0.0.20191212,.tar.xz,https://git.zx2c4.com/WireGuard/snapshot/,b0d718380f7a8822b2f12d75e462fa4eafa3a77871002981f367cd4fe2a1b071))
+++
+++KERNEL_BUILD_PATH := $(BUILD_PATH)/kernel$(if $(findstring yes,$(DEBUG_KERNEL)),-debug)
+++rwildcard=$(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2) $(filter $(subst *,%,$2),$d))
+++WIREGUARD_SOURCES := $(call rwildcard,$(KERNEL_PATH)/drivers/net/wireguard/,*)
+++
+++export CFLAGS ?= -O3 -pipe
+++export LDFLAGS ?=
+++export CPPFLAGS := -I$(BUILD_PATH)/include
+++
+++ifeq ($(CHOST),$(CBUILD))
+++CROSS_COMPILE_FLAG := --host=$(CHOST)
+++NOPIE_GCC := gcc -fno-PIE
+++CFLAGS += -march=native
+++STRIP := strip
+++else
+++$(info Cross compilation: building for $(CBUILD) using $(CHOST))
+++CROSS_COMPILE_FLAG := --build=$(CBUILD) --host=$(CHOST)
+++export CROSS_COMPILE=$(CBUILD)-
+++NOPIE_GCC := $(CBUILD)-gcc -fno-PIE
+++STRIP := $(CBUILD)-strip
+++endif
+++ifeq ($(ARCH),aarch64)
+++QEMU_ARCH := aarch64
+++KERNEL_ARCH := arm64
+++KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/arch/arm64/boot/Image
+++ifeq ($(CHOST),$(CBUILD))
+++QEMU_MACHINE := -cpu host -machine virt,gic_version=host,accel=kvm
+++else
+++QEMU_MACHINE := -cpu cortex-a53 -machine virt
+++CFLAGS += -march=armv8-a -mtune=cortex-a53
+++endif
+++else ifeq ($(ARCH),aarch64_be)
+++QEMU_ARCH := aarch64
+++KERNEL_ARCH := arm64
+++KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/arch/arm64/boot/Image
+++ifeq ($(CHOST),$(CBUILD))
+++QEMU_MACHINE := -cpu host -machine virt,gic_version=host,accel=kvm
+++else
+++QEMU_MACHINE := -cpu cortex-a53 -machine virt
+++CFLAGS += -march=armv8-a -mtune=cortex-a53
+++endif
+++else ifeq ($(ARCH),arm)
+++QEMU_ARCH := arm
+++KERNEL_ARCH := arm
+++KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/arch/arm/boot/zImage
+++ifeq ($(CHOST),$(CBUILD))
+++QEMU_MACHINE := -cpu host -machine virt,gic_version=host,accel=kvm
+++else
+++QEMU_MACHINE := -cpu cortex-a15 -machine virt
+++CFLAGS += -march=armv7-a -mtune=cortex-a15 -mabi=aapcs-linux
+++endif
+++else ifeq ($(ARCH),armeb)
+++QEMU_ARCH := arm
+++KERNEL_ARCH := arm
+++KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/arch/arm/boot/zImage
+++ifeq ($(CHOST),$(CBUILD))
+++QEMU_MACHINE := -cpu host -machine virt,gic_version=host,accel=kvm
+++else
+++QEMU_MACHINE := -cpu cortex-a15 -machine virt
+++CFLAGS += -march=armv7-a -mabi=aapcs-linux # We don't pass -mtune=cortex-a15 due to a compiler bug on big endian.
+++LDFLAGS += -Wl,--be8
+++endif
+++else ifeq ($(ARCH),x86_64)
+++QEMU_ARCH := x86_64
+++KERNEL_ARCH := x86_64
+++KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/arch/x86/boot/bzImage
+++ifeq ($(CHOST),$(CBUILD))
+++QEMU_MACHINE := -cpu host -machine q35,accel=kvm
+++else
+++QEMU_MACHINE := -cpu Skylake-Server -machine q35
+++CFLAGS += -march=skylake-avx512
+++endif
+++else ifeq ($(ARCH),i686)
+++QEMU_ARCH := i386
+++KERNEL_ARCH := x86
+++KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/arch/x86/boot/bzImage
+++ifeq ($(subst i686,x86_64,$(CBUILD)),$(CHOST))
+++QEMU_MACHINE := -cpu host -machine q35,accel=kvm
+++else
+++QEMU_MACHINE := -cpu coreduo -machine q35
+++CFLAGS += -march=prescott
+++endif
+++else ifeq ($(ARCH),mips64)
+++QEMU_ARCH := mips64
+++KERNEL_ARCH := mips
+++KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/vmlinux
+++ifeq ($(CHOST),$(CBUILD))
+++QEMU_MACHINE := -cpu host -machine malta,accel=kvm
+++CFLAGS += -EB
+++else
+++QEMU_MACHINE := -cpu MIPS64R2-generic -machine malta -smp 1
+++CFLAGS += -march=mips64r2 -EB
+++endif
+++else ifeq ($(ARCH),mips64el)
+++QEMU_ARCH := mips64el
+++KERNEL_ARCH := mips
+++KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/vmlinux
+++ifeq ($(CHOST),$(CBUILD))
+++QEMU_MACHINE := -cpu host -machine malta,accel=kvm
+++CFLAGS += -EL
+++else
+++QEMU_MACHINE := -cpu MIPS64R2-generic -machine malta -smp 1
+++CFLAGS += -march=mips64r2 -EL
+++endif
+++else ifeq ($(ARCH),mips)
+++QEMU_ARCH := mips
+++KERNEL_ARCH := mips
+++KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/vmlinux
+++ifeq ($(CHOST),$(CBUILD))
+++QEMU_MACHINE := -cpu host -machine malta,accel=kvm
+++CFLAGS += -EB
+++else
+++QEMU_MACHINE := -cpu 24Kf -machine malta -smp 1
+++CFLAGS += -march=mips32r2 -EB
+++endif
+++else ifeq ($(ARCH),mipsel)
+++QEMU_ARCH := mipsel
+++KERNEL_ARCH := mips
+++KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/vmlinux
+++ifeq ($(CHOST),$(CBUILD))
+++QEMU_MACHINE := -cpu host -machine malta,accel=kvm
+++CFLAGS += -EL
+++else
+++QEMU_MACHINE := -cpu 24Kf -machine malta -smp 1
+++CFLAGS += -march=mips32r2 -EL
+++endif
+++else ifeq ($(ARCH),powerpc64le)
+++QEMU_ARCH := ppc64
+++KERNEL_ARCH := powerpc
+++KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/vmlinux
+++ifeq ($(CHOST),$(CBUILD))
+++QEMU_MACHINE := -cpu host,accel=kvm -machine pseries
+++else
+++QEMU_MACHINE := -machine pseries
+++endif
+++CFLAGS += -mcpu=powerpc64le -mlong-double-64
+++else ifeq ($(ARCH),powerpc)
+++QEMU_ARCH := ppc
+++KERNEL_ARCH := powerpc
+++KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/arch/powerpc/boot/uImage
+++ifeq ($(CHOST),$(CBUILD))
+++QEMU_MACHINE := -cpu host,accel=kvm -machine ppce500
+++else
+++QEMU_MACHINE := -machine ppce500
+++endif
+++CFLAGS += -mcpu=powerpc -mlong-double-64 -msecure-plt
+++else ifeq ($(ARCH),m68k)
+++QEMU_ARCH := m68k
+++KERNEL_ARCH := m68k
+++KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/vmlinux
+++ifeq ($(CHOST),$(CBUILD))
+++QEMU_MACHINE := -cpu host,accel=kvm -machine q800
+++else
+++QEMU_MACHINE := -machine q800
+++endif
+++else
+++$(error I only build: x86_64, i686, arm, armeb, aarch64, aarch64_be, mips, mipsel, mips64, mips64el, powerpc64le, powerpc, m68k)
+++endif
+++
+++REAL_CC := $(CBUILD)-gcc
+++MUSL_CC := $(BUILD_PATH)/musl-gcc
+++export CC := $(MUSL_CC)
+++USERSPACE_DEPS := $(MUSL_CC) $(BUILD_PATH)/include/.installed $(BUILD_PATH)/include/linux/.installed
+++
+++build: $(KERNEL_BZIMAGE)
+++qemu: $(KERNEL_BZIMAGE)
+++	rm -f $(BUILD_PATH)/result
+++	timeout --foreground 20m qemu-system-$(QEMU_ARCH) \
+++		-nodefaults \
+++		-nographic \
+++		-smp $(NR_CPUS) \
+++		$(QEMU_MACHINE) \
+++		-m $$(grep -q CONFIG_DEBUG_KMEMLEAK=y $(KERNEL_BUILD_PATH)/.config && echo 1G || echo 256M) \
+++		-serial stdio \
+++		-serial file:$(BUILD_PATH)/result \
+++		-no-reboot \
+++		-monitor none \
+++		-kernel $<
+++	grep -Fq success $(BUILD_PATH)/result
+++
+++$(BUILD_PATH)/init-cpio-spec.txt:
+++	mkdir -p $(BUILD_PATH)
+++	echo "file /init $(BUILD_PATH)/init 755 0 0" > $@
+++	echo "file /init.sh $(PWD)/../netns.sh 755 0 0" >> $@
+++	echo "dir /dev 755 0 0" >> $@
+++	echo "nod /dev/console 644 0 0 c 5 1" >> $@
+++	echo "dir /bin 755 0 0" >> $@
+++	echo "file /bin/iperf3 $(IPERF_PATH)/src/iperf3 755 0 0" >> $@
+++	echo "file /bin/wg $(WIREGUARD_TOOLS_PATH)/src/tools/wg 755 0 0" >> $@
+++	echo "file /bin/bash $(BASH_PATH)/bash 755 0 0" >> $@
+++	echo "file /bin/ip $(IPROUTE2_PATH)/ip/ip 755 0 0" >> $@
+++	echo "file /bin/ss $(IPROUTE2_PATH)/misc/ss 755 0 0" >> $@
+++	echo "file /bin/ping $(IPUTILS_PATH)/ping 755 0 0" >> $@
+++	echo "file /bin/ncat $(NMAP_PATH)/ncat/ncat 755 0 0" >> $@
+++	echo "file /bin/xtables-multi $(IPTABLES_PATH)/iptables/xtables-multi 755 0 0" >> $@
+++	echo "slink /bin/iptables xtables-multi 777 0 0" >> $@
+++	echo "slink /bin/ping6 ping 777 0 0" >> $@
+++	echo "dir /lib 755 0 0" >> $@
+++	echo "file /lib/libc.so $(MUSL_PATH)/lib/libc.so 755 0 0" >> $@
+++	echo "slink /lib/ld-linux.so.1 libc.so 777 0 0" >> $@
+++
+++$(KERNEL_BUILD_PATH)/.config: kernel.config arch/$(ARCH).config
+++	mkdir -p $(KERNEL_BUILD_PATH)
+++	cp kernel.config $(KERNEL_BUILD_PATH)/minimal.config
+++	printf 'CONFIG_NR_CPUS=$(NR_CPUS)\nCONFIG_INITRAMFS_SOURCE="$(BUILD_PATH)/init-cpio-spec.txt"\n' >> $(KERNEL_BUILD_PATH)/minimal.config
+++	cat arch/$(ARCH).config >> $(KERNEL_BUILD_PATH)/minimal.config
+++	$(MAKE) -C $(KERNEL_PATH) O=$(KERNEL_BUILD_PATH) ARCH=$(KERNEL_ARCH) allnoconfig
+++	cd $(KERNEL_BUILD_PATH) && ARCH=$(KERNEL_ARCH) $(KERNEL_PATH)/scripts/kconfig/merge_config.sh -n $(KERNEL_BUILD_PATH)/.config $(KERNEL_BUILD_PATH)/minimal.config
+++	$(if $(findstring yes,$(DEBUG_KERNEL)),cp debug.config $(KERNEL_BUILD_PATH) && cd $(KERNEL_BUILD_PATH) && ARCH=$(KERNEL_ARCH) $(KERNEL_PATH)/scripts/kconfig/merge_config.sh -n $(KERNEL_BUILD_PATH)/.config debug.config,)
+++
+++$(KERNEL_BZIMAGE): $(KERNEL_BUILD_PATH)/.config $(BUILD_PATH)/init-cpio-spec.txt $(MUSL_PATH)/lib/libc.so $(IPERF_PATH)/src/iperf3 $(IPUTILS_PATH)/ping $(BASH_PATH)/bash $(IPROUTE2_PATH)/misc/ss $(IPROUTE2_PATH)/ip/ip $(IPTABLES_PATH)/iptables/xtables-multi $(NMAP_PATH)/ncat/ncat $(WIREGUARD_TOOLS_PATH)/src/tools/wg $(BUILD_PATH)/init ../netns.sh $(WIREGUARD_SOURCES)
+++	$(MAKE) -C $(KERNEL_PATH) O=$(KERNEL_BUILD_PATH) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(CROSS_COMPILE) CC="$(NOPIE_GCC)"
+++
+++$(BUILD_PATH)/include/linux/.installed: | $(KERNEL_BUILD_PATH)/.config
+++	$(MAKE) -C $(KERNEL_PATH) O=$(KERNEL_BUILD_PATH) INSTALL_HDR_PATH=$(BUILD_PATH) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(CROSS_COMPILE) headers_install
+++	touch $@
+++
+++$(MUSL_PATH)/lib/libc.so: $(MUSL_TAR)
+++	mkdir -p $(BUILD_PATH)
+++	flock -s $<.lock tar -C $(BUILD_PATH) -xf $<
+++	cd $(MUSL_PATH) && CC=$(REAL_CC) ./configure --prefix=/ --disable-static --build=$(CBUILD)
+++	$(MAKE) -C $(MUSL_PATH)
+++	$(STRIP) -s $@
+++
+++$(BUILD_PATH)/include/.installed: $(MUSL_PATH)/lib/libc.so
+++	$(MAKE) -C $(MUSL_PATH) DESTDIR=$(BUILD_PATH) install-headers
+++	touch $@
+++
+++$(MUSL_CC): $(MUSL_PATH)/lib/libc.so
+++	sh $(MUSL_PATH)/tools/musl-gcc.specs.sh $(BUILD_PATH)/include $(MUSL_PATH)/lib /lib/ld-linux.so.1 > $(BUILD_PATH)/musl-gcc.specs
+++	printf '#!/bin/sh\nexec "$(REAL_CC)" --specs="$(BUILD_PATH)/musl-gcc.specs" -fno-stack-protector -no-pie "$$@"\n' > $(BUILD_PATH)/musl-gcc
+++	chmod +x $(BUILD_PATH)/musl-gcc
+++
+++$(IPERF_PATH)/.installed: $(IPERF_TAR)
+++	mkdir -p $(BUILD_PATH)
+++	flock -s $<.lock tar -C $(BUILD_PATH) -xf $<
+++	sed -i '1s/^/#include <stdint.h>/' $(IPERF_PATH)/src/cjson.h $(IPERF_PATH)/src/timer.h
+++	sed -i -r 's/-p?g//g' $(IPERF_PATH)/src/Makefile*
+++	touch $@
+++
+++$(IPERF_PATH)/src/iperf3: | $(IPERF_PATH)/.installed $(USERSPACE_DEPS)
+++	cd $(IPERF_PATH) && CFLAGS="$(CFLAGS) -D_GNU_SOURCE" ./configure --prefix=/ $(CROSS_COMPILE_FLAG) --enable-static --disable-shared
+++	$(MAKE) -C $(IPERF_PATH)
+++	$(STRIP) -s $@
+++
+++$(LIBMNL_PATH)/.installed: $(LIBMNL_TAR)
+++	flock -s $<.lock tar -C $(BUILD_PATH) -xf $<
+++	touch $@
+++
+++$(LIBMNL_PATH)/src/.libs/libmnl.a: | $(LIBMNL_PATH)/.installed $(USERSPACE_DEPS)
+++	cd $(LIBMNL_PATH) && ./configure --prefix=/ $(CROSS_COMPILE_FLAG) --enable-static --disable-shared
+++	$(MAKE) -C $(LIBMNL_PATH)
+++	sed -i 's:prefix=.*:prefix=$(LIBMNL_PATH):' $(LIBMNL_PATH)/libmnl.pc
+++
+++$(WIREGUARD_TOOLS_PATH)/.installed: $(WIREGUARD_TOOLS_TAR)
+++	flock -s $<.lock tar -C $(BUILD_PATH) -xf $<
+++	touch $@
+++
+++$(WIREGUARD_TOOLS_PATH)/src/tools/wg: | $(WIREGUARD_TOOLS_PATH)/.installed $(LIBMNL_PATH)/src/.libs/libmnl.a $(USERSPACE_DEPS)
+++	LDFLAGS="$(LDFLAGS) -L$(LIBMNL_PATH)/src/.libs" $(MAKE) -C $(WIREGUARD_TOOLS_PATH)/src/tools LIBMNL_CFLAGS="-I$(LIBMNL_PATH)/include" LIBMNL_LDLIBS="-lmnl" wg
+++	$(STRIP) -s $@
+++
+++$(BUILD_PATH)/init: init.c | $(USERSPACE_DEPS)
+++	mkdir -p $(BUILD_PATH)
+++	$(MUSL_CC) -o $@ $(CFLAGS) $(LDFLAGS) -std=gnu11 $<
+++	$(STRIP) -s $@
+++
+++$(IPUTILS_PATH)/.installed: $(IPUTILS_TAR)
+++	mkdir -p $(BUILD_PATH)
+++	flock -s $<.lock tar -C $(BUILD_PATH) -xf $<
+++	touch $@
+++
+++$(IPUTILS_PATH)/ping: | $(IPUTILS_PATH)/.installed $(USERSPACE_DEPS)
+++	$(MAKE) -C $(IPUTILS_PATH) USE_CAP=no USE_IDN=no USE_NETTLE=no USE_CRYPTO=no ping
+++	$(STRIP) -s $@
+++
+++$(BASH_PATH)/.installed: $(BASH_TAR)
+++	mkdir -p $(BUILD_PATH)
+++	flock -s $<.lock tar -C $(BUILD_PATH) -xf $<
+++	touch $@
+++
+++$(BASH_PATH)/bash: | $(BASH_PATH)/.installed $(USERSPACE_DEPS)
+++	cd $(BASH_PATH) && ./configure --prefix=/ $(CROSS_COMPILE_FLAG) --without-bash-malloc --disable-debugger --disable-help-builtin --disable-history --disable-multibyte --disable-progcomp --disable-readline --disable-mem-scramble
+++	$(MAKE) -C $(BASH_PATH)
+++	$(STRIP) -s $@
+++
+++$(IPROUTE2_PATH)/.installed: $(IPROUTE2_TAR)
+++	mkdir -p $(BUILD_PATH)
+++	flock -s $<.lock tar -C $(BUILD_PATH) -xf $<
+++	printf 'CC:=$(CC)\nPKG_CONFIG:=pkg-config\nTC_CONFIG_XT:=n\nTC_CONFIG_ATM:=n\nTC_CONFIG_IPSET:=n\nIP_CONFIG_SETNS:=y\nHAVE_ELF:=n\nHAVE_MNL:=y\nHAVE_BERKELEY_DB:=n\nHAVE_LATEX:=n\nHAVE_PDFLATEX:=n\nCFLAGS+=-DHAVE_SETNS -DHAVE_LIBMNL -I$(LIBMNL_PATH)/include\nLDLIBS+=-lmnl' > $(IPROUTE2_PATH)/config.mk
+++	printf 'lib: snapshot\n\t$$(MAKE) -C lib\nip/ip: lib\n\t$$(MAKE) -C ip ip\nmisc/ss: lib\n\t$$(MAKE) -C misc ss\n' >> $(IPROUTE2_PATH)/Makefile
+++	touch $@
+++
+++$(IPROUTE2_PATH)/ip/ip: | $(IPROUTE2_PATH)/.installed $(LIBMNL_PATH)/src/.libs/libmnl.a $(USERSPACE_DEPS)
+++	LDFLAGS="$(LDFLAGS) -L$(LIBMNL_PATH)/src/.libs" PKG_CONFIG_LIBDIR="$(LIBMNL_PATH)" $(MAKE) -C $(IPROUTE2_PATH) PREFIX=/ ip/ip
+++	$(STRIP) -s $(IPROUTE2_PATH)/ip/ip
+++
+++$(IPROUTE2_PATH)/misc/ss: | $(IPROUTE2_PATH)/.installed $(LIBMNL_PATH)/src/.libs/libmnl.a $(USERSPACE_DEPS)
+++	LDFLAGS="$(LDFLAGS) -L$(LIBMNL_PATH)/src/.libs" PKG_CONFIG_LIBDIR="$(LIBMNL_PATH)" $(MAKE) -C $(IPROUTE2_PATH) PREFIX=/ misc/ss
+++	$(STRIP) -s $(IPROUTE2_PATH)/misc/ss
+++
+++$(IPTABLES_PATH)/.installed: $(IPTABLES_TAR)
+++	mkdir -p $(BUILD_PATH)
+++	flock -s $<.lock tar -C $(BUILD_PATH) -xf $<
+++	sed -i -e "/nfnetlink=[01]/s:=[01]:=0:" -e "/nfconntrack=[01]/s:=[01]:=0:" $(IPTABLES_PATH)/configure
+++	touch $@
+++
+++$(IPTABLES_PATH)/iptables/xtables-multi: | $(IPTABLES_PATH)/.installed $(LIBMNL_PATH)/src/.libs/libmnl.a $(USERSPACE_DEPS)
+++	cd $(IPTABLES_PATH) && PKG_CONFIG_LIBDIR="$(LIBMNL_PATH)" ./configure --prefix=/ $(CROSS_COMPILE_FLAG) --enable-static --disable-shared --disable-nftables --disable-bpf-compiler --disable-nfsynproxy --disable-libipq --with-kernel=$(BUILD_PATH)/include
+++	$(MAKE) -C $(IPTABLES_PATH)
+++	$(STRIP) -s $@
+++
+++$(NMAP_PATH)/.installed: $(NMAP_TAR)
+++	mkdir -p $(BUILD_PATH)
+++	flock -s $<.lock tar -C $(BUILD_PATH) -xf $<
+++	touch $@
+++
+++$(NMAP_PATH)/ncat/ncat: | $(NMAP_PATH)/.installed $(USERSPACE_DEPS)
+++	cd $(NMAP_PATH) && ./configure --prefix=/ $(CROSS_COMPILE_FLAG) --enable-static --disable-shared --without-ndiff --without-zenmap --without-nping --with-libpcap=included --with-libpcre=included --with-libdnet=included --without-liblua --with-liblinear=included --without-nmap-update --without-openssl --with-pcap=linux
+++	$(MAKE) -C $(NMAP_PATH) build-ncat
+++	$(STRIP) -s $@
+++
+++clean:
+++	rm -rf $(BUILD_PATH)
+++
+++distclean: clean
+++	rm -rf $(DISTFILES_PATH)
+++
+++menuconfig: $(KERNEL_BUILD_PATH)/.config
+++	$(MAKE) -C $(KERNEL_PATH) O=$(KERNEL_BUILD_PATH) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(CROSS_COMPILE) CC="$(NOPIE_GCC)" menuconfig
+++
+++.PHONY: qemu build clean distclean menuconfig
+++.DELETE_ON_ERROR:
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/arch/aarch64.config
++@@ -0,0 +1,5 @@
+++CONFIG_SERIAL_AMBA_PL011=y
+++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+++CONFIG_CMDLINE_BOOL=y
+++CONFIG_CMDLINE="console=ttyAMA0 wg.success=ttyAMA1"
+++CONFIG_FRAME_WARN=1280
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/arch/aarch64_be.config
++@@ -0,0 +1,6 @@
+++CONFIG_CPU_BIG_ENDIAN=y
+++CONFIG_SERIAL_AMBA_PL011=y
+++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+++CONFIG_CMDLINE_BOOL=y
+++CONFIG_CMDLINE="console=ttyAMA0 wg.success=ttyAMA1"
+++CONFIG_FRAME_WARN=1280
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/arch/arm.config
++@@ -0,0 +1,9 @@
+++CONFIG_MMU=y
+++CONFIG_ARCH_MULTI_V7=y
+++CONFIG_ARCH_VIRT=y
+++CONFIG_THUMB2_KERNEL=n
+++CONFIG_SERIAL_AMBA_PL011=y
+++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+++CONFIG_CMDLINE_BOOL=y
+++CONFIG_CMDLINE="console=ttyAMA0 wg.success=ttyAMA1"
+++CONFIG_FRAME_WARN=1024
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/arch/armeb.config
++@@ -0,0 +1,10 @@
+++CONFIG_MMU=y
+++CONFIG_ARCH_MULTI_V7=y
+++CONFIG_ARCH_VIRT=y
+++CONFIG_THUMB2_KERNEL=n
+++CONFIG_SERIAL_AMBA_PL011=y
+++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+++CONFIG_CMDLINE_BOOL=y
+++CONFIG_CMDLINE="console=ttyAMA0 wg.success=ttyAMA1"
+++CONFIG_CPU_BIG_ENDIAN=y
+++CONFIG_FRAME_WARN=1024
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/arch/i686.config
++@@ -0,0 +1,5 @@
+++CONFIG_SERIAL_8250=y
+++CONFIG_SERIAL_8250_CONSOLE=y
+++CONFIG_CMDLINE_BOOL=y
+++CONFIG_CMDLINE="console=ttyS0 wg.success=ttyS1"
+++CONFIG_FRAME_WARN=1024
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/arch/m68k.config
++@@ -0,0 +1,9 @@
+++CONFIG_MMU=y
+++CONFIG_M68040=y
+++CONFIG_MAC=y
+++CONFIG_SERIAL_PMACZILOG=y
+++CONFIG_SERIAL_PMACZILOG_TTYS=y
+++CONFIG_SERIAL_PMACZILOG_CONSOLE=y
+++CONFIG_CMDLINE_BOOL=y
+++CONFIG_CMDLINE="console=ttyS0 wg.success=ttyS1"
+++CONFIG_FRAME_WARN=1024
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/arch/mips.config
++@@ -0,0 +1,11 @@
+++CONFIG_CPU_MIPS32_R2=y
+++CONFIG_MIPS_MALTA=y
+++CONFIG_MIPS_CPS=y
+++CONFIG_MIPS_FP_SUPPORT=y
+++CONFIG_POWER_RESET=y
+++CONFIG_POWER_RESET_SYSCON=y
+++CONFIG_SERIAL_8250=y
+++CONFIG_SERIAL_8250_CONSOLE=y
+++CONFIG_CMDLINE_BOOL=y
+++CONFIG_CMDLINE="console=ttyS0 wg.success=ttyS1"
+++CONFIG_FRAME_WARN=1024
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/arch/mips64.config
++@@ -0,0 +1,14 @@
+++CONFIG_64BIT=y
+++CONFIG_CPU_MIPS64_R2=y
+++CONFIG_MIPS32_N32=y
+++CONFIG_CPU_HAS_MSA=y
+++CONFIG_MIPS_MALTA=y
+++CONFIG_MIPS_CPS=y
+++CONFIG_MIPS_FP_SUPPORT=y
+++CONFIG_POWER_RESET=y
+++CONFIG_POWER_RESET_SYSCON=y
+++CONFIG_SERIAL_8250=y
+++CONFIG_SERIAL_8250_CONSOLE=y
+++CONFIG_CMDLINE_BOOL=y
+++CONFIG_CMDLINE="console=ttyS0 wg.success=ttyS1"
+++CONFIG_FRAME_WARN=1280
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/arch/mips64el.config
++@@ -0,0 +1,15 @@
+++CONFIG_64BIT=y
+++CONFIG_CPU_MIPS64_R2=y
+++CONFIG_MIPS32_N32=y
+++CONFIG_CPU_HAS_MSA=y
+++CONFIG_MIPS_MALTA=y
+++CONFIG_CPU_LITTLE_ENDIAN=y
+++CONFIG_MIPS_CPS=y
+++CONFIG_MIPS_FP_SUPPORT=y
+++CONFIG_POWER_RESET=y
+++CONFIG_POWER_RESET_SYSCON=y
+++CONFIG_SERIAL_8250=y
+++CONFIG_SERIAL_8250_CONSOLE=y
+++CONFIG_CMDLINE_BOOL=y
+++CONFIG_CMDLINE="console=ttyS0 wg.success=ttyS1"
+++CONFIG_FRAME_WARN=1280
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/arch/mipsel.config
++@@ -0,0 +1,12 @@
+++CONFIG_CPU_MIPS32_R2=y
+++CONFIG_MIPS_MALTA=y
+++CONFIG_CPU_LITTLE_ENDIAN=y
+++CONFIG_MIPS_CPS=y
+++CONFIG_MIPS_FP_SUPPORT=y
+++CONFIG_POWER_RESET=y
+++CONFIG_POWER_RESET_SYSCON=y
+++CONFIG_SERIAL_8250=y
+++CONFIG_SERIAL_8250_CONSOLE=y
+++CONFIG_CMDLINE_BOOL=y
+++CONFIG_CMDLINE="console=ttyS0 wg.success=ttyS1"
+++CONFIG_FRAME_WARN=1024
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/arch/powerpc.config
++@@ -0,0 +1,10 @@
+++CONFIG_PPC_QEMU_E500=y
+++CONFIG_FSL_SOC_BOOKE=y
+++CONFIG_PPC_85xx=y
+++CONFIG_PHYS_64BIT=y
+++CONFIG_SERIAL_8250=y
+++CONFIG_SERIAL_8250_CONSOLE=y
+++CONFIG_MATH_EMULATION=y
+++CONFIG_CMDLINE_BOOL=y
+++CONFIG_CMDLINE="console=ttyS0 wg.success=ttyS1"
+++CONFIG_FRAME_WARN=1024
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/arch/powerpc64le.config
++@@ -0,0 +1,12 @@
+++CONFIG_PPC64=y
+++CONFIG_PPC_PSERIES=y
+++CONFIG_ALTIVEC=y
+++CONFIG_VSX=y
+++CONFIG_PPC_OF_BOOT_TRAMPOLINE=y
+++CONFIG_PPC_RADIX_MMU=y
+++CONFIG_HVC_CONSOLE=y
+++CONFIG_CPU_LITTLE_ENDIAN=y
+++CONFIG_CMDLINE_BOOL=y
+++CONFIG_CMDLINE="console=hvc0 wg.success=hvc1"
+++CONFIG_SECTION_MISMATCH_WARN_ONLY=y
+++CONFIG_FRAME_WARN=1280
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/arch/x86_64.config
++@@ -0,0 +1,5 @@
+++CONFIG_SERIAL_8250=y
+++CONFIG_SERIAL_8250_CONSOLE=y
+++CONFIG_CMDLINE_BOOL=y
+++CONFIG_CMDLINE="console=ttyS0 wg.success=ttyS1"
+++CONFIG_FRAME_WARN=1280
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/debug.config
++@@ -0,0 +1,67 @@
+++CONFIG_LOCALVERSION="-debug"
+++CONFIG_ENABLE_WARN_DEPRECATED=y
+++CONFIG_ENABLE_MUST_CHECK=y
+++CONFIG_FRAME_POINTER=y
+++CONFIG_STACK_VALIDATION=y
+++CONFIG_DEBUG_KERNEL=y
+++CONFIG_DEBUG_INFO=y
+++CONFIG_DEBUG_INFO_DWARF4=y
+++CONFIG_PAGE_EXTENSION=y
+++CONFIG_PAGE_POISONING=y
+++CONFIG_DEBUG_OBJECTS=y
+++CONFIG_DEBUG_OBJECTS_FREE=y
+++CONFIG_DEBUG_OBJECTS_TIMERS=y
+++CONFIG_DEBUG_OBJECTS_WORK=y
+++CONFIG_DEBUG_OBJECTS_RCU_HEAD=y
+++CONFIG_DEBUG_OBJECTS_PERCPU_COUNTER=y
+++CONFIG_DEBUG_OBJECTS_ENABLE_DEFAULT=1
+++CONFIG_SLUB_DEBUG_ON=y
+++CONFIG_DEBUG_VM=y
+++CONFIG_DEBUG_MEMORY_INIT=y
+++CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
+++CONFIG_DEBUG_STACKOVERFLOW=y
+++CONFIG_HAVE_ARCH_KMEMCHECK=y
+++CONFIG_HAVE_ARCH_KASAN=y
+++CONFIG_KASAN=y
+++CONFIG_KASAN_INLINE=y
+++CONFIG_UBSAN=y
+++CONFIG_UBSAN_SANITIZE_ALL=y
+++CONFIG_UBSAN_NO_ALIGNMENT=y
+++CONFIG_UBSAN_NULL=y
+++CONFIG_DEBUG_KMEMLEAK=y
+++CONFIG_DEBUG_KMEMLEAK_EARLY_LOG_SIZE=8192
+++CONFIG_DEBUG_STACK_USAGE=y
+++CONFIG_DEBUG_SHIRQ=y
+++CONFIG_WQ_WATCHDOG=y
+++CONFIG_SCHED_DEBUG=y
+++CONFIG_SCHED_INFO=y
+++CONFIG_SCHEDSTATS=y
+++CONFIG_SCHED_STACK_END_CHECK=y
+++CONFIG_DEBUG_TIMEKEEPING=y
+++CONFIG_TIMER_STATS=y
+++CONFIG_DEBUG_PREEMPT=y
+++CONFIG_DEBUG_RT_MUTEXES=y
+++CONFIG_DEBUG_SPINLOCK=y
+++CONFIG_DEBUG_MUTEXES=y
+++CONFIG_DEBUG_LOCK_ALLOC=y
+++CONFIG_PROVE_LOCKING=y
+++CONFIG_LOCKDEP=y
+++CONFIG_DEBUG_ATOMIC_SLEEP=y
+++CONFIG_TRACE_IRQFLAGS=y
+++CONFIG_DEBUG_BUGVERBOSE=y
+++CONFIG_DEBUG_LIST=y
+++CONFIG_DEBUG_PI_LIST=y
+++CONFIG_PROVE_RCU=y
+++CONFIG_SPARSE_RCU_POINTER=y
+++CONFIG_RCU_CPU_STALL_TIMEOUT=21
+++CONFIG_RCU_TRACE=y
+++CONFIG_RCU_EQS_DEBUG=y
+++CONFIG_USER_STACKTRACE_SUPPORT=y
+++CONFIG_DEBUG_SG=y
+++CONFIG_DEBUG_NOTIFIERS=y
+++CONFIG_DOUBLEFAULT=y
+++CONFIG_X86_DEBUG_FPU=y
+++CONFIG_DEBUG_SECTION_MISMATCH=y
+++CONFIG_DEBUG_PAGEALLOC=y
+++CONFIG_DEBUG_PAGEALLOC_ENABLE_DEFAULT=y
+++CONFIG_DEBUG_WW_MUTEX_SLOWPATH=y
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/init.c
++@@ -0,0 +1,284 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+++ */
+++
+++#define _GNU_SOURCE
+++#include <unistd.h>
+++#include <errno.h>
+++#include <string.h>
+++#include <stdio.h>
+++#include <stdlib.h>
+++#include <stdbool.h>
+++#include <fcntl.h>
+++#include <sys/wait.h>
+++#include <sys/mount.h>
+++#include <sys/types.h>
+++#include <sys/stat.h>
+++#include <sys/types.h>
+++#include <sys/io.h>
+++#include <sys/ioctl.h>
+++#include <sys/reboot.h>
+++#include <sys/utsname.h>
+++#include <sys/sendfile.h>
+++#include <linux/random.h>
+++#include <linux/version.h>
+++
+++__attribute__((noreturn)) static void poweroff(void)
+++{
+++	fflush(stdout);
+++	fflush(stderr);
+++	reboot(RB_AUTOBOOT);
+++	sleep(30);
+++	fprintf(stderr, "\x1b[37m\x1b[41m\x1b[1mFailed to power off!!!\x1b[0m\n");
+++	exit(1);
+++}
+++
+++static void panic(const char *what)
+++{
+++	fprintf(stderr, "\n\n\x1b[37m\x1b[41m\x1b[1mSOMETHING WENT HORRIBLY WRONG\x1b[0m\n\n    \x1b[31m\x1b[1m%s: %s\x1b[0m\n\n\x1b[37m\x1b[44m\x1b[1mPower off...\x1b[0m\n\n", what, strerror(errno));
+++	poweroff();
+++}
+++
+++#define pretty_message(msg) puts("\x1b[32m\x1b[1m" msg "\x1b[0m")
+++
+++static void print_banner(void)
+++{
+++	struct utsname utsname;
+++	int len;
+++
+++	if (uname(&utsname) < 0)
+++		panic("uname");
+++
+++	len = strlen("    WireGuard Test Suite on       ") + strlen(utsname.sysname) + strlen(utsname.release) + strlen(utsname.machine);
+++	printf("\x1b[45m\x1b[33m\x1b[1m%*.s\x1b[0m\n\x1b[45m\x1b[33m\x1b[1m    WireGuard Test Suite on %s %s %s    \x1b[0m\n\x1b[45m\x1b[33m\x1b[1m%*.s\x1b[0m\n\n", len, "", utsname.sysname, utsname.release, utsname.machine, len, "");
+++}
+++
+++static void seed_rng(void)
+++{
+++	int fd;
+++	struct {
+++		int entropy_count;
+++		int buffer_size;
+++		unsigned char buffer[256];
+++	} entropy = {
+++		.entropy_count = sizeof(entropy.buffer) * 8,
+++		.buffer_size = sizeof(entropy.buffer),
+++		.buffer = "Adding real entropy is not actually important for these tests. Don't try this at home, kids!"
+++	};
+++
+++	if (mknod("/dev/urandom", S_IFCHR | 0644, makedev(1, 9)))
+++		panic("mknod(/dev/urandom)");
+++	fd = open("/dev/urandom", O_WRONLY);
+++	if (fd < 0)
+++		panic("open(urandom)");
+++	for (int i = 0; i < 256; ++i) {
+++		if (ioctl(fd, RNDADDENTROPY, &entropy) < 0)
+++			panic("ioctl(urandom)");
+++	}
+++	close(fd);
+++}
+++
+++static void mount_filesystems(void)
+++{
+++	pretty_message("[+] Mounting filesystems...");
+++	mkdir("/dev", 0755);
+++	mkdir("/proc", 0755);
+++	mkdir("/sys", 0755);
+++	mkdir("/tmp", 0755);
+++	mkdir("/run", 0755);
+++	mkdir("/var", 0755);
+++	if (mount("none", "/dev", "devtmpfs", 0, NULL))
+++		panic("devtmpfs mount");
+++	if (mount("none", "/proc", "proc", 0, NULL))
+++		panic("procfs mount");
+++	if (mount("none", "/sys", "sysfs", 0, NULL))
+++		panic("sysfs mount");
+++	if (mount("none", "/tmp", "tmpfs", 0, NULL))
+++		panic("tmpfs mount");
+++	if (mount("none", "/run", "tmpfs", 0, NULL))
+++		panic("tmpfs mount");
+++	if (mount("none", "/sys/kernel/debug", "debugfs", 0, NULL))
+++		; /* Not a problem if it fails.*/
+++	if (symlink("/run", "/var/run"))
+++		panic("run symlink");
+++	if (symlink("/proc/self/fd", "/dev/fd"))
+++		panic("fd symlink");
+++}
+++
+++static void enable_logging(void)
+++{
+++	int fd;
+++	pretty_message("[+] Enabling logging...");
+++	fd = open("/proc/sys/kernel/printk", O_WRONLY);
+++	if (fd >= 0) {
+++		if (write(fd, "9\n", 2) != 2)
+++			panic("write(printk)");
+++		close(fd);
+++	}
+++	fd = open("/proc/sys/debug/exception-trace", O_WRONLY);
+++	if (fd >= 0) {
+++		if (write(fd, "1\n", 2) != 2)
+++			panic("write(exception-trace)");
+++		close(fd);
+++	}
+++	fd = open("/proc/sys/kernel/panic_on_warn", O_WRONLY);
+++	if (fd >= 0) {
+++		if (write(fd, "1\n", 2) != 2)
+++			panic("write(panic_on_warn)");
+++		close(fd);
+++	}
+++}
+++
+++static void kmod_selftests(void)
+++{
+++	FILE *file;
+++	char line[2048], *start, *pass;
+++	bool success = true;
+++	pretty_message("[+] Module self-tests:");
+++	file = fopen("/proc/kmsg", "r");
+++	if (!file)
+++		panic("fopen(kmsg)");
+++	if (fcntl(fileno(file), F_SETFL, O_NONBLOCK) < 0)
+++		panic("fcntl(kmsg, nonblock)");
+++	while (fgets(line, sizeof(line), file)) {
+++		start = strstr(line, "wireguard: ");
+++		if (!start)
+++			continue;
+++		start += 11;
+++		*strchrnul(start, '\n') = '\0';
+++		if (strstr(start, "www.wireguard.com"))
+++			break;
+++		pass = strstr(start, ": pass");
+++		if (!pass || pass[6] != '\0') {
+++			success = false;
+++			printf(" \x1b[31m*  %s\x1b[0m\n", start);
+++		} else
+++			printf(" \x1b[32m*  %s\x1b[0m\n", start);
+++	}
+++	fclose(file);
+++	if (!success) {
+++		puts("\x1b[31m\x1b[1m[-] Tests failed! \u2639\x1b[0m");
+++		poweroff();
+++	}
+++}
+++
+++static void launch_tests(void)
+++{
+++	char cmdline[4096], *success_dev;
+++	int status, fd;
+++	pid_t pid;
+++
+++	pretty_message("[+] Launching tests...");
+++	pid = fork();
+++	if (pid == -1)
+++		panic("fork");
+++	else if (pid == 0) {
+++		execl("/init.sh", "init", NULL);
+++		panic("exec");
+++	}
+++	if (waitpid(pid, &status, 0) < 0)
+++		panic("waitpid");
+++	if (WIFEXITED(status) && WEXITSTATUS(status) == 0) {
+++		pretty_message("[+] Tests successful! :-)");
+++		fd = open("/proc/cmdline", O_RDONLY);
+++		if (fd < 0)
+++			panic("open(/proc/cmdline)");
+++		if (read(fd, cmdline, sizeof(cmdline) - 1) <= 0)
+++			panic("read(/proc/cmdline)");
+++		cmdline[sizeof(cmdline) - 1] = '\0';
+++		for (success_dev = strtok(cmdline, " \n"); success_dev; success_dev = strtok(NULL, " \n")) {
+++			if (strncmp(success_dev, "wg.success=", 11))
+++				continue;
+++			memcpy(success_dev + 11 - 5, "/dev/", 5);
+++			success_dev += 11 - 5;
+++			break;
+++		}
+++		if (!success_dev || !strlen(success_dev))
+++			panic("Unable to find success device");
+++
+++		fd = open(success_dev, O_WRONLY);
+++		if (fd < 0)
+++			panic("open(success_dev)");
+++		if (write(fd, "success\n", 8) != 8)
+++			panic("write(success_dev)");
+++		close(fd);
+++	} else {
+++		const char *why = "unknown cause";
+++		int what = -1;
+++
+++		if (WIFEXITED(status)) {
+++			why = "exit code";
+++			what = WEXITSTATUS(status);
+++		} else if (WIFSIGNALED(status)) {
+++			why = "signal";
+++			what = WTERMSIG(status);
+++		}
+++		printf("\x1b[31m\x1b[1m[-] Tests failed with %s %d! \u2639\x1b[0m\n", why, what);
+++	}
+++}
+++
+++static void ensure_console(void)
+++{
+++	for (unsigned int i = 0; i < 1000; ++i) {
+++		int fd = open("/dev/console", O_RDWR);
+++		if (fd < 0) {
+++			usleep(50000);
+++			continue;
+++		}
+++		dup2(fd, 0);
+++		dup2(fd, 1);
+++		dup2(fd, 2);
+++		close(fd);
+++		if (write(1, "\0\0\0\0\n", 5) == 5)
+++			return;
+++	}
+++	panic("Unable to open console device");
+++}
+++
+++static void clear_leaks(void)
+++{
+++	int fd;
+++
+++	fd = open("/sys/kernel/debug/kmemleak", O_WRONLY);
+++	if (fd < 0)
+++		return;
+++	pretty_message("[+] Starting memory leak detection...");
+++	write(fd, "clear\n", 5);
+++	close(fd);
+++}
+++
+++static void check_leaks(void)
+++{
+++	int fd;
+++
+++	fd = open("/sys/kernel/debug/kmemleak", O_WRONLY);
+++	if (fd < 0)
+++		return;
+++	pretty_message("[+] Scanning for memory leaks...");
+++	sleep(2); /* Wait for any grace periods. */
+++	write(fd, "scan\n", 5);
+++	close(fd);
+++
+++	fd = open("/sys/kernel/debug/kmemleak", O_RDONLY);
+++	if (fd < 0)
+++		return;
+++	if (sendfile(1, fd, NULL, 0x7ffff000) > 0)
+++		panic("Memory leaks encountered");
+++	close(fd);
+++}
+++
+++int main(int argc, char *argv[])
+++{
+++	seed_rng();
+++	ensure_console();
+++	print_banner();
+++	mount_filesystems();
+++	kmod_selftests();
+++	enable_logging();
+++	clear_leaks();
+++	launch_tests();
+++	check_leaks();
+++	poweroff();
+++	return 1;
+++}
++--- /dev/null
+++++ b/tools/testing/selftests/wireguard/qemu/kernel.config
++@@ -0,0 +1,86 @@
+++CONFIG_LOCALVERSION=""
+++CONFIG_NET=y
+++CONFIG_NETDEVICES=y
+++CONFIG_NET_CORE=y
+++CONFIG_NET_IPIP=y
+++CONFIG_DUMMY=y
+++CONFIG_VETH=y
+++CONFIG_MULTIUSER=y
+++CONFIG_NAMESPACES=y
+++CONFIG_NET_NS=y
+++CONFIG_UNIX=y
+++CONFIG_INET=y
+++CONFIG_IPV6=y
+++CONFIG_NETFILTER=y
+++CONFIG_NETFILTER_ADVANCED=y
+++CONFIG_NF_CONNTRACK=y
+++CONFIG_NF_NAT=y
+++CONFIG_NETFILTER_XTABLES=y
+++CONFIG_NETFILTER_XT_NAT=y
+++CONFIG_NETFILTER_XT_MATCH_LENGTH=y
+++CONFIG_NF_CONNTRACK_IPV4=y
+++CONFIG_NF_NAT_IPV4=y
+++CONFIG_IP_NF_IPTABLES=y
+++CONFIG_IP_NF_FILTER=y
+++CONFIG_IP_NF_NAT=y
+++CONFIG_IP_ADVANCED_ROUTER=y
+++CONFIG_IP_MULTIPLE_TABLES=y
+++CONFIG_IPV6_MULTIPLE_TABLES=y
+++CONFIG_TTY=y
+++CONFIG_BINFMT_ELF=y
+++CONFIG_BINFMT_SCRIPT=y
+++CONFIG_VDSO=y
+++CONFIG_VIRTUALIZATION=y
+++CONFIG_HYPERVISOR_GUEST=y
+++CONFIG_PARAVIRT=y
+++CONFIG_KVM_GUEST=y
+++CONFIG_PARAVIRT_SPINLOCKS=y
+++CONFIG_PRINTK=y
+++CONFIG_KALLSYMS=y
+++CONFIG_BUG=y
+++CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
+++CONFIG_EMBEDDED=n
+++CONFIG_BASE_FULL=y
+++CONFIG_FUTEX=y
+++CONFIG_SHMEM=y
+++CONFIG_SLUB=y
+++CONFIG_SPARSEMEM_VMEMMAP=y
+++CONFIG_SMP=y
+++CONFIG_SCHED_SMT=y
+++CONFIG_SCHED_MC=y
+++CONFIG_NUMA=y
+++CONFIG_PREEMPT=y
+++CONFIG_NO_HZ=y
+++CONFIG_NO_HZ_IDLE=y
+++CONFIG_NO_HZ_FULL=n
+++CONFIG_HZ_PERIODIC=n
+++CONFIG_HIGH_RES_TIMERS=y
+++CONFIG_ARCH_RANDOM=y
+++CONFIG_FILE_LOCKING=y
+++CONFIG_POSIX_TIMERS=y
+++CONFIG_DEVTMPFS=y
+++CONFIG_PROC_FS=y
+++CONFIG_PROC_SYSCTL=y
+++CONFIG_SYSFS=y
+++CONFIG_TMPFS=y
+++CONFIG_CONSOLE_LOGLEVEL_DEFAULT=15
+++CONFIG_PRINTK_TIME=y
+++CONFIG_BLK_DEV_INITRD=y
+++CONFIG_LEGACY_VSYSCALL_NONE=y
+++CONFIG_KERNEL_GZIP=y
+++CONFIG_PANIC_ON_OOPS=y
+++CONFIG_BUG_ON_DATA_CORRUPTION=y
+++CONFIG_LOCKUP_DETECTOR=y
+++CONFIG_SOFTLOCKUP_DETECTOR=y
+++CONFIG_HARDLOCKUP_DETECTOR=y
+++CONFIG_WQ_WATCHDOG=y
+++CONFIG_DETECT_HUNG_TASK=y
+++CONFIG_BOOTPARAM_HARDLOCKUP_PANIC=y
+++CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
+++CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y
+++CONFIG_PANIC_TIMEOUT=-1
+++CONFIG_STACKTRACE=y
+++CONFIG_EARLY_PRINTK=y
+++CONFIG_GDB_SCRIPTS=y
+++CONFIG_WIREGUARD=y
+++CONFIG_WIREGUARD_DEBUG=y
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0074-wireguard-Kconfig-select-parent-dependency-for-crypt.patch b/target/linux/generic/backport-5.4/080-wireguard-0074-wireguard-Kconfig-select-parent-dependency-for-crypt.patch
+new file mode 100644
+index 0000000000..c2f8f77f53
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0074-wireguard-Kconfig-select-parent-dependency-for-crypt.patch
+@@ -0,0 +1,30 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Sun, 15 Dec 2019 22:08:01 +0100
++Subject: [PATCH] wireguard: Kconfig: select parent dependency for crypto
++
++commit d7c68a38bb4f9b7c1a2e4a772872c752ee5c44a6 upstream.
++
++This fixes the crypto selection submenu depenencies. Otherwise, we'd
++wind up issuing warnings in which certain dependencies we also select
++couldn't be satisfied. This condition was triggered by the addition of
++the test suite autobuilder in the previous commit.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/Kconfig | 2 ++
++ 1 file changed, 2 insertions(+)
++
++--- a/drivers/net/Kconfig
+++++ b/drivers/net/Kconfig
++@@ -85,6 +85,8 @@ config WIREGUARD
++ 	select CRYPTO_POLY1305_X86_64 if X86 && 64BIT
++ 	select CRYPTO_BLAKE2S_X86 if X86 && 64BIT
++ 	select CRYPTO_CURVE25519_X86 if X86 && 64BIT
+++	select ARM_CRYPTO if ARM
+++	select ARM64_CRYPTO if ARM64
++ 	select CRYPTO_CHACHA20_NEON if (ARM || ARM64) && KERNEL_MODE_NEON
++ 	select CRYPTO_POLY1305_NEON if ARM64 && KERNEL_MODE_NEON
++ 	select CRYPTO_POLY1305_ARM if ARM
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0075-wireguard-global-fix-spelling-mistakes-in-comments.patch b/target/linux/generic/backport-5.4/080-wireguard-0075-wireguard-global-fix-spelling-mistakes-in-comments.patch
+new file mode 100644
+index 0000000000..9b34e663a9
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0075-wireguard-global-fix-spelling-mistakes-in-comments.patch
+@@ -0,0 +1,66 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Josh Soref <jsoref@gmail.com>
++Date: Sun, 15 Dec 2019 22:08:02 +0100
++Subject: [PATCH] wireguard: global: fix spelling mistakes in comments
++
++commit a2ec8b5706944d228181c8b91d815f41d6dd8e7b upstream.
++
++This fixes two spelling errors in source code comments.
++
++Signed-off-by: Josh Soref <jsoref@gmail.com>
++[Jason: rewrote commit message]
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/receive.c | 2 +-
++ include/uapi/linux/wireguard.h  | 8 ++++----
++ 2 files changed, 5 insertions(+), 5 deletions(-)
++
++--- a/drivers/net/wireguard/receive.c
+++++ b/drivers/net/wireguard/receive.c
++@@ -380,7 +380,7 @@ static void wg_packet_consume_data_done(
++ 	/* We've already verified the Poly1305 auth tag, which means this packet
++ 	 * was not modified in transit. We can therefore tell the networking
++ 	 * stack that all checksums of every layer of encapsulation have already
++-	 * been checked "by the hardware" and therefore is unneccessary to check
+++	 * been checked "by the hardware" and therefore is unnecessary to check
++ 	 * again in software.
++ 	 */
++ 	skb->ip_summed = CHECKSUM_UNNECESSARY;
++--- a/include/uapi/linux/wireguard.h
+++++ b/include/uapi/linux/wireguard.h
++@@ -18,13 +18,13 @@
++  * one but not both of:
++  *
++  *    WGDEVICE_A_IFINDEX: NLA_U32
++- *    WGDEVICE_A_IFNAME: NLA_NUL_STRING, maxlen IFNAMESIZ - 1
+++ *    WGDEVICE_A_IFNAME: NLA_NUL_STRING, maxlen IFNAMSIZ - 1
++  *
++  * The kernel will then return several messages (NLM_F_MULTI) containing the
++  * following tree of nested items:
++  *
++  *    WGDEVICE_A_IFINDEX: NLA_U32
++- *    WGDEVICE_A_IFNAME: NLA_NUL_STRING, maxlen IFNAMESIZ - 1
+++ *    WGDEVICE_A_IFNAME: NLA_NUL_STRING, maxlen IFNAMSIZ - 1
++  *    WGDEVICE_A_PRIVATE_KEY: NLA_EXACT_LEN, len WG_KEY_LEN
++  *    WGDEVICE_A_PUBLIC_KEY: NLA_EXACT_LEN, len WG_KEY_LEN
++  *    WGDEVICE_A_LISTEN_PORT: NLA_U16
++@@ -77,7 +77,7 @@
++  * WGDEVICE_A_IFINDEX and WGDEVICE_A_IFNAME:
++  *
++  *    WGDEVICE_A_IFINDEX: NLA_U32
++- *    WGDEVICE_A_IFNAME: NLA_NUL_STRING, maxlen IFNAMESIZ - 1
+++ *    WGDEVICE_A_IFNAME: NLA_NUL_STRING, maxlen IFNAMSIZ - 1
++  *    WGDEVICE_A_FLAGS: NLA_U32, 0 or WGDEVICE_F_REPLACE_PEERS if all current
++  *                      peers should be removed prior to adding the list below.
++  *    WGDEVICE_A_PRIVATE_KEY: len WG_KEY_LEN, all zeros to remove
++@@ -121,7 +121,7 @@
++  * filling in information not contained in the prior. Note that if
++  * WGDEVICE_F_REPLACE_PEERS is specified in the first message, it probably
++  * should not be specified in fragments that come after, so that the list
++- * of peers is only cleared the first time but appened after. Likewise for
+++ * of peers is only cleared the first time but appended after. Likewise for
++  * peers, if WGPEER_F_REPLACE_ALLOWEDIPS is specified in the first message
++  * of a peer, it likely should not be specified in subsequent fragments.
++  *
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0076-wireguard-main-remove-unused-include-linux-version.h.patch b/target/linux/generic/backport-5.4/080-wireguard-0076-wireguard-main-remove-unused-include-linux-version.h.patch
+new file mode 100644
+index 0000000000..3cc0b56c3e
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0076-wireguard-main-remove-unused-include-linux-version.h.patch
+@@ -0,0 +1,28 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: YueHaibing <yuehaibing@huawei.com>
++Date: Sun, 15 Dec 2019 22:08:03 +0100
++Subject: [PATCH] wireguard: main: remove unused include <linux/version.h>
++
++commit 43967b6ff91e53bcce5ae08c16a0588a475b53a1 upstream.
++
++Remove <linux/version.h> from the includes for main.c, which is unused.
++
++Signed-off-by: YueHaibing <yuehaibing@huawei.com>
++[Jason: reworded commit message]
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/main.c | 1 -
++ 1 file changed, 1 deletion(-)
++
++--- a/drivers/net/wireguard/main.c
+++++ b/drivers/net/wireguard/main.c
++@@ -12,7 +12,6 @@
++ 
++ #include <uapi/linux/wireguard.h>
++ 
++-#include <linux/version.h>
++ #include <linux/init.h>
++ #include <linux/module.h>
++ #include <linux/genetlink.h>
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0077-wireguard-allowedips-use-kfree_rcu-instead-of-call_r.patch b/target/linux/generic/backport-5.4/080-wireguard-0077-wireguard-allowedips-use-kfree_rcu-instead-of-call_r.patch
+new file mode 100644
+index 0000000000..edd90484dd
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0077-wireguard-allowedips-use-kfree_rcu-instead-of-call_r.patch
+@@ -0,0 +1,41 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Wei Yongjun <weiyongjun1@huawei.com>
++Date: Sun, 15 Dec 2019 22:08:04 +0100
++Subject: [PATCH] wireguard: allowedips: use kfree_rcu() instead of call_rcu()
++
++commit d89ee7d5c73af15c1c6f12b016cdf469742b5726 upstream.
++
++The callback function of call_rcu() just calls a kfree(), so we
++can use kfree_rcu() instead of call_rcu() + callback function.
++
++Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/allowedips.c | 7 +------
++ 1 file changed, 1 insertion(+), 6 deletions(-)
++
++--- a/drivers/net/wireguard/allowedips.c
+++++ b/drivers/net/wireguard/allowedips.c
++@@ -31,11 +31,6 @@ static void copy_and_assign_cidr(struct
++ #define CHOOSE_NODE(parent, key) \
++ 	parent->bit[(key[parent->bit_at_a] >> parent->bit_at_b) & 1]
++ 
++-static void node_free_rcu(struct rcu_head *rcu)
++-{
++-	kfree(container_of(rcu, struct allowedips_node, rcu));
++-}
++-
++ static void push_rcu(struct allowedips_node **stack,
++ 		     struct allowedips_node __rcu *p, unsigned int *len)
++ {
++@@ -112,7 +107,7 @@ static void walk_remove_by_peer(struct a
++ 				if (!node->bit[0] || !node->bit[1]) {
++ 					rcu_assign_pointer(*nptr, DEREF(
++ 					       &node->bit[!REF(node->bit[0])]));
++-					call_rcu(&node->rcu, node_free_rcu);
+++					kfree_rcu(node, rcu);
++ 					node = DEREF(nptr);
++ 				}
++ 			}
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0078-wireguard-selftests-remove-ancient-kernel-compatibil.patch b/target/linux/generic/backport-5.4/080-wireguard-0078-wireguard-selftests-remove-ancient-kernel-compatibil.patch
+new file mode 100644
+index 0000000000..6ff0dd9d10
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0078-wireguard-selftests-remove-ancient-kernel-compatibil.patch
+@@ -0,0 +1,373 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Thu, 2 Jan 2020 17:47:49 +0100
++Subject: [PATCH] wireguard: selftests: remove ancient kernel compatibility
++ code
++
++commit 9a69a4c8802adf642bc4a13d471b5a86b44ed434 upstream.
++
++Quite a bit of the test suite was designed to work with ancient kernels.
++Thankfully we no longer have to deal with this. This commit updates
++things that we can finally update and removes things that we can finally
++remove, to avoid the build-up of the last several years as a result of
++having to support ancient kernels. We can finally rely on suppress_
++prefixlength being available. On the build side of things, the no-PIE
++hack is no longer required, and we can bump some of the tools, repair
++our m68k and i686-kvm support, and get better coverage of the static
++branches used in the crypto lib and in udp_tunnel.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ tools/testing/selftests/wireguard/netns.sh    | 11 +--
++ .../testing/selftests/wireguard/qemu/Makefile | 82 ++++++++++---------
++ .../selftests/wireguard/qemu/arch/m68k.config |  2 +-
++ tools/testing/selftests/wireguard/qemu/init.c |  1 +
++ .../selftests/wireguard/qemu/kernel.config    |  2 +
++ 5 files changed, 50 insertions(+), 48 deletions(-)
++
++--- a/tools/testing/selftests/wireguard/netns.sh
+++++ b/tools/testing/selftests/wireguard/netns.sh
++@@ -37,7 +37,7 @@ n2() { pretty 2 "$*"; maybe_exec ip netn
++ ip0() { pretty 0 "ip $*"; ip -n $netns0 "$@"; }
++ ip1() { pretty 1 "ip $*"; ip -n $netns1 "$@"; }
++ ip2() { pretty 2 "ip $*"; ip -n $netns2 "$@"; }
++-sleep() { read -t "$1" -N 0 || true; }
+++sleep() { read -t "$1" -N 1 || true; }
++ waitiperf() { pretty "${1//*-}" "wait for iperf:5201"; while [[ $(ss -N "$1" -tlp 'sport = 5201') != *iperf3* ]]; do sleep 0.1; done; }
++ waitncatudp() { pretty "${1//*-}" "wait for udp:1111"; while [[ $(ss -N "$1" -ulp 'sport = 1111') != *ncat* ]]; do sleep 0.1; done; }
++ waitncattcp() { pretty "${1//*-}" "wait for tcp:1111"; while [[ $(ss -N "$1" -tlp 'sport = 1111') != *ncat* ]]; do sleep 0.1; done; }
++@@ -294,12 +294,9 @@ ip1 -6 rule add table main suppress_pref
++ ip1 -4 route add default dev wg0 table 51820
++ ip1 -4 rule add not fwmark 51820 table 51820
++ ip1 -4 rule add table main suppress_prefixlength 0
++-# suppress_prefixlength only got added in 3.12, and we want to support 3.10+.
++-if [[ $(ip1 -4 rule show all) == *suppress_prefixlength* ]]; then
++-	# Flood the pings instead of sending just one, to trigger routing table reference counting bugs.
++-	n1 ping -W 1 -c 100 -f 192.168.99.7
++-	n1 ping -W 1 -c 100 -f abab::1111
++-fi
+++# Flood the pings instead of sending just one, to trigger routing table reference counting bugs.
+++n1 ping -W 1 -c 100 -f 192.168.99.7
+++n1 ping -W 1 -c 100 -f abab::1111
++ 
++ n0 iptables -t nat -F
++ ip0 link del vethrc
++--- a/tools/testing/selftests/wireguard/qemu/Makefile
+++++ b/tools/testing/selftests/wireguard/qemu/Makefile
++@@ -5,6 +5,7 @@
++ PWD := $(shell pwd)
++ 
++ CHOST := $(shell gcc -dumpmachine)
+++HOST_ARCH := $(firstword $(subst -, ,$(CHOST)))
++ ifneq (,$(ARCH))
++ CBUILD := $(subst -gcc,,$(lastword $(subst /, ,$(firstword $(wildcard $(foreach bindir,$(subst :, ,$(PATH)),$(bindir)/$(ARCH)-*-gcc))))))
++ ifeq (,$(CBUILD))
++@@ -37,19 +38,19 @@ endef
++ define file_download =
++ $(DISTFILES_PATH)/$(1):
++ 	mkdir -p $(DISTFILES_PATH)
++-	flock -x $$@.lock -c '[ -f $$@ ] && exit 0; wget -O $$@.tmp $(MIRROR)$(1) || wget -t inf --retry-on-http-error=404 -O $$@.tmp $(2)$(1) || rm -f $$@.tmp'
+++	flock -x $$@.lock -c '[ -f $$@ ] && exit 0; wget -O $$@.tmp $(MIRROR)$(1) || wget -O $$@.tmp $(2)$(1) || rm -f $$@.tmp'
++ 	if echo "$(3)  $$@.tmp" | sha256sum -c -; then mv $$@.tmp $$@; else rm -f $$@.tmp; exit 71; fi
++ endef
++ 
++-$(eval $(call tar_download,MUSL,musl,1.1.20,.tar.gz,https://www.musl-libc.org/releases/,44be8771d0e6c6b5f82dd15662eb2957c9a3173a19a8b49966ac0542bbd40d61))
+++$(eval $(call tar_download,MUSL,musl,1.1.24,.tar.gz,https://www.musl-libc.org/releases/,1370c9a812b2cf2a7d92802510cca0058cc37e66a7bedd70051f0a34015022a3))
++ $(eval $(call tar_download,LIBMNL,libmnl,1.0.4,.tar.bz2,https://www.netfilter.org/projects/libmnl/files/,171f89699f286a5854b72b91d06e8f8e3683064c5901fb09d954a9ab6f551f81))
++-$(eval $(call tar_download,IPERF,iperf,3.1.7,.tar.gz,http://downloads.es.net/pub/iperf/,a4ef73406fe92250602b8da2ae89ec53211f805df97a1d1d629db5a14043734f))
+++$(eval $(call tar_download,IPERF,iperf,3.7,.tar.gz,https://downloads.es.net/pub/iperf/,d846040224317caf2f75c843d309a950a7db23f9b44b94688ccbe557d6d1710c))
++ $(eval $(call tar_download,BASH,bash,5.0,.tar.gz,https://ftp.gnu.org/gnu/bash/,b4a80f2ac66170b2913efbfb9f2594f1f76c7b1afd11f799e22035d63077fb4d))
++-$(eval $(call tar_download,IPROUTE2,iproute2,5.1.0,.tar.gz,https://www.kernel.org/pub/linux/utils/net/iproute2/,9b43707d6075ecdca14803ca8ce0c8553848c49fa1586d12fd508d66577243f2))
++-$(eval $(call tar_download,IPTABLES,iptables,1.6.1,.tar.bz2,https://www.netfilter.org/projects/iptables/files/,0fc2d7bd5d7be11311726466789d4c65fb4c8e096c9182b56ce97440864f0cf5))
++-$(eval $(call tar_download,NMAP,nmap,7.60,.tar.bz2,https://nmap.org/dist/,a8796ecc4fa6c38aad6139d9515dc8113023a82e9d787e5a5fb5fa1b05516f21))
++-$(eval $(call tar_download,IPUTILS,iputils,s20161105,.tar.gz,https://github.com/iputils/iputils/archive/s20161105.tar.gz/#,f813092f03d17294fd23544b129b95cdb87fe19f7970a51908a6b88509acad8a))
++-$(eval $(call tar_download,WIREGUARD_TOOLS,WireGuard,0.0.20191212,.tar.xz,https://git.zx2c4.com/WireGuard/snapshot/,b0d718380f7a8822b2f12d75e462fa4eafa3a77871002981f367cd4fe2a1b071))
+++$(eval $(call tar_download,IPROUTE2,iproute2,5.4.0,.tar.xz,https://www.kernel.org/pub/linux/utils/net/iproute2/,fe97aa60a0d4c5ac830be18937e18dc3400ca713a33a89ad896ff1e3d46086ae))
+++$(eval $(call tar_download,IPTABLES,iptables,1.8.4,.tar.bz2,https://www.netfilter.org/projects/iptables/files/,993a3a5490a544c2cbf2ef15cf7e7ed21af1845baf228318d5c36ef8827e157c))
+++$(eval $(call tar_download,NMAP,nmap,7.80,.tar.bz2,https://nmap.org/dist/,fcfa5a0e42099e12e4bf7a68ebe6fde05553383a682e816a7ec9256ab4773faa))
+++$(eval $(call tar_download,IPUTILS,iputils,s20190709,.tar.gz,https://github.com/iputils/iputils/archive/s20190709.tar.gz/#,a15720dd741d7538dd2645f9f516d193636ae4300ff7dbc8bfca757bf166490a))
+++$(eval $(call tar_download,WIREGUARD_TOOLS,wireguard-tools,1.0.20191226,.tar.xz,https://git.zx2c4.com/wireguard-tools/snapshot/,aa8af0fdc9872d369d8c890a84dbc2a2466b55795dccd5b47721b2d97644b04f))
++ 
++ KERNEL_BUILD_PATH := $(BUILD_PATH)/kernel$(if $(findstring yes,$(DEBUG_KERNEL)),-debug)
++ rwildcard=$(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2) $(filter $(subst *,%,$2),$d))
++@@ -59,23 +60,21 @@ export CFLAGS ?= -O3 -pipe
++ export LDFLAGS ?=
++ export CPPFLAGS := -I$(BUILD_PATH)/include
++ 
++-ifeq ($(CHOST),$(CBUILD))
+++ifeq ($(HOST_ARCH),$(ARCH))
++ CROSS_COMPILE_FLAG := --host=$(CHOST)
++-NOPIE_GCC := gcc -fno-PIE
++ CFLAGS += -march=native
++ STRIP := strip
++ else
++ $(info Cross compilation: building for $(CBUILD) using $(CHOST))
++ CROSS_COMPILE_FLAG := --build=$(CBUILD) --host=$(CHOST)
++ export CROSS_COMPILE=$(CBUILD)-
++-NOPIE_GCC := $(CBUILD)-gcc -fno-PIE
++ STRIP := $(CBUILD)-strip
++ endif
++ ifeq ($(ARCH),aarch64)
++ QEMU_ARCH := aarch64
++ KERNEL_ARCH := arm64
++ KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/arch/arm64/boot/Image
++-ifeq ($(CHOST),$(CBUILD))
+++ifeq ($(HOST_ARCH),$(ARCH))
++ QEMU_MACHINE := -cpu host -machine virt,gic_version=host,accel=kvm
++ else
++ QEMU_MACHINE := -cpu cortex-a53 -machine virt
++@@ -85,7 +84,7 @@ else ifeq ($(ARCH),aarch64_be)
++ QEMU_ARCH := aarch64
++ KERNEL_ARCH := arm64
++ KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/arch/arm64/boot/Image
++-ifeq ($(CHOST),$(CBUILD))
+++ifeq ($(HOST_ARCH),$(ARCH))
++ QEMU_MACHINE := -cpu host -machine virt,gic_version=host,accel=kvm
++ else
++ QEMU_MACHINE := -cpu cortex-a53 -machine virt
++@@ -95,7 +94,7 @@ else ifeq ($(ARCH),arm)
++ QEMU_ARCH := arm
++ KERNEL_ARCH := arm
++ KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/arch/arm/boot/zImage
++-ifeq ($(CHOST),$(CBUILD))
+++ifeq ($(HOST_ARCH),$(ARCH))
++ QEMU_MACHINE := -cpu host -machine virt,gic_version=host,accel=kvm
++ else
++ QEMU_MACHINE := -cpu cortex-a15 -machine virt
++@@ -105,7 +104,7 @@ else ifeq ($(ARCH),armeb)
++ QEMU_ARCH := arm
++ KERNEL_ARCH := arm
++ KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/arch/arm/boot/zImage
++-ifeq ($(CHOST),$(CBUILD))
+++ifeq ($(HOST_ARCH),$(ARCH))
++ QEMU_MACHINE := -cpu host -machine virt,gic_version=host,accel=kvm
++ else
++ QEMU_MACHINE := -cpu cortex-a15 -machine virt
++@@ -116,7 +115,7 @@ else ifeq ($(ARCH),x86_64)
++ QEMU_ARCH := x86_64
++ KERNEL_ARCH := x86_64
++ KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/arch/x86/boot/bzImage
++-ifeq ($(CHOST),$(CBUILD))
+++ifeq ($(HOST_ARCH),$(ARCH))
++ QEMU_MACHINE := -cpu host -machine q35,accel=kvm
++ else
++ QEMU_MACHINE := -cpu Skylake-Server -machine q35
++@@ -126,7 +125,7 @@ else ifeq ($(ARCH),i686)
++ QEMU_ARCH := i386
++ KERNEL_ARCH := x86
++ KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/arch/x86/boot/bzImage
++-ifeq ($(subst i686,x86_64,$(CBUILD)),$(CHOST))
+++ifeq ($(subst x86_64,i686,$(HOST_ARCH)),$(ARCH))
++ QEMU_MACHINE := -cpu host -machine q35,accel=kvm
++ else
++ QEMU_MACHINE := -cpu coreduo -machine q35
++@@ -136,7 +135,7 @@ else ifeq ($(ARCH),mips64)
++ QEMU_ARCH := mips64
++ KERNEL_ARCH := mips
++ KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/vmlinux
++-ifeq ($(CHOST),$(CBUILD))
+++ifeq ($(HOST_ARCH),$(ARCH))
++ QEMU_MACHINE := -cpu host -machine malta,accel=kvm
++ CFLAGS += -EB
++ else
++@@ -147,7 +146,7 @@ else ifeq ($(ARCH),mips64el)
++ QEMU_ARCH := mips64el
++ KERNEL_ARCH := mips
++ KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/vmlinux
++-ifeq ($(CHOST),$(CBUILD))
+++ifeq ($(HOST_ARCH),$(ARCH))
++ QEMU_MACHINE := -cpu host -machine malta,accel=kvm
++ CFLAGS += -EL
++ else
++@@ -158,7 +157,7 @@ else ifeq ($(ARCH),mips)
++ QEMU_ARCH := mips
++ KERNEL_ARCH := mips
++ KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/vmlinux
++-ifeq ($(CHOST),$(CBUILD))
+++ifeq ($(HOST_ARCH),$(ARCH))
++ QEMU_MACHINE := -cpu host -machine malta,accel=kvm
++ CFLAGS += -EB
++ else
++@@ -169,7 +168,7 @@ else ifeq ($(ARCH),mipsel)
++ QEMU_ARCH := mipsel
++ KERNEL_ARCH := mips
++ KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/vmlinux
++-ifeq ($(CHOST),$(CBUILD))
+++ifeq ($(HOST_ARCH),$(ARCH))
++ QEMU_MACHINE := -cpu host -machine malta,accel=kvm
++ CFLAGS += -EL
++ else
++@@ -180,7 +179,7 @@ else ifeq ($(ARCH),powerpc64le)
++ QEMU_ARCH := ppc64
++ KERNEL_ARCH := powerpc
++ KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/vmlinux
++-ifeq ($(CHOST),$(CBUILD))
+++ifeq ($(HOST_ARCH),$(ARCH))
++ QEMU_MACHINE := -cpu host,accel=kvm -machine pseries
++ else
++ QEMU_MACHINE := -machine pseries
++@@ -190,7 +189,7 @@ else ifeq ($(ARCH),powerpc)
++ QEMU_ARCH := ppc
++ KERNEL_ARCH := powerpc
++ KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/arch/powerpc/boot/uImage
++-ifeq ($(CHOST),$(CBUILD))
+++ifeq ($(HOST_ARCH),$(ARCH))
++ QEMU_MACHINE := -cpu host,accel=kvm -machine ppce500
++ else
++ QEMU_MACHINE := -machine ppce500
++@@ -200,10 +199,11 @@ else ifeq ($(ARCH),m68k)
++ QEMU_ARCH := m68k
++ KERNEL_ARCH := m68k
++ KERNEL_BZIMAGE := $(KERNEL_BUILD_PATH)/vmlinux
++-ifeq ($(CHOST),$(CBUILD))
++-QEMU_MACHINE := -cpu host,accel=kvm -machine q800
+++KERNEL_CMDLINE := $(shell sed -n 's/CONFIG_CMDLINE=\(.*\)/\1/p' arch/m68k.config)
+++ifeq ($(HOST_ARCH),$(ARCH))
+++QEMU_MACHINE := -cpu host,accel=kvm -machine q800 -smp 1 -append $(KERNEL_CMDLINE)
++ else
++-QEMU_MACHINE := -machine q800
+++QEMU_MACHINE := -machine q800 -smp 1 -append $(KERNEL_CMDLINE)
++ endif
++ else
++ $(error I only build: x86_64, i686, arm, armeb, aarch64, aarch64_be, mips, mipsel, mips64, mips64el, powerpc64le, powerpc, m68k)
++@@ -238,14 +238,14 @@ $(BUILD_PATH)/init-cpio-spec.txt:
++ 	echo "nod /dev/console 644 0 0 c 5 1" >> $@
++ 	echo "dir /bin 755 0 0" >> $@
++ 	echo "file /bin/iperf3 $(IPERF_PATH)/src/iperf3 755 0 0" >> $@
++-	echo "file /bin/wg $(WIREGUARD_TOOLS_PATH)/src/tools/wg 755 0 0" >> $@
+++	echo "file /bin/wg $(WIREGUARD_TOOLS_PATH)/src/wg 755 0 0" >> $@
++ 	echo "file /bin/bash $(BASH_PATH)/bash 755 0 0" >> $@
++ 	echo "file /bin/ip $(IPROUTE2_PATH)/ip/ip 755 0 0" >> $@
++ 	echo "file /bin/ss $(IPROUTE2_PATH)/misc/ss 755 0 0" >> $@
++ 	echo "file /bin/ping $(IPUTILS_PATH)/ping 755 0 0" >> $@
++ 	echo "file /bin/ncat $(NMAP_PATH)/ncat/ncat 755 0 0" >> $@
++-	echo "file /bin/xtables-multi $(IPTABLES_PATH)/iptables/xtables-multi 755 0 0" >> $@
++-	echo "slink /bin/iptables xtables-multi 777 0 0" >> $@
+++	echo "file /bin/xtables-legacy-multi $(IPTABLES_PATH)/iptables/xtables-legacy-multi 755 0 0" >> $@
+++	echo "slink /bin/iptables xtables-legacy-multi 777 0 0" >> $@
++ 	echo "slink /bin/ping6 ping 777 0 0" >> $@
++ 	echo "dir /lib 755 0 0" >> $@
++ 	echo "file /lib/libc.so $(MUSL_PATH)/lib/libc.so 755 0 0" >> $@
++@@ -260,8 +260,8 @@ $(KERNEL_BUILD_PATH)/.config: kernel.con
++ 	cd $(KERNEL_BUILD_PATH) && ARCH=$(KERNEL_ARCH) $(KERNEL_PATH)/scripts/kconfig/merge_config.sh -n $(KERNEL_BUILD_PATH)/.config $(KERNEL_BUILD_PATH)/minimal.config
++ 	$(if $(findstring yes,$(DEBUG_KERNEL)),cp debug.config $(KERNEL_BUILD_PATH) && cd $(KERNEL_BUILD_PATH) && ARCH=$(KERNEL_ARCH) $(KERNEL_PATH)/scripts/kconfig/merge_config.sh -n $(KERNEL_BUILD_PATH)/.config debug.config,)
++ 
++-$(KERNEL_BZIMAGE): $(KERNEL_BUILD_PATH)/.config $(BUILD_PATH)/init-cpio-spec.txt $(MUSL_PATH)/lib/libc.so $(IPERF_PATH)/src/iperf3 $(IPUTILS_PATH)/ping $(BASH_PATH)/bash $(IPROUTE2_PATH)/misc/ss $(IPROUTE2_PATH)/ip/ip $(IPTABLES_PATH)/iptables/xtables-multi $(NMAP_PATH)/ncat/ncat $(WIREGUARD_TOOLS_PATH)/src/tools/wg $(BUILD_PATH)/init ../netns.sh $(WIREGUARD_SOURCES)
++-	$(MAKE) -C $(KERNEL_PATH) O=$(KERNEL_BUILD_PATH) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(CROSS_COMPILE) CC="$(NOPIE_GCC)"
+++$(KERNEL_BZIMAGE): $(KERNEL_BUILD_PATH)/.config $(BUILD_PATH)/init-cpio-spec.txt $(MUSL_PATH)/lib/libc.so $(IPERF_PATH)/src/iperf3 $(IPUTILS_PATH)/ping $(BASH_PATH)/bash $(IPROUTE2_PATH)/misc/ss $(IPROUTE2_PATH)/ip/ip $(IPTABLES_PATH)/iptables/xtables-legacy-multi $(NMAP_PATH)/ncat/ncat $(WIREGUARD_TOOLS_PATH)/src/wg $(BUILD_PATH)/init ../netns.sh $(WIREGUARD_SOURCES)
+++	$(MAKE) -C $(KERNEL_PATH) O=$(KERNEL_BUILD_PATH) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(CROSS_COMPILE)
++ 
++ $(BUILD_PATH)/include/linux/.installed: | $(KERNEL_BUILD_PATH)/.config
++ 	$(MAKE) -C $(KERNEL_PATH) O=$(KERNEL_BUILD_PATH) INSTALL_HDR_PATH=$(BUILD_PATH) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(CROSS_COMPILE) headers_install
++@@ -280,7 +280,7 @@ $(BUILD_PATH)/include/.installed: $(MUSL
++ 
++ $(MUSL_CC): $(MUSL_PATH)/lib/libc.so
++ 	sh $(MUSL_PATH)/tools/musl-gcc.specs.sh $(BUILD_PATH)/include $(MUSL_PATH)/lib /lib/ld-linux.so.1 > $(BUILD_PATH)/musl-gcc.specs
++-	printf '#!/bin/sh\nexec "$(REAL_CC)" --specs="$(BUILD_PATH)/musl-gcc.specs" -fno-stack-protector -no-pie "$$@"\n' > $(BUILD_PATH)/musl-gcc
+++	printf '#!/bin/sh\nexec "$(REAL_CC)" --specs="$(BUILD_PATH)/musl-gcc.specs" "$$@"\n' > $(BUILD_PATH)/musl-gcc
++ 	chmod +x $(BUILD_PATH)/musl-gcc
++ 
++ $(IPERF_PATH)/.installed: $(IPERF_TAR)
++@@ -291,7 +291,7 @@ $(IPERF_PATH)/.installed: $(IPERF_TAR)
++ 	touch $@
++ 
++ $(IPERF_PATH)/src/iperf3: | $(IPERF_PATH)/.installed $(USERSPACE_DEPS)
++-	cd $(IPERF_PATH) && CFLAGS="$(CFLAGS) -D_GNU_SOURCE" ./configure --prefix=/ $(CROSS_COMPILE_FLAG) --enable-static --disable-shared
+++	cd $(IPERF_PATH) && CFLAGS="$(CFLAGS) -D_GNU_SOURCE" ./configure --prefix=/ $(CROSS_COMPILE_FLAG) --enable-static --disable-shared --with-openssl=no
++ 	$(MAKE) -C $(IPERF_PATH)
++ 	$(STRIP) -s $@
++ 
++@@ -308,8 +308,8 @@ $(WIREGUARD_TOOLS_PATH)/.installed: $(WI
++ 	flock -s $<.lock tar -C $(BUILD_PATH) -xf $<
++ 	touch $@
++ 
++-$(WIREGUARD_TOOLS_PATH)/src/tools/wg: | $(WIREGUARD_TOOLS_PATH)/.installed $(LIBMNL_PATH)/src/.libs/libmnl.a $(USERSPACE_DEPS)
++-	LDFLAGS="$(LDFLAGS) -L$(LIBMNL_PATH)/src/.libs" $(MAKE) -C $(WIREGUARD_TOOLS_PATH)/src/tools LIBMNL_CFLAGS="-I$(LIBMNL_PATH)/include" LIBMNL_LDLIBS="-lmnl" wg
+++$(WIREGUARD_TOOLS_PATH)/src/wg: | $(WIREGUARD_TOOLS_PATH)/.installed $(LIBMNL_PATH)/src/.libs/libmnl.a $(USERSPACE_DEPS)
+++	LDFLAGS="$(LDFLAGS) -L$(LIBMNL_PATH)/src/.libs" $(MAKE) -C $(WIREGUARD_TOOLS_PATH)/src LIBMNL_CFLAGS="-I$(LIBMNL_PATH)/include" LIBMNL_LDLIBS="-lmnl" wg
++ 	$(STRIP) -s $@
++ 
++ $(BUILD_PATH)/init: init.c | $(USERSPACE_DEPS)
++@@ -323,7 +323,8 @@ $(IPUTILS_PATH)/.installed: $(IPUTILS_TA
++ 	touch $@
++ 
++ $(IPUTILS_PATH)/ping: | $(IPUTILS_PATH)/.installed $(USERSPACE_DEPS)
++-	$(MAKE) -C $(IPUTILS_PATH) USE_CAP=no USE_IDN=no USE_NETTLE=no USE_CRYPTO=no ping
+++	sed -i /atexit/d $(IPUTILS_PATH)/ping.c
+++	cd $(IPUTILS_PATH) && $(CC) $(CFLAGS) -std=c99 -o $@ ping.c ping_common.c ping6_common.c iputils_common.c -D_GNU_SOURCE -D'IPUTILS_VERSION(f)=f' -lresolv $(LDFLAGS)
++ 	$(STRIP) -s $@
++ 
++ $(BASH_PATH)/.installed: $(BASH_TAR)
++@@ -357,7 +358,7 @@ $(IPTABLES_PATH)/.installed: $(IPTABLES_
++ 	sed -i -e "/nfnetlink=[01]/s:=[01]:=0:" -e "/nfconntrack=[01]/s:=[01]:=0:" $(IPTABLES_PATH)/configure
++ 	touch $@
++ 
++-$(IPTABLES_PATH)/iptables/xtables-multi: | $(IPTABLES_PATH)/.installed $(LIBMNL_PATH)/src/.libs/libmnl.a $(USERSPACE_DEPS)
+++$(IPTABLES_PATH)/iptables/xtables-legacy-multi: | $(IPTABLES_PATH)/.installed $(LIBMNL_PATH)/src/.libs/libmnl.a $(USERSPACE_DEPS)
++ 	cd $(IPTABLES_PATH) && PKG_CONFIG_LIBDIR="$(LIBMNL_PATH)" ./configure --prefix=/ $(CROSS_COMPILE_FLAG) --enable-static --disable-shared --disable-nftables --disable-bpf-compiler --disable-nfsynproxy --disable-libipq --with-kernel=$(BUILD_PATH)/include
++ 	$(MAKE) -C $(IPTABLES_PATH)
++ 	$(STRIP) -s $@
++@@ -368,8 +369,9 @@ $(NMAP_PATH)/.installed: $(NMAP_TAR)
++ 	touch $@
++ 
++ $(NMAP_PATH)/ncat/ncat: | $(NMAP_PATH)/.installed $(USERSPACE_DEPS)
++-	cd $(NMAP_PATH) && ./configure --prefix=/ $(CROSS_COMPILE_FLAG) --enable-static --disable-shared --without-ndiff --without-zenmap --without-nping --with-libpcap=included --with-libpcre=included --with-libdnet=included --without-liblua --with-liblinear=included --without-nmap-update --without-openssl --with-pcap=linux
++-	$(MAKE) -C $(NMAP_PATH) build-ncat
+++	cd $(NMAP_PATH) && ./configure --prefix=/ $(CROSS_COMPILE_FLAG) --enable-static --disable-shared --without-ndiff --without-zenmap --without-nping --with-libpcap=included --with-libpcre=included --with-libdnet=included --without-liblua --with-liblinear=included --without-nmap-update --without-openssl --with-pcap=linux --without-libssh
+++	$(MAKE) -C $(NMAP_PATH)/libpcap
+++	$(MAKE) -C $(NMAP_PATH)/ncat
++ 	$(STRIP) -s $@
++ 
++ clean:
++@@ -379,7 +381,7 @@ distclean: clean
++ 	rm -rf $(DISTFILES_PATH)
++ 
++ menuconfig: $(KERNEL_BUILD_PATH)/.config
++-	$(MAKE) -C $(KERNEL_PATH) O=$(KERNEL_BUILD_PATH) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(CROSS_COMPILE) CC="$(NOPIE_GCC)" menuconfig
+++	$(MAKE) -C $(KERNEL_PATH) O=$(KERNEL_BUILD_PATH) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(CROSS_COMPILE) menuconfig
++ 
++ .PHONY: qemu build clean distclean menuconfig
++ .DELETE_ON_ERROR:
++--- a/tools/testing/selftests/wireguard/qemu/arch/m68k.config
+++++ b/tools/testing/selftests/wireguard/qemu/arch/m68k.config
++@@ -1,9 +1,9 @@
++ CONFIG_MMU=y
+++CONFIG_M68KCLASSIC=y
++ CONFIG_M68040=y
++ CONFIG_MAC=y
++ CONFIG_SERIAL_PMACZILOG=y
++ CONFIG_SERIAL_PMACZILOG_TTYS=y
++ CONFIG_SERIAL_PMACZILOG_CONSOLE=y
++-CONFIG_CMDLINE_BOOL=y
++ CONFIG_CMDLINE="console=ttyS0 wg.success=ttyS1"
++ CONFIG_FRAME_WARN=1024
++--- a/tools/testing/selftests/wireguard/qemu/init.c
+++++ b/tools/testing/selftests/wireguard/qemu/init.c
++@@ -21,6 +21,7 @@
++ #include <sys/reboot.h>
++ #include <sys/utsname.h>
++ #include <sys/sendfile.h>
+++#include <sys/sysmacros.h>
++ #include <linux/random.h>
++ #include <linux/version.h>
++ 
++--- a/tools/testing/selftests/wireguard/qemu/kernel.config
+++++ b/tools/testing/selftests/wireguard/qemu/kernel.config
++@@ -39,6 +39,7 @@ CONFIG_PRINTK=y
++ CONFIG_KALLSYMS=y
++ CONFIG_BUG=y
++ CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
+++CONFIG_JUMP_LABEL=y
++ CONFIG_EMBEDDED=n
++ CONFIG_BASE_FULL=y
++ CONFIG_FUTEX=y
++@@ -55,6 +56,7 @@ CONFIG_NO_HZ_IDLE=y
++ CONFIG_NO_HZ_FULL=n
++ CONFIG_HZ_PERIODIC=n
++ CONFIG_HIGH_RES_TIMERS=y
+++CONFIG_COMPAT_32BIT_TIME=y
++ CONFIG_ARCH_RANDOM=y
++ CONFIG_FILE_LOCKING=y
++ CONFIG_POSIX_TIMERS=y
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0079-wireguard-queueing-do-not-account-for-pfmemalloc-whe.patch b/target/linux/generic/backport-5.4/080-wireguard-0079-wireguard-queueing-do-not-account-for-pfmemalloc-whe.patch
+new file mode 100644
+index 0000000000..fb03b1b1a6
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0079-wireguard-queueing-do-not-account-for-pfmemalloc-whe.patch
+@@ -0,0 +1,39 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Thu, 2 Jan 2020 17:47:50 +0100
++Subject: [PATCH] wireguard: queueing: do not account for pfmemalloc when
++ clearing skb header
++
++commit 04d2ea92a18417619182cbb79063f154892b0150 upstream.
++
++Before 8b7008620b84 ("net: Don't copy pfmemalloc flag in __copy_skb_
++header()"), the pfmemalloc flag used to be between headers_start and
++headers_end, which is a region we clear when preparing the packet for
++encryption/decryption. This is a parameter we certainly want to
++preserve, which is why 8b7008620b84 moved it out of there. The code here
++was written in a world before 8b7008620b84, though, where we had to
++manually account for it. This commit brings things up to speed.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/queueing.h | 3 ---
++ 1 file changed, 3 deletions(-)
++
++--- a/drivers/net/wireguard/queueing.h
+++++ b/drivers/net/wireguard/queueing.h
++@@ -83,13 +83,10 @@ static inline __be16 wg_skb_examine_untr
++ 
++ static inline void wg_reset_packet(struct sk_buff *skb)
++ {
++-	const int pfmemalloc = skb->pfmemalloc;
++-
++ 	skb_scrub_packet(skb, true);
++ 	memset(&skb->headers_start, 0,
++ 	       offsetof(struct sk_buff, headers_end) -
++ 		       offsetof(struct sk_buff, headers_start));
++-	skb->pfmemalloc = pfmemalloc;
++ 	skb->queue_mapping = 0;
++ 	skb->nohdr = 0;
++ 	skb->peeked = 0;
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0080-wireguard-socket-mark-skbs-as-not-on-list-when-recei.patch b/target/linux/generic/backport-5.4/080-wireguard-0080-wireguard-socket-mark-skbs-as-not-on-list-when-recei.patch
+new file mode 100644
+index 0000000000..779491c8db
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0080-wireguard-socket-mark-skbs-as-not-on-list-when-recei.patch
+@@ -0,0 +1,34 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Thu, 2 Jan 2020 17:47:51 +0100
++Subject: [PATCH] wireguard: socket: mark skbs as not on list when receiving
++ via gro
++
++commit 736775d06bac60d7a353e405398b48b2bd8b1e54 upstream.
++
++Certain drivers will pass gro skbs to udp, at which point the udp driver
++simply iterates through them and passes them off to encap_rcv, which is
++where we pick up. At the moment, we're not attempting to coalesce these
++into bundles, but we also don't want to wind up having cascaded lists of
++skbs treated separately. The right behavior here, then, is to just mark
++each incoming one as not on a list. This can be seen in practice, for
++example, with Qualcomm's rmnet_perf driver.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Tested-by: Yaroslav Furman <yaro330@gmail.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/socket.c | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/drivers/net/wireguard/socket.c
+++++ b/drivers/net/wireguard/socket.c
++@@ -333,6 +333,7 @@ static int wg_receive(struct sock *sk, s
++ 	wg = sk->sk_user_data;
++ 	if (unlikely(!wg))
++ 		goto err;
+++	skb_mark_not_on_list(skb);
++ 	wg_packet_receive(wg, skb);
++ 	return 0;
++ 
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0081-wireguard-allowedips-fix-use-after-free-in-root_remo.patch b/target/linux/generic/backport-5.4/080-wireguard-0081-wireguard-allowedips-fix-use-after-free-in-root_remo.patch
+new file mode 100644
+index 0000000000..e77ab5834a
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0081-wireguard-allowedips-fix-use-after-free-in-root_remo.patch
+@@ -0,0 +1,164 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Eric Dumazet <edumazet@google.com>
++Date: Tue, 4 Feb 2020 22:17:25 +0100
++Subject: [PATCH] wireguard: allowedips: fix use-after-free in
++ root_remove_peer_lists
++
++commit 9981159fc3b677b357f84e069a11de5a5ec8a2a8 upstream.
++
++In the unlikely case a new node could not be allocated, we need to
++remove @newnode from @peer->allowedips_list before freeing it.
++
++syzbot reported:
++
++BUG: KASAN: use-after-free in __list_del_entry_valid+0xdc/0xf5 lib/list_debug.c:54
++Read of size 8 at addr ffff88809881a538 by task syz-executor.4/30133
++
++CPU: 0 PID: 30133 Comm: syz-executor.4 Not tainted 5.5.0-syzkaller #0
++Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
++Call Trace:
++ __dump_stack lib/dump_stack.c:77 [inline]
++ dump_stack+0x197/0x210 lib/dump_stack.c:118
++ print_address_description.constprop.0.cold+0xd4/0x30b mm/kasan/report.c:374
++ __kasan_report.cold+0x1b/0x32 mm/kasan/report.c:506
++ kasan_report+0x12/0x20 mm/kasan/common.c:639
++ __asan_report_load8_noabort+0x14/0x20 mm/kasan/generic_report.c:135
++ __list_del_entry_valid+0xdc/0xf5 lib/list_debug.c:54
++ __list_del_entry include/linux/list.h:132 [inline]
++ list_del include/linux/list.h:146 [inline]
++ root_remove_peer_lists+0x24f/0x4b0 drivers/net/wireguard/allowedips.c:65
++ wg_allowedips_free+0x232/0x390 drivers/net/wireguard/allowedips.c:300
++ wg_peer_remove_all+0xd5/0x620 drivers/net/wireguard/peer.c:187
++ wg_set_device+0xd01/0x1350 drivers/net/wireguard/netlink.c:542
++ genl_family_rcv_msg_doit net/netlink/genetlink.c:672 [inline]
++ genl_family_rcv_msg net/netlink/genetlink.c:717 [inline]
++ genl_rcv_msg+0x67d/0xea0 net/netlink/genetlink.c:734
++ netlink_rcv_skb+0x177/0x450 net/netlink/af_netlink.c:2477
++ genl_rcv+0x29/0x40 net/netlink/genetlink.c:745
++ netlink_unicast_kernel net/netlink/af_netlink.c:1302 [inline]
++ netlink_unicast+0x59e/0x7e0 net/netlink/af_netlink.c:1328
++ netlink_sendmsg+0x91c/0xea0 net/netlink/af_netlink.c:1917
++ sock_sendmsg_nosec net/socket.c:652 [inline]
++ sock_sendmsg+0xd7/0x130 net/socket.c:672
++ ____sys_sendmsg+0x753/0x880 net/socket.c:2343
++ ___sys_sendmsg+0x100/0x170 net/socket.c:2397
++ __sys_sendmsg+0x105/0x1d0 net/socket.c:2430
++ __do_sys_sendmsg net/socket.c:2439 [inline]
++ __se_sys_sendmsg net/socket.c:2437 [inline]
++ __x64_sys_sendmsg+0x78/0xb0 net/socket.c:2437
++ do_syscall_64+0xfa/0x790 arch/x86/entry/common.c:294
++ entry_SYSCALL_64_after_hwframe+0x49/0xbe
++RIP: 0033:0x45b399
++Code: ad b6 fb ff c3 66 2e 0f 1f 84 00 00 00 00 00 66 90 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 0f 83 7b b6 fb ff c3 66 2e 0f 1f 84 00 00 00 00
++RSP: 002b:00007f99a9bcdc78 EFLAGS: 00000246 ORIG_RAX: 000000000000002e
++RAX: ffffffffffffffda RBX: 00007f99a9bce6d4 RCX: 000000000045b399
++RDX: 0000000000000000 RSI: 0000000020001340 RDI: 0000000000000003
++RBP: 000000000075bf20 R08: 0000000000000000 R09: 0000000000000000
++R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000004
++R13: 00000000000009ba R14: 00000000004cb2b8 R15: 0000000000000009
++
++Allocated by task 30103:
++ save_stack+0x23/0x90 mm/kasan/common.c:72
++ set_track mm/kasan/common.c:80 [inline]
++ __kasan_kmalloc mm/kasan/common.c:513 [inline]
++ __kasan_kmalloc.constprop.0+0xcf/0xe0 mm/kasan/common.c:486
++ kasan_kmalloc+0x9/0x10 mm/kasan/common.c:527
++ kmem_cache_alloc_trace+0x158/0x790 mm/slab.c:3551
++ kmalloc include/linux/slab.h:556 [inline]
++ kzalloc include/linux/slab.h:670 [inline]
++ add+0x70a/0x1970 drivers/net/wireguard/allowedips.c:236
++ wg_allowedips_insert_v4+0xf6/0x160 drivers/net/wireguard/allowedips.c:320
++ set_allowedip drivers/net/wireguard/netlink.c:343 [inline]
++ set_peer+0xfb9/0x1150 drivers/net/wireguard/netlink.c:468
++ wg_set_device+0xbd4/0x1350 drivers/net/wireguard/netlink.c:591
++ genl_family_rcv_msg_doit net/netlink/genetlink.c:672 [inline]
++ genl_family_rcv_msg net/netlink/genetlink.c:717 [inline]
++ genl_rcv_msg+0x67d/0xea0 net/netlink/genetlink.c:734
++ netlink_rcv_skb+0x177/0x450 net/netlink/af_netlink.c:2477
++ genl_rcv+0x29/0x40 net/netlink/genetlink.c:745
++ netlink_unicast_kernel net/netlink/af_netlink.c:1302 [inline]
++ netlink_unicast+0x59e/0x7e0 net/netlink/af_netlink.c:1328
++ netlink_sendmsg+0x91c/0xea0 net/netlink/af_netlink.c:1917
++ sock_sendmsg_nosec net/socket.c:652 [inline]
++ sock_sendmsg+0xd7/0x130 net/socket.c:672
++ ____sys_sendmsg+0x753/0x880 net/socket.c:2343
++ ___sys_sendmsg+0x100/0x170 net/socket.c:2397
++ __sys_sendmsg+0x105/0x1d0 net/socket.c:2430
++ __do_sys_sendmsg net/socket.c:2439 [inline]
++ __se_sys_sendmsg net/socket.c:2437 [inline]
++ __x64_sys_sendmsg+0x78/0xb0 net/socket.c:2437
++ do_syscall_64+0xfa/0x790 arch/x86/entry/common.c:294
++ entry_SYSCALL_64_after_hwframe+0x49/0xbe
++
++Freed by task 30103:
++ save_stack+0x23/0x90 mm/kasan/common.c:72
++ set_track mm/kasan/common.c:80 [inline]
++ kasan_set_free_info mm/kasan/common.c:335 [inline]
++ __kasan_slab_free+0x102/0x150 mm/kasan/common.c:474
++ kasan_slab_free+0xe/0x10 mm/kasan/common.c:483
++ __cache_free mm/slab.c:3426 [inline]
++ kfree+0x10a/0x2c0 mm/slab.c:3757
++ add+0x12d2/0x1970 drivers/net/wireguard/allowedips.c:266
++ wg_allowedips_insert_v4+0xf6/0x160 drivers/net/wireguard/allowedips.c:320
++ set_allowedip drivers/net/wireguard/netlink.c:343 [inline]
++ set_peer+0xfb9/0x1150 drivers/net/wireguard/netlink.c:468
++ wg_set_device+0xbd4/0x1350 drivers/net/wireguard/netlink.c:591
++ genl_family_rcv_msg_doit net/netlink/genetlink.c:672 [inline]
++ genl_family_rcv_msg net/netlink/genetlink.c:717 [inline]
++ genl_rcv_msg+0x67d/0xea0 net/netlink/genetlink.c:734
++ netlink_rcv_skb+0x177/0x450 net/netlink/af_netlink.c:2477
++ genl_rcv+0x29/0x40 net/netlink/genetlink.c:745
++ netlink_unicast_kernel net/netlink/af_netlink.c:1302 [inline]
++ netlink_unicast+0x59e/0x7e0 net/netlink/af_netlink.c:1328
++ netlink_sendmsg+0x91c/0xea0 net/netlink/af_netlink.c:1917
++ sock_sendmsg_nosec net/socket.c:652 [inline]
++ sock_sendmsg+0xd7/0x130 net/socket.c:672
++ ____sys_sendmsg+0x753/0x880 net/socket.c:2343
++ ___sys_sendmsg+0x100/0x170 net/socket.c:2397
++ __sys_sendmsg+0x105/0x1d0 net/socket.c:2430
++ __do_sys_sendmsg net/socket.c:2439 [inline]
++ __se_sys_sendmsg net/socket.c:2437 [inline]
++ __x64_sys_sendmsg+0x78/0xb0 net/socket.c:2437
++ do_syscall_64+0xfa/0x790 arch/x86/entry/common.c:294
++ entry_SYSCALL_64_after_hwframe+0x49/0xbe
++
++The buggy address belongs to the object at ffff88809881a500
++ which belongs to the cache kmalloc-64 of size 64
++The buggy address is located 56 bytes inside of
++ 64-byte region [ffff88809881a500, ffff88809881a540)
++The buggy address belongs to the page:
++page:ffffea0002620680 refcount:1 mapcount:0 mapping:ffff8880aa400380 index:0x0
++raw: 00fffe0000000200 ffffea000250b748 ffffea000254bac8 ffff8880aa400380
++raw: 0000000000000000 ffff88809881a000 0000000100000020 0000000000000000
++page dumped because: kasan: bad access detected
++
++Memory state around the buggy address:
++ ffff88809881a400: fb fb fb fb fb fb fb fb fc fc fc fc fc fc fc fc
++ ffff88809881a480: 00 00 00 00 00 fc fc fc fc fc fc fc fc fc fc fc
++>ffff88809881a500: fb fb fb fb fb fb fb fb fc fc fc fc fc fc fc fc
++                                        ^
++ ffff88809881a580: fb fb fb fb fb fb fb fb fc fc fc fc fc fc fc fc
++ ffff88809881a600: 00 00 00 00 00 00 fc fc fc fc fc fc fc fc fc fc
++
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Signed-off-by: Eric Dumazet <edumazet@google.com>
++Reported-by: syzbot <syzkaller@googlegroups.com>
++Cc: Jason A. Donenfeld <Jason@zx2c4.com>
++Cc: wireguard@lists.zx2c4.com
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/allowedips.c | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/drivers/net/wireguard/allowedips.c
+++++ b/drivers/net/wireguard/allowedips.c
++@@ -263,6 +263,7 @@ static int add(struct allowedips_node __
++ 	} else {
++ 		node = kzalloc(sizeof(*node), GFP_KERNEL);
++ 		if (unlikely(!node)) {
+++			list_del(&newnode->peer_list);
++ 			kfree(newnode);
++ 			return -ENOMEM;
++ 		}
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0082-wireguard-noise-reject-peers-with-low-order-public-k.patch b/target/linux/generic/backport-5.4/080-wireguard-0082-wireguard-noise-reject-peers-with-low-order-public-k.patch
+new file mode 100644
+index 0000000000..55bb276118
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0082-wireguard-noise-reject-peers-with-low-order-public-k.patch
+@@ -0,0 +1,233 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Tue, 4 Feb 2020 22:17:26 +0100
++Subject: [PATCH] wireguard: noise: reject peers with low order public keys
++
++commit ec31c2676a10e064878927b243fada8c2fb0c03c upstream.
++
++Our static-static calculation returns a failure if the public key is of
++low order. We check for this when peers are added, and don't allow them
++to be added if they're low order, except in the case where we haven't
++yet been given a private key. In that case, we would defer the removal
++of the peer until we're given a private key, since at that point we're
++doing new static-static calculations which incur failures we can act on.
++This meant, however, that we wound up removing peers rather late in the
++configuration flow.
++
++Syzkaller points out that peer_remove calls flush_workqueue, which in
++turn might then wait for sending a handshake initiation to complete.
++Since handshake initiation needs the static identity lock, holding the
++static identity lock while calling peer_remove can result in a rare
++deadlock. We have precisely this case in this situation of late-stage
++peer removal based on an invalid public key. We can't drop the lock when
++removing, because then incoming handshakes might interact with a bogus
++static-static calculation.
++
++While the band-aid patch for this would involve breaking up the peer
++removal into two steps like wg_peer_remove_all does, in order to solve
++the locking issue, there's actually a much more elegant way of fixing
++this:
++
++If the static-static calculation succeeds with one private key, it
++*must* succeed with all others, because all 32-byte strings map to valid
++private keys, thanks to clamping. That means we can get rid of this
++silly dance and locking headaches of removing peers late in the
++configuration flow, and instead just reject them early on, regardless of
++whether the device has yet been assigned a private key. For the case
++where the device doesn't yet have a private key, we safely use zeros
++just for the purposes of checking for low order points by way of
++checking the output of the calculation.
++
++The following PoC will trigger the deadlock:
++
++ip link add wg0 type wireguard
++ip addr add 10.0.0.1/24 dev wg0
++ip link set wg0 up
++ping -f 10.0.0.2 &
++while true; do
++        wg set wg0 private-key /dev/null peer AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA= allowed-ips 10.0.0.0/24 endpoint 10.0.0.3:1234
++        wg set wg0 private-key <(echo AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA=)
++done
++
++[    0.949105] ======================================================
++[    0.949550] WARNING: possible circular locking dependency detected
++[    0.950143] 5.5.0-debug+ #18 Not tainted
++[    0.950431] ------------------------------------------------------
++[    0.950959] wg/89 is trying to acquire lock:
++[    0.951252] ffff8880333e2128 ((wq_completion)wg-kex-wg0){+.+.}, at: flush_workqueue+0xe3/0x12f0
++[    0.951865]
++[    0.951865] but task is already holding lock:
++[    0.952280] ffff888032819bc0 (&wg->static_identity.lock){++++}, at: wg_set_device+0x95d/0xcc0
++[    0.953011]
++[    0.953011] which lock already depends on the new lock.
++[    0.953011]
++[    0.953651]
++[    0.953651] the existing dependency chain (in reverse order) is:
++[    0.954292]
++[    0.954292] -> #2 (&wg->static_identity.lock){++++}:
++[    0.954804]        lock_acquire+0x127/0x350
++[    0.955133]        down_read+0x83/0x410
++[    0.955428]        wg_noise_handshake_create_initiation+0x97/0x700
++[    0.955885]        wg_packet_send_handshake_initiation+0x13a/0x280
++[    0.956401]        wg_packet_handshake_send_worker+0x10/0x20
++[    0.956841]        process_one_work+0x806/0x1500
++[    0.957167]        worker_thread+0x8c/0xcb0
++[    0.957549]        kthread+0x2ee/0x3b0
++[    0.957792]        ret_from_fork+0x24/0x30
++[    0.958234]
++[    0.958234] -> #1 ((work_completion)(&peer->transmit_handshake_work)){+.+.}:
++[    0.958808]        lock_acquire+0x127/0x350
++[    0.959075]        process_one_work+0x7ab/0x1500
++[    0.959369]        worker_thread+0x8c/0xcb0
++[    0.959639]        kthread+0x2ee/0x3b0
++[    0.959896]        ret_from_fork+0x24/0x30
++[    0.960346]
++[    0.960346] -> #0 ((wq_completion)wg-kex-wg0){+.+.}:
++[    0.960945]        check_prev_add+0x167/0x1e20
++[    0.961351]        __lock_acquire+0x2012/0x3170
++[    0.961725]        lock_acquire+0x127/0x350
++[    0.961990]        flush_workqueue+0x106/0x12f0
++[    0.962280]        peer_remove_after_dead+0x160/0x220
++[    0.962600]        wg_set_device+0xa24/0xcc0
++[    0.962994]        genl_rcv_msg+0x52f/0xe90
++[    0.963298]        netlink_rcv_skb+0x111/0x320
++[    0.963618]        genl_rcv+0x1f/0x30
++[    0.963853]        netlink_unicast+0x3f6/0x610
++[    0.964245]        netlink_sendmsg+0x700/0xb80
++[    0.964586]        __sys_sendto+0x1dd/0x2c0
++[    0.964854]        __x64_sys_sendto+0xd8/0x1b0
++[    0.965141]        do_syscall_64+0x90/0xd9a
++[    0.965408]        entry_SYSCALL_64_after_hwframe+0x49/0xbe
++[    0.965769]
++[    0.965769] other info that might help us debug this:
++[    0.965769]
++[    0.966337] Chain exists of:
++[    0.966337]   (wq_completion)wg-kex-wg0 --> (work_completion)(&peer->transmit_handshake_work) --> &wg->static_identity.lock
++[    0.966337]
++[    0.967417]  Possible unsafe locking scenario:
++[    0.967417]
++[    0.967836]        CPU0                    CPU1
++[    0.968155]        ----                    ----
++[    0.968497]   lock(&wg->static_identity.lock);
++[    0.968779]                                lock((work_completion)(&peer->transmit_handshake_work));
++[    0.969345]                                lock(&wg->static_identity.lock);
++[    0.969809]   lock((wq_completion)wg-kex-wg0);
++[    0.970146]
++[    0.970146]  *** DEADLOCK ***
++[    0.970146]
++[    0.970531] 5 locks held by wg/89:
++[    0.970908]  #0: ffffffff827433c8 (cb_lock){++++}, at: genl_rcv+0x10/0x30
++[    0.971400]  #1: ffffffff82743480 (genl_mutex){+.+.}, at: genl_rcv_msg+0x642/0xe90
++[    0.971924]  #2: ffffffff827160c0 (rtnl_mutex){+.+.}, at: wg_set_device+0x9f/0xcc0
++[    0.972488]  #3: ffff888032819de0 (&wg->device_update_lock){+.+.}, at: wg_set_device+0xb0/0xcc0
++[    0.973095]  #4: ffff888032819bc0 (&wg->static_identity.lock){++++}, at: wg_set_device+0x95d/0xcc0
++[    0.973653]
++[    0.973653] stack backtrace:
++[    0.973932] CPU: 1 PID: 89 Comm: wg Not tainted 5.5.0-debug+ #18
++[    0.974476] Call Trace:
++[    0.974638]  dump_stack+0x97/0xe0
++[    0.974869]  check_noncircular+0x312/0x3e0
++[    0.975132]  ? print_circular_bug+0x1f0/0x1f0
++[    0.975410]  ? __kernel_text_address+0x9/0x30
++[    0.975727]  ? unwind_get_return_address+0x51/0x90
++[    0.976024]  check_prev_add+0x167/0x1e20
++[    0.976367]  ? graph_lock+0x70/0x160
++[    0.976682]  __lock_acquire+0x2012/0x3170
++[    0.976998]  ? register_lock_class+0x1140/0x1140
++[    0.977323]  lock_acquire+0x127/0x350
++[    0.977627]  ? flush_workqueue+0xe3/0x12f0
++[    0.977890]  flush_workqueue+0x106/0x12f0
++[    0.978147]  ? flush_workqueue+0xe3/0x12f0
++[    0.978410]  ? find_held_lock+0x2c/0x110
++[    0.978662]  ? lock_downgrade+0x6e0/0x6e0
++[    0.978919]  ? queue_rcu_work+0x60/0x60
++[    0.979166]  ? netif_napi_del+0x151/0x3b0
++[    0.979501]  ? peer_remove_after_dead+0x160/0x220
++[    0.979871]  peer_remove_after_dead+0x160/0x220
++[    0.980232]  wg_set_device+0xa24/0xcc0
++[    0.980516]  ? deref_stack_reg+0x8e/0xc0
++[    0.980801]  ? set_peer+0xe10/0xe10
++[    0.981040]  ? __ww_mutex_check_waiters+0x150/0x150
++[    0.981430]  ? __nla_validate_parse+0x163/0x270
++[    0.981719]  ? genl_family_rcv_msg_attrs_parse+0x13f/0x310
++[    0.982078]  genl_rcv_msg+0x52f/0xe90
++[    0.982348]  ? genl_family_rcv_msg_attrs_parse+0x310/0x310
++[    0.982690]  ? register_lock_class+0x1140/0x1140
++[    0.983049]  netlink_rcv_skb+0x111/0x320
++[    0.983298]  ? genl_family_rcv_msg_attrs_parse+0x310/0x310
++[    0.983645]  ? netlink_ack+0x880/0x880
++[    0.983888]  genl_rcv+0x1f/0x30
++[    0.984168]  netlink_unicast+0x3f6/0x610
++[    0.984443]  ? netlink_detachskb+0x60/0x60
++[    0.984729]  ? find_held_lock+0x2c/0x110
++[    0.984976]  netlink_sendmsg+0x700/0xb80
++[    0.985220]  ? netlink_broadcast_filtered+0xa60/0xa60
++[    0.985533]  __sys_sendto+0x1dd/0x2c0
++[    0.985763]  ? __x64_sys_getpeername+0xb0/0xb0
++[    0.986039]  ? sockfd_lookup_light+0x17/0x160
++[    0.986397]  ? __sys_recvmsg+0x8c/0xf0
++[    0.986711]  ? __sys_recvmsg_sock+0xd0/0xd0
++[    0.987018]  __x64_sys_sendto+0xd8/0x1b0
++[    0.987283]  ? lockdep_hardirqs_on+0x39b/0x5a0
++[    0.987666]  do_syscall_64+0x90/0xd9a
++[    0.987903]  entry_SYSCALL_64_after_hwframe+0x49/0xbe
++[    0.988223] RIP: 0033:0x7fe77c12003e
++[    0.988508] Code: c3 8b 07 85 c0 75 24 49 89 fb 48 89 f0 48 89 d7 48 89 ce 4c 89 c2 4d 89 ca 4c 8b 44 24 08 4c 8b 4c 24 10 4c 4
++[    0.989666] RSP: 002b:00007fffada2ed58 EFLAGS: 00000246 ORIG_RAX: 000000000000002c
++[    0.990137] RAX: ffffffffffffffda RBX: 00007fe77c159d48 RCX: 00007fe77c12003e
++[    0.990583] RDX: 0000000000000040 RSI: 000055fd1d38e020 RDI: 0000000000000004
++[    0.991091] RBP: 000055fd1d38e020 R08: 000055fd1cb63358 R09: 000000000000000c
++[    0.991568] R10: 0000000000000000 R11: 0000000000000246 R12: 000000000000002c
++[    0.992014] R13: 0000000000000004 R14: 000055fd1d38e020 R15: 0000000000000001
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Reported-by: syzbot <syzkaller@googlegroups.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/netlink.c |  6 ++----
++ drivers/net/wireguard/noise.c   | 10 +++++++---
++ 2 files changed, 9 insertions(+), 7 deletions(-)
++
++--- a/drivers/net/wireguard/netlink.c
+++++ b/drivers/net/wireguard/netlink.c
++@@ -575,10 +575,8 @@ static int wg_set_device(struct sk_buff
++ 							 private_key);
++ 		list_for_each_entry_safe(peer, temp, &wg->peer_list,
++ 					 peer_list) {
++-			if (wg_noise_precompute_static_static(peer))
++-				wg_noise_expire_current_peer_keypairs(peer);
++-			else
++-				wg_peer_remove(peer);
+++			BUG_ON(!wg_noise_precompute_static_static(peer));
+++			wg_noise_expire_current_peer_keypairs(peer);
++ 		}
++ 		wg_cookie_checker_precompute_device_keys(&wg->cookie_checker);
++ 		up_write(&wg->static_identity.lock);
++--- a/drivers/net/wireguard/noise.c
+++++ b/drivers/net/wireguard/noise.c
++@@ -46,17 +46,21 @@ void __init wg_noise_init(void)
++ /* Must hold peer->handshake.static_identity->lock */
++ bool wg_noise_precompute_static_static(struct wg_peer *peer)
++ {
++-	bool ret = true;
+++	bool ret;
++ 
++ 	down_write(&peer->handshake.lock);
++-	if (peer->handshake.static_identity->has_identity)
+++	if (peer->handshake.static_identity->has_identity) {
++ 		ret = curve25519(
++ 			peer->handshake.precomputed_static_static,
++ 			peer->handshake.static_identity->static_private,
++ 			peer->handshake.remote_static);
++-	else
+++	} else {
+++		u8 empty[NOISE_PUBLIC_KEY_LEN] = { 0 };
+++
+++		ret = curve25519(empty, empty, peer->handshake.remote_static);
++ 		memset(peer->handshake.precomputed_static_static, 0,
++ 		       NOISE_PUBLIC_KEY_LEN);
+++	}
++ 	up_write(&peer->handshake.lock);
++ 	return ret;
++ }
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0083-wireguard-selftests-ensure-non-addition-of-peers-wit.patch b/target/linux/generic/backport-5.4/080-wireguard-0083-wireguard-selftests-ensure-non-addition-of-peers-wit.patch
+new file mode 100644
+index 0000000000..86877a6590
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0083-wireguard-selftests-ensure-non-addition-of-peers-wit.patch
+@@ -0,0 +1,34 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Tue, 4 Feb 2020 22:17:27 +0100
++Subject: [PATCH] wireguard: selftests: ensure non-addition of peers with
++ failed precomputation
++
++commit f9398acba6a4ae9cb98bfe4d56414d376eff8d57 upstream.
++
++Ensure that peers with low order points are ignored, both in the case
++where we already have a device private key and in the case where we do
++not. This adds points that naturally give a zero output.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ tools/testing/selftests/wireguard/netns.sh | 6 ++++++
++ 1 file changed, 6 insertions(+)
++
++--- a/tools/testing/selftests/wireguard/netns.sh
+++++ b/tools/testing/selftests/wireguard/netns.sh
++@@ -516,6 +516,12 @@ n0 wg set wg0 peer "$pub2" allowed-ips 0
++ n0 wg set wg0 peer "$pub2" allowed-ips 0.0.0.0/0
++ n0 wg set wg0 peer "$pub2" allowed-ips ::/0,1700::/111,5000::/4,e000::/37,9000::/75
++ n0 wg set wg0 peer "$pub2" allowed-ips ::/0
+++n0 wg set wg0 peer "$pub2" remove
+++low_order_points=( AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA= AQAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA= 4Ot6fDtBuK4WVuP68Z/EatoJjeucMrH9hmIFFl9JuAA= X5yVvKNQjCSx0LFVnIPvWwREXMRYHI6G2CJO3dCfEVc= 7P///////////////////////////////////////38= 7f///////////////////////////////////////38= 7v///////////////////////////////////////38= )
+++n0 wg set wg0 private-key /dev/null ${low_order_points[@]/#/peer }
+++[[ -z $(n0 wg show wg0 peers) ]]
+++n0 wg set wg0 private-key <(echo "$key1") ${low_order_points[@]/#/peer }
+++[[ -z $(n0 wg show wg0 peers) ]]
++ ip0 link del wg0
++ 
++ declare -A objects
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0084-wireguard-selftests-tie-socket-waiting-to-target-pid.patch b/target/linux/generic/backport-5.4/080-wireguard-0084-wireguard-selftests-tie-socket-waiting-to-target-pid.patch
+new file mode 100644
+index 0000000000..4530f0f49a
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0084-wireguard-selftests-tie-socket-waiting-to-target-pid.patch
+@@ -0,0 +1,77 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Tue, 4 Feb 2020 22:17:29 +0100
++Subject: [PATCH] wireguard: selftests: tie socket waiting to target pid
++
++commit 88f404a9b1d75388225b1c67b6dd327cb2182777 upstream.
++
++Without this, we wind up proceeding too early sometimes when the
++previous process has just used the same listening port. So, we tie the
++listening socket query to the specific pid we're interested in.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ tools/testing/selftests/wireguard/netns.sh | 17 ++++++++---------
++ 1 file changed, 8 insertions(+), 9 deletions(-)
++
++--- a/tools/testing/selftests/wireguard/netns.sh
+++++ b/tools/testing/selftests/wireguard/netns.sh
++@@ -38,9 +38,8 @@ ip0() { pretty 0 "ip $*"; ip -n $netns0
++ ip1() { pretty 1 "ip $*"; ip -n $netns1 "$@"; }
++ ip2() { pretty 2 "ip $*"; ip -n $netns2 "$@"; }
++ sleep() { read -t "$1" -N 1 || true; }
++-waitiperf() { pretty "${1//*-}" "wait for iperf:5201"; while [[ $(ss -N "$1" -tlp 'sport = 5201') != *iperf3* ]]; do sleep 0.1; done; }
++-waitncatudp() { pretty "${1//*-}" "wait for udp:1111"; while [[ $(ss -N "$1" -ulp 'sport = 1111') != *ncat* ]]; do sleep 0.1; done; }
++-waitncattcp() { pretty "${1//*-}" "wait for tcp:1111"; while [[ $(ss -N "$1" -tlp 'sport = 1111') != *ncat* ]]; do sleep 0.1; done; }
+++waitiperf() { pretty "${1//*-}" "wait for iperf:5201 pid $2"; while [[ $(ss -N "$1" -tlpH 'sport = 5201') != *\"iperf3\",pid=$2,fd=* ]]; do sleep 0.1; done; }
+++waitncatudp() { pretty "${1//*-}" "wait for udp:1111 pid $2"; while [[ $(ss -N "$1" -ulpH 'sport = 1111') != *\"ncat\",pid=$2,fd=* ]]; do sleep 0.1; done; }
++ waitiface() { pretty "${1//*-}" "wait for $2 to come up"; ip netns exec "$1" bash -c "while [[ \$(< \"/sys/class/net/$2/operstate\") != up ]]; do read -t .1 -N 0 || true; done;"; }
++ 
++ cleanup() {
++@@ -119,22 +118,22 @@ tests() {
++ 
++ 	# TCP over IPv4
++ 	n2 iperf3 -s -1 -B 192.168.241.2 &
++-	waitiperf $netns2
+++	waitiperf $netns2 $!
++ 	n1 iperf3 -Z -t 3 -c 192.168.241.2
++ 
++ 	# TCP over IPv6
++ 	n1 iperf3 -s -1 -B fd00::1 &
++-	waitiperf $netns1
+++	waitiperf $netns1 $!
++ 	n2 iperf3 -Z -t 3 -c fd00::1
++ 
++ 	# UDP over IPv4
++ 	n1 iperf3 -s -1 -B 192.168.241.1 &
++-	waitiperf $netns1
+++	waitiperf $netns1 $!
++ 	n2 iperf3 -Z -t 3 -b 0 -u -c 192.168.241.1
++ 
++ 	# UDP over IPv6
++ 	n2 iperf3 -s -1 -B fd00::2 &
++-	waitiperf $netns2
+++	waitiperf $netns2 $!
++ 	n1 iperf3 -Z -t 3 -b 0 -u -c fd00::2
++ }
++ 
++@@ -207,7 +206,7 @@ n1 ping -W 1 -c 1 192.168.241.2
++ n1 wg set wg0 peer "$pub2" allowed-ips 192.168.241.0/24
++ exec 4< <(n1 ncat -l -u -p 1111)
++ ncat_pid=$!
++-waitncatudp $netns1
+++waitncatudp $netns1 $ncat_pid
++ n2 ncat -u 192.168.241.1 1111 <<<"X"
++ read -r -N 1 -t 1 out <&4 && [[ $out == "X" ]]
++ kill $ncat_pid
++@@ -216,7 +215,7 @@ n1 wg set wg0 peer "$more_specific_key"
++ n2 wg set wg0 listen-port 9997
++ exec 4< <(n1 ncat -l -u -p 1111)
++ ncat_pid=$!
++-waitncatudp $netns1
+++waitncatudp $netns1 $ncat_pid
++ n2 ncat -u 192.168.241.1 1111 <<<"X"
++ ! read -r -N 1 -t 1 out <&4 || false
++ kill $ncat_pid
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0085-wireguard-device-use-icmp_ndo_send-helper.patch b/target/linux/generic/backport-5.4/080-wireguard-0085-wireguard-device-use-icmp_ndo_send-helper.patch
+new file mode 100644
+index 0000000000..321db189e1
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0085-wireguard-device-use-icmp_ndo_send-helper.patch
+@@ -0,0 +1,64 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Tue, 11 Feb 2020 20:47:08 +0100
++Subject: [PATCH] wireguard: device: use icmp_ndo_send helper
++
++commit a12d7f3cbdc72c7625881c8dc2660fc2c979fdf2 upstream.
++
++Because wireguard is calling icmp from network device context, it should
++use the ndo helper so that the rate limiting applies correctly.  This
++commit adds a small test to the wireguard test suite to ensure that the
++new functions continue doing the right thing in the context of
++wireguard. It does this by setting up a condition that will definately
++evoke an icmp error message from the driver, but along a nat'd path.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/device.c             |  4 ++--
++ tools/testing/selftests/wireguard/netns.sh | 11 +++++++++++
++ 2 files changed, 13 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/wireguard/device.c
+++++ b/drivers/net/wireguard/device.c
++@@ -203,9 +203,9 @@ err_peer:
++ err:
++ 	++dev->stats.tx_errors;
++ 	if (skb->protocol == htons(ETH_P_IP))
++-		icmp_send(skb, ICMP_DEST_UNREACH, ICMP_HOST_UNREACH, 0);
+++		icmp_ndo_send(skb, ICMP_DEST_UNREACH, ICMP_HOST_UNREACH, 0);
++ 	else if (skb->protocol == htons(ETH_P_IPV6))
++-		icmpv6_send(skb, ICMPV6_DEST_UNREACH, ICMPV6_ADDR_UNREACH, 0);
+++		icmpv6_ndo_send(skb, ICMPV6_DEST_UNREACH, ICMPV6_ADDR_UNREACH, 0);
++ 	kfree_skb(skb);
++ 	return ret;
++ }
++--- a/tools/testing/selftests/wireguard/netns.sh
+++++ b/tools/testing/selftests/wireguard/netns.sh
++@@ -24,6 +24,7 @@
++ set -e
++ 
++ exec 3>&1
+++export LANG=C
++ export WG_HIDE_KEYS=never
++ netns0="wg-test-$$-0"
++ netns1="wg-test-$$-1"
++@@ -297,7 +298,17 @@ ip1 -4 rule add table main suppress_pref
++ n1 ping -W 1 -c 100 -f 192.168.99.7
++ n1 ping -W 1 -c 100 -f abab::1111
++ 
+++# Have ns2 NAT into wg0 packets from ns0, but return an icmp error along the right route.
+++n2 iptables -t nat -A POSTROUTING -s 10.0.0.0/24 -d 192.168.241.0/24 -j SNAT --to 192.168.241.2
+++n0 iptables -t filter -A INPUT \! -s 10.0.0.0/24 -i vethrs -j DROP # Manual rpfilter just to be explicit.
+++n2 bash -c 'printf 1 > /proc/sys/net/ipv4/ip_forward'
+++ip0 -4 route add 192.168.241.1 via 10.0.0.100
+++n2 wg set wg0 peer "$pub1" remove
+++[[ $(! n0 ping -W 1 -c 1 192.168.241.1 || false) == *"From 10.0.0.100 icmp_seq=1 Destination Host Unreachable"* ]]
+++
++ n0 iptables -t nat -F
+++n0 iptables -t filter -F
+++n2 iptables -t nat -F
++ ip0 link del vethrc
++ ip0 link del vethrs
++ ip1 link del wg0
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0086-wireguard-selftests-reduce-complexity-and-fix-make-r.patch b/target/linux/generic/backport-5.4/080-wireguard-0086-wireguard-selftests-reduce-complexity-and-fix-make-r.patch
+new file mode 100644
+index 0000000000..ac292a8682
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0086-wireguard-selftests-reduce-complexity-and-fix-make-r.patch
+@@ -0,0 +1,104 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 14 Feb 2020 23:57:20 +0100
++Subject: [PATCH] wireguard: selftests: reduce complexity and fix make races
++
++commit 04ddf1208f03e1dbc39a4619c40eba640051b950 upstream.
++
++This gives us fewer dependencies and shortens build time, fixes up some
++hash checking race conditions, and also fixes missing directory creation
++that caused issues on massively parallel builds.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ .../testing/selftests/wireguard/qemu/Makefile | 38 +++++++------------
++ 1 file changed, 14 insertions(+), 24 deletions(-)
++
++--- a/tools/testing/selftests/wireguard/qemu/Makefile
+++++ b/tools/testing/selftests/wireguard/qemu/Makefile
++@@ -38,19 +38,17 @@ endef
++ define file_download =
++ $(DISTFILES_PATH)/$(1):
++ 	mkdir -p $(DISTFILES_PATH)
++-	flock -x $$@.lock -c '[ -f $$@ ] && exit 0; wget -O $$@.tmp $(MIRROR)$(1) || wget -O $$@.tmp $(2)$(1) || rm -f $$@.tmp'
++-	if echo "$(3)  $$@.tmp" | sha256sum -c -; then mv $$@.tmp $$@; else rm -f $$@.tmp; exit 71; fi
+++	flock -x $$@.lock -c '[ -f $$@ ] && exit 0; wget -O $$@.tmp $(MIRROR)$(1) || wget -O $$@.tmp $(2)$(1) || rm -f $$@.tmp; [ -f $$@.tmp ] || exit 1; if echo "$(3)  $$@.tmp" | sha256sum -c -; then mv $$@.tmp $$@; else rm -f $$@.tmp; exit 71; fi'
++ endef
++ 
++ $(eval $(call tar_download,MUSL,musl,1.1.24,.tar.gz,https://www.musl-libc.org/releases/,1370c9a812b2cf2a7d92802510cca0058cc37e66a7bedd70051f0a34015022a3))
++-$(eval $(call tar_download,LIBMNL,libmnl,1.0.4,.tar.bz2,https://www.netfilter.org/projects/libmnl/files/,171f89699f286a5854b72b91d06e8f8e3683064c5901fb09d954a9ab6f551f81))
++ $(eval $(call tar_download,IPERF,iperf,3.7,.tar.gz,https://downloads.es.net/pub/iperf/,d846040224317caf2f75c843d309a950a7db23f9b44b94688ccbe557d6d1710c))
++ $(eval $(call tar_download,BASH,bash,5.0,.tar.gz,https://ftp.gnu.org/gnu/bash/,b4a80f2ac66170b2913efbfb9f2594f1f76c7b1afd11f799e22035d63077fb4d))
++ $(eval $(call tar_download,IPROUTE2,iproute2,5.4.0,.tar.xz,https://www.kernel.org/pub/linux/utils/net/iproute2/,fe97aa60a0d4c5ac830be18937e18dc3400ca713a33a89ad896ff1e3d46086ae))
++ $(eval $(call tar_download,IPTABLES,iptables,1.8.4,.tar.bz2,https://www.netfilter.org/projects/iptables/files/,993a3a5490a544c2cbf2ef15cf7e7ed21af1845baf228318d5c36ef8827e157c))
++ $(eval $(call tar_download,NMAP,nmap,7.80,.tar.bz2,https://nmap.org/dist/,fcfa5a0e42099e12e4bf7a68ebe6fde05553383a682e816a7ec9256ab4773faa))
++ $(eval $(call tar_download,IPUTILS,iputils,s20190709,.tar.gz,https://github.com/iputils/iputils/archive/s20190709.tar.gz/#,a15720dd741d7538dd2645f9f516d193636ae4300ff7dbc8bfca757bf166490a))
++-$(eval $(call tar_download,WIREGUARD_TOOLS,wireguard-tools,1.0.20191226,.tar.xz,https://git.zx2c4.com/wireguard-tools/snapshot/,aa8af0fdc9872d369d8c890a84dbc2a2466b55795dccd5b47721b2d97644b04f))
+++$(eval $(call tar_download,WIREGUARD_TOOLS,wireguard-tools,1.0.20200206,.tar.xz,https://git.zx2c4.com/wireguard-tools/snapshot/,f5207248c6a3c3e3bfc9ab30b91c1897b00802ed861e1f9faaed873366078c64))
++ 
++ KERNEL_BUILD_PATH := $(BUILD_PATH)/kernel$(if $(findstring yes,$(DEBUG_KERNEL)),-debug)
++ rwildcard=$(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2) $(filter $(subst *,%,$2),$d))
++@@ -295,21 +293,13 @@ $(IPERF_PATH)/src/iperf3: | $(IPERF_PATH
++ 	$(MAKE) -C $(IPERF_PATH)
++ 	$(STRIP) -s $@
++ 
++-$(LIBMNL_PATH)/.installed: $(LIBMNL_TAR)
++-	flock -s $<.lock tar -C $(BUILD_PATH) -xf $<
++-	touch $@
++-
++-$(LIBMNL_PATH)/src/.libs/libmnl.a: | $(LIBMNL_PATH)/.installed $(USERSPACE_DEPS)
++-	cd $(LIBMNL_PATH) && ./configure --prefix=/ $(CROSS_COMPILE_FLAG) --enable-static --disable-shared
++-	$(MAKE) -C $(LIBMNL_PATH)
++-	sed -i 's:prefix=.*:prefix=$(LIBMNL_PATH):' $(LIBMNL_PATH)/libmnl.pc
++-
++ $(WIREGUARD_TOOLS_PATH)/.installed: $(WIREGUARD_TOOLS_TAR)
+++	mkdir -p $(BUILD_PATH)
++ 	flock -s $<.lock tar -C $(BUILD_PATH) -xf $<
++ 	touch $@
++ 
++-$(WIREGUARD_TOOLS_PATH)/src/wg: | $(WIREGUARD_TOOLS_PATH)/.installed $(LIBMNL_PATH)/src/.libs/libmnl.a $(USERSPACE_DEPS)
++-	LDFLAGS="$(LDFLAGS) -L$(LIBMNL_PATH)/src/.libs" $(MAKE) -C $(WIREGUARD_TOOLS_PATH)/src LIBMNL_CFLAGS="-I$(LIBMNL_PATH)/include" LIBMNL_LDLIBS="-lmnl" wg
+++$(WIREGUARD_TOOLS_PATH)/src/wg: | $(WIREGUARD_TOOLS_PATH)/.installed $(USERSPACE_DEPS)
+++	$(MAKE) -C $(WIREGUARD_TOOLS_PATH)/src wg
++ 	$(STRIP) -s $@
++ 
++ $(BUILD_PATH)/init: init.c | $(USERSPACE_DEPS)
++@@ -340,17 +330,17 @@ $(BASH_PATH)/bash: | $(BASH_PATH)/.insta
++ $(IPROUTE2_PATH)/.installed: $(IPROUTE2_TAR)
++ 	mkdir -p $(BUILD_PATH)
++ 	flock -s $<.lock tar -C $(BUILD_PATH) -xf $<
++-	printf 'CC:=$(CC)\nPKG_CONFIG:=pkg-config\nTC_CONFIG_XT:=n\nTC_CONFIG_ATM:=n\nTC_CONFIG_IPSET:=n\nIP_CONFIG_SETNS:=y\nHAVE_ELF:=n\nHAVE_MNL:=y\nHAVE_BERKELEY_DB:=n\nHAVE_LATEX:=n\nHAVE_PDFLATEX:=n\nCFLAGS+=-DHAVE_SETNS -DHAVE_LIBMNL -I$(LIBMNL_PATH)/include\nLDLIBS+=-lmnl' > $(IPROUTE2_PATH)/config.mk
+++	printf 'CC:=$(CC)\nPKG_CONFIG:=pkg-config\nTC_CONFIG_XT:=n\nTC_CONFIG_ATM:=n\nTC_CONFIG_IPSET:=n\nIP_CONFIG_SETNS:=y\nHAVE_ELF:=n\nHAVE_MNL:=n\nHAVE_BERKELEY_DB:=n\nHAVE_LATEX:=n\nHAVE_PDFLATEX:=n\nCFLAGS+=-DHAVE_SETNS\n' > $(IPROUTE2_PATH)/config.mk
++ 	printf 'lib: snapshot\n\t$$(MAKE) -C lib\nip/ip: lib\n\t$$(MAKE) -C ip ip\nmisc/ss: lib\n\t$$(MAKE) -C misc ss\n' >> $(IPROUTE2_PATH)/Makefile
++ 	touch $@
++ 
++-$(IPROUTE2_PATH)/ip/ip: | $(IPROUTE2_PATH)/.installed $(LIBMNL_PATH)/src/.libs/libmnl.a $(USERSPACE_DEPS)
++-	LDFLAGS="$(LDFLAGS) -L$(LIBMNL_PATH)/src/.libs" PKG_CONFIG_LIBDIR="$(LIBMNL_PATH)" $(MAKE) -C $(IPROUTE2_PATH) PREFIX=/ ip/ip
++-	$(STRIP) -s $(IPROUTE2_PATH)/ip/ip
++-
++-$(IPROUTE2_PATH)/misc/ss: | $(IPROUTE2_PATH)/.installed $(LIBMNL_PATH)/src/.libs/libmnl.a $(USERSPACE_DEPS)
++-	LDFLAGS="$(LDFLAGS) -L$(LIBMNL_PATH)/src/.libs" PKG_CONFIG_LIBDIR="$(LIBMNL_PATH)" $(MAKE) -C $(IPROUTE2_PATH) PREFIX=/ misc/ss
++-	$(STRIP) -s $(IPROUTE2_PATH)/misc/ss
+++$(IPROUTE2_PATH)/ip/ip: | $(IPROUTE2_PATH)/.installed $(USERSPACE_DEPS)
+++	$(MAKE) -C $(IPROUTE2_PATH) PREFIX=/ ip/ip
+++	$(STRIP) -s $@
+++
+++$(IPROUTE2_PATH)/misc/ss: | $(IPROUTE2_PATH)/.installed $(USERSPACE_DEPS)
+++	$(MAKE) -C $(IPROUTE2_PATH) PREFIX=/ misc/ss
+++	$(STRIP) -s $@
++ 
++ $(IPTABLES_PATH)/.installed: $(IPTABLES_TAR)
++ 	mkdir -p $(BUILD_PATH)
++@@ -358,8 +348,8 @@ $(IPTABLES_PATH)/.installed: $(IPTABLES_
++ 	sed -i -e "/nfnetlink=[01]/s:=[01]:=0:" -e "/nfconntrack=[01]/s:=[01]:=0:" $(IPTABLES_PATH)/configure
++ 	touch $@
++ 
++-$(IPTABLES_PATH)/iptables/xtables-legacy-multi: | $(IPTABLES_PATH)/.installed $(LIBMNL_PATH)/src/.libs/libmnl.a $(USERSPACE_DEPS)
++-	cd $(IPTABLES_PATH) && PKG_CONFIG_LIBDIR="$(LIBMNL_PATH)" ./configure --prefix=/ $(CROSS_COMPILE_FLAG) --enable-static --disable-shared --disable-nftables --disable-bpf-compiler --disable-nfsynproxy --disable-libipq --with-kernel=$(BUILD_PATH)/include
+++$(IPTABLES_PATH)/iptables/xtables-legacy-multi: | $(IPTABLES_PATH)/.installed $(USERSPACE_DEPS)
+++	cd $(IPTABLES_PATH) && ./configure --prefix=/ $(CROSS_COMPILE_FLAG) --enable-static --disable-shared --disable-nftables --disable-bpf-compiler --disable-nfsynproxy --disable-libipq --disable-connlabel --with-kernel=$(BUILD_PATH)/include
++ 	$(MAKE) -C $(IPTABLES_PATH)
++ 	$(STRIP) -s $@
++ 
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0087-wireguard-receive-reset-last_under_load-to-zero.patch b/target/linux/generic/backport-5.4/080-wireguard-0087-wireguard-receive-reset-last_under_load-to-zero.patch
+new file mode 100644
+index 0000000000..193d28a83f
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0087-wireguard-receive-reset-last_under_load-to-zero.patch
+@@ -0,0 +1,38 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 14 Feb 2020 23:57:21 +0100
++Subject: [PATCH] wireguard: receive: reset last_under_load to zero
++
++commit 2a8a4df36462aa85b0db87b7c5ea145ba67e34a8 upstream.
++
++This is a small optimization that prevents more expensive comparisons
++from happening when they are no longer necessary, by clearing the
++last_under_load variable whenever we wind up in a state where we were
++under load but we no longer are.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Suggested-by: Matt Dunwoodie <ncon@noconroy.net>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/receive.c | 7 +++++--
++ 1 file changed, 5 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/wireguard/receive.c
+++++ b/drivers/net/wireguard/receive.c
++@@ -118,10 +118,13 @@ static void wg_receive_handshake_packet(
++ 
++ 	under_load = skb_queue_len(&wg->incoming_handshakes) >=
++ 		     MAX_QUEUED_INCOMING_HANDSHAKES / 8;
++-	if (under_load)
+++	if (under_load) {
++ 		last_under_load = ktime_get_coarse_boottime_ns();
++-	else if (last_under_load)
+++	} else if (last_under_load) {
++ 		under_load = !wg_birthdate_has_expired(last_under_load, 1);
+++		if (!under_load)
+++			last_under_load = 0;
+++	}
++ 	mac_state = wg_cookie_validate_packet(&wg->cookie_checker, skb,
++ 					      under_load);
++ 	if ((under_load && mac_state == VALID_MAC_WITH_COOKIE) ||
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0088-wireguard-send-account-for-mtu-0-devices.patch b/target/linux/generic/backport-5.4/080-wireguard-0088-wireguard-send-account-for-mtu-0-devices.patch
+new file mode 100644
+index 0000000000..d84efe20f0
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0088-wireguard-send-account-for-mtu-0-devices.patch
+@@ -0,0 +1,95 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 14 Feb 2020 23:57:22 +0100
++Subject: [PATCH] wireguard: send: account for mtu=0 devices
++
++commit 175f1ca9a9ed8689d2028da1a7c624bb4fb4ff7e upstream.
++
++It turns out there's an easy way to get packets queued up while still
++having an MTU of zero, and that's via persistent keep alive. This commit
++makes sure that in whatever condition, we don't wind up dividing by
++zero. Note that an MTU of zero for a wireguard interface is something
++quasi-valid, so I don't think the correct fix is to limit it via
++min_mtu. This can be reproduced easily with:
++
++ip link add wg0 type wireguard
++ip link add wg1 type wireguard
++ip link set wg0 up mtu 0
++ip link set wg1 up
++wg set wg0 private-key <(wg genkey)
++wg set wg1 listen-port 1 private-key <(wg genkey) peer $(wg show wg0 public-key)
++wg set wg0 peer $(wg show wg1 public-key) persistent-keepalive 1 endpoint 127.0.0.1:1
++
++However, while min_mtu=0 seems fine, it makes sense to restrict the
++max_mtu. This commit also restricts the maximum MTU to the greatest
++number for which rounding up to the padding multiple won't overflow a
++signed integer. Packets this large were always rejected anyway
++eventually, due to checks deeper in, but it seems more sound not to even
++let the administrator configure something that won't work anyway.
++
++We use this opportunity to clean up this function a bit so that it's
++clear which paths we're expecting.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Cc: Eric Dumazet <eric.dumazet@gmail.com>
++Reviewed-by: Eric Dumazet <edumazet@google.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/device.c |  7 ++++---
++ drivers/net/wireguard/send.c   | 16 +++++++++++-----
++ 2 files changed, 15 insertions(+), 8 deletions(-)
++
++--- a/drivers/net/wireguard/device.c
+++++ b/drivers/net/wireguard/device.c
++@@ -258,6 +258,8 @@ static void wg_setup(struct net_device *
++ 	enum { WG_NETDEV_FEATURES = NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
++ 				    NETIF_F_SG | NETIF_F_GSO |
++ 				    NETIF_F_GSO_SOFTWARE | NETIF_F_HIGHDMA };
+++	const int overhead = MESSAGE_MINIMUM_LENGTH + sizeof(struct udphdr) +
+++			     max(sizeof(struct ipv6hdr), sizeof(struct iphdr));
++ 
++ 	dev->netdev_ops = &netdev_ops;
++ 	dev->hard_header_len = 0;
++@@ -271,9 +273,8 @@ static void wg_setup(struct net_device *
++ 	dev->features |= WG_NETDEV_FEATURES;
++ 	dev->hw_features |= WG_NETDEV_FEATURES;
++ 	dev->hw_enc_features |= WG_NETDEV_FEATURES;
++-	dev->mtu = ETH_DATA_LEN - MESSAGE_MINIMUM_LENGTH -
++-		   sizeof(struct udphdr) -
++-		   max(sizeof(struct ipv6hdr), sizeof(struct iphdr));
+++	dev->mtu = ETH_DATA_LEN - overhead;
+++	dev->max_mtu = round_down(INT_MAX, MESSAGE_PADDING_MULTIPLE) - overhead;
++ 
++ 	SET_NETDEV_DEVTYPE(dev, &device_type);
++ 
++--- a/drivers/net/wireguard/send.c
+++++ b/drivers/net/wireguard/send.c
++@@ -143,16 +143,22 @@ static void keep_key_fresh(struct wg_pee
++ 
++ static unsigned int calculate_skb_padding(struct sk_buff *skb)
++ {
+++	unsigned int padded_size, last_unit = skb->len;
+++
+++	if (unlikely(!PACKET_CB(skb)->mtu))
+++		return ALIGN(last_unit, MESSAGE_PADDING_MULTIPLE) - last_unit;
+++
++ 	/* We do this modulo business with the MTU, just in case the networking
++ 	 * layer gives us a packet that's bigger than the MTU. In that case, we
++ 	 * wouldn't want the final subtraction to overflow in the case of the
++-	 * padded_size being clamped.
+++	 * padded_size being clamped. Fortunately, that's very rarely the case,
+++	 * so we optimize for that not happening.
++ 	 */
++-	unsigned int last_unit = skb->len % PACKET_CB(skb)->mtu;
++-	unsigned int padded_size = ALIGN(last_unit, MESSAGE_PADDING_MULTIPLE);
+++	if (unlikely(last_unit > PACKET_CB(skb)->mtu))
+++		last_unit %= PACKET_CB(skb)->mtu;
++ 
++-	if (padded_size > PACKET_CB(skb)->mtu)
++-		padded_size = PACKET_CB(skb)->mtu;
+++	padded_size = min(PACKET_CB(skb)->mtu,
+++			  ALIGN(last_unit, MESSAGE_PADDING_MULTIPLE));
++ 	return padded_size - last_unit;
++ }
++ 
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0089-wireguard-socket-remove-extra-call-to-synchronize_ne.patch b/target/linux/generic/backport-5.4/080-wireguard-0089-wireguard-socket-remove-extra-call-to-synchronize_ne.patch
+new file mode 100644
+index 0000000000..458e9d51e5
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0089-wireguard-socket-remove-extra-call-to-synchronize_ne.patch
+@@ -0,0 +1,32 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 14 Feb 2020 23:57:23 +0100
++Subject: [PATCH] wireguard: socket: remove extra call to synchronize_net
++
++commit 1fbc33b0a7feb6ca72bf7dc8a05d81485ee8ee2e upstream.
++
++synchronize_net() is a wrapper around synchronize_rcu(), so there's no
++point in having synchronize_net and synchronize_rcu back to back,
++despite the documentation comment suggesting maybe it's somewhat useful,
++"Wait for packets currently being received to be done." This commit
++removes the extra call.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Suggested-by: Eric Dumazet <eric.dumazet@gmail.com>
++Reviewed-by: Eric Dumazet <edumazet@google.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/socket.c | 1 -
++ 1 file changed, 1 deletion(-)
++
++--- a/drivers/net/wireguard/socket.c
+++++ b/drivers/net/wireguard/socket.c
++@@ -432,7 +432,6 @@ void wg_socket_reinit(struct wg_device *
++ 		wg->incoming_port = ntohs(inet_sk(new4)->inet_sport);
++ 	mutex_unlock(&wg->socket_update_lock);
++ 	synchronize_rcu();
++-	synchronize_net();
++ 	sock_free(old4);
++ 	sock_free(old6);
++ }
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0090-wireguard-selftests-remove-duplicated-include-sys-ty.patch b/target/linux/generic/backport-5.4/080-wireguard-0090-wireguard-selftests-remove-duplicated-include-sys-ty.patch
+new file mode 100644
+index 0000000000..93545e6760
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0090-wireguard-selftests-remove-duplicated-include-sys-ty.patch
+@@ -0,0 +1,27 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: YueHaibing <yuehaibing@huawei.com>
++Date: Wed, 18 Mar 2020 18:30:43 -0600
++Subject: [PATCH] wireguard: selftests: remove duplicated include <sys/types.h>
++
++commit 166391159c5deb84795d2ff46e95f276177fa5fb upstream.
++
++This commit removes a duplicated include.
++
++Signed-off-by: YueHaibing <yuehaibing@huawei.com>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ tools/testing/selftests/wireguard/qemu/init.c | 1 -
++ 1 file changed, 1 deletion(-)
++
++--- a/tools/testing/selftests/wireguard/qemu/init.c
+++++ b/tools/testing/selftests/wireguard/qemu/init.c
++@@ -13,7 +13,6 @@
++ #include <fcntl.h>
++ #include <sys/wait.h>
++ #include <sys/mount.h>
++-#include <sys/types.h>
++ #include <sys/stat.h>
++ #include <sys/types.h>
++ #include <sys/io.h>
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0091-wireguard-queueing-account-for-skb-protocol-0.patch b/target/linux/generic/backport-5.4/080-wireguard-0091-wireguard-queueing-account-for-skb-protocol-0.patch
+new file mode 100644
+index 0000000000..a9ca655e74
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0091-wireguard-queueing-account-for-skb-protocol-0.patch
+@@ -0,0 +1,100 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Wed, 18 Mar 2020 18:30:45 -0600
++Subject: [PATCH] wireguard: queueing: account for skb->protocol==0
++
++commit a5588604af448664e796daf3c1d5a4523c60667b upstream.
++
++We carry out checks to the effect of:
++
++  if (skb->protocol != wg_examine_packet_protocol(skb))
++    goto err;
++
++By having wg_skb_examine_untrusted_ip_hdr return 0 on failure, this
++means that the check above still passes in the case where skb->protocol
++is zero, which is possible to hit with AF_PACKET:
++
++  struct sockaddr_pkt saddr = { .spkt_device = "wg0" };
++  unsigned char buffer[5] = { 0 };
++  sendto(socket(AF_PACKET, SOCK_PACKET, /* skb->protocol = */ 0),
++         buffer, sizeof(buffer), 0, (const struct sockaddr *)&saddr, sizeof(saddr));
++
++Additional checks mean that this isn't actually a problem in the code
++base, but I could imagine it becoming a problem later if the function is
++used more liberally.
++
++I would prefer to fix this by having wg_examine_packet_protocol return a
++32-bit ~0 value on failure, which will never match any value of
++skb->protocol, which would simply change the generated code from a mov
++to a movzx. However, sparse complains, and adding __force casts doesn't
++seem like a good idea, so instead we just add a simple helper function
++to check for the zero return value. Since wg_examine_packet_protocol
++itself gets inlined, this winds up not adding an additional branch to
++the generated code, since the 0 return value already happens in a
++mergable branch.
++
++Reported-by: Fabian Freyer <fabianfreyer@radicallyopensecurity.com>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/device.c   | 2 +-
++ drivers/net/wireguard/queueing.h | 8 +++++++-
++ drivers/net/wireguard/receive.c  | 4 ++--
++ 3 files changed, 10 insertions(+), 4 deletions(-)
++
++--- a/drivers/net/wireguard/device.c
+++++ b/drivers/net/wireguard/device.c
++@@ -122,7 +122,7 @@ static netdev_tx_t wg_xmit(struct sk_buf
++ 	u32 mtu;
++ 	int ret;
++ 
++-	if (unlikely(wg_skb_examine_untrusted_ip_hdr(skb) != skb->protocol)) {
+++	if (unlikely(!wg_check_packet_protocol(skb))) {
++ 		ret = -EPROTONOSUPPORT;
++ 		net_dbg_ratelimited("%s: Invalid IP packet\n", dev->name);
++ 		goto err;
++--- a/drivers/net/wireguard/queueing.h
+++++ b/drivers/net/wireguard/queueing.h
++@@ -66,7 +66,7 @@ struct packet_cb {
++ #define PACKET_PEER(skb) (PACKET_CB(skb)->keypair->entry.peer)
++ 
++ /* Returns either the correct skb->protocol value, or 0 if invalid. */
++-static inline __be16 wg_skb_examine_untrusted_ip_hdr(struct sk_buff *skb)
+++static inline __be16 wg_examine_packet_protocol(struct sk_buff *skb)
++ {
++ 	if (skb_network_header(skb) >= skb->head &&
++ 	    (skb_network_header(skb) + sizeof(struct iphdr)) <=
++@@ -81,6 +81,12 @@ static inline __be16 wg_skb_examine_untr
++ 	return 0;
++ }
++ 
+++static inline bool wg_check_packet_protocol(struct sk_buff *skb)
+++{
+++	__be16 real_protocol = wg_examine_packet_protocol(skb);
+++	return real_protocol && skb->protocol == real_protocol;
+++}
+++
++ static inline void wg_reset_packet(struct sk_buff *skb)
++ {
++ 	skb_scrub_packet(skb, true);
++--- a/drivers/net/wireguard/receive.c
+++++ b/drivers/net/wireguard/receive.c
++@@ -56,7 +56,7 @@ static int prepare_skb_header(struct sk_
++ 	size_t data_offset, data_len, header_len;
++ 	struct udphdr *udp;
++ 
++-	if (unlikely(wg_skb_examine_untrusted_ip_hdr(skb) != skb->protocol ||
+++	if (unlikely(!wg_check_packet_protocol(skb) ||
++ 		     skb_transport_header(skb) < skb->head ||
++ 		     (skb_transport_header(skb) + sizeof(struct udphdr)) >
++ 			     skb_tail_pointer(skb)))
++@@ -388,7 +388,7 @@ static void wg_packet_consume_data_done(
++ 	 */
++ 	skb->ip_summed = CHECKSUM_UNNECESSARY;
++ 	skb->csum_level = ~0; /* All levels */
++-	skb->protocol = wg_skb_examine_untrusted_ip_hdr(skb);
+++	skb->protocol = wg_examine_packet_protocol(skb);
++ 	if (skb->protocol == htons(ETH_P_IP)) {
++ 		len = ntohs(ip_hdr(skb)->tot_len);
++ 		if (unlikely(len < sizeof(struct iphdr)))
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0092-wireguard-receive-remove-dead-code-from-default-pack.patch b/target/linux/generic/backport-5.4/080-wireguard-0092-wireguard-receive-remove-dead-code-from-default-pack.patch
+new file mode 100644
+index 0000000000..bcd4fbfbc1
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0092-wireguard-receive-remove-dead-code-from-default-pack.patch
+@@ -0,0 +1,35 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Wed, 18 Mar 2020 18:30:46 -0600
++Subject: [PATCH] wireguard: receive: remove dead code from default packet type
++ case
++
++commit 2b8765c52db24c0fbcc81bac9b5e8390f2c7d3c8 upstream.
++
++The situation in which we wind up hitting the default case here
++indicates a major bug in earlier parsing code. It is not a usual thing
++that should ever happen, which means a "friendly" message for it doesn't
++make sense. Rather, replace this with a WARN_ON, just like we do earlier
++in the file for a similar situation, so that somebody sends us a bug
++report and we can fix it.
++
++Reported-by: Fabian Freyer <fabianfreyer@radicallyopensecurity.com>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/receive.c | 3 +--
++ 1 file changed, 1 insertion(+), 2 deletions(-)
++
++--- a/drivers/net/wireguard/receive.c
+++++ b/drivers/net/wireguard/receive.c
++@@ -587,8 +587,7 @@ void wg_packet_receive(struct wg_device
++ 		wg_packet_consume_data(wg, skb);
++ 		break;
++ 	default:
++-		net_dbg_skb_ratelimited("%s: Invalid packet from %pISpfsc\n",
++-					wg->dev->name, skb);
+++		WARN(1, "Non-exhaustive parsing of packet header lead to unknown packet type!\n");
++ 		goto err;
++ 	}
++ 	return;
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0093-wireguard-noise-error-out-precomputed-DH-during-hand.patch b/target/linux/generic/backport-5.4/080-wireguard-0093-wireguard-noise-error-out-precomputed-DH-during-hand.patch
+new file mode 100644
+index 0000000000..dac3046e47
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0093-wireguard-noise-error-out-precomputed-DH-during-hand.patch
+@@ -0,0 +1,224 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Wed, 18 Mar 2020 18:30:47 -0600
++Subject: [PATCH] wireguard: noise: error out precomputed DH during handshake
++ rather than config
++
++commit 11a7686aa99c7fe4b3f80f6dcccd54129817984d upstream.
++
++We precompute the static-static ECDH during configuration time, in order
++to save an expensive computation later when receiving network packets.
++However, not all ECDH computations yield a contributory result. Prior,
++we were just not letting those peers be added to the interface. However,
++this creates a strange inconsistency, since it was still possible to add
++other weird points, like a valid public key plus a low-order point, and,
++like points that result in zeros, a handshake would not complete. In
++order to make the behavior more uniform and less surprising, simply
++allow all peers to be added. Then, we'll error out later when doing the
++crypto if there's an issue. This also adds more separation between the
++crypto layer and the configuration layer.
++
++Discussed-with: Mathias Hall-Andersen <mathias@hall-andersen.dk>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/netlink.c            |  8 +---
++ drivers/net/wireguard/noise.c              | 55 ++++++++++++----------
++ drivers/net/wireguard/noise.h              | 12 ++---
++ drivers/net/wireguard/peer.c               |  7 +--
++ tools/testing/selftests/wireguard/netns.sh | 15 ++++--
++ 5 files changed, 49 insertions(+), 48 deletions(-)
++
++--- a/drivers/net/wireguard/netlink.c
+++++ b/drivers/net/wireguard/netlink.c
++@@ -417,11 +417,7 @@ static int set_peer(struct wg_device *wg
++ 
++ 		peer = wg_peer_create(wg, public_key, preshared_key);
++ 		if (IS_ERR(peer)) {
++-			/* Similar to the above, if the key is invalid, we skip
++-			 * it without fanfare, so that services don't need to
++-			 * worry about doing key validation themselves.
++-			 */
++-			ret = PTR_ERR(peer) == -EKEYREJECTED ? 0 : PTR_ERR(peer);
+++			ret = PTR_ERR(peer);
++ 			peer = NULL;
++ 			goto out;
++ 		}
++@@ -575,7 +571,7 @@ static int wg_set_device(struct sk_buff
++ 							 private_key);
++ 		list_for_each_entry_safe(peer, temp, &wg->peer_list,
++ 					 peer_list) {
++-			BUG_ON(!wg_noise_precompute_static_static(peer));
+++			wg_noise_precompute_static_static(peer);
++ 			wg_noise_expire_current_peer_keypairs(peer);
++ 		}
++ 		wg_cookie_checker_precompute_device_keys(&wg->cookie_checker);
++--- a/drivers/net/wireguard/noise.c
+++++ b/drivers/net/wireguard/noise.c
++@@ -44,32 +44,23 @@ void __init wg_noise_init(void)
++ }
++ 
++ /* Must hold peer->handshake.static_identity->lock */
++-bool wg_noise_precompute_static_static(struct wg_peer *peer)
+++void wg_noise_precompute_static_static(struct wg_peer *peer)
++ {
++-	bool ret;
++-
++ 	down_write(&peer->handshake.lock);
++-	if (peer->handshake.static_identity->has_identity) {
++-		ret = curve25519(
++-			peer->handshake.precomputed_static_static,
+++	if (!peer->handshake.static_identity->has_identity ||
+++	    !curve25519(peer->handshake.precomputed_static_static,
++ 			peer->handshake.static_identity->static_private,
++-			peer->handshake.remote_static);
++-	} else {
++-		u8 empty[NOISE_PUBLIC_KEY_LEN] = { 0 };
++-
++-		ret = curve25519(empty, empty, peer->handshake.remote_static);
+++			peer->handshake.remote_static))
++ 		memset(peer->handshake.precomputed_static_static, 0,
++ 		       NOISE_PUBLIC_KEY_LEN);
++-	}
++ 	up_write(&peer->handshake.lock);
++-	return ret;
++ }
++ 
++-bool wg_noise_handshake_init(struct noise_handshake *handshake,
++-			   struct noise_static_identity *static_identity,
++-			   const u8 peer_public_key[NOISE_PUBLIC_KEY_LEN],
++-			   const u8 peer_preshared_key[NOISE_SYMMETRIC_KEY_LEN],
++-			   struct wg_peer *peer)
+++void wg_noise_handshake_init(struct noise_handshake *handshake,
+++			     struct noise_static_identity *static_identity,
+++			     const u8 peer_public_key[NOISE_PUBLIC_KEY_LEN],
+++			     const u8 peer_preshared_key[NOISE_SYMMETRIC_KEY_LEN],
+++			     struct wg_peer *peer)
++ {
++ 	memset(handshake, 0, sizeof(*handshake));
++ 	init_rwsem(&handshake->lock);
++@@ -81,7 +72,7 @@ bool wg_noise_handshake_init(struct nois
++ 		       NOISE_SYMMETRIC_KEY_LEN);
++ 	handshake->static_identity = static_identity;
++ 	handshake->state = HANDSHAKE_ZEROED;
++-	return wg_noise_precompute_static_static(peer);
+++	wg_noise_precompute_static_static(peer);
++ }
++ 
++ static void handshake_zero(struct noise_handshake *handshake)
++@@ -403,6 +394,19 @@ static bool __must_check mix_dh(u8 chain
++ 	return true;
++ }
++ 
+++static bool __must_check mix_precomputed_dh(u8 chaining_key[NOISE_HASH_LEN],
+++					    u8 key[NOISE_SYMMETRIC_KEY_LEN],
+++					    const u8 precomputed[NOISE_PUBLIC_KEY_LEN])
+++{
+++	static u8 zero_point[NOISE_PUBLIC_KEY_LEN];
+++	if (unlikely(!crypto_memneq(precomputed, zero_point, NOISE_PUBLIC_KEY_LEN)))
+++		return false;
+++	kdf(chaining_key, key, NULL, precomputed, NOISE_HASH_LEN,
+++	    NOISE_SYMMETRIC_KEY_LEN, 0, NOISE_PUBLIC_KEY_LEN,
+++	    chaining_key);
+++	return true;
+++}
+++
++ static void mix_hash(u8 hash[NOISE_HASH_LEN], const u8 *src, size_t src_len)
++ {
++ 	struct blake2s_state blake;
++@@ -531,10 +535,9 @@ wg_noise_handshake_create_initiation(str
++ 			NOISE_PUBLIC_KEY_LEN, key, handshake->hash);
++ 
++ 	/* ss */
++-	kdf(handshake->chaining_key, key, NULL,
++-	    handshake->precomputed_static_static, NOISE_HASH_LEN,
++-	    NOISE_SYMMETRIC_KEY_LEN, 0, NOISE_PUBLIC_KEY_LEN,
++-	    handshake->chaining_key);
+++	if (!mix_precomputed_dh(handshake->chaining_key, key,
+++				handshake->precomputed_static_static))
+++		goto out;
++ 
++ 	/* {t} */
++ 	tai64n_now(timestamp);
++@@ -595,9 +598,9 @@ wg_noise_handshake_consume_initiation(st
++ 	handshake = &peer->handshake;
++ 
++ 	/* ss */
++-	kdf(chaining_key, key, NULL, handshake->precomputed_static_static,
++-	    NOISE_HASH_LEN, NOISE_SYMMETRIC_KEY_LEN, 0, NOISE_PUBLIC_KEY_LEN,
++-	    chaining_key);
+++	if (!mix_precomputed_dh(chaining_key, key,
+++				handshake->precomputed_static_static))
+++	    goto out;
++ 
++ 	/* {t} */
++ 	if (!message_decrypt(t, src->encrypted_timestamp,
++--- a/drivers/net/wireguard/noise.h
+++++ b/drivers/net/wireguard/noise.h
++@@ -94,11 +94,11 @@ struct noise_handshake {
++ struct wg_device;
++ 
++ void wg_noise_init(void);
++-bool wg_noise_handshake_init(struct noise_handshake *handshake,
++-			   struct noise_static_identity *static_identity,
++-			   const u8 peer_public_key[NOISE_PUBLIC_KEY_LEN],
++-			   const u8 peer_preshared_key[NOISE_SYMMETRIC_KEY_LEN],
++-			   struct wg_peer *peer);
+++void wg_noise_handshake_init(struct noise_handshake *handshake,
+++			     struct noise_static_identity *static_identity,
+++			     const u8 peer_public_key[NOISE_PUBLIC_KEY_LEN],
+++			     const u8 peer_preshared_key[NOISE_SYMMETRIC_KEY_LEN],
+++			     struct wg_peer *peer);
++ void wg_noise_handshake_clear(struct noise_handshake *handshake);
++ static inline void wg_noise_reset_last_sent_handshake(atomic64_t *handshake_ns)
++ {
++@@ -116,7 +116,7 @@ void wg_noise_expire_current_peer_keypai
++ void wg_noise_set_static_identity_private_key(
++ 	struct noise_static_identity *static_identity,
++ 	const u8 private_key[NOISE_PUBLIC_KEY_LEN]);
++-bool wg_noise_precompute_static_static(struct wg_peer *peer);
+++void wg_noise_precompute_static_static(struct wg_peer *peer);
++ 
++ bool
++ wg_noise_handshake_create_initiation(struct message_handshake_initiation *dst,
++--- a/drivers/net/wireguard/peer.c
+++++ b/drivers/net/wireguard/peer.c
++@@ -34,11 +34,8 @@ struct wg_peer *wg_peer_create(struct wg
++ 		return ERR_PTR(ret);
++ 	peer->device = wg;
++ 
++-	if (!wg_noise_handshake_init(&peer->handshake, &wg->static_identity,
++-				     public_key, preshared_key, peer)) {
++-		ret = -EKEYREJECTED;
++-		goto err_1;
++-	}
+++	wg_noise_handshake_init(&peer->handshake, &wg->static_identity,
+++				public_key, preshared_key, peer);
++ 	if (dst_cache_init(&peer->endpoint_cache, GFP_KERNEL))
++ 		goto err_1;
++ 	if (wg_packet_queue_init(&peer->tx_queue, wg_packet_tx_worker, false,
++--- a/tools/testing/selftests/wireguard/netns.sh
+++++ b/tools/testing/selftests/wireguard/netns.sh
++@@ -527,11 +527,16 @@ n0 wg set wg0 peer "$pub2" allowed-ips 0
++ n0 wg set wg0 peer "$pub2" allowed-ips ::/0,1700::/111,5000::/4,e000::/37,9000::/75
++ n0 wg set wg0 peer "$pub2" allowed-ips ::/0
++ n0 wg set wg0 peer "$pub2" remove
++-low_order_points=( AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA= AQAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA= 4Ot6fDtBuK4WVuP68Z/EatoJjeucMrH9hmIFFl9JuAA= X5yVvKNQjCSx0LFVnIPvWwREXMRYHI6G2CJO3dCfEVc= 7P///////////////////////////////////////38= 7f///////////////////////////////////////38= 7v///////////////////////////////////////38= )
++-n0 wg set wg0 private-key /dev/null ${low_order_points[@]/#/peer }
++-[[ -z $(n0 wg show wg0 peers) ]]
++-n0 wg set wg0 private-key <(echo "$key1") ${low_order_points[@]/#/peer }
++-[[ -z $(n0 wg show wg0 peers) ]]
+++for low_order_point in AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA= AQAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA= 4Ot6fDtBuK4WVuP68Z/EatoJjeucMrH9hmIFFl9JuAA= X5yVvKNQjCSx0LFVnIPvWwREXMRYHI6G2CJO3dCfEVc= 7P///////////////////////////////////////38= 7f///////////////////////////////////////38= 7v///////////////////////////////////////38=; do
+++	n0 wg set wg0 peer "$low_order_point" persistent-keepalive 1 endpoint 127.0.0.1:1111
+++done
+++[[ -n $(n0 wg show wg0 peers) ]]
+++exec 4< <(n0 ncat -l -u -p 1111)
+++ncat_pid=$!
+++waitncatudp $netns0 $ncat_pid
+++ip0 link set wg0 up
+++! read -r -n 1 -t 2 <&4 || false
+++kill $ncat_pid
++ ip0 link del wg0
++ 
++ declare -A objects
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0094-wireguard-send-remove-errant-newline-from-packet_enc.patch b/target/linux/generic/backport-5.4/080-wireguard-0094-wireguard-send-remove-errant-newline-from-packet_enc.patch
+new file mode 100644
+index 0000000000..c92b6a784a
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0094-wireguard-send-remove-errant-newline-from-packet_enc.patch
+@@ -0,0 +1,29 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Sultan Alsawaf <sultan@kerneltoast.com>
++Date: Wed, 29 Apr 2020 14:59:20 -0600
++Subject: [PATCH] wireguard: send: remove errant newline from
++ packet_encrypt_worker
++
++commit d6833e42786e050e7522d6a91a9361e54085897d upstream.
++
++This commit removes a useless newline at the end of a scope, which
++doesn't add anything in the way of organization or readability.
++
++Signed-off-by: Sultan Alsawaf <sultan@kerneltoast.com>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/send.c | 1 -
++ 1 file changed, 1 deletion(-)
++
++--- a/drivers/net/wireguard/send.c
+++++ b/drivers/net/wireguard/send.c
++@@ -304,7 +304,6 @@ void wg_packet_encrypt_worker(struct wor
++ 		}
++ 		wg_queue_enqueue_per_peer(&PACKET_PEER(first)->tx_queue, first,
++ 					  state);
++-
++ 	}
++ }
++ 
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0095-wireguard-queueing-cleanup-ptr_ring-in-error-path-of.patch b/target/linux/generic/backport-5.4/080-wireguard-0095-wireguard-queueing-cleanup-ptr_ring-in-error-path-of.patch
+new file mode 100644
+index 0000000000..a72c509894
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0095-wireguard-queueing-cleanup-ptr_ring-in-error-path-of.patch
+@@ -0,0 +1,35 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Wed, 29 Apr 2020 14:59:21 -0600
++Subject: [PATCH] wireguard: queueing: cleanup ptr_ring in error path of
++ packet_queue_init
++
++commit 130c58606171326c81841a49cc913cd354113dd9 upstream.
++
++Prior, if the alloc_percpu of packet_percpu_multicore_worker_alloc
++failed, the previously allocated ptr_ring wouldn't be freed. This commit
++adds the missing call to ptr_ring_cleanup in the error case.
++
++Reported-by: Sultan Alsawaf <sultan@kerneltoast.com>
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/queueing.c | 4 +++-
++ 1 file changed, 3 insertions(+), 1 deletion(-)
++
++--- a/drivers/net/wireguard/queueing.c
+++++ b/drivers/net/wireguard/queueing.c
++@@ -35,8 +35,10 @@ int wg_packet_queue_init(struct crypt_qu
++ 		if (multicore) {
++ 			queue->worker = wg_packet_percpu_multicore_worker_alloc(
++ 				function, queue);
++-			if (!queue->worker)
+++			if (!queue->worker) {
+++				ptr_ring_cleanup(&queue->ring, NULL);
++ 				return -ENOMEM;
+++			}
++ 		} else {
++ 			INIT_WORK(&queue->work, function);
++ 		}
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0096-wireguard-receive-use-tunnel-helpers-for-decapsulati.patch b/target/linux/generic/backport-5.4/080-wireguard-0096-wireguard-receive-use-tunnel-helpers-for-decapsulati.patch
+new file mode 100644
+index 0000000000..a72358c302
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0096-wireguard-receive-use-tunnel-helpers-for-decapsulati.patch
+@@ -0,0 +1,50 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Toke=20H=C3=B8iland-J=C3=B8rgensen?= <toke@redhat.com>
++Date: Wed, 29 Apr 2020 14:59:22 -0600
++Subject: [PATCH] wireguard: receive: use tunnel helpers for decapsulating ECN
++ markings
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++commit eebabcb26ea1e3295704477c6cd4e772c96a9559 upstream.
++
++WireGuard currently only propagates ECN markings on tunnel decap according
++to the old RFC3168 specification. However, the spec has since been updated
++in RFC6040 to recommend slightly different decapsulation semantics. This
++was implemented in the kernel as a set of common helpers for ECN
++decapsulation, so let's just switch over WireGuard to using those, so it
++can benefit from this enhancement and any future tweaks. We do not drop
++packets with invalid ECN marking combinations, because WireGuard is
++frequently used to work around broken ISPs, which could be doing that.
++
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Reported-by: Olivier Tilmans <olivier.tilmans@nokia-bell-labs.com>
++Cc: Dave Taht <dave.taht@gmail.com>
++Cc: Rodney W. Grimes <ietf@gndrsh.dnsmgr.net>
++Signed-off-by: Toke Høiland-Jørgensen <toke@redhat.com>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/receive.c | 6 ++----
++ 1 file changed, 2 insertions(+), 4 deletions(-)
++
++--- a/drivers/net/wireguard/receive.c
+++++ b/drivers/net/wireguard/receive.c
++@@ -393,13 +393,11 @@ static void wg_packet_consume_data_done(
++ 		len = ntohs(ip_hdr(skb)->tot_len);
++ 		if (unlikely(len < sizeof(struct iphdr)))
++ 			goto dishonest_packet_size;
++-		if (INET_ECN_is_ce(PACKET_CB(skb)->ds))
++-			IP_ECN_set_ce(ip_hdr(skb));
+++		INET_ECN_decapsulate(skb, PACKET_CB(skb)->ds, ip_hdr(skb)->tos);
++ 	} else if (skb->protocol == htons(ETH_P_IPV6)) {
++ 		len = ntohs(ipv6_hdr(skb)->payload_len) +
++ 		      sizeof(struct ipv6hdr);
++-		if (INET_ECN_is_ce(PACKET_CB(skb)->ds))
++-			IP6_ECN_set_ce(skb, ipv6_hdr(skb));
+++		INET_ECN_decapsulate(skb, PACKET_CB(skb)->ds, ipv6_get_dsfield(ipv6_hdr(skb)));
++ 	} else {
++ 		goto dishonest_packet_type;
++ 	}
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0097-wireguard-selftests-use-normal-kernel-stack-size-on-.patch b/target/linux/generic/backport-5.4/080-wireguard-0097-wireguard-selftests-use-normal-kernel-stack-size-on-.patch
+new file mode 100644
+index 0000000000..f4543d2568
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0097-wireguard-selftests-use-normal-kernel-stack-size-on-.patch
+@@ -0,0 +1,28 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Wed, 6 May 2020 15:33:02 -0600
++Subject: [PATCH] wireguard: selftests: use normal kernel stack size on ppc64
++
++commit a0fd7cc87a018df1a17f9d3f0bd994c1f22c6b34 upstream.
++
++While at some point it might have made sense to be running these tests
++on ppc64 with 4k stacks, the kernel hasn't actually used 4k stacks on
++64-bit powerpc in a long time, and more interesting things that we test
++don't really work when we deviate from the default (16k). So, we stop
++pushing our luck in this commit, and return to the default instead of
++the minimum.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ tools/testing/selftests/wireguard/qemu/arch/powerpc64le.config | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/tools/testing/selftests/wireguard/qemu/arch/powerpc64le.config
+++++ b/tools/testing/selftests/wireguard/qemu/arch/powerpc64le.config
++@@ -10,3 +10,4 @@ CONFIG_CMDLINE_BOOL=y
++ CONFIG_CMDLINE="console=hvc0 wg.success=hvc1"
++ CONFIG_SECTION_MISMATCH_WARN_ONLY=y
++ CONFIG_FRAME_WARN=1280
+++CONFIG_THREAD_SHIFT=14
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0098-wireguard-socket-remove-errant-restriction-on-loopin.patch b/target/linux/generic/backport-5.4/080-wireguard-0098-wireguard-socket-remove-errant-restriction-on-loopin.patch
+new file mode 100644
+index 0000000000..6dafa4781b
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0098-wireguard-socket-remove-errant-restriction-on-loopin.patch
+@@ -0,0 +1,162 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Wed, 6 May 2020 15:33:03 -0600
++Subject: [PATCH] wireguard: socket: remove errant restriction on looping to
++ self
++
++commit b673e24aad36981f327a6570412ffa7754de8911 upstream.
++
++It's already possible to create two different interfaces and loop
++packets between them. This has always been possible with tunnels in the
++kernel, and isn't specific to wireguard. Therefore, the networking stack
++already needs to deal with that. At the very least, the packet winds up
++exceeding the MTU and is discarded at that point. So, since this is
++already something that happens, there's no need to forbid the not very
++exceptional case of routing a packet back to the same interface; this
++loop is no different than others, and we shouldn't special case it, but
++rather rely on generic handling of loops in general. This also makes it
++easier to do interesting things with wireguard such as onion routing.
++
++At the same time, we add a selftest for this, ensuring that both onion
++routing works and infinite routing loops do not crash the kernel. We
++also add a test case for wireguard interfaces nesting packets and
++sending traffic between each other, as well as the loop in this case
++too. We make sure to send some throughput-heavy traffic for this use
++case, to stress out any possible recursion issues with the locks around
++workqueues.
++
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/socket.c             | 12 -----
++ tools/testing/selftests/wireguard/netns.sh | 54 ++++++++++++++++++++--
++ 2 files changed, 51 insertions(+), 15 deletions(-)
++
++--- a/drivers/net/wireguard/socket.c
+++++ b/drivers/net/wireguard/socket.c
++@@ -76,12 +76,6 @@ static int send4(struct wg_device *wg, s
++ 			net_dbg_ratelimited("%s: No route to %pISpfsc, error %d\n",
++ 					    wg->dev->name, &endpoint->addr, ret);
++ 			goto err;
++-		} else if (unlikely(rt->dst.dev == skb->dev)) {
++-			ip_rt_put(rt);
++-			ret = -ELOOP;
++-			net_dbg_ratelimited("%s: Avoiding routing loop to %pISpfsc\n",
++-					    wg->dev->name, &endpoint->addr);
++-			goto err;
++ 		}
++ 		if (cache)
++ 			dst_cache_set_ip4(cache, &rt->dst, fl.saddr);
++@@ -149,12 +143,6 @@ static int send6(struct wg_device *wg, s
++ 			net_dbg_ratelimited("%s: No route to %pISpfsc, error %d\n",
++ 					    wg->dev->name, &endpoint->addr, ret);
++ 			goto err;
++-		} else if (unlikely(dst->dev == skb->dev)) {
++-			dst_release(dst);
++-			ret = -ELOOP;
++-			net_dbg_ratelimited("%s: Avoiding routing loop to %pISpfsc\n",
++-					    wg->dev->name, &endpoint->addr);
++-			goto err;
++ 		}
++ 		if (cache)
++ 			dst_cache_set_ip6(cache, dst, &fl.saddr);
++--- a/tools/testing/selftests/wireguard/netns.sh
+++++ b/tools/testing/selftests/wireguard/netns.sh
++@@ -48,8 +48,11 @@ cleanup() {
++ 	exec 2>/dev/null
++ 	printf "$orig_message_cost" > /proc/sys/net/core/message_cost
++ 	ip0 link del dev wg0
+++	ip0 link del dev wg1
++ 	ip1 link del dev wg0
+++	ip1 link del dev wg1
++ 	ip2 link del dev wg0
+++	ip2 link del dev wg1
++ 	local to_kill="$(ip netns pids $netns0) $(ip netns pids $netns1) $(ip netns pids $netns2)"
++ 	[[ -n $to_kill ]] && kill $to_kill
++ 	pp ip netns del $netns1
++@@ -77,18 +80,20 @@ ip0 link set wg0 netns $netns2
++ key1="$(pp wg genkey)"
++ key2="$(pp wg genkey)"
++ key3="$(pp wg genkey)"
+++key4="$(pp wg genkey)"
++ pub1="$(pp wg pubkey <<<"$key1")"
++ pub2="$(pp wg pubkey <<<"$key2")"
++ pub3="$(pp wg pubkey <<<"$key3")"
+++pub4="$(pp wg pubkey <<<"$key4")"
++ psk="$(pp wg genpsk)"
++ [[ -n $key1 && -n $key2 && -n $psk ]]
++ 
++ configure_peers() {
++ 	ip1 addr add 192.168.241.1/24 dev wg0
++-	ip1 addr add fd00::1/24 dev wg0
+++	ip1 addr add fd00::1/112 dev wg0
++ 
++ 	ip2 addr add 192.168.241.2/24 dev wg0
++-	ip2 addr add fd00::2/24 dev wg0
+++	ip2 addr add fd00::2/112 dev wg0
++ 
++ 	n1 wg set wg0 \
++ 		private-key <(echo "$key1") \
++@@ -230,9 +235,38 @@ n1 ping -W 1 -c 1 192.168.241.2
++ n1 wg set wg0 private-key <(echo "$key3")
++ n2 wg set wg0 peer "$pub3" preshared-key <(echo "$psk") allowed-ips 192.168.241.1/32 peer "$pub1" remove
++ n1 ping -W 1 -c 1 192.168.241.2
+++n2 wg set wg0 peer "$pub3" remove
++ 
++-ip1 link del wg0
+++# Test that we can route wg through wg
+++ip1 addr flush dev wg0
+++ip2 addr flush dev wg0
+++ip1 addr add fd00::5:1/112 dev wg0
+++ip2 addr add fd00::5:2/112 dev wg0
+++n1 wg set wg0 private-key <(echo "$key1") peer "$pub2" preshared-key <(echo "$psk") allowed-ips fd00::5:2/128 endpoint 127.0.0.1:2
+++n2 wg set wg0 private-key <(echo "$key2") listen-port 2 peer "$pub1" preshared-key <(echo "$psk") allowed-ips fd00::5:1/128 endpoint 127.212.121.99:9998
+++ip1 link add wg1 type wireguard
+++ip2 link add wg1 type wireguard
+++ip1 addr add 192.168.241.1/24 dev wg1
+++ip1 addr add fd00::1/112 dev wg1
+++ip2 addr add 192.168.241.2/24 dev wg1
+++ip2 addr add fd00::2/112 dev wg1
+++ip1 link set mtu 1340 up dev wg1
+++ip2 link set mtu 1340 up dev wg1
+++n1 wg set wg1 listen-port 5 private-key <(echo "$key3") peer "$pub4" allowed-ips 192.168.241.2/32,fd00::2/128 endpoint [fd00::5:2]:5
+++n2 wg set wg1 listen-port 5 private-key <(echo "$key4") peer "$pub3" allowed-ips 192.168.241.1/32,fd00::1/128 endpoint [fd00::5:1]:5
+++tests
+++# Try to set up a routing loop between the two namespaces
+++ip1 link set netns $netns0 dev wg1
+++ip0 addr add 192.168.241.1/24 dev wg1
+++ip0 link set up dev wg1
+++n0 ping -W 1 -c 1 192.168.241.2
+++n1 wg set wg0 peer "$pub2" endpoint 192.168.241.2:7
++ ip2 link del wg0
+++ip2 link del wg1
+++! n0 ping -W 1 -c 10 -f 192.168.241.2 || false # Should not crash kernel
+++
+++ip0 link del wg1
+++ip1 link del wg0
++ 
++ # Test using NAT. We now change the topology to this:
++ # ┌────────────────────────────────────────�    ┌────────────────────────────────────────────────�     ┌────────────────────────────────────────�
++@@ -282,6 +316,20 @@ pp sleep 3
++ n2 ping -W 1 -c 1 192.168.241.1
++ n1 wg set wg0 peer "$pub2" persistent-keepalive 0
++ 
+++# Test that onion routing works, even when it loops
+++n1 wg set wg0 peer "$pub3" allowed-ips 192.168.242.2/32 endpoint 192.168.241.2:5
+++ip1 addr add 192.168.242.1/24 dev wg0
+++ip2 link add wg1 type wireguard
+++ip2 addr add 192.168.242.2/24 dev wg1
+++n2 wg set wg1 private-key <(echo "$key3") listen-port 5 peer "$pub1" allowed-ips 192.168.242.1/32
+++ip2 link set wg1 up
+++n1 ping -W 1 -c 1 192.168.242.2
+++ip2 link del wg1
+++n1 wg set wg0 peer "$pub3" endpoint 192.168.242.2:5
+++! n1 ping -W 1 -c 1 192.168.242.2 || false # Should not crash kernel
+++n1 wg set wg0 peer "$pub3" remove
+++ip1 addr del 192.168.242.1/24 dev wg0
+++
++ # Do a wg-quick(8)-style policy routing for the default route, making sure vethc has a v6 address to tease out bugs.
++ ip1 -6 addr add fc00::9/96 dev vethc
++ ip1 -6 route add default via fc00::1
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0099-wireguard-send-receive-cond_resched-when-processing-.patch b/target/linux/generic/backport-5.4/080-wireguard-0099-wireguard-send-receive-cond_resched-when-processing-.patch
+new file mode 100644
+index 0000000000..499b36bc5f
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0099-wireguard-send-receive-cond_resched-when-processing-.patch
+@@ -0,0 +1,58 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Wed, 6 May 2020 15:33:04 -0600
++Subject: [PATCH] wireguard: send/receive: cond_resched() when processing
++ worker ringbuffers
++
++commit 4005f5c3c9d006157ba716594e0d70c88a235c5e upstream.
++
++Users with pathological hardware reported CPU stalls on CONFIG_
++PREEMPT_VOLUNTARY=y, because the ringbuffers would stay full, meaning
++these workers would never terminate. That turned out not to be okay on
++systems without forced preemption, which Sultan observed. This commit
++adds a cond_resched() to the bottom of each loop iteration, so that
++these workers don't hog the core. Note that we don't need this on the
++napi poll worker, since that terminates after its budget is expended.
++
++Suggested-by: Sultan Alsawaf <sultan@kerneltoast.com>
++Reported-by: Wang Jian <larkwang@gmail.com>
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/receive.c | 2 ++
++ drivers/net/wireguard/send.c    | 4 ++++
++ 2 files changed, 6 insertions(+)
++
++--- a/drivers/net/wireguard/receive.c
+++++ b/drivers/net/wireguard/receive.c
++@@ -516,6 +516,8 @@ void wg_packet_decrypt_worker(struct wor
++ 				&PACKET_CB(skb)->keypair->receiving)) ?
++ 				PACKET_STATE_CRYPTED : PACKET_STATE_DEAD;
++ 		wg_queue_enqueue_per_peer_napi(skb, state);
+++		if (need_resched())
+++			cond_resched();
++ 	}
++ }
++ 
++--- a/drivers/net/wireguard/send.c
+++++ b/drivers/net/wireguard/send.c
++@@ -281,6 +281,8 @@ void wg_packet_tx_worker(struct work_str
++ 
++ 		wg_noise_keypair_put(keypair, false);
++ 		wg_peer_put(peer);
+++		if (need_resched())
+++			cond_resched();
++ 	}
++ }
++ 
++@@ -304,6 +306,8 @@ void wg_packet_encrypt_worker(struct wor
++ 		}
++ 		wg_queue_enqueue_per_peer(&PACKET_PEER(first)->tx_queue, first,
++ 					  state);
+++		if (need_resched())
+++			cond_resched();
++ 	}
++ }
++ 
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0100-wireguard-selftests-initalize-ipv6-members-to-NULL-t.patch b/target/linux/generic/backport-5.4/080-wireguard-0100-wireguard-selftests-initalize-ipv6-members-to-NULL-t.patch
+new file mode 100644
+index 0000000000..c1124be5ca
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0100-wireguard-selftests-initalize-ipv6-members-to-NULL-t.patch
+@@ -0,0 +1,51 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Wed, 6 May 2020 15:33:05 -0600
++Subject: [PATCH] wireguard: selftests: initalize ipv6 members to NULL to
++ squelch clang warning
++
++commit 4fed818ef54b08d4b29200e416cce65546ad5312 upstream.
++
++Without setting these to NULL, clang complains in certain
++configurations that have CONFIG_IPV6=n:
++
++In file included from drivers/net/wireguard/ratelimiter.c:223:
++drivers/net/wireguard/selftest/ratelimiter.c:173:34: error: variable 'skb6' is uninitialized when used here [-Werror,-Wuninitialized]
++                ret = timings_test(skb4, hdr4, skb6, hdr6, &test_count);
++                                               ^~~~
++drivers/net/wireguard/selftest/ratelimiter.c:123:29: note: initialize the variable 'skb6' to silence this warning
++        struct sk_buff *skb4, *skb6;
++                                   ^
++                                    = NULL
++drivers/net/wireguard/selftest/ratelimiter.c:173:40: error: variable 'hdr6' is uninitialized when used here [-Werror,-Wuninitialized]
++                ret = timings_test(skb4, hdr4, skb6, hdr6, &test_count);
++                                                     ^~~~
++drivers/net/wireguard/selftest/ratelimiter.c:125:22: note: initialize the variable 'hdr6' to silence this warning
++        struct ipv6hdr *hdr6;
++                            ^
++
++We silence this warning by setting the variables to NULL as the warning
++suggests.
++
++Reported-by: Arnd Bergmann <arnd@arndb.de>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/selftest/ratelimiter.c | 4 ++--
++ 1 file changed, 2 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/wireguard/selftest/ratelimiter.c
+++++ b/drivers/net/wireguard/selftest/ratelimiter.c
++@@ -120,9 +120,9 @@ bool __init wg_ratelimiter_selftest(void
++ 	enum { TRIALS_BEFORE_GIVING_UP = 5000 };
++ 	bool success = false;
++ 	int test = 0, trials;
++-	struct sk_buff *skb4, *skb6;
+++	struct sk_buff *skb4, *skb6 = NULL;
++ 	struct iphdr *hdr4;
++-	struct ipv6hdr *hdr6;
+++	struct ipv6hdr *hdr6 = NULL;
++ 
++ 	if (IS_ENABLED(CONFIG_KASAN) || IS_ENABLED(CONFIG_UBSAN))
++ 		return true;
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0101-wireguard-send-receive-use-explicit-unlikely-branch-.patch b/target/linux/generic/backport-5.4/080-wireguard-0101-wireguard-send-receive-use-explicit-unlikely-branch-.patch
+new file mode 100644
+index 0000000000..900e2f2350
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0101-wireguard-send-receive-use-explicit-unlikely-branch-.patch
+@@ -0,0 +1,88 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Wed, 6 May 2020 15:33:06 -0600
++Subject: [PATCH] wireguard: send/receive: use explicit unlikely branch instead
++ of implicit coalescing
++
++commit 243f2148937adc72bcaaa590d482d599c936efde upstream.
++
++It's very unlikely that send will become true. It's nearly always false
++between 0 and 120 seconds of a session, and in most cases becomes true
++only between 120 and 121 seconds before becoming false again. So,
++unlikely(send) is clearly the right option here.
++
++What happened before was that we had this complex boolean expression
++with multiple likely and unlikely clauses nested. Since this is
++evaluated left-to-right anyway, the whole thing got converted to
++unlikely. So, we can clean this up to better represent what's going on.
++
++The generated code is the same.
++
++Suggested-by: Sultan Alsawaf <sultan@kerneltoast.com>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/receive.c | 13 ++++++-------
++ drivers/net/wireguard/send.c    | 15 ++++++---------
++ 2 files changed, 12 insertions(+), 16 deletions(-)
++
++--- a/drivers/net/wireguard/receive.c
+++++ b/drivers/net/wireguard/receive.c
++@@ -226,21 +226,20 @@ void wg_packet_handshake_receive_worker(
++ static void keep_key_fresh(struct wg_peer *peer)
++ {
++ 	struct noise_keypair *keypair;
++-	bool send = false;
+++	bool send;
++ 
++ 	if (peer->sent_lastminute_handshake)
++ 		return;
++ 
++ 	rcu_read_lock_bh();
++ 	keypair = rcu_dereference_bh(peer->keypairs.current_keypair);
++-	if (likely(keypair && READ_ONCE(keypair->sending.is_valid)) &&
++-	    keypair->i_am_the_initiator &&
++-	    unlikely(wg_birthdate_has_expired(keypair->sending.birthdate,
++-			REJECT_AFTER_TIME - KEEPALIVE_TIMEOUT - REKEY_TIMEOUT)))
++-		send = true;
+++	send = keypair && READ_ONCE(keypair->sending.is_valid) &&
+++	       keypair->i_am_the_initiator &&
+++	       wg_birthdate_has_expired(keypair->sending.birthdate,
+++			REJECT_AFTER_TIME - KEEPALIVE_TIMEOUT - REKEY_TIMEOUT);
++ 	rcu_read_unlock_bh();
++ 
++-	if (send) {
+++	if (unlikely(send)) {
++ 		peer->sent_lastminute_handshake = true;
++ 		wg_packet_send_queued_handshake_initiation(peer, false);
++ 	}
++--- a/drivers/net/wireguard/send.c
+++++ b/drivers/net/wireguard/send.c
++@@ -124,20 +124,17 @@ void wg_packet_send_handshake_cookie(str
++ static void keep_key_fresh(struct wg_peer *peer)
++ {
++ 	struct noise_keypair *keypair;
++-	bool send = false;
+++	bool send;
++ 
++ 	rcu_read_lock_bh();
++ 	keypair = rcu_dereference_bh(peer->keypairs.current_keypair);
++-	if (likely(keypair && READ_ONCE(keypair->sending.is_valid)) &&
++-	    (unlikely(atomic64_read(&keypair->sending.counter.counter) >
++-		      REKEY_AFTER_MESSAGES) ||
++-	     (keypair->i_am_the_initiator &&
++-	      unlikely(wg_birthdate_has_expired(keypair->sending.birthdate,
++-						REKEY_AFTER_TIME)))))
++-		send = true;
+++	send = keypair && READ_ONCE(keypair->sending.is_valid) &&
+++	       (atomic64_read(&keypair->sending.counter.counter) > REKEY_AFTER_MESSAGES ||
+++		(keypair->i_am_the_initiator &&
+++		 wg_birthdate_has_expired(keypair->sending.birthdate, REKEY_AFTER_TIME)));
++ 	rcu_read_unlock_bh();
++ 
++-	if (send)
+++	if (unlikely(send))
++ 		wg_packet_send_queued_handshake_initiation(peer, false);
++ }
++ 
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0102-wireguard-selftests-use-newer-iproute2-for-gcc-10.patch b/target/linux/generic/backport-5.4/080-wireguard-0102-wireguard-selftests-use-newer-iproute2-for-gcc-10.patch
+new file mode 100644
+index 0000000000..d4efe37a49
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0102-wireguard-selftests-use-newer-iproute2-for-gcc-10.patch
+@@ -0,0 +1,31 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Tue, 19 May 2020 22:49:27 -0600
++Subject: [PATCH] wireguard: selftests: use newer iproute2 for gcc-10
++
++commit ee3c1aa3f34b7842c1557cfe5d8c3f7b8c692de8 upstream.
++
++gcc-10 switched to defaulting to -fno-common, which broke iproute2-5.4.
++This was fixed in iproute-5.6, so switch to that. Because we're after a
++stable testing surface, we generally don't like to bump these
++unnecessarily, but in this case, being able to actually build is a basic
++necessity.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ tools/testing/selftests/wireguard/qemu/Makefile | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/tools/testing/selftests/wireguard/qemu/Makefile
+++++ b/tools/testing/selftests/wireguard/qemu/Makefile
++@@ -44,7 +44,7 @@ endef
++ $(eval $(call tar_download,MUSL,musl,1.1.24,.tar.gz,https://www.musl-libc.org/releases/,1370c9a812b2cf2a7d92802510cca0058cc37e66a7bedd70051f0a34015022a3))
++ $(eval $(call tar_download,IPERF,iperf,3.7,.tar.gz,https://downloads.es.net/pub/iperf/,d846040224317caf2f75c843d309a950a7db23f9b44b94688ccbe557d6d1710c))
++ $(eval $(call tar_download,BASH,bash,5.0,.tar.gz,https://ftp.gnu.org/gnu/bash/,b4a80f2ac66170b2913efbfb9f2594f1f76c7b1afd11f799e22035d63077fb4d))
++-$(eval $(call tar_download,IPROUTE2,iproute2,5.4.0,.tar.xz,https://www.kernel.org/pub/linux/utils/net/iproute2/,fe97aa60a0d4c5ac830be18937e18dc3400ca713a33a89ad896ff1e3d46086ae))
+++$(eval $(call tar_download,IPROUTE2,iproute2,5.6.0,.tar.xz,https://www.kernel.org/pub/linux/utils/net/iproute2/,1b5b0e25ce6e23da7526ea1da044e814ad85ba761b10dd29c2b027c056b04692))
++ $(eval $(call tar_download,IPTABLES,iptables,1.8.4,.tar.bz2,https://www.netfilter.org/projects/iptables/files/,993a3a5490a544c2cbf2ef15cf7e7ed21af1845baf228318d5c36ef8827e157c))
++ $(eval $(call tar_download,NMAP,nmap,7.80,.tar.bz2,https://nmap.org/dist/,fcfa5a0e42099e12e4bf7a68ebe6fde05553383a682e816a7ec9256ab4773faa))
++ $(eval $(call tar_download,IPUTILS,iputils,s20190709,.tar.gz,https://github.com/iputils/iputils/archive/s20190709.tar.gz/#,a15720dd741d7538dd2645f9f516d193636ae4300ff7dbc8bfca757bf166490a))
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0103-wireguard-noise-read-preshared-key-while-taking-lock.patch b/target/linux/generic/backport-5.4/080-wireguard-0103-wireguard-noise-read-preshared-key-while-taking-lock.patch
+new file mode 100644
+index 0000000000..2dac4b7064
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0103-wireguard-noise-read-preshared-key-while-taking-lock.patch
+@@ -0,0 +1,61 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Tue, 19 May 2020 22:49:28 -0600
++Subject: [PATCH] wireguard: noise: read preshared key while taking lock
++
++commit bc67d371256f5c47d824e2eec51e46c8d62d022e upstream.
++
++Prior we read the preshared key after dropping the handshake lock, which
++isn't an actual crypto issue if it races, but it's still not quite
++correct. So copy that part of the state into a temporary like we do with
++the rest of the handshake state variables. Then we can release the lock,
++operate on the temporary, and zero it out at the end of the function. In
++performance tests, the impact of this was entirely unnoticable, probably
++because those bytes are coming from the same cacheline as other things
++that are being copied out in the same manner.
++
++Reported-by: Matt Dunwoodie <ncon@noconroy.net>
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/noise.c | 6 +++++-
++ 1 file changed, 5 insertions(+), 1 deletion(-)
++
++--- a/drivers/net/wireguard/noise.c
+++++ b/drivers/net/wireguard/noise.c
++@@ -715,6 +715,7 @@ wg_noise_handshake_consume_response(stru
++ 	u8 e[NOISE_PUBLIC_KEY_LEN];
++ 	u8 ephemeral_private[NOISE_PUBLIC_KEY_LEN];
++ 	u8 static_private[NOISE_PUBLIC_KEY_LEN];
+++	u8 preshared_key[NOISE_SYMMETRIC_KEY_LEN];
++ 
++ 	down_read(&wg->static_identity.lock);
++ 
++@@ -733,6 +734,8 @@ wg_noise_handshake_consume_response(stru
++ 	memcpy(chaining_key, handshake->chaining_key, NOISE_HASH_LEN);
++ 	memcpy(ephemeral_private, handshake->ephemeral_private,
++ 	       NOISE_PUBLIC_KEY_LEN);
+++	memcpy(preshared_key, handshake->preshared_key,
+++	       NOISE_SYMMETRIC_KEY_LEN);
++ 	up_read(&handshake->lock);
++ 
++ 	if (state != HANDSHAKE_CREATED_INITIATION)
++@@ -750,7 +753,7 @@ wg_noise_handshake_consume_response(stru
++ 		goto fail;
++ 
++ 	/* psk */
++-	mix_psk(chaining_key, hash, key, handshake->preshared_key);
+++	mix_psk(chaining_key, hash, key, preshared_key);
++ 
++ 	/* {} */
++ 	if (!message_decrypt(NULL, src->encrypted_nothing,
++@@ -783,6 +786,7 @@ out:
++ 	memzero_explicit(chaining_key, NOISE_HASH_LEN);
++ 	memzero_explicit(ephemeral_private, NOISE_PUBLIC_KEY_LEN);
++ 	memzero_explicit(static_private, NOISE_PUBLIC_KEY_LEN);
+++	memzero_explicit(preshared_key, NOISE_SYMMETRIC_KEY_LEN);
++ 	up_read(&wg->static_identity.lock);
++ 	return ret_peer;
++ }
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0104-wireguard-queueing-preserve-flow-hash-across-packet-.patch b/target/linux/generic/backport-5.4/080-wireguard-0104-wireguard-queueing-preserve-flow-hash-across-packet-.patch
+new file mode 100644
+index 0000000000..31deadbfc1
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0104-wireguard-queueing-preserve-flow-hash-across-packet-.patch
+@@ -0,0 +1,116 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Tue, 19 May 2020 22:49:29 -0600
++Subject: [PATCH] wireguard: queueing: preserve flow hash across packet
++ scrubbing
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++commit c78a0b4a78839d572d8a80f6a62221c0d7843135 upstream.
++
++It's important that we clear most header fields during encapsulation and
++decapsulation, because the packet is substantially changed, and we don't
++want any info leak or logic bug due to an accidental correlation. But,
++for encapsulation, it's wrong to clear skb->hash, since it's used by
++fq_codel and flow dissection in general. Without it, classification does
++not proceed as usual. This change might make it easier to estimate the
++number of innerflows by examining clustering of out of order packets,
++but this shouldn't open up anything that can't already be inferred
++otherwise (e.g. syn packet size inference), and fq_codel can be disabled
++anyway.
++
++Furthermore, it might be the case that the hash isn't used or queried at
++all until after wireguard transmits the encrypted UDP packet, which
++means skb->hash might still be zero at this point, and thus no hash
++taken over the inner packet data. In order to address this situation, we
++force a calculation of skb->hash before encrypting packet data.
++
++Of course this means that fq_codel might transmit packets slightly more
++out of order than usual. Toke did some testing on beefy machines with
++high quantities of parallel flows and found that increasing the
++reply-attack counter to 8192 takes care of the most pathological cases
++pretty well.
++
++Reported-by: Dave Taht <dave.taht@gmail.com>
++Reviewed-and-tested-by: Toke Høiland-Jørgensen <toke@toke.dk>
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/messages.h |  2 +-
++ drivers/net/wireguard/queueing.h | 10 +++++++++-
++ drivers/net/wireguard/receive.c  |  2 +-
++ drivers/net/wireguard/send.c     |  7 ++++++-
++ 4 files changed, 17 insertions(+), 4 deletions(-)
++
++--- a/drivers/net/wireguard/messages.h
+++++ b/drivers/net/wireguard/messages.h
++@@ -32,7 +32,7 @@ enum cookie_values {
++ };
++ 
++ enum counter_values {
++-	COUNTER_BITS_TOTAL = 2048,
+++	COUNTER_BITS_TOTAL = 8192,
++ 	COUNTER_REDUNDANT_BITS = BITS_PER_LONG,
++ 	COUNTER_WINDOW_SIZE = COUNTER_BITS_TOTAL - COUNTER_REDUNDANT_BITS
++ };
++--- a/drivers/net/wireguard/queueing.h
+++++ b/drivers/net/wireguard/queueing.h
++@@ -87,12 +87,20 @@ static inline bool wg_check_packet_proto
++ 	return real_protocol && skb->protocol == real_protocol;
++ }
++ 
++-static inline void wg_reset_packet(struct sk_buff *skb)
+++static inline void wg_reset_packet(struct sk_buff *skb, bool encapsulating)
++ {
+++	u8 l4_hash = skb->l4_hash;
+++	u8 sw_hash = skb->sw_hash;
+++	u32 hash = skb->hash;
++ 	skb_scrub_packet(skb, true);
++ 	memset(&skb->headers_start, 0,
++ 	       offsetof(struct sk_buff, headers_end) -
++ 		       offsetof(struct sk_buff, headers_start));
+++	if (encapsulating) {
+++		skb->l4_hash = l4_hash;
+++		skb->sw_hash = sw_hash;
+++		skb->hash = hash;
+++	}
++ 	skb->queue_mapping = 0;
++ 	skb->nohdr = 0;
++ 	skb->peeked = 0;
++--- a/drivers/net/wireguard/receive.c
+++++ b/drivers/net/wireguard/receive.c
++@@ -484,7 +484,7 @@ int wg_packet_rx_poll(struct napi_struct
++ 		if (unlikely(wg_socket_endpoint_from_skb(&endpoint, skb)))
++ 			goto next;
++ 
++-		wg_reset_packet(skb);
+++		wg_reset_packet(skb, false);
++ 		wg_packet_consume_data_done(peer, skb, &endpoint);
++ 		free = false;
++ 
++--- a/drivers/net/wireguard/send.c
+++++ b/drivers/net/wireguard/send.c
++@@ -167,6 +167,11 @@ static bool encrypt_packet(struct sk_buf
++ 	struct sk_buff *trailer;
++ 	int num_frags;
++ 
+++	/* Force hash calculation before encryption so that flow analysis is
+++	 * consistent over the inner packet.
+++	 */
+++	skb_get_hash(skb);
+++
++ 	/* Calculate lengths. */
++ 	padding_len = calculate_skb_padding(skb);
++ 	trailer_len = padding_len + noise_encrypted_len(0);
++@@ -295,7 +300,7 @@ void wg_packet_encrypt_worker(struct wor
++ 		skb_list_walk_safe(first, skb, next) {
++ 			if (likely(encrypt_packet(skb,
++ 					PACKET_CB(first)->keypair))) {
++-				wg_reset_packet(skb);
+++				wg_reset_packet(skb, true);
++ 			} else {
++ 				state = PACKET_STATE_DEAD;
++ 				break;
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0105-wireguard-noise-separate-receive-counter-from-send-c.patch b/target/linux/generic/backport-5.4/080-wireguard-0105-wireguard-noise-separate-receive-counter-from-send-c.patch
+new file mode 100644
+index 0000000000..87d38d36fe
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0105-wireguard-noise-separate-receive-counter-from-send-c.patch
+@@ -0,0 +1,330 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Tue, 19 May 2020 22:49:30 -0600
++Subject: [PATCH] wireguard: noise: separate receive counter from send counter
++
++commit a9e90d9931f3a474f04bab782ccd9d77904941e9 upstream.
++
++In "wireguard: queueing: preserve flow hash across packet scrubbing", we
++were required to slightly increase the size of the receive replay
++counter to something still fairly small, but an increase nonetheless.
++It turns out that we can recoup some of the additional memory overhead
++by splitting up the prior union type into two distinct types. Before, we
++used the same "noise_counter" union for both sending and receiving, with
++sending just using a simple atomic64_t, while receiving used the full
++replay counter checker. This meant that most of the memory being
++allocated for the sending counter was being wasted. Since the old
++"noise_counter" type increased in size in the prior commit, now is a
++good time to split up that union type into a distinct "noise_replay_
++counter" for receiving and a boring atomic64_t for sending, each using
++neither more nor less memory than required.
++
++Also, since sometimes the replay counter is accessed without
++necessitating additional accesses to the bitmap, we can reduce cache
++misses by hoisting the always-necessary lock above the bitmap in the
++struct layout. We also change a "noise_replay_counter" stack allocation
++to kmalloc in a -DDEBUG selftest so that KASAN doesn't trigger a stack
++frame warning.
++
++All and all, removing a bit of abstraction in this commit makes the code
++simpler and smaller, in addition to the motivating memory usage
++recuperation. For example, passing around raw "noise_symmetric_key"
++structs is something that really only makes sense within noise.c, in the
++one place where the sending and receiving keys can safely be thought of
++as the same type of object; subsequent to that, it's important that we
++uniformly access these through keypair->{sending,receiving}, where their
++distinct roles are always made explicit. So this patch allows us to draw
++that distinction clearly as well.
++
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/noise.c            | 16 +++------
++ drivers/net/wireguard/noise.h            | 14 ++++----
++ drivers/net/wireguard/receive.c          | 42 ++++++++++++------------
++ drivers/net/wireguard/selftest/counter.c | 17 +++++++---
++ drivers/net/wireguard/send.c             | 12 +++----
++ 5 files changed, 48 insertions(+), 53 deletions(-)
++
++--- a/drivers/net/wireguard/noise.c
+++++ b/drivers/net/wireguard/noise.c
++@@ -104,6 +104,7 @@ static struct noise_keypair *keypair_cre
++ 
++ 	if (unlikely(!keypair))
++ 		return NULL;
+++	spin_lock_init(&keypair->receiving_counter.lock);
++ 	keypair->internal_id = atomic64_inc_return(&keypair_counter);
++ 	keypair->entry.type = INDEX_HASHTABLE_KEYPAIR;
++ 	keypair->entry.peer = peer;
++@@ -358,25 +359,16 @@ out:
++ 	memzero_explicit(output, BLAKE2S_HASH_SIZE + 1);
++ }
++ 
++-static void symmetric_key_init(struct noise_symmetric_key *key)
++-{
++-	spin_lock_init(&key->counter.receive.lock);
++-	atomic64_set(&key->counter.counter, 0);
++-	memset(key->counter.receive.backtrack, 0,
++-	       sizeof(key->counter.receive.backtrack));
++-	key->birthdate = ktime_get_coarse_boottime_ns();
++-	key->is_valid = true;
++-}
++-
++ static void derive_keys(struct noise_symmetric_key *first_dst,
++ 			struct noise_symmetric_key *second_dst,
++ 			const u8 chaining_key[NOISE_HASH_LEN])
++ {
+++	u64 birthdate = ktime_get_coarse_boottime_ns();
++ 	kdf(first_dst->key, second_dst->key, NULL, NULL,
++ 	    NOISE_SYMMETRIC_KEY_LEN, NOISE_SYMMETRIC_KEY_LEN, 0, 0,
++ 	    chaining_key);
++-	symmetric_key_init(first_dst);
++-	symmetric_key_init(second_dst);
+++	first_dst->birthdate = second_dst->birthdate = birthdate;
+++	first_dst->is_valid = second_dst->is_valid = true;
++ }
++ 
++ static bool __must_check mix_dh(u8 chaining_key[NOISE_HASH_LEN],
++--- a/drivers/net/wireguard/noise.h
+++++ b/drivers/net/wireguard/noise.h
++@@ -15,18 +15,14 @@
++ #include <linux/mutex.h>
++ #include <linux/kref.h>
++ 
++-union noise_counter {
++-	struct {
++-		u64 counter;
++-		unsigned long backtrack[COUNTER_BITS_TOTAL / BITS_PER_LONG];
++-		spinlock_t lock;
++-	} receive;
++-	atomic64_t counter;
+++struct noise_replay_counter {
+++	u64 counter;
+++	spinlock_t lock;
+++	unsigned long backtrack[COUNTER_BITS_TOTAL / BITS_PER_LONG];
++ };
++ 
++ struct noise_symmetric_key {
++ 	u8 key[NOISE_SYMMETRIC_KEY_LEN];
++-	union noise_counter counter;
++ 	u64 birthdate;
++ 	bool is_valid;
++ };
++@@ -34,7 +30,9 @@ struct noise_symmetric_key {
++ struct noise_keypair {
++ 	struct index_hashtable_entry entry;
++ 	struct noise_symmetric_key sending;
+++	atomic64_t sending_counter;
++ 	struct noise_symmetric_key receiving;
+++	struct noise_replay_counter receiving_counter;
++ 	__le32 remote_index;
++ 	bool i_am_the_initiator;
++ 	struct kref refcount;
++--- a/drivers/net/wireguard/receive.c
+++++ b/drivers/net/wireguard/receive.c
++@@ -245,20 +245,20 @@ static void keep_key_fresh(struct wg_pee
++ 	}
++ }
++ 
++-static bool decrypt_packet(struct sk_buff *skb, struct noise_symmetric_key *key)
+++static bool decrypt_packet(struct sk_buff *skb, struct noise_keypair *keypair)
++ {
++ 	struct scatterlist sg[MAX_SKB_FRAGS + 8];
++ 	struct sk_buff *trailer;
++ 	unsigned int offset;
++ 	int num_frags;
++ 
++-	if (unlikely(!key))
+++	if (unlikely(!keypair))
++ 		return false;
++ 
++-	if (unlikely(!READ_ONCE(key->is_valid) ||
++-		  wg_birthdate_has_expired(key->birthdate, REJECT_AFTER_TIME) ||
++-		  key->counter.receive.counter >= REJECT_AFTER_MESSAGES)) {
++-		WRITE_ONCE(key->is_valid, false);
+++	if (unlikely(!READ_ONCE(keypair->receiving.is_valid) ||
+++		  wg_birthdate_has_expired(keypair->receiving.birthdate, REJECT_AFTER_TIME) ||
+++		  keypair->receiving_counter.counter >= REJECT_AFTER_MESSAGES)) {
+++		WRITE_ONCE(keypair->receiving.is_valid, false);
++ 		return false;
++ 	}
++ 
++@@ -283,7 +283,7 @@ static bool decrypt_packet(struct sk_buf
++ 
++ 	if (!chacha20poly1305_decrypt_sg_inplace(sg, skb->len, NULL, 0,
++ 					         PACKET_CB(skb)->nonce,
++-						 key->key))
+++						 keypair->receiving.key))
++ 		return false;
++ 
++ 	/* Another ugly situation of pushing and pulling the header so as to
++@@ -298,41 +298,41 @@ static bool decrypt_packet(struct sk_buf
++ }
++ 
++ /* This is RFC6479, a replay detection bitmap algorithm that avoids bitshifts */
++-static bool counter_validate(union noise_counter *counter, u64 their_counter)
+++static bool counter_validate(struct noise_replay_counter *counter, u64 their_counter)
++ {
++ 	unsigned long index, index_current, top, i;
++ 	bool ret = false;
++ 
++-	spin_lock_bh(&counter->receive.lock);
+++	spin_lock_bh(&counter->lock);
++ 
++-	if (unlikely(counter->receive.counter >= REJECT_AFTER_MESSAGES + 1 ||
+++	if (unlikely(counter->counter >= REJECT_AFTER_MESSAGES + 1 ||
++ 		     their_counter >= REJECT_AFTER_MESSAGES))
++ 		goto out;
++ 
++ 	++their_counter;
++ 
++ 	if (unlikely((COUNTER_WINDOW_SIZE + their_counter) <
++-		     counter->receive.counter))
+++		     counter->counter))
++ 		goto out;
++ 
++ 	index = their_counter >> ilog2(BITS_PER_LONG);
++ 
++-	if (likely(their_counter > counter->receive.counter)) {
++-		index_current = counter->receive.counter >> ilog2(BITS_PER_LONG);
+++	if (likely(their_counter > counter->counter)) {
+++		index_current = counter->counter >> ilog2(BITS_PER_LONG);
++ 		top = min_t(unsigned long, index - index_current,
++ 			    COUNTER_BITS_TOTAL / BITS_PER_LONG);
++ 		for (i = 1; i <= top; ++i)
++-			counter->receive.backtrack[(i + index_current) &
+++			counter->backtrack[(i + index_current) &
++ 				((COUNTER_BITS_TOTAL / BITS_PER_LONG) - 1)] = 0;
++-		counter->receive.counter = their_counter;
+++		counter->counter = their_counter;
++ 	}
++ 
++ 	index &= (COUNTER_BITS_TOTAL / BITS_PER_LONG) - 1;
++ 	ret = !test_and_set_bit(their_counter & (BITS_PER_LONG - 1),
++-				&counter->receive.backtrack[index]);
+++				&counter->backtrack[index]);
++ 
++ out:
++-	spin_unlock_bh(&counter->receive.lock);
+++	spin_unlock_bh(&counter->lock);
++ 	return ret;
++ }
++ 
++@@ -472,12 +472,12 @@ int wg_packet_rx_poll(struct napi_struct
++ 		if (unlikely(state != PACKET_STATE_CRYPTED))
++ 			goto next;
++ 
++-		if (unlikely(!counter_validate(&keypair->receiving.counter,
+++		if (unlikely(!counter_validate(&keypair->receiving_counter,
++ 					       PACKET_CB(skb)->nonce))) {
++ 			net_dbg_ratelimited("%s: Packet has invalid nonce %llu (max %llu)\n",
++ 					    peer->device->dev->name,
++ 					    PACKET_CB(skb)->nonce,
++-					    keypair->receiving.counter.receive.counter);
+++					    keypair->receiving_counter.counter);
++ 			goto next;
++ 		}
++ 
++@@ -511,8 +511,8 @@ void wg_packet_decrypt_worker(struct wor
++ 	struct sk_buff *skb;
++ 
++ 	while ((skb = ptr_ring_consume_bh(&queue->ring)) != NULL) {
++-		enum packet_state state = likely(decrypt_packet(skb,
++-				&PACKET_CB(skb)->keypair->receiving)) ?
+++		enum packet_state state =
+++			likely(decrypt_packet(skb, PACKET_CB(skb)->keypair)) ?
++ 				PACKET_STATE_CRYPTED : PACKET_STATE_DEAD;
++ 		wg_queue_enqueue_per_peer_napi(skb, state);
++ 		if (need_resched())
++--- a/drivers/net/wireguard/selftest/counter.c
+++++ b/drivers/net/wireguard/selftest/counter.c
++@@ -6,18 +6,24 @@
++ #ifdef DEBUG
++ bool __init wg_packet_counter_selftest(void)
++ {
+++	struct noise_replay_counter *counter;
++ 	unsigned int test_num = 0, i;
++-	union noise_counter counter;
++ 	bool success = true;
++ 
++-#define T_INIT do {                                               \
++-		memset(&counter, 0, sizeof(union noise_counter)); \
++-		spin_lock_init(&counter.receive.lock);            \
+++	counter = kmalloc(sizeof(*counter), GFP_KERNEL);
+++	if (unlikely(!counter)) {
+++		pr_err("nonce counter self-test malloc: FAIL\n");
+++		return false;
+++	}
+++
+++#define T_INIT do {                                    \
+++		memset(counter, 0, sizeof(*counter));  \
+++		spin_lock_init(&counter->lock);        \
++ 	} while (0)
++ #define T_LIM (COUNTER_WINDOW_SIZE + 1)
++ #define T(n, v) do {                                                  \
++ 		++test_num;                                           \
++-		if (counter_validate(&counter, n) != (v)) {           \
+++		if (counter_validate(counter, n) != (v)) {            \
++ 			pr_err("nonce counter self-test %u: FAIL\n",  \
++ 			       test_num);                             \
++ 			success = false;                              \
++@@ -99,6 +105,7 @@ bool __init wg_packet_counter_selftest(v
++ 
++ 	if (success)
++ 		pr_info("nonce counter self-tests: pass\n");
+++	kfree(counter);
++ 	return success;
++ }
++ #endif
++--- a/drivers/net/wireguard/send.c
+++++ b/drivers/net/wireguard/send.c
++@@ -129,7 +129,7 @@ static void keep_key_fresh(struct wg_pee
++ 	rcu_read_lock_bh();
++ 	keypair = rcu_dereference_bh(peer->keypairs.current_keypair);
++ 	send = keypair && READ_ONCE(keypair->sending.is_valid) &&
++-	       (atomic64_read(&keypair->sending.counter.counter) > REKEY_AFTER_MESSAGES ||
+++	       (atomic64_read(&keypair->sending_counter) > REKEY_AFTER_MESSAGES ||
++ 		(keypair->i_am_the_initiator &&
++ 		 wg_birthdate_has_expired(keypair->sending.birthdate, REKEY_AFTER_TIME)));
++ 	rcu_read_unlock_bh();
++@@ -349,7 +349,6 @@ void wg_packet_purge_staged_packets(stru
++ 
++ void wg_packet_send_staged_packets(struct wg_peer *peer)
++ {
++-	struct noise_symmetric_key *key;
++ 	struct noise_keypair *keypair;
++ 	struct sk_buff_head packets;
++ 	struct sk_buff *skb;
++@@ -369,10 +368,9 @@ void wg_packet_send_staged_packets(struc
++ 	rcu_read_unlock_bh();
++ 	if (unlikely(!keypair))
++ 		goto out_nokey;
++-	key = &keypair->sending;
++-	if (unlikely(!READ_ONCE(key->is_valid)))
+++	if (unlikely(!READ_ONCE(keypair->sending.is_valid)))
++ 		goto out_nokey;
++-	if (unlikely(wg_birthdate_has_expired(key->birthdate,
+++	if (unlikely(wg_birthdate_has_expired(keypair->sending.birthdate,
++ 					      REJECT_AFTER_TIME)))
++ 		goto out_invalid;
++ 
++@@ -387,7 +385,7 @@ void wg_packet_send_staged_packets(struc
++ 		 */
++ 		PACKET_CB(skb)->ds = ip_tunnel_ecn_encap(0, ip_hdr(skb), skb);
++ 		PACKET_CB(skb)->nonce =
++-				atomic64_inc_return(&key->counter.counter) - 1;
+++				atomic64_inc_return(&keypair->sending_counter) - 1;
++ 		if (unlikely(PACKET_CB(skb)->nonce >= REJECT_AFTER_MESSAGES))
++ 			goto out_invalid;
++ 	}
++@@ -399,7 +397,7 @@ void wg_packet_send_staged_packets(struc
++ 	return;
++ 
++ out_invalid:
++-	WRITE_ONCE(key->is_valid, false);
+++	WRITE_ONCE(keypair->sending.is_valid, false);
++ out_nokey:
++ 	wg_noise_keypair_put(keypair, false);
++ 
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0106-wireguard-noise-do-not-assign-initiation-time-in-if-.patch b/target/linux/generic/backport-5.4/080-wireguard-0106-wireguard-noise-do-not-assign-initiation-time-in-if-.patch
+new file mode 100644
+index 0000000000..a53c764708
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0106-wireguard-noise-do-not-assign-initiation-time-in-if-.patch
+@@ -0,0 +1,33 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Frank Werner-Krippendorf <mail@hb9fxq.ch>
++Date: Tue, 23 Jun 2020 03:59:44 -0600
++Subject: [PATCH] wireguard: noise: do not assign initiation time in if
++ condition
++
++commit 558b353c9c2a717509f291c066c6bd8f5f5e21be upstream.
++
++Fixes an error condition reported by checkpatch.pl which caused by
++assigning a variable in an if condition in wg_noise_handshake_consume_
++initiation().
++
++Signed-off-by: Frank Werner-Krippendorf <mail@hb9fxq.ch>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/noise.c | 4 ++--
++ 1 file changed, 2 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/wireguard/noise.c
+++++ b/drivers/net/wireguard/noise.c
++@@ -617,8 +617,8 @@ wg_noise_handshake_consume_initiation(st
++ 	memcpy(handshake->hash, hash, NOISE_HASH_LEN);
++ 	memcpy(handshake->chaining_key, chaining_key, NOISE_HASH_LEN);
++ 	handshake->remote_index = src->sender_index;
++-	if ((s64)(handshake->last_initiation_consumption -
++-	    (initiation_consumption = ktime_get_coarse_boottime_ns())) < 0)
+++	initiation_consumption = ktime_get_coarse_boottime_ns();
+++	if ((s64)(handshake->last_initiation_consumption - initiation_consumption) < 0)
++ 		handshake->last_initiation_consumption = initiation_consumption;
++ 	handshake->state = HANDSHAKE_CONSUMED_INITIATION;
++ 	up_write(&handshake->lock);
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0107-wireguard-device-avoid-circular-netns-references.patch b/target/linux/generic/backport-5.4/080-wireguard-0107-wireguard-device-avoid-circular-netns-references.patch
+new file mode 100644
+index 0000000000..013023a3e2
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0107-wireguard-device-avoid-circular-netns-references.patch
+@@ -0,0 +1,296 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Tue, 23 Jun 2020 03:59:45 -0600
++Subject: [PATCH] wireguard: device: avoid circular netns references
++
++commit 900575aa33a3eaaef802b31de187a85c4a4b4bd0 upstream.
++
++Before, we took a reference to the creating netns if the new netns was
++different. This caused issues with circular references, with two
++wireguard interfaces swapping namespaces. The solution is to rather not
++take any extra references at all, but instead simply invalidate the
++creating netns pointer when that netns is deleted.
++
++In order to prevent this from happening again, this commit improves the
++rough object leak tracking by allowing it to account for created and
++destroyed interfaces, aside from just peers and keys. That then makes it
++possible to check for the object leak when having two interfaces take a
++reference to each others' namespaces.
++
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/device.c             | 58 ++++++++++------------
++ drivers/net/wireguard/device.h             |  3 +-
++ drivers/net/wireguard/netlink.c            | 14 ++++--
++ drivers/net/wireguard/socket.c             | 25 +++++++---
++ tools/testing/selftests/wireguard/netns.sh | 13 ++++-
++ 5 files changed, 67 insertions(+), 46 deletions(-)
++
++--- a/drivers/net/wireguard/device.c
+++++ b/drivers/net/wireguard/device.c
++@@ -45,17 +45,18 @@ static int wg_open(struct net_device *de
++ 	if (dev_v6)
++ 		dev_v6->cnf.addr_gen_mode = IN6_ADDR_GEN_MODE_NONE;
++ 
+++	mutex_lock(&wg->device_update_lock);
++ 	ret = wg_socket_init(wg, wg->incoming_port);
++ 	if (ret < 0)
++-		return ret;
++-	mutex_lock(&wg->device_update_lock);
+++		goto out;
++ 	list_for_each_entry(peer, &wg->peer_list, peer_list) {
++ 		wg_packet_send_staged_packets(peer);
++ 		if (peer->persistent_keepalive_interval)
++ 			wg_packet_send_keepalive(peer);
++ 	}
+++out:
++ 	mutex_unlock(&wg->device_update_lock);
++-	return 0;
+++	return ret;
++ }
++ 
++ #ifdef CONFIG_PM_SLEEP
++@@ -225,6 +226,7 @@ static void wg_destruct(struct net_devic
++ 	list_del(&wg->device_list);
++ 	rtnl_unlock();
++ 	mutex_lock(&wg->device_update_lock);
+++	rcu_assign_pointer(wg->creating_net, NULL);
++ 	wg->incoming_port = 0;
++ 	wg_socket_reinit(wg, NULL, NULL);
++ 	/* The final references are cleared in the below calls to destroy_workqueue. */
++@@ -240,13 +242,11 @@ static void wg_destruct(struct net_devic
++ 	skb_queue_purge(&wg->incoming_handshakes);
++ 	free_percpu(dev->tstats);
++ 	free_percpu(wg->incoming_handshakes_worker);
++-	if (wg->have_creating_net_ref)
++-		put_net(wg->creating_net);
++ 	kvfree(wg->index_hashtable);
++ 	kvfree(wg->peer_hashtable);
++ 	mutex_unlock(&wg->device_update_lock);
++ 
++-	pr_debug("%s: Interface deleted\n", dev->name);
+++	pr_debug("%s: Interface destroyed\n", dev->name);
++ 	free_netdev(dev);
++ }
++ 
++@@ -292,7 +292,7 @@ static int wg_newlink(struct net *src_ne
++ 	struct wg_device *wg = netdev_priv(dev);
++ 	int ret = -ENOMEM;
++ 
++-	wg->creating_net = src_net;
+++	rcu_assign_pointer(wg->creating_net, src_net);
++ 	init_rwsem(&wg->static_identity.lock);
++ 	mutex_init(&wg->socket_update_lock);
++ 	mutex_init(&wg->device_update_lock);
++@@ -393,30 +393,26 @@ static struct rtnl_link_ops link_ops __r
++ 	.newlink		= wg_newlink,
++ };
++ 
++-static int wg_netdevice_notification(struct notifier_block *nb,
++-				     unsigned long action, void *data)
+++static void wg_netns_pre_exit(struct net *net)
++ {
++-	struct net_device *dev = ((struct netdev_notifier_info *)data)->dev;
++-	struct wg_device *wg = netdev_priv(dev);
++-
++-	ASSERT_RTNL();
++-
++-	if (action != NETDEV_REGISTER || dev->netdev_ops != &netdev_ops)
++-		return 0;
+++	struct wg_device *wg;
++ 
++-	if (dev_net(dev) == wg->creating_net && wg->have_creating_net_ref) {
++-		put_net(wg->creating_net);
++-		wg->have_creating_net_ref = false;
++-	} else if (dev_net(dev) != wg->creating_net &&
++-		   !wg->have_creating_net_ref) {
++-		wg->have_creating_net_ref = true;
++-		get_net(wg->creating_net);
+++	rtnl_lock();
+++	list_for_each_entry(wg, &device_list, device_list) {
+++		if (rcu_access_pointer(wg->creating_net) == net) {
+++			pr_debug("%s: Creating namespace exiting\n", wg->dev->name);
+++			netif_carrier_off(wg->dev);
+++			mutex_lock(&wg->device_update_lock);
+++			rcu_assign_pointer(wg->creating_net, NULL);
+++			wg_socket_reinit(wg, NULL, NULL);
+++			mutex_unlock(&wg->device_update_lock);
+++		}
++ 	}
++-	return 0;
+++	rtnl_unlock();
++ }
++ 
++-static struct notifier_block netdevice_notifier = {
++-	.notifier_call = wg_netdevice_notification
+++static struct pernet_operations pernet_ops = {
+++	.pre_exit = wg_netns_pre_exit
++ };
++ 
++ int __init wg_device_init(void)
++@@ -429,18 +425,18 @@ int __init wg_device_init(void)
++ 		return ret;
++ #endif
++ 
++-	ret = register_netdevice_notifier(&netdevice_notifier);
+++	ret = register_pernet_device(&pernet_ops);
++ 	if (ret)
++ 		goto error_pm;
++ 
++ 	ret = rtnl_link_register(&link_ops);
++ 	if (ret)
++-		goto error_netdevice;
+++		goto error_pernet;
++ 
++ 	return 0;
++ 
++-error_netdevice:
++-	unregister_netdevice_notifier(&netdevice_notifier);
+++error_pernet:
+++	unregister_pernet_device(&pernet_ops);
++ error_pm:
++ #ifdef CONFIG_PM_SLEEP
++ 	unregister_pm_notifier(&pm_notifier);
++@@ -451,7 +447,7 @@ error_pm:
++ void wg_device_uninit(void)
++ {
++ 	rtnl_link_unregister(&link_ops);
++-	unregister_netdevice_notifier(&netdevice_notifier);
+++	unregister_pernet_device(&pernet_ops);
++ #ifdef CONFIG_PM_SLEEP
++ 	unregister_pm_notifier(&pm_notifier);
++ #endif
++--- a/drivers/net/wireguard/device.h
+++++ b/drivers/net/wireguard/device.h
++@@ -40,7 +40,7 @@ struct wg_device {
++ 	struct net_device *dev;
++ 	struct crypt_queue encrypt_queue, decrypt_queue;
++ 	struct sock __rcu *sock4, *sock6;
++-	struct net *creating_net;
+++	struct net __rcu *creating_net;
++ 	struct noise_static_identity static_identity;
++ 	struct workqueue_struct *handshake_receive_wq, *handshake_send_wq;
++ 	struct workqueue_struct *packet_crypt_wq;
++@@ -56,7 +56,6 @@ struct wg_device {
++ 	unsigned int num_peers, device_update_gen;
++ 	u32 fwmark;
++ 	u16 incoming_port;
++-	bool have_creating_net_ref;
++ };
++ 
++ int wg_device_init(void);
++--- a/drivers/net/wireguard/netlink.c
+++++ b/drivers/net/wireguard/netlink.c
++@@ -517,11 +517,15 @@ static int wg_set_device(struct sk_buff
++ 	if (flags & ~__WGDEVICE_F_ALL)
++ 		goto out;
++ 
++-	ret = -EPERM;
++-	if ((info->attrs[WGDEVICE_A_LISTEN_PORT] ||
++-	     info->attrs[WGDEVICE_A_FWMARK]) &&
++-	    !ns_capable(wg->creating_net->user_ns, CAP_NET_ADMIN))
++-		goto out;
+++	if (info->attrs[WGDEVICE_A_LISTEN_PORT] || info->attrs[WGDEVICE_A_FWMARK]) {
+++		struct net *net;
+++		rcu_read_lock();
+++		net = rcu_dereference(wg->creating_net);
+++		ret = !net || !ns_capable(net->user_ns, CAP_NET_ADMIN) ? -EPERM : 0;
+++		rcu_read_unlock();
+++		if (ret)
+++			goto out;
+++	}
++ 
++ 	++wg->device_update_gen;
++ 
++--- a/drivers/net/wireguard/socket.c
+++++ b/drivers/net/wireguard/socket.c
++@@ -347,6 +347,7 @@ static void set_sock_opts(struct socket
++ 
++ int wg_socket_init(struct wg_device *wg, u16 port)
++ {
+++	struct net *net;
++ 	int ret;
++ 	struct udp_tunnel_sock_cfg cfg = {
++ 		.sk_user_data = wg,
++@@ -371,37 +372,47 @@ int wg_socket_init(struct wg_device *wg,
++ 	};
++ #endif
++ 
+++	rcu_read_lock();
+++	net = rcu_dereference(wg->creating_net);
+++	net = net ? maybe_get_net(net) : NULL;
+++	rcu_read_unlock();
+++	if (unlikely(!net))
+++		return -ENONET;
+++
++ #if IS_ENABLED(CONFIG_IPV6)
++ retry:
++ #endif
++ 
++-	ret = udp_sock_create(wg->creating_net, &port4, &new4);
+++	ret = udp_sock_create(net, &port4, &new4);
++ 	if (ret < 0) {
++ 		pr_err("%s: Could not create IPv4 socket\n", wg->dev->name);
++-		return ret;
+++		goto out;
++ 	}
++ 	set_sock_opts(new4);
++-	setup_udp_tunnel_sock(wg->creating_net, new4, &cfg);
+++	setup_udp_tunnel_sock(net, new4, &cfg);
++ 
++ #if IS_ENABLED(CONFIG_IPV6)
++ 	if (ipv6_mod_enabled()) {
++ 		port6.local_udp_port = inet_sk(new4->sk)->inet_sport;
++-		ret = udp_sock_create(wg->creating_net, &port6, &new6);
+++		ret = udp_sock_create(net, &port6, &new6);
++ 		if (ret < 0) {
++ 			udp_tunnel_sock_release(new4);
++ 			if (ret == -EADDRINUSE && !port && retries++ < 100)
++ 				goto retry;
++ 			pr_err("%s: Could not create IPv6 socket\n",
++ 			       wg->dev->name);
++-			return ret;
+++			goto out;
++ 		}
++ 		set_sock_opts(new6);
++-		setup_udp_tunnel_sock(wg->creating_net, new6, &cfg);
+++		setup_udp_tunnel_sock(net, new6, &cfg);
++ 	}
++ #endif
++ 
++ 	wg_socket_reinit(wg, new4->sk, new6 ? new6->sk : NULL);
++-	return 0;
+++	ret = 0;
+++out:
+++	put_net(net);
+++	return ret;
++ }
++ 
++ void wg_socket_reinit(struct wg_device *wg, struct sock *new4,
++--- a/tools/testing/selftests/wireguard/netns.sh
+++++ b/tools/testing/selftests/wireguard/netns.sh
++@@ -587,9 +587,20 @@ ip0 link set wg0 up
++ kill $ncat_pid
++ ip0 link del wg0
++ 
+++# Ensure there aren't circular reference loops
+++ip1 link add wg1 type wireguard
+++ip2 link add wg2 type wireguard
+++ip1 link set wg1 netns $netns2
+++ip2 link set wg2 netns $netns1
+++pp ip netns delete $netns1
+++pp ip netns delete $netns2
+++pp ip netns add $netns1
+++pp ip netns add $netns2
+++
+++sleep 2 # Wait for cleanup and grace periods
++ declare -A objects
++ while read -t 0.1 -r line 2>/dev/null || [[ $? -ne 142 ]]; do
++-	[[ $line =~ .*(wg[0-9]+:\ [A-Z][a-z]+\ [0-9]+)\ .*(created|destroyed).* ]] || continue
+++	[[ $line =~ .*(wg[0-9]+:\ [A-Z][a-z]+\ ?[0-9]*)\ .*(created|destroyed).* ]] || continue
++ 	objects["${BASH_REMATCH[1]}"]+="${BASH_REMATCH[2]}"
++ done < /dev/kmsg
++ alldeleted=1
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0108-wireguard-receive-account-for-napi_gro_receive-never.patch b/target/linux/generic/backport-5.4/080-wireguard-0108-wireguard-receive-account-for-napi_gro_receive-never.patch
+new file mode 100644
+index 0000000000..eceb0b9255
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0108-wireguard-receive-account-for-napi_gro_receive-never.patch
+@@ -0,0 +1,42 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Wed, 24 Jun 2020 16:06:03 -0600
++Subject: [PATCH] wireguard: receive: account for napi_gro_receive never
++ returning GRO_DROP
++
++commit df08126e3833e9dca19e2407db5f5860a7c194fb upstream.
++
++The napi_gro_receive function no longer returns GRO_DROP ever, making
++handling GRO_DROP dead code. This commit removes that dead code.
++Further, it's not even clear that device drivers have any business in
++taking action after passing off received packets; that's arguably out of
++their hands.
++
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Fixes: 6570bc79c0df ("net: core: use listified Rx for GRO_NORMAL in napi_gro_receive()")
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/receive.c | 10 ++--------
++ 1 file changed, 2 insertions(+), 8 deletions(-)
++
++--- a/drivers/net/wireguard/receive.c
+++++ b/drivers/net/wireguard/receive.c
++@@ -414,14 +414,8 @@ static void wg_packet_consume_data_done(
++ 	if (unlikely(routed_peer != peer))
++ 		goto dishonest_packet_peer;
++ 
++-	if (unlikely(napi_gro_receive(&peer->napi, skb) == GRO_DROP)) {
++-		++dev->stats.rx_dropped;
++-		net_dbg_ratelimited("%s: Failed to give packet to userspace from peer %llu (%pISpfsc)\n",
++-				    dev->name, peer->internal_id,
++-				    &peer->endpoint.addr);
++-	} else {
++-		update_rx_stats(peer, message_data_len(len_before_trim));
++-	}
+++	napi_gro_receive(&peer->napi, skb);
+++	update_rx_stats(peer, message_data_len(len_before_trim));
++ 	return;
++ 
++ dishonest_packet_peer:
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0109-net-ip_tunnel-add-header_ops-for-layer-3-devices.patch b/target/linux/generic/backport-5.4/080-wireguard-0109-net-ip_tunnel-add-header_ops-for-layer-3-devices.patch
+new file mode 100644
+index 0000000000..cfd6b1457c
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0109-net-ip_tunnel-add-header_ops-for-layer-3-devices.patch
+@@ -0,0 +1,58 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Mon, 29 Jun 2020 19:06:18 -0600
++Subject: [PATCH] net: ip_tunnel: add header_ops for layer 3 devices
++
++commit 2606aff916854b61234bf85001be9777bab2d5f8 upstream.
++
++Some devices that take straight up layer 3 packets benefit from having a
++shared header_ops so that AF_PACKET sockets can inject packets that are
++recognized. This shared infrastructure will be used by other drivers
++that currently can't inject packets using AF_PACKET. It also exposes the
++parser function, as it is useful in standalone form too.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Acked-by: Willem de Bruijn <willemb@google.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ include/net/ip_tunnels.h  |  3 +++
++ net/ipv4/ip_tunnel_core.c | 18 ++++++++++++++++++
++ 2 files changed, 21 insertions(+)
++
++--- a/include/net/ip_tunnels.h
+++++ b/include/net/ip_tunnels.h
++@@ -289,6 +289,9 @@ int ip_tunnel_newlink(struct net_device
++ 		      struct ip_tunnel_parm *p, __u32 fwmark);
++ void ip_tunnel_setup(struct net_device *dev, unsigned int net_id);
++ 
+++extern const struct header_ops ip_tunnel_header_ops;
+++__be16 ip_tunnel_parse_protocol(const struct sk_buff *skb);
+++
++ struct ip_tunnel_encap_ops {
++ 	size_t (*encap_hlen)(struct ip_tunnel_encap *e);
++ 	int (*build_header)(struct sk_buff *skb, struct ip_tunnel_encap *e,
++--- a/net/ipv4/ip_tunnel_core.c
+++++ b/net/ipv4/ip_tunnel_core.c
++@@ -446,3 +446,21 @@ void ip_tunnel_unneed_metadata(void)
++ 	static_branch_dec(&ip_tunnel_metadata_cnt);
++ }
++ EXPORT_SYMBOL_GPL(ip_tunnel_unneed_metadata);
+++
+++/* Returns either the correct skb->protocol value, or 0 if invalid. */
+++__be16 ip_tunnel_parse_protocol(const struct sk_buff *skb)
+++{
+++	if (skb_network_header(skb) >= skb->head &&
+++	    (skb_network_header(skb) + sizeof(struct iphdr)) <= skb_tail_pointer(skb) &&
+++	    ip_hdr(skb)->version == 4)
+++		return htons(ETH_P_IP);
+++	if (skb_network_header(skb) >= skb->head &&
+++	    (skb_network_header(skb) + sizeof(struct ipv6hdr)) <= skb_tail_pointer(skb) &&
+++	    ipv6_hdr(skb)->version == 6)
+++		return htons(ETH_P_IPV6);
+++	return 0;
+++}
+++EXPORT_SYMBOL(ip_tunnel_parse_protocol);
+++
+++const struct header_ops ip_tunnel_header_ops = { .parse_protocol = ip_tunnel_parse_protocol };
+++EXPORT_SYMBOL(ip_tunnel_header_ops);
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0110-wireguard-implement-header_ops-parse_protocol-for-AF.patch b/target/linux/generic/backport-5.4/080-wireguard-0110-wireguard-implement-header_ops-parse_protocol-for-AF.patch
+new file mode 100644
+index 0000000000..415ecffeef
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0110-wireguard-implement-header_ops-parse_protocol-for-AF.patch
+@@ -0,0 +1,36 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Mon, 29 Jun 2020 19:06:20 -0600
++Subject: [PATCH] wireguard: implement header_ops->parse_protocol for AF_PACKET
++
++commit 01a4967c71c004f8ecad4ab57021348636502fa9 upstream.
++
++WireGuard uses skb->protocol to determine packet type, and bails out if
++it's not set or set to something it's not expecting. For AF_PACKET
++injection, we need to support its call chain of:
++
++    packet_sendmsg -> packet_snd -> packet_parse_headers ->
++      dev_parse_header_protocol -> parse_protocol
++
++Without a valid parse_protocol, this returns zero, and wireguard then
++rejects the skb. So, this wires up the ip_tunnel handler for layer 3
++packets for that case.
++
++Reported-by: Hans Wippel <ndev@hwipl.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/device.c | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/drivers/net/wireguard/device.c
+++++ b/drivers/net/wireguard/device.c
++@@ -262,6 +262,7 @@ static void wg_setup(struct net_device *
++ 			     max(sizeof(struct ipv6hdr), sizeof(struct iphdr));
++ 
++ 	dev->netdev_ops = &netdev_ops;
+++	dev->header_ops = &ip_tunnel_header_ops;
++ 	dev->hard_header_len = 0;
++ 	dev->addr_len = 0;
++ 	dev->needed_headroom = DATA_PACKET_HEAD_ROOM;
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0111-wireguard-queueing-make-use-of-ip_tunnel_parse_proto.patch b/target/linux/generic/backport-5.4/080-wireguard-0111-wireguard-queueing-make-use-of-ip_tunnel_parse_proto.patch
+new file mode 100644
+index 0000000000..a777732ce7
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0111-wireguard-queueing-make-use-of-ip_tunnel_parse_proto.patch
+@@ -0,0 +1,68 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Mon, 29 Jun 2020 19:06:21 -0600
++Subject: [PATCH] wireguard: queueing: make use of ip_tunnel_parse_protocol
++
++commit 1a574074ae7d1d745c16f7710655f38a53174c27 upstream.
++
++Now that wg_examine_packet_protocol has been added for general
++consumption as ip_tunnel_parse_protocol, it's possible to remove
++wg_examine_packet_protocol and simply use the new
++ip_tunnel_parse_protocol function directly.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/queueing.h | 19 ++-----------------
++ drivers/net/wireguard/receive.c  |  2 +-
++ 2 files changed, 3 insertions(+), 18 deletions(-)
++
++--- a/drivers/net/wireguard/queueing.h
+++++ b/drivers/net/wireguard/queueing.h
++@@ -11,6 +11,7 @@
++ #include <linux/skbuff.h>
++ #include <linux/ip.h>
++ #include <linux/ipv6.h>
+++#include <net/ip_tunnels.h>
++ 
++ struct wg_device;
++ struct wg_peer;
++@@ -65,25 +66,9 @@ struct packet_cb {
++ #define PACKET_CB(skb) ((struct packet_cb *)((skb)->cb))
++ #define PACKET_PEER(skb) (PACKET_CB(skb)->keypair->entry.peer)
++ 
++-/* Returns either the correct skb->protocol value, or 0 if invalid. */
++-static inline __be16 wg_examine_packet_protocol(struct sk_buff *skb)
++-{
++-	if (skb_network_header(skb) >= skb->head &&
++-	    (skb_network_header(skb) + sizeof(struct iphdr)) <=
++-		    skb_tail_pointer(skb) &&
++-	    ip_hdr(skb)->version == 4)
++-		return htons(ETH_P_IP);
++-	if (skb_network_header(skb) >= skb->head &&
++-	    (skb_network_header(skb) + sizeof(struct ipv6hdr)) <=
++-		    skb_tail_pointer(skb) &&
++-	    ipv6_hdr(skb)->version == 6)
++-		return htons(ETH_P_IPV6);
++-	return 0;
++-}
++-
++ static inline bool wg_check_packet_protocol(struct sk_buff *skb)
++ {
++-	__be16 real_protocol = wg_examine_packet_protocol(skb);
+++	__be16 real_protocol = ip_tunnel_parse_protocol(skb);
++ 	return real_protocol && skb->protocol == real_protocol;
++ }
++ 
++--- a/drivers/net/wireguard/receive.c
+++++ b/drivers/net/wireguard/receive.c
++@@ -387,7 +387,7 @@ static void wg_packet_consume_data_done(
++ 	 */
++ 	skb->ip_summed = CHECKSUM_UNNECESSARY;
++ 	skb->csum_level = ~0; /* All levels */
++-	skb->protocol = wg_examine_packet_protocol(skb);
+++	skb->protocol = ip_tunnel_parse_protocol(skb);
++ 	if (skb->protocol == htons(ETH_P_IP)) {
++ 		len = ntohs(ip_hdr(skb)->tot_len);
++ 		if (unlikely(len < sizeof(struct iphdr)))
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0112-netlink-consistently-use-NLA_POLICY_EXACT_LEN.patch b/target/linux/generic/backport-5.4/080-wireguard-0112-netlink-consistently-use-NLA_POLICY_EXACT_LEN.patch
+new file mode 100644
+index 0000000000..4b2712bb2d
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0112-netlink-consistently-use-NLA_POLICY_EXACT_LEN.patch
+@@ -0,0 +1,49 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Johannes Berg <johannes.berg@intel.com>
++Date: Tue, 18 Aug 2020 10:17:31 +0200
++Subject: [PATCH] netlink: consistently use NLA_POLICY_EXACT_LEN()
++
++commit 8140860c817f3e9f78bcd1e420b9777ddcbaa629 upstream.
++
++Change places that open-code NLA_POLICY_EXACT_LEN() to
++use the macro instead, giving us flexibility in how we
++handle the details of the macro.
++
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++Acked-by: Matthieu Baerts <matthieu.baerts@tessares.net>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++[Jason: only picked the drivers/net/wireguard/* part]
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/netlink.c | 10 +++++-----
++ 1 file changed, 5 insertions(+), 5 deletions(-)
++
++--- a/drivers/net/wireguard/netlink.c
+++++ b/drivers/net/wireguard/netlink.c
++@@ -22,8 +22,8 @@ static struct genl_family genl_family;
++ static const struct nla_policy device_policy[WGDEVICE_A_MAX + 1] = {
++ 	[WGDEVICE_A_IFINDEX]		= { .type = NLA_U32 },
++ 	[WGDEVICE_A_IFNAME]		= { .type = NLA_NUL_STRING, .len = IFNAMSIZ - 1 },
++-	[WGDEVICE_A_PRIVATE_KEY]	= { .type = NLA_EXACT_LEN, .len = NOISE_PUBLIC_KEY_LEN },
++-	[WGDEVICE_A_PUBLIC_KEY]		= { .type = NLA_EXACT_LEN, .len = NOISE_PUBLIC_KEY_LEN },
+++	[WGDEVICE_A_PRIVATE_KEY]	= NLA_POLICY_EXACT_LEN(NOISE_PUBLIC_KEY_LEN),
+++	[WGDEVICE_A_PUBLIC_KEY]		= NLA_POLICY_EXACT_LEN(NOISE_PUBLIC_KEY_LEN),
++ 	[WGDEVICE_A_FLAGS]		= { .type = NLA_U32 },
++ 	[WGDEVICE_A_LISTEN_PORT]	= { .type = NLA_U16 },
++ 	[WGDEVICE_A_FWMARK]		= { .type = NLA_U32 },
++@@ -31,12 +31,12 @@ static const struct nla_policy device_po
++ };
++ 
++ static const struct nla_policy peer_policy[WGPEER_A_MAX + 1] = {
++-	[WGPEER_A_PUBLIC_KEY]				= { .type = NLA_EXACT_LEN, .len = NOISE_PUBLIC_KEY_LEN },
++-	[WGPEER_A_PRESHARED_KEY]			= { .type = NLA_EXACT_LEN, .len = NOISE_SYMMETRIC_KEY_LEN },
+++	[WGPEER_A_PUBLIC_KEY]				= NLA_POLICY_EXACT_LEN(NOISE_PUBLIC_KEY_LEN),
+++	[WGPEER_A_PRESHARED_KEY]			= NLA_POLICY_EXACT_LEN(NOISE_SYMMETRIC_KEY_LEN),
++ 	[WGPEER_A_FLAGS]				= { .type = NLA_U32 },
++ 	[WGPEER_A_ENDPOINT]				= { .type = NLA_MIN_LEN, .len = sizeof(struct sockaddr) },
++ 	[WGPEER_A_PERSISTENT_KEEPALIVE_INTERVAL]	= { .type = NLA_U16 },
++-	[WGPEER_A_LAST_HANDSHAKE_TIME]			= { .type = NLA_EXACT_LEN, .len = sizeof(struct __kernel_timespec) },
+++	[WGPEER_A_LAST_HANDSHAKE_TIME]			= NLA_POLICY_EXACT_LEN(sizeof(struct __kernel_timespec)),
++ 	[WGPEER_A_RX_BYTES]				= { .type = NLA_U64 },
++ 	[WGPEER_A_TX_BYTES]				= { .type = NLA_U64 },
++ 	[WGPEER_A_ALLOWEDIPS]				= { .type = NLA_NESTED },
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0113-netlink-consistently-use-NLA_POLICY_MIN_LEN.patch b/target/linux/generic/backport-5.4/080-wireguard-0113-netlink-consistently-use-NLA_POLICY_MIN_LEN.patch
+new file mode 100644
+index 0000000000..4b414bc309
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0113-netlink-consistently-use-NLA_POLICY_MIN_LEN.patch
+@@ -0,0 +1,39 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Johannes Berg <johannes.berg@intel.com>
++Date: Tue, 18 Aug 2020 10:17:32 +0200
++Subject: [PATCH] netlink: consistently use NLA_POLICY_MIN_LEN()
++
++commit bc0435855041d7fff0b83dd992fc4be34aa11afb upstream.
++
++Change places that open-code NLA_POLICY_MIN_LEN() to
++use the macro instead, giving us flexibility in how we
++handle the details of the macro.
++
++Signed-off-by: Johannes Berg <johannes.berg@intel.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++[Jason: only picked the drivers/net/wireguard/* part]
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/netlink.c | 4 ++--
++ 1 file changed, 2 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/wireguard/netlink.c
+++++ b/drivers/net/wireguard/netlink.c
++@@ -34,7 +34,7 @@ static const struct nla_policy peer_poli
++ 	[WGPEER_A_PUBLIC_KEY]				= NLA_POLICY_EXACT_LEN(NOISE_PUBLIC_KEY_LEN),
++ 	[WGPEER_A_PRESHARED_KEY]			= NLA_POLICY_EXACT_LEN(NOISE_SYMMETRIC_KEY_LEN),
++ 	[WGPEER_A_FLAGS]				= { .type = NLA_U32 },
++-	[WGPEER_A_ENDPOINT]				= { .type = NLA_MIN_LEN, .len = sizeof(struct sockaddr) },
+++	[WGPEER_A_ENDPOINT]				= NLA_POLICY_MIN_LEN(sizeof(struct sockaddr)),
++ 	[WGPEER_A_PERSISTENT_KEEPALIVE_INTERVAL]	= { .type = NLA_U16 },
++ 	[WGPEER_A_LAST_HANDSHAKE_TIME]			= NLA_POLICY_EXACT_LEN(sizeof(struct __kernel_timespec)),
++ 	[WGPEER_A_RX_BYTES]				= { .type = NLA_U64 },
++@@ -45,7 +45,7 @@ static const struct nla_policy peer_poli
++ 
++ static const struct nla_policy allowedip_policy[WGALLOWEDIP_A_MAX + 1] = {
++ 	[WGALLOWEDIP_A_FAMILY]		= { .type = NLA_U16 },
++-	[WGALLOWEDIP_A_IPADDR]		= { .type = NLA_MIN_LEN, .len = sizeof(struct in_addr) },
+++	[WGALLOWEDIP_A_IPADDR]		= NLA_POLICY_MIN_LEN(sizeof(struct in_addr)),
++ 	[WGALLOWEDIP_A_CIDR_MASK]	= { .type = NLA_U8 }
++ };
++ 
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0114-wireguard-noise-take-lock-when-removing-handshake-en.patch b/target/linux/generic/backport-5.4/080-wireguard-0114-wireguard-noise-take-lock-when-removing-handshake-en.patch
+new file mode 100644
+index 0000000000..e80528c91b
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0114-wireguard-noise-take-lock-when-removing-handshake-en.patch
+@@ -0,0 +1,127 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Wed, 9 Sep 2020 13:58:14 +0200
++Subject: [PATCH] wireguard: noise: take lock when removing handshake entry
++ from table
++
++commit 9179ba31367bcf481c3c79b5f028c94faad9f30a upstream.
++
++Eric reported that syzkaller found a race of this variety:
++
++CPU 1                                       CPU 2
++-------------------------------------------|---------------------------------------
++wg_index_hashtable_replace(old, ...)       |
++  if (hlist_unhashed(&old->index_hash))    |
++                                           | wg_index_hashtable_remove(old)
++                                           |   hlist_del_init_rcu(&old->index_hash)
++				           |     old->index_hash.pprev = NULL
++  hlist_replace_rcu(&old->index_hash, ...) |
++    *old->index_hash.pprev                 |
++
++Syzbot wasn't actually able to reproduce this more than once or create a
++reproducer, because the race window between checking "hlist_unhashed" and
++calling "hlist_replace_rcu" is just so small. Adding an mdelay(5) or
++similar there helps make this demonstrable using this simple script:
++
++    #!/bin/bash
++    set -ex
++    trap 'kill $pid1; kill $pid2; ip link del wg0; ip link del wg1' EXIT
++    ip link add wg0 type wireguard
++    ip link add wg1 type wireguard
++    wg set wg0 private-key <(wg genkey) listen-port 9999
++    wg set wg1 private-key <(wg genkey) peer $(wg show wg0 public-key) endpoint 127.0.0.1:9999 persistent-keepalive 1
++    wg set wg0 peer $(wg show wg1 public-key)
++    ip link set wg0 up
++    yes link set wg1 up | ip -force -batch - &
++    pid1=$!
++    yes link set wg1 down | ip -force -batch - &
++    pid2=$!
++    wait
++
++The fundumental underlying problem is that we permit calls to wg_index_
++hashtable_remove(handshake.entry) without requiring the caller to take
++the handshake mutex that is intended to protect members of handshake
++during mutations. This is consistently the case with calls to wg_index_
++hashtable_insert(handshake.entry) and wg_index_hashtable_replace(
++handshake.entry), but it's missing from a pertinent callsite of wg_
++index_hashtable_remove(handshake.entry). So, this patch makes sure that
++mutex is taken.
++
++The original code was a little bit funky though, in the form of:
++
++    remove(handshake.entry)
++    lock(), memzero(handshake.some_members), unlock()
++    remove(handshake.entry)
++
++The original intention of that double removal pattern outside the lock
++appears to be some attempt to prevent insertions that might happen while
++locks are dropped during expensive crypto operations, but actually, all
++callers of wg_index_hashtable_insert(handshake.entry) take the write
++lock and then explicitly check handshake.state, as they should, which
++the aforementioned memzero clears, which means an insertion should
++already be impossible. And regardless, the original intention was
++necessarily racy, since it wasn't guaranteed that something else would
++run after the unlock() instead of after the remove(). So, from a
++soundness perspective, it seems positive to remove what looks like a
++hack at best.
++
++The crash from both syzbot and from the script above is as follows:
++
++  general protection fault, probably for non-canonical address 0xdffffc0000000000: 0000 [#1] PREEMPT SMP KASAN
++  KASAN: null-ptr-deref in range [0x0000000000000000-0x0000000000000007]
++  CPU: 0 PID: 7395 Comm: kworker/0:3 Not tainted 5.9.0-rc4-syzkaller #0
++  Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
++  Workqueue: wg-kex-wg1 wg_packet_handshake_receive_worker
++  RIP: 0010:hlist_replace_rcu include/linux/rculist.h:505 [inline]
++  RIP: 0010:wg_index_hashtable_replace+0x176/0x330 drivers/net/wireguard/peerlookup.c:174
++  Code: 00 fc ff df 48 89 f9 48 c1 e9 03 80 3c 01 00 0f 85 44 01 00 00 48 b9 00 00 00 00 00 fc ff df 48 8b 45 10 48 89 c6 48 c1 ee 03 <80> 3c 0e 00 0f 85 06 01 00 00 48 85 d2 4c 89 28 74 47 e8 a3 4f b5
++  RSP: 0018:ffffc90006a97bf8 EFLAGS: 00010246
++  RAX: 0000000000000000 RBX: ffff888050ffc4f8 RCX: dffffc0000000000
++  RDX: 0000000000000000 RSI: 0000000000000000 RDI: ffff88808e04e010
++  RBP: ffff88808e04e000 R08: 0000000000000001 R09: ffff8880543d0000
++  R10: ffffed100a87a000 R11: 000000000000016e R12: ffff8880543d0000
++  R13: ffff88808e04e008 R14: ffff888050ffc508 R15: ffff888050ffc500
++  FS:  0000000000000000(0000) GS:ffff8880ae600000(0000) knlGS:0000000000000000
++  CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
++  CR2: 00000000f5505db0 CR3: 0000000097cf7000 CR4: 00000000001526f0
++  DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
++  DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
++  Call Trace:
++  wg_noise_handshake_begin_session+0x752/0xc9a drivers/net/wireguard/noise.c:820
++  wg_receive_handshake_packet drivers/net/wireguard/receive.c:183 [inline]
++  wg_packet_handshake_receive_worker+0x33b/0x730 drivers/net/wireguard/receive.c:220
++  process_one_work+0x94c/0x1670 kernel/workqueue.c:2269
++  worker_thread+0x64c/0x1120 kernel/workqueue.c:2415
++  kthread+0x3b5/0x4a0 kernel/kthread.c:292
++  ret_from_fork+0x1f/0x30 arch/x86/entry/entry_64.S:294
++
++Reported-by: syzbot <syzkaller@googlegroups.com>
++Reported-by: Eric Dumazet <edumazet@google.com>
++Link: https://lore.kernel.org/wireguard/20200908145911.4090480-1-edumazet@google.com/
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/noise.c | 5 +----
++ 1 file changed, 1 insertion(+), 4 deletions(-)
++
++--- a/drivers/net/wireguard/noise.c
+++++ b/drivers/net/wireguard/noise.c
++@@ -87,15 +87,12 @@ static void handshake_zero(struct noise_
++ 
++ void wg_noise_handshake_clear(struct noise_handshake *handshake)
++ {
+++	down_write(&handshake->lock);
++ 	wg_index_hashtable_remove(
++ 			handshake->entry.peer->device->index_hashtable,
++ 			&handshake->entry);
++-	down_write(&handshake->lock);
++ 	handshake_zero(handshake);
++ 	up_write(&handshake->lock);
++-	wg_index_hashtable_remove(
++-			handshake->entry.peer->device->index_hashtable,
++-			&handshake->entry);
++ }
++ 
++ static struct noise_keypair *keypair_create(struct wg_peer *peer)
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0115-wireguard-peerlookup-take-lock-before-checking-hash-.patch b/target/linux/generic/backport-5.4/080-wireguard-0115-wireguard-peerlookup-take-lock-before-checking-hash-.patch
+new file mode 100644
+index 0000000000..e7f46ddf9c
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0115-wireguard-peerlookup-take-lock-before-checking-hash-.patch
+@@ -0,0 +1,62 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Wed, 9 Sep 2020 13:58:15 +0200
++Subject: [PATCH] wireguard: peerlookup: take lock before checking hash in
++ replace operation
++
++commit 6147f7b1e90ff09bd52afc8b9206a7fcd133daf7 upstream.
++
++Eric's suggested fix for the previous commit's mentioned race condition
++was to simply take the table->lock in wg_index_hashtable_replace(). The
++table->lock of the hash table is supposed to protect the bucket heads,
++not the entires, but actually, since all the mutator functions are
++already taking it, it makes sense to take it too for the test to
++hlist_unhashed, as a defense in depth measure, so that it no longer
++races with deletions, regardless of what other locks are protecting
++individual entries. This is sensible from a performance perspective
++because, as Eric pointed out, the case of being unhashed is already the
++unlikely case, so this won't add common contention. And comparing
++instructions, this basically doesn't make much of a difference other
++than pushing and popping %r13, used by the new `bool ret`. More
++generally, I like the idea of locking consistency across table mutator
++functions, and this might let me rest slightly easier at night.
++
++Suggested-by: Eric Dumazet <edumazet@google.com>
++Link: https://lore.kernel.org/wireguard/20200908145911.4090480-1-edumazet@google.com/
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/peerlookup.c | 11 ++++++++---
++ 1 file changed, 8 insertions(+), 3 deletions(-)
++
++--- a/drivers/net/wireguard/peerlookup.c
+++++ b/drivers/net/wireguard/peerlookup.c
++@@ -167,9 +167,13 @@ bool wg_index_hashtable_replace(struct i
++ 				struct index_hashtable_entry *old,
++ 				struct index_hashtable_entry *new)
++ {
++-	if (unlikely(hlist_unhashed(&old->index_hash)))
++-		return false;
+++	bool ret;
+++
++ 	spin_lock_bh(&table->lock);
+++	ret = !hlist_unhashed(&old->index_hash);
+++	if (unlikely(!ret))
+++		goto out;
+++
++ 	new->index = old->index;
++ 	hlist_replace_rcu(&old->index_hash, &new->index_hash);
++ 
++@@ -180,8 +184,9 @@ bool wg_index_hashtable_replace(struct i
++ 	 * simply gets dropped, which isn't terrible.
++ 	 */
++ 	INIT_HLIST_NODE(&old->index_hash);
+++out:
++ 	spin_unlock_bh(&table->lock);
++-	return true;
+++	return ret;
++ }
++ 
++ void wg_index_hashtable_remove(struct index_hashtable *table,
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0116-wireguard-selftests-check-that-route_me_harder-packe.patch b/target/linux/generic/backport-5.4/080-wireguard-0116-wireguard-selftests-check-that-route_me_harder-packe.patch
+new file mode 100644
+index 0000000000..09c1b0b8f8
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0116-wireguard-selftests-check-that-route_me_harder-packe.patch
+@@ -0,0 +1,56 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Thu, 29 Oct 2020 03:56:05 +0100
++Subject: [PATCH] wireguard: selftests: check that route_me_harder packets use
++ the right sk
++
++commit af8afcf1fdd5f365f70e2386c2d8c7a1abd853d7 upstream.
++
++If netfilter changes the packet mark, the packet is rerouted. The
++ip_route_me_harder family of functions fails to use the right sk, opting
++to instead use skb->sk, resulting in a routing loop when used with
++tunnels. With the next change fixing this issue in netfilter, test for
++the relevant condition inside our test suite, since wireguard was where
++the bug was discovered.
++
++Reported-by: Chen Minqiang <ptpt52@gmail.com>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ tools/testing/selftests/wireguard/netns.sh           | 8 ++++++++
++ tools/testing/selftests/wireguard/qemu/kernel.config | 2 ++
++ 2 files changed, 10 insertions(+)
++
++--- a/tools/testing/selftests/wireguard/netns.sh
+++++ b/tools/testing/selftests/wireguard/netns.sh
++@@ -316,6 +316,14 @@ pp sleep 3
++ n2 ping -W 1 -c 1 192.168.241.1
++ n1 wg set wg0 peer "$pub2" persistent-keepalive 0
++ 
+++# Test that sk_bound_dev_if works
+++n1 ping -I wg0 -c 1 -W 1 192.168.241.2
+++# What about when the mark changes and the packet must be rerouted?
+++n1 iptables -t mangle -I OUTPUT -j MARK --set-xmark 1
+++n1 ping -c 1 -W 1 192.168.241.2 # First the boring case
+++n1 ping -I wg0 -c 1 -W 1 192.168.241.2 # Then the sk_bound_dev_if case
+++n1 iptables -t mangle -D OUTPUT -j MARK --set-xmark 1
+++
++ # Test that onion routing works, even when it loops
++ n1 wg set wg0 peer "$pub3" allowed-ips 192.168.242.2/32 endpoint 192.168.241.2:5
++ ip1 addr add 192.168.242.1/24 dev wg0
++--- a/tools/testing/selftests/wireguard/qemu/kernel.config
+++++ b/tools/testing/selftests/wireguard/qemu/kernel.config
++@@ -18,10 +18,12 @@ CONFIG_NF_NAT=y
++ CONFIG_NETFILTER_XTABLES=y
++ CONFIG_NETFILTER_XT_NAT=y
++ CONFIG_NETFILTER_XT_MATCH_LENGTH=y
+++CONFIG_NETFILTER_XT_MARK=y
++ CONFIG_NF_CONNTRACK_IPV4=y
++ CONFIG_NF_NAT_IPV4=y
++ CONFIG_IP_NF_IPTABLES=y
++ CONFIG_IP_NF_FILTER=y
+++CONFIG_IP_NF_MANGLE=y
++ CONFIG_IP_NF_NAT=y
++ CONFIG_IP_ADVANCED_ROUTER=y
++ CONFIG_IP_MULTIPLE_TABLES=y
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0117-wireguard-avoid-double-unlikely-notation-when-using-.patch b/target/linux/generic/backport-5.4/080-wireguard-0117-wireguard-avoid-double-unlikely-notation-when-using-.patch
+new file mode 100644
+index 0000000000..7dfc1bb919
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0117-wireguard-avoid-double-unlikely-notation-when-using-.patch
+@@ -0,0 +1,55 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Antonio Quartulli <a@unstable.cc>
++Date: Mon, 22 Feb 2021 17:25:43 +0100
++Subject: [PATCH] wireguard: avoid double unlikely() notation when using
++ IS_ERR()
++
++commit 30ac4e2f54ec067b7b9ca0db27e75681581378d6 upstream.
++
++The definition of IS_ERR() already applies the unlikely() notation
++when checking the error status of the passed pointer. For this
++reason there is no need to have the same notation outside of
++IS_ERR() itself.
++
++Clean up code by removing redundant notation.
++
++Signed-off-by: Antonio Quartulli <a@unstable.cc>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Jakub Kicinski <kuba@kernel.org>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/device.c | 2 +-
++ drivers/net/wireguard/socket.c | 4 ++--
++ 2 files changed, 3 insertions(+), 3 deletions(-)
++
++--- a/drivers/net/wireguard/device.c
+++++ b/drivers/net/wireguard/device.c
++@@ -157,7 +157,7 @@ static netdev_tx_t wg_xmit(struct sk_buf
++ 	} else {
++ 		struct sk_buff *segs = skb_gso_segment(skb, 0);
++ 
++-		if (unlikely(IS_ERR(segs))) {
+++		if (IS_ERR(segs)) {
++ 			ret = PTR_ERR(segs);
++ 			goto err_peer;
++ 		}
++--- a/drivers/net/wireguard/socket.c
+++++ b/drivers/net/wireguard/socket.c
++@@ -71,7 +71,7 @@ static int send4(struct wg_device *wg, s
++ 				ip_rt_put(rt);
++ 			rt = ip_route_output_flow(sock_net(sock), &fl, sock);
++ 		}
++-		if (unlikely(IS_ERR(rt))) {
+++		if (IS_ERR(rt)) {
++ 			ret = PTR_ERR(rt);
++ 			net_dbg_ratelimited("%s: No route to %pISpfsc, error %d\n",
++ 					    wg->dev->name, &endpoint->addr, ret);
++@@ -138,7 +138,7 @@ static int send6(struct wg_device *wg, s
++ 		}
++ 		dst = ipv6_stub->ipv6_dst_lookup_flow(sock_net(sock), sock, &fl,
++ 						      NULL);
++-		if (unlikely(IS_ERR(dst))) {
+++		if (IS_ERR(dst)) {
++ 			ret = PTR_ERR(dst);
++ 			net_dbg_ratelimited("%s: No route to %pISpfsc, error %d\n",
++ 					    wg->dev->name, &endpoint->addr, ret);
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0118-wireguard-socket-remove-bogus-__be32-annotation.patch b/target/linux/generic/backport-5.4/080-wireguard-0118-wireguard-socket-remove-bogus-__be32-annotation.patch
+new file mode 100644
+index 0000000000..1796f54de9
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0118-wireguard-socket-remove-bogus-__be32-annotation.patch
+@@ -0,0 +1,52 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Jann Horn <jannh@google.com>
++Date: Mon, 22 Feb 2021 17:25:44 +0100
++Subject: [PATCH] wireguard: socket: remove bogus __be32 annotation
++
++commit 7f57bd8dc22de35ddd895294aa554003e4f19a72 upstream.
++
++The endpoint->src_if4 has nothing to do with fixed-endian numbers; remove
++the bogus annotation.
++
++This was introduced in
++https://git.zx2c4.com/wireguard-monolithic-historical/commit?id=14e7d0a499a676ec55176c0de2f9fcbd34074a82
++in the historical WireGuard repo because the old code used to
++zero-initialize multiple members as follows:
++
++    endpoint->src4.s_addr = endpoint->src_if4 = fl.saddr = 0;
++
++Because fl.saddr is fixed-endian and an assignment returns a value with the
++type of its left operand, this meant that sparse detected an assignment
++between values of different endianness.
++
++Since then, this assignment was already split up into separate statements;
++just the cast survived.
++
++Signed-off-by: Jann Horn <jannh@google.com>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Jakub Kicinski <kuba@kernel.org>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/socket.c | 4 ++--
++ 1 file changed, 2 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/wireguard/socket.c
+++++ b/drivers/net/wireguard/socket.c
++@@ -53,7 +53,7 @@ static int send4(struct wg_device *wg, s
++ 		if (unlikely(!inet_confirm_addr(sock_net(sock), NULL, 0,
++ 						fl.saddr, RT_SCOPE_HOST))) {
++ 			endpoint->src4.s_addr = 0;
++-			*(__force __be32 *)&endpoint->src_if4 = 0;
+++			endpoint->src_if4 = 0;
++ 			fl.saddr = 0;
++ 			if (cache)
++ 				dst_cache_reset(cache);
++@@ -63,7 +63,7 @@ static int send4(struct wg_device *wg, s
++ 			     PTR_ERR(rt) == -EINVAL) || (!IS_ERR(rt) &&
++ 			     rt->dst.dev->ifindex != endpoint->src_if4)))) {
++ 			endpoint->src4.s_addr = 0;
++-			*(__force __be32 *)&endpoint->src_if4 = 0;
+++			endpoint->src_if4 = 0;
++ 			fl.saddr = 0;
++ 			if (cache)
++ 				dst_cache_reset(cache);
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0119-wireguard-selftests-test-multiple-parallel-streams.patch b/target/linux/generic/backport-5.4/080-wireguard-0119-wireguard-selftests-test-multiple-parallel-streams.patch
+new file mode 100644
+index 0000000000..3093de45f7
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0119-wireguard-selftests-test-multiple-parallel-streams.patch
+@@ -0,0 +1,52 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Mon, 22 Feb 2021 17:25:45 +0100
++Subject: [PATCH] wireguard: selftests: test multiple parallel streams
++
++commit d5a49aa6c3e264a93a7d08485d66e346be0969dd upstream.
++
++In order to test ndo_start_xmit being called in parallel, explicitly add
++separate tests, which should all run on different cores. This should
++help tease out bugs associated with queueing up packets from different
++cores in parallel. Currently, it hasn't found those types of bugs, but
++given future planned work, this is a useful regression to avoid.
++
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Jakub Kicinski <kuba@kernel.org>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ tools/testing/selftests/wireguard/netns.sh | 15 ++++++++++++++-
++ 1 file changed, 14 insertions(+), 1 deletion(-)
++
++--- a/tools/testing/selftests/wireguard/netns.sh
+++++ b/tools/testing/selftests/wireguard/netns.sh
++@@ -39,7 +39,7 @@ ip0() { pretty 0 "ip $*"; ip -n $netns0
++ ip1() { pretty 1 "ip $*"; ip -n $netns1 "$@"; }
++ ip2() { pretty 2 "ip $*"; ip -n $netns2 "$@"; }
++ sleep() { read -t "$1" -N 1 || true; }
++-waitiperf() { pretty "${1//*-}" "wait for iperf:5201 pid $2"; while [[ $(ss -N "$1" -tlpH 'sport = 5201') != *\"iperf3\",pid=$2,fd=* ]]; do sleep 0.1; done; }
+++waitiperf() { pretty "${1//*-}" "wait for iperf:${3:-5201} pid $2"; while [[ $(ss -N "$1" -tlpH "sport = ${3:-5201}") != *\"iperf3\",pid=$2,fd=* ]]; do sleep 0.1; done; }
++ waitncatudp() { pretty "${1//*-}" "wait for udp:1111 pid $2"; while [[ $(ss -N "$1" -ulpH 'sport = 1111') != *\"ncat\",pid=$2,fd=* ]]; do sleep 0.1; done; }
++ waitiface() { pretty "${1//*-}" "wait for $2 to come up"; ip netns exec "$1" bash -c "while [[ \$(< \"/sys/class/net/$2/operstate\") != up ]]; do read -t .1 -N 0 || true; done;"; }
++ 
++@@ -141,6 +141,19 @@ tests() {
++ 	n2 iperf3 -s -1 -B fd00::2 &
++ 	waitiperf $netns2 $!
++ 	n1 iperf3 -Z -t 3 -b 0 -u -c fd00::2
+++
+++	# TCP over IPv4, in parallel
+++	for max in 4 5 50; do
+++		local pids=( )
+++		for ((i=0; i < max; ++i)) do
+++			n2 iperf3 -p $(( 5200 + i )) -s -1 -B 192.168.241.2 &
+++			pids+=( $! ); waitiperf $netns2 $! $(( 5200 + i ))
+++		done
+++		for ((i=0; i < max; ++i)) do
+++			n1 iperf3 -Z -t 3 -p $(( 5200 + i )) -c 192.168.241.2 &
+++		done
+++		wait "${pids[@]}"
+++	done
++ }
++ 
++ [[ $(ip1 link show dev wg0) =~ mtu\ ([0-9]+) ]] && orig_mtu="${BASH_REMATCH[1]}"
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0120-wireguard-peer-put-frequently-used-members-above-cac.patch b/target/linux/generic/backport-5.4/080-wireguard-0120-wireguard-peer-put-frequently-used-members-above-cac.patch
+new file mode 100644
+index 0000000000..69e76b96e3
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0120-wireguard-peer-put-frequently-used-members-above-cac.patch
+@@ -0,0 +1,42 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Mon, 22 Feb 2021 17:25:46 +0100
++Subject: [PATCH] wireguard: peer: put frequently used members above cache
++ lines
++
++commit 5a0598695634a6bb4126818902dd9140cd9df8b6 upstream.
++
++The is_dead boolean is checked for every single packet, while the
++internal_id member is used basically only for pr_debug messages. So it
++makes sense to hoist up is_dead into some space formerly unused by a
++struct hole, while demoting internal_api to below the lowest struct
++cache line.
++
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Jakub Kicinski <kuba@kernel.org>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/peer.h | 4 ++--
++ 1 file changed, 2 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/wireguard/peer.h
+++++ b/drivers/net/wireguard/peer.h
++@@ -39,6 +39,7 @@ struct wg_peer {
++ 	struct crypt_queue tx_queue, rx_queue;
++ 	struct sk_buff_head staged_packet_queue;
++ 	int serial_work_cpu;
+++	bool is_dead;
++ 	struct noise_keypairs keypairs;
++ 	struct endpoint endpoint;
++ 	struct dst_cache endpoint_cache;
++@@ -61,9 +62,8 @@ struct wg_peer {
++ 	struct rcu_head rcu;
++ 	struct list_head peer_list;
++ 	struct list_head allowedips_list;
++-	u64 internal_id;
++ 	struct napi_struct napi;
++-	bool is_dead;
+++	u64 internal_id;
++ };
++ 
++ struct wg_peer *wg_peer_create(struct wg_device *wg,
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0121-wireguard-device-do-not-generate-ICMP-for-non-IP-pac.patch b/target/linux/generic/backport-5.4/080-wireguard-0121-wireguard-device-do-not-generate-ICMP-for-non-IP-pac.patch
+new file mode 100644
+index 0000000000..073ee9b0d5
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0121-wireguard-device-do-not-generate-ICMP-for-non-IP-pac.patch
+@@ -0,0 +1,47 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Mon, 22 Feb 2021 17:25:47 +0100
++Subject: [PATCH] wireguard: device: do not generate ICMP for non-IP packets
++
++commit 99fff5264e7ab06f45b0ad60243475be0a8d0559 upstream.
++
++If skb->protocol doesn't match the actual skb->data header, it's
++probably not a good idea to pass it off to icmp{,v6}_ndo_send, which is
++expecting to reply to a valid IP packet. So this commit has that early
++mismatch case jump to a later error label.
++
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Jakub Kicinski <kuba@kernel.org>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/device.c | 7 ++++---
++ 1 file changed, 4 insertions(+), 3 deletions(-)
++
++--- a/drivers/net/wireguard/device.c
+++++ b/drivers/net/wireguard/device.c
++@@ -138,7 +138,7 @@ static netdev_tx_t wg_xmit(struct sk_buf
++ 		else if (skb->protocol == htons(ETH_P_IPV6))
++ 			net_dbg_ratelimited("%s: No peer has allowed IPs matching %pI6\n",
++ 					    dev->name, &ipv6_hdr(skb)->daddr);
++-		goto err;
+++		goto err_icmp;
++ 	}
++ 
++ 	family = READ_ONCE(peer->endpoint.addr.sa_family);
++@@ -201,12 +201,13 @@ static netdev_tx_t wg_xmit(struct sk_buf
++ 
++ err_peer:
++ 	wg_peer_put(peer);
++-err:
++-	++dev->stats.tx_errors;
+++err_icmp:
++ 	if (skb->protocol == htons(ETH_P_IP))
++ 		icmp_ndo_send(skb, ICMP_DEST_UNREACH, ICMP_HOST_UNREACH, 0);
++ 	else if (skb->protocol == htons(ETH_P_IPV6))
++ 		icmpv6_ndo_send(skb, ICMPV6_DEST_UNREACH, ICMPV6_ADDR_UNREACH, 0);
+++err:
+++	++dev->stats.tx_errors;
++ 	kfree_skb(skb);
++ 	return ret;
++ }
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0122-wireguard-queueing-get-rid-of-per-peer-ring-buffers.patch b/target/linux/generic/backport-5.4/080-wireguard-0122-wireguard-queueing-get-rid-of-per-peer-ring-buffers.patch
+new file mode 100644
+index 0000000000..9dc7ddae7f
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0122-wireguard-queueing-get-rid-of-per-peer-ring-buffers.patch
+@@ -0,0 +1,560 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Mon, 22 Feb 2021 17:25:48 +0100
++Subject: [PATCH] wireguard: queueing: get rid of per-peer ring buffers
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++commit 8b5553ace83cced775eefd0f3f18b5c6214ccf7a upstream.
++
++Having two ring buffers per-peer means that every peer results in two
++massive ring allocations. On an 8-core x86_64 machine, this commit
++reduces the per-peer allocation from 18,688 bytes to 1,856 bytes, which
++is an 90% reduction. Ninety percent! With some single-machine
++deployments approaching 500,000 peers, we're talking about a reduction
++from 7 gigs of memory down to 700 megs of memory.
++
++In order to get rid of these per-peer allocations, this commit switches
++to using a list-based queueing approach. Currently GSO fragments are
++chained together using the skb->next pointer (the skb_list_* singly
++linked list approach), so we form the per-peer queue around the unused
++skb->prev pointer (which sort of makes sense because the links are
++pointing backwards). Use of skb_queue_* is not possible here, because
++that is based on doubly linked lists and spinlocks. Multiple cores can
++write into the queue at any given time, because its writes occur in the
++start_xmit path or in the udp_recv path. But reads happen in a single
++workqueue item per-peer, amounting to a multi-producer, single-consumer
++paradigm.
++
++The MPSC queue is implemented locklessly and never blocks. However, it
++is not linearizable (though it is serializable), with a very tight and
++unlikely race on writes, which, when hit (some tiny fraction of the
++0.15% of partial adds on a fully loaded 16-core x86_64 system), causes
++the queue reader to terminate early. However, because every packet sent
++queues up the same workqueue item after it is fully added, the worker
++resumes again, and stopping early isn't actually a problem, since at
++that point the packet wouldn't have yet been added to the encryption
++queue. These properties allow us to avoid disabling interrupts or
++spinning. The design is based on Dmitry Vyukov's algorithm [1].
++
++Performance-wise, ordinarily list-based queues aren't preferable to
++ringbuffers, because of cache misses when following pointers around.
++However, we *already* have to follow the adjacent pointers when working
++through fragments, so there shouldn't actually be any change there. A
++potential downside is that dequeueing is a bit more complicated, but the
++ptr_ring structure used prior had a spinlock when dequeueing, so all and
++all the difference appears to be a wash.
++
++Actually, from profiling, the biggest performance hit, by far, of this
++commit winds up being atomic_add_unless(count, 1, max) and atomic_
++dec(count), which account for the majority of CPU time, according to
++perf. In that sense, the previous ring buffer was superior in that it
++could check if it was full by head==tail, which the list-based approach
++cannot do.
++
++But all and all, this enables us to get massive memory savings, allowing
++WireGuard to scale for real world deployments, without taking much of a
++performance hit.
++
++[1] http://www.1024cores.net/home/lock-free-algorithms/queues/intrusive-mpsc-node-based-queue
++
++Reviewed-by: Dmitry Vyukov <dvyukov@google.com>
++Reviewed-by: Toke Høiland-Jørgensen <toke@redhat.com>
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Jakub Kicinski <kuba@kernel.org>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/device.c   | 12 ++---
++ drivers/net/wireguard/device.h   | 15 +++---
++ drivers/net/wireguard/peer.c     | 28 ++++-------
++ drivers/net/wireguard/peer.h     |  4 +-
++ drivers/net/wireguard/queueing.c | 86 +++++++++++++++++++++++++-------
++ drivers/net/wireguard/queueing.h | 45 ++++++++++++-----
++ drivers/net/wireguard/receive.c  | 16 +++---
++ drivers/net/wireguard/send.c     | 31 ++++--------
++ 8 files changed, 144 insertions(+), 93 deletions(-)
++
++--- a/drivers/net/wireguard/device.c
+++++ b/drivers/net/wireguard/device.c
++@@ -235,8 +235,8 @@ static void wg_destruct(struct net_devic
++ 	destroy_workqueue(wg->handshake_receive_wq);
++ 	destroy_workqueue(wg->handshake_send_wq);
++ 	destroy_workqueue(wg->packet_crypt_wq);
++-	wg_packet_queue_free(&wg->decrypt_queue, true);
++-	wg_packet_queue_free(&wg->encrypt_queue, true);
+++	wg_packet_queue_free(&wg->decrypt_queue);
+++	wg_packet_queue_free(&wg->encrypt_queue);
++ 	rcu_barrier(); /* Wait for all the peers to be actually freed. */
++ 	wg_ratelimiter_uninit();
++ 	memzero_explicit(&wg->static_identity, sizeof(wg->static_identity));
++@@ -338,12 +338,12 @@ static int wg_newlink(struct net *src_ne
++ 		goto err_destroy_handshake_send;
++ 
++ 	ret = wg_packet_queue_init(&wg->encrypt_queue, wg_packet_encrypt_worker,
++-				   true, MAX_QUEUED_PACKETS);
+++				   MAX_QUEUED_PACKETS);
++ 	if (ret < 0)
++ 		goto err_destroy_packet_crypt;
++ 
++ 	ret = wg_packet_queue_init(&wg->decrypt_queue, wg_packet_decrypt_worker,
++-				   true, MAX_QUEUED_PACKETS);
+++				   MAX_QUEUED_PACKETS);
++ 	if (ret < 0)
++ 		goto err_free_encrypt_queue;
++ 
++@@ -368,9 +368,9 @@ static int wg_newlink(struct net *src_ne
++ err_uninit_ratelimiter:
++ 	wg_ratelimiter_uninit();
++ err_free_decrypt_queue:
++-	wg_packet_queue_free(&wg->decrypt_queue, true);
+++	wg_packet_queue_free(&wg->decrypt_queue);
++ err_free_encrypt_queue:
++-	wg_packet_queue_free(&wg->encrypt_queue, true);
+++	wg_packet_queue_free(&wg->encrypt_queue);
++ err_destroy_packet_crypt:
++ 	destroy_workqueue(wg->packet_crypt_wq);
++ err_destroy_handshake_send:
++--- a/drivers/net/wireguard/device.h
+++++ b/drivers/net/wireguard/device.h
++@@ -27,13 +27,14 @@ struct multicore_worker {
++ 
++ struct crypt_queue {
++ 	struct ptr_ring ring;
++-	union {
++-		struct {
++-			struct multicore_worker __percpu *worker;
++-			int last_cpu;
++-		};
++-		struct work_struct work;
++-	};
+++	struct multicore_worker __percpu *worker;
+++	int last_cpu;
+++};
+++
+++struct prev_queue {
+++	struct sk_buff *head, *tail, *peeked;
+++	struct { struct sk_buff *next, *prev; } empty; // Match first 2 members of struct sk_buff.
+++	atomic_t count;
++ };
++ 
++ struct wg_device {
++--- a/drivers/net/wireguard/peer.c
+++++ b/drivers/net/wireguard/peer.c
++@@ -32,27 +32,22 @@ struct wg_peer *wg_peer_create(struct wg
++ 	peer = kzalloc(sizeof(*peer), GFP_KERNEL);
++ 	if (unlikely(!peer))
++ 		return ERR_PTR(ret);
++-	peer->device = wg;
+++	if (dst_cache_init(&peer->endpoint_cache, GFP_KERNEL))
+++		goto err;
++ 
+++	peer->device = wg;
++ 	wg_noise_handshake_init(&peer->handshake, &wg->static_identity,
++ 				public_key, preshared_key, peer);
++-	if (dst_cache_init(&peer->endpoint_cache, GFP_KERNEL))
++-		goto err_1;
++-	if (wg_packet_queue_init(&peer->tx_queue, wg_packet_tx_worker, false,
++-				 MAX_QUEUED_PACKETS))
++-		goto err_2;
++-	if (wg_packet_queue_init(&peer->rx_queue, NULL, false,
++-				 MAX_QUEUED_PACKETS))
++-		goto err_3;
++-
++ 	peer->internal_id = atomic64_inc_return(&peer_counter);
++ 	peer->serial_work_cpu = nr_cpumask_bits;
++ 	wg_cookie_init(&peer->latest_cookie);
++ 	wg_timers_init(peer);
++ 	wg_cookie_checker_precompute_peer_keys(peer);
++ 	spin_lock_init(&peer->keypairs.keypair_update_lock);
++-	INIT_WORK(&peer->transmit_handshake_work,
++-		  wg_packet_handshake_send_worker);
+++	INIT_WORK(&peer->transmit_handshake_work, wg_packet_handshake_send_worker);
+++	INIT_WORK(&peer->transmit_packet_work, wg_packet_tx_worker);
+++	wg_prev_queue_init(&peer->tx_queue);
+++	wg_prev_queue_init(&peer->rx_queue);
++ 	rwlock_init(&peer->endpoint_lock);
++ 	kref_init(&peer->refcount);
++ 	skb_queue_head_init(&peer->staged_packet_queue);
++@@ -68,11 +63,7 @@ struct wg_peer *wg_peer_create(struct wg
++ 	pr_debug("%s: Peer %llu created\n", wg->dev->name, peer->internal_id);
++ 	return peer;
++ 
++-err_3:
++-	wg_packet_queue_free(&peer->tx_queue, false);
++-err_2:
++-	dst_cache_destroy(&peer->endpoint_cache);
++-err_1:
+++err:
++ 	kfree(peer);
++ 	return ERR_PTR(ret);
++ }
++@@ -197,8 +188,7 @@ static void rcu_release(struct rcu_head
++ 	struct wg_peer *peer = container_of(rcu, struct wg_peer, rcu);
++ 
++ 	dst_cache_destroy(&peer->endpoint_cache);
++-	wg_packet_queue_free(&peer->rx_queue, false);
++-	wg_packet_queue_free(&peer->tx_queue, false);
+++	WARN_ON(wg_prev_queue_peek(&peer->tx_queue) || wg_prev_queue_peek(&peer->rx_queue));
++ 
++ 	/* The final zeroing takes care of clearing any remaining handshake key
++ 	 * material and other potentially sensitive information.
++--- a/drivers/net/wireguard/peer.h
+++++ b/drivers/net/wireguard/peer.h
++@@ -36,7 +36,7 @@ struct endpoint {
++ 
++ struct wg_peer {
++ 	struct wg_device *device;
++-	struct crypt_queue tx_queue, rx_queue;
+++	struct prev_queue tx_queue, rx_queue;
++ 	struct sk_buff_head staged_packet_queue;
++ 	int serial_work_cpu;
++ 	bool is_dead;
++@@ -46,7 +46,7 @@ struct wg_peer {
++ 	rwlock_t endpoint_lock;
++ 	struct noise_handshake handshake;
++ 	atomic64_t last_sent_handshake;
++-	struct work_struct transmit_handshake_work, clear_peer_work;
+++	struct work_struct transmit_handshake_work, clear_peer_work, transmit_packet_work;
++ 	struct cookie latest_cookie;
++ 	struct hlist_node pubkey_hash;
++ 	u64 rx_bytes, tx_bytes;
++--- a/drivers/net/wireguard/queueing.c
+++++ b/drivers/net/wireguard/queueing.c
++@@ -9,8 +9,7 @@ struct multicore_worker __percpu *
++ wg_packet_percpu_multicore_worker_alloc(work_func_t function, void *ptr)
++ {
++ 	int cpu;
++-	struct multicore_worker __percpu *worker =
++-		alloc_percpu(struct multicore_worker);
+++	struct multicore_worker __percpu *worker = alloc_percpu(struct multicore_worker);
++ 
++ 	if (!worker)
++ 		return NULL;
++@@ -23,7 +22,7 @@ wg_packet_percpu_multicore_worker_alloc(
++ }
++ 
++ int wg_packet_queue_init(struct crypt_queue *queue, work_func_t function,
++-			 bool multicore, unsigned int len)
+++			 unsigned int len)
++ {
++ 	int ret;
++ 
++@@ -31,25 +30,78 @@ int wg_packet_queue_init(struct crypt_qu
++ 	ret = ptr_ring_init(&queue->ring, len, GFP_KERNEL);
++ 	if (ret)
++ 		return ret;
++-	if (function) {
++-		if (multicore) {
++-			queue->worker = wg_packet_percpu_multicore_worker_alloc(
++-				function, queue);
++-			if (!queue->worker) {
++-				ptr_ring_cleanup(&queue->ring, NULL);
++-				return -ENOMEM;
++-			}
++-		} else {
++-			INIT_WORK(&queue->work, function);
++-		}
+++	queue->worker = wg_packet_percpu_multicore_worker_alloc(function, queue);
+++	if (!queue->worker) {
+++		ptr_ring_cleanup(&queue->ring, NULL);
+++		return -ENOMEM;
++ 	}
++ 	return 0;
++ }
++ 
++-void wg_packet_queue_free(struct crypt_queue *queue, bool multicore)
+++void wg_packet_queue_free(struct crypt_queue *queue)
++ {
++-	if (multicore)
++-		free_percpu(queue->worker);
+++	free_percpu(queue->worker);
++ 	WARN_ON(!__ptr_ring_empty(&queue->ring));
++ 	ptr_ring_cleanup(&queue->ring, NULL);
++ }
+++
+++#define NEXT(skb) ((skb)->prev)
+++#define STUB(queue) ((struct sk_buff *)&queue->empty)
+++
+++void wg_prev_queue_init(struct prev_queue *queue)
+++{
+++	NEXT(STUB(queue)) = NULL;
+++	queue->head = queue->tail = STUB(queue);
+++	queue->peeked = NULL;
+++	atomic_set(&queue->count, 0);
+++	BUILD_BUG_ON(
+++		offsetof(struct sk_buff, next) != offsetof(struct prev_queue, empty.next) -
+++							offsetof(struct prev_queue, empty) ||
+++		offsetof(struct sk_buff, prev) != offsetof(struct prev_queue, empty.prev) -
+++							 offsetof(struct prev_queue, empty));
+++}
+++
+++static void __wg_prev_queue_enqueue(struct prev_queue *queue, struct sk_buff *skb)
+++{
+++	WRITE_ONCE(NEXT(skb), NULL);
+++	WRITE_ONCE(NEXT(xchg_release(&queue->head, skb)), skb);
+++}
+++
+++bool wg_prev_queue_enqueue(struct prev_queue *queue, struct sk_buff *skb)
+++{
+++	if (!atomic_add_unless(&queue->count, 1, MAX_QUEUED_PACKETS))
+++		return false;
+++	__wg_prev_queue_enqueue(queue, skb);
+++	return true;
+++}
+++
+++struct sk_buff *wg_prev_queue_dequeue(struct prev_queue *queue)
+++{
+++	struct sk_buff *tail = queue->tail, *next = smp_load_acquire(&NEXT(tail));
+++
+++	if (tail == STUB(queue)) {
+++		if (!next)
+++			return NULL;
+++		queue->tail = next;
+++		tail = next;
+++		next = smp_load_acquire(&NEXT(next));
+++	}
+++	if (next) {
+++		queue->tail = next;
+++		atomic_dec(&queue->count);
+++		return tail;
+++	}
+++	if (tail != READ_ONCE(queue->head))
+++		return NULL;
+++	__wg_prev_queue_enqueue(queue, STUB(queue));
+++	next = smp_load_acquire(&NEXT(tail));
+++	if (next) {
+++		queue->tail = next;
+++		atomic_dec(&queue->count);
+++		return tail;
+++	}
+++	return NULL;
+++}
+++
+++#undef NEXT
+++#undef STUB
++--- a/drivers/net/wireguard/queueing.h
+++++ b/drivers/net/wireguard/queueing.h
++@@ -17,12 +17,13 @@ struct wg_device;
++ struct wg_peer;
++ struct multicore_worker;
++ struct crypt_queue;
+++struct prev_queue;
++ struct sk_buff;
++ 
++ /* queueing.c APIs: */
++ int wg_packet_queue_init(struct crypt_queue *queue, work_func_t function,
++-			 bool multicore, unsigned int len);
++-void wg_packet_queue_free(struct crypt_queue *queue, bool multicore);
+++			 unsigned int len);
+++void wg_packet_queue_free(struct crypt_queue *queue);
++ struct multicore_worker __percpu *
++ wg_packet_percpu_multicore_worker_alloc(work_func_t function, void *ptr);
++ 
++@@ -135,8 +136,31 @@ static inline int wg_cpumask_next_online
++ 	return cpu;
++ }
++ 
+++void wg_prev_queue_init(struct prev_queue *queue);
+++
+++/* Multi producer */
+++bool wg_prev_queue_enqueue(struct prev_queue *queue, struct sk_buff *skb);
+++
+++/* Single consumer */
+++struct sk_buff *wg_prev_queue_dequeue(struct prev_queue *queue);
+++
+++/* Single consumer */
+++static inline struct sk_buff *wg_prev_queue_peek(struct prev_queue *queue)
+++{
+++	if (queue->peeked)
+++		return queue->peeked;
+++	queue->peeked = wg_prev_queue_dequeue(queue);
+++	return queue->peeked;
+++}
+++
+++/* Single consumer */
+++static inline void wg_prev_queue_drop_peeked(struct prev_queue *queue)
+++{
+++	queue->peeked = NULL;
+++}
+++
++ static inline int wg_queue_enqueue_per_device_and_peer(
++-	struct crypt_queue *device_queue, struct crypt_queue *peer_queue,
+++	struct crypt_queue *device_queue, struct prev_queue *peer_queue,
++ 	struct sk_buff *skb, struct workqueue_struct *wq, int *next_cpu)
++ {
++ 	int cpu;
++@@ -145,8 +169,9 @@ static inline int wg_queue_enqueue_per_d
++ 	/* We first queue this up for the peer ingestion, but the consumer
++ 	 * will wait for the state to change to CRYPTED or DEAD before.
++ 	 */
++-	if (unlikely(ptr_ring_produce_bh(&peer_queue->ring, skb)))
+++	if (unlikely(!wg_prev_queue_enqueue(peer_queue, skb)))
++ 		return -ENOSPC;
+++
++ 	/* Then we queue it up in the device queue, which consumes the
++ 	 * packet as soon as it can.
++ 	 */
++@@ -157,9 +182,7 @@ static inline int wg_queue_enqueue_per_d
++ 	return 0;
++ }
++ 
++-static inline void wg_queue_enqueue_per_peer(struct crypt_queue *queue,
++-					     struct sk_buff *skb,
++-					     enum packet_state state)
+++static inline void wg_queue_enqueue_per_peer_tx(struct sk_buff *skb, enum packet_state state)
++ {
++ 	/* We take a reference, because as soon as we call atomic_set, the
++ 	 * peer can be freed from below us.
++@@ -167,14 +190,12 @@ static inline void wg_queue_enqueue_per_
++ 	struct wg_peer *peer = wg_peer_get(PACKET_PEER(skb));
++ 
++ 	atomic_set_release(&PACKET_CB(skb)->state, state);
++-	queue_work_on(wg_cpumask_choose_online(&peer->serial_work_cpu,
++-					       peer->internal_id),
++-		      peer->device->packet_crypt_wq, &queue->work);
+++	queue_work_on(wg_cpumask_choose_online(&peer->serial_work_cpu, peer->internal_id),
+++		      peer->device->packet_crypt_wq, &peer->transmit_packet_work);
++ 	wg_peer_put(peer);
++ }
++ 
++-static inline void wg_queue_enqueue_per_peer_napi(struct sk_buff *skb,
++-						  enum packet_state state)
+++static inline void wg_queue_enqueue_per_peer_rx(struct sk_buff *skb, enum packet_state state)
++ {
++ 	/* We take a reference, because as soon as we call atomic_set, the
++ 	 * peer can be freed from below us.
++--- a/drivers/net/wireguard/receive.c
+++++ b/drivers/net/wireguard/receive.c
++@@ -444,7 +444,6 @@ packet_processed:
++ int wg_packet_rx_poll(struct napi_struct *napi, int budget)
++ {
++ 	struct wg_peer *peer = container_of(napi, struct wg_peer, napi);
++-	struct crypt_queue *queue = &peer->rx_queue;
++ 	struct noise_keypair *keypair;
++ 	struct endpoint endpoint;
++ 	enum packet_state state;
++@@ -455,11 +454,10 @@ int wg_packet_rx_poll(struct napi_struct
++ 	if (unlikely(budget <= 0))
++ 		return 0;
++ 
++-	while ((skb = __ptr_ring_peek(&queue->ring)) != NULL &&
+++	while ((skb = wg_prev_queue_peek(&peer->rx_queue)) != NULL &&
++ 	       (state = atomic_read_acquire(&PACKET_CB(skb)->state)) !=
++ 		       PACKET_STATE_UNCRYPTED) {
++-		__ptr_ring_discard_one(&queue->ring);
++-		peer = PACKET_PEER(skb);
+++		wg_prev_queue_drop_peeked(&peer->rx_queue);
++ 		keypair = PACKET_CB(skb)->keypair;
++ 		free = true;
++ 
++@@ -508,7 +506,7 @@ void wg_packet_decrypt_worker(struct wor
++ 		enum packet_state state =
++ 			likely(decrypt_packet(skb, PACKET_CB(skb)->keypair)) ?
++ 				PACKET_STATE_CRYPTED : PACKET_STATE_DEAD;
++-		wg_queue_enqueue_per_peer_napi(skb, state);
+++		wg_queue_enqueue_per_peer_rx(skb, state);
++ 		if (need_resched())
++ 			cond_resched();
++ 	}
++@@ -531,12 +529,10 @@ static void wg_packet_consume_data(struc
++ 	if (unlikely(READ_ONCE(peer->is_dead)))
++ 		goto err;
++ 
++-	ret = wg_queue_enqueue_per_device_and_peer(&wg->decrypt_queue,
++-						   &peer->rx_queue, skb,
++-						   wg->packet_crypt_wq,
++-						   &wg->decrypt_queue.last_cpu);
+++	ret = wg_queue_enqueue_per_device_and_peer(&wg->decrypt_queue, &peer->rx_queue, skb,
+++						   wg->packet_crypt_wq, &wg->decrypt_queue.last_cpu);
++ 	if (unlikely(ret == -EPIPE))
++-		wg_queue_enqueue_per_peer_napi(skb, PACKET_STATE_DEAD);
+++		wg_queue_enqueue_per_peer_rx(skb, PACKET_STATE_DEAD);
++ 	if (likely(!ret || ret == -EPIPE)) {
++ 		rcu_read_unlock_bh();
++ 		return;
++--- a/drivers/net/wireguard/send.c
+++++ b/drivers/net/wireguard/send.c
++@@ -239,8 +239,7 @@ void wg_packet_send_keepalive(struct wg_
++ 	wg_packet_send_staged_packets(peer);
++ }
++ 
++-static void wg_packet_create_data_done(struct sk_buff *first,
++-				       struct wg_peer *peer)
+++static void wg_packet_create_data_done(struct wg_peer *peer, struct sk_buff *first)
++ {
++ 	struct sk_buff *skb, *next;
++ 	bool is_keepalive, data_sent = false;
++@@ -262,22 +261,19 @@ static void wg_packet_create_data_done(s
++ 
++ void wg_packet_tx_worker(struct work_struct *work)
++ {
++-	struct crypt_queue *queue = container_of(work, struct crypt_queue,
++-						 work);
+++	struct wg_peer *peer = container_of(work, struct wg_peer, transmit_packet_work);
++ 	struct noise_keypair *keypair;
++ 	enum packet_state state;
++ 	struct sk_buff *first;
++-	struct wg_peer *peer;
++ 
++-	while ((first = __ptr_ring_peek(&queue->ring)) != NULL &&
+++	while ((first = wg_prev_queue_peek(&peer->tx_queue)) != NULL &&
++ 	       (state = atomic_read_acquire(&PACKET_CB(first)->state)) !=
++ 		       PACKET_STATE_UNCRYPTED) {
++-		__ptr_ring_discard_one(&queue->ring);
++-		peer = PACKET_PEER(first);
+++		wg_prev_queue_drop_peeked(&peer->tx_queue);
++ 		keypair = PACKET_CB(first)->keypair;
++ 
++ 		if (likely(state == PACKET_STATE_CRYPTED))
++-			wg_packet_create_data_done(first, peer);
+++			wg_packet_create_data_done(peer, first);
++ 		else
++ 			kfree_skb_list(first);
++ 
++@@ -306,16 +302,14 @@ void wg_packet_encrypt_worker(struct wor
++ 				break;
++ 			}
++ 		}
++-		wg_queue_enqueue_per_peer(&PACKET_PEER(first)->tx_queue, first,
++-					  state);
+++		wg_queue_enqueue_per_peer_tx(first, state);
++ 		if (need_resched())
++ 			cond_resched();
++ 	}
++ }
++ 
++-static void wg_packet_create_data(struct sk_buff *first)
+++static void wg_packet_create_data(struct wg_peer *peer, struct sk_buff *first)
++ {
++-	struct wg_peer *peer = PACKET_PEER(first);
++ 	struct wg_device *wg = peer->device;
++ 	int ret = -EINVAL;
++ 
++@@ -323,13 +317,10 @@ static void wg_packet_create_data(struct
++ 	if (unlikely(READ_ONCE(peer->is_dead)))
++ 		goto err;
++ 
++-	ret = wg_queue_enqueue_per_device_and_peer(&wg->encrypt_queue,
++-						   &peer->tx_queue, first,
++-						   wg->packet_crypt_wq,
++-						   &wg->encrypt_queue.last_cpu);
+++	ret = wg_queue_enqueue_per_device_and_peer(&wg->encrypt_queue, &peer->tx_queue, first,
+++						   wg->packet_crypt_wq, &wg->encrypt_queue.last_cpu);
++ 	if (unlikely(ret == -EPIPE))
++-		wg_queue_enqueue_per_peer(&peer->tx_queue, first,
++-					  PACKET_STATE_DEAD);
+++		wg_queue_enqueue_per_peer_tx(first, PACKET_STATE_DEAD);
++ err:
++ 	rcu_read_unlock_bh();
++ 	if (likely(!ret || ret == -EPIPE))
++@@ -393,7 +384,7 @@ void wg_packet_send_staged_packets(struc
++ 	packets.prev->next = NULL;
++ 	wg_peer_get(keypair->entry.peer);
++ 	PACKET_CB(packets.next)->keypair = keypair;
++-	wg_packet_create_data(packets.next);
+++	wg_packet_create_data(peer, packets.next);
++ 	return;
++ 
++ out_invalid:
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0123-wireguard-kconfig-use-arm-chacha-even-with-no-neon.patch b/target/linux/generic/backport-5.4/080-wireguard-0123-wireguard-kconfig-use-arm-chacha-even-with-no-neon.patch
+new file mode 100644
+index 0000000000..9a251492c2
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0123-wireguard-kconfig-use-arm-chacha-even-with-no-neon.patch
+@@ -0,0 +1,30 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Mon, 22 Feb 2021 17:25:49 +0100
++Subject: [PATCH] wireguard: kconfig: use arm chacha even with no neon
++
++commit bce2473927af8de12ad131a743f55d69d358c0b9 upstream.
++
++The condition here was incorrect: a non-neon fallback implementation is
++available on arm32 when NEON is not supported.
++
++Reported-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Jakub Kicinski <kuba@kernel.org>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/Kconfig | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/net/Kconfig
+++++ b/drivers/net/Kconfig
++@@ -87,7 +87,7 @@ config WIREGUARD
++ 	select CRYPTO_CURVE25519_X86 if X86 && 64BIT
++ 	select ARM_CRYPTO if ARM
++ 	select ARM64_CRYPTO if ARM64
++-	select CRYPTO_CHACHA20_NEON if (ARM || ARM64) && KERNEL_MODE_NEON
+++	select CRYPTO_CHACHA20_NEON if ARM || (ARM64 && KERNEL_MODE_NEON)
++ 	select CRYPTO_POLY1305_NEON if ARM64 && KERNEL_MODE_NEON
++ 	select CRYPTO_POLY1305_ARM if ARM
++ 	select CRYPTO_CURVE25519_NEON if ARM && KERNEL_MODE_NEON
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0124-crypto-mips-poly1305-enable-for-all-MIPS-processors.patch b/target/linux/generic/backport-5.4/080-wireguard-0124-crypto-mips-poly1305-enable-for-all-MIPS-processors.patch
+new file mode 100644
+index 0000000000..c0ee841b02
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0124-crypto-mips-poly1305-enable-for-all-MIPS-processors.patch
+@@ -0,0 +1,60 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Maciej W. Rozycki" <macro@orcam.me.uk>
++Date: Thu, 11 Mar 2021 21:50:47 -0700
++Subject: [PATCH] crypto: mips/poly1305 - enable for all MIPS processors
++
++commit 6c810cf20feef0d4338e9b424ab7f2644a8b353e upstream.
++
++The MIPS Poly1305 implementation is generic MIPS code written such as to
++support down to the original MIPS I and MIPS III ISA for the 32-bit and
++64-bit variant respectively.  Lift the current limitation then to enable
++code for MIPSr1 ISA or newer processors only and have it available for
++all MIPS processors.
++
++Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
++Fixes: a11d055e7a64 ("crypto: mips/poly1305 - incorporate OpenSSL/CRYPTOGAMS optimized implementation")
++Cc: stable@vger.kernel.org # v5.5+
++Acked-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/mips/crypto/Makefile | 4 ++--
++ crypto/Kconfig            | 2 +-
++ drivers/net/Kconfig       | 2 +-
++ 3 files changed, 4 insertions(+), 4 deletions(-)
++
++--- a/arch/mips/crypto/Makefile
+++++ b/arch/mips/crypto/Makefile
++@@ -12,8 +12,8 @@ AFLAGS_chacha-core.o += -O2 # needed to
++ obj-$(CONFIG_CRYPTO_POLY1305_MIPS) += poly1305-mips.o
++ poly1305-mips-y := poly1305-core.o poly1305-glue.o
++ 
++-perlasm-flavour-$(CONFIG_CPU_MIPS32) := o32
++-perlasm-flavour-$(CONFIG_CPU_MIPS64) := 64
+++perlasm-flavour-$(CONFIG_32BIT) := o32
+++perlasm-flavour-$(CONFIG_64BIT) := 64
++ 
++ quiet_cmd_perlasm = PERLASM $@
++       cmd_perlasm = $(PERL) $(<) $(perlasm-flavour-y) $(@)
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -740,7 +740,7 @@ config CRYPTO_POLY1305_X86_64
++ 
++ config CRYPTO_POLY1305_MIPS
++ 	tristate "Poly1305 authenticator algorithm (MIPS optimized)"
++-	depends on CPU_MIPS32 || (CPU_MIPS64 && 64BIT)
+++	depends on MIPS
++ 	select CRYPTO_ARCH_HAVE_LIB_POLY1305
++ 
++ config CRYPTO_MD4
++--- a/drivers/net/Kconfig
+++++ b/drivers/net/Kconfig
++@@ -92,7 +92,7 @@ config WIREGUARD
++ 	select CRYPTO_POLY1305_ARM if ARM
++ 	select CRYPTO_CURVE25519_NEON if ARM && KERNEL_MODE_NEON
++ 	select CRYPTO_CHACHA_MIPS if CPU_MIPS32_R2
++-	select CRYPTO_POLY1305_MIPS if CPU_MIPS32 || (CPU_MIPS64 && 64BIT)
+++	select CRYPTO_POLY1305_MIPS if MIPS
++ 	help
++ 	  WireGuard is a secure, fast, and easy to use replacement for IPSec
++ 	  that uses modern cryptography and clever networking tricks. It's
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0125-crypto-mips-add-poly1305-core.S-to-.gitignore.patch b/target/linux/generic/backport-5.4/080-wireguard-0125-crypto-mips-add-poly1305-core.S-to-.gitignore.patch
+new file mode 100644
+index 0000000000..856d67d5b8
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0125-crypto-mips-add-poly1305-core.S-to-.gitignore.patch
+@@ -0,0 +1,24 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
++Date: Sat, 27 Mar 2021 19:39:43 -0700
++Subject: [PATCH] crypto: mips: add poly1305-core.S to .gitignore
++
++commit dc92d0df51dc61de88bf6f4884a17bf73d5c6326 upstream.
++
++poly1305-core.S is an auto-generated file, so it should be ignored.
++
++Fixes: a11d055e7a64 ("crypto: mips/poly1305 - incorporate OpenSSL/CRYPTOGAMS optimized implementation")
++Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
++Cc: Ard Biesheuvel <ardb@kernel.org>
++Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/mips/crypto/.gitignore | 2 ++
++ 1 file changed, 2 insertions(+)
++ create mode 100644 arch/mips/crypto/.gitignore
++
++--- /dev/null
+++++ b/arch/mips/crypto/.gitignore
++@@ -0,0 +1,2 @@
+++# SPDX-License-Identifier: GPL-2.0-only
+++poly1305-core.S
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0126-crypto-poly1305-fix-poly1305_core_setkey-declaration.patch b/target/linux/generic/backport-5.4/080-wireguard-0126-crypto-poly1305-fix-poly1305_core_setkey-declaration.patch
+new file mode 100644
+index 0000000000..ded6625aeb
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0126-crypto-poly1305-fix-poly1305_core_setkey-declaration.patch
+@@ -0,0 +1,172 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: Arnd Bergmann <arnd@arndb.de>
++Date: Mon, 22 Mar 2021 18:05:15 +0100
++Subject: [PATCH] crypto: poly1305 - fix poly1305_core_setkey() declaration
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++commit 8d195e7a8ada68928f2aedb2c18302a4518fe68e upstream.
++
++gcc-11 points out a mismatch between the declaration and the definition
++of poly1305_core_setkey():
++
++lib/crypto/poly1305-donna32.c:13:67: error: argument 2 of type ‘const u8[16]’ {aka ‘const unsigned char[16]’} with mismatched bound [-Werror=array-parameter=]
++   13 | void poly1305_core_setkey(struct poly1305_core_key *key, const u8 raw_key[16])
++      |                                                          ~~~~~~~~~^~~~~~~~~~~
++In file included from lib/crypto/poly1305-donna32.c:11:
++include/crypto/internal/poly1305.h:21:68: note: previously declared as ‘const u8 *’ {aka ‘const unsigned char *’}
++   21 | void poly1305_core_setkey(struct poly1305_core_key *key, const u8 *raw_key);
++
++This is harmless in principle, as the calling conventions are the same,
++but the more specific prototype allows better type checking in the
++caller.
++
++Change the declaration to match the actual function definition.
++The poly1305_simd_init() is a bit suspicious here, as it previously
++had a 32-byte argument type, but looks like it needs to take the
++16-byte POLY1305_BLOCK_SIZE array instead.
++
++Fixes: 1c08a104360f ("crypto: poly1305 - add new 32 and 64-bit generic versions")
++Signed-off-by: Arnd Bergmann <arnd@arndb.de>
++Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
++Reviewed-by: Eric Biggers <ebiggers@google.com>
++Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/arm/crypto/poly1305-glue.c    | 2 +-
++ arch/arm64/crypto/poly1305-glue.c  | 2 +-
++ arch/mips/crypto/poly1305-glue.c   | 2 +-
++ arch/x86/crypto/poly1305_glue.c    | 6 +++---
++ include/crypto/internal/poly1305.h | 3 ++-
++ include/crypto/poly1305.h          | 6 ++++--
++ lib/crypto/poly1305-donna32.c      | 3 ++-
++ lib/crypto/poly1305-donna64.c      | 3 ++-
++ lib/crypto/poly1305.c              | 3 ++-
++ 9 files changed, 18 insertions(+), 12 deletions(-)
++
++--- a/arch/arm/crypto/poly1305-glue.c
+++++ b/arch/arm/crypto/poly1305-glue.c
++@@ -29,7 +29,7 @@ void __weak poly1305_blocks_neon(void *s
++ 
++ static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);
++ 
++-void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 *key)
+++void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 key[POLY1305_KEY_SIZE])
++ {
++ 	poly1305_init_arm(&dctx->h, key);
++ 	dctx->s[0] = get_unaligned_le32(key + 16);
++--- a/arch/arm64/crypto/poly1305-glue.c
+++++ b/arch/arm64/crypto/poly1305-glue.c
++@@ -25,7 +25,7 @@ asmlinkage void poly1305_emit(void *stat
++ 
++ static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);
++ 
++-void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 *key)
+++void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 key[POLY1305_KEY_SIZE])
++ {
++ 	poly1305_init_arm64(&dctx->h, key);
++ 	dctx->s[0] = get_unaligned_le32(key + 16);
++--- a/arch/mips/crypto/poly1305-glue.c
+++++ b/arch/mips/crypto/poly1305-glue.c
++@@ -17,7 +17,7 @@ asmlinkage void poly1305_init_mips(void
++ asmlinkage void poly1305_blocks_mips(void *state, const u8 *src, u32 len, u32 hibit);
++ asmlinkage void poly1305_emit_mips(void *state, u8 *digest, const u32 *nonce);
++ 
++-void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 *key)
+++void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 key[POLY1305_KEY_SIZE])
++ {
++ 	poly1305_init_mips(&dctx->h, key);
++ 	dctx->s[0] = get_unaligned_le32(key + 16);
++--- a/arch/x86/crypto/poly1305_glue.c
+++++ b/arch/x86/crypto/poly1305_glue.c
++@@ -15,7 +15,7 @@
++ #include <asm/simd.h>
++ 
++ asmlinkage void poly1305_init_x86_64(void *ctx,
++-				     const u8 key[POLY1305_KEY_SIZE]);
+++				     const u8 key[POLY1305_BLOCK_SIZE]);
++ asmlinkage void poly1305_blocks_x86_64(void *ctx, const u8 *inp,
++ 				       const size_t len, const u32 padbit);
++ asmlinkage void poly1305_emit_x86_64(void *ctx, u8 mac[POLY1305_DIGEST_SIZE],
++@@ -80,7 +80,7 @@ static void convert_to_base2_64(void *ct
++ 	state->is_base2_26 = 0;
++ }
++ 
++-static void poly1305_simd_init(void *ctx, const u8 key[POLY1305_KEY_SIZE])
+++static void poly1305_simd_init(void *ctx, const u8 key[POLY1305_BLOCK_SIZE])
++ {
++ 	poly1305_init_x86_64(ctx, key);
++ }
++@@ -128,7 +128,7 @@ static void poly1305_simd_emit(void *ctx
++ 		poly1305_emit_avx(ctx, mac, nonce);
++ }
++ 
++-void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 *key)
+++void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 key[POLY1305_KEY_SIZE])
++ {
++ 	poly1305_simd_init(&dctx->h, key);
++ 	dctx->s[0] = get_unaligned_le32(&key[16]);
++--- a/include/crypto/internal/poly1305.h
+++++ b/include/crypto/internal/poly1305.h
++@@ -18,7 +18,8 @@
++  * only the ε-almost-∆-universal hash function (not the full MAC) is computed.
++  */
++ 
++-void poly1305_core_setkey(struct poly1305_core_key *key, const u8 *raw_key);
+++void poly1305_core_setkey(struct poly1305_core_key *key,
+++			  const u8 raw_key[POLY1305_BLOCK_SIZE]);
++ static inline void poly1305_core_init(struct poly1305_state *state)
++ {
++ 	*state = (struct poly1305_state){};
++--- a/include/crypto/poly1305.h
+++++ b/include/crypto/poly1305.h
++@@ -58,8 +58,10 @@ struct poly1305_desc_ctx {
++ 	};
++ };
++ 
++-void poly1305_init_arch(struct poly1305_desc_ctx *desc, const u8 *key);
++-void poly1305_init_generic(struct poly1305_desc_ctx *desc, const u8 *key);
+++void poly1305_init_arch(struct poly1305_desc_ctx *desc,
+++			const u8 key[POLY1305_KEY_SIZE]);
+++void poly1305_init_generic(struct poly1305_desc_ctx *desc,
+++			   const u8 key[POLY1305_KEY_SIZE]);
++ 
++ static inline void poly1305_init(struct poly1305_desc_ctx *desc, const u8 *key)
++ {
++--- a/lib/crypto/poly1305-donna32.c
+++++ b/lib/crypto/poly1305-donna32.c
++@@ -10,7 +10,8 @@
++ #include <asm/unaligned.h>
++ #include <crypto/internal/poly1305.h>
++ 
++-void poly1305_core_setkey(struct poly1305_core_key *key, const u8 raw_key[16])
+++void poly1305_core_setkey(struct poly1305_core_key *key,
+++			  const u8 raw_key[POLY1305_BLOCK_SIZE])
++ {
++ 	/* r &= 0xffffffc0ffffffc0ffffffc0fffffff */
++ 	key->key.r[0] = (get_unaligned_le32(&raw_key[0])) & 0x3ffffff;
++--- a/lib/crypto/poly1305-donna64.c
+++++ b/lib/crypto/poly1305-donna64.c
++@@ -12,7 +12,8 @@
++ 
++ typedef __uint128_t u128;
++ 
++-void poly1305_core_setkey(struct poly1305_core_key *key, const u8 raw_key[16])
+++void poly1305_core_setkey(struct poly1305_core_key *key,
+++			  const u8 raw_key[POLY1305_BLOCK_SIZE])
++ {
++ 	u64 t0, t1;
++ 
++--- a/lib/crypto/poly1305.c
+++++ b/lib/crypto/poly1305.c
++@@ -12,7 +12,8 @@
++ #include <linux/module.h>
++ #include <asm/unaligned.h>
++ 
++-void poly1305_init_generic(struct poly1305_desc_ctx *desc, const u8 *key)
+++void poly1305_init_generic(struct poly1305_desc_ctx *desc,
+++			   const u8 key[POLY1305_KEY_SIZE])
++ {
++ 	poly1305_core_setkey(&desc->core_r, key);
++ 	desc->s[0] = get_unaligned_le32(key + 16);
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0127-wireguard-selftests-remove-old-conntrack-kconfig-val.patch b/target/linux/generic/backport-5.4/080-wireguard-0127-wireguard-selftests-remove-old-conntrack-kconfig-val.patch
+new file mode 100644
+index 0000000000..3e7d1a8e02
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0127-wireguard-selftests-remove-old-conntrack-kconfig-val.patch
+@@ -0,0 +1,29 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 4 Jun 2021 17:17:30 +0200
++Subject: [PATCH] wireguard: selftests: remove old conntrack kconfig value
++
++commit acf2492b51c9a3c4dfb947f4d3477a86d315150f upstream.
++
++On recent kernels, this config symbol is no longer used.
++
++Reported-by: Rui Salvaterra <rsalvaterra@gmail.com>
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Cc: stable@vger.kernel.org
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ tools/testing/selftests/wireguard/qemu/kernel.config | 1 -
++ 1 file changed, 1 deletion(-)
++
++--- a/tools/testing/selftests/wireguard/qemu/kernel.config
+++++ b/tools/testing/selftests/wireguard/qemu/kernel.config
++@@ -19,7 +19,6 @@ CONFIG_NETFILTER_XTABLES=y
++ CONFIG_NETFILTER_XT_NAT=y
++ CONFIG_NETFILTER_XT_MATCH_LENGTH=y
++ CONFIG_NETFILTER_XT_MARK=y
++-CONFIG_NF_CONNTRACK_IPV4=y
++ CONFIG_NF_NAT_IPV4=y
++ CONFIG_IP_NF_IPTABLES=y
++ CONFIG_IP_NF_FILTER=y
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0128-wireguard-selftests-make-sure-rp_filter-is-disabled-.patch b/target/linux/generic/backport-5.4/080-wireguard-0128-wireguard-selftests-make-sure-rp_filter-is-disabled-.patch
+new file mode 100644
+index 0000000000..22d0f3e32e
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0128-wireguard-selftests-make-sure-rp_filter-is-disabled-.patch
+@@ -0,0 +1,31 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 4 Jun 2021 17:17:31 +0200
++Subject: [PATCH] wireguard: selftests: make sure rp_filter is disabled on
++ vethc
++
++commit f8873d11d4121aad35024f9379e431e0c83abead upstream.
++
++Some distros may enable strict rp_filter by default, which will prevent
++vethc from receiving the packets with an unrouteable reverse path address.
++
++Reported-by: Hangbin Liu <liuhangbin@gmail.com>
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Cc: stable@vger.kernel.org
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ tools/testing/selftests/wireguard/netns.sh | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/tools/testing/selftests/wireguard/netns.sh
+++++ b/tools/testing/selftests/wireguard/netns.sh
++@@ -363,6 +363,7 @@ ip1 -6 rule add table main suppress_pref
++ ip1 -4 route add default dev wg0 table 51820
++ ip1 -4 rule add not fwmark 51820 table 51820
++ ip1 -4 rule add table main suppress_prefixlength 0
+++n1 bash -c 'printf 0 > /proc/sys/net/ipv4/conf/vethc/rp_filter'
++ # Flood the pings instead of sending just one, to trigger routing table reference counting bugs.
++ n1 ping -W 1 -c 100 -f 192.168.99.7
++ n1 ping -W 1 -c 100 -f abab::1111
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0129-wireguard-do-not-use-O3.patch b/target/linux/generic/backport-5.4/080-wireguard-0129-wireguard-do-not-use-O3.patch
+new file mode 100644
+index 0000000000..a7890a7384
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0129-wireguard-do-not-use-O3.patch
+@@ -0,0 +1,33 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 4 Jun 2021 17:17:32 +0200
++Subject: [PATCH] wireguard: do not use -O3
++
++commit cc5060ca0285efe2728bced399a1955a7ce808b2 upstream.
++
++Apparently, various versions of gcc have O3-related miscompiles. Looking
++at the difference between -O2 and -O3 for gcc 11 doesn't indicate
++miscompiles, but the difference also doesn't seem so significant for
++performance that it's worth risking.
++
++Link: https://lore.kernel.org/lkml/CAHk-=wjuoGyxDhAF8SsrTkN0-YfCx7E6jUN3ikC_tn2AKWTTsA@mail.gmail.com/
++Link: https://lore.kernel.org/lkml/CAHmME9otB5Wwxp7H8bR_i2uH2esEMvoBMC8uEXBMH9p0q1s6Bw@mail.gmail.com/
++Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Cc: stable@vger.kernel.org
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/Makefile | 3 +--
++ 1 file changed, 1 insertion(+), 2 deletions(-)
++
++--- a/drivers/net/wireguard/Makefile
+++++ b/drivers/net/wireguard/Makefile
++@@ -1,5 +1,4 @@
++-ccflags-y := -O3
++-ccflags-y += -D'pr_fmt(fmt)=KBUILD_MODNAME ": " fmt'
+++ccflags-y := -D'pr_fmt(fmt)=KBUILD_MODNAME ": " fmt'
++ ccflags-$(CONFIG_WIREGUARD_DEBUG) += -DDEBUG
++ wireguard-y := main.o
++ wireguard-y += noise.o
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0130-wireguard-use-synchronize_net-rather-than-synchroniz.patch b/target/linux/generic/backport-5.4/080-wireguard-0130-wireguard-use-synchronize_net-rather-than-synchroniz.patch
+new file mode 100644
+index 0000000000..309fe36198
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0130-wireguard-use-synchronize_net-rather-than-synchroniz.patch
+@@ -0,0 +1,66 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 4 Jun 2021 17:17:33 +0200
++Subject: [PATCH] wireguard: use synchronize_net rather than synchronize_rcu
++
++commit 24b70eeeb4f46c09487f8155239ebfb1f875774a upstream.
++
++Many of the synchronization points are sometimes called under the rtnl
++lock, which means we should use synchronize_net rather than
++synchronize_rcu. Under the hood, this expands to using the expedited
++flavor of function in the event that rtnl is held, in order to not stall
++other concurrent changes.
++
++This fixes some very, very long delays when removing multiple peers at
++once, which would cause some operations to take several minutes.
++
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Cc: stable@vger.kernel.org
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/peer.c   | 6 +++---
++ drivers/net/wireguard/socket.c | 2 +-
++ 2 files changed, 4 insertions(+), 4 deletions(-)
++
++--- a/drivers/net/wireguard/peer.c
+++++ b/drivers/net/wireguard/peer.c
++@@ -88,7 +88,7 @@ static void peer_make_dead(struct wg_pee
++ 	/* Mark as dead, so that we don't allow jumping contexts after. */
++ 	WRITE_ONCE(peer->is_dead, true);
++ 
++-	/* The caller must now synchronize_rcu() for this to take effect. */
+++	/* The caller must now synchronize_net() for this to take effect. */
++ }
++ 
++ static void peer_remove_after_dead(struct wg_peer *peer)
++@@ -160,7 +160,7 @@ void wg_peer_remove(struct wg_peer *peer
++ 	lockdep_assert_held(&peer->device->device_update_lock);
++ 
++ 	peer_make_dead(peer);
++-	synchronize_rcu();
+++	synchronize_net();
++ 	peer_remove_after_dead(peer);
++ }
++ 
++@@ -178,7 +178,7 @@ void wg_peer_remove_all(struct wg_device
++ 		peer_make_dead(peer);
++ 		list_add_tail(&peer->peer_list, &dead_peers);
++ 	}
++-	synchronize_rcu();
+++	synchronize_net();
++ 	list_for_each_entry_safe(peer, temp, &dead_peers, peer_list)
++ 		peer_remove_after_dead(peer);
++ }
++--- a/drivers/net/wireguard/socket.c
+++++ b/drivers/net/wireguard/socket.c
++@@ -430,7 +430,7 @@ void wg_socket_reinit(struct wg_device *
++ 	if (new4)
++ 		wg->incoming_port = ntohs(inet_sk(new4)->inet_sport);
++ 	mutex_unlock(&wg->socket_update_lock);
++-	synchronize_rcu();
+++	synchronize_net();
++ 	sock_free(old4);
++ 	sock_free(old6);
++ }
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0131-wireguard-peer-allocate-in-kmem_cache.patch b/target/linux/generic/backport-5.4/080-wireguard-0131-wireguard-peer-allocate-in-kmem_cache.patch
+new file mode 100644
+index 0000000000..32ae327037
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0131-wireguard-peer-allocate-in-kmem_cache.patch
+@@ -0,0 +1,125 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 4 Jun 2021 17:17:34 +0200
++Subject: [PATCH] wireguard: peer: allocate in kmem_cache
++
++commit a4e9f8e3287c9eb6bf70df982870980dd3341863 upstream.
++
++With deployments having upwards of 600k peers now, this somewhat heavy
++structure could benefit from more fine-grained allocations.
++Specifically, instead of using a 2048-byte slab for a 1544-byte object,
++we can now use 1544-byte objects directly, thus saving almost 25%
++per-peer, or with 600k peers, that's a savings of 303 MiB. This also
++makes wireguard's memory usage more transparent in tools like slabtop
++and /proc/slabinfo.
++
++Fixes: 8b5553ace83c ("wireguard: queueing: get rid of per-peer ring buffers")
++Suggested-by: Arnd Bergmann <arnd@arndb.de>
++Suggested-by: Matthew Wilcox <willy@infradead.org>
++Cc: stable@vger.kernel.org
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/main.c |  7 +++++++
++ drivers/net/wireguard/peer.c | 21 +++++++++++++++++----
++ drivers/net/wireguard/peer.h |  3 +++
++ 3 files changed, 27 insertions(+), 4 deletions(-)
++
++--- a/drivers/net/wireguard/main.c
+++++ b/drivers/net/wireguard/main.c
++@@ -28,6 +28,10 @@ static int __init mod_init(void)
++ #endif
++ 	wg_noise_init();
++ 
+++	ret = wg_peer_init();
+++	if (ret < 0)
+++		goto err_peer;
+++
++ 	ret = wg_device_init();
++ 	if (ret < 0)
++ 		goto err_device;
++@@ -44,6 +48,8 @@ static int __init mod_init(void)
++ err_netlink:
++ 	wg_device_uninit();
++ err_device:
+++	wg_peer_uninit();
+++err_peer:
++ 	return ret;
++ }
++ 
++@@ -51,6 +57,7 @@ static void __exit mod_exit(void)
++ {
++ 	wg_genetlink_uninit();
++ 	wg_device_uninit();
+++	wg_peer_uninit();
++ }
++ 
++ module_init(mod_init);
++--- a/drivers/net/wireguard/peer.c
+++++ b/drivers/net/wireguard/peer.c
++@@ -15,6 +15,7 @@
++ #include <linux/rcupdate.h>
++ #include <linux/list.h>
++ 
+++static struct kmem_cache *peer_cache;
++ static atomic64_t peer_counter = ATOMIC64_INIT(0);
++ 
++ struct wg_peer *wg_peer_create(struct wg_device *wg,
++@@ -29,10 +30,10 @@ struct wg_peer *wg_peer_create(struct wg
++ 	if (wg->num_peers >= MAX_PEERS_PER_DEVICE)
++ 		return ERR_PTR(ret);
++ 
++-	peer = kzalloc(sizeof(*peer), GFP_KERNEL);
+++	peer = kmem_cache_zalloc(peer_cache, GFP_KERNEL);
++ 	if (unlikely(!peer))
++ 		return ERR_PTR(ret);
++-	if (dst_cache_init(&peer->endpoint_cache, GFP_KERNEL))
+++	if (unlikely(dst_cache_init(&peer->endpoint_cache, GFP_KERNEL)))
++ 		goto err;
++ 
++ 	peer->device = wg;
++@@ -64,7 +65,7 @@ struct wg_peer *wg_peer_create(struct wg
++ 	return peer;
++ 
++ err:
++-	kfree(peer);
+++	kmem_cache_free(peer_cache, peer);
++ 	return ERR_PTR(ret);
++ }
++ 
++@@ -193,7 +194,8 @@ static void rcu_release(struct rcu_head
++ 	/* The final zeroing takes care of clearing any remaining handshake key
++ 	 * material and other potentially sensitive information.
++ 	 */
++-	kzfree(peer);
+++	memzero_explicit(peer, sizeof(*peer));
+++	kmem_cache_free(peer_cache, peer);
++ }
++ 
++ static void kref_release(struct kref *refcount)
++@@ -225,3 +227,14 @@ void wg_peer_put(struct wg_peer *peer)
++ 		return;
++ 	kref_put(&peer->refcount, kref_release);
++ }
+++
+++int __init wg_peer_init(void)
+++{
+++	peer_cache = KMEM_CACHE(wg_peer, 0);
+++	return peer_cache ? 0 : -ENOMEM;
+++}
+++
+++void wg_peer_uninit(void)
+++{
+++	kmem_cache_destroy(peer_cache);
+++}
++--- a/drivers/net/wireguard/peer.h
+++++ b/drivers/net/wireguard/peer.h
++@@ -80,4 +80,7 @@ void wg_peer_put(struct wg_peer *peer);
++ void wg_peer_remove(struct wg_peer *peer);
++ void wg_peer_remove_all(struct wg_device *wg);
++ 
+++int wg_peer_init(void);
+++void wg_peer_uninit(void);
+++
++ #endif /* _WG_PEER_H */
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0132-wireguard-allowedips-initialize-list-head-in-selftes.patch b/target/linux/generic/backport-5.4/080-wireguard-0132-wireguard-allowedips-initialize-list-head-in-selftes.patch
+new file mode 100644
+index 0000000000..ce4e5dcf50
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0132-wireguard-allowedips-initialize-list-head-in-selftes.patch
+@@ -0,0 +1,43 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 4 Jun 2021 17:17:35 +0200
++Subject: [PATCH] wireguard: allowedips: initialize list head in selftest
++
++commit 46cfe8eee285cde465b420637507884551f5d7ca upstream.
++
++The randomized trie tests weren't initializing the dummy peer list head,
++resulting in a NULL pointer dereference when used. Fix this by
++initializing it in the randomized trie test, just like we do for the
++static unit test.
++
++While we're at it, all of the other strings like this have the word
++"self-test", so add it to the missing place here.
++
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Cc: stable@vger.kernel.org
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/selftest/allowedips.c | 3 ++-
++ 1 file changed, 2 insertions(+), 1 deletion(-)
++
++--- a/drivers/net/wireguard/selftest/allowedips.c
+++++ b/drivers/net/wireguard/selftest/allowedips.c
++@@ -296,6 +296,7 @@ static __init bool randomized_test(void)
++ 			goto free;
++ 		}
++ 		kref_init(&peers[i]->refcount);
+++		INIT_LIST_HEAD(&peers[i]->allowedips_list);
++ 	}
++ 
++ 	mutex_lock(&mutex);
++@@ -333,7 +334,7 @@ static __init bool randomized_test(void)
++ 			if (wg_allowedips_insert_v4(&t,
++ 						    (struct in_addr *)mutated,
++ 						    cidr, peer, &mutex) < 0) {
++-				pr_err("allowedips random malloc: FAIL\n");
+++				pr_err("allowedips random self-test malloc: FAIL\n");
++ 				goto free_locked;
++ 			}
++ 			if (horrible_allowedips_insert_v4(&h,
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0133-wireguard-allowedips-remove-nodes-in-O-1.patch b/target/linux/generic/backport-5.4/080-wireguard-0133-wireguard-allowedips-remove-nodes-in-O-1.patch
+new file mode 100644
+index 0000000000..78da24ea46
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0133-wireguard-allowedips-remove-nodes-in-O-1.patch
+@@ -0,0 +1,237 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 4 Jun 2021 17:17:36 +0200
++Subject: [PATCH] wireguard: allowedips: remove nodes in O(1)
++
++commit f634f418c227c912e7ea95a3299efdc9b10e4022 upstream.
++
++Previously, deleting peers would require traversing the entire trie in
++order to rebalance nodes and safely free them. This meant that removing
++1000 peers from a trie with a half million nodes would take an extremely
++long time, during which we're holding the rtnl lock. Large-scale users
++were reporting 200ms latencies added to the networking stack as a whole
++every time their userspace software would queue up significant removals.
++That's a serious situation.
++
++This commit fixes that by maintaining a double pointer to the parent's
++bit pointer for each node, and then using the already existing node list
++belonging to each peer to go directly to the node, fix up its pointers,
++and free it with RCU. This means removal is O(1) instead of O(n), and we
++don't use gobs of stack.
++
++The removal algorithm has the same downside as the code that it fixes:
++it won't collapse needlessly long runs of fillers.  We can enhance that
++in the future if it ever becomes a problem. This commit documents that
++limitation with a TODO comment in code, a small but meaningful
++improvement over the prior situation.
++
++Currently the biggest flaw, which the next commit addresses, is that
++because this increases the node size on 64-bit machines from 60 bytes to
++68 bytes. 60 rounds up to 64, but 68 rounds up to 128. So we wind up
++using twice as much memory per node, because of power-of-two
++allocations, which is a big bummer. We'll need to figure something out
++there.
++
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Cc: stable@vger.kernel.org
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/allowedips.c | 132 ++++++++++++-----------------
++ drivers/net/wireguard/allowedips.h |   9 +-
++ 2 files changed, 57 insertions(+), 84 deletions(-)
++
++--- a/drivers/net/wireguard/allowedips.c
+++++ b/drivers/net/wireguard/allowedips.c
++@@ -66,60 +66,6 @@ static void root_remove_peer_lists(struc
++ 	}
++ }
++ 
++-static void walk_remove_by_peer(struct allowedips_node __rcu **top,
++-				struct wg_peer *peer, struct mutex *lock)
++-{
++-#define REF(p) rcu_access_pointer(p)
++-#define DEREF(p) rcu_dereference_protected(*(p), lockdep_is_held(lock))
++-#define PUSH(p) ({                                                             \
++-		WARN_ON(IS_ENABLED(DEBUG) && len >= 128);                      \
++-		stack[len++] = p;                                              \
++-	})
++-
++-	struct allowedips_node __rcu **stack[128], **nptr;
++-	struct allowedips_node *node, *prev;
++-	unsigned int len;
++-
++-	if (unlikely(!peer || !REF(*top)))
++-		return;
++-
++-	for (prev = NULL, len = 0, PUSH(top); len > 0; prev = node) {
++-		nptr = stack[len - 1];
++-		node = DEREF(nptr);
++-		if (!node) {
++-			--len;
++-			continue;
++-		}
++-		if (!prev || REF(prev->bit[0]) == node ||
++-		    REF(prev->bit[1]) == node) {
++-			if (REF(node->bit[0]))
++-				PUSH(&node->bit[0]);
++-			else if (REF(node->bit[1]))
++-				PUSH(&node->bit[1]);
++-		} else if (REF(node->bit[0]) == prev) {
++-			if (REF(node->bit[1]))
++-				PUSH(&node->bit[1]);
++-		} else {
++-			if (rcu_dereference_protected(node->peer,
++-				lockdep_is_held(lock)) == peer) {
++-				RCU_INIT_POINTER(node->peer, NULL);
++-				list_del_init(&node->peer_list);
++-				if (!node->bit[0] || !node->bit[1]) {
++-					rcu_assign_pointer(*nptr, DEREF(
++-					       &node->bit[!REF(node->bit[0])]));
++-					kfree_rcu(node, rcu);
++-					node = DEREF(nptr);
++-				}
++-			}
++-			--len;
++-		}
++-	}
++-
++-#undef REF
++-#undef DEREF
++-#undef PUSH
++-}
++-
++ static unsigned int fls128(u64 a, u64 b)
++ {
++ 	return a ? fls64(a) + 64U : fls64(b);
++@@ -224,6 +170,7 @@ static int add(struct allowedips_node __
++ 		RCU_INIT_POINTER(node->peer, peer);
++ 		list_add_tail(&node->peer_list, &peer->allowedips_list);
++ 		copy_and_assign_cidr(node, key, cidr, bits);
+++		rcu_assign_pointer(node->parent_bit, trie);
++ 		rcu_assign_pointer(*trie, node);
++ 		return 0;
++ 	}
++@@ -243,9 +190,9 @@ static int add(struct allowedips_node __
++ 	if (!node) {
++ 		down = rcu_dereference_protected(*trie, lockdep_is_held(lock));
++ 	} else {
++-		down = rcu_dereference_protected(CHOOSE_NODE(node, key),
++-						 lockdep_is_held(lock));
+++		down = rcu_dereference_protected(CHOOSE_NODE(node, key), lockdep_is_held(lock));
++ 		if (!down) {
+++			rcu_assign_pointer(newnode->parent_bit, &CHOOSE_NODE(node, key));
++ 			rcu_assign_pointer(CHOOSE_NODE(node, key), newnode);
++ 			return 0;
++ 		}
++@@ -254,29 +201,37 @@ static int add(struct allowedips_node __
++ 	parent = node;
++ 
++ 	if (newnode->cidr == cidr) {
+++		rcu_assign_pointer(down->parent_bit, &CHOOSE_NODE(newnode, down->bits));
++ 		rcu_assign_pointer(CHOOSE_NODE(newnode, down->bits), down);
++-		if (!parent)
+++		if (!parent) {
+++			rcu_assign_pointer(newnode->parent_bit, trie);
++ 			rcu_assign_pointer(*trie, newnode);
++-		else
++-			rcu_assign_pointer(CHOOSE_NODE(parent, newnode->bits),
++-					   newnode);
++-	} else {
++-		node = kzalloc(sizeof(*node), GFP_KERNEL);
++-		if (unlikely(!node)) {
++-			list_del(&newnode->peer_list);
++-			kfree(newnode);
++-			return -ENOMEM;
+++		} else {
+++			rcu_assign_pointer(newnode->parent_bit, &CHOOSE_NODE(parent, newnode->bits));
+++			rcu_assign_pointer(CHOOSE_NODE(parent, newnode->bits), newnode);
++ 		}
++-		INIT_LIST_HEAD(&node->peer_list);
++-		copy_and_assign_cidr(node, newnode->bits, cidr, bits);
+++		return 0;
+++	}
+++
+++	node = kzalloc(sizeof(*node), GFP_KERNEL);
+++	if (unlikely(!node)) {
+++		list_del(&newnode->peer_list);
+++		kfree(newnode);
+++		return -ENOMEM;
+++	}
+++	INIT_LIST_HEAD(&node->peer_list);
+++	copy_and_assign_cidr(node, newnode->bits, cidr, bits);
++ 
++-		rcu_assign_pointer(CHOOSE_NODE(node, down->bits), down);
++-		rcu_assign_pointer(CHOOSE_NODE(node, newnode->bits), newnode);
++-		if (!parent)
++-			rcu_assign_pointer(*trie, node);
++-		else
++-			rcu_assign_pointer(CHOOSE_NODE(parent, node->bits),
++-					   node);
+++	rcu_assign_pointer(down->parent_bit, &CHOOSE_NODE(node, down->bits));
+++	rcu_assign_pointer(CHOOSE_NODE(node, down->bits), down);
+++	rcu_assign_pointer(newnode->parent_bit, &CHOOSE_NODE(node, newnode->bits));
+++	rcu_assign_pointer(CHOOSE_NODE(node, newnode->bits), newnode);
+++	if (!parent) {
+++		rcu_assign_pointer(node->parent_bit, trie);
+++		rcu_assign_pointer(*trie, node);
+++	} else {
+++		rcu_assign_pointer(node->parent_bit, &CHOOSE_NODE(parent, node->bits));
+++		rcu_assign_pointer(CHOOSE_NODE(parent, node->bits), node);
++ 	}
++ 	return 0;
++ }
++@@ -335,9 +290,30 @@ int wg_allowedips_insert_v6(struct allow
++ void wg_allowedips_remove_by_peer(struct allowedips *table,
++ 				  struct wg_peer *peer, struct mutex *lock)
++ {
+++	struct allowedips_node *node, *child, *tmp;
+++
+++	if (list_empty(&peer->allowedips_list))
+++		return;
++ 	++table->seq;
++-	walk_remove_by_peer(&table->root4, peer, lock);
++-	walk_remove_by_peer(&table->root6, peer, lock);
+++	list_for_each_entry_safe(node, tmp, &peer->allowedips_list, peer_list) {
+++		list_del_init(&node->peer_list);
+++		RCU_INIT_POINTER(node->peer, NULL);
+++		if (node->bit[0] && node->bit[1])
+++			continue;
+++		child = rcu_dereference_protected(
+++				node->bit[!rcu_access_pointer(node->bit[0])],
+++				lockdep_is_held(lock));
+++		if (child)
+++			child->parent_bit = node->parent_bit;
+++		*rcu_dereference_protected(node->parent_bit, lockdep_is_held(lock)) = child;
+++		kfree_rcu(node, rcu);
+++
+++		/* TODO: Note that we currently don't walk up and down in order to
+++		 * free any potential filler nodes. This means that this function
+++		 * doesn't free up as much as it could, which could be revisited
+++		 * at some point.
+++		 */
+++	}
++ }
++ 
++ int wg_allowedips_read_node(struct allowedips_node *node, u8 ip[16], u8 *cidr)
++--- a/drivers/net/wireguard/allowedips.h
+++++ b/drivers/net/wireguard/allowedips.h
++@@ -15,14 +15,11 @@ struct wg_peer;
++ struct allowedips_node {
++ 	struct wg_peer __rcu *peer;
++ 	struct allowedips_node __rcu *bit[2];
++-	/* While it may seem scandalous that we waste space for v4,
++-	 * we're alloc'ing to the nearest power of 2 anyway, so this
++-	 * doesn't actually make a difference.
++-	 */
++-	u8 bits[16] __aligned(__alignof(u64));
++ 	u8 cidr, bit_at_a, bit_at_b, bitlen;
+++	u8 bits[16] __aligned(__alignof(u64));
++ 
++-	/* Keep rarely used list at bottom to be beyond cache line. */
+++	/* Keep rarely used members at bottom to be beyond cache line. */
+++	struct allowedips_node *__rcu *parent_bit; /* XXX: this puts us at 68->128 bytes instead of 60->64 bytes!! */
++ 	union {
++ 		struct list_head peer_list;
++ 		struct rcu_head rcu;
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0134-wireguard-allowedips-allocate-nodes-in-kmem_cache.patch b/target/linux/generic/backport-5.4/080-wireguard-0134-wireguard-allowedips-allocate-nodes-in-kmem_cache.patch
+new file mode 100644
+index 0000000000..65b31b05f5
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0134-wireguard-allowedips-allocate-nodes-in-kmem_cache.patch
+@@ -0,0 +1,173 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 4 Jun 2021 17:17:37 +0200
++Subject: [PATCH] wireguard: allowedips: allocate nodes in kmem_cache
++
++commit dc680de28ca849dfe589dc15ac56d22505f0ef11 upstream.
++
++The previous commit moved from O(n) to O(1) for removal, but in the
++process introduced an additional pointer member to a struct that
++increased the size from 60 to 68 bytes, putting nodes in the 128-byte
++slab. With deployed systems having as many as 2 million nodes, this
++represents a significant doubling in memory usage (128 MiB -> 256 MiB).
++Fix this by using our own kmem_cache, that's sized exactly right. This
++also makes wireguard's memory usage more transparent in tools like
++slabtop and /proc/slabinfo.
++
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Suggested-by: Arnd Bergmann <arnd@arndb.de>
++Suggested-by: Matthew Wilcox <willy@infradead.org>
++Cc: stable@vger.kernel.org
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/allowedips.c | 31 ++++++++++++++++++++++++------
++ drivers/net/wireguard/allowedips.h |  5 ++++-
++ drivers/net/wireguard/main.c       | 10 +++++++++-
++ 3 files changed, 38 insertions(+), 8 deletions(-)
++
++--- a/drivers/net/wireguard/allowedips.c
+++++ b/drivers/net/wireguard/allowedips.c
++@@ -6,6 +6,8 @@
++ #include "allowedips.h"
++ #include "peer.h"
++ 
+++static struct kmem_cache *node_cache;
+++
++ static void swap_endian(u8 *dst, const u8 *src, u8 bits)
++ {
++ 	if (bits == 32) {
++@@ -40,6 +42,11 @@ static void push_rcu(struct allowedips_n
++ 	}
++ }
++ 
+++static void node_free_rcu(struct rcu_head *rcu)
+++{
+++	kmem_cache_free(node_cache, container_of(rcu, struct allowedips_node, rcu));
+++}
+++
++ static void root_free_rcu(struct rcu_head *rcu)
++ {
++ 	struct allowedips_node *node, *stack[128] = {
++@@ -49,7 +56,7 @@ static void root_free_rcu(struct rcu_hea
++ 	while (len > 0 && (node = stack[--len])) {
++ 		push_rcu(stack, node->bit[0], &len);
++ 		push_rcu(stack, node->bit[1], &len);
++-		kfree(node);
+++		kmem_cache_free(node_cache, node);
++ 	}
++ }
++ 
++@@ -164,7 +171,7 @@ static int add(struct allowedips_node __
++ 		return -EINVAL;
++ 
++ 	if (!rcu_access_pointer(*trie)) {
++-		node = kzalloc(sizeof(*node), GFP_KERNEL);
+++		node = kmem_cache_zalloc(node_cache, GFP_KERNEL);
++ 		if (unlikely(!node))
++ 			return -ENOMEM;
++ 		RCU_INIT_POINTER(node->peer, peer);
++@@ -180,7 +187,7 @@ static int add(struct allowedips_node __
++ 		return 0;
++ 	}
++ 
++-	newnode = kzalloc(sizeof(*newnode), GFP_KERNEL);
+++	newnode = kmem_cache_zalloc(node_cache, GFP_KERNEL);
++ 	if (unlikely(!newnode))
++ 		return -ENOMEM;
++ 	RCU_INIT_POINTER(newnode->peer, peer);
++@@ -213,10 +220,10 @@ static int add(struct allowedips_node __
++ 		return 0;
++ 	}
++ 
++-	node = kzalloc(sizeof(*node), GFP_KERNEL);
+++	node = kmem_cache_zalloc(node_cache, GFP_KERNEL);
++ 	if (unlikely(!node)) {
++ 		list_del(&newnode->peer_list);
++-		kfree(newnode);
+++		kmem_cache_free(node_cache, newnode);
++ 		return -ENOMEM;
++ 	}
++ 	INIT_LIST_HEAD(&node->peer_list);
++@@ -306,7 +313,7 @@ void wg_allowedips_remove_by_peer(struct
++ 		if (child)
++ 			child->parent_bit = node->parent_bit;
++ 		*rcu_dereference_protected(node->parent_bit, lockdep_is_held(lock)) = child;
++-		kfree_rcu(node, rcu);
+++		call_rcu(&node->rcu, node_free_rcu);
++ 
++ 		/* TODO: Note that we currently don't walk up and down in order to
++ 		 * free any potential filler nodes. This means that this function
++@@ -350,4 +357,16 @@ struct wg_peer *wg_allowedips_lookup_src
++ 	return NULL;
++ }
++ 
+++int __init wg_allowedips_slab_init(void)
+++{
+++	node_cache = KMEM_CACHE(allowedips_node, 0);
+++	return node_cache ? 0 : -ENOMEM;
+++}
+++
+++void wg_allowedips_slab_uninit(void)
+++{
+++	rcu_barrier();
+++	kmem_cache_destroy(node_cache);
+++}
+++
++ #include "selftest/allowedips.c"
++--- a/drivers/net/wireguard/allowedips.h
+++++ b/drivers/net/wireguard/allowedips.h
++@@ -19,7 +19,7 @@ struct allowedips_node {
++ 	u8 bits[16] __aligned(__alignof(u64));
++ 
++ 	/* Keep rarely used members at bottom to be beyond cache line. */
++-	struct allowedips_node *__rcu *parent_bit; /* XXX: this puts us at 68->128 bytes instead of 60->64 bytes!! */
+++	struct allowedips_node *__rcu *parent_bit;
++ 	union {
++ 		struct list_head peer_list;
++ 		struct rcu_head rcu;
++@@ -53,4 +53,7 @@ struct wg_peer *wg_allowedips_lookup_src
++ bool wg_allowedips_selftest(void);
++ #endif
++ 
+++int wg_allowedips_slab_init(void);
+++void wg_allowedips_slab_uninit(void);
+++
++ #endif /* _WG_ALLOWEDIPS_H */
++--- a/drivers/net/wireguard/main.c
+++++ b/drivers/net/wireguard/main.c
++@@ -21,10 +21,15 @@ static int __init mod_init(void)
++ {
++ 	int ret;
++ 
+++	ret = wg_allowedips_slab_init();
+++	if (ret < 0)
+++		goto err_allowedips;
+++
++ #ifdef DEBUG
+++	ret = -ENOTRECOVERABLE;
++ 	if (!wg_allowedips_selftest() || !wg_packet_counter_selftest() ||
++ 	    !wg_ratelimiter_selftest())
++-		return -ENOTRECOVERABLE;
+++		goto err_peer;
++ #endif
++ 	wg_noise_init();
++ 
++@@ -50,6 +55,8 @@ err_netlink:
++ err_device:
++ 	wg_peer_uninit();
++ err_peer:
+++	wg_allowedips_slab_uninit();
+++err_allowedips:
++ 	return ret;
++ }
++ 
++@@ -58,6 +65,7 @@ static void __exit mod_exit(void)
++ 	wg_genetlink_uninit();
++ 	wg_device_uninit();
++ 	wg_peer_uninit();
+++	wg_allowedips_slab_uninit();
++ }
++ 
++ module_init(mod_init);
+diff --git a/target/linux/generic/backport-5.4/080-wireguard-0135-wireguard-allowedips-free-empty-intermediate-nodes-w.patch b/target/linux/generic/backport-5.4/080-wireguard-0135-wireguard-allowedips-free-empty-intermediate-nodes-w.patch
+new file mode 100644
+index 0000000000..c044ad25af
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/080-wireguard-0135-wireguard-allowedips-free-empty-intermediate-nodes-w.patch
+@@ -0,0 +1,521 @@
++From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Fri, 4 Jun 2021 17:17:38 +0200
++Subject: [PATCH] wireguard: allowedips: free empty intermediate nodes when
++ removing single node
++
++commit bf7b042dc62a31f66d3a41dd4dfc7806f267b307 upstream.
++
++When removing single nodes, it's possible that that node's parent is an
++empty intermediate node, in which case, it too should be removed.
++Otherwise the trie fills up and never is fully emptied, leading to
++gradual memory leaks over time for tries that are modified often. There
++was originally code to do this, but was removed during refactoring in
++2016 and never reworked. Now that we have proper parent pointers from
++the previous commits, we can implement this properly.
++
++In order to reduce branching and expensive comparisons, we want to keep
++the double pointer for parent assignment (which lets us easily chain up
++to the root), but we still need to actually get the parent's base
++address. So encode the bit number into the last two bits of the pointer,
++and pack and unpack it as needed. This is a little bit clumsy but is the
++fastest and less memory wasteful of the compromises. Note that we align
++the root struct here to a minimum of 4, because it's embedded into a
++larger struct, and we're relying on having the bottom two bits for our
++flag, which would only be 16-bit aligned on m68k.
++
++The existing macro-based helpers were a bit unwieldy for adding the bit
++packing to, so this commit replaces them with safer and clearer ordinary
++functions.
++
++We add a test to the randomized/fuzzer part of the selftests, to free
++the randomized tries by-peer, refuzz it, and repeat, until it's supposed
++to be empty, and then then see if that actually resulted in the whole
++thing being emptied. That combined with kmemcheck should hopefully make
++sure this commit is doing what it should. Along the way this resulted in
++various other cleanups of the tests and fixes for recent graphviz.
++
++Fixes: e7096c131e51 ("net: WireGuard secure network tunnel")
++Cc: stable@vger.kernel.org
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ drivers/net/wireguard/allowedips.c          | 102 ++++++------
++ drivers/net/wireguard/allowedips.h          |   4 +-
++ drivers/net/wireguard/selftest/allowedips.c | 162 ++++++++++----------
++ 3 files changed, 137 insertions(+), 131 deletions(-)
++
++--- a/drivers/net/wireguard/allowedips.c
+++++ b/drivers/net/wireguard/allowedips.c
++@@ -30,8 +30,11 @@ static void copy_and_assign_cidr(struct
++ 	node->bitlen = bits;
++ 	memcpy(node->bits, src, bits / 8U);
++ }
++-#define CHOOSE_NODE(parent, key) \
++-	parent->bit[(key[parent->bit_at_a] >> parent->bit_at_b) & 1]
+++
+++static inline u8 choose(struct allowedips_node *node, const u8 *key)
+++{
+++	return (key[node->bit_at_a] >> node->bit_at_b) & 1;
+++}
++ 
++ static void push_rcu(struct allowedips_node **stack,
++ 		     struct allowedips_node __rcu *p, unsigned int *len)
++@@ -112,7 +115,7 @@ static struct allowedips_node *find_node
++ 			found = node;
++ 		if (node->cidr == bits)
++ 			break;
++-		node = rcu_dereference_bh(CHOOSE_NODE(node, key));
+++		node = rcu_dereference_bh(node->bit[choose(node, key)]);
++ 	}
++ 	return found;
++ }
++@@ -144,8 +147,7 @@ static bool node_placement(struct allowe
++ 			   u8 cidr, u8 bits, struct allowedips_node **rnode,
++ 			   struct mutex *lock)
++ {
++-	struct allowedips_node *node = rcu_dereference_protected(trie,
++-						lockdep_is_held(lock));
+++	struct allowedips_node *node = rcu_dereference_protected(trie, lockdep_is_held(lock));
++ 	struct allowedips_node *parent = NULL;
++ 	bool exact = false;
++ 
++@@ -155,13 +157,24 @@ static bool node_placement(struct allowe
++ 			exact = true;
++ 			break;
++ 		}
++-		node = rcu_dereference_protected(CHOOSE_NODE(parent, key),
++-						 lockdep_is_held(lock));
+++		node = rcu_dereference_protected(parent->bit[choose(parent, key)], lockdep_is_held(lock));
++ 	}
++ 	*rnode = parent;
++ 	return exact;
++ }
++ 
+++static inline void connect_node(struct allowedips_node **parent, u8 bit, struct allowedips_node *node)
+++{
+++	node->parent_bit_packed = (unsigned long)parent | bit;
+++	rcu_assign_pointer(*parent, node);
+++}
+++
+++static inline void choose_and_connect_node(struct allowedips_node *parent, struct allowedips_node *node)
+++{
+++	u8 bit = choose(parent, node->bits);
+++	connect_node(&parent->bit[bit], bit, node);
+++}
+++
++ static int add(struct allowedips_node __rcu **trie, u8 bits, const u8 *key,
++ 	       u8 cidr, struct wg_peer *peer, struct mutex *lock)
++ {
++@@ -177,8 +190,7 @@ static int add(struct allowedips_node __
++ 		RCU_INIT_POINTER(node->peer, peer);
++ 		list_add_tail(&node->peer_list, &peer->allowedips_list);
++ 		copy_and_assign_cidr(node, key, cidr, bits);
++-		rcu_assign_pointer(node->parent_bit, trie);
++-		rcu_assign_pointer(*trie, node);
+++		connect_node(trie, 2, node);
++ 		return 0;
++ 	}
++ 	if (node_placement(*trie, key, cidr, bits, &node, lock)) {
++@@ -197,10 +209,10 @@ static int add(struct allowedips_node __
++ 	if (!node) {
++ 		down = rcu_dereference_protected(*trie, lockdep_is_held(lock));
++ 	} else {
++-		down = rcu_dereference_protected(CHOOSE_NODE(node, key), lockdep_is_held(lock));
+++		const u8 bit = choose(node, key);
+++		down = rcu_dereference_protected(node->bit[bit], lockdep_is_held(lock));
++ 		if (!down) {
++-			rcu_assign_pointer(newnode->parent_bit, &CHOOSE_NODE(node, key));
++-			rcu_assign_pointer(CHOOSE_NODE(node, key), newnode);
+++			connect_node(&node->bit[bit], bit, newnode);
++ 			return 0;
++ 		}
++ 	}
++@@ -208,15 +220,11 @@ static int add(struct allowedips_node __
++ 	parent = node;
++ 
++ 	if (newnode->cidr == cidr) {
++-		rcu_assign_pointer(down->parent_bit, &CHOOSE_NODE(newnode, down->bits));
++-		rcu_assign_pointer(CHOOSE_NODE(newnode, down->bits), down);
++-		if (!parent) {
++-			rcu_assign_pointer(newnode->parent_bit, trie);
++-			rcu_assign_pointer(*trie, newnode);
++-		} else {
++-			rcu_assign_pointer(newnode->parent_bit, &CHOOSE_NODE(parent, newnode->bits));
++-			rcu_assign_pointer(CHOOSE_NODE(parent, newnode->bits), newnode);
++-		}
+++		choose_and_connect_node(newnode, down);
+++		if (!parent)
+++			connect_node(trie, 2, newnode);
+++		else
+++			choose_and_connect_node(parent, newnode);
++ 		return 0;
++ 	}
++ 
++@@ -229,17 +237,12 @@ static int add(struct allowedips_node __
++ 	INIT_LIST_HEAD(&node->peer_list);
++ 	copy_and_assign_cidr(node, newnode->bits, cidr, bits);
++ 
++-	rcu_assign_pointer(down->parent_bit, &CHOOSE_NODE(node, down->bits));
++-	rcu_assign_pointer(CHOOSE_NODE(node, down->bits), down);
++-	rcu_assign_pointer(newnode->parent_bit, &CHOOSE_NODE(node, newnode->bits));
++-	rcu_assign_pointer(CHOOSE_NODE(node, newnode->bits), newnode);
++-	if (!parent) {
++-		rcu_assign_pointer(node->parent_bit, trie);
++-		rcu_assign_pointer(*trie, node);
++-	} else {
++-		rcu_assign_pointer(node->parent_bit, &CHOOSE_NODE(parent, node->bits));
++-		rcu_assign_pointer(CHOOSE_NODE(parent, node->bits), node);
++-	}
+++	choose_and_connect_node(node, down);
+++	choose_and_connect_node(node, newnode);
+++	if (!parent)
+++		connect_node(trie, 2, node);
+++	else
+++		choose_and_connect_node(parent, node);
++ 	return 0;
++ }
++ 
++@@ -297,7 +300,8 @@ int wg_allowedips_insert_v6(struct allow
++ void wg_allowedips_remove_by_peer(struct allowedips *table,
++ 				  struct wg_peer *peer, struct mutex *lock)
++ {
++-	struct allowedips_node *node, *child, *tmp;
+++	struct allowedips_node *node, *child, **parent_bit, *parent, *tmp;
+++	bool free_parent;
++ 
++ 	if (list_empty(&peer->allowedips_list))
++ 		return;
++@@ -307,19 +311,29 @@ void wg_allowedips_remove_by_peer(struct
++ 		RCU_INIT_POINTER(node->peer, NULL);
++ 		if (node->bit[0] && node->bit[1])
++ 			continue;
++-		child = rcu_dereference_protected(
++-				node->bit[!rcu_access_pointer(node->bit[0])],
++-				lockdep_is_held(lock));
+++		child = rcu_dereference_protected(node->bit[!rcu_access_pointer(node->bit[0])],
+++						  lockdep_is_held(lock));
++ 		if (child)
++-			child->parent_bit = node->parent_bit;
++-		*rcu_dereference_protected(node->parent_bit, lockdep_is_held(lock)) = child;
+++			child->parent_bit_packed = node->parent_bit_packed;
+++		parent_bit = (struct allowedips_node **)(node->parent_bit_packed & ~3UL);
+++		*parent_bit = child;
+++		parent = (void *)parent_bit -
+++			 offsetof(struct allowedips_node, bit[node->parent_bit_packed & 1]);
+++		free_parent = !rcu_access_pointer(node->bit[0]) &&
+++			      !rcu_access_pointer(node->bit[1]) &&
+++			      (node->parent_bit_packed & 3) <= 1 &&
+++			      !rcu_access_pointer(parent->peer);
+++		if (free_parent)
+++			child = rcu_dereference_protected(
+++					parent->bit[!(node->parent_bit_packed & 1)],
+++					lockdep_is_held(lock));
++ 		call_rcu(&node->rcu, node_free_rcu);
++-
++-		/* TODO: Note that we currently don't walk up and down in order to
++-		 * free any potential filler nodes. This means that this function
++-		 * doesn't free up as much as it could, which could be revisited
++-		 * at some point.
++-		 */
+++		if (!free_parent)
+++			continue;
+++		if (child)
+++			child->parent_bit_packed = parent->parent_bit_packed;
+++		*(struct allowedips_node **)(parent->parent_bit_packed & ~3UL) = child;
+++		call_rcu(&parent->rcu, node_free_rcu);
++ 	}
++ }
++ 
++--- a/drivers/net/wireguard/allowedips.h
+++++ b/drivers/net/wireguard/allowedips.h
++@@ -19,7 +19,7 @@ struct allowedips_node {
++ 	u8 bits[16] __aligned(__alignof(u64));
++ 
++ 	/* Keep rarely used members at bottom to be beyond cache line. */
++-	struct allowedips_node *__rcu *parent_bit;
+++	unsigned long parent_bit_packed;
++ 	union {
++ 		struct list_head peer_list;
++ 		struct rcu_head rcu;
++@@ -30,7 +30,7 @@ struct allowedips {
++ 	struct allowedips_node __rcu *root4;
++ 	struct allowedips_node __rcu *root6;
++ 	u64 seq;
++-};
+++} __aligned(4); /* We pack the lower 2 bits of &root, but m68k only gives 16-bit alignment. */
++ 
++ void wg_allowedips_init(struct allowedips *table);
++ void wg_allowedips_free(struct allowedips *table, struct mutex *mutex);
++--- a/drivers/net/wireguard/selftest/allowedips.c
+++++ b/drivers/net/wireguard/selftest/allowedips.c
++@@ -19,32 +19,22 @@
++ 
++ #include <linux/siphash.h>
++ 
++-static __init void swap_endian_and_apply_cidr(u8 *dst, const u8 *src, u8 bits,
++-					      u8 cidr)
++-{
++-	swap_endian(dst, src, bits);
++-	memset(dst + (cidr + 7) / 8, 0, bits / 8 - (cidr + 7) / 8);
++-	if (cidr)
++-		dst[(cidr + 7) / 8 - 1] &= ~0U << ((8 - (cidr % 8)) % 8);
++-}
++-
++ static __init void print_node(struct allowedips_node *node, u8 bits)
++ {
++ 	char *fmt_connection = KERN_DEBUG "\t\"%p/%d\" -> \"%p/%d\";\n";
++-	char *fmt_declaration = KERN_DEBUG
++-		"\t\"%p/%d\"[style=%s, color=\"#%06x\"];\n";
+++	char *fmt_declaration = KERN_DEBUG "\t\"%p/%d\"[style=%s, color=\"#%06x\"];\n";
+++	u8 ip1[16], ip2[16], cidr1, cidr2;
++ 	char *style = "dotted";
++-	u8 ip1[16], ip2[16];
++ 	u32 color = 0;
++ 
+++	if (node == NULL)
+++		return;
++ 	if (bits == 32) {
++ 		fmt_connection = KERN_DEBUG "\t\"%pI4/%d\" -> \"%pI4/%d\";\n";
++-		fmt_declaration = KERN_DEBUG
++-			"\t\"%pI4/%d\"[style=%s, color=\"#%06x\"];\n";
+++		fmt_declaration = KERN_DEBUG "\t\"%pI4/%d\"[style=%s, color=\"#%06x\"];\n";
++ 	} else if (bits == 128) {
++ 		fmt_connection = KERN_DEBUG "\t\"%pI6/%d\" -> \"%pI6/%d\";\n";
++-		fmt_declaration = KERN_DEBUG
++-			"\t\"%pI6/%d\"[style=%s, color=\"#%06x\"];\n";
+++		fmt_declaration = KERN_DEBUG "\t\"%pI6/%d\"[style=%s, color=\"#%06x\"];\n";
++ 	}
++ 	if (node->peer) {
++ 		hsiphash_key_t key = { { 0 } };
++@@ -55,24 +45,20 @@ static __init void print_node(struct all
++ 			hsiphash_1u32(0xabad1dea, &key) % 200;
++ 		style = "bold";
++ 	}
++-	swap_endian_and_apply_cidr(ip1, node->bits, bits, node->cidr);
++-	printk(fmt_declaration, ip1, node->cidr, style, color);
+++	wg_allowedips_read_node(node, ip1, &cidr1);
+++	printk(fmt_declaration, ip1, cidr1, style, color);
++ 	if (node->bit[0]) {
++-		swap_endian_and_apply_cidr(ip2,
++-				rcu_dereference_raw(node->bit[0])->bits, bits,
++-				node->cidr);
++-		printk(fmt_connection, ip1, node->cidr, ip2,
++-		       rcu_dereference_raw(node->bit[0])->cidr);
++-		print_node(rcu_dereference_raw(node->bit[0]), bits);
+++		wg_allowedips_read_node(rcu_dereference_raw(node->bit[0]), ip2, &cidr2);
+++		printk(fmt_connection, ip1, cidr1, ip2, cidr2);
++ 	}
++ 	if (node->bit[1]) {
++-		swap_endian_and_apply_cidr(ip2,
++-				rcu_dereference_raw(node->bit[1])->bits,
++-				bits, node->cidr);
++-		printk(fmt_connection, ip1, node->cidr, ip2,
++-		       rcu_dereference_raw(node->bit[1])->cidr);
++-		print_node(rcu_dereference_raw(node->bit[1]), bits);
+++		wg_allowedips_read_node(rcu_dereference_raw(node->bit[1]), ip2, &cidr2);
+++		printk(fmt_connection, ip1, cidr1, ip2, cidr2);
++ 	}
+++	if (node->bit[0])
+++		print_node(rcu_dereference_raw(node->bit[0]), bits);
+++	if (node->bit[1])
+++		print_node(rcu_dereference_raw(node->bit[1]), bits);
++ }
++ 
++ static __init void print_tree(struct allowedips_node __rcu *top, u8 bits)
++@@ -121,8 +107,8 @@ static __init inline union nf_inet_addr
++ {
++ 	union nf_inet_addr mask;
++ 
++-	memset(&mask, 0x00, 128 / 8);
++-	memset(&mask, 0xff, cidr / 8);
+++	memset(&mask, 0, sizeof(mask));
+++	memset(&mask.all, 0xff, cidr / 8);
++ 	if (cidr % 32)
++ 		mask.all[cidr / 32] = (__force u32)htonl(
++ 			(0xFFFFFFFFUL << (32 - (cidr % 32))) & 0xFFFFFFFFUL);
++@@ -149,42 +135,36 @@ horrible_mask_self(struct horrible_allow
++ }
++ 
++ static __init inline bool
++-horrible_match_v4(const struct horrible_allowedips_node *node,
++-		  struct in_addr *ip)
+++horrible_match_v4(const struct horrible_allowedips_node *node, struct in_addr *ip)
++ {
++ 	return (ip->s_addr & node->mask.ip) == node->ip.ip;
++ }
++ 
++ static __init inline bool
++-horrible_match_v6(const struct horrible_allowedips_node *node,
++-		  struct in6_addr *ip)
+++horrible_match_v6(const struct horrible_allowedips_node *node, struct in6_addr *ip)
++ {
++-	return (ip->in6_u.u6_addr32[0] & node->mask.ip6[0]) ==
++-		       node->ip.ip6[0] &&
++-	       (ip->in6_u.u6_addr32[1] & node->mask.ip6[1]) ==
++-		       node->ip.ip6[1] &&
++-	       (ip->in6_u.u6_addr32[2] & node->mask.ip6[2]) ==
++-		       node->ip.ip6[2] &&
+++	return (ip->in6_u.u6_addr32[0] & node->mask.ip6[0]) == node->ip.ip6[0] &&
+++	       (ip->in6_u.u6_addr32[1] & node->mask.ip6[1]) == node->ip.ip6[1] &&
+++	       (ip->in6_u.u6_addr32[2] & node->mask.ip6[2]) == node->ip.ip6[2] &&
++ 	       (ip->in6_u.u6_addr32[3] & node->mask.ip6[3]) == node->ip.ip6[3];
++ }
++ 
++ static __init void
++-horrible_insert_ordered(struct horrible_allowedips *table,
++-			struct horrible_allowedips_node *node)
+++horrible_insert_ordered(struct horrible_allowedips *table, struct horrible_allowedips_node *node)
++ {
++ 	struct horrible_allowedips_node *other = NULL, *where = NULL;
++ 	u8 my_cidr = horrible_mask_to_cidr(node->mask);
++ 
++ 	hlist_for_each_entry(other, &table->head, table) {
++-		if (!memcmp(&other->mask, &node->mask,
++-			    sizeof(union nf_inet_addr)) &&
++-		    !memcmp(&other->ip, &node->ip,
++-			    sizeof(union nf_inet_addr)) &&
++-		    other->ip_version == node->ip_version) {
+++		if (other->ip_version == node->ip_version &&
+++		    !memcmp(&other->mask, &node->mask, sizeof(union nf_inet_addr)) &&
+++		    !memcmp(&other->ip, &node->ip, sizeof(union nf_inet_addr))) {
++ 			other->value = node->value;
++ 			kfree(node);
++ 			return;
++ 		}
+++	}
+++	hlist_for_each_entry(other, &table->head, table) {
++ 		where = other;
++ 		if (horrible_mask_to_cidr(other->mask) <= my_cidr)
++ 			break;
++@@ -201,8 +181,7 @@ static __init int
++ horrible_allowedips_insert_v4(struct horrible_allowedips *table,
++ 			      struct in_addr *ip, u8 cidr, void *value)
++ {
++-	struct horrible_allowedips_node *node = kzalloc(sizeof(*node),
++-							GFP_KERNEL);
+++	struct horrible_allowedips_node *node = kzalloc(sizeof(*node), GFP_KERNEL);
++ 
++ 	if (unlikely(!node))
++ 		return -ENOMEM;
++@@ -219,8 +198,7 @@ static __init int
++ horrible_allowedips_insert_v6(struct horrible_allowedips *table,
++ 			      struct in6_addr *ip, u8 cidr, void *value)
++ {
++-	struct horrible_allowedips_node *node = kzalloc(sizeof(*node),
++-							GFP_KERNEL);
+++	struct horrible_allowedips_node *node = kzalloc(sizeof(*node), GFP_KERNEL);
++ 
++ 	if (unlikely(!node))
++ 		return -ENOMEM;
++@@ -234,39 +212,43 @@ horrible_allowedips_insert_v6(struct hor
++ }
++ 
++ static __init void *
++-horrible_allowedips_lookup_v4(struct horrible_allowedips *table,
++-			      struct in_addr *ip)
+++horrible_allowedips_lookup_v4(struct horrible_allowedips *table, struct in_addr *ip)
++ {
++ 	struct horrible_allowedips_node *node;
++-	void *ret = NULL;
++ 
++ 	hlist_for_each_entry(node, &table->head, table) {
++-		if (node->ip_version != 4)
++-			continue;
++-		if (horrible_match_v4(node, ip)) {
++-			ret = node->value;
++-			break;
++-		}
+++		if (node->ip_version == 4 && horrible_match_v4(node, ip))
+++			return node->value;
++ 	}
++-	return ret;
+++	return NULL;
++ }
++ 
++ static __init void *
++-horrible_allowedips_lookup_v6(struct horrible_allowedips *table,
++-			      struct in6_addr *ip)
+++horrible_allowedips_lookup_v6(struct horrible_allowedips *table, struct in6_addr *ip)
++ {
++ 	struct horrible_allowedips_node *node;
++-	void *ret = NULL;
++ 
++ 	hlist_for_each_entry(node, &table->head, table) {
++-		if (node->ip_version != 6)
+++		if (node->ip_version == 6 && horrible_match_v6(node, ip))
+++			return node->value;
+++	}
+++	return NULL;
+++}
+++
+++
+++static __init void
+++horrible_allowedips_remove_by_value(struct horrible_allowedips *table, void *value)
+++{
+++	struct horrible_allowedips_node *node;
+++	struct hlist_node *h;
+++
+++	hlist_for_each_entry_safe(node, h, &table->head, table) {
+++		if (node->value != value)
++ 			continue;
++-		if (horrible_match_v6(node, ip)) {
++-			ret = node->value;
++-			break;
++-		}
+++		hlist_del(&node->table);
+++		kfree(node);
++ 	}
++-	return ret;
+++
++ }
++ 
++ static __init bool randomized_test(void)
++@@ -397,23 +379,33 @@ static __init bool randomized_test(void)
++ 		print_tree(t.root6, 128);
++ 	}
++ 
++-	for (i = 0; i < NUM_QUERIES; ++i) {
++-		prandom_bytes(ip, 4);
++-		if (lookup(t.root4, 32, ip) !=
++-		    horrible_allowedips_lookup_v4(&h, (struct in_addr *)ip)) {
++-			pr_err("allowedips random self-test: FAIL\n");
++-			goto free;
+++	for (j = 0;; ++j) {
+++		for (i = 0; i < NUM_QUERIES; ++i) {
+++			prandom_bytes(ip, 4);
+++			if (lookup(t.root4, 32, ip) != horrible_allowedips_lookup_v4(&h, (struct in_addr *)ip)) {
+++				horrible_allowedips_lookup_v4(&h, (struct in_addr *)ip);
+++				pr_err("allowedips random v4 self-test: FAIL\n");
+++				goto free;
+++			}
+++			prandom_bytes(ip, 16);
+++			if (lookup(t.root6, 128, ip) != horrible_allowedips_lookup_v6(&h, (struct in6_addr *)ip)) {
+++				pr_err("allowedips random v6 self-test: FAIL\n");
+++				goto free;
+++			}
++ 		}
+++		if (j >= NUM_PEERS)
+++			break;
+++		mutex_lock(&mutex);
+++		wg_allowedips_remove_by_peer(&t, peers[j], &mutex);
+++		mutex_unlock(&mutex);
+++		horrible_allowedips_remove_by_value(&h, peers[j]);
++ 	}
++ 
++-	for (i = 0; i < NUM_QUERIES; ++i) {
++-		prandom_bytes(ip, 16);
++-		if (lookup(t.root6, 128, ip) !=
++-		    horrible_allowedips_lookup_v6(&h, (struct in6_addr *)ip)) {
++-			pr_err("allowedips random self-test: FAIL\n");
++-			goto free;
++-		}
+++	if (t.root4 || t.root6) {
+++		pr_err("allowedips random self-test removal: FAIL\n");
+++		goto free;
++ 	}
+++
++ 	ret = true;
++ 
++ free:
+diff --git a/target/linux/generic/backport-5.4/300-MIPS-Exclude-more-dsemul-code-when-CONFIG_MIPS_FP_SU.patch b/target/linux/generic/backport-5.4/300-MIPS-Exclude-more-dsemul-code-when-CONFIG_MIPS_FP_SU.patch
+new file mode 100644
+index 0000000000..0bc58e756b
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/300-MIPS-Exclude-more-dsemul-code-when-CONFIG_MIPS_FP_SU.patch
+@@ -0,0 +1,134 @@
++From d96c3157f9ca177727fbad960fcf6f52f145f471 Mon Sep 17 00:00:00 2001
++From: Yousong Zhou <yszhou4tech@gmail.com>
++Date: Thu, 9 Jan 2020 11:33:19 +0800
++Subject: [PATCH] MIPS: Exclude more dsemul code when CONFIG_MIPS_FP_SUPPORT=n
++
++This furthers what commit 42b10815d559 ("MIPS: Don't compile math-emu
++when CONFIG_MIPS_FP_SUPPORT=n") has done
++
++Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com>
++---
++ arch/mips/include/asm/processor.h | 12 ++++++------
++ arch/mips/kernel/process.c        | 10 ++++++++--
++ arch/mips/kernel/vdso.c           | 26 +++++++++++++++-----------
++ 3 files changed, 29 insertions(+), 19 deletions(-)
++
++--- a/arch/mips/include/asm/processor.h
+++++ b/arch/mips/include/asm/processor.h
++@@ -253,13 +253,13 @@ struct thread_struct {
++ #ifdef CONFIG_MIPS_FP_SUPPORT
++ 	/* Saved fpu/fpu emulator stuff. */
++ 	struct mips_fpu_struct fpu FPU_ALIGN;
++-#endif
++ 	/* Assigned branch delay slot 'emulation' frame */
++ 	atomic_t bd_emu_frame;
++ 	/* PC of the branch from a branch delay slot 'emulation' */
++ 	unsigned long bd_emu_branch_pc;
++ 	/* PC to continue from following a branch delay slot 'emulation' */
++ 	unsigned long bd_emu_cont_pc;
+++#endif
++ #ifdef CONFIG_MIPS_MT_FPAFF
++ 	/* Emulated instruction count */
++ 	unsigned long emulated_fp;
++@@ -302,7 +302,11 @@ struct thread_struct {
++ 		.fpr		= {{{0,},},},			\
++ 		.fcr31		= 0,				\
++ 		.msacsr		= 0,				\
++-	},
+++	},							\
+++	/* Delay slot emulation */				\
+++	.bd_emu_frame = ATOMIC_INIT(BD_EMUFRAME_NONE),		\
+++	.bd_emu_branch_pc = 0,					\
+++	.bd_emu_cont_pc = 0,
++ #else
++ # define FPU_INIT
++ #endif
++@@ -334,10 +338,6 @@ struct thread_struct {
++ 	 * FPU affinity state (null if not FPAFF)		\
++ 	 */							\
++ 	FPAFF_INIT						\
++-	/* Delay slot emulation */				\
++-	.bd_emu_frame = ATOMIC_INIT(BD_EMUFRAME_NONE),		\
++-	.bd_emu_branch_pc = 0,					\
++-	.bd_emu_cont_pc = 0,					\
++ 	/*							\
++ 	 * Saved DSP stuff					\
++ 	 */							\
++--- a/arch/mips/kernel/process.c
+++++ b/arch/mips/kernel/process.c
++@@ -75,7 +75,9 @@ void start_thread(struct pt_regs * regs,
++ 	lose_fpu(0);
++ 	clear_thread_flag(TIF_MSA_CTX_LIVE);
++ 	clear_used_math();
+++#ifdef CONFIG_MIPS_FP_SUPPORT
++ 	atomic_set(&current->thread.bd_emu_frame, BD_EMUFRAME_NONE);
+++#endif
++ 	init_dsp();
++ 	regs->cp0_epc = pc;
++ 	regs->regs[29] = sp;
++@@ -176,7 +178,9 @@ int copy_thread_tls(unsigned long clone_
++ 	clear_tsk_thread_flag(p, TIF_FPUBOUND);
++ #endif /* CONFIG_MIPS_MT_FPAFF */
++ 
+++#ifdef CONFIG_MIPS_FP_SUPPORT
++ 	atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE);
+++#endif
++ 
++ 	if (clone_flags & CLONE_SETTLS)
++ 		ti->tp_value = tls;
++@@ -650,8 +654,10 @@ unsigned long mips_stack_top(void)
++ {
++ 	unsigned long top = TASK_SIZE & PAGE_MASK;
++ 
++-	/* One page for branch delay slot "emulation" */
++-	top -= PAGE_SIZE;
+++	if (IS_ENABLED(CONFIG_MIPS_FP_SUPPORT)) {
+++		/* One page for branch delay slot "emulation" */
+++		top -= PAGE_SIZE;
+++	}
++ 
++ 	/* Space for the VDSO, data page & GIC user page */
++ 	top -= PAGE_ALIGN(current->thread.abi->vdso->size);
++--- a/arch/mips/kernel/vdso.c
+++++ b/arch/mips/kernel/vdso.c
++@@ -71,10 +71,12 @@ subsys_initcall(init_vdso);
++ 
++ static unsigned long vdso_base(void)
++ {
++-	unsigned long base;
+++	unsigned long base = STACK_TOP;
++ 
++-	/* Skip the delay slot emulation page */
++-	base = STACK_TOP + PAGE_SIZE;
+++	if (IS_ENABLED(CONFIG_MIPS_FP_SUPPORT)) {
+++		/* Skip the delay slot emulation page */
+++		base += PAGE_SIZE;
+++	}
++ 
++ 	if (current->flags & PF_RANDOMIZE) {
++ 		base += get_random_int() & (VDSO_RANDOMIZE_SIZE - 1);
++@@ -95,14 +97,16 @@ int arch_setup_additional_pages(struct l
++ 	if (down_write_killable(&mm->mmap_sem))
++ 		return -EINTR;
++ 
++-	/* Map delay slot emulation page */
++-	base = mmap_region(NULL, STACK_TOP, PAGE_SIZE,
++-			   VM_READ | VM_EXEC |
++-			   VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC,
++-			   0, NULL);
++-	if (IS_ERR_VALUE(base)) {
++-		ret = base;
++-		goto out;
+++	if (IS_ENABLED(CONFIG_MIPS_FP_SUPPORT)) {
+++		/* Map delay slot emulation page */
+++		base = mmap_region(NULL, STACK_TOP, PAGE_SIZE,
+++				VM_READ | VM_EXEC |
+++				VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC,
+++				0, NULL);
+++		if (IS_ERR_VALUE(base)) {
+++			ret = base;
+++			goto out;
+++		}
++ 	}
++ 
++ 	/*
+diff --git a/target/linux/generic/backport-5.4/310-mips-Kconfig-Add-ARCH_HAS_FORTIFY_SOURCE.patch b/target/linux/generic/backport-5.4/310-mips-Kconfig-Add-ARCH_HAS_FORTIFY_SOURCE.patch
+new file mode 100644
+index 0000000000..e02f103543
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/310-mips-Kconfig-Add-ARCH_HAS_FORTIFY_SOURCE.patch
+@@ -0,0 +1,32 @@
++From a8d2bb0559b5fefa5173ff4e7496cc6250db2c8a Mon Sep 17 00:00:00 2001
++From: Dmitry Korotin <dkorotin@wavecomp.com>
++Date: Thu, 12 Sep 2019 22:53:45 +0000
++Subject: [PATCH] mips: Kconfig: Add ARCH_HAS_FORTIFY_SOURCE
++
++FORTIFY_SOURCE detects various overflows at compile and run time.
++(6974f0c4555e ("include/linux/string.h:
++add the option of fortified string.h functions)
++
++ARCH_HAS_FORTIFY_SOURCE means that the architecture can be built and
++run with CONFIG_FORTIFY_SOURCE.
++
++Since mips can be built and run with that flag,
++select ARCH_HAS_FORTIFY_SOURCE as default.
++
++Signed-off-by: Dmitry Korotin <dkorotin@wavecomp.com>
++Signed-off-by: Paul Burton <paul.burton@mips.com>
++Cc: linux-mips@vger.kernel.org
++---
++ arch/mips/Kconfig | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/arch/mips/Kconfig
+++++ b/arch/mips/Kconfig
++@@ -7,6 +7,7 @@ config MIPS
++ 	select ARCH_CLOCKSOURCE_DATA
++ 	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
++ 	select ARCH_HAS_UBSAN_SANITIZE_ALL
+++	select ARCH_HAS_FORTIFY_SOURCE
++ 	select ARCH_SUPPORTS_UPROBES
++ 	select ARCH_USE_BUILTIN_BSWAP
++ 	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
+diff --git a/target/linux/generic/backport-5.4/310-v5.6-mips-vdso-fix-jalr-t9-crash-in-vdso-code.patch b/target/linux/generic/backport-5.4/310-v5.6-mips-vdso-fix-jalr-t9-crash-in-vdso-code.patch
+new file mode 100644
+index 0000000000..51eef4b26b
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/310-v5.6-mips-vdso-fix-jalr-t9-crash-in-vdso-code.patch
+@@ -0,0 +1,54 @@
++From d3f703c4359ff06619b2322b91f69710453e6b6d Mon Sep 17 00:00:00 2001
++From: Victor Kamensky <kamensky@cisco.com>
++Date: Tue, 11 Feb 2020 11:24:33 -0800
++Subject: [PATCH] mips: vdso: fix 'jalr t9' crash in vdso code
++
++Observed that when kernel is built with Yocto mips64-poky-linux-gcc,
++and mips64-poky-linux-gnun32-gcc toolchain, resulting vdso contains
++'jalr t9' instructions in its code and since in vdso case nobody
++sets GOT table code crashes when instruction reached. On other hand
++observed that when kernel is built mips-poky-linux-gcc toolchain, the
++same 'jalr t9' instruction are replaced with PC relative function
++calls using 'bal' instructions.
++
++The difference boils down to -mrelax-pic-calls and -mexplicit-relocs
++gcc options that gets different default values depending on gcc
++target triplets and corresponding binutils. -mrelax-pic-calls got
++enabled by default only in mips-poky-linux-gcc case. MIPS binutils
++ld relies on R_MIPS_JALR relocation to convert 'jalr t9' into 'bal'
++and such relocation is generated only if -mrelax-pic-calls option
++is on.
++
++Please note 'jalr t9' conversion to 'bal' can happen only to static
++functions. These static PIC calls use mips local GOT entries that
++are supposed to be filled with start of DSO value by run-time linker
++(missing in VDSO case) and they do not have dynamic relocations.
++Global mips GOT entries must have dynamic relocations and they should
++be prevented by cmd_vdso_check Makefile rule.
++
++Solution call out -mrelax-pic-calls and -mexplicit-relocs options
++explicitly while compiling MIPS vdso code. That would get correct
++and consistent between different toolchains behaviour.
++
++Reported-by: Bruce Ashfield <bruce.ashfield@gmail.com>
++Signed-off-by: Victor Kamensky <kamensky@cisco.com>
++Signed-off-by: Paul Burton <paulburton@kernel.org>
++Cc: linux-mips@vger.kernel.org
++Cc: Ralf Baechle <ralf@linux-mips.org>
++Cc: James Hogan <jhogan@kernel.org>
++Cc: Vincenzo Frascino <vincenzo.frascino@arm.com>
++Cc: richard.purdie@linuxfoundation.org
++---
++ arch/mips/vdso/Makefile | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/arch/mips/vdso/Makefile
+++++ b/arch/mips/vdso/Makefile
++@@ -26,6 +26,7 @@ ccflags-vdso := \
++ cflags-vdso := $(ccflags-vdso) \
++ 	$(filter -W%,$(filter-out -Wa$(comma)%,$(KBUILD_CFLAGS))) \
++ 	-O3 -g -fPIC -fno-strict-aliasing -fno-common -fno-builtin -G 0 \
+++	-mrelax-pic-calls -mexplicit-relocs \
++ 	-fno-stack-protector -fno-jump-tables -DDISABLE_BRANCH_PROFILING \
++ 	$(call cc-option, -fno-asynchronous-unwind-tables) \
++ 	$(call cc-option, -fno-stack-protector)
+diff --git a/target/linux/generic/backport-5.4/311-MIPS-Fix-exception-handler-memcpy.patch b/target/linux/generic/backport-5.4/311-MIPS-Fix-exception-handler-memcpy.patch
+new file mode 100644
+index 0000000000..5a6725c7a0
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/311-MIPS-Fix-exception-handler-memcpy.patch
+@@ -0,0 +1,107 @@
++From e01c91a360793298c9e1656a61faceff01487a43 Mon Sep 17 00:00:00 2001
++From: Ben Hutchings <ben@decadent.org.uk>
++Date: Sat, 23 May 2020 23:50:34 +0800
++Subject: [PATCH] MIPS: Fix exception handler memcpy()
++
++The exception handler subroutines are declared as a single char, but
++when copied to the required addresses the copy length is 0x80.
++
++When range checks are enabled for memcpy() this results in a build
++failure, with error messages such as:
++
++In file included from arch/mips/mti-malta/malta-init.c:15:
++In function 'memcpy',
++    inlined from 'mips_nmi_setup' at arch/mips/mti-malta/malta-init.c:98:2:
++include/linux/string.h:376:4: error: call to '__read_overflow2' declared with attribute error: detected read beyond size of object passed as 2nd parameter
++  376 |    __read_overflow2();
++      |    ^~~~~~~~~~~~~~~~~~
++
++Change the declarations to use type char[].
++
++Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
++Signed-off-by: YunQiang Su <syq@debian.org>
++Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
++---
++ arch/mips/loongson64/common/init.c | 4 ++--
++ arch/mips/mti-malta/malta-init.c   | 8 ++++----
++ arch/mips/pistachio/init.c         | 8 ++++----
++ 3 files changed, 10 insertions(+), 10 deletions(-)
++
++--- a/arch/mips/loongson64/common/init.c
+++++ b/arch/mips/loongson64/common/init.c
++@@ -18,10 +18,10 @@ unsigned long __maybe_unused _loongson_a
++ static void __init mips_nmi_setup(void)
++ {
++ 	void *base;
++-	extern char except_vec_nmi;
+++	extern char except_vec_nmi[];
++ 
++ 	base = (void *)(CAC_BASE + 0x380);
++-	memcpy(base, &except_vec_nmi, 0x80);
+++	memcpy(base, except_vec_nmi, 0x80);
++ 	flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
++ }
++ 
++--- a/arch/mips/mti-malta/malta-init.c
+++++ b/arch/mips/mti-malta/malta-init.c
++@@ -90,24 +90,24 @@ static void __init console_config(void)
++ static void __init mips_nmi_setup(void)
++ {
++ 	void *base;
++-	extern char except_vec_nmi;
+++	extern char except_vec_nmi[];
++ 
++ 	base = cpu_has_veic ?
++ 		(void *)(CAC_BASE + 0xa80) :
++ 		(void *)(CAC_BASE + 0x380);
++-	memcpy(base, &except_vec_nmi, 0x80);
+++	memcpy(base, except_vec_nmi, 0x80);
++ 	flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
++ }
++ 
++ static void __init mips_ejtag_setup(void)
++ {
++ 	void *base;
++-	extern char except_vec_ejtag_debug;
+++	extern char except_vec_ejtag_debug[];
++ 
++ 	base = cpu_has_veic ?
++ 		(void *)(CAC_BASE + 0xa00) :
++ 		(void *)(CAC_BASE + 0x300);
++-	memcpy(base, &except_vec_ejtag_debug, 0x80);
+++	memcpy(base, except_vec_ejtag_debug, 0x80);
++ 	flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
++ }
++ 
++--- a/arch/mips/pistachio/init.c
+++++ b/arch/mips/pistachio/init.c
++@@ -83,12 +83,12 @@ phys_addr_t mips_cdmm_phys_base(void)
++ static void __init mips_nmi_setup(void)
++ {
++ 	void *base;
++-	extern char except_vec_nmi;
+++	extern char except_vec_nmi[];
++ 
++ 	base = cpu_has_veic ?
++ 		(void *)(CAC_BASE + 0xa80) :
++ 		(void *)(CAC_BASE + 0x380);
++-	memcpy(base, &except_vec_nmi, 0x80);
+++	memcpy(base, except_vec_nmi, 0x80);
++ 	flush_icache_range((unsigned long)base,
++ 			   (unsigned long)base + 0x80);
++ }
++@@ -96,12 +96,12 @@ static void __init mips_nmi_setup(void)
++ static void __init mips_ejtag_setup(void)
++ {
++ 	void *base;
++-	extern char except_vec_ejtag_debug;
+++	extern char except_vec_ejtag_debug[];
++ 
++ 	base = cpu_has_veic ?
++ 		(void *)(CAC_BASE + 0xa00) :
++ 		(void *)(CAC_BASE + 0x300);
++-	memcpy(base, &except_vec_ejtag_debug, 0x80);
+++	memcpy(base, except_vec_ejtag_debug, 0x80);
++ 	flush_icache_range((unsigned long)base,
++ 			   (unsigned long)base + 0x80);
++ }
+diff --git a/target/linux/generic/backport-5.4/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch b/target/linux/generic/backport-5.4/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch
+new file mode 100644
+index 0000000000..501f42d88e
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch
+@@ -0,0 +1,99 @@
++From: Pablo Neira Ayuso <pablo@netfilter.org>
++Date: Thu, 25 Jan 2018 12:58:55 +0100
++Subject: [PATCH] netfilter: nft_flow_offload: handle netdevice events from
++ nf_flow_table
++
++Move the code that deals with device events to the core.
++
++Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
++---
++
++--- a/net/netfilter/nf_flow_table_core.c
+++++ b/net/netfilter/nf_flow_table_core.c
++@@ -529,5 +529,35 @@ void nf_flow_table_free(struct nf_flowta
++ }
++ EXPORT_SYMBOL_GPL(nf_flow_table_free);
++ 
+++static int nf_flow_table_netdev_event(struct notifier_block *this,
+++				      unsigned long event, void *ptr)
+++{
+++	struct net_device *dev = netdev_notifier_info_to_dev(ptr);
+++
+++	if (event != NETDEV_DOWN)
+++		return NOTIFY_DONE;
+++
+++	nf_flow_table_cleanup(dev);
+++
+++	return NOTIFY_DONE;
+++}
+++
+++static struct notifier_block flow_offload_netdev_notifier = {
+++	.notifier_call	= nf_flow_table_netdev_event,
+++};
+++
+++static int __init nf_flow_table_module_init(void)
+++{
+++	return register_netdevice_notifier(&flow_offload_netdev_notifier);
+++}
+++
+++static void __exit nf_flow_table_module_exit(void)
+++{
+++	unregister_netdevice_notifier(&flow_offload_netdev_notifier);
+++}
+++
+++module_init(nf_flow_table_module_init);
+++module_exit(nf_flow_table_module_exit);
+++
++ MODULE_LICENSE("GPL");
++ MODULE_AUTHOR("Pablo Neira Ayuso <pablo@netfilter.org>");
++--- a/net/netfilter/nft_flow_offload.c
+++++ b/net/netfilter/nft_flow_offload.c
++@@ -234,47 +234,14 @@ static struct nft_expr_type nft_flow_off
++ 	.owner		= THIS_MODULE,
++ };
++ 
++-static int flow_offload_netdev_event(struct notifier_block *this,
++-				     unsigned long event, void *ptr)
++-{
++-	struct net_device *dev = netdev_notifier_info_to_dev(ptr);
++-
++-	if (event != NETDEV_DOWN)
++-		return NOTIFY_DONE;
++-
++-	nf_flow_table_cleanup(dev);
++-
++-	return NOTIFY_DONE;
++-}
++-
++-static struct notifier_block flow_offload_netdev_notifier = {
++-	.notifier_call	= flow_offload_netdev_event,
++-};
++-
++ static int __init nft_flow_offload_module_init(void)
++ {
++-	int err;
++-
++-	err = register_netdevice_notifier(&flow_offload_netdev_notifier);
++-	if (err)
++-		goto err;
++-
++-	err = nft_register_expr(&nft_flow_offload_type);
++-	if (err < 0)
++-		goto register_expr;
++-
++-	return 0;
++-
++-register_expr:
++-	unregister_netdevice_notifier(&flow_offload_netdev_notifier);
++-err:
++-	return err;
+++	return nft_register_expr(&nft_flow_offload_type);
++ }
++ 
++ static void __exit nft_flow_offload_module_exit(void)
++ {
++ 	nft_unregister_expr(&nft_flow_offload_type);
++-	unregister_netdevice_notifier(&flow_offload_netdev_notifier);
++ }
++ 
++ module_init(nft_flow_offload_module_init);
+diff --git a/target/linux/generic/backport-5.4/370-netfilter-nf_flow_table-fix-offloaded-connection-tim.patch b/target/linux/generic/backport-5.4/370-netfilter-nf_flow_table-fix-offloaded-connection-tim.patch
+new file mode 100644
+index 0000000000..373a156429
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/370-netfilter-nf_flow_table-fix-offloaded-connection-tim.patch
+@@ -0,0 +1,114 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Wed, 13 Jun 2018 12:33:39 +0200
++Subject: [PATCH] netfilter: nf_flow_table: fix offloaded connection timeout
++ corner case
++
++The full teardown of offloaded flows is deferred to a gc work item,
++however processing of packets by netfilter needs to happen immediately
++after a teardown is requested, because the conntrack state needs to be
++fixed up.
++
++Since the IPS_OFFLOAD_BIT is still kept until the teardown is complete,
++the netfilter conntrack gc can accidentally bump the timeout of a
++connection where offload was just stopped, causing a conntrack entry
++leak.
++
++Fix this by moving the conntrack timeout bumping from conntrack core to
++the nf_flow_offload and add a check to prevent bogus timeout bumps.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/netfilter/nf_conntrack_core.c
+++++ b/net/netfilter/nf_conntrack_core.c
++@@ -1207,18 +1207,6 @@ static bool gc_worker_can_early_drop(con
++ 	return false;
++ }
++ 
++-#define	DAY	(86400 * HZ)
++-
++-/* Set an arbitrary timeout large enough not to ever expire, this save
++- * us a check for the IPS_OFFLOAD_BIT from the packet path via
++- * nf_ct_is_expired().
++- */
++-static void nf_ct_offload_timeout(struct nf_conn *ct)
++-{
++-	if (nf_ct_expires(ct) < DAY / 2)
++-		ct->timeout = nfct_time_stamp + DAY;
++-}
++-
++ static void gc_worker(struct work_struct *work)
++ {
++ 	unsigned long end_time = jiffies + GC_SCAN_MAX_DURATION;
++@@ -1250,10 +1238,8 @@ static void gc_worker(struct work_struct
++ 
++ 			tmp = nf_ct_tuplehash_to_ctrack(h);
++ 
++-			if (test_bit(IPS_OFFLOAD_BIT, &tmp->status)) {
++-				nf_ct_offload_timeout(tmp);
+++			if (test_bit(IPS_OFFLOAD_BIT, &tmp->status))
++ 				continue;
++-			}
++ 
++ 			if (nf_ct_is_expired(tmp)) {
++ 				nf_ct_gc_expired(tmp);
++--- a/net/netfilter/nf_flow_table_core.c
+++++ b/net/netfilter/nf_flow_table_core.c
++@@ -198,10 +198,29 @@ static const struct rhashtable_params nf
++ 	.automatic_shrinking	= true,
++ };
++ 
+++#define        DAY     (86400 * HZ)
+++
+++/* Set an arbitrary timeout large enough not to ever expire, this save
+++ * us a check for the IPS_OFFLOAD_BIT from the packet path via
+++ * nf_ct_is_expired().
+++ */
+++static void nf_ct_offload_timeout(struct flow_offload *flow)
+++{
+++	struct flow_offload_entry *entry;
+++	struct nf_conn *ct;
+++
+++	entry = container_of(flow, struct flow_offload_entry, flow);
+++	ct = entry->ct;
+++
+++	if (nf_ct_expires(ct) < DAY / 2)
+++		ct->timeout = nfct_time_stamp + DAY;
+++}
+++
++ int flow_offload_add(struct nf_flowtable *flow_table, struct flow_offload *flow)
++ {
++ 	int err;
++ 
+++	nf_ct_offload_timeout(flow);
++ 	flow->timeout = (u32)jiffies + NF_FLOW_TIMEOUT;
++ 
++ 	err = rhashtable_insert_fast(&flow_table->rhashtable,
++@@ -304,6 +323,7 @@ nf_flow_table_iterate(struct nf_flowtabl
++ 	rhashtable_walk_start(&hti);
++ 
++ 	while ((tuplehash = rhashtable_walk_next(&hti))) {
+++
++ 		if (IS_ERR(tuplehash)) {
++ 			if (PTR_ERR(tuplehash) != -EAGAIN) {
++ 				err = PTR_ERR(tuplehash);
++@@ -328,10 +348,17 @@ static void nf_flow_offload_gc_step(stru
++ {
++ 	struct nf_flowtable *flow_table = data;
++ 	struct flow_offload_entry *e;
+++	bool teardown;
++ 
++ 	e = container_of(flow, struct flow_offload_entry, flow);
++-	if (nf_flow_has_expired(flow) || nf_ct_is_dying(e->ct) ||
++-	    (flow->flags & (FLOW_OFFLOAD_DYING | FLOW_OFFLOAD_TEARDOWN)))
+++
+++	teardown = flow->flags & (FLOW_OFFLOAD_DYING |
+++				  FLOW_OFFLOAD_TEARDOWN);
+++
+++	if (!teardown)
+++		nf_ct_offload_timeout(flow);
+++
+++	if (nf_flow_has_expired(flow) || teardown)
++ 		flow_offload_del(flow_table, flow);
++ }
++ 
+diff --git a/target/linux/generic/backport-5.4/371-netfilter-nf_flow_table-fix-up-ct-state-of-flows-aft.patch b/target/linux/generic/backport-5.4/371-netfilter-nf_flow_table-fix-up-ct-state-of-flows-aft.patch
+new file mode 100644
+index 0000000000..383641dfb7
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/371-netfilter-nf_flow_table-fix-up-ct-state-of-flows-aft.patch
+@@ -0,0 +1,24 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Thu, 14 Jun 2018 11:20:09 +0200
++Subject: [PATCH] netfilter: nf_flow_table: fix up ct state of flows after
++ timeout
++
++If a connection simply times out instead of being torn down, it is left
++active with a long timeout. Fix this by calling flow_offload_fixup_ct_state
++here as well.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/netfilter/nf_flow_table_core.c
+++++ b/net/netfilter/nf_flow_table_core.c
++@@ -268,6 +268,9 @@ static void flow_offload_del(struct nf_f
++ 	else if (flow->flags & FLOW_OFFLOAD_TEARDOWN)
++ 		flow_offload_fixup_ct_timeout(e->ct);
++ 
+++	if (!(flow->flags & FLOW_OFFLOAD_TEARDOWN))
+++		flow_offload_fixup_ct_state(e->ct);
+++
++ 	flow_offload_free(flow);
++ }
++ 
+diff --git a/target/linux/generic/backport-5.4/393-v5.5-sch_cake-drop-unused-variable-tin_quantum_prio.patch b/target/linux/generic/backport-5.4/393-v5.5-sch_cake-drop-unused-variable-tin_quantum_prio.patch
+new file mode 100644
+index 0000000000..6c9e8ad5ee
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/393-v5.5-sch_cake-drop-unused-variable-tin_quantum_prio.patch
+@@ -0,0 +1,158 @@
++From d7e1738f0a0b0573ac93cf570ba3df9dee61b68e Mon Sep 17 00:00:00 2001
++From: Kevin 'ldir' Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
++Date: Wed, 18 Dec 2019 14:05:13 +0000
++Subject: [PATCH 2/2] sch_cake: drop unused variable tin_quantum_prio
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++Turns out tin_quantum_prio isn't used anymore and is a leftover from a
++previous implementation of diffserv tins.  Since the variable isn't used
++in any calculations it can be eliminated.
++
++Drop variable and places where it was set.  Rename remaining variable
++and consolidate naming of intermediate variables that set it.
++
++Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
++Acked-by: Toke Høiland-Jørgensen <toke@redhat.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ net/sched/sch_cake.c | 59 ++++++++++++++------------------------------
++ 1 file changed, 18 insertions(+), 41 deletions(-)
++
++--- a/net/sched/sch_cake.c
+++++ b/net/sched/sch_cake.c
++@@ -173,8 +173,7 @@ struct cake_tin_data {
++ 	u64	tin_rate_bps;
++ 	u16	tin_rate_shft;
++ 
++-	u16	tin_quantum_prio;
++-	u16	tin_quantum_band;
+++	u16	tin_quantum;
++ 	s32	tin_deficit;
++ 	u32	tin_backlog;
++ 	u32	tin_dropped;
++@@ -1947,7 +1946,7 @@ begin:
++ 		while (b->tin_deficit < 0 ||
++ 		       !(b->sparse_flow_count + b->bulk_flow_count)) {
++ 			if (b->tin_deficit <= 0)
++-				b->tin_deficit += b->tin_quantum_band;
+++				b->tin_deficit += b->tin_quantum;
++ 			if (b->sparse_flow_count + b->bulk_flow_count)
++ 				empty = false;
++ 
++@@ -2269,8 +2268,7 @@ static int cake_config_besteffort(struct
++ 
++ 	cake_set_rate(b, rate, mtu,
++ 		      us_to_ns(q->target), us_to_ns(q->interval));
++-	b->tin_quantum_band = 65535;
++-	b->tin_quantum_prio = 65535;
+++	b->tin_quantum = 65535;
++ 
++ 	return 0;
++ }
++@@ -2281,8 +2279,7 @@ static int cake_config_precedence(struct
++ 	struct cake_sched_data *q = qdisc_priv(sch);
++ 	u32 mtu = psched_mtu(qdisc_dev(sch));
++ 	u64 rate = q->rate_bps;
++-	u32 quantum1 = 256;
++-	u32 quantum2 = 256;
+++	u32 quantum = 256;
++ 	u32 i;
++ 
++ 	q->tin_cnt = 8;
++@@ -2295,18 +2292,14 @@ static int cake_config_precedence(struct
++ 		cake_set_rate(b, rate, mtu, us_to_ns(q->target),
++ 			      us_to_ns(q->interval));
++ 
++-		b->tin_quantum_prio = max_t(u16, 1U, quantum1);
++-		b->tin_quantum_band = max_t(u16, 1U, quantum2);
+++		b->tin_quantum = max_t(u16, 1U, quantum);
++ 
++ 		/* calculate next class's parameters */
++ 		rate  *= 7;
++ 		rate >>= 3;
++ 
++-		quantum1  *= 3;
++-		quantum1 >>= 1;
++-
++-		quantum2  *= 7;
++-		quantum2 >>= 3;
+++		quantum  *= 7;
+++		quantum >>= 3;
++ 	}
++ 
++ 	return 0;
++@@ -2375,8 +2368,7 @@ static int cake_config_diffserv8(struct
++ 	struct cake_sched_data *q = qdisc_priv(sch);
++ 	u32 mtu = psched_mtu(qdisc_dev(sch));
++ 	u64 rate = q->rate_bps;
++-	u32 quantum1 = 256;
++-	u32 quantum2 = 256;
+++	u32 quantum = 256;
++ 	u32 i;
++ 
++ 	q->tin_cnt = 8;
++@@ -2392,18 +2384,14 @@ static int cake_config_diffserv8(struct
++ 		cake_set_rate(b, rate, mtu, us_to_ns(q->target),
++ 			      us_to_ns(q->interval));
++ 
++-		b->tin_quantum_prio = max_t(u16, 1U, quantum1);
++-		b->tin_quantum_band = max_t(u16, 1U, quantum2);
+++		b->tin_quantum = max_t(u16, 1U, quantum);
++ 
++ 		/* calculate next class's parameters */
++ 		rate  *= 7;
++ 		rate >>= 3;
++ 
++-		quantum1  *= 3;
++-		quantum1 >>= 1;
++-
++-		quantum2  *= 7;
++-		quantum2 >>= 3;
+++		quantum  *= 7;
+++		quantum >>= 3;
++ 	}
++ 
++ 	return 0;
++@@ -2442,17 +2430,11 @@ static int cake_config_diffserv4(struct
++ 	cake_set_rate(&q->tins[3], rate >> 2, mtu,
++ 		      us_to_ns(q->target), us_to_ns(q->interval));
++ 
++-	/* priority weights */
++-	q->tins[0].tin_quantum_prio = quantum;
++-	q->tins[1].tin_quantum_prio = quantum >> 4;
++-	q->tins[2].tin_quantum_prio = quantum << 2;
++-	q->tins[3].tin_quantum_prio = quantum << 4;
++-
++ 	/* bandwidth-sharing weights */
++-	q->tins[0].tin_quantum_band = quantum;
++-	q->tins[1].tin_quantum_band = quantum >> 4;
++-	q->tins[2].tin_quantum_band = quantum >> 1;
++-	q->tins[3].tin_quantum_band = quantum >> 2;
+++	q->tins[0].tin_quantum = quantum;
+++	q->tins[1].tin_quantum = quantum >> 4;
+++	q->tins[2].tin_quantum = quantum >> 1;
+++	q->tins[3].tin_quantum = quantum >> 2;
++ 
++ 	return 0;
++ }
++@@ -2483,15 +2465,10 @@ static int cake_config_diffserv3(struct
++ 	cake_set_rate(&q->tins[2], rate >> 2, mtu,
++ 		      us_to_ns(q->target), us_to_ns(q->interval));
++ 
++-	/* priority weights */
++-	q->tins[0].tin_quantum_prio = quantum;
++-	q->tins[1].tin_quantum_prio = quantum >> 4;
++-	q->tins[2].tin_quantum_prio = quantum << 4;
++-
++ 	/* bandwidth-sharing weights */
++-	q->tins[0].tin_quantum_band = quantum;
++-	q->tins[1].tin_quantum_band = quantum >> 4;
++-	q->tins[2].tin_quantum_band = quantum >> 2;
+++	q->tins[0].tin_quantum = quantum;
+++	q->tins[1].tin_quantum = quantum >> 4;
+++	q->tins[2].tin_quantum = quantum >> 2;
++ 
++ 	return 0;
++ }
+diff --git a/target/linux/generic/backport-5.4/395-v5.8-net-sch_cake-Take-advantage-of-skb-hash-where-appropriate.patch b/target/linux/generic/backport-5.4/395-v5.8-net-sch_cake-Take-advantage-of-skb-hash-where-appropriate.patch
+new file mode 100644
+index 0000000000..a4981acdee
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/395-v5.8-net-sch_cake-Take-advantage-of-skb-hash-where-appropriate.patch
+@@ -0,0 +1,170 @@
++From b0c19ed6088ab41dd2a727b60594b7297c15d6ce Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Toke=20H=C3=B8iland-J=C3=B8rgensen?= <toke@redhat.com>
++Date: Fri, 29 May 2020 14:43:44 +0200
++Subject: [PATCH] sch_cake: Take advantage of skb->hash where appropriate
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++While the other fq-based qdiscs take advantage of skb->hash and doesn't
++recompute it if it is already set, sch_cake does not.
++
++This was a deliberate choice because sch_cake hashes various parts of the
++packet header to support its advanced flow isolation modes. However,
++foregoing the use of skb->hash entirely loses a few important benefits:
++
++- When skb->hash is set by hardware, a few CPU cycles can be saved by not
++  hashing again in software.
++
++- Tunnel encapsulations will generally preserve the value of skb->hash from
++  before the encapsulation, which allows flow-based qdiscs to distinguish
++  between flows even though the outer packet header no longer has flow
++  information.
++
++It turns out that we can preserve these desirable properties in many cases,
++while still supporting the advanced flow isolation properties of sch_cake.
++This patch does so by reusing the skb->hash value as the flow_hash part of
++the hashing procedure in cake_hash() only in the following conditions:
++
++- If the skb->hash is marked as covering the flow headers (skb->l4_hash is
++  set)
++
++AND
++
++- NAT header rewriting is either disabled, or did not change any values
++  used for hashing. The latter is important to match local-origin packets
++  such as those of a tunnel endpoint.
++
++The immediate motivation for fixing this was the recent patch to WireGuard
++to preserve the skb->hash on encapsulation. As such, this is also what I
++tested against; with this patch, added latency under load for competing
++flows drops from ~8 ms to sub-1ms on an RRUL test over a WireGuard tunnel
++going through a virtual link shaped to 1Gbps using sch_cake. This matches
++the results we saw with a similar setup using sch_fq_codel when testing the
++WireGuard patch.
++
++Fixes: 046f6fd5daef ("sched: Add Common Applications Kept Enhanced (cake) qdisc")
++Signed-off-by: Toke Høiland-Jørgensen <toke@redhat.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
++---
++ net/sched/sch_cake.c | 65 ++++++++++++++++++++++++++++++++++----------
++ 1 file changed, 51 insertions(+), 14 deletions(-)
++
++--- a/net/sched/sch_cake.c
+++++ b/net/sched/sch_cake.c
++@@ -584,26 +584,48 @@ static bool cobalt_should_drop(struct co
++ 	return drop;
++ }
++ 
++-static void cake_update_flowkeys(struct flow_keys *keys,
+++static bool cake_update_flowkeys(struct flow_keys *keys,
++ 				 const struct sk_buff *skb)
++ {
++ #if IS_ENABLED(CONFIG_NF_CONNTRACK)
++ 	struct nf_conntrack_tuple tuple = {};
++-	bool rev = !skb->_nfct;
+++	bool rev = !skb->_nfct, upd = false;
+++	__be32 ip;
++ 
++ 	if (skb_protocol(skb, true) != htons(ETH_P_IP))
++-		return;
+++		return false;
++ 
++ 	if (!nf_ct_get_tuple_skb(&tuple, skb))
++-		return;
+++		return false;
++ 
++-	keys->addrs.v4addrs.src = rev ? tuple.dst.u3.ip : tuple.src.u3.ip;
++-	keys->addrs.v4addrs.dst = rev ? tuple.src.u3.ip : tuple.dst.u3.ip;
+++	ip = rev ? tuple.dst.u3.ip : tuple.src.u3.ip;
+++	if (ip != keys->addrs.v4addrs.src) {
+++		keys->addrs.v4addrs.src = ip;
+++		upd = true;
+++	}
+++	ip = rev ? tuple.src.u3.ip : tuple.dst.u3.ip;
+++	if (ip != keys->addrs.v4addrs.dst) {
+++		keys->addrs.v4addrs.dst = ip;
+++		upd = true;
+++	}
++ 
++ 	if (keys->ports.ports) {
++-		keys->ports.src = rev ? tuple.dst.u.all : tuple.src.u.all;
++-		keys->ports.dst = rev ? tuple.src.u.all : tuple.dst.u.all;
+++		__be16 port;
+++
+++		port = rev ? tuple.dst.u.all : tuple.src.u.all;
+++		if (port != keys->ports.src) {
+++			keys->ports.src = port;
+++			upd = true;
+++		}
+++		port = rev ? tuple.src.u.all : tuple.dst.u.all;
+++		if (port != keys->ports.dst) {
+++			port = keys->ports.dst;
+++			upd = true;
+++		}
++ 	}
+++	return upd;
+++#else
+++	return false;
++ #endif
++ }
++ 
++@@ -624,23 +646,36 @@ static bool cake_ddst(int flow_mode)
++ static u32 cake_hash(struct cake_tin_data *q, const struct sk_buff *skb,
++ 		     int flow_mode, u16 flow_override, u16 host_override)
++ {
+++	bool hash_flows = (!flow_override && !!(flow_mode & CAKE_FLOW_FLOWS));
+++	bool hash_hosts = (!host_override && !!(flow_mode & CAKE_FLOW_HOSTS));
+++	bool nat_enabled = !!(flow_mode & CAKE_FLOW_NAT_FLAG);
++ 	u32 flow_hash = 0, srchost_hash = 0, dsthost_hash = 0;
++ 	u16 reduced_hash, srchost_idx, dsthost_idx;
++ 	struct flow_keys keys, host_keys;
+++	bool use_skbhash = skb->l4_hash;
++ 
++ 	if (unlikely(flow_mode == CAKE_FLOW_NONE))
++ 		return 0;
++ 
++-	/* If both overrides are set we can skip packet dissection entirely */
++-	if ((flow_override || !(flow_mode & CAKE_FLOW_FLOWS)) &&
++-	    (host_override || !(flow_mode & CAKE_FLOW_HOSTS)))
+++	/* If both overrides are set, or we can use the SKB hash and nat mode is
+++	 * disabled, we can skip packet dissection entirely. If nat mode is
+++	 * enabled there's another check below after doing the conntrack lookup.
+++	 */
+++	if ((!hash_flows || (use_skbhash && !nat_enabled)) && !hash_hosts)
++ 		goto skip_hash;
++ 
++ 	skb_flow_dissect_flow_keys(skb, &keys,
++ 				   FLOW_DISSECTOR_F_STOP_AT_FLOW_LABEL);
++ 
++-	if (flow_mode & CAKE_FLOW_NAT_FLAG)
++-		cake_update_flowkeys(&keys, skb);
+++	/* Don't use the SKB hash if we change the lookup keys from conntrack */
+++	if (nat_enabled && cake_update_flowkeys(&keys, skb))
+++		use_skbhash = false;
+++
+++	/* If we can still use the SKB hash and don't need the host hash, we can
+++	 * skip the rest of the hashing procedure
+++	 */
+++	if (use_skbhash && !hash_hosts)
+++		goto skip_hash;
++ 
++ 	/* flow_hash_from_keys() sorts the addresses by value, so we have
++ 	 * to preserve their order in a separate data structure to treat
++@@ -679,12 +714,14 @@ static u32 cake_hash(struct cake_tin_dat
++ 	/* This *must* be after the above switch, since as a
++ 	 * side-effect it sorts the src and dst addresses.
++ 	 */
++-	if (flow_mode & CAKE_FLOW_FLOWS)
+++	if (hash_flows && !use_skbhash)
++ 		flow_hash = flow_hash_from_keys(&keys);
++ 
++ skip_hash:
++ 	if (flow_override)
++ 		flow_hash = flow_override - 1;
+++	else if (use_skbhash)
+++		flow_hash = skb->hash;
++ 	if (host_override) {
++ 		dsthost_hash = host_override - 1;
++ 		srchost_hash = host_override - 1;
+diff --git a/target/linux/generic/backport-5.4/399-5.9-sch_cake-add-RFC-8622-LE-PHB-support-to-CAKE-diffser.patch b/target/linux/generic/backport-5.4/399-5.9-sch_cake-add-RFC-8622-LE-PHB-support-to-CAKE-diffser.patch
+new file mode 100644
+index 0000000000..e171b4cec7
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/399-5.9-sch_cake-add-RFC-8622-LE-PHB-support-to-CAKE-diffser.patch
+@@ -0,0 +1,57 @@
++From b8392808eb3fc28e523e28cb258c81ca246deb9b Mon Sep 17 00:00:00 2001
++From: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
++Date: Thu, 25 Jun 2020 22:18:00 +0200
++Subject: [PATCH] sch_cake: add RFC 8622 LE PHB support to CAKE diffserv
++ handling
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++Change tin mapping on diffserv3, 4 & 8 for LE PHB support, in essence
++making LE a member of the Bulk tin.
++
++Bulk has the least priority and minimum of 1/16th total bandwidth in the
++face of higher priority traffic.
++
++NB: Diffserv 3 & 4 swap tin 0 & 1 priorities from the default order as
++found in diffserv8, in case anyone is wondering why it looks a bit odd.
++
++Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
++[ reword commit message slightly ]
++Signed-off-by: Toke Høiland-Jørgensen <toke@redhat.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ net/sched/sch_cake.c | 8 ++++----
++ 1 file changed, 4 insertions(+), 4 deletions(-)
++
++--- a/net/sched/sch_cake.c
+++++ b/net/sched/sch_cake.c
++@@ -312,8 +312,8 @@ static const u8 precedence[] = {
++ };
++ 
++ static const u8 diffserv8[] = {
++-	2, 5, 1, 2, 4, 2, 2, 2,
++-	0, 2, 1, 2, 1, 2, 1, 2,
+++	2, 0, 1, 2, 4, 2, 2, 2,
+++	1, 2, 1, 2, 1, 2, 1, 2,
++ 	5, 2, 4, 2, 4, 2, 4, 2,
++ 	3, 2, 3, 2, 3, 2, 3, 2,
++ 	6, 2, 3, 2, 3, 2, 3, 2,
++@@ -323,7 +323,7 @@ static const u8 diffserv8[] = {
++ };
++ 
++ static const u8 diffserv4[] = {
++-	0, 2, 0, 0, 2, 0, 0, 0,
+++	0, 1, 0, 0, 2, 0, 0, 0,
++ 	1, 0, 0, 0, 0, 0, 0, 0,
++ 	2, 0, 2, 0, 2, 0, 2, 0,
++ 	2, 0, 2, 0, 2, 0, 2, 0,
++@@ -334,7 +334,7 @@ static const u8 diffserv4[] = {
++ };
++ 
++ static const u8 diffserv3[] = {
++-	0, 0, 0, 0, 2, 0, 0, 0,
+++	0, 1, 0, 0, 2, 0, 0, 0,
++ 	1, 0, 0, 0, 0, 0, 0, 0,
++ 	0, 0, 0, 0, 0, 0, 0, 0,
++ 	0, 0, 0, 0, 0, 0, 0, 0,
+diff --git a/target/linux/generic/backport-5.4/400-v5.8-dt-bindings-mtd-partition-Document-the-slc-mode-prop.patch b/target/linux/generic/backport-5.4/400-v5.8-dt-bindings-mtd-partition-Document-the-slc-mode-prop.patch
+new file mode 100644
+index 0000000000..7926843686
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/400-v5.8-dt-bindings-mtd-partition-Document-the-slc-mode-prop.patch
+@@ -0,0 +1,28 @@
++From 422928a040fe17d17ded69c57903c7908423c7ef Mon Sep 17 00:00:00 2001
++From: Boris Brezillon <bbrezillon@kernel.org>
++Date: Sun, 3 May 2020 17:53:38 +0200
++Subject: [PATCH] dt-bindings: mtd: partition: Document the slc-mode property
++
++Add a boolean property to force a specific partition attached to an MLC
++NAND to be accessed in an emulated SLC mode this making this partition
++immune to paired-pages corruptions.
++
++Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
++Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
++Link: https://lore.kernel.org/linux-mtd/20200503155341.16712-6-miquel.raynal@bootlin.com
++---
++ Documentation/devicetree/bindings/mtd/partition.txt | 3 +++
++ 1 file changed, 3 insertions(+)
++
++--- a/Documentation/devicetree/bindings/mtd/partition.txt
+++++ b/Documentation/devicetree/bindings/mtd/partition.txt
++@@ -61,6 +61,9 @@ Optional properties:
++   clobbered.
++ - lock : Do not unlock the partition at initialization time (not supported on
++   all devices)
+++- slc-mode: This parameter, if present, allows one to emulate SLC mode on a
+++  partition attached to an MLC NAND thus making this partition immune to
+++  paired-pages corruptions
++ 
++ Examples:
++ 
+diff --git a/target/linux/generic/backport-5.4/401-v5.11-dt-bindings-mtd-convert-fixed-partitions-to-the-json.patch b/target/linux/generic/backport-5.4/401-v5.11-dt-bindings-mtd-convert-fixed-partitions-to-the-json.patch
+new file mode 100644
+index 0000000000..8aded43526
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/401-v5.11-dt-bindings-mtd-convert-fixed-partitions-to-the-json.patch
+@@ -0,0 +1,324 @@
++From 04e9ab75267489224364fa510a88ada83e11c325 Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
++Date: Thu, 10 Dec 2020 18:23:52 +0100
++Subject: [PATCH] dt-bindings: mtd: convert "fixed-partitions" to the
++ json-schema
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++This standardizes its documentation, allows validating with Makefile
++checks and helps writing DTS files.
++
++Noticeable changes:
++1. Dropped "Partitions can be represented by sub-nodes of a flash
++   device." as we also support subpartitions (don't have to be part of
++   flash device node)
++2. Dropped "to Linux" as bindings are meant to be os agnostic.
++
++Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
++Link: https://lore.kernel.org/r/20201210172352.31632-1-zajec5@gmail.com
++Signed-off-by: Rob Herring <robh@kernel.org>
++---
++ .../devicetree/bindings/mtd/partition.txt     | 131 +--------------
++ .../mtd/partitions/fixed-partitions.yaml      | 152 ++++++++++++++++++
++ 2 files changed, 154 insertions(+), 129 deletions(-)
++ create mode 100644 Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml
++
++--- a/Documentation/devicetree/bindings/mtd/partition.txt
+++++ b/Documentation/devicetree/bindings/mtd/partition.txt
++@@ -24,137 +24,10 @@ another partitioning method.
++ Available bindings are listed in the "partitions" subdirectory.
++ 
++ 
++-Fixed Partitions
++-================
++-
++-Partitions can be represented by sub-nodes of a flash device. This can be used
++-on platforms which have strong conventions about which portions of a flash are
++-used for what purposes, but which don't use an on-flash partition table such
++-as RedBoot.
++-
++-The partition table should be a subnode of the flash node and should be named
++-'partitions'. This node should have the following property:
++-- compatible : (required) must be "fixed-partitions"
++-Partitions are then defined in subnodes of the partitions node.
+++Deprecated: partitions defined in flash node
+++============================================
++ 
++ For backwards compatibility partitions as direct subnodes of the flash device are
++ supported. This use is discouraged.
++ NOTE: also for backwards compatibility, direct subnodes that have a compatible
++ string are not considered partitions, as they may be used for other bindings.
++-
++-#address-cells & #size-cells must both be present in the partitions subnode of the
++-flash device. There are two valid values for both:
++-<1>: for partitions that require a single 32-bit cell to represent their
++-     size/address (aka the value is below 4 GiB)
++-<2>: for partitions that require two 32-bit cells to represent their
++-     size/address (aka the value is 4 GiB or greater).
++-
++-Required properties:
++-- reg : The partition's offset and size within the flash
++-
++-Optional properties:
++-- label : The label / name for this partition.  If omitted, the label is taken
++-  from the node name (excluding the unit address).
++-- read-only : This parameter, if present, is a hint to Linux that this
++-  partition should only be mounted read-only. This is usually used for flash
++-  partitions containing early-boot firmware images or data which should not be
++-  clobbered.
++-- lock : Do not unlock the partition at initialization time (not supported on
++-  all devices)
++-- slc-mode: This parameter, if present, allows one to emulate SLC mode on a
++-  partition attached to an MLC NAND thus making this partition immune to
++-  paired-pages corruptions
++-
++-Examples:
++-
++-
++-flash@0 {
++-	partitions {
++-		compatible = "fixed-partitions";
++-		#address-cells = <1>;
++-		#size-cells = <1>;
++-
++-		partition@0 {
++-			label = "u-boot";
++-			reg = <0x0000000 0x100000>;
++-			read-only;
++-		};
++-
++-		uimage@100000 {
++-			reg = <0x0100000 0x200000>;
++-		};
++-	};
++-};
++-
++-flash@1 {
++-	partitions {
++-		compatible = "fixed-partitions";
++-		#address-cells = <1>;
++-		#size-cells = <2>;
++-
++-		/* a 4 GiB partition */
++-		partition@0 {
++-			label = "filesystem";
++-			reg = <0x00000000 0x1 0x00000000>;
++-		};
++-	};
++-};
++-
++-flash@2 {
++-	partitions {
++-		compatible = "fixed-partitions";
++-		#address-cells = <2>;
++-		#size-cells = <2>;
++-
++-		/* an 8 GiB partition */
++-		partition@0 {
++-			label = "filesystem #1";
++-			reg = <0x0 0x00000000 0x2 0x00000000>;
++-		};
++-
++-		/* a 4 GiB partition */
++-		partition@200000000 {
++-			label = "filesystem #2";
++-			reg = <0x2 0x00000000 0x1 0x00000000>;
++-		};
++-	};
++-};
++-
++-flash@3 {
++-	partitions {
++-		compatible = "fixed-partitions";
++-		#address-cells = <1>;
++-		#size-cells = <1>;
++-
++-		partition@0 {
++-			label = "bootloader";
++-			reg = <0x000000 0x100000>;
++-			read-only;
++-		};
++-
++-		firmware@100000 {
++-			label = "firmware";
++-			reg = <0x100000 0xe00000>;
++-			compatible = "brcm,trx";
++-		};
++-
++-		calibration@f00000 {
++-			label = "calibration";
++-			reg = <0xf00000 0x100000>;
++-			compatible = "fixed-partitions";
++-			ranges = <0 0xf00000 0x100000>;
++-			#address-cells = <1>;
++-			#size-cells = <1>;
++-
++-			partition@0 {
++-				label = "wifi0";
++-				reg = <0x000000 0x080000>;
++-			};
++-
++-			partition@80000 {
++-				label = "wifi1";
++-				reg = <0x080000 0x080000>;
++-			};
++-		};
++-	};
++-};
++--- /dev/null
+++++ b/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml
++@@ -0,0 +1,152 @@
+++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+++%YAML 1.2
+++---
+++$id: http://devicetree.org/schemas/mtd/partitions/fixed-partitions.yaml#
+++$schema: http://devicetree.org/meta-schemas/core.yaml#
+++
+++title: Fixed partitions
+++
+++description: |
+++  This binding can be used on platforms which have strong conventions about
+++  which portions of a flash are used for what purposes, but which don't use an
+++  on-flash partition table such as RedBoot.
+++
+++  The partition table should be a node named "partitions". Partitions are then
+++  defined as subnodes.
+++
+++maintainers:
+++  - Rafał Miłecki <rafal@milecki.pl>
+++
+++properties:
+++  compatible:
+++    const: fixed-partitions
+++
+++  "#address-cells": true
+++
+++  "#size-cells": true
+++
+++patternProperties:
+++  "@[0-9a-f]+$":
+++    description: node describing a single flash partition
+++    type: object
+++
+++    properties:
+++      reg:
+++        description: partition's offset and size within the flash
+++        maxItems: 1
+++
+++      label:
+++        description: The label / name for this partition. If omitted, the label
+++          is taken from the node name (excluding the unit address).
+++
+++      read-only:
+++        description: This parameter, if present, is a hint that this partition
+++          should only be mounted read-only. This is usually used for flash
+++          partitions containing early-boot firmware images or data which should
+++          not be clobbered.
+++        type: boolean
+++
+++      lock:
+++        description: Do not unlock the partition at initialization time (not
+++          supported on all devices)
+++        type: boolean
+++
+++      slc-mode:
+++        description: This parameter, if present, allows one to emulate SLC mode
+++          on a partition attached to an MLC NAND thus making this partition
+++          immune to paired-pages corruptions
+++        type: boolean
+++
+++    required:
+++      - reg
+++
+++required:
+++  - "#address-cells"
+++  - "#size-cells"
+++
+++additionalProperties: true
+++
+++examples:
+++  - |
+++    partitions {
+++        compatible = "fixed-partitions";
+++        #address-cells = <1>;
+++        #size-cells = <1>;
+++
+++        partition@0 {
+++            label = "u-boot";
+++            reg = <0x0000000 0x100000>;
+++            read-only;
+++        };
+++
+++        uimage@100000 {
+++            reg = <0x0100000 0x200000>;
+++        };
+++    };
+++  - |
+++    partitions {
+++        compatible = "fixed-partitions";
+++        #address-cells = <1>;
+++        #size-cells = <2>;
+++
+++        /* a 4 GiB partition */
+++        partition@0 {
+++            label = "filesystem";
+++            reg = <0x00000000 0x1 0x00000000>;
+++        };
+++    };
+++  - |
+++    partitions {
+++        compatible = "fixed-partitions";
+++        #address-cells = <2>;
+++        #size-cells = <2>;
+++
+++        /* an 8 GiB partition */
+++        partition@0 {
+++            label = "filesystem #1";
+++            reg = <0x0 0x00000000 0x2 0x00000000>;
+++        };
+++
+++        /* a 4 GiB partition */
+++        partition@200000000 {
+++            label = "filesystem #2";
+++            reg = <0x2 0x00000000 0x1 0x00000000>;
+++        };
+++    };
+++  - |
+++    partitions {
+++        compatible = "fixed-partitions";
+++        #address-cells = <1>;
+++        #size-cells = <1>;
+++
+++        partition@0 {
+++            label = "bootloader";
+++            reg = <0x000000 0x100000>;
+++            read-only;
+++        };
+++
+++        firmware@100000 {
+++            compatible = "brcm,trx";
+++            label = "firmware";
+++            reg = <0x100000 0xe00000>;
+++        };
+++
+++        calibration@f00000 {
+++            compatible = "fixed-partitions";
+++            label = "calibration";
+++            reg = <0xf00000 0x100000>;
+++            ranges = <0 0xf00000 0x100000>;
+++            #address-cells = <1>;
+++            #size-cells = <1>;
+++
+++            partition@0 {
+++                label = "wifi0";
+++                reg = <0x000000 0x080000>;
+++            };
+++
+++            partition@80000 {
+++                label = "wifi1";
+++                reg = <0x080000 0x080000>;
+++            };
+++        };
+++    };
+diff --git a/target/linux/generic/backport-5.4/402-v5.12-0001-dt-bindings-mtd-move-partition-binding-to-its-own-fi.patch b/target/linux/generic/backport-5.4/402-v5.12-0001-dt-bindings-mtd-move-partition-binding-to-its-own-fi.patch
+new file mode 100644
+index 0000000000..f3b1179ecd
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/402-v5.12-0001-dt-bindings-mtd-move-partition-binding-to-its-own-fi.patch
+@@ -0,0 +1,115 @@
++From 6418522022c706fd867b00b2571edba48b8fa8c7 Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
++Date: Thu, 11 Feb 2021 23:04:25 +0100
++Subject: [PATCH] dt-bindings: mtd: move partition binding to its own file
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++Single partition binding is quite common and may be:
++1. Used by multiple parsers
++2. Extended for more specific cases
++
++Move it to separated file to avoid code duplication.
++
++Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
++Reviewed-by: Rob Herring <robh@kernel.org>
++Signed-off-by: Richard Weinberger <richard@nod.at>
++---
++ .../mtd/partitions/fixed-partitions.yaml      | 33 +------------
++ .../bindings/mtd/partitions/partition.yaml    | 47 +++++++++++++++++++
++ 2 files changed, 48 insertions(+), 32 deletions(-)
++ create mode 100644 Documentation/devicetree/bindings/mtd/partitions/partition.yaml
++
++--- a/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml
+++++ b/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml
++@@ -27,38 +27,7 @@ properties:
++ 
++ patternProperties:
++   "@[0-9a-f]+$":
++-    description: node describing a single flash partition
++-    type: object
++-
++-    properties:
++-      reg:
++-        description: partition's offset and size within the flash
++-        maxItems: 1
++-
++-      label:
++-        description: The label / name for this partition. If omitted, the label
++-          is taken from the node name (excluding the unit address).
++-
++-      read-only:
++-        description: This parameter, if present, is a hint that this partition
++-          should only be mounted read-only. This is usually used for flash
++-          partitions containing early-boot firmware images or data which should
++-          not be clobbered.
++-        type: boolean
++-
++-      lock:
++-        description: Do not unlock the partition at initialization time (not
++-          supported on all devices)
++-        type: boolean
++-
++-      slc-mode:
++-        description: This parameter, if present, allows one to emulate SLC mode
++-          on a partition attached to an MLC NAND thus making this partition
++-          immune to paired-pages corruptions
++-        type: boolean
++-
++-    required:
++-      - reg
+++    $ref: "partition.yaml#"
++ 
++ required:
++   - "#address-cells"
++--- /dev/null
+++++ b/Documentation/devicetree/bindings/mtd/partitions/partition.yaml
++@@ -0,0 +1,47 @@
+++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+++%YAML 1.2
+++---
+++$id: http://devicetree.org/schemas/mtd/partitions/partition.yaml#
+++$schema: http://devicetree.org/meta-schemas/core.yaml#
+++
+++title: Partition
+++
+++description: |
+++  This binding describes a single flash partition. Each partition must have its
+++  relative offset and size specified. Depending on partition function extra
+++  properties can be used.
+++
+++maintainers:
+++  - Rafał Miłecki <rafal@milecki.pl>
+++
+++properties:
+++  reg:
+++    description: partition's offset and size within the flash
+++    maxItems: 1
+++
+++  label:
+++    description: The label / name for this partition. If omitted, the label
+++      is taken from the node name (excluding the unit address).
+++
+++  read-only:
+++    description: This parameter, if present, is a hint that this partition
+++      should only be mounted read-only. This is usually used for flash
+++      partitions containing early-boot firmware images or data which should
+++      not be clobbered.
+++    type: boolean
+++
+++  lock:
+++    description: Do not unlock the partition at initialization time (not
+++      supported on all devices)
+++    type: boolean
+++
+++  slc-mode:
+++    description: This parameter, if present, allows one to emulate SLC mode
+++      on a partition attached to an MLC NAND thus making this partition
+++      immune to paired-pages corruptions
+++    type: boolean
+++
+++required:
+++  - reg
+++
+++additionalProperties: true
+diff --git a/target/linux/generic/backport-5.4/402-v5.12-0002-dt-bindings-mtd-add-binding-for-BCM4908-partitions.patch b/target/linux/generic/backport-5.4/402-v5.12-0002-dt-bindings-mtd-add-binding-for-BCM4908-partitions.patch
+new file mode 100644
+index 0000000000..8576c7d78d
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/402-v5.12-0002-dt-bindings-mtd-add-binding-for-BCM4908-partitions.patch
+@@ -0,0 +1,92 @@
++From 6e9dff6fe3fbc452f16566e4a7e293b0decefdba Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
++Date: Thu, 11 Feb 2021 23:04:26 +0100
++Subject: [PATCH] dt-bindings: mtd: add binding for BCM4908 partitions
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++BCM4908 uses fixed partitions layout but function of some partitions may
++vary. Some devices use multiple firmware partitions and those partitions
++should be marked to let system discover their purpose.
++
++Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
++Signed-off-by: Richard Weinberger <richard@nod.at>
++---
++ .../partitions/brcm,bcm4908-partitions.yaml   | 70 +++++++++++++++++++
++ 1 file changed, 70 insertions(+)
++ create mode 100644 Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml
++
++--- /dev/null
+++++ b/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml
++@@ -0,0 +1,70 @@
+++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+++%YAML 1.2
+++---
+++$id: http://devicetree.org/schemas/mtd/partitions/brcm,bcm4908-partitions.yaml#
+++$schema: http://devicetree.org/meta-schemas/core.yaml#
+++
+++title: Broadcom BCM4908 partitioning
+++
+++description: |
+++  Broadcom BCM4908 CFE bootloader supports two firmware partitions. One is used
+++  for regular booting, the other is treated as fallback.
+++
+++  This binding allows defining all fixed partitions and marking those containing
+++  firmware. System can use that information e.g. for booting or flashing
+++  purposes.
+++
+++maintainers:
+++  - Rafał Miłecki <rafal@milecki.pl>
+++
+++properties:
+++  compatible:
+++    const: brcm,bcm4908-partitions
+++
+++  "#address-cells":
+++    enum: [ 1, 2 ]
+++
+++  "#size-cells":
+++    enum: [ 1, 2 ]
+++
+++patternProperties:
+++  "^partition@[0-9a-f]+$":
+++    $ref: "partition.yaml#"
+++    properties:
+++      compatible:
+++        const: brcm,bcm4908-firmware
+++    unevaluatedProperties: false
+++
+++required:
+++  - "#address-cells"
+++  - "#size-cells"
+++
+++additionalProperties: false
+++
+++examples:
+++  - |
+++    partitions {
+++        compatible = "brcm,bcm4908-partitions";
+++        #address-cells = <1>;
+++        #size-cells = <1>;
+++
+++        partition@0 {
+++            label = "cferom";
+++            reg = <0x0 0x100000>;
+++        };
+++
+++        partition@100000 {
+++            compatible = "brcm,bcm4908-firmware";
+++            reg = <0x100000 0xf00000>;
+++        };
+++
+++        partition@1000000 {
+++            compatible = "brcm,bcm4908-firmware";
+++            reg = <0x1000000 0xf00000>;
+++        };
+++
+++        partition@1f00000 {
+++            label = "calibration";
+++            reg = <0x1f00000 0x100000>;
+++        };
+++    };
+diff --git a/target/linux/generic/backport-5.4/403-v5.13-mtd-parsers-ofpart-support-BCM4908-fixed-partitions.patch b/target/linux/generic/backport-5.4/403-v5.13-mtd-parsers-ofpart-support-BCM4908-fixed-partitions.patch
+new file mode 100644
+index 0000000000..8f292bd177
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/403-v5.13-mtd-parsers-ofpart-support-BCM4908-fixed-partitions.patch
+@@ -0,0 +1,648 @@
++From afbef8efb591792579c633a7c545f914c6165f82 Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
++Date: Thu, 11 Feb 2021 23:04:27 +0100
++Subject: [PATCH] mtd: parsers: ofpart: support BCM4908 fixed partitions
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++Some devices use fixed partitioning with some partitions requiring some
++extra logic. E.g. BCM4908 may have multiple firmware partitions but
++detecting currently used one requires checking bootloader parameters.
++
++To support such cases without duplicating a lot of code (without copying
++most of the ofpart.c code) support for post-parsing callback was added.
++
++BCM4908 support in ofpart can be enabled using config option and results
++in compiling & executing a specific callback. It simply reads offset of
++currently used firmware partition from the DT. Bootloader specifies it
++using the "brcm_blparms" property.
++
++Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
++---
++ drivers/mtd/parsers/Kconfig                   |  9 +++
++ drivers/mtd/parsers/Makefile                  |  2 +
++ drivers/mtd/parsers/ofpart_bcm4908.c          | 64 +++++++++++++++++++
++ drivers/mtd/parsers/ofpart_bcm4908.h          | 15 +++++
++ .../mtd/parsers/{ofpart.c => ofpart_core.c}   | 28 +++++++-
++ 5 files changed, 116 insertions(+), 2 deletions(-)
++ create mode 100644 drivers/mtd/parsers/ofpart_bcm4908.c
++ create mode 100644 drivers/mtd/parsers/ofpart_bcm4908.h
++ rename drivers/mtd/parsers/{ofpart.c => ofpart_core.c} (88%)
++
++--- a/drivers/mtd/parsers/Kconfig
+++++ b/drivers/mtd/parsers/Kconfig
++@@ -67,6 +67,15 @@ config MTD_OF_PARTS
++ 	  flash memory node, as described in
++ 	  Documentation/devicetree/bindings/mtd/partition.txt.
++ 
+++config MTD_OF_PARTS_BCM4908
+++	bool "BCM4908 partitioning support"
+++	depends on MTD_OF_PARTS && (ARCH_BCM4908 || COMPILE_TEST)
+++	default ARCH_BCM4908
+++	help
+++	  This provides partitions parser for BCM4908 family devices
+++	  that can have multiple "firmware" partitions. It takes care of
+++	  finding currently used one and backup ones.
+++
++ config MTD_PARSER_IMAGETAG
++ 	tristate "Parser for BCM963XX Image Tag format partitions"
++ 	depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST
++--- a/drivers/mtd/parsers/Makefile
+++++ b/drivers/mtd/parsers/Makefile
++@@ -4,6 +4,8 @@ obj-$(CONFIG_MTD_BCM47XX_PARTS)		+= bcm4
++ obj-$(CONFIG_MTD_BCM63XX_PARTS)		+= bcm63xxpart.o
++ obj-$(CONFIG_MTD_CMDLINE_PARTS)		+= cmdlinepart.o
++ obj-$(CONFIG_MTD_OF_PARTS)		+= ofpart.o
+++ofpart-y				+= ofpart_core.o
+++ofpart-$(CONFIG_MTD_OF_PARTS_BCM4908)	+= ofpart_bcm4908.o
++ obj-$(CONFIG_MTD_PARSER_IMAGETAG)	+= parser_imagetag.o
++ obj-$(CONFIG_MTD_AFS_PARTS)		+= afs.o
++ obj-$(CONFIG_MTD_PARSER_TRX)		+= parser_trx.o
++--- /dev/null
+++++ b/drivers/mtd/parsers/ofpart_bcm4908.c
++@@ -0,0 +1,64 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl>
+++ */
+++
+++#include <linux/module.h>
+++#include <linux/init.h>
+++#include <linux/of.h>
+++#include <linux/mtd/mtd.h>
+++#include <linux/slab.h>
+++#include <linux/mtd/partitions.h>
+++
+++#include "ofpart_bcm4908.h"
+++
+++#define BLPARAMS_FW_OFFSET		"NAND_RFS_OFS"
+++
+++static long long bcm4908_partitions_fw_offset(void)
+++{
+++	struct device_node *root;
+++	struct property *prop;
+++	const char *s;
+++
+++	root = of_find_node_by_path("/");
+++	if (!root)
+++		return -ENOENT;
+++
+++	of_property_for_each_string(root, "brcm_blparms", prop, s) {
+++		size_t len = strlen(BLPARAMS_FW_OFFSET);
+++		unsigned long offset;
+++		int err;
+++
+++		if (strncmp(s, BLPARAMS_FW_OFFSET, len) || s[len] != '=')
+++			continue;
+++
+++		err = kstrtoul(s + len + 1, 0, &offset);
+++		if (err) {
+++			pr_err("failed to parse %s\n", s + len + 1);
+++			return err;
+++		}
+++
+++		return offset << 10;
+++	}
+++
+++	return -ENOENT;
+++}
+++
+++int bcm4908_partitions_post_parse(struct mtd_info *mtd, struct mtd_partition *parts, int nr_parts)
+++{
+++	long long fw_offset;
+++	int i;
+++
+++	fw_offset = bcm4908_partitions_fw_offset();
+++
+++	for (i = 0; i < nr_parts; i++) {
+++		if (of_device_is_compatible(parts[i].of_node, "brcm,bcm4908-firmware")) {
+++			if (fw_offset < 0 || parts[i].offset == fw_offset)
+++				parts[i].name = "firmware";
+++			else
+++				parts[i].name = "backup";
+++		}
+++	}
+++
+++	return 0;
+++}
++--- /dev/null
+++++ b/drivers/mtd/parsers/ofpart_bcm4908.h
++@@ -0,0 +1,15 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++#ifndef __BCM4908_PARTITIONS_H
+++#define __BCM4908_PARTITIONS_H
+++
+++#ifdef CONFIG_MTD_OF_PARTS_BCM4908
+++int bcm4908_partitions_post_parse(struct mtd_info *mtd, struct mtd_partition *parts, int nr_parts);
+++#else
+++static inline int bcm4908_partitions_post_parse(struct mtd_info *mtd, struct mtd_partition *parts,
+++						int nr_parts)
+++{
+++	return -EOPNOTSUPP;
+++}
+++#endif
+++
+++#endif
++--- a/drivers/mtd/parsers/ofpart.c
+++++ /dev/null
++@@ -1,236 +0,0 @@
++-// SPDX-License-Identifier: GPL-2.0-or-later
++-/*
++- * Flash partitions described by the OF (or flattened) device tree
++- *
++- * Copyright © 2006 MontaVista Software Inc.
++- * Author: Vitaly Wool <vwool@ru.mvista.com>
++- *
++- * Revised to handle newer style flash binding by:
++- *   Copyright © 2007 David Gibson, IBM Corporation.
++- */
++-
++-#include <linux/module.h>
++-#include <linux/init.h>
++-#include <linux/of.h>
++-#include <linux/mtd/mtd.h>
++-#include <linux/slab.h>
++-#include <linux/mtd/partitions.h>
++-
++-static bool node_has_compatible(struct device_node *pp)
++-{
++-	return of_get_property(pp, "compatible", NULL);
++-}
++-
++-static int parse_fixed_partitions(struct mtd_info *master,
++-				  const struct mtd_partition **pparts,
++-				  struct mtd_part_parser_data *data)
++-{
++-	struct mtd_partition *parts;
++-	struct device_node *mtd_node;
++-	struct device_node *ofpart_node;
++-	const char *partname;
++-	struct device_node *pp;
++-	int nr_parts, i, ret = 0;
++-	bool dedicated = true;
++-
++-
++-	/* Pull of_node from the master device node */
++-	mtd_node = mtd_get_of_node(master);
++-	if (!mtd_node)
++-		return 0;
++-
++-	ofpart_node = of_get_child_by_name(mtd_node, "partitions");
++-	if (!ofpart_node) {
++-		/*
++-		 * We might get here even when ofpart isn't used at all (e.g.,
++-		 * when using another parser), so don't be louder than
++-		 * KERN_DEBUG
++-		 */
++-		pr_debug("%s: 'partitions' subnode not found on %pOF. Trying to parse direct subnodes as partitions.\n",
++-			 master->name, mtd_node);
++-		ofpart_node = mtd_node;
++-		dedicated = false;
++-	} else if (!of_device_is_compatible(ofpart_node, "fixed-partitions")) {
++-		/* The 'partitions' subnode might be used by another parser */
++-		return 0;
++-	}
++-
++-	/* First count the subnodes */
++-	nr_parts = 0;
++-	for_each_child_of_node(ofpart_node,  pp) {
++-		if (!dedicated && node_has_compatible(pp))
++-			continue;
++-
++-		nr_parts++;
++-	}
++-
++-	if (nr_parts == 0)
++-		return 0;
++-
++-	parts = kcalloc(nr_parts, sizeof(*parts), GFP_KERNEL);
++-	if (!parts)
++-		return -ENOMEM;
++-
++-	i = 0;
++-	for_each_child_of_node(ofpart_node,  pp) {
++-		const __be32 *reg;
++-		int len;
++-		int a_cells, s_cells;
++-
++-		if (!dedicated && node_has_compatible(pp))
++-			continue;
++-
++-		reg = of_get_property(pp, "reg", &len);
++-		if (!reg) {
++-			if (dedicated) {
++-				pr_debug("%s: ofpart partition %pOF (%pOF) missing reg property.\n",
++-					 master->name, pp,
++-					 mtd_node);
++-				goto ofpart_fail;
++-			} else {
++-				nr_parts--;
++-				continue;
++-			}
++-		}
++-
++-		a_cells = of_n_addr_cells(pp);
++-		s_cells = of_n_size_cells(pp);
++-		if (len / 4 != a_cells + s_cells) {
++-			pr_debug("%s: ofpart partition %pOF (%pOF) error parsing reg property.\n",
++-				 master->name, pp,
++-				 mtd_node);
++-			goto ofpart_fail;
++-		}
++-
++-		parts[i].offset = of_read_number(reg, a_cells);
++-		parts[i].size = of_read_number(reg + a_cells, s_cells);
++-		parts[i].of_node = pp;
++-
++-		partname = of_get_property(pp, "label", &len);
++-		if (!partname)
++-			partname = of_get_property(pp, "name", &len);
++-		parts[i].name = partname;
++-
++-		if (of_get_property(pp, "read-only", &len))
++-			parts[i].mask_flags |= MTD_WRITEABLE;
++-
++-		if (of_get_property(pp, "lock", &len))
++-			parts[i].mask_flags |= MTD_POWERUP_LOCK;
++-
++-		i++;
++-	}
++-
++-	if (!nr_parts)
++-		goto ofpart_none;
++-
++-	*pparts = parts;
++-	return nr_parts;
++-
++-ofpart_fail:
++-	pr_err("%s: error parsing ofpart partition %pOF (%pOF)\n",
++-	       master->name, pp, mtd_node);
++-	ret = -EINVAL;
++-ofpart_none:
++-	of_node_put(pp);
++-	kfree(parts);
++-	return ret;
++-}
++-
++-static const struct of_device_id parse_ofpart_match_table[] = {
++-	{ .compatible = "fixed-partitions" },
++-	{},
++-};
++-MODULE_DEVICE_TABLE(of, parse_ofpart_match_table);
++-
++-static struct mtd_part_parser ofpart_parser = {
++-	.parse_fn = parse_fixed_partitions,
++-	.name = "fixed-partitions",
++-	.of_match_table = parse_ofpart_match_table,
++-};
++-
++-static int parse_ofoldpart_partitions(struct mtd_info *master,
++-				      const struct mtd_partition **pparts,
++-				      struct mtd_part_parser_data *data)
++-{
++-	struct mtd_partition *parts;
++-	struct device_node *dp;
++-	int i, plen, nr_parts;
++-	const struct {
++-		__be32 offset, len;
++-	} *part;
++-	const char *names;
++-
++-	/* Pull of_node from the master device node */
++-	dp = mtd_get_of_node(master);
++-	if (!dp)
++-		return 0;
++-
++-	part = of_get_property(dp, "partitions", &plen);
++-	if (!part)
++-		return 0; /* No partitions found */
++-
++-	pr_warn("Device tree uses obsolete partition map binding: %pOF\n", dp);
++-
++-	nr_parts = plen / sizeof(part[0]);
++-
++-	parts = kcalloc(nr_parts, sizeof(*parts), GFP_KERNEL);
++-	if (!parts)
++-		return -ENOMEM;
++-
++-	names = of_get_property(dp, "partition-names", &plen);
++-
++-	for (i = 0; i < nr_parts; i++) {
++-		parts[i].offset = be32_to_cpu(part->offset);
++-		parts[i].size   = be32_to_cpu(part->len) & ~1;
++-		/* bit 0 set signifies read only partition */
++-		if (be32_to_cpu(part->len) & 1)
++-			parts[i].mask_flags = MTD_WRITEABLE;
++-
++-		if (names && (plen > 0)) {
++-			int len = strlen(names) + 1;
++-
++-			parts[i].name = names;
++-			plen -= len;
++-			names += len;
++-		} else {
++-			parts[i].name = "unnamed";
++-		}
++-
++-		part++;
++-	}
++-
++-	*pparts = parts;
++-	return nr_parts;
++-}
++-
++-static struct mtd_part_parser ofoldpart_parser = {
++-	.parse_fn = parse_ofoldpart_partitions,
++-	.name = "ofoldpart",
++-};
++-
++-static int __init ofpart_parser_init(void)
++-{
++-	register_mtd_parser(&ofpart_parser);
++-	register_mtd_parser(&ofoldpart_parser);
++-	return 0;
++-}
++-
++-static void __exit ofpart_parser_exit(void)
++-{
++-	deregister_mtd_parser(&ofpart_parser);
++-	deregister_mtd_parser(&ofoldpart_parser);
++-}
++-
++-module_init(ofpart_parser_init);
++-module_exit(ofpart_parser_exit);
++-
++-MODULE_LICENSE("GPL");
++-MODULE_DESCRIPTION("Parser for MTD partitioning information in device tree");
++-MODULE_AUTHOR("Vitaly Wool, David Gibson");
++-/*
++- * When MTD core cannot find the requested parser, it tries to load the module
++- * with the same name. Since we provide the ofoldpart parser, we should have
++- * the corresponding alias.
++- */
++-MODULE_ALIAS("fixed-partitions");
++-MODULE_ALIAS("ofoldpart");
++--- /dev/null
+++++ b/drivers/mtd/parsers/ofpart_core.c
++@@ -0,0 +1,260 @@
+++// SPDX-License-Identifier: GPL-2.0-or-later
+++/*
+++ * Flash partitions described by the OF (or flattened) device tree
+++ *
+++ * Copyright © 2006 MontaVista Software Inc.
+++ * Author: Vitaly Wool <vwool@ru.mvista.com>
+++ *
+++ * Revised to handle newer style flash binding by:
+++ *   Copyright © 2007 David Gibson, IBM Corporation.
+++ */
+++
+++#include <linux/module.h>
+++#include <linux/init.h>
+++#include <linux/of.h>
+++#include <linux/mtd/mtd.h>
+++#include <linux/slab.h>
+++#include <linux/mtd/partitions.h>
+++
+++#include "ofpart_bcm4908.h"
+++
+++struct fixed_partitions_quirks {
+++	int (*post_parse)(struct mtd_info *mtd, struct mtd_partition *parts, int nr_parts);
+++};
+++
+++struct fixed_partitions_quirks bcm4908_partitions_quirks = {
+++	.post_parse = bcm4908_partitions_post_parse,
+++};
+++
+++static const struct of_device_id parse_ofpart_match_table[];
+++
+++static bool node_has_compatible(struct device_node *pp)
+++{
+++	return of_get_property(pp, "compatible", NULL);
+++}
+++
+++static int parse_fixed_partitions(struct mtd_info *master,
+++				  const struct mtd_partition **pparts,
+++				  struct mtd_part_parser_data *data)
+++{
+++	const struct fixed_partitions_quirks *quirks;
+++	const struct of_device_id *of_id;
+++	struct mtd_partition *parts;
+++	struct device_node *mtd_node;
+++	struct device_node *ofpart_node;
+++	const char *partname;
+++	struct device_node *pp;
+++	int nr_parts, i, ret = 0;
+++	bool dedicated = true;
+++
+++	/* Pull of_node from the master device node */
+++	mtd_node = mtd_get_of_node(master);
+++	if (!mtd_node)
+++		return 0;
+++
+++	ofpart_node = of_get_child_by_name(mtd_node, "partitions");
+++	if (!ofpart_node) {
+++		/*
+++		 * We might get here even when ofpart isn't used at all (e.g.,
+++		 * when using another parser), so don't be louder than
+++		 * KERN_DEBUG
+++		 */
+++		pr_debug("%s: 'partitions' subnode not found on %pOF. Trying to parse direct subnodes as partitions.\n",
+++			 master->name, mtd_node);
+++		ofpart_node = mtd_node;
+++		dedicated = false;
+++	}
+++
+++	of_id = of_match_node(parse_ofpart_match_table, ofpart_node);
+++	if (dedicated && !of_id) {
+++		/* The 'partitions' subnode might be used by another parser */
+++		return 0;
+++	}
+++
+++	quirks = of_id ? of_id->data : NULL;
+++
+++	/* First count the subnodes */
+++	nr_parts = 0;
+++	for_each_child_of_node(ofpart_node,  pp) {
+++		if (!dedicated && node_has_compatible(pp))
+++			continue;
+++
+++		nr_parts++;
+++	}
+++
+++	if (nr_parts == 0)
+++		return 0;
+++
+++	parts = kcalloc(nr_parts, sizeof(*parts), GFP_KERNEL);
+++	if (!parts)
+++		return -ENOMEM;
+++
+++	i = 0;
+++	for_each_child_of_node(ofpart_node,  pp) {
+++		const __be32 *reg;
+++		int len;
+++		int a_cells, s_cells;
+++
+++		if (!dedicated && node_has_compatible(pp))
+++			continue;
+++
+++		reg = of_get_property(pp, "reg", &len);
+++		if (!reg) {
+++			if (dedicated) {
+++				pr_debug("%s: ofpart partition %pOF (%pOF) missing reg property.\n",
+++					 master->name, pp,
+++					 mtd_node);
+++				goto ofpart_fail;
+++			} else {
+++				nr_parts--;
+++				continue;
+++			}
+++		}
+++
+++		a_cells = of_n_addr_cells(pp);
+++		s_cells = of_n_size_cells(pp);
+++		if (len / 4 != a_cells + s_cells) {
+++			pr_debug("%s: ofpart partition %pOF (%pOF) error parsing reg property.\n",
+++				 master->name, pp,
+++				 mtd_node);
+++			goto ofpart_fail;
+++		}
+++
+++		parts[i].offset = of_read_number(reg, a_cells);
+++		parts[i].size = of_read_number(reg + a_cells, s_cells);
+++		parts[i].of_node = pp;
+++
+++		partname = of_get_property(pp, "label", &len);
+++		if (!partname)
+++			partname = of_get_property(pp, "name", &len);
+++		parts[i].name = partname;
+++
+++		if (of_get_property(pp, "read-only", &len))
+++			parts[i].mask_flags |= MTD_WRITEABLE;
+++
+++		if (of_get_property(pp, "lock", &len))
+++			parts[i].mask_flags |= MTD_POWERUP_LOCK;
+++
+++		i++;
+++	}
+++
+++	if (!nr_parts)
+++		goto ofpart_none;
+++
+++	if (quirks && quirks->post_parse)
+++		quirks->post_parse(master, parts, nr_parts);
+++
+++	*pparts = parts;
+++	return nr_parts;
+++
+++ofpart_fail:
+++	pr_err("%s: error parsing ofpart partition %pOF (%pOF)\n",
+++	       master->name, pp, mtd_node);
+++	ret = -EINVAL;
+++ofpart_none:
+++	of_node_put(pp);
+++	kfree(parts);
+++	return ret;
+++}
+++
+++static const struct of_device_id parse_ofpart_match_table[] = {
+++	/* Generic */
+++	{ .compatible = "fixed-partitions" },
+++	/* Customized */
+++	{ .compatible = "brcm,bcm4908-partitions", .data = &bcm4908_partitions_quirks, },
+++	{},
+++};
+++MODULE_DEVICE_TABLE(of, parse_ofpart_match_table);
+++
+++static struct mtd_part_parser ofpart_parser = {
+++	.parse_fn = parse_fixed_partitions,
+++	.name = "fixed-partitions",
+++	.of_match_table = parse_ofpart_match_table,
+++};
+++
+++static int parse_ofoldpart_partitions(struct mtd_info *master,
+++				      const struct mtd_partition **pparts,
+++				      struct mtd_part_parser_data *data)
+++{
+++	struct mtd_partition *parts;
+++	struct device_node *dp;
+++	int i, plen, nr_parts;
+++	const struct {
+++		__be32 offset, len;
+++	} *part;
+++	const char *names;
+++
+++	/* Pull of_node from the master device node */
+++	dp = mtd_get_of_node(master);
+++	if (!dp)
+++		return 0;
+++
+++	part = of_get_property(dp, "partitions", &plen);
+++	if (!part)
+++		return 0; /* No partitions found */
+++
+++	pr_warn("Device tree uses obsolete partition map binding: %pOF\n", dp);
+++
+++	nr_parts = plen / sizeof(part[0]);
+++
+++	parts = kcalloc(nr_parts, sizeof(*parts), GFP_KERNEL);
+++	if (!parts)
+++		return -ENOMEM;
+++
+++	names = of_get_property(dp, "partition-names", &plen);
+++
+++	for (i = 0; i < nr_parts; i++) {
+++		parts[i].offset = be32_to_cpu(part->offset);
+++		parts[i].size   = be32_to_cpu(part->len) & ~1;
+++		/* bit 0 set signifies read only partition */
+++		if (be32_to_cpu(part->len) & 1)
+++			parts[i].mask_flags = MTD_WRITEABLE;
+++
+++		if (names && (plen > 0)) {
+++			int len = strlen(names) + 1;
+++
+++			parts[i].name = names;
+++			plen -= len;
+++			names += len;
+++		} else {
+++			parts[i].name = "unnamed";
+++		}
+++
+++		part++;
+++	}
+++
+++	*pparts = parts;
+++	return nr_parts;
+++}
+++
+++static struct mtd_part_parser ofoldpart_parser = {
+++	.parse_fn = parse_ofoldpart_partitions,
+++	.name = "ofoldpart",
+++};
+++
+++static int __init ofpart_parser_init(void)
+++{
+++	register_mtd_parser(&ofpart_parser);
+++	register_mtd_parser(&ofoldpart_parser);
+++	return 0;
+++}
+++
+++static void __exit ofpart_parser_exit(void)
+++{
+++	deregister_mtd_parser(&ofpart_parser);
+++	deregister_mtd_parser(&ofoldpart_parser);
+++}
+++
+++module_init(ofpart_parser_init);
+++module_exit(ofpart_parser_exit);
+++
+++MODULE_LICENSE("GPL");
+++MODULE_DESCRIPTION("Parser for MTD partitioning information in device tree");
+++MODULE_AUTHOR("Vitaly Wool, David Gibson");
+++/*
+++ * When MTD core cannot find the requested parser, it tries to load the module
+++ * with the same name. Since we provide the ofoldpart parser, we should have
+++ * the corresponding alias.
+++ */
+++MODULE_ALIAS("fixed-partitions");
+++MODULE_ALIAS("ofoldpart");
+diff --git a/target/linux/generic/backport-5.4/404-v5.13-mtd-parsers-ofpart-limit-parsing-of-deprecated-DT-sy.patch b/target/linux/generic/backport-5.4/404-v5.13-mtd-parsers-ofpart-limit-parsing-of-deprecated-DT-sy.patch
+new file mode 100644
+index 0000000000..35058adba7
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/404-v5.13-mtd-parsers-ofpart-limit-parsing-of-deprecated-DT-sy.patch
+@@ -0,0 +1,69 @@
++From 2d751203aacf86a1b301a188d8551c7da91043ab Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
++Date: Tue, 2 Mar 2021 20:00:12 +0100
++Subject: [PATCH] mtd: parsers: ofpart: limit parsing of deprecated DT syntax
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++For backward compatibility ofpart still supports the old syntax like:
++spi-flash@0 {
++	compatible = "jedec,spi-nor";
++	reg = <0x0>;
++
++	partition@0 {
++		label = "bootloader";
++		reg = <0x0 0x100000>;
++	};
++};
++(without "partitions" subnode).
++
++There is no reason however to support nested partitions without a clear
++"compatible" string like:
++partitions {
++	compatible = "fixed-partitions";
++	#address-cells = <1>;
++	#size-cells = <1>;
++
++	partition@0 {
++		label = "bootloader";
++		reg = <0x0 0x100000>;
++
++		partition@0 {
++			label = "config";
++			reg = <0x80000 0x80000>;
++		};
++	};
++};
++(we never officially supported or documented that).
++
++Make sure ofpart doesn't attempt to parse above.
++
++Cc: Ansuel Smith <ansuelsmth@gmail.com>
++Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
++Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
++Link: https://lore.kernel.org/linux-mtd/20210302190012.1255-1-zajec5@gmail.com
++---
++ drivers/mtd/parsers/ofpart_core.c | 4 +++-
++ 1 file changed, 3 insertions(+), 1 deletion(-)
++
++--- a/drivers/mtd/parsers/ofpart_core.c
+++++ b/drivers/mtd/parsers/ofpart_core.c
++@@ -53,7 +53,7 @@ static int parse_fixed_partitions(struct
++ 		return 0;
++ 
++ 	ofpart_node = of_get_child_by_name(mtd_node, "partitions");
++-	if (!ofpart_node) {
+++	if (!ofpart_node && !mtd_is_partition(master)) {
++ 		/*
++ 		 * We might get here even when ofpart isn't used at all (e.g.,
++ 		 * when using another parser), so don't be louder than
++@@ -64,6 +64,8 @@ static int parse_fixed_partitions(struct
++ 		ofpart_node = mtd_node;
++ 		dedicated = false;
++ 	}
+++	if (!ofpart_node)
+++		return 0;
++ 
++ 	of_id = of_match_node(parse_ofpart_match_table, ofpart_node);
++ 	if (dedicated && !of_id) {
+diff --git a/target/linux/generic/backport-5.4/405-v5.13-mtd-parsers-ofpart-make-symbol-bcm4908_partitions_qu.patch b/target/linux/generic/backport-5.4/405-v5.13-mtd-parsers-ofpart-make-symbol-bcm4908_partitions_qu.patch
+new file mode 100644
+index 0000000000..f1b778a6e1
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/405-v5.13-mtd-parsers-ofpart-make-symbol-bcm4908_partitions_qu.patch
+@@ -0,0 +1,34 @@
++From b87b6d2d6f540e29c3f98e1572d64e560d73d6c1 Mon Sep 17 00:00:00 2001
++From: Wei Yongjun <weiyongjun1@huawei.com>
++Date: Thu, 4 Mar 2021 06:46:00 +0000
++Subject: [PATCH] mtd: parsers: ofpart: make symbol 'bcm4908_partitions_quirks'
++ static
++
++The sparse tool complains as follows:
++
++drivers/mtd/parsers/ofpart_core.c:25:32: warning:
++ symbol 'bcm4908_partitions_quirks' was not declared. Should it be static?
++
++This symbol is not used outside of ofpart_core.c, so this
++commit marks it static.
++
++Fixes: 457da931b608 ("mtd: parsers: ofpart: support BCM4908 fixed partitions")
++Reported-by: Hulk Robot <hulkci@huawei.com>
++Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
++Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
++Link: https://lore.kernel.org/linux-mtd/20210304064600.3279138-1-weiyongjun1@huawei.com
++---
++ drivers/mtd/parsers/ofpart_core.c | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/mtd/parsers/ofpart_core.c
+++++ b/drivers/mtd/parsers/ofpart_core.c
++@@ -22,7 +22,7 @@ struct fixed_partitions_quirks {
++ 	int (*post_parse)(struct mtd_info *mtd, struct mtd_partition *parts, int nr_parts);
++ };
++ 
++-struct fixed_partitions_quirks bcm4908_partitions_quirks = {
+++static struct fixed_partitions_quirks bcm4908_partitions_quirks = {
++ 	.post_parse = bcm4908_partitions_post_parse,
++ };
++ 
+diff --git a/target/linux/generic/backport-5.4/406-v5.13-0001-mtd-core-add-nvmem-cells-compatible-to-parse-mtd-as-.patch b/target/linux/generic/backport-5.4/406-v5.13-0001-mtd-core-add-nvmem-cells-compatible-to-parse-mtd-as-.patch
+new file mode 100644
+index 0000000000..ecea743d87
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/406-v5.13-0001-mtd-core-add-nvmem-cells-compatible-to-parse-mtd-as-.patch
+@@ -0,0 +1,40 @@
++From 658c4448bbbf02a143abf1b89d09a3337ebd3ba6 Mon Sep 17 00:00:00 2001
++From: Ansuel Smith <ansuelsmth@gmail.com>
++Date: Fri, 12 Mar 2021 07:28:19 +0100
++Subject: [PATCH] mtd: core: add nvmem-cells compatible to parse mtd as nvmem
++ cells
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++Partitions that contains the nvmem-cells compatible will register
++their direct subonodes as nvmem cells and the node will be treated as a
++nvmem provider.
++
++Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
++Tested-by: Rafał Miłecki <rafal@milecki.pl>
++Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
++Link: https://lore.kernel.org/linux-mtd/20210312062830.20548-1-ansuelsmth@gmail.com
++---
++ drivers/mtd/mtdcore.c | 3 ++-
++ 1 file changed, 2 insertions(+), 1 deletion(-)
++
++--- a/drivers/mtd/mtdcore.c
+++++ b/drivers/mtd/mtdcore.c
++@@ -559,6 +559,7 @@ static int mtd_nvmem_reg_read(void *priv
++ 
++ static int mtd_nvmem_add(struct mtd_info *mtd)
++ {
+++	struct device_node *node = mtd_get_of_node(mtd);
++ 	struct nvmem_config config = {};
++ 
++ 	config.id = -1;
++@@ -571,7 +572,7 @@ static int mtd_nvmem_add(struct mtd_info
++ 	config.stride = 1;
++ 	config.read_only = true;
++ 	config.root_only = true;
++-	config.no_of_node = true;
+++	config.no_of_node = !of_device_is_compatible(node, "nvmem-cells");
++ 	config.priv = mtd;
++ 
++ 	mtd->nvmem = nvmem_register(&config);
+diff --git a/target/linux/generic/backport-5.4/406-v5.13-0002-dt-bindings-nvmem-drop-nodename-restriction.patch b/target/linux/generic/backport-5.4/406-v5.13-0002-dt-bindings-nvmem-drop-nodename-restriction.patch
+new file mode 100644
+index 0000000000..c0515bd571
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/406-v5.13-0002-dt-bindings-nvmem-drop-nodename-restriction.patch
+@@ -0,0 +1,28 @@
++From 52981a0fa9f7d68641e0e6bb584054c6d9eb2056 Mon Sep 17 00:00:00 2001
++From: Ansuel Smith <ansuelsmth@gmail.com>
++Date: Fri, 12 Mar 2021 07:28:20 +0100
++Subject: [PATCH] dt-bindings: nvmem: drop $nodename restriction
++
++Drop $nodename restriction as now mtd partition can also be used as
++nvmem provider.
++
++Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
++Reviewed-by: Rob Herring <robh@kernel.org>
++Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
++Link: https://lore.kernel.org/linux-mtd/20210312062830.20548-2-ansuelsmth@gmail.com
++---
++ Documentation/devicetree/bindings/nvmem/nvmem.yaml | 3 ---
++ 1 file changed, 3 deletions(-)
++
++--- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml
+++++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
++@@ -20,9 +20,6 @@ description: |
++   storage device.
++ 
++ properties:
++-  $nodename:
++-    pattern: "^(eeprom|efuse|nvram)(@.*|-[0-9a-f])*$"
++-
++   "#address-cells":
++     const: 1
++ 
+diff --git a/target/linux/generic/backport-5.4/406-v5.13-0003-dt-bindings-mtd-Document-use-of-nvmem-cells-compatib.patch b/target/linux/generic/backport-5.4/406-v5.13-0003-dt-bindings-mtd-Document-use-of-nvmem-cells-compatib.patch
+new file mode 100644
+index 0000000000..552919f587
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/406-v5.13-0003-dt-bindings-mtd-Document-use-of-nvmem-cells-compatib.patch
+@@ -0,0 +1,119 @@
++From ac42c46f983e4a9003a7bb91ad44a23ab7b8f534 Mon Sep 17 00:00:00 2001
++From: Ansuel Smith <ansuelsmth@gmail.com>
++Date: Fri, 12 Mar 2021 07:28:21 +0100
++Subject: [PATCH] dt-bindings: mtd: Document use of nvmem-cells compatible
++
++Document nvmem-cells compatible used to treat mtd partitions as a
++nvmem provider.
++
++Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
++Reviewed-by: Rob Herring <robh@kernel.org>
++Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
++Link: https://lore.kernel.org/linux-mtd/20210312062830.20548-3-ansuelsmth@gmail.com
++---
++ .../bindings/mtd/partitions/nvmem-cells.yaml  | 99 +++++++++++++++++++
++ 1 file changed, 99 insertions(+)
++ create mode 100644 Documentation/devicetree/bindings/mtd/partitions/nvmem-cells.yaml
++
++--- /dev/null
+++++ b/Documentation/devicetree/bindings/mtd/partitions/nvmem-cells.yaml
++@@ -0,0 +1,99 @@
+++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+++%YAML 1.2
+++---
+++$id: http://devicetree.org/schemas/mtd/partitions/nvmem-cells.yaml#
+++$schema: http://devicetree.org/meta-schemas/core.yaml#
+++
+++title: Nvmem cells
+++
+++description: |
+++  Any partition containing the compatible "nvmem-cells" will register as a
+++  nvmem provider.
+++  Each direct subnodes represents a nvmem cell following the nvmem binding.
+++  Nvmem binding to declare nvmem-cells can be found in:
+++  Documentation/devicetree/bindings/nvmem/nvmem.yaml
+++
+++maintainers:
+++  - Ansuel Smith <ansuelsmth@gmail.com>
+++
+++allOf:
+++  - $ref: /schemas/nvmem/nvmem.yaml#
+++
+++properties:
+++  compatible:
+++    const: nvmem-cells
+++
+++required:
+++  - compatible
+++
+++additionalProperties: true
+++
+++examples:
+++  - |
+++    partitions {
+++      compatible = "fixed-partitions";
+++      #address-cells = <1>;
+++      #size-cells = <1>;
+++
+++      /* ... */
+++
+++      };
+++      art: art@1200000 {
+++        compatible = "nvmem-cells";
+++        reg = <0x1200000 0x0140000>;
+++        label = "art";
+++        read-only;
+++        #address-cells = <1>;
+++        #size-cells = <1>;
+++
+++        macaddr_gmac1: macaddr_gmac1@0 {
+++          reg = <0x0 0x6>;
+++        };
+++
+++        macaddr_gmac2: macaddr_gmac2@6 {
+++          reg = <0x6 0x6>;
+++        };
+++
+++        pre_cal_24g: pre_cal_24g@1000 {
+++          reg = <0x1000 0x2f20>;
+++        };
+++
+++        pre_cal_5g: pre_cal_5g@5000{
+++          reg = <0x5000 0x2f20>;
+++        };
+++      };
+++  - |
+++    partitions {
+++        compatible = "fixed-partitions";
+++        #address-cells = <1>;
+++        #size-cells = <1>;
+++
+++        partition@0 {
+++            label = "bootloader";
+++            reg = <0x000000 0x100000>;
+++            read-only;
+++        };
+++
+++        firmware@100000 {
+++            compatible = "brcm,trx";
+++            label = "firmware";
+++            reg = <0x100000 0xe00000>;
+++        };
+++
+++        calibration@f00000 {
+++            compatible = "nvmem-cells";
+++            label = "calibration";
+++            reg = <0xf00000 0x100000>;
+++            ranges = <0 0xf00000 0x100000>;
+++            #address-cells = <1>;
+++            #size-cells = <1>;
+++
+++            wifi0@0 {
+++                reg = <0x000000 0x080000>;
+++            };
+++
+++            wifi1@80000 {
+++                reg = <0x080000 0x080000>;
+++            };
+++        };
+++    };
+diff --git a/target/linux/generic/backport-5.4/407-v5.13-0001-dt-bindings-mtd-add-binding-for-Linksys-Northstar-pa.patch b/target/linux/generic/backport-5.4/407-v5.13-0001-dt-bindings-mtd-add-binding-for-Linksys-Northstar-pa.patch
+new file mode 100644
+index 0000000000..35a4afd67b
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/407-v5.13-0001-dt-bindings-mtd-add-binding-for-Linksys-Northstar-pa.patch
+@@ -0,0 +1,98 @@
++From 2fa7294175c76e1ec568aa75c1891fd908728c8d Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
++Date: Fri, 12 Mar 2021 14:49:18 +0100
++Subject: [PATCH] dt-bindings: mtd: add binding for Linksys Northstar
++ partitions
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++Linksys on Broadcom Northstar devices uses fixed flash layout with
++multiple firmware partitions.
++
++Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
++Reviewed-by: Rob Herring <robh@kernel.org>
++Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
++Link: https://lore.kernel.org/linux-mtd/20210312134919.7767-1-zajec5@gmail.com
++---
++ .../mtd/partitions/linksys,ns-partitions.yaml | 74 +++++++++++++++++++
++ 1 file changed, 74 insertions(+)
++ create mode 100644 Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml
++
++--- /dev/null
+++++ b/Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml
++@@ -0,0 +1,74 @@
+++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+++%YAML 1.2
+++---
+++$id: http://devicetree.org/schemas/mtd/partitions/linksys,ns-partitions.yaml#
+++$schema: http://devicetree.org/meta-schemas/core.yaml#
+++
+++title: Linksys Northstar partitioning
+++
+++description: |
+++  Linksys devices based on Broadcom Northstar architecture often use two
+++  firmware partitions. One is used for regular booting, the other is treated as
+++  fallback.
+++
+++  This binding allows defining all fixed partitions and marking those containing
+++  firmware. System can use that information e.g. for booting or flashing
+++  purposes.
+++
+++maintainers:
+++  - Rafał Miłecki <rafal@milecki.pl>
+++
+++properties:
+++  compatible:
+++    const: linksys,ns-partitions
+++
+++  "#address-cells":
+++    enum: [ 1, 2 ]
+++
+++  "#size-cells":
+++    enum: [ 1, 2 ]
+++
+++patternProperties:
+++  "^partition@[0-9a-f]+$":
+++    $ref: "partition.yaml#"
+++    properties:
+++      compatible:
+++        items:
+++          - const: linksys,ns-firmware
+++          - const: brcm,trx
+++    unevaluatedProperties: false
+++
+++required:
+++  - "#address-cells"
+++  - "#size-cells"
+++
+++additionalProperties: false
+++
+++examples:
+++  - |
+++    partitions {
+++        compatible = "linksys,ns-partitions";
+++        #address-cells = <1>;
+++        #size-cells = <1>;
+++
+++        partition@0 {
+++            label = "boot";
+++            reg = <0x0 0x100000>;
+++            read-only;
+++        };
+++
+++        partition@100000 {
+++            label = "nvram";
+++            reg = <0x100000 0x100000>;
+++        };
+++
+++        partition@200000 {
+++            compatible = "linksys,ns-firmware", "brcm,trx";
+++            reg = <0x200000 0xf00000>;
+++        };
+++
+++        partition@1100000 {
+++            compatible = "linksys,ns-firmware", "brcm,trx";
+++            reg = <0x1100000 0xf00000>;
+++        };
+++    };
+diff --git a/target/linux/generic/backport-5.4/407-v5.13-0002-mtd-parsers-ofpart-support-Linksys-Northstar-partiti.patch b/target/linux/generic/backport-5.4/407-v5.13-0002-mtd-parsers-ofpart-support-Linksys-Northstar-partiti.patch
+new file mode 100644
+index 0000000000..75eb9391ae
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/407-v5.13-0002-mtd-parsers-ofpart-support-Linksys-Northstar-partiti.patch
+@@ -0,0 +1,156 @@
++From 7134a2d026d942210b4d26d6059c9d979ca7866e Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
++Date: Fri, 12 Mar 2021 14:49:19 +0100
++Subject: [PATCH] mtd: parsers: ofpart: support Linksys Northstar partitions
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++This allows extending ofpart parser with support for Linksys Northstar
++devices. That support uses recently added quirks mechanism.
++
++Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
++Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
++Link: https://lore.kernel.org/linux-mtd/20210312134919.7767-2-zajec5@gmail.com
++---
++ drivers/mtd/parsers/Kconfig             | 10 +++++
++ drivers/mtd/parsers/Makefile            |  1 +
++ drivers/mtd/parsers/ofpart_core.c       |  6 +++
++ drivers/mtd/parsers/ofpart_linksys_ns.c | 50 +++++++++++++++++++++++++
++ drivers/mtd/parsers/ofpart_linksys_ns.h | 18 +++++++++
++ 5 files changed, 85 insertions(+)
++ create mode 100644 drivers/mtd/parsers/ofpart_linksys_ns.c
++ create mode 100644 drivers/mtd/parsers/ofpart_linksys_ns.h
++
++--- a/drivers/mtd/parsers/Kconfig
+++++ b/drivers/mtd/parsers/Kconfig
++@@ -76,6 +76,16 @@ config MTD_OF_PARTS_BCM4908
++ 	  that can have multiple "firmware" partitions. It takes care of
++ 	  finding currently used one and backup ones.
++ 
+++config MTD_OF_PARTS_LINKSYS_NS
+++	bool "Linksys Northstar partitioning support"
+++	depends on MTD_OF_PARTS && (ARCH_BCM_5301X || ARCH_BCM4908 || COMPILE_TEST)
+++	default ARCH_BCM_5301X
+++	help
+++	  This provides partitions parser for Linksys devices based on Broadcom
+++	  Northstar architecture. Linksys commonly uses fixed flash layout with
+++	  two "firmware" partitions. Currently used firmware has to be detected
+++	  using CFE environment variable.
+++
++ config MTD_PARSER_IMAGETAG
++ 	tristate "Parser for BCM963XX Image Tag format partitions"
++ 	depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST
++--- a/drivers/mtd/parsers/Makefile
+++++ b/drivers/mtd/parsers/Makefile
++@@ -6,6 +6,7 @@ obj-$(CONFIG_MTD_CMDLINE_PARTS)		+= cmdl
++ obj-$(CONFIG_MTD_OF_PARTS)		+= ofpart.o
++ ofpart-y				+= ofpart_core.o
++ ofpart-$(CONFIG_MTD_OF_PARTS_BCM4908)	+= ofpart_bcm4908.o
+++ofpart-$(CONFIG_MTD_OF_PARTS_LINKSYS_NS)+= ofpart_linksys_ns.o
++ obj-$(CONFIG_MTD_PARSER_IMAGETAG)	+= parser_imagetag.o
++ obj-$(CONFIG_MTD_AFS_PARTS)		+= afs.o
++ obj-$(CONFIG_MTD_PARSER_TRX)		+= parser_trx.o
++--- a/drivers/mtd/parsers/ofpart_core.c
+++++ b/drivers/mtd/parsers/ofpart_core.c
++@@ -17,6 +17,7 @@
++ #include <linux/mtd/partitions.h>
++ 
++ #include "ofpart_bcm4908.h"
+++#include "ofpart_linksys_ns.h"
++ 
++ struct fixed_partitions_quirks {
++ 	int (*post_parse)(struct mtd_info *mtd, struct mtd_partition *parts, int nr_parts);
++@@ -26,6 +27,10 @@ static struct fixed_partitions_quirks bc
++ 	.post_parse = bcm4908_partitions_post_parse,
++ };
++ 
+++static struct fixed_partitions_quirks linksys_ns_partitions_quirks = {
+++	.post_parse = linksys_ns_partitions_post_parse,
+++};
+++
++ static const struct of_device_id parse_ofpart_match_table[];
++ 
++ static bool node_has_compatible(struct device_node *pp)
++@@ -164,6 +169,7 @@ static const struct of_device_id parse_o
++ 	{ .compatible = "fixed-partitions" },
++ 	/* Customized */
++ 	{ .compatible = "brcm,bcm4908-partitions", .data = &bcm4908_partitions_quirks, },
+++	{ .compatible = "linksys,ns-partitions", .data = &linksys_ns_partitions_quirks, },
++ 	{},
++ };
++ MODULE_DEVICE_TABLE(of, parse_ofpart_match_table);
++--- /dev/null
+++++ b/drivers/mtd/parsers/ofpart_linksys_ns.c
++@@ -0,0 +1,50 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl>
+++ */
+++
+++#include <linux/bcm47xx_nvram.h>
+++#include <linux/mtd/mtd.h>
+++#include <linux/mtd/partitions.h>
+++
+++#include "ofpart_linksys_ns.h"
+++
+++#define NVRAM_BOOT_PART		"bootpartition"
+++
+++static int ofpart_linksys_ns_bootpartition(void)
+++{
+++	char buf[4];
+++	int bootpartition;
+++
+++	/* Check CFE environment variable */
+++	if (bcm47xx_nvram_getenv(NVRAM_BOOT_PART, buf, sizeof(buf)) > 0) {
+++		if (!kstrtoint(buf, 0, &bootpartition))
+++			return bootpartition;
+++		pr_warn("Failed to parse %s value \"%s\"\n", NVRAM_BOOT_PART,
+++			buf);
+++	} else {
+++		pr_warn("Failed to get NVRAM \"%s\"\n", NVRAM_BOOT_PART);
+++	}
+++
+++	return 0;
+++}
+++
+++int linksys_ns_partitions_post_parse(struct mtd_info *mtd,
+++				     struct mtd_partition *parts,
+++				     int nr_parts)
+++{
+++	int bootpartition = ofpart_linksys_ns_bootpartition();
+++	int trx_idx = 0;
+++	int i;
+++
+++	for (i = 0; i < nr_parts; i++) {
+++		if (of_device_is_compatible(parts[i].of_node, "linksys,ns-firmware")) {
+++			if (trx_idx++ == bootpartition)
+++				parts[i].name = "firmware";
+++			else
+++				parts[i].name = "backup";
+++		}
+++	}
+++
+++	return 0;
+++}
++--- /dev/null
+++++ b/drivers/mtd/parsers/ofpart_linksys_ns.h
++@@ -0,0 +1,18 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++#ifndef __OFPART_LINKSYS_NS_H
+++#define __OFPART_LINKSYS_NS_H
+++
+++#ifdef CONFIG_MTD_OF_PARTS_LINKSYS_NS
+++int linksys_ns_partitions_post_parse(struct mtd_info *mtd,
+++				     struct mtd_partition *parts,
+++				     int nr_parts);
+++#else
+++static inline int linksys_ns_partitions_post_parse(struct mtd_info *mtd,
+++						   struct mtd_partition *parts,
+++						   int nr_parts)
+++{
+++	return -EOPNOTSUPP;
+++}
+++#endif
+++
+++#endif
+diff --git a/target/linux/generic/backport-5.4/410-mtd-fix-calculating-partition-end-address.patch b/target/linux/generic/backport-5.4/410-mtd-fix-calculating-partition-end-address.patch
+new file mode 100644
+index 0000000000..1eae015b28
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/410-mtd-fix-calculating-partition-end-address.patch
+@@ -0,0 +1,28 @@
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
++Date: Mon, 9 Mar 2020 08:30:19 +0100
++Subject: [PATCH] mtd: fix calculating partition end address
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++This fixes check for partitions that don't start at beginning of their
++parents. Missing partition's offset in formula could result in forcing
++read-only incorrectly.
++
++Fixes: 6750f61a13a0 ("mtd: improve calculating partition boundaries when checking for alignment")
++Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
++---
++ drivers/mtd/mtdpart.c | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/mtd/mtdpart.c
+++++ b/drivers/mtd/mtdpart.c
++@@ -524,7 +524,7 @@ static struct mtd_part *allocate_partiti
++ 			part->name);
++ 	}
++ 
++-	tmp = part_absolute_offset(parent) + slave->mtd.size;
+++	tmp = part_absolute_offset(parent) + slave->offset + slave->mtd.size;
++ 	remainder = do_div(tmp, wr_alignment);
++ 	if ((slave->mtd.flags & MTD_WRITEABLE) && remainder) {
++ 		slave->mtd.flags &= ~MTD_WRITEABLE;
+diff --git a/target/linux/generic/backport-5.4/600-v5.12-net-extract-napi-poll-functionality-to-__napi_poll.patch b/target/linux/generic/backport-5.4/600-v5.12-net-extract-napi-poll-functionality-to-__napi_poll.patch
+new file mode 100644
+index 0000000000..961140aabb
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/600-v5.12-net-extract-napi-poll-functionality-to-__napi_poll.patch
+@@ -0,0 +1,88 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Mon, 8 Feb 2021 11:34:08 -0800
++Subject: [PATCH] net: extract napi poll functionality to __napi_poll()
++
++This commit introduces a new function __napi_poll() which does the main
++logic of the existing napi_poll() function, and will be called by other
++functions in later commits.
++This idea and implementation is done by Felix Fietkau <nbd@nbd.name> and
++is proposed as part of the patch to move napi work to work_queue
++context.
++This commit by itself is a code restructure.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++Signed-off-by: Wei Wang <weiwan@google.com>
++Reviewed-by: Alexander Duyck <alexanderduyck@fb.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++
++--- a/net/core/dev.c
+++++ b/net/core/dev.c
++@@ -6322,15 +6322,10 @@ void netif_napi_del(struct napi_struct *
++ }
++ EXPORT_SYMBOL(netif_napi_del);
++ 
++-static int napi_poll(struct napi_struct *n, struct list_head *repoll)
+++static int __napi_poll(struct napi_struct *n, bool *repoll)
++ {
++-	void *have;
++ 	int work, weight;
++ 
++-	list_del_init(&n->poll_list);
++-
++-	have = netpoll_poll_lock(n);
++-
++ 	weight = n->weight;
++ 
++ 	/* This NAPI_STATE_SCHED test is for avoiding a race
++@@ -6348,7 +6343,7 @@ static int napi_poll(struct napi_struct
++ 	WARN_ON_ONCE(work > weight);
++ 
++ 	if (likely(work < weight))
++-		goto out_unlock;
+++		return work;
++ 
++ 	/* Drivers must not modify the NAPI state if they
++ 	 * consume the entire weight.  In such cases this code
++@@ -6357,7 +6352,7 @@ static int napi_poll(struct napi_struct
++ 	 */
++ 	if (unlikely(napi_disable_pending(n))) {
++ 		napi_complete(n);
++-		goto out_unlock;
+++		return work;
++ 	}
++ 
++ 	if (n->gro_bitmask) {
++@@ -6375,12 +6370,29 @@ static int napi_poll(struct napi_struct
++ 	if (unlikely(!list_empty(&n->poll_list))) {
++ 		pr_warn_once("%s: Budget exhausted after napi rescheduled\n",
++ 			     n->dev ? n->dev->name : "backlog");
++-		goto out_unlock;
+++		return work;
++ 	}
++ 
++-	list_add_tail(&n->poll_list, repoll);
+++	*repoll = true;
+++
+++	return work;
+++}
+++
+++static int napi_poll(struct napi_struct *n, struct list_head *repoll)
+++{
+++	bool do_repoll = false;
+++	void *have;
+++	int work;
+++
+++	list_del_init(&n->poll_list);
+++
+++	have = netpoll_poll_lock(n);
+++
+++	work = __napi_poll(n, &do_repoll);
+++
+++	if (do_repoll)
+++		list_add_tail(&n->poll_list, repoll);
++ 
++-out_unlock:
++ 	netpoll_poll_unlock(have);
++ 
++ 	return work;
+diff --git a/target/linux/generic/backport-5.4/601-v5.12-net-implement-threaded-able-napi-poll-loop-support.patch b/target/linux/generic/backport-5.4/601-v5.12-net-implement-threaded-able-napi-poll-loop-support.patch
+new file mode 100644
+index 0000000000..c9bd4abb53
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/601-v5.12-net-implement-threaded-able-napi-poll-loop-support.patch
+@@ -0,0 +1,261 @@
++From: Wei Wang <weiwan@google.com>
++Date: Mon, 8 Feb 2021 11:34:09 -0800
++Subject: [PATCH] net: implement threaded-able napi poll loop support
++
++This patch allows running each napi poll loop inside its own
++kernel thread.
++The kthread is created during netif_napi_add() if dev->threaded
++is set. And threaded mode is enabled in napi_enable(). We will
++provide a way to set dev->threaded and enable threaded mode
++without a device up/down in the following patch.
++
++Once that threaded mode is enabled and the kthread is
++started, napi_schedule() will wake-up such thread instead
++of scheduling the softirq.
++
++The threaded poll loop behaves quite likely the net_rx_action,
++but it does not have to manipulate local irqs and uses
++an explicit scheduling point based on netdev_budget.
++
++Co-developed-by: Paolo Abeni <pabeni@redhat.com>
++Signed-off-by: Paolo Abeni <pabeni@redhat.com>
++Co-developed-by: Hannes Frederic Sowa <hannes@stressinduktion.org>
++Signed-off-by: Hannes Frederic Sowa <hannes@stressinduktion.org>
++Co-developed-by: Jakub Kicinski <kuba@kernel.org>
++Signed-off-by: Jakub Kicinski <kuba@kernel.org>
++Signed-off-by: Wei Wang <weiwan@google.com>
++Reviewed-by: Alexander Duyck <alexanderduyck@fb.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++
++--- a/include/linux/netdevice.h
+++++ b/include/linux/netdevice.h
++@@ -340,6 +340,7 @@ struct napi_struct {
++ 	struct list_head	dev_list;
++ 	struct hlist_node	napi_hash_node;
++ 	unsigned int		napi_id;
+++	struct task_struct	*thread;
++ };
++ 
++ enum {
++@@ -350,6 +351,7 @@ enum {
++ 	NAPI_STATE_HASHED,	/* In NAPI hash (busy polling possible) */
++ 	NAPI_STATE_NO_BUSY_POLL,/* Do not add in napi_hash, no busy polling */
++ 	NAPI_STATE_IN_BUSY_POLL,/* sk_busy_loop() owns this NAPI */
+++	NAPI_STATE_THREADED,		/* The poll is performed inside its own thread*/
++ };
++ 
++ enum {
++@@ -360,6 +362,7 @@ enum {
++ 	NAPIF_STATE_HASHED	 = BIT(NAPI_STATE_HASHED),
++ 	NAPIF_STATE_NO_BUSY_POLL = BIT(NAPI_STATE_NO_BUSY_POLL),
++ 	NAPIF_STATE_IN_BUSY_POLL = BIT(NAPI_STATE_IN_BUSY_POLL),
+++	NAPIF_STATE_THREADED	 = BIT(NAPI_STATE_THREADED),
++ };
++ 
++ enum gro_result {
++@@ -504,20 +507,7 @@ bool napi_hash_del(struct napi_struct *n
++  */
++ void napi_disable(struct napi_struct *n);
++ 
++-/**
++- *	napi_enable - enable NAPI scheduling
++- *	@n: NAPI context
++- *
++- * Resume NAPI from being scheduled on this context.
++- * Must be paired with napi_disable.
++- */
++-static inline void napi_enable(struct napi_struct *n)
++-{
++-	BUG_ON(!test_bit(NAPI_STATE_SCHED, &n->state));
++-	smp_mb__before_atomic();
++-	clear_bit(NAPI_STATE_SCHED, &n->state);
++-	clear_bit(NAPI_STATE_NPSVC, &n->state);
++-}
+++void napi_enable(struct napi_struct *n);
++ 
++ /**
++  *	napi_synchronize - wait until NAPI is not running
++@@ -1783,6 +1773,8 @@ enum netdev_ml_priv_type {
++  *
++  *	@wol_enabled:	Wake-on-LAN is enabled
++  *
+++ *	@threaded:	napi threaded mode is enabled
+++ *
++  *	FIXME: cleanup struct net_device such that network protocol info
++  *	moves out.
++  */
++@@ -2075,6 +2067,7 @@ struct net_device {
++ 	struct lock_class_key	addr_list_lock_key;
++ 	bool			proto_down;
++ 	unsigned		wol_enabled:1;
+++	unsigned		threaded:1;
++ };
++ #define to_net_dev(d) container_of(d, struct net_device, dev)
++ 
++--- a/net/core/dev.c
+++++ b/net/core/dev.c
++@@ -91,6 +91,7 @@
++ #include <linux/etherdevice.h>
++ #include <linux/ethtool.h>
++ #include <linux/skbuff.h>
+++#include <linux/kthread.h>
++ #include <linux/bpf.h>
++ #include <linux/bpf_trace.h>
++ #include <net/net_namespace.h>
++@@ -1289,6 +1290,27 @@ void netdev_notify_peers(struct net_devi
++ }
++ EXPORT_SYMBOL(netdev_notify_peers);
++ 
+++static int napi_threaded_poll(void *data);
+++
+++static int napi_kthread_create(struct napi_struct *n)
+++{
+++	int err = 0;
+++
+++	/* Create and wake up the kthread once to put it in
+++	 * TASK_INTERRUPTIBLE mode to avoid the blocked task
+++	 * warning and work with loadavg.
+++	 */
+++	n->thread = kthread_run(napi_threaded_poll, n, "napi/%s-%d",
+++				n->dev->name, n->napi_id);
+++	if (IS_ERR(n->thread)) {
+++		err = PTR_ERR(n->thread);
+++		pr_err("kthread_run failed with err %d\n", err);
+++		n->thread = NULL;
+++	}
+++
+++	return err;
+++}
+++
++ static int __dev_open(struct net_device *dev, struct netlink_ext_ack *extack)
++ {
++ 	const struct net_device_ops *ops = dev->netdev_ops;
++@@ -3885,6 +3907,21 @@ int gro_normal_batch __read_mostly = 8;
++ static inline void ____napi_schedule(struct softnet_data *sd,
++ 				     struct napi_struct *napi)
++ {
+++	struct task_struct *thread;
+++
+++	if (test_bit(NAPI_STATE_THREADED, &napi->state)) {
+++		/* Paired with smp_mb__before_atomic() in
+++		 * napi_enable(). Use READ_ONCE() to guarantee
+++		 * a complete read on napi->thread. Only call
+++		 * wake_up_process() when it's not NULL.
+++		 */
+++		thread = READ_ONCE(napi->thread);
+++		if (thread) {
+++			wake_up_process(thread);
+++			return;
+++		}
+++	}
+++
++ 	list_add_tail(&napi->poll_list, &sd->poll_list);
++ 	__raise_softirq_irqoff(NET_RX_SOFTIRQ);
++ }
++@@ -6276,6 +6313,12 @@ void netif_napi_add(struct net_device *d
++ 	set_bit(NAPI_STATE_NPSVC, &napi->state);
++ 	list_add_rcu(&napi->dev_list, &dev->napi_list);
++ 	napi_hash_add(napi);
+++	/* Create kthread for this napi if dev->threaded is set.
+++	 * Clear dev->threaded if kthread creation failed so that
+++	 * threaded mode will not be enabled in napi_enable().
+++	 */
+++	if (dev->threaded && napi_kthread_create(napi))
+++		dev->threaded = 0;
++ }
++ EXPORT_SYMBOL(netif_napi_add);
++ 
++@@ -6292,9 +6335,28 @@ void napi_disable(struct napi_struct *n)
++ 	hrtimer_cancel(&n->timer);
++ 
++ 	clear_bit(NAPI_STATE_DISABLE, &n->state);
+++	clear_bit(NAPI_STATE_THREADED, &n->state);
++ }
++ EXPORT_SYMBOL(napi_disable);
++ 
+++/**
+++ *	napi_enable - enable NAPI scheduling
+++ *	@n: NAPI context
+++ *
+++ * Resume NAPI from being scheduled on this context.
+++ * Must be paired with napi_disable.
+++ */
+++void napi_enable(struct napi_struct *n)
+++{
+++	BUG_ON(!test_bit(NAPI_STATE_SCHED, &n->state));
+++	smp_mb__before_atomic();
+++	clear_bit(NAPI_STATE_SCHED, &n->state);
+++	clear_bit(NAPI_STATE_NPSVC, &n->state);
+++	if (n->dev->threaded && n->thread)
+++		set_bit(NAPI_STATE_THREADED, &n->state);
+++}
+++EXPORT_SYMBOL(napi_enable);
+++
++ static void flush_gro_hash(struct napi_struct *napi)
++ {
++ 	int i;
++@@ -6319,6 +6381,11 @@ void netif_napi_del(struct napi_struct *
++ 
++ 	flush_gro_hash(napi);
++ 	napi->gro_bitmask = 0;
+++
+++	if (napi->thread) {
+++		kthread_stop(napi->thread);
+++		napi->thread = NULL;
+++	}
++ }
++ EXPORT_SYMBOL(netif_napi_del);
++ 
++@@ -6398,6 +6465,51 @@ static int napi_poll(struct napi_struct
++ 	return work;
++ }
++ 
+++static int napi_thread_wait(struct napi_struct *napi)
+++{
+++	set_current_state(TASK_INTERRUPTIBLE);
+++
+++	while (!kthread_should_stop() && !napi_disable_pending(napi)) {
+++		if (test_bit(NAPI_STATE_SCHED, &napi->state)) {
+++			WARN_ON(!list_empty(&napi->poll_list));
+++			__set_current_state(TASK_RUNNING);
+++			return 0;
+++		}
+++
+++		schedule();
+++		set_current_state(TASK_INTERRUPTIBLE);
+++	}
+++	__set_current_state(TASK_RUNNING);
+++	return -1;
+++}
+++
+++static int napi_threaded_poll(void *data)
+++{
+++	struct napi_struct *napi = data;
+++	void *have;
+++
+++	while (!napi_thread_wait(napi)) {
+++		for (;;) {
+++			bool repoll = false;
+++
+++			local_bh_disable();
+++
+++			have = netpoll_poll_lock(napi);
+++			__napi_poll(napi, &repoll);
+++			netpoll_poll_unlock(have);
+++
+++			__kfree_skb_flush();
+++			local_bh_enable();
+++
+++			if (!repoll)
+++				break;
+++
+++			cond_resched();
+++		}
+++	}
+++	return 0;
+++}
+++
++ static __latent_entropy void net_rx_action(struct softirq_action *h)
++ {
++ 	struct softnet_data *sd = this_cpu_ptr(&softnet_data);
+diff --git a/target/linux/generic/backport-5.4/602-v5.12-net-add-sysfs-attribute-to-control-napi-threaded-mod.patch b/target/linux/generic/backport-5.4/602-v5.12-net-add-sysfs-attribute-to-control-napi-threaded-mod.patch
+new file mode 100644
+index 0000000000..d8b932978c
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/602-v5.12-net-add-sysfs-attribute-to-control-napi-threaded-mod.patch
+@@ -0,0 +1,177 @@
++From: Wei Wang <weiwan@google.com>
++Date: Mon, 8 Feb 2021 11:34:10 -0800
++Subject: [PATCH] net: add sysfs attribute to control napi threaded mode
++
++This patch adds a new sysfs attribute to the network device class.
++Said attribute provides a per-device control to enable/disable the
++threaded mode for all the napi instances of the given network device,
++without the need for a device up/down.
++User sets it to 1 or 0 to enable or disable threaded mode.
++Note: when switching between threaded and the current softirq based mode
++for a napi instance, it will not immediately take effect if the napi is
++currently being polled. The mode switch will happen for the next time
++napi_schedule() is called.
++
++Co-developed-by: Paolo Abeni <pabeni@redhat.com>
++Signed-off-by: Paolo Abeni <pabeni@redhat.com>
++Co-developed-by: Hannes Frederic Sowa <hannes@stressinduktion.org>
++Signed-off-by: Hannes Frederic Sowa <hannes@stressinduktion.org>
++Co-developed-by: Felix Fietkau <nbd@nbd.name>
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++Signed-off-by: Wei Wang <weiwan@google.com>
++Reviewed-by: Alexander Duyck <alexanderduyck@fb.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++
++--- a/Documentation/ABI/testing/sysfs-class-net
+++++ b/Documentation/ABI/testing/sysfs-class-net
++@@ -301,3 +301,18 @@ Contact:	netdev@vger.kernel.org
++ Description:
++ 		32-bit unsigned integer counting the number of times the link has
++ 		been down
+++
+++What:		/sys/class/net/<iface>/threaded
+++Date:		Jan 2021
+++KernelVersion:	5.12
+++Contact:	netdev@vger.kernel.org
+++Description:
+++		Boolean value to control the threaded mode per device. User could
+++		set this value to enable/disable threaded mode for all napi
+++		belonging to this device, without the need to do device up/down.
+++
+++		Possible values:
+++		== ==================================
+++		0  threaded mode disabled for this dev
+++		1  threaded mode enabled for this dev
+++		== ==================================
++--- a/include/linux/netdevice.h
+++++ b/include/linux/netdevice.h
++@@ -498,6 +498,8 @@ static inline bool napi_complete(struct
++  */
++ bool napi_hash_del(struct napi_struct *napi);
++ 
+++int dev_set_threaded(struct net_device *dev, bool threaded);
+++
++ /**
++  *	napi_disable - prevent NAPI from scheduling
++  *	@n: NAPI context
++--- a/net/core/dev.c
+++++ b/net/core/dev.c
++@@ -3911,8 +3911,9 @@ static inline void ____napi_schedule(str
++ 
++ 	if (test_bit(NAPI_STATE_THREADED, &napi->state)) {
++ 		/* Paired with smp_mb__before_atomic() in
++-		 * napi_enable(). Use READ_ONCE() to guarantee
++-		 * a complete read on napi->thread. Only call
+++		 * napi_enable()/dev_set_threaded().
+++		 * Use READ_ONCE() to guarantee a complete
+++		 * read on napi->thread. Only call
++ 		 * wake_up_process() when it's not NULL.
++ 		 */
++ 		thread = READ_ONCE(napi->thread);
++@@ -6290,6 +6291,49 @@ static void init_gro_hash(struct napi_st
++ 	napi->gro_bitmask = 0;
++ }
++ 
+++int dev_set_threaded(struct net_device *dev, bool threaded)
+++{
+++	struct napi_struct *napi;
+++	int err = 0;
+++
+++	if (dev->threaded == threaded)
+++		return 0;
+++
+++	if (threaded) {
+++		list_for_each_entry(napi, &dev->napi_list, dev_list) {
+++			if (!napi->thread) {
+++				err = napi_kthread_create(napi);
+++				if (err) {
+++					threaded = false;
+++					break;
+++				}
+++			}
+++		}
+++	}
+++
+++	dev->threaded = threaded;
+++
+++	/* Make sure kthread is created before THREADED bit
+++	 * is set.
+++	 */
+++	smp_mb__before_atomic();
+++
+++	/* Setting/unsetting threaded mode on a napi might not immediately
+++	 * take effect, if the current napi instance is actively being
+++	 * polled. In this case, the switch between threaded mode and
+++	 * softirq mode will happen in the next round of napi_schedule().
+++	 * This should not cause hiccups/stalls to the live traffic.
+++	 */
+++	list_for_each_entry(napi, &dev->napi_list, dev_list) {
+++		if (threaded)
+++			set_bit(NAPI_STATE_THREADED, &napi->state);
+++		else
+++			clear_bit(NAPI_STATE_THREADED, &napi->state);
+++	}
+++
+++	return err;
+++}
+++
++ void netif_napi_add(struct net_device *dev, struct napi_struct *napi,
++ 		    int (*poll)(struct napi_struct *, int), int weight)
++ {
++--- a/net/core/net-sysfs.c
+++++ b/net/core/net-sysfs.c
++@@ -557,6 +557,45 @@ static ssize_t phys_switch_id_show(struc
++ }
++ static DEVICE_ATTR_RO(phys_switch_id);
++ 
+++static ssize_t threaded_show(struct device *dev,
+++			     struct device_attribute *attr, char *buf)
+++{
+++	struct net_device *netdev = to_net_dev(dev);
+++	ssize_t ret = -EINVAL;
+++
+++	if (!rtnl_trylock())
+++		return restart_syscall();
+++
+++	if (dev_isalive(netdev))
+++		ret = sprintf(buf, fmt_dec, netdev->threaded);
+++
+++	rtnl_unlock();
+++	return ret;
+++}
+++
+++static int modify_napi_threaded(struct net_device *dev, unsigned long val)
+++{
+++	int ret;
+++
+++	if (list_empty(&dev->napi_list))
+++		return -EOPNOTSUPP;
+++
+++	if (val != 0 && val != 1)
+++		return -EOPNOTSUPP;
+++
+++	ret = dev_set_threaded(dev, val);
+++
+++	return ret;
+++}
+++
+++static ssize_t threaded_store(struct device *dev,
+++			      struct device_attribute *attr,
+++			      const char *buf, size_t len)
+++{
+++	return netdev_store(dev, attr, buf, len, modify_napi_threaded);
+++}
+++static DEVICE_ATTR_RW(threaded);
+++
++ static struct attribute *net_class_attrs[] __ro_after_init = {
++ 	&dev_attr_netdev_group.attr,
++ 	&dev_attr_type.attr,
++@@ -587,6 +626,7 @@ static struct attribute *net_class_attrs
++ 	&dev_attr_proto_down.attr,
++ 	&dev_attr_carrier_up_count.attr,
++ 	&dev_attr_carrier_down_count.attr,
+++	&dev_attr_threaded.attr,
++ 	NULL,
++ };
++ ATTRIBUTE_GROUPS(net_class);
+diff --git a/target/linux/generic/backport-5.4/603-v5.12-net-fix-race-between-napi-kthread-mode-and-busy-poll.patch b/target/linux/generic/backport-5.4/603-v5.12-net-fix-race-between-napi-kthread-mode-and-busy-poll.patch
+new file mode 100644
+index 0000000000..19c5a53a27
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/603-v5.12-net-fix-race-between-napi-kthread-mode-and-busy-poll.patch
+@@ -0,0 +1,93 @@
++From: Wei Wang <weiwan@google.com>
++Date: Mon, 1 Mar 2021 17:21:13 -0800
++Subject: [PATCH] net: fix race between napi kthread mode and busy poll
++
++Currently, napi_thread_wait() checks for NAPI_STATE_SCHED bit to
++determine if the kthread owns this napi and could call napi->poll() on
++it. However, if socket busy poll is enabled, it is possible that the
++busy poll thread grabs this SCHED bit (after the previous napi->poll()
++invokes napi_complete_done() and clears SCHED bit) and tries to poll
++on the same napi. napi_disable() could grab the SCHED bit as well.
++This patch tries to fix this race by adding a new bit
++NAPI_STATE_SCHED_THREADED in napi->state. This bit gets set in
++____napi_schedule() if the threaded mode is enabled, and gets cleared
++in napi_complete_done(), and we only poll the napi in kthread if this
++bit is set. This helps distinguish the ownership of the napi between
++kthread and other scenarios and fixes the race issue.
++
++Fixes: 29863d41bb6e ("net: implement threaded-able napi poll loop support")
++Reported-by: Martin Zaharinov <micron10@gmail.com>
++Suggested-by: Jakub Kicinski <kuba@kernel.org>
++Signed-off-by: Wei Wang <weiwan@google.com>
++Cc: Alexander Duyck <alexanderduyck@fb.com>
++Cc: Eric Dumazet <edumazet@google.com>
++Cc: Paolo Abeni <pabeni@redhat.com>
++Cc: Hannes Frederic Sowa <hannes@stressinduktion.org>
++---
++
++--- a/include/linux/netdevice.h
+++++ b/include/linux/netdevice.h
++@@ -352,6 +352,7 @@ enum {
++ 	NAPI_STATE_NO_BUSY_POLL,/* Do not add in napi_hash, no busy polling */
++ 	NAPI_STATE_IN_BUSY_POLL,/* sk_busy_loop() owns this NAPI */
++ 	NAPI_STATE_THREADED,		/* The poll is performed inside its own thread*/
+++	NAPI_STATE_SCHED_THREADED,	/* Napi is currently scheduled in threaded mode */
++ };
++ 
++ enum {
++@@ -363,6 +364,7 @@ enum {
++ 	NAPIF_STATE_NO_BUSY_POLL = BIT(NAPI_STATE_NO_BUSY_POLL),
++ 	NAPIF_STATE_IN_BUSY_POLL = BIT(NAPI_STATE_IN_BUSY_POLL),
++ 	NAPIF_STATE_THREADED	 = BIT(NAPI_STATE_THREADED),
+++	NAPIF_STATE_SCHED_THREADED	= BIT(NAPI_STATE_SCHED_THREADED),
++ };
++ 
++ enum gro_result {
++--- a/net/core/dev.c
+++++ b/net/core/dev.c
++@@ -3918,6 +3918,8 @@ static inline void ____napi_schedule(str
++ 		 */
++ 		thread = READ_ONCE(napi->thread);
++ 		if (thread) {
+++			if (thread->state != TASK_INTERRUPTIBLE)
+++				set_bit(NAPI_STATE_SCHED_THREADED, &napi->state);
++ 			wake_up_process(thread);
++ 			return;
++ 		}
++@@ -6078,7 +6080,8 @@ bool napi_complete_done(struct napi_stru
++ 
++ 		WARN_ON_ONCE(!(val & NAPIF_STATE_SCHED));
++ 
++-		new = val & ~(NAPIF_STATE_MISSED | NAPIF_STATE_SCHED);
+++		new = val & ~(NAPIF_STATE_MISSED | NAPIF_STATE_SCHED |
+++			      NAPIF_STATE_SCHED_THREADED);
++ 
++ 		/* If STATE_MISSED was set, leave STATE_SCHED set,
++ 		 * because we will call napi->poll() one more time.
++@@ -6511,16 +6514,25 @@ static int napi_poll(struct napi_struct
++ 
++ static int napi_thread_wait(struct napi_struct *napi)
++ {
+++	bool woken = false;
+++
++ 	set_current_state(TASK_INTERRUPTIBLE);
++ 
++ 	while (!kthread_should_stop() && !napi_disable_pending(napi)) {
++-		if (test_bit(NAPI_STATE_SCHED, &napi->state)) {
+++		/* Testing SCHED_THREADED bit here to make sure the current
+++		 * kthread owns this napi and could poll on this napi.
+++		 * Testing SCHED bit is not enough because SCHED bit might be
+++		 * set by some other busy poll thread or by napi_disable().
+++		 */
+++		if (test_bit(NAPI_STATE_SCHED_THREADED, &napi->state) || woken) {
++ 			WARN_ON(!list_empty(&napi->poll_list));
++ 			__set_current_state(TASK_RUNNING);
++ 			return 0;
++ 		}
++ 
++ 		schedule();
+++		/* woken being true indicates this thread owns this napi. */
+++		woken = true;
++ 		set_current_state(TASK_INTERRUPTIBLE);
++ 	}
++ 	__set_current_state(TASK_RUNNING);
+diff --git a/target/linux/generic/backport-5.4/604-v5.12-net-fix-hangup-on-napi_disable-for-threaded-napi.patch b/target/linux/generic/backport-5.4/604-v5.12-net-fix-hangup-on-napi_disable-for-threaded-napi.patch
+new file mode 100644
+index 0000000000..108cf809f8
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/604-v5.12-net-fix-hangup-on-napi_disable-for-threaded-napi.patch
+@@ -0,0 +1,53 @@
++From: Paolo Abeni <pabeni@redhat.com>
++Date: Fri, 9 Apr 2021 17:24:17 +0200
++Subject: [PATCH] net: fix hangup on napi_disable for threaded napi
++
++napi_disable() is subject to an hangup, when the threaded
++mode is enabled and the napi is under heavy traffic.
++
++If the relevant napi has been scheduled and the napi_disable()
++kicks in before the next napi_threaded_wait() completes - so
++that the latter quits due to the napi_disable_pending() condition,
++the existing code leaves the NAPI_STATE_SCHED bit set and the
++napi_disable() loop waiting for such bit will hang.
++
++This patch addresses the issue by dropping the NAPI_STATE_DISABLE
++bit test in napi_thread_wait(). The later napi_threaded_poll()
++iteration will take care of clearing the NAPI_STATE_SCHED.
++
++This also addresses a related problem reported by Jakub:
++before this patch a napi_disable()/napi_enable() pair killed
++the napi thread, effectively disabling the threaded mode.
++On the patched kernel napi_disable() simply stops scheduling
++the relevant thread.
++
++v1 -> v2:
++  - let the main napi_thread_poll() loop clear the SCHED bit
++
++Reported-by: Jakub Kicinski <kuba@kernel.org>
++Fixes: 29863d41bb6e ("net: implement threaded-able napi poll loop support")
++Signed-off-by: Paolo Abeni <pabeni@redhat.com>
++Reviewed-by: Eric Dumazet <edumazet@google.com>
++Link: https://lore.kernel.org/r/883923fa22745a9589e8610962b7dc59df09fb1f.1617981844.git.pabeni@redhat.com
++Signed-off-by: Jakub Kicinski <kuba@kernel.org>
++---
++
++--- a/net/core/dev.c
+++++ b/net/core/dev.c
++@@ -6518,7 +6518,7 @@ static int napi_thread_wait(struct napi_
++ 
++ 	set_current_state(TASK_INTERRUPTIBLE);
++ 
++-	while (!kthread_should_stop() && !napi_disable_pending(napi)) {
+++	while (!kthread_should_stop()) {
++ 		/* Testing SCHED_THREADED bit here to make sure the current
++ 		 * kthread owns this napi and could poll on this napi.
++ 		 * Testing SCHED bit is not enough because SCHED bit might be
++@@ -6536,6 +6536,7 @@ static int napi_thread_wait(struct napi_
++ 		set_current_state(TASK_INTERRUPTIBLE);
++ 	}
++ 	__set_current_state(TASK_RUNNING);
+++
++ 	return -1;
++ }
++ 
+diff --git a/target/linux/generic/backport-5.4/700-v5.5-net-core-allow-fast-GRO-for-skbs-with-Ethernet-heade.patch b/target/linux/generic/backport-5.4/700-v5.5-net-core-allow-fast-GRO-for-skbs-with-Ethernet-heade.patch
+new file mode 100644
+index 0000000000..13f0d9d000
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/700-v5.5-net-core-allow-fast-GRO-for-skbs-with-Ethernet-heade.patch
+@@ -0,0 +1,78 @@
++From: Alexander Lobakin <alobakin@dlink.ru>
++Date: Fri, 15 Nov 2019 12:11:35 +0300
++Subject: [PATCH] net: core: allow fast GRO for skbs with Ethernet header in
++ head
++
++Commit 78d3fd0b7de8 ("gro: Only use skb_gro_header for completely
++non-linear packets") back in May'09 (v2.6.31-rc1) has changed the
++original condition '!skb_headlen(skb)' to
++'skb->mac_header == skb->tail' in gro_reset_offset() saying: "Since
++the drivers that need this optimisation all provide completely
++non-linear packets" (note that this condition has become the current
++'skb_mac_header(skb) == skb_tail_pointer(skb)' later with commmit
++ced14f6804a9 ("net: Correct comparisons and calculations using
++skb->tail and skb-transport_header") without any functional changes).
++
++For now, we have the following rough statistics for v5.4-rc7:
++1) napi_gro_frags: 14
++2) napi_gro_receive with skb->head containing (most of) payload: 83
++3) napi_gro_receive with skb->head containing all the headers: 20
++4) napi_gro_receive with skb->head containing only Ethernet header: 2
++
++With the current condition, fast GRO with the usage of
++NAPI_GRO_CB(skb)->frag0 is available only in the [1] case.
++Packets pushed by [2] and [3] go through the 'slow' path, but
++it's not a problem for them as they already contain all the needed
++headers in skb->head, so pskb_may_pull() only moves skb->data.
++
++The layout of skbs in the fourth [4] case at the moment of
++dev_gro_receive() is identical to skbs that have come through [1],
++as napi_frags_skb() pulls Ethernet header to skb->head. The only
++difference is that the mentioned condition is always false for them,
++because skb_put() and friends irreversibly alter the tail pointer.
++They also go through the 'slow' path, but now every single
++pskb_may_pull() in every single .gro_receive() will call the *really*
++slow __pskb_pull_tail() to pull headers to head. This significantly
++decreases the overall performance for no visible reasons.
++
++The only two users of method [4] is:
++* drivers/staging/qlge
++* drivers/net/wireless/iwlwifi (all three variants: dvm, mvm, mvm-mq)
++
++Note that in case with wireless drivers we can't use [1]
++(napi_gro_frags()) at least for now and mac80211 stack always
++performs pushes and pulls anyways, so performance hit is inavoidable.
++
++At the moment of v2.6.31 the mentioned change was necessary (that's
++why I don't add the "Fixes:" tag), but it became obsolete since
++skb_gro_mac_header() has gone in commit a50e233c50db ("net-gro:
++restore frag0 optimization"), so we can simply revert the condition
++in gro_reset_offset() to allow skbs from [4] go through the 'fast'
++path just like in case [1].
++
++This was tested on a 600 MHz MIPS CPU and a custom driver and this
++patch gave boosts up to 40 Mbps to method [4] in both directions
++comparing to net-next, which made overall performance relatively
++close to [1] (without it, [4] is the slowest).
++
++v2:
++- Add more references and explanations to commit message
++- Fix some typos ibid
++- No functional changes
++
++Signed-off-by: Alexander Lobakin <alobakin@dlink.ru>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++
++--- a/net/core/dev.c
+++++ b/net/core/dev.c
++@@ -5429,8 +5429,7 @@ static inline void skb_gro_reset_offset(
++ 	NAPI_GRO_CB(skb)->frag0 = NULL;
++ 	NAPI_GRO_CB(skb)->frag0_len = 0;
++ 
++-	if (skb_mac_header(skb) == skb_tail_pointer(skb) &&
++-	    pinfo->nr_frags &&
+++	if (!skb_headlen(skb) && pinfo->nr_frags &&
++ 	    !PageHighMem(skb_frag_page(frag0)) &&
++ 	    (!NET_IP_ALIGN || !((skb_frag_off(frag0) + nhoff) & 3))) {
++ 		NAPI_GRO_CB(skb)->frag0 = skb_frag_address(frag0);
+diff --git a/target/linux/generic/backport-5.4/716-v5.5-net-sfp-move-fwnode-parsing-into-sfp-bus-layer.patch b/target/linux/generic/backport-5.4/716-v5.5-net-sfp-move-fwnode-parsing-into-sfp-bus-layer.patch
+new file mode 100644
+index 0000000000..92fe224873
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/716-v5.5-net-sfp-move-fwnode-parsing-into-sfp-bus-layer.patch
+@@ -0,0 +1,179 @@
++From 4054955f0da08c81d42220cb445820d474f1ac92 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Sat, 14 Sep 2019 14:21:22 +0100
++Subject: [PATCH 614/660] net: sfp: move fwnode parsing into sfp-bus layer
++
++Rather than parsing the sfp firmware node in phylink, parse it in the
++sfp-bus code, so we can re-use this code for PHYs without having to
++duplicate the parsing.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/phylink.c | 21 ++++---------
++ drivers/net/phy/sfp-bus.c | 65 +++++++++++++++++++++++++--------------
++ include/linux/sfp.h       | 10 +++---
++ 3 files changed, 53 insertions(+), 43 deletions(-)
++
++--- a/drivers/net/phy/phylink.c
+++++ b/drivers/net/phy/phylink.c
++@@ -565,26 +565,17 @@ static const struct sfp_upstream_ops sfp
++ static int phylink_register_sfp(struct phylink *pl,
++ 				struct fwnode_handle *fwnode)
++ {
++-	struct fwnode_reference_args ref;
+++	struct sfp_bus *bus;
++ 	int ret;
++ 
++-	if (!fwnode)
++-		return 0;
++-
++-	ret = fwnode_property_get_reference_args(fwnode, "sfp", NULL,
++-						 0, 0, &ref);
++-	if (ret < 0) {
++-		if (ret == -ENOENT)
++-			return 0;
++-
++-		phylink_err(pl, "unable to parse \"sfp\" node: %d\n",
++-			    ret);
+++	bus = sfp_register_upstream_node(fwnode, pl, &sfp_phylink_ops);
+++	if (IS_ERR(bus)) {
+++		ret = PTR_ERR(bus);
+++		phylink_err(pl, "unable to attach SFP bus: %d\n", ret);
++ 		return ret;
++ 	}
++ 
++-	pl->sfp_bus = sfp_register_upstream(ref.fwnode, pl, &sfp_phylink_ops);
++-	if (!pl->sfp_bus)
++-		return -ENOMEM;
+++	pl->sfp_bus = bus;
++ 
++ 	return 0;
++ }
++--- a/drivers/net/phy/sfp-bus.c
+++++ b/drivers/net/phy/sfp-bus.c
++@@ -4,6 +4,7 @@
++ #include <linux/list.h>
++ #include <linux/mutex.h>
++ #include <linux/phylink.h>
+++#include <linux/property.h>
++ #include <linux/rtnetlink.h>
++ #include <linux/slab.h>
++ 
++@@ -520,45 +521,63 @@ static void sfp_upstream_clear(struct sf
++ }
++ 
++ /**
++- * sfp_register_upstream() - Register the neighbouring device
++- * @fwnode: firmware node for the SFP bus
+++ * sfp_register_upstream_node() - parse and register the neighbouring device
+++ * @fwnode: firmware node for the parent device (MAC or PHY)
++  * @upstream: the upstream private data
++  * @ops: the upstream's &struct sfp_upstream_ops
++  *
++- * Register the upstream device (eg, PHY) with the SFP bus. MAC drivers
++- * should use phylink, which will call this function for them. Returns
++- * a pointer to the allocated &struct sfp_bus.
+++ * Parse the parent device's firmware node for a SFP bus, and register the
+++ * SFP bus using sfp_register_upstream().
++  *
++- * On error, returns %NULL.
+++ * Returns: on success, a pointer to the sfp_bus structure,
+++ *	    %NULL if no SFP is specified,
+++ * 	    on failure, an error pointer value:
+++ * 		corresponding to the errors detailed for
+++ * 		fwnode_property_get_reference_args().
+++ * 	        %-ENOMEM if we failed to allocate the bus.
+++ *		an error from the upstream's connect_phy() method.
++  */
++-struct sfp_bus *sfp_register_upstream(struct fwnode_handle *fwnode,
++-				      void *upstream,
++-				      const struct sfp_upstream_ops *ops)
++-{
++-	struct sfp_bus *bus = sfp_bus_get(fwnode);
++-	int ret = 0;
++-
++-	if (bus) {
++-		rtnl_lock();
++-		bus->upstream_ops = ops;
++-		bus->upstream = upstream;
+++struct sfp_bus *sfp_register_upstream_node(struct fwnode_handle *fwnode,
+++					   void *upstream,
+++					   const struct sfp_upstream_ops *ops)
+++{
+++	struct fwnode_reference_args ref;
+++	struct sfp_bus *bus;
+++	int ret;
++ 
++-		if (bus->sfp) {
++-			ret = sfp_register_bus(bus);
++-			if (ret)
++-				sfp_upstream_clear(bus);
++-		}
++-		rtnl_unlock();
+++	ret = fwnode_property_get_reference_args(fwnode, "sfp", NULL,
+++						 0, 0, &ref);
+++	if (ret == -ENOENT)
+++		return NULL;
+++	else if (ret < 0)
+++		return ERR_PTR(ret);
+++
+++	bus = sfp_bus_get(ref.fwnode);
+++	fwnode_handle_put(ref.fwnode);
+++	if (!bus)
+++		return ERR_PTR(-ENOMEM);
+++
+++	rtnl_lock();
+++	bus->upstream_ops = ops;
+++	bus->upstream = upstream;
+++
+++	if (bus->sfp) {
+++		ret = sfp_register_bus(bus);
+++		if (ret)
+++			sfp_upstream_clear(bus);
+++	} else {
+++		ret = 0;
++ 	}
+++	rtnl_unlock();
++ 
++ 	if (ret) {
++ 		sfp_bus_put(bus);
++-		bus = NULL;
+++		bus = ERR_PTR(ret);
++ 	}
++ 
++ 	return bus;
++ }
++-EXPORT_SYMBOL_GPL(sfp_register_upstream);
+++EXPORT_SYMBOL_GPL(sfp_register_upstream_node);
++ 
++ /**
++  * sfp_unregister_upstream() - Unregister sfp bus
++--- a/include/linux/sfp.h
+++++ b/include/linux/sfp.h
++@@ -508,9 +508,9 @@ int sfp_get_module_eeprom(struct sfp_bus
++ 			  u8 *data);
++ void sfp_upstream_start(struct sfp_bus *bus);
++ void sfp_upstream_stop(struct sfp_bus *bus);
++-struct sfp_bus *sfp_register_upstream(struct fwnode_handle *fwnode,
++-				      void *upstream,
++-				      const struct sfp_upstream_ops *ops);
+++struct sfp_bus *sfp_register_upstream_node(struct fwnode_handle *fwnode,
+++					   void *upstream,
+++					   const struct sfp_upstream_ops *ops);
++ void sfp_unregister_upstream(struct sfp_bus *bus);
++ #else
++ static inline int sfp_parse_port(struct sfp_bus *bus,
++@@ -553,11 +553,11 @@ static inline void sfp_upstream_stop(str
++ {
++ }
++ 
++-static inline struct sfp_bus *sfp_register_upstream(
+++static inline struct sfp_bus *sfp_register_upstream_node(
++ 	struct fwnode_handle *fwnode, void *upstream,
++ 	const struct sfp_upstream_ops *ops)
++ {
++-	return (struct sfp_bus *)-1;
+++	return NULL;
++ }
++ 
++ static inline void sfp_unregister_upstream(struct sfp_bus *bus)
+diff --git a/target/linux/generic/backport-5.4/717-v5.5-net-sfp-rework-upstream-interface.patch b/target/linux/generic/backport-5.4/717-v5.5-net-sfp-rework-upstream-interface.patch
+new file mode 100644
+index 0000000000..9175f2557a
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/717-v5.5-net-sfp-rework-upstream-interface.patch
+@@ -0,0 +1,254 @@
++From 863b5b6941f9f43b924393b6ba2b36647e7dee42 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Thu, 7 Nov 2019 17:06:08 +0000
++Subject: [PATCH 615/660] net: sfp: rework upstream interface
++
++The current upstream interface is an all-or-nothing, which is
++sub-optimal for future changes, as it doesn't allow the upstream driver
++to prepare for the SFP module becoming available, as it is at boot.
++
++Switch to a find-sfp-bus, add-upstream, del-upstream, put-sfp-bus
++interface structure instead, which allows the upstream driver to
++prepare for a module being available as soon as add-upstream is called.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/phylink.c | 10 +++--
++ drivers/net/phy/sfp-bus.c | 92 +++++++++++++++++++++++++++------------
++ include/linux/sfp.h       | 25 +++++++----
++ 3 files changed, 88 insertions(+), 39 deletions(-)
++
++--- a/drivers/net/phy/phylink.c
+++++ b/drivers/net/phy/phylink.c
++@@ -568,7 +568,7 @@ static int phylink_register_sfp(struct p
++ 	struct sfp_bus *bus;
++ 	int ret;
++ 
++-	bus = sfp_register_upstream_node(fwnode, pl, &sfp_phylink_ops);
+++	bus = sfp_bus_find_fwnode(fwnode);
++ 	if (IS_ERR(bus)) {
++ 		ret = PTR_ERR(bus);
++ 		phylink_err(pl, "unable to attach SFP bus: %d\n", ret);
++@@ -577,7 +577,10 @@ static int phylink_register_sfp(struct p
++ 
++ 	pl->sfp_bus = bus;
++ 
++-	return 0;
+++	ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
+++	sfp_bus_put(bus);
+++
+++	return ret;
++ }
++ 
++ /**
++@@ -675,8 +678,7 @@ EXPORT_SYMBOL_GPL(phylink_create);
++  */
++ void phylink_destroy(struct phylink *pl)
++ {
++-	if (pl->sfp_bus)
++-		sfp_unregister_upstream(pl->sfp_bus);
+++	sfp_bus_del_upstream(pl->sfp_bus);
++ 	if (pl->link_gpio)
++ 		gpiod_put(pl->link_gpio);
++ 
++--- a/drivers/net/phy/sfp-bus.c
+++++ b/drivers/net/phy/sfp-bus.c
++@@ -404,10 +404,19 @@ static void sfp_bus_release(struct kref
++ 	kfree(bus);
++ }
++ 
++-static void sfp_bus_put(struct sfp_bus *bus)
+++/**
+++ * sfp_bus_put() - put a reference on the &struct sfp_bus
+++ * bus: the &struct sfp_bus found via sfp_bus_find_fwnode()
+++ *
+++ * Put a reference on the &struct sfp_bus and free the underlying structure
+++ * if this was the last reference.
+++ */
+++void sfp_bus_put(struct sfp_bus *bus)
++ {
++-	kref_put_mutex(&bus->kref, sfp_bus_release, &sfp_mutex);
+++	if (bus)
+++		kref_put_mutex(&bus->kref, sfp_bus_release, &sfp_mutex);
++ }
+++EXPORT_SYMBOL_GPL(sfp_bus_put);
++ 
++ static int sfp_register_bus(struct sfp_bus *bus)
++ {
++@@ -423,11 +432,11 @@ static int sfp_register_bus(struct sfp_b
++ 				return ret;
++ 		}
++ 	}
+++	bus->registered = true;
++ 	bus->socket_ops->attach(bus->sfp);
++ 	if (bus->started)
++ 		bus->socket_ops->start(bus->sfp);
++ 	bus->upstream_ops->attach(bus->upstream, bus);
++-	bus->registered = true;
++ 	return 0;
++ }
++ 
++@@ -521,13 +530,12 @@ static void sfp_upstream_clear(struct sf
++ }
++ 
++ /**
++- * sfp_register_upstream_node() - parse and register the neighbouring device
+++ * sfp_bus_find_fwnode() - parse and locate the SFP bus from fwnode
++  * @fwnode: firmware node for the parent device (MAC or PHY)
++- * @upstream: the upstream private data
++- * @ops: the upstream's &struct sfp_upstream_ops
++  *
++- * Parse the parent device's firmware node for a SFP bus, and register the
++- * SFP bus using sfp_register_upstream().
+++ * Parse the parent device's firmware node for a SFP bus, and locate
+++ * the sfp_bus structure, incrementing its reference count.  This must
+++ * be put via sfp_bus_put() when done.
++  *
++  * Returns: on success, a pointer to the sfp_bus structure,
++  *	    %NULL if no SFP is specified,
++@@ -537,9 +545,7 @@ static void sfp_upstream_clear(struct sf
++  * 	        %-ENOMEM if we failed to allocate the bus.
++  *		an error from the upstream's connect_phy() method.
++  */
++-struct sfp_bus *sfp_register_upstream_node(struct fwnode_handle *fwnode,
++-					   void *upstream,
++-					   const struct sfp_upstream_ops *ops)
+++struct sfp_bus *sfp_bus_find_fwnode(struct fwnode_handle *fwnode)
++ {
++ 	struct fwnode_reference_args ref;
++ 	struct sfp_bus *bus;
++@@ -557,7 +563,39 @@ struct sfp_bus *sfp_register_upstream_no
++ 	if (!bus)
++ 		return ERR_PTR(-ENOMEM);
++ 
+++	return bus;
+++}
+++EXPORT_SYMBOL_GPL(sfp_bus_find_fwnode);
+++
+++/**
+++ * sfp_bus_add_upstream() - parse and register the neighbouring device
+++ * @bus: the &struct sfp_bus found via sfp_bus_find_fwnode()
+++ * @upstream: the upstream private data
+++ * @ops: the upstream's &struct sfp_upstream_ops
+++ *
+++ * Add upstream driver for the SFP bus, and if the bus is complete, register
+++ * the SFP bus using sfp_register_upstream().  This takes a reference on the
+++ * bus, so it is safe to put the bus after this call.
+++ *
+++ * Returns: on success, a pointer to the sfp_bus structure,
+++ *	    %NULL if no SFP is specified,
+++ * 	    on failure, an error pointer value:
+++ * 		corresponding to the errors detailed for
+++ * 		fwnode_property_get_reference_args().
+++ * 	        %-ENOMEM if we failed to allocate the bus.
+++ *		an error from the upstream's connect_phy() method.
+++ */
+++int sfp_bus_add_upstream(struct sfp_bus *bus, void *upstream,
+++			 const struct sfp_upstream_ops *ops)
+++{
+++	int ret;
+++
+++	/* If no bus, return success */
+++	if (!bus)
+++		return 0;
+++
++ 	rtnl_lock();
+++	kref_get(&bus->kref);
++ 	bus->upstream_ops = ops;
++ 	bus->upstream = upstream;
++ 
++@@ -570,33 +608,33 @@ struct sfp_bus *sfp_register_upstream_no
++ 	}
++ 	rtnl_unlock();
++ 
++-	if (ret) {
+++	if (ret)
++ 		sfp_bus_put(bus);
++-		bus = ERR_PTR(ret);
++-	}
++ 
++-	return bus;
+++	return ret;
++ }
++-EXPORT_SYMBOL_GPL(sfp_register_upstream_node);
+++EXPORT_SYMBOL_GPL(sfp_bus_add_upstream);
++ 
++ /**
++- * sfp_unregister_upstream() - Unregister sfp bus
+++ * sfp_bus_del_upstream() - Delete a sfp bus
++  * @bus: a pointer to the &struct sfp_bus structure for the sfp module
++  *
++- * Unregister a previously registered upstream connection for the SFP
++- * module. @bus is returned from sfp_register_upstream().
+++ * Delete a previously registered upstream connection for the SFP
+++ * module. @bus should have been added by sfp_bus_add_upstream().
++  */
++-void sfp_unregister_upstream(struct sfp_bus *bus)
+++void sfp_bus_del_upstream(struct sfp_bus *bus)
++ {
++-	rtnl_lock();
++-	if (bus->sfp)
++-		sfp_unregister_bus(bus);
++-	sfp_upstream_clear(bus);
++-	rtnl_unlock();
+++	if (bus) {
+++		rtnl_lock();
+++		if (bus->sfp)
+++			sfp_unregister_bus(bus);
+++		sfp_upstream_clear(bus);
+++		rtnl_unlock();
++ 
++-	sfp_bus_put(bus);
+++		sfp_bus_put(bus);
+++	}
++ }
++-EXPORT_SYMBOL_GPL(sfp_unregister_upstream);
+++EXPORT_SYMBOL_GPL(sfp_bus_del_upstream);
++ 
++ /* Socket driver entry points */
++ int sfp_add_phy(struct sfp_bus *bus, struct phy_device *phydev)
++--- a/include/linux/sfp.h
+++++ b/include/linux/sfp.h
++@@ -508,10 +508,11 @@ int sfp_get_module_eeprom(struct sfp_bus
++ 			  u8 *data);
++ void sfp_upstream_start(struct sfp_bus *bus);
++ void sfp_upstream_stop(struct sfp_bus *bus);
++-struct sfp_bus *sfp_register_upstream_node(struct fwnode_handle *fwnode,
++-					   void *upstream,
++-					   const struct sfp_upstream_ops *ops);
++-void sfp_unregister_upstream(struct sfp_bus *bus);
+++void sfp_bus_put(struct sfp_bus *bus);
+++struct sfp_bus *sfp_bus_find_fwnode(struct fwnode_handle *fwnode);
+++int sfp_bus_add_upstream(struct sfp_bus *bus, void *upstream,
+++			 const struct sfp_upstream_ops *ops);
+++void sfp_bus_del_upstream(struct sfp_bus *bus);
++ #else
++ static inline int sfp_parse_port(struct sfp_bus *bus,
++ 				 const struct sfp_eeprom_id *id,
++@@ -553,14 +554,22 @@ static inline void sfp_upstream_stop(str
++ {
++ }
++ 
++-static inline struct sfp_bus *sfp_register_upstream_node(
++-	struct fwnode_handle *fwnode, void *upstream,
++-	const struct sfp_upstream_ops *ops)
+++static inline void sfp_bus_put(struct sfp_bus *bus)
+++{
+++}
+++
+++static inline struct sfp_bus *sfp_bus_find_fwnode(struct fwnode_handle *fwnode)
++ {
++ 	return NULL;
++ }
++ 
++-static inline void sfp_unregister_upstream(struct sfp_bus *bus)
+++static int sfp_bus_add_upstream(struct sfp_bus *bus, void *upstream,
+++				const struct sfp_upstream_ops *ops)
+++{
+++	return 0;
+++}
+++
+++static inline void sfp_bus_del_upstream(struct sfp_bus *bus)
++ {
++ }
++ #endif
+diff --git a/target/linux/generic/backport-5.4/718-v5.5-net-sfp-fix-sfp_bus_put-kernel-documentation.patch b/target/linux/generic/backport-5.4/718-v5.5-net-sfp-fix-sfp_bus_put-kernel-documentation.patch
+new file mode 100644
+index 0000000000..c7bfd8a304
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/718-v5.5-net-sfp-fix-sfp_bus_put-kernel-documentation.patch
+@@ -0,0 +1,27 @@
++From ea7bfd81921827d334c2a23bd11ef0e4e2abafd2 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Sat, 9 Nov 2019 08:13:50 +0000
++Subject: [PATCH 616/660] net: sfp: fix sfp_bus_put() kernel documentation
++
++The kbuild test robot found a problem with htmldocs with the recent
++change to the SFP interfaces.  Fix the kernel documentation for
++sfp_bus_put() which was missing an '@' before the argument name
++description.
++
++Fixes: 727b3668b730 ("net: sfp: rework upstream interface")
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp-bus.c | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/net/phy/sfp-bus.c
+++++ b/drivers/net/phy/sfp-bus.c
++@@ -406,7 +406,7 @@ static void sfp_bus_release(struct kref
++ 
++ /**
++  * sfp_bus_put() - put a reference on the &struct sfp_bus
++- * bus: the &struct sfp_bus found via sfp_bus_find_fwnode()
+++ * @bus: the &struct sfp_bus found via sfp_bus_find_fwnode()
++  *
++  * Put a reference on the &struct sfp_bus and free the underlying structure
++  * if this was the last reference.
+diff --git a/target/linux/generic/backport-5.4/719-v5.5-net-sfp-fix-sfp_bus_add_upstream-warning.patch b/target/linux/generic/backport-5.4/719-v5.5-net-sfp-fix-sfp_bus_add_upstream-warning.patch
+new file mode 100644
+index 0000000000..9528049e1b
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/719-v5.5-net-sfp-fix-sfp_bus_add_upstream-warning.patch
+@@ -0,0 +1,27 @@
++From f76d84cd85f8bd3f083495f7ca723822cba8abc9 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Mon, 11 Nov 2019 10:23:35 +0000
++Subject: [PATCH 617/660] net: sfp: fix sfp_bus_add_upstream() warning
++
++When building with SFP disabled, the stub for sfp_bus_add_upstream()
++missed "inline".  Add it.
++
++Fixes: 727b3668b730 ("net: sfp: rework upstream interface")
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ include/linux/sfp.h | 4 ++--
++ 1 file changed, 2 insertions(+), 2 deletions(-)
++
++--- a/include/linux/sfp.h
+++++ b/include/linux/sfp.h
++@@ -563,8 +563,8 @@ static inline struct sfp_bus *sfp_bus_fi
++ 	return NULL;
++ }
++ 
++-static int sfp_bus_add_upstream(struct sfp_bus *bus, void *upstream,
++-				const struct sfp_upstream_ops *ops)
+++static inline int sfp_bus_add_upstream(struct sfp_bus *bus, void *upstream,
+++				       const struct sfp_upstream_ops *ops)
++ {
++ 	return 0;
++ }
+diff --git a/target/linux/generic/backport-5.4/720-v5.5-net-sfp-move-sfp-sub-state-machines-into-separate-fu.patch b/target/linux/generic/backport-5.4/720-v5.5-net-sfp-move-sfp-sub-state-machines-into-separate-fu.patch
+new file mode 100644
+index 0000000000..e4ca85b6e2
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/720-v5.5-net-sfp-move-sfp-sub-state-machines-into-separate-fu.patch
+@@ -0,0 +1,124 @@
++From b9d6ed5cdb67533feda7f221eb06f2f9f1ff5047 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Fri, 11 Oct 2019 19:33:58 +0100
++Subject: [PATCH 618/660] net: sfp: move sfp sub-state machines into separate
++ functions
++
++Move the SFP sub-state machines out of the main state machine function,
++in preparation for it doing a bit more with the device state.  By doing
++so, we ensure that our debug after the main state machine is always
++printed.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 74 +++++++++++++++++++++++++------------------
++ 1 file changed, 43 insertions(+), 31 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -1544,19 +1544,34 @@ static void sfp_sm_mod_remove(struct sfp
++ 	dev_info(sfp->dev, "module removed\n");
++ }
++ 
++-static void sfp_sm_event(struct sfp *sfp, unsigned int event)
+++/* This state machine tracks the netdev up/down state */
+++static void sfp_sm_device(struct sfp *sfp, unsigned int event)
++ {
++-	mutex_lock(&sfp->sm_mutex);
+++	switch (sfp->sm_dev_state) {
+++	default:
+++		if (event == SFP_E_DEV_UP)
+++			sfp->sm_dev_state = SFP_DEV_UP;
+++		break;
++ 
++-	dev_dbg(sfp->dev, "SM: enter %s:%s:%s event %s\n",
++-		mod_state_to_str(sfp->sm_mod_state),
++-		dev_state_to_str(sfp->sm_dev_state),
++-		sm_state_to_str(sfp->sm_state),
++-		event_to_str(event));
+++	case SFP_DEV_UP:
+++		if (event == SFP_E_DEV_DOWN) {
+++			/* If the module has a PHY, avoid raising TX disable
+++			 * as this resets the PHY. Otherwise, raise it to
+++			 * turn the laser off.
+++			 */
+++			if (!sfp->mod_phy)
+++				sfp_module_tx_disable(sfp);
+++			sfp->sm_dev_state = SFP_DEV_DOWN;
+++		}
+++		break;
+++	}
+++}
++ 
++-	/* This state machine tracks the insert/remove state of
++-	 * the module, and handles probing the on-board EEPROM.
++-	 */
+++/* This state machine tracks the insert/remove state of
+++ * the module, and handles probing the on-board EEPROM.
+++ */
+++static void sfp_sm_module(struct sfp *sfp, unsigned int event)
+++{
++ 	switch (sfp->sm_mod_state) {
++ 	default:
++ 		if (event == SFP_E_INSERT && sfp->attached) {
++@@ -1596,27 +1611,10 @@ static void sfp_sm_event(struct sfp *sfp
++ 		}
++ 		break;
++ 	}
+++}
++ 
++-	/* This state machine tracks the netdev up/down state */
++-	switch (sfp->sm_dev_state) {
++-	default:
++-		if (event == SFP_E_DEV_UP)
++-			sfp->sm_dev_state = SFP_DEV_UP;
++-		break;
++-
++-	case SFP_DEV_UP:
++-		if (event == SFP_E_DEV_DOWN) {
++-			/* If the module has a PHY, avoid raising TX disable
++-			 * as this resets the PHY. Otherwise, raise it to
++-			 * turn the laser off.
++-			 */
++-			if (!sfp->mod_phy)
++-				sfp_module_tx_disable(sfp);
++-			sfp->sm_dev_state = SFP_DEV_DOWN;
++-		}
++-		break;
++-	}
++-
+++static void sfp_sm_main(struct sfp *sfp, unsigned int event)
+++{
++ 	/* Some events are global */
++ 	if (sfp->sm_state != SFP_S_DOWN &&
++ 	    (sfp->sm_mod_state != SFP_MOD_PRESENT ||
++@@ -1627,7 +1625,6 @@ static void sfp_sm_event(struct sfp *sfp
++ 		if (sfp->mod_phy)
++ 			sfp_sm_phy_detach(sfp);
++ 		sfp_sm_next(sfp, SFP_S_DOWN, 0);
++-		mutex_unlock(&sfp->sm_mutex);
++ 		return;
++ 	}
++ 
++@@ -1682,6 +1679,21 @@ static void sfp_sm_event(struct sfp *sfp
++ 	case SFP_S_TX_DISABLE:
++ 		break;
++ 	}
+++}
+++
+++static void sfp_sm_event(struct sfp *sfp, unsigned int event)
+++{
+++	mutex_lock(&sfp->sm_mutex);
+++
+++	dev_dbg(sfp->dev, "SM: enter %s:%s:%s event %s\n",
+++		mod_state_to_str(sfp->sm_mod_state),
+++		dev_state_to_str(sfp->sm_dev_state),
+++		sm_state_to_str(sfp->sm_state),
+++		event_to_str(event));
+++
+++	sfp_sm_module(sfp, event);
+++	sfp_sm_device(sfp, event);
+++	sfp_sm_main(sfp, event);
++ 
++ 	dev_dbg(sfp->dev, "SM: exit %s:%s:%s\n",
++ 		mod_state_to_str(sfp->sm_mod_state),
+diff --git a/target/linux/generic/backport-5.4/721-v5.5-net-sfp-move-tx-disable-on-device-down-to-main-state.patch b/target/linux/generic/backport-5.4/721-v5.5-net-sfp-move-tx-disable-on-device-down-to-main-state.patch
+new file mode 100644
+index 0000000000..71021c8f4e
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/721-v5.5-net-sfp-move-tx-disable-on-device-down-to-main-state.patch
+@@ -0,0 +1,41 @@
++From 7e89b737c97a9e7a81dd1584000bc136b92f12fd Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Fri, 11 Oct 2019 22:14:47 +0100
++Subject: [PATCH 619/660] net: sfp: move tx disable on device down to main
++ state machine
++
++Move the tx disable assertion on device down to the main state
++machine.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 10 ++--------
++ 1 file changed, 2 insertions(+), 8 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -1554,15 +1554,8 @@ static void sfp_sm_device(struct sfp *sf
++ 		break;
++ 
++ 	case SFP_DEV_UP:
++-		if (event == SFP_E_DEV_DOWN) {
++-			/* If the module has a PHY, avoid raising TX disable
++-			 * as this resets the PHY. Otherwise, raise it to
++-			 * turn the laser off.
++-			 */
++-			if (!sfp->mod_phy)
++-				sfp_module_tx_disable(sfp);
+++		if (event == SFP_E_DEV_DOWN)
++ 			sfp->sm_dev_state = SFP_DEV_DOWN;
++-		}
++ 		break;
++ 	}
++ }
++@@ -1624,6 +1617,7 @@ static void sfp_sm_main(struct sfp *sfp,
++ 			sfp_sm_link_down(sfp);
++ 		if (sfp->mod_phy)
++ 			sfp_sm_phy_detach(sfp);
+++		sfp_module_tx_disable(sfp);
++ 		sfp_sm_next(sfp, SFP_S_DOWN, 0);
++ 		return;
++ 	}
+diff --git a/target/linux/generic/backport-5.4/722-v5.5-net-sfp-rename-sfp_sm_ins_next-as-sfp_sm_mod_next.patch b/target/linux/generic/backport-5.4/722-v5.5-net-sfp-rename-sfp_sm_ins_next-as-sfp_sm_mod_next.patch
+new file mode 100644
+index 0000000000..2974586b13
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/722-v5.5-net-sfp-rename-sfp_sm_ins_next-as-sfp_sm_mod_next.patch
+@@ -0,0 +1,71 @@
++From f2a1ccfc4ad4f97c98c3cc18eb32992151ce089a Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Fri, 11 Oct 2019 22:27:21 +0100
++Subject: [PATCH 620/660] net: sfp: rename sfp_sm_ins_next() as
++ sfp_sm_mod_next()
++
++sfp_sm_ins_next() modifies the module state machine.  Change it's name
++to reflect this.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 16 ++++++++--------
++ 1 file changed, 8 insertions(+), 8 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -1245,7 +1245,7 @@ static void sfp_sm_next(struct sfp *sfp,
++ 	sfp_sm_set_timer(sfp, timeout);
++ }
++ 
++-static void sfp_sm_ins_next(struct sfp *sfp, unsigned int state,
+++static void sfp_sm_mod_next(struct sfp *sfp, unsigned int state,
++ 			    unsigned int timeout)
++ {
++ 	sfp->sm_mod_state = state;
++@@ -1569,22 +1569,22 @@ static void sfp_sm_module(struct sfp *sf
++ 	default:
++ 		if (event == SFP_E_INSERT && sfp->attached) {
++ 			sfp_module_tx_disable(sfp);
++-			sfp_sm_ins_next(sfp, SFP_MOD_PROBE, T_PROBE_INIT);
+++			sfp_sm_mod_next(sfp, SFP_MOD_PROBE, T_PROBE_INIT);
++ 		}
++ 		break;
++ 
++ 	case SFP_MOD_PROBE:
++ 		if (event == SFP_E_REMOVE) {
++-			sfp_sm_ins_next(sfp, SFP_MOD_EMPTY, 0);
+++			sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0);
++ 		} else if (event == SFP_E_TIMEOUT) {
++ 			int val = sfp_sm_mod_probe(sfp);
++ 
++ 			if (val == 0)
++-				sfp_sm_ins_next(sfp, SFP_MOD_PRESENT, 0);
+++				sfp_sm_mod_next(sfp, SFP_MOD_PRESENT, 0);
++ 			else if (val > 0)
++-				sfp_sm_ins_next(sfp, SFP_MOD_HPOWER, val);
+++				sfp_sm_mod_next(sfp, SFP_MOD_HPOWER, val);
++ 			else if (val != -EAGAIN)
++-				sfp_sm_ins_next(sfp, SFP_MOD_ERROR, 0);
+++				sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0);
++ 			else
++ 				sfp_sm_set_timer(sfp, T_PROBE_RETRY);
++ 		}
++@@ -1592,7 +1592,7 @@ static void sfp_sm_module(struct sfp *sf
++ 
++ 	case SFP_MOD_HPOWER:
++ 		if (event == SFP_E_TIMEOUT) {
++-			sfp_sm_ins_next(sfp, SFP_MOD_PRESENT, 0);
+++			sfp_sm_mod_next(sfp, SFP_MOD_PRESENT, 0);
++ 			break;
++ 		}
++ 		/* fallthrough */
++@@ -1600,7 +1600,7 @@ static void sfp_sm_module(struct sfp *sf
++ 	case SFP_MOD_ERROR:
++ 		if (event == SFP_E_REMOVE) {
++ 			sfp_sm_mod_remove(sfp);
++-			sfp_sm_ins_next(sfp, SFP_MOD_EMPTY, 0);
+++			sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0);
++ 		}
++ 		break;
++ 	}
+diff --git a/target/linux/generic/backport-5.4/723-v5.5-net-sfp-handle-module-remove-outside-state-machine.patch b/target/linux/generic/backport-5.4/723-v5.5-net-sfp-handle-module-remove-outside-state-machine.patch
+new file mode 100644
+index 0000000000..62cdb8a6ce
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/723-v5.5-net-sfp-handle-module-remove-outside-state-machine.patch
+@@ -0,0 +1,53 @@
++From d2591ea5520e2ee8fa557f96bb64c23cafac4b20 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Tue, 15 Oct 2019 10:33:13 +0100
++Subject: [PATCH 621/660] net: sfp: handle module remove outside state machine
++
++Removing a module resets the module state machine back to its initial
++state.  Rather than explicitly handling this in every state, handle it
++early on outside of the state machine.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 16 +++++++++-------
++ 1 file changed, 9 insertions(+), 7 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -1565,6 +1565,14 @@ static void sfp_sm_device(struct sfp *sf
++  */
++ static void sfp_sm_module(struct sfp *sfp, unsigned int event)
++ {
+++	/* Handle remove event globally, it resets this state machine */
+++	if (event == SFP_E_REMOVE) {
+++		if (sfp->sm_mod_state > SFP_MOD_PROBE)
+++			sfp_sm_mod_remove(sfp);
+++		sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0);
+++		return;
+++	}
+++
++ 	switch (sfp->sm_mod_state) {
++ 	default:
++ 		if (event == SFP_E_INSERT && sfp->attached) {
++@@ -1574,9 +1582,7 @@ static void sfp_sm_module(struct sfp *sf
++ 		break;
++ 
++ 	case SFP_MOD_PROBE:
++-		if (event == SFP_E_REMOVE) {
++-			sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0);
++-		} else if (event == SFP_E_TIMEOUT) {
+++		if (event == SFP_E_TIMEOUT) {
++ 			int val = sfp_sm_mod_probe(sfp);
++ 
++ 			if (val == 0)
++@@ -1598,10 +1604,6 @@ static void sfp_sm_module(struct sfp *sf
++ 		/* fallthrough */
++ 	case SFP_MOD_PRESENT:
++ 	case SFP_MOD_ERROR:
++-		if (event == SFP_E_REMOVE) {
++-			sfp_sm_mod_remove(sfp);
++-			sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0);
++-		}
++ 		break;
++ 	}
++ }
+diff --git a/target/linux/generic/backport-5.4/724-v5.5-net-sfp-rename-T_PROBE_WAIT-to-T_SERIAL.patch b/target/linux/generic/backport-5.4/724-v5.5-net-sfp-rename-T_PROBE_WAIT-to-T_SERIAL.patch
+new file mode 100644
+index 0000000000..780e7d7876
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/724-v5.5-net-sfp-rename-T_PROBE_WAIT-to-T_SERIAL.patch
+@@ -0,0 +1,51 @@
++From 615090acb3c0b41691f3a03522ea38350387c0e4 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Tue, 15 Oct 2019 10:54:15 +0100
++Subject: [PATCH 622/660] net: sfp: rename T_PROBE_WAIT to T_SERIAL
++
++SFF-8472 rev 12.2 defines the time for the serial bus to become ready
++using t_serial.  Use this as our identifier for this timeout to make
++it clear what we are referring to.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 13 ++++++-------
++ 1 file changed, 6 insertions(+), 7 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -149,11 +149,10 @@ static const enum gpiod_flags gpio_flags
++  * the same length on the PCB, which means it's possible for MOD DEF 0 to
++  * connect before the I2C bus on MOD DEF 1/2.
++  *
++- * The SFP MSA specifies 300ms as t_init (the time taken for TX_FAULT to
++- * be deasserted) but makes no mention of the earliest time before we can
++- * access the I2C EEPROM.  However, Avago modules require 300ms.
+++ * The SFF-8472 specifies t_serial ("Time from power on until module is
+++ * ready for data transmission over the two wire serial bus.") as 300ms.
++  */
++-#define T_PROBE_INIT	msecs_to_jiffies(300)
+++#define T_SERIAL	msecs_to_jiffies(300)
++ #define T_HPOWER_LEVEL	msecs_to_jiffies(300)
++ #define T_PROBE_RETRY	msecs_to_jiffies(100)
++ 
++@@ -1560,8 +1559,8 @@ static void sfp_sm_device(struct sfp *sf
++ 	}
++ }
++ 
++-/* This state machine tracks the insert/remove state of
++- * the module, and handles probing the on-board EEPROM.
+++/* This state machine tracks the insert/remove state of the module, probes
+++ * the on-board EEPROM, and sets up the power level.
++  */
++ static void sfp_sm_module(struct sfp *sfp, unsigned int event)
++ {
++@@ -1577,7 +1576,7 @@ static void sfp_sm_module(struct sfp *sf
++ 	default:
++ 		if (event == SFP_E_INSERT && sfp->attached) {
++ 			sfp_module_tx_disable(sfp);
++-			sfp_sm_mod_next(sfp, SFP_MOD_PROBE, T_PROBE_INIT);
+++			sfp_sm_mod_next(sfp, SFP_MOD_PROBE, T_SERIAL);
++ 		}
++ 		break;
++ 
+diff --git a/target/linux/generic/backport-5.4/725-v5.5-net-sfp-parse-SFP-power-requirement-earlier.patch b/target/linux/generic/backport-5.4/725-v5.5-net-sfp-parse-SFP-power-requirement-earlier.patch
+new file mode 100644
+index 0000000000..df5ef9f79e
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/725-v5.5-net-sfp-parse-SFP-power-requirement-earlier.patch
+@@ -0,0 +1,115 @@
++From d4b8746219e8c0361e5ed6e440ab3a8a600d1f76 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Fri, 11 Oct 2019 17:24:40 +0100
++Subject: [PATCH 623/660] net: sfp: parse SFP power requirement earlier
++
++Parse the SFP power requirement earlier, in preparation for moving the
++power level setup code.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 42 +++++++++++++++++++++++++++++-------------
++ 1 file changed, 29 insertions(+), 13 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -198,6 +198,8 @@ struct sfp {
++ 	unsigned int sm_retries;
++ 
++ 	struct sfp_eeprom_id id;
+++	unsigned int module_power_mW;
+++
++ #if IS_ENABLED(CONFIG_HWMON)
++ 	struct sfp_diag diag;
++ 	struct device *hwmon_dev;
++@@ -1374,17 +1376,14 @@ static void sfp_sm_mod_init(struct sfp *
++ 		sfp_sm_probe_phy(sfp);
++ }
++ 
++-static int sfp_sm_mod_hpower(struct sfp *sfp)
+++static int sfp_module_parse_power(struct sfp *sfp)
++ {
++-	u32 power;
++-	u8 val;
++-	int err;
+++	u32 power_mW = 1000;
++ 
++-	power = 1000;
++ 	if (sfp->id.ext.options & cpu_to_be16(SFP_OPTIONS_POWER_DECL))
++-		power = 1500;
+++		power_mW = 1500;
++ 	if (sfp->id.ext.options & cpu_to_be16(SFP_OPTIONS_HIGH_POWER_LEVEL))
++-		power = 2000;
+++		power_mW = 2000;
++ 
++ 	if (sfp->id.ext.sff8472_compliance == SFP_SFF8472_COMPLIANCE_NONE &&
++ 	    (sfp->id.ext.diagmon & (SFP_DIAGMON_DDM | SFP_DIAGMON_ADDRMODE)) !=
++@@ -1393,23 +1392,33 @@ static int sfp_sm_mod_hpower(struct sfp
++ 		 * or requires an address change sequence, so assume that
++ 		 * the module powers up in the indicated power mode.
++ 		 */
++-		if (power > sfp->max_power_mW) {
+++		if (power_mW > sfp->max_power_mW) {
++ 			dev_err(sfp->dev,
++ 				"Host does not support %u.%uW modules\n",
++-				power / 1000, (power / 100) % 10);
+++				power_mW / 1000, (power_mW / 100) % 10);
++ 			return -EINVAL;
++ 		}
++ 		return 0;
++ 	}
++ 
++-	if (power > sfp->max_power_mW) {
+++	if (power_mW > sfp->max_power_mW) {
++ 		dev_warn(sfp->dev,
++ 			 "Host does not support %u.%uW modules, module left in power mode 1\n",
++-			 power / 1000, (power / 100) % 10);
+++			 power_mW / 1000, (power_mW / 100) % 10);
++ 		return 0;
++ 	}
++ 
++-	if (power <= 1000)
+++	sfp->module_power_mW = power_mW;
+++
+++	return 0;
+++}
+++
+++static int sfp_sm_mod_hpower(struct sfp *sfp)
+++{
+++	u8 val;
+++	int err;
+++
+++	if (sfp->module_power_mW <= 1000)
++ 		return 0;
++ 
++ 	err = sfp_read(sfp, true, SFP_EXT_STATUS, &val, sizeof(val));
++@@ -1429,7 +1438,8 @@ static int sfp_sm_mod_hpower(struct sfp
++ 	}
++ 
++ 	dev_info(sfp->dev, "Module switched to %u.%uW power level\n",
++-		 power / 1000, (power / 100) % 10);
+++		 sfp->module_power_mW / 1000,
+++		 (sfp->module_power_mW / 100) % 10);
++ 	return T_HPOWER_LEVEL;
++ 
++ err:
++@@ -1516,6 +1526,11 @@ static int sfp_sm_mod_probe(struct sfp *
++ 		dev_warn(sfp->dev,
++ 			 "module address swap to access page 0xA2 is not supported.\n");
++ 
+++	/* Parse the module power requirement */
+++	ret = sfp_module_parse_power(sfp);
+++	if (ret < 0)
+++		return ret;
+++
++ 	ret = sfp_hwmon_insert(sfp);
++ 	if (ret < 0)
++ 		return ret;
++@@ -1539,6 +1554,7 @@ static void sfp_sm_mod_remove(struct sfp
++ 	sfp_module_tx_disable(sfp);
++ 
++ 	memset(&sfp->id, 0, sizeof(sfp->id));
+++	sfp->module_power_mW = 0;
++ 
++ 	dev_info(sfp->dev, "module removed\n");
++ }
+diff --git a/target/linux/generic/backport-5.4/726-v5.5-net-sfp-avoid-power-switch-on-address-change-modules.patch b/target/linux/generic/backport-5.4/726-v5.5-net-sfp-avoid-power-switch-on-address-change-modules.patch
+new file mode 100644
+index 0000000000..5237f55055
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/726-v5.5-net-sfp-avoid-power-switch-on-address-change-modules.patch
+@@ -0,0 +1,65 @@
++From dca678b8838945572cf50584cb33a7199c1fd397 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Thu, 17 Oct 2019 00:24:18 +0100
++Subject: [PATCH 624/660] net: sfp: avoid power switch on address-change
++ modules
++
++If the module indicates that it requires an address change sequence to
++switch between address 0x50 and 0x51, which we don't support, we can't
++write to the register that controls the power mode to switch to high
++power mode.  Warn the user that the module may not be functional in
++this case, and don't try to change the power mode.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 31 ++++++++++++++++++++-----------
++ 1 file changed, 20 insertions(+), 11 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -1385,25 +1385,34 @@ static int sfp_module_parse_power(struct
++ 	if (sfp->id.ext.options & cpu_to_be16(SFP_OPTIONS_HIGH_POWER_LEVEL))
++ 		power_mW = 2000;
++ 
++-	if (sfp->id.ext.sff8472_compliance == SFP_SFF8472_COMPLIANCE_NONE &&
++-	    (sfp->id.ext.diagmon & (SFP_DIAGMON_DDM | SFP_DIAGMON_ADDRMODE)) !=
++-	    SFP_DIAGMON_DDM) {
++-		/* The module appears not to implement bus address 0xa2,
++-		 * or requires an address change sequence, so assume that
++-		 * the module powers up in the indicated power mode.
++-		 */
++-		if (power_mW > sfp->max_power_mW) {
+++	if (power_mW > sfp->max_power_mW) {
+++		/* Module power specification exceeds the allowed maximum. */
+++		if (sfp->id.ext.sff8472_compliance ==
+++			SFP_SFF8472_COMPLIANCE_NONE &&
+++		    !(sfp->id.ext.diagmon & SFP_DIAGMON_DDM)) {
+++			/* The module appears not to implement bus address
+++			 * 0xa2, so assume that the module powers up in the
+++			 * indicated mode.
+++			 */
++ 			dev_err(sfp->dev,
++ 				"Host does not support %u.%uW modules\n",
++ 				power_mW / 1000, (power_mW / 100) % 10);
++ 			return -EINVAL;
+++		} else {
+++			dev_warn(sfp->dev,
+++				 "Host does not support %u.%uW modules, module left in power mode 1\n",
+++				 power_mW / 1000, (power_mW / 100) % 10);
+++			return 0;
++ 		}
++-		return 0;
++ 	}
++ 
++-	if (power_mW > sfp->max_power_mW) {
+++	/* If the module requires a higher power mode, but also requires
+++	 * an address change sequence, warn the user that the module may
+++	 * not be functional.
+++	 */
+++	if (sfp->id.ext.diagmon & SFP_DIAGMON_ADDRMODE && power_mW > 1000) {
++ 		dev_warn(sfp->dev,
++-			 "Host does not support %u.%uW modules, module left in power mode 1\n",
+++			 "Address Change Sequence not supported but module requies %u.%uW, module may not be functional\n",
++ 			 power_mW / 1000, (power_mW / 100) % 10);
++ 		return 0;
++ 	}
+diff --git a/target/linux/generic/backport-5.4/727-v5.5-net-sfp-control-TX_DISABLE-and-phy-only-from-main-st.patch b/target/linux/generic/backport-5.4/727-v5.5-net-sfp-control-TX_DISABLE-and-phy-only-from-main-st.patch
+new file mode 100644
+index 0000000000..eebcac639f
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/727-v5.5-net-sfp-control-TX_DISABLE-and-phy-only-from-main-st.patch
+@@ -0,0 +1,52 @@
++From df5c4d93c5a59cba0f7479a4cd4e22b50726ce88 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Thu, 17 Oct 2019 11:12:42 +0100
++Subject: [PATCH 625/660] net: sfp: control TX_DISABLE and phy only from main
++ state machine
++
++We initialise TX_DISABLE when the sfp cage is probed, and then
++maintain its state in the main state machine.  However, the module
++state machine:
++- negates it when detecting a newly inserted module when it's already
++  guaranteed to be negated.
++- negates it when the module is removed, but the main state machine
++  will do this anyway.
++
++Make TX_DISABLE entirely controlled by the main state machine.
++
++The main state machine also probes the module for a PHY, and removes
++the PHY when the the module is removed.  Hence, removing the PHY in
++sfp_sm_module_remove() is also redundant, and is a left-over from
++when we tried to probe for the PHY from the module state machine.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 9 +--------
++ 1 file changed, 1 insertion(+), 8 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -1557,11 +1557,6 @@ static void sfp_sm_mod_remove(struct sfp
++ 
++ 	sfp_hwmon_remove(sfp);
++ 
++-	if (sfp->mod_phy)
++-		sfp_sm_phy_detach(sfp);
++-
++-	sfp_module_tx_disable(sfp);
++-
++ 	memset(&sfp->id, 0, sizeof(sfp->id));
++ 	sfp->module_power_mW = 0;
++ 
++@@ -1599,10 +1594,8 @@ static void sfp_sm_module(struct sfp *sf
++ 
++ 	switch (sfp->sm_mod_state) {
++ 	default:
++-		if (event == SFP_E_INSERT && sfp->attached) {
++-			sfp_module_tx_disable(sfp);
+++		if (event == SFP_E_INSERT && sfp->attached)
++ 			sfp_sm_mod_next(sfp, SFP_MOD_PROBE, T_SERIAL);
++-		}
++ 		break;
++ 
++ 	case SFP_MOD_PROBE:
+diff --git a/target/linux/generic/backport-5.4/728-v5.5-net-sfp-split-the-PHY-probe-from-sfp_sm_mod_init.patch b/target/linux/generic/backport-5.4/728-v5.5-net-sfp-split-the-PHY-probe-from-sfp_sm_mod_init.patch
+new file mode 100644
+index 0000000000..92df26c6a2
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/728-v5.5-net-sfp-split-the-PHY-probe-from-sfp_sm_mod_init.patch
+@@ -0,0 +1,53 @@
++From 5ed0bd49b2d3ac4439c2d7f44e5a82b7cf6f409a Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Fri, 18 Oct 2019 10:09:02 +0100
++Subject: [PATCH 626/660] net: sfp: split the PHY probe from sfp_sm_mod_init()
++
++Move the PHY probe into a separate function, splitting it from
++sfp_sm_mod_init().  This will allow us to eliminate the 50ms mdelay()
++inside the state machine.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 21 +++++++++++++--------
++ 1 file changed, 13 insertions(+), 8 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -1353,14 +1353,10 @@ static void sfp_sm_fault(struct sfp *sfp
++ static void sfp_sm_mod_init(struct sfp *sfp)
++ {
++ 	sfp_module_tx_enable(sfp);
+++}
++ 
++-	/* Wait t_init before indicating that the link is up, provided the
++-	 * current state indicates no TX_FAULT.  If TX_FAULT clears before
++-	 * this time, that's fine too.
++-	 */
++-	sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES);
++-	sfp->sm_retries = 5;
++-
+++static void sfp_sm_probe_for_phy(struct sfp *sfp)
+++{
++ 	/* Setting the serdes link mode is guesswork: there's no
++ 	 * field in the EEPROM which indicates what mode should
++ 	 * be used.
++@@ -1645,8 +1641,17 @@ static void sfp_sm_main(struct sfp *sfp,
++ 	switch (sfp->sm_state) {
++ 	case SFP_S_DOWN:
++ 		if (sfp->sm_mod_state == SFP_MOD_PRESENT &&
++-		    sfp->sm_dev_state == SFP_DEV_UP)
+++		    sfp->sm_dev_state == SFP_DEV_UP) {
++ 			sfp_sm_mod_init(sfp);
+++			sfp_sm_probe_for_phy(sfp);
+++
+++			/* Wait t_init before indicating that the link is up,
+++			 * provided the current state indicates no TX_FAULT. If
+++			 * TX_FAULT clears before this time, that's fine too.
+++			 */
+++			sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES);
+++			sfp->sm_retries = 5;
+++		}
++ 		break;
++ 
++ 	case SFP_S_INIT:
+diff --git a/target/linux/generic/backport-5.4/729-v5.5-net-sfp-eliminate-mdelay-from-PHY-probe.patch b/target/linux/generic/backport-5.4/729-v5.5-net-sfp-eliminate-mdelay-from-PHY-probe.patch
+new file mode 100644
+index 0000000000..e26a7276d3
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/729-v5.5-net-sfp-eliminate-mdelay-from-PHY-probe.patch
+@@ -0,0 +1,130 @@
++From 0fe72afaa31f98ebd71bd6683fc47021105d0157 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Fri, 18 Oct 2019 10:21:46 +0100
++Subject: [PATCH 627/660] net: sfp: eliminate mdelay() from PHY probe
++
++Rather than using mdelay() to wait before probing the PHY (which holds
++several locks, including the rtnl lock), add an extra wait state to
++the state machine to introduce the 50ms delay without holding any
++locks.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 52 +++++++++++++++++++++++++++++++++----------
++ 1 file changed, 40 insertions(+), 12 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -54,6 +54,7 @@ enum {
++ 	SFP_DEV_UP,
++ 
++ 	SFP_S_DOWN = 0,
+++	SFP_S_WAIT,
++ 	SFP_S_INIT,
++ 	SFP_S_WAIT_LOS,
++ 	SFP_S_LINK_UP,
++@@ -110,6 +111,7 @@ static const char *event_to_str(unsigned
++ 
++ static const char * const sm_state_strings[] = {
++ 	[SFP_S_DOWN] = "down",
+++	[SFP_S_WAIT] = "wait",
++ 	[SFP_S_INIT] = "init",
++ 	[SFP_S_WAIT_LOS] = "wait_los",
++ 	[SFP_S_LINK_UP] = "link_up",
++@@ -141,6 +143,7 @@ static const enum gpiod_flags gpio_flags
++ 	GPIOD_ASIS,
++ };
++ 
+++#define T_WAIT		msecs_to_jiffies(50)
++ #define T_INIT_JIFFIES	msecs_to_jiffies(300)
++ #define T_RESET_US	10
++ #define T_FAULT_RECOVER	msecs_to_jiffies(1000)
++@@ -161,9 +164,6 @@ static const enum gpiod_flags gpio_flags
++  */
++ #define SFP_PHY_ADDR	22
++ 
++-/* Give this long for the PHY to reset. */
++-#define T_PHY_RESET_MS	50
++-
++ struct sff_data {
++ 	unsigned int gpios;
++ 	bool (*module_supported)(const struct sfp_eeprom_id *id);
++@@ -1267,8 +1267,6 @@ static void sfp_sm_probe_phy(struct sfp
++ 	struct phy_device *phy;
++ 	int err;
++ 
++-	msleep(T_PHY_RESET_MS);
++-
++ 	phy = mdiobus_scan(sfp->i2c_mii, SFP_PHY_ADDR);
++ 	if (phy == ERR_PTR(-ENODEV)) {
++ 		dev_info(sfp->dev, "no PHY detected\n");
++@@ -1623,6 +1621,8 @@ static void sfp_sm_module(struct sfp *sf
++ 
++ static void sfp_sm_main(struct sfp *sfp, unsigned int event)
++ {
+++	unsigned long timeout;
+++
++ 	/* Some events are global */
++ 	if (sfp->sm_state != SFP_S_DOWN &&
++ 	    (sfp->sm_mod_state != SFP_MOD_PRESENT ||
++@@ -1640,17 +1640,45 @@ static void sfp_sm_main(struct sfp *sfp,
++ 	/* The main state machine */
++ 	switch (sfp->sm_state) {
++ 	case SFP_S_DOWN:
++-		if (sfp->sm_mod_state == SFP_MOD_PRESENT &&
++-		    sfp->sm_dev_state == SFP_DEV_UP) {
++-			sfp_sm_mod_init(sfp);
++-			sfp_sm_probe_for_phy(sfp);
+++		if (sfp->sm_mod_state != SFP_MOD_PRESENT ||
+++		    sfp->sm_dev_state != SFP_DEV_UP)
+++			break;
+++
+++		sfp_sm_mod_init(sfp);
+++
+++		/* Initialise the fault clearance retries */
+++		sfp->sm_retries = 5;
+++
+++		/* We need to check the TX_FAULT state, which is not defined
+++		 * while TX_DISABLE is asserted. The earliest we want to do
+++		 * anything (such as probe for a PHY) is 50ms.
+++		 */
+++		sfp_sm_next(sfp, SFP_S_WAIT, T_WAIT);
+++		break;
+++
+++	case SFP_S_WAIT:
+++		if (event != SFP_E_TIMEOUT)
+++			break;
+++
+++		sfp_sm_probe_for_phy(sfp);
++ 
+++		if (sfp->state & SFP_F_TX_FAULT) {
++ 			/* Wait t_init before indicating that the link is up,
++ 			 * provided the current state indicates no TX_FAULT. If
++ 			 * TX_FAULT clears before this time, that's fine too.
++ 			 */
++-			sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES);
++-			sfp->sm_retries = 5;
+++			timeout = T_INIT_JIFFIES;
+++			if (timeout > T_WAIT)
+++				timeout -= T_WAIT;
+++			else
+++				timeout = 1;
+++
+++			sfp_sm_next(sfp, SFP_S_INIT, timeout);
+++		} else {
+++			/* TX_FAULT is not asserted, assume the module has
+++			 * finished initialising.
+++			 */
+++			goto init_done;
++ 		}
++ 		break;
++ 
++@@ -1658,7 +1686,7 @@ static void sfp_sm_main(struct sfp *sfp,
++ 		if (event == SFP_E_TIMEOUT && sfp->state & SFP_F_TX_FAULT)
++ 			sfp_sm_fault(sfp, true);
++ 		else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR)
++-			sfp_sm_link_check_los(sfp);
+++	init_done:	sfp_sm_link_check_los(sfp);
++ 		break;
++ 
++ 	case SFP_S_WAIT_LOS:
+diff --git a/target/linux/generic/backport-5.4/730-v5.5-net-sfp-allow-fault-processing-to-transition-to-othe.patch b/target/linux/generic/backport-5.4/730-v5.5-net-sfp-allow-fault-processing-to-transition-to-othe.patch
+new file mode 100644
+index 0000000000..d45b0618bd
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/730-v5.5-net-sfp-allow-fault-processing-to-transition-to-othe.patch
+@@ -0,0 +1,69 @@
++From 2aa424ee7fbe43e2cd24e28c2f6388c4e1796bd2 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Fri, 18 Oct 2019 09:58:33 +0100
++Subject: [PATCH 628/660] net: sfp: allow fault processing to transition to
++ other states
++
++Add the next state to sfp_sm_fault() so that it can branch to other
++states. This will be necessary to improve the initialisation path.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 12 ++++++------
++ 1 file changed, 6 insertions(+), 6 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -1334,7 +1334,7 @@ static bool sfp_los_event_inactive(struc
++ 		event == SFP_E_LOS_LOW);
++ }
++ 
++-static void sfp_sm_fault(struct sfp *sfp, bool warn)
+++static void sfp_sm_fault(struct sfp *sfp, unsigned int next_state, bool warn)
++ {
++ 	if (sfp->sm_retries && !--sfp->sm_retries) {
++ 		dev_err(sfp->dev,
++@@ -1344,7 +1344,7 @@ static void sfp_sm_fault(struct sfp *sfp
++ 		if (warn)
++ 			dev_err(sfp->dev, "module transmit fault indicated\n");
++ 
++-		sfp_sm_next(sfp, SFP_S_TX_FAULT, T_FAULT_RECOVER);
+++		sfp_sm_next(sfp, next_state, T_FAULT_RECOVER);
++ 	}
++ }
++ 
++@@ -1684,14 +1684,14 @@ static void sfp_sm_main(struct sfp *sfp,
++ 
++ 	case SFP_S_INIT:
++ 		if (event == SFP_E_TIMEOUT && sfp->state & SFP_F_TX_FAULT)
++-			sfp_sm_fault(sfp, true);
+++			sfp_sm_fault(sfp, SFP_S_TX_FAULT, true);
++ 		else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR)
++ 	init_done:	sfp_sm_link_check_los(sfp);
++ 		break;
++ 
++ 	case SFP_S_WAIT_LOS:
++ 		if (event == SFP_E_TX_FAULT)
++-			sfp_sm_fault(sfp, true);
+++			sfp_sm_fault(sfp, SFP_S_TX_FAULT, true);
++ 		else if (sfp_los_event_inactive(sfp, event))
++ 			sfp_sm_link_up(sfp);
++ 		break;
++@@ -1699,7 +1699,7 @@ static void sfp_sm_main(struct sfp *sfp,
++ 	case SFP_S_LINK_UP:
++ 		if (event == SFP_E_TX_FAULT) {
++ 			sfp_sm_link_down(sfp);
++-			sfp_sm_fault(sfp, true);
+++			sfp_sm_fault(sfp, SFP_S_TX_FAULT, true);
++ 		} else if (sfp_los_event_active(sfp, event)) {
++ 			sfp_sm_link_down(sfp);
++ 			sfp_sm_next(sfp, SFP_S_WAIT_LOS, 0);
++@@ -1715,7 +1715,7 @@ static void sfp_sm_main(struct sfp *sfp,
++ 
++ 	case SFP_S_REINIT:
++ 		if (event == SFP_E_TIMEOUT && sfp->state & SFP_F_TX_FAULT) {
++-			sfp_sm_fault(sfp, false);
+++			sfp_sm_fault(sfp, SFP_S_TX_FAULT, false);
++ 		} else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) {
++ 			dev_info(sfp->dev, "module transmit fault recovered\n");
++ 			sfp_sm_link_check_los(sfp);
+diff --git a/target/linux/generic/backport-5.4/731-v5.5-net-sfp-ensure-TX_FAULT-has-deasserted-before-probin.patch b/target/linux/generic/backport-5.4/731-v5.5-net-sfp-ensure-TX_FAULT-has-deasserted-before-probin.patch
+new file mode 100644
+index 0000000000..acca29be87
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/731-v5.5-net-sfp-ensure-TX_FAULT-has-deasserted-before-probin.patch
+@@ -0,0 +1,80 @@
++From 38b62a12231be4b86fc5ca5477579d29831c02a5 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Fri, 18 Oct 2019 10:31:07 +0100
++Subject: [PATCH 629/660] net: sfp: ensure TX_FAULT has deasserted before
++ probing the PHY
++
++TX_FAULT should be deasserted to indicate that the module has completed
++its initialisation.  This may include the on-board PHY, so wait until
++the module has deasserted TX_FAULT before probing the PHY.
++
++This means that we need an extra state to handle a TX_FAULT that
++remains set for longer than t_init, since using the existing handling
++state would bypass the PHY probe.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 31 +++++++++++++++++++++++++------
++ 1 file changed, 25 insertions(+), 6 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -56,6 +56,7 @@ enum {
++ 	SFP_S_DOWN = 0,
++ 	SFP_S_WAIT,
++ 	SFP_S_INIT,
+++	SFP_S_INIT_TX_FAULT,
++ 	SFP_S_WAIT_LOS,
++ 	SFP_S_LINK_UP,
++ 	SFP_S_TX_FAULT,
++@@ -113,6 +114,7 @@ static const char * const sm_state_strin
++ 	[SFP_S_DOWN] = "down",
++ 	[SFP_S_WAIT] = "wait",
++ 	[SFP_S_INIT] = "init",
+++	[SFP_S_INIT_TX_FAULT] = "init_tx_fault",
++ 	[SFP_S_WAIT_LOS] = "wait_los",
++ 	[SFP_S_LINK_UP] = "link_up",
++ 	[SFP_S_TX_FAULT] = "tx_fault",
++@@ -1660,8 +1662,6 @@ static void sfp_sm_main(struct sfp *sfp,
++ 		if (event != SFP_E_TIMEOUT)
++ 			break;
++ 
++-		sfp_sm_probe_for_phy(sfp);
++-
++ 		if (sfp->state & SFP_F_TX_FAULT) {
++ 			/* Wait t_init before indicating that the link is up,
++ 			 * provided the current state indicates no TX_FAULT. If
++@@ -1683,10 +1683,29 @@ static void sfp_sm_main(struct sfp *sfp,
++ 		break;
++ 
++ 	case SFP_S_INIT:
++-		if (event == SFP_E_TIMEOUT && sfp->state & SFP_F_TX_FAULT)
++-			sfp_sm_fault(sfp, SFP_S_TX_FAULT, true);
++-		else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR)
++-	init_done:	sfp_sm_link_check_los(sfp);
+++		if (event == SFP_E_TIMEOUT && sfp->state & SFP_F_TX_FAULT) {
+++			/* TX_FAULT is still asserted after t_init, so assume
+++			 * there is a fault.
+++			 */
+++			sfp_sm_fault(sfp, SFP_S_INIT_TX_FAULT,
+++				     sfp->sm_retries == 5);
+++		} else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) {
+++	init_done:	/* TX_FAULT deasserted or we timed out with TX_FAULT
+++			 * clear.  Probe for the PHY and check the LOS state.
+++			 */
+++			sfp_sm_probe_for_phy(sfp);
+++			sfp_sm_link_check_los(sfp);
+++
+++			/* Reset the fault retry count */
+++			sfp->sm_retries = 5;
+++		}
+++		break;
+++
+++	case SFP_S_INIT_TX_FAULT:
+++		if (event == SFP_E_TIMEOUT) {
+++			sfp_module_tx_fault_reset(sfp);
+++			sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES);
+++		}
++ 		break;
++ 
++ 	case SFP_S_WAIT_LOS:
+diff --git a/target/linux/generic/backport-5.4/732-v5.5-net-sfp-track-upstream-s-attachment-state-in-state-m.patch b/target/linux/generic/backport-5.4/732-v5.5-net-sfp-track-upstream-s-attachment-state-in-state-m.patch
+new file mode 100644
+index 0000000000..714d783c4e
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/732-v5.5-net-sfp-track-upstream-s-attachment-state-in-state-m.patch
+@@ -0,0 +1,153 @@
++From ec6036a58f979c66bbd5cd9d0d1c783a98c2c644 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Tue, 5 Nov 2019 12:57:40 +0000
++Subject: [PATCH 630/660] net: sfp: track upstream's attachment state in state
++ machine
++
++Track the upstream's attachment state in the state machine rather than
++maintaining a boolean, which ensures that we have a strict order of
++ATTACH followed by an UP event - we can never believe that a newly
++attached upstream will be anything but down.
++
++Rearrange the order of state machines so we run the module state
++machine after the upstream device's state machine, so the module state
++machine can check the current state of the device and take action to
++e.g. reset back to empty state when the upstream is detached.
++
++This is to allow the module detection to run independently of the
++network device becoming available.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 42 +++++++++++++++++++++++++++++-------------
++ 1 file changed, 29 insertions(+), 13 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -36,6 +36,8 @@ enum {
++ 
++ 	SFP_E_INSERT = 0,
++ 	SFP_E_REMOVE,
+++	SFP_E_DEV_ATTACH,
+++	SFP_E_DEV_DETACH,
++ 	SFP_E_DEV_DOWN,
++ 	SFP_E_DEV_UP,
++ 	SFP_E_TX_FAULT,
++@@ -50,7 +52,8 @@ enum {
++ 	SFP_MOD_PRESENT,
++ 	SFP_MOD_ERROR,
++ 
++-	SFP_DEV_DOWN = 0,
+++	SFP_DEV_DETACHED = 0,
+++	SFP_DEV_DOWN,
++ 	SFP_DEV_UP,
++ 
++ 	SFP_S_DOWN = 0,
++@@ -80,6 +83,7 @@ static const char *mod_state_to_str(unsi
++ }
++ 
++ static const char * const dev_state_strings[] = {
+++	[SFP_DEV_DETACHED] = "detached",
++ 	[SFP_DEV_DOWN] = "down",
++ 	[SFP_DEV_UP] = "up",
++ };
++@@ -94,6 +98,8 @@ static const char *dev_state_to_str(unsi
++ static const char * const event_strings[] = {
++ 	[SFP_E_INSERT] = "insert",
++ 	[SFP_E_REMOVE] = "remove",
+++	[SFP_E_DEV_ATTACH] = "dev_attach",
+++	[SFP_E_DEV_DETACH] = "dev_detach",
++ 	[SFP_E_DEV_DOWN] = "dev_down",
++ 	[SFP_E_DEV_UP] = "dev_up",
++ 	[SFP_E_TX_FAULT] = "tx_fault",
++@@ -188,7 +194,6 @@ struct sfp {
++ 	struct gpio_desc *gpio[GPIO_MAX];
++ 	int gpio_irq[GPIO_MAX];
++ 
++-	bool attached;
++ 	struct mutex st_mutex;			/* Protects state */
++ 	unsigned int state;
++ 	struct delayed_work poll;
++@@ -1559,17 +1564,26 @@ static void sfp_sm_mod_remove(struct sfp
++ 	dev_info(sfp->dev, "module removed\n");
++ }
++ 
++-/* This state machine tracks the netdev up/down state */
+++/* This state machine tracks the upstream's state */
++ static void sfp_sm_device(struct sfp *sfp, unsigned int event)
++ {
++ 	switch (sfp->sm_dev_state) {
++ 	default:
++-		if (event == SFP_E_DEV_UP)
+++		if (event == SFP_E_DEV_ATTACH)
+++			sfp->sm_dev_state = SFP_DEV_DOWN;
+++		break;
+++
+++	case SFP_DEV_DOWN:
+++		if (event == SFP_E_DEV_DETACH)
+++			sfp->sm_dev_state = SFP_DEV_DETACHED;
+++		else if (event == SFP_E_DEV_UP)
++ 			sfp->sm_dev_state = SFP_DEV_UP;
++ 		break;
++ 
++ 	case SFP_DEV_UP:
++-		if (event == SFP_E_DEV_DOWN)
+++		if (event == SFP_E_DEV_DETACH)
+++			sfp->sm_dev_state = SFP_DEV_DETACHED;
+++		else if (event == SFP_E_DEV_DOWN)
++ 			sfp->sm_dev_state = SFP_DEV_DOWN;
++ 		break;
++ 	}
++@@ -1580,17 +1594,20 @@ static void sfp_sm_device(struct sfp *sf
++  */
++ static void sfp_sm_module(struct sfp *sfp, unsigned int event)
++ {
++-	/* Handle remove event globally, it resets this state machine */
++-	if (event == SFP_E_REMOVE) {
+++	/* Handle remove event globally, it resets this state machine.
+++	 * Also deal with upstream detachment.
+++	 */
+++	if (event == SFP_E_REMOVE || sfp->sm_dev_state < SFP_DEV_DOWN) {
++ 		if (sfp->sm_mod_state > SFP_MOD_PROBE)
++ 			sfp_sm_mod_remove(sfp);
++-		sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0);
+++		if (sfp->sm_mod_state != SFP_MOD_EMPTY)
+++			sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0);
++ 		return;
++ 	}
++ 
++ 	switch (sfp->sm_mod_state) {
++ 	default:
++-		if (event == SFP_E_INSERT && sfp->attached)
+++		if (event == SFP_E_INSERT)
++ 			sfp_sm_mod_next(sfp, SFP_MOD_PROBE, T_SERIAL);
++ 		break;
++ 
++@@ -1756,8 +1773,8 @@ static void sfp_sm_event(struct sfp *sfp
++ 		sm_state_to_str(sfp->sm_state),
++ 		event_to_str(event));
++ 
++-	sfp_sm_module(sfp, event);
++ 	sfp_sm_device(sfp, event);
+++	sfp_sm_module(sfp, event);
++ 	sfp_sm_main(sfp, event);
++ 
++ 	dev_dbg(sfp->dev, "SM: exit %s:%s:%s\n",
++@@ -1770,15 +1787,14 @@ static void sfp_sm_event(struct sfp *sfp
++ 
++ static void sfp_attach(struct sfp *sfp)
++ {
++-	sfp->attached = true;
+++	sfp_sm_event(sfp, SFP_E_DEV_ATTACH);
++ 	if (sfp->state & SFP_F_PRESENT)
++ 		sfp_sm_event(sfp, SFP_E_INSERT);
++ }
++ 
++ static void sfp_detach(struct sfp *sfp)
++ {
++-	sfp->attached = false;
++-	sfp_sm_event(sfp, SFP_E_REMOVE);
+++	sfp_sm_event(sfp, SFP_E_DEV_DETACH);
++ }
++ 
++ static void sfp_start(struct sfp *sfp)
+diff --git a/target/linux/generic/backport-5.4/733-v5.5-net-sfp-split-power-mode-switching-from-probe.patch b/target/linux/generic/backport-5.4/733-v5.5-net-sfp-split-power-mode-switching-from-probe.patch
+new file mode 100644
+index 0000000000..f645e44191
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/733-v5.5-net-sfp-split-power-mode-switching-from-probe.patch
+@@ -0,0 +1,184 @@
++From fdff863a4ce3677907f64396e34c45025abb6600 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Tue, 5 Nov 2019 12:59:36 +0000
++Subject: [PATCH 631/660] net: sfp: split power mode switching from probe
++
++Switch the power mode switching from the probe, so that we don't
++repeatedly re-probe the SFP device if there is a problem accessing
++the registers at I2C address 0x51.
++
++In splitting this out, we can also fix a bug where we leave the module
++in high-power mode when the upstream device is detached but the module
++is still inserted.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 101 ++++++++++++++++++++++++++----------------
++ 1 file changed, 64 insertions(+), 37 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -49,6 +49,7 @@ enum {
++ 	SFP_MOD_EMPTY = 0,
++ 	SFP_MOD_PROBE,
++ 	SFP_MOD_HPOWER,
+++	SFP_MOD_WAITPWR,
++ 	SFP_MOD_PRESENT,
++ 	SFP_MOD_ERROR,
++ 
++@@ -71,6 +72,7 @@ static const char  * const mod_state_str
++ 	[SFP_MOD_EMPTY] = "empty",
++ 	[SFP_MOD_PROBE] = "probe",
++ 	[SFP_MOD_HPOWER] = "hpower",
+++	[SFP_MOD_WAITPWR] = "waitpwr",
++ 	[SFP_MOD_PRESENT] = "present",
++ 	[SFP_MOD_ERROR] = "error",
++ };
++@@ -1423,37 +1425,34 @@ static int sfp_module_parse_power(struct
++ 	return 0;
++ }
++ 
++-static int sfp_sm_mod_hpower(struct sfp *sfp)
+++static int sfp_sm_mod_hpower(struct sfp *sfp, bool enable)
++ {
++ 	u8 val;
++ 	int err;
++ 
++-	if (sfp->module_power_mW <= 1000)
++-		return 0;
++-
++ 	err = sfp_read(sfp, true, SFP_EXT_STATUS, &val, sizeof(val));
++ 	if (err != sizeof(val)) {
++ 		dev_err(sfp->dev, "Failed to read EEPROM: %d\n", err);
++-		err = -EAGAIN;
++-		goto err;
+++		return -EAGAIN;
++ 	}
++ 
++-	val |= BIT(0);
+++	if (enable)
+++		val |= BIT(0);
+++	else
+++		val &= ~BIT(0);
++ 
++ 	err = sfp_write(sfp, true, SFP_EXT_STATUS, &val, sizeof(val));
++ 	if (err != sizeof(val)) {
++ 		dev_err(sfp->dev, "Failed to write EEPROM: %d\n", err);
++-		err = -EAGAIN;
++-		goto err;
+++		return -EAGAIN;
++ 	}
++ 
++-	dev_info(sfp->dev, "Module switched to %u.%uW power level\n",
++-		 sfp->module_power_mW / 1000,
++-		 (sfp->module_power_mW / 100) % 10);
++-	return T_HPOWER_LEVEL;
+++	if (enable)
+++		dev_info(sfp->dev, "Module switched to %u.%uW power level\n",
+++			 sfp->module_power_mW / 1000,
+++			 (sfp->module_power_mW / 100) % 10);
++ 
++-err:
++-	return err;
+++	return 0;
++ }
++ 
++ static int sfp_sm_mod_probe(struct sfp *sfp)
++@@ -1549,7 +1548,7 @@ static int sfp_sm_mod_probe(struct sfp *
++ 	if (ret < 0)
++ 		return ret;
++ 
++-	return sfp_sm_mod_hpower(sfp);
+++	return 0;
++ }
++ 
++ static void sfp_sm_mod_remove(struct sfp *sfp)
++@@ -1594,13 +1593,22 @@ static void sfp_sm_device(struct sfp *sf
++  */
++ static void sfp_sm_module(struct sfp *sfp, unsigned int event)
++ {
++-	/* Handle remove event globally, it resets this state machine.
++-	 * Also deal with upstream detachment.
++-	 */
++-	if (event == SFP_E_REMOVE || sfp->sm_dev_state < SFP_DEV_DOWN) {
+++	int err;
+++
+++	/* Handle remove event globally, it resets this state machine */
+++	if (event == SFP_E_REMOVE) {
++ 		if (sfp->sm_mod_state > SFP_MOD_PROBE)
++ 			sfp_sm_mod_remove(sfp);
++-		if (sfp->sm_mod_state != SFP_MOD_EMPTY)
+++		sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0);
+++		return;
+++	}
+++
+++	/* Handle device detach globally */
+++	if (sfp->sm_dev_state < SFP_DEV_DOWN) {
+++		if (sfp->module_power_mW > 1000 &&
+++		    sfp->sm_mod_state > SFP_MOD_HPOWER)
+++			sfp_sm_mod_hpower(sfp, false);
+++		if (sfp->sm_mod_state > SFP_MOD_EMPTY)
++ 			sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0);
++ 		return;
++ 	}
++@@ -1612,26 +1620,45 @@ static void sfp_sm_module(struct sfp *sf
++ 		break;
++ 
++ 	case SFP_MOD_PROBE:
++-		if (event == SFP_E_TIMEOUT) {
++-			int val = sfp_sm_mod_probe(sfp);
+++		if (event != SFP_E_TIMEOUT)
+++			break;
++ 
++-			if (val == 0)
++-				sfp_sm_mod_next(sfp, SFP_MOD_PRESENT, 0);
++-			else if (val > 0)
++-				sfp_sm_mod_next(sfp, SFP_MOD_HPOWER, val);
++-			else if (val != -EAGAIN)
++-				sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0);
++-			else
++-				sfp_sm_set_timer(sfp, T_PROBE_RETRY);
+++		err = sfp_sm_mod_probe(sfp);
+++		if (err == -EAGAIN) {
+++			sfp_sm_set_timer(sfp, T_PROBE_RETRY);
+++			break;
++ 		}
++-		break;
+++		if (err < 0) {
+++			sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0);
+++			break;
+++		}
+++
+++		/* If this is a power level 1 module, we are done */
+++		if (sfp->module_power_mW <= 1000)
+++			goto insert;
++ 
+++		sfp_sm_mod_next(sfp, SFP_MOD_HPOWER, 0);
+++		/* fall through */
++ 	case SFP_MOD_HPOWER:
++-		if (event == SFP_E_TIMEOUT) {
++-			sfp_sm_mod_next(sfp, SFP_MOD_PRESENT, 0);
+++		/* Enable high power mode */
+++		err = sfp_sm_mod_hpower(sfp, true);
+++		if (err == 0)
+++			sfp_sm_mod_next(sfp, SFP_MOD_WAITPWR, T_HPOWER_LEVEL);
+++		else if (err != -EAGAIN)
+++			sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0);
+++		else
+++			sfp_sm_set_timer(sfp, T_PROBE_RETRY);
+++		break;
+++
+++	case SFP_MOD_WAITPWR:
+++		/* Wait for T_HPOWER_LEVEL to time out */
+++		if (event != SFP_E_TIMEOUT)
++ 			break;
++-		}
++-		/* fallthrough */
+++
+++	insert:
+++		sfp_sm_mod_next(sfp, SFP_MOD_PRESENT, 0);
+++		break;
+++
++ 	case SFP_MOD_PRESENT:
++ 	case SFP_MOD_ERROR:
++ 		break;
+diff --git a/target/linux/generic/backport-5.4/734-v5.5-net-sfp-move-module-insert-reporting-out-of-probe.patch b/target/linux/generic/backport-5.4/734-v5.5-net-sfp-move-module-insert-reporting-out-of-probe.patch
+new file mode 100644
+index 0000000000..e49bde27e3
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/734-v5.5-net-sfp-move-module-insert-reporting-out-of-probe.patch
+@@ -0,0 +1,159 @@
++From 57cbf7453551db1df619b79410d79fc418d862d5 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Tue, 5 Nov 2019 13:00:45 +0000
++Subject: [PATCH 632/660] net: sfp: move module insert reporting out of probe
++
++Move the module insertion reporting out of the probe handling, but
++after we have detected that the upstream has attached (since that is
++whom we are reporting insertion to.)
++
++Only report module removal if we had previously reported a module
++insertion.
++
++This gives cleaner semantics, and means we can probe the module before
++we have an upstream attached.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 58 +++++++++++++++++++++++++++++--------------
++ 1 file changed, 40 insertions(+), 18 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -47,11 +47,12 @@ enum {
++ 	SFP_E_TIMEOUT,
++ 
++ 	SFP_MOD_EMPTY = 0,
+++	SFP_MOD_ERROR,
++ 	SFP_MOD_PROBE,
+++	SFP_MOD_WAITDEV,
++ 	SFP_MOD_HPOWER,
++ 	SFP_MOD_WAITPWR,
++ 	SFP_MOD_PRESENT,
++-	SFP_MOD_ERROR,
++ 
++ 	SFP_DEV_DETACHED = 0,
++ 	SFP_DEV_DOWN,
++@@ -70,11 +71,12 @@ enum {
++ 
++ static const char  * const mod_state_strings[] = {
++ 	[SFP_MOD_EMPTY] = "empty",
+++	[SFP_MOD_ERROR] = "error",
++ 	[SFP_MOD_PROBE] = "probe",
+++	[SFP_MOD_WAITDEV] = "waitdev",
++ 	[SFP_MOD_HPOWER] = "hpower",
++ 	[SFP_MOD_WAITPWR] = "waitpwr",
++ 	[SFP_MOD_PRESENT] = "present",
++-	[SFP_MOD_ERROR] = "error",
++ };
++ 
++ static const char *mod_state_to_str(unsigned short mod_state)
++@@ -1544,16 +1546,13 @@ static int sfp_sm_mod_probe(struct sfp *
++ 	if (ret < 0)
++ 		return ret;
++ 
++-	ret = sfp_module_insert(sfp->sfp_bus, &sfp->id);
++-	if (ret < 0)
++-		return ret;
++-
++ 	return 0;
++ }
++ 
++ static void sfp_sm_mod_remove(struct sfp *sfp)
++ {
++-	sfp_module_remove(sfp->sfp_bus);
+++	if (sfp->sm_mod_state > SFP_MOD_WAITDEV)
+++		sfp_module_remove(sfp->sfp_bus);
++ 
++ 	sfp_hwmon_remove(sfp);
++ 
++@@ -1604,12 +1603,12 @@ static void sfp_sm_module(struct sfp *sf
++ 	}
++ 
++ 	/* Handle device detach globally */
++-	if (sfp->sm_dev_state < SFP_DEV_DOWN) {
+++	if (sfp->sm_dev_state < SFP_DEV_DOWN &&
+++	    sfp->sm_mod_state > SFP_MOD_WAITDEV) {
++ 		if (sfp->module_power_mW > 1000 &&
++ 		    sfp->sm_mod_state > SFP_MOD_HPOWER)
++ 			sfp_sm_mod_hpower(sfp, false);
++-		if (sfp->sm_mod_state > SFP_MOD_EMPTY)
++-			sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0);
+++		sfp_sm_mod_next(sfp, SFP_MOD_WAITDEV, 0);
++ 		return;
++ 	}
++ 
++@@ -1620,6 +1619,7 @@ static void sfp_sm_module(struct sfp *sf
++ 		break;
++ 
++ 	case SFP_MOD_PROBE:
+++		/* Wait for T_PROBE_INIT to time out */
++ 		if (event != SFP_E_TIMEOUT)
++ 			break;
++ 
++@@ -1633,6 +1633,20 @@ static void sfp_sm_module(struct sfp *sf
++ 			break;
++ 		}
++ 
+++		sfp_sm_mod_next(sfp, SFP_MOD_WAITDEV, 0);
+++		/* fall through */
+++	case SFP_MOD_WAITDEV:
+++		/* Ensure that the device is attached before proceeding */
+++		if (sfp->sm_dev_state < SFP_DEV_DOWN)
+++			break;
+++
+++		/* Report the module insertion to the upstream device */
+++		err = sfp_module_insert(sfp->sfp_bus, &sfp->id);
+++		if (err < 0) {
+++			sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0);
+++			break;
+++		}
+++
++ 		/* If this is a power level 1 module, we are done */
++ 		if (sfp->module_power_mW <= 1000)
++ 			goto insert;
++@@ -1642,12 +1656,17 @@ static void sfp_sm_module(struct sfp *sf
++ 	case SFP_MOD_HPOWER:
++ 		/* Enable high power mode */
++ 		err = sfp_sm_mod_hpower(sfp, true);
++-		if (err == 0)
++-			sfp_sm_mod_next(sfp, SFP_MOD_WAITPWR, T_HPOWER_LEVEL);
++-		else if (err != -EAGAIN)
++-			sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0);
++-		else
++-			sfp_sm_set_timer(sfp, T_PROBE_RETRY);
+++		if (err < 0) {
+++			if (err != -EAGAIN) {
+++				sfp_module_remove(sfp->sfp_bus);
+++				sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0);
+++			} else {
+++				sfp_sm_set_timer(sfp, T_PROBE_RETRY);
+++			}
+++			break;
+++		}
+++
+++		sfp_sm_mod_next(sfp, SFP_MOD_WAITPWR, T_HPOWER_LEVEL);
++ 		break;
++ 
++ 	case SFP_MOD_WAITPWR:
++@@ -1815,8 +1834,6 @@ static void sfp_sm_event(struct sfp *sfp
++ static void sfp_attach(struct sfp *sfp)
++ {
++ 	sfp_sm_event(sfp, SFP_E_DEV_ATTACH);
++-	if (sfp->state & SFP_F_PRESENT)
++-		sfp_sm_event(sfp, SFP_E_INSERT);
++ }
++ 
++ static void sfp_detach(struct sfp *sfp)
++@@ -2084,6 +2101,11 @@ static int sfp_probe(struct platform_dev
++ 		sfp->state |= SFP_F_RATE_SELECT;
++ 	sfp_set_state(sfp, sfp->state);
++ 	sfp_module_tx_disable(sfp);
+++	if (sfp->state & SFP_F_PRESENT) {
+++		rtnl_lock();
+++		sfp_sm_event(sfp, SFP_E_INSERT);
+++		rtnl_unlock();
+++	}
++ 
++ 	for (i = 0; i < GPIO_MAX; i++) {
++ 		if (gpio_flags[i] != GPIOD_IN || !sfp->gpio[i])
+diff --git a/target/linux/generic/backport-5.4/735-v5.5-net-sfp-allow-sfp-to-probe-slow-to-initialise-GPON-m.patch b/target/linux/generic/backport-5.4/735-v5.5-net-sfp-allow-sfp-to-probe-slow-to-initialise-GPON-m.patch
+new file mode 100644
+index 0000000000..ab1ae753d7
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/735-v5.5-net-sfp-allow-sfp-to-probe-slow-to-initialise-GPON-m.patch
+@@ -0,0 +1,110 @@
++From fb56cd08880aff8fb030e684fa4311bef712a499 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Tue, 5 Nov 2019 13:02:30 +0000
++Subject: [PATCH 633/660] net: sfp: allow sfp to probe slow to initialise GPON
++ modules
++
++Some GPON modules (e.g. Huawei MA5671A) take a significant amount of
++time to start responding on the I2C bus, contary to the SFF
++specifications.
++
++Work around this by implementing a two-level timeout strategy, where
++we initially quickly retry for the module, and then use a slower retry
++after we exceed a maximum number of quick attempts.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 38 ++++++++++++++++++++++++++++----------
++ 1 file changed, 28 insertions(+), 10 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -167,9 +167,12 @@ static const enum gpiod_flags gpio_flags
++  * The SFF-8472 specifies t_serial ("Time from power on until module is
++  * ready for data transmission over the two wire serial bus.") as 300ms.
++  */
++-#define T_SERIAL	msecs_to_jiffies(300)
++-#define T_HPOWER_LEVEL	msecs_to_jiffies(300)
++-#define T_PROBE_RETRY	msecs_to_jiffies(100)
+++#define T_SERIAL		msecs_to_jiffies(300)
+++#define T_HPOWER_LEVEL		msecs_to_jiffies(300)
+++#define T_PROBE_RETRY_INIT	msecs_to_jiffies(100)
+++#define R_PROBE_RETRY_INIT	10
+++#define T_PROBE_RETRY_SLOW	msecs_to_jiffies(5000)
+++#define R_PROBE_RETRY_SLOW	12
++ 
++ /* SFP modules appear to always have their PHY configured for bus address
++  * 0x56 (which with mdio-i2c, translates to a PHY address of 22).
++@@ -204,6 +207,8 @@ struct sfp {
++ 	struct delayed_work timeout;
++ 	struct mutex sm_mutex;			/* Protects state machine */
++ 	unsigned char sm_mod_state;
+++	unsigned char sm_mod_tries_init;
+++	unsigned char sm_mod_tries;
++ 	unsigned char sm_dev_state;
++ 	unsigned short sm_state;
++ 	unsigned int sm_retries;
++@@ -1457,7 +1462,7 @@ static int sfp_sm_mod_hpower(struct sfp
++ 	return 0;
++ }
++ 
++-static int sfp_sm_mod_probe(struct sfp *sfp)
+++static int sfp_sm_mod_probe(struct sfp *sfp, bool report)
++ {
++ 	/* SFP module inserted - read I2C data */
++ 	struct sfp_eeprom_id id;
++@@ -1467,7 +1472,8 @@ static int sfp_sm_mod_probe(struct sfp *
++ 
++ 	ret = sfp_read(sfp, false, 0, &id, sizeof(id));
++ 	if (ret < 0) {
++-		dev_err(sfp->dev, "failed to read EEPROM: %d\n", ret);
+++		if (report)
+++			dev_err(sfp->dev, "failed to read EEPROM: %d\n", ret);
++ 		return -EAGAIN;
++ 	}
++ 
++@@ -1614,8 +1620,11 @@ static void sfp_sm_module(struct sfp *sf
++ 
++ 	switch (sfp->sm_mod_state) {
++ 	default:
++-		if (event == SFP_E_INSERT)
+++		if (event == SFP_E_INSERT) {
++ 			sfp_sm_mod_next(sfp, SFP_MOD_PROBE, T_SERIAL);
+++			sfp->sm_mod_tries_init = R_PROBE_RETRY_INIT;
+++			sfp->sm_mod_tries = R_PROBE_RETRY_SLOW;
+++		}
++ 		break;
++ 
++ 	case SFP_MOD_PROBE:
++@@ -1623,10 +1632,19 @@ static void sfp_sm_module(struct sfp *sf
++ 		if (event != SFP_E_TIMEOUT)
++ 			break;
++ 
++-		err = sfp_sm_mod_probe(sfp);
+++		err = sfp_sm_mod_probe(sfp, sfp->sm_mod_tries == 1);
++ 		if (err == -EAGAIN) {
++-			sfp_sm_set_timer(sfp, T_PROBE_RETRY);
++-			break;
+++			if (sfp->sm_mod_tries_init &&
+++			   --sfp->sm_mod_tries_init) {
+++				sfp_sm_set_timer(sfp, T_PROBE_RETRY_INIT);
+++				break;
+++			} else if (sfp->sm_mod_tries && --sfp->sm_mod_tries) {
+++				if (sfp->sm_mod_tries == R_PROBE_RETRY_SLOW - 1)
+++					dev_warn(sfp->dev,
+++						 "please wait, module slow to respond\n");
+++				sfp_sm_set_timer(sfp, T_PROBE_RETRY_SLOW);
+++				break;
+++			}
++ 		}
++ 		if (err < 0) {
++ 			sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0);
++@@ -1661,7 +1679,7 @@ static void sfp_sm_module(struct sfp *sf
++ 				sfp_module_remove(sfp->sfp_bus);
++ 				sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0);
++ 			} else {
++-				sfp_sm_set_timer(sfp, T_PROBE_RETRY);
+++				sfp_sm_set_timer(sfp, T_PROBE_RETRY_INIT);
++ 			}
++ 			break;
++ 		}
+diff --git a/target/linux/generic/backport-5.4/736-v5.5-net-sfp-allow-modules-with-slow-diagnostics-to-probe.patch b/target/linux/generic/backport-5.4/736-v5.5-net-sfp-allow-modules-with-slow-diagnostics-to-probe.patch
+new file mode 100644
+index 0000000000..e6c1fd71d8
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/736-v5.5-net-sfp-allow-modules-with-slow-diagnostics-to-probe.patch
+@@ -0,0 +1,198 @@
++From 559391fc20fae506adcb311b904cc544c76436c0 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Thu, 7 Nov 2019 18:52:07 +0000
++Subject: [PATCH 634/660] net: sfp: allow modules with slow diagnostics to
++ probe
++
++When a module is inserted, we attempt to read read the ID from address
++0x50.  Once we are able to read the ID, we immediately attempt to
++initialise the hwmon support by reading from address 0x51.  If this
++fails, then we fall into error state, and assume that the module is
++not usable.
++
++Modules such as the ALCATELLUCENT 3FE46541AA use a real EEPROM for
++I2C address 0x50, which responds immediately.  However, address 0x51
++is an emulated, which only becomes available once the on-board firmware
++has booted.  This prompts us to fall into the error state.
++
++Since the module may be usable without diagnostics, arrange for the
++hwmon probe independent of the rest of the SFP itself, retrying every
++5s for up to about 60s for the monitoring to become available, and
++print an error message if it doesn't become available.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 96 +++++++++++++++++++++++++++++++++----------
++ 1 file changed, 74 insertions(+), 22 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -218,6 +218,8 @@ struct sfp {
++ 
++ #if IS_ENABLED(CONFIG_HWMON)
++ 	struct sfp_diag diag;
+++	struct delayed_work hwmon_probe;
+++	unsigned int hwmon_tries;
++ 	struct device *hwmon_dev;
++ 	char *hwmon_name;
++ #endif
++@@ -1159,29 +1161,27 @@ static const struct hwmon_chip_info sfp_
++ 	.info = sfp_hwmon_info,
++ };
++ 
++-static int sfp_hwmon_insert(struct sfp *sfp)
+++static void sfp_hwmon_probe(struct work_struct *work)
++ {
+++	struct sfp *sfp = container_of(work, struct sfp, hwmon_probe.work);
++ 	int err, i;
++ 
++-	if (sfp->id.ext.sff8472_compliance == SFP_SFF8472_COMPLIANCE_NONE)
++-		return 0;
++-
++-	if (!(sfp->id.ext.diagmon & SFP_DIAGMON_DDM))
++-		return 0;
++-
++-	if (sfp->id.ext.diagmon & SFP_DIAGMON_ADDRMODE)
++-		/* This driver in general does not support address
++-		 * change.
++-		 */
++-		return 0;
++-
++ 	err = sfp_read(sfp, true, 0, &sfp->diag, sizeof(sfp->diag));
++-	if (err < 0)
++-		return err;
+++	if (err < 0) {
+++		if (sfp->hwmon_tries--) {
+++			mod_delayed_work(system_wq, &sfp->hwmon_probe,
+++					 T_PROBE_RETRY_SLOW);
+++		} else {
+++			dev_warn(sfp->dev, "hwmon probe failed: %d\n", err);
+++		}
+++		return;
+++	}
++ 
++ 	sfp->hwmon_name = kstrdup(dev_name(sfp->dev), GFP_KERNEL);
++-	if (!sfp->hwmon_name)
++-		return -ENODEV;
+++	if (!sfp->hwmon_name) {
+++		dev_err(sfp->dev, "out of memory for hwmon name\n");
+++		return;
+++	}
++ 
++ 	for (i = 0; sfp->hwmon_name[i]; i++)
++ 		if (hwmon_is_bad_char(sfp->hwmon_name[i]))
++@@ -1191,18 +1191,52 @@ static int sfp_hwmon_insert(struct sfp *
++ 							 sfp->hwmon_name, sfp,
++ 							 &sfp_hwmon_chip_info,
++ 							 NULL);
+++	if (IS_ERR(sfp->hwmon_dev))
+++		dev_err(sfp->dev, "failed to register hwmon device: %ld\n",
+++			PTR_ERR(sfp->hwmon_dev));
+++}
+++
+++static int sfp_hwmon_insert(struct sfp *sfp)
+++{
+++	if (sfp->id.ext.sff8472_compliance == SFP_SFF8472_COMPLIANCE_NONE)
+++		return 0;
+++
+++	if (!(sfp->id.ext.diagmon & SFP_DIAGMON_DDM))
+++		return 0;
+++
+++	if (sfp->id.ext.diagmon & SFP_DIAGMON_ADDRMODE)
+++		/* This driver in general does not support address
+++		 * change.
+++		 */
+++		return 0;
+++
+++	mod_delayed_work(system_wq, &sfp->hwmon_probe, 1);
+++	sfp->hwmon_tries = R_PROBE_RETRY_SLOW;
++ 
++-	return PTR_ERR_OR_ZERO(sfp->hwmon_dev);
+++	return 0;
++ }
++ 
++ static void sfp_hwmon_remove(struct sfp *sfp)
++ {
+++	cancel_delayed_work_sync(&sfp->hwmon_probe);
++ 	if (!IS_ERR_OR_NULL(sfp->hwmon_dev)) {
++ 		hwmon_device_unregister(sfp->hwmon_dev);
++ 		sfp->hwmon_dev = NULL;
++ 		kfree(sfp->hwmon_name);
++ 	}
++ }
+++
+++static int sfp_hwmon_init(struct sfp *sfp)
+++{
+++	INIT_DELAYED_WORK(&sfp->hwmon_probe, sfp_hwmon_probe);
+++
+++	return 0;
+++}
+++
+++static void sfp_hwmon_exit(struct sfp *sfp)
+++{
+++	cancel_delayed_work_sync(&sfp->hwmon_probe);
+++}
++ #else
++ static int sfp_hwmon_insert(struct sfp *sfp)
++ {
++@@ -1212,6 +1246,15 @@ static int sfp_hwmon_insert(struct sfp *
++ static void sfp_hwmon_remove(struct sfp *sfp)
++ {
++ }
+++
+++static int sfp_hwmon_init(struct sfp *sfp)
+++{
+++	return 0;
+++}
+++
+++static void sfp_hwmon_exit(struct sfp *sfp)
+++{
+++}
++ #endif
++ 
++ /* Helpers */
++@@ -1548,10 +1591,6 @@ static int sfp_sm_mod_probe(struct sfp *
++ 	if (ret < 0)
++ 		return ret;
++ 
++-	ret = sfp_hwmon_insert(sfp);
++-	if (ret < 0)
++-		return ret;
++-
++ 	return 0;
++ }
++ 
++@@ -1700,6 +1739,15 @@ static void sfp_sm_module(struct sfp *sf
++ 	case SFP_MOD_ERROR:
++ 		break;
++ 	}
+++
+++#if IS_ENABLED(CONFIG_HWMON)
+++	if (sfp->sm_mod_state >= SFP_MOD_WAITDEV &&
+++	    IS_ERR_OR_NULL(sfp->hwmon_dev)) {
+++		err = sfp_hwmon_insert(sfp);
+++		if (err)
+++			dev_warn(sfp->dev, "hwmon probe failed: %d\n", err);
+++	}
+++#endif
++ }
++ 
++ static void sfp_sm_main(struct sfp *sfp, unsigned int event)
++@@ -2001,6 +2049,8 @@ static struct sfp *sfp_alloc(struct devi
++ 	INIT_DELAYED_WORK(&sfp->poll, sfp_poll);
++ 	INIT_DELAYED_WORK(&sfp->timeout, sfp_timeout);
++ 
+++	sfp_hwmon_init(sfp);
+++
++ 	return sfp;
++ }
++ 
++@@ -2008,6 +2058,8 @@ static void sfp_cleanup(void *data)
++ {
++ 	struct sfp *sfp = data;
++ 
+++	sfp_hwmon_exit(sfp);
+++
++ 	cancel_delayed_work_sync(&sfp->poll);
++ 	cancel_delayed_work_sync(&sfp->timeout);
++ 	if (sfp->i2c_mii) {
+diff --git a/target/linux/generic/backport-5.4/737-v5.5-net-phy-add-core-phylib-sfp-support.patch b/target/linux/generic/backport-5.4/737-v5.5-net-phy-add-core-phylib-sfp-support.patch
+new file mode 100644
+index 0000000000..edfe151725
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/737-v5.5-net-phy-add-core-phylib-sfp-support.patch
+@@ -0,0 +1,183 @@
++From eb156db588ac583cdae7b91eaac9c0ad3a358e63 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Sun, 15 Sep 2019 20:05:34 +0100
++Subject: [PATCH 635/660] net: phy: add core phylib sfp support
++
++Add core phylib help for supporting SFP sockets on PHYs.  This provides
++a mechanism to inform the SFP layer about PHY up/down events, and also
++unregister the SFP bus when the PHY is going away.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/phy.c        |  7 ++++
++ drivers/net/phy/phy_device.c | 66 ++++++++++++++++++++++++++++++++++++
++ include/linux/phy.h          | 11 ++++++
++ 3 files changed, 84 insertions(+)
++
++--- a/drivers/net/phy/phy.c
+++++ b/drivers/net/phy/phy.c
++@@ -23,6 +23,7 @@
++ #include <linux/ethtool.h>
++ #include <linux/phy.h>
++ #include <linux/phy_led_triggers.h>
+++#include <linux/sfp.h>
++ #include <linux/workqueue.h>
++ #include <linux/mdio.h>
++ #include <linux/io.h>
++@@ -863,6 +864,9 @@ void phy_stop(struct phy_device *phydev)
++ 
++ 	mutex_lock(&phydev->lock);
++ 
+++	if (phydev->sfp_bus)
+++		sfp_upstream_stop(phydev->sfp_bus);
+++
++ 	phydev->state = PHY_HALTED;
++ 
++ 	mutex_unlock(&phydev->lock);
++@@ -925,6 +929,9 @@ void phy_state_machine(struct work_struc
++ 
++ 	old_state = phydev->state;
++ 
+++	if (phydev->sfp_bus)
+++		sfp_upstream_start(phydev->sfp_bus);
+++
++ 	switch (phydev->state) {
++ 	case PHY_DOWN:
++ 	case PHY_READY:
++--- a/drivers/net/phy/phy_device.c
+++++ b/drivers/net/phy/phy_device.c
++@@ -27,6 +27,7 @@
++ #include <linux/bitmap.h>
++ #include <linux/phy.h>
++ #include <linux/phy_led_triggers.h>
+++#include <linux/sfp.h>
++ #include <linux/mdio.h>
++ #include <linux/io.h>
++ #include <linux/uaccess.h>
++@@ -1185,6 +1186,65 @@ phy_standalone_show(struct device *dev,
++ static DEVICE_ATTR_RO(phy_standalone);
++ 
++ /**
+++ * phy_sfp_attach - attach the SFP bus to the PHY upstream network device
+++ * @upstream: pointer to the phy device
+++ * @bus: sfp bus representing cage being attached
+++ *
+++ * This is used to fill in the sfp_upstream_ops .attach member.
+++ */
+++void phy_sfp_attach(void *upstream, struct sfp_bus *bus)
+++{
+++	struct phy_device *phydev = upstream;
+++
+++	if (phydev->attached_dev)
+++		phydev->attached_dev->sfp_bus = bus;
+++	phydev->sfp_bus_attached = true;
+++}
+++EXPORT_SYMBOL(phy_sfp_attach);
+++
+++/**
+++ * phy_sfp_detach - detach the SFP bus from the PHY upstream network device
+++ * @upstream: pointer to the phy device
+++ * @bus: sfp bus representing cage being attached
+++ *
+++ * This is used to fill in the sfp_upstream_ops .detach member.
+++ */
+++void phy_sfp_detach(void *upstream, struct sfp_bus *bus)
+++{
+++	struct phy_device *phydev = upstream;
+++
+++	if (phydev->attached_dev)
+++		phydev->attached_dev->sfp_bus = NULL;
+++	phydev->sfp_bus_attached = false;
+++}
+++EXPORT_SYMBOL(phy_sfp_detach);
+++
+++/**
+++ * phy_sfp_probe - probe for a SFP cage attached to this PHY device
+++ * @phydev: Pointer to phy_device
+++ * @ops: SFP's upstream operations
+++ */
+++int phy_sfp_probe(struct phy_device *phydev,
+++		  const struct sfp_upstream_ops *ops)
+++{
+++	struct sfp_bus *bus;
+++	int ret;
+++
+++	if (phydev->mdio.dev.fwnode) {
+++		bus = sfp_bus_find_fwnode(phydev->mdio.dev.fwnode);
+++		if (IS_ERR(bus))
+++			return PTR_ERR(bus);
+++
+++		phydev->sfp_bus = bus;
+++
+++		ret = sfp_bus_add_upstream(bus, phydev, ops);
+++		sfp_bus_put(bus);
+++	}
+++	return 0;
+++}
+++EXPORT_SYMBOL(phy_sfp_probe);
+++
+++/**
++  * phy_attach_direct - attach a network device to a given PHY device pointer
++  * @dev: network device to attach
++  * @phydev: Pointer to phy_device to attach
++@@ -1261,6 +1321,9 @@ int phy_attach_direct(struct net_device
++ 		dev->phydev = phydev;
++ 	}
++ 
+++	if (phydev->sfp_bus_attached)
+++		dev->sfp_bus = phydev->sfp_bus;
+++
++ 	/* Some Ethernet drivers try to connect to a PHY device before
++ 	 * calling register_netdevice() -> netdev_register_kobject() and
++ 	 * does the dev->dev.kobj initialization. Here we only check for
++@@ -2291,6 +2354,9 @@ static int phy_remove(struct device *dev
++ 	phydev->state = PHY_DOWN;
++ 	mutex_unlock(&phydev->lock);
++ 
+++	sfp_bus_del_upstream(phydev->sfp_bus);
+++	phydev->sfp_bus = NULL;
+++
++ 	if (phydev->drv && phydev->drv->remove) {
++ 		phydev->drv->remove(phydev);
++ 
++--- a/include/linux/phy.h
+++++ b/include/linux/phy.h
++@@ -203,6 +203,8 @@ static inline const char *phy_modes(phy_
++ 
++ struct device;
++ struct phylink;
+++struct sfp_bus;
+++struct sfp_upstream_ops;
++ struct sk_buff;
++ 
++ /*
++@@ -343,6 +345,8 @@ struct phy_c45_device_ids {
++  * dev_flags: Device-specific flags used by the PHY driver.
++  * irq: IRQ number of the PHY's interrupt (-1 if none)
++  * phy_timer: The timer for handling the state machine
+++ * sfp_bus_attached: flag indicating whether the SFP bus has been attached
+++ * sfp_bus: SFP bus attached to this PHY's fiber port
++  * attached_dev: The attached enet driver's device instance ptr
++  * adjust_link: Callback for the enet controller to respond to
++  * changes in the link state.
++@@ -434,6 +438,9 @@ struct phy_device {
++ 
++ 	struct mutex lock;
++ 
+++	/* This may be modified under the rtnl lock */
+++	bool sfp_bus_attached;
+++	struct sfp_bus *sfp_bus;
++ 	struct phylink *phylink;
++ 	struct net_device *attached_dev;
++ 
++@@ -1023,6 +1030,10 @@ int phy_suspend(struct phy_device *phyde
++ int phy_resume(struct phy_device *phydev);
++ int __phy_resume(struct phy_device *phydev);
++ int phy_loopback(struct phy_device *phydev, bool enable);
+++void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
+++void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
+++int phy_sfp_probe(struct phy_device *phydev,
+++	          const struct sfp_upstream_ops *ops);
++ struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
++ 			      phy_interface_t interface);
++ struct phy_device *phy_find_first(struct mii_bus *bus);
+diff --git a/target/linux/generic/backport-5.4/738-v5.5-net-phy-marvell10g-add-SFP-support.patch b/target/linux/generic/backport-5.4/738-v5.5-net-phy-marvell10g-add-SFP-support.patch
+new file mode 100644
+index 0000000000..40a666a3f2
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/738-v5.5-net-phy-marvell10g-add-SFP-support.patch
+@@ -0,0 +1,67 @@
++From 0836d9fb41ed90090ef4af0d7abe784ee7706f80 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Fri, 14 Apr 2017 14:21:25 +0100
++Subject: [PATCH 636/660] net: phy: marvell10g: add SFP+ support
++
++Add support for SFP+ cages to the Marvell 10G PHY driver. This is
++slightly complicated by the way phylib works in that we need to use
++a multi-step process to attach the SFP bus, and we also need to track
++the phylink state machine to know when the module's transmit disable
++signal should change state.
++
++With appropriate DT changes, this allows the SFP+ canges on the
++Macchiatobin platform to be functional.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/marvell10g.c | 25 ++++++++++++++++++++++++-
++ 1 file changed, 24 insertions(+), 1 deletion(-)
++
++--- a/drivers/net/phy/marvell10g.c
+++++ b/drivers/net/phy/marvell10g.c
++@@ -26,6 +26,7 @@
++ #include <linux/hwmon.h>
++ #include <linux/marvell_phy.h>
++ #include <linux/phy.h>
+++#include <linux/sfp.h>
++ 
++ #define MV_PHY_ALASKA_NBT_QUIRK_MASK	0xfffffffe
++ #define MV_PHY_ALASKA_NBT_QUIRK_REV	(MARVELL_PHY_ID_88X3310 | 0xa)
++@@ -206,6 +207,28 @@ static int mv3310_hwmon_probe(struct phy
++ }
++ #endif
++ 
+++static int mv3310_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
+++{
+++	struct phy_device *phydev = upstream;
+++	__ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, };
+++	phy_interface_t iface;
+++
+++	sfp_parse_support(phydev->sfp_bus, id, support);
+++	iface = sfp_select_interface(phydev->sfp_bus, id, support);
+++
+++	if (iface != PHY_INTERFACE_MODE_10GKR) {
+++		dev_err(&phydev->mdio.dev, "incompatible SFP module inserted\n");
+++		return -EINVAL;
+++	}
+++	return 0;
+++}
+++
+++static const struct sfp_upstream_ops mv3310_sfp_ops = {
+++	.attach = phy_sfp_attach,
+++	.detach = phy_sfp_detach,
+++	.module_insert = mv3310_sfp_insert,
+++};
+++
++ static int mv3310_probe(struct phy_device *phydev)
++ {
++ 	struct mv3310_priv *priv;
++@@ -236,7 +259,7 @@ static int mv3310_probe(struct phy_devic
++ 	if (ret)
++ 		return ret;
++ 
++-	return 0;
+++	return phy_sfp_probe(phydev, &mv3310_sfp_ops);
++ }
++ 
++ static int mv3310_suspend(struct phy_device *phydev)
+diff --git a/target/linux/generic/backport-5.4/739-v5.5-net-phylink-update-to-use-phy_support_asym_pause.patch b/target/linux/generic/backport-5.4/739-v5.5-net-phylink-update-to-use-phy_support_asym_pause.patch
+new file mode 100644
+index 0000000000..84a8214ca5
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/739-v5.5-net-phylink-update-to-use-phy_support_asym_pause.patch
+@@ -0,0 +1,43 @@
++From 09d7d8395ec61fba4392b35baa6f71c4e36489df Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Fri, 8 Nov 2019 15:18:02 +0000
++Subject: [PATCH 637/660] net: phylink: update to use phy_support_asym_pause()
++
++Use phy_support_asym_pause() rather than open-coding it.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/phylink.c | 17 +++++++----------
++ 1 file changed, 7 insertions(+), 10 deletions(-)
++
++--- a/drivers/net/phy/phylink.c
+++++ b/drivers/net/phy/phylink.c
++@@ -718,11 +718,6 @@ static int phylink_bringup_phy(struct ph
++ 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
++ 	int ret;
++ 
++-	memset(&config, 0, sizeof(config));
++-	linkmode_copy(supported, phy->supported);
++-	linkmode_copy(config.advertising, phy->advertising);
++-	config.interface = pl->link_config.interface;
++-
++ 	/*
++ 	 * This is the new way of dealing with flow control for PHYs,
++ 	 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
++@@ -730,10 +725,12 @@ static int phylink_bringup_phy(struct ph
++ 	 * using our validate call to the MAC, we rely upon the MAC
++ 	 * clearing the bits from both supported and advertising fields.
++ 	 */
++-	if (phylink_test(supported, Pause))
++-		phylink_set(config.advertising, Pause);
++-	if (phylink_test(supported, Asym_Pause))
++-		phylink_set(config.advertising, Asym_Pause);
+++	phy_support_asym_pause(phy);
+++
+++	memset(&config, 0, sizeof(config));
+++	linkmode_copy(supported, phy->supported);
+++	linkmode_copy(config.advertising, phy->advertising);
+++	config.interface = pl->link_config.interface;
++ 
++ 	ret = phylink_validate(pl, supported, &config);
++ 	if (ret)
+diff --git a/target/linux/generic/backport-5.4/744-v5.5-net-sfp-soft-status-and-control-support.patch b/target/linux/generic/backport-5.4/744-v5.5-net-sfp-soft-status-and-control-support.patch
+new file mode 100644
+index 0000000000..abc9f65f09
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/744-v5.5-net-sfp-soft-status-and-control-support.patch
+@@ -0,0 +1,225 @@
++From 40e0b3b15f7da92e6b065292b14af7b9bfb1c6e0 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Fri, 13 Sep 2019 23:00:35 +0100
++Subject: [PATCH 642/660] net: sfp: soft status and control support
++
++Add support for the soft status and control register, which allows
++TX_FAULT and RX_LOS to be monitored and TX_DISABLE to be set.  We
++make use of this when the board does not support GPIOs for these
++signals.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 110 ++++++++++++++++++++++++++++++++++--------
++ include/linux/sfp.h   |   4 ++
++ 2 files changed, 94 insertions(+), 20 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -201,7 +201,10 @@ struct sfp {
++ 	struct gpio_desc *gpio[GPIO_MAX];
++ 	int gpio_irq[GPIO_MAX];
++ 
+++	bool need_poll;
+++
++ 	struct mutex st_mutex;			/* Protects state */
+++	unsigned int state_soft_mask;
++ 	unsigned int state;
++ 	struct delayed_work poll;
++ 	struct delayed_work timeout;
++@@ -395,24 +398,90 @@ static int sfp_i2c_configure(struct sfp
++ }
++ 
++ /* Interface */
++-static unsigned int sfp_get_state(struct sfp *sfp)
+++static int sfp_read(struct sfp *sfp, bool a2, u8 addr, void *buf, size_t len)
++ {
++-	return sfp->get_state(sfp);
+++	return sfp->read(sfp, a2, addr, buf, len);
++ }
++ 
++-static void sfp_set_state(struct sfp *sfp, unsigned int state)
+++static int sfp_write(struct sfp *sfp, bool a2, u8 addr, void *buf, size_t len)
++ {
++-	sfp->set_state(sfp, state);
+++	return sfp->write(sfp, a2, addr, buf, len);
++ }
++ 
++-static int sfp_read(struct sfp *sfp, bool a2, u8 addr, void *buf, size_t len)
+++static unsigned int sfp_soft_get_state(struct sfp *sfp)
++ {
++-	return sfp->read(sfp, a2, addr, buf, len);
+++	unsigned int state = 0;
+++	u8 status;
+++
+++	if (sfp_read(sfp, true, SFP_STATUS, &status, sizeof(status)) ==
+++		     sizeof(status)) {
+++		if (status & SFP_STATUS_RX_LOS)
+++			state |= SFP_F_LOS;
+++		if (status & SFP_STATUS_TX_FAULT)
+++			state |= SFP_F_TX_FAULT;
+++	}
+++
+++	return state & sfp->state_soft_mask;
++ }
++ 
++-static int sfp_write(struct sfp *sfp, bool a2, u8 addr, void *buf, size_t len)
+++static void sfp_soft_set_state(struct sfp *sfp, unsigned int state)
++ {
++-	return sfp->write(sfp, a2, addr, buf, len);
+++	u8 status;
+++
+++	if (sfp_read(sfp, true, SFP_STATUS, &status, sizeof(status)) ==
+++		     sizeof(status)) {
+++		if (state & SFP_F_TX_DISABLE)
+++			status |= SFP_STATUS_TX_DISABLE_FORCE;
+++		else
+++			status &= ~SFP_STATUS_TX_DISABLE_FORCE;
+++
+++		sfp_write(sfp, true, SFP_STATUS, &status, sizeof(status));
+++	}
+++}
+++
+++static void sfp_soft_start_poll(struct sfp *sfp)
+++{
+++	const struct sfp_eeprom_id *id = &sfp->id;
+++
+++	sfp->state_soft_mask = 0;
+++	if (id->ext.enhopts & SFP_ENHOPTS_SOFT_TX_DISABLE &&
+++	    !sfp->gpio[GPIO_TX_DISABLE])
+++		sfp->state_soft_mask |= SFP_F_TX_DISABLE;
+++	if (id->ext.enhopts & SFP_ENHOPTS_SOFT_TX_FAULT &&
+++	    !sfp->gpio[GPIO_TX_FAULT])
+++		sfp->state_soft_mask |= SFP_F_TX_FAULT;
+++	if (id->ext.enhopts & SFP_ENHOPTS_SOFT_RX_LOS &&
+++	    !sfp->gpio[GPIO_LOS])
+++		sfp->state_soft_mask |= SFP_F_LOS;
+++
+++	if (sfp->state_soft_mask & (SFP_F_LOS | SFP_F_TX_FAULT) &&
+++	    !sfp->need_poll)
+++		mod_delayed_work(system_wq, &sfp->poll, poll_jiffies);
+++}
+++
+++static void sfp_soft_stop_poll(struct sfp *sfp)
+++{
+++	sfp->state_soft_mask = 0;
+++}
+++
+++static unsigned int sfp_get_state(struct sfp *sfp)
+++{
+++	unsigned int state = sfp->get_state(sfp);
+++
+++	if (state & SFP_F_PRESENT &&
+++	    sfp->state_soft_mask & (SFP_F_LOS | SFP_F_TX_FAULT))
+++		state |= sfp_soft_get_state(sfp);
+++
+++	return state;
+++}
+++
+++static void sfp_set_state(struct sfp *sfp, unsigned int state)
+++{
+++	sfp->set_state(sfp, state);
+++
+++	if (state & SFP_F_PRESENT &&
+++	    sfp->state_soft_mask & SFP_F_TX_DISABLE)
+++		sfp_soft_set_state(sfp, state);
++ }
++ 
++ static unsigned int sfp_check(void *buf, size_t len)
++@@ -1407,11 +1476,6 @@ static void sfp_sm_fault(struct sfp *sfp
++ 	}
++ }
++ 
++-static void sfp_sm_mod_init(struct sfp *sfp)
++-{
++-	sfp_module_tx_enable(sfp);
++-}
++-
++ static void sfp_sm_probe_for_phy(struct sfp *sfp)
++ {
++ 	/* Setting the serdes link mode is guesswork: there's no
++@@ -1574,7 +1638,7 @@ static int sfp_sm_mod_probe(struct sfp *
++ 		 (int)sizeof(id.ext.datecode), id.ext.datecode);
++ 
++ 	/* Check whether we support this module */
++-	if (!sfp->type->module_supported(&sfp->id)) {
+++	if (!sfp->type->module_supported(&id)) {
++ 		dev_err(sfp->dev,
++ 			"module is not supported - phys id 0x%02x 0x%02x\n",
++ 			sfp->id.base.phys_id, sfp->id.base.phys_ext_id);
++@@ -1764,6 +1828,7 @@ static void sfp_sm_main(struct sfp *sfp,
++ 		if (sfp->mod_phy)
++ 			sfp_sm_phy_detach(sfp);
++ 		sfp_module_tx_disable(sfp);
+++		sfp_soft_stop_poll(sfp);
++ 		sfp_sm_next(sfp, SFP_S_DOWN, 0);
++ 		return;
++ 	}
++@@ -1775,7 +1840,10 @@ static void sfp_sm_main(struct sfp *sfp,
++ 		    sfp->sm_dev_state != SFP_DEV_UP)
++ 			break;
++ 
++-		sfp_sm_mod_init(sfp);
+++		if (!(sfp->id.ext.diagmon & SFP_DIAGMON_ADDRMODE))
+++			sfp_soft_start_poll(sfp);
+++
+++		sfp_module_tx_enable(sfp);
++ 
++ 		/* Initialise the fault clearance retries */
++ 		sfp->sm_retries = 5;
++@@ -2031,7 +2099,10 @@ static void sfp_poll(struct work_struct
++ 	struct sfp *sfp = container_of(work, struct sfp, poll.work);
++ 
++ 	sfp_check_state(sfp);
++-	mod_delayed_work(system_wq, &sfp->poll, poll_jiffies);
+++
+++	if (sfp->state_soft_mask & (SFP_F_LOS | SFP_F_TX_FAULT) ||
+++	    sfp->need_poll)
+++		mod_delayed_work(system_wq, &sfp->poll, poll_jiffies);
++ }
++ 
++ static struct sfp *sfp_alloc(struct device *dev)
++@@ -2076,7 +2147,6 @@ static int sfp_probe(struct platform_dev
++ 	const struct sff_data *sff;
++ 	struct i2c_adapter *i2c;
++ 	struct sfp *sfp;
++-	bool poll = false;
++ 	int err, i;
++ 
++ 	sfp = sfp_alloc(&pdev->dev);
++@@ -2184,7 +2254,7 @@ static int sfp_probe(struct platform_dev
++ 		sfp->gpio_irq[i] = gpiod_to_irq(sfp->gpio[i]);
++ 		if (sfp->gpio_irq[i] < 0) {
++ 			sfp->gpio_irq[i] = 0;
++-			poll = true;
+++			sfp->need_poll = true;
++ 			continue;
++ 		}
++ 
++@@ -2196,11 +2266,11 @@ static int sfp_probe(struct platform_dev
++ 						dev_name(sfp->dev), sfp);
++ 		if (err) {
++ 			sfp->gpio_irq[i] = 0;
++-			poll = true;
+++			sfp->need_poll = true;
++ 		}
++ 	}
++ 
++-	if (poll)
+++	if (sfp->need_poll)
++ 		mod_delayed_work(system_wq, &sfp->poll, poll_jiffies);
++ 
++ 	/* We could have an issue in cases no Tx disable pin is available or
++--- a/include/linux/sfp.h
+++++ b/include/linux/sfp.h
++@@ -428,6 +428,10 @@ enum {
++ 	SFP_TEC_CUR			= 0x6c,
++ 
++ 	SFP_STATUS			= 0x6e,
+++	SFP_STATUS_TX_DISABLE		= BIT(7),
+++	SFP_STATUS_TX_DISABLE_FORCE	= BIT(6),
+++	SFP_STATUS_TX_FAULT		= BIT(2),
+++	SFP_STATUS_RX_LOS		= BIT(1),
++ 	SFP_ALARM0			= 0x70,
++ 	SFP_ALARM0_TEMP_HIGH		= BIT(7),
++ 	SFP_ALARM0_TEMP_LOW		= BIT(6),
+diff --git a/target/linux/generic/backport-5.4/745-v5.7-net-dsa-mt7530-add-support-for-port-mirroring.patch b/target/linux/generic/backport-5.4/745-v5.7-net-dsa-mt7530-add-support-for-port-mirroring.patch
+new file mode 100644
+index 0000000000..71a06997c3
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/745-v5.7-net-dsa-mt7530-add-support-for-port-mirroring.patch
+@@ -0,0 +1,123 @@
++From 37feab6076aa816ed72fe836759a485353241916 Mon Sep 17 00:00:00 2001
++From: DENG Qingfang <dqfext@gmail.com>
++Date: Fri, 6 Mar 2020 20:35:35 +0800
++Subject: net: dsa: mt7530: add support for port mirroring
++
++Add support for configuring port mirroring through the cls_matchall
++classifier. We do a full ingress and/or egress capture towards a
++capture port.
++MT7530 supports one monitor port and multiple mirrored ports.
++
++Signed-off-by: DENG Qingfang <dqfext@gmail.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ drivers/net/dsa/mt7530.c | 60 ++++++++++++++++++++++++++++++++++++++++++++++++
++ drivers/net/dsa/mt7530.h |  7 ++++++
++ 2 files changed, 67 insertions(+)
++
++--- a/drivers/net/dsa/mt7530.c
+++++ b/drivers/net/dsa/mt7530.c
++@@ -1143,6 +1143,64 @@ mt7530_port_vlan_del(struct dsa_switch *
++ 	return 0;
++ }
++ 
+++static int mt7530_port_mirror_add(struct dsa_switch *ds, int port,
+++				  struct dsa_mall_mirror_tc_entry *mirror,
+++				  bool ingress)
+++{
+++	struct mt7530_priv *priv = ds->priv;
+++	u32 val;
+++
+++	/* Check for existent entry */
+++	if ((ingress ? priv->mirror_rx : priv->mirror_tx) & BIT(port))
+++		return -EEXIST;
+++
+++	val = mt7530_read(priv, MT7530_MFC);
+++
+++	/* MT7530 only supports one monitor port */
+++	if (val & MIRROR_EN && MIRROR_PORT(val) != mirror->to_local_port)
+++		return -EEXIST;
+++
+++	val |= MIRROR_EN;
+++	val &= ~MIRROR_MASK;
+++	val |= mirror->to_local_port;
+++	mt7530_write(priv, MT7530_MFC, val);
+++
+++	val = mt7530_read(priv, MT7530_PCR_P(port));
+++	if (ingress) {
+++		val |= PORT_RX_MIR;
+++		priv->mirror_rx |= BIT(port);
+++	} else {
+++		val |= PORT_TX_MIR;
+++		priv->mirror_tx |= BIT(port);
+++	}
+++	mt7530_write(priv, MT7530_PCR_P(port), val);
+++
+++	return 0;
+++}
+++
+++static void mt7530_port_mirror_del(struct dsa_switch *ds, int port,
+++				   struct dsa_mall_mirror_tc_entry *mirror)
+++{
+++	struct mt7530_priv *priv = ds->priv;
+++	u32 val;
+++
+++	val = mt7530_read(priv, MT7530_PCR_P(port));
+++	if (mirror->ingress) {
+++		val &= ~PORT_RX_MIR;
+++		priv->mirror_rx &= ~BIT(port);
+++	} else {
+++		val &= ~PORT_TX_MIR;
+++		priv->mirror_tx &= ~BIT(port);
+++	}
+++	mt7530_write(priv, MT7530_PCR_P(port), val);
+++
+++	if (!priv->mirror_rx && !priv->mirror_tx) {
+++		val = mt7530_read(priv, MT7530_MFC);
+++		val &= ~MIRROR_EN;
+++		mt7530_write(priv, MT7530_MFC, val);
+++	}
+++}
+++
++ static enum dsa_tag_protocol
++ mtk_get_tag_protocol(struct dsa_switch *ds, int port)
++ {
++@@ -1520,6 +1578,8 @@ static const struct dsa_switch_ops mt753
++ 	.port_vlan_prepare	= mt7530_port_vlan_prepare,
++ 	.port_vlan_add		= mt7530_port_vlan_add,
++ 	.port_vlan_del		= mt7530_port_vlan_del,
+++	.port_mirror_add	= mt7530_port_mirror_add,
+++	.port_mirror_del	= mt7530_port_mirror_del,
++ 	.phylink_validate	= mt7530_phylink_validate,
++ 	.phylink_mac_link_state = mt7530_phylink_mac_link_state,
++ 	.phylink_mac_config	= mt7530_phylink_mac_config,
++--- a/drivers/net/dsa/mt7530.h
+++++ b/drivers/net/dsa/mt7530.h
++@@ -37,6 +37,9 @@ enum {
++ #define  CPU_EN				BIT(7)
++ #define  CPU_PORT(x)			((x) << 4)
++ #define  CPU_MASK			(0xf << 4)
+++#define  MIRROR_EN			BIT(3)
+++#define  MIRROR_PORT(x)			((x) & 0x7)
+++#define  MIRROR_MASK			0x7
++ 
++ /* Registers for address table access */
++ #define MT7530_ATA1			0x74
++@@ -142,6 +145,8 @@ enum mt7530_stp_state {
++ 
++ /* Register for port control */
++ #define MT7530_PCR_P(x)			(0x2004 + ((x) * 0x100))
+++#define  PORT_TX_MIR			BIT(9)
+++#define  PORT_RX_MIR			BIT(8)
++ #define  PORT_VLAN(x)			((x) & 0x3)
++ 
++ enum mt7530_port_mode {
++@@ -464,6 +469,8 @@ struct mt7530_priv {
++ 	phy_interface_t		p6_interface;
++ 	phy_interface_t		p5_interface;
++ 	unsigned int		p5_intf_sel;
+++	u8			mirror_rx;
+++	u8			mirror_tx;
++ 
++ 	struct mt7530_port	ports[MT7530_NUM_PORTS];
++ 	/* protect among processes for registers access*/
+diff --git a/target/linux/generic/backport-5.4/746-v5.5-net-dsa-mv88e6xxx-Split-monitor-port-configuration.patch b/target/linux/generic/backport-5.4/746-v5.5-net-dsa-mv88e6xxx-Split-monitor-port-configuration.patch
+new file mode 100644
+index 0000000000..683178727c
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/746-v5.5-net-dsa-mv88e6xxx-Split-monitor-port-configuration.patch
+@@ -0,0 +1,149 @@
++From 5c74c54ce6fff719999ff48f128cf4150ee4ff59 Mon Sep 17 00:00:00 2001
++From: Iwan R Timmer <irtimmer@gmail.com>
++Date: Thu, 7 Nov 2019 22:11:13 +0100
++Subject: [PATCH] net: dsa: mv88e6xxx: Split monitor port configuration
++
++Separate the configuration of the egress and ingress monitor port.
++This allows the port mirror functionality to do ingress and egress
++port mirroring to separate ports.
++
++Signed-off-by: Iwan R Timmer <irtimmer@gmail.com>
++Reviewed-by: Andrew Lunn <andrew@lunn.ch>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ drivers/net/dsa/mv88e6xxx/chip.c    |  9 ++++++-
++ drivers/net/dsa/mv88e6xxx/chip.h    |  9 ++++++-
++ drivers/net/dsa/mv88e6xxx/global1.c | 42 ++++++++++++++++++++---------
++ drivers/net/dsa/mv88e6xxx/global1.h |  8 ++++--
++ 4 files changed, 52 insertions(+), 16 deletions(-)
++
++--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++++ b/drivers/net/dsa/mv88e6xxx/chip.c
++@@ -2384,7 +2384,14 @@ static int mv88e6xxx_setup_upstream_port
++ 
++ 		if (chip->info->ops->set_egress_port) {
++ 			err = chip->info->ops->set_egress_port(chip,
++-							       upstream_port);
+++						MV88E6XXX_EGRESS_DIR_INGRESS,
+++						upstream_port);
+++			if (err)
+++				return err;
+++
+++			err = chip->info->ops->set_egress_port(chip,
+++						MV88E6XXX_EGRESS_DIR_EGRESS,
+++						upstream_port);
++ 			if (err)
++ 				return err;
++ 		}
++--- a/drivers/net/dsa/mv88e6xxx/chip.h
+++++ b/drivers/net/dsa/mv88e6xxx/chip.h
++@@ -33,6 +33,11 @@ enum mv88e6xxx_egress_mode {
++ 	MV88E6XXX_EGRESS_MODE_ETHERTYPE,
++ };
++ 
+++enum mv88e6xxx_egress_direction {
+++        MV88E6XXX_EGRESS_DIR_INGRESS,
+++        MV88E6XXX_EGRESS_DIR_EGRESS,
+++};
+++
++ enum mv88e6xxx_frame_mode {
++ 	MV88E6XXX_FRAME_MODE_NORMAL,
++ 	MV88E6XXX_FRAME_MODE_DSA,
++@@ -464,7 +469,9 @@ struct mv88e6xxx_ops {
++ 	int (*stats_get_stats)(struct mv88e6xxx_chip *chip,  int port,
++ 			       uint64_t *data);
++ 	int (*set_cpu_port)(struct mv88e6xxx_chip *chip, int port);
++-	int (*set_egress_port)(struct mv88e6xxx_chip *chip, int port);
+++	int (*set_egress_port)(struct mv88e6xxx_chip *chip,
+++			       enum mv88e6xxx_egress_direction direction,
+++			       int port);
++ 
++ #define MV88E6XXX_CASCADE_PORT_NONE		0xe
++ #define MV88E6XXX_CASCADE_PORT_MULTIPLE		0xf
++--- a/drivers/net/dsa/mv88e6xxx/global1.c
+++++ b/drivers/net/dsa/mv88e6xxx/global1.c
++@@ -294,7 +294,9 @@ int mv88e6250_g1_ieee_pri_map(struct mv8
++ /* Offset 0x1a: Monitor Control */
++ /* Offset 0x1a: Monitor & MGMT Control on some devices */
++ 
++-int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port)
+++int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip,
+++				 enum mv88e6xxx_egress_direction direction,
+++				 int port)
++ {
++ 	u16 reg;
++ 	int err;
++@@ -303,11 +305,20 @@ int mv88e6095_g1_set_egress_port(struct
++ 	if (err)
++ 		return err;
++ 
++-	reg &= ~(MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK |
++-		 MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK);
++-
++-	reg |= port << __bf_shf(MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK) |
++-		port << __bf_shf(MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK);
+++	switch (direction) {
+++	case MV88E6XXX_EGRESS_DIR_INGRESS:
+++		reg &= MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK;
+++		reg |= port <<
+++		       __bf_shf(MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK);
+++		break;
+++	case MV88E6XXX_EGRESS_DIR_EGRESS:
+++		reg &= MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK;
+++		reg |= port <<
+++		       __bf_shf(MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK);
+++		break;
+++	default:
+++		return -EINVAL;
+++	}
++ 
++ 	return mv88e6xxx_g1_write(chip, MV88E6185_G1_MONITOR_CTL, reg);
++ }
++@@ -341,17 +352,24 @@ static int mv88e6390_g1_monitor_write(st
++ 	return mv88e6xxx_g1_write(chip, MV88E6390_G1_MONITOR_MGMT_CTL, reg);
++ }
++ 
++-int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port)
+++int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip,
+++				 enum mv88e6xxx_egress_direction direction,
+++				 int port)
++ {
++ 	u16 ptr;
++ 	int err;
++ 
++-	ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_INGRESS_DEST;
++-	err = mv88e6390_g1_monitor_write(chip, ptr, port);
++-	if (err)
++-		return err;
+++	switch (direction) {
+++	case MV88E6XXX_EGRESS_DIR_INGRESS:
+++		ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_INGRESS_DEST;
+++		break;
+++	case MV88E6XXX_EGRESS_DIR_EGRESS:
+++		ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_EGRESS_DEST;
+++		break;
+++	default:
+++		return -EINVAL;
+++	}
++ 
++-	ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_EGRESS_DEST;
++ 	err = mv88e6390_g1_monitor_write(chip, ptr, port);
++ 	if (err)
++ 		return err;
++--- a/drivers/net/dsa/mv88e6xxx/global1.h
+++++ b/drivers/net/dsa/mv88e6xxx/global1.h
++@@ -289,8 +289,12 @@ int mv88e6095_g1_stats_set_histogram(str
++ int mv88e6390_g1_stats_set_histogram(struct mv88e6xxx_chip *chip);
++ void mv88e6xxx_g1_stats_read(struct mv88e6xxx_chip *chip, int stat, u32 *val);
++ int mv88e6xxx_g1_stats_clear(struct mv88e6xxx_chip *chip);
++-int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port);
++-int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port);
+++int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip,
+++				 enum mv88e6xxx_egress_direction direction,
+++				 int port);
+++int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip,
+++				 enum mv88e6xxx_egress_direction direction,
+++				 int port);
++ int mv88e6095_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port);
++ int mv88e6390_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port);
++ int mv88e6390_g1_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip);
+diff --git a/target/linux/generic/backport-5.4/747-v5.5-net-dsa-mv88e6xxx-Add-support-for-port-mirroring.patch b/target/linux/generic/backport-5.4/747-v5.5-net-dsa-mv88e6xxx-Add-support-for-port-mirroring.patch
+new file mode 100644
+index 0000000000..a23f45075f
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/747-v5.5-net-dsa-mv88e6xxx-Add-support-for-port-mirroring.patch
+@@ -0,0 +1,266 @@
++From f0942e00a1abb6404ca4302c66497fc623676c11 Mon Sep 17 00:00:00 2001
++From: Iwan R Timmer <irtimmer@gmail.com>
++Date: Thu, 7 Nov 2019 22:11:14 +0100
++Subject: [PATCH] net: dsa: mv88e6xxx: Add support for port mirroring
++
++Add support for configuring port mirroring through the cls_matchall
++classifier. We do a full ingress and/or egress capture towards a
++capture port. It allows setting a different capture port for ingress
++and egress traffic.
++
++It keeps track of the mirrored ports and the destination ports to
++prevent changes to the capture port while other ports are being
++mirrored.
++
++Signed-off-by: Iwan R Timmer <irtimmer@gmail.com>
++Reviewed-by: Andrew Lunn <andrew@lunn.ch>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ drivers/net/dsa/mv88e6xxx/chip.c    | 76 +++++++++++++++++++++++++++++
++ drivers/net/dsa/mv88e6xxx/chip.h    |  6 +++
++ drivers/net/dsa/mv88e6xxx/global1.c | 18 +++++--
++ drivers/net/dsa/mv88e6xxx/port.c    | 37 ++++++++++++++
++ drivers/net/dsa/mv88e6xxx/port.h    |  3 ++
++ 5 files changed, 136 insertions(+), 4 deletions(-)
++
++--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++++ b/drivers/net/dsa/mv88e6xxx/chip.c
++@@ -4926,6 +4926,80 @@ static int mv88e6xxx_port_mdb_del(struct
++ 	return err;
++ }
++ 
+++static int mv88e6xxx_port_mirror_add(struct dsa_switch *ds, int port,
+++				     struct dsa_mall_mirror_tc_entry *mirror,
+++				     bool ingress)
+++{
+++	enum mv88e6xxx_egress_direction direction = ingress ?
+++						MV88E6XXX_EGRESS_DIR_INGRESS :
+++						MV88E6XXX_EGRESS_DIR_EGRESS;
+++	struct mv88e6xxx_chip *chip = ds->priv;
+++	bool other_mirrors = false;
+++	int i;
+++	int err;
+++
+++	if (!chip->info->ops->set_egress_port)
+++		return -EOPNOTSUPP;
+++
+++	mutex_lock(&chip->reg_lock);
+++	if ((ingress ? chip->ingress_dest_port : chip->egress_dest_port) !=
+++	    mirror->to_local_port) {
+++		for (i = 0; i < mv88e6xxx_num_ports(chip); i++)
+++			other_mirrors |= ingress ?
+++					 chip->ports[i].mirror_ingress :
+++					 chip->ports[i].mirror_egress;
+++
+++		/* Can't change egress port when other mirror is active */
+++		if (other_mirrors) {
+++			err = -EBUSY;
+++			goto out;
+++		}
+++
+++		err = chip->info->ops->set_egress_port(chip,
+++						       direction,
+++						       mirror->to_local_port);
+++		if (err)
+++			goto out;
+++	}
+++
+++	err = mv88e6xxx_port_set_mirror(chip, port, direction, true);
+++out:
+++	mutex_unlock(&chip->reg_lock);
+++
+++	return err;
+++}
+++
+++static void mv88e6xxx_port_mirror_del(struct dsa_switch *ds, int port,
+++				      struct dsa_mall_mirror_tc_entry *mirror)
+++{
+++	enum mv88e6xxx_egress_direction direction = mirror->ingress ?
+++						MV88E6XXX_EGRESS_DIR_INGRESS :
+++						MV88E6XXX_EGRESS_DIR_EGRESS;
+++	struct mv88e6xxx_chip *chip = ds->priv;
+++	bool other_mirrors = false;
+++	int i;
+++
+++	mutex_lock(&chip->reg_lock);
+++	if (mv88e6xxx_port_set_mirror(chip, port, direction, false))
+++		dev_err(ds->dev, "p%d: failed to disable mirroring\n", port);
+++
+++	for (i = 0; i < mv88e6xxx_num_ports(chip); i++)
+++		other_mirrors |= mirror->ingress ?
+++				 chip->ports[i].mirror_ingress :
+++				 chip->ports[i].mirror_egress;
+++
+++	/* Reset egress port when no other mirror is active */
+++	if (!other_mirrors) {
+++		if (chip->info->ops->set_egress_port(chip,
+++						     direction,
+++						     dsa_upstream_port(ds,
+++								       port)));
+++			dev_err(ds->dev, "failed to set egress port\n");
+++	}
+++
+++	mutex_unlock(&chip->reg_lock);
+++}
+++
++ static int mv88e6xxx_port_egress_floods(struct dsa_switch *ds, int port,
++ 					 bool unicast, bool multicast)
++ {
++@@ -4980,6 +5054,8 @@ static const struct dsa_switch_ops mv88e
++ 	.port_mdb_prepare       = mv88e6xxx_port_mdb_prepare,
++ 	.port_mdb_add           = mv88e6xxx_port_mdb_add,
++ 	.port_mdb_del           = mv88e6xxx_port_mdb_del,
+++	.port_mirror_add	= mv88e6xxx_port_mirror_add,
+++	.port_mirror_del	= mv88e6xxx_port_mirror_del,
++ 	.crosschip_bridge_join	= mv88e6xxx_crosschip_bridge_join,
++ 	.crosschip_bridge_leave	= mv88e6xxx_crosschip_bridge_leave,
++ 	.port_hwtstamp_set	= mv88e6xxx_port_hwtstamp_set,
++--- a/drivers/net/dsa/mv88e6xxx/chip.h
+++++ b/drivers/net/dsa/mv88e6xxx/chip.h
++@@ -232,6 +232,8 @@ struct mv88e6xxx_port {
++ 	u64 vtu_member_violation;
++ 	u64 vtu_miss_violation;
++ 	u8 cmode;
+++	bool mirror_ingress;
+++	bool mirror_egress;
++ 	unsigned int serdes_irq;
++ };
++ 
++@@ -315,6 +317,10 @@ struct mv88e6xxx_chip {
++ 	u16 evcap_config;
++ 	u16 enable_count;
++ 
+++	/* Current ingress and egress monitor ports */
+++	int egress_dest_port;
+++	int ingress_dest_port;
+++
++ 	/* Per-port timestamping resources. */
++ 	struct mv88e6xxx_port_hwtstamp port_hwtstamp[DSA_MAX_PORTS];
++ 
++--- a/drivers/net/dsa/mv88e6xxx/global1.c
+++++ b/drivers/net/dsa/mv88e6xxx/global1.c
++@@ -298,6 +298,7 @@ int mv88e6095_g1_set_egress_port(struct
++ 				 enum mv88e6xxx_egress_direction direction,
++ 				 int port)
++ {
+++	int *dest_port_chip;
++ 	u16 reg;
++ 	int err;
++ 
++@@ -307,11 +308,13 @@ int mv88e6095_g1_set_egress_port(struct
++ 
++ 	switch (direction) {
++ 	case MV88E6XXX_EGRESS_DIR_INGRESS:
+++		dest_port_chip = &chip->ingress_dest_port;
++ 		reg &= MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK;
++ 		reg |= port <<
++ 		       __bf_shf(MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK);
++ 		break;
++ 	case MV88E6XXX_EGRESS_DIR_EGRESS:
+++		dest_port_chip = &chip->egress_dest_port;
++ 		reg &= MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK;
++ 		reg |= port <<
++ 		       __bf_shf(MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK);
++@@ -320,7 +323,11 @@ int mv88e6095_g1_set_egress_port(struct
++ 		return -EINVAL;
++ 	}
++ 
++-	return mv88e6xxx_g1_write(chip, MV88E6185_G1_MONITOR_CTL, reg);
+++	err = mv88e6xxx_g1_write(chip, MV88E6185_G1_MONITOR_CTL, reg);
+++	if (!err)
+++		*dest_port_chip = port;
+++
+++	return err;
++ }
++ 
++ /* Older generations also call this the ARP destination. It has been
++@@ -356,14 +363,17 @@ int mv88e6390_g1_set_egress_port(struct
++ 				 enum mv88e6xxx_egress_direction direction,
++ 				 int port)
++ {
+++	int *dest_port_chip;
++ 	u16 ptr;
++ 	int err;
++ 
++ 	switch (direction) {
++ 	case MV88E6XXX_EGRESS_DIR_INGRESS:
+++		dest_port_chip = &chip->ingress_dest_port;
++ 		ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_INGRESS_DEST;
++ 		break;
++ 	case MV88E6XXX_EGRESS_DIR_EGRESS:
+++		dest_port_chip = &chip->egress_dest_port;
++ 		ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_EGRESS_DEST;
++ 		break;
++ 	default:
++@@ -371,10 +381,10 @@ int mv88e6390_g1_set_egress_port(struct
++ 	}
++ 
++ 	err = mv88e6390_g1_monitor_write(chip, ptr, port);
++-	if (err)
++-		return err;
+++	if (!err)
+++		*dest_port_chip = port;
++ 
++-	return 0;
+++	return err;
++ }
++ 
++ int mv88e6390_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port)
++--- a/drivers/net/dsa/mv88e6xxx/port.c
+++++ b/drivers/net/dsa/mv88e6xxx/port.c
++@@ -1181,6 +1181,43 @@ int mv88e6095_port_set_upstream_port(str
++ 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);
++ }
++ 
+++int mv88e6xxx_port_set_mirror(struct mv88e6xxx_chip *chip, int port,
+++			      enum mv88e6xxx_egress_direction direction,
+++			      bool mirror)
+++{
+++	bool *mirror_port;
+++	u16 reg;
+++	u16 bit;
+++	int err;
+++
+++	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL2, &reg);
+++	if (err)
+++		return err;
+++
+++	switch (direction) {
+++	case MV88E6XXX_EGRESS_DIR_INGRESS:
+++		bit = MV88E6XXX_PORT_CTL2_INGRESS_MONITOR;
+++		mirror_port = &chip->ports[port].mirror_ingress;
+++		break;
+++	case MV88E6XXX_EGRESS_DIR_EGRESS:
+++		bit = MV88E6XXX_PORT_CTL2_EGRESS_MONITOR;
+++		mirror_port = &chip->ports[port].mirror_egress;
+++		break;
+++	default:
+++		return -EINVAL;
+++	}
+++
+++	reg &= ~bit;
+++	if (mirror)
+++		reg |= bit;
+++
+++	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);
+++	if (!err)
+++		*mirror_port = mirror;
+++
+++	return err;
+++}
+++
++ int mv88e6xxx_port_set_8021q_mode(struct mv88e6xxx_chip *chip, int port,
++ 				  u16 mode)
++ {
++--- a/drivers/net/dsa/mv88e6xxx/port.h
+++++ b/drivers/net/dsa/mv88e6xxx/port.h
++@@ -368,6 +368,9 @@ int mv88e6352_port_link_state(struct mv8
++ int mv88e6xxx_port_set_map_da(struct mv88e6xxx_chip *chip, int port);
++ int mv88e6095_port_set_upstream_port(struct mv88e6xxx_chip *chip, int port,
++ 				     int upstream_port);
+++int mv88e6xxx_port_set_mirror(struct mv88e6xxx_chip *chip, int port,
+++			      enum mv88e6xxx_egress_direction direction,
+++			      bool mirror);
++ 
++ int mv88e6xxx_port_disable_learn_limit(struct mv88e6xxx_chip *chip, int port);
++ int mv88e6xxx_port_disable_pri_override(struct mv88e6xxx_chip *chip, int port);
+diff --git a/target/linux/generic/backport-5.4/748-v5.5-net-dsa-mv88e6xxx-fix-broken-if-statement-because-of.patch b/target/linux/generic/backport-5.4/748-v5.5-net-dsa-mv88e6xxx-fix-broken-if-statement-because-of.patch
+new file mode 100644
+index 0000000000..37e7a7f2a9
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/748-v5.5-net-dsa-mv88e6xxx-fix-broken-if-statement-because-of.patch
+@@ -0,0 +1,30 @@
++From 4e4637b10374ede3cd33d7e1b389e6cea6343ea3 Mon Sep 17 00:00:00 2001
++From: Colin Ian King <colin.king@canonical.com>
++Date: Tue, 12 Nov 2019 13:05:23 +0000
++Subject: [PATCH] net: dsa: mv88e6xxx: fix broken if statement because of a
++ stray semicolon
++
++There is a stray semicolon in an if statement that will cause a dev_err
++message to be printed unconditionally. Fix this by removing the stray
++semicolon.
++
++Addresses-Coverity: ("Stay semicolon")
++Fixes: f0942e00a1ab ("net: dsa: mv88e6xxx: Add support for port mirroring")
++Signed-off-by: Colin Ian King <colin.king@canonical.com>
++Reviewed-by: Andrew Lunn <andrew@lunn.ch>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ drivers/net/dsa/mv88e6xxx/chip.c | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++++ b/drivers/net/dsa/mv88e6xxx/chip.c
++@@ -4993,7 +4993,7 @@ static void mv88e6xxx_port_mirror_del(st
++ 		if (chip->info->ops->set_egress_port(chip,
++ 						     direction,
++ 						     dsa_upstream_port(ds,
++-								       port)));
+++								       port)))
++ 			dev_err(ds->dev, "failed to set egress port\n");
++ 	}
++ 
+diff --git a/target/linux/generic/backport-5.4/749-v5.5-net-dsa-mv88e6xxx-Fix-masking-of-egress-port.patch b/target/linux/generic/backport-5.4/749-v5.5-net-dsa-mv88e6xxx-Fix-masking-of-egress-port.patch
+new file mode 100644
+index 0000000000..497a808511
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/749-v5.5-net-dsa-mv88e6xxx-Fix-masking-of-egress-port.patch
+@@ -0,0 +1,34 @@
++From 3ee339eb28959629db33aaa2b8cde4c63c6289eb Mon Sep 17 00:00:00 2001
++From: Andrew Lunn <andrew@lunn.ch>
++Date: Thu, 27 Feb 2020 21:20:49 +0100
++Subject: [PATCH] net: dsa: mv88e6xxx: Fix masking of egress port
++
++Add missing ~ to the usage of the mask.
++
++Reported-by: Kevin Benson <Kevin.Benson@zii.aero>
++Reported-by: Chris Healy <Chris.Healy@zii.aero>
++Fixes: 5c74c54ce6ff ("net: dsa: mv88e6xxx: Split monitor port configuration")
++Signed-off-by: Andrew Lunn <andrew@lunn.ch>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ drivers/net/dsa/mv88e6xxx/global1.c | 4 ++--
++ 1 file changed, 2 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/dsa/mv88e6xxx/global1.c
+++++ b/drivers/net/dsa/mv88e6xxx/global1.c
++@@ -309,13 +309,13 @@ int mv88e6095_g1_set_egress_port(struct
++ 	switch (direction) {
++ 	case MV88E6XXX_EGRESS_DIR_INGRESS:
++ 		dest_port_chip = &chip->ingress_dest_port;
++-		reg &= MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK;
+++		reg &= ~MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK;
++ 		reg |= port <<
++ 		       __bf_shf(MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK);
++ 		break;
++ 	case MV88E6XXX_EGRESS_DIR_EGRESS:
++ 		dest_port_chip = &chip->egress_dest_port;
++-		reg &= MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK;
+++		reg &= ~MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK;
++ 		reg |= port <<
++ 		       __bf_shf(MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK);
++ 		break;
+diff --git a/target/linux/generic/backport-5.4/750-v5.5-net-phy-add-support-for-clause-37-auto-negotiation.patch b/target/linux/generic/backport-5.4/750-v5.5-net-phy-add-support-for-clause-37-auto-negotiation.patch
+new file mode 100644
+index 0000000000..69c56eca7a
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/750-v5.5-net-phy-add-support-for-clause-37-auto-negotiation.patch
+@@ -0,0 +1,195 @@
++From fa6e98cee558622565c97924e922b97340aeabd8 Mon Sep 17 00:00:00 2001
++From: Heiner Kallweit <hkallweit1@gmail.com>
++Date: Tue, 22 Oct 2019 11:31:07 -0700
++Subject: [PATCH] net: phy: add support for clause 37 auto-negotiation
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++This patch adds support for clause 37 1000Base-X auto-negotiation.
++
++Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
++Signed-off-by: Tao Ren <taoren@fb.com>
++Tested-by: René van Dorst <opensource@vdorst.com>
++Reviewed-by: Andrew Lunn <andrew@lunn.ch>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ drivers/net/phy/phy_device.c | 139 +++++++++++++++++++++++++++++++++++
++ include/linux/phy.h          |   4 +
++ 2 files changed, 143 insertions(+)
++
++--- a/drivers/net/phy/phy_device.c
+++++ b/drivers/net/phy/phy_device.c
++@@ -1682,6 +1682,40 @@ static int genphy_config_advert(struct p
++ }
++ 
++ /**
+++ * genphy_c37_config_advert - sanitize and advertise auto-negotiation parameters
+++ * @phydev: target phy_device struct
+++ *
+++ * Description: Writes MII_ADVERTISE with the appropriate values,
+++ *   after sanitizing the values to make sure we only advertise
+++ *   what is supported.  Returns < 0 on error, 0 if the PHY's advertisement
+++ *   hasn't changed, and > 0 if it has changed. This function is intended
+++ *   for Clause 37 1000Base-X mode.
+++ */
+++static int genphy_c37_config_advert(struct phy_device *phydev)
+++{
+++	u16 adv = 0;
+++
+++	/* Only allow advertising what this PHY supports */
+++	linkmode_and(phydev->advertising, phydev->advertising,
+++		     phydev->supported);
+++
+++	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
+++			      phydev->advertising))
+++		adv |= ADVERTISE_1000XFULL;
+++	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
+++			      phydev->advertising))
+++		adv |= ADVERTISE_1000XPAUSE;
+++	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
+++			      phydev->advertising))
+++		adv |= ADVERTISE_1000XPSE_ASYM;
+++
+++	return phy_modify_changed(phydev, MII_ADVERTISE,
+++				  ADVERTISE_1000XFULL | ADVERTISE_1000XPAUSE |
+++				  ADVERTISE_1000XHALF | ADVERTISE_1000XPSE_ASYM,
+++				  adv);
+++}
+++
+++/**
++  * genphy_config_eee_advert - disable unwanted eee mode advertisement
++  * @phydev: target phy_device struct
++  *
++@@ -1790,6 +1824,54 @@ int __genphy_config_aneg(struct phy_devi
++ EXPORT_SYMBOL(__genphy_config_aneg);
++ 
++ /**
+++ * genphy_c37_config_aneg - restart auto-negotiation or write BMCR
+++ * @phydev: target phy_device struct
+++ *
+++ * Description: If auto-negotiation is enabled, we configure the
+++ *   advertising, and then restart auto-negotiation.  If it is not
+++ *   enabled, then we write the BMCR. This function is intended
+++ *   for use with Clause 37 1000Base-X mode.
+++ */
+++int genphy_c37_config_aneg(struct phy_device *phydev)
+++{
+++	int err, changed;
+++
+++	if (phydev->autoneg != AUTONEG_ENABLE)
+++		return genphy_setup_forced(phydev);
+++
+++	err = phy_modify(phydev, MII_BMCR, BMCR_SPEED1000 | BMCR_SPEED100,
+++			 BMCR_SPEED1000);
+++	if (err)
+++		return err;
+++
+++	changed = genphy_c37_config_advert(phydev);
+++	if (changed < 0) /* error */
+++		return changed;
+++
+++	if (!changed) {
+++		/* Advertisement hasn't changed, but maybe aneg was never on to
+++		 * begin with?  Or maybe phy was isolated?
+++		 */
+++		int ctl = phy_read(phydev, MII_BMCR);
+++
+++		if (ctl < 0)
+++			return ctl;
+++
+++		if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
+++			changed = 1; /* do restart aneg */
+++	}
+++
+++	/* Only restart aneg if we are advertising something different
+++	 * than we were before.
+++	 */
+++	if (changed > 0)
+++		return genphy_restart_aneg(phydev);
+++
+++	return 0;
+++}
+++EXPORT_SYMBOL(genphy_c37_config_aneg);
+++
+++/**
++  * genphy_aneg_done - return auto-negotiation status
++  * @phydev: target phy_device struct
++  *
++@@ -1962,6 +2044,63 @@ int genphy_read_status(struct phy_device
++ EXPORT_SYMBOL(genphy_read_status);
++ 
++ /**
+++ * genphy_c37_read_status - check the link status and update current link state
+++ * @phydev: target phy_device struct
+++ *
+++ * Description: Check the link, then figure out the current state
+++ *   by comparing what we advertise with what the link partner
+++ *   advertises. This function is for Clause 37 1000Base-X mode.
+++ */
+++int genphy_c37_read_status(struct phy_device *phydev)
+++{
+++	int lpa, err, old_link = phydev->link;
+++
+++	/* Update the link, but return if there was an error */
+++	err = genphy_update_link(phydev);
+++	if (err)
+++		return err;
+++
+++	/* why bother the PHY if nothing can have changed */
+++	if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link)
+++		return 0;
+++
+++	phydev->duplex = DUPLEX_UNKNOWN;
+++	phydev->pause = 0;
+++	phydev->asym_pause = 0;
+++
+++	if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) {
+++		lpa = phy_read(phydev, MII_LPA);
+++		if (lpa < 0)
+++			return lpa;
+++
+++		linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
+++				 phydev->lp_advertising, lpa & LPA_LPACK);
+++		linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
+++				 phydev->lp_advertising, lpa & LPA_1000XFULL);
+++		linkmode_mod_bit(ETHTOOL_LINK_MODE_Pause_BIT,
+++				 phydev->lp_advertising, lpa & LPA_1000XPAUSE);
+++		linkmode_mod_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
+++				 phydev->lp_advertising,
+++				 lpa & LPA_1000XPAUSE_ASYM);
+++
+++		phy_resolve_aneg_linkmode(phydev);
+++	} else if (phydev->autoneg == AUTONEG_DISABLE) {
+++		int bmcr = phy_read(phydev, MII_BMCR);
+++
+++		if (bmcr < 0)
+++			return bmcr;
+++
+++		if (bmcr & BMCR_FULLDPLX)
+++			phydev->duplex = DUPLEX_FULL;
+++		else
+++			phydev->duplex = DUPLEX_HALF;
+++	}
+++
+++	return 0;
+++}
+++EXPORT_SYMBOL(genphy_c37_read_status);
+++
+++/**
++  * genphy_soft_reset - software reset the PHY via BMCR_RESET bit
++  * @phydev: target phy_device struct
++  *
++--- a/include/linux/phy.h
+++++ b/include/linux/phy.h
++@@ -1120,6 +1120,10 @@ int genphy_read_mmd_unsupported(struct p
++ int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
++ 				 u16 regnum, u16 val);
++ 
+++/* Clause 37 */
+++int genphy_c37_config_aneg(struct phy_device *phydev);
+++int genphy_c37_read_status(struct phy_device *phydev);
+++
++ /* Clause 45 PHY */
++ int genphy_c45_restart_aneg(struct phy_device *phydev);
++ int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
+diff --git a/target/linux/generic/backport-5.4/751-v5.6-net-mvmdio-avoid-error-message-for-optional-IRQ.patch b/target/linux/generic/backport-5.4/751-v5.6-net-mvmdio-avoid-error-message-for-optional-IRQ.patch
+new file mode 100644
+index 0000000000..6d51de8372
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/751-v5.6-net-mvmdio-avoid-error-message-for-optional-IRQ.patch
+@@ -0,0 +1,33 @@
++From fa2632f74e57bbc869c8ad37751a11b6147a3acc Mon Sep 17 00:00:00 2001
++From: Chris Packham <chris.packham@alliedtelesis.co.nz>
++Date: Mon, 16 Mar 2020 20:49:07 +1300
++Subject: [PATCH] net: mvmdio: avoid error message for optional IRQ
++
++Per the dt-binding the interrupt is optional so use
++platform_get_irq_optional() instead of platform_get_irq(). Since
++commit 7723f4c5ecdb ("driver core: platform: Add an error message to
++platform_get_irq*()") platform_get_irq() produces an error message
++
++  orion-mdio f1072004.mdio: IRQ index 0 not found
++
++which is perfectly normal if one hasn't specified the optional property
++in the device tree.
++
++Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
++Reviewed-by: Andrew Lunn <andrew@lunn.ch>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ drivers/net/ethernet/marvell/mvmdio.c | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/net/ethernet/marvell/mvmdio.c
+++++ b/drivers/net/ethernet/marvell/mvmdio.c
++@@ -347,7 +347,7 @@ static int orion_mdio_probe(struct platf
++ 	}
++ 
++ 
++-	dev->err_interrupt = platform_get_irq(pdev, 0);
+++	dev->err_interrupt = platform_get_irq_optional(pdev, 0);
++ 	if (dev->err_interrupt > 0 &&
++ 	    resource_size(r) < MVMDIO_ERR_INT_MASK + 4) {
++ 		dev_err(&pdev->dev,
+diff --git a/target/linux/generic/backport-5.4/752-v5.8-net-dsa-provide-an-option-for-drivers-to-always-rece.patch b/target/linux/generic/backport-5.4/752-v5.8-net-dsa-provide-an-option-for-drivers-to-always-rece.patch
+new file mode 100644
+index 0000000000..52d9351b70
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/752-v5.8-net-dsa-provide-an-option-for-drivers-to-always-rece.patch
+@@ -0,0 +1,121 @@
++From 54a0ed0df49609f4e3f098f8943e38e389dc2e15 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Tue, 12 May 2020 20:20:25 +0300
++Subject: net: dsa: provide an option for drivers to always receive bridge
++ VLANs
++
++DSA assumes that a bridge which has vlan filtering disabled is not
++vlan aware, and ignores all vlan configuration. However, the kernel
++software bridge code allows configuration in this state.
++
++This causes the kernel's idea of the bridge vlan state and the
++hardware state to disagree, so "bridge vlan show" indicates a correct
++configuration but the hardware lacks all configuration. Even worse,
++enabling vlan filtering on a DSA bridge immediately blocks all traffic
++which, given the output of "bridge vlan show", is very confusing.
++
++Provide an option that drivers can set to indicate they want to receive
++vlan configuration even when vlan filtering is disabled. At the very
++least, this is safe for Marvell DSA bridges, which do not look up
++ingress traffic in the VTU if the port is in 8021Q disabled state. It is
++also safe for the Ocelot switch family. Whether this change is suitable
++for all DSA bridges is not known.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
++Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ include/net/dsa.h  |  7 +++++++
++ net/dsa/dsa_priv.h |  1 +
++ net/dsa/port.c     | 14 ++++++++++++++
++ net/dsa/slave.c    |  8 ++++----
++ 4 files changed, 26 insertions(+), 4 deletions(-)
++
++--- a/include/net/dsa.h
+++++ b/include/net/dsa.h
++@@ -270,6 +270,13 @@ struct dsa_switch {
++ 	 */
++ 	bool			vlan_filtering_is_global;
++ 
+++	/* Pass .port_vlan_add and .port_vlan_del to drivers even for bridges
+++	 * that have vlan_filtering=0. All drivers should ideally set this (and
+++	 * then the option would get removed), but it is unknown whether this
+++	 * would break things or not.
+++	 */
+++	bool			configure_vlan_while_not_filtering;
+++
++ 	/* In case vlan_filtering_is_global is set, the VLAN awareness state
++ 	 * should be retrieved from here and not from the per-port settings.
++ 	 */
++--- a/net/dsa/dsa_priv.h
+++++ b/net/dsa/dsa_priv.h
++@@ -139,6 +139,7 @@ int dsa_port_bridge_join(struct dsa_port
++ void dsa_port_bridge_leave(struct dsa_port *dp, struct net_device *br);
++ int dsa_port_vlan_filtering(struct dsa_port *dp, bool vlan_filtering,
++ 			    struct switchdev_trans *trans);
+++bool dsa_port_skip_vlan_configuration(struct dsa_port *dp);
++ int dsa_port_ageing_time(struct dsa_port *dp, clock_t ageing_clock,
++ 			 struct switchdev_trans *trans);
++ int dsa_port_fdb_add(struct dsa_port *dp, const unsigned char *addr,
++--- a/net/dsa/port.c
+++++ b/net/dsa/port.c
++@@ -238,6 +238,20 @@ int dsa_port_vlan_filtering(struct dsa_p
++ 	return 0;
++ }
++ 
+++/* This enforces legacy behavior for switch drivers which assume they can't
+++ * receive VLAN configuration when enslaved to a bridge with vlan_filtering=0
+++ */
+++bool dsa_port_skip_vlan_configuration(struct dsa_port *dp)
+++{
+++	struct dsa_switch *ds = dp->ds;
+++
+++	if (!dp->bridge_dev)
+++		return false;
+++
+++	return (!ds->configure_vlan_while_not_filtering &&
+++		!br_vlan_enabled(dp->bridge_dev));
+++}
+++
++ int dsa_port_ageing_time(struct dsa_port *dp, clock_t ageing_clock,
++ 			 struct switchdev_trans *trans)
++ {
++--- a/net/dsa/slave.c
+++++ b/net/dsa/slave.c
++@@ -319,7 +319,7 @@ static int dsa_slave_vlan_add(struct net
++ 	if (obj->orig_dev != dev)
++ 		return -EOPNOTSUPP;
++ 
++-	if (dp->bridge_dev && !br_vlan_enabled(dp->bridge_dev))
+++	if (dsa_port_skip_vlan_configuration(dp))
++ 		return 0;
++ 
++ 	vlan = *SWITCHDEV_OBJ_PORT_VLAN(obj);
++@@ -386,7 +386,7 @@ static int dsa_slave_vlan_del(struct net
++ 	if (obj->orig_dev != dev)
++ 		return -EOPNOTSUPP;
++ 
++-	if (dp->bridge_dev && !br_vlan_enabled(dp->bridge_dev))
+++	if (dsa_port_skip_vlan_configuration(dp))
++ 		return 0;
++ 
++ 	/* Do not deprogram the CPU port as it may be shared with other user
++@@ -1120,7 +1120,7 @@ static int dsa_slave_vlan_rx_add_vid(str
++ 	 * need to emulate the switchdev prepare + commit phase.
++ 	 */
++ 	if (dp->bridge_dev) {
++-		if (!br_vlan_enabled(dp->bridge_dev))
+++		if (dsa_port_skip_vlan_configuration(dp))
++ 			return 0;
++ 
++ 		/* br_vlan_get_info() returns -EINVAL or -ENOENT if the
++@@ -1154,7 +1154,7 @@ static int dsa_slave_vlan_rx_kill_vid(st
++ 	 * need to emulate the switchdev prepare + commit phase.
++ 	 */
++ 	if (dp->bridge_dev) {
++-		if (!br_vlan_enabled(dp->bridge_dev))
+++		if (dsa_port_skip_vlan_configuration(dp))
++ 			return 0;
++ 
++ 		/* br_vlan_get_info() returns -EINVAL or -ENOENT if the
+diff --git a/target/linux/generic/backport-5.4/753-v5.8-net-dsa-mt7530-fix-VLAN-setup.patch b/target/linux/generic/backport-5.4/753-v5.8-net-dsa-mt7530-fix-VLAN-setup.patch
+new file mode 100644
+index 0000000000..0804cea9f7
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/753-v5.8-net-dsa-mt7530-fix-VLAN-setup.patch
+@@ -0,0 +1,51 @@
++From 0141792f8b7300006b874dda1c35acd0abd90d9d Mon Sep 17 00:00:00 2001
++From: DENG Qingfang <dqfext@gmail.com>
++Date: Fri, 15 May 2020 23:25:55 +0800
++Subject: net: dsa: mt7530: fix VLAN setup
++
++Allow DSA to add VLAN entries even if VLAN filtering is disabled, so
++enabling it will not block the traffic of existent ports in the bridge
++
++Signed-off-by: DENG Qingfang <dqfext@gmail.com>
++Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ drivers/net/dsa/mt7530.c | 13 +------------
++ 1 file changed, 1 insertion(+), 12 deletions(-)
++
++--- a/drivers/net/dsa/mt7530.c
+++++ b/drivers/net/dsa/mt7530.c
++@@ -1083,12 +1083,6 @@ mt7530_port_vlan_add(struct dsa_switch *
++ 	struct mt7530_priv *priv = ds->priv;
++ 	u16 vid;
++ 
++-	/* The port is kept as VLAN-unaware if bridge with vlan_filtering not
++-	 * being set.
++-	 */
++-	if (!dsa_port_is_vlan_filtering(&ds->ports[port]))
++-		return;
++-
++ 	mutex_lock(&priv->reg_mutex);
++ 
++ 	for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) {
++@@ -1114,12 +1108,6 @@ mt7530_port_vlan_del(struct dsa_switch *
++ 	struct mt7530_priv *priv = ds->priv;
++ 	u16 vid, pvid;
++ 
++-	/* The port is kept as VLAN-unaware if bridge with vlan_filtering not
++-	 * being set.
++-	 */
++-	if (!dsa_port_is_vlan_filtering(&ds->ports[port]))
++-		return 0;
++-
++ 	mutex_lock(&priv->reg_mutex);
++ 
++ 	pvid = priv->ports[port].pvid;
++@@ -1232,6 +1220,7 @@ mt7530_setup(struct dsa_switch *ds)
++ 	 * as two netdev instances.
++ 	 */
++ 	dn = ds->ports[MT7530_CPU_PORT].master->dev.of_node->parent;
+++	ds->configure_vlan_while_not_filtering = true;
++ 
++ 	if (priv->id == ID_MT7530) {
++ 		regulator_set_voltage(priv->core_pwr, 1000000, 1000000);
+diff --git a/target/linux/generic/backport-5.4/756-v5.8-net-dsa-rtl8366-Pass-GENMASK-signed-bits.patch b/target/linux/generic/backport-5.4/756-v5.8-net-dsa-rtl8366-Pass-GENMASK-signed-bits.patch
+new file mode 100644
+index 0000000000..b0ab598365
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/756-v5.8-net-dsa-rtl8366-Pass-GENMASK-signed-bits.patch
+@@ -0,0 +1,27 @@
++From 733993f502f254912b1415e13f73651d9f2e74ef Mon Sep 17 00:00:00 2001
++From: Andrew Lunn <andrew@lunn.ch>
++Date: Sun, 5 Jul 2020 22:42:27 +0200
++Subject: [PATCH 1/5] net: dsa: rtl8366: Pass GENMASK() signed bits
++
++Oddly, GENMASK() requires signed bit numbers, so that it can compare
++them for < 0. If passed an unsigned type, we get warnings about the
++test never being true.
++
++Signed-off-by: Andrew Lunn <andrew@lunn.ch>
++Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ drivers/net/dsa/rtl8366.c | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/net/dsa/rtl8366.c
+++++ b/drivers/net/dsa/rtl8366.c
++@@ -311,7 +311,7 @@ int rtl8366_init_vlan(struct realtek_smi
++ 			/* For the CPU port, make all ports members of this
++ 			 * VLAN.
++ 			 */
++-			mask = GENMASK(smi->num_ports - 1, 0);
+++			mask = GENMASK((int)smi->num_ports - 1, 0);
++ 		else
++ 			/* For all other ports, enable itself plus the
++ 			 * CPU port.
+diff --git a/target/linux/generic/backport-5.4/757-v5.8-net-dsa-tag_rtl4_a-Implement-Realtek-4-byte-A-tag.patch b/target/linux/generic/backport-5.4/757-v5.8-net-dsa-tag_rtl4_a-Implement-Realtek-4-byte-A-tag.patch
+new file mode 100644
+index 0000000000..70d7000ba1
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/757-v5.8-net-dsa-tag_rtl4_a-Implement-Realtek-4-byte-A-tag.patch
+@@ -0,0 +1,232 @@
++From 078ced30af696b52a450a016a16eb47499d68117 Mon Sep 17 00:00:00 2001
++From: Linus Walleij <linus.walleij@linaro.org>
++Date: Wed, 8 Jul 2020 14:25:36 +0200
++Subject: [PATCH 2/5] net: dsa: tag_rtl4_a: Implement Realtek 4 byte A tag
++
++This implements the known parts of the Realtek 4 byte
++tag protocol version 0xA, as found in the RTL8366RB
++DSA switch.
++
++It is designated as protocol version 0xA as a
++different Realtek 4 byte tag format with protocol
++version 0x9 is known to exist in the Realtek RTL8306
++chips.
++
++The tag and switch chip lacks public documentation, so
++the tag format has been reverse-engineered from
++packet dumps. As only ingress traffic has been available
++for analysis an egress tag has not been possible to
++develop (even using educated guesses about bit fields)
++so this is as far as it gets. It is not known if the
++switch even supports egress tagging.
++
++Excessive attempts to figure out the egress tag format
++was made. When nothing else worked, I just tried all bit
++combinations with 0xannp where a is protocol and p is
++port. I looped through all values several times trying
++to get a response from ping, without any positive
++result.
++
++Using just these ingress tags however, the switch
++functionality is vastly improved and the packets find
++their way into the destination port without any
++tricky VLAN configuration. On the D-Link DIR-685 the
++LAN ports now come up and respond to ping without
++any command line configuration so this is a real
++improvement for users.
++
++Egress packets need to be restricted to the proper
++target ports using VLAN, which the RTL8366RB DSA
++switch driver already sets up.
++
++Cc: DENG Qingfang <dqfext@gmail.com>
++Cc: Mauri Sandberg <sandberg@mailfence.com>
++Reviewed-by: Andrew Lunn <andrew@lunn.ch>
++Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
++Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ include/net/dsa.h    |   2 +
++ net/dsa/Kconfig      |   7 +++
++ net/dsa/Makefile     |   1 +
++ net/dsa/tag_rtl4_a.c | 130 +++++++++++++++++++++++++++++++++++++++++++
++ 4 files changed, 140 insertions(+)
++ create mode 100644 net/dsa/tag_rtl4_a.c
++
++--- a/include/net/dsa.h
+++++ b/include/net/dsa.h
++@@ -42,6 +42,7 @@ struct phylink_link_state;
++ #define DSA_TAG_PROTO_8021Q_VALUE		12
++ #define DSA_TAG_PROTO_SJA1105_VALUE		13
++ #define DSA_TAG_PROTO_KSZ8795_VALUE		14
+++#define DSA_TAG_PROTO_RTL4_A_VALUE		17
++ 
++ enum dsa_tag_protocol {
++ 	DSA_TAG_PROTO_NONE		= DSA_TAG_PROTO_NONE_VALUE,
++@@ -59,6 +60,7 @@ enum dsa_tag_protocol {
++ 	DSA_TAG_PROTO_8021Q		= DSA_TAG_PROTO_8021Q_VALUE,
++ 	DSA_TAG_PROTO_SJA1105		= DSA_TAG_PROTO_SJA1105_VALUE,
++ 	DSA_TAG_PROTO_KSZ8795		= DSA_TAG_PROTO_KSZ8795_VALUE,
+++	DSA_TAG_PROTO_RTL4_A		= DSA_TAG_PROTO_RTL4_A_VALUE,
++ };
++ 
++ struct packet_type;
++--- a/net/dsa/Kconfig
+++++ b/net/dsa/Kconfig
++@@ -80,6 +80,13 @@ config NET_DSA_TAG_KSZ
++ 	  Say Y if you want to enable support for tagging frames for the
++ 	  Microchip 8795/9477/9893 families of switches.
++ 
+++config NET_DSA_TAG_RTL4_A
+++	tristate "Tag driver for Realtek 4 byte protocol A tags"
+++	help
+++	  Say Y or M if you want to enable support for tagging frames for the
+++	  Realtek switches with 4 byte protocol A tags, sich as found in
+++	  the Realtek RTL8366RB.
+++
++ config NET_DSA_TAG_QCA
++ 	tristate "Tag driver for Qualcomm Atheros QCA8K switches"
++ 	help
++--- a/net/dsa/Makefile
+++++ b/net/dsa/Makefile
++@@ -10,6 +10,7 @@ obj-$(CONFIG_NET_DSA_TAG_DSA) += tag_dsa
++ obj-$(CONFIG_NET_DSA_TAG_EDSA) += tag_edsa.o
++ obj-$(CONFIG_NET_DSA_TAG_GSWIP) += tag_gswip.o
++ obj-$(CONFIG_NET_DSA_TAG_KSZ) += tag_ksz.o
+++obj-$(CONFIG_NET_DSA_TAG_RTL4_A) += tag_rtl4_a.o
++ obj-$(CONFIG_NET_DSA_TAG_LAN9303) += tag_lan9303.o
++ obj-$(CONFIG_NET_DSA_TAG_MTK) += tag_mtk.o
++ obj-$(CONFIG_NET_DSA_TAG_QCA) += tag_qca.o
++--- /dev/null
+++++ b/net/dsa/tag_rtl4_a.c
++@@ -0,0 +1,130 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Handler for Realtek 4 byte DSA switch tags
+++ * Currently only supports protocol "A" found in RTL8366RB
+++ * Copyright (c) 2020 Linus Walleij <linus.walleij@linaro.org>
+++ *
+++ * This "proprietary tag" header looks like so:
+++ *
+++ * -------------------------------------------------
+++ * | MAC DA | MAC SA | 0x8899 | 2 bytes tag | Type |
+++ * -------------------------------------------------
+++ *
+++ * The 2 bytes tag form a 16 bit big endian word. The exact
+++ * meaning has been guessed from packet dumps from ingress
+++ * frames, as no working egress traffic has been available
+++ * we do not know the format of the egress tags or if they
+++ * are even supported.
+++ */
+++
+++#include <linux/etherdevice.h>
+++#include <linux/bits.h>
+++
+++#include "dsa_priv.h"
+++
+++#define RTL4_A_HDR_LEN		4
+++#define RTL4_A_ETHERTYPE	0x8899
+++#define RTL4_A_PROTOCOL_SHIFT	12
+++/*
+++ * 0x1 = Realtek Remote Control protocol (RRCP)
+++ * 0x2/0x3 seems to be used for loopback testing
+++ * 0x9 = RTL8306 DSA protocol
+++ * 0xa = RTL8366RB DSA protocol
+++ */
+++#define RTL4_A_PROTOCOL_RTL8366RB	0xa
+++
+++static struct sk_buff *rtl4a_tag_xmit(struct sk_buff *skb,
+++				      struct net_device *dev)
+++{
+++	/*
+++	 * Just let it pass thru, we don't know if it is possible
+++	 * to tag a frame with the 0x8899 ethertype and direct it
+++	 * to a specific port, all attempts at reverse-engineering have
+++	 * ended up with the frames getting dropped.
+++	 *
+++	 * The VLAN set-up needs to restrict the frames to the right port.
+++	 *
+++	 * If you have documentation on the tagging format for RTL8366RB
+++	 * (tag type A) then please contribute.
+++	 */
+++	return skb;
+++}
+++
+++static struct sk_buff *rtl4a_tag_rcv(struct sk_buff *skb,
+++				     struct net_device *dev,
+++				     struct packet_type *pt)
+++{
+++	u16 protport;
+++	__be16 *p;
+++	u16 etype;
+++	u8 *tag;
+++	u8 prot;
+++	u8 port;
+++
+++	if (unlikely(!pskb_may_pull(skb, RTL4_A_HDR_LEN)))
+++		return NULL;
+++
+++	/* The RTL4 header has its own custom Ethertype 0x8899 and that
+++	 * starts right at the beginning of the packet, after the src
+++	 * ethernet addr. Apparantly skb->data always points 2 bytes in,
+++	 * behind the Ethertype.
+++	 */
+++	tag = skb->data - 2;
+++	p = (__be16 *)tag;
+++	etype = ntohs(*p);
+++	if (etype != RTL4_A_ETHERTYPE) {
+++		/* Not custom, just pass through */
+++		netdev_dbg(dev, "non-realtek ethertype 0x%04x\n", etype);
+++		return skb;
+++	}
+++	p = (__be16 *)(tag + 2);
+++	protport = ntohs(*p);
+++	/* The 4 upper bits are the protocol */
+++	prot = (protport >> RTL4_A_PROTOCOL_SHIFT) & 0x0f;
+++	if (prot != RTL4_A_PROTOCOL_RTL8366RB) {
+++		netdev_err(dev, "unknown realtek protocol 0x%01x\n", prot);
+++		return NULL;
+++	}
+++	port = protport & 0xff;
+++
+++	skb->dev = dsa_master_find_slave(dev, 0, port);
+++	if (!skb->dev) {
+++		netdev_dbg(dev, "could not find slave for port %d\n", port);
+++		return NULL;
+++	}
+++
+++	/* Remove RTL4 tag and recalculate checksum */
+++	skb_pull_rcsum(skb, RTL4_A_HDR_LEN);
+++
+++	/* Move ethernet DA and SA in front of the data */
+++	memmove(skb->data - ETH_HLEN,
+++		skb->data - ETH_HLEN - RTL4_A_HDR_LEN,
+++		2 * ETH_ALEN);
+++
+++	skb->offload_fwd_mark = 1;
+++
+++	return skb;
+++}
+++
+++static int rtl4a_tag_flow_dissect(const struct sk_buff *skb, __be16 *proto,
+++				  int *offset)
+++{
+++	*offset = RTL4_A_HDR_LEN;
+++	/* Skip past the tag and fetch the encapsulated Ethertype */
+++	*proto = ((__be16 *)skb->data)[1];
+++
+++	return 0;
+++}
+++
+++static const struct dsa_device_ops rtl4a_netdev_ops = {
+++	.name	= "rtl4a",
+++	.proto	= DSA_TAG_PROTO_RTL4_A,
+++	.xmit	= rtl4a_tag_xmit,
+++	.rcv	= rtl4a_tag_rcv,
+++	.flow_dissect = rtl4a_tag_flow_dissect,
+++	.overhead = RTL4_A_HDR_LEN,
+++};
+++module_dsa_tag_driver(rtl4a_netdev_ops);
+++
+++MODULE_LICENSE("GPL");
+++MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_RTL4_A);
+diff --git a/target/linux/generic/backport-5.4/758-v5.8-net-dsa-rtl8366rb-Support-the-CPU-DSA-tag.patch b/target/linux/generic/backport-5.4/758-v5.8-net-dsa-rtl8366rb-Support-the-CPU-DSA-tag.patch
+new file mode 100644
+index 0000000000..b68c033bbe
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/758-v5.8-net-dsa-rtl8366rb-Support-the-CPU-DSA-tag.patch
+@@ -0,0 +1,100 @@
++From c633ba43b7a9c2bfdb992ffd198d4c661520466f Mon Sep 17 00:00:00 2001
++From: Linus Walleij <linus.walleij@linaro.org>
++Date: Wed, 8 Jul 2020 14:25:37 +0200
++Subject: [PATCH 3/5] net: dsa: rtl8366rb: Support the CPU DSA tag
++
++This activates the support to use the CPU tag to properly
++direct ingress traffic to the right port.
++
++Bit 15 in register RTL8368RB_CPU_CTRL_REG can be set to
++1 to disable the insertion of the CPU tag which is what
++the code currently does. The bit 15 define calls this
++setting RTL8368RB_CPU_INSTAG which is confusing since the
++inverse meaning is implied: programmers may think that
++setting this bit to 1 will *enable* inserting the tag
++rather than disabling it, so rename this setting in
++bit 15 to RTL8368RB_CPU_NO_TAG which is more to the
++point.
++
++After this e.g. ping works out-of-the-box with the
++RTL8366RB.
++
++Cc: DENG Qingfang <dqfext@gmail.com>
++Cc: Mauri Sandberg <sandberg@mailfence.com>
++Reviewed-by: Andrew Lunn <andrew@lunn.ch>
++Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
++Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ drivers/net/dsa/Kconfig     |  1 +
++ drivers/net/dsa/rtl8366rb.c | 31 ++++++++-----------------------
++ 2 files changed, 9 insertions(+), 23 deletions(-)
++
++--- a/drivers/net/dsa/Kconfig
+++++ b/drivers/net/dsa/Kconfig
++@@ -66,6 +66,7 @@ config NET_DSA_QCA8K
++ config NET_DSA_REALTEK_SMI
++ 	tristate "Realtek SMI Ethernet switch family support"
++ 	depends on NET_DSA
+++	select NET_DSA_TAG_RTL4_A
++ 	select FIXED_PHY
++ 	select IRQ_DOMAIN
++ 	select REALTEK_PHY
++--- a/drivers/net/dsa/rtl8366rb.c
+++++ b/drivers/net/dsa/rtl8366rb.c
++@@ -109,8 +109,8 @@
++ /* CPU port control reg */
++ #define RTL8368RB_CPU_CTRL_REG		0x0061
++ #define RTL8368RB_CPU_PORTS_MSK		0x00FF
++-/* Enables inserting custom tag length/type 0x8899 */
++-#define RTL8368RB_CPU_INSTAG		BIT(15)
+++/* Disables inserting custom tag length/type 0x8899 */
+++#define RTL8368RB_CPU_NO_TAG		BIT(15)
++ 
++ #define RTL8366RB_SMAR0			0x0070 /* bits 0..15 */
++ #define RTL8366RB_SMAR1			0x0071 /* bits 16..31 */
++@@ -844,16 +844,14 @@ static int rtl8366rb_setup(struct dsa_sw
++ 	if (ret)
++ 		return ret;
++ 
++-	/* Enable CPU port and enable inserting CPU tag
+++	/* Enable CPU port with custom DSA tag 8899.
++ 	 *
++-	 * Disabling RTL8368RB_CPU_INSTAG here will change the behaviour
++-	 * of the switch totally and it will start talking Realtek RRCP
++-	 * internally. It is probably possible to experiment with this,
++-	 * but then the kernel needs to understand and handle RRCP first.
+++	 * If you set RTL8368RB_CPU_NO_TAG (bit 15) in this registers
+++	 * the custom tag is turned off.
++ 	 */
++ 	ret = regmap_update_bits(smi->map, RTL8368RB_CPU_CTRL_REG,
++ 				 0xFFFF,
++-				 RTL8368RB_CPU_INSTAG | BIT(smi->cpu_port));
+++				 BIT(smi->cpu_port));
++ 	if (ret)
++ 		return ret;
++ 
++@@ -966,21 +964,8 @@ static int rtl8366rb_setup(struct dsa_sw
++ static enum dsa_tag_protocol rtl8366_get_tag_protocol(struct dsa_switch *ds,
++ 						      int port)
++ {
++-	/* For now, the RTL switches are handled without any custom tags.
++-	 *
++-	 * It is possible to turn on "custom tags" by removing the
++-	 * RTL8368RB_CPU_INSTAG flag when enabling the port but what it
++-	 * does is unfamiliar to DSA: ethernet frames of type 8899, the Realtek
++-	 * Remote Control Protocol (RRCP) start to appear on the CPU port of
++-	 * the device. So this is not the ordinary few extra bytes in the
++-	 * frame. Instead it appears that the switch starts to talk Realtek
++-	 * RRCP internally which means a pretty complex RRCP implementation
++-	 * decoding and responding the RRCP protocol is needed to exploit this.
++-	 *
++-	 * The OpenRRCP project (dormant since 2009) have reverse-egineered
++-	 * parts of the protocol.
++-	 */
++-	return DSA_TAG_PROTO_NONE;
+++	/* This switch uses the 4 byte protocol A Realtek DSA tag */
+++	return DSA_TAG_PROTO_RTL4_A;
++ }
++ 
++ static void rtl8366rb_adjust_link(struct dsa_switch *ds, int port,
+diff --git a/target/linux/generic/backport-5.4/760-net-ethernet-mediatek-Integrate-GDM-PSE-setup-operat.patch b/target/linux/generic/backport-5.4/760-net-ethernet-mediatek-Integrate-GDM-PSE-setup-operat.patch
+new file mode 100644
+index 0000000000..e352b0380e
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/760-net-ethernet-mediatek-Integrate-GDM-PSE-setup-operat.patch
+@@ -0,0 +1,80 @@
++From: MarkLee <Mark-MC.Lee@mediatek.com>
++Date: Wed, 13 Nov 2019 10:38:42 +0800
++Subject: [PATCH] net: ethernet: mediatek: Integrate GDM/PSE setup operations
++
++Integrate GDM/PSE setup operations into single function "mtk_gdm_config"
++
++Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++@@ -2232,6 +2232,28 @@ static int mtk_start_dma(struct mtk_eth
++ 	return 0;
++ }
++ 
+++static void mtk_gdm_config(struct mtk_eth *eth, u32 config)
+++{
+++	int i;
+++
+++	for (i = 0; i < MTK_MAC_COUNT; i++) {
+++		u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
+++
+++		/* default setup the forward port to send frame to PDMA */
+++		val &= ~0xffff;
+++
+++		/* Enable RX checksum */
+++		val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
+++
+++		val |= config;
+++
+++		mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
+++	}
+++	/* Reset and enable PSE */
+++	mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
+++	mtk_w32(eth, 0, MTK_RST_GL);
+++}
+++
++ static int mtk_open(struct net_device *dev)
++ {
++ 	struct mtk_mac *mac = netdev_priv(dev);
++@@ -2427,8 +2449,6 @@ static int mtk_hw_init(struct mtk_eth *e
++ 	mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
++ 	mtk_tx_irq_disable(eth, ~0);
++ 	mtk_rx_irq_disable(eth, ~0);
++-	mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
++-	mtk_w32(eth, 0, MTK_RST_GL);
++ 
++ 	/* FE int grouping */
++ 	mtk_w32(eth, MTK_TX_DONE_INT, MTK_PDMA_INT_GRP1);
++@@ -2437,18 +2457,7 @@ static int mtk_hw_init(struct mtk_eth *e
++ 	mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2);
++ 	mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
++ 
++-	for (i = 0; i < MTK_MAC_COUNT; i++) {
++-		u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
++-
++-		/* setup the forward port to send frame to PDMA */
++-		val &= ~0xffff;
++-
++-		/* Enable RX checksum */
++-		val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
++-
++-		/* setup the mac dma */
++-		mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
++-	}
+++	mtk_gdm_config(eth, MTK_GDMA_TO_PDMA);
++ 
++ 	return 0;
++ 
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++@@ -84,6 +84,7 @@
++ #define MTK_GDMA_ICS_EN		BIT(22)
++ #define MTK_GDMA_TCS_EN		BIT(21)
++ #define MTK_GDMA_UCS_EN		BIT(20)
+++#define MTK_GDMA_TO_PDMA	0x0
++ 
++ /* Unicast Filter MAC Address Register - Low */
++ #define MTK_GDMA_MAC_ADRL(x)	(0x508 + (x * 0x1000))
+diff --git a/target/linux/generic/backport-5.4/761-net-ethernet-mediatek-Refine-the-timing-of-GDM-PSE-s.patch b/target/linux/generic/backport-5.4/761-net-ethernet-mediatek-Refine-the-timing-of-GDM-PSE-s.patch
+new file mode 100644
+index 0000000000..d18d9f93eb
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/761-net-ethernet-mediatek-Refine-the-timing-of-GDM-PSE-s.patch
+@@ -0,0 +1,45 @@
++From: MarkLee <Mark-MC.Lee@mediatek.com>
++Date: Wed, 13 Nov 2019 10:38:43 +0800
++Subject: [PATCH] net: ethernet: mediatek: Refine the timing of GDM/PSE setup
++
++Refine the timing of GDM/PSE setup, move it from mtk_hw_init
++to mtk_open. This is recommended by the mt762x HW design to
++do GDM/PSE setup only after PDMA has been started.
++
++We exclude mt7628 in mtk_gdm_config function since it is a old IP
++and there is no GDM/PSE block on it.
++
++Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++@@ -2236,6 +2236,9 @@ static void mtk_gdm_config(struct mtk_et
++ {
++ 	int i;
++ 
+++	if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
+++		return;
+++
++ 	for (i = 0; i < MTK_MAC_COUNT; i++) {
++ 		u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
++ 
++@@ -2274,6 +2277,8 @@ static int mtk_open(struct net_device *d
++ 		if (err)
++ 			return err;
++ 
+++		mtk_gdm_config(eth, MTK_GDMA_TO_PDMA);
+++
++ 		napi_enable(&eth->tx_napi);
++ 		napi_enable(&eth->rx_napi);
++ 		mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
++@@ -2457,8 +2462,6 @@ static int mtk_hw_init(struct mtk_eth *e
++ 	mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2);
++ 	mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
++ 
++-	mtk_gdm_config(eth, MTK_GDMA_TO_PDMA);
++-
++ 	return 0;
++ 
++ err_disable_pm:
+diff --git a/target/linux/generic/backport-5.4/762-net-ethernet-mediatek-Enable-GDM-GDMA_DROP_ALL-mode.patch b/target/linux/generic/backport-5.4/762-net-ethernet-mediatek-Enable-GDM-GDMA_DROP_ALL-mode.patch
+new file mode 100644
+index 0000000000..e25f1211eb
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/762-net-ethernet-mediatek-Enable-GDM-GDMA_DROP_ALL-mode.patch
+@@ -0,0 +1,33 @@
++From: MarkLee <Mark-MC.Lee@mediatek.com>
++Date: Wed, 13 Nov 2019 10:38:44 +0800
++Subject: [PATCH] net: ethernet: mediatek: Enable GDM GDMA_DROP_ALL mode
++
++Enable GDM GDMA_DROP_ALL mode to drop all packet during the
++stop operation. This is recommended by the mt762x HW design
++to drop all packet from GMAC before stopping PDMA.
++
++Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++@@ -2331,6 +2331,8 @@ static int mtk_stop(struct net_device *d
++ 	if (!refcount_dec_and_test(&eth->dma_refcnt))
++ 		return 0;
++ 
+++	mtk_gdm_config(eth, MTK_GDMA_DROP_ALL);
+++
++ 	mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
++ 	mtk_rx_irq_disable(eth, MTK_RX_DONE_INT);
++ 	napi_disable(&eth->tx_napi);
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++@@ -85,6 +85,7 @@
++ #define MTK_GDMA_TCS_EN		BIT(21)
++ #define MTK_GDMA_UCS_EN		BIT(20)
++ #define MTK_GDMA_TO_PDMA	0x0
+++#define MTK_GDMA_DROP_ALL       0x7777
++ 
++ /* Unicast Filter MAC Address Register - Low */
++ #define MTK_GDMA_MAC_ADRL(x)	(0x508 + (x * 0x1000))
+diff --git a/target/linux/generic/backport-5.4/765-v5.12-net-dsa-automatically-bring-up-DSA-master-when-openi.patch b/target/linux/generic/backport-5.4/765-v5.12-net-dsa-automatically-bring-up-DSA-master-when-openi.patch
+new file mode 100644
+index 0000000000..7ec26899f9
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/765-v5.12-net-dsa-automatically-bring-up-DSA-master-when-openi.patch
+@@ -0,0 +1,85 @@
++From 9d5ef190e5615a7b63af89f88c4106a5bc127974 Mon Sep 17 00:00:00 2001
++From: Vladimir Oltean <vladimir.oltean@nxp.com>
++Date: Fri, 5 Feb 2021 15:37:10 +0200
++Subject: [PATCH] net: dsa: automatically bring up DSA master when opening user
++ port
++
++DSA wants the master interface to be open before the user port is due to
++historical reasons. The promiscuity of interfaces that are down used to
++have issues, as referenced Lennert Buytenhek in commit df02c6ff2e39
++("dsa: fix master interface allmulti/promisc handling").
++
++The bugfix mentioned there, commit b6c40d68ff64 ("net: only invoke
++dev->change_rx_flags when device is UP"), was basically a "don't do
++that" approach to working around the promiscuity while down issue.
++
++Further work done by Vlad Yasevich in commit d2615bf45069 ("net: core:
++Always propagate flag changes to interfaces") has resolved the
++underlying issue, and it is strictly up to the DSA and 8021q drivers
++now, it is no longer mandated by the networking core that the master
++interface must be up when changing its promiscuity.
++
++From DSA's point of view, deciding to error out in dsa_slave_open
++because the master isn't up is
++(a) a bad user experience and
++(b) knocking at an open door.
++Even if there still was an issue with promiscuity while down, DSA could
++still just open the master and avoid it.
++
++Doing it this way has the additional benefit that user space can now
++remove DSA-specific workarounds, like systemd-networkd with BindCarrier:
++https://github.com/systemd/systemd/issues/7478
++
++And we can finally remove one of the 2 bullets in the "Common pitfalls
++using DSA setups" chapter.
++
++Tested with two cascaded DSA switches:
++
++$ ip link set sw0p2 up
++fsl_enetc 0000:00:00.2 eno2: configuring for fixed/internal link mode
++fsl_enetc 0000:00:00.2 eno2: Link is Up - 1Gbps/Full - flow control rx/tx
++mscc_felix 0000:00:00.5 swp0: configuring for fixed/sgmii link mode
++mscc_felix 0000:00:00.5 swp0: Link is Up - 1Gbps/Full - flow control off
++8021q: adding VLAN 0 to HW filter on device swp0
++sja1105 spi2.0 sw0p2: configuring for phy/rgmii-id link mode
++IPv6: ADDRCONF(NETDEV_CHANGE): eno2: link becomes ready
++IPv6: ADDRCONF(NETDEV_CHANGE): swp0: link becomes ready
++
++Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
++Reviewed-by: Andrew Lunn <andrew@lunn.ch>
++Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
++Signed-off-by: Jakub Kicinski <kuba@kernel.org>
++---
++ Documentation/networking/dsa/dsa.rst | 4 ----
++ net/dsa/slave.c                      | 7 +++++--
++ 2 files changed, 5 insertions(+), 6 deletions(-)
++
++--- a/Documentation/networking/dsa/dsa.rst
+++++ b/Documentation/networking/dsa/dsa.rst
++@@ -273,10 +273,6 @@ will not make us go through the switch t
++ the Ethernet switch on the other end, expecting a tag will typically drop this
++ frame.
++ 
++-Slave network devices check that the master network device is UP before allowing
++-you to administratively bring UP these slave network devices. A common
++-configuration mistake is forgetting to bring UP the master network device first.
++-
++ Interactions with other subsystems
++ ==================================
++ 
++--- a/net/dsa/slave.c
+++++ b/net/dsa/slave.c
++@@ -70,8 +70,11 @@ static int dsa_slave_open(struct net_dev
++ 	struct dsa_port *dp = dsa_slave_to_port(dev);
++ 	int err;
++ 
++-	if (!(master->flags & IFF_UP))
++-		return -ENETDOWN;
+++	err = dev_open(master, NULL);
+++	if (err < 0) {
+++		netdev_err(dev, "failed to open master %s\n", master->name);
+++		goto out;
+++	}
++ 
++ 	if (!ether_addr_equal(dev->dev_addr, master->dev_addr)) {
++ 		err = dev_uc_add(master, dev->dev_addr);
+diff --git a/target/linux/generic/backport-5.4/770-v5.12-net-bridge-notify-switchdev-of-disappearance-of-old-.patch b/target/linux/generic/backport-5.4/770-v5.12-net-bridge-notify-switchdev-of-disappearance-of-old-.patch
+new file mode 100644
+index 0000000000..df4e74cd96
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/770-v5.12-net-bridge-notify-switchdev-of-disappearance-of-old-.patch
+@@ -0,0 +1,126 @@
++From 90dc8fd36078a536671adae884d0b929cce6480a Mon Sep 17 00:00:00 2001
++From: Vladimir Oltean <vladimir.oltean@nxp.com>
++Date: Wed, 6 Jan 2021 11:51:30 +0200
++Subject: [PATCH] net: bridge: notify switchdev of disappearance of old FDB
++ entry upon migration
++
++Currently the bridge emits atomic switchdev notifications for
++dynamically learnt FDB entries. Monitoring these notifications works
++wonders for switchdev drivers that want to keep their hardware FDB in
++sync with the bridge's FDB.
++
++For example station A wants to talk to station B in the diagram below,
++and we are concerned with the behavior of the bridge on the DUT device:
++
++                   DUT
++ +-------------------------------------+
++ |                 br0                 |
++ | +------+ +------+ +------+ +------+ |
++ | |      | |      | |      | |      | |
++ | | swp0 | | swp1 | | swp2 | | eth0 | |
++ +-------------------------------------+
++      |        |                  |
++  Station A    |                  |
++               |                  |
++         +--+------+--+    +--+------+--+
++         |  |      |  |    |  |      |  |
++         |  | swp0 |  |    |  | swp0 |  |
++ Another |  +------+  |    |  +------+  | Another
++  switch |     br0    |    |     br0    | switch
++         |  +------+  |    |  +------+  |
++         |  |      |  |    |  |      |  |
++         |  | swp1 |  |    |  | swp1 |  |
++         +--+------+--+    +--+------+--+
++                                  |
++                              Station B
++
++Interfaces swp0, swp1, swp2 are handled by a switchdev driver that has
++the following property: frames injected from its control interface bypass
++the internal address analyzer logic, and therefore, this hardware does
++not learn from the source address of packets transmitted by the network
++stack through it. So, since bridging between eth0 (where Station B is
++attached) and swp0 (where Station A is attached) is done in software,
++the switchdev hardware will never learn the source address of Station B.
++So the traffic towards that destination will be treated as unknown, i.e.
++flooded.
++
++This is where the bridge notifications come in handy. When br0 on the
++DUT sees frames with Station B's MAC address on eth0, the switchdev
++driver gets these notifications and can install a rule to send frames
++towards Station B's address that are incoming from swp0, swp1, swp2,
++only towards the control interface. This is all switchdev driver private
++business, which the notification makes possible.
++
++All is fine until someone unplugs Station B's cable and moves it to the
++other switch:
++
++                   DUT
++ +-------------------------------------+
++ |                 br0                 |
++ | +------+ +------+ +------+ +------+ |
++ | |      | |      | |      | |      | |
++ | | swp0 | | swp1 | | swp2 | | eth0 | |
++ +-------------------------------------+
++      |        |                  |
++  Station A    |                  |
++               |                  |
++         +--+------+--+    +--+------+--+
++         |  |      |  |    |  |      |  |
++         |  | swp0 |  |    |  | swp0 |  |
++ Another |  +------+  |    |  +------+  | Another
++  switch |     br0    |    |     br0    | switch
++         |  +------+  |    |  +------+  |
++         |  |      |  |    |  |      |  |
++         |  | swp1 |  |    |  | swp1 |  |
++         +--+------+--+    +--+------+--+
++               |
++           Station B
++
++Luckily for the use cases we care about, Station B is noisy enough that
++the DUT hears it (on swp1 this time). swp1 receives the frames and
++delivers them to the bridge, who enters the unlikely path in br_fdb_update
++of updating an existing entry. It moves the entry in the software bridge
++to swp1 and emits an addition notification towards that.
++
++As far as the switchdev driver is concerned, all that it needs to ensure
++is that traffic between Station A and Station B is not forever broken.
++If it does nothing, then the stale rule to send frames for Station B
++towards the control interface remains in place. But Station B is no
++longer reachable via the control interface, but via a port that can
++offload the bridge port learning attribute. It's just that the port is
++prevented from learning this address, since the rule overrides FDB
++updates. So the rule needs to go. The question is via what mechanism.
++
++It sure would be possible for this switchdev driver to keep track of all
++addresses which are sent to the control interface, and then also listen
++for bridge notifier events on its own ports, searching for the ones that
++have a MAC address which was previously sent to the control interface.
++But this is cumbersome and inefficient. Instead, with one small change,
++the bridge could notify of the address deletion from the old port, in a
++symmetrical manner with how it did for the insertion. Then the switchdev
++driver would not be required to monitor learn/forget events for its own
++ports. It could just delete the rule towards the control interface upon
++bridge entry migration. This would make hardware address learning be
++possible again. Then it would take a few more packets until the hardware
++and software FDB would be in sync again.
++
++Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
++Acked-by: Nikolay Aleksandrov <nikolay@nvidia.com>
++Reviewed-by: Ido Schimmel <idosch@nvidia.com>
++Reviewed-by: Andrew Lunn <andrew@lunn.ch>
++Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
++Signed-off-by: Jakub Kicinski <kuba@kernel.org>
++---
++ net/bridge/br_fdb.c | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/net/bridge/br_fdb.c
+++++ b/net/bridge/br_fdb.c
++@@ -581,6 +581,7 @@ void br_fdb_update(struct net_bridge *br
++ 
++ 			/* fastpath: update of existing entry */
++ 			if (unlikely(source != fdb->dst && !fdb->is_sticky)) {
+++				br_switchdev_fdb_notify(fdb, RTM_DELNEIGH);
++ 				fdb->dst = source;
++ 				fdb_modified = true;
++ 				/* Take over HW learned entry */
+diff --git a/target/linux/generic/backport-5.4/771-v5.12-net-dsa-be-louder-when-a-non-legacy-FDB-operation-fa.patch b/target/linux/generic/backport-5.4/771-v5.12-net-dsa-be-louder-when-a-non-legacy-FDB-operation-fa.patch
+new file mode 100644
+index 0000000000..893eb719ca
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/771-v5.12-net-dsa-be-louder-when-a-non-legacy-FDB-operation-fa.patch
+@@ -0,0 +1,52 @@
++From 2fd186501b1cff155cc4a755c210793cfc0dffb5 Mon Sep 17 00:00:00 2001
++From: Vladimir Oltean <vladimir.oltean@nxp.com>
++Date: Wed, 6 Jan 2021 11:51:31 +0200
++Subject: [PATCH] net: dsa: be louder when a non-legacy FDB operation fails
++
++The dev_close() call was added in commit c9eb3e0f8701 ("net: dsa: Add
++support for learning FDB through notification") "to indicate inconsistent
++situation" when we could not delete an FDB entry from the port.
++
++bridge fdb del d8:58:d7:00:ca:6d dev swp0 self master
++
++It is a bit drastic and at the same time not helpful if the above fails
++to only print with netdev_dbg log level, but on the other hand to bring
++the interface down.
++
++So increase the verbosity of the error message, and drop dev_close().
++
++Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
++Reviewed-by: Andrew Lunn <andrew@lunn.ch>
++Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
++Signed-off-by: Jakub Kicinski <kuba@kernel.org>
++---
++ net/dsa/slave.c | 10 +++++++---
++ 1 file changed, 7 insertions(+), 3 deletions(-)
++
++--- a/net/dsa/slave.c
+++++ b/net/dsa/slave.c
++@@ -1593,7 +1593,9 @@ static void dsa_slave_switchdev_event_wo
++ 
++ 		err = dsa_port_fdb_add(dp, fdb_info->addr, fdb_info->vid);
++ 		if (err) {
++-			netdev_dbg(dev, "fdb add failed err=%d\n", err);
+++			netdev_err(dev,
+++				   "failed to add %pM vid %d to fdb: %d\n",
+++				   fdb_info->addr, fdb_info->vid, err);
++ 			break;
++ 		}
++ 		fdb_info->offloaded = true;
++@@ -1608,9 +1610,11 @@ static void dsa_slave_switchdev_event_wo
++ 
++ 		err = dsa_port_fdb_del(dp, fdb_info->addr, fdb_info->vid);
++ 		if (err) {
++-			netdev_dbg(dev, "fdb del failed err=%d\n", err);
++-			dev_close(dev);
+++			netdev_err(dev,
+++				   "failed to delete %pM vid %d from fdb: %d\n",
+++				   fdb_info->addr, fdb_info->vid, err);
++ 		}
+++
++ 		break;
++ 	}
++ 	rtnl_unlock();
+diff --git a/target/linux/generic/backport-5.4/772-v5.12-net-dsa-don-t-use-switchdev_notifier_fdb_info-in-dsa.patch b/target/linux/generic/backport-5.4/772-v5.12-net-dsa-don-t-use-switchdev_notifier_fdb_info-in-dsa.patch
+new file mode 100644
+index 0000000000..275870d19f
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/772-v5.12-net-dsa-don-t-use-switchdev_notifier_fdb_info-in-dsa.patch
+@@ -0,0 +1,226 @@
++From c4bb76a9a0ef87c4cc1f636defed5f12deb9f5a7 Mon Sep 17 00:00:00 2001
++From: Vladimir Oltean <vladimir.oltean@nxp.com>
++Date: Wed, 6 Jan 2021 11:51:32 +0200
++Subject: [PATCH] net: dsa: don't use switchdev_notifier_fdb_info in
++ dsa_switchdev_event_work
++
++Currently DSA doesn't add FDB entries on the CPU port, because it only
++does so through switchdev, which is associated with a net_device, and
++there are none of those for the CPU port.
++
++But actually FDB addresses on the CPU port have some use cases of their
++own, if the switchdev operations are initiated from within the DSA
++layer. There is just one problem with the existing code: it passes a
++structure in dsa_switchdev_event_work which was retrieved directly from
++switchdev, so it contains a net_device. We need to generalize the
++contents to something that covers the CPU port as well: the "ds, port"
++tuple is fine for that.
++
++Note that the new procedure for notifying the successful FDB offload is
++inspired from the rocker model.
++
++Also, nothing was being done if added_by_user was false. Let's check for
++that a lot earlier, and don't actually bother to schedule the worker
++for nothing.
++
++Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
++Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
++Signed-off-by: Jakub Kicinski <kuba@kernel.org>
++---
++ net/dsa/dsa_priv.h |  12 +++++
++ net/dsa/slave.c    | 106 ++++++++++++++++++++++-----------------------
++ 2 files changed, 65 insertions(+), 53 deletions(-)
++
++--- a/net/dsa/dsa_priv.h
+++++ b/net/dsa/dsa_priv.h
++@@ -62,6 +62,18 @@ struct dsa_notifier_vlan_info {
++ 	int port;
++ };
++ 
+++struct dsa_switchdev_event_work {
+++	struct dsa_switch *ds;
+++	int port;
+++	struct work_struct work;
+++	unsigned long event;
+++	/* Specific for SWITCHDEV_FDB_ADD_TO_DEVICE and
+++	 * SWITCHDEV_FDB_DEL_TO_DEVICE
+++	 */
+++	unsigned char addr[ETH_ALEN];
+++	u16 vid;
+++};
+++
++ struct dsa_slave_priv {
++ 	/* Copy of CPU port xmit for faster access in slave transmit hot path */
++ 	struct sk_buff *	(*xmit)(struct sk_buff *skb,
++--- a/net/dsa/slave.c
+++++ b/net/dsa/slave.c
++@@ -1568,76 +1568,66 @@ static int dsa_slave_netdevice_event(str
++ 	return NOTIFY_DONE;
++ }
++ 
++-struct dsa_switchdev_event_work {
++-	struct work_struct work;
++-	struct switchdev_notifier_fdb_info fdb_info;
++-	struct net_device *dev;
++-	unsigned long event;
++-};
+++static void
+++dsa_fdb_offload_notify(struct dsa_switchdev_event_work *switchdev_work)
+++{
+++	struct dsa_switch *ds = switchdev_work->ds;
+++	struct switchdev_notifier_fdb_info info;
+++	struct dsa_port *dp;
+++
+++	if (!dsa_is_user_port(ds, switchdev_work->port))
+++		return;
+++
+++	info.addr = switchdev_work->addr;
+++	info.vid = switchdev_work->vid;
+++	info.offloaded = true;
+++	dp = dsa_to_port(ds, switchdev_work->port);
+++	call_switchdev_notifiers(SWITCHDEV_FDB_OFFLOADED,
+++				 dp->slave, &info.info, NULL);
+++}
++ 
++ static void dsa_slave_switchdev_event_work(struct work_struct *work)
++ {
++ 	struct dsa_switchdev_event_work *switchdev_work =
++ 		container_of(work, struct dsa_switchdev_event_work, work);
++-	struct net_device *dev = switchdev_work->dev;
++-	struct switchdev_notifier_fdb_info *fdb_info;
++-	struct dsa_port *dp = dsa_slave_to_port(dev);
+++	struct dsa_switch *ds = switchdev_work->ds;
+++	struct dsa_port *dp;
++ 	int err;
++ 
+++	dp = dsa_to_port(ds, switchdev_work->port);
+++
++ 	rtnl_lock();
++ 	switch (switchdev_work->event) {
++ 	case SWITCHDEV_FDB_ADD_TO_DEVICE:
++-		fdb_info = &switchdev_work->fdb_info;
++-		if (!fdb_info->added_by_user)
++-			break;
++-
++-		err = dsa_port_fdb_add(dp, fdb_info->addr, fdb_info->vid);
+++		err = dsa_port_fdb_add(dp, switchdev_work->addr,
+++				       switchdev_work->vid);
++ 		if (err) {
++-			netdev_err(dev,
++-				   "failed to add %pM vid %d to fdb: %d\n",
++-				   fdb_info->addr, fdb_info->vid, err);
+++			dev_err(ds->dev,
+++				"port %d failed to add %pM vid %d to fdb: %d\n",
+++				dp->index, switchdev_work->addr,
+++				switchdev_work->vid, err);
++ 			break;
++ 		}
++-		fdb_info->offloaded = true;
++-		call_switchdev_notifiers(SWITCHDEV_FDB_OFFLOADED, dev,
++-					 &fdb_info->info, NULL);
+++		dsa_fdb_offload_notify(switchdev_work);
++ 		break;
++ 
++ 	case SWITCHDEV_FDB_DEL_TO_DEVICE:
++-		fdb_info = &switchdev_work->fdb_info;
++-		if (!fdb_info->added_by_user)
++-			break;
++-
++-		err = dsa_port_fdb_del(dp, fdb_info->addr, fdb_info->vid);
+++		err = dsa_port_fdb_del(dp, switchdev_work->addr,
+++				       switchdev_work->vid);
++ 		if (err) {
++-			netdev_err(dev,
++-				   "failed to delete %pM vid %d from fdb: %d\n",
++-				   fdb_info->addr, fdb_info->vid, err);
+++			dev_err(ds->dev,
+++				"port %d failed to delete %pM vid %d from fdb: %d\n",
+++				dp->index, switchdev_work->addr,
+++				switchdev_work->vid, err);
++ 		}
++ 
++ 		break;
++ 	}
++ 	rtnl_unlock();
++ 
++-	kfree(switchdev_work->fdb_info.addr);
++ 	kfree(switchdev_work);
++-	dev_put(dev);
++-}
++-
++-static int
++-dsa_slave_switchdev_fdb_work_init(struct dsa_switchdev_event_work *
++-				  switchdev_work,
++-				  const struct switchdev_notifier_fdb_info *
++-				  fdb_info)
++-{
++-	memcpy(&switchdev_work->fdb_info, fdb_info,
++-	       sizeof(switchdev_work->fdb_info));
++-	switchdev_work->fdb_info.addr = kzalloc(ETH_ALEN, GFP_ATOMIC);
++-	if (!switchdev_work->fdb_info.addr)
++-		return -ENOMEM;
++-	ether_addr_copy((u8 *)switchdev_work->fdb_info.addr,
++-			fdb_info->addr);
++-	return 0;
+++	if (dsa_is_user_port(ds, dp->index))
+++		dev_put(dp->slave);
++ }
++ 
++ /* Called under rcu_read_lock() */
++@@ -1645,7 +1635,9 @@ static int dsa_slave_switchdev_event(str
++ 				     unsigned long event, void *ptr)
++ {
++ 	struct net_device *dev = switchdev_notifier_info_to_dev(ptr);
+++	const struct switchdev_notifier_fdb_info *fdb_info;
++ 	struct dsa_switchdev_event_work *switchdev_work;
+++	struct dsa_port *dp;
++ 	int err;
++ 
++ 	if (event == SWITCHDEV_PORT_ATTR_SET) {
++@@ -1658,20 +1650,32 @@ static int dsa_slave_switchdev_event(str
++ 	if (!dsa_slave_dev_check(dev))
++ 		return NOTIFY_DONE;
++ 
+++	dp = dsa_slave_to_port(dev);
+++
++ 	switchdev_work = kzalloc(sizeof(*switchdev_work), GFP_ATOMIC);
++ 	if (!switchdev_work)
++ 		return NOTIFY_BAD;
++ 
++ 	INIT_WORK(&switchdev_work->work,
++ 		  dsa_slave_switchdev_event_work);
++-	switchdev_work->dev = dev;
+++	switchdev_work->ds = dp->ds;
+++	switchdev_work->port = dp->index;
++ 	switchdev_work->event = event;
++ 
++ 	switch (event) {
++ 	case SWITCHDEV_FDB_ADD_TO_DEVICE: /* fall through */
++ 	case SWITCHDEV_FDB_DEL_TO_DEVICE:
++-		if (dsa_slave_switchdev_fdb_work_init(switchdev_work, ptr))
++-			goto err_fdb_work_init;
+++		fdb_info = ptr;
+++
+++		if (!fdb_info->added_by_user) {
+++			kfree(switchdev_work);
+++			return NOTIFY_OK;
+++		}
+++
+++		ether_addr_copy(switchdev_work->addr,
+++				fdb_info->addr);
+++		switchdev_work->vid = fdb_info->vid;
+++
++ 		dev_hold(dev);
++ 		break;
++ 	default:
++@@ -1681,10 +1685,6 @@ static int dsa_slave_switchdev_event(str
++ 
++ 	dsa_schedule_work(&switchdev_work->work);
++ 	return NOTIFY_OK;
++-
++-err_fdb_work_init:
++-	kfree(switchdev_work);
++-	return NOTIFY_BAD;
++ }
++ 
++ static int dsa_slave_switchdev_blocking_event(struct notifier_block *unused,
+diff --git a/target/linux/generic/backport-5.4/773-v5.12-net-dsa-move-switchdev-event-implementation-under-th.patch b/target/linux/generic/backport-5.4/773-v5.12-net-dsa-move-switchdev-event-implementation-under-th.patch
+new file mode 100644
+index 0000000000..b70986fcc1
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/773-v5.12-net-dsa-move-switchdev-event-implementation-under-th.patch
+@@ -0,0 +1,85 @@
++From 447d290a58bd335d68f665713842365d3d6447df Mon Sep 17 00:00:00 2001
++From: Vladimir Oltean <vladimir.oltean@nxp.com>
++Date: Wed, 6 Jan 2021 11:51:33 +0200
++Subject: [PATCH] net: dsa: move switchdev event implementation under the same
++ switch/case statement
++
++We'll need to start listening to SWITCHDEV_FDB_{ADD,DEL}_TO_DEVICE
++events even for interfaces where dsa_slave_dev_check returns false, so
++we need that check inside the switch-case statement for SWITCHDEV_FDB_*.
++
++This movement also avoids a useless allocation / free of switchdev_work
++on the untreated "default event" case.
++
++Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
++Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
++Signed-off-by: Jakub Kicinski <kuba@kernel.org>
++---
++ net/dsa/slave.c | 35 ++++++++++++++++-------------------
++ 1 file changed, 16 insertions(+), 19 deletions(-)
++
++--- a/net/dsa/slave.c
+++++ b/net/dsa/slave.c
++@@ -1640,31 +1640,29 @@ static int dsa_slave_switchdev_event(str
++ 	struct dsa_port *dp;
++ 	int err;
++ 
++-	if (event == SWITCHDEV_PORT_ATTR_SET) {
+++	switch (event) {
+++	case SWITCHDEV_PORT_ATTR_SET:
++ 		err = switchdev_handle_port_attr_set(dev, ptr,
++ 						     dsa_slave_dev_check,
++ 						     dsa_slave_port_attr_set);
++ 		return notifier_from_errno(err);
++-	}
++-
++-	if (!dsa_slave_dev_check(dev))
++-		return NOTIFY_DONE;
+++	case SWITCHDEV_FDB_ADD_TO_DEVICE:
+++	case SWITCHDEV_FDB_DEL_TO_DEVICE:
+++		if (!dsa_slave_dev_check(dev))
+++			return NOTIFY_DONE;
++ 
++-	dp = dsa_slave_to_port(dev);
+++		dp = dsa_slave_to_port(dev);
++ 
++-	switchdev_work = kzalloc(sizeof(*switchdev_work), GFP_ATOMIC);
++-	if (!switchdev_work)
++-		return NOTIFY_BAD;
++-
++-	INIT_WORK(&switchdev_work->work,
++-		  dsa_slave_switchdev_event_work);
++-	switchdev_work->ds = dp->ds;
++-	switchdev_work->port = dp->index;
++-	switchdev_work->event = event;
+++		switchdev_work = kzalloc(sizeof(*switchdev_work), GFP_ATOMIC);
+++		if (!switchdev_work)
+++			return NOTIFY_BAD;
+++
+++		INIT_WORK(&switchdev_work->work,
+++			  dsa_slave_switchdev_event_work);
+++		switchdev_work->ds = dp->ds;
+++		switchdev_work->port = dp->index;
+++		switchdev_work->event = event;
++ 
++-	switch (event) {
++-	case SWITCHDEV_FDB_ADD_TO_DEVICE: /* fall through */
++-	case SWITCHDEV_FDB_DEL_TO_DEVICE:
++ 		fdb_info = ptr;
++ 
++ 		if (!fdb_info->added_by_user) {
++@@ -1677,13 +1675,12 @@ static int dsa_slave_switchdev_event(str
++ 		switchdev_work->vid = fdb_info->vid;
++ 
++ 		dev_hold(dev);
+++		dsa_schedule_work(&switchdev_work->work);
++ 		break;
++ 	default:
++-		kfree(switchdev_work);
++ 		return NOTIFY_DONE;
++ 	}
++ 
++-	dsa_schedule_work(&switchdev_work->work);
++ 	return NOTIFY_OK;
++ }
++ 
+diff --git a/target/linux/generic/backport-5.4/774-v5.12-net-dsa-exit-early-in-dsa_slave_switchdev_event-if-w.patch b/target/linux/generic/backport-5.4/774-v5.12-net-dsa-exit-early-in-dsa_slave_switchdev_event-if-w.patch
+new file mode 100644
+index 0000000000..c7ed4064e8
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/774-v5.12-net-dsa-exit-early-in-dsa_slave_switchdev_event-if-w.patch
+@@ -0,0 +1,42 @@
++From 5fb4a451a87d8ed3363d28b63a3295399373d6c4 Mon Sep 17 00:00:00 2001
++From: Vladimir Oltean <vladimir.oltean@nxp.com>
++Date: Wed, 6 Jan 2021 11:51:34 +0200
++Subject: [PATCH] net: dsa: exit early in dsa_slave_switchdev_event if we can't
++ program the FDB
++
++Right now, the following would happen for a switch driver that does not
++implement .port_fdb_add or .port_fdb_del.
++
++dsa_slave_switchdev_event returns NOTIFY_OK and schedules:
++-> dsa_slave_switchdev_event_work
++   -> dsa_port_fdb_add
++      -> dsa_port_notify(DSA_NOTIFIER_FDB_ADD)
++         -> dsa_switch_fdb_add
++            -> if (!ds->ops->port_fdb_add) return -EOPNOTSUPP;
++   -> an error is printed with dev_dbg, and
++      dsa_fdb_offload_notify(switchdev_work) is not called.
++
++We can avoid scheduling the worker for nothing and say NOTIFY_DONE.
++Because we don't call dsa_fdb_offload_notify, the static FDB entry will
++remain just in the software bridge.
++
++Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
++Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
++Reviewed-by: Andrew Lunn <andrew@lunn.ch>
++Signed-off-by: Jakub Kicinski <kuba@kernel.org>
++---
++ net/dsa/slave.c | 3 +++
++ 1 file changed, 3 insertions(+)
++
++--- a/net/dsa/slave.c
+++++ b/net/dsa/slave.c
++@@ -1653,6 +1653,9 @@ static int dsa_slave_switchdev_event(str
++ 
++ 		dp = dsa_slave_to_port(dev);
++ 
+++		if (!dp->ds->ops->port_fdb_add || !dp->ds->ops->port_fdb_del)
+++			return NOTIFY_DONE;
+++
++ 		switchdev_work = kzalloc(sizeof(*switchdev_work), GFP_ATOMIC);
++ 		if (!switchdev_work)
++ 			return NOTIFY_BAD;
+diff --git a/target/linux/generic/backport-5.4/775-v5.12-net-dsa-listen-for-SWITCHDEV_-FDB-DEL-_ADD_TO_DEVICE.patch b/target/linux/generic/backport-5.4/775-v5.12-net-dsa-listen-for-SWITCHDEV_-FDB-DEL-_ADD_TO_DEVICE.patch
+new file mode 100644
+index 0000000000..e4ed6e808f
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/775-v5.12-net-dsa-listen-for-SWITCHDEV_-FDB-DEL-_ADD_TO_DEVICE.patch
+@@ -0,0 +1,263 @@
++From d5f19486cee79d04c054427577ac96ed123706db Mon Sep 17 00:00:00 2001
++From: Vladimir Oltean <vladimir.oltean@nxp.com>
++Date: Wed, 6 Jan 2021 11:51:35 +0200
++Subject: [PATCH] net: dsa: listen for SWITCHDEV_{FDB,DEL}_ADD_TO_DEVICE on
++ foreign bridge neighbors
++
++Some DSA switches (and not only) cannot learn source MAC addresses from
++packets injected from the CPU. They only perform hardware address
++learning from inbound traffic.
++
++This can be problematic when we have a bridge spanning some DSA switch
++ports and some non-DSA ports (which we'll call "foreign interfaces" from
++DSA's perspective).
++
++There are 2 classes of problems created by the lack of learning on
++CPU-injected traffic:
++- excessive flooding, due to the fact that DSA treats those addresses as
++  unknown
++- the risk of stale routes, which can lead to temporary packet loss
++
++To illustrate the second class, consider the following situation, which
++is common in production equipment (wireless access points, where there
++is a WLAN interface and an Ethernet switch, and these form a single
++bridging domain).
++
++ AP 1:
++ +------------------------------------------------------------------------+
++ |                                          br0                           |
++ +------------------------------------------------------------------------+
++ +------------+ +------------+ +------------+ +------------+ +------------+
++ |    swp0    | |    swp1    | |    swp2    | |    swp3    | |    wlan0   |
++ +------------+ +------------+ +------------+ +------------+ +------------+
++       |                                                       ^        ^
++       |                                                       |        |
++       |                                                       |        |
++       |                                                    Client A  Client B
++       |
++       |
++       |
++ +------------+ +------------+ +------------+ +------------+ +------------+
++ |    swp0    | |    swp1    | |    swp2    | |    swp3    | |    wlan0   |
++ +------------+ +------------+ +------------+ +------------+ +------------+
++ +------------------------------------------------------------------------+
++ |                                          br0                           |
++ +------------------------------------------------------------------------+
++ AP 2
++
++- br0 of AP 1 will know that Clients A and B are reachable via wlan0
++- the hardware fdb of a DSA switch driver today is not kept in sync with
++  the software entries on other bridge ports, so it will not know that
++  clients A and B are reachable via the CPU port UNLESS the hardware
++  switch itself performs SA learning from traffic injected from the CPU.
++  Nonetheless, a substantial number of switches don't.
++- the hardware fdb of the DSA switch on AP 2 may autonomously learn that
++  Client A and B are reachable through swp0. Therefore, the software br0
++  of AP 2 also may or may not learn this. In the example we're
++  illustrating, some Ethernet traffic has been going on, and br0 from AP
++  2 has indeed learnt that it can reach Client B through swp0.
++
++One of the wireless clients, say Client B, disconnects from AP 1 and
++roams to AP 2. The topology now looks like this:
++
++ AP 1:
++ +------------------------------------------------------------------------+
++ |                                          br0                           |
++ +------------------------------------------------------------------------+
++ +------------+ +------------+ +------------+ +------------+ +------------+
++ |    swp0    | |    swp1    | |    swp2    | |    swp3    | |    wlan0   |
++ +------------+ +------------+ +------------+ +------------+ +------------+
++       |                                                            ^
++       |                                                            |
++       |                                                         Client A
++       |
++       |
++       |                                                         Client B
++       |                                                            |
++       |                                                            v
++ +------------+ +------------+ +------------+ +------------+ +------------+
++ |    swp0    | |    swp1    | |    swp2    | |    swp3    | |    wlan0   |
++ +------------+ +------------+ +------------+ +------------+ +------------+
++ +------------------------------------------------------------------------+
++ |                                          br0                           |
++ +------------------------------------------------------------------------+
++ AP 2
++
++- br0 of AP 1 still knows that Client A is reachable via wlan0 (no change)
++- br0 of AP 1 will (possibly) know that Client B has left wlan0. There
++  are cases where it might never find out though. Either way, DSA today
++  does not process that notification in any way.
++- the hardware FDB of the DSA switch on AP 1 may learn autonomously that
++  Client B can be reached via swp0, if it receives any packet with
++  Client 1's source MAC address over Ethernet.
++- the hardware FDB of the DSA switch on AP 2 still thinks that Client B
++  can be reached via swp0. It does not know that it has roamed to wlan0,
++  because it doesn't perform SA learning from the CPU port.
++
++Now Client A contacts Client B.
++AP 1 routes the packet fine towards swp0 and delivers it on the Ethernet
++segment.
++AP 2 sees a frame on swp0 and its fdb says that the destination is swp0.
++Hairpinning is disabled => drop.
++
++This problem comes from the fact that these switches have a 'blind spot'
++for addresses coming from software bridging. The generic solution is not
++to assume that hardware learning can be enabled somehow, but to listen
++to more bridge learning events. It turns out that the bridge driver does
++learn in software from all inbound frames, in __br_handle_local_finish.
++A proper SWITCHDEV_FDB_ADD_TO_DEVICE notification is emitted for the
++addresses serviced by the bridge on 'foreign' interfaces. The software
++bridge also does the right thing on migration, by notifying that the old
++entry is deleted, so that does not need to be special-cased in DSA. When
++it is deleted, we just need to delete our static FDB entry towards the
++CPU too, and wait.
++
++The problem is that DSA currently only cares about SWITCHDEV_FDB_ADD_TO_DEVICE
++events received on its own interfaces, such as static FDB entries.
++
++Luckily we can change that, and DSA can listen to all switchdev FDB
++add/del events in the system and figure out if those events were emitted
++by a bridge that spans at least one of DSA's own ports. In case that is
++true, DSA will also offload that address towards its own CPU port, in
++the eventuality that there might be bridge clients attached to the DSA
++switch who want to talk to the station connected to the foreign
++interface.
++
++In terms of implementation, we need to keep the fdb_info->added_by_user
++check for the case where the switchdev event was targeted directly at a
++DSA switch port. But we don't need to look at that flag for snooped
++events. So the check is currently too late, we need to move it earlier.
++This also simplifies the code a bit, since we avoid uselessly allocating
++and freeing switchdev_work.
++
++We could probably do some improvements in the future. For example,
++multi-bridge support is rudimentary at the moment. If there are two
++bridges spanning a DSA switch's ports, and both of them need to service
++the same MAC address, then what will happen is that the migration of one
++of those stations will trigger the deletion of the FDB entry from the
++CPU port while it is still used by other bridge. That could be improved
++with reference counting but is left for another time.
++
++This behavior needs to be enabled at driver level by setting
++ds->assisted_learning_on_cpu_port = true. This is because we don't want
++to inflict a potential performance penalty (accesses through
++MDIO/I2C/SPI are expensive) to hardware that really doesn't need it
++because address learning on the CPU port works there.
++
++Reported-by: DENG Qingfang <dqfext@gmail.com>
++Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
++Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
++Reviewed-by: Andrew Lunn <andrew@lunn.ch>
++Signed-off-by: Jakub Kicinski <kuba@kernel.org>
++[Backported to linux-5.4.y]
++Signed-off-by: DENG Qingfang <dqfext@gmail.com>
++---
++ include/net/dsa.h |  5 ++++
++ net/dsa/slave.c   | 63 ++++++++++++++++++++++++++++++++++++++---------
++ 2 files changed, 57 insertions(+), 11 deletions(-)
++
++--- a/include/net/dsa.h
+++++ b/include/net/dsa.h
++@@ -279,6 +279,11 @@ struct dsa_switch {
++ 	 */
++ 	bool			configure_vlan_while_not_filtering;
++ 
+++	/* Let DSA manage the FDB entries towards the CPU, based on the
+++	 * software bridge database.
+++	 */
+++	bool			assisted_learning_on_cpu_port;
+++
++ 	/* In case vlan_filtering_is_global is set, the VLAN awareness state
++ 	 * should be retrieved from here and not from the per-port settings.
++ 	 */
++--- a/net/dsa/slave.c
+++++ b/net/dsa/slave.c
++@@ -1630,6 +1630,25 @@ static void dsa_slave_switchdev_event_wo
++ 		dev_put(dp->slave);
++ }
++ 
+++static int dsa_lower_dev_walk(struct net_device *lower_dev, void *data)
+++{
+++	if (dsa_slave_dev_check(lower_dev)) {
+++		*((void **)data) = (void *)netdev_priv(lower_dev);
+++		return 1;
+++	}
+++
+++	return 0;
+++}
+++
+++static struct dsa_slave_priv *dsa_slave_dev_lower_find(struct net_device *dev)
+++{
+++	struct dsa_slave_priv *data = NULL;
+++
+++	netdev_walk_all_lower_dev_rcu(dev, dsa_lower_dev_walk, (void **) &data);
+++
+++	return data;
+++}
+++
++ /* Called under rcu_read_lock() */
++ static int dsa_slave_switchdev_event(struct notifier_block *unused,
++ 				     unsigned long event, void *ptr)
++@@ -1648,10 +1667,37 @@ static int dsa_slave_switchdev_event(str
++ 		return notifier_from_errno(err);
++ 	case SWITCHDEV_FDB_ADD_TO_DEVICE:
++ 	case SWITCHDEV_FDB_DEL_TO_DEVICE:
++-		if (!dsa_slave_dev_check(dev))
++-			return NOTIFY_DONE;
+++		fdb_info = ptr;
+++
+++		if (dsa_slave_dev_check(dev)) {
+++			if (!fdb_info->added_by_user)
+++				return NOTIFY_OK;
+++
+++			dp = dsa_slave_to_port(dev);
+++		} else {
+++			/* Snoop addresses learnt on foreign interfaces
+++			 * bridged with us, for switches that don't
+++			 * automatically learn SA from CPU-injected traffic
+++			 */
+++			struct net_device *br_dev;
+++			struct dsa_slave_priv *p;
+++
+++			br_dev = netdev_master_upper_dev_get_rcu(dev);
+++			if (!br_dev)
+++				return NOTIFY_DONE;
+++
+++			if (!netif_is_bridge_master(br_dev))
+++				return NOTIFY_DONE;
+++
+++			p = dsa_slave_dev_lower_find(br_dev);
+++			if (!p)
+++				return NOTIFY_DONE;
++ 
++-		dp = dsa_slave_to_port(dev);
+++			dp = p->dp->cpu_dp;
+++
+++			if (!dp->ds->assisted_learning_on_cpu_port)
+++				return NOTIFY_DONE;
+++		}
++ 
++ 		if (!dp->ds->ops->port_fdb_add || !dp->ds->ops->port_fdb_del)
++ 			return NOTIFY_DONE;
++@@ -1666,18 +1712,13 @@ static int dsa_slave_switchdev_event(str
++ 		switchdev_work->port = dp->index;
++ 		switchdev_work->event = event;
++ 
++-		fdb_info = ptr;
++-
++-		if (!fdb_info->added_by_user) {
++-			kfree(switchdev_work);
++-			return NOTIFY_OK;
++-		}
++-
++ 		ether_addr_copy(switchdev_work->addr,
++ 				fdb_info->addr);
++ 		switchdev_work->vid = fdb_info->vid;
++ 
++-		dev_hold(dev);
+++		/* Hold a reference on the slave for dsa_fdb_offload_notify */
+++		if (dsa_is_user_port(dp->ds, dp->index))
+++			dev_hold(dev);
++ 		dsa_schedule_work(&switchdev_work->work);
++ 		break;
++ 	default:
+diff --git a/target/linux/generic/backport-5.4/780-net-dsa-mt7530-setup-core-clock-even-in-TRGMII-mode.patch b/target/linux/generic/backport-5.4/780-net-dsa-mt7530-setup-core-clock-even-in-TRGMII-mode.patch
+new file mode 100644
+index 0000000000..7ad7cd3a01
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/780-net-dsa-mt7530-setup-core-clock-even-in-TRGMII-mode.patch
+@@ -0,0 +1,84 @@
++From c3b8e07909dbe67b0d580416c1a5257643a73be7 Mon Sep 17 00:00:00 2001
++From: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
++Date: Fri, 12 Mar 2021 00:07:03 -0800
++Subject: [PATCH] net: dsa: mt7530: setup core clock even in TRGMII mode
++
++A recent change to MIPS ralink reset logic made it so mt7530 actually
++resets the switch on platforms such as mt7621 (where bit 2 is the reset
++line for the switch). That exposed an issue where the switch would not
++function properly in TRGMII mode after a reset.
++
++Reconfigure core clock in TRGMII mode to fix the issue.
++
++Tested on Ubiquiti ER-X (MT7621) with TRGMII mode enabled.
++
++Fixes: 3f9ef7785a9c ("MIPS: ralink: manage low reset lines")
++Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ drivers/net/dsa/mt7530.c | 52 +++++++++++++++++++---------------------
++ 1 file changed, 25 insertions(+), 27 deletions(-)
++
++--- a/drivers/net/dsa/mt7530.c
+++++ b/drivers/net/dsa/mt7530.c
++@@ -428,34 +428,32 @@ mt7530_pad_clk_setup(struct dsa_switch *
++ 			     TD_DM_DRVP(8) | TD_DM_DRVN(8));
++ 
++ 	/* Setup core clock for MT7530 */
++-	if (!trgint) {
++-		/* Disable MT7530 core clock */
++-		core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);
++-
++-		/* Disable PLL, since phy_device has not yet been created
++-		 * provided for phy_[read,write]_mmd_indirect is called, we
++-		 * provide our own core_write_mmd_indirect to complete this
++-		 * function.
++-		 */
++-		core_write_mmd_indirect(priv,
++-					CORE_GSWPLL_GRP1,
++-					MDIO_MMD_VEND2,
++-					0);
++-
++-		/* Set core clock into 500Mhz */
++-		core_write(priv, CORE_GSWPLL_GRP2,
++-			   RG_GSWPLL_POSDIV_500M(1) |
++-			   RG_GSWPLL_FBKDIV_500M(25));
++-
++-		/* Enable PLL */
++-		core_write(priv, CORE_GSWPLL_GRP1,
++-			   RG_GSWPLL_EN_PRE |
++-			   RG_GSWPLL_POSDIV_200M(2) |
++-			   RG_GSWPLL_FBKDIV_200M(32));
++-
++-		/* Enable MT7530 core clock */
++-		core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);
++-	}
+++	/* Disable MT7530 core clock */
+++	core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);
+++
+++	/* Disable PLL, since phy_device has not yet been created
+++	 * provided for phy_[read,write]_mmd_indirect is called, we
+++	 * provide our own core_write_mmd_indirect to complete this
+++	 * function.
+++	 */
+++	core_write_mmd_indirect(priv,
+++				CORE_GSWPLL_GRP1,
+++				MDIO_MMD_VEND2,
+++				0);
+++
+++	/* Set core clock into 500Mhz */
+++	core_write(priv, CORE_GSWPLL_GRP2,
+++		   RG_GSWPLL_POSDIV_500M(1) |
+++		   RG_GSWPLL_FBKDIV_500M(25));
+++
+++	/* Enable PLL */
+++	core_write(priv, CORE_GSWPLL_GRP1,
+++		   RG_GSWPLL_EN_PRE |
+++		   RG_GSWPLL_POSDIV_200M(2) |
+++		   RG_GSWPLL_FBKDIV_200M(32));
+++
+++	/* Enable MT7530 core clock */
+++	core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);
++ 
++ 	/* Setup the MT7530 TRGMII Tx Clock */
++ 	core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);
+diff --git a/target/linux/generic/backport-5.4/800-v5.5-iio-imu-Add-support-for-the-FXOS8700-IMU.patch b/target/linux/generic/backport-5.4/800-v5.5-iio-imu-Add-support-for-the-FXOS8700-IMU.patch
+new file mode 100644
+index 0000000000..b9cd276327
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/800-v5.5-iio-imu-Add-support-for-the-FXOS8700-IMU.patch
+@@ -0,0 +1,893 @@
++From 84e5ddd5c46ea3bf0cad670da32028994cad5936 Mon Sep 17 00:00:00 2001
++From: Robert Jones <rjones@gateworks.com>
++Date: Mon, 14 Oct 2019 11:49:21 -0700
++Subject: [PATCH] iio: imu: Add support for the FXOS8700 IMU
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++FXOS8700CQ is a small, low-power, 3-axis linear accelerometer and 3-axis
++magnetometer combined into a single package. The device features a
++selectable I2C or point-to-point SPI serial interface with 14-bit
++accelerometer and 16-bit magnetometer ADC resolution along with
++smart-embedded functions.
++
++FXOS8700CQ has dynamically selectable accelerationfull-scale ranges of
++±2 g/±4 g/±8 g and a fixed magnetic measurement range of ±1200 μT.
++Output data rates (ODR) from 1.563 Hz to 800 Hz are selectable by the user
++for each sensor. Interleaved magnetic and acceleration data is available
++at ODR rates of up to 400 Hz. FXOS8700CQ is available in a plastic QFN
++package and it is guaranteed to operate over the extended temperature
++range of –40 °C to +85 °C.
++
++TODO: Trigger and IRQ configuration support
++
++Datasheet:
++  http://cache.freescale.com/files/sensors/doc/data_sheet/FXOS8700CQ.pdf
++
++Signed-off-by: Robert Jones <rjones@gateworks.com>
++Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
++---
++ drivers/iio/imu/Kconfig         |  27 ++
++ drivers/iio/imu/Makefile        |   5 +
++ drivers/iio/imu/fxos8700.h      |  10 +
++ drivers/iio/imu/fxos8700_core.c | 649 ++++++++++++++++++++++++++++++++++++++++
++ drivers/iio/imu/fxos8700_i2c.c  |  71 +++++
++ drivers/iio/imu/fxos8700_spi.c  |  59 ++++
++ 6 files changed, 821 insertions(+)
++ create mode 100644 drivers/iio/imu/fxos8700.h
++ create mode 100644 drivers/iio/imu/fxos8700_core.c
++ create mode 100644 drivers/iio/imu/fxos8700_i2c.c
++ create mode 100644 drivers/iio/imu/fxos8700_spi.c
++
++--- a/drivers/iio/imu/Kconfig
+++++ b/drivers/iio/imu/Kconfig
++@@ -40,6 +40,33 @@ config ADIS16480
++ 
++ source "drivers/iio/imu/bmi160/Kconfig"
++ 
+++config FXOS8700
+++	tristate
+++
+++config FXOS8700_I2C
+++	tristate "NXP FXOS8700 I2C driver"
+++	depends on I2C
+++	select FXOS8700
+++	select REGMAP_I2C
+++	help
+++	  Say yes here to build support for the NXP FXOS8700 m+g combo
+++	  sensor on I2C.
+++
+++	  This driver can also be built as a module. If so, the module will be
+++	  called fxos8700_i2c.
+++
+++config FXOS8700_SPI
+++	tristate "NXP FXOS8700 SPI driver"
+++	depends on SPI
+++	select FXOS8700
+++	select REGMAP_SPI
+++	help
+++	  Say yes here to build support for the NXP FXOS8700 m+g combo
+++	  sensor on SPI.
+++
+++	  This driver can also be built as a module. If so, the module will be
+++	  called fxos8700_spi.
+++
++ config KMX61
++ 	tristate "Kionix KMX61 6-axis accelerometer and magnetometer"
++ 	depends on I2C
++--- a/drivers/iio/imu/Makefile
+++++ b/drivers/iio/imu/Makefile
++@@ -14,6 +14,11 @@ adis_lib-$(CONFIG_IIO_ADIS_LIB_BUFFER) +
++ obj-$(CONFIG_IIO_ADIS_LIB) += adis_lib.o
++ 
++ obj-y += bmi160/
+++
+++obj-$(CONFIG_FXOS8700) += fxos8700_core.o
+++obj-$(CONFIG_FXOS8700_I2C) += fxos8700_i2c.o
+++obj-$(CONFIG_FXOS8700_SPI) += fxos8700_spi.o
+++
++ obj-y += inv_mpu6050/
++ 
++ obj-$(CONFIG_KMX61) += kmx61.o
++--- /dev/null
+++++ b/drivers/iio/imu/fxos8700.h
++@@ -0,0 +1,10 @@
+++/* SPDX-License-Identifier: GPL-2.0 */
+++#ifndef FXOS8700_H_
+++#define FXOS8700_H_
+++
+++extern const struct regmap_config fxos8700_regmap_config;
+++
+++int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
+++			const char *name, bool use_spi);
+++
+++#endif  /* FXOS8700_H_ */
++--- /dev/null
+++++ b/drivers/iio/imu/fxos8700_core.c
++@@ -0,0 +1,649 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * FXOS8700 - NXP IMU (accelerometer plus magnetometer)
+++ *
+++ * IIO core driver for FXOS8700, with support for I2C/SPI busses
+++ *
+++ * TODO: Buffer, trigger, and IRQ support
+++ */
+++#include <linux/module.h>
+++#include <linux/regmap.h>
+++#include <linux/acpi.h>
+++#include <linux/bitops.h>
+++
+++#include <linux/iio/iio.h>
+++#include <linux/iio/sysfs.h>
+++
+++#include "fxos8700.h"
+++
+++/* Register Definitions */
+++#define FXOS8700_STATUS             0x00
+++#define FXOS8700_OUT_X_MSB          0x01
+++#define FXOS8700_OUT_X_LSB          0x02
+++#define FXOS8700_OUT_Y_MSB          0x03
+++#define FXOS8700_OUT_Y_LSB          0x04
+++#define FXOS8700_OUT_Z_MSB          0x05
+++#define FXOS8700_OUT_Z_LSB          0x06
+++#define FXOS8700_F_SETUP            0x09
+++#define FXOS8700_TRIG_CFG           0x0a
+++#define FXOS8700_SYSMOD             0x0b
+++#define FXOS8700_INT_SOURCE         0x0c
+++#define FXOS8700_WHO_AM_I           0x0d
+++#define FXOS8700_XYZ_DATA_CFG       0x0e
+++#define FXOS8700_HP_FILTER_CUTOFF   0x0f
+++#define FXOS8700_PL_STATUS          0x10
+++#define FXOS8700_PL_CFG             0x11
+++#define FXOS8700_PL_COUNT           0x12
+++#define FXOS8700_PL_BF_ZCOMP        0x13
+++#define FXOS8700_PL_THS_REG         0x14
+++#define FXOS8700_A_FFMT_CFG         0x15
+++#define FXOS8700_A_FFMT_SRC         0x16
+++#define FXOS8700_A_FFMT_THS         0x17
+++#define FXOS8700_A_FFMT_COUNT       0x18
+++#define FXOS8700_TRANSIENT_CFG      0x1d
+++#define FXOS8700_TRANSIENT_SRC      0x1e
+++#define FXOS8700_TRANSIENT_THS      0x1f
+++#define FXOS8700_TRANSIENT_COUNT    0x20
+++#define FXOS8700_PULSE_CFG          0x21
+++#define FXOS8700_PULSE_SRC          0x22
+++#define FXOS8700_PULSE_THSX         0x23
+++#define FXOS8700_PULSE_THSY         0x24
+++#define FXOS8700_PULSE_THSZ         0x25
+++#define FXOS8700_PULSE_TMLT         0x26
+++#define FXOS8700_PULSE_LTCY         0x27
+++#define FXOS8700_PULSE_WIND         0x28
+++#define FXOS8700_ASLP_COUNT         0x29
+++#define FXOS8700_CTRL_REG1          0x2a
+++#define FXOS8700_CTRL_REG2          0x2b
+++#define FXOS8700_CTRL_REG3          0x2c
+++#define FXOS8700_CTRL_REG4          0x2d
+++#define FXOS8700_CTRL_REG5          0x2e
+++#define FXOS8700_OFF_X              0x2f
+++#define FXOS8700_OFF_Y              0x30
+++#define FXOS8700_OFF_Z              0x31
+++#define FXOS8700_M_DR_STATUS        0x32
+++#define FXOS8700_M_OUT_X_MSB        0x33
+++#define FXOS8700_M_OUT_X_LSB        0x34
+++#define FXOS8700_M_OUT_Y_MSB        0x35
+++#define FXOS8700_M_OUT_Y_LSB        0x36
+++#define FXOS8700_M_OUT_Z_MSB        0x37
+++#define FXOS8700_M_OUT_Z_LSB        0x38
+++#define FXOS8700_CMP_X_MSB          0x39
+++#define FXOS8700_CMP_X_LSB          0x3a
+++#define FXOS8700_CMP_Y_MSB          0x3b
+++#define FXOS8700_CMP_Y_LSB          0x3c
+++#define FXOS8700_CMP_Z_MSB          0x3d
+++#define FXOS8700_CMP_Z_LSB          0x3e
+++#define FXOS8700_M_OFF_X_MSB        0x3f
+++#define FXOS8700_M_OFF_X_LSB        0x40
+++#define FXOS8700_M_OFF_Y_MSB        0x41
+++#define FXOS8700_M_OFF_Y_LSB        0x42
+++#define FXOS8700_M_OFF_Z_MSB        0x43
+++#define FXOS8700_M_OFF_Z_LSB        0x44
+++#define FXOS8700_MAX_X_MSB          0x45
+++#define FXOS8700_MAX_X_LSB          0x46
+++#define FXOS8700_MAX_Y_MSB          0x47
+++#define FXOS8700_MAX_Y_LSB          0x48
+++#define FXOS8700_MAX_Z_MSB          0x49
+++#define FXOS8700_MAX_Z_LSB          0x4a
+++#define FXOS8700_MIN_X_MSB          0x4b
+++#define FXOS8700_MIN_X_LSB          0x4c
+++#define FXOS8700_MIN_Y_MSB          0x4d
+++#define FXOS8700_MIN_Y_LSB          0x4e
+++#define FXOS8700_MIN_Z_MSB          0x4f
+++#define FXOS8700_MIN_Z_LSB          0x50
+++#define FXOS8700_TEMP               0x51
+++#define FXOS8700_M_THS_CFG          0x52
+++#define FXOS8700_M_THS_SRC          0x53
+++#define FXOS8700_M_THS_X_MSB        0x54
+++#define FXOS8700_M_THS_X_LSB        0x55
+++#define FXOS8700_M_THS_Y_MSB        0x56
+++#define FXOS8700_M_THS_Y_LSB        0x57
+++#define FXOS8700_M_THS_Z_MSB        0x58
+++#define FXOS8700_M_THS_Z_LSB        0x59
+++#define FXOS8700_M_THS_COUNT        0x5a
+++#define FXOS8700_M_CTRL_REG1        0x5b
+++#define FXOS8700_M_CTRL_REG2        0x5c
+++#define FXOS8700_M_CTRL_REG3        0x5d
+++#define FXOS8700_M_INT_SRC          0x5e
+++#define FXOS8700_A_VECM_CFG         0x5f
+++#define FXOS8700_A_VECM_THS_MSB     0x60
+++#define FXOS8700_A_VECM_THS_LSB     0x61
+++#define FXOS8700_A_VECM_CNT         0x62
+++#define FXOS8700_A_VECM_INITX_MSB   0x63
+++#define FXOS8700_A_VECM_INITX_LSB   0x64
+++#define FXOS8700_A_VECM_INITY_MSB   0x65
+++#define FXOS8700_A_VECM_INITY_LSB   0x66
+++#define FXOS8700_A_VECM_INITZ_MSB   0x67
+++#define FXOS8700_A_VECM_INITZ_LSB   0x68
+++#define FXOS8700_M_VECM_CFG         0x69
+++#define FXOS8700_M_VECM_THS_MSB     0x6a
+++#define FXOS8700_M_VECM_THS_LSB     0x6b
+++#define FXOS8700_M_VECM_CNT         0x6c
+++#define FXOS8700_M_VECM_INITX_MSB   0x6d
+++#define FXOS8700_M_VECM_INITX_LSB   0x6e
+++#define FXOS8700_M_VECM_INITY_MSB   0x6f
+++#define FXOS8700_M_VECM_INITY_LSB   0x70
+++#define FXOS8700_M_VECM_INITZ_MSB   0x71
+++#define FXOS8700_M_VECM_INITZ_LSB   0x72
+++#define FXOS8700_A_FFMT_THS_X_MSB   0x73
+++#define FXOS8700_A_FFMT_THS_X_LSB   0x74
+++#define FXOS8700_A_FFMT_THS_Y_MSB   0x75
+++#define FXOS8700_A_FFMT_THS_Y_LSB   0x76
+++#define FXOS8700_A_FFMT_THS_Z_MSB   0x77
+++#define FXOS8700_A_FFMT_THS_Z_LSB   0x78
+++#define FXOS8700_A_TRAN_INIT_MSB    0x79
+++#define FXOS8700_A_TRAN_INIT_LSB_X  0x7a
+++#define FXOS8700_A_TRAN_INIT_LSB_Y  0x7b
+++#define FXOS8700_A_TRAN_INIT_LSB_Z  0x7d
+++#define FXOS8700_TM_NVM_LOCK        0x7e
+++#define FXOS8700_NVM_DATA0_35       0x80
+++#define FXOS8700_NVM_DATA_BNK3      0xa4
+++#define FXOS8700_NVM_DATA_BNK2      0xa5
+++#define FXOS8700_NVM_DATA_BNK1      0xa6
+++#define FXOS8700_NVM_DATA_BNK0      0xa7
+++
+++/* Bit definitions for FXOS8700_CTRL_REG1 */
+++#define FXOS8700_CTRL_ODR_MSK       0x38
+++#define FXOS8700_CTRL_ODR_MAX       0x00
+++#define FXOS8700_CTRL_ODR_MIN       GENMASK(4, 3)
+++
+++/* Bit definitions for FXOS8700_M_CTRL_REG1 */
+++#define FXOS8700_HMS_MASK           GENMASK(1, 0)
+++#define FXOS8700_OS_MASK            GENMASK(4, 2)
+++
+++/* Bit definitions for FXOS8700_M_CTRL_REG2 */
+++#define FXOS8700_MAXMIN_RST         BIT(2)
+++#define FXOS8700_MAXMIN_DIS_THS     BIT(3)
+++#define FXOS8700_MAXMIN_DIS         BIT(4)
+++
+++#define FXOS8700_ACTIVE             0x01
+++#define FXOS8700_ACTIVE_MIN_USLEEP  4000 /* from table 6 in datasheet */
+++
+++#define FXOS8700_DEVICE_ID          0xC7
+++#define FXOS8700_PRE_DEVICE_ID      0xC4
+++#define FXOS8700_DATA_BUF_SIZE      3
+++
+++struct fxos8700_data {
+++	struct regmap *regmap;
+++	struct iio_trigger *trig;
+++	__be16 buf[FXOS8700_DATA_BUF_SIZE] ____cacheline_aligned;
+++};
+++
+++/* Regmap info */
+++static const struct regmap_range read_range[] = {
+++	{
+++		.range_min = FXOS8700_STATUS,
+++		.range_max = FXOS8700_A_FFMT_COUNT,
+++	}, {
+++		.range_min = FXOS8700_TRANSIENT_CFG,
+++		.range_max = FXOS8700_A_FFMT_THS_Z_LSB,
+++	},
+++};
+++
+++static const struct regmap_range write_range[] = {
+++	{
+++		.range_min = FXOS8700_F_SETUP,
+++		.range_max = FXOS8700_TRIG_CFG,
+++	}, {
+++		.range_min = FXOS8700_XYZ_DATA_CFG,
+++		.range_max = FXOS8700_HP_FILTER_CUTOFF,
+++	}, {
+++		.range_min = FXOS8700_PL_CFG,
+++		.range_max = FXOS8700_A_FFMT_CFG,
+++	}, {
+++		.range_min = FXOS8700_A_FFMT_THS,
+++		.range_max = FXOS8700_TRANSIENT_CFG,
+++	}, {
+++		.range_min = FXOS8700_TRANSIENT_THS,
+++		.range_max = FXOS8700_PULSE_CFG,
+++	}, {
+++		.range_min = FXOS8700_PULSE_THSX,
+++		.range_max = FXOS8700_OFF_Z,
+++	}, {
+++		.range_min = FXOS8700_M_OFF_X_MSB,
+++		.range_max = FXOS8700_M_OFF_Z_LSB,
+++	}, {
+++		.range_min = FXOS8700_M_THS_CFG,
+++		.range_max = FXOS8700_M_THS_CFG,
+++	}, {
+++		.range_min = FXOS8700_M_THS_X_MSB,
+++		.range_max = FXOS8700_M_CTRL_REG3,
+++	}, {
+++		.range_min = FXOS8700_A_VECM_CFG,
+++		.range_max = FXOS8700_A_FFMT_THS_Z_LSB,
+++	},
+++};
+++
+++static const struct regmap_access_table driver_read_table = {
+++	.yes_ranges =   read_range,
+++	.n_yes_ranges = ARRAY_SIZE(read_range),
+++};
+++
+++static const struct regmap_access_table driver_write_table = {
+++	.yes_ranges =   write_range,
+++	.n_yes_ranges = ARRAY_SIZE(write_range),
+++};
+++
+++const struct regmap_config fxos8700_regmap_config = {
+++	.reg_bits = 8,
+++	.val_bits = 8,
+++	.max_register = FXOS8700_NVM_DATA_BNK0,
+++	.rd_table = &driver_read_table,
+++	.wr_table = &driver_write_table,
+++};
+++EXPORT_SYMBOL(fxos8700_regmap_config);
+++
+++#define FXOS8700_CHANNEL(_type, _axis) {			\
+++	.type = _type,						\
+++	.modified = 1,						\
+++	.channel2 = IIO_MOD_##_axis,				\
+++	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
+++	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |  \
+++		BIT(IIO_CHAN_INFO_SAMP_FREQ),			\
+++}
+++
+++enum fxos8700_accel_scale_bits {
+++	MODE_2G = 0,
+++	MODE_4G,
+++	MODE_8G,
+++};
+++
+++/* scan indexes follow DATA register order */
+++enum fxos8700_scan_axis {
+++	FXOS8700_SCAN_ACCEL_X = 0,
+++	FXOS8700_SCAN_ACCEL_Y,
+++	FXOS8700_SCAN_ACCEL_Z,
+++	FXOS8700_SCAN_MAGN_X,
+++	FXOS8700_SCAN_MAGN_Y,
+++	FXOS8700_SCAN_MAGN_Z,
+++	FXOS8700_SCAN_RHALL,
+++	FXOS8700_SCAN_TIMESTAMP,
+++};
+++
+++enum fxos8700_sensor {
+++	FXOS8700_ACCEL	= 0,
+++	FXOS8700_MAGN,
+++	FXOS8700_NUM_SENSORS /* must be last */
+++};
+++
+++enum fxos8700_int_pin {
+++	FXOS8700_PIN_INT1,
+++	FXOS8700_PIN_INT2
+++};
+++
+++struct fxos8700_scale {
+++	u8 bits;
+++	int uscale;
+++};
+++
+++struct fxos8700_odr {
+++	u8 bits;
+++	int odr;
+++	int uodr;
+++};
+++
+++static const struct fxos8700_scale fxos8700_accel_scale[] = {
+++	{ MODE_2G, 244},
+++	{ MODE_4G, 488},
+++	{ MODE_8G, 976},
+++};
+++
+++/*
+++ * Accellerometer and magnetometer have the same ODR options, set in the
+++ * CTRL_REG1 register. ODR is halved when using both sensors at once in
+++ * hybrid mode.
+++ */
+++static const struct fxos8700_odr fxos8700_odr[] = {
+++	{0x00, 800, 0},
+++	{0x01, 400, 0},
+++	{0x02, 200, 0},
+++	{0x03, 100, 0},
+++	{0x04, 50, 0},
+++	{0x05, 12, 500000},
+++	{0x06, 6, 250000},
+++	{0x07, 1, 562500},
+++};
+++
+++static const struct iio_chan_spec fxos8700_channels[] = {
+++	FXOS8700_CHANNEL(IIO_ACCEL, X),
+++	FXOS8700_CHANNEL(IIO_ACCEL, Y),
+++	FXOS8700_CHANNEL(IIO_ACCEL, Z),
+++	FXOS8700_CHANNEL(IIO_MAGN, X),
+++	FXOS8700_CHANNEL(IIO_MAGN, Y),
+++	FXOS8700_CHANNEL(IIO_MAGN, Z),
+++	IIO_CHAN_SOFT_TIMESTAMP(FXOS8700_SCAN_TIMESTAMP),
+++};
+++
+++static enum fxos8700_sensor fxos8700_to_sensor(enum iio_chan_type iio_type)
+++{
+++	switch (iio_type) {
+++	case IIO_ACCEL:
+++		return FXOS8700_ACCEL;
+++	case IIO_ANGL_VEL:
+++		return FXOS8700_MAGN;
+++	default:
+++		return -EINVAL;
+++	}
+++}
+++
+++static int fxos8700_set_active_mode(struct fxos8700_data *data,
+++				    enum fxos8700_sensor t, bool mode)
+++{
+++	int ret;
+++
+++	ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, mode);
+++	if (ret)
+++		return ret;
+++
+++	usleep_range(FXOS8700_ACTIVE_MIN_USLEEP,
+++		     FXOS8700_ACTIVE_MIN_USLEEP + 1000);
+++
+++	return 0;
+++}
+++
+++static int fxos8700_set_scale(struct fxos8700_data *data,
+++			      enum fxos8700_sensor t, int uscale)
+++{
+++	int i;
+++	static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
+++	struct device *dev = regmap_get_device(data->regmap);
+++
+++	if (t == FXOS8700_MAGN) {
+++		dev_err(dev, "Magnetometer scale is locked at 1200uT\n");
+++		return -EINVAL;
+++	}
+++
+++	for (i = 0; i < scale_num; i++)
+++		if (fxos8700_accel_scale[i].uscale == uscale)
+++			break;
+++
+++	if (i == scale_num)
+++		return -EINVAL;
+++
+++	return regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG,
+++			    fxos8700_accel_scale[i].bits);
+++}
+++
+++static int fxos8700_get_scale(struct fxos8700_data *data,
+++			      enum fxos8700_sensor t, int *uscale)
+++{
+++	int i, ret, val;
+++	static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
+++
+++	if (t == FXOS8700_MAGN) {
+++		*uscale = 1200; /* Magnetometer is locked at 1200uT */
+++		return 0;
+++	}
+++
+++	ret = regmap_read(data->regmap, FXOS8700_XYZ_DATA_CFG, &val);
+++	if (ret)
+++		return ret;
+++
+++	for (i = 0; i < scale_num; i++) {
+++		if (fxos8700_accel_scale[i].bits == (val & 0x3)) {
+++			*uscale = fxos8700_accel_scale[i].uscale;
+++			return 0;
+++		}
+++	}
+++
+++	return -EINVAL;
+++}
+++
+++static int fxos8700_get_data(struct fxos8700_data *data, int chan_type,
+++			     int axis, int *val)
+++{
+++	u8 base, reg;
+++	int ret;
+++	enum fxos8700_sensor type = fxos8700_to_sensor(chan_type);
+++
+++	base = type ? FXOS8700_OUT_X_MSB : FXOS8700_M_OUT_X_MSB;
+++
+++	/* Block read 6 bytes of device output registers to avoid data loss */
+++	ret = regmap_bulk_read(data->regmap, base, data->buf,
+++			       FXOS8700_DATA_BUF_SIZE);
+++	if (ret)
+++		return ret;
+++
+++	/* Convert axis to buffer index */
+++	reg = axis - IIO_MOD_X;
+++
+++	/* Convert to native endianness */
+++	*val = sign_extend32(be16_to_cpu(data->buf[reg]), 15);
+++
+++	return 0;
+++}
+++
+++static int fxos8700_set_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
+++			    int odr, int uodr)
+++{
+++	int i, ret, val;
+++	bool active_mode;
+++	static const int odr_num = ARRAY_SIZE(fxos8700_odr);
+++
+++	ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
+++	if (ret)
+++		return ret;
+++
+++	active_mode = val & FXOS8700_ACTIVE;
+++
+++	if (active_mode) {
+++		/*
+++		 * The device must be in standby mode to change any of the
+++		 * other fields within CTRL_REG1
+++		 */
+++		ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
+++				   val & ~FXOS8700_ACTIVE);
+++		if (ret)
+++			return ret;
+++	}
+++
+++	for (i = 0; i < odr_num; i++)
+++		if (fxos8700_odr[i].odr == odr && fxos8700_odr[i].uodr == uodr)
+++			break;
+++
+++	if (i >= odr_num)
+++		return -EINVAL;
+++
+++	return regmap_update_bits(data->regmap,
+++				  FXOS8700_CTRL_REG1,
+++				  FXOS8700_CTRL_ODR_MSK + FXOS8700_ACTIVE,
+++				  fxos8700_odr[i].bits << 3 | active_mode);
+++}
+++
+++static int fxos8700_get_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
+++			    int *odr, int *uodr)
+++{
+++	int i, val, ret;
+++	static const int odr_num = ARRAY_SIZE(fxos8700_odr);
+++
+++	ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
+++	if (ret)
+++		return ret;
+++
+++	val &= FXOS8700_CTRL_ODR_MSK;
+++
+++	for (i = 0; i < odr_num; i++)
+++		if (val == fxos8700_odr[i].bits)
+++			break;
+++
+++	if (i >= odr_num)
+++		return -EINVAL;
+++
+++	*odr = fxos8700_odr[i].odr;
+++	*uodr = fxos8700_odr[i].uodr;
+++
+++	return 0;
+++}
+++
+++static int fxos8700_read_raw(struct iio_dev *indio_dev,
+++			     struct iio_chan_spec const *chan,
+++			     int *val, int *val2, long mask)
+++{
+++	int ret;
+++	struct fxos8700_data *data = iio_priv(indio_dev);
+++
+++	switch (mask) {
+++	case IIO_CHAN_INFO_RAW:
+++		ret = fxos8700_get_data(data, chan->type, chan->channel2, val);
+++		if (ret)
+++			return ret;
+++		return IIO_VAL_INT;
+++	case IIO_CHAN_INFO_SCALE:
+++		*val = 0;
+++		ret = fxos8700_get_scale(data, fxos8700_to_sensor(chan->type),
+++					 val2);
+++		return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
+++	case IIO_CHAN_INFO_SAMP_FREQ:
+++		ret = fxos8700_get_odr(data, fxos8700_to_sensor(chan->type),
+++				       val, val2);
+++		return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
+++	default:
+++		return -EINVAL;
+++	}
+++}
+++
+++static int fxos8700_write_raw(struct iio_dev *indio_dev,
+++			      struct iio_chan_spec const *chan,
+++			      int val, int val2, long mask)
+++{
+++	struct fxos8700_data *data = iio_priv(indio_dev);
+++
+++	switch (mask) {
+++	case IIO_CHAN_INFO_SCALE:
+++		return fxos8700_set_scale(data, fxos8700_to_sensor(chan->type),
+++					  val2);
+++	case IIO_CHAN_INFO_SAMP_FREQ:
+++		return fxos8700_set_odr(data, fxos8700_to_sensor(chan->type),
+++					val, val2);
+++	default:
+++		return -EINVAL;
+++	}
+++}
+++
+++static IIO_CONST_ATTR(in_accel_sampling_frequency_available,
+++		      "1.5625 6.25 12.5 50 100 200 400 800");
+++static IIO_CONST_ATTR(in_magn_sampling_frequency_available,
+++		      "1.5625 6.25 12.5 50 100 200 400 800");
+++static IIO_CONST_ATTR(in_accel_scale_available, "0.000244 0.000488 0.000976");
+++static IIO_CONST_ATTR(in_magn_scale_available, "0.000001200");
+++
+++static struct attribute *fxos8700_attrs[] = {
+++	&iio_const_attr_in_accel_sampling_frequency_available.dev_attr.attr,
+++	&iio_const_attr_in_magn_sampling_frequency_available.dev_attr.attr,
+++	&iio_const_attr_in_accel_scale_available.dev_attr.attr,
+++	&iio_const_attr_in_magn_scale_available.dev_attr.attr,
+++	NULL,
+++};
+++
+++static const struct attribute_group fxos8700_attrs_group = {
+++	.attrs = fxos8700_attrs,
+++};
+++
+++static const struct iio_info fxos8700_info = {
+++	.read_raw = fxos8700_read_raw,
+++	.write_raw = fxos8700_write_raw,
+++	.attrs = &fxos8700_attrs_group,
+++};
+++
+++static int fxos8700_chip_init(struct fxos8700_data *data, bool use_spi)
+++{
+++	int ret;
+++	unsigned int val;
+++	struct device *dev = regmap_get_device(data->regmap);
+++
+++	ret = regmap_read(data->regmap, FXOS8700_WHO_AM_I, &val);
+++	if (ret) {
+++		dev_err(dev, "Error reading chip id\n");
+++		return ret;
+++	}
+++	if (val != FXOS8700_DEVICE_ID && val != FXOS8700_PRE_DEVICE_ID) {
+++		dev_err(dev, "Wrong chip id, got %x expected %x or %x\n",
+++			val, FXOS8700_DEVICE_ID, FXOS8700_PRE_DEVICE_ID);
+++		return -ENODEV;
+++	}
+++
+++	ret = fxos8700_set_active_mode(data, FXOS8700_ACCEL, true);
+++	if (ret)
+++		return ret;
+++
+++	ret = fxos8700_set_active_mode(data, FXOS8700_MAGN, true);
+++	if (ret)
+++		return ret;
+++
+++	/*
+++	 * The device must be in standby mode to change any of the other fields
+++	 * within CTRL_REG1
+++	 */
+++	ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, 0x00);
+++	if (ret)
+++		return ret;
+++
+++	/* Set max oversample ratio (OSR) and both devices active */
+++	ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG1,
+++			   FXOS8700_HMS_MASK | FXOS8700_OS_MASK);
+++	if (ret)
+++		return ret;
+++
+++	/* Disable and rst min/max measurements & threshold */
+++	ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG2,
+++			   FXOS8700_MAXMIN_RST | FXOS8700_MAXMIN_DIS_THS |
+++			   FXOS8700_MAXMIN_DIS);
+++	if (ret)
+++		return ret;
+++
+++	/* Max ODR (800Hz individual or 400Hz hybrid), active mode */
+++	ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
+++			   FXOS8700_CTRL_ODR_MAX | FXOS8700_ACTIVE);
+++	if (ret)
+++		return ret;
+++
+++	/* Set for max full-scale range (+/-8G) */
+++	return regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG, MODE_8G);
+++}
+++
+++static void fxos8700_chip_uninit(void *data)
+++{
+++	struct fxos8700_data *fxos8700_data = data;
+++
+++	fxos8700_set_active_mode(fxos8700_data, FXOS8700_ACCEL, false);
+++	fxos8700_set_active_mode(fxos8700_data, FXOS8700_MAGN, false);
+++}
+++
+++int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
+++			const char *name, bool use_spi)
+++{
+++	struct iio_dev *indio_dev;
+++	struct fxos8700_data *data;
+++	int ret;
+++
+++	indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
+++	if (!indio_dev)
+++		return -ENOMEM;
+++
+++	data = iio_priv(indio_dev);
+++	dev_set_drvdata(dev, indio_dev);
+++	data->regmap = regmap;
+++
+++	ret = fxos8700_chip_init(data, use_spi);
+++	if (ret)
+++		return ret;
+++
+++	ret = devm_add_action_or_reset(dev, fxos8700_chip_uninit, data);
+++	if (ret)
+++		return ret;
+++
+++	indio_dev->dev.parent = dev;
+++	indio_dev->channels = fxos8700_channels;
+++	indio_dev->num_channels = ARRAY_SIZE(fxos8700_channels);
+++	indio_dev->name = name ? name : "fxos8700";
+++	indio_dev->modes = INDIO_DIRECT_MODE;
+++	indio_dev->info = &fxos8700_info;
+++
+++	return devm_iio_device_register(dev, indio_dev);
+++}
+++EXPORT_SYMBOL_GPL(fxos8700_core_probe);
+++
+++MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
+++MODULE_DESCRIPTION("FXOS8700 6-Axis Acc and Mag Combo Sensor driver");
+++MODULE_LICENSE("GPL v2");
++--- /dev/null
+++++ b/drivers/iio/imu/fxos8700_i2c.c
++@@ -0,0 +1,71 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * FXOS8700 - NXP IMU, I2C bits
+++ *
+++ * 7-bit I2C slave address determined by SA1 and SA0 logic level
+++ * inputs represented in the following table:
+++ *      SA1  |  SA0  |  Slave Address
+++ *      0    |  0    |  0x1E
+++ *      0    |  1    |  0x1D
+++ *      1    |  0    |  0x1C
+++ *      1    |  1    |  0x1F
+++ */
+++#include <linux/acpi.h>
+++#include <linux/i2c.h>
+++#include <linux/module.h>
+++#include <linux/mod_devicetable.h>
+++#include <linux/regmap.h>
+++
+++#include "fxos8700.h"
+++
+++static int fxos8700_i2c_probe(struct i2c_client *client,
+++			      const struct i2c_device_id *id)
+++{
+++	struct regmap *regmap;
+++	const char *name = NULL;
+++
+++	regmap = devm_regmap_init_i2c(client, &fxos8700_regmap_config);
+++	if (IS_ERR(regmap)) {
+++		dev_err(&client->dev, "Failed to register i2c regmap %d\n",
+++			(int)PTR_ERR(regmap));
+++		return PTR_ERR(regmap);
+++	}
+++
+++	if (id)
+++		name = id->name;
+++
+++	return fxos8700_core_probe(&client->dev, regmap, name, false);
+++}
+++
+++static const struct i2c_device_id fxos8700_i2c_id[] = {
+++	{"fxos8700", 0},
+++	{ }
+++};
+++MODULE_DEVICE_TABLE(i2c, fxos8700_i2c_id);
+++
+++static const struct acpi_device_id fxos8700_acpi_match[] = {
+++	{"FXOS8700", 0},
+++	{ }
+++};
+++MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
+++
+++static const struct of_device_id fxos8700_of_match[] = {
+++	{ .compatible = "nxp,fxos8700" },
+++	{ }
+++};
+++MODULE_DEVICE_TABLE(of, fxos8700_of_match);
+++
+++static struct i2c_driver fxos8700_i2c_driver = {
+++	.driver = {
+++		.name                   = "fxos8700_i2c",
+++		.acpi_match_table       = ACPI_PTR(fxos8700_acpi_match),
+++		.of_match_table         = fxos8700_of_match,
+++	},
+++	.probe          = fxos8700_i2c_probe,
+++	.id_table       = fxos8700_i2c_id,
+++};
+++module_i2c_driver(fxos8700_i2c_driver);
+++
+++MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
+++MODULE_DESCRIPTION("FXOS8700 I2C driver");
+++MODULE_LICENSE("GPL v2");
++--- /dev/null
+++++ b/drivers/iio/imu/fxos8700_spi.c
++@@ -0,0 +1,59 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * FXOS8700 - NXP IMU, SPI bits
+++ */
+++#include <linux/acpi.h>
+++#include <linux/module.h>
+++#include <linux/mod_devicetable.h>
+++#include <linux/regmap.h>
+++#include <linux/spi/spi.h>
+++
+++#include "fxos8700.h"
+++
+++static int fxos8700_spi_probe(struct spi_device *spi)
+++{
+++	struct regmap *regmap;
+++	const struct spi_device_id *id = spi_get_device_id(spi);
+++
+++	regmap = devm_regmap_init_spi(spi, &fxos8700_regmap_config);
+++	if (IS_ERR(regmap)) {
+++		dev_err(&spi->dev, "Failed to register spi regmap %d\n",
+++			(int)PTR_ERR(regmap));
+++		return PTR_ERR(regmap);
+++	}
+++
+++	return fxos8700_core_probe(&spi->dev, regmap, id->name, true);
+++}
+++
+++static const struct spi_device_id fxos8700_spi_id[] = {
+++	{"fxos8700", 0},
+++	{ }
+++};
+++MODULE_DEVICE_TABLE(spi, fxos8700_spi_id);
+++
+++static const struct acpi_device_id fxos8700_acpi_match[] = {
+++	{"FXOS8700", 0},
+++	{ }
+++};
+++MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
+++
+++static const struct of_device_id fxos8700_of_match[] = {
+++	{ .compatible = "nxp,fxos8700" },
+++	{ }
+++};
+++MODULE_DEVICE_TABLE(of, fxos8700_of_match);
+++
+++static struct spi_driver fxos8700_spi_driver = {
+++	.probe          = fxos8700_spi_probe,
+++	.id_table       = fxos8700_spi_id,
+++	.driver = {
+++		.acpi_match_table       = ACPI_PTR(fxos8700_acpi_match),
+++		.of_match_table         = fxos8700_of_match,
+++		.name                   = "fxos8700_spi",
+++	},
+++};
+++module_spi_driver(fxos8700_spi_driver);
+++
+++MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
+++MODULE_DESCRIPTION("FXOS8700 SPI driver");
+++MODULE_LICENSE("GPL v2");
+diff --git a/target/linux/generic/backport-5.4/800-v5.5-scsi-core-Add-sysfs-attributes-for-VPD-pages-0h-and-.patch b/target/linux/generic/backport-5.4/800-v5.5-scsi-core-Add-sysfs-attributes-for-VPD-pages-0h-and-.patch
+new file mode 100644
+index 0000000000..8c18d5df6d
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/800-v5.5-scsi-core-Add-sysfs-attributes-for-VPD-pages-0h-and-.patch
+@@ -0,0 +1,122 @@
++From d188b0675b21d5a6ca27b3e741381813983f4719 Mon Sep 17 00:00:00 2001
++From: Ryan Attard <ryanattard@ryanattard.info>
++Date: Thu, 26 Sep 2019 11:22:17 -0500
++Subject: [PATCH] scsi: core: Add sysfs attributes for VPD pages 0h and 89h
++
++Add sysfs attributes for the ATA information page and Supported VPD Pages
++page.
++
++Link: https://lore.kernel.org/r/20190926162216.56591-1-ryanattard@ryanattard.info
++Signed-off-by: Ryan Attard <ryanattard@ryanattard.info>
++Reviewed-by: Bart Van Assche <bvanassche@acm.org>
++Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
++---
++ drivers/scsi/scsi.c        |  4 ++++
++ drivers/scsi/scsi_sysfs.c  | 19 +++++++++++++++++++
++ include/scsi/scsi_device.h |  2 ++
++ 3 files changed, 25 insertions(+)
++
++--- a/drivers/scsi/scsi.c
+++++ b/drivers/scsi/scsi.c
++@@ -465,10 +465,14 @@ void scsi_attach_vpd(struct scsi_device
++ 		return;
++ 
++ 	for (i = 4; i < vpd_buf->len; i++) {
+++		if (vpd_buf->data[i] == 0x0)
+++			scsi_update_vpd_page(sdev, 0x0, &sdev->vpd_pg0);
++ 		if (vpd_buf->data[i] == 0x80)
++ 			scsi_update_vpd_page(sdev, 0x80, &sdev->vpd_pg80);
++ 		if (vpd_buf->data[i] == 0x83)
++ 			scsi_update_vpd_page(sdev, 0x83, &sdev->vpd_pg83);
+++		if (vpd_buf->data[i] == 0x89)
+++			scsi_update_vpd_page(sdev, 0x89, &sdev->vpd_pg89);
++ 	}
++ 	kfree(vpd_buf);
++ }
++--- a/drivers/scsi/scsi_sysfs.c
+++++ b/drivers/scsi/scsi_sysfs.c
++@@ -437,6 +437,7 @@ static void scsi_device_dev_release_user
++ 	struct device *parent;
++ 	struct list_head *this, *tmp;
++ 	struct scsi_vpd *vpd_pg80 = NULL, *vpd_pg83 = NULL;
+++	struct scsi_vpd *vpd_pg0 = NULL, *vpd_pg89 = NULL;
++ 	unsigned long flags;
++ 	struct module *mod;
++ 
++@@ -469,16 +470,24 @@ static void scsi_device_dev_release_user
++ 	sdev->request_queue = NULL;
++ 
++ 	mutex_lock(&sdev->inquiry_mutex);
+++	rcu_swap_protected(sdev->vpd_pg0, vpd_pg0,
+++			   lockdep_is_held(&sdev->inquiry_mutex));
++ 	rcu_swap_protected(sdev->vpd_pg80, vpd_pg80,
++ 			   lockdep_is_held(&sdev->inquiry_mutex));
++ 	rcu_swap_protected(sdev->vpd_pg83, vpd_pg83,
++ 			   lockdep_is_held(&sdev->inquiry_mutex));
+++	rcu_swap_protected(sdev->vpd_pg89, vpd_pg89,
+++			   lockdep_is_held(&sdev->inquiry_mutex));
++ 	mutex_unlock(&sdev->inquiry_mutex);
++ 
+++	if (vpd_pg0)
+++		kfree_rcu(vpd_pg0, rcu);
++ 	if (vpd_pg83)
++ 		kfree_rcu(vpd_pg83, rcu);
++ 	if (vpd_pg80)
++ 		kfree_rcu(vpd_pg80, rcu);
+++	if (vpd_pg89)
+++		kfree_rcu(vpd_pg89, rcu);
++ 	kfree(sdev->inquiry);
++ 	kfree(sdev);
++ 
++@@ -883,6 +892,8 @@ static struct bin_attribute dev_attr_vpd
++ 
++ sdev_vpd_pg_attr(pg83);
++ sdev_vpd_pg_attr(pg80);
+++sdev_vpd_pg_attr(pg89);
+++sdev_vpd_pg_attr(pg0);
++ 
++ static ssize_t show_inquiry(struct file *filep, struct kobject *kobj,
++ 			    struct bin_attribute *bin_attr,
++@@ -1215,12 +1226,18 @@ static umode_t scsi_sdev_bin_attr_is_vis
++ 	struct scsi_device *sdev = to_scsi_device(dev);
++ 
++ 
+++	if (attr == &dev_attr_vpd_pg0 && !sdev->vpd_pg0)
+++		return 0;
+++
++ 	if (attr == &dev_attr_vpd_pg80 && !sdev->vpd_pg80)
++ 		return 0;
++ 
++ 	if (attr == &dev_attr_vpd_pg83 && !sdev->vpd_pg83)
++ 		return 0;
++ 
+++	if (attr == &dev_attr_vpd_pg89 && !sdev->vpd_pg89)
+++		return 0;
+++
++ 	return S_IRUGO;
++ }
++ 
++@@ -1263,8 +1280,10 @@ static struct attribute *scsi_sdev_attrs
++ };
++ 
++ static struct bin_attribute *scsi_sdev_bin_attrs[] = {
+++	&dev_attr_vpd_pg0,
++ 	&dev_attr_vpd_pg83,
++ 	&dev_attr_vpd_pg80,
+++	&dev_attr_vpd_pg89,
++ 	&dev_attr_inquiry,
++ 	NULL
++ };
++--- a/include/scsi/scsi_device.h
+++++ b/include/scsi/scsi_device.h
++@@ -140,8 +140,10 @@ struct scsi_device {
++ 	const char * rev;		/* ... "nullnullnullnull" before scan */
++ 
++ #define SCSI_VPD_PG_LEN                255
+++	struct scsi_vpd __rcu *vpd_pg0;
++ 	struct scsi_vpd __rcu *vpd_pg83;
++ 	struct scsi_vpd __rcu *vpd_pg80;
+++	struct scsi_vpd __rcu *vpd_pg89;
++ 	unsigned char current_tag;	/* current tag */
++ 	struct scsi_target      *sdev_target;   /* used only for single_lun */
++ 
+diff --git a/target/linux/generic/backport-5.4/801-v5.5-hwmon-Driver-for-disk-and-solid-state-drives-with-te.patch b/target/linux/generic/backport-5.4/801-v5.5-hwmon-Driver-for-disk-and-solid-state-drives-with-te.patch
+new file mode 100644
+index 0000000000..32a629772f
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/801-v5.5-hwmon-Driver-for-disk-and-solid-state-drives-with-te.patch
+@@ -0,0 +1,737 @@
++From 5b46903d8bf372e563bf2150d46b87fff197a109 Mon Sep 17 00:00:00 2001
++From: Guenter Roeck <linux@roeck-us.net>
++Date: Thu, 28 Nov 2019 21:34:40 -0800
++Subject: [PATCH] hwmon: Driver for disk and solid state drives with
++ temperature sensors
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++Reading the temperature of ATA drives has been supported for years
++by userspace tools such as smarttools or hddtemp. The downside of
++such tools is that they need to run with super-user privilege, that
++the temperatures are not reported by standard tools such as 'sensors'
++or 'libsensors', and that drive temperatures are not available for use
++in the kernel's thermal subsystem.
++
++This driver solves this problem by adding support for reading the
++temperature of ATA drives from the kernel using the hwmon API and
++by adding a temperature zone for each drive.
++
++With this driver, the hard disk temperature can be read using the
++unprivileged 'sensors' application:
++
++$ sensors drivetemp-scsi-1-0
++drivetemp-scsi-1-0
++Adapter: SCSI adapter
++temp1:        +23.0°C
++
++or directly from sysfs:
++
++$ grep . /sys/class/hwmon/hwmon9/{name,temp1_input}
++/sys/class/hwmon/hwmon9/name:drivetemp
++/sys/class/hwmon/hwmon9/temp1_input:23000
++
++If the drive supports SCT transport and reports temperature limits,
++those are reported as well.
++
++drivetemp-scsi-0-0
++Adapter: SCSI adapter
++temp1:        +27.0°C  (low  =  +0.0°C, high = +60.0°C)
++                       (crit low = -41.0°C, crit = +85.0°C)
++                       (lowest = +23.0°C, highest = +34.0°C)
++
++The driver attempts to use SCT Command Transport to read the drive
++temperature. If the SCT Command Transport feature set is not available,
++or if it does not report the drive temperature, drive temperatures may
++be readable through SMART attributes. Since SMART attributes are not well
++defined, this method is only used as fallback mechanism.
++
++Cc: Chris Healy <cphealy@gmail.com>
++Cc: Linus Walleij <linus.walleij@linaro.org>
++Cc: Martin K. Petersen <martin.petersen@oracle.com>
++Cc: Bart Van Assche <bvanassche@acm.org>
++Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
++Tested-by: Linus Walleij <linus.walleij@linaro.org>
++Signed-off-by: Guenter Roeck <linux@roeck-us.net>
++---
++ Documentation/hwmon/drivetemp.rst |  52 +++
++ Documentation/hwmon/index.rst     |   1 +
++ drivers/hwmon/Kconfig             |  10 +
++ drivers/hwmon/Makefile            |   1 +
++ drivers/hwmon/drivetemp.c         | 574 ++++++++++++++++++++++++++++++
++ 5 files changed, 638 insertions(+)
++ create mode 100644 Documentation/hwmon/drivetemp.rst
++ create mode 100644 drivers/hwmon/drivetemp.c
++
++--- /dev/null
+++++ b/Documentation/hwmon/drivetemp.rst
++@@ -0,0 +1,52 @@
+++.. SPDX-License-Identifier: GPL-2.0
+++
+++Kernel driver drivetemp
+++=======================
+++
+++
+++References
+++----------
+++
+++ANS T13/1699-D
+++Information technology - AT Attachment 8 - ATA/ATAPI Command Set (ATA8-ACS)
+++
+++ANS Project T10/BSR INCITS 513
+++Information technology - SCSI Primary Commands - 4 (SPC-4)
+++
+++ANS Project INCITS 557
+++Information technology - SCSI / ATA Translation - 5 (SAT-5)
+++
+++
+++Description
+++-----------
+++
+++This driver supports reporting the temperature of disk and solid state
+++drives with temperature sensors.
+++
+++If supported, it uses the ATA SCT Command Transport feature to read
+++the current drive temperature and, if available, temperature limits
+++as well as historic minimum and maximum temperatures. If SCT Command
+++Transport is not supported, the driver uses SMART attributes to read
+++the drive temperature.
+++
+++
+++Sysfs entries
+++-------------
+++
+++Only the temp1_input attribute is always available. Other attributes are
+++available only if reported by the drive. All temperatures are reported in
+++milli-degrees Celsius.
+++
+++=======================	=====================================================
+++temp1_input		Current drive temperature
+++temp1_lcrit		Minimum temperature limit. Operating the device below
+++			this temperature may cause physical damage to the
+++			device.
+++temp1_min		Minimum recommended continuous operating limit
+++temp1_max		Maximum recommended continuous operating temperature
+++temp1_crit		Maximum temperature limit. Operating the device above
+++			this temperature may cause physical damage to the
+++			device.
+++temp1_lowest		Minimum temperature seen this power cycle
+++temp1_highest		Maximum temperature seen this power cycle
+++=======================	=====================================================
++--- a/Documentation/hwmon/index.rst
+++++ b/Documentation/hwmon/index.rst
++@@ -45,6 +45,7 @@ Hardware Monitoring Kernel Drivers
++    da9052
++    da9055
++    dme1737
+++   drivetemp
++    ds1621
++    ds620
++    emc1403
++--- a/drivers/hwmon/Kconfig
+++++ b/drivers/hwmon/Kconfig
++@@ -385,6 +385,16 @@ config SENSORS_ATXP1
++ 	  This driver can also be built as a module. If so, the module
++ 	  will be called atxp1.
++ 
+++config SENSORS_DRIVETEMP
+++	tristate "Hard disk drives with temperature sensors"
+++	depends on SCSI && ATA
+++	help
+++	  If you say yes you get support for the temperature sensor on
+++	  hard disk drives.
+++
+++	  This driver can also be built as a module. If so, the module
+++	  will be called satatemp.
+++
++ config SENSORS_DS620
++ 	tristate "Dallas Semiconductor DS620"
++ 	depends on I2C
++--- a/drivers/hwmon/Makefile
+++++ b/drivers/hwmon/Makefile
++@@ -56,6 +56,7 @@ obj-$(CONFIG_SENSORS_DA9052_ADC)+= da905
++ obj-$(CONFIG_SENSORS_DA9055)+= da9055-hwmon.o
++ obj-$(CONFIG_SENSORS_DELL_SMM)	+= dell-smm-hwmon.o
++ obj-$(CONFIG_SENSORS_DME1737)	+= dme1737.o
+++obj-$(CONFIG_SENSORS_DRIVETEMP)	+= drivetemp.o
++ obj-$(CONFIG_SENSORS_DS620)	+= ds620.o
++ obj-$(CONFIG_SENSORS_DS1621)	+= ds1621.o
++ obj-$(CONFIG_SENSORS_EMC1403)	+= emc1403.o
++--- /dev/null
+++++ b/drivers/hwmon/drivetemp.c
++@@ -0,0 +1,574 @@
+++// SPDX-License-Identifier: GPL-2.0
+++/*
+++ * Hwmon client for disk and solid state drives with temperature sensors
+++ * Copyright (C) 2019 Zodiac Inflight Innovations
+++ *
+++ * With input from:
+++ *    Hwmon client for S.M.A.R.T. hard disk drives with temperature sensors.
+++ *    (C) 2018 Linus Walleij
+++ *
+++ *    hwmon: Driver for SCSI/ATA temperature sensors
+++ *    by Constantin Baranov <const@mimas.ru>, submitted September 2009
+++ *
+++ * This drive supports reporting the temperatire of SATA drives. It can be
+++ * easily extended to report the temperature of SCSI drives.
+++ *
+++ * The primary means to read drive temperatures and temperature limits
+++ * for ATA drives is the SCT Command Transport feature set as specified in
+++ * ATA8-ACS.
+++ * It can be used to read the current drive temperature, temperature limits,
+++ * and historic minimum and maximum temperatures. The SCT Command Transport
+++ * feature set is documented in "AT Attachment 8 - ATA/ATAPI Command Set
+++ * (ATA8-ACS)".
+++ *
+++ * If the SCT Command Transport feature set is not available, drive temperatures
+++ * may be readable through SMART attributes. Since SMART attributes are not well
+++ * defined, this method is only used as fallback mechanism.
+++ *
+++ * There are three SMART attributes which may report drive temperatures.
+++ * Those are defined as follows (from
+++ * http://www.cropel.com/library/smart-attribute-list.aspx).
+++ *
+++ * 190	Temperature	Temperature, monitored by a sensor somewhere inside
+++ *			the drive. Raw value typicaly holds the actual
+++ *			temperature (hexadecimal) in its rightmost two digits.
+++ *
+++ * 194	Temperature	Temperature, monitored by a sensor somewhere inside
+++ *			the drive. Raw value typicaly holds the actual
+++ *			temperature (hexadecimal) in its rightmost two digits.
+++ *
+++ * 231	Temperature	Temperature, monitored by a sensor somewhere inside
+++ *			the drive. Raw value typicaly holds the actual
+++ *			temperature (hexadecimal) in its rightmost two digits.
+++ *
+++ * Wikipedia defines attributes a bit differently.
+++ *
+++ * 190	Temperature	Value is equal to (100-temp. °C), allowing manufacturer
+++ *	Difference or	to set a minimum threshold which corresponds to a
+++ *	Airflow		maximum temperature. This also follows the convention of
+++ *	Temperature	100 being a best-case value and lower values being
+++ *			undesirable. However, some older drives may instead
+++ *			report raw Temperature (identical to 0xC2) or
+++ *			Temperature minus 50 here.
+++ * 194	Temperature or	Indicates the device temperature, if the appropriate
+++ *	Temperature	sensor is fitted. Lowest byte of the raw value contains
+++ *	Celsius		the exact temperature value (Celsius degrees).
+++ * 231	Life Left	Indicates the approximate SSD life left, in terms of
+++ *	(SSDs) or	program/erase cycles or available reserved blocks.
+++ *	Temperature	A normalized value of 100 represents a new drive, with
+++ *			a threshold value at 10 indicating a need for
+++ *			replacement. A value of 0 may mean that the drive is
+++ *			operating in read-only mode to allow data recovery.
+++ *			Previously (pre-2010) occasionally used for Drive
+++ *			Temperature (more typically reported at 0xC2).
+++ *
+++ * Common denominator is that the first raw byte reports the temperature
+++ * in degrees C on almost all drives. Some drives may report a fractional
+++ * temperature in the second raw byte.
+++ *
+++ * Known exceptions (from libatasmart):
+++ * - SAMSUNG SV0412H and SAMSUNG SV1204H) report the temperature in 10th
+++ *   degrees C in the first two raw bytes.
+++ * - A few Maxtor drives report an unknown or bad value in attribute 194.
+++ * - Certain Apple SSD drives report an unknown value in attribute 190.
+++ *   Only certain firmware versions are affected.
+++ *
+++ * Those exceptions affect older ATA drives and are currently ignored.
+++ * Also, the second raw byte (possibly reporting the fractional temperature)
+++ * is currently ignored.
+++ *
+++ * Many drives also report temperature limits in additional SMART data raw
+++ * bytes. The format of those is not well defined and varies widely.
+++ * The driver does not currently attempt to report those limits.
+++ *
+++ * According to data in smartmontools, attribute 231 is rarely used to report
+++ * drive temperatures. At the same time, several drives report SSD life left
+++ * in attribute 231, but do not support temperature sensors. For this reason,
+++ * attribute 231 is currently ignored.
+++ *
+++ * Following above definitions, temperatures are reported as follows.
+++ *   If SCT Command Transport is supported, it is used to read the
+++ *   temperature and, if available, temperature limits.
+++ * - Otherwise, if SMART attribute 194 is supported, it is used to read
+++ *   the temperature.
+++ * - Otherwise, if SMART attribute 190 is supported, it is used to read
+++ *   the temperature.
+++ */
+++
+++#include <linux/ata.h>
+++#include <linux/bits.h>
+++#include <linux/device.h>
+++#include <linux/hwmon.h>
+++#include <linux/kernel.h>
+++#include <linux/list.h>
+++#include <linux/module.h>
+++#include <linux/mutex.h>
+++#include <scsi/scsi_cmnd.h>
+++#include <scsi/scsi_device.h>
+++#include <scsi/scsi_driver.h>
+++#include <scsi/scsi_proto.h>
+++
+++struct drivetemp_data {
+++	struct list_head list;		/* list of instantiated devices */
+++	struct mutex lock;		/* protect data buffer accesses */
+++	struct scsi_device *sdev;	/* SCSI device */
+++	struct device *dev;		/* instantiating device */
+++	struct device *hwdev;		/* hardware monitoring device */
+++	u8 smartdata[ATA_SECT_SIZE];	/* local buffer */
+++	int (*get_temp)(struct drivetemp_data *st, u32 attr, long *val);
+++	bool have_temp_lowest;		/* lowest temp in SCT status */
+++	bool have_temp_highest;		/* highest temp in SCT status */
+++	bool have_temp_min;		/* have min temp */
+++	bool have_temp_max;		/* have max temp */
+++	bool have_temp_lcrit;		/* have lower critical limit */
+++	bool have_temp_crit;		/* have critical limit */
+++	int temp_min;			/* min temp */
+++	int temp_max;			/* max temp */
+++	int temp_lcrit;			/* lower critical limit */
+++	int temp_crit;			/* critical limit */
+++};
+++
+++static LIST_HEAD(drivetemp_devlist);
+++
+++#define ATA_MAX_SMART_ATTRS	30
+++#define SMART_TEMP_PROP_190	190
+++#define SMART_TEMP_PROP_194	194
+++
+++#define SCT_STATUS_REQ_ADDR	0xe0
+++#define  SCT_STATUS_VERSION_LOW		0	/* log byte offsets */
+++#define  SCT_STATUS_VERSION_HIGH	1
+++#define  SCT_STATUS_TEMP		200
+++#define  SCT_STATUS_TEMP_LOWEST		201
+++#define  SCT_STATUS_TEMP_HIGHEST	202
+++#define SCT_READ_LOG_ADDR	0xe1
+++#define  SMART_READ_LOG			0xd5
+++#define  SMART_WRITE_LOG		0xd6
+++
+++#define INVALID_TEMP		0x80
+++
+++#define temp_is_valid(temp)	((temp) != INVALID_TEMP)
+++#define temp_from_sct(temp)	(((s8)(temp)) * 1000)
+++
+++static inline bool ata_id_smart_supported(u16 *id)
+++{
+++	return id[ATA_ID_COMMAND_SET_1] & BIT(0);
+++}
+++
+++static inline bool ata_id_smart_enabled(u16 *id)
+++{
+++	return id[ATA_ID_CFS_ENABLE_1] & BIT(0);
+++}
+++
+++static int drivetemp_scsi_command(struct drivetemp_data *st,
+++				 u8 ata_command, u8 feature,
+++				 u8 lba_low, u8 lba_mid, u8 lba_high)
+++{
+++	u8 scsi_cmd[MAX_COMMAND_SIZE];
+++	int data_dir;
+++
+++	memset(scsi_cmd, 0, sizeof(scsi_cmd));
+++	scsi_cmd[0] = ATA_16;
+++	if (ata_command == ATA_CMD_SMART && feature == SMART_WRITE_LOG) {
+++		scsi_cmd[1] = (5 << 1);	/* PIO Data-out */
+++		/*
+++		 * No off.line or cc, write to dev, block count in sector count
+++		 * field.
+++		 */
+++		scsi_cmd[2] = 0x06;
+++		data_dir = DMA_TO_DEVICE;
+++	} else {
+++		scsi_cmd[1] = (4 << 1);	/* PIO Data-in */
+++		/*
+++		 * No off.line or cc, read from dev, block count in sector count
+++		 * field.
+++		 */
+++		scsi_cmd[2] = 0x0e;
+++		data_dir = DMA_FROM_DEVICE;
+++	}
+++	scsi_cmd[4] = feature;
+++	scsi_cmd[6] = 1;	/* 1 sector */
+++	scsi_cmd[8] = lba_low;
+++	scsi_cmd[10] = lba_mid;
+++	scsi_cmd[12] = lba_high;
+++	scsi_cmd[14] = ata_command;
+++
+++	return scsi_execute_req(st->sdev, scsi_cmd, data_dir,
+++				st->smartdata, ATA_SECT_SIZE, NULL, HZ, 5,
+++				NULL);
+++}
+++
+++static int drivetemp_ata_command(struct drivetemp_data *st, u8 feature,
+++				 u8 select)
+++{
+++	return drivetemp_scsi_command(st, ATA_CMD_SMART, feature, select,
+++				     ATA_SMART_LBAM_PASS, ATA_SMART_LBAH_PASS);
+++}
+++
+++static int drivetemp_get_smarttemp(struct drivetemp_data *st, u32 attr,
+++				  long *temp)
+++{
+++	u8 *buf = st->smartdata;
+++	bool have_temp = false;
+++	u8 temp_raw;
+++	u8 csum;
+++	int err;
+++	int i;
+++
+++	err = drivetemp_ata_command(st, ATA_SMART_READ_VALUES, 0);
+++	if (err)
+++		return err;
+++
+++	/* Checksum the read value table */
+++	csum = 0;
+++	for (i = 0; i < ATA_SECT_SIZE; i++)
+++		csum += buf[i];
+++	if (csum) {
+++		dev_dbg(&st->sdev->sdev_gendev,
+++			"checksum error reading SMART values\n");
+++		return -EIO;
+++	}
+++
+++	for (i = 0; i < ATA_MAX_SMART_ATTRS; i++) {
+++		u8 *attr = buf + i * 12;
+++		int id = attr[2];
+++
+++		if (!id)
+++			continue;
+++
+++		if (id == SMART_TEMP_PROP_190) {
+++			temp_raw = attr[7];
+++			have_temp = true;
+++		}
+++		if (id == SMART_TEMP_PROP_194) {
+++			temp_raw = attr[7];
+++			have_temp = true;
+++			break;
+++		}
+++	}
+++
+++	if (have_temp) {
+++		*temp = temp_raw * 1000;
+++		return 0;
+++	}
+++
+++	return -ENXIO;
+++}
+++
+++static int drivetemp_get_scttemp(struct drivetemp_data *st, u32 attr, long *val)
+++{
+++	u8 *buf = st->smartdata;
+++	int err;
+++
+++	err = drivetemp_ata_command(st, SMART_READ_LOG, SCT_STATUS_REQ_ADDR);
+++	if (err)
+++		return err;
+++	switch (attr) {
+++	case hwmon_temp_input:
+++		*val = temp_from_sct(buf[SCT_STATUS_TEMP]);
+++		break;
+++	case hwmon_temp_lowest:
+++		*val = temp_from_sct(buf[SCT_STATUS_TEMP_LOWEST]);
+++		break;
+++	case hwmon_temp_highest:
+++		*val = temp_from_sct(buf[SCT_STATUS_TEMP_HIGHEST]);
+++		break;
+++	default:
+++		err = -EINVAL;
+++		break;
+++	}
+++	return err;
+++}
+++
+++static int drivetemp_identify_sata(struct drivetemp_data *st)
+++{
+++	struct scsi_device *sdev = st->sdev;
+++	u8 *buf = st->smartdata;
+++	struct scsi_vpd *vpd;
+++	bool is_ata, is_sata;
+++	bool have_sct_data_table;
+++	bool have_sct_temp;
+++	bool have_smart;
+++	bool have_sct;
+++	u16 *ata_id;
+++	u16 version;
+++	long temp;
+++	int err;
+++
+++	/* SCSI-ATA Translation present? */
+++	rcu_read_lock();
+++	vpd = rcu_dereference(sdev->vpd_pg89);
+++
+++	/*
+++	 * Verify that ATA IDENTIFY DEVICE data is included in ATA Information
+++	 * VPD and that the drive implements the SATA protocol.
+++	 */
+++	if (!vpd || vpd->len < 572 || vpd->data[56] != ATA_CMD_ID_ATA ||
+++	    vpd->data[36] != 0x34) {
+++		rcu_read_unlock();
+++		return -ENODEV;
+++	}
+++	ata_id = (u16 *)&vpd->data[60];
+++	is_ata = ata_id_is_ata(ata_id);
+++	is_sata = ata_id_is_sata(ata_id);
+++	have_sct = ata_id_sct_supported(ata_id);
+++	have_sct_data_table = ata_id_sct_data_tables(ata_id);
+++	have_smart = ata_id_smart_supported(ata_id) &&
+++				ata_id_smart_enabled(ata_id);
+++
+++	rcu_read_unlock();
+++
+++	/* bail out if this is not a SATA device */
+++	if (!is_ata || !is_sata)
+++		return -ENODEV;
+++	if (!have_sct)
+++		goto skip_sct;
+++
+++	err = drivetemp_ata_command(st, SMART_READ_LOG, SCT_STATUS_REQ_ADDR);
+++	if (err)
+++		goto skip_sct;
+++
+++	version = (buf[SCT_STATUS_VERSION_HIGH] << 8) |
+++		  buf[SCT_STATUS_VERSION_LOW];
+++	if (version != 2 && version != 3)
+++		goto skip_sct;
+++
+++	have_sct_temp = temp_is_valid(buf[SCT_STATUS_TEMP]);
+++	if (!have_sct_temp)
+++		goto skip_sct;
+++
+++	st->have_temp_lowest = temp_is_valid(buf[SCT_STATUS_TEMP_LOWEST]);
+++	st->have_temp_highest = temp_is_valid(buf[SCT_STATUS_TEMP_HIGHEST]);
+++
+++	if (!have_sct_data_table)
+++		goto skip_sct;
+++
+++	/* Request and read temperature history table */
+++	memset(buf, '\0', sizeof(st->smartdata));
+++	buf[0] = 5;	/* data table command */
+++	buf[2] = 1;	/* read table */
+++	buf[4] = 2;	/* temperature history table */
+++
+++	err = drivetemp_ata_command(st, SMART_WRITE_LOG, SCT_STATUS_REQ_ADDR);
+++	if (err)
+++		goto skip_sct_data;
+++
+++	err = drivetemp_ata_command(st, SMART_READ_LOG, SCT_READ_LOG_ADDR);
+++	if (err)
+++		goto skip_sct_data;
+++
+++	/*
+++	 * Temperature limits per AT Attachment 8 -
+++	 * ATA/ATAPI Command Set (ATA8-ACS)
+++	 */
+++	st->have_temp_max = temp_is_valid(buf[6]);
+++	st->have_temp_crit = temp_is_valid(buf[7]);
+++	st->have_temp_min = temp_is_valid(buf[8]);
+++	st->have_temp_lcrit = temp_is_valid(buf[9]);
+++
+++	st->temp_max = temp_from_sct(buf[6]);
+++	st->temp_crit = temp_from_sct(buf[7]);
+++	st->temp_min = temp_from_sct(buf[8]);
+++	st->temp_lcrit = temp_from_sct(buf[9]);
+++
+++skip_sct_data:
+++	if (have_sct_temp) {
+++		st->get_temp = drivetemp_get_scttemp;
+++		return 0;
+++	}
+++skip_sct:
+++	if (!have_smart)
+++		return -ENODEV;
+++	st->get_temp = drivetemp_get_smarttemp;
+++	return drivetemp_get_smarttemp(st, hwmon_temp_input, &temp);
+++}
+++
+++static int drivetemp_identify(struct drivetemp_data *st)
+++{
+++	struct scsi_device *sdev = st->sdev;
+++
+++	/* Bail out immediately if there is no inquiry data */
+++	if (!sdev->inquiry || sdev->inquiry_len < 16)
+++		return -ENODEV;
+++
+++	/* Disk device? */
+++	if (sdev->type != TYPE_DISK && sdev->type != TYPE_ZBC)
+++		return -ENODEV;
+++
+++	return drivetemp_identify_sata(st);
+++}
+++
+++static int drivetemp_read(struct device *dev, enum hwmon_sensor_types type,
+++			 u32 attr, int channel, long *val)
+++{
+++	struct drivetemp_data *st = dev_get_drvdata(dev);
+++	int err = 0;
+++
+++	if (type != hwmon_temp)
+++		return -EINVAL;
+++
+++	switch (attr) {
+++	case hwmon_temp_input:
+++	case hwmon_temp_lowest:
+++	case hwmon_temp_highest:
+++		mutex_lock(&st->lock);
+++		err = st->get_temp(st, attr, val);
+++		mutex_unlock(&st->lock);
+++		break;
+++	case hwmon_temp_lcrit:
+++		*val = st->temp_lcrit;
+++		break;
+++	case hwmon_temp_min:
+++		*val = st->temp_min;
+++		break;
+++	case hwmon_temp_max:
+++		*val = st->temp_max;
+++		break;
+++	case hwmon_temp_crit:
+++		*val = st->temp_crit;
+++		break;
+++	default:
+++		err = -EINVAL;
+++		break;
+++	}
+++	return err;
+++}
+++
+++static umode_t drivetemp_is_visible(const void *data,
+++				   enum hwmon_sensor_types type,
+++				   u32 attr, int channel)
+++{
+++	const struct drivetemp_data *st = data;
+++
+++	switch (type) {
+++	case hwmon_temp:
+++		switch (attr) {
+++		case hwmon_temp_input:
+++			return 0444;
+++		case hwmon_temp_lowest:
+++			if (st->have_temp_lowest)
+++				return 0444;
+++			break;
+++		case hwmon_temp_highest:
+++			if (st->have_temp_highest)
+++				return 0444;
+++			break;
+++		case hwmon_temp_min:
+++			if (st->have_temp_min)
+++				return 0444;
+++			break;
+++		case hwmon_temp_max:
+++			if (st->have_temp_max)
+++				return 0444;
+++			break;
+++		case hwmon_temp_lcrit:
+++			if (st->have_temp_lcrit)
+++				return 0444;
+++			break;
+++		case hwmon_temp_crit:
+++			if (st->have_temp_crit)
+++				return 0444;
+++			break;
+++		default:
+++			break;
+++		}
+++		break;
+++	default:
+++		break;
+++	}
+++	return 0;
+++}
+++
+++static const struct hwmon_channel_info *drivetemp_info[] = {
+++	HWMON_CHANNEL_INFO(chip,
+++			   HWMON_C_REGISTER_TZ),
+++	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT |
+++			   HWMON_T_LOWEST | HWMON_T_HIGHEST |
+++			   HWMON_T_MIN | HWMON_T_MAX |
+++			   HWMON_T_LCRIT | HWMON_T_CRIT),
+++	NULL
+++};
+++
+++static const struct hwmon_ops drivetemp_ops = {
+++	.is_visible = drivetemp_is_visible,
+++	.read = drivetemp_read,
+++};
+++
+++static const struct hwmon_chip_info drivetemp_chip_info = {
+++	.ops = &drivetemp_ops,
+++	.info = drivetemp_info,
+++};
+++
+++/*
+++ * The device argument points to sdev->sdev_dev. Its parent is
+++ * sdev->sdev_gendev, which we can use to get the scsi_device pointer.
+++ */
+++static int drivetemp_add(struct device *dev, struct class_interface *intf)
+++{
+++	struct scsi_device *sdev = to_scsi_device(dev->parent);
+++	struct drivetemp_data *st;
+++	int err;
+++
+++	st = kzalloc(sizeof(*st), GFP_KERNEL);
+++	if (!st)
+++		return -ENOMEM;
+++
+++	st->sdev = sdev;
+++	st->dev = dev;
+++	mutex_init(&st->lock);
+++
+++	if (drivetemp_identify(st)) {
+++		err = -ENODEV;
+++		goto abort;
+++	}
+++
+++	st->hwdev = hwmon_device_register_with_info(dev->parent, "drivetemp",
+++						    st, &drivetemp_chip_info,
+++						    NULL);
+++	if (IS_ERR(st->hwdev)) {
+++		err = PTR_ERR(st->hwdev);
+++		goto abort;
+++	}
+++
+++	list_add(&st->list, &drivetemp_devlist);
+++	return 0;
+++
+++abort:
+++	kfree(st);
+++	return err;
+++}
+++
+++static void drivetemp_remove(struct device *dev, struct class_interface *intf)
+++{
+++	struct drivetemp_data *st, *tmp;
+++
+++	list_for_each_entry_safe(st, tmp, &drivetemp_devlist, list) {
+++		if (st->dev == dev) {
+++			list_del(&st->list);
+++			hwmon_device_unregister(st->hwdev);
+++			kfree(st);
+++			break;
+++		}
+++	}
+++}
+++
+++static struct class_interface drivetemp_interface = {
+++	.add_dev = drivetemp_add,
+++	.remove_dev = drivetemp_remove,
+++};
+++
+++static int __init drivetemp_init(void)
+++{
+++	return scsi_register_interface(&drivetemp_interface);
+++}
+++
+++static void __exit drivetemp_exit(void)
+++{
+++	scsi_unregister_interface(&drivetemp_interface);
+++}
+++
+++module_init(drivetemp_init);
+++module_exit(drivetemp_exit);
+++
+++MODULE_AUTHOR("Guenter Roeck <linus@roeck-us.net>");
+++MODULE_DESCRIPTION("Hard drive temperature monitor");
+++MODULE_LICENSE("GPL");
+diff --git a/target/linux/generic/backport-5.4/801-v5.6-leds-populate-the-device-s-of_node.patch b/target/linux/generic/backport-5.4/801-v5.6-leds-populate-the-device-s-of_node.patch
+new file mode 100644
+index 0000000000..5c3b58c436
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/801-v5.6-leds-populate-the-device-s-of_node.patch
+@@ -0,0 +1,36 @@
++From 7a349e8c535d7327bf80710323c725df47149b8d Mon Sep 17 00:00:00 2001
++From: Jean-Jacques Hiblot <jjhiblot@ti.com>
++Date: Sun, 5 Jan 2020 23:31:14 +0100
++Subject: [PATCH] leds: populate the device's of_node
++
++If initialization data is available and its fwnode is actually a
++of_node, store this information in the led device's structure. This
++will allow the device to use or provide OF-based API such (devm_xxx).
++
++Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
++Signed-off-by: Pavel Machek <pavel@ucw.cz>
++[backport to 5.4]
++---
++
++--- a/drivers/leds/led-class.c
+++++ b/drivers/leds/led-class.c
++@@ -19,6 +19,7 @@
++ #include <linux/spinlock.h>
++ #include <linux/timer.h>
++ #include <uapi/linux/uleds.h>
+++#include <linux/of.h>
++ #include "leds.h"
++ 
++ static struct class *leds_class;
++@@ -277,8 +278,10 @@ int led_classdev_register_ext(struct dev
++ 		mutex_unlock(&led_cdev->led_access);
++ 		return PTR_ERR(led_cdev->dev);
++ 	}
++-	if (init_data && init_data->fwnode)
+++	if (init_data && init_data->fwnode) {
++ 		led_cdev->dev->fwnode = init_data->fwnode;
+++		led_cdev->dev->of_node = to_of_node(init_data->fwnode);
+++	}
++ 
++ 	if (ret)
++ 		dev_warn(parent, "Led %s renamed to %s due to name collision",
+diff --git a/target/linux/generic/backport-5.4/803-v5.8-i2c-pxa-use-official-address-byte-helper.patch b/target/linux/generic/backport-5.4/803-v5.8-i2c-pxa-use-official-address-byte-helper.patch
+new file mode 100644
+index 0000000000..a937b52d9d
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/803-v5.8-i2c-pxa-use-official-address-byte-helper.patch
+@@ -0,0 +1,59 @@
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Bcc: linux@mail.armlinux.org.uk
++Cc: linux-i2c@vger.kernel.org
++Subject: [PATCH 01/17] i2c: pxa: use official address byte helper
++MIME-Version: 1.0
++Content-Disposition: inline
++Content-Transfer-Encoding: 8bit
++Content-Type: text/plain; charset="utf-8"
++
++i2c-pxa was created before i2c_8bit_addr_from_msg() was implemented,
++and used its own i2c_pxa_addr_byte() which is functionally the same.
++Sadly, it was never updated to use this new helper. Switch it over.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/i2c/busses/i2c-pxa.c | 21 +++++++--------------
++ 1 file changed, 7 insertions(+), 14 deletions(-)
++
++--- a/drivers/i2c/busses/i2c-pxa.c
+++++ b/drivers/i2c/busses/i2c-pxa.c
++@@ -674,16 +674,6 @@ static void i2c_pxa_slave_stop(struct px
++  * PXA I2C Master mode
++  */
++ 
++-static inline unsigned int i2c_pxa_addr_byte(struct i2c_msg *msg)
++-{
++-	unsigned int addr = (msg->addr & 0x7f) << 1;
++-
++-	if (msg->flags & I2C_M_RD)
++-		addr |= 1;
++-
++-	return addr;
++-}
++-
++ static inline void i2c_pxa_start_message(struct pxa_i2c *i2c)
++ {
++ 	u32 icr;
++@@ -691,8 +681,8 @@ static inline void i2c_pxa_start_message
++ 	/*
++ 	 * Step 1: target slave address into IDBR
++ 	 */
++-	writel(i2c_pxa_addr_byte(i2c->msg), _IDBR(i2c));
++-	i2c->req_slave_addr = i2c_pxa_addr_byte(i2c->msg);
+++	i2c->req_slave_addr = i2c_8bit_addr_from_msg(i2c->msg);
+++	writel(i2c->req_slave_addr, _IDBR(i2c));
++ 
++ 	/*
++ 	 * Step 2: initiate the write.
++@@ -1003,8 +993,8 @@ static void i2c_pxa_irq_txempty(struct p
++ 		/*
++ 		 * Write the next address.
++ 		 */
++-		writel(i2c_pxa_addr_byte(i2c->msg), _IDBR(i2c));
++-		i2c->req_slave_addr = i2c_pxa_addr_byte(i2c->msg);
+++		i2c->req_slave_addr = i2c_8bit_addr_from_msg(i2c->msg);
+++		writel(i2c->req_slave_addr, _IDBR(i2c));
++ 
++ 		/*
++ 		 * And trigger a repeated start, and send the byte.
+diff --git a/target/linux/generic/backport-5.4/804-v5.8-i2c-pxa-remove-unneeded-includes.patch b/target/linux/generic/backport-5.4/804-v5.8-i2c-pxa-remove-unneeded-includes.patch
+new file mode 100644
+index 0000000000..6a911325dd
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/804-v5.8-i2c-pxa-remove-unneeded-includes.patch
+@@ -0,0 +1,37 @@
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Bcc: linux@mail.armlinux.org.uk
++Cc: linux-i2c@vger.kernel.org
++Subject: [PATCH 02/17] i2c: pxa: remove unneeded includes
++MIME-Version: 1.0
++Content-Disposition: inline
++Content-Transfer-Encoding: 8bit
++Content-Type: text/plain; charset="utf-8"
++
++i2c-pxa does not need linux/sched.h nor linux/time.h includes, so
++remove these.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/i2c/busses/i2c-pxa.c | 4 ----
++ 1 file changed, 4 deletions(-)
++
++--- a/drivers/i2c/busses/i2c-pxa.c
+++++ b/drivers/i2c/busses/i2c-pxa.c
++@@ -20,8 +20,6 @@
++ #include <linux/module.h>
++ #include <linux/i2c.h>
++ #include <linux/init.h>
++-#include <linux/time.h>
++-#include <linux/sched.h>
++ #include <linux/delay.h>
++ #include <linux/errno.h>
++ #include <linux/interrupt.h>
++@@ -35,8 +33,6 @@
++ #include <linux/io.h>
++ #include <linux/platform_data/i2c-pxa.h>
++ 
++-#include <asm/irq.h>
++-
++ struct pxa_reg_layout {
++ 	u32 ibmr;
++ 	u32 idbr;
+diff --git a/target/linux/generic/backport-5.4/805-v5.8-i2c-pxa-re-arrange-includes-to-be-in-alphabetical-or.patch b/target/linux/generic/backport-5.4/805-v5.8-i2c-pxa-re-arrange-includes-to-be-in-alphabetical-or.patch
+new file mode 100644
+index 0000000000..4d6dc7f071
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/805-v5.8-i2c-pxa-re-arrange-includes-to-be-in-alphabetical-or.patch
+@@ -0,0 +1,52 @@
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Bcc: linux@mail.armlinux.org.uk
++Cc: linux-i2c@vger.kernel.org
++Subject: [PATCH 03/17] i2c: pxa: re-arrange includes to be in alphabetical
++ order
++MIME-Version: 1.0
++Content-Disposition: inline
++Content-Transfer-Encoding: 8bit
++Content-Type: text/plain; charset="utf-8"
++
++Arrange the includes to be in alphabetical order to help avoid
++duplicated includes.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/i2c/busses/i2c-pxa.c | 18 +++++++++---------
++ 1 file changed, 9 insertions(+), 9 deletions(-)
++
++--- a/drivers/i2c/busses/i2c-pxa.c
+++++ b/drivers/i2c/busses/i2c-pxa.c
++@@ -16,22 +16,22 @@
++  *    Dec 2004: Added support for PXA27x and slave device probing [Liam Girdwood]
++  *    Feb 2005: Rework slave mode handling [RMK]
++  */
++-#include <linux/kernel.h>
++-#include <linux/module.h>
++-#include <linux/i2c.h>
++-#include <linux/init.h>
+++#include <linux/clk.h>
++ #include <linux/delay.h>
+++#include <linux/err.h>
++ #include <linux/errno.h>
++-#include <linux/interrupt.h>
+++#include <linux/i2c.h>
++ #include <linux/i2c-pxa.h>
+++#include <linux/init.h>
+++#include <linux/interrupt.h>
+++#include <linux/io.h>
+++#include <linux/kernel.h>
+++#include <linux/module.h>
++ #include <linux/of.h>
++ #include <linux/of_device.h>
++ #include <linux/platform_device.h>
++-#include <linux/err.h>
++-#include <linux/clk.h>
++-#include <linux/slab.h>
++-#include <linux/io.h>
++ #include <linux/platform_data/i2c-pxa.h>
+++#include <linux/slab.h>
++ 
++ struct pxa_reg_layout {
++ 	u32 ibmr;
+diff --git a/target/linux/generic/backport-5.4/806-v5.8-i2c-pxa-re-arrange-functions-to-flow-better.patch b/target/linux/generic/backport-5.4/806-v5.8-i2c-pxa-re-arrange-functions-to-flow-better.patch
+new file mode 100644
+index 0000000000..9f09f9dacb
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/806-v5.8-i2c-pxa-re-arrange-functions-to-flow-better.patch
+@@ -0,0 +1,380 @@
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Bcc: linux@mail.armlinux.org.uk
++Cc: linux-i2c@vger.kernel.org
++Subject: [PATCH 04/17] i2c: pxa: re-arrange functions to flow better
++MIME-Version: 1.0
++Content-Disposition: inline
++Content-Transfer-Encoding: 8bit
++Content-Type: text/plain; charset="utf-8"
++
++Re-arrange the PXA I2C code to avoid forward declarations, and keep
++similar functionality (e.g. the non-IRQ mode support) together. This
++improves code readability.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/i2c/busses/i2c-pxa.c | 325 +++++++++++++++++------------------
++ 1 file changed, 162 insertions(+), 163 deletions(-)
++
++--- a/drivers/i2c/busses/i2c-pxa.c
+++++ b/drivers/i2c/busses/i2c-pxa.c
++@@ -326,7 +326,6 @@ static void i2c_pxa_scream_blue_murder(s
++ #endif /* ifdef DEBUG / else */
++ 
++ static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret);
++-static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id);
++ 
++ static inline int i2c_pxa_is_slavemode(struct pxa_i2c *i2c)
++ {
++@@ -697,34 +696,6 @@ static inline void i2c_pxa_stop_message(
++ 	writel(icr, _ICR(i2c));
++ }
++ 
++-static int i2c_pxa_pio_set_master(struct pxa_i2c *i2c)
++-{
++-	/* make timeout the same as for interrupt based functions */
++-	long timeout = 2 * DEF_TIMEOUT;
++-
++-	/*
++-	 * Wait for the bus to become free.
++-	 */
++-	while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB)) {
++-		udelay(1000);
++-		show_state(i2c);
++-	}
++-
++-	if (timeout < 0) {
++-		show_state(i2c);
++-		dev_err(&i2c->adap.dev,
++-			"i2c_pxa: timeout waiting for bus free\n");
++-		return I2C_RETRY;
++-	}
++-
++-	/*
++-	 * Set master mode.
++-	 */
++-	writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));
++-
++-	return 0;
++-}
++-
++ /*
++  * PXA I2C send master code
++  * 1. Load master code to IDBR and send it.
++@@ -753,140 +724,6 @@ static int i2c_pxa_send_mastercode(struc
++ 	return (timeout == 0) ? I2C_RETRY : 0;
++ }
++ 
++-static int i2c_pxa_do_pio_xfer(struct pxa_i2c *i2c,
++-			       struct i2c_msg *msg, int num)
++-{
++-	unsigned long timeout = 500000; /* 5 seconds */
++-	int ret = 0;
++-
++-	ret = i2c_pxa_pio_set_master(i2c);
++-	if (ret)
++-		goto out;
++-
++-	i2c->msg = msg;
++-	i2c->msg_num = num;
++-	i2c->msg_idx = 0;
++-	i2c->msg_ptr = 0;
++-	i2c->irqlogidx = 0;
++-
++-	i2c_pxa_start_message(i2c);
++-
++-	while (i2c->msg_num > 0 && --timeout) {
++-		i2c_pxa_handler(0, i2c);
++-		udelay(10);
++-	}
++-
++-	i2c_pxa_stop_message(i2c);
++-
++-	/*
++-	 * We place the return code in i2c->msg_idx.
++-	 */
++-	ret = i2c->msg_idx;
++-
++-out:
++-	if (timeout == 0) {
++-		i2c_pxa_scream_blue_murder(i2c, "timeout");
++-		ret = I2C_RETRY;
++-	}
++-
++-	return ret;
++-}
++-
++-/*
++- * We are protected by the adapter bus mutex.
++- */
++-static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
++-{
++-	long timeout;
++-	int ret;
++-
++-	/*
++-	 * Wait for the bus to become free.
++-	 */
++-	ret = i2c_pxa_wait_bus_not_busy(i2c);
++-	if (ret) {
++-		dev_err(&i2c->adap.dev, "i2c_pxa: timeout waiting for bus free\n");
++-		goto out;
++-	}
++-
++-	/*
++-	 * Set master mode.
++-	 */
++-	ret = i2c_pxa_set_master(i2c);
++-	if (ret) {
++-		dev_err(&i2c->adap.dev, "i2c_pxa_set_master: error %d\n", ret);
++-		goto out;
++-	}
++-
++-	if (i2c->high_mode) {
++-		ret = i2c_pxa_send_mastercode(i2c);
++-		if (ret) {
++-			dev_err(&i2c->adap.dev, "i2c_pxa_send_mastercode timeout\n");
++-			goto out;
++-			}
++-	}
++-
++-	spin_lock_irq(&i2c->lock);
++-
++-	i2c->msg = msg;
++-	i2c->msg_num = num;
++-	i2c->msg_idx = 0;
++-	i2c->msg_ptr = 0;
++-	i2c->irqlogidx = 0;
++-
++-	i2c_pxa_start_message(i2c);
++-
++-	spin_unlock_irq(&i2c->lock);
++-
++-	/*
++-	 * The rest of the processing occurs in the interrupt handler.
++-	 */
++-	timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
++-	i2c_pxa_stop_message(i2c);
++-
++-	/*
++-	 * We place the return code in i2c->msg_idx.
++-	 */
++-	ret = i2c->msg_idx;
++-
++-	if (!timeout && i2c->msg_num) {
++-		i2c_pxa_scream_blue_murder(i2c, "timeout");
++-		ret = I2C_RETRY;
++-	}
++-
++- out:
++-	return ret;
++-}
++-
++-static int i2c_pxa_pio_xfer(struct i2c_adapter *adap,
++-			    struct i2c_msg msgs[], int num)
++-{
++-	struct pxa_i2c *i2c = adap->algo_data;
++-	int ret, i;
++-
++-	/* If the I2C controller is disabled we need to reset it
++-	  (probably due to a suspend/resume destroying state). We do
++-	  this here as we can then avoid worrying about resuming the
++-	  controller before its users. */
++-	if (!(readl(_ICR(i2c)) & ICR_IUE))
++-		i2c_pxa_reset(i2c);
++-
++-	for (i = adap->retries; i >= 0; i--) {
++-		ret = i2c_pxa_do_pio_xfer(i2c, msgs, num);
++-		if (ret != I2C_RETRY)
++-			goto out;
++-
++-		if (i2c_debug)
++-			dev_dbg(&adap->dev, "Retrying transmission\n");
++-		udelay(100);
++-	}
++-	i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
++-	ret = -EREMOTEIO;
++- out:
++-	i2c_pxa_set_slave(i2c, ret);
++-	return ret;
++-}
++-
++ /*
++  * i2c_pxa_master_complete - complete the message and wake up.
++  */
++@@ -1093,6 +930,71 @@ static irqreturn_t i2c_pxa_handler(int t
++ 	return IRQ_HANDLED;
++ }
++ 
+++/*
+++ * We are protected by the adapter bus mutex.
+++ */
+++static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
+++{
+++	long timeout;
+++	int ret;
+++
+++	/*
+++	 * Wait for the bus to become free.
+++	 */
+++	ret = i2c_pxa_wait_bus_not_busy(i2c);
+++	if (ret) {
+++		dev_err(&i2c->adap.dev, "i2c_pxa: timeout waiting for bus free\n");
+++		goto out;
+++	}
+++
+++	/*
+++	 * Set master mode.
+++	 */
+++	ret = i2c_pxa_set_master(i2c);
+++	if (ret) {
+++		dev_err(&i2c->adap.dev, "i2c_pxa_set_master: error %d\n", ret);
+++		goto out;
+++	}
+++
+++	if (i2c->high_mode) {
+++		ret = i2c_pxa_send_mastercode(i2c);
+++		if (ret) {
+++			dev_err(&i2c->adap.dev, "i2c_pxa_send_mastercode timeout\n");
+++			goto out;
+++			}
+++	}
+++
+++	spin_lock_irq(&i2c->lock);
+++
+++	i2c->msg = msg;
+++	i2c->msg_num = num;
+++	i2c->msg_idx = 0;
+++	i2c->msg_ptr = 0;
+++	i2c->irqlogidx = 0;
+++
+++	i2c_pxa_start_message(i2c);
+++
+++	spin_unlock_irq(&i2c->lock);
+++
+++	/*
+++	 * The rest of the processing occurs in the interrupt handler.
+++	 */
+++	timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
+++	i2c_pxa_stop_message(i2c);
+++
+++	/*
+++	 * We place the return code in i2c->msg_idx.
+++	 */
+++	ret = i2c->msg_idx;
+++
+++	if (!timeout && i2c->msg_num) {
+++		i2c_pxa_scream_blue_murder(i2c, "timeout");
+++		ret = I2C_RETRY;
+++	}
+++
+++ out:
+++	return ret;
+++}
++ 
++ static int i2c_pxa_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
++ {
++@@ -1126,6 +1028,103 @@ static const struct i2c_algorithm i2c_px
++ 	.functionality	= i2c_pxa_functionality,
++ };
++ 
+++/* Non-interrupt mode support */
+++static int i2c_pxa_pio_set_master(struct pxa_i2c *i2c)
+++{
+++	/* make timeout the same as for interrupt based functions */
+++	long timeout = 2 * DEF_TIMEOUT;
+++
+++	/*
+++	 * Wait for the bus to become free.
+++	 */
+++	while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB)) {
+++		udelay(1000);
+++		show_state(i2c);
+++	}
+++
+++	if (timeout < 0) {
+++		show_state(i2c);
+++		dev_err(&i2c->adap.dev,
+++			"i2c_pxa: timeout waiting for bus free\n");
+++		return I2C_RETRY;
+++	}
+++
+++	/*
+++	 * Set master mode.
+++	 */
+++	writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));
+++
+++	return 0;
+++}
+++
+++static int i2c_pxa_do_pio_xfer(struct pxa_i2c *i2c,
+++			       struct i2c_msg *msg, int num)
+++{
+++	unsigned long timeout = 500000; /* 5 seconds */
+++	int ret = 0;
+++
+++	ret = i2c_pxa_pio_set_master(i2c);
+++	if (ret)
+++		goto out;
+++
+++	i2c->msg = msg;
+++	i2c->msg_num = num;
+++	i2c->msg_idx = 0;
+++	i2c->msg_ptr = 0;
+++	i2c->irqlogidx = 0;
+++
+++	i2c_pxa_start_message(i2c);
+++
+++	while (i2c->msg_num > 0 && --timeout) {
+++		i2c_pxa_handler(0, i2c);
+++		udelay(10);
+++	}
+++
+++	i2c_pxa_stop_message(i2c);
+++
+++	/*
+++	 * We place the return code in i2c->msg_idx.
+++	 */
+++	ret = i2c->msg_idx;
+++
+++out:
+++	if (timeout == 0) {
+++		i2c_pxa_scream_blue_murder(i2c, "timeout");
+++		ret = I2C_RETRY;
+++	}
+++
+++	return ret;
+++}
+++
+++static int i2c_pxa_pio_xfer(struct i2c_adapter *adap,
+++			    struct i2c_msg msgs[], int num)
+++{
+++	struct pxa_i2c *i2c = adap->algo_data;
+++	int ret, i;
+++
+++	/* If the I2C controller is disabled we need to reset it
+++	  (probably due to a suspend/resume destroying state). We do
+++	  this here as we can then avoid worrying about resuming the
+++	  controller before its users. */
+++	if (!(readl(_ICR(i2c)) & ICR_IUE))
+++		i2c_pxa_reset(i2c);
+++
+++	for (i = adap->retries; i >= 0; i--) {
+++		ret = i2c_pxa_do_pio_xfer(i2c, msgs, num);
+++		if (ret != I2C_RETRY)
+++			goto out;
+++
+++		if (i2c_debug)
+++			dev_dbg(&adap->dev, "Retrying transmission\n");
+++		udelay(100);
+++	}
+++	i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
+++	ret = -EREMOTEIO;
+++ out:
+++	i2c_pxa_set_slave(i2c, ret);
+++	return ret;
+++}
+++
++ static const struct i2c_algorithm i2c_pxa_pio_algorithm = {
++ 	.master_xfer	= i2c_pxa_pio_xfer,
++ 	.functionality	= i2c_pxa_functionality,
+diff --git a/target/linux/generic/backport-5.4/807-v5.8-i2c-pxa-re-arrange-register-field-definitions.patch b/target/linux/generic/backport-5.4/807-v5.8-i2c-pxa-re-arrange-register-field-definitions.patch
+new file mode 100644
+index 0000000000..afade04877
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/807-v5.8-i2c-pxa-re-arrange-register-field-definitions.patch
+@@ -0,0 +1,161 @@
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Bcc: linux@mail.armlinux.org.uk
++Cc: linux-i2c@vger.kernel.org
++Subject: [PATCH 05/17] i2c: pxa: re-arrange register field definitions
++MIME-Version: 1.0
++Content-Disposition: inline
++Content-Transfer-Encoding: 8bit
++Content-Type: text/plain; charset="utf-8"
++
++Arrange the register field definitions to be grouped together, rather
++than the Armada-3700 definitions being separated from the rest of the
++definitions.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/i2c/busses/i2c-pxa.c | 113 ++++++++++++++++-------------------
++ 1 file changed, 53 insertions(+), 60 deletions(-)
++
++--- a/drivers/i2c/busses/i2c-pxa.c
+++++ b/drivers/i2c/busses/i2c-pxa.c
++@@ -33,6 +33,56 @@
++ #include <linux/platform_data/i2c-pxa.h>
++ #include <linux/slab.h>
++ 
+++/* I2C register field definitions */
+++#define ICR_START	(1 << 0)	   /* start bit */
+++#define ICR_STOP	(1 << 1)	   /* stop bit */
+++#define ICR_ACKNAK	(1 << 2)	   /* send ACK(0) or NAK(1) */
+++#define ICR_TB		(1 << 3)	   /* transfer byte bit */
+++#define ICR_MA		(1 << 4)	   /* master abort */
+++#define ICR_SCLE	(1 << 5)	   /* master clock enable */
+++#define ICR_IUE		(1 << 6)	   /* unit enable */
+++#define ICR_GCD		(1 << 7)	   /* general call disable */
+++#define ICR_ITEIE	(1 << 8)	   /* enable tx interrupts */
+++#define ICR_IRFIE	(1 << 9)	   /* enable rx interrupts */
+++#define ICR_BEIE	(1 << 10)	   /* enable bus error ints */
+++#define ICR_SSDIE	(1 << 11)	   /* slave STOP detected int enable */
+++#define ICR_ALDIE	(1 << 12)	   /* enable arbitration interrupt */
+++#define ICR_SADIE	(1 << 13)	   /* slave address detected int enable */
+++#define ICR_UR		(1 << 14)	   /* unit reset */
+++#define ICR_FM		(1 << 15)	   /* fast mode */
+++#define ICR_HS		(1 << 16)	   /* High Speed mode */
+++#define ICR_A3700_FM	(1 << 16)	   /* fast mode for armada-3700 */
+++#define ICR_A3700_HS	(1 << 17)	   /* high speed mode for armada-3700 */
+++#define ICR_GPIOEN	(1 << 19)	   /* enable GPIO mode for SCL in HS */
+++
+++#define ISR_RWM		(1 << 0)	   /* read/write mode */
+++#define ISR_ACKNAK	(1 << 1)	   /* ack/nak status */
+++#define ISR_UB		(1 << 2)	   /* unit busy */
+++#define ISR_IBB		(1 << 3)	   /* bus busy */
+++#define ISR_SSD		(1 << 4)	   /* slave stop detected */
+++#define ISR_ALD		(1 << 5)	   /* arbitration loss detected */
+++#define ISR_ITE		(1 << 6)	   /* tx buffer empty */
+++#define ISR_IRF		(1 << 7)	   /* rx buffer full */
+++#define ISR_GCAD	(1 << 8)	   /* general call address detected */
+++#define ISR_SAD		(1 << 9)	   /* slave address detected */
+++#define ISR_BED		(1 << 10)	   /* bus error no ACK/NAK */
+++
+++#define ILCR_SLV_SHIFT		0
+++#define ILCR_SLV_MASK		(0x1FF << ILCR_SLV_SHIFT)
+++#define ILCR_FLV_SHIFT		9
+++#define ILCR_FLV_MASK		(0x1FF << ILCR_FLV_SHIFT)
+++#define ILCR_HLVL_SHIFT		18
+++#define ILCR_HLVL_MASK		(0x1FF << ILCR_HLVL_SHIFT)
+++#define ILCR_HLVH_SHIFT		27
+++#define ILCR_HLVH_MASK		(0x1F << ILCR_HLVH_SHIFT)
+++
+++#define IWCR_CNT_SHIFT		0
+++#define IWCR_CNT_MASK		(0x1F << IWCR_CNT_SHIFT)
+++#define IWCR_HS_CNT1_SHIFT	5
+++#define IWCR_HS_CNT1_MASK	(0x1F << IWCR_HS_CNT1_SHIFT)
+++#define IWCR_HS_CNT2_SHIFT	10
+++#define IWCR_HS_CNT2_MASK	(0x1F << IWCR_HS_CNT2_SHIFT)
+++
++ struct pxa_reg_layout {
++ 	u32 ibmr;
++ 	u32 idbr;
++@@ -53,12 +103,7 @@ enum pxa_i2c_types {
++ 	REGS_A3700,
++ };
++ 
++-#define ICR_BUSMODE_FM	(1 << 16)	   /* shifted fast mode for armada-3700 */
++-#define ICR_BUSMODE_HS	(1 << 17)	   /* shifted high speed mode for armada-3700 */
++-
++-/*
++- * I2C registers definitions
++- */
+++/* I2C register layout definitions */
++ static struct pxa_reg_layout pxa_reg_layout[] = {
++ 	[REGS_PXA2XX] = {
++ 		.ibmr =	0x00,
++@@ -96,8 +141,8 @@ static struct pxa_reg_layout pxa_reg_lay
++ 		.icr =	0x08,
++ 		.isr =	0x0c,
++ 		.isar =	0x10,
++-		.fm = ICR_BUSMODE_FM,
++-		.hs = ICR_BUSMODE_HS,
+++		.fm = ICR_A3700_FM,
+++		.hs = ICR_A3700_HS,
++ 	},
++ };
++ 
++@@ -111,58 +156,6 @@ static const struct platform_device_id i
++ };
++ MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table);
++ 
++-/*
++- * I2C bit definitions
++- */
++-
++-#define ICR_START	(1 << 0)	   /* start bit */
++-#define ICR_STOP	(1 << 1)	   /* stop bit */
++-#define ICR_ACKNAK	(1 << 2)	   /* send ACK(0) or NAK(1) */
++-#define ICR_TB		(1 << 3)	   /* transfer byte bit */
++-#define ICR_MA		(1 << 4)	   /* master abort */
++-#define ICR_SCLE	(1 << 5)	   /* master clock enable */
++-#define ICR_IUE		(1 << 6)	   /* unit enable */
++-#define ICR_GCD		(1 << 7)	   /* general call disable */
++-#define ICR_ITEIE	(1 << 8)	   /* enable tx interrupts */
++-#define ICR_IRFIE	(1 << 9)	   /* enable rx interrupts */
++-#define ICR_BEIE	(1 << 10)	   /* enable bus error ints */
++-#define ICR_SSDIE	(1 << 11)	   /* slave STOP detected int enable */
++-#define ICR_ALDIE	(1 << 12)	   /* enable arbitration interrupt */
++-#define ICR_SADIE	(1 << 13)	   /* slave address detected int enable */
++-#define ICR_UR		(1 << 14)	   /* unit reset */
++-#define ICR_FM		(1 << 15)	   /* fast mode */
++-#define ICR_HS		(1 << 16)	   /* High Speed mode */
++-#define ICR_GPIOEN	(1 << 19)	   /* enable GPIO mode for SCL in HS */
++-
++-#define ISR_RWM		(1 << 0)	   /* read/write mode */
++-#define ISR_ACKNAK	(1 << 1)	   /* ack/nak status */
++-#define ISR_UB		(1 << 2)	   /* unit busy */
++-#define ISR_IBB		(1 << 3)	   /* bus busy */
++-#define ISR_SSD		(1 << 4)	   /* slave stop detected */
++-#define ISR_ALD		(1 << 5)	   /* arbitration loss detected */
++-#define ISR_ITE		(1 << 6)	   /* tx buffer empty */
++-#define ISR_IRF		(1 << 7)	   /* rx buffer full */
++-#define ISR_GCAD	(1 << 8)	   /* general call address detected */
++-#define ISR_SAD		(1 << 9)	   /* slave address detected */
++-#define ISR_BED		(1 << 10)	   /* bus error no ACK/NAK */
++-
++-/* bit field shift & mask */
++-#define ILCR_SLV_SHIFT		0
++-#define ILCR_SLV_MASK		(0x1FF << ILCR_SLV_SHIFT)
++-#define ILCR_FLV_SHIFT		9
++-#define ILCR_FLV_MASK		(0x1FF << ILCR_FLV_SHIFT)
++-#define ILCR_HLVL_SHIFT		18
++-#define ILCR_HLVL_MASK		(0x1FF << ILCR_HLVL_SHIFT)
++-#define ILCR_HLVH_SHIFT		27
++-#define ILCR_HLVH_MASK		(0x1F << ILCR_HLVH_SHIFT)
++-
++-#define IWCR_CNT_SHIFT		0
++-#define IWCR_CNT_MASK		(0x1F << IWCR_CNT_SHIFT)
++-#define IWCR_HS_CNT1_SHIFT	5
++-#define IWCR_HS_CNT1_MASK	(0x1F << IWCR_HS_CNT1_SHIFT)
++-#define IWCR_HS_CNT2_SHIFT	10
++-#define IWCR_HS_CNT2_MASK	(0x1F << IWCR_HS_CNT2_SHIFT)
++-
++ struct pxa_i2c {
++ 	spinlock_t		lock;
++ 	wait_queue_head_t	wait;
+diff --git a/target/linux/generic/backport-5.4/808-v5.8-i2c-pxa-add-and-use-definitions-for-IBMR-register.patch b/target/linux/generic/backport-5.4/808-v5.8-i2c-pxa-add-and-use-definitions-for-IBMR-register.patch
+new file mode 100644
+index 0000000000..f197808d23
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/808-v5.8-i2c-pxa-add-and-use-definitions-for-IBMR-register.patch
+@@ -0,0 +1,66 @@
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Bcc: linux@mail.armlinux.org.uk
++Cc: linux-i2c@vger.kernel.org
++Subject: [PATCH 06/17] i2c: pxa: add and use definitions for IBMR register
++MIME-Version: 1.0
++Content-Disposition: inline
++Content-Transfer-Encoding: 8bit
++Content-Type: text/plain; charset="utf-8"
++
++Add definitions for the bits in the IBMR register, and use them in the
++code. This improves readability.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/i2c/busses/i2c-pxa.c | 12 ++++++++----
++ 1 file changed, 8 insertions(+), 4 deletions(-)
++
++--- a/drivers/i2c/busses/i2c-pxa.c
+++++ b/drivers/i2c/busses/i2c-pxa.c
++@@ -34,6 +34,9 @@
++ #include <linux/slab.h>
++ 
++ /* I2C register field definitions */
+++#define IBMR_SDAS	(1 << 0)
+++#define IBMR_SCLS	(1 << 1)
+++
++ #define ICR_START	(1 << 0)	   /* start bit */
++ #define ICR_STOP	(1 << 1)	   /* stop bit */
++ #define ICR_ACKNAK	(1 << 2)	   /* send ACK(0) or NAK(1) */
++@@ -334,7 +337,7 @@ static void i2c_pxa_abort(struct pxa_i2c
++ 		return;
++ 	}
++ 
++-	while ((i > 0) && (readl(_IBMR(i2c)) & 0x1) == 0) {
+++	while ((i > 0) && (readl(_IBMR(i2c)) & IBMR_SDAS) == 0) {
++ 		unsigned long icr = readl(_ICR(i2c));
++ 
++ 		icr &= ~ICR_START;
++@@ -389,7 +392,8 @@ static int i2c_pxa_wait_master(struct px
++ 		 * quick check of the i2c lines themselves to ensure they've
++ 		 * gone high...
++ 		 */
++-		if ((readl(_ISR(i2c)) & (ISR_UB | ISR_IBB)) == 0 && readl(_IBMR(i2c)) == 3) {
+++		if ((readl(_ISR(i2c)) & (ISR_UB | ISR_IBB)) == 0 &&
+++		    readl(_IBMR(i2c)) == (IBMR_SCLS | IBMR_SDAS)) {
++ 			if (i2c_debug > 0)
++ 				dev_dbg(&i2c->adap.dev, "%s: done\n", __func__);
++ 			return 1;
++@@ -574,7 +578,7 @@ static void i2c_pxa_slave_start(struct p
++ 	timeout = 0x10000;
++ 
++ 	while (1) {
++-		if ((readl(_IBMR(i2c)) & 2) == 2)
+++		if ((readl(_IBMR(i2c)) & IBMR_SCLS) == IBMR_SCLS)
++ 			break;
++ 
++ 		timeout--;
++@@ -637,7 +641,7 @@ static void i2c_pxa_slave_start(struct p
++ 	timeout = 0x10000;
++ 
++ 	while (1) {
++-		if ((readl(_IBMR(i2c)) & 2) == 2)
+++		if ((readl(_IBMR(i2c)) & IBMR_SCLS) == IBMR_SCLS)
++ 			break;
++ 
++ 		timeout--;
+diff --git a/target/linux/generic/backport-5.4/809-v5.8-i2c-pxa-always-set-fm-and-hs-members-for-each-type.patch b/target/linux/generic/backport-5.4/809-v5.8-i2c-pxa-always-set-fm-and-hs-members-for-each-type.patch
+new file mode 100644
+index 0000000000..9b1dee62ce
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/809-v5.8-i2c-pxa-always-set-fm-and-hs-members-for-each-type.patch
+@@ -0,0 +1,66 @@
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Bcc: linux@mail.armlinux.org.uk
++Cc: linux-i2c@vger.kernel.org
++Subject: [PATCH 07/17] i2c: pxa: always set fm and hs members for each type
++MIME-Version: 1.0
++Content-Disposition: inline
++Content-Transfer-Encoding: 8bit
++Content-Type: text/plain; charset="utf-8"
++
++Always set the fm and hs members of struct pxa_reg_layout. These
++members are already taking space, we don't need code as well.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/i2c/busses/i2c-pxa.c | 12 ++++++++++--
++ 1 file changed, 10 insertions(+), 2 deletions(-)
++
++--- a/drivers/i2c/busses/i2c-pxa.c
+++++ b/drivers/i2c/busses/i2c-pxa.c
++@@ -114,6 +114,8 @@ static struct pxa_reg_layout pxa_reg_lay
++ 		.icr =	0x10,
++ 		.isr =	0x18,
++ 		.isar =	0x20,
+++		.fm = ICR_FM,
+++		.hs = ICR_HS,
++ 	},
++ 	[REGS_PXA3XX] = {
++ 		.ibmr =	0x00,
++@@ -121,6 +123,8 @@ static struct pxa_reg_layout pxa_reg_lay
++ 		.icr =	0x08,
++ 		.isr =	0x0c,
++ 		.isar =	0x10,
+++		.fm = ICR_FM,
+++		.hs = ICR_HS,
++ 	},
++ 	[REGS_CE4100] = {
++ 		.ibmr =	0x14,
++@@ -128,6 +132,8 @@ static struct pxa_reg_layout pxa_reg_lay
++ 		.icr =	0x00,
++ 		.isr =	0x04,
++ 		/* no isar register */
+++		.fm = ICR_FM,
+++		.hs = ICR_HS,
++ 	},
++ 	[REGS_PXA910] = {
++ 		.ibmr = 0x00,
++@@ -137,6 +143,8 @@ static struct pxa_reg_layout pxa_reg_lay
++ 		.isar = 0x20,
++ 		.ilcr = 0x28,
++ 		.iwcr = 0x30,
+++		.fm = ICR_FM,
+++		.hs = ICR_HS,
++ 	},
++ 	[REGS_A3700] = {
++ 		.ibmr =	0x00,
++@@ -1229,8 +1237,8 @@ static int i2c_pxa_probe(struct platform
++ 	i2c->reg_idbr = i2c->reg_base + pxa_reg_layout[i2c_type].idbr;
++ 	i2c->reg_icr = i2c->reg_base + pxa_reg_layout[i2c_type].icr;
++ 	i2c->reg_isr = i2c->reg_base + pxa_reg_layout[i2c_type].isr;
++-	i2c->fm_mask = pxa_reg_layout[i2c_type].fm ? : ICR_FM;
++-	i2c->hs_mask = pxa_reg_layout[i2c_type].hs ? : ICR_HS;
+++	i2c->fm_mask = pxa_reg_layout[i2c_type].fm;
+++	i2c->hs_mask = pxa_reg_layout[i2c_type].hs;
++ 
++ 	if (i2c_type != REGS_CE4100)
++ 		i2c->reg_isar = i2c->reg_base + pxa_reg_layout[i2c_type].isar;
+diff --git a/target/linux/generic/backport-5.4/810-v5.8-i2c-pxa-move-private-definitions-to-i2c-pxa.c.patch b/target/linux/generic/backport-5.4/810-v5.8-i2c-pxa-move-private-definitions-to-i2c-pxa.c.patch
+new file mode 100644
+index 0000000000..dda463052f
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/810-v5.8-i2c-pxa-move-private-definitions-to-i2c-pxa.c.patch
+@@ -0,0 +1,128 @@
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Bcc: linux@mail.armlinux.org.uk
++Cc: linux-i2c@vger.kernel.org
++Subject: [PATCH 08/17] i2c: pxa: move private definitions to i2c-pxa.c
++MIME-Version: 1.0
++Content-Disposition: inline
++Content-Transfer-Encoding: 8bit
++Content-Type: text/plain; charset="utf-8"
++
++Move driver-private definitions out of the i2c-pxa.h platform data
++header file into the driver itself. Nothing outside of the driver
++makes use of these constants.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/i2c/busses/i2c-pxa.c          | 43 ++++++++++++++++++++++++
++ include/linux/platform_data/i2c-pxa.h | 48 ---------------------------
++ 2 files changed, 43 insertions(+), 48 deletions(-)
++
++--- a/drivers/i2c/busses/i2c-pxa.c
+++++ b/drivers/i2c/busses/i2c-pxa.c
++@@ -86,6 +86,49 @@
++ #define IWCR_HS_CNT2_SHIFT	10
++ #define IWCR_HS_CNT2_MASK	(0x1F << IWCR_HS_CNT2_SHIFT)
++ 
+++/* need a longer timeout if we're dealing with the fact we may well be
+++ * looking at a multi-master environment
+++ */
+++#define DEF_TIMEOUT             32
+++
+++#define BUS_ERROR               (-EREMOTEIO)
+++#define XFER_NAKED              (-ECONNREFUSED)
+++#define I2C_RETRY               (-2000) /* an error has occurred retry transmit */
+++
+++/* ICR initialize bit values
+++ *
+++ * 15 FM     0 (100 kHz operation)
+++ * 14 UR     0 (No unit reset)
+++ * 13 SADIE  0 (Disables the unit from interrupting on slave addresses
+++ *              matching its slave address)
+++ * 12 ALDIE  0 (Disables the unit from interrupt when it loses arbitration
+++ *              in master mode)
+++ * 11 SSDIE  0 (Disables interrupts from a slave stop detected, in slave mode)
+++ * 10 BEIE   1 (Enable interrupts from detected bus errors, no ACK sent)
+++ *  9 IRFIE  1 (Enable interrupts from full buffer received)
+++ *  8 ITEIE  1 (Enables the I2C unit to interrupt when transmit buffer empty)
+++ *  7 GCD    1 (Disables i2c unit response to general call messages as a slave)
+++ *  6 IUE    0 (Disable unit until we change settings)
+++ *  5 SCLE   1 (Enables the i2c clock output for master mode (drives SCL)
+++ *  4 MA     0 (Only send stop with the ICR stop bit)
+++ *  3 TB     0 (We are not transmitting a byte initially)
+++ *  2 ACKNAK 0 (Send an ACK after the unit receives a byte)
+++ *  1 STOP   0 (Do not send a STOP)
+++ *  0 START  0 (Do not send a START)
+++ */
+++#define I2C_ICR_INIT	(ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
+++
+++/* I2C status register init values
+++ *
+++ * 10 BED    1 (Clear bus error detected)
+++ *  9 SAD    1 (Clear slave address detected)
+++ *  7 IRF    1 (Clear IDBR Receive Full)
+++ *  6 ITE    1 (Clear IDBR Transmit Empty)
+++ *  5 ALD    1 (Clear Arbitration Loss Detected)
+++ *  4 SSD    1 (Clear Slave Stop Detected)
+++ */
+++#define I2C_ISR_INIT	0x7FF  /* status register init */
+++
++ struct pxa_reg_layout {
++ 	u32 ibmr;
++ 	u32 idbr;
++--- a/include/linux/platform_data/i2c-pxa.h
+++++ b/include/linux/platform_data/i2c-pxa.h
++@@ -7,54 +7,6 @@
++ #ifndef _I2C_PXA_H_
++ #define _I2C_PXA_H_
++ 
++-#if 0
++-#define DEF_TIMEOUT             3
++-#else
++-/* need a longer timeout if we're dealing with the fact we may well be
++- * looking at a multi-master environment
++-*/
++-#define DEF_TIMEOUT             32
++-#endif
++-
++-#define BUS_ERROR               (-EREMOTEIO)
++-#define XFER_NAKED              (-ECONNREFUSED)
++-#define I2C_RETRY               (-2000) /* an error has occurred retry transmit */
++-
++-/* ICR initialize bit values
++-*
++-*  15. FM       0 (100 Khz operation)
++-*  14. UR       0 (No unit reset)
++-*  13. SADIE    0 (Disables the unit from interrupting on slave addresses
++-*                                       matching its slave address)
++-*  12. ALDIE    0 (Disables the unit from interrupt when it loses arbitration
++-*                                       in master mode)
++-*  11. SSDIE    0 (Disables interrupts from a slave stop detected, in slave mode)
++-*  10. BEIE     1 (Enable interrupts from detected bus errors, no ACK sent)
++-*  9.  IRFIE    1 (Enable interrupts from full buffer received)
++-*  8.  ITEIE    1 (Enables the I2C unit to interrupt when transmit buffer empty)
++-*  7.  GCD      1 (Disables i2c unit response to general call messages as a slave)
++-*  6.  IUE      0 (Disable unit until we change settings)
++-*  5.  SCLE     1 (Enables the i2c clock output for master mode (drives SCL)
++-*  4.  MA       0 (Only send stop with the ICR stop bit)
++-*  3.  TB       0 (We are not transmitting a byte initially)
++-*  2.  ACKNAK   0 (Send an ACK after the unit receives a byte)
++-*  1.  STOP     0 (Do not send a STOP)
++-*  0.  START    0 (Do not send a START)
++-*
++-*/
++-#define I2C_ICR_INIT	(ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
++-
++-/* I2C status register init values
++- *
++- * 10. BED      1 (Clear bus error detected)
++- * 9.  SAD      1 (Clear slave address detected)
++- * 7.  IRF      1 (Clear IDBR Receive Full)
++- * 6.  ITE      1 (Clear IDBR Transmit Empty)
++- * 5.  ALD      1 (Clear Arbitration Loss Detected)
++- * 4.  SSD      1 (Clear Slave Stop Detected)
++- */
++-#define I2C_ISR_INIT	0x7FF  /* status register init */
++-
++ struct i2c_slave_client;
++ 
++ struct i2c_pxa_platform_data {
+diff --git a/target/linux/generic/backport-5.4/811-v5.8-i2c-pxa-move-DT-IDs-along-side-platform-IDs.patch b/target/linux/generic/backport-5.4/811-v5.8-i2c-pxa-move-DT-IDs-along-side-platform-IDs.patch
+new file mode 100644
+index 0000000000..02565229d8
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/811-v5.8-i2c-pxa-move-DT-IDs-along-side-platform-IDs.patch
+@@ -0,0 +1,50 @@
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Bcc: linux@mail.armlinux.org.uk
++Cc: linux-i2c@vger.kernel.org
++Subject: [PATCH 09/17] i2c: pxa: move DT IDs along side platform IDs
++MIME-Version: 1.0
++Content-Disposition: inline
++Content-Transfer-Encoding: 8bit
++Content-Type: text/plain; charset="utf-8"
++
++Move the ID tables into one place, near the device dependent data.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/i2c/busses/i2c-pxa.c | 18 +++++++++---------
++ 1 file changed, 9 insertions(+), 9 deletions(-)
++
++--- a/drivers/i2c/busses/i2c-pxa.c
+++++ b/drivers/i2c/busses/i2c-pxa.c
++@@ -200,6 +200,15 @@ static struct pxa_reg_layout pxa_reg_lay
++ 	},
++ };
++ 
+++static const struct of_device_id i2c_pxa_dt_ids[] = {
+++	{ .compatible = "mrvl,pxa-i2c", .data = (void *)REGS_PXA2XX },
+++	{ .compatible = "mrvl,pwri2c", .data = (void *)REGS_PXA3XX },
+++	{ .compatible = "mrvl,mmp-twsi", .data = (void *)REGS_PXA910 },
+++	{ .compatible = "marvell,armada-3700-i2c", .data = (void *)REGS_A3700 },
+++	{}
+++};
+++MODULE_DEVICE_TABLE(of, i2c_pxa_dt_ids);
+++
++ static const struct platform_device_id i2c_pxa_id_table[] = {
++ 	{ "pxa2xx-i2c",		REGS_PXA2XX },
++ 	{ "pxa3xx-pwri2c",	REGS_PXA3XX },
++@@ -1178,15 +1187,6 @@ static const struct i2c_algorithm i2c_px
++ 	.functionality	= i2c_pxa_functionality,
++ };
++ 
++-static const struct of_device_id i2c_pxa_dt_ids[] = {
++-	{ .compatible = "mrvl,pxa-i2c", .data = (void *)REGS_PXA2XX },
++-	{ .compatible = "mrvl,pwri2c", .data = (void *)REGS_PXA3XX },
++-	{ .compatible = "mrvl,mmp-twsi", .data = (void *)REGS_PXA910 },
++-	{ .compatible = "marvell,armada-3700-i2c", .data = (void *)REGS_A3700 },
++-	{}
++-};
++-MODULE_DEVICE_TABLE(of, i2c_pxa_dt_ids);
++-
++ static int i2c_pxa_probe_dt(struct platform_device *pdev, struct pxa_i2c *i2c,
++ 			    enum pxa_i2c_types *i2c_types)
++ {
+diff --git a/target/linux/generic/backport-5.4/813-v5.8-i2c-pxa-clean-up-decode_bits.patch b/target/linux/generic/backport-5.4/813-v5.8-i2c-pxa-clean-up-decode_bits.patch
+new file mode 100644
+index 0000000000..adcf969ef6
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/813-v5.8-i2c-pxa-clean-up-decode_bits.patch
+@@ -0,0 +1,53 @@
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Bcc: linux@mail.armlinux.org.uk
++Cc: linux-i2c@vger.kernel.org
++Subject: [PATCH 11/17] i2c: pxa: clean up decode_bits()
++MIME-Version: 1.0
++Content-Disposition: inline
++Content-Transfer-Encoding: 8bit
++Content-Type: text/plain; charset="utf-8"
++
++Clean up decode_bits() to use pr_cont(), and move the newline into the
++function rather than at its two callsites. Avoid printing an
++unnecessary space before the newline.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/i2c/busses/i2c-pxa.c | 7 +++----
++ 1 file changed, 3 insertions(+), 4 deletions(-)
++
++--- a/drivers/i2c/busses/i2c-pxa.c
+++++ b/drivers/i2c/busses/i2c-pxa.c
++@@ -287,13 +287,14 @@ struct bits {
++ static inline void
++ decode_bits(const char *prefix, const struct bits *bits, int num, u32 val)
++ {
++-	printk("%s %08x: ", prefix, val);
+++	printk("%s %08x:", prefix, val);
++ 	while (num--) {
++ 		const char *str = val & bits->mask ? bits->set : bits->unset;
++ 		if (str)
++-			printk("%s ", str);
+++			pr_cont(" %s", str);
++ 		bits++;
++ 	}
+++	pr_cont("\n");
++ }
++ 
++ static const struct bits isr_bits[] = {
++@@ -313,7 +314,6 @@ static const struct bits isr_bits[] = {
++ static void decode_ISR(unsigned int val)
++ {
++ 	decode_bits(KERN_DEBUG "ISR", isr_bits, ARRAY_SIZE(isr_bits), val);
++-	printk("\n");
++ }
++ 
++ static const struct bits icr_bits[] = {
++@@ -338,7 +338,6 @@ static const struct bits icr_bits[] = {
++ static void decode_ICR(unsigned int val)
++ {
++ 	decode_bits(KERN_DEBUG "ICR", icr_bits, ARRAY_SIZE(icr_bits), val);
++-	printk("\n");
++ }
++ #endif
++ 
+diff --git a/target/linux/generic/backport-5.4/814-v5.8-i2c-pxa-fix-i2c_pxa_wait_bus_not_busy-boundary-condi.patch b/target/linux/generic/backport-5.4/814-v5.8-i2c-pxa-fix-i2c_pxa_wait_bus_not_busy-boundary-condi.patch
+new file mode 100644
+index 0000000000..2aadecc357
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/814-v5.8-i2c-pxa-fix-i2c_pxa_wait_bus_not_busy-boundary-condi.patch
+@@ -0,0 +1,53 @@
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Bcc: linux@mail.armlinux.org.uk
++Cc: linux-i2c@vger.kernel.org
++Subject: [PATCH 12/17] i2c: pxa: fix i2c_pxa_wait_bus_not_busy() boundary
++ condition
++MIME-Version: 1.0
++Content-Disposition: inline
++Content-Transfer-Encoding: 8bit
++Content-Type: text/plain; charset="utf-8"
++
++Fix i2c_pxa_wait_bus_not_busy()'s boundary conditions, so that a
++coincidental success and timeout results in the function returning
++success.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/i2c/busses/i2c-pxa.c | 17 ++++++++++++-----
++ 1 file changed, 12 insertions(+), 5 deletions(-)
++
++--- a/drivers/i2c/busses/i2c-pxa.c
+++++ b/drivers/i2c/busses/i2c-pxa.c
++@@ -417,19 +417,26 @@ static void i2c_pxa_abort(struct pxa_i2c
++ static int i2c_pxa_wait_bus_not_busy(struct pxa_i2c *i2c)
++ {
++ 	int timeout = DEF_TIMEOUT;
+++	u32 isr;
++ 
++-	while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB)) {
++-		if ((readl(_ISR(i2c)) & ISR_SAD) != 0)
+++	while (1) {
+++		isr = readl(_ISR(i2c));
+++		if (!(isr & (ISR_IBB | ISR_UB)))
+++			return 0;
+++
+++		if (isr & ISR_SAD)
++ 			timeout += 4;
++ 
+++		if (!timeout--)
+++			break;
+++
++ 		msleep(2);
++ 		show_state(i2c);
++ 	}
++ 
++-	if (timeout < 0)
++-		show_state(i2c);
+++	show_state(i2c);
++ 
++-	return timeout < 0 ? I2C_RETRY : 0;
+++	return I2C_RETRY;
++ }
++ 
++ static int i2c_pxa_wait_master(struct pxa_i2c *i2c)
+diff --git a/target/linux/generic/backport-5.4/815-v5.8-i2c-pxa-consolidate-i2c_pxa_-xfer-implementations.patch b/target/linux/generic/backport-5.4/815-v5.8-i2c-pxa-consolidate-i2c_pxa_-xfer-implementations.patch
+new file mode 100644
+index 0000000000..2debd4c86b
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/815-v5.8-i2c-pxa-consolidate-i2c_pxa_-xfer-implementations.patch
+@@ -0,0 +1,91 @@
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Bcc: linux@mail.armlinux.org.uk
++Subject: [PATCH 1/7] i2c: pxa: consolidate i2c_pxa_*xfer() implementations
++MIME-Version: 1.0
++Content-Disposition: inline
++Content-Transfer-Encoding: 8bit
++Content-Type: text/plain; charset="utf-8"
++
++Most of i2c_pxa_pio_xfer() and i2c_pxa_xfer() are identical; the only
++differences are that i2c_pxa_pio_xfer() may reset the bus, and they
++use different underlying transfer functions. The retry loop is the
++same. Consolidate these two functions.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/i2c/busses/i2c-pxa.c | 36 ++++++++++++++++--------------------
++ 1 file changed, 16 insertions(+), 20 deletions(-)
++
++--- a/drivers/i2c/busses/i2c-pxa.c
+++++ b/drivers/i2c/busses/i2c-pxa.c
++@@ -1059,18 +1059,20 @@ static int i2c_pxa_do_xfer(struct pxa_i2
++ 	return ret;
++ }
++ 
++-static int i2c_pxa_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
+++static int i2c_pxa_internal_xfer(struct pxa_i2c *i2c,
+++				 struct i2c_msg *msgs, int num,
+++				 int (*xfer)(struct pxa_i2c *,
+++					     struct i2c_msg *, int num))
++ {
++-	struct pxa_i2c *i2c = adap->algo_data;
++ 	int ret, i;
++ 
++-	for (i = adap->retries; i >= 0; i--) {
++-		ret = i2c_pxa_do_xfer(i2c, msgs, num);
+++	for (i = i2c->adap.retries; i >= 0; i--) {
+++		ret = xfer(i2c, msgs, num);
++ 		if (ret != I2C_RETRY)
++ 			goto out;
++ 
++ 		if (i2c_debug)
++-			dev_dbg(&adap->dev, "Retrying transmission\n");
+++			dev_dbg(&i2c->adap.dev, "Retrying transmission\n");
++ 		udelay(100);
++ 	}
++ 	i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
++@@ -1080,6 +1082,14 @@ static int i2c_pxa_xfer(struct i2c_adapt
++ 	return ret;
++ }
++ 
+++static int i2c_pxa_xfer(struct i2c_adapter *adap,
+++			struct i2c_msg msgs[], int num)
+++{
+++	struct pxa_i2c *i2c = adap->algo_data;
+++
+++	return i2c_pxa_internal_xfer(i2c, msgs, num, i2c_pxa_do_xfer);
+++}
+++
++ static u32 i2c_pxa_functionality(struct i2c_adapter *adap)
++ {
++ 	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
++@@ -1163,7 +1173,6 @@ static int i2c_pxa_pio_xfer(struct i2c_a
++ 			    struct i2c_msg msgs[], int num)
++ {
++ 	struct pxa_i2c *i2c = adap->algo_data;
++-	int ret, i;
++ 
++ 	/* If the I2C controller is disabled we need to reset it
++ 	  (probably due to a suspend/resume destroying state). We do
++@@ -1172,20 +1181,7 @@ static int i2c_pxa_pio_xfer(struct i2c_a
++ 	if (!(readl(_ICR(i2c)) & ICR_IUE))
++ 		i2c_pxa_reset(i2c);
++ 
++-	for (i = adap->retries; i >= 0; i--) {
++-		ret = i2c_pxa_do_pio_xfer(i2c, msgs, num);
++-		if (ret != I2C_RETRY)
++-			goto out;
++-
++-		if (i2c_debug)
++-			dev_dbg(&adap->dev, "Retrying transmission\n");
++-		udelay(100);
++-	}
++-	i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
++-	ret = -EREMOTEIO;
++- out:
++-	i2c_pxa_set_slave(i2c, ret);
++-	return ret;
+++	return i2c_pxa_internal_xfer(i2c, msgs, num, i2c_pxa_do_pio_xfer);
++ }
++ 
++ static const struct i2c_algorithm i2c_pxa_pio_algorithm = {
+diff --git a/target/linux/generic/backport-5.4/816-v5.8-i2c-pxa-avoid-complaints-with-non-responsive-slaves.patch b/target/linux/generic/backport-5.4/816-v5.8-i2c-pxa-avoid-complaints-with-non-responsive-slaves.patch
+new file mode 100644
+index 0000000000..63e6db80ad
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/816-v5.8-i2c-pxa-avoid-complaints-with-non-responsive-slaves.patch
+@@ -0,0 +1,67 @@
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Bcc: linux@mail.armlinux.org.uk
++Subject: [PATCH 2/7] i2c: pxa: avoid complaints with non-responsive slaves
++MIME-Version: 1.0
++Content-Disposition: inline
++Content-Transfer-Encoding: 8bit
++Content-Type: text/plain; charset="utf-8"
++
++Running i2cdetect on a PXA I2C adapter is very noisy; it complains
++whenever a slave fails to respond to the address cycle.  Since it is
++normal to probe for slaves in this way, we should not fill the kernel
++log.  This is especially true with SFP modules that take a while to
++respond on the I2C bus, and probing via the I2C bus is the only way to
++detect that they are ready.
++
++Fix this by changing the internal transfer return code from I2C_RETRY
++to a new NO_SLAVE code (mapped to -ENXIO, as per the I2C documentation
++for this condition, but we still return -EREMOTEIO to the I2C stack to
++maintain long established driver behaviour.)
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/i2c/busses/i2c-pxa.c | 12 ++++++++----
++ 1 file changed, 8 insertions(+), 4 deletions(-)
++
++--- a/drivers/i2c/busses/i2c-pxa.c
+++++ b/drivers/i2c/busses/i2c-pxa.c
++@@ -91,6 +91,7 @@
++  */
++ #define DEF_TIMEOUT             32
++ 
+++#define NO_SLAVE		(-ENXIO)
++ #define BUS_ERROR               (-EREMOTEIO)
++ #define XFER_NAKED              (-ECONNREFUSED)
++ #define I2C_RETRY               (-2000) /* an error has occurred retry transmit */
++@@ -838,7 +839,7 @@ static void i2c_pxa_irq_txempty(struct p
++ 		 */
++ 		if (isr & ISR_ACKNAK) {
++ 			if (i2c->msg_ptr == 0 && i2c->msg_idx == 0)
++-				ret = I2C_RETRY;
+++				ret = NO_SLAVE;
++ 			else
++ 				ret = XFER_NAKED;
++ 		}
++@@ -1066,16 +1067,19 @@ static int i2c_pxa_internal_xfer(struct
++ {
++ 	int ret, i;
++ 
++-	for (i = i2c->adap.retries; i >= 0; i--) {
+++	for (i = 0; ; ) {
++ 		ret = xfer(i2c, msgs, num);
++-		if (ret != I2C_RETRY)
+++		if (ret != I2C_RETRY && ret != NO_SLAVE)
++ 			goto out;
+++		if (++i >= i2c->adap.retries)
+++			break;
++ 
++ 		if (i2c_debug)
++ 			dev_dbg(&i2c->adap.dev, "Retrying transmission\n");
++ 		udelay(100);
++ 	}
++-	i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
+++	if (ret != NO_SLAVE)
+++		i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
++ 	ret = -EREMOTEIO;
++  out:
++ 	i2c_pxa_set_slave(i2c, ret);
+diff --git a/target/linux/generic/backport-5.4/817-v5.8-i2c-pxa-ensure-timeout-messages-are-unique.patch b/target/linux/generic/backport-5.4/817-v5.8-i2c-pxa-ensure-timeout-messages-are-unique.patch
+new file mode 100644
+index 0000000000..37a77b6c5c
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/817-v5.8-i2c-pxa-ensure-timeout-messages-are-unique.patch
+@@ -0,0 +1,45 @@
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Bcc: linux@mail.armlinux.org.uk
++Subject: [PATCH 3/7] i2c: pxa: ensure timeout messages are unique
++MIME-Version: 1.0
++Content-Disposition: inline
++Content-Transfer-Encoding: 8bit
++Content-Type: text/plain; charset="utf-8"
++
++Ensure that the various timeout messages can identify where in the code
++they were produced from to aid debugging.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/i2c/busses/i2c-pxa.c | 6 +++---
++ 1 file changed, 3 insertions(+), 3 deletions(-)
++
++--- a/drivers/i2c/busses/i2c-pxa.c
+++++ b/drivers/i2c/busses/i2c-pxa.c
++@@ -1052,7 +1052,7 @@ static int i2c_pxa_do_xfer(struct pxa_i2
++ 	ret = i2c->msg_idx;
++ 
++ 	if (!timeout && i2c->msg_num) {
++-		i2c_pxa_scream_blue_murder(i2c, "timeout");
+++		i2c_pxa_scream_blue_murder(i2c, "timeout with active message");
++ 		ret = I2C_RETRY;
++ 	}
++ 
++@@ -1122,7 +1122,7 @@ static int i2c_pxa_pio_set_master(struct
++ 	if (timeout < 0) {
++ 		show_state(i2c);
++ 		dev_err(&i2c->adap.dev,
++-			"i2c_pxa: timeout waiting for bus free\n");
+++			"i2c_pxa: timeout waiting for bus free (set_master)\n");
++ 		return I2C_RETRY;
++ 	}
++ 
++@@ -1166,7 +1166,7 @@ static int i2c_pxa_do_pio_xfer(struct px
++ 
++ out:
++ 	if (timeout == 0) {
++-		i2c_pxa_scream_blue_murder(i2c, "timeout");
+++		i2c_pxa_scream_blue_murder(i2c, "timeout (do_pio_xfer)");
++ 		ret = I2C_RETRY;
++ 	}
++ 
+diff --git a/target/linux/generic/backport-5.4/818-v5.8-i2c-pxa-remove-some-unnecessary-debug.patch b/target/linux/generic/backport-5.4/818-v5.8-i2c-pxa-remove-some-unnecessary-debug.patch
+new file mode 100644
+index 0000000000..5438588ded
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/818-v5.8-i2c-pxa-remove-some-unnecessary-debug.patch
+@@ -0,0 +1,34 @@
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Bcc: linux@mail.armlinux.org.uk
++Subject: [PATCH 4/7] i2c: pxa: remove some unnecessary debug
++MIME-Version: 1.0
++Content-Disposition: inline
++Content-Transfer-Encoding: 8bit
++Content-Type: text/plain; charset="utf-8"
++
++Remove unnecessary show_state() in the loop inside
++i2c_pxa_pio_set_master(), which can be unnecessarily verbose.
++
++Remove the i2c_pxa_scream_blue_murder() in i2c_pxa_pio_xfer(), which
++will trigger if we are probing the I2C bus and a slave does not
++respond; this is a normal event, and not something to report.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/i2c/busses/i2c-pxa.c | 4 +---
++ 1 file changed, 1 insertion(+), 3 deletions(-)
++
++--- a/drivers/i2c/busses/i2c-pxa.c
+++++ b/drivers/i2c/busses/i2c-pxa.c
++@@ -1114,10 +1114,8 @@ static int i2c_pxa_pio_set_master(struct
++ 	/*
++ 	 * Wait for the bus to become free.
++ 	 */
++-	while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB)) {
+++	while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB))
++ 		udelay(1000);
++-		show_state(i2c);
++-	}
++ 
++ 	if (timeout < 0) {
++ 		show_state(i2c);
+diff --git a/target/linux/generic/backport-5.4/820-v5.8-i2c-pxa-use-master-abort-for-device-probes.patch b/target/linux/generic/backport-5.4/820-v5.8-i2c-pxa-use-master-abort-for-device-probes.patch
+new file mode 100644
+index 0000000000..cde9e3fe33
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/820-v5.8-i2c-pxa-use-master-abort-for-device-probes.patch
+@@ -0,0 +1,35 @@
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Bcc: linux@mail.armlinux.org.uk
++Subject: [PATCH 6/7] i2c: pxa: use master-abort for device probes
++MIME-Version: 1.0
++Content-Disposition: inline
++Content-Transfer-Encoding: 8bit
++Content-Type: text/plain; charset="utf-8"
++
++Use master-abort to send the stop condition after an address cycle
++rather than resetting the controller.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/i2c/busses/i2c-pxa.c | 10 ++--------
++ 1 file changed, 2 insertions(+), 8 deletions(-)
++
++--- a/drivers/i2c/busses/i2c-pxa.c
+++++ b/drivers/i2c/busses/i2c-pxa.c
++@@ -899,14 +899,8 @@ static void i2c_pxa_irq_txempty(struct p
++ 		icr &= ~ICR_ALDIE;
++ 		icr |= ICR_START | ICR_TB;
++ 	} else {
++-		if (i2c->msg->len == 0) {
++-			/*
++-			 * Device probes have a message length of zero
++-			 * and need the bus to be reset before it can
++-			 * be used again.
++-			 */
++-			i2c_pxa_reset(i2c);
++-		}
+++		if (i2c->msg->len == 0)
+++			icr |= ICR_MA;
++ 		i2c_pxa_master_complete(i2c, 0);
++ 	}
++ 
+diff --git a/target/linux/generic/backport-5.4/821-v5.8-i2c-pxa-implement-generic-i2c-bus-recovery.patch b/target/linux/generic/backport-5.4/821-v5.8-i2c-pxa-implement-generic-i2c-bus-recovery.patch
+new file mode 100644
+index 0000000000..592b763b6a
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/821-v5.8-i2c-pxa-implement-generic-i2c-bus-recovery.patch
+@@ -0,0 +1,285 @@
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Bcc: linux@mail.armlinux.org.uk
++Subject: [PATCH 7/7] i2c: pxa: implement generic i2c bus recovery
++MIME-Version: 1.0
++Content-Disposition: inline
++Content-Transfer-Encoding: 8bit
++Content-Type: text/plain; charset="utf-8"
++
++Implement generic GPIO-based I2C bus recovery for the PXA I2C driver.
++
++Reviewed-by: Andrew Lunn <andrew@lunn.ch>
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/i2c/busses/i2c-pxa.c | 176 +++++++++++++++++++++++++++++++----
++ 1 file changed, 159 insertions(+), 17 deletions(-)
++
++--- a/drivers/i2c/busses/i2c-pxa.c
+++++ b/drivers/i2c/busses/i2c-pxa.c
++@@ -20,6 +20,7 @@
++ #include <linux/delay.h>
++ #include <linux/err.h>
++ #include <linux/errno.h>
+++#include <linux/gpio/consumer.h>
++ #include <linux/i2c.h>
++ #include <linux/i2c-pxa.h>
++ #include <linux/init.h>
++@@ -29,6 +30,7 @@
++ #include <linux/module.h>
++ #include <linux/of.h>
++ #include <linux/of_device.h>
+++#include <linux/pinctrl/consumer.h>
++ #include <linux/platform_device.h>
++ #include <linux/platform_data/i2c-pxa.h>
++ #include <linux/slab.h>
++@@ -261,6 +263,11 @@ struct pxa_i2c {
++ 	bool			highmode_enter;
++ 	u32			fm_mask;
++ 	u32			hs_mask;
+++
+++	struct i2c_bus_recovery_info recovery;
+++	struct pinctrl		*pinctrl;
+++	struct pinctrl_state	*pinctrl_default;
+++	struct pinctrl_state	*pinctrl_recovery;
++ };
++ 
++ #define _IBMR(i2c)	((i2c)->reg_ibmr)
++@@ -560,13 +567,8 @@ static void i2c_pxa_set_slave(struct pxa
++ #define i2c_pxa_set_slave(i2c, err)	do { } while (0)
++ #endif
++ 
++-static void i2c_pxa_reset(struct pxa_i2c *i2c)
+++static void i2c_pxa_do_reset(struct pxa_i2c *i2c)
++ {
++-	pr_debug("Resetting I2C Controller Unit\n");
++-
++-	/* abort any transfer currently under way */
++-	i2c_pxa_abort(i2c);
++-
++ 	/* reset according to 9.8 */
++ 	writel(ICR_UR, _ICR(i2c));
++ 	writel(I2C_ISR_INIT, _ISR(i2c));
++@@ -585,12 +587,25 @@ static void i2c_pxa_reset(struct pxa_i2c
++ #endif
++ 
++ 	i2c_pxa_set_slave(i2c, 0);
+++}
++ 
+++static void i2c_pxa_enable(struct pxa_i2c *i2c)
+++{
++ 	/* enable unit */
++ 	writel(readl(_ICR(i2c)) | ICR_IUE, _ICR(i2c));
++ 	udelay(100);
++ }
++ 
+++static void i2c_pxa_reset(struct pxa_i2c *i2c)
+++{
+++	pr_debug("Resetting I2C Controller Unit\n");
+++
+++	/* abort any transfer currently under way */
+++	i2c_pxa_abort(i2c);
+++	i2c_pxa_do_reset(i2c);
+++	i2c_pxa_enable(i2c);
+++}
+++
++ 
++ #ifdef CONFIG_I2C_PXA_SLAVE
++ /*
++@@ -1002,6 +1017,7 @@ static int i2c_pxa_do_xfer(struct pxa_i2
++ 	ret = i2c_pxa_wait_bus_not_busy(i2c);
++ 	if (ret) {
++ 		dev_err(&i2c->adap.dev, "i2c_pxa: timeout waiting for bus free\n");
+++		i2c_recover_bus(&i2c->adap);
++ 		goto out;
++ 	}
++ 
++@@ -1047,6 +1063,7 @@ static int i2c_pxa_do_xfer(struct pxa_i2
++ 
++ 	if (!timeout && i2c->msg_num) {
++ 		i2c_pxa_scream_blue_murder(i2c, "timeout with active message");
+++		i2c_recover_bus(&i2c->adap);
++ 		ret = I2C_RETRY;
++ 	}
++ 
++@@ -1228,6 +1245,129 @@ static int i2c_pxa_probe_pdata(struct pl
++ 	return 0;
++ }
++ 
+++static void i2c_pxa_prepare_recovery(struct i2c_adapter *adap)
+++{
+++	struct pxa_i2c *i2c = adap->algo_data;
+++	u32 ibmr = readl(_IBMR(i2c));
+++
+++	/*
+++	 * Program the GPIOs to reflect the current I2C bus state while
+++	 * we transition to recovery; this avoids glitching the bus.
+++	 */
+++	gpiod_set_value(i2c->recovery.scl_gpiod, ibmr & IBMR_SCLS);
+++	gpiod_set_value(i2c->recovery.sda_gpiod, ibmr & IBMR_SDAS);
+++
+++	WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery));
+++}
+++
+++static void i2c_pxa_unprepare_recovery(struct i2c_adapter *adap)
+++{
+++	struct pxa_i2c *i2c = adap->algo_data;
+++	u32 isr;
+++
+++	/*
+++	 * The bus should now be free. Clear up the I2C controller before
+++	 * handing control of the bus back to avoid the bus changing state.
+++	 */
+++	isr = readl(_ISR(i2c));
+++	if (isr & (ISR_UB | ISR_IBB)) {
+++		dev_dbg(&i2c->adap.dev,
+++			"recovery: resetting controller, ISR=0x%08x\n", isr);
+++		i2c_pxa_do_reset(i2c);
+++	}
+++
+++	WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default));
+++
+++	dev_dbg(&i2c->adap.dev, "recovery: IBMR 0x%08x ISR 0x%08x\n",
+++	        readl(_IBMR(i2c)), readl(_ISR(i2c)));
+++
+++	i2c_pxa_enable(i2c);
+++}
+++
+++static int i2c_pxa_init_recovery(struct pxa_i2c *i2c)
+++{
+++	struct i2c_bus_recovery_info *bri = &i2c->recovery;
+++	struct device *dev = i2c->adap.dev.parent;
+++
+++	/*
+++	 * When slave mode is enabled, we are not the only master on the bus.
+++	 * Bus recovery can only be performed when we are the master, which
+++	 * we can't be certain of. Therefore, when slave mode is enabled, do
+++	 * not configure bus recovery.
+++	 */
+++	if (IS_ENABLED(CONFIG_I2C_PXA_SLAVE))
+++		return 0;
+++
+++	i2c->pinctrl = devm_pinctrl_get(dev);
+++	if (IS_ERR(i2c->pinctrl))
+++		return PTR_ERR(i2c->pinctrl);
+++
+++	if (!i2c->pinctrl)
+++		return 0;
+++
+++	i2c->pinctrl_default = pinctrl_lookup_state(i2c->pinctrl,
+++						    PINCTRL_STATE_DEFAULT);
+++	i2c->pinctrl_recovery = pinctrl_lookup_state(i2c->pinctrl, "recovery");
+++
+++	if (IS_ERR(i2c->pinctrl_default) || IS_ERR(i2c->pinctrl_recovery)) {
+++		dev_info(dev, "missing pinmux recovery information: %ld %ld\n",
+++			 PTR_ERR(i2c->pinctrl_default),
+++			 PTR_ERR(i2c->pinctrl_recovery));
+++		return 0;
+++	}
+++
+++	/*
+++	 * Claiming GPIOs can influence the pinmux state, and may glitch the
+++	 * I2C bus. Do this carefully.
+++	 */
+++	bri->scl_gpiod = devm_gpiod_get(dev, "scl", GPIOD_OUT_HIGH_OPEN_DRAIN);
+++	if (bri->scl_gpiod == ERR_PTR(-EPROBE_DEFER))
+++		return -EPROBE_DEFER;
+++	if (IS_ERR(bri->scl_gpiod)) {
+++		dev_info(dev, "missing scl gpio recovery information: %pe\n",
+++			 bri->scl_gpiod);
+++		return 0;
+++	}
+++
+++	/*
+++	 * We have SCL. Pull SCL low and wait a bit so that SDA glitches
+++	 * have no effect.
+++	 */
+++	gpiod_direction_output(bri->scl_gpiod, 0);
+++	udelay(10);
+++	bri->sda_gpiod = devm_gpiod_get(dev, "sda", GPIOD_OUT_HIGH_OPEN_DRAIN);
+++
+++	/* Wait a bit in case of a SDA glitch, and then release SCL. */
+++	udelay(10);
+++	gpiod_direction_output(bri->scl_gpiod, 1);
+++
+++	if (bri->sda_gpiod == ERR_PTR(-EPROBE_DEFER))
+++		return -EPROBE_DEFER;
+++
+++	if (IS_ERR(bri->sda_gpiod)) {
+++		dev_info(dev, "missing sda gpio recovery information: %pe\n",
+++			 bri->sda_gpiod);
+++		return 0;
+++	}
+++
+++	bri->prepare_recovery = i2c_pxa_prepare_recovery;
+++	bri->unprepare_recovery = i2c_pxa_unprepare_recovery;
+++	bri->recover_bus = i2c_generic_scl_recovery;
+++
+++	i2c->adap.bus_recovery_info = bri;
+++
+++	/*
+++	 * Claiming GPIOs can change the pinmux state, which confuses the
+++	 * pinctrl since pinctrl's idea of the current setting is unaffected
+++	 * by the pinmux change caused by claiming the GPIO. Work around that
+++	 * by switching pinctrl to the GPIO state here. We do it this way to
+++	 * avoid glitching the I2C bus.
+++	 */
+++	pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery);
+++
+++	return pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default);
+++}
+++
++ static int i2c_pxa_probe(struct platform_device *dev)
++ {
++ 	struct i2c_pxa_platform_data *plat = dev_get_platdata(&dev->dev);
++@@ -1240,6 +1380,16 @@ static int i2c_pxa_probe(struct platform
++ 	if (!i2c)
++ 		return -ENOMEM;
++ 
+++	/* Default adapter num to device id; i2c_pxa_probe_dt can override. */
+++	i2c->adap.nr = dev->id;
+++	i2c->adap.owner   = THIS_MODULE;
+++	i2c->adap.retries = 5;
+++	i2c->adap.algo_data = i2c;
+++	i2c->adap.dev.parent = &dev->dev;
+++#ifdef CONFIG_OF
+++	i2c->adap.dev.of_node = dev->dev.of_node;
+++#endif
+++
++ 	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
++ 	i2c->reg_base = devm_ioremap_resource(&dev->dev, res);
++ 	if (IS_ERR(i2c->reg_base))
++@@ -1251,8 +1401,9 @@ static int i2c_pxa_probe(struct platform
++ 		return irq;
++ 	}
++ 
++-	/* Default adapter num to device id; i2c_pxa_probe_dt can override. */
++-	i2c->adap.nr = dev->id;
+++	ret = i2c_pxa_init_recovery(i2c);
+++	if (ret)
+++		return ret;
++ 
++ 	ret = i2c_pxa_probe_dt(dev, i2c, &i2c_type);
++ 	if (ret > 0)
++@@ -1260,9 +1411,6 @@ static int i2c_pxa_probe(struct platform
++ 	if (ret < 0)
++ 		return ret;
++ 
++-	i2c->adap.owner   = THIS_MODULE;
++-	i2c->adap.retries = 5;
++-
++ 	spin_lock_init(&i2c->lock);
++ 	init_waitqueue_head(&i2c->wait);
++ 
++@@ -1332,12 +1480,6 @@ static int i2c_pxa_probe(struct platform
++ 
++ 	i2c_pxa_reset(i2c);
++ 
++-	i2c->adap.algo_data = i2c;
++-	i2c->adap.dev.parent = &dev->dev;
++-#ifdef CONFIG_OF
++-	i2c->adap.dev.of_node = dev->dev.of_node;
++-#endif
++-
++ 	ret = i2c_add_numbered_adapter(&i2c->adap);
++ 	if (ret < 0)
++ 		goto ereqirq;
+diff --git a/target/linux/generic/backport-5.4/825-v5.8-spi-rb4xx-null-pointer-bug-fix.patch b/target/linux/generic/backport-5.4/825-v5.8-spi-rb4xx-null-pointer-bug-fix.patch
+new file mode 100644
+index 0000000000..71e26d50da
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/825-v5.8-spi-rb4xx-null-pointer-bug-fix.patch
+@@ -0,0 +1,48 @@
++From: Christopher Hill <ch6574@gmail.com>
++To: Mark Brown <broonie@kernel.org>
++Cc: Christopher Hill <ch6574@gmail.com>, linux-spi@vger.kernel.org,
++        linux-kernel@vger.kernel.org
++Subject: [PATCH 1/3] spi: rb4xx: null pointer bug fix
++Date: Thu, 21 May 2020 14:36:29 -0400
++Message-Id: <20200521183631.37806-1-ch6574@gmail.com>
++X-Mailer: git-send-email 2.25.1
++MIME-Version: 1.0
++Sender: linux-spi-owner@vger.kernel.org
++Precedence: bulk
++List-ID: <linux-spi.vger.kernel.org>
++X-Mailing-List: linux-spi@vger.kernel.org
++
++This patch fixes a null pointer bug in the spi driver spi-rb4xx.c by
++moving the private data initialization to earlier in probe
++
++Signed-off-by: Christopher Hill <ch6574@gmail.com>
++---
++ drivers/spi/spi-rb4xx.c | 10 +++++-----
++ 1 file changed, 5 insertions(+), 5 deletions(-)
++
++--- a/drivers/spi/spi-rb4xx.c
+++++ b/drivers/spi/spi-rb4xx.c
++@@ -158,6 +158,11 @@ static int rb4xx_spi_probe(struct platfo
++ 	master->transfer_one = rb4xx_transfer_one;
++ 	master->set_cs = rb4xx_set_cs;
++ 
+++	rbspi = spi_master_get_devdata(master);
+++	rbspi->base = spi_base;
+++	rbspi->clk = ahb_clk;
+++	platform_set_drvdata(pdev, rbspi);
+++
++ 	err = devm_spi_register_master(&pdev->dev, master);
++ 	if (err) {
++ 		dev_err(&pdev->dev, "failed to register SPI master\n");
++@@ -168,11 +173,6 @@ static int rb4xx_spi_probe(struct platfo
++ 	if (err)
++ 		return err;
++ 
++-	rbspi = spi_master_get_devdata(master);
++-	rbspi->base = spi_base;
++-	rbspi->clk = ahb_clk;
++-	platform_set_drvdata(pdev, rbspi);
++-
++ 	/* Enable SPI */
++ 	rb4xx_write(rbspi, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO);
++ 
+diff --git a/target/linux/generic/backport-5.4/826-v5.8-spi-rb4xx-update-driver-to-be-device-tree-aware.patch b/target/linux/generic/backport-5.4/826-v5.8-spi-rb4xx-update-driver-to-be-device-tree-aware.patch
+new file mode 100644
+index 0000000000..0ce4f2bb35
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/826-v5.8-spi-rb4xx-update-driver-to-be-device-tree-aware.patch
+@@ -0,0 +1,60 @@
++From: Christopher Hill <ch6574@gmail.com>
++To: Mark Brown <broonie@kernel.org>
++Cc: Christopher Hill <ch6574@gmail.com>, linux-spi@vger.kernel.org,
++        linux-kernel@vger.kernel.org
++Subject: [PATCH 2/3] spi: rb4xx: update driver to be device tree aware
++Date: Thu, 21 May 2020 14:36:30 -0400
++Message-Id: <20200521183631.37806-2-ch6574@gmail.com>
++X-Mailer: git-send-email 2.25.1
++In-Reply-To: <20200521183631.37806-1-ch6574@gmail.com>
++References: <20200521183631.37806-1-ch6574@gmail.com>
++MIME-Version: 1.0
++Sender: linux-spi-owner@vger.kernel.org
++Precedence: bulk
++List-ID: <linux-spi.vger.kernel.org>
++X-Mailing-List: linux-spi@vger.kernel.org
++
++This patch updates the spi driver spi-rb4xx.c to be device tree aware
++
++Signed-off-by: Christopher Hill <ch6574@gmail.com>
++---
++ drivers/spi/spi-rb4xx.c | 9 +++++++++
++ 1 file changed, 9 insertions(+)
++
++--- a/drivers/spi/spi-rb4xx.c
+++++ b/drivers/spi/spi-rb4xx.c
++@@ -14,6 +14,7 @@
++ #include <linux/platform_device.h>
++ #include <linux/clk.h>
++ #include <linux/spi/spi.h>
+++#include <linux/of.h>
++ 
++ #include <asm/mach-ath79/ar71xx_regs.h>
++ 
++@@ -150,6 +151,7 @@ static int rb4xx_spi_probe(struct platfo
++ 	if (IS_ERR(ahb_clk))
++ 		return PTR_ERR(ahb_clk);
++ 
+++	master->dev.of_node = pdev->dev.of_node;
++ 	master->bus_num = 0;
++ 	master->num_chipselect = 3;
++ 	master->mode_bits = SPI_TX_DUAL;
++@@ -188,11 +190,18 @@ static int rb4xx_spi_remove(struct platf
++ 	return 0;
++ }
++ 
+++static const struct of_device_id rb4xx_spi_dt_match[] = {
+++	{ .compatible = "mikrotik,rb4xx-spi" },
+++	{ },
+++};
+++MODULE_DEVICE_TABLE(of, rb4xx_spi_dt_match);
+++
++ static struct platform_driver rb4xx_spi_drv = {
++ 	.probe = rb4xx_spi_probe,
++ 	.remove = rb4xx_spi_remove,
++ 	.driver = {
++ 		.name = "rb4xx-spi",
+++		.of_match_table = of_match_ptr(rb4xx_spi_dt_match),
++ 	},
++ };
++ 
+diff --git a/target/linux/generic/backport-5.4/831-v5.13-0001-firmware-bcm47xx_nvram-rename-finding-function-and-i.patch b/target/linux/generic/backport-5.4/831-v5.13-0001-firmware-bcm47xx_nvram-rename-finding-function-and-i.patch
+new file mode 100644
+index 0000000000..19938704b7
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/831-v5.13-0001-firmware-bcm47xx_nvram-rename-finding-function-and-i.patch
+@@ -0,0 +1,80 @@
++From fb009cbdd0693bd633f11e99526617b3d392cfad Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
++Date: Mon, 8 Mar 2021 10:03:16 +0100
++Subject: [PATCH] firmware: bcm47xx_nvram: rename finding function and its
++ variables
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++1. Use "bcm47xx_" function name prefix for consistency
++2. It takes flash start as argument so s/iobase/flash_start/
++3. "off" was used for finding flash end so just call it "flash_size"
++
++Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
++Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
++---
++ drivers/firmware/broadcom/bcm47xx_nvram.c | 24 ++++++++++++-----------
++ 1 file changed, 13 insertions(+), 11 deletions(-)
++
++--- a/drivers/firmware/broadcom/bcm47xx_nvram.c
+++++ b/drivers/firmware/broadcom/bcm47xx_nvram.c
++@@ -48,11 +48,13 @@ static u32 find_nvram_size(void __iomem
++ 	return 0;
++ }
++ 
++-/* Probe for NVRAM header */
++-static int nvram_find_and_copy(void __iomem *iobase, u32 lim)
+++/**
+++ * bcm47xx_nvram_find_and_copy - find NVRAM on flash mapping & copy it
+++ */
+++static int bcm47xx_nvram_find_and_copy(void __iomem *flash_start, size_t res_size)
++ {
++ 	struct nvram_header __iomem *header;
++-	u32 off;
+++	size_t flash_size;
++ 	u32 size;
++ 
++ 	if (nvram_len) {
++@@ -61,25 +63,25 @@ static int nvram_find_and_copy(void __io
++ 	}
++ 
++ 	/* TODO: when nvram is on nand flash check for bad blocks first. */
++-	off = FLASH_MIN;
++-	while (off <= lim) {
+++	flash_size = FLASH_MIN;
+++	while (flash_size <= res_size) {
++ 		/* Windowed flash access */
++-		size = find_nvram_size(iobase + off);
+++		size = find_nvram_size(flash_start + flash_size);
++ 		if (size) {
++-			header = (struct nvram_header *)(iobase + off - size);
+++			header = (struct nvram_header *)(flash_start + flash_size - size);
++ 			goto found;
++ 		}
++-		off <<= 1;
+++		flash_size <<= 1;
++ 	}
++ 
++ 	/* Try embedded NVRAM at 4 KB and 1 KB as last resorts */
++-	header = (struct nvram_header *)(iobase + 4096);
+++	header = (struct nvram_header *)(flash_start + 4096);
++ 	if (header->magic == NVRAM_MAGIC) {
++ 		size = NVRAM_SPACE;
++ 		goto found;
++ 	}
++ 
++-	header = (struct nvram_header *)(iobase + 1024);
+++	header = (struct nvram_header *)(flash_start + 1024);
++ 	if (header->magic == NVRAM_MAGIC) {
++ 		size = NVRAM_SPACE;
++ 		goto found;
++@@ -124,7 +126,7 @@ int bcm47xx_nvram_init_from_mem(u32 base
++ 	if (!iobase)
++ 		return -ENOMEM;
++ 
++-	err = nvram_find_and_copy(iobase, lim);
+++	err = bcm47xx_nvram_find_and_copy(iobase, lim);
++ 
++ 	iounmap(iobase);
++ 
+diff --git a/target/linux/generic/backport-5.4/831-v5.13-0002-firmware-bcm47xx_nvram-add-helper-checking-for-NVRAM.patch b/target/linux/generic/backport-5.4/831-v5.13-0002-firmware-bcm47xx_nvram-add-helper-checking-for-NVRAM.patch
+new file mode 100644
+index 0000000000..6ab072883d
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/831-v5.13-0002-firmware-bcm47xx_nvram-add-helper-checking-for-NVRAM.patch
+@@ -0,0 +1,90 @@
++From 0a24b51a3264a3f942a75025ea5ff6133c8989b0 Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
++Date: Mon, 8 Mar 2021 10:03:17 +0100
++Subject: [PATCH] firmware: bcm47xx_nvram: add helper checking for NVRAM
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++This avoids duplicating code doing casting and checking for NVRAM magic.
++
++Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
++Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
++---
++ drivers/firmware/broadcom/bcm47xx_nvram.c | 30 ++++++++++++++---------
++ 1 file changed, 18 insertions(+), 12 deletions(-)
++
++--- a/drivers/firmware/broadcom/bcm47xx_nvram.c
+++++ b/drivers/firmware/broadcom/bcm47xx_nvram.c
++@@ -34,14 +34,20 @@ static char nvram_buf[NVRAM_SPACE];
++ static size_t nvram_len;
++ static const u32 nvram_sizes[] = {0x6000, 0x8000, 0xF000, 0x10000};
++ 
+++/**
+++ * bcm47xx_nvram_is_valid - check for a valid NVRAM at specified memory
+++ */
+++static bool bcm47xx_nvram_is_valid(void __iomem *nvram)
+++{
+++	return ((struct nvram_header *)nvram)->magic == NVRAM_MAGIC;
+++}
+++
++ static u32 find_nvram_size(void __iomem *end)
++ {
++-	struct nvram_header __iomem *header;
++ 	int i;
++ 
++ 	for (i = 0; i < ARRAY_SIZE(nvram_sizes); i++) {
++-		header = (struct nvram_header *)(end - nvram_sizes[i]);
++-		if (header->magic == NVRAM_MAGIC)
+++		if (bcm47xx_nvram_is_valid(end - nvram_sizes[i]))
++ 			return nvram_sizes[i];
++ 	}
++ 
++@@ -55,6 +61,7 @@ static int bcm47xx_nvram_find_and_copy(v
++ {
++ 	struct nvram_header __iomem *header;
++ 	size_t flash_size;
+++	size_t offset;
++ 	u32 size;
++ 
++ 	if (nvram_len) {
++@@ -68,31 +75,30 @@ static int bcm47xx_nvram_find_and_copy(v
++ 		/* Windowed flash access */
++ 		size = find_nvram_size(flash_start + flash_size);
++ 		if (size) {
++-			header = (struct nvram_header *)(flash_start + flash_size - size);
+++			offset = flash_size - size;
++ 			goto found;
++ 		}
++ 		flash_size <<= 1;
++ 	}
++ 
++ 	/* Try embedded NVRAM at 4 KB and 1 KB as last resorts */
++-	header = (struct nvram_header *)(flash_start + 4096);
++-	if (header->magic == NVRAM_MAGIC) {
++-		size = NVRAM_SPACE;
+++
+++	offset = 4096;
+++	if (bcm47xx_nvram_is_valid(flash_start + offset))
++ 		goto found;
++-	}
++ 
++-	header = (struct nvram_header *)(flash_start + 1024);
++-	if (header->magic == NVRAM_MAGIC) {
++-		size = NVRAM_SPACE;
+++	offset = 1024;
+++	if (bcm47xx_nvram_is_valid(flash_start + offset))
++ 		goto found;
++-	}
++ 
++ 	pr_err("no nvram found\n");
++ 	return -ENXIO;
++ 
++ found:
+++	header = (struct nvram_header *)(flash_start + offset);
++ 	__ioread32_copy(nvram_buf, header, sizeof(*header) / 4);
++ 	nvram_len = ((struct nvram_header *)(nvram_buf))->len;
+++	size = res_size - offset;
++ 	if (nvram_len > size) {
++ 		pr_err("The nvram size according to the header seems to be bigger than the partition on flash\n");
++ 		nvram_len = size;
+diff --git a/target/linux/generic/backport-5.4/831-v5.13-0003-firmware-bcm47xx_nvram-extract-code-copying-NVRAM.patch b/target/linux/generic/backport-5.4/831-v5.13-0003-firmware-bcm47xx_nvram-extract-code-copying-NVRAM.patch
+new file mode 100644
+index 0000000000..a1351f1197
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/831-v5.13-0003-firmware-bcm47xx_nvram-extract-code-copying-NVRAM.patch
+@@ -0,0 +1,80 @@
++From 298923cf999cecd2ef06df126f85a3d68da8c4d8 Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
++Date: Mon, 8 Mar 2021 10:03:18 +0100
++Subject: [PATCH] firmware: bcm47xx_nvram: extract code copying NVRAM
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++This simplifies function finding NVRAM. It doesn't directly deal with
++NVRAM structure anymore and is a bit smaller.
++
++Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
++Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
++---
++ drivers/firmware/broadcom/bcm47xx_nvram.c | 43 +++++++++++++----------
++ 1 file changed, 25 insertions(+), 18 deletions(-)
++
++--- a/drivers/firmware/broadcom/bcm47xx_nvram.c
+++++ b/drivers/firmware/broadcom/bcm47xx_nvram.c
++@@ -55,11 +55,34 @@ static u32 find_nvram_size(void __iomem
++ }
++ 
++ /**
+++ * bcm47xx_nvram_copy - copy NVRAM to internal buffer
+++ */
+++static void bcm47xx_nvram_copy(void __iomem *nvram_start, size_t res_size)
+++{
+++	struct nvram_header __iomem *header = nvram_start;
+++	size_t copy_size;
+++
+++	copy_size = header->len;
+++	if (copy_size > res_size) {
+++		pr_err("The nvram size according to the header seems to be bigger than the partition on flash\n");
+++		copy_size = res_size;
+++	}
+++	if (copy_size >= NVRAM_SPACE) {
+++		pr_err("nvram on flash (%zu bytes) is bigger than the reserved space in memory, will just copy the first %i bytes\n",
+++		       copy_size, NVRAM_SPACE - 1);
+++		copy_size = NVRAM_SPACE - 1;
+++	}
+++
+++	__ioread32_copy(nvram_buf, nvram_start, DIV_ROUND_UP(copy_size, 4));
+++	nvram_buf[NVRAM_SPACE - 1] = '\0';
+++	nvram_len = copy_size;
+++}
+++
+++/**
++  * bcm47xx_nvram_find_and_copy - find NVRAM on flash mapping & copy it
++  */
++ static int bcm47xx_nvram_find_and_copy(void __iomem *flash_start, size_t res_size)
++ {
++-	struct nvram_header __iomem *header;
++ 	size_t flash_size;
++ 	size_t offset;
++ 	u32 size;
++@@ -95,23 +118,7 @@ static int bcm47xx_nvram_find_and_copy(v
++ 	return -ENXIO;
++ 
++ found:
++-	header = (struct nvram_header *)(flash_start + offset);
++-	__ioread32_copy(nvram_buf, header, sizeof(*header) / 4);
++-	nvram_len = ((struct nvram_header *)(nvram_buf))->len;
++-	size = res_size - offset;
++-	if (nvram_len > size) {
++-		pr_err("The nvram size according to the header seems to be bigger than the partition on flash\n");
++-		nvram_len = size;
++-	}
++-	if (nvram_len >= NVRAM_SPACE) {
++-		pr_err("nvram on flash (%zu bytes) is bigger than the reserved space in memory, will just copy the first %i bytes\n",
++-		       nvram_len, NVRAM_SPACE - 1);
++-		nvram_len = NVRAM_SPACE - 1;
++-	}
++-	/* proceed reading data after header */
++-	__ioread32_copy(nvram_buf + sizeof(*header), header + 1,
++-			DIV_ROUND_UP(nvram_len, 4));
++-	nvram_buf[NVRAM_SPACE - 1] = '\0';
+++	bcm47xx_nvram_copy(flash_start + offset, res_size - offset);
++ 
++ 	return 0;
++ }
+diff --git a/target/linux/generic/backport-5.4/831-v5.13-0004-firmware-bcm47xx_nvram-look-for-NVRAM-with-for-inste.patch b/target/linux/generic/backport-5.4/831-v5.13-0004-firmware-bcm47xx_nvram-look-for-NVRAM-with-for-inste.patch
+new file mode 100644
+index 0000000000..059a13220b
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/831-v5.13-0004-firmware-bcm47xx_nvram-look-for-NVRAM-with-for-inste.patch
+@@ -0,0 +1,37 @@
++From 98b68324f67236e8c9152976535dc1f27fb67ba8 Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
++Date: Mon, 8 Mar 2021 10:03:19 +0100
++Subject: [PATCH] firmware: bcm47xx_nvram: look for NVRAM with for instead of
++ while
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++This loop requires variable initialization, stop condition and post
++iteration increment. It's pretty much a for loop definition.
++
++Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
++Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
++---
++ drivers/firmware/broadcom/bcm47xx_nvram.c | 4 +---
++ 1 file changed, 1 insertion(+), 3 deletions(-)
++
++--- a/drivers/firmware/broadcom/bcm47xx_nvram.c
+++++ b/drivers/firmware/broadcom/bcm47xx_nvram.c
++@@ -93,15 +93,13 @@ static int bcm47xx_nvram_find_and_copy(v
++ 	}
++ 
++ 	/* TODO: when nvram is on nand flash check for bad blocks first. */
++-	flash_size = FLASH_MIN;
++-	while (flash_size <= res_size) {
+++	for (flash_size = FLASH_MIN; flash_size <= res_size; flash_size <<= 1) {
++ 		/* Windowed flash access */
++ 		size = find_nvram_size(flash_start + flash_size);
++ 		if (size) {
++ 			offset = flash_size - size;
++ 			goto found;
++ 		}
++-		flash_size <<= 1;
++ 	}
++ 
++ 	/* Try embedded NVRAM at 4 KB and 1 KB as last resorts */
+diff --git a/target/linux/generic/backport-5.4/831-v5.13-0005-firmware-bcm47xx_nvram-inline-code-checking-NVRAM-si.patch b/target/linux/generic/backport-5.4/831-v5.13-0005-firmware-bcm47xx_nvram-inline-code-checking-NVRAM-si.patch
+new file mode 100644
+index 0000000000..21d250049e
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/831-v5.13-0005-firmware-bcm47xx_nvram-inline-code-checking-NVRAM-si.patch
+@@ -0,0 +1,70 @@
++From f52da4ccfec9192e17f5c16260dfdd6d3ea76f65 Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
++Date: Mon, 8 Mar 2021 10:03:20 +0100
++Subject: [PATCH] firmware: bcm47xx_nvram: inline code checking NVRAM size
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++Separated function was not improving code quality much (or at all).
++Moreover it expected possible flash end address as argument and it was
++returning NVRAM size.
++
++The new code always operates on offsets which means less logic and less
++calculations.
++
++Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
++Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
++---
++ drivers/firmware/broadcom/bcm47xx_nvram.c | 25 +++++++----------------
++ 1 file changed, 7 insertions(+), 18 deletions(-)
++
++--- a/drivers/firmware/broadcom/bcm47xx_nvram.c
+++++ b/drivers/firmware/broadcom/bcm47xx_nvram.c
++@@ -42,18 +42,6 @@ static bool bcm47xx_nvram_is_valid(void
++ 	return ((struct nvram_header *)nvram)->magic == NVRAM_MAGIC;
++ }
++ 
++-static u32 find_nvram_size(void __iomem *end)
++-{
++-	int i;
++-
++-	for (i = 0; i < ARRAY_SIZE(nvram_sizes); i++) {
++-		if (bcm47xx_nvram_is_valid(end - nvram_sizes[i]))
++-			return nvram_sizes[i];
++-	}
++-
++-	return 0;
++-}
++-
++ /**
++  * bcm47xx_nvram_copy - copy NVRAM to internal buffer
++  */
++@@ -85,7 +73,7 @@ static int bcm47xx_nvram_find_and_copy(v
++ {
++ 	size_t flash_size;
++ 	size_t offset;
++-	u32 size;
+++	int i;
++ 
++ 	if (nvram_len) {
++ 		pr_warn("nvram already initialized\n");
++@@ -93,12 +81,13 @@ static int bcm47xx_nvram_find_and_copy(v
++ 	}
++ 
++ 	/* TODO: when nvram is on nand flash check for bad blocks first. */
+++
+++	/* Try every possible flash size and check for NVRAM at its end */
++ 	for (flash_size = FLASH_MIN; flash_size <= res_size; flash_size <<= 1) {
++-		/* Windowed flash access */
++-		size = find_nvram_size(flash_start + flash_size);
++-		if (size) {
++-			offset = flash_size - size;
++-			goto found;
+++		for (i = 0; i < ARRAY_SIZE(nvram_sizes); i++) {
+++			offset = flash_size - nvram_sizes[i];
+++			if (bcm47xx_nvram_is_valid(flash_start + offset))
+++				goto found;
++ 		}
++ 	}
++ 
+diff --git a/target/linux/generic/backport-5.4/999-bpf-off-by-one-backport.patch b/target/linux/generic/backport-5.4/999-bpf-off-by-one-backport.patch
+new file mode 100644
+index 0000000000..271eac67da
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/999-bpf-off-by-one-backport.patch
+@@ -0,0 +1,13 @@
++Index: linux-5.4.158/kernel/bpf/verifier.c
++===================================================================
++--- linux-5.4.158.orig/kernel/bpf/verifier.c
+++++ linux-5.4.158/kernel/bpf/verifier.c
++@@ -5372,7 +5372,7 @@ static void find_good_pkt_pointers(struc
++ 
++ 	new_range = dst_reg->off;
++ 	if (range_right_open)
++-		new_range--;
+++		new_range++;
++ 
++ 	/* Examples for register markings:
++ 	 *
+diff --git a/target/linux/generic/backport-5.4/999-net-bridge-clear-bridge-s-private-skb-space-on-xmit.patch b/target/linux/generic/backport-5.4/999-net-bridge-clear-bridge-s-private-skb-space-on-xmit.patch
+new file mode 100644
+index 0000000000..20f71569da
+--- /dev/null
++++ b/target/linux/generic/backport-5.4/999-net-bridge-clear-bridge-s-private-skb-space-on-xmit.patch
+@@ -0,0 +1,36 @@
++From fd65e5a95d08389444e8591a20538b3edece0e15 Mon Sep 17 00:00:00 2001
++From: Nikolay Aleksandrov <nikolay@cumulusnetworks.com>
++Date: Fri, 31 Jul 2020 19:26:16 +0300
++Subject: [PATCH] net: bridge: clear bridge's private skb space on xmit
++
++We need to clear all of the bridge private skb variables as they can be
++stale due to the packet being recirculated through the stack and then
++transmitted through the bridge device. Similar memset is already done on
++bridge's input. We've seen cases where proxyarp_replied was 1 on routed
++multicast packets transmitted through the bridge to ports with neigh
++suppress which were getting dropped. Same thing can in theory happen with
++the port isolation bit as well.
++
++Fixes: 821f1b21cabb ("bridge: add new BR_NEIGH_SUPPRESS port flag to suppress arp and nd flood")
++Signed-off-by: Nikolay Aleksandrov <nikolay@cumulusnetworks.com>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ net/bridge/br_device.c | 2 ++
++ 1 file changed, 2 insertions(+)
++
++diff --git a/net/bridge/br_device.c b/net/bridge/br_device.c
++index 8c7b78f8bc23..9a2fb4aa1a10 100644
++--- a/net/bridge/br_device.c
+++++ b/net/bridge/br_device.c
++@@ -36,6 +36,8 @@ netdev_tx_t br_dev_xmit(struct sk_buff *skb, struct net_device *dev)
++ 	const unsigned char *dest;
++ 	u16 vid = 0;
++ 
+++	memset(skb->cb, 0, sizeof(struct br_input_skb_cb));
+++
++ 	rcu_read_lock();
++ 	nf_ops = rcu_dereference(nf_br_ops);
++ 	if (nf_ops && nf_ops->br_dev_xmit_hook(skb)) {
++-- 
++2.25.1
++
+diff --git a/target/linux/generic/config-5.4 b/target/linux/generic/config-5.4
+new file mode 100644
+index 0000000000..a821a1de5f
+--- /dev/null
++++ b/target/linux/generic/config-5.4
+@@ -0,0 +1,6572 @@
++# CONFIG_104_QUAD_8 is not set
++CONFIG_32BIT=y
++CONFIG_64BIT_TIME=y
++# CONFIG_6LOWPAN is not set
++# CONFIG_6LOWPAN_DEBUGFS is not set
++# CONFIG_6PACK is not set
++# CONFIG_8139CP is not set
++# CONFIG_8139TOO is not set
++# CONFIG_9P_FS is not set
++# CONFIG_AB3100_CORE is not set
++# CONFIG_AB8500_CORE is not set
++# CONFIG_ABP060MG is not set
++# CONFIG_ABX500_CORE is not set
++# CONFIG_ACCESSIBILITY is not set
++# CONFIG_ACENIC is not set
++# CONFIG_ACERHDF is not set
++# CONFIG_ACER_WIRELESS is not set
++# CONFIG_ACORN_PARTITION is not set
++# CONFIG_ACPI_ALS is not set
++# CONFIG_ACPI_APEI is not set
++# CONFIG_ACPI_BUTTON is not set
++# CONFIG_ACPI_CONFIGFS is not set
++# CONFIG_ACPI_CUSTOM_METHOD is not set
++# CONFIG_ACPI_EXTLOG is not set
++# CONFIG_ACPI_HED is not set
++# CONFIG_ACPI_NFIT is not set
++# CONFIG_ACPI_REDUCED_HARDWARE_ONLY is not set
++# CONFIG_ACPI_TABLE_UPGRADE is not set
++# CONFIG_ACPI_VIDEO is not set
++# CONFIG_AD2S1200 is not set
++# CONFIG_AD2S1210 is not set
++# CONFIG_AD2S90 is not set
++# CONFIG_AD5064 is not set
++# CONFIG_AD525X_DPOT is not set
++# CONFIG_AD5272 is not set
++# CONFIG_AD5360 is not set
++# CONFIG_AD5380 is not set
++# CONFIG_AD5421 is not set
++# CONFIG_AD5446 is not set
++# CONFIG_AD5449 is not set
++# CONFIG_AD5504 is not set
++# CONFIG_AD5592R is not set
++# CONFIG_AD5593R is not set
++# CONFIG_AD5624R_SPI is not set
++# CONFIG_AD5686 is not set
++# CONFIG_AD5686_SPI is not set
++# CONFIG_AD5696_I2C is not set
++# CONFIG_AD5755 is not set
++# CONFIG_AD5758 is not set
++# CONFIG_AD5761 is not set
++# CONFIG_AD5764 is not set
++# CONFIG_AD5791 is not set
++# CONFIG_AD5933 is not set
++# CONFIG_AD7124 is not set
++# CONFIG_AD7150 is not set
++# CONFIG_AD7152 is not set
++# CONFIG_AD7192 is not set
++# CONFIG_AD7266 is not set
++# CONFIG_AD7280 is not set
++# CONFIG_AD7291 is not set
++# CONFIG_AD7298 is not set
++# CONFIG_AD7303 is not set
++# CONFIG_AD7476 is not set
++# CONFIG_AD7606 is not set
++# CONFIG_AD7606_IFACE_PARALLEL is not set
++# CONFIG_AD7606_IFACE_SPI is not set
++# CONFIG_AD7746 is not set
++# CONFIG_AD7766 is not set
++# CONFIG_AD7768_1 is not set
++# CONFIG_AD7780 is not set
++# CONFIG_AD7791 is not set
++# CONFIG_AD7793 is not set
++# CONFIG_AD7816 is not set
++# CONFIG_AD7887 is not set
++# CONFIG_AD7923 is not set
++# CONFIG_AD7949 is not set
++# CONFIG_AD799X is not set
++# CONFIG_AD8366 is not set
++# CONFIG_AD8801 is not set
++# CONFIG_AD9523 is not set
++# CONFIG_AD9832 is not set
++# CONFIG_AD9834 is not set
++# CONFIG_ADAPTEC_STARFIRE is not set
++# CONFIG_ADE7854 is not set
++# CONFIG_ADF4350 is not set
++# CONFIG_ADF4371 is not set
++# CONFIG_ADFS_FS is not set
++# CONFIG_ADIN_PHY is not set
++# CONFIG_ADIS16080 is not set
++# CONFIG_ADIS16130 is not set
++# CONFIG_ADIS16136 is not set
++# CONFIG_ADIS16201 is not set
++# CONFIG_ADIS16203 is not set
++# CONFIG_ADIS16209 is not set
++# CONFIG_ADIS16240 is not set
++# CONFIG_ADIS16260 is not set
++# CONFIG_ADIS16400 is not set
++# CONFIG_ADIS16460 is not set
++# CONFIG_ADIS16480 is not set
++# CONFIG_ADJD_S311 is not set
++# CONFIG_ADM6996_PHY is not set
++# CONFIG_ADM8211 is not set
++# CONFIG_ADT7316 is not set
++CONFIG_ADVISE_SYSCALLS=y
++# CONFIG_ADXL345_I2C is not set
++# CONFIG_ADXL345_SPI is not set
++# CONFIG_ADXL372_I2C is not set
++# CONFIG_ADXL372_SPI is not set
++# CONFIG_ADXRS450 is not set
++CONFIG_AEABI=y
++# CONFIG_AFE4403 is not set
++# CONFIG_AFE4404 is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_AFS_DEBUG_CURSOR is not set
++# CONFIG_AFS_FS is not set
++# CONFIG_AF_KCM is not set
++# CONFIG_AF_RXRPC is not set
++# CONFIG_AF_RXRPC_INJECT_LOSS is not set
++# CONFIG_AF_RXRPC_IPV6 is not set
++# CONFIG_AGP is not set
++# CONFIG_AHCI_CEVA is not set
++# CONFIG_AHCI_IMX is not set
++# CONFIG_AHCI_MVEBU is not set
++# CONFIG_AHCI_QORIQ is not set
++CONFIG_AIO=y
++# CONFIG_AIRO is not set
++# CONFIG_AIRO_CS is not set
++# CONFIG_AIX_PARTITION is not set
++# CONFIG_AK09911 is not set
++# CONFIG_AK8974 is not set
++# CONFIG_AK8975 is not set
++# CONFIG_AL3320A is not set
++# CONFIG_ALIM7101_WDT is not set
++CONFIG_ALLOW_DEV_COREDUMP=y
++# CONFIG_ALTERA_MBOX is not set
++# CONFIG_ALTERA_MSGDMA is not set
++# CONFIG_ALTERA_STAPL is not set
++# CONFIG_ALTERA_TSE is not set
++# CONFIG_ALX is not set
++# CONFIG_AL_FIC is not set
++# CONFIG_AM2315 is not set
++# CONFIG_AM335X_PHY_USB is not set
++# CONFIG_AMBA_PL08X is not set
++# CONFIG_AMD8111_ETH is not set
++# CONFIG_AMD_MEM_ENCRYPT is not set
++# CONFIG_AMD_PHY is not set
++# CONFIG_AMD_XGBE is not set
++# CONFIG_AMD_XGBE_HAVE_ECC is not set
++# CONFIG_AMIGA_PARTITION is not set
++# CONFIG_AMILO_RFKILL is not set
++# CONFIG_ANDROID is not set
++CONFIG_ANON_INODES=y
++# CONFIG_APDS9300 is not set
++# CONFIG_APDS9802ALS is not set
++# CONFIG_APDS9960 is not set
++# CONFIG_APM8018X is not set
++# CONFIG_APM_EMULATION is not set
++# CONFIG_APPLE_GMUX is not set
++# CONFIG_APPLE_PROPERTIES is not set
++# CONFIG_APPLICOM is not set
++# CONFIG_AQTION is not set
++# CONFIG_AQUANTIA_PHY is not set
++# CONFIG_AR5523 is not set
++# CONFIG_AR7 is not set
++# CONFIG_AR8216_PHY is not set
++# CONFIG_AR8216_PHY_LEDS is not set
++# CONFIG_ARCH_ACTIONS is not set
++# CONFIG_ARCH_AGILEX is not set
++# CONFIG_ARCH_ALPINE is not set
++# CONFIG_ARCH_ARTPEC is not set
++# CONFIG_ARCH_ASPEED is not set
++# CONFIG_ARCH_AT91 is not set
++# CONFIG_ARCH_AXXIA is not set
++# CONFIG_ARCH_BCM is not set
++# CONFIG_ARCH_BCM2835 is not set
++# CONFIG_ARCH_BCM_21664 is not set
++# CONFIG_ARCH_BCM_23550 is not set
++# CONFIG_ARCH_BCM_281XX is not set
++# CONFIG_ARCH_BCM_5301X is not set
++# CONFIG_ARCH_BCM_53573 is not set
++# CONFIG_ARCH_BCM_63XX is not set
++# CONFIG_ARCH_BCM_CYGNUS is not set
++# CONFIG_ARCH_BCM_IPROC is not set
++# CONFIG_ARCH_BCM_NSP is not set
++# CONFIG_ARCH_BERLIN is not set
++# CONFIG_ARCH_BITMAIN is not set
++# CONFIG_ARCH_BRCMSTB is not set
++# CONFIG_ARCH_CLPS711X is not set
++# CONFIG_ARCH_CNS3XXX is not set
++# CONFIG_ARCH_DAVINCI is not set
++# CONFIG_ARCH_DIGICOLOR is not set
++# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set
++# CONFIG_ARCH_DOVE is not set
++# CONFIG_ARCH_EBSA110 is not set
++# CONFIG_ARCH_EP93XX is not set
++# CONFIG_ARCH_EXYNOS is not set
++CONFIG_ARCH_FLATMEM_ENABLE=y
++# CONFIG_ARCH_FOOTBRIDGE is not set
++# CONFIG_ARCH_GEMINI is not set
++CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y
++# CONFIG_ARCH_HI3xxx is not set
++# CONFIG_ARCH_HIGHBANK is not set
++# CONFIG_ARCH_HISI is not set
++# CONFIG_ARCH_INTEGRATOR is not set
++# CONFIG_ARCH_IOP13XX is not set
++# CONFIG_ARCH_IOP32X is not set
++# CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IXP4XX is not set
++# CONFIG_ARCH_K3 is not set
++# CONFIG_ARCH_KEYSTONE is not set
++# CONFIG_ARCH_KS8695 is not set
++# CONFIG_ARCH_LAYERSCAPE is not set
++# CONFIG_ARCH_LG1K is not set
++# CONFIG_ARCH_LPC32XX is not set
++# CONFIG_ARCH_MEDIATEK is not set
++# CONFIG_ARCH_MESON is not set
++# CONFIG_ARCH_MILBEAUT is not set
++CONFIG_ARCH_MMAP_RND_BITS=8
++CONFIG_ARCH_MMAP_RND_BITS_MAX=16
++CONFIG_ARCH_MMAP_RND_BITS_MIN=8
++CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
++CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8
++# CONFIG_ARCH_MMP is not set
++# CONFIG_ARCH_MULTIPLATFORM is not set
++# CONFIG_ARCH_MULTI_V6 is not set
++# CONFIG_ARCH_MULTI_V7 is not set
++# CONFIG_ARCH_MV78XX0 is not set
++# CONFIG_ARCH_MVEBU is not set
++# CONFIG_ARCH_MXC is not set
++# CONFIG_ARCH_MXS is not set
++# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
++# CONFIG_ARCH_NETX is not set
++# CONFIG_ARCH_NOMADIK is not set
++# CONFIG_ARCH_NPCM is not set
++# CONFIG_ARCH_NSPIRE is not set
++# CONFIG_ARCH_OMAP is not set
++# CONFIG_ARCH_OMAP1 is not set
++# CONFIG_ARCH_OMAP2 is not set
++# CONFIG_ARCH_OMAP2PLUS is not set
++# CONFIG_ARCH_OMAP3 is not set
++# CONFIG_ARCH_OMAP4 is not set
++# CONFIG_ARCH_ORION5X is not set
++# CONFIG_ARCH_OXNAS is not set
++# CONFIG_ARCH_PICOXCELL is not set
++# CONFIG_ARCH_PRIMA2 is not set
++# CONFIG_ARCH_PXA is not set
++# CONFIG_ARCH_QCOM is not set
++# CONFIG_ARCH_RDA is not set
++# CONFIG_ARCH_REALTEK is not set
++# CONFIG_ARCH_REALVIEW is not set
++# CONFIG_ARCH_RENESAS is not set
++# CONFIG_ARCH_ROCKCHIP is not set
++# CONFIG_ARCH_RPC is not set
++# CONFIG_ARCH_S3C24XX is not set
++# CONFIG_ARCH_S3C64XX is not set
++# CONFIG_ARCH_S5PV210 is not set
++# CONFIG_ARCH_SA1100 is not set
++# CONFIG_ARCH_SEATTLE is not set
++# CONFIG_ARCH_SHMOBILE is not set
++# CONFIG_ARCH_SIRF is not set
++# CONFIG_ARCH_SOCFPGA is not set
++# CONFIG_ARCH_SPRD is not set
++# CONFIG_ARCH_STI is not set
++# CONFIG_ARCH_STM32 is not set
++# CONFIG_ARCH_STRATIX10 is not set
++# CONFIG_ARCH_SUNXI is not set
++# CONFIG_ARCH_SYNQUACER is not set
++# CONFIG_ARCH_TANGO is not set
++# CONFIG_ARCH_TEGRA is not set
++# CONFIG_ARCH_THUNDER is not set
++# CONFIG_ARCH_THUNDER2 is not set
++# CONFIG_ARCH_U300 is not set
++# CONFIG_ARCH_U8500 is not set
++# CONFIG_ARCH_UNIPHIER is not set
++# CONFIG_ARCH_VERSATILE is not set
++# CONFIG_ARCH_VEXPRESS is not set
++# CONFIG_ARCH_VIRT is not set
++# CONFIG_ARCH_VT8500 is not set
++# CONFIG_ARCH_VULCAN is not set
++# CONFIG_ARCH_W90X900 is not set
++# CONFIG_ARCH_WANTS_THP_SWAP is not set
++# CONFIG_ARCH_WM8505 is not set
++# CONFIG_ARCH_WM8750 is not set
++# CONFIG_ARCH_WM8850 is not set
++# CONFIG_ARCH_XGENE is not set
++# CONFIG_ARCH_ZX is not set
++# CONFIG_ARCH_ZYNQ is not set
++# CONFIG_ARCH_ZYNQMP is not set
++# CONFIG_ARCNET is not set
++# CONFIG_ARC_EMAC is not set
++# CONFIG_ARC_IRQ_NO_AUTOSAVE is not set
++# CONFIG_ARM64_16K_PAGES is not set
++# CONFIG_ARM64_64K_PAGES is not set
++# CONFIG_ARM64_CRYPTO is not set
++# CONFIG_ARM64_ERRATUM_1024718 is not set
++# CONFIG_ARM64_ERRATUM_1463225 is not set
++# CONFIG_ARM64_ERRATUM_1542419 is not set
++# CONFIG_ARM64_ERRATUM_819472 is not set
++# CONFIG_ARM64_ERRATUM_824069 is not set
++# CONFIG_ARM64_ERRATUM_826319 is not set
++# CONFIG_ARM64_ERRATUM_827319 is not set
++# CONFIG_ARM64_ERRATUM_832075 is not set
++# CONFIG_ARM64_ERRATUM_834220 is not set
++# CONFIG_ARM64_ERRATUM_843419 is not set
++# CONFIG_ARM64_ERRATUM_845719 is not set
++# CONFIG_ARM64_ERRATUM_858921 is not set
++# CONFIG_ARM64_HW_AFDBM is not set
++# CONFIG_ARM64_LSE_ATOMICS is not set
++# CONFIG_ARM64_MODULE_PLTS is not set
++# CONFIG_ARM64_PAN is not set
++# CONFIG_ARM64_PMEM is not set
++# CONFIG_ARM64_PSEUDO_NMI is not set
++# CONFIG_ARM64_PTDUMP_DEBUGFS is not set
++# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
++# CONFIG_ARM64_RAS_EXTN is not set
++# CONFIG_ARM64_RELOC_TEST is not set
++CONFIG_ARM64_SW_TTBR0_PAN=y
++# CONFIG_ARM64_UAO is not set
++# CONFIG_ARM64_VA_BITS_48 is not set
++# CONFIG_ARM64_VHE is not set
++# CONFIG_ARM_APPENDED_DTB is not set
++# CONFIG_ARM_ARCH_TIMER is not set
++# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
++# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set
++# CONFIG_ARM_CCI is not set
++# CONFIG_ARM_CCI400_PMU is not set
++# CONFIG_ARM_CCI5xx_PMU is not set
++# CONFIG_ARM_CCI_PMU is not set
++# CONFIG_ARM_CCN is not set
++# CONFIG_ARM_CPUIDLE is not set
++CONFIG_ARM_CPU_TOPOLOGY=y
++# CONFIG_ARM_CRYPTO is not set
++CONFIG_ARM_DMA_MEM_BUFFERABLE=y
++# CONFIG_ARM_DSU_PMU is not set
++# CONFIG_ARM_ERRATA_326103 is not set
++# CONFIG_ARM_ERRATA_364296 is not set
++# CONFIG_ARM_ERRATA_411920 is not set
++# CONFIG_ARM_ERRATA_430973 is not set
++# CONFIG_ARM_ERRATA_458693 is not set
++# CONFIG_ARM_ERRATA_460075 is not set
++# CONFIG_ARM_ERRATA_643719 is not set
++# CONFIG_ARM_ERRATA_720789 is not set
++# CONFIG_ARM_ERRATA_742230 is not set
++# CONFIG_ARM_ERRATA_742231 is not set
++# CONFIG_ARM_ERRATA_743622 is not set
++# CONFIG_ARM_ERRATA_751472 is not set
++# CONFIG_ARM_ERRATA_754322 is not set
++# CONFIG_ARM_ERRATA_754327 is not set
++# CONFIG_ARM_ERRATA_764369 is not set
++# CONFIG_ARM_ERRATA_773022 is not set
++# CONFIG_ARM_ERRATA_775420 is not set
++# CONFIG_ARM_ERRATA_798181 is not set
++# CONFIG_ARM_ERRATA_814220 is not set
++# CONFIG_ARM_ERRATA_818325_852422 is not set
++# CONFIG_ARM_ERRATA_821420 is not set
++# CONFIG_ARM_ERRATA_825619 is not set
++# CONFIG_ARM_ERRATA_852421 is not set
++# CONFIG_ARM_ERRATA_852423 is not set
++# CONFIG_ARM_ERRATA_857271 is not set
++# CONFIG_ARM_ERRATA_857272 is not set
++CONFIG_ARM_GIC_MAX_NR=1
++# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set
++# CONFIG_ARM_KPROBES_TEST is not set
++# CONFIG_ARM_LPAE is not set
++# CONFIG_ARM_MHU is not set
++# CONFIG_ARM_MODULE_PLTS is not set
++# CONFIG_ARM_PATCH_PHYS_VIRT is not set
++# CONFIG_ARM_PSCI is not set
++# CONFIG_ARM_PSCI_CHECKER is not set
++# CONFIG_ARM_PSCI_CPUIDLE is not set
++# CONFIG_ARM_PTDUMP_DEBUGFS is not set
++# CONFIG_ARM_SBSA_WATCHDOG is not set
++# CONFIG_ARM_SCPI_PROTOCOL is not set
++# CONFIG_ARM_SDE_INTERFACE is not set
++# CONFIG_ARM_SP805_WATCHDOG is not set
++# CONFIG_ARM_SPE_PMU is not set
++# CONFIG_ARM_THUMBEE is not set
++# CONFIG_ARM_TIMER_SP804 is not set
++# CONFIG_ARM_UNWIND is not set
++# CONFIG_ARM_VIRT_EXT is not set
++# CONFIG_AS3935 is not set
++# CONFIG_ASM9260_TIMER is not set
++# CONFIG_ASUS_LAPTOP is not set
++# CONFIG_ASUS_WIRELESS is not set
++# CONFIG_ASYMMETRIC_KEY_TYPE is not set
++# CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE is not set
++# CONFIG_ASYNC_RAID6_TEST is not set
++# CONFIG_ASYNC_TX_DMA is not set
++# CONFIG_AT76C50X_USB is not set
++# CONFIG_AT803X_PHY is not set
++# CONFIG_AT91_SAMA5D2_ADC is not set
++# CONFIG_ATA is not set
++# CONFIG_ATAGS is not set
++CONFIG_ATAGS_PROC=y
++# CONFIG_ATALK is not set
++# CONFIG_ATARI_PARTITION is not set
++# CONFIG_ATA_ACPI is not set
++CONFIG_ATA_BMDMA=y
++# CONFIG_ATA_GENERIC is not set
++# CONFIG_ATA_LEDS is not set
++# CONFIG_ATA_NONSTANDARD is not set
++# CONFIG_ATA_OVER_ETH is not set
++# CONFIG_ATA_PIIX is not set
++CONFIG_ATA_SFF=y
++# CONFIG_ATA_VERBOSE_ERROR is not set
++# CONFIG_ATH10K is not set
++# CONFIG_ATH25 is not set
++# CONFIG_ATH5K is not set
++# CONFIG_ATH6KL is not set
++# CONFIG_ATH79 is not set
++# CONFIG_ATH9K is not set
++# CONFIG_ATH9K_HTC is not set
++# CONFIG_ATH_DEBUG is not set
++# CONFIG_ATL1 is not set
++# CONFIG_ATL1C is not set
++# CONFIG_ATL1E is not set
++# CONFIG_ATL2 is not set
++# CONFIG_ATLAS_PH_SENSOR is not set
++# CONFIG_ATM is not set
++# CONFIG_ATMEL is not set
++# CONFIG_ATMEL_PIT is not set
++# CONFIG_ATMEL_SSC is not set
++# CONFIG_ATM_AMBASSADOR is not set
++# CONFIG_ATM_BR2684 is not set
++CONFIG_ATM_BR2684_IPFILTER=y
++# CONFIG_ATM_CLIP is not set
++CONFIG_ATM_CLIP_NO_ICMP=y
++# CONFIG_ATM_DRIVERS is not set
++# CONFIG_ATM_DUMMY is not set
++# CONFIG_ATM_ENI is not set
++# CONFIG_ATM_FIRESTREAM is not set
++# CONFIG_ATM_FORE200E is not set
++# CONFIG_ATM_HE is not set
++# CONFIG_ATM_HORIZON is not set
++# CONFIG_ATM_IA is not set
++# CONFIG_ATM_IDT77252 is not set
++# CONFIG_ATM_LANAI is not set
++# CONFIG_ATM_LANE is not set
++# CONFIG_ATM_MPOA is not set
++# CONFIG_ATM_NICSTAR is not set
++# CONFIG_ATM_SOLOS is not set
++# CONFIG_ATM_TCP is not set
++# CONFIG_ATM_ZATM is not set
++# CONFIG_ATOMIC64_SELFTEST is not set
++# CONFIG_ATP is not set
++# CONFIG_AUDIT is not set
++# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set
++# CONFIG_AURORA_NB8800 is not set
++# CONFIG_AUTOFS4_FS is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTO_ZRELADDR is not set
++# CONFIG_AUXDISPLAY is not set
++# CONFIG_AX25 is not set
++# CONFIG_AX25_DAMA_SLAVE is not set
++# CONFIG_AX88796 is not set
++# CONFIG_AX88796B_PHY is not set
++# CONFIG_AXP20X_ADC is not set
++# CONFIG_AXP20X_POWER is not set
++# CONFIG_AXP288_ADC is not set
++# CONFIG_AXP288_FUEL_GAUGE is not set
++# CONFIG_B43 is not set
++# CONFIG_B43LEGACY is not set
++# CONFIG_B44 is not set
++# CONFIG_B53 is not set
++# CONFIG_BACKLIGHT_ADP8860 is not set
++# CONFIG_BACKLIGHT_ADP8870 is not set
++# CONFIG_BACKLIGHT_APPLE is not set
++# CONFIG_BACKLIGHT_ARCXCNN is not set
++# CONFIG_BACKLIGHT_BD6107 is not set
++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
++# CONFIG_BACKLIGHT_GENERIC is not set
++# CONFIG_BACKLIGHT_GPIO is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++# CONFIG_BACKLIGHT_LM3630A is not set
++# CONFIG_BACKLIGHT_LM3639 is not set
++# CONFIG_BACKLIGHT_LP855X is not set
++# CONFIG_BACKLIGHT_LV5207LP is not set
++# CONFIG_BACKLIGHT_PANDORA is not set
++# CONFIG_BACKLIGHT_PM8941_WLED is not set
++# CONFIG_BACKLIGHT_PWM is not set
++# CONFIG_BACKLIGHT_RPI is not set
++# CONFIG_BACKLIGHT_SAHARA is not set
++# CONFIG_BACKTRACE_SELF_TEST is not set
++CONFIG_BASE_FULL=y
++CONFIG_BASE_SMALL=0
++# CONFIG_BATMAN_ADV is not set
++# CONFIG_BATTERY_BQ27XXX is not set
++# CONFIG_BATTERY_BQ27XXX_HDQ is not set
++# CONFIG_BATTERY_DS2760 is not set
++# CONFIG_BATTERY_DS2780 is not set
++# CONFIG_BATTERY_DS2781 is not set
++# CONFIG_BATTERY_DS2782 is not set
++# CONFIG_BATTERY_GAUGE_LTC2941 is not set
++# CONFIG_BATTERY_GOLDFISH is not set
++# CONFIG_BATTERY_LEGO_EV3 is not set
++# CONFIG_BATTERY_MAX17040 is not set
++# CONFIG_BATTERY_MAX17042 is not set
++# CONFIG_BATTERY_MAX1721X is not set
++# CONFIG_BATTERY_RT5033 is not set
++# CONFIG_BATTERY_SBS is not set
++# CONFIG_BAYCOM_EPP is not set
++# CONFIG_BAYCOM_PAR is not set
++# CONFIG_BAYCOM_SER_FDX is not set
++# CONFIG_BAYCOM_SER_HDX is not set
++# CONFIG_BCACHE is not set
++# CONFIG_BCM47XX is not set
++# CONFIG_BCM63XX is not set
++# CONFIG_BCM63XX_PHY is not set
++# CONFIG_BCM7038_WDT is not set
++# CONFIG_BCM7XXX_PHY is not set
++# CONFIG_BCM84881_PHY is not set
++# CONFIG_BCM87XX_PHY is not set
++# CONFIG_BCMA is not set
++# CONFIG_BCMA_DRIVER_GPIO is not set
++CONFIG_BCMA_POSSIBLE=y
++# CONFIG_BCMGENET is not set
++# CONFIG_BCM_IPROC_ADC is not set
++# CONFIG_BCM_KONA_USB2_PHY is not set
++# CONFIG_BCM_SBA_RAID is not set
++# CONFIG_BDI_SWITCH is not set
++# CONFIG_BE2ISCSI is not set
++# CONFIG_BE2NET is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_BGMAC is not set
++# CONFIG_BH1750 is not set
++# CONFIG_BH1780 is not set
++# CONFIG_BIG_KEYS is not set
++# CONFIG_BIG_LITTLE is not set
++# CONFIG_BINARY_PRINTF is not set
++# CONFIG_BINFMT_AOUT is not set
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_ELF_FDPIC is not set
++# CONFIG_BINFMT_FLAT is not set
++# CONFIG_BINFMT_MISC is not set
++CONFIG_BINFMT_SCRIPT=y
++CONFIG_BITREVERSE=y
++# CONFIG_BLK_CGROUP_IOCOST is not set
++# CONFIG_BLK_CGROUP_IOLATENCY is not set
++# CONFIG_BLK_CMDLINE_PARSER is not set
++# CONFIG_BLK_DEBUG_FS is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
++# CONFIG_BLK_DEV_4DRIVES is not set
++# CONFIG_BLK_DEV_AEC62XX is not set
++# CONFIG_BLK_DEV_ALI14XX is not set
++# CONFIG_BLK_DEV_ALI15X3 is not set
++# CONFIG_BLK_DEV_AMD74XX is not set
++# CONFIG_BLK_DEV_ATIIXP is not set
++# CONFIG_BLK_DEV_BSG is not set
++# CONFIG_BLK_DEV_BSGLIB is not set
++# CONFIG_BLK_DEV_CMD640 is not set
++# CONFIG_BLK_DEV_CMD64X is not set
++# CONFIG_BLK_DEV_COW_COMMON is not set
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++# CONFIG_BLK_DEV_CS5520 is not set
++# CONFIG_BLK_DEV_CS5530 is not set
++# CONFIG_BLK_DEV_CS5535 is not set
++# CONFIG_BLK_DEV_CS5536 is not set
++# CONFIG_BLK_DEV_CY82C693 is not set
++# CONFIG_BLK_DEV_DAC960 is not set
++# CONFIG_BLK_DEV_DELKIN is not set
++# CONFIG_BLK_DEV_DRBD is not set
++# CONFIG_BLK_DEV_DTC2278 is not set
++# CONFIG_BLK_DEV_FD is not set
++# CONFIG_BLK_DEV_GENERIC is not set
++# CONFIG_BLK_DEV_HPT366 is not set
++# CONFIG_BLK_DEV_HT6560B is not set
++# CONFIG_BLK_DEV_IDEACPI is not set
++# CONFIG_BLK_DEV_IDECD is not set
++# CONFIG_BLK_DEV_IDECS is not set
++# CONFIG_BLK_DEV_IDEPCI is not set
++# CONFIG_BLK_DEV_IDEPNP is not set
++# CONFIG_BLK_DEV_IDETAPE is not set
++# CONFIG_BLK_DEV_IDE_AU1XXX is not set
++# CONFIG_BLK_DEV_IDE_SATA is not set
++CONFIG_BLK_DEV_INITRD=y
++# CONFIG_BLK_DEV_INTEGRITY is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_BLK_DEV_IT8172 is not set
++# CONFIG_BLK_DEV_IT8213 is not set
++# CONFIG_BLK_DEV_IT821X is not set
++# CONFIG_BLK_DEV_JMICRON is not set
++# CONFIG_BLK_DEV_LOOP is not set
++CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
++# CONFIG_BLK_DEV_NBD is not set
++# CONFIG_BLK_DEV_NS87415 is not set
++# CONFIG_BLK_DEV_NULL_BLK is not set
++# CONFIG_BLK_DEV_NVME is not set
++# CONFIG_BLK_DEV_OFFBOARD is not set
++# CONFIG_BLK_DEV_OPTI621 is not set
++# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
++# CONFIG_BLK_DEV_PDC202XX_NEW is not set
++# CONFIG_BLK_DEV_PDC202XX_OLD is not set
++# CONFIG_BLK_DEV_PIIX is not set
++# CONFIG_BLK_DEV_PLATFORM is not set
++# CONFIG_BLK_DEV_PMEM is not set
++# CONFIG_BLK_DEV_QD65XX is not set
++# CONFIG_BLK_DEV_RAM is not set
++# CONFIG_BLK_DEV_RBD is not set
++# CONFIG_BLK_DEV_RSXX is not set
++# CONFIG_BLK_DEV_RZ1000 is not set
++# CONFIG_BLK_DEV_SC1200 is not set
++# CONFIG_BLK_DEV_SD is not set
++# CONFIG_BLK_DEV_SIIMAGE is not set
++# CONFIG_BLK_DEV_SIS5513 is not set
++# CONFIG_BLK_DEV_SKD is not set
++# CONFIG_BLK_DEV_SL82C105 is not set
++# CONFIG_BLK_DEV_SLC90E66 is not set
++# CONFIG_BLK_DEV_SR is not set
++# CONFIG_BLK_DEV_SVWKS is not set
++# CONFIG_BLK_DEV_SX8 is not set
++# CONFIG_BLK_DEV_TC86C001 is not set
++# CONFIG_BLK_DEV_THROTTLING is not set
++# CONFIG_BLK_DEV_TRIFLEX is not set
++# CONFIG_BLK_DEV_TRM290 is not set
++# CONFIG_BLK_DEV_UMC8672 is not set
++# CONFIG_BLK_DEV_UMEM is not set
++# CONFIG_BLK_DEV_VIA82CXXX is not set
++# CONFIG_BLK_DEV_ZONED is not set
++# CONFIG_BLK_SED_OPAL is not set
++# CONFIG_BLK_WBT is not set
++CONFIG_BLOCK=y
++# CONFIG_BMA180 is not set
++# CONFIG_BMA220 is not set
++# CONFIG_BMC150_ACCEL is not set
++# CONFIG_BMC150_MAGN is not set
++# CONFIG_BMC150_MAGN_I2C is not set
++# CONFIG_BMC150_MAGN_SPI is not set
++# CONFIG_BME680 is not set
++# CONFIG_BMG160 is not set
++# CONFIG_BMI160_I2C is not set
++# CONFIG_BMI160_SPI is not set
++# CONFIG_BMIPS_GENERIC is not set
++# CONFIG_BMP280 is not set
++# CONFIG_BNA is not set
++# CONFIG_BNX2 is not set
++# CONFIG_BNX2X is not set
++# CONFIG_BNX2X_SRIOV is not set
++# CONFIG_BNXT is not set
++# CONFIG_BONDING is not set
++# CONFIG_BOOKE_WDT is not set
++CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT=3
++# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
++# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
++# CONFIG_BOOT_PRINTK_DELAY is not set
++CONFIG_BOOT_RAW=y
++CONFIG_BPF=y
++# CONFIG_BPFILTER is not set
++CONFIG_BPF_JIT=y
++# CONFIG_BPF_JIT_ALWAYS_ON is not set
++# CONFIG_BPF_STREAM_PARSER is not set
++CONFIG_BPF_SYSCALL=y
++# CONFIG_BPQETHER is not set
++CONFIG_BQL=y
++CONFIG_BRANCH_PROFILE_NONE=y
++# CONFIG_BRCMFMAC is not set
++# CONFIG_BRCMSMAC is not set
++# CONFIG_BRCMSTB_GISB_ARB is not set
++CONFIG_BRIDGE=y
++# CONFIG_BRIDGE_EBT_802_3 is not set
++# CONFIG_BRIDGE_EBT_AMONG is not set
++# CONFIG_BRIDGE_EBT_ARP is not set
++# CONFIG_BRIDGE_EBT_ARPREPLY is not set
++# CONFIG_BRIDGE_EBT_BROUTE is not set
++# CONFIG_BRIDGE_EBT_DNAT is not set
++# CONFIG_BRIDGE_EBT_IP is not set
++# CONFIG_BRIDGE_EBT_IP6 is not set
++# CONFIG_BRIDGE_EBT_LIMIT is not set
++# CONFIG_BRIDGE_EBT_LOG is not set
++# CONFIG_BRIDGE_EBT_MARK is not set
++# CONFIG_BRIDGE_EBT_MARK_T is not set
++# CONFIG_BRIDGE_EBT_NFLOG is not set
++# CONFIG_BRIDGE_EBT_PKTTYPE is not set
++# CONFIG_BRIDGE_EBT_REDIRECT is not set
++# CONFIG_BRIDGE_EBT_SNAT is not set
++# CONFIG_BRIDGE_EBT_STP is not set
++# CONFIG_BRIDGE_EBT_T_FILTER is not set
++# CONFIG_BRIDGE_EBT_T_NAT is not set
++# CONFIG_BRIDGE_EBT_VLAN is not set
++CONFIG_BRIDGE_IGMP_SNOOPING=y
++# CONFIG_BRIDGE_NETFILTER is not set
++# CONFIG_BRIDGE_NF_EBTABLES is not set
++CONFIG_BRIDGE_VLAN_FILTERING=y
++# CONFIG_BROADCOM_PHY is not set
++CONFIG_BROKEN_ON_SMP=y
++# CONFIG_BSD_DISKLABEL is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_BSD_PROCESS_ACCT_V3 is not set
++# CONFIG_BT is not set
++# CONFIG_BTRFS_ASSERT is not set
++# CONFIG_BTRFS_DEBUG is not set
++# CONFIG_BTRFS_FS is not set
++# CONFIG_BTRFS_FS_POSIX_ACL is not set
++# CONFIG_BTRFS_FS_REF_VERIFY is not set
++# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set
++# CONFIG_BT_ATH3K is not set
++# CONFIG_BT_BNEP is not set
++CONFIG_BT_BNEP_MC_FILTER=y
++CONFIG_BT_BNEP_PROTO_FILTER=y
++# CONFIG_BT_BREDR is not set
++# CONFIG_BT_CMTP is not set
++# CONFIG_BT_HCIBCM203X is not set
++# CONFIG_BT_HCIBFUSB is not set
++# CONFIG_BT_HCIBLUECARD is not set
++# CONFIG_BT_HCIBPA10X is not set
++# CONFIG_BT_HCIBT3C is not set
++# CONFIG_BT_HCIBTSDIO is not set
++# CONFIG_BT_HCIBTUSB is not set
++# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set
++# CONFIG_BT_HCIBTUSB_MTK is not set
++# CONFIG_BT_HCIBTUSB_RTL is not set
++# CONFIG_BT_HCIDTL1 is not set
++# CONFIG_BT_HCIUART is not set
++# CONFIG_BT_HCIUART_3WIRE is not set
++# CONFIG_BT_HCIUART_AG6XX is not set
++# CONFIG_BT_HCIUART_ATH3K is not set
++CONFIG_BT_HCIUART_BCSP=y
++CONFIG_BT_HCIUART_H4=y
++# CONFIG_BT_HCIUART_LL is not set
++# CONFIG_BT_HCIUART_MRVL is not set
++# CONFIG_BT_HCIUART_QCA is not set
++# CONFIG_BT_HCIVHCI is not set
++# CONFIG_BT_HIDP is not set
++# CONFIG_BT_HS is not set
++# CONFIG_BT_LE is not set
++# CONFIG_BT_LEDS is not set
++# CONFIG_BT_MRVL is not set
++# CONFIG_BT_MTKSDIO is not set
++# CONFIG_BT_MTKUART is not set
++# CONFIG_BT_RFCOMM is not set
++CONFIG_BT_RFCOMM_TTY=y
++# CONFIG_BT_SELFTEST is not set
++CONFIG_BUG=y
++# CONFIG_BUG_ON_DATA_CORRUPTION is not set
++CONFIG_BUILDTIME_EXTABLE_SORT=y
++# CONFIG_BUILD_BIN2C is not set
++CONFIG_BUILD_SALT=""
++# CONFIG_C2PORT is not set
++CONFIG_CACHE_L2X0_PMU=y
++# CONFIG_CADENCE_WATCHDOG is not set
++# CONFIG_CAIF is not set
++# CONFIG_CAN is not set
++# CONFIG_CAN_BCM is not set
++# CONFIG_CAN_DEBUG_DEVICES is not set
++# CONFIG_CAN_DEV is not set
++# CONFIG_CAN_GS_USB is not set
++# CONFIG_CAN_GW is not set
++# CONFIG_CAN_HI311X is not set
++# CONFIG_CAN_IFI_CANFD is not set
++# CONFIG_CAN_J1939 is not set
++# CONFIG_CAN_KVASER_PCIEFD is not set
++# CONFIG_CAN_MCBA_USB is not set
++# CONFIG_CAN_M_CAN is not set
++# CONFIG_CAN_PEAK_PCIEFD is not set
++# CONFIG_CAN_RAW is not set
++# CONFIG_CAN_RCAR is not set
++# CONFIG_CAN_RCAR_CANFD is not set
++# CONFIG_CAN_SLCAN is not set
++# CONFIG_CAN_SUN4I is not set
++# CONFIG_CAN_UCAN is not set
++# CONFIG_CAN_VCAN is not set
++# CONFIG_CAN_VXCAN is not set
++# CONFIG_CAPI_AVM is not set
++# CONFIG_CAPI_EICON is not set
++# CONFIG_CAPI_TRACE is not set
++CONFIG_CARDBUS=y
++# CONFIG_CARDMAN_4000 is not set
++# CONFIG_CARDMAN_4040 is not set
++# CONFIG_CARL9170 is not set
++# CONFIG_CASSINI is not set
++# CONFIG_CAVIUM_CPT is not set
++# CONFIG_CAVIUM_ERRATUM_22375 is not set
++# CONFIG_CAVIUM_ERRATUM_23144 is not set
++# CONFIG_CAVIUM_ERRATUM_23154 is not set
++# CONFIG_CAVIUM_ERRATUM_27456 is not set
++# CONFIG_CAVIUM_ERRATUM_30115 is not set
++# CONFIG_CAVIUM_OCTEON_SOC is not set
++# CONFIG_CAVIUM_PTP is not set
++# CONFIG_CB710_CORE is not set
++# CONFIG_CC10001_ADC is not set
++# CONFIG_CCS811 is not set
++CONFIG_CC_CAN_LINK=y
++CONFIG_CC_HAS_ASM_INLINE=y
++CONFIG_CC_HAS_SANCOV_TRACE_PC=y
++CONFIG_CC_HAS_STACKPROTECTOR_NONE=y
++CONFIG_CC_HAS_WARN_MAYBE_UNINITIALIZED=y
++CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_CEPH_FS is not set
++# CONFIG_CEPH_LIB is not set
++# CONFIG_CFG80211 is not set
++# CONFIG_CFG80211_CERTIFICATION_ONUS is not set
++# CONFIG_CGROUPS is not set
++# CONFIG_CHARGER_ADP5061 is not set
++# CONFIG_CHARGER_BQ2415X is not set
++# CONFIG_CHARGER_BQ24190 is not set
++# CONFIG_CHARGER_BQ24257 is not set
++# CONFIG_CHARGER_BQ24735 is not set
++# CONFIG_CHARGER_BQ25890 is not set
++# CONFIG_CHARGER_DETECTOR_MAX14656 is not set
++# CONFIG_CHARGER_GPIO is not set
++# CONFIG_CHARGER_ISP1704 is not set
++# CONFIG_CHARGER_LP8727 is not set
++# CONFIG_CHARGER_LT3651 is not set
++# CONFIG_CHARGER_LTC3651 is not set
++# CONFIG_CHARGER_MANAGER is not set
++# CONFIG_CHARGER_MAX8903 is not set
++# CONFIG_CHARGER_RT9455 is not set
++# CONFIG_CHARGER_SBS is not set
++# CONFIG_CHARGER_SMB347 is not set
++# CONFIG_CHARGER_TWL4030 is not set
++# CONFIG_CHARGER_UCS1002 is not set
++# CONFIG_CHASH_SELFTEST is not set
++# CONFIG_CHASH_STATS is not set
++# CONFIG_CHECKPOINT_RESTORE is not set
++# CONFIG_CHELSIO_T1 is not set
++# CONFIG_CHELSIO_T3 is not set
++# CONFIG_CHELSIO_T4 is not set
++# CONFIG_CHELSIO_T4VF is not set
++# CONFIG_CHROME_PLATFORMS is not set
++# CONFIG_CHR_DEV_OSST is not set
++# CONFIG_CHR_DEV_SCH is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_CIFS is not set
++# CONFIG_CIFS_ACL is not set
++CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y
++# CONFIG_CIFS_DEBUG is not set
++# CONFIG_CIFS_DEBUG2 is not set
++# CONFIG_CIFS_FSCACHE is not set
++# CONFIG_CIFS_NFSD_EXPORT is not set
++CONFIG_CIFS_POSIX=y
++# CONFIG_CIFS_SMB2 is not set
++# CONFIG_CIFS_STATS is not set
++# CONFIG_CIFS_STATS2 is not set
++# CONFIG_CIFS_WEAK_PW_HASH is not set
++CONFIG_CIFS_XATTR=y
++# CONFIG_CIO_DAC is not set
++CONFIG_CLANG_VERSION=0
++# CONFIG_CLEANCACHE is not set
++# CONFIG_CLKSRC_VERSATILE is not set
++# CONFIG_CLK_HSDK is not set
++# CONFIG_CLK_QORIQ is not set
++# CONFIG_CLOCK_THERMAL is not set
++CONFIG_CLS_U32_MARK=y
++# CONFIG_CLS_U32_PERF is not set
++# CONFIG_CM32181 is not set
++# CONFIG_CM3232 is not set
++# CONFIG_CM3323 is not set
++# CONFIG_CM3605 is not set
++# CONFIG_CM36651 is not set
++# CONFIG_CMA is not set
++CONFIG_CMDLINE=""
++# CONFIG_CMDLINE_BOOL is not set
++# CONFIG_CMDLINE_EXTEND is not set
++# CONFIG_CMDLINE_FORCE is not set
++# CONFIG_CMDLINE_FROM_BOOTLOADER is not set
++# CONFIG_CMDLINE_PARTITION is not set
++# CONFIG_CNIC is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_CODE_PATCHING_SELFTEST is not set
++# CONFIG_COMEDI is not set
++# CONFIG_COMMON_CLK_CDCE706 is not set
++# CONFIG_COMMON_CLK_CDCE925 is not set
++# CONFIG_COMMON_CLK_CS2000_CP is not set
++# CONFIG_COMMON_CLK_FIXED_MMIO is not set
++# CONFIG_COMMON_CLK_IPROC is not set
++# CONFIG_COMMON_CLK_MAX9485 is not set
++# CONFIG_COMMON_CLK_NXP is not set
++# CONFIG_COMMON_CLK_PIC32 is not set
++# CONFIG_COMMON_CLK_PWM is not set
++# CONFIG_COMMON_CLK_PXA is not set
++# CONFIG_COMMON_CLK_QCOM is not set
++# CONFIG_COMMON_CLK_SI514 is not set
++# CONFIG_COMMON_CLK_SI5341 is not set
++# CONFIG_COMMON_CLK_SI5351 is not set
++# CONFIG_COMMON_CLK_SI544 is not set
++# CONFIG_COMMON_CLK_SI570 is not set
++# CONFIG_COMMON_CLK_VC5 is not set
++# CONFIG_COMMON_CLK_VERSATILE is not set
++# CONFIG_COMMON_CLK_XGENE is not set
++# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set
++CONFIG_COMPACTION=y
++# CONFIG_COMPAL_LAPTOP is not set
++# CONFIG_COMPAT is not set
++# CONFIG_COMPAT_BRK is not set
++# CONFIG_COMPILE_TEST is not set
++# CONFIG_CONFIGFS_FS is not set
++# CONFIG_CONFIG_KVM_AMD_SEV is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7
++CONFIG_CONSOLE_LOGLEVEL_QUIET=4
++CONFIG_CONSTRUCTORS=y
++# CONFIG_CONTEXT_SWITCH_TRACER is not set
++# CONFIG_COPS is not set
++# CONFIG_CORDIC is not set
++# CONFIG_COREDUMP is not set
++# CONFIG_CORESIGHT is not set
++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
++# CONFIG_CORTINA_PHY is not set
++# CONFIG_COUNTER is not set
++# CONFIG_CPA_DEBUG is not set
++# CONFIG_CPU_BIG_ENDIAN is not set
++# CONFIG_CPU_BPREDICT_DISABLE is not set
++# CONFIG_CPU_DCACHE_DISABLE is not set
++# CONFIG_CPU_FREQ is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_GOV_SCHEDUTIL is not set
++# CONFIG_CPU_FREQ_STAT_DETAILS is not set
++# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
++# CONFIG_CPU_ICACHE_DISABLE is not set
++# CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND is not set
++# CONFIG_CPU_IDLE is not set
++# CONFIG_CPU_IDLE_GOV_LADDER is not set
++# CONFIG_CPU_IDLE_GOV_MENU is not set
++# CONFIG_CPU_IDLE_GOV_TEO is not set
++# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set
++# CONFIG_CPU_ISOLATION is not set
++# CONFIG_CPU_NO_EFFICIENT_FFS is not set
++CONFIG_CPU_SW_DOMAIN_PAN=y
++# CONFIG_CRAMFS is not set
++CONFIG_CRAMFS_BLOCKDEV=y
++# CONFIG_CRAMFS_MTD is not set
++CONFIG_CRASHLOG=y
++# CONFIG_CRASH_DUMP is not set
++# CONFIG_CRC16 is not set
++CONFIG_CRC32=y
++# CONFIG_CRC32_BIT is not set
++CONFIG_CRC32_SARWATE=y
++# CONFIG_CRC32_SELFTEST is not set
++# CONFIG_CRC32_SLICEBY4 is not set
++# CONFIG_CRC32_SLICEBY8 is not set
++# CONFIG_CRC4 is not set
++# CONFIG_CRC64 is not set
++# CONFIG_CRC7 is not set
++# CONFIG_CRC8 is not set
++# CONFIG_CRC_CCITT is not set
++# CONFIG_CRC_ITU_T is not set
++# CONFIG_CRC_T10DIF is not set
++CONFIG_CROSS_COMPILE=""
++# CONFIG_CROSS_MEMORY_ATTACH is not set
++CONFIG_CRYPTO=y
++# CONFIG_CRYPTO_842 is not set
++# CONFIG_CRYPTO_ADIANTUM is not set
++# CONFIG_CRYPTO_AEAD is not set
++# CONFIG_CRYPTO_AEGIS128 is not set
++# CONFIG_CRYPTO_AEGIS128L is not set
++# CONFIG_CRYPTO_AEGIS128L_AESNI_SSE2 is not set
++# CONFIG_CRYPTO_AEGIS128_AESNI_SSE2 is not set
++# CONFIG_CRYPTO_AEGIS256 is not set
++# CONFIG_CRYPTO_AEGIS256_AESNI_SSE2 is not set
++CONFIG_CRYPTO_AES=y
++# CONFIG_CRYPTO_AES_586 is not set
++# CONFIG_CRYPTO_AES_ARM is not set
++# CONFIG_CRYPTO_AES_ARM_BS is not set
++# CONFIG_CRYPTO_AES_ARM_CE is not set
++# CONFIG_CRYPTO_AES_ARM64 is not set
++# CONFIG_CRYPTO_AES_ARM64_BS is not set
++# CONFIG_CRYPTO_AES_ARM64_CE is not set
++# CONFIG_CRYPTO_AES_ARM64_CE_BLK is not set
++# CONFIG_CRYPTO_AES_ARM64_CE_CCM is not set
++# CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set
++# CONFIG_CRYPTO_AES_NI_INTEL is not set
++# CONFIG_CRYPTO_AES_TI is not set
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_ALGAPI2=y
++# CONFIG_CRYPTO_ANSI_CPRNG is not set
++# CONFIG_CRYPTO_ANUBIS is not set
++# CONFIG_CRYPTO_ARC4 is not set
++# CONFIG_CRYPTO_AUTHENC is not set
++# CONFIG_CRYPTO_BLAKE2S is not set
++# CONFIG_CRYPTO_BLAKE2S_X86 is not set
++CONFIG_CRYPTO_BLKCIPHER=y
++CONFIG_CRYPTO_BLKCIPHER2=y
++# CONFIG_CRYPTO_BLOWFISH is not set
++# CONFIG_CRYPTO_CAMELLIA is not set
++# CONFIG_CRYPTO_CAST5 is not set
++# CONFIG_CRYPTO_CAST6 is not set
++# CONFIG_CRYPTO_CBC is not set
++# CONFIG_CRYPTO_CCM is not set
++# CONFIG_CRYPTO_CFB is not set
++# CONFIG_CRYPTO_CHACHA20 is not set
++# CONFIG_CRYPTO_CHACHA20POLY1305 is not set
++# CONFIG_CRYPTO_CHACHA20_NEON is not set
++# CONFIG_CRYPTO_CHACHA_MIPS is not set
++# CONFIG_CRYPTO_CMAC is not set
++# CONFIG_CRYPTO_CRC32 is not set
++# CONFIG_CRYPTO_CRC32C is not set
++# CONFIG_CRYPTO_CRC32C_INTEL is not set
++# CONFIG_CRYPTO_CRC32_ARM_CE is not set
++# CONFIG_CRYPTO_CRCT10DIF is not set
++# CONFIG_CRYPTO_CRCT10DIF_ARM_CE is not set
++# CONFIG_CRYPTO_CRCT10DIF_ARM64_CE is not set
++# CONFIG_CRYPTO_CRYPTD is not set
++# CONFIG_CRYPTO_CTR is not set
++# CONFIG_CRYPTO_CTS is not set
++# CONFIG_CRYPTO_CURVE25519 is not set
++# CONFIG_CRYPTO_CURVE25519_NEON is not set
++# CONFIG_CRYPTO_CURVE25519_X86 is not set
++# CONFIG_CRYPTO_DEFLATE is not set
++# CONFIG_CRYPTO_DES is not set
++# CONFIG_CRYPTO_DEV_ATMEL_AES is not set
++# CONFIG_CRYPTO_DEV_ATMEL_AUTHENC is not set
++# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set
++# CONFIG_CRYPTO_DEV_ATMEL_SHA is not set
++# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set
++# CONFIG_CRYPTO_DEV_ATMEL_TDES is not set
++# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set
++# CONFIG_CRYPTO_DEV_CCP is not set
++# CONFIG_CRYPTO_DEV_CCP_DEBUGFS is not set
++# CONFIG_CRYPTO_DEV_CCREE is not set
++# CONFIG_CRYPTO_DEV_FSL_CAAM is not set
++# CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC is not set
++# CONFIG_CRYPTO_DEV_HIFN_795X is not set
++# CONFIG_CRYPTO_DEV_HISI_SEC is not set
++# CONFIG_CRYPTO_DEV_HISI_ZIP is not set
++# CONFIG_CRYPTO_DEV_IMGTEC_HASH is not set
++# CONFIG_CRYPTO_DEV_MARVELL_CESA is not set
++# CONFIG_CRYPTO_DEV_MV_CESA is not set
++# CONFIG_CRYPTO_DEV_MXC_SCC is not set
++# CONFIG_CRYPTO_DEV_MXS_DCP is not set
++# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set
++# CONFIG_CRYPTO_DEV_QAT_C3XXX is not set
++# CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set
++# CONFIG_CRYPTO_DEV_QAT_C62X is not set
++# CONFIG_CRYPTO_DEV_QAT_C62XVF is not set
++# CONFIG_CRYPTO_DEV_QAT_DH895xCC is not set
++# CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set
++# CONFIG_CRYPTO_DEV_QCE is not set
++# CONFIG_CRYPTO_DEV_S5P is not set
++# CONFIG_CRYPTO_DEV_SAFEXCEL is not set
++# CONFIG_CRYPTO_DEV_SAHARA is not set
++# CONFIG_CRYPTO_DEV_SP_PSP is not set
++# CONFIG_CRYPTO_DEV_TALITOS is not set
++# CONFIG_CRYPTO_DEV_VIRTIO is not set
++# CONFIG_CRYPTO_DH is not set
++# CONFIG_CRYPTO_DRBG_CTR is not set
++# CONFIG_CRYPTO_DRBG_HASH is not set
++# CONFIG_CRYPTO_DRBG_MENU is not set
++# CONFIG_CRYPTO_ECB is not set
++# CONFIG_CRYPTO_ECDH is not set
++# CONFIG_CRYPTO_ECHAINIV is not set
++# CONFIG_CRYPTO_ECRDSA is not set
++# CONFIG_CRYPTO_ESSIV is not set
++# CONFIG_CRYPTO_FCRYPT is not set
++# CONFIG_CRYPTO_FIPS is not set
++# CONFIG_CRYPTO_GCM is not set
++# CONFIG_CRYPTO_GF128MUL is not set
++# CONFIG_CRYPTO_GHASH is not set
++# CONFIG_CRYPTO_GHASH_ARM_CE is not set
++# CONFIG_CRYPTO_GHASH_ARM64_CE is not set
++# CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL is not set
++# CONFIG_CRYPTO_HASH is not set
++# CONFIG_CRYPTO_HMAC is not set
++# CONFIG_CRYPTO_HW is not set
++# CONFIG_CRYPTO_JITTERENTROPY is not set
++# CONFIG_CRYPTO_KEYWRAP is not set
++# CONFIG_CRYPTO_KHAZAD is not set
++CONFIG_CRYPTO_LIB_AES=y
++CONFIG_CRYPTO_LIB_ARC4=y
++# CONFIG_CRYPTO_LIB_BLAKE2S is not set
++# CONFIG_CRYPTO_LIB_CHACHA is not set
++# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set
++# CONFIG_CRYPTO_LIB_CURVE25519 is not set
++# CONFIG_CRYPTO_LIB_POLY1305 is not set
++CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9
++# CONFIG_CRYPTO_LRW is not set
++# CONFIG_CRYPTO_LZ4 is not set
++# CONFIG_CRYPTO_LZ4HC is not set
++# CONFIG_CRYPTO_LZO is not set
++# CONFIG_CRYPTO_MANAGER is not set
++# CONFIG_CRYPTO_MANAGER2 is not set
++CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
++# CONFIG_CRYPTO_MCRYPTD is not set
++# CONFIG_CRYPTO_MD4 is not set
++# CONFIG_CRYPTO_MD5 is not set
++# CONFIG_CRYPTO_MICHAEL_MIC is not set
++# CONFIG_CRYPTO_MORUS1280 is not set
++# CONFIG_CRYPTO_MORUS1280_AVX2 is not set
++# CONFIG_CRYPTO_MORUS1280_SSE2 is not set
++# CONFIG_CRYPTO_MORUS640 is not set
++# CONFIG_CRYPTO_MORUS640_SSE2 is not set
++# CONFIG_CRYPTO_NHPOLY1305_NEON is not set
++# CONFIG_CRYPTO_NULL is not set
++# CONFIG_CRYPTO_OFB is not set
++# CONFIG_CRYPTO_PCBC is not set
++# CONFIG_CRYPTO_PCOMP is not set
++# CONFIG_CRYPTO_PCOMP2 is not set
++CONFIG_CRYPTO_PCRYPT=y
++# CONFIG_CRYPTO_POLY1305 is not set
++# CONFIG_CRYPTO_POLY1305_ARM is not set
++# CONFIG_CRYPTO_POLY1305_MIPS is not set
++# CONFIG_CRYPTO_POLY1305_NEON is not set
++# CONFIG_CRYPTO_RMD128 is not set
++# CONFIG_CRYPTO_RMD160 is not set
++# CONFIG_CRYPTO_RMD256 is not set
++# CONFIG_CRYPTO_RMD320 is not set
++# CONFIG_CRYPTO_RNG is not set
++# CONFIG_CRYPTO_RSA is not set
++# CONFIG_CRYPTO_SALSA20 is not set
++# CONFIG_CRYPTO_SALSA20_586 is not set
++# CONFIG_CRYPTO_SEED is not set
++# CONFIG_CRYPTO_SEQIV is not set
++# CONFIG_CRYPTO_SERPENT is not set
++# CONFIG_CRYPTO_SHA1 is not set
++# CONFIG_CRYPTO_SHA1_ARM is not set
++# CONFIG_CRYPTO_SHA1_ARM_CE is not set
++# CONFIG_CRYPTO_SHA1_ARM_NEON is not set
++# CONFIG_CRYPTO_SHA1_ARM64_CE is not set
++# CONFIG_CRYPTO_SHA256 is not set
++# CONFIG_CRYPTO_SHA256_ARM is not set
++# CONFIG_CRYPTO_SHA256_ARM64 is not set
++# CONFIG_CRYPTO_SHA2_ARM_CE is not set
++# CONFIG_CRYPTO_SHA2_ARM64_CE is not set
++# CONFIG_CRYPTO_SHA3 is not set
++# CONFIG_CRYPTO_SHA3_ARM64 is not set
++# CONFIG_CRYPTO_SHA512 is not set
++# CONFIG_CRYPTO_SHA512_ARM is not set
++# CONFIG_CRYPTO_SHA512_ARM64 is not set
++# CONFIG_CRYPTO_SHA512_ARM64_CE is not set
++# CONFIG_CRYPTO_SIMD is not set
++# CONFIG_CRYPTO_SM3 is not set
++# CONFIG_CRYPTO_SM3_ARM64_CE is not set
++# CONFIG_CRYPTO_SM4 is not set
++# CONFIG_CRYPTO_SM4_ARM64_CE is not set
++# CONFIG_CRYPTO_SPECK is not set
++# CONFIG_CRYPTO_STATS is not set
++# CONFIG_CRYPTO_STREEBOG is not set
++# CONFIG_CRYPTO_TEA is not set
++# CONFIG_CRYPTO_TEST is not set
++# CONFIG_CRYPTO_TGR192 is not set
++# CONFIG_CRYPTO_TWOFISH is not set
++# CONFIG_CRYPTO_TWOFISH_586 is not set
++# CONFIG_CRYPTO_TWOFISH_COMMON is not set
++# CONFIG_CRYPTO_USER is not set
++# CONFIG_CRYPTO_USER_API_AEAD is not set
++# CONFIG_CRYPTO_USER_API_HASH is not set
++# CONFIG_CRYPTO_USER_API_RNG is not set
++# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
++# CONFIG_CRYPTO_VMAC is not set
++# CONFIG_CRYPTO_WP512 is not set
++# CONFIG_CRYPTO_XCBC is not set
++# CONFIG_CRYPTO_XTS is not set
++# CONFIG_CRYPTO_XXHASH is not set
++# CONFIG_CRYPTO_ZLIB is not set
++# CONFIG_CRYPTO_ZSTD is not set
++# CONFIG_CS5535_MFGPT is not set
++# CONFIG_CS89x0 is not set
++# CONFIG_CUSE is not set
++# CONFIG_CW1200 is not set
++# CONFIG_CXL_AFU_DRIVER_OPS is not set
++# CONFIG_CXL_BASE is not set
++# CONFIG_CXL_EEH is not set
++# CONFIG_CXL_KERNEL_API is not set
++# CONFIG_CXL_LIB is not set
++# CONFIG_CYPRESS_FIRMWARE is not set
++# CONFIG_DA280 is not set
++# CONFIG_DA311 is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_DAX is not set
++# CONFIG_DCB is not set
++# CONFIG_DDR is not set
++# CONFIG_DEBUG_ALIGN_RODATA is not set
++# CONFIG_DEBUG_ATOMIC_SLEEP is not set
++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
++# CONFIG_DEBUG_BUGVERBOSE is not set
++# CONFIG_DEBUG_CREDENTIALS is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_EFI is not set
++# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
++CONFIG_DEBUG_FS=y
++# CONFIG_DEBUG_GPIO is not set
++# CONFIG_DEBUG_HIGHMEM is not set
++# CONFIG_DEBUG_ICEDCC is not set
++# CONFIG_DEBUG_INFO is not set
++# CONFIG_DEBUG_INFO_BTF is not set
++# CONFIG_DEBUG_INFO_DWARF4 is not set
++CONFIG_DEBUG_INFO_REDUCED=y
++# CONFIG_DEBUG_INFO_SPLIT is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_KMEMLEAK is not set
++# CONFIG_DEBUG_KOBJECT is not set
++# CONFIG_DEBUG_KOBJECT_RELEASE is not set
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_LL is not set
++# CONFIG_DEBUG_LL_UART_8250 is not set
++# CONFIG_DEBUG_LL_UART_PL01X is not set
++# CONFIG_DEBUG_LOCKDEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_DEBUG_MEMORY_INIT is not set
++# CONFIG_DEBUG_MISC is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_NOTIFIERS is not set
++# CONFIG_DEBUG_NX_TEST is not set
++# CONFIG_DEBUG_OBJECTS is not set
++# CONFIG_DEBUG_PAGEALLOC is not set
++# CONFIG_DEBUG_PAGE_REF is not set
++# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
++# CONFIG_DEBUG_PER_CPU_MAPS is not set
++# CONFIG_DEBUG_PINCTRL is not set
++# CONFIG_DEBUG_PI_LIST is not set
++# CONFIG_DEBUG_PLIST is not set
++# CONFIG_DEBUG_PREEMPT is not set
++# CONFIG_DEBUG_RODATA_TEST is not set
++# CONFIG_DEBUG_RSEQ is not set
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_DEBUG_RWSEMS is not set
++# CONFIG_DEBUG_SECTION_MISMATCH is not set
++# CONFIG_DEBUG_SEMIHOSTING is not set
++# CONFIG_DEBUG_SG is not set
++# CONFIG_DEBUG_SHIRQ is not set
++# CONFIG_DEBUG_SLAB is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_STACKOVERFLOW is not set
++# CONFIG_DEBUG_STACK_USAGE is not set
++# CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set
++# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set
++# CONFIG_DEBUG_TIMEKEEPING is not set
++# CONFIG_DEBUG_UART_8250_PALMCHIP is not set
++# CONFIG_DEBUG_UART_BCM63XX is not set
++# CONFIG_DEBUG_USER is not set
++# CONFIG_DEBUG_VIRTUAL is not set
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
++# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
++# CONFIG_DEBUG_WX is not set
++# CONFIG_DEBUG_ZBOOT is not set
++# CONFIG_DECNET is not set
++CONFIG_DEFAULT_CUBIC=y
++CONFIG_DEFAULT_DEADLINE=y
++CONFIG_DEFAULT_HOSTNAME="(none)"
++CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
++CONFIG_DEFAULT_IOSCHED="deadline"
++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
++# CONFIG_DEFAULT_NOOP is not set
++# CONFIG_DEFAULT_RENO is not set
++CONFIG_DEFAULT_SECURITY=""
++CONFIG_DEFAULT_SECURITY_DAC=y
++# CONFIG_DEFAULT_SECURITY_SELINUX is not set
++CONFIG_DEFAULT_TCP_CONG="cubic"
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set
++# CONFIG_DELL_LAPTOP is not set
++# CONFIG_DELL_RBTN is not set
++# CONFIG_DELL_SMBIOS is not set
++# CONFIG_DELL_SMO8800 is not set
++# CONFIG_DEPRECATED_PARAM_STRUCT is not set
++# CONFIG_DETECT_HUNG_TASK is not set
++# CONFIG_DEVKMEM is not set
++# CONFIG_DEVMEM is not set
++CONFIG_DEVPORT=y
++# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
++# CONFIG_DEVTMPFS is not set
++# CONFIG_DEVTMPFS_MOUNT is not set
++# CONFIG_DEV_DAX is not set
++# CONFIG_DGAP is not set
++# CONFIG_DGNC is not set
++# CONFIG_DHT11 is not set
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_DISPLAY_CONNECTOR_ANALOG_TV is not set
++# CONFIG_DISPLAY_CONNECTOR_DVI is not set
++# CONFIG_DISPLAY_CONNECTOR_HDMI is not set
++# CONFIG_DISPLAY_ENCODER_TFP410 is not set
++# CONFIG_DISPLAY_ENCODER_TPD12S015 is not set
++# CONFIG_DISPLAY_PANEL_DPI is not set
++# CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02 is not set
++# CONFIG_DISPLAY_PANEL_TPO_TD028TTEC1 is not set
++# CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1 is not set
++# CONFIG_DL2K is not set
++# CONFIG_DLM is not set
++# CONFIG_DM9000 is not set
++# CONFIG_DMABUF_SELFTESTS is not set
++# CONFIG_DMADEVICES is not set
++# CONFIG_DMADEVICES_DEBUG is not set
++# CONFIG_DMARD06 is not set
++# CONFIG_DMARD09 is not set
++# CONFIG_DMARD10 is not set
++# CONFIG_DMASCC is not set
++# CONFIG_DMATEST is not set
++# CONFIG_DMA_API_DEBUG is not set
++CONFIG_DMA_DECLARE_COHERENT=y
++# CONFIG_DMA_ENGINE is not set
++# CONFIG_DMA_FENCE_TRACE is not set
++# CONFIG_DMA_JZ4780 is not set
++# CONFIG_DMA_NOOP_OPS is not set
++# CONFIG_DMA_SHARED_BUFFER is not set
++# CONFIG_DMA_VIRT_OPS is not set
++# CONFIG_DM_CACHE is not set
++# CONFIG_DM_CLONE is not set
++# CONFIG_DM_DEBUG is not set
++# CONFIG_DM_DELAY is not set
++# CONFIG_DM_DUST is not set
++# CONFIG_DM_ERA is not set
++# CONFIG_DM_FLAKEY is not set
++# CONFIG_DM_INTEGRITY is not set
++# CONFIG_DM_LOG_USERSPACE is not set
++# CONFIG_DM_LOG_WRITES is not set
++# CONFIG_DM_MQ_DEFAULT is not set
++# CONFIG_DM_MULTIPATH is not set
++# CONFIG_DM_RAID is not set
++# CONFIG_DM_SWITCH is not set
++# CONFIG_DM_THIN_PROVISIONING is not set
++# CONFIG_DM_UEVENT is not set
++# CONFIG_DM_UNSTRIPED is not set
++# CONFIG_DM_VERITY is not set
++# CONFIG_DM_WRITECACHE is not set
++# CONFIG_DM_ZERO is not set
++# CONFIG_DNET is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_DNS_RESOLVER is not set
++CONFIG_DOUBLEFAULT=y
++# CONFIG_DP83822_PHY is not set
++# CONFIG_DP83848_PHY is not set
++# CONFIG_DP83867_PHY is not set
++# CONFIG_DP83TC811_PHY is not set
++# CONFIG_DPOT_DAC is not set
++# CONFIG_DPS310 is not set
++CONFIG_DQL=y
++# CONFIG_DRAGONRISE_FF is not set
++# CONFIG_DRM is not set
++# CONFIG_DRM_AMDGPU is not set
++# CONFIG_DRM_AMDGPU_CIK is not set
++# CONFIG_DRM_AMDGPU_GART_DEBUGFS is not set
++# CONFIG_DRM_AMDGPU_SI is not set
++# CONFIG_DRM_AMDGPU_USERPTR is not set
++# CONFIG_DRM_AMD_ACP is not set
++# CONFIG_DRM_AMD_DC_DCN2_0 is not set
++# CONFIG_DRM_ANALOGIX_ANX78XX is not set
++# CONFIG_DRM_ARCPGU is not set
++# CONFIG_DRM_ARMADA is not set
++# CONFIG_DRM_AST is not set
++# CONFIG_DRM_BOCHS is not set
++# CONFIG_DRM_CDNS_DSI is not set
++# CONFIG_DRM_CIRRUS_QEMU is not set
++# CONFIG_DRM_DEBUG_MM is not set
++# CONFIG_DRM_DEBUG_SELFTEST is not set
++# CONFIG_DRM_DP_AUX_CHARDEV is not set
++# CONFIG_DRM_DP_CEC is not set
++# CONFIG_DRM_DUMB_VGA_DAC is not set
++# CONFIG_DRM_DW_HDMI_CEC is not set
++# CONFIG_DRM_ETNAVIV is not set
++# CONFIG_DRM_EXYNOS is not set
++# CONFIG_DRM_FBDEV_EMULATION is not set
++# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set
++# CONFIG_DRM_FSL_DCU is not set
++# CONFIG_DRM_GM12U320 is not set
++# CONFIG_DRM_GMA500 is not set
++# CONFIG_DRM_HDLCD is not set
++# CONFIG_DRM_HISI_HIBMC is not set
++# CONFIG_DRM_HISI_KIRIN is not set
++# CONFIG_DRM_I2C_ADV7511 is not set
++# CONFIG_DRM_I2C_CH7006 is not set
++# CONFIG_DRM_I2C_NXP_TDA9950 is not set
++# CONFIG_DRM_I2C_NXP_TDA998X is not set
++# CONFIG_DRM_I2C_SIL164 is not set
++# CONFIG_DRM_I915 is not set
++# CONFIG_DRM_KOMEDA is not set
++# CONFIG_DRM_LEGACY is not set
++# CONFIG_DRM_LIB_RANDOM is not set
++# CONFIG_DRM_LIMA is not set
++# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
++# CONFIG_DRM_LVDS_ENCODER is not set
++# CONFIG_DRM_MALI_DISPLAY is not set
++# CONFIG_DRM_MCDE is not set
++# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set
++# CONFIG_DRM_MGAG200 is not set
++# CONFIG_DRM_MXSFB is not set
++# CONFIG_DRM_NOUVEAU is not set
++# CONFIG_DRM_NXP_PTN3460 is not set
++# CONFIG_DRM_OMAP is not set
++# CONFIG_DRM_PANEL_ARM_VERSATILE is not set
++# CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set
++# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set
++# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set
++# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set
++# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set
++# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set
++# CONFIG_DRM_PANEL_LG_LB035Q02 is not set
++# CONFIG_DRM_PANEL_LG_LG4573 is not set
++# CONFIG_DRM_PANEL_LVDS is not set
++# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set
++# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set
++# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set
++# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set
++# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set
++# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set
++# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set
++# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set
++# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set
++# CONFIG_DRM_PANEL_ROCKTECH_JH057N00900 is not set
++# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set
++# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set
++# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set
++# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set
++# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set
++# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set
++# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set
++# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set
++# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set
++# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set
++# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set
++# CONFIG_DRM_PANEL_SIMPLE is not set
++# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set
++# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set
++# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set
++# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set
++# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set
++# CONFIG_DRM_PANEL_TPO_TPG110 is not set
++# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set
++# CONFIG_DRM_PANFROST is not set
++# CONFIG_DRM_PARADE_PS8622 is not set
++# CONFIG_DRM_PL111 is not set
++# CONFIG_DRM_QXL is not set
++# CONFIG_DRM_RADEON is not set
++# CONFIG_DRM_RADEON_USERPTR is not set
++# CONFIG_DRM_RCAR_DW_HDMI is not set
++# CONFIG_DRM_RCAR_LVDS is not set
++# CONFIG_DRM_SII902X is not set
++# CONFIG_DRM_SII9234 is not set
++# CONFIG_DRM_SIL_SII8620 is not set
++# CONFIG_DRM_STI is not set
++# CONFIG_DRM_STM is not set
++# CONFIG_DRM_SUN4I is not set
++# CONFIG_DRM_THINE_THC63LVD1024 is not set
++# CONFIG_DRM_TILCDC is not set
++# CONFIG_DRM_TINYDRM is not set
++# CONFIG_DRM_TI_SN65DSI86 is not set
++# CONFIG_DRM_TI_TFP410 is not set
++# CONFIG_DRM_TOSHIBA_TC358764 is not set
++# CONFIG_DRM_TOSHIBA_TC358767 is not set
++# CONFIG_DRM_UDL is not set
++# CONFIG_DRM_VBOXVIDEO is not set
++# CONFIG_DRM_VC4_HDMI_CEC is not set
++# CONFIG_DRM_VGEM is not set
++# CONFIG_DRM_VIRTIO_GPU is not set
++# CONFIG_DRM_VKMS is not set
++# CONFIG_DRM_VMWGFX is not set
++# CONFIG_DRM_XEN is not set
++# CONFIG_DS1682 is not set
++# CONFIG_DS1803 is not set
++# CONFIG_DS4424 is not set
++# CONFIG_DST_CACHE is not set
++# CONFIG_DTLK is not set
++# CONFIG_DUMMY is not set
++CONFIG_DUMMY_CONSOLE_COLUMNS=80
++CONFIG_DUMMY_CONSOLE_ROWS=25
++# CONFIG_DUMMY_IRQ is not set
++# CONFIG_DVB_AU8522_V4L is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DVB_DUMMY_FE is not set
++# CONFIG_DVB_TUNER_DIB0070 is not set
++# CONFIG_DVB_TUNER_DIB0090 is not set
++# CONFIG_DWC_XLGMAC is not set
++# CONFIG_DWMAC_DWC_QOS_ETH is not set
++# CONFIG_DWMAC_IPQ806X is not set
++# CONFIG_DWMAC_LPC18XX is not set
++# CONFIG_DWMAC_MESON is not set
++# CONFIG_DWMAC_ROCKCHIP is not set
++# CONFIG_DWMAC_SOCFPGA is not set
++# CONFIG_DWMAC_STI is not set
++# CONFIG_DW_AXI_DMAC is not set
++# CONFIG_DW_DMAC is not set
++# CONFIG_DW_DMAC_PCI is not set
++# CONFIG_DW_EDMA is not set
++# CONFIG_DW_EDMA_PCIE is not set
++# CONFIG_DW_WATCHDOG is not set
++# CONFIG_DYNAMIC_DEBUG is not set
++# CONFIG_E100 is not set
++# CONFIG_E1000 is not set
++# CONFIG_E1000E is not set
++# CONFIG_E1000E_HWTS is not set
++# CONFIG_EARLY_PRINTK_8250 is not set
++# CONFIG_EARLY_PRINTK_USB_XDBC is not set
++# CONFIG_EBC_C384_WDT is not set
++# CONFIG_ECHO is not set
++# CONFIG_ECRYPT_FS is not set
++# CONFIG_EDAC is not set
++# CONFIG_EEEPC_LAPTOP is not set
++# CONFIG_EEPROM_93CX6 is not set
++# CONFIG_EEPROM_93XX46 is not set
++# CONFIG_EEPROM_AT24 is not set
++# CONFIG_EEPROM_AT25 is not set
++# CONFIG_EEPROM_DIGSY_MTC_CFG is not set
++# CONFIG_EEPROM_EE1004 is not set
++# CONFIG_EEPROM_IDT_89HPESX is not set
++# CONFIG_EEPROM_LEGACY is not set
++# CONFIG_EEPROM_MAX6875 is not set
++# CONFIG_EFI is not set
++CONFIG_EFI_PARTITION=y
++# CONFIG_EFS_FS is not set
++CONFIG_ELFCORE=y
++# CONFIG_ELF_CORE is not set
++# CONFIG_EMAC_ROCKCHIP is not set
++CONFIG_EMBEDDED=y
++# CONFIG_EM_TIMER_STI is not set
++# CONFIG_ENABLE_MUST_CHECK is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++# CONFIG_ENA_ETHERNET is not set
++# CONFIG_ENC28J60 is not set
++# CONFIG_ENCLOSURE_SERVICES is not set
++# CONFIG_ENCRYPTED_KEYS is not set
++# CONFIG_ENCX24J600 is not set
++# CONFIG_ENERGY_MODEL is not set
++# CONFIG_ENIC is not set
++# CONFIG_ENVELOPE_DETECTOR is not set
++# CONFIG_EPAPR_PARAVIRT is not set
++# CONFIG_EPIC100 is not set
++CONFIG_EPOLL=y
++# CONFIG_EQUALIZER is not set
++# CONFIG_EROFS_FS is not set
++# CONFIG_ET131X is not set
++CONFIG_ETHERNET=y
++# CONFIG_ETHOC is not set
++CONFIG_EVENTFD=y
++# CONFIG_EVM is not set
++# CONFIG_EXFAT_FS is not set
++CONFIG_EXPERT=y
++CONFIG_EXPORTFS=y
++# CONFIG_EXPORTFS_BLOCK_OPS is not set
++# CONFIG_EXT2_FS is not set
++CONFIG_EXT2_FS_XATTR=y
++# CONFIG_EXT3_FS is not set
++# CONFIG_EXT4_DEBUG is not set
++# CONFIG_EXT4_ENCRYPTION is not set
++# CONFIG_EXT4_FS is not set
++# CONFIG_EXT4_FS_POSIX_ACL is not set
++# CONFIG_EXT4_FS_SECURITY is not set
++CONFIG_EXT4_USE_FOR_EXT2=y
++# CONFIG_EXTCON is not set
++# CONFIG_EXTCON_ADC_JACK is not set
++# CONFIG_EXTCON_ARIZONA is not set
++# CONFIG_EXTCON_AXP288 is not set
++# CONFIG_EXTCON_FSA9480 is not set
++# CONFIG_EXTCON_GPIO is not set
++# CONFIG_EXTCON_INTEL_INT3496 is not set
++# CONFIG_EXTCON_MAX3355 is not set
++# CONFIG_EXTCON_PTN5150 is not set
++# CONFIG_EXTCON_QCOM_SPMI_MISC is not set
++# CONFIG_EXTCON_RT8973A is not set
++# CONFIG_EXTCON_SM5502 is not set
++# CONFIG_EXTCON_USB_GPIO is not set
++CONFIG_EXTRA_FIRMWARE=""
++CONFIG_EXTRA_TARGETS=""
++# CONFIG_EXYNOS_ADC is not set
++# CONFIG_EXYNOS_VIDEO is not set
++# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set
++# CONFIG_EZX_PCAP is not set
++# CONFIG_F2FS_CHECK_FS is not set
++# CONFIG_F2FS_FAULT_INJECTION is not set
++# CONFIG_F2FS_FS is not set
++# CONFIG_F2FS_FS_ENCRYPTION is not set
++# CONFIG_F2FS_FS_POSIX_ACL is not set
++# CONFIG_F2FS_FS_SECURITY is not set
++CONFIG_F2FS_FS_XATTR=y
++# CONFIG_F2FS_IO_TRACE is not set
++CONFIG_F2FS_STAT_FS=y
++# CONFIG_FAILOVER is not set
++# CONFIG_FAIR_GROUP_SCHED is not set
++# CONFIG_FANOTIFY is not set
++# CONFIG_FANOTIFY_ACCESS_PERMISSIONS is not set
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_FAT_DEFAULT_UTF8 is not set
++# CONFIG_FAT_FS is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_FB is not set
++# CONFIG_FB_3DFX is not set
++# CONFIG_FB_ARC is not set
++# CONFIG_FB_ARK is not set
++# CONFIG_FB_ARMCLCD is not set
++# CONFIG_FB_ASILIANT is not set
++# CONFIG_FB_ATY is not set
++# CONFIG_FB_ATY128 is not set
++# CONFIG_FB_AUO_K190X is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_BIG_ENDIAN is not set
++# CONFIG_FB_BOOT_VESA_SUPPORT is not set
++# CONFIG_FB_BOTH_ENDIAN is not set
++# CONFIG_FB_BROADSHEET is not set
++# CONFIG_FB_CARMINE is not set
++# CONFIG_FB_CFB_COPYAREA is not set
++# CONFIG_FB_CFB_FILLRECT is not set
++# CONFIG_FB_CFB_IMAGEBLIT is not set
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_CIRRUS is not set
++# CONFIG_FB_CYBER2000 is not set
++# CONFIG_FB_DA8XX is not set
++# CONFIG_FB_DDC is not set
++# CONFIG_FB_FLEX is not set
++# CONFIG_FB_FOREIGN_ENDIAN is not set
++# CONFIG_FB_GEODE is not set
++# CONFIG_FB_GOLDFISH is not set
++# CONFIG_FB_HGA is not set
++# CONFIG_FB_I740 is not set
++# CONFIG_FB_IBM_GXT4500 is not set
++# CONFIG_FB_IMSTT is not set
++# CONFIG_FB_IMX is not set
++# CONFIG_FB_KYRO is not set
++# CONFIG_FB_LE80578 is not set
++# CONFIG_FB_LITTLE_ENDIAN is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_MATROX is not set
++# CONFIG_FB_MB862XX is not set
++# CONFIG_FB_METRONOME is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_MXS is not set
++# CONFIG_FB_N411 is not set
++# CONFIG_FB_NEOMAGIC is not set
++CONFIG_FB_NOTIFY=y
++# CONFIG_FB_NVIDIA is not set
++# CONFIG_FB_OF is not set
++# CONFIG_FB_OMAP2 is not set
++# CONFIG_FB_OPENCORES is not set
++# CONFIG_FB_PM2 is not set
++# CONFIG_FB_PM3 is not set
++# CONFIG_FB_PS3 is not set
++# CONFIG_FB_PXA is not set
++# CONFIG_FB_RADEON is not set
++# CONFIG_FB_RIVA is not set
++# CONFIG_FB_S1D13XXX is not set
++# CONFIG_FB_S3 is not set
++# CONFIG_FB_SAVAGE is not set
++# CONFIG_FB_SIMPLE is not set
++# CONFIG_FB_SIS is not set
++# CONFIG_FB_SM712 is not set
++# CONFIG_FB_SM750 is not set
++# CONFIG_FB_SMSCUFX is not set
++# CONFIG_FB_SSD1307 is not set
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_FOPS is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_TFT is not set
++# CONFIG_FB_TFT_AGM1264K_FL is not set
++# CONFIG_FB_TFT_BD663474 is not set
++# CONFIG_FB_TFT_FBTFT_DEVICE is not set
++# CONFIG_FB_TFT_HX8340BN is not set
++# CONFIG_FB_TFT_HX8347D is not set
++# CONFIG_FB_TFT_HX8353D is not set
++# CONFIG_FB_TFT_HX8357D is not set
++# CONFIG_FB_TFT_ILI9163 is not set
++# CONFIG_FB_TFT_ILI9320 is not set
++# CONFIG_FB_TFT_ILI9325 is not set
++# CONFIG_FB_TFT_ILI9340 is not set
++# CONFIG_FB_TFT_ILI9341 is not set
++# CONFIG_FB_TFT_ILI9481 is not set
++# CONFIG_FB_TFT_ILI9486 is not set
++# CONFIG_FB_TFT_PCD8544 is not set
++# CONFIG_FB_TFT_RA8875 is not set
++# CONFIG_FB_TFT_S6D02A1 is not set
++# CONFIG_FB_TFT_S6D1121 is not set
++# CONFIG_FB_TFT_SH1106 is not set
++# CONFIG_FB_TFT_SSD1289 is not set
++# CONFIG_FB_TFT_SSD1305 is not set
++# CONFIG_FB_TFT_SSD1306 is not set
++# CONFIG_FB_TFT_SSD1325 is not set
++# CONFIG_FB_TFT_SSD1331 is not set
++# CONFIG_FB_TFT_SSD1351 is not set
++# CONFIG_FB_TFT_ST7735R is not set
++# CONFIG_FB_TFT_ST7789V is not set
++# CONFIG_FB_TFT_TINYLCD is not set
++# CONFIG_FB_TFT_TLS8204 is not set
++# CONFIG_FB_TFT_UC1611 is not set
++# CONFIG_FB_TFT_UC1701 is not set
++# CONFIG_FB_TFT_UPD161704 is not set
++# CONFIG_FB_TFT_WATTEROTT is not set
++# CONFIG_FB_TILEBLITTING is not set
++# CONFIG_FB_TMIO is not set
++# CONFIG_FB_TRIDENT is not set
++# CONFIG_FB_UDL is not set
++# CONFIG_FB_UVESA is not set
++# CONFIG_FB_VGA16 is not set
++# CONFIG_FB_VIA is not set
++# CONFIG_FB_VIRTUAL is not set
++# CONFIG_FB_VOODOO1 is not set
++# CONFIG_FB_VT8623 is not set
++# CONFIG_FB_XGI is not set
++# CONFIG_FCOE is not set
++# CONFIG_FCOE_FNIC is not set
++# CONFIG_FDDI is not set
++# CONFIG_FEALNX is not set
++# CONFIG_FENCE_TRACE is not set
++# CONFIG_FHANDLE is not set
++CONFIG_FIB_RULES=y
++# CONFIG_FIELDBUS_DEV is not set
++CONFIG_FILE_LOCKING=y
++# CONFIG_FIND_BIT_BENCHMARK is not set
++# CONFIG_FIREWIRE is not set
++# CONFIG_FIREWIRE_NOSY is not set
++# CONFIG_FIREWIRE_SERIAL is not set
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FIRMWARE_IN_KERNEL is not set
++# CONFIG_FIRMWARE_MEMMAP is not set
++# CONFIG_FIXED_PHY is not set
++CONFIG_FLATMEM=y
++CONFIG_FLATMEM_MANUAL=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_FM10K is not set
++# CONFIG_FMC is not set
++# CONFIG_FONTS is not set
++# CONFIG_FONT_TER16x32 is not set
++# CONFIG_FORCEDETH is not set
++CONFIG_FORCE_MAX_ZONEORDER=11
++CONFIG_FORTIFY_SOURCE=y
++# CONFIG_FPGA is not set
++# CONFIG_FRAMEBUFFER_CONSOLE is not set
++# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set
++# CONFIG_FRAME_POINTER is not set
++CONFIG_FRAME_WARN=1024
++# CONFIG_FREEZER is not set
++# CONFIG_FRONTSWAP is not set
++# CONFIG_FSCACHE is not set
++# CONFIG_FSI is not set
++# CONFIG_FSL_EDMA is not set
++# CONFIG_FSL_ERRATUM_A008585 is not set
++# CONFIG_FSL_MC_BUS is not set
++# CONFIG_FSL_PQ_MDIO is not set
++# CONFIG_FSL_QDMA is not set
++# CONFIG_FSL_XGMAC_MDIO is not set
++CONFIG_FSNOTIFY=y
++# CONFIG_FS_DAX is not set
++# CONFIG_FS_ENCRYPTION is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_FS_VERITY is not set
++# CONFIG_FTGMAC100 is not set
++# CONFIG_FTL is not set
++# CONFIG_FTMAC100 is not set
++# CONFIG_FTRACE is not set
++# CONFIG_FTRACE_STARTUP_TEST is not set
++# CONFIG_FTR_FIXUP_SELFTEST is not set
++# CONFIG_FTWDT010_WATCHDOG is not set
++# CONFIG_FUJITSU_ES is not set
++# CONFIG_FUJITSU_LAPTOP is not set
++# CONFIG_FUJITSU_TABLET is not set
++# CONFIG_FUNCTION_TRACER is not set
++# CONFIG_FUSE_FS is not set
++# CONFIG_FUSION is not set
++# CONFIG_FUSION_FC is not set
++# CONFIG_FUSION_SAS is not set
++# CONFIG_FUSION_SPI is not set
++CONFIG_FUTEX=y
++CONFIG_FUTEX_PI=y
++# CONFIG_FW_CFG_SYSFS is not set
++CONFIG_FW_LOADER=y
++# CONFIG_FW_LOADER_COMPRESS is not set
++CONFIG_FW_LOADER_USER_HELPER=y
++CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
++# CONFIG_FXAS21002C is not set
++# CONFIG_FXOS8700_I2C is not set
++# CONFIG_FXOS8700_SPI is not set
++CONFIG_GACT_PROB=y
++# CONFIG_GADGET_UAC1 is not set
++# CONFIG_GAMEPORT is not set
++# CONFIG_GATEWORKS_GW16083 is not set
++# CONFIG_GCC_PLUGINS is not set
++# CONFIG_GCOV is not set
++# CONFIG_GCOV_KERNEL is not set
++# CONFIG_GDB_SCRIPTS is not set
++# CONFIG_GEMINI_ETHERNET is not set
++# CONFIG_GENERIC_ADC_BATTERY is not set
++# CONFIG_GENERIC_ADC_THERMAL is not set
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++# CONFIG_GENERIC_CPU_DEVICES is not set
++CONFIG_GENERIC_HWEIGHT=y
++# CONFIG_GENERIC_IRQ_DEBUGFS is not set
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_GENERIC_NET_UTILS=y
++# CONFIG_GENERIC_PHY is not set
++# CONFIG_GENEVE is not set
++# CONFIG_GENWQE is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_GIGASET_CAPI is not set
++# CONFIG_GIGASET_DEBUG is not set
++# CONFIG_GIGASET_DUMMYLL is not set
++# CONFIG_GLOB_SELFTEST is not set
++# CONFIG_GNSS is not set
++# CONFIG_GOLDFISH is not set
++# CONFIG_GOOGLE_FIRMWARE is not set
++# CONFIG_GP2AP020A00F is not set
++# CONFIG_GPD_POCKET_FAN is not set
++# CONFIG_GPIOLIB is not set
++CONFIG_GPIOLIB_FASTPATH_LIMIT=512
++# CONFIG_GPIO_104_DIO_48E is not set
++# CONFIG_GPIO_104_IDIO_16 is not set
++# CONFIG_GPIO_104_IDI_48 is not set
++# CONFIG_GPIO_74X164 is not set
++# CONFIG_GPIO_74XX_MMIO is not set
++# CONFIG_GPIO_ADNP is not set
++# CONFIG_GPIO_ADP5588 is not set
++# CONFIG_GPIO_ALTERA is not set
++# CONFIG_GPIO_AMD8111 is not set
++# CONFIG_GPIO_AMDPT is not set
++# CONFIG_GPIO_AMD_FCH is not set
++# CONFIG_GPIO_BCM_KONA is not set
++# CONFIG_GPIO_BT8XX is not set
++# CONFIG_GPIO_CADENCE is not set
++# CONFIG_GPIO_CS5535 is not set
++# CONFIG_GPIO_DWAPB is not set
++# CONFIG_GPIO_EM is not set
++# CONFIG_GPIO_EXAR is not set
++# CONFIG_GPIO_F7188X is not set
++# CONFIG_GPIO_FTGPIO010 is not set
++# CONFIG_GPIO_GENERIC_PLATFORM is not set
++# CONFIG_GPIO_GPIO_MM is not set
++# CONFIG_GPIO_GRGPIO is not set
++# CONFIG_GPIO_GW_PLD is not set
++# CONFIG_GPIO_HLWD is not set
++# CONFIG_GPIO_ICH is not set
++# CONFIG_GPIO_IT87 is not set
++# CONFIG_GPIO_LYNXPOINT is not set
++# CONFIG_GPIO_MAX3191X is not set
++# CONFIG_GPIO_MAX7300 is not set
++# CONFIG_GPIO_MAX7301 is not set
++# CONFIG_GPIO_MAX732X is not set
++# CONFIG_GPIO_MB86S7X is not set
++# CONFIG_GPIO_MC33880 is not set
++# CONFIG_GPIO_MCP23S08 is not set
++# CONFIG_GPIO_ML_IOH is not set
++# CONFIG_GPIO_MOCKUP is not set
++# CONFIG_GPIO_MPC8XXX is not set
++# CONFIG_GPIO_PCA953X is not set
++# CONFIG_GPIO_PCF857X is not set
++# CONFIG_GPIO_PCH is not set
++# CONFIG_GPIO_PCIE_IDIO_24 is not set
++# CONFIG_GPIO_PCI_IDIO_16 is not set
++# CONFIG_GPIO_PISOSR is not set
++# CONFIG_GPIO_PL061 is not set
++# CONFIG_GPIO_RCAR is not set
++# CONFIG_GPIO_RDC321X is not set
++# CONFIG_GPIO_SAMA5D2_PIOBU is not set
++# CONFIG_GPIO_SCH is not set
++# CONFIG_GPIO_SCH311X is not set
++# CONFIG_GPIO_SX150X is not set
++# CONFIG_GPIO_SYSCON is not set
++CONFIG_GPIO_SYSFS=y
++# CONFIG_GPIO_TPIC2810 is not set
++# CONFIG_GPIO_TS4900 is not set
++# CONFIG_GPIO_TS5500 is not set
++# CONFIG_GPIO_VX855 is not set
++# CONFIG_GPIO_WATCHDOG is not set
++# CONFIG_GPIO_WINBOND is not set
++# CONFIG_GPIO_WS16C48 is not set
++# CONFIG_GPIO_XGENE is not set
++# CONFIG_GPIO_XILINX is not set
++# CONFIG_GPIO_XRA1403 is not set
++# CONFIG_GPIO_ZEVIO is not set
++# CONFIG_GPIO_ZX is not set
++# CONFIG_GREENASIA_FF is not set
++# CONFIG_GREYBUS is not set
++# CONFIG_GS_FPGABOOT is not set
++# CONFIG_GTP is not set
++# CONFIG_GUP_BENCHMARK is not set
++# CONFIG_GVE is not set
++# CONFIG_HABANA_AI is not set
++# CONFIG_HAMACHI is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_HAPPYMEAL is not set
++CONFIG_HARDENED_USERCOPY=y
++# CONFIG_HARDENED_USERCOPY_FALLBACK is not set
++# CONFIG_HARDENED_USERCOPY_PAGESPAN is not set
++CONFIG_HARDEN_EL2_VECTORS=y
++# CONFIG_HARDLOCKUP_DETECTOR is not set
++# CONFIG_HAVE_AOUT is not set
++CONFIG_HAVE_ARCH_HARDENED_USERCOPY=y
++# CONFIG_HAVE_ARCH_HASH is not set
++CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
++# CONFIG_HAVE_ARCH_VMAP_STACK is not set
++CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y
++# CONFIG_HAVE_ARM_ARCH_TIMER is not set
++CONFIG_HAVE_EXIT_THREAD=y
++CONFIG_HAVE_GCC_PLUGINS=y
++CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
++CONFIG_HAVE_KERNEL_BZIP2=y
++CONFIG_HAVE_KERNEL_CAT=y
++CONFIG_HAVE_KERNEL_GZIP=y
++CONFIG_HAVE_KERNEL_LZ4=y
++CONFIG_HAVE_KERNEL_LZMA=y
++CONFIG_HAVE_KERNEL_LZO=y
++CONFIG_HAVE_KERNEL_XZ=y
++CONFIG_HAVE_KPROBES=y
++CONFIG_HAVE_KRETPROBES=y
++CONFIG_HAVE_NMI=y
++CONFIG_HAVE_STACKPROTECTOR=y
++# CONFIG_HCALL_STATS is not set
++# CONFIG_HDC100X is not set
++# CONFIG_HDLC is not set
++# CONFIG_HDLC_CISCO is not set
++# CONFIG_HDLC_FR is not set
++# CONFIG_HDLC_PPP is not set
++# CONFIG_HDLC_RAW is not set
++# CONFIG_HDLC_RAW_ETH is not set
++# CONFIG_HDMI_LPE_AUDIO is not set
++# CONFIG_HDQ_MASTER_OMAP is not set
++# CONFIG_HEADERS_CHECK is not set
++# CONFIG_HEADERS_INSTALL is not set
++# CONFIG_HEADER_TEST is not set
++# CONFIG_HERMES is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_HFSPLUS_FS_POSIX_ACL is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFS_FS_POSIX_ACL is not set
++# CONFIG_HI8435 is not set
++# CONFIG_HIBERNATION is not set
++# CONFIG_HID is not set
++# CONFIG_HIDRAW is not set
++# CONFIG_HID_A4TECH is not set
++# CONFIG_HID_ACCUTOUCH is not set
++# CONFIG_HID_ACRUX is not set
++# CONFIG_HID_ACRUX_FF is not set
++# CONFIG_HID_ALPS is not set
++# CONFIG_HID_APPLE is not set
++# CONFIG_HID_APPLEIR is not set
++# CONFIG_HID_ASUS is not set
++# CONFIG_HID_AUREAL is not set
++# CONFIG_HID_BATTERY_STRENGTH is not set
++# CONFIG_HID_BELKIN is not set
++# CONFIG_HID_BETOP_FF is not set
++# CONFIG_HID_BIGBEN_FF is not set
++# CONFIG_HID_CHERRY is not set
++# CONFIG_HID_CHICONY is not set
++# CONFIG_HID_CMEDIA is not set
++# CONFIG_HID_CORSAIR is not set
++# CONFIG_HID_COUGAR is not set
++# CONFIG_HID_CP2112 is not set
++# CONFIG_HID_CREATIVE_SB0540 is not set
++# CONFIG_HID_CYPRESS is not set
++# CONFIG_HID_DRAGONRISE is not set
++# CONFIG_HID_ELAN is not set
++# CONFIG_HID_ELECOM is not set
++# CONFIG_HID_ELO is not set
++# CONFIG_HID_EMS_FF is not set
++# CONFIG_HID_EZKEY is not set
++# CONFIG_HID_GEMBIRD is not set
++# CONFIG_HID_GENERIC is not set
++# CONFIG_HID_GFRM is not set
++# CONFIG_HID_GOOGLE_HAMMER is not set
++# CONFIG_HID_GREENASIA is not set
++# CONFIG_HID_GT683R is not set
++# CONFIG_HID_GYRATION is not set
++# CONFIG_HID_HOLTEK is not set
++# CONFIG_HID_ICADE is not set
++# CONFIG_HID_ITE is not set
++# CONFIG_HID_JABRA is not set
++# CONFIG_HID_KENSINGTON is not set
++# CONFIG_HID_KEYTOUCH is not set
++# CONFIG_HID_KYE is not set
++# CONFIG_HID_LCPOWER is not set
++# CONFIG_HID_LED is not set
++# CONFIG_HID_LENOVO is not set
++# CONFIG_HID_LOGITECH is not set
++# CONFIG_HID_LOGITECH_DJ is not set
++# CONFIG_HID_LOGITECH_HIDPP is not set
++# CONFIG_HID_MACALLY is not set
++# CONFIG_HID_MAGICMOUSE is not set
++# CONFIG_HID_MALTRON is not set
++# CONFIG_HID_MAYFLASH is not set
++# CONFIG_HID_MICROSOFT is not set
++# CONFIG_HID_MONTEREY is not set
++# CONFIG_HID_MULTITOUCH is not set
++# CONFIG_HID_NTI is not set
++# CONFIG_HID_NTRIG is not set
++# CONFIG_HID_ORTEK is not set
++# CONFIG_HID_PANTHERLORD is not set
++# CONFIG_HID_PENMOUNT is not set
++# CONFIG_HID_PETALYNX is not set
++# CONFIG_HID_PICOLCD is not set
++# CONFIG_HID_PID is not set
++# CONFIG_HID_PLANTRONICS is not set
++# CONFIG_HID_PRIMAX is not set
++# CONFIG_HID_PRODIKEYS is not set
++# CONFIG_HID_REDRAGON is not set
++# CONFIG_HID_RETRODE is not set
++# CONFIG_HID_RMI is not set
++# CONFIG_HID_ROCCAT is not set
++# CONFIG_HID_SAITEK is not set
++# CONFIG_HID_SAMSUNG is not set
++# CONFIG_HID_SENSOR_HUB is not set
++# CONFIG_HID_SMARTJOYPLUS is not set
++# CONFIG_HID_SONY is not set
++# CONFIG_HID_SPEEDLINK is not set
++# CONFIG_HID_STEAM is not set
++# CONFIG_HID_STEELSERIES is not set
++# CONFIG_HID_SUNPLUS is not set
++# CONFIG_HID_THINGM is not set
++# CONFIG_HID_THRUSTMASTER is not set
++# CONFIG_HID_TIVO is not set
++# CONFIG_HID_TOPSEED is not set
++# CONFIG_HID_TWINHAN is not set
++# CONFIG_HID_U2FZERO is not set
++# CONFIG_HID_UCLOGIC is not set
++# CONFIG_HID_UDRAW_PS3 is not set
++# CONFIG_HID_VIEWSONIC is not set
++# CONFIG_HID_WACOM is not set
++# CONFIG_HID_WALTOP is not set
++# CONFIG_HID_WIIMOTE is not set
++# CONFIG_HID_XINMO is not set
++# CONFIG_HID_ZEROPLUS is not set
++# CONFIG_HID_ZYDACRON is not set
++# CONFIG_HIGHMEM is not set
++CONFIG_HIGH_RES_TIMERS=y
++# CONFIG_HINIC is not set
++# CONFIG_HIP04_ETH is not set
++# CONFIG_HIPPI is not set
++# CONFIG_HISILICON_ERRATUM_161010101 is not set
++# CONFIG_HISILICON_ERRATUM_161600802 is not set
++# CONFIG_HISI_FEMAC is not set
++# CONFIG_HIX5HD2_GMAC is not set
++# CONFIG_HMC6352 is not set
++# CONFIG_HNS is not set
++# CONFIG_HNS3 is not set
++# CONFIG_HNS_DSAF is not set
++# CONFIG_HNS_ENET is not set
++# CONFIG_HOSTAP is not set
++# CONFIG_HOSTAP_CS is not set
++# CONFIG_HOSTAP_PCI is not set
++# CONFIG_HOSTAP_PLX is not set
++# CONFIG_HOTPLUG_CPU is not set
++# CONFIG_HOTPLUG_PCI is not set
++# CONFIG_HP03 is not set
++# CONFIG_HP100 is not set
++# CONFIG_HP206C is not set
++CONFIG_HPET_MMAP_DEFAULT=y
++# CONFIG_HPFS_FS is not set
++# CONFIG_HP_ILO is not set
++# CONFIG_HP_WIRELESS is not set
++# CONFIG_HSA_AMD is not set
++# CONFIG_HSI is not set
++# CONFIG_HSR is not set
++# CONFIG_HTC_EGPIO is not set
++# CONFIG_HTC_I2CPLD is not set
++# CONFIG_HTC_PASIC3 is not set
++# CONFIG_HTS221 is not set
++# CONFIG_HTU21 is not set
++# CONFIG_HUGETLBFS is not set
++# CONFIG_HUGETLB_PAGE is not set
++# CONFIG_HVC_DCC is not set
++# CONFIG_HVC_UDBG is not set
++# CONFIG_HWLAT_TRACER is not set
++# CONFIG_HWMON is not set
++# CONFIG_HWMON_DEBUG_CHIP is not set
++# CONFIG_HWMON_VID is not set
++# CONFIG_HWSPINLOCK is not set
++# CONFIG_HWSPINLOCK_OMAP is not set
++CONFIG_HW_PERF_EVENTS=y
++# CONFIG_HW_RANDOM is not set
++# CONFIG_HW_RANDOM_AMD is not set
++# CONFIG_HW_RANDOM_ATMEL is not set
++# CONFIG_HW_RANDOM_CAVIUM is not set
++# CONFIG_HW_RANDOM_EXYNOS is not set
++# CONFIG_HW_RANDOM_GEODE is not set
++# CONFIG_HW_RANDOM_INTEL is not set
++# CONFIG_HW_RANDOM_IPROC_RNG200 is not set
++# CONFIG_HW_RANDOM_OMAP is not set
++# CONFIG_HW_RANDOM_OMAP3_ROM is not set
++# CONFIG_HW_RANDOM_PPC4XX is not set
++# CONFIG_HW_RANDOM_TIMERIOMEM is not set
++CONFIG_HW_RANDOM_TPM=y
++# CONFIG_HW_RANDOM_VIA is not set
++# CONFIG_HW_RANDOM_VIRTIO is not set
++# CONFIG_HX711 is not set
++# CONFIG_HYPERV is not set
++# CONFIG_HYPERV_TSCPAGE is not set
++# CONFIG_HYSDN is not set
++# CONFIG_HZ is not set
++# CONFIG_HZ_100 is not set
++# CONFIG_HZ_1000 is not set
++# CONFIG_HZ_1024 is not set
++# CONFIG_HZ_128 is not set
++# CONFIG_HZ_200 is not set
++# CONFIG_HZ_24 is not set
++# CONFIG_HZ_250 is not set
++# CONFIG_HZ_256 is not set
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_48 is not set
++# CONFIG_HZ_500 is not set
++# CONFIG_HZ_PERIODIC is not set
++# CONFIG_I2C is not set
++# CONFIG_I2C_ALGOBIT is not set
++# CONFIG_I2C_ALGOPCA is not set
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALI1535 is not set
++# CONFIG_I2C_ALI1563 is not set
++# CONFIG_I2C_ALI15X3 is not set
++# CONFIG_I2C_AMD756 is not set
++# CONFIG_I2C_AMD8111 is not set
++# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set
++# CONFIG_I2C_AU1550 is not set
++# CONFIG_I2C_BCM2835 is not set
++# CONFIG_I2C_BCM_IPROC is not set
++# CONFIG_I2C_CADENCE is not set
++# CONFIG_I2C_CBUS_GPIO is not set
++# CONFIG_I2C_CHARDEV is not set
++# CONFIG_I2C_COMPAT is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEMUX_PINCTRL is not set
++# CONFIG_I2C_DESIGNWARE_PCI is not set
++# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
++# CONFIG_I2C_DIOLAN_U2C is not set
++# CONFIG_I2C_EG20T is not set
++# CONFIG_I2C_ELEKTOR is not set
++# CONFIG_I2C_EMEV2 is not set
++# CONFIG_I2C_GPIO is not set
++# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set
++# CONFIG_I2C_HELPER_AUTO is not set
++# CONFIG_I2C_HID is not set
++# CONFIG_I2C_I801 is not set
++# CONFIG_I2C_IBM_IIC is not set
++# CONFIG_I2C_IMG is not set
++# CONFIG_I2C_ISCH is not set
++# CONFIG_I2C_ISMT is not set
++# CONFIG_I2C_JZ4780 is not set
++# CONFIG_I2C_MLXCPLD is not set
++# CONFIG_I2C_MPC is not set
++# CONFIG_I2C_MUX is not set
++# CONFIG_I2C_MUX_GPIO is not set
++# CONFIG_I2C_MUX_GPMUX is not set
++# CONFIG_I2C_MUX_LTC4306 is not set
++# CONFIG_I2C_MUX_MLXCPLD is not set
++# CONFIG_I2C_MUX_PCA9541 is not set
++# CONFIG_I2C_MUX_PCA954x is not set
++# CONFIG_I2C_MUX_PINCTRL is not set
++# CONFIG_I2C_MUX_REG is not set
++# CONFIG_I2C_MV64XXX is not set
++# CONFIG_I2C_NFORCE2 is not set
++# CONFIG_I2C_NOMADIK is not set
++# CONFIG_I2C_NVIDIA_GPU is not set
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_OCTEON is not set
++# CONFIG_I2C_PARPORT is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_PCA_ISA is not set
++# CONFIG_I2C_PCA_PLATFORM is not set
++# CONFIG_I2C_PIIX4 is not set
++# CONFIG_I2C_PXA_PCI is not set
++# CONFIG_I2C_RCAR is not set
++# CONFIG_I2C_RK3X is not set
++# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
++# CONFIG_I2C_S3C2410 is not set
++# CONFIG_I2C_SCMI is not set
++# CONFIG_I2C_SH_MOBILE is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_SIS5595 is not set
++# CONFIG_I2C_SIS630 is not set
++# CONFIG_I2C_SIS96X is not set
++# CONFIG_I2C_SLAVE is not set
++# CONFIG_I2C_SLAVE_EEPROM is not set
++# CONFIG_I2C_SMBUS is not set
++# CONFIG_I2C_STUB is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_THUNDERX is not set
++# CONFIG_I2C_TINY_USB is not set
++# CONFIG_I2C_VERSATILE is not set
++# CONFIG_I2C_VIA is not set
++# CONFIG_I2C_VIAPRO is not set
++# CONFIG_I2C_XILINX is not set
++# CONFIG_I3C is not set
++# CONFIG_I40E is not set
++# CONFIG_I40EVF is not set
++# CONFIG_I6300ESB_WDT is not set
++# CONFIG_I82092 is not set
++# CONFIG_I82365 is not set
++# CONFIG_IAQCORE is not set
++# CONFIG_IBM_ASM is not set
++# CONFIG_IBM_EMAC_DEBUG is not set
++# CONFIG_IBM_EMAC_EMAC4 is not set
++# CONFIG_IBM_EMAC_MAL_CLR_ICINTSTAT is not set
++# CONFIG_IBM_EMAC_MAL_COMMON_ERR is not set
++# CONFIG_IBM_EMAC_NO_FLOW_CTRL is not set
++# CONFIG_IBM_EMAC_RGMII is not set
++# CONFIG_IBM_EMAC_TAH is not set
++# CONFIG_IBM_EMAC_ZMII is not set
++# CONFIG_ICE is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_ICS932S401 is not set
++# CONFIG_IDE is not set
++# CONFIG_IDEAPAD_LAPTOP is not set
++# CONFIG_IDE_GD is not set
++# CONFIG_IDE_PROC_FS is not set
++# CONFIG_IDE_TASK_IOCTL is not set
++# CONFIG_IDLE_PAGE_TRACKING is not set
++# CONFIG_IEEE802154 is not set
++# CONFIG_IEEE802154_ADF7242 is not set
++# CONFIG_IEEE802154_ATUSB is not set
++# CONFIG_IEEE802154_CA8210 is not set
++# CONFIG_IEEE802154_HWSIM is not set
++# CONFIG_IEEE802154_MCR20A is not set
++# CONFIG_IFB is not set
++# CONFIG_IGB is not set
++# CONFIG_IGBVF is not set
++# CONFIG_IGC is not set
++# CONFIG_IIO is not set
++# CONFIG_IIO_BUFFER is not set
++# CONFIG_IIO_BUFFER_CB is not set
++# CONFIG_IIO_BUFFER_HW_CONSUMER is not set
++# CONFIG_IIO_CONFIGFS is not set
++CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
++# CONFIG_IIO_CROS_EC_ACCEL_LEGACY is not set
++# CONFIG_IIO_INTERRUPT_TRIGGER is not set
++# CONFIG_IIO_MUX is not set
++# CONFIG_IIO_PERIODIC_RTC_TRIGGER is not set
++# CONFIG_IIO_RESCALE is not set
++# CONFIG_IIO_SIMPLE_DUMMY is not set
++# CONFIG_IIO_SSP_SENSORHUB is not set
++# CONFIG_IIO_ST_ACCEL_3AXIS is not set
++# CONFIG_IIO_ST_GYRO_3AXIS is not set
++# CONFIG_IIO_ST_LSM6DSX is not set
++# CONFIG_IIO_ST_MAGN_3AXIS is not set
++# CONFIG_IIO_ST_PRESS is not set
++# CONFIG_IIO_SW_DEVICE is not set
++# CONFIG_IIO_SW_TRIGGER is not set
++# CONFIG_IIO_SYSFS_TRIGGER is not set
++# CONFIG_IIO_TRIGGER is not set
++# CONFIG_IKCONFIG is not set
++# CONFIG_IKCONFIG_PROC is not set
++# CONFIG_IKHEADERS is not set
++# CONFIG_IMA is not set
++# CONFIG_IMAGE_CMDLINE_HACK is not set
++# CONFIG_IMGPDC_WDT is not set
++# CONFIG_IMG_MDC_DMA is not set
++# CONFIG_IMX7D_ADC is not set
++# CONFIG_IMX_IPUV3_CORE is not set
++# CONFIG_IMX_THERMAL is not set
++# CONFIG_INA2XX_ADC is not set
++# CONFIG_INDIRECT_PIO is not set
++CONFIG_INET=y
++# CONFIG_INET6_AH is not set
++# CONFIG_INET6_ESP is not set
++# CONFIG_INET6_IPCOMP is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_INET6_XFRM_MODE_BEET is not set
++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
++# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_TCP_DIAG is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_UDP_DIAG is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INFINIBAND is not set
++# CONFIG_INFTL is not set
++# CONFIG_INGENIC_ADC is not set
++# CONFIG_INGENIC_CGU_JZ4725B is not set
++# CONFIG_INGENIC_CGU_JZ4740 is not set
++# CONFIG_INGENIC_CGU_JZ4770 is not set
++# CONFIG_INGENIC_CGU_JZ4780 is not set
++# CONFIG_INGENIC_TCU_CLK is not set
++# CONFIG_INGENIC_TCU_IRQ is not set
++# CONFIG_INGENIC_TIMER is not set
++CONFIG_INIT_ENV_ARG_LIMIT=32
++# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set
++# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set
++CONFIG_INIT_STACK_NONE=y
++# CONFIG_INLINE_READ_LOCK is not set
++# CONFIG_INLINE_READ_LOCK_BH is not set
++# CONFIG_INLINE_READ_LOCK_IRQ is not set
++# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
++# CONFIG_INLINE_READ_TRYLOCK is not set
++CONFIG_INLINE_READ_UNLOCK=y
++# CONFIG_INLINE_READ_UNLOCK_BH is not set
++CONFIG_INLINE_READ_UNLOCK_IRQ=y
++# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
++# CONFIG_INLINE_SPIN_LOCK is not set
++# CONFIG_INLINE_SPIN_LOCK_BH is not set
++# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
++# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
++# CONFIG_INLINE_SPIN_TRYLOCK is not set
++# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
++# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
++CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
++# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
++# CONFIG_INLINE_WRITE_LOCK is not set
++# CONFIG_INLINE_WRITE_LOCK_BH is not set
++# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
++# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
++# CONFIG_INLINE_WRITE_TRYLOCK is not set
++CONFIG_INLINE_WRITE_UNLOCK=y
++# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
++CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
++# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
++CONFIG_INOTIFY_USER=y
++# CONFIG_INPUT is not set
++# CONFIG_INPUT_AD714X is not set
++# CONFIG_INPUT_ADXL34X is not set
++# CONFIG_INPUT_APANEL is not set
++# CONFIG_INPUT_ATI_REMOTE2 is not set
++# CONFIG_INPUT_ATLAS_BTNS is not set
++# CONFIG_INPUT_ATMEL_CAPTOUCH is not set
++# CONFIG_INPUT_AXP20X_PEK is not set
++# CONFIG_INPUT_BMA150 is not set
++# CONFIG_INPUT_CM109 is not set
++# CONFIG_INPUT_CMA3000 is not set
++# CONFIG_INPUT_DRV260X_HAPTICS is not set
++# CONFIG_INPUT_DRV2665_HAPTICS is not set
++# CONFIG_INPUT_DRV2667_HAPTICS is not set
++# CONFIG_INPUT_E3X0_BUTTON is not set
++# CONFIG_INPUT_EVBUG is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_FF_MEMLESS is not set
++# CONFIG_INPUT_GP2A is not set
++# CONFIG_INPUT_GPIO_BEEPER is not set
++# CONFIG_INPUT_GPIO_DECODER is not set
++# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
++# CONFIG_INPUT_GPIO_TILT_POLLED is not set
++# CONFIG_INPUT_GPIO_VIBRA is not set
++# CONFIG_INPUT_IDEAPAD_SLIDEBAR is not set
++# CONFIG_INPUT_IMS_PCU is not set
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_KEYBOARD is not set
++# CONFIG_INPUT_KEYSPAN_REMOTE is not set
++# CONFIG_INPUT_KXTJ9 is not set
++# CONFIG_INPUT_LEDS is not set
++# CONFIG_INPUT_MATRIXKMAP is not set
++# CONFIG_INPUT_MAX8997_HAPTIC is not set
++CONFIG_INPUT_MISC=y
++# CONFIG_INPUT_MMA8450 is not set
++# CONFIG_INPUT_MOUSE is not set
++# CONFIG_INPUT_MOUSEDEV is not set
++# CONFIG_INPUT_MPU3050 is not set
++# CONFIG_INPUT_MSM_VIBRATOR is not set
++# CONFIG_INPUT_PALMAS_PWRBUTTON is not set
++# CONFIG_INPUT_PCF8574 is not set
++# CONFIG_INPUT_PCSPKR is not set
++# CONFIG_INPUT_POLLDEV is not set
++# CONFIG_INPUT_POWERMATE is not set
++# CONFIG_INPUT_PWM_BEEPER is not set
++# CONFIG_INPUT_PWM_VIBRA is not set
++# CONFIG_INPUT_REGULATOR_HAPTIC is not set
++# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set
++# CONFIG_INPUT_SPARSEKMAP is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_TPS65218_PWRBUTTON is not set
++# CONFIG_INPUT_TWL4030_PWRBUTTON is not set
++# CONFIG_INPUT_TWL4030_VIBRA is not set
++# CONFIG_INPUT_TWL6040_VIBRA is not set
++# CONFIG_INPUT_UINPUT is not set
++# CONFIG_INPUT_WISTRON_BTNS is not set
++# CONFIG_INPUT_YEALINK is not set
++# CONFIG_INT340X_THERMAL is not set
++# CONFIG_INTEGRITY is not set
++# CONFIG_INTEGRITY_AUDIT is not set
++# CONFIG_INTEGRITY_SIGNATURE is not set
++# CONFIG_INTEL_ATOMISP2_PM is not set
++# CONFIG_INTEL_CHT_INT33FE is not set
++# CONFIG_INTEL_HID_EVENT is not set
++# CONFIG_INTEL_IDLE is not set
++# CONFIG_INTEL_IDMA64 is not set
++# CONFIG_INTEL_IOATDMA is not set
++# CONFIG_INTEL_ISH_HID is not set
++# CONFIG_INTEL_MEI is not set
++# CONFIG_INTEL_MEI_ME is not set
++# CONFIG_INTEL_MEI_TXE is not set
++# CONFIG_INTEL_MIC_CARD is not set
++# CONFIG_INTEL_MIC_HOST is not set
++# CONFIG_INTEL_MID_PTI is not set
++# CONFIG_INTEL_OAKTRAIL is not set
++# CONFIG_INTEL_PMC_CORE is not set
++# CONFIG_INTEL_PUNIT_IPC is not set
++# CONFIG_INTEL_RST is not set
++# CONFIG_INTEL_SMARTCONNECT is not set
++# CONFIG_INTEL_SOC_PMIC is not set
++# CONFIG_INTEL_SOC_PMIC_CHTDC_TI is not set
++# CONFIG_INTEL_SOC_PMIC_CHTWC is not set
++# CONFIG_INTEL_TH is not set
++# CONFIG_INTEL_VBTN is not set
++# CONFIG_INTEL_XWAY_PHY is not set
++# CONFIG_INTERCONNECT is not set
++# CONFIG_INTERVAL_TREE_TEST is not set
++# CONFIG_INV_MPU6050_I2C is not set
++# CONFIG_INV_MPU6050_IIO is not set
++# CONFIG_INV_MPU6050_SPI is not set
++# CONFIG_IOMMU_SUPPORT is not set
++# CONFIG_IONIC is not set
++# CONFIG_IOSCHED_BFQ is not set
++# CONFIG_IOSCHED_CFQ is not set
++CONFIG_IOSCHED_DEADLINE=y
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IO_STRICT_DEVMEM=y
++# CONFIG_IO_URING is not set
++# CONFIG_IP17XX_PHY is not set
++# CONFIG_IP6_NF_FILTER is not set
++# CONFIG_IP6_NF_IPTABLES is not set
++# CONFIG_IP6_NF_MANGLE is not set
++# CONFIG_IP6_NF_MATCH_AH is not set
++# CONFIG_IP6_NF_MATCH_EUI64 is not set
++# CONFIG_IP6_NF_MATCH_FRAG is not set
++# CONFIG_IP6_NF_MATCH_HL is not set
++# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set
++# CONFIG_IP6_NF_MATCH_MH is not set
++# CONFIG_IP6_NF_MATCH_OPTS is not set
++# CONFIG_IP6_NF_MATCH_RPFILTER is not set
++# CONFIG_IP6_NF_MATCH_RT is not set
++# CONFIG_IP6_NF_MATCH_SRH is not set
++# CONFIG_IP6_NF_NAT is not set
++# CONFIG_IP6_NF_RAW is not set
++# CONFIG_IP6_NF_SECURITY is not set
++# CONFIG_IP6_NF_TARGET_HL is not set
++# CONFIG_IP6_NF_TARGET_MASQUERADE is not set
++# CONFIG_IP6_NF_TARGET_REJECT is not set
++# CONFIG_IP6_NF_TARGET_SYNPROXY is not set
++# CONFIG_IPACK_BUS is not set
++# CONFIG_IPC_NS is not set
++# CONFIG_IPMB_DEVICE_INTERFACE is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_IPV6 is not set
++# CONFIG_IPV6_FOU is not set
++# CONFIG_IPV6_FOU_TUNNEL is not set
++# CONFIG_IPV6_ILA is not set
++# CONFIG_IPV6_MIP6 is not set
++# CONFIG_IPV6_MROUTE is not set
++# CONFIG_IPV6_MROUTE_MULTIPLE_TABLES is not set
++# CONFIG_IPV6_MULTIPLE_TABLES is not set
++CONFIG_IPV6_NDISC_NODETYPE=y
++# CONFIG_IPV6_OPTIMISTIC_DAD is not set
++# CONFIG_IPV6_ROUTER_PREF is not set
++# CONFIG_IPV6_ROUTE_INFO is not set
++# CONFIG_IPV6_SEG6_HMAC is not set
++# CONFIG_IPV6_SIT is not set
++# CONFIG_IPV6_SIT_6RD is not set
++# CONFIG_IPV6_TUNNEL is not set
++# CONFIG_IPV6_VTI is not set
++# CONFIG_IPVLAN is not set
++# CONFIG_IPW2100 is not set
++# CONFIG_IPW2100_DEBUG is not set
++CONFIG_IPW2100_MONITOR=y
++# CONFIG_IPW2200 is not set
++# CONFIG_IPW2200_DEBUG is not set
++CONFIG_IPW2200_MONITOR=y
++# CONFIG_IPW2200_PROMISCUOUS is not set
++# CONFIG_IPW2200_QOS is not set
++# CONFIG_IPW2200_RADIOTAP is not set
++# CONFIG_IPWIRELESS is not set
++# CONFIG_IPX is not set
++CONFIG_IP_ADVANCED_ROUTER=y
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_FIB_TRIE_STATS is not set
++# CONFIG_IP_MROUTE is not set
++CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
++CONFIG_IP_MULTICAST=y
++CONFIG_IP_MULTIPLE_TABLES=y
++# CONFIG_IP_NF_ARPFILTER is not set
++# CONFIG_IP_NF_ARPTABLES is not set
++# CONFIG_IP_NF_ARP_MANGLE is not set
++# CONFIG_IP_NF_FILTER is not set
++# CONFIG_IP_NF_IPTABLES is not set
++# CONFIG_IP_NF_MANGLE is not set
++# CONFIG_IP_NF_MATCH_AH is not set
++# CONFIG_IP_NF_MATCH_ECN is not set
++# CONFIG_IP_NF_MATCH_RPFILTER is not set
++# CONFIG_IP_NF_MATCH_TTL is not set
++# CONFIG_IP_NF_RAW is not set
++# CONFIG_IP_NF_SECURITY is not set
++# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
++# CONFIG_IP_NF_TARGET_ECN is not set
++# CONFIG_IP_NF_TARGET_MASQUERADE is not set
++# CONFIG_IP_NF_TARGET_NETMAP is not set
++# CONFIG_IP_NF_TARGET_REDIRECT is not set
++# CONFIG_IP_NF_TARGET_REJECT is not set
++# CONFIG_IP_NF_TARGET_SYNPROXY is not set
++# CONFIG_IP_NF_TARGET_TTL is not set
++# CONFIG_IP_PIMSM_V1 is not set
++# CONFIG_IP_PIMSM_V2 is not set
++# CONFIG_IP_PNP is not set
++CONFIG_IP_ROUTE_MULTIPATH=y
++CONFIG_IP_ROUTE_VERBOSE=y
++# CONFIG_IP_SCTP is not set
++# CONFIG_IP_SET is not set
++# CONFIG_IP_SET_HASH_IPMAC is not set
++# CONFIG_IP_VS is not set
++# CONFIG_IP_VS_MH is not set
++CONFIG_IP_VS_MH_TAB_INDEX=10
++# CONFIG_IRDA is not set
++# CONFIG_IRQSOFF_TRACER is not set
++# CONFIG_IRQ_ALL_CPUS is not set
++# CONFIG_IRQ_DOMAIN_DEBUG is not set
++# CONFIG_IRQ_POLL is not set
++# CONFIG_IRQ_TIME_ACCOUNTING is not set
++# CONFIG_IR_GPIO_CIR is not set
++# CONFIG_IR_HIX5HD2 is not set
++# CONFIG_IR_IGORPLUGUSB is not set
++# CONFIG_IR_IGUANA is not set
++# CONFIG_IR_IMG is not set
++# CONFIG_IR_IMON is not set
++# CONFIG_IR_JVC_DECODER is not set
++# CONFIG_IR_LIRC_CODEC is not set
++# CONFIG_IR_MCEUSB is not set
++# CONFIG_IR_NEC_DECODER is not set
++# CONFIG_IR_RC5_DECODER is not set
++# CONFIG_IR_RC6_DECODER is not set
++# CONFIG_IR_REDRAT3 is not set
++# CONFIG_IR_SONY_DECODER is not set
++# CONFIG_IR_STREAMZAP is not set
++# CONFIG_IR_TTUSBIR is not set
++# CONFIG_ISA_BUS is not set
++# CONFIG_ISA_BUS_API is not set
++# CONFIG_ISCSI_BOOT_SYSFS is not set
++# CONFIG_ISCSI_TCP is not set
++CONFIG_ISDN=y
++# CONFIG_ISDN_AUDIO is not set
++# CONFIG_ISDN_CAPI is not set
++# CONFIG_ISDN_CAPI_CAPIDRV is not set
++# CONFIG_ISDN_DIVERSION is not set
++# CONFIG_ISDN_DRV_ACT2000 is not set
++# CONFIG_ISDN_DRV_GIGASET is not set
++# CONFIG_ISDN_DRV_HISAX is not set
++# CONFIG_ISDN_DRV_ICN is not set
++# CONFIG_ISDN_DRV_LOOP is not set
++# CONFIG_ISDN_DRV_PCBIT is not set
++# CONFIG_ISDN_DRV_SC is not set
++# CONFIG_ISDN_I4L is not set
++# CONFIG_ISL29003 is not set
++# CONFIG_ISL29020 is not set
++# CONFIG_ISL29125 is not set
++# CONFIG_ISL29501 is not set
++# CONFIG_ISO9660_FS is not set
++# CONFIG_ISS4xx is not set
++# CONFIG_ITG3200 is not set
++# CONFIG_IWL3945 is not set
++# CONFIG_IWLWIFI is not set
++# CONFIG_IXGB is not set
++# CONFIG_IXGBE is not set
++# CONFIG_IXGBEVF is not set
++# CONFIG_JAILHOUSE_GUEST is not set
++# CONFIG_JBD2_DEBUG is not set
++# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
++# CONFIG_JFFS2_CMODE_NONE is not set
++CONFIG_JFFS2_CMODE_PRIORITY=y
++# CONFIG_JFFS2_CMODE_SIZE is not set
++CONFIG_JFFS2_COMPRESSION_OPTIONS=y
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++# CONFIG_JFFS2_FS_POSIX_ACL is not set
++# CONFIG_JFFS2_FS_SECURITY is not set
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++CONFIG_JFFS2_FS_XATTR=y
++CONFIG_JFFS2_LZMA=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++CONFIG_JFFS2_SUMMARY=y
++# CONFIG_JFFS2_ZLIB is not set
++# CONFIG_JFS_DEBUG is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_JFS_POSIX_ACL is not set
++# CONFIG_JFS_SECURITY is not set
++# CONFIG_JFS_STATISTICS is not set
++# CONFIG_JME is not set
++CONFIG_JOLIET=y
++# CONFIG_JSA1212 is not set
++# CONFIG_JUMP_LABEL is not set
++# CONFIG_KALLSYMS is not set
++# CONFIG_KALLSYMS_ABSOLUTE_PERCPU is not set
++# CONFIG_KALLSYMS_ALL is not set
++CONFIG_KALLSYMS_BASE_RELATIVE=y
++# CONFIG_KALLSYMS_UNCOMPRESSED is not set
++# CONFIG_KARMA_PARTITION is not set
++# CONFIG_KASAN is not set
++CONFIG_KASAN_STACK=1
++# CONFIG_KCOV is not set
++# CONFIG_KERNEL_BZIP2 is not set
++# CONFIG_KERNEL_CAT is not set
++# CONFIG_KERNEL_GZIP is not set
++# CONFIG_KERNEL_LZ4 is not set
++# CONFIG_KERNEL_LZMA is not set
++# CONFIG_KERNEL_LZO is not set
++CONFIG_KERNEL_MODE_NEON=y
++CONFIG_KERNEL_XZ=y
++CONFIG_KERNFS=y
++# CONFIG_KEXEC is not set
++# CONFIG_KEXEC_FILE is not set
++# CONFIG_KEYBOARD_ADC is not set
++# CONFIG_KEYBOARD_ADP5588 is not set
++# CONFIG_KEYBOARD_ADP5589 is not set
++# CONFIG_KEYBOARD_APPLESPI is not set
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_BCM is not set
++# CONFIG_KEYBOARD_CAP11XX is not set
++# CONFIG_KEYBOARD_DLINK_DIR685 is not set
++# CONFIG_KEYBOARD_GPIO is not set
++# CONFIG_KEYBOARD_GPIO_POLLED is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_LM8323 is not set
++# CONFIG_KEYBOARD_LM8333 is not set
++# CONFIG_KEYBOARD_MATRIX is not set
++# CONFIG_KEYBOARD_MAX7359 is not set
++# CONFIG_KEYBOARD_MCS is not set
++# CONFIG_KEYBOARD_MPR121 is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_OMAP4 is not set
++# CONFIG_KEYBOARD_OPENCORES is not set
++# CONFIG_KEYBOARD_PXA27x is not set
++# CONFIG_KEYBOARD_QT1050 is not set
++# CONFIG_KEYBOARD_QT1070 is not set
++# CONFIG_KEYBOARD_QT2160 is not set
++# CONFIG_KEYBOARD_SAMSUNG is not set
++# CONFIG_KEYBOARD_SH_KEYSC is not set
++# CONFIG_KEYBOARD_SNVS_PWRKEY is not set
++# CONFIG_KEYBOARD_STMPE is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_TCA6416 is not set
++# CONFIG_KEYBOARD_TCA8418 is not set
++# CONFIG_KEYBOARD_TEGRA is not set
++# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set
++# CONFIG_KEYBOARD_TWL4030 is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYS is not set
++# CONFIG_KEYS_REQUEST_CACHE is not set
++# CONFIG_KEY_DH_OPERATIONS is not set
++# CONFIG_KGDB is not set
++# CONFIG_KMEMCHECK is not set
++# CONFIG_KMX61 is not set
++# CONFIG_KPROBES is not set
++# CONFIG_KPROBES_SANITY_TEST is not set
++# CONFIG_KS7010 is not set
++# CONFIG_KS8842 is not set
++# CONFIG_KS8851 is not set
++# CONFIG_KS8851_MLL is not set
++# CONFIG_KSM is not set
++# CONFIG_KSZ884X_PCI is not set
++CONFIG_KUSER_HELPERS=y
++# CONFIG_KVM_AMD is not set
++# CONFIG_KVM_GUEST is not set
++# CONFIG_KVM_INTEL is not set
++# CONFIG_KXCJK1013 is not set
++# CONFIG_KXSD9 is not set
++# CONFIG_L2TP is not set
++# CONFIG_L2TP_ETH is not set
++# CONFIG_L2TP_IP is not set
++# CONFIG_L2TP_V3 is not set
++# CONFIG_LAN743X is not set
++# CONFIG_LANMEDIA is not set
++# CONFIG_LANTIQ is not set
++# CONFIG_LAPB is not set
++# CONFIG_LASAT is not set
++# CONFIG_LATENCYTOP is not set
++# CONFIG_LATTICE_ECP3_CONFIG is not set
++CONFIG_LBDAF=y
++# CONFIG_LCD_AMS369FG06 is not set
++# CONFIG_LCD_CLASS_DEVICE is not set
++# CONFIG_LCD_HX8357 is not set
++# CONFIG_LCD_ILI922X is not set
++# CONFIG_LCD_ILI9320 is not set
++# CONFIG_LCD_L4F00242T03 is not set
++# CONFIG_LCD_LD9040 is not set
++# CONFIG_LCD_LMS283GF05 is not set
++# CONFIG_LCD_LMS501KF03 is not set
++# CONFIG_LCD_LTV350QV is not set
++# CONFIG_LCD_OTM3225A is not set
++# CONFIG_LCD_S6E63M0 is not set
++# CONFIG_LCD_TDO24M is not set
++# CONFIG_LCD_VGG2432A4 is not set
++CONFIG_LDISC_AUTOLOAD=y
++# CONFIG_LDM_PARTITION is not set
++CONFIG_LD_DEAD_CODE_DATA_ELIMINATION=y
++# CONFIG_LEDS_AN30259A is not set
++# CONFIG_LEDS_APU is not set
++# CONFIG_LEDS_BCM6328 is not set
++# CONFIG_LEDS_BCM6358 is not set
++# CONFIG_LEDS_BD2802 is not set
++# CONFIG_LEDS_BLINKM is not set
++CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y
++CONFIG_LEDS_CLASS=y
++# CONFIG_LEDS_CLASS_FLASH is not set
++# CONFIG_LEDS_CR0014114 is not set
++# CONFIG_LEDS_DAC124S085 is not set
++# CONFIG_LEDS_GPIO is not set
++# CONFIG_LEDS_INTEL_SS4200 is not set
++# CONFIG_LEDS_IS31FL319X is not set
++# CONFIG_LEDS_IS31FL32XX is not set
++# CONFIG_LEDS_LM3530 is not set
++# CONFIG_LEDS_LM3532 is not set
++# CONFIG_LEDS_LM355x is not set
++# CONFIG_LEDS_LM3642 is not set
++# CONFIG_LEDS_LM3692X is not set
++# CONFIG_LEDS_LP3944 is not set
++# CONFIG_LEDS_LP3952 is not set
++# CONFIG_LEDS_LP5521 is not set
++# CONFIG_LEDS_LP5523 is not set
++# CONFIG_LEDS_LP5562 is not set
++# CONFIG_LEDS_LP8501 is not set
++# CONFIG_LEDS_LP8860 is not set
++# CONFIG_LEDS_LT3593 is not set
++# CONFIG_LEDS_MLXCPLD is not set
++# CONFIG_LEDS_MLXREG is not set
++# CONFIG_LEDS_NIC78BX is not set
++# CONFIG_LEDS_NS2 is not set
++# CONFIG_LEDS_OT200 is not set
++# CONFIG_LEDS_PCA9532 is not set
++# CONFIG_LEDS_PCA955X is not set
++# CONFIG_LEDS_PCA963X is not set
++# CONFIG_LEDS_PWM is not set
++# CONFIG_LEDS_REGULATOR is not set
++# CONFIG_LEDS_SPI_BYTE is not set
++# CONFIG_LEDS_SYSCON is not set
++# CONFIG_LEDS_TCA6507 is not set
++# CONFIG_LEDS_TI_LMU_COMMON is not set
++# CONFIG_LEDS_TLC591XX is not set
++CONFIG_LEDS_TRIGGERS=y
++# CONFIG_LEDS_TRIGGER_ACTIVITY is not set
++# CONFIG_LEDS_TRIGGER_AUDIO is not set
++# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
++# CONFIG_LEDS_TRIGGER_CAMERA is not set
++# CONFIG_LEDS_TRIGGER_CPU is not set
++CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
++# CONFIG_LEDS_TRIGGER_DISK is not set
++# CONFIG_LEDS_TRIGGER_GPIO is not set
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++# CONFIG_LEDS_TRIGGER_MTD is not set
++CONFIG_LEDS_TRIGGER_NETDEV=y
++# CONFIG_LEDS_TRIGGER_ONESHOT is not set
++# CONFIG_LEDS_TRIGGER_PANIC is not set
++# CONFIG_LEDS_TRIGGER_PATTERN is not set
++CONFIG_LEDS_TRIGGER_TIMER=y
++# CONFIG_LEDS_TRIGGER_TRANSIENT is not set
++# CONFIG_LEDS_USER is not set
++# CONFIG_LED_TRIGGER_PHY is not set
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_LGUEST is not set
++# CONFIG_LIB80211 is not set
++# CONFIG_LIB80211_CRYPT_CCMP is not set
++# CONFIG_LIB80211_CRYPT_TKIP is not set
++# CONFIG_LIB80211_CRYPT_WEP is not set
++# CONFIG_LIB80211_DEBUG is not set
++# CONFIG_LIBCRC32C is not set
++# CONFIG_LIBERTAS is not set
++# CONFIG_LIBERTAS_THINFIRM is not set
++# CONFIG_LIBERTAS_USB is not set
++# CONFIG_LIBFC is not set
++# CONFIG_LIBFCOE is not set
++# CONFIG_LIBIPW_DEBUG is not set
++# CONFIG_LIBNVDIMM is not set
++# CONFIG_LIDAR_LITE_V2 is not set
++# CONFIG_LIQUIDIO is not set
++# CONFIG_LIQUIDIO_VF is not set
++# CONFIG_LIS3L02DQ is not set
++# CONFIG_LKDTM is not set
++CONFIG_LLC=y
++# CONFIG_LLC2 is not set
++# CONFIG_LMP91000 is not set
++# CONFIG_LNET is not set
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++# CONFIG_LOCKD is not set
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_LOCKD_V4=y
++# CONFIG_LOCKUP_DETECTOR is not set
++# CONFIG_LOCK_EVENT_COUNTS is not set
++# CONFIG_LOCK_STAT is not set
++# CONFIG_LOCK_TORTURE_TEST is not set
++# CONFIG_LOGFS is not set
++# CONFIG_LOGIG940_FF is not set
++# CONFIG_LOGIRUMBLEPAD2_FF is not set
++# CONFIG_LOGITECH_FF is not set
++# CONFIG_LOGIWHEELS_FF is not set
++# CONFIG_LOGO is not set
++CONFIG_LOG_BUF_SHIFT=17
++CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
++# CONFIG_LOONGSON_MC146818 is not set
++# CONFIG_LPC_ICH is not set
++# CONFIG_LPC_SCH is not set
++# CONFIG_LP_CONSOLE is not set
++# CONFIG_LSI_ET1011C_PHY is not set
++CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity"
++CONFIG_LSM_MMAP_MIN_ADDR=65536
++# CONFIG_LTC1660 is not set
++# CONFIG_LTC2471 is not set
++# CONFIG_LTC2485 is not set
++# CONFIG_LTC2497 is not set
++# CONFIG_LTC2632 is not set
++# CONFIG_LTE_GDM724X is not set
++# CONFIG_LTPC is not set
++# CONFIG_LTR501 is not set
++# CONFIG_LUSTRE_FS is not set
++# CONFIG_LV0104CS is not set
++# CONFIG_LWTUNNEL is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_LZ4HC_COMPRESS is not set
++# CONFIG_LZ4_COMPRESS is not set
++# CONFIG_LZ4_DECOMPRESS is not set
++CONFIG_LZMA_COMPRESS=y
++CONFIG_LZMA_DECOMPRESS=y
++# CONFIG_LZO_COMPRESS is not set
++# CONFIG_LZO_DECOMPRESS is not set
++# CONFIG_M62332 is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_MAC80211_MESSAGE_TRACING is not set
++CONFIG_MAC80211_STA_HASH_MAX_SIZE=0
++# CONFIG_MACB is not set
++# CONFIG_MACH_ASM9260 is not set
++# CONFIG_MACH_DECSTATION is not set
++# CONFIG_MACH_INGENIC is not set
++# CONFIG_MACH_JAZZ is not set
++# CONFIG_MACH_JZ4740 is not set
++# CONFIG_MACH_LOONGSON32 is not set
++# CONFIG_MACH_LOONGSON64 is not set
++# CONFIG_MACH_PIC32 is not set
++# CONFIG_MACH_PISTACHIO is not set
++# CONFIG_MACH_TX39XX is not set
++# CONFIG_MACH_TX49XX is not set
++# CONFIG_MACH_VR41XX is not set
++# CONFIG_MACH_XILFPGA is not set
++# CONFIG_MACINTOSH_DRIVERS is not set
++# CONFIG_MACSEC is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_MACVTAP is not set
++# CONFIG_MAC_EMUMOUSEBTN is not set
++# CONFIG_MAC_PARTITION is not set
++# CONFIG_MAG3110 is not set
++# CONFIG_MAGIC_SYSRQ is not set
++CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1
++# CONFIG_MAGIC_SYSRQ_SERIAL is not set
++# CONFIG_MAILBOX is not set
++# CONFIG_MANAGER_SBS is not set
++# CONFIG_MANDATORY_FILE_LOCKING is not set
++# CONFIG_MANGLE_BOOTARGS is not set
++# CONFIG_MARVELL_10G_PHY is not set
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_MAX1027 is not set
++# CONFIG_MAX11100 is not set
++# CONFIG_MAX1118 is not set
++# CONFIG_MAX1363 is not set
++# CONFIG_MAX30100 is not set
++# CONFIG_MAX30102 is not set
++# CONFIG_MAX31856 is not set
++# CONFIG_MAX44000 is not set
++# CONFIG_MAX44009 is not set
++# CONFIG_MAX517 is not set
++# CONFIG_MAX5432 is not set
++# CONFIG_MAX5481 is not set
++# CONFIG_MAX5487 is not set
++# CONFIG_MAX5821 is not set
++# CONFIG_MAX63XX_WATCHDOG is not set
++# CONFIG_MAX9611 is not set
++# CONFIG_MAXIM_THERMOCOUPLE is not set
++CONFIG_MAY_USE_DEVLINK=y
++# CONFIG_MB1232 is not set
++# CONFIG_MC3230 is not set
++# CONFIG_MCB is not set
++# CONFIG_MCP320X is not set
++# CONFIG_MCP3422 is not set
++# CONFIG_MCP3911 is not set
++# CONFIG_MCP4018 is not set
++# CONFIG_MCP41010 is not set
++# CONFIG_MCP4131 is not set
++# CONFIG_MCP4531 is not set
++# CONFIG_MCP4725 is not set
++# CONFIG_MCP4922 is not set
++# CONFIG_MCPM is not set
++# CONFIG_MD is not set
++# CONFIG_MDIO_BCM_UNIMAC is not set
++# CONFIG_MDIO_BITBANG is not set
++# CONFIG_MDIO_BUS_MUX_GPIO is not set
++# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
++# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set
++# CONFIG_MDIO_DEVICE is not set
++# CONFIG_MDIO_HISI_FEMAC is not set
++# CONFIG_MDIO_MSCC_MIIM is not set
++# CONFIG_MDIO_OCTEON is not set
++# CONFIG_MDIO_THUNDER is not set
++# CONFIG_MD_FAULTY is not set
++# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
++# CONFIG_MEDIA_ATTACH is not set
++# CONFIG_MEDIA_CAMERA_SUPPORT is not set
++# CONFIG_MEDIA_CEC_SUPPORT is not set
++# CONFIG_MEDIA_CONTROLLER is not set
++# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
++# CONFIG_MEDIA_PCI_SUPPORT is not set
++# CONFIG_MEDIA_RADIO_SUPPORT is not set
++# CONFIG_MEDIA_RC_SUPPORT is not set
++# CONFIG_MEDIA_SDR_SUPPORT is not set
++# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
++# CONFIG_MEDIA_SUPPORT is not set
++# CONFIG_MEDIA_USB_SUPPORT is not set
++# CONFIG_MEGARAID_LEGACY is not set
++# CONFIG_MEGARAID_NEWGEN is not set
++# CONFIG_MEGARAID_SAS is not set
++# CONFIG_MELLANOX_PLATFORM is not set
++CONFIG_MEMBARRIER=y
++# CONFIG_MEMORY is not set
++# CONFIG_MEMORY_FAILURE is not set
++# CONFIG_MEMORY_HOTPLUG is not set
++# CONFIG_MEMSTICK is not set
++# CONFIG_MEMTEST is not set
++# CONFIG_MEN_A21_WDT is not set
++# CONFIG_MESON_SM is not set
++CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
++# CONFIG_MFD_88PM800 is not set
++# CONFIG_MFD_88PM805 is not set
++# CONFIG_MFD_88PM860X is not set
++# CONFIG_MFD_AAT2870_CORE is not set
++# CONFIG_MFD_AC100 is not set
++# CONFIG_MFD_ACT8945A is not set
++# CONFIG_MFD_ARIZONA_I2C is not set
++# CONFIG_MFD_ARIZONA_SPI is not set
++# CONFIG_MFD_AS3711 is not set
++# CONFIG_MFD_AS3722 is not set
++# CONFIG_MFD_ASIC3 is not set
++# CONFIG_MFD_ATMEL_FLEXCOM is not set
++# CONFIG_MFD_ATMEL_HLCDC is not set
++# CONFIG_MFD_AXP20X is not set
++# CONFIG_MFD_AXP20X_I2C is not set
++# CONFIG_MFD_BCM590XX is not set
++# CONFIG_MFD_BD9571MWV is not set
++# CONFIG_MFD_CORE is not set
++# CONFIG_MFD_CPCAP is not set
++# CONFIG_MFD_CROS_EC is not set
++# CONFIG_MFD_CS5535 is not set
++# CONFIG_MFD_DA9052_I2C is not set
++# CONFIG_MFD_DA9052_SPI is not set
++# CONFIG_MFD_DA9055 is not set
++# CONFIG_MFD_DA9062 is not set
++# CONFIG_MFD_DA9063 is not set
++# CONFIG_MFD_DA9150 is not set
++# CONFIG_MFD_DLN2 is not set
++# CONFIG_MFD_EXYNOS_LPASS is not set
++# CONFIG_MFD_HI6421_PMIC is not set
++# CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set
++# CONFIG_MFD_JANZ_CMODIO is not set
++# CONFIG_MFD_KEMPLD is not set
++# CONFIG_MFD_LM3533 is not set
++# CONFIG_MFD_LOCHNAGAR is not set
++# CONFIG_MFD_LP3943 is not set
++# CONFIG_MFD_LP8788 is not set
++# CONFIG_MFD_MADERA is not set
++# CONFIG_MFD_MAX14577 is not set
++# CONFIG_MFD_MAX77620 is not set
++# CONFIG_MFD_MAX77650 is not set
++# CONFIG_MFD_MAX77686 is not set
++# CONFIG_MFD_MAX77693 is not set
++# CONFIG_MFD_MAX77843 is not set
++# CONFIG_MFD_MAX8907 is not set
++# CONFIG_MFD_MAX8925 is not set
++# CONFIG_MFD_MAX8997 is not set
++# CONFIG_MFD_MAX8998 is not set
++# CONFIG_MFD_MC13XXX is not set
++# CONFIG_MFD_MC13XXX_I2C is not set
++# CONFIG_MFD_MC13XXX_SPI is not set
++# CONFIG_MFD_MENF21BMC is not set
++# CONFIG_MFD_MT6397 is not set
++# CONFIG_MFD_OMAP_USB_HOST is not set
++# CONFIG_MFD_PALMAS is not set
++# CONFIG_MFD_PCF50633 is not set
++# CONFIG_MFD_PM8921_CORE is not set
++# CONFIG_MFD_PM8XXX is not set
++# CONFIG_MFD_RC5T583 is not set
++# CONFIG_MFD_RDC321X is not set
++# CONFIG_MFD_RETU is not set
++# CONFIG_MFD_RK808 is not set
++# CONFIG_MFD_RN5T618 is not set
++# CONFIG_MFD_ROHM_BD70528 is not set
++# CONFIG_MFD_ROHM_BD718XX is not set
++# CONFIG_MFD_RT5033 is not set
++# CONFIG_MFD_RTSX_PCI is not set
++# CONFIG_MFD_RTSX_USB is not set
++# CONFIG_MFD_SEC_CORE is not set
++# CONFIG_MFD_SI476X_CORE is not set
++# CONFIG_MFD_SKY81452 is not set
++# CONFIG_MFD_SM501 is not set
++# CONFIG_MFD_SMSC is not set
++# CONFIG_MFD_STMFX is not set
++# CONFIG_MFD_STMPE is not set
++# CONFIG_MFD_STPMIC1 is not set
++# CONFIG_MFD_SYSCON is not set
++# CONFIG_MFD_T7L66XB is not set
++# CONFIG_MFD_TC3589X is not set
++# CONFIG_MFD_TC6387XB is not set
++# CONFIG_MFD_TC6393XB is not set
++# CONFIG_MFD_TIMBERDALE is not set
++# CONFIG_MFD_TI_AM335X_TSCADC is not set
++# CONFIG_MFD_TI_LMU is not set
++# CONFIG_MFD_TI_LP873X is not set
++# CONFIG_MFD_TI_LP87565 is not set
++# CONFIG_MFD_TMIO is not set
++# CONFIG_MFD_TPS65086 is not set
++# CONFIG_MFD_TPS65090 is not set
++# CONFIG_MFD_TPS65217 is not set
++# CONFIG_MFD_TPS65218 is not set
++# CONFIG_MFD_TPS6586X is not set
++# CONFIG_MFD_TPS65910 is not set
++# CONFIG_MFD_TPS65912 is not set
++# CONFIG_MFD_TPS65912_I2C is not set
++# CONFIG_MFD_TPS65912_SPI is not set
++# CONFIG_MFD_TPS68470 is not set
++# CONFIG_MFD_TPS80031 is not set
++# CONFIG_MFD_TQMX86 is not set
++# CONFIG_MFD_VIPERBOARD is not set
++# CONFIG_MFD_VX855 is not set
++# CONFIG_MFD_WL1273_CORE is not set
++# CONFIG_MFD_WM831X is not set
++# CONFIG_MFD_WM831X_I2C is not set
++# CONFIG_MFD_WM831X_SPI is not set
++# CONFIG_MFD_WM8350_I2C is not set
++# CONFIG_MFD_WM8400 is not set
++# CONFIG_MFD_WM8994 is not set
++# CONFIG_MG_DISK is not set
++# CONFIG_MICREL_KS8995MA is not set
++# CONFIG_MICREL_PHY is not set
++# CONFIG_MICROCHIP_KSZ is not set
++# CONFIG_MICROCHIP_PHY is not set
++# CONFIG_MICROCHIP_T1_PHY is not set
++# CONFIG_MICROSEMI_PHY is not set
++# CONFIG_MIGRATION is not set
++CONFIG_MII=y
++# CONFIG_MIKROTIK is not set
++# CONFIG_MIKROTIK_RB532 is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_MINIX_FS_NATIVE_ENDIAN is not set
++# CONFIG_MINIX_SUBPARTITION is not set
++# CONFIG_MIPS_ALCHEMY is not set
++# CONFIG_MIPS_CDMM is not set
++# CONFIG_MIPS_COBALT is not set
++# CONFIG_MIPS_FPU_EMULATOR is not set
++# CONFIG_MIPS_FP_SUPPORT is not set
++# CONFIG_MIPS_GENERIC is not set
++# CONFIG_MIPS_MALTA is not set
++# CONFIG_MIPS_O32_FP64_SUPPORT is not set
++# CONFIG_MIPS_PARAVIRT is not set
++# CONFIG_MIPS_PLATFORM_DEVICES is not set
++# CONFIG_MIPS_SEAD3 is not set
++# CONFIG_MISC_ALCOR_PCI is not set
++CONFIG_MISC_FILESYSTEMS=y
++# CONFIG_MISC_RTSX_PCI is not set
++# CONFIG_MISC_RTSX_USB is not set
++# CONFIG_MISDN is not set
++# CONFIG_MISDN_AVMFRITZ is not set
++# CONFIG_MISDN_HFCPCI is not set
++# CONFIG_MISDN_HFCUSB is not set
++# CONFIG_MISDN_INFINEON is not set
++# CONFIG_MISDN_NETJET is not set
++# CONFIG_MISDN_SPEEDFAX is not set
++# CONFIG_MISDN_W6692 is not set
++# CONFIG_MKISS is not set
++# CONFIG_MLX4_CORE is not set
++# CONFIG_MLX4_EN is not set
++# CONFIG_MLX5_CORE is not set
++# CONFIG_MLX90614 is not set
++# CONFIG_MLX90632 is not set
++# CONFIG_MLXFW is not set
++# CONFIG_MLXSW_CORE is not set
++# CONFIG_MLX_CPLD_PLATFORM is not set
++# CONFIG_MLX_PLATFORM is not set
++# CONFIG_MMA7455_I2C is not set
++# CONFIG_MMA7455_SPI is not set
++# CONFIG_MMA7660 is not set
++# CONFIG_MMA8452 is not set
++# CONFIG_MMA9551 is not set
++# CONFIG_MMA9553 is not set
++# CONFIG_MMC is not set
++# CONFIG_MMC35240 is not set
++# CONFIG_MMC_ARMMMCI is not set
++# CONFIG_MMC_AU1X is not set
++# CONFIG_MMC_BLOCK is not set
++CONFIG_MMC_BLOCK_BOUNCE=y
++CONFIG_MMC_BLOCK_MINORS=8
++# CONFIG_MMC_CAVIUM_THUNDERX is not set
++# CONFIG_MMC_CB710 is not set
++# CONFIG_MMC_CQHCI is not set
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_DW is not set
++# CONFIG_MMC_JZ4740 is not set
++# CONFIG_MMC_MTK is not set
++# CONFIG_MMC_MVSDIO is not set
++# CONFIG_MMC_S3C is not set
++# CONFIG_MMC_SDHCI is not set
++# CONFIG_MMC_SDHCI_ACPI is not set
++# CONFIG_MMC_SDHCI_AM654 is not set
++# CONFIG_MMC_SDHCI_BCM_KONA is not set
++# CONFIG_MMC_SDHCI_CADENCE is not set
++# CONFIG_MMC_SDHCI_F_SDH30 is not set
++# CONFIG_MMC_SDHCI_IPROC is not set
++# CONFIG_MMC_SDHCI_MSM is not set
++# CONFIG_MMC_SDHCI_OF_ARASAN is not set
++# CONFIG_MMC_SDHCI_OF_ASPEED is not set
++# CONFIG_MMC_SDHCI_OF_AT91 is not set
++# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set
++# CONFIG_MMC_SDHCI_OF_ESDHC is not set
++# CONFIG_MMC_SDHCI_OF_HLWD is not set
++# CONFIG_MMC_SDHCI_OMAP is not set
++# CONFIG_MMC_SDHCI_PXAV2 is not set
++# CONFIG_MMC_SDHCI_PXAV3 is not set
++# CONFIG_MMC_SDHCI_S3C is not set
++# CONFIG_MMC_SDHCI_XENON is not set
++# CONFIG_MMC_SDRICOH_CS is not set
++# CONFIG_MMC_SPI is not set
++# CONFIG_MMC_STM32_SDMMC is not set
++# CONFIG_MMC_TEST is not set
++# CONFIG_MMC_TIFM_SD is not set
++# CONFIG_MMC_TOSHIBA_PCI is not set
++# CONFIG_MMC_USDHI6ROL0 is not set
++# CONFIG_MMC_USHC is not set
++# CONFIG_MMC_VIA_SDMMC is not set
++# CONFIG_MMC_VUB300 is not set
++# CONFIG_MMIOTRACE is not set
++CONFIG_MMU=y
++CONFIG_MODULES=y
++# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set
++# CONFIG_MODULE_COMPRESS is not set
++# CONFIG_MODULE_FORCE_LOAD is not set
++# CONFIG_MODULE_FORCE_UNLOAD is not set
++# CONFIG_MODULE_SIG is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++CONFIG_MODULE_STRIPPED=y
++CONFIG_MODULE_UNLOAD=y
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MOST is not set
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_ELAN_I2C is not set
++# CONFIG_MOUSE_GPIO is not set
++# CONFIG_MOUSE_INPORT is not set
++# CONFIG_MOUSE_LOGIBM is not set
++# CONFIG_MOUSE_PC110PAD is not set
++# CONFIG_MOUSE_PS2_FOCALTECH is not set
++# CONFIG_MOUSE_PS2_SENTELIC is not set
++# CONFIG_MOUSE_SYNAPTICS_I2C is not set
++# CONFIG_MOUSE_SYNAPTICS_USB is not set
++# CONFIG_MOXTET is not set
++# CONFIG_MPL115 is not set
++# CONFIG_MPL115_I2C is not set
++# CONFIG_MPL115_SPI is not set
++# CONFIG_MPL3115 is not set
++# CONFIG_MPLS is not set
++# CONFIG_MPU3050_I2C is not set
++# CONFIG_MQ_IOSCHED_DEADLINE is not set
++# CONFIG_MQ_IOSCHED_KYBER is not set
++# CONFIG_MS5611 is not set
++# CONFIG_MS5637 is not set
++# CONFIG_MSCC_OCELOT_SWITCH is not set
++# CONFIG_MSDOS_FS is not set
++CONFIG_MSDOS_PARTITION=y
++# CONFIG_MSI_BITMAP_SELFTEST is not set
++# CONFIG_MSI_LAPTOP is not set
++CONFIG_MTD=y
++# CONFIG_MTD_ABSENT is not set
++# CONFIG_MTD_AFS_PARTS is not set
++# CONFIG_MTD_AR7_PARTS is not set
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_MTD_BLOCK2MTD is not set
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_CFI_AMDSTD=y
++# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++CONFIG_MTD_CFI_INTELEXT=y
++# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
++CONFIG_MTD_CFI_NOSWAP=y
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_CMDLINE_PARTS is not set
++CONFIG_MTD_COMPLEX_MAPPINGS=y
++# CONFIG_MTD_DATAFLASH is not set
++# CONFIG_MTD_DOCG3 is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_GPIO_ADDR is not set
++# CONFIG_MTD_HYPERBUS is not set
++# CONFIG_MTD_IMPA7 is not set
++# CONFIG_MTD_INTEL_VR_NOR is not set
++# CONFIG_MTD_JEDECPROBE is not set
++# CONFIG_MTD_LATCH_ADDR is not set
++# CONFIG_MTD_LPDDR is not set
++# CONFIG_MTD_LPDDR2_NVM is not set
++# CONFIG_MTD_M25P80 is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MCHP23K256 is not set
++# CONFIG_MTD_MT81xx_NOR is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_MYLOADER_PARTS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_NAND_AMS_DELTA is not set
++# CONFIG_MTD_NAND_AR934X is not set
++# CONFIG_MTD_NAND_AR934X_HW_ECC is not set
++# CONFIG_MTD_NAND_ATMEL is not set
++# CONFIG_MTD_NAND_AU1550 is not set
++# CONFIG_MTD_NAND_BCH is not set
++# CONFIG_MTD_NAND_BF5XX is not set
++# CONFIG_MTD_NAND_BRCMNAND is not set
++# CONFIG_MTD_NAND_CAFE is not set
++# CONFIG_MTD_NAND_CM_X270 is not set
++# CONFIG_MTD_NAND_CS553X is not set
++# CONFIG_MTD_NAND_DAVINCI is not set
++# CONFIG_MTD_NAND_DENALI is not set
++# CONFIG_MTD_NAND_DENALI_DT is not set
++# CONFIG_MTD_NAND_DENALI_PCI is not set
++CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR=0xff108018
++# CONFIG_MTD_NAND_DISKONCHIP is not set
++# CONFIG_MTD_NAND_DOCG4 is not set
++# CONFIG_MTD_NAND_ECC is not set
++# CONFIG_MTD_NAND_ECC_BCH is not set
++# CONFIG_MTD_NAND_ECC_SMC is not set
++# CONFIG_MTD_NAND_ECC_SW_BCH is not set
++# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set
++# CONFIG_MTD_NAND_FSL_ELBC is not set
++# CONFIG_MTD_NAND_FSL_IFC is not set
++# CONFIG_MTD_NAND_FSL_UPM is not set
++# CONFIG_MTD_NAND_FSMC is not set
++# CONFIG_MTD_NAND_GPIO is not set
++# CONFIG_MTD_NAND_GPMI_NAND is not set
++# CONFIG_MTD_NAND_HISI504 is not set
++CONFIG_MTD_NAND_IDS=y
++# CONFIG_MTD_NAND_JZ4740 is not set
++# CONFIG_MTD_NAND_MPC5121_NFC is not set
++# CONFIG_MTD_NAND_MTK is not set
++# CONFIG_MTD_NAND_MTK_BMT is not set
++# CONFIG_MTD_NAND_MXC is not set
++# CONFIG_MTD_NAND_MXIC is not set
++# CONFIG_MTD_NAND_NANDSIM is not set
++# CONFIG_MTD_NAND_NDFC is not set
++# CONFIG_MTD_NAND_NUC900 is not set
++# CONFIG_MTD_NAND_OMAP2 is not set
++# CONFIG_MTD_NAND_OMAP_BCH_BUILD is not set
++# CONFIG_MTD_NAND_ORION is not set
++# CONFIG_MTD_NAND_PASEMI is not set
++# CONFIG_MTD_NAND_PLATFORM is not set
++# CONFIG_MTD_NAND_PXA3xx is not set
++# CONFIG_MTD_NAND_RB4XX is not set
++# CONFIG_MTD_NAND_RB750 is not set
++# CONFIG_MTD_NAND_RICOH is not set
++# CONFIG_MTD_NAND_S3C2410 is not set
++# CONFIG_MTD_NAND_SHARPSL is not set
++# CONFIG_MTD_NAND_SH_FLCTL is not set
++# CONFIG_MTD_NAND_SOCRATES is not set
++# CONFIG_MTD_NAND_TMIO is not set
++# CONFIG_MTD_NAND_TXX9NDFMC is not set
++CONFIG_MTD_OF_PARTS=y
++# CONFIG_MTD_ONENAND is not set
++# CONFIG_MTD_OOPS is not set
++# CONFIG_MTD_OTP is not set
++# CONFIG_MTD_PARTITIONED_MASTER is not set
++# CONFIG_MTD_PCI is not set
++# CONFIG_MTD_PCMCIA is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_PHYSMAP is not set
++# CONFIG_MTD_PHYSMAP_COMPAT is not set
++# CONFIG_MTD_PHYSMAP_GEMINI is not set
++# CONFIG_MTD_PHYSMAP_GPIO_ADDR is not set
++CONFIG_MTD_PHYSMAP_OF=y
++# CONFIG_MTD_PHYSMAP_OF_GEMINI is not set
++# CONFIG_MTD_PHYSMAP_OF_VERSATILE is not set
++# CONFIG_MTD_PHYSMAP_VERSATILE is not set
++# CONFIG_MTD_PLATRAM is not set
++# CONFIG_MTD_PMC551 is not set
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_RAW_NAND is not set
++CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
++# CONFIG_MTD_REDBOOT_PARTS is not set
++# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
++# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
++# CONFIG_MTD_ROM is not set
++CONFIG_MTD_ROOTFS_ROOT_DEV=y
++# CONFIG_MTD_ROUTERBOOT_PARTS is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_SM_COMMON is not set
++# CONFIG_MTD_SPINAND_MT29F is not set
++# CONFIG_MTD_SPI_NAND is not set
++# CONFIG_MTD_SPI_NOR is not set
++# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
++CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=4096
++CONFIG_MTD_SPLIT=y
++# CONFIG_MTD_SPLIT_BCM_WFI_FW is not set
++# CONFIG_MTD_SPLIT_BCM63XX_FW is not set
++# CONFIG_MTD_SPLIT_BRNIMAGE_FW is not set
++# CONFIG_MTD_SPLIT_ELF_FW is not set
++# CONFIG_MTD_SPLIT_EVA_FW is not set
++# CONFIG_MTD_SPLIT_FIRMWARE is not set
++CONFIG_MTD_SPLIT_FIRMWARE_NAME="firmware"
++# CONFIG_MTD_SPLIT_FIT_FW is not set
++# CONFIG_MTD_SPLIT_JIMAGE_FW is not set
++# CONFIG_MTD_SPLIT_LZMA_FW is not set
++# CONFIG_MTD_SPLIT_MINOR_FW is not set
++# CONFIG_MTD_SPLIT_SEAMA_FW is not set
++CONFIG_MTD_SPLIT_SQUASHFS_ROOT=y
++CONFIG_MTD_SPLIT_SUPPORT=y
++# CONFIG_MTD_SPLIT_TPLINK_FW is not set
++# CONFIG_MTD_SPLIT_TRX_FW is not set
++# CONFIG_MTD_SPLIT_UIMAGE_FW is not set
++# CONFIG_MTD_SPLIT_WRGG_FW is not set
++# CONFIG_MTD_SST25L is not set
++# CONFIG_MTD_SWAP is not set
++# CONFIG_MTD_TESTS is not set
++# CONFIG_MTD_UBI is not set
++# CONFIG_MTD_UBI_FASTMAP is not set
++# CONFIG_MTD_UBI_GLUEBI is not set
++# CONFIG_MTD_UIMAGE_SPLIT is not set
++# CONFIG_MTD_VIRT_CONCAT is not set
++# CONFIG_MTK_MMC is not set
++CONFIG_MULTIUSER=y
++# CONFIG_MUTEX_SPIN_ON_OWNER is not set
++# CONFIG_MV643XX_ETH is not set
++# CONFIG_MVMDIO is not set
++# CONFIG_MVNETA_BM is not set
++# CONFIG_MVSWITCH_PHY is not set
++# CONFIG_MV_XOR_V2 is not set
++# CONFIG_MWAVE is not set
++# CONFIG_MWL8K is not set
++# CONFIG_MXC4005 is not set
++# CONFIG_MXC6255 is not set
++# CONFIG_MYRI10GE is not set
++# CONFIG_NAMESPACES is not set
++# CONFIG_NATIONAL_PHY is not set
++# CONFIG_NATSEMI is not set
++# CONFIG_NAU7802 is not set
++# CONFIG_NBPFAXI_DMA is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_NE2000 is not set
++# CONFIG_NE2K_PCI is not set
++# CONFIG_NEC_MARKEINS is not set
++CONFIG_NET=y
++# CONFIG_NETCONSOLE is not set
++CONFIG_NETDEVICES=y
++# CONFIG_NETDEVSIM is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_NETFILTER_ADVANCED is not set
++# CONFIG_NETFILTER_DEBUG is not set
++# CONFIG_NETFILTER_INGRESS is not set
++# CONFIG_NETFILTER_NETLINK is not set
++# CONFIG_NETFILTER_NETLINK_ACCT is not set
++# CONFIG_NETFILTER_NETLINK_GLUE_CT is not set
++# CONFIG_NETFILTER_NETLINK_LOG is not set
++# CONFIG_NETFILTER_NETLINK_OSF is not set
++# CONFIG_NETFILTER_NETLINK_QUEUE is not set
++# CONFIG_NETFILTER_XTABLES is not set
++# CONFIG_NETFILTER_XT_CONNMARK is not set
++# CONFIG_NETFILTER_XT_MARK is not set
++# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set
++# CONFIG_NETFILTER_XT_MATCH_BPF is not set
++# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set
++# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set
++# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
++# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set
++# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set
++# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
++# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set
++# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set
++# CONFIG_NETFILTER_XT_MATCH_CPU is not set
++# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
++# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set
++# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
++# CONFIG_NETFILTER_XT_MATCH_ECN is not set
++# CONFIG_NETFILTER_XT_MATCH_ESP is not set
++# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
++# CONFIG_NETFILTER_XT_MATCH_HELPER is not set
++# CONFIG_NETFILTER_XT_MATCH_HL is not set
++# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set
++# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
++# CONFIG_NETFILTER_XT_MATCH_L2TP is not set
++# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
++# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
++# CONFIG_NETFILTER_XT_MATCH_MAC is not set
++# CONFIG_NETFILTER_XT_MATCH_MARK is not set
++# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
++# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set
++# CONFIG_NETFILTER_XT_MATCH_OSF is not set
++# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
++# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
++# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
++# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
++# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
++# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
++# CONFIG_NETFILTER_XT_MATCH_REALM is not set
++# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
++# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
++# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set
++# CONFIG_NETFILTER_XT_MATCH_STATE is not set
++# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
++# CONFIG_NETFILTER_XT_MATCH_STRING is not set
++# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
++# CONFIG_NETFILTER_XT_MATCH_TIME is not set
++# CONFIG_NETFILTER_XT_MATCH_U32 is not set
++# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set
++# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set
++# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
++# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
++# CONFIG_NETFILTER_XT_TARGET_CT is not set
++# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
++# CONFIG_NETFILTER_XT_TARGET_HL is not set
++# CONFIG_NETFILTER_XT_TARGET_HMARK is not set
++# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set
++# CONFIG_NETFILTER_XT_TARGET_LED is not set
++# CONFIG_NETFILTER_XT_TARGET_LOG is not set
++# CONFIG_NETFILTER_XT_TARGET_MARK is not set
++# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set
++# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
++# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
++# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
++# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
++# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set
++# CONFIG_NETFILTER_XT_TARGET_SECMARK is not set
++# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
++# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
++# CONFIG_NETFILTER_XT_TARGET_TEE is not set
++# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set
++# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
++# CONFIG_NETLABEL is not set
++# CONFIG_NETLINK_DIAG is not set
++# CONFIG_NETLINK_MMAP is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NETROM is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETXEN_NIC is not set
++# CONFIG_NET_9P is not set
++# CONFIG_NET_ACT_BPF is not set
++# CONFIG_NET_ACT_CSUM is not set
++# CONFIG_NET_ACT_CT is not set
++# CONFIG_NET_ACT_GACT is not set
++# CONFIG_NET_ACT_IFE is not set
++# CONFIG_NET_ACT_IPT is not set
++# CONFIG_NET_ACT_MIRRED is not set
++# CONFIG_NET_ACT_MPLS is not set
++# CONFIG_NET_ACT_NAT is not set
++# CONFIG_NET_ACT_PEDIT is not set
++# CONFIG_NET_ACT_POLICE is not set
++# CONFIG_NET_ACT_SAMPLE is not set
++# CONFIG_NET_ACT_SIMP is not set
++# CONFIG_NET_ACT_SKBEDIT is not set
++# CONFIG_NET_ACT_SKBMOD is not set
++# CONFIG_NET_ACT_TUNNEL_KEY is not set
++# CONFIG_NET_ACT_VLAN is not set
++CONFIG_NET_CADENCE=y
++# CONFIG_NET_CALXEDA_XGMAC is not set
++CONFIG_NET_CLS=y
++# CONFIG_NET_CLS_ACT is not set
++# CONFIG_NET_CLS_BASIC is not set
++# CONFIG_NET_CLS_BPF is not set
++# CONFIG_NET_CLS_FLOW is not set
++# CONFIG_NET_CLS_FLOWER is not set
++# CONFIG_NET_CLS_FW is not set
++CONFIG_NET_CLS_IND=y
++# CONFIG_NET_CLS_MATCHALL is not set
++# CONFIG_NET_CLS_ROUTE4 is not set
++# CONFIG_NET_CLS_RSVP is not set
++# CONFIG_NET_CLS_RSVP6 is not set
++# CONFIG_NET_CLS_TCINDEX is not set
++# CONFIG_NET_CLS_U32 is not set
++CONFIG_NET_CORE=y
++# CONFIG_NET_DEVLINK is not set
++# CONFIG_NET_DROP_MONITOR is not set
++# CONFIG_NET_DSA is not set
++# CONFIG_NET_DSA_BCM_SF2 is not set
++# CONFIG_NET_DSA_LANTIQ_GSWIP is not set
++# CONFIG_NET_DSA_LEGACY is not set
++# CONFIG_NET_DSA_LOOP is not set
++# CONFIG_NET_DSA_MICROCHIP_KSZ8795 is not set
++# CONFIG_NET_DSA_MICROCHIP_KSZ9477 is not set
++# CONFIG_NET_DSA_MT7530 is not set
++# CONFIG_NET_DSA_MV88E6060 is not set
++# CONFIG_NET_DSA_MV88E6123_61_65 is not set
++# CONFIG_NET_DSA_MV88E6131 is not set
++# CONFIG_NET_DSA_MV88E6171 is not set
++# CONFIG_NET_DSA_MV88E6352 is not set
++# CONFIG_NET_DSA_MV88E6XXX is not set
++# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
++# CONFIG_NET_DSA_QCA8K is not set
++# CONFIG_NET_DSA_REALTEK_SMI is not set
++# CONFIG_NET_DSA_SJA1105 is not set
++# CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set
++# CONFIG_NET_DSA_SMSC_LAN9303_MDIO is not set
++# CONFIG_NET_DSA_TAG_8021Q is not set
++# CONFIG_NET_DSA_TAG_BRCM is not set
++# CONFIG_NET_DSA_TAG_BRCM_PREPEND is not set
++# CONFIG_NET_DSA_TAG_DSA is not set
++# CONFIG_NET_DSA_TAG_EDSA is not set
++# CONFIG_NET_DSA_TAG_GSWIP is not set
++# CONFIG_NET_DSA_TAG_KSZ is not set
++# CONFIG_NET_DSA_TAG_LAN9303 is not set
++# CONFIG_NET_DSA_TAG_MTK is not set
++# CONFIG_NET_DSA_TAG_QCA is not set
++# CONFIG_NET_DSA_TAG_RTL4_A is not set
++# CONFIG_NET_DSA_TAG_SJA1105 is not set
++# CONFIG_NET_DSA_TAG_TRAILER is not set
++# CONFIG_NET_DSA_VITESSE_VSC73XX is not set
++# CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM is not set
++# CONFIG_NET_DSA_VITESSE_VSC73XX_SPI is not set
++# CONFIG_NET_EMATCH is not set
++# CONFIG_NET_EMATCH_CANID is not set
++# CONFIG_NET_EMATCH_CMP is not set
++# CONFIG_NET_EMATCH_IPT is not set
++# CONFIG_NET_EMATCH_META is not set
++# CONFIG_NET_EMATCH_NBYTE is not set
++CONFIG_NET_EMATCH_STACK=32
++# CONFIG_NET_EMATCH_TEXT is not set
++# CONFIG_NET_EMATCH_U32 is not set
++# CONFIG_NET_FAILOVER is not set
++# CONFIG_NET_FC is not set
++# CONFIG_NET_FOU is not set
++# CONFIG_NET_FOU_IP_TUNNELS is not set
++# CONFIG_NET_IFE is not set
++# CONFIG_NET_IPGRE is not set
++CONFIG_NET_IPGRE_BROADCAST=y
++# CONFIG_NET_IPGRE_DEMUX is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPVTI is not set
++# CONFIG_NET_IP_TUNNEL is not set
++# CONFIG_NET_KEY is not set
++# CONFIG_NET_KEY_MIGRATE is not set
++# CONFIG_NET_L3_MASTER_DEV is not set
++# CONFIG_NET_MPLS_GSO is not set
++# CONFIG_NET_NCSI is not set
++# CONFIG_NET_NSH is not set
++# CONFIG_NET_PACKET_ENGINE is not set
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_NET_PTP_CLASSIFY is not set
++CONFIG_NET_RX_BUSY_POLL=y
++# CONFIG_NET_SB1000 is not set
++CONFIG_NET_SCHED=y
++# CONFIG_NET_SCH_ATM is not set
++# CONFIG_NET_SCH_CAKE is not set
++# CONFIG_NET_SCH_CBQ is not set
++# CONFIG_NET_SCH_CBS is not set
++# CONFIG_NET_SCH_CHOKE is not set
++# CONFIG_NET_SCH_CODEL is not set
++# CONFIG_NET_SCH_DEFAULT is not set
++# CONFIG_NET_SCH_DRR is not set
++# CONFIG_NET_SCH_DSMARK is not set
++# CONFIG_NET_SCH_ETF is not set
++CONFIG_NET_SCH_FIFO=y
++# CONFIG_NET_SCH_FQ is not set
++CONFIG_NET_SCH_FQ_CODEL=y
++# CONFIG_NET_SCH_GRED is not set
++# CONFIG_NET_SCH_HFSC is not set
++# CONFIG_NET_SCH_HHF is not set
++# CONFIG_NET_SCH_HTB is not set
++# CONFIG_NET_SCH_INGRESS is not set
++# CONFIG_NET_SCH_MQPRIO is not set
++# CONFIG_NET_SCH_MULTIQ is not set
++# CONFIG_NET_SCH_NETEM is not set
++# CONFIG_NET_SCH_PIE is not set
++# CONFIG_NET_SCH_PLUG is not set
++# CONFIG_NET_SCH_PRIO is not set
++# CONFIG_NET_SCH_QFQ is not set
++# CONFIG_NET_SCH_RED is not set
++# CONFIG_NET_SCH_SFB is not set
++# CONFIG_NET_SCH_SFQ is not set
++# CONFIG_NET_SCH_SKBPRIO is not set
++# CONFIG_NET_SCH_TAPRIO is not set
++# CONFIG_NET_SCH_TBF is not set
++# CONFIG_NET_SCH_TEQL is not set
++# CONFIG_NET_SCTPPROBE is not set
++# CONFIG_NET_SWITCHDEV is not set
++# CONFIG_NET_TCPPROBE is not set
++# CONFIG_NET_TC_SKB_EXT is not set
++# CONFIG_NET_TEAM is not set
++# CONFIG_NET_TULIP is not set
++# CONFIG_NET_UDP_TUNNEL is not set
++CONFIG_NET_VENDOR_3COM=y
++CONFIG_NET_VENDOR_8390=y
++CONFIG_NET_VENDOR_ADAPTEC=y
++CONFIG_NET_VENDOR_AGERE=y
++CONFIG_NET_VENDOR_ALACRITECH=y
++CONFIG_NET_VENDOR_ALTEON=y
++CONFIG_NET_VENDOR_AMAZON=y
++CONFIG_NET_VENDOR_AMD=y
++CONFIG_NET_VENDOR_AQUANTIA=y
++CONFIG_NET_VENDOR_ARC=y
++CONFIG_NET_VENDOR_ATHEROS=y
++CONFIG_NET_VENDOR_AURORA=y
++CONFIG_NET_VENDOR_BROADCOM=y
++CONFIG_NET_VENDOR_BROCADE=y
++CONFIG_NET_VENDOR_CADENCE=y
++CONFIG_NET_VENDOR_CAVIUM=y
++CONFIG_NET_VENDOR_CHELSIO=y
++CONFIG_NET_VENDOR_CIRRUS=y
++CONFIG_NET_VENDOR_CISCO=y
++CONFIG_NET_VENDOR_CORTINA=y
++CONFIG_NET_VENDOR_DEC=y
++CONFIG_NET_VENDOR_DLINK=y
++CONFIG_NET_VENDOR_EMULEX=y
++CONFIG_NET_VENDOR_EXAR=y
++CONFIG_NET_VENDOR_EZCHIP=y
++CONFIG_NET_VENDOR_FARADAY=y
++CONFIG_NET_VENDOR_FREESCALE=y
++CONFIG_NET_VENDOR_FUJITSU=y
++CONFIG_NET_VENDOR_GOOGLE=y
++CONFIG_NET_VENDOR_HISILICON=y
++CONFIG_NET_VENDOR_HP=y
++CONFIG_NET_VENDOR_HUAWEI=y
++CONFIG_NET_VENDOR_I825XX=y
++CONFIG_NET_VENDOR_IBM=y
++CONFIG_NET_VENDOR_INTEL=y
++CONFIG_NET_VENDOR_MARVELL=y
++CONFIG_NET_VENDOR_MELLANOX=y
++CONFIG_NET_VENDOR_MICREL=y
++CONFIG_NET_VENDOR_MICROCHIP=y
++CONFIG_NET_VENDOR_MICROSEMI=y
++CONFIG_NET_VENDOR_MYRI=y
++CONFIG_NET_VENDOR_NATSEMI=y
++CONFIG_NET_VENDOR_NETERION=y
++CONFIG_NET_VENDOR_NETRONOME=y
++CONFIG_NET_VENDOR_NI=y
++CONFIG_NET_VENDOR_NVIDIA=y
++CONFIG_NET_VENDOR_OKI=y
++CONFIG_NET_VENDOR_PACKET_ENGINES=y
++CONFIG_NET_VENDOR_PENSANDO=y
++CONFIG_NET_VENDOR_QLOGIC=y
++CONFIG_NET_VENDOR_QUALCOMM=y
++CONFIG_NET_VENDOR_RDC=y
++CONFIG_NET_VENDOR_REALTEK=y
++CONFIG_NET_VENDOR_RENESAS=y
++CONFIG_NET_VENDOR_ROCKER=y
++CONFIG_NET_VENDOR_SAMSUNG=y
++CONFIG_NET_VENDOR_SEEQ=y
++CONFIG_NET_VENDOR_SILAN=y
++CONFIG_NET_VENDOR_SIS=y
++CONFIG_NET_VENDOR_SMSC=y
++CONFIG_NET_VENDOR_SOCIONEXT=y
++CONFIG_NET_VENDOR_SOLARFLARE=y
++CONFIG_NET_VENDOR_STMICRO=y
++CONFIG_NET_VENDOR_SUN=y
++CONFIG_NET_VENDOR_SYNOPSYS=y
++CONFIG_NET_VENDOR_TEHUTI=y
++CONFIG_NET_VENDOR_TI=y
++CONFIG_NET_VENDOR_TOSHIBA=y
++CONFIG_NET_VENDOR_VIA=y
++CONFIG_NET_VENDOR_WIZNET=y
++CONFIG_NET_VENDOR_XILINX=y
++CONFIG_NET_VENDOR_XIRCOM=y
++# CONFIG_NET_VRF is not set
++# CONFIG_NET_XGENE is not set
++CONFIG_NEW_LEDS=y
++# CONFIG_NFC is not set
++# CONFIG_NFP is not set
++# CONFIG_NFSD is not set
++# CONFIG_NFSD_V2_ACL is not set
++CONFIG_NFSD_V3=y
++# CONFIG_NFSD_V3_ACL is not set
++# CONFIG_NFSD_V4 is not set
++# CONFIG_NFS_ACL_SUPPORT is not set
++CONFIG_NFS_COMMON=y
++# CONFIG_NFS_FS is not set
++# CONFIG_NFS_FSCACHE is not set
++# CONFIG_NFS_SWAP is not set
++# CONFIG_NFS_V2 is not set
++CONFIG_NFS_V3=y
++# CONFIG_NFS_V3_ACL is not set
++# CONFIG_NFS_V4 is not set
++# CONFIG_NFS_V4_1 is not set
++# CONFIG_NFTL is not set
++# CONFIG_NFT_BRIDGE_META is not set
++# CONFIG_NFT_BRIDGE_REJECT is not set
++# CONFIG_NFT_CONNLIMIT is not set
++# CONFIG_NFT_DUP_IPV4 is not set
++# CONFIG_NFT_DUP_IPV6 is not set
++# CONFIG_NFT_FIB_IPV4 is not set
++# CONFIG_NFT_FIB_IPV6 is not set
++# CONFIG_NFT_FIB_NETDEV is not set
++# CONFIG_NFT_FLOW_OFFLOAD is not set
++# CONFIG_NFT_OBJREF is not set
++# CONFIG_NFT_OSF is not set
++# CONFIG_NFT_RT is not set
++# CONFIG_NFT_SET_BITMAP is not set
++# CONFIG_NFT_SOCKET is not set
++# CONFIG_NFT_SYNPROXY is not set
++# CONFIG_NFT_TPROXY is not set
++# CONFIG_NFT_TUNNEL is not set
++# CONFIG_NFT_XFRM is not set
++# CONFIG_NF_CONNTRACK is not set
++# CONFIG_NF_CONNTRACK_AMANDA is not set
++# CONFIG_NF_CONNTRACK_BRIDGE is not set
++# CONFIG_NF_CONNTRACK_EVENTS is not set
++# CONFIG_NF_CONNTRACK_FTP is not set
++# CONFIG_NF_CONNTRACK_H323 is not set
++# CONFIG_NF_CONNTRACK_IPV4 is not set
++# CONFIG_NF_CONNTRACK_IPV6 is not set
++# CONFIG_NF_CONNTRACK_IRC is not set
++# CONFIG_NF_CONNTRACK_LABELS is not set
++# CONFIG_NF_CONNTRACK_MARK is not set
++# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
++# CONFIG_NF_CONNTRACK_PPTP is not set
++CONFIG_NF_CONNTRACK_PROCFS=y
++# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set
++# CONFIG_NF_CONNTRACK_SANE is not set
++# CONFIG_NF_CONNTRACK_SECMARK is not set
++# CONFIG_NF_CONNTRACK_SIP is not set
++# CONFIG_NF_CONNTRACK_SNMP is not set
++# CONFIG_NF_CONNTRACK_TFTP is not set
++# CONFIG_NF_CONNTRACK_TIMEOUT is not set
++# CONFIG_NF_CONNTRACK_TIMESTAMP is not set
++# CONFIG_NF_CONNTRACK_ZONES is not set
++# CONFIG_NF_CT_NETLINK is not set
++# CONFIG_NF_CT_NETLINK_TIMEOUT is not set
++# CONFIG_NF_CT_NETLINK_HELPER is not set
++# CONFIG_NF_CT_PROTO_DCCP is not set
++# CONFIG_NF_CT_PROTO_GRE is not set
++# CONFIG_NF_CT_PROTO_SCTP is not set
++# CONFIG_NF_CT_PROTO_UDPLITE is not set
++# CONFIG_NF_DEFRAG_IPV4 is not set
++# CONFIG_NF_DUP_IPV4 is not set
++# CONFIG_NF_DUP_IPV6 is not set
++# CONFIG_NF_FLOW_TABLE is not set
++# CONFIG_NF_LOG_ARP is not set
++# CONFIG_NF_LOG_BRIDGE is not set
++# CONFIG_NF_LOG_IPV4 is not set
++# CONFIG_NF_LOG_NETDEV is not set
++# CONFIG_NF_NAT is not set
++# CONFIG_NF_NAT_AMANDA is not set
++# CONFIG_NF_NAT_FTP is not set
++# CONFIG_NF_NAT_H323 is not set
++# CONFIG_NF_NAT_IRC is not set
++# CONFIG_NF_NAT_MASQUERADE is not set
++# CONFIG_NF_NAT_NEEDED is not set
++# CONFIG_NF_NAT_PPTP is not set
++# CONFIG_NF_NAT_PROTO_GRE is not set
++# CONFIG_NF_NAT_SIP is not set
++# CONFIG_NF_NAT_SNMP_BASIC is not set
++# CONFIG_NF_NAT_TFTP is not set
++# CONFIG_NF_REJECT_IPV4 is not set
++# CONFIG_NF_REJECT_IPV6 is not set
++# CONFIG_NF_SOCKET_IPV4 is not set
++# CONFIG_NF_SOCKET_IPV6 is not set
++# CONFIG_NF_TABLES is not set
++CONFIG_NF_TABLES_ARP=y
++CONFIG_NF_TABLES_BRIDGE=y
++CONFIG_NF_TABLES_INET=y
++CONFIG_NF_TABLES_IPV4=y
++CONFIG_NF_TABLES_IPV6=y
++CONFIG_NF_TABLES_NETDEV=y
++# CONFIG_NF_TABLES_SET is not set
++# CONFIG_NF_TPROXY_IPV4 is not set
++# CONFIG_NF_TPROXY_IPV6 is not set
++# CONFIG_NI65 is not set
++# CONFIG_NI903X_WDT is not set
++# CONFIG_NIC7018_WDT is not set
++# CONFIG_NILFS2_FS is not set
++# CONFIG_NIU is not set
++# CONFIG_NI_XGE_MANAGEMENT_ENET is not set
++CONFIG_NLATTR=y
++# CONFIG_NLMON is not set
++# CONFIG_NLM_XLP_BOARD is not set
++# CONFIG_NLM_XLR_BOARD is not set
++# CONFIG_NLS is not set
++# CONFIG_NLS_ASCII is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_CODEPAGE_437 is not set
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++# CONFIG_NLS_CODEPAGE_850 is not set
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++CONFIG_NLS_DEFAULT="iso8859-1"
++# CONFIG_NLS_ISO8859_1 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++# CONFIG_NLS_MAC_CELTIC is not set
++# CONFIG_NLS_MAC_CENTEURO is not set
++# CONFIG_NLS_MAC_CROATIAN is not set
++# CONFIG_NLS_MAC_CYRILLIC is not set
++# CONFIG_NLS_MAC_GAELIC is not set
++# CONFIG_NLS_MAC_GREEK is not set
++# CONFIG_NLS_MAC_ICELAND is not set
++# CONFIG_NLS_MAC_INUIT is not set
++# CONFIG_NLS_MAC_ROMAN is not set
++# CONFIG_NLS_MAC_ROMANIAN is not set
++# CONFIG_NLS_MAC_TURKISH is not set
++# CONFIG_NLS_UTF8 is not set
++CONFIG_NMI_LOG_BUF_SHIFT=13
++# CONFIG_NOA1305 is not set
++# CONFIG_NOP_USB_XCEIV is not set
++# CONFIG_NORTEL_HERMES is not set
++# CONFIG_NOTIFIER_ERROR_INJECTION is not set
++# CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT is not set
++# CONFIG_NOZOMI is not set
++# CONFIG_NO_BOOTMEM is not set
++# CONFIG_NO_HZ is not set
++# CONFIG_NO_HZ_FULL is not set
++# CONFIG_NO_HZ_IDLE is not set
++# CONFIG_NS83820 is not set
++# CONFIG_NTB is not set
++# CONFIG_NTFS_DEBUG is not set
++# CONFIG_NTFS_FS is not set
++# CONFIG_NTFS_RW is not set
++# CONFIG_NTP_PPS is not set
++# CONFIG_NULL_TTY is not set
++# CONFIG_NUMA is not set
++# CONFIG_NVM is not set
++# CONFIG_NVMEM is not set
++# CONFIG_NVMEM_BCM_OCOTP is not set
++# CONFIG_NVMEM_IMX_OCOTP is not set
++# CONFIG_NVMEM_REBOOT_MODE is not set
++# CONFIG_NVMEM_SYSFS is not set
++# CONFIG_NVME_FC is not set
++# CONFIG_NVME_TARGET is not set
++# CONFIG_NVME_TCP is not set
++# CONFIG_NVRAM is not set
++# CONFIG_NV_TCO is not set
++# CONFIG_NXP_STB220 is not set
++# CONFIG_NXP_STB225 is not set
++# CONFIG_NXP_TJA11XX_PHY is not set
++# CONFIG_N_GSM is not set
++# CONFIG_OABI_COMPAT is not set
++# CONFIG_OBS600 is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_OCTEONTX2_AF is not set
++# CONFIG_OF_OVERLAY is not set
++CONFIG_OF_RESERVED_MEM=y
++# CONFIG_OF_UNITTEST is not set
++# CONFIG_OMAP2_DSS_DEBUG is not set
++# CONFIG_OMAP2_DSS_DEBUGFS is not set
++# CONFIG_OMAP2_DSS_SDI is not set
++# CONFIG_OMAP_OCP2SCP is not set
++# CONFIG_OMAP_USB2 is not set
++# CONFIG_OMFS_FS is not set
++# CONFIG_OPENVSWITCH is not set
++# CONFIG_OPROFILE is not set
++# CONFIG_OPROFILE_EVENT_MULTIPLEX is not set
++# CONFIG_OPT3001 is not set
++CONFIG_OPTIMIZE_INLINING=y
++# CONFIG_ORANGEFS_FS is not set
++# CONFIG_ORION_WATCHDOG is not set
++# CONFIG_OSF_PARTITION is not set
++CONFIG_OVERLAY_FS=y
++# CONFIG_OVERLAY_FS_INDEX is not set
++# CONFIG_OVERLAY_FS_METACOPY is not set
++CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y
++# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set
++CONFIG_OVERLAY_FS_XINO_AUTO=y
++# CONFIG_OWL_LOADER is not set
++# CONFIG_P54_COMMON is not set
++# CONFIG_PA12203001 is not set
++CONFIG_PACKET=y
++# CONFIG_PACKET_DIAG is not set
++# CONFIG_PACKING is not set
++# CONFIG_PAGE_EXTENSION is not set
++# CONFIG_PAGE_OWNER is not set
++# CONFIG_PAGE_POISONING is not set
++# CONFIG_PAGE_SIZE_16KB is not set
++# CONFIG_PAGE_SIZE_32KB is not set
++CONFIG_PAGE_SIZE_4KB=y
++# CONFIG_PAGE_SIZE_64KB is not set
++# CONFIG_PAGE_SIZE_8KB is not set
++# CONFIG_PALMAS_GPADC is not set
++# CONFIG_PANASONIC_LAPTOP is not set
++# CONFIG_PANEL is not set
++CONFIG_PANIC_ON_OOPS=y
++CONFIG_PANIC_ON_OOPS_VALUE=1
++CONFIG_PANIC_TIMEOUT=1
++# CONFIG_PANTHERLORD_FF is not set
++# CONFIG_PARAVIRT is not set
++# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set
++# CONFIG_PARPORT is not set
++# CONFIG_PARPORT_1284 is not set
++# CONFIG_PARPORT_AX88796 is not set
++# CONFIG_PARPORT_GSC is not set
++# CONFIG_PARPORT_PC is not set
++CONFIG_PARTITION_ADVANCED=y
++# CONFIG_PATA_ALI is not set
++# CONFIG_PATA_AMD is not set
++# CONFIG_PATA_ARASAN_CF is not set
++# CONFIG_PATA_ARTOP is not set
++# CONFIG_PATA_ATIIXP is not set
++# CONFIG_PATA_ATP867X is not set
++# CONFIG_PATA_CMD640_PCI is not set
++# CONFIG_PATA_CMD64X is not set
++# CONFIG_PATA_CS5520 is not set
++# CONFIG_PATA_CS5530 is not set
++# CONFIG_PATA_CS5535 is not set
++# CONFIG_PATA_CS5536 is not set
++# CONFIG_PATA_CYPRESS is not set
++# CONFIG_PATA_EFAR is not set
++# CONFIG_PATA_HPT366 is not set
++# CONFIG_PATA_HPT37X is not set
++# CONFIG_PATA_HPT3X2N is not set
++# CONFIG_PATA_HPT3X3 is not set
++# CONFIG_PATA_IMX is not set
++# CONFIG_PATA_ISAPNP is not set
++# CONFIG_PATA_IT8213 is not set
++# CONFIG_PATA_IT821X is not set
++# CONFIG_PATA_JMICRON is not set
++# CONFIG_PATA_LEGACY is not set
++# CONFIG_PATA_MARVELL is not set
++# CONFIG_PATA_MPIIX is not set
++# CONFIG_PATA_NETCELL is not set
++# CONFIG_PATA_NINJA32 is not set
++# CONFIG_PATA_NS87410 is not set
++# CONFIG_PATA_NS87415 is not set
++# CONFIG_PATA_OCTEON_CF is not set
++# CONFIG_PATA_OF_PLATFORM is not set
++# CONFIG_PATA_OLDPIIX is not set
++# CONFIG_PATA_OPTI is not set
++# CONFIG_PATA_OPTIDMA is not set
++# CONFIG_PATA_PCMCIA is not set
++# CONFIG_PATA_PDC2027X is not set
++# CONFIG_PATA_PDC_OLD is not set
++# CONFIG_PATA_PLATFORM is not set
++# CONFIG_PATA_QDI is not set
++# CONFIG_PATA_RADISYS is not set
++# CONFIG_PATA_RDC is not set
++# CONFIG_PATA_RZ1000 is not set
++# CONFIG_PATA_SC1200 is not set
++# CONFIG_PATA_SCH is not set
++# CONFIG_PATA_SERVERWORKS is not set
++# CONFIG_PATA_SIL680 is not set
++# CONFIG_PATA_SIS is not set
++# CONFIG_PATA_TOSHIBA is not set
++# CONFIG_PATA_TRIFLEX is not set
++# CONFIG_PATA_VIA is not set
++# CONFIG_PATA_WINBOND is not set
++# CONFIG_PATA_WINBOND_VLB is not set
++# CONFIG_PC104 is not set
++# CONFIG_PC300TOO is not set
++# CONFIG_PCCARD is not set
++# CONFIG_PCH_DMA is not set
++# CONFIG_PCH_GBE is not set
++# CONFIG_PCH_PHUB is not set
++# CONFIG_PCI is not set
++# CONFIG_PCI200SYN is not set
++# CONFIG_PCIEAER is not set
++# CONFIG_PCIEAER_INJECT is not set
++# CONFIG_PCIEASPM is not set
++# CONFIG_PCIEPORTBUS is not set
++# CONFIG_PCIE_AL is not set
++# CONFIG_PCIE_ALTERA is not set
++# CONFIG_PCIE_ARMADA_8K is not set
++# CONFIG_PCIE_BW is not set
++# CONFIG_PCIE_CADENCE_HOST is not set
++# CONFIG_PCIE_DPC is not set
++# CONFIG_PCIE_DW_PLAT is not set
++# CONFIG_PCIE_DW_PLAT_HOST is not set
++# CONFIG_PCIE_ECRC is not set
++# CONFIG_PCIE_IPROC is not set
++# CONFIG_PCIE_KIRIN is not set
++# CONFIG_PCIE_PTM is not set
++# CONFIG_PCIE_XILINX is not set
++# CONFIG_PCIPCWATCHDOG is not set
++# CONFIG_PCI_ATMEL is not set
++# CONFIG_PCI_CNB20LE_QUIRK is not set
++# CONFIG_PCI_DEBUG is not set
++# CONFIG_PCI_DISABLE_COMMON_QUIRKS is not set
++# CONFIG_PCI_ENDPOINT is not set
++# CONFIG_PCI_ENDPOINT_TEST is not set
++# CONFIG_PCI_FTPCI100 is not set
++# CONFIG_PCI_HERMES is not set
++# CONFIG_PCI_HISI is not set
++# CONFIG_PCI_HOST_GENERIC is not set
++# CONFIG_PCI_HOST_THUNDER_ECAM is not set
++# CONFIG_PCI_HOST_THUNDER_PEM is not set
++# CONFIG_PCI_IOV is not set
++# CONFIG_PCI_LAYERSCAPE is not set
++# CONFIG_PCI_MESON is not set
++# CONFIG_PCI_MSI is not set
++# CONFIG_PCI_PASID is not set
++# CONFIG_PCI_PF_STUB is not set
++# CONFIG_PCI_PRI is not set
++CONFIG_PCI_QUIRKS=y
++# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set
++# CONFIG_PCI_STUB is not set
++# CONFIG_PCI_SW_SWITCHTEC is not set
++CONFIG_PCI_SYSCALL=y
++# CONFIG_PCI_V3_SEMI is not set
++# CONFIG_PCI_XGENE is not set
++# CONFIG_PCMCIA is not set
++# CONFIG_PCMCIA_3C574 is not set
++# CONFIG_PCMCIA_3C589 is not set
++# CONFIG_PCMCIA_AHA152X is not set
++# CONFIG_PCMCIA_ATMEL is not set
++# CONFIG_PCMCIA_AXNET is not set
++# CONFIG_PCMCIA_DEBUG is not set
++# CONFIG_PCMCIA_FDOMAIN is not set
++# CONFIG_PCMCIA_FMVJ18X is not set
++# CONFIG_PCMCIA_HERMES is not set
++# CONFIG_PCMCIA_LOAD_CIS is not set
++# CONFIG_PCMCIA_NINJA_SCSI is not set
++# CONFIG_PCMCIA_NMCLAN is not set
++# CONFIG_PCMCIA_PCNET is not set
++# CONFIG_PCMCIA_QLOGIC is not set
++# CONFIG_PCMCIA_RAYCS is not set
++# CONFIG_PCMCIA_SMC91C92 is not set
++# CONFIG_PCMCIA_SPECTRUM is not set
++# CONFIG_PCMCIA_SYM53C500 is not set
++# CONFIG_PCMCIA_WL3501 is not set
++# CONFIG_PCMCIA_XIRC2PS is not set
++# CONFIG_PCMCIA_XIRCOM is not set
++# CONFIG_PCNET32 is not set
++# CONFIG_PCSPKR_PLATFORM is not set
++# CONFIG_PD6729 is not set
++# CONFIG_PDA_POWER is not set
++# CONFIG_PDC_ADMA is not set
++# CONFIG_PERCPU_STATS is not set
++# CONFIG_PERCPU_TEST is not set
++# CONFIG_PERF_EVENTS is not set
++# CONFIG_PERF_EVENTS_AMD_POWER is not set
++# CONFIG_PERSISTENT_KEYRINGS is not set
++# CONFIG_PHANTOM is not set
++# CONFIG_PHONET is not set
++# CONFIG_PHYLIB is not set
++# CONFIG_PHYS_ADDR_T_64BIT is not set
++# CONFIG_PHY_CADENCE_DP is not set
++# CONFIG_PHY_CADENCE_DPHY is not set
++# CONFIG_PHY_CADENCE_SIERRA is not set
++# CONFIG_PHY_CPCAP_USB is not set
++# CONFIG_PHY_EXYNOS_DP_VIDEO is not set
++# CONFIG_PHY_EXYNOS_MIPI_VIDEO is not set
++# CONFIG_PHY_FSL_IMX8MQ_USB is not set
++# CONFIG_PHY_MAPPHONE_MDM6600 is not set
++# CONFIG_PHY_MIXEL_MIPI_DPHY is not set
++# CONFIG_PHY_OCELOT_SERDES is not set
++# CONFIG_PHY_PXA_28NM_HSIC is not set
++# CONFIG_PHY_PXA_28NM_USB2 is not set
++# CONFIG_PHY_QCOM_DWC3 is not set
++# CONFIG_PHY_QCOM_USB_HS is not set
++# CONFIG_PHY_QCOM_USB_HSIC is not set
++# CONFIG_PHY_SAMSUNG_USB2 is not set
++# CONFIG_PHY_TUSB1210 is not set
++# CONFIG_PHY_XGENE is not set
++# CONFIG_PI433 is not set
++# CONFIG_PID_IN_CONTEXTIDR is not set
++# CONFIG_PID_NS is not set
++CONFIG_PINCONF=y
++# CONFIG_PINCTRL is not set
++# CONFIG_PINCTRL_AMD is not set
++# CONFIG_PINCTRL_AXP209 is not set
++# CONFIG_PINCTRL_CEDARFORK is not set
++# CONFIG_PINCTRL_EXYNOS is not set
++# CONFIG_PINCTRL_EXYNOS5440 is not set
++# CONFIG_PINCTRL_ICELAKE is not set
++# CONFIG_PINCTRL_INGENIC is not set
++# CONFIG_PINCTRL_MCP23S08 is not set
++# CONFIG_PINCTRL_MSM8X74 is not set
++# CONFIG_PINCTRL_OCELOT is not set
++CONFIG_PINCTRL_SINGLE=y
++# CONFIG_PINCTRL_STMFX is not set
++# CONFIG_PINCTRL_SX150X is not set
++CONFIG_PINMUX=y
++# CONFIG_PKCS7_MESSAGE_PARSER is not set
++# CONFIG_PL310_ERRATA_588369 is not set
++# CONFIG_PL310_ERRATA_727915 is not set
++# CONFIG_PL310_ERRATA_753970 is not set
++# CONFIG_PL310_ERRATA_769419 is not set
++# CONFIG_PL320_MBOX is not set
++# CONFIG_PL330_DMA is not set
++# CONFIG_PLATFORM_MHU is not set
++# CONFIG_PLAT_SPEAR is not set
++# CONFIG_PLIP is not set
++CONFIG_PLUGIN_HOSTCC=""
++# CONFIG_PLX_HERMES is not set
++# CONFIG_PM is not set
++# CONFIG_PMBUS is not set
++# CONFIG_PMC_MSP is not set
++# CONFIG_PMIC_ADP5520 is not set
++# CONFIG_PMIC_DA903X is not set
++# CONFIG_PMS7003 is not set
++# CONFIG_PM_AUTOSLEEP is not set
++# CONFIG_PM_DEBUG is not set
++# CONFIG_PM_DEVFREQ is not set
++# CONFIG_PM_WAKELOCKS is not set
++# CONFIG_POSIX_MQUEUE is not set
++CONFIG_POSIX_TIMERS=y
++# CONFIG_POWERCAP is not set
++# CONFIG_POWER_AVS is not set
++# CONFIG_POWER_RESET is not set
++# CONFIG_POWER_RESET_BRCMKONA is not set
++# CONFIG_POWER_RESET_BRCMSTB is not set
++# CONFIG_POWER_RESET_GPIO is not set
++# CONFIG_POWER_RESET_GPIO_RESTART is not set
++# CONFIG_POWER_RESET_LTC2952 is not set
++# CONFIG_POWER_RESET_PIIX4_POWEROFF is not set
++# CONFIG_POWER_RESET_RESTART is not set
++# CONFIG_POWER_RESET_SYSCON is not set
++# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set
++# CONFIG_POWER_RESET_VERSATILE is not set
++# CONFIG_POWER_RESET_XGENE is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_POWER_SUPPLY_DEBUG is not set
++# CONFIG_POWER_SUPPLY_HWMON is not set
++# CONFIG_PPC4xx_GPIO is not set
++# CONFIG_PPC_16K_PAGES is not set
++# CONFIG_PPC_256K_PAGES is not set
++CONFIG_PPC_4K_PAGES=y
++# CONFIG_PPC_64K_PAGES is not set
++# CONFIG_PPC_DISABLE_WERROR is not set
++# CONFIG_PPC_EMULATED_STATS is not set
++# CONFIG_PPC_EPAPR_HV_BYTECHAN is not set
++# CONFIG_PPP is not set
++# CONFIG_PPPOATM is not set
++# CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
++# CONFIG_PPP_ASYNC is not set
++# CONFIG_PPP_BSDCOMP is not set
++# CONFIG_PPP_DEFLATE is not set
++CONFIG_PPP_FILTER=y
++# CONFIG_PPP_MPPE is not set
++CONFIG_PPP_MULTILINK=y
++# CONFIG_PPP_SYNC_TTY is not set
++# CONFIG_PPS is not set
++# CONFIG_PPS_CLIENT_GPIO is not set
++# CONFIG_PPS_CLIENT_KTIMER is not set
++# CONFIG_PPS_CLIENT_LDISC is not set
++# CONFIG_PPS_CLIENT_PARPORT is not set
++# CONFIG_PPS_DEBUG is not set
++# CONFIG_PPTP is not set
++# CONFIG_PREEMPT is not set
++# CONFIG_PREEMPTIRQ_DELAY_TEST is not set
++# CONFIG_PREEMPTIRQ_EVENTS is not set
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_TRACER is not set
++# CONFIG_PREEMPT_VOLUNTARY is not set
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++CONFIG_PRINTK=y
++# CONFIG_PRINTK_CALLER is not set
++CONFIG_PRINTK_NMI=y
++CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
++# CONFIG_PRINTK_TIME is not set
++CONFIG_PRINT_STACK_DEPTH=64
++# CONFIG_PRISM2_USB is not set
++# CONFIG_PRISM54 is not set
++# CONFIG_PROC_CHILDREN is not set
++CONFIG_PROC_FS=y
++# CONFIG_PROC_KCORE is not set
++# CONFIG_PROC_PAGE_MONITOR is not set
++# CONFIG_PROC_STRIPPED is not set
++CONFIG_PROC_SYSCTL=y
++# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set
++# CONFIG_PROFILE_ALL_BRANCHES is not set
++# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
++# CONFIG_PROFILING is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_PROVE_RCU is not set
++# CONFIG_PROVE_RCU_LIST is not set
++# CONFIG_PROVE_RCU_REPEATEDLY is not set
++# CONFIG_PSAMPLE is not set
++# CONFIG_PSB6970_PHY is not set
++# CONFIG_PSI is not set
++CONFIG_PSTORE=y
++# CONFIG_PSTORE_842_COMPRESS is not set
++CONFIG_PSTORE_COMPRESS=y
++CONFIG_PSTORE_COMPRESS_DEFAULT="deflate"
++# CONFIG_PSTORE_CONSOLE is not set
++CONFIG_PSTORE_DEFLATE_COMPRESS=y
++CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y
++# CONFIG_PSTORE_LZ4HC_COMPRESS is not set
++# CONFIG_PSTORE_LZ4_COMPRESS is not set
++# CONFIG_PSTORE_LZO_COMPRESS is not set
++# CONFIG_PSTORE_PMSG is not set
++CONFIG_PSTORE_RAM=y
++# CONFIG_PSTORE_ZSTD_COMPRESS is not set
++# CONFIG_PTP_1588_CLOCK is not set
++# CONFIG_PTP_1588_CLOCK_IXP46X is not set
++# CONFIG_PTP_1588_CLOCK_KVM is not set
++# CONFIG_PTP_1588_CLOCK_PCH is not set
++# CONFIG_PUBLIC_KEY_ALGO_RSA is not set
++# CONFIG_PVPANIC is not set
++# CONFIG_PWM is not set
++# CONFIG_PWM_FSL_FTM is not set
++# CONFIG_PWM_PCA9685 is not set
++CONFIG_PWRSEQ_EMMC=y
++# CONFIG_PWRSEQ_SD8787 is not set
++CONFIG_PWRSEQ_SIMPLE=y
++# CONFIG_QCA7000 is not set
++# CONFIG_QCA7000_SPI is not set
++# CONFIG_QCA7000_UART is not set
++# CONFIG_QCOM_EMAC is not set
++# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set
++# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set
++# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set
++# CONFIG_QCOM_HIDMA is not set
++# CONFIG_QCOM_HIDMA_MGMT is not set
++# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set
++# CONFIG_QCOM_SPMI_ADC5 is not set
++# CONFIG_QCOM_SPMI_IADC is not set
++# CONFIG_QCOM_SPMI_TEMP_ALARM is not set
++# CONFIG_QCOM_SPMI_VADC is not set
++# CONFIG_QED is not set
++# CONFIG_QLA3XXX is not set
++# CONFIG_QLCNIC is not set
++# CONFIG_QLGE is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_QNX6FS_FS is not set
++# CONFIG_QORIQ_CPUFREQ is not set
++# CONFIG_QORIQ_THERMAL is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_QUEUED_LOCK_STAT is not set
++# CONFIG_QUOTA is not set
++# CONFIG_QUOTACTL is not set
++# CONFIG_QUOTA_DEBUG is not set
++# CONFIG_R3964 is not set
++# CONFIG_R6040 is not set
++# CONFIG_R8169 is not set
++# CONFIG_R8188EU is not set
++# CONFIG_R8712U is not set
++# CONFIG_R8723AU is not set
++# CONFIG_RADIO_ADAPTERS is not set
++# CONFIG_RADIO_AZTECH is not set
++# CONFIG_RADIO_CADET is not set
++# CONFIG_RADIO_GEMTEK is not set
++# CONFIG_RADIO_MAXIRADIO is not set
++# CONFIG_RADIO_RTRACK is not set
++# CONFIG_RADIO_RTRACK2 is not set
++# CONFIG_RADIO_SF16FMI is not set
++# CONFIG_RADIO_SF16FMR2 is not set
++# CONFIG_RADIO_TERRATEC is not set
++# CONFIG_RADIO_TRUST is not set
++# CONFIG_RADIO_TYPHOON is not set
++# CONFIG_RADIO_ZOLTRIX is not set
++# CONFIG_RAID6_PQ_BENCHMARK is not set
++# CONFIG_RAID_ATTRS is not set
++# CONFIG_RALINK is not set
++# CONFIG_RANDOM32_SELFTEST is not set
++# CONFIG_RANDOMIZE_BASE is not set
++# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
++# CONFIG_RANDOM_TRUST_CPU is not set
++# CONFIG_RAPIDIO is not set
++# CONFIG_RAS is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_RBTREE_TEST is not set
++# CONFIG_RCU_BOOST is not set
++CONFIG_RCU_CPU_STALL_TIMEOUT=60
++# CONFIG_RCU_EQS_DEBUG is not set
++# CONFIG_RCU_EXPEDITE_BOOT is not set
++CONFIG_RCU_EXPERT=y
++CONFIG_RCU_FANOUT=32
++CONFIG_RCU_FANOUT_LEAF=16
++# CONFIG_RCU_FAST_NO_HZ is not set
++CONFIG_RCU_KTHREAD_PRIO=0
++# CONFIG_RCU_NOCB_CPU is not set
++# CONFIG_RCU_PERF_TEST is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++CONFIG_RCU_TORTURE_TEST_SLOW_INIT_DELAY=3
++# CONFIG_RCU_TRACE is not set
++# CONFIG_RC_ATI_REMOTE is not set
++# CONFIG_RC_CORE is not set
++# CONFIG_RC_DECODERS is not set
++# CONFIG_RC_LOOPBACK is not set
++# CONFIG_RC_MAP is not set
++# CONFIG_RDS is not set
++# CONFIG_RD_BZIP2 is not set
++# CONFIG_RD_GZIP is not set
++# CONFIG_RD_LZ4 is not set
++# CONFIG_RD_LZMA is not set
++# CONFIG_RD_LZO is not set
++# CONFIG_RD_XZ is not set
++# CONFIG_READABLE_ASM is not set
++# CONFIG_READ_ONLY_THP_FOR_FS is not set
++# CONFIG_REALTEK_PHY is not set
++# CONFIG_REDWOOD is not set
++# CONFIG_REED_SOLOMON_TEST is not set
++# CONFIG_REFCOUNT_FULL is not set
++# CONFIG_REGMAP is not set
++# CONFIG_REGMAP_I2C is not set
++# CONFIG_REGMAP_MMIO is not set
++# CONFIG_REGMAP_SPI is not set
++# CONFIG_REGULATOR is not set
++# CONFIG_REGULATOR_88PG86X is not set
++# CONFIG_REGULATOR_ACT8865 is not set
++# CONFIG_REGULATOR_AD5398 is not set
++# CONFIG_REGULATOR_ANATOP is not set
++# CONFIG_REGULATOR_DA9210 is not set
++# CONFIG_REGULATOR_DA9211 is not set
++# CONFIG_REGULATOR_DEBUG is not set
++# CONFIG_REGULATOR_FAN53555 is not set
++# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
++# CONFIG_REGULATOR_GPIO is not set
++# CONFIG_REGULATOR_ISL6271A is not set
++# CONFIG_REGULATOR_ISL9305 is not set
++# CONFIG_REGULATOR_LP3971 is not set
++# CONFIG_REGULATOR_LP3972 is not set
++# CONFIG_REGULATOR_LP872X is not set
++# CONFIG_REGULATOR_LP8755 is not set
++# CONFIG_REGULATOR_LTC3589 is not set
++# CONFIG_REGULATOR_LTC3676 is not set
++# CONFIG_REGULATOR_MAX1586 is not set
++# CONFIG_REGULATOR_MAX8649 is not set
++# CONFIG_REGULATOR_MAX8660 is not set
++# CONFIG_REGULATOR_MAX8952 is not set
++# CONFIG_REGULATOR_MAX8973 is not set
++# CONFIG_REGULATOR_MCP16502 is not set
++# CONFIG_REGULATOR_MT6311 is not set
++# CONFIG_REGULATOR_PFUZE100 is not set
++# CONFIG_REGULATOR_PV88060 is not set
++# CONFIG_REGULATOR_PV88080 is not set
++# CONFIG_REGULATOR_PV88090 is not set
++# CONFIG_REGULATOR_PWM is not set
++# CONFIG_REGULATOR_SLG51000 is not set
++# CONFIG_REGULATOR_SY8106A is not set
++# CONFIG_REGULATOR_SY8824X is not set
++# CONFIG_REGULATOR_TI_ABB is not set
++# CONFIG_REGULATOR_TPS51632 is not set
++# CONFIG_REGULATOR_TPS62360 is not set
++# CONFIG_REGULATOR_TPS65023 is not set
++# CONFIG_REGULATOR_TPS6507X is not set
++# CONFIG_REGULATOR_TPS65132 is not set
++# CONFIG_REGULATOR_TPS6524X is not set
++# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
++# CONFIG_REGULATOR_VCTRL is not set
++# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
++# CONFIG_REISERFS_CHECK is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_REISERFS_FS_POSIX_ACL is not set
++# CONFIG_REISERFS_FS_SECURITY is not set
++CONFIG_REISERFS_FS_XATTR=y
++# CONFIG_REISERFS_PROC_INFO is not set
++# CONFIG_RELAY is not set
++# CONFIG_RELOCATABLE is not set
++# CONFIG_REMOTEPROC is not set
++# CONFIG_RENESAS_PHY is not set
++# CONFIG_RESET_ATH79 is not set
++# CONFIG_RESET_BERLIN is not set
++# CONFIG_RESET_CONTROLLER is not set
++# CONFIG_RESET_IMX7 is not set
++# CONFIG_RESET_LANTIQ is not set
++# CONFIG_RESET_LPC18XX is not set
++# CONFIG_RESET_MESON is not set
++# CONFIG_RESET_PISTACHIO is not set
++# CONFIG_RESET_SOCFPGA is not set
++# CONFIG_RESET_STM32 is not set
++# CONFIG_RESET_SUNXI is not set
++# CONFIG_RESET_TEGRA_BPMP is not set
++# CONFIG_RESET_TI_SYSCON is not set
++# CONFIG_RESET_ZYNQ is not set
++# CONFIG_RFD77402 is not set
++# CONFIG_RFD_FTL is not set
++CONFIG_RFKILL=y
++# CONFIG_RFKILL_FULL is not set
++# CONFIG_RFKILL_GPIO is not set
++# CONFIG_RFKILL_INPUT is not set
++# CONFIG_RFKILL_LEDS is not set
++# CONFIG_RFKILL_REGULATOR is not set
++# CONFIG_RING_BUFFER_BENCHMARK is not set
++# CONFIG_RING_BUFFER_STARTUP_TEST is not set
++# CONFIG_RMI4_CORE is not set
++# CONFIG_RMNET is not set
++# CONFIG_ROCKCHIP_PHY is not set
++# CONFIG_ROCKER is not set
++# CONFIG_ROMFS_FS is not set
++# CONFIG_ROSE is not set
++# CONFIG_RPCSEC_GSS_KRB5 is not set
++# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
++# CONFIG_RPMSG_VIRTIO is not set
++# CONFIG_RPR0521 is not set
++# CONFIG_RSEQ is not set
++# CONFIG_RT2X00 is not set
++# CONFIG_RTC_CLASS is not set
++# CONFIG_RTC_DEBUG is not set
++# CONFIG_RTC_DRV_ABB5ZES3 is not set
++# CONFIG_RTC_DRV_ABEOZ9 is not set
++# CONFIG_RTC_DRV_ABX80X is not set
++# CONFIG_RTC_DRV_ARMADA38X is not set
++# CONFIG_RTC_DRV_AU1XXX is not set
++# CONFIG_RTC_DRV_BQ32K is not set
++# CONFIG_RTC_DRV_BQ4802 is not set
++# CONFIG_RTC_DRV_CADENCE is not set
++CONFIG_RTC_DRV_CMOS=y
++# CONFIG_RTC_DRV_DS1286 is not set
++# CONFIG_RTC_DRV_DS1302 is not set
++# CONFIG_RTC_DRV_DS1305 is not set
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1307_CENTURY is not set
++# CONFIG_RTC_DRV_DS1307_HWMON is not set
++# CONFIG_RTC_DRV_DS1343 is not set
++# CONFIG_RTC_DRV_DS1347 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1390 is not set
++# CONFIG_RTC_DRV_DS1511 is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_DS1685_FAMILY is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_DS2404 is not set
++# CONFIG_RTC_DRV_DS3232 is not set
++# CONFIG_RTC_DRV_DS3234 is not set
++# CONFIG_RTC_DRV_EM3027 is not set
++# CONFIG_RTC_DRV_EP93XX is not set
++# CONFIG_RTC_DRV_FM3130 is not set
++# CONFIG_RTC_DRV_FTRTC010 is not set
++# CONFIG_RTC_DRV_GENERIC is not set
++# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set
++# CONFIG_RTC_DRV_HYM8563 is not set
++# CONFIG_RTC_DRV_ISL12022 is not set
++# CONFIG_RTC_DRV_ISL12026 is not set
++# CONFIG_RTC_DRV_ISL12057 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_JZ4740 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++# CONFIG_RTC_DRV_M41T93 is not set
++# CONFIG_RTC_DRV_M41T94 is not set
++# CONFIG_RTC_DRV_M48T35 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++# CONFIG_RTC_DRV_MAX6916 is not set
++# CONFIG_RTC_DRV_MCP795 is not set
++# CONFIG_RTC_DRV_MOXART is not set
++# CONFIG_RTC_DRV_MPC5121 is not set
++# CONFIG_RTC_DRV_MSM6242 is not set
++# CONFIG_RTC_DRV_OMAP is not set
++# CONFIG_RTC_DRV_PCF2123 is not set
++# CONFIG_RTC_DRV_PCF2127 is not set
++# CONFIG_RTC_DRV_PCF85063 is not set
++# CONFIG_RTC_DRV_PCF8523 is not set
++# CONFIG_RTC_DRV_PCF85363 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_PL030 is not set
++# CONFIG_RTC_DRV_PL031 is not set
++# CONFIG_RTC_DRV_PS3 is not set
++# CONFIG_RTC_DRV_PT7C4338 is not set
++# CONFIG_RTC_DRV_R7301 is not set
++# CONFIG_RTC_DRV_R9701 is not set
++# CONFIG_RTC_DRV_RP5C01 is not set
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_RTC7301 is not set
++# CONFIG_RTC_DRV_RV3028 is not set
++# CONFIG_RTC_DRV_RV3029C2 is not set
++# CONFIG_RTC_DRV_RV8803 is not set
++# CONFIG_RTC_DRV_RX4581 is not set
++# CONFIG_RTC_DRV_RX6110 is not set
++# CONFIG_RTC_DRV_RX8010 is not set
++# CONFIG_RTC_DRV_RX8025 is not set
++# CONFIG_RTC_DRV_RX8581 is not set
++# CONFIG_RTC_DRV_S35390A is not set
++# CONFIG_RTC_DRV_SD3078 is not set
++# CONFIG_RTC_DRV_SNVS is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_SUN6I is not set
++# CONFIG_RTC_DRV_TEST is not set
++# CONFIG_RTC_DRV_V3020 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_XGENE is not set
++# CONFIG_RTC_DRV_ZYNQMP is not set
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_LIB=y
++# CONFIG_RTC_NVMEM is not set
++CONFIG_RTC_SYSTOHC=y
++CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
++# CONFIG_RTL8180 is not set
++# CONFIG_RTL8187 is not set
++# CONFIG_RTL8192E is not set
++# CONFIG_RTL8192U is not set
++# CONFIG_RTL8306_PHY is not set
++# CONFIG_RTL8366RB_PHY is not set
++# CONFIG_RTL8366S_PHY is not set
++# CONFIG_RTL8366_SMI is not set
++# CONFIG_RTL8366_SMI_DEBUG_FS is not set
++# CONFIG_RTL8367B_PHY is not set
++# CONFIG_RTL8367_PHY is not set
++# CONFIG_RTLLIB is not set
++# CONFIG_RTL_CARDS is not set
++# CONFIG_RTS5208 is not set
++CONFIG_RT_MUTEXES=y
++# CONFIG_RUNTIME_DEBUG is not set
++CONFIG_RUNTIME_TESTING_MENU=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_RXKAD=y
++# CONFIG_S2IO is not set
++# CONFIG_SAMPLES is not set
++# CONFIG_SAMSUNG_LAPTOP is not set
++# CONFIG_SATA_ACARD_AHCI is not set
++# CONFIG_SATA_AHCI is not set
++# CONFIG_SATA_AHCI_PLATFORM is not set
++# CONFIG_SATA_DWC is not set
++# CONFIG_SATA_FSL is not set
++# CONFIG_SATA_HIGHBANK is not set
++# CONFIG_SATA_INIC162X is not set
++CONFIG_SATA_MOBILE_LPM_POLICY=0
++# CONFIG_SATA_MV is not set
++# CONFIG_SATA_NV is not set
++# CONFIG_SATA_PMP is not set
++# CONFIG_SATA_PROMISE is not set
++# CONFIG_SATA_QSTOR is not set
++# CONFIG_SATA_RCAR is not set
++# CONFIG_SATA_SIL is not set
++# CONFIG_SATA_SIL24 is not set
++# CONFIG_SATA_SIS is not set
++# CONFIG_SATA_SVW is not set
++# CONFIG_SATA_SX4 is not set
++# CONFIG_SATA_ULI is not set
++# CONFIG_SATA_VIA is not set
++# CONFIG_SATA_VITESSE is not set
++# CONFIG_SBC_FITPC2_WATCHDOG is not set
++CONFIG_SBITMAP=y
++# CONFIG_SC92031 is not set
++# CONFIG_SCA3000 is not set
++# CONFIG_SCACHE_DEBUGFS is not set
++# CONFIG_SCC is not set
++# CONFIG_SCHEDSTATS is not set
++# CONFIG_SCHED_AUTOGROUP is not set
++# CONFIG_SCHED_DEBUG is not set
++CONFIG_SCHED_HRTICK=y
++# CONFIG_SCHED_MC is not set
++CONFIG_SCHED_OMIT_FRAME_POINTER=y
++# CONFIG_SCHED_SMT is not set
++# CONFIG_SCHED_STACK_END_CHECK is not set
++# CONFIG_SCHED_TRACER is not set
++# CONFIG_SCR24X is not set
++# CONFIG_SCSI is not set
++# CONFIG_SCSI_3W_9XXX is not set
++# CONFIG_SCSI_3W_SAS is not set
++# CONFIG_SCSI_7000FASST is not set
++# CONFIG_SCSI_AACRAID is not set
++# CONFIG_SCSI_ACARD is not set
++# CONFIG_SCSI_ADVANSYS is not set
++# CONFIG_SCSI_AHA152X is not set
++# CONFIG_SCSI_AHA1542 is not set
++# CONFIG_SCSI_AIC79XX is not set
++# CONFIG_SCSI_AIC7XXX is not set
++# CONFIG_SCSI_AIC94XX is not set
++# CONFIG_SCSI_AM53C974 is not set
++# CONFIG_SCSI_ARCMSR is not set
++# CONFIG_SCSI_BFA_FC is not set
++# CONFIG_SCSI_BNX2X_FCOE is not set
++# CONFIG_SCSI_BNX2_ISCSI is not set
++# CONFIG_SCSI_BUSLOGIC is not set
++# CONFIG_SCSI_CHELSIO_FCOE is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_CXGB3_ISCSI is not set
++# CONFIG_SCSI_CXGB4_ISCSI is not set
++# CONFIG_SCSI_DC395x is not set
++# CONFIG_SCSI_DEBUG is not set
++# CONFIG_SCSI_DH is not set
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_DMX3191D is not set
++# CONFIG_SCSI_DPT_I2O is not set
++# CONFIG_SCSI_DTC3280 is not set
++# CONFIG_SCSI_EATA is not set
++# CONFIG_SCSI_ESAS2R is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_FDOMAIN_PCI is not set
++# CONFIG_SCSI_FUTURE_DOMAIN is not set
++# CONFIG_SCSI_GDTH is not set
++# CONFIG_SCSI_GENERIC_NCR5380 is not set
++# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
++# CONFIG_SCSI_HISI_SAS is not set
++# CONFIG_SCSI_HPSA is not set
++# CONFIG_SCSI_HPTIOP is not set
++# CONFIG_SCSI_IN2000 is not set
++# CONFIG_SCSI_INIA100 is not set
++# CONFIG_SCSI_INITIO is not set
++# CONFIG_SCSI_IPR is not set
++# CONFIG_SCSI_IPS is not set
++# CONFIG_SCSI_ISCI is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_LOGGING is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
++# CONFIG_SCSI_LPFC is not set
++CONFIG_SCSI_MOD=y
++# CONFIG_SCSI_MPT2SAS is not set
++# CONFIG_SCSI_MPT3SAS is not set
++# CONFIG_SCSI_MQ_DEFAULT is not set
++# CONFIG_SCSI_MVSAS is not set
++# CONFIG_SCSI_MVSAS_DEBUG is not set
++# CONFIG_SCSI_MVUMI is not set
++# CONFIG_SCSI_MYRB is not set
++# CONFIG_SCSI_MYRS is not set
++# CONFIG_SCSI_NCR53C406A is not set
++# CONFIG_SCSI_NETLINK is not set
++# CONFIG_SCSI_NSP32 is not set
++# CONFIG_SCSI_OSD_INITIATOR is not set
++# CONFIG_SCSI_PAS16 is not set
++# CONFIG_SCSI_PM8001 is not set
++# CONFIG_SCSI_PMCRAID is not set
++CONFIG_SCSI_PROC_FS=y
++# CONFIG_SCSI_QLA_FC is not set
++# CONFIG_SCSI_QLA_ISCSI is not set
++# CONFIG_SCSI_QLOGIC_1280 is not set
++# CONFIG_SCSI_QLOGIC_FAS is not set
++# CONFIG_SCSI_SAS_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++# CONFIG_SCSI_SMARTPQI is not set
++# CONFIG_SCSI_SNIC is not set
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++# CONFIG_SCSI_STEX is not set
++# CONFIG_SCSI_SYM53C416 is not set
++# CONFIG_SCSI_SYM53C8XX_2 is not set
++# CONFIG_SCSI_T128 is not set
++# CONFIG_SCSI_U14_34F is not set
++# CONFIG_SCSI_UFSHCD is not set
++# CONFIG_SCSI_ULTRASTOR is not set
++# CONFIG_SCSI_VIRTIO is not set
++# CONFIG_SCSI_WD719X is not set
++# CONFIG_SCx200_ACB is not set
++# CONFIG_SDIO_UART is not set
++# CONFIG_SD_ADC_MODULATOR is not set
++# CONFIG_SECCOMP is not set
++CONFIG_SECTION_MISMATCH_WARN_ONLY=y
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITYFS is not set
++# CONFIG_SECURITY_APPARMOR is not set
++CONFIG_SECURITY_DMESG_RESTRICT=y
++# CONFIG_SECURITY_LOADPIN is not set
++# CONFIG_SECURITY_LOCKDOWN_LSM is not set
++# CONFIG_SECURITY_PATH is not set
++# CONFIG_SECURITY_SAFESETID is not set
++# CONFIG_SECURITY_SELINUX_AVC_STATS is not set
++# CONFIG_SECURITY_SELINUX_BOOTPARAM is not set
++CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=0
++# CONFIG_SECURITY_SELINUX_DEVELOP is not set
++# CONFIG_SECURITY_SELINUX_DISABLE is not set
++# CONFIG_SECURITY_SMACK is not set
++# CONFIG_SECURITY_TOMOYO is not set
++# CONFIG_SECURITY_YAMA is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++# CONFIG_SENSIRION_SGP30 is not set
++# CONFIG_SENSORS_ABITUGURU is not set
++# CONFIG_SENSORS_ABITUGURU3 is not set
++# CONFIG_SENSORS_ACPI_POWER is not set
++# CONFIG_SENSORS_AD7314 is not set
++# CONFIG_SENSORS_AD7414 is not set
++# CONFIG_SENSORS_AD7418 is not set
++# CONFIG_SENSORS_ADC128D818 is not set
++# CONFIG_SENSORS_ADCXX is not set
++# CONFIG_SENSORS_ADM1021 is not set
++# CONFIG_SENSORS_ADM1025 is not set
++# CONFIG_SENSORS_ADM1026 is not set
++# CONFIG_SENSORS_ADM1029 is not set
++# CONFIG_SENSORS_ADM1031 is not set
++# CONFIG_SENSORS_ADM1275 is not set
++# CONFIG_SENSORS_ADM9240 is not set
++# CONFIG_SENSORS_ADS1015 is not set
++# CONFIG_SENSORS_ADS7828 is not set
++# CONFIG_SENSORS_ADS7871 is not set
++# CONFIG_SENSORS_ADT7310 is not set
++# CONFIG_SENSORS_ADT7410 is not set
++# CONFIG_SENSORS_ADT7411 is not set
++# CONFIG_SENSORS_ADT7462 is not set
++# CONFIG_SENSORS_ADT7470 is not set
++# CONFIG_SENSORS_ADT7475 is not set
++# CONFIG_SENSORS_AMC6821 is not set
++# CONFIG_SENSORS_APDS990X is not set
++# CONFIG_SENSORS_APPLESMC is not set
++# CONFIG_SENSORS_AS370 is not set
++# CONFIG_SENSORS_ASB100 is not set
++# CONFIG_SENSORS_ASC7621 is not set
++# CONFIG_SENSORS_ASPEED is not set
++# CONFIG_SENSORS_ATK0110 is not set
++# CONFIG_SENSORS_ATXP1 is not set
++# CONFIG_SENSORS_BH1770 is not set
++# CONFIG_SENSORS_BH1780 is not set
++# CONFIG_SENSORS_CORETEMP is not set
++# CONFIG_SENSORS_DELL_SMM is not set
++# CONFIG_SENSORS_DME1737 is not set
++# CONFIG_SENSORS_DS1621 is not set
++# CONFIG_SENSORS_DS620 is not set
++# CONFIG_SENSORS_EMC1403 is not set
++# CONFIG_SENSORS_EMC2103 is not set
++# CONFIG_SENSORS_EMC6W201 is not set
++# CONFIG_SENSORS_F71805F is not set
++# CONFIG_SENSORS_F71882FG is not set
++# CONFIG_SENSORS_F75375S is not set
++# CONFIG_SENSORS_FAM15H_POWER is not set
++# CONFIG_SENSORS_FSCHMD is not set
++# CONFIG_SENSORS_FTSTEUTATES is not set
++# CONFIG_SENSORS_G760A is not set
++# CONFIG_SENSORS_G762 is not set
++# CONFIG_SENSORS_GL518SM is not set
++# CONFIG_SENSORS_GL520SM is not set
++# CONFIG_SENSORS_GPIO_FAN is not set
++# CONFIG_SENSORS_GSC is not set
++# CONFIG_SENSORS_HDAPS is not set
++# CONFIG_SENSORS_HIH6130 is not set
++# CONFIG_SENSORS_HMC5843 is not set
++# CONFIG_SENSORS_HMC5843_I2C is not set
++# CONFIG_SENSORS_HMC5843_SPI is not set
++# CONFIG_SENSORS_HTU21 is not set
++# CONFIG_SENSORS_I5500 is not set
++# CONFIG_SENSORS_I5K_AMB is not set
++# CONFIG_SENSORS_IBM_CFFPS is not set
++# CONFIG_SENSORS_IIO_HWMON is not set
++# CONFIG_SENSORS_INA209 is not set
++# CONFIG_SENSORS_INA2XX is not set
++# CONFIG_SENSORS_INA3221 is not set
++# CONFIG_SENSORS_INSPUR_IPSPS is not set
++# CONFIG_SENSORS_IR35221 is not set
++# CONFIG_SENSORS_IR38064 is not set
++# CONFIG_SENSORS_IRPS5401 is not set
++# CONFIG_SENSORS_ISL29018 is not set
++# CONFIG_SENSORS_ISL29028 is not set
++# CONFIG_SENSORS_ISL68137 is not set
++# CONFIG_SENSORS_IT87 is not set
++# CONFIG_SENSORS_JC42 is not set
++# CONFIG_SENSORS_K10TEMP is not set
++# CONFIG_SENSORS_K8TEMP is not set
++# CONFIG_SENSORS_LINEAGE is not set
++# CONFIG_SENSORS_LIS3LV02D is not set
++# CONFIG_SENSORS_LIS3_I2C is not set
++# CONFIG_SENSORS_LIS3_SPI is not set
++# CONFIG_SENSORS_LM25066 is not set
++# CONFIG_SENSORS_LM63 is not set
++# CONFIG_SENSORS_LM70 is not set
++# CONFIG_SENSORS_LM73 is not set
++# CONFIG_SENSORS_LM75 is not set
++# CONFIG_SENSORS_LM77 is not set
++# CONFIG_SENSORS_LM78 is not set
++# CONFIG_SENSORS_LM80 is not set
++# CONFIG_SENSORS_LM83 is not set
++# CONFIG_SENSORS_LM85 is not set
++# CONFIG_SENSORS_LM87 is not set
++# CONFIG_SENSORS_LM90 is not set
++# CONFIG_SENSORS_LM92 is not set
++# CONFIG_SENSORS_LM93 is not set
++# CONFIG_SENSORS_LM95234 is not set
++# CONFIG_SENSORS_LM95241 is not set
++# CONFIG_SENSORS_LM95245 is not set
++# CONFIG_SENSORS_LTC2945 is not set
++# CONFIG_SENSORS_LTC2978 is not set
++# CONFIG_SENSORS_LTC2990 is not set
++# CONFIG_SENSORS_LTC3815 is not set
++# CONFIG_SENSORS_LTC4151 is not set
++# CONFIG_SENSORS_LTC4215 is not set
++# CONFIG_SENSORS_LTC4222 is not set
++# CONFIG_SENSORS_LTC4245 is not set
++# CONFIG_SENSORS_LTC4260 is not set
++# CONFIG_SENSORS_LTC4261 is not set
++# CONFIG_SENSORS_LTQ_CPUTEMP is not set
++# CONFIG_SENSORS_MAX1111 is not set
++# CONFIG_SENSORS_MAX16064 is not set
++# CONFIG_SENSORS_MAX16065 is not set
++# CONFIG_SENSORS_MAX1619 is not set
++# CONFIG_SENSORS_MAX1668 is not set
++# CONFIG_SENSORS_MAX197 is not set
++# CONFIG_SENSORS_MAX20751 is not set
++# CONFIG_SENSORS_MAX31722 is not set
++# CONFIG_SENSORS_MAX31785 is not set
++# CONFIG_SENSORS_MAX31790 is not set
++# CONFIG_SENSORS_MAX34440 is not set
++# CONFIG_SENSORS_MAX6621 is not set
++# CONFIG_SENSORS_MAX6639 is not set
++# CONFIG_SENSORS_MAX6642 is not set
++# CONFIG_SENSORS_MAX6650 is not set
++# CONFIG_SENSORS_MAX6697 is not set
++# CONFIG_SENSORS_MAX8688 is not set
++# CONFIG_SENSORS_MCP3021 is not set
++# CONFIG_SENSORS_NCT6683 is not set
++# CONFIG_SENSORS_NCT6775 is not set
++# CONFIG_SENSORS_NCT7802 is not set
++# CONFIG_SENSORS_NCT7904 is not set
++# CONFIG_SENSORS_NPCM7XX is not set
++# CONFIG_SENSORS_NSA320 is not set
++# CONFIG_SENSORS_NTC_THERMISTOR is not set
++# CONFIG_SENSORS_OCC_P8_I2C is not set
++# CONFIG_SENSORS_PC87360 is not set
++# CONFIG_SENSORS_PC87427 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_PMBUS is not set
++# CONFIG_SENSORS_POWR1220 is not set
++# CONFIG_SENSORS_PWM_FAN is not set
++# CONFIG_SENSORS_PXE1610 is not set
++# CONFIG_SENSORS_RM3100_I2C is not set
++# CONFIG_SENSORS_RM3100_SPI is not set
++# CONFIG_SENSORS_SCH5627 is not set
++# CONFIG_SENSORS_SCH5636 is not set
++# CONFIG_SENSORS_SCH56XX_COMMON is not set
++# CONFIG_SENSORS_SHT15 is not set
++# CONFIG_SENSORS_SHT21 is not set
++# CONFIG_SENSORS_SHT3x is not set
++# CONFIG_SENSORS_SHTC1 is not set
++# CONFIG_SENSORS_SIS5595 is not set
++# CONFIG_SENSORS_SMM665 is not set
++# CONFIG_SENSORS_SMSC47B397 is not set
++# CONFIG_SENSORS_SMSC47M1 is not set
++# CONFIG_SENSORS_SMSC47M192 is not set
++# CONFIG_SENSORS_STTS751 is not set
++# CONFIG_SENSORS_TC654 is not set
++# CONFIG_SENSORS_TC74 is not set
++# CONFIG_SENSORS_THMC50 is not set
++# CONFIG_SENSORS_TMP102 is not set
++# CONFIG_SENSORS_TMP103 is not set
++# CONFIG_SENSORS_TMP108 is not set
++# CONFIG_SENSORS_TMP401 is not set
++# CONFIG_SENSORS_TMP421 is not set
++# CONFIG_SENSORS_TPS40422 is not set
++# CONFIG_SENSORS_TPS53679 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_SENSORS_TSL2563 is not set
++# CONFIG_SENSORS_UCD9000 is not set
++# CONFIG_SENSORS_UCD9200 is not set
++# CONFIG_SENSORS_VEXPRESS is not set
++# CONFIG_SENSORS_VIA686A is not set
++# CONFIG_SENSORS_VIA_CPUTEMP is not set
++# CONFIG_SENSORS_VT1211 is not set
++# CONFIG_SENSORS_VT8231 is not set
++# CONFIG_SENSORS_W83627EHF is not set
++# CONFIG_SENSORS_W83627HF is not set
++# CONFIG_SENSORS_W83773G is not set
++# CONFIG_SENSORS_W83781D is not set
++# CONFIG_SENSORS_W83791D is not set
++# CONFIG_SENSORS_W83792D is not set
++# CONFIG_SENSORS_W83793 is not set
++# CONFIG_SENSORS_W83795 is not set
++# CONFIG_SENSORS_W83L785TS is not set
++# CONFIG_SENSORS_W83L786NG is not set
++# CONFIG_SENSORS_XGENE is not set
++# CONFIG_SENSORS_ZL6100 is not set
++CONFIG_SERIAL_8250=y
++# CONFIG_SERIAL_8250_ACCENT is not set
++# CONFIG_SERIAL_8250_ASPEED_VUART is not set
++# CONFIG_SERIAL_8250_BOCA is not set
++CONFIG_SERIAL_8250_CONSOLE=y
++# CONFIG_SERIAL_8250_CS is not set
++# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
++# CONFIG_SERIAL_8250_DETECT_IRQ is not set
++CONFIG_SERIAL_8250_DMA=y
++# CONFIG_SERIAL_8250_DW is not set
++# CONFIG_SERIAL_8250_EM is not set
++# CONFIG_SERIAL_8250_EXAR is not set
++# CONFIG_SERIAL_8250_EXAR_ST16C554 is not set
++# CONFIG_SERIAL_8250_EXTENDED is not set
++# CONFIG_SERIAL_8250_FINTEK is not set
++# CONFIG_SERIAL_8250_FOURPORT is not set
++# CONFIG_SERIAL_8250_HUB6 is not set
++# CONFIG_SERIAL_8250_INGENIC is not set
++# CONFIG_SERIAL_8250_LPSS is not set
++# CONFIG_SERIAL_8250_MANY_PORTS is not set
++# CONFIG_SERIAL_8250_MID is not set
++# CONFIG_SERIAL_8250_MOXA is not set
++CONFIG_SERIAL_8250_NR_UARTS=2
++# CONFIG_SERIAL_8250_PCI is not set
++# CONFIG_SERIAL_8250_RSA is not set
++# CONFIG_SERIAL_8250_RT288X is not set
++CONFIG_SERIAL_8250_RUNTIME_UARTS=2
++# CONFIG_SERIAL_ALTERA_JTAGUART is not set
++# CONFIG_SERIAL_ALTERA_UART is not set
++# CONFIG_SERIAL_AMBA_PL010 is not set
++# CONFIG_SERIAL_AMBA_PL011 is not set
++# CONFIG_SERIAL_ARC is not set
++# CONFIG_SERIAL_BCM63XX is not set
++# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_DEV_BUS is not set
++CONFIG_SERIAL_EARLYCON=y
++# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set
++# CONFIG_SERIAL_FSL_LINFLEXUART is not set
++# CONFIG_SERIAL_FSL_LPUART is not set
++# CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
++# CONFIG_SERIAL_IFX6X60 is not set
++# CONFIG_SERIAL_JSM is not set
++# CONFIG_SERIAL_MAX3100 is not set
++# CONFIG_SERIAL_MAX310X is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++# CONFIG_SERIAL_OF_PLATFORM is not set
++# CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL is not set
++# CONFIG_SERIAL_PCH_UART is not set
++# CONFIG_SERIAL_RP2 is not set
++# CONFIG_SERIAL_SC16IS7XX is not set
++# CONFIG_SERIAL_SCCNXP is not set
++# CONFIG_SERIAL_SH_SCI is not set
++# CONFIG_SERIAL_SIFIVE is not set
++# CONFIG_SERIAL_STM32 is not set
++# CONFIG_SERIAL_ST_ASC is not set
++# CONFIG_SERIAL_TIMBERDALE is not set
++# CONFIG_SERIAL_UARTLITE is not set
++# CONFIG_SERIAL_XILINX_PS_UART is not set
++# CONFIG_SERIO is not set
++# CONFIG_SERIO_ALTERA_PS2 is not set
++# CONFIG_SERIO_AMBAKMI is not set
++# CONFIG_SERIO_APBPS2 is not set
++# CONFIG_SERIO_ARC_PS2 is not set
++# CONFIG_SERIO_CT82C710 is not set
++# CONFIG_SERIO_GPIO_PS2 is not set
++# CONFIG_SERIO_I8042 is not set
++# CONFIG_SERIO_LIBPS2 is not set
++# CONFIG_SERIO_PARKBD is not set
++# CONFIG_SERIO_PCIPS2 is not set
++# CONFIG_SERIO_PS2MULT is not set
++# CONFIG_SERIO_RAW is not set
++# CONFIG_SERIO_SERPORT is not set
++# CONFIG_SERIO_SUN4I_PS2 is not set
++# CONFIG_SFC is not set
++# CONFIG_SFC_FALCON is not set
++# CONFIG_SFI is not set
++# CONFIG_SFP is not set
++# CONFIG_SGETMASK_SYSCALL is not set
++# CONFIG_SGI_IOC4 is not set
++# CONFIG_SGI_IP22 is not set
++# CONFIG_SGI_IP27 is not set
++# CONFIG_SGI_IP28 is not set
++# CONFIG_SGI_IP32 is not set
++# CONFIG_SGI_PARTITION is not set
++# CONFIG_SG_POOL is not set
++# CONFIG_SG_SPLIT is not set
++CONFIG_SHMEM=y
++# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set
++# CONFIG_SH_ETH is not set
++# CONFIG_SH_TIMER_CMT is not set
++# CONFIG_SH_TIMER_MTU2 is not set
++# CONFIG_SH_TIMER_TMU is not set
++# CONFIG_SI1133 is not set
++# CONFIG_SI1145 is not set
++# CONFIG_SI7005 is not set
++# CONFIG_SI7020 is not set
++# CONFIG_SIBYTE_BIGSUR is not set
++# CONFIG_SIBYTE_CARMEL is not set
++# CONFIG_SIBYTE_CRHINE is not set
++# CONFIG_SIBYTE_CRHONE is not set
++# CONFIG_SIBYTE_LITTLESUR is not set
++# CONFIG_SIBYTE_RHONE is not set
++# CONFIG_SIBYTE_SENTOSA is not set
++# CONFIG_SIBYTE_SWARM is not set
++CONFIG_SIGNALFD=y
++# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set
++# CONFIG_SIMPLE_GPIO is not set
++# CONFIG_SIMPLE_PM_BUS is not set
++# CONFIG_SIOX is not set
++# CONFIG_SIS190 is not set
++# CONFIG_SIS900 is not set
++# CONFIG_SKGE is not set
++# CONFIG_SKY2 is not set
++# CONFIG_SKY2_DEBUG is not set
++# CONFIG_SLAB is not set
++CONFIG_SLABINFO=y
++# CONFIG_SLAB_FREELIST_HARDENED is not set
++# CONFIG_SLAB_FREELIST_RANDOM is not set
++CONFIG_SLAB_MERGE_DEFAULT=y
++# CONFIG_SLHC is not set
++# CONFIG_SLICOSS is not set
++# CONFIG_SLIMBUS is not set
++# CONFIG_SLIP is not set
++# CONFIG_SLOB is not set
++CONFIG_SLUB=y
++CONFIG_SLUB_CPU_PARTIAL=y
++# CONFIG_SLUB_DEBUG is not set
++# CONFIG_SLUB_DEBUG_ON is not set
++# CONFIG_SLUB_MEMCG_SYSFS_ON is not set
++# CONFIG_SLUB_STATS is not set
++# CONFIG_SMARTJOYPLUS_FF is not set
++# CONFIG_SMC911X is not set
++# CONFIG_SMC9194 is not set
++# CONFIG_SMC91X is not set
++# CONFIG_SMP is not set
++# CONFIG_SMSC911X is not set
++# CONFIG_SMSC9420 is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_SM_FTL is not set
++# CONFIG_SND is not set
++# CONFIG_SND_AC97_POWER_SAVE is not set
++# CONFIG_SND_AD1816A is not set
++# CONFIG_SND_AD1848 is not set
++# CONFIG_SND_AD1889 is not set
++# CONFIG_SND_ADLIB is not set
++# CONFIG_SND_ALI5451 is not set
++# CONFIG_SND_ALOOP is not set
++# CONFIG_SND_ALS100 is not set
++# CONFIG_SND_ALS300 is not set
++# CONFIG_SND_ALS4000 is not set
++# CONFIG_SND_ARM is not set
++# CONFIG_SND_ASIHPI is not set
++# CONFIG_SND_ATIIXP is not set
++# CONFIG_SND_ATIIXP_MODEM is not set
++# CONFIG_SND_ATMEL_AC97C is not set
++# CONFIG_SND_ATMEL_SOC is not set
++# CONFIG_SND_AU8810 is not set
++# CONFIG_SND_AU8820 is not set
++# CONFIG_SND_AU8830 is not set
++# CONFIG_SND_AUDIO_GRAPH_CARD is not set
++# CONFIG_SND_AUDIO_GRAPH_SCU_CARD is not set
++# CONFIG_SND_AW2 is not set
++# CONFIG_SND_AZT2320 is not set
++# CONFIG_SND_AZT3328 is not set
++# CONFIG_SND_BCD2000 is not set
++# CONFIG_SND_BT87X is not set
++# CONFIG_SND_CA0106 is not set
++# CONFIG_SND_CMI8330 is not set
++# CONFIG_SND_CMIPCI is not set
++# CONFIG_SND_CS4231 is not set
++# CONFIG_SND_CS4236 is not set
++# CONFIG_SND_CS4281 is not set
++# CONFIG_SND_CS46XX is not set
++# CONFIG_SND_CS5530 is not set
++# CONFIG_SND_CS5535AUDIO is not set
++# CONFIG_SND_CTXFI is not set
++# CONFIG_SND_DARLA20 is not set
++# CONFIG_SND_DARLA24 is not set
++# CONFIG_SND_DEBUG is not set
++# CONFIG_SND_DESIGNWARE_I2S is not set
++CONFIG_SND_DRIVERS=y
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_DYNAMIC_MINORS is not set
++# CONFIG_SND_ECHO3G is not set
++# CONFIG_SND_EDMA_SOC is not set
++# CONFIG_SND_EMU10K1 is not set
++# CONFIG_SND_EMU10K1X is not set
++# CONFIG_SND_EMU10K1_SEQ is not set
++# CONFIG_SND_ENS1370 is not set
++# CONFIG_SND_ENS1371 is not set
++# CONFIG_SND_ES1688 is not set
++# CONFIG_SND_ES18XX is not set
++# CONFIG_SND_ES1938 is not set
++# CONFIG_SND_ES1968 is not set
++# CONFIG_SND_FIREWIRE is not set
++# CONFIG_SND_FM801 is not set
++# CONFIG_SND_GINA20 is not set
++# CONFIG_SND_GINA24 is not set
++# CONFIG_SND_GUSCLASSIC is not set
++# CONFIG_SND_GUSEXTREME is not set
++# CONFIG_SND_GUSMAX is not set
++# CONFIG_SND_HDA_INTEL is not set
++# CONFIG_SND_HDA_INTEL_DETECT_DMIC is not set
++CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0
++CONFIG_SND_HDA_PREALLOC_SIZE=64
++# CONFIG_SND_HDSP is not set
++# CONFIG_SND_HDSPM is not set
++# CONFIG_SND_HRTIMER is not set
++# CONFIG_SND_HWDEP is not set
++# CONFIG_SND_I2S_HI6210_I2S is not set
++# CONFIG_SND_ICE1712 is not set
++# CONFIG_SND_ICE1724 is not set
++# CONFIG_SND_INDIGO is not set
++# CONFIG_SND_INDIGODJ is not set
++# CONFIG_SND_INDIGODJX is not set
++# CONFIG_SND_INDIGOIO is not set
++# CONFIG_SND_INDIGOIOX is not set
++# CONFIG_SND_INTEL8X0 is not set
++# CONFIG_SND_INTEL8X0M is not set
++# CONFIG_SND_INTERWAVE is not set
++# CONFIG_SND_INTERWAVE_STB is not set
++# CONFIG_SND_ISA is not set
++# CONFIG_SND_JZ4740_SOC_I2S is not set
++# CONFIG_SND_KIRKWOOD_SOC is not set
++# CONFIG_SND_KORG1212 is not set
++# CONFIG_SND_LAYLA20 is not set
++# CONFIG_SND_LAYLA24 is not set
++# CONFIG_SND_LOLA is not set
++# CONFIG_SND_LX6464ES is not set
++# CONFIG_SND_MAESTRO3 is not set
++CONFIG_SND_MAX_CARDS=16
++# CONFIG_SND_MIA is not set
++# CONFIG_SND_MIPS is not set
++# CONFIG_SND_MIRO is not set
++# CONFIG_SND_MIXART is not set
++# CONFIG_SND_MIXER_OSS is not set
++# CONFIG_SND_MONA is not set
++# CONFIG_SND_MPC52xx_SOC_EFIKA is not set
++# CONFIG_SND_MPU401 is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_MTS64 is not set
++# CONFIG_SND_MXS_SOC is not set
++# CONFIG_SND_NM256 is not set
++# CONFIG_SND_OPL3SA2 is not set
++# CONFIG_SND_OPL3_LIB_SEQ is not set
++# CONFIG_SND_OPL4_LIB_SEQ is not set
++# CONFIG_SND_OPTI92X_AD1848 is not set
++# CONFIG_SND_OPTI92X_CS4231 is not set
++# CONFIG_SND_OPTI93X is not set
++CONFIG_SND_OSSEMUL=y
++# CONFIG_SND_OXYGEN is not set
++CONFIG_SND_PCI=y
++# CONFIG_SND_PCM is not set
++# CONFIG_SND_PCMCIA is not set
++# CONFIG_SND_PCM_OSS is not set
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_PCM_TIMER is not set
++# CONFIG_SND_PCM_XRUN_DEBUG is not set
++# CONFIG_SND_PCXHR is not set
++# CONFIG_SND_PDAUDIOCF is not set
++# CONFIG_SND_PORTMAN2X4 is not set
++# CONFIG_SND_POWERPC_SOC is not set
++# CONFIG_SND_PPC is not set
++CONFIG_SND_PROC_FS=y
++# CONFIG_SND_RAWMIDI is not set
++# CONFIG_SND_RAWMIDI_SEQ is not set
++# CONFIG_SND_RIPTIDE is not set
++# CONFIG_SND_RME32 is not set
++# CONFIG_SND_RME96 is not set
++# CONFIG_SND_RME9652 is not set
++# CONFIG_SND_RTCTIMER is not set
++# CONFIG_SND_SB16 is not set
++# CONFIG_SND_SB8 is not set
++# CONFIG_SND_SBAWE is not set
++# CONFIG_SND_SBAWE_SEQ is not set
++# CONFIG_SND_SE6X is not set
++# CONFIG_SND_SEQUENCER is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_SIMPLE_CARD is not set
++# CONFIG_SND_SIMPLE_SCU_CARD is not set
++# CONFIG_SND_SIS7019 is not set
++# CONFIG_SND_SOC is not set
++# CONFIG_SND_SOC_AC97_CODEC is not set
++# CONFIG_SND_SOC_ADAU1701 is not set
++# CONFIG_SND_SOC_ADAU1761_I2C is not set
++# CONFIG_SND_SOC_ADAU1761_SPI is not set
++# CONFIG_SND_SOC_ADAU7002 is not set
++# CONFIG_SND_SOC_AK4104 is not set
++# CONFIG_SND_SOC_AK4118 is not set
++# CONFIG_SND_SOC_AK4458 is not set
++# CONFIG_SND_SOC_AK4554 is not set
++# CONFIG_SND_SOC_AK4613 is not set
++# CONFIG_SND_SOC_AK4642 is not set
++# CONFIG_SND_SOC_AK5386 is not set
++# CONFIG_SND_SOC_AK5558 is not set
++# CONFIG_SND_SOC_ALC5623 is not set
++# CONFIG_SND_SOC_AMD_ACP is not set
++# CONFIG_SND_SOC_AMD_ACP3x is not set
++# CONFIG_SND_SOC_AU1XAUDIO is not set
++# CONFIG_SND_SOC_AU1XPSC is not set
++# CONFIG_SND_SOC_BD28623 is not set
++# CONFIG_SND_SOC_BT_SCO is not set
++# CONFIG_SND_SOC_CS35L32 is not set
++# CONFIG_SND_SOC_CS35L33 is not set
++# CONFIG_SND_SOC_CS35L34 is not set
++# CONFIG_SND_SOC_CS35L35 is not set
++# CONFIG_SND_SOC_CS35L36 is not set
++# CONFIG_SND_SOC_CS4265 is not set
++# CONFIG_SND_SOC_CS4270 is not set
++# CONFIG_SND_SOC_CS4271 is not set
++# CONFIG_SND_SOC_CS4271_I2C is not set
++# CONFIG_SND_SOC_CS4271_SPI is not set
++# CONFIG_SND_SOC_CS42L42 is not set
++# CONFIG_SND_SOC_CS42L51_I2C is not set
++# CONFIG_SND_SOC_CS42L52 is not set
++# CONFIG_SND_SOC_CS42L56 is not set
++# CONFIG_SND_SOC_CS42L73 is not set
++# CONFIG_SND_SOC_CS42XX8_I2C is not set
++# CONFIG_SND_SOC_CS43130 is not set
++# CONFIG_SND_SOC_CS4341 is not set
++# CONFIG_SND_SOC_CS4349 is not set
++# CONFIG_SND_SOC_CS53L30 is not set
++# CONFIG_SND_SOC_CX2072X is not set
++# CONFIG_SND_SOC_DIO2125 is not set
++# CONFIG_SND_SOC_DMIC is not set
++# CONFIG_SND_SOC_ES7134 is not set
++# CONFIG_SND_SOC_ES7241 is not set
++# CONFIG_SND_SOC_ES8316 is not set
++# CONFIG_SND_SOC_ES8328 is not set
++# CONFIG_SND_SOC_ES8328_I2C is not set
++# CONFIG_SND_SOC_ES8328_SPI is not set
++# CONFIG_SND_SOC_EUKREA_TLV320 is not set
++# CONFIG_SND_SOC_FSL_ASOC_CARD is not set
++# CONFIG_SND_SOC_FSL_ASRC is not set
++# CONFIG_SND_SOC_FSL_AUDMIX is not set
++# CONFIG_SND_SOC_FSL_ESAI is not set
++# CONFIG_SND_SOC_FSL_MICFIL is not set
++# CONFIG_SND_SOC_FSL_SAI is not set
++# CONFIG_SND_SOC_FSL_SPDIF is not set
++# CONFIG_SND_SOC_FSL_SSI is not set
++# CONFIG_SND_SOC_GTM601 is not set
++# CONFIG_SND_SOC_ICS43432 is not set
++# CONFIG_SND_SOC_IMG is not set
++# CONFIG_SND_SOC_IMX_AUDMIX is not set
++# CONFIG_SND_SOC_IMX_AUDMUX is not set
++# CONFIG_SND_SOC_IMX_ES8328 is not set
++# CONFIG_SND_SOC_IMX_SPDIF is not set
++# CONFIG_SND_SOC_IMX_WM8962 is not set
++# CONFIG_SND_SOC_INNO_RK3036 is not set
++# CONFIG_SND_SOC_INTEL_APL is not set
++# CONFIG_SND_SOC_INTEL_BAYTRAIL is not set
++# CONFIG_SND_SOC_INTEL_BDW_RT5677_MACH is not set
++# CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH is not set
++# CONFIG_SND_SOC_INTEL_BXT_RT298_MACH is not set
++# CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH is not set
++# CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH is not set
++# CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH is not set
++# CONFIG_SND_SOC_INTEL_BYT_CHT_ES8316_MACH is not set
++# CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH is not set
++# CONFIG_SND_SOC_INTEL_BYT_MAX98090_MACH is not set
++# CONFIG_SND_SOC_INTEL_BYT_RT5640_MACH is not set
++# CONFIG_SND_SOC_INTEL_CFL is not set
++# CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH is not set
++# CONFIG_SND_SOC_INTEL_CHT_BSW_NAU8824_MACH is not set
++# CONFIG_SND_SOC_INTEL_CHT_BSW_RT5645_MACH is not set
++# CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH is not set
++# CONFIG_SND_SOC_INTEL_CML_H is not set
++# CONFIG_SND_SOC_INTEL_CML_LP is not set
++# CONFIG_SND_SOC_INTEL_CNL is not set
++# CONFIG_SND_SOC_INTEL_GLK is not set
++# CONFIG_SND_SOC_INTEL_HASWELL is not set
++# CONFIG_SND_SOC_INTEL_KBL is not set
++# CONFIG_SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH is not set
++# CONFIG_SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH is not set
++# CONFIG_SND_SOC_INTEL_SKL is not set
++# CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH is not set
++# CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH is not set
++# CONFIG_SND_SOC_INTEL_SKL_RT286_MACH is not set
++# CONFIG_SND_SOC_INTEL_SKYLAKE is not set
++# CONFIG_SND_SOC_INTEL_SST is not set
++CONFIG_SND_SOC_INTEL_SST_TOPLEVEL=y
++# CONFIG_SND_SOC_JZ4725B_CODEC is not set
++# CONFIG_SND_SOC_JZ4740_CODEC is not set
++# CONFIG_SND_SOC_MA120X0P is not set
++# CONFIG_SND_SOC_MAX9759 is not set
++# CONFIG_SND_SOC_MAX98088 is not set
++# CONFIG_SND_SOC_MAX98357A is not set
++# CONFIG_SND_SOC_MAX98373 is not set
++# CONFIG_SND_SOC_MAX98504 is not set
++# CONFIG_SND_SOC_MAX9860 is not set
++# CONFIG_SND_SOC_MAX9867 is not set
++# CONFIG_SND_SOC_MAX98927 is not set
++# CONFIG_SND_SOC_MEDIATEK is not set
++# CONFIG_SND_SOC_MPC5200_AC97 is not set
++# CONFIG_SND_SOC_MPC5200_I2S is not set
++# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
++# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
++# CONFIG_SND_SOC_MT2701 is not set
++# CONFIG_SND_SOC_MT6351 is not set
++# CONFIG_SND_SOC_MT6358 is not set
++# CONFIG_SND_SOC_MT8173 is not set
++# CONFIG_SND_SOC_MTK_BTCVSD is not set
++# CONFIG_SND_SOC_NAU8540 is not set
++# CONFIG_SND_SOC_NAU8810 is not set
++# CONFIG_SND_SOC_NAU8822 is not set
++# CONFIG_SND_SOC_NAU8824 is not set
++# CONFIG_SND_SOC_PCM1681 is not set
++# CONFIG_SND_SOC_PCM1789_I2C is not set
++# CONFIG_SND_SOC_PCM1792A is not set
++# CONFIG_SND_SOC_PCM179X_I2C is not set
++# CONFIG_SND_SOC_PCM179X_SPI is not set
++# CONFIG_SND_SOC_PCM186X_I2C is not set
++# CONFIG_SND_SOC_PCM186X_SPI is not set
++# CONFIG_SND_SOC_PCM3060_I2C is not set
++# CONFIG_SND_SOC_PCM3060_SPI is not set
++# CONFIG_SND_SOC_PCM3168A_I2C is not set
++# CONFIG_SND_SOC_PCM3168A_SPI is not set
++# CONFIG_SND_SOC_PCM512x_I2C is not set
++# CONFIG_SND_SOC_PCM512x_SPI is not set
++# CONFIG_SND_SOC_QCOM is not set
++# CONFIG_SND_SOC_RK3328 is not set
++# CONFIG_SND_SOC_RT5616 is not set
++# CONFIG_SND_SOC_RT5631 is not set
++# CONFIG_SND_SOC_RT5677_SPI is not set
++# CONFIG_SND_SOC_SGTL5000 is not set
++# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set
++# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set
++# CONFIG_SND_SOC_SOF_TOPLEVEL is not set
++# CONFIG_SND_SOC_SPDIF is not set
++# CONFIG_SND_SOC_SSM2305 is not set
++# CONFIG_SND_SOC_SSM2602_I2C is not set
++# CONFIG_SND_SOC_SSM2602_SPI is not set
++# CONFIG_SND_SOC_SSM4567 is not set
++# CONFIG_SND_SOC_STA32X is not set
++# CONFIG_SND_SOC_STA350 is not set
++# CONFIG_SND_SOC_STI_SAS is not set
++# CONFIG_SND_SOC_TAS2552 is not set
++# CONFIG_SND_SOC_TAS5086 is not set
++# CONFIG_SND_SOC_TAS571X is not set
++# CONFIG_SND_SOC_TAS5720 is not set
++# CONFIG_SND_SOC_TAS6424 is not set
++# CONFIG_SND_SOC_TDA7419 is not set
++# CONFIG_SND_SOC_TFA9879 is not set
++# CONFIG_SND_SOC_TLV320AIC23_I2C is not set
++# CONFIG_SND_SOC_TLV320AIC23_SPI is not set
++# CONFIG_SND_SOC_TLV320AIC31XX is not set
++# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set
++# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set
++# CONFIG_SND_SOC_TLV320AIC3X is not set
++# CONFIG_SND_SOC_TPA6130A2 is not set
++# CONFIG_SND_SOC_TS3A227E is not set
++# CONFIG_SND_SOC_TSCS42XX is not set
++# CONFIG_SND_SOC_TSCS454 is not set
++# CONFIG_SND_SOC_UDA1334 is not set
++# CONFIG_SND_SOC_WM8510 is not set
++# CONFIG_SND_SOC_WM8523 is not set
++# CONFIG_SND_SOC_WM8524 is not set
++# CONFIG_SND_SOC_WM8580 is not set
++# CONFIG_SND_SOC_WM8711 is not set
++# CONFIG_SND_SOC_WM8728 is not set
++# CONFIG_SND_SOC_WM8731 is not set
++# CONFIG_SND_SOC_WM8737 is not set
++# CONFIG_SND_SOC_WM8741 is not set
++# CONFIG_SND_SOC_WM8750 is not set
++# CONFIG_SND_SOC_WM8753 is not set
++# CONFIG_SND_SOC_WM8770 is not set
++# CONFIG_SND_SOC_WM8776 is not set
++# CONFIG_SND_SOC_WM8782 is not set
++# CONFIG_SND_SOC_WM8804_I2C is not set
++# CONFIG_SND_SOC_WM8804_SPI is not set
++# CONFIG_SND_SOC_WM8903 is not set
++# CONFIG_SND_SOC_WM8904 is not set
++# CONFIG_SND_SOC_WM8960 is not set
++# CONFIG_SND_SOC_WM8962 is not set
++# CONFIG_SND_SOC_WM8974 is not set
++# CONFIG_SND_SOC_WM8978 is not set
++# CONFIG_SND_SOC_WM8985 is not set
++# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set
++# CONFIG_SND_SOC_XILINX_I2S is not set
++# CONFIG_SND_SOC_XILINX_SPDIF is not set
++# CONFIG_SND_SOC_XTFPGA_I2S is not set
++# CONFIG_SND_SOC_ZX_AUD96P22 is not set
++# CONFIG_SND_SONICVIBES is not set
++# CONFIG_SND_SPI is not set
++# CONFIG_SND_SSCAPE is not set
++# CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_ACPI is not set
++# CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_PCI is not set
++# CONFIG_SND_SUN4I_CODEC is not set
++# CONFIG_SND_SUPPORT_OLD_API is not set
++# CONFIG_SND_TIMER is not set
++# CONFIG_SND_TRIDENT is not set
++CONFIG_SND_USB=y
++# CONFIG_SND_USB_6FIRE is not set
++# CONFIG_SND_USB_AUDIO is not set
++# CONFIG_SND_USB_CAIAQ is not set
++# CONFIG_SND_USB_HIFACE is not set
++# CONFIG_SND_USB_POD is not set
++# CONFIG_SND_USB_PODHD is not set
++# CONFIG_SND_USB_TONEPORT is not set
++# CONFIG_SND_USB_UA101 is not set
++# CONFIG_SND_USB_US122L is not set
++# CONFIG_SND_USB_USX2Y is not set
++# CONFIG_SND_USB_VARIAX is not set
++# CONFIG_SND_VERBOSE_PRINTK is not set
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VIA82XX is not set
++# CONFIG_SND_VIA82XX_MODEM is not set
++# CONFIG_SND_VIRTUOSO is not set
++# CONFIG_SND_VX222 is not set
++# CONFIG_SND_VXPOCKET is not set
++# CONFIG_SND_WAVEFRONT is not set
++CONFIG_SND_X86=y
++# CONFIG_SND_XEN_FRONTEND is not set
++# CONFIG_SND_YMFPCI is not set
++# CONFIG_SNI_RM is not set
++# CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set
++# CONFIG_SOCK_CGROUP_DATA is not set
++# CONFIG_SOC_AM33XX is not set
++# CONFIG_SOC_AM43XX is not set
++# CONFIG_SOC_BRCMSTB is not set
++# CONFIG_SOC_CAMERA is not set
++# CONFIG_SOC_DRA7XX is not set
++# CONFIG_SOC_HAS_OMAP2_SDRC is not set
++# CONFIG_SOC_OMAP5 is not set
++# CONFIG_SOC_TI is not set
++# CONFIG_SOFTLOCKUP_DETECTOR is not set
++# CONFIG_SOFT_WATCHDOG is not set
++# CONFIG_SOLARIS_X86_PARTITION is not set
++# CONFIG_SONYPI is not set
++# CONFIG_SONY_LAPTOP is not set
++# CONFIG_SOUND is not set
++# CONFIG_SOUNDWIRE is not set
++# CONFIG_SOUND_OSS_CORE is not set
++# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
++# CONFIG_SOUND_PRIME is not set
++# CONFIG_SP5100_TCO is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++# CONFIG_SPARSE_IRQ is not set
++# CONFIG_SPARSE_RCU_POINTER is not set
++# CONFIG_SPEAKUP is not set
++# CONFIG_SPI is not set
++# CONFIG_SPINLOCK_TEST is not set
++# CONFIG_SPI_ALTERA is not set
++# CONFIG_SPI_AU1550 is not set
++# CONFIG_SPI_AXI_SPI_ENGINE is not set
++# CONFIG_SPI_BCM2835 is not set
++# CONFIG_SPI_BCM_QSPI is not set
++# CONFIG_SPI_BITBANG is not set
++# CONFIG_SPI_BUTTERFLY is not set
++# CONFIG_SPI_CADENCE is not set
++# CONFIG_SPI_CADENCE_QUADSPI is not set
++# CONFIG_SPI_DEBUG is not set
++# CONFIG_SPI_DESIGNWARE is not set
++# CONFIG_SPI_FSL_DSPI is not set
++# CONFIG_SPI_FSL_ESPI is not set
++# CONFIG_SPI_FSL_SPI is not set
++# CONFIG_SPI_GPIO is not set
++# CONFIG_SPI_GPIO_OLD is not set
++# CONFIG_SPI_IMG_SPFI is not set
++# CONFIG_SPI_LM70_LLP is not set
++# CONFIG_SPI_LOOPBACK_TEST is not set
++# CONFIG_SPI_MASTER is not set
++# CONFIG_SPI_MEM is not set
++# CONFIG_SPI_MPC52xx is not set
++# CONFIG_SPI_MPC52xx_PSC is not set
++# CONFIG_SPI_MTK_QUADSPI is not set
++# CONFIG_SPI_MXIC is not set
++# CONFIG_SPI_NXP_FLEXSPI is not set
++# CONFIG_SPI_OCTEON is not set
++# CONFIG_SPI_OC_TINY is not set
++# CONFIG_SPI_ORION is not set
++# CONFIG_SPI_PL022 is not set
++# CONFIG_SPI_PPC4xx is not set
++# CONFIG_SPI_PXA2XX is not set
++# CONFIG_SPI_PXA2XX_PCI is not set
++# CONFIG_SPI_QCOM_QSPI is not set
++# CONFIG_SPI_ROCKCHIP is not set
++# CONFIG_SPI_S3C64XX is not set
++# CONFIG_SPI_SC18IS602 is not set
++# CONFIG_SPI_SIFIVE is not set
++# CONFIG_SPI_SLAVE is not set
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_THUNDERX is not set
++# CONFIG_SPI_TI_QSPI is not set
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_SPI_TOPCLIFF_PCH is not set
++# CONFIG_SPI_XCOMM is not set
++# CONFIG_SPI_XILINX is not set
++# CONFIG_SPI_XWAY is not set
++# CONFIG_SPI_ZYNQMP_GQSPI is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_SPMI is not set
++# CONFIG_SPS30 is not set
++CONFIG_SQUASHFS=y
++# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set
++# CONFIG_SQUASHFS_DECOMP_MULTI is not set
++CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
++# CONFIG_SQUASHFS_DECOMP_SINGLE is not set
++CONFIG_SQUASHFS_EMBEDDED=y
++# CONFIG_SQUASHFS_FILE_CACHE is not set
++CONFIG_SQUASHFS_FILE_DIRECT=y
++CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
++# CONFIG_SQUASHFS_LZ4 is not set
++# CONFIG_SQUASHFS_LZO is not set
++# CONFIG_SQUASHFS_XATTR is not set
++CONFIG_SQUASHFS_XZ=y
++# CONFIG_SQUASHFS_ZLIB is not set
++# CONFIG_SQUASHFS_ZSTD is not set
++# CONFIG_SRAM is not set
++# CONFIG_SRF04 is not set
++# CONFIG_SRF08 is not set
++# CONFIG_SSB is not set
++# CONFIG_SSB_DEBUG is not set
++# CONFIG_SSB_DRIVER_GPIO is not set
++# CONFIG_SSB_HOST_SOC is not set
++# CONFIG_SSB_PCMCIAHOST is not set
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB_SDIOHOST is not set
++# CONFIG_SSB_SILENT is not set
++# CONFIG_SSFDC is not set
++# CONFIG_STACKPROTECTOR is not set
++# CONFIG_STACKPROTECTOR_STRONG is not set
++# CONFIG_STACKTRACE is not set
++CONFIG_STACKTRACE_SUPPORT=y
++# CONFIG_STACK_TRACER is not set
++# CONFIG_STACK_VALIDATION is not set
++CONFIG_STAGING=y
++# CONFIG_STAGING_BOARD is not set
++# CONFIG_STAGING_GASKET_FRAMEWORK is not set
++# CONFIG_STAGING_MEDIA is not set
++CONFIG_STANDALONE=y
++# CONFIG_STATIC_KEYS_SELFTEST is not set
++# CONFIG_STATIC_USERMODEHELPER is not set
++CONFIG_STDBINUTILS=y
++# CONFIG_STE10XP is not set
++# CONFIG_STE_MODEM_RPROC is not set
++# CONFIG_STK3310 is not set
++# CONFIG_STK8312 is not set
++# CONFIG_STK8BA50 is not set
++# CONFIG_STM is not set
++# CONFIG_STMMAC_ETH is not set
++# CONFIG_STMMAC_PCI is not set
++# CONFIG_STMMAC_PLATFORM is not set
++# CONFIG_STM_DUMMY is not set
++# CONFIG_STM_SOURCE_CONSOLE is not set
++CONFIG_STP=y
++# CONFIG_STREAM_PARSER is not set
++# CONFIG_STRICT_DEVMEM is not set
++CONFIG_STRICT_KERNEL_RWX=y
++CONFIG_STRICT_MODULE_RWX=y
++# CONFIG_STRING_SELFTEST is not set
++CONFIG_STRIP_ASM_SYMS=y
++# CONFIG_STX104 is not set
++# CONFIG_ST_UVIS25 is not set
++# CONFIG_SUN4I_GPADC is not set
++# CONFIG_SUN50I_DE2_BUS is not set
++# CONFIG_SUN50I_ERRATUM_UNKNOWN1 is not set
++# CONFIG_SUNDANCE is not set
++# CONFIG_SUNGEM is not set
++# CONFIG_SUNRPC is not set
++# CONFIG_SUNRPC_DEBUG is not set
++CONFIG_SUNRPC_DISABLE_INSECURE_ENCTYPES=y
++# CONFIG_SUNRPC_GSS is not set
++# CONFIG_SUNXI_SRAM is not set
++# CONFIG_SUN_PARTITION is not set
++# CONFIG_SURFACE_3_BUTTON is not set
++# CONFIG_SUSPEND is not set
++# CONFIG_SUSPEND_SKIP_SYNC is not set
++CONFIG_SWAP=y
++# CONFIG_SWCONFIG is not set
++# CONFIG_SWCONFIG_B53 is not set
++# CONFIG_SWCONFIG_B53_MDIO_DRIVER is not set
++# CONFIG_SWCONFIG_B53_MMAP_DRIVER is not set
++# CONFIG_SWCONFIG_B53_SPI_DRIVER is not set
++# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set
++# CONFIG_SWCONFIG_LEDS is not set
++# CONFIG_SW_SYNC is not set
++# CONFIG_SX9500 is not set
++# CONFIG_SXGBE_ETH is not set
++# CONFIG_SYNCLINK_CS is not set
++# CONFIG_SYNC_FILE is not set
++# CONFIG_SYNOPSYS_DWC_ETH_QOS is not set
++CONFIG_SYN_COOKIES=y
++# CONFIG_SYSCON_REBOOT_MODE is not set
++CONFIG_SYSCTL=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_SYSFS=y
++# CONFIG_SYSFS_DEPRECATED is not set
++# CONFIG_SYSFS_DEPRECATED_V2 is not set
++# CONFIG_SYSFS_SYSCALL is not set
++# CONFIG_SYSTEMPORT is not set
++# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set
++# CONFIG_SYSTEM_DATA_VERIFICATION is not set
++# CONFIG_SYSTEM_TRUSTED_KEYRING is not set
++CONFIG_SYSTEM_TRUSTED_KEYS=""
++# CONFIG_SYSV68_PARTITION is not set
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++# CONFIG_SYSV_FS is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_T5403 is not set
++# CONFIG_TARGET_CORE is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_TASKS_RCU is not set
++# CONFIG_TASK_XACCT is not set
++# CONFIG_TC35815 is not set
++# CONFIG_TCG_ATMEL is not set
++# CONFIG_TCG_CRB is not set
++# CONFIG_TCG_FTPM_TEE is not set
++# CONFIG_TCG_INFINEON is not set
++# CONFIG_TCG_NSC is not set
++# CONFIG_TCG_ST33_I2C is not set
++# CONFIG_TCG_TIS is not set
++# CONFIG_TCG_TIS_I2C_ATMEL is not set
++# CONFIG_TCG_TIS_I2C_INFINEON is not set
++# CONFIG_TCG_TIS_I2C_NUVOTON is not set
++# CONFIG_TCG_TIS_SPI is not set
++# CONFIG_TCG_TIS_ST33ZP24_I2C is not set
++# CONFIG_TCG_TIS_ST33ZP24_SPI is not set
++# CONFIG_TCG_TPM is not set
++# CONFIG_TCG_VTPM_PROXY is not set
++# CONFIG_TCG_XEN is not set
++# CONFIG_TCIC is not set
++CONFIG_TCP_CONG_ADVANCED=y
++# CONFIG_TCP_CONG_BBR is not set
++# CONFIG_TCP_CONG_BIC is not set
++# CONFIG_TCP_CONG_CDG is not set
++CONFIG_TCP_CONG_CUBIC=y
++# CONFIG_TCP_CONG_DCTCP is not set
++# CONFIG_TCP_CONG_HSTCP is not set
++# CONFIG_TCP_CONG_HTCP is not set
++# CONFIG_TCP_CONG_HYBLA is not set
++# CONFIG_TCP_CONG_ILLINOIS is not set
++# CONFIG_TCP_CONG_LP is not set
++# CONFIG_TCP_CONG_NV is not set
++# CONFIG_TCP_CONG_SCALABLE is not set
++# CONFIG_TCP_CONG_VEGAS is not set
++# CONFIG_TCP_CONG_VENO is not set
++# CONFIG_TCP_CONG_WESTWOOD is not set
++# CONFIG_TCP_CONG_YEAH is not set
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_TCS3414 is not set
++# CONFIG_TCS3472 is not set
++# CONFIG_TEE is not set
++# CONFIG_TEGRA_AHB is not set
++# CONFIG_TEGRA_HOST1X is not set
++# CONFIG_TEHUTI is not set
++# CONFIG_TERANETICS_PHY is not set
++# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set
++# CONFIG_TEST_BITFIELD is not set
++# CONFIG_TEST_BITMAP is not set
++# CONFIG_TEST_BLACKHOLE_DEV is not set
++# CONFIG_TEST_BPF is not set
++# CONFIG_TEST_FIRMWARE is not set
++# CONFIG_TEST_HASH is not set
++# CONFIG_TEST_HEXDUMP is not set
++# CONFIG_TEST_IDA is not set
++# CONFIG_TEST_KMOD is not set
++# CONFIG_TEST_KSTRTOX is not set
++# CONFIG_TEST_LIST_SORT is not set
++# CONFIG_TEST_LKM is not set
++# CONFIG_TEST_MEMCAT_P is not set
++# CONFIG_TEST_MEMINIT is not set
++# CONFIG_TEST_OVERFLOW is not set
++# CONFIG_TEST_POWER is not set
++# CONFIG_TEST_PRINTF is not set
++# CONFIG_TEST_RHASHTABLE is not set
++# CONFIG_TEST_SORT is not set
++# CONFIG_TEST_STACKINIT is not set
++# CONFIG_TEST_STATIC_KEYS is not set
++# CONFIG_TEST_STRING_HELPERS is not set
++# CONFIG_TEST_STRSCPY is not set
++# CONFIG_TEST_SYSCTL is not set
++# CONFIG_TEST_UDELAY is not set
++# CONFIG_TEST_USER_COPY is not set
++# CONFIG_TEST_UUID is not set
++# CONFIG_TEST_VMALLOC is not set
++# CONFIG_TEST_XARRAY is not set
++CONFIG_TEXTSEARCH=y
++# CONFIG_TEXTSEARCH_BM is not set
++# CONFIG_TEXTSEARCH_FSM is not set
++# CONFIG_TEXTSEARCH_KMP is not set
++# CONFIG_THERMAL is not set
++# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set
++# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set
++# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set
++# CONFIG_THERMAL_EMULATION is not set
++# CONFIG_THERMAL_GOV_BANG_BANG is not set
++# CONFIG_THERMAL_GOV_FAIR_SHARE is not set
++# CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set
++# CONFIG_THERMAL_GOV_USER_SPACE is not set
++# CONFIG_THERMAL_HWMON is not set
++# CONFIG_THERMAL_MMIO is not set
++# CONFIG_THERMAL_STATISTICS is not set
++# CONFIG_THERMAL_WRITABLE_TRIPS is not set
++# CONFIG_THINKPAD_ACPI is not set
++CONFIG_THIN_ARCHIVES=y
++# CONFIG_THRUSTMASTER_FF is not set
++# CONFIG_THUMB2_KERNEL is not set
++# CONFIG_THUNDERBOLT is not set
++# CONFIG_THUNDER_NIC_BGX is not set
++# CONFIG_THUNDER_NIC_PF is not set
++# CONFIG_THUNDER_NIC_RGX is not set
++# CONFIG_THUNDER_NIC_VF is not set
++# CONFIG_TICK_CPU_ACCOUNTING is not set
++CONFIG_TICK_ONESHOT=y
++# CONFIG_TIFM_CORE is not set
++# CONFIG_TIGON3 is not set
++# CONFIG_TIMB_DMA is not set
++CONFIG_TIMERFD=y
++# CONFIG_TIMER_STATS is not set
++# CONFIG_TINYDRM_HX8357D is not set
++# CONFIG_TINYDRM_ILI9225 is not set
++# CONFIG_TINYDRM_ILI9341 is not set
++# CONFIG_TINYDRM_MI0283QT is not set
++# CONFIG_TINYDRM_REPAPER is not set
++# CONFIG_TINYDRM_ST7586 is not set
++# CONFIG_TINYDRM_ST7735R is not set
++CONFIG_TINY_RCU=y
++# CONFIG_TIPC is not set
++# CONFIG_TI_ADC081C is not set
++# CONFIG_TI_ADC0832 is not set
++# CONFIG_TI_ADC084S021 is not set
++# CONFIG_TI_ADC108S102 is not set
++# CONFIG_TI_ADC12138 is not set
++# CONFIG_TI_ADC128S052 is not set
++# CONFIG_TI_ADC161S626 is not set
++# CONFIG_TI_ADS1015 is not set
++# CONFIG_TI_ADS124S08 is not set
++# CONFIG_TI_ADS7950 is not set
++# CONFIG_TI_ADS8344 is not set
++# CONFIG_TI_ADS8688 is not set
++# CONFIG_TI_AM335X_ADC is not set
++# CONFIG_TI_CPSW is not set
++# CONFIG_TI_CPSW_ALE is not set
++# CONFIG_TI_CPSW_PHY_SEL is not set
++# CONFIG_TI_CPTS is not set
++# CONFIG_TI_DAC082S085 is not set
++# CONFIG_TI_DAC5571 is not set
++# CONFIG_TI_DAC7311 is not set
++# CONFIG_TI_DAC7512 is not set
++# CONFIG_TI_DAC7612 is not set
++# CONFIG_TI_DAVINCI_CPDMA is not set
++# CONFIG_TI_DAVINCI_MDIO is not set
++# CONFIG_TI_ST is not set
++# CONFIG_TI_SYSCON_RESET is not set
++# CONFIG_TI_TLC4541 is not set
++# CONFIG_TLAN is not set
++# CONFIG_TLS is not set
++# CONFIG_TMD_HERMES is not set
++# CONFIG_TMP006 is not set
++# CONFIG_TMP007 is not set
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++CONFIG_TMPFS_XATTR=y
++# CONFIG_TOPSTAR_LAPTOP is not set
++# CONFIG_TORTURE_TEST is not set
++# CONFIG_TOSHIBA_HAPS is not set
++# CONFIG_TOUCHSCREEN_88PM860X is not set
++# CONFIG_TOUCHSCREEN_AD7877 is not set
++# CONFIG_TOUCHSCREEN_AD7879 is not set
++# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
++# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
++# CONFIG_TOUCHSCREEN_ADC is not set
++# CONFIG_TOUCHSCREEN_ADS7846 is not set
++# CONFIG_TOUCHSCREEN_AR1021_I2C is not set
++# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
++# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set
++# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set
++# CONFIG_TOUCHSCREEN_BU21013 is not set
++# CONFIG_TOUCHSCREEN_BU21029 is not set
++# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set
++# CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set
++# CONFIG_TOUCHSCREEN_COLIBRI_VF50 is not set
++# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
++# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set
++# CONFIG_TOUCHSCREEN_CYTTSP4_I2C is not set
++# CONFIG_TOUCHSCREEN_CYTTSP4_SPI is not set
++# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set
++# CONFIG_TOUCHSCREEN_CYTTSP_I2C is not set
++# CONFIG_TOUCHSCREEN_CYTTSP_SPI is not set
++# CONFIG_TOUCHSCREEN_DA9034 is not set
++# CONFIG_TOUCHSCREEN_DA9052 is not set
++# CONFIG_TOUCHSCREEN_DYNAPRO is not set
++# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set
++# CONFIG_TOUCHSCREEN_EETI is not set
++# CONFIG_TOUCHSCREEN_EGALAX is not set
++# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set
++# CONFIG_TOUCHSCREEN_EKTF2127 is not set
++# CONFIG_TOUCHSCREEN_ELAN is not set
++# CONFIG_TOUCHSCREEN_ELO is not set
++# CONFIG_TOUCHSCREEN_EXC3000 is not set
++# CONFIG_TOUCHSCREEN_FUJITSU is not set
++# CONFIG_TOUCHSCREEN_GOODIX is not set
++# CONFIG_TOUCHSCREEN_GUNZE is not set
++# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
++# CONFIG_TOUCHSCREEN_HIDEEP is not set
++# CONFIG_TOUCHSCREEN_HP600 is not set
++# CONFIG_TOUCHSCREEN_HP7XX is not set
++# CONFIG_TOUCHSCREEN_HTCPEN is not set
++# CONFIG_TOUCHSCREEN_ILI210X is not set
++# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set
++# CONFIG_TOUCHSCREEN_INEXIO is not set
++# CONFIG_TOUCHSCREEN_IPAQ_MICRO is not set
++# CONFIG_TOUCHSCREEN_IPROC is not set
++# CONFIG_TOUCHSCREEN_IQS5XX is not set
++# CONFIG_TOUCHSCREEN_LPC32XX is not set
++# CONFIG_TOUCHSCREEN_MAX11801 is not set
++# CONFIG_TOUCHSCREEN_MC13783 is not set
++# CONFIG_TOUCHSCREEN_MCS5000 is not set
++# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set
++# CONFIG_TOUCHSCREEN_MIGOR is not set
++# CONFIG_TOUCHSCREEN_MK712 is not set
++# CONFIG_TOUCHSCREEN_MMS114 is not set
++# CONFIG_TOUCHSCREEN_MTOUCH is not set
++# CONFIG_TOUCHSCREEN_MX25 is not set
++# CONFIG_TOUCHSCREEN_MXS_LRADC is not set
++# CONFIG_TOUCHSCREEN_PCAP is not set
++# CONFIG_TOUCHSCREEN_PENMOUNT is not set
++# CONFIG_TOUCHSCREEN_PIXCIR is not set
++# CONFIG_TOUCHSCREEN_PROPERTIES is not set
++# CONFIG_TOUCHSCREEN_RASPBERRYPI_FW is not set
++# CONFIG_TOUCHSCREEN_RM_TS is not set
++# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set
++# CONFIG_TOUCHSCREEN_RPI_FT5406 is not set
++# CONFIG_TOUCHSCREEN_S3C2410 is not set
++# CONFIG_TOUCHSCREEN_S6SY761 is not set
++# CONFIG_TOUCHSCREEN_SILEAD is not set
++# CONFIG_TOUCHSCREEN_SIS_I2C is not set
++# CONFIG_TOUCHSCREEN_ST1232 is not set
++# CONFIG_TOUCHSCREEN_STMFTS is not set
++# CONFIG_TOUCHSCREEN_STMPE is not set
++# CONFIG_TOUCHSCREEN_SUN4I is not set
++# CONFIG_TOUCHSCREEN_SUR40 is not set
++# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set
++# CONFIG_TOUCHSCREEN_SX8654 is not set
++# CONFIG_TOUCHSCREEN_TI_AM335X_TSC is not set
++# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
++# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
++# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
++# CONFIG_TOUCHSCREEN_TPS6507X is not set
++# CONFIG_TOUCHSCREEN_TS4800 is not set
++# CONFIG_TOUCHSCREEN_TSC2004 is not set
++# CONFIG_TOUCHSCREEN_TSC2005 is not set
++# CONFIG_TOUCHSCREEN_TSC2007 is not set
++# CONFIG_TOUCHSCREEN_TSC2007_IIO is not set
++# CONFIG_TOUCHSCREEN_TSC200X_CORE is not set
++# CONFIG_TOUCHSCREEN_TSC_SERIO is not set
++# CONFIG_TOUCHSCREEN_UCB1400 is not set
++# CONFIG_TOUCHSCREEN_USB_3M is not set
++# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
++# CONFIG_TOUCHSCREEN_USB_DMC_TSC10 is not set
++# CONFIG_TOUCHSCREEN_USB_E2I is not set
++# CONFIG_TOUCHSCREEN_USB_EASYTOUCH is not set
++# CONFIG_TOUCHSCREEN_USB_EGALAX is not set
++# CONFIG_TOUCHSCREEN_USB_ELO is not set
++# CONFIG_TOUCHSCREEN_USB_ETT_TC45USB is not set
++# CONFIG_TOUCHSCREEN_USB_ETURBO is not set
++# CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH is not set
++# CONFIG_TOUCHSCREEN_USB_GOTOP is not set
++# CONFIG_TOUCHSCREEN_USB_GUNZE is not set
++# CONFIG_TOUCHSCREEN_USB_IDEALTEK is not set
++# CONFIG_TOUCHSCREEN_USB_IRTOUCH is not set
++# CONFIG_TOUCHSCREEN_USB_ITM is not set
++# CONFIG_TOUCHSCREEN_USB_JASTEC is not set
++# CONFIG_TOUCHSCREEN_USB_NEXIO is not set
++# CONFIG_TOUCHSCREEN_USB_PANJIT is not set
++# CONFIG_TOUCHSCREEN_USB_ZYTRONIC is not set
++# CONFIG_TOUCHSCREEN_W90X900 is not set
++# CONFIG_TOUCHSCREEN_WACOM_I2C is not set
++# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
++# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set
++# CONFIG_TOUCHSCREEN_WM831X is not set
++# CONFIG_TOUCHSCREEN_WM9705 is not set
++# CONFIG_TOUCHSCREEN_WM9712 is not set
++# CONFIG_TOUCHSCREEN_WM9713 is not set
++# CONFIG_TOUCHSCREEN_WM97XX is not set
++# CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set
++# CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE is not set
++# CONFIG_TOUCHSCREEN_ZET6223 is not set
++# CONFIG_TOUCHSCREEN_ZFORCE is not set
++# CONFIG_TPL0102 is not set
++# CONFIG_TPS6105X is not set
++# CONFIG_TPS65010 is not set
++# CONFIG_TPS6507X is not set
++# CONFIG_TRACEPOINT_BENCHMARK is not set
++# CONFIG_TRACER_SNAPSHOT is not set
++# CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP is not set
++# CONFIG_TRACE_BRANCH_PROFILING is not set
++# CONFIG_TRACE_EVAL_MAP_FILE is not set
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++# CONFIG_TRACE_SINK is not set
++# CONFIG_TRACING_EVENTS_GPIO is not set
++CONFIG_TRACING_SUPPORT=y
++CONFIG_TRAD_SIGNALS=y
++# CONFIG_TRANSPARENT_HUGEPAGE is not set
++# CONFIG_TREE_RCU is not set
++# CONFIG_TREE_RCU_TRACE is not set
++# CONFIG_TRIM_UNUSED_KSYMS is not set
++# CONFIG_TRUSTED_FOUNDATIONS is not set
++# CONFIG_TRUSTED_KEYS is not set
++# CONFIG_TSL2583 is not set
++# CONFIG_TSL2772 is not set
++# CONFIG_TSL2x7x is not set
++# CONFIG_TSL4531 is not set
++# CONFIG_TSYS01 is not set
++# CONFIG_TSYS02D is not set
++# CONFIG_TTPCI_EEPROM is not set
++CONFIG_TTY=y
++# CONFIG_TTY_PRINTK is not set
++# CONFIG_TUN is not set
++# CONFIG_TUN_VNET_CROSS_LE is not set
++# CONFIG_TWL4030_CORE is not set
++# CONFIG_TWL4030_MADC is not set
++# CONFIG_TWL6030_GPADC is not set
++# CONFIG_TWL6040_CORE is not set
++# CONFIG_TYPEC is not set
++# CONFIG_TYPEC_TCPM is not set
++# CONFIG_TYPEC_UCSI is not set
++# CONFIG_TYPHOON is not set
++# CONFIG_UACCESS_WITH_MEMCPY is not set
++# CONFIG_UBIFS_ATIME_SUPPORT is not set
++# CONFIG_UBIFS_FS_AUTHENTICATION is not set
++# CONFIG_UBIFS_FS_ENCRYPTION is not set
++# CONFIG_UBIFS_FS_SECURITY is not set
++# CONFIG_UBIFS_FS_ZLIB is not set
++# CONFIG_UBIFS_FS_ZSTD is not set
++CONFIG_UBIFS_FS_XATTR=y
++# CONFIG_UBSAN is not set
++CONFIG_UBSAN_ALIGNMENT=y
++# CONFIG_UCB1400_CORE is not set
++# CONFIG_UCSI is not set
++# CONFIG_UDF_FS is not set
++# CONFIG_UDMABUF is not set
++CONFIG_UEVENT_HELPER=y
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++# CONFIG_UFS_FS is not set
++# CONFIG_UHID is not set
++CONFIG_UID16=y
++# CONFIG_UIO is not set
++# CONFIG_ULTRA is not set
++# CONFIG_ULTRIX_PARTITION is not set
++# CONFIG_UNICODE is not set
++# CONFIG_UNISYSSPAR is not set
++# CONFIG_UNISYS_VISORBUS is not set
++CONFIG_UNIX=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_UNIXWARE_DISKLABEL is not set
++# CONFIG_UNIX_DIAG is not set
++CONFIG_UNIX_SCM=y
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_UNWINDER_FRAME_POINTER is not set
++# CONFIG_UPROBES is not set
++# CONFIG_UPROBE_EVENTS is not set
++# CONFIG_US5182D is not set
++# CONFIG_USB is not set
++# CONFIG_USBIP_CORE is not set
++CONFIG_USBIP_VHCI_HC_PORTS=8
++CONFIG_USBIP_VHCI_NR_HCS=1
++# CONFIG_USBIP_VUDC is not set
++# CONFIG_USBPCWATCHDOG is not set
++# CONFIG_USB_ACM is not set
++# CONFIG_USB_ADUTUX is not set
++CONFIG_USB_ALI_M5632=y
++# CONFIG_USB_AMD5536UDC is not set
++CONFIG_USB_AN2720=y
++# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
++# CONFIG_USB_APPLEDISPLAY is not set
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARMLINUX=y
++# CONFIG_USB_ATM is not set
++CONFIG_USB_AUTOSUSPEND_DELAY=2
++# CONFIG_USB_BDC_UDC is not set
++CONFIG_USB_BELKIN=y
++# CONFIG_USB_C67X00_HCD is not set
++# CONFIG_USB_CATC is not set
++# CONFIG_USB_CDC_COMPOSITE is not set
++# CONFIG_USB_CDNS3 is not set
++# CONFIG_USB_CHAOSKEY is not set
++# CONFIG_USB_CHIPIDEA is not set
++# CONFIG_USB_CONFIGFS is not set
++# CONFIG_USB_CONN_GPIO is not set
++# CONFIG_USB_CXACRU is not set
++# CONFIG_USB_CYPRESS_CY7C63 is not set
++# CONFIG_USB_CYTHERM is not set
++CONFIG_USB_DEFAULT_PERSIST=y
++# CONFIG_USB_DSBR is not set
++# CONFIG_USB_DUMMY_HCD is not set
++# CONFIG_USB_DWC2 is not set
++# CONFIG_USB_DWC2_DEBUG is not set
++# CONFIG_USB_DWC2_DUAL_ROLE is not set
++# CONFIG_USB_DWC2_HOST is not set
++# CONFIG_USB_DWC2_PERIPHERAL is not set
++# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set
++# CONFIG_USB_DWC3 is not set
++# CONFIG_USB_DWC3_EXYNOS is not set
++# CONFIG_USB_DWC3_HAPS is not set
++# CONFIG_USB_DWC3_KEYSTONE is not set
++# CONFIG_USB_DWC3_OF_SIMPLE is not set
++# CONFIG_USB_DWC3_PCI is not set
++# CONFIG_USB_DWC3_QCOM is not set
++# CONFIG_USB_DWC3_ULPI is not set
++# CONFIG_USB_DYNAMIC_MINORS is not set
++# CONFIG_USB_EG20T is not set
++# CONFIG_USB_EHCI_ATH79 is not set
++# CONFIG_USB_EHCI_FSL is not set
++# CONFIG_USB_EHCI_HCD is not set
++# CONFIG_USB_EHCI_HCD_AT91 is not set
++# CONFIG_USB_EHCI_HCD_OMAP is not set
++# CONFIG_USB_EHCI_HCD_PPC_OF is not set
++# CONFIG_USB_EHCI_MSM is not set
++# CONFIG_USB_EHCI_MV is not set
++CONFIG_USB_EHCI_ROOT_HUB_TT=y
++CONFIG_USB_EHCI_TT_NEWSCHED=y
++# CONFIG_USB_EHSET_TEST_FIXTURE is not set
++# CONFIG_USB_EMI26 is not set
++# CONFIG_USB_EMI62 is not set
++# CONFIG_USB_EPSON2888 is not set
++# CONFIG_USB_EZUSB_FX2 is not set
++# CONFIG_USB_FOTG210_HCD is not set
++# CONFIG_USB_FOTG210_UDC is not set
++# CONFIG_USB_FSL_USB2 is not set
++# CONFIG_USB_FTDI_ELAN is not set
++# CONFIG_USB_FUNCTIONFS is not set
++# CONFIG_USB_FUSB300 is not set
++# CONFIG_USB_GADGET is not set
++# CONFIG_USB_GADGETFS is not set
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++# CONFIG_USB_GADGET_DEBUG_FS is not set
++CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
++CONFIG_USB_GADGET_VBUS_DRAW=2
++# CONFIG_USB_GADGET_XILINX is not set
++# CONFIG_USB_GL860 is not set
++# CONFIG_USB_GOKU is not set
++# CONFIG_USB_GPIO_VBUS is not set
++# CONFIG_USB_GR_UDC is not set
++# CONFIG_USB_GSPCA is not set
++# CONFIG_USB_GSPCA_BENQ is not set
++# CONFIG_USB_GSPCA_CONEX is not set
++# CONFIG_USB_GSPCA_CPIA1 is not set
++# CONFIG_USB_GSPCA_DTCS033 is not set
++# CONFIG_USB_GSPCA_ETOMS is not set
++# CONFIG_USB_GSPCA_FINEPIX is not set
++# CONFIG_USB_GSPCA_JEILINJ is not set
++# CONFIG_USB_GSPCA_JL2005BCD is not set
++# CONFIG_USB_GSPCA_KINECT is not set
++# CONFIG_USB_GSPCA_KONICA is not set
++# CONFIG_USB_GSPCA_MARS is not set
++# CONFIG_USB_GSPCA_MR97310A is not set
++# CONFIG_USB_GSPCA_NW80X is not set
++# CONFIG_USB_GSPCA_OV519 is not set
++# CONFIG_USB_GSPCA_OV534 is not set
++# CONFIG_USB_GSPCA_OV534_9 is not set
++# CONFIG_USB_GSPCA_PAC207 is not set
++# CONFIG_USB_GSPCA_PAC7302 is not set
++# CONFIG_USB_GSPCA_PAC7311 is not set
++# CONFIG_USB_GSPCA_SE401 is not set
++# CONFIG_USB_GSPCA_SN9C2028 is not set
++# CONFIG_USB_GSPCA_SN9C20X is not set
++# CONFIG_USB_GSPCA_SONIXB is not set
++# CONFIG_USB_GSPCA_SONIXJ is not set
++# CONFIG_USB_GSPCA_SPCA1528 is not set
++# CONFIG_USB_GSPCA_SPCA500 is not set
++# CONFIG_USB_GSPCA_SPCA501 is not set
++# CONFIG_USB_GSPCA_SPCA505 is not set
++# CONFIG_USB_GSPCA_SPCA506 is not set
++# CONFIG_USB_GSPCA_SPCA508 is not set
++# CONFIG_USB_GSPCA_SPCA561 is not set
++# CONFIG_USB_GSPCA_SQ905 is not set
++# CONFIG_USB_GSPCA_SQ905C is not set
++# CONFIG_USB_GSPCA_SQ930X is not set
++# CONFIG_USB_GSPCA_STK014 is not set
++# CONFIG_USB_GSPCA_STK1135 is not set
++# CONFIG_USB_GSPCA_STV0680 is not set
++# CONFIG_USB_GSPCA_SUNPLUS is not set
++# CONFIG_USB_GSPCA_T613 is not set
++# CONFIG_USB_GSPCA_TOPRO is not set
++# CONFIG_USB_GSPCA_TOUPTEK is not set
++# CONFIG_USB_GSPCA_TV8532 is not set
++# CONFIG_USB_GSPCA_VC032X is not set
++# CONFIG_USB_GSPCA_VICAM is not set
++# CONFIG_USB_GSPCA_XIRLINK_CIT is not set
++# CONFIG_USB_GSPCA_ZC3XX is not set
++# CONFIG_USB_G_ACM_MS is not set
++# CONFIG_USB_G_DBGP is not set
++# CONFIG_USB_G_HID is not set
++# CONFIG_USB_G_MULTI is not set
++# CONFIG_USB_G_NCM is not set
++# CONFIG_USB_G_NOKIA is not set
++# CONFIG_USB_G_PRINTER is not set
++# CONFIG_USB_G_SERIAL is not set
++# CONFIG_USB_G_WEBCAM is not set
++# CONFIG_USB_HCD_TEST_MODE is not set
++# CONFIG_USB_HID is not set
++# CONFIG_USB_HIDDEV is not set
++# CONFIG_USB_HSIC_USB3503 is not set
++# CONFIG_USB_HSIC_USB4604 is not set
++# CONFIG_USB_HSO is not set
++# CONFIG_USB_HUB_USB251XB is not set
++# CONFIG_USB_HWA_HCD is not set
++# CONFIG_USB_IDMOUSE is not set
++# CONFIG_USB_IMX21_HCD is not set
++# CONFIG_USB_IOWARRIOR is not set
++# CONFIG_USB_IPHETH is not set
++# CONFIG_USB_ISIGHTFW is not set
++# CONFIG_USB_ISP116X_HCD is not set
++# CONFIG_USB_ISP1301 is not set
++# CONFIG_USB_ISP1362_HCD is not set
++# CONFIG_USB_ISP1760 is not set
++# CONFIG_USB_ISP1760_HCD is not set
++# CONFIG_USB_KAWETH is not set
++# CONFIG_USB_KBD is not set
++# CONFIG_USB_KC2190 is not set
++# CONFIG_USB_LAN78XX is not set
++# CONFIG_USB_LCD is not set
++# CONFIG_USB_LD is not set
++# CONFIG_USB_LED is not set
++# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set
++# CONFIG_USB_LED_TRIG is not set
++# CONFIG_USB_LEGOTOWER is not set
++# CONFIG_USB_LINK_LAYER_TEST is not set
++# CONFIG_USB_M5602 is not set
++# CONFIG_USB_M66592 is not set
++# CONFIG_USB_MASS_STORAGE is not set
++# CONFIG_USB_MAX3421_HCD is not set
++# CONFIG_USB_MDC800 is not set
++# CONFIG_USB_MICROTEK is not set
++# CONFIG_USB_MIDI_GADGET is not set
++# CONFIG_USB_MON is not set
++# CONFIG_USB_MOUSE is not set
++# CONFIG_USB_MSM_OTG is not set
++# CONFIG_USB_MTU3 is not set
++# CONFIG_USB_MUSB_HDRC is not set
++# CONFIG_USB_MV_U3D is not set
++# CONFIG_USB_MV_UDC is not set
++# CONFIG_USB_MXS_PHY is not set
++# CONFIG_USB_NET2272 is not set
++# CONFIG_USB_NET2280 is not set
++# CONFIG_USB_NET_AQC111 is not set
++# CONFIG_USB_NET_AX88179_178A is not set
++# CONFIG_USB_NET_AX8817X is not set
++# CONFIG_USB_NET_CDCETHER is not set
++# CONFIG_USB_NET_CDC_EEM is not set
++# CONFIG_USB_NET_CDC_MBIM is not set
++# CONFIG_USB_NET_CDC_NCM is not set
++# CONFIG_USB_NET_CDC_SUBSET is not set
++# CONFIG_USB_NET_CH9200 is not set
++# CONFIG_USB_NET_CX82310_ETH is not set
++# CONFIG_USB_NET_DM9601 is not set
++# CONFIG_USB_NET_DRIVERS is not set
++# CONFIG_USB_NET_GL620A is not set
++# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set
++# CONFIG_USB_NET_INT51X1 is not set
++# CONFIG_USB_NET_KALMIA is not set
++# CONFIG_USB_NET_MCS7830 is not set
++# CONFIG_USB_NET_NET1080 is not set
++# CONFIG_USB_NET_PLUSB is not set
++# CONFIG_USB_NET_QMI_WWAN is not set
++# CONFIG_USB_NET_RNDIS_HOST is not set
++# CONFIG_USB_NET_RNDIS_WLAN is not set
++# CONFIG_USB_NET_SMSC75XX is not set
++# CONFIG_USB_NET_SMSC95XX is not set
++# CONFIG_USB_NET_SR9700 is not set
++# CONFIG_USB_NET_SR9800 is not set
++# CONFIG_USB_NET_ZAURUS is not set
++# CONFIG_USB_OHCI_HCD is not set
++# CONFIG_USB_OHCI_HCD_PCI is not set
++# CONFIG_USB_OHCI_HCD_PPC_OF is not set
++# CONFIG_USB_OHCI_HCD_PPC_OF_BE is not set
++# CONFIG_USB_OHCI_HCD_PPC_OF_LE is not set
++# CONFIG_USB_OHCI_HCD_SSB is not set
++CONFIG_USB_OHCI_LITTLE_ENDIAN=y
++# CONFIG_USB_OTG is not set
++# CONFIG_USB_OTG_BLACKLIST_HUB is not set
++# CONFIG_USB_OTG_FSM is not set
++# CONFIG_USB_OTG_WHITELIST is not set
++# CONFIG_USB_OXU210HP_HCD is not set
++# CONFIG_USB_PCI is not set
++# CONFIG_USB_PEGASUS is not set
++# CONFIG_USB_PHY is not set
++# CONFIG_USB_PRINTER is not set
++# CONFIG_USB_PWC_INPUT_EVDEV is not set
++# CONFIG_USB_PXA27X is not set
++# CONFIG_USB_R8A66597 is not set
++# CONFIG_USB_R8A66597_HCD is not set
++# CONFIG_USB_RCAR_PHY is not set
++# CONFIG_USB_RENESAS_USBHS is not set
++# CONFIG_USB_RIO500 is not set
++# CONFIG_USB_ROLE_SWITCH is not set
++# CONFIG_USB_RTL8150 is not set
++# CONFIG_USB_RTL8152 is not set
++# CONFIG_USB_S2255 is not set
++# CONFIG_USB_SERIAL is not set
++# CONFIG_USB_SERIAL_AIRCABLE is not set
++# CONFIG_USB_SERIAL_ARK3116 is not set
++# CONFIG_USB_SERIAL_BELKIN is not set
++# CONFIG_USB_SERIAL_CH341 is not set
++# CONFIG_USB_SERIAL_CP210X is not set
++# CONFIG_USB_SERIAL_CYBERJACK is not set
++# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
++# CONFIG_USB_SERIAL_DEBUG is not set
++# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
++# CONFIG_USB_SERIAL_EDGEPORT is not set
++# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
++# CONFIG_USB_SERIAL_EMPEG is not set
++# CONFIG_USB_SERIAL_F81232 is not set
++# CONFIG_USB_SERIAL_F8153X is not set
++# CONFIG_USB_SERIAL_FTDI_SIO is not set
++# CONFIG_USB_SERIAL_GARMIN is not set
++CONFIG_USB_SERIAL_GENERIC=y
++# CONFIG_USB_SERIAL_IPAQ is not set
++# CONFIG_USB_SERIAL_IPW is not set
++# CONFIG_USB_SERIAL_IR is not set
++# CONFIG_USB_SERIAL_IUU is not set
++# CONFIG_USB_SERIAL_KEYSPAN is not set
++CONFIG_USB_SERIAL_KEYSPAN_MPR=y
++# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
++CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
++CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
++CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
++# CONFIG_USB_SERIAL_KLSI is not set
++# CONFIG_USB_SERIAL_KOBIL_SCT is not set
++# CONFIG_USB_SERIAL_MCT_U232 is not set
++# CONFIG_USB_SERIAL_METRO is not set
++# CONFIG_USB_SERIAL_MOS7715_PARPORT is not set
++# CONFIG_USB_SERIAL_MOS7720 is not set
++# CONFIG_USB_SERIAL_MOS7840 is not set
++# CONFIG_USB_SERIAL_MXUPORT is not set
++# CONFIG_USB_SERIAL_NAVMAN is not set
++# CONFIG_USB_SERIAL_OMNINET is not set
++# CONFIG_USB_SERIAL_OPTICON is not set
++# CONFIG_USB_SERIAL_OPTION is not set
++# CONFIG_USB_SERIAL_OTI6858 is not set
++# CONFIG_USB_SERIAL_PL2303 is not set
++# CONFIG_USB_SERIAL_QCAUX is not set
++# CONFIG_USB_SERIAL_QT2 is not set
++# CONFIG_USB_SERIAL_QUALCOMM is not set
++# CONFIG_USB_SERIAL_SAFE is not set
++CONFIG_USB_SERIAL_SAFE_PADDED=y
++# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
++# CONFIG_USB_SERIAL_SIMPLE is not set
++# CONFIG_USB_SERIAL_SPCP8X5 is not set
++# CONFIG_USB_SERIAL_SSU100 is not set
++# CONFIG_USB_SERIAL_SYMBOL is not set
++# CONFIG_USB_SERIAL_TI is not set
++# CONFIG_USB_SERIAL_UPD78F0730 is not set
++# CONFIG_USB_SERIAL_VISOR is not set
++# CONFIG_USB_SERIAL_WHITEHEAT is not set
++# CONFIG_USB_SERIAL_WISHBONE is not set
++# CONFIG_USB_SERIAL_XIRCOM is not set
++# CONFIG_USB_SERIAL_XSENS_MT is not set
++# CONFIG_USB_SEVSEG is not set
++# CONFIG_USB_SIERRA_NET is not set
++# CONFIG_USB_SISUSBVGA is not set
++# CONFIG_USB_SL811_HCD is not set
++# CONFIG_USB_SNP_UDC_PLAT is not set
++# CONFIG_USB_SPEEDTOUCH is not set
++# CONFIG_USB_STKWEBCAM is not set
++# CONFIG_USB_STORAGE is not set
++# CONFIG_USB_STORAGE_ALAUDA is not set
++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
++# CONFIG_USB_STORAGE_DATAFAB is not set
++# CONFIG_USB_STORAGE_DEBUG is not set
++# CONFIG_USB_STORAGE_ENE_UB6250 is not set
++# CONFIG_USB_STORAGE_FREECOM is not set
++# CONFIG_USB_STORAGE_ISD200 is not set
++# CONFIG_USB_STORAGE_JUMPSHOT is not set
++# CONFIG_USB_STORAGE_KARMA is not set
++# CONFIG_USB_STORAGE_ONETOUCH is not set
++# CONFIG_USB_STORAGE_REALTEK is not set
++# CONFIG_USB_STORAGE_SDDR09 is not set
++# CONFIG_USB_STORAGE_SDDR55 is not set
++# CONFIG_USB_STORAGE_USBAT is not set
++# CONFIG_USB_STV06XX is not set
++# CONFIG_USB_SUPPORT is not set
++# CONFIG_USB_SWITCH_FSA9480 is not set
++# CONFIG_USB_TEST is not set
++# CONFIG_USB_TMC is not set
++# CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_UAS is not set
++# CONFIG_USB_UEAGLEATM is not set
++# CONFIG_USB_ULPI is not set
++# CONFIG_USB_ULPI_BUS is not set
++# CONFIG_USB_USBNET is not set
++# CONFIG_USB_USS720 is not set
++# CONFIG_USB_VIDEO_CLASS is not set
++CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
++# CONFIG_USB_VL600 is not set
++# CONFIG_USB_WDM is not set
++# CONFIG_USB_WHCI_HCD is not set
++# CONFIG_USB_WUSB is not set
++# CONFIG_USB_WUSB_CBAF is not set
++# CONFIG_USB_XHCI_DBGCAP is not set
++# CONFIG_USB_XHCI_HCD is not set
++# CONFIG_USB_XHCI_MVEBU is not set
++# CONFIG_USB_XUSBATM is not set
++# CONFIG_USB_YUREX is not set
++# CONFIG_USB_ZD1201 is not set
++# CONFIG_USB_ZERO is not set
++# CONFIG_USB_ZR364XX is not set
++# CONFIG_USELIB is not set
++# CONFIG_USERFAULTFD is not set
++# CONFIG_USE_OF is not set
++# CONFIG_UTS_NS is not set
++# CONFIG_UWB is not set
++# CONFIG_U_SERIAL_CONSOLE is not set
++# CONFIG_V4L_MEM2MEM_DRIVERS is not set
++# CONFIG_V4L_TEST_DRIVERS is not set
++# CONFIG_VALIDATE_FS_PARSER is not set
++# CONFIG_VBOXGUEST is not set
++# CONFIG_VCNL4000 is not set
++# CONFIG_VCNL4035 is not set
++CONFIG_VDSO=y
++# CONFIG_VEML6070 is not set
++# CONFIG_VETH is not set
++# CONFIG_VEXPRESS_CONFIG is not set
++# CONFIG_VF610_ADC is not set
++# CONFIG_VF610_DAC is not set
++# CONFIG_VFAT_FS is not set
++# CONFIG_VFIO is not set
++# CONFIG_VGASTATE is not set
++# CONFIG_VGA_ARB is not set
++# CONFIG_VGA_SWITCHEROO is not set
++# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set
++# CONFIG_VHOST_NET is not set
++# CONFIG_VHOST_VSOCK is not set
++# CONFIG_VIA_RHINE is not set
++# CONFIG_VIA_VELOCITY is not set
++# CONFIG_VIDEO_ADV7170 is not set
++# CONFIG_VIDEO_ADV7175 is not set
++# CONFIG_VIDEO_ADV7180 is not set
++# CONFIG_VIDEO_ADV7183 is not set
++# CONFIG_VIDEO_ADV7343 is not set
++# CONFIG_VIDEO_ADV7393 is not set
++# CONFIG_VIDEO_ADV_DEBUG is not set
++# CONFIG_VIDEO_AK881X is not set
++# CONFIG_VIDEO_ASPEED is not set
++# CONFIG_VIDEO_BT819 is not set
++# CONFIG_VIDEO_BT848 is not set
++# CONFIG_VIDEO_BT856 is not set
++# CONFIG_VIDEO_BT866 is not set
++# CONFIG_VIDEO_CADENCE is not set
++# CONFIG_VIDEO_CAFE_CCIC is not set
++# CONFIG_VIDEO_CS3308 is not set
++# CONFIG_VIDEO_CS5345 is not set
++# CONFIG_VIDEO_CS53L32A is not set
++# CONFIG_VIDEO_CX231XX is not set
++# CONFIG_VIDEO_CX2341X is not set
++# CONFIG_VIDEO_CX25840 is not set
++# CONFIG_VIDEO_CX88 is not set
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_VIDEO_DM6446_CCDC is not set
++# CONFIG_VIDEO_DT3155 is not set
++# CONFIG_VIDEO_EM28XX is not set
++# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
++# CONFIG_VIDEO_GO7007 is not set
++# CONFIG_VIDEO_HDPVR is not set
++# CONFIG_VIDEO_HEXIUM_GEMINI is not set
++# CONFIG_VIDEO_HEXIUM_ORION is not set
++# CONFIG_VIDEO_I2C is not set
++# CONFIG_VIDEO_IR_I2C is not set
++# CONFIG_VIDEO_IVTV is not set
++# CONFIG_VIDEO_KS0127 is not set
++# CONFIG_VIDEO_M52790 is not set
++# CONFIG_VIDEO_ML86V7667 is not set
++# CONFIG_VIDEO_MSP3400 is not set
++# CONFIG_VIDEO_MT9M111 is not set
++# CONFIG_VIDEO_MT9T112 is not set
++# CONFIG_VIDEO_MT9V011 is not set
++# CONFIG_VIDEO_MT9V111 is not set
++# CONFIG_VIDEO_MXB is not set
++# CONFIG_VIDEO_NOON010PC30 is not set
++# CONFIG_VIDEO_OMAP2_VOUT is not set
++# CONFIG_VIDEO_OV2640 is not set
++# CONFIG_VIDEO_OV2659 is not set
++# CONFIG_VIDEO_OV5695 is not set
++# CONFIG_VIDEO_OV6650 is not set
++# CONFIG_VIDEO_OV7640 is not set
++# CONFIG_VIDEO_OV7670 is not set
++# CONFIG_VIDEO_OV772X is not set
++# CONFIG_VIDEO_OV7740 is not set
++# CONFIG_VIDEO_OV9640 is not set
++# CONFIG_VIDEO_PVRUSB2 is not set
++# CONFIG_VIDEO_RJ54N1 is not set
++# CONFIG_VIDEO_SAA6588 is not set
++# CONFIG_VIDEO_SAA6752HS is not set
++# CONFIG_VIDEO_SAA7110 is not set
++# CONFIG_VIDEO_SAA711X is not set
++# CONFIG_VIDEO_SAA7127 is not set
++# CONFIG_VIDEO_SAA7134 is not set
++# CONFIG_VIDEO_SAA717X is not set
++# CONFIG_VIDEO_SAA7185 is not set
++# CONFIG_VIDEO_SH_MOBILE_CEU is not set
++# CONFIG_VIDEO_SONY_BTF_MPX is not set
++# CONFIG_VIDEO_SR030PC30 is not set
++# CONFIG_VIDEO_TDA7432 is not set
++# CONFIG_VIDEO_TDA9840 is not set
++# CONFIG_VIDEO_TEA6415C is not set
++# CONFIG_VIDEO_TEA6420 is not set
++# CONFIG_VIDEO_THS7303 is not set
++# CONFIG_VIDEO_THS8200 is not set
++# CONFIG_VIDEO_TIMBERDALE is not set
++# CONFIG_VIDEO_TLV320AIC23B is not set
++# CONFIG_VIDEO_TM6000 is not set
++# CONFIG_VIDEO_TVAUDIO is not set
++# CONFIG_VIDEO_TVP514X is not set
++# CONFIG_VIDEO_TVP5150 is not set
++# CONFIG_VIDEO_TVP7002 is not set
++# CONFIG_VIDEO_TW2804 is not set
++# CONFIG_VIDEO_TW9903 is not set
++# CONFIG_VIDEO_TW9906 is not set
++# CONFIG_VIDEO_TW9910 is not set
++# CONFIG_VIDEO_UDA1342 is not set
++# CONFIG_VIDEO_UPD64031A is not set
++# CONFIG_VIDEO_UPD64083 is not set
++# CONFIG_VIDEO_USBTV is not set
++# CONFIG_VIDEO_USBVISION is not set
++# CONFIG_VIDEO_V4L2 is not set
++# CONFIG_VIDEO_VP27SMPX is not set
++# CONFIG_VIDEO_VPX3220 is not set
++# CONFIG_VIDEO_VS6624 is not set
++# CONFIG_VIDEO_WM8739 is not set
++# CONFIG_VIDEO_WM8775 is not set
++# CONFIG_VIDEO_ZORAN is not set
++# CONFIG_VIRTIO_BALLOON is not set
++# CONFIG_VIRTIO_BLK_SCSI is not set
++# CONFIG_VIRTIO_FS is not set
++# CONFIG_VIRTIO_INPUT is not set
++CONFIG_VIRTIO_MENU=y
++# CONFIG_VIRTIO_MMIO is not set
++# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set
++# CONFIG_VIRTIO_PCI is not set
++# CONFIG_VIRTUALIZATION is not set
++# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
++# CONFIG_VIRT_DRIVERS is not set
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_VL53L0X_I2C is not set
++# CONFIG_VL6180 is not set
++CONFIG_VLAN_8021Q=y
++# CONFIG_VLAN_8021Q_GVRP is not set
++# CONFIG_VLAN_8021Q_MVRP is not set
++# CONFIG_VME_BUS is not set
++# CONFIG_VMSPLIT_1G is not set
++# CONFIG_VMSPLIT_2G is not set
++# CONFIG_VMSPLIT_2G_OPT is not set
++CONFIG_VMSPLIT_3G=y
++# CONFIG_VMSPLIT_3G_OPT is not set
++# CONFIG_VMWARE_PVSCSI is not set
++# CONFIG_VMXNET3 is not set
++# CONFIG_VM_EVENT_COUNTERS is not set
++# CONFIG_VOP_BUS is not set
++# CONFIG_VORTEX is not set
++# CONFIG_VSOCKETS is not set
++# CONFIG_VSOCKETS_DIAG is not set
++# CONFIG_VT is not set
++# CONFIG_VT6655 is not set
++# CONFIG_VT6656 is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_VXGE is not set
++# CONFIG_VXLAN is not set
++# CONFIG_VZ89X is not set
++# CONFIG_W1 is not set
++# CONFIG_W1_CON is not set
++# CONFIG_W1_MASTER_DS1WM is not set
++# CONFIG_W1_MASTER_DS2482 is not set
++# CONFIG_W1_MASTER_DS2490 is not set
++# CONFIG_W1_MASTER_GPIO is not set
++# CONFIG_W1_MASTER_MATROX is not set
++# CONFIG_W1_MASTER_SGI is not set
++# CONFIG_W1_SLAVE_DS2405 is not set
++# CONFIG_W1_SLAVE_DS2406 is not set
++# CONFIG_W1_SLAVE_DS2408 is not set
++# CONFIG_W1_SLAVE_DS2413 is not set
++# CONFIG_W1_SLAVE_DS2423 is not set
++# CONFIG_W1_SLAVE_DS2431 is not set
++# CONFIG_W1_SLAVE_DS2433 is not set
++# CONFIG_W1_SLAVE_DS2438 is not set
++# CONFIG_W1_SLAVE_DS250X is not set
++# CONFIG_W1_SLAVE_DS2780 is not set
++# CONFIG_W1_SLAVE_DS2781 is not set
++# CONFIG_W1_SLAVE_DS2805 is not set
++# CONFIG_W1_SLAVE_DS28E04 is not set
++# CONFIG_W1_SLAVE_DS28E17 is not set
++# CONFIG_W1_SLAVE_SMEM is not set
++# CONFIG_W1_SLAVE_THERM is not set
++# CONFIG_W83627HF_WDT is not set
++# CONFIG_W83877F_WDT is not set
++# CONFIG_W83977F_WDT is not set
++# CONFIG_WAN is not set
++# CONFIG_WANXL is not set
++# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_CORE is not set
++CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++CONFIG_WATCHDOG_OPEN_TIMEOUT=0
++# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set
++# CONFIG_WATCHDOG_SYSFS is not set
++# CONFIG_WD80x3 is not set
++# CONFIG_WDAT_WDT is not set
++# CONFIG_WDTPCI is not set
++CONFIG_WEXT_CORE=y
++CONFIG_WEXT_PRIV=y
++CONFIG_WEXT_PROC=y
++CONFIG_WEXT_SPY=y
++CONFIG_WILINK_PLATFORM_DATA=y
++# CONFIG_WIMAX is not set
++# CONFIG_WIREGUARD is not set
++CONFIG_WIRELESS=y
++CONFIG_WIRELESS_EXT=y
++# CONFIG_WIRELESS_WDS is not set
++# CONFIG_WIZNET_W5100 is not set
++# CONFIG_WIZNET_W5300 is not set
++# CONFIG_WL1251 is not set
++# CONFIG_WL12XX is not set
++# CONFIG_WL18XX is not set
++CONFIG_WLAN=y
++# CONFIG_WLAN_VENDOR_ADMTEK is not set
++# CONFIG_WLAN_VENDOR_ATH is not set
++# CONFIG_WLAN_VENDOR_ATMEL is not set
++# CONFIG_WLAN_VENDOR_BROADCOM is not set
++# CONFIG_WLAN_VENDOR_CISCO is not set
++# CONFIG_WLAN_VENDOR_INTEL is not set
++# CONFIG_WLAN_VENDOR_INTERSIL is not set
++# CONFIG_WLAN_VENDOR_MARVELL is not set
++# CONFIG_WLAN_VENDOR_MEDIATEK is not set
++# CONFIG_WLAN_VENDOR_QUANTENNA is not set
++# CONFIG_WLAN_VENDOR_RALINK is not set
++# CONFIG_WLAN_VENDOR_REALTEK is not set
++# CONFIG_WLAN_VENDOR_RSI is not set
++# CONFIG_WLAN_VENDOR_ST is not set
++# CONFIG_WLAN_VENDOR_TI is not set
++# CONFIG_WLAN_VENDOR_ZYDAS is not set
++# CONFIG_WLCORE is not set
++CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
++# CONFIG_WQ_WATCHDOG is not set
++# CONFIG_WW_MUTEX_SELFTEST is not set
++# CONFIG_X25 is not set
++# CONFIG_X509_CERTIFICATE_PARSER is not set
++# CONFIG_X86_PKG_TEMP_THERMAL is not set
++CONFIG_X86_SYSFB=y
++# CONFIG_XDP_SOCKETS is not set
++# CONFIG_XEN is not set
++# CONFIG_XEN_GRANT_DMA_ALLOC is not set
++# CONFIG_XEN_PVCALLS_FRONTEND is not set
++CONFIG_XEN_SCRUB_PAGES_DEFAULT=y
++CONFIG_XFRM=y
++# CONFIG_XFRM_INTERFACE is not set
++# CONFIG_XFRM_IPCOMP is not set
++# CONFIG_XFRM_MIGRATE is not set
++# CONFIG_XFRM_STATISTICS is not set
++# CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_XFRM_USER is not set
++# CONFIG_XFS_DEBUG is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_XFS_ONLINE_SCRUB is not set
++# CONFIG_XFS_POSIX_ACL is not set
++# CONFIG_XFS_QUOTA is not set
++# CONFIG_XFS_RT is not set
++# CONFIG_XFS_WARN is not set
++# CONFIG_XILINX_AXI_EMAC is not set
++# CONFIG_XILINX_DMA is not set
++# CONFIG_XILINX_EMACLITE is not set
++# CONFIG_XILINX_GMII2RGMII is not set
++# CONFIG_XILINX_LL_TEMAC is not set
++# CONFIG_XILINX_SDFEC is not set
++# CONFIG_XILINX_VCU is not set
++# CONFIG_XILINX_WATCHDOG is not set
++# CONFIG_XILINX_XADC is not set
++# CONFIG_XILINX_ZYNQMP_DMA is not set
++# CONFIG_XILLYBUS is not set
++# CONFIG_XIL_AXIS_FIFO is not set
++# CONFIG_XIP_KERNEL is not set
++# CONFIG_XMON is not set
++CONFIG_XZ_DEC=y
++# CONFIG_XZ_DEC_ARM is not set
++# CONFIG_XZ_DEC_ARMTHUMB is not set
++# CONFIG_XZ_DEC_BCJ is not set
++# CONFIG_XZ_DEC_IA64 is not set
++# CONFIG_XZ_DEC_POWERPC is not set
++# CONFIG_XZ_DEC_SPARC is not set
++# CONFIG_XZ_DEC_TEST is not set
++# CONFIG_XZ_DEC_X86 is not set
++# CONFIG_YAM is not set
++# CONFIG_YELLOWFIN is not set
++# CONFIG_YENTA is not set
++# CONFIG_YENTA_O2 is not set
++# CONFIG_YENTA_RICOH is not set
++# CONFIG_YENTA_TI is not set
++# CONFIG_YENTA_TOSHIBA is not set
++# CONFIG_ZBUD is not set
++# CONFIG_ZD1211RW is not set
++# CONFIG_ZD1211RW_DEBUG is not set
++# CONFIG_ZEROPLUS_FF is not set
++# CONFIG_ZIIRAVE_WATCHDOG is not set
++# CONFIG_ZISOFS is not set
++# CONFIG_ZLIB_DEFLATE is not set
++# CONFIG_ZLIB_INFLATE is not set
++CONFIG_ZONE_DMA=y
++# CONFIG_ZOPT2201 is not set
++# CONFIG_ZPA2326 is not set
++# CONFIG_ZPOOL is not set
++# CONFIG_ZRAM is not set
++# CONFIG_ZRAM_MEMORY_TRACKING is not set
++# CONFIG_ZSMALLOC is not set
++# CONFIG_ZX_TDM is not set
+diff --git a/target/linux/generic/files-5.4/Documentation/devicetree/bindings/mtd/partitions/openwrt,uimage.yaml b/target/linux/generic/files-5.4/Documentation/devicetree/bindings/mtd/partitions/openwrt,uimage.yaml
+new file mode 100644
+index 0000000000..d052ab1fc9
+--- /dev/null
++++ b/target/linux/generic/files-5.4/Documentation/devicetree/bindings/mtd/partitions/openwrt,uimage.yaml
+@@ -0,0 +1,91 @@
++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/mtd/partitions/openwrt,uimage.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: OpenWrt variations of U-Boot Image partitions
++
++maintainers:
++  - Bjørn Mork <bjorn@mork.no>
++
++description: |
++  The image format defined by the boot loader "Das U-Boot" is often
++  modified or extended by device vendors. This defines a few optional
++  properties which can be used to describe such modifications.
++
++# partition.txt defines common properties, but has not yet been
++# converted to YAML
++#allOf:
++#  - $ref: ../partition.yaml#
++
++properties:
++  compatible:
++    items:
++      - enum:
++          - openwrt,uimage
++      - const: denx,uimage
++
++  openwrt,padding:
++    description: Number of padding bytes between header and data
++    $ref: /schemas/types.yaml#/definitions/uint32
++    default: 0
++
++  openwrt,ih-magic:
++    description: U-Boot Image Header magic number.
++    $ref: /schemas/types.yaml#/definitions/uint32
++    default: 0x27051956 # IH_MAGIC
++
++  openwrt,ih-type:
++    description: U-Boot Image type
++    $ref: /schemas/types.yaml#/definitions/uint32
++    default: 2 # IH_TYPE_KERNEL
++
++  openwrt,offset:
++    description:
++      Offset between partition start and U-Boot Image in bytes
++    $ref: /schemas/types.yaml#/definitions/uint32
++    default: 0
++
++  openwrt,partition-magic:
++    description:
++      Magic number found at the start of the partition. Will only be
++      validated if both this property and openwrt,offset is non-zero
++    $ref: /schemas/types.yaml#/definitions/uint32
++    default: 0
++
++required:
++  - compatible
++  - reg
++
++#unevaluatedProperties: false
++additionalProperties: false
++
++examples:
++  - |
++    // device with non-default magic
++    partition@300000 {
++          compatible = "openwrt,uimage", "denx,uimage";
++          reg = <0x00300000 0xe80000>;
++          label = "firmware";
++          openwrt,ih-magic = <0x4e474520>;
++    };
++  - |
++    // device with U-Boot Image at an offset, with a partition magic value
++    partition@70000 {
++          compatible = "openwrt,uimage", "denx,uimage";
++          reg = <0x00070000 0x00790000>;
++          label = "firmware";
++          openwrt,offset = <20>;
++          openwrt,partition-magic = <0x43535953>;
++    };
++  - |
++    // device using a non-default image type
++    #include "dt-bindings/mtd/partitions/uimage.h"
++    partition@6c0000 {
++          compatible = "openwrt,uimage", "denx,uimage";
++          reg = <0x6c0000 0x1900000>;
++          label = "firmware";
++          openwrt,ih-magic = <0x33373033>;
++          openwrt,ih-type = <IH_TYPE_FILESYSTEM>;
++    };
+diff --git a/target/linux/generic/files-5.4/Documentation/networking/adm6996.txt b/target/linux/generic/files-5.4/Documentation/networking/adm6996.txt
+new file mode 100644
+index 0000000000..ab59f1df03
+--- /dev/null
++++ b/target/linux/generic/files-5.4/Documentation/networking/adm6996.txt
+@@ -0,0 +1,110 @@
++------- 
++
++ADM6996FC / ADM6996M switch chip driver
++
++
++1. General information
++
++  This driver supports the FC and M models only. The ADM6996F and L are
++  completely different chips.
++  
++  Support for the FC model is extremely limited at the moment. There is no VLAN
++  support as of yet. The driver will not offer an swconfig interface for the FC
++  chip.
++ 
++1.1 VLAN IDs
++
++  It is possible to define 16 different VLANs. Every VLAN has an identifier, its
++  VLAN ID. It is easiest if you use at most VLAN IDs 0-15. In that case, the
++  swconfig based configuration is very straightforward. To define two VLANs with
++  IDs 4 and 5, you can invoke, for example:
++  
++      # swconfig dev ethX vlan 4 set ports '0 1t 2 5t' 
++      # swconfig dev ethX vlan 5 set ports '0t 1t 5t'
++  
++  The swconfig framework will automatically invoke 'port Y set pvid Z' for every
++  port that is an untagged member of VLAN Y, setting its Primary VLAN ID. In
++  this example, ports 0 and 2 would get "pvid 4". The Primary VLAN ID of a port
++  is the VLAN ID associated with untagged packets coming in on that port.
++  
++  But if you wish to use VLAN IDs outside the range 0-15, this automatic
++  behaviour of the swconfig framework becomes a problem. The 16 VLANs that
++  swconfig can configure on the ADM6996 also have a "vid" setting. By default,
++  this is the same as the number of the VLAN entry, to make the simple behaviour
++  above possible. To still support a VLAN with a VLAN ID higher than 15
++  (presumably because you are in a network where such VLAN IDs are already in
++  use), you can change the "vid" setting of the VLAN to anything in the range
++  0-1023. But suppose you did the following:
++  
++      # swconfig dev ethX vlan 0 set vid 998 
++      # swconfig dev ethX vlan 0 set ports '0 2 5t'
++ 
++  Now the swconfig framework will issue 'port 0 set pvid 0' and 'port 2 set pvid
++  0'. But the "pvid" should be set to 998, so you are responsible for manually
++  fixing this!
++
++1.2 VLAN filtering
++
++  The switch is configured to apply source port filtering. This means that
++  packets are only accepted when the port the packets came in on is a member of
++  the VLAN the packet should go to.
++
++  Only membership of a VLAN is tested, it does not matter whether it is a tagged
++  or untagged membership.
++
++  For untagged packets, the destination VLAN is the Primary VLAN ID of the
++  incoming port. So if the PVID of a port is 0, but that port is not a member of
++  the VLAN with ID 0, this means that untagged packets on that port are dropped.
++  This can be used as a roundabout way of dropping untagged packets from a port,
++  a mode often referred to as "Admit only tagged packets".
++
++1.3 Reset
++
++  The two supported chip models do not have a sofware-initiated reset. When the
++  driver is initialised, as well as when the 'reset' swconfig option is invoked,
++  the driver will set those registers it knows about and supports to the correct
++  default value. But there are a lot of registers in the chip that the driver
++  does not support. If something changed those registers, invoking 'reset' or
++  performing a warm reboot might still leave the chip in a "broken" state. Only
++  a hardware reset will bring it back in the default state.
++
++2. Technical details on PHYs and the ADM6996
++
++  From the viewpoint of the Linux kernel, it is common that an Ethernet adapter
++  can be seen as a separate MAC entity and a separate PHY entity. The PHY entity
++  can be queried and set through registers accessible via an MDIO bus. A PHY
++  normally has a single address on that bus, in the range 0 through 31.
++
++  The ADM6996 has special-purpose registers in the range of PHYs 0 through 10.
++  Even though all these registers control a single ADM6996 chip, the Linux
++  kernel treats this as 11 separate PHYs.  The driver will bind to these
++  addresses to prevent a different PHY driver from binding and corrupting these
++  registers.
++
++  What Linux sees as the PHY on address 0 is meant for the Ethernet MAC
++  connected to the CPU port of the ADM6996 switch chip (port 5). This is the
++  Ethernet MAC you will use to send and receive data through the switch.
++
++  The PHYs at addresses 16 through 20 map to the PHYs on ports 0 through 4 of
++  the switch chip. These can be accessed with the Generic PHY driver, as the
++  registers have the common layout.
++
++  If a second Ethernet MAC on your board is wired to the port 4 PHY, that MAC
++  needs to bind to PHY address 20 for the port to work correctly.
++
++  The ADM6996 switch driver will reset the ports 0 through 3 on startup and when
++  'reset' is invoked. This could clash with a different PHY driver if the kernel
++  binds a PHY driver to address 16 through 19.
++
++  If Linux binds a PHY on addresses 1 through 10 to an Ethernet MAC, the ADM6996
++  driver will simply always report a connected 100 Mbit/s full-duplex link for
++  that PHY, and provide no other functionality. This is most likely not what you
++  want. So if you see a message in your log
++
++  	ethX: PHY overlaps ADM6996, providing fixed PHY yy.
++
++  This is most likely an indication that ethX will not work properly, and your
++  kernel needs to be configured to attach a different PHY to that Ethernet MAC.
++
++  Controlling the mapping between MACs and PHYs is usually done in platform- or
++  board-specific fixup code. The ADM6996 driver has no influence over this.
+diff --git a/target/linux/generic/files-5.4/arch/mips/fw/myloader/Makefile b/target/linux/generic/files-5.4/arch/mips/fw/myloader/Makefile
+new file mode 100644
+index 0000000000..34acfd01cc
+--- /dev/null
++++ b/target/linux/generic/files-5.4/arch/mips/fw/myloader/Makefile
+@@ -0,0 +1,5 @@
++#
++# Makefile for the Compex's MyLoader support on MIPS architecture
++#
++
++lib-y += myloader.o
+diff --git a/target/linux/generic/files-5.4/arch/mips/fw/myloader/myloader.c b/target/linux/generic/files-5.4/arch/mips/fw/myloader/myloader.c
+new file mode 100644
+index 0000000000..a26f9ad3fd
+--- /dev/null
++++ b/target/linux/generic/files-5.4/arch/mips/fw/myloader/myloader.c
+@@ -0,0 +1,63 @@
++/*
++ *  Compex's MyLoader specific prom routines
++ *
++ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ */
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/types.h>
++#include <linux/string.h>
++
++#include <asm/addrspace.h>
++#include <asm/fw/myloader/myloader.h>
++
++#define SYS_PARAMS_ADDR		KSEG1ADDR(0x80000800)
++#define BOARD_PARAMS_ADDR	KSEG1ADDR(0x80000A00)
++#define PART_TABLE_ADDR		KSEG1ADDR(0x80000C00)
++#define BOOT_PARAMS_ADDR	KSEG1ADDR(0x80000E00)
++
++static struct myloader_info myloader_info __initdata;
++static int myloader_found __initdata;
++
++struct myloader_info * __init myloader_get_info(void)
++{
++	struct mylo_system_params *sysp;
++	struct mylo_board_params *boardp;
++	struct mylo_partition_table *parts;
++
++	if (myloader_found)
++		return &myloader_info;
++
++	sysp = (struct mylo_system_params *)(SYS_PARAMS_ADDR);
++	boardp = (struct mylo_board_params *)(BOARD_PARAMS_ADDR);
++	parts = (struct mylo_partition_table *)(PART_TABLE_ADDR);
++
++	printk(KERN_DEBUG "MyLoader: sysp=%08x, boardp=%08x, parts=%08x\n",
++		sysp->magic, boardp->magic, parts->magic);
++
++	/* Check for some magic numbers */
++	if (sysp->magic != MYLO_MAGIC_SYS_PARAMS ||
++	    boardp->magic != MYLO_MAGIC_BOARD_PARAMS ||
++	    le32_to_cpu(parts->magic) != MYLO_MAGIC_PARTITIONS)
++		return NULL;
++
++	printk(KERN_DEBUG "MyLoader: id=%04x:%04x, sub_id=%04x:%04x\n",
++		sysp->vid, sysp->did, sysp->svid, sysp->sdid);
++
++	myloader_info.vid = sysp->vid;
++	myloader_info.did = sysp->did;
++	myloader_info.svid = sysp->svid;
++	myloader_info.sdid = sysp->sdid;
++
++	memcpy(myloader_info.macs, boardp->addr, sizeof(myloader_info.macs));
++
++	myloader_found = 1;
++
++	return &myloader_info;
++}
+diff --git a/target/linux/generic/files-5.4/block/partitions/fit.c b/target/linux/generic/files-5.4/block/partitions/fit.c
+new file mode 100644
+index 0000000000..c0d9642505
+--- /dev/null
++++ b/target/linux/generic/files-5.4/block/partitions/fit.c
+@@ -0,0 +1,254 @@
++// SPDX-License-Identifier: GPL-2.0-or-later
++/*
++ *  fs/partitions/fit.c
++ *  Copyright (C) 2021  Daniel Golle
++ *
++ *  headers extracted from U-Boot mkimage sources
++ *  (C) Copyright 2008 Semihalf
++ *  (C) Copyright 2000-2005
++ *  Wolfgang Denk, DENX Software Engineering, wd@denx.de.
++ *
++ *  based on existing partition parsers
++ *  Copyright (C) 1991-1998  Linus Torvalds
++ *  Re-organised Feb 1998 Russell King
++ */
++
++#define pr_fmt(fmt) fmt
++
++#include <linux/types.h>
++#include <linux/of.h>
++#include <linux/of_device.h>
++#include <linux/of_fdt.h>
++#include <linux/libfdt.h>
++
++#include "check.h"
++
++#define FIT_IMAGES_PATH		"/images"
++#define FIT_CONFS_PATH		"/configurations"
++
++/* hash/signature/key node */
++#define FIT_HASH_NODENAME	"hash"
++#define FIT_ALGO_PROP		"algo"
++#define FIT_VALUE_PROP		"value"
++#define FIT_IGNORE_PROP		"uboot-ignore"
++#define FIT_SIG_NODENAME	"signature"
++#define FIT_KEY_REQUIRED	"required"
++#define FIT_KEY_HINT		"key-name-hint"
++
++/* cipher node */
++#define FIT_CIPHER_NODENAME	"cipher"
++#define FIT_ALGO_PROP		"algo"
++
++/* image node */
++#define FIT_DATA_PROP		"data"
++#define FIT_DATA_POSITION_PROP	"data-position"
++#define FIT_DATA_OFFSET_PROP	"data-offset"
++#define FIT_DATA_SIZE_PROP	"data-size"
++#define FIT_TIMESTAMP_PROP	"timestamp"
++#define FIT_DESC_PROP		"description"
++#define FIT_ARCH_PROP		"arch"
++#define FIT_TYPE_PROP		"type"
++#define FIT_OS_PROP		"os"
++#define FIT_COMP_PROP		"compression"
++#define FIT_ENTRY_PROP		"entry"
++#define FIT_LOAD_PROP		"load"
++
++/* configuration node */
++#define FIT_KERNEL_PROP		"kernel"
++#define FIT_FILESYSTEM_PROP	"filesystem"
++#define FIT_RAMDISK_PROP	"ramdisk"
++#define FIT_FDT_PROP		"fdt"
++#define FIT_LOADABLE_PROP	"loadables"
++#define FIT_DEFAULT_PROP	"default"
++#define FIT_SETUP_PROP		"setup"
++#define FIT_FPGA_PROP		"fpga"
++#define FIT_FIRMWARE_PROP	"firmware"
++#define FIT_STANDALONE_PROP	"standalone"
++
++#define FIT_MAX_HASH_LEN	HASH_MAX_DIGEST_SIZE
++
++#define MIN_FREE_SECT		16
++#define REMAIN_VOLNAME		"rootfs_data"
++
++int parse_fit_partitions(struct parsed_partitions *state, u64 fit_start_sector, u64 sectors, int *slot, int add_remain)
++{
++	struct address_space *mapping = state->bdev->bd_inode->i_mapping;
++	struct page *page;
++	void *fit, *init_fit;
++	struct partition_meta_info *info;
++	char tmp[sizeof(info->volname)];
++	u64 dsize, dsectors, imgmaxsect = 0;
++	u32 size, image_pos, image_len;
++	const u32 *image_offset_be, *image_len_be, *image_pos_be;
++	int ret = 1, node, images, config;
++	const char *image_name, *image_type, *image_description, *config_default,
++		*config_description, *config_loadables;
++	int image_name_len, image_type_len, image_description_len, config_default_len,
++		config_description_len, config_loadables_len;
++	sector_t start_sect, nr_sects;
++	size_t label_min;
++
++	if (fit_start_sector % (1<<(PAGE_SHIFT - SECTOR_SHIFT)))
++		return -ERANGE;
++
++	page = read_mapping_page(mapping, fit_start_sector >> (PAGE_SHIFT - SECTOR_SHIFT), NULL);
++	if (!page)
++		return -ENOMEM;
++
++	init_fit = page_address(page);
++
++	if (!init_fit) {
++		put_page(page);
++		return -EFAULT;
++	}
++
++	if (fdt_check_header(init_fit)) {
++		put_page(page);
++		return 0;
++	}
++
++	dsectors = get_capacity(state->bdev->bd_disk);
++	if (sectors)
++		dsectors = (dsectors>sectors)?sectors:dsectors;
++
++	dsize = dsectors << SECTOR_SHIFT;
++	printk(KERN_DEBUG "FIT: volume size: %llu sectors (%llu bytes)\n", dsectors, dsize);
++
++	size = fdt_totalsize(init_fit);
++	printk(KERN_DEBUG "FIT: FDT structure size: %u bytes\n", size);
++	if (size > PAGE_SIZE) {
++		printk(KERN_ERR "FIT: FDT structure beyond page boundaries, use 'mkimage -E ...'!\n");
++		put_page(page);
++		return -ENOTSUPP;
++	}
++
++	if (size >= dsize) {
++		put_page(page);
++		state->access_beyond_eod = (size >= dsize);
++		return 0;
++	}
++
++	fit = kmemdup(init_fit, size, GFP_KERNEL);
++	put_page(page);
++	if (!fit)
++		return -ENOMEM;
++
++	config = fdt_path_offset(fit, FIT_CONFS_PATH);
++	if (config < 0) {
++		printk(KERN_ERR "FIT: Cannot find %s node: %d\n", FIT_CONFS_PATH, images);
++		ret = -ENOENT;
++		goto ret_out;
++	}
++
++	config_default = fdt_getprop(fit, config, FIT_DEFAULT_PROP, &config_default_len);
++
++	if (!config_default) {
++		printk(KERN_ERR "FIT: Cannot find default configuration\n");
++		ret = -ENOENT;
++		goto ret_out;
++	}
++
++	node = fdt_subnode_offset(fit, config, config_default);
++	if (node < 0) {
++		printk(KERN_ERR "FIT: Cannot find %s node: %d\n", config_default, node);
++		ret = -ENOENT;
++		goto ret_out;
++	}
++
++	config_description = fdt_getprop(fit, node, FIT_DESC_PROP, &config_description_len);
++	config_loadables = fdt_getprop(fit, node, FIT_LOADABLE_PROP, &config_loadables_len);
++
++	printk(KERN_DEBUG "FIT: Default configuration: %s%s%s%s\n", config_default,
++		config_description?" (":"", config_description?:"", config_description?")":"");
++
++	images = fdt_path_offset(fit, FIT_IMAGES_PATH);
++	if (images < 0) {
++		printk(KERN_ERR "FIT: Cannot find %s node: %d\n", FIT_IMAGES_PATH, images);
++		ret = -EINVAL;
++		goto ret_out;
++	}
++
++	fdt_for_each_subnode(node, fit, images) {
++		image_name = fdt_get_name(fit, node, &image_name_len);
++		image_type = fdt_getprop(fit, node, FIT_TYPE_PROP, &image_type_len);
++		image_offset_be = fdt_getprop(fit, node, FIT_DATA_OFFSET_PROP, NULL);
++		image_pos_be = fdt_getprop(fit, node, FIT_DATA_POSITION_PROP, NULL);
++		image_len_be = fdt_getprop(fit, node, FIT_DATA_SIZE_PROP, NULL);
++		if (!image_name || !image_type || !image_len_be)
++			continue;
++
++		image_len = be32_to_cpu(*image_len_be);
++		if (!image_len)
++			continue;
++
++		if (image_offset_be)
++			image_pos = be32_to_cpu(*image_offset_be) + size;
++		else if (image_pos_be)
++			image_pos = be32_to_cpu(*image_pos_be);
++		else
++			continue;
++
++		image_description = fdt_getprop(fit, node, FIT_DESC_PROP, &image_description_len);
++
++		printk(KERN_DEBUG "FIT: %16s sub-image 0x%08x - 0x%08x '%s' %s%s%s\n",
++			image_type, image_pos, image_pos + image_len, image_name,
++			image_description?"(":"", image_description?:"", image_description?") ":"");
++
++		if (strcmp(image_type, FIT_FILESYSTEM_PROP))
++			continue;
++
++		if (image_pos & ((1 << PAGE_SHIFT)-1)) {
++			printk(KERN_ERR "FIT: image %s start not aligned to page boundaries, skipping\n", image_name);
++			continue;
++		}
++
++		if (image_len & ((1 << PAGE_SHIFT)-1)) {
++			printk(KERN_ERR "FIT: sub-image %s end not aligned to page boundaries, skipping\n", image_name);
++			continue;
++		}
++
++		start_sect = image_pos >> SECTOR_SHIFT;
++		nr_sects = image_len >> SECTOR_SHIFT;
++		imgmaxsect = (imgmaxsect < (start_sect + nr_sects))?(start_sect + nr_sects):imgmaxsect;
++
++		if (start_sect + nr_sects > dsectors) {
++			state->access_beyond_eod = 1;
++			continue;
++		}
++
++		put_partition(state, ++(*slot), fit_start_sector + start_sect, nr_sects);
++		state->parts[*slot].flags = 0;
++		info = &state->parts[*slot].info;
++
++		label_min = min_t(int, sizeof(info->volname) - 1, image_name_len);
++		strncpy(info->volname, image_name, label_min);
++		info->volname[label_min] = '\0';
++
++		snprintf(tmp, sizeof(tmp), "(%s)", info->volname);
++		strlcat(state->pp_buf, tmp, PAGE_SIZE);
++
++		state->parts[*slot].has_info = true;
++
++		if (config_loadables && !strcmp(image_name, config_loadables)) {
++			printk(KERN_DEBUG "FIT: selecting configured loadable %s to be root filesystem\n", image_name);
++			state->parts[*slot].flags |= ADDPART_FLAG_ROOTDEV;
++		}
++	}
++
++	if (add_remain && (imgmaxsect + MIN_FREE_SECT) < dsectors) {
++		put_partition(state, ++(*slot), fit_start_sector + imgmaxsect, dsectors - imgmaxsect);
++		state->parts[*slot].flags = 0;
++		info = &state->parts[*slot].info;
++		strcpy(info->volname, REMAIN_VOLNAME);
++		snprintf(tmp, sizeof(tmp), "(%s)", REMAIN_VOLNAME);
++		strlcat(state->pp_buf, tmp, PAGE_SIZE);
++	}
++ret_out:
++	kfree(fit);
++	return ret;
++}
++
++int fit_partition(struct parsed_partitions *state) {
++	int slot = 0;
++	return parse_fit_partitions(state, 0, 0, &slot, 0);
++}
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/Kconfig b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/Kconfig
+new file mode 100644
+index 0000000000..794a39f2c3
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/Kconfig
+@@ -0,0 +1,103 @@
++config MTD_SPLIT
++	def_bool n
++	help
++	  Generic MTD split support.
++
++config MTD_SPLIT_SUPPORT
++	def_bool MTD = y
++
++comment "Rootfs partition parsers"
++
++config MTD_SPLIT_SQUASHFS_ROOT
++	bool "Squashfs based root partition parser"
++	depends on MTD_SPLIT_SUPPORT
++	select MTD_SPLIT
++	default n
++	help
++	  This provides a parsing function which allows to detect the
++	  offset and size of the unused portion of a rootfs partition
++	  containing a squashfs.
++
++comment "Firmware partition parsers"
++
++config MTD_SPLIT_BCM63XX_FW
++	bool "BCM63xx firmware parser"
++	depends on MTD_SPLIT_SUPPORT
++	select MTD_SPLIT
++
++config MTD_SPLIT_BCM_WFI_FW
++	bool "Broadcom Whole Flash Image parser"
++	depends on MTD_SPLIT_SUPPORT
++	select MTD_SPLIT
++
++config MTD_SPLIT_CFE_BOOTFS
++	bool "Parser finding rootfs appended to the CFE bootfs"
++	depends on MTD_SPLIT_SUPPORT && ARCH_BCM4908
++	select MTD_SPLIT
++	help
++	  cferom on BCM4908 (and bcm63xx) uses JFFS2 bootfs partition
++	  for storing kernel, cferam and some device specific files.
++	  There isn't any straight way of storing rootfs so it gets
++	  appended to the JFFS2 bootfs partition. Kernel needs to find
++	  it and run init from it. This parser is responsible for
++	  finding appended rootfs.
++
++config MTD_SPLIT_SEAMA_FW
++	bool "Seama firmware parser"
++	depends on MTD_SPLIT_SUPPORT
++	select MTD_SPLIT
++
++config MTD_SPLIT_WRGG_FW
++	bool "WRGG firmware parser"
++	depends on MTD_SPLIT_SUPPORT
++	select MTD_SPLIT
++
++config MTD_SPLIT_UIMAGE_FW
++	bool "uImage based firmware partition parser"
++	depends on MTD_SPLIT_SUPPORT
++	select MTD_SPLIT
++
++config MTD_SPLIT_FIT_FW
++	bool "FIT based firmware partition parser"
++	depends on MTD_SPLIT_SUPPORT
++	select MTD_SPLIT
++
++config MTD_SPLIT_LZMA_FW
++	bool "LZMA compressed kernel based firmware partition parser"
++	depends on MTD_SPLIT_SUPPORT
++	select MTD_SPLIT
++
++config MTD_SPLIT_TPLINK_FW
++	bool "TP-Link firmware parser"
++	depends on MTD_SPLIT_SUPPORT
++	select MTD_SPLIT
++
++config MTD_SPLIT_TRX_FW
++	bool "TRX image based firmware partition parser"
++	depends on MTD_SPLIT_SUPPORT
++	select MTD_SPLIT
++
++config MTD_SPLIT_BRNIMAGE_FW
++	bool "brnImage (brnboot image) firmware parser"
++	depends on MTD_SPLIT_SUPPORT
++	select MTD_SPLIT
++
++config MTD_SPLIT_EVA_FW
++	bool "EVA image based firmware partition parser"
++	depends on MTD_SPLIT_SUPPORT
++	select MTD_SPLIT
++
++config MTD_SPLIT_MINOR_FW
++	bool "Mikrotik NOR image based firmware partition parser"
++	depends on MTD_SPLIT_SUPPORT
++	select MTD_SPLIT
++
++config MTD_SPLIT_JIMAGE_FW
++	bool "JBOOT Image based firmware partition parser"
++	depends on MTD_SPLIT_SUPPORT
++	select MTD_SPLIT
++
++config MTD_SPLIT_ELF_FW
++	bool "ELF loader firmware partition parser"
++	depends on MTD_SPLIT_SUPPORT
++	select MTD_SPLIT
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/Makefile b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/Makefile
+new file mode 100644
+index 0000000000..1461099b7c
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/Makefile
+@@ -0,0 +1,17 @@
++obj-$(CONFIG_MTD_SPLIT)		+= mtdsplit.o
++obj-$(CONFIG_MTD_SPLIT_BCM63XX_FW) += mtdsplit_bcm63xx.o
++obj-$(CONFIG_MTD_SPLIT_BCM_WFI_FW) += mtdsplit_bcm_wfi.o
++obj-$(CONFIG_MTD_SPLIT_CFE_BOOTFS) += mtdsplit_cfe_bootfs.o
++obj-$(CONFIG_MTD_SPLIT_SEAMA_FW) += mtdsplit_seama.o
++obj-$(CONFIG_MTD_SPLIT_SQUASHFS_ROOT) += mtdsplit_squashfs.o
++obj-$(CONFIG_MTD_SPLIT_UIMAGE_FW) += mtdsplit_uimage.o
++obj-$(CONFIG_MTD_SPLIT_FIT_FW) += mtdsplit_fit.o
++obj-$(CONFIG_MTD_SPLIT_LZMA_FW) += mtdsplit_lzma.o
++obj-$(CONFIG_MTD_SPLIT_TPLINK_FW) += mtdsplit_tplink.o
++obj-$(CONFIG_MTD_SPLIT_TRX_FW) += mtdsplit_trx.o
++obj-$(CONFIG_MTD_SPLIT_BRNIMAGE_FW) += mtdsplit_brnimage.o
++obj-$(CONFIG_MTD_SPLIT_EVA_FW) += mtdsplit_eva.o
++obj-$(CONFIG_MTD_SPLIT_WRGG_FW) += mtdsplit_wrgg.o
++obj-$(CONFIG_MTD_SPLIT_MINOR_FW) += mtdsplit_minor.o
++obj-$(CONFIG_MTD_SPLIT_JIMAGE_FW) += mtdsplit_jimage.o
++obj-$(CONFIG_MTD_SPLIT_ELF_FW) += mtdsplit_elf.o
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit.c b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit.c
+new file mode 100644
+index 0000000000..b2e51dcfc6
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit.c
+@@ -0,0 +1,130 @@
++/*
++ * Copyright (C) 2009-2013 Felix Fietkau <nbd@nbd.name>
++ * Copyright (C) 2009-2013 Gabor Juhos <juhosg@openwrt.org>
++ * Copyright (C) 2012 Jonas Gorski <jogo@openwrt.org>
++ * Copyright (C) 2013 Hauke Mehrtens <hauke@hauke-m.de>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ *
++ */
++
++#define pr_fmt(fmt)	"mtdsplit: " fmt
++
++#include <linux/export.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/magic.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/byteorder/generic.h>
++
++#include "mtdsplit.h"
++
++#define UBI_EC_MAGIC			0x55424923	/* UBI# */
++
++struct squashfs_super_block {
++	__le32 s_magic;
++	__le32 pad0[9];
++	__le64 bytes_used;
++};
++
++int mtd_get_squashfs_len(struct mtd_info *master,
++			 size_t offset,
++			 size_t *squashfs_len)
++{
++	struct squashfs_super_block sb;
++	size_t retlen;
++	int err;
++
++	err = mtd_read(master, offset, sizeof(sb), &retlen, (void *)&sb);
++	if (err || (retlen != sizeof(sb))) {
++		pr_alert("error occured while reading from \"%s\"\n",
++			 master->name);
++		return -EIO;
++	}
++
++	if (le32_to_cpu(sb.s_magic) != SQUASHFS_MAGIC) {
++		pr_alert("no squashfs found in \"%s\"\n", master->name);
++		return -EINVAL;
++	}
++
++	retlen = le64_to_cpu(sb.bytes_used);
++	if (retlen <= 0) {
++		pr_alert("squashfs is empty in \"%s\"\n", master->name);
++		return -ENODEV;
++	}
++
++	if (offset + retlen > master->size) {
++		pr_alert("squashfs has invalid size in \"%s\"\n",
++			 master->name);
++		return -EINVAL;
++	}
++
++	*squashfs_len = retlen;
++	return 0;
++}
++EXPORT_SYMBOL_GPL(mtd_get_squashfs_len);
++
++static ssize_t mtd_next_eb(struct mtd_info *mtd, size_t offset)
++{
++	return mtd_rounddown_to_eb(offset, mtd) + mtd->erasesize;
++}
++
++int mtd_check_rootfs_magic(struct mtd_info *mtd, size_t offset,
++			   enum mtdsplit_part_type *type)
++{
++	u32 magic;
++	size_t retlen;
++	int ret;
++
++	ret = mtd_read(mtd, offset, sizeof(magic), &retlen,
++		       (unsigned char *) &magic);
++	if (ret)
++		return ret;
++
++	if (retlen != sizeof(magic))
++		return -EIO;
++
++	if (le32_to_cpu(magic) == SQUASHFS_MAGIC) {
++		if (type)
++			*type = MTDSPLIT_PART_TYPE_SQUASHFS;
++		return 0;
++	} else if (magic == 0x19852003) {
++		if (type)
++			*type = MTDSPLIT_PART_TYPE_JFFS2;
++		return 0;
++	} else if (be32_to_cpu(magic) == UBI_EC_MAGIC) {
++		if (type)
++			*type = MTDSPLIT_PART_TYPE_UBI;
++		return 0;
++	}
++
++	return -EINVAL;
++}
++EXPORT_SYMBOL_GPL(mtd_check_rootfs_magic);
++
++int mtd_find_rootfs_from(struct mtd_info *mtd,
++			 size_t from,
++			 size_t limit,
++			 size_t *ret_offset,
++			 enum mtdsplit_part_type *type)
++{
++	size_t offset;
++	int err;
++
++	for (offset = from; offset < limit;
++	     offset = mtd_next_eb(mtd, offset)) {
++		err = mtd_check_rootfs_magic(mtd, offset, type);
++		if (err)
++			continue;
++
++		*ret_offset = offset;
++		return 0;
++	}
++
++	return -ENODEV;
++}
++EXPORT_SYMBOL_GPL(mtd_find_rootfs_from);
++
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit.h b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit.h
+new file mode 100644
+index 0000000000..71d62a8956
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit.h
+@@ -0,0 +1,67 @@
++/*
++ * Copyright (C) 2009-2013 Felix Fietkau <nbd@nbd.name>
++ * Copyright (C) 2009-2013 Gabor Juhos <juhosg@openwrt.org>
++ * Copyright (C) 2012 Jonas Gorski <jogo@openwrt.org>
++ * Copyright (C) 2013 Hauke Mehrtens <hauke@hauke-m.de>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ *
++ */
++
++#ifndef _MTDSPLIT_H
++#define _MTDSPLIT_H
++
++#define KERNEL_PART_NAME	"kernel"
++#define ROOTFS_PART_NAME	"rootfs"
++#define UBI_PART_NAME		"ubi"
++
++#define ROOTFS_SPLIT_NAME	"rootfs_data"
++
++enum mtdsplit_part_type {
++	MTDSPLIT_PART_TYPE_UNK = 0,
++	MTDSPLIT_PART_TYPE_SQUASHFS,
++	MTDSPLIT_PART_TYPE_JFFS2,
++	MTDSPLIT_PART_TYPE_UBI,
++};
++
++#ifdef CONFIG_MTD_SPLIT
++int mtd_get_squashfs_len(struct mtd_info *master,
++			 size_t offset,
++			 size_t *squashfs_len);
++
++int mtd_check_rootfs_magic(struct mtd_info *mtd, size_t offset,
++			   enum mtdsplit_part_type *type);
++
++int mtd_find_rootfs_from(struct mtd_info *mtd,
++			 size_t from,
++			 size_t limit,
++			 size_t *ret_offset,
++			 enum mtdsplit_part_type *type);
++
++#else
++static inline int mtd_get_squashfs_len(struct mtd_info *master,
++				       size_t offset,
++				       size_t *squashfs_len)
++{
++	return -ENODEV;
++}
++
++static inline int mtd_check_rootfs_magic(struct mtd_info *mtd, size_t offset,
++					 enum mtdsplit_part_type *type)
++{
++	return -EINVAL;
++}
++
++static inline int mtd_find_rootfs_from(struct mtd_info *mtd,
++				       size_t from,
++				       size_t limit,
++				       size_t *ret_offset,
++				       enum mtdsplit_part_type *type)
++{
++	return -ENODEV;
++}
++#endif /* CONFIG_MTD_SPLIT */
++
++#endif /* _MTDSPLIT_H */
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_bcm63xx.c b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_bcm63xx.c
+new file mode 100644
+index 0000000000..3a4b8a754f
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_bcm63xx.c
+@@ -0,0 +1,186 @@
++/*
++ * Firmware MTD split for BCM63XX, based on bcm63xxpart.c
++ *
++ * Copyright (C) 2006-2008 Florian Fainelli <florian@openwrt.org>
++ * Copyright (C) 2006-2008 Mike Albon <malbon@openwrt.org>
++ * Copyright (C) 2009-2010 Daniel Dickinson <openwrt@cshore.neomailbox.net>
++ * Copyright (C) 2011-2013 Jonas Gorski <jonas.gorski@gmail.com>
++ * Copyright (C) 2015 Simon Arlott <simon@fire.lp0.eu>
++ * Copyright (C) 2017 �lvaro Fernández Rojas <noltari@gmail.com>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ *
++ */
++
++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
++
++#include <linux/bcm963xx_tag.h>
++#include <linux/crc32.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/byteorder/generic.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++
++#include "mtdsplit.h"
++
++/* Ensure strings read from flash structs are null terminated */
++#define STR_NULL_TERMINATE(x) \
++	do { char *_str = (x); _str[sizeof(x) - 1] = 0; } while (0)
++
++#define BCM63XX_NR_PARTS 2
++
++static int bcm63xx_read_image_tag(struct mtd_info *master, loff_t offset,
++				  struct bcm_tag *hdr)
++{
++	int ret;
++	size_t retlen;
++	u32 computed_crc;
++
++	ret = mtd_read(master, offset, sizeof(*hdr), &retlen, (void *) hdr);
++	if (ret)
++		return ret;
++
++	if (retlen != sizeof(*hdr))
++		return -EIO;
++
++	computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)hdr,
++				offsetof(struct bcm_tag, header_crc));
++	if (computed_crc == hdr->header_crc) {
++	    STR_NULL_TERMINATE(hdr->board_id);
++	    STR_NULL_TERMINATE(hdr->tag_version);
++
++		pr_info("CFE image tag found at 0x%llx with version %s, "
++			"board type %s\n", offset, hdr->tag_version,
++			hdr->board_id);
++
++		return 0;
++	} else {
++		pr_err("CFE image tag at 0x%llx CRC invalid "
++		       "(expected %08x, actual %08x)\n",
++		       offset, hdr->header_crc, computed_crc);
++
++		return 1;
++	}
++}
++
++static int bcm63xx_parse_partitions(struct mtd_info *master,
++				    const struct mtd_partition **pparts,
++				    struct bcm_tag *hdr)
++{
++	struct mtd_partition *parts;
++	unsigned int flash_image_start;
++	unsigned int kernel_address;
++	unsigned int kernel_length;
++	size_t kernel_offset = 0, kernel_size = 0;
++	size_t rootfs_offset = 0, rootfs_size = 0;
++	int kernel_part, rootfs_part;
++
++	STR_NULL_TERMINATE(hdr->flash_image_start);
++	if (kstrtouint(hdr->flash_image_start, 10, &flash_image_start) ||
++	    flash_image_start < BCM963XX_EXTENDED_SIZE) {
++		pr_err("invalid rootfs address: %*ph\n",
++		       (int) sizeof(hdr->flash_image_start),
++		       hdr->flash_image_start);
++		return -EINVAL;
++	}
++
++	STR_NULL_TERMINATE(hdr->kernel_address);
++	if (kstrtouint(hdr->kernel_address, 10, &kernel_address) ||
++	    kernel_address < BCM963XX_EXTENDED_SIZE) {
++		pr_err("invalid kernel address: %*ph\n",
++		       (int) sizeof(hdr->kernel_address), hdr->kernel_address);
++		return -EINVAL;
++	}
++
++	STR_NULL_TERMINATE(hdr->kernel_length);
++	if (kstrtouint(hdr->kernel_length, 10, &kernel_length) ||
++	    !kernel_length) {
++		pr_err("invalid kernel length: %*ph\n",
++		       (int) sizeof(hdr->kernel_length), hdr->kernel_length);
++		return -EINVAL;
++	}
++
++	kernel_offset = kernel_address - BCM963XX_EXTENDED_SIZE -
++			mtdpart_get_offset(master);
++	kernel_size = kernel_length;
++
++	if (flash_image_start < kernel_address) {
++		/* rootfs first */
++		rootfs_part = 0;
++		kernel_part = 1;
++		rootfs_offset = flash_image_start - BCM963XX_EXTENDED_SIZE -
++				mtdpart_get_offset(master);
++		rootfs_size = kernel_offset - rootfs_offset;
++	} else {
++		/* kernel first */
++		kernel_part = 0;
++		rootfs_part = 1;
++		rootfs_offset = kernel_offset + kernel_size;
++		rootfs_size = master->size - rootfs_offset;
++	}
++
++	if (mtd_check_rootfs_magic(master, rootfs_offset, NULL))
++		pr_warn("rootfs magic not found\n");
++
++	parts = kzalloc(BCM63XX_NR_PARTS * sizeof(*parts), GFP_KERNEL);
++	if (!parts)
++		return -ENOMEM;
++
++	parts[kernel_part].name = KERNEL_PART_NAME;
++	parts[kernel_part].offset = kernel_offset;
++	parts[kernel_part].size = kernel_size;
++
++	parts[rootfs_part].name = ROOTFS_PART_NAME;
++	parts[rootfs_part].offset = rootfs_offset;
++	parts[rootfs_part].size = rootfs_size;
++
++	*pparts = parts;
++	return BCM63XX_NR_PARTS;
++}
++
++static int mtdsplit_parse_bcm63xx(struct mtd_info *master,
++				  const struct mtd_partition **pparts,
++				  struct mtd_part_parser_data *data)
++{
++	struct bcm_tag hdr;
++	loff_t offset;
++
++	if (mtd_type_is_nand(master))
++		return -EINVAL;
++
++	/* find bcm63xx_cfe image on erase block boundaries */
++	for (offset = 0; offset < master->size; offset += master->erasesize) {
++		if (!bcm63xx_read_image_tag(master, offset, (void *) &hdr))
++			return bcm63xx_parse_partitions(master, pparts,
++							(void *) &hdr);
++	}
++
++	return -EINVAL;
++}
++
++static const struct of_device_id mtdsplit_fit_of_match_table[] = {
++	{ .compatible = "brcm,bcm963xx-imagetag" },
++	{ },
++};
++
++static struct mtd_part_parser mtdsplit_bcm63xx_parser = {
++	.owner = THIS_MODULE,
++	.name = "bcm63xx-fw",
++	.of_match_table = mtdsplit_fit_of_match_table,
++	.parse_fn = mtdsplit_parse_bcm63xx,
++	.type = MTD_PARSER_TYPE_FIRMWARE,
++};
++
++static int __init mtdsplit_bcm63xx_init(void)
++{
++	register_mtd_parser(&mtdsplit_bcm63xx_parser);
++
++	return 0;
++}
++
++module_init(mtdsplit_bcm63xx_init);
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_bcm_wfi.c b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_bcm_wfi.c
+new file mode 100644
+index 0000000000..1ddcf6745f
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_bcm_wfi.c
+@@ -0,0 +1,523 @@
++/*
++ * MTD split for Broadcom Whole Flash Image
++ *
++ * Copyright (C) 2020 �lvaro Fernández Rojas <noltari@gmail.com>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ *
++ */
++
++#define je16_to_cpu(x) ((x).v16)
++#define je32_to_cpu(x) ((x).v32)
++
++#include <linux/crc32.h>
++#include <linux/init.h>
++#include <linux/jffs2.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/byteorder/generic.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++
++#include "mtdsplit.h"
++
++#define char_to_num(c)		((c >= '0' && c <= '9') ? (c - '0') : (0))
++
++#define BCM_WFI_PARTS		3
++#define BCM_WFI_SPLIT_PARTS	2
++
++#define CFERAM_NAME		"cferam"
++#define CFERAM_NAME_LEN		(sizeof(CFERAM_NAME) - 1)
++#define KERNEL_NAME		"vmlinux.lz"
++#define KERNEL_NAME_LEN		(sizeof(KERNEL_NAME) - 1)
++#define OPENWRT_NAME		"1-openwrt"
++#define OPENWRT_NAME_LEN	(sizeof(OPENWRT_NAME) - 1)
++
++#define UBI_MAGIC		0x55424923
++
++#define CFE_MAGIC_PFX		"cferam."
++#define CFE_MAGIC_PFX_LEN	(sizeof(CFE_MAGIC_PFX) - 1)
++#define CFE_MAGIC		"cferam.000"
++#define CFE_MAGIC_LEN		(sizeof(CFE_MAGIC) - 1)
++#define SERCOMM_MAGIC_PFX	"eRcOmM."
++#define SERCOMM_MAGIC_PFX_LEN	(sizeof(SERCOMM_MAGIC_PFX) - 1)
++#define SERCOMM_MAGIC		"eRcOmM.000"
++#define SERCOMM_MAGIC_LEN	(sizeof(SERCOMM_MAGIC) - 1)
++
++#define PART_CFERAM		"cferam"
++#define PART_FIRMWARE		"firmware"
++#define PART_IMAGE_1		"img1"
++#define PART_IMAGE_2		"img2"
++
++static u32 jffs2_dirent_crc(struct jffs2_raw_dirent *node)
++{
++	return crc32(0, node, sizeof(struct jffs2_raw_dirent) - 8);
++}
++
++static bool jffs2_dirent_valid(struct jffs2_raw_dirent *node)
++{
++	return ((je16_to_cpu(node->magic) == JFFS2_MAGIC_BITMASK) &&
++		(je16_to_cpu(node->nodetype) == JFFS2_NODETYPE_DIRENT) &&
++		je32_to_cpu(node->ino) &&
++		je32_to_cpu(node->node_crc) == jffs2_dirent_crc(node));
++}
++
++static int jffs2_find_file(struct mtd_info *mtd, uint8_t *buf,
++			   const char *name, size_t name_len,
++			   loff_t *offs, loff_t size,
++			   char **out_name, size_t *out_name_len)
++{
++	const loff_t end = *offs + size;
++	struct jffs2_raw_dirent *node;
++	bool valid = false;
++	size_t retlen;
++	uint16_t magic;
++	int rc;
++
++	for (; *offs < end; *offs += mtd->erasesize) {
++		unsigned int block_offs = 0;
++
++		/* Skip CFE erased blocks */
++		rc = mtd_read(mtd, *offs, sizeof(magic), &retlen,
++			      (void *) &magic);
++		if (rc || retlen != sizeof(magic)) {
++			continue;
++		}
++
++		/* Skip blocks not starting with JFFS2 magic */
++		if (magic != JFFS2_MAGIC_BITMASK)
++			continue;
++
++		/* Read full block */
++		rc = mtd_read(mtd, *offs, mtd->erasesize, &retlen,
++			      (void *) buf);
++		if (rc)
++			return rc;
++		if (retlen != mtd->erasesize)
++			return -EINVAL;
++
++		while (block_offs < mtd->erasesize) {
++			node = (struct jffs2_raw_dirent *) &buf[block_offs];
++
++			if (!jffs2_dirent_valid(node)) {
++				block_offs += 4;
++				continue;
++			}
++
++			if (!memcmp(node->name, OPENWRT_NAME,
++				    OPENWRT_NAME_LEN)) {
++				valid = true;
++			} else if (!memcmp(node->name, name, name_len)) {
++				if (!valid)
++					return -EINVAL;
++
++				if (out_name)
++					*out_name = kstrndup(node->name,
++							     node->nsize,
++							     GFP_KERNEL);
++
++				if (out_name_len)
++					*out_name_len = node->nsize;
++
++				return 0;
++			}
++
++			block_offs += je32_to_cpu(node->totlen);
++			block_offs = (block_offs + 0x3) & ~0x3;
++		}
++	}
++
++	return -ENOENT;
++}
++
++static int ubifs_find(struct mtd_info *mtd, loff_t *offs, loff_t size)
++{
++	const loff_t end = *offs + size;
++	uint32_t magic;
++	size_t retlen;
++	int rc;
++
++	for (; *offs < end; *offs += mtd->erasesize) {
++		rc = mtd_read(mtd, *offs, sizeof(magic), &retlen,
++			      (unsigned char *) &magic);
++		if (rc || retlen != sizeof(magic))
++			continue;
++
++		if (be32_to_cpu(magic) == UBI_MAGIC)
++			return 0;
++	}
++
++	return -ENOENT;
++}
++
++static int parse_bcm_wfi(struct mtd_info *master,
++			 const struct mtd_partition **pparts,
++			 uint8_t *buf, loff_t off, loff_t size, bool cfe_part)
++{
++	struct mtd_partition *parts;
++	loff_t cfe_off, kernel_off, rootfs_off;
++	unsigned int num_parts = BCM_WFI_PARTS, cur_part = 0;
++	int ret;
++
++	if (cfe_part) {
++		num_parts++;
++		cfe_off = off;
++
++		ret = jffs2_find_file(master, buf, CFERAM_NAME,
++				      CFERAM_NAME_LEN, &cfe_off,
++				      size - (cfe_off - off), NULL, NULL);
++		if (ret)
++			return ret;
++
++		kernel_off = cfe_off + master->erasesize;
++	} else {
++		kernel_off = off;
++	}
++
++	ret = jffs2_find_file(master, buf, KERNEL_NAME, KERNEL_NAME_LEN,
++			      &kernel_off, size - (kernel_off - off),
++			      NULL, NULL);
++	if (ret)
++		return ret;
++
++	rootfs_off = kernel_off + master->erasesize;
++	ret = ubifs_find(master, &rootfs_off, size - (rootfs_off - off));
++	if (ret)
++		return ret;
++
++	parts = kzalloc(num_parts * sizeof(*parts), GFP_KERNEL);
++	if (!parts)
++		return -ENOMEM;
++
++	if (cfe_part) {
++		parts[cur_part].name = PART_CFERAM;
++		parts[cur_part].mask_flags = MTD_WRITEABLE;
++		parts[cur_part].offset = cfe_off;
++		parts[cur_part].size = kernel_off - cfe_off;
++		cur_part++;
++	}
++
++	parts[cur_part].name = PART_FIRMWARE;
++	parts[cur_part].offset = kernel_off;
++	parts[cur_part].size = size - (kernel_off - off);
++	cur_part++;
++
++	parts[cur_part].name = KERNEL_PART_NAME;
++	parts[cur_part].offset = kernel_off;
++	parts[cur_part].size = rootfs_off - kernel_off;
++	cur_part++;
++
++	parts[cur_part].name = UBI_PART_NAME;
++	parts[cur_part].offset = rootfs_off;
++	parts[cur_part].size = size - (rootfs_off - off);
++	cur_part++;
++
++	*pparts = parts;
++
++	return num_parts;
++}
++
++static int mtdsplit_parse_bcm_wfi(struct mtd_info *master,
++				  const struct mtd_partition **pparts,
++				  struct mtd_part_parser_data *data)
++{
++	struct device_node *mtd_node;
++	bool cfe_part = true;
++	uint8_t *buf;
++	int ret;
++
++	mtd_node = mtd_get_of_node(master);
++	if (!mtd_node)
++		return -EINVAL;
++
++	buf = kzalloc(master->erasesize, GFP_KERNEL);
++	if (!buf)
++		return -ENOMEM;
++
++	if (of_property_read_bool(mtd_node, "brcm,no-cferam"))
++		cfe_part = false;
++
++	ret = parse_bcm_wfi(master, pparts, buf, 0, master->size, cfe_part);
++
++	kfree(buf);
++
++	return ret;
++}
++
++static const struct of_device_id mtdsplit_bcm_wfi_of_match[] = {
++	{ .compatible = "brcm,wfi" },
++	{ },
++};
++
++static struct mtd_part_parser mtdsplit_bcm_wfi_parser = {
++	.owner = THIS_MODULE,
++	.name = "bcm-wfi-fw",
++	.of_match_table = mtdsplit_bcm_wfi_of_match,
++	.parse_fn = mtdsplit_parse_bcm_wfi,
++	.type = MTD_PARSER_TYPE_FIRMWARE,
++};
++
++static int cferam_bootflag_value(const char *name, size_t name_len)
++{
++	int rc = -ENOENT;
++
++	if (name &&
++	    (name_len >= CFE_MAGIC_LEN) &&
++	    !memcmp(name, CFE_MAGIC_PFX, CFE_MAGIC_PFX_LEN)) {
++		rc = char_to_num(name[CFE_MAGIC_PFX_LEN + 0]) * 100;
++		rc += char_to_num(name[CFE_MAGIC_PFX_LEN + 1]) * 10;
++		rc += char_to_num(name[CFE_MAGIC_PFX_LEN + 2]) * 1;
++	}
++
++	return rc;
++}
++
++static int mtdsplit_parse_bcm_wfi_split(struct mtd_info *master,
++					const struct mtd_partition **pparts,
++					struct mtd_part_parser_data *data)
++{
++	struct mtd_partition *parts;
++	loff_t cfe_off;
++	loff_t img1_off = 0;
++	loff_t img2_off = master->size / 2;
++	loff_t img1_size = (img2_off - img1_off);
++	loff_t img2_size = (master->size - img2_off);
++	loff_t active_off, inactive_off;
++	loff_t active_size, inactive_size;
++	const char *inactive_name;
++	uint8_t *buf;
++	char *cfe1_name = NULL, *cfe2_name = NULL;
++	size_t cfe1_size = 0, cfe2_size = 0;
++	int ret;
++	int bf1, bf2;
++
++	buf = kzalloc(master->erasesize, GFP_KERNEL);
++	if (!buf)
++		return -ENOMEM;
++
++	cfe_off = img1_off;
++	ret = jffs2_find_file(master, buf, CFERAM_NAME, CFERAM_NAME_LEN,
++			      &cfe_off, img1_size, &cfe1_name, &cfe1_size);
++
++	cfe_off = img2_off;
++	ret = jffs2_find_file(master, buf, CFERAM_NAME, CFERAM_NAME_LEN,
++			      &cfe_off, img2_size, &cfe2_name, &cfe2_size);
++
++	bf1 = cferam_bootflag_value(cfe1_name, cfe1_size);
++	if (bf1 >= 0)
++		printk("cferam: bootflag1=%d\n", bf1);
++
++	bf2 = cferam_bootflag_value(cfe2_name, cfe2_size);
++	if (bf2 >= 0)
++		printk("cferam: bootflag2=%d\n", bf2);
++
++	kfree(cfe1_name);
++	kfree(cfe2_name);
++
++	if (bf1 >= bf2) {
++		active_off = img1_off;
++		active_size = img1_size;
++		inactive_off = img2_off;
++		inactive_size = img2_size;
++		inactive_name = PART_IMAGE_2;
++	} else {
++		active_off = img2_off;
++		active_size = img2_size;
++		inactive_off = img1_off;
++		inactive_size = img1_size;
++		inactive_name = PART_IMAGE_1;
++	}
++
++	ret = parse_bcm_wfi(master, pparts, buf, active_off, active_size, true);
++
++	kfree(buf);
++
++	if (ret > 0) {
++		parts = kzalloc((ret + 1) * sizeof(*parts), GFP_KERNEL);
++		if (!parts)
++			return -ENOMEM;
++
++		memcpy(parts, *pparts, ret * sizeof(*parts));
++		kfree(*pparts);
++
++		parts[ret].name = inactive_name;
++		parts[ret].offset = inactive_off;
++		parts[ret].size = inactive_size;
++		ret++;
++
++		*pparts = parts;
++	} else {
++		parts = kzalloc(BCM_WFI_SPLIT_PARTS * sizeof(*parts), GFP_KERNEL);
++
++		parts[0].name = PART_IMAGE_1;
++		parts[0].offset = img1_off;
++		parts[0].size = img1_size;
++
++		parts[1].name = PART_IMAGE_2;
++		parts[1].offset = img2_off;
++		parts[1].size = img2_size;
++
++		*pparts = parts;
++	}
++
++	return ret;
++}
++
++static const struct of_device_id mtdsplit_bcm_wfi_split_of_match[] = {
++	{ .compatible = "brcm,wfi-split" },
++	{ },
++};
++
++static struct mtd_part_parser mtdsplit_bcm_wfi_split_parser = {
++	.owner = THIS_MODULE,
++	.name = "bcm-wfi-split-fw",
++	.of_match_table = mtdsplit_bcm_wfi_split_of_match,
++	.parse_fn = mtdsplit_parse_bcm_wfi_split,
++	.type = MTD_PARSER_TYPE_FIRMWARE,
++};
++
++static int sercomm_bootflag_value(struct mtd_info *mtd, uint8_t *buf)
++{
++	size_t retlen;
++	loff_t offs;
++	int rc;
++
++	for (offs = 0; offs < mtd->size; offs += mtd->erasesize) {
++		rc = mtd_read(mtd, offs, SERCOMM_MAGIC_LEN, &retlen, buf);
++		if (rc || retlen != SERCOMM_MAGIC_LEN)
++			continue;
++
++		if (memcmp(buf, SERCOMM_MAGIC_PFX, SERCOMM_MAGIC_PFX_LEN))
++			continue;
++
++		rc = char_to_num(buf[SERCOMM_MAGIC_PFX_LEN + 0]) * 100;
++		rc += char_to_num(buf[SERCOMM_MAGIC_PFX_LEN + 1]) * 10;
++		rc += char_to_num(buf[SERCOMM_MAGIC_PFX_LEN + 2]) * 1;
++
++		return rc;
++	}
++
++	return -ENOENT;
++}
++
++static int mtdsplit_parse_ser_wfi(struct mtd_info *master,
++				  const struct mtd_partition **pparts,
++				  struct mtd_part_parser_data *data)
++{
++	struct mtd_partition *parts;
++	struct mtd_info *mtd_bf1, *mtd_bf2;
++	loff_t img1_off = 0;
++	loff_t img2_off = master->size / 2;
++	loff_t img1_size = (img2_off - img1_off);
++	loff_t img2_size = (master->size - img2_off);
++	loff_t active_off, inactive_off;
++	loff_t active_size, inactive_size;
++	const char *inactive_name;
++	uint8_t *buf;
++	int bf1, bf2;
++	int ret;
++
++	mtd_bf1 = get_mtd_device_nm("bootflag1");
++	if (IS_ERR(mtd_bf1))
++		return -ENOENT;
++
++	mtd_bf2 = get_mtd_device_nm("bootflag2");
++	if (IS_ERR(mtd_bf2))
++		return -ENOENT;
++
++	buf = kzalloc(master->erasesize, GFP_KERNEL);
++	if (!buf)
++		return -ENOMEM;
++
++	bf1 = sercomm_bootflag_value(mtd_bf1, buf);
++	if (bf1 >= 0)
++		printk("sercomm: bootflag1=%d\n", bf1);
++
++	bf2 = sercomm_bootflag_value(mtd_bf2, buf);
++	if (bf2 >= 0)
++		printk("sercomm: bootflag2=%d\n", bf2);
++
++	if (bf1 == bf2 && bf2 >= 0) {
++		struct erase_info bf_erase;
++
++		bf2 = -ENOENT;
++		bf_erase.addr = 0;
++		bf_erase.len = mtd_bf2->size;
++		mtd_erase(mtd_bf2, &bf_erase);
++	}
++
++	if (bf1 >= bf2) {
++		active_off = img1_off;
++		active_size = img1_size;
++		inactive_off = img2_off;
++		inactive_size = img2_size;
++		inactive_name = PART_IMAGE_2;
++	} else {
++		active_off = img2_off;
++		active_size = img2_size;
++		inactive_off = img1_off;
++		inactive_size = img1_size;
++		inactive_name = PART_IMAGE_1;
++	}
++
++	ret = parse_bcm_wfi(master, pparts, buf, active_off, active_size, false);
++
++	kfree(buf);
++
++	if (ret > 0) {
++		parts = kzalloc((ret + 1) * sizeof(*parts), GFP_KERNEL);
++		if (!parts)
++			return -ENOMEM;
++
++		memcpy(parts, *pparts, ret * sizeof(*parts));
++		kfree(*pparts);
++
++		parts[ret].name = inactive_name;
++		parts[ret].offset = inactive_off;
++		parts[ret].size = inactive_size;
++		ret++;
++
++		*pparts = parts;
++	} else {
++		parts = kzalloc(BCM_WFI_SPLIT_PARTS * sizeof(*parts), GFP_KERNEL);
++
++		parts[0].name = PART_IMAGE_1;
++		parts[0].offset = img1_off;
++		parts[0].size = img1_size;
++
++		parts[1].name = PART_IMAGE_2;
++		parts[1].offset = img2_off;
++		parts[1].size = img2_size;
++
++		*pparts = parts;
++	}
++
++	return ret;
++}
++
++static const struct of_device_id mtdsplit_ser_wfi_of_match[] = {
++	{ .compatible = "sercomm,wfi" },
++	{ },
++};
++
++static struct mtd_part_parser mtdsplit_ser_wfi_parser = {
++	.owner = THIS_MODULE,
++	.name = "ser-wfi-fw",
++	.of_match_table = mtdsplit_ser_wfi_of_match,
++	.parse_fn = mtdsplit_parse_ser_wfi,
++	.type = MTD_PARSER_TYPE_FIRMWARE,
++};
++
++static int __init mtdsplit_bcm_wfi_init(void)
++{
++	register_mtd_parser(&mtdsplit_bcm_wfi_parser);
++	register_mtd_parser(&mtdsplit_bcm_wfi_split_parser);
++	register_mtd_parser(&mtdsplit_ser_wfi_parser);
++
++	return 0;
++}
++
++module_init(mtdsplit_bcm_wfi_init);
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_brnimage.c b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_brnimage.c
+new file mode 100644
+index 0000000000..3f2d79601a
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_brnimage.c
+@@ -0,0 +1,104 @@
++/*
++ *  Copyright (C) 2012 John Crispin <blogic@openwrt.org>
++ *  Copyright (C) 2015 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/slab.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/byteorder/generic.h>
++
++#include "mtdsplit.h"
++
++#define BRNIMAGE_NR_PARTS	2
++
++#define BRNIMAGE_ALIGN_BYTES	0x400
++#define BRNIMAGE_FOOTER_SIZE	12
++
++#define BRNIMAGE_MIN_OVERHEAD	(BRNIMAGE_FOOTER_SIZE)
++#define BRNIMAGE_MAX_OVERHEAD	(BRNIMAGE_ALIGN_BYTES + BRNIMAGE_FOOTER_SIZE)
++
++static int mtdsplit_parse_brnimage(struct mtd_info *master,
++				const struct mtd_partition **pparts,
++				struct mtd_part_parser_data *data)
++{
++	struct mtd_partition *parts;
++	uint32_t buf;
++	unsigned long rootfs_offset, rootfs_size, kernel_size;
++	size_t len;
++	int ret = 0;
++
++	for (rootfs_offset = 0; rootfs_offset < master->size;
++	     rootfs_offset += BRNIMAGE_ALIGN_BYTES) {
++		ret = mtd_check_rootfs_magic(master, rootfs_offset, NULL);
++		if (!ret)
++			break;
++	}
++
++	if (ret)
++		return ret;
++
++	if (rootfs_offset >= master->size)
++		return -EINVAL;
++
++	ret = mtd_read(master, rootfs_offset - BRNIMAGE_FOOTER_SIZE, 4, &len,
++			(void *)&buf);
++	if (ret)
++		return ret;
++
++	if (len != 4)
++		return -EIO;
++
++	kernel_size = le32_to_cpu(buf);
++
++	if (kernel_size > (rootfs_offset - BRNIMAGE_MIN_OVERHEAD))
++		return -EINVAL;
++
++	if (kernel_size < (rootfs_offset - BRNIMAGE_MAX_OVERHEAD))
++		return -EINVAL;
++
++	/*
++	 * The footer must be untouched as it contains the checksum of the
++	 * original brnImage (kernel + squashfs)!
++	 */
++	rootfs_size = master->size - rootfs_offset - BRNIMAGE_FOOTER_SIZE;
++
++	parts = kzalloc(BRNIMAGE_NR_PARTS * sizeof(*parts), GFP_KERNEL);
++	if (!parts)
++		return -ENOMEM;
++
++	parts[0].name = KERNEL_PART_NAME;
++	parts[0].offset = 0;
++	parts[0].size = kernel_size;
++
++	parts[1].name = ROOTFS_PART_NAME;
++	parts[1].offset = rootfs_offset;
++	parts[1].size = rootfs_size;
++
++	*pparts = parts;
++	return BRNIMAGE_NR_PARTS;
++}
++
++static struct mtd_part_parser mtdsplit_brnimage_parser = {
++	.owner = THIS_MODULE,
++	.name = "brnimage-fw",
++	.parse_fn = mtdsplit_parse_brnimage,
++	.type = MTD_PARSER_TYPE_FIRMWARE,
++};
++
++static int __init mtdsplit_brnimage_init(void)
++{
++	register_mtd_parser(&mtdsplit_brnimage_parser);
++
++	return 0;
++}
++
++subsys_initcall(mtdsplit_brnimage_init);
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_cfe_bootfs.c b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_cfe_bootfs.c
+new file mode 100644
+index 0000000000..a3474c9dc2
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_cfe_bootfs.c
+@@ -0,0 +1,90 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl>
++ */
++
++#include <linux/init.h>
++#include <linux/jffs2.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/of.h>
++#include <linux/slab.h>
++
++#include "mtdsplit.h"
++
++#define je16_to_cpu(x) ((x).v16)
++#define je32_to_cpu(x) ((x).v32)
++
++#define NR_PARTS		2
++
++static int mtdsplit_cfe_bootfs_parse(struct mtd_info *mtd,
++				     const struct mtd_partition **pparts,
++				     struct mtd_part_parser_data *data)
++{
++	struct jffs2_raw_dirent node;
++	enum mtdsplit_part_type type;
++	struct mtd_partition *parts;
++	size_t rootfs_offset;
++	size_t retlen;
++	size_t offset;
++	int err;
++
++	/* Don't parse backup partitions */
++	if (strcmp(mtd->name, "firmware"))
++		return -EINVAL;
++
++	/* Find the end of JFFS2 bootfs partition */
++	offset = 0;
++	do {
++		err = mtd_read(mtd, offset, sizeof(node), &retlen, (void *)&node);
++		if (err || retlen != sizeof(node))
++			break;
++
++		if (je16_to_cpu(node.magic) != JFFS2_MAGIC_BITMASK)
++			break;
++
++		offset += je32_to_cpu(node.totlen);
++		offset = (offset + 0x3) & ~0x3;
++	} while (offset < mtd->size);
++
++	/* Find rootfs partition that follows the bootfs */
++	err = mtd_find_rootfs_from(mtd, mtd->erasesize, mtd->size, &rootfs_offset, &type);
++	if (err)
++		return err;
++
++	parts = kzalloc(NR_PARTS * sizeof(*parts), GFP_KERNEL);
++	if (!parts)
++		return -ENOMEM;
++
++	parts[0].name = "bootfs";
++	parts[0].offset = 0;
++	parts[0].size = rootfs_offset;
++
++	if (type == MTDSPLIT_PART_TYPE_UBI)
++		parts[1].name = UBI_PART_NAME;
++	else
++		parts[1].name = ROOTFS_PART_NAME;
++	parts[1].offset = rootfs_offset;
++	parts[1].size = mtd->size - rootfs_offset;
++
++	*pparts = parts;
++
++	return NR_PARTS;
++}
++
++static const struct of_device_id mtdsplit_cfe_bootfs_of_match_table[] = {
++	{ .compatible = "brcm,bcm4908-firmware" },
++	{},
++};
++MODULE_DEVICE_TABLE(of, mtdsplit_cfe_bootfs_of_match_table);
++
++static struct mtd_part_parser mtdsplit_cfe_bootfs_parser = {
++	.owner = THIS_MODULE,
++	.name = "cfe-bootfs",
++	.of_match_table = mtdsplit_cfe_bootfs_of_match_table,
++	.parse_fn = mtdsplit_cfe_bootfs_parse,
++};
++
++module_mtd_part_parser(mtdsplit_cfe_bootfs_parser);
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_elf.c b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_elf.c
+new file mode 100644
+index 0000000000..47818416f6
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_elf.c
+@@ -0,0 +1,287 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++/*
++ *  MTD splitter for ELF loader firmware partitions
++ *
++ *  Copyright (C) 2020 Sander Vanheule <sander@svanheule.net>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License as published by the Free
++ *  Software Foundation; version 2.
++ *
++ *  To parse the ELF kernel loader, a small ELF parser is used that can
++ *  handle both ELF32 or ELF64 class loaders. The splitter assumes that the
++ *  kernel is always located before the rootfs, whether it is embedded in the
++ *  loader or not.
++ *
++ *  The kernel image is preferably embedded inside the ELF loader, so the end
++ *  of the loader equals the end of the kernel partition. This is due to the
++ *  way mtd_find_rootfs_from searches for the the rootfs:
++ *  - if the kernel image is embedded in the loader, the appended rootfs may
++ *    follow the loader immediately, within the same erase block.
++ *  - if the kernel image is not embedded in the loader, but placed at some
++ *    offset behind the loader (OKLI-style loader), the rootfs must be
++ *    aligned to an erase-block after the loader and kernel image.
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/slab.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/of.h>
++#include <linux/byteorder/generic.h>
++
++#include "mtdsplit.h"
++
++#define ELF_NR_PARTS	2
++
++#define ELF_MAGIC	0x7f454c46 /* 0x7f E L F */
++#define ELF_CLASS_32	1
++#define ELF_CLASS_64	2
++
++struct elf_header_ident {
++	uint32_t magic;
++	uint8_t class;
++	uint8_t data;
++	uint8_t version;
++	uint8_t osabi;
++	uint8_t abiversion;
++	uint8_t pad[7];
++};
++
++struct elf_header_32 {
++	uint16_t type;
++	uint16_t machine;
++	uint32_t version;
++	uint32_t entry;
++	uint32_t phoff;
++	uint32_t shoff;
++	uint32_t flags;
++	uint16_t ehsize;
++	uint16_t phentsize;
++	uint16_t phnum;
++	uint16_t shentsize;
++	uint16_t shnum;
++	uint16_t shstrndx;
++};
++
++struct elf_header_64 {
++	uint16_t type;
++	uint16_t machine;
++	uint32_t version;
++	uint64_t entry;
++	uint64_t phoff;
++	uint64_t shoff;
++	uint32_t flags;
++	uint16_t ehsize;
++	uint16_t phentsize;
++	uint16_t phnum;
++	uint16_t shentsize;
++	uint16_t shnum;
++	uint16_t shstrndx;
++};
++
++struct elf_header {
++	struct elf_header_ident ident;
++	union {
++		struct elf_header_32 elf32;
++		struct elf_header_64 elf64;
++	};
++};
++
++struct elf_program_header_32 {
++	uint32_t type;
++	uint32_t offset;
++	uint32_t vaddr;
++	uint32_t paddr;
++	uint32_t filesize;
++	uint32_t memsize;
++	uint32_t flags;
++};
++
++struct elf_program_header_64 {
++	uint32_t type;
++	uint32_t flags;
++	uint64_t offset;
++	uint64_t vaddr;
++	uint64_t paddr;
++	uint64_t filesize;
++	uint64_t memsize;
++};
++
++
++static int mtdsplit_elf_read_mtd(struct mtd_info *mtd, size_t offset,
++				 uint8_t *dst, size_t len)
++{
++	size_t retlen;
++	int ret;
++
++	ret = mtd_read(mtd, offset, len, &retlen, dst);
++	if (ret) {
++		pr_debug("read error in \"%s\"\n", mtd->name);
++		return ret;
++	}
++
++	if (retlen != len) {
++		pr_debug("short read in \"%s\"\n", mtd->name);
++		return -EIO;
++	}
++
++	return 0;
++}
++
++static int elf32_determine_size(struct mtd_info *mtd, struct elf_header *hdr,
++				size_t *size)
++{
++	struct elf_header_32 *hdr32 = &(hdr->elf32);
++	int err;
++	size_t section_end, ph_table_end, ph_entry;
++	struct elf_program_header_32 ph;
++
++	*size = 0;
++
++	if (hdr32->shoff > 0) {
++		*size = hdr32->shoff + hdr32->shentsize * hdr32->shnum;
++		return 0;
++	}
++
++	ph_entry = hdr32->phoff;
++	ph_table_end = hdr32->phoff + hdr32->phentsize * hdr32->phnum;
++
++	while (ph_entry < ph_table_end) {
++		err = mtdsplit_elf_read_mtd(mtd, ph_entry, (uint8_t *)(&ph),
++					    sizeof(ph));
++		if (err)
++			return err;
++
++		section_end = ph.offset + ph.filesize;
++		if (section_end > *size)
++			*size = section_end;
++
++		ph_entry += hdr32->phentsize;
++	}
++
++	return 0;
++}
++
++static int elf64_determine_size(struct mtd_info *mtd, struct elf_header *hdr,
++				size_t *size)
++{
++	struct elf_header_64 *hdr64 = &(hdr->elf64);
++	int err;
++	size_t section_end, ph_table_end, ph_entry;
++	struct elf_program_header_64 ph;
++
++	*size = 0;
++
++	if (hdr64->shoff > 0) {
++		*size = hdr64->shoff + hdr64->shentsize * hdr64->shnum;
++		return 0;
++	}
++
++	ph_entry = hdr64->phoff;
++	ph_table_end = hdr64->phoff + hdr64->phentsize * hdr64->phnum;
++
++	while (ph_entry < ph_table_end) {
++		err = mtdsplit_elf_read_mtd(mtd, ph_entry, (uint8_t *)(&ph),
++					    sizeof(ph));
++		if (err)
++			return err;
++
++		section_end = ph.offset + ph.filesize;
++		if (section_end > *size)
++			*size = section_end;
++
++		ph_entry += hdr64->phentsize;
++	}
++
++	return 0;
++}
++
++static int mtdsplit_parse_elf(struct mtd_info *mtd,
++			      const struct mtd_partition **pparts,
++			      struct mtd_part_parser_data *data)
++{
++	struct elf_header hdr;
++	size_t loader_size, rootfs_offset;
++	enum mtdsplit_part_type type;
++	struct mtd_partition *parts;
++	int err;
++
++	err = mtdsplit_elf_read_mtd(mtd, 0, (uint8_t *)&hdr, sizeof(hdr));
++	if (err)
++		return err;
++
++	if (be32_to_cpu(hdr.ident.magic) != ELF_MAGIC) {
++		pr_debug("invalid ELF magic %08x\n",
++			 be32_to_cpu(hdr.ident.magic));
++		return -EINVAL;
++	}
++
++	switch (hdr.ident.class) {
++	case ELF_CLASS_32:
++		err = elf32_determine_size(mtd, &hdr, &loader_size);
++		break;
++	case ELF_CLASS_64:
++		err = elf64_determine_size(mtd, &hdr, &loader_size);
++		break;
++	default:
++		pr_debug("invalid ELF class %i\n", hdr.ident.class);
++		err = -EINVAL;
++	}
++
++	if (err)
++		return err;
++
++	err = mtd_find_rootfs_from(mtd, loader_size, mtd->size,
++				   &rootfs_offset, &type);
++	if (err)
++		return err;
++
++	if (rootfs_offset == mtd->size) {
++		pr_debug("no rootfs found in \"%s\"\n", mtd->name);
++		return -ENODEV;
++	}
++
++	parts = kzalloc(ELF_NR_PARTS * sizeof(*parts), GFP_KERNEL);
++	if (!parts)
++		return -ENOMEM;
++
++	parts[0].name = KERNEL_PART_NAME;
++	parts[0].offset = 0;
++	parts[0].size = rootfs_offset;
++
++	if (type == MTDSPLIT_PART_TYPE_UBI)
++		parts[1].name = UBI_PART_NAME;
++	else
++		parts[1].name = ROOTFS_PART_NAME;
++	parts[1].offset = rootfs_offset;
++	parts[1].size = mtd->size - rootfs_offset;
++
++	*pparts = parts;
++	return ELF_NR_PARTS;
++}
++
++static const struct of_device_id mtdsplit_elf_of_match_table[] = {
++	{ .compatible = "openwrt,elf" },
++	{},
++};
++MODULE_DEVICE_TABLE(of, mtdsplit_elf_of_match_table);
++
++static struct mtd_part_parser mtdsplit_elf_parser = {
++	.owner = THIS_MODULE,
++	.name = "elf-loader-fw",
++	.of_match_table = mtdsplit_elf_of_match_table,
++	.parse_fn = mtdsplit_parse_elf,
++	.type = MTD_PARSER_TYPE_FIRMWARE,
++};
++
++static int __init mtdsplit_elf_init(void)
++{
++	register_mtd_parser(&mtdsplit_elf_parser);
++
++	return 0;
++}
++
++subsys_initcall(mtdsplit_elf_init);
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_eva.c b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_eva.c
+new file mode 100644
+index 0000000000..55004a6d36
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_eva.c
+@@ -0,0 +1,103 @@
++/*
++ *  Copyright (C) 2012 John Crispin <blogic@openwrt.org>
++ *  Copyright (C) 2015 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/slab.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/byteorder/generic.h>
++#include <linux/of.h>
++
++#include "mtdsplit.h"
++
++#define EVA_NR_PARTS		2
++#define EVA_MAGIC		0xfeed1281
++#define EVA_FOOTER_SIZE		0x18
++#define EVA_DUMMY_SQUASHFS_SIZE	0x100
++
++struct eva_image_header {
++	uint32_t	magic;
++	uint32_t	size;
++};
++
++static int mtdsplit_parse_eva(struct mtd_info *master,
++				const struct mtd_partition **pparts,
++				struct mtd_part_parser_data *data)
++{
++	struct mtd_partition *parts;
++	struct eva_image_header hdr;
++	size_t retlen;
++	unsigned long kernel_size, rootfs_offset;
++	int err;
++
++	err = mtd_read(master, 0, sizeof(hdr), &retlen, (void *) &hdr);
++	if (err)
++		return err;
++
++	if (retlen != sizeof(hdr))
++		return -EIO;
++
++	if (le32_to_cpu(hdr.magic) != EVA_MAGIC)
++		return -EINVAL;
++
++	kernel_size = le32_to_cpu(hdr.size) + EVA_FOOTER_SIZE;
++
++	/* rootfs starts at the next 0x10000 boundary: */
++	rootfs_offset = round_up(kernel_size, 0x10000);
++
++	/* skip the dummy EVA squashfs partition (with wrong endianness): */
++	rootfs_offset += EVA_DUMMY_SQUASHFS_SIZE;
++
++	if (rootfs_offset >= master->size)
++		return -EINVAL;
++
++	err = mtd_check_rootfs_magic(master, rootfs_offset, NULL);
++	if (err)
++		return err;
++
++	parts = kzalloc(EVA_NR_PARTS * sizeof(*parts), GFP_KERNEL);
++	if (!parts)
++		return -ENOMEM;
++
++	parts[0].name = KERNEL_PART_NAME;
++	parts[0].offset = 0;
++	parts[0].size = kernel_size;
++
++	parts[1].name = ROOTFS_PART_NAME;
++	parts[1].offset = rootfs_offset;
++	parts[1].size = master->size - rootfs_offset;
++
++	*pparts = parts;
++	return EVA_NR_PARTS;
++}
++
++static const struct of_device_id mtdsplit_eva_of_match_table[] = {
++	{ .compatible = "avm,eva-firmware" },
++	{},
++};
++
++static struct mtd_part_parser mtdsplit_eva_parser = {
++	.owner = THIS_MODULE,
++	.name = "eva-fw",
++	.of_match_table = mtdsplit_eva_of_match_table,
++	.parse_fn = mtdsplit_parse_eva,
++	.type = MTD_PARSER_TYPE_FIRMWARE,
++};
++
++static int __init mtdsplit_eva_init(void)
++{
++	register_mtd_parser(&mtdsplit_eva_parser);
++
++	return 0;
++}
++
++subsys_initcall(mtdsplit_eva_init);
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_fit.c b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_fit.c
+new file mode 100644
+index 0000000000..f043428949
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_fit.c
+@@ -0,0 +1,157 @@
++/*
++ * Copyright (c) 2015 The Linux Foundation
++ * Copyright (C) 2014 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#include <linux/module.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/types.h>
++#include <linux/byteorder/generic.h>
++#include <linux/slab.h>
++#include <linux/of_fdt.h>
++
++#include "mtdsplit.h"
++
++struct fdt_header {
++	uint32_t magic;			 /* magic word FDT_MAGIC */
++	uint32_t totalsize;		 /* total size of DT block */
++	uint32_t off_dt_struct;		 /* offset to structure */
++	uint32_t off_dt_strings;	 /* offset to strings */
++	uint32_t off_mem_rsvmap;	 /* offset to memory reserve map */
++	uint32_t version;		 /* format version */
++	uint32_t last_comp_version;	 /* last compatible version */
++
++	/* version 2 fields below */
++	uint32_t boot_cpuid_phys;	 /* Which physical CPU id we're
++					    booting on */
++	/* version 3 fields below */
++	uint32_t size_dt_strings;	 /* size of the strings block */
++
++	/* version 17 fields below */
++	uint32_t size_dt_struct;	 /* size of the structure block */
++};
++
++static int
++mtdsplit_fit_parse(struct mtd_info *mtd,
++		   const struct mtd_partition **pparts,
++	           struct mtd_part_parser_data *data)
++{
++	struct device_node *np = mtd_get_of_node(mtd);
++	const char *cmdline_match = NULL;
++	struct fdt_header hdr;
++	size_t hdr_len, retlen;
++	size_t offset;
++	size_t fit_offset, fit_size;
++	size_t rootfs_offset, rootfs_size;
++	struct mtd_partition *parts;
++	enum mtdsplit_part_type type;
++	int ret;
++
++	of_property_read_string(np, "openwrt,cmdline-match", &cmdline_match);
++	if (cmdline_match && !strstr(saved_command_line, cmdline_match))
++		return -ENODEV;
++
++	hdr_len = sizeof(struct fdt_header);
++
++	/* Parse the MTD device & search for the FIT image location */
++	for(offset = 0; offset + hdr_len <= mtd->size; offset += mtd->erasesize) {
++		ret = mtd_read(mtd, offset, hdr_len, &retlen, (void*) &hdr);
++		if (ret) {
++			pr_err("read error in \"%s\" at offset 0x%llx\n",
++			       mtd->name, (unsigned long long) offset);
++			return ret;
++		}
++
++		if (retlen != hdr_len) {
++			pr_err("short read in \"%s\"\n", mtd->name);
++			return -EIO;
++		}
++
++		/* Check the magic - see if this is a FIT image */
++		if (be32_to_cpu(hdr.magic) != OF_DT_HEADER) {
++			pr_debug("no valid FIT image found in \"%s\" at offset %llx\n",
++				 mtd->name, (unsigned long long) offset);
++			continue;
++		}
++
++		/* We found a FIT image. Let's keep going */
++		break;
++	}
++
++	fit_offset = offset;
++	fit_size = be32_to_cpu(hdr.totalsize);
++
++	if (fit_size == 0) {
++		pr_err("FIT image in \"%s\" at offset %llx has null size\n",
++		       mtd->name, (unsigned long long) fit_offset);
++		return -ENODEV;
++	}
++
++	/* Search for the rootfs partition after the FIT image */
++	ret = mtd_find_rootfs_from(mtd, fit_offset + fit_size, mtd->size,
++				   &rootfs_offset, &type);
++	if (ret) {
++		pr_info("no rootfs found after FIT image in \"%s\"\n",
++			mtd->name);
++		return ret;
++	}
++
++	rootfs_size = mtd->size - rootfs_offset;
++
++	parts = kzalloc(2 * sizeof(*parts), GFP_KERNEL);
++	if (!parts)
++		return -ENOMEM;
++
++	parts[0].name = KERNEL_PART_NAME;
++	parts[0].offset = fit_offset;
++	parts[0].size = mtd_rounddown_to_eb(fit_size, mtd) + mtd->erasesize;
++
++	if (type == MTDSPLIT_PART_TYPE_UBI)
++		parts[1].name = UBI_PART_NAME;
++	else
++		parts[1].name = ROOTFS_PART_NAME;
++	parts[1].offset = rootfs_offset;
++	parts[1].size = rootfs_size;
++
++	*pparts = parts;
++	return 2;
++}
++
++static const struct of_device_id mtdsplit_fit_of_match_table[] = {
++	{ .compatible = "denx,fit" },
++	{},
++};
++
++static struct mtd_part_parser uimage_parser = {
++	.owner = THIS_MODULE,
++	.name = "fit-fw",
++	.of_match_table = mtdsplit_fit_of_match_table,
++	.parse_fn = mtdsplit_fit_parse,
++	.type = MTD_PARSER_TYPE_FIRMWARE,
++};
++
++/**************************************************
++ * Init
++ **************************************************/
++
++static int __init mtdsplit_fit_init(void)
++{
++	register_mtd_parser(&uimage_parser);
++
++	return 0;
++}
++
++module_init(mtdsplit_fit_init);
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_jimage.c b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_jimage.c
+new file mode 100644
+index 0000000000..1770dd47ce
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_jimage.c
+@@ -0,0 +1,284 @@
++/*
++ *  Copyright (C) 2018 Paweł Dembicki <paweldembicki@gmail.com> 
++ *
++ *  Based on: mtdsplit_uimage.c
++ *  Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ */
++
++#define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/slab.h>
++#include <linux/vmalloc.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/byteorder/generic.h>
++#include <linux/of.h>
++
++#include "mtdsplit.h"
++
++#define MAX_HEADER_LEN ( STAG_SIZE + SCH2_SIZE )
++
++#define STAG_SIZE 16
++#define STAG_ID 0x04
++#define STAG_MAGIC 0x2B24
++
++#define SCH2_SIZE 40
++#define SCH2_MAGIC 0x2124
++#define SCH2_VER 0x02
++
++/*
++ * Jboot image header,
++ * all data in little endian.
++ */
++
++struct jimage_header		//stag + sch2 jboot joined headers
++{
++	uint8_t stag_cmark;		// in factory 0xFF , in sysupgrade must be the same as stag_id
++	uint8_t stag_id;		// 0x04
++	uint16_t stag_magic;		//magic 0x2B24
++	uint32_t stag_time_stamp;	// timestamp calculated in jboot way
++	uint32_t stag_image_length;	// lentgh of kernel + sch2 header
++	uint16_t stag_image_checksum;	// negated jboot_checksum of sch2 + kernel
++	uint16_t stag_tag_checksum;	// negated jboot_checksum of stag header data
++	uint16_t sch2_magic;		// magic 0x2124
++	uint8_t sch2_cp_type;	// 0x00 for flat, 0x01 for jz, 0x02 for gzip, 0x03 for lzma
++	uint8_t sch2_version;	// 0x02 for sch2
++	uint32_t sch2_ram_addr;	// ram entry address
++	uint32_t sch2_image_len;	// kernel image length
++	uint32_t sch2_image_crc32;	// kernel image crc
++	uint32_t sch2_start_addr;	// ram start address
++	uint32_t sch2_rootfs_addr;	// rootfs flash address
++	uint32_t sch2_rootfs_len;	// rootfls length
++	uint32_t sch2_rootfs_crc32;	// rootfs crc32
++	uint32_t sch2_header_crc32;	// sch2 header crc32, durring calculation this area is replaced by zero
++	uint16_t sch2_header_length;	// sch2 header length: 0x28
++	uint16_t sch2_cmd_line_length;	// cmd line length, known zeros
++};
++
++static int
++read_jimage_header(struct mtd_info *mtd, size_t offset, u_char *buf,
++		   size_t header_len)
++{
++	size_t retlen;
++	int ret;
++
++	ret = mtd_read(mtd, offset, header_len, &retlen, buf);
++	if (ret) {
++		pr_debug("read error in \"%s\"\n", mtd->name);
++		return ret;
++	}
++
++	if (retlen != header_len) {
++		pr_debug("short read in \"%s\"\n", mtd->name);
++		return -EIO;
++	}
++
++	return 0;
++}
++
++/**
++ * __mtdsplit_parse_jimage - scan partition and create kernel + rootfs parts
++ *
++ * @find_header: function to call for a block of data that will return offset
++ *      of a valid jImage header if found
++ */
++static int __mtdsplit_parse_jimage(struct mtd_info *master,
++				   const struct mtd_partition **pparts,
++				   struct mtd_part_parser_data *data,
++				   ssize_t (*find_header)(u_char *buf, size_t len))
++{
++	struct mtd_partition *parts;
++	u_char *buf;
++	int nr_parts;
++	size_t offset;
++	size_t jimage_offset;
++	size_t jimage_size = 0;
++	size_t rootfs_offset;
++	size_t rootfs_size = 0;
++	int jimage_part, rf_part;
++	int ret;
++	enum mtdsplit_part_type type;
++
++	nr_parts = 2;
++	parts = kzalloc(nr_parts * sizeof(*parts), GFP_KERNEL);
++	if (!parts)
++		return -ENOMEM;
++
++	buf = vmalloc(MAX_HEADER_LEN);
++	if (!buf) {
++		ret = -ENOMEM;
++		goto err_free_parts;
++	}
++
++	/* find jImage on erase block boundaries */
++	for (offset = 0; offset < master->size; offset += master->erasesize) {
++		struct jimage_header *header;
++
++		jimage_size = 0;
++
++		ret = read_jimage_header(master, offset, buf, MAX_HEADER_LEN);
++		if (ret)
++			continue;
++
++		ret = find_header(buf, MAX_HEADER_LEN);
++		if (ret < 0) {
++			pr_debug("no valid jImage found in \"%s\" at offset %llx\n",
++				 master->name, (unsigned long long) offset);
++			continue;
++		}
++		header = (struct jimage_header *)(buf + ret);
++
++		jimage_size = sizeof(*header) + header->sch2_image_len + ret;
++		if ((offset + jimage_size) > master->size) {
++			pr_debug("jImage exceeds MTD device \"%s\"\n",
++				 master->name);
++			continue;
++		}
++		break;
++	}
++
++	if (jimage_size == 0) {
++		pr_debug("no jImage found in \"%s\"\n", master->name);
++		ret = -ENODEV;
++		goto err_free_buf;
++	}
++
++	jimage_offset = offset;
++
++	if (jimage_offset == 0) {
++		jimage_part = 0;
++		rf_part = 1;
++
++		/* find the roots after the jImage */
++		ret = mtd_find_rootfs_from(master, jimage_offset + jimage_size,
++					   master->size, &rootfs_offset, &type);
++		if (ret) {
++			pr_debug("no rootfs after jImage in \"%s\"\n",
++				 master->name);
++			goto err_free_buf;
++		}
++
++		rootfs_size = master->size - rootfs_offset;
++		jimage_size = rootfs_offset - jimage_offset;
++	} else {
++		rf_part = 0;
++		jimage_part = 1;
++
++		/* check rootfs presence at offset 0 */
++		ret = mtd_check_rootfs_magic(master, 0, &type);
++		if (ret) {
++			pr_debug("no rootfs before jImage in \"%s\"\n",
++				 master->name);
++			goto err_free_buf;
++		}
++
++		rootfs_offset = 0;
++		rootfs_size = jimage_offset;
++	}
++
++	if (rootfs_size == 0) {
++		pr_debug("no rootfs found in \"%s\"\n", master->name);
++		ret = -ENODEV;
++		goto err_free_buf;
++	}
++
++	parts[jimage_part].name = KERNEL_PART_NAME;
++	parts[jimage_part].offset = jimage_offset;
++	parts[jimage_part].size = jimage_size;
++
++	if (type == MTDSPLIT_PART_TYPE_UBI)
++		parts[rf_part].name = UBI_PART_NAME;
++	else
++		parts[rf_part].name = ROOTFS_PART_NAME;
++	parts[rf_part].offset = rootfs_offset;
++	parts[rf_part].size = rootfs_size;
++
++	vfree(buf);
++
++	*pparts = parts;
++	return nr_parts;
++
++err_free_buf:
++	vfree(buf);
++
++err_free_parts:
++	kfree(parts);
++	return ret;
++}
++
++static ssize_t jimage_verify_default(u_char *buf, size_t len)
++{
++	struct jimage_header *header = (struct jimage_header *)buf;
++
++	/* default sanity checks */
++	if (header->stag_magic != STAG_MAGIC) {
++		pr_debug("invalid jImage stag header magic: %04x\n",
++			 header->stag_magic);
++		return -EINVAL;
++	}
++	if (header->sch2_magic != SCH2_MAGIC) {
++		pr_debug("invalid jImage sch2 header magic: %04x\n",
++			 header->stag_magic);
++		return -EINVAL;
++	}
++	if (header->stag_cmark != header->stag_id) {
++		pr_debug("invalid jImage stag header cmark: %02x\n",
++			 header->stag_magic);
++		return -EINVAL;
++	}
++	if (header->stag_id != STAG_ID) {
++		pr_debug("invalid jImage stag header id: %02x\n",
++			 header->stag_magic);
++		return -EINVAL;
++	}
++	if (header->sch2_version != SCH2_VER) {
++		pr_debug("invalid jImage sch2 header version: %02x\n",
++			 header->stag_magic);
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
++static int
++mtdsplit_jimage_parse_generic(struct mtd_info *master,
++			      const struct mtd_partition **pparts,
++			      struct mtd_part_parser_data *data)
++{
++	return __mtdsplit_parse_jimage(master, pparts, data,
++				      jimage_verify_default);
++}
++
++static const struct of_device_id mtdsplit_jimage_of_match_table[] = {
++	{ .compatible = "amit,jimage" },
++	{},
++};
++
++static struct mtd_part_parser jimage_generic_parser = {
++	.owner = THIS_MODULE,
++	.name = "jimage-fw",
++	.of_match_table = mtdsplit_jimage_of_match_table,
++	.parse_fn = mtdsplit_jimage_parse_generic,
++	.type = MTD_PARSER_TYPE_FIRMWARE,
++};
++
++/**************************************************
++ * Init
++ **************************************************/
++
++static int __init mtdsplit_jimage_init(void)
++{
++	register_mtd_parser(&jimage_generic_parser);
++
++	return 0;
++}
++
++module_init(mtdsplit_jimage_init);
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_lzma.c b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_lzma.c
+new file mode 100644
+index 0000000000..c58f7ae4bf
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_lzma.c
+@@ -0,0 +1,104 @@
++/*
++ *  Copyright (C) 2014 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/slab.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/of.h>
++
++#include <asm/unaligned.h>
++
++#include "mtdsplit.h"
++
++#define LZMA_NR_PARTS		2
++#define LZMA_PROPERTIES_SIZE	5
++
++struct lzma_header {
++	u8 props[LZMA_PROPERTIES_SIZE];
++	u8 size_low[4];
++	u8 size_high[4];
++};
++
++static int mtdsplit_parse_lzma(struct mtd_info *master,
++			       const struct mtd_partition **pparts,
++			       struct mtd_part_parser_data *data)
++{
++	struct lzma_header hdr;
++	size_t hdr_len, retlen;
++	size_t rootfs_offset;
++	u32 t;
++	struct mtd_partition *parts;
++	int err;
++
++	hdr_len = sizeof(hdr);
++	err = mtd_read(master, 0, hdr_len, &retlen, (void *) &hdr);
++	if (err)
++		return err;
++
++	if (retlen != hdr_len)
++		return -EIO;
++
++	/* verify LZMA properties */
++	if (hdr.props[0] >= (9 * 5 * 5))
++		return -EINVAL;
++
++	t = get_unaligned_le32(&hdr.props[1]);
++	if (!is_power_of_2(t))
++		return -EINVAL;
++
++	t = get_unaligned_le32(&hdr.size_high);
++	if (t)
++		return -EINVAL;
++
++	err = mtd_find_rootfs_from(master, master->erasesize, master->size,
++				   &rootfs_offset, NULL);
++	if (err)
++		return err;
++
++	parts = kzalloc(LZMA_NR_PARTS * sizeof(*parts), GFP_KERNEL);
++	if (!parts)
++		return -ENOMEM;
++
++	parts[0].name = KERNEL_PART_NAME;
++	parts[0].offset = 0;
++	parts[0].size = rootfs_offset;
++
++	parts[1].name = ROOTFS_PART_NAME;
++	parts[1].offset = rootfs_offset;
++	parts[1].size = master->size - rootfs_offset;
++
++	*pparts = parts;
++	return LZMA_NR_PARTS;
++}
++
++static const struct of_device_id mtdsplit_lzma_of_match_table[] = {
++	{ .compatible = "lzma" },
++	{},
++};
++MODULE_DEVICE_TABLE(of, mtdsplit_lzma_of_match_table);
++
++static struct mtd_part_parser mtdsplit_lzma_parser = {
++	.owner = THIS_MODULE,
++	.name = "lzma-fw",
++	.of_match_table = mtdsplit_lzma_of_match_table,
++	.parse_fn = mtdsplit_parse_lzma,
++	.type = MTD_PARSER_TYPE_FIRMWARE,
++};
++
++static int __init mtdsplit_lzma_init(void)
++{
++	register_mtd_parser(&mtdsplit_lzma_parser);
++
++	return 0;
++}
++
++subsys_initcall(mtdsplit_lzma_init);
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_minor.c b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_minor.c
+new file mode 100644
+index 0000000000..af6822e11a
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_minor.c
+@@ -0,0 +1,125 @@
++/*
++ *  MTD splitter for MikroTik NOR devices
++ *
++ *  Copyright (C) 2017 Thibaut VARENE <varenet@parisc-linux.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ *  The rootfs is expected at erase-block boundary due to the use of
++ *  mtd_find_rootfs_from(). We use a trimmed down version of the yaffs header
++ *  for two main reasons:
++ *  - the original header uses weakly defined types (int, enum...) which can
++ *    vary in length depending on build host (and the struct is not packed),
++ *    and the name field can have a different total length depending on
++ *    whether or not the yaffs code was _built_ with unicode support.
++ *  - the only field that could be of real use here (file_size_low) contains
++ *    invalid data in the header generated by kernel2minor, so we cannot use
++ *    it to infer the exact position of the rootfs and do away with
++ *    mtd_find_rootfs_from() (and thus have non-EB-aligned rootfs).
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/slab.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/string.h>
++#include <linux/of.h>
++
++#include "mtdsplit.h"
++
++#define YAFFS_OBJECT_TYPE_FILE	0x1
++#define YAFFS_OBJECTID_ROOT	0x1
++#define YAFFS_SUM_UNUSED	0xFFFF
++#define YAFFS_NAME		"kernel"
++
++#define MINOR_NR_PARTS		2
++
++/*
++ * This structure is based on yaffs_obj_hdr from yaffs_guts.h
++ * The weak types match upstream. The fields have cpu-endianness
++ */
++struct minor_header {
++	int yaffs_type;
++	int yaffs_obj_id;
++	u16 yaffs_sum_unused;
++	char yaffs_name[sizeof(YAFFS_NAME)];
++};
++
++static int mtdsplit_parse_minor(struct mtd_info *master,
++				const struct mtd_partition **pparts,
++				struct mtd_part_parser_data *data)
++{
++	struct minor_header hdr;
++	size_t hdr_len, retlen;
++	size_t rootfs_offset;
++	struct mtd_partition *parts;
++	int err;
++
++	hdr_len = sizeof(hdr);
++	err = mtd_read(master, 0, hdr_len, &retlen, (void *) &hdr);
++	if (err)
++		return err;
++
++	if (retlen != hdr_len)
++		return -EIO;
++
++	/* match header */
++	if (hdr.yaffs_type != YAFFS_OBJECT_TYPE_FILE)
++		return -EINVAL;
++
++	if (hdr.yaffs_obj_id != YAFFS_OBJECTID_ROOT)
++		return -EINVAL;
++
++	if (hdr.yaffs_sum_unused != YAFFS_SUM_UNUSED)
++		return -EINVAL;
++
++	if (memcmp(hdr.yaffs_name, YAFFS_NAME, sizeof(YAFFS_NAME)))
++		return -EINVAL;
++
++	err = mtd_find_rootfs_from(master, master->erasesize, master->size,
++				   &rootfs_offset, NULL);
++	if (err)
++		return err;
++
++	parts = kzalloc(MINOR_NR_PARTS * sizeof(*parts), GFP_KERNEL);
++	if (!parts)
++		return -ENOMEM;
++
++	parts[0].name = KERNEL_PART_NAME;
++	parts[0].offset = 0;
++	parts[0].size = rootfs_offset;
++
++	parts[1].name = ROOTFS_PART_NAME;
++	parts[1].offset = rootfs_offset;
++	parts[1].size = master->size - rootfs_offset;
++
++	*pparts = parts;
++	return MINOR_NR_PARTS;
++}
++
++static const struct of_device_id mtdsplit_minor_of_match_table[] = {
++	{ .compatible = "mikrotik,minor" },
++	{},
++};
++MODULE_DEVICE_TABLE(of, mtdsplit_minor_of_match_table);
++
++static struct mtd_part_parser mtdsplit_minor_parser = {
++	.owner = THIS_MODULE,
++	.name = "minor-fw",
++	.of_match_table = mtdsplit_minor_of_match_table,
++	.parse_fn = mtdsplit_parse_minor,
++	.type = MTD_PARSER_TYPE_FIRMWARE,
++};
++
++static int __init mtdsplit_minor_init(void)
++{
++	register_mtd_parser(&mtdsplit_minor_parser);
++
++	return 0;
++}
++
++subsys_initcall(mtdsplit_minor_init);
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_seama.c b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_seama.c
+new file mode 100644
+index 0000000000..5d49171b1f
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_seama.c
+@@ -0,0 +1,118 @@
++/*
++ *  Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/slab.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/byteorder/generic.h>
++#include <linux/of.h>
++
++#include "mtdsplit.h"
++
++#define SEAMA_MAGIC		0x5EA3A417
++#define SEAMA_NR_PARTS		2
++#define SEAMA_MIN_ROOTFS_OFFS	0x80000	/* 512KiB */
++
++struct seama_header {
++	__be32	magic;		/* should always be SEAMA_MAGIC. */
++	__be16	reserved;	/* reserved for  */
++	__be16	metasize;	/* size of the META data */
++	__be32	size;		/* size of the image */
++	u8	md5[16];	/* digest */
++};
++
++static int mtdsplit_parse_seama(struct mtd_info *master,
++				const struct mtd_partition **pparts,
++				struct mtd_part_parser_data *data)
++{
++	struct seama_header hdr;
++	size_t hdr_len, retlen, kernel_ent_size;
++	size_t rootfs_offset;
++	struct mtd_partition *parts;
++	enum mtdsplit_part_type type;
++	int err;
++
++	hdr_len = sizeof(hdr);
++	err = mtd_read(master, 0, hdr_len, &retlen, (void *) &hdr);
++	if (err)
++		return err;
++
++	if (retlen != hdr_len)
++		return -EIO;
++
++	/* sanity checks */
++	if (be32_to_cpu(hdr.magic) != SEAMA_MAGIC)
++		return -EINVAL;
++
++	kernel_ent_size = hdr_len + be32_to_cpu(hdr.size) +
++			  be16_to_cpu(hdr.metasize);
++	if (kernel_ent_size > master->size)
++		return -EINVAL;
++
++	/* Check for the rootfs right after Seama entity with a kernel. */
++	err = mtd_check_rootfs_magic(master, kernel_ent_size, &type);
++	if (!err) {
++		rootfs_offset = kernel_ent_size;
++	} else {
++		/*
++		 * On some devices firmware entity might contain both: kernel
++		 * and rootfs. We can't determine kernel size so we just have to
++		 * look for rootfs magic.
++		 * Start the search from an arbitrary offset.
++		 */
++		err = mtd_find_rootfs_from(master, SEAMA_MIN_ROOTFS_OFFS,
++					   master->size, &rootfs_offset, &type);
++		if (err)
++			return err;
++	}
++
++	parts = kzalloc(SEAMA_NR_PARTS * sizeof(*parts), GFP_KERNEL);
++	if (!parts)
++		return -ENOMEM;
++
++	parts[0].name = KERNEL_PART_NAME;
++	parts[0].offset = sizeof hdr + be16_to_cpu(hdr.metasize);
++	parts[0].size = rootfs_offset - parts[0].offset;
++
++	if (type == MTDSPLIT_PART_TYPE_UBI)
++		parts[1].name = UBI_PART_NAME;
++	else
++		parts[1].name = ROOTFS_PART_NAME;
++	parts[1].offset = rootfs_offset;
++	parts[1].size = master->size - rootfs_offset;
++
++	*pparts = parts;
++	return SEAMA_NR_PARTS;
++}
++
++static const struct of_device_id mtdsplit_seama_of_match_table[] = {
++	{ .compatible = "seama" },
++	{},
++};
++MODULE_DEVICE_TABLE(of, mtdsplit_seama_of_match_table);
++
++static struct mtd_part_parser mtdsplit_seama_parser = {
++	.owner = THIS_MODULE,
++	.name = "seama-fw",
++	.of_match_table = mtdsplit_seama_of_match_table,
++	.parse_fn = mtdsplit_parse_seama,
++	.type = MTD_PARSER_TYPE_FIRMWARE,
++};
++
++static int __init mtdsplit_seama_init(void)
++{
++	register_mtd_parser(&mtdsplit_seama_parser);
++
++	return 0;
++}
++
++subsys_initcall(mtdsplit_seama_init);
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_squashfs.c b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_squashfs.c
+new file mode 100644
+index 0000000000..f6353da65b
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_squashfs.c
+@@ -0,0 +1,72 @@
++/*
++ *  Copyright (C) 2013 Felix Fietkau <nbd@nbd.name>
++ *  Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ */
++
++#define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/slab.h>
++#include <linux/magic.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/byteorder/generic.h>
++
++#include "mtdsplit.h"
++
++static int
++mtdsplit_parse_squashfs(struct mtd_info *master,
++			const struct mtd_partition **pparts,
++			struct mtd_part_parser_data *data)
++{
++	struct mtd_partition *part;
++	struct mtd_info *parent_mtd;
++	size_t part_offset;
++	size_t squashfs_len;
++	int err;
++
++	err = mtd_get_squashfs_len(master, 0, &squashfs_len);
++	if (err)
++		return err;
++
++	parent_mtd = mtd_get_master(master);
++	part_offset = mtdpart_get_offset(master);
++
++	part = kzalloc(sizeof(*part), GFP_KERNEL);
++	if (!part) {
++		pr_alert("unable to allocate memory for \"%s\" partition\n",
++			 ROOTFS_SPLIT_NAME);
++		return -ENOMEM;
++	}
++
++	part->name = ROOTFS_SPLIT_NAME;
++	part->offset = mtd_roundup_to_eb(part_offset + squashfs_len,
++					 parent_mtd) - part_offset;
++	part->size = mtd_rounddown_to_eb(master->size - part->offset, master);
++
++	*pparts = part;
++	return 1;
++}
++
++static struct mtd_part_parser mtdsplit_squashfs_parser = {
++	.owner = THIS_MODULE,
++	.name = "squashfs-split",
++	.parse_fn = mtdsplit_parse_squashfs,
++	.type = MTD_PARSER_TYPE_ROOTFS,
++};
++
++static int __init mtdsplit_squashfs_init(void)
++{
++	register_mtd_parser(&mtdsplit_squashfs_parser);
++
++	return 0;
++}
++
++subsys_initcall(mtdsplit_squashfs_init);
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_tplink.c b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_tplink.c
+new file mode 100644
+index 0000000000..8909c107a0
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_tplink.c
+@@ -0,0 +1,176 @@
++/*
++ *  Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2014 Felix Fietkau <nbd@nbd.name>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/slab.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/byteorder/generic.h>
++#include <linux/of.h>
++
++#include "mtdsplit.h"
++
++#define TPLINK_NR_PARTS		2
++#define TPLINK_MIN_ROOTFS_OFFS	0x80000	/* 512KiB */
++
++#define MD5SUM_LEN  16
++
++struct fw_v1 {
++	char		vendor_name[24];
++	char		fw_version[36];
++	uint32_t	hw_id;		/* hardware id */
++	uint32_t	hw_rev;		/* hardware revision */
++	uint32_t	unk1;
++	uint8_t		md5sum1[MD5SUM_LEN];
++	uint32_t	unk2;
++	uint8_t		md5sum2[MD5SUM_LEN];
++	uint32_t	unk3;
++	uint32_t	kernel_la;	/* kernel load address */
++	uint32_t	kernel_ep;	/* kernel entry point */
++	uint32_t	fw_length;	/* total length of the firmware */
++	uint32_t	kernel_ofs;	/* kernel data offset */
++	uint32_t	kernel_len;	/* kernel data length */
++	uint32_t	rootfs_ofs;	/* rootfs data offset */
++	uint32_t	rootfs_len;	/* rootfs data length */
++	uint32_t	boot_ofs;	/* bootloader data offset */
++	uint32_t	boot_len;	/* bootloader data length */
++	uint8_t		pad[360];
++} __attribute__ ((packed));
++
++struct fw_v2 {
++	char		fw_version[48]; /* 0x04: fw version string */
++	uint32_t	hw_id;		/* 0x34: hardware id */
++	uint32_t	hw_rev;		/* 0x38: FIXME: hardware revision? */
++	uint32_t	unk1;	        /* 0x3c: 0x00000000 */
++	uint8_t		md5sum1[MD5SUM_LEN]; /* 0x40 */
++	uint32_t	unk2;		/* 0x50: 0x00000000 */
++	uint8_t		md5sum2[MD5SUM_LEN]; /* 0x54 */
++	uint32_t	unk3;		/* 0x64: 0xffffffff */
++
++	uint32_t	kernel_la;	/* 0x68: kernel load address */
++	uint32_t	kernel_ep;	/* 0x6c: kernel entry point */
++	uint32_t	fw_length;	/* 0x70: total length of the image */
++	uint32_t	kernel_ofs;	/* 0x74: kernel data offset */
++	uint32_t	kernel_len;	/* 0x78: kernel data length */
++	uint32_t	rootfs_ofs;	/* 0x7c: rootfs data offset */
++	uint32_t	rootfs_len;	/* 0x80: rootfs data length */
++	uint32_t	boot_ofs;	/* 0x84: FIXME: seems to be unused */
++	uint32_t	boot_len;	/* 0x88: FIXME: seems to be unused */
++	uint16_t	unk4;		/* 0x8c: 0x55aa */
++	uint8_t		sver_hi;	/* 0x8e */
++	uint8_t		sver_lo;	/* 0x8f */
++	uint8_t		unk5;		/* 0x90: magic: 0xa5 */
++	uint8_t		ver_hi;         /* 0x91 */
++	uint8_t		ver_mid;        /* 0x92 */
++	uint8_t		ver_lo;         /* 0x93 */
++	uint8_t		pad[364];
++} __attribute__ ((packed));
++
++struct tplink_fw_header {
++	uint32_t version;
++	union {
++		struct fw_v1 v1;
++		struct fw_v2 v2;
++	};
++};
++
++static int mtdsplit_parse_tplink(struct mtd_info *master,
++				 const struct mtd_partition **pparts,
++				 struct mtd_part_parser_data *data)
++{
++	struct tplink_fw_header hdr;
++	size_t hdr_len, retlen, kernel_size;
++	size_t rootfs_offset;
++	struct mtd_partition *parts;
++	int err;
++
++	hdr_len = sizeof(hdr);
++	err = mtd_read(master, 0, hdr_len, &retlen, (void *) &hdr);
++	if (err)
++		return err;
++
++	if (retlen != hdr_len)
++		return -EIO;
++
++	switch (le32_to_cpu(hdr.version)) {
++	case 1:
++		if (be32_to_cpu(hdr.v1.kernel_ofs) != sizeof(hdr))
++			return -EINVAL;
++
++		kernel_size = sizeof(hdr) + be32_to_cpu(hdr.v1.kernel_len);
++		rootfs_offset = be32_to_cpu(hdr.v1.rootfs_ofs);
++		break;
++	case 2:
++	case 3:
++		if (be32_to_cpu(hdr.v2.kernel_ofs) != sizeof(hdr))
++			return -EINVAL;
++
++		kernel_size = sizeof(hdr) + be32_to_cpu(hdr.v2.kernel_len);
++		rootfs_offset = be32_to_cpu(hdr.v2.rootfs_ofs);
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (kernel_size > master->size)
++		return -EINVAL;
++
++	/* Find the rootfs */
++	err = mtd_check_rootfs_magic(master, rootfs_offset, NULL);
++	if (err) {
++		/*
++		 * The size in the header might cover the rootfs as well.
++		 * Start the search from an arbitrary offset.
++		 */
++		err = mtd_find_rootfs_from(master, TPLINK_MIN_ROOTFS_OFFS,
++					   master->size, &rootfs_offset, NULL);
++		if (err)
++			return err;
++	}
++
++	parts = kzalloc(TPLINK_NR_PARTS * sizeof(*parts), GFP_KERNEL);
++	if (!parts)
++		return -ENOMEM;
++
++	parts[0].name = KERNEL_PART_NAME;
++	parts[0].offset = 0;
++	parts[0].size = kernel_size;
++
++	parts[1].name = ROOTFS_PART_NAME;
++	parts[1].offset = rootfs_offset;
++	parts[1].size = master->size - rootfs_offset;
++
++	*pparts = parts;
++	return TPLINK_NR_PARTS;
++}
++
++static const struct of_device_id mtdsplit_tplink_of_match_table[] = {
++	{ .compatible = "tplink,firmware" },
++	{},
++};
++
++static struct mtd_part_parser mtdsplit_tplink_parser = {
++	.owner = THIS_MODULE,
++	.name = "tplink-fw",
++	.of_match_table = mtdsplit_tplink_of_match_table,
++	.parse_fn = mtdsplit_parse_tplink,
++	.type = MTD_PARSER_TYPE_FIRMWARE,
++};
++
++static int __init mtdsplit_tplink_init(void)
++{
++	register_mtd_parser(&mtdsplit_tplink_parser);
++
++	return 0;
++}
++
++subsys_initcall(mtdsplit_tplink_init);
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_trx.c b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_trx.c
+new file mode 100644
+index 0000000000..b853ec9e52
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_trx.c
+@@ -0,0 +1,155 @@
++/*
++ *  Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2014 Felix Fietkau <nbd@nbd.name>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ */
++
++#define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/slab.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/byteorder/generic.h>
++#include <linux/of.h>
++
++#include "mtdsplit.h"
++
++#define TRX_MAGIC   0x30524448  /* "HDR0" */
++
++struct trx_header {
++	__le32 magic;
++	__le32 len;
++	__le32 crc32;
++	__le32 flag_version;
++	__le32 offset[4];
++};
++
++static int
++read_trx_header(struct mtd_info *mtd, size_t offset,
++		   struct trx_header *header)
++{
++	size_t header_len;
++	size_t retlen;
++	int ret;
++
++	header_len = sizeof(*header);
++	ret = mtd_read(mtd, offset, header_len, &retlen,
++		       (unsigned char *) header);
++	if (ret) {
++		pr_debug("read error in \"%s\"\n", mtd->name);
++		return ret;
++	}
++
++	if (retlen != header_len) {
++		pr_debug("short read in \"%s\"\n", mtd->name);
++		return -EIO;
++	}
++
++	return 0;
++}
++
++static int
++mtdsplit_parse_trx(struct mtd_info *master,
++		   const struct mtd_partition **pparts,
++		   struct mtd_part_parser_data *data)
++{
++	struct mtd_partition *parts;
++	struct trx_header hdr;
++	int nr_parts;
++	size_t offset;
++	size_t trx_offset;
++	size_t trx_size = 0;
++	size_t rootfs_offset;
++	size_t rootfs_size = 0;
++	int ret;
++
++	nr_parts = 2;
++	parts = kzalloc(nr_parts * sizeof(*parts), GFP_KERNEL);
++	if (!parts)
++		return -ENOMEM;
++
++	/* find trx image on erase block boundaries */
++	for (offset = 0; offset < master->size; offset += master->erasesize) {
++		trx_size = 0;
++
++		ret = read_trx_header(master, offset, &hdr);
++		if (ret)
++			continue;
++
++		if (hdr.magic != cpu_to_le32(TRX_MAGIC)) {
++			pr_debug("no valid trx header found in \"%s\" at offset %llx\n",
++				 master->name, (unsigned long long) offset);
++			continue;
++		}
++
++		trx_size = le32_to_cpu(hdr.len);
++		if ((offset + trx_size) > master->size) {
++			pr_debug("trx image exceeds MTD device \"%s\"\n",
++				 master->name);
++			continue;
++		}
++		break;
++	}
++
++	if (trx_size == 0) {
++		pr_debug("no trx header found in \"%s\"\n", master->name);
++		ret = -ENODEV;
++		goto err;
++	}
++
++	trx_offset = offset + hdr.offset[0];
++	rootfs_offset = offset + hdr.offset[1];
++	rootfs_size = master->size - rootfs_offset;
++	trx_size = rootfs_offset - trx_offset;
++
++	if (rootfs_size == 0) {
++		pr_debug("no rootfs found in \"%s\"\n", master->name);
++		ret = -ENODEV;
++		goto err;
++	}
++
++	parts[0].name = KERNEL_PART_NAME;
++	parts[0].offset = trx_offset;
++	parts[0].size = trx_size;
++
++	parts[1].name = ROOTFS_PART_NAME;
++	parts[1].offset = rootfs_offset;
++	parts[1].size = rootfs_size;
++
++	*pparts = parts;
++	return nr_parts;
++
++err:
++	kfree(parts);
++	return ret;
++}
++
++static const struct of_device_id trx_parser_of_match_table[] = {
++	{ .compatible = "openwrt,trx" },
++	{},
++};
++MODULE_DEVICE_TABLE(of, trx_parser_of_match_table);
++
++static struct mtd_part_parser trx_parser = {
++	.owner = THIS_MODULE,
++	.name = "trx-fw",
++	.of_match_table = trx_parser_of_match_table,
++	.parse_fn = mtdsplit_parse_trx,
++	.type = MTD_PARSER_TYPE_FIRMWARE,
++};
++
++static int __init mtdsplit_trx_init(void)
++{
++	register_mtd_parser(&trx_parser);
++
++	return 0;
++}
++
++module_init(mtdsplit_trx_init);
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_uimage.c b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_uimage.c
+new file mode 100644
+index 0000000000..a3e55fb1fe
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_uimage.c
+@@ -0,0 +1,282 @@
++/*
++ *  Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ */
++
++#define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/slab.h>
++#include <linux/vmalloc.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/version.h>
++#include <linux/byteorder/generic.h>
++#include <linux/of.h>
++#include <dt-bindings/mtd/partitions/uimage.h>
++
++#include "mtdsplit.h"
++
++/*
++ * Legacy format image header,
++ * all data in network byte order (aka natural aka bigendian).
++ */
++struct uimage_header {
++	uint32_t	ih_magic;	/* Image Header Magic Number	*/
++	uint32_t	ih_hcrc;	/* Image Header CRC Checksum	*/
++	uint32_t	ih_time;	/* Image Creation Timestamp	*/
++	uint32_t	ih_size;	/* Image Data Size		*/
++	uint32_t	ih_load;	/* Data	 Load  Address		*/
++	uint32_t	ih_ep;		/* Entry Point Address		*/
++	uint32_t	ih_dcrc;	/* Image Data CRC Checksum	*/
++	uint8_t		ih_os;		/* Operating System		*/
++	uint8_t		ih_arch;	/* CPU architecture		*/
++	uint8_t		ih_type;	/* Image Type			*/
++	uint8_t		ih_comp;	/* Compression Type		*/
++	uint8_t		ih_name[IH_NMLEN];	/* Image Name		*/
++};
++
++static int
++read_uimage_header(struct mtd_info *mtd, size_t offset, u_char *buf,
++		   size_t header_len)
++{
++	size_t retlen;
++	int ret;
++
++	ret = mtd_read(mtd, offset, header_len, &retlen, buf);
++	if (ret) {
++		pr_debug("read error in \"%s\"\n", mtd->name);
++		return ret;
++	}
++
++	if (retlen != header_len) {
++		pr_debug("short read in \"%s\"\n", mtd->name);
++		return -EIO;
++	}
++
++	return 0;
++}
++
++static void uimage_parse_dt(struct mtd_info *master, int *extralen,
++			    u32 *ih_magic, u32 *ih_type,
++			    u32 *header_offset, u32 *part_magic)
++{
++	struct device_node *np = mtd_get_of_node(master);
++
++	if (!np || !of_device_is_compatible(np, "openwrt,uimage"))
++		return;
++
++	if (!of_property_read_u32(np, "openwrt,padding", extralen))
++		pr_debug("got openwrt,padding=%d from device-tree\n", *extralen);
++	if (!of_property_read_u32(np, "openwrt,ih-magic", ih_magic))
++		pr_debug("got openwrt,ih-magic=%08x from device-tree\n", *ih_magic);
++	if (!of_property_read_u32(np, "openwrt,ih-type", ih_type))
++		pr_debug("got openwrt,ih-type=%08x from device-tree\n", *ih_type);
++	if (!of_property_read_u32(np, "openwrt,offset", header_offset))
++		pr_debug("got ih-start=%u from device-tree\n", *header_offset);
++	if (!of_property_read_u32(np, "openwrt,partition-magic", part_magic))
++		pr_debug("got openwrt,partition-magic=%08x from device-tree\n", *part_magic);
++}
++
++static ssize_t uimage_verify_default(u_char *buf, u32 ih_magic, u32 ih_type)
++{
++	struct uimage_header *header = (struct uimage_header *)buf;
++
++	/* default sanity checks */
++	if (be32_to_cpu(header->ih_magic) != ih_magic) {
++		pr_debug("invalid uImage magic: %08x != %08x\n",
++			 be32_to_cpu(header->ih_magic), ih_magic);
++		return -EINVAL;
++	}
++
++	if (header->ih_os != IH_OS_LINUX) {
++		pr_debug("invalid uImage OS: %08x != %08x\n",
++			 be32_to_cpu(header->ih_os), IH_OS_LINUX);
++		return -EINVAL;
++	}
++
++	if (header->ih_type != ih_type) {
++		pr_debug("invalid uImage type: %08x != %08x\n",
++			 be32_to_cpu(header->ih_type), ih_type);
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
++/**
++ * __mtdsplit_parse_uimage - scan partition and create kernel + rootfs parts
++ *
++ * @find_header: function to call for a block of data that will return offset
++ *      and tail padding length of a valid uImage header if found
++ */
++static int __mtdsplit_parse_uimage(struct mtd_info *master,
++				   const struct mtd_partition **pparts,
++				   struct mtd_part_parser_data *data)
++{
++	struct mtd_partition *parts;
++	u_char *buf;
++	int nr_parts;
++	size_t offset;
++	size_t uimage_offset;
++	size_t uimage_size = 0;
++	size_t rootfs_offset;
++	size_t rootfs_size = 0;
++	size_t buflen;
++	int uimage_part, rf_part;
++	int ret;
++	int extralen = 0;
++	u32 ih_magic = IH_MAGIC;
++	u32 ih_type = IH_TYPE_KERNEL;
++	u32 header_offset = 0;
++	u32 part_magic = 0;
++	enum mtdsplit_part_type type;
++
++	nr_parts = 2;
++	parts = kzalloc(nr_parts * sizeof(*parts), GFP_KERNEL);
++	if (!parts)
++		return -ENOMEM;
++
++	uimage_parse_dt(master, &extralen, &ih_magic, &ih_type, &header_offset, &part_magic);
++	buflen = sizeof(struct uimage_header) + header_offset;
++	buf = vmalloc(buflen);
++	if (!buf) {
++		ret = -ENOMEM;
++		goto err_free_parts;
++	}
++
++	/* find uImage on erase block boundaries */
++	for (offset = 0; offset < master->size; offset += master->erasesize) {
++		struct uimage_header *header;
++
++		uimage_size = 0;
++
++		ret = read_uimage_header(master, offset, buf, buflen);
++		if (ret)
++			continue;
++
++		/* verify optional partition magic before uimage header */
++		if (header_offset && part_magic && (be32_to_cpu(*(u32 *)buf) != part_magic))
++			continue;
++
++		ret = uimage_verify_default(buf + header_offset, ih_magic, ih_type);
++		if (ret < 0) {
++			pr_debug("no valid uImage found in \"%s\" at offset %llx\n",
++				 master->name, (unsigned long long) offset);
++			continue;
++		}
++
++		header = (struct uimage_header *)(buf + header_offset);
++
++		uimage_size = sizeof(*header) +
++				be32_to_cpu(header->ih_size) + header_offset + extralen;
++
++		if ((offset + uimage_size) > master->size) {
++			pr_debug("uImage exceeds MTD device \"%s\"\n",
++				 master->name);
++			continue;
++		}
++		break;
++	}
++
++	if (uimage_size == 0) {
++		pr_debug("no uImage found in \"%s\"\n", master->name);
++		ret = -ENODEV;
++		goto err_free_buf;
++	}
++
++	uimage_offset = offset;
++
++	if (uimage_offset == 0) {
++		uimage_part = 0;
++		rf_part = 1;
++
++		/* find the roots after the uImage */
++		ret = mtd_find_rootfs_from(master, uimage_offset + uimage_size,
++					   master->size, &rootfs_offset, &type);
++		if (ret) {
++			pr_debug("no rootfs after uImage in \"%s\"\n",
++				 master->name);
++			goto err_free_buf;
++		}
++
++		rootfs_size = master->size - rootfs_offset;
++		uimage_size = rootfs_offset - uimage_offset;
++	} else {
++		rf_part = 0;
++		uimage_part = 1;
++
++		/* check rootfs presence at offset 0 */
++		ret = mtd_check_rootfs_magic(master, 0, &type);
++		if (ret) {
++			pr_debug("no rootfs before uImage in \"%s\"\n",
++				 master->name);
++			goto err_free_buf;
++		}
++
++		rootfs_offset = 0;
++		rootfs_size = uimage_offset;
++	}
++
++	if (rootfs_size == 0) {
++		pr_debug("no rootfs found in \"%s\"\n", master->name);
++		ret = -ENODEV;
++		goto err_free_buf;
++	}
++
++	parts[uimage_part].name = KERNEL_PART_NAME;
++	parts[uimage_part].offset = uimage_offset;
++	parts[uimage_part].size = uimage_size;
++
++	if (type == MTDSPLIT_PART_TYPE_UBI)
++		parts[rf_part].name = UBI_PART_NAME;
++	else
++		parts[rf_part].name = ROOTFS_PART_NAME;
++	parts[rf_part].offset = rootfs_offset;
++	parts[rf_part].size = rootfs_size;
++
++	vfree(buf);
++
++	*pparts = parts;
++	return nr_parts;
++
++err_free_buf:
++	vfree(buf);
++
++err_free_parts:
++	kfree(parts);
++	return ret;
++}
++
++static const struct of_device_id mtdsplit_uimage_of_match_table[] = {
++	{ .compatible = "denx,uimage" },
++	{ .compatible = "openwrt,uimage" },
++	{},
++};
++
++static struct mtd_part_parser uimage_generic_parser = {
++	.owner = THIS_MODULE,
++	.name = "uimage-fw",
++	.of_match_table = mtdsplit_uimage_of_match_table,
++	.parse_fn = __mtdsplit_parse_uimage,
++	.type = MTD_PARSER_TYPE_FIRMWARE,
++};
++
++/**************************************************
++ * Init
++ **************************************************/
++
++static int __init mtdsplit_uimage_init(void)
++{
++	register_mtd_parser(&uimage_generic_parser);
++
++	return 0;
++}
++
++module_init(mtdsplit_uimage_init);
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_wrgg.c b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_wrgg.c
+new file mode 100644
+index 0000000000..dfd6058ae7
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/mtdsplit/mtdsplit_wrgg.c
+@@ -0,0 +1,142 @@
++/*
++ *  Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2014 Felix Fietkau <nbd@nbd.name>
++ *  Copyright (C) 2016 Stijn Tintel <stijn@linux-ipv6.be>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/slab.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/byteorder/generic.h>
++#include <linux/of.h>
++
++#include "mtdsplit.h"
++
++#define WRGG_NR_PARTS		2
++#define WRGG_MIN_ROOTFS_OFFS	0x80000	/* 512KiB */
++#define WRGG03_MAGIC		0x20080321
++#define WRG_MAGIC		0x20040220
++
++struct wrgg03_header {
++	char		signature[32];
++	uint32_t	magic1;
++	uint32_t	magic2;
++	char		version[16];
++	char		model[16];
++	uint32_t	flag[2];
++	uint32_t	reserve[2];
++	char		buildno[16];
++	uint32_t	size;
++	uint32_t	offset;
++	char		devname[32];
++	char		digest[16];
++} __attribute__ ((packed));
++
++struct wrg_header {
++	char		signature[32];
++	uint32_t	magic1;
++	uint32_t	magic2;
++	uint32_t	size;
++	uint32_t	offset;
++	char		devname[32];
++	char		digest[16];
++} __attribute__ ((packed));
++
++
++static int mtdsplit_parse_wrgg(struct mtd_info *master,
++			       const struct mtd_partition **pparts,
++			       struct mtd_part_parser_data *data)
++{
++	struct wrgg03_header hdr;
++	size_t hdr_len, retlen, kernel_ent_size;
++	size_t rootfs_offset;
++	struct mtd_partition *parts;
++	enum mtdsplit_part_type type;
++	int err;
++
++	hdr_len = sizeof(hdr);
++	err = mtd_read(master, 0, hdr_len, &retlen, (void *) &hdr);
++	if (err)
++		return err;
++
++	if (retlen != hdr_len)
++		return -EIO;
++
++	/* sanity checks */
++	if (le32_to_cpu(hdr.magic1) == WRGG03_MAGIC) {
++		kernel_ent_size = hdr_len + be32_to_cpu(hdr.size);
++		/*
++		 * If this becomes silly big it's probably because the
++		 * WRGG image is little-endian.
++		 */
++		if (kernel_ent_size > master->size)
++			kernel_ent_size = hdr_len + le32_to_cpu(hdr.size);
++
++		/* Now what ?! It's neither */
++		if (kernel_ent_size > master->size)
++			return -EINVAL;
++	} else if (le32_to_cpu(hdr.magic1) == WRG_MAGIC) {
++		kernel_ent_size = sizeof(struct wrg_header) + le32_to_cpu(
++		                  ((struct wrg_header*)&hdr)->size);
++	} else {
++		return -EINVAL;
++	}
++
++	if (kernel_ent_size > master->size)
++		return -EINVAL;
++
++	/*
++	 * The size in the header covers the rootfs as well.
++	 * Start the search from an arbitrary offset.
++	 */
++	err = mtd_find_rootfs_from(master, WRGG_MIN_ROOTFS_OFFS,
++				   master->size, &rootfs_offset, &type);
++	if (err)
++		return err;
++
++	parts = kzalloc(WRGG_NR_PARTS * sizeof(*parts), GFP_KERNEL);
++	if (!parts)
++		return -ENOMEM;
++
++	parts[0].name = KERNEL_PART_NAME;
++	parts[0].offset = 0;
++	parts[0].size = rootfs_offset;
++
++	parts[1].name = ROOTFS_PART_NAME;
++	parts[1].offset = rootfs_offset;
++	parts[1].size = master->size - rootfs_offset;
++
++	*pparts = parts;
++	return WRGG_NR_PARTS;
++}
++
++static const struct of_device_id mtdsplit_wrgg_of_match_table[] = {
++	{ .compatible = "wrg" },
++	{},
++};
++MODULE_DEVICE_TABLE(of, mtdsplit_wrgg_of_match_table);
++
++static struct mtd_part_parser mtdsplit_wrgg_parser = {
++	.owner = THIS_MODULE,
++	.name = "wrgg-fw",
++	.of_match_table = mtdsplit_wrgg_of_match_table,
++	.parse_fn = mtdsplit_parse_wrgg,
++	.type = MTD_PARSER_TYPE_FIRMWARE,
++};
++
++static int __init mtdsplit_wrgg_init(void)
++{
++	register_mtd_parser(&mtdsplit_wrgg_parser);
++
++	return 0;
++}
++
++subsys_initcall(mtdsplit_wrgg_init);
+diff --git a/target/linux/generic/files-5.4/drivers/mtd/parsers/routerbootpart.c b/target/linux/generic/files-5.4/drivers/mtd/parsers/routerbootpart.c
+new file mode 100644
+index 0000000000..f9bba0f3ba
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/mtd/parsers/routerbootpart.c
+@@ -0,0 +1,365 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Parser for MikroTik RouterBoot partitions.
++ *
++ * Copyright (C) 2020 Thibaut VARÈNE <hacks+kernel@slashdirt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ *
++ * This parser builds from the "fixed-partitions" one (see ofpart.c), but it can
++ * handle dynamic partitions as found on routerboot devices.
++ *
++ * DTS nodes are defined as follows:
++ * For fixed partitions:
++ *	node-name@unit-address {
++ *		reg = <prop-encoded-array>;
++ *		label = <string>;
++ *		read-only;
++ *		lock;
++ *	};
++ *
++ * reg property is mandatory; other properties are optional.
++ * reg format is <address length>. length can be 0 if the next partition is
++ * another fixed partition or a "well-known" partition as defined below: in that
++ * case the partition will extend up to the next one.
++ *
++ * For dynamic partitions:
++ *	node-name {
++ *		size = <prop-encoded-array>;
++ *		label = <string>;
++ *		read-only;
++ *		lock;
++ *	};
++ *
++ * size property is normally mandatory. It can only be omitted (or set to 0) if:
++ *	- the partition is a "well-known" one (as defined below), in which case
++ *	  the partition size will be automatically adjusted; or
++ *	- the next partition is a fixed one or a "well-known" one, in which case
++ *	  the current partition will extend up to the next one.
++ * Other properties are optional.
++ * size format is <length>.
++ * By default dynamic partitions are appended after the preceding one, except
++ * for "well-known" ones which are automatically located on flash.
++ *
++ * Well-known partitions (matched via label or node-name):
++ * - "hard_config"
++ * - "soft_config"
++ * - "dtb_config"
++ *
++ * Note: this parser will happily register 0-sized partitions if misused.
++ *
++ * This parser requires the DTS to list partitions in ascending order as
++ * expected on the MTD device.
++ *
++ * Since only the "hard_config" and "soft_config" partitions are used in OpenWRT,
++ * a minimal working DTS could define only these two partitions dynamically (in
++ * the right order, usually hard_config then soft_config).
++ *
++ * Note: some mips RB devices encode the hard_config offset and length in two
++ * consecutive u32 located at offset 0x14 (for ramips) or 0x24 (for ath79) on
++ * the SPI NOR flash. Unfortunately this seems inconsistent across machines and
++ * does not apply to e.g. ipq-based ones, so we ignore that information.
++ *
++ * Note: To find well-known partitions, this parser will go through the entire
++ * top mtd partition parsed, _before_ the DTS nodes are processed. This works
++ * well in the current state of affairs, and is a simpler implementation than
++ * searching for known partitions in the "holes" left between fixed-partition,
++ * _after_ processing DTS nodes.
++ */
++
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/of.h>
++#include <linux/of_fdt.h>
++#include <linux/libfdt_env.h>
++#include <linux/string.h>
++
++#define RB_MAGIC_HARD	(('H') | ('a' << 8) | ('r' << 16) | ('d' << 24))
++#define RB_MAGIC_SOFT	(('S') | ('o' << 8) | ('f' << 16) | ('t' << 24))
++#define RB_BLOCK_SIZE	0x1000
++
++struct routerboot_dynpart {
++	const char * const name;
++	const u32 magic;
++	int (* const size_fixup)(struct mtd_info *, struct routerboot_dynpart *);
++	size_t offset;
++	size_t size;
++	bool found;
++};
++
++static int routerboot_dtbsfixup(struct mtd_info *, struct routerboot_dynpart *);
++
++static struct routerboot_dynpart rb_dynparts[] = {
++	{
++		.name = "hard_config",
++		.magic = RB_MAGIC_HARD,	// stored in CPU-endianness on flash
++		.size_fixup = NULL,
++		.offset = 0x0,
++		.size = RB_BLOCK_SIZE,
++		.found = false,
++	}, {
++		.name = "soft_config",
++		.magic = RB_MAGIC_SOFT,	// stored in CPU-endianness on flash
++		.size_fixup = NULL,
++		.offset = 0x0,
++		.size = RB_BLOCK_SIZE,
++		.found = false,
++	}, {
++		.name = "dtb_config",
++		.magic = fdt32_to_cpu(OF_DT_HEADER),	// stored BE on flash
++		.size_fixup = routerboot_dtbsfixup,
++		.offset = 0x0,
++		.size = 0x0,
++		.found = false,
++	}
++};
++
++static int routerboot_dtbsfixup(struct mtd_info *master, struct routerboot_dynpart *rbdpart)
++{
++	int err;
++	size_t bytes_read, psize;
++	struct {
++		fdt32_t magic;
++		fdt32_t totalsize;
++		fdt32_t off_dt_struct;
++		fdt32_t off_dt_strings;
++		fdt32_t off_mem_rsvmap;
++		fdt32_t version;
++		fdt32_t last_comp_version;
++		fdt32_t boot_cpuid_phys;
++		fdt32_t size_dt_strings;
++		fdt32_t size_dt_struct;
++	} fdt_header;
++
++	err = mtd_read(master, rbdpart->offset, sizeof(fdt_header),
++		       &bytes_read, (u8 *)&fdt_header);
++	if (err)
++		return err;
++
++	if (bytes_read != sizeof(fdt_header))
++		return -EIO;
++
++	psize = fdt32_to_cpu(fdt_header.totalsize);
++	if (!psize)
++		return -EINVAL;
++
++	rbdpart->size = psize;
++	return 0;
++}
++
++static void routerboot_find_dynparts(struct mtd_info *master)
++{
++	size_t bytes_read, offset;
++	bool allfound;
++	int err, i;
++	u32 buf;
++
++	/*
++	 * Dynamic RouterBoot partitions offsets are aligned to RB_BLOCK_SIZE:
++	 * read the whole partition at RB_BLOCK_SIZE intervals to find sigs.
++	 * Skip partition content when possible.
++	 */
++	offset = 0;
++	while (offset < master->size) {
++		err = mtd_read(master, offset, sizeof(buf), &bytes_read, (u8 *)&buf);
++		if (err) {
++			pr_err("%s: mtd_read error while parsing (offset: 0x%X): %d\n",
++			       master->name, offset, err);
++			continue;
++		}
++
++		allfound = true;
++
++		for (i = 0; i < ARRAY_SIZE(rb_dynparts); i++) {
++			if (rb_dynparts[i].found)
++				continue;
++
++			allfound = false;
++
++			if (rb_dynparts[i].magic == buf) {
++				rb_dynparts[i].offset = offset;
++
++				if (rb_dynparts[i].size_fixup) {
++					err = rb_dynparts[i].size_fixup(master, &rb_dynparts[i]);
++					if (err) {
++						pr_err("%s: size fixup error while parsing \"%s\": %d\n",
++						       master->name, rb_dynparts[i].name, err);
++						continue;
++					}
++				}
++
++				rb_dynparts[i].found = true;
++
++				/*
++				 * move offset to skip the whole partition on
++				 * next iteration if size > RB_BLOCK_SIZE.
++				 */
++				if (rb_dynparts[i].size > RB_BLOCK_SIZE)
++					offset += ALIGN_DOWN((rb_dynparts[i].size - RB_BLOCK_SIZE), RB_BLOCK_SIZE);
++
++				break;
++			}
++		}
++
++		offset += RB_BLOCK_SIZE;
++
++		if (allfound)
++			break;
++	}
++}
++
++static int routerboot_partitions_parse(struct mtd_info *master,
++				       const struct mtd_partition **pparts,
++				       struct mtd_part_parser_data *data)
++{
++	struct device_node *rbpart_node, *pp;
++	struct mtd_partition *parts;
++	const char *partname;
++	size_t master_ofs;
++	int np;
++
++	/* Pull of_node from the master device node */
++	rbpart_node = mtd_get_of_node(master);
++	if (!rbpart_node)
++		return 0;
++
++	/* First count the subnodes */
++	np = 0;
++	for_each_child_of_node(rbpart_node,  pp)
++		np++;
++
++	if (!np)
++		return 0;
++
++	parts = kcalloc(np, sizeof(*parts), GFP_KERNEL);
++	if (!parts)
++		return -ENOMEM;
++
++	/* Preemptively look for known parts in flash */
++	routerboot_find_dynparts(master);
++
++	np = 0;
++	master_ofs = 0;
++	for_each_child_of_node(rbpart_node, pp) {
++		const __be32 *reg, *sz;
++		size_t offset, size;
++		int i, len, a_cells, s_cells;
++
++		partname = of_get_property(pp, "label", &len);
++		/* Allow deprecated use of "name" instead of "label" */
++		if (!partname)
++			partname = of_get_property(pp, "name", &len);
++		/* Fallback to node name per spec if all else fails: partname is always set */
++		if (!partname)
++			partname = pp->name;
++		parts[np].name = partname;
++
++		reg = of_get_property(pp, "reg", &len);
++		if (reg) {
++			/* Fixed partition */
++			a_cells = of_n_addr_cells(pp);
++			s_cells = of_n_size_cells(pp);
++
++			if ((len / 4) != (a_cells + s_cells)) {
++				pr_debug("%s: routerboot partition %pOF (%pOF) error parsing reg property.\n",
++					 master->name, pp, rbpart_node);
++				goto rbpart_fail;
++			}
++
++			offset = of_read_number(reg, a_cells);
++			size = of_read_number(reg + a_cells, s_cells);
++		} else {
++			/* Dynamic partition */
++			/* Default: part starts at current offset, 0 size */
++			offset = master_ofs;
++			size = 0;
++
++			/* Check if well-known partition */
++			for (i = 0; i < ARRAY_SIZE(rb_dynparts); i++) {
++				if (!strcmp(partname, rb_dynparts[i].name) && rb_dynparts[i].found) {
++					offset = rb_dynparts[i].offset;
++					size = rb_dynparts[i].size;
++					break;
++				}
++			}
++
++			/* Standalone 'size' property? Override size */
++			sz = of_get_property(pp, "size", &len);
++			if (sz) {
++				s_cells = of_n_size_cells(pp);
++				if ((len / 4) != s_cells) {
++					pr_debug("%s: routerboot partition %pOF (%pOF) error parsing size property.\n",
++						 master->name, pp, rbpart_node);
++					goto rbpart_fail;
++				}
++
++				size = of_read_number(sz, s_cells);
++			}
++		}
++
++		if (np > 0) {
++			/* Minor sanity check for overlaps */
++			if (offset < (parts[np-1].offset + parts[np-1].size)) {
++				pr_err("%s: routerboot partition %pOF (%pOF) \"%s\" overlaps with previous partition \"%s\".\n",
++				       master->name, pp, rbpart_node,
++				       partname, parts[np-1].name);
++				goto rbpart_fail;
++			}
++
++			/* Fixup end of previous partition if necessary */
++			if (!parts[np-1].size)
++				parts[np-1].size = (offset - parts[np-1].offset);
++		}
++
++		if ((offset + size) > master->size) {
++			pr_err("%s: routerboot partition %pOF (%pOF) \"%s\" extends past end of segment.\n",
++			       master->name, pp, rbpart_node, partname);
++			goto rbpart_fail;
++		}
++
++		parts[np].offset = offset;
++		parts[np].size = size;
++		parts[np].of_node = pp;
++
++		if (of_get_property(pp, "read-only", &len))
++			parts[np].mask_flags |= MTD_WRITEABLE;
++
++		if (of_get_property(pp, "lock", &len))
++			parts[np].mask_flags |= MTD_POWERUP_LOCK;
++
++		/* Keep master offset aligned to RB_BLOCK_SIZE */
++		master_ofs = ALIGN(offset + size, RB_BLOCK_SIZE);
++		np++;
++	}
++
++	*pparts = parts;
++	return np;
++
++rbpart_fail:
++	pr_err("%s: error parsing routerboot partition %pOF (%pOF)\n",
++	       master->name, pp, rbpart_node);
++	of_node_put(pp);
++	kfree(parts);
++	return -EINVAL;
++}
++
++static const struct of_device_id parse_routerbootpart_match_table[] = {
++	{ .compatible = "mikrotik,routerboot-partitions" },
++	{},
++};
++MODULE_DEVICE_TABLE(of, parse_routerbootpart_match_table);
++
++static struct mtd_part_parser routerbootpart_parser = {
++	.parse_fn = routerboot_partitions_parse,
++	.name = "routerbootpart",
++	.of_match_table = parse_routerbootpart_match_table,
++};
++module_mtd_part_parser(routerbootpart_parser);
++
++MODULE_LICENSE("GPL v2");
++MODULE_DESCRIPTION("MTD partitioning for RouterBoot");
++MODULE_AUTHOR("Thibaut VARENE");
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/adm6996.c b/target/linux/generic/files-5.4/drivers/net/phy/adm6996.c
+new file mode 100644
+index 0000000000..66013f273d
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/adm6996.c
+@@ -0,0 +1,1243 @@
++/*
++ * ADM6996 switch driver
++ *
++ * swconfig interface based on ar8216.c
++ *
++ * Copyright (c) 2008 Felix Fietkau <nbd@nbd.name>
++ * VLAN support Copyright (c) 2010, 2011 Peter Lebbing <peter@digitalbrains.com>
++ * Copyright (c) 2013 Hauke Mehrtens <hauke@hauke-m.de>
++ * Copyright (c) 2014 Matti Laakso <malaakso@elisanet.fi>
++ *
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of the GNU General Public License v2 as published by the
++ * Free Software Foundation
++ */
++
++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
++
++/*#define DEBUG 1*/
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/errno.h>
++#include <linux/unistd.h>
++#include <linux/slab.h>
++#include <linux/interrupt.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++#include <linux/gpio.h>
++#include <linux/netdevice.h>
++#include <linux/etherdevice.h>
++#include <linux/skbuff.h>
++#include <linux/spinlock.h>
++#include <linux/mm.h>
++#include <linux/module.h>
++#include <linux/mii.h>
++#include <linux/platform_device.h>
++#include <linux/platform_data/adm6996-gpio.h>
++#include <linux/ethtool.h>
++#include <linux/phy.h>
++#include <linux/switch.h>
++#include <linux/version.h>
++
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/uaccess.h>
++#include "adm6996.h"
++
++MODULE_DESCRIPTION("Infineon ADM6996 Switch");
++MODULE_AUTHOR("Felix Fietkau, Peter Lebbing <peter@digitalbrains.com>");
++MODULE_LICENSE("GPL");
++
++static const char * const adm6996_model_name[] =
++{
++	NULL,
++	"ADM6996FC",
++	"ADM6996M",
++	"ADM6996L"
++};
++
++struct adm6996_mib_desc {
++	unsigned int offset;
++	const char *name;
++};
++
++struct adm6996_priv {
++	struct switch_dev dev;
++	void *priv;
++
++	u8 eecs;
++	u8 eesk;
++	u8 eedi;
++
++	enum adm6996_model model;
++
++	bool enable_vlan;
++	bool vlan_enabled;	/* Current hardware state */
++
++#ifdef DEBUG
++	u16 addr;		/* Debugging: register address to operate on */
++#endif
++
++	u16 pvid[ADM_NUM_PORTS];	/* Primary VLAN ID */
++	u8 tagged_ports;
++
++	u16 vlan_id[ADM_NUM_VLANS];
++	u8 vlan_table[ADM_NUM_VLANS];	/* bitmap, 1 = port is member */
++	u8 vlan_tagged[ADM_NUM_VLANS];	/* bitmap, 1 = tagged member */
++	
++	struct mutex mib_lock;
++	char buf[2048];
++
++	struct mutex reg_mutex;
++
++	/* use abstraction for regops, we want to add gpio support in the future */
++	u16 (*read)(struct adm6996_priv *priv, enum admreg reg);
++	void (*write)(struct adm6996_priv *priv, enum admreg reg, u16 val);
++};
++
++#define to_adm(_dev) container_of(_dev, struct adm6996_priv, dev)
++#define phy_to_adm(_phy) ((struct adm6996_priv *) (_phy)->priv)
++
++#define MIB_DESC(_o, _n)	\
++	{			\
++		.offset = (_o),	\
++		.name = (_n),	\
++	}
++
++static const struct adm6996_mib_desc adm6996_mibs[] = {
++	MIB_DESC(ADM_CL0, "RxPacket"),
++	MIB_DESC(ADM_CL6, "RxByte"),
++	MIB_DESC(ADM_CL12, "TxPacket"),
++	MIB_DESC(ADM_CL18, "TxByte"),
++	MIB_DESC(ADM_CL24, "Collision"),
++	MIB_DESC(ADM_CL30, "Error"),
++};
++
++#define ADM6996_MIB_RXB_ID	1
++#define ADM6996_MIB_TXB_ID	3
++
++static inline u16
++r16(struct adm6996_priv *priv, enum admreg reg)
++{
++	return priv->read(priv, reg);
++}
++
++static inline void
++w16(struct adm6996_priv *priv, enum admreg reg, u16 val)
++{
++	priv->write(priv, reg, val);
++}
++
++/* Minimum timing constants */
++#define EECK_EDGE_TIME  3   /* 3us - max(adm 2.5us, 93c 1us) */
++#define EEDI_SETUP_TIME 1   /* 1us - max(adm 10ns, 93c 400ns) */
++#define EECS_SETUP_TIME 1   /* 1us - max(adm no, 93c 200ns) */
++
++static void adm6996_gpio_write(struct adm6996_priv *priv, int cs, char *buf, unsigned int bits)
++{
++	int i, len = (bits + 7) / 8;
++	u8 mask;
++
++	gpio_set_value(priv->eecs, cs);
++	udelay(EECK_EDGE_TIME);
++
++	/* Byte assemble from MSB to LSB */
++	for (i = 0; i < len; i++) {
++		/* Bit bang from MSB to LSB */
++		for (mask = 0x80; mask && bits > 0; mask >>= 1, bits --) {
++			/* Clock low */
++			gpio_set_value(priv->eesk, 0);
++			udelay(EECK_EDGE_TIME);
++
++			/* Output on rising edge */
++			gpio_set_value(priv->eedi, (mask & buf[i]));
++			udelay(EEDI_SETUP_TIME);
++
++			/* Clock high */
++			gpio_set_value(priv->eesk, 1);
++			udelay(EECK_EDGE_TIME);
++		}
++	}
++
++	/* Clock low */
++	gpio_set_value(priv->eesk, 0);
++	udelay(EECK_EDGE_TIME);
++
++	if (cs)
++		gpio_set_value(priv->eecs, 0);
++}
++
++static void adm6996_gpio_read(struct adm6996_priv *priv, int cs, char *buf, unsigned int bits)
++{
++	int i, len = (bits + 7) / 8;
++	u8 mask;
++
++	gpio_set_value(priv->eecs, cs);
++	udelay(EECK_EDGE_TIME);
++
++	/* Byte assemble from MSB to LSB */
++	for (i = 0; i < len; i++) {
++		u8 byte;
++
++		/* Bit bang from MSB to LSB */
++		for (mask = 0x80, byte = 0; mask && bits > 0; mask >>= 1, bits --) {
++			u8 gp;
++
++			/* Clock low */
++			gpio_set_value(priv->eesk, 0);
++			udelay(EECK_EDGE_TIME);
++
++			/* Input on rising edge */
++			gp = gpio_get_value(priv->eedi);
++			if (gp)
++				byte |= mask;
++
++			/* Clock high */
++			gpio_set_value(priv->eesk, 1);
++			udelay(EECK_EDGE_TIME);
++		}
++
++		*buf++ = byte;
++	}
++
++	/* Clock low */
++	gpio_set_value(priv->eesk, 0);
++	udelay(EECK_EDGE_TIME);
++
++	if (cs)
++		gpio_set_value(priv->eecs, 0);
++}
++
++/* Advance clock(s) */
++static void adm6996_gpio_adclk(struct adm6996_priv *priv, int clocks)
++{
++	int i;
++	for (i = 0; i < clocks; i++) {
++		/* Clock high */
++		gpio_set_value(priv->eesk, 1);
++		udelay(EECK_EDGE_TIME);
++
++		/* Clock low */
++		gpio_set_value(priv->eesk, 0);
++		udelay(EECK_EDGE_TIME);
++	}
++}
++
++static u16
++adm6996_read_gpio_reg(struct adm6996_priv *priv, enum admreg reg)
++{
++	/* cmd: 01 10 T DD R RRRRRR */
++	u8 bits[6] = {
++		0xFF, 0xFF, 0xFF, 0xFF,
++		(0x06 << 4) | ((0 & 0x01) << 3 | (reg&64)>>6),
++		((reg&63)<<2)
++	};
++
++	u8 rbits[4];
++
++	/* Enable GPIO outputs with all pins to 0 */
++	gpio_direction_output(priv->eecs, 0);
++	gpio_direction_output(priv->eesk, 0);
++	gpio_direction_output(priv->eedi, 0);
++
++	adm6996_gpio_write(priv, 0, bits, 46);
++	gpio_direction_input(priv->eedi);
++	adm6996_gpio_adclk(priv, 2);
++	adm6996_gpio_read(priv, 0, rbits, 32);
++
++	/* Extra clock(s) required per datasheet */
++	adm6996_gpio_adclk(priv, 2);
++
++	/* Disable GPIO outputs */
++	gpio_direction_input(priv->eecs);
++	gpio_direction_input(priv->eesk);
++
++	 /* EEPROM has 16-bit registers, but pumps out two registers in one request */
++	return (reg & 0x01 ?  (rbits[0]<<8) | rbits[1] : (rbits[2]<<8) | (rbits[3]));
++}
++
++/* Write chip configuration register */
++/* Follow 93c66 timing and chip's min EEPROM timing requirement */
++static void
++adm6996_write_gpio_reg(struct adm6996_priv *priv, enum admreg reg, u16 val)
++{
++	/* cmd(27bits): sb(1) + opc(01) + addr(bbbbbbbb) + data(bbbbbbbbbbbbbbbb) */
++	u8 bits[4] = {
++		(0x05 << 5) | (reg >> 3),
++		(reg << 5) | (u8)(val >> 11),
++		(u8)(val >> 3),
++		(u8)(val << 5)
++	};
++
++	/* Enable GPIO outputs with all pins to 0 */
++	gpio_direction_output(priv->eecs, 0);
++	gpio_direction_output(priv->eesk, 0);
++	gpio_direction_output(priv->eedi, 0);
++
++	/* Write cmd. Total 27 bits */
++	adm6996_gpio_write(priv, 1, bits, 27);
++
++	/* Extra clock(s) required per datasheet */
++	adm6996_gpio_adclk(priv, 2);
++
++	/* Disable GPIO outputs */
++	gpio_direction_input(priv->eecs);
++	gpio_direction_input(priv->eesk);
++	gpio_direction_input(priv->eedi);
++}
++
++static u16
++adm6996_read_mii_reg(struct adm6996_priv *priv, enum admreg reg)
++{
++	struct phy_device *phydev = priv->priv;
++	struct mii_bus *bus = phydev->mdio.bus;
++
++	return bus->read(bus, PHYADDR(reg));
++}
++
++static void
++adm6996_write_mii_reg(struct adm6996_priv *priv, enum admreg reg, u16 val)
++{
++	struct phy_device *phydev = priv->priv;
++	struct mii_bus *bus = phydev->mdio.bus;
++
++	bus->write(bus, PHYADDR(reg), val);
++}
++
++static int
++adm6996_set_enable_vlan(struct switch_dev *dev, const struct switch_attr *attr,
++			struct switch_val *val)
++{
++	struct adm6996_priv *priv = to_adm(dev);
++
++	if (val->value.i > 1)
++		return -EINVAL;
++
++	priv->enable_vlan = val->value.i;
++
++	return 0;
++};
++
++static int
++adm6996_get_enable_vlan(struct switch_dev *dev, const struct switch_attr *attr,
++			struct switch_val *val)
++{
++	struct adm6996_priv *priv = to_adm(dev);
++
++	val->value.i = priv->enable_vlan;
++
++	return 0;
++};
++
++#ifdef DEBUG
++
++static int
++adm6996_set_addr(struct switch_dev *dev, const struct switch_attr *attr,
++		 struct switch_val *val)
++{
++	struct adm6996_priv *priv = to_adm(dev);
++
++	if (val->value.i > 1023)
++		return -EINVAL;
++
++	priv->addr = val->value.i;
++
++	return 0;
++};
++
++static int
++adm6996_get_addr(struct switch_dev *dev, const struct switch_attr *attr,
++		 struct switch_val *val)
++{
++	struct adm6996_priv *priv = to_adm(dev);
++
++	val->value.i = priv->addr;
++
++	return 0;
++};
++
++static int
++adm6996_set_data(struct switch_dev *dev, const struct switch_attr *attr,
++		 struct switch_val *val)
++{
++	struct adm6996_priv *priv = to_adm(dev);
++
++	if (val->value.i > 65535)
++		return -EINVAL;
++
++	w16(priv, priv->addr, val->value.i);
++
++	return 0;
++};
++
++static int
++adm6996_get_data(struct switch_dev *dev, const struct switch_attr *attr,
++		 struct switch_val *val)
++{
++	struct adm6996_priv *priv = to_adm(dev);
++
++	val->value.i = r16(priv, priv->addr);
++
++	return 0;
++};
++
++#endif /* def DEBUG */
++
++static int
++adm6996_set_pvid(struct switch_dev *dev, int port, int vlan)
++{
++	struct adm6996_priv *priv = to_adm(dev);
++
++	pr_devel("set_pvid port %d vlan %d\n", port, vlan);
++
++	if (vlan > ADM_VLAN_MAX_ID)
++		return -EINVAL;
++
++	priv->pvid[port] = vlan;
++
++	return 0;
++}
++
++static int
++adm6996_get_pvid(struct switch_dev *dev, int port, int *vlan)
++{
++	struct adm6996_priv *priv = to_adm(dev);
++
++	pr_devel("get_pvid port %d\n", port);
++	*vlan = priv->pvid[port];
++
++	return 0;
++}
++
++static int
++adm6996_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
++		struct switch_val *val)
++{
++	struct adm6996_priv *priv = to_adm(dev);
++
++	pr_devel("set_vid port %d vid %d\n", val->port_vlan, val->value.i);
++
++	if (val->value.i > ADM_VLAN_MAX_ID)
++		return -EINVAL;
++
++	priv->vlan_id[val->port_vlan] = val->value.i;
++
++	return 0;
++};
++
++static int
++adm6996_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
++		struct switch_val *val)
++{
++	struct adm6996_priv *priv = to_adm(dev);
++
++	pr_devel("get_vid port %d\n", val->port_vlan);
++
++	val->value.i = priv->vlan_id[val->port_vlan];
++
++	return 0;
++};
++
++static int
++adm6996_get_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	struct adm6996_priv *priv = to_adm(dev);
++	u8 ports = priv->vlan_table[val->port_vlan];
++	u8 tagged = priv->vlan_tagged[val->port_vlan];
++	int i;
++
++	pr_devel("get_ports port_vlan %d\n", val->port_vlan);
++
++	val->len = 0;
++
++	for (i = 0; i < ADM_NUM_PORTS; i++) {
++		struct switch_port *p;
++
++		if (!(ports & (1 << i)))
++			continue;
++
++		p = &val->value.ports[val->len++];
++		p->id = i;
++		if (tagged & (1 << i))
++			p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
++		else
++			p->flags = 0;
++	}
++
++	return 0;
++};
++
++static int
++adm6996_set_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	struct adm6996_priv *priv = to_adm(dev);
++	u8 *ports = &priv->vlan_table[val->port_vlan];
++	u8 *tagged = &priv->vlan_tagged[val->port_vlan];
++	int i;
++
++	pr_devel("set_ports port_vlan %d ports", val->port_vlan);
++
++	*ports = 0;
++	*tagged = 0;
++
++	for (i = 0; i < val->len; i++) {
++		struct switch_port *p = &val->value.ports[i];
++
++#ifdef DEBUG
++		pr_cont(" %d%s", p->id,
++		       ((p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) ? "T" :
++			""));
++#endif
++
++		if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
++			*tagged |= (1 << p->id);
++			priv->tagged_ports |= (1 << p->id);
++		}
++
++		*ports |= (1 << p->id);
++	}
++
++#ifdef DEBUG
++	pr_cont("\n");
++#endif
++
++	return 0;
++};
++
++/*
++ * Precondition: reg_mutex must be held
++ */
++static void
++adm6996_enable_vlan(struct adm6996_priv *priv)
++{
++	u16 reg;
++
++	reg = r16(priv, ADM_OTBE_P2_PVID);
++	reg &= ~(ADM_OTBE_MASK);
++	w16(priv, ADM_OTBE_P2_PVID, reg);
++	reg = r16(priv, ADM_IFNTE);
++	reg &= ~(ADM_IFNTE_MASK);
++	w16(priv, ADM_IFNTE, reg);
++	reg = r16(priv, ADM_VID_CHECK);
++	reg |= ADM_VID_CHECK_MASK;
++	w16(priv, ADM_VID_CHECK, reg);
++	reg = r16(priv, ADM_SYSC0);
++	reg |= ADM_NTTE;
++	reg &= ~(ADM_RVID1);
++	w16(priv, ADM_SYSC0, reg);
++	reg = r16(priv, ADM_SYSC3);
++	reg |= ADM_TBV;
++	w16(priv, ADM_SYSC3, reg);
++}
++
++static void
++adm6996_enable_vlan_6996l(struct adm6996_priv *priv)
++{
++	u16 reg;
++
++	reg = r16(priv, ADM_SYSC3);
++	reg |= ADM_TBV;
++	reg |= ADM_MAC_CLONE;
++	w16(priv, ADM_SYSC3, reg);
++}
++
++/*
++ * Disable VLANs
++ *
++ * Sets VLAN mapping for port-based VLAN with all ports connected to
++ * eachother (this is also the power-on default).
++ *
++ * Precondition: reg_mutex must be held
++ */
++static void
++adm6996_disable_vlan(struct adm6996_priv *priv)
++{
++	u16 reg;
++	int i;
++
++	for (i = 0; i < ADM_NUM_VLANS; i++) {
++		reg = ADM_VLAN_FILT_MEMBER_MASK;
++		w16(priv, ADM_VLAN_FILT_L(i), reg);
++		reg = ADM_VLAN_FILT_VALID | ADM_VLAN_FILT_VID(1);
++		w16(priv, ADM_VLAN_FILT_H(i), reg);
++	}
++
++	reg = r16(priv, ADM_OTBE_P2_PVID);
++	reg |= ADM_OTBE_MASK;
++	w16(priv, ADM_OTBE_P2_PVID, reg);
++	reg = r16(priv, ADM_IFNTE);
++	reg |= ADM_IFNTE_MASK;
++	w16(priv, ADM_IFNTE, reg);
++	reg = r16(priv, ADM_VID_CHECK);
++	reg &= ~(ADM_VID_CHECK_MASK);
++	w16(priv, ADM_VID_CHECK, reg);
++	reg = r16(priv, ADM_SYSC0);
++	reg &= ~(ADM_NTTE);
++	reg |= ADM_RVID1;
++	w16(priv, ADM_SYSC0, reg);
++	reg = r16(priv, ADM_SYSC3);
++	reg &= ~(ADM_TBV);
++	w16(priv, ADM_SYSC3, reg);
++}
++
++/*
++ * Disable VLANs
++ *
++ * Sets VLAN mapping for port-based VLAN with all ports connected to
++ * eachother (this is also the power-on default).
++ *
++ * Precondition: reg_mutex must be held
++ */
++static void
++adm6996_disable_vlan_6996l(struct adm6996_priv *priv)
++{
++	u16 reg;
++	int i;
++
++	for (i = 0; i < ADM_NUM_VLANS; i++) {
++		w16(priv, ADM_VLAN_MAP(i), 0);
++	}
++
++	reg = r16(priv, ADM_SYSC3);
++	reg &= ~(ADM_TBV);
++	reg &= ~(ADM_MAC_CLONE);
++	w16(priv, ADM_SYSC3, reg);
++}
++
++/*
++ * Precondition: reg_mutex must be held
++ */
++static void
++adm6996_apply_port_pvids(struct adm6996_priv *priv)
++{
++	u16 reg;
++	int i;
++
++	for (i = 0; i < ADM_NUM_PORTS; i++) {
++		reg = r16(priv, adm_portcfg[i]);
++		reg &= ~(ADM_PORTCFG_PVID_MASK);
++		reg |= ADM_PORTCFG_PVID(priv->pvid[i]);
++		if (priv->model == ADM6996L) {
++			if (priv->tagged_ports & (1 << i))
++				reg |= (1 << 4);
++			else
++				reg &= ~(1 << 4);
++		}
++		w16(priv, adm_portcfg[i], reg);
++	}
++
++	w16(priv, ADM_P0_PVID, ADM_P0_PVID_VAL(priv->pvid[0]));
++	w16(priv, ADM_P1_PVID, ADM_P1_PVID_VAL(priv->pvid[1]));
++	reg = r16(priv, ADM_OTBE_P2_PVID);
++	reg &= ~(ADM_P2_PVID_MASK);
++	reg |= ADM_P2_PVID_VAL(priv->pvid[2]);
++	w16(priv, ADM_OTBE_P2_PVID, reg);
++	reg = ADM_P3_PVID_VAL(priv->pvid[3]);
++	reg |= ADM_P4_PVID_VAL(priv->pvid[4]);
++	w16(priv, ADM_P3_P4_PVID, reg);
++	reg = r16(priv, ADM_P5_PVID);
++	reg &= ~(ADM_P2_PVID_MASK);
++	reg |= ADM_P5_PVID_VAL(priv->pvid[5]);
++	w16(priv, ADM_P5_PVID, reg);
++}
++
++/*
++ * Precondition: reg_mutex must be held
++ */
++static void
++adm6996_apply_vlan_filters(struct adm6996_priv *priv)
++{
++	u8 ports, tagged;
++	u16 vid, reg;
++	int i;
++
++	for (i = 0; i < ADM_NUM_VLANS; i++) {
++		vid = priv->vlan_id[i];
++		ports = priv->vlan_table[i];
++		tagged = priv->vlan_tagged[i];
++
++		if (ports == 0) {
++			/* Disable VLAN entry */
++			w16(priv, ADM_VLAN_FILT_H(i), 0);
++			w16(priv, ADM_VLAN_FILT_L(i), 0);
++			continue;
++		}
++
++		reg = ADM_VLAN_FILT_MEMBER(ports);
++		reg |= ADM_VLAN_FILT_TAGGED(tagged);
++		w16(priv, ADM_VLAN_FILT_L(i), reg);
++		reg = ADM_VLAN_FILT_VALID | ADM_VLAN_FILT_VID(vid);
++		w16(priv, ADM_VLAN_FILT_H(i), reg);
++	}
++}
++
++static void
++adm6996_apply_vlan_filters_6996l(struct adm6996_priv *priv)
++{
++	u8 ports;
++	u16 reg;
++	int i;
++
++	for (i = 0; i < ADM_NUM_VLANS; i++) {
++		ports = priv->vlan_table[i];
++
++		if (ports == 0) {
++			/* Disable VLAN entry */
++			w16(priv, ADM_VLAN_MAP(i), 0);
++			continue;
++		} else {
++			reg = ADM_VLAN_FILT(ports);
++			w16(priv, ADM_VLAN_MAP(i), reg);
++		}
++	}
++}
++
++static int
++adm6996_hw_apply(struct switch_dev *dev)
++{
++	struct adm6996_priv *priv = to_adm(dev);
++
++	pr_devel("hw_apply\n");
++
++	mutex_lock(&priv->reg_mutex);
++
++	if (!priv->enable_vlan) {
++		if (priv->vlan_enabled) {
++			if (priv->model == ADM6996L)
++				adm6996_disable_vlan_6996l(priv);
++			else
++				adm6996_disable_vlan(priv);
++			priv->vlan_enabled = 0;
++		}
++		goto out;
++	}
++
++	if (!priv->vlan_enabled) {
++		if (priv->model == ADM6996L)
++			adm6996_enable_vlan_6996l(priv);
++		else
++			adm6996_enable_vlan(priv);
++		priv->vlan_enabled = 1;
++	}
++
++	adm6996_apply_port_pvids(priv);
++	if (priv->model == ADM6996L)
++		adm6996_apply_vlan_filters_6996l(priv);
++	else
++		adm6996_apply_vlan_filters(priv);
++
++out:
++	mutex_unlock(&priv->reg_mutex);
++
++	return 0;
++}
++
++/*
++ * Reset the switch
++ *
++ * The ADM6996 can't do a software-initiated reset, so we just initialise the
++ * registers we support in this driver.
++ *
++ * Precondition: reg_mutex must be held
++ */
++static void
++adm6996_perform_reset (struct adm6996_priv *priv)
++{
++	int i;
++
++	/* initialize port and vlan settings */
++	for (i = 0; i < ADM_NUM_PORTS - 1; i++) {
++		w16(priv, adm_portcfg[i], ADM_PORTCFG_INIT |
++			ADM_PORTCFG_PVID(0));
++	}
++	w16(priv, adm_portcfg[5], ADM_PORTCFG_CPU);
++
++	if (priv->model == ADM6996M || priv->model == ADM6996FC) {
++		/* reset all PHY ports */
++		for (i = 0; i < ADM_PHY_PORTS; i++) {
++			w16(priv, ADM_PHY_PORT(i), ADM_PHYCFG_INIT);
++		}
++	}
++
++	priv->enable_vlan = 0;
++	priv->vlan_enabled = 0;
++
++	for (i = 0; i < ADM_NUM_PORTS; i++) {
++		priv->pvid[i] = 0;
++	}
++
++	for (i = 0; i < ADM_NUM_VLANS; i++) {
++		priv->vlan_id[i] = i;
++		priv->vlan_table[i] = 0;
++		priv->vlan_tagged[i] = 0;
++	}
++
++	if (priv->model == ADM6996M) {
++		/* Clear VLAN priority map so prio's are unused */
++		w16 (priv, ADM_VLAN_PRIOMAP, 0);
++
++		adm6996_disable_vlan(priv);
++		adm6996_apply_port_pvids(priv);
++	} else if (priv->model == ADM6996L) {
++		/* Clear VLAN priority map so prio's are unused */
++		w16 (priv, ADM_VLAN_PRIOMAP, 0);
++
++		adm6996_disable_vlan_6996l(priv);
++		adm6996_apply_port_pvids(priv);
++	}
++}
++
++static int
++adm6996_reset_switch(struct switch_dev *dev)
++{
++	struct adm6996_priv *priv = to_adm(dev);
++
++	pr_devel("reset\n");
++
++	mutex_lock(&priv->reg_mutex);
++	adm6996_perform_reset (priv);
++	mutex_unlock(&priv->reg_mutex);
++	return 0;
++}
++
++static int
++adm6996_get_port_link(struct switch_dev *dev, int port,
++		struct switch_port_link *link)
++{
++	struct adm6996_priv *priv = to_adm(dev);
++	
++	u16 reg = 0;
++	
++	if (port >= ADM_NUM_PORTS)
++		return -EINVAL;
++	
++	switch (port) {
++	case 0:
++		reg = r16(priv, ADM_PS0);
++		break;
++	case 1:
++		reg = r16(priv, ADM_PS0);
++		reg = reg >> 8;
++		break;
++	case 2:
++		reg = r16(priv, ADM_PS1);
++		break;
++	case 3:
++		reg = r16(priv, ADM_PS1);
++		reg = reg >> 8;
++		break;
++	case 4:
++		reg = r16(priv, ADM_PS1);
++		reg = reg >> 12;
++		break;
++	case 5:
++		reg = r16(priv, ADM_PS2);
++		/* Bits 0, 1, 3 and 4. */
++		reg = (reg & 3) | ((reg & 24) >> 1);
++		break;
++	default:
++		return -EINVAL;
++	}
++	
++	link->link = reg & ADM_PS_LS;
++	if (!link->link)
++		return 0;
++	link->aneg = true;
++	link->duplex = reg & ADM_PS_DS;
++	link->tx_flow = reg & ADM_PS_FCS;
++	link->rx_flow = reg & ADM_PS_FCS;
++	if (reg & ADM_PS_SS)
++		link->speed = SWITCH_PORT_SPEED_100;
++	else
++		link->speed = SWITCH_PORT_SPEED_10;
++
++	return 0;
++}
++
++static int
++adm6996_sw_get_port_mib(struct switch_dev *dev,
++		       const struct switch_attr *attr,
++		       struct switch_val *val)
++{
++	struct adm6996_priv *priv = to_adm(dev);
++	int port;
++	char *buf = priv->buf;
++	int i, len = 0;
++	u32 reg = 0;
++
++	port = val->port_vlan;
++	if (port >= ADM_NUM_PORTS)
++		return -EINVAL;
++
++	mutex_lock(&priv->mib_lock);
++
++	len += snprintf(buf + len, sizeof(priv->buf) - len,
++			"Port %d MIB counters\n",
++			port);
++
++	for (i = 0; i < ARRAY_SIZE(adm6996_mibs); i++) {
++		reg = r16(priv, adm6996_mibs[i].offset + ADM_OFFSET_PORT(port));
++		reg += r16(priv, adm6996_mibs[i].offset + ADM_OFFSET_PORT(port) + 1) << 16;
++		len += snprintf(buf + len, sizeof(priv->buf) - len,
++				"%-12s: %u\n",
++				adm6996_mibs[i].name,
++				reg);
++	}
++
++	mutex_unlock(&priv->mib_lock);
++
++	val->value.s = buf;
++	val->len = len;
++
++	return 0;
++}
++
++static int
++adm6996_get_port_stats(struct switch_dev *dev, int port,
++			struct switch_port_stats *stats)
++{
++	struct adm6996_priv *priv = to_adm(dev);
++	int id;
++	u32 reg = 0;
++
++	if (port >= ADM_NUM_PORTS)
++		return -EINVAL;
++
++	mutex_lock(&priv->mib_lock);
++
++	id = ADM6996_MIB_TXB_ID;
++	reg = r16(priv, adm6996_mibs[id].offset + ADM_OFFSET_PORT(port));
++	reg += r16(priv, adm6996_mibs[id].offset + ADM_OFFSET_PORT(port) + 1) << 16;
++	stats->tx_bytes = reg;
++
++	id = ADM6996_MIB_RXB_ID;
++	reg = r16(priv, adm6996_mibs[id].offset + ADM_OFFSET_PORT(port));
++	reg += r16(priv, adm6996_mibs[id].offset + ADM_OFFSET_PORT(port) + 1) << 16;
++	stats->rx_bytes = reg;
++
++	mutex_unlock(&priv->mib_lock);
++
++	return 0;
++}
++
++static struct switch_attr adm6996_globals[] = {
++	{
++	 .type = SWITCH_TYPE_INT,
++	 .name = "enable_vlan",
++	 .description = "Enable VLANs",
++	 .set = adm6996_set_enable_vlan,
++	 .get = adm6996_get_enable_vlan,
++	},
++#ifdef DEBUG
++	{
++	 .type = SWITCH_TYPE_INT,
++	 .name = "addr",
++	 .description =
++	 "Direct register access: set register address (0 - 1023)",
++	 .set = adm6996_set_addr,
++	 .get = adm6996_get_addr,
++	 },
++	{
++	 .type = SWITCH_TYPE_INT,
++	 .name = "data",
++	 .description =
++	 "Direct register access: read/write to register (0 - 65535)",
++	 .set = adm6996_set_data,
++	 .get = adm6996_get_data,
++	 },
++#endif /* def DEBUG */
++};
++
++static struct switch_attr adm6996_port[] = {
++	{
++	 .type = SWITCH_TYPE_STRING,
++	 .name = "mib",
++	 .description = "Get port's MIB counters",
++	 .set = NULL,
++	 .get = adm6996_sw_get_port_mib,
++	},
++};
++
++static struct switch_attr adm6996_vlan[] = {
++	{
++	 .type = SWITCH_TYPE_INT,
++	 .name = "vid",
++	 .description = "VLAN ID",
++	 .set = adm6996_set_vid,
++	 .get = adm6996_get_vid,
++	 },
++};
++
++static struct switch_dev_ops adm6996_ops = {
++	.attr_global = {
++			.attr = adm6996_globals,
++			.n_attr = ARRAY_SIZE(adm6996_globals),
++			},
++	.attr_port = {
++		      .attr = adm6996_port,
++		      .n_attr = ARRAY_SIZE(adm6996_port),
++		      },
++	.attr_vlan = {
++		      .attr = adm6996_vlan,
++		      .n_attr = ARRAY_SIZE(adm6996_vlan),
++		      },
++	.get_port_pvid = adm6996_get_pvid,
++	.set_port_pvid = adm6996_set_pvid,
++	.get_vlan_ports = adm6996_get_ports,
++	.set_vlan_ports = adm6996_set_ports,
++	.apply_config = adm6996_hw_apply,
++	.reset_switch = adm6996_reset_switch,
++	.get_port_link = adm6996_get_port_link,
++	.get_port_stats = adm6996_get_port_stats,
++};
++
++static int adm6996_switch_init(struct adm6996_priv *priv, const char *alias, struct net_device *netdev)
++{
++	struct switch_dev *swdev;
++	u16 test, old;
++
++	if (!priv->model) {
++		/* Detect type of chip */
++		old = r16(priv, ADM_VID_CHECK);
++		test = old ^ (1 << 12);
++		w16(priv, ADM_VID_CHECK, test);
++		test ^= r16(priv, ADM_VID_CHECK);
++		if (test & (1 << 12)) {
++			/* 
++			 * Bit 12 of this register is read-only. 
++			 * This is the FC model. 
++			 */
++			priv->model = ADM6996FC;
++		} else {
++			/* Bit 12 is read-write. This is the M model. */
++			priv->model = ADM6996M;
++			w16(priv, ADM_VID_CHECK, old);
++		}
++	}
++
++	swdev = &priv->dev;
++	swdev->name = (adm6996_model_name[priv->model]);
++	swdev->cpu_port = ADM_CPU_PORT;
++	swdev->ports = ADM_NUM_PORTS;
++	swdev->vlans = ADM_NUM_VLANS;
++	swdev->ops = &adm6996_ops;
++	swdev->alias = alias;
++
++	/* The ADM6996L connected through GPIOs does not support any switch
++	   status calls */
++	if (priv->model == ADM6996L) {
++		adm6996_ops.attr_port.n_attr = 0;
++		adm6996_ops.get_port_link = NULL;
++	}
++
++	pr_info ("%s: %s model PHY found.\n", alias, swdev->name);
++
++	mutex_lock(&priv->reg_mutex);
++	adm6996_perform_reset (priv);
++	mutex_unlock(&priv->reg_mutex);
++
++	if (priv->model == ADM6996M || priv->model == ADM6996L) {
++		return register_switch(swdev, netdev);
++	}
++
++	return -ENODEV;
++}
++
++static int adm6996_config_init(struct phy_device *pdev)
++{
++	struct adm6996_priv *priv;
++	int ret;
++
++	linkmode_zero(pdev->supported);
++	linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, pdev->supported);
++	linkmode_copy(pdev->advertising, pdev->supported);
++
++	if (pdev->mdio.addr != 0) {
++		pr_info ("%s: PHY overlaps ADM6996, providing fixed PHY 0x%x.\n"
++				, pdev->attached_dev->name, pdev->mdio.addr);
++		return 0;
++	}
++
++	priv = devm_kzalloc(&pdev->mdio.dev, sizeof(struct adm6996_priv), GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++
++	mutex_init(&priv->reg_mutex);
++	mutex_init(&priv->mib_lock);
++	priv->priv = pdev;
++	priv->read = adm6996_read_mii_reg;
++	priv->write = adm6996_write_mii_reg;
++
++	ret = adm6996_switch_init(priv, pdev->attached_dev->name, pdev->attached_dev);
++	if (ret < 0)
++		return ret;
++
++	pdev->priv = priv;
++
++	return 0;
++}
++
++/*
++ * Warning: phydev->priv is NULL if phydev->mdio.addr != 0
++ */
++static int adm6996_read_status(struct phy_device *phydev)
++{
++	phydev->speed = SPEED_100;
++	phydev->duplex = DUPLEX_FULL;
++	phydev->link = 1;
++
++	phydev->state = PHY_RUNNING;
++	netif_carrier_on(phydev->attached_dev);
++	phydev->adjust_link(phydev->attached_dev);
++
++	return 0;
++}
++
++/*
++ * Warning: phydev->priv is NULL if phydev->mdio.addr != 0
++ */
++static int adm6996_config_aneg(struct phy_device *phydev)
++{
++	return 0;
++}
++
++static int adm6996_fixup(struct phy_device *dev)
++{
++	struct mii_bus *bus = dev->mdio.bus;
++	u16 reg;
++
++	/* Our custom registers are at PHY addresses 0-10. Claim those. */
++	if (dev->mdio.addr > 10)
++		return 0;
++
++	/* look for the switch on the bus */
++	reg = bus->read(bus, PHYADDR(ADM_SIG0)) & ADM_SIG0_MASK;
++	if (reg != ADM_SIG0_VAL)
++		return 0;
++
++	reg = bus->read(bus, PHYADDR(ADM_SIG1)) & ADM_SIG1_MASK;
++	if (reg != ADM_SIG1_VAL)
++		return 0;
++
++	dev->phy_id = (ADM_SIG0_VAL << 16) | ADM_SIG1_VAL;
++
++	return 0;
++}
++
++static int adm6996_probe(struct phy_device *pdev)
++{
++	return 0;
++}
++
++static void adm6996_remove(struct phy_device *pdev)
++{
++	struct adm6996_priv *priv = phy_to_adm(pdev);
++
++	if (priv && (priv->model == ADM6996M || priv->model == ADM6996L))
++		unregister_switch(&priv->dev);
++}
++
++static int adm6996_soft_reset(struct phy_device *phydev)
++{
++	/* we don't need an extra reset */
++	return 0;
++}
++
++static struct phy_driver adm6996_phy_driver = {
++	.name		= "Infineon ADM6996",
++	.phy_id		= (ADM_SIG0_VAL << 16) | ADM_SIG1_VAL,
++	.phy_id_mask	= 0xffffffff,
++	.features	= PHY_BASIC_FEATURES,
++	.probe		= adm6996_probe,
++	.remove		= adm6996_remove,
++	.config_init	= &adm6996_config_init,
++	.config_aneg	= &adm6996_config_aneg,
++	.read_status	= &adm6996_read_status,
++	.soft_reset	= adm6996_soft_reset,
++};
++
++static int adm6996_gpio_probe(struct platform_device *pdev)
++{
++	struct adm6996_gpio_platform_data *pdata = pdev->dev.platform_data;
++	struct adm6996_priv *priv;
++	int ret;
++
++	if (!pdata)
++		return -EINVAL;
++
++	priv = devm_kzalloc(&pdev->dev, sizeof(struct adm6996_priv), GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++
++	mutex_init(&priv->reg_mutex);
++	mutex_init(&priv->mib_lock);
++
++	priv->eecs = pdata->eecs;
++	priv->eedi = pdata->eedi;
++	priv->eesk = pdata->eesk;
++
++	priv->model = pdata->model;
++	priv->read = adm6996_read_gpio_reg;
++	priv->write = adm6996_write_gpio_reg;
++
++	ret = devm_gpio_request(&pdev->dev, priv->eecs, "adm_eecs");
++	if (ret)
++		return ret;
++	ret = devm_gpio_request(&pdev->dev, priv->eedi, "adm_eedi");
++	if (ret)
++		return ret;
++	ret = devm_gpio_request(&pdev->dev, priv->eesk, "adm_eesk");
++	if (ret)
++		return ret;
++
++	ret = adm6996_switch_init(priv, dev_name(&pdev->dev), NULL);
++	if (ret < 0)
++		return ret;
++
++	platform_set_drvdata(pdev, priv);
++
++	return 0;
++}
++
++static int adm6996_gpio_remove(struct platform_device *pdev)
++{
++	struct adm6996_priv *priv = platform_get_drvdata(pdev);
++
++	if (priv && (priv->model == ADM6996M || priv->model == ADM6996L))
++		unregister_switch(&priv->dev);
++
++	return 0;
++}
++
++static struct platform_driver adm6996_gpio_driver = {
++	.probe = adm6996_gpio_probe,
++	.remove = adm6996_gpio_remove,
++	.driver = {
++		.name = "adm6996_gpio",
++	},
++};
++
++static int __init adm6996_init(void)
++{
++	int err;
++
++	phy_register_fixup_for_id(PHY_ANY_ID, adm6996_fixup);
++	err = phy_driver_register(&adm6996_phy_driver, THIS_MODULE);
++	if (err)
++		return err;
++
++	err = platform_driver_register(&adm6996_gpio_driver);
++	if (err)
++		phy_driver_unregister(&adm6996_phy_driver);
++
++	return err;
++}
++
++static void __exit adm6996_exit(void)
++{
++	platform_driver_unregister(&adm6996_gpio_driver);
++	phy_driver_unregister(&adm6996_phy_driver);
++}
++
++module_init(adm6996_init);
++module_exit(adm6996_exit);
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/adm6996.h b/target/linux/generic/files-5.4/drivers/net/phy/adm6996.h
+new file mode 100644
+index 0000000000..6fd460a465
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/adm6996.h
+@@ -0,0 +1,186 @@
++/*
++ * ADM6996 switch driver
++ *
++ * Copyright (c) 2008 Felix Fietkau <nbd@nbd.name>
++ * Copyright (c) 2010,2011 Peter Lebbing <peter@digitalbrains.com>
++ *
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of the GNU General Public License v2 as published by the
++ * Free Software Foundation
++ */
++#ifndef __ADM6996_H
++#define __ADM6996_H
++
++/*
++ * ADM_PHY_PORTS: Number of ports with a PHY.
++ * We only control ports 0 to 3, because if 4 is connected, it is most likely
++ * not connected to the switch but to a separate MII and MAC for the WAN port.
++ */
++#define ADM_PHY_PORTS	4
++#define ADM_NUM_PORTS	6
++#define ADM_CPU_PORT	5
++
++#define ADM_NUM_VLANS 16
++#define ADM_VLAN_MAX_ID 4094
++
++enum admreg {
++	ADM_EEPROM_BASE		= 0x0,
++		ADM_P0_CFG		= ADM_EEPROM_BASE + 1,
++		ADM_P1_CFG		= ADM_EEPROM_BASE + 3,
++		ADM_P2_CFG		= ADM_EEPROM_BASE + 5,
++		ADM_P3_CFG		= ADM_EEPROM_BASE + 7,
++		ADM_P4_CFG		= ADM_EEPROM_BASE + 8,
++		ADM_P5_CFG		= ADM_EEPROM_BASE + 9,
++		ADM_SYSC0		= ADM_EEPROM_BASE + 0xa,
++		ADM_VLAN_PRIOMAP	= ADM_EEPROM_BASE + 0xe,
++		ADM_SYSC3		= ADM_EEPROM_BASE + 0x11,
++		/* Input Force No Tag Enable */
++		ADM_IFNTE		= ADM_EEPROM_BASE + 0x20,
++		ADM_VID_CHECK		= ADM_EEPROM_BASE + 0x26,
++		ADM_P0_PVID		= ADM_EEPROM_BASE + 0x28,
++		ADM_P1_PVID		= ADM_EEPROM_BASE + 0x29,
++		/* Output Tag Bypass Enable and P2 PVID */
++		ADM_OTBE_P2_PVID	= ADM_EEPROM_BASE + 0x2a,
++		ADM_P3_P4_PVID		= ADM_EEPROM_BASE + 0x2b,
++		ADM_P5_PVID		= ADM_EEPROM_BASE + 0x2c,
++	ADM_EEPROM_EXT_BASE	= 0x40,
++#define ADM_VLAN_FILT_L(n) (ADM_EEPROM_EXT_BASE + 2 * (n))
++#define ADM_VLAN_FILT_H(n) (ADM_EEPROM_EXT_BASE + 1 + 2 * (n))
++#define ADM_VLAN_MAP(n) (ADM_EEPROM_BASE + 0x13 + n)
++	ADM_COUNTER_BASE	= 0xa0,
++		ADM_SIG0		= ADM_COUNTER_BASE + 0,
++		ADM_SIG1		= ADM_COUNTER_BASE + 1,
++		ADM_PS0		= ADM_COUNTER_BASE + 2,
++		ADM_PS1		= ADM_COUNTER_BASE + 3,
++		ADM_PS2		= ADM_COUNTER_BASE + 4,
++		ADM_CL0		= ADM_COUNTER_BASE + 8, /* RxPacket */
++		ADM_CL6		= ADM_COUNTER_BASE + 0x1a, /* RxByte */
++		ADM_CL12		= ADM_COUNTER_BASE + 0x2c, /* TxPacket */
++		ADM_CL18		= ADM_COUNTER_BASE + 0x3e, /* TxByte */
++		ADM_CL24		= ADM_COUNTER_BASE + 0x50, /* Coll */
++		ADM_CL30		= ADM_COUNTER_BASE + 0x62, /* Err */
++#define ADM_OFFSET_PORT(n) ((n * 4) - (n / 4) * 2 - (n / 5) * 2)
++	ADM_PHY_BASE		= 0x200,
++#define ADM_PHY_PORT(n) (ADM_PHY_BASE + (0x20 * n))
++};
++
++/* Chip identification patterns */
++#define	ADM_SIG0_MASK	0xffff
++#define ADM_SIG0_VAL	0x1023
++#define ADM_SIG1_MASK	0xffff
++#define ADM_SIG1_VAL	0x0007
++
++enum {
++	ADM_PHYCFG_COLTST     = (1 << 7),	/* Enable collision test */
++	ADM_PHYCFG_DPLX       = (1 << 8),	/* Enable full duplex */
++	ADM_PHYCFG_ANEN_RST   = (1 << 9),	/* Restart auto negotiation (self clear) */
++	ADM_PHYCFG_ISO        = (1 << 10),	/* Isolate PHY */
++	ADM_PHYCFG_PDN        = (1 << 11),	/* Power down PHY */
++	ADM_PHYCFG_ANEN       = (1 << 12),	/* Enable auto negotiation */
++	ADM_PHYCFG_SPEED_100  = (1 << 13),	/* Enable 100 Mbit/s */
++	ADM_PHYCFG_LPBK       = (1 << 14),	/* Enable loopback operation */
++	ADM_PHYCFG_RST        = (1 << 15),	/* Reset the port (self clear) */
++	ADM_PHYCFG_INIT = (
++		ADM_PHYCFG_RST |
++		ADM_PHYCFG_SPEED_100 |
++		ADM_PHYCFG_ANEN |
++		ADM_PHYCFG_ANEN_RST
++	)
++};
++
++enum {
++	ADM_PORTCFG_FC        = (1 << 0),	/* Enable 802.x flow control */
++	ADM_PORTCFG_AN        = (1 << 1),	/* Enable auto-negotiation */
++	ADM_PORTCFG_SPEED_100 = (1 << 2),	/* Enable 100 Mbit/s */
++	ADM_PORTCFG_DPLX      = (1 << 3),	/* Enable full duplex */
++	ADM_PORTCFG_OT        = (1 << 4),	/* Output tagged packets */
++	ADM_PORTCFG_PD        = (1 << 5),	/* Port disable */
++	ADM_PORTCFG_TV_PRIO   = (1 << 6),	/* 0 = VLAN based priority
++	                                 	 * 1 = TOS based priority */
++	ADM_PORTCFG_PPE       = (1 << 7),	/* Port based priority enable */
++	ADM_PORTCFG_PP_S      = (1 << 8),	/* Port based priority, 2 bits */
++	ADM_PORTCFG_PVID_BASE = (1 << 10),	/* Primary VLAN id, 4 bits */
++	ADM_PORTCFG_FSE	      = (1 << 14),	/* Fx select enable */
++	ADM_PORTCFG_CAM       = (1 << 15),	/* Crossover Auto MDIX */
++
++	ADM_PORTCFG_INIT = (
++		ADM_PORTCFG_FC |
++		ADM_PORTCFG_AN |
++		ADM_PORTCFG_SPEED_100 |
++		ADM_PORTCFG_DPLX |
++		ADM_PORTCFG_CAM
++	),
++	ADM_PORTCFG_CPU = (
++		ADM_PORTCFG_FC |
++		ADM_PORTCFG_SPEED_100 |
++		ADM_PORTCFG_OT |
++		ADM_PORTCFG_DPLX
++	),
++};
++
++#define ADM_PORTCFG_PPID(n) ((n & 0x3) << 8)
++#define ADM_PORTCFG_PVID(n) ((n & 0xf) << 10)
++#define ADM_PORTCFG_PVID_MASK (0xf << 10)
++
++#define ADM_IFNTE_MASK (0x3f << 9)
++#define ADM_VID_CHECK_MASK (0x3f << 6)
++
++#define ADM_P0_PVID_VAL(n) ((((n) & 0xff0) >> 4) << 0)
++#define ADM_P1_PVID_VAL(n) ((((n) & 0xff0) >> 4) << 0)
++#define ADM_P2_PVID_VAL(n) ((((n) & 0xff0) >> 4) << 0)
++#define ADM_P3_PVID_VAL(n) ((((n) & 0xff0) >> 4) << 0)
++#define ADM_P4_PVID_VAL(n) ((((n) & 0xff0) >> 4) << 8)
++#define ADM_P5_PVID_VAL(n) ((((n) & 0xff0) >> 4) << 0)
++#define ADM_P2_PVID_MASK 0xff
++
++#define ADM_OTBE(n) (((n) & 0x3f) << 8)
++#define ADM_OTBE_MASK (0x3f << 8)
++
++/* ADM_SYSC0 */
++enum {
++	ADM_NTTE	= (1 << 2),	/* New Tag Transmit Enable */
++	ADM_RVID1	= (1 << 8)	/* Replace VLAN ID 1 */
++};
++
++/* Tag Based VLAN in ADM_SYSC3 */
++#define ADM_MAC_CLONE	BIT(4)
++#define ADM_TBV		BIT(5)
++
++static const u8 adm_portcfg[] = {
++	[0] = ADM_P0_CFG,
++	[1] = ADM_P1_CFG,
++	[2] = ADM_P2_CFG,
++	[3] = ADM_P3_CFG,
++	[4] = ADM_P4_CFG,
++	[5] = ADM_P5_CFG,
++};
++
++/* Fields in ADM_VLAN_FILT_L(x) */
++#define ADM_VLAN_FILT_FID(n) (((n) & 0xf) << 12)
++#define ADM_VLAN_FILT_TAGGED(n) (((n) & 0x3f) << 6)
++#define ADM_VLAN_FILT_MEMBER(n) (((n) & 0x3f) << 0)
++#define ADM_VLAN_FILT_MEMBER_MASK 0x3f
++/* Fields in ADM_VLAN_FILT_H(x) */
++#define ADM_VLAN_FILT_VALID (1 << 15)
++#define ADM_VLAN_FILT_VID(n) (((n) & 0xfff) << 0)
++
++/* Convert ports to a form for ADM6996L VLAN map */
++#define ADM_VLAN_FILT(ports) ((ports & 0x01) | ((ports & 0x02) << 1) | \
++			((ports & 0x04) << 2) | ((ports & 0x08) << 3) | \
++			((ports & 0x10) << 3) | ((ports & 0x20) << 3))
++
++/* Port status register */
++enum {
++	ADM_PS_LS = (1 << 0),	/* Link status */
++	ADM_PS_SS = (1 << 1),	/* Speed status */
++	ADM_PS_DS = (1 << 2),	/* Duplex status */
++	ADM_PS_FCS = (1 << 3)	/* Flow control status */
++};
++
++/*
++ * Split the register address in phy id and register
++ * it will get combined again by the mdio bus op
++ */
++#define PHYADDR(_reg)	((_reg >> 5) & 0xff), (_reg & 0x1f)
++
++#endif
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/ar8216.c b/target/linux/generic/files-5.4/drivers/net/phy/ar8216.c
+new file mode 100644
+index 0000000000..dbcb1c41c4
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/ar8216.c
+@@ -0,0 +1,2925 @@
++/*
++ * ar8216.c: AR8216 switch driver
++ *
++ * Copyright (C) 2009 Felix Fietkau <nbd@nbd.name>
++ * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
++
++#include <linux/if.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/list.h>
++#include <linux/if_ether.h>
++#include <linux/skbuff.h>
++#include <linux/netdevice.h>
++#include <linux/netlink.h>
++#include <linux/of_device.h>
++#include <linux/of_mdio.h>
++#include <linux/of_net.h>
++#include <linux/bitops.h>
++#include <net/genetlink.h>
++#include <linux/switch.h>
++#include <linux/delay.h>
++#include <linux/phy.h>
++#include <linux/etherdevice.h>
++#include <linux/lockdep.h>
++#include <linux/ar8216_platform.h>
++#include <linux/workqueue.h>
++#include <linux/version.h>
++
++#include "ar8216.h"
++
++extern const struct ar8xxx_chip ar8327_chip;
++extern const struct ar8xxx_chip ar8337_chip;
++
++#define MIB_DESC_BASIC(_s , _o, _n)		\
++	{					\
++		.size = (_s),			\
++		.offset = (_o),			\
++		.name = (_n),			\
++		.type = AR8XXX_MIB_BASIC,	\
++	}
++
++#define MIB_DESC_EXT(_s , _o, _n)		\
++	{					\
++		.size = (_s),			\
++		.offset = (_o),			\
++		.name = (_n),			\
++		.type = AR8XXX_MIB_EXTENDED,	\
++	}
++
++static const struct ar8xxx_mib_desc ar8216_mibs[] = {
++	MIB_DESC_EXT(1, AR8216_STATS_RXBROAD, "RxBroad"),
++	MIB_DESC_EXT(1, AR8216_STATS_RXPAUSE, "RxPause"),
++	MIB_DESC_EXT(1, AR8216_STATS_RXMULTI, "RxMulti"),
++	MIB_DESC_EXT(1, AR8216_STATS_RXFCSERR, "RxFcsErr"),
++	MIB_DESC_EXT(1, AR8216_STATS_RXALIGNERR, "RxAlignErr"),
++	MIB_DESC_EXT(1, AR8216_STATS_RXRUNT, "RxRunt"),
++	MIB_DESC_EXT(1, AR8216_STATS_RXFRAGMENT, "RxFragment"),
++	MIB_DESC_EXT(1, AR8216_STATS_RX64BYTE, "Rx64Byte"),
++	MIB_DESC_EXT(1, AR8216_STATS_RX128BYTE, "Rx128Byte"),
++	MIB_DESC_EXT(1, AR8216_STATS_RX256BYTE, "Rx256Byte"),
++	MIB_DESC_EXT(1, AR8216_STATS_RX512BYTE, "Rx512Byte"),
++	MIB_DESC_EXT(1, AR8216_STATS_RX1024BYTE, "Rx1024Byte"),
++	MIB_DESC_EXT(1, AR8216_STATS_RXMAXBYTE, "RxMaxByte"),
++	MIB_DESC_EXT(1, AR8216_STATS_RXTOOLONG, "RxTooLong"),
++	MIB_DESC_BASIC(2, AR8216_STATS_RXGOODBYTE, "RxGoodByte"),
++	MIB_DESC_EXT(2, AR8216_STATS_RXBADBYTE, "RxBadByte"),
++	MIB_DESC_EXT(1, AR8216_STATS_RXOVERFLOW, "RxOverFlow"),
++	MIB_DESC_EXT(1, AR8216_STATS_FILTERED, "Filtered"),
++	MIB_DESC_EXT(1, AR8216_STATS_TXBROAD, "TxBroad"),
++	MIB_DESC_EXT(1, AR8216_STATS_TXPAUSE, "TxPause"),
++	MIB_DESC_EXT(1, AR8216_STATS_TXMULTI, "TxMulti"),
++	MIB_DESC_EXT(1, AR8216_STATS_TXUNDERRUN, "TxUnderRun"),
++	MIB_DESC_EXT(1, AR8216_STATS_TX64BYTE, "Tx64Byte"),
++	MIB_DESC_EXT(1, AR8216_STATS_TX128BYTE, "Tx128Byte"),
++	MIB_DESC_EXT(1, AR8216_STATS_TX256BYTE, "Tx256Byte"),
++	MIB_DESC_EXT(1, AR8216_STATS_TX512BYTE, "Tx512Byte"),
++	MIB_DESC_EXT(1, AR8216_STATS_TX1024BYTE, "Tx1024Byte"),
++	MIB_DESC_EXT(1, AR8216_STATS_TXMAXBYTE, "TxMaxByte"),
++	MIB_DESC_EXT(1, AR8216_STATS_TXOVERSIZE, "TxOverSize"),
++	MIB_DESC_BASIC(2, AR8216_STATS_TXBYTE, "TxByte"),
++	MIB_DESC_EXT(1, AR8216_STATS_TXCOLLISION, "TxCollision"),
++	MIB_DESC_EXT(1, AR8216_STATS_TXABORTCOL, "TxAbortCol"),
++	MIB_DESC_EXT(1, AR8216_STATS_TXMULTICOL, "TxMultiCol"),
++	MIB_DESC_EXT(1, AR8216_STATS_TXSINGLECOL, "TxSingleCol"),
++	MIB_DESC_EXT(1, AR8216_STATS_TXEXCDEFER, "TxExcDefer"),
++	MIB_DESC_EXT(1, AR8216_STATS_TXDEFER, "TxDefer"),
++	MIB_DESC_EXT(1, AR8216_STATS_TXLATECOL, "TxLateCol"),
++};
++
++const struct ar8xxx_mib_desc ar8236_mibs[39] = {
++	MIB_DESC_EXT(1, AR8236_STATS_RXBROAD, "RxBroad"),
++	MIB_DESC_EXT(1, AR8236_STATS_RXPAUSE, "RxPause"),
++	MIB_DESC_EXT(1, AR8236_STATS_RXMULTI, "RxMulti"),
++	MIB_DESC_EXT(1, AR8236_STATS_RXFCSERR, "RxFcsErr"),
++	MIB_DESC_EXT(1, AR8236_STATS_RXALIGNERR, "RxAlignErr"),
++	MIB_DESC_EXT(1, AR8236_STATS_RXRUNT, "RxRunt"),
++	MIB_DESC_EXT(1, AR8236_STATS_RXFRAGMENT, "RxFragment"),
++	MIB_DESC_EXT(1, AR8236_STATS_RX64BYTE, "Rx64Byte"),
++	MIB_DESC_EXT(1, AR8236_STATS_RX128BYTE, "Rx128Byte"),
++	MIB_DESC_EXT(1, AR8236_STATS_RX256BYTE, "Rx256Byte"),
++	MIB_DESC_EXT(1, AR8236_STATS_RX512BYTE, "Rx512Byte"),
++	MIB_DESC_EXT(1, AR8236_STATS_RX1024BYTE, "Rx1024Byte"),
++	MIB_DESC_EXT(1, AR8236_STATS_RX1518BYTE, "Rx1518Byte"),
++	MIB_DESC_EXT(1, AR8236_STATS_RXMAXBYTE, "RxMaxByte"),
++	MIB_DESC_EXT(1, AR8236_STATS_RXTOOLONG, "RxTooLong"),
++	MIB_DESC_BASIC(2, AR8236_STATS_RXGOODBYTE, "RxGoodByte"),
++	MIB_DESC_EXT(2, AR8236_STATS_RXBADBYTE, "RxBadByte"),
++	MIB_DESC_EXT(1, AR8236_STATS_RXOVERFLOW, "RxOverFlow"),
++	MIB_DESC_EXT(1, AR8236_STATS_FILTERED, "Filtered"),
++	MIB_DESC_EXT(1, AR8236_STATS_TXBROAD, "TxBroad"),
++	MIB_DESC_EXT(1, AR8236_STATS_TXPAUSE, "TxPause"),
++	MIB_DESC_EXT(1, AR8236_STATS_TXMULTI, "TxMulti"),
++	MIB_DESC_EXT(1, AR8236_STATS_TXUNDERRUN, "TxUnderRun"),
++	MIB_DESC_EXT(1, AR8236_STATS_TX64BYTE, "Tx64Byte"),
++	MIB_DESC_EXT(1, AR8236_STATS_TX128BYTE, "Tx128Byte"),
++	MIB_DESC_EXT(1, AR8236_STATS_TX256BYTE, "Tx256Byte"),
++	MIB_DESC_EXT(1, AR8236_STATS_TX512BYTE, "Tx512Byte"),
++	MIB_DESC_EXT(1, AR8236_STATS_TX1024BYTE, "Tx1024Byte"),
++	MIB_DESC_EXT(1, AR8236_STATS_TX1518BYTE, "Tx1518Byte"),
++	MIB_DESC_EXT(1, AR8236_STATS_TXMAXBYTE, "TxMaxByte"),
++	MIB_DESC_EXT(1, AR8236_STATS_TXOVERSIZE, "TxOverSize"),
++	MIB_DESC_BASIC(2, AR8236_STATS_TXBYTE, "TxByte"),
++	MIB_DESC_EXT(1, AR8236_STATS_TXCOLLISION, "TxCollision"),
++	MIB_DESC_EXT(1, AR8236_STATS_TXABORTCOL, "TxAbortCol"),
++	MIB_DESC_EXT(1, AR8236_STATS_TXMULTICOL, "TxMultiCol"),
++	MIB_DESC_EXT(1, AR8236_STATS_TXSINGLECOL, "TxSingleCol"),
++	MIB_DESC_EXT(1, AR8236_STATS_TXEXCDEFER, "TxExcDefer"),
++	MIB_DESC_EXT(1, AR8236_STATS_TXDEFER, "TxDefer"),
++	MIB_DESC_EXT(1, AR8236_STATS_TXLATECOL, "TxLateCol"),
++};
++
++static DEFINE_MUTEX(ar8xxx_dev_list_lock);
++static LIST_HEAD(ar8xxx_dev_list);
++
++static void
++ar8xxx_mib_start(struct ar8xxx_priv *priv);
++static void
++ar8xxx_mib_stop(struct ar8xxx_priv *priv);
++
++/* inspired by phy_poll_reset in drivers/net/phy/phy_device.c */
++static int
++ar8xxx_phy_poll_reset(struct mii_bus *bus)
++{
++        unsigned int sleep_msecs = 20;
++        int ret, elapsed, i;
++
++        for (elapsed = sleep_msecs; elapsed <= 600;
++	     elapsed += sleep_msecs) {
++                msleep(sleep_msecs);
++                for (i = 0; i < AR8XXX_NUM_PHYS; i++) {
++                        ret = mdiobus_read(bus, i, MII_BMCR);
++                        if (ret < 0)
++				return ret;
++                        if (ret & BMCR_RESET)
++				break;
++                        if (i == AR8XXX_NUM_PHYS - 1) {
++                                usleep_range(1000, 2000);
++                                return 0;
++                        }
++                }
++        }
++        return -ETIMEDOUT;
++}
++
++static int
++ar8xxx_phy_check_aneg(struct phy_device *phydev)
++{
++	int ret;
++
++	if (phydev->autoneg != AUTONEG_ENABLE)
++		return 0;
++	/*
++	 * BMCR_ANENABLE might have been cleared
++	 * by phy_init_hw in certain kernel versions
++	 * therefore check for it
++	 */
++	ret = phy_read(phydev, MII_BMCR);
++	if (ret < 0)
++		return ret;
++	if (ret & BMCR_ANENABLE)
++		return 0;
++
++	dev_info(&phydev->mdio.dev, "ANEG disabled, re-enabling ...\n");
++	ret |= BMCR_ANENABLE | BMCR_ANRESTART;
++	return phy_write(phydev, MII_BMCR, ret);
++}
++
++void
++ar8xxx_phy_init(struct ar8xxx_priv *priv)
++{
++	int i;
++	struct mii_bus *bus;
++
++	bus = priv->sw_mii_bus ?: priv->mii_bus;
++	for (i = 0; i < AR8XXX_NUM_PHYS; i++) {
++		if (priv->chip->phy_fixup)
++			priv->chip->phy_fixup(priv, i);
++
++		/* initialize the port itself */
++		mdiobus_write(bus, i, MII_ADVERTISE,
++			ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
++		if (ar8xxx_has_gige(priv))
++			mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
++		mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
++	}
++
++	ar8xxx_phy_poll_reset(bus);
++}
++
++u32
++ar8xxx_mii_read32(struct ar8xxx_priv *priv, int phy_id, int regnum)
++{
++	struct mii_bus *bus = priv->mii_bus;
++	u16 lo, hi;
++
++	lo = bus->read(bus, phy_id, regnum);
++	hi = bus->read(bus, phy_id, regnum + 1);
++
++	return (hi << 16) | lo;
++}
++
++void
++ar8xxx_mii_write32(struct ar8xxx_priv *priv, int phy_id, int regnum, u32 val)
++{
++	struct mii_bus *bus = priv->mii_bus;
++	u16 lo, hi;
++
++	lo = val & 0xffff;
++	hi = (u16) (val >> 16);
++
++	if (priv->chip->mii_lo_first)
++	{
++		bus->write(bus, phy_id, regnum, lo);
++		bus->write(bus, phy_id, regnum + 1, hi);
++	} else {
++		bus->write(bus, phy_id, regnum + 1, hi);
++		bus->write(bus, phy_id, regnum, lo);
++	}
++}
++
++u32
++ar8xxx_read(struct ar8xxx_priv *priv, int reg)
++{
++	struct mii_bus *bus = priv->mii_bus;
++	u16 r1, r2, page;
++	u32 val;
++
++	split_addr((u32) reg, &r1, &r2, &page);
++
++	mutex_lock(&bus->mdio_lock);
++
++	bus->write(bus, 0x18, 0, page);
++	wait_for_page_switch();
++	val = ar8xxx_mii_read32(priv, 0x10 | r2, r1);
++
++	mutex_unlock(&bus->mdio_lock);
++
++	return val;
++}
++
++void
++ar8xxx_write(struct ar8xxx_priv *priv, int reg, u32 val)
++{
++	struct mii_bus *bus = priv->mii_bus;
++	u16 r1, r2, page;
++
++	split_addr((u32) reg, &r1, &r2, &page);
++
++	mutex_lock(&bus->mdio_lock);
++
++	bus->write(bus, 0x18, 0, page);
++	wait_for_page_switch();
++	ar8xxx_mii_write32(priv, 0x10 | r2, r1, val);
++
++	mutex_unlock(&bus->mdio_lock);
++}
++
++u32
++ar8xxx_rmw(struct ar8xxx_priv *priv, int reg, u32 mask, u32 val)
++{
++	struct mii_bus *bus = priv->mii_bus;
++	u16 r1, r2, page;
++	u32 ret;
++
++	split_addr((u32) reg, &r1, &r2, &page);
++
++	mutex_lock(&bus->mdio_lock);
++
++	bus->write(bus, 0x18, 0, page);
++	wait_for_page_switch();
++
++	ret = ar8xxx_mii_read32(priv, 0x10 | r2, r1);
++	ret &= ~mask;
++	ret |= val;
++	ar8xxx_mii_write32(priv, 0x10 | r2, r1, ret);
++
++	mutex_unlock(&bus->mdio_lock);
++
++	return ret;
++}
++void
++ar8xxx_phy_dbg_read(struct ar8xxx_priv *priv, int phy_addr,
++           u16 dbg_addr, u16 *dbg_data)
++{
++       struct mii_bus *bus = priv->mii_bus;
++
++       mutex_lock(&bus->mdio_lock);
++       bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
++       *dbg_data = bus->read(bus, phy_addr, MII_ATH_DBG_DATA);
++       mutex_unlock(&bus->mdio_lock);
++}
++
++void
++ar8xxx_phy_dbg_write(struct ar8xxx_priv *priv, int phy_addr,
++		     u16 dbg_addr, u16 dbg_data)
++{
++	struct mii_bus *bus = priv->mii_bus;
++
++	mutex_lock(&bus->mdio_lock);
++	bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
++	bus->write(bus, phy_addr, MII_ATH_DBG_DATA, dbg_data);
++	mutex_unlock(&bus->mdio_lock);
++}
++
++static inline void
++ar8xxx_phy_mmd_prep(struct mii_bus *bus, int phy_addr, u16 addr, u16 reg)
++{
++	bus->write(bus, phy_addr, MII_ATH_MMD_ADDR, addr);
++	bus->write(bus, phy_addr, MII_ATH_MMD_DATA, reg);
++	bus->write(bus, phy_addr, MII_ATH_MMD_ADDR, addr | 0x4000);
++}
++
++void
++ar8xxx_phy_mmd_write(struct ar8xxx_priv *priv, int phy_addr, u16 addr, u16 reg, u16 data)
++{
++	struct mii_bus *bus = priv->mii_bus;
++
++	mutex_lock(&bus->mdio_lock);
++	ar8xxx_phy_mmd_prep(bus, phy_addr, addr, reg);
++	bus->write(bus, phy_addr, MII_ATH_MMD_DATA, data);
++	mutex_unlock(&bus->mdio_lock);
++}
++
++u16
++ar8xxx_phy_mmd_read(struct ar8xxx_priv *priv, int phy_addr, u16 addr, u16 reg)
++{
++	struct mii_bus *bus = priv->mii_bus;
++	u16 data;
++
++	mutex_lock(&bus->mdio_lock);
++	ar8xxx_phy_mmd_prep(bus, phy_addr, addr, reg);
++	data = bus->read(bus, phy_addr, MII_ATH_MMD_DATA);
++	mutex_unlock(&bus->mdio_lock);
++
++	return data;
++}
++
++static int
++ar8xxx_reg_wait(struct ar8xxx_priv *priv, u32 reg, u32 mask, u32 val,
++		unsigned timeout)
++{
++	int i;
++
++	for (i = 0; i < timeout; i++) {
++		u32 t;
++
++		t = ar8xxx_read(priv, reg);
++		if ((t & mask) == val)
++			return 0;
++
++		usleep_range(1000, 2000);
++		cond_resched();
++	}
++
++	return -ETIMEDOUT;
++}
++
++static int
++ar8xxx_mib_op(struct ar8xxx_priv *priv, u32 op)
++{
++	unsigned mib_func = priv->chip->mib_func;
++	int ret;
++
++	lockdep_assert_held(&priv->mib_lock);
++
++	/* Capture the hardware statistics for all ports */
++	ar8xxx_rmw(priv, mib_func, AR8216_MIB_FUNC, (op << AR8216_MIB_FUNC_S));
++
++	/* Wait for the capturing to complete. */
++	ret = ar8xxx_reg_wait(priv, mib_func, AR8216_MIB_BUSY, 0, 10);
++	if (ret)
++		goto out;
++
++	ret = 0;
++
++out:
++	return ret;
++}
++
++static int
++ar8xxx_mib_capture(struct ar8xxx_priv *priv)
++{
++	return ar8xxx_mib_op(priv, AR8216_MIB_FUNC_CAPTURE);
++}
++
++static int
++ar8xxx_mib_flush(struct ar8xxx_priv *priv)
++{
++	return ar8xxx_mib_op(priv, AR8216_MIB_FUNC_FLUSH);
++}
++
++static void
++ar8xxx_mib_fetch_port_stat(struct ar8xxx_priv *priv, int port, bool flush)
++{
++	unsigned int base;
++	u64 *mib_stats;
++	int i;
++
++	WARN_ON(port >= priv->dev.ports);
++
++	lockdep_assert_held(&priv->mib_lock);
++
++	base = priv->chip->reg_port_stats_start +
++	       priv->chip->reg_port_stats_length * port;
++
++	mib_stats = &priv->mib_stats[port * priv->chip->num_mibs];
++	for (i = 0; i < priv->chip->num_mibs; i++) {
++		const struct ar8xxx_mib_desc *mib;
++		u64 t;
++
++		mib = &priv->chip->mib_decs[i];
++		if (mib->type > priv->mib_type)
++			continue;
++		t = ar8xxx_read(priv, base + mib->offset);
++		if (mib->size == 2) {
++			u64 hi;
++
++			hi = ar8xxx_read(priv, base + mib->offset + 4);
++			t |= hi << 32;
++		}
++
++		if (flush)
++			mib_stats[i] = 0;
++		else
++			mib_stats[i] += t;
++		cond_resched();
++	}
++}
++
++static void
++ar8216_read_port_link(struct ar8xxx_priv *priv, int port,
++		      struct switch_port_link *link)
++{
++	u32 status;
++	u32 speed;
++
++	memset(link, '\0', sizeof(*link));
++
++	status = priv->chip->read_port_status(priv, port);
++
++	link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
++	if (link->aneg) {
++		link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
++	} else {
++		link->link = true;
++
++		if (priv->get_port_link) {
++			int err;
++
++			err = priv->get_port_link(port);
++			if (err >= 0)
++				link->link = !!err;
++		}
++	}
++
++	if (!link->link)
++		return;
++
++	link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
++	link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
++	link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
++
++	if (link->aneg && link->duplex && priv->chip->read_port_eee_status)
++		link->eee = priv->chip->read_port_eee_status(priv, port);
++
++	speed = (status & AR8216_PORT_STATUS_SPEED) >>
++		 AR8216_PORT_STATUS_SPEED_S;
++
++	switch (speed) {
++	case AR8216_PORT_SPEED_10M:
++		link->speed = SWITCH_PORT_SPEED_10;
++		break;
++	case AR8216_PORT_SPEED_100M:
++		link->speed = SWITCH_PORT_SPEED_100;
++		break;
++	case AR8216_PORT_SPEED_1000M:
++		link->speed = SWITCH_PORT_SPEED_1000;
++		break;
++	default:
++		link->speed = SWITCH_PORT_SPEED_UNKNOWN;
++		break;
++	}
++}
++
++#ifdef CONFIG_ETHERNET_PACKET_MANGLE
++
++static struct sk_buff *
++ar8216_mangle_tx(struct net_device *dev, struct sk_buff *skb)
++{
++	struct ar8xxx_priv *priv = dev->phy_ptr;
++	unsigned char *buf;
++
++	if (unlikely(!priv))
++		goto error;
++
++	if (!priv->vlan)
++		goto send;
++
++	if (unlikely(skb_headroom(skb) < 2)) {
++		if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
++			goto error;
++	}
++
++	buf = skb_push(skb, 2);
++	buf[0] = 0x10;
++	buf[1] = 0x80;
++
++send:
++	return skb;
++
++error:
++	dev_kfree_skb_any(skb);
++	return NULL;
++}
++
++static void
++ar8216_mangle_rx(struct net_device *dev, struct sk_buff *skb)
++{
++	struct ar8xxx_priv *priv;
++	unsigned char *buf;
++	int port, vlan;
++
++	priv = dev->phy_ptr;
++	if (!priv)
++		return;
++
++	/* don't strip the header if vlan mode is disabled */
++	if (!priv->vlan)
++		return;
++
++	/* strip header, get vlan id */
++	buf = skb->data;
++	skb_pull(skb, 2);
++
++	/* check for vlan header presence */
++	if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
++		return;
++
++	port = buf[0] & 0x7;
++
++	/* no need to fix up packets coming from a tagged source */
++	if (priv->vlan_tagged & (1 << port))
++		return;
++
++	/* lookup port vid from local table, the switch passes an invalid vlan id */
++	vlan = priv->vlan_id[priv->pvid[port]];
++
++	buf[14 + 2] &= 0xf0;
++	buf[14 + 2] |= vlan >> 8;
++	buf[15 + 2] = vlan & 0xff;
++}
++
++#endif
++
++int
++ar8216_wait_bit(struct ar8xxx_priv *priv, int reg, u32 mask, u32 val)
++{
++	int timeout = 20;
++	u32 t = 0;
++
++	while (1) {
++		t = ar8xxx_read(priv, reg);
++		if ((t & mask) == val)
++			return 0;
++
++		if (timeout-- <= 0)
++			break;
++
++		udelay(10);
++		cond_resched();
++	}
++
++	pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
++	       (unsigned int) reg, t, mask, val);
++	return -ETIMEDOUT;
++}
++
++static void
++ar8216_vtu_op(struct ar8xxx_priv *priv, u32 op, u32 val)
++{
++	if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
++		return;
++	if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
++		val &= AR8216_VTUDATA_MEMBER;
++		val |= AR8216_VTUDATA_VALID;
++		ar8xxx_write(priv, AR8216_REG_VTU_DATA, val);
++	}
++	op |= AR8216_VTU_ACTIVE;
++	ar8xxx_write(priv, AR8216_REG_VTU, op);
++}
++
++static void
++ar8216_vtu_flush(struct ar8xxx_priv *priv)
++{
++	ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
++}
++
++static void
++ar8216_vtu_load_vlan(struct ar8xxx_priv *priv, u32 vid, u32 port_mask)
++{
++	u32 op;
++
++	op = AR8216_VTU_OP_LOAD | (vid << AR8216_VTU_VID_S);
++	ar8216_vtu_op(priv, op, port_mask);
++}
++
++static int
++ar8216_atu_flush(struct ar8xxx_priv *priv)
++{
++	int ret;
++
++	ret = ar8216_wait_bit(priv, AR8216_REG_ATU_FUNC0, AR8216_ATU_ACTIVE, 0);
++	if (!ret)
++		ar8xxx_write(priv, AR8216_REG_ATU_FUNC0, AR8216_ATU_OP_FLUSH |
++							 AR8216_ATU_ACTIVE);
++
++	return ret;
++}
++
++static int
++ar8216_atu_flush_port(struct ar8xxx_priv *priv, int port)
++{
++	u32 t;
++	int ret;
++
++	ret = ar8216_wait_bit(priv, AR8216_REG_ATU_FUNC0, AR8216_ATU_ACTIVE, 0);
++	if (!ret) {
++		t = (port << AR8216_ATU_PORT_NUM_S) | AR8216_ATU_OP_FLUSH_PORT;
++		t |= AR8216_ATU_ACTIVE;
++		ar8xxx_write(priv, AR8216_REG_ATU_FUNC0, t);
++	}
++
++	return ret;
++}
++
++static u32
++ar8216_read_port_status(struct ar8xxx_priv *priv, int port)
++{
++	return ar8xxx_read(priv, AR8216_REG_PORT_STATUS(port));
++}
++
++static void
++__ar8216_setup_port(struct ar8xxx_priv *priv, int port, u32 members,
++		    bool ath_hdr_en)
++{
++	u32 header;
++	u32 egress, ingress;
++	u32 pvid;
++
++	if (priv->vlan) {
++		pvid = priv->vlan_id[priv->pvid[port]];
++		if (priv->vlan_tagged & (1 << port))
++			egress = AR8216_OUT_ADD_VLAN;
++		else
++			egress = AR8216_OUT_STRIP_VLAN;
++		ingress = AR8216_IN_SECURE;
++	} else {
++		pvid = port;
++		egress = AR8216_OUT_KEEP;
++		ingress = AR8216_IN_PORT_ONLY;
++	}
++
++	header = ath_hdr_en ? AR8216_PORT_CTRL_HEADER : 0;
++
++	ar8xxx_rmw(priv, AR8216_REG_PORT_CTRL(port),
++		   AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
++		   AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
++		   AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
++		   AR8216_PORT_CTRL_LEARN | header |
++		   (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
++		   (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
++
++	ar8xxx_rmw(priv, AR8216_REG_PORT_VLAN(port),
++		   AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
++		   AR8216_PORT_VLAN_DEFAULT_ID,
++		   (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
++		   (ingress << AR8216_PORT_VLAN_MODE_S) |
++		   (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
++}
++
++static void
++ar8216_setup_port(struct ar8xxx_priv *priv, int port, u32 members)
++{
++	return __ar8216_setup_port(priv, port, members,
++				   chip_is_ar8216(priv) && priv->vlan &&
++				   port == AR8216_PORT_CPU);
++}
++
++static int
++ar8216_hw_init(struct ar8xxx_priv *priv)
++{
++	if (priv->initialized)
++		return 0;
++
++	ar8xxx_write(priv, AR8216_REG_CTRL, AR8216_CTRL_RESET);
++	ar8xxx_reg_wait(priv, AR8216_REG_CTRL, AR8216_CTRL_RESET, 0, 1000);
++
++	ar8xxx_phy_init(priv);
++
++	priv->initialized = true;
++	return 0;
++}
++
++static void
++ar8216_init_globals(struct ar8xxx_priv *priv)
++{
++	/* standard atheros magic */
++	ar8xxx_write(priv, 0x38, 0xc000050e);
++
++	ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CTRL,
++		   AR8216_GCTRL_MTU, 1518 + 8 + 2);
++}
++
++static void
++__ar8216_init_port(struct ar8xxx_priv *priv, int port,
++		   bool cpu_ge, bool flow_en)
++{
++	/* Enable port learning and tx */
++	ar8xxx_write(priv, AR8216_REG_PORT_CTRL(port),
++		AR8216_PORT_CTRL_LEARN |
++		(4 << AR8216_PORT_CTRL_STATE_S));
++
++	ar8xxx_write(priv, AR8216_REG_PORT_VLAN(port), 0);
++
++	if (port == AR8216_PORT_CPU) {
++		ar8xxx_write(priv, AR8216_REG_PORT_STATUS(port),
++			AR8216_PORT_STATUS_LINK_UP |
++			(cpu_ge ? AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
++			AR8216_PORT_STATUS_TXMAC |
++			AR8216_PORT_STATUS_RXMAC |
++			(flow_en ? AR8216_PORT_STATUS_RXFLOW : 0) |
++			(flow_en ? AR8216_PORT_STATUS_TXFLOW : 0) |
++			AR8216_PORT_STATUS_DUPLEX);
++	} else {
++		ar8xxx_write(priv, AR8216_REG_PORT_STATUS(port),
++			AR8216_PORT_STATUS_LINK_AUTO);
++	}
++}
++
++static void
++ar8216_init_port(struct ar8xxx_priv *priv, int port)
++{
++	__ar8216_init_port(priv, port, ar8xxx_has_gige(priv),
++			   chip_is_ar8316(priv));
++}
++
++static void
++ar8216_wait_atu_ready(struct ar8xxx_priv *priv, u16 r2, u16 r1)
++{
++	int timeout = 20;
++
++	while (ar8xxx_mii_read32(priv, r2, r1) & AR8216_ATU_ACTIVE && --timeout) {
++		udelay(10);
++		cond_resched();
++	}
++
++	if (!timeout)
++		pr_err("ar8216: timeout waiting for atu to become ready\n");
++}
++
++static void ar8216_get_arl_entry(struct ar8xxx_priv *priv,
++				 struct arl_entry *a, u32 *status, enum arl_op op)
++{
++	struct mii_bus *bus = priv->mii_bus;
++	u16 r2, page;
++	u16 r1_func0, r1_func1, r1_func2;
++	u32 t, val0, val1, val2;
++
++	split_addr(AR8216_REG_ATU_FUNC0, &r1_func0, &r2, &page);
++	r2 |= 0x10;
++
++	r1_func1 = (AR8216_REG_ATU_FUNC1 >> 1) & 0x1e;
++	r1_func2 = (AR8216_REG_ATU_FUNC2 >> 1) & 0x1e;
++
++	switch (op) {
++	case AR8XXX_ARL_INITIALIZE:
++		/* all ATU registers are on the same page
++		* therefore set page only once
++		*/
++		bus->write(bus, 0x18, 0, page);
++		wait_for_page_switch();
++
++		ar8216_wait_atu_ready(priv, r2, r1_func0);
++
++		ar8xxx_mii_write32(priv, r2, r1_func0, AR8216_ATU_OP_GET_NEXT);
++		ar8xxx_mii_write32(priv, r2, r1_func1, 0);
++		ar8xxx_mii_write32(priv, r2, r1_func2, 0);
++		break;
++	case AR8XXX_ARL_GET_NEXT:
++		t = ar8xxx_mii_read32(priv, r2, r1_func0);
++		t |= AR8216_ATU_ACTIVE;
++		ar8xxx_mii_write32(priv, r2, r1_func0, t);
++		ar8216_wait_atu_ready(priv, r2, r1_func0);
++
++		val0 = ar8xxx_mii_read32(priv, r2, r1_func0);
++		val1 = ar8xxx_mii_read32(priv, r2, r1_func1);
++		val2 = ar8xxx_mii_read32(priv, r2, r1_func2);
++
++		*status = (val2 & AR8216_ATU_STATUS) >> AR8216_ATU_STATUS_S;
++		if (!*status)
++			break;
++
++		a->portmap = (val2 & AR8216_ATU_PORTS) >> AR8216_ATU_PORTS_S;
++		a->mac[0] = (val0 & AR8216_ATU_ADDR5) >> AR8216_ATU_ADDR5_S;
++		a->mac[1] = (val0 & AR8216_ATU_ADDR4) >> AR8216_ATU_ADDR4_S;
++		a->mac[2] = (val1 & AR8216_ATU_ADDR3) >> AR8216_ATU_ADDR3_S;
++		a->mac[3] = (val1 & AR8216_ATU_ADDR2) >> AR8216_ATU_ADDR2_S;
++		a->mac[4] = (val1 & AR8216_ATU_ADDR1) >> AR8216_ATU_ADDR1_S;
++		a->mac[5] = (val1 & AR8216_ATU_ADDR0) >> AR8216_ATU_ADDR0_S;
++		break;
++	}
++}
++
++static int
++ar8216_phy_read(struct ar8xxx_priv *priv, int addr, int regnum)
++{
++	u32 t, val = 0xffff;
++	int err;
++
++	if (addr >= AR8216_NUM_PORTS)
++		return 0xffff;
++	t = (regnum << AR8216_MDIO_CTRL_REG_ADDR_S) |
++	    (addr << AR8216_MDIO_CTRL_PHY_ADDR_S) |
++	    AR8216_MDIO_CTRL_MASTER_EN |
++	    AR8216_MDIO_CTRL_BUSY |
++	    AR8216_MDIO_CTRL_CMD_READ;
++
++	ar8xxx_write(priv, AR8216_REG_MDIO_CTRL, t);
++	err = ar8xxx_reg_wait(priv, AR8216_REG_MDIO_CTRL,
++			      AR8216_MDIO_CTRL_BUSY, 0, 5);
++	if (!err)
++		val = ar8xxx_read(priv, AR8216_REG_MDIO_CTRL);
++
++	return val & AR8216_MDIO_CTRL_DATA_M;
++}
++
++static int
++ar8216_phy_write(struct ar8xxx_priv *priv, int addr, int regnum, u16 val)
++{
++	u32 t;
++	int ret;
++
++	if (addr >= AR8216_NUM_PORTS)
++		return -EINVAL;
++
++	t = (addr << AR8216_MDIO_CTRL_PHY_ADDR_S) |
++	    (regnum << AR8216_MDIO_CTRL_REG_ADDR_S) |
++	    AR8216_MDIO_CTRL_MASTER_EN |
++	    AR8216_MDIO_CTRL_BUSY |
++	    AR8216_MDIO_CTRL_CMD_WRITE |
++	    val;
++
++	ar8xxx_write(priv, AR8216_REG_MDIO_CTRL, t);
++	ret = ar8xxx_reg_wait(priv, AR8216_REG_MDIO_CTRL,
++			      AR8216_MDIO_CTRL_BUSY, 0, 5);
++
++	return ret;
++}
++
++static int
++ar8229_hw_init(struct ar8xxx_priv *priv)
++{
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 5, 0)
++	phy_interface_t phy_if_mode;
++#else
++	int phy_if_mode;
++#endif
++
++	if (priv->initialized)
++		return 0;
++
++	ar8xxx_write(priv, AR8216_REG_CTRL, AR8216_CTRL_RESET);
++	ar8xxx_reg_wait(priv, AR8216_REG_CTRL, AR8216_CTRL_RESET, 0, 1000);
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 5, 0)
++	of_get_phy_mode(priv->pdev->of_node, &phy_if_mode);
++#else
++	phy_if_mode = of_get_phy_mode(priv->pdev->of_node);
++#endif
++
++	if (phy_if_mode == PHY_INTERFACE_MODE_GMII) {
++		ar8xxx_write(priv, AR8229_REG_OPER_MODE0,
++				 AR8229_OPER_MODE0_MAC_GMII_EN);
++	} else if (phy_if_mode == PHY_INTERFACE_MODE_MII) {
++		ar8xxx_write(priv, AR8229_REG_OPER_MODE0,
++				 AR8229_OPER_MODE0_PHY_MII_EN);
++	} else {
++		pr_err("ar8229: unsupported mii mode\n");
++		return -EINVAL;
++	}
++
++	if (priv->port4_phy) {
++		ar8xxx_write(priv, AR8229_REG_OPER_MODE1,
++			     AR8229_REG_OPER_MODE1_PHY4_MII_EN);
++		/* disable port5 to prevent mii conflict */
++		ar8xxx_write(priv, AR8216_REG_PORT_STATUS(5), 0);
++	}
++
++	ar8xxx_phy_init(priv);
++
++	priv->initialized = true;
++	return 0;
++}
++
++static void
++ar8229_init_globals(struct ar8xxx_priv *priv)
++{
++
++	/* Enable CPU port, and disable mirror port */
++	ar8xxx_write(priv, AR8216_REG_GLOBAL_CPUPORT,
++		     AR8216_GLOBAL_CPUPORT_EN |
++		     (15 << AR8216_GLOBAL_CPUPORT_MIRROR_PORT_S));
++
++	/* Setup TAG priority mapping */
++	ar8xxx_write(priv, AR8216_REG_TAG_PRIORITY, 0xfa50);
++
++	/* Enable aging, MAC replacing */
++	ar8xxx_write(priv, AR8216_REG_ATU_CTRL,
++		     0x2b /* 5 min age time */ |
++		     AR8216_ATU_CTRL_AGE_EN |
++		     AR8216_ATU_CTRL_LEARN_CHANGE);
++
++	/* Enable ARP frame acknowledge */
++	ar8xxx_reg_set(priv, AR8229_REG_QM_CTRL,
++		       AR8229_QM_CTRL_ARP_EN);
++
++	/*
++	 * Enable Broadcast/unknown multicast and unicast frames
++	 * transmitted to the CPU port.
++	 */
++	ar8xxx_reg_set(priv, AR8216_REG_FLOOD_MASK,
++		       AR8229_FLOOD_MASK_BC_DP(0) |
++		       AR8229_FLOOD_MASK_MC_DP(0) |
++		       AR8229_FLOOD_MASK_UC_DP(0));
++
++	/* setup MTU */
++	ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CTRL,
++		   AR8236_GCTRL_MTU, AR8236_GCTRL_MTU);
++
++	/* Enable MIB counters */
++	ar8xxx_reg_set(priv, AR8216_REG_MIB_FUNC,
++		       AR8236_MIB_EN);
++
++	/* setup Service TAG */
++	ar8xxx_rmw(priv, AR8216_REG_SERVICE_TAG, AR8216_SERVICE_TAG_M, 0);
++}
++
++static void
++ar8229_init_port(struct ar8xxx_priv *priv, int port)
++{
++	__ar8216_init_port(priv, port, true, true);
++}
++
++
++static int
++ar7240sw_hw_init(struct ar8xxx_priv *priv)
++{
++	if (priv->initialized)
++		return 0;
++
++	ar8xxx_write(priv, AR8216_REG_CTRL, AR8216_CTRL_RESET);
++	ar8xxx_reg_wait(priv, AR8216_REG_CTRL, AR8216_CTRL_RESET, 0, 1000);
++
++	priv->port4_phy = 1;
++	/* disable port5 to prevent mii conflict */
++	ar8xxx_write(priv, AR8216_REG_PORT_STATUS(5), 0);
++
++	ar8xxx_phy_init(priv);
++
++	priv->initialized = true;
++	return 0;
++}
++
++static void
++ar7240sw_init_globals(struct ar8xxx_priv *priv)
++{
++
++	/* Enable CPU port, and disable mirror port */
++	ar8xxx_write(priv, AR8216_REG_GLOBAL_CPUPORT,
++		     AR8216_GLOBAL_CPUPORT_EN |
++		     (15 << AR8216_GLOBAL_CPUPORT_MIRROR_PORT_S));
++
++	/* Setup TAG priority mapping */
++	ar8xxx_write(priv, AR8216_REG_TAG_PRIORITY, 0xfa50);
++
++	/* Enable ARP frame acknowledge, aging, MAC replacing */
++	ar8xxx_write(priv, AR8216_REG_ATU_CTRL,
++		AR8216_ATU_CTRL_RESERVED |
++		0x2b /* 5 min age time */ |
++		AR8216_ATU_CTRL_AGE_EN |
++		AR8216_ATU_CTRL_ARP_EN |
++		AR8216_ATU_CTRL_LEARN_CHANGE);
++
++	/* Enable Broadcast frames transmitted to the CPU */
++	ar8xxx_reg_set(priv, AR8216_REG_FLOOD_MASK,
++		       AR8216_FM_CPU_BROADCAST_EN);
++
++	/* setup MTU */
++	ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CTRL,
++		   AR8216_GCTRL_MTU,
++		   AR8216_GCTRL_MTU);
++
++	/* setup Service TAG */
++	ar8xxx_rmw(priv, AR8216_REG_SERVICE_TAG, AR8216_SERVICE_TAG_M, 0);
++}
++
++static void
++ar7240sw_setup_port(struct ar8xxx_priv *priv, int port, u32 members)
++{
++	return __ar8216_setup_port(priv, port, members, false);
++}
++
++static void
++ar8236_setup_port(struct ar8xxx_priv *priv, int port, u32 members)
++{
++	u32 egress, ingress;
++	u32 pvid;
++
++	if (priv->vlan) {
++		pvid = priv->vlan_id[priv->pvid[port]];
++		if (priv->vlan_tagged & (1 << port))
++			egress = AR8216_OUT_ADD_VLAN;
++		else
++			egress = AR8216_OUT_STRIP_VLAN;
++		ingress = AR8216_IN_SECURE;
++	} else {
++		pvid = port;
++		egress = AR8216_OUT_KEEP;
++		ingress = AR8216_IN_PORT_ONLY;
++	}
++
++	ar8xxx_rmw(priv, AR8216_REG_PORT_CTRL(port),
++		   AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
++		   AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
++		   AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
++		   AR8216_PORT_CTRL_LEARN |
++		   (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
++		   (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
++
++	ar8xxx_rmw(priv, AR8236_REG_PORT_VLAN(port),
++		   AR8236_PORT_VLAN_DEFAULT_ID,
++		   (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
++
++	ar8xxx_rmw(priv, AR8236_REG_PORT_VLAN2(port),
++		   AR8236_PORT_VLAN2_VLAN_MODE |
++		   AR8236_PORT_VLAN2_MEMBER,
++		   (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
++		   (members << AR8236_PORT_VLAN2_MEMBER_S));
++}
++
++static void
++ar8236_init_globals(struct ar8xxx_priv *priv)
++{
++	/* enable jumbo frames */
++	ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CTRL,
++		   AR8316_GCTRL_MTU, 9018 + 8 + 2);
++
++	/* enable cpu port to receive arp frames */
++	ar8xxx_reg_set(priv, AR8216_REG_ATU_CTRL,
++		   AR8236_ATU_CTRL_RES);
++
++	/*
++	 * Enable Broadcast/unknown multicast and unicast frames
++	 * transmitted to the CPU port.
++	 */
++	ar8xxx_reg_set(priv, AR8216_REG_FLOOD_MASK,
++		       AR8229_FLOOD_MASK_BC_DP(0) |
++		       AR8229_FLOOD_MASK_MC_DP(0) |
++		       AR8229_FLOOD_MASK_UC_DP(0));
++
++	/* Enable MIB counters */
++	ar8xxx_rmw(priv, AR8216_REG_MIB_FUNC, AR8216_MIB_FUNC | AR8236_MIB_EN,
++		   (AR8216_MIB_FUNC_NO_OP << AR8216_MIB_FUNC_S) |
++		   AR8236_MIB_EN);
++}
++
++static int
++ar8316_hw_init(struct ar8xxx_priv *priv)
++{
++	u32 val, newval;
++
++	val = ar8xxx_read(priv, AR8316_REG_POSTRIP);
++
++	if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
++		if (priv->port4_phy) {
++			/* value taken from Ubiquiti RouterStation Pro */
++			newval = 0x81461bea;
++			pr_info("ar8316: Using port 4 as PHY\n");
++		} else {
++			newval = 0x01261be2;
++			pr_info("ar8316: Using port 4 as switch port\n");
++		}
++	} else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
++		/* value taken from AVM Fritz!Box 7390 sources */
++		newval = 0x010e5b71;
++	} else {
++		/* no known value for phy interface */
++		pr_err("ar8316: unsupported mii mode: %d.\n",
++		       priv->phy->interface);
++		return -EINVAL;
++	}
++
++	if (val == newval)
++		goto out;
++
++	ar8xxx_write(priv, AR8316_REG_POSTRIP, newval);
++
++	if (priv->port4_phy &&
++	    priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
++		/* work around for phy4 rgmii mode */
++		ar8xxx_phy_dbg_write(priv, 4, 0x12, 0x480c);
++		/* rx delay */
++		ar8xxx_phy_dbg_write(priv, 4, 0x0, 0x824e);
++		/* tx delay */
++		ar8xxx_phy_dbg_write(priv, 4, 0x5, 0x3d47);
++		msleep(1000);
++	}
++
++	ar8xxx_phy_init(priv);
++
++out:
++	priv->initialized = true;
++	return 0;
++}
++
++static void
++ar8316_init_globals(struct ar8xxx_priv *priv)
++{
++	/* standard atheros magic */
++	ar8xxx_write(priv, 0x38, 0xc000050e);
++
++	/* enable cpu port to receive multicast and broadcast frames */
++	ar8xxx_write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
++
++	/* enable jumbo frames */
++	ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CTRL,
++		   AR8316_GCTRL_MTU, 9018 + 8 + 2);
++
++	/* Enable MIB counters */
++	ar8xxx_rmw(priv, AR8216_REG_MIB_FUNC, AR8216_MIB_FUNC | AR8236_MIB_EN,
++		   (AR8216_MIB_FUNC_NO_OP << AR8216_MIB_FUNC_S) |
++		   AR8236_MIB_EN);
++}
++
++int
++ar8xxx_sw_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
++		   struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	priv->vlan = !!val->value.i;
++	return 0;
++}
++
++int
++ar8xxx_sw_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
++		   struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	val->value.i = priv->vlan;
++	return 0;
++}
++
++
++int
++ar8xxx_sw_set_pvid(struct switch_dev *dev, int port, int vlan)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++
++	/* make sure no invalid PVIDs get set */
++
++	if (vlan < 0 || vlan >= dev->vlans ||
++	    port < 0 || port >= AR8X16_MAX_PORTS)
++		return -EINVAL;
++
++	priv->pvid[port] = vlan;
++	return 0;
++}
++
++int
++ar8xxx_sw_get_pvid(struct switch_dev *dev, int port, int *vlan)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++
++	if (port < 0 || port >= AR8X16_MAX_PORTS)
++		return -EINVAL;
++
++	*vlan = priv->pvid[port];
++	return 0;
++}
++
++static int
++ar8xxx_sw_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
++		  struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++
++	if (val->port_vlan >= dev->vlans)
++		return -EINVAL;
++
++	priv->vlan_id[val->port_vlan] = val->value.i;
++	return 0;
++}
++
++static int
++ar8xxx_sw_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
++		  struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	val->value.i = priv->vlan_id[val->port_vlan];
++	return 0;
++}
++
++int
++ar8xxx_sw_get_port_link(struct switch_dev *dev, int port,
++			struct switch_port_link *link)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++
++	ar8216_read_port_link(priv, port, link);
++	return 0;
++}
++
++static int
++ar8xxx_sw_get_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	u8 ports;
++	int i;
++
++	if (val->port_vlan >= dev->vlans)
++		return -EINVAL;
++
++	ports = priv->vlan_table[val->port_vlan];
++	val->len = 0;
++	for (i = 0; i < dev->ports; i++) {
++		struct switch_port *p;
++
++		if (!(ports & (1 << i)))
++			continue;
++
++		p = &val->value.ports[val->len++];
++		p->id = i;
++		if (priv->vlan_tagged & (1 << i))
++			p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
++		else
++			p->flags = 0;
++	}
++	return 0;
++}
++
++static int
++ar8xxx_sw_set_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	u8 *vt = &priv->vlan_table[val->port_vlan];
++	int i, j;
++
++	*vt = 0;
++	for (i = 0; i < val->len; i++) {
++		struct switch_port *p = &val->value.ports[i];
++
++		if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
++			priv->vlan_tagged |= (1 << p->id);
++		} else {
++			priv->vlan_tagged &= ~(1 << p->id);
++			priv->pvid[p->id] = val->port_vlan;
++
++			/* make sure that an untagged port does not
++			 * appear in other vlans */
++			for (j = 0; j < dev->vlans; j++) {
++				if (j == val->port_vlan)
++					continue;
++				priv->vlan_table[j] &= ~(1 << p->id);
++			}
++		}
++
++		*vt |= 1 << p->id;
++	}
++	return 0;
++}
++
++static void
++ar8216_set_mirror_regs(struct ar8xxx_priv *priv)
++{
++	int port;
++
++	/* reset all mirror registers */
++	ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CPUPORT,
++		   AR8216_GLOBAL_CPUPORT_MIRROR_PORT,
++		   (0xF << AR8216_GLOBAL_CPUPORT_MIRROR_PORT_S));
++	for (port = 0; port < AR8216_NUM_PORTS; port++) {
++		ar8xxx_reg_clear(priv, AR8216_REG_PORT_CTRL(port),
++			   AR8216_PORT_CTRL_MIRROR_RX);
++
++		ar8xxx_reg_clear(priv, AR8216_REG_PORT_CTRL(port),
++			   AR8216_PORT_CTRL_MIRROR_TX);
++	}
++
++	/* now enable mirroring if necessary */
++	if (priv->source_port >= AR8216_NUM_PORTS ||
++	    priv->monitor_port >= AR8216_NUM_PORTS ||
++	    priv->source_port == priv->monitor_port) {
++		return;
++	}
++
++	ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CPUPORT,
++		   AR8216_GLOBAL_CPUPORT_MIRROR_PORT,
++		   (priv->monitor_port << AR8216_GLOBAL_CPUPORT_MIRROR_PORT_S));
++
++	if (priv->mirror_rx)
++		ar8xxx_reg_set(priv, AR8216_REG_PORT_CTRL(priv->source_port),
++			   AR8216_PORT_CTRL_MIRROR_RX);
++
++	if (priv->mirror_tx)
++		ar8xxx_reg_set(priv, AR8216_REG_PORT_CTRL(priv->source_port),
++			   AR8216_PORT_CTRL_MIRROR_TX);
++}
++
++static inline u32
++ar8xxx_age_time_val(int age_time)
++{
++	return (age_time + AR8XXX_REG_ARL_CTRL_AGE_TIME_SECS / 2) /
++	       AR8XXX_REG_ARL_CTRL_AGE_TIME_SECS;
++}
++
++static inline void
++ar8xxx_set_age_time(struct ar8xxx_priv *priv, int reg)
++{
++	u32 age_time = ar8xxx_age_time_val(priv->arl_age_time);
++	ar8xxx_rmw(priv, reg, AR8216_ATU_CTRL_AGE_TIME, age_time << AR8216_ATU_CTRL_AGE_TIME_S);
++}
++
++int
++ar8xxx_sw_hw_apply(struct switch_dev *dev)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	const struct ar8xxx_chip *chip = priv->chip;
++	u8 portmask[AR8X16_MAX_PORTS];
++	int i, j;
++
++	mutex_lock(&priv->reg_mutex);
++	/* flush all vlan translation unit entries */
++	priv->chip->vtu_flush(priv);
++
++	memset(portmask, 0, sizeof(portmask));
++	if (!priv->init) {
++		/* calculate the port destination masks and load vlans
++		 * into the vlan translation unit */
++		for (j = 0; j < dev->vlans; j++) {
++			u8 vp = priv->vlan_table[j];
++
++			if (!vp)
++				continue;
++
++			for (i = 0; i < dev->ports; i++) {
++				u8 mask = (1 << i);
++				if (vp & mask)
++					portmask[i] |= vp & ~mask;
++			}
++
++			chip->vtu_load_vlan(priv, priv->vlan_id[j],
++					    priv->vlan_table[j]);
++		}
++	} else {
++		/* vlan disabled:
++		 * isolate all ports, but connect them to the cpu port */
++		for (i = 0; i < dev->ports; i++) {
++			if (i == AR8216_PORT_CPU)
++				continue;
++
++			portmask[i] = 1 << AR8216_PORT_CPU;
++			portmask[AR8216_PORT_CPU] |= (1 << i);
++		}
++	}
++
++	/* update the port destination mask registers and tag settings */
++	for (i = 0; i < dev->ports; i++) {
++		chip->setup_port(priv, i, portmask[i]);
++	}
++
++	chip->set_mirror_regs(priv);
++
++	/* set age time */
++	if (chip->reg_arl_ctrl)
++		ar8xxx_set_age_time(priv, chip->reg_arl_ctrl);
++
++	mutex_unlock(&priv->reg_mutex);
++	return 0;
++}
++
++int
++ar8xxx_sw_reset_switch(struct switch_dev *dev)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	const struct ar8xxx_chip *chip = priv->chip;
++	int i;
++
++	mutex_lock(&priv->reg_mutex);
++	memset(&priv->vlan, 0, sizeof(struct ar8xxx_priv) -
++		offsetof(struct ar8xxx_priv, vlan));
++
++	for (i = 0; i < dev->vlans; i++)
++		priv->vlan_id[i] = i;
++
++	/* Configure all ports */
++	for (i = 0; i < dev->ports; i++)
++		chip->init_port(priv, i);
++
++	priv->mirror_rx = false;
++	priv->mirror_tx = false;
++	priv->source_port = 0;
++	priv->monitor_port = 0;
++	priv->arl_age_time = AR8XXX_DEFAULT_ARL_AGE_TIME;
++
++	chip->init_globals(priv);
++	chip->atu_flush(priv);
++
++	mutex_unlock(&priv->reg_mutex);
++
++	return chip->sw_hw_apply(dev);
++}
++
++int
++ar8xxx_sw_set_reset_mibs(struct switch_dev *dev,
++			 const struct switch_attr *attr,
++			 struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	unsigned int len;
++	int ret;
++
++	if (!ar8xxx_has_mib_counters(priv))
++		return -EOPNOTSUPP;
++
++	mutex_lock(&priv->mib_lock);
++
++	len = priv->dev.ports * priv->chip->num_mibs *
++	      sizeof(*priv->mib_stats);
++	memset(priv->mib_stats, '\0', len);
++	ret = ar8xxx_mib_flush(priv);
++	if (ret)
++		goto unlock;
++
++	ret = 0;
++
++unlock:
++	mutex_unlock(&priv->mib_lock);
++	return ret;
++}
++
++int
++ar8xxx_sw_set_mib_poll_interval(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++
++	if (!ar8xxx_has_mib_counters(priv))
++		return -EOPNOTSUPP;
++
++	ar8xxx_mib_stop(priv);
++	priv->mib_poll_interval = val->value.i;
++	ar8xxx_mib_start(priv);
++
++	return 0;
++}
++
++int
++ar8xxx_sw_get_mib_poll_interval(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++
++	if (!ar8xxx_has_mib_counters(priv))
++		return -EOPNOTSUPP;
++	val->value.i = priv->mib_poll_interval;
++	return 0;
++}
++
++int
++ar8xxx_sw_set_mib_type(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++
++	if (!ar8xxx_has_mib_counters(priv))
++		return -EOPNOTSUPP;
++	priv->mib_type = val->value.i;
++	return 0;
++}
++
++int
++ar8xxx_sw_get_mib_type(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++
++	if (!ar8xxx_has_mib_counters(priv))
++		return -EOPNOTSUPP;
++	val->value.i = priv->mib_type;
++	return 0;
++}
++
++int
++ar8xxx_sw_set_mirror_rx_enable(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++
++	mutex_lock(&priv->reg_mutex);
++	priv->mirror_rx = !!val->value.i;
++	priv->chip->set_mirror_regs(priv);
++	mutex_unlock(&priv->reg_mutex);
++
++	return 0;
++}
++
++int
++ar8xxx_sw_get_mirror_rx_enable(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	val->value.i = priv->mirror_rx;
++	return 0;
++}
++
++int
++ar8xxx_sw_set_mirror_tx_enable(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++
++	mutex_lock(&priv->reg_mutex);
++	priv->mirror_tx = !!val->value.i;
++	priv->chip->set_mirror_regs(priv);
++	mutex_unlock(&priv->reg_mutex);
++
++	return 0;
++}
++
++int
++ar8xxx_sw_get_mirror_tx_enable(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	val->value.i = priv->mirror_tx;
++	return 0;
++}
++
++int
++ar8xxx_sw_set_mirror_monitor_port(struct switch_dev *dev,
++				  const struct switch_attr *attr,
++				  struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++
++	mutex_lock(&priv->reg_mutex);
++	priv->monitor_port = val->value.i;
++	priv->chip->set_mirror_regs(priv);
++	mutex_unlock(&priv->reg_mutex);
++
++	return 0;
++}
++
++int
++ar8xxx_sw_get_mirror_monitor_port(struct switch_dev *dev,
++				  const struct switch_attr *attr,
++				  struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	val->value.i = priv->monitor_port;
++	return 0;
++}
++
++int
++ar8xxx_sw_set_mirror_source_port(struct switch_dev *dev,
++				 const struct switch_attr *attr,
++				 struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++
++	mutex_lock(&priv->reg_mutex);
++	priv->source_port = val->value.i;
++	priv->chip->set_mirror_regs(priv);
++	mutex_unlock(&priv->reg_mutex);
++
++	return 0;
++}
++
++int
++ar8xxx_sw_get_mirror_source_port(struct switch_dev *dev,
++				 const struct switch_attr *attr,
++				 struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	val->value.i = priv->source_port;
++	return 0;
++}
++
++int
++ar8xxx_sw_set_port_reset_mib(struct switch_dev *dev,
++			     const struct switch_attr *attr,
++			     struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	int port;
++	int ret;
++
++	if (!ar8xxx_has_mib_counters(priv))
++		return -EOPNOTSUPP;
++
++	port = val->port_vlan;
++	if (port >= dev->ports)
++		return -EINVAL;
++
++	mutex_lock(&priv->mib_lock);
++	ret = ar8xxx_mib_capture(priv);
++	if (ret)
++		goto unlock;
++
++	ar8xxx_mib_fetch_port_stat(priv, port, true);
++
++	ret = 0;
++
++unlock:
++	mutex_unlock(&priv->mib_lock);
++	return ret;
++}
++
++static void
++ar8xxx_byte_to_str(char *buf, int len, u64 byte)
++{
++	unsigned long b;
++	const char *unit;
++
++	if (byte >= 0x40000000) { /* 1 GiB */
++		b = byte * 10 / 0x40000000;
++		unit = "GiB";
++	} else if (byte >= 0x100000) { /* 1 MiB */
++		b = byte * 10 / 0x100000;
++		unit = "MiB";
++	} else if (byte >= 0x400) { /* 1 KiB */
++		b = byte * 10 / 0x400;
++		unit = "KiB";
++	} else {
++		b = byte;
++		unit = "Byte";
++	}
++	if (strcmp(unit, "Byte"))
++		snprintf(buf, len, "%lu.%lu %s", b / 10, b % 10, unit);
++	else
++		snprintf(buf, len, "%lu %s", b, unit);
++}
++
++int
++ar8xxx_sw_get_port_mib(struct switch_dev *dev,
++		       const struct switch_attr *attr,
++		       struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	const struct ar8xxx_chip *chip = priv->chip;
++	u64 *mib_stats, mib_data;
++	unsigned int port;
++	int ret;
++	char *buf = priv->buf;
++	char buf1[64];
++	const char *mib_name;
++	int i, len = 0;
++	bool mib_stats_empty = true;
++
++	if (!ar8xxx_has_mib_counters(priv) || !priv->mib_poll_interval)
++		return -EOPNOTSUPP;
++
++	port = val->port_vlan;
++	if (port >= dev->ports)
++		return -EINVAL;
++
++	mutex_lock(&priv->mib_lock);
++	ret = ar8xxx_mib_capture(priv);
++	if (ret)
++		goto unlock;
++
++	ar8xxx_mib_fetch_port_stat(priv, port, false);
++
++	len += snprintf(buf + len, sizeof(priv->buf) - len,
++			"MIB counters\n");
++
++	mib_stats = &priv->mib_stats[port * chip->num_mibs];
++	for (i = 0; i < chip->num_mibs; i++) {
++		if (chip->mib_decs[i].type > priv->mib_type)
++			continue;
++		mib_name = chip->mib_decs[i].name;
++		mib_data = mib_stats[i];
++		len += snprintf(buf + len, sizeof(priv->buf) - len,
++				"%-12s: %llu\n", mib_name, mib_data);
++		if ((!strcmp(mib_name, "TxByte") ||
++		    !strcmp(mib_name, "RxGoodByte")) &&
++		    mib_data >= 1024) {
++			ar8xxx_byte_to_str(buf1, sizeof(buf1), mib_data);
++			--len; /* discard newline at the end of buf */
++			len += snprintf(buf + len, sizeof(priv->buf) - len,
++					" (%s)\n", buf1);
++		}
++		if (mib_stats_empty && mib_data)
++			mib_stats_empty = false;
++	}
++
++	if (mib_stats_empty)
++		len = snprintf(buf, sizeof(priv->buf), "No MIB data");
++
++	val->value.s = buf;
++	val->len = len;
++
++	ret = 0;
++
++unlock:
++	mutex_unlock(&priv->mib_lock);
++	return ret;
++}
++
++int
++ar8xxx_sw_set_arl_age_time(struct switch_dev *dev, const struct switch_attr *attr,
++			   struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	int age_time = val->value.i;
++	u32 age_time_val;
++
++	if (age_time < 0)
++		return -EINVAL;
++
++	age_time_val = ar8xxx_age_time_val(age_time);
++	if (age_time_val == 0 || age_time_val > 0xffff)
++		return -EINVAL;
++
++	priv->arl_age_time = age_time;
++	return 0;
++}
++
++int
++ar8xxx_sw_get_arl_age_time(struct switch_dev *dev, const struct switch_attr *attr,
++                   struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	val->value.i = priv->arl_age_time;
++	return 0;
++}
++
++int
++ar8xxx_sw_get_arl_table(struct switch_dev *dev,
++			const struct switch_attr *attr,
++			struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	struct mii_bus *bus = priv->mii_bus;
++	const struct ar8xxx_chip *chip = priv->chip;
++	char *buf = priv->arl_buf;
++	int i, j, k, len = 0;
++	struct arl_entry *a, *a1;
++	u32 status;
++
++	if (!chip->get_arl_entry)
++		return -EOPNOTSUPP;
++
++	mutex_lock(&priv->reg_mutex);
++	mutex_lock(&bus->mdio_lock);
++
++	chip->get_arl_entry(priv, NULL, NULL, AR8XXX_ARL_INITIALIZE);
++
++	for(i = 0; i < AR8XXX_NUM_ARL_RECORDS; ++i) {
++		a = &priv->arl_table[i];
++		duplicate:
++		chip->get_arl_entry(priv, a, &status, AR8XXX_ARL_GET_NEXT);
++
++		if (!status)
++			break;
++
++		/* avoid duplicates
++		 * ARL table can include multiple valid entries
++		 * per MAC, just with differing status codes
++		 */
++		for (j = 0; j < i; ++j) {
++			a1 = &priv->arl_table[j];
++			if (!memcmp(a->mac, a1->mac, sizeof(a->mac))) {
++				/* ignore ports already seen in former entry */
++				a->portmap &= ~a1->portmap;
++				if (!a->portmap)
++					goto duplicate;
++			}
++		}
++	}
++
++	mutex_unlock(&bus->mdio_lock);
++
++	len += snprintf(buf + len, sizeof(priv->arl_buf) - len,
++                        "address resolution table\n");
++
++	if (i == AR8XXX_NUM_ARL_RECORDS)
++		len += snprintf(buf + len, sizeof(priv->arl_buf) - len,
++				"Too many entries found, displaying the first %d only!\n",
++				AR8XXX_NUM_ARL_RECORDS);
++
++	for (j = 0; j < priv->dev.ports; ++j) {
++		for (k = 0; k < i; ++k) {
++			a = &priv->arl_table[k];
++			if (!(a->portmap & BIT(j)))
++				continue;
++			len += snprintf(buf + len, sizeof(priv->arl_buf) - len,
++					"Port %d: MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
++					j,
++					a->mac[5], a->mac[4], a->mac[3],
++					a->mac[2], a->mac[1], a->mac[0]);
++		}
++	}
++
++	val->value.s = buf;
++	val->len = len;
++
++	mutex_unlock(&priv->reg_mutex);
++
++	return 0;
++}
++
++int
++ar8xxx_sw_set_flush_arl_table(struct switch_dev *dev,
++			      const struct switch_attr *attr,
++			      struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	int ret;
++
++	mutex_lock(&priv->reg_mutex);
++	ret = priv->chip->atu_flush(priv);
++	mutex_unlock(&priv->reg_mutex);
++
++	return ret;
++}
++
++int
++ar8xxx_sw_set_flush_port_arl_table(struct switch_dev *dev,
++				   const struct switch_attr *attr,
++				   struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	int port, ret;
++
++	port = val->port_vlan;
++	if (port >= dev->ports)
++		return -EINVAL;
++
++	mutex_lock(&priv->reg_mutex);
++	ret = priv->chip->atu_flush_port(priv, port);
++	mutex_unlock(&priv->reg_mutex);
++
++	return ret;
++}
++
++int
++ar8xxx_sw_get_port_stats(struct switch_dev *dev, int port,
++			struct switch_port_stats *stats)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	u64 *mib_stats;
++
++	if (!ar8xxx_has_mib_counters(priv) || !priv->mib_poll_interval)
++		return -EOPNOTSUPP;
++
++	if (!(priv->chip->mib_rxb_id || priv->chip->mib_txb_id))
++		return -EOPNOTSUPP;
++
++	if (port >= dev->ports)
++		return -EINVAL;
++
++	mutex_lock(&priv->mib_lock);
++
++	mib_stats = &priv->mib_stats[port * priv->chip->num_mibs];
++
++	stats->tx_bytes = mib_stats[priv->chip->mib_txb_id];
++	stats->rx_bytes = mib_stats[priv->chip->mib_rxb_id];
++
++	mutex_unlock(&priv->mib_lock);
++	return 0;
++}
++
++static int
++ar8xxx_phy_read(struct mii_bus *bus, int phy_addr, int reg_addr)
++{
++	struct ar8xxx_priv *priv = bus->priv;
++	return priv->chip->phy_read(priv, phy_addr, reg_addr);
++}
++
++static int
++ar8xxx_phy_write(struct mii_bus *bus, int phy_addr, int reg_addr,
++		 u16 reg_val)
++{
++	struct ar8xxx_priv *priv = bus->priv;
++	return priv->chip->phy_write(priv, phy_addr, reg_addr, reg_val);
++}
++
++static const struct switch_attr ar8xxx_sw_attr_globals[] = {
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_vlan",
++		.description = "Enable VLAN mode",
++		.set = ar8xxx_sw_set_vlan,
++		.get = ar8xxx_sw_get_vlan,
++		.max = 1
++	},
++	{
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "reset_mibs",
++		.description = "Reset all MIB counters",
++		.set = ar8xxx_sw_set_reset_mibs,
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "ar8xxx_mib_poll_interval",
++		.description = "MIB polling interval in msecs (0 to disable)",
++		.set = ar8xxx_sw_set_mib_poll_interval,
++		.get = ar8xxx_sw_get_mib_poll_interval
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "ar8xxx_mib_type",
++		.description = "MIB type (0=basic 1=extended)",
++		.set = ar8xxx_sw_set_mib_type,
++		.get = ar8xxx_sw_get_mib_type
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_mirror_rx",
++		.description = "Enable mirroring of RX packets",
++		.set = ar8xxx_sw_set_mirror_rx_enable,
++		.get = ar8xxx_sw_get_mirror_rx_enable,
++		.max = 1
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_mirror_tx",
++		.description = "Enable mirroring of TX packets",
++		.set = ar8xxx_sw_set_mirror_tx_enable,
++		.get = ar8xxx_sw_get_mirror_tx_enable,
++		.max = 1
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "mirror_monitor_port",
++		.description = "Mirror monitor port",
++		.set = ar8xxx_sw_set_mirror_monitor_port,
++		.get = ar8xxx_sw_get_mirror_monitor_port,
++		.max = AR8216_NUM_PORTS - 1
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "mirror_source_port",
++		.description = "Mirror source port",
++		.set = ar8xxx_sw_set_mirror_source_port,
++		.get = ar8xxx_sw_get_mirror_source_port,
++		.max = AR8216_NUM_PORTS - 1
++ 	},
++	{
++		.type = SWITCH_TYPE_STRING,
++		.name = "arl_table",
++		.description = "Get ARL table",
++		.set = NULL,
++		.get = ar8xxx_sw_get_arl_table,
++	},
++	{
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "flush_arl_table",
++		.description = "Flush ARL table",
++		.set = ar8xxx_sw_set_flush_arl_table,
++	},
++};
++
++const struct switch_attr ar8xxx_sw_attr_port[] = {
++	{
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "reset_mib",
++		.description = "Reset single port MIB counters",
++		.set = ar8xxx_sw_set_port_reset_mib,
++	},
++	{
++		.type = SWITCH_TYPE_STRING,
++		.name = "mib",
++		.description = "Get port's MIB counters",
++		.set = NULL,
++		.get = ar8xxx_sw_get_port_mib,
++	},
++	{
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "flush_arl_table",
++		.description = "Flush port's ARL table entries",
++		.set = ar8xxx_sw_set_flush_port_arl_table,
++	},
++};
++
++const struct switch_attr ar8xxx_sw_attr_vlan[1] = {
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "vid",
++		.description = "VLAN ID (0-4094)",
++		.set = ar8xxx_sw_set_vid,
++		.get = ar8xxx_sw_get_vid,
++		.max = 4094,
++	},
++};
++
++static const struct switch_dev_ops ar8xxx_sw_ops = {
++	.attr_global = {
++		.attr = ar8xxx_sw_attr_globals,
++		.n_attr = ARRAY_SIZE(ar8xxx_sw_attr_globals),
++	},
++	.attr_port = {
++		.attr = ar8xxx_sw_attr_port,
++		.n_attr = ARRAY_SIZE(ar8xxx_sw_attr_port),
++	},
++	.attr_vlan = {
++		.attr = ar8xxx_sw_attr_vlan,
++		.n_attr = ARRAY_SIZE(ar8xxx_sw_attr_vlan),
++	},
++	.get_port_pvid = ar8xxx_sw_get_pvid,
++	.set_port_pvid = ar8xxx_sw_set_pvid,
++	.get_vlan_ports = ar8xxx_sw_get_ports,
++	.set_vlan_ports = ar8xxx_sw_set_ports,
++	.apply_config = ar8xxx_sw_hw_apply,
++	.reset_switch = ar8xxx_sw_reset_switch,
++	.get_port_link = ar8xxx_sw_get_port_link,
++	.get_port_stats = ar8xxx_sw_get_port_stats,
++};
++
++static const struct ar8xxx_chip ar7240sw_chip = {
++	.caps = AR8XXX_CAP_MIB_COUNTERS,
++
++	.reg_port_stats_start = 0x20000,
++	.reg_port_stats_length = 0x100,
++	.reg_arl_ctrl = AR8216_REG_ATU_CTRL,
++
++	.name = "Atheros AR724X/AR933X built-in",
++	.ports = AR7240SW_NUM_PORTS,
++	.vlans = AR8216_NUM_VLANS,
++	.swops = &ar8xxx_sw_ops,
++
++	.hw_init = ar7240sw_hw_init,
++	.init_globals = ar7240sw_init_globals,
++	.init_port = ar8229_init_port,
++	.phy_read = ar8216_phy_read,
++	.phy_write = ar8216_phy_write,
++	.setup_port = ar7240sw_setup_port,
++	.read_port_status = ar8216_read_port_status,
++	.atu_flush = ar8216_atu_flush,
++	.atu_flush_port = ar8216_atu_flush_port,
++	.vtu_flush = ar8216_vtu_flush,
++	.vtu_load_vlan = ar8216_vtu_load_vlan,
++	.set_mirror_regs = ar8216_set_mirror_regs,
++	.get_arl_entry = ar8216_get_arl_entry,
++	.sw_hw_apply = ar8xxx_sw_hw_apply,
++
++	.num_mibs = ARRAY_SIZE(ar8236_mibs),
++	.mib_decs = ar8236_mibs,
++	.mib_func = AR8216_REG_MIB_FUNC,
++	.mib_rxb_id = AR8236_MIB_RXB_ID,
++	.mib_txb_id = AR8236_MIB_TXB_ID,
++};
++
++static const struct ar8xxx_chip ar8216_chip = {
++	.caps = AR8XXX_CAP_MIB_COUNTERS,
++
++	.reg_port_stats_start = 0x19000,
++	.reg_port_stats_length = 0xa0,
++	.reg_arl_ctrl = AR8216_REG_ATU_CTRL,
++
++	.name = "Atheros AR8216",
++	.ports = AR8216_NUM_PORTS,
++	.vlans = AR8216_NUM_VLANS,
++	.swops = &ar8xxx_sw_ops,
++
++	.hw_init = ar8216_hw_init,
++	.init_globals = ar8216_init_globals,
++	.init_port = ar8216_init_port,
++	.setup_port = ar8216_setup_port,
++	.read_port_status = ar8216_read_port_status,
++	.atu_flush = ar8216_atu_flush,
++	.atu_flush_port = ar8216_atu_flush_port,
++	.vtu_flush = ar8216_vtu_flush,
++	.vtu_load_vlan = ar8216_vtu_load_vlan,
++	.set_mirror_regs = ar8216_set_mirror_regs,
++	.get_arl_entry = ar8216_get_arl_entry,
++	.sw_hw_apply = ar8xxx_sw_hw_apply,
++
++	.num_mibs = ARRAY_SIZE(ar8216_mibs),
++	.mib_decs = ar8216_mibs,
++	.mib_func = AR8216_REG_MIB_FUNC,
++	.mib_rxb_id = AR8216_MIB_RXB_ID,
++	.mib_txb_id = AR8216_MIB_TXB_ID,
++};
++
++static const struct ar8xxx_chip ar8229_chip = {
++	.caps = AR8XXX_CAP_MIB_COUNTERS,
++
++	.reg_port_stats_start = 0x20000,
++	.reg_port_stats_length = 0x100,
++	.reg_arl_ctrl = AR8216_REG_ATU_CTRL,
++
++	.name = "Atheros AR8229",
++	.ports = AR8216_NUM_PORTS,
++	.vlans = AR8216_NUM_VLANS,
++	.swops = &ar8xxx_sw_ops,
++
++	.hw_init = ar8229_hw_init,
++	.init_globals = ar8229_init_globals,
++	.init_port = ar8229_init_port,
++	.phy_read = ar8216_phy_read,
++	.phy_write = ar8216_phy_write,
++	.setup_port = ar8236_setup_port,
++	.read_port_status = ar8216_read_port_status,
++	.atu_flush = ar8216_atu_flush,
++	.atu_flush_port = ar8216_atu_flush_port,
++	.vtu_flush = ar8216_vtu_flush,
++	.vtu_load_vlan = ar8216_vtu_load_vlan,
++	.set_mirror_regs = ar8216_set_mirror_regs,
++	.get_arl_entry = ar8216_get_arl_entry,
++	.sw_hw_apply = ar8xxx_sw_hw_apply,
++
++	.num_mibs = ARRAY_SIZE(ar8236_mibs),
++	.mib_decs = ar8236_mibs,
++	.mib_func = AR8216_REG_MIB_FUNC,
++	.mib_rxb_id = AR8236_MIB_RXB_ID,
++	.mib_txb_id = AR8236_MIB_TXB_ID,
++};
++
++static const struct ar8xxx_chip ar8236_chip = {
++	.caps = AR8XXX_CAP_MIB_COUNTERS,
++
++	.reg_port_stats_start = 0x20000,
++	.reg_port_stats_length = 0x100,
++	.reg_arl_ctrl = AR8216_REG_ATU_CTRL,
++
++	.name = "Atheros AR8236",
++	.ports = AR8216_NUM_PORTS,
++	.vlans = AR8216_NUM_VLANS,
++	.swops = &ar8xxx_sw_ops,
++
++	.hw_init = ar8216_hw_init,
++	.init_globals = ar8236_init_globals,
++	.init_port = ar8216_init_port,
++	.setup_port = ar8236_setup_port,
++	.read_port_status = ar8216_read_port_status,
++	.atu_flush = ar8216_atu_flush,
++	.atu_flush_port = ar8216_atu_flush_port,
++	.vtu_flush = ar8216_vtu_flush,
++	.vtu_load_vlan = ar8216_vtu_load_vlan,
++	.set_mirror_regs = ar8216_set_mirror_regs,
++	.get_arl_entry = ar8216_get_arl_entry,
++	.sw_hw_apply = ar8xxx_sw_hw_apply,
++
++	.num_mibs = ARRAY_SIZE(ar8236_mibs),
++	.mib_decs = ar8236_mibs,
++	.mib_func = AR8216_REG_MIB_FUNC,
++	.mib_rxb_id = AR8236_MIB_RXB_ID,
++	.mib_txb_id = AR8236_MIB_TXB_ID,
++};
++
++static const struct ar8xxx_chip ar8316_chip = {
++	.caps = AR8XXX_CAP_GIGE | AR8XXX_CAP_MIB_COUNTERS,
++
++	.reg_port_stats_start = 0x20000,
++	.reg_port_stats_length = 0x100,
++	.reg_arl_ctrl = AR8216_REG_ATU_CTRL,
++
++	.name = "Atheros AR8316",
++	.ports = AR8216_NUM_PORTS,
++	.vlans = AR8X16_MAX_VLANS,
++	.swops = &ar8xxx_sw_ops,
++
++	.hw_init = ar8316_hw_init,
++	.init_globals = ar8316_init_globals,
++	.init_port = ar8216_init_port,
++	.setup_port = ar8216_setup_port,
++	.read_port_status = ar8216_read_port_status,
++	.atu_flush = ar8216_atu_flush,
++	.atu_flush_port = ar8216_atu_flush_port,
++	.vtu_flush = ar8216_vtu_flush,
++	.vtu_load_vlan = ar8216_vtu_load_vlan,
++	.set_mirror_regs = ar8216_set_mirror_regs,
++	.get_arl_entry = ar8216_get_arl_entry,
++	.sw_hw_apply = ar8xxx_sw_hw_apply,
++
++	.num_mibs = ARRAY_SIZE(ar8236_mibs),
++	.mib_decs = ar8236_mibs,
++	.mib_func = AR8216_REG_MIB_FUNC,
++	.mib_rxb_id = AR8236_MIB_RXB_ID,
++	.mib_txb_id = AR8236_MIB_TXB_ID,
++};
++
++static int
++ar8xxx_read_id(struct ar8xxx_priv *priv)
++{
++	u32 val;
++	u16 id;
++	int i;
++
++	val = ar8xxx_read(priv, AR8216_REG_CTRL);
++	if (val == ~0)
++		return -ENODEV;
++
++	id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
++	for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
++		u16 t;
++
++		val = ar8xxx_read(priv, AR8216_REG_CTRL);
++		if (val == ~0)
++			return -ENODEV;
++
++		t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
++		if (t != id)
++			return -ENODEV;
++	}
++
++	priv->chip_ver = (id & AR8216_CTRL_VERSION) >> AR8216_CTRL_VERSION_S;
++	priv->chip_rev = (id & AR8216_CTRL_REVISION);
++	return 0;
++}
++
++static int
++ar8xxx_id_chip(struct ar8xxx_priv *priv)
++{
++	int ret;
++
++	ret = ar8xxx_read_id(priv);
++	if(ret)
++		return ret;
++
++	switch (priv->chip_ver) {
++	case AR8XXX_VER_AR8216:
++		priv->chip = &ar8216_chip;
++		break;
++	case AR8XXX_VER_AR8236:
++		priv->chip = &ar8236_chip;
++		break;
++	case AR8XXX_VER_AR8316:
++		priv->chip = &ar8316_chip;
++		break;
++	case AR8XXX_VER_AR8327:
++		priv->chip = &ar8327_chip;
++		break;
++	case AR8XXX_VER_AR8337:
++		priv->chip = &ar8337_chip;
++		break;
++	default:
++		pr_err("ar8216: Unknown Atheros device [ver=%d, rev=%d]\n",
++		       priv->chip_ver, priv->chip_rev);
++
++		return -ENODEV;
++	}
++
++	return 0;
++}
++
++static void
++ar8xxx_mib_work_func(struct work_struct *work)
++{
++	struct ar8xxx_priv *priv;
++	int err, i;
++
++	priv = container_of(work, struct ar8xxx_priv, mib_work.work);
++
++	mutex_lock(&priv->mib_lock);
++
++	err = ar8xxx_mib_capture(priv);
++	if (err)
++		goto next_attempt;
++
++	for (i = 0; i < priv->dev.ports; i++)
++		ar8xxx_mib_fetch_port_stat(priv, i, false);
++
++next_attempt:
++	mutex_unlock(&priv->mib_lock);
++	schedule_delayed_work(&priv->mib_work,
++			      msecs_to_jiffies(priv->mib_poll_interval));
++}
++
++static int
++ar8xxx_mib_init(struct ar8xxx_priv *priv)
++{
++	unsigned int len;
++
++	if (!ar8xxx_has_mib_counters(priv))
++		return 0;
++
++	BUG_ON(!priv->chip->mib_decs || !priv->chip->num_mibs);
++
++	len = priv->dev.ports * priv->chip->num_mibs *
++	      sizeof(*priv->mib_stats);
++	priv->mib_stats = kzalloc(len, GFP_KERNEL);
++
++	if (!priv->mib_stats)
++		return -ENOMEM;
++
++	return 0;
++}
++
++static void
++ar8xxx_mib_start(struct ar8xxx_priv *priv)
++{
++	if (!ar8xxx_has_mib_counters(priv) || !priv->mib_poll_interval)
++		return;
++
++	schedule_delayed_work(&priv->mib_work,
++			      msecs_to_jiffies(priv->mib_poll_interval));
++}
++
++static void
++ar8xxx_mib_stop(struct ar8xxx_priv *priv)
++{
++	if (!ar8xxx_has_mib_counters(priv) || !priv->mib_poll_interval)
++		return;
++
++	cancel_delayed_work_sync(&priv->mib_work);
++}
++
++static struct ar8xxx_priv *
++ar8xxx_create(void)
++{
++	struct ar8xxx_priv *priv;
++
++	priv = kzalloc(sizeof(struct ar8xxx_priv), GFP_KERNEL);
++	if (priv == NULL)
++		return NULL;
++
++	mutex_init(&priv->reg_mutex);
++	mutex_init(&priv->mib_lock);
++	INIT_DELAYED_WORK(&priv->mib_work, ar8xxx_mib_work_func);
++
++	return priv;
++}
++
++static void
++ar8xxx_free(struct ar8xxx_priv *priv)
++{
++	if (priv->chip && priv->chip->cleanup)
++		priv->chip->cleanup(priv);
++
++	kfree(priv->chip_data);
++	kfree(priv->mib_stats);
++	kfree(priv);
++}
++
++static int
++ar8xxx_probe_switch(struct ar8xxx_priv *priv)
++{
++	const struct ar8xxx_chip *chip;
++	struct switch_dev *swdev;
++	int ret;
++
++	chip = priv->chip;
++
++	swdev = &priv->dev;
++	swdev->cpu_port = AR8216_PORT_CPU;
++	swdev->name = chip->name;
++	swdev->vlans = chip->vlans;
++	swdev->ports = chip->ports;
++	swdev->ops = chip->swops;
++
++	ret = ar8xxx_mib_init(priv);
++	if (ret)
++		return ret;
++
++	return 0;
++}
++
++static int
++ar8xxx_start(struct ar8xxx_priv *priv)
++{
++	int ret;
++
++	priv->init = true;
++
++	ret = priv->chip->hw_init(priv);
++	if (ret)
++		return ret;
++
++	ret = ar8xxx_sw_reset_switch(&priv->dev);
++	if (ret)
++		return ret;
++
++	priv->init = false;
++
++	ar8xxx_mib_start(priv);
++
++	return 0;
++}
++
++static int
++ar8xxx_phy_config_init(struct phy_device *phydev)
++{
++	struct ar8xxx_priv *priv = phydev->priv;
++	struct net_device *dev = phydev->attached_dev;
++	int ret;
++
++	if (WARN_ON(!priv))
++		return -ENODEV;
++
++	if (priv->chip->config_at_probe)
++		return ar8xxx_phy_check_aneg(phydev);
++
++	priv->phy = phydev;
++
++	if (phydev->mdio.addr != 0) {
++		if (chip_is_ar8316(priv)) {
++			/* switch device has been initialized, reinit */
++			priv->dev.ports = (AR8216_NUM_PORTS - 1);
++			priv->initialized = false;
++			priv->port4_phy = true;
++			ar8316_hw_init(priv);
++			return 0;
++		}
++
++		return 0;
++	}
++
++	ret = ar8xxx_start(priv);
++	if (ret)
++		return ret;
++
++#ifdef CONFIG_ETHERNET_PACKET_MANGLE
++	/* VID fixup only needed on ar8216 */
++	if (chip_is_ar8216(priv)) {
++		dev->phy_ptr = priv;
++		dev->priv_flags |= IFF_NO_IP_ALIGN;
++		dev->eth_mangle_rx = ar8216_mangle_rx;
++		dev->eth_mangle_tx = ar8216_mangle_tx;
++	}
++#endif
++
++	return 0;
++}
++
++static bool
++ar8xxx_check_link_states(struct ar8xxx_priv *priv)
++{
++	bool link_new, changed = false;
++	u32 status;
++	int i;
++
++	mutex_lock(&priv->reg_mutex);
++
++	for (i = 0; i < priv->dev.ports; i++) {
++		status = priv->chip->read_port_status(priv, i);
++		link_new = !!(status & AR8216_PORT_STATUS_LINK_UP);
++		if (link_new == priv->link_up[i])
++			continue;
++
++		priv->link_up[i] = link_new;
++		changed = true;
++		/* flush ARL entries for this port if it went down*/
++		if (!link_new)
++			priv->chip->atu_flush_port(priv, i);
++		dev_info(&priv->phy->mdio.dev, "Port %d is %s\n",
++			 i, link_new ? "up" : "down");
++	}
++
++	mutex_unlock(&priv->reg_mutex);
++
++	return changed;
++}
++
++static int
++ar8xxx_phy_read_status(struct phy_device *phydev)
++{
++	struct ar8xxx_priv *priv = phydev->priv;
++	struct switch_port_link link;
++
++	/* check for switch port link changes */
++	ar8xxx_check_link_states(priv);
++
++	if (phydev->mdio.addr != 0)
++		return genphy_read_status(phydev);
++
++	ar8216_read_port_link(priv, phydev->mdio.addr, &link);
++	phydev->link = !!link.link;
++	if (!phydev->link)
++		return 0;
++
++	switch (link.speed) {
++	case SWITCH_PORT_SPEED_10:
++		phydev->speed = SPEED_10;
++		break;
++	case SWITCH_PORT_SPEED_100:
++		phydev->speed = SPEED_100;
++		break;
++	case SWITCH_PORT_SPEED_1000:
++		phydev->speed = SPEED_1000;
++		break;
++	default:
++		phydev->speed = 0;
++	}
++	phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
++
++	phydev->state = PHY_RUNNING;
++	netif_carrier_on(phydev->attached_dev);
++	if (phydev->adjust_link)
++		phydev->adjust_link(phydev->attached_dev);
++
++	return 0;
++}
++
++static int
++ar8xxx_phy_config_aneg(struct phy_device *phydev)
++{
++	if (phydev->mdio.addr == 0)
++		return 0;
++
++	return genphy_config_aneg(phydev);
++}
++
++static int
++ar8xxx_get_features(struct phy_device *phydev)
++{
++	struct ar8xxx_priv *priv = phydev->priv;
++
++	linkmode_copy(phydev->supported, PHY_BASIC_FEATURES);
++	if (ar8xxx_has_gige(priv))
++		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, phydev->supported);
++
++	return 0;
++}
++
++static const u32 ar8xxx_phy_ids[] = {
++	0x004dd033,
++	0x004dd034, /* AR8327 */
++	0x004dd036, /* AR8337 */
++	0x004dd041,
++	0x004dd042,
++	0x004dd043, /* AR8236 */
++};
++
++static bool
++ar8xxx_phy_match(u32 phy_id)
++{
++	int i;
++
++	for (i = 0; i < ARRAY_SIZE(ar8xxx_phy_ids); i++)
++		if (phy_id == ar8xxx_phy_ids[i])
++			return true;
++
++	return false;
++}
++
++static bool
++ar8xxx_is_possible(struct mii_bus *bus)
++{
++	unsigned int i, found_phys = 0;
++
++	for (i = 0; i < 5; i++) {
++		u32 phy_id;
++
++		phy_id = mdiobus_read(bus, i, MII_PHYSID1) << 16;
++		phy_id |= mdiobus_read(bus, i, MII_PHYSID2);
++		if (ar8xxx_phy_match(phy_id)) {
++			found_phys++;
++		} else if (phy_id) {
++			pr_debug("ar8xxx: unknown PHY at %s:%02x id:%08x\n",
++				 dev_name(&bus->dev), i, phy_id);
++		}
++	}
++	return !!found_phys;
++}
++
++static int
++ar8xxx_phy_probe(struct phy_device *phydev)
++{
++	struct ar8xxx_priv *priv;
++	struct switch_dev *swdev;
++	int ret;
++
++	/* skip PHYs at unused adresses */
++	if (phydev->mdio.addr != 0 && phydev->mdio.addr != 3 && phydev->mdio.addr != 4)
++		return -ENODEV;
++
++	if (!ar8xxx_is_possible(phydev->mdio.bus))
++		return -ENODEV;
++
++	mutex_lock(&ar8xxx_dev_list_lock);
++	list_for_each_entry(priv, &ar8xxx_dev_list, list)
++		if (priv->mii_bus == phydev->mdio.bus)
++			goto found;
++
++	priv = ar8xxx_create();
++	if (priv == NULL) {
++		ret = -ENOMEM;
++		goto unlock;
++	}
++
++	priv->mii_bus = phydev->mdio.bus;
++	priv->pdev = &phydev->mdio.dev;
++
++	ret = of_property_read_u32(priv->pdev->of_node, "qca,mib-poll-interval",
++				   &priv->mib_poll_interval);
++	if (ret)
++		priv->mib_poll_interval = 0;
++
++	ret = ar8xxx_id_chip(priv);
++	if (ret)
++		goto free_priv;
++
++	ret = ar8xxx_probe_switch(priv);
++	if (ret)
++		goto free_priv;
++
++	swdev = &priv->dev;
++	swdev->alias = dev_name(&priv->mii_bus->dev);
++	ret = register_switch(swdev, NULL);
++	if (ret)
++		goto free_priv;
++
++	pr_info("%s: %s rev. %u switch registered on %s\n",
++		swdev->devname, swdev->name, priv->chip_rev,
++		dev_name(&priv->mii_bus->dev));
++
++	list_add(&priv->list, &ar8xxx_dev_list);
++
++found:
++	priv->use_count++;
++
++	if (phydev->mdio.addr == 0 && priv->chip->config_at_probe) {
++		priv->phy = phydev;
++
++		ret = ar8xxx_start(priv);
++		if (ret)
++			goto err_unregister_switch;
++	} else if (priv->chip->phy_rgmii_set) {
++		priv->chip->phy_rgmii_set(priv, phydev);
++	}
++
++	phydev->priv = priv;
++
++	mutex_unlock(&ar8xxx_dev_list_lock);
++
++	return 0;
++
++err_unregister_switch:
++	if (--priv->use_count)
++		goto unlock;
++
++	unregister_switch(&priv->dev);
++
++free_priv:
++	ar8xxx_free(priv);
++unlock:
++	mutex_unlock(&ar8xxx_dev_list_lock);
++	return ret;
++}
++
++static void
++ar8xxx_phy_detach(struct phy_device *phydev)
++{
++	struct net_device *dev = phydev->attached_dev;
++
++	if (!dev)
++		return;
++
++#ifdef CONFIG_ETHERNET_PACKET_MANGLE
++	dev->phy_ptr = NULL;
++	dev->priv_flags &= ~IFF_NO_IP_ALIGN;
++	dev->eth_mangle_rx = NULL;
++	dev->eth_mangle_tx = NULL;
++#endif
++}
++
++static void
++ar8xxx_phy_remove(struct phy_device *phydev)
++{
++	struct ar8xxx_priv *priv = phydev->priv;
++
++	if (WARN_ON(!priv))
++		return;
++
++	phydev->priv = NULL;
++
++	mutex_lock(&ar8xxx_dev_list_lock);
++
++	if (--priv->use_count > 0) {
++		mutex_unlock(&ar8xxx_dev_list_lock);
++		return;
++	}
++
++	list_del(&priv->list);
++	mutex_unlock(&ar8xxx_dev_list_lock);
++
++	unregister_switch(&priv->dev);
++	ar8xxx_mib_stop(priv);
++	ar8xxx_free(priv);
++}
++
++static int
++ar8xxx_phy_soft_reset(struct phy_device *phydev)
++{
++	/* we don't need an extra reset */
++	return 0;
++}
++
++static struct phy_driver ar8xxx_phy_driver[] = {
++	{
++		.phy_id		= 0x004d0000,
++		.name		= "Atheros AR8216/AR8236/AR8316",
++		.phy_id_mask	= 0xffff0000,
++		.probe		= ar8xxx_phy_probe,
++		.remove		= ar8xxx_phy_remove,
++		.detach		= ar8xxx_phy_detach,
++		.config_init	= ar8xxx_phy_config_init,
++		.config_aneg	= ar8xxx_phy_config_aneg,
++		.read_status	= ar8xxx_phy_read_status,
++		.soft_reset	= ar8xxx_phy_soft_reset,
++		.get_features	= ar8xxx_get_features,
++	}
++};
++
++static const struct of_device_id ar8xxx_mdiodev_of_match[] = {
++	{
++		.compatible = "qca,ar7240sw",
++		.data = &ar7240sw_chip,
++	}, {
++		.compatible = "qca,ar8229",
++		.data = &ar8229_chip,
++	}, {
++		.compatible = "qca,ar8236",
++		.data = &ar8236_chip,
++	}, {
++		.compatible = "qca,ar8327",
++		.data = &ar8327_chip,
++	},
++	{ /* sentinel */ },
++};
++
++static int
++ar8xxx_mdiodev_probe(struct mdio_device *mdiodev)
++{
++	const struct of_device_id *match;
++	struct ar8xxx_priv *priv;
++	struct switch_dev *swdev;
++	struct device_node *mdio_node;
++	int ret;
++
++	match = of_match_device(ar8xxx_mdiodev_of_match, &mdiodev->dev);
++	if (!match)
++		return -EINVAL;
++
++	priv = ar8xxx_create();
++	if (priv == NULL)
++		return -ENOMEM;
++
++	priv->mii_bus = mdiodev->bus;
++	priv->pdev = &mdiodev->dev;
++	priv->chip = (const struct ar8xxx_chip *) match->data;
++
++	ret = of_property_read_u32(priv->pdev->of_node, "qca,mib-poll-interval",
++				   &priv->mib_poll_interval);
++	if (ret)
++		priv->mib_poll_interval = 0;
++
++	ret = ar8xxx_read_id(priv);
++	if (ret)
++		goto free_priv;
++
++	ret = ar8xxx_probe_switch(priv);
++	if (ret)
++		goto free_priv;
++
++	if (priv->chip->phy_read && priv->chip->phy_write) {
++		priv->sw_mii_bus = devm_mdiobus_alloc(&mdiodev->dev);
++		priv->sw_mii_bus->name = "ar8xxx-mdio";
++		priv->sw_mii_bus->read = ar8xxx_phy_read;
++		priv->sw_mii_bus->write = ar8xxx_phy_write;
++		priv->sw_mii_bus->priv = priv;
++		priv->sw_mii_bus->parent = &mdiodev->dev;
++		snprintf(priv->sw_mii_bus->id, MII_BUS_ID_SIZE, "%s",
++			 dev_name(&mdiodev->dev));
++		mdio_node = of_get_child_by_name(priv->pdev->of_node, "mdio-bus");
++		ret = of_mdiobus_register(priv->sw_mii_bus, mdio_node);
++		if (ret)
++			goto free_priv;
++	}
++
++	swdev = &priv->dev;
++	swdev->alias = dev_name(&mdiodev->dev);
++
++	if (of_property_read_bool(priv->pdev->of_node, "qca,phy4-mii-enable")) {
++		priv->port4_phy = true;
++		swdev->ports--;
++	}
++
++	ret = register_switch(swdev, NULL);
++	if (ret)
++		goto free_priv;
++
++	pr_info("%s: %s rev. %u switch registered on %s\n",
++		swdev->devname, swdev->name, priv->chip_rev,
++		dev_name(&priv->mii_bus->dev));
++
++	mutex_lock(&ar8xxx_dev_list_lock);
++	list_add(&priv->list, &ar8xxx_dev_list);
++	mutex_unlock(&ar8xxx_dev_list_lock);
++
++	priv->use_count++;
++
++	ret = ar8xxx_start(priv);
++	if (ret)
++		goto err_unregister_switch;
++
++	dev_set_drvdata(&mdiodev->dev, priv);
++
++	return 0;
++
++err_unregister_switch:
++	if (--priv->use_count)
++		return ret;
++
++	unregister_switch(&priv->dev);
++
++free_priv:
++	ar8xxx_free(priv);
++	return ret;
++}
++
++static void
++ar8xxx_mdiodev_remove(struct mdio_device *mdiodev)
++{
++	struct ar8xxx_priv *priv = dev_get_drvdata(&mdiodev->dev);
++
++	if (WARN_ON(!priv))
++		return;
++
++	mutex_lock(&ar8xxx_dev_list_lock);
++
++	if (--priv->use_count > 0) {
++		mutex_unlock(&ar8xxx_dev_list_lock);
++		return;
++	}
++
++	list_del(&priv->list);
++	mutex_unlock(&ar8xxx_dev_list_lock);
++
++	unregister_switch(&priv->dev);
++	ar8xxx_mib_stop(priv);
++	if(priv->sw_mii_bus)
++		mdiobus_unregister(priv->sw_mii_bus);
++	ar8xxx_free(priv);
++}
++
++static struct mdio_driver ar8xxx_mdio_driver = {
++	.probe  = ar8xxx_mdiodev_probe,
++	.remove = ar8xxx_mdiodev_remove,
++	.mdiodrv.driver = {
++		.name = "ar8xxx-switch",
++		.of_match_table = ar8xxx_mdiodev_of_match,
++	},
++};
++
++static int __init ar8216_init(void)
++{
++	int ret;
++
++	ret = phy_drivers_register(ar8xxx_phy_driver,
++				   ARRAY_SIZE(ar8xxx_phy_driver),
++				   THIS_MODULE);
++	if (ret)
++		return ret;
++
++	ret = mdio_driver_register(&ar8xxx_mdio_driver);
++	if (ret)
++		phy_drivers_unregister(ar8xxx_phy_driver,
++				       ARRAY_SIZE(ar8xxx_phy_driver));
++
++	return ret;
++}
++module_init(ar8216_init);
++
++static void __exit ar8216_exit(void)
++{
++	mdio_driver_unregister(&ar8xxx_mdio_driver);
++	phy_drivers_unregister(ar8xxx_phy_driver,
++			        ARRAY_SIZE(ar8xxx_phy_driver));
++}
++module_exit(ar8216_exit);
++
++MODULE_LICENSE("GPL");
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/ar8216.h b/target/linux/generic/files-5.4/drivers/net/phy/ar8216.h
+new file mode 100644
+index 0000000000..d62cf60f57
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/ar8216.h
+@@ -0,0 +1,723 @@
++/*
++ * ar8216.h: AR8216 switch driver
++ *
++ * Copyright (C) 2009 Felix Fietkau <nbd@nbd.name>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
++
++#ifndef __AR8216_H
++#define __AR8216_H
++
++#define BITS(_s, _n)	(((1UL << (_n)) - 1) << _s)
++
++#define AR8XXX_CAP_GIGE			BIT(0)
++#define AR8XXX_CAP_MIB_COUNTERS		BIT(1)
++
++#define AR8XXX_NUM_PHYS 	5
++#define AR8216_PORT_CPU	0
++#define AR8216_NUM_PORTS	6
++#define AR8216_NUM_VLANS	16
++#define AR7240SW_NUM_PORTS	5
++#define AR8316_NUM_VLANS	4096
++
++/* size of the vlan table */
++#define AR8X16_MAX_VLANS	128
++#define AR83X7_MAX_VLANS	4096
++#define AR8XXX_MAX_VLANS	AR83X7_MAX_VLANS
++
++#define AR8X16_PROBE_RETRIES	10
++#define AR8X16_MAX_PORTS	8
++
++#define AR8XXX_REG_ARL_CTRL_AGE_TIME_SECS	7
++#define AR8XXX_DEFAULT_ARL_AGE_TIME		300
++
++/* Atheros specific MII registers */
++#define MII_ATH_MMD_ADDR		0x0d
++#define MII_ATH_MMD_DATA		0x0e
++#define MII_ATH_DBG_ADDR		0x1d
++#define MII_ATH_DBG_DATA		0x1e
++
++#define AR8216_REG_CTRL			0x0000
++#define   AR8216_CTRL_REVISION		BITS(0, 8)
++#define   AR8216_CTRL_REVISION_S	0
++#define   AR8216_CTRL_VERSION		BITS(8, 8)
++#define   AR8216_CTRL_VERSION_S		8
++#define   AR8216_CTRL_RESET		BIT(31)
++
++#define AR8216_REG_FLOOD_MASK		0x002C
++#define   AR8216_FM_UNI_DEST_PORTS	BITS(0, 6)
++#define   AR8216_FM_MULTI_DEST_PORTS	BITS(16, 6)
++#define   AR8216_FM_CPU_BROADCAST_EN	BIT(26)
++#define   AR8229_FLOOD_MASK_UC_DP(_p)	BIT(_p)
++#define   AR8229_FLOOD_MASK_MC_DP(_p)	BIT(16 + (_p))
++#define   AR8229_FLOOD_MASK_BC_DP(_p)	BIT(25 + (_p))
++
++#define AR8216_REG_GLOBAL_CTRL		0x0030
++#define   AR8216_GCTRL_MTU		BITS(0, 11)
++#define   AR8236_GCTRL_MTU		BITS(0, 14)
++#define   AR8316_GCTRL_MTU		BITS(0, 14)
++
++#define AR8216_REG_VTU			0x0040
++#define   AR8216_VTU_OP			BITS(0, 3)
++#define   AR8216_VTU_OP_NOOP		0x0
++#define   AR8216_VTU_OP_FLUSH		0x1
++#define   AR8216_VTU_OP_LOAD		0x2
++#define   AR8216_VTU_OP_PURGE		0x3
++#define   AR8216_VTU_OP_REMOVE_PORT	0x4
++#define   AR8216_VTU_ACTIVE		BIT(3)
++#define   AR8216_VTU_FULL		BIT(4)
++#define   AR8216_VTU_PORT		BITS(8, 4)
++#define   AR8216_VTU_PORT_S		8
++#define   AR8216_VTU_VID		BITS(16, 12)
++#define   AR8216_VTU_VID_S		16
++#define   AR8216_VTU_PRIO		BITS(28, 3)
++#define   AR8216_VTU_PRIO_S		28
++#define   AR8216_VTU_PRIO_EN		BIT(31)
++
++#define AR8216_REG_VTU_DATA		0x0044
++#define   AR8216_VTUDATA_MEMBER		BITS(0, 10)
++#define   AR8236_VTUDATA_MEMBER		BITS(0, 7)
++#define   AR8216_VTUDATA_VALID		BIT(11)
++
++#define AR8216_REG_ATU_FUNC0		0x0050
++#define   AR8216_ATU_OP			BITS(0, 3)
++#define   AR8216_ATU_OP_NOOP		0x0
++#define   AR8216_ATU_OP_FLUSH		0x1
++#define   AR8216_ATU_OP_LOAD		0x2
++#define   AR8216_ATU_OP_PURGE		0x3
++#define   AR8216_ATU_OP_FLUSH_UNLOCKED	0x4
++#define   AR8216_ATU_OP_FLUSH_PORT	0x5
++#define   AR8216_ATU_OP_GET_NEXT	0x6
++#define   AR8216_ATU_ACTIVE		BIT(3)
++#define   AR8216_ATU_PORT_NUM		BITS(8, 4)
++#define   AR8216_ATU_PORT_NUM_S		8
++#define   AR8216_ATU_FULL_VIO		BIT(12)
++#define   AR8216_ATU_ADDR5		BITS(16, 8)
++#define   AR8216_ATU_ADDR5_S		16
++#define   AR8216_ATU_ADDR4		BITS(24, 8)
++#define   AR8216_ATU_ADDR4_S		24
++
++#define AR8216_REG_ATU_FUNC1		0x0054
++#define   AR8216_ATU_ADDR3		BITS(0, 8)
++#define   AR8216_ATU_ADDR3_S		0
++#define   AR8216_ATU_ADDR2		BITS(8, 8)
++#define   AR8216_ATU_ADDR2_S		8
++#define   AR8216_ATU_ADDR1		BITS(16, 8)
++#define   AR8216_ATU_ADDR1_S		16
++#define   AR8216_ATU_ADDR0		BITS(24, 8)
++#define   AR8216_ATU_ADDR0_S		24
++
++#define AR8216_REG_ATU_FUNC2		0x0058
++#define   AR8216_ATU_PORTS		BITS(0, 6)
++#define   AR8216_ATU_PORTS_S		0
++#define   AR8216_ATU_PORT0		BIT(0)
++#define   AR8216_ATU_PORT1		BIT(1)
++#define   AR8216_ATU_PORT2		BIT(2)
++#define   AR8216_ATU_PORT3		BIT(3)
++#define   AR8216_ATU_PORT4		BIT(4)
++#define   AR8216_ATU_PORT5		BIT(5)
++#define   AR8216_ATU_STATUS		BITS(16, 4)
++#define   AR8216_ATU_STATUS_S		16
++
++#define AR8216_REG_ATU_CTRL		0x005C
++#define   AR8216_ATU_CTRL_AGE_EN	BIT(17)
++#define   AR8216_ATU_CTRL_AGE_TIME	BITS(0, 16)
++#define   AR8216_ATU_CTRL_AGE_TIME_S	0
++#define   AR8236_ATU_CTRL_RES		BIT(20)
++#define   AR8216_ATU_CTRL_LEARN_CHANGE	BIT(18)
++#define   AR8216_ATU_CTRL_RESERVED	BIT(19)
++#define   AR8216_ATU_CTRL_ARP_EN	BIT(20)
++
++#define AR8216_REG_TAG_PRIORITY	0x0070
++
++#define AR8216_REG_SERVICE_TAG		0x0074
++#define  AR8216_SERVICE_TAG_M		BITS(0, 16)
++
++#define AR8216_REG_MIB_FUNC		0x0080
++#define   AR8216_MIB_TIMER		BITS(0, 16)
++#define   AR8216_MIB_AT_HALF_EN		BIT(16)
++#define   AR8216_MIB_BUSY		BIT(17)
++#define   AR8216_MIB_FUNC		BITS(24, 3)
++#define   AR8216_MIB_FUNC_S		24
++#define   AR8216_MIB_FUNC_NO_OP		0x0
++#define   AR8216_MIB_FUNC_FLUSH		0x1
++#define   AR8216_MIB_FUNC_CAPTURE	0x3
++#define   AR8236_MIB_EN			BIT(30)
++
++#define AR8216_REG_GLOBAL_CPUPORT		0x0078
++#define   AR8216_GLOBAL_CPUPORT_MIRROR_PORT	BITS(4, 4)
++#define   AR8216_GLOBAL_CPUPORT_MIRROR_PORT_S	4
++#define   AR8216_GLOBAL_CPUPORT_EN		BIT(8)
++
++#define AR8216_REG_MDIO_CTRL		0x98
++#define   AR8216_MDIO_CTRL_DATA_M	BITS(0, 16)
++#define   AR8216_MDIO_CTRL_REG_ADDR_S	16
++#define   AR8216_MDIO_CTRL_PHY_ADDR_S	21
++#define   AR8216_MDIO_CTRL_CMD_WRITE	0
++#define   AR8216_MDIO_CTRL_CMD_READ	BIT(27)
++#define   AR8216_MDIO_CTRL_MASTER_EN	BIT(30)
++#define   AR8216_MDIO_CTRL_BUSY	BIT(31)
++
++#define AR8216_PORT_OFFSET(_i)		(0x0100 * (_i + 1))
++#define AR8216_REG_PORT_STATUS(_i)	(AR8216_PORT_OFFSET(_i) + 0x0000)
++#define   AR8216_PORT_STATUS_SPEED	BITS(0,2)
++#define   AR8216_PORT_STATUS_SPEED_S	0
++#define   AR8216_PORT_STATUS_TXMAC	BIT(2)
++#define   AR8216_PORT_STATUS_RXMAC	BIT(3)
++#define   AR8216_PORT_STATUS_TXFLOW	BIT(4)
++#define   AR8216_PORT_STATUS_RXFLOW	BIT(5)
++#define   AR8216_PORT_STATUS_DUPLEX	BIT(6)
++#define   AR8216_PORT_STATUS_LINK_UP	BIT(8)
++#define   AR8216_PORT_STATUS_LINK_AUTO	BIT(9)
++#define   AR8216_PORT_STATUS_LINK_PAUSE	BIT(10)
++#define   AR8216_PORT_STATUS_FLOW_CONTROL  BIT(12)
++
++#define AR8216_REG_PORT_CTRL(_i)	(AR8216_PORT_OFFSET(_i) + 0x0004)
++
++/* port forwarding state */
++#define   AR8216_PORT_CTRL_STATE	BITS(0, 3)
++#define   AR8216_PORT_CTRL_STATE_S	0
++
++#define   AR8216_PORT_CTRL_LEARN_LOCK	BIT(7)
++
++/* egress 802.1q mode */
++#define   AR8216_PORT_CTRL_VLAN_MODE	BITS(8, 2)
++#define   AR8216_PORT_CTRL_VLAN_MODE_S	8
++
++#define   AR8216_PORT_CTRL_IGMP_SNOOP	BIT(10)
++#define   AR8216_PORT_CTRL_HEADER	BIT(11)
++#define   AR8216_PORT_CTRL_MAC_LOOP	BIT(12)
++#define   AR8216_PORT_CTRL_SINGLE_VLAN	BIT(13)
++#define   AR8216_PORT_CTRL_LEARN	BIT(14)
++#define   AR8216_PORT_CTRL_MIRROR_TX	BIT(16)
++#define   AR8216_PORT_CTRL_MIRROR_RX	BIT(17)
++
++#define AR8216_REG_PORT_VLAN(_i)	(AR8216_PORT_OFFSET(_i) + 0x0008)
++
++#define   AR8216_PORT_VLAN_DEFAULT_ID	BITS(0, 12)
++#define   AR8216_PORT_VLAN_DEFAULT_ID_S	0
++
++#define   AR8216_PORT_VLAN_DEST_PORTS	BITS(16, 9)
++#define   AR8216_PORT_VLAN_DEST_PORTS_S	16
++
++/* bit0 added to the priority field of egress frames */
++#define   AR8216_PORT_VLAN_TX_PRIO	BIT(27)
++
++/* port default priority */
++#define   AR8216_PORT_VLAN_PRIORITY	BITS(28, 2)
++#define   AR8216_PORT_VLAN_PRIORITY_S	28
++
++/* ingress 802.1q mode */
++#define   AR8216_PORT_VLAN_MODE		BITS(30, 2)
++#define   AR8216_PORT_VLAN_MODE_S	30
++
++#define AR8216_REG_PORT_RATE(_i)	(AR8216_PORT_OFFSET(_i) + 0x000c)
++#define AR8216_REG_PORT_PRIO(_i)	(AR8216_PORT_OFFSET(_i) + 0x0010)
++
++#define AR8216_STATS_RXBROAD		0x00
++#define AR8216_STATS_RXPAUSE		0x04
++#define AR8216_STATS_RXMULTI		0x08
++#define AR8216_STATS_RXFCSERR		0x0c
++#define AR8216_STATS_RXALIGNERR		0x10
++#define AR8216_STATS_RXRUNT		0x14
++#define AR8216_STATS_RXFRAGMENT		0x18
++#define AR8216_STATS_RX64BYTE		0x1c
++#define AR8216_STATS_RX128BYTE		0x20
++#define AR8216_STATS_RX256BYTE		0x24
++#define AR8216_STATS_RX512BYTE		0x28
++#define AR8216_STATS_RX1024BYTE		0x2c
++#define AR8216_STATS_RXMAXBYTE		0x30
++#define AR8216_STATS_RXTOOLONG		0x34
++#define AR8216_STATS_RXGOODBYTE		0x38
++#define AR8216_STATS_RXBADBYTE		0x40
++#define AR8216_STATS_RXOVERFLOW		0x48
++#define AR8216_STATS_FILTERED		0x4c
++#define AR8216_STATS_TXBROAD		0x50
++#define AR8216_STATS_TXPAUSE		0x54
++#define AR8216_STATS_TXMULTI		0x58
++#define AR8216_STATS_TXUNDERRUN		0x5c
++#define AR8216_STATS_TX64BYTE		0x60
++#define AR8216_STATS_TX128BYTE		0x64
++#define AR8216_STATS_TX256BYTE		0x68
++#define AR8216_STATS_TX512BYTE		0x6c
++#define AR8216_STATS_TX1024BYTE		0x70
++#define AR8216_STATS_TXMAXBYTE		0x74
++#define AR8216_STATS_TXOVERSIZE		0x78
++#define AR8216_STATS_TXBYTE		0x7c
++#define AR8216_STATS_TXCOLLISION	0x84
++#define AR8216_STATS_TXABORTCOL		0x88
++#define AR8216_STATS_TXMULTICOL		0x8c
++#define AR8216_STATS_TXSINGLECOL	0x90
++#define AR8216_STATS_TXEXCDEFER		0x94
++#define AR8216_STATS_TXDEFER		0x98
++#define AR8216_STATS_TXLATECOL		0x9c
++
++#define AR8216_MIB_RXB_ID		14	/* RxGoodByte */
++#define AR8216_MIB_TXB_ID		29	/* TxByte */
++
++#define AR8229_REG_OPER_MODE0		0x04
++#define   AR8229_OPER_MODE0_MAC_GMII_EN	BIT(6)
++#define   AR8229_OPER_MODE0_PHY_MII_EN	BIT(10)
++
++#define AR8229_REG_OPER_MODE1		0x08
++#define   AR8229_REG_OPER_MODE1_PHY4_MII_EN	BIT(28)
++
++#define AR8229_REG_QM_CTRL		0x3c
++#define   AR8229_QM_CTRL_ARP_EN		BIT(15)
++
++#define AR8236_REG_PORT_VLAN(_i)	(AR8216_PORT_OFFSET((_i)) + 0x0008)
++#define   AR8236_PORT_VLAN_DEFAULT_ID	BITS(16, 12)
++#define   AR8236_PORT_VLAN_DEFAULT_ID_S	16
++#define   AR8236_PORT_VLAN_PRIORITY	BITS(29, 3)
++#define   AR8236_PORT_VLAN_PRIORITY_S	28
++
++#define AR8236_REG_PORT_VLAN2(_i)	(AR8216_PORT_OFFSET((_i)) + 0x000c)
++#define   AR8236_PORT_VLAN2_MEMBER	BITS(16, 7)
++#define   AR8236_PORT_VLAN2_MEMBER_S	16
++#define   AR8236_PORT_VLAN2_TX_PRIO	BIT(23)
++#define   AR8236_PORT_VLAN2_VLAN_MODE	BITS(30, 2)
++#define   AR8236_PORT_VLAN2_VLAN_MODE_S	30
++
++#define AR8236_STATS_RXBROAD		0x00
++#define AR8236_STATS_RXPAUSE		0x04
++#define AR8236_STATS_RXMULTI		0x08
++#define AR8236_STATS_RXFCSERR		0x0c
++#define AR8236_STATS_RXALIGNERR		0x10
++#define AR8236_STATS_RXRUNT		0x14
++#define AR8236_STATS_RXFRAGMENT		0x18
++#define AR8236_STATS_RX64BYTE		0x1c
++#define AR8236_STATS_RX128BYTE		0x20
++#define AR8236_STATS_RX256BYTE		0x24
++#define AR8236_STATS_RX512BYTE		0x28
++#define AR8236_STATS_RX1024BYTE		0x2c
++#define AR8236_STATS_RX1518BYTE		0x30
++#define AR8236_STATS_RXMAXBYTE		0x34
++#define AR8236_STATS_RXTOOLONG		0x38
++#define AR8236_STATS_RXGOODBYTE		0x3c
++#define AR8236_STATS_RXBADBYTE		0x44
++#define AR8236_STATS_RXOVERFLOW		0x4c
++#define AR8236_STATS_FILTERED		0x50
++#define AR8236_STATS_TXBROAD		0x54
++#define AR8236_STATS_TXPAUSE		0x58
++#define AR8236_STATS_TXMULTI		0x5c
++#define AR8236_STATS_TXUNDERRUN		0x60
++#define AR8236_STATS_TX64BYTE		0x64
++#define AR8236_STATS_TX128BYTE		0x68
++#define AR8236_STATS_TX256BYTE		0x6c
++#define AR8236_STATS_TX512BYTE		0x70
++#define AR8236_STATS_TX1024BYTE		0x74
++#define AR8236_STATS_TX1518BYTE		0x78
++#define AR8236_STATS_TXMAXBYTE		0x7c
++#define AR8236_STATS_TXOVERSIZE		0x80
++#define AR8236_STATS_TXBYTE		0x84
++#define AR8236_STATS_TXCOLLISION	0x8c
++#define AR8236_STATS_TXABORTCOL		0x90
++#define AR8236_STATS_TXMULTICOL		0x94
++#define AR8236_STATS_TXSINGLECOL	0x98
++#define AR8236_STATS_TXEXCDEFER		0x9c
++#define AR8236_STATS_TXDEFER		0xa0
++#define AR8236_STATS_TXLATECOL		0xa4
++
++#define AR8236_MIB_RXB_ID		15	/* RxGoodByte */
++#define AR8236_MIB_TXB_ID		31	/* TxByte */
++
++#define AR8316_REG_POSTRIP			0x0008
++#define   AR8316_POSTRIP_MAC0_GMII_EN		BIT(0)
++#define   AR8316_POSTRIP_MAC0_RGMII_EN		BIT(1)
++#define   AR8316_POSTRIP_PHY4_GMII_EN		BIT(2)
++#define   AR8316_POSTRIP_PHY4_RGMII_EN		BIT(3)
++#define   AR8316_POSTRIP_MAC0_MAC_MODE		BIT(4)
++#define   AR8316_POSTRIP_RTL_MODE		BIT(5)
++#define   AR8316_POSTRIP_RGMII_RXCLK_DELAY_EN	BIT(6)
++#define   AR8316_POSTRIP_RGMII_TXCLK_DELAY_EN	BIT(7)
++#define   AR8316_POSTRIP_SERDES_EN		BIT(8)
++#define   AR8316_POSTRIP_SEL_ANA_RST		BIT(9)
++#define   AR8316_POSTRIP_GATE_25M_EN		BIT(10)
++#define   AR8316_POSTRIP_SEL_CLK25M		BIT(11)
++#define   AR8316_POSTRIP_HIB_PULSE_HW		BIT(12)
++#define   AR8316_POSTRIP_DBG_MODE_I		BIT(13)
++#define   AR8316_POSTRIP_MAC5_MAC_MODE		BIT(14)
++#define   AR8316_POSTRIP_MAC5_PHY_MODE		BIT(15)
++#define   AR8316_POSTRIP_POWER_DOWN_HW		BIT(16)
++#define   AR8316_POSTRIP_LPW_STATE_EN		BIT(17)
++#define   AR8316_POSTRIP_MAN_EN			BIT(18)
++#define   AR8316_POSTRIP_PHY_PLL_ON		BIT(19)
++#define   AR8316_POSTRIP_LPW_EXIT		BIT(20)
++#define   AR8316_POSTRIP_TXDELAY_S0		BIT(21)
++#define   AR8316_POSTRIP_TXDELAY_S1		BIT(22)
++#define   AR8316_POSTRIP_RXDELAY_S0		BIT(23)
++#define   AR8316_POSTRIP_LED_OPEN_EN		BIT(24)
++#define   AR8316_POSTRIP_SPI_EN			BIT(25)
++#define   AR8316_POSTRIP_RXDELAY_S1		BIT(26)
++#define   AR8316_POSTRIP_POWER_ON_SEL		BIT(31)
++
++/* port speed */
++enum {
++        AR8216_PORT_SPEED_10M = 0,
++        AR8216_PORT_SPEED_100M = 1,
++        AR8216_PORT_SPEED_1000M = 2,
++        AR8216_PORT_SPEED_ERR = 3,
++};
++
++/* ingress 802.1q mode */
++enum {
++	AR8216_IN_PORT_ONLY = 0,
++	AR8216_IN_PORT_FALLBACK = 1,
++	AR8216_IN_VLAN_ONLY = 2,
++	AR8216_IN_SECURE = 3
++};
++
++/* egress 802.1q mode */
++enum {
++	AR8216_OUT_KEEP = 0,
++	AR8216_OUT_STRIP_VLAN = 1,
++	AR8216_OUT_ADD_VLAN = 2
++};
++
++/* port forwarding state */
++enum {
++	AR8216_PORT_STATE_DISABLED = 0,
++	AR8216_PORT_STATE_BLOCK = 1,
++	AR8216_PORT_STATE_LISTEN = 2,
++	AR8216_PORT_STATE_LEARN = 3,
++	AR8216_PORT_STATE_FORWARD = 4
++};
++
++/* mib counter type */
++enum {
++	AR8XXX_MIB_BASIC = 0,
++	AR8XXX_MIB_EXTENDED = 1
++};
++
++enum {
++	AR8XXX_VER_AR8216 = 0x01,
++	AR8XXX_VER_AR8236 = 0x03,
++	AR8XXX_VER_AR8316 = 0x10,
++	AR8XXX_VER_AR8327 = 0x12,
++	AR8XXX_VER_AR8337 = 0x13,
++};
++
++#define AR8XXX_NUM_ARL_RECORDS	100
++
++enum arl_op {
++	AR8XXX_ARL_INITIALIZE,
++	AR8XXX_ARL_GET_NEXT
++};
++
++struct arl_entry {
++	u16 portmap;
++	u8 mac[6];
++};
++
++struct ar8xxx_priv;
++
++struct ar8xxx_mib_desc {
++	unsigned int size;
++	unsigned int offset;
++	const char *name;
++	u8 type;
++};
++
++struct ar8xxx_chip {
++	unsigned long caps;
++	bool config_at_probe;
++	bool mii_lo_first;
++
++	/* parameters to calculate REG_PORT_STATS_BASE */
++	unsigned reg_port_stats_start;
++	unsigned reg_port_stats_length;
++
++	unsigned reg_arl_ctrl;
++
++	int (*hw_init)(struct ar8xxx_priv *priv);
++	void (*cleanup)(struct ar8xxx_priv *priv);
++
++	const char *name;
++	int vlans;
++	int ports;
++	const struct switch_dev_ops *swops;
++
++	void (*init_globals)(struct ar8xxx_priv *priv);
++	void (*init_port)(struct ar8xxx_priv *priv, int port);
++	void (*setup_port)(struct ar8xxx_priv *priv, int port, u32 members);
++	u32 (*read_port_status)(struct ar8xxx_priv *priv, int port);
++	u32 (*read_port_eee_status)(struct ar8xxx_priv *priv, int port);
++	int (*atu_flush)(struct ar8xxx_priv *priv);
++	int (*atu_flush_port)(struct ar8xxx_priv *priv, int port);
++	void (*vtu_flush)(struct ar8xxx_priv *priv);
++	void (*vtu_load_vlan)(struct ar8xxx_priv *priv, u32 vid, u32 port_mask);
++	void (*phy_fixup)(struct ar8xxx_priv *priv, int phy);
++	void (*set_mirror_regs)(struct ar8xxx_priv *priv);
++	void (*get_arl_entry)(struct ar8xxx_priv *priv, struct arl_entry *a,
++			      u32 *status, enum arl_op op);
++	int (*sw_hw_apply)(struct switch_dev *dev);
++	void (*phy_rgmii_set)(struct ar8xxx_priv *priv, struct phy_device *phydev);
++	int (*phy_read)(struct ar8xxx_priv *priv, int addr, int regnum);
++	int (*phy_write)(struct ar8xxx_priv *priv, int addr, int regnum, u16 val);
++
++	const struct ar8xxx_mib_desc *mib_decs;
++	unsigned num_mibs;
++	unsigned mib_func;
++	int mib_rxb_id;
++	int mib_txb_id;
++};
++
++struct ar8xxx_priv {
++	struct switch_dev dev;
++	struct mii_bus *mii_bus;
++	struct mii_bus *sw_mii_bus;
++	struct phy_device *phy;
++	struct device *pdev;
++
++	int (*get_port_link)(unsigned port);
++
++	const struct net_device_ops *ndo_old;
++	struct net_device_ops ndo;
++	struct mutex reg_mutex;
++	u8 chip_ver;
++	u8 chip_rev;
++	const struct ar8xxx_chip *chip;
++	void *chip_data;
++	bool initialized;
++	bool port4_phy;
++	char buf[2048];
++	struct arl_entry arl_table[AR8XXX_NUM_ARL_RECORDS];
++	char arl_buf[AR8XXX_NUM_ARL_RECORDS * 32 + 256];
++	bool link_up[AR8X16_MAX_PORTS];
++
++	bool init;
++
++	struct mutex mib_lock;
++	struct delayed_work mib_work;
++	u64 *mib_stats;
++	u32 mib_poll_interval;
++	u8 mib_type;
++
++	struct list_head list;
++	unsigned int use_count;
++
++	/* all fields below are cleared on reset */
++	bool vlan;
++
++	u16 vlan_id[AR8XXX_MAX_VLANS];
++	u8 vlan_table[AR8XXX_MAX_VLANS];
++	u8 vlan_tagged;
++	u16 pvid[AR8X16_MAX_PORTS];
++	int arl_age_time;
++
++	/* mirroring */
++	bool mirror_rx;
++	bool mirror_tx;
++	int source_port;
++	int monitor_port;
++	u8 port_vlan_prio[AR8X16_MAX_PORTS];
++};
++
++u32
++ar8xxx_mii_read32(struct ar8xxx_priv *priv, int phy_id, int regnum);
++void
++ar8xxx_mii_write32(struct ar8xxx_priv *priv, int phy_id, int regnum, u32 val);
++u32
++ar8xxx_read(struct ar8xxx_priv *priv, int reg);
++void
++ar8xxx_write(struct ar8xxx_priv *priv, int reg, u32 val);
++u32
++ar8xxx_rmw(struct ar8xxx_priv *priv, int reg, u32 mask, u32 val);
++
++void
++ar8xxx_phy_dbg_read(struct ar8xxx_priv *priv, int phy_addr,
++		u16 dbg_addr, u16 *dbg_data);
++void
++ar8xxx_phy_dbg_write(struct ar8xxx_priv *priv, int phy_addr,
++		     u16 dbg_addr, u16 dbg_data);
++void
++ar8xxx_phy_mmd_write(struct ar8xxx_priv *priv, int phy_addr, u16 addr, u16 reg, u16 data);
++u16
++ar8xxx_phy_mmd_read(struct ar8xxx_priv *priv, int phy_addr, u16 addr, u16 reg);
++void
++ar8xxx_phy_init(struct ar8xxx_priv *priv);
++int
++ar8xxx_sw_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
++		   struct switch_val *val);
++int
++ar8xxx_sw_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
++		   struct switch_val *val);
++int
++ar8xxx_sw_set_reset_mibs(struct switch_dev *dev,
++			 const struct switch_attr *attr,
++			 struct switch_val *val);
++int
++ar8xxx_sw_set_mib_poll_interval(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val);
++int
++ar8xxx_sw_get_mib_poll_interval(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val);
++int
++ar8xxx_sw_set_mib_type(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val);
++int
++ar8xxx_sw_get_mib_type(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val);
++int
++ar8xxx_sw_set_mirror_rx_enable(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val);
++int
++ar8xxx_sw_get_mirror_rx_enable(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val);
++int
++ar8xxx_sw_set_mirror_tx_enable(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val);
++int
++ar8xxx_sw_get_mirror_tx_enable(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val);
++int
++ar8xxx_sw_set_mirror_monitor_port(struct switch_dev *dev,
++				  const struct switch_attr *attr,
++				  struct switch_val *val);
++int
++ar8xxx_sw_get_mirror_monitor_port(struct switch_dev *dev,
++				  const struct switch_attr *attr,
++				  struct switch_val *val);
++int
++ar8xxx_sw_set_mirror_source_port(struct switch_dev *dev,
++				 const struct switch_attr *attr,
++				 struct switch_val *val);
++int
++ar8xxx_sw_get_mirror_source_port(struct switch_dev *dev,
++				 const struct switch_attr *attr,
++				 struct switch_val *val);
++int
++ar8xxx_sw_set_pvid(struct switch_dev *dev, int port, int vlan);
++int
++ar8xxx_sw_get_pvid(struct switch_dev *dev, int port, int *vlan);
++int
++ar8xxx_sw_hw_apply(struct switch_dev *dev);
++int
++ar8xxx_sw_reset_switch(struct switch_dev *dev);
++int
++ar8xxx_sw_get_port_link(struct switch_dev *dev, int port,
++			struct switch_port_link *link);
++int
++ar8xxx_sw_set_port_reset_mib(struct switch_dev *dev,
++                             const struct switch_attr *attr,
++                             struct switch_val *val);
++int
++ar8xxx_sw_get_port_mib(struct switch_dev *dev,
++                       const struct switch_attr *attr,
++                       struct switch_val *val);
++int
++ar8xxx_sw_get_arl_age_time(struct switch_dev *dev,
++			   const struct switch_attr *attr,
++			   struct switch_val *val);
++int
++ar8xxx_sw_set_arl_age_time(struct switch_dev *dev,
++			   const struct switch_attr *attr,
++			   struct switch_val *val);
++int
++ar8xxx_sw_get_arl_table(struct switch_dev *dev,
++			const struct switch_attr *attr,
++			struct switch_val *val);
++int
++ar8xxx_sw_set_flush_arl_table(struct switch_dev *dev,
++			      const struct switch_attr *attr,
++			      struct switch_val *val);
++int
++ar8xxx_sw_set_flush_port_arl_table(struct switch_dev *dev,
++				   const struct switch_attr *attr,
++				   struct switch_val *val);
++int
++ar8xxx_sw_get_port_stats(struct switch_dev *dev, int port,
++			struct switch_port_stats *stats);
++int
++ar8216_wait_bit(struct ar8xxx_priv *priv, int reg, u32 mask, u32 val);
++
++static inline struct ar8xxx_priv *
++swdev_to_ar8xxx(struct switch_dev *swdev)
++{
++	return container_of(swdev, struct ar8xxx_priv, dev);
++}
++
++static inline bool ar8xxx_has_gige(struct ar8xxx_priv *priv)
++{
++	return priv->chip->caps & AR8XXX_CAP_GIGE;
++}
++
++static inline bool ar8xxx_has_mib_counters(struct ar8xxx_priv *priv)
++{
++	return priv->chip->caps & AR8XXX_CAP_MIB_COUNTERS;
++}
++
++static inline bool chip_is_ar8216(struct ar8xxx_priv *priv)
++{
++	return priv->chip_ver == AR8XXX_VER_AR8216;
++}
++
++static inline bool chip_is_ar8236(struct ar8xxx_priv *priv)
++{
++	return priv->chip_ver == AR8XXX_VER_AR8236;
++}
++
++static inline bool chip_is_ar8316(struct ar8xxx_priv *priv)
++{
++	return priv->chip_ver == AR8XXX_VER_AR8316;
++}
++
++static inline bool chip_is_ar8327(struct ar8xxx_priv *priv)
++{
++	return priv->chip_ver == AR8XXX_VER_AR8327;
++}
++
++static inline bool chip_is_ar8337(struct ar8xxx_priv *priv)
++{
++	return priv->chip_ver == AR8XXX_VER_AR8337;
++}
++
++static inline void
++ar8xxx_reg_set(struct ar8xxx_priv *priv, int reg, u32 val)
++{
++	ar8xxx_rmw(priv, reg, 0, val);
++}
++
++static inline void
++ar8xxx_reg_clear(struct ar8xxx_priv *priv, int reg, u32 val)
++{
++	ar8xxx_rmw(priv, reg, val, 0);
++}
++
++static inline void
++split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
++{
++	regaddr >>= 1;
++	*r1 = regaddr & 0x1e;
++
++	regaddr >>= 5;
++	*r2 = regaddr & 0x7;
++
++	regaddr >>= 3;
++	*page = regaddr & 0x1ff;
++}
++
++static inline void
++wait_for_page_switch(void)
++{
++	udelay(5);
++}
++
++#endif
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/ar8327.c b/target/linux/generic/files-5.4/drivers/net/phy/ar8327.c
+new file mode 100644
+index 0000000000..dce52ce0e4
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/ar8327.c
+@@ -0,0 +1,1550 @@
++/*
++ * ar8327.c: AR8216 switch driver
++ *
++ * Copyright (C) 2009 Felix Fietkau <nbd@nbd.name>
++ * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
++
++#include <linux/list.h>
++#include <linux/bitops.h>
++#include <linux/switch.h>
++#include <linux/delay.h>
++#include <linux/phy.h>
++#include <linux/lockdep.h>
++#include <linux/ar8216_platform.h>
++#include <linux/workqueue.h>
++#include <linux/of_device.h>
++#include <linux/leds.h>
++#include <linux/mdio.h>
++
++#include "ar8216.h"
++#include "ar8327.h"
++
++extern const struct ar8xxx_mib_desc ar8236_mibs[39];
++extern const struct switch_attr ar8xxx_sw_attr_vlan[1];
++
++static u32
++ar8327_get_pad_cfg(struct ar8327_pad_cfg *cfg)
++{
++	u32 t;
++
++	if (!cfg)
++		return 0;
++
++	t = 0;
++	switch (cfg->mode) {
++	case AR8327_PAD_NC:
++		break;
++
++	case AR8327_PAD_MAC2MAC_MII:
++		t = AR8327_PAD_MAC_MII_EN;
++		if (cfg->rxclk_sel)
++			t |= AR8327_PAD_MAC_MII_RXCLK_SEL;
++		if (cfg->txclk_sel)
++			t |= AR8327_PAD_MAC_MII_TXCLK_SEL;
++		break;
++
++	case AR8327_PAD_MAC2MAC_GMII:
++		t = AR8327_PAD_MAC_GMII_EN;
++		if (cfg->rxclk_sel)
++			t |= AR8327_PAD_MAC_GMII_RXCLK_SEL;
++		if (cfg->txclk_sel)
++			t |= AR8327_PAD_MAC_GMII_TXCLK_SEL;
++		break;
++
++	case AR8327_PAD_MAC_SGMII:
++		t = AR8327_PAD_SGMII_EN;
++
++		/*
++		 * WAR for the QUalcomm Atheros AP136 board.
++		 * It seems that RGMII TX/RX delay settings needs to be
++		 * applied for SGMII mode as well, The ethernet is not
++		 * reliable without this.
++		 */
++		t |= cfg->txclk_delay_sel << AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S;
++		t |= cfg->rxclk_delay_sel << AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S;
++		if (cfg->rxclk_delay_en)
++			t |= AR8327_PAD_RGMII_RXCLK_DELAY_EN;
++		if (cfg->txclk_delay_en)
++			t |= AR8327_PAD_RGMII_TXCLK_DELAY_EN;
++
++		if (cfg->sgmii_delay_en)
++			t |= AR8327_PAD_SGMII_DELAY_EN;
++
++		break;
++
++	case AR8327_PAD_MAC2PHY_MII:
++		t = AR8327_PAD_PHY_MII_EN;
++		if (cfg->rxclk_sel)
++			t |= AR8327_PAD_PHY_MII_RXCLK_SEL;
++		if (cfg->txclk_sel)
++			t |= AR8327_PAD_PHY_MII_TXCLK_SEL;
++		break;
++
++	case AR8327_PAD_MAC2PHY_GMII:
++		t = AR8327_PAD_PHY_GMII_EN;
++		if (cfg->pipe_rxclk_sel)
++			t |= AR8327_PAD_PHY_GMII_PIPE_RXCLK_SEL;
++		if (cfg->rxclk_sel)
++			t |= AR8327_PAD_PHY_GMII_RXCLK_SEL;
++		if (cfg->txclk_sel)
++			t |= AR8327_PAD_PHY_GMII_TXCLK_SEL;
++		break;
++
++	case AR8327_PAD_MAC_RGMII:
++		t = AR8327_PAD_RGMII_EN;
++		t |= cfg->txclk_delay_sel << AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S;
++		t |= cfg->rxclk_delay_sel << AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S;
++		if (cfg->rxclk_delay_en)
++			t |= AR8327_PAD_RGMII_RXCLK_DELAY_EN;
++		if (cfg->txclk_delay_en)
++			t |= AR8327_PAD_RGMII_TXCLK_DELAY_EN;
++		break;
++
++	case AR8327_PAD_PHY_GMII:
++		t = AR8327_PAD_PHYX_GMII_EN;
++		break;
++
++	case AR8327_PAD_PHY_RGMII:
++		t = AR8327_PAD_PHYX_RGMII_EN;
++		break;
++
++	case AR8327_PAD_PHY_MII:
++		t = AR8327_PAD_PHYX_MII_EN;
++		break;
++	}
++
++	return t;
++}
++
++static void
++ar8327_phy_rgmii_set(struct ar8xxx_priv *priv, struct phy_device *phydev)
++{
++	u16 phy_val = 0;
++	int phyaddr = phydev->mdio.addr;
++	struct device_node *np = phydev->mdio.dev.of_node;
++
++	if (!np)
++		return;
++
++	if (!of_property_read_bool(np, "qca,phy-rgmii-en")) {
++		pr_err("ar8327: qca,phy-rgmii-en is not specified\n");
++		return;
++	}
++	ar8xxx_phy_dbg_read(priv, phyaddr,
++				AR8327_PHY_MODE_SEL, &phy_val);
++	phy_val |= AR8327_PHY_MODE_SEL_RGMII;
++	ar8xxx_phy_dbg_write(priv, phyaddr,
++				AR8327_PHY_MODE_SEL, phy_val);
++
++	/* set rgmii tx clock delay if needed */
++	if (!of_property_read_bool(np, "qca,txclk-delay-en")) {
++		pr_err("ar8327: qca,txclk-delay-en is not specified\n");
++		return;
++	}
++	ar8xxx_phy_dbg_read(priv, phyaddr,
++				AR8327_PHY_SYS_CTRL, &phy_val);
++	phy_val |= AR8327_PHY_SYS_CTRL_RGMII_TX_DELAY;
++	ar8xxx_phy_dbg_write(priv, phyaddr,
++				AR8327_PHY_SYS_CTRL, phy_val);
++
++	/* set rgmii rx clock delay if needed */
++	if (!of_property_read_bool(np, "qca,rxclk-delay-en")) {
++		pr_err("ar8327: qca,rxclk-delay-en is not specified\n");
++		return;
++	}
++	ar8xxx_phy_dbg_read(priv, phyaddr,
++				AR8327_PHY_TEST_CTRL, &phy_val);
++	phy_val |= AR8327_PHY_TEST_CTRL_RGMII_RX_DELAY;
++	ar8xxx_phy_dbg_write(priv, phyaddr,
++				AR8327_PHY_TEST_CTRL, phy_val);
++}
++
++static void
++ar8327_phy_fixup(struct ar8xxx_priv *priv, int phy)
++{
++	switch (priv->chip_rev) {
++	case 1:
++		/* For 100M waveform */
++		ar8xxx_phy_dbg_write(priv, phy, 0, 0x02ea);
++		/* Turn on Gigabit clock */
++		ar8xxx_phy_dbg_write(priv, phy, 0x3d, 0x68a0);
++		break;
++
++	case 2:
++		ar8xxx_phy_mmd_write(priv, phy, 0x7, 0x3c, 0x0);
++		/* fallthrough */
++	case 4:
++		ar8xxx_phy_mmd_write(priv, phy, 0x3, 0x800d, 0x803f);
++		ar8xxx_phy_dbg_write(priv, phy, 0x3d, 0x6860);
++		ar8xxx_phy_dbg_write(priv, phy, 0x5, 0x2c46);
++		ar8xxx_phy_dbg_write(priv, phy, 0x3c, 0x6000);
++		break;
++	}
++}
++
++static u32
++ar8327_get_port_init_status(struct ar8327_port_cfg *cfg)
++{
++	u32 t;
++
++	if (!cfg->force_link)
++		return AR8216_PORT_STATUS_LINK_AUTO;
++
++	t = AR8216_PORT_STATUS_TXMAC | AR8216_PORT_STATUS_RXMAC;
++	t |= cfg->duplex ? AR8216_PORT_STATUS_DUPLEX : 0;
++	t |= cfg->rxpause ? AR8216_PORT_STATUS_RXFLOW : 0;
++	t |= cfg->txpause ? AR8216_PORT_STATUS_TXFLOW : 0;
++
++	switch (cfg->speed) {
++	case AR8327_PORT_SPEED_10:
++		t |= AR8216_PORT_SPEED_10M;
++		break;
++	case AR8327_PORT_SPEED_100:
++		t |= AR8216_PORT_SPEED_100M;
++		break;
++	case AR8327_PORT_SPEED_1000:
++		t |= AR8216_PORT_SPEED_1000M;
++		break;
++	}
++
++	return t;
++}
++
++#define AR8327_LED_ENTRY(_num, _reg, _shift) \
++	[_num] = { .reg = (_reg), .shift = (_shift) }
++
++static const struct ar8327_led_entry
++ar8327_led_map[AR8327_NUM_LEDS] = {
++	AR8327_LED_ENTRY(AR8327_LED_PHY0_0, 0, 14),
++	AR8327_LED_ENTRY(AR8327_LED_PHY0_1, 1, 14),
++	AR8327_LED_ENTRY(AR8327_LED_PHY0_2, 2, 14),
++
++	AR8327_LED_ENTRY(AR8327_LED_PHY1_0, 3, 8),
++	AR8327_LED_ENTRY(AR8327_LED_PHY1_1, 3, 10),
++	AR8327_LED_ENTRY(AR8327_LED_PHY1_2, 3, 12),
++
++	AR8327_LED_ENTRY(AR8327_LED_PHY2_0, 3, 14),
++	AR8327_LED_ENTRY(AR8327_LED_PHY2_1, 3, 16),
++	AR8327_LED_ENTRY(AR8327_LED_PHY2_2, 3, 18),
++
++	AR8327_LED_ENTRY(AR8327_LED_PHY3_0, 3, 20),
++	AR8327_LED_ENTRY(AR8327_LED_PHY3_1, 3, 22),
++	AR8327_LED_ENTRY(AR8327_LED_PHY3_2, 3, 24),
++
++	AR8327_LED_ENTRY(AR8327_LED_PHY4_0, 0, 30),
++	AR8327_LED_ENTRY(AR8327_LED_PHY4_1, 1, 30),
++	AR8327_LED_ENTRY(AR8327_LED_PHY4_2, 2, 30),
++};
++
++static void
++ar8327_set_led_pattern(struct ar8xxx_priv *priv, unsigned int led_num,
++		       enum ar8327_led_pattern pattern)
++{
++	const struct ar8327_led_entry *entry;
++
++	entry = &ar8327_led_map[led_num];
++	ar8xxx_rmw(priv, AR8327_REG_LED_CTRL(entry->reg),
++		   (3 << entry->shift), pattern << entry->shift);
++}
++
++static void
++ar8327_led_work_func(struct work_struct *work)
++{
++	struct ar8327_led *aled;
++	u8 pattern;
++
++	aled = container_of(work, struct ar8327_led, led_work);
++
++	pattern = aled->pattern;
++
++	ar8327_set_led_pattern(aled->sw_priv, aled->led_num,
++			       pattern);
++}
++
++static void
++ar8327_led_schedule_change(struct ar8327_led *aled, u8 pattern)
++{
++	if (aled->pattern == pattern)
++		return;
++
++	aled->pattern = pattern;
++	schedule_work(&aled->led_work);
++}
++
++static inline struct ar8327_led *
++led_cdev_to_ar8327_led(struct led_classdev *led_cdev)
++{
++	return container_of(led_cdev, struct ar8327_led, cdev);
++}
++
++static int
++ar8327_led_blink_set(struct led_classdev *led_cdev,
++		     unsigned long *delay_on,
++		     unsigned long *delay_off)
++{
++	struct ar8327_led *aled = led_cdev_to_ar8327_led(led_cdev);
++
++	if (*delay_on == 0 && *delay_off == 0) {
++		*delay_on = 125;
++		*delay_off = 125;
++	}
++
++	if (*delay_on != 125 || *delay_off != 125) {
++		/*
++		 * The hardware only supports blinking at 4Hz. Fall back
++		 * to software implementation in other cases.
++		 */
++		return -EINVAL;
++	}
++
++	spin_lock(&aled->lock);
++
++	aled->enable_hw_mode = false;
++	ar8327_led_schedule_change(aled, AR8327_LED_PATTERN_BLINK);
++
++	spin_unlock(&aled->lock);
++
++	return 0;
++}
++
++static void
++ar8327_led_set_brightness(struct led_classdev *led_cdev,
++			  enum led_brightness brightness)
++{
++	struct ar8327_led *aled = led_cdev_to_ar8327_led(led_cdev);
++	u8 pattern;
++	bool active;
++
++	active = (brightness != LED_OFF);
++	active ^= aled->active_low;
++
++	pattern = (active) ? AR8327_LED_PATTERN_ON :
++			     AR8327_LED_PATTERN_OFF;
++
++	spin_lock(&aled->lock);
++
++	aled->enable_hw_mode = false;
++	ar8327_led_schedule_change(aled, pattern);
++
++	spin_unlock(&aled->lock);
++}
++
++static ssize_t
++ar8327_led_enable_hw_mode_show(struct device *dev,
++			       struct device_attribute *attr,
++			       char *buf)
++{
++	struct led_classdev *led_cdev = dev_get_drvdata(dev);
++	struct ar8327_led *aled = led_cdev_to_ar8327_led(led_cdev);
++	ssize_t ret = 0;
++
++	ret += scnprintf(buf, PAGE_SIZE, "%d\n", aled->enable_hw_mode);
++
++	return ret;
++}
++
++static ssize_t
++ar8327_led_enable_hw_mode_store(struct device *dev,
++				struct device_attribute *attr,
++				const char *buf,
++				size_t size)
++{
++        struct led_classdev *led_cdev = dev_get_drvdata(dev);
++	struct ar8327_led *aled = led_cdev_to_ar8327_led(led_cdev);
++	u8 pattern;
++	u8 value;
++	int ret;
++
++	ret = kstrtou8(buf, 10, &value);
++	if (ret < 0)
++		return -EINVAL;
++
++	spin_lock(&aled->lock);
++
++	aled->enable_hw_mode = !!value;
++	if (aled->enable_hw_mode)
++		pattern = AR8327_LED_PATTERN_RULE;
++	else
++		pattern = AR8327_LED_PATTERN_OFF;
++
++	ar8327_led_schedule_change(aled, pattern);
++
++	spin_unlock(&aled->lock);
++
++	return size;
++}
++
++static DEVICE_ATTR(enable_hw_mode,  S_IRUGO | S_IWUSR,
++		   ar8327_led_enable_hw_mode_show,
++		   ar8327_led_enable_hw_mode_store);
++
++static int
++ar8327_led_register(struct ar8327_led *aled)
++{
++	int ret;
++
++	ret = led_classdev_register(NULL, &aled->cdev);
++	if (ret < 0)
++		return ret;
++
++	if (aled->mode == AR8327_LED_MODE_HW) {
++		ret = device_create_file(aled->cdev.dev,
++					 &dev_attr_enable_hw_mode);
++		if (ret)
++			goto err_unregister;
++	}
++
++	return 0;
++
++err_unregister:
++	led_classdev_unregister(&aled->cdev);
++	return ret;
++}
++
++static void
++ar8327_led_unregister(struct ar8327_led *aled)
++{
++	if (aled->mode == AR8327_LED_MODE_HW)
++		device_remove_file(aled->cdev.dev, &dev_attr_enable_hw_mode);
++
++	led_classdev_unregister(&aled->cdev);
++	cancel_work_sync(&aled->led_work);
++}
++
++static int
++ar8327_led_create(struct ar8xxx_priv *priv,
++		  const struct ar8327_led_info *led_info)
++{
++	struct ar8327_data *data = priv->chip_data;
++	struct ar8327_led *aled;
++	int ret;
++
++	if (!IS_ENABLED(CONFIG_AR8216_PHY_LEDS))
++		return 0;
++
++	if (!led_info->name)
++		return -EINVAL;
++
++	if (led_info->led_num >= AR8327_NUM_LEDS)
++		return -EINVAL;
++
++	aled = kzalloc(sizeof(*aled) + strlen(led_info->name) + 1,
++		       GFP_KERNEL);
++	if (!aled)
++		return -ENOMEM;
++
++	aled->sw_priv = priv;
++	aled->led_num = led_info->led_num;
++	aled->active_low = led_info->active_low;
++	aled->mode = led_info->mode;
++
++	if (aled->mode == AR8327_LED_MODE_HW)
++		aled->enable_hw_mode = true;
++
++	aled->name = (char *)(aled + 1);
++	strcpy(aled->name, led_info->name);
++
++	aled->cdev.name = aled->name;
++	aled->cdev.brightness_set = ar8327_led_set_brightness;
++	aled->cdev.blink_set = ar8327_led_blink_set;
++	aled->cdev.default_trigger = led_info->default_trigger;
++
++	spin_lock_init(&aled->lock);
++	mutex_init(&aled->mutex);
++	INIT_WORK(&aled->led_work, ar8327_led_work_func);
++
++	ret = ar8327_led_register(aled);
++	if (ret)
++		goto err_free;
++
++	data->leds[data->num_leds++] = aled;
++
++	return 0;
++
++err_free:
++	kfree(aled);
++	return ret;
++}
++
++static void
++ar8327_led_destroy(struct ar8327_led *aled)
++{
++	ar8327_led_unregister(aled);
++	kfree(aled);
++}
++
++static void
++ar8327_leds_init(struct ar8xxx_priv *priv)
++{
++	struct ar8327_data *data = priv->chip_data;
++	unsigned i;
++
++	if (!IS_ENABLED(CONFIG_AR8216_PHY_LEDS))
++		return;
++
++	for (i = 0; i < data->num_leds; i++) {
++		struct ar8327_led *aled;
++
++		aled = data->leds[i];
++
++		if (aled->enable_hw_mode)
++			aled->pattern = AR8327_LED_PATTERN_RULE;
++		else
++			aled->pattern = AR8327_LED_PATTERN_OFF;
++
++		ar8327_set_led_pattern(priv, aled->led_num, aled->pattern);
++	}
++}
++
++static void
++ar8327_leds_cleanup(struct ar8xxx_priv *priv)
++{
++	struct ar8327_data *data = priv->chip_data;
++	unsigned i;
++
++	if (!IS_ENABLED(CONFIG_AR8216_PHY_LEDS))
++		return;
++
++	for (i = 0; i < data->num_leds; i++) {
++		struct ar8327_led *aled;
++
++		aled = data->leds[i];
++		ar8327_led_destroy(aled);
++	}
++
++	kfree(data->leds);
++}
++
++static int
++ar8327_hw_config_pdata(struct ar8xxx_priv *priv,
++		       struct ar8327_platform_data *pdata)
++{
++	struct ar8327_led_cfg *led_cfg;
++	struct ar8327_data *data = priv->chip_data;
++	u32 pos, new_pos;
++	u32 t;
++
++	if (!pdata)
++		return -EINVAL;
++
++	priv->get_port_link = pdata->get_port_link;
++
++	data->port0_status = ar8327_get_port_init_status(&pdata->port0_cfg);
++	data->port6_status = ar8327_get_port_init_status(&pdata->port6_cfg);
++
++	t = ar8327_get_pad_cfg(pdata->pad0_cfg);
++	if (chip_is_ar8337(priv) && !pdata->pad0_cfg->mac06_exchange_dis)
++	    t |= AR8337_PAD_MAC06_EXCHANGE_EN;
++	ar8xxx_write(priv, AR8327_REG_PAD0_MODE, t);
++
++	t = ar8327_get_pad_cfg(pdata->pad5_cfg);
++	ar8xxx_write(priv, AR8327_REG_PAD5_MODE, t);
++	t = ar8327_get_pad_cfg(pdata->pad6_cfg);
++	ar8xxx_write(priv, AR8327_REG_PAD6_MODE, t);
++
++	pos = ar8xxx_read(priv, AR8327_REG_POWER_ON_STRAP);
++	new_pos = pos;
++
++	led_cfg = pdata->led_cfg;
++	if (led_cfg) {
++		if (led_cfg->open_drain)
++			new_pos |= AR8327_POWER_ON_STRAP_LED_OPEN_EN;
++		else
++			new_pos &= ~AR8327_POWER_ON_STRAP_LED_OPEN_EN;
++
++		ar8xxx_write(priv, AR8327_REG_LED_CTRL0, led_cfg->led_ctrl0);
++		ar8xxx_write(priv, AR8327_REG_LED_CTRL1, led_cfg->led_ctrl1);
++		ar8xxx_write(priv, AR8327_REG_LED_CTRL2, led_cfg->led_ctrl2);
++		ar8xxx_write(priv, AR8327_REG_LED_CTRL3, led_cfg->led_ctrl3);
++
++		if (new_pos != pos)
++			new_pos |= AR8327_POWER_ON_STRAP_POWER_ON_SEL;
++	}
++
++	if (pdata->sgmii_cfg) {
++		t = pdata->sgmii_cfg->sgmii_ctrl;
++		if (priv->chip_rev == 1)
++			t |= AR8327_SGMII_CTRL_EN_PLL |
++			     AR8327_SGMII_CTRL_EN_RX |
++			     AR8327_SGMII_CTRL_EN_TX;
++		else
++			t &= ~(AR8327_SGMII_CTRL_EN_PLL |
++			       AR8327_SGMII_CTRL_EN_RX |
++			       AR8327_SGMII_CTRL_EN_TX);
++
++		ar8xxx_write(priv, AR8327_REG_SGMII_CTRL, t);
++
++		if (pdata->sgmii_cfg->serdes_aen)
++			new_pos &= ~AR8327_POWER_ON_STRAP_SERDES_AEN;
++		else
++			new_pos |= AR8327_POWER_ON_STRAP_SERDES_AEN;
++	}
++
++	ar8xxx_write(priv, AR8327_REG_POWER_ON_STRAP, new_pos);
++
++	if (pdata->leds && pdata->num_leds) {
++		int i;
++
++		data->leds = kzalloc(pdata->num_leds * sizeof(void *),
++				     GFP_KERNEL);
++		if (!data->leds)
++			return -ENOMEM;
++
++		for (i = 0; i < pdata->num_leds; i++)
++			ar8327_led_create(priv, &pdata->leds[i]);
++	}
++
++	return 0;
++}
++
++#ifdef CONFIG_OF
++static int
++ar8327_hw_config_of(struct ar8xxx_priv *priv, struct device_node *np)
++{
++	struct ar8327_data *data = priv->chip_data;
++	const __be32 *paddr;
++	int len;
++	int i;
++
++	paddr = of_get_property(np, "qca,ar8327-initvals", &len);
++	if (!paddr || len < (2 * sizeof(*paddr)))
++		return -EINVAL;
++
++	len /= sizeof(*paddr);
++
++	for (i = 0; i < len - 1; i += 2) {
++		u32 reg;
++		u32 val;
++
++		reg = be32_to_cpup(paddr + i);
++		val = be32_to_cpup(paddr + i + 1);
++
++		switch (reg) {
++		case AR8327_REG_PORT_STATUS(0):
++			data->port0_status = val;
++			break;
++		case AR8327_REG_PORT_STATUS(6):
++			data->port6_status = val;
++			break;
++		default:
++			ar8xxx_write(priv, reg, val);
++			break;
++		}
++	}
++
++	return 0;
++}
++#else
++static inline int
++ar8327_hw_config_of(struct ar8xxx_priv *priv, struct device_node *np)
++{
++	return -EINVAL;
++}
++#endif
++
++static int
++ar8327_hw_init(struct ar8xxx_priv *priv)
++{
++	int ret;
++
++	priv->chip_data = kzalloc(sizeof(struct ar8327_data), GFP_KERNEL);
++	if (!priv->chip_data)
++		return -ENOMEM;
++
++	if (priv->pdev->of_node)
++		ret = ar8327_hw_config_of(priv, priv->pdev->of_node);
++	else
++		ret = ar8327_hw_config_pdata(priv,
++					     priv->phy->mdio.dev.platform_data);
++
++	if (ret)
++		return ret;
++
++	ar8327_leds_init(priv);
++
++	ar8xxx_phy_init(priv);
++
++	return 0;
++}
++
++static void
++ar8327_cleanup(struct ar8xxx_priv *priv)
++{
++	ar8327_leds_cleanup(priv);
++}
++
++static void
++ar8327_init_globals(struct ar8xxx_priv *priv)
++{
++	struct ar8327_data *data = priv->chip_data;
++	u32 t;
++	int i;
++
++	/* enable CPU port and disable mirror port */
++	t = AR8327_FWD_CTRL0_CPU_PORT_EN |
++	    AR8327_FWD_CTRL0_MIRROR_PORT;
++	ar8xxx_write(priv, AR8327_REG_FWD_CTRL0, t);
++
++	/* forward multicast and broadcast frames to CPU */
++	t = (AR8327_PORTS_ALL << AR8327_FWD_CTRL1_UC_FLOOD_S) |
++	    (AR8327_PORTS_ALL << AR8327_FWD_CTRL1_MC_FLOOD_S) |
++	    (AR8327_PORTS_ALL << AR8327_FWD_CTRL1_BC_FLOOD_S);
++	ar8xxx_write(priv, AR8327_REG_FWD_CTRL1, t);
++
++	/* enable jumbo frames */
++	ar8xxx_rmw(priv, AR8327_REG_MAX_FRAME_SIZE,
++		   AR8327_MAX_FRAME_SIZE_MTU, 9018 + 8 + 2);
++
++	/* Enable MIB counters */
++	ar8xxx_reg_set(priv, AR8327_REG_MODULE_EN,
++		       AR8327_MODULE_EN_MIB);
++
++	/* Disable EEE on all phy's due to stability issues */
++	for (i = 0; i < AR8XXX_NUM_PHYS; i++)
++		data->eee[i] = false;
++}
++
++static void
++ar8327_init_port(struct ar8xxx_priv *priv, int port)
++{
++	struct ar8327_data *data = priv->chip_data;
++	u32 t;
++
++	if (port == AR8216_PORT_CPU)
++		t = data->port0_status;
++	else if (port == 6)
++		t = data->port6_status;
++	else
++		t = AR8216_PORT_STATUS_LINK_AUTO;
++
++	if (port != AR8216_PORT_CPU && port != 6) {
++		/*hw limitation:if configure mac when there is traffic,
++		port MAC may work abnormal. Need disable lan&wan mac at fisrt*/
++		ar8xxx_write(priv, AR8327_REG_PORT_STATUS(port), 0);
++		msleep(100);
++		t |= AR8216_PORT_STATUS_FLOW_CONTROL;
++		ar8xxx_write(priv, AR8327_REG_PORT_STATUS(port), t);
++	} else {
++		ar8xxx_write(priv, AR8327_REG_PORT_STATUS(port), t);
++	}
++
++	ar8xxx_write(priv, AR8327_REG_PORT_HEADER(port), 0);
++
++	ar8xxx_write(priv, AR8327_REG_PORT_VLAN0(port), 0);
++
++	t = AR8327_PORT_VLAN1_OUT_MODE_UNTOUCH << AR8327_PORT_VLAN1_OUT_MODE_S;
++	ar8xxx_write(priv, AR8327_REG_PORT_VLAN1(port), t);
++
++	t = AR8327_PORT_LOOKUP_LEARN;
++	t |= AR8216_PORT_STATE_FORWARD << AR8327_PORT_LOOKUP_STATE_S;
++	ar8xxx_write(priv, AR8327_REG_PORT_LOOKUP(port), t);
++}
++
++static u32
++ar8327_read_port_status(struct ar8xxx_priv *priv, int port)
++{
++	u32 t;
++
++	t = ar8xxx_read(priv, AR8327_REG_PORT_STATUS(port));
++	/* map the flow control autoneg result bits to the flow control bits
++	 * used in forced mode to allow ar8216_read_port_link detect
++	 * flow control properly if autoneg is used
++	 */
++	if (t & AR8216_PORT_STATUS_LINK_UP &&
++	    t & AR8216_PORT_STATUS_LINK_AUTO) {
++		t &= ~(AR8216_PORT_STATUS_TXFLOW | AR8216_PORT_STATUS_RXFLOW);
++		if (t & AR8327_PORT_STATUS_TXFLOW_AUTO)
++			t |= AR8216_PORT_STATUS_TXFLOW;
++		if (t & AR8327_PORT_STATUS_RXFLOW_AUTO)
++			t |= AR8216_PORT_STATUS_RXFLOW;
++	}
++
++	return t;
++}
++
++static u32
++ar8327_read_port_eee_status(struct ar8xxx_priv *priv, int port)
++{
++	int phy;
++	u16 t;
++
++	if (port >= priv->dev.ports)
++		return 0;
++
++	if (port == 0 || port == 6)
++		return 0;
++
++	phy = port - 1;
++
++	/* EEE Ability Auto-negotiation Result */
++	t = ar8xxx_phy_mmd_read(priv, phy, 0x7, 0x8000);
++
++	return mmd_eee_adv_to_ethtool_adv_t(t);
++}
++
++static int
++ar8327_atu_flush(struct ar8xxx_priv *priv)
++{
++	int ret;
++
++	ret = ar8216_wait_bit(priv, AR8327_REG_ATU_FUNC,
++			      AR8327_ATU_FUNC_BUSY, 0);
++	if (!ret)
++		ar8xxx_write(priv, AR8327_REG_ATU_FUNC,
++			     AR8327_ATU_FUNC_OP_FLUSH |
++			     AR8327_ATU_FUNC_BUSY);
++
++	return ret;
++}
++
++static int
++ar8327_atu_flush_port(struct ar8xxx_priv *priv, int port)
++{
++	u32 t;
++	int ret;
++
++	ret = ar8216_wait_bit(priv, AR8327_REG_ATU_FUNC,
++			      AR8327_ATU_FUNC_BUSY, 0);
++	if (!ret) {
++		t = (port << AR8327_ATU_PORT_NUM_S);
++		t |= AR8327_ATU_FUNC_OP_FLUSH_PORT;
++		t |= AR8327_ATU_FUNC_BUSY;
++		ar8xxx_write(priv, AR8327_REG_ATU_FUNC, t);
++	}
++
++	return ret;
++}
++
++static int
++ar8327_get_port_igmp(struct ar8xxx_priv *priv, int port)
++{
++	u32 fwd_ctrl, frame_ack;
++
++	fwd_ctrl = (BIT(port) << AR8327_FWD_CTRL1_IGMP_S);
++	frame_ack = ((AR8327_FRAME_ACK_CTRL_IGMP_MLD |
++		      AR8327_FRAME_ACK_CTRL_IGMP_JOIN |
++		      AR8327_FRAME_ACK_CTRL_IGMP_LEAVE) <<
++		     AR8327_FRAME_ACK_CTRL_S(port));
++
++	return (ar8xxx_read(priv, AR8327_REG_FWD_CTRL1) &
++			fwd_ctrl) == fwd_ctrl &&
++		(ar8xxx_read(priv, AR8327_REG_FRAME_ACK_CTRL(port)) &
++			frame_ack) == frame_ack;
++}
++
++static void
++ar8327_set_port_igmp(struct ar8xxx_priv *priv, int port, int enable)
++{
++	int reg_frame_ack = AR8327_REG_FRAME_ACK_CTRL(port);
++	u32 val_frame_ack = (AR8327_FRAME_ACK_CTRL_IGMP_MLD |
++			  AR8327_FRAME_ACK_CTRL_IGMP_JOIN |
++			  AR8327_FRAME_ACK_CTRL_IGMP_LEAVE) <<
++			 AR8327_FRAME_ACK_CTRL_S(port);
++
++	if (enable) {
++		ar8xxx_rmw(priv, AR8327_REG_FWD_CTRL1,
++			   BIT(port) << AR8327_FWD_CTRL1_MC_FLOOD_S,
++			   BIT(port) << AR8327_FWD_CTRL1_IGMP_S);
++		ar8xxx_reg_set(priv, reg_frame_ack, val_frame_ack);
++	} else {
++		ar8xxx_rmw(priv, AR8327_REG_FWD_CTRL1,
++			   BIT(port) << AR8327_FWD_CTRL1_IGMP_S,
++			   BIT(port) << AR8327_FWD_CTRL1_MC_FLOOD_S);
++		ar8xxx_reg_clear(priv, reg_frame_ack, val_frame_ack);
++	}
++}
++
++static void
++ar8327_vtu_op(struct ar8xxx_priv *priv, u32 op, u32 val)
++{
++	if (ar8216_wait_bit(priv, AR8327_REG_VTU_FUNC1,
++			    AR8327_VTU_FUNC1_BUSY, 0))
++		return;
++
++	if ((op & AR8327_VTU_FUNC1_OP) == AR8327_VTU_FUNC1_OP_LOAD)
++		ar8xxx_write(priv, AR8327_REG_VTU_FUNC0, val);
++
++	op |= AR8327_VTU_FUNC1_BUSY;
++	ar8xxx_write(priv, AR8327_REG_VTU_FUNC1, op);
++}
++
++static void
++ar8327_vtu_flush(struct ar8xxx_priv *priv)
++{
++	ar8327_vtu_op(priv, AR8327_VTU_FUNC1_OP_FLUSH, 0);
++}
++
++static void
++ar8327_vtu_load_vlan(struct ar8xxx_priv *priv, u32 vid, u32 port_mask)
++{
++	u32 op;
++	u32 val;
++	int i;
++
++	op = AR8327_VTU_FUNC1_OP_LOAD | (vid << AR8327_VTU_FUNC1_VID_S);
++	val = AR8327_VTU_FUNC0_VALID | AR8327_VTU_FUNC0_IVL;
++	for (i = 0; i < AR8327_NUM_PORTS; i++) {
++		u32 mode;
++
++		if ((port_mask & BIT(i)) == 0)
++			mode = AR8327_VTU_FUNC0_EG_MODE_NOT;
++		else if (priv->vlan == 0)
++			mode = AR8327_VTU_FUNC0_EG_MODE_KEEP;
++		else if ((priv->vlan_tagged & BIT(i)) || (priv->vlan_id[priv->pvid[i]] != vid))
++			mode = AR8327_VTU_FUNC0_EG_MODE_TAG;
++		else
++			mode = AR8327_VTU_FUNC0_EG_MODE_UNTAG;
++
++		val |= mode << AR8327_VTU_FUNC0_EG_MODE_S(i);
++	}
++	ar8327_vtu_op(priv, op, val);
++}
++
++static void
++ar8327_setup_port(struct ar8xxx_priv *priv, int port, u32 members)
++{
++	u32 t;
++	u32 egress, ingress;
++	u32 pvid = priv->vlan_id[priv->pvid[port]];
++
++	if (priv->vlan) {
++		egress = AR8327_PORT_VLAN1_OUT_MODE_UNMOD;
++		ingress = AR8216_IN_SECURE;
++	} else {
++		egress = AR8327_PORT_VLAN1_OUT_MODE_UNTOUCH;
++		ingress = AR8216_IN_PORT_ONLY;
++	}
++
++	t = pvid << AR8327_PORT_VLAN0_DEF_SVID_S;
++	t |= pvid << AR8327_PORT_VLAN0_DEF_CVID_S;
++	if (priv->vlan && priv->port_vlan_prio[port]) {
++		u32 prio = priv->port_vlan_prio[port];
++
++		t |= prio << AR8327_PORT_VLAN0_DEF_SPRI_S;
++		t |= prio << AR8327_PORT_VLAN0_DEF_CPRI_S;
++	}
++	ar8xxx_write(priv, AR8327_REG_PORT_VLAN0(port), t);
++
++	t = AR8327_PORT_VLAN1_PORT_VLAN_PROP;
++	t |= egress << AR8327_PORT_VLAN1_OUT_MODE_S;
++	if (priv->vlan && priv->port_vlan_prio[port])
++		t |= AR8327_PORT_VLAN1_VLAN_PRI_PROP;
++
++	ar8xxx_write(priv, AR8327_REG_PORT_VLAN1(port), t);
++
++	t = members;
++	t |= AR8327_PORT_LOOKUP_LEARN;
++	t |= ingress << AR8327_PORT_LOOKUP_IN_MODE_S;
++	t |= AR8216_PORT_STATE_FORWARD << AR8327_PORT_LOOKUP_STATE_S;
++	ar8xxx_write(priv, AR8327_REG_PORT_LOOKUP(port), t);
++}
++
++static int
++ar8327_sw_get_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	u8 ports = priv->vlan_table[val->port_vlan];
++	int i;
++
++	val->len = 0;
++	for (i = 0; i < dev->ports; i++) {
++		struct switch_port *p;
++
++		if (!(ports & (1 << i)))
++			continue;
++
++		p = &val->value.ports[val->len++];
++		p->id = i;
++		if ((priv->vlan_tagged & (1 << i)) || (priv->pvid[i] != val->port_vlan))
++			p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
++		else
++			p->flags = 0;
++	}
++	return 0;
++}
++
++static int
++ar8327_sw_set_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	u8 *vt = &priv->vlan_table[val->port_vlan];
++	int i;
++
++	*vt = 0;
++	for (i = 0; i < val->len; i++) {
++		struct switch_port *p = &val->value.ports[i];
++
++		if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
++			if (val->port_vlan == priv->pvid[p->id]) {
++				priv->vlan_tagged |= (1 << p->id);
++			}
++		} else {
++			priv->vlan_tagged &= ~(1 << p->id);
++			priv->pvid[p->id] = val->port_vlan;
++		}
++
++		*vt |= 1 << p->id;
++	}
++	return 0;
++}
++
++static void
++ar8327_set_mirror_regs(struct ar8xxx_priv *priv)
++{
++	int port;
++
++	/* reset all mirror registers */
++	ar8xxx_rmw(priv, AR8327_REG_FWD_CTRL0,
++		   AR8327_FWD_CTRL0_MIRROR_PORT,
++		   (0xF << AR8327_FWD_CTRL0_MIRROR_PORT_S));
++	for (port = 0; port < AR8327_NUM_PORTS; port++) {
++		ar8xxx_reg_clear(priv, AR8327_REG_PORT_LOOKUP(port),
++			   AR8327_PORT_LOOKUP_ING_MIRROR_EN);
++
++		ar8xxx_reg_clear(priv, AR8327_REG_PORT_HOL_CTRL1(port),
++			   AR8327_PORT_HOL_CTRL1_EG_MIRROR_EN);
++	}
++
++	/* now enable mirroring if necessary */
++	if (priv->source_port >= AR8327_NUM_PORTS ||
++	    priv->monitor_port >= AR8327_NUM_PORTS ||
++	    priv->source_port == priv->monitor_port) {
++		return;
++	}
++
++	ar8xxx_rmw(priv, AR8327_REG_FWD_CTRL0,
++		   AR8327_FWD_CTRL0_MIRROR_PORT,
++		   (priv->monitor_port << AR8327_FWD_CTRL0_MIRROR_PORT_S));
++
++	if (priv->mirror_rx)
++		ar8xxx_reg_set(priv, AR8327_REG_PORT_LOOKUP(priv->source_port),
++			   AR8327_PORT_LOOKUP_ING_MIRROR_EN);
++
++	if (priv->mirror_tx)
++		ar8xxx_reg_set(priv, AR8327_REG_PORT_HOL_CTRL1(priv->source_port),
++			   AR8327_PORT_HOL_CTRL1_EG_MIRROR_EN);
++}
++
++static int
++ar8327_sw_set_eee(struct switch_dev *dev,
++		  const struct switch_attr *attr,
++		  struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	struct ar8327_data *data = priv->chip_data;
++	int port = val->port_vlan;
++	int phy;
++
++	if (port >= dev->ports)
++		return -EINVAL;
++	if (port == 0 || port == 6)
++		return -EOPNOTSUPP;
++
++	phy = port - 1;
++
++	data->eee[phy] = !!(val->value.i);
++
++	return 0;
++}
++
++static int
++ar8327_sw_get_eee(struct switch_dev *dev,
++		  const struct switch_attr *attr,
++		  struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	const struct ar8327_data *data = priv->chip_data;
++	int port = val->port_vlan;
++	int phy;
++
++	if (port >= dev->ports)
++		return -EINVAL;
++	if (port == 0 || port == 6)
++		return -EOPNOTSUPP;
++
++	phy = port - 1;
++
++	val->value.i = data->eee[phy];
++
++	return 0;
++}
++
++static void
++ar8327_wait_atu_ready(struct ar8xxx_priv *priv, u16 r2, u16 r1)
++{
++	int timeout = 20;
++
++	while (ar8xxx_mii_read32(priv, r2, r1) & AR8327_ATU_FUNC_BUSY && --timeout) {
++		udelay(10);
++		cond_resched();
++	}
++
++	if (!timeout)
++		pr_err("ar8327: timeout waiting for atu to become ready\n");
++}
++
++static void ar8327_get_arl_entry(struct ar8xxx_priv *priv,
++				 struct arl_entry *a, u32 *status, enum arl_op op)
++{
++	struct mii_bus *bus = priv->mii_bus;
++	u16 r2, page;
++	u16 r1_data0, r1_data1, r1_data2, r1_func;
++	u32 val0, val1, val2;
++
++	split_addr(AR8327_REG_ATU_DATA0, &r1_data0, &r2, &page);
++	r2 |= 0x10;
++
++	r1_data1 = (AR8327_REG_ATU_DATA1 >> 1) & 0x1e;
++	r1_data2 = (AR8327_REG_ATU_DATA2 >> 1) & 0x1e;
++	r1_func  = (AR8327_REG_ATU_FUNC >> 1) & 0x1e;
++
++	switch (op) {
++	case AR8XXX_ARL_INITIALIZE:
++		/* all ATU registers are on the same page
++		* therefore set page only once
++		*/
++		bus->write(bus, 0x18, 0, page);
++		wait_for_page_switch();
++
++		ar8327_wait_atu_ready(priv, r2, r1_func);
++
++		ar8xxx_mii_write32(priv, r2, r1_data0, 0);
++		ar8xxx_mii_write32(priv, r2, r1_data1, 0);
++		ar8xxx_mii_write32(priv, r2, r1_data2, 0);
++		break;
++	case AR8XXX_ARL_GET_NEXT:
++		ar8xxx_mii_write32(priv, r2, r1_func,
++				   AR8327_ATU_FUNC_OP_GET_NEXT |
++				   AR8327_ATU_FUNC_BUSY);
++		ar8327_wait_atu_ready(priv, r2, r1_func);
++
++		val0 = ar8xxx_mii_read32(priv, r2, r1_data0);
++		val1 = ar8xxx_mii_read32(priv, r2, r1_data1);
++		val2 = ar8xxx_mii_read32(priv, r2, r1_data2);
++
++		*status = val2 & AR8327_ATU_STATUS;
++		if (!*status)
++			break;
++
++		a->portmap = (val1 & AR8327_ATU_PORTS) >> AR8327_ATU_PORTS_S;
++		a->mac[0] = (val0 & AR8327_ATU_ADDR0) >> AR8327_ATU_ADDR0_S;
++		a->mac[1] = (val0 & AR8327_ATU_ADDR1) >> AR8327_ATU_ADDR1_S;
++		a->mac[2] = (val0 & AR8327_ATU_ADDR2) >> AR8327_ATU_ADDR2_S;
++		a->mac[3] = (val0 & AR8327_ATU_ADDR3) >> AR8327_ATU_ADDR3_S;
++		a->mac[4] = (val1 & AR8327_ATU_ADDR4) >> AR8327_ATU_ADDR4_S;
++		a->mac[5] = (val1 & AR8327_ATU_ADDR5) >> AR8327_ATU_ADDR5_S;
++		break;
++	}
++}
++
++static int
++ar8327_sw_hw_apply(struct switch_dev *dev)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	const struct ar8327_data *data = priv->chip_data;
++	int ret, i;
++
++	ret = ar8xxx_sw_hw_apply(dev);
++	if (ret)
++		return ret;
++
++	for (i=0; i < AR8XXX_NUM_PHYS; i++) {
++		if (data->eee[i])
++			ar8xxx_reg_clear(priv, AR8327_REG_EEE_CTRL,
++			       AR8327_EEE_CTRL_DISABLE_PHY(i));
++		else
++			ar8xxx_reg_set(priv, AR8327_REG_EEE_CTRL,
++			       AR8327_EEE_CTRL_DISABLE_PHY(i));
++	}
++
++	return 0;
++}
++
++int
++ar8327_sw_get_port_igmp_snooping(struct switch_dev *dev,
++				 const struct switch_attr *attr,
++				 struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	int port = val->port_vlan;
++
++	if (port >= dev->ports)
++		return -EINVAL;
++
++	mutex_lock(&priv->reg_mutex);
++	val->value.i = ar8327_get_port_igmp(priv, port);
++	mutex_unlock(&priv->reg_mutex);
++
++	return 0;
++}
++
++int
++ar8327_sw_set_port_igmp_snooping(struct switch_dev *dev,
++				 const struct switch_attr *attr,
++				 struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	int port = val->port_vlan;
++
++	if (port >= dev->ports)
++		return -EINVAL;
++
++	mutex_lock(&priv->reg_mutex);
++	ar8327_set_port_igmp(priv, port, val->value.i);
++	mutex_unlock(&priv->reg_mutex);
++
++	return 0;
++}
++
++int
++ar8327_sw_get_igmp_snooping(struct switch_dev *dev,
++			    const struct switch_attr *attr,
++			    struct switch_val *val)
++{
++	int port;
++
++	for (port = 0; port < dev->ports; port++) {
++		val->port_vlan = port;
++		if (ar8327_sw_get_port_igmp_snooping(dev, attr, val) ||
++		    !val->value.i)
++			break;
++	}
++
++	return 0;
++}
++
++int
++ar8327_sw_set_igmp_snooping(struct switch_dev *dev,
++			    const struct switch_attr *attr,
++			    struct switch_val *val)
++{
++	int port;
++
++	for (port = 0; port < dev->ports; port++) {
++		val->port_vlan = port;
++		if (ar8327_sw_set_port_igmp_snooping(dev, attr, val))
++			break;
++	}
++
++	return 0;
++}
++
++int
++ar8327_sw_get_igmp_v3(struct switch_dev *dev,
++		      const struct switch_attr *attr,
++		      struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	u32 val_reg;
++
++	mutex_lock(&priv->reg_mutex);
++	val_reg = ar8xxx_read(priv, AR8327_REG_FRAME_ACK_CTRL1);
++	val->value.i = ((val_reg & AR8327_FRAME_ACK_CTRL_IGMP_V3_EN) != 0);
++	mutex_unlock(&priv->reg_mutex);
++
++	return 0;
++}
++
++int
++ar8327_sw_set_igmp_v3(struct switch_dev *dev,
++		      const struct switch_attr *attr,
++		      struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++
++	mutex_lock(&priv->reg_mutex);
++	if (val->value.i)
++		ar8xxx_reg_set(priv, AR8327_REG_FRAME_ACK_CTRL1,
++			       AR8327_FRAME_ACK_CTRL_IGMP_V3_EN);
++	else
++		ar8xxx_reg_clear(priv, AR8327_REG_FRAME_ACK_CTRL1,
++				 AR8327_FRAME_ACK_CTRL_IGMP_V3_EN);
++	mutex_unlock(&priv->reg_mutex);
++
++	return 0;
++}
++
++static int
++ar8327_sw_set_port_vlan_prio(struct switch_dev *dev, const struct switch_attr *attr,
++			     struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	int port = val->port_vlan;
++
++	if (port >= dev->ports)
++		return -EINVAL;
++	if (port == 0 || port == 6)
++		return -EOPNOTSUPP;
++	if (val->value.i < 0 || val->value.i > 7)
++		return -EINVAL;
++
++	priv->port_vlan_prio[port] = val->value.i;
++
++	return 0;
++}
++
++static int
++ar8327_sw_get_port_vlan_prio(struct switch_dev *dev, const struct switch_attr *attr,
++                  struct switch_val *val)
++{
++	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
++	int port = val->port_vlan;
++
++	val->value.i = priv->port_vlan_prio[port];
++
++	return 0;
++}
++
++static const struct switch_attr ar8327_sw_attr_globals[] = {
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_vlan",
++		.description = "Enable VLAN mode",
++		.set = ar8xxx_sw_set_vlan,
++		.get = ar8xxx_sw_get_vlan,
++		.max = 1
++	},
++	{
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "reset_mibs",
++		.description = "Reset all MIB counters",
++		.set = ar8xxx_sw_set_reset_mibs,
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "ar8xxx_mib_poll_interval",
++		.description = "MIB polling interval in msecs (0 to disable)",
++		.set = ar8xxx_sw_set_mib_poll_interval,
++		.get = ar8xxx_sw_get_mib_poll_interval
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "ar8xxx_mib_type",
++		.description = "MIB type (0=basic 1=extended)",
++		.set = ar8xxx_sw_set_mib_type,
++		.get = ar8xxx_sw_get_mib_type
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_mirror_rx",
++		.description = "Enable mirroring of RX packets",
++		.set = ar8xxx_sw_set_mirror_rx_enable,
++		.get = ar8xxx_sw_get_mirror_rx_enable,
++		.max = 1
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_mirror_tx",
++		.description = "Enable mirroring of TX packets",
++		.set = ar8xxx_sw_set_mirror_tx_enable,
++		.get = ar8xxx_sw_get_mirror_tx_enable,
++		.max = 1
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "mirror_monitor_port",
++		.description = "Mirror monitor port",
++		.set = ar8xxx_sw_set_mirror_monitor_port,
++		.get = ar8xxx_sw_get_mirror_monitor_port,
++		.max = AR8327_NUM_PORTS - 1
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "mirror_source_port",
++		.description = "Mirror source port",
++		.set = ar8xxx_sw_set_mirror_source_port,
++		.get = ar8xxx_sw_get_mirror_source_port,
++		.max = AR8327_NUM_PORTS - 1
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "arl_age_time",
++		.description = "ARL age time (secs)",
++		.set = ar8xxx_sw_set_arl_age_time,
++		.get = ar8xxx_sw_get_arl_age_time,
++	},
++	{
++		.type = SWITCH_TYPE_STRING,
++		.name = "arl_table",
++		.description = "Get ARL table",
++		.set = NULL,
++		.get = ar8xxx_sw_get_arl_table,
++	},
++	{
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "flush_arl_table",
++		.description = "Flush ARL table",
++		.set = ar8xxx_sw_set_flush_arl_table,
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "igmp_snooping",
++		.description = "Enable IGMP Snooping",
++		.set = ar8327_sw_set_igmp_snooping,
++		.get = ar8327_sw_get_igmp_snooping,
++		.max = 1
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "igmp_v3",
++		.description = "Enable IGMPv3 support",
++		.set = ar8327_sw_set_igmp_v3,
++		.get = ar8327_sw_get_igmp_v3,
++		.max = 1
++	},
++};
++
++static const struct switch_attr ar8327_sw_attr_port[] = {
++	{
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "reset_mib",
++		.description = "Reset single port MIB counters",
++		.set = ar8xxx_sw_set_port_reset_mib,
++	},
++	{
++		.type = SWITCH_TYPE_STRING,
++		.name = "mib",
++		.description = "Get port's MIB counters",
++		.set = NULL,
++		.get = ar8xxx_sw_get_port_mib,
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_eee",
++		.description = "Enable EEE PHY sleep mode",
++		.set = ar8327_sw_set_eee,
++		.get = ar8327_sw_get_eee,
++		.max = 1,
++	},
++	{
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "flush_arl_table",
++		.description = "Flush port's ARL table entries",
++		.set = ar8xxx_sw_set_flush_port_arl_table,
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "igmp_snooping",
++		.description = "Enable port's IGMP Snooping",
++		.set = ar8327_sw_set_port_igmp_snooping,
++		.get = ar8327_sw_get_port_igmp_snooping,
++		.max = 1
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "vlan_prio",
++		.description = "Port VLAN default priority (VLAN PCP) (0-7)",
++		.set = ar8327_sw_set_port_vlan_prio,
++		.get = ar8327_sw_get_port_vlan_prio,
++		.max = 7,
++	},
++};
++
++static const struct switch_dev_ops ar8327_sw_ops = {
++	.attr_global = {
++		.attr = ar8327_sw_attr_globals,
++		.n_attr = ARRAY_SIZE(ar8327_sw_attr_globals),
++	},
++	.attr_port = {
++		.attr = ar8327_sw_attr_port,
++		.n_attr = ARRAY_SIZE(ar8327_sw_attr_port),
++	},
++	.attr_vlan = {
++		.attr = ar8xxx_sw_attr_vlan,
++		.n_attr = ARRAY_SIZE(ar8xxx_sw_attr_vlan),
++	},
++	.get_port_pvid = ar8xxx_sw_get_pvid,
++	.set_port_pvid = ar8xxx_sw_set_pvid,
++	.get_vlan_ports = ar8327_sw_get_ports,
++	.set_vlan_ports = ar8327_sw_set_ports,
++	.apply_config = ar8327_sw_hw_apply,
++	.reset_switch = ar8xxx_sw_reset_switch,
++	.get_port_link = ar8xxx_sw_get_port_link,
++	.get_port_stats = ar8xxx_sw_get_port_stats,
++};
++
++const struct ar8xxx_chip ar8327_chip = {
++	.caps = AR8XXX_CAP_GIGE | AR8XXX_CAP_MIB_COUNTERS,
++	.config_at_probe = true,
++	.mii_lo_first = true,
++
++	.name = "Atheros AR8327",
++	.ports = AR8327_NUM_PORTS,
++	.vlans = AR83X7_MAX_VLANS,
++	.swops = &ar8327_sw_ops,
++
++	.reg_port_stats_start = 0x1000,
++	.reg_port_stats_length = 0x100,
++	.reg_arl_ctrl = AR8327_REG_ARL_CTRL,
++
++	.hw_init = ar8327_hw_init,
++	.cleanup = ar8327_cleanup,
++	.init_globals = ar8327_init_globals,
++	.init_port = ar8327_init_port,
++	.setup_port = ar8327_setup_port,
++	.read_port_status = ar8327_read_port_status,
++	.read_port_eee_status = ar8327_read_port_eee_status,
++	.atu_flush = ar8327_atu_flush,
++	.atu_flush_port = ar8327_atu_flush_port,
++	.vtu_flush = ar8327_vtu_flush,
++	.vtu_load_vlan = ar8327_vtu_load_vlan,
++	.phy_fixup = ar8327_phy_fixup,
++	.set_mirror_regs = ar8327_set_mirror_regs,
++	.get_arl_entry = ar8327_get_arl_entry,
++	.sw_hw_apply = ar8327_sw_hw_apply,
++
++	.num_mibs = ARRAY_SIZE(ar8236_mibs),
++	.mib_decs = ar8236_mibs,
++	.mib_func = AR8327_REG_MIB_FUNC,
++	.mib_rxb_id = AR8236_MIB_RXB_ID,
++	.mib_txb_id = AR8236_MIB_TXB_ID,
++};
++
++const struct ar8xxx_chip ar8337_chip = {
++	.caps = AR8XXX_CAP_GIGE | AR8XXX_CAP_MIB_COUNTERS,
++	.config_at_probe = true,
++	.mii_lo_first = true,
++
++	.name = "Atheros AR8337",
++	.ports = AR8327_NUM_PORTS,
++	.vlans = AR83X7_MAX_VLANS,
++	.swops = &ar8327_sw_ops,
++
++	.reg_port_stats_start = 0x1000,
++	.reg_port_stats_length = 0x100,
++	.reg_arl_ctrl = AR8327_REG_ARL_CTRL,
++
++	.hw_init = ar8327_hw_init,
++	.cleanup = ar8327_cleanup,
++	.init_globals = ar8327_init_globals,
++	.init_port = ar8327_init_port,
++	.setup_port = ar8327_setup_port,
++	.read_port_status = ar8327_read_port_status,
++	.read_port_eee_status = ar8327_read_port_eee_status,
++	.atu_flush = ar8327_atu_flush,
++	.atu_flush_port = ar8327_atu_flush_port,
++	.vtu_flush = ar8327_vtu_flush,
++	.vtu_load_vlan = ar8327_vtu_load_vlan,
++	.phy_fixup = ar8327_phy_fixup,
++	.set_mirror_regs = ar8327_set_mirror_regs,
++	.get_arl_entry = ar8327_get_arl_entry,
++	.sw_hw_apply = ar8327_sw_hw_apply,
++	.phy_rgmii_set = ar8327_phy_rgmii_set,
++
++	.num_mibs = ARRAY_SIZE(ar8236_mibs),
++	.mib_decs = ar8236_mibs,
++	.mib_func = AR8327_REG_MIB_FUNC,
++	.mib_rxb_id = AR8236_MIB_RXB_ID,
++	.mib_txb_id = AR8236_MIB_TXB_ID,
++};
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/ar8327.h b/target/linux/generic/files-5.4/drivers/net/phy/ar8327.h
+new file mode 100644
+index 0000000000..088b288618
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/ar8327.h
+@@ -0,0 +1,333 @@
++/*
++ * ar8327.h: AR8216 switch driver
++ *
++ * Copyright (C) 2009 Felix Fietkau <nbd@nbd.name>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
++
++#ifndef __AR8327_H
++#define __AR8327_H
++
++#define AR8327_NUM_PORTS	7
++#define AR8327_NUM_LEDS		15
++#define AR8327_PORTS_ALL	0x7f
++#define AR8327_NUM_LED_CTRL_REGS	4
++
++#define AR8327_REG_MASK				0x000
++
++#define AR8327_REG_PAD0_MODE			0x004
++#define AR8327_REG_PAD5_MODE			0x008
++#define AR8327_REG_PAD6_MODE			0x00c
++#define   AR8327_PAD_MAC_MII_RXCLK_SEL		BIT(0)
++#define   AR8327_PAD_MAC_MII_TXCLK_SEL		BIT(1)
++#define   AR8327_PAD_MAC_MII_EN			BIT(2)
++#define   AR8327_PAD_MAC_GMII_RXCLK_SEL		BIT(4)
++#define   AR8327_PAD_MAC_GMII_TXCLK_SEL		BIT(5)
++#define   AR8327_PAD_MAC_GMII_EN		BIT(6)
++#define   AR8327_PAD_SGMII_EN			BIT(7)
++#define   AR8327_PAD_PHY_MII_RXCLK_SEL		BIT(8)
++#define   AR8327_PAD_PHY_MII_TXCLK_SEL		BIT(9)
++#define   AR8327_PAD_PHY_MII_EN			BIT(10)
++#define   AR8327_PAD_PHY_GMII_PIPE_RXCLK_SEL	BIT(11)
++#define   AR8327_PAD_PHY_GMII_RXCLK_SEL		BIT(12)
++#define   AR8327_PAD_PHY_GMII_TXCLK_SEL		BIT(13)
++#define   AR8327_PAD_PHY_GMII_EN		BIT(14)
++#define   AR8327_PAD_PHYX_GMII_EN		BIT(16)
++#define   AR8327_PAD_PHYX_RGMII_EN		BIT(17)
++#define   AR8327_PAD_PHYX_MII_EN		BIT(18)
++#define   AR8327_PAD_SGMII_DELAY_EN		BIT(19)
++#define   AR8327_PAD_RGMII_RXCLK_DELAY_SEL	BITS(20, 2)
++#define   AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S	20
++#define   AR8327_PAD_RGMII_TXCLK_DELAY_SEL	BITS(22, 2)
++#define   AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S	22
++#define   AR8327_PAD_RGMII_RXCLK_DELAY_EN	BIT(24)
++#define   AR8327_PAD_RGMII_TXCLK_DELAY_EN	BIT(25)
++#define   AR8327_PAD_RGMII_EN			BIT(26)
++
++#define AR8327_REG_POWER_ON_STRAP		0x010
++#define   AR8327_POWER_ON_STRAP_POWER_ON_SEL	BIT(31)
++#define   AR8327_POWER_ON_STRAP_LED_OPEN_EN	BIT(24)
++#define   AR8327_POWER_ON_STRAP_SERDES_AEN	BIT(7)
++
++#define AR8327_REG_INT_STATUS0			0x020
++#define   AR8327_INT0_VT_DONE			BIT(20)
++
++#define AR8327_REG_INT_STATUS1			0x024
++#define AR8327_REG_INT_MASK0			0x028
++#define AR8327_REG_INT_MASK1			0x02c
++
++#define AR8327_REG_MODULE_EN			0x030
++#define   AR8327_MODULE_EN_MIB			BIT(0)
++
++#define AR8327_REG_MIB_FUNC			0x034
++#define   AR8327_MIB_CPU_KEEP			BIT(20)
++
++#define AR8327_REG_SERVICE_TAG			0x048
++#define AR8327_REG_LED_CTRL(_i)			(0x050 + (_i) * 4)
++#define AR8327_REG_LED_CTRL0			0x050
++#define AR8327_REG_LED_CTRL1			0x054
++#define AR8327_REG_LED_CTRL2			0x058
++#define AR8327_REG_LED_CTRL3			0x05c
++#define AR8327_REG_MAC_ADDR0			0x060
++#define AR8327_REG_MAC_ADDR1			0x064
++
++#define AR8327_REG_MAX_FRAME_SIZE		0x078
++#define   AR8327_MAX_FRAME_SIZE_MTU		BITS(0, 14)
++
++#define AR8327_REG_PORT_STATUS(_i)		(0x07c + (_i) * 4)
++#define   AR8327_PORT_STATUS_TXFLOW_AUTO	BIT(10)
++#define   AR8327_PORT_STATUS_RXFLOW_AUTO	BIT(11)
++
++#define AR8327_REG_HEADER_CTRL			0x098
++#define AR8327_REG_PORT_HEADER(_i)		(0x09c + (_i) * 4)
++
++#define AR8327_REG_SGMII_CTRL			0x0e0
++#define   AR8327_SGMII_CTRL_EN_PLL		BIT(1)
++#define   AR8327_SGMII_CTRL_EN_RX		BIT(2)
++#define   AR8327_SGMII_CTRL_EN_TX		BIT(3)
++
++#define AR8327_REG_EEE_CTRL			0x100
++#define   AR8327_EEE_CTRL_DISABLE_PHY(_i)	BIT(4 + (_i) * 2)
++
++#define AR8327_REG_FRAME_ACK_CTRL0		0x210
++#define   AR8327_FRAME_ACK_CTRL_IGMP_MLD_EN0	BIT(0)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_JOIN_EN0	BIT(1)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_LEAVE_EN0	BIT(2)
++#define   AR8327_FRAME_ACK_CTRL_EAPOL_EN0	BIT(3)
++#define   AR8327_FRAME_ACK_CTRL_DHCP_EN0	BIT(4)
++#define   AR8327_FRAME_ACK_CTRL_ARP_ACK_EN0	BIT(5)
++#define   AR8327_FRAME_ACK_CTRL_ARP_REQ_EN0	BIT(6)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_MLD_EN1	BIT(8)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_JOIN_EN1	BIT(9)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_LEAVE_EN1	BIT(10)
++#define   AR8327_FRAME_ACK_CTRL_EAPOL_EN1	BIT(11)
++#define   AR8327_FRAME_ACK_CTRL_DHCP_EN1	BIT(12)
++#define   AR8327_FRAME_ACK_CTRL_ARP_ACK_EN1	BIT(13)
++#define   AR8327_FRAME_ACK_CTRL_ARP_REQ_EN1	BIT(14)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_MLD_EN2	BIT(16)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_JOIN_EN2	BIT(17)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_LEAVE_EN2	BIT(18)
++#define   AR8327_FRAME_ACK_CTRL_EAPOL_EN2	BIT(19)
++#define   AR8327_FRAME_ACK_CTRL_DHCP_EN2	BIT(20)
++#define   AR8327_FRAME_ACK_CTRL_ARP_ACK_EN2	BIT(21)
++#define   AR8327_FRAME_ACK_CTRL_ARP_REQ_EN2	BIT(22)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_MLD_EN3	BIT(24)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_JOIN_EN3	BIT(25)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_LEAVE_EN3	BIT(26)
++#define   AR8327_FRAME_ACK_CTRL_EAPOL_EN3	BIT(27)
++#define   AR8327_FRAME_ACK_CTRL_DHCP_EN3	BIT(28)
++#define   AR8327_FRAME_ACK_CTRL_ARP_ACK_EN3	BIT(29)
++#define   AR8327_FRAME_ACK_CTRL_ARP_REQ_EN3	BIT(30)
++
++#define AR8327_REG_FRAME_ACK_CTRL1		0x214
++#define   AR8327_FRAME_ACK_CTRL_IGMP_MLD_EN4	BIT(0)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_JOIN_EN4	BIT(1)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_LEAVE_EN4	BIT(2)
++#define   AR8327_FRAME_ACK_CTRL_EAPOL_EN4	BIT(3)
++#define   AR8327_FRAME_ACK_CTRL_DHCP_EN4	BIT(4)
++#define   AR8327_FRAME_ACK_CTRL_ARP_ACK_EN4	BIT(5)
++#define   AR8327_FRAME_ACK_CTRL_ARP_REQ_EN4	BIT(6)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_MLD_EN5	BIT(8)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_JOIN_EN5	BIT(9)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_LEAVE_EN5	BIT(10)
++#define   AR8327_FRAME_ACK_CTRL_EAPOL_EN5	BIT(11)
++#define   AR8327_FRAME_ACK_CTRL_DHCP_EN5	BIT(12)
++#define   AR8327_FRAME_ACK_CTRL_ARP_ACK_EN5	BIT(13)
++#define   AR8327_FRAME_ACK_CTRL_ARP_REQ_EN5	BIT(14)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_MLD_EN6	BIT(16)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_JOIN_EN6	BIT(17)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_LEAVE_EN6	BIT(18)
++#define   AR8327_FRAME_ACK_CTRL_EAPOL_EN6	BIT(19)
++#define   AR8327_FRAME_ACK_CTRL_DHCP_EN6	BIT(20)
++#define   AR8327_FRAME_ACK_CTRL_ARP_ACK_EN6	BIT(21)
++#define   AR8327_FRAME_ACK_CTRL_ARP_REQ_EN6	BIT(22)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_V3_EN	BIT(24)
++#define   AR8327_FRAME_ACK_CTRL_PPPOE_EN	BIT(25)
++
++#define AR8327_REG_FRAME_ACK_CTRL(_i)		(0x210 + ((_i) / 4) * 0x4)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_MLD	BIT(0)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_JOIN	BIT(1)
++#define   AR8327_FRAME_ACK_CTRL_IGMP_LEAVE	BIT(2)
++#define   AR8327_FRAME_ACK_CTRL_EAPOL		BIT(3)
++#define   AR8327_FRAME_ACK_CTRL_DHCP		BIT(4)
++#define   AR8327_FRAME_ACK_CTRL_ARP_ACK		BIT(5)
++#define   AR8327_FRAME_ACK_CTRL_ARP_REQ		BIT(6)
++#define   AR8327_FRAME_ACK_CTRL_S(_i)		(((_i) % 4) * 8)
++
++#define AR8327_REG_PORT_VLAN0(_i)		(0x420 + (_i) * 0x8)
++#define   AR8327_PORT_VLAN0_DEF_PRI_MASK	BITS(0, 3)
++#define   AR8327_PORT_VLAN0_DEF_SVID		BITS(0, 12)
++#define   AR8327_PORT_VLAN0_DEF_SVID_S		0
++#define   AR8327_PORT_VLAN0_DEF_SPRI		BITS(13, 3)
++#define   AR8327_PORT_VLAN0_DEF_SPRI_S		13
++#define   AR8327_PORT_VLAN0_DEF_CVID		BITS(16, 12)
++#define   AR8327_PORT_VLAN0_DEF_CVID_S		16
++#define   AR8327_PORT_VLAN0_DEF_CPRI		BITS(29, 3)
++#define   AR8327_PORT_VLAN0_DEF_CPRI_S		29
++
++#define AR8327_REG_PORT_VLAN1(_i)		(0x424 + (_i) * 0x8)
++#define   AR8327_PORT_VLAN1_VLAN_PRI_PROP	BIT(4)
++#define   AR8327_PORT_VLAN1_PORT_VLAN_PROP	BIT(6)
++#define   AR8327_PORT_VLAN1_OUT_MODE		BITS(12, 2)
++#define   AR8327_PORT_VLAN1_OUT_MODE_S		12
++#define   AR8327_PORT_VLAN1_OUT_MODE_UNMOD	0
++#define   AR8327_PORT_VLAN1_OUT_MODE_UNTAG	1
++#define   AR8327_PORT_VLAN1_OUT_MODE_TAG	2
++#define   AR8327_PORT_VLAN1_OUT_MODE_UNTOUCH	3
++
++#define AR8327_REG_ATU_DATA0			0x600
++#define   AR8327_ATU_ADDR0			BITS(0, 8)
++#define   AR8327_ATU_ADDR0_S			0
++#define   AR8327_ATU_ADDR1			BITS(8, 8)
++#define   AR8327_ATU_ADDR1_S			8
++#define   AR8327_ATU_ADDR2			BITS(16, 8)
++#define   AR8327_ATU_ADDR2_S			16
++#define   AR8327_ATU_ADDR3			BITS(24, 8)
++#define   AR8327_ATU_ADDR3_S			24
++#define AR8327_REG_ATU_DATA1			0x604
++#define   AR8327_ATU_ADDR4			BITS(0, 8)
++#define   AR8327_ATU_ADDR4_S			0
++#define   AR8327_ATU_ADDR5			BITS(8, 8)
++#define   AR8327_ATU_ADDR5_S			8
++#define   AR8327_ATU_PORTS			BITS(16, 7)
++#define   AR8327_ATU_PORTS_S			16
++#define   AR8327_ATU_PORT0			BIT(16)
++#define   AR8327_ATU_PORT1			BIT(17)
++#define   AR8327_ATU_PORT2			BIT(18)
++#define   AR8327_ATU_PORT3			BIT(19)
++#define   AR8327_ATU_PORT4			BIT(20)
++#define   AR8327_ATU_PORT5			BIT(21)
++#define   AR8327_ATU_PORT6			BIT(22)
++#define AR8327_REG_ATU_DATA2			0x608
++#define   AR8327_ATU_STATUS			BITS(0, 4)
++
++#define AR8327_REG_ATU_FUNC			0x60c
++#define   AR8327_ATU_FUNC_OP			BITS(0, 4)
++#define   AR8327_ATU_FUNC_OP_NOOP		0x0
++#define   AR8327_ATU_FUNC_OP_FLUSH		0x1
++#define   AR8327_ATU_FUNC_OP_LOAD		0x2
++#define   AR8327_ATU_FUNC_OP_PURGE		0x3
++#define   AR8327_ATU_FUNC_OP_FLUSH_UNLOCKED	0x4
++#define   AR8327_ATU_FUNC_OP_FLUSH_PORT		0x5
++#define   AR8327_ATU_FUNC_OP_GET_NEXT		0x6
++#define   AR8327_ATU_FUNC_OP_SEARCH_MAC		0x7
++#define   AR8327_ATU_FUNC_OP_CHANGE_TRUNK	0x8
++#define   AR8327_ATU_PORT_NUM			BITS(8, 4)
++#define   AR8327_ATU_PORT_NUM_S			8
++#define   AR8327_ATU_FUNC_BUSY			BIT(31)
++
++#define AR8327_REG_VTU_FUNC0			0x0610
++#define   AR8327_VTU_FUNC0_EG_MODE		BITS(4, 14)
++#define   AR8327_VTU_FUNC0_EG_MODE_S(_i)	(4 + (_i) * 2)
++#define   AR8327_VTU_FUNC0_EG_MODE_KEEP		0
++#define   AR8327_VTU_FUNC0_EG_MODE_UNTAG	1
++#define   AR8327_VTU_FUNC0_EG_MODE_TAG		2
++#define   AR8327_VTU_FUNC0_EG_MODE_NOT		3
++#define   AR8327_VTU_FUNC0_IVL			BIT(19)
++#define   AR8327_VTU_FUNC0_VALID		BIT(20)
++
++#define AR8327_REG_VTU_FUNC1			0x0614
++#define   AR8327_VTU_FUNC1_OP			BITS(0, 3)
++#define   AR8327_VTU_FUNC1_OP_NOOP		0
++#define   AR8327_VTU_FUNC1_OP_FLUSH		1
++#define   AR8327_VTU_FUNC1_OP_LOAD		2
++#define   AR8327_VTU_FUNC1_OP_PURGE		3
++#define   AR8327_VTU_FUNC1_OP_REMOVE_PORT	4
++#define   AR8327_VTU_FUNC1_OP_GET_NEXT		5
++#define   AR8327_VTU_FUNC1_OP_GET_ONE		6
++#define   AR8327_VTU_FUNC1_FULL			BIT(4)
++#define   AR8327_VTU_FUNC1_PORT			BIT(8, 4)
++#define   AR8327_VTU_FUNC1_PORT_S		8
++#define   AR8327_VTU_FUNC1_VID			BIT(16, 12)
++#define   AR8327_VTU_FUNC1_VID_S		16
++#define   AR8327_VTU_FUNC1_BUSY			BIT(31)
++
++#define AR8327_REG_ARL_CTRL			0x0618
++
++#define AR8327_REG_FWD_CTRL0			0x620
++#define   AR8327_FWD_CTRL0_CPU_PORT_EN		BIT(10)
++#define   AR8327_FWD_CTRL0_MIRROR_PORT		BITS(4, 4)
++#define   AR8327_FWD_CTRL0_MIRROR_PORT_S	4
++
++#define AR8327_REG_FWD_CTRL1			0x624
++#define   AR8327_FWD_CTRL1_UC_FLOOD		BITS(0, 7)
++#define   AR8327_FWD_CTRL1_UC_FLOOD_S		0
++#define   AR8327_FWD_CTRL1_MC_FLOOD		BITS(8, 7)
++#define   AR8327_FWD_CTRL1_MC_FLOOD_S		8
++#define   AR8327_FWD_CTRL1_BC_FLOOD		BITS(16, 7)
++#define   AR8327_FWD_CTRL1_BC_FLOOD_S		16
++#define   AR8327_FWD_CTRL1_IGMP			BITS(24, 7)
++#define   AR8327_FWD_CTRL1_IGMP_S		24
++
++#define AR8327_REG_PORT_LOOKUP(_i)		(0x660 + (_i) * 0xc)
++#define   AR8327_PORT_LOOKUP_MEMBER		BITS(0, 7)
++#define   AR8327_PORT_LOOKUP_IN_MODE		BITS(8, 2)
++#define   AR8327_PORT_LOOKUP_IN_MODE_S		8
++#define   AR8327_PORT_LOOKUP_STATE		BITS(16, 3)
++#define   AR8327_PORT_LOOKUP_STATE_S		16
++#define   AR8327_PORT_LOOKUP_LEARN		BIT(20)
++#define   AR8327_PORT_LOOKUP_ING_MIRROR_EN	BIT(25)
++
++#define AR8327_REG_PORT_PRIO(_i)		(0x664 + (_i) * 0xc)
++
++#define AR8327_REG_PORT_HOL_CTRL1(_i)		(0x974 + (_i) * 0x8)
++#define   AR8327_PORT_HOL_CTRL1_EG_MIRROR_EN	BIT(16)
++
++#define AR8337_PAD_MAC06_EXCHANGE_EN		BIT(31)
++
++#define AR8327_PHY_MODE_SEL			0x12
++#define   AR8327_PHY_MODE_SEL_RGMII		BIT(3)
++#define AR8327_PHY_TEST_CTRL			0x0
++#define   AR8327_PHY_TEST_CTRL_RGMII_RX_DELAY	BIT(15)
++#define AR8327_PHY_SYS_CTRL			0x5
++#define   AR8327_PHY_SYS_CTRL_RGMII_TX_DELAY	BIT(8)
++
++enum ar8327_led_pattern {
++	AR8327_LED_PATTERN_OFF = 0,
++	AR8327_LED_PATTERN_BLINK,
++	AR8327_LED_PATTERN_ON,
++	AR8327_LED_PATTERN_RULE,
++};
++
++struct ar8327_led_entry {
++	unsigned reg;
++	unsigned shift;
++};
++
++struct ar8327_led {
++	struct led_classdev cdev;
++	struct ar8xxx_priv *sw_priv;
++
++	char *name;
++	bool active_low;
++	u8 led_num;
++	enum ar8327_led_mode mode;
++
++	struct mutex mutex;
++	spinlock_t lock;
++	struct work_struct led_work;
++	bool enable_hw_mode;
++	enum ar8327_led_pattern pattern;
++};
++
++struct ar8327_data {
++	u32 port0_status;
++	u32 port6_status;
++
++	struct ar8327_led **leds;
++	unsigned int num_leds;
++
++	/* all fields below are cleared on reset */
++	bool eee[AR8XXX_NUM_PHYS];
++};
++
++#endif
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/b53/Kconfig b/target/linux/generic/files-5.4/drivers/net/phy/b53/Kconfig
+new file mode 100644
+index 0000000000..08287e7adf
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/b53/Kconfig
+@@ -0,0 +1,37 @@
++menuconfig SWCONFIG_B53
++	tristate "Broadcom bcm53xx managed switch support"
++	depends on SWCONFIG
++	help
++	  This driver adds support for Broadcom managed switch chips. It supports
++	  BCM5325E, BCM5365, BCM539x, BCM53115 and BCM53125 as well as BCM63XX
++	  integrated switches.
++
++config SWCONFIG_B53_SPI_DRIVER
++	tristate "B53 SPI connected switch driver"
++	depends on SWCONFIG_B53 && SPI
++	help
++	  Select to enable support for registering switches configured through SPI.
++
++config SWCONFIG_B53_PHY_DRIVER
++	tristate "B53 MDIO connected switch driver"
++	depends on SWCONFIG_B53
++	select SWCONFIG_B53_PHY_FIXUP
++	help
++	  Select to enable support for registering switches configured through MDIO.
++
++config SWCONFIG_B53_MMAP_DRIVER
++	tristate "B53 MMAP connected switch driver"
++	depends on SWCONFIG_B53
++	help
++	  Select to enable support for memory-mapped switches like the BCM63XX
++	  integrated switches.
++
++config SWCONFIG_B53_SRAB_DRIVER
++	tristate "B53 SRAB connected switch driver"
++	depends on SWCONFIG_B53
++	help
++	  Select to enable support for memory-mapped Switch Register Access
++	  Bridge Registers (SRAB) like it is found on the BCM53010
++
++config SWCONFIG_B53_PHY_FIXUP
++	bool
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/b53/Makefile b/target/linux/generic/files-5.4/drivers/net/phy/b53/Makefile
+new file mode 100644
+index 0000000000..13ff366448
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/b53/Makefile
+@@ -0,0 +1,10 @@
++obj-$(CONFIG_SWCONFIG_B53)		+= b53_common.o
++
++obj-$(CONFIG_SWCONFIG_B53_PHY_FIXUP)	+= b53_phy_fixup.o
++
++obj-$(CONFIG_SWCONFIG_B53_MMAP_DRIVER)	+= b53_mmap.o
++obj-$(CONFIG_SWCONFIG_B53_SRAB_DRIVER)	+= b53_srab.o
++obj-$(CONFIG_SWCONFIG_B53_PHY_DRIVER)	+= b53_mdio.o
++obj-$(CONFIG_SWCONFIG_B53_SPI_DRIVER)	+= b53_spi.o
++
++ccflags-y				+= -Werror
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_common.c b/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_common.c
+new file mode 100644
+index 0000000000..030c5c86d6
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_common.c
+@@ -0,0 +1,1730 @@
++/*
++ * B53 switch driver main logic
++ *
++ * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org>
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
++
++#include <linux/delay.h>
++#include <linux/export.h>
++#include <linux/gpio.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/switch.h>
++#include <linux/phy.h>
++#include <linux/of.h>
++#include <linux/of_net.h>
++#include <linux/platform_data/b53.h>
++
++#include "b53_regs.h"
++#include "b53_priv.h"
++
++/* buffer size needed for displaying all MIBs with max'd values */
++#define B53_BUF_SIZE	1188
++
++struct b53_mib_desc {
++	u8 size;
++	u8 offset;
++	const char *name;
++};
++
++/* BCM5365 MIB counters */
++static const struct b53_mib_desc b53_mibs_65[] = {
++	{ 8, 0x00, "TxOctets" },
++	{ 4, 0x08, "TxDropPkts" },
++	{ 4, 0x10, "TxBroadcastPkts" },
++	{ 4, 0x14, "TxMulticastPkts" },
++	{ 4, 0x18, "TxUnicastPkts" },
++	{ 4, 0x1c, "TxCollisions" },
++	{ 4, 0x20, "TxSingleCollision" },
++	{ 4, 0x24, "TxMultipleCollision" },
++	{ 4, 0x28, "TxDeferredTransmit" },
++	{ 4, 0x2c, "TxLateCollision" },
++	{ 4, 0x30, "TxExcessiveCollision" },
++	{ 4, 0x38, "TxPausePkts" },
++	{ 8, 0x44, "RxOctets" },
++	{ 4, 0x4c, "RxUndersizePkts" },
++	{ 4, 0x50, "RxPausePkts" },
++	{ 4, 0x54, "Pkts64Octets" },
++	{ 4, 0x58, "Pkts65to127Octets" },
++	{ 4, 0x5c, "Pkts128to255Octets" },
++	{ 4, 0x60, "Pkts256to511Octets" },
++	{ 4, 0x64, "Pkts512to1023Octets" },
++	{ 4, 0x68, "Pkts1024to1522Octets" },
++	{ 4, 0x6c, "RxOversizePkts" },
++	{ 4, 0x70, "RxJabbers" },
++	{ 4, 0x74, "RxAlignmentErrors" },
++	{ 4, 0x78, "RxFCSErrors" },
++	{ 8, 0x7c, "RxGoodOctets" },
++	{ 4, 0x84, "RxDropPkts" },
++	{ 4, 0x88, "RxUnicastPkts" },
++	{ 4, 0x8c, "RxMulticastPkts" },
++	{ 4, 0x90, "RxBroadcastPkts" },
++	{ 4, 0x94, "RxSAChanges" },
++	{ 4, 0x98, "RxFragments" },
++	{ },
++};
++
++#define B63XX_MIB_TXB_ID	0	/* TxOctets */
++#define B63XX_MIB_RXB_ID	14	/* RxOctets */
++
++/* BCM63xx MIB counters */
++static const struct b53_mib_desc b53_mibs_63xx[] = {
++	{ 8, 0x00, "TxOctets" },
++	{ 4, 0x08, "TxDropPkts" },
++	{ 4, 0x0c, "TxQoSPkts" },
++	{ 4, 0x10, "TxBroadcastPkts" },
++	{ 4, 0x14, "TxMulticastPkts" },
++	{ 4, 0x18, "TxUnicastPkts" },
++	{ 4, 0x1c, "TxCollisions" },
++	{ 4, 0x20, "TxSingleCollision" },
++	{ 4, 0x24, "TxMultipleCollision" },
++	{ 4, 0x28, "TxDeferredTransmit" },
++	{ 4, 0x2c, "TxLateCollision" },
++	{ 4, 0x30, "TxExcessiveCollision" },
++	{ 4, 0x38, "TxPausePkts" },
++	{ 8, 0x3c, "TxQoSOctets" },
++	{ 8, 0x44, "RxOctets" },
++	{ 4, 0x4c, "RxUndersizePkts" },
++	{ 4, 0x50, "RxPausePkts" },
++	{ 4, 0x54, "Pkts64Octets" },
++	{ 4, 0x58, "Pkts65to127Octets" },
++	{ 4, 0x5c, "Pkts128to255Octets" },
++	{ 4, 0x60, "Pkts256to511Octets" },
++	{ 4, 0x64, "Pkts512to1023Octets" },
++	{ 4, 0x68, "Pkts1024to1522Octets" },
++	{ 4, 0x6c, "RxOversizePkts" },
++	{ 4, 0x70, "RxJabbers" },
++	{ 4, 0x74, "RxAlignmentErrors" },
++	{ 4, 0x78, "RxFCSErrors" },
++	{ 8, 0x7c, "RxGoodOctets" },
++	{ 4, 0x84, "RxDropPkts" },
++	{ 4, 0x88, "RxUnicastPkts" },
++	{ 4, 0x8c, "RxMulticastPkts" },
++	{ 4, 0x90, "RxBroadcastPkts" },
++	{ 4, 0x94, "RxSAChanges" },
++	{ 4, 0x98, "RxFragments" },
++	{ 4, 0xa0, "RxSymbolErrors" },
++	{ 4, 0xa4, "RxQoSPkts" },
++	{ 8, 0xa8, "RxQoSOctets" },
++	{ 4, 0xb0, "Pkts1523to2047Octets" },
++	{ 4, 0xb4, "Pkts2048to4095Octets" },
++	{ 4, 0xb8, "Pkts4096to8191Octets" },
++	{ 4, 0xbc, "Pkts8192to9728Octets" },
++	{ 4, 0xc0, "RxDiscarded" },
++	{ }
++};
++
++#define B53XX_MIB_TXB_ID	0	/* TxOctets */
++#define B53XX_MIB_RXB_ID	12	/* RxOctets */
++
++/* MIB counters */
++static const struct b53_mib_desc b53_mibs[] = {
++	{ 8, 0x00, "TxOctets" },
++	{ 4, 0x08, "TxDropPkts" },
++	{ 4, 0x10, "TxBroadcastPkts" },
++	{ 4, 0x14, "TxMulticastPkts" },
++	{ 4, 0x18, "TxUnicastPkts" },
++	{ 4, 0x1c, "TxCollisions" },
++	{ 4, 0x20, "TxSingleCollision" },
++	{ 4, 0x24, "TxMultipleCollision" },
++	{ 4, 0x28, "TxDeferredTransmit" },
++	{ 4, 0x2c, "TxLateCollision" },
++	{ 4, 0x30, "TxExcessiveCollision" },
++	{ 4, 0x38, "TxPausePkts" },
++	{ 8, 0x50, "RxOctets" },
++	{ 4, 0x58, "RxUndersizePkts" },
++	{ 4, 0x5c, "RxPausePkts" },
++	{ 4, 0x60, "Pkts64Octets" },
++	{ 4, 0x64, "Pkts65to127Octets" },
++	{ 4, 0x68, "Pkts128to255Octets" },
++	{ 4, 0x6c, "Pkts256to511Octets" },
++	{ 4, 0x70, "Pkts512to1023Octets" },
++	{ 4, 0x74, "Pkts1024to1522Octets" },
++	{ 4, 0x78, "RxOversizePkts" },
++	{ 4, 0x7c, "RxJabbers" },
++	{ 4, 0x80, "RxAlignmentErrors" },
++	{ 4, 0x84, "RxFCSErrors" },
++	{ 8, 0x88, "RxGoodOctets" },
++	{ 4, 0x90, "RxDropPkts" },
++	{ 4, 0x94, "RxUnicastPkts" },
++	{ 4, 0x98, "RxMulticastPkts" },
++	{ 4, 0x9c, "RxBroadcastPkts" },
++	{ 4, 0xa0, "RxSAChanges" },
++	{ 4, 0xa4, "RxFragments" },
++	{ 4, 0xa8, "RxJumboPkts" },
++	{ 4, 0xac, "RxSymbolErrors" },
++	{ 4, 0xc0, "RxDiscarded" },
++	{ }
++};
++
++static int b53_do_vlan_op(struct b53_device *dev, u8 op)
++{
++	unsigned int i;
++
++	b53_write8(dev, B53_ARLIO_PAGE, dev->vta_regs[0], VTA_START_CMD | op);
++
++	for (i = 0; i < 10; i++) {
++		u8 vta;
++
++		b53_read8(dev, B53_ARLIO_PAGE, dev->vta_regs[0], &vta);
++		if (!(vta & VTA_START_CMD))
++			return 0;
++
++		usleep_range(100, 200);
++	}
++
++	return -EIO;
++}
++
++static void b53_set_vlan_entry(struct b53_device *dev, u16 vid, u16 members,
++			       u16 untag)
++{
++	if (is5325(dev)) {
++		u32 entry = 0;
++
++		if (members) {
++			entry = ((untag & VA_UNTAG_MASK_25) << VA_UNTAG_S_25) |
++				members;
++			if (dev->core_rev >= 3)
++				entry |= VA_VALID_25_R4 | vid << VA_VID_HIGH_S;
++			else
++				entry |= VA_VALID_25;
++		}
++
++		b53_write32(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_25, entry);
++		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, vid |
++			    VTA_RW_STATE_WR | VTA_RW_OP_EN);
++	} else if (is5365(dev)) {
++		u16 entry = 0;
++
++		if (members)
++			entry = ((untag & VA_UNTAG_MASK_65) << VA_UNTAG_S_65) |
++				members | VA_VALID_65;
++
++		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_65, entry);
++		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_65, vid |
++			    VTA_RW_STATE_WR | VTA_RW_OP_EN);
++	} else {
++		b53_write16(dev, B53_ARLIO_PAGE, dev->vta_regs[1], vid);
++		b53_write32(dev, B53_ARLIO_PAGE, dev->vta_regs[2],
++			    (untag << VTE_UNTAG_S) | members);
++
++		b53_do_vlan_op(dev, VTA_CMD_WRITE);
++	}
++}
++
++void b53_set_forwarding(struct b53_device *dev, int enable)
++{
++	u8 mgmt;
++
++	b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
++
++	if (enable)
++		mgmt |= SM_SW_FWD_EN;
++	else
++		mgmt &= ~SM_SW_FWD_EN;
++
++	b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
++}
++
++static void b53_enable_vlan(struct b53_device *dev, int enable)
++{
++	u8 mgmt, vc0, vc1, vc4 = 0, vc5;
++
++	b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
++	b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL0, &vc0);
++	b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL1, &vc1);
++
++	if (is5325(dev) || is5365(dev)) {
++		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, &vc4);
++		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_25, &vc5);
++	} else if (is63xx(dev)) {
++		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_63XX, &vc4);
++		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_63XX, &vc5);
++	} else {
++		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4, &vc4);
++		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, &vc5);
++	}
++
++	mgmt &= ~SM_SW_FWD_MODE;
++
++	if (enable) {
++		vc0 |= VC0_VLAN_EN | VC0_VID_CHK_EN | VC0_VID_HASH_VID;
++		vc1 |= VC1_RX_MCST_UNTAG_EN | VC1_RX_MCST_FWD_EN;
++		vc4 &= ~VC4_ING_VID_CHECK_MASK;
++		vc4 |= VC4_ING_VID_VIO_DROP << VC4_ING_VID_CHECK_S;
++		vc5 |= VC5_DROP_VTABLE_MISS;
++
++		if (is5325(dev))
++			vc0 &= ~VC0_RESERVED_1;
++
++		if (is5325(dev) || is5365(dev))
++			vc1 |= VC1_RX_MCST_TAG_EN;
++
++		if (!is5325(dev) && !is5365(dev)) {
++			if (dev->allow_vid_4095)
++				vc5 |= VC5_VID_FFF_EN;
++			else
++				vc5 &= ~VC5_VID_FFF_EN;
++		}
++	} else {
++		vc0 &= ~(VC0_VLAN_EN | VC0_VID_CHK_EN | VC0_VID_HASH_VID);
++		vc1 &= ~(VC1_RX_MCST_UNTAG_EN | VC1_RX_MCST_FWD_EN);
++		vc4 &= ~VC4_ING_VID_CHECK_MASK;
++		vc5 &= ~VC5_DROP_VTABLE_MISS;
++
++		if (is5325(dev) || is5365(dev))
++			vc4 |= VC4_ING_VID_VIO_FWD << VC4_ING_VID_CHECK_S;
++		else
++			vc4 |= VC4_ING_VID_VIO_TO_IMP << VC4_ING_VID_CHECK_S;
++
++		if (is5325(dev) || is5365(dev))
++			vc1 &= ~VC1_RX_MCST_TAG_EN;
++
++		if (!is5325(dev) && !is5365(dev))
++			vc5 &= ~VC5_VID_FFF_EN;
++	}
++
++	b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL0, vc0);
++	b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL1, vc1);
++
++	if (is5325(dev) || is5365(dev)) {
++		/* enable the high 8 bit vid check on 5325 */
++		if (is5325(dev) && enable)
++			b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3,
++				   VC3_HIGH_8BIT_EN);
++		else
++			b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3, 0);
++
++		b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, vc4);
++		b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_25, vc5);
++	} else if (is63xx(dev)) {
++		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3_63XX, 0);
++		b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_63XX, vc4);
++		b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_63XX, vc5);
++	} else {
++		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3, 0);
++		b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4, vc4);
++		b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, vc5);
++	}
++
++	b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
++}
++
++static int b53_set_jumbo(struct b53_device *dev, int enable, int allow_10_100)
++{
++	u32 port_mask = 0;
++	u16 max_size = JMS_MIN_SIZE;
++
++	if (is5325(dev) || is5365(dev))
++		return -EINVAL;
++
++	if (enable) {
++		port_mask = dev->enabled_ports;
++		max_size = JMS_MAX_SIZE;
++		if (allow_10_100)
++			port_mask |= JPM_10_100_JUMBO_EN;
++	}
++
++	b53_write32(dev, B53_JUMBO_PAGE, dev->jumbo_pm_reg, port_mask);
++	return b53_write16(dev, B53_JUMBO_PAGE, dev->jumbo_size_reg, max_size);
++}
++
++static int b53_flush_arl(struct b53_device *dev)
++{
++	unsigned int i;
++
++	b53_write8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL,
++		   FAST_AGE_DONE | FAST_AGE_DYNAMIC | FAST_AGE_STATIC);
++
++	for (i = 0; i < 10; i++) {
++		u8 fast_age_ctrl;
++
++		b53_read8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL,
++			  &fast_age_ctrl);
++
++		if (!(fast_age_ctrl & FAST_AGE_DONE))
++			return 0;
++
++		mdelay(1);
++	}
++
++	pr_warn("time out while flushing ARL\n");
++
++	return -EINVAL;
++}
++
++static void b53_enable_ports(struct b53_device *dev)
++{
++	unsigned i;
++
++	b53_for_each_port(dev, i) {
++		u8 port_ctrl;
++		u16 pvlan_mask;
++
++		/*
++		 * prevent leaking packets between wan and lan in unmanaged
++		 * mode through port vlans.
++		 */
++		if (dev->enable_vlan || is_cpu_port(dev, i))
++			pvlan_mask = 0x1ff;
++		else if (is531x5(dev) || is5301x(dev))
++			/* BCM53115 may use a different port as cpu port */
++			pvlan_mask = BIT(dev->sw_dev.cpu_port);
++		else
++			pvlan_mask = BIT(B53_CPU_PORT);
++
++		/* BCM5325 CPU port is at 8 */
++		if ((is5325(dev) || is5365(dev)) && i == B53_CPU_PORT_25)
++			i = B53_CPU_PORT;
++
++		if (dev->chip_id == BCM5398_DEVICE_ID && (i == 6 || i == 7))
++			/* disable unused ports 6 & 7 */
++			port_ctrl = PORT_CTRL_RX_DISABLE | PORT_CTRL_TX_DISABLE;
++		else if (i == B53_CPU_PORT)
++			port_ctrl = PORT_CTRL_RX_BCST_EN |
++				    PORT_CTRL_RX_MCST_EN |
++				    PORT_CTRL_RX_UCST_EN;
++		else
++			port_ctrl = 0;
++
++		b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(i),
++			    pvlan_mask);
++
++		/* port state is handled by bcm63xx_enet driver */
++		if (!is63xx(dev) && !(is5301x(dev) && i == 6))
++			b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(i),
++				   port_ctrl);
++	}
++}
++
++static void b53_enable_mib(struct b53_device *dev)
++{
++	u8 gc;
++
++	b53_read8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, &gc);
++
++	gc &= ~(GC_RESET_MIB | GC_MIB_AC_EN);
++
++	b53_write8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc);
++}
++
++static int b53_apply(struct b53_device *dev)
++{
++	int i;
++
++	/* clear all vlan entries */
++	if (is5325(dev) || is5365(dev)) {
++		for (i = 1; i < dev->sw_dev.vlans; i++)
++			b53_set_vlan_entry(dev, i, 0, 0);
++	} else {
++		b53_do_vlan_op(dev, VTA_CMD_CLEAR);
++	}
++
++	b53_enable_vlan(dev, dev->enable_vlan);
++
++	/* fill VLAN table */
++	if (dev->enable_vlan) {
++		for (i = 0; i < dev->sw_dev.vlans; i++) {
++			struct b53_vlan *vlan = &dev->vlans[i];
++
++			if (!vlan->members)
++				continue;
++
++			b53_set_vlan_entry(dev, i, vlan->members, vlan->untag);
++		}
++
++		b53_for_each_port(dev, i)
++			b53_write16(dev, B53_VLAN_PAGE,
++				    B53_VLAN_PORT_DEF_TAG(i),
++				    dev->ports[i].pvid);
++	} else {
++		b53_for_each_port(dev, i)
++			b53_write16(dev, B53_VLAN_PAGE,
++				    B53_VLAN_PORT_DEF_TAG(i), 1);
++
++	}
++
++	b53_enable_ports(dev);
++
++	if (!is5325(dev) && !is5365(dev))
++		b53_set_jumbo(dev, dev->enable_jumbo, 1);
++
++	return 0;
++}
++
++static void b53_switch_reset_gpio(struct b53_device *dev)
++{
++	int gpio = dev->reset_gpio;
++
++	if (gpio < 0)
++		return;
++
++	/*
++	 * Reset sequence: RESET low(50ms)->high(20ms)
++	 */
++	gpio_set_value(gpio, 0);
++	mdelay(50);
++
++	gpio_set_value(gpio, 1);
++	mdelay(20);
++
++	dev->current_page = 0xff;
++}
++
++static int b53_configure_ports_of(struct b53_device *dev)
++{
++	struct device_node *dn, *pn;
++	u32 port_num;
++
++	dn = of_get_child_by_name(dev_of_node(dev->dev), "ports");
++
++	for_each_available_child_of_node(dn, pn) {
++		struct device_node *fixed_link;
++
++		if (of_property_read_u32(pn, "reg", &port_num))
++			continue;
++
++		if (port_num > B53_CPU_PORT)
++			continue;
++
++		fixed_link = of_get_child_by_name(pn, "fixed-link");
++		if (fixed_link) {
++			u32 spd;
++			u8 po = GMII_PO_LINK;
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 5, 0)
++			phy_interface_t mode;
++#else
++			int mode = of_get_phy_mode(pn);
++#endif
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 5, 0)
++			of_get_phy_mode(pn, &mode);
++#endif
++
++			if (!of_property_read_u32(fixed_link, "speed", &spd)) {
++				switch (spd) {
++				case 10:
++					po |= GMII_PO_SPEED_10M;
++					break;
++				case 100:
++					po |= GMII_PO_SPEED_100M;
++					break;
++				case 2000:
++					if (is_imp_port(dev, port_num))
++						po |= PORT_OVERRIDE_SPEED_2000M;
++					else
++						po |= GMII_PO_SPEED_2000M;
++					/* fall through */
++				case 1000:
++					po |= GMII_PO_SPEED_1000M;
++					break;
++				}
++			}
++
++			if (of_property_read_bool(fixed_link, "full-duplex"))
++				po |= PORT_OVERRIDE_FULL_DUPLEX;
++			if (of_property_read_bool(fixed_link, "pause"))
++				po |= GMII_PO_RX_FLOW;
++			if (of_property_read_bool(fixed_link, "asym-pause"))
++				po |= GMII_PO_TX_FLOW;
++
++			if (is_imp_port(dev, port_num)) {
++				po |= PORT_OVERRIDE_EN;
++
++				if (is5325(dev) &&
++				    mode == PHY_INTERFACE_MODE_REVMII)
++					po |= PORT_OVERRIDE_RV_MII_25;
++
++				b53_write8(dev, B53_CTRL_PAGE,
++					   B53_PORT_OVERRIDE_CTRL, po);
++
++				if (is5325(dev) &&
++				    mode == PHY_INTERFACE_MODE_REVMII) {
++					b53_read8(dev, B53_CTRL_PAGE,
++						  B53_PORT_OVERRIDE_CTRL, &po);
++					if (!(po & PORT_OVERRIDE_RV_MII_25))
++					pr_err("Failed to enable reverse MII mode\n");
++					return -EINVAL;
++				}
++			} else {
++				po |= GMII_PO_EN;
++				b53_write8(dev, B53_CTRL_PAGE,
++					   B53_GMII_PORT_OVERRIDE_CTRL(port_num),
++					   po);
++			}
++		}
++	}
++
++	return 0;
++}
++
++static int b53_configure_ports(struct b53_device *dev)
++{
++	u8 cpu_port = dev->sw_dev.cpu_port;
++
++	/* configure MII port if necessary */
++	if (is5325(dev)) {
++		u8 mii_port_override;
++
++		b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
++			  &mii_port_override);
++		/* reverse mii needs to be enabled */
++		if (!(mii_port_override & PORT_OVERRIDE_RV_MII_25)) {
++			b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
++				   mii_port_override | PORT_OVERRIDE_RV_MII_25);
++			b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
++				  &mii_port_override);
++
++			if (!(mii_port_override & PORT_OVERRIDE_RV_MII_25)) {
++				pr_err("Failed to enable reverse MII mode\n");
++				return -EINVAL;
++			}
++		}
++	} else if (is531x5(dev) && cpu_port == B53_CPU_PORT) {
++		u8 mii_port_override;
++
++		b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
++			  &mii_port_override);
++		b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
++			   mii_port_override | PORT_OVERRIDE_EN |
++			   PORT_OVERRIDE_LINK);
++
++		/* BCM47189 has another interface connected to the port 5 */
++		if (dev->enabled_ports & BIT(5)) {
++			u8 po_reg = B53_GMII_PORT_OVERRIDE_CTRL(5);
++			u8 gmii_po;
++
++			b53_read8(dev, B53_CTRL_PAGE, po_reg, &gmii_po);
++			gmii_po |= GMII_PO_LINK |
++				   GMII_PO_RX_FLOW |
++				   GMII_PO_TX_FLOW |
++				   GMII_PO_EN;
++			b53_write8(dev, B53_CTRL_PAGE, po_reg, gmii_po);
++		}
++	} else if (is5301x(dev)) {
++		if (cpu_port == 8) {
++			u8 mii_port_override;
++
++			b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
++				  &mii_port_override);
++			mii_port_override |= PORT_OVERRIDE_LINK |
++					     PORT_OVERRIDE_RX_FLOW |
++					     PORT_OVERRIDE_TX_FLOW |
++					     PORT_OVERRIDE_SPEED_2000M |
++					     PORT_OVERRIDE_EN;
++			b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
++				   mii_port_override);
++
++			/* TODO: Ports 5 & 7 require some extra handling */
++		} else {
++			u8 po_reg = B53_GMII_PORT_OVERRIDE_CTRL(cpu_port);
++			u8 gmii_po;
++
++			b53_read8(dev, B53_CTRL_PAGE, po_reg, &gmii_po);
++			gmii_po |= GMII_PO_LINK |
++				   GMII_PO_RX_FLOW |
++				   GMII_PO_TX_FLOW |
++				   GMII_PO_EN |
++				   GMII_PO_SPEED_2000M;
++			b53_write8(dev, B53_CTRL_PAGE, po_reg, gmii_po);
++		}
++	}
++
++	return 0;
++}
++
++static int b53_switch_reset(struct b53_device *dev)
++{
++	int ret = 0;
++	u8 mgmt;
++
++	b53_switch_reset_gpio(dev);
++
++	if (is539x(dev)) {
++		b53_write8(dev, B53_CTRL_PAGE, B53_SOFTRESET, 0x83);
++		b53_write8(dev, B53_CTRL_PAGE, B53_SOFTRESET, 0x00);
++	}
++
++	b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
++
++	if (!(mgmt & SM_SW_FWD_EN)) {
++		mgmt &= ~SM_SW_FWD_MODE;
++		mgmt |= SM_SW_FWD_EN;
++
++		b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
++		b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
++
++		if (!(mgmt & SM_SW_FWD_EN)) {
++			pr_err("Failed to enable switch!\n");
++			return -EINVAL;
++		}
++	}
++
++	/* enable all ports */
++	b53_enable_ports(dev);
++
++	if (dev->dev->of_node)
++		ret = b53_configure_ports_of(dev);
++	else
++		ret = b53_configure_ports(dev);
++
++	if (ret)
++		return ret;
++
++	b53_enable_mib(dev);
++
++	return b53_flush_arl(dev);
++}
++
++/*
++ * Swconfig glue functions
++ */
++
++static int b53_global_get_vlan_enable(struct switch_dev *dev,
++				      const struct switch_attr *attr,
++				      struct switch_val *val)
++{
++	struct b53_device *priv = sw_to_b53(dev);
++
++	val->value.i = priv->enable_vlan;
++
++	return 0;
++}
++
++static int b53_global_set_vlan_enable(struct switch_dev *dev,
++				      const struct switch_attr *attr,
++				      struct switch_val *val)
++{
++	struct b53_device *priv = sw_to_b53(dev);
++
++	priv->enable_vlan = val->value.i;
++
++	return 0;
++}
++
++static int b53_global_get_jumbo_enable(struct switch_dev *dev,
++				       const struct switch_attr *attr,
++				       struct switch_val *val)
++{
++	struct b53_device *priv = sw_to_b53(dev);
++
++	val->value.i = priv->enable_jumbo;
++
++	return 0;
++}
++
++static int b53_global_set_jumbo_enable(struct switch_dev *dev,
++				       const struct switch_attr *attr,
++				       struct switch_val *val)
++{
++	struct b53_device *priv = sw_to_b53(dev);
++
++	priv->enable_jumbo = val->value.i;
++
++	return 0;
++}
++
++static int b53_global_get_4095_enable(struct switch_dev *dev,
++				      const struct switch_attr *attr,
++				      struct switch_val *val)
++{
++	struct b53_device *priv = sw_to_b53(dev);
++
++	val->value.i = priv->allow_vid_4095;
++
++	return 0;
++}
++
++static int b53_global_set_4095_enable(struct switch_dev *dev,
++				      const struct switch_attr *attr,
++				      struct switch_val *val)
++{
++	struct b53_device *priv = sw_to_b53(dev);
++
++	priv->allow_vid_4095 = val->value.i;
++
++	return 0;
++}
++
++static int b53_global_get_ports(struct switch_dev *dev,
++				const struct switch_attr *attr,
++				struct switch_val *val)
++{
++	struct b53_device *priv = sw_to_b53(dev);
++
++	val->len = snprintf(priv->buf, B53_BUF_SIZE, "0x%04x",
++			    priv->enabled_ports);
++	val->value.s = priv->buf;
++
++	return 0;
++}
++
++static int b53_port_get_pvid(struct switch_dev *dev, int port, int *val)
++{
++	struct b53_device *priv = sw_to_b53(dev);
++
++	*val = priv->ports[port].pvid;
++
++	return 0;
++}
++
++static int b53_port_set_pvid(struct switch_dev *dev, int port, int val)
++{
++	struct b53_device *priv = sw_to_b53(dev);
++
++	if (val > 15 && is5325(priv))
++		return -EINVAL;
++	if (val == 4095 && !priv->allow_vid_4095)
++		return -EINVAL;
++
++	priv->ports[port].pvid = val;
++
++	return 0;
++}
++
++static int b53_vlan_get_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	struct b53_device *priv = sw_to_b53(dev);
++	struct switch_port *port = &val->value.ports[0];
++	struct b53_vlan *vlan = &priv->vlans[val->port_vlan];
++	int i;
++
++	val->len = 0;
++
++	if (!vlan->members)
++		return 0;
++
++	for (i = 0; i < dev->ports; i++) {
++		if (!(vlan->members & BIT(i)))
++			continue;
++
++
++		if (!(vlan->untag & BIT(i)))
++			port->flags = BIT(SWITCH_PORT_FLAG_TAGGED);
++		else
++			port->flags = 0;
++
++		port->id = i;
++		val->len++;
++		port++;
++	}
++
++	return 0;
++}
++
++static int b53_vlan_set_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	struct b53_device *priv = sw_to_b53(dev);
++	struct switch_port *port;
++	struct b53_vlan *vlan = &priv->vlans[val->port_vlan];
++	int i;
++
++	/* only BCM5325 and BCM5365 supports VID 0 */
++	if (val->port_vlan == 0 && !is5325(priv) && !is5365(priv))
++		return -EINVAL;
++
++	/* VLAN 4095 needs special handling */
++	if (val->port_vlan == 4095 && !priv->allow_vid_4095)
++		return -EINVAL;
++
++	port = &val->value.ports[0];
++	vlan->members = 0;
++	vlan->untag = 0;
++	for (i = 0; i < val->len; i++, port++) {
++		vlan->members |= BIT(port->id);
++
++		if (!(port->flags & BIT(SWITCH_PORT_FLAG_TAGGED))) {
++			vlan->untag |= BIT(port->id);
++			priv->ports[port->id].pvid = val->port_vlan;
++		};
++	}
++
++	/* ignore disabled ports */
++	vlan->members &= priv->enabled_ports;
++	vlan->untag &= priv->enabled_ports;
++
++	return 0;
++}
++
++static int b53_port_get_link(struct switch_dev *dev, int port,
++			     struct switch_port_link *link)
++{
++	struct b53_device *priv = sw_to_b53(dev);
++
++	if (is_cpu_port(priv, port)) {
++		link->link = 1;
++		link->duplex = 1;
++		link->speed = is5325(priv) || is5365(priv) ?
++				SWITCH_PORT_SPEED_100 : SWITCH_PORT_SPEED_1000;
++		link->aneg = 0;
++	} else if (priv->enabled_ports & BIT(port)) {
++		u32 speed;
++		u16 lnk, duplex;
++
++		b53_read16(priv, B53_STAT_PAGE, B53_LINK_STAT, &lnk);
++		b53_read16(priv, B53_STAT_PAGE, priv->duplex_reg, &duplex);
++
++		lnk = (lnk >> port) & 1;
++		duplex = (duplex >> port) & 1;
++
++		if (is5325(priv) || is5365(priv)) {
++			u16 tmp;
++
++			b53_read16(priv, B53_STAT_PAGE, B53_SPEED_STAT, &tmp);
++			speed = SPEED_PORT_FE(tmp, port);
++		} else {
++			b53_read32(priv, B53_STAT_PAGE, B53_SPEED_STAT, &speed);
++			speed = SPEED_PORT_GE(speed, port);
++		}
++
++		link->link = lnk;
++		if (lnk) {
++			link->duplex = duplex;
++			switch (speed) {
++			case SPEED_STAT_10M:
++				link->speed = SWITCH_PORT_SPEED_10;
++				break;
++			case SPEED_STAT_100M:
++				link->speed = SWITCH_PORT_SPEED_100;
++				break;
++			case SPEED_STAT_1000M:
++				link->speed = SWITCH_PORT_SPEED_1000;
++				break;
++			}
++		}
++
++		link->aneg = 1;
++	} else {
++		link->link = 0;
++	}
++
++	return 0;
++
++}
++
++static int b53_port_set_link(struct switch_dev *sw_dev, int port,
++			     struct switch_port_link *link)
++{
++	struct b53_device *dev = sw_to_b53(sw_dev);
++
++	/*
++	 * TODO: BCM63XX requires special handling as it can have external phys
++	 * and ports might be GE or only FE
++	 */
++	if (is63xx(dev))
++		return -ENOTSUPP;
++
++	if (port == sw_dev->cpu_port)
++		return -EINVAL;
++
++	if (!(BIT(port) & dev->enabled_ports))
++		return -EINVAL;
++
++	if (link->speed == SWITCH_PORT_SPEED_1000 &&
++	    (is5325(dev) || is5365(dev)))
++		return -EINVAL;
++
++	if (link->speed == SWITCH_PORT_SPEED_1000 && !link->duplex)
++		return -EINVAL;
++
++	return switch_generic_set_link(sw_dev, port, link);
++}
++
++static int b53_phy_read16(struct switch_dev *dev, int addr, u8 reg, u16 *value)
++{
++	struct b53_device *priv = sw_to_b53(dev);
++
++	if (priv->ops->phy_read16)
++		return priv->ops->phy_read16(priv, addr, reg, value);
++
++	return b53_read16(priv, B53_PORT_MII_PAGE(addr), reg, value);
++}
++
++static int b53_phy_write16(struct switch_dev *dev, int addr, u8 reg, u16 value)
++{
++	struct b53_device *priv = sw_to_b53(dev);
++
++	if (priv->ops->phy_write16)
++		return priv->ops->phy_write16(priv, addr, reg, value);
++
++	return b53_write16(priv, B53_PORT_MII_PAGE(addr), reg, value);
++}
++
++static int b53_global_reset_switch(struct switch_dev *dev)
++{
++	struct b53_device *priv = sw_to_b53(dev);
++
++	/* reset vlans */
++	priv->enable_vlan = 0;
++	priv->enable_jumbo = 0;
++	priv->allow_vid_4095 = 0;
++
++	memset(priv->vlans, 0, sizeof(*priv->vlans) * dev->vlans);
++	memset(priv->ports, 0, sizeof(*priv->ports) * dev->ports);
++
++	return b53_switch_reset(priv);
++}
++
++static int b53_global_apply_config(struct switch_dev *dev)
++{
++	struct b53_device *priv = sw_to_b53(dev);
++
++	/* disable switching */
++	b53_set_forwarding(priv, 0);
++
++	b53_apply(priv);
++
++	/* enable switching */
++	b53_set_forwarding(priv, 1);
++
++	return 0;
++}
++
++
++static int b53_global_reset_mib(struct switch_dev *dev,
++				const struct switch_attr *attr,
++				struct switch_val *val)
++{
++	struct b53_device *priv = sw_to_b53(dev);
++	u8 gc;
++
++	b53_read8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, &gc);
++
++	b53_write8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc | GC_RESET_MIB);
++	mdelay(1);
++	b53_write8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc & ~GC_RESET_MIB);
++	mdelay(1);
++
++	return 0;
++}
++
++static int b53_port_get_mib(struct switch_dev *sw_dev,
++			    const struct switch_attr *attr,
++			    struct switch_val *val)
++{
++	struct b53_device *dev = sw_to_b53(sw_dev);
++	const struct b53_mib_desc *mibs;
++	int port = val->port_vlan;
++	int len = 0;
++
++	if (!(BIT(port) & dev->enabled_ports))
++		return -1;
++
++	if (is5365(dev)) {
++		if (port == 5)
++			port = 8;
++
++		mibs = b53_mibs_65;
++	} else if (is63xx(dev)) {
++		mibs = b53_mibs_63xx;
++	} else {
++		mibs = b53_mibs;
++	}
++
++	dev->buf[0] = 0;
++
++	for (; mibs->size > 0; mibs++) {
++		u64 val;
++
++		if (mibs->size == 8) {
++			b53_read64(dev, B53_MIB_PAGE(port), mibs->offset, &val);
++		} else {
++			u32 val32;
++
++			b53_read32(dev, B53_MIB_PAGE(port), mibs->offset,
++				   &val32);
++			val = val32;
++		}
++
++		len += snprintf(dev->buf + len, B53_BUF_SIZE - len,
++				"%-20s: %llu\n", mibs->name, val);
++	}
++
++	val->len = len;
++	val->value.s = dev->buf;
++
++	return 0;
++}
++
++static int b53_port_get_stats(struct switch_dev *sw_dev, int port,
++				struct switch_port_stats *stats)
++{
++	struct b53_device *dev = sw_to_b53(sw_dev);
++	const struct b53_mib_desc *mibs;
++	int txb_id, rxb_id;
++	u64 rxb, txb;
++
++	if (!(BIT(port) & dev->enabled_ports))
++		return -EINVAL;
++
++	txb_id = B53XX_MIB_TXB_ID;
++	rxb_id = B53XX_MIB_RXB_ID;
++
++	if (is5365(dev)) {
++		if (port == 5)
++			port = 8;
++
++		mibs = b53_mibs_65;
++	} else if (is63xx(dev)) {
++		mibs = b53_mibs_63xx;
++		txb_id = B63XX_MIB_TXB_ID;
++		rxb_id = B63XX_MIB_RXB_ID;
++	} else {
++		mibs = b53_mibs;
++	}
++
++	dev->buf[0] = 0;
++
++	if (mibs->size == 8) {
++		b53_read64(dev, B53_MIB_PAGE(port), mibs[txb_id].offset, &txb);
++		b53_read64(dev, B53_MIB_PAGE(port), mibs[rxb_id].offset, &rxb);
++	} else {
++		u32 val32;
++
++		b53_read32(dev, B53_MIB_PAGE(port), mibs[txb_id].offset, &val32);
++		txb = val32;
++
++		b53_read32(dev, B53_MIB_PAGE(port), mibs[rxb_id].offset, &val32);
++		rxb = val32;
++	}
++
++	stats->tx_bytes = txb;
++	stats->rx_bytes = rxb;
++
++	return 0;
++}
++
++static struct switch_attr b53_global_ops_25[] = {
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_vlan",
++		.description = "Enable VLAN mode",
++		.set = b53_global_set_vlan_enable,
++		.get = b53_global_get_vlan_enable,
++		.max = 1,
++	},
++	{
++		.type = SWITCH_TYPE_STRING,
++		.name = "ports",
++		.description = "Available ports (as bitmask)",
++		.get = b53_global_get_ports,
++	},
++};
++
++static struct switch_attr b53_global_ops_65[] = {
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_vlan",
++		.description = "Enable VLAN mode",
++		.set = b53_global_set_vlan_enable,
++		.get = b53_global_get_vlan_enable,
++		.max = 1,
++	},
++	{
++		.type = SWITCH_TYPE_STRING,
++		.name = "ports",
++		.description = "Available ports (as bitmask)",
++		.get = b53_global_get_ports,
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "reset_mib",
++		.description = "Reset MIB counters",
++		.set = b53_global_reset_mib,
++	},
++};
++
++static struct switch_attr b53_global_ops[] = {
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_vlan",
++		.description = "Enable VLAN mode",
++		.set = b53_global_set_vlan_enable,
++		.get = b53_global_get_vlan_enable,
++		.max = 1,
++	},
++	{
++		.type = SWITCH_TYPE_STRING,
++		.name = "ports",
++		.description = "Available Ports (as bitmask)",
++		.get = b53_global_get_ports,
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "reset_mib",
++		.description = "Reset MIB counters",
++		.set = b53_global_reset_mib,
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_jumbo",
++		.description = "Enable Jumbo Frames",
++		.set = b53_global_set_jumbo_enable,
++		.get = b53_global_get_jumbo_enable,
++		.max = 1,
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "allow_vid_4095",
++		.description = "Allow VID 4095",
++		.set = b53_global_set_4095_enable,
++		.get = b53_global_get_4095_enable,
++		.max = 1,
++	},
++};
++
++static struct switch_attr b53_port_ops[] = {
++	{
++		.type = SWITCH_TYPE_STRING,
++		.name = "mib",
++		.description = "Get port's MIB counters",
++		.get = b53_port_get_mib,
++	},
++};
++
++static struct switch_attr b53_no_ops[] = {
++};
++
++static const struct switch_dev_ops b53_switch_ops_25 = {
++	.attr_global = {
++		.attr = b53_global_ops_25,
++		.n_attr = ARRAY_SIZE(b53_global_ops_25),
++	},
++	.attr_port = {
++		.attr = b53_no_ops,
++		.n_attr = ARRAY_SIZE(b53_no_ops),
++	},
++	.attr_vlan = {
++		.attr = b53_no_ops,
++		.n_attr = ARRAY_SIZE(b53_no_ops),
++	},
++
++	.get_vlan_ports = b53_vlan_get_ports,
++	.set_vlan_ports = b53_vlan_set_ports,
++	.get_port_pvid = b53_port_get_pvid,
++	.set_port_pvid = b53_port_set_pvid,
++	.apply_config = b53_global_apply_config,
++	.reset_switch = b53_global_reset_switch,
++	.get_port_link = b53_port_get_link,
++	.set_port_link = b53_port_set_link,
++	.get_port_stats = b53_port_get_stats,
++	.phy_read16 = b53_phy_read16,
++	.phy_write16 = b53_phy_write16,
++};
++
++static const struct switch_dev_ops b53_switch_ops_65 = {
++	.attr_global = {
++		.attr = b53_global_ops_65,
++		.n_attr = ARRAY_SIZE(b53_global_ops_65),
++	},
++	.attr_port = {
++		.attr = b53_port_ops,
++		.n_attr = ARRAY_SIZE(b53_port_ops),
++	},
++	.attr_vlan = {
++		.attr = b53_no_ops,
++		.n_attr = ARRAY_SIZE(b53_no_ops),
++	},
++
++	.get_vlan_ports = b53_vlan_get_ports,
++	.set_vlan_ports = b53_vlan_set_ports,
++	.get_port_pvid = b53_port_get_pvid,
++	.set_port_pvid = b53_port_set_pvid,
++	.apply_config = b53_global_apply_config,
++	.reset_switch = b53_global_reset_switch,
++	.get_port_link = b53_port_get_link,
++	.set_port_link = b53_port_set_link,
++	.get_port_stats = b53_port_get_stats,
++	.phy_read16 = b53_phy_read16,
++	.phy_write16 = b53_phy_write16,
++};
++
++static const struct switch_dev_ops b53_switch_ops = {
++	.attr_global = {
++		.attr = b53_global_ops,
++		.n_attr = ARRAY_SIZE(b53_global_ops),
++	},
++	.attr_port = {
++		.attr = b53_port_ops,
++		.n_attr = ARRAY_SIZE(b53_port_ops),
++	},
++	.attr_vlan = {
++		.attr = b53_no_ops,
++		.n_attr = ARRAY_SIZE(b53_no_ops),
++	},
++
++	.get_vlan_ports = b53_vlan_get_ports,
++	.set_vlan_ports = b53_vlan_set_ports,
++	.get_port_pvid = b53_port_get_pvid,
++	.set_port_pvid = b53_port_set_pvid,
++	.apply_config = b53_global_apply_config,
++	.reset_switch = b53_global_reset_switch,
++	.get_port_link = b53_port_get_link,
++	.set_port_link = b53_port_set_link,
++	.get_port_stats = b53_port_get_stats,
++	.phy_read16 = b53_phy_read16,
++	.phy_write16 = b53_phy_write16,
++};
++
++struct b53_chip_data {
++	u32 chip_id;
++	const char *dev_name;
++	const char *alias;
++	u16 vlans;
++	u16 enabled_ports;
++	u8 cpu_port;
++	u8 vta_regs[3];
++	u8 duplex_reg;
++	u8 jumbo_pm_reg;
++	u8 jumbo_size_reg;
++	const struct switch_dev_ops *sw_ops;
++};
++
++#define B53_VTA_REGS	\
++	{ B53_VT_ACCESS, B53_VT_INDEX, B53_VT_ENTRY }
++#define B53_VTA_REGS_9798 \
++	{ B53_VT_ACCESS_9798, B53_VT_INDEX_9798, B53_VT_ENTRY_9798 }
++#define B53_VTA_REGS_63XX \
++	{ B53_VT_ACCESS_63XX, B53_VT_INDEX_63XX, B53_VT_ENTRY_63XX }
++
++static const struct b53_chip_data b53_switch_chips[] = {
++	{
++		.chip_id = BCM5325_DEVICE_ID,
++		.dev_name = "BCM5325",
++		.alias = "bcm5325",
++		.vlans = 16,
++		.enabled_ports = 0x1f,
++		.cpu_port = B53_CPU_PORT_25,
++		.duplex_reg = B53_DUPLEX_STAT_FE,
++		.sw_ops = &b53_switch_ops_25,
++	},
++	{
++		.chip_id = BCM5365_DEVICE_ID,
++		.dev_name = "BCM5365",
++		.alias = "bcm5365",
++		.vlans = 256,
++		.enabled_ports = 0x1f,
++		.cpu_port = B53_CPU_PORT_25,
++		.duplex_reg = B53_DUPLEX_STAT_FE,
++		.sw_ops = &b53_switch_ops_65,
++	},
++	{
++		.chip_id = BCM5395_DEVICE_ID,
++		.dev_name = "BCM5395",
++		.alias = "bcm5395",
++		.vlans = 4096,
++		.enabled_ports = 0x1f,
++		.cpu_port = B53_CPU_PORT,
++		.vta_regs = B53_VTA_REGS,
++		.duplex_reg = B53_DUPLEX_STAT_GE,
++		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
++		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
++		.sw_ops = &b53_switch_ops,
++	},
++	{
++		.chip_id = BCM5397_DEVICE_ID,
++		.dev_name = "BCM5397",
++		.alias = "bcm5397",
++		.vlans = 4096,
++		.enabled_ports = 0x1f,
++		.cpu_port = B53_CPU_PORT,
++		.vta_regs = B53_VTA_REGS_9798,
++		.duplex_reg = B53_DUPLEX_STAT_GE,
++		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
++		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
++		.sw_ops = &b53_switch_ops,
++	},
++	{
++		.chip_id = BCM5398_DEVICE_ID,
++		.dev_name = "BCM5398",
++		.alias = "bcm5398",
++		.vlans = 4096,
++		.enabled_ports = 0x7f,
++		.cpu_port = B53_CPU_PORT,
++		.vta_regs = B53_VTA_REGS_9798,
++		.duplex_reg = B53_DUPLEX_STAT_GE,
++		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
++		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
++		.sw_ops = &b53_switch_ops,
++	},
++	{
++		.chip_id = BCM53115_DEVICE_ID,
++		.dev_name = "BCM53115",
++		.alias = "bcm53115",
++		.vlans = 4096,
++		.enabled_ports = 0x1f,
++		.vta_regs = B53_VTA_REGS,
++		.cpu_port = B53_CPU_PORT,
++		.duplex_reg = B53_DUPLEX_STAT_GE,
++		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
++		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
++		.sw_ops = &b53_switch_ops,
++	},
++	{
++		.chip_id = BCM53125_DEVICE_ID,
++		.dev_name = "BCM53125",
++		.alias = "bcm53125",
++		.vlans = 4096,
++		.enabled_ports = 0x1f,
++		.cpu_port = B53_CPU_PORT,
++		.vta_regs = B53_VTA_REGS,
++		.duplex_reg = B53_DUPLEX_STAT_GE,
++		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
++		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
++		.sw_ops = &b53_switch_ops,
++	},
++	{
++		.chip_id = BCM53128_DEVICE_ID,
++		.dev_name = "BCM53128",
++		.alias = "bcm53128",
++		.vlans = 4096,
++		.enabled_ports = 0x1ff,
++		.cpu_port = B53_CPU_PORT,
++		.vta_regs = B53_VTA_REGS,
++		.duplex_reg = B53_DUPLEX_STAT_GE,
++		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
++		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
++		.sw_ops = &b53_switch_ops,
++	},
++	{
++		.chip_id = BCM63XX_DEVICE_ID,
++		.dev_name = "BCM63xx",
++		.alias = "bcm63xx",
++		.vlans = 4096,
++		.enabled_ports = 0, /* pdata must provide them */
++		.cpu_port = B53_CPU_PORT,
++		.vta_regs = B53_VTA_REGS_63XX,
++		.duplex_reg = B53_DUPLEX_STAT_63XX,
++		.jumbo_pm_reg = B53_JUMBO_PORT_MASK_63XX,
++		.jumbo_size_reg = B53_JUMBO_MAX_SIZE_63XX,
++		.sw_ops = &b53_switch_ops,
++	},
++	{
++		.chip_id = BCM53010_DEVICE_ID,
++		.dev_name = "BCM53010",
++		.alias = "bcm53011",
++		.vlans = 4096,
++		.enabled_ports = 0x1f,
++		.cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
++		.vta_regs = B53_VTA_REGS,
++		.duplex_reg = B53_DUPLEX_STAT_GE,
++		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
++		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
++		.sw_ops = &b53_switch_ops,
++	},
++	{
++		.chip_id = BCM53011_DEVICE_ID,
++		.dev_name = "BCM53011",
++		.alias = "bcm53011",
++		.vlans = 4096,
++		.enabled_ports = 0x1bf,
++		.cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
++		.vta_regs = B53_VTA_REGS,
++		.duplex_reg = B53_DUPLEX_STAT_GE,
++		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
++		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
++		.sw_ops = &b53_switch_ops,
++	},
++	{
++		.chip_id = BCM53012_DEVICE_ID,
++		.dev_name = "BCM53012",
++		.alias = "bcm53011",
++		.vlans = 4096,
++		.enabled_ports = 0x1bf,
++		.cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
++		.vta_regs = B53_VTA_REGS,
++		.duplex_reg = B53_DUPLEX_STAT_GE,
++		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
++		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
++		.sw_ops = &b53_switch_ops,
++	},
++	{
++		.chip_id = BCM53018_DEVICE_ID,
++		.dev_name = "BCM53018",
++		.alias = "bcm53018",
++		.vlans = 4096,
++		.enabled_ports = 0x1f,
++		.cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
++		.vta_regs = B53_VTA_REGS,
++		.duplex_reg = B53_DUPLEX_STAT_GE,
++		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
++		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
++		.sw_ops = &b53_switch_ops,
++	},
++	{
++		.chip_id = BCM53019_DEVICE_ID,
++		.dev_name = "BCM53019",
++		.alias = "bcm53019",
++		.vlans = 4096,
++		.enabled_ports = 0x1f,
++		.cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
++		.vta_regs = B53_VTA_REGS,
++		.duplex_reg = B53_DUPLEX_STAT_GE,
++		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
++		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
++		.sw_ops = &b53_switch_ops,
++	},
++};
++
++static int b53_switch_init_of(struct b53_device *dev)
++{
++	struct device_node *dn, *pn;
++	const char *alias;
++	u32 port_num;
++	u16 ports = 0;
++
++	dn = of_get_child_by_name(dev_of_node(dev->dev), "ports");
++	if (!dn)
++		return -EINVAL;
++
++	for_each_available_child_of_node(dn, pn) {
++		const char *label;
++		int len;
++
++		if (of_property_read_u32(pn, "reg", &port_num))
++			continue;
++
++		if (port_num > B53_CPU_PORT)
++			continue;
++
++		ports |= BIT(port_num);
++
++		label = of_get_property(pn, "label", &len);
++		if (label && !strcmp(label, "cpu"))
++			dev->sw_dev.cpu_port = port_num;
++	}
++
++	dev->enabled_ports = ports;
++
++	if (!of_property_read_string(dev_of_node(dev->dev), "lede,alias",
++						 &alias))
++		dev->sw_dev.alias = devm_kstrdup(dev->dev, alias, GFP_KERNEL);
++
++	return 0;
++}
++
++static int b53_switch_init(struct b53_device *dev)
++{
++	struct switch_dev *sw_dev = &dev->sw_dev;
++	unsigned i;
++	int ret;
++
++	for (i = 0; i < ARRAY_SIZE(b53_switch_chips); i++) {
++		const struct b53_chip_data *chip = &b53_switch_chips[i];
++
++		if (chip->chip_id == dev->chip_id) {
++			sw_dev->name = chip->dev_name;
++			if (!sw_dev->alias)
++				sw_dev->alias = chip->alias;
++			if (!dev->enabled_ports)
++				dev->enabled_ports = chip->enabled_ports;
++			dev->duplex_reg = chip->duplex_reg;
++			dev->vta_regs[0] = chip->vta_regs[0];
++			dev->vta_regs[1] = chip->vta_regs[1];
++			dev->vta_regs[2] = chip->vta_regs[2];
++			dev->jumbo_pm_reg = chip->jumbo_pm_reg;
++			sw_dev->ops = chip->sw_ops;
++			sw_dev->cpu_port = chip->cpu_port;
++			sw_dev->vlans = chip->vlans;
++			break;
++		}
++	}
++
++	if (!sw_dev->name)
++		return -EINVAL;
++
++	/* check which BCM5325x version we have */
++	if (is5325(dev)) {
++		u8 vc4;
++
++		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, &vc4);
++
++		/* check reserved bits */
++		switch (vc4 & 3) {
++		case 1:
++			/* BCM5325E */
++			break;
++		case 3:
++			/* BCM5325F - do not use port 4 */
++			dev->enabled_ports &= ~BIT(4);
++			break;
++		default:
++/* On the BCM47XX SoCs this is the supported internal switch.*/
++#ifndef CONFIG_BCM47XX
++			/* BCM5325M */
++			return -EINVAL;
++#else
++			break;
++#endif
++		}
++	} else if (dev->chip_id == BCM53115_DEVICE_ID) {
++		u64 strap_value;
++
++		b53_read48(dev, B53_STAT_PAGE, B53_STRAP_VALUE, &strap_value);
++		/* use second IMP port if GMII is enabled */
++		if (strap_value & SV_GMII_CTRL_115)
++			sw_dev->cpu_port = 5;
++	}
++
++	if (dev_of_node(dev->dev)) {
++		ret = b53_switch_init_of(dev);
++		if (ret)
++			return ret;
++	}
++
++	dev->enabled_ports |= BIT(sw_dev->cpu_port);
++	sw_dev->ports = fls(dev->enabled_ports);
++
++	dev->ports = devm_kzalloc(dev->dev,
++				  sizeof(struct b53_port) * sw_dev->ports,
++				  GFP_KERNEL);
++	if (!dev->ports)
++		return -ENOMEM;
++
++	dev->vlans = devm_kzalloc(dev->dev,
++				  sizeof(struct b53_vlan) * sw_dev->vlans,
++				  GFP_KERNEL);
++	if (!dev->vlans)
++		return -ENOMEM;
++
++	dev->buf = devm_kzalloc(dev->dev, B53_BUF_SIZE, GFP_KERNEL);
++	if (!dev->buf)
++		return -ENOMEM;
++
++	dev->reset_gpio = b53_switch_get_reset_gpio(dev);
++	if (dev->reset_gpio >= 0) {
++		ret = devm_gpio_request_one(dev->dev, dev->reset_gpio,
++					    GPIOF_OUT_INIT_HIGH, "robo_reset");
++		if (ret)
++			return ret;
++	}
++
++	return b53_switch_reset(dev);
++}
++
++struct b53_device *b53_switch_alloc(struct device *base, struct b53_io_ops *ops,
++				    void *priv)
++{
++	struct b53_device *dev;
++
++	dev = devm_kzalloc(base, sizeof(*dev), GFP_KERNEL);
++	if (!dev)
++		return NULL;
++
++	dev->dev = base;
++	dev->ops = ops;
++	dev->priv = priv;
++	mutex_init(&dev->reg_mutex);
++
++	return dev;
++}
++EXPORT_SYMBOL(b53_switch_alloc);
++
++int b53_switch_detect(struct b53_device *dev)
++{
++	u32 id32;
++	u16 tmp;
++	u8 id8;
++	int ret;
++
++	ret = b53_read8(dev, B53_MGMT_PAGE, B53_DEVICE_ID, &id8);
++	if (ret)
++		return ret;
++
++	switch (id8) {
++	case 0:
++		/*
++		 * BCM5325 and BCM5365 do not have this register so reads
++		 * return 0. But the read operation did succeed, so assume
++		 * this is one of them.
++		 *
++		 * Next check if we can write to the 5325's VTA register; for
++		 * 5365 it is read only.
++		 */
++
++		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, 0xf);
++		b53_read16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, &tmp);
++
++		if (tmp == 0xf)
++			dev->chip_id = BCM5325_DEVICE_ID;
++		else
++			dev->chip_id = BCM5365_DEVICE_ID;
++		break;
++	case BCM5395_DEVICE_ID:
++	case BCM5397_DEVICE_ID:
++	case BCM5398_DEVICE_ID:
++		dev->chip_id = id8;
++		break;
++	default:
++		ret = b53_read32(dev, B53_MGMT_PAGE, B53_DEVICE_ID, &id32);
++		if (ret)
++			return ret;
++
++		switch (id32) {
++		case BCM53115_DEVICE_ID:
++		case BCM53125_DEVICE_ID:
++		case BCM53128_DEVICE_ID:
++		case BCM53010_DEVICE_ID:
++		case BCM53011_DEVICE_ID:
++		case BCM53012_DEVICE_ID:
++		case BCM53018_DEVICE_ID:
++		case BCM53019_DEVICE_ID:
++			dev->chip_id = id32;
++			break;
++		default:
++			pr_err("unsupported switch detected (BCM53%02x/BCM%x)\n",
++			       id8, id32);
++			return -ENODEV;
++		}
++	}
++
++	if (dev->chip_id == BCM5325_DEVICE_ID)
++		return b53_read8(dev, B53_STAT_PAGE, B53_REV_ID_25,
++				 &dev->core_rev);
++	else
++		return b53_read8(dev, B53_MGMT_PAGE, B53_REV_ID,
++				 &dev->core_rev);
++}
++EXPORT_SYMBOL(b53_switch_detect);
++
++int b53_switch_register(struct b53_device *dev)
++{
++	int ret;
++
++	if (dev->pdata) {
++		dev->chip_id = dev->pdata->chip_id;
++		dev->enabled_ports = dev->pdata->enabled_ports;
++		dev->sw_dev.alias = dev->pdata->alias;
++	}
++
++	if (!dev->chip_id && b53_switch_detect(dev))
++		return -EINVAL;
++
++	ret = b53_switch_init(dev);
++	if (ret)
++		return ret;
++
++	pr_info("found switch: %s, rev %i\n", dev->sw_dev.name, dev->core_rev);
++
++	return register_switch(&dev->sw_dev, NULL);
++}
++EXPORT_SYMBOL(b53_switch_register);
++
++MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
++MODULE_DESCRIPTION("B53 switch library");
++MODULE_LICENSE("Dual BSD/GPL");
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_mdio.c b/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_mdio.c
+new file mode 100644
+index 0000000000..98cdbffe73
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_mdio.c
+@@ -0,0 +1,468 @@
++/*
++ * B53 register access through MII registers
++ *
++ * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org>
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#include <linux/kernel.h>
++#include <linux/phy.h>
++#include <linux/module.h>
++
++#include "b53_priv.h"
++
++#define B53_PSEUDO_PHY	0x1e /* Register Access Pseudo PHY */
++
++/* MII registers */
++#define REG_MII_PAGE    0x10    /* MII Page register */
++#define REG_MII_ADDR    0x11    /* MII Address register */
++#define REG_MII_DATA0   0x18    /* MII Data register 0 */
++#define REG_MII_DATA1   0x19    /* MII Data register 1 */
++#define REG_MII_DATA2   0x1a    /* MII Data register 2 */
++#define REG_MII_DATA3   0x1b    /* MII Data register 3 */
++
++#define REG_MII_PAGE_ENABLE     BIT(0)
++#define REG_MII_ADDR_WRITE      BIT(0)
++#define REG_MII_ADDR_READ       BIT(1)
++
++static int b53_mdio_op(struct b53_device *dev, u8 page, u8 reg, u16 op)
++{
++	int i;
++	u16 v;
++	int ret;
++	struct mii_bus *bus = dev->priv;
++
++	if (dev->current_page != page) {
++		/* set page number */
++		v = (page << 8) | REG_MII_PAGE_ENABLE;
++		ret = mdiobus_write(bus, B53_PSEUDO_PHY, REG_MII_PAGE, v);
++		if (ret)
++			return ret;
++		dev->current_page = page;
++	}
++
++	/* set register address */
++	v = (reg << 8) | op;
++	ret = mdiobus_write(bus, B53_PSEUDO_PHY, REG_MII_ADDR, v);
++	if (ret)
++		return ret;
++
++	/* check if operation completed */
++	for (i = 0; i < 5; ++i) {
++		v = mdiobus_read(bus, B53_PSEUDO_PHY, REG_MII_ADDR);
++		if (!(v & (REG_MII_ADDR_WRITE | REG_MII_ADDR_READ)))
++			break;
++		usleep_range(10, 100);
++	}
++
++	if (WARN_ON(i == 5))
++		return -EIO;
++
++	return 0;
++}
++
++static int b53_mdio_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)
++{
++	struct mii_bus *bus = dev->priv;
++	int ret;
++
++	ret = b53_mdio_op(dev, page, reg, REG_MII_ADDR_READ);
++	if (ret)
++		return ret;
++
++	*val = mdiobus_read(bus, B53_PSEUDO_PHY, REG_MII_DATA0) & 0xff;
++
++	return 0;
++}
++
++static int b53_mdio_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val)
++{
++	struct mii_bus *bus = dev->priv;
++	int ret;
++
++	ret = b53_mdio_op(dev, page, reg, REG_MII_ADDR_READ);
++	if (ret)
++		return ret;
++
++	*val = mdiobus_read(bus, B53_PSEUDO_PHY, REG_MII_DATA0);
++
++	return 0;
++}
++
++static int b53_mdio_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val)
++{
++	struct mii_bus *bus = dev->priv;
++	int ret;
++
++	ret = b53_mdio_op(dev, page, reg, REG_MII_ADDR_READ);
++	if (ret)
++		return ret;
++
++	*val = mdiobus_read(bus, B53_PSEUDO_PHY, REG_MII_DATA0);
++	*val |= mdiobus_read(bus, B53_PSEUDO_PHY, REG_MII_DATA1) << 16;
++
++	return 0;
++}
++
++static int b53_mdio_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val)
++{
++	struct mii_bus *bus = dev->priv;
++	u64 temp = 0;
++	int i;
++	int ret;
++
++	ret = b53_mdio_op(dev, page, reg, REG_MII_ADDR_READ);
++	if (ret)
++		return ret;
++
++	for (i = 2; i >= 0; i--) {
++		temp <<= 16;
++		temp |= mdiobus_read(bus, B53_PSEUDO_PHY, REG_MII_DATA0 + i);
++	}
++
++	*val = temp;
++
++	return 0;
++}
++
++static int b53_mdio_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val)
++{
++	struct mii_bus *bus = dev->priv;
++	u64 temp = 0;
++	int i;
++	int ret;
++
++	ret = b53_mdio_op(dev, page, reg, REG_MII_ADDR_READ);
++	if (ret)
++		return ret;
++
++	for (i = 3; i >= 0; i--) {
++		temp <<= 16;
++		temp |= mdiobus_read(bus, B53_PSEUDO_PHY, REG_MII_DATA0 + i);
++	}
++
++	*val = temp;
++
++	return 0;
++}
++
++static int b53_mdio_write8(struct b53_device *dev, u8 page, u8 reg, u8 value)
++{
++	struct mii_bus *bus = dev->priv;
++	int ret;
++
++	ret = mdiobus_write(bus, B53_PSEUDO_PHY, REG_MII_DATA0, value);
++	if (ret)
++		return ret;
++
++	return b53_mdio_op(dev, page, reg, REG_MII_ADDR_WRITE);
++}
++
++static int b53_mdio_write16(struct b53_device *dev, u8 page, u8 reg,
++			     u16 value)
++{
++	struct mii_bus *bus = dev->priv;
++	int ret;
++
++	ret = mdiobus_write(bus, B53_PSEUDO_PHY, REG_MII_DATA0, value);
++	if (ret)
++		return ret;
++
++	return b53_mdio_op(dev, page, reg, REG_MII_ADDR_WRITE);
++}
++
++static int b53_mdio_write32(struct b53_device *dev, u8 page, u8 reg,
++				    u32 value)
++{
++	struct mii_bus *bus = dev->priv;
++	unsigned int i;
++	u32 temp = value;
++
++	for (i = 0; i < 2; i++) {
++		int ret = mdiobus_write(bus, B53_PSEUDO_PHY, REG_MII_DATA0 + i,
++				    temp & 0xffff);
++		if (ret)
++			return ret;
++		temp >>= 16;
++	}
++
++	return b53_mdio_op(dev, page, reg, REG_MII_ADDR_WRITE);
++
++}
++
++static int b53_mdio_write48(struct b53_device *dev, u8 page, u8 reg,
++				    u64 value)
++{
++	struct mii_bus *bus = dev->priv;
++	unsigned i;
++	u64 temp = value;
++
++	for (i = 0; i < 3; i++) {
++		int ret = mdiobus_write(bus, B53_PSEUDO_PHY, REG_MII_DATA0 + i,
++				    temp & 0xffff);
++		if (ret)
++			return ret;
++		temp >>= 16;
++	}
++
++	return b53_mdio_op(dev, page, reg, REG_MII_ADDR_WRITE);
++
++}
++
++static int b53_mdio_write64(struct b53_device *dev, u8 page, u8 reg,
++			     u64 value)
++{
++	struct mii_bus *bus = dev->priv;
++	unsigned i;
++	u64 temp = value;
++
++	for (i = 0; i < 4; i++) {
++		int ret = mdiobus_write(bus, B53_PSEUDO_PHY, REG_MII_DATA0 + i,
++				    temp & 0xffff);
++		if (ret)
++			return ret;
++		temp >>= 16;
++	}
++
++	return b53_mdio_op(dev, page, reg, REG_MII_ADDR_WRITE);
++}
++
++static int b53_mdio_phy_read16(struct b53_device *dev, int addr, u8 reg,
++			       u16 *value)
++{
++	struct mii_bus *bus = dev->priv;
++
++	*value = mdiobus_read(bus, addr, reg);
++
++	return 0;
++}
++
++static int b53_mdio_phy_write16(struct b53_device *dev, int addr, u8 reg,
++				u16 value)
++{
++	struct mii_bus *bus = dev->priv;
++
++	return mdiobus_write(bus, addr, reg, value);
++}
++
++static struct b53_io_ops b53_mdio_ops = {
++	.read8 = b53_mdio_read8,
++	.read16 = b53_mdio_read16,
++	.read32 = b53_mdio_read32,
++	.read48 = b53_mdio_read48,
++	.read64 = b53_mdio_read64,
++	.write8 = b53_mdio_write8,
++	.write16 = b53_mdio_write16,
++	.write32 = b53_mdio_write32,
++	.write48 = b53_mdio_write48,
++	.write64 = b53_mdio_write64,
++	.phy_read16 = b53_mdio_phy_read16,
++	.phy_write16 = b53_mdio_phy_write16,
++};
++
++static int b53_phy_probe(struct phy_device *phydev)
++{
++	struct b53_device *dev;
++	int ret;
++
++	/* allow the generic phy driver to take over */
++	if (phydev->mdio.addr != B53_PSEUDO_PHY && phydev->mdio.addr != 0)
++		return -ENODEV;
++
++	dev = b53_switch_alloc(&phydev->mdio.dev, &b53_mdio_ops, phydev->mdio.bus);
++	if (!dev)
++		return -ENOMEM;
++
++	dev->current_page = 0xff;
++	dev->priv = phydev->mdio.bus;
++	dev->ops = &b53_mdio_ops;
++	dev->pdata = NULL;
++	mutex_init(&dev->reg_mutex);
++
++	ret = b53_switch_detect(dev);
++	if (ret)
++		return ret;
++
++	linkmode_zero(phydev->supported);
++	if (is5325(dev) || is5365(dev))
++		linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, phydev->supported);
++	else
++		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, phydev->supported);
++
++	linkmode_copy(phydev->advertising, phydev->supported);
++
++	ret = b53_switch_register(dev);
++	if (ret) {
++		dev_err(dev->dev, "failed to register switch: %i\n", ret);
++		return ret;
++	}
++
++	phydev->priv = dev;
++
++	return 0;
++}
++
++static int b53_phy_config_init(struct phy_device *phydev)
++{
++	struct b53_device *dev = phydev->priv;
++
++	/* we don't use page 0xff, so force a page set */
++	dev->current_page = 0xff;
++	/* force the ethX as alias */
++	dev->sw_dev.alias = phydev->attached_dev->name;
++
++	return 0;
++}
++
++static void b53_phy_remove(struct phy_device *phydev)
++{
++	struct b53_device *priv = phydev->priv;
++
++	if (!priv)
++		return;
++
++	b53_switch_remove(priv);
++
++	phydev->priv = NULL;
++}
++
++static int b53_phy_config_aneg(struct phy_device *phydev)
++{
++	return 0;
++}
++
++static int b53_phy_read_status(struct phy_device *phydev)
++{
++	struct b53_device *priv = phydev->priv;
++
++	if (is5325(priv) || is5365(priv))
++		phydev->speed = 100;
++	else
++		phydev->speed = 1000;
++
++	phydev->duplex = DUPLEX_FULL;
++	phydev->link = 1;
++	phydev->state = PHY_RUNNING;
++
++	netif_carrier_on(phydev->attached_dev);
++	phydev->adjust_link(phydev->attached_dev);
++
++	return 0;
++}
++
++static const struct of_device_id b53_of_match_1[] = {
++	{ .compatible = "brcm,bcm5325" },
++	{ .compatible = "brcm,bcm5395" },
++	{ .compatible = "brcm,bcm5397" },
++	{ .compatible = "brcm,bcm5398" },
++	{ /* sentinel */ },
++};
++
++static const struct of_device_id b53_of_match_2[] = {
++	{ .compatible = "brcm,bcm53115" },
++	{ .compatible = "brcm,bcm53125" },
++	{ .compatible = "brcm,bcm53128" },
++	{ /* sentinel */ },
++};
++
++static const struct of_device_id b53_of_match_3[] = {
++	{ .compatible = "brcm,bcm5365" },
++	{ /* sentinel */ },
++};
++
++/* BCM5325, BCM539x */
++static struct phy_driver b53_phy_driver_id1 = {
++	.phy_id		= 0x0143bc00,
++	.name		= "Broadcom B53 (1)",
++	.phy_id_mask	= 0x1ffffc00,
++	.features	= 0,
++	.probe		= b53_phy_probe,
++	.remove		= b53_phy_remove,
++	.config_aneg	= b53_phy_config_aneg,
++	.config_init	= b53_phy_config_init,
++	.read_status	= b53_phy_read_status,
++	.mdiodrv.driver = {
++		.name = "bcm539x",
++		.of_match_table = b53_of_match_1,
++	},
++};
++
++/* BCM53125, BCM53128 */
++static struct phy_driver b53_phy_driver_id2 = {
++	.phy_id		= 0x03625c00,
++	.name		= "Broadcom B53 (2)",
++	.phy_id_mask	= 0x1ffffc00,
++	.features	= 0,
++	.probe		= b53_phy_probe,
++	.remove		= b53_phy_remove,
++	.config_aneg	= b53_phy_config_aneg,
++	.config_init	= b53_phy_config_init,
++	.read_status	= b53_phy_read_status,
++	.mdiodrv.driver = {
++		.name = "bcm531xx",
++		.of_match_table = b53_of_match_2,
++	},
++};
++
++/* BCM5365 */
++static struct phy_driver b53_phy_driver_id3 = {
++	.phy_id		= 0x00406300,
++	.name		= "Broadcom B53 (3)",
++	.phy_id_mask	= 0x1fffff00,
++	.features	= 0,
++	.probe		= b53_phy_probe,
++	.remove		= b53_phy_remove,
++	.config_aneg	= b53_phy_config_aneg,
++	.config_init	= b53_phy_config_init,
++	.read_status	= b53_phy_read_status,
++	.mdiodrv.driver = {
++		.name = "bcm5365",
++		.of_match_table = b53_of_match_3,
++	},
++};
++
++int __init b53_phy_driver_register(void)
++{
++	int ret;
++
++	ret = phy_driver_register(&b53_phy_driver_id1, THIS_MODULE);
++	if (ret)
++		return ret;
++
++	ret = phy_driver_register(&b53_phy_driver_id2, THIS_MODULE);
++	if (ret)
++		goto err1;
++
++	ret = phy_driver_register(&b53_phy_driver_id3, THIS_MODULE);
++	if (!ret)
++		return 0;
++
++	phy_driver_unregister(&b53_phy_driver_id2);
++err1:
++	phy_driver_unregister(&b53_phy_driver_id1);
++	return ret;
++}
++
++void __exit b53_phy_driver_unregister(void)
++{
++	phy_driver_unregister(&b53_phy_driver_id3);
++	phy_driver_unregister(&b53_phy_driver_id2);
++	phy_driver_unregister(&b53_phy_driver_id1);
++}
++
++module_init(b53_phy_driver_register);
++module_exit(b53_phy_driver_unregister);
++
++MODULE_DESCRIPTION("B53 MDIO access driver");
++MODULE_LICENSE("Dual BSD/GPL");
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_mmap.c b/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_mmap.c
+new file mode 100644
+index 0000000000..ab1895e9b5
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_mmap.c
+@@ -0,0 +1,241 @@
++/*
++ * B53 register access through memory mapped registers
++ *
++ * Copyright (C) 2012-2013 Jonas Gorski <jogo@openwrt.org>
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/platform_data/b53.h>
++
++#include "b53_priv.h"
++
++static int b53_mmap_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)
++{
++	u8 __iomem *regs = dev->priv;
++
++	*val = readb(regs + (page << 8) + reg);
++
++	return 0;
++}
++
++static int b53_mmap_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val)
++{
++	u8 __iomem *regs = dev->priv;
++
++	if (WARN_ON(reg % 2))
++		return -EINVAL;
++
++	if (dev->pdata && dev->pdata->big_endian)
++		*val = readw_be(regs + (page << 8) + reg);
++	else
++		*val = readw(regs + (page << 8) + reg);
++
++	return 0;
++}
++
++static int b53_mmap_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val)
++{
++	u8 __iomem *regs = dev->priv;
++
++	if (WARN_ON(reg % 4))
++		return -EINVAL;
++
++	if (dev->pdata && dev->pdata->big_endian)
++		*val = readl_be(regs + (page << 8) + reg);
++	else
++		*val = readl(regs + (page << 8) + reg);
++
++	return 0;
++}
++
++static int b53_mmap_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val)
++{
++	if (WARN_ON(reg % 2))
++		return -EINVAL;
++
++	if (reg % 4) {
++		u16 lo;
++		u32 hi;
++
++		b53_mmap_read16(dev, page, reg, &lo);
++		b53_mmap_read32(dev, page, reg + 2, &hi);
++
++		*val = ((u64)hi << 16) | lo;
++	} else {
++		u32 lo;
++		u16 hi;
++
++		b53_mmap_read32(dev, page, reg, &lo);
++		b53_mmap_read16(dev, page, reg + 4, &hi);
++
++		*val = ((u64)hi << 32) | lo;
++	}
++
++	return 0;
++}
++
++static int b53_mmap_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val)
++{
++	u32 hi, lo;
++
++	if (WARN_ON(reg % 4))
++		return -EINVAL;
++
++	b53_mmap_read32(dev, page, reg, &lo);
++	b53_mmap_read32(dev, page, reg + 4, &hi);
++
++	*val = ((u64)hi << 32) | lo;
++
++	return 0;
++}
++
++static int b53_mmap_write8(struct b53_device *dev, u8 page, u8 reg, u8 value)
++{
++	u8 __iomem *regs = dev->priv;
++
++	writeb(value, regs + (page << 8) + reg);
++
++	return 0;
++}
++
++static int b53_mmap_write16(struct b53_device *dev, u8 page, u8 reg,
++			     u16 value)
++{
++	u8 __iomem *regs = dev->priv;
++
++	if (WARN_ON(reg % 2))
++		return -EINVAL;
++
++	if (dev->pdata && dev->pdata->big_endian)
++		writew_be(value, regs + (page << 8) + reg);
++	else
++		writew(value, regs + (page << 8) + reg);
++
++	return 0;
++}
++
++static int b53_mmap_write32(struct b53_device *dev, u8 page, u8 reg,
++				    u32 value)
++{
++	u8 __iomem *regs = dev->priv;
++
++	if (WARN_ON(reg % 4))
++		return -EINVAL;
++
++	if (dev->pdata && dev->pdata->big_endian)
++		writel_be(value, regs + (page << 8) + reg);
++	else
++		writel(value, regs + (page << 8) + reg);
++
++	return 0;
++}
++
++static int b53_mmap_write48(struct b53_device *dev, u8 page, u8 reg,
++				    u64 value)
++{
++	if (WARN_ON(reg % 2))
++		return -EINVAL;
++
++	if (reg % 4) {
++		u32 hi = (u32)(value >> 16);
++		u16 lo = (u16)value;
++
++		b53_mmap_write16(dev, page, reg, lo);
++		b53_mmap_write32(dev, page, reg + 2, hi);
++	} else {
++		u16 hi = (u16)(value >> 32);
++		u32 lo = (u32)value;
++
++		b53_mmap_write32(dev, page, reg, lo);
++		b53_mmap_write16(dev, page, reg + 4, hi);
++	}
++
++	return 0;
++}
++
++static int b53_mmap_write64(struct b53_device *dev, u8 page, u8 reg,
++			     u64 value)
++{
++	u32 hi, lo;
++
++	hi = (u32)(value >> 32);
++	lo = (u32)value;
++
++	if (WARN_ON(reg % 4))
++		return -EINVAL;
++
++	b53_mmap_write32(dev, page, reg, lo);
++	b53_mmap_write32(dev, page, reg + 4, hi);
++
++	return 0;
++}
++
++static struct b53_io_ops b53_mmap_ops = {
++	.read8 = b53_mmap_read8,
++	.read16 = b53_mmap_read16,
++	.read32 = b53_mmap_read32,
++	.read48 = b53_mmap_read48,
++	.read64 = b53_mmap_read64,
++	.write8 = b53_mmap_write8,
++	.write16 = b53_mmap_write16,
++	.write32 = b53_mmap_write32,
++	.write48 = b53_mmap_write48,
++	.write64 = b53_mmap_write64,
++};
++
++static int b53_mmap_probe(struct platform_device *pdev)
++{
++	struct b53_platform_data *pdata = pdev->dev.platform_data;
++	struct b53_device *dev;
++
++	if (!pdata)
++		return -EINVAL;
++
++	dev = b53_switch_alloc(&pdev->dev, &b53_mmap_ops, pdata->regs);
++	if (!dev)
++		return -ENOMEM;
++
++	if (pdata)
++		dev->pdata = pdata;
++
++	platform_set_drvdata(pdev, dev);
++
++	return b53_switch_register(dev);
++}
++
++static int b53_mmap_remove(struct platform_device *pdev)
++{
++	struct b53_device *dev = platform_get_drvdata(pdev);
++
++	if (dev)
++		b53_switch_remove(dev);
++
++	return 0;
++}
++
++static struct platform_driver b53_mmap_driver = {
++	.probe = b53_mmap_probe,
++	.remove = b53_mmap_remove,
++	.driver = {
++		.name = "b53-switch",
++	},
++};
++
++module_platform_driver(b53_mmap_driver);
++MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
++MODULE_DESCRIPTION("B53 MMAP access driver");
++MODULE_LICENSE("Dual BSD/GPL");
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_phy_fixup.c b/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_phy_fixup.c
+new file mode 100644
+index 0000000000..a19eccefd1
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_phy_fixup.c
+@@ -0,0 +1,55 @@
++/*
++ * B53 PHY Fixup call
++ *
++ * Copyright (C) 2013 Jonas Gorski <jogo@openwrt.org>
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/phy.h>
++
++#define B53_PSEUDO_PHY	0x1e /* Register Access Pseudo PHY */
++
++#define B53_BRCM_OUI_1	0x0143bc00
++#define B53_BRCM_OUI_2	0x03625c00
++#define B53_BRCM_OUI_3	0x00406300
++
++static int b53_phy_fixup(struct phy_device *dev)
++{
++	struct mii_bus *bus = dev->mdio.bus;
++	u32 phy_id;
++
++	if (dev->mdio.addr != B53_PSEUDO_PHY)
++		return 0;
++
++	/* read the first port's id */
++	phy_id = mdiobus_read(bus, 0, 2) << 16;
++	phy_id |= mdiobus_read(bus, 0, 3);
++
++	if ((phy_id & 0xfffffc00) == B53_BRCM_OUI_1 ||
++	    (phy_id & 0xfffffc00) == B53_BRCM_OUI_2 ||
++	    (phy_id & 0xffffff00) == B53_BRCM_OUI_3) {
++		dev->phy_id = phy_id;
++	}
++
++	return 0;
++}
++
++int __init b53_phy_fixup_register(void)
++{
++	return phy_register_fixup_for_id(PHY_ANY_ID, b53_phy_fixup);
++}
++
++subsys_initcall(b53_phy_fixup_register);
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_priv.h b/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_priv.h
+new file mode 100644
+index 0000000000..37c17aeb25
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_priv.h
+@@ -0,0 +1,336 @@
++/*
++ * B53 common definitions
++ *
++ * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org>
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#ifndef __B53_PRIV_H
++#define __B53_PRIV_H
++
++#include <linux/kernel.h>
++#include <linux/mutex.h>
++#include <linux/switch.h>
++
++struct b53_device;
++
++struct b53_io_ops {
++	int (*read8)(struct b53_device *dev, u8 page, u8 reg, u8 *value);
++	int (*read16)(struct b53_device *dev, u8 page, u8 reg, u16 *value);
++	int (*read32)(struct b53_device *dev, u8 page, u8 reg, u32 *value);
++	int (*read48)(struct b53_device *dev, u8 page, u8 reg, u64 *value);
++	int (*read64)(struct b53_device *dev, u8 page, u8 reg, u64 *value);
++	int (*write8)(struct b53_device *dev, u8 page, u8 reg, u8 value);
++	int (*write16)(struct b53_device *dev, u8 page, u8 reg, u16 value);
++	int (*write32)(struct b53_device *dev, u8 page, u8 reg, u32 value);
++	int (*write48)(struct b53_device *dev, u8 page, u8 reg, u64 value);
++	int (*write64)(struct b53_device *dev, u8 page, u8 reg, u64 value);
++	int (*phy_read16)(struct b53_device *dev, int addr, u8 reg, u16 *value);
++	int (*phy_write16)(struct b53_device *dev, int addr, u8 reg, u16 value);
++};
++
++enum {
++	BCM5325_DEVICE_ID = 0x25,
++	BCM5365_DEVICE_ID = 0x65,
++	BCM5395_DEVICE_ID = 0x95,
++	BCM5397_DEVICE_ID = 0x97,
++	BCM5398_DEVICE_ID = 0x98,
++	BCM53115_DEVICE_ID = 0x53115,
++	BCM53125_DEVICE_ID = 0x53125,
++	BCM53128_DEVICE_ID = 0x53128,
++	BCM63XX_DEVICE_ID = 0x6300,
++	BCM53010_DEVICE_ID = 0x53010,
++	BCM53011_DEVICE_ID = 0x53011,
++	BCM53012_DEVICE_ID = 0x53012,
++	BCM53018_DEVICE_ID = 0x53018,
++	BCM53019_DEVICE_ID = 0x53019,
++};
++
++#define B53_N_PORTS	9
++#define B53_N_PORTS_25	6
++
++struct b53_vlan {
++	unsigned int	members:B53_N_PORTS;
++	unsigned int	untag:B53_N_PORTS;
++};
++
++struct b53_port {
++	unsigned int	pvid:12;
++};
++
++struct b53_device {
++	struct switch_dev sw_dev;
++	struct b53_platform_data *pdata;
++
++	struct mutex reg_mutex;
++	const struct b53_io_ops *ops;
++
++	/* chip specific data */
++	u32 chip_id;
++	u8 core_rev;
++	u8 vta_regs[3];
++	u8 duplex_reg;
++	u8 jumbo_pm_reg;
++	u8 jumbo_size_reg;
++	int reset_gpio;
++
++	/* used ports mask */
++	u16 enabled_ports;
++
++	/* connect specific data */
++	u8 current_page;
++	struct device *dev;
++	void *priv;
++
++	/* run time configuration */
++	unsigned enable_vlan:1;
++	unsigned enable_jumbo:1;
++	unsigned allow_vid_4095:1;
++
++	struct b53_port *ports;
++	struct b53_vlan *vlans;
++
++	char *buf;
++};
++
++#define b53_for_each_port(dev, i) \
++	for (i = 0; i < B53_N_PORTS; i++) \
++		if (dev->enabled_ports & BIT(i))
++
++
++
++static inline int is5325(struct b53_device *dev)
++{
++	return dev->chip_id == BCM5325_DEVICE_ID;
++}
++
++static inline int is5365(struct b53_device *dev)
++{
++#ifdef CONFIG_BCM47XX
++	return dev->chip_id == BCM5365_DEVICE_ID;
++#else
++	return 0;
++#endif
++}
++
++static inline int is5397_98(struct b53_device *dev)
++{
++	return dev->chip_id == BCM5397_DEVICE_ID ||
++		dev->chip_id == BCM5398_DEVICE_ID;
++}
++
++static inline int is539x(struct b53_device *dev)
++{
++	return dev->chip_id == BCM5395_DEVICE_ID ||
++		dev->chip_id == BCM5397_DEVICE_ID ||
++		dev->chip_id == BCM5398_DEVICE_ID;
++}
++
++static inline int is531x5(struct b53_device *dev)
++{
++	return dev->chip_id == BCM53115_DEVICE_ID ||
++		dev->chip_id == BCM53125_DEVICE_ID ||
++		dev->chip_id == BCM53128_DEVICE_ID;
++}
++
++static inline int is63xx(struct b53_device *dev)
++{
++#ifdef CONFIG_BCM63XX
++	return dev->chip_id == BCM63XX_DEVICE_ID;
++#else
++	return 0;
++#endif
++}
++
++static inline int is5301x(struct b53_device *dev)
++{
++	return dev->chip_id == BCM53010_DEVICE_ID ||
++		dev->chip_id == BCM53011_DEVICE_ID ||
++		dev->chip_id == BCM53012_DEVICE_ID ||
++		dev->chip_id == BCM53018_DEVICE_ID ||
++		dev->chip_id == BCM53019_DEVICE_ID;
++}
++
++#define B53_CPU_PORT_25	5
++#define B53_CPU_PORT	8
++
++static inline int is_cpu_port(struct b53_device *dev, int port)
++{
++	return dev->sw_dev.cpu_port == port;
++}
++
++static inline int is_imp_port(struct b53_device *dev, int port)
++{
++	if (is5325(dev) || is5365(dev))
++		return port == B53_CPU_PORT_25;
++	else
++		return port == B53_CPU_PORT;
++}
++
++static inline struct b53_device *sw_to_b53(struct switch_dev *sw)
++{
++	return container_of(sw, struct b53_device, sw_dev);
++}
++
++struct b53_device *b53_switch_alloc(struct device *base, struct b53_io_ops *ops,
++				    void *priv);
++
++int b53_switch_detect(struct b53_device *dev);
++
++int b53_switch_register(struct b53_device *dev);
++
++static inline void b53_switch_remove(struct b53_device *dev)
++{
++	unregister_switch(&dev->sw_dev);
++}
++
++static inline int b53_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)
++{
++	int ret;
++
++	mutex_lock(&dev->reg_mutex);
++	ret = dev->ops->read8(dev, page, reg, val);
++	mutex_unlock(&dev->reg_mutex);
++
++	return ret;
++}
++
++static inline int b53_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val)
++{
++	int ret;
++
++	mutex_lock(&dev->reg_mutex);
++	ret = dev->ops->read16(dev, page, reg, val);
++	mutex_unlock(&dev->reg_mutex);
++
++	return ret;
++}
++
++static inline int b53_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val)
++{
++	int ret;
++
++	mutex_lock(&dev->reg_mutex);
++	ret = dev->ops->read32(dev, page, reg, val);
++	mutex_unlock(&dev->reg_mutex);
++
++	return ret;
++}
++
++static inline int b53_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val)
++{
++	int ret;
++
++	mutex_lock(&dev->reg_mutex);
++	ret = dev->ops->read48(dev, page, reg, val);
++	mutex_unlock(&dev->reg_mutex);
++
++	return ret;
++}
++
++static inline int b53_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val)
++{
++	int ret;
++
++	mutex_lock(&dev->reg_mutex);
++	ret = dev->ops->read64(dev, page, reg, val);
++	mutex_unlock(&dev->reg_mutex);
++
++	return ret;
++}
++
++static inline int b53_write8(struct b53_device *dev, u8 page, u8 reg, u8 value)
++{
++	int ret;
++
++	mutex_lock(&dev->reg_mutex);
++	ret = dev->ops->write8(dev, page, reg, value);
++	mutex_unlock(&dev->reg_mutex);
++
++	return ret;
++}
++
++static inline int b53_write16(struct b53_device *dev, u8 page, u8 reg,
++			      u16 value)
++{
++	int ret;
++
++	mutex_lock(&dev->reg_mutex);
++	ret = dev->ops->write16(dev, page, reg, value);
++	mutex_unlock(&dev->reg_mutex);
++
++	return ret;
++}
++
++static inline int b53_write32(struct b53_device *dev, u8 page, u8 reg,
++			      u32 value)
++{
++	int ret;
++
++	mutex_lock(&dev->reg_mutex);
++	ret = dev->ops->write32(dev, page, reg, value);
++	mutex_unlock(&dev->reg_mutex);
++
++	return ret;
++}
++
++static inline int b53_write48(struct b53_device *dev, u8 page, u8 reg,
++			      u64 value)
++{
++	int ret;
++
++	mutex_lock(&dev->reg_mutex);
++	ret = dev->ops->write48(dev, page, reg, value);
++	mutex_unlock(&dev->reg_mutex);
++
++	return ret;
++}
++
++static inline int b53_write64(struct b53_device *dev, u8 page, u8 reg,
++			       u64 value)
++{
++	int ret;
++
++	mutex_lock(&dev->reg_mutex);
++	ret = dev->ops->write64(dev, page, reg, value);
++	mutex_unlock(&dev->reg_mutex);
++
++	return ret;
++}
++
++#ifdef CONFIG_BCM47XX
++#include <bcm47xx_board.h>
++#endif
++
++#include <linux/version.h>
++#include <linux/bcm47xx_nvram.h>
++
++static inline int b53_switch_get_reset_gpio(struct b53_device *dev)
++{
++#ifdef CONFIG_BCM47XX
++	enum bcm47xx_board board = bcm47xx_board_get();
++
++	switch (board) {
++	case BCM47XX_BOARD_LINKSYS_WRT300NV11:
++	case BCM47XX_BOARD_LINKSYS_WRT310NV1:
++		return 8;
++	default:
++		break;
++	}
++#endif
++
++	return bcm47xx_nvram_gpio_pin("robo_reset");
++}
++
++#endif
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_regs.h b/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_regs.h
+new file mode 100644
+index 0000000000..f0bf6744a7
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_regs.h
+@@ -0,0 +1,348 @@
++/*
++ * B53 register definitions
++ *
++ * Copyright (C) 2004 Broadcom Corporation
++ * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org>
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#ifndef __B53_REGS_H
++#define __B53_REGS_H
++
++/* Management Port (SMP) Page offsets */
++#define B53_CTRL_PAGE			0x00 /* Control */
++#define B53_STAT_PAGE			0x01 /* Status */
++#define B53_MGMT_PAGE			0x02 /* Management Mode */
++#define B53_MIB_AC_PAGE			0x03 /* MIB Autocast */
++#define B53_ARLCTRL_PAGE		0x04 /* ARL Control */
++#define B53_ARLIO_PAGE			0x05 /* ARL Access */
++#define B53_FRAMEBUF_PAGE		0x06 /* Management frame access */
++#define B53_MEM_ACCESS_PAGE		0x08 /* Memory access */
++
++/* PHY Registers */
++#define B53_PORT_MII_PAGE(i)		(0x10 + (i)) /* Port i MII Registers */
++#define B53_IM_PORT_PAGE		0x18 /* Inverse MII Port (to EMAC) */
++#define B53_ALL_PORT_PAGE		0x19 /* All ports MII (broadcast) */
++
++/* MIB registers */
++#define B53_MIB_PAGE(i)			(0x20 + (i))
++
++/* Quality of Service (QoS) Registers */
++#define B53_QOS_PAGE			0x30
++
++/* Port VLAN Page */
++#define B53_PVLAN_PAGE			0x31
++
++/* VLAN Registers */
++#define B53_VLAN_PAGE			0x34
++
++/* Jumbo Frame Registers */
++#define B53_JUMBO_PAGE			0x40
++
++/* CFP Configuration Registers Page */
++#define B53_CFP_PAGE			0xa1
++
++/*************************************************************************
++ * Control Page registers
++ *************************************************************************/
++
++/* Port Control Register (8 bit) */
++#define B53_PORT_CTRL(i)		(0x00 + (i))
++#define   PORT_CTRL_RX_DISABLE		BIT(0)
++#define   PORT_CTRL_TX_DISABLE		BIT(1)
++#define   PORT_CTRL_RX_BCST_EN		BIT(2) /* Broadcast RX (P8 only) */
++#define   PORT_CTRL_RX_MCST_EN		BIT(3) /* Multicast RX (P8 only) */
++#define   PORT_CTRL_RX_UCST_EN		BIT(4) /* Unicast RX (P8 only) */
++#define	  PORT_CTRL_STP_STATE_S		5
++#define   PORT_CTRL_STP_STATE_MASK	(0x7 << PORT_CTRL_STP_STATE_S)
++
++/* SMP Control Register (8 bit) */
++#define B53_SMP_CTRL			0x0a
++
++/* Switch Mode Control Register (8 bit) */
++#define B53_SWITCH_MODE			0x0b
++#define   SM_SW_FWD_MODE		BIT(0)	/* 1 = Managed Mode */
++#define   SM_SW_FWD_EN			BIT(1)	/* Forwarding Enable */
++
++/* IMP Port state override register (8 bit) */
++#define B53_PORT_OVERRIDE_CTRL		0x0e
++#define   PORT_OVERRIDE_LINK		BIT(0)
++#define   PORT_OVERRIDE_FULL_DUPLEX	BIT(1) /* 0 = Half Duplex */
++#define   PORT_OVERRIDE_SPEED_S		2
++#define   PORT_OVERRIDE_SPEED_10M	(0 << PORT_OVERRIDE_SPEED_S)
++#define   PORT_OVERRIDE_SPEED_100M	(1 << PORT_OVERRIDE_SPEED_S)
++#define   PORT_OVERRIDE_SPEED_1000M	(2 << PORT_OVERRIDE_SPEED_S)
++#define   PORT_OVERRIDE_RV_MII_25	BIT(4) /* BCM5325 only */
++#define   PORT_OVERRIDE_RX_FLOW		BIT(4)
++#define   PORT_OVERRIDE_TX_FLOW		BIT(5)
++#define   PORT_OVERRIDE_SPEED_2000M	BIT(6) /* BCM5301X only, requires setting 1000M */
++#define   PORT_OVERRIDE_EN		BIT(7) /* Use the register contents */
++
++/* Power-down mode control */
++#define B53_PD_MODE_CTRL_25		0x0f
++
++/* IP Multicast control (8 bit) */
++#define B53_IP_MULTICAST_CTRL		0x21
++#define  B53_IPMC_FWD_EN		BIT(1)
++#define  B53_UC_FWD_EN			BIT(6)
++#define  B53_MC_FWD_EN			BIT(7)
++
++/* (16 bit) */
++#define B53_UC_FLOOD_MASK		0x32
++#define B53_MC_FLOOD_MASK		0x34
++#define B53_IPMC_FLOOD_MASK		0x36
++
++/*
++ * Override Ports 0-7 State on devices with xMII interfaces (8 bit)
++ *
++ * For port 8 still use B53_PORT_OVERRIDE_CTRL
++ * Please note that not all ports are available on every hardware, e.g. BCM5301X
++ * don't include overriding port 6, BCM63xx also have some limitations.
++ */
++#define B53_GMII_PORT_OVERRIDE_CTRL(i)	(0x58 + (i))
++#define   GMII_PO_LINK			BIT(0)
++#define   GMII_PO_FULL_DUPLEX		BIT(1) /* 0 = Half Duplex */
++#define   GMII_PO_SPEED_S		2
++#define   GMII_PO_SPEED_10M		(0 << GMII_PO_SPEED_S)
++#define   GMII_PO_SPEED_100M		(1 << GMII_PO_SPEED_S)
++#define   GMII_PO_SPEED_1000M		(2 << GMII_PO_SPEED_S)
++#define   GMII_PO_RX_FLOW		BIT(4)
++#define   GMII_PO_TX_FLOW		BIT(5)
++#define   GMII_PO_EN			BIT(6) /* Use the register contents */
++#define   GMII_PO_SPEED_2000M		BIT(7) /* BCM5301X only, requires setting 1000M */
++
++/* Software reset register (8 bit) */
++#define B53_SOFTRESET			0x79
++
++/* Fast Aging Control register (8 bit) */
++#define B53_FAST_AGE_CTRL		0x88
++#define   FAST_AGE_STATIC		BIT(0)
++#define   FAST_AGE_DYNAMIC		BIT(1)
++#define   FAST_AGE_PORT			BIT(2)
++#define   FAST_AGE_VLAN			BIT(3)
++#define   FAST_AGE_STP			BIT(4)
++#define   FAST_AGE_MC			BIT(5)
++#define   FAST_AGE_DONE			BIT(7)
++
++/*************************************************************************
++ * Status Page registers
++ *************************************************************************/
++
++/* Link Status Summary Register (16bit) */
++#define B53_LINK_STAT			0x00
++
++/* Link Status Change Register (16 bit) */
++#define B53_LINK_STAT_CHANGE		0x02
++
++/* Port Speed Summary Register (16 bit for FE, 32 bit for GE) */
++#define B53_SPEED_STAT			0x04
++#define  SPEED_PORT_FE(reg, port)	(((reg) >> (port)) & 1)
++#define  SPEED_PORT_GE(reg, port)	(((reg) >> 2 * (port)) & 3)
++#define  SPEED_STAT_10M			0
++#define  SPEED_STAT_100M		1
++#define  SPEED_STAT_1000M		2
++
++/* Duplex Status Summary (16 bit) */
++#define B53_DUPLEX_STAT_FE		0x06
++#define B53_DUPLEX_STAT_GE		0x08
++#define B53_DUPLEX_STAT_63XX		0x0c
++
++/* Revision ID register for BCM5325 */
++#define B53_REV_ID_25			0x50
++
++/* Strap Value (48 bit) */
++#define B53_STRAP_VALUE			0x70
++#define   SV_GMII_CTRL_115		BIT(27)
++
++/*************************************************************************
++ * Management Mode Page Registers
++ *************************************************************************/
++
++/* Global Management Config Register (8 bit) */
++#define B53_GLOBAL_CONFIG		0x00
++#define   GC_RESET_MIB			0x01
++#define   GC_RX_BPDU_EN			0x02
++#define   GC_MIB_AC_HDR_EN		0x10
++#define   GC_MIB_AC_EN			0x20
++#define   GC_FRM_MGMT_PORT_M		0xC0
++#define   GC_FRM_MGMT_PORT_04		0x00
++#define   GC_FRM_MGMT_PORT_MII		0x80
++
++/* Broadcom Header control register (8 bit) */
++#define B53_BRCM_HDR			0x03
++#define   BRCM_HDR_P8_EN		BIT(0) /* Enable tagging on port 8 */
++#define   BRCM_HDR_P5_EN		BIT(1) /* Enable tagging on port 5 */
++
++/* Device ID register (8 or 32 bit) */
++#define B53_DEVICE_ID			0x30
++
++/* Revision ID register (8 bit) */
++#define B53_REV_ID			0x40
++
++/*************************************************************************
++ * ARL Access Page Registers
++ *************************************************************************/
++
++/* VLAN Table Access Register (8 bit) */
++#define B53_VT_ACCESS			0x80
++#define B53_VT_ACCESS_9798		0x60 /* for BCM5397/BCM5398 */
++#define B53_VT_ACCESS_63XX		0x60 /* for BCM6328/62/68 */
++#define   VTA_CMD_WRITE			0
++#define   VTA_CMD_READ			1
++#define   VTA_CMD_CLEAR			2
++#define   VTA_START_CMD			BIT(7)
++
++/* VLAN Table Index Register (16 bit) */
++#define B53_VT_INDEX			0x81
++#define B53_VT_INDEX_9798		0x61
++#define B53_VT_INDEX_63XX		0x62
++
++/* VLAN Table Entry Register (32 bit) */
++#define B53_VT_ENTRY			0x83
++#define B53_VT_ENTRY_9798		0x63
++#define B53_VT_ENTRY_63XX		0x64
++#define   VTE_MEMBERS			0x1ff
++#define   VTE_UNTAG_S			9
++#define   VTE_UNTAG			(0x1ff << 9)
++
++/*************************************************************************
++ * Port VLAN Registers
++ *************************************************************************/
++
++/* Port VLAN mask (16 bit) IMP port is always 8, also on 5325 & co */
++#define B53_PVLAN_PORT_MASK(i)		((i) * 2)
++
++/*************************************************************************
++ * 802.1Q Page Registers
++ *************************************************************************/
++
++/* Global QoS Control (8 bit) */
++#define B53_QOS_GLOBAL_CTL		0x00
++
++/* Enable 802.1Q for individual Ports (16 bit) */
++#define B53_802_1P_EN			0x04
++
++/*************************************************************************
++ * VLAN Page Registers
++ *************************************************************************/
++
++/* VLAN Control 0 (8 bit) */
++#define B53_VLAN_CTRL0			0x00
++#define   VC0_8021PF_CTRL_MASK		0x3
++#define   VC0_8021PF_CTRL_NONE		0x0
++#define   VC0_8021PF_CTRL_CHANGE_PRI	0x1
++#define   VC0_8021PF_CTRL_CHANGE_VID	0x2
++#define   VC0_8021PF_CTRL_CHANGE_BOTH	0x3
++#define   VC0_8021QF_CTRL_MASK		0xc
++#define   VC0_8021QF_CTRL_CHANGE_PRI	0x1
++#define   VC0_8021QF_CTRL_CHANGE_VID	0x2
++#define   VC0_8021QF_CTRL_CHANGE_BOTH	0x3
++#define   VC0_RESERVED_1		BIT(1)
++#define   VC0_DROP_VID_MISS		BIT(4)
++#define   VC0_VID_HASH_VID		BIT(5)
++#define   VC0_VID_CHK_EN		BIT(6)	/* Use VID,DA or VID,SA */
++#define   VC0_VLAN_EN			BIT(7)	/* 802.1Q VLAN Enabled */
++
++/* VLAN Control 1 (8 bit) */
++#define B53_VLAN_CTRL1			0x01
++#define   VC1_RX_MCST_TAG_EN		BIT(1)
++#define   VC1_RX_MCST_FWD_EN		BIT(2)
++#define   VC1_RX_MCST_UNTAG_EN		BIT(3)
++
++/* VLAN Control 2 (8 bit) */
++#define B53_VLAN_CTRL2			0x02
++
++/* VLAN Control 3 (8 bit when BCM5325, 16 bit else) */
++#define B53_VLAN_CTRL3			0x03
++#define B53_VLAN_CTRL3_63XX		0x04
++#define   VC3_MAXSIZE_1532		BIT(6) /* 5325 only */
++#define   VC3_HIGH_8BIT_EN		BIT(7) /* 5325 only */
++
++/* VLAN Control 4 (8 bit) */
++#define B53_VLAN_CTRL4			0x05
++#define B53_VLAN_CTRL4_25		0x04
++#define B53_VLAN_CTRL4_63XX		0x06
++#define   VC4_ING_VID_CHECK_S		6
++#define   VC4_ING_VID_CHECK_MASK	(0x3 << VC4_ING_VID_CHECK_S)
++#define   VC4_ING_VID_VIO_FWD		0 /* forward, but do not learn */
++#define   VC4_ING_VID_VIO_DROP		1 /* drop VID violations */
++#define   VC4_NO_ING_VID_CHK		2 /* do not check */
++#define   VC4_ING_VID_VIO_TO_IMP	3 /* redirect to MII port */
++
++/* VLAN Control 5 (8 bit) */
++#define B53_VLAN_CTRL5			0x06
++#define B53_VLAN_CTRL5_25		0x05
++#define B53_VLAN_CTRL5_63XX		0x07
++#define   VC5_VID_FFF_EN		BIT(2)
++#define   VC5_DROP_VTABLE_MISS		BIT(3)
++
++/* VLAN Control 6 (8 bit) */
++#define B53_VLAN_CTRL6			0x07
++#define B53_VLAN_CTRL6_63XX		0x08
++
++/* VLAN Table Access Register (16 bit) */
++#define B53_VLAN_TABLE_ACCESS_25	0x06	/* BCM5325E/5350 */
++#define B53_VLAN_TABLE_ACCESS_65	0x08	/* BCM5365 */
++#define   VTA_VID_LOW_MASK_25		0xf
++#define   VTA_VID_LOW_MASK_65		0xff
++#define   VTA_VID_HIGH_S_25		4
++#define   VTA_VID_HIGH_S_65		8
++#define   VTA_VID_HIGH_MASK_25		(0xff << VTA_VID_HIGH_S_25E)
++#define   VTA_VID_HIGH_MASK_65		(0xf << VTA_VID_HIGH_S_65)
++#define   VTA_RW_STATE			BIT(12)
++#define   VTA_RW_STATE_RD		0
++#define   VTA_RW_STATE_WR		BIT(12)
++#define   VTA_RW_OP_EN			BIT(13)
++
++/* VLAN Read/Write Registers for (16/32 bit) */
++#define B53_VLAN_WRITE_25		0x08
++#define B53_VLAN_WRITE_65		0x0a
++#define B53_VLAN_READ			0x0c
++#define   VA_MEMBER_MASK		0x3f
++#define   VA_UNTAG_S_25			6
++#define   VA_UNTAG_MASK_25		0x3f
++#define   VA_UNTAG_S_65			7
++#define   VA_UNTAG_MASK_65		0x1f
++#define   VA_VID_HIGH_S			12
++#define   VA_VID_HIGH_MASK		(0xffff << VA_VID_HIGH_S)
++#define   VA_VALID_25			BIT(20)
++#define   VA_VALID_25_R4		BIT(24)
++#define   VA_VALID_65			BIT(14)
++
++/* VLAN Port Default Tag (16 bit) */
++#define B53_VLAN_PORT_DEF_TAG(i)	(0x10 + 2 * (i))
++
++/*************************************************************************
++ * Jumbo Frame Page Registers
++ *************************************************************************/
++
++/* Jumbo Enable Port Mask (bit i == port i enabled) (32 bit) */
++#define B53_JUMBO_PORT_MASK		0x01
++#define B53_JUMBO_PORT_MASK_63XX	0x04
++#define   JPM_10_100_JUMBO_EN		BIT(24) /* GigE always enabled */
++
++/* Good Frame Max Size without 802.1Q TAG (16 bit) */
++#define B53_JUMBO_MAX_SIZE		0x05
++#define B53_JUMBO_MAX_SIZE_63XX		0x08
++#define   JMS_MIN_SIZE			1518
++#define   JMS_MAX_SIZE			9724
++
++/*************************************************************************
++ * CFP Configuration Page Registers
++ *************************************************************************/
++
++/* CFP Control Register with ports map (8 bit) */
++#define B53_CFP_CTRL			0x00
++
++#endif /* !__B53_REGS_H */
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_spi.c b/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_spi.c
+new file mode 100644
+index 0000000000..efc8f7ee89
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_spi.c
+@@ -0,0 +1,344 @@
++/*
++ * B53 register access through SPI
++ *
++ * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org>
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#include <asm/unaligned.h>
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/spi/spi.h>
++#include <linux/of.h>
++#include <linux/platform_data/b53.h>
++
++#include "b53_priv.h"
++
++#define B53_SPI_DATA		0xf0
++
++#define B53_SPI_STATUS		0xfe
++#define B53_SPI_CMD_SPIF	BIT(7)
++#define B53_SPI_CMD_RACK	BIT(5)
++
++#define B53_SPI_CMD_READ	0x00
++#define B53_SPI_CMD_WRITE	0x01
++#define B53_SPI_CMD_NORMAL	0x60
++#define B53_SPI_CMD_FAST	0x10
++
++#define B53_SPI_PAGE_SELECT	0xff
++
++static inline int b53_spi_read_reg(struct spi_device *spi, u8 reg, u8 *val,
++				     unsigned len)
++{
++	u8 txbuf[2];
++
++	txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_READ;
++	txbuf[1] = reg;
++
++	return spi_write_then_read(spi, txbuf, 2, val, len);
++}
++
++static inline int b53_spi_clear_status(struct spi_device *spi)
++{
++	unsigned int i;
++	u8 rxbuf;
++	int ret;
++
++	for (i = 0; i < 10; i++) {
++		ret = b53_spi_read_reg(spi, B53_SPI_STATUS, &rxbuf, 1);
++		if (ret)
++			return ret;
++
++		if (!(rxbuf & B53_SPI_CMD_SPIF))
++			break;
++
++		mdelay(1);
++	}
++
++	if (i == 10)
++		return -EIO;
++
++	return 0;
++}
++
++static inline int b53_spi_set_page(struct spi_device *spi, u8 page)
++{
++	u8 txbuf[3];
++
++	txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
++	txbuf[1] = B53_SPI_PAGE_SELECT;
++	txbuf[2] = page;
++
++	return spi_write(spi, txbuf, sizeof(txbuf));
++}
++
++static inline int b53_prepare_reg_access(struct spi_device *spi, u8 page)
++{
++	int ret = b53_spi_clear_status(spi);
++
++	if (ret)
++		return ret;
++
++	return b53_spi_set_page(spi, page);
++}
++
++static int b53_spi_prepare_reg_read(struct spi_device *spi, u8 reg)
++{
++	u8 rxbuf;
++	int retry_count;
++	int ret;
++
++	ret = b53_spi_read_reg(spi, reg, &rxbuf, 1);
++	if (ret)
++		return ret;
++
++	for (retry_count = 0; retry_count < 10; retry_count++) {
++		ret = b53_spi_read_reg(spi, B53_SPI_STATUS, &rxbuf, 1);
++		if (ret)
++			return ret;
++
++		if (rxbuf & B53_SPI_CMD_RACK)
++			break;
++
++		mdelay(1);
++	}
++
++	if (retry_count == 10)
++		return -EIO;
++
++	return 0;
++}
++
++static int b53_spi_read(struct b53_device *dev, u8 page, u8 reg, u8 *data,
++			unsigned len)
++{
++	struct spi_device *spi = dev->priv;
++	int ret;
++
++	ret = b53_prepare_reg_access(spi, page);
++	if (ret)
++		return ret;
++
++	ret = b53_spi_prepare_reg_read(spi, reg);
++	if (ret)
++		return ret;
++
++	return b53_spi_read_reg(spi, B53_SPI_DATA, data, len);
++}
++
++static int b53_spi_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)
++{
++	return b53_spi_read(dev, page, reg, val, 1);
++}
++
++static int b53_spi_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val)
++{
++	int ret = b53_spi_read(dev, page, reg, (u8 *)val, 2);
++
++	if (!ret)
++		*val = le16_to_cpu(*val);
++
++	return ret;
++}
++
++static int b53_spi_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val)
++{
++	int ret = b53_spi_read(dev, page, reg, (u8 *)val, 4);
++
++	if (!ret)
++		*val = le32_to_cpu(*val);
++
++	return ret;
++}
++
++static int b53_spi_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val)
++{
++	int ret;
++
++	*val = 0;
++	ret = b53_spi_read(dev, page, reg, (u8 *)val, 6);
++	if (!ret)
++		*val = le64_to_cpu(*val);
++
++	return ret;
++}
++
++static int b53_spi_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val)
++{
++	int ret = b53_spi_read(dev, page, reg, (u8 *)val, 8);
++
++	if (!ret)
++		*val = le64_to_cpu(*val);
++
++	return ret;
++}
++
++static int b53_spi_write8(struct b53_device *dev, u8 page, u8 reg, u8 value)
++{
++	struct spi_device *spi = dev->priv;
++	int ret;
++	u8 txbuf[3];
++
++	ret = b53_prepare_reg_access(spi, page);
++	if (ret)
++		return ret;
++
++	txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
++	txbuf[1] = reg;
++	txbuf[2] = value;
++
++	return spi_write(spi, txbuf, sizeof(txbuf));
++}
++
++static int b53_spi_write16(struct b53_device *dev, u8 page, u8 reg, u16 value)
++{
++	struct spi_device *spi = dev->priv;
++	int ret;
++	u8 txbuf[4];
++
++	ret = b53_prepare_reg_access(spi, page);
++	if (ret)
++		return ret;
++
++	txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
++	txbuf[1] = reg;
++	put_unaligned_le16(value, &txbuf[2]);
++
++	return spi_write(spi, txbuf, sizeof(txbuf));
++}
++
++static int b53_spi_write32(struct b53_device *dev, u8 page, u8 reg, u32 value)
++{
++	struct spi_device *spi = dev->priv;
++	int ret;
++	u8 txbuf[6];
++
++	ret = b53_prepare_reg_access(spi, page);
++	if (ret)
++		return ret;
++
++	txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
++	txbuf[1] = reg;
++	put_unaligned_le32(value, &txbuf[2]);
++
++	return spi_write(spi, txbuf, sizeof(txbuf));
++}
++
++static int b53_spi_write48(struct b53_device *dev, u8 page, u8 reg, u64 value)
++{
++	struct spi_device *spi = dev->priv;
++	int ret;
++	u8 txbuf[10];
++
++	ret = b53_prepare_reg_access(spi, page);
++	if (ret)
++		return ret;
++
++	txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
++	txbuf[1] = reg;
++	put_unaligned_le64(value, &txbuf[2]);
++
++	return spi_write(spi, txbuf, sizeof(txbuf) - 2);
++}
++
++static int b53_spi_write64(struct b53_device *dev, u8 page, u8 reg, u64 value)
++{
++	struct spi_device *spi = dev->priv;
++	int ret;
++	u8 txbuf[10];
++
++	ret = b53_prepare_reg_access(spi, page);
++	if (ret)
++		return ret;
++
++	txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
++	txbuf[1] = reg;
++	put_unaligned_le64(value, &txbuf[2]);
++
++	return spi_write(spi, txbuf, sizeof(txbuf));
++}
++
++static struct b53_io_ops b53_spi_ops = {
++	.read8 = b53_spi_read8,
++	.read16 = b53_spi_read16,
++	.read32 = b53_spi_read32,
++	.read48 = b53_spi_read48,
++	.read64 = b53_spi_read64,
++	.write8 = b53_spi_write8,
++	.write16 = b53_spi_write16,
++	.write32 = b53_spi_write32,
++	.write48 = b53_spi_write48,
++	.write64 = b53_spi_write64,
++};
++
++static int b53_spi_probe(struct spi_device *spi)
++{
++	struct b53_device *dev;
++	int ret;
++
++	dev = b53_switch_alloc(&spi->dev, &b53_spi_ops, spi);
++	if (!dev)
++		return -ENOMEM;
++
++	if (spi->dev.platform_data)
++		dev->pdata = spi->dev.platform_data;
++
++	ret = b53_switch_register(dev);
++	if (ret)
++		return ret;
++
++	spi_set_drvdata(spi, dev);
++
++	return 0;
++}
++
++static int b53_spi_remove(struct spi_device *spi)
++{
++	struct b53_device *dev = spi_get_drvdata(spi);
++
++	if (dev)
++		b53_switch_remove(dev);
++
++	return 0;
++}
++
++static const struct of_device_id b53_of_match[] = {
++	{ .compatible = "brcm,bcm5325" },
++	{ .compatible = "brcm,bcm53115" },
++	{ .compatible = "brcm,bcm53125" },
++	{ .compatible = "brcm,bcm53128" },
++	{ .compatible = "brcm,bcm5365" },
++	{ .compatible = "brcm,bcm5395" },
++	{ .compatible = "brcm,bcm5397" },
++	{ .compatible = "brcm,bcm5398" },
++	{ /* sentinel */ },
++};
++
++static struct spi_driver b53_spi_driver = {
++	.driver = {
++		.name	= "b53-switch",
++		.bus	= &spi_bus_type,
++		.owner	= THIS_MODULE,
++		.of_match_table = b53_of_match,
++	},
++	.probe	= b53_spi_probe,
++	.remove	= b53_spi_remove,
++};
++
++module_spi_driver(b53_spi_driver);
++
++MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
++MODULE_DESCRIPTION("B53 SPI access driver");
++MODULE_LICENSE("Dual BSD/GPL");
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_srab.c b/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_srab.c
+new file mode 100644
+index 0000000000..012daa3a51
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/b53/b53_srab.c
+@@ -0,0 +1,378 @@
++/*
++ * B53 register access through Switch Register Access Bridge Registers
++ *
++ * Copyright (C) 2013 Hauke Mehrtens <hauke@hauke-m.de>
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/platform_data/b53.h>
++
++#include "b53_priv.h"
++
++/* command and status register of the SRAB */
++#define B53_SRAB_CMDSTAT		0x2c
++#define  B53_SRAB_CMDSTAT_RST		BIT(2)
++#define  B53_SRAB_CMDSTAT_WRITE		BIT(1)
++#define  B53_SRAB_CMDSTAT_GORDYN	BIT(0)
++#define  B53_SRAB_CMDSTAT_PAGE		24
++#define  B53_SRAB_CMDSTAT_REG		16
++
++/* high order word of write data to switch registe */
++#define B53_SRAB_WD_H			0x30
++
++/* low order word of write data to switch registe */
++#define B53_SRAB_WD_L			0x34
++
++/* high order word of read data from switch register */
++#define B53_SRAB_RD_H			0x38
++
++/* low order word of read data from switch register */
++#define B53_SRAB_RD_L			0x3c
++
++/* command and status register of the SRAB */
++#define B53_SRAB_CTRLS			0x40
++#define  B53_SRAB_CTRLS_RCAREQ		BIT(3)
++#define  B53_SRAB_CTRLS_RCAGNT		BIT(4)
++#define  B53_SRAB_CTRLS_SW_INIT_DONE	BIT(6)
++
++/* the register captures interrupt pulses from the switch */
++#define B53_SRAB_INTR			0x44
++
++static int b53_srab_request_grant(struct b53_device *dev)
++{
++	u8 __iomem *regs = dev->priv;
++	u32 ctrls;
++	int i;
++
++	ctrls = readl(regs + B53_SRAB_CTRLS);
++	ctrls |= B53_SRAB_CTRLS_RCAREQ;
++	writel(ctrls, regs + B53_SRAB_CTRLS);
++
++	for (i = 0; i < 20; i++) {
++		ctrls = readl(regs + B53_SRAB_CTRLS);
++		if (ctrls & B53_SRAB_CTRLS_RCAGNT)
++			break;
++		usleep_range(10, 100);
++	}
++	if (WARN_ON(i == 5))
++		return -EIO;
++
++	return 0;
++}
++
++static void b53_srab_release_grant(struct b53_device *dev)
++{
++	u8 __iomem *regs = dev->priv;
++	u32 ctrls;
++
++	ctrls = readl(regs + B53_SRAB_CTRLS);
++	ctrls &= ~B53_SRAB_CTRLS_RCAREQ;
++	writel(ctrls, regs + B53_SRAB_CTRLS);
++}
++
++static int b53_srab_op(struct b53_device *dev, u8 page, u8 reg, u32 op)
++{
++	int i;
++	u32 cmdstat;
++	u8 __iomem *regs = dev->priv;
++
++	/* set register address */
++	cmdstat = (page << B53_SRAB_CMDSTAT_PAGE) |
++		  (reg << B53_SRAB_CMDSTAT_REG) |
++		  B53_SRAB_CMDSTAT_GORDYN |
++		  op;
++	writel(cmdstat, regs + B53_SRAB_CMDSTAT);
++
++	/* check if operation completed */
++	for (i = 0; i < 5; ++i) {
++		cmdstat = readl(regs + B53_SRAB_CMDSTAT);
++		if (!(cmdstat & B53_SRAB_CMDSTAT_GORDYN))
++			break;
++		usleep_range(10, 100);
++	}
++
++	if (WARN_ON(i == 5))
++		return -EIO;
++
++	return 0;
++}
++
++static int b53_srab_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)
++{
++	u8 __iomem *regs = dev->priv;
++	int ret = 0;
++
++	ret = b53_srab_request_grant(dev);
++	if (ret)
++		goto err;
++
++	ret = b53_srab_op(dev, page, reg, 0);
++	if (ret)
++		goto err;
++
++	*val = readl(regs + B53_SRAB_RD_L) & 0xff;
++
++err:
++	b53_srab_release_grant(dev);
++
++	return ret;
++}
++
++static int b53_srab_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val)
++{
++	u8 __iomem *regs = dev->priv;
++	int ret = 0;
++
++	ret = b53_srab_request_grant(dev);
++	if (ret)
++		goto err;
++
++	ret = b53_srab_op(dev, page, reg, 0);
++	if (ret)
++		goto err;
++
++	*val = readl(regs + B53_SRAB_RD_L) & 0xffff;
++
++err:
++	b53_srab_release_grant(dev);
++
++	return ret;
++}
++
++static int b53_srab_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val)
++{
++	u8 __iomem *regs = dev->priv;
++	int ret = 0;
++
++	ret = b53_srab_request_grant(dev);
++	if (ret)
++		goto err;
++
++	ret = b53_srab_op(dev, page, reg, 0);
++	if (ret)
++		goto err;
++
++	*val = readl(regs + B53_SRAB_RD_L);
++
++err:
++	b53_srab_release_grant(dev);
++
++	return ret;
++}
++
++static int b53_srab_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val)
++{
++	u8 __iomem *regs = dev->priv;
++	int ret = 0;
++
++	ret = b53_srab_request_grant(dev);
++	if (ret)
++		goto err;
++
++	ret = b53_srab_op(dev, page, reg, 0);
++	if (ret)
++		goto err;
++
++	*val = readl(regs + B53_SRAB_RD_L);
++	*val += ((u64)readl(regs + B53_SRAB_RD_H) & 0xffff) << 32;
++
++err:
++	b53_srab_release_grant(dev);
++
++	return ret;
++}
++
++static int b53_srab_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val)
++{
++	u8 __iomem *regs = dev->priv;
++	int ret = 0;
++
++	ret = b53_srab_request_grant(dev);
++	if (ret)
++		goto err;
++
++	ret = b53_srab_op(dev, page, reg, 0);
++	if (ret)
++		goto err;
++
++	*val = readl(regs + B53_SRAB_RD_L);
++	*val += (u64)readl(regs + B53_SRAB_RD_H) << 32;
++
++err:
++	b53_srab_release_grant(dev);
++
++	return ret;
++}
++
++static int b53_srab_write8(struct b53_device *dev, u8 page, u8 reg, u8 value)
++{
++	u8 __iomem *regs = dev->priv;
++	int ret = 0;
++
++	ret = b53_srab_request_grant(dev);
++	if (ret)
++		goto err;
++
++	writel(value, regs + B53_SRAB_WD_L);
++
++	ret = b53_srab_op(dev, page, reg, B53_SRAB_CMDSTAT_WRITE);
++
++err:
++	b53_srab_release_grant(dev);
++
++	return ret;
++}
++
++static int b53_srab_write16(struct b53_device *dev, u8 page, u8 reg,
++			     u16 value)
++{
++	u8 __iomem *regs = dev->priv;
++	int ret = 0;
++
++	ret = b53_srab_request_grant(dev);
++	if (ret)
++		goto err;
++
++	writel(value, regs + B53_SRAB_WD_L);
++
++	ret = b53_srab_op(dev, page, reg, B53_SRAB_CMDSTAT_WRITE);
++
++err:
++	b53_srab_release_grant(dev);
++
++	return ret;
++}
++
++static int b53_srab_write32(struct b53_device *dev, u8 page, u8 reg,
++				    u32 value)
++{
++	u8 __iomem *regs = dev->priv;
++	int ret = 0;
++
++	ret = b53_srab_request_grant(dev);
++	if (ret)
++		goto err;
++
++	writel(value, regs + B53_SRAB_WD_L);
++
++	ret = b53_srab_op(dev, page, reg, B53_SRAB_CMDSTAT_WRITE);
++
++err:
++	b53_srab_release_grant(dev);
++
++	return ret;
++
++}
++
++static int b53_srab_write48(struct b53_device *dev, u8 page, u8 reg,
++				    u64 value)
++{
++	u8 __iomem *regs = dev->priv;
++	int ret = 0;
++
++	ret = b53_srab_request_grant(dev);
++	if (ret)
++		goto err;
++
++	writel((u32)value, regs + B53_SRAB_WD_L);
++	writel((u16)(value >> 32), regs + B53_SRAB_WD_H);
++
++	ret = b53_srab_op(dev, page, reg, B53_SRAB_CMDSTAT_WRITE);
++
++err:
++	b53_srab_release_grant(dev);
++
++	return ret;
++
++}
++
++static int b53_srab_write64(struct b53_device *dev, u8 page, u8 reg,
++			     u64 value)
++{
++	u8 __iomem *regs = dev->priv;
++	int ret = 0;
++
++	ret = b53_srab_request_grant(dev);
++	if (ret)
++		goto err;
++
++	writel((u32)value, regs + B53_SRAB_WD_L);
++	writel((u32)(value >> 32), regs + B53_SRAB_WD_H);
++
++	ret = b53_srab_op(dev, page, reg, B53_SRAB_CMDSTAT_WRITE);
++
++err:
++	b53_srab_release_grant(dev);
++
++	return ret;
++}
++
++static struct b53_io_ops b53_srab_ops = {
++	.read8 = b53_srab_read8,
++	.read16 = b53_srab_read16,
++	.read32 = b53_srab_read32,
++	.read48 = b53_srab_read48,
++	.read64 = b53_srab_read64,
++	.write8 = b53_srab_write8,
++	.write16 = b53_srab_write16,
++	.write32 = b53_srab_write32,
++	.write48 = b53_srab_write48,
++	.write64 = b53_srab_write64,
++};
++
++static int b53_srab_probe(struct platform_device *pdev)
++{
++	struct b53_platform_data *pdata = pdev->dev.platform_data;
++	struct b53_device *dev;
++
++	if (!pdata)
++		return -EINVAL;
++
++	dev = b53_switch_alloc(&pdev->dev, &b53_srab_ops, pdata->regs);
++	if (!dev)
++		return -ENOMEM;
++
++	if (pdata)
++		dev->pdata = pdata;
++
++	platform_set_drvdata(pdev, dev);
++
++	return b53_switch_register(dev);
++}
++
++static int b53_srab_remove(struct platform_device *pdev)
++{
++	struct b53_device *dev = platform_get_drvdata(pdev);
++
++	if (dev)
++		b53_switch_remove(dev);
++
++	return 0;
++}
++
++static struct platform_driver b53_srab_driver = {
++	.probe = b53_srab_probe,
++	.remove = b53_srab_remove,
++	.driver = {
++		.name = "b53-srab-switch",
++	},
++};
++
++module_platform_driver(b53_srab_driver);
++MODULE_AUTHOR("Hauke Mehrtens <hauke@hauke-m.de>");
++MODULE_DESCRIPTION("B53 Switch Register Access Bridge Registers (SRAB) access driver");
++MODULE_LICENSE("Dual BSD/GPL");
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/ip17xx.c b/target/linux/generic/files-5.4/drivers/net/phy/ip17xx.c
+new file mode 100644
+index 0000000000..c369803395
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/ip17xx.c
+@@ -0,0 +1,1370 @@
++/*
++ * ip17xx.c: Swconfig configuration for IC+ IP17xx switch family
++ *
++ * Copyright (C) 2008 Patrick Horn <patrick.horn@gmail.com>
++ * Copyright (C) 2008, 2010 Martin Mares <mj@ucw.cz>
++ * Copyright (C) 2009 Felix Fietkau <nbd@nbd.name>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	See the
++ * GNU General Public License for more details.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/list.h>
++#include <linux/skbuff.h>
++#include <linux/mii.h>
++#include <linux/phy.h>
++#include <linux/delay.h>
++#include <linux/switch.h>
++#include <linux/device.h>
++
++#define MAX_VLANS 16
++#define MAX_PORTS 9
++#undef DUMP_MII_IO
++
++typedef struct ip17xx_reg {
++	u16 p;			// phy
++	u16 m;			// mii
++} reg;
++typedef char bitnum;
++
++#define NOTSUPPORTED {-1,-1}
++
++#define REG_SUPP(x) (((x).m != ((u16)-1)) && ((x).p != (u16)-1))
++
++struct ip17xx_state;
++
++/*********** CONSTANTS ***********/
++struct register_mappings {
++	char *NAME;
++	u16 MODEL_NO;			// Compare to bits 4-9 of MII register 0,3.
++	bitnum NUM_PORTS;
++	bitnum CPU_PORT;
++
++/* The default VLAN for each port.
++	 Default: 0x0001 for Ports 0,1,2,3
++		  0x0002 for Ports 4,5 */
++	reg VLAN_DEFAULT_TAG_REG[MAX_PORTS];
++
++/* These ports are tagged.
++	 Default: 0x00 */
++	reg ADD_TAG_REG;
++	reg REMOVE_TAG_REG;
++	bitnum ADD_TAG_BIT[MAX_PORTS];
++/* These ports are untagged.
++	 Default: 0x00 (i.e. do not alter any VLAN tags...)
++	 Maybe set to 0 if user disables VLANs. */
++	bitnum REMOVE_TAG_BIT[MAX_PORTS];
++
++/* Port M and Port N are on the same VLAN.
++	 Default: All ports on all VLANs. */
++// Use register {29, 19+N/2}
++	reg VLAN_LOOKUP_REG;
++// Port 5 uses register {30, 18} but same as odd bits.
++	reg VLAN_LOOKUP_REG_5;		// in a different register on IP175C.
++	bitnum VLAN_LOOKUP_EVEN_BIT[MAX_PORTS];
++	bitnum VLAN_LOOKUP_ODD_BIT[MAX_PORTS];
++
++/* This VLAN corresponds to which ports.
++	 Default: 0x2f,0x30,0x3f,0x3f... */
++	reg TAG_VLAN_MASK_REG;
++	bitnum TAG_VLAN_MASK_EVEN_BIT[MAX_PORTS];
++	bitnum TAG_VLAN_MASK_ODD_BIT[MAX_PORTS];
++
++	int RESET_VAL;
++	reg RESET_REG;
++
++	reg MODE_REG;
++	int MODE_VAL;
++
++/* General flags */
++	reg ROUTER_CONTROL_REG;
++	reg VLAN_CONTROL_REG;
++	bitnum TAG_VLAN_BIT;
++	bitnum ROUTER_EN_BIT;
++	bitnum NUMLAN_GROUPS_MAX;
++	bitnum NUMLAN_GROUPS_BIT;
++
++	reg MII_REGISTER_EN;
++	bitnum MII_REGISTER_EN_BIT;
++
++	// set to 1 for 178C, 0 for 175C.
++	bitnum SIMPLE_VLAN_REGISTERS;	// 175C has two vlans per register but 178C has only one.
++
++	// Pointers to functions which manipulate hardware state
++	int (*update_state)(struct ip17xx_state *state);
++	int (*set_vlan_mode)(struct ip17xx_state *state);
++	int (*reset)(struct ip17xx_state *state);
++};
++
++static int ip175c_update_state(struct ip17xx_state *state);
++static int ip175c_set_vlan_mode(struct ip17xx_state *state);
++static int ip175c_reset(struct ip17xx_state *state);
++
++static const struct register_mappings IP178C = {
++	.NAME = "IP178C",
++	.MODEL_NO = 0x18,
++	.VLAN_DEFAULT_TAG_REG = {
++		{30,3},{30,4},{30,5},{30,6},{30,7},{30,8},
++		{30,9},{30,10},{30,11},
++	},
++
++	.ADD_TAG_REG = {30,12},
++	.ADD_TAG_BIT = {0,1,2,3,4,5,6,7,8},
++	.REMOVE_TAG_REG = {30,13},
++	.REMOVE_TAG_BIT = {4,5,6,7,8,9,10,11,12},
++
++	.SIMPLE_VLAN_REGISTERS = 1,
++
++	.VLAN_LOOKUP_REG = {31,0},// +N
++	.VLAN_LOOKUP_REG_5 = NOTSUPPORTED, // not used with SIMPLE_VLAN_REGISTERS
++	.VLAN_LOOKUP_EVEN_BIT = {0,1,2,3,4,5,6,7,8},
++	.VLAN_LOOKUP_ODD_BIT = {0,1,2,3,4,5,6,7,8},
++
++	.TAG_VLAN_MASK_REG = {30,14}, // +N
++	.TAG_VLAN_MASK_EVEN_BIT = {0,1,2,3,4,5,6,7,8},
++	.TAG_VLAN_MASK_ODD_BIT = {0,1,2,3,4,5,6,7,8},
++
++	.RESET_VAL = 0x55AA,
++	.RESET_REG = {30,0},
++	.MODE_VAL = 0,
++	.MODE_REG = NOTSUPPORTED,
++
++	.ROUTER_CONTROL_REG = {30,30},
++	.ROUTER_EN_BIT = 11,
++	.NUMLAN_GROUPS_MAX = 8,
++	.NUMLAN_GROUPS_BIT = 8, // {0-2}
++
++	.VLAN_CONTROL_REG = {30,13},
++	.TAG_VLAN_BIT = 3,
++
++	.CPU_PORT = 8,
++	.NUM_PORTS = 9,
++
++	.MII_REGISTER_EN = NOTSUPPORTED,
++
++	.update_state = ip175c_update_state,
++	.set_vlan_mode = ip175c_set_vlan_mode,
++	.reset = ip175c_reset,
++};
++
++static const struct register_mappings IP175C = {
++	.NAME = "IP175C",
++	.MODEL_NO = 0x18,
++	.VLAN_DEFAULT_TAG_REG = {
++		{29,24},{29,25},{29,26},{29,27},{29,28},{29,30},
++		NOTSUPPORTED,NOTSUPPORTED,NOTSUPPORTED
++	},
++
++	.ADD_TAG_REG = {29,23},
++	.REMOVE_TAG_REG = {29,23},
++	.ADD_TAG_BIT = {11,12,13,14,15,1,-1,-1,-1},
++	.REMOVE_TAG_BIT = {6,7,8,9,10,0,-1,-1,-1},
++
++	.SIMPLE_VLAN_REGISTERS = 0,
++
++	.VLAN_LOOKUP_REG = {29,19},// +N/2
++	.VLAN_LOOKUP_REG_5 = {30,18},
++	.VLAN_LOOKUP_EVEN_BIT = {8,9,10,11,12,15,-1,-1,-1},
++	.VLAN_LOOKUP_ODD_BIT = {0,1,2,3,4,7,-1,-1,-1},
++
++	.TAG_VLAN_MASK_REG = {30,1}, // +N/2
++	.TAG_VLAN_MASK_EVEN_BIT = {0,1,2,3,4,5,-1,-1,-1},
++	.TAG_VLAN_MASK_ODD_BIT = {8,9,10,11,12,13,-1,-1,-1},
++
++	.RESET_VAL = 0x175C,
++	.RESET_REG = {30,0},
++	.MODE_VAL = 0x175C,
++	.MODE_REG = {29,31},
++
++	.ROUTER_CONTROL_REG = {30,9},
++	.ROUTER_EN_BIT = 3,
++	.NUMLAN_GROUPS_MAX = 8,
++	.NUMLAN_GROUPS_BIT = 0, // {0-2}
++
++	.VLAN_CONTROL_REG = {30,9},
++	.TAG_VLAN_BIT = 7,
++
++	.NUM_PORTS = 6,
++	.CPU_PORT = 5,
++
++	.MII_REGISTER_EN = NOTSUPPORTED,
++
++	.update_state = ip175c_update_state,
++	.set_vlan_mode = ip175c_set_vlan_mode,
++	.reset = ip175c_reset,
++};
++
++static const struct register_mappings IP175A = {
++	.NAME = "IP175A",
++	.MODEL_NO = 0x05,
++	.VLAN_DEFAULT_TAG_REG = {
++		{0,24},{0,25},{0,26},{0,27},{0,28},NOTSUPPORTED,
++		NOTSUPPORTED,NOTSUPPORTED,NOTSUPPORTED
++	},
++
++	.ADD_TAG_REG = {0,23},
++	.REMOVE_TAG_REG = {0,23},
++	.ADD_TAG_BIT = {11,12,13,14,15,-1,-1,-1,-1},
++	.REMOVE_TAG_BIT = {6,7,8,9,10,-1,-1,-1,-1},
++
++	.SIMPLE_VLAN_REGISTERS = 0,
++
++	// Only programmable via EEPROM
++	.VLAN_LOOKUP_REG = NOTSUPPORTED,// +N/2
++	.VLAN_LOOKUP_REG_5 = NOTSUPPORTED,
++	.VLAN_LOOKUP_EVEN_BIT = {8,9,10,11,12,-1,-1,-1,-1},
++	.VLAN_LOOKUP_ODD_BIT = {0,1,2,3,4,-1,-1,-1,-1},
++
++	.TAG_VLAN_MASK_REG = NOTSUPPORTED, // +N/2,
++	.TAG_VLAN_MASK_EVEN_BIT = {-1,-1,-1,-1,-1,-1,-1,-1,-1},
++	.TAG_VLAN_MASK_ODD_BIT = {-1,-1,-1,-1,-1,-1,-1,-1,-1},
++
++	.RESET_VAL = -1,
++	.RESET_REG = NOTSUPPORTED,
++	.MODE_VAL = 0,
++	.MODE_REG = NOTSUPPORTED,
++
++	.ROUTER_CONTROL_REG = NOTSUPPORTED,
++	.VLAN_CONTROL_REG = NOTSUPPORTED,
++	.TAG_VLAN_BIT = -1,
++	.ROUTER_EN_BIT = -1,
++	.NUMLAN_GROUPS_MAX = -1,
++	.NUMLAN_GROUPS_BIT = -1, // {0-2}
++
++	.NUM_PORTS = 5,
++	.CPU_PORT = 4,
++
++	.MII_REGISTER_EN = {0, 18},
++	.MII_REGISTER_EN_BIT = 7,
++
++	.update_state = ip175c_update_state,
++	.set_vlan_mode = ip175c_set_vlan_mode,
++	.reset = ip175c_reset,
++};
++
++
++static int ip175d_update_state(struct ip17xx_state *state);
++static int ip175d_set_vlan_mode(struct ip17xx_state *state);
++static int ip175d_reset(struct ip17xx_state *state);
++
++static const struct register_mappings IP175D = {
++	.NAME = "IP175D",
++	.MODEL_NO = 0x18,
++
++	// The IP175D has a completely different interface, so we leave most
++	// of the registers undefined and switch to different code paths.
++
++	.VLAN_DEFAULT_TAG_REG = {
++		NOTSUPPORTED,NOTSUPPORTED,NOTSUPPORTED,NOTSUPPORTED,
++		NOTSUPPORTED,NOTSUPPORTED,NOTSUPPORTED,NOTSUPPORTED,
++	},
++
++	.ADD_TAG_REG = NOTSUPPORTED,
++	.REMOVE_TAG_REG = NOTSUPPORTED,
++
++	.SIMPLE_VLAN_REGISTERS = 0,
++
++	.VLAN_LOOKUP_REG = NOTSUPPORTED,
++	.VLAN_LOOKUP_REG_5 = NOTSUPPORTED,
++	.TAG_VLAN_MASK_REG = NOTSUPPORTED,
++
++	.RESET_VAL = 0x175D,
++	.RESET_REG = {20,2},
++	.MODE_REG = NOTSUPPORTED,
++
++	.ROUTER_CONTROL_REG = NOTSUPPORTED,
++	.ROUTER_EN_BIT = -1,
++	.NUMLAN_GROUPS_BIT = -1,
++
++	.VLAN_CONTROL_REG = NOTSUPPORTED,
++	.TAG_VLAN_BIT = -1,
++
++	.NUM_PORTS = 6,
++	.CPU_PORT = 5,
++
++	.MII_REGISTER_EN = NOTSUPPORTED,
++
++	.update_state = ip175d_update_state,
++	.set_vlan_mode = ip175d_set_vlan_mode,
++	.reset = ip175d_reset,
++};
++
++struct ip17xx_state {
++	struct switch_dev dev;
++	struct mii_bus *mii_bus;
++	bool registered;
++
++	int router_mode;		// ROUTER_EN
++	int vlan_enabled;		// TAG_VLAN_EN
++	struct port_state {
++		u16 pvid;
++		unsigned int shareports;
++	} ports[MAX_PORTS];
++	unsigned int add_tag;
++	unsigned int remove_tag;
++	int num_vlans;
++	struct vlan_state {
++		unsigned int ports;
++		unsigned int tag;	// VLAN tag (IP175D only)
++	} vlans[MAX_VLANS];
++	const struct register_mappings *regs;
++	reg proc_mii; 	// phy/reg for the low level register access via swconfig
++
++	char buf[80];
++};
++
++#define get_state(_dev) container_of((_dev), struct ip17xx_state, dev)
++
++static int ip_phy_read(struct ip17xx_state *state, int port, int reg)
++{
++	int val = mdiobus_read(state->mii_bus, port, reg);
++	if (val < 0)
++		pr_warn("IP17xx: Unable to get MII register %d,%d: error %d\n", port, reg, -val);
++#ifdef DUMP_MII_IO
++	else
++		pr_debug("IP17xx: Read MII(%d,%d) -> %04x\n", port, reg, val);
++#endif
++	return val;
++}
++
++static int ip_phy_write(struct ip17xx_state *state, int port, int reg, u16 val)
++{
++	int err;
++
++#ifdef DUMP_MII_IO
++	pr_debug("IP17xx: Write MII(%d,%d) <- %04x\n", port, reg, val);
++#endif
++	err = mdiobus_write(state->mii_bus, port, reg, val);
++	if (err < 0)
++		pr_warn("IP17xx: Unable to write MII register %d,%d: error %d\n", port, reg, -err);
++	return err;
++}
++
++static int ip_phy_write_masked(struct ip17xx_state *state, int port, int reg, unsigned int mask, unsigned int data)
++{
++	int val = ip_phy_read(state, port, reg);
++	if (val < 0)
++		return 0;
++	return ip_phy_write(state, port, reg, (val & ~mask) | data);
++}
++
++static int getPhy(struct ip17xx_state *state, reg mii)
++{
++	if (!REG_SUPP(mii))
++		return -EFAULT;
++	return ip_phy_read(state, mii.p, mii.m);
++}
++
++static int setPhy(struct ip17xx_state *state, reg mii, u16 value)
++{
++	int err;
++
++	if (!REG_SUPP(mii))
++		return -EFAULT;
++	err = ip_phy_write(state, mii.p, mii.m, value);
++	if (err < 0)
++		return err;
++	mdelay(2);
++	getPhy(state, mii);
++	return 0;
++}
++
++
++/**
++ * These two macros are to simplify the mapping of logical bits to the bits in hardware.
++ * NOTE: these macros will return if there is an error!
++ */
++
++#define GET_PORT_BITS(state, bits, addr, bit_lookup)		\
++	do {							\
++		int i, val = getPhy((state), (addr));		\
++		if (val < 0)					\
++			return val;				\
++		(bits) = 0;					\
++		for (i = 0; i < MAX_PORTS; i++) {		\
++			if ((bit_lookup)[i] == -1) continue;	\
++			if (val & (1<<(bit_lookup)[i]))		\
++				(bits) |= (1<<i);		\
++		}						\
++	} while (0)
++
++#define SET_PORT_BITS(state, bits, addr, bit_lookup)		\
++	do {							\
++		int i, val = getPhy((state), (addr));		\
++		if (val < 0)					\
++			return val;				\
++		for (i = 0; i < MAX_PORTS; i++) {		\
++			unsigned int newmask = ((bits)&(1<<i));	\
++			if ((bit_lookup)[i] == -1) continue;	\
++			val &= ~(1<<(bit_lookup)[i]);		\
++			val |= ((newmask>>i)<<(bit_lookup)[i]);	\
++		}						\
++		val = setPhy((state), (addr), val);		\
++		if (val < 0)					\
++			return val;				\
++	} while (0)
++
++
++static int get_model(struct ip17xx_state *state)
++{
++	int id1, id2;
++	int oui_id, model_no, rev_no, chip_no;
++
++	id1 = ip_phy_read(state, 0, 2);
++	id2 = ip_phy_read(state, 0, 3);
++	oui_id = (id1 << 6) | ((id2 >> 10) & 0x3f);
++	model_no = (id2 >> 4) & 0x3f;
++	rev_no = id2 & 0xf;
++	pr_debug("IP17xx: Identified oui=%06x model=%02x rev=%X\n", oui_id, model_no, rev_no);
++
++	if (oui_id != 0x0090c3)  // No other oui_id should have reached us anyway
++		return -ENODEV;
++
++	if (model_no == IP175A.MODEL_NO) {
++		state->regs = &IP175A;
++	} else if (model_no == IP175C.MODEL_NO) {
++		/*
++		 *  Several models share the same model_no:
++		 *  178C has more PHYs, so we try whether the device responds to a read from PHY5
++		 *  175D has a new chip ID register
++		 *  175C has neither
++		 */
++		if (ip_phy_read(state, 5, 2) == 0x0243) {
++			state->regs = &IP178C;
++		} else {
++			chip_no = ip_phy_read(state, 20, 0);
++			pr_debug("IP17xx: Chip ID register reads %04x\n", chip_no);
++			if (chip_no == 0x175d) {
++				state->regs = &IP175D;
++			} else {
++				state->regs = &IP175C;
++			}
++		}
++	} else {
++		pr_warn("IP17xx: Found an unknown IC+ switch with model number %02x, revision %X.\n", model_no, rev_no);
++		return -EPERM;
++	}
++	return 0;
++}
++
++/*** Low-level functions for the older models ***/
++
++/** Only set vlan and router flags in the switch **/
++static int ip175c_set_flags(struct ip17xx_state *state)
++{
++	int val;
++
++	if (!REG_SUPP(state->regs->ROUTER_CONTROL_REG)) {
++		return 0;
++	}
++
++	val = getPhy(state, state->regs->ROUTER_CONTROL_REG);
++	if (val < 0) {
++		return val;
++	}
++	if (state->regs->ROUTER_EN_BIT >= 0) {
++		if (state->router_mode) {
++			val |= (1<<state->regs->ROUTER_EN_BIT);
++		} else {
++			val &= (~(1<<state->regs->ROUTER_EN_BIT));
++		}
++	}
++	if (state->regs->TAG_VLAN_BIT >= 0) {
++		if (state->vlan_enabled) {
++			val |= (1<<state->regs->TAG_VLAN_BIT);
++		} else {
++			val &= (~(1<<state->regs->TAG_VLAN_BIT));
++		}
++	}
++	if (state->regs->NUMLAN_GROUPS_BIT >= 0) {
++		val &= (~((state->regs->NUMLAN_GROUPS_MAX-1)<<state->regs->NUMLAN_GROUPS_BIT));
++		if (state->num_vlans > state->regs->NUMLAN_GROUPS_MAX) {
++			val |= state->regs->NUMLAN_GROUPS_MAX << state->regs->NUMLAN_GROUPS_BIT;
++		} else if (state->num_vlans >= 1) {
++			val |= (state->num_vlans-1) << state->regs->NUMLAN_GROUPS_BIT;
++		}
++	}
++	return setPhy(state, state->regs->ROUTER_CONTROL_REG, val);
++}
++
++/** Set all VLAN and port state.  Usually you should call "correct_vlan_state" first. **/
++static int ip175c_set_state(struct ip17xx_state *state)
++{
++	int j;
++	int i;
++	SET_PORT_BITS(state, state->add_tag,
++				  state->regs->ADD_TAG_REG, state->regs->ADD_TAG_BIT);
++	SET_PORT_BITS(state, state->remove_tag,
++				  state->regs->REMOVE_TAG_REG, state->regs->REMOVE_TAG_BIT);
++
++	if (REG_SUPP(state->regs->VLAN_LOOKUP_REG)) {
++		for (j=0; j<state->regs->NUM_PORTS; j++) {
++			reg addr;
++			const bitnum *bit_lookup = (j%2==0)?
++				state->regs->VLAN_LOOKUP_EVEN_BIT:
++				state->regs->VLAN_LOOKUP_ODD_BIT;
++
++			addr = state->regs->VLAN_LOOKUP_REG;
++			if (state->regs->SIMPLE_VLAN_REGISTERS) {
++				addr.m += j;
++			} else {
++				switch (j) {
++				case 0:
++				case 1:
++					break;
++				case 2:
++				case 3:
++					addr.m+=1;
++					break;
++				case 4:
++					addr.m+=2;
++					break;
++				case 5:
++					addr = state->regs->VLAN_LOOKUP_REG_5;
++					break;
++				default:
++					addr.m = -1; // shouldn't get here, but...
++					break;
++				}
++			}
++			//printf("shareports for %d is %02X\n",j,state->ports[j].shareports);
++			if (REG_SUPP(addr)) {
++				SET_PORT_BITS(state, state->ports[j].shareports, addr, bit_lookup);
++			}
++		}
++	}
++	if (REG_SUPP(state->regs->TAG_VLAN_MASK_REG)) {
++		for (j=0; j<MAX_VLANS; j++) {
++			reg addr = state->regs->TAG_VLAN_MASK_REG;
++			const bitnum *bit_lookup = (j%2==0)?
++				state->regs->TAG_VLAN_MASK_EVEN_BIT:
++				state->regs->TAG_VLAN_MASK_ODD_BIT;
++			unsigned int vlan_mask;
++			if (state->regs->SIMPLE_VLAN_REGISTERS) {
++				addr.m += j;
++			} else {
++				addr.m += j/2;
++			}
++			vlan_mask = state->vlans[j].ports;
++			SET_PORT_BITS(state, vlan_mask, addr, bit_lookup);
++		}
++	}
++
++	for (i=0; i<MAX_PORTS; i++) {
++		if (REG_SUPP(state->regs->VLAN_DEFAULT_TAG_REG[i])) {
++			int err = setPhy(state, state->regs->VLAN_DEFAULT_TAG_REG[i],
++					state->ports[i].pvid);
++			if (err < 0) {
++				return err;
++			}
++		}
++	}
++
++	return ip175c_set_flags(state);
++}
++
++/**
++ *  Uses only the VLAN port mask and the add tag mask to generate the other fields:
++ *  which ports are part of the same VLAN, removing vlan tags, and VLAN tag ids.
++ */
++static void ip175c_correct_vlan_state(struct ip17xx_state *state)
++{
++	int i, j;
++	state->num_vlans = 0;
++	for (i=0; i<MAX_VLANS; i++) {
++		if (state->vlans[i].ports != 0) {
++			state->num_vlans = i+1; // Hack -- we need to store the "set" vlans somewhere...
++		}
++	}
++
++	for (i=0; i<state->regs->NUM_PORTS; i++) {
++		unsigned int portmask = (1<<i);
++		if (!state->vlan_enabled) {
++			// Share with everybody!
++			state->ports[i].shareports = (1<<state->regs->NUM_PORTS)-1;
++			continue;
++		}
++		state->ports[i].shareports = portmask;
++		for (j=0; j<MAX_VLANS; j++) {
++			if (state->vlans[j].ports & portmask)
++				state->ports[i].shareports |= state->vlans[j].ports;
++		}
++	}
++}
++
++static int ip175c_update_state(struct ip17xx_state *state)
++{
++	ip175c_correct_vlan_state(state);
++	return ip175c_set_state(state);
++}
++
++static int ip175c_set_vlan_mode(struct ip17xx_state *state)
++{
++	return ip175c_update_state(state);
++}
++
++static int ip175c_reset(struct ip17xx_state *state)
++{
++	int err;
++
++	if (REG_SUPP(state->regs->MODE_REG)) {
++		err = setPhy(state, state->regs->MODE_REG, state->regs->MODE_VAL);
++		if (err < 0)
++			return err;
++		err = getPhy(state, state->regs->MODE_REG);
++		if (err < 0)
++			return err;
++	}
++
++	return ip175c_update_state(state);
++}
++
++/*** Low-level functions for IP175D ***/
++
++static int ip175d_update_state(struct ip17xx_state *state)
++{
++	unsigned int filter_mask = 0;
++	unsigned int ports[16], add[16], rem[16];
++	int i, j;
++	int err = 0;
++
++	for (i = 0; i < 16; i++) {
++		ports[i] = 0;
++		add[i] = 0;
++		rem[i] = 0;
++		if (!state->vlan_enabled) {
++			err |= ip_phy_write(state, 22, 14+i, i+1);	// default tags
++			ports[i] = 0x3f;
++			continue;
++		}
++		if (!state->vlans[i].tag) {
++			// Reset the filter
++			err |= ip_phy_write(state, 22, 14+i, 0);	// tag
++			continue;
++		}
++		filter_mask |= 1 << i;
++		err |= ip_phy_write(state, 22, 14+i, state->vlans[i].tag);
++		ports[i] = state->vlans[i].ports;
++		for (j = 0; j < 6; j++) {
++			if (ports[i] & (1 << j)) {
++				if (state->add_tag & (1 << j))
++					add[i] |= 1 << j;
++				if (state->remove_tag & (1 << j))
++					rem[i] |= 1 << j;
++			}
++		}
++	}
++
++	// Port masks, tag adds and removals
++	for (i = 0; i < 8; i++) {
++		err |= ip_phy_write(state, 23, i, ports[2*i] | (ports[2*i+1] << 8));
++		err |= ip_phy_write(state, 23, 8+i, add[2*i] | (add[2*i+1] << 8));
++		err |= ip_phy_write(state, 23, 16+i, rem[2*i] | (rem[2*i+1] << 8));
++	}
++	err |= ip_phy_write(state, 22, 10, filter_mask);
++
++	// Default VLAN tag for each port
++	for (i = 0; i < 6; i++)
++		err |= ip_phy_write(state, 22, 4+i, state->vlans[state->ports[i].pvid].tag);
++
++	return (err ? -EIO : 0);
++}
++
++static int ip175d_set_vlan_mode(struct ip17xx_state *state)
++{
++	int i;
++	int err = 0;
++
++	if (state->vlan_enabled) {
++		// VLAN classification rules: tag-based VLANs, use VID to classify,
++		// drop packets that cannot be classified.
++		err |= ip_phy_write_masked(state, 22, 0, 0x3fff, 0x003f);
++
++		// Ingress rules: CFI=1 dropped, null VID is untagged, VID=1 passed,
++		// VID=0xfff discarded, admin both tagged and untagged, ingress
++		// filters enabled.
++		err |= ip_phy_write_masked(state, 22, 1, 0x0fff, 0x0c3f);
++
++		// Egress rules: IGMP processing off, keep VLAN header off
++		err |= ip_phy_write_masked(state, 22, 2, 0x0fff, 0x0000);
++	} else {
++		// VLAN classification rules: everything off & clear table
++		err |= ip_phy_write_masked(state, 22, 0, 0xbfff, 0x8000);
++
++		// Ingress and egress rules: set to defaults
++		err |= ip_phy_write_masked(state, 22, 1, 0x0fff, 0x0c3f);
++		err |= ip_phy_write_masked(state, 22, 2, 0x0fff, 0x0000);
++	}
++
++	// Reset default VLAN for each port to 0
++	for (i = 0; i < 6; i++)
++		state->ports[i].pvid = 0;
++
++	err |= ip175d_update_state(state);
++
++	return (err ? -EIO : 0);
++}
++
++static int ip175d_reset(struct ip17xx_state *state)
++{
++	int err = 0;
++
++	// Disable the special tagging mode
++	err |= ip_phy_write_masked(state, 21, 22, 0x0003, 0x0000);
++
++	// Set 802.1q protocol type
++	err |= ip_phy_write(state, 22, 3, 0x8100);
++
++	state->vlan_enabled = 0;
++	err |= ip175d_set_vlan_mode(state);
++
++	return (err ? -EIO : 0);
++}
++
++/*** High-level functions ***/
++
++static int ip17xx_get_enable_vlan(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++
++	val->value.i = state->vlan_enabled;
++	return 0;
++}
++
++static void ip17xx_reset_vlan_config(struct ip17xx_state *state)
++{
++	int i;
++
++	state->remove_tag = (state->vlan_enabled ? ((1<<state->regs->NUM_PORTS)-1) : 0x0000);
++	state->add_tag = 0x0000;
++	for (i = 0; i < MAX_VLANS; i++) {
++		state->vlans[i].ports = 0x0000;
++		state->vlans[i].tag = (i ? i : 16);
++	}
++	for (i = 0; i < MAX_PORTS; i++)
++		state->ports[i].pvid = 0;
++}
++
++static int ip17xx_set_enable_vlan(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++	int enable;
++
++	enable = val->value.i;
++	if (state->vlan_enabled == enable) {
++		// Do not change any state.
++		return 0;
++	}
++	state->vlan_enabled = enable;
++
++	// Otherwise, if we are switching state, set fields to a known default.
++	ip17xx_reset_vlan_config(state);
++
++	return state->regs->set_vlan_mode(state);
++}
++
++static int ip17xx_get_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++	int b;
++	int ind;
++	unsigned int ports;
++
++	if (val->port_vlan >= dev->vlans || val->port_vlan < 0)
++		return -EINVAL;
++
++	ports = state->vlans[val->port_vlan].ports;
++	b = 0;
++	ind = 0;
++	while (b < MAX_PORTS) {
++		if (ports&1) {
++			int istagged = ((state->add_tag >> b) & 1);
++			val->value.ports[ind].id = b;
++			val->value.ports[ind].flags = (istagged << SWITCH_PORT_FLAG_TAGGED);
++			ind++;
++		}
++		b++;
++		ports >>= 1;
++	}
++	val->len = ind;
++
++	return 0;
++}
++
++static int ip17xx_set_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++	int i;
++
++	if (val->port_vlan >= dev->vlans || val->port_vlan < 0)
++		return -EINVAL;
++
++	state->vlans[val->port_vlan].ports = 0;
++	for (i = 0; i < val->len; i++) {
++		unsigned int bitmask = (1<<val->value.ports[i].id);
++		state->vlans[val->port_vlan].ports |= bitmask;
++		if (val->value.ports[i].flags & (1<<SWITCH_PORT_FLAG_TAGGED)) {
++			state->add_tag |= bitmask;
++			state->remove_tag &= (~bitmask);
++		} else {
++			state->add_tag &= (~bitmask);
++			state->remove_tag |= bitmask;
++		}
++	}
++
++	return state->regs->update_state(state);
++}
++
++static int ip17xx_apply(struct switch_dev *dev)
++{
++	struct ip17xx_state *state = get_state(dev);
++
++	if (REG_SUPP(state->regs->MII_REGISTER_EN)) {
++		int val = getPhy(state, state->regs->MII_REGISTER_EN);
++		if (val < 0) {
++			return val;
++		}
++		val |= (1<<state->regs->MII_REGISTER_EN_BIT);
++		return setPhy(state, state->regs->MII_REGISTER_EN, val);
++	}
++	return 0;
++}
++
++static int ip17xx_reset(struct switch_dev *dev)
++{
++	struct ip17xx_state *state = get_state(dev);
++	int i, err;
++
++	if (REG_SUPP(state->regs->RESET_REG)) {
++		err = setPhy(state, state->regs->RESET_REG, state->regs->RESET_VAL);
++		if (err < 0)
++			return err;
++		err = getPhy(state, state->regs->RESET_REG);
++
++		/*
++		 *  Data sheet specifies reset period to be 2 msec.
++		 *  (I don't see any mention of the 2ms delay in the IP178C spec, only
++		 *  in IP175C, but it can't hurt.)
++		 */
++		mdelay(2);
++	}
++
++	/* reset switch ports */
++	for (i = 0; i < state->regs->NUM_PORTS-1; i++) {
++		err = ip_phy_write(state, i, MII_BMCR, BMCR_RESET);
++		if (err < 0)
++			return err;
++	}
++
++	state->router_mode = 0;
++	state->vlan_enabled = 0;
++	ip17xx_reset_vlan_config(state);
++
++	return state->regs->reset(state);
++}
++
++static int ip17xx_get_tagged(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++
++	if (state->add_tag & (1<<val->port_vlan)) {
++		if (state->remove_tag & (1<<val->port_vlan))
++			val->value.i = 3; // shouldn't ever happen.
++		else
++			val->value.i = 1;
++	} else {
++		if (state->remove_tag & (1<<val->port_vlan))
++			val->value.i = 0;
++		else
++			val->value.i = 2;
++	}
++	return 0;
++}
++
++static int ip17xx_set_tagged(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++
++	state->add_tag &= ~(1<<val->port_vlan);
++	state->remove_tag &= ~(1<<val->port_vlan);
++
++	if (val->value.i == 0)
++		state->remove_tag |= (1<<val->port_vlan);
++	if (val->value.i == 1)
++		state->add_tag |= (1<<val->port_vlan);
++
++	return state->regs->update_state(state);
++}
++
++/** Get the current phy address */
++static int ip17xx_get_phy(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++
++	val->value.i = state->proc_mii.p;
++	return 0;
++}
++
++/** Set a new phy address for low level access to registers */
++static int ip17xx_set_phy(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++	int new_reg = val->value.i;
++
++	if (new_reg < 0 || new_reg > 31)
++		state->proc_mii.p = (u16)-1;
++	else
++		state->proc_mii.p = (u16)new_reg;
++	return 0;
++}
++
++/** Get the current register number */
++static int ip17xx_get_reg(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++
++	val->value.i = state->proc_mii.m;
++	return 0;
++}
++
++/** Set a new register address for low level access to registers */
++static int ip17xx_set_reg(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++	int new_reg = val->value.i;
++
++	if (new_reg < 0 || new_reg > 31)
++		state->proc_mii.m = (u16)-1;
++	else
++		state->proc_mii.m = (u16)new_reg;
++	return 0;
++}
++
++/** Get the register content of state->proc_mii */
++static int ip17xx_get_val(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++	int retval = -EINVAL;
++	if (REG_SUPP(state->proc_mii))
++		retval = getPhy(state, state->proc_mii);
++
++	if (retval < 0) {
++		return retval;
++	} else {
++		val->value.i = retval;
++		return 0;
++	}
++}
++
++/** Write a value to the register defined by phy/reg above */
++static int ip17xx_set_val(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++	int myval, err = -EINVAL;
++
++	myval = val->value.i;
++	if (myval <= 0xffff && myval >= 0 && REG_SUPP(state->proc_mii)) {
++		err = setPhy(state, state->proc_mii, (u16)myval);
++	}
++	return err;
++}
++
++static int ip17xx_read_name(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++	val->value.s = state->regs->NAME; // Just a const pointer, won't be freed by swconfig.
++	return 0;
++}
++
++static int ip17xx_get_tag(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++	int vlan = val->port_vlan;
++
++	if (vlan < 0 || vlan >= MAX_VLANS)
++		return -EINVAL;
++
++	val->value.i = state->vlans[vlan].tag;
++	return 0;
++}
++
++static int ip17xx_set_tag(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++	int vlan = val->port_vlan;
++	int tag = val->value.i;
++
++	if (vlan < 0 || vlan >= MAX_VLANS)
++		return -EINVAL;
++
++	if (tag < 0 || tag > 4095)
++		return -EINVAL;
++
++	state->vlans[vlan].tag = tag;
++	return state->regs->update_state(state);
++}
++
++static int ip17xx_set_port_speed(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++	int nr = val->port_vlan;
++	int ctrl;
++	int autoneg;
++	int speed;
++	if (val->value.i == 100) {
++		speed = 1;
++		autoneg = 0;
++	} else if (val->value.i == 10) {
++		speed = 0;
++		autoneg = 0;
++	} else {
++		autoneg = 1;
++		speed = 1;
++	}
++
++	/* Can't set speed for cpu port */
++	if (nr == state->regs->CPU_PORT)
++		return -EINVAL;
++
++	if (nr >= dev->ports || nr < 0)
++		return -EINVAL;
++
++	ctrl = ip_phy_read(state, nr, 0);
++	if (ctrl < 0)
++		return -EIO;
++
++	ctrl &= (~(1<<12));
++	ctrl &= (~(1<<13));
++	ctrl |= (autoneg<<12);
++	ctrl |= (speed<<13);
++
++	return ip_phy_write(state, nr, 0, ctrl);
++}
++
++static int ip17xx_get_port_speed(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++	int nr = val->port_vlan;
++	int speed, status;
++
++	if (nr == state->regs->CPU_PORT) {
++		val->value.i = 100;
++		return 0;
++	}
++
++	if (nr >= dev->ports || nr < 0)
++		return -EINVAL;
++
++	status = ip_phy_read(state, nr, 1);
++	speed = ip_phy_read(state, nr, 18);
++	if (status < 0 || speed < 0)
++		return -EIO;
++
++	if (status & 4)
++		val->value.i = ((speed & (1<<11)) ? 100 : 10);
++	else
++		val->value.i = 0;
++
++	return 0;
++}
++
++static int ip17xx_get_port_status(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++	int ctrl, speed, status;
++	int nr = val->port_vlan;
++	int len;
++	char *buf = state->buf; // fixed-length at 80.
++
++	if (nr == state->regs->CPU_PORT) {
++		sprintf(buf, "up, 100 Mbps, cpu port");
++		val->value.s = buf;
++		return 0;
++	}
++
++	if (nr >= dev->ports || nr < 0)
++		return -EINVAL;
++
++	ctrl = ip_phy_read(state, nr, 0);
++	status = ip_phy_read(state, nr, 1);
++	speed = ip_phy_read(state, nr, 18);
++	if (ctrl < 0 || status < 0 || speed < 0)
++		return -EIO;
++
++	if (status & 4)
++		len = sprintf(buf, "up, %d Mbps, %s duplex",
++			((speed & (1<<11)) ? 100 : 10),
++			((speed & (1<<10)) ? "full" : "half"));
++	else
++		len = sprintf(buf, "down");
++
++	if (ctrl & (1<<12)) {
++		len += sprintf(buf+len, ", auto-negotiate");
++		if (!(status & (1<<5)))
++			len += sprintf(buf+len, " (in progress)");
++	} else {
++		len += sprintf(buf+len, ", fixed speed (%d)",
++			((ctrl & (1<<13)) ? 100 : 10));
++	}
++
++	buf[len] = '\0';
++	val->value.s = buf;
++	return 0;
++}
++
++static int ip17xx_get_pvid(struct switch_dev *dev, int port, int *val)
++{
++	struct ip17xx_state *state = get_state(dev);
++
++	*val = state->ports[port].pvid;
++	return 0;
++}
++
++static int ip17xx_set_pvid(struct switch_dev *dev, int port, int val)
++{
++	struct ip17xx_state *state = get_state(dev);
++
++	if (val < 0 || val >= MAX_VLANS)
++		return -EINVAL;
++
++	state->ports[port].pvid = val;
++	return state->regs->update_state(state);
++}
++
++
++enum Ports {
++	IP17XX_PORT_STATUS,
++	IP17XX_PORT_LINK,
++	IP17XX_PORT_TAGGED,
++	IP17XX_PORT_PVID,
++};
++
++enum Globals {
++	IP17XX_ENABLE_VLAN,
++	IP17XX_GET_NAME,
++	IP17XX_REGISTER_PHY,
++	IP17XX_REGISTER_MII,
++	IP17XX_REGISTER_VALUE,
++	IP17XX_REGISTER_ERRNO,
++};
++
++enum Vlans {
++	IP17XX_VLAN_TAG,
++};
++
++static const struct switch_attr ip17xx_global[] = {
++	[IP17XX_ENABLE_VLAN] = {
++		.id = IP17XX_ENABLE_VLAN,
++		.type = SWITCH_TYPE_INT,
++		.name  = "enable_vlan",
++		.description = "Flag to enable or disable VLANs and tagging",
++		.get  = ip17xx_get_enable_vlan,
++		.set = ip17xx_set_enable_vlan,
++	},
++	[IP17XX_GET_NAME] = {
++		.id = IP17XX_GET_NAME,
++		.type = SWITCH_TYPE_STRING,
++		.description = "Returns the type of IC+ chip.",
++		.name  = "name",
++		.get  = ip17xx_read_name,
++		.set = NULL,
++	},
++	/* jal: added for low level debugging etc. */
++	[IP17XX_REGISTER_PHY] = {
++		.id = IP17XX_REGISTER_PHY,
++		.type = SWITCH_TYPE_INT,
++		.description = "Direct register access: set PHY (0-4, or 29,30,31)",
++		.name  = "phy",
++		.get  = ip17xx_get_phy,
++		.set = ip17xx_set_phy,
++	},
++	[IP17XX_REGISTER_MII] = {
++		.id = IP17XX_REGISTER_MII,
++		.type = SWITCH_TYPE_INT,
++		.description = "Direct register access: set MII register number (0-31)",
++		.name  = "reg",
++		.get  = ip17xx_get_reg,
++		.set = ip17xx_set_reg,
++	},
++	[IP17XX_REGISTER_VALUE] = {
++		.id = IP17XX_REGISTER_VALUE,
++		.type = SWITCH_TYPE_INT,
++		.description = "Direct register access: read/write to register (0-65535)",
++		.name  = "val",
++		.get  = ip17xx_get_val,
++		.set = ip17xx_set_val,
++	},
++};
++
++static const struct switch_attr ip17xx_vlan[] = {
++	[IP17XX_VLAN_TAG] = {
++		.id = IP17XX_VLAN_TAG,
++		.type = SWITCH_TYPE_INT,
++		.description = "VLAN ID (0-4095) [IP175D only]",
++		.name = "vid",
++		.get = ip17xx_get_tag,
++		.set = ip17xx_set_tag,
++	}
++};
++
++static const struct switch_attr ip17xx_port[] = {
++	[IP17XX_PORT_STATUS] = {
++		.id = IP17XX_PORT_STATUS,
++		.type = SWITCH_TYPE_STRING,
++		.description = "Returns Detailed port status",
++		.name  = "status",
++		.get  = ip17xx_get_port_status,
++		.set = NULL,
++	},
++	[IP17XX_PORT_LINK] = {
++		.id = IP17XX_PORT_LINK,
++		.type = SWITCH_TYPE_INT,
++		.description = "Link speed. Can write 0 for auto-negotiate, or 10 or 100",
++		.name  = "link",
++		.get  = ip17xx_get_port_speed,
++		.set = ip17xx_set_port_speed,
++	},
++	[IP17XX_PORT_TAGGED] = {
++		.id = IP17XX_PORT_LINK,
++		.type = SWITCH_TYPE_INT,
++		.description = "0 = untag, 1 = add tags, 2 = do not alter (This value is reset if vlans are altered)",
++		.name  = "tagged",
++		.get  = ip17xx_get_tagged,
++		.set = ip17xx_set_tagged,
++	},
++};
++
++static const struct switch_dev_ops ip17xx_ops = {
++	.attr_global = {
++		.attr = ip17xx_global,
++		.n_attr = ARRAY_SIZE(ip17xx_global),
++	},
++	.attr_port = {
++		.attr = ip17xx_port,
++		.n_attr = ARRAY_SIZE(ip17xx_port),
++	},
++	.attr_vlan = {
++		.attr = ip17xx_vlan,
++		.n_attr = ARRAY_SIZE(ip17xx_vlan),
++	},
++
++	.get_port_pvid = ip17xx_get_pvid,
++	.set_port_pvid = ip17xx_set_pvid,
++	.get_vlan_ports = ip17xx_get_ports,
++	.set_vlan_ports = ip17xx_set_ports,
++	.apply_config = ip17xx_apply,
++	.reset_switch = ip17xx_reset,
++};
++
++static int ip17xx_probe(struct phy_device *pdev)
++{
++	struct ip17xx_state *state;
++	struct switch_dev *dev;
++	int err;
++
++	/* We only attach to PHY 0, but use all available PHYs */
++	if (pdev->mdio.addr != 0)
++		return -ENODEV;
++
++	state = kzalloc(sizeof(*state), GFP_KERNEL);
++	if (!state)
++		return -ENOMEM;
++
++	dev = &state->dev;
++
++	pdev->priv = state;
++	state->mii_bus = pdev->mdio.bus;
++
++	err = get_model(state);
++	if (err < 0)
++		goto error;
++
++	dev->vlans = MAX_VLANS;
++	dev->cpu_port = state->regs->CPU_PORT;
++	dev->ports = state->regs->NUM_PORTS;
++	dev->name = state->regs->NAME;
++	dev->ops = &ip17xx_ops;
++
++	pr_info("IP17xx: Found %s at %s\n", dev->name, dev_name(&pdev->mdio.dev));
++	return 0;
++
++error:
++	kfree(state);
++	return err;
++}
++
++static int ip17xx_config_init(struct phy_device *pdev)
++{
++	struct ip17xx_state *state = pdev->priv;
++	struct net_device *dev = pdev->attached_dev;
++	int err;
++
++	err = register_switch(&state->dev, dev);
++	if (err < 0)
++		return err;
++
++	state->registered = true;
++	ip17xx_reset(&state->dev);
++	return 0;
++}
++
++static void ip17xx_remove(struct phy_device *pdev)
++{
++	struct ip17xx_state *state = pdev->priv;
++
++	if (state->registered)
++		unregister_switch(&state->dev);
++	kfree(state);
++}
++
++static int ip17xx_config_aneg(struct phy_device *pdev)
++{
++	return 0;
++}
++
++static int ip17xx_aneg_done(struct phy_device *pdev)
++{
++	return 1;	/* Return any positive value */
++}
++
++static int ip17xx_read_status(struct phy_device *pdev)
++{
++	pdev->speed = SPEED_100;
++	pdev->duplex = DUPLEX_FULL;
++	pdev->pause = pdev->asym_pause = 0;
++	pdev->link = 1;
++
++	return 0;
++}
++
++static struct phy_driver ip17xx_driver[] = {
++	{
++		.name		= "IC+ IP17xx",
++		.phy_id		= 0x02430c00,
++		.phy_id_mask	= 0x0ffffc00,
++		.features	= PHY_BASIC_FEATURES,
++		.probe		= ip17xx_probe,
++		.remove		= ip17xx_remove,
++		.config_init	= ip17xx_config_init,
++		.config_aneg	= ip17xx_config_aneg,
++		.aneg_done	= ip17xx_aneg_done,
++		.read_status	= ip17xx_read_status,
++	}
++};
++
++module_phy_driver(ip17xx_driver);
++
++MODULE_AUTHOR("Patrick Horn <patrick.horn@gmail.com>");
++MODULE_AUTHOR("Felix Fietkau <nbd@nbd.name>");
++MODULE_AUTHOR("Martin Mares <mj@ucw.cz>");
++MODULE_LICENSE("GPL");
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/mvswitch.c b/target/linux/generic/files-5.4/drivers/net/phy/mvswitch.c
+new file mode 100644
+index 0000000000..bd3b9e1ad1
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/mvswitch.c
+@@ -0,0 +1,446 @@
++/*
++ * Marvell 88E6060 switch driver
++ * Copyright (c) 2008 Felix Fietkau <nbd@nbd.name>
++ *
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of the GNU General Public License v2 as published by the
++ * Free Software Foundation
++ */
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/errno.h>
++#include <linux/unistd.h>
++#include <linux/slab.h>
++#include <linux/interrupt.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++#include <linux/netdevice.h>
++#include <linux/etherdevice.h>
++#include <linux/skbuff.h>
++#include <linux/spinlock.h>
++#include <linux/mm.h>
++#include <linux/module.h>
++#include <linux/mii.h>
++#include <linux/ethtool.h>
++#include <linux/phy.h>
++#include <linux/if_vlan.h>
++#include <linux/version.h>
++
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/uaccess.h>
++#include "mvswitch.h"
++
++/* Undefine this to use trailer mode instead.
++ * I don't know if header mode works with all chips */
++#define HEADER_MODE	1
++
++MODULE_DESCRIPTION("Marvell 88E6060 Switch driver");
++MODULE_AUTHOR("Felix Fietkau");
++MODULE_LICENSE("GPL");
++
++#define MVSWITCH_MAGIC 0x88E6060
++
++struct mvswitch_priv {
++	netdev_features_t orig_features;
++	u8 vlans[16];
++};
++
++#define to_mvsw(_phy) ((struct mvswitch_priv *) (_phy)->priv)
++
++static inline u16
++r16(struct phy_device *phydev, int addr, int reg)
++{
++	struct mii_bus *bus = phydev->mdio.bus;
++
++	return bus->read(bus, addr, reg);
++}
++
++static inline void
++w16(struct phy_device *phydev, int addr, int reg, u16 val)
++{
++	struct mii_bus *bus = phydev->mdio.bus;
++
++	bus->write(bus, addr, reg, val);
++}
++
++
++static struct sk_buff *
++mvswitch_mangle_tx(struct net_device *dev, struct sk_buff *skb)
++{
++	struct mvswitch_priv *priv;
++	char *buf = NULL;
++	u16 vid;
++
++	priv = dev->phy_ptr;
++	if (unlikely(!priv))
++		goto error;
++
++	if (unlikely(skb->len < 16))
++		goto error;
++
++#ifdef HEADER_MODE
++	if (__vlan_hwaccel_get_tag(skb, &vid))
++		goto error;
++
++	if (skb_cloned(skb) || (skb->len <= 62) || (skb_headroom(skb) < MV_HEADER_SIZE)) {
++		if (pskb_expand_head(skb, MV_HEADER_SIZE, (skb->len < 62 ? 62 - skb->len : 0), GFP_ATOMIC))
++			goto error_expand;
++		if (skb->len < 62)
++			skb->len = 62;
++	}
++	buf = skb_push(skb, MV_HEADER_SIZE);
++#else
++	if (__vlan_get_tag(skb, &vid))
++		goto error;
++
++	if (unlikely((vid > 15 || !priv->vlans[vid])))
++		goto error;
++
++	if (skb->len <= 64) {
++		if (pskb_expand_head(skb, 0, 64 + MV_TRAILER_SIZE - skb->len, GFP_ATOMIC))
++			goto error_expand;
++
++		buf = skb->data + 64;
++		skb->len = 64 + MV_TRAILER_SIZE;
++	} else {
++		if (skb_cloned(skb) || unlikely(skb_tailroom(skb) < 4)) {
++			if (pskb_expand_head(skb, 0, 4, GFP_ATOMIC))
++				goto error_expand;
++		}
++		buf = skb_put(skb, 4);
++	}
++
++	/* move the ethernet header 4 bytes forward, overwriting the vlan tag */
++	memmove(skb->data + 4, skb->data, 12);
++	skb->data += 4;
++	skb->len -= 4;
++	skb->mac_header += 4;
++#endif
++
++	if (!buf)
++		goto error;
++
++
++#ifdef HEADER_MODE
++	/* prepend the tag */
++	*((__be16 *) buf) = cpu_to_be16(
++		((vid << MV_HEADER_VLAN_S) & MV_HEADER_VLAN_M) |
++		((priv->vlans[vid] << MV_HEADER_PORTS_S) & MV_HEADER_PORTS_M)
++	);
++#else
++	/* append the tag */
++	*((__be32 *) buf) = cpu_to_be32((
++		(MV_TRAILER_OVERRIDE << MV_TRAILER_FLAGS_S) |
++		((priv->vlans[vid] & MV_TRAILER_PORTS_M) << MV_TRAILER_PORTS_S)
++	));
++#endif
++
++	return skb;
++
++error_expand:
++	if (net_ratelimit())
++		printk("%s: failed to expand/update skb for the switch\n", dev->name);
++
++error:
++	/* any errors? drop the packet! */
++	dev_kfree_skb_any(skb);
++	return NULL;
++}
++
++static void
++mvswitch_mangle_rx(struct net_device *dev, struct sk_buff *skb)
++{
++	struct mvswitch_priv *priv;
++	unsigned char *buf;
++	int vlan = -1;
++	int i;
++
++	priv = dev->phy_ptr;
++	if (WARN_ON_ONCE(!priv))
++		return;
++
++#ifdef HEADER_MODE
++	buf = skb->data;
++	skb_pull(skb, MV_HEADER_SIZE);
++#else
++	buf = skb->data + skb->len - MV_TRAILER_SIZE;
++	if (buf[0] != 0x80)
++		return;
++#endif
++
++	/* look for the vlan matching the incoming port */
++	for (i = 0; i < ARRAY_SIZE(priv->vlans); i++) {
++		if ((1 << buf[1]) & priv->vlans[i])
++			vlan = i;
++	}
++
++	if (vlan == -1)
++		return;
++
++	__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
++}
++
++
++static int
++mvswitch_wait_mask(struct phy_device *pdev, int addr, int reg, u16 mask, u16 val)
++{
++	int i = 100;
++	u16 r;
++
++	do {
++		r = r16(pdev, addr, reg) & mask;
++		if (r == val)
++			return 0;
++	} while(--i > 0);
++	return -ETIMEDOUT;
++}
++
++static int
++mvswitch_config_init(struct phy_device *pdev)
++{
++	struct mvswitch_priv *priv = to_mvsw(pdev);
++	struct net_device *dev = pdev->attached_dev;
++	u8 vlmap = 0;
++	int i;
++
++	if (!dev)
++		return -EINVAL;
++
++	printk("%s: Marvell 88E6060 PHY driver attached.\n", dev->name);
++	linkmode_zero(pdev->supported);
++	linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, pdev->supported);
++	linkmode_copy(pdev->advertising, pdev->supported);
++	dev->phy_ptr = priv;
++	pdev->irq = PHY_POLL;
++#ifdef HEADER_MODE
++	dev->flags |= IFF_PROMISC;
++#endif
++
++	/* initialize default vlans */
++	for (i = 0; i < MV_PORTS; i++)
++		priv->vlans[(i == MV_WANPORT ? 2 : 1)] |= (1 << i);
++
++	/* before entering reset, disable all ports */
++	for (i = 0; i < MV_PORTS; i++)
++		w16(pdev, MV_PORTREG(CONTROL, i), 0x00);
++
++	msleep(2); /* wait for the status change to settle in */
++
++	/* put the ATU in reset */
++	w16(pdev, MV_SWITCHREG(ATU_CTRL), MV_ATUCTL_RESET);
++
++	i = mvswitch_wait_mask(pdev, MV_SWITCHREG(ATU_CTRL), MV_ATUCTL_RESET, 0);
++	if (i < 0) {
++		printk("%s: Timeout waiting for the switch to reset.\n", dev->name);
++		return i;
++	}
++
++	/* set the ATU flags */
++	w16(pdev, MV_SWITCHREG(ATU_CTRL),
++		MV_ATUCTL_NO_LEARN |
++		MV_ATUCTL_ATU_1K |
++		MV_ATUCTL_AGETIME(MV_ATUCTL_AGETIME_MIN) /* minimum without disabling ageing */
++	);
++
++	/* initialize the cpu port */
++	w16(pdev, MV_PORTREG(CONTROL, MV_CPUPORT),
++#ifdef HEADER_MODE
++		MV_PORTCTRL_HEADER |
++#else
++		MV_PORTCTRL_RXTR |
++		MV_PORTCTRL_TXTR |
++#endif
++		MV_PORTCTRL_ENABLED
++	);
++	/* wait for the phy change to settle in */
++	msleep(2);
++	for (i = 0; i < MV_PORTS; i++) {
++		u8 pvid = 0;
++		int j;
++
++		vlmap = 0;
++
++		/* look for the matching vlan */
++		for (j = 0; j < ARRAY_SIZE(priv->vlans); j++) {
++			if (priv->vlans[j] & (1 << i)) {
++				vlmap = priv->vlans[j];
++				pvid = j;
++			}
++		}
++		/* leave port unconfigured if it's not part of a vlan */
++		if (!vlmap)
++			continue;
++
++		/* add the cpu port to the allowed destinations list */
++		vlmap |= (1 << MV_CPUPORT);
++
++		/* take port out of its own vlan destination map */
++		vlmap &= ~(1 << i);
++
++		/* apply vlan settings */
++		w16(pdev, MV_PORTREG(VLANMAP, i),
++			MV_PORTVLAN_PORTS(vlmap) |
++			MV_PORTVLAN_ID(i)
++		);
++
++		/* re-enable port */
++		w16(pdev, MV_PORTREG(CONTROL, i),
++			MV_PORTCTRL_ENABLED
++		);
++	}
++
++	w16(pdev, MV_PORTREG(VLANMAP, MV_CPUPORT),
++		MV_PORTVLAN_ID(MV_CPUPORT)
++	);
++
++	/* set the port association vector */
++	for (i = 0; i <= MV_PORTS; i++) {
++		w16(pdev, MV_PORTREG(ASSOC, i),
++			MV_PORTASSOC_PORTS(1 << i)
++		);
++	}
++
++	/* init switch control */
++	w16(pdev, MV_SWITCHREG(CTRL),
++		MV_SWITCHCTL_MSIZE |
++		MV_SWITCHCTL_DROP
++	);
++
++	dev->eth_mangle_rx = mvswitch_mangle_rx;
++	dev->eth_mangle_tx = mvswitch_mangle_tx;
++	priv->orig_features = dev->features;
++
++#ifdef HEADER_MODE
++	dev->priv_flags |= IFF_NO_IP_ALIGN;
++	dev->features |= NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
++#else
++	dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
++#endif
++
++	return 0;
++}
++
++static int
++mvswitch_read_status(struct phy_device *pdev)
++{
++	pdev->speed = SPEED_100;
++	pdev->duplex = DUPLEX_FULL;
++	pdev->link = 1;
++
++	/* XXX ugly workaround: we can't force the switch
++	 * to gracefully handle hosts moving from one port to another,
++	 * so we have to regularly clear the ATU database */
++
++	/* wait for the ATU to become available */
++	mvswitch_wait_mask(pdev, MV_SWITCHREG(ATU_OP), MV_ATUOP_INPROGRESS, 0);
++
++	/* flush the ATU */
++	w16(pdev, MV_SWITCHREG(ATU_OP),
++		MV_ATUOP_INPROGRESS |
++		MV_ATUOP_FLUSH_ALL
++	);
++
++	/* wait for operation to complete */
++	mvswitch_wait_mask(pdev, MV_SWITCHREG(ATU_OP), MV_ATUOP_INPROGRESS, 0);
++
++	return 0;
++}
++
++static int
++mvswitch_aneg_done(struct phy_device *phydev)
++{
++	return 1;	/* Return any positive value */
++}
++
++static int
++mvswitch_config_aneg(struct phy_device *phydev)
++{
++	return 0;
++}
++
++static void
++mvswitch_detach(struct phy_device *pdev)
++{
++	struct mvswitch_priv *priv = to_mvsw(pdev);
++	struct net_device *dev = pdev->attached_dev;
++
++	if (!dev)
++		return;
++
++	dev->phy_ptr = NULL;
++	dev->eth_mangle_rx = NULL;
++	dev->eth_mangle_tx = NULL;
++	dev->features = priv->orig_features;
++	dev->priv_flags &= ~IFF_NO_IP_ALIGN;
++}
++
++static void
++mvswitch_remove(struct phy_device *pdev)
++{
++	struct mvswitch_priv *priv = to_mvsw(pdev);
++
++	kfree(priv);
++}
++
++static int
++mvswitch_probe(struct phy_device *pdev)
++{
++	struct mvswitch_priv *priv;
++
++	priv = kzalloc(sizeof(struct mvswitch_priv), GFP_KERNEL);
++	if (priv == NULL)
++		return -ENOMEM;
++
++	pdev->priv = priv;
++
++	return 0;
++}
++
++static int
++mvswitch_fixup(struct phy_device *dev)
++{
++	struct mii_bus *bus = dev->mdio.bus;
++	u16 reg;
++
++	if (dev->mdio.addr != 0x10)
++		return 0;
++
++	reg = bus->read(bus, MV_PORTREG(IDENT, 0)) & MV_IDENT_MASK;
++	if (reg != MV_IDENT_VALUE)
++		return 0;
++
++	dev->phy_id = MVSWITCH_MAGIC;
++	return 0;
++}
++
++
++static struct phy_driver mvswitch_driver = {
++	.name		= "Marvell 88E6060",
++	.phy_id		= MVSWITCH_MAGIC,
++	.phy_id_mask	= 0xffffffff,
++	.features	= PHY_BASIC_FEATURES,
++	.probe		= &mvswitch_probe,
++	.remove		= &mvswitch_remove,
++	.detach		= &mvswitch_detach,
++	.config_init	= &mvswitch_config_init,
++	.config_aneg	= &mvswitch_config_aneg,
++	.aneg_done	= &mvswitch_aneg_done,
++	.read_status	= &mvswitch_read_status,
++};
++
++static int __init
++mvswitch_init(void)
++{
++	phy_register_fixup_for_id(PHY_ANY_ID, mvswitch_fixup);
++	return phy_driver_register(&mvswitch_driver, THIS_MODULE);
++}
++
++static void __exit
++mvswitch_exit(void)
++{
++	phy_driver_unregister(&mvswitch_driver);
++}
++
++module_init(mvswitch_init);
++module_exit(mvswitch_exit);
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/mvswitch.h b/target/linux/generic/files-5.4/drivers/net/phy/mvswitch.h
+new file mode 100644
+index 0000000000..ab2a1a126e
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/mvswitch.h
+@@ -0,0 +1,145 @@
++/*
++ * Marvell 88E6060 switch driver
++ * Copyright (c) 2008 Felix Fietkau <nbd@nbd.name>
++ *
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of the GNU General Public License v2 as published by the
++ * Free Software Foundation
++ */
++#ifndef __MVSWITCH_H
++#define __MVSWITCH_H
++
++#define MV_HEADER_SIZE	2
++#define MV_HEADER_PORTS_M	0x001f
++#define MV_HEADER_PORTS_S	0
++#define MV_HEADER_VLAN_M	0xf000
++#define MV_HEADER_VLAN_S	12
++
++#define MV_TRAILER_SIZE	4
++#define MV_TRAILER_PORTS_M	0x1f
++#define MV_TRAILER_PORTS_S	16
++#define MV_TRAILER_FLAGS_S	24
++#define MV_TRAILER_OVERRIDE	0x80
++
++
++#define MV_PORTS	5
++#define MV_WANPORT	4
++#define MV_CPUPORT	5
++
++#define MV_BASE		0x10
++
++#define MV_PHYPORT_BASE		(MV_BASE + 0x0)
++#define MV_PHYPORT(_n)		(MV_PHYPORT_BASE + (_n))
++#define MV_SWITCHPORT_BASE	(MV_BASE + 0x8)
++#define MV_SWITCHPORT(_n)	(MV_SWITCHPORT_BASE + (_n))
++#define MV_SWITCHREGS		(MV_BASE + 0xf)
++
++enum {
++	MV_PHY_CONTROL      = 0x00,
++	MV_PHY_STATUS       = 0x01,
++	MV_PHY_IDENT0       = 0x02,
++	MV_PHY_IDENT1       = 0x03,
++	MV_PHY_ANEG         = 0x04,
++	MV_PHY_LINK_ABILITY = 0x05,
++	MV_PHY_ANEG_EXPAND  = 0x06,
++	MV_PHY_XMIT_NEXTP   = 0x07,
++	MV_PHY_LINK_NEXTP   = 0x08,
++	MV_PHY_CONTROL1     = 0x10,
++	MV_PHY_STATUS1      = 0x11,
++	MV_PHY_INTR_EN      = 0x12,
++	MV_PHY_INTR_STATUS  = 0x13,
++	MV_PHY_INTR_PORT    = 0x14,
++	MV_PHY_RECV_COUNTER = 0x16,
++	MV_PHY_LED_PARALLEL = 0x16,
++	MV_PHY_LED_STREAM   = 0x17,
++	MV_PHY_LED_CTRL     = 0x18,
++	MV_PHY_LED_OVERRIDE = 0x19,
++	MV_PHY_VCT_CTRL     = 0x1a,
++	MV_PHY_VCT_STATUS   = 0x1b,
++	MV_PHY_CONTROL2     = 0x1e
++};
++#define MV_PHYREG(_type, _port) MV_PHYPORT(_port), MV_PHY_##_type
++
++enum {
++	MV_PORT_STATUS      = 0x00,
++	MV_PORT_IDENT       = 0x03,
++	MV_PORT_CONTROL     = 0x04,
++	MV_PORT_VLANMAP     = 0x06,
++	MV_PORT_ASSOC       = 0x0b,
++	MV_PORT_RXCOUNT     = 0x10,
++	MV_PORT_TXCOUNT     = 0x11,
++};
++#define MV_PORTREG(_type, _port) MV_SWITCHPORT(_port), MV_PORT_##_type
++
++enum {
++	MV_PORTCTRL_BLOCK   =  (1 << 0),
++	MV_PORTCTRL_LEARN   =  (2 << 0),
++	MV_PORTCTRL_ENABLED =  (3 << 0),
++	MV_PORTCTRL_VLANTUN =  (1 << 7),	/* Enforce VLANs on packets */
++	MV_PORTCTRL_RXTR    =  (1 << 8),	/* Enable Marvell packet trailer for ingress */
++	MV_PORTCTRL_HEADER	= (1 << 11),	/* Enable Marvell packet header mode for port */
++	MV_PORTCTRL_TXTR    = (1 << 14),	/* Enable Marvell packet trailer for egress */
++	MV_PORTCTRL_FORCEFL = (1 << 15),	/* force flow control */
++};
++
++#define MV_PORTVLAN_ID(_n) (((_n) & 0xf) << 12)
++#define MV_PORTVLAN_PORTS(_n) ((_n) & 0x3f)
++
++#define MV_PORTASSOC_PORTS(_n) ((_n) & 0x1f)
++#define MV_PORTASSOC_MONITOR	(1 << 15)
++
++enum {
++	MV_SWITCH_MAC0      = 0x01,
++	MV_SWITCH_MAC1      = 0x02,
++	MV_SWITCH_MAC2      = 0x03,
++	MV_SWITCH_CTRL      = 0x04,
++	MV_SWITCH_ATU_CTRL  = 0x0a,
++	MV_SWITCH_ATU_OP    = 0x0b,
++	MV_SWITCH_ATU_DATA  = 0x0c,
++	MV_SWITCH_ATU_MAC0  = 0x0d,
++	MV_SWITCH_ATU_MAC1  = 0x0e,
++	MV_SWITCH_ATU_MAC2  = 0x0f,
++};
++#define MV_SWITCHREG(_type) MV_SWITCHREGS, MV_SWITCH_##_type
++
++enum {
++	MV_SWITCHCTL_EEIE   =  (1 << 0),	/* EEPROM interrupt enable */
++	MV_SWITCHCTL_PHYIE  =  (1 << 1),	/* PHY interrupt enable */
++	MV_SWITCHCTL_ATUDONE=  (1 << 2),	/* ATU done interrupt enable */
++	MV_SWITCHCTL_ATUIE  =  (1 << 3),	/* ATU interrupt enable */
++	MV_SWITCHCTL_CTRMODE=  (1 << 8),	/* statistics for rx and tx errors */
++	MV_SWITCHCTL_RELOAD =  (1 << 9),	/* reload registers from eeprom */
++	MV_SWITCHCTL_MSIZE  = (1 << 10),	/* increase maximum frame size */
++	MV_SWITCHCTL_DROP   = (1 << 13),	/* discard frames with excessive collisions */
++};
++
++enum {
++#define MV_ATUCTL_AGETIME_MIN	16
++#define MV_ATUCTL_AGETIME_MAX	4080
++#define MV_ATUCTL_AGETIME(_n)	((((_n) / 16) & 0xff) << 4)
++	MV_ATUCTL_ATU_256   = (0 << 12),
++	MV_ATUCTL_ATU_512   = (1 << 12),
++	MV_ATUCTL_ATU_1K	= (2 << 12),
++	MV_ATUCTL_ATUMASK   = (3 << 12),
++	MV_ATUCTL_NO_LEARN  = (1 << 14),
++	MV_ATUCTL_RESET     = (1 << 15),
++};
++
++enum {
++#define MV_ATUOP_DBNUM(_n)	((_n) & 0x0f)
++
++	MV_ATUOP_NOOP       = (0 << 12),
++	MV_ATUOP_FLUSH_ALL  = (1 << 12),
++	MV_ATUOP_FLUSH_U    = (2 << 12),
++	MV_ATUOP_LOAD_DB    = (3 << 12),
++	MV_ATUOP_GET_NEXT   = (4 << 12),
++	MV_ATUOP_FLUSH_DB   = (5 << 12),
++	MV_ATUOP_FLUSH_DB_UU= (6 << 12),
++
++	MV_ATUOP_INPROGRESS = (1 << 15),
++};
++
++#define MV_IDENT_MASK		0xfff0
++#define MV_IDENT_VALUE		0x0600
++
++#endif
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/psb6970.c b/target/linux/generic/files-5.4/drivers/net/phy/psb6970.c
+new file mode 100644
+index 0000000000..6cee75734b
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/psb6970.c
+@@ -0,0 +1,444 @@
++/*
++ * Lantiq PSB6970 (Tantos) Switch driver
++ *
++ * Copyright (c) 2009,2010 Team Embedded.
++ *
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of the GNU General Public License v2 as published by the
++ * Free Software Foundation.
++ *
++ * The switch programming done in this driver follows the 
++ * "Ethernet Traffic Separation using VLAN" Application Note as
++ * published by Lantiq.
++ */
++
++#include <linux/module.h>
++#include <linux/netdevice.h>
++#include <linux/switch.h>
++#include <linux/phy.h>
++#include <linux/version.h>
++
++#define PSB6970_MAX_VLANS		16
++#define PSB6970_NUM_PORTS		7
++#define PSB6970_DEFAULT_PORT_CPU	6
++#define PSB6970_IS_CPU_PORT(x)		((x) > 4)
++
++#define PHYADDR(_reg)		((_reg >> 5) & 0xff), (_reg & 0x1f)
++
++/* --- Identification --- */
++#define PSB6970_CI0		0x0100
++#define PSB6970_CI0_MASK	0x000f
++#define PSB6970_CI1		0x0101
++#define PSB6970_CI1_VAL		0x2599
++#define PSB6970_CI1_MASK	0xffff
++
++/* --- VLAN filter table --- */
++#define PSB6970_VFxL(i)		((i)*2+0x10)	/* VLAN Filter Low */
++#define PSB6970_VFxL_VV		(1 << 15)	/* VLAN_Valid */
++
++#define PSB6970_VFxH(i)		((i)*2+0x11)	/* VLAN Filter High */
++#define PSB6970_VFxH_TM_SHIFT	7		/* Tagged Member */
++
++/* --- Port registers --- */
++#define PSB6970_EC(p)		((p)*0x20+2)	/* Extended Control */
++#define PSB6970_EC_IFNTE	(1 << 1)	/* Input Force No Tag Enable */
++
++#define PSB6970_PBVM(p)		((p)*0x20+3)	/* Port Base VLAN Map */
++#define PSB6970_PBVM_VMCE	(1 << 8)
++#define PSB6970_PBVM_AOVTP	(1 << 9)
++#define PSB6970_PBVM_VSD	(1 << 10)
++#define PSB6970_PBVM_VC		(1 << 11)	/* VID Check with VID table */
++#define PSB6970_PBVM_TBVE	(1 << 13)	/* Tag-Based VLAN enable */
++
++#define PSB6970_DVID(p)		((p)*0x20+4)	/* Default VLAN ID & Priority */
++
++struct psb6970_priv {
++	struct switch_dev dev;
++	struct phy_device *phy;
++	u16 (*read) (struct phy_device* phydev, int reg);
++	void (*write) (struct phy_device* phydev, int reg, u16 val);
++	struct mutex reg_mutex;
++
++	/* all fields below are cleared on reset */
++	bool vlan;
++	u16 vlan_id[PSB6970_MAX_VLANS];
++	u8 vlan_table[PSB6970_MAX_VLANS];
++	u8 vlan_tagged;
++	u16 pvid[PSB6970_NUM_PORTS];
++};
++
++#define to_psb6970(_dev) container_of(_dev, struct psb6970_priv, dev)
++
++static u16 psb6970_mii_read(struct phy_device *phydev, int reg)
++{
++	struct mii_bus *bus = phydev->mdio.bus;
++
++	return bus->read(bus, PHYADDR(reg));
++}
++
++static void psb6970_mii_write(struct phy_device *phydev, int reg, u16 val)
++{
++	struct mii_bus *bus = phydev->mdio.bus;
++
++	bus->write(bus, PHYADDR(reg), val);
++}
++
++static int
++psb6970_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
++		 struct switch_val *val)
++{
++	struct psb6970_priv *priv = to_psb6970(dev);
++	priv->vlan = !!val->value.i;
++	return 0;
++}
++
++static int
++psb6970_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
++		 struct switch_val *val)
++{
++	struct psb6970_priv *priv = to_psb6970(dev);
++	val->value.i = priv->vlan;
++	return 0;
++}
++
++static int psb6970_set_pvid(struct switch_dev *dev, int port, int vlan)
++{
++	struct psb6970_priv *priv = to_psb6970(dev);
++
++	/* make sure no invalid PVIDs get set */
++	if (vlan >= dev->vlans)
++		return -EINVAL;
++
++	priv->pvid[port] = vlan;
++	return 0;
++}
++
++static int psb6970_get_pvid(struct switch_dev *dev, int port, int *vlan)
++{
++	struct psb6970_priv *priv = to_psb6970(dev);
++	*vlan = priv->pvid[port];
++	return 0;
++}
++
++static int
++psb6970_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
++		struct switch_val *val)
++{
++	struct psb6970_priv *priv = to_psb6970(dev);
++	priv->vlan_id[val->port_vlan] = val->value.i;
++	return 0;
++}
++
++static int
++psb6970_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
++		struct switch_val *val)
++{
++	struct psb6970_priv *priv = to_psb6970(dev);
++	val->value.i = priv->vlan_id[val->port_vlan];
++	return 0;
++}
++
++static struct switch_attr psb6970_globals[] = {
++	{
++	 .type = SWITCH_TYPE_INT,
++	 .name = "enable_vlan",
++	 .description = "Enable VLAN mode",
++	 .set = psb6970_set_vlan,
++	 .get = psb6970_get_vlan,
++	 .max = 1},
++};
++
++static struct switch_attr psb6970_port[] = {
++};
++
++static struct switch_attr psb6970_vlan[] = {
++	{
++	 .type = SWITCH_TYPE_INT,
++	 .name = "vid",
++	 .description = "VLAN ID (0-4094)",
++	 .set = psb6970_set_vid,
++	 .get = psb6970_get_vid,
++	 .max = 4094,
++	 },
++};
++
++static int psb6970_get_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	struct psb6970_priv *priv = to_psb6970(dev);
++	u8 ports = priv->vlan_table[val->port_vlan];
++	int i;
++
++	val->len = 0;
++	for (i = 0; i < PSB6970_NUM_PORTS; i++) {
++		struct switch_port *p;
++
++		if (!(ports & (1 << i)))
++			continue;
++
++		p = &val->value.ports[val->len++];
++		p->id = i;
++		if (priv->vlan_tagged & (1 << i))
++			p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
++		else
++			p->flags = 0;
++	}
++	return 0;
++}
++
++static int psb6970_set_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	struct psb6970_priv *priv = to_psb6970(dev);
++	u8 *vt = &priv->vlan_table[val->port_vlan];
++	int i, j;
++
++	*vt = 0;
++	for (i = 0; i < val->len; i++) {
++		struct switch_port *p = &val->value.ports[i];
++
++		if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED))
++			priv->vlan_tagged |= (1 << p->id);
++		else {
++			priv->vlan_tagged &= ~(1 << p->id);
++			priv->pvid[p->id] = val->port_vlan;
++
++			/* make sure that an untagged port does not
++			 * appear in other vlans */
++			for (j = 0; j < PSB6970_MAX_VLANS; j++) {
++				if (j == val->port_vlan)
++					continue;
++				priv->vlan_table[j] &= ~(1 << p->id);
++			}
++		}
++
++		*vt |= 1 << p->id;
++	}
++	return 0;
++}
++
++static int psb6970_hw_apply(struct switch_dev *dev)
++{
++	struct psb6970_priv *priv = to_psb6970(dev);
++	int i, j;
++
++	mutex_lock(&priv->reg_mutex);
++
++	if (priv->vlan) {
++		/* into the vlan translation unit */
++		for (j = 0; j < PSB6970_MAX_VLANS; j++) {
++			u8 vp = priv->vlan_table[j];
++
++			if (vp) {
++				priv->write(priv->phy, PSB6970_VFxL(j),
++					    PSB6970_VFxL_VV | priv->vlan_id[j]);
++				priv->write(priv->phy, PSB6970_VFxH(j),
++					    ((vp & priv->
++					      vlan_tagged) <<
++					     PSB6970_VFxH_TM_SHIFT) | vp);
++			} else	/* clear VLAN Valid flag for unused vlans */
++				priv->write(priv->phy, PSB6970_VFxL(j), 0);
++
++		}
++	}
++
++	/* update the port destination mask registers and tag settings */
++	for (i = 0; i < PSB6970_NUM_PORTS; i++) {
++		int dvid = 1, pbvm = 0x7f | PSB6970_PBVM_VSD, ec = 0;
++
++		if (priv->vlan) {
++			ec = PSB6970_EC_IFNTE;
++			dvid = priv->vlan_id[priv->pvid[i]];
++			pbvm |= PSB6970_PBVM_TBVE | PSB6970_PBVM_VMCE;
++
++			if ((i << 1) & priv->vlan_tagged)
++				pbvm |= PSB6970_PBVM_AOVTP | PSB6970_PBVM_VC;
++		}
++
++		priv->write(priv->phy, PSB6970_PBVM(i), pbvm);
++
++		if (!PSB6970_IS_CPU_PORT(i)) {
++			priv->write(priv->phy, PSB6970_EC(i), ec);
++			priv->write(priv->phy, PSB6970_DVID(i), dvid);
++		}
++	}
++
++	mutex_unlock(&priv->reg_mutex);
++	return 0;
++}
++
++static int psb6970_reset_switch(struct switch_dev *dev)
++{
++	struct psb6970_priv *priv = to_psb6970(dev);
++	int i;
++
++	mutex_lock(&priv->reg_mutex);
++
++	memset(&priv->vlan, 0, sizeof(struct psb6970_priv) -
++	       offsetof(struct psb6970_priv, vlan));
++
++	for (i = 0; i < PSB6970_MAX_VLANS; i++)
++		priv->vlan_id[i] = i;
++
++	mutex_unlock(&priv->reg_mutex);
++
++	return psb6970_hw_apply(dev);
++}
++
++static const struct switch_dev_ops psb6970_ops = {
++	.attr_global = {
++			.attr = psb6970_globals,
++			.n_attr = ARRAY_SIZE(psb6970_globals),
++			},
++	.attr_port = {
++		      .attr = psb6970_port,
++		      .n_attr = ARRAY_SIZE(psb6970_port),
++		      },
++	.attr_vlan = {
++		      .attr = psb6970_vlan,
++		      .n_attr = ARRAY_SIZE(psb6970_vlan),
++		      },
++	.get_port_pvid = psb6970_get_pvid,
++	.set_port_pvid = psb6970_set_pvid,
++	.get_vlan_ports = psb6970_get_ports,
++	.set_vlan_ports = psb6970_set_ports,
++	.apply_config = psb6970_hw_apply,
++	.reset_switch = psb6970_reset_switch,
++};
++
++static int psb6970_config_init(struct phy_device *pdev)
++{
++	struct psb6970_priv *priv;
++	struct net_device *dev = pdev->attached_dev;
++	struct switch_dev *swdev;
++	int ret;
++
++	priv = kzalloc(sizeof(struct psb6970_priv), GFP_KERNEL);
++	if (priv == NULL)
++		return -ENOMEM;
++
++	priv->phy = pdev;
++
++	if (pdev->mdio.addr == 0)
++		printk(KERN_INFO "%s: psb6970 switch driver attached.\n",
++		       pdev->attached_dev->name);
++
++	if (pdev->mdio.addr != 0) {
++		kfree(priv);
++		return 0;
++	}
++
++	linkmode_zero(pdev->supported);
++	linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, pdev->supported);
++	linkmode_copy(pdev->advertising, pdev->supported);
++
++	mutex_init(&priv->reg_mutex);
++	priv->read = psb6970_mii_read;
++	priv->write = psb6970_mii_write;
++
++	pdev->priv = priv;
++
++	swdev = &priv->dev;
++	swdev->cpu_port = PSB6970_DEFAULT_PORT_CPU;
++	swdev->ops = &psb6970_ops;
++
++	swdev->name = "Lantiq PSB6970";
++	swdev->vlans = PSB6970_MAX_VLANS;
++	swdev->ports = PSB6970_NUM_PORTS;
++
++	if ((ret = register_switch(&priv->dev, pdev->attached_dev)) < 0) {
++		kfree(priv);
++		goto done;
++	}
++
++	ret = psb6970_reset_switch(&priv->dev);
++	if (ret) {
++		kfree(priv);
++		goto done;
++	}
++
++	dev->phy_ptr = priv;
++
++done:
++	return ret;
++}
++
++static int psb6970_read_status(struct phy_device *phydev)
++{
++	phydev->speed = SPEED_100;
++	phydev->duplex = DUPLEX_FULL;
++	phydev->link = 1;
++
++	phydev->state = PHY_RUNNING;
++	netif_carrier_on(phydev->attached_dev);
++	phydev->adjust_link(phydev->attached_dev);
++
++	return 0;
++}
++
++static int psb6970_config_aneg(struct phy_device *phydev)
++{
++	return 0;
++}
++
++static int psb6970_probe(struct phy_device *pdev)
++{
++	return 0;
++}
++
++static void psb6970_remove(struct phy_device *pdev)
++{
++	struct psb6970_priv *priv = pdev->priv;
++
++	if (!priv)
++		return;
++
++	if (pdev->mdio.addr == 0)
++		unregister_switch(&priv->dev);
++	kfree(priv);
++}
++
++static int psb6970_fixup(struct phy_device *dev)
++{
++	struct mii_bus *bus = dev->mdio.bus;
++	u16 reg;
++
++	/* look for the switch on the bus */
++	reg = bus->read(bus, PHYADDR(PSB6970_CI1)) & PSB6970_CI1_MASK;
++	if (reg != PSB6970_CI1_VAL)
++		return 0;
++
++	dev->phy_id = (reg << 16);
++	dev->phy_id |= bus->read(bus, PHYADDR(PSB6970_CI0)) & PSB6970_CI0_MASK;
++
++	return 0;
++}
++
++static struct phy_driver psb6970_driver = {
++	.name = "Lantiq PSB6970",
++	.phy_id = PSB6970_CI1_VAL << 16,
++	.phy_id_mask = 0xffff0000,
++	.features = PHY_BASIC_FEATURES,
++	.probe = psb6970_probe,
++	.remove = psb6970_remove,
++	.config_init = &psb6970_config_init,
++	.config_aneg = &psb6970_config_aneg,
++	.read_status = &psb6970_read_status,
++};
++
++int __init psb6970_init(void)
++{
++	phy_register_fixup_for_id(PHY_ANY_ID, psb6970_fixup);
++	return phy_driver_register(&psb6970_driver, THIS_MODULE);
++}
++
++module_init(psb6970_init);
++
++void __exit psb6970_exit(void)
++{
++	phy_driver_unregister(&psb6970_driver);
++}
++
++module_exit(psb6970_exit);
++
++MODULE_DESCRIPTION("Lantiq PSB6970 Switch");
++MODULE_AUTHOR("Ithamar R. Adema <ithamar.adema@team-embedded.nl>");
++MODULE_LICENSE("GPL");
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/rtl8306.c b/target/linux/generic/files-5.4/drivers/net/phy/rtl8306.c
+new file mode 100644
+index 0000000000..31bc7589c4
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/rtl8306.c
+@@ -0,0 +1,1063 @@
++/*
++ * rtl8306.c: RTL8306S switch driver
++ *
++ * Copyright (C) 2009 Felix Fietkau <nbd@nbd.name>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
++
++#include <linux/if.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/list.h>
++#include <linux/if_ether.h>
++#include <linux/skbuff.h>
++#include <linux/netdevice.h>
++#include <linux/netlink.h>
++#include <net/genetlink.h>
++#include <linux/switch.h>
++#include <linux/delay.h>
++#include <linux/phy.h>
++#include <linux/version.h>
++
++//#define DEBUG 1
++
++/* Global (PHY0) */
++#define RTL8306_REG_PAGE		16
++#define RTL8306_REG_PAGE_LO		(1 << 15)
++#define RTL8306_REG_PAGE_HI		(1 << 1) /* inverted */
++
++#define RTL8306_NUM_VLANS		16
++#define RTL8306_NUM_PORTS		6
++#define RTL8306_PORT_CPU		5
++#define RTL8306_NUM_PAGES		4
++#define RTL8306_NUM_REGS		32
++
++#define RTL_NAME_S          "RTL8306S"
++#define RTL_NAME_SD         "RTL8306SD"
++#define RTL_NAME_SDM        "RTL8306SDM"
++#define RTL_NAME_UNKNOWN    "RTL8306(unknown)"
++
++#define RTL8306_MAGIC	0x8306
++
++static LIST_HEAD(phydevs);
++
++struct rtl_priv {
++	struct list_head list;
++	struct switch_dev dev;
++	int page;
++	int type;
++	int do_cpu;
++	struct mii_bus *bus;
++	char hwname[sizeof(RTL_NAME_UNKNOWN)];
++	bool fixup;
++};
++
++struct rtl_phyregs {
++	int nway;
++	int speed;
++	int duplex;
++};
++
++#define to_rtl(_dev) container_of(_dev, struct rtl_priv, dev)
++
++enum {
++	RTL_TYPE_S,
++	RTL_TYPE_SD,
++	RTL_TYPE_SDM,
++};
++
++struct rtl_reg {
++	int page;
++	int phy;
++	int reg;
++	int bits;
++	int shift;
++	int inverted;
++};
++
++#define RTL_VLAN_REGOFS(name) \
++	(RTL_REG_VLAN1_##name - RTL_REG_VLAN0_##name)
++
++#define RTL_PORT_REGOFS(name) \
++	(RTL_REG_PORT1_##name - RTL_REG_PORT0_##name)
++
++#define RTL_PORT_REG(id, reg) \
++	(RTL_REG_PORT0_##reg + (id * RTL_PORT_REGOFS(reg)))
++
++#define RTL_VLAN_REG(id, reg) \
++	(RTL_REG_VLAN0_##reg + (id * RTL_VLAN_REGOFS(reg)))
++
++#define RTL_GLOBAL_REGATTR(reg) \
++	.id = RTL_REG_##reg, \
++	.type = SWITCH_TYPE_INT, \
++	.ofs = 0, \
++	.set = rtl_attr_set_int, \
++	.get = rtl_attr_get_int
++
++#define RTL_PORT_REGATTR(reg) \
++	.id = RTL_REG_PORT0_##reg, \
++	.type = SWITCH_TYPE_INT, \
++	.ofs = RTL_PORT_REGOFS(reg), \
++	.set = rtl_attr_set_port_int, \
++	.get = rtl_attr_get_port_int
++
++#define RTL_VLAN_REGATTR(reg) \
++	.id = RTL_REG_VLAN0_##reg, \
++	.type = SWITCH_TYPE_INT, \
++	.ofs = RTL_VLAN_REGOFS(reg), \
++	.set = rtl_attr_set_vlan_int, \
++	.get = rtl_attr_get_vlan_int
++
++enum rtl_regidx {
++	RTL_REG_CHIPID,
++	RTL_REG_CHIPVER,
++	RTL_REG_CHIPTYPE,
++	RTL_REG_CPUPORT,
++
++	RTL_REG_EN_CPUPORT,
++	RTL_REG_EN_TAG_OUT,
++	RTL_REG_EN_TAG_CLR,
++	RTL_REG_EN_TAG_IN,
++	RTL_REG_TRAP_CPU,
++	RTL_REG_CPU_LINKUP,
++	RTL_REG_TRUNK_PORTSEL,
++	RTL_REG_EN_TRUNK,
++	RTL_REG_RESET,
++
++	RTL_REG_VLAN_ENABLE,
++	RTL_REG_VLAN_FILTER,
++	RTL_REG_VLAN_TAG_ONLY,
++	RTL_REG_VLAN_TAG_AWARE,
++#define RTL_VLAN_ENUM(id) \
++	RTL_REG_VLAN##id##_VID, \
++	RTL_REG_VLAN##id##_PORTMASK
++	RTL_VLAN_ENUM(0),
++	RTL_VLAN_ENUM(1),
++	RTL_VLAN_ENUM(2),
++	RTL_VLAN_ENUM(3),
++	RTL_VLAN_ENUM(4),
++	RTL_VLAN_ENUM(5),
++	RTL_VLAN_ENUM(6),
++	RTL_VLAN_ENUM(7),
++	RTL_VLAN_ENUM(8),
++	RTL_VLAN_ENUM(9),
++	RTL_VLAN_ENUM(10),
++	RTL_VLAN_ENUM(11),
++	RTL_VLAN_ENUM(12),
++	RTL_VLAN_ENUM(13),
++	RTL_VLAN_ENUM(14),
++	RTL_VLAN_ENUM(15),
++#define RTL_PORT_ENUM(id) \
++	RTL_REG_PORT##id##_PVID, \
++	RTL_REG_PORT##id##_NULL_VID_REPLACE, \
++	RTL_REG_PORT##id##_NON_PVID_DISCARD, \
++	RTL_REG_PORT##id##_VID_INSERT, \
++	RTL_REG_PORT##id##_TAG_INSERT, \
++	RTL_REG_PORT##id##_LINK, \
++	RTL_REG_PORT##id##_SPEED, \
++	RTL_REG_PORT##id##_NWAY, \
++	RTL_REG_PORT##id##_NRESTART, \
++	RTL_REG_PORT##id##_DUPLEX, \
++	RTL_REG_PORT##id##_RXEN, \
++	RTL_REG_PORT##id##_TXEN
++	RTL_PORT_ENUM(0),
++	RTL_PORT_ENUM(1),
++	RTL_PORT_ENUM(2),
++	RTL_PORT_ENUM(3),
++	RTL_PORT_ENUM(4),
++	RTL_PORT_ENUM(5),
++};
++
++static const struct rtl_reg rtl_regs[] = {
++	[RTL_REG_CHIPID]         = { 0, 4, 30, 16,  0, 0 },
++	[RTL_REG_CHIPVER]        = { 0, 4, 31,  8,  0, 0 },
++	[RTL_REG_CHIPTYPE]       = { 0, 4, 31,  2,  8, 0 },
++
++	/* CPU port number */
++	[RTL_REG_CPUPORT]        = { 2, 4, 21,  3,  0, 0 },
++	/* Enable CPU port function */
++	[RTL_REG_EN_CPUPORT]     = { 3, 2, 21,  1, 15, 1 },
++	/* Enable CPU port tag insertion */
++	[RTL_REG_EN_TAG_OUT]     = { 3, 2, 21,  1, 12, 0 },
++	/* Enable CPU port tag removal */
++	[RTL_REG_EN_TAG_CLR]     = { 3, 2, 21,  1, 11, 0 },
++	/* Enable CPU port tag checking */
++	[RTL_REG_EN_TAG_IN]      = { 0, 4, 21,  1,  7, 0 },
++	[RTL_REG_EN_TRUNK]       = { 0, 0, 19,  1, 11, 1 },
++	[RTL_REG_TRUNK_PORTSEL]  = { 0, 0, 16,  1,  6, 1 },
++	[RTL_REG_RESET]          = { 0, 0, 16,  1, 12, 0 },
++
++	[RTL_REG_TRAP_CPU]       = { 3, 2, 22,  1,  6, 0 },
++	[RTL_REG_CPU_LINKUP]     = { 0, 6, 22,  1, 15, 0 },
++
++	[RTL_REG_VLAN_TAG_ONLY]  = { 0, 0, 16,  1,  8, 1 },
++	[RTL_REG_VLAN_FILTER]    = { 0, 0, 16,  1,  9, 1 },
++	[RTL_REG_VLAN_TAG_AWARE] = { 0, 0, 16,  1, 10, 1 },
++	[RTL_REG_VLAN_ENABLE]    = { 0, 0, 18,  1,  8, 1 },
++
++#define RTL_VLAN_REGS(id, phy, page, regofs) \
++	[RTL_REG_VLAN##id##_VID] = { page, phy, 25 + regofs, 12, 0, 0 }, \
++	[RTL_REG_VLAN##id##_PORTMASK] = { page, phy, 24 + regofs, 6, 0, 0 }
++	RTL_VLAN_REGS( 0, 0, 0, 0),
++	RTL_VLAN_REGS( 1, 1, 0, 0),
++	RTL_VLAN_REGS( 2, 2, 0, 0),
++	RTL_VLAN_REGS( 3, 3, 0, 0),
++	RTL_VLAN_REGS( 4, 4, 0, 0),
++	RTL_VLAN_REGS( 5, 0, 1, 2),
++	RTL_VLAN_REGS( 6, 1, 1, 2),
++	RTL_VLAN_REGS( 7, 2, 1, 2),
++	RTL_VLAN_REGS( 8, 3, 1, 2),
++	RTL_VLAN_REGS( 9, 4, 1, 2),
++	RTL_VLAN_REGS(10, 0, 1, 4),
++	RTL_VLAN_REGS(11, 1, 1, 4),
++	RTL_VLAN_REGS(12, 2, 1, 4),
++	RTL_VLAN_REGS(13, 3, 1, 4),
++	RTL_VLAN_REGS(14, 4, 1, 4),
++	RTL_VLAN_REGS(15, 0, 1, 6),
++
++#define REG_PORT_SETTING(port, phy) \
++	[RTL_REG_PORT##port##_SPEED] = { 0, phy, 0, 1, 13, 0 }, \
++	[RTL_REG_PORT##port##_NWAY] = { 0, phy, 0, 1, 12, 0 }, \
++	[RTL_REG_PORT##port##_NRESTART] = { 0, phy, 0, 1, 9, 0 }, \
++	[RTL_REG_PORT##port##_DUPLEX] = { 0, phy, 0, 1, 8, 0 }, \
++	[RTL_REG_PORT##port##_TXEN] = { 0, phy, 24, 1, 11, 0 }, \
++	[RTL_REG_PORT##port##_RXEN] = { 0, phy, 24, 1, 10, 0 }, \
++	[RTL_REG_PORT##port##_LINK] = { 0, phy, 1, 1, 2, 0 }, \
++	[RTL_REG_PORT##port##_NULL_VID_REPLACE] = { 0, phy, 22, 1, 12, 0 }, \
++	[RTL_REG_PORT##port##_NON_PVID_DISCARD] = { 0, phy, 22, 1, 11, 0 }, \
++	[RTL_REG_PORT##port##_VID_INSERT] = { 0, phy, 22, 2, 9, 0 }, \
++	[RTL_REG_PORT##port##_TAG_INSERT] = { 0, phy, 22, 2, 0, 0 }
++
++	REG_PORT_SETTING(0, 0),
++	REG_PORT_SETTING(1, 1),
++	REG_PORT_SETTING(2, 2),
++	REG_PORT_SETTING(3, 3),
++	REG_PORT_SETTING(4, 4),
++	REG_PORT_SETTING(5, 6),
++
++#define REG_PORT_PVID(phy, page, regofs) \
++	{ page, phy, 24 + regofs, 4, 12, 0 }
++	[RTL_REG_PORT0_PVID] = REG_PORT_PVID(0, 0, 0),
++	[RTL_REG_PORT1_PVID] = REG_PORT_PVID(1, 0, 0),
++	[RTL_REG_PORT2_PVID] = REG_PORT_PVID(2, 0, 0),
++	[RTL_REG_PORT3_PVID] = REG_PORT_PVID(3, 0, 0),
++	[RTL_REG_PORT4_PVID] = REG_PORT_PVID(4, 0, 0),
++	[RTL_REG_PORT5_PVID] = REG_PORT_PVID(0, 1, 2),
++};
++
++
++static inline void
++rtl_set_page(struct rtl_priv *priv, unsigned int page)
++{
++	struct mii_bus *bus = priv->bus;
++	u16 pgsel;
++
++	if (priv->fixup)
++		return;
++
++	if (priv->page == page)
++		return;
++
++	BUG_ON(page > RTL8306_NUM_PAGES);
++	pgsel = bus->read(bus, 0, RTL8306_REG_PAGE);
++	pgsel &= ~(RTL8306_REG_PAGE_LO | RTL8306_REG_PAGE_HI);
++	if (page & (1 << 0))
++		pgsel |= RTL8306_REG_PAGE_LO;
++	if (!(page & (1 << 1))) /* bit is inverted */
++		pgsel |= RTL8306_REG_PAGE_HI;
++	bus->write(bus, 0, RTL8306_REG_PAGE, pgsel);
++}
++
++static inline int
++rtl_w16(struct switch_dev *dev, unsigned int page, unsigned int phy, unsigned int reg, u16 val)
++{
++	struct rtl_priv *priv = to_rtl(dev);
++	struct mii_bus *bus = priv->bus;
++
++	rtl_set_page(priv, page);
++	bus->write(bus, phy, reg, val);
++	bus->read(bus, phy, reg); /* flush */
++	return 0;
++}
++
++static inline int
++rtl_r16(struct switch_dev *dev, unsigned int page, unsigned int phy, unsigned int reg)
++{
++	struct rtl_priv *priv = to_rtl(dev);
++	struct mii_bus *bus = priv->bus;
++
++	rtl_set_page(priv, page);
++	return bus->read(bus, phy, reg);
++}
++
++static inline u16
++rtl_rmw(struct switch_dev *dev, unsigned int page, unsigned int phy, unsigned int reg, u16 mask, u16 val)
++{
++	struct rtl_priv *priv = to_rtl(dev);
++	struct mii_bus *bus = priv->bus;
++	u16 r;
++
++	rtl_set_page(priv, page);
++	r = bus->read(bus, phy, reg);
++	r &= ~mask;
++	r |= val;
++	bus->write(bus, phy, reg, r);
++	return bus->read(bus, phy, reg); /* flush */
++}
++
++
++static inline int
++rtl_get(struct switch_dev *dev, enum rtl_regidx s)
++{
++	const struct rtl_reg *r = &rtl_regs[s];
++	u16 val;
++
++	BUG_ON(s >= ARRAY_SIZE(rtl_regs));
++	if (r->bits == 0) /* unimplemented */
++		return 0;
++
++	val = rtl_r16(dev, r->page, r->phy, r->reg);
++
++	if (r->shift > 0)
++		val >>= r->shift;
++
++	if (r->inverted)
++		val = ~val;
++
++	val &= (1 << r->bits) - 1;
++
++	return val;
++}
++
++static int
++rtl_set(struct switch_dev *dev, enum rtl_regidx s, unsigned int val)
++{
++	const struct rtl_reg *r = &rtl_regs[s];
++	u16 mask = 0xffff;
++
++	BUG_ON(s >= ARRAY_SIZE(rtl_regs));
++
++	if (r->bits == 0) /* unimplemented */
++		return 0;
++
++	if (r->shift > 0)
++		val <<= r->shift;
++
++	if (r->inverted)
++		val = ~val;
++
++	if (r->bits != 16) {
++		mask = (1 << r->bits) - 1;
++		mask <<= r->shift;
++	}
++	val &= mask;
++	return rtl_rmw(dev, r->page, r->phy, r->reg, mask, val);
++}
++
++static void
++rtl_phy_save(struct switch_dev *dev, int port, struct rtl_phyregs *regs)
++{
++	regs->nway = rtl_get(dev, RTL_PORT_REG(port, NWAY));
++	regs->speed = rtl_get(dev, RTL_PORT_REG(port, SPEED));
++	regs->duplex = rtl_get(dev, RTL_PORT_REG(port, DUPLEX));
++}
++
++static void
++rtl_phy_restore(struct switch_dev *dev, int port, struct rtl_phyregs *regs)
++{
++	rtl_set(dev, RTL_PORT_REG(port, NWAY), regs->nway);
++	rtl_set(dev, RTL_PORT_REG(port, SPEED), regs->speed);
++	rtl_set(dev, RTL_PORT_REG(port, DUPLEX), regs->duplex);
++}
++
++static void
++rtl_port_set_enable(struct switch_dev *dev, int port, int enabled)
++{
++	rtl_set(dev, RTL_PORT_REG(port, RXEN), enabled);
++	rtl_set(dev, RTL_PORT_REG(port, TXEN), enabled);
++
++	if ((port >= 5) || !enabled)
++		return;
++
++	/* restart autonegotiation if enabled */
++	rtl_set(dev, RTL_PORT_REG(port, NRESTART), 1);
++}
++
++static int
++rtl_hw_apply(struct switch_dev *dev)
++{
++	int i;
++	int trunk_en, trunk_psel;
++	struct rtl_phyregs port5;
++
++	rtl_phy_save(dev, 5, &port5);
++
++	/* disable rx/tx from PHYs */
++	for (i = 0; i < RTL8306_NUM_PORTS - 1; i++) {
++		rtl_port_set_enable(dev, i, 0);
++	}
++
++	/* save trunking status */
++	trunk_en = rtl_get(dev, RTL_REG_EN_TRUNK);
++	trunk_psel = rtl_get(dev, RTL_REG_TRUNK_PORTSEL);
++
++	/* trunk port 3 and 4
++	 * XXX: Big WTF, but RealTek seems to do it */
++	rtl_set(dev, RTL_REG_EN_TRUNK, 1);
++	rtl_set(dev, RTL_REG_TRUNK_PORTSEL, 1);
++
++	/* execute the software reset */
++	rtl_set(dev, RTL_REG_RESET, 1);
++
++	/* wait for the reset to complete,
++	 * but don't wait for too long */
++	for (i = 0; i < 10; i++) {
++		if (rtl_get(dev, RTL_REG_RESET) == 0)
++			break;
++
++		msleep(1);
++	}
++
++	/* enable rx/tx from PHYs */
++	for (i = 0; i < RTL8306_NUM_PORTS - 1; i++) {
++		rtl_port_set_enable(dev, i, 1);
++	}
++
++	/* restore trunking settings */
++	rtl_set(dev, RTL_REG_EN_TRUNK, trunk_en);
++	rtl_set(dev, RTL_REG_TRUNK_PORTSEL, trunk_psel);
++	rtl_phy_restore(dev, 5, &port5);
++
++	rtl_set(dev, RTL_REG_CPU_LINKUP, 1);
++
++	return 0;
++}
++
++static void
++rtl_hw_init(struct switch_dev *dev)
++{
++	struct rtl_priv *priv = to_rtl(dev);
++	int cpu_mask = 1 << dev->cpu_port;
++	int i;
++
++	rtl_set(dev, RTL_REG_VLAN_ENABLE, 0);
++	rtl_set(dev, RTL_REG_VLAN_FILTER, 0);
++	rtl_set(dev, RTL_REG_EN_TRUNK, 0);
++	rtl_set(dev, RTL_REG_TRUNK_PORTSEL, 0);
++
++	/* initialize cpu port settings */
++	if (priv->do_cpu) {
++		rtl_set(dev, RTL_REG_CPUPORT, dev->cpu_port);
++		rtl_set(dev, RTL_REG_EN_CPUPORT, 1);
++	} else {
++		rtl_set(dev, RTL_REG_CPUPORT, 7);
++		rtl_set(dev, RTL_REG_EN_CPUPORT, 0);
++	}
++	rtl_set(dev, RTL_REG_EN_TAG_OUT, 0);
++	rtl_set(dev, RTL_REG_EN_TAG_IN, 0);
++	rtl_set(dev, RTL_REG_EN_TAG_CLR, 0);
++
++	/* reset all vlans */
++	for (i = 0; i < RTL8306_NUM_VLANS; i++) {
++		rtl_set(dev, RTL_VLAN_REG(i, VID), i);
++		rtl_set(dev, RTL_VLAN_REG(i, PORTMASK), 0);
++	}
++
++	/* default to port isolation */
++	for (i = 0; i < RTL8306_NUM_PORTS; i++) {
++		unsigned long mask;
++
++		if ((1 << i) == cpu_mask)
++			mask = ((1 << RTL8306_NUM_PORTS) - 1) & ~cpu_mask; /* all bits set */
++		else
++			mask = cpu_mask | (1 << i);
++
++		rtl_set(dev, RTL_VLAN_REG(i, PORTMASK), mask);
++		rtl_set(dev, RTL_PORT_REG(i, PVID), i);
++		rtl_set(dev, RTL_PORT_REG(i, NULL_VID_REPLACE), 1);
++		rtl_set(dev, RTL_PORT_REG(i, VID_INSERT), 1);
++		rtl_set(dev, RTL_PORT_REG(i, TAG_INSERT), 3);
++	}
++	rtl_hw_apply(dev);
++}
++
++#ifdef DEBUG
++static int
++rtl_set_use_cpuport(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct rtl_priv *priv = to_rtl(dev);
++	priv->do_cpu = val->value.i;
++	rtl_hw_init(dev);
++	return 0;
++}
++
++static int
++rtl_get_use_cpuport(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct rtl_priv *priv = to_rtl(dev);
++	val->value.i = priv->do_cpu;
++	return 0;
++}
++
++static int
++rtl_set_cpuport(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	dev->cpu_port = val->value.i;
++	rtl_hw_init(dev);
++	return 0;
++}
++
++static int
++rtl_get_cpuport(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	val->value.i = dev->cpu_port;
++	return 0;
++}
++#endif
++
++static int
++rtl_reset(struct switch_dev *dev)
++{
++	rtl_hw_init(dev);
++	return 0;
++}
++
++static int
++rtl_attr_set_int(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	int idx = attr->id + (val->port_vlan * attr->ofs);
++	struct rtl_phyregs port;
++
++	if (attr->id >= ARRAY_SIZE(rtl_regs))
++		return -EINVAL;
++
++	if ((attr->max > 0) && (val->value.i > attr->max))
++		return -EINVAL;
++
++	/* access to phy register 22 on port 4/5
++	 * needs phy status save/restore */
++	if ((val->port_vlan > 3) &&
++		(rtl_regs[idx].reg == 22) &&
++		(rtl_regs[idx].page == 0)) {
++
++		rtl_phy_save(dev, val->port_vlan, &port);
++		rtl_set(dev, idx, val->value.i);
++		rtl_phy_restore(dev, val->port_vlan, &port);
++	} else {
++		rtl_set(dev, idx, val->value.i);
++	}
++
++	return 0;
++}
++
++static int
++rtl_attr_get_int(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	int idx = attr->id + (val->port_vlan * attr->ofs);
++
++	if (idx >= ARRAY_SIZE(rtl_regs))
++		return -EINVAL;
++
++	val->value.i = rtl_get(dev, idx);
++	return 0;
++}
++
++static int
++rtl_attr_set_port_int(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	if (val->port_vlan >= RTL8306_NUM_PORTS)
++		return -EINVAL;
++
++	return rtl_attr_set_int(dev, attr, val);
++}
++
++static int
++rtl_attr_get_port_int(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	if (val->port_vlan >= RTL8306_NUM_PORTS)
++		return -EINVAL;
++	return rtl_attr_get_int(dev, attr, val);
++}
++
++static int 
++rtl_get_port_link(struct switch_dev *dev, int port, struct switch_port_link *link)
++{
++	if (port >= RTL8306_NUM_PORTS)
++		return -EINVAL;
++
++	/* in case the link changes from down to up, the register is only updated on read */
++	link->link = rtl_get(dev, RTL_PORT_REG(port, LINK));
++	if (!link->link)
++		link->link = rtl_get(dev, RTL_PORT_REG(port, LINK));
++
++	if (!link->link)
++		return 0;
++
++	link->duplex = rtl_get(dev, RTL_PORT_REG(port, DUPLEX));
++	link->aneg = rtl_get(dev, RTL_PORT_REG(port, NWAY));
++
++	if (rtl_get(dev, RTL_PORT_REG(port, SPEED)))
++		link->speed = SWITCH_PORT_SPEED_100;
++	else
++		link->speed = SWITCH_PORT_SPEED_10;
++
++	return 0;
++}
++
++static int
++rtl_attr_set_vlan_int(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	if (val->port_vlan >= dev->vlans)
++		return -EINVAL;
++
++	return rtl_attr_set_int(dev, attr, val);
++}
++
++static int
++rtl_attr_get_vlan_int(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	if (val->port_vlan >= dev->vlans)
++		return -EINVAL;
++
++	return rtl_attr_get_int(dev, attr, val);
++}
++
++static int
++rtl_get_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	unsigned int i, mask;
++
++	mask = rtl_get(dev, RTL_VLAN_REG(val->port_vlan, PORTMASK));
++	for (i = 0; i < RTL8306_NUM_PORTS; i++) {
++		struct switch_port *port;
++
++		if (!(mask & (1 << i)))
++			continue;
++
++		port = &val->value.ports[val->len];
++		port->id = i;
++		if (rtl_get(dev, RTL_PORT_REG(i, TAG_INSERT)) == 2 || i == dev->cpu_port)
++			port->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
++		val->len++;
++	}
++
++	return 0;
++}
++
++static int
++rtl_set_vlan(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct rtl_priv *priv = to_rtl(dev);
++	struct rtl_phyregs port;
++	int en = val->value.i;
++	int i;
++
++	rtl_set(dev, RTL_REG_EN_TAG_OUT, en && priv->do_cpu);
++	rtl_set(dev, RTL_REG_EN_TAG_IN, en && priv->do_cpu);
++	rtl_set(dev, RTL_REG_EN_TAG_CLR, en && priv->do_cpu);
++	rtl_set(dev, RTL_REG_VLAN_TAG_AWARE, en);
++	if (en)
++		rtl_set(dev, RTL_REG_VLAN_FILTER, en);
++
++	for (i = 0; i < RTL8306_NUM_PORTS; i++) {
++		if (i > 3)
++			rtl_phy_save(dev, val->port_vlan, &port);
++		rtl_set(dev, RTL_PORT_REG(i, NULL_VID_REPLACE), 1);
++		rtl_set(dev, RTL_PORT_REG(i, VID_INSERT), (en ? (i == dev->cpu_port ? 0 : 1) : 1));
++		rtl_set(dev, RTL_PORT_REG(i, TAG_INSERT), (en ? (i == dev->cpu_port ? 2 : 1) : 3));
++		if (i > 3)
++			rtl_phy_restore(dev, val->port_vlan, &port);
++	}
++	rtl_set(dev, RTL_REG_VLAN_ENABLE, en);
++
++	return 0;
++}
++
++static int
++rtl_get_vlan(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	val->value.i = rtl_get(dev, RTL_REG_VLAN_ENABLE);
++	return 0;
++}
++
++static int
++rtl_set_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	unsigned int mask = 0;
++	unsigned int oldmask;
++	int i;
++
++	for(i = 0; i < val->len; i++)
++	{
++		struct switch_port *port = &val->value.ports[i];
++		bool tagged = false;
++
++		mask |= (1 << port->id);
++
++		if (port->id == dev->cpu_port)
++			continue;
++
++		if ((i == dev->cpu_port) ||
++			(port->flags & (1 << SWITCH_PORT_FLAG_TAGGED)))
++			tagged = true;
++
++		/* fix up PVIDs for added ports */
++		if (!tagged)
++			rtl_set(dev, RTL_PORT_REG(port->id, PVID), val->port_vlan);
++
++		rtl_set(dev, RTL_PORT_REG(port->id, NON_PVID_DISCARD), (tagged ? 0 : 1));
++		rtl_set(dev, RTL_PORT_REG(port->id, VID_INSERT), (tagged ? 0 : 1));
++		rtl_set(dev, RTL_PORT_REG(port->id, TAG_INSERT), (tagged ? 2 : 1));
++	}
++
++	oldmask = rtl_get(dev, RTL_VLAN_REG(val->port_vlan, PORTMASK));
++	rtl_set(dev, RTL_VLAN_REG(val->port_vlan, PORTMASK), mask);
++
++	/* fix up PVIDs for removed ports, default to last vlan */
++	oldmask &= ~mask;
++	for (i = 0; i < RTL8306_NUM_PORTS; i++) {
++		if (!(oldmask & (1 << i)))
++			continue;
++
++		if (i == dev->cpu_port)
++			continue;
++
++		if (rtl_get(dev, RTL_PORT_REG(i, PVID)) == val->port_vlan)
++			rtl_set(dev, RTL_PORT_REG(i, PVID), dev->vlans - 1);
++	}
++
++	return 0;
++}
++
++static struct switch_attr rtl_globals[] = {
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_vlan",
++		.description = "Enable VLAN mode",
++		.max = 1,
++		.set = rtl_set_vlan,
++		.get = rtl_get_vlan,
++	},
++	{
++		RTL_GLOBAL_REGATTR(EN_TRUNK),
++		.name = "trunk",
++		.description = "Enable port trunking",
++		.max = 1,
++	},
++	{
++		RTL_GLOBAL_REGATTR(TRUNK_PORTSEL),
++		.name = "trunk_sel",
++		.description = "Select ports for trunking (0: 0,1 - 1: 3,4)",
++		.max = 1,
++	},
++#ifdef DEBUG
++	{
++		RTL_GLOBAL_REGATTR(VLAN_FILTER),
++		.name = "vlan_filter",
++		.description = "Filter incoming packets for allowed VLANS",
++		.max = 1,
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "cpuport",
++		.description = "CPU Port",
++		.set = rtl_set_cpuport,
++		.get = rtl_get_cpuport,
++		.max = RTL8306_NUM_PORTS,
++	},
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "use_cpuport",
++		.description = "CPU Port handling flag",
++		.set = rtl_set_use_cpuport,
++		.get = rtl_get_use_cpuport,
++		.max = RTL8306_NUM_PORTS,
++	},
++	{
++		RTL_GLOBAL_REGATTR(TRAP_CPU),
++		.name = "trap_cpu",
++		.description = "VLAN trap to CPU",
++		.max = 1,
++	},
++	{
++		RTL_GLOBAL_REGATTR(VLAN_TAG_AWARE),
++		.name = "vlan_tag_aware",
++		.description = "Enable VLAN tag awareness",
++		.max = 1,
++	},
++	{
++		RTL_GLOBAL_REGATTR(VLAN_TAG_ONLY),
++		.name = "tag_only",
++		.description = "Only accept tagged packets",
++		.max = 1,
++	},
++#endif
++};
++static struct switch_attr rtl_port[] = {
++	{
++		RTL_PORT_REGATTR(PVID),
++		.name = "pvid",
++		.description = "Port VLAN ID",
++		.max = RTL8306_NUM_VLANS - 1,
++	},
++#ifdef DEBUG
++	{
++		RTL_PORT_REGATTR(NULL_VID_REPLACE),
++		.name = "null_vid",
++		.description = "NULL VID gets replaced by port default vid",
++		.max = 1,
++	},
++	{
++		RTL_PORT_REGATTR(NON_PVID_DISCARD),
++		.name = "non_pvid_discard",
++		.description = "discard packets with VID != PVID",
++		.max = 1,
++	},
++	{
++		RTL_PORT_REGATTR(VID_INSERT),
++		.name = "vid_insert_remove",
++		.description = "how should the switch insert and remove vids ?",
++		.max = 3,
++	},
++	{
++		RTL_PORT_REGATTR(TAG_INSERT),
++		.name = "tag_insert",
++		.description = "tag insertion handling",
++		.max = 3,
++	},
++#endif
++};
++
++static struct switch_attr rtl_vlan[] = {
++	{
++		RTL_VLAN_REGATTR(VID),
++		.name = "vid",
++		.description = "VLAN ID (1-4095)",
++		.max = 4095,
++	},
++};
++
++static const struct switch_dev_ops rtl8306_ops = {
++	.attr_global = {
++		.attr = rtl_globals,
++		.n_attr = ARRAY_SIZE(rtl_globals),
++	},
++	.attr_port = {
++		.attr = rtl_port,
++		.n_attr = ARRAY_SIZE(rtl_port),
++	},
++	.attr_vlan = {
++		.attr = rtl_vlan,
++		.n_attr = ARRAY_SIZE(rtl_vlan),
++	},
++
++	.get_vlan_ports = rtl_get_ports,
++	.set_vlan_ports = rtl_set_ports,
++	.apply_config = rtl_hw_apply,
++	.reset_switch = rtl_reset,
++	.get_port_link = rtl_get_port_link,
++};
++
++static int
++rtl8306_config_init(struct phy_device *pdev)
++{
++	struct net_device *netdev = pdev->attached_dev;
++	struct rtl_priv *priv = pdev->priv;
++	struct switch_dev *dev = &priv->dev;
++	struct switch_val val;
++	unsigned int chipid, chipver, chiptype;
++	int err;
++
++	/* Only init the switch for the primary PHY */
++	if (pdev->mdio.addr != 0)
++		return 0;
++
++	val.value.i = 1;
++	priv->dev.cpu_port = RTL8306_PORT_CPU;
++	priv->dev.ports = RTL8306_NUM_PORTS;
++	priv->dev.vlans = RTL8306_NUM_VLANS;
++	priv->dev.ops = &rtl8306_ops;
++	priv->do_cpu = 0;
++	priv->page = -1;
++	priv->bus = pdev->mdio.bus;
++
++	chipid = rtl_get(dev, RTL_REG_CHIPID);
++	chipver = rtl_get(dev, RTL_REG_CHIPVER);
++	chiptype = rtl_get(dev, RTL_REG_CHIPTYPE);
++	switch(chiptype) {
++	case 0:
++	case 2:
++		strncpy(priv->hwname, RTL_NAME_S, sizeof(priv->hwname));
++		priv->type = RTL_TYPE_S;
++		break;
++	case 1:
++		strncpy(priv->hwname, RTL_NAME_SD, sizeof(priv->hwname));
++		priv->type = RTL_TYPE_SD;
++		break;
++	case 3:
++		strncpy(priv->hwname, RTL_NAME_SDM, sizeof(priv->hwname));
++		priv->type = RTL_TYPE_SDM;
++		break;
++	default:
++		strncpy(priv->hwname, RTL_NAME_UNKNOWN, sizeof(priv->hwname));
++		break;
++	}
++
++	dev->name = priv->hwname;
++	rtl_hw_init(dev);
++
++	printk(KERN_INFO "Registering %s switch with Chip ID: 0x%04x, version: 0x%04x\n", priv->hwname, chipid, chipver);
++
++	err = register_switch(dev, netdev);
++	if (err < 0) {
++		kfree(priv);
++		return err;
++	}
++
++	return 0;
++}
++
++
++static int
++rtl8306_fixup(struct phy_device *pdev)
++{
++	struct rtl_priv priv;
++	u16 chipid;
++
++	/* Attach to primary LAN port and WAN port */
++	if (pdev->mdio.addr != 0 && pdev->mdio.addr != 4)
++		return 0;
++
++	memset(&priv, 0, sizeof(priv));
++	priv.fixup = true;
++	priv.page = -1;
++	priv.bus = pdev->mdio.bus;
++	chipid = rtl_get(&priv.dev, RTL_REG_CHIPID);
++	if (chipid == 0x5988)
++		pdev->phy_id = RTL8306_MAGIC;
++
++	return 0;
++}
++
++static int
++rtl8306_probe(struct phy_device *pdev)
++{
++	struct rtl_priv *priv;
++
++	list_for_each_entry(priv, &phydevs, list) {
++		/*
++		 * share one rtl_priv instance between virtual phy
++		 * devices on the same bus
++		 */
++		if (priv->bus == pdev->mdio.bus)
++			goto found;
++	}
++	priv = kzalloc(sizeof(struct rtl_priv), GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++
++	priv->bus = pdev->mdio.bus;
++
++found:
++	pdev->priv = priv;
++	return 0;
++}
++
++static void
++rtl8306_remove(struct phy_device *pdev)
++{
++	struct rtl_priv *priv = pdev->priv;
++	unregister_switch(&priv->dev);
++	kfree(priv);
++}
++
++static int
++rtl8306_config_aneg(struct phy_device *pdev)
++{
++	struct rtl_priv *priv = pdev->priv;
++
++	/* Only for WAN */
++	if (pdev->mdio.addr == 0)
++		return 0;
++
++	/* Restart autonegotiation */
++	rtl_set(&priv->dev, RTL_PORT_REG(4, NWAY), 1);
++	rtl_set(&priv->dev, RTL_PORT_REG(4, NRESTART), 1);
++
++	return 0;
++}
++
++static int
++rtl8306_read_status(struct phy_device *pdev)
++{
++	struct rtl_priv *priv = pdev->priv;
++	struct switch_dev *dev = &priv->dev;
++
++	if (pdev->mdio.addr == 4) {
++		/* WAN */
++		pdev->speed = rtl_get(dev, RTL_PORT_REG(4, SPEED)) ? SPEED_100 : SPEED_10;
++		pdev->duplex = rtl_get(dev, RTL_PORT_REG(4, DUPLEX)) ? DUPLEX_FULL : DUPLEX_HALF;
++		pdev->link = !!rtl_get(dev, RTL_PORT_REG(4, LINK));
++	} else {
++		/* LAN */
++		pdev->speed = SPEED_100;
++		pdev->duplex = DUPLEX_FULL;
++		pdev->link = 1;
++	}
++
++	/*
++	 * Bypass generic PHY status read,
++	 * it doesn't work with this switch
++	 */
++	if (pdev->link) {
++		pdev->state = PHY_RUNNING;
++		netif_carrier_on(pdev->attached_dev);
++		pdev->adjust_link(pdev->attached_dev);
++	} else {
++		pdev->state = PHY_NOLINK;
++		netif_carrier_off(pdev->attached_dev);
++		pdev->adjust_link(pdev->attached_dev);
++	}
++
++	return 0;
++}
++
++
++static struct phy_driver rtl8306_driver = {
++	.name		= "Realtek RTL8306S",
++	.phy_id		= RTL8306_MAGIC,
++	.phy_id_mask	= 0xffffffff,
++	.features	= PHY_BASIC_FEATURES,
++	.probe		= &rtl8306_probe,
++	.remove		= &rtl8306_remove,
++	.config_init	= &rtl8306_config_init,
++	.config_aneg	= &rtl8306_config_aneg,
++	.read_status	= &rtl8306_read_status,
++};
++
++
++static int __init
++rtl_init(void)
++{
++	phy_register_fixup_for_id(PHY_ANY_ID, rtl8306_fixup);
++	return phy_driver_register(&rtl8306_driver, THIS_MODULE);
++}
++
++static void __exit
++rtl_exit(void)
++{
++	phy_driver_unregister(&rtl8306_driver);
++}
++
++module_init(rtl_init);
++module_exit(rtl_exit);
++MODULE_LICENSE("GPL");
++
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/rtl8366_smi.c b/target/linux/generic/files-5.4/drivers/net/phy/rtl8366_smi.c
+new file mode 100644
+index 0000000000..e8375e5147
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/rtl8366_smi.c
+@@ -0,0 +1,1624 @@
++/*
++ * Realtek RTL8366 SMI interface driver
++ *
++ * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/device.h>
++#include <linux/delay.h>
++#include <linux/gpio.h>
++#include <linux/spinlock.h>
++#include <linux/skbuff.h>
++#include <linux/of.h>
++#include <linux/of_platform.h>
++#include <linux/of_gpio.h>
++#include <linux/rtl8366.h>
++#include <linux/version.h>
++#include <linux/of_mdio.h>
++
++#ifdef CONFIG_RTL8366_SMI_DEBUG_FS
++#include <linux/debugfs.h>
++#endif
++
++#include "rtl8366_smi.h"
++
++#define RTL8366_SMI_ACK_RETRY_COUNT         5
++
++#define RTL8366_SMI_HW_STOP_DELAY		25	/* msecs */
++#define RTL8366_SMI_HW_START_DELAY		100	/* msecs */
++
++static inline void rtl8366_smi_clk_delay(struct rtl8366_smi *smi)
++{
++	ndelay(smi->clk_delay);
++}
++
++static void rtl8366_smi_start(struct rtl8366_smi *smi)
++{
++	unsigned int sda = smi->gpio_sda;
++	unsigned int sck = smi->gpio_sck;
++
++	/*
++	 * Set GPIO pins to output mode, with initial state:
++	 * SCK = 0, SDA = 1
++	 */
++	gpio_direction_output(sck, 0);
++	gpio_direction_output(sda, 1);
++	rtl8366_smi_clk_delay(smi);
++
++	/* CLK 1: 0 -> 1, 1 -> 0 */
++	gpio_set_value(sck, 1);
++	rtl8366_smi_clk_delay(smi);
++	gpio_set_value(sck, 0);
++	rtl8366_smi_clk_delay(smi);
++
++	/* CLK 2: */
++	gpio_set_value(sck, 1);
++	rtl8366_smi_clk_delay(smi);
++	gpio_set_value(sda, 0);
++	rtl8366_smi_clk_delay(smi);
++	gpio_set_value(sck, 0);
++	rtl8366_smi_clk_delay(smi);
++	gpio_set_value(sda, 1);
++}
++
++static void rtl8366_smi_stop(struct rtl8366_smi *smi)
++{
++	unsigned int sda = smi->gpio_sda;
++	unsigned int sck = smi->gpio_sck;
++
++	rtl8366_smi_clk_delay(smi);
++	gpio_set_value(sda, 0);
++	gpio_set_value(sck, 1);
++	rtl8366_smi_clk_delay(smi);
++	gpio_set_value(sda, 1);
++	rtl8366_smi_clk_delay(smi);
++	gpio_set_value(sck, 1);
++	rtl8366_smi_clk_delay(smi);
++	gpio_set_value(sck, 0);
++	rtl8366_smi_clk_delay(smi);
++	gpio_set_value(sck, 1);
++
++	/* add a click */
++	rtl8366_smi_clk_delay(smi);
++	gpio_set_value(sck, 0);
++	rtl8366_smi_clk_delay(smi);
++	gpio_set_value(sck, 1);
++
++	/* set GPIO pins to input mode */
++	gpio_direction_input(sda);
++	gpio_direction_input(sck);
++}
++
++static void rtl8366_smi_write_bits(struct rtl8366_smi *smi, u32 data, u32 len)
++{
++	unsigned int sda = smi->gpio_sda;
++	unsigned int sck = smi->gpio_sck;
++
++	for (; len > 0; len--) {
++		rtl8366_smi_clk_delay(smi);
++
++		/* prepare data */
++		gpio_set_value(sda, !!(data & ( 1 << (len - 1))));
++		rtl8366_smi_clk_delay(smi);
++
++		/* clocking */
++		gpio_set_value(sck, 1);
++		rtl8366_smi_clk_delay(smi);
++		gpio_set_value(sck, 0);
++	}
++}
++
++static void rtl8366_smi_read_bits(struct rtl8366_smi *smi, u32 len, u32 *data)
++{
++	unsigned int sda = smi->gpio_sda;
++	unsigned int sck = smi->gpio_sck;
++
++	gpio_direction_input(sda);
++
++	for (*data = 0; len > 0; len--) {
++		u32 u;
++
++		rtl8366_smi_clk_delay(smi);
++
++		/* clocking */
++		gpio_set_value(sck, 1);
++		rtl8366_smi_clk_delay(smi);
++		u = !!gpio_get_value(sda);
++		gpio_set_value(sck, 0);
++
++		*data |= (u << (len - 1));
++	}
++
++	gpio_direction_output(sda, 0);
++}
++
++static int rtl8366_smi_wait_for_ack(struct rtl8366_smi *smi)
++{
++	int retry_cnt;
++
++	retry_cnt = 0;
++	do {
++		u32 ack;
++
++		rtl8366_smi_read_bits(smi, 1, &ack);
++		if (ack == 0)
++			break;
++
++		if (++retry_cnt > RTL8366_SMI_ACK_RETRY_COUNT) {
++			dev_err(smi->parent, "ACK timeout\n");
++			return -ETIMEDOUT;
++		}
++	} while (1);
++
++	return 0;
++}
++
++static int rtl8366_smi_write_byte(struct rtl8366_smi *smi, u8 data)
++{
++	rtl8366_smi_write_bits(smi, data, 8);
++	return rtl8366_smi_wait_for_ack(smi);
++}
++
++static int rtl8366_smi_write_byte_noack(struct rtl8366_smi *smi, u8 data)
++{
++	rtl8366_smi_write_bits(smi, data, 8);
++	return 0;
++}
++
++static int rtl8366_smi_read_byte0(struct rtl8366_smi *smi, u8 *data)
++{
++	u32 t;
++
++	/* read data */
++	rtl8366_smi_read_bits(smi, 8, &t);
++	*data = (t & 0xff);
++
++	/* send an ACK */
++	rtl8366_smi_write_bits(smi, 0x00, 1);
++
++	return 0;
++}
++
++static int rtl8366_smi_read_byte1(struct rtl8366_smi *smi, u8 *data)
++{
++	u32 t;
++
++	/* read data */
++	rtl8366_smi_read_bits(smi, 8, &t);
++	*data = (t & 0xff);
++
++	/* send an ACK */
++	rtl8366_smi_write_bits(smi, 0x01, 1);
++
++	return 0;
++}
++
++static int __rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)
++{
++	unsigned long flags;
++	u8 lo = 0;
++	u8 hi = 0;
++	int ret;
++
++	spin_lock_irqsave(&smi->lock, flags);
++
++	rtl8366_smi_start(smi);
++
++	/* send READ command */
++	ret = rtl8366_smi_write_byte(smi, smi->cmd_read);
++	if (ret)
++		goto out;
++
++	/* set ADDR[7:0] */
++	ret = rtl8366_smi_write_byte(smi, addr & 0xff);
++	if (ret)
++		goto out;
++
++	/* set ADDR[15:8] */
++	ret = rtl8366_smi_write_byte(smi, addr >> 8);
++	if (ret)
++		goto out;
++
++	/* read DATA[7:0] */
++	rtl8366_smi_read_byte0(smi, &lo);
++	/* read DATA[15:8] */
++	rtl8366_smi_read_byte1(smi, &hi);
++
++	*data = ((u32) lo) | (((u32) hi) << 8);
++
++	ret = 0;
++
++ out:
++	rtl8366_smi_stop(smi);
++	spin_unlock_irqrestore(&smi->lock, flags);
++
++	return ret;
++}
++/* Read/write via mdiobus */
++#define MDC_MDIO_CTRL0_REG		31
++#define MDC_MDIO_START_REG		29
++#define MDC_MDIO_CTRL1_REG		21
++#define MDC_MDIO_ADDRESS_REG		23
++#define MDC_MDIO_DATA_WRITE_REG		24
++#define MDC_MDIO_DATA_READ_REG		25
++
++#define MDC_MDIO_START_OP		0xFFFF
++#define MDC_MDIO_ADDR_OP		0x000E
++#define MDC_MDIO_READ_OP		0x0001
++#define MDC_MDIO_WRITE_OP		0x0003
++#define MDC_REALTEK_PHY_ADDR		0x0
++
++int __rtl8366_mdio_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)
++{
++	u32 phy_id = MDC_REALTEK_PHY_ADDR;
++	struct mii_bus *mbus = smi->ext_mbus;
++
++	BUG_ON(in_interrupt());
++
++	mutex_lock(&mbus->mdio_lock);
++	/* Write Start command to register 29 */
++	mbus->write(mbus, phy_id, MDC_MDIO_START_REG, MDC_MDIO_START_OP);
++
++	/* Write address control code to register 31 */
++	mbus->write(mbus, phy_id, MDC_MDIO_CTRL0_REG, MDC_MDIO_ADDR_OP);
++
++	/* Write Start command to register 29 */
++	mbus->write(mbus, phy_id, MDC_MDIO_START_REG, MDC_MDIO_START_OP);
++
++	/* Write address to register 23 */
++	mbus->write(mbus, phy_id, MDC_MDIO_ADDRESS_REG, addr);
++
++	/* Write Start command to register 29 */
++	mbus->write(mbus, phy_id, MDC_MDIO_START_REG, MDC_MDIO_START_OP);
++
++	/* Write read control code to register 21 */
++	mbus->write(mbus, phy_id, MDC_MDIO_CTRL1_REG, MDC_MDIO_READ_OP);
++
++	/* Write Start command to register 29 */
++	mbus->write(smi->ext_mbus, phy_id, MDC_MDIO_START_REG, MDC_MDIO_START_OP);
++
++	/* Read data from register 25 */
++	*data = mbus->read(mbus, phy_id, MDC_MDIO_DATA_READ_REG);
++
++	mutex_unlock(&mbus->mdio_lock);
++
++	return 0;
++}
++
++static int __rtl8366_mdio_write_reg(struct rtl8366_smi *smi, u32 addr, u32 data)
++{
++	u32 phy_id = MDC_REALTEK_PHY_ADDR;
++	struct mii_bus *mbus = smi->ext_mbus;
++
++	BUG_ON(in_interrupt());
++
++	mutex_lock(&mbus->mdio_lock);
++
++	/* Write Start command to register 29 */
++	mbus->write(mbus, phy_id, MDC_MDIO_START_REG, MDC_MDIO_START_OP);
++
++	/* Write address control code to register 31 */
++	mbus->write(mbus, phy_id, MDC_MDIO_CTRL0_REG, MDC_MDIO_ADDR_OP);
++
++	/* Write Start command to register 29 */
++	mbus->write(mbus, phy_id, MDC_MDIO_START_REG, MDC_MDIO_START_OP);
++
++	/* Write address to register 23 */
++	mbus->write(mbus, phy_id, MDC_MDIO_ADDRESS_REG, addr);
++
++	/* Write Start command to register 29 */
++	mbus->write(mbus, phy_id, MDC_MDIO_START_REG, MDC_MDIO_START_OP);
++
++	/* Write data to register 24 */
++	mbus->write(mbus, phy_id, MDC_MDIO_DATA_WRITE_REG, data);
++
++	/* Write Start command to register 29 */
++	mbus->write(mbus, phy_id, MDC_MDIO_START_REG, MDC_MDIO_START_OP);
++
++	/* Write data control code to register 21 */
++	mbus->write(mbus, phy_id, MDC_MDIO_CTRL1_REG, MDC_MDIO_WRITE_OP);
++
++	mutex_unlock(&mbus->mdio_lock);
++	return 0;
++}
++
++int rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)
++{
++	if (smi->ext_mbus)
++		return __rtl8366_mdio_read_reg(smi, addr, data);
++	else
++		return __rtl8366_smi_read_reg(smi, addr, data);
++}
++EXPORT_SYMBOL_GPL(rtl8366_smi_read_reg);
++
++static int __rtl8366_smi_write_reg(struct rtl8366_smi *smi,
++				   u32 addr, u32 data, bool ack)
++{
++	unsigned long flags;
++	int ret;
++
++	spin_lock_irqsave(&smi->lock, flags);
++
++	rtl8366_smi_start(smi);
++
++	/* send WRITE command */
++	ret = rtl8366_smi_write_byte(smi, smi->cmd_write);
++	if (ret)
++		goto out;
++
++	/* set ADDR[7:0] */
++	ret = rtl8366_smi_write_byte(smi, addr & 0xff);
++	if (ret)
++		goto out;
++
++	/* set ADDR[15:8] */
++	ret = rtl8366_smi_write_byte(smi, addr >> 8);
++	if (ret)
++		goto out;
++
++	/* write DATA[7:0] */
++	ret = rtl8366_smi_write_byte(smi, data & 0xff);
++	if (ret)
++		goto out;
++
++	/* write DATA[15:8] */
++	if (ack)
++		ret = rtl8366_smi_write_byte(smi, data >> 8);
++	else
++		ret = rtl8366_smi_write_byte_noack(smi, data >> 8);
++	if (ret)
++		goto out;
++
++	ret = 0;
++
++ out:
++	rtl8366_smi_stop(smi);
++	spin_unlock_irqrestore(&smi->lock, flags);
++
++	return ret;
++}
++
++int rtl8366_smi_write_reg(struct rtl8366_smi *smi, u32 addr, u32 data)
++{
++	if (smi->ext_mbus)
++		return __rtl8366_mdio_write_reg(smi, addr, data);
++	else
++		return __rtl8366_smi_write_reg(smi, addr, data, true);
++}
++EXPORT_SYMBOL_GPL(rtl8366_smi_write_reg);
++
++int rtl8366_smi_write_reg_noack(struct rtl8366_smi *smi, u32 addr, u32 data)
++{
++	return __rtl8366_smi_write_reg(smi, addr, data, false);
++}
++EXPORT_SYMBOL_GPL(rtl8366_smi_write_reg_noack);
++
++int rtl8366_smi_rmwr(struct rtl8366_smi *smi, u32 addr, u32 mask, u32 data)
++{
++	u32 t;
++	int err;
++
++	err = rtl8366_smi_read_reg(smi, addr, &t);
++	if (err)
++		return err;
++
++	err = rtl8366_smi_write_reg(smi, addr, (t & ~mask) | data);
++	return err;
++
++}
++EXPORT_SYMBOL_GPL(rtl8366_smi_rmwr);
++
++static int rtl8366_reset(struct rtl8366_smi *smi)
++{
++	if (smi->hw_reset) {
++		smi->hw_reset(smi, true);
++		msleep(RTL8366_SMI_HW_STOP_DELAY);
++		smi->hw_reset(smi, false);
++		msleep(RTL8366_SMI_HW_START_DELAY);
++		return 0;
++	}
++
++	return smi->ops->reset_chip(smi);
++}
++
++static int rtl8366_mc_is_used(struct rtl8366_smi *smi, int mc_index, int *used)
++{
++	int err;
++	int i;
++
++	*used = 0;
++	for (i = 0; i < smi->num_ports; i++) {
++		int index = 0;
++
++		err = smi->ops->get_mc_index(smi, i, &index);
++		if (err)
++			return err;
++
++		if (mc_index == index) {
++			*used = 1;
++			break;
++		}
++	}
++
++	return 0;
++}
++
++static int rtl8366_set_vlan(struct rtl8366_smi *smi, int vid, u32 member,
++			    u32 untag, u32 fid)
++{
++	struct rtl8366_vlan_4k vlan4k;
++	int err;
++	int i;
++
++	/* Update the 4K table */
++	err = smi->ops->get_vlan_4k(smi, vid, &vlan4k);
++	if (err)
++		return err;
++
++	vlan4k.member = member;
++	vlan4k.untag = untag;
++	vlan4k.fid = fid;
++	err = smi->ops->set_vlan_4k(smi, &vlan4k);
++	if (err)
++		return err;
++
++	/* Try to find an existing MC entry for this VID */
++	for (i = 0; i < smi->num_vlan_mc; i++) {
++		struct rtl8366_vlan_mc vlanmc;
++
++		err = smi->ops->get_vlan_mc(smi, i, &vlanmc);
++		if (err)
++			return err;
++
++		if (vid == vlanmc.vid) {
++			/* update the MC entry */
++			vlanmc.member = member;
++			vlanmc.untag = untag;
++			vlanmc.fid = fid;
++
++			err = smi->ops->set_vlan_mc(smi, i, &vlanmc);
++			break;
++		}
++	}
++
++	return err;
++}
++
++static int rtl8366_get_pvid(struct rtl8366_smi *smi, int port, int *val)
++{
++	struct rtl8366_vlan_mc vlanmc;
++	int err;
++	int index;
++
++	err = smi->ops->get_mc_index(smi, port, &index);
++	if (err)
++		return err;
++
++	err = smi->ops->get_vlan_mc(smi, index, &vlanmc);
++	if (err)
++		return err;
++
++	*val = vlanmc.vid;
++	return 0;
++}
++
++static int rtl8366_set_pvid(struct rtl8366_smi *smi, unsigned port,
++			    unsigned vid)
++{
++	struct rtl8366_vlan_mc vlanmc;
++	struct rtl8366_vlan_4k vlan4k;
++	int err;
++	int i;
++
++	/* Try to find an existing MC entry for this VID */
++	for (i = 0; i < smi->num_vlan_mc; i++) {
++		err = smi->ops->get_vlan_mc(smi, i, &vlanmc);
++		if (err)
++			return err;
++
++		if (vid == vlanmc.vid) {
++			err = smi->ops->set_vlan_mc(smi, i, &vlanmc);
++			if (err)
++				return err;
++
++			err = smi->ops->set_mc_index(smi, port, i);
++			return err;
++		}
++	}
++
++	/* We have no MC entry for this VID, try to find an empty one */
++	for (i = 0; i < smi->num_vlan_mc; i++) {
++		err = smi->ops->get_vlan_mc(smi, i, &vlanmc);
++		if (err)
++			return err;
++
++		if (vlanmc.vid == 0 && vlanmc.member == 0) {
++			/* Update the entry from the 4K table */
++			err = smi->ops->get_vlan_4k(smi, vid, &vlan4k);
++			if (err)
++				return err;
++
++			vlanmc.vid = vid;
++			vlanmc.member = vlan4k.member;
++			vlanmc.untag = vlan4k.untag;
++			vlanmc.fid = vlan4k.fid;
++			err = smi->ops->set_vlan_mc(smi, i, &vlanmc);
++			if (err)
++				return err;
++
++			err = smi->ops->set_mc_index(smi, port, i);
++			return err;
++		}
++	}
++
++	/* MC table is full, try to find an unused entry and replace it */
++	for (i = 0; i < smi->num_vlan_mc; i++) {
++		int used;
++
++		err = rtl8366_mc_is_used(smi, i, &used);
++		if (err)
++			return err;
++
++		if (!used) {
++			/* Update the entry from the 4K table */
++			err = smi->ops->get_vlan_4k(smi, vid, &vlan4k);
++			if (err)
++				return err;
++
++			vlanmc.vid = vid;
++			vlanmc.member = vlan4k.member;
++			vlanmc.untag = vlan4k.untag;
++			vlanmc.fid = vlan4k.fid;
++			err = smi->ops->set_vlan_mc(smi, i, &vlanmc);
++			if (err)
++				return err;
++
++			err = smi->ops->set_mc_index(smi, port, i);
++			return err;
++		}
++	}
++
++	dev_err(smi->parent,
++		"all VLAN member configurations are in use\n");
++
++	return -ENOSPC;
++}
++
++int rtl8366_enable_vlan(struct rtl8366_smi *smi, int enable)
++{
++	int err;
++
++	err = smi->ops->enable_vlan(smi, enable);
++	if (err)
++		return err;
++
++	smi->vlan_enabled = enable;
++
++	if (!enable) {
++		smi->vlan4k_enabled = 0;
++		err = smi->ops->enable_vlan4k(smi, enable);
++	}
++
++	return err;
++}
++EXPORT_SYMBOL_GPL(rtl8366_enable_vlan);
++
++static int rtl8366_enable_vlan4k(struct rtl8366_smi *smi, int enable)
++{
++	int err;
++
++	if (enable) {
++		err = smi->ops->enable_vlan(smi, enable);
++		if (err)
++			return err;
++
++		smi->vlan_enabled = enable;
++	}
++
++	err = smi->ops->enable_vlan4k(smi, enable);
++	if (err)
++		return err;
++
++	smi->vlan4k_enabled = enable;
++	return 0;
++}
++
++int rtl8366_enable_all_ports(struct rtl8366_smi *smi, int enable)
++{
++	int port;
++	int err;
++
++	for (port = 0; port < smi->num_ports; port++) {
++		err = smi->ops->enable_port(smi, port, enable);
++		if (err)
++			return err;
++	}
++
++	return 0;
++}
++EXPORT_SYMBOL_GPL(rtl8366_enable_all_ports);
++
++int rtl8366_reset_vlan(struct rtl8366_smi *smi)
++{
++	struct rtl8366_vlan_mc vlanmc;
++	int err;
++	int i;
++
++	rtl8366_enable_vlan(smi, 0);
++	rtl8366_enable_vlan4k(smi, 0);
++
++	/* clear VLAN member configurations */
++	vlanmc.vid = 0;
++	vlanmc.priority = 0;
++	vlanmc.member = 0;
++	vlanmc.untag = 0;
++	vlanmc.fid = 0;
++	for (i = 0; i < smi->num_vlan_mc; i++) {
++		err = smi->ops->set_vlan_mc(smi, i, &vlanmc);
++		if (err)
++			return err;
++	}
++
++	return 0;
++}
++EXPORT_SYMBOL_GPL(rtl8366_reset_vlan);
++
++static int rtl8366_init_vlan(struct rtl8366_smi *smi)
++{
++	int port;
++	int err;
++
++	err = rtl8366_reset_vlan(smi);
++	if (err)
++		return err;
++
++	for (port = 0; port < smi->num_ports; port++) {
++		u32 mask;
++
++		if (port == smi->cpu_port)
++			mask = (1 << smi->num_ports) - 1;
++		else
++			mask = (1 << port) | (1 << smi->cpu_port);
++
++		err = rtl8366_set_vlan(smi, (port + 1), mask, mask, 0);
++		if (err)
++			return err;
++
++		err = rtl8366_set_pvid(smi, port, (port + 1));
++		if (err)
++			return err;
++	}
++
++	return rtl8366_enable_vlan(smi, 1);
++}
++
++#ifdef CONFIG_RTL8366_SMI_DEBUG_FS
++int rtl8366_debugfs_open(struct inode *inode, struct file *file)
++{
++	file->private_data = inode->i_private;
++	return 0;
++}
++EXPORT_SYMBOL_GPL(rtl8366_debugfs_open);
++
++static ssize_t rtl8366_read_debugfs_vlan_mc(struct file *file,
++					      char __user *user_buf,
++					      size_t count, loff_t *ppos)
++{
++	struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data;
++	int i, len = 0;
++	char *buf = smi->buf;
++
++	len += snprintf(buf + len, sizeof(smi->buf) - len,
++			"%2s %6s %4s %6s %6s %3s\n",
++			"id", "vid","prio", "member", "untag", "fid");
++
++	for (i = 0; i < smi->num_vlan_mc; ++i) {
++		struct rtl8366_vlan_mc vlanmc;
++
++		smi->ops->get_vlan_mc(smi, i, &vlanmc);
++
++		len += snprintf(buf + len, sizeof(smi->buf) - len,
++				"%2d %6d %4d 0x%04x 0x%04x %3d\n",
++				i, vlanmc.vid, vlanmc.priority,
++				vlanmc.member, vlanmc.untag, vlanmc.fid);
++	}
++
++	return simple_read_from_buffer(user_buf, count, ppos, buf, len);
++}
++
++#define RTL8366_VLAN4K_PAGE_SIZE	64
++#define RTL8366_VLAN4K_NUM_PAGES	(4096 / RTL8366_VLAN4K_PAGE_SIZE)
++
++static ssize_t rtl8366_read_debugfs_vlan_4k(struct file *file,
++					    char __user *user_buf,
++					    size_t count, loff_t *ppos)
++{
++	struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data;
++	int i, len = 0;
++	int offset;
++	char *buf = smi->buf;
++
++	if (smi->dbg_vlan_4k_page >= RTL8366_VLAN4K_NUM_PAGES) {
++		len += snprintf(buf + len, sizeof(smi->buf) - len,
++				"invalid page: %u\n", smi->dbg_vlan_4k_page);
++		return simple_read_from_buffer(user_buf, count, ppos, buf, len);
++	}
++
++	len += snprintf(buf + len, sizeof(smi->buf) - len,
++			"%4s %6s %6s %3s\n",
++			"vid", "member", "untag", "fid");
++
++	offset = RTL8366_VLAN4K_PAGE_SIZE * smi->dbg_vlan_4k_page;
++	for (i = 0; i < RTL8366_VLAN4K_PAGE_SIZE; i++) {
++		struct rtl8366_vlan_4k vlan4k;
++
++		smi->ops->get_vlan_4k(smi, offset + i, &vlan4k);
++
++		len += snprintf(buf + len, sizeof(smi->buf) - len,
++				"%4d 0x%04x 0x%04x %3d\n",
++				vlan4k.vid, vlan4k.member,
++				vlan4k.untag, vlan4k.fid);
++	}
++
++	return simple_read_from_buffer(user_buf, count, ppos, buf, len);
++}
++
++static ssize_t rtl8366_read_debugfs_pvid(struct file *file,
++					 char __user *user_buf,
++					 size_t count, loff_t *ppos)
++{
++	struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data;
++	char *buf = smi->buf;
++	int len = 0;
++	int i;
++
++	len += snprintf(buf + len, sizeof(smi->buf) - len, "%4s %4s\n",
++			"port", "pvid");
++
++	for (i = 0; i < smi->num_ports; i++) {
++		int pvid;
++		int err;
++
++		err = rtl8366_get_pvid(smi, i, &pvid);
++		if (err)
++			len += snprintf(buf + len, sizeof(smi->buf) - len,
++				"%4d error\n", i);
++		else
++			len += snprintf(buf + len, sizeof(smi->buf) - len,
++				"%4d %4d\n", i, pvid);
++	}
++
++	return simple_read_from_buffer(user_buf, count, ppos, buf, len);
++}
++
++static ssize_t rtl8366_read_debugfs_reg(struct file *file,
++					 char __user *user_buf,
++					 size_t count, loff_t *ppos)
++{
++	struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data;
++	u32 t, reg = smi->dbg_reg;
++	int err, len = 0;
++	char *buf = smi->buf;
++
++	memset(buf, '\0', sizeof(smi->buf));
++
++	err = rtl8366_smi_read_reg(smi, reg, &t);
++	if (err) {
++		len += snprintf(buf, sizeof(smi->buf),
++				"Read failed (reg: 0x%04x)\n", reg);
++		return simple_read_from_buffer(user_buf, count, ppos, buf, len);
++	}
++
++	len += snprintf(buf, sizeof(smi->buf), "reg = 0x%04x, val = 0x%04x\n",
++			reg, t);
++
++	return simple_read_from_buffer(user_buf, count, ppos, buf, len);
++}
++
++static ssize_t rtl8366_write_debugfs_reg(struct file *file,
++					  const char __user *user_buf,
++					  size_t count, loff_t *ppos)
++{
++	struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data;
++	unsigned long data;
++	u32 reg = smi->dbg_reg;
++	int err;
++	size_t len;
++	char *buf = smi->buf;
++
++	len = min(count, sizeof(smi->buf) - 1);
++	if (copy_from_user(buf, user_buf, len)) {
++		dev_err(smi->parent, "copy from user failed\n");
++		return -EFAULT;
++	}
++
++	buf[len] = '\0';
++	if (len > 0 && buf[len - 1] == '\n')
++		buf[len - 1] = '\0';
++
++
++	if (kstrtoul(buf, 16, &data)) {
++		dev_err(smi->parent, "Invalid reg value %s\n", buf);
++	} else {
++		err = rtl8366_smi_write_reg(smi, reg, data);
++		if (err) {
++			dev_err(smi->parent,
++				"writing reg 0x%04x val 0x%04lx failed\n",
++				reg, data);
++		}
++	}
++
++	return count;
++}
++
++static ssize_t rtl8366_read_debugfs_mibs(struct file *file,
++					 char __user *user_buf,
++					 size_t count, loff_t *ppos)
++{
++	struct rtl8366_smi *smi = file->private_data;
++	int i, j, len = 0;
++	char *buf = smi->buf;
++
++	len += snprintf(buf + len, sizeof(smi->buf) - len, "%-36s",
++			"Counter");
++
++	for (i = 0; i < smi->num_ports; i++) {
++		char port_buf[10];
++
++		snprintf(port_buf, sizeof(port_buf), "Port %d", i);
++		len += snprintf(buf + len, sizeof(smi->buf) - len, " %12s",
++				port_buf);
++	}
++	len += snprintf(buf + len, sizeof(smi->buf) - len, "\n");
++
++	for (i = 0; i < smi->num_mib_counters; i++) {
++		len += snprintf(buf + len, sizeof(smi->buf) - len, "%-36s ",
++				smi->mib_counters[i].name);
++		for (j = 0; j < smi->num_ports; j++) {
++			unsigned long long counter = 0;
++
++			if (!smi->ops->get_mib_counter(smi, i, j, &counter))
++				len += snprintf(buf + len,
++						sizeof(smi->buf) - len,
++						"%12llu ", counter);
++			else
++				len += snprintf(buf + len,
++						sizeof(smi->buf) - len,
++						"%12s ", "error");
++		}
++		len += snprintf(buf + len, sizeof(smi->buf) - len, "\n");
++	}
++
++	return simple_read_from_buffer(user_buf, count, ppos, buf, len);
++}
++
++static const struct file_operations fops_rtl8366_regs = {
++	.read	= rtl8366_read_debugfs_reg,
++	.write	= rtl8366_write_debugfs_reg,
++	.open	= rtl8366_debugfs_open,
++	.owner	= THIS_MODULE
++};
++
++static const struct file_operations fops_rtl8366_vlan_mc = {
++	.read	= rtl8366_read_debugfs_vlan_mc,
++	.open	= rtl8366_debugfs_open,
++	.owner	= THIS_MODULE
++};
++
++static const struct file_operations fops_rtl8366_vlan_4k = {
++	.read	= rtl8366_read_debugfs_vlan_4k,
++	.open	= rtl8366_debugfs_open,
++	.owner	= THIS_MODULE
++};
++
++static const struct file_operations fops_rtl8366_pvid = {
++	.read	= rtl8366_read_debugfs_pvid,
++	.open	= rtl8366_debugfs_open,
++	.owner	= THIS_MODULE
++};
++
++static const struct file_operations fops_rtl8366_mibs = {
++	.read = rtl8366_read_debugfs_mibs,
++	.open = rtl8366_debugfs_open,
++	.owner = THIS_MODULE
++};
++
++static void rtl8366_debugfs_init(struct rtl8366_smi *smi)
++{
++	struct dentry *node;
++	struct dentry *root;
++
++	if (!smi->debugfs_root)
++		smi->debugfs_root = debugfs_create_dir(dev_name(smi->parent),
++						       NULL);
++
++	if (!smi->debugfs_root) {
++		dev_err(smi->parent, "Unable to create debugfs dir\n");
++		return;
++	}
++	root = smi->debugfs_root;
++
++	node = debugfs_create_x16("reg", S_IRUGO | S_IWUSR, root,
++				  &smi->dbg_reg);
++	if (!node) {
++		dev_err(smi->parent, "Creating debugfs file '%s' failed\n",
++			"reg");
++		return;
++	}
++
++	node = debugfs_create_file("val", S_IRUGO | S_IWUSR, root, smi,
++				   &fops_rtl8366_regs);
++	if (!node) {
++		dev_err(smi->parent, "Creating debugfs file '%s' failed\n",
++			"val");
++		return;
++	}
++
++	node = debugfs_create_file("vlan_mc", S_IRUSR, root, smi,
++				   &fops_rtl8366_vlan_mc);
++	if (!node) {
++		dev_err(smi->parent, "Creating debugfs file '%s' failed\n",
++			"vlan_mc");
++		return;
++	}
++
++	node = debugfs_create_u8("vlan_4k_page", S_IRUGO | S_IWUSR, root,
++				  &smi->dbg_vlan_4k_page);
++	if (!node) {
++		dev_err(smi->parent, "Creating debugfs file '%s' failed\n",
++			"vlan_4k_page");
++		return;
++	}
++
++	node = debugfs_create_file("vlan_4k", S_IRUSR, root, smi,
++				   &fops_rtl8366_vlan_4k);
++	if (!node) {
++		dev_err(smi->parent, "Creating debugfs file '%s' failed\n",
++			"vlan_4k");
++		return;
++	}
++
++	node = debugfs_create_file("pvid", S_IRUSR, root, smi,
++				   &fops_rtl8366_pvid);
++	if (!node) {
++		dev_err(smi->parent, "Creating debugfs file '%s' failed\n",
++			"pvid");
++		return;
++	}
++
++	node = debugfs_create_file("mibs", S_IRUSR, smi->debugfs_root, smi,
++				   &fops_rtl8366_mibs);
++	if (!node)
++		dev_err(smi->parent, "Creating debugfs file '%s' failed\n",
++			"mibs");
++}
++
++static void rtl8366_debugfs_remove(struct rtl8366_smi *smi)
++{
++	if (smi->debugfs_root) {
++		debugfs_remove_recursive(smi->debugfs_root);
++		smi->debugfs_root = NULL;
++	}
++}
++#else
++static inline void rtl8366_debugfs_init(struct rtl8366_smi *smi) {}
++static inline void rtl8366_debugfs_remove(struct rtl8366_smi *smi) {}
++#endif /* CONFIG_RTL8366_SMI_DEBUG_FS */
++
++static int rtl8366_smi_mii_init(struct rtl8366_smi *smi)
++{
++	int ret;
++
++#ifdef CONFIG_OF
++	struct device_node *np = NULL;
++
++	np = of_get_child_by_name(smi->parent->of_node, "mdio-bus");
++#endif
++
++	smi->mii_bus = mdiobus_alloc();
++	if (smi->mii_bus == NULL) {
++		ret = -ENOMEM;
++		goto err;
++	}
++
++	smi->mii_bus->priv = (void *) smi;
++	smi->mii_bus->name = dev_name(smi->parent);
++	smi->mii_bus->read = smi->ops->mii_read;
++	smi->mii_bus->write = smi->ops->mii_write;
++	snprintf(smi->mii_bus->id, MII_BUS_ID_SIZE, "%s",
++		 dev_name(smi->parent));
++	smi->mii_bus->parent = smi->parent;
++	smi->mii_bus->phy_mask = ~(0x1f);
++
++#ifdef CONFIG_OF
++	if (np)
++		ret = of_mdiobus_register(smi->mii_bus, np);
++	else
++#endif
++		ret = mdiobus_register(smi->mii_bus);
++
++	if (ret)
++		goto err_free;
++
++	return 0;
++
++ err_free:
++	mdiobus_free(smi->mii_bus);
++ err:
++	return ret;
++}
++
++static void rtl8366_smi_mii_cleanup(struct rtl8366_smi *smi)
++{
++	mdiobus_unregister(smi->mii_bus);
++	mdiobus_free(smi->mii_bus);
++}
++
++int rtl8366_sw_reset_switch(struct switch_dev *dev)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	int err;
++
++	err = rtl8366_reset(smi);
++	if (err)
++		return err;
++
++	err = smi->ops->setup(smi);
++	if (err)
++		return err;
++
++	err = rtl8366_reset_vlan(smi);
++	if (err)
++		return err;
++
++	err = rtl8366_enable_vlan(smi, 1);
++	if (err)
++		return err;
++
++	return rtl8366_enable_all_ports(smi, 1);
++}
++EXPORT_SYMBOL_GPL(rtl8366_sw_reset_switch);
++
++int rtl8366_sw_get_port_pvid(struct switch_dev *dev, int port, int *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	return rtl8366_get_pvid(smi, port, val);
++}
++EXPORT_SYMBOL_GPL(rtl8366_sw_get_port_pvid);
++
++int rtl8366_sw_set_port_pvid(struct switch_dev *dev, int port, int val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	return rtl8366_set_pvid(smi, port, val);
++}
++EXPORT_SYMBOL_GPL(rtl8366_sw_set_port_pvid);
++
++int rtl8366_sw_get_port_mib(struct switch_dev *dev,
++			    const struct switch_attr *attr,
++			    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	int i, len = 0;
++	unsigned long long counter = 0;
++	char *buf = smi->buf;
++
++	if (val->port_vlan >= smi->num_ports)
++		return -EINVAL;
++
++	len += snprintf(buf + len, sizeof(smi->buf) - len,
++			"Port %d MIB counters\n",
++			val->port_vlan);
++
++	for (i = 0; i < smi->num_mib_counters; ++i) {
++		len += snprintf(buf + len, sizeof(smi->buf) - len,
++				"%-36s: ", smi->mib_counters[i].name);
++		if (!smi->ops->get_mib_counter(smi, i, val->port_vlan,
++					       &counter))
++			len += snprintf(buf + len, sizeof(smi->buf) - len,
++					"%llu\n", counter);
++		else
++			len += snprintf(buf + len, sizeof(smi->buf) - len,
++					"%s\n", "error");
++	}
++
++	val->value.s = buf;
++	val->len = len;
++	return 0;
++}
++EXPORT_SYMBOL_GPL(rtl8366_sw_get_port_mib);
++
++int rtl8366_sw_get_port_stats(struct switch_dev *dev, int port,
++				struct switch_port_stats *stats,
++				int txb_id, int rxb_id)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	unsigned long long counter = 0;
++	int ret;
++
++	if (port >= smi->num_ports)
++		return -EINVAL;
++
++	ret = smi->ops->get_mib_counter(smi, txb_id, port, &counter);
++	if (ret)
++		return ret;
++
++	stats->tx_bytes = counter;
++
++	ret = smi->ops->get_mib_counter(smi, rxb_id, port, &counter);
++	if (ret)
++		return ret;
++
++	stats->rx_bytes = counter;
++
++	return 0;
++}
++EXPORT_SYMBOL_GPL(rtl8366_sw_get_port_stats);
++
++int rtl8366_sw_get_vlan_info(struct switch_dev *dev,
++			     const struct switch_attr *attr,
++			     struct switch_val *val)
++{
++	int i;
++	u32 len = 0;
++	struct rtl8366_vlan_4k vlan4k;
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	char *buf = smi->buf;
++	int err;
++
++	if (!smi->ops->is_vlan_valid(smi, val->port_vlan))
++		return -EINVAL;
++
++	memset(buf, '\0', sizeof(smi->buf));
++
++	err = smi->ops->get_vlan_4k(smi, val->port_vlan, &vlan4k);
++	if (err)
++		return err;
++
++	len += snprintf(buf + len, sizeof(smi->buf) - len,
++			"VLAN %d: Ports: '", vlan4k.vid);
++
++	for (i = 0; i < smi->num_ports; i++) {
++		if (!(vlan4k.member & (1 << i)))
++			continue;
++
++		len += snprintf(buf + len, sizeof(smi->buf) - len, "%d%s", i,
++				(vlan4k.untag & (1 << i)) ? "" : "t");
++	}
++
++	len += snprintf(buf + len, sizeof(smi->buf) - len,
++			"', members=%04x, untag=%04x, fid=%u",
++			vlan4k.member, vlan4k.untag, vlan4k.fid);
++
++	val->value.s = buf;
++	val->len = len;
++
++	return 0;
++}
++EXPORT_SYMBOL_GPL(rtl8366_sw_get_vlan_info);
++
++int rtl8366_sw_get_vlan_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	struct switch_port *port;
++	struct rtl8366_vlan_4k vlan4k;
++	int i;
++
++	if (!smi->ops->is_vlan_valid(smi, val->port_vlan))
++		return -EINVAL;
++
++	smi->ops->get_vlan_4k(smi, val->port_vlan, &vlan4k);
++
++	port = &val->value.ports[0];
++	val->len = 0;
++	for (i = 0; i < smi->num_ports; i++) {
++		if (!(vlan4k.member & BIT(i)))
++			continue;
++
++		port->id = i;
++		port->flags = (vlan4k.untag & BIT(i)) ?
++					0 : BIT(SWITCH_PORT_FLAG_TAGGED);
++		val->len++;
++		port++;
++	}
++	return 0;
++}
++EXPORT_SYMBOL_GPL(rtl8366_sw_get_vlan_ports);
++
++int rtl8366_sw_set_vlan_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	struct switch_port *port;
++	u32 member = 0;
++	u32 untag = 0;
++	int err;
++	int i;
++
++	if (!smi->ops->is_vlan_valid(smi, val->port_vlan))
++		return -EINVAL;
++
++	port = &val->value.ports[0];
++	for (i = 0; i < val->len; i++, port++) {
++		int pvid = 0;
++		member |= BIT(port->id);
++
++		if (!(port->flags & BIT(SWITCH_PORT_FLAG_TAGGED)))
++			untag |= BIT(port->id);
++
++		/*
++		 * To ensure that we have a valid MC entry for this VLAN,
++		 * initialize the port VLAN ID here.
++		 */
++		err = rtl8366_get_pvid(smi, port->id, &pvid);
++		if (err < 0)
++			return err;
++		if (pvid == 0) {
++			err = rtl8366_set_pvid(smi, port->id, val->port_vlan);
++			if (err < 0)
++				return err;
++		}
++	}
++
++	return rtl8366_set_vlan(smi, val->port_vlan, member, untag, 0);
++}
++EXPORT_SYMBOL_GPL(rtl8366_sw_set_vlan_ports);
++
++int rtl8366_sw_get_vlan_fid(struct switch_dev *dev,
++			    const struct switch_attr *attr,
++			    struct switch_val *val)
++{
++	struct rtl8366_vlan_4k vlan4k;
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	int err;
++
++	if (!smi->ops->is_vlan_valid(smi, val->port_vlan))
++		return -EINVAL;
++
++	err = smi->ops->get_vlan_4k(smi, val->port_vlan, &vlan4k);
++	if (err)
++		return err;
++
++	val->value.i = vlan4k.fid;
++
++	return 0;
++}
++EXPORT_SYMBOL_GPL(rtl8366_sw_get_vlan_fid);
++
++int rtl8366_sw_set_vlan_fid(struct switch_dev *dev,
++			    const struct switch_attr *attr,
++			    struct switch_val *val)
++{
++	struct rtl8366_vlan_4k vlan4k;
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	int err;
++
++	if (!smi->ops->is_vlan_valid(smi, val->port_vlan))
++		return -EINVAL;
++
++	if (val->value.i < 0 || val->value.i > attr->max)
++		return -EINVAL;
++
++	err = smi->ops->get_vlan_4k(smi, val->port_vlan, &vlan4k);
++	if (err)
++		return err;
++
++	return rtl8366_set_vlan(smi, val->port_vlan,
++				vlan4k.member,
++				vlan4k.untag,
++				val->value.i);
++}
++EXPORT_SYMBOL_GPL(rtl8366_sw_set_vlan_fid);
++
++int rtl8366_sw_get_vlan_enable(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++
++	if (attr->ofs > 2)
++		return -EINVAL;
++
++	if (attr->ofs == 1)
++		val->value.i = smi->vlan_enabled;
++	else
++		val->value.i = smi->vlan4k_enabled;
++
++	return 0;
++}
++EXPORT_SYMBOL_GPL(rtl8366_sw_get_vlan_enable);
++
++int rtl8366_sw_set_vlan_enable(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	int err;
++
++	if (attr->ofs > 2)
++		return -EINVAL;
++
++	if (attr->ofs == 1)
++		err = rtl8366_enable_vlan(smi, val->value.i);
++	else
++		err = rtl8366_enable_vlan4k(smi, val->value.i);
++
++	return err;
++}
++EXPORT_SYMBOL_GPL(rtl8366_sw_set_vlan_enable);
++
++struct rtl8366_smi *rtl8366_smi_alloc(struct device *parent)
++{
++	struct rtl8366_smi *smi;
++
++	BUG_ON(!parent);
++
++	smi = kzalloc(sizeof(*smi), GFP_KERNEL);
++	if (!smi) {
++		dev_err(parent, "no memory for private data\n");
++		return NULL;
++	}
++
++	smi->parent = parent;
++	return smi;
++}
++EXPORT_SYMBOL_GPL(rtl8366_smi_alloc);
++
++static int __rtl8366_smi_init(struct rtl8366_smi *smi, const char *name)
++{
++	int err;
++
++	if (!smi->ext_mbus) {
++		err = gpio_request(smi->gpio_sda, name);
++		if (err) {
++			printk(KERN_ERR "rtl8366_smi: gpio_request failed for %u, err=%d\n",
++				smi->gpio_sda, err);
++			goto err_out;
++		}
++
++		err = gpio_request(smi->gpio_sck, name);
++		if (err) {
++			printk(KERN_ERR "rtl8366_smi: gpio_request failed for %u, err=%d\n",
++				smi->gpio_sck, err);
++			goto err_free_sda;
++		}
++	}
++
++	spin_lock_init(&smi->lock);
++
++	/* start the switch */
++	if (smi->hw_reset) {
++		smi->hw_reset(smi, false);
++		msleep(RTL8366_SMI_HW_START_DELAY);
++	}
++
++	return 0;
++
++ err_free_sda:
++	gpio_free(smi->gpio_sda);
++ err_out:
++	return err;
++}
++
++static void __rtl8366_smi_cleanup(struct rtl8366_smi *smi)
++{
++	if (smi->hw_reset)
++		smi->hw_reset(smi, true);
++
++	if (!smi->ext_mbus) {
++		gpio_free(smi->gpio_sck);
++		gpio_free(smi->gpio_sda);
++	}
++}
++
++enum rtl8366_type rtl8366_smi_detect(struct rtl8366_platform_data *pdata)
++{
++	static struct rtl8366_smi smi;
++	enum rtl8366_type type = RTL8366_TYPE_UNKNOWN;
++	u32 reg = 0;
++
++	memset(&smi, 0, sizeof(smi));
++	smi.gpio_sda = pdata->gpio_sda;
++	smi.gpio_sck = pdata->gpio_sck;
++	smi.clk_delay = 10;
++	smi.cmd_read  = 0xa9;
++	smi.cmd_write = 0xa8;
++
++	if (__rtl8366_smi_init(&smi, "rtl8366"))
++		goto out;
++
++	if (rtl8366_smi_read_reg(&smi, 0x5c, &reg))
++		goto cleanup;
++
++	switch(reg) {
++	case 0x6027:
++		printk("Found an RTL8366S switch\n");
++		type = RTL8366_TYPE_S;
++		break;
++	case 0x5937:
++		printk("Found an RTL8366RB switch\n");
++		type = RTL8366_TYPE_RB;
++		break;
++	default:
++		printk("Found an Unknown RTL8366 switch (id=0x%04x)\n", reg);
++		break;
++	}
++
++cleanup:
++	__rtl8366_smi_cleanup(&smi);
++out:
++	return type;
++}
++
++int rtl8366_smi_init(struct rtl8366_smi *smi)
++{
++	int err;
++
++	if (!smi->ops)
++		return -EINVAL;
++
++	err = __rtl8366_smi_init(smi, dev_name(smi->parent));
++	if (err)
++		goto err_out;
++
++	if (!smi->ext_mbus)
++		dev_info(smi->parent, "using GPIO pins %u (SDA) and %u (SCK)\n",
++			 smi->gpio_sda, smi->gpio_sck);
++	else
++		dev_info(smi->parent, "using MDIO bus '%s'\n", smi->ext_mbus->name);
++
++	err = smi->ops->detect(smi);
++	if (err) {
++		dev_err(smi->parent, "chip detection failed, err=%d\n", err);
++		goto err_free_sck;
++	}
++
++	err = rtl8366_reset(smi);
++	if (err)
++		goto err_free_sck;
++
++	err = smi->ops->setup(smi);
++	if (err) {
++		dev_err(smi->parent, "chip setup failed, err=%d\n", err);
++		goto err_free_sck;
++	}
++
++	err = rtl8366_init_vlan(smi);
++	if (err) {
++		dev_err(smi->parent, "VLAN initialization failed, err=%d\n",
++			err);
++		goto err_free_sck;
++	}
++
++	err = rtl8366_enable_all_ports(smi, 1);
++	if (err)
++		goto err_free_sck;
++
++	err = rtl8366_smi_mii_init(smi);
++	if (err)
++		goto err_free_sck;
++
++	rtl8366_debugfs_init(smi);
++
++	return 0;
++
++ err_free_sck:
++	__rtl8366_smi_cleanup(smi);
++ err_out:
++	return err;
++}
++EXPORT_SYMBOL_GPL(rtl8366_smi_init);
++
++void rtl8366_smi_cleanup(struct rtl8366_smi *smi)
++{
++	rtl8366_debugfs_remove(smi);
++	rtl8366_smi_mii_cleanup(smi);
++	__rtl8366_smi_cleanup(smi);
++}
++EXPORT_SYMBOL_GPL(rtl8366_smi_cleanup);
++
++#ifdef CONFIG_OF
++static void rtl8366_smi_reset(struct rtl8366_smi *smi, bool active)
++{
++	if (active)
++		reset_control_assert(smi->reset);
++	else
++		reset_control_deassert(smi->reset);
++}
++
++int rtl8366_smi_probe_of(struct platform_device *pdev, struct rtl8366_smi *smi)
++{
++	int sck = of_get_named_gpio(pdev->dev.of_node, "gpio-sck", 0);
++	int sda = of_get_named_gpio(pdev->dev.of_node, "gpio-sda", 0);
++	struct device_node *np = pdev->dev.of_node;
++	struct device_node *mdio_node;
++
++	mdio_node = of_parse_phandle(np, "mii-bus", 0);
++	if (!mdio_node) {
++		dev_err(&pdev->dev, "cannot find mdio node phandle");
++		goto try_gpio;
++	}
++
++	smi->ext_mbus = of_mdio_find_bus(mdio_node);
++	if (!smi->ext_mbus) {
++		dev_info(&pdev->dev,
++			"cannot find mdio bus from bus handle (yet)");
++		goto try_gpio;
++	}
++
++	return 0;
++
++try_gpio:
++	if (!gpio_is_valid(sck) || !gpio_is_valid(sda)) {
++		if (!mdio_node) {
++			dev_err(&pdev->dev, "gpios missing in devictree\n");
++			return -EINVAL;
++		} else {
++			return -EPROBE_DEFER;
++		}
++	}
++
++	smi->gpio_sda = sda;
++	smi->gpio_sck = sck;
++	smi->reset = devm_reset_control_get(&pdev->dev, "switch");
++	if (!IS_ERR(smi->reset))
++		smi->hw_reset = rtl8366_smi_reset;
++
++	return 0;
++}
++#else
++static inline int rtl8366_smi_probe_of(struct platform_device *pdev, struct rtl8366_smi *smi)
++{
++	return -ENODEV;
++}
++#endif
++
++int rtl8366_smi_probe_plat(struct platform_device *pdev, struct rtl8366_smi *smi)
++{
++	struct rtl8366_platform_data *pdata = pdev->dev.platform_data;
++
++	if (!pdev->dev.platform_data) {
++		dev_err(&pdev->dev, "no platform data specified\n");
++		return -EINVAL;
++	}
++
++	smi->gpio_sda = pdata->gpio_sda;
++	smi->gpio_sck = pdata->gpio_sck;
++	smi->hw_reset = pdata->hw_reset;
++
++	return 0;
++}
++
++
++struct rtl8366_smi *rtl8366_smi_probe(struct platform_device *pdev)
++{
++	struct rtl8366_smi *smi;
++	int err;
++
++	smi = rtl8366_smi_alloc(&pdev->dev);
++	if (!smi)
++		return NULL;
++
++	if (pdev->dev.of_node)
++		err = rtl8366_smi_probe_of(pdev, smi);
++	else
++		err = rtl8366_smi_probe_plat(pdev, smi);
++
++	if (err)
++		goto free_smi;
++
++	return smi;
++
++free_smi:
++	kfree(smi);
++	return ERR_PTR(err);
++}
++EXPORT_SYMBOL_GPL(rtl8366_smi_probe);
++
++MODULE_DESCRIPTION("Realtek RTL8366 SMI interface driver");
++MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
++MODULE_LICENSE("GPL v2");
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/rtl8366_smi.h b/target/linux/generic/files-5.4/drivers/net/phy/rtl8366_smi.h
+new file mode 100644
+index 0000000000..d1d988a372
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/rtl8366_smi.h
+@@ -0,0 +1,160 @@
++/*
++ * Realtek RTL8366 SMI interface driver defines
++ *
++ * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#ifndef _RTL8366_SMI_H
++#define _RTL8366_SMI_H
++
++#include <linux/phy.h>
++#include <linux/switch.h>
++#include <linux/platform_device.h>
++#include <linux/reset.h>
++
++struct rtl8366_smi_ops;
++struct rtl8366_vlan_ops;
++struct mii_bus;
++struct dentry;
++struct inode;
++struct file;
++
++struct rtl8366_mib_counter {
++	unsigned	base;
++	unsigned	offset;
++	unsigned	length;
++	const char	*name;
++};
++
++struct rtl8366_smi {
++	struct device		*parent;
++	unsigned int		gpio_sda;
++	unsigned int		gpio_sck;
++	void			(*hw_reset)(struct rtl8366_smi *smi, bool active);
++	unsigned int		clk_delay;	/* ns */
++	u8			cmd_read;
++	u8			cmd_write;
++	spinlock_t		lock;
++	struct mii_bus		*mii_bus;
++	int			mii_irq[PHY_MAX_ADDR];
++	struct switch_dev	sw_dev;
++
++	unsigned int		cpu_port;
++	unsigned int		num_ports;
++	unsigned int		num_vlan_mc;
++	unsigned int		num_mib_counters;
++	struct rtl8366_mib_counter *mib_counters;
++
++	struct rtl8366_smi_ops	*ops;
++
++	int			vlan_enabled;
++	int			vlan4k_enabled;
++
++	char			buf[4096];
++
++	struct reset_control	*reset;
++
++#ifdef CONFIG_RTL8366_SMI_DEBUG_FS
++	struct dentry           *debugfs_root;
++	u16			dbg_reg;
++	u8			dbg_vlan_4k_page;
++#endif
++	struct mii_bus		*ext_mbus;
++};
++
++struct rtl8366_vlan_mc {
++	u16	vid;
++	u16	untag;
++	u16	member;
++	u8	fid;
++	u8	priority;
++};
++
++struct rtl8366_vlan_4k {
++	u16	vid;
++	u16	untag;
++	u16	member;
++	u8	fid;
++};
++
++struct rtl8366_smi_ops {
++	int	(*detect)(struct rtl8366_smi *smi);
++	int	(*reset_chip)(struct rtl8366_smi *smi);
++	int	(*setup)(struct rtl8366_smi *smi);
++
++	int	(*mii_read)(struct mii_bus *bus, int addr, int reg);
++	int	(*mii_write)(struct mii_bus *bus, int addr, int reg, u16 val);
++
++	int	(*get_vlan_mc)(struct rtl8366_smi *smi, u32 index,
++			       struct rtl8366_vlan_mc *vlanmc);
++	int	(*set_vlan_mc)(struct rtl8366_smi *smi, u32 index,
++			       const struct rtl8366_vlan_mc *vlanmc);
++	int	(*get_vlan_4k)(struct rtl8366_smi *smi, u32 vid,
++			       struct rtl8366_vlan_4k *vlan4k);
++	int	(*set_vlan_4k)(struct rtl8366_smi *smi,
++			       const struct rtl8366_vlan_4k *vlan4k);
++	int	(*get_mc_index)(struct rtl8366_smi *smi, int port, int *val);
++	int	(*set_mc_index)(struct rtl8366_smi *smi, int port, int index);
++	int	(*get_mib_counter)(struct rtl8366_smi *smi, int counter,
++				   int port, unsigned long long *val);
++	int	(*is_vlan_valid)(struct rtl8366_smi *smi, unsigned vlan);
++	int	(*enable_vlan)(struct rtl8366_smi *smi, int enable);
++	int	(*enable_vlan4k)(struct rtl8366_smi *smi, int enable);
++	int	(*enable_port)(struct rtl8366_smi *smi, int port, int enable);
++};
++
++struct rtl8366_smi *rtl8366_smi_alloc(struct device *parent);
++int rtl8366_smi_init(struct rtl8366_smi *smi);
++void rtl8366_smi_cleanup(struct rtl8366_smi *smi);
++int rtl8366_smi_write_reg(struct rtl8366_smi *smi, u32 addr, u32 data);
++int rtl8366_smi_write_reg_noack(struct rtl8366_smi *smi, u32 addr, u32 data);
++int rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data);
++int rtl8366_smi_rmwr(struct rtl8366_smi *smi, u32 addr, u32 mask, u32 data);
++
++int rtl8366_reset_vlan(struct rtl8366_smi *smi);
++int rtl8366_enable_vlan(struct rtl8366_smi *smi, int enable);
++int rtl8366_enable_all_ports(struct rtl8366_smi *smi, int enable);
++
++#ifdef CONFIG_RTL8366_SMI_DEBUG_FS
++int rtl8366_debugfs_open(struct inode *inode, struct file *file);
++#endif
++
++static inline struct rtl8366_smi *sw_to_rtl8366_smi(struct switch_dev *sw)
++{
++	return container_of(sw, struct rtl8366_smi, sw_dev);
++}
++
++int rtl8366_sw_reset_switch(struct switch_dev *dev);
++int rtl8366_sw_get_port_pvid(struct switch_dev *dev, int port, int *val);
++int rtl8366_sw_set_port_pvid(struct switch_dev *dev, int port, int val);
++int rtl8366_sw_get_port_mib(struct switch_dev *dev,
++			    const struct switch_attr *attr,
++			    struct switch_val *val);
++int rtl8366_sw_get_vlan_info(struct switch_dev *dev,
++			     const struct switch_attr *attr,
++			     struct switch_val *val);
++int rtl8366_sw_get_vlan_fid(struct switch_dev *dev,
++			     const struct switch_attr *attr,
++			     struct switch_val *val);
++int rtl8366_sw_set_vlan_fid(struct switch_dev *dev,
++			     const struct switch_attr *attr,
++			     struct switch_val *val);
++int rtl8366_sw_get_vlan_ports(struct switch_dev *dev, struct switch_val *val);
++int rtl8366_sw_set_vlan_ports(struct switch_dev *dev, struct switch_val *val);
++int rtl8366_sw_get_vlan_enable(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val);
++int rtl8366_sw_set_vlan_enable(struct switch_dev *dev,
++			       const struct switch_attr *attr,
++			       struct switch_val *val);
++int rtl8366_sw_get_port_stats(struct switch_dev *dev, int port,
++				struct switch_port_stats *stats,
++				int txb_id, int rxb_id);
++
++struct rtl8366_smi* rtl8366_smi_probe(struct platform_device *pdev);
++
++#endif /*  _RTL8366_SMI_H */
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/rtl8366rb.c b/target/linux/generic/files-5.4/drivers/net/phy/rtl8366rb.c
+new file mode 100644
+index 0000000000..0e0116051a
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/rtl8366rb.c
+@@ -0,0 +1,1532 @@
++/*
++ * Platform driver for the Realtek RTL8366RB ethernet switch
++ *
++ * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
++ * Copyright (C) 2010 Antti Seppälä <a.seppala@gmail.com>
++ * Copyright (C) 2010 Roman Yeryomin <roman@advem.lv>
++ * Copyright (C) 2011 Colin Leitner <colin.leitner@googlemail.com>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/device.h>
++#include <linux/of.h>
++#include <linux/of_platform.h>
++#include <linux/delay.h>
++#include <linux/skbuff.h>
++#include <linux/rtl8366.h>
++
++#include "rtl8366_smi.h"
++
++#define RTL8366RB_DRIVER_DESC	"Realtek RTL8366RB ethernet switch driver"
++#define RTL8366RB_DRIVER_VER	"0.2.4"
++
++#define RTL8366RB_PHY_NO_MAX	4
++#define RTL8366RB_PHY_PAGE_MAX	7
++#define RTL8366RB_PHY_ADDR_MAX	31
++
++/* Switch Global Configuration register */
++#define RTL8366RB_SGCR				0x0000
++#define RTL8366RB_SGCR_EN_BC_STORM_CTRL		BIT(0)
++#define RTL8366RB_SGCR_MAX_LENGTH(_x)		(_x << 4)
++#define RTL8366RB_SGCR_MAX_LENGTH_MASK		RTL8366RB_SGCR_MAX_LENGTH(0x3)
++#define RTL8366RB_SGCR_MAX_LENGTH_1522		RTL8366RB_SGCR_MAX_LENGTH(0x0)
++#define RTL8366RB_SGCR_MAX_LENGTH_1536		RTL8366RB_SGCR_MAX_LENGTH(0x1)
++#define RTL8366RB_SGCR_MAX_LENGTH_1552		RTL8366RB_SGCR_MAX_LENGTH(0x2)
++#define RTL8366RB_SGCR_MAX_LENGTH_9216		RTL8366RB_SGCR_MAX_LENGTH(0x3)
++#define RTL8366RB_SGCR_EN_VLAN			BIT(13)
++#define RTL8366RB_SGCR_EN_VLAN_4KTB		BIT(14)
++
++/* Port Enable Control register */
++#define RTL8366RB_PECR				0x0001
++
++/* Port Mirror Control Register */
++#define RTL8366RB_PMCR				0x0007
++#define RTL8366RB_PMCR_SOURCE_PORT(_x)		(_x)
++#define RTL8366RB_PMCR_SOURCE_PORT_MASK		0x000f
++#define RTL8366RB_PMCR_MONITOR_PORT(_x)		((_x) << 4)
++#define RTL8366RB_PMCR_MONITOR_PORT_MASK	0x00f0
++#define RTL8366RB_PMCR_MIRROR_RX		BIT(8)
++#define RTL8366RB_PMCR_MIRROR_TX		BIT(9)
++#define RTL8366RB_PMCR_MIRROR_SPC		BIT(10)
++#define RTL8366RB_PMCR_MIRROR_ISO		BIT(11)
++
++/* Switch Security Control registers */
++#define RTL8366RB_SSCR0				0x0002
++#define RTL8366RB_SSCR1				0x0003
++#define RTL8366RB_SSCR2				0x0004
++#define RTL8366RB_SSCR2_DROP_UNKNOWN_DA		BIT(0)
++
++#define RTL8366RB_RESET_CTRL_REG		0x0100
++#define RTL8366RB_CHIP_CTRL_RESET_HW		1
++#define RTL8366RB_CHIP_CTRL_RESET_SW		(1 << 1)
++
++#define RTL8366RB_CHIP_VERSION_CTRL_REG		0x050A
++#define RTL8366RB_CHIP_VERSION_MASK		0xf
++#define RTL8366RB_CHIP_ID_REG			0x0509
++#define RTL8366RB_CHIP_ID_8366			0x5937
++
++/* PHY registers control */
++#define RTL8366RB_PHY_ACCESS_CTRL_REG		0x8000
++#define RTL8366RB_PHY_ACCESS_DATA_REG		0x8002
++
++#define RTL8366RB_PHY_CTRL_READ			1
++#define RTL8366RB_PHY_CTRL_WRITE		0
++
++#define RTL8366RB_PHY_REG_MASK			0x1f
++#define RTL8366RB_PHY_PAGE_OFFSET		5
++#define RTL8366RB_PHY_PAGE_MASK			(0xf << 5)
++#define RTL8366RB_PHY_NO_OFFSET			9
++#define RTL8366RB_PHY_NO_MASK			(0x1f << 9)
++
++#define RTL8366RB_VLAN_INGRESS_CTRL2_REG	0x037f
++
++/* LED control registers */
++#define RTL8366RB_LED_BLINKRATE_REG		0x0430
++#define RTL8366RB_LED_BLINKRATE_BIT		0
++#define RTL8366RB_LED_BLINKRATE_MASK		0x0007
++
++#define RTL8366RB_LED_CTRL_REG			0x0431
++#define RTL8366RB_LED_0_1_CTRL_REG		0x0432
++#define RTL8366RB_LED_2_3_CTRL_REG		0x0433
++
++#define RTL8366RB_MIB_COUNT			33
++#define RTL8366RB_GLOBAL_MIB_COUNT		1
++#define RTL8366RB_MIB_COUNTER_PORT_OFFSET	0x0050
++#define RTL8366RB_MIB_COUNTER_BASE		0x1000
++#define RTL8366RB_MIB_CTRL_REG			0x13F0
++#define RTL8366RB_MIB_CTRL_USER_MASK		0x0FFC
++#define RTL8366RB_MIB_CTRL_BUSY_MASK		BIT(0)
++#define RTL8366RB_MIB_CTRL_RESET_MASK		BIT(1)
++#define RTL8366RB_MIB_CTRL_PORT_RESET(_p)	BIT(2 + (_p))
++#define RTL8366RB_MIB_CTRL_GLOBAL_RESET		BIT(11)
++
++#define RTL8366RB_PORT_VLAN_CTRL_BASE		0x0063
++#define RTL8366RB_PORT_VLAN_CTRL_REG(_p)  \
++		(RTL8366RB_PORT_VLAN_CTRL_BASE + (_p) / 4)
++#define RTL8366RB_PORT_VLAN_CTRL_MASK		0xf
++#define RTL8366RB_PORT_VLAN_CTRL_SHIFT(_p)	(4 * ((_p) % 4))
++
++
++#define RTL8366RB_VLAN_TABLE_READ_BASE		0x018C
++#define RTL8366RB_VLAN_TABLE_WRITE_BASE		0x0185
++
++
++#define RTL8366RB_TABLE_ACCESS_CTRL_REG		0x0180
++#define RTL8366RB_TABLE_VLAN_READ_CTRL		0x0E01
++#define RTL8366RB_TABLE_VLAN_WRITE_CTRL		0x0F01
++
++#define RTL8366RB_VLAN_MC_BASE(_x)		(0x0020 + (_x) * 3)
++
++
++#define RTL8366RB_PORT_LINK_STATUS_BASE		0x0014
++#define RTL8366RB_PORT_STATUS_SPEED_MASK	0x0003
++#define RTL8366RB_PORT_STATUS_DUPLEX_MASK	0x0004
++#define RTL8366RB_PORT_STATUS_LINK_MASK		0x0010
++#define RTL8366RB_PORT_STATUS_TXPAUSE_MASK	0x0020
++#define RTL8366RB_PORT_STATUS_RXPAUSE_MASK	0x0040
++#define RTL8366RB_PORT_STATUS_AN_MASK		0x0080
++
++
++#define RTL8366RB_PORT_NUM_CPU		5
++#define RTL8366RB_NUM_PORTS		6
++#define RTL8366RB_NUM_VLANS		16
++#define RTL8366RB_NUM_LEDGROUPS		4
++#define RTL8366RB_NUM_VIDS		4096
++#define RTL8366RB_PRIORITYMAX		7
++#define RTL8366RB_FIDMAX		7
++
++
++#define RTL8366RB_PORT_1		(1 << 0) /* In userspace port 0 */
++#define RTL8366RB_PORT_2		(1 << 1) /* In userspace port 1 */
++#define RTL8366RB_PORT_3		(1 << 2) /* In userspace port 2 */
++#define RTL8366RB_PORT_4		(1 << 3) /* In userspace port 3 */
++#define RTL8366RB_PORT_5		(1 << 4) /* In userspace port 4 */
++
++#define RTL8366RB_PORT_CPU		(1 << 5) /* CPU port */
++
++#define RTL8366RB_PORT_ALL		(RTL8366RB_PORT_1 |	\
++					 RTL8366RB_PORT_2 |	\
++					 RTL8366RB_PORT_3 |	\
++					 RTL8366RB_PORT_4 |	\
++					 RTL8366RB_PORT_5 |	\
++					 RTL8366RB_PORT_CPU)
++
++#define RTL8366RB_PORT_ALL_BUT_CPU	(RTL8366RB_PORT_1 |	\
++					 RTL8366RB_PORT_2 |	\
++					 RTL8366RB_PORT_3 |	\
++					 RTL8366RB_PORT_4 |	\
++					 RTL8366RB_PORT_5)
++
++#define RTL8366RB_PORT_ALL_EXTERNAL	(RTL8366RB_PORT_1 |	\
++					 RTL8366RB_PORT_2 |	\
++					 RTL8366RB_PORT_3 |	\
++					 RTL8366RB_PORT_4)
++
++#define RTL8366RB_PORT_ALL_INTERNAL	 RTL8366RB_PORT_CPU
++
++#define RTL8366RB_VLAN_VID_MASK		0xfff
++#define RTL8366RB_VLAN_PRIORITY_SHIFT	12
++#define RTL8366RB_VLAN_PRIORITY_MASK	0x7
++#define RTL8366RB_VLAN_UNTAG_SHIFT	8
++#define RTL8366RB_VLAN_UNTAG_MASK	0xff
++#define RTL8366RB_VLAN_MEMBER_MASK	0xff
++#define RTL8366RB_VLAN_FID_MASK		0x7
++
++
++/* Port ingress bandwidth control */
++#define RTL8366RB_IB_BASE		0x0200
++#define RTL8366RB_IB_REG(pnum)		(RTL8366RB_IB_BASE + pnum)
++#define RTL8366RB_IB_BDTH_MASK		0x3fff
++#define RTL8366RB_IB_PREIFG_OFFSET	14
++#define RTL8366RB_IB_PREIFG_MASK	(1 << RTL8366RB_IB_PREIFG_OFFSET)
++
++/* Port egress bandwidth control */
++#define RTL8366RB_EB_BASE		0x02d1
++#define RTL8366RB_EB_REG(pnum)		(RTL8366RB_EB_BASE + pnum)
++#define RTL8366RB_EB_BDTH_MASK		0x3fff
++#define RTL8366RB_EB_PREIFG_REG	0x02f8
++#define RTL8366RB_EB_PREIFG_OFFSET	9
++#define RTL8366RB_EB_PREIFG_MASK	(1 << RTL8366RB_EB_PREIFG_OFFSET)
++
++#define RTL8366RB_BDTH_SW_MAX		1048512
++#define RTL8366RB_BDTH_UNIT		64
++#define RTL8366RB_BDTH_REG_DEFAULT	16383
++
++/* QOS */
++#define RTL8366RB_QOS_BIT		15
++#define RTL8366RB_QOS_MASK		(1 << RTL8366RB_QOS_BIT)
++/* Include/Exclude Preamble and IFG (20 bytes). 0:Exclude, 1:Include. */
++#define RTL8366RB_QOS_DEFAULT_PREIFG	1
++
++
++#define RTL8366RB_MIB_RXB_ID		0	/* IfInOctets */
++#define RTL8366RB_MIB_TXB_ID		20	/* IfOutOctets */
++
++static struct rtl8366_mib_counter rtl8366rb_mib_counters[] = {
++	{ 0,  0, 4, "IfInOctets"				},
++	{ 0,  4, 4, "EtherStatsOctets"				},
++	{ 0,  8, 2, "EtherStatsUnderSizePkts"			},
++	{ 0, 10, 2, "EtherFragments"				},
++	{ 0, 12, 2, "EtherStatsPkts64Octets"			},
++	{ 0, 14, 2, "EtherStatsPkts65to127Octets"		},
++	{ 0, 16, 2, "EtherStatsPkts128to255Octets"		},
++	{ 0, 18, 2, "EtherStatsPkts256to511Octets"		},
++	{ 0, 20, 2, "EtherStatsPkts512to1023Octets"		},
++	{ 0, 22, 2, "EtherStatsPkts1024to1518Octets"		},
++	{ 0, 24, 2, "EtherOversizeStats"			},
++	{ 0, 26, 2, "EtherStatsJabbers"				},
++	{ 0, 28, 2, "IfInUcastPkts"				},
++	{ 0, 30, 2, "EtherStatsMulticastPkts"			},
++	{ 0, 32, 2, "EtherStatsBroadcastPkts"			},
++	{ 0, 34, 2, "EtherStatsDropEvents"			},
++	{ 0, 36, 2, "Dot3StatsFCSErrors"			},
++	{ 0, 38, 2, "Dot3StatsSymbolErrors"			},
++	{ 0, 40, 2, "Dot3InPauseFrames"				},
++	{ 0, 42, 2, "Dot3ControlInUnknownOpcodes"		},
++	{ 0, 44, 4, "IfOutOctets"				},
++	{ 0, 48, 2, "Dot3StatsSingleCollisionFrames"		},
++	{ 0, 50, 2, "Dot3StatMultipleCollisionFrames"		},
++	{ 0, 52, 2, "Dot3sDeferredTransmissions"		},
++	{ 0, 54, 2, "Dot3StatsLateCollisions"			},
++	{ 0, 56, 2, "EtherStatsCollisions"			},
++	{ 0, 58, 2, "Dot3StatsExcessiveCollisions"		},
++	{ 0, 60, 2, "Dot3OutPauseFrames"			},
++	{ 0, 62, 2, "Dot1dBasePortDelayExceededDiscards"	},
++	{ 0, 64, 2, "Dot1dTpPortInDiscards"			},
++	{ 0, 66, 2, "IfOutUcastPkts"				},
++	{ 0, 68, 2, "IfOutMulticastPkts"			},
++	{ 0, 70, 2, "IfOutBroadcastPkts"			},
++};
++
++#define REG_WR(_smi, _reg, _val)					\
++	do {								\
++		err = rtl8366_smi_write_reg(_smi, _reg, _val);		\
++		if (err)						\
++			return err;					\
++	} while (0)
++
++#define REG_RMW(_smi, _reg, _mask, _val)				\
++	do {								\
++		err = rtl8366_smi_rmwr(_smi, _reg, _mask, _val);	\
++		if (err)						\
++			return err;					\
++	} while (0)
++
++static int rtl8366rb_reset_chip(struct rtl8366_smi *smi)
++{
++	int timeout = 10;
++	u32 data;
++
++	rtl8366_smi_write_reg_noack(smi, RTL8366RB_RESET_CTRL_REG,
++			 	    RTL8366RB_CHIP_CTRL_RESET_HW);
++	do {
++		msleep(1);
++		if (rtl8366_smi_read_reg(smi, RTL8366RB_RESET_CTRL_REG, &data))
++			return -EIO;
++
++		if (!(data & RTL8366RB_CHIP_CTRL_RESET_HW))
++			break;
++	} while (--timeout);
++
++	if (!timeout) {
++		printk("Timeout waiting for the switch to reset\n");
++		return -EIO;
++	}
++
++	return 0;
++}
++
++static int rtl8366rb_setup(struct rtl8366_smi *smi)
++{
++	int err;
++#ifdef CONFIG_OF
++	unsigned i;
++	struct device_node *np;
++	unsigned num_initvals;
++	const __be32 *paddr;
++
++	np = smi->parent->of_node;
++
++	paddr = of_get_property(np, "realtek,initvals", &num_initvals);
++	if (paddr) {
++		dev_info(smi->parent, "applying initvals from DTS\n");
++
++		if (num_initvals < (2 * sizeof(*paddr)))
++			return -EINVAL;
++
++		num_initvals /= sizeof(*paddr);
++
++		for (i = 0; i < num_initvals - 1; i += 2) {
++			u32 reg = be32_to_cpup(paddr + i);
++			u32 val = be32_to_cpup(paddr + i + 1);
++
++			REG_WR(smi, reg, val);
++		}
++	}
++#endif
++
++	/* set maximum packet length to 1536 bytes */
++	REG_RMW(smi, RTL8366RB_SGCR, RTL8366RB_SGCR_MAX_LENGTH_MASK,
++		RTL8366RB_SGCR_MAX_LENGTH_1536);
++
++	/* enable learning for all ports */
++	REG_WR(smi, RTL8366RB_SSCR0, 0);
++
++	/* enable auto ageing for all ports */
++	REG_WR(smi, RTL8366RB_SSCR1, 0);
++
++	/*
++	 * discard VLAN tagged packets if the port is not a member of
++	 * the VLAN with which the packets is associated.
++	 */
++	REG_WR(smi, RTL8366RB_VLAN_INGRESS_CTRL2_REG, RTL8366RB_PORT_ALL);
++
++	/* don't drop packets whose DA has not been learned */
++	REG_RMW(smi, RTL8366RB_SSCR2, RTL8366RB_SSCR2_DROP_UNKNOWN_DA, 0);
++
++	return 0;
++}
++
++static int rtl8366rb_read_phy_reg(struct rtl8366_smi *smi,
++				 u32 phy_no, u32 page, u32 addr, u32 *data)
++{
++	u32 reg;
++	int ret;
++
++	if (phy_no > RTL8366RB_PHY_NO_MAX)
++		return -EINVAL;
++
++	if (page > RTL8366RB_PHY_PAGE_MAX)
++		return -EINVAL;
++
++	if (addr > RTL8366RB_PHY_ADDR_MAX)
++		return -EINVAL;
++
++	ret = rtl8366_smi_write_reg(smi, RTL8366RB_PHY_ACCESS_CTRL_REG,
++				    RTL8366RB_PHY_CTRL_READ);
++	if (ret)
++		return ret;
++
++	reg = 0x8000 | (1 << (phy_no + RTL8366RB_PHY_NO_OFFSET)) |
++	      ((page << RTL8366RB_PHY_PAGE_OFFSET) & RTL8366RB_PHY_PAGE_MASK) |
++	      (addr & RTL8366RB_PHY_REG_MASK);
++
++	ret = rtl8366_smi_write_reg(smi, reg, 0);
++	if (ret)
++		return ret;
++
++	ret = rtl8366_smi_read_reg(smi, RTL8366RB_PHY_ACCESS_DATA_REG, data);
++	if (ret)
++		return ret;
++
++	return 0;
++}
++
++static int rtl8366rb_write_phy_reg(struct rtl8366_smi *smi,
++				  u32 phy_no, u32 page, u32 addr, u32 data)
++{
++	u32 reg;
++	int ret;
++
++	if (phy_no > RTL8366RB_PHY_NO_MAX)
++		return -EINVAL;
++
++	if (page > RTL8366RB_PHY_PAGE_MAX)
++		return -EINVAL;
++
++	if (addr > RTL8366RB_PHY_ADDR_MAX)
++		return -EINVAL;
++
++	ret = rtl8366_smi_write_reg(smi, RTL8366RB_PHY_ACCESS_CTRL_REG,
++				    RTL8366RB_PHY_CTRL_WRITE);
++	if (ret)
++		return ret;
++
++	reg = 0x8000 | (1 << (phy_no + RTL8366RB_PHY_NO_OFFSET)) |
++	      ((page << RTL8366RB_PHY_PAGE_OFFSET) & RTL8366RB_PHY_PAGE_MASK) |
++	      (addr & RTL8366RB_PHY_REG_MASK);
++
++	ret = rtl8366_smi_write_reg(smi, reg, data);
++	if (ret)
++		return ret;
++
++	return 0;
++}
++
++static int rtl8366rb_get_mib_counter(struct rtl8366_smi *smi, int counter,
++				     int port, unsigned long long *val)
++{
++	int i;
++	int err;
++	u32 addr, data;
++	u64 mibvalue;
++
++	if (port > RTL8366RB_NUM_PORTS || counter >= RTL8366RB_MIB_COUNT)
++		return -EINVAL;
++
++	addr = RTL8366RB_MIB_COUNTER_BASE +
++	       RTL8366RB_MIB_COUNTER_PORT_OFFSET * (port) +
++	       rtl8366rb_mib_counters[counter].offset;
++
++	/*
++	 * Writing access counter address first
++	 * then ASIC will prepare 64bits counter wait for being retrived
++	 */
++	data = 0; /* writing data will be discard by ASIC */
++	err = rtl8366_smi_write_reg(smi, addr, data);
++	if (err)
++		return err;
++
++	/* read MIB control register */
++	err =  rtl8366_smi_read_reg(smi, RTL8366RB_MIB_CTRL_REG, &data);
++	if (err)
++		return err;
++
++	if (data & RTL8366RB_MIB_CTRL_BUSY_MASK)
++		return -EBUSY;
++
++	if (data & RTL8366RB_MIB_CTRL_RESET_MASK)
++		return -EIO;
++
++	mibvalue = 0;
++	for (i = rtl8366rb_mib_counters[counter].length; i > 0; i--) {
++		err = rtl8366_smi_read_reg(smi, addr + (i - 1), &data);
++		if (err)
++			return err;
++
++		mibvalue = (mibvalue << 16) | (data & 0xFFFF);
++	}
++
++	*val = mibvalue;
++	return 0;
++}
++
++static int rtl8366rb_get_vlan_4k(struct rtl8366_smi *smi, u32 vid,
++				 struct rtl8366_vlan_4k *vlan4k)
++{
++	u32 data[3];
++	int err;
++	int i;
++
++	memset(vlan4k, '\0', sizeof(struct rtl8366_vlan_4k));
++
++	if (vid >= RTL8366RB_NUM_VIDS)
++		return -EINVAL;
++
++	/* write VID */
++	err = rtl8366_smi_write_reg(smi, RTL8366RB_VLAN_TABLE_WRITE_BASE,
++				    vid & RTL8366RB_VLAN_VID_MASK);
++	if (err)
++		return err;
++
++	/* write table access control word */
++	err = rtl8366_smi_write_reg(smi, RTL8366RB_TABLE_ACCESS_CTRL_REG,
++				    RTL8366RB_TABLE_VLAN_READ_CTRL);
++	if (err)
++		return err;
++
++	for (i = 0; i < 3; i++) {
++		err = rtl8366_smi_read_reg(smi,
++					   RTL8366RB_VLAN_TABLE_READ_BASE + i,
++					   &data[i]);
++		if (err)
++			return err;
++	}
++
++	vlan4k->vid = vid;
++	vlan4k->untag = (data[1] >> RTL8366RB_VLAN_UNTAG_SHIFT) &
++			RTL8366RB_VLAN_UNTAG_MASK;
++	vlan4k->member = data[1] & RTL8366RB_VLAN_MEMBER_MASK;
++	vlan4k->fid = data[2] & RTL8366RB_VLAN_FID_MASK;
++
++	return 0;
++}
++
++static int rtl8366rb_set_vlan_4k(struct rtl8366_smi *smi,
++				 const struct rtl8366_vlan_4k *vlan4k)
++{
++	u32 data[3];
++	int err;
++	int i;
++
++	if (vlan4k->vid >= RTL8366RB_NUM_VIDS ||
++	    vlan4k->member > RTL8366RB_VLAN_MEMBER_MASK ||
++	    vlan4k->untag > RTL8366RB_VLAN_UNTAG_MASK ||
++	    vlan4k->fid > RTL8366RB_FIDMAX)
++		return -EINVAL;
++
++	data[0] = vlan4k->vid & RTL8366RB_VLAN_VID_MASK;
++	data[1] = (vlan4k->member & RTL8366RB_VLAN_MEMBER_MASK) |
++		  ((vlan4k->untag & RTL8366RB_VLAN_UNTAG_MASK) <<
++			RTL8366RB_VLAN_UNTAG_SHIFT);
++	data[2] = vlan4k->fid & RTL8366RB_VLAN_FID_MASK;
++
++	for (i = 0; i < 3; i++) {
++		err = rtl8366_smi_write_reg(smi,
++					    RTL8366RB_VLAN_TABLE_WRITE_BASE + i,
++					    data[i]);
++		if (err)
++			return err;
++	}
++
++	/* write table access control word */
++	err = rtl8366_smi_write_reg(smi, RTL8366RB_TABLE_ACCESS_CTRL_REG,
++				    RTL8366RB_TABLE_VLAN_WRITE_CTRL);
++
++	return err;
++}
++
++static int rtl8366rb_get_vlan_mc(struct rtl8366_smi *smi, u32 index,
++				 struct rtl8366_vlan_mc *vlanmc)
++{
++	u32 data[3];
++	int err;
++	int i;
++
++	memset(vlanmc, '\0', sizeof(struct rtl8366_vlan_mc));
++
++	if (index >= RTL8366RB_NUM_VLANS)
++		return -EINVAL;
++
++	for (i = 0; i < 3; i++) {
++		err = rtl8366_smi_read_reg(smi,
++					   RTL8366RB_VLAN_MC_BASE(index) + i,
++					   &data[i]);
++		if (err)
++			return err;
++	}
++
++	vlanmc->vid = data[0] & RTL8366RB_VLAN_VID_MASK;
++	vlanmc->priority = (data[0] >> RTL8366RB_VLAN_PRIORITY_SHIFT) &
++			   RTL8366RB_VLAN_PRIORITY_MASK;
++	vlanmc->untag = (data[1] >> RTL8366RB_VLAN_UNTAG_SHIFT) &
++			RTL8366RB_VLAN_UNTAG_MASK;
++	vlanmc->member = data[1] & RTL8366RB_VLAN_MEMBER_MASK;
++	vlanmc->fid = data[2] & RTL8366RB_VLAN_FID_MASK;
++
++	return 0;
++}
++
++static int rtl8366rb_set_vlan_mc(struct rtl8366_smi *smi, u32 index,
++				 const struct rtl8366_vlan_mc *vlanmc)
++{
++	u32 data[3];
++	int err;
++	int i;
++
++	if (index >= RTL8366RB_NUM_VLANS ||
++	    vlanmc->vid >= RTL8366RB_NUM_VIDS ||
++	    vlanmc->priority > RTL8366RB_PRIORITYMAX ||
++	    vlanmc->member > RTL8366RB_VLAN_MEMBER_MASK ||
++	    vlanmc->untag > RTL8366RB_VLAN_UNTAG_MASK ||
++	    vlanmc->fid > RTL8366RB_FIDMAX)
++		return -EINVAL;
++
++	data[0] = (vlanmc->vid & RTL8366RB_VLAN_VID_MASK) |
++		  ((vlanmc->priority & RTL8366RB_VLAN_PRIORITY_MASK) <<
++			RTL8366RB_VLAN_PRIORITY_SHIFT);
++	data[1] = (vlanmc->member & RTL8366RB_VLAN_MEMBER_MASK) |
++		  ((vlanmc->untag & RTL8366RB_VLAN_UNTAG_MASK) <<
++			RTL8366RB_VLAN_UNTAG_SHIFT);
++	data[2] = vlanmc->fid & RTL8366RB_VLAN_FID_MASK;
++
++	for (i = 0; i < 3; i++) {
++		err = rtl8366_smi_write_reg(smi,
++					    RTL8366RB_VLAN_MC_BASE(index) + i,
++					    data[i]);
++		if (err)
++			return err;
++	}
++
++	return 0;
++}
++
++static int rtl8366rb_get_mc_index(struct rtl8366_smi *smi, int port, int *val)
++{
++	u32 data;
++	int err;
++
++	if (port >= RTL8366RB_NUM_PORTS)
++		return -EINVAL;
++
++	err = rtl8366_smi_read_reg(smi, RTL8366RB_PORT_VLAN_CTRL_REG(port),
++				   &data);
++	if (err)
++		return err;
++
++	*val = (data >> RTL8366RB_PORT_VLAN_CTRL_SHIFT(port)) &
++	       RTL8366RB_PORT_VLAN_CTRL_MASK;
++
++	return 0;
++
++}
++
++static int rtl8366rb_set_mc_index(struct rtl8366_smi *smi, int port, int index)
++{
++	if (port >= RTL8366RB_NUM_PORTS || index >= RTL8366RB_NUM_VLANS)
++		return -EINVAL;
++
++	return rtl8366_smi_rmwr(smi, RTL8366RB_PORT_VLAN_CTRL_REG(port),
++				RTL8366RB_PORT_VLAN_CTRL_MASK <<
++					RTL8366RB_PORT_VLAN_CTRL_SHIFT(port),
++				(index & RTL8366RB_PORT_VLAN_CTRL_MASK) <<
++					RTL8366RB_PORT_VLAN_CTRL_SHIFT(port));
++}
++
++static int rtl8366rb_is_vlan_valid(struct rtl8366_smi *smi, unsigned vlan)
++{
++	unsigned max = RTL8366RB_NUM_VLANS;
++
++	if (smi->vlan4k_enabled)
++		max = RTL8366RB_NUM_VIDS - 1;
++
++	if (vlan == 0 || vlan >= max)
++		return 0;
++
++	return 1;
++}
++
++static int rtl8366rb_enable_vlan(struct rtl8366_smi *smi, int enable)
++{
++	return rtl8366_smi_rmwr(smi, RTL8366RB_SGCR, RTL8366RB_SGCR_EN_VLAN,
++				(enable) ? RTL8366RB_SGCR_EN_VLAN : 0);
++}
++
++static int rtl8366rb_enable_vlan4k(struct rtl8366_smi *smi, int enable)
++{
++	return rtl8366_smi_rmwr(smi, RTL8366RB_SGCR,
++				RTL8366RB_SGCR_EN_VLAN_4KTB,
++				(enable) ? RTL8366RB_SGCR_EN_VLAN_4KTB : 0);
++}
++
++static int rtl8366rb_enable_port(struct rtl8366_smi *smi, int port, int enable)
++{
++	return rtl8366_smi_rmwr(smi, RTL8366RB_PECR, (1 << port),
++				(enable) ? 0 : (1 << port));
++}
++
++static int rtl8366rb_sw_reset_mibs(struct switch_dev *dev,
++				  const struct switch_attr *attr,
++				  struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++
++	return rtl8366_smi_rmwr(smi, RTL8366RB_MIB_CTRL_REG, 0,
++			        RTL8366RB_MIB_CTRL_GLOBAL_RESET);
++}
++
++static int rtl8366rb_sw_get_blinkrate(struct switch_dev *dev,
++				     const struct switch_attr *attr,
++				     struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	rtl8366_smi_read_reg(smi, RTL8366RB_LED_BLINKRATE_REG, &data);
++
++	val->value.i = (data & (RTL8366RB_LED_BLINKRATE_MASK));
++
++	return 0;
++}
++
++static int rtl8366rb_sw_set_blinkrate(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++
++	if (val->value.i >= 6)
++		return -EINVAL;
++
++	return rtl8366_smi_rmwr(smi, RTL8366RB_LED_BLINKRATE_REG,
++				RTL8366RB_LED_BLINKRATE_MASK,
++				val->value.i);
++}
++
++static int rtl8366rb_sw_get_learning_enable(struct switch_dev *dev,
++				       const struct switch_attr *attr,
++				       struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	rtl8366_smi_read_reg(smi, RTL8366RB_SSCR0, &data);
++	val->value.i = !data;
++
++	return 0;
++}
++
++
++static int rtl8366rb_sw_set_learning_enable(struct switch_dev *dev,
++				       const struct switch_attr *attr,
++				       struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 portmask = 0;
++	int err = 0;
++
++	if (!val->value.i)
++		portmask = RTL8366RB_PORT_ALL;
++
++	/* set learning for all ports */
++	REG_WR(smi, RTL8366RB_SSCR0, portmask);
++
++	/* set auto ageing for all ports */
++	REG_WR(smi, RTL8366RB_SSCR1, portmask);
++
++	return 0;
++}
++
++static int rtl8366rb_sw_get_port_link(struct switch_dev *dev,
++				     int port,
++				     struct switch_port_link *link)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data = 0;
++	u32 speed;
++
++	if (port >= RTL8366RB_NUM_PORTS)
++		return -EINVAL;
++
++	rtl8366_smi_read_reg(smi, RTL8366RB_PORT_LINK_STATUS_BASE + (port / 2),
++			     &data);
++
++	if (port % 2)
++		data = data >> 8;
++
++	link->link = !!(data & RTL8366RB_PORT_STATUS_LINK_MASK);
++	if (!link->link)
++		return 0;
++
++	link->duplex = !!(data & RTL8366RB_PORT_STATUS_DUPLEX_MASK);
++	link->rx_flow = !!(data & RTL8366RB_PORT_STATUS_RXPAUSE_MASK);
++	link->tx_flow = !!(data & RTL8366RB_PORT_STATUS_TXPAUSE_MASK);
++	link->aneg = !!(data & RTL8366RB_PORT_STATUS_AN_MASK);
++
++	speed = (data & RTL8366RB_PORT_STATUS_SPEED_MASK);
++	switch (speed) {
++	case 0:
++		link->speed = SWITCH_PORT_SPEED_10;
++		break;
++	case 1:
++		link->speed = SWITCH_PORT_SPEED_100;
++		break;
++	case 2:
++		link->speed = SWITCH_PORT_SPEED_1000;
++		break;
++	default:
++		link->speed = SWITCH_PORT_SPEED_UNKNOWN;
++		break;
++	}
++
++	return 0;
++}
++
++static int rtl8366rb_sw_set_port_led(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++	u32 mask;
++	u32 reg;
++
++	if (val->port_vlan >= RTL8366RB_NUM_PORTS)
++		return -EINVAL;
++
++	if (val->port_vlan == RTL8366RB_PORT_NUM_CPU) {
++		reg = RTL8366RB_LED_BLINKRATE_REG;
++		mask = 0xF << 4;
++		data = val->value.i << 4;
++	} else {
++		reg = RTL8366RB_LED_CTRL_REG;
++		mask = 0xF << (val->port_vlan * 4),
++		data = val->value.i << (val->port_vlan * 4);
++	}
++
++	return rtl8366_smi_rmwr(smi, reg, mask, data);
++}
++
++static int rtl8366rb_sw_get_port_led(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data = 0;
++
++	if (val->port_vlan >= RTL8366RB_NUM_LEDGROUPS)
++		return -EINVAL;
++
++	rtl8366_smi_read_reg(smi, RTL8366RB_LED_CTRL_REG, &data);
++	val->value.i = (data >> (val->port_vlan * 4)) & 0x000F;
++
++	return 0;
++}
++
++static int rtl8366rb_sw_set_port_disable(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 mask, data;
++
++	if (val->port_vlan >= RTL8366RB_NUM_PORTS)
++		return -EINVAL;
++
++	mask = 1 << val->port_vlan ;
++	if (val->value.i)
++		data = mask;
++	else
++		data = 0;
++
++	return rtl8366_smi_rmwr(smi, RTL8366RB_PECR, mask, data);
++}
++
++static int rtl8366rb_sw_get_port_disable(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	if (val->port_vlan >= RTL8366RB_NUM_PORTS)
++		return -EINVAL;
++
++	rtl8366_smi_read_reg(smi, RTL8366RB_PECR, &data);
++	if (data & (1 << val->port_vlan))
++		val->value.i = 1;
++	else
++		val->value.i = 0;
++
++	return 0;
++}
++
++static int rtl8366rb_sw_set_port_rate_in(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++
++	if (val->port_vlan >= RTL8366RB_NUM_PORTS)
++		return -EINVAL;
++
++	if (val->value.i > 0 && val->value.i < RTL8366RB_BDTH_SW_MAX)
++		val->value.i = (val->value.i - 1) / RTL8366RB_BDTH_UNIT;
++	else
++		val->value.i = RTL8366RB_BDTH_REG_DEFAULT;
++
++	return rtl8366_smi_rmwr(smi, RTL8366RB_IB_REG(val->port_vlan),
++		RTL8366RB_IB_BDTH_MASK | RTL8366RB_IB_PREIFG_MASK,
++		val->value.i |
++		(RTL8366RB_QOS_DEFAULT_PREIFG << RTL8366RB_IB_PREIFG_OFFSET));
++
++}
++
++static int rtl8366rb_sw_get_port_rate_in(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	if (val->port_vlan >= RTL8366RB_NUM_PORTS)
++		return -EINVAL;
++
++	rtl8366_smi_read_reg(smi, RTL8366RB_IB_REG(val->port_vlan), &data);
++	data &= RTL8366RB_IB_BDTH_MASK;
++	if (data < RTL8366RB_IB_BDTH_MASK)
++		data += 1;
++
++	val->value.i = (int)data * RTL8366RB_BDTH_UNIT;
++
++	return 0;
++}
++
++static int rtl8366rb_sw_set_port_rate_out(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++
++	if (val->port_vlan >= RTL8366RB_NUM_PORTS)
++		return -EINVAL;
++
++	rtl8366_smi_rmwr(smi, RTL8366RB_EB_PREIFG_REG,
++		RTL8366RB_EB_PREIFG_MASK,
++		(RTL8366RB_QOS_DEFAULT_PREIFG << RTL8366RB_EB_PREIFG_OFFSET));
++
++	if (val->value.i > 0 && val->value.i < RTL8366RB_BDTH_SW_MAX)
++		val->value.i = (val->value.i - 1) / RTL8366RB_BDTH_UNIT;
++	else
++		val->value.i = RTL8366RB_BDTH_REG_DEFAULT;
++
++	return rtl8366_smi_rmwr(smi, RTL8366RB_EB_REG(val->port_vlan),
++			RTL8366RB_EB_BDTH_MASK, val->value.i );
++
++}
++
++static int rtl8366rb_sw_get_port_rate_out(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	if (val->port_vlan >= RTL8366RB_NUM_PORTS)
++		return -EINVAL;
++
++	rtl8366_smi_read_reg(smi, RTL8366RB_EB_REG(val->port_vlan), &data);
++	data &= RTL8366RB_EB_BDTH_MASK;
++	if (data < RTL8366RB_EB_BDTH_MASK)
++		data += 1;
++
++	val->value.i = (int)data * RTL8366RB_BDTH_UNIT;
++
++	return 0;
++}
++
++static int rtl8366rb_sw_set_qos_enable(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	if (val->value.i)
++		data = RTL8366RB_QOS_MASK;
++	else
++		data = 0;
++
++	return rtl8366_smi_rmwr(smi, RTL8366RB_SGCR, RTL8366RB_QOS_MASK, data);
++}
++
++static int rtl8366rb_sw_get_qos_enable(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	rtl8366_smi_read_reg(smi, RTL8366RB_SGCR, &data);
++	if (data & RTL8366RB_QOS_MASK)
++		val->value.i = 1;
++	else
++		val->value.i = 0;
++
++	return 0;
++}
++
++static int rtl8366rb_sw_set_mirror_rx_enable(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	if (val->value.i)
++		data = RTL8366RB_PMCR_MIRROR_RX;
++	else
++		data = 0;
++
++	return rtl8366_smi_rmwr(smi, RTL8366RB_PMCR, RTL8366RB_PMCR_MIRROR_RX, data);
++}
++
++static int rtl8366rb_sw_get_mirror_rx_enable(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	rtl8366_smi_read_reg(smi, RTL8366RB_PMCR, &data);
++	if (data & RTL8366RB_PMCR_MIRROR_RX)
++		val->value.i = 1;
++	else
++		val->value.i = 0;
++
++	return 0;
++}
++
++static int rtl8366rb_sw_set_mirror_tx_enable(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	if (val->value.i)
++		data = RTL8366RB_PMCR_MIRROR_TX;
++	else
++		data = 0;
++
++	return rtl8366_smi_rmwr(smi, RTL8366RB_PMCR, RTL8366RB_PMCR_MIRROR_TX, data);
++}
++
++static int rtl8366rb_sw_get_mirror_tx_enable(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	rtl8366_smi_read_reg(smi, RTL8366RB_PMCR, &data);
++	if (data & RTL8366RB_PMCR_MIRROR_TX)
++		val->value.i = 1;
++	else
++		val->value.i = 0;
++
++	return 0;
++}
++
++static int rtl8366rb_sw_set_monitor_isolation_enable(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	if (val->value.i)
++		data = RTL8366RB_PMCR_MIRROR_ISO;
++	else
++		data = 0;
++
++	return rtl8366_smi_rmwr(smi, RTL8366RB_PMCR, RTL8366RB_PMCR_MIRROR_ISO, data);
++}
++
++static int rtl8366rb_sw_get_monitor_isolation_enable(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	rtl8366_smi_read_reg(smi, RTL8366RB_PMCR, &data);
++	if (data & RTL8366RB_PMCR_MIRROR_ISO)
++		val->value.i = 1;
++	else
++		val->value.i = 0;
++
++	return 0;
++}
++
++static int rtl8366rb_sw_set_mirror_pause_frames_enable(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	if (val->value.i)
++		data = RTL8366RB_PMCR_MIRROR_SPC;
++	else
++		data = 0;
++
++	return rtl8366_smi_rmwr(smi, RTL8366RB_PMCR, RTL8366RB_PMCR_MIRROR_SPC, data);
++}
++
++static int rtl8366rb_sw_get_mirror_pause_frames_enable(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	rtl8366_smi_read_reg(smi, RTL8366RB_PMCR, &data);
++	if (data & RTL8366RB_PMCR_MIRROR_SPC)
++		val->value.i = 1;
++	else
++		val->value.i = 0;
++
++	return 0;
++}
++
++static int rtl8366rb_sw_set_mirror_monitor_port(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	data = RTL8366RB_PMCR_MONITOR_PORT(val->value.i);
++
++	return rtl8366_smi_rmwr(smi, RTL8366RB_PMCR, RTL8366RB_PMCR_MONITOR_PORT_MASK, data);
++}
++
++static int rtl8366rb_sw_get_mirror_monitor_port(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	rtl8366_smi_read_reg(smi, RTL8366RB_PMCR, &data);
++	val->value.i = (data & RTL8366RB_PMCR_MONITOR_PORT_MASK) >> 4;
++
++	return 0;
++}
++
++static int rtl8366rb_sw_set_mirror_source_port(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	data = RTL8366RB_PMCR_SOURCE_PORT(val->value.i);
++
++	return rtl8366_smi_rmwr(smi, RTL8366RB_PMCR, RTL8366RB_PMCR_SOURCE_PORT_MASK, data);
++}
++
++static int rtl8366rb_sw_get_mirror_source_port(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	rtl8366_smi_read_reg(smi, RTL8366RB_PMCR, &data);
++	val->value.i = data & RTL8366RB_PMCR_SOURCE_PORT_MASK;
++
++	return 0;
++}
++
++static int rtl8366rb_sw_reset_port_mibs(struct switch_dev *dev,
++				       const struct switch_attr *attr,
++				       struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++
++	if (val->port_vlan >= RTL8366RB_NUM_PORTS)
++		return -EINVAL;
++
++	return rtl8366_smi_rmwr(smi, RTL8366RB_MIB_CTRL_REG, 0,
++				RTL8366RB_MIB_CTRL_PORT_RESET(val->port_vlan));
++}
++
++static int rtl8366rb_sw_get_port_stats(struct switch_dev *dev, int port,
++					struct switch_port_stats *stats)
++{
++	return (rtl8366_sw_get_port_stats(dev, port, stats,
++				RTL8366RB_MIB_TXB_ID, RTL8366RB_MIB_RXB_ID));
++}
++
++static struct switch_attr rtl8366rb_globals[] = {
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_learning",
++		.description = "Enable learning, enable aging",
++		.set = rtl8366rb_sw_set_learning_enable,
++		.get = rtl8366rb_sw_get_learning_enable,
++		.max = 1
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_vlan",
++		.description = "Enable VLAN mode",
++		.set = rtl8366_sw_set_vlan_enable,
++		.get = rtl8366_sw_get_vlan_enable,
++		.max = 1,
++		.ofs = 1
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_vlan4k",
++		.description = "Enable VLAN 4K mode",
++		.set = rtl8366_sw_set_vlan_enable,
++		.get = rtl8366_sw_get_vlan_enable,
++		.max = 1,
++		.ofs = 2
++	}, {
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "reset_mibs",
++		.description = "Reset all MIB counters",
++		.set = rtl8366rb_sw_reset_mibs,
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "blinkrate",
++		.description = "Get/Set LED blinking rate (0 = 43ms, 1 = 84ms,"
++		" 2 = 120ms, 3 = 170ms, 4 = 340ms, 5 = 670ms)",
++		.set = rtl8366rb_sw_set_blinkrate,
++		.get = rtl8366rb_sw_get_blinkrate,
++		.max = 5
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_qos",
++		.description = "Enable QOS",
++		.set = rtl8366rb_sw_set_qos_enable,
++		.get = rtl8366rb_sw_get_qos_enable,
++		.max = 1
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_mirror_rx",
++		.description = "Enable mirroring of RX packets",
++		.set = rtl8366rb_sw_set_mirror_rx_enable,
++		.get = rtl8366rb_sw_get_mirror_rx_enable,
++		.max = 1
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_mirror_tx",
++		.description = "Enable mirroring of TX packets",
++		.set = rtl8366rb_sw_set_mirror_tx_enable,
++		.get = rtl8366rb_sw_get_mirror_tx_enable,
++		.max = 1
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_monitor_isolation",
++		.description = "Enable isolation of monitor port (TX packets will be dropped)",
++		.set = rtl8366rb_sw_set_monitor_isolation_enable,
++		.get = rtl8366rb_sw_get_monitor_isolation_enable,
++		.max = 1
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_mirror_pause_frames",
++		.description = "Enable mirroring of RX pause frames",
++		.set = rtl8366rb_sw_set_mirror_pause_frames_enable,
++		.get = rtl8366rb_sw_get_mirror_pause_frames_enable,
++		.max = 1
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "mirror_monitor_port",
++		.description = "Mirror monitor port",
++		.set = rtl8366rb_sw_set_mirror_monitor_port,
++		.get = rtl8366rb_sw_get_mirror_monitor_port,
++		.max = 5
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "mirror_source_port",
++		.description = "Mirror source port",
++		.set = rtl8366rb_sw_set_mirror_source_port,
++		.get = rtl8366rb_sw_get_mirror_source_port,
++		.max = 5
++	},
++};
++
++static struct switch_attr rtl8366rb_port[] = {
++	{
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "reset_mib",
++		.description = "Reset single port MIB counters",
++		.set = rtl8366rb_sw_reset_port_mibs,
++	}, {
++		.type = SWITCH_TYPE_STRING,
++		.name = "mib",
++		.description = "Get MIB counters for port",
++		.max = 33,
++		.set = NULL,
++		.get = rtl8366_sw_get_port_mib,
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "led",
++		.description = "Get/Set port group (0 - 3) led mode (0 - 15)",
++		.max = 15,
++		.set = rtl8366rb_sw_set_port_led,
++		.get = rtl8366rb_sw_get_port_led,
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "disable",
++		.description = "Get/Set port state (enabled or disabled)",
++		.max = 1,
++		.set = rtl8366rb_sw_set_port_disable,
++		.get = rtl8366rb_sw_get_port_disable,
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "rate_in",
++		.description = "Get/Set port ingress (incoming) bandwidth limit in kbps",
++		.max = RTL8366RB_BDTH_SW_MAX,
++		.set = rtl8366rb_sw_set_port_rate_in,
++		.get = rtl8366rb_sw_get_port_rate_in,
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "rate_out",
++		.description = "Get/Set port egress (outgoing) bandwidth limit in kbps",
++		.max = RTL8366RB_BDTH_SW_MAX,
++		.set = rtl8366rb_sw_set_port_rate_out,
++		.get = rtl8366rb_sw_get_port_rate_out,
++	},
++};
++
++static struct switch_attr rtl8366rb_vlan[] = {
++	{
++		.type = SWITCH_TYPE_STRING,
++		.name = "info",
++		.description = "Get vlan information",
++		.max = 1,
++		.set = NULL,
++		.get = rtl8366_sw_get_vlan_info,
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "fid",
++		.description = "Get/Set vlan FID",
++		.max = RTL8366RB_FIDMAX,
++		.set = rtl8366_sw_set_vlan_fid,
++		.get = rtl8366_sw_get_vlan_fid,
++	},
++};
++
++static const struct switch_dev_ops rtl8366_ops = {
++	.attr_global = {
++		.attr = rtl8366rb_globals,
++		.n_attr = ARRAY_SIZE(rtl8366rb_globals),
++	},
++	.attr_port = {
++		.attr = rtl8366rb_port,
++		.n_attr = ARRAY_SIZE(rtl8366rb_port),
++	},
++	.attr_vlan = {
++		.attr = rtl8366rb_vlan,
++		.n_attr = ARRAY_SIZE(rtl8366rb_vlan),
++	},
++
++	.get_vlan_ports = rtl8366_sw_get_vlan_ports,
++	.set_vlan_ports = rtl8366_sw_set_vlan_ports,
++	.get_port_pvid = rtl8366_sw_get_port_pvid,
++	.set_port_pvid = rtl8366_sw_set_port_pvid,
++	.reset_switch = rtl8366_sw_reset_switch,
++	.get_port_link = rtl8366rb_sw_get_port_link,
++	.get_port_stats = rtl8366rb_sw_get_port_stats,
++};
++
++static int rtl8366rb_switch_init(struct rtl8366_smi *smi)
++{
++	struct switch_dev *dev = &smi->sw_dev;
++	int err;
++
++	dev->name = "RTL8366RB";
++	dev->cpu_port = RTL8366RB_PORT_NUM_CPU;
++	dev->ports = RTL8366RB_NUM_PORTS;
++	dev->vlans = RTL8366RB_NUM_VIDS;
++	dev->ops = &rtl8366_ops;
++	dev->alias = dev_name(smi->parent);
++
++	err = register_switch(dev, NULL);
++	if (err)
++		dev_err(smi->parent, "switch registration failed\n");
++
++	return err;
++}
++
++static void rtl8366rb_switch_cleanup(struct rtl8366_smi *smi)
++{
++	unregister_switch(&smi->sw_dev);
++}
++
++static int rtl8366rb_mii_read(struct mii_bus *bus, int addr, int reg)
++{
++	struct rtl8366_smi *smi = bus->priv;
++	u32 val = 0;
++	int err;
++
++	err = rtl8366rb_read_phy_reg(smi, addr, 0, reg, &val);
++	if (err)
++		return 0xffff;
++
++	return val;
++}
++
++static int rtl8366rb_mii_write(struct mii_bus *bus, int addr, int reg, u16 val)
++{
++	struct rtl8366_smi *smi = bus->priv;
++	u32 t;
++	int err;
++
++	err = rtl8366rb_write_phy_reg(smi, addr, 0, reg, val);
++	/* flush write */
++	(void) rtl8366rb_read_phy_reg(smi, addr, 0, reg, &t);
++
++	return err;
++}
++
++static int rtl8366rb_detect(struct rtl8366_smi *smi)
++{
++	u32 chip_id = 0;
++	u32 chip_ver = 0;
++	int ret;
++
++	ret = rtl8366_smi_read_reg(smi, RTL8366RB_CHIP_ID_REG, &chip_id);
++	if (ret) {
++		dev_err(smi->parent, "unable to read chip id\n");
++		return ret;
++	}
++
++	switch (chip_id) {
++	case RTL8366RB_CHIP_ID_8366:
++		break;
++	default:
++		dev_err(smi->parent, "unknown chip id (%04x)\n", chip_id);
++		return -ENODEV;
++	}
++
++	ret = rtl8366_smi_read_reg(smi, RTL8366RB_CHIP_VERSION_CTRL_REG,
++				   &chip_ver);
++	if (ret) {
++		dev_err(smi->parent, "unable to read chip version\n");
++		return ret;
++	}
++
++	dev_info(smi->parent, "RTL%04x ver. %u chip found\n",
++		 chip_id, chip_ver & RTL8366RB_CHIP_VERSION_MASK);
++
++	return 0;
++}
++
++static struct rtl8366_smi_ops rtl8366rb_smi_ops = {
++	.detect		= rtl8366rb_detect,
++	.reset_chip	= rtl8366rb_reset_chip,
++	.setup		= rtl8366rb_setup,
++
++	.mii_read	= rtl8366rb_mii_read,
++	.mii_write	= rtl8366rb_mii_write,
++
++	.get_vlan_mc	= rtl8366rb_get_vlan_mc,
++	.set_vlan_mc	= rtl8366rb_set_vlan_mc,
++	.get_vlan_4k	= rtl8366rb_get_vlan_4k,
++	.set_vlan_4k	= rtl8366rb_set_vlan_4k,
++	.get_mc_index	= rtl8366rb_get_mc_index,
++	.set_mc_index	= rtl8366rb_set_mc_index,
++	.get_mib_counter = rtl8366rb_get_mib_counter,
++	.is_vlan_valid	= rtl8366rb_is_vlan_valid,
++	.enable_vlan	= rtl8366rb_enable_vlan,
++	.enable_vlan4k	= rtl8366rb_enable_vlan4k,
++	.enable_port	= rtl8366rb_enable_port,
++};
++
++static int rtl8366rb_probe(struct platform_device *pdev)
++{
++	static int rtl8366_smi_version_printed;
++	struct rtl8366_smi *smi;
++	int err;
++
++	if (!rtl8366_smi_version_printed++)
++		printk(KERN_NOTICE RTL8366RB_DRIVER_DESC
++		       " version " RTL8366RB_DRIVER_VER"\n");
++
++	smi = rtl8366_smi_probe(pdev);
++	if (IS_ERR(smi))
++		return PTR_ERR(smi);
++
++	smi->clk_delay = 10;
++	smi->cmd_read = 0xa9;
++	smi->cmd_write = 0xa8;
++	smi->ops = &rtl8366rb_smi_ops;
++	smi->cpu_port = RTL8366RB_PORT_NUM_CPU;
++	smi->num_ports = RTL8366RB_NUM_PORTS;
++	smi->num_vlan_mc = RTL8366RB_NUM_VLANS;
++	smi->mib_counters = rtl8366rb_mib_counters;
++	smi->num_mib_counters = ARRAY_SIZE(rtl8366rb_mib_counters);
++
++	err = rtl8366_smi_init(smi);
++	if (err)
++		goto err_free_smi;
++
++	platform_set_drvdata(pdev, smi);
++
++	err = rtl8366rb_switch_init(smi);
++	if (err)
++		goto err_clear_drvdata;
++
++	return 0;
++
++ err_clear_drvdata:
++	platform_set_drvdata(pdev, NULL);
++	rtl8366_smi_cleanup(smi);
++ err_free_smi:
++	kfree(smi);
++	return err;
++}
++
++static int rtl8366rb_remove(struct platform_device *pdev)
++{
++	struct rtl8366_smi *smi = platform_get_drvdata(pdev);
++
++	if (smi) {
++		rtl8366rb_switch_cleanup(smi);
++		platform_set_drvdata(pdev, NULL);
++		rtl8366_smi_cleanup(smi);
++		kfree(smi);
++	}
++
++	return 0;
++}
++
++#ifdef CONFIG_OF
++static const struct of_device_id rtl8366rb_match[] = {
++	{ .compatible = "realtek,rtl8366rb" },
++	{},
++};
++MODULE_DEVICE_TABLE(of, rtl8366rb_match);
++#endif
++
++static struct platform_driver rtl8366rb_driver = {
++	.driver = {
++		.name		= RTL8366RB_DRIVER_NAME,
++		.owner		= THIS_MODULE,
++		.of_match_table = of_match_ptr(rtl8366rb_match),
++	},
++	.probe		= rtl8366rb_probe,
++	.remove		= rtl8366rb_remove,
++};
++
++static int __init rtl8366rb_module_init(void)
++{
++	return platform_driver_register(&rtl8366rb_driver);
++}
++module_init(rtl8366rb_module_init);
++
++static void __exit rtl8366rb_module_exit(void)
++{
++	platform_driver_unregister(&rtl8366rb_driver);
++}
++module_exit(rtl8366rb_module_exit);
++
++MODULE_DESCRIPTION(RTL8366RB_DRIVER_DESC);
++MODULE_VERSION(RTL8366RB_DRIVER_VER);
++MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
++MODULE_AUTHOR("Antti Seppälä <a.seppala@gmail.com>");
++MODULE_AUTHOR("Roman Yeryomin <roman@advem.lv>");
++MODULE_AUTHOR("Colin Leitner <colin.leitner@googlemail.com>");
++MODULE_LICENSE("GPL v2");
++MODULE_ALIAS("platform:" RTL8366RB_DRIVER_NAME);
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/rtl8366s.c b/target/linux/generic/files-5.4/drivers/net/phy/rtl8366s.c
+new file mode 100644
+index 0000000000..8c746778b8
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/rtl8366s.c
+@@ -0,0 +1,1320 @@
++/*
++ * Platform driver for the Realtek RTL8366S ethernet switch
++ *
++ * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
++ * Copyright (C) 2010 Antti Seppälä <a.seppala@gmail.com>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/device.h>
++#include <linux/of.h>
++#include <linux/of_platform.h>
++#include <linux/delay.h>
++#include <linux/skbuff.h>
++#include <linux/rtl8366.h>
++
++#include "rtl8366_smi.h"
++
++#define RTL8366S_DRIVER_DESC	"Realtek RTL8366S ethernet switch driver"
++#define RTL8366S_DRIVER_VER	"0.2.2"
++
++#define RTL8366S_PHY_NO_MAX	4
++#define RTL8366S_PHY_PAGE_MAX	7
++#define RTL8366S_PHY_ADDR_MAX	31
++
++/* Switch Global Configuration register */
++#define RTL8366S_SGCR				0x0000
++#define RTL8366S_SGCR_EN_BC_STORM_CTRL		BIT(0)
++#define RTL8366S_SGCR_MAX_LENGTH(_x)		(_x << 4)
++#define RTL8366S_SGCR_MAX_LENGTH_MASK		RTL8366S_SGCR_MAX_LENGTH(0x3)
++#define RTL8366S_SGCR_MAX_LENGTH_1522		RTL8366S_SGCR_MAX_LENGTH(0x0)
++#define RTL8366S_SGCR_MAX_LENGTH_1536		RTL8366S_SGCR_MAX_LENGTH(0x1)
++#define RTL8366S_SGCR_MAX_LENGTH_1552		RTL8366S_SGCR_MAX_LENGTH(0x2)
++#define RTL8366S_SGCR_MAX_LENGTH_16000		RTL8366S_SGCR_MAX_LENGTH(0x3)
++#define RTL8366S_SGCR_EN_VLAN			BIT(13)
++
++/* Port Enable Control register */
++#define RTL8366S_PECR				0x0001
++
++/* Green Ethernet Feature (based on GPL_BELKIN_F5D8235-4_v1000 v1.01.24) */
++#define RTL8366S_GREEN_ETHERNET_CTRL_REG	0x000a
++#define RTL8366S_GREEN_ETHERNET_CTRL_MASK	0x0018
++#define RTL8366S_GREEN_ETHERNET_TX_BIT		(1 << 3)
++#define RTL8366S_GREEN_ETHERNET_RX_BIT		(1 << 4)
++
++/* Switch Security Control registers */
++#define RTL8366S_SSCR0				0x0002
++#define RTL8366S_SSCR1				0x0003
++#define RTL8366S_SSCR2				0x0004
++#define RTL8366S_SSCR2_DROP_UNKNOWN_DA		BIT(0)
++
++#define RTL8366S_RESET_CTRL_REG			0x0100
++#define RTL8366S_CHIP_CTRL_RESET_HW		1
++#define RTL8366S_CHIP_CTRL_RESET_SW		(1 << 1)
++
++#define RTL8366S_CHIP_VERSION_CTRL_REG		0x0104
++#define RTL8366S_CHIP_VERSION_MASK		0xf
++#define RTL8366S_CHIP_ID_REG			0x0105
++#define RTL8366S_CHIP_ID_8366			0x8366
++
++/* PHY registers control */
++#define RTL8366S_PHY_ACCESS_CTRL_REG		0x8028
++#define RTL8366S_PHY_ACCESS_DATA_REG		0x8029
++
++#define RTL8366S_PHY_CTRL_READ			1
++#define RTL8366S_PHY_CTRL_WRITE			0
++
++#define RTL8366S_PHY_REG_MASK			0x1f
++#define RTL8366S_PHY_PAGE_OFFSET		5
++#define RTL8366S_PHY_PAGE_MASK			(0x7 << 5)
++#define RTL8366S_PHY_NO_OFFSET			9
++#define RTL8366S_PHY_NO_MASK			(0x1f << 9)
++
++/* Green Ethernet Feature for PHY ports */
++#define RTL8366S_PHY_POWER_SAVING_CTRL_REG	12
++#define RTL8366S_PHY_POWER_SAVING_MASK		0x1000
++
++/* LED control registers */
++#define RTL8366S_LED_BLINKRATE_REG		0x0420
++#define RTL8366S_LED_BLINKRATE_BIT		0
++#define RTL8366S_LED_BLINKRATE_MASK		0x0007
++
++#define RTL8366S_LED_CTRL_REG			0x0421
++#define RTL8366S_LED_0_1_CTRL_REG		0x0422
++#define RTL8366S_LED_2_3_CTRL_REG		0x0423
++
++#define RTL8366S_MIB_COUNT			33
++#define RTL8366S_GLOBAL_MIB_COUNT		1
++#define RTL8366S_MIB_COUNTER_PORT_OFFSET	0x0040
++#define RTL8366S_MIB_COUNTER_BASE		0x1000
++#define RTL8366S_MIB_COUNTER_PORT_OFFSET2	0x0008
++#define RTL8366S_MIB_COUNTER_BASE2		0x1180
++#define RTL8366S_MIB_CTRL_REG			0x11F0
++#define RTL8366S_MIB_CTRL_USER_MASK		0x01FF
++#define RTL8366S_MIB_CTRL_BUSY_MASK		0x0001
++#define RTL8366S_MIB_CTRL_RESET_MASK		0x0002
++
++#define RTL8366S_MIB_CTRL_GLOBAL_RESET_MASK	0x0004
++#define RTL8366S_MIB_CTRL_PORT_RESET_BIT	0x0003
++#define RTL8366S_MIB_CTRL_PORT_RESET_MASK	0x01FC
++
++
++#define RTL8366S_PORT_VLAN_CTRL_BASE		0x0058
++#define RTL8366S_PORT_VLAN_CTRL_REG(_p)  \
++		(RTL8366S_PORT_VLAN_CTRL_BASE + (_p) / 4)
++#define RTL8366S_PORT_VLAN_CTRL_MASK		0xf
++#define RTL8366S_PORT_VLAN_CTRL_SHIFT(_p)	(4 * ((_p) % 4))
++
++
++#define RTL8366S_VLAN_TABLE_READ_BASE		0x018B
++#define RTL8366S_VLAN_TABLE_WRITE_BASE		0x0185
++
++#define RTL8366S_VLAN_TB_CTRL_REG		0x010F
++
++#define RTL8366S_TABLE_ACCESS_CTRL_REG		0x0180
++#define RTL8366S_TABLE_VLAN_READ_CTRL		0x0E01
++#define RTL8366S_TABLE_VLAN_WRITE_CTRL		0x0F01
++
++#define RTL8366S_VLAN_MC_BASE(_x)		(0x0016 + (_x) * 2)
++
++#define RTL8366S_VLAN_MEMBERINGRESS_REG		0x0379
++
++#define RTL8366S_PORT_LINK_STATUS_BASE		0x0060
++#define RTL8366S_PORT_STATUS_SPEED_MASK		0x0003
++#define RTL8366S_PORT_STATUS_DUPLEX_MASK	0x0004
++#define RTL8366S_PORT_STATUS_LINK_MASK		0x0010
++#define RTL8366S_PORT_STATUS_TXPAUSE_MASK	0x0020
++#define RTL8366S_PORT_STATUS_RXPAUSE_MASK	0x0040
++#define RTL8366S_PORT_STATUS_AN_MASK		0x0080
++
++
++#define RTL8366S_PORT_NUM_CPU		5
++#define RTL8366S_NUM_PORTS		6
++#define RTL8366S_NUM_VLANS		16
++#define RTL8366S_NUM_LEDGROUPS		4
++#define RTL8366S_NUM_VIDS		4096
++#define RTL8366S_PRIORITYMAX		7
++#define RTL8366S_FIDMAX			7
++
++
++#define RTL8366S_PORT_1			(1 << 0) /* In userspace port 0 */
++#define RTL8366S_PORT_2			(1 << 1) /* In userspace port 1 */
++#define RTL8366S_PORT_3			(1 << 2) /* In userspace port 2 */
++#define RTL8366S_PORT_4			(1 << 3) /* In userspace port 3 */
++
++#define RTL8366S_PORT_UNKNOWN		(1 << 4) /* No known connection */
++#define RTL8366S_PORT_CPU		(1 << 5) /* CPU port */
++
++#define RTL8366S_PORT_ALL		(RTL8366S_PORT_1 |	\
++					 RTL8366S_PORT_2 |	\
++					 RTL8366S_PORT_3 |	\
++					 RTL8366S_PORT_4 |	\
++					 RTL8366S_PORT_UNKNOWN | \
++					 RTL8366S_PORT_CPU)
++
++#define RTL8366S_PORT_ALL_BUT_CPU	(RTL8366S_PORT_1 |	\
++					 RTL8366S_PORT_2 |	\
++					 RTL8366S_PORT_3 |	\
++					 RTL8366S_PORT_4 |	\
++					 RTL8366S_PORT_UNKNOWN)
++
++#define RTL8366S_PORT_ALL_EXTERNAL	(RTL8366S_PORT_1 |	\
++					 RTL8366S_PORT_2 |	\
++					 RTL8366S_PORT_3 |	\
++					 RTL8366S_PORT_4)
++
++#define RTL8366S_PORT_ALL_INTERNAL	(RTL8366S_PORT_UNKNOWN | \
++					 RTL8366S_PORT_CPU)
++
++#define RTL8366S_VLAN_VID_MASK		0xfff
++#define RTL8366S_VLAN_PRIORITY_SHIFT	12
++#define RTL8366S_VLAN_PRIORITY_MASK	0x7
++#define RTL8366S_VLAN_MEMBER_MASK	0x3f
++#define RTL8366S_VLAN_UNTAG_SHIFT	6
++#define RTL8366S_VLAN_UNTAG_MASK	0x3f
++#define RTL8366S_VLAN_FID_SHIFT		12
++#define RTL8366S_VLAN_FID_MASK		0x7
++
++#define RTL8366S_MIB_RXB_ID		0	/* IfInOctets */
++#define RTL8366S_MIB_TXB_ID		20	/* IfOutOctets */
++
++static struct rtl8366_mib_counter rtl8366s_mib_counters[] = {
++	{ 0,  0, 4, "IfInOctets"				},
++	{ 0,  4, 4, "EtherStatsOctets"				},
++	{ 0,  8, 2, "EtherStatsUnderSizePkts"			},
++	{ 0, 10, 2, "EtherFragments"				},
++	{ 0, 12, 2, "EtherStatsPkts64Octets"			},
++	{ 0, 14, 2, "EtherStatsPkts65to127Octets"		},
++	{ 0, 16, 2, "EtherStatsPkts128to255Octets"		},
++	{ 0, 18, 2, "EtherStatsPkts256to511Octets"		},
++	{ 0, 20, 2, "EtherStatsPkts512to1023Octets"		},
++	{ 0, 22, 2, "EtherStatsPkts1024to1518Octets"		},
++	{ 0, 24, 2, "EtherOversizeStats"			},
++	{ 0, 26, 2, "EtherStatsJabbers"				},
++	{ 0, 28, 2, "IfInUcastPkts"				},
++	{ 0, 30, 2, "EtherStatsMulticastPkts"			},
++	{ 0, 32, 2, "EtherStatsBroadcastPkts"			},
++	{ 0, 34, 2, "EtherStatsDropEvents"			},
++	{ 0, 36, 2, "Dot3StatsFCSErrors"			},
++	{ 0, 38, 2, "Dot3StatsSymbolErrors"			},
++	{ 0, 40, 2, "Dot3InPauseFrames"				},
++	{ 0, 42, 2, "Dot3ControlInUnknownOpcodes"		},
++	{ 0, 44, 4, "IfOutOctets"				},
++	{ 0, 48, 2, "Dot3StatsSingleCollisionFrames"		},
++	{ 0, 50, 2, "Dot3StatMultipleCollisionFrames"		},
++	{ 0, 52, 2, "Dot3sDeferredTransmissions"		},
++	{ 0, 54, 2, "Dot3StatsLateCollisions"			},
++	{ 0, 56, 2, "EtherStatsCollisions"			},
++	{ 0, 58, 2, "Dot3StatsExcessiveCollisions"		},
++	{ 0, 60, 2, "Dot3OutPauseFrames"			},
++	{ 0, 62, 2, "Dot1dBasePortDelayExceededDiscards"	},
++
++	/*
++	 * The following counters are accessible at a different
++	 * base address.
++	 */
++	{ 1,  0, 2, "Dot1dTpPortInDiscards"			},
++	{ 1,  2, 2, "IfOutUcastPkts"				},
++	{ 1,  4, 2, "IfOutMulticastPkts"			},
++	{ 1,  6, 2, "IfOutBroadcastPkts"			},
++};
++
++#define REG_WR(_smi, _reg, _val)					\
++	do {								\
++		err = rtl8366_smi_write_reg(_smi, _reg, _val);		\
++		if (err)						\
++			return err;					\
++	} while (0)
++
++#define REG_RMW(_smi, _reg, _mask, _val)				\
++	do {								\
++		err = rtl8366_smi_rmwr(_smi, _reg, _mask, _val);	\
++		if (err)						\
++			return err;					\
++	} while (0)
++
++static int rtl8366s_reset_chip(struct rtl8366_smi *smi)
++{
++	int timeout = 10;
++	u32 data;
++
++	rtl8366_smi_write_reg_noack(smi, RTL8366S_RESET_CTRL_REG,
++				    RTL8366S_CHIP_CTRL_RESET_HW);
++	do {
++		msleep(1);
++		if (rtl8366_smi_read_reg(smi, RTL8366S_RESET_CTRL_REG, &data))
++			return -EIO;
++
++		if (!(data & RTL8366S_CHIP_CTRL_RESET_HW))
++			break;
++	} while (--timeout);
++
++	if (!timeout) {
++		printk("Timeout waiting for the switch to reset\n");
++		return -EIO;
++	}
++
++	return 0;
++}
++
++static int rtl8366s_read_phy_reg(struct rtl8366_smi *smi,
++				 u32 phy_no, u32 page, u32 addr, u32 *data)
++{
++	u32 reg;
++	int ret;
++
++	if (phy_no > RTL8366S_PHY_NO_MAX)
++		return -EINVAL;
++
++	if (page > RTL8366S_PHY_PAGE_MAX)
++		return -EINVAL;
++
++	if (addr > RTL8366S_PHY_ADDR_MAX)
++		return -EINVAL;
++
++	ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
++				    RTL8366S_PHY_CTRL_READ);
++	if (ret)
++		return ret;
++
++	reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
++	      ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
++	      (addr & RTL8366S_PHY_REG_MASK);
++
++	ret = rtl8366_smi_write_reg(smi, reg, 0);
++	if (ret)
++		return ret;
++
++	ret = rtl8366_smi_read_reg(smi, RTL8366S_PHY_ACCESS_DATA_REG, data);
++	if (ret)
++		return ret;
++
++	return 0;
++}
++
++static int rtl8366s_write_phy_reg(struct rtl8366_smi *smi,
++				  u32 phy_no, u32 page, u32 addr, u32 data)
++{
++	u32 reg;
++	int ret;
++
++	if (phy_no > RTL8366S_PHY_NO_MAX)
++		return -EINVAL;
++
++	if (page > RTL8366S_PHY_PAGE_MAX)
++		return -EINVAL;
++
++	if (addr > RTL8366S_PHY_ADDR_MAX)
++		return -EINVAL;
++
++	ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
++				    RTL8366S_PHY_CTRL_WRITE);
++	if (ret)
++		return ret;
++
++	reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
++	      ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
++	      (addr & RTL8366S_PHY_REG_MASK);
++
++	ret = rtl8366_smi_write_reg(smi, reg, data);
++	if (ret)
++		return ret;
++
++	return 0;
++}
++
++static int rtl8366s_set_green_port(struct rtl8366_smi *smi, int port, int enable)
++{
++	int err;
++	u32 phyData;
++
++	if (port >= RTL8366S_NUM_PORTS)
++		return -EINVAL;
++
++	err = rtl8366s_read_phy_reg(smi, port, 0, RTL8366S_PHY_POWER_SAVING_CTRL_REG, &phyData);
++	if (err)
++		return err;
++
++	if (enable)
++		phyData |= RTL8366S_PHY_POWER_SAVING_MASK;
++	else
++		phyData &= ~RTL8366S_PHY_POWER_SAVING_MASK;
++
++	err = rtl8366s_write_phy_reg(smi, port, 0, RTL8366S_PHY_POWER_SAVING_CTRL_REG, phyData);
++	if (err)
++		return err;
++
++	return 0;
++}
++
++static int rtl8366s_set_green(struct rtl8366_smi *smi, int enable)
++{
++	int err;
++	unsigned i;
++	u32 data = 0;
++
++	if (!enable) {
++		for (i = 0; i <= RTL8366S_PHY_NO_MAX; i++) {
++			rtl8366s_set_green_port(smi, i, 0);
++		}
++	}
++
++	if (enable)
++		data = (RTL8366S_GREEN_ETHERNET_TX_BIT | RTL8366S_GREEN_ETHERNET_RX_BIT);
++
++	REG_RMW(smi, RTL8366S_GREEN_ETHERNET_CTRL_REG, RTL8366S_GREEN_ETHERNET_CTRL_MASK, data);
++
++	return 0;
++}
++
++static int rtl8366s_setup(struct rtl8366_smi *smi)
++{
++	struct rtl8366_platform_data *pdata;
++	int err;
++	unsigned i;
++#ifdef CONFIG_OF
++	struct device_node *np;
++	unsigned num_initvals;
++	const __be32 *paddr;
++#endif
++
++	pdata = smi->parent->platform_data;
++	if (pdata && pdata->num_initvals && pdata->initvals) {
++		dev_info(smi->parent, "applying initvals\n");
++		for (i = 0; i < pdata->num_initvals; i++)
++			REG_WR(smi, pdata->initvals[i].reg,
++			       pdata->initvals[i].val);
++	}
++
++#ifdef CONFIG_OF
++	np = smi->parent->of_node;
++
++	paddr = of_get_property(np, "realtek,initvals", &num_initvals);
++	if (paddr) {
++		dev_info(smi->parent, "applying initvals from DTS\n");
++
++		if (num_initvals < (2 * sizeof(*paddr)))
++			return -EINVAL;
++
++		num_initvals /= sizeof(*paddr);
++
++		for (i = 0; i < num_initvals - 1; i += 2) {
++			u32 reg = be32_to_cpup(paddr + i);
++			u32 val = be32_to_cpup(paddr + i + 1);
++
++			REG_WR(smi, reg, val);
++		}
++	}
++
++	if (of_property_read_bool(np, "realtek,green-ethernet-features")) {
++		dev_info(smi->parent, "activating Green Ethernet features\n");
++
++		err = rtl8366s_set_green(smi, 1);
++		if (err)
++			return err;
++
++		for (i = 0; i <= RTL8366S_PHY_NO_MAX; i++) {
++			err = rtl8366s_set_green_port(smi, i, 1);
++			if (err)
++				return err;
++		}
++	}
++#endif
++
++	/* set maximum packet length to 1536 bytes */
++	REG_RMW(smi, RTL8366S_SGCR, RTL8366S_SGCR_MAX_LENGTH_MASK,
++		RTL8366S_SGCR_MAX_LENGTH_1536);
++
++	/* enable learning for all ports */
++	REG_WR(smi, RTL8366S_SSCR0, 0);
++
++	/* enable auto ageing for all ports */
++	REG_WR(smi, RTL8366S_SSCR1, 0);
++
++	/*
++	 * discard VLAN tagged packets if the port is not a member of
++	 * the VLAN with which the packets is associated.
++	 */
++	REG_WR(smi, RTL8366S_VLAN_MEMBERINGRESS_REG, RTL8366S_PORT_ALL);
++
++	/* don't drop packets whose DA has not been learned */
++	REG_RMW(smi, RTL8366S_SSCR2, RTL8366S_SSCR2_DROP_UNKNOWN_DA, 0);
++
++	return 0;
++}
++
++static int rtl8366_get_mib_counter(struct rtl8366_smi *smi, int counter,
++				   int port, unsigned long long *val)
++{
++	int i;
++	int err;
++	u32 addr, data;
++	u64 mibvalue;
++
++	if (port > RTL8366S_NUM_PORTS || counter >= RTL8366S_MIB_COUNT)
++		return -EINVAL;
++
++	switch (rtl8366s_mib_counters[counter].base) {
++	case 0:
++		addr = RTL8366S_MIB_COUNTER_BASE +
++		       RTL8366S_MIB_COUNTER_PORT_OFFSET * port;
++		break;
++
++	case 1:
++		addr = RTL8366S_MIB_COUNTER_BASE2 +
++			RTL8366S_MIB_COUNTER_PORT_OFFSET2 * port;
++		break;
++
++	default:
++		return -EINVAL;
++	}
++
++	addr += rtl8366s_mib_counters[counter].offset;
++
++	/*
++	 * Writing access counter address first
++	 * then ASIC will prepare 64bits counter wait for being retrived
++	 */
++	data = 0; /* writing data will be discard by ASIC */
++	err = rtl8366_smi_write_reg(smi, addr, data);
++	if (err)
++		return err;
++
++	/* read MIB control register */
++	err =  rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
++	if (err)
++		return err;
++
++	if (data & RTL8366S_MIB_CTRL_BUSY_MASK)
++		return -EBUSY;
++
++	if (data & RTL8366S_MIB_CTRL_RESET_MASK)
++		return -EIO;
++
++	mibvalue = 0;
++	for (i = rtl8366s_mib_counters[counter].length; i > 0; i--) {
++		err = rtl8366_smi_read_reg(smi, addr + (i - 1), &data);
++		if (err)
++			return err;
++
++		mibvalue = (mibvalue << 16) | (data & 0xFFFF);
++	}
++
++	*val = mibvalue;
++	return 0;
++}
++
++static int rtl8366s_get_vlan_4k(struct rtl8366_smi *smi, u32 vid,
++				struct rtl8366_vlan_4k *vlan4k)
++{
++	u32 data[2];
++	int err;
++	int i;
++
++	memset(vlan4k, '\0', sizeof(struct rtl8366_vlan_4k));
++
++	if (vid >= RTL8366S_NUM_VIDS)
++		return -EINVAL;
++
++	/* write VID */
++	err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE,
++				    vid & RTL8366S_VLAN_VID_MASK);
++	if (err)
++		return err;
++
++	/* write table access control word */
++	err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
++				    RTL8366S_TABLE_VLAN_READ_CTRL);
++	if (err)
++		return err;
++
++	for (i = 0; i < 2; i++) {
++		err = rtl8366_smi_read_reg(smi,
++					   RTL8366S_VLAN_TABLE_READ_BASE + i,
++					   &data[i]);
++		if (err)
++			return err;
++	}
++
++	vlan4k->vid = vid;
++	vlan4k->untag = (data[1] >> RTL8366S_VLAN_UNTAG_SHIFT) &
++			RTL8366S_VLAN_UNTAG_MASK;
++	vlan4k->member = data[1] & RTL8366S_VLAN_MEMBER_MASK;
++	vlan4k->fid = (data[1] >> RTL8366S_VLAN_FID_SHIFT) &
++			RTL8366S_VLAN_FID_MASK;
++
++	return 0;
++}
++
++static int rtl8366s_set_vlan_4k(struct rtl8366_smi *smi,
++				const struct rtl8366_vlan_4k *vlan4k)
++{
++	u32 data[2];
++	int err;
++	int i;
++
++	if (vlan4k->vid >= RTL8366S_NUM_VIDS ||
++	    vlan4k->member > RTL8366S_VLAN_MEMBER_MASK ||
++	    vlan4k->untag > RTL8366S_VLAN_UNTAG_MASK ||
++	    vlan4k->fid > RTL8366S_FIDMAX)
++		return -EINVAL;
++
++	data[0] = vlan4k->vid & RTL8366S_VLAN_VID_MASK;
++	data[1] = (vlan4k->member & RTL8366S_VLAN_MEMBER_MASK) |
++		  ((vlan4k->untag & RTL8366S_VLAN_UNTAG_MASK) <<
++			RTL8366S_VLAN_UNTAG_SHIFT) |
++		  ((vlan4k->fid & RTL8366S_VLAN_FID_MASK) <<
++			RTL8366S_VLAN_FID_SHIFT);
++
++	for (i = 0; i < 2; i++) {
++		err = rtl8366_smi_write_reg(smi,
++					    RTL8366S_VLAN_TABLE_WRITE_BASE + i,
++					    data[i]);
++		if (err)
++			return err;
++	}
++
++	/* write table access control word */
++	err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
++				    RTL8366S_TABLE_VLAN_WRITE_CTRL);
++
++	return err;
++}
++
++static int rtl8366s_get_vlan_mc(struct rtl8366_smi *smi, u32 index,
++				struct rtl8366_vlan_mc *vlanmc)
++{
++	u32 data[2];
++	int err;
++	int i;
++
++	memset(vlanmc, '\0', sizeof(struct rtl8366_vlan_mc));
++
++	if (index >= RTL8366S_NUM_VLANS)
++		return -EINVAL;
++
++	for (i = 0; i < 2; i++) {
++		err = rtl8366_smi_read_reg(smi,
++					   RTL8366S_VLAN_MC_BASE(index) + i,
++					   &data[i]);
++		if (err)
++			return err;
++	}
++
++	vlanmc->vid = data[0] & RTL8366S_VLAN_VID_MASK;
++	vlanmc->priority = (data[0] >> RTL8366S_VLAN_PRIORITY_SHIFT) &
++			   RTL8366S_VLAN_PRIORITY_MASK;
++	vlanmc->untag = (data[1] >> RTL8366S_VLAN_UNTAG_SHIFT) &
++			RTL8366S_VLAN_UNTAG_MASK;
++	vlanmc->member = data[1] & RTL8366S_VLAN_MEMBER_MASK;
++	vlanmc->fid = (data[1] >> RTL8366S_VLAN_FID_SHIFT) &
++		      RTL8366S_VLAN_FID_MASK;
++
++	return 0;
++}
++
++static int rtl8366s_set_vlan_mc(struct rtl8366_smi *smi, u32 index,
++				const struct rtl8366_vlan_mc *vlanmc)
++{
++	u32 data[2];
++	int err;
++	int i;
++
++	if (index >= RTL8366S_NUM_VLANS ||
++	    vlanmc->vid >= RTL8366S_NUM_VIDS ||
++	    vlanmc->priority > RTL8366S_PRIORITYMAX ||
++	    vlanmc->member > RTL8366S_VLAN_MEMBER_MASK ||
++	    vlanmc->untag > RTL8366S_VLAN_UNTAG_MASK ||
++	    vlanmc->fid > RTL8366S_FIDMAX)
++		return -EINVAL;
++
++	data[0] = (vlanmc->vid & RTL8366S_VLAN_VID_MASK) |
++		  ((vlanmc->priority & RTL8366S_VLAN_PRIORITY_MASK) <<
++			RTL8366S_VLAN_PRIORITY_SHIFT);
++	data[1] = (vlanmc->member & RTL8366S_VLAN_MEMBER_MASK) |
++		  ((vlanmc->untag & RTL8366S_VLAN_UNTAG_MASK) <<
++			RTL8366S_VLAN_UNTAG_SHIFT) |
++		  ((vlanmc->fid & RTL8366S_VLAN_FID_MASK) <<
++			RTL8366S_VLAN_FID_SHIFT);
++
++	for (i = 0; i < 2; i++) {
++		err = rtl8366_smi_write_reg(smi,
++					    RTL8366S_VLAN_MC_BASE(index) + i,
++					    data[i]);
++		if (err)
++			return err;
++	}
++
++	return 0;
++}
++
++static int rtl8366s_get_mc_index(struct rtl8366_smi *smi, int port, int *val)
++{
++	u32 data;
++	int err;
++
++	if (port >= RTL8366S_NUM_PORTS)
++		return -EINVAL;
++
++	err = rtl8366_smi_read_reg(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
++				   &data);
++	if (err)
++		return err;
++
++	*val = (data >> RTL8366S_PORT_VLAN_CTRL_SHIFT(port)) &
++	       RTL8366S_PORT_VLAN_CTRL_MASK;
++
++	return 0;
++}
++
++static int rtl8366s_set_mc_index(struct rtl8366_smi *smi, int port, int index)
++{
++	if (port >= RTL8366S_NUM_PORTS || index >= RTL8366S_NUM_VLANS)
++		return -EINVAL;
++
++	return rtl8366_smi_rmwr(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
++				RTL8366S_PORT_VLAN_CTRL_MASK <<
++					RTL8366S_PORT_VLAN_CTRL_SHIFT(port),
++				(index & RTL8366S_PORT_VLAN_CTRL_MASK) <<
++					RTL8366S_PORT_VLAN_CTRL_SHIFT(port));
++}
++
++static int rtl8366s_enable_vlan(struct rtl8366_smi *smi, int enable)
++{
++	return rtl8366_smi_rmwr(smi, RTL8366S_SGCR, RTL8366S_SGCR_EN_VLAN,
++				(enable) ? RTL8366S_SGCR_EN_VLAN : 0);
++}
++
++static int rtl8366s_enable_vlan4k(struct rtl8366_smi *smi, int enable)
++{
++	return rtl8366_smi_rmwr(smi, RTL8366S_VLAN_TB_CTRL_REG,
++				1, (enable) ? 1 : 0);
++}
++
++static int rtl8366s_is_vlan_valid(struct rtl8366_smi *smi, unsigned vlan)
++{
++	unsigned max = RTL8366S_NUM_VLANS;
++
++	if (smi->vlan4k_enabled)
++		max = RTL8366S_NUM_VIDS - 1;
++
++	if (vlan == 0 || vlan >= max)
++		return 0;
++
++	return 1;
++}
++
++static int rtl8366s_enable_port(struct rtl8366_smi *smi, int port, int enable)
++{
++	return rtl8366_smi_rmwr(smi, RTL8366S_PECR, (1 << port),
++				(enable) ? 0 : (1 << port));
++}
++
++static int rtl8366s_sw_reset_mibs(struct switch_dev *dev,
++				  const struct switch_attr *attr,
++				  struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++
++	return rtl8366_smi_rmwr(smi, RTL8366S_MIB_CTRL_REG, 0, (1 << 2));
++}
++
++static int rtl8366s_sw_get_blinkrate(struct switch_dev *dev,
++				     const struct switch_attr *attr,
++				     struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	rtl8366_smi_read_reg(smi, RTL8366S_LED_BLINKRATE_REG, &data);
++
++	val->value.i = (data & (RTL8366S_LED_BLINKRATE_MASK));
++
++	return 0;
++}
++
++static int rtl8366s_sw_set_blinkrate(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++
++	if (val->value.i >= 6)
++		return -EINVAL;
++
++	return rtl8366_smi_rmwr(smi, RTL8366S_LED_BLINKRATE_REG,
++				RTL8366S_LED_BLINKRATE_MASK,
++				val->value.i);
++}
++
++static int rtl8366s_sw_get_max_length(struct switch_dev *dev,
++					const struct switch_attr *attr,
++					struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	rtl8366_smi_read_reg(smi, RTL8366S_SGCR, &data);
++
++	val->value.i = ((data & (RTL8366S_SGCR_MAX_LENGTH_MASK)) >> 4);
++
++	return 0;
++}
++
++static int rtl8366s_sw_set_max_length(struct switch_dev *dev,
++					const struct switch_attr *attr,
++					struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	char length_code;
++
++	switch (val->value.i) {
++		case 0:
++			length_code = RTL8366S_SGCR_MAX_LENGTH_1522;
++			break;
++		case 1:
++			length_code = RTL8366S_SGCR_MAX_LENGTH_1536;
++			break;
++		case 2:
++			length_code = RTL8366S_SGCR_MAX_LENGTH_1552;
++			break;
++		case 3:
++			length_code = RTL8366S_SGCR_MAX_LENGTH_16000;
++			break;
++		default:
++			return -EINVAL;
++	}
++
++	return rtl8366_smi_rmwr(smi, RTL8366S_SGCR,
++			RTL8366S_SGCR_MAX_LENGTH_MASK,
++			length_code);
++}
++
++static int rtl8366s_sw_get_learning_enable(struct switch_dev *dev,
++					   const struct switch_attr *attr,
++					   struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	rtl8366_smi_read_reg(smi,RTL8366S_SSCR0, &data);
++	val->value.i = !data;
++
++	return 0;
++}
++
++
++static int rtl8366s_sw_set_learning_enable(struct switch_dev *dev,
++					   const struct switch_attr *attr,
++					   struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 portmask = 0;
++	int err = 0;
++
++	if (!val->value.i)
++		portmask = RTL8366S_PORT_ALL;
++
++	/* set learning for all ports */
++	REG_WR(smi, RTL8366S_SSCR0, portmask);
++
++	/* set auto ageing for all ports */
++	REG_WR(smi, RTL8366S_SSCR1, portmask);
++
++	return 0;
++}
++
++static int rtl8366s_sw_get_green(struct switch_dev *dev,
++			      const struct switch_attr *attr,
++			      struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++	int err;
++
++	err = rtl8366_smi_read_reg(smi, RTL8366S_GREEN_ETHERNET_CTRL_REG, &data);
++	if (err)
++		return err;
++
++	val->value.i = ((data & (RTL8366S_GREEN_ETHERNET_TX_BIT | RTL8366S_GREEN_ETHERNET_RX_BIT)) != 0) ? 1 : 0;
++
++	return 0;
++}
++
++static int rtl8366s_sw_set_green(struct switch_dev *dev,
++				 const struct switch_attr *attr,
++				 struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++
++	return rtl8366s_set_green(smi, val->value.i);
++}
++
++static int rtl8366s_sw_get_port_link(struct switch_dev *dev,
++				     int port,
++				     struct switch_port_link *link)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data = 0;
++	u32 speed;
++
++	if (port >= RTL8366S_NUM_PORTS)
++		return -EINVAL;
++
++	rtl8366_smi_read_reg(smi, RTL8366S_PORT_LINK_STATUS_BASE + (port / 2),
++			     &data);
++
++	if (port % 2)
++		data = data >> 8;
++
++	link->link = !!(data & RTL8366S_PORT_STATUS_LINK_MASK);
++	if (!link->link)
++		return 0;
++
++	link->duplex = !!(data & RTL8366S_PORT_STATUS_DUPLEX_MASK);
++	link->rx_flow = !!(data & RTL8366S_PORT_STATUS_RXPAUSE_MASK);
++	link->tx_flow = !!(data & RTL8366S_PORT_STATUS_TXPAUSE_MASK);
++	link->aneg = !!(data & RTL8366S_PORT_STATUS_AN_MASK);
++
++	speed = (data & RTL8366S_PORT_STATUS_SPEED_MASK);
++	switch (speed) {
++	case 0:
++		link->speed = SWITCH_PORT_SPEED_10;
++		break;
++	case 1:
++		link->speed = SWITCH_PORT_SPEED_100;
++		break;
++	case 2:
++		link->speed = SWITCH_PORT_SPEED_1000;
++		break;
++	default:
++		link->speed = SWITCH_PORT_SPEED_UNKNOWN;
++		break;
++	}
++
++	return 0;
++}
++
++static int rtl8366s_sw_set_port_led(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++	u32 mask;
++	u32 reg;
++
++	if (val->port_vlan >= RTL8366S_NUM_PORTS ||
++	    (1 << val->port_vlan) == RTL8366S_PORT_UNKNOWN)
++		return -EINVAL;
++
++	if (val->port_vlan == RTL8366S_PORT_NUM_CPU) {
++		reg = RTL8366S_LED_BLINKRATE_REG;
++		mask = 0xF << 4;
++		data = val->value.i << 4;
++	} else {
++		reg = RTL8366S_LED_CTRL_REG;
++		mask = 0xF << (val->port_vlan * 4),
++		data = val->value.i << (val->port_vlan * 4);
++	}
++
++	return rtl8366_smi_rmwr(smi, reg, mask, data);
++}
++
++static int rtl8366s_sw_get_port_led(struct switch_dev *dev,
++				    const struct switch_attr *attr,
++				    struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data = 0;
++
++	if (val->port_vlan >= RTL8366S_NUM_LEDGROUPS)
++		return -EINVAL;
++
++	rtl8366_smi_read_reg(smi, RTL8366S_LED_CTRL_REG, &data);
++	val->value.i = (data >> (val->port_vlan * 4)) & 0x000F;
++
++	return 0;
++}
++
++static int rtl8366s_sw_get_green_port(struct switch_dev *dev,
++				      const struct switch_attr *attr,
++				      struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	int err;
++	u32 phyData;
++
++	if (val->port_vlan >= RTL8366S_NUM_PORTS)
++		return -EINVAL;
++
++	err = rtl8366s_read_phy_reg(smi, val->port_vlan, 0, RTL8366S_PHY_POWER_SAVING_CTRL_REG, &phyData);
++	if (err)
++		return err;
++
++	val->value.i = ((phyData & RTL8366S_PHY_POWER_SAVING_MASK) != 0) ? 1 : 0;
++
++	return 0;
++}
++
++static int rtl8366s_sw_set_green_port(struct switch_dev *dev,
++				      const struct switch_attr *attr,
++				      struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	return rtl8366s_set_green_port(smi, val->port_vlan, val->value.i);
++}
++
++static int rtl8366s_sw_reset_port_mibs(struct switch_dev *dev,
++				       const struct switch_attr *attr,
++				       struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++
++	if (val->port_vlan >= RTL8366S_NUM_PORTS)
++		return -EINVAL;
++
++
++	return rtl8366_smi_rmwr(smi, RTL8366S_MIB_CTRL_REG,
++				0, (1 << (val->port_vlan + 3)));
++}
++
++static int rtl8366s_sw_get_port_stats(struct switch_dev *dev, int port,
++                                        struct switch_port_stats *stats)
++{
++	return (rtl8366_sw_get_port_stats(dev, port, stats,
++				RTL8366S_MIB_TXB_ID, RTL8366S_MIB_RXB_ID));
++}
++
++static struct switch_attr rtl8366s_globals[] = {
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_learning",
++		.description = "Enable learning, enable aging",
++		.set = rtl8366s_sw_set_learning_enable,
++		.get = rtl8366s_sw_get_learning_enable,
++		.max = 1,
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_vlan",
++		.description = "Enable VLAN mode",
++		.set = rtl8366_sw_set_vlan_enable,
++		.get = rtl8366_sw_get_vlan_enable,
++		.max = 1,
++		.ofs = 1
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_vlan4k",
++		.description = "Enable VLAN 4K mode",
++		.set = rtl8366_sw_set_vlan_enable,
++		.get = rtl8366_sw_get_vlan_enable,
++		.max = 1,
++		.ofs = 2
++	}, {
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "reset_mibs",
++		.description = "Reset all MIB counters",
++		.set = rtl8366s_sw_reset_mibs,
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "blinkrate",
++		.description = "Get/Set LED blinking rate (0 = 43ms, 1 = 84ms,"
++		" 2 = 120ms, 3 = 170ms, 4 = 340ms, 5 = 670ms)",
++		.set = rtl8366s_sw_set_blinkrate,
++		.get = rtl8366s_sw_get_blinkrate,
++		.max = 5
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "max_length",
++		.description = "Get/Set the maximum length of valid packets"
++		" (0 = 1522, 1 = 1536, 2 = 1552, 3 = 16000 (9216?))",
++		.set = rtl8366s_sw_set_max_length,
++		.get = rtl8366s_sw_get_max_length,
++		.max = 3,
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "green_mode",
++		.description = "Get/Set the router green feature",
++		.set = rtl8366s_sw_set_green,
++		.get = rtl8366s_sw_get_green,
++		.max = 1,
++	},
++};
++
++static struct switch_attr rtl8366s_port[] = {
++	{
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "reset_mib",
++		.description = "Reset single port MIB counters",
++		.set = rtl8366s_sw_reset_port_mibs,
++	}, {
++		.type = SWITCH_TYPE_STRING,
++		.name = "mib",
++		.description = "Get MIB counters for port",
++		.max = 33,
++		.set = NULL,
++		.get = rtl8366_sw_get_port_mib,
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "led",
++		.description = "Get/Set port group (0 - 3) led mode (0 - 15)",
++		.max = 15,
++		.set = rtl8366s_sw_set_port_led,
++		.get = rtl8366s_sw_get_port_led,
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "green_port",
++		.description = "Get/Set port green feature (0 - 1)",
++		.max = 1,
++		.set = rtl8366s_sw_set_green_port,
++		.get = rtl8366s_sw_get_green_port,
++	},
++};
++
++static struct switch_attr rtl8366s_vlan[] = {
++	{
++		.type = SWITCH_TYPE_STRING,
++		.name = "info",
++		.description = "Get vlan information",
++		.max = 1,
++		.set = NULL,
++		.get = rtl8366_sw_get_vlan_info,
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "fid",
++		.description = "Get/Set vlan FID",
++		.max = RTL8366S_FIDMAX,
++		.set = rtl8366_sw_set_vlan_fid,
++		.get = rtl8366_sw_get_vlan_fid,
++	},
++};
++
++static const struct switch_dev_ops rtl8366_ops = {
++	.attr_global = {
++		.attr = rtl8366s_globals,
++		.n_attr = ARRAY_SIZE(rtl8366s_globals),
++	},
++	.attr_port = {
++		.attr = rtl8366s_port,
++		.n_attr = ARRAY_SIZE(rtl8366s_port),
++	},
++	.attr_vlan = {
++		.attr = rtl8366s_vlan,
++		.n_attr = ARRAY_SIZE(rtl8366s_vlan),
++	},
++
++	.get_vlan_ports = rtl8366_sw_get_vlan_ports,
++	.set_vlan_ports = rtl8366_sw_set_vlan_ports,
++	.get_port_pvid = rtl8366_sw_get_port_pvid,
++	.set_port_pvid = rtl8366_sw_set_port_pvid,
++	.reset_switch = rtl8366_sw_reset_switch,
++	.get_port_link = rtl8366s_sw_get_port_link,
++	.get_port_stats = rtl8366s_sw_get_port_stats,
++};
++
++static int rtl8366s_switch_init(struct rtl8366_smi *smi)
++{
++	struct switch_dev *dev = &smi->sw_dev;
++	int err;
++
++	dev->name = "RTL8366S";
++	dev->cpu_port = RTL8366S_PORT_NUM_CPU;
++	dev->ports = RTL8366S_NUM_PORTS;
++	dev->vlans = RTL8366S_NUM_VIDS;
++	dev->ops = &rtl8366_ops;
++	dev->alias = dev_name(smi->parent);
++
++	err = register_switch(dev, NULL);
++	if (err)
++		dev_err(smi->parent, "switch registration failed\n");
++
++	return err;
++}
++
++static void rtl8366s_switch_cleanup(struct rtl8366_smi *smi)
++{
++	unregister_switch(&smi->sw_dev);
++}
++
++static int rtl8366s_mii_read(struct mii_bus *bus, int addr, int reg)
++{
++	struct rtl8366_smi *smi = bus->priv;
++	u32 val = 0;
++	int err;
++
++	err = rtl8366s_read_phy_reg(smi, addr, 0, reg, &val);
++	if (err)
++		return 0xffff;
++
++	return val;
++}
++
++static int rtl8366s_mii_write(struct mii_bus *bus, int addr, int reg, u16 val)
++{
++	struct rtl8366_smi *smi = bus->priv;
++	u32 t;
++	int err;
++
++	err = rtl8366s_write_phy_reg(smi, addr, 0, reg, val);
++	/* flush write */
++	(void) rtl8366s_read_phy_reg(smi, addr, 0, reg, &t);
++
++	return err;
++}
++
++static int rtl8366s_detect(struct rtl8366_smi *smi)
++{
++	u32 chip_id = 0;
++	u32 chip_ver = 0;
++	int ret;
++
++	ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_ID_REG, &chip_id);
++	if (ret) {
++		dev_err(smi->parent, "unable to read chip id\n");
++		return ret;
++	}
++
++	switch (chip_id) {
++	case RTL8366S_CHIP_ID_8366:
++		break;
++	default:
++		dev_err(smi->parent, "unknown chip id (%04x)\n", chip_id);
++		return -ENODEV;
++	}
++
++	ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_VERSION_CTRL_REG,
++				   &chip_ver);
++	if (ret) {
++		dev_err(smi->parent, "unable to read chip version\n");
++		return ret;
++	}
++
++	dev_info(smi->parent, "RTL%04x ver. %u chip found\n",
++		 chip_id, chip_ver & RTL8366S_CHIP_VERSION_MASK);
++
++	return 0;
++}
++
++static struct rtl8366_smi_ops rtl8366s_smi_ops = {
++	.detect		= rtl8366s_detect,
++	.reset_chip	= rtl8366s_reset_chip,
++	.setup		= rtl8366s_setup,
++
++	.mii_read	= rtl8366s_mii_read,
++	.mii_write	= rtl8366s_mii_write,
++
++	.get_vlan_mc	= rtl8366s_get_vlan_mc,
++	.set_vlan_mc	= rtl8366s_set_vlan_mc,
++	.get_vlan_4k	= rtl8366s_get_vlan_4k,
++	.set_vlan_4k	= rtl8366s_set_vlan_4k,
++	.get_mc_index	= rtl8366s_get_mc_index,
++	.set_mc_index	= rtl8366s_set_mc_index,
++	.get_mib_counter = rtl8366_get_mib_counter,
++	.is_vlan_valid	= rtl8366s_is_vlan_valid,
++	.enable_vlan	= rtl8366s_enable_vlan,
++	.enable_vlan4k	= rtl8366s_enable_vlan4k,
++	.enable_port	= rtl8366s_enable_port,
++};
++
++static int rtl8366s_probe(struct platform_device *pdev)
++{
++	static int rtl8366_smi_version_printed;
++	struct rtl8366_smi *smi;
++	int err;
++
++	if (!rtl8366_smi_version_printed++)
++		printk(KERN_NOTICE RTL8366S_DRIVER_DESC
++		       " version " RTL8366S_DRIVER_VER"\n");
++
++	smi = rtl8366_smi_probe(pdev);
++	if (IS_ERR(smi))
++		return PTR_ERR(smi);
++
++	smi->clk_delay = 10;
++	smi->cmd_read = 0xa9;
++	smi->cmd_write = 0xa8;
++	smi->ops = &rtl8366s_smi_ops;
++	smi->cpu_port = RTL8366S_PORT_NUM_CPU;
++	smi->num_ports = RTL8366S_NUM_PORTS;
++	smi->num_vlan_mc = RTL8366S_NUM_VLANS;
++	smi->mib_counters = rtl8366s_mib_counters;
++	smi->num_mib_counters = ARRAY_SIZE(rtl8366s_mib_counters);
++
++	err = rtl8366_smi_init(smi);
++	if (err)
++		goto err_free_smi;
++
++	platform_set_drvdata(pdev, smi);
++
++	err = rtl8366s_switch_init(smi);
++	if (err)
++		goto err_clear_drvdata;
++
++	return 0;
++
++ err_clear_drvdata:
++	platform_set_drvdata(pdev, NULL);
++	rtl8366_smi_cleanup(smi);
++ err_free_smi:
++	kfree(smi);
++	return err;
++}
++
++static int rtl8366s_remove(struct platform_device *pdev)
++{
++	struct rtl8366_smi *smi = platform_get_drvdata(pdev);
++
++	if (smi) {
++		rtl8366s_switch_cleanup(smi);
++		platform_set_drvdata(pdev, NULL);
++		rtl8366_smi_cleanup(smi);
++		kfree(smi);
++	}
++
++	return 0;
++}
++
++#ifdef CONFIG_OF
++static const struct of_device_id rtl8366s_match[] = {
++	{ .compatible = "realtek,rtl8366s" },
++	{},
++};
++MODULE_DEVICE_TABLE(of, rtl8366s_match);
++#endif
++
++static struct platform_driver rtl8366s_driver = {
++	.driver = {
++		.name		= RTL8366S_DRIVER_NAME,
++		.owner		= THIS_MODULE,
++#ifdef CONFIG_OF
++		.of_match_table = of_match_ptr(rtl8366s_match),
++#endif
++	},
++	.probe		= rtl8366s_probe,
++	.remove		= rtl8366s_remove,
++};
++
++static int __init rtl8366s_module_init(void)
++{
++	return platform_driver_register(&rtl8366s_driver);
++}
++module_init(rtl8366s_module_init);
++
++static void __exit rtl8366s_module_exit(void)
++{
++	platform_driver_unregister(&rtl8366s_driver);
++}
++module_exit(rtl8366s_module_exit);
++
++MODULE_DESCRIPTION(RTL8366S_DRIVER_DESC);
++MODULE_VERSION(RTL8366S_DRIVER_VER);
++MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
++MODULE_AUTHOR("Antti Seppälä <a.seppala@gmail.com>");
++MODULE_LICENSE("GPL v2");
++MODULE_ALIAS("platform:" RTL8366S_DRIVER_NAME);
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/rtl8367.c b/target/linux/generic/files-5.4/drivers/net/phy/rtl8367.c
+new file mode 100644
+index 0000000000..7f0569d038
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/rtl8367.c
+@@ -0,0 +1,1846 @@
++/*
++ * Platform driver for the Realtek RTL8367R/M ethernet switches
++ *
++ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/device.h>
++#include <linux/of.h>
++#include <linux/of_platform.h>
++#include <linux/delay.h>
++#include <linux/skbuff.h>
++#include <linux/rtl8367.h>
++
++#include "rtl8366_smi.h"
++
++#define RTL8367_RESET_DELAY	1000	/* msecs*/
++
++#define RTL8367_PHY_ADDR_MAX	8
++#define RTL8367_PHY_REG_MAX	31
++
++#define RTL8367_VID_MASK	0xffff
++#define RTL8367_FID_MASK	0xfff
++#define RTL8367_UNTAG_MASK	0xffff
++#define RTL8367_MEMBER_MASK	0xffff
++
++#define RTL8367_PORT_CFG_REG(_p)		(0x000e + 0x20 * (_p))
++#define   RTL8367_PORT_CFG_EGRESS_MODE_SHIFT	4
++#define   RTL8367_PORT_CFG_EGRESS_MODE_MASK	0x3
++#define   RTL8367_PORT_CFG_EGRESS_MODE_ORIGINAL	0
++#define   RTL8367_PORT_CFG_EGRESS_MODE_KEEP	1
++#define   RTL8367_PORT_CFG_EGRESS_MODE_PRI	2
++#define   RTL8367_PORT_CFG_EGRESS_MODE_REAL	3
++
++#define RTL8367_BYPASS_LINE_RATE_REG		0x03f7
++
++#define RTL8367_TA_CTRL_REG			0x0500
++#define   RTL8367_TA_CTRL_STATUS		BIT(12)
++#define   RTL8367_TA_CTRL_METHOD		BIT(5)
++#define   RTL8367_TA_CTRL_CMD_SHIFT		4
++#define   RTL8367_TA_CTRL_CMD_READ		0
++#define   RTL8367_TA_CTRL_CMD_WRITE		1
++#define   RTL8367_TA_CTRL_TABLE_SHIFT		0
++#define   RTL8367_TA_CTRL_TABLE_ACLRULE		1
++#define   RTL8367_TA_CTRL_TABLE_ACLACT		2
++#define   RTL8367_TA_CTRL_TABLE_CVLAN		3
++#define   RTL8367_TA_CTRL_TABLE_L2		4
++#define   RTL8367_TA_CTRL_CVLAN_READ \
++		((RTL8367_TA_CTRL_CMD_READ << RTL8367_TA_CTRL_CMD_SHIFT) | \
++		 RTL8367_TA_CTRL_TABLE_CVLAN)
++#define   RTL8367_TA_CTRL_CVLAN_WRITE \
++		((RTL8367_TA_CTRL_CMD_WRITE << RTL8367_TA_CTRL_CMD_SHIFT) | \
++		 RTL8367_TA_CTRL_TABLE_CVLAN)
++
++#define RTL8367_TA_ADDR_REG			0x0501
++#define   RTL8367_TA_ADDR_MASK			0x3fff
++
++#define RTL8367_TA_DATA_REG(_x)			(0x0503 + (_x))
++#define   RTL8367_TA_VLAN_DATA_SIZE		4
++#define   RTL8367_TA_VLAN_VID_MASK		RTL8367_VID_MASK
++#define   RTL8367_TA_VLAN_MEMBER_SHIFT		0
++#define   RTL8367_TA_VLAN_MEMBER_MASK		RTL8367_MEMBER_MASK
++#define   RTL8367_TA_VLAN_FID_SHIFT		0
++#define   RTL8367_TA_VLAN_FID_MASK		RTL8367_FID_MASK
++#define   RTL8367_TA_VLAN_UNTAG1_SHIFT		14
++#define   RTL8367_TA_VLAN_UNTAG1_MASK		0x3
++#define   RTL8367_TA_VLAN_UNTAG2_SHIFT		0
++#define   RTL8367_TA_VLAN_UNTAG2_MASK		0x3fff
++
++#define RTL8367_VLAN_PVID_CTRL_REG(_p)		(0x0700 + (_p) / 2)
++#define RTL8367_VLAN_PVID_CTRL_MASK		0x1f
++#define RTL8367_VLAN_PVID_CTRL_SHIFT(_p)	(8 * ((_p) % 2))
++
++#define RTL8367_VLAN_MC_BASE(_x)		(0x0728 + (_x) * 4)
++#define   RTL8367_VLAN_MC_DATA_SIZE		4
++#define   RTL8367_VLAN_MC_MEMBER_SHIFT		0
++#define   RTL8367_VLAN_MC_MEMBER_MASK		RTL8367_MEMBER_MASK
++#define   RTL8367_VLAN_MC_FID_SHIFT		0
++#define   RTL8367_VLAN_MC_FID_MASK		RTL8367_FID_MASK
++#define   RTL8367_VLAN_MC_EVID_SHIFT		0
++#define   RTL8367_VLAN_MC_EVID_MASK		RTL8367_VID_MASK
++
++#define RTL8367_VLAN_CTRL_REG			0x07a8
++#define   RTL8367_VLAN_CTRL_ENABLE		BIT(0)
++
++#define RTL8367_VLAN_INGRESS_REG		0x07a9
++
++#define RTL8367_PORT_ISOLATION_REG(_p)		(0x08a2 + (_p))
++
++#define RTL8367_MIB_COUNTER_REG(_x)		(0x1000 + (_x))
++
++#define RTL8367_MIB_ADDRESS_REG			0x1004
++
++#define RTL8367_MIB_CTRL_REG(_x)		(0x1005 + (_x))
++#define   RTL8367_MIB_CTRL_GLOBAL_RESET_MASK	BIT(11)
++#define   RTL8367_MIB_CTRL_QM_RESET_MASK	BIT(10)
++#define   RTL8367_MIB_CTRL_PORT_RESET_MASK(_p)	BIT(2 + (_p))
++#define   RTL8367_MIB_CTRL_RESET_MASK		BIT(1)
++#define   RTL8367_MIB_CTRL_BUSY_MASK		BIT(0)
++
++#define RTL8367_MIB_COUNT			36
++#define RTL8367_MIB_COUNTER_PORT_OFFSET		0x0050
++
++#define RTL8367_SWC0_REG			0x1200
++#define   RTL8367_SWC0_MAX_LENGTH_SHIFT		13
++#define   RTL8367_SWC0_MAX_LENGTH(_x)		((_x) << 13)
++#define   RTL8367_SWC0_MAX_LENGTH_MASK		RTL8367_SWC0_MAX_LENGTH(0x3)
++#define   RTL8367_SWC0_MAX_LENGTH_1522		RTL8367_SWC0_MAX_LENGTH(0)
++#define   RTL8367_SWC0_MAX_LENGTH_1536		RTL8367_SWC0_MAX_LENGTH(1)
++#define   RTL8367_SWC0_MAX_LENGTH_1552		RTL8367_SWC0_MAX_LENGTH(2)
++#define   RTL8367_SWC0_MAX_LENGTH_16000		RTL8367_SWC0_MAX_LENGTH(3)
++
++#define RTL8367_CHIP_NUMBER_REG			0x1300
++
++#define RTL8367_CHIP_VER_REG			0x1301
++#define   RTL8367_CHIP_VER_RLVID_SHIFT		12
++#define   RTL8367_CHIP_VER_RLVID_MASK		0xf
++#define   RTL8367_CHIP_VER_MCID_SHIFT		8
++#define   RTL8367_CHIP_VER_MCID_MASK		0xf
++#define   RTL8367_CHIP_VER_BOID_SHIFT		4
++#define   RTL8367_CHIP_VER_BOID_MASK		0xf
++
++#define RTL8367_CHIP_MODE_REG			0x1302
++#define   RTL8367_CHIP_MODE_MASK		0x7
++
++#define RTL8367_CHIP_DEBUG0_REG			0x1303
++#define   RTL8367_CHIP_DEBUG0_DUMMY0(_x)	BIT(8 + (_x))
++
++#define RTL8367_CHIP_DEBUG1_REG			0x1304
++
++#define RTL8367_DIS_REG				0x1305
++#define   RTL8367_DIS_SKIP_MII_RXER(_x)		BIT(12 + (_x))
++#define   RTL8367_DIS_RGMII_SHIFT(_x)		(4 * (_x))
++#define   RTL8367_DIS_RGMII_MASK		0x7
++
++#define RTL8367_EXT_RGMXF_REG(_x)		(0x1306 + (_x))
++#define   RTL8367_EXT_RGMXF_DUMMY0_SHIFT	5
++#define   RTL8367_EXT_RGMXF_DUMMY0_MASK	0x7ff
++#define   RTL8367_EXT_RGMXF_TXDELAY_SHIFT	3
++#define   RTL8367_EXT_RGMXF_TXDELAY_MASK	1
++#define   RTL8367_EXT_RGMXF_RXDELAY_MASK	0x7
++
++#define RTL8367_DI_FORCE_REG(_x)		(0x1310 + (_x))
++#define   RTL8367_DI_FORCE_MODE			BIT(12)
++#define   RTL8367_DI_FORCE_NWAY			BIT(7)
++#define   RTL8367_DI_FORCE_TXPAUSE		BIT(6)
++#define   RTL8367_DI_FORCE_RXPAUSE		BIT(5)
++#define   RTL8367_DI_FORCE_LINK			BIT(4)
++#define   RTL8367_DI_FORCE_DUPLEX		BIT(2)
++#define   RTL8367_DI_FORCE_SPEED_MASK		3
++#define   RTL8367_DI_FORCE_SPEED_10		0
++#define   RTL8367_DI_FORCE_SPEED_100		1
++#define   RTL8367_DI_FORCE_SPEED_1000		2
++
++#define RTL8367_MAC_FORCE_REG(_x)		(0x1312 + (_x))
++
++#define RTL8367_CHIP_RESET_REG			0x1322
++#define   RTL8367_CHIP_RESET_SW			BIT(1)
++#define   RTL8367_CHIP_RESET_HW			BIT(0)
++
++#define RTL8367_PORT_STATUS_REG(_p)		(0x1352 + (_p))
++#define   RTL8367_PORT_STATUS_NWAY		BIT(7)
++#define   RTL8367_PORT_STATUS_TXPAUSE		BIT(6)
++#define   RTL8367_PORT_STATUS_RXPAUSE		BIT(5)
++#define   RTL8367_PORT_STATUS_LINK		BIT(4)
++#define   RTL8367_PORT_STATUS_DUPLEX		BIT(2)
++#define   RTL8367_PORT_STATUS_SPEED_MASK	0x0003
++#define   RTL8367_PORT_STATUS_SPEED_10		0
++#define   RTL8367_PORT_STATUS_SPEED_100		1
++#define   RTL8367_PORT_STATUS_SPEED_1000	2
++
++#define RTL8367_RTL_NO_REG			0x13c0
++#define   RTL8367_RTL_NO_8367R			0x3670
++#define   RTL8367_RTL_NO_8367M			0x3671
++
++#define RTL8367_RTL_VER_REG			0x13c1
++#define   RTL8367_RTL_VER_MASK			0xf
++
++#define RTL8367_RTL_MAGIC_ID_REG		0x13c2
++#define   RTL8367_RTL_MAGIC_ID_VAL		0x0249
++
++#define RTL8367_LED_SYS_CONFIG_REG		0x1b00
++#define RTL8367_LED_MODE_REG			0x1b02
++#define   RTL8367_LED_MODE_RATE_M		0x7
++#define   RTL8367_LED_MODE_RATE_S		1
++
++#define RTL8367_LED_CONFIG_REG			0x1b03
++#define   RTL8367_LED_CONFIG_DATA_S		12
++#define   RTL8367_LED_CONFIG_DATA_M		0x3
++#define   RTL8367_LED_CONFIG_SEL		BIT(14)
++#define   RTL8367_LED_CONFIG_LED_CFG_M		0xf
++
++#define RTL8367_PARA_LED_IO_EN1_REG		0x1b24
++#define RTL8367_PARA_LED_IO_EN2_REG		0x1b25
++#define   RTL8367_PARA_LED_IO_EN_PMASK		0xff
++
++#define RTL8367_IA_CTRL_REG			0x1f00
++#define   RTL8367_IA_CTRL_RW(_x)		((_x) << 1)
++#define   RTL8367_IA_CTRL_RW_READ		RTL8367_IA_CTRL_RW(0)
++#define   RTL8367_IA_CTRL_RW_WRITE		RTL8367_IA_CTRL_RW(1)
++#define   RTL8367_IA_CTRL_CMD_MASK		BIT(0)
++
++#define RTL8367_IA_STATUS_REG			0x1f01
++#define   RTL8367_IA_STATUS_PHY_BUSY		BIT(2)
++#define   RTL8367_IA_STATUS_SDS_BUSY		BIT(1)
++#define   RTL8367_IA_STATUS_MDX_BUSY		BIT(0)
++
++#define RTL8367_IA_ADDRESS_REG			0x1f02
++
++#define RTL8367_IA_WRITE_DATA_REG		0x1f03
++#define RTL8367_IA_READ_DATA_REG		0x1f04
++
++#define RTL8367_INTERNAL_PHY_REG(_a, _r)	(0x2000 + 32 * (_a) + (_r))
++
++#define RTL8367_CPU_PORT_NUM		9
++#define RTL8367_NUM_PORTS		10
++#define RTL8367_NUM_VLANS		32
++#define RTL8367_NUM_LEDGROUPS		4
++#define RTL8367_NUM_VIDS		4096
++#define RTL8367_PRIORITYMAX		7
++#define RTL8367_FIDMAX			7
++
++#define RTL8367_PORT_0			BIT(0)
++#define RTL8367_PORT_1			BIT(1)
++#define RTL8367_PORT_2			BIT(2)
++#define RTL8367_PORT_3			BIT(3)
++#define RTL8367_PORT_4			BIT(4)
++#define RTL8367_PORT_5			BIT(5)
++#define RTL8367_PORT_6			BIT(6)
++#define RTL8367_PORT_7			BIT(7)
++#define RTL8367_PORT_E1			BIT(8)	/* external port 1 */
++#define RTL8367_PORT_E0			BIT(9)	/* external port 0 */
++
++#define RTL8367_PORTS_ALL					\
++	(RTL8367_PORT_0 | RTL8367_PORT_1 | RTL8367_PORT_2 |	\
++	 RTL8367_PORT_3 | RTL8367_PORT_4 | RTL8367_PORT_5 |	\
++	 RTL8367_PORT_6 | RTL8367_PORT_7 | RTL8367_PORT_E1 |	\
++	 RTL8367_PORT_E0)
++
++#define RTL8367_PORTS_ALL_BUT_CPU				\
++	(RTL8367_PORT_0 | RTL8367_PORT_1 | RTL8367_PORT_2 |	\
++	 RTL8367_PORT_3 | RTL8367_PORT_4 | RTL8367_PORT_5 |	\
++	 RTL8367_PORT_6 | RTL8367_PORT_7 | RTL8367_PORT_E1)
++
++struct rtl8367_initval {
++	u16 reg;
++	u16 val;
++};
++
++#define RTL8367_MIB_RXB_ID		0	/* IfInOctets */
++#define RTL8367_MIB_TXB_ID		20	/* IfOutOctets */
++
++static struct rtl8366_mib_counter rtl8367_mib_counters[] = {
++	{ 0,  0, 4, "IfInOctets"				},
++	{ 0,  4, 2, "Dot3StatsFCSErrors"			},
++	{ 0,  6, 2, "Dot3StatsSymbolErrors"			},
++	{ 0,  8, 2, "Dot3InPauseFrames"				},
++	{ 0, 10, 2, "Dot3ControlInUnknownOpcodes"		},
++	{ 0, 12, 2, "EtherStatsFragments"			},
++	{ 0, 14, 2, "EtherStatsJabbers"				},
++	{ 0, 16, 2, "IfInUcastPkts"				},
++	{ 0, 18, 2, "EtherStatsDropEvents"			},
++	{ 0, 20, 4, "EtherStatsOctets"				},
++
++	{ 0, 24, 2, "EtherStatsUnderSizePkts"			},
++	{ 0, 26, 2, "EtherOversizeStats"			},
++	{ 0, 28, 2, "EtherStatsPkts64Octets"			},
++	{ 0, 30, 2, "EtherStatsPkts65to127Octets"		},
++	{ 0, 32, 2, "EtherStatsPkts128to255Octets"		},
++	{ 0, 34, 2, "EtherStatsPkts256to511Octets"		},
++	{ 0, 36, 2, "EtherStatsPkts512to1023Octets"		},
++	{ 0, 38, 2, "EtherStatsPkts1024to1518Octets"		},
++	{ 0, 40, 2, "EtherStatsMulticastPkts"			},
++	{ 0, 42, 2, "EtherStatsBroadcastPkts"			},
++
++	{ 0, 44, 4, "IfOutOctets"				},
++
++	{ 0, 48, 2, "Dot3StatsSingleCollisionFrames"		},
++	{ 0, 50, 2, "Dot3StatMultipleCollisionFrames"		},
++	{ 0, 52, 2, "Dot3sDeferredTransmissions"		},
++	{ 0, 54, 2, "Dot3StatsLateCollisions"			},
++	{ 0, 56, 2, "EtherStatsCollisions"			},
++	{ 0, 58, 2, "Dot3StatsExcessiveCollisions"		},
++	{ 0, 60, 2, "Dot3OutPauseFrames"			},
++	{ 0, 62, 2, "Dot1dBasePortDelayExceededDiscards"	},
++	{ 0, 64, 2, "Dot1dTpPortInDiscards"			},
++	{ 0, 66, 2, "IfOutUcastPkts"				},
++	{ 0, 68, 2, "IfOutMulticastPkts"			},
++	{ 0, 70, 2, "IfOutBroadcastPkts"			},
++	{ 0, 72, 2, "OutOampduPkts"				},
++	{ 0, 74, 2, "InOampduPkts"				},
++	{ 0, 76, 2, "PktgenPkts"				},
++};
++
++#define REG_RD(_smi, _reg, _val)					\
++	do {								\
++		err = rtl8366_smi_read_reg(_smi, _reg, _val);		\
++		if (err)						\
++			return err;					\
++	} while (0)
++
++#define REG_WR(_smi, _reg, _val)					\
++	do {								\
++		err = rtl8366_smi_write_reg(_smi, _reg, _val);		\
++		if (err)						\
++			return err;					\
++	} while (0)
++
++#define REG_RMW(_smi, _reg, _mask, _val)				\
++	do {								\
++		err = rtl8366_smi_rmwr(_smi, _reg, _mask, _val);	\
++		if (err)						\
++			return err;					\
++	} while (0)
++
++static const struct rtl8367_initval rtl8367_initvals_0_0[] = {
++	{0x133f, 0x0030}, {0x133e, 0x000e}, {0x221f, 0x0000}, {0x2215, 0x1006},
++	{0x221f, 0x0005}, {0x2200, 0x00c6}, {0x221f, 0x0007}, {0x221e, 0x0048},
++	{0x2215, 0x6412}, {0x2216, 0x6412}, {0x2217, 0x6412}, {0x2218, 0x6412},
++	{0x2219, 0x6412}, {0x221A, 0x6412}, {0x221f, 0x0001}, {0x220c, 0xdbf0},
++	{0x2209, 0x2576}, {0x2207, 0x287E}, {0x220A, 0x68E5}, {0x221D, 0x3DA4},
++	{0x221C, 0xE7F7}, {0x2214, 0x7F52}, {0x2218, 0x7FCE}, {0x2208, 0x04B7},
++	{0x2206, 0x4072}, {0x2210, 0xF05E}, {0x221B, 0xB414}, {0x221F, 0x0003},
++	{0x221A, 0x06A6}, {0x2210, 0xF05E}, {0x2213, 0x06EB}, {0x2212, 0xF4D2},
++	{0x220E, 0xE120}, {0x2200, 0x7C00}, {0x2202, 0x5FD0}, {0x220D, 0x0207},
++	{0x221f, 0x0002}, {0x2205, 0x0978}, {0x2202, 0x8C01}, {0x2207, 0x3620},
++	{0x221C, 0x0001}, {0x2203, 0x0420}, {0x2204, 0x80C8}, {0x133e, 0x0ede},
++	{0x221f, 0x0002}, {0x220c, 0x0073}, {0x220d, 0xEB65}, {0x220e, 0x51d1},
++	{0x220f, 0x5dcb}, {0x2210, 0x3044}, {0x2211, 0x1800}, {0x2212, 0x7E00},
++	{0x2213, 0x0000}, {0x133f, 0x0010}, {0x133e, 0x0ffe}, {0x207f, 0x0002},
++	{0x2074, 0x3D22}, {0x2075, 0x2000}, {0x2076, 0x6040}, {0x2077, 0x0000},
++	{0x2078, 0x0f0a}, {0x2079, 0x50AB}, {0x207a, 0x0000}, {0x207b, 0x0f0f},
++	{0x205f, 0x0002}, {0x2054, 0xFF00}, {0x2055, 0x000A}, {0x2056, 0x000A},
++	{0x2057, 0x0005}, {0x2058, 0x0005}, {0x2059, 0x0000}, {0x205A, 0x0005},
++	{0x205B, 0x0005}, {0x205C, 0x0005}, {0x209f, 0x0002}, {0x2094, 0x00AA},
++	{0x2095, 0x00AA}, {0x2096, 0x00AA}, {0x2097, 0x00AA}, {0x2098, 0x0055},
++	{0x2099, 0x00AA}, {0x209A, 0x00AA}, {0x209B, 0x00AA}, {0x1363, 0x8354},
++	{0x1270, 0x3333}, {0x1271, 0x3333}, {0x1272, 0x3333}, {0x1330, 0x00DB},
++	{0x1203, 0xff00}, {0x1200, 0x7fc4}, {0x121d, 0x1006}, {0x121e, 0x03e8},
++	{0x121f, 0x02b3}, {0x1220, 0x028f}, {0x1221, 0x029b}, {0x1222, 0x0277},
++	{0x1223, 0x02b3}, {0x1224, 0x028f}, {0x1225, 0x029b}, {0x1226, 0x0277},
++	{0x1227, 0x00c0}, {0x1228, 0x00b4}, {0x122f, 0x00c0}, {0x1230, 0x00b4},
++	{0x1229, 0x0020}, {0x122a, 0x000c}, {0x1231, 0x0030}, {0x1232, 0x0024},
++	{0x0219, 0x0032}, {0x0200, 0x03e8}, {0x0201, 0x03e8}, {0x0202, 0x03e8},
++	{0x0203, 0x03e8}, {0x0204, 0x03e8}, {0x0205, 0x03e8}, {0x0206, 0x03e8},
++	{0x0207, 0x03e8}, {0x0218, 0x0032}, {0x0208, 0x029b}, {0x0209, 0x029b},
++	{0x020a, 0x029b}, {0x020b, 0x029b}, {0x020c, 0x029b}, {0x020d, 0x029b},
++	{0x020e, 0x029b}, {0x020f, 0x029b}, {0x0210, 0x029b}, {0x0211, 0x029b},
++	{0x0212, 0x029b}, {0x0213, 0x029b}, {0x0214, 0x029b}, {0x0215, 0x029b},
++	{0x0216, 0x029b}, {0x0217, 0x029b}, {0x0900, 0x0000}, {0x0901, 0x0000},
++	{0x0902, 0x0000}, {0x0903, 0x0000}, {0x0865, 0x3210}, {0x087b, 0x0000},
++	{0x087c, 0xff00}, {0x087d, 0x0000}, {0x087e, 0x0000}, {0x0801, 0x0100},
++	{0x0802, 0x0100}, {0x1700, 0x014C}, {0x0301, 0x00FF}, {0x12AA, 0x0096},
++	{0x133f, 0x0030}, {0x133e, 0x000e}, {0x221f, 0x0005}, {0x2200, 0x00C4},
++	{0x221f, 0x0000}, {0x2210, 0x05EF}, {0x2204, 0x05E1}, {0x2200, 0x1340},
++	{0x133f, 0x0010}, {0x20A0, 0x1940}, {0x20C0, 0x1940}, {0x20E0, 0x1940},
++};
++
++static const struct rtl8367_initval rtl8367_initvals_0_1[] = {
++	{0x133f, 0x0030}, {0x133e, 0x000e}, {0x221f, 0x0000}, {0x2215, 0x1006},
++	{0x221f, 0x0005}, {0x2200, 0x00c6}, {0x221f, 0x0007}, {0x221e, 0x0048},
++	{0x2215, 0x6412}, {0x2216, 0x6412}, {0x2217, 0x6412}, {0x2218, 0x6412},
++	{0x2219, 0x6412}, {0x221A, 0x6412}, {0x221f, 0x0001}, {0x220c, 0xdbf0},
++	{0x2209, 0x2576}, {0x2207, 0x287E}, {0x220A, 0x68E5}, {0x221D, 0x3DA4},
++	{0x221C, 0xE7F7}, {0x2214, 0x7F52}, {0x2218, 0x7FCE}, {0x2208, 0x04B7},
++	{0x2206, 0x4072}, {0x2210, 0xF05E}, {0x221B, 0xB414}, {0x221F, 0x0003},
++	{0x221A, 0x06A6}, {0x2210, 0xF05E}, {0x2213, 0x06EB}, {0x2212, 0xF4D2},
++	{0x220E, 0xE120}, {0x2200, 0x7C00}, {0x2202, 0x5FD0}, {0x220D, 0x0207},
++	{0x221f, 0x0002}, {0x2205, 0x0978}, {0x2202, 0x8C01}, {0x2207, 0x3620},
++	{0x221C, 0x0001}, {0x2203, 0x0420}, {0x2204, 0x80C8}, {0x133e, 0x0ede},
++	{0x221f, 0x0002}, {0x220c, 0x0073}, {0x220d, 0xEB65}, {0x220e, 0x51d1},
++	{0x220f, 0x5dcb}, {0x2210, 0x3044}, {0x2211, 0x1800}, {0x2212, 0x7E00},
++	{0x2213, 0x0000}, {0x133f, 0x0010}, {0x133e, 0x0ffe}, {0x207f, 0x0002},
++	{0x2074, 0x3D22}, {0x2075, 0x2000}, {0x2076, 0x6040}, {0x2077, 0x0000},
++	{0x2078, 0x0f0a}, {0x2079, 0x50AB}, {0x207a, 0x0000}, {0x207b, 0x0f0f},
++	{0x205f, 0x0002}, {0x2054, 0xFF00}, {0x2055, 0x000A}, {0x2056, 0x000A},
++	{0x2057, 0x0005}, {0x2058, 0x0005}, {0x2059, 0x0000}, {0x205A, 0x0005},
++	{0x205B, 0x0005}, {0x205C, 0x0005}, {0x209f, 0x0002}, {0x2094, 0x00AA},
++	{0x2095, 0x00AA}, {0x2096, 0x00AA}, {0x2097, 0x00AA}, {0x2098, 0x0055},
++	{0x2099, 0x00AA}, {0x209A, 0x00AA}, {0x209B, 0x00AA}, {0x1363, 0x8354},
++	{0x1270, 0x3333}, {0x1271, 0x3333}, {0x1272, 0x3333}, {0x1330, 0x00DB},
++	{0x1203, 0xff00}, {0x1200, 0x7fc4}, {0x121d, 0x1b06}, {0x121e, 0x07f0},
++	{0x121f, 0x0438}, {0x1220, 0x040f}, {0x1221, 0x040f}, {0x1222, 0x03eb},
++	{0x1223, 0x0438}, {0x1224, 0x040f}, {0x1225, 0x040f}, {0x1226, 0x03eb},
++	{0x1227, 0x0144}, {0x1228, 0x0138}, {0x122f, 0x0144}, {0x1230, 0x0138},
++	{0x1229, 0x0020}, {0x122a, 0x000c}, {0x1231, 0x0030}, {0x1232, 0x0024},
++	{0x0219, 0x0032}, {0x0200, 0x07d0}, {0x0201, 0x07d0}, {0x0202, 0x07d0},
++	{0x0203, 0x07d0}, {0x0204, 0x07d0}, {0x0205, 0x07d0}, {0x0206, 0x07d0},
++	{0x0207, 0x07d0}, {0x0218, 0x0032}, {0x0208, 0x0190}, {0x0209, 0x0190},
++	{0x020a, 0x0190}, {0x020b, 0x0190}, {0x020c, 0x0190}, {0x020d, 0x0190},
++	{0x020e, 0x0190}, {0x020f, 0x0190}, {0x0210, 0x0190}, {0x0211, 0x0190},
++	{0x0212, 0x0190}, {0x0213, 0x0190}, {0x0214, 0x0190}, {0x0215, 0x0190},
++	{0x0216, 0x0190}, {0x0217, 0x0190}, {0x0900, 0x0000}, {0x0901, 0x0000},
++	{0x0902, 0x0000}, {0x0903, 0x0000}, {0x0865, 0x3210}, {0x087b, 0x0000},
++	{0x087c, 0xff00}, {0x087d, 0x0000}, {0x087e, 0x0000}, {0x0801, 0x0100},
++	{0x0802, 0x0100}, {0x1700, 0x0125}, {0x0301, 0x00FF}, {0x12AA, 0x0096},
++	{0x133f, 0x0030}, {0x133e, 0x000e}, {0x221f, 0x0005}, {0x2200, 0x00C4},
++	{0x221f, 0x0000}, {0x2210, 0x05EF}, {0x2204, 0x05E1}, {0x2200, 0x1340},
++	{0x133f, 0x0010},
++};
++
++static const struct rtl8367_initval rtl8367_initvals_1_0[] = {
++	{0x1B24, 0x0000}, {0x1B25, 0x0000}, {0x1B26, 0x0000}, {0x1B27, 0x0000},
++	{0x207F, 0x0002}, {0x2079, 0x0200}, {0x207F, 0x0000}, {0x133F, 0x0030},
++	{0x133E, 0x000E}, {0x221F, 0x0005}, {0x2201, 0x0700}, {0x2205, 0x8B82},
++	{0x2206, 0x05CB}, {0x221F, 0x0002}, {0x2204, 0x80C2}, {0x2205, 0x0938},
++	{0x221F, 0x0003}, {0x2212, 0xC4D2}, {0x220D, 0x0207}, {0x221F, 0x0001},
++	{0x2207, 0x267E}, {0x221C, 0xE5F7}, {0x221B, 0x0424}, {0x221F, 0x0007},
++	{0x221E, 0x0040}, {0x2218, 0x0000}, {0x221F, 0x0007}, {0x221E, 0x002C},
++	{0x2218, 0x008B}, {0x221F, 0x0005}, {0x2205, 0xFFF6}, {0x2206, 0x0080},
++	{0x2205, 0x8000}, {0x2206, 0xF8E0}, {0x2206, 0xE000}, {0x2206, 0xE1E0},
++	{0x2206, 0x01AC}, {0x2206, 0x2408}, {0x2206, 0xE08B}, {0x2206, 0x84F7},
++	{0x2206, 0x20E4}, {0x2206, 0x8B84}, {0x2206, 0xFC05}, {0x2206, 0xF8FA},
++	{0x2206, 0xEF69}, {0x2206, 0xE08B}, {0x2206, 0x86AC}, {0x2206, 0x201A},
++	{0x2206, 0xBF80}, {0x2206, 0x59D0}, {0x2206, 0x2402}, {0x2206, 0x803D},
++	{0x2206, 0xE0E0}, {0x2206, 0xE4E1}, {0x2206, 0xE0E5}, {0x2206, 0x5806},
++	{0x2206, 0x68C0}, {0x2206, 0xD1D2}, {0x2206, 0xE4E0}, {0x2206, 0xE4E5},
++	{0x2206, 0xE0E5}, {0x2206, 0xEF96}, {0x2206, 0xFEFC}, {0x2206, 0x05FB},
++	{0x2206, 0x0BFB}, {0x2206, 0x58FF}, {0x2206, 0x9E11}, {0x2206, 0x06F0},
++	{0x2206, 0x0C81}, {0x2206, 0x8AE0}, {0x2206, 0x0019}, {0x2206, 0x1B89},
++	{0x2206, 0xCFEB}, {0x2206, 0x19EB}, {0x2206, 0x19B0}, {0x2206, 0xEFFF},
++	{0x2206, 0x0BFF}, {0x2206, 0x0425}, {0x2206, 0x0807}, {0x2206, 0x2640},
++	{0x2206, 0x7227}, {0x2206, 0x267E}, {0x2206, 0x2804}, {0x2206, 0xB729},
++	{0x2206, 0x2576}, {0x2206, 0x2A68}, {0x2206, 0xE52B}, {0x2206, 0xAD00},
++	{0x2206, 0x2CDB}, {0x2206, 0xF02D}, {0x2206, 0x67BB}, {0x2206, 0x2E7B},
++	{0x2206, 0x0F2F}, {0x2206, 0x7365}, {0x2206, 0x31AC}, {0x2206, 0xCC32},
++	{0x2206, 0x2300}, {0x2206, 0x332D}, {0x2206, 0x1734}, {0x2206, 0x7F52},
++	{0x2206, 0x3510}, {0x2206, 0x0036}, {0x2206, 0x0600}, {0x2206, 0x370C},
++	{0x2206, 0xC038}, {0x2206, 0x7FCE}, {0x2206, 0x3CE5}, {0x2206, 0xF73D},
++	{0x2206, 0x3DA4}, {0x2206, 0x6530}, {0x2206, 0x3E67}, {0x2206, 0x0053},
++	{0x2206, 0x69D2}, {0x2206, 0x0F6A}, {0x2206, 0x012C}, {0x2206, 0x6C2B},
++	{0x2206, 0x136E}, {0x2206, 0xE100}, {0x2206, 0x6F12}, {0x2206, 0xF771},
++	{0x2206, 0x006B}, {0x2206, 0x7306}, {0x2206, 0xEB74}, {0x2206, 0x94C7},
++	{0x2206, 0x7698}, {0x2206, 0x0A77}, {0x2206, 0x5000}, {0x2206, 0x788A},
++	{0x2206, 0x1579}, {0x2206, 0x7F6F}, {0x2206, 0x7A06}, {0x2206, 0xA600},
++	{0x2205, 0x8B90}, {0x2206, 0x8000}, {0x2205, 0x8B92}, {0x2206, 0x8000},
++	{0x2205, 0x8B94}, {0x2206, 0x8014}, {0x2208, 0xFFFA}, {0x2202, 0x3C65},
++	{0x2205, 0xFFF6}, {0x2206, 0x00F7}, {0x221F, 0x0000}, {0x221F, 0x0007},
++	{0x221E, 0x0042}, {0x2218, 0x0000}, {0x221E, 0x002D}, {0x2218, 0xF010},
++	{0x221E, 0x0020}, {0x2215, 0x0000}, {0x221E, 0x0023}, {0x2216, 0x8000},
++	{0x221F, 0x0000}, {0x133F, 0x0010}, {0x133E, 0x0FFE}, {0x1362, 0x0115},
++	{0x1363, 0x0002}, {0x1363, 0x0000}, {0x1306, 0x000C}, {0x1307, 0x000C},
++	{0x1303, 0x0067}, {0x1304, 0x4444}, {0x1203, 0xFF00}, {0x1200, 0x7FC4},
++	{0x121D, 0x7D16}, {0x121E, 0x03E8}, {0x121F, 0x024E}, {0x1220, 0x0230},
++	{0x1221, 0x0244}, {0x1222, 0x0226}, {0x1223, 0x024E}, {0x1224, 0x0230},
++	{0x1225, 0x0244}, {0x1226, 0x0226}, {0x1227, 0x00C0}, {0x1228, 0x00B4},
++	{0x122F, 0x00C0}, {0x1230, 0x00B4}, {0x0208, 0x03E8}, {0x0209, 0x03E8},
++	{0x020A, 0x03E8}, {0x020B, 0x03E8}, {0x020C, 0x03E8}, {0x020D, 0x03E8},
++	{0x020E, 0x03E8}, {0x020F, 0x03E8}, {0x0210, 0x03E8}, {0x0211, 0x03E8},
++	{0x0212, 0x03E8}, {0x0213, 0x03E8}, {0x0214, 0x03E8}, {0x0215, 0x03E8},
++	{0x0216, 0x03E8}, {0x0217, 0x03E8}, {0x0900, 0x0000}, {0x0901, 0x0000},
++	{0x0902, 0x0000}, {0x0903, 0x0000}, {0x0865, 0x3210}, {0x087B, 0x0000},
++	{0x087C, 0xFF00}, {0x087D, 0x0000}, {0x087E, 0x0000}, {0x0801, 0x0100},
++	{0x0802, 0x0100}, {0x0A20, 0x2040}, {0x0A21, 0x2040}, {0x0A22, 0x2040},
++	{0x0A23, 0x2040}, {0x0A24, 0x2040}, {0x0A28, 0x2040}, {0x0A29, 0x2040},
++	{0x133F, 0x0030}, {0x133E, 0x000E}, {0x221F, 0x0000}, {0x2200, 0x1340},
++	{0x221F, 0x0000}, {0x133F, 0x0010}, {0x133E, 0x0FFE}, {0x20A0, 0x1940},
++	{0x20C0, 0x1940}, {0x20E0, 0x1940}, {0x130c, 0x0050},
++};
++
++static const struct rtl8367_initval rtl8367_initvals_1_1[] = {
++	{0x1B24, 0x0000}, {0x1B25, 0x0000}, {0x1B26, 0x0000}, {0x1B27, 0x0000},
++	{0x207F, 0x0002}, {0x2079, 0x0200}, {0x207F, 0x0000}, {0x133F, 0x0030},
++	{0x133E, 0x000E}, {0x221F, 0x0005}, {0x2201, 0x0700}, {0x2205, 0x8B82},
++	{0x2206, 0x05CB}, {0x221F, 0x0002}, {0x2204, 0x80C2}, {0x2205, 0x0938},
++	{0x221F, 0x0003}, {0x2212, 0xC4D2}, {0x220D, 0x0207}, {0x221F, 0x0001},
++	{0x2207, 0x267E}, {0x221C, 0xE5F7}, {0x221B, 0x0424}, {0x221F, 0x0007},
++	{0x221E, 0x0040}, {0x2218, 0x0000}, {0x221F, 0x0007}, {0x221E, 0x002C},
++	{0x2218, 0x008B}, {0x221F, 0x0005}, {0x2205, 0xFFF6}, {0x2206, 0x0080},
++	{0x2205, 0x8000}, {0x2206, 0xF8E0}, {0x2206, 0xE000}, {0x2206, 0xE1E0},
++	{0x2206, 0x01AC}, {0x2206, 0x2408}, {0x2206, 0xE08B}, {0x2206, 0x84F7},
++	{0x2206, 0x20E4}, {0x2206, 0x8B84}, {0x2206, 0xFC05}, {0x2206, 0xF8FA},
++	{0x2206, 0xEF69}, {0x2206, 0xE08B}, {0x2206, 0x86AC}, {0x2206, 0x201A},
++	{0x2206, 0xBF80}, {0x2206, 0x59D0}, {0x2206, 0x2402}, {0x2206, 0x803D},
++	{0x2206, 0xE0E0}, {0x2206, 0xE4E1}, {0x2206, 0xE0E5}, {0x2206, 0x5806},
++	{0x2206, 0x68C0}, {0x2206, 0xD1D2}, {0x2206, 0xE4E0}, {0x2206, 0xE4E5},
++	{0x2206, 0xE0E5}, {0x2206, 0xEF96}, {0x2206, 0xFEFC}, {0x2206, 0x05FB},
++	{0x2206, 0x0BFB}, {0x2206, 0x58FF}, {0x2206, 0x9E11}, {0x2206, 0x06F0},
++	{0x2206, 0x0C81}, {0x2206, 0x8AE0}, {0x2206, 0x0019}, {0x2206, 0x1B89},
++	{0x2206, 0xCFEB}, {0x2206, 0x19EB}, {0x2206, 0x19B0}, {0x2206, 0xEFFF},
++	{0x2206, 0x0BFF}, {0x2206, 0x0425}, {0x2206, 0x0807}, {0x2206, 0x2640},
++	{0x2206, 0x7227}, {0x2206, 0x267E}, {0x2206, 0x2804}, {0x2206, 0xB729},
++	{0x2206, 0x2576}, {0x2206, 0x2A68}, {0x2206, 0xE52B}, {0x2206, 0xAD00},
++	{0x2206, 0x2CDB}, {0x2206, 0xF02D}, {0x2206, 0x67BB}, {0x2206, 0x2E7B},
++	{0x2206, 0x0F2F}, {0x2206, 0x7365}, {0x2206, 0x31AC}, {0x2206, 0xCC32},
++	{0x2206, 0x2300}, {0x2206, 0x332D}, {0x2206, 0x1734}, {0x2206, 0x7F52},
++	{0x2206, 0x3510}, {0x2206, 0x0036}, {0x2206, 0x0600}, {0x2206, 0x370C},
++	{0x2206, 0xC038}, {0x2206, 0x7FCE}, {0x2206, 0x3CE5}, {0x2206, 0xF73D},
++	{0x2206, 0x3DA4}, {0x2206, 0x6530}, {0x2206, 0x3E67}, {0x2206, 0x0053},
++	{0x2206, 0x69D2}, {0x2206, 0x0F6A}, {0x2206, 0x012C}, {0x2206, 0x6C2B},
++	{0x2206, 0x136E}, {0x2206, 0xE100}, {0x2206, 0x6F12}, {0x2206, 0xF771},
++	{0x2206, 0x006B}, {0x2206, 0x7306}, {0x2206, 0xEB74}, {0x2206, 0x94C7},
++	{0x2206, 0x7698}, {0x2206, 0x0A77}, {0x2206, 0x5000}, {0x2206, 0x788A},
++	{0x2206, 0x1579}, {0x2206, 0x7F6F}, {0x2206, 0x7A06}, {0x2206, 0xA600},
++	{0x2205, 0x8B90}, {0x2206, 0x8000}, {0x2205, 0x8B92}, {0x2206, 0x8000},
++	{0x2205, 0x8B94}, {0x2206, 0x8014}, {0x2208, 0xFFFA}, {0x2202, 0x3C65},
++	{0x2205, 0xFFF6}, {0x2206, 0x00F7}, {0x221F, 0x0000}, {0x221F, 0x0007},
++	{0x221E, 0x0042}, {0x2218, 0x0000}, {0x221E, 0x002D}, {0x2218, 0xF010},
++	{0x221E, 0x0020}, {0x2215, 0x0000}, {0x221E, 0x0023}, {0x2216, 0x8000},
++	{0x221F, 0x0000}, {0x133F, 0x0010}, {0x133E, 0x0FFE}, {0x1362, 0x0115},
++	{0x1363, 0x0002}, {0x1363, 0x0000}, {0x1306, 0x000C}, {0x1307, 0x000C},
++	{0x1303, 0x0067}, {0x1304, 0x4444}, {0x1203, 0xFF00}, {0x1200, 0x7FC4},
++	{0x0900, 0x0000}, {0x0901, 0x0000}, {0x0902, 0x0000}, {0x0903, 0x0000},
++	{0x0865, 0x3210}, {0x087B, 0x0000}, {0x087C, 0xFF00}, {0x087D, 0x0000},
++	{0x087E, 0x0000}, {0x0801, 0x0100}, {0x0802, 0x0100}, {0x0A20, 0x2040},
++	{0x0A21, 0x2040}, {0x0A22, 0x2040}, {0x0A23, 0x2040}, {0x0A24, 0x2040},
++	{0x0A25, 0x2040}, {0x0A26, 0x2040}, {0x0A27, 0x2040}, {0x0A28, 0x2040},
++	{0x0A29, 0x2040}, {0x133F, 0x0030}, {0x133E, 0x000E}, {0x221F, 0x0000},
++	{0x2200, 0x1340}, {0x221F, 0x0000}, {0x133F, 0x0010}, {0x133E, 0x0FFE},
++	{0x1B03, 0x0876},
++};
++
++static const struct rtl8367_initval rtl8367_initvals_2_0[] = {
++	{0x1b24, 0x0000}, {0x1b25, 0x0000}, {0x1b26, 0x0000}, {0x1b27, 0x0000},
++	{0x133f, 0x0030}, {0x133e, 0x000e}, {0x221f, 0x0007}, {0x221e, 0x0048},
++	{0x2219, 0x4012}, {0x221f, 0x0003}, {0x2201, 0x3554}, {0x2202, 0x63e8},
++	{0x2203, 0x99c2}, {0x2204, 0x0113}, {0x2205, 0x303e}, {0x220d, 0x0207},
++	{0x220e, 0xe100}, {0x221f, 0x0007}, {0x221e, 0x0040}, {0x2218, 0x0000},
++	{0x221f, 0x0007}, {0x221e, 0x002c}, {0x2218, 0x008b}, {0x221f, 0x0005},
++	{0x2205, 0xfff6}, {0x2206, 0x0080}, {0x221f, 0x0005}, {0x2205, 0x8000},
++	{0x2206, 0x0280}, {0x2206, 0x2bf7}, {0x2206, 0x00e0}, {0x2206, 0xfff7},
++	{0x2206, 0xa080}, {0x2206, 0x02ae}, {0x2206, 0xf602}, {0x2206, 0x804e},
++	{0x2206, 0x0201}, {0x2206, 0x5002}, {0x2206, 0x0163}, {0x2206, 0x0201},
++	{0x2206, 0x79e0}, {0x2206, 0x8b8c}, {0x2206, 0xe18b}, {0x2206, 0x8d1e},
++	{0x2206, 0x01e1}, {0x2206, 0x8b8e}, {0x2206, 0x1e01}, {0x2206, 0xa000},
++	{0x2206, 0xe4ae}, {0x2206, 0xd8bf}, {0x2206, 0x8b88}, {0x2206, 0xec00},
++	{0x2206, 0x19a9}, {0x2206, 0x8b90}, {0x2206, 0xf9ee}, {0x2206, 0xfff6},
++	{0x2206, 0x00ee}, {0x2206, 0xfff7}, {0x2206, 0xfce0}, {0x2206, 0xe140},
++	{0x2206, 0xe1e1}, {0x2206, 0x41f7}, {0x2206, 0x2ff6}, {0x2206, 0x28e4},
++	{0x2206, 0xe140}, {0x2206, 0xe5e1}, {0x2206, 0x4104}, {0x2206, 0xf8fa},
++	{0x2206, 0xef69}, {0x2206, 0xe08b}, {0x2206, 0x86ac}, {0x2206, 0x201a},
++	{0x2206, 0xbf80}, {0x2206, 0x77d0}, {0x2206, 0x6c02}, {0x2206, 0x2978},
++	{0x2206, 0xe0e0}, {0x2206, 0xe4e1}, {0x2206, 0xe0e5}, {0x2206, 0x5806},
++	{0x2206, 0x68c0}, {0x2206, 0xd1d2}, {0x2206, 0xe4e0}, {0x2206, 0xe4e5},
++	{0x2206, 0xe0e5}, {0x2206, 0xef96}, {0x2206, 0xfefc}, {0x2206, 0x0425},
++	{0x2206, 0x0807}, {0x2206, 0x2640}, {0x2206, 0x7227}, {0x2206, 0x267e},
++	{0x2206, 0x2804}, {0x2206, 0xb729}, {0x2206, 0x2576}, {0x2206, 0x2a68},
++	{0x2206, 0xe52b}, {0x2206, 0xad00}, {0x2206, 0x2cdb}, {0x2206, 0xf02d},
++	{0x2206, 0x67bb}, {0x2206, 0x2e7b}, {0x2206, 0x0f2f}, {0x2206, 0x7365},
++	{0x2206, 0x31ac}, {0x2206, 0xcc32}, {0x2206, 0x2300}, {0x2206, 0x332d},
++	{0x2206, 0x1734}, {0x2206, 0x7f52}, {0x2206, 0x3510}, {0x2206, 0x0036},
++	{0x2206, 0x0600}, {0x2206, 0x370c}, {0x2206, 0xc038}, {0x2206, 0x7fce},
++	{0x2206, 0x3ce5}, {0x2206, 0xf73d}, {0x2206, 0x3da4}, {0x2206, 0x6530},
++	{0x2206, 0x3e67}, {0x2206, 0x0053}, {0x2206, 0x69d2}, {0x2206, 0x0f6a},
++	{0x2206, 0x012c}, {0x2206, 0x6c2b}, {0x2206, 0x136e}, {0x2206, 0xe100},
++	{0x2206, 0x6f12}, {0x2206, 0xf771}, {0x2206, 0x006b}, {0x2206, 0x7306},
++	{0x2206, 0xeb74}, {0x2206, 0x94c7}, {0x2206, 0x7698}, {0x2206, 0x0a77},
++	{0x2206, 0x5000}, {0x2206, 0x788a}, {0x2206, 0x1579}, {0x2206, 0x7f6f},
++	{0x2206, 0x7a06}, {0x2206, 0xa600}, {0x2201, 0x0701}, {0x2200, 0x0405},
++	{0x221f, 0x0000}, {0x2200, 0x1340}, {0x221f, 0x0000}, {0x133f, 0x0010},
++	{0x133e, 0x0ffe}, {0x1203, 0xff00}, {0x1200, 0x7fc4}, {0x121d, 0x7D16},
++	{0x121e, 0x03e8}, {0x121f, 0x024e}, {0x1220, 0x0230}, {0x1221, 0x0244},
++	{0x1222, 0x0226}, {0x1223, 0x024e}, {0x1224, 0x0230}, {0x1225, 0x0244},
++	{0x1226, 0x0226}, {0x1227, 0x00c0}, {0x1228, 0x00b4}, {0x122f, 0x00c0},
++	{0x1230, 0x00b4}, {0x0208, 0x03e8}, {0x0209, 0x03e8}, {0x020a, 0x03e8},
++	{0x020b, 0x03e8}, {0x020c, 0x03e8}, {0x020d, 0x03e8}, {0x020e, 0x03e8},
++	{0x020f, 0x03e8}, {0x0210, 0x03e8}, {0x0211, 0x03e8}, {0x0212, 0x03e8},
++	{0x0213, 0x03e8}, {0x0214, 0x03e8}, {0x0215, 0x03e8}, {0x0216, 0x03e8},
++	{0x0217, 0x03e8}, {0x0900, 0x0000}, {0x0901, 0x0000}, {0x0902, 0x0000},
++	{0x0903, 0x0000}, {0x0865, 0x3210}, {0x087b, 0x0000}, {0x087c, 0xff00},
++	{0x087d, 0x0000}, {0x087e, 0x0000}, {0x0801, 0x0100}, {0x0802, 0x0100},
++	{0x0A20, 0x2040}, {0x0A21, 0x2040}, {0x0A22, 0x2040}, {0x0A23, 0x2040},
++	{0x0A24, 0x2040}, {0x0A28, 0x2040}, {0x0A29, 0x2040}, {0x20A0, 0x1940},
++	{0x20C0, 0x1940}, {0x20E0, 0x1940}, {0x130c, 0x0050},
++};
++
++static const struct rtl8367_initval rtl8367_initvals_2_1[] = {
++	{0x1b24, 0x0000}, {0x1b25, 0x0000}, {0x1b26, 0x0000}, {0x1b27, 0x0000},
++	{0x133f, 0x0030}, {0x133e, 0x000e}, {0x221f, 0x0007}, {0x221e, 0x0048},
++	{0x2219, 0x4012}, {0x221f, 0x0003}, {0x2201, 0x3554}, {0x2202, 0x63e8},
++	{0x2203, 0x99c2}, {0x2204, 0x0113}, {0x2205, 0x303e}, {0x220d, 0x0207},
++	{0x220e, 0xe100}, {0x221f, 0x0007}, {0x221e, 0x0040}, {0x2218, 0x0000},
++	{0x221f, 0x0007}, {0x221e, 0x002c}, {0x2218, 0x008b}, {0x221f, 0x0005},
++	{0x2205, 0xfff6}, {0x2206, 0x0080}, {0x221f, 0x0005}, {0x2205, 0x8000},
++	{0x2206, 0x0280}, {0x2206, 0x2bf7}, {0x2206, 0x00e0}, {0x2206, 0xfff7},
++	{0x2206, 0xa080}, {0x2206, 0x02ae}, {0x2206, 0xf602}, {0x2206, 0x804e},
++	{0x2206, 0x0201}, {0x2206, 0x5002}, {0x2206, 0x0163}, {0x2206, 0x0201},
++	{0x2206, 0x79e0}, {0x2206, 0x8b8c}, {0x2206, 0xe18b}, {0x2206, 0x8d1e},
++	{0x2206, 0x01e1}, {0x2206, 0x8b8e}, {0x2206, 0x1e01}, {0x2206, 0xa000},
++	{0x2206, 0xe4ae}, {0x2206, 0xd8bf}, {0x2206, 0x8b88}, {0x2206, 0xec00},
++	{0x2206, 0x19a9}, {0x2206, 0x8b90}, {0x2206, 0xf9ee}, {0x2206, 0xfff6},
++	{0x2206, 0x00ee}, {0x2206, 0xfff7}, {0x2206, 0xfce0}, {0x2206, 0xe140},
++	{0x2206, 0xe1e1}, {0x2206, 0x41f7}, {0x2206, 0x2ff6}, {0x2206, 0x28e4},
++	{0x2206, 0xe140}, {0x2206, 0xe5e1}, {0x2206, 0x4104}, {0x2206, 0xf8fa},
++	{0x2206, 0xef69}, {0x2206, 0xe08b}, {0x2206, 0x86ac}, {0x2206, 0x201a},
++	{0x2206, 0xbf80}, {0x2206, 0x77d0}, {0x2206, 0x6c02}, {0x2206, 0x2978},
++	{0x2206, 0xe0e0}, {0x2206, 0xe4e1}, {0x2206, 0xe0e5}, {0x2206, 0x5806},
++	{0x2206, 0x68c0}, {0x2206, 0xd1d2}, {0x2206, 0xe4e0}, {0x2206, 0xe4e5},
++	{0x2206, 0xe0e5}, {0x2206, 0xef96}, {0x2206, 0xfefc}, {0x2206, 0x0425},
++	{0x2206, 0x0807}, {0x2206, 0x2640}, {0x2206, 0x7227}, {0x2206, 0x267e},
++	{0x2206, 0x2804}, {0x2206, 0xb729}, {0x2206, 0x2576}, {0x2206, 0x2a68},
++	{0x2206, 0xe52b}, {0x2206, 0xad00}, {0x2206, 0x2cdb}, {0x2206, 0xf02d},
++	{0x2206, 0x67bb}, {0x2206, 0x2e7b}, {0x2206, 0x0f2f}, {0x2206, 0x7365},
++	{0x2206, 0x31ac}, {0x2206, 0xcc32}, {0x2206, 0x2300}, {0x2206, 0x332d},
++	{0x2206, 0x1734}, {0x2206, 0x7f52}, {0x2206, 0x3510}, {0x2206, 0x0036},
++	{0x2206, 0x0600}, {0x2206, 0x370c}, {0x2206, 0xc038}, {0x2206, 0x7fce},
++	{0x2206, 0x3ce5}, {0x2206, 0xf73d}, {0x2206, 0x3da4}, {0x2206, 0x6530},
++	{0x2206, 0x3e67}, {0x2206, 0x0053}, {0x2206, 0x69d2}, {0x2206, 0x0f6a},
++	{0x2206, 0x012c}, {0x2206, 0x6c2b}, {0x2206, 0x136e}, {0x2206, 0xe100},
++	{0x2206, 0x6f12}, {0x2206, 0xf771}, {0x2206, 0x006b}, {0x2206, 0x7306},
++	{0x2206, 0xeb74}, {0x2206, 0x94c7}, {0x2206, 0x7698}, {0x2206, 0x0a77},
++	{0x2206, 0x5000}, {0x2206, 0x788a}, {0x2206, 0x1579}, {0x2206, 0x7f6f},
++	{0x2206, 0x7a06}, {0x2206, 0xa600}, {0x2201, 0x0701}, {0x2200, 0x0405},
++	{0x221f, 0x0000}, {0x2200, 0x1340}, {0x221f, 0x0000}, {0x133f, 0x0010},
++	{0x133e, 0x0ffe}, {0x1203, 0xff00}, {0x1200, 0x7fc4}, {0x0900, 0x0000},
++	{0x0901, 0x0000}, {0x0902, 0x0000}, {0x0903, 0x0000}, {0x0865, 0x3210},
++	{0x087b, 0x0000}, {0x087c, 0xff00}, {0x087d, 0x0000}, {0x087e, 0x0000},
++	{0x0801, 0x0100}, {0x0802, 0x0100}, {0x0A20, 0x2040}, {0x0A21, 0x2040},
++	{0x0A22, 0x2040}, {0x0A23, 0x2040}, {0x0A24, 0x2040}, {0x0A25, 0x2040},
++	{0x0A26, 0x2040}, {0x0A27, 0x2040}, {0x0A28, 0x2040}, {0x0A29, 0x2040},
++	{0x130c, 0x0050},
++};
++
++static int rtl8367_write_initvals(struct rtl8366_smi *smi,
++				  const struct rtl8367_initval *initvals,
++				  int count)
++{
++	int err;
++	int i;
++
++	for (i = 0; i < count; i++)
++		REG_WR(smi, initvals[i].reg, initvals[i].val);
++
++	return 0;
++}
++
++static int rtl8367_read_phy_reg(struct rtl8366_smi *smi,
++				u32 phy_addr, u32 phy_reg, u32 *val)
++{
++	int timeout;
++	u32 data;
++	int err;
++
++	if (phy_addr > RTL8367_PHY_ADDR_MAX)
++		return -EINVAL;
++
++	if (phy_reg > RTL8367_PHY_REG_MAX)
++		return -EINVAL;
++
++	REG_RD(smi, RTL8367_IA_STATUS_REG, &data);
++	if (data & RTL8367_IA_STATUS_PHY_BUSY)
++		return -ETIMEDOUT;
++
++	/* prepare address */
++	REG_WR(smi, RTL8367_IA_ADDRESS_REG,
++	       RTL8367_INTERNAL_PHY_REG(phy_addr, phy_reg));
++
++	/* send read command */
++	REG_WR(smi, RTL8367_IA_CTRL_REG,
++	       RTL8367_IA_CTRL_CMD_MASK | RTL8367_IA_CTRL_RW_READ);
++
++	timeout = 5;
++	do {
++		REG_RD(smi, RTL8367_IA_STATUS_REG, &data);
++		if ((data & RTL8367_IA_STATUS_PHY_BUSY) == 0)
++			break;
++
++		if (timeout--) {
++			dev_err(smi->parent, "phy read timed out\n");
++			return -ETIMEDOUT;
++		}
++
++		udelay(1);
++	} while (1);
++
++	/* read data */
++	REG_RD(smi, RTL8367_IA_READ_DATA_REG, val);
++
++	dev_dbg(smi->parent, "phy_read: addr:%02x, reg:%02x, val:%04x\n",
++		phy_addr, phy_reg, *val);
++	return 0;
++}
++
++static int rtl8367_write_phy_reg(struct rtl8366_smi *smi,
++				 u32 phy_addr, u32 phy_reg, u32 val)
++{
++	int timeout;
++	u32 data;
++	int err;
++
++	dev_dbg(smi->parent, "phy_write: addr:%02x, reg:%02x, val:%04x\n",
++		phy_addr, phy_reg, val);
++
++	if (phy_addr > RTL8367_PHY_ADDR_MAX)
++		return -EINVAL;
++
++	if (phy_reg > RTL8367_PHY_REG_MAX)
++		return -EINVAL;
++
++	REG_RD(smi, RTL8367_IA_STATUS_REG, &data);
++	if (data & RTL8367_IA_STATUS_PHY_BUSY)
++		return -ETIMEDOUT;
++
++	/* preapre data */
++	REG_WR(smi, RTL8367_IA_WRITE_DATA_REG, val);
++
++	/* prepare address */
++	REG_WR(smi, RTL8367_IA_ADDRESS_REG,
++	       RTL8367_INTERNAL_PHY_REG(phy_addr, phy_reg));
++
++	/* send write command */
++	REG_WR(smi, RTL8367_IA_CTRL_REG,
++	       RTL8367_IA_CTRL_CMD_MASK | RTL8367_IA_CTRL_RW_WRITE);
++
++	timeout = 5;
++	do {
++		REG_RD(smi, RTL8367_IA_STATUS_REG, &data);
++		if ((data & RTL8367_IA_STATUS_PHY_BUSY) == 0)
++			break;
++
++		if (timeout--) {
++			dev_err(smi->parent, "phy write timed out\n");
++			return -ETIMEDOUT;
++		}
++
++		udelay(1);
++	} while (1);
++
++	return 0;
++}
++
++static int rtl8367_init_regs0(struct rtl8366_smi *smi, unsigned mode)
++{
++	const struct rtl8367_initval *initvals;
++	int count;
++	int err;
++
++	switch (mode) {
++	case 0:
++		initvals = rtl8367_initvals_0_0;
++		count = ARRAY_SIZE(rtl8367_initvals_0_0);
++		break;
++
++	case 1:
++	case 2:
++		initvals = rtl8367_initvals_0_1;
++		count = ARRAY_SIZE(rtl8367_initvals_0_1);
++		break;
++
++	default:
++		dev_err(smi->parent, "%s: unknow mode %u\n", __func__, mode);
++		return -ENODEV;
++	}
++
++	err = rtl8367_write_initvals(smi, initvals, count);
++	if (err)
++		return err;
++
++	/* TODO: complete this */
++
++	return 0;
++}
++
++static int rtl8367_init_regs1(struct rtl8366_smi *smi, unsigned mode)
++{
++	const struct rtl8367_initval *initvals;
++	int count;
++
++	switch (mode) {
++	case 0:
++		initvals = rtl8367_initvals_1_0;
++		count = ARRAY_SIZE(rtl8367_initvals_1_0);
++		break;
++
++	case 1:
++	case 2:
++		initvals = rtl8367_initvals_1_1;
++		count = ARRAY_SIZE(rtl8367_initvals_1_1);
++		break;
++
++	default:
++		dev_err(smi->parent, "%s: unknow mode %u\n", __func__, mode);
++		return -ENODEV;
++	}
++
++	return rtl8367_write_initvals(smi, initvals, count);
++}
++
++static int rtl8367_init_regs2(struct rtl8366_smi *smi, unsigned mode)
++{
++	const struct rtl8367_initval *initvals;
++	int count;
++
++	switch (mode) {
++	case 0:
++		initvals = rtl8367_initvals_2_0;
++		count = ARRAY_SIZE(rtl8367_initvals_2_0);
++		break;
++
++	case 1:
++	case 2:
++		initvals = rtl8367_initvals_2_1;
++		count = ARRAY_SIZE(rtl8367_initvals_2_1);
++		break;
++
++	default:
++		dev_err(smi->parent, "%s: unknow mode %u\n", __func__, mode);
++		return -ENODEV;
++	}
++
++	return rtl8367_write_initvals(smi, initvals, count);
++}
++
++static int rtl8367_init_regs(struct rtl8366_smi *smi)
++{
++	u32 data;
++	u32 rlvid;
++	u32 mode;
++	int err;
++
++	REG_WR(smi, RTL8367_RTL_MAGIC_ID_REG, RTL8367_RTL_MAGIC_ID_VAL);
++
++	REG_RD(smi, RTL8367_CHIP_VER_REG, &data);
++	rlvid = (data >> RTL8367_CHIP_VER_RLVID_SHIFT) &
++		RTL8367_CHIP_VER_RLVID_MASK;
++
++	REG_RD(smi, RTL8367_CHIP_MODE_REG, &data);
++	mode = data & RTL8367_CHIP_MODE_MASK;
++
++	switch (rlvid) {
++	case 0:
++		err = rtl8367_init_regs0(smi, mode);
++		break;
++
++	case 1:
++		err = rtl8367_write_phy_reg(smi, 0, 31, 5);
++		if (err)
++			break;
++
++		err = rtl8367_write_phy_reg(smi, 0, 5, 0x3ffe);
++		if (err)
++			break;
++
++		err = rtl8367_read_phy_reg(smi, 0, 6, &data);
++		if (err)
++			break;
++
++		if (data == 0x94eb) {
++			err = rtl8367_init_regs1(smi, mode);
++		} else if (data == 0x2104) {
++			err = rtl8367_init_regs2(smi, mode);
++		} else {
++			dev_err(smi->parent, "unknow phy data %04x\n", data);
++			return -ENODEV;
++		}
++
++		break;
++
++	default:
++		dev_err(smi->parent, "unknow rlvid %u\n", rlvid);
++		err = -ENODEV;
++		break;
++	}
++
++	return err;
++}
++
++static int rtl8367_reset_chip(struct rtl8366_smi *smi)
++{
++	int timeout = 10;
++	int err;
++	u32 data;
++
++	REG_WR(smi, RTL8367_CHIP_RESET_REG, RTL8367_CHIP_RESET_HW);
++	msleep(RTL8367_RESET_DELAY);
++
++	do {
++		REG_RD(smi, RTL8367_CHIP_RESET_REG, &data);
++		if (!(data & RTL8367_CHIP_RESET_HW))
++			break;
++
++		msleep(1);
++	} while (--timeout);
++
++	if (!timeout) {
++		dev_err(smi->parent, "chip reset timed out\n");
++		return -ETIMEDOUT;
++	}
++
++	return 0;
++}
++
++static int rtl8367_extif_set_mode(struct rtl8366_smi *smi, int id,
++				  enum rtl8367_extif_mode mode)
++{
++	int err;
++
++	/* set port mode */
++	switch (mode) {
++	case RTL8367_EXTIF_MODE_RGMII:
++	case RTL8367_EXTIF_MODE_RGMII_33V:
++		REG_WR(smi, RTL8367_CHIP_DEBUG0_REG, 0x0367);
++		REG_WR(smi, RTL8367_CHIP_DEBUG1_REG, 0x7777);
++		break;
++
++	case RTL8367_EXTIF_MODE_TMII_MAC:
++	case RTL8367_EXTIF_MODE_TMII_PHY:
++		REG_RMW(smi, RTL8367_BYPASS_LINE_RATE_REG,
++			BIT((id + 1) % 2), BIT((id + 1) % 2));
++		break;
++
++	case RTL8367_EXTIF_MODE_GMII:
++		REG_RMW(smi, RTL8367_CHIP_DEBUG0_REG,
++		        RTL8367_CHIP_DEBUG0_DUMMY0(id),
++			RTL8367_CHIP_DEBUG0_DUMMY0(id));
++		REG_RMW(smi, RTL8367_EXT_RGMXF_REG(id), BIT(6), BIT(6));
++		break;
++
++	case RTL8367_EXTIF_MODE_MII_MAC:
++	case RTL8367_EXTIF_MODE_MII_PHY:
++	case RTL8367_EXTIF_MODE_DISABLED:
++		REG_RMW(smi, RTL8367_BYPASS_LINE_RATE_REG,
++			BIT((id + 1) % 2), 0);
++		REG_RMW(smi, RTL8367_EXT_RGMXF_REG(id), BIT(6), 0);
++		break;
++
++	default:
++		dev_err(smi->parent,
++			"invalid mode for external interface %d\n", id);
++		return -EINVAL;
++	}
++
++	REG_RMW(smi, RTL8367_DIS_REG,
++		RTL8367_DIS_RGMII_MASK << RTL8367_DIS_RGMII_SHIFT(id),
++		mode << RTL8367_DIS_RGMII_SHIFT(id));
++
++	return 0;
++}
++
++static int rtl8367_extif_set_force(struct rtl8366_smi *smi, int id,
++				   struct rtl8367_port_ability *pa)
++{
++	u32 mask;
++	u32 val;
++	int err;
++
++	mask = (RTL8367_DI_FORCE_MODE |
++		RTL8367_DI_FORCE_NWAY |
++		RTL8367_DI_FORCE_TXPAUSE |
++		RTL8367_DI_FORCE_RXPAUSE |
++		RTL8367_DI_FORCE_LINK |
++		RTL8367_DI_FORCE_DUPLEX |
++		RTL8367_DI_FORCE_SPEED_MASK);
++
++	val = pa->speed;
++	val |= pa->force_mode ? RTL8367_DI_FORCE_MODE : 0;
++	val |= pa->nway ? RTL8367_DI_FORCE_NWAY : 0;
++	val |= pa->txpause ? RTL8367_DI_FORCE_TXPAUSE : 0;
++	val |= pa->rxpause ? RTL8367_DI_FORCE_RXPAUSE : 0;
++	val |= pa->link ? RTL8367_DI_FORCE_LINK : 0;
++	val |= pa->duplex ? RTL8367_DI_FORCE_DUPLEX : 0;
++
++	REG_RMW(smi, RTL8367_DI_FORCE_REG(id), mask, val);
++
++	return 0;
++}
++
++static int rtl8367_extif_set_rgmii_delay(struct rtl8366_smi *smi, int id,
++					 unsigned txdelay, unsigned rxdelay)
++{
++	u32 mask;
++	u32 val;
++	int err;
++
++	mask = (RTL8367_EXT_RGMXF_RXDELAY_MASK |
++		(RTL8367_EXT_RGMXF_TXDELAY_MASK <<
++			RTL8367_EXT_RGMXF_TXDELAY_SHIFT));
++
++	val = rxdelay;
++	val |= txdelay << RTL8367_EXT_RGMXF_TXDELAY_SHIFT;
++
++	REG_RMW(smi, RTL8367_EXT_RGMXF_REG(id), mask, val);
++
++	return 0;
++}
++
++static int rtl8367_extif_init(struct rtl8366_smi *smi, int id,
++			      struct rtl8367_extif_config *cfg)
++{
++	enum rtl8367_extif_mode mode;
++	int err;
++
++	mode = (cfg) ? cfg->mode : RTL8367_EXTIF_MODE_DISABLED;
++
++	err = rtl8367_extif_set_mode(smi, id, mode);
++	if (err)
++		return err;
++
++	if (mode != RTL8367_EXTIF_MODE_DISABLED) {
++		err = rtl8367_extif_set_force(smi, id, &cfg->ability);
++		if (err)
++			return err;
++
++		err = rtl8367_extif_set_rgmii_delay(smi, id, cfg->txdelay,
++						     cfg->rxdelay);
++		if (err)
++			return err;
++	}
++
++	return 0;
++}
++
++static int rtl8367_led_group_set_ports(struct rtl8366_smi *smi,
++				       unsigned int group, u16 port_mask)
++{
++	u32 reg;
++	u32 s;
++	int err;
++
++	port_mask &= RTL8367_PARA_LED_IO_EN_PMASK;
++	s = (group % 2) * 8;
++	reg = RTL8367_PARA_LED_IO_EN1_REG + (group / 2);
++
++	REG_RMW(smi, reg, (RTL8367_PARA_LED_IO_EN_PMASK << s), port_mask << s);
++
++	return 0;
++}
++
++static int rtl8367_led_group_set_mode(struct rtl8366_smi *smi,
++				      unsigned int mode)
++{
++	u16 mask;
++	u16 set;
++	int err;
++
++	mode &= RTL8367_LED_CONFIG_DATA_M;
++
++	mask = (RTL8367_LED_CONFIG_DATA_M << RTL8367_LED_CONFIG_DATA_S) |
++		RTL8367_LED_CONFIG_SEL;
++	set = (mode << RTL8367_LED_CONFIG_DATA_S) | RTL8367_LED_CONFIG_SEL;
++
++	REG_RMW(smi, RTL8367_LED_CONFIG_REG, mask, set);
++
++	return 0;
++}
++
++static int rtl8367_led_group_set_config(struct rtl8366_smi *smi,
++				        unsigned int led, unsigned int cfg)
++{
++	u16 mask;
++	u16 set;
++	int err;
++
++	mask = (RTL8367_LED_CONFIG_LED_CFG_M << (led * 4)) |
++		RTL8367_LED_CONFIG_SEL;
++	set = (cfg & RTL8367_LED_CONFIG_LED_CFG_M) << (led * 4);
++
++	REG_RMW(smi, RTL8367_LED_CONFIG_REG, mask, set);
++	return 0;
++}
++
++static int rtl8367_led_op_select_parallel(struct rtl8366_smi *smi)
++{
++	int err;
++
++	REG_WR(smi, RTL8367_LED_SYS_CONFIG_REG, 0x1472);
++	return 0;
++}
++
++static int rtl8367_led_blinkrate_set(struct rtl8366_smi *smi, unsigned int rate)
++{
++	u16 mask;
++	u16 set;
++	int err;
++
++	mask = RTL8367_LED_MODE_RATE_M << RTL8367_LED_MODE_RATE_S;
++	set = (rate & RTL8367_LED_MODE_RATE_M) << RTL8367_LED_MODE_RATE_S;
++	REG_RMW(smi, RTL8367_LED_MODE_REG, mask, set);
++
++	return 0;
++}
++
++#ifdef CONFIG_OF
++static int rtl8367_extif_init_of(struct rtl8366_smi *smi, int id,
++				 const char *name)
++{
++	struct rtl8367_extif_config *cfg;
++	const __be32 *prop;
++	int size;
++	int err;
++
++	prop = of_get_property(smi->parent->of_node, name, &size);
++	if (!prop)
++		return rtl8367_extif_init(smi, id, NULL);
++
++	if (size != (9 * sizeof(*prop))) {
++		dev_err(smi->parent, "%s property is invalid\n", name);
++		return -EINVAL;
++	}
++
++	cfg = kzalloc(sizeof(struct rtl8367_extif_config), GFP_KERNEL);
++	if (!cfg)
++		return -ENOMEM;
++
++	cfg->txdelay = be32_to_cpup(prop++);
++	cfg->rxdelay = be32_to_cpup(prop++);
++	cfg->mode = be32_to_cpup(prop++);
++	cfg->ability.force_mode = be32_to_cpup(prop++);
++	cfg->ability.txpause = be32_to_cpup(prop++);
++	cfg->ability.rxpause = be32_to_cpup(prop++);
++	cfg->ability.link = be32_to_cpup(prop++);
++	cfg->ability.duplex = be32_to_cpup(prop++);
++	cfg->ability.speed = be32_to_cpup(prop++);
++
++	err = rtl8367_extif_init(smi, id, cfg);
++	kfree(cfg);
++
++	return err;
++}
++#else
++static int rtl8367_extif_init_of(struct rtl8366_smi *smi, int id,
++				 const char *name)
++{
++	return -EINVAL;
++}
++#endif
++
++static int rtl8367_setup(struct rtl8366_smi *smi)
++{
++	struct rtl8367_platform_data *pdata;
++	int err;
++	int i;
++
++	pdata = smi->parent->platform_data;
++
++	err = rtl8367_init_regs(smi);
++	if (err)
++		return err;
++
++	/* initialize external interfaces */
++	if (smi->parent->of_node) {
++		err = rtl8367_extif_init_of(smi, 0, "realtek,extif0");
++		if (err)
++			return err;
++
++		err = rtl8367_extif_init_of(smi, 1, "realtek,extif1");
++		if (err)
++			return err;
++	} else {
++		err = rtl8367_extif_init(smi, 0, pdata->extif0_cfg);
++		if (err)
++			return err;
++
++		err = rtl8367_extif_init(smi, 1, pdata->extif1_cfg);
++		if (err)
++			return err;
++	}
++
++	/* set maximum packet length to 1536 bytes */
++	REG_RMW(smi, RTL8367_SWC0_REG, RTL8367_SWC0_MAX_LENGTH_MASK,
++		RTL8367_SWC0_MAX_LENGTH_1536);
++
++	/*
++	 * discard VLAN tagged packets if the port is not a member of
++	 * the VLAN with which the packets is associated.
++	 */
++	REG_WR(smi, RTL8367_VLAN_INGRESS_REG, RTL8367_PORTS_ALL);
++
++	/*
++	 * Setup egress tag mode for each port.
++	 */
++	for (i = 0; i < RTL8367_NUM_PORTS; i++)
++		REG_RMW(smi,
++			RTL8367_PORT_CFG_REG(i),
++			RTL8367_PORT_CFG_EGRESS_MODE_MASK <<
++				RTL8367_PORT_CFG_EGRESS_MODE_SHIFT,
++			RTL8367_PORT_CFG_EGRESS_MODE_ORIGINAL <<
++				RTL8367_PORT_CFG_EGRESS_MODE_SHIFT);
++
++	/* setup LEDs */
++	err = rtl8367_led_group_set_ports(smi, 0, RTL8367_PORTS_ALL);
++	if (err)
++		return err;
++
++	err = rtl8367_led_group_set_mode(smi, 0);
++	if (err)
++		return err;
++
++	err = rtl8367_led_op_select_parallel(smi);
++	if (err)
++		return err;
++
++	err = rtl8367_led_blinkrate_set(smi, 1);
++	if (err)
++		return err;
++
++	err = rtl8367_led_group_set_config(smi, 0, 2);
++	if (err)
++		return err;
++
++	return 0;
++}
++
++static int rtl8367_get_mib_counter(struct rtl8366_smi *smi, int counter,
++				   int port, unsigned long long *val)
++{
++	struct rtl8366_mib_counter *mib;
++	int offset;
++	int i;
++	int err;
++	u32 addr, data;
++	u64 mibvalue;
++
++	if (port > RTL8367_NUM_PORTS || counter >= RTL8367_MIB_COUNT)
++		return -EINVAL;
++
++	mib = &rtl8367_mib_counters[counter];
++	addr = RTL8367_MIB_COUNTER_PORT_OFFSET * port + mib->offset;
++
++	/*
++	 * Writing access counter address first
++	 * then ASIC will prepare 64bits counter wait for being retrived
++	 */
++	REG_WR(smi, RTL8367_MIB_ADDRESS_REG, addr >> 2);
++
++	/* read MIB control register */
++	REG_RD(smi, RTL8367_MIB_CTRL_REG(0), &data);
++
++	if (data & RTL8367_MIB_CTRL_BUSY_MASK)
++		return -EBUSY;
++
++	if (data & RTL8367_MIB_CTRL_RESET_MASK)
++		return -EIO;
++
++	if (mib->length == 4)
++		offset = 3;
++	else
++		offset = (mib->offset + 1) % 4;
++
++	mibvalue = 0;
++	for (i = 0; i < mib->length; i++) {
++		REG_RD(smi, RTL8367_MIB_COUNTER_REG(offset - i), &data);
++		mibvalue = (mibvalue << 16) | (data & 0xFFFF);
++	}
++
++	*val = mibvalue;
++	return 0;
++}
++
++static int rtl8367_get_vlan_4k(struct rtl8366_smi *smi, u32 vid,
++				struct rtl8366_vlan_4k *vlan4k)
++{
++	u32 data[RTL8367_TA_VLAN_DATA_SIZE];
++	int err;
++	int i;
++
++	memset(vlan4k, '\0', sizeof(struct rtl8366_vlan_4k));
++
++	if (vid >= RTL8367_NUM_VIDS)
++		return -EINVAL;
++
++	/* write VID */
++	REG_WR(smi, RTL8367_TA_ADDR_REG, vid);
++
++	/* write table access control word */
++	REG_WR(smi, RTL8367_TA_CTRL_REG, RTL8367_TA_CTRL_CVLAN_READ);
++
++	for (i = 0; i < ARRAY_SIZE(data); i++)
++		REG_RD(smi, RTL8367_TA_DATA_REG(i), &data[i]);
++
++	vlan4k->vid = vid;
++	vlan4k->member = (data[0] >> RTL8367_TA_VLAN_MEMBER_SHIFT) &
++			 RTL8367_TA_VLAN_MEMBER_MASK;
++	vlan4k->fid = (data[1] >> RTL8367_TA_VLAN_FID_SHIFT) &
++		      RTL8367_TA_VLAN_FID_MASK;
++	vlan4k->untag = (data[2] >> RTL8367_TA_VLAN_UNTAG1_SHIFT) &
++			RTL8367_TA_VLAN_UNTAG1_MASK;
++	vlan4k->untag |= ((data[3] >> RTL8367_TA_VLAN_UNTAG2_SHIFT) &
++			  RTL8367_TA_VLAN_UNTAG2_MASK) << 2;
++
++	return 0;
++}
++
++static int rtl8367_set_vlan_4k(struct rtl8366_smi *smi,
++				const struct rtl8366_vlan_4k *vlan4k)
++{
++	u32 data[RTL8367_TA_VLAN_DATA_SIZE];
++	int err;
++	int i;
++
++	if (vlan4k->vid >= RTL8367_NUM_VIDS ||
++	    vlan4k->member > RTL8367_TA_VLAN_MEMBER_MASK ||
++	    vlan4k->untag > RTL8367_UNTAG_MASK ||
++	    vlan4k->fid > RTL8367_FIDMAX)
++		return -EINVAL;
++
++	data[0] = (vlan4k->member & RTL8367_TA_VLAN_MEMBER_MASK) <<
++		  RTL8367_TA_VLAN_MEMBER_SHIFT;
++	data[1] = (vlan4k->fid & RTL8367_TA_VLAN_FID_MASK) <<
++		  RTL8367_TA_VLAN_FID_SHIFT;
++	data[2] = (vlan4k->untag & RTL8367_TA_VLAN_UNTAG1_MASK) <<
++		  RTL8367_TA_VLAN_UNTAG1_SHIFT;
++	data[3] = ((vlan4k->untag >> 2) & RTL8367_TA_VLAN_UNTAG2_MASK) <<
++		  RTL8367_TA_VLAN_UNTAG2_SHIFT;
++
++	for (i = 0; i < ARRAY_SIZE(data); i++)
++		REG_WR(smi, RTL8367_TA_DATA_REG(i), data[i]);
++
++	/* write VID */
++	REG_WR(smi, RTL8367_TA_ADDR_REG,
++	       vlan4k->vid & RTL8367_TA_VLAN_VID_MASK);
++
++	/* write table access control word */
++	REG_WR(smi, RTL8367_TA_CTRL_REG, RTL8367_TA_CTRL_CVLAN_WRITE);
++
++	return 0;
++}
++
++static int rtl8367_get_vlan_mc(struct rtl8366_smi *smi, u32 index,
++				struct rtl8366_vlan_mc *vlanmc)
++{
++	u32 data[RTL8367_VLAN_MC_DATA_SIZE];
++	int err;
++	int i;
++
++	memset(vlanmc, '\0', sizeof(struct rtl8366_vlan_mc));
++
++	if (index >= RTL8367_NUM_VLANS)
++		return -EINVAL;
++
++	for (i = 0; i < ARRAY_SIZE(data); i++)
++		REG_RD(smi, RTL8367_VLAN_MC_BASE(index) + i, &data[i]);
++
++	vlanmc->member = (data[0] >> RTL8367_VLAN_MC_MEMBER_SHIFT) &
++			 RTL8367_VLAN_MC_MEMBER_MASK;
++	vlanmc->fid = (data[1] >> RTL8367_VLAN_MC_FID_SHIFT) &
++		      RTL8367_VLAN_MC_FID_MASK;
++	vlanmc->vid = (data[3] >> RTL8367_VLAN_MC_EVID_SHIFT) &
++		      RTL8367_VLAN_MC_EVID_MASK;
++
++	return 0;
++}
++
++static int rtl8367_set_vlan_mc(struct rtl8366_smi *smi, u32 index,
++				const struct rtl8366_vlan_mc *vlanmc)
++{
++	u32 data[RTL8367_VLAN_MC_DATA_SIZE];
++	int err;
++	int i;
++
++	if (index >= RTL8367_NUM_VLANS ||
++	    vlanmc->vid >= RTL8367_NUM_VIDS ||
++	    vlanmc->priority > RTL8367_PRIORITYMAX ||
++	    vlanmc->member > RTL8367_VLAN_MC_MEMBER_MASK ||
++	    vlanmc->untag > RTL8367_UNTAG_MASK ||
++	    vlanmc->fid > RTL8367_FIDMAX)
++		return -EINVAL;
++
++	data[0] = (vlanmc->member & RTL8367_VLAN_MC_MEMBER_MASK) <<
++		  RTL8367_VLAN_MC_MEMBER_SHIFT;
++	data[1] = (vlanmc->fid & RTL8367_VLAN_MC_FID_MASK) <<
++		  RTL8367_VLAN_MC_FID_SHIFT;
++	data[2] = 0;
++	data[3] = (vlanmc->vid & RTL8367_VLAN_MC_EVID_MASK) <<
++		   RTL8367_VLAN_MC_EVID_SHIFT;
++
++	for (i = 0; i < ARRAY_SIZE(data); i++)
++		REG_WR(smi, RTL8367_VLAN_MC_BASE(index) + i, data[i]);
++
++	return 0;
++}
++
++static int rtl8367_get_mc_index(struct rtl8366_smi *smi, int port, int *val)
++{
++	u32 data;
++	int err;
++
++	if (port >= RTL8367_NUM_PORTS)
++		return -EINVAL;
++
++	REG_RD(smi, RTL8367_VLAN_PVID_CTRL_REG(port), &data);
++
++	*val = (data >> RTL8367_VLAN_PVID_CTRL_SHIFT(port)) &
++	       RTL8367_VLAN_PVID_CTRL_MASK;
++
++	return 0;
++}
++
++static int rtl8367_set_mc_index(struct rtl8366_smi *smi, int port, int index)
++{
++	if (port >= RTL8367_NUM_PORTS || index >= RTL8367_NUM_VLANS)
++		return -EINVAL;
++
++	return rtl8366_smi_rmwr(smi, RTL8367_VLAN_PVID_CTRL_REG(port),
++				RTL8367_VLAN_PVID_CTRL_MASK <<
++					RTL8367_VLAN_PVID_CTRL_SHIFT(port),
++				(index & RTL8367_VLAN_PVID_CTRL_MASK) <<
++					RTL8367_VLAN_PVID_CTRL_SHIFT(port));
++}
++
++static int rtl8367_enable_vlan(struct rtl8366_smi *smi, int enable)
++{
++	return rtl8366_smi_rmwr(smi, RTL8367_VLAN_CTRL_REG,
++				RTL8367_VLAN_CTRL_ENABLE,
++				(enable) ? RTL8367_VLAN_CTRL_ENABLE : 0);
++}
++
++static int rtl8367_enable_vlan4k(struct rtl8366_smi *smi, int enable)
++{
++	return 0;
++}
++
++static int rtl8367_is_vlan_valid(struct rtl8366_smi *smi, unsigned vlan)
++{
++	unsigned max = RTL8367_NUM_VLANS;
++
++	if (smi->vlan4k_enabled)
++		max = RTL8367_NUM_VIDS - 1;
++
++	if (vlan == 0 || vlan >= max)
++		return 0;
++
++	return 1;
++}
++
++static int rtl8367_enable_port(struct rtl8366_smi *smi, int port, int enable)
++{
++	int err;
++
++	REG_WR(smi, RTL8367_PORT_ISOLATION_REG(port),
++	       (enable) ? RTL8367_PORTS_ALL : 0);
++
++	return 0;
++}
++
++static int rtl8367_sw_reset_mibs(struct switch_dev *dev,
++				  const struct switch_attr *attr,
++				  struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++
++	return rtl8366_smi_rmwr(smi, RTL8367_MIB_CTRL_REG(0), 0,
++				RTL8367_MIB_CTRL_GLOBAL_RESET_MASK);
++}
++
++static int rtl8367_sw_get_port_link(struct switch_dev *dev,
++				    int port,
++				    struct switch_port_link *link)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data = 0;
++	u32 speed;
++
++	if (port >= RTL8367_NUM_PORTS)
++		return -EINVAL;
++
++	rtl8366_smi_read_reg(smi, RTL8367_PORT_STATUS_REG(port), &data);
++
++	link->link = !!(data & RTL8367_PORT_STATUS_LINK);
++	if (!link->link)
++		return 0;
++
++	link->duplex = !!(data & RTL8367_PORT_STATUS_DUPLEX);
++	link->rx_flow = !!(data & RTL8367_PORT_STATUS_RXPAUSE);
++	link->tx_flow = !!(data & RTL8367_PORT_STATUS_TXPAUSE);
++	link->aneg = !!(data & RTL8367_PORT_STATUS_NWAY);
++
++	speed = (data & RTL8367_PORT_STATUS_SPEED_MASK);
++	switch (speed) {
++	case 0:
++		link->speed = SWITCH_PORT_SPEED_10;
++		break;
++	case 1:
++		link->speed = SWITCH_PORT_SPEED_100;
++		break;
++	case 2:
++		link->speed = SWITCH_PORT_SPEED_1000;
++		break;
++	default:
++		link->speed = SWITCH_PORT_SPEED_UNKNOWN;
++		break;
++	}
++
++	return 0;
++}
++
++static int rtl8367_sw_get_max_length(struct switch_dev *dev,
++				     const struct switch_attr *attr,
++				     struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	rtl8366_smi_read_reg(smi, RTL8367_SWC0_REG, &data);
++	val->value.i = (data & RTL8367_SWC0_MAX_LENGTH_MASK) >>
++			RTL8367_SWC0_MAX_LENGTH_SHIFT;
++
++	return 0;
++}
++
++static int rtl8367_sw_set_max_length(struct switch_dev *dev,
++				     const struct switch_attr *attr,
++				     struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 max_len;
++
++	switch (val->value.i) {
++	case 0:
++		max_len = RTL8367_SWC0_MAX_LENGTH_1522;
++		break;
++	case 1:
++		max_len = RTL8367_SWC0_MAX_LENGTH_1536;
++		break;
++	case 2:
++		max_len = RTL8367_SWC0_MAX_LENGTH_1552;
++		break;
++	case 3:
++		max_len = RTL8367_SWC0_MAX_LENGTH_16000;
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	return rtl8366_smi_rmwr(smi, RTL8367_SWC0_REG,
++			        RTL8367_SWC0_MAX_LENGTH_MASK, max_len);
++}
++
++
++static int rtl8367_sw_reset_port_mibs(struct switch_dev *dev,
++				       const struct switch_attr *attr,
++				       struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	int port;
++
++	port = val->port_vlan;
++	if (port >= RTL8367_NUM_PORTS)
++		return -EINVAL;
++
++	return rtl8366_smi_rmwr(smi, RTL8367_MIB_CTRL_REG(port / 8), 0,
++				RTL8367_MIB_CTRL_PORT_RESET_MASK(port % 8));
++}
++
++static int rtl8367_sw_get_port_stats(struct switch_dev *dev, int port,
++                                        struct switch_port_stats *stats)
++{
++	return (rtl8366_sw_get_port_stats(dev, port, stats,
++				RTL8367_MIB_TXB_ID, RTL8367_MIB_RXB_ID));
++}
++
++static struct switch_attr rtl8367_globals[] = {
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_vlan",
++		.description = "Enable VLAN mode",
++		.set = rtl8366_sw_set_vlan_enable,
++		.get = rtl8366_sw_get_vlan_enable,
++		.max = 1,
++		.ofs = 1
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_vlan4k",
++		.description = "Enable VLAN 4K mode",
++		.set = rtl8366_sw_set_vlan_enable,
++		.get = rtl8366_sw_get_vlan_enable,
++		.max = 1,
++		.ofs = 2
++	}, {
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "reset_mibs",
++		.description = "Reset all MIB counters",
++		.set = rtl8367_sw_reset_mibs,
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "max_length",
++		.description = "Get/Set the maximum length of valid packets"
++			       "(0:1522, 1:1536, 2:1552, 3:16000)",
++		.set = rtl8367_sw_set_max_length,
++		.get = rtl8367_sw_get_max_length,
++		.max = 3,
++	}
++};
++
++static struct switch_attr rtl8367_port[] = {
++	{
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "reset_mib",
++		.description = "Reset single port MIB counters",
++		.set = rtl8367_sw_reset_port_mibs,
++	}, {
++		.type = SWITCH_TYPE_STRING,
++		.name = "mib",
++		.description = "Get MIB counters for port",
++		.max = 33,
++		.set = NULL,
++		.get = rtl8366_sw_get_port_mib,
++	},
++};
++
++static struct switch_attr rtl8367_vlan[] = {
++	{
++		.type = SWITCH_TYPE_STRING,
++		.name = "info",
++		.description = "Get vlan information",
++		.max = 1,
++		.set = NULL,
++		.get = rtl8366_sw_get_vlan_info,
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "fid",
++		.description = "Get/Set vlan FID",
++		.max = RTL8367_FIDMAX,
++		.set = rtl8366_sw_set_vlan_fid,
++		.get = rtl8366_sw_get_vlan_fid,
++	},
++};
++
++static const struct switch_dev_ops rtl8367_sw_ops = {
++	.attr_global = {
++		.attr = rtl8367_globals,
++		.n_attr = ARRAY_SIZE(rtl8367_globals),
++	},
++	.attr_port = {
++		.attr = rtl8367_port,
++		.n_attr = ARRAY_SIZE(rtl8367_port),
++	},
++	.attr_vlan = {
++		.attr = rtl8367_vlan,
++		.n_attr = ARRAY_SIZE(rtl8367_vlan),
++	},
++
++	.get_vlan_ports = rtl8366_sw_get_vlan_ports,
++	.set_vlan_ports = rtl8366_sw_set_vlan_ports,
++	.get_port_pvid = rtl8366_sw_get_port_pvid,
++	.set_port_pvid = rtl8366_sw_set_port_pvid,
++	.reset_switch = rtl8366_sw_reset_switch,
++	.get_port_link = rtl8367_sw_get_port_link,
++	.get_port_stats = rtl8367_sw_get_port_stats,
++};
++
++static int rtl8367_switch_init(struct rtl8366_smi *smi)
++{
++	struct switch_dev *dev = &smi->sw_dev;
++	int err;
++
++	dev->name = "RTL8367";
++	dev->cpu_port = RTL8367_CPU_PORT_NUM;
++	dev->ports = RTL8367_NUM_PORTS;
++	dev->vlans = RTL8367_NUM_VIDS;
++	dev->ops = &rtl8367_sw_ops;
++	dev->alias = dev_name(smi->parent);
++
++	err = register_switch(dev, NULL);
++	if (err)
++		dev_err(smi->parent, "switch registration failed\n");
++
++	return err;
++}
++
++static void rtl8367_switch_cleanup(struct rtl8366_smi *smi)
++{
++	unregister_switch(&smi->sw_dev);
++}
++
++static int rtl8367_mii_read(struct mii_bus *bus, int addr, int reg)
++{
++	struct rtl8366_smi *smi = bus->priv;
++	u32 val = 0;
++	int err;
++
++	err = rtl8367_read_phy_reg(smi, addr, reg, &val);
++	if (err)
++		return 0xffff;
++
++	return val;
++}
++
++static int rtl8367_mii_write(struct mii_bus *bus, int addr, int reg, u16 val)
++{
++	struct rtl8366_smi *smi = bus->priv;
++	u32 t;
++	int err;
++
++	err = rtl8367_write_phy_reg(smi, addr, reg, val);
++	if (err)
++		return err;
++
++	/* flush write */
++	(void) rtl8367_read_phy_reg(smi, addr, reg, &t);
++
++	return err;
++}
++
++static int rtl8367_detect(struct rtl8366_smi *smi)
++{
++	u32 rtl_no = 0;
++	u32 rtl_ver = 0;
++	char *chip_name;
++	int ret;
++
++	ret = rtl8366_smi_read_reg(smi, RTL8367_RTL_NO_REG, &rtl_no);
++	if (ret) {
++		dev_err(smi->parent, "unable to read chip number\n");
++		return ret;
++	}
++
++	switch (rtl_no) {
++	case RTL8367_RTL_NO_8367R:
++		chip_name = "8367R";
++		break;
++	case RTL8367_RTL_NO_8367M:
++		chip_name = "8367M";
++		break;
++	default:
++		dev_err(smi->parent, "unknown chip number (%04x)\n", rtl_no);
++		return -ENODEV;
++	}
++
++	ret = rtl8366_smi_read_reg(smi, RTL8367_RTL_VER_REG, &rtl_ver);
++	if (ret) {
++		dev_err(smi->parent, "unable to read chip version\n");
++		return ret;
++	}
++
++	dev_info(smi->parent, "RTL%s ver. %u chip found\n",
++		 chip_name, rtl_ver & RTL8367_RTL_VER_MASK);
++
++	return 0;
++}
++
++static struct rtl8366_smi_ops rtl8367_smi_ops = {
++	.detect		= rtl8367_detect,
++	.reset_chip	= rtl8367_reset_chip,
++	.setup		= rtl8367_setup,
++
++	.mii_read	= rtl8367_mii_read,
++	.mii_write	= rtl8367_mii_write,
++
++	.get_vlan_mc	= rtl8367_get_vlan_mc,
++	.set_vlan_mc	= rtl8367_set_vlan_mc,
++	.get_vlan_4k	= rtl8367_get_vlan_4k,
++	.set_vlan_4k	= rtl8367_set_vlan_4k,
++	.get_mc_index	= rtl8367_get_mc_index,
++	.set_mc_index	= rtl8367_set_mc_index,
++	.get_mib_counter = rtl8367_get_mib_counter,
++	.is_vlan_valid	= rtl8367_is_vlan_valid,
++	.enable_vlan	= rtl8367_enable_vlan,
++	.enable_vlan4k	= rtl8367_enable_vlan4k,
++	.enable_port	= rtl8367_enable_port,
++};
++
++static int rtl8367_probe(struct platform_device *pdev)
++{
++	struct rtl8366_smi *smi;
++	int err;
++
++	smi = rtl8366_smi_probe(pdev);
++	if (IS_ERR(smi))
++		return PTR_ERR(smi);
++
++	smi->clk_delay = 1500;
++	smi->cmd_read = 0xb9;
++	smi->cmd_write = 0xb8;
++	smi->ops = &rtl8367_smi_ops;
++	smi->cpu_port = RTL8367_CPU_PORT_NUM;
++	smi->num_ports = RTL8367_NUM_PORTS;
++	smi->num_vlan_mc = RTL8367_NUM_VLANS;
++	smi->mib_counters = rtl8367_mib_counters;
++	smi->num_mib_counters = ARRAY_SIZE(rtl8367_mib_counters);
++
++	err = rtl8366_smi_init(smi);
++	if (err)
++		goto err_free_smi;
++
++	platform_set_drvdata(pdev, smi);
++
++	err = rtl8367_switch_init(smi);
++	if (err)
++		goto err_clear_drvdata;
++
++	return 0;
++
++ err_clear_drvdata:
++	platform_set_drvdata(pdev, NULL);
++	rtl8366_smi_cleanup(smi);
++ err_free_smi:
++	kfree(smi);
++	return err;
++}
++
++static int rtl8367_remove(struct platform_device *pdev)
++{
++	struct rtl8366_smi *smi = platform_get_drvdata(pdev);
++
++	if (smi) {
++		rtl8367_switch_cleanup(smi);
++		platform_set_drvdata(pdev, NULL);
++		rtl8366_smi_cleanup(smi);
++		kfree(smi);
++	}
++
++	return 0;
++}
++
++static void rtl8367_shutdown(struct platform_device *pdev)
++{
++	struct rtl8366_smi *smi = platform_get_drvdata(pdev);
++
++	if (smi)
++		rtl8367_reset_chip(smi);
++}
++
++#ifdef CONFIG_OF
++static const struct of_device_id rtl8367_match[] = {
++       { .compatible = "realtek,rtl8367" },
++       {},
++};
++MODULE_DEVICE_TABLE(of, rtl8367_match);
++#endif
++
++static struct platform_driver rtl8367_driver = {
++	.driver = {
++		.name		= RTL8367_DRIVER_NAME,
++		.owner		= THIS_MODULE,
++#ifdef CONFIG_OF
++		.of_match_table = of_match_ptr(rtl8367_match),
++#endif
++	},
++	.probe		= rtl8367_probe,
++	.remove		= rtl8367_remove,
++	.shutdown	= rtl8367_shutdown,
++};
++
++static int __init rtl8367_module_init(void)
++{
++	return platform_driver_register(&rtl8367_driver);
++}
++module_init(rtl8367_module_init);
++
++static void __exit rtl8367_module_exit(void)
++{
++	platform_driver_unregister(&rtl8367_driver);
++}
++module_exit(rtl8367_module_exit);
++
++MODULE_DESCRIPTION("Realtek RTL8367 ethernet switch driver");
++MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
++MODULE_LICENSE("GPL v2");
++MODULE_ALIAS("platform:" RTL8367_DRIVER_NAME);
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/rtl8367b.c b/target/linux/generic/files-5.4/drivers/net/phy/rtl8367b.c
+new file mode 100644
+index 0000000000..3599791a51
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/rtl8367b.c
+@@ -0,0 +1,1673 @@
++/*
++ * Platform driver for the Realtek RTL8367R-VB ethernet switches
++ *
++ * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/device.h>
++#include <linux/of.h>
++#include <linux/of_platform.h>
++#include <linux/delay.h>
++#include <linux/skbuff.h>
++#include <linux/rtl8367.h>
++
++#include "rtl8366_smi.h"
++
++#define RTL8367B_RESET_DELAY	1000	/* msecs*/
++
++#define RTL8367B_PHY_ADDR_MAX	8
++#define RTL8367B_PHY_REG_MAX	31
++
++#define RTL8367B_VID_MASK	0x3fff
++#define RTL8367B_FID_MASK	0xf
++#define RTL8367B_UNTAG_MASK	0xff
++#define RTL8367B_MEMBER_MASK	0xff
++
++#define RTL8367B_PORT_MISC_CFG_REG(_p)		(0x000e + 0x20 * (_p))
++#define   RTL8367B_PORT_MISC_CFG_EGRESS_MODE_SHIFT	4
++#define   RTL8367B_PORT_MISC_CFG_EGRESS_MODE_MASK	0x3
++#define   RTL8367B_PORT_MISC_CFG_EGRESS_MODE_ORIGINAL	0
++#define   RTL8367B_PORT_MISC_CFG_EGRESS_MODE_KEEP	1
++#define   RTL8367B_PORT_MISC_CFG_EGRESS_MODE_PRI	2
++#define   RTL8367B_PORT_MISC_CFG_EGRESS_MODE_REAL	3
++
++#define RTL8367B_BYPASS_LINE_RATE_REG		0x03f7
++
++#define RTL8367B_TA_CTRL_REG			0x0500 /*GOOD*/
++#define   RTL8367B_TA_CTRL_SPA_SHIFT		8
++#define   RTL8367B_TA_CTRL_SPA_MASK		0x7
++#define   RTL8367B_TA_CTRL_METHOD		BIT(4)/*GOOD*/
++#define   RTL8367B_TA_CTRL_CMD_SHIFT		3
++#define   RTL8367B_TA_CTRL_CMD_READ		0
++#define   RTL8367B_TA_CTRL_CMD_WRITE		1
++#define   RTL8367B_TA_CTRL_TABLE_SHIFT		0 /*GOOD*/
++#define   RTL8367B_TA_CTRL_TABLE_ACLRULE	1
++#define   RTL8367B_TA_CTRL_TABLE_ACLACT		2
++#define   RTL8367B_TA_CTRL_TABLE_CVLAN		3
++#define   RTL8367B_TA_CTRL_TABLE_L2		4
++#define   RTL8367B_TA_CTRL_CVLAN_READ \
++		((RTL8367B_TA_CTRL_CMD_READ << RTL8367B_TA_CTRL_CMD_SHIFT) | \
++		 RTL8367B_TA_CTRL_TABLE_CVLAN)
++#define   RTL8367B_TA_CTRL_CVLAN_WRITE \
++		((RTL8367B_TA_CTRL_CMD_WRITE << RTL8367B_TA_CTRL_CMD_SHIFT) | \
++		 RTL8367B_TA_CTRL_TABLE_CVLAN)
++
++#define RTL8367B_TA_ADDR_REG			0x0501/*GOOD*/
++#define   RTL8367B_TA_ADDR_MASK			0x3fff/*GOOD*/
++
++#define RTL8367B_TA_LUT_REG			0x0502/*GOOD*/
++
++#define RTL8367B_TA_WRDATA_REG(_x)		(0x0510 + (_x))/*GOOD*/
++#define   RTL8367B_TA_VLAN_NUM_WORDS		2
++#define   RTL8367B_TA_VLAN_VID_MASK		RTL8367B_VID_MASK
++#define   RTL8367B_TA_VLAN0_MEMBER_SHIFT	0
++#define   RTL8367B_TA_VLAN0_MEMBER_MASK		RTL8367B_MEMBER_MASK
++#define   RTL8367B_TA_VLAN0_UNTAG_SHIFT		8
++#define   RTL8367B_TA_VLAN0_UNTAG_MASK		RTL8367B_MEMBER_MASK
++#define   RTL8367B_TA_VLAN1_FID_SHIFT		0
++#define   RTL8367B_TA_VLAN1_FID_MASK		RTL8367B_FID_MASK
++
++#define RTL8367B_TA_RDDATA_REG(_x)		(0x0520 + (_x))/*GOOD*/
++
++#define RTL8367B_VLAN_PVID_CTRL_REG(_p)		(0x0700 + (_p) / 2) /*GOOD*/
++#define RTL8367B_VLAN_PVID_CTRL_MASK		0x1f /*GOOD*/
++#define RTL8367B_VLAN_PVID_CTRL_SHIFT(_p)	(8 * ((_p) % 2)) /*GOOD*/
++
++#define RTL8367B_VLAN_MC_BASE(_x)		(0x0728 + (_x) * 4) /*GOOD*/
++#define   RTL8367B_VLAN_MC_NUM_WORDS		4 /*GOOD*/
++#define   RTL8367B_VLAN_MC0_MEMBER_SHIFT	0/*GOOD*/
++#define   RTL8367B_VLAN_MC0_MEMBER_MASK		RTL8367B_MEMBER_MASK/*GOOD*/
++#define   RTL8367B_VLAN_MC1_FID_SHIFT		0/*GOOD*/
++#define   RTL8367B_VLAN_MC1_FID_MASK		RTL8367B_FID_MASK/*GOOD*/
++#define   RTL8367B_VLAN_MC3_EVID_SHIFT		0/*GOOD*/
++#define   RTL8367B_VLAN_MC3_EVID_MASK		RTL8367B_VID_MASK/*GOOD*/
++
++#define RTL8367B_VLAN_CTRL_REG			0x07a8 /*GOOD*/
++#define   RTL8367B_VLAN_CTRL_ENABLE		BIT(0)
++
++#define RTL8367B_VLAN_INGRESS_REG		0x07a9 /*GOOD*/
++
++#define RTL8367B_PORT_ISOLATION_REG(_p)		(0x08a2 + (_p)) /*GOOD*/
++
++#define RTL8367B_MIB_COUNTER_REG(_x)		(0x1000 + (_x))	/*GOOD*/
++#define RTL8367B_MIB_COUNTER_PORT_OFFSET	0x007c /*GOOD*/
++
++#define RTL8367B_MIB_ADDRESS_REG		0x1004 /*GOOD*/
++
++#define RTL8367B_MIB_CTRL0_REG(_x)		(0x1005 + (_x)) /*GOOD*/
++#define   RTL8367B_MIB_CTRL0_GLOBAL_RESET_MASK	BIT(11)	/*GOOD*/
++#define   RTL8367B_MIB_CTRL0_QM_RESET_MASK	BIT(10) /*GOOD*/
++#define   RTL8367B_MIB_CTRL0_PORT_RESET_MASK(_p) BIT(2 + (_p)) /*GOOD*/
++#define   RTL8367B_MIB_CTRL0_RESET_MASK		BIT(1) /*GOOD*/
++#define   RTL8367B_MIB_CTRL0_BUSY_MASK		BIT(0) /*GOOD*/
++
++#define RTL8367B_SWC0_REG			0x1200/*GOOD*/
++#define   RTL8367B_SWC0_MAX_LENGTH_SHIFT	13/*GOOD*/
++#define   RTL8367B_SWC0_MAX_LENGTH(_x)		((_x) << 13) /*GOOD*/
++#define   RTL8367B_SWC0_MAX_LENGTH_MASK		RTL8367B_SWC0_MAX_LENGTH(0x3)
++#define   RTL8367B_SWC0_MAX_LENGTH_1522		RTL8367B_SWC0_MAX_LENGTH(0)
++#define   RTL8367B_SWC0_MAX_LENGTH_1536		RTL8367B_SWC0_MAX_LENGTH(1)
++#define   RTL8367B_SWC0_MAX_LENGTH_1552		RTL8367B_SWC0_MAX_LENGTH(2)
++#define   RTL8367B_SWC0_MAX_LENGTH_16000	RTL8367B_SWC0_MAX_LENGTH(3)
++
++#define RTL8367B_CHIP_NUMBER_REG		0x1300/*GOOD*/
++
++#define RTL8367B_CHIP_VER_REG			0x1301/*GOOD*/
++#define   RTL8367B_CHIP_VER_RLVID_SHIFT		12/*GOOD*/
++#define   RTL8367B_CHIP_VER_RLVID_MASK		0xf/*GOOD*/
++#define   RTL8367B_CHIP_VER_MCID_SHIFT		8/*GOOD*/
++#define   RTL8367B_CHIP_VER_MCID_MASK		0xf/*GOOD*/
++#define   RTL8367B_CHIP_VER_BOID_SHIFT		4/*GOOD*/
++#define   RTL8367B_CHIP_VER_BOID_MASK		0xf/*GOOD*/
++#define   RTL8367B_CHIP_VER_AFE_SHIFT		0/*GOOD*/
++#define   RTL8367B_CHIP_VER_AFE_MASK		0x1/*GOOD*/
++
++#define RTL8367B_CHIP_MODE_REG			0x1302
++#define   RTL8367B_CHIP_MODE_MASK		0x7
++
++#define RTL8367B_CHIP_DEBUG0_REG		0x1303
++#define   RTL8367B_DEBUG0_SEL33(_x)		BIT(8 + (_x))
++#define   RTL8367B_DEBUG0_DRI_OTHER		BIT(7)
++#define   RTL8367B_DEBUG0_DRI_RG(_x)		BIT(5 + (_x))
++#define   RTL8367B_DEBUG0_DRI(_x)		BIT(3 + (_x))
++#define   RTL8367B_DEBUG0_SLR_OTHER		BIT(2)
++#define   RTL8367B_DEBUG0_SLR(_x)		BIT(_x)
++
++#define RTL8367B_CHIP_DEBUG1_REG		0x1304
++#define   RTL8367B_DEBUG1_DN_MASK(_x)		\
++	    GENMASK(6 + (_x)*8, 4 + (_x)*8)
++#define   RTL8367B_DEBUG1_DN_SHIFT(_x)		(4 + (_x) * 8)
++#define   RTL8367B_DEBUG1_DP_MASK(_x)		\
++	    GENMASK(2 + (_x) * 8, (_x) * 8)
++#define   RTL8367B_DEBUG1_DP_SHIFT(_x)		((_x) * 8)
++
++#define RTL8367B_CHIP_DEBUG2_REG		0x13e2
++#define   RTL8367B_DEBUG2_RG2_DN_MASK		GENMASK(8, 6)
++#define   RTL8367B_DEBUG2_RG2_DN_SHIFT		6
++#define   RTL8367B_DEBUG2_RG2_DP_MASK		GENMASK(5, 3)
++#define   RTL8367B_DEBUG2_RG2_DP_SHIFT		3
++#define   RTL8367B_DEBUG2_DRI_EXT2_RG		BIT(2)
++#define   RTL8367B_DEBUG2_DRI_EXT2		BIT(1)
++#define   RTL8367B_DEBUG2_SLR_EXT2		BIT(0)
++
++#define RTL8367B_DIS_REG			0x1305
++#define   RTL8367B_DIS_SKIP_MII_RXER(_x)	BIT(12 + (_x))
++#define   RTL8367B_DIS_RGMII_SHIFT(_x)		(4 * (_x))
++#define   RTL8367B_DIS_RGMII_MASK		0x7
++
++#define RTL8367B_DIS2_REG			0x13c3
++#define   RTL8367B_DIS2_SKIP_MII_RXER_SHIFT	4
++#define   RTL8367B_DIS2_SKIP_MII_RXER		0x10
++#define   RTL8367B_DIS2_RGMII_SHIFT		0
++#define   RTL8367B_DIS2_RGMII_MASK		0xf
++
++#define RTL8367B_EXT_RGMXF_REG(_x)		\
++	  ((_x) == 2 ? 0x13c5 : 0x1306 + (_x))
++#define   RTL8367B_EXT_RGMXF_DUMMY0_SHIFT	5
++#define   RTL8367B_EXT_RGMXF_DUMMY0_MASK	0x7ff
++#define   RTL8367B_EXT_RGMXF_TXDELAY_SHIFT	3
++#define   RTL8367B_EXT_RGMXF_TXDELAY_MASK	1
++#define   RTL8367B_EXT_RGMXF_RXDELAY_MASK	0x7
++
++#define RTL8367B_DI_FORCE_REG(_x)		\
++	  ((_x) == 2 ? 0x13c4 : 0x1310 + (_x))
++#define   RTL8367B_DI_FORCE_MODE		BIT(12)
++#define   RTL8367B_DI_FORCE_NWAY		BIT(7)
++#define   RTL8367B_DI_FORCE_TXPAUSE		BIT(6)
++#define   RTL8367B_DI_FORCE_RXPAUSE		BIT(5)
++#define   RTL8367B_DI_FORCE_LINK		BIT(4)
++#define   RTL8367B_DI_FORCE_DUPLEX		BIT(2)
++#define   RTL8367B_DI_FORCE_SPEED_MASK		3
++#define   RTL8367B_DI_FORCE_SPEED_10		0
++#define   RTL8367B_DI_FORCE_SPEED_100		1
++#define   RTL8367B_DI_FORCE_SPEED_1000		2
++
++#define RTL8367B_MAC_FORCE_REG(_x)		(0x1312 + (_x))
++
++#define RTL8367B_CHIP_RESET_REG			0x1322 /*GOOD*/
++#define   RTL8367B_CHIP_RESET_SW		BIT(1) /*GOOD*/
++#define   RTL8367B_CHIP_RESET_HW		BIT(0) /*GOOD*/
++
++#define RTL8367B_PORT_STATUS_REG(_p)		(0x1352 + (_p)) /*GOOD*/
++#define   RTL8367B_PORT_STATUS_EN_1000_SPI	BIT(11) /*GOOD*/
++#define   RTL8367B_PORT_STATUS_EN_100_SPI	BIT(10)/*GOOD*/
++#define   RTL8367B_PORT_STATUS_NWAY_FAULT	BIT(9)/*GOOD*/
++#define   RTL8367B_PORT_STATUS_LINK_MASTER	BIT(8)/*GOOD*/
++#define   RTL8367B_PORT_STATUS_NWAY		BIT(7)/*GOOD*/
++#define   RTL8367B_PORT_STATUS_TXPAUSE		BIT(6)/*GOOD*/
++#define   RTL8367B_PORT_STATUS_RXPAUSE		BIT(5)/*GOOD*/
++#define   RTL8367B_PORT_STATUS_LINK		BIT(4)/*GOOD*/
++#define   RTL8367B_PORT_STATUS_DUPLEX		BIT(2)/*GOOD*/
++#define   RTL8367B_PORT_STATUS_SPEED_MASK	0x0003/*GOOD*/
++#define   RTL8367B_PORT_STATUS_SPEED_10		0/*GOOD*/
++#define   RTL8367B_PORT_STATUS_SPEED_100	1/*GOOD*/
++#define   RTL8367B_PORT_STATUS_SPEED_1000	2/*GOOD*/
++
++#define RTL8367B_RTL_MAGIC_ID_REG		0x13c2
++#define   RTL8367B_RTL_MAGIC_ID_VAL		0x0249
++
++#define RTL8367B_IA_CTRL_REG			0x1f00
++#define   RTL8367B_IA_CTRL_RW(_x)		((_x) << 1)
++#define   RTL8367B_IA_CTRL_RW_READ		RTL8367B_IA_CTRL_RW(0)
++#define   RTL8367B_IA_CTRL_RW_WRITE		RTL8367B_IA_CTRL_RW(1)
++#define   RTL8367B_IA_CTRL_CMD_MASK		BIT(0)
++
++#define RTL8367B_IA_STATUS_REG			0x1f01
++#define   RTL8367B_IA_STATUS_PHY_BUSY		BIT(2)
++#define   RTL8367B_IA_STATUS_SDS_BUSY		BIT(1)
++#define   RTL8367B_IA_STATUS_MDX_BUSY		BIT(0)
++
++#define RTL8367B_IA_ADDRESS_REG			0x1f02
++#define RTL8367B_IA_WRITE_DATA_REG		0x1f03
++#define RTL8367B_IA_READ_DATA_REG		0x1f04
++
++#define RTL8367B_INTERNAL_PHY_REG(_a, _r)	(0x2000 + 32 * (_a) + (_r))
++
++#define RTL8367B_NUM_MIB_COUNTERS	58
++
++#define RTL8367B_CPU_PORT_NUM		5
++#define RTL8367B_NUM_PORTS		8
++#define RTL8367B_NUM_VLANS		32
++#define RTL8367B_NUM_VIDS		4096
++#define RTL8367B_PRIORITYMAX		7
++#define RTL8367B_FIDMAX			7
++
++#define RTL8367B_PORT_0			BIT(0)
++#define RTL8367B_PORT_1			BIT(1)
++#define RTL8367B_PORT_2			BIT(2)
++#define RTL8367B_PORT_3			BIT(3)
++#define RTL8367B_PORT_4			BIT(4)
++#define RTL8367B_PORT_E0		BIT(5)	/* External port 0 */
++#define RTL8367B_PORT_E1		BIT(6)	/* External port 1 */
++#define RTL8367B_PORT_E2		BIT(7)	/* External port 2 */
++
++#define RTL8367B_PORTS_ALL					\
++	(RTL8367B_PORT_0 | RTL8367B_PORT_1 | RTL8367B_PORT_2 |	\
++	 RTL8367B_PORT_3 | RTL8367B_PORT_4 | RTL8367B_PORT_E0 | \
++	 RTL8367B_PORT_E1 | RTL8367B_PORT_E2)
++
++#define RTL8367B_PORTS_ALL_BUT_CPU				\
++	(RTL8367B_PORT_0 | RTL8367B_PORT_1 | RTL8367B_PORT_2 |	\
++	 RTL8367B_PORT_3 | RTL8367B_PORT_4 | RTL8367B_PORT_E1 |	\
++	 RTL8367B_PORT_E2)
++
++struct rtl8367b_initval {
++	u16 reg;
++	u16 val;
++};
++
++#define RTL8367B_MIB_RXB_ID		0	/* IfInOctets */
++#define RTL8367B_MIB_TXB_ID		28	/* IfOutOctets */
++
++static struct rtl8366_mib_counter
++rtl8367b_mib_counters[RTL8367B_NUM_MIB_COUNTERS] = {
++	{0,   0, 4, "ifInOctets"			},
++	{0,   4, 2, "dot3StatsFCSErrors"		},
++	{0,   6, 2, "dot3StatsSymbolErrors"		},
++	{0,   8, 2, "dot3InPauseFrames"			},
++	{0,  10, 2, "dot3ControlInUnknownOpcodes"	},
++	{0,  12, 2, "etherStatsFragments"		},
++	{0,  14, 2, "etherStatsJabbers"			},
++	{0,  16, 2, "ifInUcastPkts"			},
++	{0,  18, 2, "etherStatsDropEvents"		},
++	{0,  20, 2, "ifInMulticastPkts"			},
++	{0,  22, 2, "ifInBroadcastPkts"			},
++	{0,  24, 2, "inMldChecksumError"		},
++	{0,  26, 2, "inIgmpChecksumError"		},
++	{0,  28, 2, "inMldSpecificQuery"		},
++	{0,  30, 2, "inMldGeneralQuery"			},
++	{0,  32, 2, "inIgmpSpecificQuery"		},
++	{0,  34, 2, "inIgmpGeneralQuery"		},
++	{0,  36, 2, "inMldLeaves"			},
++	{0,  38, 2, "inIgmpLeaves"			},
++
++	{0,  40, 4, "etherStatsOctets"			},
++	{0,  44, 2, "etherStatsUnderSizePkts"		},
++	{0,  46, 2, "etherOversizeStats"		},
++	{0,  48, 2, "etherStatsPkts64Octets"		},
++	{0,  50, 2, "etherStatsPkts65to127Octets"	},
++	{0,  52, 2, "etherStatsPkts128to255Octets"	},
++	{0,  54, 2, "etherStatsPkts256to511Octets"	},
++	{0,  56, 2, "etherStatsPkts512to1023Octets"	},
++	{0,  58, 2, "etherStatsPkts1024to1518Octets"	},
++
++	{0,  60, 4, "ifOutOctets"			},
++	{0,  64, 2, "dot3StatsSingleCollisionFrames"	},
++	{0,  66, 2, "dot3StatMultipleCollisionFrames"	},
++	{0,  68, 2, "dot3sDeferredTransmissions"	},
++	{0,  70, 2, "dot3StatsLateCollisions"		},
++	{0,  72, 2, "etherStatsCollisions"		},
++	{0,  74, 2, "dot3StatsExcessiveCollisions"	},
++	{0,  76, 2, "dot3OutPauseFrames"		},
++	{0,  78, 2, "ifOutDiscards"			},
++	{0,  80, 2, "dot1dTpPortInDiscards"		},
++	{0,  82, 2, "ifOutUcastPkts"			},
++	{0,  84, 2, "ifOutMulticastPkts"		},
++	{0,  86, 2, "ifOutBroadcastPkts"		},
++	{0,  88, 2, "outOampduPkts"			},
++	{0,  90, 2, "inOampduPkts"			},
++	{0,  92, 2, "inIgmpJoinsSuccess"		},
++	{0,  94, 2, "inIgmpJoinsFail"			},
++	{0,  96, 2, "inMldJoinsSuccess"			},
++	{0,  98, 2, "inMldJoinsFail"			},
++	{0, 100, 2, "inReportSuppressionDrop"		},
++	{0, 102, 2, "inLeaveSuppressionDrop"		},
++	{0, 104, 2, "outIgmpReports"			},
++	{0, 106, 2, "outIgmpLeaves"			},
++	{0, 108, 2, "outIgmpGeneralQuery"		},
++	{0, 110, 2, "outIgmpSpecificQuery"		},
++	{0, 112, 2, "outMldReports"			},
++	{0, 114, 2, "outMldLeaves"			},
++	{0, 116, 2, "outMldGeneralQuery"		},
++	{0, 118, 2, "outMldSpecificQuery"		},
++	{0, 120, 2, "inKnownMulticastPkts"		},
++};
++
++#define REG_RD(_smi, _reg, _val)					\
++	do {								\
++		err = rtl8366_smi_read_reg(_smi, _reg, _val);		\
++		if (err)						\
++			return err;					\
++	} while (0)
++
++#define REG_WR(_smi, _reg, _val)					\
++	do {								\
++		err = rtl8366_smi_write_reg(_smi, _reg, _val);		\
++		if (err)						\
++			return err;					\
++	} while (0)
++
++#define REG_RMW(_smi, _reg, _mask, _val)				\
++	do {								\
++		err = rtl8366_smi_rmwr(_smi, _reg, _mask, _val);	\
++		if (err)						\
++			return err;					\
++	} while (0)
++
++static const struct rtl8367b_initval rtl8367r_vb_initvals_0[] = {
++	{0x1B03, 0x0876}, {0x1200, 0x7FC4}, {0x0301, 0x0026}, {0x1722, 0x0E14},
++	{0x205F, 0x0002}, {0x2059, 0x1A00}, {0x205F, 0x0000}, {0x207F, 0x0002},
++	{0x2077, 0x0000}, {0x2078, 0x0000}, {0x2079, 0x0000}, {0x207A, 0x0000},
++	{0x207B, 0x0000}, {0x207F, 0x0000}, {0x205F, 0x0002}, {0x2053, 0x0000},
++	{0x2054, 0x0000}, {0x2055, 0x0000}, {0x2056, 0x0000}, {0x2057, 0x0000},
++	{0x205F, 0x0000}, {0x12A4, 0x110A}, {0x12A6, 0x150A}, {0x13F1, 0x0013},
++	{0x13F4, 0x0010}, {0x13F5, 0x0000}, {0x0018, 0x0F00}, {0x0038, 0x0F00},
++	{0x0058, 0x0F00}, {0x0078, 0x0F00}, {0x0098, 0x0F00}, {0x12B6, 0x0C02},
++	{0x12B7, 0x030F}, {0x12B8, 0x11FF}, {0x12BC, 0x0004}, {0x1362, 0x0115},
++	{0x1363, 0x0002}, {0x1363, 0x0000}, {0x133F, 0x0030}, {0x133E, 0x000E},
++	{0x221F, 0x0007}, {0x221E, 0x002D}, {0x2218, 0xF030}, {0x221F, 0x0007},
++	{0x221E, 0x0023}, {0x2216, 0x0005}, {0x2215, 0x00B9}, {0x2219, 0x0044},
++	{0x2215, 0x00BA}, {0x2219, 0x0020}, {0x2215, 0x00BB}, {0x2219, 0x00C1},
++	{0x2215, 0x0148}, {0x2219, 0x0096}, {0x2215, 0x016E}, {0x2219, 0x0026},
++	{0x2216, 0x0000}, {0x2216, 0x0000}, {0x221E, 0x002D}, {0x2218, 0xF010},
++	{0x221F, 0x0007}, {0x221E, 0x0020}, {0x2215, 0x0D00}, {0x221F, 0x0000},
++	{0x221F, 0x0000}, {0x2217, 0x2160}, {0x221F, 0x0001}, {0x2210, 0xF25E},
++	{0x221F, 0x0007}, {0x221E, 0x0042}, {0x2215, 0x0F00}, {0x2215, 0x0F00},
++	{0x2216, 0x7408}, {0x2215, 0x0E00}, {0x2215, 0x0F00}, {0x2215, 0x0F01},
++	{0x2216, 0x4000}, {0x2215, 0x0E01}, {0x2215, 0x0F01}, {0x2215, 0x0F02},
++	{0x2216, 0x9400}, {0x2215, 0x0E02}, {0x2215, 0x0F02}, {0x2215, 0x0F03},
++	{0x2216, 0x7408}, {0x2215, 0x0E03}, {0x2215, 0x0F03}, {0x2215, 0x0F04},
++	{0x2216, 0x4008}, {0x2215, 0x0E04}, {0x2215, 0x0F04}, {0x2215, 0x0F05},
++	{0x2216, 0x9400}, {0x2215, 0x0E05}, {0x2215, 0x0F05}, {0x2215, 0x0F06},
++	{0x2216, 0x0803}, {0x2215, 0x0E06}, {0x2215, 0x0F06}, {0x2215, 0x0D00},
++	{0x2215, 0x0100}, {0x221F, 0x0001}, {0x2210, 0xF05E}, {0x221F, 0x0000},
++	{0x2217, 0x2100}, {0x221F, 0x0000}, {0x220D, 0x0003}, {0x220E, 0x0015},
++	{0x220D, 0x4003}, {0x220E, 0x0006}, {0x221F, 0x0000}, {0x2200, 0x1340},
++	{0x133F, 0x0010}, {0x12A0, 0x0058}, {0x12A1, 0x0058}, {0x133E, 0x000E},
++	{0x133F, 0x0030}, {0x221F, 0x0000}, {0x2210, 0x0166}, {0x221F, 0x0000},
++	{0x133E, 0x000E}, {0x133F, 0x0010}, {0x133F, 0x0030}, {0x133E, 0x000E},
++	{0x221F, 0x0005}, {0x2205, 0xFFF6}, {0x2206, 0x0080}, {0x2205, 0x8B6E},
++	{0x2206, 0x0000}, {0x220F, 0x0100}, {0x2205, 0x8000}, {0x2206, 0x0280},
++	{0x2206, 0x28F7}, {0x2206, 0x00E0}, {0x2206, 0xFFF7}, {0x2206, 0xA080},
++	{0x2206, 0x02AE}, {0x2206, 0xF602}, {0x2206, 0x0153}, {0x2206, 0x0201},
++	{0x2206, 0x6602}, {0x2206, 0x80B9}, {0x2206, 0xE08B}, {0x2206, 0x8CE1},
++	{0x2206, 0x8B8D}, {0x2206, 0x1E01}, {0x2206, 0xE18B}, {0x2206, 0x8E1E},
++	{0x2206, 0x01A0}, {0x2206, 0x00E7}, {0x2206, 0xAEDB}, {0x2206, 0xEEE0},
++	{0x2206, 0x120E}, {0x2206, 0xEEE0}, {0x2206, 0x1300}, {0x2206, 0xEEE0},
++	{0x2206, 0x2001}, {0x2206, 0xEEE0}, {0x2206, 0x2166}, {0x2206, 0xEEE0},
++	{0x2206, 0xC463}, {0x2206, 0xEEE0}, {0x2206, 0xC5E8}, {0x2206, 0xEEE0},
++	{0x2206, 0xC699}, {0x2206, 0xEEE0}, {0x2206, 0xC7C2}, {0x2206, 0xEEE0},
++	{0x2206, 0xC801}, {0x2206, 0xEEE0}, {0x2206, 0xC913}, {0x2206, 0xEEE0},
++	{0x2206, 0xCA30}, {0x2206, 0xEEE0}, {0x2206, 0xCB3E}, {0x2206, 0xEEE0},
++	{0x2206, 0xDCE1}, {0x2206, 0xEEE0}, {0x2206, 0xDD00}, {0x2206, 0xEEE2},
++	{0x2206, 0x0001}, {0x2206, 0xEEE2}, {0x2206, 0x0100}, {0x2206, 0xEEE4},
++	{0x2206, 0x8860}, {0x2206, 0xEEE4}, {0x2206, 0x8902}, {0x2206, 0xEEE4},
++	{0x2206, 0x8C00}, {0x2206, 0xEEE4}, {0x2206, 0x8D30}, {0x2206, 0xEEEA},
++	{0x2206, 0x1480}, {0x2206, 0xEEEA}, {0x2206, 0x1503}, {0x2206, 0xEEEA},
++	{0x2206, 0xC600}, {0x2206, 0xEEEA}, {0x2206, 0xC706}, {0x2206, 0xEE85},
++	{0x2206, 0xEE00}, {0x2206, 0xEE85}, {0x2206, 0xEF00}, {0x2206, 0xEE8B},
++	{0x2206, 0x6750}, {0x2206, 0xEE8B}, {0x2206, 0x6632}, {0x2206, 0xEE8A},
++	{0x2206, 0xD448}, {0x2206, 0xEE8A}, {0x2206, 0xD548}, {0x2206, 0xEE8A},
++	{0x2206, 0xD649}, {0x2206, 0xEE8A}, {0x2206, 0xD7F8}, {0x2206, 0xEE8B},
++	{0x2206, 0x85E2}, {0x2206, 0xEE8B}, {0x2206, 0x8700}, {0x2206, 0xEEFF},
++	{0x2206, 0xF600}, {0x2206, 0xEEFF}, {0x2206, 0xF7FC}, {0x2206, 0x04F8},
++	{0x2206, 0xE08B}, {0x2206, 0x8EAD}, {0x2206, 0x2023}, {0x2206, 0xF620},
++	{0x2206, 0xE48B}, {0x2206, 0x8E02}, {0x2206, 0x2877}, {0x2206, 0x0225},
++	{0x2206, 0xC702}, {0x2206, 0x26A1}, {0x2206, 0x0281}, {0x2206, 0xB302},
++	{0x2206, 0x8496}, {0x2206, 0x0202}, {0x2206, 0xA102}, {0x2206, 0x27F1},
++	{0x2206, 0x0228}, {0x2206, 0xF902}, {0x2206, 0x2AA0}, {0x2206, 0x0282},
++	{0x2206, 0xB8E0}, {0x2206, 0x8B8E}, {0x2206, 0xAD21}, {0x2206, 0x08F6},
++	{0x2206, 0x21E4}, {0x2206, 0x8B8E}, {0x2206, 0x0202}, {0x2206, 0x80E0},
++	{0x2206, 0x8B8E}, {0x2206, 0xAD22}, {0x2206, 0x05F6}, {0x2206, 0x22E4},
++	{0x2206, 0x8B8E}, {0x2206, 0xE08B}, {0x2206, 0x8EAD}, {0x2206, 0x2305},
++	{0x2206, 0xF623}, {0x2206, 0xE48B}, {0x2206, 0x8EE0}, {0x2206, 0x8B8E},
++	{0x2206, 0xAD24}, {0x2206, 0x08F6}, {0x2206, 0x24E4}, {0x2206, 0x8B8E},
++	{0x2206, 0x0227}, {0x2206, 0x6AE0}, {0x2206, 0x8B8E}, {0x2206, 0xAD25},
++	{0x2206, 0x05F6}, {0x2206, 0x25E4}, {0x2206, 0x8B8E}, {0x2206, 0xE08B},
++	{0x2206, 0x8EAD}, {0x2206, 0x260B}, {0x2206, 0xF626}, {0x2206, 0xE48B},
++	{0x2206, 0x8E02}, {0x2206, 0x830D}, {0x2206, 0x021D}, {0x2206, 0x6BE0},
++	{0x2206, 0x8B8E}, {0x2206, 0xAD27}, {0x2206, 0x05F6}, {0x2206, 0x27E4},
++	{0x2206, 0x8B8E}, {0x2206, 0x0281}, {0x2206, 0x4402}, {0x2206, 0x045C},
++	{0x2206, 0xFC04}, {0x2206, 0xF8E0}, {0x2206, 0x8B83}, {0x2206, 0xAD23},
++	{0x2206, 0x30E0}, {0x2206, 0xE022}, {0x2206, 0xE1E0}, {0x2206, 0x2359},
++	{0x2206, 0x02E0}, {0x2206, 0x85EF}, {0x2206, 0xE585}, {0x2206, 0xEFAC},
++	{0x2206, 0x2907}, {0x2206, 0x1F01}, {0x2206, 0x9E51}, {0x2206, 0xAD29},
++	{0x2206, 0x20E0}, {0x2206, 0x8B83}, {0x2206, 0xAD21}, {0x2206, 0x06E1},
++	{0x2206, 0x8B84}, {0x2206, 0xAD28}, {0x2206, 0x42E0}, {0x2206, 0x8B85},
++	{0x2206, 0xAD21}, {0x2206, 0x06E1}, {0x2206, 0x8B84}, {0x2206, 0xAD29},
++	{0x2206, 0x36BF}, {0x2206, 0x34BF}, {0x2206, 0x022C}, {0x2206, 0x31AE},
++	{0x2206, 0x2EE0}, {0x2206, 0x8B83}, {0x2206, 0xAD21}, {0x2206, 0x10E0},
++	{0x2206, 0x8B84}, {0x2206, 0xF620}, {0x2206, 0xE48B}, {0x2206, 0x84EE},
++	{0x2206, 0x8ADA}, {0x2206, 0x00EE}, {0x2206, 0x8ADB}, {0x2206, 0x00E0},
++	{0x2206, 0x8B85}, {0x2206, 0xAD21}, {0x2206, 0x0CE0}, {0x2206, 0x8B84},
++	{0x2206, 0xF621}, {0x2206, 0xE48B}, {0x2206, 0x84EE}, {0x2206, 0x8B72},
++	{0x2206, 0xFFBF}, {0x2206, 0x34C2}, {0x2206, 0x022C}, {0x2206, 0x31FC},
++	{0x2206, 0x04F8}, {0x2206, 0xFAEF}, {0x2206, 0x69E0}, {0x2206, 0x8B85},
++	{0x2206, 0xAD21}, {0x2206, 0x42E0}, {0x2206, 0xE022}, {0x2206, 0xE1E0},
++	{0x2206, 0x2358}, {0x2206, 0xC059}, {0x2206, 0x021E}, {0x2206, 0x01E1},
++	{0x2206, 0x8B72}, {0x2206, 0x1F10}, {0x2206, 0x9E2F}, {0x2206, 0xE48B},
++	{0x2206, 0x72AD}, {0x2206, 0x2123}, {0x2206, 0xE18B}, {0x2206, 0x84F7},
++	{0x2206, 0x29E5}, {0x2206, 0x8B84}, {0x2206, 0xAC27}, {0x2206, 0x10AC},
++	{0x2206, 0x2605}, {0x2206, 0x0205}, {0x2206, 0x23AE}, {0x2206, 0x1602},
++	{0x2206, 0x0535}, {0x2206, 0x0282}, {0x2206, 0x30AE}, {0x2206, 0x0E02},
++	{0x2206, 0x056A}, {0x2206, 0x0282}, {0x2206, 0x75AE}, {0x2206, 0x0602},
++	{0x2206, 0x04DC}, {0x2206, 0x0282}, {0x2206, 0x04EF}, {0x2206, 0x96FE},
++	{0x2206, 0xFC04}, {0x2206, 0xF8F9}, {0x2206, 0xE08B}, {0x2206, 0x87AD},
++	{0x2206, 0x2321}, {0x2206, 0xE0EA}, {0x2206, 0x14E1}, {0x2206, 0xEA15},
++	{0x2206, 0xAD26}, {0x2206, 0x18F6}, {0x2206, 0x27E4}, {0x2206, 0xEA14},
++	{0x2206, 0xE5EA}, {0x2206, 0x15F6}, {0x2206, 0x26E4}, {0x2206, 0xEA14},
++	{0x2206, 0xE5EA}, {0x2206, 0x15F7}, {0x2206, 0x27E4}, {0x2206, 0xEA14},
++	{0x2206, 0xE5EA}, {0x2206, 0x15FD}, {0x2206, 0xFC04}, {0x2206, 0xF8F9},
++	{0x2206, 0xE08B}, {0x2206, 0x87AD}, {0x2206, 0x233A}, {0x2206, 0xAD22},
++	{0x2206, 0x37E0}, {0x2206, 0xE020}, {0x2206, 0xE1E0}, {0x2206, 0x21AC},
++	{0x2206, 0x212E}, {0x2206, 0xE0EA}, {0x2206, 0x14E1}, {0x2206, 0xEA15},
++	{0x2206, 0xF627}, {0x2206, 0xE4EA}, {0x2206, 0x14E5}, {0x2206, 0xEA15},
++	{0x2206, 0xE2EA}, {0x2206, 0x12E3}, {0x2206, 0xEA13}, {0x2206, 0x5A8F},
++	{0x2206, 0x6A20}, {0x2206, 0xE6EA}, {0x2206, 0x12E7}, {0x2206, 0xEA13},
++	{0x2206, 0xF726}, {0x2206, 0xE4EA}, {0x2206, 0x14E5}, {0x2206, 0xEA15},
++	{0x2206, 0xF727}, {0x2206, 0xE4EA}, {0x2206, 0x14E5}, {0x2206, 0xEA15},
++	{0x2206, 0xFDFC}, {0x2206, 0x04F8}, {0x2206, 0xF9E0}, {0x2206, 0x8B87},
++	{0x2206, 0xAD23}, {0x2206, 0x38AD}, {0x2206, 0x2135}, {0x2206, 0xE0E0},
++	{0x2206, 0x20E1}, {0x2206, 0xE021}, {0x2206, 0xAC21}, {0x2206, 0x2CE0},
++	{0x2206, 0xEA14}, {0x2206, 0xE1EA}, {0x2206, 0x15F6}, {0x2206, 0x27E4},
++	{0x2206, 0xEA14}, {0x2206, 0xE5EA}, {0x2206, 0x15E2}, {0x2206, 0xEA12},
++	{0x2206, 0xE3EA}, {0x2206, 0x135A}, {0x2206, 0x8FE6}, {0x2206, 0xEA12},
++	{0x2206, 0xE7EA}, {0x2206, 0x13F7}, {0x2206, 0x26E4}, {0x2206, 0xEA14},
++	{0x2206, 0xE5EA}, {0x2206, 0x15F7}, {0x2206, 0x27E4}, {0x2206, 0xEA14},
++	{0x2206, 0xE5EA}, {0x2206, 0x15FD}, {0x2206, 0xFC04}, {0x2206, 0xF8FA},
++	{0x2206, 0xEF69}, {0x2206, 0xE08B}, {0x2206, 0x86AD}, {0x2206, 0x2146},
++	{0x2206, 0xE0E0}, {0x2206, 0x22E1}, {0x2206, 0xE023}, {0x2206, 0x58C0},
++	{0x2206, 0x5902}, {0x2206, 0x1E01}, {0x2206, 0xE18B}, {0x2206, 0x651F},
++	{0x2206, 0x109E}, {0x2206, 0x33E4}, {0x2206, 0x8B65}, {0x2206, 0xAD21},
++	{0x2206, 0x22AD}, {0x2206, 0x272A}, {0x2206, 0xD400}, {0x2206, 0x01BF},
++	{0x2206, 0x34F2}, {0x2206, 0x022C}, {0x2206, 0xA2BF}, {0x2206, 0x34F5},
++	{0x2206, 0x022C}, {0x2206, 0xE0E0}, {0x2206, 0x8B67}, {0x2206, 0x1B10},
++	{0x2206, 0xAA14}, {0x2206, 0xE18B}, {0x2206, 0x660D}, {0x2206, 0x1459},
++	{0x2206, 0x0FAE}, {0x2206, 0x05E1}, {0x2206, 0x8B66}, {0x2206, 0x590F},
++	{0x2206, 0xBF85}, {0x2206, 0x6102}, {0x2206, 0x2CA2}, {0x2206, 0xEF96},
++	{0x2206, 0xFEFC}, {0x2206, 0x04F8}, {0x2206, 0xF9FA}, {0x2206, 0xFBEF},
++	{0x2206, 0x79E2}, {0x2206, 0x8AD2}, {0x2206, 0xAC19}, {0x2206, 0x2DE0},
++	{0x2206, 0xE036}, {0x2206, 0xE1E0}, {0x2206, 0x37EF}, {0x2206, 0x311F},
++	{0x2206, 0x325B}, {0x2206, 0x019E}, {0x2206, 0x1F7A}, {0x2206, 0x0159},
++	{0x2206, 0x019F}, {0x2206, 0x0ABF}, {0x2206, 0x348E}, {0x2206, 0x022C},
++	{0x2206, 0x31F6}, {0x2206, 0x06AE}, {0x2206, 0x0FF6}, {0x2206, 0x0302},
++	{0x2206, 0x0470}, {0x2206, 0xF703}, {0x2206, 0xF706}, {0x2206, 0xBF34},
++	{0x2206, 0x9302}, {0x2206, 0x2C31}, {0x2206, 0xAC1A}, {0x2206, 0x25E0},
++	{0x2206, 0xE022}, {0x2206, 0xE1E0}, {0x2206, 0x23EF}, {0x2206, 0x300D},
++	{0x2206, 0x311F}, {0x2206, 0x325B}, {0x2206, 0x029E}, {0x2206, 0x157A},
++	{0x2206, 0x0258}, {0x2206, 0xC4A0}, {0x2206, 0x0408}, {0x2206, 0xBF34},
++	{0x2206, 0x9E02}, {0x2206, 0x2C31}, {0x2206, 0xAE06}, {0x2206, 0xBF34},
++	{0x2206, 0x9C02}, {0x2206, 0x2C31}, {0x2206, 0xAC1B}, {0x2206, 0x4AE0},
++	{0x2206, 0xE012}, {0x2206, 0xE1E0}, {0x2206, 0x13EF}, {0x2206, 0x300D},
++	{0x2206, 0x331F}, {0x2206, 0x325B}, {0x2206, 0x1C9E}, {0x2206, 0x3AEF},
++	{0x2206, 0x325B}, {0x2206, 0x1C9F}, {0x2206, 0x09BF}, {0x2206, 0x3498},
++	{0x2206, 0x022C}, {0x2206, 0x3102}, {0x2206, 0x83C5}, {0x2206, 0x5A03},
++	{0x2206, 0x0D03}, {0x2206, 0x581C}, {0x2206, 0x1E20}, {0x2206, 0x0207},
++	{0x2206, 0xA0A0}, {0x2206, 0x000E}, {0x2206, 0x0284}, {0x2206, 0x17AD},
++	{0x2206, 0x1817}, {0x2206, 0xBF34}, {0x2206, 0x9A02}, {0x2206, 0x2C31},
++	{0x2206, 0xAE0F}, {0x2206, 0xBF34}, {0x2206, 0xC802}, {0x2206, 0x2C31},
++	{0x2206, 0xBF34}, {0x2206, 0xC502}, {0x2206, 0x2C31}, {0x2206, 0x0284},
++	{0x2206, 0x52E6}, {0x2206, 0x8AD2}, {0x2206, 0xEF97}, {0x2206, 0xFFFE},
++	{0x2206, 0xFDFC}, {0x2206, 0x04F8}, {0x2206, 0xBF34}, {0x2206, 0xDA02},
++	{0x2206, 0x2CE0}, {0x2206, 0xE58A}, {0x2206, 0xD3BF}, {0x2206, 0x34D4},
++	{0x2206, 0x022C}, {0x2206, 0xE00C}, {0x2206, 0x1159}, {0x2206, 0x02E0},
++	{0x2206, 0x8AD3}, {0x2206, 0x1E01}, {0x2206, 0xE48A}, {0x2206, 0xD3D1},
++	{0x2206, 0x00BF}, {0x2206, 0x34DA}, {0x2206, 0x022C}, {0x2206, 0xA2D1},
++	{0x2206, 0x01BF}, {0x2206, 0x34D4}, {0x2206, 0x022C}, {0x2206, 0xA2BF},
++	{0x2206, 0x34CB}, {0x2206, 0x022C}, {0x2206, 0xE0E5}, {0x2206, 0x8ACE},
++	{0x2206, 0xBF85}, {0x2206, 0x6702}, {0x2206, 0x2CE0}, {0x2206, 0xE58A},
++	{0x2206, 0xCFBF}, {0x2206, 0x8564}, {0x2206, 0x022C}, {0x2206, 0xE0E5},
++	{0x2206, 0x8AD0}, {0x2206, 0xBF85}, {0x2206, 0x6A02}, {0x2206, 0x2CE0},
++	{0x2206, 0xE58A}, {0x2206, 0xD1FC}, {0x2206, 0x04F8}, {0x2206, 0xE18A},
++	{0x2206, 0xD1BF}, {0x2206, 0x856A}, {0x2206, 0x022C}, {0x2206, 0xA2E1},
++	{0x2206, 0x8AD0}, {0x2206, 0xBF85}, {0x2206, 0x6402}, {0x2206, 0x2CA2},
++	{0x2206, 0xE18A}, {0x2206, 0xCFBF}, {0x2206, 0x8567}, {0x2206, 0x022C},
++	{0x2206, 0xA2E1}, {0x2206, 0x8ACE}, {0x2206, 0xBF34}, {0x2206, 0xCB02},
++	{0x2206, 0x2CA2}, {0x2206, 0xE18A}, {0x2206, 0xD3BF}, {0x2206, 0x34DA},
++	{0x2206, 0x022C}, {0x2206, 0xA2E1}, {0x2206, 0x8AD3}, {0x2206, 0x0D11},
++	{0x2206, 0xBF34}, {0x2206, 0xD402}, {0x2206, 0x2CA2}, {0x2206, 0xFC04},
++	{0x2206, 0xF9A0}, {0x2206, 0x0405}, {0x2206, 0xE38A}, {0x2206, 0xD4AE},
++	{0x2206, 0x13A0}, {0x2206, 0x0805}, {0x2206, 0xE38A}, {0x2206, 0xD5AE},
++	{0x2206, 0x0BA0}, {0x2206, 0x0C05}, {0x2206, 0xE38A}, {0x2206, 0xD6AE},
++	{0x2206, 0x03E3}, {0x2206, 0x8AD7}, {0x2206, 0xEF13}, {0x2206, 0xBF34},
++	{0x2206, 0xCB02}, {0x2206, 0x2CA2}, {0x2206, 0xEF13}, {0x2206, 0x0D11},
++	{0x2206, 0xBF85}, {0x2206, 0x6702}, {0x2206, 0x2CA2}, {0x2206, 0xEF13},
++	{0x2206, 0x0D14}, {0x2206, 0xBF85}, {0x2206, 0x6402}, {0x2206, 0x2CA2},
++	{0x2206, 0xEF13}, {0x2206, 0x0D17}, {0x2206, 0xBF85}, {0x2206, 0x6A02},
++	{0x2206, 0x2CA2}, {0x2206, 0xFD04}, {0x2206, 0xF8E0}, {0x2206, 0x8B85},
++	{0x2206, 0xAD27}, {0x2206, 0x2DE0}, {0x2206, 0xE036}, {0x2206, 0xE1E0},
++	{0x2206, 0x37E1}, {0x2206, 0x8B73}, {0x2206, 0x1F10}, {0x2206, 0x9E20},
++	{0x2206, 0xE48B}, {0x2206, 0x73AC}, {0x2206, 0x200B}, {0x2206, 0xAC21},
++	{0x2206, 0x0DAC}, {0x2206, 0x250F}, {0x2206, 0xAC27}, {0x2206, 0x0EAE},
++	{0x2206, 0x0F02}, {0x2206, 0x84CC}, {0x2206, 0xAE0A}, {0x2206, 0x0284},
++	{0x2206, 0xD1AE}, {0x2206, 0x05AE}, {0x2206, 0x0302}, {0x2206, 0x84D8},
++	{0x2206, 0xFC04}, {0x2206, 0xEE8B}, {0x2206, 0x6800}, {0x2206, 0x0402},
++	{0x2206, 0x84E5}, {0x2206, 0x0285}, {0x2206, 0x2804}, {0x2206, 0x0285},
++	{0x2206, 0x4904}, {0x2206, 0xEE8B}, {0x2206, 0x6800}, {0x2206, 0xEE8B},
++	{0x2206, 0x6902}, {0x2206, 0x04F8}, {0x2206, 0xF9E0}, {0x2206, 0x8B85},
++	{0x2206, 0xAD26}, {0x2206, 0x38D0}, {0x2206, 0x0B02}, {0x2206, 0x2B4D},
++	{0x2206, 0x5882}, {0x2206, 0x7882}, {0x2206, 0x9F2D}, {0x2206, 0xE08B},
++	{0x2206, 0x68E1}, {0x2206, 0x8B69}, {0x2206, 0x1F10}, {0x2206, 0x9EC8},
++	{0x2206, 0x10E4}, {0x2206, 0x8B68}, {0x2206, 0xE0E0}, {0x2206, 0x00E1},
++	{0x2206, 0xE001}, {0x2206, 0xF727}, {0x2206, 0xE4E0}, {0x2206, 0x00E5},
++	{0x2206, 0xE001}, {0x2206, 0xE2E0}, {0x2206, 0x20E3}, {0x2206, 0xE021},
++	{0x2206, 0xAD30}, {0x2206, 0xF7F6}, {0x2206, 0x27E4}, {0x2206, 0xE000},
++	{0x2206, 0xE5E0}, {0x2206, 0x01FD}, {0x2206, 0xFC04}, {0x2206, 0xF8FA},
++	{0x2206, 0xEF69}, {0x2206, 0xE08B}, {0x2206, 0x86AD}, {0x2206, 0x2212},
++	{0x2206, 0xE0E0}, {0x2206, 0x14E1}, {0x2206, 0xE015}, {0x2206, 0xAD26},
++	{0x2206, 0x9CE1}, {0x2206, 0x85E0}, {0x2206, 0xBF85}, {0x2206, 0x6D02},
++	{0x2206, 0x2CA2}, {0x2206, 0xEF96}, {0x2206, 0xFEFC}, {0x2206, 0x04F8},
++	{0x2206, 0xFAEF}, {0x2206, 0x69E0}, {0x2206, 0x8B86}, {0x2206, 0xAD22},
++	{0x2206, 0x09E1}, {0x2206, 0x85E1}, {0x2206, 0xBF85}, {0x2206, 0x6D02},
++	{0x2206, 0x2CA2}, {0x2206, 0xEF96}, {0x2206, 0xFEFC}, {0x2206, 0x0464},
++	{0x2206, 0xE48C}, {0x2206, 0xFDE4}, {0x2206, 0x80CA}, {0x2206, 0xE480},
++	{0x2206, 0x66E0}, {0x2206, 0x8E70}, {0x2206, 0xE076}, {0x2205, 0xE142},
++	{0x2206, 0x0701}, {0x2205, 0xE140}, {0x2206, 0x0405}, {0x220F, 0x0000},
++	{0x221F, 0x0000}, {0x2200, 0x1340}, {0x133E, 0x000E}, {0x133F, 0x0010},
++	{0x13EB, 0x11BB}
++};
++
++static const struct rtl8367b_initval rtl8367r_vb_initvals_1[] = {
++	{0x1B03, 0x0876}, {0x1200, 0x7FC4}, {0x1305, 0xC000}, {0x121E, 0x03CA},
++	{0x1233, 0x0352}, {0x1234, 0x0064}, {0x1237, 0x0096}, {0x1238, 0x0078},
++	{0x1239, 0x0084}, {0x123A, 0x0030}, {0x205F, 0x0002}, {0x2059, 0x1A00},
++	{0x205F, 0x0000}, {0x207F, 0x0002}, {0x2077, 0x0000}, {0x2078, 0x0000},
++	{0x2079, 0x0000}, {0x207A, 0x0000}, {0x207B, 0x0000}, {0x207F, 0x0000},
++	{0x205F, 0x0002}, {0x2053, 0x0000}, {0x2054, 0x0000}, {0x2055, 0x0000},
++	{0x2056, 0x0000}, {0x2057, 0x0000}, {0x205F, 0x0000}, {0x133F, 0x0030},
++	{0x133E, 0x000E}, {0x221F, 0x0005}, {0x2205, 0x8B86}, {0x2206, 0x800E},
++	{0x221F, 0x0000}, {0x133F, 0x0010}, {0x12A3, 0x2200}, {0x6107, 0xE58B},
++	{0x6103, 0xA970}, {0x0018, 0x0F00}, {0x0038, 0x0F00}, {0x0058, 0x0F00},
++	{0x0078, 0x0F00}, {0x0098, 0x0F00}, {0x133F, 0x0030}, {0x133E, 0x000E},
++	{0x221F, 0x0005}, {0x2205, 0x8B6E}, {0x2206, 0x0000}, {0x220F, 0x0100},
++	{0x2205, 0xFFF6}, {0x2206, 0x0080}, {0x2205, 0x8000}, {0x2206, 0x0280},
++	{0x2206, 0x2BF7}, {0x2206, 0x00E0}, {0x2206, 0xFFF7}, {0x2206, 0xA080},
++	{0x2206, 0x02AE}, {0x2206, 0xF602}, {0x2206, 0x0153}, {0x2206, 0x0201},
++	{0x2206, 0x6602}, {0x2206, 0x8044}, {0x2206, 0x0201}, {0x2206, 0x7CE0},
++	{0x2206, 0x8B8C}, {0x2206, 0xE18B}, {0x2206, 0x8D1E}, {0x2206, 0x01E1},
++	{0x2206, 0x8B8E}, {0x2206, 0x1E01}, {0x2206, 0xA000}, {0x2206, 0xE4AE},
++	{0x2206, 0xD8EE}, {0x2206, 0x85C0}, {0x2206, 0x00EE}, {0x2206, 0x85C1},
++	{0x2206, 0x00EE}, {0x2206, 0x8AFC}, {0x2206, 0x07EE}, {0x2206, 0x8AFD},
++	{0x2206, 0x73EE}, {0x2206, 0xFFF6}, {0x2206, 0x00EE}, {0x2206, 0xFFF7},
++	{0x2206, 0xFC04}, {0x2206, 0xF8E0}, {0x2206, 0x8B8E}, {0x2206, 0xAD20},
++	{0x2206, 0x0302}, {0x2206, 0x8050}, {0x2206, 0xFC04}, {0x2206, 0xF8F9},
++	{0x2206, 0xE08B}, {0x2206, 0x85AD}, {0x2206, 0x2548}, {0x2206, 0xE08A},
++	{0x2206, 0xE4E1}, {0x2206, 0x8AE5}, {0x2206, 0x7C00}, {0x2206, 0x009E},
++	{0x2206, 0x35EE}, {0x2206, 0x8AE4}, {0x2206, 0x00EE}, {0x2206, 0x8AE5},
++	{0x2206, 0x00E0}, {0x2206, 0x8AFC}, {0x2206, 0xE18A}, {0x2206, 0xFDE2},
++	{0x2206, 0x85C0}, {0x2206, 0xE385}, {0x2206, 0xC102}, {0x2206, 0x2DAC},
++	{0x2206, 0xAD20}, {0x2206, 0x12EE}, {0x2206, 0x8AE4}, {0x2206, 0x03EE},
++	{0x2206, 0x8AE5}, {0x2206, 0xB7EE}, {0x2206, 0x85C0}, {0x2206, 0x00EE},
++	{0x2206, 0x85C1}, {0x2206, 0x00AE}, {0x2206, 0x1115}, {0x2206, 0xE685},
++	{0x2206, 0xC0E7}, {0x2206, 0x85C1}, {0x2206, 0xAE08}, {0x2206, 0xEE85},
++	{0x2206, 0xC000}, {0x2206, 0xEE85}, {0x2206, 0xC100}, {0x2206, 0xFDFC},
++	{0x2206, 0x0400}, {0x2205, 0xE142}, {0x2206, 0x0701}, {0x2205, 0xE140},
++	{0x2206, 0x0405}, {0x220F, 0x0000}, {0x221F, 0x0000}, {0x133E, 0x000E},
++	{0x133F, 0x0010}, {0x13EB, 0x11BB}, {0x207F, 0x0002}, {0x2073, 0x1D22},
++	{0x207F, 0x0000}, {0x133F, 0x0030}, {0x133E, 0x000E}, {0x2200, 0x1340},
++	{0x133E, 0x000E}, {0x133F, 0x0010},
++};
++
++static int rtl8367b_write_initvals(struct rtl8366_smi *smi,
++				  const struct rtl8367b_initval *initvals,
++				  int count)
++{
++	int err;
++	int i;
++
++	for (i = 0; i < count; i++)
++		REG_WR(smi, initvals[i].reg, initvals[i].val);
++
++	return 0;
++}
++
++static int rtl8367b_read_phy_reg(struct rtl8366_smi *smi,
++				u32 phy_addr, u32 phy_reg, u32 *val)
++{
++	int timeout;
++	u32 data;
++	int err;
++
++	if (phy_addr > RTL8367B_PHY_ADDR_MAX)
++		return -EINVAL;
++
++	if (phy_reg > RTL8367B_PHY_REG_MAX)
++		return -EINVAL;
++
++	REG_RD(smi, RTL8367B_IA_STATUS_REG, &data);
++	if (data & RTL8367B_IA_STATUS_PHY_BUSY)
++		return -ETIMEDOUT;
++
++	/* prepare address */
++	REG_WR(smi, RTL8367B_IA_ADDRESS_REG,
++	       RTL8367B_INTERNAL_PHY_REG(phy_addr, phy_reg));
++
++	/* send read command */
++	REG_WR(smi, RTL8367B_IA_CTRL_REG,
++	       RTL8367B_IA_CTRL_CMD_MASK | RTL8367B_IA_CTRL_RW_READ);
++
++	timeout = 5;
++	do {
++		REG_RD(smi, RTL8367B_IA_STATUS_REG, &data);
++		if ((data & RTL8367B_IA_STATUS_PHY_BUSY) == 0)
++			break;
++
++		if (timeout--) {
++			dev_err(smi->parent, "phy read timed out\n");
++			return -ETIMEDOUT;
++		}
++
++		udelay(1);
++	} while (1);
++
++	/* read data */
++	REG_RD(smi, RTL8367B_IA_READ_DATA_REG, val);
++
++	dev_dbg(smi->parent, "phy_read: addr:%02x, reg:%02x, val:%04x\n",
++		phy_addr, phy_reg, *val);
++	return 0;
++}
++
++static int rtl8367b_write_phy_reg(struct rtl8366_smi *smi,
++				 u32 phy_addr, u32 phy_reg, u32 val)
++{
++	int timeout;
++	u32 data;
++	int err;
++
++	dev_dbg(smi->parent, "phy_write: addr:%02x, reg:%02x, val:%04x\n",
++		phy_addr, phy_reg, val);
++
++	if (phy_addr > RTL8367B_PHY_ADDR_MAX)
++		return -EINVAL;
++
++	if (phy_reg > RTL8367B_PHY_REG_MAX)
++		return -EINVAL;
++
++	REG_RD(smi, RTL8367B_IA_STATUS_REG, &data);
++	if (data & RTL8367B_IA_STATUS_PHY_BUSY)
++		return -ETIMEDOUT;
++
++	/* preapre data */
++	REG_WR(smi, RTL8367B_IA_WRITE_DATA_REG, val);
++
++	/* prepare address */
++	REG_WR(smi, RTL8367B_IA_ADDRESS_REG,
++	       RTL8367B_INTERNAL_PHY_REG(phy_addr, phy_reg));
++
++	/* send write command */
++	REG_WR(smi, RTL8367B_IA_CTRL_REG,
++	       RTL8367B_IA_CTRL_CMD_MASK | RTL8367B_IA_CTRL_RW_WRITE);
++
++	timeout = 5;
++	do {
++		REG_RD(smi, RTL8367B_IA_STATUS_REG, &data);
++		if ((data & RTL8367B_IA_STATUS_PHY_BUSY) == 0)
++			break;
++
++		if (timeout--) {
++			dev_err(smi->parent, "phy write timed out\n");
++			return -ETIMEDOUT;
++		}
++
++		udelay(1);
++	} while (1);
++
++	return 0;
++}
++
++static int rtl8367b_init_regs(struct rtl8366_smi *smi)
++{
++	const struct rtl8367b_initval *initvals;
++	u32 chip_ver;
++	u32 rlvid;
++	int count;
++	int err;
++
++	REG_WR(smi, RTL8367B_RTL_MAGIC_ID_REG, RTL8367B_RTL_MAGIC_ID_VAL);
++	REG_RD(smi, RTL8367B_CHIP_VER_REG, &chip_ver);
++
++	rlvid = (chip_ver >> RTL8367B_CHIP_VER_RLVID_SHIFT) &
++		RTL8367B_CHIP_VER_RLVID_MASK;
++
++	switch (rlvid) {
++	case 0:
++		initvals = rtl8367r_vb_initvals_0;
++		count = ARRAY_SIZE(rtl8367r_vb_initvals_0);
++		break;
++
++	case 1:
++		initvals = rtl8367r_vb_initvals_1;
++		count = ARRAY_SIZE(rtl8367r_vb_initvals_1);
++		break;
++
++	default:
++		dev_err(smi->parent, "unknow rlvid %u\n", rlvid);
++		return -ENODEV;
++	}
++
++	/* TODO: disable RLTP */
++
++	return rtl8367b_write_initvals(smi, initvals, count);
++}
++
++static int rtl8367b_reset_chip(struct rtl8366_smi *smi)
++{
++	int timeout = 10;
++	int err;
++	u32 data;
++
++	REG_WR(smi, RTL8367B_CHIP_RESET_REG, RTL8367B_CHIP_RESET_HW);
++	msleep(RTL8367B_RESET_DELAY);
++
++	do {
++		REG_RD(smi, RTL8367B_CHIP_RESET_REG, &data);
++		if (!(data & RTL8367B_CHIP_RESET_HW))
++			break;
++
++		msleep(1);
++	} while (--timeout);
++
++	if (!timeout) {
++		dev_err(smi->parent, "chip reset timed out\n");
++		return -ETIMEDOUT;
++	}
++
++	return 0;
++}
++
++static int rtl8367b_extif_set_mode(struct rtl8366_smi *smi, int id,
++				   enum rtl8367_extif_mode mode)
++{
++	int err;
++
++	/* set port mode */
++	switch (mode) {
++	case RTL8367_EXTIF_MODE_RGMII:
++		REG_RMW(smi, RTL8367B_CHIP_DEBUG0_REG,
++			RTL8367B_DEBUG0_SEL33(id),
++			RTL8367B_DEBUG0_SEL33(id));
++		if (id <= 1) {
++			REG_RMW(smi, RTL8367B_CHIP_DEBUG0_REG,
++				RTL8367B_DEBUG0_DRI(id) |
++					RTL8367B_DEBUG0_DRI_RG(id) |
++					RTL8367B_DEBUG0_SLR(id),
++				RTL8367B_DEBUG0_DRI_RG(id) |
++					RTL8367B_DEBUG0_SLR(id));
++			REG_RMW(smi, RTL8367B_CHIP_DEBUG1_REG,
++				RTL8367B_DEBUG1_DN_MASK(id) |
++					RTL8367B_DEBUG1_DP_MASK(id),
++				(7 << RTL8367B_DEBUG1_DN_SHIFT(id)) |
++					(7 << RTL8367B_DEBUG1_DP_SHIFT(id)));
++		} else {
++			REG_RMW(smi, RTL8367B_CHIP_DEBUG2_REG,
++				RTL8367B_DEBUG2_DRI_EXT2 |
++					RTL8367B_DEBUG2_DRI_EXT2_RG |
++					RTL8367B_DEBUG2_SLR_EXT2 |
++					RTL8367B_DEBUG2_RG2_DN_MASK |
++					RTL8367B_DEBUG2_RG2_DP_MASK,
++				RTL8367B_DEBUG2_DRI_EXT2_RG |
++					RTL8367B_DEBUG2_SLR_EXT2 |
++					(7 << RTL8367B_DEBUG2_RG2_DN_SHIFT) |
++					(7 << RTL8367B_DEBUG2_RG2_DP_SHIFT));
++		}
++		break;
++
++	case RTL8367_EXTIF_MODE_TMII_MAC:
++	case RTL8367_EXTIF_MODE_TMII_PHY:
++		REG_RMW(smi, RTL8367B_BYPASS_LINE_RATE_REG, BIT(id), BIT(id));
++		break;
++
++	case RTL8367_EXTIF_MODE_GMII:
++		REG_RMW(smi, RTL8367B_CHIP_DEBUG0_REG,
++			RTL8367B_DEBUG0_SEL33(id),
++			RTL8367B_DEBUG0_SEL33(id));
++		REG_RMW(smi, RTL8367B_EXT_RGMXF_REG(id), BIT(6), BIT(6));
++		break;
++
++	case RTL8367_EXTIF_MODE_MII_MAC:
++	case RTL8367_EXTIF_MODE_MII_PHY:
++	case RTL8367_EXTIF_MODE_DISABLED:
++		REG_RMW(smi, RTL8367B_BYPASS_LINE_RATE_REG, BIT(id), 0);
++		REG_RMW(smi, RTL8367B_EXT_RGMXF_REG(id), BIT(6), 0);
++		break;
++
++	default:
++		dev_err(smi->parent,
++			"invalid mode for external interface %d\n", id);
++		return -EINVAL;
++	}
++
++	if (id <= 1)
++		REG_RMW(smi, RTL8367B_DIS_REG,
++			RTL8367B_DIS_RGMII_MASK << RTL8367B_DIS_RGMII_SHIFT(id),
++			mode << RTL8367B_DIS_RGMII_SHIFT(id));
++	else
++		REG_RMW(smi, RTL8367B_DIS2_REG,
++			RTL8367B_DIS2_RGMII_MASK << RTL8367B_DIS2_RGMII_SHIFT,
++			mode << RTL8367B_DIS2_RGMII_SHIFT);
++
++	return 0;
++}
++
++static int rtl8367b_extif_set_force(struct rtl8366_smi *smi, int id,
++				    struct rtl8367_port_ability *pa)
++{
++	u32 mask;
++	u32 val;
++	int err;
++
++	mask = (RTL8367B_DI_FORCE_MODE |
++		RTL8367B_DI_FORCE_NWAY |
++		RTL8367B_DI_FORCE_TXPAUSE |
++		RTL8367B_DI_FORCE_RXPAUSE |
++		RTL8367B_DI_FORCE_LINK |
++		RTL8367B_DI_FORCE_DUPLEX |
++		RTL8367B_DI_FORCE_SPEED_MASK);
++
++	val = pa->speed;
++	val |= pa->force_mode ? RTL8367B_DI_FORCE_MODE : 0;
++	val |= pa->nway ? RTL8367B_DI_FORCE_NWAY : 0;
++	val |= pa->txpause ? RTL8367B_DI_FORCE_TXPAUSE : 0;
++	val |= pa->rxpause ? RTL8367B_DI_FORCE_RXPAUSE : 0;
++	val |= pa->link ? RTL8367B_DI_FORCE_LINK : 0;
++	val |= pa->duplex ? RTL8367B_DI_FORCE_DUPLEX : 0;
++
++	REG_RMW(smi, RTL8367B_DI_FORCE_REG(id), mask, val);
++
++	return 0;
++}
++
++static int rtl8367b_extif_set_rgmii_delay(struct rtl8366_smi *smi, int id,
++					 unsigned txdelay, unsigned rxdelay)
++{
++	u32 mask;
++	u32 val;
++	int err;
++
++	mask = (RTL8367B_EXT_RGMXF_RXDELAY_MASK |
++		(RTL8367B_EXT_RGMXF_TXDELAY_MASK <<
++			RTL8367B_EXT_RGMXF_TXDELAY_SHIFT));
++
++	val = rxdelay;
++	val |= txdelay << RTL8367B_EXT_RGMXF_TXDELAY_SHIFT;
++
++	REG_RMW(smi, RTL8367B_EXT_RGMXF_REG(id), mask, val);
++
++	return 0;
++}
++
++static int rtl8367b_extif_init(struct rtl8366_smi *smi, int id,
++			       struct rtl8367_extif_config *cfg)
++{
++	enum rtl8367_extif_mode mode;
++	int err;
++
++	mode = (cfg) ? cfg->mode : RTL8367_EXTIF_MODE_DISABLED;
++
++	err = rtl8367b_extif_set_mode(smi, id, mode);
++	if (err)
++		return err;
++
++	if (mode != RTL8367_EXTIF_MODE_DISABLED) {
++		err = rtl8367b_extif_set_force(smi, id, &cfg->ability);
++		if (err)
++			return err;
++
++		err = rtl8367b_extif_set_rgmii_delay(smi, id, cfg->txdelay,
++						     cfg->rxdelay);
++		if (err)
++			return err;
++	}
++
++	return 0;
++}
++
++#ifdef CONFIG_OF
++static int rtl8367b_extif_init_of(struct rtl8366_smi *smi, int id,
++				  const char *name)
++{
++	struct rtl8367_extif_config *cfg;
++	const __be32 *prop;
++	int size;
++	int err;
++
++	prop = of_get_property(smi->parent->of_node, name, &size);
++	if (!prop)
++		return rtl8367b_extif_init(smi, id, NULL);
++
++	if (size != (9 * sizeof(*prop))) {
++		dev_err(smi->parent, "%s property is invalid\n", name);
++		return -EINVAL;
++	}
++
++	cfg = kzalloc(sizeof(struct rtl8367_extif_config), GFP_KERNEL);
++	if (!cfg)
++		return -ENOMEM;
++
++	cfg->txdelay = be32_to_cpup(prop++);
++	cfg->rxdelay = be32_to_cpup(prop++);
++	cfg->mode = be32_to_cpup(prop++);
++	cfg->ability.force_mode = be32_to_cpup(prop++);
++	cfg->ability.txpause = be32_to_cpup(prop++);
++	cfg->ability.rxpause = be32_to_cpup(prop++);
++	cfg->ability.link = be32_to_cpup(prop++);
++	cfg->ability.duplex = be32_to_cpup(prop++);
++	cfg->ability.speed = be32_to_cpup(prop++);
++
++	err = rtl8367b_extif_init(smi, id, cfg);
++	kfree(cfg);
++
++	return err;
++}
++#else
++static int rtl8367b_extif_init_of(struct rtl8366_smi *smi, int id,
++				  const char *name)
++{
++	return -EINVAL;
++}
++#endif
++
++static int rtl8367b_setup(struct rtl8366_smi *smi)
++{
++	struct rtl8367_platform_data *pdata;
++	int err;
++	int i;
++
++	pdata = smi->parent->platform_data;
++
++	err = rtl8367b_init_regs(smi);
++	if (err)
++		return err;
++
++	/* initialize external interfaces */
++	if (smi->parent->of_node) {
++		err = rtl8367b_extif_init_of(smi, 0, "realtek,extif0");
++		if (err)
++			return err;
++
++		err = rtl8367b_extif_init_of(smi, 1, "realtek,extif1");
++		if (err)
++			return err;
++
++		err = rtl8367b_extif_init_of(smi, 2, "realtek,extif2");
++		if (err)
++			return err;
++	} else {
++		err = rtl8367b_extif_init(smi, 0, pdata->extif0_cfg);
++		if (err)
++			return err;
++
++		err = rtl8367b_extif_init(smi, 1, pdata->extif1_cfg);
++		if (err)
++			return err;
++	}
++
++	/* set maximum packet length to 1536 bytes */
++	REG_RMW(smi, RTL8367B_SWC0_REG, RTL8367B_SWC0_MAX_LENGTH_MASK,
++		RTL8367B_SWC0_MAX_LENGTH_1536);
++
++	/*
++	 * discard VLAN tagged packets if the port is not a member of
++	 * the VLAN with which the packets is associated.
++	 */
++	REG_WR(smi, RTL8367B_VLAN_INGRESS_REG, RTL8367B_PORTS_ALL);
++
++	/*
++	 * Setup egress tag mode for each port.
++	 */
++	for (i = 0; i < RTL8367B_NUM_PORTS; i++)
++		REG_RMW(smi,
++			RTL8367B_PORT_MISC_CFG_REG(i),
++			RTL8367B_PORT_MISC_CFG_EGRESS_MODE_MASK <<
++				RTL8367B_PORT_MISC_CFG_EGRESS_MODE_SHIFT,
++			RTL8367B_PORT_MISC_CFG_EGRESS_MODE_ORIGINAL <<
++				RTL8367B_PORT_MISC_CFG_EGRESS_MODE_SHIFT);
++
++	return 0;
++}
++
++static int rtl8367b_get_mib_counter(struct rtl8366_smi *smi, int counter,
++				    int port, unsigned long long *val)
++{
++	struct rtl8366_mib_counter *mib;
++	int offset;
++	int i;
++	int err;
++	u32 addr, data;
++	u64 mibvalue;
++
++	if (port > RTL8367B_NUM_PORTS ||
++	    counter >= RTL8367B_NUM_MIB_COUNTERS)
++		return -EINVAL;
++
++	mib = &rtl8367b_mib_counters[counter];
++	addr = RTL8367B_MIB_COUNTER_PORT_OFFSET * port + mib->offset;
++
++	/*
++	 * Writing access counter address first
++	 * then ASIC will prepare 64bits counter wait for being retrived
++	 */
++	REG_WR(smi, RTL8367B_MIB_ADDRESS_REG, addr >> 2);
++
++	/* read MIB control register */
++	REG_RD(smi, RTL8367B_MIB_CTRL0_REG(0), &data);
++
++	if (data & RTL8367B_MIB_CTRL0_BUSY_MASK)
++		return -EBUSY;
++
++	if (data & RTL8367B_MIB_CTRL0_RESET_MASK)
++		return -EIO;
++
++	if (mib->length == 4)
++		offset = 3;
++	else
++		offset = (mib->offset + 1) % 4;
++
++	mibvalue = 0;
++	for (i = 0; i < mib->length; i++) {
++		REG_RD(smi, RTL8367B_MIB_COUNTER_REG(offset - i), &data);
++		mibvalue = (mibvalue << 16) | (data & 0xFFFF);
++	}
++
++	*val = mibvalue;
++	return 0;
++}
++
++static int rtl8367b_get_vlan_4k(struct rtl8366_smi *smi, u32 vid,
++				struct rtl8366_vlan_4k *vlan4k)
++{
++	u32 data[RTL8367B_TA_VLAN_NUM_WORDS];
++	int err;
++	int i;
++
++	memset(vlan4k, '\0', sizeof(struct rtl8366_vlan_4k));
++
++	if (vid >= RTL8367B_NUM_VIDS)
++		return -EINVAL;
++
++	/* write VID */
++	REG_WR(smi, RTL8367B_TA_ADDR_REG, vid);
++
++	/* write table access control word */
++	REG_WR(smi, RTL8367B_TA_CTRL_REG, RTL8367B_TA_CTRL_CVLAN_READ);
++
++	for (i = 0; i < ARRAY_SIZE(data); i++)
++		REG_RD(smi, RTL8367B_TA_RDDATA_REG(i), &data[i]);
++
++	vlan4k->vid = vid;
++	vlan4k->member = (data[0] >> RTL8367B_TA_VLAN0_MEMBER_SHIFT) &
++			 RTL8367B_TA_VLAN0_MEMBER_MASK;
++	vlan4k->untag = (data[0] >> RTL8367B_TA_VLAN0_UNTAG_SHIFT) &
++			RTL8367B_TA_VLAN0_UNTAG_MASK;
++	vlan4k->fid = (data[1] >> RTL8367B_TA_VLAN1_FID_SHIFT) &
++		      RTL8367B_TA_VLAN1_FID_MASK;
++
++	return 0;
++}
++
++static int rtl8367b_set_vlan_4k(struct rtl8366_smi *smi,
++				const struct rtl8366_vlan_4k *vlan4k)
++{
++	u32 data[RTL8367B_TA_VLAN_NUM_WORDS];
++	int err;
++	int i;
++
++	if (vlan4k->vid >= RTL8367B_NUM_VIDS ||
++	    vlan4k->member > RTL8367B_TA_VLAN0_MEMBER_MASK ||
++	    vlan4k->untag > RTL8367B_UNTAG_MASK ||
++	    vlan4k->fid > RTL8367B_FIDMAX)
++		return -EINVAL;
++
++	memset(data, 0, sizeof(data));
++
++	data[0] = (vlan4k->member & RTL8367B_TA_VLAN0_MEMBER_MASK) <<
++		  RTL8367B_TA_VLAN0_MEMBER_SHIFT;
++	data[0] |= (vlan4k->untag & RTL8367B_TA_VLAN0_UNTAG_MASK) <<
++		   RTL8367B_TA_VLAN0_UNTAG_SHIFT;
++	data[1] = (vlan4k->fid & RTL8367B_TA_VLAN1_FID_MASK) <<
++		  RTL8367B_TA_VLAN1_FID_SHIFT;
++
++	for (i = 0; i < ARRAY_SIZE(data); i++)
++		REG_WR(smi, RTL8367B_TA_WRDATA_REG(i), data[i]);
++
++	/* write VID */
++	REG_WR(smi, RTL8367B_TA_ADDR_REG,
++	       vlan4k->vid & RTL8367B_TA_VLAN_VID_MASK);
++
++	/* write table access control word */
++	REG_WR(smi, RTL8367B_TA_CTRL_REG, RTL8367B_TA_CTRL_CVLAN_WRITE);
++
++	return 0;
++}
++
++static int rtl8367b_get_vlan_mc(struct rtl8366_smi *smi, u32 index,
++				struct rtl8366_vlan_mc *vlanmc)
++{
++	u32 data[RTL8367B_VLAN_MC_NUM_WORDS];
++	int err;
++	int i;
++
++	memset(vlanmc, '\0', sizeof(struct rtl8366_vlan_mc));
++
++	if (index >= RTL8367B_NUM_VLANS)
++		return -EINVAL;
++
++	for (i = 0; i < ARRAY_SIZE(data); i++)
++		REG_RD(smi, RTL8367B_VLAN_MC_BASE(index) + i, &data[i]);
++
++	vlanmc->member = (data[0] >> RTL8367B_VLAN_MC0_MEMBER_SHIFT) &
++			 RTL8367B_VLAN_MC0_MEMBER_MASK;
++	vlanmc->fid = (data[1] >> RTL8367B_VLAN_MC1_FID_SHIFT) &
++		      RTL8367B_VLAN_MC1_FID_MASK;
++	vlanmc->vid = (data[3] >> RTL8367B_VLAN_MC3_EVID_SHIFT) &
++		      RTL8367B_VLAN_MC3_EVID_MASK;
++
++	return 0;
++}
++
++static int rtl8367b_set_vlan_mc(struct rtl8366_smi *smi, u32 index,
++				const struct rtl8366_vlan_mc *vlanmc)
++{
++	u32 data[RTL8367B_VLAN_MC_NUM_WORDS];
++	int err;
++	int i;
++
++	if (index >= RTL8367B_NUM_VLANS ||
++	    vlanmc->vid >= RTL8367B_NUM_VIDS ||
++	    vlanmc->priority > RTL8367B_PRIORITYMAX ||
++	    vlanmc->member > RTL8367B_VLAN_MC0_MEMBER_MASK ||
++	    vlanmc->untag > RTL8367B_UNTAG_MASK ||
++	    vlanmc->fid > RTL8367B_FIDMAX)
++		return -EINVAL;
++
++	data[0] = (vlanmc->member & RTL8367B_VLAN_MC0_MEMBER_MASK) <<
++		  RTL8367B_VLAN_MC0_MEMBER_SHIFT;
++	data[1] = (vlanmc->fid & RTL8367B_VLAN_MC1_FID_MASK) <<
++		  RTL8367B_VLAN_MC1_FID_SHIFT;
++	data[2] = 0;
++	data[3] = (vlanmc->vid & RTL8367B_VLAN_MC3_EVID_MASK) <<
++		   RTL8367B_VLAN_MC3_EVID_SHIFT;
++
++	for (i = 0; i < ARRAY_SIZE(data); i++)
++		REG_WR(smi, RTL8367B_VLAN_MC_BASE(index) + i, data[i]);
++
++	return 0;
++}
++
++static int rtl8367b_get_mc_index(struct rtl8366_smi *smi, int port, int *val)
++{
++	u32 data;
++	int err;
++
++	if (port >= RTL8367B_NUM_PORTS)
++		return -EINVAL;
++
++	REG_RD(smi, RTL8367B_VLAN_PVID_CTRL_REG(port), &data);
++
++	*val = (data >> RTL8367B_VLAN_PVID_CTRL_SHIFT(port)) &
++	       RTL8367B_VLAN_PVID_CTRL_MASK;
++
++	return 0;
++}
++
++static int rtl8367b_set_mc_index(struct rtl8366_smi *smi, int port, int index)
++{
++	if (port >= RTL8367B_NUM_PORTS || index >= RTL8367B_NUM_VLANS)
++		return -EINVAL;
++
++	return rtl8366_smi_rmwr(smi, RTL8367B_VLAN_PVID_CTRL_REG(port),
++				RTL8367B_VLAN_PVID_CTRL_MASK <<
++					RTL8367B_VLAN_PVID_CTRL_SHIFT(port),
++				(index & RTL8367B_VLAN_PVID_CTRL_MASK) <<
++					RTL8367B_VLAN_PVID_CTRL_SHIFT(port));
++}
++
++static int rtl8367b_enable_vlan(struct rtl8366_smi *smi, int enable)
++{
++	return rtl8366_smi_rmwr(smi, RTL8367B_VLAN_CTRL_REG,
++				RTL8367B_VLAN_CTRL_ENABLE,
++				(enable) ? RTL8367B_VLAN_CTRL_ENABLE : 0);
++}
++
++static int rtl8367b_enable_vlan4k(struct rtl8366_smi *smi, int enable)
++{
++	return 0;
++}
++
++static int rtl8367b_is_vlan_valid(struct rtl8366_smi *smi, unsigned vlan)
++{
++	unsigned max = RTL8367B_NUM_VLANS;
++
++	if (smi->vlan4k_enabled)
++		max = RTL8367B_NUM_VIDS - 1;
++
++	if (vlan == 0 || vlan >= max)
++		return 0;
++
++	return 1;
++}
++
++static int rtl8367b_enable_port(struct rtl8366_smi *smi, int port, int enable)
++{
++	int err;
++
++	REG_WR(smi, RTL8367B_PORT_ISOLATION_REG(port),
++	       (enable) ? RTL8367B_PORTS_ALL : 0);
++
++	return 0;
++}
++
++static int rtl8367b_sw_reset_mibs(struct switch_dev *dev,
++				  const struct switch_attr *attr,
++				  struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++
++	return rtl8366_smi_rmwr(smi, RTL8367B_MIB_CTRL0_REG(0), 0,
++				RTL8367B_MIB_CTRL0_GLOBAL_RESET_MASK);
++}
++
++static int rtl8367b_sw_get_port_link(struct switch_dev *dev,
++				    int port,
++				    struct switch_port_link *link)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data = 0;
++	u32 speed;
++
++	if (port >= RTL8367B_NUM_PORTS)
++		return -EINVAL;
++
++	rtl8366_smi_read_reg(smi, RTL8367B_PORT_STATUS_REG(port), &data);
++
++	link->link = !!(data & RTL8367B_PORT_STATUS_LINK);
++	if (!link->link)
++		return 0;
++
++	link->duplex = !!(data & RTL8367B_PORT_STATUS_DUPLEX);
++	link->rx_flow = !!(data & RTL8367B_PORT_STATUS_RXPAUSE);
++	link->tx_flow = !!(data & RTL8367B_PORT_STATUS_TXPAUSE);
++	link->aneg = !!(data & RTL8367B_PORT_STATUS_NWAY);
++
++	speed = (data & RTL8367B_PORT_STATUS_SPEED_MASK);
++	switch (speed) {
++	case 0:
++		link->speed = SWITCH_PORT_SPEED_10;
++		break;
++	case 1:
++		link->speed = SWITCH_PORT_SPEED_100;
++		break;
++	case 2:
++		link->speed = SWITCH_PORT_SPEED_1000;
++		break;
++	default:
++		link->speed = SWITCH_PORT_SPEED_UNKNOWN;
++		break;
++	}
++
++	return 0;
++}
++
++static int rtl8367b_sw_get_max_length(struct switch_dev *dev,
++				     const struct switch_attr *attr,
++				     struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 data;
++
++	rtl8366_smi_read_reg(smi, RTL8367B_SWC0_REG, &data);
++	val->value.i = (data & RTL8367B_SWC0_MAX_LENGTH_MASK) >>
++			RTL8367B_SWC0_MAX_LENGTH_SHIFT;
++
++	return 0;
++}
++
++static int rtl8367b_sw_set_max_length(struct switch_dev *dev,
++				     const struct switch_attr *attr,
++				     struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	u32 max_len;
++
++	switch (val->value.i) {
++	case 0:
++		max_len = RTL8367B_SWC0_MAX_LENGTH_1522;
++		break;
++	case 1:
++		max_len = RTL8367B_SWC0_MAX_LENGTH_1536;
++		break;
++	case 2:
++		max_len = RTL8367B_SWC0_MAX_LENGTH_1552;
++		break;
++	case 3:
++		max_len = RTL8367B_SWC0_MAX_LENGTH_16000;
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	return rtl8366_smi_rmwr(smi, RTL8367B_SWC0_REG,
++			        RTL8367B_SWC0_MAX_LENGTH_MASK, max_len);
++}
++
++
++static int rtl8367b_sw_reset_port_mibs(struct switch_dev *dev,
++				       const struct switch_attr *attr,
++				       struct switch_val *val)
++{
++	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
++	int port;
++
++	port = val->port_vlan;
++	if (port >= RTL8367B_NUM_PORTS)
++		return -EINVAL;
++
++	return rtl8366_smi_rmwr(smi, RTL8367B_MIB_CTRL0_REG(port / 8), 0,
++				RTL8367B_MIB_CTRL0_PORT_RESET_MASK(port % 8));
++}
++
++static int rtl8367b_sw_get_port_stats(struct switch_dev *dev, int port,
++                                        struct switch_port_stats *stats)
++{
++	return (rtl8366_sw_get_port_stats(dev, port, stats,
++				RTL8367B_MIB_TXB_ID, RTL8367B_MIB_RXB_ID));
++}
++
++static struct switch_attr rtl8367b_globals[] = {
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_vlan",
++		.description = "Enable VLAN mode",
++		.set = rtl8366_sw_set_vlan_enable,
++		.get = rtl8366_sw_get_vlan_enable,
++		.max = 1,
++		.ofs = 1
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_vlan4k",
++		.description = "Enable VLAN 4K mode",
++		.set = rtl8366_sw_set_vlan_enable,
++		.get = rtl8366_sw_get_vlan_enable,
++		.max = 1,
++		.ofs = 2
++	}, {
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "reset_mibs",
++		.description = "Reset all MIB counters",
++		.set = rtl8367b_sw_reset_mibs,
++	}, {
++		.type = SWITCH_TYPE_INT,
++		.name = "max_length",
++		.description = "Get/Set the maximum length of valid packets"
++			       "(0:1522, 1:1536, 2:1552, 3:16000)",
++		.set = rtl8367b_sw_set_max_length,
++		.get = rtl8367b_sw_get_max_length,
++		.max = 3,
++	}
++};
++
++static struct switch_attr rtl8367b_port[] = {
++	{
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "reset_mib",
++		.description = "Reset single port MIB counters",
++		.set = rtl8367b_sw_reset_port_mibs,
++	}, {
++		.type = SWITCH_TYPE_STRING,
++		.name = "mib",
++		.description = "Get MIB counters for port",
++		.max = 33,
++		.set = NULL,
++		.get = rtl8366_sw_get_port_mib,
++	},
++};
++
++static struct switch_attr rtl8367b_vlan[] = {
++	{
++		.type = SWITCH_TYPE_STRING,
++		.name = "info",
++		.description = "Get vlan information",
++		.max = 1,
++		.set = NULL,
++		.get = rtl8366_sw_get_vlan_info,
++	},
++};
++
++static const struct switch_dev_ops rtl8367b_sw_ops = {
++	.attr_global = {
++		.attr = rtl8367b_globals,
++		.n_attr = ARRAY_SIZE(rtl8367b_globals),
++	},
++	.attr_port = {
++		.attr = rtl8367b_port,
++		.n_attr = ARRAY_SIZE(rtl8367b_port),
++	},
++	.attr_vlan = {
++		.attr = rtl8367b_vlan,
++		.n_attr = ARRAY_SIZE(rtl8367b_vlan),
++	},
++
++	.get_vlan_ports = rtl8366_sw_get_vlan_ports,
++	.set_vlan_ports = rtl8366_sw_set_vlan_ports,
++	.get_port_pvid = rtl8366_sw_get_port_pvid,
++	.set_port_pvid = rtl8366_sw_set_port_pvid,
++	.reset_switch = rtl8366_sw_reset_switch,
++	.get_port_link = rtl8367b_sw_get_port_link,
++	.get_port_stats = rtl8367b_sw_get_port_stats,
++};
++
++static int rtl8367b_switch_init(struct rtl8366_smi *smi)
++{
++	struct switch_dev *dev = &smi->sw_dev;
++	int err;
++
++	dev->name = "RTL8367B";
++	dev->cpu_port = smi->cpu_port;
++	dev->ports = RTL8367B_NUM_PORTS;
++	dev->vlans = RTL8367B_NUM_VIDS;
++	dev->ops = &rtl8367b_sw_ops;
++	dev->alias = dev_name(smi->parent);
++
++	err = register_switch(dev, NULL);
++	if (err)
++		dev_err(smi->parent, "switch registration failed\n");
++
++	return err;
++}
++
++static void rtl8367b_switch_cleanup(struct rtl8366_smi *smi)
++{
++	unregister_switch(&smi->sw_dev);
++}
++
++static int rtl8367b_mii_read(struct mii_bus *bus, int addr, int reg)
++{
++	struct rtl8366_smi *smi = bus->priv;
++	u32 val = 0;
++	int err;
++
++	err = rtl8367b_read_phy_reg(smi, addr, reg, &val);
++	if (err)
++		return 0xffff;
++
++	return val;
++}
++
++static int rtl8367b_mii_write(struct mii_bus *bus, int addr, int reg, u16 val)
++{
++	struct rtl8366_smi *smi = bus->priv;
++	u32 t;
++	int err;
++
++	err = rtl8367b_write_phy_reg(smi, addr, reg, val);
++	if (err)
++		return err;
++
++	/* flush write */
++	(void) rtl8367b_read_phy_reg(smi, addr, reg, &t);
++
++	return err;
++}
++
++static int rtl8367b_detect(struct rtl8366_smi *smi)
++{
++	const char *chip_name;
++	u32 chip_num;
++	u32 chip_ver;
++	u32 chip_mode;
++	int ret;
++
++	/* TODO: improve chip detection */
++	rtl8366_smi_write_reg(smi, RTL8367B_RTL_MAGIC_ID_REG,
++			      RTL8367B_RTL_MAGIC_ID_VAL);
++
++	ret = rtl8366_smi_read_reg(smi, RTL8367B_CHIP_NUMBER_REG, &chip_num);
++	if (ret) {
++		dev_err(smi->parent, "unable to read %s register\n",
++			"chip number");
++		return ret;
++	}
++
++	ret = rtl8366_smi_read_reg(smi, RTL8367B_CHIP_VER_REG, &chip_ver);
++	if (ret) {
++		dev_err(smi->parent, "unable to read %s register\n",
++			"chip version");
++		return ret;
++	}
++
++	ret = rtl8366_smi_read_reg(smi, RTL8367B_CHIP_MODE_REG, &chip_mode);
++	if (ret) {
++		dev_err(smi->parent, "unable to read %s register\n",
++			"chip mode");
++		return ret;
++	}
++
++	switch (chip_ver) {
++	case 0x1000:
++		chip_name = "8367RB";
++		break;
++	case 0x1010:
++		chip_name = "8367R-VB";
++		break;
++	default:
++		dev_err(smi->parent,
++			"unknown chip num:%04x ver:%04x, mode:%04x\n",
++			chip_num, chip_ver, chip_mode);
++		return -ENODEV;
++	}
++
++	dev_info(smi->parent, "RTL%s chip found\n", chip_name);
++
++	return 0;
++}
++
++static struct rtl8366_smi_ops rtl8367b_smi_ops = {
++	.detect		= rtl8367b_detect,
++	.reset_chip	= rtl8367b_reset_chip,
++	.setup		= rtl8367b_setup,
++
++	.mii_read	= rtl8367b_mii_read,
++	.mii_write	= rtl8367b_mii_write,
++
++	.get_vlan_mc	= rtl8367b_get_vlan_mc,
++	.set_vlan_mc	= rtl8367b_set_vlan_mc,
++	.get_vlan_4k	= rtl8367b_get_vlan_4k,
++	.set_vlan_4k	= rtl8367b_set_vlan_4k,
++	.get_mc_index	= rtl8367b_get_mc_index,
++	.set_mc_index	= rtl8367b_set_mc_index,
++	.get_mib_counter = rtl8367b_get_mib_counter,
++	.is_vlan_valid	= rtl8367b_is_vlan_valid,
++	.enable_vlan	= rtl8367b_enable_vlan,
++	.enable_vlan4k	= rtl8367b_enable_vlan4k,
++	.enable_port	= rtl8367b_enable_port,
++};
++
++static int  rtl8367b_probe(struct platform_device *pdev)
++{
++	struct rtl8366_smi *smi;
++	int err;
++
++	smi = rtl8366_smi_probe(pdev);
++	if (IS_ERR(smi))
++		return PTR_ERR(smi);
++
++	smi->clk_delay = 1500;
++	smi->cmd_read = 0xb9;
++	smi->cmd_write = 0xb8;
++	smi->ops = &rtl8367b_smi_ops;
++	smi->num_ports = RTL8367B_NUM_PORTS;
++	if (of_property_read_u32(pdev->dev.of_node, "cpu_port", &smi->cpu_port)
++	    || smi->cpu_port >= smi->num_ports)
++		smi->cpu_port = RTL8367B_CPU_PORT_NUM;
++	smi->num_vlan_mc = RTL8367B_NUM_VLANS;
++	smi->mib_counters = rtl8367b_mib_counters;
++	smi->num_mib_counters = ARRAY_SIZE(rtl8367b_mib_counters);
++
++	err = rtl8366_smi_init(smi);
++	if (err)
++		goto err_free_smi;
++
++	platform_set_drvdata(pdev, smi);
++
++	err = rtl8367b_switch_init(smi);
++	if (err)
++		goto err_clear_drvdata;
++
++	return 0;
++
++ err_clear_drvdata:
++	platform_set_drvdata(pdev, NULL);
++	rtl8366_smi_cleanup(smi);
++ err_free_smi:
++	kfree(smi);
++	return err;
++}
++
++static int rtl8367b_remove(struct platform_device *pdev)
++{
++	struct rtl8366_smi *smi = platform_get_drvdata(pdev);
++
++	if (smi) {
++		rtl8367b_switch_cleanup(smi);
++		platform_set_drvdata(pdev, NULL);
++		rtl8366_smi_cleanup(smi);
++		kfree(smi);
++	}
++
++	return 0;
++}
++
++static void rtl8367b_shutdown(struct platform_device *pdev)
++{
++	struct rtl8366_smi *smi = platform_get_drvdata(pdev);
++
++	if (smi)
++		rtl8367b_reset_chip(smi);
++}
++
++#ifdef CONFIG_OF
++static const struct of_device_id rtl8367b_match[] = {
++	{ .compatible = "realtek,rtl8367b" },
++	{},
++};
++MODULE_DEVICE_TABLE(of, rtl8367b_match);
++#endif
++
++static struct platform_driver rtl8367b_driver = {
++	.driver = {
++		.name		= RTL8367B_DRIVER_NAME,
++		.owner		= THIS_MODULE,
++#ifdef CONFIG_OF
++		.of_match_table = of_match_ptr(rtl8367b_match),
++#endif
++	},
++	.probe		= rtl8367b_probe,
++	.remove		= rtl8367b_remove,
++	.shutdown	= rtl8367b_shutdown,
++};
++
++module_platform_driver(rtl8367b_driver);
++
++MODULE_DESCRIPTION("Realtek RTL8367B ethernet switch driver");
++MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
++MODULE_LICENSE("GPL v2");
++MODULE_ALIAS("platform:" RTL8367B_DRIVER_NAME);
++
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/swconfig.c b/target/linux/generic/files-5.4/drivers/net/phy/swconfig.c
+new file mode 100644
+index 0000000000..a734e57608
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/swconfig.c
+@@ -0,0 +1,1242 @@
++/*
++ * swconfig.c: Switch configuration API
++ *
++ * Copyright (C) 2008 Felix Fietkau <nbd@nbd.name>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
++
++#include <linux/types.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/list.h>
++#include <linux/if.h>
++#include <linux/if_ether.h>
++#include <linux/capability.h>
++#include <linux/skbuff.h>
++#include <linux/switch.h>
++#include <linux/of.h>
++#include <linux/version.h>
++#include <uapi/linux/mii.h>
++
++#define SWCONFIG_DEVNAME	"switch%d"
++
++#include "swconfig_leds.c"
++
++MODULE_AUTHOR("Felix Fietkau <nbd@nbd.name>");
++MODULE_LICENSE("GPL");
++
++static int swdev_id;
++static struct list_head swdevs;
++static DEFINE_MUTEX(swdevs_lock);
++struct swconfig_callback;
++
++struct swconfig_callback {
++	struct sk_buff *msg;
++	struct genlmsghdr *hdr;
++	struct genl_info *info;
++	int cmd;
++
++	/* callback for filling in the message data */
++	int (*fill)(struct swconfig_callback *cb, void *arg);
++
++	/* callback for closing the message before sending it */
++	int (*close)(struct swconfig_callback *cb, void *arg);
++
++	struct nlattr *nest[4];
++	int args[4];
++};
++
++/* defaults */
++
++static int
++swconfig_get_vlan_ports(struct switch_dev *dev, const struct switch_attr *attr,
++			struct switch_val *val)
++{
++	int ret;
++	if (val->port_vlan >= dev->vlans)
++		return -EINVAL;
++
++	if (!dev->ops->get_vlan_ports)
++		return -EOPNOTSUPP;
++
++	ret = dev->ops->get_vlan_ports(dev, val);
++	return ret;
++}
++
++static int
++swconfig_set_vlan_ports(struct switch_dev *dev, const struct switch_attr *attr,
++			struct switch_val *val)
++{
++	struct switch_port *ports = val->value.ports;
++	const struct switch_dev_ops *ops = dev->ops;
++	int i;
++
++	if (val->port_vlan >= dev->vlans)
++		return -EINVAL;
++
++	/* validate ports */
++	if (val->len > dev->ports)
++		return -EINVAL;
++
++	if (!ops->set_vlan_ports)
++		return -EOPNOTSUPP;
++
++	for (i = 0; i < val->len; i++) {
++		if (ports[i].id >= dev->ports)
++			return -EINVAL;
++
++		if (ops->set_port_pvid &&
++		    !(ports[i].flags & (1 << SWITCH_PORT_FLAG_TAGGED)))
++			ops->set_port_pvid(dev, ports[i].id, val->port_vlan);
++	}
++
++	return ops->set_vlan_ports(dev, val);
++}
++
++static int
++swconfig_set_pvid(struct switch_dev *dev, const struct switch_attr *attr,
++			struct switch_val *val)
++{
++	if (val->port_vlan >= dev->ports)
++		return -EINVAL;
++
++	if (!dev->ops->set_port_pvid)
++		return -EOPNOTSUPP;
++
++	return dev->ops->set_port_pvid(dev, val->port_vlan, val->value.i);
++}
++
++static int
++swconfig_get_pvid(struct switch_dev *dev, const struct switch_attr *attr,
++			struct switch_val *val)
++{
++	if (val->port_vlan >= dev->ports)
++		return -EINVAL;
++
++	if (!dev->ops->get_port_pvid)
++		return -EOPNOTSUPP;
++
++	return dev->ops->get_port_pvid(dev, val->port_vlan, &val->value.i);
++}
++
++static int
++swconfig_set_link(struct switch_dev *dev, const struct switch_attr *attr,
++			struct switch_val *val)
++{
++	if (!dev->ops->set_port_link)
++		return -EOPNOTSUPP;
++
++	return dev->ops->set_port_link(dev, val->port_vlan, val->value.link);
++}
++
++static int
++swconfig_get_link(struct switch_dev *dev, const struct switch_attr *attr,
++			struct switch_val *val)
++{
++	struct switch_port_link *link = val->value.link;
++
++	if (val->port_vlan >= dev->ports)
++		return -EINVAL;
++
++	if (!dev->ops->get_port_link)
++		return -EOPNOTSUPP;
++
++	memset(link, 0, sizeof(*link));
++	return dev->ops->get_port_link(dev, val->port_vlan, link);
++}
++
++static int
++swconfig_apply_config(struct switch_dev *dev, const struct switch_attr *attr,
++			struct switch_val *val)
++{
++	/* don't complain if not supported by the switch driver */
++	if (!dev->ops->apply_config)
++		return 0;
++
++	return dev->ops->apply_config(dev);
++}
++
++static int
++swconfig_reset_switch(struct switch_dev *dev, const struct switch_attr *attr,
++			struct switch_val *val)
++{
++	/* don't complain if not supported by the switch driver */
++	if (!dev->ops->reset_switch)
++		return 0;
++
++	return dev->ops->reset_switch(dev);
++}
++
++enum global_defaults {
++	GLOBAL_APPLY,
++	GLOBAL_RESET,
++};
++
++enum vlan_defaults {
++	VLAN_PORTS,
++};
++
++enum port_defaults {
++	PORT_PVID,
++	PORT_LINK,
++};
++
++static struct switch_attr default_global[] = {
++	[GLOBAL_APPLY] = {
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "apply",
++		.description = "Activate changes in the hardware",
++		.set = swconfig_apply_config,
++	},
++	[GLOBAL_RESET] = {
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "reset",
++		.description = "Reset the switch",
++		.set = swconfig_reset_switch,
++	}
++};
++
++static struct switch_attr default_port[] = {
++	[PORT_PVID] = {
++		.type = SWITCH_TYPE_INT,
++		.name = "pvid",
++		.description = "Primary VLAN ID",
++		.set = swconfig_set_pvid,
++		.get = swconfig_get_pvid,
++	},
++	[PORT_LINK] = {
++		.type = SWITCH_TYPE_LINK,
++		.name = "link",
++		.description = "Get port link information",
++		.set = swconfig_set_link,
++		.get = swconfig_get_link,
++	}
++};
++
++static struct switch_attr default_vlan[] = {
++	[VLAN_PORTS] = {
++		.type = SWITCH_TYPE_PORTS,
++		.name = "ports",
++		.description = "VLAN port mapping",
++		.set = swconfig_set_vlan_ports,
++		.get = swconfig_get_vlan_ports,
++	},
++};
++
++static const struct switch_attr *
++swconfig_find_attr_by_name(const struct switch_attrlist *alist,
++				const char *name)
++{
++	int i;
++
++	for (i = 0; i < alist->n_attr; i++)
++		if (strcmp(name, alist->attr[i].name) == 0)
++			return &alist->attr[i];
++
++	return NULL;
++}
++
++static void swconfig_defaults_init(struct switch_dev *dev)
++{
++	const struct switch_dev_ops *ops = dev->ops;
++
++	dev->def_global = 0;
++	dev->def_vlan = 0;
++	dev->def_port = 0;
++
++	if (ops->get_vlan_ports || ops->set_vlan_ports)
++		set_bit(VLAN_PORTS, &dev->def_vlan);
++
++	if (ops->get_port_pvid || ops->set_port_pvid)
++		set_bit(PORT_PVID, &dev->def_port);
++
++	if (ops->get_port_link &&
++	    !swconfig_find_attr_by_name(&ops->attr_port, "link"))
++		set_bit(PORT_LINK, &dev->def_port);
++
++	/* always present, can be no-op */
++	set_bit(GLOBAL_APPLY, &dev->def_global);
++	set_bit(GLOBAL_RESET, &dev->def_global);
++}
++
++
++static struct genl_family switch_fam;
++
++static const struct nla_policy switch_policy[SWITCH_ATTR_MAX+1] = {
++	[SWITCH_ATTR_ID] = { .type = NLA_U32 },
++	[SWITCH_ATTR_OP_ID] = { .type = NLA_U32 },
++	[SWITCH_ATTR_OP_PORT] = { .type = NLA_U32 },
++	[SWITCH_ATTR_OP_VLAN] = { .type = NLA_U32 },
++	[SWITCH_ATTR_OP_VALUE_INT] = { .type = NLA_U32 },
++	[SWITCH_ATTR_OP_VALUE_STR] = { .type = NLA_NUL_STRING },
++	[SWITCH_ATTR_OP_VALUE_PORTS] = { .type = NLA_NESTED },
++	[SWITCH_ATTR_TYPE] = { .type = NLA_U32 },
++};
++
++static const struct nla_policy port_policy[SWITCH_PORT_ATTR_MAX+1] = {
++	[SWITCH_PORT_ID] = { .type = NLA_U32 },
++	[SWITCH_PORT_FLAG_TAGGED] = { .type = NLA_FLAG },
++};
++
++static struct nla_policy link_policy[SWITCH_LINK_ATTR_MAX] = {
++	[SWITCH_LINK_FLAG_DUPLEX] = { .type = NLA_FLAG },
++	[SWITCH_LINK_FLAG_ANEG] = { .type = NLA_FLAG },
++	[SWITCH_LINK_SPEED] = { .type = NLA_U32 },
++};
++
++static inline void
++swconfig_lock(void)
++{
++	mutex_lock(&swdevs_lock);
++}
++
++static inline void
++swconfig_unlock(void)
++{
++	mutex_unlock(&swdevs_lock);
++}
++
++static struct switch_dev *
++swconfig_get_dev(struct genl_info *info)
++{
++	struct switch_dev *dev = NULL;
++	struct switch_dev *p;
++	int id;
++
++	if (!info->attrs[SWITCH_ATTR_ID])
++		goto done;
++
++	id = nla_get_u32(info->attrs[SWITCH_ATTR_ID]);
++	swconfig_lock();
++	list_for_each_entry(p, &swdevs, dev_list) {
++		if (id != p->id)
++			continue;
++
++		dev = p;
++		break;
++	}
++	if (dev)
++		mutex_lock(&dev->sw_mutex);
++	else
++		pr_debug("device %d not found\n", id);
++	swconfig_unlock();
++done:
++	return dev;
++}
++
++static inline void
++swconfig_put_dev(struct switch_dev *dev)
++{
++	mutex_unlock(&dev->sw_mutex);
++}
++
++static int
++swconfig_dump_attr(struct swconfig_callback *cb, void *arg)
++{
++	struct switch_attr *op = arg;
++	struct genl_info *info = cb->info;
++	struct sk_buff *msg = cb->msg;
++	int id = cb->args[0];
++	void *hdr;
++
++	hdr = genlmsg_put(msg, info->snd_portid, info->snd_seq, &switch_fam,
++			NLM_F_MULTI, SWITCH_CMD_NEW_ATTR);
++	if (IS_ERR(hdr))
++		return -1;
++
++	if (nla_put_u32(msg, SWITCH_ATTR_OP_ID, id))
++		goto nla_put_failure;
++	if (nla_put_u32(msg, SWITCH_ATTR_OP_TYPE, op->type))
++		goto nla_put_failure;
++	if (nla_put_string(msg, SWITCH_ATTR_OP_NAME, op->name))
++		goto nla_put_failure;
++	if (op->description)
++		if (nla_put_string(msg, SWITCH_ATTR_OP_DESCRIPTION,
++			op->description))
++			goto nla_put_failure;
++
++	genlmsg_end(msg, hdr);
++	return msg->len;
++nla_put_failure:
++	genlmsg_cancel(msg, hdr);
++	return -EMSGSIZE;
++}
++
++/* spread multipart messages across multiple message buffers */
++static int
++swconfig_send_multipart(struct swconfig_callback *cb, void *arg)
++{
++	struct genl_info *info = cb->info;
++	int restart = 0;
++	int err;
++
++	do {
++		if (!cb->msg) {
++			cb->msg = nlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL);
++			if (cb->msg == NULL)
++				goto error;
++		}
++
++		if (!(cb->fill(cb, arg) < 0))
++			break;
++
++		/* fill failed, check if this was already the second attempt */
++		if (restart)
++			goto error;
++
++		/* try again in a new message, send the current one */
++		restart = 1;
++		if (cb->close) {
++			if (cb->close(cb, arg) < 0)
++				goto error;
++		}
++		err = genlmsg_reply(cb->msg, info);
++		cb->msg = NULL;
++		if (err < 0)
++			goto error;
++
++	} while (restart);
++
++	return 0;
++
++error:
++	if (cb->msg)
++		nlmsg_free(cb->msg);
++	return -1;
++}
++
++static int
++swconfig_list_attrs(struct sk_buff *skb, struct genl_info *info)
++{
++	struct genlmsghdr *hdr = nlmsg_data(info->nlhdr);
++	const struct switch_attrlist *alist;
++	struct switch_dev *dev;
++	struct swconfig_callback cb;
++	int err = -EINVAL;
++	int i;
++
++	/* defaults */
++	struct switch_attr *def_list;
++	unsigned long *def_active;
++	int n_def;
++
++	dev = swconfig_get_dev(info);
++	if (!dev)
++		return -EINVAL;
++
++	switch (hdr->cmd) {
++	case SWITCH_CMD_LIST_GLOBAL:
++		alist = &dev->ops->attr_global;
++		def_list = default_global;
++		def_active = &dev->def_global;
++		n_def = ARRAY_SIZE(default_global);
++		break;
++	case SWITCH_CMD_LIST_VLAN:
++		alist = &dev->ops->attr_vlan;
++		def_list = default_vlan;
++		def_active = &dev->def_vlan;
++		n_def = ARRAY_SIZE(default_vlan);
++		break;
++	case SWITCH_CMD_LIST_PORT:
++		alist = &dev->ops->attr_port;
++		def_list = default_port;
++		def_active = &dev->def_port;
++		n_def = ARRAY_SIZE(default_port);
++		break;
++	default:
++		WARN_ON(1);
++		goto out;
++	}
++
++	memset(&cb, 0, sizeof(cb));
++	cb.info = info;
++	cb.fill = swconfig_dump_attr;
++	for (i = 0; i < alist->n_attr; i++) {
++		if (alist->attr[i].disabled)
++			continue;
++		cb.args[0] = i;
++		err = swconfig_send_multipart(&cb, (void *) &alist->attr[i]);
++		if (err < 0)
++			goto error;
++	}
++
++	/* defaults */
++	for (i = 0; i < n_def; i++) {
++		if (!test_bit(i, def_active))
++			continue;
++		cb.args[0] = SWITCH_ATTR_DEFAULTS_OFFSET + i;
++		err = swconfig_send_multipart(&cb, (void *) &def_list[i]);
++		if (err < 0)
++			goto error;
++	}
++	swconfig_put_dev(dev);
++
++	if (!cb.msg)
++		return 0;
++
++	return genlmsg_reply(cb.msg, info);
++
++error:
++	if (cb.msg)
++		nlmsg_free(cb.msg);
++out:
++	swconfig_put_dev(dev);
++	return err;
++}
++
++static const struct switch_attr *
++swconfig_lookup_attr(struct switch_dev *dev, struct genl_info *info,
++		struct switch_val *val)
++{
++	struct genlmsghdr *hdr = nlmsg_data(info->nlhdr);
++	const struct switch_attrlist *alist;
++	const struct switch_attr *attr = NULL;
++	unsigned int attr_id;
++
++	/* defaults */
++	struct switch_attr *def_list;
++	unsigned long *def_active;
++	int n_def;
++
++	if (!info->attrs[SWITCH_ATTR_OP_ID])
++		goto done;
++
++	switch (hdr->cmd) {
++	case SWITCH_CMD_SET_GLOBAL:
++	case SWITCH_CMD_GET_GLOBAL:
++		alist = &dev->ops->attr_global;
++		def_list = default_global;
++		def_active = &dev->def_global;
++		n_def = ARRAY_SIZE(default_global);
++		break;
++	case SWITCH_CMD_SET_VLAN:
++	case SWITCH_CMD_GET_VLAN:
++		alist = &dev->ops->attr_vlan;
++		def_list = default_vlan;
++		def_active = &dev->def_vlan;
++		n_def = ARRAY_SIZE(default_vlan);
++		if (!info->attrs[SWITCH_ATTR_OP_VLAN])
++			goto done;
++		val->port_vlan = nla_get_u32(info->attrs[SWITCH_ATTR_OP_VLAN]);
++		if (val->port_vlan >= dev->vlans)
++			goto done;
++		break;
++	case SWITCH_CMD_SET_PORT:
++	case SWITCH_CMD_GET_PORT:
++		alist = &dev->ops->attr_port;
++		def_list = default_port;
++		def_active = &dev->def_port;
++		n_def = ARRAY_SIZE(default_port);
++		if (!info->attrs[SWITCH_ATTR_OP_PORT])
++			goto done;
++		val->port_vlan = nla_get_u32(info->attrs[SWITCH_ATTR_OP_PORT]);
++		if (val->port_vlan >= dev->ports)
++			goto done;
++		break;
++	default:
++		WARN_ON(1);
++		goto done;
++	}
++
++	if (!alist)
++		goto done;
++
++	attr_id = nla_get_u32(info->attrs[SWITCH_ATTR_OP_ID]);
++	if (attr_id >= SWITCH_ATTR_DEFAULTS_OFFSET) {
++		attr_id -= SWITCH_ATTR_DEFAULTS_OFFSET;
++		if (attr_id >= n_def)
++			goto done;
++		if (!test_bit(attr_id, def_active))
++			goto done;
++		attr = &def_list[attr_id];
++	} else {
++		if (attr_id >= alist->n_attr)
++			goto done;
++		attr = &alist->attr[attr_id];
++	}
++
++	if (attr->disabled)
++		attr = NULL;
++
++done:
++	if (!attr)
++		pr_debug("attribute lookup failed\n");
++	val->attr = attr;
++	return attr;
++}
++
++static int
++swconfig_parse_ports(struct sk_buff *msg, struct nlattr *head,
++		struct switch_val *val, int max)
++{
++	struct nlattr *nla;
++	int rem;
++
++	val->len = 0;
++	nla_for_each_nested(nla, head, rem) {
++		struct nlattr *tb[SWITCH_PORT_ATTR_MAX+1];
++		struct switch_port *port;
++
++		if (val->len >= max)
++			return -EINVAL;
++
++		port = &val->value.ports[val->len];
++
++		if (nla_parse_nested_deprecated(tb, SWITCH_PORT_ATTR_MAX, nla,
++				port_policy, NULL))
++			return -EINVAL;
++
++		if (!tb[SWITCH_PORT_ID])
++			return -EINVAL;
++
++		port->id = nla_get_u32(tb[SWITCH_PORT_ID]);
++		if (tb[SWITCH_PORT_FLAG_TAGGED])
++			port->flags |= (1 << SWITCH_PORT_FLAG_TAGGED);
++		val->len++;
++	}
++
++	return 0;
++}
++
++static int
++swconfig_parse_link(struct sk_buff *msg, struct nlattr *nla,
++		    struct switch_port_link *link)
++{
++	struct nlattr *tb[SWITCH_LINK_ATTR_MAX + 1];
++
++	if (nla_parse_nested_deprecated(tb, SWITCH_LINK_ATTR_MAX, nla, link_policy, NULL))
++		return -EINVAL;
++
++	link->duplex = !!tb[SWITCH_LINK_FLAG_DUPLEX];
++	link->aneg = !!tb[SWITCH_LINK_FLAG_ANEG];
++	link->speed = nla_get_u32(tb[SWITCH_LINK_SPEED]);
++
++	return 0;
++}
++
++static int
++swconfig_set_attr(struct sk_buff *skb, struct genl_info *info)
++{
++	const struct switch_attr *attr;
++	struct switch_dev *dev;
++	struct switch_val val;
++	int err = -EINVAL;
++
++	if (!capable(CAP_NET_ADMIN))
++		return -EPERM;
++
++	dev = swconfig_get_dev(info);
++	if (!dev)
++		return -EINVAL;
++
++	memset(&val, 0, sizeof(val));
++	attr = swconfig_lookup_attr(dev, info, &val);
++	if (!attr || !attr->set)
++		goto error;
++
++	val.attr = attr;
++	switch (attr->type) {
++	case SWITCH_TYPE_NOVAL:
++		break;
++	case SWITCH_TYPE_INT:
++		if (!info->attrs[SWITCH_ATTR_OP_VALUE_INT])
++			goto error;
++		val.value.i =
++			nla_get_u32(info->attrs[SWITCH_ATTR_OP_VALUE_INT]);
++		break;
++	case SWITCH_TYPE_STRING:
++		if (!info->attrs[SWITCH_ATTR_OP_VALUE_STR])
++			goto error;
++		val.value.s =
++			nla_data(info->attrs[SWITCH_ATTR_OP_VALUE_STR]);
++		break;
++	case SWITCH_TYPE_PORTS:
++		val.value.ports = dev->portbuf;
++		memset(dev->portbuf, 0,
++			sizeof(struct switch_port) * dev->ports);
++
++		/* TODO: implement multipart? */
++		if (info->attrs[SWITCH_ATTR_OP_VALUE_PORTS]) {
++			err = swconfig_parse_ports(skb,
++				info->attrs[SWITCH_ATTR_OP_VALUE_PORTS],
++				&val, dev->ports);
++			if (err < 0)
++				goto error;
++		} else {
++			val.len = 0;
++			err = 0;
++		}
++		break;
++	case SWITCH_TYPE_LINK:
++		val.value.link = &dev->linkbuf;
++		memset(&dev->linkbuf, 0, sizeof(struct switch_port_link));
++
++		if (info->attrs[SWITCH_ATTR_OP_VALUE_LINK]) {
++			err = swconfig_parse_link(skb,
++						  info->attrs[SWITCH_ATTR_OP_VALUE_LINK],
++						  val.value.link);
++			if (err < 0)
++				goto error;
++		} else {
++			val.len = 0;
++			err = 0;
++		}
++		break;
++	default:
++		goto error;
++	}
++
++	err = attr->set(dev, attr, &val);
++error:
++	swconfig_put_dev(dev);
++	return err;
++}
++
++static int
++swconfig_close_portlist(struct swconfig_callback *cb, void *arg)
++{
++	if (cb->nest[0])
++		nla_nest_end(cb->msg, cb->nest[0]);
++	return 0;
++}
++
++static int
++swconfig_send_port(struct swconfig_callback *cb, void *arg)
++{
++	const struct switch_port *port = arg;
++	struct nlattr *p = NULL;
++
++	if (!cb->nest[0]) {
++		cb->nest[0] = nla_nest_start(cb->msg, cb->cmd);
++		if (!cb->nest[0])
++			return -1;
++	}
++
++	p = nla_nest_start(cb->msg, SWITCH_ATTR_PORT);
++	if (!p)
++		goto error;
++
++	if (nla_put_u32(cb->msg, SWITCH_PORT_ID, port->id))
++		goto nla_put_failure;
++	if (port->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
++		if (nla_put_flag(cb->msg, SWITCH_PORT_FLAG_TAGGED))
++			goto nla_put_failure;
++	}
++
++	nla_nest_end(cb->msg, p);
++	return 0;
++
++nla_put_failure:
++		nla_nest_cancel(cb->msg, p);
++error:
++	nla_nest_cancel(cb->msg, cb->nest[0]);
++	return -1;
++}
++
++static int
++swconfig_send_ports(struct sk_buff **msg, struct genl_info *info, int attr,
++		const struct switch_val *val)
++{
++	struct swconfig_callback cb;
++	int err = 0;
++	int i;
++
++	if (!val->value.ports)
++		return -EINVAL;
++
++	memset(&cb, 0, sizeof(cb));
++	cb.cmd = attr;
++	cb.msg = *msg;
++	cb.info = info;
++	cb.fill = swconfig_send_port;
++	cb.close = swconfig_close_portlist;
++
++	cb.nest[0] = nla_nest_start(cb.msg, cb.cmd);
++	for (i = 0; i < val->len; i++) {
++		err = swconfig_send_multipart(&cb, &val->value.ports[i]);
++		if (err)
++			goto done;
++	}
++	err = val->len;
++	swconfig_close_portlist(&cb, NULL);
++	*msg = cb.msg;
++
++done:
++	return err;
++}
++
++static int
++swconfig_send_link(struct sk_buff *msg, struct genl_info *info, int attr,
++		   const struct switch_port_link *link)
++{
++	struct nlattr *p = NULL;
++	int err = 0;
++
++	p = nla_nest_start(msg, attr);
++	if (link->link) {
++		if (nla_put_flag(msg, SWITCH_LINK_FLAG_LINK))
++			goto nla_put_failure;
++	}
++	if (link->duplex) {
++		if (nla_put_flag(msg, SWITCH_LINK_FLAG_DUPLEX))
++			goto nla_put_failure;
++	}
++	if (link->aneg) {
++		if (nla_put_flag(msg, SWITCH_LINK_FLAG_ANEG))
++			goto nla_put_failure;
++	}
++	if (link->tx_flow) {
++		if (nla_put_flag(msg, SWITCH_LINK_FLAG_TX_FLOW))
++			goto nla_put_failure;
++	}
++	if (link->rx_flow) {
++		if (nla_put_flag(msg, SWITCH_LINK_FLAG_RX_FLOW))
++			goto nla_put_failure;
++	}
++	if (nla_put_u32(msg, SWITCH_LINK_SPEED, link->speed))
++		goto nla_put_failure;
++	if (link->eee & ADVERTISED_100baseT_Full) {
++		if (nla_put_flag(msg, SWITCH_LINK_FLAG_EEE_100BASET))
++			goto nla_put_failure;
++	}
++	if (link->eee & ADVERTISED_1000baseT_Full) {
++		if (nla_put_flag(msg, SWITCH_LINK_FLAG_EEE_1000BASET))
++			goto nla_put_failure;
++	}
++	nla_nest_end(msg, p);
++
++	return err;
++
++nla_put_failure:
++	nla_nest_cancel(msg, p);
++	return -1;
++}
++
++static int
++swconfig_get_attr(struct sk_buff *skb, struct genl_info *info)
++{
++	struct genlmsghdr *hdr = nlmsg_data(info->nlhdr);
++	const struct switch_attr *attr;
++	struct switch_dev *dev;
++	struct sk_buff *msg = NULL;
++	struct switch_val val;
++	int err = -EINVAL;
++	int cmd = hdr->cmd;
++
++	dev = swconfig_get_dev(info);
++	if (!dev)
++		return -EINVAL;
++
++	memset(&val, 0, sizeof(val));
++	attr = swconfig_lookup_attr(dev, info, &val);
++	if (!attr || !attr->get)
++		goto error;
++
++	if (attr->type == SWITCH_TYPE_PORTS) {
++		val.value.ports = dev->portbuf;
++		memset(dev->portbuf, 0,
++			sizeof(struct switch_port) * dev->ports);
++	} else if (attr->type == SWITCH_TYPE_LINK) {
++		val.value.link = &dev->linkbuf;
++		memset(&dev->linkbuf, 0, sizeof(struct switch_port_link));
++	}
++
++	err = attr->get(dev, attr, &val);
++	if (err)
++		goto error;
++
++	msg = nlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL);
++	if (!msg)
++		goto error;
++
++	hdr = genlmsg_put(msg, info->snd_portid, info->snd_seq, &switch_fam,
++			0, cmd);
++	if (IS_ERR(hdr))
++		goto nla_put_failure;
++
++	switch (attr->type) {
++	case SWITCH_TYPE_INT:
++		if (nla_put_u32(msg, SWITCH_ATTR_OP_VALUE_INT, val.value.i))
++			goto nla_put_failure;
++		break;
++	case SWITCH_TYPE_STRING:
++		if (nla_put_string(msg, SWITCH_ATTR_OP_VALUE_STR, val.value.s))
++			goto nla_put_failure;
++		break;
++	case SWITCH_TYPE_PORTS:
++		err = swconfig_send_ports(&msg, info,
++				SWITCH_ATTR_OP_VALUE_PORTS, &val);
++		if (err < 0)
++			goto nla_put_failure;
++		break;
++	case SWITCH_TYPE_LINK:
++		err = swconfig_send_link(msg, info,
++					 SWITCH_ATTR_OP_VALUE_LINK, val.value.link);
++		if (err < 0)
++			goto nla_put_failure;
++		break;
++	default:
++		pr_debug("invalid type in attribute\n");
++		err = -EINVAL;
++		goto nla_put_failure;
++	}
++	genlmsg_end(msg, hdr);
++	err = msg->len;
++	if (err < 0)
++		goto nla_put_failure;
++
++	swconfig_put_dev(dev);
++	return genlmsg_reply(msg, info);
++
++nla_put_failure:
++	if (msg)
++		nlmsg_free(msg);
++error:
++	swconfig_put_dev(dev);
++	if (!err)
++		err = -ENOMEM;
++	return err;
++}
++
++static int
++swconfig_send_switch(struct sk_buff *msg, u32 pid, u32 seq, int flags,
++		const struct switch_dev *dev)
++{
++	struct nlattr *p = NULL, *m = NULL;
++	void *hdr;
++	int i;
++
++	hdr = genlmsg_put(msg, pid, seq, &switch_fam, flags,
++			SWITCH_CMD_NEW_ATTR);
++	if (IS_ERR(hdr))
++		return -1;
++
++	if (nla_put_u32(msg, SWITCH_ATTR_ID, dev->id))
++		goto nla_put_failure;
++	if (nla_put_string(msg, SWITCH_ATTR_DEV_NAME, dev->devname))
++		goto nla_put_failure;
++	if (nla_put_string(msg, SWITCH_ATTR_ALIAS, dev->alias))
++		goto nla_put_failure;
++	if (nla_put_string(msg, SWITCH_ATTR_NAME, dev->name))
++		goto nla_put_failure;
++	if (nla_put_u32(msg, SWITCH_ATTR_VLANS, dev->vlans))
++		goto nla_put_failure;
++	if (nla_put_u32(msg, SWITCH_ATTR_PORTS, dev->ports))
++		goto nla_put_failure;
++	if (nla_put_u32(msg, SWITCH_ATTR_CPU_PORT, dev->cpu_port))
++		goto nla_put_failure;
++
++	m = nla_nest_start(msg, SWITCH_ATTR_PORTMAP);
++	if (!m)
++		goto nla_put_failure;
++	for (i = 0; i < dev->ports; i++) {
++		p = nla_nest_start(msg, SWITCH_ATTR_PORTS);
++		if (!p)
++			continue;
++		if (dev->portmap[i].s) {
++			if (nla_put_string(msg, SWITCH_PORTMAP_SEGMENT,
++						dev->portmap[i].s))
++				goto nla_put_failure;
++			if (nla_put_u32(msg, SWITCH_PORTMAP_VIRT,
++						dev->portmap[i].virt))
++				goto nla_put_failure;
++		}
++		nla_nest_end(msg, p);
++	}
++	nla_nest_end(msg, m);
++	genlmsg_end(msg, hdr);
++	return msg->len;
++nla_put_failure:
++	genlmsg_cancel(msg, hdr);
++	return -EMSGSIZE;
++}
++
++static int swconfig_dump_switches(struct sk_buff *skb,
++		struct netlink_callback *cb)
++{
++	struct switch_dev *dev;
++	int start = cb->args[0];
++	int idx = 0;
++
++	swconfig_lock();
++	list_for_each_entry(dev, &swdevs, dev_list) {
++		if (++idx <= start)
++			continue;
++		if (swconfig_send_switch(skb, NETLINK_CB(cb->skb).portid,
++				cb->nlh->nlmsg_seq, NLM_F_MULTI,
++				dev) < 0)
++			break;
++	}
++	swconfig_unlock();
++	cb->args[0] = idx;
++
++	return skb->len;
++}
++
++static int
++swconfig_done(struct netlink_callback *cb)
++{
++	return 0;
++}
++
++static struct genl_ops swconfig_ops[] = {
++	{
++		.cmd = SWITCH_CMD_LIST_GLOBAL,
++		.validate = GENL_DONT_VALIDATE_STRICT | GENL_DONT_VALIDATE_DUMP,
++		.doit = swconfig_list_attrs,
++	},
++	{
++		.cmd = SWITCH_CMD_LIST_VLAN,
++		.validate = GENL_DONT_VALIDATE_STRICT | GENL_DONT_VALIDATE_DUMP,
++		.doit = swconfig_list_attrs,
++	},
++	{
++		.cmd = SWITCH_CMD_LIST_PORT,
++		.validate = GENL_DONT_VALIDATE_STRICT | GENL_DONT_VALIDATE_DUMP,
++		.doit = swconfig_list_attrs,
++	},
++	{
++		.cmd = SWITCH_CMD_GET_GLOBAL,
++		.validate = GENL_DONT_VALIDATE_STRICT | GENL_DONT_VALIDATE_DUMP,
++		.doit = swconfig_get_attr,
++	},
++	{
++		.cmd = SWITCH_CMD_GET_VLAN,
++		.validate = GENL_DONT_VALIDATE_STRICT | GENL_DONT_VALIDATE_DUMP,
++		.doit = swconfig_get_attr,
++	},
++	{
++		.cmd = SWITCH_CMD_GET_PORT,
++		.validate = GENL_DONT_VALIDATE_STRICT | GENL_DONT_VALIDATE_DUMP,
++		.doit = swconfig_get_attr,
++	},
++	{
++		.cmd = SWITCH_CMD_SET_GLOBAL,
++		.validate = GENL_DONT_VALIDATE_STRICT | GENL_DONT_VALIDATE_DUMP,
++		.flags = GENL_ADMIN_PERM,
++		.doit = swconfig_set_attr,
++	},
++	{
++		.cmd = SWITCH_CMD_SET_VLAN,
++		.validate = GENL_DONT_VALIDATE_STRICT | GENL_DONT_VALIDATE_DUMP,
++		.flags = GENL_ADMIN_PERM,
++		.doit = swconfig_set_attr,
++	},
++	{
++		.cmd = SWITCH_CMD_SET_PORT,
++		.validate = GENL_DONT_VALIDATE_STRICT | GENL_DONT_VALIDATE_DUMP,
++		.flags = GENL_ADMIN_PERM,
++		.doit = swconfig_set_attr,
++	},
++	{
++		.cmd = SWITCH_CMD_GET_SWITCH,
++		.validate = GENL_DONT_VALIDATE_STRICT | GENL_DONT_VALIDATE_DUMP,
++		.dumpit = swconfig_dump_switches,
++		.done = swconfig_done,
++	}
++};
++
++static struct genl_family switch_fam = {
++	.name = "switch",
++	.hdrsize = 0,
++	.version = 1,
++	.maxattr = SWITCH_ATTR_MAX,
++	.policy = switch_policy,
++	.module = THIS_MODULE,
++	.ops = swconfig_ops,
++	.n_ops = ARRAY_SIZE(swconfig_ops),
++};
++
++#ifdef CONFIG_OF
++void
++of_switch_load_portmap(struct switch_dev *dev)
++{
++	struct device_node *port;
++
++	if (!dev->of_node)
++		return;
++
++	for_each_child_of_node(dev->of_node, port) {
++		const __be32 *prop;
++		const char *segment;
++		int size, phys;
++
++		if (!of_device_is_compatible(port, "swconfig,port"))
++			continue;
++
++		if (of_property_read_string(port, "swconfig,segment", &segment))
++			continue;
++
++		prop = of_get_property(port, "swconfig,portmap", &size);
++		if (!prop)
++			continue;
++
++		if (size != (2 * sizeof(*prop))) {
++			pr_err("%s: failed to parse port mapping\n",
++					port->name);
++			continue;
++		}
++
++		phys = be32_to_cpup(prop++);
++		if ((phys < 0) | (phys >= dev->ports)) {
++			pr_err("%s: physical port index out of range\n",
++					port->name);
++			continue;
++		}
++
++		dev->portmap[phys].s = kstrdup(segment, GFP_KERNEL);
++		dev->portmap[phys].virt = be32_to_cpup(prop);
++		pr_debug("Found port: %s, physical: %d, virtual: %d\n",
++			segment, phys, dev->portmap[phys].virt);
++	}
++}
++#endif
++
++int
++register_switch(struct switch_dev *dev, struct net_device *netdev)
++{
++	struct switch_dev *sdev;
++	const int max_switches = 8 * sizeof(unsigned long);
++	unsigned long in_use = 0;
++	int err;
++	int i;
++
++	INIT_LIST_HEAD(&dev->dev_list);
++	if (netdev) {
++		dev->netdev = netdev;
++		if (!dev->alias)
++			dev->alias = netdev->name;
++	}
++	BUG_ON(!dev->alias);
++
++	/* Make sure swdev_id doesn't overflow */
++	if (swdev_id == INT_MAX) {
++		return -ENOMEM;
++	}
++
++	if (dev->ports > 0) {
++		dev->portbuf = kzalloc(sizeof(struct switch_port) *
++				dev->ports, GFP_KERNEL);
++		if (!dev->portbuf)
++			return -ENOMEM;
++		dev->portmap = kzalloc(sizeof(struct switch_portmap) *
++				dev->ports, GFP_KERNEL);
++		if (!dev->portmap) {
++			kfree(dev->portbuf);
++			return -ENOMEM;
++		}
++	}
++	swconfig_defaults_init(dev);
++	mutex_init(&dev->sw_mutex);
++	swconfig_lock();
++	dev->id = ++swdev_id;
++
++	list_for_each_entry(sdev, &swdevs, dev_list) {
++		if (!sscanf(sdev->devname, SWCONFIG_DEVNAME, &i))
++			continue;
++		if (i < 0 || i > max_switches)
++			continue;
++
++		set_bit(i, &in_use);
++	}
++	i = find_first_zero_bit(&in_use, max_switches);
++
++	if (i == max_switches) {
++		swconfig_unlock();
++		return -ENFILE;
++	}
++
++#ifdef CONFIG_OF
++	if (dev->ports)
++		of_switch_load_portmap(dev);
++#endif
++
++	/* fill device name */
++	snprintf(dev->devname, IFNAMSIZ, SWCONFIG_DEVNAME, i);
++
++	list_add_tail(&dev->dev_list, &swdevs);
++	swconfig_unlock();
++
++	err = swconfig_create_led_trigger(dev);
++	if (err)
++		return err;
++
++	return 0;
++}
++EXPORT_SYMBOL_GPL(register_switch);
++
++void
++unregister_switch(struct switch_dev *dev)
++{
++	swconfig_destroy_led_trigger(dev);
++	kfree(dev->portbuf);
++	mutex_lock(&dev->sw_mutex);
++	swconfig_lock();
++	list_del(&dev->dev_list);
++	swconfig_unlock();
++	mutex_unlock(&dev->sw_mutex);
++}
++EXPORT_SYMBOL_GPL(unregister_switch);
++
++int
++switch_generic_set_link(struct switch_dev *dev, int port,
++			struct switch_port_link *link)
++{
++	if (WARN_ON(!dev->ops->phy_write16))
++		return -ENOTSUPP;
++
++	/* Generic implementation */
++	if (link->aneg) {
++		dev->ops->phy_write16(dev, port, MII_BMCR, 0x0000);
++		dev->ops->phy_write16(dev, port, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
++	} else {
++		u16 bmcr = 0;
++
++		if (link->duplex)
++			bmcr |= BMCR_FULLDPLX;
++
++		switch (link->speed) {
++		case SWITCH_PORT_SPEED_10:
++			break;
++		case SWITCH_PORT_SPEED_100:
++			bmcr |= BMCR_SPEED100;
++			break;
++		case SWITCH_PORT_SPEED_1000:
++			bmcr |= BMCR_SPEED1000;
++			break;
++		default:
++			return -ENOTSUPP;
++		}
++
++		dev->ops->phy_write16(dev, port, MII_BMCR, bmcr);
++	}
++
++	return 0;
++}
++EXPORT_SYMBOL_GPL(switch_generic_set_link);
++
++static int __init
++swconfig_init(void)
++{
++	INIT_LIST_HEAD(&swdevs);
++
++	return genl_register_family(&switch_fam);
++}
++
++static void __exit
++swconfig_exit(void)
++{
++	genl_unregister_family(&switch_fam);
++}
++
++module_init(swconfig_init);
++module_exit(swconfig_exit);
+diff --git a/target/linux/generic/files-5.4/drivers/net/phy/swconfig_leds.c b/target/linux/generic/files-5.4/drivers/net/phy/swconfig_leds.c
+new file mode 100644
+index 0000000000..df53e5cd4a
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/net/phy/swconfig_leds.c
+@@ -0,0 +1,555 @@
++/*
++ * swconfig_led.c: LED trigger support for the switch configuration API
++ *
++ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ *
++ */
++
++#ifdef CONFIG_SWCONFIG_LEDS
++
++#include <linux/leds.h>
++#include <linux/ctype.h>
++#include <linux/device.h>
++#include <linux/workqueue.h>
++
++#define SWCONFIG_LED_TIMER_INTERVAL	(HZ / 10)
++#define SWCONFIG_LED_NUM_PORTS		32
++
++#define SWCONFIG_LED_PORT_SPEED_NA	0x01	/* unknown speed */
++#define SWCONFIG_LED_PORT_SPEED_10	0x02	/* 10 Mbps */
++#define SWCONFIG_LED_PORT_SPEED_100	0x04	/* 100 Mbps */
++#define SWCONFIG_LED_PORT_SPEED_1000	0x08	/* 1000 Mbps */
++#define SWCONFIG_LED_PORT_SPEED_ALL	(SWCONFIG_LED_PORT_SPEED_NA | \
++					 SWCONFIG_LED_PORT_SPEED_10 | \
++					 SWCONFIG_LED_PORT_SPEED_100 | \
++					 SWCONFIG_LED_PORT_SPEED_1000)
++
++#define SWCONFIG_LED_MODE_LINK		0x01
++#define SWCONFIG_LED_MODE_TX		0x02
++#define SWCONFIG_LED_MODE_RX		0x04
++#define SWCONFIG_LED_MODE_TXRX		(SWCONFIG_LED_MODE_TX   | \
++					 SWCONFIG_LED_MODE_RX)
++#define SWCONFIG_LED_MODE_ALL		(SWCONFIG_LED_MODE_LINK | \
++					 SWCONFIG_LED_MODE_TX   | \
++					 SWCONFIG_LED_MODE_RX)
++
++struct switch_led_trigger {
++	struct led_trigger trig;
++	struct switch_dev *swdev;
++
++	struct delayed_work sw_led_work;
++	u32 port_mask;
++	u32 port_link;
++	unsigned long long port_tx_traffic[SWCONFIG_LED_NUM_PORTS];
++	unsigned long long port_rx_traffic[SWCONFIG_LED_NUM_PORTS];
++	u8 link_speed[SWCONFIG_LED_NUM_PORTS];
++};
++
++struct swconfig_trig_data {
++	struct led_classdev *led_cdev;
++	struct switch_dev *swdev;
++
++	rwlock_t lock;
++	u32 port_mask;
++
++	bool prev_link;
++	unsigned long prev_traffic;
++	enum led_brightness prev_brightness;
++	u8 mode;
++	u8 speed_mask;
++};
++
++static void
++swconfig_trig_set_brightness(struct swconfig_trig_data *trig_data,
++			     enum led_brightness brightness)
++{
++	led_set_brightness(trig_data->led_cdev, brightness);
++	trig_data->prev_brightness = brightness;
++}
++
++static void
++swconfig_trig_update_port_mask(struct led_trigger *trigger)
++{
++	struct list_head *entry;
++	struct switch_led_trigger *sw_trig;
++	u32 port_mask;
++
++	if (!trigger)
++		return;
++
++	sw_trig = (void *) trigger;
++
++	port_mask = 0;
++	read_lock(&trigger->leddev_list_lock);
++	list_for_each(entry, &trigger->led_cdevs) {
++		struct led_classdev *led_cdev;
++		struct swconfig_trig_data *trig_data;
++
++		led_cdev = list_entry(entry, struct led_classdev, trig_list);
++		trig_data = led_cdev->trigger_data;
++		if (trig_data) {
++			read_lock(&trig_data->lock);
++			port_mask |= trig_data->port_mask;
++			read_unlock(&trig_data->lock);
++		}
++	}
++	read_unlock(&trigger->leddev_list_lock);
++
++	sw_trig->port_mask = port_mask;
++
++	if (port_mask)
++		schedule_delayed_work(&sw_trig->sw_led_work,
++				      SWCONFIG_LED_TIMER_INTERVAL);
++	else
++		cancel_delayed_work_sync(&sw_trig->sw_led_work);
++}
++
++static ssize_t
++swconfig_trig_port_mask_store(struct device *dev, struct device_attribute *attr,
++			      const char *buf, size_t size)
++{
++	struct led_classdev *led_cdev = dev_get_drvdata(dev);
++	struct swconfig_trig_data *trig_data = led_cdev->trigger_data;
++	unsigned long port_mask;
++	int ret;
++	bool changed;
++
++	ret = kstrtoul(buf, 0, &port_mask);
++	if (ret)
++		return ret;
++
++	write_lock(&trig_data->lock);
++	changed = (trig_data->port_mask != port_mask);
++	trig_data->port_mask = port_mask;
++	write_unlock(&trig_data->lock);
++
++	if (changed) {
++		if (port_mask == 0)
++			swconfig_trig_set_brightness(trig_data, LED_OFF);
++
++		swconfig_trig_update_port_mask(led_cdev->trigger);
++	}
++
++	return size;
++}
++
++static ssize_t
++swconfig_trig_port_mask_show(struct device *dev, struct device_attribute *attr,
++			     char *buf)
++{
++	struct led_classdev *led_cdev = dev_get_drvdata(dev);
++	struct swconfig_trig_data *trig_data = led_cdev->trigger_data;
++	u32 port_mask;
++
++	read_lock(&trig_data->lock);
++	port_mask = trig_data->port_mask;
++	read_unlock(&trig_data->lock);
++
++	sprintf(buf, "%#x\n", port_mask);
++
++	return strlen(buf) + 1;
++}
++
++static DEVICE_ATTR(port_mask, 0644, swconfig_trig_port_mask_show,
++		   swconfig_trig_port_mask_store);
++
++/* speed_mask file handler - display value */
++static ssize_t swconfig_trig_speed_mask_show(struct device *dev,
++					     struct device_attribute *attr,
++					     char *buf)
++{
++	struct led_classdev *led_cdev = dev_get_drvdata(dev);
++	struct swconfig_trig_data *trig_data = led_cdev->trigger_data;
++	u8 speed_mask;
++
++	read_lock(&trig_data->lock);
++	speed_mask = trig_data->speed_mask;
++	read_unlock(&trig_data->lock);
++
++	sprintf(buf, "%#x\n", speed_mask);
++
++	return strlen(buf) + 1;
++}
++
++/* speed_mask file handler - store value */
++static ssize_t swconfig_trig_speed_mask_store(struct device *dev,
++					      struct device_attribute *attr,
++					      const char *buf, size_t size)
++{
++	struct led_classdev *led_cdev = dev_get_drvdata(dev);
++	struct swconfig_trig_data *trig_data = led_cdev->trigger_data;
++	u8 speed_mask;
++	int ret;
++
++	ret = kstrtou8(buf, 0, &speed_mask);
++	if (ret)
++		return ret;
++
++	write_lock(&trig_data->lock);
++	trig_data->speed_mask = speed_mask & SWCONFIG_LED_PORT_SPEED_ALL;
++	write_unlock(&trig_data->lock);
++
++	return size;
++}
++
++/* speed_mask special file */
++static DEVICE_ATTR(speed_mask, 0644, swconfig_trig_speed_mask_show,
++		   swconfig_trig_speed_mask_store);
++
++static ssize_t swconfig_trig_mode_show(struct device *dev,
++		struct device_attribute *attr, char *buf)
++{
++	struct led_classdev *led_cdev = dev_get_drvdata(dev);
++	struct swconfig_trig_data *trig_data = led_cdev->trigger_data;
++	u8 mode;
++
++	read_lock(&trig_data->lock);
++	mode = trig_data->mode;
++	read_unlock(&trig_data->lock);
++
++	if (mode == 0) {
++		strcpy(buf, "none\n");
++	} else {
++		if (mode & SWCONFIG_LED_MODE_LINK)
++			strcat(buf, "link ");
++		if (mode & SWCONFIG_LED_MODE_TX)
++			strcat(buf, "tx ");
++		if (mode & SWCONFIG_LED_MODE_RX)
++			strcat(buf, "rx ");
++		strcat(buf, "\n");
++	}
++
++	return strlen(buf)+1;
++}
++
++static ssize_t swconfig_trig_mode_store(struct device *dev,
++		struct device_attribute *attr, const char *buf, size_t size)
++{
++	struct led_classdev *led_cdev = dev_get_drvdata(dev);
++	struct swconfig_trig_data *trig_data = led_cdev->trigger_data;
++	char copybuf[128];
++	int new_mode = -1;
++	char *p, *token;
++
++	/* take a copy since we don't want to trash the inbound buffer when using strsep */
++	strncpy(copybuf, buf, sizeof(copybuf));
++	copybuf[sizeof(copybuf) - 1] = 0;
++	p = copybuf;
++
++	while ((token = strsep(&p, " \t\n")) != NULL) {
++		if (!*token)
++			continue;
++
++		if (new_mode < 0)
++			new_mode = 0;
++
++		if (!strcmp(token, "none"))
++			new_mode = 0;
++		else if (!strcmp(token, "tx"))
++			new_mode |= SWCONFIG_LED_MODE_TX;
++		else if (!strcmp(token, "rx"))
++			new_mode |= SWCONFIG_LED_MODE_RX;
++		else if (!strcmp(token, "link"))
++			new_mode |= SWCONFIG_LED_MODE_LINK;
++		else
++			return -EINVAL;
++	}
++
++	if (new_mode < 0)
++		return -EINVAL;
++
++	write_lock(&trig_data->lock);
++	trig_data->mode = (u8)new_mode;
++	write_unlock(&trig_data->lock);
++
++	return size;
++}
++
++/* mode special file */
++static DEVICE_ATTR(mode, 0644, swconfig_trig_mode_show,
++		   swconfig_trig_mode_store);
++
++static int
++swconfig_trig_activate(struct led_classdev *led_cdev)
++{
++	struct switch_led_trigger *sw_trig;
++	struct swconfig_trig_data *trig_data;
++	int err;
++
++	trig_data = kzalloc(sizeof(struct swconfig_trig_data), GFP_KERNEL);
++	if (!trig_data)
++		return -ENOMEM;
++
++	sw_trig = (void *) led_cdev->trigger;
++
++	rwlock_init(&trig_data->lock);
++	trig_data->led_cdev = led_cdev;
++	trig_data->swdev = sw_trig->swdev;
++	trig_data->speed_mask = SWCONFIG_LED_PORT_SPEED_ALL;
++	trig_data->mode = SWCONFIG_LED_MODE_ALL;
++	led_cdev->trigger_data = trig_data;
++
++	err = device_create_file(led_cdev->dev, &dev_attr_port_mask);
++	if (err)
++		goto err_free;
++
++	err = device_create_file(led_cdev->dev, &dev_attr_speed_mask);
++	if (err)
++		goto err_dev_free;
++
++	err = device_create_file(led_cdev->dev, &dev_attr_mode);
++	if (err)
++		goto err_mode_free;
++
++	return 0;
++
++err_mode_free:
++	device_remove_file(led_cdev->dev, &dev_attr_speed_mask);
++
++err_dev_free:
++	device_remove_file(led_cdev->dev, &dev_attr_port_mask);
++
++err_free:
++	led_cdev->trigger_data = NULL;
++	kfree(trig_data);
++
++	return err;
++}
++
++static void
++swconfig_trig_deactivate(struct led_classdev *led_cdev)
++{
++	struct swconfig_trig_data *trig_data;
++
++	swconfig_trig_update_port_mask(led_cdev->trigger);
++
++	trig_data = (void *) led_cdev->trigger_data;
++	if (trig_data) {
++		device_remove_file(led_cdev->dev, &dev_attr_port_mask);
++		device_remove_file(led_cdev->dev, &dev_attr_speed_mask);
++		device_remove_file(led_cdev->dev, &dev_attr_mode);
++		kfree(trig_data);
++	}
++}
++
++/*
++ * link off -> led off (can't be any other reason to turn it on)
++ * link on:
++ *	mode link: led on by default only if speed matches, else off
++ *	mode txrx: blink only if speed matches, else off
++ */
++static void
++swconfig_trig_led_event(struct switch_led_trigger *sw_trig,
++			struct led_classdev *led_cdev)
++{
++	struct swconfig_trig_data *trig_data;
++	u32 port_mask;
++	bool link;
++	u8 speed_mask, mode;
++	enum led_brightness led_base, led_blink;
++
++	trig_data = led_cdev->trigger_data;
++	if (!trig_data)
++		return;
++
++	read_lock(&trig_data->lock);
++	port_mask = trig_data->port_mask;
++	speed_mask = trig_data->speed_mask;
++	mode = trig_data->mode;
++	read_unlock(&trig_data->lock);
++
++	link = !!(sw_trig->port_link & port_mask);
++	if (!link) {
++		if (trig_data->prev_brightness != LED_OFF)
++			swconfig_trig_set_brightness(trig_data, LED_OFF); /* and stop */
++	}
++	else {
++		unsigned long traffic;
++		int speedok;	/* link speed flag */
++		int i;
++
++		led_base = LED_FULL;
++		led_blink = LED_OFF;
++		traffic = 0;
++		speedok = 0;
++		for (i = 0; i < SWCONFIG_LED_NUM_PORTS; i++) {
++			if (port_mask & (1 << i)) {
++				if (sw_trig->link_speed[i] & speed_mask) {
++					traffic += ((mode & SWCONFIG_LED_MODE_TX) ?
++						    sw_trig->port_tx_traffic[i] : 0) +
++						((mode & SWCONFIG_LED_MODE_RX) ?
++						 sw_trig->port_rx_traffic[i] : 0);
++					speedok = 1;
++				}
++			}
++		}
++
++		if (speedok) {
++			/* At least one port speed matches speed_mask */
++			if (!(mode & SWCONFIG_LED_MODE_LINK)) {
++				led_base = LED_OFF;
++				led_blink = LED_FULL;
++			}
++
++			if (trig_data->prev_brightness != led_base)
++				swconfig_trig_set_brightness(trig_data,
++							     led_base);
++			else if (traffic != trig_data->prev_traffic)
++				swconfig_trig_set_brightness(trig_data,
++							     led_blink);
++		} else if (trig_data->prev_brightness != LED_OFF)
++			swconfig_trig_set_brightness(trig_data, LED_OFF);
++
++		trig_data->prev_traffic = traffic;
++	}
++
++	trig_data->prev_link = link;
++}
++
++static void
++swconfig_trig_update_leds(struct switch_led_trigger *sw_trig)
++{
++	struct list_head *entry;
++	struct led_trigger *trigger;
++
++	trigger = &sw_trig->trig;
++	read_lock(&trigger->leddev_list_lock);
++	list_for_each(entry, &trigger->led_cdevs) {
++		struct led_classdev *led_cdev;
++
++		led_cdev = list_entry(entry, struct led_classdev, trig_list);
++		swconfig_trig_led_event(sw_trig, led_cdev);
++	}
++	read_unlock(&trigger->leddev_list_lock);
++}
++
++static void
++swconfig_led_work_func(struct work_struct *work)
++{
++	struct switch_led_trigger *sw_trig;
++	struct switch_dev *swdev;
++	u32 port_mask;
++	u32 link;
++	int i;
++
++	sw_trig = container_of(work, struct switch_led_trigger,
++			       sw_led_work.work);
++
++	port_mask = sw_trig->port_mask;
++	swdev = sw_trig->swdev;
++
++	link = 0;
++	for (i = 0; i < SWCONFIG_LED_NUM_PORTS; i++) {
++		u32 port_bit;
++
++		sw_trig->link_speed[i] = 0;
++
++		port_bit = BIT(i);
++		if ((port_mask & port_bit) == 0)
++			continue;
++
++		if (swdev->ops->get_port_link) {
++			struct switch_port_link port_link;
++
++			memset(&port_link, '\0', sizeof(port_link));
++			swdev->ops->get_port_link(swdev, i, &port_link);
++
++			if (port_link.link) {
++				link |= port_bit;
++				switch (port_link.speed) {
++				case SWITCH_PORT_SPEED_UNKNOWN:
++					sw_trig->link_speed[i] =
++						SWCONFIG_LED_PORT_SPEED_NA;
++					break;
++				case SWITCH_PORT_SPEED_10:
++					sw_trig->link_speed[i] =
++						SWCONFIG_LED_PORT_SPEED_10;
++					break;
++				case SWITCH_PORT_SPEED_100:
++					sw_trig->link_speed[i] =
++						SWCONFIG_LED_PORT_SPEED_100;
++					break;
++				case SWITCH_PORT_SPEED_1000:
++					sw_trig->link_speed[i] =
++						SWCONFIG_LED_PORT_SPEED_1000;
++					break;
++				}
++			}
++		}
++
++		if (swdev->ops->get_port_stats) {
++			struct switch_port_stats port_stats;
++
++			memset(&port_stats, '\0', sizeof(port_stats));
++			swdev->ops->get_port_stats(swdev, i, &port_stats);
++			sw_trig->port_tx_traffic[i] = port_stats.tx_bytes;
++			sw_trig->port_rx_traffic[i] = port_stats.rx_bytes;
++		}
++	}
++
++	sw_trig->port_link = link;
++
++	swconfig_trig_update_leds(sw_trig);
++
++	schedule_delayed_work(&sw_trig->sw_led_work,
++			      SWCONFIG_LED_TIMER_INTERVAL);
++}
++
++static int
++swconfig_create_led_trigger(struct switch_dev *swdev)
++{
++	struct switch_led_trigger *sw_trig;
++	int err;
++
++	if (!swdev->ops->get_port_link)
++		return 0;
++
++	sw_trig = kzalloc(sizeof(struct switch_led_trigger), GFP_KERNEL);
++	if (!sw_trig)
++		return -ENOMEM;
++
++	sw_trig->swdev = swdev;
++	sw_trig->trig.name = swdev->devname;
++	sw_trig->trig.activate = swconfig_trig_activate;
++	sw_trig->trig.deactivate = swconfig_trig_deactivate;
++
++	INIT_DELAYED_WORK(&sw_trig->sw_led_work, swconfig_led_work_func);
++
++	err = led_trigger_register(&sw_trig->trig);
++	if (err)
++		goto err_free;
++
++	swdev->led_trigger = sw_trig;
++
++	return 0;
++
++err_free:
++	kfree(sw_trig);
++	return err;
++}
++
++static void
++swconfig_destroy_led_trigger(struct switch_dev *swdev)
++{
++	struct switch_led_trigger *sw_trig;
++
++	sw_trig = swdev->led_trigger;
++	if (sw_trig) {
++		cancel_delayed_work_sync(&sw_trig->sw_led_work);
++		led_trigger_unregister(&sw_trig->trig);
++		kfree(sw_trig);
++	}
++}
++
++#else /* SWCONFIG_LEDS */
++static inline int
++swconfig_create_led_trigger(struct switch_dev *swdev) { return 0; }
++
++static inline void
++swconfig_destroy_led_trigger(struct switch_dev *swdev) { }
++#endif /* CONFIG_SWCONFIG_LEDS */
+diff --git a/target/linux/generic/files-5.4/drivers/platform/mikrotik/Kconfig b/target/linux/generic/files-5.4/drivers/platform/mikrotik/Kconfig
+new file mode 100644
+index 0000000000..7499ba1e1c
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/platform/mikrotik/Kconfig
+@@ -0,0 +1,19 @@
++menuconfig MIKROTIK
++	bool "Platform support for MikroTik RouterBoard virtual devices"
++	default n
++	help
++	  Say Y here to get to see options for the MikroTik RouterBoard platform.
++	  This option alone does not add any kernel code.
++
++
++if MIKROTIK
++
++config MIKROTIK_RB_SYSFS
++	tristate "RouterBoot sysfs support"
++	depends on MTD
++	select LZO_DECOMPRESS
++	select CRC32
++	help
++	  This driver exposes RouterBoot configuration in sysfs.
++
++endif # MIKROTIK
+diff --git a/target/linux/generic/files-5.4/drivers/platform/mikrotik/Makefile b/target/linux/generic/files-5.4/drivers/platform/mikrotik/Makefile
+new file mode 100644
+index 0000000000..a232e1a9e8
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/platform/mikrotik/Makefile
+@@ -0,0 +1,4 @@
++#
++# Makefile for MikroTik RouterBoard platform specific drivers
++#
++obj-$(CONFIG_MIKROTIK_RB_SYSFS)     += routerboot.o rb_hardconfig.o rb_softconfig.o
+diff --git a/target/linux/generic/files-5.4/drivers/platform/mikrotik/rb_hardconfig.c b/target/linux/generic/files-5.4/drivers/platform/mikrotik/rb_hardconfig.c
+new file mode 100644
+index 0000000000..e6a6928896
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/platform/mikrotik/rb_hardconfig.c
+@@ -0,0 +1,825 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Driver for MikroTik RouterBoot hard config.
++ *
++ * Copyright (C) 2020 Thibaut VARÈNE <hacks+kernel@slashdirt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ *
++ * This driver exposes the data encoded in the "hard_config" flash segment of
++ * MikroTik RouterBOARDs devices. It presents the data in a sysfs folder
++ * named "hard_config". The WLAN calibration data is available on demand via
++ * the 'wlan_data' sysfs file in that folder.
++ *
++ * This driver permanently allocates a chunk of RAM as large as the hard_config
++ * MTD partition, although it is technically possible to operate entirely from
++ * the MTD device without using a local buffer (except when requesting WLAN
++ * calibration data), at the cost of a performance penalty.
++ *
++ * Note: PAGE_SIZE is assumed to be >= 4K, hence the device attribute show
++ * routines need not check for output overflow.
++ *
++ * Some constant defines extracted from routerboot.{c,h} by Gabor Juhos
++ * <juhosg@openwrt.org>
++ */
++
++#include <linux/types.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/slab.h>
++#include <linux/errno.h>
++#include <linux/kobject.h>
++#include <linux/bitops.h>
++#include <linux/string.h>
++#include <linux/mtd/mtd.h>
++#include <linux/sysfs.h>
++#include <linux/lzo.h>
++
++#include "routerboot.h"
++
++#define RB_HARDCONFIG_VER		"0.06"
++#define RB_HC_PR_PFX			"[rb_hardconfig] "
++
++/* ID values for hardware settings */
++#define RB_ID_FLASH_INFO		0x03
++#define RB_ID_MAC_ADDRESS_PACK		0x04
++#define RB_ID_BOARD_PRODUCT_CODE	0x05
++#define RB_ID_BIOS_VERSION		0x06
++#define RB_ID_SDRAM_TIMINGS		0x08
++#define RB_ID_DEVICE_TIMINGS		0x09
++#define RB_ID_SOFTWARE_ID		0x0A
++#define RB_ID_SERIAL_NUMBER		0x0B
++#define RB_ID_MEMORY_SIZE		0x0D
++#define RB_ID_MAC_ADDRESS_COUNT		0x0E
++#define RB_ID_HW_OPTIONS		0x15
++#define RB_ID_WLAN_DATA			0x16
++#define RB_ID_BOARD_IDENTIFIER		0x17
++#define RB_ID_PRODUCT_NAME		0x21
++#define RB_ID_DEFCONF			0x26
++#define RB_ID_BOARD_REVISION		0x27
++
++/* Bit definitions for hardware options */
++#define RB_HW_OPT_NO_UART		BIT(0)
++#define RB_HW_OPT_HAS_VOLTAGE		BIT(1)
++#define RB_HW_OPT_HAS_USB		BIT(2)
++#define RB_HW_OPT_HAS_ATTINY		BIT(3)
++#define RB_HW_OPT_PULSE_DUTY_CYCLE	BIT(9)
++#define RB_HW_OPT_NO_NAND		BIT(14)
++#define RB_HW_OPT_HAS_LCD		BIT(15)
++#define RB_HW_OPT_HAS_POE_OUT		BIT(16)
++#define RB_HW_OPT_HAS_uSD		BIT(17)
++#define RB_HW_OPT_HAS_SIM		BIT(18)
++#define RB_HW_OPT_HAS_SFP		BIT(20)
++#define RB_HW_OPT_HAS_WIFI		BIT(21)
++#define RB_HW_OPT_HAS_TS_FOR_ADC	BIT(22)
++#define RB_HW_OPT_HAS_PLC		BIT(29)
++
++/*
++ * Tag ID values for ERD data.
++ * Mikrotik used to pack all calibration data under a single tag id 0x1, but
++ * recently switched to a new scheme where each radio calibration gets a
++ * separate tag. The new scheme has tag id bit 15 always set and seems to be
++ * mutually exclusive with the old scheme.
++ */
++#define RB_WLAN_ERD_ID_SOLO		0x0001
++#define RB_WLAN_ERD_ID_MULTI_8001	0x8001
++#define RB_WLAN_ERD_ID_MULTI_8201	0x8201
++
++static struct kobject *hc_kobj;
++static u8 *hc_buf;		// ro buffer after init(): no locking required
++static size_t hc_buflen;
++
++/*
++ * For LZOR style WLAN data unpacking.
++ * This binary blob is prepended to the data encoded on some devices as
++ * RB_ID_WLAN_DATA, the result is then first decompressed with LZO, and then
++ * finally RLE-decoded.
++ * This binary blob has been extracted from RouterOS by
++ * https://forum.openwrt.org/u/ius
++ */
++static const u8 hc_lzor_prefix[] = {
++	0x00, 0x05, 0x4c, 0x4c, 0x44, 0x00, 0x34, 0xfe,
++	0xfe, 0x34, 0x11, 0x3c, 0x1e, 0x3c, 0x2e, 0x3c,
++	0x4c, 0x34, 0x00, 0x52, 0x62, 0x92, 0xa2, 0xb2,
++	0xc3, 0x2a, 0x14, 0x00, 0x00, 0x05, 0xfe, 0x6a,
++	0x3c, 0x16, 0x32, 0x16, 0x11, 0x1e, 0x12, 0x46,
++	0x32, 0x46, 0x11, 0x4e, 0x12, 0x36, 0x32, 0x36,
++	0x11, 0x3e, 0x12, 0x5a, 0x9a, 0x64, 0x00, 0x04,
++	0xfe, 0x10, 0x3c, 0x00, 0x01, 0x00, 0x00, 0x28,
++	0x0c, 0x00, 0x0f, 0xfe, 0x14, 0x00, 0x24, 0x24,
++	0x23, 0x24, 0x24, 0x23, 0x25, 0x22, 0x21, 0x21,
++	0x23, 0x22, 0x21, 0x22, 0x21, 0x2d, 0x38, 0x00,
++	0x0c, 0x25, 0x25, 0x24, 0x25, 0x25, 0x24, 0x23,
++	0x22, 0x21, 0x20, 0x23, 0x21, 0x21, 0x22, 0x21,
++	0x2d, 0x38, 0x00, 0x28, 0xb0, 0x00, 0x00, 0x22,
++	0x00, 0x00, 0xc0, 0xfe, 0x03, 0x00, 0xc0, 0x00,
++	0x62, 0xff, 0x62, 0xff, 0xfe, 0x06, 0x00, 0xbb,
++	0xff, 0xba, 0xff, 0xfe, 0x08, 0x00, 0x9e, 0xff,
++	0xfe, 0x0a, 0x00, 0x53, 0xff, 0xfe, 0x02, 0x00,
++	0x20, 0xff, 0xb1, 0xfe, 0xfe, 0xb2, 0xfe, 0xfe,
++	0xed, 0xfe, 0xfe, 0xfe, 0x04, 0x00, 0x3a, 0xff,
++	0x3a, 0xff, 0xde, 0xfd, 0x5f, 0x04, 0x33, 0xff,
++	0x4c, 0x74, 0x03, 0x05, 0x05, 0xff, 0x6d, 0xfe,
++	0xfe, 0x6d, 0xfe, 0xfe, 0xaf, 0x08, 0x63, 0xff,
++	0x64, 0x6f, 0x08, 0xac, 0xff, 0xbf, 0x6d, 0x08,
++	0x7a, 0x6d, 0x08, 0x96, 0x74, 0x04, 0x00, 0x08,
++	0x79, 0xff, 0xda, 0xfe, 0xfe, 0xdb, 0xfe, 0xfe,
++	0x56, 0xff, 0xfe, 0x04, 0x00, 0x5e, 0xff, 0x5e,
++	0xff, 0x6c, 0xfe, 0xfe, 0xfe, 0x06, 0x00, 0x41,
++	0xff, 0x7f, 0x74, 0x03, 0x00, 0x11, 0x44, 0xff,
++	0xa9, 0xfe, 0xfe, 0xa9, 0xfe, 0xfe, 0xa5, 0x8f,
++	0x01, 0x00, 0x08, 0x01, 0x01, 0x02, 0x04, 0x08,
++	0x02, 0x04, 0x08, 0x08, 0x01, 0x01, 0xfe, 0x22,
++	0x00, 0x4c, 0x60, 0x64, 0x8c, 0x90, 0xd0, 0xd4,
++	0xd8, 0x5c, 0x10, 0x09, 0xd8, 0xff, 0xb0, 0xff,
++	0x00, 0x00, 0xba, 0xff, 0x14, 0x00, 0xba, 0xff,
++	0x64, 0x00, 0x00, 0x08, 0xfe, 0x06, 0x00, 0x74,
++	0xff, 0x42, 0xff, 0xce, 0xff, 0x60, 0xff, 0x0a,
++	0x00, 0xb4, 0x00, 0xa0, 0x00, 0xa0, 0xfe, 0x07,
++	0x00, 0x0a, 0x00, 0xb0, 0xff, 0x96, 0x4d, 0x00,
++	0x56, 0x57, 0x18, 0xa6, 0xff, 0x92, 0x70, 0x11,
++	0x00, 0x12, 0x90, 0x90, 0x76, 0x5a, 0x54, 0x54,
++	0x4c, 0x46, 0x38, 0x00, 0x10, 0x10, 0x08, 0xfe,
++	0x05, 0x00, 0x38, 0x29, 0x25, 0x23, 0x22, 0x22,
++	0x1f, 0x00, 0x00, 0x00, 0xf6, 0xe1, 0xdd, 0xf8,
++	0xfe, 0x00, 0xfe, 0x15, 0x00, 0x00, 0xd0, 0x02,
++	0x74, 0x02, 0x08, 0xf8, 0xe5, 0xde, 0x02, 0x04,
++	0x04, 0xfd, 0x00, 0x00, 0x00, 0x07, 0x50, 0x2d,
++	0x01, 0x90, 0x90, 0x76, 0x60, 0xb0, 0x07, 0x07,
++	0x0c, 0x0c, 0x04, 0xfe, 0x05, 0x00, 0x66, 0x66,
++	0x5a, 0x56, 0xbc, 0x01, 0x06, 0xfc, 0xfc, 0xf1,
++	0xfe, 0x07, 0x00, 0x24, 0x95, 0x70, 0x64, 0x18,
++	0x06, 0x2c, 0xff, 0xb5, 0xfe, 0xfe, 0xb5, 0xfe,
++	0xfe, 0xe2, 0x8c, 0x24, 0x02, 0x2f, 0xff, 0x2f,
++	0xff, 0xb4, 0x78, 0x02, 0x05, 0x73, 0xff, 0xed,
++	0xfe, 0xfe, 0x4f, 0xff, 0x36, 0x74, 0x1e, 0x09,
++	0x4f, 0xff, 0x50, 0xff, 0xfe, 0x16, 0x00, 0x70,
++	0xac, 0x70, 0x8e, 0xac, 0x40, 0x0e, 0x01, 0x70,
++	0x7f, 0x8e, 0xac, 0x6c, 0x00, 0x0b, 0xfe, 0x02,
++	0x00, 0xfe, 0x0a, 0x2c, 0x2a, 0x2a, 0x28, 0x26,
++	0x1e, 0x1e, 0xfe, 0x02, 0x20, 0x65, 0x20, 0x00,
++	0x00, 0x05, 0x12, 0x00, 0x11, 0x1e, 0x11, 0x11,
++	0x41, 0x1e, 0x41, 0x11, 0x31, 0x1e, 0x31, 0x11,
++	0x70, 0x75, 0x7a, 0x7f, 0x84, 0x89, 0x8e, 0x93,
++	0x98, 0x30, 0x20, 0x00, 0x02, 0x00, 0xfe, 0x06,
++	0x3c, 0xbc, 0x32, 0x0c, 0x00, 0x00, 0x2a, 0x12,
++	0x1e, 0x12, 0x2e, 0x12, 0xcc, 0x12, 0x11, 0x1a,
++	0x1e, 0x1a, 0x2e, 0x1a, 0x4c, 0x10, 0x1e, 0x10,
++	0x11, 0x18, 0x1e, 0x42, 0x1e, 0x42, 0x2e, 0x42,
++	0xcc, 0x42, 0x11, 0x4a, 0x1e, 0x4a, 0x2e, 0x4a,
++	0x4c, 0x40, 0x1e, 0x40, 0x11, 0x48, 0x1e, 0x32,
++	0x1e, 0x32, 0x2e, 0x32, 0xcc, 0x32, 0x11, 0x3a,
++	0x1e, 0x3a, 0x2e, 0x3a, 0x4c, 0x30, 0x1e, 0x30,
++	0x11, 0x38, 0x1e, 0x27, 0x9a, 0x01, 0x9d, 0xa2,
++	0x2f, 0x28, 0x00, 0x00, 0x46, 0xde, 0xc4, 0xbf,
++	0xa6, 0x9d, 0x81, 0x7b, 0x5c, 0x61, 0x40, 0xc7,
++	0xc0, 0xae, 0xa9, 0x8c, 0x83, 0x6a, 0x62, 0x50,
++	0x3e, 0xce, 0xc2, 0xae, 0xa3, 0x8c, 0x7b, 0x6a,
++	0x5a, 0x50, 0x35, 0xd7, 0xc2, 0xb7, 0xa4, 0x95,
++	0x7e, 0x72, 0x5a, 0x59, 0x37, 0xfe, 0x02, 0xf8,
++	0x8c, 0x95, 0x90, 0x8f, 0x00, 0xd7, 0xc0, 0xb7,
++	0xa2, 0x95, 0x7b, 0x72, 0x56, 0x59, 0x32, 0xc7,
++	0xc3, 0xae, 0xad, 0x8c, 0x85, 0x6a, 0x63, 0x50,
++	0x3e, 0xce, 0xc3, 0xae, 0xa4, 0x8c, 0x7c, 0x6a,
++	0x59, 0x50, 0x34, 0xd7, 0xc2, 0xb7, 0xa5, 0x95,
++	0x7e, 0x72, 0x59, 0x59, 0x36, 0xfc, 0x05, 0x00,
++	0x02, 0xce, 0xc5, 0xae, 0xa5, 0x95, 0x83, 0x72,
++	0x5c, 0x59, 0x36, 0xbf, 0xc6, 0xa5, 0xab, 0x8c,
++	0x8c, 0x6a, 0x67, 0x50, 0x41, 0x64, 0x07, 0x00,
++	0x02, 0x95, 0x8c, 0x72, 0x65, 0x59, 0x3f, 0xce,
++	0xc7, 0xae, 0xa8, 0x95, 0x86, 0x72, 0x5f, 0x59,
++	0x39, 0xfe, 0x02, 0xf8, 0x8b, 0x7c, 0x0b, 0x09,
++	0xb7, 0xc2, 0x9d, 0xa4, 0x83, 0x85, 0x6a, 0x6b,
++	0x50, 0x44, 0xb7, 0xc1, 0x64, 0x01, 0x00, 0x06,
++	0x61, 0x5d, 0x48, 0x3d, 0xae, 0xc4, 0x9d, 0xad,
++	0x7b, 0x85, 0x61, 0x66, 0x48, 0x46, 0xae, 0xc3,
++	0x95, 0xa3, 0x72, 0x7c, 0x59, 0x56, 0x38, 0x31,
++	0x7c, 0x0b, 0x00, 0x0c, 0x96, 0x91, 0x8f, 0x00,
++	0xb7, 0xc0, 0xa5, 0xab, 0x8c, 0x8a, 0x6a, 0x64,
++	0x50, 0x3c, 0xb7, 0xc0, 0x9d, 0xa0, 0x83, 0x80,
++	0x6a, 0x64, 0x50, 0x3d, 0xb7, 0xc5, 0x9d, 0xa5,
++	0x83, 0x87, 0x6c, 0x08, 0x07, 0xae, 0xc0, 0x9d,
++	0xa8, 0x83, 0x88, 0x6a, 0x6d, 0x50, 0x46, 0xfc,
++	0x05, 0x00, 0x16, 0xbf, 0xc0, 0xa5, 0xa2, 0x8c,
++	0x7f, 0x6a, 0x57, 0x50, 0x2f, 0xb7, 0xc7, 0xa5,
++	0xb1, 0x8c, 0x8e, 0x72, 0x6d, 0x59, 0x45, 0xbf,
++	0xc6, 0xa5, 0xa8, 0x8c, 0x87, 0x6a, 0x5f, 0x50,
++	0x37, 0xbf, 0xc2, 0xa5, 0xa4, 0x8c, 0x83, 0x6a,
++	0x5c, 0x50, 0x34, 0xbc, 0x05, 0x00, 0x0e, 0x90,
++	0x00, 0xc7, 0xc2, 0xae, 0xaa, 0x95, 0x82, 0x7b,
++	0x60, 0x61, 0x3f, 0xb7, 0xc6, 0xa5, 0xb1, 0x8c,
++	0x8d, 0x72, 0x6b, 0x61, 0x51, 0xbf, 0xc4, 0xa5,
++	0xa5, 0x8c, 0x82, 0x72, 0x61, 0x59, 0x39, 0x6c,
++	0x26, 0x03, 0x95, 0x82, 0x7b, 0x61, 0x61, 0x40,
++	0xfc, 0x05, 0x00, 0x00, 0x7e, 0xd7, 0xc3, 0xb7,
++	0xa8, 0x9d, 0x80, 0x83, 0x5d, 0x6a, 0x3f, 0xbf,
++	0xc7, 0xa5, 0xa8, 0x8c, 0x84, 0x72, 0x60, 0x61,
++	0x46, 0xbf, 0xc2, 0xae, 0xb0, 0x9d, 0x92, 0x83,
++	0x6f, 0x6a, 0x50, 0xd7, 0xc3, 0xb7, 0xa7, 0x9d,
++	0x80, 0x83, 0x5e, 0x6a, 0x40, 0xfe, 0x02, 0xf8,
++	0x8d, 0x96, 0x90, 0x90, 0xfe, 0x05, 0x00, 0x8a,
++	0xc4, 0x63, 0xb8, 0x3c, 0xa6, 0x29, 0x97, 0x16,
++	0x81, 0x84, 0xb7, 0x5b, 0xa9, 0x33, 0x94, 0x1e,
++	0x83, 0x11, 0x70, 0xb8, 0xc2, 0x70, 0xb1, 0x4d,
++	0xa3, 0x2a, 0x8d, 0x1b, 0x7b, 0xa8, 0xbc, 0x68,
++	0xab, 0x47, 0x9d, 0x27, 0x87, 0x18, 0x75, 0xae,
++	0xc6, 0x7d, 0xbb, 0x4d, 0xaa, 0x1c, 0x84, 0x11,
++	0x72, 0xa3, 0xbb, 0x6e, 0xad, 0x3c, 0x97, 0x24,
++	0x85, 0x16, 0x71, 0x80, 0xb2, 0x57, 0xa4, 0x30,
++	0x8e, 0x1c, 0x7c, 0x10, 0x68, 0xbb, 0xbd, 0x75,
++	0xac, 0x4f, 0x9e, 0x2b, 0x87, 0x1a, 0x76, 0x96,
++	0xc5, 0x5e, 0xb5, 0x3e, 0xa5, 0x1f, 0x8c, 0x12,
++	0x7a, 0xc1, 0xc6, 0x42, 0x9f, 0x27, 0x8c, 0x16,
++	0x77, 0x0f, 0x67, 0x9d, 0xbc, 0x68, 0xad, 0x36,
++	0x95, 0x20, 0x83, 0x11, 0x6d, 0x9b, 0xb8, 0x67,
++	0xa8, 0x34, 0x90, 0x1f, 0x7c, 0x10, 0x67, 0x9e,
++	0xc9, 0x6a, 0xbb, 0x37, 0xa4, 0x20, 0x90, 0x11,
++	0x7b, 0xc6, 0xc8, 0x47, 0xa4, 0x2a, 0x90, 0x18,
++	0x7b, 0x10, 0x6c, 0xae, 0xc4, 0x5d, 0xad, 0x37,
++	0x9a, 0x1f, 0x85, 0x13, 0x75, 0x70, 0xad, 0x42,
++	0x99, 0x25, 0x84, 0x17, 0x74, 0x0b, 0x56, 0x87,
++	0xc8, 0x57, 0xb8, 0x2b, 0x9e, 0x19, 0x8a, 0x0d,
++	0x74, 0xa7, 0xc8, 0x6e, 0xb9, 0x36, 0xa0, 0x1f,
++	0x8b, 0x11, 0x75, 0x94, 0xbe, 0x4b, 0xa5, 0x2a,
++	0x92, 0x18, 0x7c, 0x0f, 0x6b, 0xaf, 0xc0, 0x58,
++	0xa8, 0x34, 0x94, 0x1d, 0x7d, 0x12, 0x6d, 0x82,
++	0xc0, 0x52, 0xb0, 0x25, 0x94, 0x14, 0x7f, 0x0c,
++	0x68, 0x84, 0xbf, 0x3e, 0xa4, 0x22, 0x8e, 0x10,
++	0x76, 0x0b, 0x65, 0x88, 0xb6, 0x42, 0x9b, 0x26,
++	0x87, 0x14, 0x70, 0x0c, 0x5f, 0xc5, 0xc2, 0x3e,
++	0x97, 0x23, 0x83, 0x13, 0x6c, 0x0c, 0x5c, 0xb1,
++	0xc9, 0x76, 0xbc, 0x4a, 0xaa, 0x20, 0x8d, 0x12,
++	0x78, 0x93, 0xbf, 0x46, 0xa3, 0x26, 0x8d, 0x14,
++	0x74, 0x0c, 0x62, 0xc8, 0xc4, 0x3b, 0x97, 0x21,
++	0x82, 0x11, 0x6a, 0x0a, 0x59, 0xa3, 0xb9, 0x68,
++	0xa9, 0x30, 0x8d, 0x1a, 0x78, 0x0f, 0x61, 0xa0,
++	0xc9, 0x73, 0xbe, 0x50, 0xb1, 0x30, 0x9f, 0x14,
++	0x80, 0x83, 0xb7, 0x3c, 0x9a, 0x20, 0x84, 0x0e,
++	0x6a, 0x0a, 0x57, 0xac, 0xc2, 0x68, 0xb0, 0x2e,
++	0x92, 0x19, 0x7c, 0x0d, 0x63, 0x93, 0xbe, 0x62,
++	0xb0, 0x3c, 0x9e, 0x1a, 0x80, 0x0e, 0x6b, 0xbb,
++	0x02, 0xa0, 0x02, 0xa0, 0x02, 0x6f, 0x00, 0x75,
++	0x00, 0x75, 0x00, 0x00, 0x00, 0xad, 0x02, 0xb3,
++	0x02, 0x6f, 0x00, 0x87, 0x00, 0x85, 0xfe, 0x03,
++	0x00, 0xc2, 0x02, 0x82, 0x4d, 0x92, 0x6e, 0x4d,
++	0xb1, 0xa8, 0x84, 0x01, 0x00, 0x07, 0x7e, 0x00,
++	0xa8, 0x02, 0xa4, 0x02, 0xa4, 0x02, 0xa2, 0x00,
++	0xa6, 0x00, 0xa6, 0x00, 0x00, 0x00, 0xb4, 0x02,
++	0xb4, 0x02, 0x92, 0x00, 0x96, 0x00, 0x96, 0x46,
++	0x04, 0xb0, 0x02, 0x64, 0x02, 0x0a, 0x8c, 0x00,
++	0x90, 0x02, 0x98, 0x02, 0x98, 0x02, 0x0e, 0x01,
++	0x11, 0x01, 0x11, 0x50, 0xc3, 0x08, 0x88, 0x02,
++	0x88, 0x02, 0x19, 0x01, 0x02, 0x01, 0x02, 0x01,
++	0xf3, 0x2d, 0x00, 0x00
++};
++
++/* Array of known hw_options bits with human-friendly parsing */
++static struct hc_hwopt {
++	const u32 bit;
++	const char *str;
++} const hc_hwopts[] = {
++	{
++		.bit = RB_HW_OPT_NO_UART,
++		.str = "no UART\t\t",
++	}, {
++		.bit = RB_HW_OPT_HAS_VOLTAGE,
++		.str = "has Vreg\t",
++	}, {
++		.bit = RB_HW_OPT_HAS_USB,
++		.str = "has usb\t\t",
++	}, {
++		.bit = RB_HW_OPT_HAS_ATTINY,
++		.str = "has ATtiny\t",
++	}, {
++		.bit = RB_HW_OPT_NO_NAND,
++		.str = "no NAND\t\t",
++	}, {
++		.bit = RB_HW_OPT_HAS_LCD,
++		.str = "has LCD\t\t",
++	}, {
++		.bit = RB_HW_OPT_HAS_POE_OUT,
++		.str = "has POE out\t",
++	}, {
++		.bit = RB_HW_OPT_HAS_uSD,
++		.str = "has MicroSD\t",
++	}, {
++		.bit = RB_HW_OPT_HAS_SIM,
++		.str = "has SIM\t\t",
++	}, {
++		.bit = RB_HW_OPT_HAS_SFP,
++		.str = "has SFP\t\t",
++	}, {
++		.bit = RB_HW_OPT_HAS_WIFI,
++		.str = "has WiFi\t",
++	}, {
++		.bit = RB_HW_OPT_HAS_TS_FOR_ADC,
++		.str = "has TS ADC\t",
++	}, {
++		.bit = RB_HW_OPT_HAS_PLC,
++		.str = "has PLC\t\t",
++	},
++};
++
++/*
++ * The MAC is stored network-endian on all devices, in 2 32-bit segments:
++ * <XX:XX:XX:XX> <XX:XX:00:00>. Kernel print has us covered.
++ */
++static ssize_t hc_tag_show_mac(const u8 *pld, u16 pld_len, char *buf)
++{
++	if (8 != pld_len)
++		return -EINVAL;
++
++	return sprintf(buf, "%pM\n", pld);
++}
++
++/*
++ * Print HW options in a human readable way:
++ * The raw number and in decoded form
++ */
++static ssize_t hc_tag_show_hwoptions(const u8 *pld, u16 pld_len, char *buf)
++{
++	char *out = buf;
++	u32 data;	// cpu-endian
++	int i;
++
++	if (sizeof(data) != pld_len)
++		return -EINVAL;
++
++	data = *(u32 *)pld;
++	out += sprintf(out, "raw\t\t: 0x%08x\n\n", data);
++
++	for (i = 0; i < ARRAY_SIZE(hc_hwopts); i++)
++		out += sprintf(out, "%s: %s\n", hc_hwopts[i].str,
++			       (data & hc_hwopts[i].bit) ? "true" : "false");
++
++	return out - buf;
++}
++
++static ssize_t hc_wlan_data_bin_read(struct file *filp, struct kobject *kobj,
++				     struct bin_attribute *attr, char *buf,
++				     loff_t off, size_t count);
++
++static struct hc_wlan_attr {
++	const u16 erd_tag_id;
++	struct bin_attribute battr;
++	u16 pld_ofs;
++	u16 pld_len;
++} hc_wd_multi_battrs[] = {
++	{
++		.erd_tag_id = RB_WLAN_ERD_ID_MULTI_8001,
++		.battr = __BIN_ATTR(data_0, S_IRUSR, hc_wlan_data_bin_read, NULL, 0),
++	}, {
++		.erd_tag_id = RB_WLAN_ERD_ID_MULTI_8201,
++		.battr = __BIN_ATTR(data_2, S_IRUSR, hc_wlan_data_bin_read, NULL, 0),
++	}
++};
++
++static struct hc_wlan_attr hc_wd_solo_battr = {
++	.erd_tag_id = RB_WLAN_ERD_ID_SOLO,
++	.battr = __BIN_ATTR(wlan_data, S_IRUSR, hc_wlan_data_bin_read, NULL, 0),
++};
++
++static ssize_t hc_attr_show(struct kobject *kobj, struct kobj_attribute *attr,
++			    char *buf);
++
++/* Array of known tags to publish in sysfs */
++static struct hc_attr {
++	const u16 tag_id;
++	ssize_t (* const tshow)(const u8 *pld, u16 pld_len, char *buf);
++	struct kobj_attribute kattr;
++	u16 pld_ofs;
++	u16 pld_len;
++} hc_attrs[] = {
++	{
++		.tag_id = RB_ID_FLASH_INFO,
++		.tshow = routerboot_tag_show_u32s,
++		.kattr = __ATTR(flash_info, S_IRUSR, hc_attr_show, NULL),
++	}, {
++		.tag_id = RB_ID_MAC_ADDRESS_PACK,
++		.tshow = hc_tag_show_mac,
++		.kattr = __ATTR(mac_base, S_IRUSR, hc_attr_show, NULL),
++	}, {
++		.tag_id = RB_ID_BOARD_PRODUCT_CODE,
++		.tshow = routerboot_tag_show_string,
++		.kattr = __ATTR(board_product_code, S_IRUSR, hc_attr_show, NULL),
++	}, {
++		.tag_id = RB_ID_BIOS_VERSION,
++		.tshow = routerboot_tag_show_string,
++		.kattr = __ATTR(booter_version, S_IRUSR, hc_attr_show, NULL),
++	}, {
++		.tag_id = RB_ID_SERIAL_NUMBER,
++		.tshow = routerboot_tag_show_string,
++		.kattr = __ATTR(board_serial, S_IRUSR, hc_attr_show, NULL),
++	}, {
++		.tag_id = RB_ID_MEMORY_SIZE,
++		.tshow = routerboot_tag_show_u32s,
++		.kattr = __ATTR(mem_size, S_IRUSR, hc_attr_show, NULL),
++	}, {
++		.tag_id = RB_ID_MAC_ADDRESS_COUNT,
++		.tshow = routerboot_tag_show_u32s,
++		.kattr = __ATTR(mac_count, S_IRUSR, hc_attr_show, NULL),
++	}, {
++		.tag_id = RB_ID_HW_OPTIONS,
++		.tshow = hc_tag_show_hwoptions,
++		.kattr = __ATTR(hw_options, S_IRUSR, hc_attr_show, NULL),
++	}, {
++		.tag_id = RB_ID_WLAN_DATA,
++		.tshow = NULL,
++	}, {
++		.tag_id = RB_ID_BOARD_IDENTIFIER,
++		.tshow = routerboot_tag_show_string,
++		.kattr = __ATTR(board_identifier, S_IRUSR, hc_attr_show, NULL),
++	}, {
++		.tag_id = RB_ID_PRODUCT_NAME,
++		.tshow = routerboot_tag_show_string,
++		.kattr = __ATTR(product_name, S_IRUSR, hc_attr_show, NULL),
++	}, {
++		.tag_id = RB_ID_DEFCONF,
++		.tshow = routerboot_tag_show_string,
++		.kattr = __ATTR(defconf, S_IRUSR, hc_attr_show, NULL),
++	}, {
++		.tag_id = RB_ID_BOARD_REVISION,
++		.tshow = routerboot_tag_show_string,
++		.kattr = __ATTR(board_revision, S_IRUSR, hc_attr_show, NULL),
++	}
++};
++
++/*
++ * If the RB_ID_WLAN_DATA payload starts with RB_MAGIC_ERD, then past
++ * that magic number the payload itself contains a routerboot tag node
++ * locating the LZO-compressed calibration data. So far this scheme is only
++ * known to use a single tag at id 0x1.
++ */
++static int hc_wlan_data_unpack_erd(const u16 tag_id, const u8 *inbuf, size_t inlen,
++				   void *outbuf, size_t *outlen)
++{
++	u16 lzo_ofs, lzo_len;
++	int ret;
++
++	/* Find embedded tag */
++	ret = routerboot_tag_find(inbuf, inlen, tag_id, &lzo_ofs, &lzo_len);
++	if (ret) {
++		pr_debug(RB_HC_PR_PFX "no ERD data for id 0x%04x\n", tag_id);
++		goto fail;
++	}
++
++	if (lzo_len > inlen) {
++		pr_debug(RB_HC_PR_PFX "Invalid ERD data length\n");
++		ret = -EINVAL;
++		goto fail;
++	}
++
++	ret = lzo1x_decompress_safe(inbuf+lzo_ofs, lzo_len, outbuf, outlen);
++	if (ret)
++		pr_debug(RB_HC_PR_PFX "LZO decompression error (%d)\n", ret);
++
++fail:
++	return ret;
++}
++
++/*
++ * If the RB_ID_WLAN_DATA payload starts with RB_MAGIC_LZOR, then past
++ * that magic number is a payload that must be appended to the hc_lzor_prefix,
++ * the resulting blob is LZO-compressed. In the LZO decompression result,
++ * the RB_MAGIC_ERD magic number (aligned) must be located. Following that
++ * magic, there is one or more routerboot tag node(s) locating the RLE-encoded
++ * calibration data payload.
++ */
++static int hc_wlan_data_unpack_lzor(const u16 tag_id, const u8 *inbuf, size_t inlen,
++				    void *outbuf, size_t *outlen)
++{
++	u16 rle_ofs, rle_len;
++	const u32 *needle;
++	u8 *tempbuf;
++	size_t templen, lzo_len;
++	int ret;
++
++	lzo_len = inlen + sizeof(hc_lzor_prefix);
++	if (lzo_len > *outlen)
++		return -EFBIG;
++
++	/* Temporary buffer same size as the outbuf */
++	templen = *outlen;
++	tempbuf = kmalloc(templen, GFP_KERNEL);
++	if (!tempbuf)
++		return -ENOMEM;
++
++	/* Concatenate into the outbuf */
++	memcpy(outbuf, hc_lzor_prefix, sizeof(hc_lzor_prefix));
++	memcpy(outbuf + sizeof(hc_lzor_prefix), inbuf, inlen);
++
++	/* LZO-decompress lzo_len bytes of outbuf into the tempbuf */
++	ret = lzo1x_decompress_safe(outbuf, lzo_len, tempbuf, &templen);
++	if (ret) {
++		if (LZO_E_INPUT_NOT_CONSUMED == ret) {
++			/*
++			 * The tag length is always aligned thus the LZO payload may be padded,
++			 * which can trigger a spurious error which we ignore here.
++			 */
++			pr_debug(RB_HC_PR_PFX "LZOR: LZO EOF before buffer end - this may be harmless\n");
++		} else {
++			pr_debug(RB_HC_PR_PFX "LZOR: LZO decompression error (%d)\n", ret);
++			goto fail;
++		}
++	}
++
++	/*
++	 * Post decompression we have a blob (possibly byproduct of the lzo
++	 * dictionary). We need to find RB_MAGIC_ERD. The magic number seems to
++	 * be 32bit-aligned in the decompression output.
++	 */
++	needle = (const u32 *)tempbuf;
++	while (RB_MAGIC_ERD != *needle++) {
++		if ((u8 *)needle >= tempbuf+templen) {
++			pr_debug(RB_HC_PR_PFX "LZOR: ERD magic not found\n");
++			ret = -ENODATA;
++			goto fail;
++		}
++	};
++	templen -= (u8 *)needle - tempbuf;
++
++	/* Past magic. Look for tag node */
++	ret = routerboot_tag_find((u8 *)needle, templen, tag_id, &rle_ofs, &rle_len);
++	if (ret) {
++		pr_debug(RB_HC_PR_PFX "LZOR: no RLE data for id 0x%04x\n", tag_id);
++		goto fail;
++	}
++
++	if (rle_len > templen) {
++		pr_debug(RB_HC_PR_PFX "LZOR: Invalid RLE data length\n");
++		ret = -EINVAL;
++		goto fail;
++	}
++
++	/* RLE-decode tempbuf from needle back into the outbuf */
++	ret = routerboot_rle_decode((u8 *)needle+rle_ofs, rle_len, outbuf, outlen);
++	if (ret)
++		pr_debug(RB_HC_PR_PFX "LZOR: RLE decoding error (%d)\n", ret);
++
++fail:
++	kfree(tempbuf);
++	return ret;
++}
++
++static int hc_wlan_data_unpack(const u16 tag_id, const size_t tofs, size_t tlen,
++			       void *outbuf, size_t *outlen)
++{
++	const u8 *lbuf;
++	u32 magic;
++	int ret;
++
++	/* Caller ensure tlen > 0. tofs is aligned */
++	if ((tofs + tlen) > hc_buflen)
++		return -EIO;
++
++	lbuf = hc_buf + tofs;
++	magic = *(u32 *)lbuf;
++
++	ret = -ENODATA;
++	switch (magic) {
++	case RB_MAGIC_LZOR:
++		/* Skip magic */
++		lbuf += sizeof(magic);
++		tlen -= sizeof(magic);
++		ret = hc_wlan_data_unpack_lzor(tag_id, lbuf, tlen, outbuf, outlen);
++		break;
++	case RB_MAGIC_ERD:
++		/* Skip magic */
++		lbuf += sizeof(magic);
++		tlen -= sizeof(magic);
++		ret = hc_wlan_data_unpack_erd(tag_id, lbuf, tlen, outbuf, outlen);
++		break;
++	default:
++		/*
++		 * If the RB_ID_WLAN_DATA payload doesn't start with a
++		 * magic number, the payload itself is the raw RLE-encoded
++		 * calibration data. Only RB_WLAN_ERD_ID_SOLO makes sense here.
++		 */
++		if (RB_WLAN_ERD_ID_SOLO == tag_id) {
++			ret = routerboot_rle_decode(lbuf, tlen, outbuf, outlen);
++			if (ret)
++				pr_debug(RB_HC_PR_PFX "RLE decoding error (%d)\n", ret);
++		}
++		break;
++	}
++
++	return ret;
++}
++
++static ssize_t hc_attr_show(struct kobject *kobj, struct kobj_attribute *attr,
++			    char *buf)
++{
++	const struct hc_attr *hc_attr;
++	const u8 *pld;
++	u16 pld_len;
++
++	hc_attr = container_of(attr, typeof(*hc_attr), kattr);
++
++	if (!hc_attr->pld_len)
++		return -ENOENT;
++
++	pld = hc_buf + hc_attr->pld_ofs;
++	pld_len = hc_attr->pld_len;
++
++	return hc_attr->tshow(pld, pld_len, buf);
++}
++
++/*
++ * This function will allocate and free memory every time it is called. This
++ * is not the fastest way to do this, but since the data is rarely read (mainly
++ * at boot time to load wlan caldata), this makes it possible to save memory for
++ * the system.
++ */
++static ssize_t hc_wlan_data_bin_read(struct file *filp, struct kobject *kobj,
++				     struct bin_attribute *attr, char *buf,
++				     loff_t off, size_t count)
++{
++	struct hc_wlan_attr *hc_wattr;
++	size_t outlen;
++	void *outbuf;
++	int ret;
++
++	hc_wattr = container_of(attr, typeof(*hc_wattr), battr);
++
++	if (!hc_wattr->pld_len)
++		return -ENOENT;
++
++	outlen = RB_ART_SIZE;
++
++	/* Don't bother unpacking if the source is already too large */
++	if (hc_wattr->pld_len > outlen)
++		return -EFBIG;
++
++	outbuf = kmalloc(outlen, GFP_KERNEL);
++	if (!outbuf)
++		return -ENOMEM;
++
++	ret = hc_wlan_data_unpack(hc_wattr->erd_tag_id, hc_wattr->pld_ofs, hc_wattr->pld_len, outbuf, &outlen);
++	if (ret) {
++		kfree(outbuf);
++		return ret;
++	}
++
++	if (off >= outlen) {
++		kfree(outbuf);
++		return 0;
++	}
++
++	if (off + count > outlen)
++		count = outlen - off;
++
++	memcpy(buf, outbuf + off, count);
++
++	kfree(outbuf);
++	return count;
++}
++
++int __init rb_hardconfig_init(struct kobject *rb_kobj)
++{
++	struct kobject *hc_wlan_kobj;
++	struct mtd_info *mtd;
++	size_t bytes_read, buflen, outlen;
++	const u8 *buf;
++	void *outbuf;
++	int i, j, ret;
++	u32 magic;
++
++	hc_buf = NULL;
++	hc_kobj = NULL;
++	hc_wlan_kobj = NULL;
++
++	// TODO allow override
++	mtd = get_mtd_device_nm(RB_MTD_HARD_CONFIG);
++	if (IS_ERR(mtd))
++		return -ENODEV;
++
++	hc_buflen = mtd->size;
++	hc_buf = kmalloc(hc_buflen, GFP_KERNEL);
++	if (!hc_buf) {
++		put_mtd_device(mtd);
++		return -ENOMEM;
++	}
++
++	ret = mtd_read(mtd, 0, hc_buflen, &bytes_read, hc_buf);
++	put_mtd_device(mtd);
++
++	if (ret)
++		goto fail;
++
++	if (bytes_read != hc_buflen) {
++		ret = -EIO;
++		goto fail;
++	}
++
++	/* Check we have what we expect */
++	magic = *(const u32 *)hc_buf;
++	if (RB_MAGIC_HARD != magic) {
++		ret = -EINVAL;
++		goto fail;
++	}
++
++	/* Skip magic */
++	buf = hc_buf + sizeof(magic);
++	buflen = hc_buflen - sizeof(magic);
++
++	/* Populate sysfs */
++	ret = -ENOMEM;
++	hc_kobj = kobject_create_and_add(RB_MTD_HARD_CONFIG, rb_kobj);
++	if (!hc_kobj)
++		goto fail;
++
++	/* Locate and publish all known tags */
++	for (i = 0; i < ARRAY_SIZE(hc_attrs); i++) {
++		ret = routerboot_tag_find(buf, buflen, hc_attrs[i].tag_id,
++					  &hc_attrs[i].pld_ofs, &hc_attrs[i].pld_len);
++		if (ret) {
++			hc_attrs[i].pld_ofs = hc_attrs[i].pld_len = 0;
++			continue;
++		}
++
++		/* Account for skipped magic */
++		hc_attrs[i].pld_ofs += sizeof(magic);
++
++		/*
++		 * Special case RB_ID_WLAN_DATA to prep and create the binary attribute.
++		 * We first check if the data is "old style" within a single tag (or no tag at all):
++		 * If it is we publish this single blob as a binary attribute child of hc_kobj to
++		 * preserve backward compatibility.
++		 * If it isn't and instead uses multiple ERD tags, we create a subfolder and
++		 * publish the known ones there.
++		 */
++		if ((RB_ID_WLAN_DATA == hc_attrs[i].tag_id) && hc_attrs[i].pld_len) {
++			outlen = RB_ART_SIZE;
++			outbuf = kmalloc(outlen, GFP_KERNEL);
++			if (!outbuf) {
++				pr_warn(RB_HC_PR_PFX "Out of memory parsing WLAN tag\n");
++				continue;
++			}
++
++			/* Test ID_SOLO first, if found: done */
++			ret = hc_wlan_data_unpack(RB_WLAN_ERD_ID_SOLO, hc_attrs[i].pld_ofs, hc_attrs[i].pld_len, outbuf, &outlen);
++			if (!ret) {
++				hc_wd_solo_battr.pld_ofs = hc_attrs[i].pld_ofs;
++				hc_wd_solo_battr.pld_len = hc_attrs[i].pld_len;
++
++				ret = sysfs_create_bin_file(hc_kobj, &hc_wd_solo_battr.battr);
++				if (ret)
++					pr_warn(RB_HC_PR_PFX "Could not create %s sysfs entry (%d)\n",
++						hc_wd_solo_battr.battr.attr.name, ret);
++			}
++			/* Otherwise, create "wlan_data" subtree and publish known data */
++			else {
++				hc_wlan_kobj = kobject_create_and_add("wlan_data", hc_kobj);
++				if (!hc_wlan_kobj) {
++					kfree(outbuf);
++					pr_warn(RB_HC_PR_PFX "Could not create wlan_data sysfs folder\n");
++					continue;
++				}
++
++				for (j = 0; j < ARRAY_SIZE(hc_wd_multi_battrs); j++) {
++					outlen = RB_ART_SIZE;
++					ret = hc_wlan_data_unpack(hc_wd_multi_battrs[j].erd_tag_id,
++								  hc_attrs[i].pld_ofs, hc_attrs[i].pld_len, outbuf, &outlen);
++					if (ret) {
++						hc_wd_multi_battrs[j].pld_ofs = hc_wd_multi_battrs[j].pld_len = 0;
++						continue;
++					}
++
++					hc_wd_multi_battrs[j].pld_ofs = hc_attrs[i].pld_ofs;
++					hc_wd_multi_battrs[j].pld_len = hc_attrs[i].pld_len;
++
++					ret = sysfs_create_bin_file(hc_wlan_kobj, &hc_wd_multi_battrs[j].battr);
++					if (ret)
++						pr_warn(RB_HC_PR_PFX "Could not create wlan_data/%s sysfs entry (%d)\n",
++							hc_wd_multi_battrs[j].battr.attr.name, ret);
++				}
++			}
++
++			kfree(outbuf);
++		}
++		/* All other tags are published via standard attributes */
++		else {
++			ret = sysfs_create_file(hc_kobj, &hc_attrs[i].kattr.attr);
++			if (ret)
++				pr_warn(RB_HC_PR_PFX "Could not create %s sysfs entry (%d)\n",
++				       hc_attrs[i].kattr.attr.name, ret);
++		}
++	}
++
++	pr_info("MikroTik RouterBOARD hardware configuration sysfs driver v" RB_HARDCONFIG_VER "\n");
++
++	return 0;
++
++fail:
++	kfree(hc_buf);
++	hc_buf = NULL;
++	return ret;
++}
++
++void __exit rb_hardconfig_exit(void)
++{
++	kobject_put(hc_kobj);
++	kfree(hc_buf);
++}
+diff --git a/target/linux/generic/files-5.4/drivers/platform/mikrotik/rb_softconfig.c b/target/linux/generic/files-5.4/drivers/platform/mikrotik/rb_softconfig.c
+new file mode 100644
+index 0000000000..070bd32d5a
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/platform/mikrotik/rb_softconfig.c
+@@ -0,0 +1,806 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Driver for MikroTik RouterBoot soft config.
++ *
++ * Copyright (C) 2020 Thibaut VARÈNE <hacks+kernel@slashdirt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ *
++ * This driver exposes the data encoded in the "soft_config" flash segment of
++ * MikroTik RouterBOARDs devices. It presents the data in a sysfs folder
++ * named "soft_config". The data is presented in a user/machine-friendly way
++ * with just as much parsing as can be generalized across mikrotik platforms
++ * (as inferred from reverse-engineering).
++ *
++ * The known soft_config tags are presented in the "soft_config" sysfs folder,
++ * with the addition of one specific file named "commit", which is only
++ * available if the driver supports writes to the mtd device: no modifications
++ * made to any of the other attributes are actually written back to flash media
++ * until a true value is input into this file (e.g. [Yy1]). This is to avoid
++ * unnecessary flash wear, and to permit to revert all changes by issuing a
++ * false value ([Nn0]). Reading the content of this file shows the current
++ * status of the driver: if the data in sysfs matches the content of the
++ * soft_config partition, the file will read "clean". Otherwise, it will read
++ * "dirty".
++ *
++ * The writeable sysfs files presented by this driver will accept only inputs
++ * which are in a valid range for the given tag. As a design choice, the driver
++ * will not assess whether the inputs are identical to the existing data.
++ *
++ * Note: PAGE_SIZE is assumed to be >= 4K, hence the device attribute show
++ * routines need not check for output overflow.
++ *
++ * Some constant defines extracted from rbcfg.h by Gabor Juhos
++ * <juhosg@openwrt.org>
++ */
++
++#include <linux/types.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/slab.h>
++#include <linux/errno.h>
++#include <linux/kobject.h>
++#include <linux/string.h>
++#include <linux/mtd/mtd.h>
++#include <linux/sysfs.h>
++#include <linux/version.h>
++#include <linux/capability.h>
++#include <linux/spinlock.h>
++#include <linux/crc32.h>
++
++#ifdef CONFIG_ATH79
++ #include <asm/mach-ath79/ath79.h>
++#endif
++
++#include "routerboot.h"
++
++#define RB_SOFTCONFIG_VER		"0.03"
++#define RB_SC_PR_PFX			"[rb_softconfig] "
++
++/*
++ * mtd operations before 4.17 are asynchronous, not handled by this code
++ * Also make the driver act read-only if 4K_SECTORS are not enabled, since they
++ * are require to handle partial erasing of the small soft_config partition.
++ */
++#if defined(CONFIG_MTD_SPI_NOR_USE_4K_SECTORS)
++ #define RB_SC_HAS_WRITE_SUPPORT	true
++ #define RB_SC_WMODE			S_IWUSR
++ #define RB_SC_RMODE			S_IRUSR
++#else
++ #define RB_SC_HAS_WRITE_SUPPORT	false
++ #define RB_SC_WMODE			0
++ #define RB_SC_RMODE			S_IRUSR
++#endif
++
++/* ID values for software settings */
++#define RB_SCID_UART_SPEED		0x01	// u32*1
++#define RB_SCID_BOOT_DELAY		0x02	// u32*1
++#define RB_SCID_BOOT_DEVICE		0x03	// u32*1
++#define RB_SCID_BOOT_KEY		0x04	// u32*1
++#define RB_SCID_CPU_MODE		0x05	// u32*1
++#define RB_SCID_BIOS_VERSION		0x06	// str
++#define RB_SCID_BOOT_PROTOCOL		0x09	// u32*1
++#define RB_SCID_CPU_FREQ_IDX		0x0C	// u32*1
++#define RB_SCID_BOOTER			0x0D	// u32*1
++#define RB_SCID_SILENT_BOOT		0x0F	// u32*1
++/*
++ * protected_routerboot seems to use tag 0x1F. It only works in combination with
++ * RouterOS, resulting in a wiped board otherwise, so it's not implemented here.
++ * The tag values are as follows:
++ * - off: 0x0
++ * - on: the lower halfword encodes the max value in s for the reset feature,
++ *	 the higher halfword encodes the min value in s for the reset feature.
++ * Default value when on: 0x00140258: 0x14 = 20s / 0x258= 600s
++ * See details here: https://wiki.mikrotik.com/wiki/Manual:RouterBOARD_settings#Protected_bootloader
++ */
++
++/* Tag values */
++
++#define RB_UART_SPEED_115200		0
++#define RB_UART_SPEED_57600		1
++#define RB_UART_SPEED_38400		2
++#define RB_UART_SPEED_19200		3
++#define RB_UART_SPEED_9600		4
++#define RB_UART_SPEED_4800		5
++#define RB_UART_SPEED_2400		6
++#define RB_UART_SPEED_1200		7
++#define RB_UART_SPEED_OFF		8
++
++/* valid boot delay: 1 - 9s in 1s increment */
++#define RB_BOOT_DELAY_MIN		1
++#define RB_BOOT_DELAY_MAX		9
++
++#define RB_BOOT_DEVICE_ETHER		0	// "boot over Ethernet"
++#define RB_BOOT_DEVICE_NANDETH		1	// "boot from NAND, if fail then Ethernet"
++#define RB_BOOT_DEVICE_CFCARD		2	// (not available in rbcfg)
++#define RB_BOOT_DEVICE_ETHONCE		3	// "boot Ethernet once, then NAND"
++#define RB_BOOT_DEVICE_NANDONLY		5	// "boot from NAND only"
++#define RB_BOOT_DEVICE_FLASHCFG		7	// "boot in flash configuration mode"
++#define RB_BOOT_DEVICE_FLSHONCE		8	// "boot in flash configuration mode once, then NAND"
++
++/*
++ * ATH79 9xxx CPU frequency indices.
++ * It is unknown if they apply to all ATH79 RBs, and some do not seem to feature
++ * the upper levels (QCA955x), while F is presumably AR9344-only.
++ */
++#define RB_CPU_FREQ_IDX_ATH79_9X_A	(0 << 3)
++#define RB_CPU_FREQ_IDX_ATH79_9X_B	(1 << 3)	// 0x8
++#define RB_CPU_FREQ_IDX_ATH79_9X_C	(2 << 3)	// 0x10 - factory freq for many devices
++#define RB_CPU_FREQ_IDX_ATH79_9X_D	(3 << 3)	// 0x18
++#define RB_CPU_FREQ_IDX_ATH79_9X_E	(4 << 3)	// 0x20
++#define RB_CPU_FREQ_IDX_ATH79_9X_F	(5 << 3)	// 0x28
++
++#define RB_CPU_FREQ_IDX_ATH79_9X_MIN		0	// all devices support lowest setting
++#define RB_CPU_FREQ_IDX_ATH79_9X_AR9334_MAX	5	// stops at F
++#define RB_CPU_FREQ_IDX_ATH79_9X_QCA953X_MAX	4	// stops at E
++#define RB_CPU_FREQ_IDX_ATH79_9X_QCA9556_MAX	2	// stops at C
++#define RB_CPU_FREQ_IDX_ATH79_9X_QCA9558_MAX	3	// stops at D
++
++/* ATH79 7xxx CPU frequency indices. */
++#define RB_CPU_FREQ_IDX_ATH79_7X_A	((0 * 9) << 4)
++#define RB_CPU_FREQ_IDX_ATH79_7X_B	((1 * 9) << 4)
++#define RB_CPU_FREQ_IDX_ATH79_7X_C	((2 * 9) << 4)
++#define RB_CPU_FREQ_IDX_ATH79_7X_D	((3 * 9) << 4)
++#define RB_CPU_FREQ_IDX_ATH79_7X_E	((4 * 9) << 4)
++#define RB_CPU_FREQ_IDX_ATH79_7X_F	((5 * 9) << 4)
++#define RB_CPU_FREQ_IDX_ATH79_7X_G	((6 * 9) << 4)
++#define RB_CPU_FREQ_IDX_ATH79_7X_H	((7 * 9) << 4)
++
++#define RB_CPU_FREQ_IDX_ATH79_7X_MIN		0	// all devices support lowest setting
++#define RB_CPU_FREQ_IDX_ATH79_7X_AR724X_MAX	3	// stops at D
++#define RB_CPU_FREQ_IDX_ATH79_7X_AR7161_MAX	7	// stops at H - check if applies to all AR71xx devices
++
++#define RB_SC_CRC32_OFFSET		4	// located right after magic
++
++static struct kobject *sc_kobj;
++static u8 *sc_buf;
++static size_t sc_buflen;
++static rwlock_t sc_bufrwl;		// rw lock to sc_buf
++
++/* MUST be used with lock held */
++#define RB_SC_CLRCRC()		*(u32 *)(sc_buf + RB_SC_CRC32_OFFSET) = 0
++#define RB_SC_GETCRC()		*(u32 *)(sc_buf + RB_SC_CRC32_OFFSET)
++#define RB_SC_SETCRC(_crc)	*(u32 *)(sc_buf + RB_SC_CRC32_OFFSET) = (_crc)
++
++struct sc_u32tvs {
++	const u32 val;
++	const char *str;
++};
++
++#define RB_SC_TVS(_val, _str) {		\
++	.val = (_val),			\
++	.str = (_str),			\
++}
++
++static ssize_t sc_tag_show_u32tvs(const u8 *pld, u16 pld_len, char *buf,
++				  const struct sc_u32tvs tvs[], const int tvselmts)
++{
++	const char *fmt;
++	char *out = buf;
++	u32 data;	// cpu-endian
++	int i;
++
++	// fallback to raw hex output if we can't handle the input
++	if (tvselmts < 0)
++		return routerboot_tag_show_u32s(pld, pld_len, buf);
++
++	if (sizeof(data) != pld_len)
++		return -EINVAL;
++
++	read_lock(&sc_bufrwl);
++	data = *(u32 *)pld;		// pld aliases sc_buf
++	read_unlock(&sc_bufrwl);
++
++	for (i = 0; i < tvselmts; i++) {
++		fmt = (tvs[i].val == data) ? "[%s] " : "%s ";
++		out += sprintf(out, fmt, tvs[i].str);
++	}
++
++	out += sprintf(out, "\n");
++	return out - buf;
++}
++
++static ssize_t sc_tag_store_u32tvs(const u8 *pld, u16 pld_len, const char *buf, size_t count,
++				   const struct sc_u32tvs tvs[], const int tvselmts)
++{
++	int i;
++
++	if (tvselmts < 0)
++		return tvselmts;
++
++	if (sizeof(u32) != pld_len)
++		return -EINVAL;
++
++	for (i = 0; i < tvselmts; i++) {
++		if (sysfs_streq(buf, tvs[i].str)) {
++			write_lock(&sc_bufrwl);
++			*(u32 *)pld = tvs[i].val;	// pld aliases sc_buf
++			RB_SC_CLRCRC();
++			write_unlock(&sc_bufrwl);
++			return count;
++		}
++	}
++
++	return -EINVAL;
++}
++
++struct sc_boolts {
++	const char *strfalse;
++	const char *strtrue;
++};
++
++static ssize_t sc_tag_show_boolts(const u8 *pld, u16 pld_len, char *buf,
++				  const struct sc_boolts *bts)
++{
++	const char *fmt;
++	char *out = buf;
++	u32 data;	// cpu-endian
++
++	if (sizeof(data) != pld_len)
++		return -EINVAL;
++
++	read_lock(&sc_bufrwl);
++	data = *(u32 *)pld;		// pld aliases sc_buf
++	read_unlock(&sc_bufrwl);
++
++	fmt = (data) ? "%s [%s]\n" : "[%s] %s\n";
++	out += sprintf(out, fmt, bts->strfalse, bts->strtrue);
++
++	return out - buf;
++}
++
++static ssize_t sc_tag_store_boolts(const u8 *pld, u16 pld_len, const char *buf, size_t count,
++				   const struct sc_boolts *bts)
++{
++	u32 data;	// cpu-endian
++
++	if (sizeof(data) != pld_len)
++		return -EINVAL;
++
++	if (sysfs_streq(buf, bts->strfalse))
++		data = 0;
++	else if (sysfs_streq(buf, bts->strtrue))
++		data = 1;
++	else
++		return -EINVAL;
++
++	write_lock(&sc_bufrwl);
++	*(u32 *)pld = data;		// pld aliases sc_buf
++	RB_SC_CLRCRC();
++	write_unlock(&sc_bufrwl);
++
++	return count;
++}
++static struct sc_u32tvs const sc_uartspeeds[] = {
++	RB_SC_TVS(RB_UART_SPEED_OFF,	"off"),
++	RB_SC_TVS(RB_UART_SPEED_1200,	"1200"),
++	RB_SC_TVS(RB_UART_SPEED_2400,	"2400"),
++	RB_SC_TVS(RB_UART_SPEED_4800,	"4800"),
++	RB_SC_TVS(RB_UART_SPEED_9600,	"9600"),
++	RB_SC_TVS(RB_UART_SPEED_19200,	"19200"),
++	RB_SC_TVS(RB_UART_SPEED_38400,	"38400"),
++	RB_SC_TVS(RB_UART_SPEED_57600,	"57600"),
++	RB_SC_TVS(RB_UART_SPEED_115200,	"115200"),
++};
++
++/*
++ * While the defines are carried over from rbcfg, use strings that more clearly
++ * show the actual setting purpose (especially since the NAND* settings apply
++ * to both nand- and nor-based devices). "cfcard" was disabled in rbcfg: disable
++ * it here too.
++ */
++static struct sc_u32tvs const sc_bootdevices[] = {
++	RB_SC_TVS(RB_BOOT_DEVICE_ETHER,		"eth"),
++	RB_SC_TVS(RB_BOOT_DEVICE_NANDETH,	"flasheth"),
++	//RB_SC_TVS(RB_BOOT_DEVICE_CFCARD,	"cfcard"),
++	RB_SC_TVS(RB_BOOT_DEVICE_ETHONCE,	"ethonce"),
++	RB_SC_TVS(RB_BOOT_DEVICE_NANDONLY,	"flash"),
++	RB_SC_TVS(RB_BOOT_DEVICE_FLASHCFG,	"cfg"),
++	RB_SC_TVS(RB_BOOT_DEVICE_FLSHONCE,	"cfgonce"),
++};
++
++static struct sc_boolts const sc_bootkey = {
++	.strfalse = "any",
++	.strtrue = "del",
++};
++
++static struct sc_boolts const sc_cpumode = {
++	.strfalse = "powersave",
++	.strtrue = "regular",
++};
++
++static struct sc_boolts const sc_bootproto = {
++	.strfalse = "bootp",
++	.strtrue = "dhcp",
++};
++
++static struct sc_boolts const sc_booter = {
++	.strfalse = "regular",
++	.strtrue = "backup",
++};
++
++static struct sc_boolts const sc_silent_boot = {
++	.strfalse = "off",
++	.strtrue = "on",
++};
++
++#define SC_TAG_SHOW_STORE_U32TVS_FUNCS(_name)		\
++static ssize_t sc_tag_show_##_name(const u8 *pld, u16 pld_len, char *buf)	\
++{										\
++	return sc_tag_show_u32tvs(pld, pld_len, buf, sc_##_name, ARRAY_SIZE(sc_##_name));	\
++}										\
++static ssize_t sc_tag_store_##_name(const u8 *pld, u16 pld_len, const char *buf, size_t count)	\
++{										\
++	return sc_tag_store_u32tvs(pld, pld_len, buf, count, sc_##_name, ARRAY_SIZE(sc_##_name));	\
++}
++
++#define SC_TAG_SHOW_STORE_BOOLTS_FUNCS(_name)		\
++static ssize_t sc_tag_show_##_name(const u8 *pld, u16 pld_len, char *buf)	\
++{										\
++	return sc_tag_show_boolts(pld, pld_len, buf, &sc_##_name);	\
++}										\
++static ssize_t sc_tag_store_##_name(const u8 *pld, u16 pld_len, const char *buf, size_t count)	\
++{										\
++	return sc_tag_store_boolts(pld, pld_len, buf, count, &sc_##_name);	\
++}
++
++SC_TAG_SHOW_STORE_U32TVS_FUNCS(uartspeeds)
++SC_TAG_SHOW_STORE_U32TVS_FUNCS(bootdevices)
++SC_TAG_SHOW_STORE_BOOLTS_FUNCS(bootkey)
++SC_TAG_SHOW_STORE_BOOLTS_FUNCS(cpumode)
++SC_TAG_SHOW_STORE_BOOLTS_FUNCS(bootproto)
++SC_TAG_SHOW_STORE_BOOLTS_FUNCS(booter)
++SC_TAG_SHOW_STORE_BOOLTS_FUNCS(silent_boot)
++
++static ssize_t sc_tag_show_bootdelays(const u8 *pld, u16 pld_len, char *buf)
++{
++	const char *fmt;
++	char *out = buf;
++	u32 data;	// cpu-endian
++	int i;
++
++	if (sizeof(data) != pld_len)
++		return -EINVAL;
++
++	read_lock(&sc_bufrwl);
++	data = *(u32 *)pld;		// pld aliases sc_buf
++	read_unlock(&sc_bufrwl);
++
++	for (i = RB_BOOT_DELAY_MIN; i <= RB_BOOT_DELAY_MAX; i++) {
++		fmt = (i == data) ? "[%d] " : "%d ";
++		out += sprintf(out, fmt, i);
++	}
++
++	out += sprintf(out, "\n");
++	return out - buf;
++}
++
++static ssize_t sc_tag_store_bootdelays(const u8 *pld, u16 pld_len, const char *buf, size_t count)
++{
++	u32 data;	// cpu-endian
++	int ret;
++
++	if (sizeof(data) != pld_len)
++		return -EINVAL;
++
++	ret = kstrtou32(buf, 10, &data);
++	if (ret)
++		return ret;
++
++	if ((data < RB_BOOT_DELAY_MIN) || (RB_BOOT_DELAY_MAX < data))
++		return -EINVAL;
++
++	write_lock(&sc_bufrwl);
++	*(u32 *)pld = data;		// pld aliases sc_buf
++	RB_SC_CLRCRC();
++	write_unlock(&sc_bufrwl);
++
++	return count;
++}
++
++/* Support CPU frequency accessors only when the tag format has been asserted */
++#if defined(CONFIG_ATH79)
++/* Use the same letter-based nomenclature as RouterBOOT */
++static struct sc_u32tvs const sc_cpufreq_indexes_ath79_9x[] = {
++	RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_A,	"a"),
++	RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_B,	"b"),
++	RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_C,	"c"),
++	RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_D,	"d"),
++	RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_E,	"e"),
++	RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_F,	"f"),
++};
++
++static struct sc_u32tvs const sc_cpufreq_indexes_ath79_7x[] = {
++	RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_A,	"a"),
++	RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_B,	"b"),
++	RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_C,	"c"),
++	RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_D,	"d"),
++	RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_E,	"e"),
++	RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_F,	"f"),
++	RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_G,	"g"),
++	RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_H,	"h"),
++};
++
++static int sc_tag_cpufreq_ath79_arraysize(void)
++{
++	int idx_max;
++
++	if (ATH79_SOC_AR7161 == ath79_soc)
++		idx_max = RB_CPU_FREQ_IDX_ATH79_7X_AR7161_MAX+1;
++	else if (soc_is_ar724x())
++		idx_max = RB_CPU_FREQ_IDX_ATH79_7X_AR724X_MAX+1;
++	else if (soc_is_ar9344())
++		idx_max = RB_CPU_FREQ_IDX_ATH79_9X_AR9334_MAX+1;
++	else if (soc_is_qca953x())
++		idx_max = RB_CPU_FREQ_IDX_ATH79_9X_QCA953X_MAX+1;
++	else if (soc_is_qca9556())
++		idx_max = RB_CPU_FREQ_IDX_ATH79_9X_QCA9556_MAX+1;
++	else if (soc_is_qca9558())
++		idx_max = RB_CPU_FREQ_IDX_ATH79_9X_QCA9558_MAX+1;
++	else
++		idx_max = -EOPNOTSUPP;
++
++	return idx_max;
++}
++
++static ssize_t sc_tag_show_cpufreq_indexes(const u8 *pld, u16 pld_len, char *buf)
++{
++	const struct sc_u32tvs *tvs;
++
++	if (soc_is_ar71xx() || soc_is_ar724x())
++		tvs = sc_cpufreq_indexes_ath79_7x;
++	else
++		tvs = sc_cpufreq_indexes_ath79_9x;
++
++	return sc_tag_show_u32tvs(pld, pld_len, buf, tvs, sc_tag_cpufreq_ath79_arraysize());
++}
++
++static ssize_t sc_tag_store_cpufreq_indexes(const u8 *pld, u16 pld_len, const char *buf, size_t count)
++{
++	const struct sc_u32tvs *tvs;
++
++	if (soc_is_ar71xx() || soc_is_ar724x())
++		tvs = sc_cpufreq_indexes_ath79_7x;
++	else
++		tvs = sc_cpufreq_indexes_ath79_9x;
++
++	return sc_tag_store_u32tvs(pld, pld_len, buf, count, tvs, sc_tag_cpufreq_ath79_arraysize());
++}
++#else
++ /* By default we only show the raw value to help with reverse-engineering */
++ #define sc_tag_show_cpufreq_indexes	routerboot_tag_show_u32s
++ #define sc_tag_store_cpufreq_indexes	NULL
++#endif
++
++static ssize_t sc_attr_show(struct kobject *kobj, struct kobj_attribute *attr,
++			    char *buf);
++static ssize_t sc_attr_store(struct kobject *kobj, struct kobj_attribute *attr,
++			     const char *buf, size_t count);
++
++/* Array of known tags to publish in sysfs */
++static struct sc_attr {
++	const u16 tag_id;
++	/* sysfs tag show attribute. Must lock sc_buf when dereferencing pld */
++	ssize_t (* const tshow)(const u8 *pld, u16 pld_len, char *buf);
++	/* sysfs tag store attribute. Must lock sc_buf when dereferencing pld */
++	ssize_t (* const tstore)(const u8 *pld, u16 pld_len, const char *buf, size_t count);
++	struct kobj_attribute kattr;
++	u16 pld_ofs;
++	u16 pld_len;
++} sc_attrs[] = {
++	{
++		.tag_id = RB_SCID_UART_SPEED,
++		.tshow = sc_tag_show_uartspeeds,
++		.tstore = sc_tag_store_uartspeeds,
++		.kattr = __ATTR(uart_speed, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
++	}, {
++		.tag_id = RB_SCID_BOOT_DELAY,
++		.tshow = sc_tag_show_bootdelays,
++		.tstore = sc_tag_store_bootdelays,
++		.kattr = __ATTR(boot_delay, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
++	}, {
++		.tag_id = RB_SCID_BOOT_DEVICE,
++		.tshow = sc_tag_show_bootdevices,
++		.tstore = sc_tag_store_bootdevices,
++		.kattr = __ATTR(boot_device, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
++	}, {
++		.tag_id = RB_SCID_BOOT_KEY,
++		.tshow = sc_tag_show_bootkey,
++		.tstore = sc_tag_store_bootkey,
++		.kattr = __ATTR(boot_key, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
++	}, {
++		.tag_id = RB_SCID_CPU_MODE,
++		.tshow = sc_tag_show_cpumode,
++		.tstore = sc_tag_store_cpumode,
++		.kattr = __ATTR(cpu_mode, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
++	}, {
++		.tag_id = RB_SCID_BIOS_VERSION,
++		.tshow = routerboot_tag_show_string,
++		.tstore = NULL,
++		.kattr = __ATTR(bios_version, RB_SC_RMODE, sc_attr_show, NULL),
++	}, {
++		.tag_id = RB_SCID_BOOT_PROTOCOL,
++		.tshow = sc_tag_show_bootproto,
++		.tstore = sc_tag_store_bootproto,
++		.kattr = __ATTR(boot_proto, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
++	}, {
++		.tag_id = RB_SCID_CPU_FREQ_IDX,
++		.tshow = sc_tag_show_cpufreq_indexes,
++		.tstore = sc_tag_store_cpufreq_indexes,
++		.kattr = __ATTR(cpufreq_index, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
++	}, {
++		.tag_id = RB_SCID_BOOTER,
++		.tshow = sc_tag_show_booter,
++		.tstore = sc_tag_store_booter,
++		.kattr = __ATTR(booter, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
++	}, {
++		.tag_id = RB_SCID_SILENT_BOOT,
++		.tshow = sc_tag_show_silent_boot,
++		.tstore = sc_tag_store_silent_boot,
++		.kattr = __ATTR(silent_boot, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
++	},
++};
++
++static ssize_t sc_attr_show(struct kobject *kobj, struct kobj_attribute *attr,
++			    char *buf)
++{
++	const struct sc_attr *sc_attr;
++	const u8 *pld;
++	u16 pld_len;
++
++	sc_attr = container_of(attr, typeof(*sc_attr), kattr);
++
++	if (!sc_attr->pld_len)
++		return -ENOENT;
++
++	pld = sc_buf + sc_attr->pld_ofs;	// pld aliases sc_buf -> lock!
++	pld_len = sc_attr->pld_len;
++
++	return sc_attr->tshow(pld, pld_len, buf);
++}
++
++static ssize_t sc_attr_store(struct kobject *kobj, struct kobj_attribute *attr,
++			     const char *buf, size_t count)
++{
++	const struct sc_attr *sc_attr;
++	const u8 *pld;
++	u16 pld_len;
++
++	if (!RB_SC_HAS_WRITE_SUPPORT)
++		return -EOPNOTSUPP;
++
++	if (!capable(CAP_SYS_ADMIN))
++		return -EACCES;
++
++	sc_attr = container_of(attr, typeof(*sc_attr), kattr);
++
++	if (!sc_attr->tstore)
++		return -EOPNOTSUPP;
++
++	if (!sc_attr->pld_len)
++		return -ENOENT;
++
++	pld = sc_buf + sc_attr->pld_ofs;	// pld aliases sc_buf -> lock!
++	pld_len = sc_attr->pld_len;
++
++	return sc_attr->tstore(pld, pld_len, buf, count);
++}
++
++/*
++ * Shows the current buffer status:
++ * "clean": the buffer is in sync with the mtd data
++ * "dirty": the buffer is out of sync with the mtd data
++ */
++static ssize_t sc_commit_show(struct kobject *kobj, struct kobj_attribute *attr,
++			      char *buf)
++{
++	const char *str;
++	char *out = buf;
++	u32 crc;
++
++	read_lock(&sc_bufrwl);
++	crc = RB_SC_GETCRC();
++	read_unlock(&sc_bufrwl);
++
++	str = (crc) ? "clean" : "dirty";
++	out += sprintf(out, "%s\n", str);
++
++	return out - buf;
++}
++
++/*
++ * Performs buffer flushing:
++ * This routine expects an input compatible with kstrtobool().
++ * - a "false" input discards the current changes and reads data back from mtd.
++ * - a "true" input commits the current changes to mtd.
++ * If there is no pending changes, this routine is a no-op.
++ * Handling failures is left as an exercise to userspace.
++ */
++static ssize_t sc_commit_store(struct kobject *kobj, struct kobj_attribute *attr,
++			      const char *buf, size_t count)
++{
++	struct mtd_info *mtd;
++	struct erase_info ei;
++	size_t bytes_rw, ret = count;
++	bool flush;
++	u32 crc;
++
++	if (!RB_SC_HAS_WRITE_SUPPORT)
++		return -EOPNOTSUPP;
++
++	read_lock(&sc_bufrwl);
++	crc = RB_SC_GETCRC();
++	read_unlock(&sc_bufrwl);
++
++	if (crc)
++		return count;	// NO-OP
++
++	ret = kstrtobool(buf, &flush);
++	if (ret)
++		return ret;
++
++	mtd = get_mtd_device_nm(RB_MTD_SOFT_CONFIG);	// TODO allow override
++	if (IS_ERR(mtd))
++		return -ENODEV;
++
++	write_lock(&sc_bufrwl);
++	if (!flush)	// reread
++		ret = mtd_read(mtd, 0, mtd->size, &bytes_rw, sc_buf);
++	else {	// crc32 + commit
++		/*
++		 * CRC32 is computed on the entire buffer, excluding the CRC
++		 * value itself. CRC is already null when we reach this point,
++		 * so we can compute the CRC32 on the buffer as is.
++		 * The expected CRC32 is Ethernet FCS style, meaning the seed is
++		 * ~0 and the final result is also bitflipped.
++		 */
++
++		crc = ~crc32(~0, sc_buf, sc_buflen);
++		RB_SC_SETCRC(crc);
++
++		/*
++		 * The soft_config partition is assumed to be entirely contained
++		 * in a single eraseblock.
++		 */
++
++		ei.addr = 0;
++		ei.len = mtd->size;
++		ret = mtd_erase(mtd, &ei);
++		if (!ret)
++			ret = mtd_write(mtd, 0, mtd->size, &bytes_rw, sc_buf);
++
++		/*
++		 * Handling mtd_write() failure here is a tricky situation. The
++		 * proposed approach is to let userspace deal with retrying,
++		 * with the caveat that it must try to flush the buffer again as
++		 * rereading the mtd contents could potentially read garbage.
++		 * The rationale is: even if we keep a shadow buffer of the
++		 * original content, there is no guarantee that we will ever be
++		 * able to write it anyway.
++		 * Regardless, it appears that RouterBOOT will ignore an invalid
++		 * soft_config (including a completely wiped segment) and will
++		 * write back factory defaults when it happens.
++		 */
++	}
++	write_unlock(&sc_bufrwl);
++
++	put_mtd_device(mtd);
++
++	if (ret)
++		goto mtdfail;
++
++	if (bytes_rw != sc_buflen) {
++		ret = -EIO;
++		goto mtdfail;
++	}
++
++	return count;
++
++mtdfail:
++	RB_SC_CLRCRC();	// mark buffer content as dirty/invalid
++	return ret;
++}
++
++static struct kobj_attribute sc_kattrcommit = __ATTR(commit, RB_SC_RMODE|RB_SC_WMODE, sc_commit_show, sc_commit_store);
++
++int __init rb_softconfig_init(struct kobject *rb_kobj)
++{
++	struct mtd_info *mtd;
++	size_t bytes_read, buflen;
++	const u8 *buf;
++	int i, ret;
++	u32 magic;
++
++	sc_buf = NULL;
++	sc_kobj = NULL;
++
++	// TODO allow override
++	mtd = get_mtd_device_nm(RB_MTD_SOFT_CONFIG);
++	if (IS_ERR(mtd))
++		return -ENODEV;
++
++	sc_buflen = mtd->size;
++	sc_buf = kmalloc(sc_buflen, GFP_KERNEL);
++	if (!sc_buf) {
++		put_mtd_device(mtd);
++		return -ENOMEM;
++	}
++
++	ret = mtd_read(mtd, 0, sc_buflen, &bytes_read, sc_buf);
++	put_mtd_device(mtd);
++
++	if (ret)
++		goto fail;
++
++	if (bytes_read != sc_buflen) {
++		ret = -EIO;
++		goto fail;
++	}
++
++	/* Check we have what we expect */
++	magic = *(const u32 *)sc_buf;
++	if (RB_MAGIC_SOFT != magic) {
++		ret = -EINVAL;
++		goto fail;
++	}
++
++	/* Skip magic and 32bit CRC located immediately after */
++	buf = sc_buf + (sizeof(magic) + sizeof(u32));
++	buflen = sc_buflen - (sizeof(magic) + sizeof(u32));
++
++	/* Populate sysfs */
++	ret = -ENOMEM;
++	sc_kobj = kobject_create_and_add(RB_MTD_SOFT_CONFIG, rb_kobj);
++	if (!sc_kobj)
++		goto fail;
++
++	rwlock_init(&sc_bufrwl);
++
++	/* Locate and publish all known tags */
++	for (i = 0; i < ARRAY_SIZE(sc_attrs); i++) {
++		ret = routerboot_tag_find(buf, buflen, sc_attrs[i].tag_id,
++					  &sc_attrs[i].pld_ofs, &sc_attrs[i].pld_len);
++		if (ret) {
++			sc_attrs[i].pld_ofs = sc_attrs[i].pld_len = 0;
++			continue;
++		}
++
++		/* Account for skipped magic and crc32 */
++		sc_attrs[i].pld_ofs += sizeof(magic) + sizeof(u32);
++
++		ret = sysfs_create_file(sc_kobj, &sc_attrs[i].kattr.attr);
++		if (ret)
++			pr_warn(RB_SC_PR_PFX "Could not create %s sysfs entry (%d)\n",
++			       sc_attrs[i].kattr.attr.name, ret);
++	}
++
++	/* Finally add the 'commit' attribute */
++	if (RB_SC_HAS_WRITE_SUPPORT) {
++		ret = sysfs_create_file(sc_kobj, &sc_kattrcommit.attr);
++		if (ret) {
++			pr_err(RB_SC_PR_PFX "Could not create %s sysfs entry (%d), aborting!\n",
++			       sc_kattrcommit.attr.name, ret);
++			goto sysfsfail;	// required attribute
++		}
++	}
++
++	pr_info("MikroTik RouterBOARD software configuration sysfs driver v" RB_SOFTCONFIG_VER "\n");
++
++	return 0;
++
++sysfsfail:
++	kobject_put(sc_kobj);
++	sc_kobj = NULL;
++fail:
++	kfree(sc_buf);
++	sc_buf = NULL;
++	return ret;
++}
++
++void __exit rb_softconfig_exit(void)
++{
++	kobject_put(sc_kobj);
++	kfree(sc_buf);
++}
+diff --git a/target/linux/generic/files-5.4/drivers/platform/mikrotik/routerboot.c b/target/linux/generic/files-5.4/drivers/platform/mikrotik/routerboot.c
+new file mode 100644
+index 0000000000..4c8c0bfac5
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/platform/mikrotik/routerboot.c
+@@ -0,0 +1,218 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Driver for MikroTik RouterBoot flash data. Common routines.
++ *
++ * Copyright (C) 2020 Thibaut VARÈNE <hacks+kernel@slashdirt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include <linux/types.h>
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/sysfs.h>
++
++#include "routerboot.h"
++
++static struct kobject *rb_kobj;
++
++/**
++ * routerboot_tag_find() - Locate a given tag in routerboot config data.
++ * @bufhead: the buffer to look into. Must start with a tag node.
++ * @buflen: size of bufhead
++ * @tag_id: the tag identifier to look for
++ * @pld_ofs: will be updated with tag payload offset in bufhead, if tag found
++ * @pld_len: will be updated with tag payload size, if tag found
++ *
++ * This incarnation of tag_find() does only that: it finds a specific routerboot
++ * tag node in the input buffer. Routerboot tag nodes are u32 values:
++ * - The low nibble is the tag identification number,
++ * - The high nibble is the tag payload length (node excluded) in bytes.
++ * The payload immediately follows the tag node. Tag nodes are 32bit-aligned.
++ * The returned pld_ofs will always be aligned. pld_len may not end on 32bit
++ * boundary (the only known case is when parsing ERD data).
++ * The nodes are cpu-endian on the flash media. The payload is cpu-endian when
++ * applicable. Tag nodes are not ordered (by ID) on flash.
++ *
++ * Return: 0 on success (tag found) or errno
++ */
++int routerboot_tag_find(const u8 *bufhead, const size_t buflen, const u16 tag_id,
++			u16 *pld_ofs, u16 *pld_len)
++{
++	const u32 *datum, *bufend;
++	u32 node;
++	u16 id, len;
++	int ret;
++
++	if (!bufhead || !tag_id)
++		return -EINVAL;
++
++	ret = -ENOENT;
++	datum = (const u32 *)bufhead;
++	bufend = (const u32 *)(bufhead + buflen);
++
++	while (datum < bufend) {
++		node = *datum++;
++
++		/* Tag list ends with null node */
++		if (!node)
++			break;
++
++		id = node & 0xFFFF;
++		len = node >> 16;
++
++		if (tag_id == id) {
++			if (datum >= bufend)
++				break;
++
++			if (pld_ofs)
++				*pld_ofs = (u16)((u8 *)datum - bufhead);
++			if (pld_len)
++				*pld_len = len;
++
++			ret = 0;
++			break;
++		}
++
++		/*
++		 * The only known situation where len may not end on 32bit
++		 * boundary is within ERD data. Since we're only extracting
++		 * one tag (the first and only one) from that data, we should
++		 * never need to forcefully ALIGN(). Do it anyway, this is not a
++		 * performance path.
++		 */
++		len = ALIGN(len, sizeof(*datum));
++		datum += len / sizeof(*datum);
++	}
++
++	return ret;
++}
++
++/**
++ * routerboot_rle_decode() - Simple RLE (MikroTik variant) decoding routine.
++ * @in: input buffer to decode
++ * @inlen: size of in
++ * @out: output buffer to write decoded data to
++ * @outlen: pointer to out size when function is called, will be updated with
++ * size of decoded output on return
++ *
++ * MikroTik's variant of RLE operates as follows, considering a signed run byte:
++ * - positive run => classic RLE
++ * - negative run => the next -<run> bytes must be copied verbatim
++ * The API is matched to the lzo1x routines for convenience.
++ *
++ * NB: The output buffer cannot overlap with the input buffer.
++ *
++ * Return: 0 on success or errno
++ */
++int routerboot_rle_decode(const u8 *in, size_t inlen, u8 *out, size_t *outlen)
++{
++	int ret, run, nbytes;	// use native types for speed
++	u8 byte;
++
++	if (!in || (inlen < 2) || !out)
++		return -EINVAL;
++
++	ret = -ENOSPC;
++	nbytes = 0;
++	while (inlen >= 2) {
++		run = *in++;
++		inlen--;
++
++		/* Verbatim copies */
++		if (run & 0x80) {
++			/* Invert run byte sign */
++			run = ~run & 0xFF;
++			run++;
++
++			if (run > inlen)
++				goto fail;
++
++			inlen -= run;
++
++			nbytes += run;
++			if (nbytes > *outlen)
++				goto fail;
++
++			/* Basic memcpy */
++			while (run-- > 0)
++				*out++ = *in++;
++		}
++		/* Stream of half-words RLE: <run><byte>. run == 0 is ignored */
++		else {
++			byte = *in++;
++			inlen--;
++
++			nbytes += run;
++			if (nbytes > *outlen)
++				goto fail;
++
++			while (run-- > 0)
++				*out++ = byte;
++		}
++	}
++
++	ret = 0;
++fail:
++	*outlen = nbytes;
++	return ret;
++}
++
++static int __init routerboot_init(void)
++{
++	rb_kobj = kobject_create_and_add("mikrotik", firmware_kobj);
++	if (!rb_kobj)
++		return -ENOMEM;
++
++	/*
++	 * We ignore the following return values and always register.
++	 * These init() routines are designed so that their failed state is
++	 * always manageable by the corresponding exit() calls.
++	 */
++	rb_hardconfig_init(rb_kobj);
++	rb_softconfig_init(rb_kobj);
++
++	return 0;
++}
++
++static void __exit routerboot_exit(void)
++{
++	rb_softconfig_exit();
++	rb_hardconfig_exit();
++	kobject_put(rb_kobj);	// recursive afaict
++}
++
++/* Common routines */
++
++ssize_t routerboot_tag_show_string(const u8 *pld, u16 pld_len, char *buf)
++{
++	return scnprintf(buf, pld_len+1, "%s\n", pld);
++}
++
++ssize_t routerboot_tag_show_u32s(const u8 *pld, u16 pld_len, char *buf)
++{
++	char *out = buf;
++	u32 *data;	// cpu-endian
++
++	/* Caller ensures pld_len > 0 */
++	if (pld_len % sizeof(*data))
++		return -EINVAL;
++
++	data = (u32 *)pld;
++
++	do {
++		out += sprintf(out, "0x%08x\n", *data);
++		data++;
++	} while ((pld_len -= sizeof(*data)));
++
++	return out - buf;
++}
++
++module_init(routerboot_init);
++module_exit(routerboot_exit);
++
++MODULE_LICENSE("GPL v2");
++MODULE_DESCRIPTION("MikroTik RouterBoot sysfs support");
++MODULE_AUTHOR("Thibaut VARENE");
+diff --git a/target/linux/generic/files-5.4/drivers/platform/mikrotik/routerboot.h b/target/linux/generic/files-5.4/drivers/platform/mikrotik/routerboot.h
+new file mode 100644
+index 0000000000..67d89808d5
+--- /dev/null
++++ b/target/linux/generic/files-5.4/drivers/platform/mikrotik/routerboot.h
+@@ -0,0 +1,37 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Common definitions for MikroTik RouterBoot data.
++ *
++ * Copyright (C) 2020 Thibaut VARÈNE <hacks+kernel@slashdirt.org>
++ */
++
++
++#ifndef _ROUTERBOOT_H_
++#define _ROUTERBOOT_H_
++
++#include <linux/types.h>
++
++// these magic values are stored in cpu-endianness on flash
++#define RB_MAGIC_HARD	(('H') | ('a' << 8) | ('r' << 16) | ('d' << 24))
++#define RB_MAGIC_SOFT	(('S') | ('o' << 8) | ('f' << 16) | ('t' << 24))
++#define RB_MAGIC_LZOR	(('L') | ('Z' << 8) | ('O' << 16) | ('R' << 24))
++#define RB_MAGIC_ERD	(('E' << 16) | ('R' << 8) | ('D'))
++
++#define RB_ART_SIZE	0x10000
++
++#define RB_MTD_HARD_CONFIG	"hard_config"
++#define RB_MTD_SOFT_CONFIG	"soft_config"
++
++int routerboot_tag_find(const u8 *bufhead, const size_t buflen, const u16 tag_id, u16 *pld_ofs, u16 *pld_len);
++int routerboot_rle_decode(const u8 *in, size_t inlen, u8 *out, size_t *outlen);
++
++int __init rb_hardconfig_init(struct kobject *rb_kobj);
++void __exit rb_hardconfig_exit(void);
++
++int __init rb_softconfig_init(struct kobject *rb_kobj);
++void __exit rb_softconfig_exit(void);
++
++ssize_t routerboot_tag_show_string(const u8 *pld, u16 pld_len, char *buf);
++ssize_t routerboot_tag_show_u32s(const u8 *pld, u16 pld_len, char *buf);
++
++#endif /* _ROUTERBOOT_H_ */
+diff --git a/target/linux/generic/files-5.4/include/dt-bindings/mtd/partitions/uimage.h b/target/linux/generic/files-5.4/include/dt-bindings/mtd/partitions/uimage.h
+new file mode 100644
+index 0000000000..43d5f7b5da
+--- /dev/null
++++ b/target/linux/generic/files-5.4/include/dt-bindings/mtd/partitions/uimage.h
+@@ -0,0 +1,198 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++/*
++ *    *** IMPORTANT ***
++ * This file is not only included from C-code but also from devicetree source
++ * files. As such this file MUST only contain comments and defines.
++ *
++ * Based on image.h from U-Boot which is
++ * (C) Copyright 2008 Semihalf
++ * (C) Copyright 2000-2005 Wolfgang Denk, DENX Software Engineering, wd@denx.de.
++ */
++
++#ifndef __UIMAGE_H__
++#define __UIMAGE_H__
++
++/*
++ * Operating System Codes
++ *
++ * The following are exposed to uImage header.
++ * New IDs *MUST* be appended at the end of the list and *NEVER*
++ * inserted for backward compatibility.
++ */
++#define	IH_OS_INVALID		0	/* Invalid OS	*/
++#define	IH_OS_OPENBSD		1	/* OpenBSD	*/
++#define	IH_OS_NETBSD		2	/* NetBSD	*/
++#define	IH_OS_FREEBSD		3	/* FreeBSD	*/
++#define	IH_OS_4_4BSD		4	/* 4.4BSD	*/
++#define	IH_OS_LINUX		5	/* Linux	*/
++#define	IH_OS_SVR4		6	/* SVR4		*/
++#define	IH_OS_ESIX		7	/* Esix		*/
++#define	IH_OS_SOLARIS		8	/* Solaris	*/
++#define	IH_OS_IRIX		9	/* Irix		*/
++#define	IH_OS_SCO	       10	/* SCO		*/
++#define	IH_OS_DELL	       11	/* Dell		*/
++#define	IH_OS_NCR	       12	/* NCR		*/
++#define	IH_OS_LYNXOS	       13	/* LynxOS	*/
++#define	IH_OS_VXWORKS	       14	/* VxWorks	*/
++#define	IH_OS_PSOS	       15	/* pSOS		*/
++#define	IH_OS_QNX	       16	/* QNX		*/
++#define	IH_OS_U_BOOT	       17	/* Firmware	*/
++#define	IH_OS_RTEMS	       18	/* RTEMS	*/
++#define	IH_OS_ARTOS	       19	/* ARTOS	*/
++#define	IH_OS_UNITY	       20	/* Unity OS	*/
++#define	IH_OS_INTEGRITY	       21	/* INTEGRITY	*/
++#define	IH_OS_OSE	       22	/* OSE		*/
++#define	IH_OS_PLAN9	       23	/* Plan 9	*/
++#define	IH_OS_OPENRTOS	       24	/* OpenRTOS	*/
++#define	IH_OS_ARM_TRUSTED_FIRMWARE 25    /* ARM Trusted Firmware */
++#define	IH_OS_TEE	       26	/* Trusted Execution Environment */
++#define	IH_OS_OPENSBI	       27	/* RISC-V OpenSBI */
++#define	IH_OS_EFI	       28	/* EFI Firmware (e.g. GRUB2) */
++
++/*
++ * CPU Architecture Codes (supported by Linux)
++ *
++ * The following are exposed to uImage header.
++ * New IDs *MUST* be appended at the end of the list and *NEVER*
++ * inserted for backward compatibility.
++ */
++#define	IH_ARCH_INVALID		0	/* Invalid CPU	*/
++#define	IH_ARCH_ALPHA		1	/* Alpha	*/
++#define	IH_ARCH_ARM		2	/* ARM		*/
++#define	IH_ARCH_I386		3	/* Intel x86	*/
++#define	IH_ARCH_IA64		4	/* IA64		*/
++#define	IH_ARCH_MIPS		5	/* MIPS		*/
++#define	IH_ARCH_MIPS64		6	/* MIPS	 64 Bit */
++#define	IH_ARCH_PPC		7	/* PowerPC	*/
++#define	IH_ARCH_S390		8	/* IBM S390	*/
++#define	IH_ARCH_SH		9	/* SuperH	*/
++#define	IH_ARCH_SPARC	       10	/* Sparc	*/
++#define	IH_ARCH_SPARC64	       11	/* Sparc 64 Bit */
++#define	IH_ARCH_M68K	       12	/* M68K		*/
++#define	IH_ARCH_NIOS	       13	/* Nios-32	*/
++#define	IH_ARCH_MICROBLAZE     14	/* MicroBlaze   */
++#define	IH_ARCH_NIOS2	       15	/* Nios-II	*/
++#define	IH_ARCH_BLACKFIN       16	/* Blackfin	*/
++#define	IH_ARCH_AVR32	       17	/* AVR32	*/
++#define	IH_ARCH_ST200	       18	/* STMicroelectronics ST200  */
++#define	IH_ARCH_SANDBOX	       19	/* Sandbox architecture (test only) */
++#define	IH_ARCH_NDS32	       20	/* ANDES Technology - NDS32  */
++#define	IH_ARCH_OPENRISC       21	/* OpenRISC 1000  */
++#define	IH_ARCH_ARM64	       22	/* ARM64	*/
++#define	IH_ARCH_ARC	       23	/* Synopsys DesignWare ARC */
++#define	IH_ARCH_X86_64	       24	/* AMD x86_64, Intel and Via */
++#define	IH_ARCH_XTENSA	       25	/* Xtensa	*/
++#define	IH_ARCH_RISCV	       26	/* RISC-V */
++
++/*
++ * Image Types
++ *
++ * "Standalone Programs" are directly runnable in the environment
++ *	provided by U-Boot; it is expected that (if they behave
++ *	well) you can continue to work in U-Boot after return from
++ *	the Standalone Program.
++ * "OS Kernel Images" are usually images of some Embedded OS which
++ *	will take over control completely. Usually these programs
++ *	will install their own set of exception handlers, device
++ *	drivers, set up the MMU, etc. - this means, that you cannot
++ *	expect to re-enter U-Boot except by resetting the CPU.
++ * "RAMDisk Images" are more or less just data blocks, and their
++ *	parameters (address, size) are passed to an OS kernel that is
++ *	being started.
++ * "Multi-File Images" contain several images, typically an OS
++ *	(Linux) kernel image and one or more data images like
++ *	RAMDisks. This construct is useful for instance when you want
++ *	to boot over the network using BOOTP etc., where the boot
++ *	server provides just a single image file, but you want to get
++ *	for instance an OS kernel and a RAMDisk image.
++ *
++ *	"Multi-File Images" start with a list of image sizes, each
++ *	image size (in bytes) specified by an "uint32_t" in network
++ *	byte order. This list is terminated by an "(uint32_t)0".
++ *	Immediately after the terminating 0 follow the images, one by
++ *	one, all aligned on "uint32_t" boundaries (size rounded up to
++ *	a multiple of 4 bytes - except for the last file).
++ *
++ * "Firmware Images" are binary images containing firmware (like
++ *	U-Boot or FPGA images) which usually will be programmed to
++ *	flash memory.
++ *
++ * "Script files" are command sequences that will be executed by
++ *	U-Boot's command interpreter; this feature is especially
++ *	useful when you configure U-Boot to use a real shell (hush)
++ *	as command interpreter (=> Shell Scripts).
++ *
++ * The following are exposed to uImage header.
++ * New IDs *MUST* be appended at the end of the list and *NEVER*
++ * inserted for backward compatibility.
++ */
++#define	IH_TYPE_INVALID		0	/* Invalid Image		*/
++#define	IH_TYPE_STANDALONE	1	/* Standalone Program		*/
++#define	IH_TYPE_KERNEL		2	/* OS Kernel Image		*/
++#define	IH_TYPE_RAMDISK		3	/* RAMDisk Image		*/
++#define	IH_TYPE_MULTI		4	/* Multi-File Image		*/
++#define	IH_TYPE_FIRMWARE	5	/* Firmware Image		*/
++#define	IH_TYPE_SCRIPT		6	/* Script file			*/
++#define	IH_TYPE_FILESYSTEM	7	/* Filesystem Image (any type)	*/
++#define	IH_TYPE_FLATDT		8	/* Binary Flat Device Tree Blob	*/
++#define	IH_TYPE_KWBIMAGE	9	/* Kirkwood Boot Image		*/
++#define	IH_TYPE_IMXIMAGE       10	/* Freescale IMXBoot Image	*/
++#define	IH_TYPE_UBLIMAGE       11	/* Davinci UBL Image		*/
++#define	IH_TYPE_OMAPIMAGE      12	/* TI OMAP Config Header Image	*/
++#define	IH_TYPE_AISIMAGE       13	/* TI Davinci AIS Image		*/
++	/* OS Kernel Image, can run from any load address */
++#define	IH_TYPE_KERNEL_NOLOAD  14
++#define	IH_TYPE_PBLIMAGE       15	/* Freescale PBL Boot Image	*/
++#define	IH_TYPE_MXSIMAGE       16	/* Freescale MXSBoot Image	*/
++#define	IH_TYPE_GPIMAGE	       17	/* TI Keystone GPHeader Image	*/
++#define	IH_TYPE_ATMELIMAGE     18	/* ATMEL ROM bootable Image	*/
++#define	IH_TYPE_SOCFPGAIMAGE   19	/* Altera SOCFPGA CV/AV Preloader */
++#define	IH_TYPE_X86_SETUP      20	/* x86 setup.bin Image		*/
++#define	IH_TYPE_LPC32XXIMAGE   21	/* x86 setup.bin Image		*/
++#define	IH_TYPE_LOADABLE       22	/* A list of typeless images	*/
++#define	IH_TYPE_RKIMAGE	       23	/* Rockchip Boot Image		*/
++#define	IH_TYPE_RKSD	       24	/* Rockchip SD card		*/
++#define	IH_TYPE_RKSPI	       25	/* Rockchip SPI image		*/
++#define	IH_TYPE_ZYNQIMAGE      26	/* Xilinx Zynq Boot Image */
++#define	IH_TYPE_ZYNQMPIMAGE    27	/* Xilinx ZynqMP Boot Image */
++#define	IH_TYPE_ZYNQMPBIF      28	/* Xilinx ZynqMP Boot Image (bif) */
++#define	IH_TYPE_FPGA	       29	/* FPGA Image */
++#define	IH_TYPE_VYBRIDIMAGE    30	/* VYBRID .vyb Image */
++#define	IH_TYPE_TEE            31	/* Trusted Execution Environment OS Image */
++#define	IH_TYPE_FIRMWARE_IVT   32	/* Firmware Image with HABv4 IVT */
++#define	IH_TYPE_PMMC           33	/* TI Power Management Micro-Controller Firmware */
++#define	IH_TYPE_STM32IMAGE     34	/* STMicroelectronics STM32 Image */
++#define	IH_TYPE_SOCFPGAIMAGE_V1 35	/* Altera SOCFPGA A10 Preloader	*/
++#define	IH_TYPE_MTKIMAGE       36	/* MediaTek BootROM loadable Image */
++#define	IH_TYPE_IMX8MIMAGE     37	/* Freescale IMX8MBoot Image	*/
++#define	IH_TYPE_IMX8IMAGE      38	/* Freescale IMX8Boot Image	*/
++#define	IH_TYPE_COPRO	       39	/* Coprocessor Image for remoteproc*/
++
++
++/*
++ * Compression Types
++ *
++ * The following are exposed to uImage header.
++ * New IDs *MUST* be appended at the end of the list and *NEVER*
++ * inserted for backward compatibility.
++ */
++#define	IH_COMP_NONE		0	/*  No	 Compression Used	*/
++#define	IH_COMP_GZIP		1	/* gzip	 Compression Used	*/
++#define	IH_COMP_BZIP2		2	/* bzip2 Compression Used	*/
++#define	IH_COMP_LZMA		3	/* lzma  Compression Used	*/
++#define	IH_COMP_LZO		4	/* lzo   Compression Used	*/
++#define	IH_COMP_LZ4		5	/* lz4   Compression Used	*/
++
++
++#define LZ4F_MAGIC	0x184D2204	/* LZ4 Magic Number		*/
++#define IH_MAGIC	0x27051956	/* Image Magic Number		*/
++#define IH_NMLEN		32	/* Image Name Length		*/
++
++/*
++ * Magic values specific to "openwrt,uimage" partitions
++ */
++#define IH_MAGIC_OKLI	0x4f4b4c49	/* 'OKLI'			*/
++#define FW_EDIMAX_OFFSET	20	/* Edimax Firmware Offset	*/
++#define FW_MAGIC_EDIMAX	0x43535953	/* Edimax Firmware Magic Number */
++
++#endif	/* __UIMAGE_H__ */
+diff --git a/target/linux/generic/files-5.4/include/linux/ar8216_platform.h b/target/linux/generic/files-5.4/include/linux/ar8216_platform.h
+new file mode 100644
+index 0000000000..24bc442a26
+--- /dev/null
++++ b/target/linux/generic/files-5.4/include/linux/ar8216_platform.h
+@@ -0,0 +1,133 @@
++/*
++ * AR8216 switch driver platform data
++ *
++ * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
++
++#ifndef AR8216_PLATFORM_H
++#define AR8216_PLATFORM_H
++
++enum ar8327_pad_mode {
++	AR8327_PAD_NC = 0,
++	AR8327_PAD_MAC2MAC_MII,
++	AR8327_PAD_MAC2MAC_GMII,
++	AR8327_PAD_MAC_SGMII,
++	AR8327_PAD_MAC2PHY_MII,
++	AR8327_PAD_MAC2PHY_GMII,
++	AR8327_PAD_MAC_RGMII,
++	AR8327_PAD_PHY_GMII,
++	AR8327_PAD_PHY_RGMII,
++	AR8327_PAD_PHY_MII,
++};
++
++enum ar8327_clk_delay_sel {
++	AR8327_CLK_DELAY_SEL0 = 0,
++	AR8327_CLK_DELAY_SEL1,
++	AR8327_CLK_DELAY_SEL2,
++	AR8327_CLK_DELAY_SEL3,
++};
++
++struct ar8327_pad_cfg {
++	enum ar8327_pad_mode mode;
++	bool rxclk_sel;
++	bool txclk_sel;
++	bool pipe_rxclk_sel;
++	bool txclk_delay_en;
++	bool rxclk_delay_en;
++	bool sgmii_delay_en;
++	enum ar8327_clk_delay_sel txclk_delay_sel;
++	enum ar8327_clk_delay_sel rxclk_delay_sel;
++	bool mac06_exchange_dis;
++};
++
++enum ar8327_port_speed {
++	AR8327_PORT_SPEED_10 = 0,
++	AR8327_PORT_SPEED_100,
++	AR8327_PORT_SPEED_1000,
++};
++
++struct ar8327_port_cfg {
++	int force_link:1;
++	enum ar8327_port_speed speed;
++	int txpause:1;
++	int rxpause:1;
++	int duplex:1;
++};
++
++struct ar8327_sgmii_cfg {
++	u32 sgmii_ctrl;
++	bool serdes_aen;
++};
++
++struct ar8327_led_cfg {
++	u32 led_ctrl0;
++	u32 led_ctrl1;
++	u32 led_ctrl2;
++	u32 led_ctrl3;
++	bool open_drain;
++};
++
++enum ar8327_led_num {
++	AR8327_LED_PHY0_0 = 0,
++	AR8327_LED_PHY0_1,
++	AR8327_LED_PHY0_2,
++	AR8327_LED_PHY1_0,
++	AR8327_LED_PHY1_1,
++	AR8327_LED_PHY1_2,
++	AR8327_LED_PHY2_0,
++	AR8327_LED_PHY2_1,
++	AR8327_LED_PHY2_2,
++	AR8327_LED_PHY3_0,
++	AR8327_LED_PHY3_1,
++	AR8327_LED_PHY3_2,
++	AR8327_LED_PHY4_0,
++	AR8327_LED_PHY4_1,
++	AR8327_LED_PHY4_2,
++};
++
++enum ar8327_led_mode {
++	AR8327_LED_MODE_HW = 0,
++	AR8327_LED_MODE_SW,
++};
++
++struct ar8327_led_info {
++	const char *name;
++	const char *default_trigger;
++	bool active_low;
++	enum ar8327_led_num led_num;
++	enum ar8327_led_mode mode;
++};
++
++#define AR8327_LED_INFO(_led, _mode, _name) {	\
++	.name = (_name), 	   		\
++	.led_num = AR8327_LED_ ## _led,		\
++	.mode = AR8327_LED_MODE_ ## _mode 	\
++}
++
++struct ar8327_platform_data {
++	struct ar8327_pad_cfg *pad0_cfg;
++	struct ar8327_pad_cfg *pad5_cfg;
++	struct ar8327_pad_cfg *pad6_cfg;
++	struct ar8327_sgmii_cfg *sgmii_cfg;
++	struct ar8327_port_cfg port0_cfg;
++	struct ar8327_port_cfg port6_cfg;
++	struct ar8327_led_cfg *led_cfg;
++
++	int (*get_port_link)(unsigned port);
++
++	unsigned num_leds;
++	const struct ar8327_led_info *leds;
++};
++
++#endif /* AR8216_PLATFORM_H */
++
+diff --git a/target/linux/generic/files-5.4/include/linux/ath5k_platform.h b/target/linux/generic/files-5.4/include/linux/ath5k_platform.h
+new file mode 100644
+index 0000000000..ec85224528
+--- /dev/null
++++ b/target/linux/generic/files-5.4/include/linux/ath5k_platform.h
+@@ -0,0 +1,30 @@
++/*
++ * Copyright (c) 2008 Atheros Communications Inc.
++ * Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org>
++ * Copyright (c) 2009 Imre Kaloz <kaloz@openwrt.org>
++ * Copyright (c) 2010 Daniel Golle <daniel.golle@gmail.com>
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#ifndef _LINUX_ATH5K_PLATFORM_H
++#define _LINUX_ATH5K_PLATFORM_H
++
++#define ATH5K_PLAT_EEP_MAX_WORDS	2048
++
++struct ath5k_platform_data {
++	u16 *eeprom_data;
++	u8 *macaddr;
++};
++
++#endif /* _LINUX_ATH5K_PLATFORM_H */
+diff --git a/target/linux/generic/files-5.4/include/linux/ath9k_platform.h b/target/linux/generic/files-5.4/include/linux/ath9k_platform.h
+new file mode 100644
+index 0000000000..e210108568
+--- /dev/null
++++ b/target/linux/generic/files-5.4/include/linux/ath9k_platform.h
+@@ -0,0 +1,58 @@
++/*
++ * Copyright (c) 2008 Atheros Communications Inc.
++ * Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org>
++ * Copyright (c) 2009 Imre Kaloz <kaloz@openwrt.org>
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#ifndef _LINUX_ATH9K_PLATFORM_H
++#define _LINUX_ATH9K_PLATFORM_H
++
++#define ATH9K_PLAT_EEP_MAX_WORDS	2048
++
++struct ath9k_platform_data {
++	const char *eeprom_name;
++
++	u16 eeprom_data[ATH9K_PLAT_EEP_MAX_WORDS];
++	u8 *macaddr;
++
++	int led_pin;
++	u32 gpio_mask;
++	u32 gpio_val;
++
++	u32 bt_active_pin;
++	u32 bt_priority_pin;
++	u32 wlan_active_pin;
++
++	bool endian_check;
++	bool is_clk_25mhz;
++	bool tx_gain_buffalo;
++	bool disable_2ghz;
++	bool disable_5ghz;
++	bool led_active_high;
++
++	int (*get_mac_revision)(void);
++	int (*external_reset)(void);
++
++	bool use_eeprom;
++
++	int num_leds;
++	const struct gpio_led *leds;
++
++	unsigned num_btns;
++	const struct gpio_keys_button *btns;
++	unsigned btn_poll_interval;
++};
++
++#endif /* _LINUX_ATH9K_PLATFORM_H */
+diff --git a/target/linux/generic/files-5.4/include/linux/myloader.h b/target/linux/generic/files-5.4/include/linux/myloader.h
+new file mode 100644
+index 0000000000..d89e415fba
+--- /dev/null
++++ b/target/linux/generic/files-5.4/include/linux/myloader.h
+@@ -0,0 +1,121 @@
++/*
++ *  Compex's MyLoader specific definitions
++ *
++ *  Copyright (C) 2006-2008 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ */
++
++#ifndef _MYLOADER_H_
++#define _MYLOADER_H_
++
++/* Myloader specific magic numbers */
++#define MYLO_MAGIC_SYS_PARAMS	0x20021107
++#define MYLO_MAGIC_PARTITIONS	0x20021103
++#define MYLO_MAGIC_BOARD_PARAMS	0x20021103
++
++/* Vendor ID's (seems to be same as the PCI vendor ID's) */
++#define VENID_COMPEX		0x11F6
++
++/* Devices based on the ADM5120 */
++#define DEVID_COMPEX_NP27G	0x0078
++#define DEVID_COMPEX_NP28G	0x044C
++#define DEVID_COMPEX_NP28GHS	0x044E
++#define DEVID_COMPEX_WP54Gv1C	0x0514
++#define DEVID_COMPEX_WP54G	0x0515
++#define DEVID_COMPEX_WP54AG	0x0546
++#define DEVID_COMPEX_WPP54AG	0x0550
++#define DEVID_COMPEX_WPP54G	0x0555
++
++/* Devices based on the Atheros AR2317 */
++#define DEVID_COMPEX_NP25G	0x05E6
++#define DEVID_COMPEX_WPE53G	0x05DC
++
++/* Devices based on the Atheros AR71xx */
++#define DEVID_COMPEX_WP543	0x0640
++#define DEVID_COMPEX_WPE72	0x0672
++
++/* Devices based on the IXP422 */
++#define DEVID_COMPEX_WP18	0x047E
++#define DEVID_COMPEX_NP18A	0x0489
++
++/* Other devices */
++#define DEVID_COMPEX_NP26G8M	0x03E8
++#define DEVID_COMPEX_NP26G16M	0x03E9
++
++struct mylo_partition {
++	uint16_t	flags;	/* partition flags */
++	uint16_t	type;	/* type of the partition */
++	uint32_t	addr;	/* relative address of the partition from the
++				   flash start */
++	uint32_t	size;	/* size of the partition in bytes */
++	uint32_t	param;	/* if this is the active partition, the
++				   MyLoader load code to this address */
++};
++
++#define PARTITION_FLAG_ACTIVE	0x8000 /* this is the active partition,
++					* MyLoader loads firmware from here */
++#define PARTITION_FLAG_ISRAM	0x2000 /* FIXME: this is a RAM partition? */
++#define PARTIIION_FLAG_RAMLOAD	0x1000 /* FIXME: load this partition into the RAM? */
++#define PARTITION_FLAG_PRELOAD	0x0800 /* the partition data preloaded to RAM
++					* before decompression */
++#define PARTITION_FLAG_LZMA	0x0100 /* partition data compressed by LZMA */
++#define PARTITION_FLAG_HAVEHDR  0x0002 /* the partition data have a header */
++
++#define PARTITION_TYPE_FREE	0
++#define PARTITION_TYPE_USED	1
++
++#define MYLO_MAX_PARTITIONS	8	/* maximum number of partitions in the
++					   partition table */
++
++struct mylo_partition_table {
++	uint32_t	magic;		/* must be MYLO_MAGIC_PARTITIONS */
++	uint32_t	res0;		/* unknown/unused */
++	uint32_t	res1;		/* unknown/unused */
++	uint32_t 	res2;		/* unknown/unused */
++	struct mylo_partition partitions[MYLO_MAX_PARTITIONS];
++};
++
++struct mylo_partition_header {
++	uint32_t	len;		/* length of the partition data */
++	uint32_t	crc;		/* CRC value of the partition data */
++};
++
++struct mylo_system_params {
++	uint32_t	magic;		/* must be MYLO_MAGIC_SYS_PARAMS */
++	uint32_t	res0;
++	uint32_t	res1;
++	uint32_t	mylo_ver;
++	uint16_t	vid;		/* Vendor ID */
++	uint16_t	did;		/* Device ID */
++	uint16_t	svid;		/* Sub Vendor ID */
++	uint16_t	sdid;		/* Sub Device ID */
++	uint32_t	rev;		/* device revision */
++	uint32_t	fwhi;
++	uint32_t	fwlo;
++	uint32_t	tftp_addr;
++	uint32_t	prog_start;
++	uint32_t	flash_size;	/* size of boot FLASH in bytes */
++	uint32_t	dram_size;	/* size of onboard RAM in bytes */
++};
++
++struct mylo_eth_addr {
++	uint8_t	mac[6];
++	uint8_t	csum[2];
++};
++
++#define MYLO_ETHADDR_COUNT	8	/* maximum number of ethernet address
++					   in the board parameters */
++
++struct mylo_board_params {
++	uint32_t	magic;	/* must be MYLO_MAGIC_BOARD_PARAMS */
++	uint32_t	res0;
++	uint32_t	res1;
++	uint32_t	res2;
++	struct mylo_eth_addr addr[MYLO_ETHADDR_COUNT];
++};
++
++#endif /* _MYLOADER_H_*/
+diff --git a/target/linux/generic/files-5.4/include/linux/platform_data/adm6996-gpio.h b/target/linux/generic/files-5.4/include/linux/platform_data/adm6996-gpio.h
+new file mode 100644
+index 0000000000..d5af9bbf6e
+--- /dev/null
++++ b/target/linux/generic/files-5.4/include/linux/platform_data/adm6996-gpio.h
+@@ -0,0 +1,29 @@
++/*
++ * ADM6996 GPIO platform data
++ *
++ * Copyright (C) 2013 Hauke Mehrtens <hauke@hauke-m.de>
++ *
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of the GNU General Public License v2 as published by the
++ * Free Software Foundation
++ */
++
++#ifndef __PLATFORM_ADM6996_GPIO_H
++#define __PLATFORM_ADM6996_GPIO_H
++
++#include <linux/kernel.h>
++
++enum adm6996_model {
++	ADM6996FC = 1,
++	ADM6996M = 2,
++	ADM6996L = 3,
++};
++
++struct adm6996_gpio_platform_data {
++	u8 eecs;
++	u8 eesk;
++	u8 eedi;
++	enum adm6996_model model;
++};
++
++#endif
+diff --git a/target/linux/generic/files-5.4/include/linux/routerboot.h b/target/linux/generic/files-5.4/include/linux/routerboot.h
+new file mode 100644
+index 0000000000..3cda858cf9
+--- /dev/null
++++ b/target/linux/generic/files-5.4/include/linux/routerboot.h
+@@ -0,0 +1,106 @@
++/*
++ *  Mikrotik's RouterBOOT definitions
++ *
++ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ */
++
++#ifndef _ROUTERBOOT_H
++#define _ROUTERBOOT_H
++
++#define RB_MAC_SIZE		6
++
++/*
++ * Magic numbers
++ */
++#define RB_MAGIC_HARD	0x64726148 /* "Hard" */
++#define RB_MAGIC_SOFT	0x74666F53 /* "Soft" */
++#define RB_MAGIC_DAWN	0x6E776144 /* "Dawn" */
++
++#define RB_ID_TERMINATOR	0
++
++/*
++ * ID values for Hardware settings
++ */
++#define RB_ID_HARD_01		1
++#define RB_ID_HARD_02		2
++#define RB_ID_FLASH_INFO	3
++#define RB_ID_MAC_ADDRESS_PACK	4
++#define RB_ID_BOARD_NAME	5
++#define RB_ID_BIOS_VERSION	6
++#define RB_ID_HARD_07		7
++#define RB_ID_SDRAM_TIMINGS	8
++#define RB_ID_DEVICE_TIMINGS	9
++#define RB_ID_SOFTWARE_ID	10
++#define RB_ID_SERIAL_NUMBER	11
++#define RB_ID_HARD_12		12
++#define RB_ID_MEMORY_SIZE	13
++#define RB_ID_MAC_ADDRESS_COUNT	14
++#define RB_ID_HW_OPTIONS	21
++#define RB_ID_WLAN_DATA		22
++
++/*
++ * ID values for Software settings
++ */
++#define RB_ID_UART_SPEED	1
++#define RB_ID_BOOT_DELAY	2
++#define RB_ID_BOOT_DEVICE	3
++#define RB_ID_BOOT_KEY		4
++#define RB_ID_CPU_MODE		5
++#define RB_ID_FW_VERSION	6
++#define RB_ID_SOFT_07		7
++#define RB_ID_SOFT_08		8
++#define RB_ID_BOOT_PROTOCOL	9
++#define RB_ID_SOFT_10		10
++#define RB_ID_SOFT_11		11
++
++/*
++ * UART_SPEED values
++ */
++#define RB_UART_SPEED_115200	0
++#define RB_UART_SPEED_57600	1
++#define RB_UART_SPEED_38400	2
++#define RB_UART_SPEED_19200	3
++#define RB_UART_SPEED_9600	4
++#define RB_UART_SPEED_4800	5
++#define RB_UART_SPEED_2400	6
++#define RB_UART_SPEED_1200	7
++
++/*
++ * BOOT_DELAY values
++ */
++#define RB_BOOT_DELAY_0SEC	0
++#define RB_BOOT_DELAY_1SEC	1
++#define RB_BOOT_DELAY_2SEC	2
++
++/*
++ * BOOT_DEVICE values
++ */
++#define RB_BOOT_DEVICE_ETHER	0
++#define RB_BOOT_DEVICE_NANDETH	1
++#define RB_BOOT_DEVICE_ETHONCE	2
++#define RB_BOOT_DEVICE_NANDONLY	3
++
++/*
++ * BOOT_KEY values
++ */
++#define RB_BOOT_KEY_ANY		0
++#define RB_BOOT_KEY_DEL		1
++
++/*
++ * CPU_MODE values
++ */
++#define RB_CPU_MODE_POWERSAVE	0
++#define RB_CPU_MODE_REGULAR	1
++
++/*
++ * BOOT_PROTOCOL values
++ */
++#define RB_BOOT_PROTOCOL_BOOTP	0
++#define RB_BOOT_PROTOCOL_DHCP	1
++
++#endif /* _ROUTERBOOT_H */
+diff --git a/target/linux/generic/files-5.4/include/linux/rt2x00_platform.h b/target/linux/generic/files-5.4/include/linux/rt2x00_platform.h
+new file mode 100644
+index 0000000000..e10377e21b
+--- /dev/null
++++ b/target/linux/generic/files-5.4/include/linux/rt2x00_platform.h
+@@ -0,0 +1,23 @@
++/*
++ * Platform data definition for the rt2x00 driver
++ *
++ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ *
++ */
++
++#ifndef _RT2X00_PLATFORM_H
++#define _RT2X00_PLATFORM_H
++
++struct rt2x00_platform_data {
++	char *eeprom_file_name;
++	const u8 *mac_address;
++
++	int disable_2ghz;
++	int disable_5ghz;
++};
++
++#endif /* _RT2X00_PLATFORM_H */
+diff --git a/target/linux/generic/files-5.4/include/linux/rtl8366.h b/target/linux/generic/files-5.4/include/linux/rtl8366.h
+new file mode 100644
+index 0000000000..e3ce8f5361
+--- /dev/null
++++ b/target/linux/generic/files-5.4/include/linux/rtl8366.h
+@@ -0,0 +1,42 @@
++/*
++ * Platform data definition for the Realtek RTL8366RB/S ethernet switch driver
++ *
++ * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#ifndef _RTL8366_H
++#define _RTL8366_H
++
++#define RTL8366_DRIVER_NAME	"rtl8366"
++#define RTL8366S_DRIVER_NAME	"rtl8366s"
++#define RTL8366RB_DRIVER_NAME	"rtl8366rb"
++
++struct rtl8366_smi;
++
++enum rtl8366_type {
++	RTL8366_TYPE_UNKNOWN,
++	RTL8366_TYPE_S,
++	RTL8366_TYPE_RB,
++};
++
++struct rtl8366_initval {
++	unsigned	reg;
++	u16		val;
++};
++
++struct rtl8366_platform_data {
++	unsigned	gpio_sda;
++	unsigned	gpio_sck;
++	void		(*hw_reset)(struct rtl8366_smi *smi, bool active);
++
++	unsigned	num_initvals;
++	struct rtl8366_initval *initvals;
++};
++
++enum rtl8366_type rtl8366_smi_detect(struct rtl8366_platform_data *pdata);
++
++#endif /*  _RTL8366_H */
+diff --git a/target/linux/generic/files-5.4/include/linux/rtl8367.h b/target/linux/generic/files-5.4/include/linux/rtl8367.h
+new file mode 100644
+index 0000000000..14150393e2
+--- /dev/null
++++ b/target/linux/generic/files-5.4/include/linux/rtl8367.h
+@@ -0,0 +1,63 @@
++/*
++ * Platform data definition for the Realtek RTL8367 ethernet switch driver
++ *
++ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#ifndef _RTL8367_H
++#define _RTL8367_H
++
++#define RTL8367_DRIVER_NAME	"rtl8367"
++#define RTL8367B_DRIVER_NAME	"rtl8367b"
++
++enum rtl8367_port_speed {
++	RTL8367_PORT_SPEED_10 = 0,
++	RTL8367_PORT_SPEED_100,
++	RTL8367_PORT_SPEED_1000,
++};
++
++struct rtl8367_port_ability {
++	int force_mode;
++	int nway;
++	int txpause;
++	int rxpause;
++	int link;
++	int duplex;
++	enum rtl8367_port_speed speed;
++};
++
++enum rtl8367_extif_mode {
++	RTL8367_EXTIF_MODE_DISABLED = 0,
++	RTL8367_EXTIF_MODE_RGMII,
++	RTL8367_EXTIF_MODE_MII_MAC,
++	RTL8367_EXTIF_MODE_MII_PHY,
++	RTL8367_EXTIF_MODE_TMII_MAC,
++	RTL8367_EXTIF_MODE_TMII_PHY,
++	RTL8367_EXTIF_MODE_GMII,
++	RTL8367_EXTIF_MODE_RGMII_33V,
++	RTL8367B_EXTIF_MODE_RMII_MAC = 7,
++	RTL8367B_EXTIF_MODE_RMII_PHY,
++	RTL8367B_EXTIF_MODE_RGMII_33V,
++};
++
++struct rtl8367_extif_config {
++	unsigned int txdelay;
++	unsigned int rxdelay;
++	enum rtl8367_extif_mode mode;
++	struct rtl8367_port_ability ability;
++};
++
++struct rtl8367_platform_data {
++	unsigned gpio_sda;
++	unsigned gpio_sck;
++	void (*hw_reset)(bool active);
++
++	struct rtl8367_extif_config *extif0_cfg;
++	struct rtl8367_extif_config *extif1_cfg;
++};
++
++#endif /*  _RTL8367_H */
+diff --git a/target/linux/generic/files-5.4/include/linux/switch.h b/target/linux/generic/files-5.4/include/linux/switch.h
+new file mode 100644
+index 0000000000..4e6238470d
+--- /dev/null
++++ b/target/linux/generic/files-5.4/include/linux/switch.h
+@@ -0,0 +1,179 @@
++/*
++ * switch.h: Switch configuration API
++ *
++ * Copyright (C) 2008 Felix Fietkau <nbd@nbd.name>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
++#ifndef _LINUX_SWITCH_H
++#define _LINUX_SWITCH_H
++
++#include <net/genetlink.h>
++#include <uapi/linux/switch.h>
++
++struct switch_dev;
++struct switch_op;
++struct switch_val;
++struct switch_attr;
++struct switch_attrlist;
++struct switch_led_trigger;
++
++int register_switch(struct switch_dev *dev, struct net_device *netdev);
++void unregister_switch(struct switch_dev *dev);
++
++/**
++ * struct switch_attrlist - attribute list
++ *
++ * @n_attr: number of attributes
++ * @attr: pointer to the attributes array
++ */
++struct switch_attrlist {
++	int n_attr;
++	const struct switch_attr *attr;
++};
++
++enum switch_port_speed {
++	SWITCH_PORT_SPEED_UNKNOWN = 0,
++	SWITCH_PORT_SPEED_10 = 10,
++	SWITCH_PORT_SPEED_100 = 100,
++	SWITCH_PORT_SPEED_1000 = 1000,
++};
++
++struct switch_port_link {
++	bool link;
++	bool duplex;
++	bool aneg;
++	bool tx_flow;
++	bool rx_flow;
++	enum switch_port_speed speed;
++	/* in ethtool adv_t format */
++	u32 eee;
++};
++
++struct switch_port_stats {
++	unsigned long long tx_bytes;
++	unsigned long long rx_bytes;
++};
++
++/**
++ * struct switch_dev_ops - switch driver operations
++ *
++ * @attr_global: global switch attribute list
++ * @attr_port: port attribute list
++ * @attr_vlan: vlan attribute list
++ *
++ * Callbacks:
++ *
++ * @get_vlan_ports: read the port list of a VLAN
++ * @set_vlan_ports: set the port list of a VLAN
++ *
++ * @get_port_pvid: get the primary VLAN ID of a port
++ * @set_port_pvid: set the primary VLAN ID of a port
++ *
++ * @apply_config: apply all changed settings to the switch
++ * @reset_switch: resetting the switch
++ */
++struct switch_dev_ops {
++	struct switch_attrlist attr_global, attr_port, attr_vlan;
++
++	int (*get_vlan_ports)(struct switch_dev *dev, struct switch_val *val);
++	int (*set_vlan_ports)(struct switch_dev *dev, struct switch_val *val);
++
++	int (*get_port_pvid)(struct switch_dev *dev, int port, int *val);
++	int (*set_port_pvid)(struct switch_dev *dev, int port, int val);
++
++	int (*apply_config)(struct switch_dev *dev);
++	int (*reset_switch)(struct switch_dev *dev);
++
++	int (*get_port_link)(struct switch_dev *dev, int port,
++			     struct switch_port_link *link);
++	int (*set_port_link)(struct switch_dev *dev, int port,
++			     struct switch_port_link *link);
++	int (*get_port_stats)(struct switch_dev *dev, int port,
++			      struct switch_port_stats *stats);
++
++	int (*phy_read16)(struct switch_dev *dev, int addr, u8 reg, u16 *value);
++	int (*phy_write16)(struct switch_dev *dev, int addr, u8 reg, u16 value);
++};
++
++struct switch_dev {
++	struct device_node *of_node;
++	const struct switch_dev_ops *ops;
++	/* will be automatically filled */
++	char devname[IFNAMSIZ];
++
++	const char *name;
++	/* NB: either alias or netdev must be set */
++	const char *alias;
++	struct net_device *netdev;
++
++	unsigned int ports;
++	unsigned int vlans;
++	unsigned int cpu_port;
++
++	/* the following fields are internal for swconfig */
++	unsigned int id;
++	struct list_head dev_list;
++	unsigned long def_global, def_port, def_vlan;
++
++	struct mutex sw_mutex;
++	struct switch_port *portbuf;
++	struct switch_portmap *portmap;
++	struct switch_port_link linkbuf;
++
++	char buf[128];
++
++#ifdef CONFIG_SWCONFIG_LEDS
++	struct switch_led_trigger *led_trigger;
++#endif
++};
++
++struct switch_port {
++	u32 id;
++	u32 flags;
++};
++
++struct switch_portmap {
++	u32 virt;
++	const char *s;
++};
++
++struct switch_val {
++	const struct switch_attr *attr;
++	unsigned int port_vlan;
++	unsigned int len;
++	union {
++		const char *s;
++		u32 i;
++		struct switch_port *ports;
++		struct switch_port_link *link;
++	} value;
++};
++
++struct switch_attr {
++	int disabled;
++	int type;
++	const char *name;
++	const char *description;
++
++	int (*set)(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val);
++	int (*get)(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val);
++
++	/* for driver internal use */
++	int id;
++	int ofs;
++	int max;
++};
++
++int switch_generic_set_link(struct switch_dev *dev, int port,
++			    struct switch_port_link *link);
++
++#endif /* _LINUX_SWITCH_H */
+diff --git a/target/linux/generic/files-5.4/include/uapi/linux/switch.h b/target/linux/generic/files-5.4/include/uapi/linux/switch.h
+new file mode 100644
+index 0000000000..ea449653fa
+--- /dev/null
++++ b/target/linux/generic/files-5.4/include/uapi/linux/switch.h
+@@ -0,0 +1,119 @@
++/*
++ * switch.h: Switch configuration API
++ *
++ * Copyright (C) 2008 Felix Fietkau <nbd@nbd.name>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
++
++#ifndef _UAPI_LINUX_SWITCH_H
++#define _UAPI_LINUX_SWITCH_H
++
++#include <linux/types.h>
++#include <linux/netdevice.h>
++#include <linux/netlink.h>
++#include <linux/genetlink.h>
++#ifndef __KERNEL__
++#include <netlink/netlink.h>
++#include <netlink/genl/genl.h>
++#include <netlink/genl/ctrl.h>
++#endif
++
++/* main attributes */
++enum {
++	SWITCH_ATTR_UNSPEC,
++	/* global */
++	SWITCH_ATTR_TYPE,
++	/* device */
++	SWITCH_ATTR_ID,
++	SWITCH_ATTR_DEV_NAME,
++	SWITCH_ATTR_ALIAS,
++	SWITCH_ATTR_NAME,
++	SWITCH_ATTR_VLANS,
++	SWITCH_ATTR_PORTS,
++	SWITCH_ATTR_PORTMAP,
++	SWITCH_ATTR_CPU_PORT,
++	/* attributes */
++	SWITCH_ATTR_OP_ID,
++	SWITCH_ATTR_OP_TYPE,
++	SWITCH_ATTR_OP_NAME,
++	SWITCH_ATTR_OP_PORT,
++	SWITCH_ATTR_OP_VLAN,
++	SWITCH_ATTR_OP_VALUE_INT,
++	SWITCH_ATTR_OP_VALUE_STR,
++	SWITCH_ATTR_OP_VALUE_PORTS,
++	SWITCH_ATTR_OP_VALUE_LINK,
++	SWITCH_ATTR_OP_DESCRIPTION,
++	/* port lists */
++	SWITCH_ATTR_PORT,
++	SWITCH_ATTR_MAX
++};
++
++enum {
++	/* port map */
++	SWITCH_PORTMAP_PORTS,
++	SWITCH_PORTMAP_SEGMENT,
++	SWITCH_PORTMAP_VIRT,
++	SWITCH_PORTMAP_MAX
++};
++
++/* commands */
++enum {
++	SWITCH_CMD_UNSPEC,
++	SWITCH_CMD_GET_SWITCH,
++	SWITCH_CMD_NEW_ATTR,
++	SWITCH_CMD_LIST_GLOBAL,
++	SWITCH_CMD_GET_GLOBAL,
++	SWITCH_CMD_SET_GLOBAL,
++	SWITCH_CMD_LIST_PORT,
++	SWITCH_CMD_GET_PORT,
++	SWITCH_CMD_SET_PORT,
++	SWITCH_CMD_LIST_VLAN,
++	SWITCH_CMD_GET_VLAN,
++	SWITCH_CMD_SET_VLAN
++};
++
++/* data types */
++enum switch_val_type {
++	SWITCH_TYPE_UNSPEC,
++	SWITCH_TYPE_INT,
++	SWITCH_TYPE_STRING,
++	SWITCH_TYPE_PORTS,
++	SWITCH_TYPE_LINK,
++	SWITCH_TYPE_NOVAL,
++};
++
++/* port nested attributes */
++enum {
++	SWITCH_PORT_UNSPEC,
++	SWITCH_PORT_ID,
++	SWITCH_PORT_FLAG_TAGGED,
++	SWITCH_PORT_ATTR_MAX
++};
++
++/* link nested attributes */
++enum {
++	SWITCH_LINK_UNSPEC,
++	SWITCH_LINK_FLAG_LINK,
++	SWITCH_LINK_FLAG_DUPLEX,
++	SWITCH_LINK_FLAG_ANEG,
++	SWITCH_LINK_FLAG_TX_FLOW,
++	SWITCH_LINK_FLAG_RX_FLOW,
++	SWITCH_LINK_SPEED,
++	SWITCH_LINK_FLAG_EEE_100BASET,
++	SWITCH_LINK_FLAG_EEE_1000BASET,
++	SWITCH_LINK_ATTR_MAX,
++};
++
++#define SWITCH_ATTR_DEFAULTS_OFFSET	0x1000
++
++
++#endif /* _UAPI_LINUX_SWITCH_H */
+diff --git a/target/linux/generic/hack-5.4/204-module_strip.patch b/target/linux/generic/hack-5.4/204-module_strip.patch
+new file mode 100644
+index 0000000000..c6420739c0
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/204-module_strip.patch
+@@ -0,0 +1,204 @@
++From a779a482fb9b9f8fcdf8b2519c789b4b9bb5dd05 Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 7 Jul 2017 16:56:48 +0200
++Subject: build: add a hack for removing non-essential module info
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ include/linux/module.h      | 13 ++++++++-----
++ include/linux/moduleparam.h | 15 ++++++++++++---
++ init/Kconfig                |  7 +++++++
++ kernel/module.c             |  5 ++++-
++ scripts/mod/modpost.c       | 12 ++++++++++++
++ 5 files changed, 43 insertions(+), 9 deletions(-)
++
++--- a/include/linux/module.h
+++++ b/include/linux/module.h
++@@ -157,6 +157,7 @@ extern void cleanup_module(void);
++ 
++ /* Generic info of form tag = "info" */
++ #define MODULE_INFO(tag, info) __MODULE_INFO(tag, tag, info)
+++#define MODULE_INFO_STRIP(tag, info) __MODULE_INFO_STRIP(tag, tag, info)
++ 
++ /* For userspace: you can also call me... */
++ #define MODULE_ALIAS(_alias) MODULE_INFO(alias, _alias)
++@@ -216,12 +217,12 @@ extern void cleanup_module(void);
++  * Author(s), use "Name <email>" or just "Name", for multiple
++  * authors use multiple MODULE_AUTHOR() statements/lines.
++  */
++-#define MODULE_AUTHOR(_author) MODULE_INFO(author, _author)
+++#define MODULE_AUTHOR(_author) MODULE_INFO_STRIP(author, _author)
++ 
++ /* What your module does. */
++-#define MODULE_DESCRIPTION(_description) MODULE_INFO(description, _description)
+++#define MODULE_DESCRIPTION(_description) MODULE_INFO_STRIP(description, _description)
++ 
++-#ifdef MODULE
+++#if defined(MODULE) && !defined(CONFIG_MODULE_STRIPPED)
++ /* Creates an alias so file2alias.c can find device table. */
++ #define MODULE_DEVICE_TABLE(type, name)					\
++ extern typeof(name) __mod_##type##__##name##_device_table		\
++@@ -248,7 +249,9 @@ extern typeof(name) __mod_##type##__##na
++  */
++ 
++ #if defined(MODULE) || !defined(CONFIG_SYSFS)
++-#define MODULE_VERSION(_version) MODULE_INFO(version, _version)
+++#define MODULE_VERSION(_version) MODULE_INFO_STRIP(version, _version)
+++#elif defined(CONFIG_MODULE_STRIPPED)
+++#define MODULE_VERSION(_version) __MODULE_INFO_DISABLED(version)
++ #else
++ #define MODULE_VERSION(_version)					\
++ 	MODULE_INFO(version, _version);					\
++@@ -271,7 +274,7 @@ extern typeof(name) __mod_##type##__##na
++ /* Optional firmware file (or files) needed by the module
++  * format is simply firmware file name.  Multiple firmware
++  * files require multiple MODULE_FIRMWARE() specifiers */
++-#define MODULE_FIRMWARE(_firmware) MODULE_INFO(firmware, _firmware)
+++#define MODULE_FIRMWARE(_firmware) MODULE_INFO_STRIP(firmware, _firmware)
++ 
++ #define MODULE_IMPORT_NS(ns) MODULE_INFO(import_ns, #ns)
++ 
++--- a/include/linux/moduleparam.h
+++++ b/include/linux/moduleparam.h
++@@ -20,10 +20,24 @@
++ /* Chosen so that structs with an unsigned long line up. */
++ #define MAX_PARAM_PREFIX_LEN (64 - sizeof(unsigned long))
++ 
+++/* This struct is here for syntactic coherency, it is not used */
+++#define __MODULE_INFO_DISABLED(name)					  \
+++  struct __UNIQUE_ID(name) {}
+++
+++#ifdef CONFIG_MODULE_STRIPPED
+++#define __MODULE_INFO_STRIP(tag, name, info) __MODULE_INFO_DISABLED(name)
+++#else
+++#define __MODULE_INFO_STRIP(tag, name, info) __MODULE_INFO(tag, name, info)
+++#endif
+++
+++#ifdef MODULE
++ #define __MODULE_INFO(tag, name, info)					  \
++ static const char __UNIQUE_ID(name)[]					  \
++   __used __attribute__((section(".modinfo"), unused, aligned(1)))	  \
++   = __MODULE_INFO_PREFIX __stringify(tag) "=" info
+++#else
+++#define __MODULE_INFO(tag, name, info) __MODULE_INFO_DISABLED(name)
+++#endif
++ 
++ #define __MODULE_PARM_TYPE(name, _type)					  \
++   __MODULE_INFO(parmtype, name##type, #name ":" _type)
++@@ -31,7 +45,7 @@ static const char __UNIQUE_ID(name)[]
++ /* One for each parameter, describing how to use it.  Some files do
++    multiple of these per line, so can't just use MODULE_INFO. */
++ #define MODULE_PARM_DESC(_parm, desc) \
++-	__MODULE_INFO(parm, _parm, #_parm ":" desc)
+++	__MODULE_INFO_STRIP(parm, _parm, #_parm ":" desc)
++ 
++ struct kernel_param;
++ 
++--- a/init/Kconfig
+++++ b/init/Kconfig
++@@ -2198,6 +2198,13 @@ config TRIM_UNUSED_KSYMS
++ 
++ 	  If unsure, or if you need to build out-of-tree modules, say N.
++ 
+++config MODULE_STRIPPED
+++	bool "Reduce module size"
+++	depends on MODULES
+++	help
+++	  Remove module parameter descriptions, author info, version, aliases,
+++	  device tables, etc.
+++
++ endif # MODULES
++ 
++ config MODULES_TREE_LOOKUP
++--- a/kernel/module.c
+++++ b/kernel/module.c
++@@ -3256,9 +3256,11 @@ static int setup_load_info(struct load_i
++ 
++ static int check_modinfo(struct module *mod, struct load_info *info, int flags)
++ {
++-	const char *modmagic = get_modinfo(info, "vermagic");
++ 	int err;
++ 
+++#ifndef CONFIG_MODULE_STRIPPED
+++	const char *modmagic = get_modinfo(info, "vermagic");
+++
++ 	if (flags & MODULE_INIT_IGNORE_VERMAGIC)
++ 		modmagic = NULL;
++ 
++@@ -3279,6 +3281,7 @@ static int check_modinfo(struct module *
++ 				mod->name);
++ 		add_taint_module(mod, TAINT_OOT_MODULE, LOCKDEP_STILL_OK);
++ 	}
+++#endif
++ 
++ 	check_modinfo_retpoline(mod, info);
++ 
++--- a/scripts/mod/modpost.c
+++++ b/scripts/mod/modpost.c
++@@ -2056,7 +2056,9 @@ static void read_symbols(const char *mod
++ 		symname = remove_dot(info.strtab + sym->st_name);
++ 
++ 		handle_modversions(mod, &info, sym, symname);
+++#ifndef CONFIG_MODULE_STRIPPED
++ 		handle_moddevtable(mod, &info, sym, symname);
+++#endif
++ 	}
++ 
++ 	/* Apply symbol namespaces from __kstrtabns_<symbol> entries. */
++@@ -2270,8 +2272,10 @@ static void add_header(struct buffer *b,
++ 	buf_printf(b, "\n");
++ 	buf_printf(b, "BUILD_SALT;\n");
++ 	buf_printf(b, "\n");
+++#ifndef CONFIG_MODULE_STRIPPED
++ 	buf_printf(b, "MODULE_INFO(vermagic, VERMAGIC_STRING);\n");
++ 	buf_printf(b, "MODULE_INFO(name, KBUILD_MODNAME);\n");
+++#endif
++ 	buf_printf(b, "\n");
++ 	buf_printf(b, "__visible struct module __this_module\n");
++ 	buf_printf(b, "__section(.gnu.linkonce.this_module) = {\n");
++@@ -2288,8 +2292,10 @@ static void add_header(struct buffer *b,
++ 
++ static void add_intree_flag(struct buffer *b, int is_intree)
++ {
+++#ifndef CONFIG_MODULE_STRIPPED
++ 	if (is_intree)
++ 		buf_printf(b, "\nMODULE_INFO(intree, \"Y\");\n");
+++#endif
++ }
++ 
++ /* Cannot check for assembler */
++@@ -2302,8 +2308,10 @@ static void add_retpoline(struct buffer
++ 
++ static void add_staging_flag(struct buffer *b, const char *name)
++ {
+++#ifndef CONFIG_MODULE_STRIPPED
++ 	if (strstarts(name, "drivers/staging"))
++ 		buf_printf(b, "\nMODULE_INFO(staging, \"Y\");\n");
+++#endif
++ }
++ 
++ /**
++@@ -2387,11 +2395,13 @@ static void add_depends(struct buffer *b
++ 
++ static void add_srcversion(struct buffer *b, struct module *mod)
++ {
+++#ifndef CONFIG_MODULE_STRIPPED
++ 	if (mod->srcversion[0]) {
++ 		buf_printf(b, "\n");
++ 		buf_printf(b, "MODULE_INFO(srcversion, \"%s\");\n",
++ 			   mod->srcversion);
++ 	}
+++#endif
++ }
++ 
++ static void write_if_changed(struct buffer *b, const char *fname)
++@@ -2661,7 +2671,9 @@ int main(int argc, char **argv)
++ 		add_staging_flag(&buf, mod->name);
++ 		err |= add_versions(&buf, mod);
++ 		add_depends(&buf, mod);
+++#ifndef CONFIG_MODULE_STRIPPED
++ 		add_moddevtable(&buf, mod);
+++#endif
++ 		add_srcversion(&buf, mod);
++ 
++ 		sprintf(fname, "%s.mod.c", mod->name);
+diff --git a/target/linux/generic/hack-5.4/210-darwin_scripts_include.patch b/target/linux/generic/hack-5.4/210-darwin_scripts_include.patch
+new file mode 100644
+index 0000000000..be6adc0d11
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/210-darwin_scripts_include.patch
+@@ -0,0 +1,3053 @@
++From db7c30dcd9a0391bf13b62c9f91e144d762ef43a Mon Sep 17 00:00:00 2001
++From: Florian Fainelli <f.fainelli@gmail.com>
++Date: Fri, 7 Jul 2017 17:00:49 +0200
++Subject: Add an OSX specific patch to make the kernel be compiled
++
++lede-commit: 3fc2a24f0422b2f55f9ed43f116db3111f700526
++Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
++---
++ scripts/kconfig/Makefile   |    3 +
++ scripts/mod/elf.h          | 3007 ++++++++++++++++++++++++++++++++++++++++++++
++ scripts/mod/mk_elfconfig.c |    4 +
++ scripts/mod/modpost.h      |    4 +
++ 4 files changed, 3018 insertions(+)
++ create mode 100644 scripts/mod/elf.h
++
++--- /dev/null
+++++ b/scripts/mod/elf.h
++@@ -0,0 +1,3007 @@
+++/* This file defines standard ELF types, structures, and macros.
+++   Copyright (C) 1995-2012 Free Software Foundation, Inc.
+++   This file is part of the GNU C Library.
+++
+++   The GNU C Library is free software; you can redistribute it and/or
+++   modify it under the terms of the GNU Lesser General Public
+++   License as published by the Free Software Foundation; either
+++   version 2.1 of the License, or (at your option) any later version.
+++
+++   The GNU C Library is distributed in the hope that it will be useful,
+++   but WITHOUT ANY WARRANTY; without even the implied warranty of
+++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+++   Lesser General Public License for more details.
+++
+++   You should have received a copy of the GNU Lesser General Public
+++   License along with the GNU C Library; if not, see
+++   <http://www.gnu.org/licenses/>.  */
+++
+++#ifndef _ELF_H
+++#define	_ELF_H 1
+++
+++/* Standard ELF types.  */
+++
+++#include <stdint.h>
+++
+++/* Type for a 16-bit quantity.  */
+++typedef uint16_t Elf32_Half;
+++typedef uint16_t Elf64_Half;
+++
+++/* Types for signed and unsigned 32-bit quantities.  */
+++typedef uint32_t Elf32_Word;
+++typedef	int32_t  Elf32_Sword;
+++typedef uint32_t Elf64_Word;
+++typedef	int32_t  Elf64_Sword;
+++
+++/* Types for signed and unsigned 64-bit quantities.  */
+++typedef uint64_t Elf32_Xword;
+++typedef	int64_t  Elf32_Sxword;
+++typedef uint64_t Elf64_Xword;
+++typedef	int64_t  Elf64_Sxword;
+++
+++/* Type of addresses.  */
+++typedef uint32_t Elf32_Addr;
+++typedef uint64_t Elf64_Addr;
+++
+++/* Type of file offsets.  */
+++typedef uint32_t Elf32_Off;
+++typedef uint64_t Elf64_Off;
+++
+++/* Type for section indices, which are 16-bit quantities.  */
+++typedef uint16_t Elf32_Section;
+++typedef uint16_t Elf64_Section;
+++
+++/* Type for version symbol information.  */
+++typedef Elf32_Half Elf32_Versym;
+++typedef Elf64_Half Elf64_Versym;
+++
+++
+++/* The ELF file header.  This appears at the start of every ELF file.  */
+++
+++#define EI_NIDENT (16)
+++
+++typedef struct
+++{
+++  unsigned char	e_ident[EI_NIDENT];	/* Magic number and other info */
+++  Elf32_Half	e_type;			/* Object file type */
+++  Elf32_Half	e_machine;		/* Architecture */
+++  Elf32_Word	e_version;		/* Object file version */
+++  Elf32_Addr	e_entry;		/* Entry point virtual address */
+++  Elf32_Off	e_phoff;		/* Program header table file offset */
+++  Elf32_Off	e_shoff;		/* Section header table file offset */
+++  Elf32_Word	e_flags;		/* Processor-specific flags */
+++  Elf32_Half	e_ehsize;		/* ELF header size in bytes */
+++  Elf32_Half	e_phentsize;		/* Program header table entry size */
+++  Elf32_Half	e_phnum;		/* Program header table entry count */
+++  Elf32_Half	e_shentsize;		/* Section header table entry size */
+++  Elf32_Half	e_shnum;		/* Section header table entry count */
+++  Elf32_Half	e_shstrndx;		/* Section header string table index */
+++} Elf32_Ehdr;
+++
+++typedef struct
+++{
+++  unsigned char	e_ident[EI_NIDENT];	/* Magic number and other info */
+++  Elf64_Half	e_type;			/* Object file type */
+++  Elf64_Half	e_machine;		/* Architecture */
+++  Elf64_Word	e_version;		/* Object file version */
+++  Elf64_Addr	e_entry;		/* Entry point virtual address */
+++  Elf64_Off	e_phoff;		/* Program header table file offset */
+++  Elf64_Off	e_shoff;		/* Section header table file offset */
+++  Elf64_Word	e_flags;		/* Processor-specific flags */
+++  Elf64_Half	e_ehsize;		/* ELF header size in bytes */
+++  Elf64_Half	e_phentsize;		/* Program header table entry size */
+++  Elf64_Half	e_phnum;		/* Program header table entry count */
+++  Elf64_Half	e_shentsize;		/* Section header table entry size */
+++  Elf64_Half	e_shnum;		/* Section header table entry count */
+++  Elf64_Half	e_shstrndx;		/* Section header string table index */
+++} Elf64_Ehdr;
+++
+++/* Fields in the e_ident array.  The EI_* macros are indices into the
+++   array.  The macros under each EI_* macro are the values the byte
+++   may have.  */
+++
+++#define EI_MAG0		0		/* File identification byte 0 index */
+++#define ELFMAG0		0x7f		/* Magic number byte 0 */
+++
+++#define EI_MAG1		1		/* File identification byte 1 index */
+++#define ELFMAG1		'E'		/* Magic number byte 1 */
+++
+++#define EI_MAG2		2		/* File identification byte 2 index */
+++#define ELFMAG2		'L'		/* Magic number byte 2 */
+++
+++#define EI_MAG3		3		/* File identification byte 3 index */
+++#define ELFMAG3		'F'		/* Magic number byte 3 */
+++
+++/* Conglomeration of the identification bytes, for easy testing as a word.  */
+++#define	ELFMAG		"\177ELF"
+++#define	SELFMAG		4
+++
+++#define EI_CLASS	4		/* File class byte index */
+++#define ELFCLASSNONE	0		/* Invalid class */
+++#define ELFCLASS32	1		/* 32-bit objects */
+++#define ELFCLASS64	2		/* 64-bit objects */
+++#define ELFCLASSNUM	3
+++
+++#define EI_DATA		5		/* Data encoding byte index */
+++#define ELFDATANONE	0		/* Invalid data encoding */
+++#define ELFDATA2LSB	1		/* 2's complement, little endian */
+++#define ELFDATA2MSB	2		/* 2's complement, big endian */
+++#define ELFDATANUM	3
+++
+++#define EI_VERSION	6		/* File version byte index */
+++					/* Value must be EV_CURRENT */
+++
+++#define EI_OSABI	7		/* OS ABI identification */
+++#define ELFOSABI_NONE		0	/* UNIX System V ABI */
+++#define ELFOSABI_SYSV		0	/* Alias.  */
+++#define ELFOSABI_HPUX		1	/* HP-UX */
+++#define ELFOSABI_NETBSD		2	/* NetBSD.  */
+++#define ELFOSABI_GNU		3	/* Object uses GNU ELF extensions.  */
+++#define ELFOSABI_LINUX		ELFOSABI_GNU /* Compatibility alias.  */
+++#define ELFOSABI_SOLARIS	6	/* Sun Solaris.  */
+++#define ELFOSABI_AIX		7	/* IBM AIX.  */
+++#define ELFOSABI_IRIX		8	/* SGI Irix.  */
+++#define ELFOSABI_FREEBSD	9	/* FreeBSD.  */
+++#define ELFOSABI_TRU64		10	/* Compaq TRU64 UNIX.  */
+++#define ELFOSABI_MODESTO	11	/* Novell Modesto.  */
+++#define ELFOSABI_OPENBSD	12	/* OpenBSD.  */
+++#define ELFOSABI_ARM_AEABI	64	/* ARM EABI */
+++#define ELFOSABI_ARM		97	/* ARM */
+++#define ELFOSABI_STANDALONE	255	/* Standalone (embedded) application */
+++
+++#define EI_ABIVERSION	8		/* ABI version */
+++
+++#define EI_PAD		9		/* Byte index of padding bytes */
+++
+++/* Legal values for e_type (object file type).  */
+++
+++#define ET_NONE		0		/* No file type */
+++#define ET_REL		1		/* Relocatable file */
+++#define ET_EXEC		2		/* Executable file */
+++#define ET_DYN		3		/* Shared object file */
+++#define ET_CORE		4		/* Core file */
+++#define	ET_NUM		5		/* Number of defined types */
+++#define ET_LOOS		0xfe00		/* OS-specific range start */
+++#define ET_HIOS		0xfeff		/* OS-specific range end */
+++#define ET_LOPROC	0xff00		/* Processor-specific range start */
+++#define ET_HIPROC	0xffff		/* Processor-specific range end */
+++
+++/* Legal values for e_machine (architecture).  */
+++
+++#define EM_NONE		 0		/* No machine */
+++#define EM_M32		 1		/* AT&T WE 32100 */
+++#define EM_SPARC	 2		/* SUN SPARC */
+++#define EM_386		 3		/* Intel 80386 */
+++#define EM_68K		 4		/* Motorola m68k family */
+++#define EM_88K		 5		/* Motorola m88k family */
+++#define EM_860		 7		/* Intel 80860 */
+++#define EM_MIPS		 8		/* MIPS R3000 big-endian */
+++#define EM_S370		 9		/* IBM System/370 */
+++#define EM_MIPS_RS3_LE	10		/* MIPS R3000 little-endian */
+++
+++#define EM_PARISC	15		/* HPPA */
+++#define EM_VPP500	17		/* Fujitsu VPP500 */
+++#define EM_SPARC32PLUS	18		/* Sun's "v8plus" */
+++#define EM_960		19		/* Intel 80960 */
+++#define EM_PPC		20		/* PowerPC */
+++#define EM_PPC64	21		/* PowerPC 64-bit */
+++#define EM_S390		22		/* IBM S390 */
+++
+++#define EM_V800		36		/* NEC V800 series */
+++#define EM_FR20		37		/* Fujitsu FR20 */
+++#define EM_RH32		38		/* TRW RH-32 */
+++#define EM_RCE		39		/* Motorola RCE */
+++#define EM_ARM		40		/* ARM */
+++#define EM_FAKE_ALPHA	41		/* Digital Alpha */
+++#define EM_SH		42		/* Hitachi SH */
+++#define EM_SPARCV9	43		/* SPARC v9 64-bit */
+++#define EM_TRICORE	44		/* Siemens Tricore */
+++#define EM_ARC		45		/* Argonaut RISC Core */
+++#define EM_H8_300	46		/* Hitachi H8/300 */
+++#define EM_H8_300H	47		/* Hitachi H8/300H */
+++#define EM_H8S		48		/* Hitachi H8S */
+++#define EM_H8_500	49		/* Hitachi H8/500 */
+++#define EM_IA_64	50		/* Intel Merced */
+++#define EM_MIPS_X	51		/* Stanford MIPS-X */
+++#define EM_COLDFIRE	52		/* Motorola Coldfire */
+++#define EM_68HC12	53		/* Motorola M68HC12 */
+++#define EM_MMA		54		/* Fujitsu MMA Multimedia Accelerator*/
+++#define EM_PCP		55		/* Siemens PCP */
+++#define EM_NCPU		56		/* Sony nCPU embeeded RISC */
+++#define EM_NDR1		57		/* Denso NDR1 microprocessor */
+++#define EM_STARCORE	58		/* Motorola Start*Core processor */
+++#define EM_ME16		59		/* Toyota ME16 processor */
+++#define EM_ST100	60		/* STMicroelectronic ST100 processor */
+++#define EM_TINYJ	61		/* Advanced Logic Corp. Tinyj emb.fam*/
+++#define EM_X86_64	62		/* AMD x86-64 architecture */
+++#define EM_PDSP		63		/* Sony DSP Processor */
+++
+++#define EM_FX66		66		/* Siemens FX66 microcontroller */
+++#define EM_ST9PLUS	67		/* STMicroelectronics ST9+ 8/16 mc */
+++#define EM_ST7		68		/* STmicroelectronics ST7 8 bit mc */
+++#define EM_68HC16	69		/* Motorola MC68HC16 microcontroller */
+++#define EM_68HC11	70		/* Motorola MC68HC11 microcontroller */
+++#define EM_68HC08	71		/* Motorola MC68HC08 microcontroller */
+++#define EM_68HC05	72		/* Motorola MC68HC05 microcontroller */
+++#define EM_SVX		73		/* Silicon Graphics SVx */
+++#define EM_ST19		74		/* STMicroelectronics ST19 8 bit mc */
+++#define EM_VAX		75		/* Digital VAX */
+++#define EM_CRIS		76		/* Axis Communications 32-bit embedded processor */
+++#define EM_JAVELIN	77		/* Infineon Technologies 32-bit embedded processor */
+++#define EM_FIREPATH	78		/* Element 14 64-bit DSP Processor */
+++#define EM_ZSP		79		/* LSI Logic 16-bit DSP Processor */
+++#define EM_MMIX		80		/* Donald Knuth's educational 64-bit processor */
+++#define EM_HUANY	81		/* Harvard University machine-independent object files */
+++#define EM_PRISM	82		/* SiTera Prism */
+++#define EM_AVR		83		/* Atmel AVR 8-bit microcontroller */
+++#define EM_FR30		84		/* Fujitsu FR30 */
+++#define EM_D10V		85		/* Mitsubishi D10V */
+++#define EM_D30V		86		/* Mitsubishi D30V */
+++#define EM_V850		87		/* NEC v850 */
+++#define EM_M32R		88		/* Mitsubishi M32R */
+++#define EM_MN10300	89		/* Matsushita MN10300 */
+++#define EM_MN10200	90		/* Matsushita MN10200 */
+++#define EM_PJ		91		/* picoJava */
+++#define EM_OPENRISC	92		/* OpenRISC 32-bit embedded processor */
+++#define EM_ARC_A5	93		/* ARC Cores Tangent-A5 */
+++#define EM_XTENSA	94		/* Tensilica Xtensa Architecture */
+++#define EM_TILEPRO	188		/* Tilera TILEPro */
+++#define EM_TILEGX	191		/* Tilera TILE-Gx */
+++#define EM_NUM		192
+++
+++/* If it is necessary to assign new unofficial EM_* values, please
+++   pick large random numbers (0x8523, 0xa7f2, etc.) to minimize the
+++   chances of collision with official or non-GNU unofficial values.  */
+++
+++#define EM_ALPHA	0x9026
+++
+++/* Legal values for e_version (version).  */
+++
+++#define EV_NONE		0		/* Invalid ELF version */
+++#define EV_CURRENT	1		/* Current version */
+++#define EV_NUM		2
+++
+++/* Section header.  */
+++
+++typedef struct
+++{
+++  Elf32_Word	sh_name;		/* Section name (string tbl index) */
+++  Elf32_Word	sh_type;		/* Section type */
+++  Elf32_Word	sh_flags;		/* Section flags */
+++  Elf32_Addr	sh_addr;		/* Section virtual addr at execution */
+++  Elf32_Off	sh_offset;		/* Section file offset */
+++  Elf32_Word	sh_size;		/* Section size in bytes */
+++  Elf32_Word	sh_link;		/* Link to another section */
+++  Elf32_Word	sh_info;		/* Additional section information */
+++  Elf32_Word	sh_addralign;		/* Section alignment */
+++  Elf32_Word	sh_entsize;		/* Entry size if section holds table */
+++} Elf32_Shdr;
+++
+++typedef struct
+++{
+++  Elf64_Word	sh_name;		/* Section name (string tbl index) */
+++  Elf64_Word	sh_type;		/* Section type */
+++  Elf64_Xword	sh_flags;		/* Section flags */
+++  Elf64_Addr	sh_addr;		/* Section virtual addr at execution */
+++  Elf64_Off	sh_offset;		/* Section file offset */
+++  Elf64_Xword	sh_size;		/* Section size in bytes */
+++  Elf64_Word	sh_link;		/* Link to another section */
+++  Elf64_Word	sh_info;		/* Additional section information */
+++  Elf64_Xword	sh_addralign;		/* Section alignment */
+++  Elf64_Xword	sh_entsize;		/* Entry size if section holds table */
+++} Elf64_Shdr;
+++
+++/* Special section indices.  */
+++
+++#define SHN_UNDEF	0		/* Undefined section */
+++#define SHN_LORESERVE	0xff00		/* Start of reserved indices */
+++#define SHN_LOPROC	0xff00		/* Start of processor-specific */
+++#define SHN_BEFORE	0xff00		/* Order section before all others
+++					   (Solaris).  */
+++#define SHN_AFTER	0xff01		/* Order section after all others
+++					   (Solaris).  */
+++#define SHN_HIPROC	0xff1f		/* End of processor-specific */
+++#define SHN_LOOS	0xff20		/* Start of OS-specific */
+++#define SHN_HIOS	0xff3f		/* End of OS-specific */
+++#define SHN_ABS		0xfff1		/* Associated symbol is absolute */
+++#define SHN_COMMON	0xfff2		/* Associated symbol is common */
+++#define SHN_XINDEX	0xffff		/* Index is in extra table.  */
+++#define SHN_HIRESERVE	0xffff		/* End of reserved indices */
+++
+++/* Legal values for sh_type (section type).  */
+++
+++#define SHT_NULL	  0		/* Section header table entry unused */
+++#define SHT_PROGBITS	  1		/* Program data */
+++#define SHT_SYMTAB	  2		/* Symbol table */
+++#define SHT_STRTAB	  3		/* String table */
+++#define SHT_RELA	  4		/* Relocation entries with addends */
+++#define SHT_HASH	  5		/* Symbol hash table */
+++#define SHT_DYNAMIC	  6		/* Dynamic linking information */
+++#define SHT_NOTE	  7		/* Notes */
+++#define SHT_NOBITS	  8		/* Program space with no data (bss) */
+++#define SHT_REL		  9		/* Relocation entries, no addends */
+++#define SHT_SHLIB	  10		/* Reserved */
+++#define SHT_DYNSYM	  11		/* Dynamic linker symbol table */
+++#define SHT_INIT_ARRAY	  14		/* Array of constructors */
+++#define SHT_FINI_ARRAY	  15		/* Array of destructors */
+++#define SHT_PREINIT_ARRAY 16		/* Array of pre-constructors */
+++#define SHT_GROUP	  17		/* Section group */
+++#define SHT_SYMTAB_SHNDX  18		/* Extended section indeces */
+++#define	SHT_NUM		  19		/* Number of defined types.  */
+++#define SHT_LOOS	  0x60000000	/* Start OS-specific.  */
+++#define SHT_GNU_ATTRIBUTES 0x6ffffff5	/* Object attributes.  */
+++#define SHT_GNU_HASH	  0x6ffffff6	/* GNU-style hash table.  */
+++#define SHT_GNU_LIBLIST	  0x6ffffff7	/* Prelink library list */
+++#define SHT_CHECKSUM	  0x6ffffff8	/* Checksum for DSO content.  */
+++#define SHT_LOSUNW	  0x6ffffffa	/* Sun-specific low bound.  */
+++#define SHT_SUNW_move	  0x6ffffffa
+++#define SHT_SUNW_COMDAT   0x6ffffffb
+++#define SHT_SUNW_syminfo  0x6ffffffc
+++#define SHT_GNU_verdef	  0x6ffffffd	/* Version definition section.  */
+++#define SHT_GNU_verneed	  0x6ffffffe	/* Version needs section.  */
+++#define SHT_GNU_versym	  0x6fffffff	/* Version symbol table.  */
+++#define SHT_HISUNW	  0x6fffffff	/* Sun-specific high bound.  */
+++#define SHT_HIOS	  0x6fffffff	/* End OS-specific type */
+++#define SHT_LOPROC	  0x70000000	/* Start of processor-specific */
+++#define SHT_HIPROC	  0x7fffffff	/* End of processor-specific */
+++#define SHT_LOUSER	  0x80000000	/* Start of application-specific */
+++#define SHT_HIUSER	  0x8fffffff	/* End of application-specific */
+++
+++/* Legal values for sh_flags (section flags).  */
+++
+++#define SHF_WRITE	     (1 << 0)	/* Writable */
+++#define SHF_ALLOC	     (1 << 1)	/* Occupies memory during execution */
+++#define SHF_EXECINSTR	     (1 << 2)	/* Executable */
+++#define SHF_MERGE	     (1 << 4)	/* Might be merged */
+++#define SHF_STRINGS	     (1 << 5)	/* Contains nul-terminated strings */
+++#define SHF_INFO_LINK	     (1 << 6)	/* `sh_info' contains SHT index */
+++#define SHF_LINK_ORDER	     (1 << 7)	/* Preserve order after combining */
+++#define SHF_OS_NONCONFORMING (1 << 8)	/* Non-standard OS specific handling
+++					   required */
+++#define SHF_GROUP	     (1 << 9)	/* Section is member of a group.  */
+++#define SHF_TLS		     (1 << 10)	/* Section hold thread-local data.  */
+++#define SHF_MASKOS	     0x0ff00000	/* OS-specific.  */
+++#define SHF_MASKPROC	     0xf0000000	/* Processor-specific */
+++#define SHF_ORDERED	     (1 << 30)	/* Special ordering requirement
+++					   (Solaris).  */
+++#define SHF_EXCLUDE	     (1 << 31)	/* Section is excluded unless
+++					   referenced or allocated (Solaris).*/
+++
+++/* Section group handling.  */
+++#define GRP_COMDAT	0x1		/* Mark group as COMDAT.  */
+++
+++/* Symbol table entry.  */
+++
+++typedef struct
+++{
+++  Elf32_Word	st_name;		/* Symbol name (string tbl index) */
+++  Elf32_Addr	st_value;		/* Symbol value */
+++  Elf32_Word	st_size;		/* Symbol size */
+++  unsigned char	st_info;		/* Symbol type and binding */
+++  unsigned char	st_other;		/* Symbol visibility */
+++  Elf32_Section	st_shndx;		/* Section index */
+++} Elf32_Sym;
+++
+++typedef struct
+++{
+++  Elf64_Word	st_name;		/* Symbol name (string tbl index) */
+++  unsigned char	st_info;		/* Symbol type and binding */
+++  unsigned char st_other;		/* Symbol visibility */
+++  Elf64_Section	st_shndx;		/* Section index */
+++  Elf64_Addr	st_value;		/* Symbol value */
+++  Elf64_Xword	st_size;		/* Symbol size */
+++} Elf64_Sym;
+++
+++/* The syminfo section if available contains additional information about
+++   every dynamic symbol.  */
+++
+++typedef struct
+++{
+++  Elf32_Half si_boundto;		/* Direct bindings, symbol bound to */
+++  Elf32_Half si_flags;			/* Per symbol flags */
+++} Elf32_Syminfo;
+++
+++typedef struct
+++{
+++  Elf64_Half si_boundto;		/* Direct bindings, symbol bound to */
+++  Elf64_Half si_flags;			/* Per symbol flags */
+++} Elf64_Syminfo;
+++
+++/* Possible values for si_boundto.  */
+++#define SYMINFO_BT_SELF		0xffff	/* Symbol bound to self */
+++#define SYMINFO_BT_PARENT	0xfffe	/* Symbol bound to parent */
+++#define SYMINFO_BT_LOWRESERVE	0xff00	/* Beginning of reserved entries */
+++
+++/* Possible bitmasks for si_flags.  */
+++#define SYMINFO_FLG_DIRECT	0x0001	/* Direct bound symbol */
+++#define SYMINFO_FLG_PASSTHRU	0x0002	/* Pass-thru symbol for translator */
+++#define SYMINFO_FLG_COPY	0x0004	/* Symbol is a copy-reloc */
+++#define SYMINFO_FLG_LAZYLOAD	0x0008	/* Symbol bound to object to be lazy
+++					   loaded */
+++/* Syminfo version values.  */
+++#define SYMINFO_NONE		0
+++#define SYMINFO_CURRENT		1
+++#define SYMINFO_NUM		2
+++
+++
+++/* How to extract and insert information held in the st_info field.  */
+++
+++#define ELF32_ST_BIND(val)		(((unsigned char) (val)) >> 4)
+++#define ELF32_ST_TYPE(val)		((val) & 0xf)
+++#define ELF32_ST_INFO(bind, type)	(((bind) << 4) + ((type) & 0xf))
+++
+++/* Both Elf32_Sym and Elf64_Sym use the same one-byte st_info field.  */
+++#define ELF64_ST_BIND(val)		ELF32_ST_BIND (val)
+++#define ELF64_ST_TYPE(val)		ELF32_ST_TYPE (val)
+++#define ELF64_ST_INFO(bind, type)	ELF32_ST_INFO ((bind), (type))
+++
+++/* Legal values for ST_BIND subfield of st_info (symbol binding).  */
+++
+++#define STB_LOCAL	0		/* Local symbol */
+++#define STB_GLOBAL	1		/* Global symbol */
+++#define STB_WEAK	2		/* Weak symbol */
+++#define	STB_NUM		3		/* Number of defined types.  */
+++#define STB_LOOS	10		/* Start of OS-specific */
+++#define STB_GNU_UNIQUE	10		/* Unique symbol.  */
+++#define STB_HIOS	12		/* End of OS-specific */
+++#define STB_LOPROC	13		/* Start of processor-specific */
+++#define STB_HIPROC	15		/* End of processor-specific */
+++
+++/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
+++
+++#define STT_NOTYPE	0		/* Symbol type is unspecified */
+++#define STT_OBJECT	1		/* Symbol is a data object */
+++#define STT_FUNC	2		/* Symbol is a code object */
+++#define STT_SECTION	3		/* Symbol associated with a section */
+++#define STT_FILE	4		/* Symbol's name is file name */
+++#define STT_COMMON	5		/* Symbol is a common data object */
+++#define STT_TLS		6		/* Symbol is thread-local data object*/
+++#define	STT_NUM		7		/* Number of defined types.  */
+++#define STT_LOOS	10		/* Start of OS-specific */
+++#define STT_GNU_IFUNC	10		/* Symbol is indirect code object */
+++#define STT_HIOS	12		/* End of OS-specific */
+++#define STT_LOPROC	13		/* Start of processor-specific */
+++#define STT_HIPROC	15		/* End of processor-specific */
+++
+++
+++/* Symbol table indices are found in the hash buckets and chain table
+++   of a symbol hash table section.  This special index value indicates
+++   the end of a chain, meaning no further symbols are found in that bucket.  */
+++
+++#define STN_UNDEF	0		/* End of a chain.  */
+++
+++
+++/* How to extract and insert information held in the st_other field.  */
+++
+++#define ELF32_ST_VISIBILITY(o)	((o) & 0x03)
+++
+++/* For ELF64 the definitions are the same.  */
+++#define ELF64_ST_VISIBILITY(o)	ELF32_ST_VISIBILITY (o)
+++
+++/* Symbol visibility specification encoded in the st_other field.  */
+++#define STV_DEFAULT	0		/* Default symbol visibility rules */
+++#define STV_INTERNAL	1		/* Processor specific hidden class */
+++#define STV_HIDDEN	2		/* Sym unavailable in other modules */
+++#define STV_PROTECTED	3		/* Not preemptible, not exported */
+++
+++
+++/* Relocation table entry without addend (in section of type SHT_REL).  */
+++
+++typedef struct
+++{
+++  Elf32_Addr	r_offset;		/* Address */
+++  Elf32_Word	r_info;			/* Relocation type and symbol index */
+++} Elf32_Rel;
+++
+++/* I have seen two different definitions of the Elf64_Rel and
+++   Elf64_Rela structures, so we'll leave them out until Novell (or
+++   whoever) gets their act together.  */
+++/* The following, at least, is used on Sparc v9, MIPS, and Alpha.  */
+++
+++typedef struct
+++{
+++  Elf64_Addr	r_offset;		/* Address */
+++  Elf64_Xword	r_info;			/* Relocation type and symbol index */
+++} Elf64_Rel;
+++
+++/* Relocation table entry with addend (in section of type SHT_RELA).  */
+++
+++typedef struct
+++{
+++  Elf32_Addr	r_offset;		/* Address */
+++  Elf32_Word	r_info;			/* Relocation type and symbol index */
+++  Elf32_Sword	r_addend;		/* Addend */
+++} Elf32_Rela;
+++
+++typedef struct
+++{
+++  Elf64_Addr	r_offset;		/* Address */
+++  Elf64_Xword	r_info;			/* Relocation type and symbol index */
+++  Elf64_Sxword	r_addend;		/* Addend */
+++} Elf64_Rela;
+++
+++/* How to extract and insert information held in the r_info field.  */
+++
+++#define ELF32_R_SYM(val)		((val) >> 8)
+++#define ELF32_R_TYPE(val)		((val) & 0xff)
+++#define ELF32_R_INFO(sym, type)		(((sym) << 8) + ((type) & 0xff))
+++
+++#define ELF64_R_SYM(i)			((i) >> 32)
+++#define ELF64_R_TYPE(i)			((i) & 0xffffffff)
+++#define ELF64_R_INFO(sym,type)		((((Elf64_Xword) (sym)) << 32) + (type))
+++
+++/* Program segment header.  */
+++
+++typedef struct
+++{
+++  Elf32_Word	p_type;			/* Segment type */
+++  Elf32_Off	p_offset;		/* Segment file offset */
+++  Elf32_Addr	p_vaddr;		/* Segment virtual address */
+++  Elf32_Addr	p_paddr;		/* Segment physical address */
+++  Elf32_Word	p_filesz;		/* Segment size in file */
+++  Elf32_Word	p_memsz;		/* Segment size in memory */
+++  Elf32_Word	p_flags;		/* Segment flags */
+++  Elf32_Word	p_align;		/* Segment alignment */
+++} Elf32_Phdr;
+++
+++typedef struct
+++{
+++  Elf64_Word	p_type;			/* Segment type */
+++  Elf64_Word	p_flags;		/* Segment flags */
+++  Elf64_Off	p_offset;		/* Segment file offset */
+++  Elf64_Addr	p_vaddr;		/* Segment virtual address */
+++  Elf64_Addr	p_paddr;		/* Segment physical address */
+++  Elf64_Xword	p_filesz;		/* Segment size in file */
+++  Elf64_Xword	p_memsz;		/* Segment size in memory */
+++  Elf64_Xword	p_align;		/* Segment alignment */
+++} Elf64_Phdr;
+++
+++/* Special value for e_phnum.  This indicates that the real number of
+++   program headers is too large to fit into e_phnum.  Instead the real
+++   value is in the field sh_info of section 0.  */
+++
+++#define PN_XNUM		0xffff
+++
+++/* Legal values for p_type (segment type).  */
+++
+++#define	PT_NULL		0		/* Program header table entry unused */
+++#define PT_LOAD		1		/* Loadable program segment */
+++#define PT_DYNAMIC	2		/* Dynamic linking information */
+++#define PT_INTERP	3		/* Program interpreter */
+++#define PT_NOTE		4		/* Auxiliary information */
+++#define PT_SHLIB	5		/* Reserved */
+++#define PT_PHDR		6		/* Entry for header table itself */
+++#define PT_TLS		7		/* Thread-local storage segment */
+++#define	PT_NUM		8		/* Number of defined types */
+++#define PT_LOOS		0x60000000	/* Start of OS-specific */
+++#define PT_GNU_EH_FRAME	0x6474e550	/* GCC .eh_frame_hdr segment */
+++#define PT_GNU_STACK	0x6474e551	/* Indicates stack executability */
+++#define PT_GNU_RELRO	0x6474e552	/* Read-only after relocation */
+++#define PT_LOSUNW	0x6ffffffa
+++#define PT_SUNWBSS	0x6ffffffa	/* Sun Specific segment */
+++#define PT_SUNWSTACK	0x6ffffffb	/* Stack segment */
+++#define PT_HISUNW	0x6fffffff
+++#define PT_HIOS		0x6fffffff	/* End of OS-specific */
+++#define PT_LOPROC	0x70000000	/* Start of processor-specific */
+++#define PT_HIPROC	0x7fffffff	/* End of processor-specific */
+++
+++/* Legal values for p_flags (segment flags).  */
+++
+++#define PF_X		(1 << 0)	/* Segment is executable */
+++#define PF_W		(1 << 1)	/* Segment is writable */
+++#define PF_R		(1 << 2)	/* Segment is readable */
+++#define PF_MASKOS	0x0ff00000	/* OS-specific */
+++#define PF_MASKPROC	0xf0000000	/* Processor-specific */
+++
+++/* Legal values for note segment descriptor types for core files. */
+++
+++#define NT_PRSTATUS	1		/* Contains copy of prstatus struct */
+++#define NT_FPREGSET	2		/* Contains copy of fpregset struct */
+++#define NT_PRPSINFO	3		/* Contains copy of prpsinfo struct */
+++#define NT_PRXREG	4		/* Contains copy of prxregset struct */
+++#define NT_TASKSTRUCT	4		/* Contains copy of task structure */
+++#define NT_PLATFORM	5		/* String from sysinfo(SI_PLATFORM) */
+++#define NT_AUXV		6		/* Contains copy of auxv array */
+++#define NT_GWINDOWS	7		/* Contains copy of gwindows struct */
+++#define NT_ASRS		8		/* Contains copy of asrset struct */
+++#define NT_PSTATUS	10		/* Contains copy of pstatus struct */
+++#define NT_PSINFO	13		/* Contains copy of psinfo struct */
+++#define NT_PRCRED	14		/* Contains copy of prcred struct */
+++#define NT_UTSNAME	15		/* Contains copy of utsname struct */
+++#define NT_LWPSTATUS	16		/* Contains copy of lwpstatus struct */
+++#define NT_LWPSINFO	17		/* Contains copy of lwpinfo struct */
+++#define NT_PRFPXREG	20		/* Contains copy of fprxregset struct */
+++#define NT_PRXFPREG	0x46e62b7f	/* Contains copy of user_fxsr_struct */
+++#define NT_PPC_VMX	0x100		/* PowerPC Altivec/VMX registers */
+++#define NT_PPC_SPE	0x101		/* PowerPC SPE/EVR registers */
+++#define NT_PPC_VSX	0x102		/* PowerPC VSX registers */
+++#define NT_386_TLS	0x200		/* i386 TLS slots (struct user_desc) */
+++#define NT_386_IOPERM	0x201		/* x86 io permission bitmap (1=deny) */
+++#define NT_X86_XSTATE	0x202		/* x86 extended state using xsave */
+++
+++/* Legal values for the note segment descriptor types for object files.  */
+++
+++#define NT_VERSION	1		/* Contains a version string.  */
+++
+++
+++/* Dynamic section entry.  */
+++
+++typedef struct
+++{
+++  Elf32_Sword	d_tag;			/* Dynamic entry type */
+++  union
+++    {
+++      Elf32_Word d_val;			/* Integer value */
+++      Elf32_Addr d_ptr;			/* Address value */
+++    } d_un;
+++} Elf32_Dyn;
+++
+++typedef struct
+++{
+++  Elf64_Sxword	d_tag;			/* Dynamic entry type */
+++  union
+++    {
+++      Elf64_Xword d_val;		/* Integer value */
+++      Elf64_Addr d_ptr;			/* Address value */
+++    } d_un;
+++} Elf64_Dyn;
+++
+++/* Legal values for d_tag (dynamic entry type).  */
+++
+++#define DT_NULL		0		/* Marks end of dynamic section */
+++#define DT_NEEDED	1		/* Name of needed library */
+++#define DT_PLTRELSZ	2		/* Size in bytes of PLT relocs */
+++#define DT_PLTGOT	3		/* Processor defined value */
+++#define DT_HASH		4		/* Address of symbol hash table */
+++#define DT_STRTAB	5		/* Address of string table */
+++#define DT_SYMTAB	6		/* Address of symbol table */
+++#define DT_RELA		7		/* Address of Rela relocs */
+++#define DT_RELASZ	8		/* Total size of Rela relocs */
+++#define DT_RELAENT	9		/* Size of one Rela reloc */
+++#define DT_STRSZ	10		/* Size of string table */
+++#define DT_SYMENT	11		/* Size of one symbol table entry */
+++#define DT_INIT		12		/* Address of init function */
+++#define DT_FINI		13		/* Address of termination function */
+++#define DT_SONAME	14		/* Name of shared object */
+++#define DT_RPATH	15		/* Library search path (deprecated) */
+++#define DT_SYMBOLIC	16		/* Start symbol search here */
+++#define DT_REL		17		/* Address of Rel relocs */
+++#define DT_RELSZ	18		/* Total size of Rel relocs */
+++#define DT_RELENT	19		/* Size of one Rel reloc */
+++#define DT_PLTREL	20		/* Type of reloc in PLT */
+++#define DT_DEBUG	21		/* For debugging; unspecified */
+++#define DT_TEXTREL	22		/* Reloc might modify .text */
+++#define DT_JMPREL	23		/* Address of PLT relocs */
+++#define	DT_BIND_NOW	24		/* Process relocations of object */
+++#define	DT_INIT_ARRAY	25		/* Array with addresses of init fct */
+++#define	DT_FINI_ARRAY	26		/* Array with addresses of fini fct */
+++#define	DT_INIT_ARRAYSZ	27		/* Size in bytes of DT_INIT_ARRAY */
+++#define	DT_FINI_ARRAYSZ	28		/* Size in bytes of DT_FINI_ARRAY */
+++#define DT_RUNPATH	29		/* Library search path */
+++#define DT_FLAGS	30		/* Flags for the object being loaded */
+++#define DT_ENCODING	32		/* Start of encoded range */
+++#define DT_PREINIT_ARRAY 32		/* Array with addresses of preinit fct*/
+++#define DT_PREINIT_ARRAYSZ 33		/* size in bytes of DT_PREINIT_ARRAY */
+++#define	DT_NUM		34		/* Number used */
+++#define DT_LOOS		0x6000000d	/* Start of OS-specific */
+++#define DT_HIOS		0x6ffff000	/* End of OS-specific */
+++#define DT_LOPROC	0x70000000	/* Start of processor-specific */
+++#define DT_HIPROC	0x7fffffff	/* End of processor-specific */
+++#define	DT_PROCNUM	DT_MIPS_NUM	/* Most used by any processor */
+++
+++/* DT_* entries which fall between DT_VALRNGHI & DT_VALRNGLO use the
+++   Dyn.d_un.d_val field of the Elf*_Dyn structure.  This follows Sun's
+++   approach.  */
+++#define DT_VALRNGLO	0x6ffffd00
+++#define DT_GNU_PRELINKED 0x6ffffdf5	/* Prelinking timestamp */
+++#define DT_GNU_CONFLICTSZ 0x6ffffdf6	/* Size of conflict section */
+++#define DT_GNU_LIBLISTSZ 0x6ffffdf7	/* Size of library list */
+++#define DT_CHECKSUM	0x6ffffdf8
+++#define DT_PLTPADSZ	0x6ffffdf9
+++#define DT_MOVEENT	0x6ffffdfa
+++#define DT_MOVESZ	0x6ffffdfb
+++#define DT_FEATURE_1	0x6ffffdfc	/* Feature selection (DTF_*).  */
+++#define DT_POSFLAG_1	0x6ffffdfd	/* Flags for DT_* entries, effecting
+++					   the following DT_* entry.  */
+++#define DT_SYMINSZ	0x6ffffdfe	/* Size of syminfo table (in bytes) */
+++#define DT_SYMINENT	0x6ffffdff	/* Entry size of syminfo */
+++#define DT_VALRNGHI	0x6ffffdff
+++#define DT_VALTAGIDX(tag)	(DT_VALRNGHI - (tag))	/* Reverse order! */
+++#define DT_VALNUM 12
+++
+++/* DT_* entries which fall between DT_ADDRRNGHI & DT_ADDRRNGLO use the
+++   Dyn.d_un.d_ptr field of the Elf*_Dyn structure.
+++
+++   If any adjustment is made to the ELF object after it has been
+++   built these entries will need to be adjusted.  */
+++#define DT_ADDRRNGLO	0x6ffffe00
+++#define DT_GNU_HASH	0x6ffffef5	/* GNU-style hash table.  */
+++#define DT_TLSDESC_PLT	0x6ffffef6
+++#define DT_TLSDESC_GOT	0x6ffffef7
+++#define DT_GNU_CONFLICT	0x6ffffef8	/* Start of conflict section */
+++#define DT_GNU_LIBLIST	0x6ffffef9	/* Library list */
+++#define DT_CONFIG	0x6ffffefa	/* Configuration information.  */
+++#define DT_DEPAUDIT	0x6ffffefb	/* Dependency auditing.  */
+++#define DT_AUDIT	0x6ffffefc	/* Object auditing.  */
+++#define	DT_PLTPAD	0x6ffffefd	/* PLT padding.  */
+++#define	DT_MOVETAB	0x6ffffefe	/* Move table.  */
+++#define DT_SYMINFO	0x6ffffeff	/* Syminfo table.  */
+++#define DT_ADDRRNGHI	0x6ffffeff
+++#define DT_ADDRTAGIDX(tag)	(DT_ADDRRNGHI - (tag))	/* Reverse order! */
+++#define DT_ADDRNUM 11
+++
+++/* The versioning entry types.  The next are defined as part of the
+++   GNU extension.  */
+++#define DT_VERSYM	0x6ffffff0
+++
+++#define DT_RELACOUNT	0x6ffffff9
+++#define DT_RELCOUNT	0x6ffffffa
+++
+++/* These were chosen by Sun.  */
+++#define DT_FLAGS_1	0x6ffffffb	/* State flags, see DF_1_* below.  */
+++#define	DT_VERDEF	0x6ffffffc	/* Address of version definition
+++					   table */
+++#define	DT_VERDEFNUM	0x6ffffffd	/* Number of version definitions */
+++#define	DT_VERNEED	0x6ffffffe	/* Address of table with needed
+++					   versions */
+++#define	DT_VERNEEDNUM	0x6fffffff	/* Number of needed versions */
+++#define DT_VERSIONTAGIDX(tag)	(DT_VERNEEDNUM - (tag))	/* Reverse order! */
+++#define DT_VERSIONTAGNUM 16
+++
+++/* Sun added these machine-independent extensions in the "processor-specific"
+++   range.  Be compatible.  */
+++#define DT_AUXILIARY    0x7ffffffd      /* Shared object to load before self */
+++#define DT_FILTER       0x7fffffff      /* Shared object to get values from */
+++#define DT_EXTRATAGIDX(tag)	((Elf32_Word)-((Elf32_Sword) (tag) <<1>>1)-1)
+++#define DT_EXTRANUM	3
+++
+++/* Values of `d_un.d_val' in the DT_FLAGS entry.  */
+++#define DF_ORIGIN	0x00000001	/* Object may use DF_ORIGIN */
+++#define DF_SYMBOLIC	0x00000002	/* Symbol resolutions starts here */
+++#define DF_TEXTREL	0x00000004	/* Object contains text relocations */
+++#define DF_BIND_NOW	0x00000008	/* No lazy binding for this object */
+++#define DF_STATIC_TLS	0x00000010	/* Module uses the static TLS model */
+++
+++/* State flags selectable in the `d_un.d_val' element of the DT_FLAGS_1
+++   entry in the dynamic section.  */
+++#define DF_1_NOW	0x00000001	/* Set RTLD_NOW for this object.  */
+++#define DF_1_GLOBAL	0x00000002	/* Set RTLD_GLOBAL for this object.  */
+++#define DF_1_GROUP	0x00000004	/* Set RTLD_GROUP for this object.  */
+++#define DF_1_NODELETE	0x00000008	/* Set RTLD_NODELETE for this object.*/
+++#define DF_1_LOADFLTR	0x00000010	/* Trigger filtee loading at runtime.*/
+++#define DF_1_INITFIRST	0x00000020	/* Set RTLD_INITFIRST for this object*/
+++#define DF_1_NOOPEN	0x00000040	/* Set RTLD_NOOPEN for this object.  */
+++#define DF_1_ORIGIN	0x00000080	/* $ORIGIN must be handled.  */
+++#define DF_1_DIRECT	0x00000100	/* Direct binding enabled.  */
+++#define DF_1_TRANS	0x00000200
+++#define DF_1_INTERPOSE	0x00000400	/* Object is used to interpose.  */
+++#define DF_1_NODEFLIB	0x00000800	/* Ignore default lib search path.  */
+++#define DF_1_NODUMP	0x00001000	/* Object can't be dldump'ed.  */
+++#define DF_1_CONFALT	0x00002000	/* Configuration alternative created.*/
+++#define DF_1_ENDFILTEE	0x00004000	/* Filtee terminates filters search. */
+++#define	DF_1_DISPRELDNE	0x00008000	/* Disp reloc applied at build time. */
+++#define	DF_1_DISPRELPND	0x00010000	/* Disp reloc applied at run-time.  */
+++
+++/* Flags for the feature selection in DT_FEATURE_1.  */
+++#define DTF_1_PARINIT	0x00000001
+++#define DTF_1_CONFEXP	0x00000002
+++
+++/* Flags in the DT_POSFLAG_1 entry effecting only the next DT_* entry.  */
+++#define DF_P1_LAZYLOAD	0x00000001	/* Lazyload following object.  */
+++#define DF_P1_GROUPPERM	0x00000002	/* Symbols from next object are not
+++					   generally available.  */
+++
+++/* Version definition sections.  */
+++
+++typedef struct
+++{
+++  Elf32_Half	vd_version;		/* Version revision */
+++  Elf32_Half	vd_flags;		/* Version information */
+++  Elf32_Half	vd_ndx;			/* Version Index */
+++  Elf32_Half	vd_cnt;			/* Number of associated aux entries */
+++  Elf32_Word	vd_hash;		/* Version name hash value */
+++  Elf32_Word	vd_aux;			/* Offset in bytes to verdaux array */
+++  Elf32_Word	vd_next;		/* Offset in bytes to next verdef
+++					   entry */
+++} Elf32_Verdef;
+++
+++typedef struct
+++{
+++  Elf64_Half	vd_version;		/* Version revision */
+++  Elf64_Half	vd_flags;		/* Version information */
+++  Elf64_Half	vd_ndx;			/* Version Index */
+++  Elf64_Half	vd_cnt;			/* Number of associated aux entries */
+++  Elf64_Word	vd_hash;		/* Version name hash value */
+++  Elf64_Word	vd_aux;			/* Offset in bytes to verdaux array */
+++  Elf64_Word	vd_next;		/* Offset in bytes to next verdef
+++					   entry */
+++} Elf64_Verdef;
+++
+++
+++/* Legal values for vd_version (version revision).  */
+++#define VER_DEF_NONE	0		/* No version */
+++#define VER_DEF_CURRENT	1		/* Current version */
+++#define VER_DEF_NUM	2		/* Given version number */
+++
+++/* Legal values for vd_flags (version information flags).  */
+++#define VER_FLG_BASE	0x1		/* Version definition of file itself */
+++#define VER_FLG_WEAK	0x2		/* Weak version identifier */
+++
+++/* Versym symbol index values.  */
+++#define	VER_NDX_LOCAL		0	/* Symbol is local.  */
+++#define	VER_NDX_GLOBAL		1	/* Symbol is global.  */
+++#define	VER_NDX_LORESERVE	0xff00	/* Beginning of reserved entries.  */
+++#define	VER_NDX_ELIMINATE	0xff01	/* Symbol is to be eliminated.  */
+++
+++/* Auxialiary version information.  */
+++
+++typedef struct
+++{
+++  Elf32_Word	vda_name;		/* Version or dependency names */
+++  Elf32_Word	vda_next;		/* Offset in bytes to next verdaux
+++					   entry */
+++} Elf32_Verdaux;
+++
+++typedef struct
+++{
+++  Elf64_Word	vda_name;		/* Version or dependency names */
+++  Elf64_Word	vda_next;		/* Offset in bytes to next verdaux
+++					   entry */
+++} Elf64_Verdaux;
+++
+++
+++/* Version dependency section.  */
+++
+++typedef struct
+++{
+++  Elf32_Half	vn_version;		/* Version of structure */
+++  Elf32_Half	vn_cnt;			/* Number of associated aux entries */
+++  Elf32_Word	vn_file;		/* Offset of filename for this
+++					   dependency */
+++  Elf32_Word	vn_aux;			/* Offset in bytes to vernaux array */
+++  Elf32_Word	vn_next;		/* Offset in bytes to next verneed
+++					   entry */
+++} Elf32_Verneed;
+++
+++typedef struct
+++{
+++  Elf64_Half	vn_version;		/* Version of structure */
+++  Elf64_Half	vn_cnt;			/* Number of associated aux entries */
+++  Elf64_Word	vn_file;		/* Offset of filename for this
+++					   dependency */
+++  Elf64_Word	vn_aux;			/* Offset in bytes to vernaux array */
+++  Elf64_Word	vn_next;		/* Offset in bytes to next verneed
+++					   entry */
+++} Elf64_Verneed;
+++
+++
+++/* Legal values for vn_version (version revision).  */
+++#define VER_NEED_NONE	 0		/* No version */
+++#define VER_NEED_CURRENT 1		/* Current version */
+++#define VER_NEED_NUM	 2		/* Given version number */
+++
+++/* Auxiliary needed version information.  */
+++
+++typedef struct
+++{
+++  Elf32_Word	vna_hash;		/* Hash value of dependency name */
+++  Elf32_Half	vna_flags;		/* Dependency specific information */
+++  Elf32_Half	vna_other;		/* Unused */
+++  Elf32_Word	vna_name;		/* Dependency name string offset */
+++  Elf32_Word	vna_next;		/* Offset in bytes to next vernaux
+++					   entry */
+++} Elf32_Vernaux;
+++
+++typedef struct
+++{
+++  Elf64_Word	vna_hash;		/* Hash value of dependency name */
+++  Elf64_Half	vna_flags;		/* Dependency specific information */
+++  Elf64_Half	vna_other;		/* Unused */
+++  Elf64_Word	vna_name;		/* Dependency name string offset */
+++  Elf64_Word	vna_next;		/* Offset in bytes to next vernaux
+++					   entry */
+++} Elf64_Vernaux;
+++
+++
+++/* Legal values for vna_flags.  */
+++#define VER_FLG_WEAK	0x2		/* Weak version identifier */
+++
+++
+++/* Auxiliary vector.  */
+++
+++/* This vector is normally only used by the program interpreter.  The
+++   usual definition in an ABI supplement uses the name auxv_t.  The
+++   vector is not usually defined in a standard <elf.h> file, but it
+++   can't hurt.  We rename it to avoid conflicts.  The sizes of these
+++   types are an arrangement between the exec server and the program
+++   interpreter, so we don't fully specify them here.  */
+++
+++typedef struct
+++{
+++  uint32_t a_type;		/* Entry type */
+++  union
+++    {
+++      uint32_t a_val;		/* Integer value */
+++      /* We use to have pointer elements added here.  We cannot do that,
+++	 though, since it does not work when using 32-bit definitions
+++	 on 64-bit platforms and vice versa.  */
+++    } a_un;
+++} Elf32_auxv_t;
+++
+++typedef struct
+++{
+++  uint64_t a_type;		/* Entry type */
+++  union
+++    {
+++      uint64_t a_val;		/* Integer value */
+++      /* We use to have pointer elements added here.  We cannot do that,
+++	 though, since it does not work when using 32-bit definitions
+++	 on 64-bit platforms and vice versa.  */
+++    } a_un;
+++} Elf64_auxv_t;
+++
+++/* Legal values for a_type (entry type).  */
+++
+++#define AT_NULL		0		/* End of vector */
+++#define AT_IGNORE	1		/* Entry should be ignored */
+++#define AT_EXECFD	2		/* File descriptor of program */
+++#define AT_PHDR		3		/* Program headers for program */
+++#define AT_PHENT	4		/* Size of program header entry */
+++#define AT_PHNUM	5		/* Number of program headers */
+++#define AT_PAGESZ	6		/* System page size */
+++#define AT_BASE		7		/* Base address of interpreter */
+++#define AT_FLAGS	8		/* Flags */
+++#define AT_ENTRY	9		/* Entry point of program */
+++#define AT_NOTELF	10		/* Program is not ELF */
+++#define AT_UID		11		/* Real uid */
+++#define AT_EUID		12		/* Effective uid */
+++#define AT_GID		13		/* Real gid */
+++#define AT_EGID		14		/* Effective gid */
+++#define AT_CLKTCK	17		/* Frequency of times() */
+++
+++/* Some more special a_type values describing the hardware.  */
+++#define AT_PLATFORM	15		/* String identifying platform.  */
+++#define AT_HWCAP	16		/* Machine dependent hints about
+++					   processor capabilities.  */
+++
+++/* This entry gives some information about the FPU initialization
+++   performed by the kernel.  */
+++#define AT_FPUCW	18		/* Used FPU control word.  */
+++
+++/* Cache block sizes.  */
+++#define AT_DCACHEBSIZE	19		/* Data cache block size.  */
+++#define AT_ICACHEBSIZE	20		/* Instruction cache block size.  */
+++#define AT_UCACHEBSIZE	21		/* Unified cache block size.  */
+++
+++/* A special ignored value for PPC, used by the kernel to control the
+++   interpretation of the AUXV. Must be > 16.  */
+++#define AT_IGNOREPPC	22		/* Entry should be ignored.  */
+++
+++#define	AT_SECURE	23		/* Boolean, was exec setuid-like?  */
+++
+++#define AT_BASE_PLATFORM 24		/* String identifying real platforms.*/
+++
+++#define AT_RANDOM	25		/* Address of 16 random bytes.  */
+++
+++#define AT_EXECFN	31		/* Filename of executable.  */
+++
+++/* Pointer to the global system page used for system calls and other
+++   nice things.  */
+++#define AT_SYSINFO	32
+++#define AT_SYSINFO_EHDR	33
+++
+++/* Shapes of the caches.  Bits 0-3 contains associativity; bits 4-7 contains
+++   log2 of line size; mask those to get cache size.  */
+++#define AT_L1I_CACHESHAPE	34
+++#define AT_L1D_CACHESHAPE	35
+++#define AT_L2_CACHESHAPE	36
+++#define AT_L3_CACHESHAPE	37
+++
+++/* Note section contents.  Each entry in the note section begins with
+++   a header of a fixed form.  */
+++
+++typedef struct
+++{
+++  Elf32_Word n_namesz;			/* Length of the note's name.  */
+++  Elf32_Word n_descsz;			/* Length of the note's descriptor.  */
+++  Elf32_Word n_type;			/* Type of the note.  */
+++} Elf32_Nhdr;
+++
+++typedef struct
+++{
+++  Elf64_Word n_namesz;			/* Length of the note's name.  */
+++  Elf64_Word n_descsz;			/* Length of the note's descriptor.  */
+++  Elf64_Word n_type;			/* Type of the note.  */
+++} Elf64_Nhdr;
+++
+++/* Known names of notes.  */
+++
+++/* Solaris entries in the note section have this name.  */
+++#define ELF_NOTE_SOLARIS	"SUNW Solaris"
+++
+++/* Note entries for GNU systems have this name.  */
+++#define ELF_NOTE_GNU		"GNU"
+++
+++
+++/* Defined types of notes for Solaris.  */
+++
+++/* Value of descriptor (one word) is desired pagesize for the binary.  */
+++#define ELF_NOTE_PAGESIZE_HINT	1
+++
+++
+++/* Defined note types for GNU systems.  */
+++
+++/* ABI information.  The descriptor consists of words:
+++   word 0: OS descriptor
+++   word 1: major version of the ABI
+++   word 2: minor version of the ABI
+++   word 3: subminor version of the ABI
+++*/
+++#define NT_GNU_ABI_TAG	1
+++#define ELF_NOTE_ABI	NT_GNU_ABI_TAG /* Old name.  */
+++
+++/* Known OSes.  These values can appear in word 0 of an
+++   NT_GNU_ABI_TAG note section entry.  */
+++#define ELF_NOTE_OS_LINUX	0
+++#define ELF_NOTE_OS_GNU		1
+++#define ELF_NOTE_OS_SOLARIS2	2
+++#define ELF_NOTE_OS_FREEBSD	3
+++
+++/* Synthetic hwcap information.  The descriptor begins with two words:
+++   word 0: number of entries
+++   word 1: bitmask of enabled entries
+++   Then follow variable-length entries, one byte followed by a
+++   '\0'-terminated hwcap name string.  The byte gives the bit
+++   number to test if enabled, (1U << bit) & bitmask.  */
+++#define NT_GNU_HWCAP	2
+++
+++/* Build ID bits as generated by ld --build-id.
+++   The descriptor consists of any nonzero number of bytes.  */
+++#define NT_GNU_BUILD_ID	3
+++
+++/* Version note generated by GNU gold containing a version string.  */
+++#define NT_GNU_GOLD_VERSION	4
+++
+++
+++/* Move records.  */
+++typedef struct
+++{
+++  Elf32_Xword m_value;		/* Symbol value.  */
+++  Elf32_Word m_info;		/* Size and index.  */
+++  Elf32_Word m_poffset;		/* Symbol offset.  */
+++  Elf32_Half m_repeat;		/* Repeat count.  */
+++  Elf32_Half m_stride;		/* Stride info.  */
+++} Elf32_Move;
+++
+++typedef struct
+++{
+++  Elf64_Xword m_value;		/* Symbol value.  */
+++  Elf64_Xword m_info;		/* Size and index.  */
+++  Elf64_Xword m_poffset;	/* Symbol offset.  */
+++  Elf64_Half m_repeat;		/* Repeat count.  */
+++  Elf64_Half m_stride;		/* Stride info.  */
+++} Elf64_Move;
+++
+++/* Macro to construct move records.  */
+++#define ELF32_M_SYM(info)	((info) >> 8)
+++#define ELF32_M_SIZE(info)	((unsigned char) (info))
+++#define ELF32_M_INFO(sym, size)	(((sym) << 8) + (unsigned char) (size))
+++
+++#define ELF64_M_SYM(info)	ELF32_M_SYM (info)
+++#define ELF64_M_SIZE(info)	ELF32_M_SIZE (info)
+++#define ELF64_M_INFO(sym, size)	ELF32_M_INFO (sym, size)
+++
+++
+++/* Motorola 68k specific definitions.  */
+++
+++/* Values for Elf32_Ehdr.e_flags.  */
+++#define EF_CPU32	0x00810000
+++
+++/* m68k relocs.  */
+++
+++#define R_68K_NONE	0		/* No reloc */
+++#define R_68K_32	1		/* Direct 32 bit  */
+++#define R_68K_16	2		/* Direct 16 bit  */
+++#define R_68K_8		3		/* Direct 8 bit  */
+++#define R_68K_PC32	4		/* PC relative 32 bit */
+++#define R_68K_PC16	5		/* PC relative 16 bit */
+++#define R_68K_PC8	6		/* PC relative 8 bit */
+++#define R_68K_GOT32	7		/* 32 bit PC relative GOT entry */
+++#define R_68K_GOT16	8		/* 16 bit PC relative GOT entry */
+++#define R_68K_GOT8	9		/* 8 bit PC relative GOT entry */
+++#define R_68K_GOT32O	10		/* 32 bit GOT offset */
+++#define R_68K_GOT16O	11		/* 16 bit GOT offset */
+++#define R_68K_GOT8O	12		/* 8 bit GOT offset */
+++#define R_68K_PLT32	13		/* 32 bit PC relative PLT address */
+++#define R_68K_PLT16	14		/* 16 bit PC relative PLT address */
+++#define R_68K_PLT8	15		/* 8 bit PC relative PLT address */
+++#define R_68K_PLT32O	16		/* 32 bit PLT offset */
+++#define R_68K_PLT16O	17		/* 16 bit PLT offset */
+++#define R_68K_PLT8O	18		/* 8 bit PLT offset */
+++#define R_68K_COPY	19		/* Copy symbol at runtime */
+++#define R_68K_GLOB_DAT	20		/* Create GOT entry */
+++#define R_68K_JMP_SLOT	21		/* Create PLT entry */
+++#define R_68K_RELATIVE	22		/* Adjust by program base */
+++#define R_68K_TLS_GD32      25          /* 32 bit GOT offset for GD */
+++#define R_68K_TLS_GD16      26          /* 16 bit GOT offset for GD */
+++#define R_68K_TLS_GD8       27          /* 8 bit GOT offset for GD */
+++#define R_68K_TLS_LDM32     28          /* 32 bit GOT offset for LDM */
+++#define R_68K_TLS_LDM16     29          /* 16 bit GOT offset for LDM */
+++#define R_68K_TLS_LDM8      30          /* 8 bit GOT offset for LDM */
+++#define R_68K_TLS_LDO32     31          /* 32 bit module-relative offset */
+++#define R_68K_TLS_LDO16     32          /* 16 bit module-relative offset */
+++#define R_68K_TLS_LDO8      33          /* 8 bit module-relative offset */
+++#define R_68K_TLS_IE32      34          /* 32 bit GOT offset for IE */
+++#define R_68K_TLS_IE16      35          /* 16 bit GOT offset for IE */
+++#define R_68K_TLS_IE8       36          /* 8 bit GOT offset for IE */
+++#define R_68K_TLS_LE32      37          /* 32 bit offset relative to
+++					   static TLS block */
+++#define R_68K_TLS_LE16      38          /* 16 bit offset relative to
+++					   static TLS block */
+++#define R_68K_TLS_LE8       39          /* 8 bit offset relative to
+++					   static TLS block */
+++#define R_68K_TLS_DTPMOD32  40          /* 32 bit module number */
+++#define R_68K_TLS_DTPREL32  41          /* 32 bit module-relative offset */
+++#define R_68K_TLS_TPREL32   42          /* 32 bit TP-relative offset */
+++/* Keep this the last entry.  */
+++#define R_68K_NUM	43
+++
+++/* Intel 80386 specific definitions.  */
+++
+++/* i386 relocs.  */
+++
+++#define R_386_NONE	   0		/* No reloc */
+++#define R_386_32	   1		/* Direct 32 bit  */
+++#define R_386_PC32	   2		/* PC relative 32 bit */
+++#define R_386_GOT32	   3		/* 32 bit GOT entry */
+++#define R_386_PLT32	   4		/* 32 bit PLT address */
+++#define R_386_COPY	   5		/* Copy symbol at runtime */
+++#define R_386_GLOB_DAT	   6		/* Create GOT entry */
+++#define R_386_JMP_SLOT	   7		/* Create PLT entry */
+++#define R_386_RELATIVE	   8		/* Adjust by program base */
+++#define R_386_GOTOFF	   9		/* 32 bit offset to GOT */
+++#define R_386_GOTPC	   10		/* 32 bit PC relative offset to GOT */
+++#define R_386_32PLT	   11
+++#define R_386_TLS_TPOFF	   14		/* Offset in static TLS block */
+++#define R_386_TLS_IE	   15		/* Address of GOT entry for static TLS
+++					   block offset */
+++#define R_386_TLS_GOTIE	   16		/* GOT entry for static TLS block
+++					   offset */
+++#define R_386_TLS_LE	   17		/* Offset relative to static TLS
+++					   block */
+++#define R_386_TLS_GD	   18		/* Direct 32 bit for GNU version of
+++					   general dynamic thread local data */
+++#define R_386_TLS_LDM	   19		/* Direct 32 bit for GNU version of
+++					   local dynamic thread local data
+++					   in LE code */
+++#define R_386_16	   20
+++#define R_386_PC16	   21
+++#define R_386_8		   22
+++#define R_386_PC8	   23
+++#define R_386_TLS_GD_32	   24		/* Direct 32 bit for general dynamic
+++					   thread local data */
+++#define R_386_TLS_GD_PUSH  25		/* Tag for pushl in GD TLS code */
+++#define R_386_TLS_GD_CALL  26		/* Relocation for call to
+++					   __tls_get_addr() */
+++#define R_386_TLS_GD_POP   27		/* Tag for popl in GD TLS code */
+++#define R_386_TLS_LDM_32   28		/* Direct 32 bit for local dynamic
+++					   thread local data in LE code */
+++#define R_386_TLS_LDM_PUSH 29		/* Tag for pushl in LDM TLS code */
+++#define R_386_TLS_LDM_CALL 30		/* Relocation for call to
+++					   __tls_get_addr() in LDM code */
+++#define R_386_TLS_LDM_POP  31		/* Tag for popl in LDM TLS code */
+++#define R_386_TLS_LDO_32   32		/* Offset relative to TLS block */
+++#define R_386_TLS_IE_32	   33		/* GOT entry for negated static TLS
+++					   block offset */
+++#define R_386_TLS_LE_32	   34		/* Negated offset relative to static
+++					   TLS block */
+++#define R_386_TLS_DTPMOD32 35		/* ID of module containing symbol */
+++#define R_386_TLS_DTPOFF32 36		/* Offset in TLS block */
+++#define R_386_TLS_TPOFF32  37		/* Negated offset in static TLS block */
+++/* 38? */
+++#define R_386_TLS_GOTDESC  39		/* GOT offset for TLS descriptor.  */
+++#define R_386_TLS_DESC_CALL 40		/* Marker of call through TLS
+++					   descriptor for
+++					   relaxation.  */
+++#define R_386_TLS_DESC     41		/* TLS descriptor containing
+++					   pointer to code and to
+++					   argument, returning the TLS
+++					   offset for the symbol.  */
+++#define R_386_IRELATIVE	   42		/* Adjust indirectly by program base */
+++/* Keep this the last entry.  */
+++#define R_386_NUM	   43
+++
+++/* SUN SPARC specific definitions.  */
+++
+++/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
+++
+++#define STT_SPARC_REGISTER	13	/* Global register reserved to app. */
+++
+++/* Values for Elf64_Ehdr.e_flags.  */
+++
+++#define EF_SPARCV9_MM		3
+++#define EF_SPARCV9_TSO		0
+++#define EF_SPARCV9_PSO		1
+++#define EF_SPARCV9_RMO		2
+++#define EF_SPARC_LEDATA		0x800000 /* little endian data */
+++#define EF_SPARC_EXT_MASK	0xFFFF00
+++#define EF_SPARC_32PLUS		0x000100 /* generic V8+ features */
+++#define EF_SPARC_SUN_US1	0x000200 /* Sun UltraSPARC1 extensions */
+++#define EF_SPARC_HAL_R1		0x000400 /* HAL R1 extensions */
+++#define EF_SPARC_SUN_US3	0x000800 /* Sun UltraSPARCIII extensions */
+++
+++/* SPARC relocs.  */
+++
+++#define R_SPARC_NONE		0	/* No reloc */
+++#define R_SPARC_8		1	/* Direct 8 bit */
+++#define R_SPARC_16		2	/* Direct 16 bit */
+++#define R_SPARC_32		3	/* Direct 32 bit */
+++#define R_SPARC_DISP8		4	/* PC relative 8 bit */
+++#define R_SPARC_DISP16		5	/* PC relative 16 bit */
+++#define R_SPARC_DISP32		6	/* PC relative 32 bit */
+++#define R_SPARC_WDISP30		7	/* PC relative 30 bit shifted */
+++#define R_SPARC_WDISP22		8	/* PC relative 22 bit shifted */
+++#define R_SPARC_HI22		9	/* High 22 bit */
+++#define R_SPARC_22		10	/* Direct 22 bit */
+++#define R_SPARC_13		11	/* Direct 13 bit */
+++#define R_SPARC_LO10		12	/* Truncated 10 bit */
+++#define R_SPARC_GOT10		13	/* Truncated 10 bit GOT entry */
+++#define R_SPARC_GOT13		14	/* 13 bit GOT entry */
+++#define R_SPARC_GOT22		15	/* 22 bit GOT entry shifted */
+++#define R_SPARC_PC10		16	/* PC relative 10 bit truncated */
+++#define R_SPARC_PC22		17	/* PC relative 22 bit shifted */
+++#define R_SPARC_WPLT30		18	/* 30 bit PC relative PLT address */
+++#define R_SPARC_COPY		19	/* Copy symbol at runtime */
+++#define R_SPARC_GLOB_DAT	20	/* Create GOT entry */
+++#define R_SPARC_JMP_SLOT	21	/* Create PLT entry */
+++#define R_SPARC_RELATIVE	22	/* Adjust by program base */
+++#define R_SPARC_UA32		23	/* Direct 32 bit unaligned */
+++
+++/* Additional Sparc64 relocs.  */
+++
+++#define R_SPARC_PLT32		24	/* Direct 32 bit ref to PLT entry */
+++#define R_SPARC_HIPLT22		25	/* High 22 bit PLT entry */
+++#define R_SPARC_LOPLT10		26	/* Truncated 10 bit PLT entry */
+++#define R_SPARC_PCPLT32		27	/* PC rel 32 bit ref to PLT entry */
+++#define R_SPARC_PCPLT22		28	/* PC rel high 22 bit PLT entry */
+++#define R_SPARC_PCPLT10		29	/* PC rel trunc 10 bit PLT entry */
+++#define R_SPARC_10		30	/* Direct 10 bit */
+++#define R_SPARC_11		31	/* Direct 11 bit */
+++#define R_SPARC_64		32	/* Direct 64 bit */
+++#define R_SPARC_OLO10		33	/* 10bit with secondary 13bit addend */
+++#define R_SPARC_HH22		34	/* Top 22 bits of direct 64 bit */
+++#define R_SPARC_HM10		35	/* High middle 10 bits of ... */
+++#define R_SPARC_LM22		36	/* Low middle 22 bits of ... */
+++#define R_SPARC_PC_HH22		37	/* Top 22 bits of pc rel 64 bit */
+++#define R_SPARC_PC_HM10		38	/* High middle 10 bit of ... */
+++#define R_SPARC_PC_LM22		39	/* Low miggle 22 bits of ... */
+++#define R_SPARC_WDISP16		40	/* PC relative 16 bit shifted */
+++#define R_SPARC_WDISP19		41	/* PC relative 19 bit shifted */
+++#define R_SPARC_GLOB_JMP	42	/* was part of v9 ABI but was removed */
+++#define R_SPARC_7		43	/* Direct 7 bit */
+++#define R_SPARC_5		44	/* Direct 5 bit */
+++#define R_SPARC_6		45	/* Direct 6 bit */
+++#define R_SPARC_DISP64		46	/* PC relative 64 bit */
+++#define R_SPARC_PLT64		47	/* Direct 64 bit ref to PLT entry */
+++#define R_SPARC_HIX22		48	/* High 22 bit complemented */
+++#define R_SPARC_LOX10		49	/* Truncated 11 bit complemented */
+++#define R_SPARC_H44		50	/* Direct high 12 of 44 bit */
+++#define R_SPARC_M44		51	/* Direct mid 22 of 44 bit */
+++#define R_SPARC_L44		52	/* Direct low 10 of 44 bit */
+++#define R_SPARC_REGISTER	53	/* Global register usage */
+++#define R_SPARC_UA64		54	/* Direct 64 bit unaligned */
+++#define R_SPARC_UA16		55	/* Direct 16 bit unaligned */
+++#define R_SPARC_TLS_GD_HI22	56
+++#define R_SPARC_TLS_GD_LO10	57
+++#define R_SPARC_TLS_GD_ADD	58
+++#define R_SPARC_TLS_GD_CALL	59
+++#define R_SPARC_TLS_LDM_HI22	60
+++#define R_SPARC_TLS_LDM_LO10	61
+++#define R_SPARC_TLS_LDM_ADD	62
+++#define R_SPARC_TLS_LDM_CALL	63
+++#define R_SPARC_TLS_LDO_HIX22	64
+++#define R_SPARC_TLS_LDO_LOX10	65
+++#define R_SPARC_TLS_LDO_ADD	66
+++#define R_SPARC_TLS_IE_HI22	67
+++#define R_SPARC_TLS_IE_LO10	68
+++#define R_SPARC_TLS_IE_LD	69
+++#define R_SPARC_TLS_IE_LDX	70
+++#define R_SPARC_TLS_IE_ADD	71
+++#define R_SPARC_TLS_LE_HIX22	72
+++#define R_SPARC_TLS_LE_LOX10	73
+++#define R_SPARC_TLS_DTPMOD32	74
+++#define R_SPARC_TLS_DTPMOD64	75
+++#define R_SPARC_TLS_DTPOFF32	76
+++#define R_SPARC_TLS_DTPOFF64	77
+++#define R_SPARC_TLS_TPOFF32	78
+++#define R_SPARC_TLS_TPOFF64	79
+++#define R_SPARC_GOTDATA_HIX22	80
+++#define R_SPARC_GOTDATA_LOX10	81
+++#define R_SPARC_GOTDATA_OP_HIX22	82
+++#define R_SPARC_GOTDATA_OP_LOX10	83
+++#define R_SPARC_GOTDATA_OP	84
+++#define R_SPARC_H34		85
+++#define R_SPARC_SIZE32		86
+++#define R_SPARC_SIZE64		87
+++#define R_SPARC_WDISP10		88
+++#define R_SPARC_JMP_IREL	248
+++#define R_SPARC_IRELATIVE	249
+++#define R_SPARC_GNU_VTINHERIT	250
+++#define R_SPARC_GNU_VTENTRY	251
+++#define R_SPARC_REV32		252
+++/* Keep this the last entry.  */
+++#define R_SPARC_NUM		253
+++
+++/* For Sparc64, legal values for d_tag of Elf64_Dyn.  */
+++
+++#define DT_SPARC_REGISTER 0x70000001
+++#define DT_SPARC_NUM	2
+++
+++/* MIPS R3000 specific definitions.  */
+++
+++/* Legal values for e_flags field of Elf32_Ehdr.  */
+++
+++#define EF_MIPS_NOREORDER   1		/* A .noreorder directive was used */
+++#define EF_MIPS_PIC	    2		/* Contains PIC code */
+++#define EF_MIPS_CPIC	    4		/* Uses PIC calling sequence */
+++#define EF_MIPS_XGOT	    8
+++#define EF_MIPS_64BIT_WHIRL 16
+++#define EF_MIPS_ABI2	    32
+++#define EF_MIPS_ABI_ON32    64
+++#define EF_MIPS_ARCH	    0xf0000000	/* MIPS architecture level */
+++
+++/* Legal values for MIPS architecture level.  */
+++
+++#define EF_MIPS_ARCH_1	    0x00000000	/* -mips1 code.  */
+++#define EF_MIPS_ARCH_2	    0x10000000	/* -mips2 code.  */
+++#define EF_MIPS_ARCH_3	    0x20000000	/* -mips3 code.  */
+++#define EF_MIPS_ARCH_4	    0x30000000	/* -mips4 code.  */
+++#define EF_MIPS_ARCH_5	    0x40000000	/* -mips5 code.  */
+++#define EF_MIPS_ARCH_32	    0x60000000	/* MIPS32 code.  */
+++#define EF_MIPS_ARCH_64	    0x70000000	/* MIPS64 code.  */
+++
+++/* The following are non-official names and should not be used.  */
+++
+++#define E_MIPS_ARCH_1	  0x00000000	/* -mips1 code.  */
+++#define E_MIPS_ARCH_2	  0x10000000	/* -mips2 code.  */
+++#define E_MIPS_ARCH_3	  0x20000000	/* -mips3 code.  */
+++#define E_MIPS_ARCH_4	  0x30000000	/* -mips4 code.  */
+++#define E_MIPS_ARCH_5	  0x40000000	/* -mips5 code.  */
+++#define E_MIPS_ARCH_32	  0x60000000	/* MIPS32 code.  */
+++#define E_MIPS_ARCH_64	  0x70000000	/* MIPS64 code.  */
+++
+++/* Special section indices.  */
+++
+++#define SHN_MIPS_ACOMMON    0xff00	/* Allocated common symbols */
+++#define SHN_MIPS_TEXT	    0xff01	/* Allocated test symbols.  */
+++#define SHN_MIPS_DATA	    0xff02	/* Allocated data symbols.  */
+++#define SHN_MIPS_SCOMMON    0xff03	/* Small common symbols */
+++#define SHN_MIPS_SUNDEFINED 0xff04	/* Small undefined symbols */
+++
+++/* Legal values for sh_type field of Elf32_Shdr.  */
+++
+++#define SHT_MIPS_LIBLIST       0x70000000 /* Shared objects used in link */
+++#define SHT_MIPS_MSYM	       0x70000001
+++#define SHT_MIPS_CONFLICT      0x70000002 /* Conflicting symbols */
+++#define SHT_MIPS_GPTAB	       0x70000003 /* Global data area sizes */
+++#define SHT_MIPS_UCODE	       0x70000004 /* Reserved for SGI/MIPS compilers */
+++#define SHT_MIPS_DEBUG	       0x70000005 /* MIPS ECOFF debugging information*/
+++#define SHT_MIPS_REGINFO       0x70000006 /* Register usage information */
+++#define SHT_MIPS_PACKAGE       0x70000007
+++#define SHT_MIPS_PACKSYM       0x70000008
+++#define SHT_MIPS_RELD	       0x70000009
+++#define SHT_MIPS_IFACE         0x7000000b
+++#define SHT_MIPS_CONTENT       0x7000000c
+++#define SHT_MIPS_OPTIONS       0x7000000d /* Miscellaneous options.  */
+++#define SHT_MIPS_SHDR	       0x70000010
+++#define SHT_MIPS_FDESC	       0x70000011
+++#define SHT_MIPS_EXTSYM	       0x70000012
+++#define SHT_MIPS_DENSE	       0x70000013
+++#define SHT_MIPS_PDESC	       0x70000014
+++#define SHT_MIPS_LOCSYM	       0x70000015
+++#define SHT_MIPS_AUXSYM	       0x70000016
+++#define SHT_MIPS_OPTSYM	       0x70000017
+++#define SHT_MIPS_LOCSTR	       0x70000018
+++#define SHT_MIPS_LINE	       0x70000019
+++#define SHT_MIPS_RFDESC	       0x7000001a
+++#define SHT_MIPS_DELTASYM      0x7000001b
+++#define SHT_MIPS_DELTAINST     0x7000001c
+++#define SHT_MIPS_DELTACLASS    0x7000001d
+++#define SHT_MIPS_DWARF         0x7000001e /* DWARF debugging information.  */
+++#define SHT_MIPS_DELTADECL     0x7000001f
+++#define SHT_MIPS_SYMBOL_LIB    0x70000020
+++#define SHT_MIPS_EVENTS	       0x70000021 /* Event section.  */
+++#define SHT_MIPS_TRANSLATE     0x70000022
+++#define SHT_MIPS_PIXIE	       0x70000023
+++#define SHT_MIPS_XLATE	       0x70000024
+++#define SHT_MIPS_XLATE_DEBUG   0x70000025
+++#define SHT_MIPS_WHIRL	       0x70000026
+++#define SHT_MIPS_EH_REGION     0x70000027
+++#define SHT_MIPS_XLATE_OLD     0x70000028
+++#define SHT_MIPS_PDR_EXCEPTION 0x70000029
+++
+++/* Legal values for sh_flags field of Elf32_Shdr.  */
+++
+++#define SHF_MIPS_GPREL	 0x10000000	/* Must be part of global data area */
+++#define SHF_MIPS_MERGE	 0x20000000
+++#define SHF_MIPS_ADDR	 0x40000000
+++#define SHF_MIPS_STRINGS 0x80000000
+++#define SHF_MIPS_NOSTRIP 0x08000000
+++#define SHF_MIPS_LOCAL	 0x04000000
+++#define SHF_MIPS_NAMES	 0x02000000
+++#define SHF_MIPS_NODUPE	 0x01000000
+++
+++
+++/* Symbol tables.  */
+++
+++/* MIPS specific values for `st_other'.  */
+++#define STO_MIPS_DEFAULT		0x0
+++#define STO_MIPS_INTERNAL		0x1
+++#define STO_MIPS_HIDDEN			0x2
+++#define STO_MIPS_PROTECTED		0x3
+++#define STO_MIPS_PLT			0x8
+++#define STO_MIPS_SC_ALIGN_UNUSED	0xff
+++
+++/* MIPS specific values for `st_info'.  */
+++#define STB_MIPS_SPLIT_COMMON		13
+++
+++/* Entries found in sections of type SHT_MIPS_GPTAB.  */
+++
+++typedef union
+++{
+++  struct
+++    {
+++      Elf32_Word gt_current_g_value;	/* -G value used for compilation */
+++      Elf32_Word gt_unused;		/* Not used */
+++    } gt_header;			/* First entry in section */
+++  struct
+++    {
+++      Elf32_Word gt_g_value;		/* If this value were used for -G */
+++      Elf32_Word gt_bytes;		/* This many bytes would be used */
+++    } gt_entry;				/* Subsequent entries in section */
+++} Elf32_gptab;
+++
+++/* Entry found in sections of type SHT_MIPS_REGINFO.  */
+++
+++typedef struct
+++{
+++  Elf32_Word	ri_gprmask;		/* General registers used */
+++  Elf32_Word	ri_cprmask[4];		/* Coprocessor registers used */
+++  Elf32_Sword	ri_gp_value;		/* $gp register value */
+++} Elf32_RegInfo;
+++
+++/* Entries found in sections of type SHT_MIPS_OPTIONS.  */
+++
+++typedef struct
+++{
+++  unsigned char kind;		/* Determines interpretation of the
+++				   variable part of descriptor.  */
+++  unsigned char size;		/* Size of descriptor, including header.  */
+++  Elf32_Section section;	/* Section header index of section affected,
+++				   0 for global options.  */
+++  Elf32_Word info;		/* Kind-specific information.  */
+++} Elf_Options;
+++
+++/* Values for `kind' field in Elf_Options.  */
+++
+++#define ODK_NULL	0	/* Undefined.  */
+++#define ODK_REGINFO	1	/* Register usage information.  */
+++#define ODK_EXCEPTIONS	2	/* Exception processing options.  */
+++#define ODK_PAD		3	/* Section padding options.  */
+++#define ODK_HWPATCH	4	/* Hardware workarounds performed */
+++#define ODK_FILL	5	/* record the fill value used by the linker. */
+++#define ODK_TAGS	6	/* reserve space for desktop tools to write. */
+++#define ODK_HWAND	7	/* HW workarounds.  'AND' bits when merging. */
+++#define ODK_HWOR	8	/* HW workarounds.  'OR' bits when merging.  */
+++
+++/* Values for `info' in Elf_Options for ODK_EXCEPTIONS entries.  */
+++
+++#define OEX_FPU_MIN	0x1f	/* FPE's which MUST be enabled.  */
+++#define OEX_FPU_MAX	0x1f00	/* FPE's which MAY be enabled.  */
+++#define OEX_PAGE0	0x10000	/* page zero must be mapped.  */
+++#define OEX_SMM		0x20000	/* Force sequential memory mode?  */
+++#define OEX_FPDBUG	0x40000	/* Force floating point debug mode?  */
+++#define OEX_PRECISEFP	OEX_FPDBUG
+++#define OEX_DISMISS	0x80000	/* Dismiss invalid address faults?  */
+++
+++#define OEX_FPU_INVAL	0x10
+++#define OEX_FPU_DIV0	0x08
+++#define OEX_FPU_OFLO	0x04
+++#define OEX_FPU_UFLO	0x02
+++#define OEX_FPU_INEX	0x01
+++
+++/* Masks for `info' in Elf_Options for an ODK_HWPATCH entry.  */
+++
+++#define OHW_R4KEOP	0x1	/* R4000 end-of-page patch.  */
+++#define OHW_R8KPFETCH	0x2	/* may need R8000 prefetch patch.  */
+++#define OHW_R5KEOP	0x4	/* R5000 end-of-page patch.  */
+++#define OHW_R5KCVTL	0x8	/* R5000 cvt.[ds].l bug.  clean=1.  */
+++
+++#define OPAD_PREFIX	0x1
+++#define OPAD_POSTFIX	0x2
+++#define OPAD_SYMBOL	0x4
+++
+++/* Entry found in `.options' section.  */
+++
+++typedef struct
+++{
+++  Elf32_Word hwp_flags1;	/* Extra flags.  */
+++  Elf32_Word hwp_flags2;	/* Extra flags.  */
+++} Elf_Options_Hw;
+++
+++/* Masks for `info' in ElfOptions for ODK_HWAND and ODK_HWOR entries.  */
+++
+++#define OHWA0_R4KEOP_CHECKED	0x00000001
+++#define OHWA1_R4KEOP_CLEAN	0x00000002
+++
+++/* MIPS relocs.  */
+++
+++#define R_MIPS_NONE		0	/* No reloc */
+++#define R_MIPS_16		1	/* Direct 16 bit */
+++#define R_MIPS_32		2	/* Direct 32 bit */
+++#define R_MIPS_REL32		3	/* PC relative 32 bit */
+++#define R_MIPS_26		4	/* Direct 26 bit shifted */
+++#define R_MIPS_HI16		5	/* High 16 bit */
+++#define R_MIPS_LO16		6	/* Low 16 bit */
+++#define R_MIPS_GPREL16		7	/* GP relative 16 bit */
+++#define R_MIPS_LITERAL		8	/* 16 bit literal entry */
+++#define R_MIPS_GOT16		9	/* 16 bit GOT entry */
+++#define R_MIPS_PC16		10	/* PC relative 16 bit */
+++#define R_MIPS_CALL16		11	/* 16 bit GOT entry for function */
+++#define R_MIPS_GPREL32		12	/* GP relative 32 bit */
+++
+++#define R_MIPS_SHIFT5		16
+++#define R_MIPS_SHIFT6		17
+++#define R_MIPS_64		18
+++#define R_MIPS_GOT_DISP		19
+++#define R_MIPS_GOT_PAGE		20
+++#define R_MIPS_GOT_OFST		21
+++#define R_MIPS_GOT_HI16		22
+++#define R_MIPS_GOT_LO16		23
+++#define R_MIPS_SUB		24
+++#define R_MIPS_INSERT_A		25
+++#define R_MIPS_INSERT_B		26
+++#define R_MIPS_DELETE		27
+++#define R_MIPS_HIGHER		28
+++#define R_MIPS_HIGHEST		29
+++#define R_MIPS_CALL_HI16	30
+++#define R_MIPS_CALL_LO16	31
+++#define R_MIPS_SCN_DISP		32
+++#define R_MIPS_REL16		33
+++#define R_MIPS_ADD_IMMEDIATE	34
+++#define R_MIPS_PJUMP		35
+++#define R_MIPS_RELGOT		36
+++#define R_MIPS_JALR		37
+++#define R_MIPS_TLS_DTPMOD32	38	/* Module number 32 bit */
+++#define R_MIPS_TLS_DTPREL32	39	/* Module-relative offset 32 bit */
+++#define R_MIPS_TLS_DTPMOD64	40	/* Module number 64 bit */
+++#define R_MIPS_TLS_DTPREL64	41	/* Module-relative offset 64 bit */
+++#define R_MIPS_TLS_GD		42	/* 16 bit GOT offset for GD */
+++#define R_MIPS_TLS_LDM		43	/* 16 bit GOT offset for LDM */
+++#define R_MIPS_TLS_DTPREL_HI16	44	/* Module-relative offset, high 16 bits */
+++#define R_MIPS_TLS_DTPREL_LO16	45	/* Module-relative offset, low 16 bits */
+++#define R_MIPS_TLS_GOTTPREL	46	/* 16 bit GOT offset for IE */
+++#define R_MIPS_TLS_TPREL32	47	/* TP-relative offset, 32 bit */
+++#define R_MIPS_TLS_TPREL64	48	/* TP-relative offset, 64 bit */
+++#define R_MIPS_TLS_TPREL_HI16	49	/* TP-relative offset, high 16 bits */
+++#define R_MIPS_TLS_TPREL_LO16	50	/* TP-relative offset, low 16 bits */
+++#define R_MIPS_GLOB_DAT		51
+++#define R_MIPS_COPY		126
+++#define R_MIPS_JUMP_SLOT        127
+++/* Keep this the last entry.  */
+++#define R_MIPS_NUM		128
+++
+++/* Legal values for p_type field of Elf32_Phdr.  */
+++
+++#define PT_MIPS_REGINFO	0x70000000	/* Register usage information */
+++#define PT_MIPS_RTPROC  0x70000001	/* Runtime procedure table. */
+++#define PT_MIPS_OPTIONS 0x70000002
+++
+++/* Special program header types.  */
+++
+++#define PF_MIPS_LOCAL	0x10000000
+++
+++/* Legal values for d_tag field of Elf32_Dyn.  */
+++
+++#define DT_MIPS_RLD_VERSION  0x70000001	/* Runtime linker interface version */
+++#define DT_MIPS_TIME_STAMP   0x70000002	/* Timestamp */
+++#define DT_MIPS_ICHECKSUM    0x70000003	/* Checksum */
+++#define DT_MIPS_IVERSION     0x70000004	/* Version string (string tbl index) */
+++#define DT_MIPS_FLAGS	     0x70000005	/* Flags */
+++#define DT_MIPS_BASE_ADDRESS 0x70000006	/* Base address */
+++#define DT_MIPS_MSYM	     0x70000007
+++#define DT_MIPS_CONFLICT     0x70000008	/* Address of CONFLICT section */
+++#define DT_MIPS_LIBLIST	     0x70000009	/* Address of LIBLIST section */
+++#define DT_MIPS_LOCAL_GOTNO  0x7000000a	/* Number of local GOT entries */
+++#define DT_MIPS_CONFLICTNO   0x7000000b	/* Number of CONFLICT entries */
+++#define DT_MIPS_LIBLISTNO    0x70000010	/* Number of LIBLIST entries */
+++#define DT_MIPS_SYMTABNO     0x70000011	/* Number of DYNSYM entries */
+++#define DT_MIPS_UNREFEXTNO   0x70000012	/* First external DYNSYM */
+++#define DT_MIPS_GOTSYM	     0x70000013	/* First GOT entry in DYNSYM */
+++#define DT_MIPS_HIPAGENO     0x70000014	/* Number of GOT page table entries */
+++#define DT_MIPS_RLD_MAP	     0x70000016	/* Address of run time loader map.  */
+++#define DT_MIPS_DELTA_CLASS  0x70000017	/* Delta C++ class definition.  */
+++#define DT_MIPS_DELTA_CLASS_NO    0x70000018 /* Number of entries in
+++						DT_MIPS_DELTA_CLASS.  */
+++#define DT_MIPS_DELTA_INSTANCE    0x70000019 /* Delta C++ class instances.  */
+++#define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a /* Number of entries in
+++						DT_MIPS_DELTA_INSTANCE.  */
+++#define DT_MIPS_DELTA_RELOC  0x7000001b /* Delta relocations.  */
+++#define DT_MIPS_DELTA_RELOC_NO 0x7000001c /* Number of entries in
+++					     DT_MIPS_DELTA_RELOC.  */
+++#define DT_MIPS_DELTA_SYM    0x7000001d /* Delta symbols that Delta
+++					   relocations refer to.  */
+++#define DT_MIPS_DELTA_SYM_NO 0x7000001e /* Number of entries in
+++					   DT_MIPS_DELTA_SYM.  */
+++#define DT_MIPS_DELTA_CLASSSYM 0x70000020 /* Delta symbols that hold the
+++					     class declaration.  */
+++#define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021 /* Number of entries in
+++						DT_MIPS_DELTA_CLASSSYM.  */
+++#define DT_MIPS_CXX_FLAGS    0x70000022 /* Flags indicating for C++ flavor.  */
+++#define DT_MIPS_PIXIE_INIT   0x70000023
+++#define DT_MIPS_SYMBOL_LIB   0x70000024
+++#define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025
+++#define DT_MIPS_LOCAL_GOTIDX 0x70000026
+++#define DT_MIPS_HIDDEN_GOTIDX 0x70000027
+++#define DT_MIPS_PROTECTED_GOTIDX 0x70000028
+++#define DT_MIPS_OPTIONS	     0x70000029 /* Address of .options.  */
+++#define DT_MIPS_INTERFACE    0x7000002a /* Address of .interface.  */
+++#define DT_MIPS_DYNSTR_ALIGN 0x7000002b
+++#define DT_MIPS_INTERFACE_SIZE 0x7000002c /* Size of the .interface section. */
+++#define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d /* Address of rld_text_rsolve
+++						    function stored in GOT.  */
+++#define DT_MIPS_PERF_SUFFIX  0x7000002e /* Default suffix of dso to be added
+++					   by rld on dlopen() calls.  */
+++#define DT_MIPS_COMPACT_SIZE 0x7000002f /* (O32)Size of compact rel section. */
+++#define DT_MIPS_GP_VALUE     0x70000030 /* GP value for aux GOTs.  */
+++#define DT_MIPS_AUX_DYNAMIC  0x70000031 /* Address of aux .dynamic.  */
+++/* The address of .got.plt in an executable using the new non-PIC ABI.  */
+++#define DT_MIPS_PLTGOT	     0x70000032
+++/* The base of the PLT in an executable using the new non-PIC ABI if that
+++   PLT is writable.  For a non-writable PLT, this is omitted or has a zero
+++   value.  */
+++#define DT_MIPS_RWPLT        0x70000034
+++#define DT_MIPS_NUM	     0x35
+++
+++/* Legal values for DT_MIPS_FLAGS Elf32_Dyn entry.  */
+++
+++#define RHF_NONE		   0		/* No flags */
+++#define RHF_QUICKSTART		   (1 << 0)	/* Use quickstart */
+++#define RHF_NOTPOT		   (1 << 1)	/* Hash size not power of 2 */
+++#define RHF_NO_LIBRARY_REPLACEMENT (1 << 2)	/* Ignore LD_LIBRARY_PATH */
+++#define RHF_NO_MOVE		   (1 << 3)
+++#define RHF_SGI_ONLY		   (1 << 4)
+++#define RHF_GUARANTEE_INIT	   (1 << 5)
+++#define RHF_DELTA_C_PLUS_PLUS	   (1 << 6)
+++#define RHF_GUARANTEE_START_INIT   (1 << 7)
+++#define RHF_PIXIE		   (1 << 8)
+++#define RHF_DEFAULT_DELAY_LOAD	   (1 << 9)
+++#define RHF_REQUICKSTART	   (1 << 10)
+++#define RHF_REQUICKSTARTED	   (1 << 11)
+++#define RHF_CORD		   (1 << 12)
+++#define RHF_NO_UNRES_UNDEF	   (1 << 13)
+++#define RHF_RLD_ORDER_SAFE	   (1 << 14)
+++
+++/* Entries found in sections of type SHT_MIPS_LIBLIST.  */
+++
+++typedef struct
+++{
+++  Elf32_Word l_name;		/* Name (string table index) */
+++  Elf32_Word l_time_stamp;	/* Timestamp */
+++  Elf32_Word l_checksum;	/* Checksum */
+++  Elf32_Word l_version;		/* Interface version */
+++  Elf32_Word l_flags;		/* Flags */
+++} Elf32_Lib;
+++
+++typedef struct
+++{
+++  Elf64_Word l_name;		/* Name (string table index) */
+++  Elf64_Word l_time_stamp;	/* Timestamp */
+++  Elf64_Word l_checksum;	/* Checksum */
+++  Elf64_Word l_version;		/* Interface version */
+++  Elf64_Word l_flags;		/* Flags */
+++} Elf64_Lib;
+++
+++
+++/* Legal values for l_flags.  */
+++
+++#define LL_NONE		  0
+++#define LL_EXACT_MATCH	  (1 << 0)	/* Require exact match */
+++#define LL_IGNORE_INT_VER (1 << 1)	/* Ignore interface version */
+++#define LL_REQUIRE_MINOR  (1 << 2)
+++#define LL_EXPORTS	  (1 << 3)
+++#define LL_DELAY_LOAD	  (1 << 4)
+++#define LL_DELTA	  (1 << 5)
+++
+++/* Entries found in sections of type SHT_MIPS_CONFLICT.  */
+++
+++typedef Elf32_Addr Elf32_Conflict;
+++
+++
+++/* HPPA specific definitions.  */
+++
+++/* Legal values for e_flags field of Elf32_Ehdr.  */
+++
+++#define EF_PARISC_TRAPNIL	0x00010000 /* Trap nil pointer dereference.  */
+++#define EF_PARISC_EXT		0x00020000 /* Program uses arch. extensions. */
+++#define EF_PARISC_LSB		0x00040000 /* Program expects little endian. */
+++#define EF_PARISC_WIDE		0x00080000 /* Program expects wide mode.  */
+++#define EF_PARISC_NO_KABP	0x00100000 /* No kernel assisted branch
+++					      prediction.  */
+++#define EF_PARISC_LAZYSWAP	0x00400000 /* Allow lazy swapping.  */
+++#define EF_PARISC_ARCH		0x0000ffff /* Architecture version.  */
+++
+++/* Defined values for `e_flags & EF_PARISC_ARCH' are:  */
+++
+++#define EFA_PARISC_1_0		    0x020b /* PA-RISC 1.0 big-endian.  */
+++#define EFA_PARISC_1_1		    0x0210 /* PA-RISC 1.1 big-endian.  */
+++#define EFA_PARISC_2_0		    0x0214 /* PA-RISC 2.0 big-endian.  */
+++
+++/* Additional section indeces.  */
+++
+++#define SHN_PARISC_ANSI_COMMON	0xff00	   /* Section for tenatively declared
+++					      symbols in ANSI C.  */
+++#define SHN_PARISC_HUGE_COMMON	0xff01	   /* Common blocks in huge model.  */
+++
+++/* Legal values for sh_type field of Elf32_Shdr.  */
+++
+++#define SHT_PARISC_EXT		0x70000000 /* Contains product specific ext. */
+++#define SHT_PARISC_UNWIND	0x70000001 /* Unwind information.  */
+++#define SHT_PARISC_DOC		0x70000002 /* Debug info for optimized code. */
+++
+++/* Legal values for sh_flags field of Elf32_Shdr.  */
+++
+++#define SHF_PARISC_SHORT	0x20000000 /* Section with short addressing. */
+++#define SHF_PARISC_HUGE		0x40000000 /* Section far from gp.  */
+++#define SHF_PARISC_SBP		0x80000000 /* Static branch prediction code. */
+++
+++/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
+++
+++#define STT_PARISC_MILLICODE	13	/* Millicode function entry point.  */
+++
+++#define STT_HP_OPAQUE		(STT_LOOS + 0x1)
+++#define STT_HP_STUB		(STT_LOOS + 0x2)
+++
+++/* HPPA relocs.  */
+++
+++#define R_PARISC_NONE		0	/* No reloc.  */
+++#define R_PARISC_DIR32		1	/* Direct 32-bit reference.  */
+++#define R_PARISC_DIR21L		2	/* Left 21 bits of eff. address.  */
+++#define R_PARISC_DIR17R		3	/* Right 17 bits of eff. address.  */
+++#define R_PARISC_DIR17F		4	/* 17 bits of eff. address.  */
+++#define R_PARISC_DIR14R		6	/* Right 14 bits of eff. address.  */
+++#define R_PARISC_PCREL32	9	/* 32-bit rel. address.  */
+++#define R_PARISC_PCREL21L	10	/* Left 21 bits of rel. address.  */
+++#define R_PARISC_PCREL17R	11	/* Right 17 bits of rel. address.  */
+++#define R_PARISC_PCREL17F	12	/* 17 bits of rel. address.  */
+++#define R_PARISC_PCREL14R	14	/* Right 14 bits of rel. address.  */
+++#define R_PARISC_DPREL21L	18	/* Left 21 bits of rel. address.  */
+++#define R_PARISC_DPREL14R	22	/* Right 14 bits of rel. address.  */
+++#define R_PARISC_GPREL21L	26	/* GP-relative, left 21 bits.  */
+++#define R_PARISC_GPREL14R	30	/* GP-relative, right 14 bits.  */
+++#define R_PARISC_LTOFF21L	34	/* LT-relative, left 21 bits.  */
+++#define R_PARISC_LTOFF14R	38	/* LT-relative, right 14 bits.  */
+++#define R_PARISC_SECREL32	41	/* 32 bits section rel. address.  */
+++#define R_PARISC_SEGBASE	48	/* No relocation, set segment base.  */
+++#define R_PARISC_SEGREL32	49	/* 32 bits segment rel. address.  */
+++#define R_PARISC_PLTOFF21L	50	/* PLT rel. address, left 21 bits.  */
+++#define R_PARISC_PLTOFF14R	54	/* PLT rel. address, right 14 bits.  */
+++#define R_PARISC_LTOFF_FPTR32	57	/* 32 bits LT-rel. function pointer. */
+++#define R_PARISC_LTOFF_FPTR21L	58	/* LT-rel. fct ptr, left 21 bits. */
+++#define R_PARISC_LTOFF_FPTR14R	62	/* LT-rel. fct ptr, right 14 bits. */
+++#define R_PARISC_FPTR64		64	/* 64 bits function address.  */
+++#define R_PARISC_PLABEL32	65	/* 32 bits function address.  */
+++#define R_PARISC_PLABEL21L	66	/* Left 21 bits of fdesc address.  */
+++#define R_PARISC_PLABEL14R	70	/* Right 14 bits of fdesc address.  */
+++#define R_PARISC_PCREL64	72	/* 64 bits PC-rel. address.  */
+++#define R_PARISC_PCREL22F	74	/* 22 bits PC-rel. address.  */
+++#define R_PARISC_PCREL14WR	75	/* PC-rel. address, right 14 bits.  */
+++#define R_PARISC_PCREL14DR	76	/* PC rel. address, right 14 bits.  */
+++#define R_PARISC_PCREL16F	77	/* 16 bits PC-rel. address.  */
+++#define R_PARISC_PCREL16WF	78	/* 16 bits PC-rel. address.  */
+++#define R_PARISC_PCREL16DF	79	/* 16 bits PC-rel. address.  */
+++#define R_PARISC_DIR64		80	/* 64 bits of eff. address.  */
+++#define R_PARISC_DIR14WR	83	/* 14 bits of eff. address.  */
+++#define R_PARISC_DIR14DR	84	/* 14 bits of eff. address.  */
+++#define R_PARISC_DIR16F		85	/* 16 bits of eff. address.  */
+++#define R_PARISC_DIR16WF	86	/* 16 bits of eff. address.  */
+++#define R_PARISC_DIR16DF	87	/* 16 bits of eff. address.  */
+++#define R_PARISC_GPREL64	88	/* 64 bits of GP-rel. address.  */
+++#define R_PARISC_GPREL14WR	91	/* GP-rel. address, right 14 bits.  */
+++#define R_PARISC_GPREL14DR	92	/* GP-rel. address, right 14 bits.  */
+++#define R_PARISC_GPREL16F	93	/* 16 bits GP-rel. address.  */
+++#define R_PARISC_GPREL16WF	94	/* 16 bits GP-rel. address.  */
+++#define R_PARISC_GPREL16DF	95	/* 16 bits GP-rel. address.  */
+++#define R_PARISC_LTOFF64	96	/* 64 bits LT-rel. address.  */
+++#define R_PARISC_LTOFF14WR	99	/* LT-rel. address, right 14 bits.  */
+++#define R_PARISC_LTOFF14DR	100	/* LT-rel. address, right 14 bits.  */
+++#define R_PARISC_LTOFF16F	101	/* 16 bits LT-rel. address.  */
+++#define R_PARISC_LTOFF16WF	102	/* 16 bits LT-rel. address.  */
+++#define R_PARISC_LTOFF16DF	103	/* 16 bits LT-rel. address.  */
+++#define R_PARISC_SECREL64	104	/* 64 bits section rel. address.  */
+++#define R_PARISC_SEGREL64	112	/* 64 bits segment rel. address.  */
+++#define R_PARISC_PLTOFF14WR	115	/* PLT-rel. address, right 14 bits.  */
+++#define R_PARISC_PLTOFF14DR	116	/* PLT-rel. address, right 14 bits.  */
+++#define R_PARISC_PLTOFF16F	117	/* 16 bits LT-rel. address.  */
+++#define R_PARISC_PLTOFF16WF	118	/* 16 bits PLT-rel. address.  */
+++#define R_PARISC_PLTOFF16DF	119	/* 16 bits PLT-rel. address.  */
+++#define R_PARISC_LTOFF_FPTR64	120	/* 64 bits LT-rel. function ptr.  */
+++#define R_PARISC_LTOFF_FPTR14WR	123	/* LT-rel. fct. ptr., right 14 bits. */
+++#define R_PARISC_LTOFF_FPTR14DR	124	/* LT-rel. fct. ptr., right 14 bits. */
+++#define R_PARISC_LTOFF_FPTR16F	125	/* 16 bits LT-rel. function ptr.  */
+++#define R_PARISC_LTOFF_FPTR16WF	126	/* 16 bits LT-rel. function ptr.  */
+++#define R_PARISC_LTOFF_FPTR16DF	127	/* 16 bits LT-rel. function ptr.  */
+++#define R_PARISC_LORESERVE	128
+++#define R_PARISC_COPY		128	/* Copy relocation.  */
+++#define R_PARISC_IPLT		129	/* Dynamic reloc, imported PLT */
+++#define R_PARISC_EPLT		130	/* Dynamic reloc, exported PLT */
+++#define R_PARISC_TPREL32	153	/* 32 bits TP-rel. address.  */
+++#define R_PARISC_TPREL21L	154	/* TP-rel. address, left 21 bits.  */
+++#define R_PARISC_TPREL14R	158	/* TP-rel. address, right 14 bits.  */
+++#define R_PARISC_LTOFF_TP21L	162	/* LT-TP-rel. address, left 21 bits. */
+++#define R_PARISC_LTOFF_TP14R	166	/* LT-TP-rel. address, right 14 bits.*/
+++#define R_PARISC_LTOFF_TP14F	167	/* 14 bits LT-TP-rel. address.  */
+++#define R_PARISC_TPREL64	216	/* 64 bits TP-rel. address.  */
+++#define R_PARISC_TPREL14WR	219	/* TP-rel. address, right 14 bits.  */
+++#define R_PARISC_TPREL14DR	220	/* TP-rel. address, right 14 bits.  */
+++#define R_PARISC_TPREL16F	221	/* 16 bits TP-rel. address.  */
+++#define R_PARISC_TPREL16WF	222	/* 16 bits TP-rel. address.  */
+++#define R_PARISC_TPREL16DF	223	/* 16 bits TP-rel. address.  */
+++#define R_PARISC_LTOFF_TP64	224	/* 64 bits LT-TP-rel. address.  */
+++#define R_PARISC_LTOFF_TP14WR	227	/* LT-TP-rel. address, right 14 bits.*/
+++#define R_PARISC_LTOFF_TP14DR	228	/* LT-TP-rel. address, right 14 bits.*/
+++#define R_PARISC_LTOFF_TP16F	229	/* 16 bits LT-TP-rel. address.  */
+++#define R_PARISC_LTOFF_TP16WF	230	/* 16 bits LT-TP-rel. address.  */
+++#define R_PARISC_LTOFF_TP16DF	231	/* 16 bits LT-TP-rel. address.  */
+++#define R_PARISC_GNU_VTENTRY	232
+++#define R_PARISC_GNU_VTINHERIT	233
+++#define R_PARISC_TLS_GD21L	234	/* GD 21-bit left.  */
+++#define R_PARISC_TLS_GD14R	235	/* GD 14-bit right.  */
+++#define R_PARISC_TLS_GDCALL	236	/* GD call to __t_g_a.  */
+++#define R_PARISC_TLS_LDM21L	237	/* LD module 21-bit left.  */
+++#define R_PARISC_TLS_LDM14R	238	/* LD module 14-bit right.  */
+++#define R_PARISC_TLS_LDMCALL	239	/* LD module call to __t_g_a.  */
+++#define R_PARISC_TLS_LDO21L	240	/* LD offset 21-bit left.  */
+++#define R_PARISC_TLS_LDO14R	241	/* LD offset 14-bit right.  */
+++#define R_PARISC_TLS_DTPMOD32	242	/* DTP module 32-bit.  */
+++#define R_PARISC_TLS_DTPMOD64	243	/* DTP module 64-bit.  */
+++#define R_PARISC_TLS_DTPOFF32	244	/* DTP offset 32-bit.  */
+++#define R_PARISC_TLS_DTPOFF64	245	/* DTP offset 32-bit.  */
+++#define R_PARISC_TLS_LE21L	R_PARISC_TPREL21L
+++#define R_PARISC_TLS_LE14R	R_PARISC_TPREL14R
+++#define R_PARISC_TLS_IE21L	R_PARISC_LTOFF_TP21L
+++#define R_PARISC_TLS_IE14R	R_PARISC_LTOFF_TP14R
+++#define R_PARISC_TLS_TPREL32	R_PARISC_TPREL32
+++#define R_PARISC_TLS_TPREL64	R_PARISC_TPREL64
+++#define R_PARISC_HIRESERVE	255
+++
+++/* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr.  */
+++
+++#define PT_HP_TLS		(PT_LOOS + 0x0)
+++#define PT_HP_CORE_NONE		(PT_LOOS + 0x1)
+++#define PT_HP_CORE_VERSION	(PT_LOOS + 0x2)
+++#define PT_HP_CORE_KERNEL	(PT_LOOS + 0x3)
+++#define PT_HP_CORE_COMM		(PT_LOOS + 0x4)
+++#define PT_HP_CORE_PROC		(PT_LOOS + 0x5)
+++#define PT_HP_CORE_LOADABLE	(PT_LOOS + 0x6)
+++#define PT_HP_CORE_STACK	(PT_LOOS + 0x7)
+++#define PT_HP_CORE_SHM		(PT_LOOS + 0x8)
+++#define PT_HP_CORE_MMF		(PT_LOOS + 0x9)
+++#define PT_HP_PARALLEL		(PT_LOOS + 0x10)
+++#define PT_HP_FASTBIND		(PT_LOOS + 0x11)
+++#define PT_HP_OPT_ANNOT		(PT_LOOS + 0x12)
+++#define PT_HP_HSL_ANNOT		(PT_LOOS + 0x13)
+++#define PT_HP_STACK		(PT_LOOS + 0x14)
+++
+++#define PT_PARISC_ARCHEXT	0x70000000
+++#define PT_PARISC_UNWIND	0x70000001
+++
+++/* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr.  */
+++
+++#define PF_PARISC_SBP		0x08000000
+++
+++#define PF_HP_PAGE_SIZE		0x00100000
+++#define PF_HP_FAR_SHARED	0x00200000
+++#define PF_HP_NEAR_SHARED	0x00400000
+++#define PF_HP_CODE		0x01000000
+++#define PF_HP_MODIFY		0x02000000
+++#define PF_HP_LAZYSWAP		0x04000000
+++#define PF_HP_SBP		0x08000000
+++
+++
+++/* Alpha specific definitions.  */
+++
+++/* Legal values for e_flags field of Elf64_Ehdr.  */
+++
+++#define EF_ALPHA_32BIT		1	/* All addresses must be < 2GB.  */
+++#define EF_ALPHA_CANRELAX	2	/* Relocations for relaxing exist.  */
+++
+++/* Legal values for sh_type field of Elf64_Shdr.  */
+++
+++/* These two are primerily concerned with ECOFF debugging info.  */
+++#define SHT_ALPHA_DEBUG		0x70000001
+++#define SHT_ALPHA_REGINFO	0x70000002
+++
+++/* Legal values for sh_flags field of Elf64_Shdr.  */
+++
+++#define SHF_ALPHA_GPREL		0x10000000
+++
+++/* Legal values for st_other field of Elf64_Sym.  */
+++#define STO_ALPHA_NOPV		0x80	/* No PV required.  */
+++#define STO_ALPHA_STD_GPLOAD	0x88	/* PV only used for initial ldgp.  */
+++
+++/* Alpha relocs.  */
+++
+++#define R_ALPHA_NONE		0	/* No reloc */
+++#define R_ALPHA_REFLONG		1	/* Direct 32 bit */
+++#define R_ALPHA_REFQUAD		2	/* Direct 64 bit */
+++#define R_ALPHA_GPREL32		3	/* GP relative 32 bit */
+++#define R_ALPHA_LITERAL		4	/* GP relative 16 bit w/optimization */
+++#define R_ALPHA_LITUSE		5	/* Optimization hint for LITERAL */
+++#define R_ALPHA_GPDISP		6	/* Add displacement to GP */
+++#define R_ALPHA_BRADDR		7	/* PC+4 relative 23 bit shifted */
+++#define R_ALPHA_HINT		8	/* PC+4 relative 16 bit shifted */
+++#define R_ALPHA_SREL16		9	/* PC relative 16 bit */
+++#define R_ALPHA_SREL32		10	/* PC relative 32 bit */
+++#define R_ALPHA_SREL64		11	/* PC relative 64 bit */
+++#define R_ALPHA_GPRELHIGH	17	/* GP relative 32 bit, high 16 bits */
+++#define R_ALPHA_GPRELLOW	18	/* GP relative 32 bit, low 16 bits */
+++#define R_ALPHA_GPREL16		19	/* GP relative 16 bit */
+++#define R_ALPHA_COPY		24	/* Copy symbol at runtime */
+++#define R_ALPHA_GLOB_DAT	25	/* Create GOT entry */
+++#define R_ALPHA_JMP_SLOT	26	/* Create PLT entry */
+++#define R_ALPHA_RELATIVE	27	/* Adjust by program base */
+++#define R_ALPHA_TLS_GD_HI	28
+++#define R_ALPHA_TLSGD		29
+++#define R_ALPHA_TLS_LDM		30
+++#define R_ALPHA_DTPMOD64	31
+++#define R_ALPHA_GOTDTPREL	32
+++#define R_ALPHA_DTPREL64	33
+++#define R_ALPHA_DTPRELHI	34
+++#define R_ALPHA_DTPRELLO	35
+++#define R_ALPHA_DTPREL16	36
+++#define R_ALPHA_GOTTPREL	37
+++#define R_ALPHA_TPREL64		38
+++#define R_ALPHA_TPRELHI		39
+++#define R_ALPHA_TPRELLO		40
+++#define R_ALPHA_TPREL16		41
+++/* Keep this the last entry.  */
+++#define R_ALPHA_NUM		46
+++
+++/* Magic values of the LITUSE relocation addend.  */
+++#define LITUSE_ALPHA_ADDR	0
+++#define LITUSE_ALPHA_BASE	1
+++#define LITUSE_ALPHA_BYTOFF	2
+++#define LITUSE_ALPHA_JSR	3
+++#define LITUSE_ALPHA_TLS_GD	4
+++#define LITUSE_ALPHA_TLS_LDM	5
+++
+++/* Legal values for d_tag of Elf64_Dyn.  */
+++#define DT_ALPHA_PLTRO		(DT_LOPROC + 0)
+++#define DT_ALPHA_NUM		1
+++
+++/* PowerPC specific declarations */
+++
+++/* Values for Elf32/64_Ehdr.e_flags.  */
+++#define EF_PPC_EMB		0x80000000	/* PowerPC embedded flag */
+++
+++/* Cygnus local bits below */
+++#define EF_PPC_RELOCATABLE	0x00010000	/* PowerPC -mrelocatable flag*/
+++#define EF_PPC_RELOCATABLE_LIB	0x00008000	/* PowerPC -mrelocatable-lib
+++						   flag */
+++
+++/* PowerPC relocations defined by the ABIs */
+++#define R_PPC_NONE		0
+++#define R_PPC_ADDR32		1	/* 32bit absolute address */
+++#define R_PPC_ADDR24		2	/* 26bit address, 2 bits ignored.  */
+++#define R_PPC_ADDR16		3	/* 16bit absolute address */
+++#define R_PPC_ADDR16_LO		4	/* lower 16bit of absolute address */
+++#define R_PPC_ADDR16_HI		5	/* high 16bit of absolute address */
+++#define R_PPC_ADDR16_HA		6	/* adjusted high 16bit */
+++#define R_PPC_ADDR14		7	/* 16bit address, 2 bits ignored */
+++#define R_PPC_ADDR14_BRTAKEN	8
+++#define R_PPC_ADDR14_BRNTAKEN	9
+++#define R_PPC_REL24		10	/* PC relative 26 bit */
+++#define R_PPC_REL14		11	/* PC relative 16 bit */
+++#define R_PPC_REL14_BRTAKEN	12
+++#define R_PPC_REL14_BRNTAKEN	13
+++#define R_PPC_GOT16		14
+++#define R_PPC_GOT16_LO		15
+++#define R_PPC_GOT16_HI		16
+++#define R_PPC_GOT16_HA		17
+++#define R_PPC_PLTREL24		18
+++#define R_PPC_COPY		19
+++#define R_PPC_GLOB_DAT		20
+++#define R_PPC_JMP_SLOT		21
+++#define R_PPC_RELATIVE		22
+++#define R_PPC_LOCAL24PC		23
+++#define R_PPC_UADDR32		24
+++#define R_PPC_UADDR16		25
+++#define R_PPC_REL32		26
+++#define R_PPC_PLT32		27
+++#define R_PPC_PLTREL32		28
+++#define R_PPC_PLT16_LO		29
+++#define R_PPC_PLT16_HI		30
+++#define R_PPC_PLT16_HA		31
+++#define R_PPC_SDAREL16		32
+++#define R_PPC_SECTOFF		33
+++#define R_PPC_SECTOFF_LO	34
+++#define R_PPC_SECTOFF_HI	35
+++#define R_PPC_SECTOFF_HA	36
+++
+++/* PowerPC relocations defined for the TLS access ABI.  */
+++#define R_PPC_TLS		67 /* none	(sym+add)@tls */
+++#define R_PPC_DTPMOD32		68 /* word32	(sym+add)@dtpmod */
+++#define R_PPC_TPREL16		69 /* half16*	(sym+add)@tprel */
+++#define R_PPC_TPREL16_LO	70 /* half16	(sym+add)@tprel@l */
+++#define R_PPC_TPREL16_HI	71 /* half16	(sym+add)@tprel@h */
+++#define R_PPC_TPREL16_HA	72 /* half16	(sym+add)@tprel@ha */
+++#define R_PPC_TPREL32		73 /* word32	(sym+add)@tprel */
+++#define R_PPC_DTPREL16		74 /* half16*	(sym+add)@dtprel */
+++#define R_PPC_DTPREL16_LO	75 /* half16	(sym+add)@dtprel@l */
+++#define R_PPC_DTPREL16_HI	76 /* half16	(sym+add)@dtprel@h */
+++#define R_PPC_DTPREL16_HA	77 /* half16	(sym+add)@dtprel@ha */
+++#define R_PPC_DTPREL32		78 /* word32	(sym+add)@dtprel */
+++#define R_PPC_GOT_TLSGD16	79 /* half16*	(sym+add)@got@tlsgd */
+++#define R_PPC_GOT_TLSGD16_LO	80 /* half16	(sym+add)@got@tlsgd@l */
+++#define R_PPC_GOT_TLSGD16_HI	81 /* half16	(sym+add)@got@tlsgd@h */
+++#define R_PPC_GOT_TLSGD16_HA	82 /* half16	(sym+add)@got@tlsgd@ha */
+++#define R_PPC_GOT_TLSLD16	83 /* half16*	(sym+add)@got@tlsld */
+++#define R_PPC_GOT_TLSLD16_LO	84 /* half16	(sym+add)@got@tlsld@l */
+++#define R_PPC_GOT_TLSLD16_HI	85 /* half16	(sym+add)@got@tlsld@h */
+++#define R_PPC_GOT_TLSLD16_HA	86 /* half16	(sym+add)@got@tlsld@ha */
+++#define R_PPC_GOT_TPREL16	87 /* half16*	(sym+add)@got@tprel */
+++#define R_PPC_GOT_TPREL16_LO	88 /* half16	(sym+add)@got@tprel@l */
+++#define R_PPC_GOT_TPREL16_HI	89 /* half16	(sym+add)@got@tprel@h */
+++#define R_PPC_GOT_TPREL16_HA	90 /* half16	(sym+add)@got@tprel@ha */
+++#define R_PPC_GOT_DTPREL16	91 /* half16*	(sym+add)@got@dtprel */
+++#define R_PPC_GOT_DTPREL16_LO	92 /* half16*	(sym+add)@got@dtprel@l */
+++#define R_PPC_GOT_DTPREL16_HI	93 /* half16*	(sym+add)@got@dtprel@h */
+++#define R_PPC_GOT_DTPREL16_HA	94 /* half16*	(sym+add)@got@dtprel@ha */
+++
+++/* The remaining relocs are from the Embedded ELF ABI, and are not
+++   in the SVR4 ELF ABI.  */
+++#define R_PPC_EMB_NADDR32	101
+++#define R_PPC_EMB_NADDR16	102
+++#define R_PPC_EMB_NADDR16_LO	103
+++#define R_PPC_EMB_NADDR16_HI	104
+++#define R_PPC_EMB_NADDR16_HA	105
+++#define R_PPC_EMB_SDAI16	106
+++#define R_PPC_EMB_SDA2I16	107
+++#define R_PPC_EMB_SDA2REL	108
+++#define R_PPC_EMB_SDA21		109	/* 16 bit offset in SDA */
+++#define R_PPC_EMB_MRKREF	110
+++#define R_PPC_EMB_RELSEC16	111
+++#define R_PPC_EMB_RELST_LO	112
+++#define R_PPC_EMB_RELST_HI	113
+++#define R_PPC_EMB_RELST_HA	114
+++#define R_PPC_EMB_BIT_FLD	115
+++#define R_PPC_EMB_RELSDA	116	/* 16 bit relative offset in SDA */
+++
+++/* Diab tool relocations.  */
+++#define R_PPC_DIAB_SDA21_LO	180	/* like EMB_SDA21, but lower 16 bit */
+++#define R_PPC_DIAB_SDA21_HI	181	/* like EMB_SDA21, but high 16 bit */
+++#define R_PPC_DIAB_SDA21_HA	182	/* like EMB_SDA21, adjusted high 16 */
+++#define R_PPC_DIAB_RELSDA_LO	183	/* like EMB_RELSDA, but lower 16 bit */
+++#define R_PPC_DIAB_RELSDA_HI	184	/* like EMB_RELSDA, but high 16 bit */
+++#define R_PPC_DIAB_RELSDA_HA	185	/* like EMB_RELSDA, adjusted high 16 */
+++
+++/* GNU extension to support local ifunc.  */
+++#define R_PPC_IRELATIVE		248
+++
+++/* GNU relocs used in PIC code sequences.  */
+++#define R_PPC_REL16		249	/* half16   (sym+add-.) */
+++#define R_PPC_REL16_LO		250	/* half16   (sym+add-.)@l */
+++#define R_PPC_REL16_HI		251	/* half16   (sym+add-.)@h */
+++#define R_PPC_REL16_HA		252	/* half16   (sym+add-.)@ha */
+++
+++/* This is a phony reloc to handle any old fashioned TOC16 references
+++   that may still be in object files.  */
+++#define R_PPC_TOC16		255
+++
+++/* PowerPC specific values for the Dyn d_tag field.  */
+++#define DT_PPC_GOT		(DT_LOPROC + 0)
+++#define DT_PPC_NUM		1
+++
+++/* PowerPC64 relocations defined by the ABIs */
+++#define R_PPC64_NONE		R_PPC_NONE
+++#define R_PPC64_ADDR32		R_PPC_ADDR32 /* 32bit absolute address */
+++#define R_PPC64_ADDR24		R_PPC_ADDR24 /* 26bit address, word aligned */
+++#define R_PPC64_ADDR16		R_PPC_ADDR16 /* 16bit absolute address */
+++#define R_PPC64_ADDR16_LO	R_PPC_ADDR16_LO	/* lower 16bits of address */
+++#define R_PPC64_ADDR16_HI	R_PPC_ADDR16_HI	/* high 16bits of address. */
+++#define R_PPC64_ADDR16_HA	R_PPC_ADDR16_HA /* adjusted high 16bits.  */
+++#define R_PPC64_ADDR14		R_PPC_ADDR14 /* 16bit address, word aligned */
+++#define R_PPC64_ADDR14_BRTAKEN	R_PPC_ADDR14_BRTAKEN
+++#define R_PPC64_ADDR14_BRNTAKEN	R_PPC_ADDR14_BRNTAKEN
+++#define R_PPC64_REL24		R_PPC_REL24 /* PC-rel. 26 bit, word aligned */
+++#define R_PPC64_REL14		R_PPC_REL14 /* PC relative 16 bit */
+++#define R_PPC64_REL14_BRTAKEN	R_PPC_REL14_BRTAKEN
+++#define R_PPC64_REL14_BRNTAKEN	R_PPC_REL14_BRNTAKEN
+++#define R_PPC64_GOT16		R_PPC_GOT16
+++#define R_PPC64_GOT16_LO	R_PPC_GOT16_LO
+++#define R_PPC64_GOT16_HI	R_PPC_GOT16_HI
+++#define R_PPC64_GOT16_HA	R_PPC_GOT16_HA
+++
+++#define R_PPC64_COPY		R_PPC_COPY
+++#define R_PPC64_GLOB_DAT	R_PPC_GLOB_DAT
+++#define R_PPC64_JMP_SLOT	R_PPC_JMP_SLOT
+++#define R_PPC64_RELATIVE	R_PPC_RELATIVE
+++
+++#define R_PPC64_UADDR32		R_PPC_UADDR32
+++#define R_PPC64_UADDR16		R_PPC_UADDR16
+++#define R_PPC64_REL32		R_PPC_REL32
+++#define R_PPC64_PLT32		R_PPC_PLT32
+++#define R_PPC64_PLTREL32	R_PPC_PLTREL32
+++#define R_PPC64_PLT16_LO	R_PPC_PLT16_LO
+++#define R_PPC64_PLT16_HI	R_PPC_PLT16_HI
+++#define R_PPC64_PLT16_HA	R_PPC_PLT16_HA
+++
+++#define R_PPC64_SECTOFF		R_PPC_SECTOFF
+++#define R_PPC64_SECTOFF_LO	R_PPC_SECTOFF_LO
+++#define R_PPC64_SECTOFF_HI	R_PPC_SECTOFF_HI
+++#define R_PPC64_SECTOFF_HA	R_PPC_SECTOFF_HA
+++#define R_PPC64_ADDR30		37 /* word30 (S + A - P) >> 2 */
+++#define R_PPC64_ADDR64		38 /* doubleword64 S + A */
+++#define R_PPC64_ADDR16_HIGHER	39 /* half16 #higher(S + A) */
+++#define R_PPC64_ADDR16_HIGHERA	40 /* half16 #highera(S + A) */
+++#define R_PPC64_ADDR16_HIGHEST	41 /* half16 #highest(S + A) */
+++#define R_PPC64_ADDR16_HIGHESTA	42 /* half16 #highesta(S + A) */
+++#define R_PPC64_UADDR64		43 /* doubleword64 S + A */
+++#define R_PPC64_REL64		44 /* doubleword64 S + A - P */
+++#define R_PPC64_PLT64		45 /* doubleword64 L + A */
+++#define R_PPC64_PLTREL64	46 /* doubleword64 L + A - P */
+++#define R_PPC64_TOC16		47 /* half16* S + A - .TOC */
+++#define R_PPC64_TOC16_LO	48 /* half16 #lo(S + A - .TOC.) */
+++#define R_PPC64_TOC16_HI	49 /* half16 #hi(S + A - .TOC.) */
+++#define R_PPC64_TOC16_HA	50 /* half16 #ha(S + A - .TOC.) */
+++#define R_PPC64_TOC		51 /* doubleword64 .TOC */
+++#define R_PPC64_PLTGOT16	52 /* half16* M + A */
+++#define R_PPC64_PLTGOT16_LO	53 /* half16 #lo(M + A) */
+++#define R_PPC64_PLTGOT16_HI	54 /* half16 #hi(M + A) */
+++#define R_PPC64_PLTGOT16_HA	55 /* half16 #ha(M + A) */
+++
+++#define R_PPC64_ADDR16_DS	56 /* half16ds* (S + A) >> 2 */
+++#define R_PPC64_ADDR16_LO_DS	57 /* half16ds  #lo(S + A) >> 2 */
+++#define R_PPC64_GOT16_DS	58 /* half16ds* (G + A) >> 2 */
+++#define R_PPC64_GOT16_LO_DS	59 /* half16ds  #lo(G + A) >> 2 */
+++#define R_PPC64_PLT16_LO_DS	60 /* half16ds  #lo(L + A) >> 2 */
+++#define R_PPC64_SECTOFF_DS	61 /* half16ds* (R + A) >> 2 */
+++#define R_PPC64_SECTOFF_LO_DS	62 /* half16ds  #lo(R + A) >> 2 */
+++#define R_PPC64_TOC16_DS	63 /* half16ds* (S + A - .TOC.) >> 2 */
+++#define R_PPC64_TOC16_LO_DS	64 /* half16ds  #lo(S + A - .TOC.) >> 2 */
+++#define R_PPC64_PLTGOT16_DS	65 /* half16ds* (M + A) >> 2 */
+++#define R_PPC64_PLTGOT16_LO_DS	66 /* half16ds  #lo(M + A) >> 2 */
+++
+++/* PowerPC64 relocations defined for the TLS access ABI.  */
+++#define R_PPC64_TLS		67 /* none	(sym+add)@tls */
+++#define R_PPC64_DTPMOD64	68 /* doubleword64 (sym+add)@dtpmod */
+++#define R_PPC64_TPREL16		69 /* half16*	(sym+add)@tprel */
+++#define R_PPC64_TPREL16_LO	70 /* half16	(sym+add)@tprel@l */
+++#define R_PPC64_TPREL16_HI	71 /* half16	(sym+add)@tprel@h */
+++#define R_PPC64_TPREL16_HA	72 /* half16	(sym+add)@tprel@ha */
+++#define R_PPC64_TPREL64		73 /* doubleword64 (sym+add)@tprel */
+++#define R_PPC64_DTPREL16	74 /* half16*	(sym+add)@dtprel */
+++#define R_PPC64_DTPREL16_LO	75 /* half16	(sym+add)@dtprel@l */
+++#define R_PPC64_DTPREL16_HI	76 /* half16	(sym+add)@dtprel@h */
+++#define R_PPC64_DTPREL16_HA	77 /* half16	(sym+add)@dtprel@ha */
+++#define R_PPC64_DTPREL64	78 /* doubleword64 (sym+add)@dtprel */
+++#define R_PPC64_GOT_TLSGD16	79 /* half16*	(sym+add)@got@tlsgd */
+++#define R_PPC64_GOT_TLSGD16_LO	80 /* half16	(sym+add)@got@tlsgd@l */
+++#define R_PPC64_GOT_TLSGD16_HI	81 /* half16	(sym+add)@got@tlsgd@h */
+++#define R_PPC64_GOT_TLSGD16_HA	82 /* half16	(sym+add)@got@tlsgd@ha */
+++#define R_PPC64_GOT_TLSLD16	83 /* half16*	(sym+add)@got@tlsld */
+++#define R_PPC64_GOT_TLSLD16_LO	84 /* half16	(sym+add)@got@tlsld@l */
+++#define R_PPC64_GOT_TLSLD16_HI	85 /* half16	(sym+add)@got@tlsld@h */
+++#define R_PPC64_GOT_TLSLD16_HA	86 /* half16	(sym+add)@got@tlsld@ha */
+++#define R_PPC64_GOT_TPREL16_DS	87 /* half16ds*	(sym+add)@got@tprel */
+++#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */
+++#define R_PPC64_GOT_TPREL16_HI	89 /* half16	(sym+add)@got@tprel@h */
+++#define R_PPC64_GOT_TPREL16_HA	90 /* half16	(sym+add)@got@tprel@ha */
+++#define R_PPC64_GOT_DTPREL16_DS	91 /* half16ds*	(sym+add)@got@dtprel */
+++#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */
+++#define R_PPC64_GOT_DTPREL16_HI	93 /* half16	(sym+add)@got@dtprel@h */
+++#define R_PPC64_GOT_DTPREL16_HA	94 /* half16	(sym+add)@got@dtprel@ha */
+++#define R_PPC64_TPREL16_DS	95 /* half16ds*	(sym+add)@tprel */
+++#define R_PPC64_TPREL16_LO_DS	96 /* half16ds	(sym+add)@tprel@l */
+++#define R_PPC64_TPREL16_HIGHER	97 /* half16	(sym+add)@tprel@higher */
+++#define R_PPC64_TPREL16_HIGHERA	98 /* half16	(sym+add)@tprel@highera */
+++#define R_PPC64_TPREL16_HIGHEST	99 /* half16	(sym+add)@tprel@highest */
+++#define R_PPC64_TPREL16_HIGHESTA 100 /* half16	(sym+add)@tprel@highesta */
+++#define R_PPC64_DTPREL16_DS	101 /* half16ds* (sym+add)@dtprel */
+++#define R_PPC64_DTPREL16_LO_DS	102 /* half16ds	(sym+add)@dtprel@l */
+++#define R_PPC64_DTPREL16_HIGHER	103 /* half16	(sym+add)@dtprel@higher */
+++#define R_PPC64_DTPREL16_HIGHERA 104 /* half16	(sym+add)@dtprel@highera */
+++#define R_PPC64_DTPREL16_HIGHEST 105 /* half16	(sym+add)@dtprel@highest */
+++#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16	(sym+add)@dtprel@highesta */
+++
+++/* GNU extension to support local ifunc.  */
+++#define R_PPC64_JMP_IREL	247
+++#define R_PPC64_IRELATIVE	248
+++#define R_PPC64_REL16		249	/* half16   (sym+add-.) */
+++#define R_PPC64_REL16_LO	250	/* half16   (sym+add-.)@l */
+++#define R_PPC64_REL16_HI	251	/* half16   (sym+add-.)@h */
+++#define R_PPC64_REL16_HA	252	/* half16   (sym+add-.)@ha */
+++
+++/* PowerPC64 specific values for the Dyn d_tag field.  */
+++#define DT_PPC64_GLINK  (DT_LOPROC + 0)
+++#define DT_PPC64_OPD	(DT_LOPROC + 1)
+++#define DT_PPC64_OPDSZ	(DT_LOPROC + 2)
+++#define DT_PPC64_NUM    3
+++
+++
+++/* ARM specific declarations */
+++
+++/* Processor specific flags for the ELF header e_flags field.  */
+++#define EF_ARM_RELEXEC		0x01
+++#define EF_ARM_HASENTRY		0x02
+++#define EF_ARM_INTERWORK	0x04
+++#define EF_ARM_APCS_26		0x08
+++#define EF_ARM_APCS_FLOAT	0x10
+++#define EF_ARM_PIC		0x20
+++#define EF_ARM_ALIGN8		0x40 /* 8-bit structure alignment is in use */
+++#define EF_ARM_NEW_ABI		0x80
+++#define EF_ARM_OLD_ABI		0x100
+++#define EF_ARM_SOFT_FLOAT	0x200
+++#define EF_ARM_VFP_FLOAT	0x400
+++#define EF_ARM_MAVERICK_FLOAT	0x800
+++
+++
+++/* Other constants defined in the ARM ELF spec. version B-01.  */
+++/* NB. These conflict with values defined above.  */
+++#define EF_ARM_SYMSARESORTED	0x04
+++#define EF_ARM_DYNSYMSUSESEGIDX	0x08
+++#define EF_ARM_MAPSYMSFIRST	0x10
+++#define EF_ARM_EABIMASK		0XFF000000
+++
+++/* Constants defined in AAELF.  */
+++#define EF_ARM_BE8	    0x00800000
+++#define EF_ARM_LE8	    0x00400000
+++
+++#define EF_ARM_EABI_VERSION(flags)	((flags) & EF_ARM_EABIMASK)
+++#define EF_ARM_EABI_UNKNOWN	0x00000000
+++#define EF_ARM_EABI_VER1	0x01000000
+++#define EF_ARM_EABI_VER2	0x02000000
+++#define EF_ARM_EABI_VER3	0x03000000
+++#define EF_ARM_EABI_VER4	0x04000000
+++#define EF_ARM_EABI_VER5	0x05000000
+++
+++/* Additional symbol types for Thumb.  */
+++#define STT_ARM_TFUNC		STT_LOPROC /* A Thumb function.  */
+++#define STT_ARM_16BIT		STT_HIPROC /* A Thumb label.  */
+++
+++/* ARM-specific values for sh_flags */
+++#define SHF_ARM_ENTRYSECT	0x10000000 /* Section contains an entry point */
+++#define SHF_ARM_COMDEF		0x80000000 /* Section may be multiply defined
+++					      in the input to a link step.  */
+++
+++/* ARM-specific program header flags */
+++#define PF_ARM_SB		0x10000000 /* Segment contains the location
+++					      addressed by the static base. */
+++#define PF_ARM_PI		0x20000000 /* Position-independent segment.  */
+++#define PF_ARM_ABS		0x40000000 /* Absolute segment.  */
+++
+++/* Processor specific values for the Phdr p_type field.  */
+++#define PT_ARM_EXIDX		(PT_LOPROC + 1)	/* ARM unwind segment.  */
+++
+++/* Processor specific values for the Shdr sh_type field.  */
+++#define SHT_ARM_EXIDX		(SHT_LOPROC + 1) /* ARM unwind section.  */
+++#define SHT_ARM_PREEMPTMAP	(SHT_LOPROC + 2) /* Preemption details.  */
+++#define SHT_ARM_ATTRIBUTES	(SHT_LOPROC + 3) /* ARM attributes section.  */
+++
+++
+++/* ARM relocs.  */
+++
+++#define R_ARM_NONE		0	/* No reloc */
+++#define R_ARM_PC24		1	/* PC relative 26 bit branch */
+++#define R_ARM_ABS32		2	/* Direct 32 bit  */
+++#define R_ARM_REL32		3	/* PC relative 32 bit */
+++#define R_ARM_PC13		4
+++#define R_ARM_ABS16		5	/* Direct 16 bit */
+++#define R_ARM_ABS12		6	/* Direct 12 bit */
+++#define R_ARM_THM_ABS5		7
+++#define R_ARM_ABS8		8	/* Direct 8 bit */
+++#define R_ARM_SBREL32		9
+++#define R_ARM_THM_PC22		10
+++#define R_ARM_THM_PC8		11
+++#define R_ARM_AMP_VCALL9	12
+++#define R_ARM_SWI24		13	/* Obsolete static relocation.  */
+++#define R_ARM_TLS_DESC		13      /* Dynamic relocation.  */
+++#define R_ARM_THM_SWI8		14
+++#define R_ARM_XPC25		15
+++#define R_ARM_THM_XPC22		16
+++#define R_ARM_TLS_DTPMOD32	17	/* ID of module containing symbol */
+++#define R_ARM_TLS_DTPOFF32	18	/* Offset in TLS block */
+++#define R_ARM_TLS_TPOFF32	19	/* Offset in static TLS block */
+++#define R_ARM_COPY		20	/* Copy symbol at runtime */
+++#define R_ARM_GLOB_DAT		21	/* Create GOT entry */
+++#define R_ARM_JUMP_SLOT		22	/* Create PLT entry */
+++#define R_ARM_RELATIVE		23	/* Adjust by program base */
+++#define R_ARM_GOTOFF		24	/* 32 bit offset to GOT */
+++#define R_ARM_GOTPC		25	/* 32 bit PC relative offset to GOT */
+++#define R_ARM_GOT32		26	/* 32 bit GOT entry */
+++#define R_ARM_PLT32		27	/* 32 bit PLT address */
+++#define R_ARM_ALU_PCREL_7_0	32
+++#define R_ARM_ALU_PCREL_15_8	33
+++#define R_ARM_ALU_PCREL_23_15	34
+++#define R_ARM_LDR_SBREL_11_0	35
+++#define R_ARM_ALU_SBREL_19_12	36
+++#define R_ARM_ALU_SBREL_27_20	37
+++#define R_ARM_TLS_GOTDESC	90
+++#define R_ARM_TLS_CALL		91
+++#define R_ARM_TLS_DESCSEQ	92
+++#define R_ARM_THM_TLS_CALL	93
+++#define R_ARM_GNU_VTENTRY	100
+++#define R_ARM_GNU_VTINHERIT	101
+++#define R_ARM_THM_PC11		102	/* thumb unconditional branch */
+++#define R_ARM_THM_PC9		103	/* thumb conditional branch */
+++#define R_ARM_TLS_GD32		104	/* PC-rel 32 bit for global dynamic
+++					   thread local data */
+++#define R_ARM_TLS_LDM32		105	/* PC-rel 32 bit for local dynamic
+++					   thread local data */
+++#define R_ARM_TLS_LDO32		106	/* 32 bit offset relative to TLS
+++					   block */
+++#define R_ARM_TLS_IE32		107	/* PC-rel 32 bit for GOT entry of
+++					   static TLS block offset */
+++#define R_ARM_TLS_LE32		108	/* 32 bit offset relative to static
+++					   TLS block */
+++#define	R_ARM_THM_TLS_DESCSEQ	129
+++#define R_ARM_IRELATIVE		160
+++#define R_ARM_RXPC25		249
+++#define R_ARM_RSBREL32		250
+++#define R_ARM_THM_RPC22		251
+++#define R_ARM_RREL32		252
+++#define R_ARM_RABS22		253
+++#define R_ARM_RPC24		254
+++#define R_ARM_RBASE		255
+++/* Keep this the last entry.  */
+++#define R_ARM_NUM		256
+++
+++/* IA-64 specific declarations.  */
+++
+++/* Processor specific flags for the Ehdr e_flags field.  */
+++#define EF_IA_64_MASKOS		0x0000000f	/* os-specific flags */
+++#define EF_IA_64_ABI64		0x00000010	/* 64-bit ABI */
+++#define EF_IA_64_ARCH		0xff000000	/* arch. version mask */
+++
+++/* Processor specific values for the Phdr p_type field.  */
+++#define PT_IA_64_ARCHEXT	(PT_LOPROC + 0)	/* arch extension bits */
+++#define PT_IA_64_UNWIND		(PT_LOPROC + 1)	/* ia64 unwind bits */
+++#define PT_IA_64_HP_OPT_ANOT	(PT_LOOS + 0x12)
+++#define PT_IA_64_HP_HSL_ANOT	(PT_LOOS + 0x13)
+++#define PT_IA_64_HP_STACK	(PT_LOOS + 0x14)
+++
+++/* Processor specific flags for the Phdr p_flags field.  */
+++#define PF_IA_64_NORECOV	0x80000000	/* spec insns w/o recovery */
+++
+++/* Processor specific values for the Shdr sh_type field.  */
+++#define SHT_IA_64_EXT		(SHT_LOPROC + 0) /* extension bits */
+++#define SHT_IA_64_UNWIND	(SHT_LOPROC + 1) /* unwind bits */
+++
+++/* Processor specific flags for the Shdr sh_flags field.  */
+++#define SHF_IA_64_SHORT		0x10000000	/* section near gp */
+++#define SHF_IA_64_NORECOV	0x20000000	/* spec insns w/o recovery */
+++
+++/* Processor specific values for the Dyn d_tag field.  */
+++#define DT_IA_64_PLT_RESERVE	(DT_LOPROC + 0)
+++#define DT_IA_64_NUM		1
+++
+++/* IA-64 relocations.  */
+++#define R_IA64_NONE		0x00	/* none */
+++#define R_IA64_IMM14		0x21	/* symbol + addend, add imm14 */
+++#define R_IA64_IMM22		0x22	/* symbol + addend, add imm22 */
+++#define R_IA64_IMM64		0x23	/* symbol + addend, mov imm64 */
+++#define R_IA64_DIR32MSB		0x24	/* symbol + addend, data4 MSB */
+++#define R_IA64_DIR32LSB		0x25	/* symbol + addend, data4 LSB */
+++#define R_IA64_DIR64MSB		0x26	/* symbol + addend, data8 MSB */
+++#define R_IA64_DIR64LSB		0x27	/* symbol + addend, data8 LSB */
+++#define R_IA64_GPREL22		0x2a	/* @gprel(sym + add), add imm22 */
+++#define R_IA64_GPREL64I		0x2b	/* @gprel(sym + add), mov imm64 */
+++#define R_IA64_GPREL32MSB	0x2c	/* @gprel(sym + add), data4 MSB */
+++#define R_IA64_GPREL32LSB	0x2d	/* @gprel(sym + add), data4 LSB */
+++#define R_IA64_GPREL64MSB	0x2e	/* @gprel(sym + add), data8 MSB */
+++#define R_IA64_GPREL64LSB	0x2f	/* @gprel(sym + add), data8 LSB */
+++#define R_IA64_LTOFF22		0x32	/* @ltoff(sym + add), add imm22 */
+++#define R_IA64_LTOFF64I		0x33	/* @ltoff(sym + add), mov imm64 */
+++#define R_IA64_PLTOFF22		0x3a	/* @pltoff(sym + add), add imm22 */
+++#define R_IA64_PLTOFF64I	0x3b	/* @pltoff(sym + add), mov imm64 */
+++#define R_IA64_PLTOFF64MSB	0x3e	/* @pltoff(sym + add), data8 MSB */
+++#define R_IA64_PLTOFF64LSB	0x3f	/* @pltoff(sym + add), data8 LSB */
+++#define R_IA64_FPTR64I		0x43	/* @fptr(sym + add), mov imm64 */
+++#define R_IA64_FPTR32MSB	0x44	/* @fptr(sym + add), data4 MSB */
+++#define R_IA64_FPTR32LSB	0x45	/* @fptr(sym + add), data4 LSB */
+++#define R_IA64_FPTR64MSB	0x46	/* @fptr(sym + add), data8 MSB */
+++#define R_IA64_FPTR64LSB	0x47	/* @fptr(sym + add), data8 LSB */
+++#define R_IA64_PCREL60B		0x48	/* @pcrel(sym + add), brl */
+++#define R_IA64_PCREL21B		0x49	/* @pcrel(sym + add), ptb, call */
+++#define R_IA64_PCREL21M		0x4a	/* @pcrel(sym + add), chk.s */
+++#define R_IA64_PCREL21F		0x4b	/* @pcrel(sym + add), fchkf */
+++#define R_IA64_PCREL32MSB	0x4c	/* @pcrel(sym + add), data4 MSB */
+++#define R_IA64_PCREL32LSB	0x4d	/* @pcrel(sym + add), data4 LSB */
+++#define R_IA64_PCREL64MSB	0x4e	/* @pcrel(sym + add), data8 MSB */
+++#define R_IA64_PCREL64LSB	0x4f	/* @pcrel(sym + add), data8 LSB */
+++#define R_IA64_LTOFF_FPTR22	0x52	/* @ltoff(@fptr(s+a)), imm22 */
+++#define R_IA64_LTOFF_FPTR64I	0x53	/* @ltoff(@fptr(s+a)), imm64 */
+++#define R_IA64_LTOFF_FPTR32MSB	0x54	/* @ltoff(@fptr(s+a)), data4 MSB */
+++#define R_IA64_LTOFF_FPTR32LSB	0x55	/* @ltoff(@fptr(s+a)), data4 LSB */
+++#define R_IA64_LTOFF_FPTR64MSB	0x56	/* @ltoff(@fptr(s+a)), data8 MSB */
+++#define R_IA64_LTOFF_FPTR64LSB	0x57	/* @ltoff(@fptr(s+a)), data8 LSB */
+++#define R_IA64_SEGREL32MSB	0x5c	/* @segrel(sym + add), data4 MSB */
+++#define R_IA64_SEGREL32LSB	0x5d	/* @segrel(sym + add), data4 LSB */
+++#define R_IA64_SEGREL64MSB	0x5e	/* @segrel(sym + add), data8 MSB */
+++#define R_IA64_SEGREL64LSB	0x5f	/* @segrel(sym + add), data8 LSB */
+++#define R_IA64_SECREL32MSB	0x64	/* @secrel(sym + add), data4 MSB */
+++#define R_IA64_SECREL32LSB	0x65	/* @secrel(sym + add), data4 LSB */
+++#define R_IA64_SECREL64MSB	0x66	/* @secrel(sym + add), data8 MSB */
+++#define R_IA64_SECREL64LSB	0x67	/* @secrel(sym + add), data8 LSB */
+++#define R_IA64_REL32MSB		0x6c	/* data 4 + REL */
+++#define R_IA64_REL32LSB		0x6d	/* data 4 + REL */
+++#define R_IA64_REL64MSB		0x6e	/* data 8 + REL */
+++#define R_IA64_REL64LSB		0x6f	/* data 8 + REL */
+++#define R_IA64_LTV32MSB		0x74	/* symbol + addend, data4 MSB */
+++#define R_IA64_LTV32LSB		0x75	/* symbol + addend, data4 LSB */
+++#define R_IA64_LTV64MSB		0x76	/* symbol + addend, data8 MSB */
+++#define R_IA64_LTV64LSB		0x77	/* symbol + addend, data8 LSB */
+++#define R_IA64_PCREL21BI	0x79	/* @pcrel(sym + add), 21bit inst */
+++#define R_IA64_PCREL22		0x7a	/* @pcrel(sym + add), 22bit inst */
+++#define R_IA64_PCREL64I		0x7b	/* @pcrel(sym + add), 64bit inst */
+++#define R_IA64_IPLTMSB		0x80	/* dynamic reloc, imported PLT, MSB */
+++#define R_IA64_IPLTLSB		0x81	/* dynamic reloc, imported PLT, LSB */
+++#define R_IA64_COPY		0x84	/* copy relocation */
+++#define R_IA64_SUB		0x85	/* Addend and symbol difference */
+++#define R_IA64_LTOFF22X		0x86	/* LTOFF22, relaxable.  */
+++#define R_IA64_LDXMOV		0x87	/* Use of LTOFF22X.  */
+++#define R_IA64_TPREL14		0x91	/* @tprel(sym + add), imm14 */
+++#define R_IA64_TPREL22		0x92	/* @tprel(sym + add), imm22 */
+++#define R_IA64_TPREL64I		0x93	/* @tprel(sym + add), imm64 */
+++#define R_IA64_TPREL64MSB	0x96	/* @tprel(sym + add), data8 MSB */
+++#define R_IA64_TPREL64LSB	0x97	/* @tprel(sym + add), data8 LSB */
+++#define R_IA64_LTOFF_TPREL22	0x9a	/* @ltoff(@tprel(s+a)), imm2 */
+++#define R_IA64_DTPMOD64MSB	0xa6	/* @dtpmod(sym + add), data8 MSB */
+++#define R_IA64_DTPMOD64LSB	0xa7	/* @dtpmod(sym + add), data8 LSB */
+++#define R_IA64_LTOFF_DTPMOD22	0xaa	/* @ltoff(@dtpmod(sym + add)), imm22 */
+++#define R_IA64_DTPREL14		0xb1	/* @dtprel(sym + add), imm14 */
+++#define R_IA64_DTPREL22		0xb2	/* @dtprel(sym + add), imm22 */
+++#define R_IA64_DTPREL64I	0xb3	/* @dtprel(sym + add), imm64 */
+++#define R_IA64_DTPREL32MSB	0xb4	/* @dtprel(sym + add), data4 MSB */
+++#define R_IA64_DTPREL32LSB	0xb5	/* @dtprel(sym + add), data4 LSB */
+++#define R_IA64_DTPREL64MSB	0xb6	/* @dtprel(sym + add), data8 MSB */
+++#define R_IA64_DTPREL64LSB	0xb7	/* @dtprel(sym + add), data8 LSB */
+++#define R_IA64_LTOFF_DTPREL22	0xba	/* @ltoff(@dtprel(s+a)), imm22 */
+++
+++/* SH specific declarations */
+++
+++/* Processor specific flags for the ELF header e_flags field.  */
+++#define EF_SH_MACH_MASK		0x1f
+++#define EF_SH_UNKNOWN		0x0
+++#define EF_SH1			0x1
+++#define EF_SH2			0x2
+++#define EF_SH3			0x3
+++#define EF_SH_DSP		0x4
+++#define EF_SH3_DSP		0x5
+++#define EF_SH4AL_DSP		0x6
+++#define EF_SH3E			0x8
+++#define EF_SH4			0x9
+++#define EF_SH2E			0xb
+++#define EF_SH4A			0xc
+++#define EF_SH2A			0xd
+++#define EF_SH4_NOFPU		0x10
+++#define EF_SH4A_NOFPU		0x11
+++#define EF_SH4_NOMMU_NOFPU	0x12
+++#define EF_SH2A_NOFPU		0x13
+++#define EF_SH3_NOMMU		0x14
+++#define EF_SH2A_SH4_NOFPU	0x15
+++#define EF_SH2A_SH3_NOFPU	0x16
+++#define EF_SH2A_SH4		0x17
+++#define EF_SH2A_SH3E		0x18
+++
+++/* SH relocs.  */
+++#define	R_SH_NONE		0
+++#define	R_SH_DIR32		1
+++#define	R_SH_REL32		2
+++#define	R_SH_DIR8WPN		3
+++#define	R_SH_IND12W		4
+++#define	R_SH_DIR8WPL		5
+++#define	R_SH_DIR8WPZ		6
+++#define	R_SH_DIR8BP		7
+++#define	R_SH_DIR8W		8
+++#define	R_SH_DIR8L		9
+++#define	R_SH_SWITCH16		25
+++#define	R_SH_SWITCH32		26
+++#define	R_SH_USES		27
+++#define	R_SH_COUNT		28
+++#define	R_SH_ALIGN		29
+++#define	R_SH_CODE		30
+++#define	R_SH_DATA		31
+++#define	R_SH_LABEL		32
+++#define	R_SH_SWITCH8		33
+++#define	R_SH_GNU_VTINHERIT	34
+++#define	R_SH_GNU_VTENTRY	35
+++#define	R_SH_TLS_GD_32		144
+++#define	R_SH_TLS_LD_32		145
+++#define	R_SH_TLS_LDO_32		146
+++#define	R_SH_TLS_IE_32		147
+++#define	R_SH_TLS_LE_32		148
+++#define	R_SH_TLS_DTPMOD32	149
+++#define	R_SH_TLS_DTPOFF32	150
+++#define	R_SH_TLS_TPOFF32	151
+++#define	R_SH_GOT32		160
+++#define	R_SH_PLT32		161
+++#define	R_SH_COPY		162
+++#define	R_SH_GLOB_DAT		163
+++#define	R_SH_JMP_SLOT		164
+++#define	R_SH_RELATIVE		165
+++#define	R_SH_GOTOFF		166
+++#define	R_SH_GOTPC		167
+++/* Keep this the last entry.  */
+++#define	R_SH_NUM		256
+++
+++/* S/390 specific definitions.  */
+++
+++/* Valid values for the e_flags field.  */
+++
+++#define EF_S390_HIGH_GPRS    0x00000001  /* High GPRs kernel facility needed.  */
+++
+++/* Additional s390 relocs */
+++
+++#define R_390_NONE		0	/* No reloc.  */
+++#define R_390_8			1	/* Direct 8 bit.  */
+++#define R_390_12		2	/* Direct 12 bit.  */
+++#define R_390_16		3	/* Direct 16 bit.  */
+++#define R_390_32		4	/* Direct 32 bit.  */
+++#define R_390_PC32		5	/* PC relative 32 bit.	*/
+++#define R_390_GOT12		6	/* 12 bit GOT offset.  */
+++#define R_390_GOT32		7	/* 32 bit GOT offset.  */
+++#define R_390_PLT32		8	/* 32 bit PC relative PLT address.  */
+++#define R_390_COPY		9	/* Copy symbol at runtime.  */
+++#define R_390_GLOB_DAT		10	/* Create GOT entry.  */
+++#define R_390_JMP_SLOT		11	/* Create PLT entry.  */
+++#define R_390_RELATIVE		12	/* Adjust by program base.  */
+++#define R_390_GOTOFF32		13	/* 32 bit offset to GOT.	 */
+++#define R_390_GOTPC		14	/* 32 bit PC relative offset to GOT.  */
+++#define R_390_GOT16		15	/* 16 bit GOT offset.  */
+++#define R_390_PC16		16	/* PC relative 16 bit.	*/
+++#define R_390_PC16DBL		17	/* PC relative 16 bit shifted by 1.  */
+++#define R_390_PLT16DBL		18	/* 16 bit PC rel. PLT shifted by 1.  */
+++#define R_390_PC32DBL		19	/* PC relative 32 bit shifted by 1.  */
+++#define R_390_PLT32DBL		20	/* 32 bit PC rel. PLT shifted by 1.  */
+++#define R_390_GOTPCDBL		21	/* 32 bit PC rel. GOT shifted by 1.  */
+++#define R_390_64		22	/* Direct 64 bit.  */
+++#define R_390_PC64		23	/* PC relative 64 bit.	*/
+++#define R_390_GOT64		24	/* 64 bit GOT offset.  */
+++#define R_390_PLT64		25	/* 64 bit PC relative PLT address.  */
+++#define R_390_GOTENT		26	/* 32 bit PC rel. to GOT entry >> 1. */
+++#define R_390_GOTOFF16		27	/* 16 bit offset to GOT. */
+++#define R_390_GOTOFF64		28	/* 64 bit offset to GOT. */
+++#define R_390_GOTPLT12		29	/* 12 bit offset to jump slot.	*/
+++#define R_390_GOTPLT16		30	/* 16 bit offset to jump slot.	*/
+++#define R_390_GOTPLT32		31	/* 32 bit offset to jump slot.	*/
+++#define R_390_GOTPLT64		32	/* 64 bit offset to jump slot.	*/
+++#define R_390_GOTPLTENT		33	/* 32 bit rel. offset to jump slot.  */
+++#define R_390_PLTOFF16		34	/* 16 bit offset from GOT to PLT. */
+++#define R_390_PLTOFF32		35	/* 32 bit offset from GOT to PLT. */
+++#define R_390_PLTOFF64		36	/* 16 bit offset from GOT to PLT. */
+++#define R_390_TLS_LOAD		37	/* Tag for load insn in TLS code.  */
+++#define R_390_TLS_GDCALL	38	/* Tag for function call in general
+++					   dynamic TLS code. */
+++#define R_390_TLS_LDCALL	39	/* Tag for function call in local
+++					   dynamic TLS code. */
+++#define R_390_TLS_GD32		40	/* Direct 32 bit for general dynamic
+++					   thread local data.  */
+++#define R_390_TLS_GD64		41	/* Direct 64 bit for general dynamic
+++					  thread local data.  */
+++#define R_390_TLS_GOTIE12	42	/* 12 bit GOT offset for static TLS
+++					   block offset.  */
+++#define R_390_TLS_GOTIE32	43	/* 32 bit GOT offset for static TLS
+++					   block offset.  */
+++#define R_390_TLS_GOTIE64	44	/* 64 bit GOT offset for static TLS
+++					   block offset. */
+++#define R_390_TLS_LDM32		45	/* Direct 32 bit for local dynamic
+++					   thread local data in LE code.  */
+++#define R_390_TLS_LDM64		46	/* Direct 64 bit for local dynamic
+++					   thread local data in LE code.  */
+++#define R_390_TLS_IE32		47	/* 32 bit address of GOT entry for
+++					   negated static TLS block offset.  */
+++#define R_390_TLS_IE64		48	/* 64 bit address of GOT entry for
+++					   negated static TLS block offset.  */
+++#define R_390_TLS_IEENT		49	/* 32 bit rel. offset to GOT entry for
+++					   negated static TLS block offset.  */
+++#define R_390_TLS_LE32		50	/* 32 bit negated offset relative to
+++					   static TLS block.  */
+++#define R_390_TLS_LE64		51	/* 64 bit negated offset relative to
+++					   static TLS block.  */
+++#define R_390_TLS_LDO32		52	/* 32 bit offset relative to TLS
+++					   block.  */
+++#define R_390_TLS_LDO64		53	/* 64 bit offset relative to TLS
+++					   block.  */
+++#define R_390_TLS_DTPMOD	54	/* ID of module containing symbol.  */
+++#define R_390_TLS_DTPOFF	55	/* Offset in TLS block.	 */
+++#define R_390_TLS_TPOFF		56	/* Negated offset in static TLS
+++					   block.  */
+++#define R_390_20		57	/* Direct 20 bit.  */
+++#define R_390_GOT20		58	/* 20 bit GOT offset.  */
+++#define R_390_GOTPLT20		59	/* 20 bit offset to jump slot.  */
+++#define R_390_TLS_GOTIE20	60	/* 20 bit GOT offset for static TLS
+++					   block offset.  */
+++#define R_390_IRELATIVE         61      /* STT_GNU_IFUNC relocation.  */
+++/* Keep this the last entry.  */
+++#define R_390_NUM		62
+++
+++
+++/* CRIS relocations.  */
+++#define R_CRIS_NONE		0
+++#define R_CRIS_8		1
+++#define R_CRIS_16		2
+++#define R_CRIS_32		3
+++#define R_CRIS_8_PCREL		4
+++#define R_CRIS_16_PCREL		5
+++#define R_CRIS_32_PCREL		6
+++#define R_CRIS_GNU_VTINHERIT	7
+++#define R_CRIS_GNU_VTENTRY	8
+++#define R_CRIS_COPY		9
+++#define R_CRIS_GLOB_DAT		10
+++#define R_CRIS_JUMP_SLOT	11
+++#define R_CRIS_RELATIVE		12
+++#define R_CRIS_16_GOT		13
+++#define R_CRIS_32_GOT		14
+++#define R_CRIS_16_GOTPLT	15
+++#define R_CRIS_32_GOTPLT	16
+++#define R_CRIS_32_GOTREL	17
+++#define R_CRIS_32_PLT_GOTREL	18
+++#define R_CRIS_32_PLT_PCREL	19
+++
+++#define R_CRIS_NUM		20
+++
+++
+++/* AMD x86-64 relocations.  */
+++#define R_X86_64_NONE		0	/* No reloc */
+++#define R_X86_64_64		1	/* Direct 64 bit  */
+++#define R_X86_64_PC32		2	/* PC relative 32 bit signed */
+++#define R_X86_64_GOT32		3	/* 32 bit GOT entry */
+++#define R_X86_64_PLT32		4	/* 32 bit PLT address */
+++#define R_X86_64_COPY		5	/* Copy symbol at runtime */
+++#define R_X86_64_GLOB_DAT	6	/* Create GOT entry */
+++#define R_X86_64_JUMP_SLOT	7	/* Create PLT entry */
+++#define R_X86_64_RELATIVE	8	/* Adjust by program base */
+++#define R_X86_64_GOTPCREL	9	/* 32 bit signed PC relative
+++					   offset to GOT */
+++#define R_X86_64_32		10	/* Direct 32 bit zero extended */
+++#define R_X86_64_32S		11	/* Direct 32 bit sign extended */
+++#define R_X86_64_16		12	/* Direct 16 bit zero extended */
+++#define R_X86_64_PC16		13	/* 16 bit sign extended pc relative */
+++#define R_X86_64_8		14	/* Direct 8 bit sign extended  */
+++#define R_X86_64_PC8		15	/* 8 bit sign extended pc relative */
+++#define R_X86_64_DTPMOD64	16	/* ID of module containing symbol */
+++#define R_X86_64_DTPOFF64	17	/* Offset in module's TLS block */
+++#define R_X86_64_TPOFF64	18	/* Offset in initial TLS block */
+++#define R_X86_64_TLSGD		19	/* 32 bit signed PC relative offset
+++					   to two GOT entries for GD symbol */
+++#define R_X86_64_TLSLD		20	/* 32 bit signed PC relative offset
+++					   to two GOT entries for LD symbol */
+++#define R_X86_64_DTPOFF32	21	/* Offset in TLS block */
+++#define R_X86_64_GOTTPOFF	22	/* 32 bit signed PC relative offset
+++					   to GOT entry for IE symbol */
+++#define R_X86_64_TPOFF32	23	/* Offset in initial TLS block */
+++#define R_X86_64_PC64		24	/* PC relative 64 bit */
+++#define R_X86_64_GOTOFF64	25	/* 64 bit offset to GOT */
+++#define R_X86_64_GOTPC32	26	/* 32 bit signed pc relative
+++					   offset to GOT */
+++#define R_X86_64_GOT64		27	/* 64-bit GOT entry offset */
+++#define R_X86_64_GOTPCREL64	28	/* 64-bit PC relative offset
+++					   to GOT entry */
+++#define R_X86_64_GOTPC64	29	/* 64-bit PC relative offset to GOT */
+++#define R_X86_64_GOTPLT64	30 	/* like GOT64, says PLT entry needed */
+++#define R_X86_64_PLTOFF64	31	/* 64-bit GOT relative offset
+++					   to PLT entry */
+++#define R_X86_64_SIZE32		32	/* Size of symbol plus 32-bit addend */
+++#define R_X86_64_SIZE64		33	/* Size of symbol plus 64-bit addend */
+++#define R_X86_64_GOTPC32_TLSDESC 34	/* GOT offset for TLS descriptor.  */
+++#define R_X86_64_TLSDESC_CALL   35	/* Marker for call through TLS
+++					   descriptor.  */
+++#define R_X86_64_TLSDESC        36	/* TLS descriptor.  */
+++#define R_X86_64_IRELATIVE	37	/* Adjust indirectly by program base */
+++#define R_X86_64_RELATIVE64	38	/* 64-bit adjust by program base */
+++
+++#define R_X86_64_NUM		39
+++
+++
+++/* AM33 relocations.  */
+++#define R_MN10300_NONE		0	/* No reloc.  */
+++#define R_MN10300_32		1	/* Direct 32 bit.  */
+++#define R_MN10300_16		2	/* Direct 16 bit.  */
+++#define R_MN10300_8		3	/* Direct 8 bit.  */
+++#define R_MN10300_PCREL32	4	/* PC-relative 32-bit.  */
+++#define R_MN10300_PCREL16	5	/* PC-relative 16-bit signed.  */
+++#define R_MN10300_PCREL8	6	/* PC-relative 8-bit signed.  */
+++#define R_MN10300_GNU_VTINHERIT	7	/* Ancient C++ vtable garbage... */
+++#define R_MN10300_GNU_VTENTRY	8	/* ... collection annotation.  */
+++#define R_MN10300_24		9	/* Direct 24 bit.  */
+++#define R_MN10300_GOTPC32	10	/* 32-bit PCrel offset to GOT.  */
+++#define R_MN10300_GOTPC16	11	/* 16-bit PCrel offset to GOT.  */
+++#define R_MN10300_GOTOFF32	12	/* 32-bit offset from GOT.  */
+++#define R_MN10300_GOTOFF24	13	/* 24-bit offset from GOT.  */
+++#define R_MN10300_GOTOFF16	14	/* 16-bit offset from GOT.  */
+++#define R_MN10300_PLT32		15	/* 32-bit PCrel to PLT entry.  */
+++#define R_MN10300_PLT16		16	/* 16-bit PCrel to PLT entry.  */
+++#define R_MN10300_GOT32		17	/* 32-bit offset to GOT entry.  */
+++#define R_MN10300_GOT24		18	/* 24-bit offset to GOT entry.  */
+++#define R_MN10300_GOT16		19	/* 16-bit offset to GOT entry.  */
+++#define R_MN10300_COPY		20	/* Copy symbol at runtime.  */
+++#define R_MN10300_GLOB_DAT	21	/* Create GOT entry.  */
+++#define R_MN10300_JMP_SLOT	22	/* Create PLT entry.  */
+++#define R_MN10300_RELATIVE	23	/* Adjust by program base.  */
+++
+++#define R_MN10300_NUM		24
+++
+++
+++/* M32R relocs.  */
+++#define R_M32R_NONE		0	/* No reloc. */
+++#define R_M32R_16		1	/* Direct 16 bit. */
+++#define R_M32R_32		2	/* Direct 32 bit. */
+++#define R_M32R_24		3	/* Direct 24 bit. */
+++#define R_M32R_10_PCREL		4	/* PC relative 10 bit shifted. */
+++#define R_M32R_18_PCREL		5	/* PC relative 18 bit shifted. */
+++#define R_M32R_26_PCREL		6	/* PC relative 26 bit shifted. */
+++#define R_M32R_HI16_ULO		7	/* High 16 bit with unsigned low. */
+++#define R_M32R_HI16_SLO		8	/* High 16 bit with signed low. */
+++#define R_M32R_LO16		9	/* Low 16 bit. */
+++#define R_M32R_SDA16		10	/* 16 bit offset in SDA. */
+++#define R_M32R_GNU_VTINHERIT	11
+++#define R_M32R_GNU_VTENTRY	12
+++/* M32R relocs use SHT_RELA.  */
+++#define R_M32R_16_RELA		33	/* Direct 16 bit. */
+++#define R_M32R_32_RELA		34	/* Direct 32 bit. */
+++#define R_M32R_24_RELA		35	/* Direct 24 bit. */
+++#define R_M32R_10_PCREL_RELA	36	/* PC relative 10 bit shifted. */
+++#define R_M32R_18_PCREL_RELA	37	/* PC relative 18 bit shifted. */
+++#define R_M32R_26_PCREL_RELA	38	/* PC relative 26 bit shifted. */
+++#define R_M32R_HI16_ULO_RELA	39	/* High 16 bit with unsigned low */
+++#define R_M32R_HI16_SLO_RELA	40	/* High 16 bit with signed low */
+++#define R_M32R_LO16_RELA	41	/* Low 16 bit */
+++#define R_M32R_SDA16_RELA	42	/* 16 bit offset in SDA */
+++#define R_M32R_RELA_GNU_VTINHERIT	43
+++#define R_M32R_RELA_GNU_VTENTRY	44
+++#define R_M32R_REL32		45	/* PC relative 32 bit.  */
+++
+++#define R_M32R_GOT24		48	/* 24 bit GOT entry */
+++#define R_M32R_26_PLTREL	49	/* 26 bit PC relative to PLT shifted */
+++#define R_M32R_COPY		50	/* Copy symbol at runtime */
+++#define R_M32R_GLOB_DAT		51	/* Create GOT entry */
+++#define R_M32R_JMP_SLOT		52	/* Create PLT entry */
+++#define R_M32R_RELATIVE		53	/* Adjust by program base */
+++#define R_M32R_GOTOFF		54	/* 24 bit offset to GOT */
+++#define R_M32R_GOTPC24		55	/* 24 bit PC relative offset to GOT */
+++#define R_M32R_GOT16_HI_ULO	56	/* High 16 bit GOT entry with unsigned
+++					   low */
+++#define R_M32R_GOT16_HI_SLO	57	/* High 16 bit GOT entry with signed
+++					   low */
+++#define R_M32R_GOT16_LO		58	/* Low 16 bit GOT entry */
+++#define R_M32R_GOTPC_HI_ULO	59	/* High 16 bit PC relative offset to
+++					   GOT with unsigned low */
+++#define R_M32R_GOTPC_HI_SLO	60	/* High 16 bit PC relative offset to
+++					   GOT with signed low */
+++#define R_M32R_GOTPC_LO		61	/* Low 16 bit PC relative offset to
+++					   GOT */
+++#define R_M32R_GOTOFF_HI_ULO	62	/* High 16 bit offset to GOT
+++					   with unsigned low */
+++#define R_M32R_GOTOFF_HI_SLO	63	/* High 16 bit offset to GOT
+++					   with signed low */
+++#define R_M32R_GOTOFF_LO	64	/* Low 16 bit offset to GOT */
+++#define R_M32R_NUM		256	/* Keep this the last entry. */
+++
+++
+++/* TILEPro relocations.  */
+++#define R_TILEPRO_NONE		0	/* No reloc */
+++#define R_TILEPRO_32		1	/* Direct 32 bit */
+++#define R_TILEPRO_16		2	/* Direct 16 bit */
+++#define R_TILEPRO_8		3	/* Direct 8 bit */
+++#define R_TILEPRO_32_PCREL	4	/* PC relative 32 bit */
+++#define R_TILEPRO_16_PCREL	5	/* PC relative 16 bit */
+++#define R_TILEPRO_8_PCREL	6	/* PC relative 8 bit */
+++#define R_TILEPRO_LO16		7	/* Low 16 bit */
+++#define R_TILEPRO_HI16		8	/* High 16 bit */
+++#define R_TILEPRO_HA16		9	/* High 16 bit, adjusted */
+++#define R_TILEPRO_COPY		10	/* Copy relocation */
+++#define R_TILEPRO_GLOB_DAT	11	/* Create GOT entry */
+++#define R_TILEPRO_JMP_SLOT	12	/* Create PLT entry */
+++#define R_TILEPRO_RELATIVE	13	/* Adjust by program base */
+++#define R_TILEPRO_BROFF_X1	14	/* X1 pipe branch offset */
+++#define R_TILEPRO_JOFFLONG_X1	15	/* X1 pipe jump offset */
+++#define R_TILEPRO_JOFFLONG_X1_PLT 16	/* X1 pipe jump offset to PLT */
+++#define R_TILEPRO_IMM8_X0	17	/* X0 pipe 8-bit */
+++#define R_TILEPRO_IMM8_Y0	18	/* Y0 pipe 8-bit */
+++#define R_TILEPRO_IMM8_X1	19	/* X1 pipe 8-bit */
+++#define R_TILEPRO_IMM8_Y1	20	/* Y1 pipe 8-bit */
+++#define R_TILEPRO_MT_IMM15_X1	21	/* X1 pipe mtspr */
+++#define R_TILEPRO_MF_IMM15_X1	22	/* X1 pipe mfspr */
+++#define R_TILEPRO_IMM16_X0	23	/* X0 pipe 16-bit */
+++#define R_TILEPRO_IMM16_X1	24	/* X1 pipe 16-bit */
+++#define R_TILEPRO_IMM16_X0_LO	25	/* X0 pipe low 16-bit */
+++#define R_TILEPRO_IMM16_X1_LO	26	/* X1 pipe low 16-bit */
+++#define R_TILEPRO_IMM16_X0_HI	27	/* X0 pipe high 16-bit */
+++#define R_TILEPRO_IMM16_X1_HI	28	/* X1 pipe high 16-bit */
+++#define R_TILEPRO_IMM16_X0_HA	29	/* X0 pipe high 16-bit, adjusted */
+++#define R_TILEPRO_IMM16_X1_HA	30	/* X1 pipe high 16-bit, adjusted */
+++#define R_TILEPRO_IMM16_X0_PCREL 31	/* X0 pipe PC relative 16 bit */
+++#define R_TILEPRO_IMM16_X1_PCREL 32	/* X1 pipe PC relative 16 bit */
+++#define R_TILEPRO_IMM16_X0_LO_PCREL 33	/* X0 pipe PC relative low 16 bit */
+++#define R_TILEPRO_IMM16_X1_LO_PCREL 34	/* X1 pipe PC relative low 16 bit */
+++#define R_TILEPRO_IMM16_X0_HI_PCREL 35	/* X0 pipe PC relative high 16 bit */
+++#define R_TILEPRO_IMM16_X1_HI_PCREL 36	/* X1 pipe PC relative high 16 bit */
+++#define R_TILEPRO_IMM16_X0_HA_PCREL 37	/* X0 pipe PC relative ha() 16 bit */
+++#define R_TILEPRO_IMM16_X1_HA_PCREL 38	/* X1 pipe PC relative ha() 16 bit */
+++#define R_TILEPRO_IMM16_X0_GOT	39	/* X0 pipe 16-bit GOT offset */
+++#define R_TILEPRO_IMM16_X1_GOT	40	/* X1 pipe 16-bit GOT offset */
+++#define R_TILEPRO_IMM16_X0_GOT_LO 41	/* X0 pipe low 16-bit GOT offset */
+++#define R_TILEPRO_IMM16_X1_GOT_LO 42	/* X1 pipe low 16-bit GOT offset */
+++#define R_TILEPRO_IMM16_X0_GOT_HI 43	/* X0 pipe high 16-bit GOT offset */
+++#define R_TILEPRO_IMM16_X1_GOT_HI 44	/* X1 pipe high 16-bit GOT offset */
+++#define R_TILEPRO_IMM16_X0_GOT_HA 45	/* X0 pipe ha() 16-bit GOT offset */
+++#define R_TILEPRO_IMM16_X1_GOT_HA 46	/* X1 pipe ha() 16-bit GOT offset */
+++#define R_TILEPRO_MMSTART_X0	47	/* X0 pipe mm "start" */
+++#define R_TILEPRO_MMEND_X0	48	/* X0 pipe mm "end" */
+++#define R_TILEPRO_MMSTART_X1	49	/* X1 pipe mm "start" */
+++#define R_TILEPRO_MMEND_X1	50	/* X1 pipe mm "end" */
+++#define R_TILEPRO_SHAMT_X0	51	/* X0 pipe shift amount */
+++#define R_TILEPRO_SHAMT_X1	52	/* X1 pipe shift amount */
+++#define R_TILEPRO_SHAMT_Y0	53	/* Y0 pipe shift amount */
+++#define R_TILEPRO_SHAMT_Y1	54	/* Y1 pipe shift amount */
+++#define R_TILEPRO_DEST_IMM8_X1	55	/* X1 pipe destination 8-bit */
+++/* Relocs 56-59 are currently not defined.  */
+++#define R_TILEPRO_TLS_GD_CALL	60	/* "jal" for TLS GD */
+++#define R_TILEPRO_IMM8_X0_TLS_GD_ADD 61	/* X0 pipe "addi" for TLS GD */
+++#define R_TILEPRO_IMM8_X1_TLS_GD_ADD 62	/* X1 pipe "addi" for TLS GD */
+++#define R_TILEPRO_IMM8_Y0_TLS_GD_ADD 63	/* Y0 pipe "addi" for TLS GD */
+++#define R_TILEPRO_IMM8_Y1_TLS_GD_ADD 64	/* Y1 pipe "addi" for TLS GD */
+++#define R_TILEPRO_TLS_IE_LOAD	65	/* "lw_tls" for TLS IE */
+++#define R_TILEPRO_IMM16_X0_TLS_GD 66	/* X0 pipe 16-bit TLS GD offset */
+++#define R_TILEPRO_IMM16_X1_TLS_GD 67	/* X1 pipe 16-bit TLS GD offset */
+++#define R_TILEPRO_IMM16_X0_TLS_GD_LO 68	/* X0 pipe low 16-bit TLS GD offset */
+++#define R_TILEPRO_IMM16_X1_TLS_GD_LO 69	/* X1 pipe low 16-bit TLS GD offset */
+++#define R_TILEPRO_IMM16_X0_TLS_GD_HI 70	/* X0 pipe high 16-bit TLS GD offset */
+++#define R_TILEPRO_IMM16_X1_TLS_GD_HI 71	/* X1 pipe high 16-bit TLS GD offset */
+++#define R_TILEPRO_IMM16_X0_TLS_GD_HA 72	/* X0 pipe ha() 16-bit TLS GD offset */
+++#define R_TILEPRO_IMM16_X1_TLS_GD_HA 73	/* X1 pipe ha() 16-bit TLS GD offset */
+++#define R_TILEPRO_IMM16_X0_TLS_IE 74	/* X0 pipe 16-bit TLS IE offset */
+++#define R_TILEPRO_IMM16_X1_TLS_IE 75	/* X1 pipe 16-bit TLS IE offset */
+++#define R_TILEPRO_IMM16_X0_TLS_IE_LO 76	/* X0 pipe low 16-bit TLS IE offset */
+++#define R_TILEPRO_IMM16_X1_TLS_IE_LO 77	/* X1 pipe low 16-bit TLS IE offset */
+++#define R_TILEPRO_IMM16_X0_TLS_IE_HI 78	/* X0 pipe high 16-bit TLS IE offset */
+++#define R_TILEPRO_IMM16_X1_TLS_IE_HI 79	/* X1 pipe high 16-bit TLS IE offset */
+++#define R_TILEPRO_IMM16_X0_TLS_IE_HA 80	/* X0 pipe ha() 16-bit TLS IE offset */
+++#define R_TILEPRO_IMM16_X1_TLS_IE_HA 81	/* X1 pipe ha() 16-bit TLS IE offset */
+++#define R_TILEPRO_TLS_DTPMOD32	82	/* ID of module containing symbol */
+++#define R_TILEPRO_TLS_DTPOFF32	83	/* Offset in TLS block */
+++#define R_TILEPRO_TLS_TPOFF32	84	/* Offset in static TLS block */
+++#define R_TILEPRO_IMM16_X0_TLS_LE 85	/* X0 pipe 16-bit TLS LE offset */
+++#define R_TILEPRO_IMM16_X1_TLS_LE 86	/* X1 pipe 16-bit TLS LE offset */
+++#define R_TILEPRO_IMM16_X0_TLS_LE_LO 87	/* X0 pipe low 16-bit TLS LE offset */
+++#define R_TILEPRO_IMM16_X1_TLS_LE_LO 88	/* X1 pipe low 16-bit TLS LE offset */
+++#define R_TILEPRO_IMM16_X0_TLS_LE_HI 89	/* X0 pipe high 16-bit TLS LE offset */
+++#define R_TILEPRO_IMM16_X1_TLS_LE_HI 90	/* X1 pipe high 16-bit TLS LE offset */
+++#define R_TILEPRO_IMM16_X0_TLS_LE_HA 91	/* X0 pipe ha() 16-bit TLS LE offset */
+++#define R_TILEPRO_IMM16_X1_TLS_LE_HA 92	/* X1 pipe ha() 16-bit TLS LE offset */
+++
+++#define R_TILEPRO_GNU_VTINHERIT	128	/* GNU C++ vtable hierarchy */
+++#define R_TILEPRO_GNU_VTENTRY	129	/* GNU C++ vtable member usage */
+++
+++#define R_TILEPRO_NUM		130
+++
+++
+++/* TILE-Gx relocations.  */
+++#define R_TILEGX_NONE		0	/* No reloc */
+++#define R_TILEGX_64		1	/* Direct 64 bit */
+++#define R_TILEGX_32		2	/* Direct 32 bit */
+++#define R_TILEGX_16		3	/* Direct 16 bit */
+++#define R_TILEGX_8		4	/* Direct 8 bit */
+++#define R_TILEGX_64_PCREL	5	/* PC relative 64 bit */
+++#define R_TILEGX_32_PCREL	6	/* PC relative 32 bit */
+++#define R_TILEGX_16_PCREL	7	/* PC relative 16 bit */
+++#define R_TILEGX_8_PCREL	8	/* PC relative 8 bit */
+++#define R_TILEGX_HW0		9	/* hword 0 16-bit */
+++#define R_TILEGX_HW1		10	/* hword 1 16-bit */
+++#define R_TILEGX_HW2		11	/* hword 2 16-bit */
+++#define R_TILEGX_HW3		12	/* hword 3 16-bit */
+++#define R_TILEGX_HW0_LAST	13	/* last hword 0 16-bit */
+++#define R_TILEGX_HW1_LAST	14	/* last hword 1 16-bit */
+++#define R_TILEGX_HW2_LAST	15	/* last hword 2 16-bit */
+++#define R_TILEGX_COPY		16	/* Copy relocation */
+++#define R_TILEGX_GLOB_DAT	17	/* Create GOT entry */
+++#define R_TILEGX_JMP_SLOT	18	/* Create PLT entry */
+++#define R_TILEGX_RELATIVE	19	/* Adjust by program base */
+++#define R_TILEGX_BROFF_X1	20	/* X1 pipe branch offset */
+++#define R_TILEGX_JUMPOFF_X1	21	/* X1 pipe jump offset */
+++#define R_TILEGX_JUMPOFF_X1_PLT	22	/* X1 pipe jump offset to PLT */
+++#define R_TILEGX_IMM8_X0	23	/* X0 pipe 8-bit */
+++#define R_TILEGX_IMM8_Y0	24	/* Y0 pipe 8-bit */
+++#define R_TILEGX_IMM8_X1	25	/* X1 pipe 8-bit */
+++#define R_TILEGX_IMM8_Y1	26	/* Y1 pipe 8-bit */
+++#define R_TILEGX_DEST_IMM8_X1	27	/* X1 pipe destination 8-bit */
+++#define R_TILEGX_MT_IMM14_X1	28	/* X1 pipe mtspr */
+++#define R_TILEGX_MF_IMM14_X1	29	/* X1 pipe mfspr */
+++#define R_TILEGX_MMSTART_X0	30	/* X0 pipe mm "start" */
+++#define R_TILEGX_MMEND_X0	31	/* X0 pipe mm "end" */
+++#define R_TILEGX_SHAMT_X0	32	/* X0 pipe shift amount */
+++#define R_TILEGX_SHAMT_X1	33	/* X1 pipe shift amount */
+++#define R_TILEGX_SHAMT_Y0	34	/* Y0 pipe shift amount */
+++#define R_TILEGX_SHAMT_Y1	35	/* Y1 pipe shift amount */
+++#define R_TILEGX_IMM16_X0_HW0	36	/* X0 pipe hword 0 */
+++#define R_TILEGX_IMM16_X1_HW0	37	/* X1 pipe hword 0 */
+++#define R_TILEGX_IMM16_X0_HW1	38	/* X0 pipe hword 1 */
+++#define R_TILEGX_IMM16_X1_HW1	39	/* X1 pipe hword 1 */
+++#define R_TILEGX_IMM16_X0_HW2	40	/* X0 pipe hword 2 */
+++#define R_TILEGX_IMM16_X1_HW2	41	/* X1 pipe hword 2 */
+++#define R_TILEGX_IMM16_X0_HW3	42	/* X0 pipe hword 3 */
+++#define R_TILEGX_IMM16_X1_HW3	43	/* X1 pipe hword 3 */
+++#define R_TILEGX_IMM16_X0_HW0_LAST 44	/* X0 pipe last hword 0 */
+++#define R_TILEGX_IMM16_X1_HW0_LAST 45	/* X1 pipe last hword 0 */
+++#define R_TILEGX_IMM16_X0_HW1_LAST 46	/* X0 pipe last hword 1 */
+++#define R_TILEGX_IMM16_X1_HW1_LAST 47	/* X1 pipe last hword 1 */
+++#define R_TILEGX_IMM16_X0_HW2_LAST 48	/* X0 pipe last hword 2 */
+++#define R_TILEGX_IMM16_X1_HW2_LAST 49	/* X1 pipe last hword 2 */
+++#define R_TILEGX_IMM16_X0_HW0_PCREL 50	/* X0 pipe PC relative hword 0 */
+++#define R_TILEGX_IMM16_X1_HW0_PCREL 51	/* X1 pipe PC relative hword 0 */
+++#define R_TILEGX_IMM16_X0_HW1_PCREL 52	/* X0 pipe PC relative hword 1 */
+++#define R_TILEGX_IMM16_X1_HW1_PCREL 53	/* X1 pipe PC relative hword 1 */
+++#define R_TILEGX_IMM16_X0_HW2_PCREL 54	/* X0 pipe PC relative hword 2 */
+++#define R_TILEGX_IMM16_X1_HW2_PCREL 55	/* X1 pipe PC relative hword 2 */
+++#define R_TILEGX_IMM16_X0_HW3_PCREL 56	/* X0 pipe PC relative hword 3 */
+++#define R_TILEGX_IMM16_X1_HW3_PCREL 57	/* X1 pipe PC relative hword 3 */
+++#define R_TILEGX_IMM16_X0_HW0_LAST_PCREL 58 /* X0 pipe PC-rel last hword 0 */
+++#define R_TILEGX_IMM16_X1_HW0_LAST_PCREL 59 /* X1 pipe PC-rel last hword 0 */
+++#define R_TILEGX_IMM16_X0_HW1_LAST_PCREL 60 /* X0 pipe PC-rel last hword 1 */
+++#define R_TILEGX_IMM16_X1_HW1_LAST_PCREL 61 /* X1 pipe PC-rel last hword 1 */
+++#define R_TILEGX_IMM16_X0_HW2_LAST_PCREL 62 /* X0 pipe PC-rel last hword 2 */
+++#define R_TILEGX_IMM16_X1_HW2_LAST_PCREL 63 /* X1 pipe PC-rel last hword 2 */
+++#define R_TILEGX_IMM16_X0_HW0_GOT 64	/* X0 pipe hword 0 GOT offset */
+++#define R_TILEGX_IMM16_X1_HW0_GOT 65	/* X1 pipe hword 0 GOT offset */
+++/* Relocs 66-71 are currently not defined.  */
+++#define R_TILEGX_IMM16_X0_HW0_LAST_GOT 72 /* X0 pipe last hword 0 GOT offset */
+++#define R_TILEGX_IMM16_X1_HW0_LAST_GOT 73 /* X1 pipe last hword 0 GOT offset */
+++#define R_TILEGX_IMM16_X0_HW1_LAST_GOT 74 /* X0 pipe last hword 1 GOT offset */
+++#define R_TILEGX_IMM16_X1_HW1_LAST_GOT 75 /* X1 pipe last hword 1 GOT offset */
+++/* Relocs 76-77 are currently not defined.  */
+++#define R_TILEGX_IMM16_X0_HW0_TLS_GD 78	/* X0 pipe hword 0 TLS GD offset */
+++#define R_TILEGX_IMM16_X1_HW0_TLS_GD 79	/* X1 pipe hword 0 TLS GD offset */
+++#define R_TILEGX_IMM16_X0_HW0_TLS_LE 80	/* X0 pipe hword 0 TLS LE offset */
+++#define R_TILEGX_IMM16_X1_HW0_TLS_LE 81	/* X1 pipe hword 0 TLS LE offset */
+++#define R_TILEGX_IMM16_X0_HW0_LAST_TLS_LE 82 /* X0 pipe last hword 0 LE off */
+++#define R_TILEGX_IMM16_X1_HW0_LAST_TLS_LE 83 /* X1 pipe last hword 0 LE off */
+++#define R_TILEGX_IMM16_X0_HW1_LAST_TLS_LE 84 /* X0 pipe last hword 1 LE off */
+++#define R_TILEGX_IMM16_X1_HW1_LAST_TLS_LE 85 /* X1 pipe last hword 1 LE off */
+++#define R_TILEGX_IMM16_X0_HW0_LAST_TLS_GD 86 /* X0 pipe last hword 0 GD off */
+++#define R_TILEGX_IMM16_X1_HW0_LAST_TLS_GD 87 /* X1 pipe last hword 0 GD off */
+++#define R_TILEGX_IMM16_X0_HW1_LAST_TLS_GD 88 /* X0 pipe last hword 1 GD off */
+++#define R_TILEGX_IMM16_X1_HW1_LAST_TLS_GD 89 /* X1 pipe last hword 1 GD off */
+++/* Relocs 90-91 are currently not defined.  */
+++#define R_TILEGX_IMM16_X0_HW0_TLS_IE 92	/* X0 pipe hword 0 TLS IE offset */
+++#define R_TILEGX_IMM16_X1_HW0_TLS_IE 93	/* X1 pipe hword 0 TLS IE offset */
+++/* Relocs 94-99 are currently not defined.  */
+++#define R_TILEGX_IMM16_X0_HW0_LAST_TLS_IE 100 /* X0 pipe last hword 0 IE off */
+++#define R_TILEGX_IMM16_X1_HW0_LAST_TLS_IE 101 /* X1 pipe last hword 0 IE off */
+++#define R_TILEGX_IMM16_X0_HW1_LAST_TLS_IE 102 /* X0 pipe last hword 1 IE off */
+++#define R_TILEGX_IMM16_X1_HW1_LAST_TLS_IE 103 /* X1 pipe last hword 1 IE off */
+++/* Relocs 104-105 are currently not defined.  */
+++#define R_TILEGX_TLS_DTPMOD64	106	/* 64-bit ID of symbol's module */
+++#define R_TILEGX_TLS_DTPOFF64	107	/* 64-bit offset in TLS block */
+++#define R_TILEGX_TLS_TPOFF64	108	/* 64-bit offset in static TLS block */
+++#define R_TILEGX_TLS_DTPMOD32	109	/* 32-bit ID of symbol's module */
+++#define R_TILEGX_TLS_DTPOFF32	110	/* 32-bit offset in TLS block */
+++#define R_TILEGX_TLS_TPOFF32	111	/* 32-bit offset in static TLS block */
+++#define R_TILEGX_TLS_GD_CALL	112	/* "jal" for TLS GD */
+++#define R_TILEGX_IMM8_X0_TLS_GD_ADD 113	/* X0 pipe "addi" for TLS GD */
+++#define R_TILEGX_IMM8_X1_TLS_GD_ADD 114	/* X1 pipe "addi" for TLS GD */
+++#define R_TILEGX_IMM8_Y0_TLS_GD_ADD 115	/* Y0 pipe "addi" for TLS GD */
+++#define R_TILEGX_IMM8_Y1_TLS_GD_ADD 116	/* Y1 pipe "addi" for TLS GD */
+++#define R_TILEGX_TLS_IE_LOAD	117	/* "ld_tls" for TLS IE */
+++#define R_TILEGX_IMM8_X0_TLS_ADD 118	/* X0 pipe "addi" for TLS GD/IE */
+++#define R_TILEGX_IMM8_X1_TLS_ADD 119	/* X1 pipe "addi" for TLS GD/IE */
+++#define R_TILEGX_IMM8_Y0_TLS_ADD 120	/* Y0 pipe "addi" for TLS GD/IE */
+++#define R_TILEGX_IMM8_Y1_TLS_ADD 121	/* Y1 pipe "addi" for TLS GD/IE */
+++
+++#define R_TILEGX_GNU_VTINHERIT	128	/* GNU C++ vtable hierarchy */
+++#define R_TILEGX_GNU_VTENTRY	129	/* GNU C++ vtable member usage */
+++
+++#define R_TILEGX_NUM		130
+++
+++#endif	/* elf.h */
++--- a/scripts/mod/mk_elfconfig.c
+++++ b/scripts/mod/mk_elfconfig.c
++@@ -2,7 +2,11 @@
++ #include <stdio.h>
++ #include <stdlib.h>
++ #include <string.h>
+++#ifndef __APPLE__
++ #include <elf.h>
+++#else
+++#include "elf.h"
+++#endif
++ 
++ int
++ main(int argc, char **argv)
++--- a/scripts/mod/modpost.h
+++++ b/scripts/mod/modpost.h
++@@ -8,7 +8,11 @@
++ #include <sys/mman.h>
++ #include <fcntl.h>
++ #include <unistd.h>
+++#if !(defined(__APPLE__) || defined(__CYGWIN__))
++ #include <elf.h>
+++#else
+++#include "elf.h"
+++#endif
++ 
++ #include "elfconfig.h"
++ 
+diff --git a/target/linux/generic/hack-5.4/211-darwin-uuid-typedef-clash.patch b/target/linux/generic/hack-5.4/211-darwin-uuid-typedef-clash.patch
+new file mode 100644
+index 0000000000..50a6227148
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/211-darwin-uuid-typedef-clash.patch
+@@ -0,0 +1,22 @@
++From e44fc2af1ddc452b6659d08c16973d65c73b7d0a Mon Sep 17 00:00:00 2001
++From: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
++Date: Wed, 5 Feb 2020 18:36:43 +0000
++Subject: [PATCH] file2alias: build on macos
++
++Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
++---
++ scripts/mod/file2alias.c | 3 +++
++ 1 file changed, 3 insertions(+)
++
++--- a/scripts/mod/file2alias.c
+++++ b/scripts/mod/file2alias.c
++@@ -38,6 +38,9 @@ typedef struct {
++ 	__u8 b[16];
++ } guid_t;
++ 
+++#ifdef __APPLE__
+++#define uuid_t compat_uuid_t
+++#endif
++ /* backwards compatibility, don't use in new code */
++ typedef struct {
++ 	__u8 b[16];
+diff --git a/target/linux/generic/hack-5.4/212-tools_portability.patch b/target/linux/generic/hack-5.4/212-tools_portability.patch
+new file mode 100644
+index 0000000000..0d8eb6fb9d
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/212-tools_portability.patch
+@@ -0,0 +1,110 @@
++From 48232d3d931c95953ce2ddfe7da7bb164aef6a73 Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 7 Jul 2017 17:03:16 +0200
++Subject: fix portability of some includes files in tools/ used on the host
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ tools/include/tools/be_byteshift.h |  4 ++++
++ tools/include/tools/le_byteshift.h |  4 ++++
++ tools/include/tools/linux_types.h  | 22 ++++++++++++++++++++++
++ 3 files changed, 30 insertions(+)
++ create mode 100644 tools/include/tools/linux_types.h
++
++--- a/tools/include/tools/be_byteshift.h
+++++ b/tools/include/tools/be_byteshift.h
++@@ -2,6 +2,10 @@
++ #ifndef _TOOLS_BE_BYTESHIFT_H
++ #define _TOOLS_BE_BYTESHIFT_H
++ 
+++#ifndef __linux__
+++#include "linux_types.h"
+++#endif
+++
++ #include <stdint.h>
++ 
++ static inline uint16_t __get_unaligned_be16(const uint8_t *p)
++--- a/tools/include/tools/le_byteshift.h
+++++ b/tools/include/tools/le_byteshift.h
++@@ -2,6 +2,10 @@
++ #ifndef _TOOLS_LE_BYTESHIFT_H
++ #define _TOOLS_LE_BYTESHIFT_H
++ 
+++#ifndef __linux__
+++#include "linux_types.h"
+++#endif
+++
++ #include <stdint.h>
++ 
++ static inline uint16_t __get_unaligned_le16(const uint8_t *p)
++--- /dev/null
+++++ b/tools/include/tools/linux_types.h
++@@ -0,0 +1,26 @@
+++#ifndef __LINUX_TYPES_H
+++#define __LINUX_TYPES_H
+++
+++#include <stdint.h>
+++
+++typedef int8_t __s8;
+++typedef uint8_t __u8;
+++typedef uint8_t __be8;
+++typedef uint8_t __le8;
+++
+++typedef int16_t __s16;
+++typedef uint16_t __u16;
+++typedef uint16_t __be16;
+++typedef uint16_t __le16;
+++
+++typedef int32_t __s32;
+++typedef uint32_t __u32;
+++typedef uint32_t __be32;
+++typedef uint32_t __le32;
+++
+++typedef int64_t __s64;
+++typedef uint64_t __u64;
+++typedef uint64_t __be64;
+++typedef uint64_t __le64;
+++
+++#endif
++--- a/tools/include/linux/types.h
+++++ b/tools/include/linux/types.h
++@@ -7,8 +7,12 @@
++ #include <stdint.h>
++ 
++ #define __SANE_USERSPACE_TYPES__	/* For PPC64, to get LL64 types */
+++#ifndef __linux__
+++#include <tools/linux_types.h>
+++#else
++ #include <asm/types.h>
++ #include <asm/posix_types.h>
+++#endif
++ 
++ struct page;
++ struct kmem_cache;
++--- a/tools/perf/pmu-events/jevents.c
+++++ b/tools/perf/pmu-events/jevents.c
++@@ -1,4 +1,6 @@
+++#ifdef __linux__
++ #define  _XOPEN_SOURCE 500	/* needed for nftw() */
+++#endif
++ #define  _GNU_SOURCE		/* needed for asprintf() */
++ 
++ /* Parse event JSON files */
++@@ -35,6 +37,7 @@
++ #include <stdlib.h>
++ #include <errno.h>
++ #include <string.h>
+++#include <strings.h>
++ #include <ctype.h>
++ #include <unistd.h>
++ #include <stdarg.h>
++--- a/tools/perf/pmu-events/json.c
+++++ b/tools/perf/pmu-events/json.c
++@@ -38,7 +38,6 @@
++ #include <unistd.h>
++ #include "jsmn.h"
++ #include "json.h"
++-#include <linux/kernel.h>
++ 
++ 
++ static char *mapfile(const char *fn, size_t *size)
+diff --git a/target/linux/generic/hack-5.4/214-spidev_h_portability.patch b/target/linux/generic/hack-5.4/214-spidev_h_portability.patch
+new file mode 100644
+index 0000000000..415e9a423c
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/214-spidev_h_portability.patch
+@@ -0,0 +1,24 @@
++From be9be95ff10e16a5b4ad36f903978d0cc5747024 Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 7 Jul 2017 17:04:08 +0200
++Subject: kernel: fix linux/spi/spidev.h portability issues with musl
++
++Felix will try to get this define included into musl
++
++lede-commit: 795e7cf60de19e7a076a46874fab7bb88b43bbff
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ include/uapi/linux/spi/spidev.h | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/include/uapi/linux/spi/spidev.h
+++++ b/include/uapi/linux/spi/spidev.h
++@@ -117,7 +117,7 @@ struct spi_ioc_transfer {
++ 
++ /* not all platforms use <asm-generic/ioctl.h> or _IOC_TYPECHECK() ... */
++ #define SPI_MSGSIZE(N) \
++-	((((N)*(sizeof (struct spi_ioc_transfer))) < (1 << _IOC_SIZEBITS)) \
+++	((((N)*(sizeof (struct spi_ioc_transfer))) < (1 << 13)) \
++ 		? ((N)*(sizeof (struct spi_ioc_transfer))) : 0)
++ #define SPI_IOC_MESSAGE(N) _IOW(SPI_IOC_MAGIC, 0, char[SPI_MSGSIZE(N)])
++ 
+diff --git a/target/linux/generic/hack-5.4/220-gc_sections.patch b/target/linux/generic/hack-5.4/220-gc_sections.patch
+new file mode 100644
+index 0000000000..9b665f644a
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/220-gc_sections.patch
+@@ -0,0 +1,144 @@
++From e3d8676f5722b7622685581e06e8f53e6138e3ab Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sat, 15 Jul 2017 23:42:36 +0200
++Subject: use -ffunction-sections, -fdata-sections and --gc-sections
++
++In combination with kernel symbol export stripping this significantly reduces
++the kernel image size. Used on both ARM and MIPS architectures.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++Signed-off-by: Jonas Gorski <jogo@openwrt.org>
++Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
++---
++ Makefile                          | 10 +++----
++ arch/arm/Kconfig                  |  1 +
++ arch/arm/boot/compressed/Makefile |  1 +
++ arch/arm/kernel/vmlinux.lds.S     | 26 ++++++++--------
++ arch/mips/Kconfig                 |  1 +
++ arch/mips/kernel/vmlinux.lds.S    |  4 +--
++ include/asm-generic/vmlinux.lds.h | 63 ++++++++++++++++++++-------------------
++ 7 files changed, 55 insertions(+), 51 deletions(-)
++
++--- a/arch/arm/Kconfig
+++++ b/arch/arm/Kconfig
++@@ -112,6 +112,7 @@ config ARM
++ 	select HAVE_UID16
++ 	select HAVE_VIRT_CPU_ACCOUNTING_GEN
++ 	select IRQ_FORCED_THREADING
+++	select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
++ 	select MODULES_USE_ELF_REL
++ 	select NEED_DMA_MAP_STATE
++ 	select OF_EARLY_FLATTREE if OF
++--- a/arch/arm/boot/compressed/Makefile
+++++ b/arch/arm/boot/compressed/Makefile
++@@ -108,6 +108,7 @@ ifeq ($(CONFIG_FUNCTION_TRACER),y)
++ ORIG_CFLAGS := $(KBUILD_CFLAGS)
++ KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
++ endif
+++KBUILD_CFLAGS_KERNEL := $(patsubst -f%-sections,,$(KBUILD_CFLAGS_KERNEL))
++ 
++ # -fstack-protector-strong triggers protection checks in this code,
++ # but it is being used too early to link to meaningful stack_chk logic.
++--- a/arch/arm/kernel/vmlinux.lds.S
+++++ b/arch/arm/kernel/vmlinux.lds.S
++@@ -75,7 +75,7 @@ SECTIONS
++ 	. = ALIGN(4);
++ 	__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
++ 		__start___ex_table = .;
++-		ARM_MMU_KEEP(*(__ex_table))
+++		KEEP(*(__ex_table))
++ 		__stop___ex_table = .;
++ 	}
++ @@ -100,24 +100,24 @@ SECTIONS
++ 	}
++ 	.init.arch.info : {
++ 		__arch_info_begin = .;
++-		*(.arch.info.init)
+++		KEEP(*(.arch.info.init))
++ 		__arch_info_end = .;
++ 	}
++ 	.init.tagtable : {
++ 		__tagtable_begin = .;
++-		*(.taglist.init)
+++		KEEP(*(.taglist.init))
++ 		__tagtable_end = .;
++ 	}
++ #ifdef CONFIG_SMP_ON_UP
++ 	.init.smpalt : {
++ 		__smpalt_begin = .;
++-		*(.alt.smp.init)
+++		KEEP(*(.alt.smp.init))
++ 		__smpalt_end = .;
++ 	}
++ #endif
++ 	.init.pv_table : {
++ 		__pv_table_begin = .;
++-		*(.pv_table)
+++		KEEP(*(.pv_table))
++ 		__pv_table_end = .;
++ 	}
++ 
++--- a/arch/arm/kernel/vmlinux.lds.h
+++++ b/arch/arm/kernel/vmlinux.lds.h
++@@ -22,13 +22,13 @@
++ #define ARM_MMU_DISCARD(x)
++ #else
++ #define ARM_MMU_KEEP(x)
++-#define ARM_MMU_DISCARD(x)	x
+++#define ARM_MMU_DISCARD(x)	KEEP(x)
++ #endif
++ 
++ #define PROC_INFO							\
++ 		. = ALIGN(4);						\
++ 		__proc_info_begin = .;					\
++-		*(.proc.info.init)					\
+++		KEEP(*(.proc.info.init))				\
++ 		__proc_info_end = .;
++ 
++ #define HYPERVISOR_TEXT							\
++@@ -39,11 +39,11 @@
++ #define IDMAP_TEXT							\
++ 		ALIGN_FUNCTION();					\
++ 		__idmap_text_start = .;					\
++-		*(.idmap.text)						\
+++		KEEP(*(.idmap.text))					\
++ 		__idmap_text_end = .;					\
++ 		. = ALIGN(PAGE_SIZE);					\
++ 		__hyp_idmap_text_start = .;				\
++-		*(.hyp.idmap.text)					\
+++		KEEP(*(.hyp.idmap.text))				\
++ 		__hyp_idmap_text_end = .;
++ 
++ #define ARM_DISCARD							\
++@@ -86,12 +86,12 @@
++ 	. = ALIGN(8);							\
++ 	.ARM.unwind_idx : {						\
++ 		__start_unwind_idx = .;					\
++-		*(.ARM.exidx*)						\
+++		KEEP(*(.ARM.exidx*))					\
++ 		__stop_unwind_idx = .;					\
++ 	}								\
++ 	.ARM.unwind_tab : {						\
++ 		__start_unwind_tab = .;					\
++-		*(.ARM.extab*)						\
+++		KEEP(*(.ARM.extab*))					\
++ 		__stop_unwind_tab = .;					\
++ 	}
++ 
++@@ -102,14 +102,14 @@
++ #define ARM_VECTORS							\
++ 	__vectors_start = .;						\
++ 	.vectors 0xffff0000 : AT(__vectors_start) {			\
++-		*(.vectors)						\
+++		KEEP(*(.vectors))					\
++ 	}								\
++ 	. = __vectors_start + SIZEOF(.vectors);				\
++ 	__vectors_end = .;						\
++ 									\
++ 	__stubs_start = .;						\
++ 	.stubs ADDR(.vectors) + 0x1000 : AT(__stubs_start) {		\
++-		*(.stubs)						\
+++		KEEP(*(.stubs))						\
++ 	}								\
++ 	. = __stubs_start + SIZEOF(.stubs);				\
++ 	__stubs_end = .;						\
+diff --git a/target/linux/generic/hack-5.4/221-module_exports.patch b/target/linux/generic/hack-5.4/221-module_exports.patch
+new file mode 100644
+index 0000000000..47f40ac5e1
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/221-module_exports.patch
+@@ -0,0 +1,109 @@
++From b14784e7883390c20ed3ff904892255404a5914b Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 7 Jul 2017 17:05:53 +0200
++Subject: add an optional config option for stripping all unnecessary symbol exports from the kernel image
++
++lede-commit: bb5a40c64b7c4f4848509fa0a6625055fc9e66cc
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ include/asm-generic/vmlinux.lds.h | 18 +++++++++++++++---
++ include/linux/export.h            |  9 ++++++++-
++ scripts/Makefile.build            |  2 +-
++ 3 files changed, 24 insertions(+), 5 deletions(-)
++
++--- a/include/asm-generic/vmlinux.lds.h
+++++ b/include/asm-generic/vmlinux.lds.h
++@@ -54,6 +54,16 @@
++ #define LOAD_OFFSET 0
++ #endif
++ 
+++#ifndef SYMTAB_KEEP
+++#define SYMTAB_KEEP KEEP(*(SORT(___ksymtab+*)))
+++#define SYMTAB_KEEP_GPL KEEP(*(SORT(___ksymtab_gpl+*)))
+++#endif
+++
+++#ifndef SYMTAB_DISCARD
+++#define SYMTAB_DISCARD
+++#define SYMTAB_DISCARD_GPL
+++#endif
+++
++ /* Align . to a 8 byte boundary equals to maximum function alignment. */
++ #define ALIGN_FUNCTION()  . = ALIGN(8)
++ 
++@@ -407,14 +417,14 @@
++ 	/* Kernel symbol table: Normal symbols */			\
++ 	__ksymtab         : AT(ADDR(__ksymtab) - LOAD_OFFSET) {		\
++ 		__start___ksymtab = .;					\
++-		KEEP(*(SORT(___ksymtab+*)))				\
+++		SYMTAB_KEEP						\
++ 		__stop___ksymtab = .;					\
++ 	}								\
++ 									\
++ 	/* Kernel symbol table: GPL-only symbols */			\
++ 	__ksymtab_gpl     : AT(ADDR(__ksymtab_gpl) - LOAD_OFFSET) {	\
++ 		__start___ksymtab_gpl = .;				\
++-		KEEP(*(SORT(___ksymtab_gpl+*)))				\
+++		SYMTAB_KEEP_GPL						\
++ 		__stop___ksymtab_gpl = .;				\
++ 	}								\
++ 									\
++@@ -476,7 +486,7 @@
++ 									\
++ 	/* Kernel symbol table: strings */				\
++         __ksymtab_strings : AT(ADDR(__ksymtab_strings) - LOAD_OFFSET) {	\
++-		*(__ksymtab_strings)					\
+++		*(__ksymtab_strings+*)					\
++ 	}								\
++ 									\
++ 	/* __*init sections */						\
++@@ -905,6 +915,8 @@
++ 	EXIT_TEXT							\
++ 	EXIT_DATA							\
++ 	EXIT_CALL							\
+++	SYMTAB_DISCARD							\
+++	SYMTAB_DISCARD_GPL						\
++ 	*(.discard)							\
++ 	*(.discard.*)							\
++ 	*(.modinfo)							\
++--- a/include/linux/export.h
+++++ b/include/linux/export.h
++@@ -98,18 +98,26 @@ struct kernel_symbol {
++ 
++ #else
++ 
+++#ifdef MODULE
+++#define __EXPORT_SUFFIX(sym)
+++#else
+++#define __EXPORT_SUFFIX(sym) "+" #sym
+++#endif
+++
++ #define ___export_symbol_common(sym, sec)				\
++ 	extern typeof(sym) sym;						\
++ 	__CRC_SYMBOL(sym, sec);						\
++ 	static const char __kstrtab_##sym[]				\
++-	__attribute__((section("__ksymtab_strings"), used, aligned(1)))	\
+++	__attribute__((section("__ksymtab_strings"			\
+++	  __EXPORT_SUFFIX(sym)), used, aligned(1)))			\
++ 	= #sym								\
++ 
++ /* For every exported symbol, place a struct in the __ksymtab section */
++ #define ___EXPORT_SYMBOL_NS(sym, sec, ns)				\
++ 	___export_symbol_common(sym, sec);				\
++ 	static const char __kstrtabns_##sym[]				\
++-	__attribute__((section("__ksymtab_strings"), used, aligned(1)))	\
+++	__attribute__((section("__ksymtab_strings"			\
+++	  __EXPORT_SUFFIX(sym)), used, aligned(1)))			\
++ 	= #ns;								\
++ 	__KSYMTAB_ENTRY_NS(sym, sec)
++ 
++--- a/scripts/Makefile.build
+++++ b/scripts/Makefile.build
++@@ -350,7 +350,7 @@ targets += $(extra-y) $(MAKECMDGOALS) $(
++ # Linker scripts preprocessor (.lds.S -> .lds)
++ # ---------------------------------------------------------------------------
++ quiet_cmd_cpp_lds_S = LDS     $@
++-      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -U$(ARCH) \
+++      cmd_cpp_lds_S = $(CPP) $(EXTRA_LDSFLAGS) $(cpp_flags) -P -U$(ARCH) \
++ 	                     -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
++ 
++ $(obj)/%.lds: $(src)/%.lds.S FORCE
+diff --git a/target/linux/generic/hack-5.4/230-openwrt_lzma_options.patch b/target/linux/generic/hack-5.4/230-openwrt_lzma_options.patch
+new file mode 100644
+index 0000000000..809ccbc1e5
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/230-openwrt_lzma_options.patch
+@@ -0,0 +1,71 @@
++From b3d00b452467f621317953d9e4c6f9ae8dcfd271 Mon Sep 17 00:00:00 2001
++From: Imre Kaloz <kaloz@openwrt.org>
++Date: Fri, 7 Jul 2017 17:06:55 +0200
++Subject: use the openwrt lzma options for now
++
++lede-commit: 548de949f392049420a6a1feeef118b30ab8ea8c
++Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
++---
++ lib/decompress.c              |  1 +
++ scripts/Makefile.lib          |  2 +-
++ usr/gen_initramfs_list.sh | 10 +++++-----
++ 3 files changed, 7 insertions(+), 6 deletions(-)
++
++--- a/lib/decompress.c
+++++ b/lib/decompress.c
++@@ -49,6 +49,7 @@ static const struct compress_format comp
++ 	{ {0x1f, 0x9e}, "gzip", gunzip },
++ 	{ {0x42, 0x5a}, "bzip2", bunzip2 },
++ 	{ {0x5d, 0x00}, "lzma", unlzma },
+++	{ {0x6d, 0x00}, "lzma-openwrt", unlzma },
++ 	{ {0xfd, 0x37}, "xz", unxz },
++ 	{ {0x89, 0x4c}, "lzo", unlzo },
++ 	{ {0x02, 0x21}, "lz4", unlz4 },
++--- a/scripts/Makefile.lib
+++++ b/scripts/Makefile.lib
++@@ -328,7 +328,7 @@ quiet_cmd_bzip2 = BZIP2   $@
++ # ---------------------------------------------------------------------------
++ 
++ quiet_cmd_lzma = LZMA    $@
++-      cmd_lzma = { cat $(real-prereqs) | $(LZMA) -9; $(size_append); } > $@
+++      cmd_lzma = { cat $(real-prereqs) | $(LZMA) e -d20 -lc1 -lp2 -pb2 -eos -si -so; $(size_append); } > $@
++ 
++ quiet_cmd_lzo = LZO     $@
++       cmd_lzo = { cat $(real-prereqs) | $(KLZOP) -9; $(size_append); } > $@
++--- a/usr/gen_initramfs_list.sh
+++++ b/usr/gen_initramfs_list.sh
++@@ -229,7 +229,7 @@ cpio_list=
++ output="/dev/stdout"
++ output_file=""
++ is_cpio_compressed=
++-compr="gzip -n -9 -f"
+++compr="gzip -n -9 -f -"
++ 
++ arg="$1"
++ case "$arg" in
++@@ -245,13 +245,13 @@ case "$arg" in
++ 		output=${cpio_list}
++ 		echo "$output_file" | grep -q "\.gz$" \
++                 && [ -x "`which gzip 2> /dev/null`" ] \
++-                && compr="gzip -n -9 -f"
+++                && compr="gzip -n -9 -f -"
++ 		echo "$output_file" | grep -q "\.bz2$" \
++                 && [ -x "`which bzip2 2> /dev/null`" ] \
++-                && compr="bzip2 -9 -f"
+++                && compr="bzip2 -9 -f -"
++ 		echo "$output_file" | grep -q "\.lzma$" \
++                 && [ -x "`which lzma 2> /dev/null`" ] \
++-                && compr="lzma -9 -f"
+++                && compr="lzma e -d20 -lc1 -lp2 -pb2 -eos -si -so"
++ 		echo "$output_file" | grep -q "\.xz$" \
++                 && [ -x "`which xz 2> /dev/null`" ] \
++                 && compr="xz --check=crc32 --lzma2=dict=1MiB"
++@@ -320,7 +320,7 @@ if [ ! -z ${output_file} ]; then
++ 	if [ "${is_cpio_compressed}" = "compressed" ]; then
++ 		cat ${cpio_tfile} > ${output_file}
++ 	else
++-		(cat ${cpio_tfile} | ${compr}  - > ${output_file}) \
+++		(cat ${cpio_tfile} | ${compr} > ${output_file}) \
++ 		|| (rm -f ${output_file} ; false)
++ 	fi
++ 	[ -z ${cpio_file} ] && rm ${cpio_tfile}
+diff --git a/target/linux/generic/hack-5.4/249-udp-tunnel-selection.patch b/target/linux/generic/hack-5.4/249-udp-tunnel-selection.patch
+new file mode 100644
+index 0000000000..2c74298dfe
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/249-udp-tunnel-selection.patch
+@@ -0,0 +1,11 @@
++--- a/net/ipv4/Kconfig
+++++ b/net/ipv4/Kconfig
++@@ -315,7 +315,7 @@ config NET_IPVTI
++ 	  on top.
++ 
++ config NET_UDP_TUNNEL
++-	tristate
+++	tristate "IP: UDP tunneling support"
++ 	select NET_IP_TUNNEL
++ 	default n
++ 
+diff --git a/target/linux/generic/hack-5.4/250-netfilter_depends.patch b/target/linux/generic/hack-5.4/250-netfilter_depends.patch
+new file mode 100644
+index 0000000000..d03cb53180
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/250-netfilter_depends.patch
+@@ -0,0 +1,27 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: hack: net: remove bogus netfilter dependencies
++
++lede-commit: 589d2a377dee27d206fc3725325309cf649e4df6
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ net/netfilter/Kconfig | 2 --
++ 1 file changed, 2 deletions(-)
++
++--- a/net/netfilter/Kconfig
+++++ b/net/netfilter/Kconfig
++@@ -228,7 +228,6 @@ config NF_CONNTRACK_FTP
++ 
++ config NF_CONNTRACK_H323
++ 	tristate "H.323 protocol support"
++-	depends on IPV6 || IPV6=n
++ 	depends on NETFILTER_ADVANCED
++ 	help
++ 	  H.323 is a VoIP signalling protocol from ITU-T. As one of the most
++@@ -1088,7 +1087,6 @@ config NETFILTER_XT_TARGET_SECMARK
++ 
++ config NETFILTER_XT_TARGET_TCPMSS
++ 	tristate '"TCPMSS" target support'
++-	depends on IPV6 || IPV6=n
++ 	default m if NETFILTER_ADVANCED=n
++ 	---help---
++ 	  This option adds a `TCPMSS' target, which allows you to alter the
+diff --git a/target/linux/generic/hack-5.4/251-sound_kconfig.patch b/target/linux/generic/hack-5.4/251-sound_kconfig.patch
+new file mode 100644
+index 0000000000..f593417c9d
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/251-sound_kconfig.patch
+@@ -0,0 +1,199 @@
++From da3c50704f14132f4adf80d48e9a4cd5d46e54c9 Mon Sep 17 00:00:00 2001
++From: John Crispin <john@phrozen.org>
++Date: Fri, 7 Jul 2017 17:09:21 +0200
++Subject: kconfig: owrt specifc dependencies
++
++Signed-off-by: John Crispin <john@phrozen.org>
++---
++ crypto/Kconfig        | 10 +++++-----
++ drivers/bcma/Kconfig  |  1 +
++ drivers/ssb/Kconfig   |  3 ++-
++ lib/Kconfig           |  8 ++++----
++ net/netfilter/Kconfig |  2 +-
++ net/wireless/Kconfig  | 17 ++++++++++-------
++ sound/core/Kconfig    |  4 ++--
++ 7 files changed, 25 insertions(+), 20 deletions(-)
++
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -33,7 +33,7 @@ config CRYPTO_FIPS
++ 	  this is.
++ 
++ config CRYPTO_ALGAPI
++-	tristate
+++	tristate "ALGAPI"
++ 	select CRYPTO_ALGAPI2
++ 	help
++ 	  This option provides the API for cryptographic algorithms.
++@@ -42,7 +42,7 @@ config CRYPTO_ALGAPI2
++ 	tristate
++ 
++ config CRYPTO_AEAD
++-	tristate
+++	tristate "AEAD"
++ 	select CRYPTO_AEAD2
++ 	select CRYPTO_ALGAPI
++ 
++@@ -53,7 +53,7 @@ config CRYPTO_AEAD2
++ 	select CRYPTO_RNG2
++ 
++ config CRYPTO_BLKCIPHER
++-	tristate
+++	tristate "BLKCIPHER"
++ 	select CRYPTO_BLKCIPHER2
++ 	select CRYPTO_ALGAPI
++ 
++@@ -63,7 +63,7 @@ config CRYPTO_BLKCIPHER2
++ 	select CRYPTO_RNG2
++ 
++ config CRYPTO_HASH
++-	tristate
+++	tristate "HASH"
++ 	select CRYPTO_HASH2
++ 	select CRYPTO_ALGAPI
++ 
++@@ -72,7 +72,7 @@ config CRYPTO_HASH2
++ 	select CRYPTO_ALGAPI2
++ 
++ config CRYPTO_RNG
++-	tristate
+++	tristate "RNG"
++ 	select CRYPTO_RNG2
++ 	select CRYPTO_ALGAPI
++ 
++--- a/drivers/bcma/Kconfig
+++++ b/drivers/bcma/Kconfig
++@@ -16,6 +16,7 @@ if BCMA
++ # Support for Block-I/O. SELECT this from the driver that needs it.
++ config BCMA_BLOCKIO
++ 	bool
+++	default y
++ 
++ config BCMA_HOST_PCI_POSSIBLE
++ 	bool
++--- a/drivers/ssb/Kconfig
+++++ b/drivers/ssb/Kconfig
++@@ -29,6 +29,7 @@ config SSB_SPROM
++ config SSB_BLOCKIO
++ 	bool
++ 	depends on SSB
+++	default y
++ 
++ config SSB_PCIHOST_POSSIBLE
++ 	bool
++@@ -49,7 +50,7 @@ config SSB_PCIHOST
++ config SSB_B43_PCI_BRIDGE
++ 	bool
++ 	depends on SSB_PCIHOST
++-	default n
+++	default y
++ 
++ config SSB_PCMCIAHOST_POSSIBLE
++ 	bool
++--- a/lib/Kconfig
+++++ b/lib/Kconfig
++@@ -402,16 +402,16 @@ config BCH_CONST_T
++ # Textsearch support is select'ed if needed
++ #
++ config TEXTSEARCH
++-	bool
+++	bool "Textsearch support"
++ 
++ config TEXTSEARCH_KMP
++-	tristate
+++	tristate "Textsearch KMP"
++ 
++ config TEXTSEARCH_BM
++-	tristate
+++	tristate "Textsearch BM"
++ 
++ config TEXTSEARCH_FSM
++-	tristate
+++	tristate "Textsearch FSM"
++ 
++ config BTREE
++ 	bool
++--- a/net/netfilter/Kconfig
+++++ b/net/netfilter/Kconfig
++@@ -11,7 +11,7 @@ config NETFILTER_INGRESS
++ 	  infrastructure.
++ 
++ config NETFILTER_NETLINK
++-	tristate
+++	tristate "Netfilter NFNETLINK interface"
++ 
++ config NETFILTER_FAMILY_BRIDGE
++ 	bool
++--- a/net/wireless/Kconfig
+++++ b/net/wireless/Kconfig
++@@ -1,6 +1,6 @@
++ # SPDX-License-Identifier: GPL-2.0-only
++ config WIRELESS_EXT
++-	bool
+++	bool "Wireless extensions"
++ 
++ config WEXT_CORE
++ 	def_bool y
++@@ -12,10 +12,10 @@ config WEXT_PROC
++ 	depends on WEXT_CORE
++ 
++ config WEXT_SPY
++-	bool
+++	bool "WEXT_SPY"
++ 
++ config WEXT_PRIV
++-	bool
+++	bool "WEXT_PRIV"
++ 
++ config CFG80211
++ 	tristate "cfg80211 - wireless configuration API"
++@@ -203,7 +203,7 @@ config CFG80211_WEXT_EXPORT
++ endif # CFG80211
++ 
++ config LIB80211
++-	tristate
+++	tristate "LIB80211"
++ 	default n
++ 	help
++ 	  This options enables a library of common routines used
++@@ -212,17 +212,17 @@ config LIB80211
++ 	  Drivers should select this themselves if needed.
++ 
++ config LIB80211_CRYPT_WEP
++-	tristate
+++	tristate "LIB80211_CRYPT_WEP"
++ 	select CRYPTO_LIB_ARC4
++ 
++ config LIB80211_CRYPT_CCMP
++-	tristate
+++	tristate "LIB80211_CRYPT_CCMP"
++ 	select CRYPTO
++ 	select CRYPTO_AES
++ 	select CRYPTO_CCM
++ 
++ config LIB80211_CRYPT_TKIP
++-	tristate
+++	tristate "LIB80211_CRYPT_TKIP"
++ 	select CRYPTO_LIB_ARC4
++ 
++ config LIB80211_DEBUG
++--- a/sound/core/Kconfig
+++++ b/sound/core/Kconfig
++@@ -17,7 +17,7 @@ config SND_DMAENGINE_PCM
++ 	tristate
++ 
++ config SND_HWDEP
++-	tristate
+++	tristate "Sound hardware support"
++ 
++ config SND_SEQ_DEVICE
++ 	tristate
++@@ -27,7 +27,7 @@ config SND_RAWMIDI
++ 	select SND_SEQ_DEVICE if SND_SEQUENCER != n
++ 
++ config SND_COMPRESS_OFFLOAD
++-	tristate
+++	tristate "Compression offloading support"
++ 
++ config SND_JACK
++ 	bool
+diff --git a/target/linux/generic/hack-5.4/259-regmap_dynamic.patch b/target/linux/generic/hack-5.4/259-regmap_dynamic.patch
+new file mode 100644
+index 0000000000..812e182467
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/259-regmap_dynamic.patch
+@@ -0,0 +1,125 @@
++From 811d9e2268a62b830cfe93cd8bc929afcb8b198b Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sat, 15 Jul 2017 21:12:38 +0200
++Subject: kernel: move regmap bloat out of the kernel image if it is only being used in modules
++
++lede-commit: 96f39119815028073583e4fca3a9c5fe9141e998
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ drivers/base/regmap/Kconfig  | 15 ++++++++++-----
++ drivers/base/regmap/Makefile | 12 ++++++++----
++ drivers/base/regmap/regmap.c |  3 +++
++ include/linux/regmap.h       |  2 +-
++ 4 files changed, 22 insertions(+), 10 deletions(-)
++
++--- a/drivers/base/regmap/Kconfig
+++++ b/drivers/base/regmap/Kconfig
++@@ -4,9 +4,8 @@
++ # subsystems should select the appropriate symbols.
++ 
++ config REGMAP
++-	default y if (REGMAP_I2C || REGMAP_SPI || REGMAP_SPMI || REGMAP_W1 || REGMAP_AC97 || REGMAP_MMIO || REGMAP_IRQ || REGMAP_SCCB || REGMAP_I3C)
++ 	select IRQ_DOMAIN if REGMAP_IRQ
++-	bool
+++	tristate
++ 
++ config REGCACHE_COMPRESSED
++ 	select LZO_COMPRESS
++@@ -18,38 +17,49 @@ config REGMAP_AC97
++ 
++ config REGMAP_I2C
++ 	tristate
+++	select REGMAP
++ 	depends on I2C
++ 
++ config REGMAP_SLIMBUS
++ 	tristate
+++	select REGMAP
++ 	depends on SLIMBUS
++ 
++ config REGMAP_SPI
++ 	tristate
+++	select REGMAP
+++	depends on SPI_MASTER
++ 	depends on SPI
++ 
++ config REGMAP_SPMI
++ 	tristate
+++	select REGMAP
++ 	depends on SPMI
++ 
++ config REGMAP_W1
++ 	tristate
+++	select REGMAP
++ 	depends on W1
++ 
++ config REGMAP_MMIO
++ 	tristate
+++	select REGMAP
++ 
++ config REGMAP_IRQ
++ 	bool
+++	select REGMAP
++ 
++ config REGMAP_SOUNDWIRE
++ 	tristate
+++	select REGMAP
++ 	depends on SOUNDWIRE
++ 
++ config REGMAP_SCCB
++ 	tristate
+++	select REGMAP
++ 	depends on I2C
++ 
++ config REGMAP_I3C
++ 	tristate
+++	select REGMAP
++ 	depends on I3C
++--- a/drivers/base/regmap/Makefile
+++++ b/drivers/base/regmap/Makefile
++@@ -2,10 +2,14 @@
++ # For include/trace/define_trace.h to include trace.h
++ CFLAGS_regmap.o := -I$(src)
++ 
++-obj-$(CONFIG_REGMAP) += regmap.o regcache.o
++-obj-$(CONFIG_REGMAP) += regcache-rbtree.o regcache-flat.o
++-obj-$(CONFIG_REGCACHE_COMPRESSED) += regcache-lzo.o
++-obj-$(CONFIG_DEBUG_FS) += regmap-debugfs.o
+++regmap-core-objs = regmap.o regcache.o regcache-rbtree.o regcache-flat.o
+++ifdef CONFIG_DEBUG_FS
+++regmap-core-objs += regmap-debugfs.o
+++endif
+++ifdef CONFIG_REGCACHE_COMPRESSED
+++regmap-core-objs += regcache-lzo.o
+++endif
+++obj-$(CONFIG_REGMAP) += regmap-core.o
++ obj-$(CONFIG_REGMAP_AC97) += regmap-ac97.o
++ obj-$(CONFIG_REGMAP_I2C) += regmap-i2c.o
++ obj-$(CONFIG_REGMAP_SLIMBUS) += regmap-slimbus.o
++--- a/drivers/base/regmap/regmap.c
+++++ b/drivers/base/regmap/regmap.c
++@@ -9,6 +9,7 @@
++ #include <linux/device.h>
++ #include <linux/slab.h>
++ #include <linux/export.h>
+++#include <linux/module.h>
++ #include <linux/mutex.h>
++ #include <linux/err.h>
++ #include <linux/of.h>
++@@ -3118,3 +3119,5 @@ static int __init regmap_initcall(void)
++ 	return 0;
++ }
++ postcore_initcall(regmap_initcall);
+++
+++MODULE_LICENSE("GPL");
++--- a/include/linux/regmap.h
+++++ b/include/linux/regmap.h
++@@ -185,7 +185,7 @@ struct reg_sequence {
++ 	pollret ?: ((cond) ? 0 : -ETIMEDOUT); \
++ })
++ 
++-#ifdef CONFIG_REGMAP
+++#if IS_REACHABLE(CONFIG_REGMAP)
++ 
++ enum regmap_endian {
++ 	/* Unspecified -> 0 -> Backwards compatible default */
+diff --git a/target/linux/generic/hack-5.4/260-crypto_test_dependencies.patch b/target/linux/generic/hack-5.4/260-crypto_test_dependencies.patch
+new file mode 100644
+index 0000000000..c1b0b8551e
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/260-crypto_test_dependencies.patch
+@@ -0,0 +1,52 @@
++From fd1799b0bf5efa46dd3e6dfbbf3955564807e508 Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 7 Jul 2017 17:12:51 +0200
++Subject: kernel: prevent cryptomgr from pulling in useless extra dependencies for tests that are not run
++
++Reduces kernel size after LZMA by about 5k on MIPS
++
++lede-commit: 044c316167e076479a344c59905e5b435b84a77f
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ crypto/Kconfig   | 13 ++++++-------
++ crypto/algboss.c |  4 ++++
++ 2 files changed, 10 insertions(+), 7 deletions(-)
++
++--- a/crypto/Kconfig
+++++ b/crypto/Kconfig
++@@ -120,13 +120,13 @@ config CRYPTO_MANAGER
++ 	  cbc(aes).
++ 
++ config CRYPTO_MANAGER2
++-	def_tristate CRYPTO_MANAGER || (CRYPTO_MANAGER!=n && CRYPTO_ALGAPI=y)
++-	select CRYPTO_AEAD2
++-	select CRYPTO_HASH2
++-	select CRYPTO_BLKCIPHER2
++-	select CRYPTO_AKCIPHER2
++-	select CRYPTO_KPP2
++-	select CRYPTO_ACOMP2
+++	def_tristate CRYPTO_MANAGER || (CRYPTO_MANAGER!=n && CRYPTO_ALGAPI=y && !CRYPTO_MANAGER_DISABLE_TESTS)
+++	select CRYPTO_AEAD2 if !CRYPTO_MANAGER_DISABLE_TESTS
+++	select CRYPTO_HASH2 if !CRYPTO_MANAGER_DISABLE_TESTS
+++	select CRYPTO_BLKCIPHER2 if !CRYPTO_MANAGER_DISABLE_TESTS
+++	select CRYPTO_AKCIPHER2 if !CRYPTO_MANAGER_DISABLE_TESTS
+++	select CRYPTO_KPP2 if !CRYPTO_MANAGER_DISABLE_TESTS
+++	select CRYPTO_ACOMP2 if !CRYPTO_MANAGER_DISABLE_TESTS
++ 
++ config CRYPTO_USER
++ 	tristate "Userspace cryptographic algorithm configuration"
++--- a/crypto/algboss.c
+++++ b/crypto/algboss.c
++@@ -240,8 +240,12 @@ static int cryptomgr_schedule_test(struc
++ 	type = alg->cra_flags;
++ 
++ 	/* Do not test internal algorithms. */
+++#ifdef CONFIG_CRYPTO_MANAGER_DISABLE_TESTS
+++	type |= CRYPTO_ALG_TESTED;
+++#else
++ 	if (type & CRYPTO_ALG_INTERNAL)
++ 		type |= CRYPTO_ALG_TESTED;
+++#endif
++ 
++ 	param->type = type;
++ 
+diff --git a/target/linux/generic/hack-5.4/260-lib-arc4-unhide.patch b/target/linux/generic/hack-5.4/260-lib-arc4-unhide.patch
+new file mode 100644
+index 0000000000..a7668acfad
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/260-lib-arc4-unhide.patch
+@@ -0,0 +1,15 @@
++This makes it possible to select CONFIG_CRYPTO_LIB_ARC4 directly. We 
++need this to be able to compile this into the kernel and make use of it 
++from backports.
++
++--- a/lib/crypto/Kconfig
+++++ b/lib/crypto/Kconfig
++@@ -6,7 +6,7 @@ config CRYPTO_LIB_AES
++ 	tristate
++ 
++ config CRYPTO_LIB_ARC4
++-	tristate
+++	tristate "ARC4 cipher library"
++ 
++ config CRYPTO_ARCH_HAVE_LIB_BLAKE2S
++ 	tristate
+diff --git a/target/linux/generic/hack-5.4/280-rfkill-stubs.patch b/target/linux/generic/hack-5.4/280-rfkill-stubs.patch
+new file mode 100644
+index 0000000000..2e48aea1cf
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/280-rfkill-stubs.patch
+@@ -0,0 +1,84 @@
++From 236c1acdfef5958010ac9814a9872e0a46fd78ee Mon Sep 17 00:00:00 2001
++From: John Crispin <john@phrozen.org>
++Date: Fri, 7 Jul 2017 17:13:44 +0200
++Subject: rfkill: add fake rfkill support
++
++allow building of modules depending on RFKILL even if RFKILL is not enabled.
++
++Signed-off-by: John Crispin <john@phrozen.org>
++---
++ include/linux/rfkill.h |  2 +-
++ net/Makefile           |  2 +-
++ net/rfkill/Kconfig     | 14 +++++++++-----
++ net/rfkill/Makefile    |  2 +-
++ 4 files changed, 12 insertions(+), 8 deletions(-)
++
++--- a/include/linux/rfkill.h
+++++ b/include/linux/rfkill.h
++@@ -64,7 +64,7 @@ struct rfkill_ops {
++ 	int	(*set_block)(void *data, bool blocked);
++ };
++ 
++-#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
+++#if defined(CONFIG_RFKILL_FULL) || defined(CONFIG_RFKILL_FULL_MODULE)
++ /**
++  * rfkill_alloc - Allocate rfkill structure
++  * @name: name of the struct -- the string is not copied internally
++--- a/net/Makefile
+++++ b/net/Makefile
++@@ -53,7 +53,7 @@ obj-$(CONFIG_TIPC)		+= tipc/
++ obj-$(CONFIG_NETLABEL)		+= netlabel/
++ obj-$(CONFIG_IUCV)		+= iucv/
++ obj-$(CONFIG_SMC)		+= smc/
++-obj-$(CONFIG_RFKILL)		+= rfkill/
+++obj-$(CONFIG_RFKILL_FULL)	+= rfkill/
++ obj-$(CONFIG_NET_9P)		+= 9p/
++ obj-$(CONFIG_CAIF)		+= caif/
++ ifneq ($(CONFIG_DCB),)
++--- a/net/rfkill/Kconfig
+++++ b/net/rfkill/Kconfig
++@@ -2,7 +2,11 @@
++ #
++ # RF switch subsystem configuration
++ #
++-menuconfig RFKILL
+++config RFKILL
+++	bool
+++	default y
+++
+++menuconfig RFKILL_FULL
++ 	tristate "RF switch subsystem support"
++ 	help
++ 	  Say Y here if you want to have control over RF switches
++@@ -14,19 +18,19 @@ menuconfig RFKILL
++ # LED trigger support
++ config RFKILL_LEDS
++ 	bool
++-	depends on RFKILL
+++	depends on RFKILL_FULL
++ 	depends on LEDS_TRIGGERS = y || RFKILL = LEDS_TRIGGERS
++ 	default y
++ 
++ config RFKILL_INPUT
++ 	bool "RF switch input support" if EXPERT
++-	depends on RFKILL
+++	depends on RFKILL_FULL
++ 	depends on INPUT = y || RFKILL = INPUT
++ 	default y if !EXPERT
++ 
++ config RFKILL_GPIO
++ 	tristate "GPIO RFKILL driver"
++-	depends on RFKILL
+++	depends on RFKILL_FULL
++ 	depends on GPIOLIB || COMPILE_TEST
++ 	default n
++ 	help
++--- a/net/rfkill/Makefile
+++++ b/net/rfkill/Makefile
++@@ -5,5 +5,5 @@
++ 
++ rfkill-y			+= core.o
++ rfkill-$(CONFIG_RFKILL_INPUT)	+= input.o
++-obj-$(CONFIG_RFKILL)		+= rfkill.o
+++obj-$(CONFIG_RFKILL_FULL)	+= rfkill.o
++ obj-$(CONFIG_RFKILL_GPIO)	+= rfkill-gpio.o
+diff --git a/target/linux/generic/hack-5.4/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch b/target/linux/generic/hack-5.4/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch
+new file mode 100644
+index 0000000000..aed08a5ec9
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch
+@@ -0,0 +1,64 @@
++From: Ben Menchaca <ben.menchaca@qca.qualcomm.com>
++Date: Fri, 7 Jun 2013 18:35:22 -0500
++Subject: MIPS: r4k_cache: use more efficient cache blast
++
++Optimize the compiler output for larger cache blast cases that are
++common for DMA-based networking.
++
++Signed-off-by: Ben Menchaca <ben.menchaca@qca.qualcomm.com>
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++--- a/arch/mips/include/asm/r4kcache.h
+++++ b/arch/mips/include/asm/r4kcache.h
++@@ -617,14 +617,46 @@ static inline void prot##extra##blast_##
++ 						    unsigned long end)	\
++ {									\
++ 	unsigned long lsize = cpu_##desc##_line_size();			\
+++	unsigned long lsize_2 = lsize * 2;				\
+++	unsigned long lsize_3 = lsize * 3;				\
+++	unsigned long lsize_4 = lsize * 4;				\
+++	unsigned long lsize_5 = lsize * 5;				\
+++	unsigned long lsize_6 = lsize * 6;				\
+++	unsigned long lsize_7 = lsize * 7;				\
+++	unsigned long lsize_8 = lsize * 8;				\
++ 	unsigned long addr = start & ~(lsize - 1);			\
++-	unsigned long aend = (end - 1) & ~(lsize - 1);			\
+++	unsigned long aend = (end + lsize - 1) & ~(lsize - 1);		\
+++	int lines = (aend - addr) / lsize;				\
++ 									\
++-	while (1) {							\
+++	while (lines >= 8) {						\
+++		prot##cache_op(hitop, addr);				\
+++		prot##cache_op(hitop, addr + lsize);			\
+++		prot##cache_op(hitop, addr + lsize_2);			\
+++		prot##cache_op(hitop, addr + lsize_3);			\
+++		prot##cache_op(hitop, addr + lsize_4);			\
+++		prot##cache_op(hitop, addr + lsize_5);			\
+++		prot##cache_op(hitop, addr + lsize_6);			\
+++		prot##cache_op(hitop, addr + lsize_7);			\
+++		addr += lsize_8;					\
+++		lines -= 8;						\
+++	}								\
+++									\
+++	if (lines & 0x4) {						\
+++		prot##cache_op(hitop, addr);				\
+++		prot##cache_op(hitop, addr + lsize);			\
+++		prot##cache_op(hitop, addr + lsize_2);			\
+++		prot##cache_op(hitop, addr + lsize_3);			\
+++		addr += lsize_4;					\
+++	}								\
+++									\
+++	if (lines & 0x2) {						\
+++		prot##cache_op(hitop, addr);				\
+++		prot##cache_op(hitop, addr + lsize);			\
+++		addr += lsize_2;					\
+++	}								\
+++									\
+++	if (lines & 0x1) {						\
++ 		prot##cache_op(hitop, addr);				\
++-		if (addr == aend)					\
++-			break;						\
++-		addr += lsize;						\
++ 	}								\
++ }
++ 
+diff --git a/target/linux/generic/hack-5.4/301-mips_image_cmdline_hack.patch b/target/linux/generic/hack-5.4/301-mips_image_cmdline_hack.patch
+new file mode 100644
+index 0000000000..ada65cd2a0
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/301-mips_image_cmdline_hack.patch
+@@ -0,0 +1,38 @@
++From: John Crispin <john@phrozen.org>
++Subject: hack: kernel: add generic image_cmdline hack to MIPS targets
++
++lede-commit: d59f5b3a987a48508257a0ddbaeadc7909f9f976
++Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
++---
++ arch/mips/Kconfig       | 4 ++++
++ arch/mips/kernel/head.S | 6 ++++++
++ 2 files changed, 10 insertions(+)
++
++--- a/arch/mips/Kconfig
+++++ b/arch/mips/Kconfig
++@@ -1159,6 +1159,10 @@ config SYNC_R4K
++ config MIPS_MACHINE
++ 	def_bool n
++ 
+++config IMAGE_CMDLINE_HACK
+++	bool "OpenWrt specific image command line hack"
+++	default n
+++
++ config NO_IOPORT_MAP
++ 	def_bool n
++ 
++--- a/arch/mips/kernel/head.S
+++++ b/arch/mips/kernel/head.S
++@@ -79,6 +79,12 @@ FEXPORT(__kernel_entry)
++ 	j	kernel_entry
++ #endif /* CONFIG_BOOT_RAW */
++ 
+++#ifdef CONFIG_IMAGE_CMDLINE_HACK
+++	.ascii	"CMDLINE:"
+++EXPORT(__image_cmdline)
+++	.fill	0x400
+++#endif /* CONFIG_IMAGE_CMDLINE_HACK */
+++
++ 	__REF
++ 
++ NESTED(kernel_entry, 16, sp)			# kernel entry point
+diff --git a/target/linux/generic/hack-5.4/321-powerpc_crtsavres_prereq.patch b/target/linux/generic/hack-5.4/321-powerpc_crtsavres_prereq.patch
+new file mode 100644
+index 0000000000..8591705eae
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/321-powerpc_crtsavres_prereq.patch
+@@ -0,0 +1,39 @@
++From 107c0964cb8db7ca28ac5199426414fdab3c274d Mon Sep 17 00:00:00 2001
++From: "Alexandros C. Couloumbis" <alex@ozo.com>
++Date: Fri, 7 Jul 2017 17:14:51 +0200
++Subject: hack: arch: powerpc: drop register save/restore library from modules
++
++Upstream GCC uses a libgcc function for saving/restoring registers. This
++makes the code bigger, and upstream kernels need to carry that function
++for every single kernel module. Our GCC is patched to avoid those
++references, so we can drop the extra bloat for modules.
++
++lede-commit: e8e1084654f50904e6bf77b70b2de3f137d7b3ec
++Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
++---
++ arch/powerpc/Makefile | 1 -
++ 1 file changed, 1 deletion(-)
++
++--- a/arch/powerpc/Makefile
+++++ b/arch/powerpc/Makefile
++@@ -61,20 +61,6 @@ machine-$(CONFIG_PPC64) += 64
++ machine-$(CONFIG_CPU_LITTLE_ENDIAN) += le
++ UTS_MACHINE := $(subst $(space),,$(machine-y))
++ 
++-# XXX This needs to be before we override LD below
++-ifdef CONFIG_PPC32
++-KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o
++-else
++-KBUILD_LDS_MODULE += $(srctree)/arch/powerpc/kernel/module.lds
++-ifeq ($(call ld-ifversion, -ge, 225000000, y),y)
++-# Have the linker provide sfpr if possible.
++-# There is a corresponding test in arch/powerpc/lib/Makefile
++-KBUILD_LDFLAGS_MODULE += --save-restore-funcs
++-else
++-KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o
++-endif
++-endif
++-
++ ifdef CONFIG_CPU_LITTLE_ENDIAN
++ KBUILD_CFLAGS	+= -mlittle-endian
++ KBUILD_LDFLAGS	+= -EL
+diff --git a/target/linux/generic/hack-5.4/400-unlock_mx25l6406e_with_4bit_block_protect.patch b/target/linux/generic/hack-5.4/400-unlock_mx25l6406e_with_4bit_block_protect.patch
+new file mode 100644
+index 0000000000..af0a14948c
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/400-unlock_mx25l6406e_with_4bit_block_protect.patch
+@@ -0,0 +1,69 @@
++--- a/drivers/mtd/spi-nor/spi-nor.c
+++++ b/drivers/mtd/spi-nor/spi-nor.c
++@@ -196,7 +196,7 @@ struct flash_info {
++ 	u16		page_size;
++ 	u16		addr_width;
++ 
++-	u16		flags;
+++	u32		flags;
++ #define SECT_4K			BIT(0)	/* SPINOR_OP_BE_4K works uniformly */
++ #define SPI_NOR_NO_ERASE	BIT(1)	/* No erase command needed */
++ #define SST_WRITE		BIT(2)	/* use SST byte programming */
++@@ -233,6 +233,10 @@ struct flash_info {
++ #define SPI_NOR_SKIP_SFDP	BIT(13)	/* Skip parsing of SFDP tables */
++ #define USE_CLSR		BIT(14)	/* use CLSR command */
++ #define SPI_NOR_OCTAL_READ	BIT(15)	/* Flash supports Octal Read */
+++#define SPI_NOR_4BIT_BP		BIT(17) /*
+++					 * Flash SR has 4 bit fields (BP0-3)
+++					 * for block protection.
+++					 */
++ 
++ 	/* Part specific fixup hooks. */
++ 	const struct spi_nor_fixups *fixups;
++@@ -1985,6 +1989,9 @@ static int spi_nor_clear_sr_bp(struct sp
++ 	int ret;
++ 	u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
++ 
+++	if (nor->flags & SNOR_F_HAS_4BIT_BP)
+++		mask |= SR_BP3;
+++
++ 	ret = read_sr(nor);
++ 	if (ret < 0) {
++ 		dev_err(nor->dev, "error while reading status register\n");
++@@ -2337,7 +2344,7 @@ static const struct flash_info spi_nor_i
++ 	{ "mx25l1606e",  INFO(0xc22015, 0, 64 * 1024,  32, SECT_4K) },
++ 	{ "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, SECT_4K) },
++ 	{ "mx25l3255e",  INFO(0xc29e16, 0, 64 * 1024,  64, SECT_4K) },
++-	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
+++	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_4BIT_BP) },
++ 	{ "mx25u2033e",  INFO(0xc22532, 0, 64 * 1024,   4, SECT_4K) },
++ 	{ "mx25u3235f",	 INFO(0xc22536, 0, 64 * 1024,  64,
++ 			 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
++@@ -5025,6 +5032,9 @@ int spi_nor_scan(struct spi_nor *nor, co
++ 	if (info->flags & USE_CLSR)
++ 		nor->flags |= SNOR_F_USE_CLSR;
++ 
+++	if (info->flags & SPI_NOR_4BIT_BP)
+++		nor->flags |= SNOR_F_HAS_4BIT_BP;
+++
++ 	if (info->flags & SPI_NOR_NO_ERASE)
++ 		mtd->flags |= MTD_NO_ERASE;
++ 
++--- a/include/linux/mtd/spi-nor.h
+++++ b/include/linux/mtd/spi-nor.h
++@@ -127,6 +127,7 @@
++ #define SR_BP0			BIT(2)	/* Block protect 0 */
++ #define SR_BP1			BIT(3)	/* Block protect 1 */
++ #define SR_BP2			BIT(4)	/* Block protect 2 */
+++#define SR_BP3			BIT(5)	/* Block protect 3 */
++ #define SR_TB			BIT(5)	/* Top/Bottom protect */
++ #define SR_SRWD			BIT(7)	/* SR write protect */
++ /* Spansion/Cypress specific status bits */
++@@ -243,6 +244,7 @@ enum spi_nor_option_flags {
++ 	SNOR_F_4B_OPCODES	= BIT(6),
++ 	SNOR_F_HAS_4BAIT	= BIT(7),
++ 	SNOR_F_HAS_LOCK		= BIT(8),
+++	SNOR_F_HAS_4BIT_BP      = BIT(12),
++ };
++ 
++ /**
+diff --git a/target/linux/generic/hack-5.4/531-debloat_lzma.patch b/target/linux/generic/hack-5.4/531-debloat_lzma.patch
+new file mode 100644
+index 0000000000..2f70eee3e9
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/531-debloat_lzma.patch
+@@ -0,0 +1,1040 @@
++From 3fd297761ac246c54d7723c57fca95c112b99465 Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sat, 15 Jul 2017 21:15:44 +0200
++Subject: lzma: de-bloat the lzma library used by jffs2
++
++lede-commit: 3fd1dd08fbcbb78b34efefd32c3032e5c99108d6
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ include/linux/lzma/LzFind.h  |  17 ---
++ include/linux/lzma/LzmaDec.h | 101 ---------------
++ include/linux/lzma/LzmaEnc.h |  20 ---
++ lib/lzma/LzFind.c            | 287 ++++---------------------------------------
++ lib/lzma/LzmaDec.c           |  86 +------------
++ lib/lzma/LzmaEnc.c           | 172 ++------------------------
++ 6 files changed, 42 insertions(+), 641 deletions(-)
++
++--- a/include/linux/lzma/LzFind.h
+++++ b/include/linux/lzma/LzFind.h
++@@ -55,11 +55,6 @@ typedef struct _CMatchFinder
++ 
++ #define Inline_MatchFinder_GetNumAvailableBytes(p) ((p)->streamPos - (p)->pos)
++ 
++-int MatchFinder_NeedMove(CMatchFinder *p);
++-Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p);
++-void MatchFinder_MoveBlock(CMatchFinder *p);
++-void MatchFinder_ReadIfRequired(CMatchFinder *p);
++-
++ void MatchFinder_Construct(CMatchFinder *p);
++ 
++ /* Conditions:
++@@ -70,12 +65,6 @@ int MatchFinder_Create(CMatchFinder *p,
++     UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter,
++     ISzAlloc *alloc);
++ void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc);
++-void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems);
++-void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue);
++-
++-UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *buffer, CLzRef *son,
++-    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue,
++-    UInt32 *distances, UInt32 maxLen);
++ 
++ /*
++ Conditions:
++@@ -102,12 +91,6 @@ typedef struct _IMatchFinder
++ 
++ void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable);
++ 
++-void MatchFinder_Init(CMatchFinder *p);
++-UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
++-UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
++-void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
++-void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
++-
++ #ifdef __cplusplus
++ }
++ #endif
++--- a/include/linux/lzma/LzmaDec.h
+++++ b/include/linux/lzma/LzmaDec.h
++@@ -31,14 +31,6 @@ typedef struct _CLzmaProps
++   UInt32 dicSize;
++ } CLzmaProps;
++ 
++-/* LzmaProps_Decode - decodes properties
++-Returns:
++-  SZ_OK
++-  SZ_ERROR_UNSUPPORTED - Unsupported properties
++-*/
++-
++-SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size);
++-
++ 
++ /* ---------- LZMA Decoder state ---------- */
++ 
++@@ -70,8 +62,6 @@ typedef struct
++ 
++ #define LzmaDec_Construct(p) { (p)->dic = 0; (p)->probs = 0; }
++ 
++-void LzmaDec_Init(CLzmaDec *p);
++-
++ /* There are two types of LZMA streams:
++      0) Stream with end mark. That end mark adds about 6 bytes to compressed size.
++      1) Stream without end mark. You must know exact uncompressed size to decompress such stream. */
++@@ -108,97 +98,6 @@ typedef enum
++ 
++ /* ELzmaStatus is used only as output value for function call */
++ 
++-
++-/* ---------- Interfaces ---------- */
++-
++-/* There are 3 levels of interfaces:
++-     1) Dictionary Interface
++-     2) Buffer Interface
++-     3) One Call Interface
++-   You can select any of these interfaces, but don't mix functions from different
++-   groups for same object. */
++-
++-
++-/* There are two variants to allocate state for Dictionary Interface:
++-     1) LzmaDec_Allocate / LzmaDec_Free
++-     2) LzmaDec_AllocateProbs / LzmaDec_FreeProbs
++-   You can use variant 2, if you set dictionary buffer manually.
++-   For Buffer Interface you must always use variant 1.
++-
++-LzmaDec_Allocate* can return:
++-  SZ_OK
++-  SZ_ERROR_MEM         - Memory allocation error
++-  SZ_ERROR_UNSUPPORTED - Unsupported properties
++-*/
++-
++-SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc);
++-void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc);
++-
++-SRes LzmaDec_Allocate(CLzmaDec *state, const Byte *prop, unsigned propsSize, ISzAlloc *alloc);
++-void LzmaDec_Free(CLzmaDec *state, ISzAlloc *alloc);
++-
++-/* ---------- Dictionary Interface ---------- */
++-
++-/* You can use it, if you want to eliminate the overhead for data copying from
++-   dictionary to some other external buffer.
++-   You must work with CLzmaDec variables directly in this interface.
++-
++-   STEPS:
++-     LzmaDec_Constr()
++-     LzmaDec_Allocate()
++-     for (each new stream)
++-     {
++-       LzmaDec_Init()
++-       while (it needs more decompression)
++-       {
++-         LzmaDec_DecodeToDic()
++-         use data from CLzmaDec::dic and update CLzmaDec::dicPos
++-       }
++-     }
++-     LzmaDec_Free()
++-*/
++-
++-/* LzmaDec_DecodeToDic
++-
++-   The decoding to internal dictionary buffer (CLzmaDec::dic).
++-   You must manually update CLzmaDec::dicPos, if it reaches CLzmaDec::dicBufSize !!!
++-
++-finishMode:
++-  It has meaning only if the decoding reaches output limit (dicLimit).
++-  LZMA_FINISH_ANY - Decode just dicLimit bytes.
++-  LZMA_FINISH_END - Stream must be finished after dicLimit.
++-
++-Returns:
++-  SZ_OK
++-    status:
++-      LZMA_STATUS_FINISHED_WITH_MARK
++-      LZMA_STATUS_NOT_FINISHED
++-      LZMA_STATUS_NEEDS_MORE_INPUT
++-      LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK
++-  SZ_ERROR_DATA - Data error
++-*/
++-
++-SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit,
++-    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
++-
++-
++-/* ---------- Buffer Interface ---------- */
++-
++-/* It's zlib-like interface.
++-   See LzmaDec_DecodeToDic description for information about STEPS and return results,
++-   but you must use LzmaDec_DecodeToBuf instead of LzmaDec_DecodeToDic and you don't need
++-   to work with CLzmaDec variables manually.
++-
++-finishMode:
++-  It has meaning only if the decoding reaches output limit (*destLen).
++-  LZMA_FINISH_ANY - Decode just destLen bytes.
++-  LZMA_FINISH_END - Stream must be finished after (*destLen).
++-*/
++-
++-SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen,
++-    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
++-
++-
++ /* ---------- One Call Interface ---------- */
++ 
++ /* LzmaDecode
++--- a/include/linux/lzma/LzmaEnc.h
+++++ b/include/linux/lzma/LzmaEnc.h
++@@ -31,9 +31,6 @@ typedef struct _CLzmaEncProps
++ } CLzmaEncProps;
++ 
++ void LzmaEncProps_Init(CLzmaEncProps *p);
++-void LzmaEncProps_Normalize(CLzmaEncProps *p);
++-UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2);
++-
++ 
++ /* ---------- CLzmaEncHandle Interface ---------- */
++ 
++@@ -53,26 +50,9 @@ CLzmaEncHandle LzmaEnc_Create(ISzAlloc *
++ void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig);
++ SRes LzmaEnc_SetProps(CLzmaEncHandle p, const CLzmaEncProps *props);
++ SRes LzmaEnc_WriteProperties(CLzmaEncHandle p, Byte *properties, SizeT *size);
++-SRes LzmaEnc_Encode(CLzmaEncHandle p, ISeqOutStream *outStream, ISeqInStream *inStream,
++-    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
++ SRes LzmaEnc_MemEncode(CLzmaEncHandle p, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
++     int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
++ 
++-/* ---------- One Call Interface ---------- */
++-
++-/* LzmaEncode
++-Return code:
++-  SZ_OK               - OK
++-  SZ_ERROR_MEM        - Memory allocation error
++-  SZ_ERROR_PARAM      - Incorrect paramater
++-  SZ_ERROR_OUTPUT_EOF - output buffer overflow
++-  SZ_ERROR_THREAD     - errors in multithreading functions (only for Mt version)
++-*/
++-
++-SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
++-    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
++-    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
++-
++ #ifdef __cplusplus
++ }
++ #endif
++--- a/lib/lzma/LzFind.c
+++++ b/lib/lzma/LzFind.c
++@@ -14,9 +14,15 @@
++ 
++ #define kStartMaxLen 3
++ 
+++#if 0
+++#define DIRECT_INPUT	p->directInput
+++#else
+++#define DIRECT_INPUT	1
+++#endif
+++
++ static void LzInWindow_Free(CMatchFinder *p, ISzAlloc *alloc)
++ {
++-  if (!p->directInput)
+++  if (!DIRECT_INPUT)
++   {
++     alloc->Free(alloc, p->bufferBase);
++     p->bufferBase = 0;
++@@ -28,7 +34,7 @@ static void LzInWindow_Free(CMatchFinder
++ static int LzInWindow_Create(CMatchFinder *p, UInt32 keepSizeReserv, ISzAlloc *alloc)
++ {
++   UInt32 blockSize = p->keepSizeBefore + p->keepSizeAfter + keepSizeReserv;
++-  if (p->directInput)
+++  if (DIRECT_INPUT)
++   {
++     p->blockSize = blockSize;
++     return 1;
++@@ -42,12 +48,12 @@ static int LzInWindow_Create(CMatchFinde
++   return (p->bufferBase != 0);
++ }
++ 
++-Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
++-Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; }
+++static Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
+++static Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; }
++ 
++-UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; }
+++static UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; }
++ 
++-void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
+++static void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
++ {
++   p->posLimit -= subValue;
++   p->pos -= subValue;
++@@ -58,7 +64,7 @@ static void MatchFinder_ReadBlock(CMatch
++ {
++   if (p->streamEndWasReached || p->result != SZ_OK)
++     return;
++-  if (p->directInput)
+++  if (DIRECT_INPUT)
++   {
++     UInt32 curSize = 0xFFFFFFFF - p->streamPos;
++     if (curSize > p->directInputRem)
++@@ -89,7 +95,7 @@ static void MatchFinder_ReadBlock(CMatch
++   }
++ }
++ 
++-void MatchFinder_MoveBlock(CMatchFinder *p)
+++static void MatchFinder_MoveBlock(CMatchFinder *p)
++ {
++   memmove(p->bufferBase,
++     p->buffer - p->keepSizeBefore,
++@@ -97,22 +103,14 @@ void MatchFinder_MoveBlock(CMatchFinder
++   p->buffer = p->bufferBase + p->keepSizeBefore;
++ }
++ 
++-int MatchFinder_NeedMove(CMatchFinder *p)
+++static int MatchFinder_NeedMove(CMatchFinder *p)
++ {
++-  if (p->directInput)
+++  if (DIRECT_INPUT)
++     return 0;
++   /* if (p->streamEndWasReached) return 0; */
++   return ((size_t)(p->bufferBase + p->blockSize - p->buffer) <= p->keepSizeAfter);
++ }
++ 
++-void MatchFinder_ReadIfRequired(CMatchFinder *p)
++-{
++-  if (p->streamEndWasReached)
++-    return;
++-  if (p->keepSizeAfter >= p->streamPos - p->pos)
++-    MatchFinder_ReadBlock(p);
++-}
++-
++ static void MatchFinder_CheckAndMoveAndRead(CMatchFinder *p)
++ {
++   if (MatchFinder_NeedMove(p))
++@@ -268,7 +266,7 @@ static void MatchFinder_SetLimits(CMatch
++   p->posLimit = p->pos + limit;
++ }
++ 
++-void MatchFinder_Init(CMatchFinder *p)
+++static void MatchFinder_Init(CMatchFinder *p)
++ {
++   UInt32 i;
++   for (i = 0; i < p->hashSizeSum; i++)
++@@ -287,7 +285,7 @@ static UInt32 MatchFinder_GetSubValue(CM
++   return (p->pos - p->historySize - 1) & kNormalizeMask;
++ }
++ 
++-void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
+++static void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
++ {
++   UInt32 i;
++   for (i = 0; i < numItems; i++)
++@@ -319,38 +317,7 @@ static void MatchFinder_CheckLimits(CMat
++   MatchFinder_SetLimits(p);
++ }
++ 
++-static UInt32 * Hc_GetMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
++-    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
++-    UInt32 *distances, UInt32 maxLen)
++-{
++-  son[_cyclicBufferPos] = curMatch;
++-  for (;;)
++-  {
++-    UInt32 delta = pos - curMatch;
++-    if (cutValue-- == 0 || delta >= _cyclicBufferSize)
++-      return distances;
++-    {
++-      const Byte *pb = cur - delta;
++-      curMatch = son[_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)];
++-      if (pb[maxLen] == cur[maxLen] && *pb == *cur)
++-      {
++-        UInt32 len = 0;
++-        while (++len != lenLimit)
++-          if (pb[len] != cur[len])
++-            break;
++-        if (maxLen < len)
++-        {
++-          *distances++ = maxLen = len;
++-          *distances++ = delta - 1;
++-          if (len == lenLimit)
++-            return distances;
++-        }
++-      }
++-    }
++-  }
++-}
++-
++-UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
+++static UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
++     UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
++     UInt32 *distances, UInt32 maxLen)
++ {
++@@ -460,10 +427,10 @@ static void SkipMatchesSpec(UInt32 lenLi
++   p->buffer++; \
++   if (++p->pos == p->posLimit) MatchFinder_CheckLimits(p);
++ 
++-#define MOVE_POS_RET MOVE_POS return offset;
++-
++ static void MatchFinder_MovePos(CMatchFinder *p) { MOVE_POS; }
++ 
+++#define MOVE_POS_RET MatchFinder_MovePos(p); return offset;
+++
++ #define GET_MATCHES_HEADER2(minLen, ret_op) \
++   UInt32 lenLimit; UInt32 hashValue; const Byte *cur; UInt32 curMatch; \
++   lenLimit = p->lenLimit; { if (lenLimit < minLen) { MatchFinder_MovePos(p); ret_op; }} \
++@@ -479,62 +446,7 @@ static void MatchFinder_MovePos(CMatchFi
++   distances + offset, maxLen) - distances); MOVE_POS_RET;
++ 
++ #define SKIP_FOOTER \
++-  SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MOVE_POS;
++-
++-static UInt32 Bt2_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
++-{
++-  UInt32 offset;
++-  GET_MATCHES_HEADER(2)
++-  HASH2_CALC;
++-  curMatch = p->hash[hashValue];
++-  p->hash[hashValue] = p->pos;
++-  offset = 0;
++-  GET_MATCHES_FOOTER(offset, 1)
++-}
++-
++-UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
++-{
++-  UInt32 offset;
++-  GET_MATCHES_HEADER(3)
++-  HASH_ZIP_CALC;
++-  curMatch = p->hash[hashValue];
++-  p->hash[hashValue] = p->pos;
++-  offset = 0;
++-  GET_MATCHES_FOOTER(offset, 2)
++-}
++-
++-static UInt32 Bt3_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
++-{
++-  UInt32 hash2Value, delta2, maxLen, offset;
++-  GET_MATCHES_HEADER(3)
++-
++-  HASH3_CALC;
++-
++-  delta2 = p->pos - p->hash[hash2Value];
++-  curMatch = p->hash[kFix3HashSize + hashValue];
++-
++-  p->hash[hash2Value] =
++-  p->hash[kFix3HashSize + hashValue] = p->pos;
++-
++-
++-  maxLen = 2;
++-  offset = 0;
++-  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
++-  {
++-    for (; maxLen != lenLimit; maxLen++)
++-      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
++-        break;
++-    distances[0] = maxLen;
++-    distances[1] = delta2 - 1;
++-    offset = 2;
++-    if (maxLen == lenLimit)
++-    {
++-      SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p));
++-      MOVE_POS_RET;
++-    }
++-  }
++-  GET_MATCHES_FOOTER(offset, maxLen)
++-}
+++  SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MatchFinder_MovePos(p);
++ 
++ static UInt32 Bt4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
++ {
++@@ -583,108 +495,6 @@ static UInt32 Bt4_MatchFinder_GetMatches
++   GET_MATCHES_FOOTER(offset, maxLen)
++ }
++ 
++-static UInt32 Hc4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
++-{
++-  UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset;
++-  GET_MATCHES_HEADER(4)
++-
++-  HASH4_CALC;
++-
++-  delta2 = p->pos - p->hash[                hash2Value];
++-  delta3 = p->pos - p->hash[kFix3HashSize + hash3Value];
++-  curMatch = p->hash[kFix4HashSize + hashValue];
++-
++-  p->hash[                hash2Value] =
++-  p->hash[kFix3HashSize + hash3Value] =
++-  p->hash[kFix4HashSize + hashValue] = p->pos;
++-
++-  maxLen = 1;
++-  offset = 0;
++-  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
++-  {
++-    distances[0] = maxLen = 2;
++-    distances[1] = delta2 - 1;
++-    offset = 2;
++-  }
++-  if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur)
++-  {
++-    maxLen = 3;
++-    distances[offset + 1] = delta3 - 1;
++-    offset += 2;
++-    delta2 = delta3;
++-  }
++-  if (offset != 0)
++-  {
++-    for (; maxLen != lenLimit; maxLen++)
++-      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
++-        break;
++-    distances[offset - 2] = maxLen;
++-    if (maxLen == lenLimit)
++-    {
++-      p->son[p->cyclicBufferPos] = curMatch;
++-      MOVE_POS_RET;
++-    }
++-  }
++-  if (maxLen < 3)
++-    maxLen = 3;
++-  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
++-    distances + offset, maxLen) - (distances));
++-  MOVE_POS_RET
++-}
++-
++-UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
++-{
++-  UInt32 offset;
++-  GET_MATCHES_HEADER(3)
++-  HASH_ZIP_CALC;
++-  curMatch = p->hash[hashValue];
++-  p->hash[hashValue] = p->pos;
++-  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
++-    distances, 2) - (distances));
++-  MOVE_POS_RET
++-}
++-
++-static void Bt2_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
++-{
++-  do
++-  {
++-    SKIP_HEADER(2)
++-    HASH2_CALC;
++-    curMatch = p->hash[hashValue];
++-    p->hash[hashValue] = p->pos;
++-    SKIP_FOOTER
++-  }
++-  while (--num != 0);
++-}
++-
++-void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
++-{
++-  do
++-  {
++-    SKIP_HEADER(3)
++-    HASH_ZIP_CALC;
++-    curMatch = p->hash[hashValue];
++-    p->hash[hashValue] = p->pos;
++-    SKIP_FOOTER
++-  }
++-  while (--num != 0);
++-}
++-
++-static void Bt3_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
++-{
++-  do
++-  {
++-    UInt32 hash2Value;
++-    SKIP_HEADER(3)
++-    HASH3_CALC;
++-    curMatch = p->hash[kFix3HashSize + hashValue];
++-    p->hash[hash2Value] =
++-    p->hash[kFix3HashSize + hashValue] = p->pos;
++-    SKIP_FOOTER
++-  }
++-  while (--num != 0);
++-}
++-
++ static void Bt4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
++ {
++   do
++@@ -701,61 +511,12 @@ static void Bt4_MatchFinder_Skip(CMatchF
++   while (--num != 0);
++ }
++ 
++-static void Hc4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
++-{
++-  do
++-  {
++-    UInt32 hash2Value, hash3Value;
++-    SKIP_HEADER(4)
++-    HASH4_CALC;
++-    curMatch = p->hash[kFix4HashSize + hashValue];
++-    p->hash[                hash2Value] =
++-    p->hash[kFix3HashSize + hash3Value] =
++-    p->hash[kFix4HashSize + hashValue] = p->pos;
++-    p->son[p->cyclicBufferPos] = curMatch;
++-    MOVE_POS
++-  }
++-  while (--num != 0);
++-}
++-
++-void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
++-{
++-  do
++-  {
++-    SKIP_HEADER(3)
++-    HASH_ZIP_CALC;
++-    curMatch = p->hash[hashValue];
++-    p->hash[hashValue] = p->pos;
++-    p->son[p->cyclicBufferPos] = curMatch;
++-    MOVE_POS
++-  }
++-  while (--num != 0);
++-}
++-
++ void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable)
++ {
++   vTable->Init = (Mf_Init_Func)MatchFinder_Init;
++   vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinder_GetIndexByte;
++   vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinder_GetNumAvailableBytes;
++   vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinder_GetPointerToCurrentPos;
++-  if (!p->btMode)
++-  {
++-    vTable->GetMatches = (Mf_GetMatches_Func)Hc4_MatchFinder_GetMatches;
++-    vTable->Skip = (Mf_Skip_Func)Hc4_MatchFinder_Skip;
++-  }
++-  else if (p->numHashBytes == 2)
++-  {
++-    vTable->GetMatches = (Mf_GetMatches_Func)Bt2_MatchFinder_GetMatches;
++-    vTable->Skip = (Mf_Skip_Func)Bt2_MatchFinder_Skip;
++-  }
++-  else if (p->numHashBytes == 3)
++-  {
++-    vTable->GetMatches = (Mf_GetMatches_Func)Bt3_MatchFinder_GetMatches;
++-    vTable->Skip = (Mf_Skip_Func)Bt3_MatchFinder_Skip;
++-  }
++-  else
++-  {
++-    vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
++-    vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
++-  }
+++  vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
+++  vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
++ }
++--- a/lib/lzma/LzmaDec.c
+++++ b/lib/lzma/LzmaDec.c
++@@ -682,7 +682,7 @@ static void LzmaDec_InitRc(CLzmaDec *p,
++   p->needFlush = 0;
++ }
++ 
++-void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
+++static void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
++ {
++   p->needFlush = 1;
++   p->remainLen = 0;
++@@ -698,7 +698,7 @@ void LzmaDec_InitDicAndState(CLzmaDec *p
++     p->needInitState = 1;
++ }
++ 
++-void LzmaDec_Init(CLzmaDec *p)
+++static void LzmaDec_Init(CLzmaDec *p)
++ {
++   p->dicPos = 0;
++   LzmaDec_InitDicAndState(p, True, True);
++@@ -716,7 +716,7 @@ static void LzmaDec_InitStateReal(CLzmaD
++   p->needInitState = 0;
++ }
++ 
++-SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
+++static SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
++     ELzmaFinishMode finishMode, ELzmaStatus *status)
++ {
++   SizeT inSize = *srcLen;
++@@ -837,65 +837,13 @@ SRes LzmaDec_DecodeToDic(CLzmaDec *p, Si
++   return (p->code == 0) ? SZ_OK : SZ_ERROR_DATA;
++ }
++ 
++-SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status)
++-{
++-  SizeT outSize = *destLen;
++-  SizeT inSize = *srcLen;
++-  *srcLen = *destLen = 0;
++-  for (;;)
++-  {
++-    SizeT inSizeCur = inSize, outSizeCur, dicPos;
++-    ELzmaFinishMode curFinishMode;
++-    SRes res;
++-    if (p->dicPos == p->dicBufSize)
++-      p->dicPos = 0;
++-    dicPos = p->dicPos;
++-    if (outSize > p->dicBufSize - dicPos)
++-    {
++-      outSizeCur = p->dicBufSize;
++-      curFinishMode = LZMA_FINISH_ANY;
++-    }
++-    else
++-    {
++-      outSizeCur = dicPos + outSize;
++-      curFinishMode = finishMode;
++-    }
++-
++-    res = LzmaDec_DecodeToDic(p, outSizeCur, src, &inSizeCur, curFinishMode, status);
++-    src += inSizeCur;
++-    inSize -= inSizeCur;
++-    *srcLen += inSizeCur;
++-    outSizeCur = p->dicPos - dicPos;
++-    memcpy(dest, p->dic + dicPos, outSizeCur);
++-    dest += outSizeCur;
++-    outSize -= outSizeCur;
++-    *destLen += outSizeCur;
++-    if (res != 0)
++-      return res;
++-    if (outSizeCur == 0 || outSize == 0)
++-      return SZ_OK;
++-  }
++-}
++-
++-void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
+++static void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
++ {
++   alloc->Free(alloc, p->probs);
++   p->probs = 0;
++ }
++ 
++-static void LzmaDec_FreeDict(CLzmaDec *p, ISzAlloc *alloc)
++-{
++-  alloc->Free(alloc, p->dic);
++-  p->dic = 0;
++-}
++-
++-void LzmaDec_Free(CLzmaDec *p, ISzAlloc *alloc)
++-{
++-  LzmaDec_FreeProbs(p, alloc);
++-  LzmaDec_FreeDict(p, alloc);
++-}
++-
++-SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
+++static SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
++ {
++   UInt32 dicSize;
++   Byte d;
++@@ -935,7 +883,7 @@ static SRes LzmaDec_AllocateProbs2(CLzma
++   return SZ_OK;
++ }
++ 
++-SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
+++static SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
++ {
++   CLzmaProps propNew;
++   RINOK(LzmaProps_Decode(&propNew, props, propsSize));
++@@ -943,28 +891,6 @@ SRes LzmaDec_AllocateProbs(CLzmaDec *p,
++   p->prop = propNew;
++   return SZ_OK;
++ }
++-
++-SRes LzmaDec_Allocate(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
++-{
++-  CLzmaProps propNew;
++-  SizeT dicBufSize;
++-  RINOK(LzmaProps_Decode(&propNew, props, propsSize));
++-  RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc));
++-  dicBufSize = propNew.dicSize;
++-  if (p->dic == 0 || dicBufSize != p->dicBufSize)
++-  {
++-    LzmaDec_FreeDict(p, alloc);
++-    p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize);
++-    if (p->dic == 0)
++-    {
++-      LzmaDec_FreeProbs(p, alloc);
++-      return SZ_ERROR_MEM;
++-    }
++-  }
++-  p->dicBufSize = dicBufSize;
++-  p->prop = propNew;
++-  return SZ_OK;
++-}
++ 
++ SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
++     const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode,
++--- a/lib/lzma/LzmaEnc.c
+++++ b/lib/lzma/LzmaEnc.c
++@@ -53,7 +53,7 @@ void LzmaEncProps_Init(CLzmaEncProps *p)
++   p->writeEndMark = 0;
++ }
++ 
++-void LzmaEncProps_Normalize(CLzmaEncProps *p)
+++static void LzmaEncProps_Normalize(CLzmaEncProps *p)
++ {
++   int level = p->level;
++   if (level < 0) level = 5;
++@@ -76,7 +76,7 @@ void LzmaEncProps_Normalize(CLzmaEncProp
++       #endif
++ }
++ 
++-UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
+++static UInt32 __maybe_unused LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
++ {
++   CLzmaEncProps props = *props2;
++   LzmaEncProps_Normalize(&props);
++@@ -93,7 +93,7 @@ UInt32 LzmaEncProps_GetDictSize(const CL
++ 
++ #define BSR2_RET(pos, res) { unsigned long i; _BitScanReverse(&i, (pos)); res = (i + i) + ((pos >> (i - 1)) & 1); }
++ 
++-UInt32 GetPosSlot1(UInt32 pos)
+++static UInt32 GetPosSlot1(UInt32 pos)
++ {
++   UInt32 res;
++   BSR2_RET(pos, res);
++@@ -107,7 +107,7 @@ UInt32 GetPosSlot1(UInt32 pos)
++ #define kNumLogBits (9 + (int)sizeof(size_t) / 2)
++ #define kDicLogSizeMaxCompress ((kNumLogBits - 1) * 2 + 7)
++ 
++-void LzmaEnc_FastPosInit(Byte *g_FastPos)
+++static void LzmaEnc_FastPosInit(Byte *g_FastPos)
++ {
++   int c = 2, slotFast;
++   g_FastPos[0] = 0;
++@@ -339,58 +339,6 @@ typedef struct
++   CSaveState saveState;
++ } CLzmaEnc;
++ 
++-void LzmaEnc_SaveState(CLzmaEncHandle pp)
++-{
++-  CLzmaEnc *p = (CLzmaEnc *)pp;
++-  CSaveState *dest = &p->saveState;
++-  int i;
++-  dest->lenEnc = p->lenEnc;
++-  dest->repLenEnc = p->repLenEnc;
++-  dest->state = p->state;
++-
++-  for (i = 0; i < kNumStates; i++)
++-  {
++-    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
++-    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
++-  }
++-  for (i = 0; i < kNumLenToPosStates; i++)
++-    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
++-  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
++-  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
++-  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
++-  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
++-  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
++-  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
++-  memcpy(dest->reps, p->reps, sizeof(p->reps));
++-  memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb));
++-}
++-
++-void LzmaEnc_RestoreState(CLzmaEncHandle pp)
++-{
++-  CLzmaEnc *dest = (CLzmaEnc *)pp;
++-  const CSaveState *p = &dest->saveState;
++-  int i;
++-  dest->lenEnc = p->lenEnc;
++-  dest->repLenEnc = p->repLenEnc;
++-  dest->state = p->state;
++-
++-  for (i = 0; i < kNumStates; i++)
++-  {
++-    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
++-    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
++-  }
++-  for (i = 0; i < kNumLenToPosStates; i++)
++-    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
++-  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
++-  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
++-  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
++-  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
++-  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
++-  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
++-  memcpy(dest->reps, p->reps, sizeof(p->reps));
++-  memcpy(dest->litProbs, p->litProbs, (0x300 << dest->lclp) * sizeof(CLzmaProb));
++-}
++-
++ SRes LzmaEnc_SetProps(CLzmaEncHandle pp, const CLzmaEncProps *props2)
++ {
++   CLzmaEnc *p = (CLzmaEnc *)pp;
++@@ -600,7 +548,7 @@ static void LitEnc_EncodeMatched(CRangeE
++   while (symbol < 0x10000);
++ }
++ 
++-void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
+++static void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
++ {
++   UInt32 i;
++   for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits))
++@@ -1676,7 +1624,7 @@ static void FillDistancesPrices(CLzmaEnc
++   p->matchPriceCount = 0;
++ }
++ 
++-void LzmaEnc_Construct(CLzmaEnc *p)
+++static void LzmaEnc_Construct(CLzmaEnc *p)
++ {
++   RangeEnc_Construct(&p->rc);
++   MatchFinder_Construct(&p->matchFinderBase);
++@@ -1709,7 +1657,7 @@ CLzmaEncHandle LzmaEnc_Create(ISzAlloc *
++   return p;
++ }
++ 
++-void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
+++static void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
++ {
++   alloc->Free(alloc, p->litProbs);
++   alloc->Free(alloc, p->saveState.litProbs);
++@@ -1717,7 +1665,7 @@ void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAl
++   p->saveState.litProbs = 0;
++ }
++ 
++-void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
+++static void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
++ {
++   #ifndef _7ZIP_ST
++   MatchFinderMt_Destruct(&p->matchFinderMt, allocBig);
++@@ -1947,7 +1895,7 @@ static SRes LzmaEnc_Alloc(CLzmaEnc *p, U
++   return SZ_OK;
++ }
++ 
++-void LzmaEnc_Init(CLzmaEnc *p)
+++static void LzmaEnc_Init(CLzmaEnc *p)
++ {
++   UInt32 i;
++   p->state = 0;
++@@ -2005,7 +1953,7 @@ void LzmaEnc_Init(CLzmaEnc *p)
++   p->lpMask = (1 << p->lp) - 1;
++ }
++ 
++-void LzmaEnc_InitPrices(CLzmaEnc *p)
+++static void LzmaEnc_InitPrices(CLzmaEnc *p)
++ {
++   if (!p->fastMode)
++   {
++@@ -2037,26 +1985,6 @@ static SRes LzmaEnc_AllocAndInit(CLzmaEn
++   return SZ_OK;
++ }
++ 
++-static SRes LzmaEnc_Prepare(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream,
++-    ISzAlloc *alloc, ISzAlloc *allocBig)
++-{
++-  CLzmaEnc *p = (CLzmaEnc *)pp;
++-  p->matchFinderBase.stream = inStream;
++-  p->needInit = 1;
++-  p->rc.outStream = outStream;
++-  return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig);
++-}
++-
++-SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp,
++-    ISeqInStream *inStream, UInt32 keepWindowSize,
++-    ISzAlloc *alloc, ISzAlloc *allocBig)
++-{
++-  CLzmaEnc *p = (CLzmaEnc *)pp;
++-  p->matchFinderBase.stream = inStream;
++-  p->needInit = 1;
++-  return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
++-}
++-
++ static void LzmaEnc_SetInputBuf(CLzmaEnc *p, const Byte *src, SizeT srcLen)
++ {
++   p->matchFinderBase.directInput = 1;
++@@ -2064,7 +1992,7 @@ static void LzmaEnc_SetInputBuf(CLzmaEnc
++   p->matchFinderBase.directInputRem = srcLen;
++ }
++ 
++-SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
+++static SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
++     UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
++ {
++   CLzmaEnc *p = (CLzmaEnc *)pp;
++@@ -2074,7 +2002,7 @@ SRes LzmaEnc_MemPrepare(CLzmaEncHandle p
++   return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
++ }
++ 
++-void LzmaEnc_Finish(CLzmaEncHandle pp)
+++static void LzmaEnc_Finish(CLzmaEncHandle pp)
++ {
++   #ifndef _7ZIP_ST
++   CLzmaEnc *p = (CLzmaEnc *)pp;
++@@ -2107,53 +2035,6 @@ static size_t MyWrite(void *pp, const vo
++   return size;
++ }
++ 
++-
++-UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp)
++-{
++-  const CLzmaEnc *p = (CLzmaEnc *)pp;
++-  return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj);
++-}
++-
++-const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp)
++-{
++-  const CLzmaEnc *p = (CLzmaEnc *)pp;
++-  return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset;
++-}
++-
++-SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit,
++-    Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize)
++-{
++-  CLzmaEnc *p = (CLzmaEnc *)pp;
++-  UInt64 nowPos64;
++-  SRes res;
++-  CSeqOutStreamBuf outStream;
++-
++-  outStream.funcTable.Write = MyWrite;
++-  outStream.data = dest;
++-  outStream.rem = *destLen;
++-  outStream.overflow = False;
++-
++-  p->writeEndMark = False;
++-  p->finished = False;
++-  p->result = SZ_OK;
++-
++-  if (reInit)
++-    LzmaEnc_Init(p);
++-  LzmaEnc_InitPrices(p);
++-  nowPos64 = p->nowPos64;
++-  RangeEnc_Init(&p->rc);
++-  p->rc.outStream = &outStream.funcTable;
++-
++-  res = LzmaEnc_CodeOneBlock(p, True, desiredPackSize, *unpackSize);
++-
++-  *unpackSize = (UInt32)(p->nowPos64 - nowPos64);
++-  *destLen -= outStream.rem;
++-  if (outStream.overflow)
++-    return SZ_ERROR_OUTPUT_EOF;
++-
++-  return res;
++-}
++-
++ static SRes LzmaEnc_Encode2(CLzmaEnc *p, ICompressProgress *progress)
++ {
++   SRes res = SZ_OK;
++@@ -2184,13 +2065,6 @@ static SRes LzmaEnc_Encode2(CLzmaEnc *p,
++   return res;
++ }
++ 
++-SRes LzmaEnc_Encode(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress,
++-    ISzAlloc *alloc, ISzAlloc *allocBig)
++-{
++-  RINOK(LzmaEnc_Prepare(pp, outStream, inStream, alloc, allocBig));
++-  return LzmaEnc_Encode2((CLzmaEnc *)pp, progress);
++-}
++-
++ SRes LzmaEnc_WriteProperties(CLzmaEncHandle pp, Byte *props, SizeT *size)
++ {
++   CLzmaEnc *p = (CLzmaEnc *)pp;
++@@ -2247,25 +2121,3 @@ SRes LzmaEnc_MemEncode(CLzmaEncHandle pp
++     return SZ_ERROR_OUTPUT_EOF;
++   return res;
++ }
++-
++-SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
++-    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
++-    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig)
++-{
++-  CLzmaEnc *p = (CLzmaEnc *)LzmaEnc_Create(alloc);
++-  SRes res;
++-  if (p == 0)
++-    return SZ_ERROR_MEM;
++-
++-  res = LzmaEnc_SetProps(p, props);
++-  if (res == SZ_OK)
++-  {
++-    res = LzmaEnc_WriteProperties(p, propsEncoded, propsSize);
++-    if (res == SZ_OK)
++-      res = LzmaEnc_MemEncode(p, dest, destLen, src, srcLen,
++-          writeEndMark, progress, alloc, allocBig);
++-  }
++-
++-  LzmaEnc_Destroy(p, alloc, allocBig);
++-  return res;
++-}
+diff --git a/target/linux/generic/hack-5.4/550-loop-Report-EOPNOTSUPP-properly.patch b/target/linux/generic/hack-5.4/550-loop-Report-EOPNOTSUPP-properly.patch
+new file mode 100644
+index 0000000000..0e5447d454
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/550-loop-Report-EOPNOTSUPP-properly.patch
+@@ -0,0 +1,41 @@
++From 2e864386e62e702a343be2507062ee08d5dfc810 Mon Sep 17 00:00:00 2001
++From: Evan Green <evgreen@chromium.org>
++Date: Thu, 14 Nov 2019 15:50:07 -0800
++Subject: loop: Report EOPNOTSUPP properly
++
++Properly plumb out EOPNOTSUPP from loop driver operations, which may
++get returned when for instance a discard operation is attempted but not
++supported by the underlying block device. Before this change, everything
++was reported in the log as an I/O error, which is scary and not
++helpful in debugging.
++
++Signed-off-by: Evan Green <evgreen@chromium.org>
++Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
++Reviewed-by: Bart Van Assche <bvanassche@acm.org>
++---
++ drivers/block/loop.c | 7 +++++--
++ 1 file changed, 5 insertions(+), 2 deletions(-)
++
++--- a/drivers/block/loop.c
+++++ b/drivers/block/loop.c
++@@ -462,7 +462,7 @@ static void lo_complete_rq(struct reques
++ 	if (!cmd->use_aio || cmd->ret < 0 || cmd->ret == blk_rq_bytes(rq) ||
++ 	    req_op(rq) != REQ_OP_READ) {
++ 		if (cmd->ret < 0)
++-			ret = BLK_STS_IOERR;
+++			ret = errno_to_blk_status(cmd->ret);
++ 		goto end_io;
++ 	}
++ 
++@@ -1973,7 +1973,10 @@ static void loop_handle_cmd(struct loop_
++  failed:
++ 	/* complete non-aio request */
++ 	if (!cmd->use_aio || ret) {
++-		cmd->ret = ret ? -EIO : 0;
+++		if (ret == -EOPNOTSUPP)
+++			cmd->ret = ret;
+++		else
+++			cmd->ret = ret ? -EIO : 0;
++ 		blk_mq_complete_request(rq);
++ 	}
++ }
+diff --git a/target/linux/generic/hack-5.4/640-bridge-only-accept-EAP-locally.patch b/target/linux/generic/hack-5.4/640-bridge-only-accept-EAP-locally.patch
+new file mode 100644
+index 0000000000..a713aa3cff
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/640-bridge-only-accept-EAP-locally.patch
+@@ -0,0 +1,82 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 7 Jul 2017 17:18:54 +0200
++Subject: bridge: only accept EAP locally
++
++When bridging, do not forward EAP frames to other ports, only deliver
++them locally, regardless of the state.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++[add disable_eap_hack sysfs attribute]
++Signed-off-by: Etienne Champetier <champetier.etienne@gmail.com>
++---
++
++--- a/net/bridge/br_input.c
+++++ b/net/bridge/br_input.c
++@@ -103,10 +103,14 @@ int br_handle_frame_finish(struct net *n
++ 		}
++ 	}
++ 
+++	BR_INPUT_SKB_CB(skb)->brdev = br->dev;
+++
+++	if (skb->protocol == htons(ETH_P_PAE) && !br->disable_eap_hack)
+++		return br_pass_frame_up(skb);
+++
++ 	if (p->state == BR_STATE_LEARNING)
++ 		goto drop;
++ 
++-	BR_INPUT_SKB_CB(skb)->brdev = br->dev;
++ 	BR_INPUT_SKB_CB(skb)->src_port_isolated = !!(p->flags & BR_ISOLATED);
++ 
++ 	if (IS_ENABLED(CONFIG_INET) &&
++--- a/net/bridge/br_private.h
+++++ b/net/bridge/br_private.h
++@@ -345,6 +345,8 @@ struct net_bridge {
++ 	u16				group_fwd_mask;
++ 	u16				group_fwd_mask_required;
++ 
+++	bool				disable_eap_hack;
+++
++ 	/* STP */
++ 	bridge_id			designated_root;
++ 	bridge_id			bridge_id;
++--- a/net/bridge/br_sysfs_br.c
+++++ b/net/bridge/br_sysfs_br.c
++@@ -166,6 +166,30 @@ static ssize_t group_fwd_mask_store(stru
++ }
++ static DEVICE_ATTR_RW(group_fwd_mask);
++ 
+++static ssize_t disable_eap_hack_show(struct device *d,
+++				   struct device_attribute *attr,
+++				   char *buf)
+++{
+++	struct net_bridge *br = to_bridge(d);
+++	return sprintf(buf, "%u\n", br->disable_eap_hack);
+++}
+++
+++static int set_disable_eap_hack(struct net_bridge *br, unsigned long val)
+++{
+++	br->disable_eap_hack = !!val;
+++
+++	return 0;
+++}
+++
+++static ssize_t disable_eap_hack_store(struct device *d,
+++				    struct device_attribute *attr,
+++				    const char *buf,
+++				    size_t len)
+++{
+++	return store_bridge_parm(d, buf, len, set_disable_eap_hack);
+++}
+++static DEVICE_ATTR_RW(disable_eap_hack);
+++
++ static ssize_t priority_show(struct device *d, struct device_attribute *attr,
++ 			     char *buf)
++ {
++@@ -851,6 +875,7 @@ static struct attribute *bridge_attrs[]
++ 	&dev_attr_ageing_time.attr,
++ 	&dev_attr_stp_state.attr,
++ 	&dev_attr_group_fwd_mask.attr,
+++	&dev_attr_disable_eap_hack.attr,
++ 	&dev_attr_priority.attr,
++ 	&dev_attr_bridge_id.attr,
++ 	&dev_attr_root_id.attr,
+diff --git a/target/linux/generic/hack-5.4/645-netfilter-connmark-introduce-set-dscpmark.patch b/target/linux/generic/hack-5.4/645-netfilter-connmark-introduce-set-dscpmark.patch
+new file mode 100644
+index 0000000000..2d3fe01a75
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/645-netfilter-connmark-introduce-set-dscpmark.patch
+@@ -0,0 +1,212 @@
++From eda40b8c8c82e0f2789d6bc8bf63846dce2e8f32 Mon Sep 17 00:00:00 2001
++From: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
++Date: Sat, 23 Mar 2019 09:29:49 +0000
++Subject: [PATCH] netfilter: connmark: introduce set-dscpmark
++
++set-dscpmark is a method of storing the DSCP of an ip packet into
++conntrack mark.  In combination with a suitable tc filter action
++(act_ctinfo) DSCP values are able to be stored in the mark on egress and
++restored on ingress across links that otherwise alter or bleach DSCP.
++
++This is useful for qdiscs such as CAKE which are able to shape according
++to policies based on DSCP.
++
++Ingress classification is traditionally a challenging task since
++iptables rules haven't yet run and tc filter/eBPF programs are pre-NAT
++lookups, hence are unable to see internal IPv4 addresses as used on the
++typical home masquerading gateway.
++
++x_tables CONNMARK set-dscpmark target solves the problem of storing the
++DSCP to the conntrack mark in a way suitable for the new act_ctinfo tc
++action to restore.
++
++The set-dscpmark option accepts 2 parameters, a 32bit 'dscpmask' and a
++32bit 'statemask'.  The dscp mask must be 6 contiguous bits and
++represents the area where the DSCP will be stored in the connmark.  The
++state mask is a minimum 1 bit length mask that must not overlap with the
++dscpmask.  It represents a flag which is set when the DSCP has been
++stored in the conntrack mark. This is useful to implement a 'one shot'
++iptables based classification where the 'complicated' iptables rules are
++only run once to classify the connection on initial (egress) packet and
++subsequent packets are all marked/restored with the same DSCP.  A state
++mask of zero disables the setting of a status bit/s.
++
++example syntax with a suitably modified iptables user space application:
++
++iptables -A QOS_MARK_eth0 -t mangle -j CONNMARK --set-dscpmark 0xfc000000/0x01000000
++
++Would store the DSCP in the top 6 bits of the 32bit mark field, and use
++the LSB of the top byte as the 'DSCP has been stored' marker.
++
++|----0xFC----conntrack mark----000000---|
++| Bits 31-26 | bit 25 | bit24 |~~~ Bit 0|
++| DSCP       | unused | flag  |unused   |
++|-----------------------0x01---000000---|
++      ^                   ^
++      |                   |
++      ---|             Conditional flag
++         |             set this when dscp
++|-ip diffserv-|        stored in mark
++| 6 bits      |
++|-------------|
++
++an identically configured tc action to restore looks like:
++
++tc filter show dev eth0 ingress
++filter parent ffff: protocol all pref 10 u32 chain 0
++filter parent ffff: protocol all pref 10 u32 chain 0 fh 800: ht divisor 1
++filter parent ffff: protocol all pref 10 u32 chain 0 fh 800::800 order 2048 key ht 800 bkt 0 flowid 1: not_in_hw
++  match 00000000/00000000 at 0
++	action order 1: ctinfo zone 0 pipe
++	 index 2 ref 1 bind 1 dscp 0xfc000000/0x1000000
++
++	action order 2: mirred (Egress Redirect to device ifb4eth0) stolen
++	index 1 ref 1 bind 1
++
++|----0xFC----conntrack mark----000000---|
++| Bits 31-26 | bit 25 | bit24 |~~~ Bit 0|
++| DSCP       | unused | flag  |unused   |
++|-----------------------0x01---000000---|
++      |                   |
++      |                   |
++      ---|             Conditional flag
++         v             only restore if set
++|-ip diffserv-|
++| 6 bits      |
++|-------------|
++
++Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
++---
++ include/uapi/linux/netfilter/xt_connmark.h | 10 ++++
++ net/netfilter/xt_connmark.c                | 55 ++++++++++++++++++----
++ 2 files changed, 57 insertions(+), 8 deletions(-)
++
++--- a/include/uapi/linux/netfilter/xt_connmark.h
+++++ b/include/uapi/linux/netfilter/xt_connmark.h
++@@ -20,6 +20,11 @@ enum {
++ };
++ 
++ enum {
+++	XT_CONNMARK_VALUE =	(1 << 0),
+++	XT_CONNMARK_DSCP = 	(1 << 1)
+++};
+++
+++enum {
++ 	D_SHIFT_LEFT = 0,
++ 	D_SHIFT_RIGHT,
++ };
++@@ -34,6 +39,11 @@ struct xt_connmark_tginfo2 {
++ 	__u8 shift_dir, shift_bits, mode;
++ };
++ 
+++struct xt_connmark_tginfo3 {
+++	__u32 ctmark, ctmask, nfmask;
+++	__u8 shift_dir, shift_bits, mode, func;
+++};
+++
++ struct xt_connmark_mtinfo1 {
++ 	__u32 mark, mask;
++ 	__u8 invert;
++--- a/net/netfilter/xt_connmark.c
+++++ b/net/netfilter/xt_connmark.c
++@@ -24,12 +24,13 @@ MODULE_ALIAS("ipt_connmark");
++ MODULE_ALIAS("ip6t_connmark");
++ 
++ static unsigned int
++-connmark_tg_shift(struct sk_buff *skb, const struct xt_connmark_tginfo2 *info)
+++connmark_tg_shift(struct sk_buff *skb, const struct xt_connmark_tginfo3 *info)
++ {
++ 	enum ip_conntrack_info ctinfo;
++ 	u_int32_t new_targetmark;
++ 	struct nf_conn *ct;
++ 	u_int32_t newmark;
+++	u_int8_t dscp;
++ 
++ 	ct = nf_ct_get(skb, &ctinfo);
++ 	if (ct == NULL)
++@@ -37,12 +38,24 @@ connmark_tg_shift(struct sk_buff *skb, c
++ 
++ 	switch (info->mode) {
++ 	case XT_CONNMARK_SET:
++-		newmark = (ct->mark & ~info->ctmask) ^ info->ctmark;
++-		if (info->shift_dir == D_SHIFT_RIGHT)
++-			newmark >>= info->shift_bits;
++-		else
++-			newmark <<= info->shift_bits;
+++		newmark = ct->mark;
+++		if (info->func & XT_CONNMARK_VALUE) {
+++			newmark = (newmark & ~info->ctmask) ^ info->ctmark;
+++			if (info->shift_dir == D_SHIFT_RIGHT)
+++				newmark >>= info->shift_bits;
+++			else
+++				newmark <<= info->shift_bits;
+++		} else if (info->func & XT_CONNMARK_DSCP) {
+++			if (skb->protocol == htons(ETH_P_IP))
+++				dscp = ipv4_get_dsfield(ip_hdr(skb)) >> 2;
+++			else if (skb->protocol == htons(ETH_P_IPV6))
+++				dscp = ipv6_get_dsfield(ipv6_hdr(skb)) >> 2;
+++			else	/* protocol doesn't have diffserv */
+++				break;
++ 
+++			newmark = (newmark & ~info->ctmark) |
+++				  (info->ctmask | (dscp << info->shift_bits));
+++		}
++ 		if (ct->mark != newmark) {
++ 			ct->mark = newmark;
++ 			nf_conntrack_event_cache(IPCT_MARK, ct);
++@@ -81,20 +94,36 @@ static unsigned int
++ connmark_tg(struct sk_buff *skb, const struct xt_action_param *par)
++ {
++ 	const struct xt_connmark_tginfo1 *info = par->targinfo;
++-	const struct xt_connmark_tginfo2 info2 = {
+++	const struct xt_connmark_tginfo3 info3 = {
++ 		.ctmark	= info->ctmark,
++ 		.ctmask	= info->ctmask,
++ 		.nfmask	= info->nfmask,
++ 		.mode	= info->mode,
+++		.func	= XT_CONNMARK_VALUE
++ 	};
++ 
++-	return connmark_tg_shift(skb, &info2);
+++	return connmark_tg_shift(skb, &info3);
++ }
++ 
++ static unsigned int
++ connmark_tg_v2(struct sk_buff *skb, const struct xt_action_param *par)
++ {
++ 	const struct xt_connmark_tginfo2 *info = par->targinfo;
+++	const struct xt_connmark_tginfo3 info3 = {
+++		.ctmark	= info->ctmark,
+++		.ctmask	= info->ctmask,
+++		.nfmask	= info->nfmask,
+++		.mode	= info->mode,
+++		.func	= XT_CONNMARK_VALUE
+++	};
+++
+++	return connmark_tg_shift(skb, &info3);
+++}
+++
+++static unsigned int
+++connmark_tg_v3(struct sk_buff *skb, const struct xt_action_param *par)
+++{
+++	const struct xt_connmark_tginfo3 *info = par->targinfo;
++ 
++ 	return connmark_tg_shift(skb, info);
++ }
++@@ -165,6 +194,16 @@ static struct xt_target connmark_tg_reg[
++ 		.targetsize     = sizeof(struct xt_connmark_tginfo2),
++ 		.destroy        = connmark_tg_destroy,
++ 		.me             = THIS_MODULE,
+++	},
+++	{
+++		.name           = "CONNMARK",
+++		.revision       = 3,
+++		.family         = NFPROTO_UNSPEC,
+++		.checkentry     = connmark_tg_check,
+++		.target         = connmark_tg_v3,
+++		.targetsize     = sizeof(struct xt_connmark_tginfo3),
+++		.destroy        = connmark_tg_destroy,
+++		.me             = THIS_MODULE,
++ 	}
++ };
++ 
+diff --git a/target/linux/generic/hack-5.4/647-netfilter-flow-acct.patch b/target/linux/generic/hack-5.4/647-netfilter-flow-acct.patch
+new file mode 100644
+index 0000000000..f9480d59d1
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/647-netfilter-flow-acct.patch
+@@ -0,0 +1,70 @@
++--- a/include/net/netfilter/nf_flow_table.h
+++++ b/include/net/netfilter/nf_flow_table.h
++@@ -160,6 +160,8 @@ struct nf_flow_table_hw {
++ int nf_flow_table_hw_register(const struct nf_flow_table_hw *offload);
++ void nf_flow_table_hw_unregister(const struct nf_flow_table_hw *offload);
++ 
+++void nf_flow_table_acct(struct flow_offload *flow, struct sk_buff *skb, int dir);
+++
++ extern struct work_struct nf_flow_offload_hw_work;
++ 
++ #define MODULE_ALIAS_NF_FLOWTABLE(family)	\
++--- a/net/netfilter/nf_flow_table_core.c
+++++ b/net/netfilter/nf_flow_table_core.c
++@@ -13,6 +13,7 @@
++ #include <net/netfilter/nf_conntrack_core.h>
++ #include <net/netfilter/nf_conntrack_l4proto.h>
++ #include <net/netfilter/nf_conntrack_tuple.h>
+++#include <net/netfilter/nf_conntrack_acct.h>
++ 
++ struct flow_offload_entry {
++ 	struct flow_offload	flow;
++@@ -164,6 +165,22 @@ void flow_offload_free(struct flow_offlo
++ }
++ EXPORT_SYMBOL_GPL(flow_offload_free);
++ 
+++void nf_flow_table_acct(struct flow_offload *flow, struct sk_buff *skb, int dir)
+++{
+++	struct flow_offload_entry *entry;
+++	struct nf_conn_acct *acct;
+++
+++	entry = container_of(flow, struct flow_offload_entry, flow);
+++	acct = nf_conn_acct_find(entry->ct);
+++	if (acct) {
+++		struct nf_conn_counter *counter = acct->counter;
+++
+++		atomic64_inc(&counter[dir].packets);
+++		atomic64_add(skb->len, &counter[dir].bytes);
+++	}
+++}
+++EXPORT_SYMBOL_GPL(nf_flow_table_acct);
+++
++ static u32 flow_offload_hash(const void *data, u32 len, u32 seed)
++ {
++ 	const struct flow_offload_tuple *tuple = data;
++--- a/net/netfilter/nf_flow_table_ip.c
+++++ b/net/netfilter/nf_flow_table_ip.c
++@@ -12,6 +12,7 @@
++ #include <net/ip6_route.h>
++ #include <net/neighbour.h>
++ #include <net/netfilter/nf_flow_table.h>
+++
++ /* For layer 4 checksum field offset. */
++ #include <linux/tcp.h>
++ #include <linux/udp.h>
++@@ -296,6 +297,7 @@ nf_flow_offload_ip_hook(void *priv, stru
++ 	skb->dev = outdev;
++ 	nexthop = rt_nexthop(rt, flow->tuplehash[!dir].tuple.src_v4.s_addr);
++ 	skb_dst_set_noref(skb, &rt->dst);
+++	nf_flow_table_acct(flow, skb, dir);
++ 	neigh_xmit(NEIGH_ARP_TABLE, outdev, &nexthop, skb);
++ 
++ 	return NF_STOLEN;
++@@ -526,6 +528,7 @@ nf_flow_offload_ipv6_hook(void *priv, st
++ 	skb->dev = outdev;
++ 	nexthop = rt6_nexthop(rt, &flow->tuplehash[!dir].tuple.src_v6);
++ 	skb_dst_set_noref(skb, &rt->dst);
+++	nf_flow_table_acct(flow, skb, dir);
++ 	neigh_xmit(NEIGH_ND_TABLE, outdev, nexthop, skb);
++ 
++ 	return NF_STOLEN;
+diff --git a/target/linux/generic/hack-5.4/650-netfilter-add-xt_OFFLOAD-target.patch b/target/linux/generic/hack-5.4/650-netfilter-add-xt_OFFLOAD-target.patch
+new file mode 100644
+index 0000000000..d584cb5c6c
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/650-netfilter-add-xt_OFFLOAD-target.patch
+@@ -0,0 +1,589 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Tue, 20 Feb 2018 15:56:02 +0100
++Subject: [PATCH] netfilter: add xt_OFFLOAD target
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ create mode 100644 net/netfilter/xt_OFFLOAD.c
++
++--- a/net/ipv4/netfilter/Kconfig
+++++ b/net/ipv4/netfilter/Kconfig
++@@ -56,8 +56,6 @@ config NF_TABLES_ARP
++ 	help
++ 	  This option enables the ARP support for nf_tables.
++ 
++-endif # NF_TABLES
++-
++ config NF_FLOW_TABLE_IPV4
++ 	tristate "Netfilter flow table IPv4 module"
++ 	depends on NF_FLOW_TABLE
++@@ -66,6 +64,8 @@ config NF_FLOW_TABLE_IPV4
++ 
++ 	  To compile it as a module, choose M here.
++ 
+++endif # NF_TABLES
+++
++ config NF_DUP_IPV4
++ 	tristate "Netfilter IPv4 packet duplication to alternate destination"
++ 	depends on !NF_CONNTRACK || NF_CONNTRACK
++--- a/net/ipv6/netfilter/Kconfig
+++++ b/net/ipv6/netfilter/Kconfig
++@@ -45,7 +45,6 @@ config NFT_FIB_IPV6
++ 	  multicast or blackhole.
++ 
++ endif # NF_TABLES_IPV6
++-endif # NF_TABLES
++ 
++ config NF_FLOW_TABLE_IPV6
++ 	tristate "Netfilter flow table IPv6 module"
++@@ -55,6 +54,8 @@ config NF_FLOW_TABLE_IPV6
++ 
++ 	  To compile it as a module, choose M here.
++ 
+++endif # NF_TABLES
+++
++ config NF_DUP_IPV6
++ 	tristate "Netfilter IPv6 packet duplication to alternate destination"
++ 	depends on !NF_CONNTRACK || NF_CONNTRACK
++--- a/net/netfilter/Kconfig
+++++ b/net/netfilter/Kconfig
++@@ -690,8 +690,6 @@ config NFT_FIB_NETDEV
++ 
++ endif # NF_TABLES_NETDEV
++ 
++-endif # NF_TABLES
++-
++ config NF_FLOW_TABLE_INET
++ 	tristate "Netfilter flow table mixed IPv4/IPv6 module"
++ 	depends on NF_FLOW_TABLE
++@@ -700,11 +698,12 @@ config NF_FLOW_TABLE_INET
++ 
++ 	  To compile it as a module, choose M here.
++ 
+++endif # NF_TABLES
+++
++ config NF_FLOW_TABLE
++ 	tristate "Netfilter flow table module"
++ 	depends on NETFILTER_INGRESS
++ 	depends on NF_CONNTRACK
++-	depends on NF_TABLES
++ 	help
++ 	  This option adds the flow table core infrastructure.
++ 
++@@ -993,6 +992,15 @@ config NETFILTER_XT_TARGET_NOTRACK
++ 	depends on NETFILTER_ADVANCED
++ 	select NETFILTER_XT_TARGET_CT
++ 
+++config NETFILTER_XT_TARGET_FLOWOFFLOAD
+++	tristate '"FLOWOFFLOAD" target support'
+++	depends on NF_FLOW_TABLE
+++	depends on NETFILTER_INGRESS
+++	help
+++	  This option adds a `FLOWOFFLOAD' target, which uses the nf_flow_offload
+++	  module to speed up processing of packets by bypassing the usual
+++	  netfilter chains
+++
++ config NETFILTER_XT_TARGET_RATEEST
++ 	tristate '"RATEEST" target support'
++ 	depends on NETFILTER_ADVANCED
++--- a/net/netfilter/Makefile
+++++ b/net/netfilter/Makefile
++@@ -141,6 +141,7 @@ obj-$(CONFIG_NETFILTER_XT_TARGET_CLASSIF
++ obj-$(CONFIG_NETFILTER_XT_TARGET_CONNSECMARK) += xt_CONNSECMARK.o
++ obj-$(CONFIG_NETFILTER_XT_TARGET_CT) += xt_CT.o
++ obj-$(CONFIG_NETFILTER_XT_TARGET_DSCP) += xt_DSCP.o
+++obj-$(CONFIG_NETFILTER_XT_TARGET_FLOWOFFLOAD) += xt_FLOWOFFLOAD.o
++ obj-$(CONFIG_NETFILTER_XT_TARGET_HL) += xt_HL.o
++ obj-$(CONFIG_NETFILTER_XT_TARGET_HMARK) += xt_HMARK.o
++ obj-$(CONFIG_NETFILTER_XT_TARGET_LED) += xt_LED.o
++--- /dev/null
+++++ b/net/netfilter/xt_FLOWOFFLOAD.c
++@@ -0,0 +1,427 @@
+++/*
+++ * Copyright (C) 2018 Felix Fietkau <nbd@nbd.name>
+++ *
+++ * This program is free software; you can redistribute it and/or modify
+++ * it under the terms of the GNU General Public License version 2 as
+++ * published by the Free Software Foundation.
+++ */
+++#include <linux/module.h>
+++#include <linux/init.h>
+++#include <linux/netfilter.h>
+++#include <linux/netfilter/xt_FLOWOFFLOAD.h>
+++#include <net/ip.h>
+++#include <net/netfilter/nf_conntrack.h>
+++#include <net/netfilter/nf_conntrack_extend.h>
+++#include <net/netfilter/nf_conntrack_helper.h>
+++#include <net/netfilter/nf_flow_table.h>
+++
+++static struct nf_flowtable nf_flowtable;
+++static HLIST_HEAD(hooks);
+++static DEFINE_SPINLOCK(hooks_lock);
+++static struct delayed_work hook_work;
+++
+++struct xt_flowoffload_hook {
+++	struct hlist_node list;
+++	struct nf_hook_ops ops;
+++	struct net *net;
+++	bool registered;
+++	bool used;
+++};
+++
+++static unsigned int
+++xt_flowoffload_net_hook(void *priv, struct sk_buff *skb,
+++			  const struct nf_hook_state *state)
+++{
+++	switch (skb->protocol) {
+++	case htons(ETH_P_IP):
+++		return nf_flow_offload_ip_hook(priv, skb, state);
+++	case htons(ETH_P_IPV6):
+++		return nf_flow_offload_ipv6_hook(priv, skb, state);
+++	}
+++
+++	return NF_ACCEPT;
+++}
+++
+++int nf_flow_table_iterate(struct nf_flowtable *flow_table,
+++			   void (*iter)(struct flow_offload *flow, void *data),
+++			   void *data);
+++
+++static int
+++xt_flowoffload_create_hook(struct net_device *dev)
+++{
+++	struct xt_flowoffload_hook *hook;
+++	struct nf_hook_ops *ops;
+++
+++	hook = kzalloc(sizeof(*hook), GFP_ATOMIC);
+++	if (!hook)
+++		return -ENOMEM;
+++
+++	ops = &hook->ops;
+++	ops->pf = NFPROTO_NETDEV;
+++	ops->hooknum = NF_NETDEV_INGRESS;
+++	ops->priority = 10;
+++	ops->priv = &nf_flowtable;
+++	ops->hook = xt_flowoffload_net_hook;
+++	ops->dev = dev;
+++
+++	hlist_add_head(&hook->list, &hooks);
+++	mod_delayed_work(system_power_efficient_wq, &hook_work, 0);
+++
+++	return 0;
+++}
+++
+++static struct xt_flowoffload_hook *
+++flow_offload_lookup_hook(struct net_device *dev)
+++{
+++	struct xt_flowoffload_hook *hook;
+++
+++	hlist_for_each_entry(hook, &hooks, list) {
+++		if (hook->ops.dev == dev)
+++			return hook;
+++	}
+++
+++	return NULL;
+++}
+++
+++static void
+++xt_flowoffload_check_device(struct net_device *dev)
+++{
+++	struct xt_flowoffload_hook *hook;
+++
+++	spin_lock_bh(&hooks_lock);
+++	hook = flow_offload_lookup_hook(dev);
+++	if (hook)
+++		hook->used = true;
+++	else
+++		xt_flowoffload_create_hook(dev);
+++	spin_unlock_bh(&hooks_lock);
+++}
+++
+++static void
+++xt_flowoffload_register_hooks(void)
+++{
+++	struct xt_flowoffload_hook *hook;
+++
+++restart:
+++	hlist_for_each_entry(hook, &hooks, list) {
+++		if (hook->registered)
+++			continue;
+++
+++		hook->registered = true;
+++		hook->net = dev_net(hook->ops.dev);
+++		spin_unlock_bh(&hooks_lock);
+++		nf_register_net_hook(hook->net, &hook->ops);
+++		spin_lock_bh(&hooks_lock);
+++		goto restart;
+++	}
+++
+++}
+++
+++static void
+++xt_flowoffload_cleanup_hooks(void)
+++{
+++	struct xt_flowoffload_hook *hook;
+++
+++restart:
+++	hlist_for_each_entry(hook, &hooks, list) {
+++		if (hook->used || !hook->registered)
+++			continue;
+++
+++		hlist_del(&hook->list);
+++		spin_unlock_bh(&hooks_lock);
+++		nf_unregister_net_hook(hook->net, &hook->ops);
+++		kfree(hook);
+++		spin_lock_bh(&hooks_lock);
+++		goto restart;
+++	}
+++
+++}
+++
+++static void
+++xt_flowoffload_check_hook(struct flow_offload *flow, void *data)
+++{
+++	struct flow_offload_tuple *tuple = &flow->tuplehash[0].tuple;
+++	struct xt_flowoffload_hook *hook;
+++	bool *found = data;
+++	struct rtable *rt = (struct rtable *)tuple->dst_cache;
+++
+++	spin_lock_bh(&hooks_lock);
+++	hlist_for_each_entry(hook, &hooks, list) {
+++		if (hook->ops.dev->ifindex != tuple->iifidx &&
+++		    hook->ops.dev->ifindex != rt->dst.dev->ifindex)
+++			continue;
+++
+++		hook->used = true;
+++		*found = true;
+++	}
+++	spin_unlock_bh(&hooks_lock);
+++}
+++
+++static void
+++xt_flowoffload_hook_work(struct work_struct *work)
+++{
+++	struct xt_flowoffload_hook *hook;
+++	bool found = false;
+++	int err;
+++
+++	spin_lock_bh(&hooks_lock);
+++	xt_flowoffload_register_hooks();
+++	hlist_for_each_entry(hook, &hooks, list)
+++		hook->used = false;
+++	spin_unlock_bh(&hooks_lock);
+++
+++	err = nf_flow_table_iterate(&nf_flowtable, xt_flowoffload_check_hook,
+++				    &found);
+++	if (err && err != -EAGAIN)
+++	    goto out;
+++
+++	spin_lock_bh(&hooks_lock);
+++	xt_flowoffload_cleanup_hooks();
+++	spin_unlock_bh(&hooks_lock);
+++
+++out:
+++	if (found)
+++		queue_delayed_work(system_power_efficient_wq, &hook_work, HZ);
+++}
+++
+++static bool
+++xt_flowoffload_skip(struct sk_buff *skb, int family)
+++{
+++	if (skb_sec_path(skb))
+++		return true;
+++
+++	if (family == NFPROTO_IPV4) {
+++		const struct ip_options *opt = &(IPCB(skb)->opt);
+++
+++		if (unlikely(opt->optlen))
+++			return true;
+++	}
+++
+++	return false;
+++}
+++
+++static struct dst_entry *
+++xt_flowoffload_dst(const struct nf_conn *ct, enum ip_conntrack_dir dir,
+++		   const struct xt_action_param *par, int ifindex)
+++{
+++	struct dst_entry *dst = NULL;
+++	struct flowi fl;
+++
+++	memset(&fl, 0, sizeof(fl));
+++	switch (xt_family(par)) {
+++	case NFPROTO_IPV4:
+++		fl.u.ip4.daddr = ct->tuplehash[dir].tuple.src.u3.ip;
+++		fl.u.ip4.flowi4_oif = ifindex;
+++		break;
+++	case NFPROTO_IPV6:
+++		fl.u.ip6.saddr = ct->tuplehash[dir].tuple.dst.u3.in6;
+++		fl.u.ip6.daddr = ct->tuplehash[dir].tuple.src.u3.in6;
+++		fl.u.ip6.flowi6_oif = ifindex;
+++		break;
+++	}
+++
+++	nf_route(xt_net(par), &dst, &fl, false, xt_family(par));
+++
+++	return dst;
+++}
+++
+++static int
+++xt_flowoffload_route(struct sk_buff *skb, const struct nf_conn *ct,
+++		   const struct xt_action_param *par,
+++		   struct nf_flow_route *route, enum ip_conntrack_dir dir)
+++{
+++	struct dst_entry *this_dst, *other_dst;
+++
+++	this_dst = xt_flowoffload_dst(ct, !dir, par, xt_out(par)->ifindex);
+++	other_dst = xt_flowoffload_dst(ct, dir, par, xt_in(par)->ifindex);
+++
+++	route->tuple[dir].dst		= this_dst;
+++	route->tuple[!dir].dst		= other_dst;
+++
+++	if (!this_dst || !other_dst)
+++		return -ENOENT;
+++
+++	if (dst_xfrm(this_dst) || dst_xfrm(other_dst))
+++		return -EINVAL;
+++
+++	return 0;
+++}
+++
+++static unsigned int
+++flowoffload_tg(struct sk_buff *skb, const struct xt_action_param *par)
+++{
+++	const struct xt_flowoffload_target_info *info = par->targinfo;
+++	struct tcphdr _tcph, *tcph = NULL;
+++	enum ip_conntrack_info ctinfo;
+++	enum ip_conntrack_dir dir;
+++	struct nf_flow_route route;
+++	struct flow_offload *flow = NULL;
+++	struct nf_conn *ct;
+++	struct net *net;
+++
+++	if (xt_flowoffload_skip(skb, xt_family(par)))
+++		return XT_CONTINUE;
+++
+++	ct = nf_ct_get(skb, &ctinfo);
+++	if (ct == NULL)
+++		return XT_CONTINUE;
+++
+++	switch (ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple.dst.protonum) {
+++	case IPPROTO_TCP:
+++		if (ct->proto.tcp.state != TCP_CONNTRACK_ESTABLISHED)
+++			return XT_CONTINUE;
+++
+++		tcph = skb_header_pointer(skb, par->thoff,
+++					  sizeof(_tcph), &_tcph);
+++		if (unlikely(!tcph || tcph->fin || tcph->rst))
+++			return XT_CONTINUE;
+++		break;
+++	case IPPROTO_UDP:
+++		break;
+++	default:
+++		return XT_CONTINUE;
+++	}
+++
+++	if (nf_ct_ext_exist(ct, NF_CT_EXT_HELPER) ||
+++	    ct->status & IPS_SEQ_ADJUST)
+++		return XT_CONTINUE;
+++
+++	if (!nf_ct_is_confirmed(ct))
+++		return XT_CONTINUE;
+++
+++	if (!xt_in(par) || !xt_out(par))
+++		return XT_CONTINUE;
+++
+++	if (test_and_set_bit(IPS_OFFLOAD_BIT, &ct->status))
+++		return XT_CONTINUE;
+++
+++	dir = CTINFO2DIR(ctinfo);
+++
+++	if (xt_flowoffload_route(skb, ct, par, &route, dir) == 0)
+++		flow = flow_offload_alloc(ct, &route);
+++
+++	dst_release(route.tuple[dir].dst);
+++	dst_release(route.tuple[!dir].dst);
+++
+++	if (!flow)
+++		goto err_flow_route;
+++
+++	if (tcph) {
+++		ct->proto.tcp.seen[0].flags |= IP_CT_TCP_FLAG_BE_LIBERAL;
+++		ct->proto.tcp.seen[1].flags |= IP_CT_TCP_FLAG_BE_LIBERAL;
+++	}
+++
+++	if (flow_offload_add(&nf_flowtable, flow) < 0)
+++		goto err_flow_add;
+++
+++	xt_flowoffload_check_device(xt_in(par));
+++	xt_flowoffload_check_device(xt_out(par));
+++
+++	net = read_pnet(&nf_flowtable.ft_net);
+++	if (!net)
+++		write_pnet(&nf_flowtable.ft_net, xt_net(par));
+++
+++	if (info->flags & XT_FLOWOFFLOAD_HW)
+++		nf_flow_offload_hw_add(xt_net(par), flow, ct);
+++
+++	return XT_CONTINUE;
+++
+++err_flow_add:
+++	flow_offload_free(flow);
+++err_flow_route:
+++	clear_bit(IPS_OFFLOAD_BIT, &ct->status);
+++	return XT_CONTINUE;
+++}
+++
+++
+++static int flowoffload_chk(const struct xt_tgchk_param *par)
+++{
+++	struct xt_flowoffload_target_info *info = par->targinfo;
+++
+++	if (info->flags & ~XT_FLOWOFFLOAD_MASK)
+++		return -EINVAL;
+++
+++	return 0;
+++}
+++
+++static struct xt_target offload_tg_reg __read_mostly = {
+++	.family		= NFPROTO_UNSPEC,
+++	.name		= "FLOWOFFLOAD",
+++	.revision	= 0,
+++	.targetsize	= sizeof(struct xt_flowoffload_target_info),
+++	.usersize	= sizeof(struct xt_flowoffload_target_info),
+++	.checkentry	= flowoffload_chk,
+++	.target		= flowoffload_tg,
+++	.me		= THIS_MODULE,
+++};
+++
+++static int xt_flowoffload_table_init(struct nf_flowtable *table)
+++{
+++	table->flags = NF_FLOWTABLE_F_HW;
+++	nf_flow_table_init(table);
+++	return 0;
+++}
+++
+++static void xt_flowoffload_table_cleanup(struct nf_flowtable *table)
+++{
+++	nf_flow_table_free(table);
+++}
+++
+++static int flow_offload_netdev_event(struct notifier_block *this,
+++				     unsigned long event, void *ptr)
+++{
+++	struct xt_flowoffload_hook *hook = NULL;
+++	struct net_device *dev = netdev_notifier_info_to_dev(ptr);
+++
+++	if (event != NETDEV_UNREGISTER)
+++		return NOTIFY_DONE;
+++
+++	spin_lock_bh(&hooks_lock);
+++	hook = flow_offload_lookup_hook(dev);
+++	if (hook) {
+++		hlist_del(&hook->list);
+++	}
+++	spin_unlock_bh(&hooks_lock);
+++	if (hook) {
+++		nf_unregister_net_hook(hook->net, &hook->ops);
+++		kfree(hook);
+++	}
+++
+++	nf_flow_table_cleanup(dev);
+++
+++	return NOTIFY_DONE;
+++}
+++
+++static struct notifier_block flow_offload_netdev_notifier = {
+++	.notifier_call	= flow_offload_netdev_event,
+++};
+++
+++static int __init xt_flowoffload_tg_init(void)
+++{
+++	int ret;
+++
+++	register_netdevice_notifier(&flow_offload_netdev_notifier);
+++
+++	INIT_DELAYED_WORK(&hook_work, xt_flowoffload_hook_work);
+++
+++	ret = xt_flowoffload_table_init(&nf_flowtable);
+++	if (ret)
+++		return ret;
+++
+++	ret = xt_register_target(&offload_tg_reg);
+++	if (ret)
+++		xt_flowoffload_table_cleanup(&nf_flowtable);
+++
+++	return ret;
+++}
+++
+++static void __exit xt_flowoffload_tg_exit(void)
+++{
+++	xt_unregister_target(&offload_tg_reg);
+++	xt_flowoffload_table_cleanup(&nf_flowtable);
+++	unregister_netdevice_notifier(&flow_offload_netdev_notifier);
+++}
+++
+++MODULE_LICENSE("GPL");
+++module_init(xt_flowoffload_tg_init);
+++module_exit(xt_flowoffload_tg_exit);
++--- a/net/netfilter/nf_flow_table_core.c
+++++ b/net/netfilter/nf_flow_table_core.c
++@@ -7,7 +7,6 @@
++ #include <linux/netdevice.h>
++ #include <net/ip.h>
++ #include <net/ip6_route.h>
++-#include <net/netfilter/nf_tables.h>
++ #include <net/netfilter/nf_flow_table.h>
++ #include <net/netfilter/nf_conntrack.h>
++ #include <net/netfilter/nf_conntrack_core.h>
++@@ -338,8 +337,7 @@ flow_offload_lookup(struct nf_flowtable
++ }
++ EXPORT_SYMBOL_GPL(flow_offload_lookup);
++ 
++-static int
++-nf_flow_table_iterate(struct nf_flowtable *flow_table,
+++int nf_flow_table_iterate(struct nf_flowtable *flow_table,
++ 		      void (*iter)(struct flow_offload *flow, void *data),
++ 		      void *data)
++ {
++@@ -372,6 +370,7 @@ nf_flow_table_iterate(struct nf_flowtabl
++ 
++ 	return err;
++ }
+++EXPORT_SYMBOL_GPL(nf_flow_table_iterate);
++ 
++ static void nf_flow_offload_gc_step(struct flow_offload *flow, void *data)
++ {
++--- /dev/null
+++++ b/include/uapi/linux/netfilter/xt_FLOWOFFLOAD.h
++@@ -0,0 +1,17 @@
+++/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+++#ifndef _XT_FLOWOFFLOAD_H
+++#define _XT_FLOWOFFLOAD_H
+++
+++#include <linux/types.h>
+++
+++enum {
+++	XT_FLOWOFFLOAD_HW	= 1 << 0,
+++
+++	XT_FLOWOFFLOAD_MASK	= XT_FLOWOFFLOAD_HW
+++};
+++
+++struct xt_flowoffload_target_info {
+++	__u32 flags;
+++};
+++
+++#endif /* _XT_FLOWOFFLOAD_H */
++--- a/include/net/netfilter/nf_flow_table.h
+++++ b/include/net/netfilter/nf_flow_table.h
++@@ -130,6 +130,10 @@ static inline void flow_offload_dead(str
++ 	flow->flags |= FLOW_OFFLOAD_DYING;
++ }
++ 
+++int nf_flow_table_iterate(struct nf_flowtable *flow_table,
+++                      void (*iter)(struct flow_offload *flow, void *data),
+++                      void *data);
+++
++ int nf_flow_snat_port(const struct flow_offload *flow,
++ 		      struct sk_buff *skb, unsigned int thoff,
++ 		      u8 protocol, enum flow_offload_tuple_dir dir);
+diff --git a/target/linux/generic/hack-5.4/651-wireless_mesh_header.patch b/target/linux/generic/hack-5.4/651-wireless_mesh_header.patch
+new file mode 100644
+index 0000000000..f545d8ebbc
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/651-wireless_mesh_header.patch
+@@ -0,0 +1,24 @@
++From 6d3bc769657b0ee7c7506dad9911111c4226a7ea Mon Sep 17 00:00:00 2001
++From: Imre Kaloz <kaloz@openwrt.org>
++Date: Fri, 7 Jul 2017 17:21:05 +0200
++Subject: mac80211: increase wireless mesh header size
++
++lede-commit 3d4466cfd8f75f717efdb1f96fdde3c70d865fc1
++Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
++---
++ include/linux/netdevice.h | 4 ++--
++ 1 file changed, 2 insertions(+), 2 deletions(-)
++
++--- a/include/linux/netdevice.h
+++++ b/include/linux/netdevice.h
++@@ -138,8 +138,8 @@ static inline bool dev_xmit_complete(int
++ 
++ #if defined(CONFIG_HYPERV_NET)
++ # define LL_MAX_HEADER 128
++-#elif defined(CONFIG_WLAN) || IS_ENABLED(CONFIG_AX25)
++-# if defined(CONFIG_MAC80211_MESH)
+++#elif defined(CONFIG_WLAN) || IS_ENABLED(CONFIG_AX25) || 1
+++# if defined(CONFIG_MAC80211_MESH) || 1
++ #  define LL_MAX_HEADER 128
++ # else
++ #  define LL_MAX_HEADER 96
+diff --git a/target/linux/generic/hack-5.4/660-fq_codel_defaults.patch b/target/linux/generic/hack-5.4/660-fq_codel_defaults.patch
+new file mode 100644
+index 0000000000..46bf0e3b0b
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/660-fq_codel_defaults.patch
+@@ -0,0 +1,27 @@
++From a6ccb238939b25851474a279b20367fd24a0e816 Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 7 Jul 2017 17:21:53 +0200
++Subject:  hack: net: fq_codel: tune defaults for small devices
++
++Assume that x86_64 devices always have a big memory and do not need this 
++optimization compared to devices with only 32 MB or 64 MB RAM.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ net/sched/sch_fq_codel.c | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/net/sched/sch_fq_codel.c
+++++ b/net/sched/sch_fq_codel.c
++@@ -470,7 +470,11 @@ static int fq_codel_init(struct Qdisc *s
++ 
++ 	sch->limit = 10*1024;
++ 	q->flows_cnt = 1024;
+++#ifdef CONFIG_X86_64
++ 	q->memory_limit = 32 << 20; /* 32 MBytes */
+++#else
+++	q->memory_limit = 4 << 20; /* 4 MBytes */
+++#endif
++ 	q->drop_batch_size = 64;
++ 	q->quantum = psched_mtu(qdisc_dev(sch));
++ 	INIT_LIST_HEAD(&q->new_flows);
+diff --git a/target/linux/generic/hack-5.4/661-use_fq_codel_by_default.patch b/target/linux/generic/hack-5.4/661-use_fq_codel_by_default.patch
+new file mode 100644
+index 0000000000..bbe43d24c2
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/661-use_fq_codel_by_default.patch
+@@ -0,0 +1,100 @@
++From 1d418f7e88035ed7a94073f6354246c66e9193e9 Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 7 Jul 2017 17:22:58 +0200
++Subject: fq_codel: switch default qdisc from pfifo_fast to fq_codel and remove pfifo_fast
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ include/net/sch_generic.h | 3 ++-
++ net/sched/Kconfig         | 3 ++-
++ net/sched/sch_api.c       | 2 +-
++ net/sched/sch_fq_codel.c  | 3 ++-
++ net/sched/sch_generic.c   | 4 ++--
++ 5 files changed, 9 insertions(+), 6 deletions(-)
++
++--- a/include/net/sch_generic.h
+++++ b/include/net/sch_generic.h
++@@ -615,12 +615,13 @@ extern struct Qdisc_ops noop_qdisc_ops;
++ extern struct Qdisc_ops pfifo_fast_ops;
++ extern struct Qdisc_ops mq_qdisc_ops;
++ extern struct Qdisc_ops noqueue_qdisc_ops;
+++extern struct Qdisc_ops fq_codel_qdisc_ops;
++ extern const struct Qdisc_ops *default_qdisc_ops;
++ static inline const struct Qdisc_ops *
++ get_default_qdisc_ops(const struct net_device *dev, int ntx)
++ {
++ 	return ntx < dev->real_num_tx_queues ?
++-			default_qdisc_ops : &pfifo_fast_ops;
+++			default_qdisc_ops : &fq_codel_qdisc_ops;
++ }
++ 
++ struct Qdisc_class_common {
++--- a/net/sched/Kconfig
+++++ b/net/sched/Kconfig
++@@ -4,8 +4,9 @@
++ #
++ 
++ menuconfig NET_SCHED
++-	bool "QoS and/or fair queueing"
+++	def_bool y
++ 	select NET_SCH_FIFO
+++	select NET_SCH_FQ_CODEL
++ 	---help---
++ 	  When the kernel has several packets to send out over a network
++ 	  device, it has to decide which ones to send first, which ones to
++--- a/net/sched/sch_api.c
+++++ b/net/sched/sch_api.c
++@@ -2278,7 +2278,7 @@ static int __init pktsched_init(void)
++ 		return err;
++ 	}
++ 
++-	register_qdisc(&pfifo_fast_ops);
+++	register_qdisc(&fq_codel_qdisc_ops);
++ 	register_qdisc(&pfifo_qdisc_ops);
++ 	register_qdisc(&bfifo_qdisc_ops);
++ 	register_qdisc(&pfifo_head_drop_qdisc_ops);
++--- a/net/sched/sch_fq_codel.c
+++++ b/net/sched/sch_fq_codel.c
++@@ -710,7 +710,7 @@ static const struct Qdisc_class_ops fq_c
++ 	.walk		=	fq_codel_walk,
++ };
++ 
++-static struct Qdisc_ops fq_codel_qdisc_ops __read_mostly = {
+++struct Qdisc_ops fq_codel_qdisc_ops __read_mostly = {
++ 	.cl_ops		=	&fq_codel_class_ops,
++ 	.id		=	"fq_codel",
++ 	.priv_size	=	sizeof(struct fq_codel_sched_data),
++@@ -725,6 +725,7 @@ static struct Qdisc_ops fq_codel_qdisc_o
++ 	.dump_stats =	fq_codel_dump_stats,
++ 	.owner		=	THIS_MODULE,
++ };
+++EXPORT_SYMBOL(fq_codel_qdisc_ops);
++ 
++ static int __init fq_codel_module_init(void)
++ {
++--- a/net/sched/sch_generic.c
+++++ b/net/sched/sch_generic.c
++@@ -32,7 +32,7 @@
++ #include <net/xfrm.h>
++ 
++ /* Qdisc to use by default */
++-const struct Qdisc_ops *default_qdisc_ops = &pfifo_fast_ops;
+++const struct Qdisc_ops *default_qdisc_ops = &fq_codel_qdisc_ops;
++ EXPORT_SYMBOL(default_qdisc_ops);
++ 
++ static void qdisc_maybe_clear_missed(struct Qdisc *q,
++@@ -1079,12 +1079,12 @@ static void attach_one_default_qdisc(str
++ 				     void *_unused)
++ {
++ 	struct Qdisc *qdisc;
++-	const struct Qdisc_ops *ops = default_qdisc_ops;
+++	const struct Qdisc_ops *ops = &fq_codel_qdisc_ops;
++ 
++ 	if (dev->priv_flags & IFF_NO_QUEUE)
++ 		ops = &noqueue_qdisc_ops;
++ 	else if(dev->type == ARPHRD_CAN)
++-		ops = &pfifo_fast_ops;
+++		ops = &fq_codel_qdisc_ops;
++ 
++ 	qdisc = qdisc_create_dflt(dev_queue, ops, TC_H_ROOT, NULL);
++ 	if (!qdisc) {
+diff --git a/target/linux/generic/hack-5.4/662-remove_pfifo_fast.patch b/target/linux/generic/hack-5.4/662-remove_pfifo_fast.patch
+new file mode 100644
+index 0000000000..9df3a8258d
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/662-remove_pfifo_fast.patch
+@@ -0,0 +1,243 @@
++From b531d492d5ef1cf9dba0f4888eb5fd8624a6d762 Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 7 Jul 2017 17:23:42 +0200
++Subject: net: sched: switch default qdisc from pfifo_fast to fq_codel and remove pfifo_fast
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ net/sched/sch_generic.c | 140 ------------------------------------------------
++ 1 file changed, 140 deletions(-)
++
++--- a/net/sched/sch_generic.c
+++++ b/net/sched/sch_generic.c
++@@ -620,230 +620,6 @@ struct Qdisc_ops noqueue_qdisc_ops __rea
++ 	.owner		=	THIS_MODULE,
++ };
++ 
++-static const u8 prio2band[TC_PRIO_MAX + 1] = {
++-	1, 2, 2, 2, 1, 2, 0, 0 , 1, 1, 1, 1, 1, 1, 1, 1
++-};
++-
++-/* 3-band FIFO queue: old style, but should be a bit faster than
++-   generic prio+fifo combination.
++- */
++-
++-#define PFIFO_FAST_BANDS 3
++-
++-/*
++- * Private data for a pfifo_fast scheduler containing:
++- *	- rings for priority bands
++- */
++-struct pfifo_fast_priv {
++-	struct skb_array q[PFIFO_FAST_BANDS];
++-};
++-
++-static inline struct skb_array *band2list(struct pfifo_fast_priv *priv,
++-					  int band)
++-{
++-	return &priv->q[band];
++-}
++-
++-static int pfifo_fast_enqueue(struct sk_buff *skb, struct Qdisc *qdisc,
++-			      struct sk_buff **to_free)
++-{
++-	int band = prio2band[skb->priority & TC_PRIO_MAX];
++-	struct pfifo_fast_priv *priv = qdisc_priv(qdisc);
++-	struct skb_array *q = band2list(priv, band);
++-	unsigned int pkt_len = qdisc_pkt_len(skb);
++-	int err;
++-
++-	err = skb_array_produce(q, skb);
++-
++-	if (unlikely(err)) {
++-		if (qdisc_is_percpu_stats(qdisc))
++-			return qdisc_drop_cpu(skb, qdisc, to_free);
++-		else
++-			return qdisc_drop(skb, qdisc, to_free);
++-	}
++-
++-	qdisc_update_stats_at_enqueue(qdisc, pkt_len);
++-	return NET_XMIT_SUCCESS;
++-}
++-
++-static struct sk_buff *pfifo_fast_dequeue(struct Qdisc *qdisc)
++-{
++-	struct pfifo_fast_priv *priv = qdisc_priv(qdisc);
++-	struct sk_buff *skb = NULL;
++-	bool need_retry = true;
++-	int band;
++-
++-retry:
++-	for (band = 0; band < PFIFO_FAST_BANDS && !skb; band++) {
++-		struct skb_array *q = band2list(priv, band);
++-
++-		if (__skb_array_empty(q))
++-			continue;
++-
++-		skb = __skb_array_consume(q);
++-	}
++-	if (likely(skb)) {
++-		qdisc_update_stats_at_dequeue(qdisc, skb);
++-	} else if (need_retry &&
++-		   test_bit(__QDISC_STATE_MISSED, &qdisc->state)) {
++-		/* Delay clearing the STATE_MISSED here to reduce
++-		 * the overhead of the second spin_trylock() in
++-		 * qdisc_run_begin() and __netif_schedule() calling
++-		 * in qdisc_run_end().
++-		 */
++-		clear_bit(__QDISC_STATE_MISSED, &qdisc->state);
++-
++-		/* Make sure dequeuing happens after clearing
++-		 * STATE_MISSED.
++-		 */
++-		smp_mb__after_atomic();
++-
++-		need_retry = false;
++-
++-		goto retry;
++-	} else {
++-		WRITE_ONCE(qdisc->empty, true);
++-	}
++-
++-	return skb;
++-}
++-
++-static struct sk_buff *pfifo_fast_peek(struct Qdisc *qdisc)
++-{
++-	struct pfifo_fast_priv *priv = qdisc_priv(qdisc);
++-	struct sk_buff *skb = NULL;
++-	int band;
++-
++-	for (band = 0; band < PFIFO_FAST_BANDS && !skb; band++) {
++-		struct skb_array *q = band2list(priv, band);
++-
++-		skb = __skb_array_peek(q);
++-	}
++-
++-	return skb;
++-}
++-
++-static void pfifo_fast_reset(struct Qdisc *qdisc)
++-{
++-	int i, band;
++-	struct pfifo_fast_priv *priv = qdisc_priv(qdisc);
++-
++-	for (band = 0; band < PFIFO_FAST_BANDS; band++) {
++-		struct skb_array *q = band2list(priv, band);
++-		struct sk_buff *skb;
++-
++-		/* NULL ring is possible if destroy path is due to a failed
++-		 * skb_array_init() in pfifo_fast_init() case.
++-		 */
++-		if (!q->ring.queue)
++-			continue;
++-
++-		while ((skb = __skb_array_consume(q)) != NULL)
++-			kfree_skb(skb);
++-	}
++-
++-	if (qdisc_is_percpu_stats(qdisc)) {
++-		for_each_possible_cpu(i) {
++-			struct gnet_stats_queue *q;
++-
++-			q = per_cpu_ptr(qdisc->cpu_qstats, i);
++-			q->backlog = 0;
++-			q->qlen = 0;
++-		}
++-	}
++-}
++-
++-static int pfifo_fast_dump(struct Qdisc *qdisc, struct sk_buff *skb)
++-{
++-	struct tc_prio_qopt opt = { .bands = PFIFO_FAST_BANDS };
++-
++-	memcpy(&opt.priomap, prio2band, TC_PRIO_MAX + 1);
++-	if (nla_put(skb, TCA_OPTIONS, sizeof(opt), &opt))
++-		goto nla_put_failure;
++-	return skb->len;
++-
++-nla_put_failure:
++-	return -1;
++-}
++-
++-static int pfifo_fast_init(struct Qdisc *qdisc, struct nlattr *opt,
++-			   struct netlink_ext_ack *extack)
++-{
++-	unsigned int qlen = qdisc_dev(qdisc)->tx_queue_len;
++-	struct pfifo_fast_priv *priv = qdisc_priv(qdisc);
++-	int prio;
++-
++-	/* guard against zero length rings */
++-	if (!qlen)
++-		return -EINVAL;
++-
++-	for (prio = 0; prio < PFIFO_FAST_BANDS; prio++) {
++-		struct skb_array *q = band2list(priv, prio);
++-		int err;
++-
++-		err = skb_array_init(q, qlen, GFP_KERNEL);
++-		if (err)
++-			return -ENOMEM;
++-	}
++-
++-	/* Can by-pass the queue discipline */
++-	qdisc->flags |= TCQ_F_CAN_BYPASS;
++-	return 0;
++-}
++-
++-static void pfifo_fast_destroy(struct Qdisc *sch)
++-{
++-	struct pfifo_fast_priv *priv = qdisc_priv(sch);
++-	int prio;
++-
++-	for (prio = 0; prio < PFIFO_FAST_BANDS; prio++) {
++-		struct skb_array *q = band2list(priv, prio);
++-
++-		/* NULL ring is possible if destroy path is due to a failed
++-		 * skb_array_init() in pfifo_fast_init() case.
++-		 */
++-		if (!q->ring.queue)
++-			continue;
++-		/* Destroy ring but no need to kfree_skb because a call to
++-		 * pfifo_fast_reset() has already done that work.
++-		 */
++-		ptr_ring_cleanup(&q->ring, NULL);
++-	}
++-}
++-
++-static int pfifo_fast_change_tx_queue_len(struct Qdisc *sch,
++-					  unsigned int new_len)
++-{
++-	struct pfifo_fast_priv *priv = qdisc_priv(sch);
++-	struct skb_array *bands[PFIFO_FAST_BANDS];
++-	int prio;
++-
++-	for (prio = 0; prio < PFIFO_FAST_BANDS; prio++) {
++-		struct skb_array *q = band2list(priv, prio);
++-
++-		bands[prio] = q;
++-	}
++-
++-	return skb_array_resize_multiple(bands, PFIFO_FAST_BANDS, new_len,
++-					 GFP_KERNEL);
++-}
++-
++-struct Qdisc_ops pfifo_fast_ops __read_mostly = {
++-	.id		=	"pfifo_fast",
++-	.priv_size	=	sizeof(struct pfifo_fast_priv),
++-	.enqueue	=	pfifo_fast_enqueue,
++-	.dequeue	=	pfifo_fast_dequeue,
++-	.peek		=	pfifo_fast_peek,
++-	.init		=	pfifo_fast_init,
++-	.destroy	=	pfifo_fast_destroy,
++-	.reset		=	pfifo_fast_reset,
++-	.dump		=	pfifo_fast_dump,
++-	.change_tx_queue_len =  pfifo_fast_change_tx_queue_len,
++-	.owner		=	THIS_MODULE,
++-	.static_flags	=	TCQ_F_NOLOCK | TCQ_F_CPUSTATS,
++-};
++-EXPORT_SYMBOL(pfifo_fast_ops);
++-
++ struct Qdisc *qdisc_alloc(struct netdev_queue *dev_queue,
++ 			  const struct Qdisc_ops *ops,
++ 			  struct netlink_ext_ack *extack)
+diff --git a/target/linux/generic/hack-5.4/700-swconfig_switch_drivers.patch b/target/linux/generic/hack-5.4/700-swconfig_switch_drivers.patch
+new file mode 100644
+index 0000000000..f30ad81e4e
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/700-swconfig_switch_drivers.patch
+@@ -0,0 +1,135 @@
++From 36e516290611e613aa92996cb4339561452695b4 Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 7 Jul 2017 17:24:23 +0200
++Subject: net: swconfig: adds openwrt switch layer
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ drivers/net/phy/Kconfig   | 83 +++++++++++++++++++++++++++++++++++++++++++++++
++ drivers/net/phy/Makefile  | 15 +++++++++
++ include/uapi/linux/Kbuild |  1 +
++ 3 files changed, 99 insertions(+)
++
++--- a/drivers/net/phy/Kconfig
+++++ b/drivers/net/phy/Kconfig
++@@ -250,6 +250,85 @@ config LED_TRIGGER_PHY
++ 		for any speed known to the PHY.
++ 
++ 
+++comment "Switch configuration API + drivers"
+++
+++config SWCONFIG
+++	tristate "Switch configuration API"
+++	---help---
+++	  Switch configuration API using netlink. This allows
+++	  you to configure the VLAN features of certain switches.
+++
+++config SWCONFIG_LEDS
+++	bool "Switch LED trigger support"
+++	depends on (SWCONFIG && LEDS_TRIGGERS)
+++
+++config ADM6996_PHY
+++	tristate "Driver for ADM6996 switches"
+++	select SWCONFIG
+++	---help---
+++	  Currently supports the ADM6996FC and ADM6996M switches.
+++	  Support for FC is very limited.
+++
+++config AR8216_PHY
+++	tristate "Driver for Atheros AR8216 switches"
+++	select ETHERNET_PACKET_MANGLE
+++	select SWCONFIG
+++
+++config AR8216_PHY_LEDS
+++	bool "Atheros AR8216 switch LED support"
+++	depends on (AR8216_PHY && LEDS_CLASS)
+++
+++source "drivers/net/phy/b53/Kconfig"
+++
+++config IP17XX_PHY
+++	tristate "Driver for IC+ IP17xx switches"
+++	select SWCONFIG
+++
+++config MVSWITCH_PHY
+++	tristate "Driver for Marvell 88E6060 switches"
+++	select ETHERNET_PACKET_MANGLE
+++
+++config PSB6970_PHY
+++	tristate "Lantiq XWAY Tantos (PSB6970) Ethernet switch"
+++	select SWCONFIG
+++	select ETHERNET_PACKET_MANGLE
+++
+++config RTL8306_PHY
+++	tristate "Driver for Realtek RTL8306S switches"
+++	select SWCONFIG
+++
+++config RTL8366_SMI
+++	tristate "Driver for the RTL8366 SMI interface"
+++	depends on GPIOLIB
+++	---help---
+++	  This module implements the SMI interface protocol which is used
+++	  by some RTL8366 ethernet switch devices via the generic GPIO API.
+++
+++if RTL8366_SMI
+++
+++config RTL8366_SMI_DEBUG_FS
+++	bool "RTL8366 SMI interface debugfs support"
+++        depends on DEBUG_FS
+++        default n
+++
+++config RTL8366S_PHY
+++	tristate "Driver for the Realtek RTL8366S switch"
+++	select SWCONFIG
+++
+++config RTL8366RB_PHY
+++	tristate "Driver for the Realtek RTL8366RB switch"
+++	select SWCONFIG
+++
+++config RTL8367_PHY
+++	tristate "Driver for the Realtek RTL8367R/M switches"
+++	select SWCONFIG
+++
+++config RTL8367B_PHY
+++	tristate "Driver fot the Realtek RTL8367R-VB switch"
+++	select SWCONFIG
+++
+++endif # RTL8366_SMI
+++
++ comment "MII PHY device drivers"
++ 
++ config SFP
++--- a/drivers/net/phy/Makefile
+++++ b/drivers/net/phy/Makefile
++@@ -22,6 +22,20 @@ libphy-$(CONFIG_LED_TRIGGER_PHY)	+= phy_
++ obj-$(CONFIG_PHYLINK)		+= phylink.o
++ obj-$(CONFIG_PHYLIB)		+= libphy.o
++ 
+++obj-$(CONFIG_SWCONFIG)		+= swconfig.o
+++obj-$(CONFIG_ADM6996_PHY)	+= adm6996.o
+++obj-$(CONFIG_AR8216_PHY)	+= ar8216.o ar8327.o
+++obj-$(CONFIG_SWCONFIG_B53)	+= b53/
+++obj-$(CONFIG_IP17XX_PHY)	+= ip17xx.o
+++obj-$(CONFIG_MVSWITCH_PHY)	+= mvswitch.o
+++obj-$(CONFIG_PSB6970_PHY)	+= psb6970.o
+++obj-$(CONFIG_RTL8306_PHY)	+= rtl8306.o
+++obj-$(CONFIG_RTL8366_SMI)	+= rtl8366_smi.o
+++obj-$(CONFIG_RTL8366S_PHY)	+= rtl8366s.o
+++obj-$(CONFIG_RTL8366RB_PHY)	+= rtl8366rb.o
+++obj-$(CONFIG_RTL8367_PHY)	+= rtl8367.o
+++obj-$(CONFIG_RTL8367B_PHY)	+= rtl8367b.o
+++
++ obj-$(CONFIG_MDIO_ASPEED)	+= mdio-aspeed.o
++ obj-$(CONFIG_MDIO_BCM_IPROC)	+= mdio-bcm-iproc.o
++ obj-$(CONFIG_MDIO_BCM_UNIMAC)	+= mdio-bcm-unimac.o
++--- a/include/linux/platform_data/b53.h
+++++ b/include/linux/platform_data/b53.h
++@@ -29,6 +29,9 @@ struct b53_platform_data {
++ 	u32 chip_id;
++ 	u16 enabled_ports;
++ 
+++	/* allow to specify an ethX alias */
+++	const char *alias;
+++
++ 	/* only used by MMAP'd driver */
++ 	unsigned big_endian:1;
++ 	void __iomem *regs;
+diff --git a/target/linux/generic/hack-5.4/703-add_vsc8504_support.patch b/target/linux/generic/hack-5.4/703-add_vsc8504_support.patch
+new file mode 100644
+index 0000000000..afb6ca6cf3
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/703-add_vsc8504_support.patch
+@@ -0,0 +1,57 @@
++From: Roman Kuzmitskii <damex.pp@icloud.com>
++Date: Thu, 05 Nov 2020 02:00:00 +0000
++Subject: [PATCH] net: phy: vitesse: add vsc8504 support
++
++This patch adds support for vsc8504 phy.
++That phy is changed owner:
++ vitesse -> microsemi -> microchip
++So is its driver in kernel was changed and rewritten.
++
++there is no need to upstream this patch.
++this vsc8504 is supported by newer kernels out of box.
++support could be enabled by CONFIG_MICROSEMI_PHY.
++
++Tested-by: Johannes Kimmel <fff@bareminimum.eu>
++Signed-off-by: Roman Kuzmitskii <damex.pp@icloud.com>
++--- a/drivers/net/phy/vitesse.c
+++++ b/drivers/net/phy/vitesse.c
++@@ -61,6 +61,7 @@
++ 
++ #define PHY_ID_VSC8234			0x000fc620
++ #define PHY_ID_VSC8244			0x000fc6c0
+++#define PHY_ID_VSC8504			0x000704c2
++ #define PHY_ID_VSC8572			0x000704d0
++ #define PHY_ID_VSC8601			0x00070420
++ #define PHY_ID_VSC7385			0x00070450
++@@ -292,6 +293,7 @@ static int vsc82xx_config_intr(struct ph
++ 		err = phy_write(phydev, MII_VSC8244_IMASK,
++ 			(phydev->drv->phy_id == PHY_ID_VSC8234 ||
++ 			 phydev->drv->phy_id == PHY_ID_VSC8244 ||
+++			 phydev->drv->phy_id == PHY_ID_VSC8504 ||
++ 			 phydev->drv->phy_id == PHY_ID_VSC8572 ||
++ 			 phydev->drv->phy_id == PHY_ID_VSC8601) ?
++ 				MII_VSC8244_IMASK_MASK :
++@@ -402,6 +404,15 @@ static struct phy_driver vsc82xx_driver[
++ 	.ack_interrupt	= &vsc824x_ack_interrupt,
++ 	.config_intr	= &vsc82xx_config_intr,
++ }, {
+++	.phy_id         = PHY_ID_VSC8504,
+++	.name           = "Vitesse VSC8504",
+++	.phy_id_mask    = 0x000ffff0,
+++	/* PHY_GBIT_FEATURES */
+++	.config_init    = &vsc824x_config_init,
+++	.config_aneg    = &vsc82x4_config_aneg,
+++	.ack_interrupt  = &vsc824x_ack_interrupt,
+++	.config_intr    = &vsc82xx_config_intr,
+++}, {
++ 	.phy_id         = PHY_ID_VSC8572,
++ 	.name           = "Vitesse VSC8572",
++ 	.phy_id_mask    = 0x000ffff0,
++@@ -488,6 +499,7 @@ module_phy_driver(vsc82xx_driver);
++ static struct mdio_device_id __maybe_unused vitesse_tbl[] = {
++ 	{ PHY_ID_VSC8234, 0x000ffff0 },
++ 	{ PHY_ID_VSC8244, 0x000fffc0 },
+++	{ PHY_ID_VSC8504, 0x000ffff0 },
++ 	{ PHY_ID_VSC8572, 0x000ffff0 },
++ 	{ PHY_ID_VSC7385, 0x000ffff0 },
++ 	{ PHY_ID_VSC7388, 0x000ffff0 },
+diff --git a/target/linux/generic/hack-5.4/710-net-dsa-mv88e6xxx-default-VID-1.patch b/target/linux/generic/hack-5.4/710-net-dsa-mv88e6xxx-default-VID-1.patch
+new file mode 100644
+index 0000000000..5dc5ac6825
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/710-net-dsa-mv88e6xxx-default-VID-1.patch
+@@ -0,0 +1,18 @@
++--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++++ b/drivers/net/dsa/mv88e6xxx/chip.c
++@@ -1930,6 +1930,7 @@ static int mv88e6xxx_port_fdb_add(struct
++ 	struct mv88e6xxx_chip *chip = ds->priv;
++ 	int err;
++ 
+++	vid = vid ? : 1;
++ 	mv88e6xxx_reg_lock(chip);
++ 	err = mv88e6xxx_port_db_load_purge(chip, port, addr, vid,
++ 					   MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC);
++@@ -1944,6 +1945,7 @@ static int mv88e6xxx_port_fdb_del(struct
++ 	struct mv88e6xxx_chip *chip = ds->priv;
++ 	int err;
++ 
+++	vid = vid ? : 1;
++ 	mv88e6xxx_reg_lock(chip);
++ 	err = mv88e6xxx_port_db_load_purge(chip, port, addr, vid, 0);
++ 	mv88e6xxx_reg_unlock(chip);
+diff --git a/target/linux/generic/hack-5.4/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch b/target/linux/generic/hack-5.4/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch
+new file mode 100644
+index 0000000000..1da388c862
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch
+@@ -0,0 +1,12 @@
++--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++++ b/drivers/net/dsa/mv88e6xxx/chip.c
++@@ -2492,6 +2492,9 @@ static int mv88e6xxx_setup_port(struct m
++ 	if (dsa_is_cpu_port(ds, port))
++ 		reg = 0;
++ 
+++	/* Disable ATU member violation interrupt */
+++	reg |= MV88E6XXX_PORT_ASSOC_VECTOR_IGNORE_WRONG;
+++
++ 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ASSOC_VECTOR,
++ 				   reg);
++ 	if (err)
+diff --git a/target/linux/generic/hack-5.4/721-phy_packets.patch b/target/linux/generic/hack-5.4/721-phy_packets.patch
+new file mode 100644
+index 0000000000..bc9b3a4783
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/721-phy_packets.patch
+@@ -0,0 +1,176 @@
++From ffe387740bbe88dd88bbe04d6375902708003d6e Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 7 Jul 2017 17:25:00 +0200
++Subject: net: add packet mangeling patch
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ include/linux/netdevice.h | 11 +++++++++++
++ include/linux/skbuff.h    | 14 ++++----------
++ net/Kconfig               |  6 ++++++
++ net/core/dev.c            | 18 ++++++++++++++----
++ net/core/skbuff.c         | 17 +++++++++++++++++
++ net/ethernet/eth.c        |  6 ++++++
++ 6 files changed, 58 insertions(+), 14 deletions(-)
++
++--- a/include/linux/netdevice.h
+++++ b/include/linux/netdevice.h
++@@ -1549,6 +1549,7 @@ enum netdev_priv_flags {
++ 	IFF_FAILOVER_SLAVE		= 1<<28,
++ 	IFF_L3MDEV_RX_HANDLER		= 1<<29,
++ 	IFF_LIVE_RENAME_OK		= 1<<30,
+++	IFF_NO_IP_ALIGN			= 1<<31,
++ };
++ 
++ #define IFF_802_1Q_VLAN			IFF_802_1Q_VLAN
++@@ -1581,6 +1582,7 @@ enum netdev_priv_flags {
++ #define IFF_FAILOVER_SLAVE		IFF_FAILOVER_SLAVE
++ #define IFF_L3MDEV_RX_HANDLER		IFF_L3MDEV_RX_HANDLER
++ #define IFF_LIVE_RENAME_OK		IFF_LIVE_RENAME_OK
+++#define IFF_NO_IP_ALIGN			IFF_NO_IP_ALIGN
++ 
++ /* Specifies the type of the struct net_device::ml_priv pointer */
++ enum netdev_ml_priv_type {
++@@ -1889,6 +1891,11 @@ struct net_device {
++ 	const struct tlsdev_ops *tlsdev_ops;
++ #endif
++ 
+++#ifdef CONFIG_ETHERNET_PACKET_MANGLE
+++	void (*eth_mangle_rx)(struct net_device *dev, struct sk_buff *skb);
+++	struct sk_buff *(*eth_mangle_tx)(struct net_device *dev, struct sk_buff *skb);
+++#endif
+++
++ 	const struct header_ops *header_ops;
++ 
++ 	unsigned int		flags;
++@@ -1971,6 +1978,10 @@ struct net_device {
++ 	struct mpls_dev __rcu	*mpls_ptr;
++ #endif
++ 
+++#ifdef CONFIG_ETHERNET_PACKET_MANGLE
+++	void			*phy_ptr; /* PHY device specific data */
+++#endif
+++
++ /*
++  * Cache lines mostly used on receive path (including eth_type_trans())
++  */
++--- a/include/linux/skbuff.h
+++++ b/include/linux/skbuff.h
++@@ -2684,6 +2684,10 @@ static inline int pskb_trim(struct sk_bu
++ 	return (len < skb->len) ? __pskb_trim(skb, len) : 0;
++ }
++ 
+++extern struct sk_buff *__netdev_alloc_skb_ip_align(struct net_device *dev,
+++		unsigned int length, gfp_t gfp);
+++
+++
++ /**
++  *	pskb_trim_unique - remove end from a paged unique (not cloned) buffer
++  *	@skb: buffer to alter
++@@ -2815,16 +2819,6 @@ static inline struct sk_buff *dev_alloc_
++ }
++ 
++ 
++-static inline struct sk_buff *__netdev_alloc_skb_ip_align(struct net_device *dev,
++-		unsigned int length, gfp_t gfp)
++-{
++-	struct sk_buff *skb = __netdev_alloc_skb(dev, length + NET_IP_ALIGN, gfp);
++-
++-	if (NET_IP_ALIGN && skb)
++-		skb_reserve(skb, NET_IP_ALIGN);
++-	return skb;
++-}
++-
++ static inline struct sk_buff *netdev_alloc_skb_ip_align(struct net_device *dev,
++ 		unsigned int length)
++ {
++--- a/net/Kconfig
+++++ b/net/Kconfig
++@@ -26,6 +26,12 @@ menuconfig NET
++ 
++ if NET
++ 
+++config ETHERNET_PACKET_MANGLE
+++	bool
+++	help
+++	  This option can be selected by phy drivers that need to mangle
+++	  packets going in or out of an ethernet device.
+++
++ config WANT_COMPAT_NETLINK_MESSAGES
++ 	bool
++ 	help
++--- a/net/core/dev.c
+++++ b/net/core/dev.c
++@@ -3198,10 +3198,20 @@ static int xmit_one(struct sk_buff *skb,
++ 	if (dev_nit_active(dev))
++ 		dev_queue_xmit_nit(skb, dev);
++ 
++-	len = skb->len;
++-	trace_net_dev_start_xmit(skb, dev);
++-	rc = netdev_start_xmit(skb, dev, txq, more);
++-	trace_net_dev_xmit(skb, rc, dev, len);
+++#ifdef CONFIG_ETHERNET_PACKET_MANGLE
+++	if (!dev->eth_mangle_tx ||
+++	    (skb = dev->eth_mangle_tx(dev, skb)) != NULL)
+++#else
+++	if (1)
+++#endif
+++	{
+++		len = skb->len;
+++		trace_net_dev_start_xmit(skb, dev);
+++		rc = netdev_start_xmit(skb, dev, txq, more);
+++		trace_net_dev_xmit(skb, rc, dev, len);
+++	} else {
+++		rc = NETDEV_TX_OK;
+++	}
++ 
++ 	return rc;
++ }
++--- a/net/core/skbuff.c
+++++ b/net/core/skbuff.c
++@@ -60,6 +60,7 @@
++ #include <linux/prefetch.h>
++ #include <linux/if_vlan.h>
++ #include <linux/mpls.h>
+++#include <linux/if.h>
++ 
++ #include <net/protocol.h>
++ #include <net/dst.h>
++@@ -549,6 +550,22 @@ skb_fail:
++ }
++ EXPORT_SYMBOL(__napi_alloc_skb);
++ 
+++struct sk_buff *__netdev_alloc_skb_ip_align(struct net_device *dev,
+++		unsigned int length, gfp_t gfp)
+++{
+++	struct sk_buff *skb = __netdev_alloc_skb(dev, length + NET_IP_ALIGN, gfp);
+++
+++#ifdef CONFIG_ETHERNET_PACKET_MANGLE
+++	if (dev && (dev->priv_flags & IFF_NO_IP_ALIGN))
+++		return skb;
+++#endif
+++
+++	if (NET_IP_ALIGN && skb)
+++		skb_reserve(skb, NET_IP_ALIGN);
+++	return skb;
+++}
+++EXPORT_SYMBOL(__netdev_alloc_skb_ip_align);
+++
++ void skb_add_rx_frag(struct sk_buff *skb, int i, struct page *page, int off,
++ 		     int size, unsigned int truesize)
++ {
++--- a/net/ethernet/eth.c
+++++ b/net/ethernet/eth.c
++@@ -171,6 +171,12 @@ __be16 eth_type_trans(struct sk_buff *sk
++ 	const struct ethhdr *eth;
++ 
++ 	skb->dev = dev;
+++
+++#ifdef CONFIG_ETHERNET_PACKET_MANGLE
+++	if (dev->eth_mangle_rx)
+++		dev->eth_mangle_rx(dev, skb);
+++#endif
+++
++ 	skb_reset_mac_header(skb);
++ 
++ 	eth = (struct ethhdr *)skb->data;
+diff --git a/target/linux/generic/hack-5.4/773-bgmac-add-srab-switch.patch b/target/linux/generic/hack-5.4/773-bgmac-add-srab-switch.patch
+new file mode 100644
+index 0000000000..89e0df4606
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/773-bgmac-add-srab-switch.patch
+@@ -0,0 +1,98 @@
++From 3cb240533ab787899dc7f17aa7d6c5b4810e2e58 Mon Sep 17 00:00:00 2001
++From: Hauke Mehrtens <hauke@hauke-m.de>
++Date: Fri, 7 Jul 2017 17:26:01 +0200
++Subject: bcm53xx: bgmac: use srab switch driver
++
++use the srab switch driver on these SoCs.
++
++Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
++---
++ drivers/net/ethernet/broadcom/bgmac-bcma.c |  1 +
++ drivers/net/ethernet/broadcom/bgmac.c      | 24 ++++++++++++++++++++++++
++ drivers/net/ethernet/broadcom/bgmac.h      |  4 ++++
++ 3 files changed, 29 insertions(+)
++
++--- a/drivers/net/ethernet/broadcom/bgmac-bcma.c
+++++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c
++@@ -268,6 +268,7 @@ static int bgmac_probe(struct bcma_devic
++ 		bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
++ 		bgmac->feature_flags |= BGMAC_FEAT_NO_RESET;
++ 		bgmac->feature_flags |= BGMAC_FEAT_FORCE_SPEED_2500;
+++		bgmac->feature_flags |= BGMAC_FEAT_SRAB;
++ 		break;
++ 	default:
++ 		bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
++--- a/drivers/net/ethernet/broadcom/bgmac.c
+++++ b/drivers/net/ethernet/broadcom/bgmac.c
++@@ -12,6 +12,7 @@
++ #include <linux/bcma/bcma.h>
++ #include <linux/etherdevice.h>
++ #include <linux/interrupt.h>
+++#include <linux/platform_data/b53.h>
++ #include <linux/bcm47xx_nvram.h>
++ #include <linux/phy.h>
++ #include <linux/phy_fixed.h>
++@@ -1407,6 +1408,17 @@ static const struct ethtool_ops bgmac_et
++ 	.set_link_ksettings     = phy_ethtool_set_link_ksettings,
++ };
++ 
+++static struct b53_platform_data bgmac_b53_pdata = {
+++};
+++
+++static struct platform_device bgmac_b53_dev = {
+++	.name		= "b53-srab-switch",
+++	.id		= -1,
+++	.dev		= {
+++		.platform_data = &bgmac_b53_pdata,
+++	},
+++};
+++
++ /**************************************************
++  * MII
++  **************************************************/
++@@ -1538,6 +1550,14 @@ int bgmac_enet_probe(struct bgmac *bgmac
++ 	net_dev->hw_features = net_dev->features;
++ 	net_dev->vlan_features = net_dev->features;
++ 
+++	if ((bgmac->feature_flags & BGMAC_FEAT_SRAB) && !bgmac_b53_pdata.regs) {
+++		bgmac_b53_pdata.regs = ioremap_nocache(0x18007000, 0x1000);
+++
+++		err = platform_device_register(&bgmac_b53_dev);
+++		if (!err)
+++			bgmac->b53_device = &bgmac_b53_dev;
+++	}
+++
++ 	err = register_netdev(bgmac->net_dev);
++ 	if (err) {
++ 		dev_err(bgmac->dev, "Cannot register net device\n");
++@@ -1560,6 +1580,10 @@ EXPORT_SYMBOL_GPL(bgmac_enet_probe);
++ 
++ void bgmac_enet_remove(struct bgmac *bgmac)
++ {
+++	if (bgmac->b53_device)
+++		platform_device_unregister(&bgmac_b53_dev);
+++	bgmac->b53_device = NULL;
+++
++ 	unregister_netdev(bgmac->net_dev);
++ 	phy_disconnect(bgmac->net_dev->phydev);
++ 	netif_napi_del(&bgmac->napi);
++--- a/drivers/net/ethernet/broadcom/bgmac.h
+++++ b/drivers/net/ethernet/broadcom/bgmac.h
++@@ -427,6 +427,7 @@
++ #define BGMAC_FEAT_CC4_IF_SW_TYPE_RGMII	BIT(18)
++ #define BGMAC_FEAT_CC7_IF_TYPE_RGMII	BIT(19)
++ #define BGMAC_FEAT_IDM_MASK		BIT(20)
+++#define BGMAC_FEAT_SRAB			BIT(21)
++ 
++ struct bgmac_slot_info {
++ 	union {
++@@ -532,6 +533,9 @@ struct bgmac {
++ 	void (*cmn_maskset32)(struct bgmac *bgmac, u16 offset, u32 mask,
++ 			      u32 set);
++ 	int (*phy_connect)(struct bgmac *bgmac);
+++
+++	/* platform device for associated switch */
+++	struct platform_device *b53_device;
++ };
++ 
++ struct bgmac *bgmac_alloc(struct device *dev);
+diff --git a/target/linux/generic/hack-5.4/901-debloat_sock_diag.patch b/target/linux/generic/hack-5.4/901-debloat_sock_diag.patch
+new file mode 100644
+index 0000000000..0abb672639
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/901-debloat_sock_diag.patch
+@@ -0,0 +1,145 @@
++From 3b6115d6b57a263bdc8c9b1df273bd4a7955eead Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sat, 8 Jul 2017 08:16:31 +0200
++Subject: debloat: add some debloat patches, strip down procfs and make O_DIRECT support optional, saves ~15K after lzma on MIPS
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ net/Kconfig         | 3 +++
++ net/core/Makefile   | 3 ++-
++ net/core/sock.c     | 2 ++
++ net/ipv4/Kconfig    | 1 +
++ net/netlink/Kconfig | 1 +
++ net/packet/Kconfig  | 1 +
++ net/unix/Kconfig    | 1 +
++ 7 files changed, 11 insertions(+), 1 deletion(-)
++
++--- a/net/Kconfig
+++++ b/net/Kconfig
++@@ -103,6 +103,9 @@ source "net/netlabel/Kconfig"
++ 
++ endif # if INET
++ 
+++config SOCK_DIAG
+++	bool
+++
++ config NETWORK_SECMARK
++ 	bool "Security Marking"
++ 	help
++--- a/net/core/Makefile
+++++ b/net/core/Makefile
++@@ -10,9 +10,10 @@ obj-$(CONFIG_SYSCTL) += sysctl_net_core.
++ 
++ obj-y		     += dev.o ethtool.o dev_addr_lists.o dst.o netevent.o \
++ 			neighbour.o rtnetlink.o utils.o link_watch.o filter.o \
++-			sock_diag.o dev_ioctl.o tso.o sock_reuseport.o \
+++ 			dev_ioctl.o tso.o sock_reuseport.o \
++ 			fib_notifier.o xdp.o flow_offload.o
++ 
+++obj-$(CONFIG_SOCK_DIAG) += sock_diag.o
++ obj-y += net-sysfs.o
++ obj-$(CONFIG_PAGE_POOL) += page_pool.o
++ obj-$(CONFIG_PROC_FS) += net-procfs.o
++--- a/net/core/sock.c
+++++ b/net/core/sock.c
++@@ -140,6 +140,7 @@
++ 
++ static DEFINE_MUTEX(proto_list_mutex);
++ static LIST_HEAD(proto_list);
+++static atomic64_t cookie_gen;
++ 
++ static void sock_inuse_add(struct net *net, int val);
++ 
++@@ -539,6 +540,18 @@ discard_and_relse:
++ }
++ EXPORT_SYMBOL(__sk_receive_skb);
++ 
+++u64 sock_gen_cookie(struct sock *sk)
+++{
+++	while (1) {
+++		u64 res = atomic64_read(&sk->sk_cookie);
+++
+++		if (res)
+++			return res;
+++		res = atomic64_inc_return(&cookie_gen);
+++		atomic64_cmpxchg(&sk->sk_cookie, 0, res);
+++	}
+++}
+++
++ struct dst_entry *__sk_dst_check(struct sock *sk, u32 cookie)
++ {
++ 	struct dst_entry *dst = __sk_dst_get(sk);
++@@ -1760,9 +1773,11 @@ static void __sk_free(struct sock *sk)
++ 	if (likely(sk->sk_net_refcnt))
++ 		sock_inuse_add(sock_net(sk), -1);
++ 
+++#ifdef CONFIG_SOCK_DIAG
++ 	if (unlikely(sk->sk_net_refcnt && sock_diag_has_destroy_listeners(sk)))
++ 		sock_diag_broadcast_destroy(sk);
++ 	else
+++#endif
++ 		sk_destruct(sk);
++ }
++ 
++--- a/net/core/sock_diag.c
+++++ b/net/core/sock_diag.c
++@@ -19,19 +19,6 @@ static const struct sock_diag_handler *s
++ static int (*inet_rcv_compat)(struct sk_buff *skb, struct nlmsghdr *nlh);
++ static DEFINE_MUTEX(sock_diag_table_mutex);
++ static struct workqueue_struct *broadcast_wq;
++-static atomic64_t cookie_gen;
++-
++-u64 sock_gen_cookie(struct sock *sk)
++-{
++-	while (1) {
++-		u64 res = atomic64_read(&sk->sk_cookie);
++-
++-		if (res)
++-			return res;
++-		res = atomic64_inc_return(&cookie_gen);
++-		atomic64_cmpxchg(&sk->sk_cookie, 0, res);
++-	}
++-}
++ 
++ int sock_diag_check_cookie(struct sock *sk, const __u32 *cookie)
++ {
++--- a/net/ipv4/Kconfig
+++++ b/net/ipv4/Kconfig
++@@ -400,6 +400,7 @@ config INET_TUNNEL
++ 
++ config INET_DIAG
++ 	tristate "INET: socket monitoring interface"
+++	select SOCK_DIAG
++ 	default y
++ 	---help---
++ 	  Support for INET (TCP, DCCP, etc) socket monitoring interface used by
++--- a/net/netlink/Kconfig
+++++ b/net/netlink/Kconfig
++@@ -5,6 +5,7 @@
++ 
++ config NETLINK_DIAG
++ 	tristate "NETLINK: socket monitoring interface"
+++	select SOCK_DIAG
++ 	default n
++ 	---help---
++ 	  Support for NETLINK socket monitoring interface used by the ss tool.
++--- a/net/packet/Kconfig
+++++ b/net/packet/Kconfig
++@@ -19,6 +19,7 @@ config PACKET
++ config PACKET_DIAG
++ 	tristate "Packet: sockets monitoring interface"
++ 	depends on PACKET
+++	select SOCK_DIAG
++ 	default n
++ 	---help---
++ 	  Support for PF_PACKET sockets monitoring interface used by the ss tool.
++--- a/net/unix/Kconfig
+++++ b/net/unix/Kconfig
++@@ -28,6 +28,7 @@ config UNIX_SCM
++ config UNIX_DIAG
++ 	tristate "UNIX: socket monitoring interface"
++ 	depends on UNIX
+++	select SOCK_DIAG
++ 	default n
++ 	---help---
++ 	  Support for UNIX socket monitoring interface used by the ss tool.
+diff --git a/target/linux/generic/hack-5.4/902-debloat_proc.patch b/target/linux/generic/hack-5.4/902-debloat_proc.patch
+new file mode 100644
+index 0000000000..042588a623
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/902-debloat_proc.patch
+@@ -0,0 +1,408 @@
++From 9e3f1d0805b2d919904dd9a4ff0d956314cc3cba Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sat, 8 Jul 2017 08:20:09 +0200
++Subject: debloat: procfs
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ fs/locks.c               |  2 ++
++ fs/proc/Kconfig          |  5 +++++
++ fs/proc/consoles.c       |  3 +++
++ fs/proc/proc_tty.c       | 11 ++++++++++-
++ include/net/snmp.h       | 18 +++++++++++++++++-
++ ipc/msg.c                |  3 +++
++ ipc/sem.c                |  2 ++
++ ipc/shm.c                |  2 ++
++ ipc/util.c               |  3 +++
++ kernel/exec_domain.c     |  2 ++
++ kernel/irq/proc.c        |  9 +++++++++
++ kernel/time/timer_list.c |  2 ++
++ mm/vmalloc.c             |  2 ++
++ mm/vmstat.c              |  8 +++++---
++ net/8021q/vlanproc.c     |  6 ++++++
++ net/core/net-procfs.c    | 18 ++++++++++++------
++ net/core/sock.c          |  2 ++
++ net/ipv4/fib_trie.c      | 18 ++++++++++++------
++ net/ipv4/proc.c          |  3 +++
++ net/ipv4/route.c         |  3 +++
++ 20 files changed, 105 insertions(+), 17 deletions(-)
++
++--- a/fs/locks.c
+++++ b/fs/locks.c
++@@ -2989,6 +2989,8 @@ static const struct seq_operations locks
++ 
++ static int __init proc_locks_init(void)
++ {
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		return 0;
++ 	proc_create_seq_private("locks", 0, NULL, &locks_seq_operations,
++ 			sizeof(struct locks_iterator), NULL);
++ 	return 0;
++--- a/fs/proc/Kconfig
+++++ b/fs/proc/Kconfig
++@@ -100,6 +100,11 @@ config PROC_CHILDREN
++ 	  Say Y if you are running any user-space software which takes benefit from
++ 	  this interface. For example, rkt is such a piece of software.
++ 
+++config PROC_STRIPPED
+++	default n
+++	depends on EXPERT
+++	bool "Strip non-essential /proc functionality to reduce code size"
+++
++ config PROC_PID_ARCH_STATUS
++ 	def_bool n
++ 	depends on PROC_FS
++--- a/fs/proc/consoles.c
+++++ b/fs/proc/consoles.c
++@@ -92,6 +92,9 @@ static const struct seq_operations conso
++ 
++ static int __init proc_consoles_init(void)
++ {
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		return 0;
+++
++ 	proc_create_seq("consoles", 0, NULL, &consoles_op);
++ 	return 0;
++ }
++--- a/fs/proc/proc_tty.c
+++++ b/fs/proc/proc_tty.c
++@@ -133,7 +133,10 @@ static const struct seq_operations tty_d
++ void proc_tty_register_driver(struct tty_driver *driver)
++ {
++ 	struct proc_dir_entry *ent;
++-		
+++
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		return;
+++
++ 	if (!driver->driver_name || driver->proc_entry ||
++ 	    !driver->ops->proc_show)
++ 		return;
++@@ -150,6 +153,9 @@ void proc_tty_unregister_driver(struct t
++ {
++ 	struct proc_dir_entry *ent;
++ 
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		return;
+++
++ 	ent = driver->proc_entry;
++ 	if (!ent)
++ 		return;
++@@ -164,6 +170,9 @@ void proc_tty_unregister_driver(struct t
++  */
++ void __init proc_tty_init(void)
++ {
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		return;
+++
++ 	if (!proc_mkdir("tty", NULL))
++ 		return;
++ 	proc_mkdir("tty/ldisc", NULL);	/* Preserved: it's userspace visible */
++--- a/include/net/snmp.h
+++++ b/include/net/snmp.h
++@@ -118,6 +118,21 @@ struct linux_xfrm_mib {
++ #define DECLARE_SNMP_STAT(type, name)	\
++ 	extern __typeof__(type) __percpu *name
++ 
+++#ifdef CONFIG_PROC_STRIPPED
+++#define __SNMP_STATS_DUMMY(mib)	\
+++	do { (void) mib->mibs[0]; } while(0)
+++
+++#define __SNMP_INC_STATS(mib, field) __SNMP_STATS_DUMMY(mib)
+++#define SNMP_INC_STATS_ATOMIC_LONG(mib, field) __SNMP_STATS_DUMMY(mib)
+++#define SNMP_INC_STATS(mib, field) __SNMP_STATS_DUMMY(mib)
+++#define SNMP_DEC_STATS(mib, field) __SNMP_STATS_DUMMY(mib)
+++#define __SNMP_ADD_STATS(mib, field, addend) __SNMP_STATS_DUMMY(mib)
+++#define SNMP_ADD_STATS(mib, field, addend) __SNMP_STATS_DUMMY(mib)
+++#define SNMP_UPD_PO_STATS(mib, basefield, addend) __SNMP_STATS_DUMMY(mib)
+++#define __SNMP_UPD_PO_STATS(mib, basefield, addend) __SNMP_STATS_DUMMY(mib)
+++
+++#else
+++
++ #define __SNMP_INC_STATS(mib, field)	\
++ 			__this_cpu_inc(mib->mibs[field])
++ 
++@@ -148,8 +163,9 @@ struct linux_xfrm_mib {
++ 		__this_cpu_add(ptr[basefield##OCTETS], addend);	\
++ 	} while (0)
++ 
+++#endif
++ 
++-#if BITS_PER_LONG==32
+++#if (BITS_PER_LONG==32) && !defined(CONFIG_PROC_STRIPPED)
++ 
++ #define __SNMP_ADD_STATS64(mib, field, addend) 				\
++ 	do {								\
++--- a/ipc/msg.c
+++++ b/ipc/msg.c
++@@ -1317,6 +1317,9 @@ void __init msg_init(void)
++ {
++ 	msg_init_ns(&init_ipc_ns);
++ 
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		return;
+++
++ 	ipc_init_proc_interface("sysvipc/msg",
++ 				"       key      msqid perms      cbytes       qnum lspid lrpid   uid   gid  cuid  cgid      stime      rtime      ctime\n",
++ 				IPC_MSG_IDS, sysvipc_msg_proc_show);
++--- a/ipc/sem.c
+++++ b/ipc/sem.c
++@@ -243,6 +243,8 @@ void sem_exit_ns(struct ipc_namespace *n
++ void __init sem_init(void)
++ {
++ 	sem_init_ns(&init_ipc_ns);
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		return;
++ 	ipc_init_proc_interface("sysvipc/sem",
++ 				"       key      semid perms      nsems   uid   gid  cuid  cgid      otime      ctime\n",
++ 				IPC_SEM_IDS, sysvipc_sem_proc_show);
++--- a/ipc/shm.c
+++++ b/ipc/shm.c
++@@ -144,6 +144,8 @@ pure_initcall(ipc_ns_init);
++ 
++ void __init shm_init(void)
++ {
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		return;
++ 	ipc_init_proc_interface("sysvipc/shm",
++ #if BITS_PER_LONG <= 32
++ 				"       key      shmid perms       size  cpid  lpid nattch   uid   gid  cuid  cgid      atime      dtime      ctime        rss       swap\n",
++--- a/ipc/util.c
+++++ b/ipc/util.c
++@@ -140,6 +140,9 @@ void __init ipc_init_proc_interface(cons
++ 	struct proc_dir_entry *pde;
++ 	struct ipc_proc_iface *iface;
++ 
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		return;
+++
++ 	iface = kmalloc(sizeof(*iface), GFP_KERNEL);
++ 	if (!iface)
++ 		return;
++--- a/kernel/exec_domain.c
+++++ b/kernel/exec_domain.c
++@@ -29,6 +29,8 @@ static int execdomains_proc_show(struct
++ 
++ static int __init proc_execdomains_init(void)
++ {
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		return 0;
++ 	proc_create_single("execdomains", 0, NULL, execdomains_proc_show);
++ 	return 0;
++ }
++--- a/kernel/irq/proc.c
+++++ b/kernel/irq/proc.c
++@@ -341,6 +341,9 @@ void register_irq_proc(unsigned int irq,
++ 	void __maybe_unused *irqp = (void *)(unsigned long) irq;
++ 	char name [MAX_NAMELEN];
++ 
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED) && !IS_ENABLED(CONFIG_SMP))
+++		return;
+++
++ 	if (!root_irq_dir || (desc->irq_data.chip == &no_irq_chip))
++ 		return;
++ 
++@@ -394,6 +397,9 @@ void unregister_irq_proc(unsigned int ir
++ {
++ 	char name [MAX_NAMELEN];
++ 
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED) && !IS_ENABLED(CONFIG_SMP))
+++		return;
+++
++ 	if (!root_irq_dir || !desc->dir)
++ 		return;
++ #ifdef CONFIG_SMP
++@@ -432,6 +438,9 @@ void init_irq_proc(void)
++ 	unsigned int irq;
++ 	struct irq_desc *desc;
++ 
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED) && !IS_ENABLED(CONFIG_SMP))
+++		return;
+++
++ 	/* create /proc/irq */
++ 	root_irq_dir = proc_mkdir("irq", NULL);
++ 	if (!root_irq_dir)
++--- a/kernel/time/timer_list.c
+++++ b/kernel/time/timer_list.c
++@@ -370,6 +370,8 @@ static int __init init_timer_list_procfs
++ {
++ 	struct proc_dir_entry *pe;
++ 
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		return 0;
++ 	pe = proc_create_seq_private("timer_list", 0400, NULL, &timer_list_sops,
++ 			sizeof(struct timer_list_iter), NULL);
++ 	if (!pe)
++--- a/mm/vmalloc.c
+++++ b/mm/vmalloc.c
++@@ -3564,6 +3564,8 @@ static const struct seq_operations vmall
++ 
++ static int __init proc_vmalloc_init(void)
++ {
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		return 0;
++ 	if (IS_ENABLED(CONFIG_NUMA))
++ 		proc_create_seq_private("vmallocinfo", 0400, NULL,
++ 				&vmalloc_op,
++--- a/mm/vmstat.c
+++++ b/mm/vmstat.c
++@@ -1988,10 +1988,12 @@ void __init init_mm_internals(void)
++ 	start_shepherd_timer();
++ #endif
++ #ifdef CONFIG_PROC_FS
++-	proc_create_seq("buddyinfo", 0444, NULL, &fragmentation_op);
++-	proc_create_seq("pagetypeinfo", 0400, NULL, &pagetypeinfo_op);
+++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) {
+++		proc_create_seq("buddyinfo", 0444, NULL, &fragmentation_op);
+++		proc_create_seq("pagetypeinfo", 0400, NULL, &pagetypeinfo_op);
+++		proc_create_seq("zoneinfo", 0444, NULL, &zoneinfo_op);
+++	}
++ 	proc_create_seq("vmstat", 0444, NULL, &vmstat_op);
++-	proc_create_seq("zoneinfo", 0444, NULL, &zoneinfo_op);
++ #endif
++ }
++ 
++--- a/net/8021q/vlanproc.c
+++++ b/net/8021q/vlanproc.c
++@@ -93,6 +93,9 @@ void vlan_proc_cleanup(struct net *net)
++ {
++ 	struct vlan_net *vn = net_generic(net, vlan_net_id);
++ 
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		return;
+++
++ 	if (vn->proc_vlan_conf)
++ 		remove_proc_entry(name_conf, vn->proc_vlan_dir);
++ 
++@@ -112,6 +115,9 @@ int __net_init vlan_proc_init(struct net
++ {
++ 	struct vlan_net *vn = net_generic(net, vlan_net_id);
++ 
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		return 0;
+++
++ 	vn->proc_vlan_dir = proc_net_mkdir(net, name_root, net->proc_net);
++ 	if (!vn->proc_vlan_dir)
++ 		goto err;
++--- a/net/core/net-procfs.c
+++++ b/net/core/net-procfs.c
++@@ -279,10 +279,12 @@ static int __net_init dev_proc_net_init(
++ 	if (!proc_create_net("dev", 0444, net->proc_net, &dev_seq_ops,
++ 			sizeof(struct seq_net_private)))
++ 		goto out;
++-	if (!proc_create_seq("softnet_stat", 0444, net->proc_net,
+++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED) &&
+++			!proc_create_seq("softnet_stat", 0444, net->proc_net,
++ 			 &softnet_seq_ops))
++ 		goto out_dev;
++-	if (!proc_create_net("ptype", 0444, net->proc_net, &ptype_seq_ops,
+++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED) &&
+++			!proc_create_net("ptype", 0444, net->proc_net, &ptype_seq_ops,
++ 			sizeof(struct seq_net_private)))
++ 		goto out_softnet;
++ 
++@@ -292,9 +294,11 @@ static int __net_init dev_proc_net_init(
++ out:
++ 	return rc;
++ out_ptype:
++-	remove_proc_entry("ptype", net->proc_net);
+++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		remove_proc_entry("ptype", net->proc_net);
++ out_softnet:
++-	remove_proc_entry("softnet_stat", net->proc_net);
+++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		remove_proc_entry("softnet_stat", net->proc_net);
++ out_dev:
++ 	remove_proc_entry("dev", net->proc_net);
++ 	goto out;
++@@ -304,8 +308,10 @@ static void __net_exit dev_proc_net_exit
++ {
++ 	wext_proc_exit(net);
++ 
++-	remove_proc_entry("ptype", net->proc_net);
++-	remove_proc_entry("softnet_stat", net->proc_net);
+++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) {
+++		remove_proc_entry("ptype", net->proc_net);
+++		remove_proc_entry("softnet_stat", net->proc_net);
+++	}
++ 	remove_proc_entry("dev", net->proc_net);
++ }
++ 
++--- a/net/core/sock.c
+++++ b/net/core/sock.c
++@@ -3643,6 +3643,8 @@ static __net_initdata struct pernet_oper
++ 
++ static int __init proto_init(void)
++ {
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		return 0;
++ 	return register_pernet_subsys(&proto_net_ops);
++ }
++ 
++--- a/net/ipv4/fib_trie.c
+++++ b/net/ipv4/fib_trie.c
++@@ -2848,11 +2848,13 @@ static const struct seq_operations fib_r
++ 
++ int __net_init fib_proc_init(struct net *net)
++ {
++-	if (!proc_create_net("fib_trie", 0444, net->proc_net, &fib_trie_seq_ops,
+++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED) &&
+++			!proc_create_net("fib_trie", 0444, net->proc_net, &fib_trie_seq_ops,
++ 			sizeof(struct fib_trie_iter)))
++ 		goto out1;
++ 
++-	if (!proc_create_net_single("fib_triestat", 0444, net->proc_net,
+++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED) &&
+++			!proc_create_net_single("fib_triestat", 0444, net->proc_net,
++ 			fib_triestat_seq_show, NULL))
++ 		goto out2;
++ 
++@@ -2863,17 +2865,21 @@ int __net_init fib_proc_init(struct net
++ 	return 0;
++ 
++ out3:
++-	remove_proc_entry("fib_triestat", net->proc_net);
+++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		remove_proc_entry("fib_triestat", net->proc_net);
++ out2:
++-	remove_proc_entry("fib_trie", net->proc_net);
+++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		remove_proc_entry("fib_trie", net->proc_net);
++ out1:
++ 	return -ENOMEM;
++ }
++ 
++ void __net_exit fib_proc_exit(struct net *net)
++ {
++-	remove_proc_entry("fib_trie", net->proc_net);
++-	remove_proc_entry("fib_triestat", net->proc_net);
+++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) {
+++		remove_proc_entry("fib_trie", net->proc_net);
+++		remove_proc_entry("fib_triestat", net->proc_net);
+++	}
++ 	remove_proc_entry("route", net->proc_net);
++ }
++ 
++--- a/net/ipv4/proc.c
+++++ b/net/ipv4/proc.c
++@@ -522,5 +522,8 @@ static __net_initdata struct pernet_oper
++ 
++ int __init ip_misc_proc_init(void)
++ {
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		return 0;
+++
++ 	return register_pernet_subsys(&ip_proc_ops);
++ }
++--- a/net/ipv4/route.c
+++++ b/net/ipv4/route.c
++@@ -410,6 +410,9 @@ static struct pernet_operations ip_rt_pr
++ 
++ static int __init ip_rt_proc_init(void)
++ {
+++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
+++		return 0;
+++
++ 	return register_pernet_subsys(&ip_rt_proc_ops);
++ }
++ 
+diff --git a/target/linux/generic/hack-5.4/904-debloat_dma_buf.patch b/target/linux/generic/hack-5.4/904-debloat_dma_buf.patch
+new file mode 100644
+index 0000000000..ad8636b16d
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/904-debloat_dma_buf.patch
+@@ -0,0 +1,74 @@
++From e3692cb2fcd5ba1244512a0f43b8118f65f1c375 Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sat, 8 Jul 2017 08:20:43 +0200
++Subject: debloat: dmabuf
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ drivers/base/Kconfig      |  2 +-
++ drivers/dma-buf/Makefile  | 10 +++++++---
++ drivers/dma-buf/dma-buf.c |  4 +++-
++ kernel/sched/core.c       |  1 +
++ 4 files changed, 12 insertions(+), 5 deletions(-)
++
++--- a/drivers/base/Kconfig
+++++ b/drivers/base/Kconfig
++@@ -179,7 +179,7 @@ config SOC_BUS
++ source "drivers/base/regmap/Kconfig"
++ 
++ config DMA_SHARED_BUFFER
++-	bool
+++	tristate
++ 	default n
++ 	select IRQ_WORK
++ 	help
++--- a/drivers/dma-buf/Makefile
+++++ b/drivers/dma-buf/Makefile
++@@ -1,9 +1,13 @@
++ # SPDX-License-Identifier: GPL-2.0-only
++-obj-y := dma-buf.o dma-fence.o dma-fence-array.o dma-fence-chain.o \
++-	 dma-resv.o seqno-fence.o
++-obj-$(CONFIG_SYNC_FILE)		+= sync_file.o
++-obj-$(CONFIG_SW_SYNC)		+= sw_sync.o sync_debug.o
++-obj-$(CONFIG_UDMABUF)		+= udmabuf.o
+++obj-$(CONFIG_DMA_SHARED_BUFFER) := dma-shared-buffer.o
+++
+++dma-buf-objs-y := dma-buf.o dma-fence.o dma-fence-array.o dma-fence-chain.o \
+++		  dma-resv.o seqno-fence.o
+++dma-buf-objs-$(CONFIG_SYNC_FILE)	+= sync_file.o
+++dma-buf-objs-$(CONFIG_SW_SYNC)		+= sw_sync.o sync_debug.o
+++dma-buf-objs-$(CONFIG_UDMABUF)		+= udmabuf.o
+++
+++dma-shared-buffer-objs :=  $(dma-buf-objs-y)
++ 
++ dmabuf_selftests-y := \
++ 	selftest.o \
++--- a/drivers/dma-buf/dma-buf.c
+++++ b/drivers/dma-buf/dma-buf.c
++@@ -1313,4 +1313,5 @@ static void __exit dma_buf_deinit(void)
++ 	dma_buf_uninit_debugfs();
++ 	kern_unmount(dma_buf_mnt);
++ }
++-__exitcall(dma_buf_deinit);
+++module_exit(dma_buf_deinit);
+++MODULE_LICENSE("GPL");
++--- a/kernel/sched/core.c
+++++ b/kernel/sched/core.c
++@@ -2767,6 +2767,7 @@ int wake_up_state(struct task_struct *p,
++ {
++ 	return try_to_wake_up(p, state, 0);
++ }
+++EXPORT_SYMBOL_GPL(wake_up_state);
++ 
++ /*
++  * Perform scheduler related setup for a newly forked process p.
++--- a/fs/d_path.c
+++++ b/fs/d_path.c
++@@ -311,6 +311,7 @@ char *dynamic_dname(struct dentry *dentr
++ 	buffer += buflen - sz;
++ 	return memcpy(buffer, temp, sz);
++ }
+++EXPORT_SYMBOL_GPL(dynamic_dname);
++ 
++ char *simple_dname(struct dentry *dentry, char *buffer, int buflen)
++ {
+diff --git a/target/linux/generic/hack-5.4/910-kobject_uevent.patch b/target/linux/generic/hack-5.4/910-kobject_uevent.patch
+new file mode 100644
+index 0000000000..c4c41ca400
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/910-kobject_uevent.patch
+@@ -0,0 +1,32 @@
++From 0d37e6edc09c99e683dd91ca0e83bbc0df8477b3 Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sun, 16 Jul 2017 16:56:10 +0200
++Subject: lib: add uevent_next_seqnum()
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ include/linux/kobject.h |  5 +++++
++ lib/kobject_uevent.c    | 37 +++++++++++++++++++++++++++++++++++++
++ 2 files changed, 42 insertions(+)
++
++--- a/lib/kobject_uevent.c
+++++ b/lib/kobject_uevent.c
++@@ -179,6 +179,18 @@ out:
++ 	return r;
++ }
++ 
+++u64 uevent_next_seqnum(void)
+++{
+++	u64 seq;
+++
+++	mutex_lock(&uevent_sock_mutex);
+++	seq = ++uevent_seqnum;
+++	mutex_unlock(&uevent_sock_mutex);
+++
+++	return seq;
+++}
+++EXPORT_SYMBOL_GPL(uevent_next_seqnum);
+++
++ /**
++  * kobject_synth_uevent - send synthetic uevent with arguments
++  *
+diff --git a/target/linux/generic/hack-5.4/911-kobject_add_broadcast_uevent.patch b/target/linux/generic/hack-5.4/911-kobject_add_broadcast_uevent.patch
+new file mode 100644
+index 0000000000..6f5e50d091
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/911-kobject_add_broadcast_uevent.patch
+@@ -0,0 +1,76 @@
++From 0d37e6edc09c99e683dd91ca0e83bbc0df8477b3 Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sun, 16 Jul 2017 16:56:10 +0200
++Subject: lib: add uevent_next_seqnum()
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ include/linux/kobject.h |  5 +++++
++ lib/kobject_uevent.c    | 37 +++++++++++++++++++++++++++++++++++++
++ 2 files changed, 42 insertions(+)
++
++--- a/include/linux/kobject.h
+++++ b/include/linux/kobject.h
++@@ -32,6 +32,8 @@
++ #define UEVENT_NUM_ENVP			32	/* number of env pointers */
++ #define UEVENT_BUFFER_SIZE		2048	/* buffer for the variables */
++ 
+++struct sk_buff;
+++
++ #ifdef CONFIG_UEVENT_HELPER
++ /* path to the userspace helper executed on an event */
++ extern char uevent_helper[];
++@@ -245,4 +247,7 @@ int kobject_synth_uevent(struct kobject
++ __printf(2, 3)
++ int add_uevent_var(struct kobj_uevent_env *env, const char *format, ...);
++ 
+++int broadcast_uevent(struct sk_buff *skb, __u32 pid, __u32 group,
+++		     gfp_t allocation);
+++
++ #endif /* _KOBJECT_H_ */
++--- a/lib/kobject_uevent.c
+++++ b/lib/kobject_uevent.c
++@@ -691,6 +691,43 @@ int add_uevent_var(struct kobj_uevent_en
++ EXPORT_SYMBOL_GPL(add_uevent_var);
++ 
++ #if defined(CONFIG_NET)
+++int broadcast_uevent(struct sk_buff *skb, __u32 pid, __u32 group,
+++		     gfp_t allocation)
+++{
+++	struct uevent_sock *ue_sk;
+++	int err = 0;
+++
+++	/* send netlink message */
+++	mutex_lock(&uevent_sock_mutex);
+++	list_for_each_entry(ue_sk, &uevent_sock_list, list) {
+++		struct sock *uevent_sock = ue_sk->sk;
+++		struct sk_buff *skb2;
+++
+++		skb2 = skb_clone(skb, allocation);
+++		if (!skb2)
+++			break;
+++
+++		err = netlink_broadcast(uevent_sock, skb2, pid, group,
+++					allocation);
+++		if (err)
+++			break;
+++	}
+++	mutex_unlock(&uevent_sock_mutex);
+++
+++	kfree_skb(skb);
+++	return err;
+++}
+++#else
+++int broadcast_uevent(struct sk_buff *skb, __u32 pid, __u32 group,
+++		     gfp_t allocation)
+++{
+++	kfree_skb(skb);
+++	return 0;
+++}
+++#endif
+++EXPORT_SYMBOL_GPL(broadcast_uevent);
+++
+++#if defined(CONFIG_NET)
++ static int uevent_net_broadcast(struct sock *usk, struct sk_buff *skb,
++ 				struct netlink_ext_ack *extack)
++ {
+diff --git a/target/linux/generic/hack-5.4/921-always-create-console-node-in-initramfs.patch b/target/linux/generic/hack-5.4/921-always-create-console-node-in-initramfs.patch
+new file mode 100644
+index 0000000000..e437579050
+--- /dev/null
++++ b/target/linux/generic/hack-5.4/921-always-create-console-node-in-initramfs.patch
+@@ -0,0 +1,40 @@
++From 5d301596fdc72f6cb672f72eb3c66e7cddefb103 Mon Sep 17 00:00:00 2001
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sat, 8 Jul 2017 08:26:02 +0200
++Subject: initramfs: always create console node
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ usr/gen_initramfs_list.sh | 14 ++++++++++++++
++ 1 file changed, 14 insertions(+)
++
++--- a/usr/gen_initramfs_list.sh
+++++ b/usr/gen_initramfs_list.sh
++@@ -59,6 +59,18 @@ default_initramfs() {
++ 	EOF
++ }
++ 
+++list_openwrt_initramfs() {
+++	:
+++}
+++
+++openwrt_initramfs() {
+++	# make sure that /dev/console exists
+++	cat <<-EOF >> ${output}
+++		dir /dev 0755 0 0
+++		nod /dev/console 0600 0 0 c 5 1
+++	EOF
+++}
+++
++ filetype() {
++ 	local argv1="$1"
++ 
++@@ -180,6 +192,8 @@ dir_filelist() {
++ 	if [  "$(echo "${dirlist}" | wc -l)" -gt 1 ]; then
++ 		${dep_list}print_mtime "$1"
++ 
+++		${dep_list}openwrt_initramfs
+++
++ 		echo "${dirlist}" | \
++ 		while read x; do
++ 			${dep_list}parse ${x}
+diff --git a/target/linux/generic/pending-5.4/0931-w1-gpio-fix-problem-with-platfom-data-in-w1-gpio.patch b/target/linux/generic/pending-5.4/0931-w1-gpio-fix-problem-with-platfom-data-in-w1-gpio.patch
+new file mode 100644
+index 0000000000..33eb34c913
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/0931-w1-gpio-fix-problem-with-platfom-data-in-w1-gpio.patch
+@@ -0,0 +1,26 @@
++From d9c8bc8c1408f3e8529db6e4e04017b4c579c342 Mon Sep 17 00:00:00 2001
++From: Pawel Dembicki <paweldembicki@gmail.com>
++Date: Sun, 18 Feb 2018 17:08:04 +0100
++Subject: [PATCH] w1: gpio: fix problem with platfom data in w1-gpio
++
++In devices, where fdt is used, is impossible to apply platform data
++without proper fdt node.
++
++This patch allow to use platform data in devices with fdt.
++
++Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
++---
++ drivers/w1/masters/w1-gpio.c | 7 +++----
++ 1 file changed, 3 insertions(+), 4 deletions(-)
++
++--- a/drivers/w1/masters/w1-gpio.c
+++++ b/drivers/w1/masters/w1-gpio.c
++@@ -76,7 +76,7 @@ static int w1_gpio_probe(struct platform
++ 	enum gpiod_flags gflags = GPIOD_OUT_LOW_OPEN_DRAIN;
++ 	int err;
++ 
++-	if (of_have_populated_dt()) {
+++	if (of_have_populated_dt() && !dev_get_platdata(&pdev->dev)) {
++ 		pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
++ 		if (!pdata)
++ 			return -ENOMEM;
+diff --git a/target/linux/generic/pending-5.4/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch b/target/linux/generic/pending-5.4/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch
+new file mode 100644
+index 0000000000..45319415f1
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch
+@@ -0,0 +1,57 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Wed, 18 Apr 2018 10:50:05 +0200
++Subject: [PATCH] MIPS: only process negative stack offsets on stack traces
++
++Fixes endless back traces in cases where the compiler emits a stack
++pointer increase in a branch delay slot (probably for some form of
++function return).
++
++[    3.475442] BUG: MAX_STACK_TRACE_ENTRIES too low!
++[    3.480070] turning off the locking correctness validator.
++[    3.485521] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.14.34 #0
++[    3.491475] Stack : 00000000 00000000 00000000 00000000 80e0fce2 00000034 00000000 00000000
++[    3.499764]         87c3838c 80696377 8061047c 00000000 00000001 00000001 87c2d850 6534689f
++[    3.508059]         00000000 00000000 80e10000 00000000 00000000 000000cf 0000000f 00000000
++[    3.516353]         00000000 806a0000 00076891 00000000 00000000 00000000 ffffffff 00000000
++[    3.524648]         806c0000 00000004 80e10000 806a0000 00000003 80690000 00000000 80700000
++[    3.532942]         ...
++[    3.535362] Call Trace:
++[    3.537818] [<80010a48>] show_stack+0x58/0x100
++[    3.542207] [<804c2f78>] dump_stack+0xe8/0x170
++[    3.546613] [<80079f90>] save_trace+0xf0/0x110
++[    3.551010] [<8007b1ec>] mark_lock+0x33c/0x78c
++[    3.555413] [<8007bf48>] __lock_acquire+0x2ac/0x1a08
++[    3.560337] [<8007de60>] lock_acquire+0x64/0x8c
++[    3.564846] [<804e1570>] _raw_spin_lock_irqsave+0x54/0x78
++[    3.570186] [<801b618c>] kernfs_notify+0x94/0xac
++[    3.574770] [<801b7b10>] sysfs_notify+0x74/0xa0
++[    3.579257] [<801b618c>] kernfs_notify+0x94/0xac
++[    3.583839] [<801b7b10>] sysfs_notify+0x74/0xa0
++[    3.588329] [<801b618c>] kernfs_notify+0x94/0xac
++[    3.592911] [<801b7b10>] sysfs_notify+0x74/0xa0
++[    3.597401] [<801b618c>] kernfs_notify+0x94/0xac
++[    3.601983] [<801b7b10>] sysfs_notify+0x74/0xa0
++[    3.606473] [<801b618c>] kernfs_notify+0x94/0xac
++[    3.611055] [<801b7b10>] sysfs_notify+0x74/0xa0
++[    3.615545] [<801b618c>] kernfs_notify+0x94/0xac
++[    3.620125] [<801b7b10>] sysfs_notify+0x74/0xa0
++[    3.624619] [<801b618c>] kernfs_notify+0x94/0xac
++[    3.629197] [<801b7b10>] sysfs_notify+0x74/0xa0
++[    3.633691] [<801b618c>] kernfs_notify+0x94/0xac
++[    3.638269] [<801b7b10>] sysfs_notify+0x74/0xa0
++[    3.642763] [<801b618c>] kernfs_notify+0x94/0xac
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/arch/mips/kernel/process.c
+++++ b/arch/mips/kernel/process.c
++@@ -365,6 +365,8 @@ static inline int is_sp_move_ins(union m
++ 
++ 	if (ip->i_format.opcode == addiu_op ||
++ 	    ip->i_format.opcode == daddiu_op) {
+++		if (ip->i_format.simmediate > 0)
+++			return 0;
++ 		*frame_size = -ip->i_format.simmediate;
++ 		return 1;
++ 	}
+diff --git a/target/linux/generic/pending-5.4/103-MIPS-select-CPU_MIPS64-for-remaining-MIPS64-CPUs.patch b/target/linux/generic/pending-5.4/103-MIPS-select-CPU_MIPS64-for-remaining-MIPS64-CPUs.patch
+new file mode 100644
+index 0000000000..4e7a532156
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/103-MIPS-select-CPU_MIPS64-for-remaining-MIPS64-CPUs.patch
+@@ -0,0 +1,37 @@
++From 31ca877744d95713e4925de542e1c686ab08a542 Mon Sep 17 00:00:00 2001
++From: "Jason A. Donenfeld" <Jason@zx2c4.com>
++Date: Sat, 27 Feb 2021 13:20:24 +0100
++Subject: [PATCH] MIPS: select CPU_MIPS64 for remaining MIPS64 CPUs
++
++The CPU_MIPS64 and CPU_MIPS32 variables are supposed to be able to
++distinguish broadly between 64-bit and 32-bit MIPS CPUs. However, they
++weren't selected by the specialty CPUs, Octeon and Loongson, which meant
++it was possible to hit a weird state of:
++
++    MIPS=y, CONFIG_64BIT=y, CPU_MIPS64=n
++
++This commit rectifies the issue by having CPU_MIPS64 be selected when
++the missing Octeon or Loongson models are selected.
++
++Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
++Cc: Ralf Baechle <ralf@linux-mips.org>
++Cc: George Cherian <gcherian@marvell.com>
++Cc: Huacai Chen <chenhuacai@kernel.org>
++Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
++Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
++---
++ arch/mips/Kconfig | 3 ++-
++ 1 file changed, 2 insertions(+), 1 deletion(-)
++
++--- a/arch/mips/Kconfig
+++++ b/arch/mips/Kconfig
++@@ -2037,7 +2037,8 @@ config CPU_MIPS32
++ 
++ config CPU_MIPS64
++ 	bool
++-	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
+++	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 || \
+++		     CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
++ 
++ #
++ # These indicate the revision of the architecture
+diff --git a/target/linux/generic/pending-5.4/110-ehci_hcd_ignore_oc.patch b/target/linux/generic/pending-5.4/110-ehci_hcd_ignore_oc.patch
+new file mode 100644
+index 0000000000..ce583ceac5
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/110-ehci_hcd_ignore_oc.patch
+@@ -0,0 +1,79 @@
++From: Florian Fainelli <florian@openwrt.org>
++Subject: USB: EHCI: add ignore_oc flag to disable overcurrent checking
++
++This patch adds an ignore_oc flag which can be set by EHCI controller
++not supporting or wanting to disable overcurrent checking. The EHCI
++platform data in include/linux/usb/ehci_pdriver.h is also augmented to
++take advantage of this new flag.
++
++Signed-off-by: Florian Fainelli <florian@openwrt.org>
++---
++ drivers/usb/host/ehci-hcd.c      |    2 +-
++ drivers/usb/host/ehci-hub.c      |    4 ++--
++ drivers/usb/host/ehci-platform.c |    1 +
++ drivers/usb/host/ehci.h          |    1 +
++ include/linux/usb/ehci_pdriver.h |    1 +
++ 5 files changed, 6 insertions(+), 3 deletions(-)
++
++--- a/drivers/usb/host/ehci-hcd.c
+++++ b/drivers/usb/host/ehci-hcd.c
++@@ -651,7 +651,7 @@ static int ehci_run (struct usb_hcd *hcd
++ 		"USB %x.%x started, EHCI %x.%02x%s\n",
++ 		((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
++ 		temp >> 8, temp & 0xff,
++-		ignore_oc ? ", overcurrent ignored" : "");
+++		(ignore_oc || ehci->ignore_oc) ? ", overcurrent ignored" : "");
++ 
++ 	ehci_writel(ehci, INTR_MASK,
++ 		    &ehci->regs->intr_enable); /* Turn On Interrupts */
++--- a/drivers/usb/host/ehci-hub.c
+++++ b/drivers/usb/host/ehci-hub.c
++@@ -643,7 +643,7 @@ ehci_hub_status_data (struct usb_hcd *hc
++ 	 * always set, seem to clear PORT_OCC and PORT_CSC when writing to
++ 	 * PORT_POWER; that's surprising, but maybe within-spec.
++ 	 */
++-	if (!ignore_oc)
+++	if (!ignore_oc && !ehci->ignore_oc)
++ 		mask = PORT_CSC | PORT_PEC | PORT_OCC;
++ 	else
++ 		mask = PORT_CSC | PORT_PEC;
++@@ -1013,7 +1013,7 @@ int ehci_hub_control(
++ 		if (temp & PORT_PEC)
++ 			status |= USB_PORT_STAT_C_ENABLE << 16;
++ 
++-		if ((temp & PORT_OCC) && !ignore_oc){
+++		if ((temp & PORT_OCC) && (!ignore_oc && !ehci->ignore_oc)){
++ 			status |= USB_PORT_STAT_C_OVERCURRENT << 16;
++ 
++ 			/*
++--- a/drivers/usb/host/ehci-platform.c
+++++ b/drivers/usb/host/ehci-platform.c
++@@ -319,6 +319,8 @@ static int ehci_platform_probe(struct pl
++ 		hcd->has_tt = 1;
++ 	if (pdata->reset_on_resume)
++ 		priv->reset_on_resume = true;
+++	if (pdata->ignore_oc)
+++		ehci->ignore_oc = 1;
++ 
++ #ifndef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
++ 	if (ehci->big_endian_mmio) {
++--- a/drivers/usb/host/ehci.h
+++++ b/drivers/usb/host/ehci.h
++@@ -218,6 +218,7 @@ struct ehci_hcd {			/* one per controlle
++ 	unsigned		frame_index_bug:1; /* MosChip (AKA NetMos) */
++ 	unsigned		need_oc_pp_cycle:1; /* MPC834X port power */
++ 	unsigned		imx28_write_fix:1; /* For Freescale i.MX28 */
+++	unsigned		ignore_oc:1;
++ 
++ 	/* required for usb32 quirk */
++ 	#define OHCI_CTRL_HCFS          (3 << 6)
++--- a/include/linux/usb/ehci_pdriver.h
+++++ b/include/linux/usb/ehci_pdriver.h
++@@ -50,6 +50,7 @@ struct usb_ehci_pdata {
++ 	unsigned	no_io_watchdog:1;
++ 	unsigned	reset_on_resume:1;
++ 	unsigned	dma_mask_64:1;
+++	unsigned	ignore_oc:1;
++ 
++ 	/* Turn on all power and clocks */
++ 	int (*power_on)(struct platform_device *pdev);
+diff --git a/target/linux/generic/pending-5.4/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch b/target/linux/generic/pending-5.4/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch
+new file mode 100644
+index 0000000000..6acb2dc386
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch
+@@ -0,0 +1,82 @@
++From: Tobias Wolf <dev-NTEO@vplace.de>
++Subject: mm: Fix alloc_node_mem_map with ARCH_PFN_OFFSET calculation
++
++An rt288x (ralink) based router (Belkin F5D8235 v1) does not boot with any
++kernel beyond version 4.3 resulting in:
++
++BUG: Bad page state in process swapper  pfn:086ac
++
++bisect resulted in:
++
++a1c34a3bf00af2cede839879502e12dc68491ad5 is the first bad commit
++commit a1c34a3bf00af2cede839879502e12dc68491ad5
++Author: Laura Abbott <laura@labbott.name>
++Date:   Thu Nov 5 18:48:46 2015 -0800
++
++    mm: Don't offset memmap for flatmem
++
++    Srinivas Kandagatla reported bad page messages when trying to remove the
++    bottom 2MB on an ARM based IFC6410 board
++
++      BUG: Bad page state in process swapper  pfn:fffa8
++      page:ef7fb500 count:0 mapcount:0 mapping:  (null) index:0x0
++      flags: 0x96640253(locked|error|dirty|active|arch_1|reclaim|mlocked)
++      page dumped because: PAGE_FLAGS_CHECK_AT_FREE flag(s) set
++      bad because of flags:
++      flags: 0x200041(locked|active|mlocked)
++      Modules linked in:
++      CPU: 0 PID: 0 Comm: swapper Not tainted 3.19.0-rc3-00007-g412f9ba-dirty
++#816
++      Hardware name: Qualcomm (Flattened Device Tree)
++        unwind_backtrace
++        show_stack
++        dump_stack
++        bad_page
++        free_pages_prepare
++        free_hot_cold_page
++        __free_pages
++        free_highmem_page
++        mem_init
++        start_kernel
++      Disabling lock debugging due to kernel taint
++    [...]
++:040000 040000 2de013c372345fd471cd58f0553c9b38b0ef1cc4
++0a8156f848733dfa21e16c196dfb6c0a76290709 M      mm
++
++This fix for ARM does not account ARCH_PFN_OFFSET for mem_map as later used by
++page_to_pfn anymore.
++
++The following output was generated with two hacked in printk statements:
++
++printk("before %p vs. %p or %p\n", mem_map, mem_map - offset, mem_map -
++(pgdat->node_start_pfn - ARCH_PFN_OFFSET));
++		if (page_to_pfn(mem_map) != pgdat->node_start_pfn)
++			mem_map -= offset + (pgdat->node_start_pfn - ARCH_PFN_OFFSET);
++printk("after %p\n", mem_map);
++
++Output:
++
++[    0.000000] before 8861b280 vs. 8861b280 or 8851b280
++[    0.000000] after 8851b280
++
++As seen in the first line mem_map with subtraction of offset does not equal the
++mem_map after subtraction of ARCH_PFN_OFFSET.
++
++After adding the offset of ARCH_PFN_OFFSET as well to mem_map as the
++previously calculated offset is zero for the named platform it is able to boot
++4.4 and 4.9-rc7 again.
++
++Signed-off-by: Tobias Wolf <dev-NTEO@vplace.de>
++---
++
++--- a/mm/page_alloc.c
+++++ b/mm/page_alloc.c
++@@ -6884,7 +6884,7 @@ static void __ref alloc_node_mem_map(str
++ 		mem_map = NODE_DATA(0)->node_mem_map;
++ #if defined(CONFIG_HAVE_MEMBLOCK_NODE_MAP) || defined(CONFIG_FLATMEM)
++ 		if (page_to_pfn(mem_map) != pgdat->node_start_pfn)
++-			mem_map -= offset;
+++			mem_map -= offset + (pgdat->node_start_pfn - ARCH_PFN_OFFSET);
++ #endif /* CONFIG_HAVE_MEMBLOCK_NODE_MAP */
++ 	}
++ #endif
+diff --git a/target/linux/generic/pending-5.4/130-add-linux-spidev-compatible-si3210.patch b/target/linux/generic/pending-5.4/130-add-linux-spidev-compatible-si3210.patch
+new file mode 100644
+index 0000000000..eedb2bb28d
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/130-add-linux-spidev-compatible-si3210.patch
+@@ -0,0 +1,18 @@
++From: Giuseppe Lippolis <giu.lippolis@gmail.com>
++Subject: Add the linux,spidev compatible in spidev Several device in ramips have this binding in the dts
++
++Signed-off-by: Giuseppe Lippolis <giu.lippolis@gmail.com>
++---
++ drivers/spi/spidev.c | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/drivers/spi/spidev.c
+++++ b/drivers/spi/spidev.c
++@@ -678,6 +678,7 @@ static const struct of_device_id spidev_
++ 	{ .compatible = "lwn,bk4" },
++ 	{ .compatible = "dh,dhcom-board" },
++ 	{ .compatible = "menlo,m53cpld" },
+++	{ .compatible = "siliconlabs,si3210" },
++ 	{},
++ };
++ MODULE_DEVICE_TABLE(of, spidev_dt_ids);
+diff --git a/target/linux/generic/pending-5.4/140-jffs2-use-.rename2-and-add-RENAME_WHITEOUT-support.patch b/target/linux/generic/pending-5.4/140-jffs2-use-.rename2-and-add-RENAME_WHITEOUT-support.patch
+new file mode 100644
+index 0000000000..b9bb3f71f1
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/140-jffs2-use-.rename2-and-add-RENAME_WHITEOUT-support.patch
+@@ -0,0 +1,62 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: jffs2: use .rename2 and add RENAME_WHITEOUT support
++
++It is required for renames on overlayfs
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/fs/jffs2/dir.c
+++++ b/fs/jffs2/dir.c
++@@ -756,6 +756,24 @@ static int jffs2_mknod (struct inode *di
++ 	return ret;
++ }
++ 
+++static int jffs2_whiteout (struct inode *old_dir, struct dentry *old_dentry)
+++{
+++	struct dentry *wh;
+++	int err;
+++
+++	wh = d_alloc(old_dentry->d_parent, &old_dentry->d_name);
+++	if (!wh)
+++		return -ENOMEM;
+++
+++	err = jffs2_mknod(old_dir, wh, S_IFCHR | WHITEOUT_MODE,
+++			  WHITEOUT_DEV);
+++	if (err)
+++		return err;
+++
+++	d_rehash(wh);
+++	return 0;
+++}
+++
++ static int jffs2_rename (struct inode *old_dir_i, struct dentry *old_dentry,
++ 			 struct inode *new_dir_i, struct dentry *new_dentry,
++ 			 unsigned int flags)
++@@ -766,7 +784,7 @@ static int jffs2_rename (struct inode *o
++ 	uint8_t type;
++ 	uint32_t now;
++ 
++-	if (flags & ~RENAME_NOREPLACE)
+++	if (flags & ~(RENAME_NOREPLACE|RENAME_WHITEOUT))
++ 		return -EINVAL;
++ 
++ 	/* The VFS will check for us and prevent trying to rename a
++@@ -832,9 +850,14 @@ static int jffs2_rename (struct inode *o
++ 	if (d_is_dir(old_dentry) && !victim_f)
++ 		inc_nlink(new_dir_i);
++ 
++-	/* Unlink the original */
++-	ret = jffs2_do_unlink(c, JFFS2_INODE_INFO(old_dir_i),
++-			      old_dentry->d_name.name, old_dentry->d_name.len, NULL, now);
+++	if (flags & RENAME_WHITEOUT)
+++		/* Replace with whiteout */
+++		ret = jffs2_whiteout(old_dir_i, old_dentry);
+++	else
+++		/* Unlink the original */
+++		ret = jffs2_do_unlink(c, JFFS2_INODE_INFO(old_dir_i),
+++				      old_dentry->d_name.name,
+++				      old_dentry->d_name.len, NULL, now);
++ 
++ 	/* We don't touch inode->i_nlink */
++ 
+diff --git a/target/linux/generic/pending-5.4/141-jffs2-add-RENAME_EXCHANGE-support.patch b/target/linux/generic/pending-5.4/141-jffs2-add-RENAME_EXCHANGE-support.patch
+new file mode 100644
+index 0000000000..4b30bc7cd0
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/141-jffs2-add-RENAME_EXCHANGE-support.patch
+@@ -0,0 +1,73 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: jffs2: add RENAME_EXCHANGE support
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/fs/jffs2/dir.c
+++++ b/fs/jffs2/dir.c
++@@ -781,18 +781,31 @@ static int jffs2_rename (struct inode *o
++ 	int ret;
++ 	struct jffs2_sb_info *c = JFFS2_SB_INFO(old_dir_i->i_sb);
++ 	struct jffs2_inode_info *victim_f = NULL;
+++	struct inode *fst_inode = d_inode(old_dentry);
+++	struct inode *snd_inode = d_inode(new_dentry);
++ 	uint8_t type;
++ 	uint32_t now;
++ 
++-	if (flags & ~(RENAME_NOREPLACE|RENAME_WHITEOUT))
+++	if (flags & ~(RENAME_NOREPLACE|RENAME_WHITEOUT|RENAME_EXCHANGE))
++ 		return -EINVAL;
++ 
+++	if ((flags & RENAME_EXCHANGE) && (old_dir_i != new_dir_i)) {
+++		if (S_ISDIR(fst_inode->i_mode) && !S_ISDIR(snd_inode->i_mode)) {
+++			inc_nlink(new_dir_i);
+++			drop_nlink(old_dir_i);
+++		}
+++		else if (!S_ISDIR(fst_inode->i_mode) && S_ISDIR(snd_inode->i_mode)) {
+++			drop_nlink(new_dir_i);
+++			inc_nlink(old_dir_i);
+++		}
+++	}
+++
++ 	/* The VFS will check for us and prevent trying to rename a
++ 	 * file over a directory and vice versa, but if it's a directory,
++ 	 * the VFS can't check whether the victim is empty. The filesystem
++ 	 * needs to do that for itself.
++ 	 */
++-	if (d_really_is_positive(new_dentry)) {
+++	if (d_really_is_positive(new_dentry) && !(flags & RENAME_EXCHANGE)) {
++ 		victim_f = JFFS2_INODE_INFO(d_inode(new_dentry));
++ 		if (d_is_dir(new_dentry)) {
++ 			struct jffs2_full_dirent *fd;
++@@ -827,7 +840,7 @@ static int jffs2_rename (struct inode *o
++ 	if (ret)
++ 		return ret;
++ 
++-	if (victim_f) {
+++	if (victim_f && !(flags & RENAME_EXCHANGE)) {
++ 		/* There was a victim. Kill it off nicely */
++ 		if (d_is_dir(new_dentry))
++ 			clear_nlink(d_inode(new_dentry));
++@@ -853,6 +866,12 @@ static int jffs2_rename (struct inode *o
++ 	if (flags & RENAME_WHITEOUT)
++ 		/* Replace with whiteout */
++ 		ret = jffs2_whiteout(old_dir_i, old_dentry);
+++	else if (flags & RENAME_EXCHANGE)
+++		/* Replace the original */
+++		ret = jffs2_do_link(c, JFFS2_INODE_INFO(old_dir_i),
+++				    d_inode(new_dentry)->i_ino, type,
+++				    old_dentry->d_name.name, old_dentry->d_name.len,
+++				    now);
++ 	else
++ 		/* Unlink the original */
++ 		ret = jffs2_do_unlink(c, JFFS2_INODE_INFO(old_dir_i),
++@@ -884,7 +903,7 @@ static int jffs2_rename (struct inode *o
++ 		return ret;
++ 	}
++ 
++-	if (d_is_dir(old_dentry))
+++	if (d_is_dir(old_dentry) && !(flags & RENAME_EXCHANGE))
++ 		drop_nlink(old_dir_i);
++ 
++ 	new_dir_i->i_mtime = new_dir_i->i_ctime = old_dir_i->i_mtime = old_dir_i->i_ctime = ITIME(now);
+diff --git a/target/linux/generic/pending-5.4/150-bridge_allow_receiption_on_disabled_port.patch b/target/linux/generic/pending-5.4/150-bridge_allow_receiption_on_disabled_port.patch
+new file mode 100644
+index 0000000000..c63268ece9
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/150-bridge_allow_receiption_on_disabled_port.patch
+@@ -0,0 +1,45 @@
++From: Stephen Hemminger <stephen@networkplumber.org>
++Subject: bridge: allow receiption on disabled port
++
++When an ethernet device is enslaved to a bridge, and the bridge STP
++detects loss of carrier (or operational state down), then normally
++packet receiption is blocked.
++
++This breaks control applications like WPA which maybe expecting to
++receive packets to negotiate to bring link up. The bridge needs to
++block forwarding packets from these disabled ports, but there is no
++hard requirement to not allow local packet delivery.
++
++Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++
++--- a/net/bridge/br_input.c
+++++ b/net/bridge/br_input.c
++@@ -190,6 +190,9 @@ static void __br_handle_local_finish(str
++ /* note: already called with rcu_read_lock */
++ static int br_handle_local_finish(struct net *net, struct sock *sk, struct sk_buff *skb)
++ {
+++	struct net_bridge_port *p = br_port_get_rcu(skb->dev);
+++
+++	if (p->state != BR_STATE_DISABLED)
++ 	__br_handle_local_finish(skb);
++ 
++ 	/* return 1 to signal the okfn() was called so it's ok to use the skb */
++@@ -340,6 +343,17 @@ rx_handler_result_t br_handle_frame(stru
++ 
++ forward:
++ 	switch (p->state) {
+++	case BR_STATE_DISABLED:
+++		if (ether_addr_equal(p->br->dev->dev_addr, dest))
+++			skb->pkt_type = PACKET_HOST;
+++
+++		if (NF_HOOK(NFPROTO_BRIDGE, NF_BR_PRE_ROUTING,
+++			dev_net(skb->dev), NULL, skb, skb->dev, NULL,
+++			br_handle_local_finish) == 1) {
+++			return RX_HANDLER_PASS;
+++		}
+++		break;
+++
++ 	case BR_STATE_FORWARDING:
++ 	case BR_STATE_LEARNING:
++ 		if (ether_addr_equal(p->br->dev->dev_addr, dest))
+diff --git a/target/linux/generic/pending-5.4/180-net-phy-at803x-add-support-for-AT8032.patch b/target/linux/generic/pending-5.4/180-net-phy-at803x-add-support-for-AT8032.patch
+new file mode 100644
+index 0000000000..9b88282442
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/180-net-phy-at803x-add-support-for-AT8032.patch
+@@ -0,0 +1,63 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: net: phy: at803x: add support for AT8032
++
++Like AT8030, this PHY needs the GPIO reset workaround
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/net/phy/at803x.c
+++++ b/drivers/net/phy/at803x.c
++@@ -64,8 +64,10 @@
++ 
++ #define ATH8030_PHY_ID 0x004dd076
++ #define ATH8031_PHY_ID 0x004dd074
+++#define ATH8032_PHY_ID 0x004dd023
++ #define ATH8035_PHY_ID 0x004dd072
++ #define AT803X_PHY_ID_MASK			0xffffffef
+++#define AT8032_PHY_ID_MASK			0xffffffff
++ 
++ MODULE_DESCRIPTION("Atheros 803x PHY driver");
++ MODULE_AUTHOR("Matus Ujhelyi");
++@@ -314,7 +316,7 @@ static int at803x_config_intr(struct phy
++ static void at803x_link_change_notify(struct phy_device *phydev)
++ {
++ 	/*
++-	 * Conduct a hardware reset for AT8030 every time a link loss is
+++	 * Conduct a hardware reset for AT8030/2 every time a link loss is
++ 	 * signalled. This is necessary to circumvent a hardware bug that
++ 	 * occurs when the cable is unplugged while TX packets are pending
++ 	 * in the FIFO. In such cases, the FIFO enters an error mode it
++@@ -471,6 +473,24 @@ static struct phy_driver at803x_driver[]
++ 	.aneg_done		= at803x_aneg_done,
++ 	.ack_interrupt		= &at803x_ack_interrupt,
++ 	.config_intr		= &at803x_config_intr,
+++}, {
+++	/* ATHEROS 8032 */
+++	.phy_id			= ATH8032_PHY_ID,
+++	.name			= "Atheros 8032 ethernet",
+++	.phy_id_mask		= AT8032_PHY_ID_MASK,
+++	.probe			= at803x_probe,
+++	.config_init		= at803x_config_init,
+++	.link_change_notify	= at803x_link_change_notify,
+++	.set_wol		= at803x_set_wol,
+++	.get_wol		= at803x_get_wol,
+++	.suspend		= at803x_suspend,
+++	.resume			= at803x_resume,
+++	/* PHY_BASIC_FEATURES */
+++	.read_status		= at803x_read_status,
+++	.config_aneg		= genphy_config_aneg,
+++	.read_status		= genphy_read_status,
+++	.ack_interrupt		= at803x_ack_interrupt,
+++	.config_intr		= at803x_config_intr,
++ } };
++ 
++ module_phy_driver(at803x_driver);
++@@ -478,6 +498,7 @@ module_phy_driver(at803x_driver);
++ static struct mdio_device_id __maybe_unused atheros_tbl[] = {
++ 	{ ATH8030_PHY_ID, AT803X_PHY_ID_MASK },
++ 	{ ATH8031_PHY_ID, AT803X_PHY_ID_MASK },
+++	{ ATH8032_PHY_ID, AT8032_PHY_ID_MASK },
++ 	{ ATH8035_PHY_ID, AT803X_PHY_ID_MASK },
++ 	{ }
++ };
+diff --git a/target/linux/generic/pending-5.4/190-rtc-rs5c372-support_alarms_up_to_1_week.patch b/target/linux/generic/pending-5.4/190-rtc-rs5c372-support_alarms_up_to_1_week.patch
+new file mode 100644
+index 0000000000..13b79b5c09
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/190-rtc-rs5c372-support_alarms_up_to_1_week.patch
+@@ -0,0 +1,94 @@
++From: Daniel González Cabanelas <dgcbueu@gmail.com>
++Subject: [PATCH 1/2] rtc: rs5c372: support alarms up to 1 week
++
++The Ricoh R2221x, R2223x, RS5C372, RV5C387A chips can handle 1 week
++alarms.
++
++Read the "wday" alarm register and convert it to a date to support up 1
++week in our driver.
++
++Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
++---
++ drivers/rtc/rtc-rs5c372.c | 48 ++++++++++++++++++++++++++++++++++-----
++ 1 file changed, 42 insertions(+), 6 deletions(-)
++
++--- a/drivers/rtc/rtc-rs5c372.c
+++++ b/drivers/rtc/rtc-rs5c372.c
++@@ -393,7 +393,9 @@ static int rs5c_read_alarm(struct device
++ {
++ 	struct i2c_client	*client = to_i2c_client(dev);
++ 	struct rs5c372		*rs5c = i2c_get_clientdata(client);
++-	int			status;
+++	int			status, wday_offs;
+++	struct rtc_time 	rtc;
+++	unsigned long 		alarm_secs;
++ 
++ 	status = rs5c_get_regs(rs5c);
++ 	if (status < 0)
++@@ -403,6 +405,30 @@ static int rs5c_read_alarm(struct device
++ 	t->time.tm_sec = 0;
++ 	t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f);
++ 	t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]);
+++	t->time.tm_wday = ffs(rs5c->regs[RS5C_REG_ALARM_A_WDAY] & 0x7f) - 1;
+++
+++	/* determine the day, month and year based on alarm wday, taking as a
+++	 * reference the current time from the rtc
+++	 */
+++	status = rs5c372_rtc_read_time(dev, &rtc);
+++	if (status < 0)
+++		return status;
+++
+++	wday_offs = t->time.tm_wday - rtc.tm_wday;
+++	alarm_secs = mktime64(rtc.tm_year + 1900,
+++			      rtc.tm_mon + 1,
+++			      rtc.tm_mday + wday_offs,
+++			      t->time.tm_hour,
+++			      t->time.tm_min,
+++			      t->time.tm_sec);
+++
+++	if (wday_offs < 0 || (wday_offs == 0 &&
+++			      (t->time.tm_hour < rtc.tm_hour ||
+++			       (t->time.tm_hour == rtc.tm_hour &&
+++				t->time.tm_min <= rtc.tm_min))))
+++		alarm_secs += 7 * 86400;
+++
+++	rtc_time64_to_tm(alarm_secs, &t->time);
++ 
++ 	/* ... and status */
++ 	t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE);
++@@ -417,12 +443,20 @@ static int rs5c_set_alarm(struct device
++ 	struct rs5c372		*rs5c = i2c_get_clientdata(client);
++ 	int			status, addr, i;
++ 	unsigned char		buf[3];
+++	struct rtc_time 	rtc_tm;
+++	unsigned long 		rtc_secs, alarm_secs;
++ 
++-	/* only handle up to 24 hours in the future, like RTC_ALM_SET */
++-	if (t->time.tm_mday != -1
++-			|| t->time.tm_mon != -1
++-			|| t->time.tm_year != -1)
+++	/* chip only can handle alarms up to one week in the future*/
+++	status = rs5c372_rtc_read_time(dev, &rtc_tm);
+++	if (status)
+++		return status;
+++	rtc_secs = rtc_tm_to_time64(&rtc_tm);
+++	alarm_secs = rtc_tm_to_time64(&t->time);
+++	if (alarm_secs >= rtc_secs + 7 * 86400) {
+++		dev_err(dev, "%s: alarm maximum is one week in the future (%d)\n",
+++			__func__, status);
++ 		return -EINVAL;
+++	}
++ 
++ 	/* REVISIT: round up tm_sec */
++ 
++@@ -443,7 +477,9 @@ static int rs5c_set_alarm(struct device
++ 	/* set alarm */
++ 	buf[0] = bin2bcd(t->time.tm_min);
++ 	buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour);
++-	buf[2] = 0x7f;	/* any/all days */
+++	/* each bit is the day of the week, 0x7f means all days */
+++	buf[2] = (t->time.tm_wday >= 0 && t->time.tm_wday < 7) ?
+++		  BIT(t->time.tm_wday) : 0x7f;
++ 
++ 	for (i = 0; i < sizeof(buf); i++) {
++ 		addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i);
+diff --git a/target/linux/generic/pending-5.4/191-rtc-rs5c372-let_the_alarm_to_be_used_as_wakeup_source.patch b/target/linux/generic/pending-5.4/191-rtc-rs5c372-let_the_alarm_to_be_used_as_wakeup_source.patch
+new file mode 100644
+index 0000000000..7e9d0e66c0
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/191-rtc-rs5c372-let_the_alarm_to_be_used_as_wakeup_source.patch
+@@ -0,0 +1,70 @@
++From: Daniel González Cabanelas <dgcbueu@gmail.com>
++Subject: [PATCH 2/2] rtc: rs5c372: let the alarm to be used as wakeup source
++
++Currently there is no use for the interrupts on the rs5c372 RTC and the
++wakealarm isn't enabled. There are some devices like NASes which use this
++RTC to wake up from the power off state when the INTR pin is activated by
++the alarm clock.
++
++Enable the alarm and let to be used as a wakeup source.
++
++Tested on a Buffalo LS421DE NAS.
++
++Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
++---
++ drivers/rtc/rtc-rs5c372.c | 16 ++++++++++++++++
++ 1 file changed, 16 insertions(+)
++
++--- a/drivers/rtc/rtc-rs5c372.c
+++++ b/drivers/rtc/rtc-rs5c372.c
++@@ -654,6 +654,7 @@ static int rs5c372_probe(struct i2c_clie
++ 	int err = 0;
++ 	int smbus_mode = 0;
++ 	struct rs5c372 *rs5c372;
+++	bool rs5c372_can_wakeup_device = false;
++ 
++ 	dev_dbg(&client->dev, "%s\n", __func__);
++ 
++@@ -689,6 +690,12 @@ static int rs5c372_probe(struct i2c_clie
++ 	else
++ 		rs5c372->type = id->driver_data;
++ 
+++#ifdef CONFIG_OF
+++	if(of_property_read_bool(client->dev.of_node,
+++					      "wakeup-source"))
+++		rs5c372_can_wakeup_device = true;
+++#endif
+++
++ 	/* we read registers 0x0f then 0x00-0x0f; skip the first one */
++ 	rs5c372->regs = &rs5c372->buf[1];
++ 	rs5c372->smbus = smbus_mode;
++@@ -722,6 +729,8 @@ static int rs5c372_probe(struct i2c_clie
++ 		goto exit;
++ 	}
++ 
+++	rs5c372->has_irq = 1;
+++
++ 	/* if the oscillator lost power and no other software (like
++ 	 * the bootloader) set it up, do it here.
++ 	 *
++@@ -748,6 +757,10 @@ static int rs5c372_probe(struct i2c_clie
++ 			);
++ 
++ 	/* REVISIT use client->irq to register alarm irq ... */
+++	if (rs5c372_can_wakeup_device) {
+++		device_init_wakeup(&client->dev, true);
+++	}
+++
++ 	rs5c372->rtc = devm_rtc_device_register(&client->dev,
++ 					rs5c372_driver.driver.name,
++ 					&rs5c372_rtc_ops, THIS_MODULE);
++@@ -761,6 +774,9 @@ static int rs5c372_probe(struct i2c_clie
++ 	if (err)
++ 		goto exit;
++ 
+++	/* the rs5c372 alarm only supports a minute accuracy */
+++	rs5c372->rtc->uie_unsupported = 1;
+++
++ 	return 0;
++ 
++ exit:
+diff --git a/target/linux/generic/pending-5.4/201-extra_optimization.patch b/target/linux/generic/pending-5.4/201-extra_optimization.patch
+new file mode 100644
+index 0000000000..c606487992
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/201-extra_optimization.patch
+@@ -0,0 +1,31 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: Upgrade to Linux 2.6.19
++
++- Includes large parts of the patch from #1021 by dpalffy
++- Includes RB532 NAND driver changes by n0-1
++
++[john@phrozen.org: feix will add this to his upstream queue]
++
++lede-commit: bff468813f78f81e36ebb2a3f4354de7365e640f
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ Makefile | 6 +++---
++ 1 file changed, 3 insertions(+), 3 deletions(-)
++
++--- a/Makefile
+++++ b/Makefile
++@@ -719,11 +719,11 @@ KBUILD_CFLAGS	+= $(call cc-disable-warni
++ KBUILD_CFLAGS	+= $(call cc-disable-warning, address-of-packed-member)
++ 
++ ifdef CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE
++-KBUILD_CFLAGS += -O2
+++KBUILD_CFLAGS += -O2 $(EXTRA_OPTIMIZATION)
++ else ifdef CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE_O3
++-KBUILD_CFLAGS += -O3
+++KBUILD_CFLAGS += -O3 $(EXTRA_OPTIMIZATION)
++ else ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
++-KBUILD_CFLAGS += -Os
+++KBUILD_CFLAGS += -Os -fno-reorder-blocks -fno-tree-ch $(EXTRA_OPTIMIZATION)
++ endif
++ 
++ # Tell gcc to never replace conditional load with a non-conditional one
+diff --git a/target/linux/generic/pending-5.4/203-kallsyms_uncompressed.patch b/target/linux/generic/pending-5.4/203-kallsyms_uncompressed.patch
+new file mode 100644
+index 0000000000..68a2d4d88f
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/203-kallsyms_uncompressed.patch
+@@ -0,0 +1,119 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: kernel: add a config option for keeping the kallsyms table uncompressed, saving ~9kb kernel size after lzma on ar71xx
++
++[john@phrozen.org: added to my upstream queue 30.12.2016]
++lede-commit: e0e3509b5ce2ccf93d4d67ea907613f5f7ec2eed
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ init/Kconfig            | 11 +++++++++++
++ kernel/kallsyms.c       |  8 ++++++++
++ scripts/kallsyms.c      | 12 ++++++++++++
++ scripts/link-vmlinux.sh |  4 ++++
++ 4 files changed, 35 insertions(+)
++
++--- a/init/Kconfig
+++++ b/init/Kconfig
++@@ -1280,6 +1280,17 @@ config SYSCTL_ARCH_UNALIGN_ALLOW
++ 	  the unaligned access emulation.
++ 	  see arch/parisc/kernel/unaligned.c for reference
++ 
+++config KALLSYMS_UNCOMPRESSED
+++	bool "Keep kallsyms uncompressed"
+++	depends on KALLSYMS
+++	help
+++		Normally kallsyms contains compressed symbols (using a token table),
+++		reducing the uncompressed kernel image size. Keeping the symbol table
+++		uncompressed significantly improves the size of this part in compressed
+++		kernel images.
+++
+++		Say N unless you need compressed kernel images to be small.
+++
++ config HAVE_PCSPKR_PLATFORM
++ 	bool
++ 
++--- a/kernel/kallsyms.c
+++++ b/kernel/kallsyms.c
++@@ -75,6 +75,11 @@ static unsigned int kallsyms_expand_symb
++ 	 * For every byte on the compressed symbol data, copy the table
++ 	 * entry for that byte.
++ 	 */
+++#ifdef CONFIG_KALLSYMS_UNCOMPRESSED
+++	memcpy(result, data + 1, len - 1);
+++	result += len - 1;
+++	len = 0;
+++#endif
++ 	while (len) {
++ 		tptr = &kallsyms_token_table[kallsyms_token_index[*data]];
++ 		data++;
++@@ -107,6 +112,9 @@ tail:
++  */
++ static char kallsyms_get_symbol_type(unsigned int off)
++ {
+++#ifdef CONFIG_KALLSYMS_UNCOMPRESSED
+++	return kallsyms_names[off + 1];
+++#endif
++ 	/*
++ 	 * Get just the first code, look it up in the token table,
++ 	 * and return the first char from this token.
++--- a/scripts/kallsyms.c
+++++ b/scripts/kallsyms.c
++@@ -59,6 +59,7 @@ static struct addr_range percpu_range =
++ static struct sym_entry *table;
++ static unsigned int table_size, table_cnt;
++ static int all_symbols = 0;
+++static int uncompressed = 0;
++ static int absolute_percpu = 0;
++ static int base_relative = 0;
++ 
++@@ -440,6 +441,9 @@ static void write_src(void)
++ 
++ 	free(markers);
++ 
+++	if (uncompressed)
+++		return;
+++
++ 	output_label("kallsyms_token_table");
++ 	off = 0;
++ 	for (i = 0; i < 256; i++) {
++@@ -500,6 +504,9 @@ static void *find_token(unsigned char *s
++ {
++ 	int i;
++ 
+++	if (uncompressed)
+++		return NULL;
+++
++ 	for (i = 0; i < len - 1; i++) {
++ 		if (str[i] == token[0] && str[i+1] == token[1])
++ 			return &str[i];
++@@ -572,6 +579,9 @@ static void optimize_result(void)
++ {
++ 	int i, best;
++ 
+++	if (uncompressed)
+++		return;
+++
++ 	/* using the '\0' symbol last allows compress_symbols to use standard
++ 	 * fast string functions */
++ 	for (i = 255; i >= 0; i--) {
++@@ -751,6 +761,8 @@ int main(int argc, char **argv)
++ 				absolute_percpu = 1;
++ 			else if (strcmp(argv[i], "--base-relative") == 0)
++ 				base_relative = 1;
+++			else if (strcmp(argv[i], "--uncompressed") == 0)
+++				uncompressed = 1;
++ 			else
++ 				usage();
++ 		}
++--- a/scripts/link-vmlinux.sh
+++++ b/scripts/link-vmlinux.sh
++@@ -160,6 +160,10 @@ kallsyms()
++ 		kallsymopt="${kallsymopt} --base-relative"
++ 	fi
++ 
+++	if [ -n "${CONFIG_KALLSYMS_UNCOMPRESSED}" ]; then
+++		kallsymopt="${kallsymopt} --uncompressed"
+++	fi
+++
++ 	local aflags="${KBUILD_AFLAGS} ${KBUILD_AFLAGS_KERNEL}               \
++ 		      ${NOSTDINC_FLAGS} ${LINUXINCLUDE} ${KBUILD_CPPFLAGS}"
++ 
+diff --git a/target/linux/generic/pending-5.4/205-backtrace_module_info.patch b/target/linux/generic/pending-5.4/205-backtrace_module_info.patch
+new file mode 100644
+index 0000000000..6048c25957
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/205-backtrace_module_info.patch
+@@ -0,0 +1,41 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: kernel: when KALLSYMS is disabled, print module address + size for matching backtrace entries
++
++[john@phrozen.org: felix will add this to his upstream queue]
++
++lede-commit 53827cdc824556cda910b23ce5030c363b8f1461
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ lib/vsprintf.c | 15 +++++++++++----
++ 1 file changed, 11 insertions(+), 4 deletions(-)
++
++--- a/lib/vsprintf.c
+++++ b/lib/vsprintf.c
++@@ -940,8 +940,10 @@ char *symbol_string(char *buf, char *end
++ 		    struct printf_spec spec, const char *fmt)
++ {
++ 	unsigned long value;
++-#ifdef CONFIG_KALLSYMS
++ 	char sym[KSYM_SYMBOL_LEN];
+++#ifndef CONFIG_KALLSYMS
+++	struct module *mod;
+++	int len;
++ #endif
++ 
++ 	if (fmt[1] == 'R')
++@@ -958,8 +960,14 @@ char *symbol_string(char *buf, char *end
++ 
++ 	return string_nocheck(buf, end, sym, spec);
++ #else
++-	return special_hex_number(buf, end, value, sizeof(void *));
+++	len = snprintf(sym, sizeof(sym), "0x%lx", value);
+++	mod = __module_address(value);
+++	if (mod)
+++		snprintf(sym + len, sizeof(sym) - len, " [%s@%p+0x%x]",
+++			 mod->name, mod->core_layout.base,
+++			 mod->core_layout.size);
++ #endif
+++	return string(buf, end, sym, spec);
++ }
++ 
++ static const struct printf_spec default_str_spec = {
+diff --git a/target/linux/generic/pending-5.4/240-remove-unsane-filenames-from-deps_initramfs-list.patch b/target/linux/generic/pending-5.4/240-remove-unsane-filenames-from-deps_initramfs-list.patch
+new file mode 100644
+index 0000000000..7d890d3e8b
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/240-remove-unsane-filenames-from-deps_initramfs-list.patch
+@@ -0,0 +1,47 @@
++From: Gabor Juhos <juhosg@openwrt.org>
++Subject: usr: sanitize deps_initramfs list
++
++If any filename in the intramfs dependency
++list contains a colon, that causes a kernel
++build error like this:
++
++/devel/openwrt/build_dir/linux-ar71xx_generic/linux-3.6.6/usr/Makefile:58: *** multiple target patterns.  Stop.
++make[5]: *** [usr] Error 2
++
++Fix it by removing such filenames from the
++deps_initramfs list.
++
++Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
++---
++ usr/Makefile | 8 +++++---
++ 1 file changed, 5 insertions(+), 3 deletions(-)
++
++--- a/usr/Makefile
+++++ b/usr/Makefile
++@@ -42,21 +42,23 @@ ifneq ($(wildcard $(obj)/$(datafile_d_y)
++ 	include $(obj)/$(datafile_d_y)
++ endif
++ 
+++deps_initramfs_sane := $(foreach v,$(deps_initramfs),$(if $(findstring :,$(v)),,$(v)))
+++
++ quiet_cmd_initfs = GEN     $@
++       cmd_initfs = $(initramfs) -o $@ $(ramfs-args) $(ramfs-input)
++ 
++ targets := $(datafile_y)
++ 
++ # do not try to update files included in initramfs
++-$(deps_initramfs): ;
+++$(deps_initramfs_sane): ;
++ 
++-$(deps_initramfs): klibcdirs
+++$(deps_initramfs_sane): klibcdirs
++ # We rebuild initramfs_data.cpio if:
++ # 1) Any included file is newer than initramfs_data.cpio
++ # 2) There are changes in which files are included (added or deleted)
++ # 3) If gen_init_cpio are newer than initramfs_data.cpio
++ # 4) Arguments to gen_initramfs.sh changes
++-$(obj)/$(datafile_y): $(obj)/gen_init_cpio $(deps_initramfs) klibcdirs
+++$(obj)/$(datafile_y): $(obj)/gen_init_cpio $(deps_initramfs_sane) klibcdirs
++ 	$(Q)$(initramfs) -l $(ramfs-input) > $(obj)/$(datafile_d_y)
++ 	$(call if_changed,initfs)
++ 
+diff --git a/target/linux/generic/pending-5.4/261-enable_wilink_platform_without_drivers.patch b/target/linux/generic/pending-5.4/261-enable_wilink_platform_without_drivers.patch
+new file mode 100644
+index 0000000000..c4cf2cceb7
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/261-enable_wilink_platform_without_drivers.patch
+@@ -0,0 +1,20 @@
++From: Imre Kaloz <kaloz@openwrt.org>
++Subject: [PATCH] hack: net: wireless: make the wl12xx glue code available with
++ compat-wireless, too
++
++Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
++---
++ drivers/net/wireless/ti/Kconfig | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/net/wireless/ti/Kconfig
+++++ b/drivers/net/wireless/ti/Kconfig
++@@ -20,7 +20,7 @@ source "drivers/net/wireless/ti/wlcore/K
++ 
++ config WILINK_PLATFORM_DATA
++ 	bool "TI WiLink platform data"
++-	depends on WLCORE_SDIO || WL1251_SDIO
+++	depends on WLCORE_SDIO || WL1251_SDIO || ARCH_OMAP2PLUS
++ 	default y
++ 	---help---
++ 	Small platform data bit needed to pass data to the sdio modules.
+diff --git a/target/linux/generic/pending-5.4/270-platform-mikrotik-build-bits.patch b/target/linux/generic/pending-5.4/270-platform-mikrotik-build-bits.patch
+new file mode 100644
+index 0000000000..df738ef97b
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/270-platform-mikrotik-build-bits.patch
+@@ -0,0 +1,31 @@
++From c2deb5ef01a0ef09088832744cbace9e239a6ee0 Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Thibaut=20VAR=C3=88NE?= <hacks@slashdirt.org>
++Date: Sat, 28 Mar 2020 12:11:50 +0100
++Subject: [PATCH] generic: platform/mikrotik build bits (5.4)
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++This patch adds platform/mikrotik kernel build bits
++
++Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
++---
++ drivers/platform/Kconfig  | 2 ++
++ drivers/platform/Makefile | 1 +
++ 2 files changed, 3 insertions(+)
++
++--- a/drivers/platform/Kconfig
+++++ b/drivers/platform/Kconfig
++@@ -13,3 +13,5 @@ source "drivers/platform/chrome/Kconfig"
++ source "drivers/platform/mellanox/Kconfig"
++ 
++ source "drivers/platform/olpc/Kconfig"
+++
+++source "drivers/platform/mikrotik/Kconfig"
++--- a/drivers/platform/Makefile
+++++ b/drivers/platform/Makefile
++@@ -9,3 +9,4 @@ obj-$(CONFIG_MIPS)		+= mips/
++ obj-$(CONFIG_OLPC_EC)		+= olpc/
++ obj-$(CONFIG_GOLDFISH)		+= goldfish/
++ obj-$(CONFIG_CHROME_PLATFORMS)	+= chrome/
+++obj-$(CONFIG_MIKROTIK)		+= mikrotik/
+diff --git a/target/linux/generic/pending-5.4/300-mips_expose_boot_raw.patch b/target/linux/generic/pending-5.4/300-mips_expose_boot_raw.patch
+new file mode 100644
+index 0000000000..7b9ae65c60
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/300-mips_expose_boot_raw.patch
+@@ -0,0 +1,40 @@
++From: Mark Miller <mark@mirell.org>
++Subject: mips: expose CONFIG_BOOT_RAW
++
++This exposes the CONFIG_BOOT_RAW symbol in Kconfig. This is needed on
++certain Broadcom chipsets running CFE in order to load the kernel.
++
++Signed-off-by: Mark Miller <mark@mirell.org>
++Acked-by: Rob Landley <rob@landley.net>
++---
++--- a/arch/mips/Kconfig
+++++ b/arch/mips/Kconfig
++@@ -1069,9 +1069,6 @@ config FW_ARC
++ config ARCH_MAY_HAVE_PC_FDC
++ 	bool
++ 
++-config BOOT_RAW
++-	bool
++-
++ config CEVT_BCM1480
++ 	bool
++ 
++@@ -3044,6 +3041,18 @@ choice
++ 		bool "Extend builtin kernel arguments with bootloader arguments"
++ endchoice
++ 
+++config BOOT_RAW
+++	bool "Enable the kernel to be executed from the load address"
+++	default n
+++	help
+++	 Allow the kernel to be executed from the load address for
+++	 bootloaders which cannot read the ELF format. This places
+++	 a jump to start_kernel at the load address.
+++
+++	 If unsure, say N.
+++
+++
+++
++ endmenu
++ 
++ config LOCKDEP_SUPPORT
+diff --git a/target/linux/generic/pending-5.4/302-mips_no_branch_likely.patch b/target/linux/generic/pending-5.4/302-mips_no_branch_likely.patch
+new file mode 100644
+index 0000000000..bf1b489111
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/302-mips_no_branch_likely.patch
+@@ -0,0 +1,22 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: mips: use -mno-branch-likely for kernel and userspace
++
++saves ~11k kernel size after lzma and ~12k squashfs size in the
++
++lede-commit: 41a039f46450ffae9483d6216422098669da2900
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ arch/mips/Makefile | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/arch/mips/Makefile
+++++ b/arch/mips/Makefile
++@@ -92,7 +92,7 @@ all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlin
++ # machines may also.  Since BFD is incredibly buggy with respect to
++ # crossformat linking we rely on the elf2ecoff tool for format conversion.
++ #
++-cflags-y			+= -G 0 -mno-abicalls -fno-pic -pipe
+++cflags-y			+= -G 0 -mno-abicalls -fno-pic -pipe -mno-branch-likely
++ cflags-y			+= -msoft-float
++ LDFLAGS_vmlinux			+= -G 0 -static -n -nostdlib
++ KBUILD_AFLAGS_MODULE		+= -mlong-calls
+diff --git a/target/linux/generic/pending-5.4/305-mips_module_reloc.patch b/target/linux/generic/pending-5.4/305-mips_module_reloc.patch
+new file mode 100644
+index 0000000000..40a219f5d2
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/305-mips_module_reloc.patch
+@@ -0,0 +1,371 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: mips: replace -mlong-calls with -mno-long-calls to make function calls faster in kernel modules to achieve this, try to
++
++lede-commit: 3b3d64743ba2a874df9d70cd19e242205b0a788c
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ arch/mips/Makefile             |   5 +
++ arch/mips/include/asm/module.h |   5 +
++ arch/mips/kernel/module.c      | 279 ++++++++++++++++++++++++++++++++++++++++-
++ 3 files changed, 284 insertions(+), 5 deletions(-)
++
++--- a/arch/mips/Makefile
+++++ b/arch/mips/Makefile
++@@ -95,8 +95,18 @@ all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlin
++ cflags-y			+= -G 0 -mno-abicalls -fno-pic -pipe -mno-branch-likely
++ cflags-y			+= -msoft-float
++ LDFLAGS_vmlinux			+= -G 0 -static -n -nostdlib
+++ifdef CONFIG_64BIT
++ KBUILD_AFLAGS_MODULE		+= -mlong-calls
++ KBUILD_CFLAGS_MODULE		+= -mlong-calls
+++else
+++  ifdef CONFIG_DYNAMIC_FTRACE
+++    KBUILD_AFLAGS_MODULE	+= -mlong-calls
+++    KBUILD_CFLAGS_MODULE	+= -mlong-calls
+++  else
+++    KBUILD_AFLAGS_MODULE	+= -mno-long-calls
+++    KBUILD_CFLAGS_MODULE	+= -mno-long-calls
+++  endif
+++endif
++ 
++ ifeq ($(CONFIG_RELOCATABLE),y)
++ LDFLAGS_vmlinux			+= --emit-relocs
++--- a/arch/mips/include/asm/module.h
+++++ b/arch/mips/include/asm/module.h
++@@ -12,6 +12,11 @@ struct mod_arch_specific {
++ 	const struct exception_table_entry *dbe_start;
++ 	const struct exception_table_entry *dbe_end;
++ 	struct mips_hi16 *r_mips_hi16_list;
+++
+++	void *phys_plt_tbl;
+++	void *virt_plt_tbl;
+++	unsigned int phys_plt_offset;
+++	unsigned int virt_plt_offset;
++ };
++ 
++ typedef uint8_t Elf64_Byte;		/* Type for a 8-bit quantity.  */
++--- a/arch/mips/kernel/module.c
+++++ b/arch/mips/kernel/module.c
++@@ -32,14 +32,221 @@ struct mips_hi16 {
++ static LIST_HEAD(dbe_list);
++ static DEFINE_SPINLOCK(dbe_lock);
++ 
++-#ifdef MODULE_START
+++/*
+++ * Get the potential max trampolines size required of the init and
+++ * non-init sections. Only used if we cannot find enough contiguous
+++ * physically mapped memory to put the module into.
+++ */
+++static unsigned int
+++get_plt_size(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
+++             const char *secstrings, unsigned int symindex, bool is_init)
+++{
+++	unsigned long ret = 0;
+++	unsigned int i, j;
+++	Elf_Sym *syms;
+++
+++	/* Everything marked ALLOC (this includes the exported symbols) */
+++	for (i = 1; i < hdr->e_shnum; ++i) {
+++		unsigned int info = sechdrs[i].sh_info;
+++
+++		if (sechdrs[i].sh_type != SHT_REL
+++		    && sechdrs[i].sh_type != SHT_RELA)
+++			continue;
+++
+++		/* Not a valid relocation section? */
+++		if (info >= hdr->e_shnum)
+++			continue;
+++
+++		/* Don't bother with non-allocated sections */
+++		if (!(sechdrs[info].sh_flags & SHF_ALLOC))
+++			continue;
+++
+++		/* If it's called *.init*, and we're not init, we're
+++                   not interested */
+++		if ((strstr(secstrings + sechdrs[i].sh_name, ".init") != 0)
+++		    != is_init)
+++			continue;
+++
+++		syms = (Elf_Sym *) sechdrs[symindex].sh_addr;
+++		if (sechdrs[i].sh_type == SHT_REL) {
+++			Elf_Mips_Rel *rel = (void *) sechdrs[i].sh_addr;
+++			unsigned int size = sechdrs[i].sh_size / sizeof(*rel);
+++
+++			for (j = 0; j < size; ++j) {
+++				Elf_Sym *sym;
+++
+++				if (ELF_MIPS_R_TYPE(rel[j]) != R_MIPS_26)
+++					continue;
+++
+++				sym = syms + ELF_MIPS_R_SYM(rel[j]);
+++				if (!is_init && sym->st_shndx != SHN_UNDEF)
+++					continue;
+++
+++				ret += 4 * sizeof(int);
+++			}
+++		} else {
+++			Elf_Mips_Rela *rela = (void *) sechdrs[i].sh_addr;
+++			unsigned int size = sechdrs[i].sh_size / sizeof(*rela);
+++
+++			for (j = 0; j < size; ++j) {
+++				Elf_Sym *sym;
+++
+++				if (ELF_MIPS_R_TYPE(rela[j]) != R_MIPS_26)
+++					continue;
+++
+++				sym = syms + ELF_MIPS_R_SYM(rela[j]);
+++				if (!is_init && sym->st_shndx != SHN_UNDEF)
+++					continue;
+++
+++				ret += 4 * sizeof(int);
+++			}
+++		}
+++	}
+++
+++	return ret;
+++}
+++
+++#ifndef MODULE_START
+++static void *alloc_phys(unsigned long size)
+++{
+++	unsigned order;
+++	struct page *page;
+++	struct page *p;
+++
+++	size = PAGE_ALIGN(size);
+++	order = get_order(size);
+++
+++	page = alloc_pages(GFP_KERNEL | __GFP_NORETRY | __GFP_NOWARN |
+++			__GFP_THISNODE, order);
+++	if (!page)
+++		return NULL;
+++
+++	split_page(page, order);
+++
+++	/* mark all pages except for the last one */
+++	for (p = page; p + 1 < page + (size >> PAGE_SHIFT); ++p)
+++		set_bit(PG_owner_priv_1, &p->flags);
+++
+++	for (p = page + (size >> PAGE_SHIFT); p < page + (1 << order); ++p)
+++		__free_page(p);
+++
+++	return page_address(page);
+++}
+++#endif
+++
+++static void free_phys(void *ptr)
+++{
+++	struct page *page;
+++	bool free;
+++
+++	page = virt_to_page(ptr);
+++	do {
+++		free = test_and_clear_bit(PG_owner_priv_1, &page->flags);
+++		__free_page(page);
+++		page++;
+++	} while (free);
+++}
+++
+++
++ void *module_alloc(unsigned long size)
++ {
+++#ifdef MODULE_START
++ 	return __vmalloc_node_range(size, 1, MODULE_START, MODULE_END,
++ 				GFP_KERNEL, PAGE_KERNEL, 0, NUMA_NO_NODE,
++ 				__builtin_return_address(0));
+++#else
+++	void *ptr;
+++
+++	if (size == 0)
+++		return NULL;
+++
+++	ptr = alloc_phys(size);
+++
+++	/* If we failed to allocate physically contiguous memory,
+++	 * fall back to regular vmalloc. The module loader code will
+++	 * create jump tables to handle long jumps */
+++	if (!ptr)
+++		return vmalloc(size);
+++
+++	return ptr;
+++#endif
++ }
+++
+++static inline bool is_phys_addr(void *ptr)
+++{
+++#ifdef CONFIG_64BIT
+++	return (KSEGX((unsigned long)ptr) == CKSEG0);
+++#else
+++	return (KSEGX(ptr) == KSEG0);
++ #endif
+++}
+++
+++/* Free memory returned from module_alloc */
+++void module_memfree(void *module_region)
+++{
+++	if (is_phys_addr(module_region))
+++		free_phys(module_region);
+++	else
+++		vfree(module_region);
+++}
+++
+++static void *__module_alloc(int size, bool phys)
+++{
+++	void *ptr;
+++
+++	if (phys)
+++		ptr = kmalloc(size, GFP_KERNEL);
+++	else
+++		ptr = vmalloc(size);
+++	return ptr;
+++}
+++
+++static void __module_free(void *ptr)
+++{
+++	if (is_phys_addr(ptr))
+++		kfree(ptr);
+++	else
+++		vfree(ptr);
+++}
+++
+++int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs,
+++			      char *secstrings, struct module *mod)
+++{
+++	unsigned int symindex = 0;
+++	unsigned int core_size, init_size;
+++	int i;
+++
+++	mod->arch.phys_plt_offset = 0;
+++	mod->arch.virt_plt_offset = 0;
+++	mod->arch.phys_plt_tbl = NULL;
+++	mod->arch.virt_plt_tbl = NULL;
+++
+++	if (IS_ENABLED(CONFIG_64BIT))
+++		return 0;
+++
+++	for (i = 1; i < hdr->e_shnum; i++)
+++		if (sechdrs[i].sh_type == SHT_SYMTAB)
+++			symindex = i;
+++
+++	core_size = get_plt_size(hdr, sechdrs, secstrings, symindex, false);
+++	init_size = get_plt_size(hdr, sechdrs, secstrings, symindex, true);
+++
+++	if ((core_size + init_size) == 0)
+++		return 0;
+++
+++	mod->arch.phys_plt_tbl = __module_alloc(core_size + init_size, 1);
+++	if (!mod->arch.phys_plt_tbl)
+++		return -ENOMEM;
+++
+++	mod->arch.virt_plt_tbl = __module_alloc(core_size + init_size, 0);
+++	if (!mod->arch.virt_plt_tbl) {
+++		__module_free(mod->arch.phys_plt_tbl);
+++		mod->arch.phys_plt_tbl = NULL;
+++		return -ENOMEM;
+++	}
+++
+++	return 0;
+++}
++ 
++ static int apply_r_mips_none(struct module *me, u32 *location,
++ 			     u32 base, Elf_Addr v, bool rela)
++@@ -55,9 +262,40 @@ static int apply_r_mips_32(struct module
++ 	return 0;
++ }
++ 
+++static Elf_Addr add_plt_entry_to(unsigned *plt_offset,
+++				 void *start, Elf_Addr v)
+++{
+++	unsigned *tramp = start + *plt_offset;
+++	*plt_offset += 4 * sizeof(int);
+++
+++	/* adjust carry for addiu */
+++	if (v & 0x00008000)
+++		v += 0x10000;
+++
+++	tramp[0] = 0x3c190000 | (v >> 16);      /* lui t9, hi16 */
+++	tramp[1] = 0x27390000 | (v & 0xffff);   /* addiu t9, t9, lo16 */
+++	tramp[2] = 0x03200008;                  /* jr t9 */
+++	tramp[3] = 0x00000000;                  /* nop */
+++
+++	return (Elf_Addr) tramp;
+++}
+++
+++static Elf_Addr add_plt_entry(struct module *me, void *location, Elf_Addr v)
+++{
+++	if (is_phys_addr(location))
+++		return add_plt_entry_to(&me->arch.phys_plt_offset,
+++				me->arch.phys_plt_tbl, v);
+++	else
+++		return add_plt_entry_to(&me->arch.virt_plt_offset,
+++				me->arch.virt_plt_tbl, v);
+++
+++}
+++
++ static int apply_r_mips_26(struct module *me, u32 *location,
++ 			   u32 base, Elf_Addr v, bool rela)
++ {
+++	u32 ofs = base & 0x03ffffff;
+++
++ 	if (v % 4) {
++ 		pr_err("module %s: dangerous R_MIPS_26 relocation\n",
++ 		       me->name);
++@@ -65,13 +303,17 @@ static int apply_r_mips_26(struct module
++ 	}
++ 
++ 	if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) {
++-		pr_err("module %s: relocation overflow\n",
++-		       me->name);
++-		return -ENOEXEC;
+++		v = add_plt_entry(me, location, v + (ofs << 2));
+++		if (!v) {
+++			pr_err("module %s: relocation overflow\n",
+++			       me->name);
+++			return -ENOEXEC;
+++		}
+++		ofs = 0;
++ 	}
++ 
++ 	*location = (*location & ~0x03ffffff) |
++-		    ((base + (v >> 2)) & 0x03ffffff);
+++		    ((ofs + (v >> 2)) & 0x03ffffff);
++ 
++ 	return 0;
++ }
++@@ -447,9 +689,36 @@ int module_finalize(const Elf_Ehdr *hdr,
++ 		list_add(&me->arch.dbe_list, &dbe_list);
++ 		spin_unlock_irq(&dbe_lock);
++ 	}
+++
+++	/* Get rid of the fixup trampoline if we're running the module
+++	 * from physically mapped address space */
+++	if (me->arch.phys_plt_offset == 0) {
+++		__module_free(me->arch.phys_plt_tbl);
+++		me->arch.phys_plt_tbl = NULL;
+++	}
+++	if (me->arch.virt_plt_offset == 0) {
+++		__module_free(me->arch.virt_plt_tbl);
+++		me->arch.virt_plt_tbl = NULL;
+++	}
+++
++ 	return 0;
++ }
++ 
+++void module_arch_freeing_init(struct module *mod)
+++{
+++	if (mod->state == MODULE_STATE_LIVE)
+++		return;
+++
+++	if (mod->arch.phys_plt_tbl) {
+++		__module_free(mod->arch.phys_plt_tbl);
+++		mod->arch.phys_plt_tbl = NULL;
+++	}
+++	if (mod->arch.virt_plt_tbl) {
+++		__module_free(mod->arch.virt_plt_tbl);
+++		mod->arch.virt_plt_tbl = NULL;
+++	}
+++}
+++
++ void module_arch_cleanup(struct module *mod)
++ {
++ 	spin_lock_irq(&dbe_lock);
+diff --git a/target/linux/generic/pending-5.4/307-mips_highmem_offset.patch b/target/linux/generic/pending-5.4/307-mips_highmem_offset.patch
+new file mode 100644
+index 0000000000..9dd2fa9863
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/307-mips_highmem_offset.patch
+@@ -0,0 +1,19 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: kernel: adjust mips highmem offset to avoid the need for -mlong-calls on systems with >256M RAM
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ arch/mips/include/asm/mach-generic/spaces.h | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/arch/mips/include/asm/mach-generic/spaces.h
+++++ b/arch/mips/include/asm/mach-generic/spaces.h
++@@ -50,7 +50,7 @@
++  * Memory above this physical address will be considered highmem.
++  */
++ #ifndef HIGHMEM_START
++-#define HIGHMEM_START		_AC(0x20000000, UL)
+++#define HIGHMEM_START		_AC(0x10000000, UL)
++ #endif
++ 
++ #endif /* CONFIG_32BIT */
+diff --git a/target/linux/generic/pending-5.4/308-mips32r2_tune.patch b/target/linux/generic/pending-5.4/308-mips32r2_tune.patch
+new file mode 100644
+index 0000000000..8636511464
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/308-mips32r2_tune.patch
+@@ -0,0 +1,22 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: kernel: add -mtune=34kc to MIPS CFLAGS when building for mips32r2
++
++This provides a good tradeoff across at least 24Kc-74Kc, while also
++producing smaller code.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ arch/mips/Makefile | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/arch/mips/Makefile
+++++ b/arch/mips/Makefile
++@@ -177,7 +177,7 @@ cflags-$(CONFIG_CPU_VR41XX)	+= -march=r4
++ cflags-$(CONFIG_CPU_R4X00)	+= -march=r4600 -Wa,--trap
++ cflags-$(CONFIG_CPU_TX49XX)	+= -march=r4600 -Wa,--trap
++ cflags-$(CONFIG_CPU_MIPS32_R1)	+= -march=mips32 -Wa,--trap
++-cflags-$(CONFIG_CPU_MIPS32_R2)	+= -march=mips32r2 -Wa,--trap
+++cflags-$(CONFIG_CPU_MIPS32_R2)	+= -march=mips32r2 -mtune=34kc -Wa,--trap
++ cflags-$(CONFIG_CPU_MIPS32_R6)	+= -march=mips32r6 -Wa,--trap -modd-spreg
++ cflags-$(CONFIG_CPU_MIPS64_R1)	+= -march=mips64 -Wa,--trap
++ cflags-$(CONFIG_CPU_MIPS64_R2)	+= -march=mips64r2 -Wa,--trap
+diff --git a/target/linux/generic/pending-5.4/309-MIPS-Add-CPU-option-reporting-to-proc-cpuinfo.patch b/target/linux/generic/pending-5.4/309-MIPS-Add-CPU-option-reporting-to-proc-cpuinfo.patch
+new file mode 100644
+index 0000000000..e4075a24bd
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/309-MIPS-Add-CPU-option-reporting-to-proc-cpuinfo.patch
+@@ -0,0 +1,142 @@
++From 87ec87c2ad615c1a177cd08ef5fa29fc739f6e50 Mon Sep 17 00:00:00 2001
++From: Hauke Mehrtens <hauke@hauke-m.de>
++Date: Sun, 23 Dec 2018 18:06:53 +0100
++Subject: [PATCH] MIPS: Add CPU option reporting to /proc/cpuinfo
++
++Many MIPS CPUs have optional CPU features which are not activates for
++all CPU cores. Print the CPU options which are implemented in the core
++in /proc/cpuinfo. This makes it possible to see what features are
++supported and which are not supported. This should cover all standard
++MIPS extensions, before it only printed information about the main MIPS
++ASEs.
++
++Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
++---
++ arch/mips/kernel/proc.c | 116 ++++++++++++++++++++++++++++++++++++++++
++ 1 file changed, 116 insertions(+)
++
++--- a/arch/mips/kernel/proc.c
+++++ b/arch/mips/kernel/proc.c
++@@ -134,6 +134,122 @@ static int show_cpuinfo(struct seq_file
++ 		seq_printf(m, "micromips kernel\t: %s\n",
++ 		      (read_c0_config3() & MIPS_CONF3_ISA_OE) ?  "yes" : "no");
++ 	}
+++
+++	seq_printf(m, "Options implemented\t:");
+++	if (cpu_has_tlb)
+++		seq_printf(m, "%s", " tlb");
+++	if (cpu_has_ftlb)
+++		seq_printf(m, "%s", " ftlb");
+++	if (cpu_has_tlbinv)
+++		seq_printf(m, "%s", " tlbinv");
+++	if (cpu_has_segments)
+++		seq_printf(m, "%s", " segments");
+++	if (cpu_has_rixiex)
+++		seq_printf(m, "%s", " rixiex");
+++	if (cpu_has_ldpte)
+++		seq_printf(m, "%s", " ldpte");
+++	if (cpu_has_maar)
+++		seq_printf(m, "%s", " maar");
+++	if (cpu_has_rw_llb)
+++		seq_printf(m, "%s", " rw_llb");
+++	if (cpu_has_4kex)
+++		seq_printf(m, "%s", " 4kex");
+++	if (cpu_has_3k_cache)
+++		seq_printf(m, "%s", " 3k_cache");
+++	if (cpu_has_4k_cache)
+++		seq_printf(m, "%s", " 4k_cache");
+++	if (cpu_has_6k_cache)
+++		seq_printf(m, "%s", " 6k_cache");
+++	if (cpu_has_8k_cache)
+++		seq_printf(m, "%s", " 8k_cache");
+++	if (cpu_has_tx39_cache)
+++		seq_printf(m, "%s", " tx39_cache");
+++	if (cpu_has_octeon_cache)
+++		seq_printf(m, "%s", " octeon_cache");
+++	if (cpu_has_fpu)
+++		seq_printf(m, "%s", " fpu");
+++	if (cpu_has_32fpr)
+++		seq_printf(m, "%s", " 32fpr");
+++	if (cpu_has_cache_cdex_p)
+++		seq_printf(m, "%s", " cache_cdex_p");
+++	if (cpu_has_cache_cdex_s)
+++		seq_printf(m, "%s", " cache_cdex_s");
+++	if (cpu_has_prefetch)
+++		seq_printf(m, "%s", " prefetch");
+++	if (cpu_has_mcheck)
+++		seq_printf(m, "%s", " mcheck");
+++	if (cpu_has_ejtag)
+++		seq_printf(m, "%s", " ejtag");
+++	if (cpu_has_llsc)
+++		seq_printf(m, "%s", " llsc");
+++	if (cpu_has_bp_ghist)
+++		seq_printf(m, "%s", " bp_ghist");
+++	if (cpu_has_guestctl0ext)
+++		seq_printf(m, "%s", " guestctl0ext");
+++	if (cpu_has_guestctl1)
+++		seq_printf(m, "%s", " guestctl1");
+++	if (cpu_has_guestctl2)
+++		seq_printf(m, "%s", " guestctl2");
+++	if (cpu_has_guestid)
+++		seq_printf(m, "%s", " guestid");
+++	if (cpu_has_drg)
+++		seq_printf(m, "%s", " drg");
+++	if (cpu_has_rixi)
+++		seq_printf(m, "%s", " rixi");
+++	if (cpu_has_lpa)
+++		seq_printf(m, "%s", " lpa");
+++	if (cpu_has_mvh)
+++		seq_printf(m, "%s", " mvh");
+++	if (cpu_has_vtag_icache)
+++		seq_printf(m, "%s", " vtag_icache");
+++	if (cpu_has_dc_aliases)
+++		seq_printf(m, "%s", " dc_aliases");
+++	if (cpu_has_ic_fills_f_dc)
+++		seq_printf(m, "%s", " ic_fills_f_dc");
+++	if (cpu_has_pindexed_dcache)
+++		seq_printf(m, "%s", " pindexed_dcache");
+++	if (cpu_has_userlocal)
+++		seq_printf(m, "%s", " userlocal");
+++	if (cpu_has_nofpuex)
+++		seq_printf(m, "%s", " nofpuex");
+++	if (cpu_has_vint)
+++		seq_printf(m, "%s", " vint");
+++	if (cpu_has_veic)
+++		seq_printf(m, "%s", " veic");
+++	if (cpu_has_inclusive_pcaches)
+++		seq_printf(m, "%s", " inclusive_pcaches");
+++	if (cpu_has_perf_cntr_intr_bit)
+++		seq_printf(m, "%s", " perf_cntr_intr_bit");
+++	if (cpu_has_ufr)
+++		seq_printf(m, "%s", " ufr");
+++	if (cpu_has_fre)
+++		seq_printf(m, "%s", " fre");
+++	if (cpu_has_cdmm)
+++		seq_printf(m, "%s", " cdmm");
+++	if (cpu_has_small_pages)
+++		seq_printf(m, "%s", " small_pages");
+++	if (cpu_has_nan_legacy)
+++		seq_printf(m, "%s", " nan_legacy");
+++	if (cpu_has_nan_2008)
+++		seq_printf(m, "%s", " nan_2008");
+++	if (cpu_has_ebase_wg)
+++		seq_printf(m, "%s", " ebase_wg");
+++	if (cpu_has_badinstr)
+++		seq_printf(m, "%s", " badinstr");
+++	if (cpu_has_badinstrp)
+++		seq_printf(m, "%s", " badinstrp");
+++	if (cpu_has_contextconfig)
+++		seq_printf(m, "%s", " contextconfig");
+++	if (cpu_has_perf)
+++		seq_printf(m, "%s", " perf");
+++	if (cpu_has_shared_ftlb_ram)
+++		seq_printf(m, "%s", " shared_ftlb_ram");
+++	if (cpu_has_shared_ftlb_entries)
+++		seq_printf(m, "%s", " shared_ftlb_entries");
+++	if (cpu_has_mipsmt_pertccounters)
+++		seq_printf(m, "%s", " mipsmt_pertccounters");
+++	seq_printf(m, "\n");
+++
++ 	seq_printf(m, "shadow register sets\t: %d\n",
++ 		      cpu_data[n].srsets);
++ 	seq_printf(m, "kscratch registers\t: %d\n",
+diff --git a/target/linux/generic/pending-5.4/310-arm_module_unresolved_weak_sym.patch b/target/linux/generic/pending-5.4/310-arm_module_unresolved_weak_sym.patch
+new file mode 100644
+index 0000000000..24807f78d3
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/310-arm_module_unresolved_weak_sym.patch
+@@ -0,0 +1,22 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: fix errors in unresolved weak symbols on arm
++
++lede-commit: 570699d4838a907c3ef9f2819bf19eb72997b32f
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ arch/arm/kernel/module.c | 4 ++++
++ 1 file changed, 4 insertions(+)
++
++--- a/arch/arm/kernel/module.c
+++++ b/arch/arm/kernel/module.c
++@@ -99,6 +99,10 @@ apply_relocate(Elf32_Shdr *sechdrs, cons
++ 			return -ENOEXEC;
++ 		}
++ 
+++		if ((IS_ERR_VALUE(sym->st_value) || !sym->st_value) &&
+++		    ELF_ST_BIND(sym->st_info) == STB_WEAK)
+++			continue;
+++
++ 		loc = dstsec->sh_addr + rel->r_offset;
++ 
++ 		switch (ELF32_R_TYPE(rel->r_info)) {
+diff --git a/target/linux/generic/pending-5.4/311-MIPS-zboot-put-appended-dtb-into-a-section.patch b/target/linux/generic/pending-5.4/311-MIPS-zboot-put-appended-dtb-into-a-section.patch
+new file mode 100644
+index 0000000000..3f8808f702
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/311-MIPS-zboot-put-appended-dtb-into-a-section.patch
+@@ -0,0 +1,36 @@
++From 7d1531c81c0fb4c93bea8dc316043ad0e4d0c270 Mon Sep 17 00:00:00 2001
++From: Chuanhong Guo <gch981213@gmail.com>
++Date: Sun, 25 Oct 2020 23:19:40 +0800
++Subject: [PATCH] MIPS: zboot: put appended dtb into a section
++
++This will make a separated section for dtb appear in ELF, and we can
++then use objcopy to patch a dtb into vmlinuz when RAW_APPENDED_DTB
++is set in kernel config.
++
++command to patch a dtb:
++objcopy --set-section-flags=.appended_dtb=alloc,contents \
++        --update-section=.appended_dtb=<target>.dtb vmlinuz vmlinuz-dtb
++
++Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
++---
++ arch/mips/boot/compressed/ld.script | 9 ++++++---
++ 1 file changed, 6 insertions(+), 3 deletions(-)
++
++--- a/arch/mips/boot/compressed/ld.script
+++++ b/arch/mips/boot/compressed/ld.script
++@@ -31,9 +31,12 @@ SECTIONS
++ 		CONSTRUCTORS
++ 		. = ALIGN(16);
++ 	}
++-	__appended_dtb = .;
++-	/* leave space for appended DTB */
++-	. += 0x100000;
+++
+++	.appended_dtb : {
+++		__appended_dtb = .;
+++		/* leave space for appended DTB */
+++		. += 0x100000;
+++	}
++ 
++ 	_edata = .;
++ 	/* End of data section */
+diff --git a/target/linux/generic/pending-5.4/330-MIPS-kexec-Accept-command-line-parameters-from-users.patch b/target/linux/generic/pending-5.4/330-MIPS-kexec-Accept-command-line-parameters-from-users.patch
+new file mode 100644
+index 0000000000..2808c95322
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/330-MIPS-kexec-Accept-command-line-parameters-from-users.patch
+@@ -0,0 +1,281 @@
++From: Yousong Zhou <yszhou4tech@gmail.com>
++Subject: MIPS: kexec: Accept command line parameters from userspace.
++
++Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com>
++---
++ arch/mips/kernel/machine_kexec.c   |  153 +++++++++++++++++++++++++++++++-----
++ arch/mips/kernel/machine_kexec.h   |   20 +++++
++ arch/mips/kernel/relocate_kernel.S |   21 +++--
++ 3 files changed, 167 insertions(+), 27 deletions(-)
++ create mode 100644 arch/mips/kernel/machine_kexec.h
++
++--- a/arch/mips/kernel/machine_kexec.c
+++++ b/arch/mips/kernel/machine_kexec.c
++@@ -9,14 +9,11 @@
++ #include <linux/delay.h>
++ #include <linux/libfdt.h>
++ 
+++#include <asm/bootinfo.h>
++ #include <asm/cacheflush.h>
++ #include <asm/page.h>
++-
++-extern const unsigned char relocate_new_kernel[];
++-extern const size_t relocate_new_kernel_size;
++-
++-extern unsigned long kexec_start_address;
++-extern unsigned long kexec_indirection_page;
+++#include <linux/uaccess.h>
+++#include "machine_kexec.h"
++ 
++ static unsigned long reboot_code_buffer;
++ 
++@@ -30,6 +27,101 @@ void (*_crash_smp_send_stop)(void) = NUL
++ void (*_machine_kexec_shutdown)(void) = NULL;
++ void (*_machine_crash_shutdown)(struct pt_regs *regs) = NULL;
++ 
+++static void machine_kexec_print_args(void)
+++{
+++	unsigned long argc = (int)kexec_args[0];
+++	int i;
+++
+++	pr_info("kexec_args[0] (argc): %lu\n", argc);
+++	pr_info("kexec_args[1] (argv): %p\n", (void *)kexec_args[1]);
+++	pr_info("kexec_args[2] (env ): %p\n", (void *)kexec_args[2]);
+++	pr_info("kexec_args[3] (desc): %p\n", (void *)kexec_args[3]);
+++
+++	for (i = 0; i < argc; i++) {
+++		pr_info("kexec_argv[%d] = %p, %s\n",
+++				i, kexec_argv[i], kexec_argv[i]);
+++	}
+++}
+++
+++static void machine_kexec_init_argv(struct kimage *image)
+++{
+++	void __user *buf = NULL;
+++	size_t bufsz;
+++	size_t size;
+++	int i;
+++
+++	bufsz = 0;
+++	for (i = 0; i < image->nr_segments; i++) {
+++		struct kexec_segment *seg;
+++
+++		seg = &image->segment[i];
+++		if (seg->bufsz < 6)
+++			continue;
+++
+++		if (strncmp((char *) seg->buf, "kexec ", 6))
+++			continue;
+++
+++		buf = seg->buf;
+++		bufsz = seg->bufsz;
+++		break;
+++	}
+++
+++	if (!buf)
+++		return;
+++
+++	size = KEXEC_COMMAND_LINE_SIZE;
+++	size = min(size, bufsz);
+++	if (size < bufsz)
+++		pr_warn("kexec command line truncated to %zd bytes\n", size);
+++
+++	/* Copy to kernel space */
+++	if (copy_from_user(kexec_argv_buf, buf, size))
+++		pr_warn("kexec command line copy to kernel space failed\n");
+++
+++	kexec_argv_buf[size - 1] = 0;
+++}
+++
+++static void machine_kexec_parse_argv(struct kimage *image)
+++{
+++	char *reboot_code_buffer;
+++	int reloc_delta;
+++	char *ptr;
+++	int argc;
+++	int i;
+++
+++	ptr = kexec_argv_buf;
+++	argc = 0;
+++
+++	/*
+++	 * convert command line string to array of parameters
+++	 * (as bootloader does).
+++	 */
+++	while (ptr && *ptr && (KEXEC_MAX_ARGC > argc)) {
+++		if (*ptr == ' ') {
+++			*ptr++ = '\0';
+++			continue;
+++		}
+++
+++		kexec_argv[argc++] = ptr;
+++		ptr = strchr(ptr, ' ');
+++	}
+++
+++	if (!argc)
+++		return;
+++
+++	kexec_args[0] = argc;
+++	kexec_args[1] = (unsigned long)kexec_argv;
+++	kexec_args[2] = 0;
+++	kexec_args[3] = 0;
+++
+++	reboot_code_buffer = page_address(image->control_code_page);
+++	reloc_delta = reboot_code_buffer - (char *)kexec_relocate_new_kernel;
+++
+++	kexec_args[1] += reloc_delta;
+++	for (i = 0; i < argc; i++)
+++		kexec_argv[i] += reloc_delta;
+++}
+++
++ static void kexec_image_info(const struct kimage *kimage)
++ {
++ 	unsigned long i;
++@@ -99,6 +191,18 @@ machine_kexec_prepare(struct kimage *kim
++ #endif
++ 
++ 	kexec_image_info(kimage);
+++	/*
+++	 * Whenever arguments passed from kexec-tools, Init the arguments as
+++	 * the original ones to try avoiding booting failure.
+++	 */
+++
+++	kexec_args[0] = fw_arg0;
+++	kexec_args[1] = fw_arg1;
+++	kexec_args[2] = fw_arg2;
+++	kexec_args[3] = fw_arg3;
+++
+++	machine_kexec_init_argv(kimage);
+++	machine_kexec_parse_argv(kimage);
++ 
++ 	if (_machine_kexec_prepare)
++ 		return _machine_kexec_prepare(kimage);
++@@ -161,7 +265,7 @@ machine_crash_shutdown(struct pt_regs *r
++ void kexec_nonboot_cpu_jump(void)
++ {
++ 	local_flush_icache_range((unsigned long)relocated_kexec_smp_wait,
++-				 reboot_code_buffer + relocate_new_kernel_size);
+++				 reboot_code_buffer + KEXEC_RELOCATE_NEW_KERNEL_SIZE);
++ 
++ 	relocated_kexec_smp_wait(NULL);
++ }
++@@ -199,7 +303,7 @@ void kexec_reboot(void)
++ 	 * machine_kexec() CPU.
++ 	 */
++ 	local_flush_icache_range(reboot_code_buffer,
++-				 reboot_code_buffer + relocate_new_kernel_size);
+++				 reboot_code_buffer + KEXEC_RELOCATE_NEW_KERNEL_SIZE);
++ 
++ 	do_kexec = (void *)reboot_code_buffer;
++ 	do_kexec();
++@@ -212,10 +316,12 @@ machine_kexec(struct kimage *image)
++ 	unsigned long *ptr;
++ 
++ 	reboot_code_buffer =
++-	  (unsigned long)page_address(image->control_code_page);
+++		(unsigned long)page_address(image->control_code_page);
+++	pr_info("reboot_code_buffer = %p\n", (void *)reboot_code_buffer);
++ 
++ 	kexec_start_address =
++ 		(unsigned long) phys_to_virt(image->start);
+++	pr_info("kexec_start_address = %p\n", (void *)kexec_start_address);
++ 
++ 	if (image->type == KEXEC_TYPE_DEFAULT) {
++ 		kexec_indirection_page =
++@@ -223,9 +329,19 @@ machine_kexec(struct kimage *image)
++ 	} else {
++ 		kexec_indirection_page = (unsigned long)&image->head;
++ 	}
+++	pr_info("kexec_indirection_page = %p\n", (void *)kexec_indirection_page);
++ 
++-	memcpy((void*)reboot_code_buffer, relocate_new_kernel,
++-	       relocate_new_kernel_size);
+++	pr_info("Where is memcpy: %p\n", memcpy);
+++	pr_info("kexec_relocate_new_kernel = %p, kexec_relocate_new_kernel_end = %p\n",
+++		(void *)kexec_relocate_new_kernel, &kexec_relocate_new_kernel_end);
+++	pr_info("Copy %lu bytes from %p to %p\n", KEXEC_RELOCATE_NEW_KERNEL_SIZE,
+++		(void *)kexec_relocate_new_kernel, (void *)reboot_code_buffer);
+++	memcpy((void*)reboot_code_buffer, kexec_relocate_new_kernel,
+++	       KEXEC_RELOCATE_NEW_KERNEL_SIZE);
+++
+++	pr_info("Before _print_args().\n");
+++	machine_kexec_print_args();
+++	pr_info("Before eval loop.\n");
++ 
++ 	/*
++ 	 * The generic kexec code builds a page list with physical
++@@ -256,7 +372,7 @@ machine_kexec(struct kimage *image)
++ #ifdef CONFIG_SMP
++ 	/* All secondary cpus now may jump to kexec_wait cycle */
++ 	relocated_kexec_smp_wait = reboot_code_buffer +
++-		(void *)(kexec_smp_wait - relocate_new_kernel);
+++		(void *)(kexec_smp_wait - kexec_relocate_new_kernel);
++ 	smp_wmb();
++ 	atomic_set(&kexec_ready_to_reboot, 1);
++ #endif
++--- /dev/null
+++++ b/arch/mips/kernel/machine_kexec.h
++@@ -0,0 +1,20 @@
+++#ifndef _MACHINE_KEXEC_H
+++#define _MACHINE_KEXEC_H
+++
+++#ifndef __ASSEMBLY__
+++extern const unsigned char kexec_relocate_new_kernel[];
+++extern unsigned long kexec_relocate_new_kernel_end;
+++extern unsigned long kexec_start_address;
+++extern unsigned long kexec_indirection_page;
+++
+++extern char kexec_argv_buf[];
+++extern char *kexec_argv[];
+++
+++#define KEXEC_RELOCATE_NEW_KERNEL_SIZE	((unsigned long)&kexec_relocate_new_kernel_end - (unsigned long)kexec_relocate_new_kernel)
+++#endif /* !__ASSEMBLY__ */
+++
+++#define KEXEC_COMMAND_LINE_SIZE		256
+++#define KEXEC_ARGV_SIZE			(KEXEC_COMMAND_LINE_SIZE / 16)
+++#define KEXEC_MAX_ARGC			(KEXEC_ARGV_SIZE / sizeof(long))
+++
+++#endif
++--- a/arch/mips/kernel/relocate_kernel.S
+++++ b/arch/mips/kernel/relocate_kernel.S
++@@ -10,8 +10,9 @@
++ #include <asm/mipsregs.h>
++ #include <asm/stackframe.h>
++ #include <asm/addrspace.h>
+++#include "machine_kexec.h"
++ 
++-LEAF(relocate_new_kernel)
+++LEAF(kexec_relocate_new_kernel)
++ 	PTR_L a0,	arg0
++ 	PTR_L a1,	arg1
++ 	PTR_L a2,	arg2
++@@ -96,7 +97,7 @@ done:
++ #endif
++ 	/* jump to kexec_start_address */
++ 	j		s1
++-	END(relocate_new_kernel)
+++	END(kexec_relocate_new_kernel)
++ 
++ #ifdef CONFIG_SMP
++ /*
++@@ -182,9 +183,15 @@ kexec_indirection_page:
++ 	PTR		0
++ 	.size		kexec_indirection_page, PTRSIZE
++ 
++-relocate_new_kernel_end:
+++kexec_argv_buf:
+++	EXPORT(kexec_argv_buf)
+++	.skip		KEXEC_COMMAND_LINE_SIZE
+++	.size		kexec_argv_buf, KEXEC_COMMAND_LINE_SIZE
+++
+++kexec_argv:
+++	EXPORT(kexec_argv)
+++	.skip		KEXEC_ARGV_SIZE
+++	.size		kexec_argv, KEXEC_ARGV_SIZE
++ 
++-relocate_new_kernel_size:
++-	EXPORT(relocate_new_kernel_size)
++-	PTR		relocate_new_kernel_end - relocate_new_kernel
++-	.size		relocate_new_kernel_size, PTRSIZE
+++kexec_relocate_new_kernel_end:
+++	EXPORT(kexec_relocate_new_kernel_end)
+diff --git a/target/linux/generic/pending-5.4/332-arc-add-OWRTDTB-section.patch b/target/linux/generic/pending-5.4/332-arc-add-OWRTDTB-section.patch
+new file mode 100644
+index 0000000000..4b0534eff7
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/332-arc-add-OWRTDTB-section.patch
+@@ -0,0 +1,84 @@
++From bb0c3b0175240bf152fd7c644821a0cf9f77c37c Mon Sep 17 00:00:00 2001
++From: Evgeniy Didin <Evgeniy.Didin@synopsys.com>
++Date: Fri, 15 Mar 2019 18:53:38 +0300
++Subject: [PATCH] arc add OWRTDTB section
++
++This change allows OpenWRT to patch resulting kernel binary with
++external .dtb.
++
++That allows us to re-use exactky the same vmlinux on different boards
++given its ARC core configurations match (at least cache line sizes etc).
++
++""patch-dtb" searches for ASCII "OWRTDTB:" strign and copies external
++.dtb right after it, keeping the string in place.
++
++Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
++Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
++Signed-off-by: Evgeniy Didin <Evgeniy.Didin@synopsys.com>
++---
++ arch/arc/kernel/head.S        | 10 ++++++++++
++ arch/arc/kernel/setup.c       |  4 +++-
++ arch/arc/kernel/vmlinux.lds.S | 13 +++++++++++++
++ 3 files changed, 26 insertions(+), 1 deletion(-)
++
++--- a/arch/arc/kernel/head.S
+++++ b/arch/arc/kernel/head.S
++@@ -61,6 +61,16 @@
++ #endif
++ .endm
++ 
+++	; Here "patch-dtb" will embed external .dtb
+++	; Note "patch-dtb" searches for ASCII "OWRTDTB:" string
+++	; and pastes .dtb right after it, hense the string precedes
+++	; __image_dtb symbol.
+++	.section .owrt, "aw",@progbits
+++	.ascii  "OWRTDTB:"
+++ENTRY(__image_dtb)
+++	.fill   0x4000
+++END(__image_dtb)
+++
++ 	.section .init.text, "ax",@progbits
++ 
++ ;----------------------------------------------------------------
++--- a/arch/arc/kernel/setup.c
+++++ b/arch/arc/kernel/setup.c
++@@ -492,6 +492,8 @@ static inline bool uboot_arg_invalid(uns
++ /* We always pass 0 as magic from U-boot */
++ #define UBOOT_MAGIC_VALUE	0
++ 
+++extern struct boot_param_header __image_dtb;
+++
++ void __init handle_uboot_args(void)
++ {
++ 	bool use_embedded_dtb = true;
++@@ -530,7 +532,7 @@ void __init handle_uboot_args(void)
++ ignore_uboot_args:
++ 
++ 	if (use_embedded_dtb) {
++-		machine_desc = setup_machine_fdt(__dtb_start);
+++		machine_desc = setup_machine_fdt(&__image_dtb);
++ 		if (!machine_desc)
++ 			panic("Embedded DT invalid\n");
++ 	}
++--- a/arch/arc/kernel/vmlinux.lds.S
+++++ b/arch/arc/kernel/vmlinux.lds.S
++@@ -27,6 +27,19 @@ SECTIONS
++ 
++ 	. = CONFIG_LINUX_LINK_BASE;
++ 
+++	/*
+++	* In OpenWRT we want to patch built binary embedding .dtb of choice.
+++	* This is implemented with "patch-dtb" utility which searches for
+++	* "OWRTDTB:" string in first 16k of image and if it is found
+++	* copies .dtb right after mentioned string.
+++	*
+++	* Note: "OWRTDTB:" won't be overwritten with .dtb, .dtb will follow it.
+++	*/
+++ 	.owrt : {
+++		*(.owrt)
+++	. = ALIGN(PAGE_SIZE);
+++	}
+++
++ 	_int_vec_base_lds = .;
++ 	.vector : {
++ 		*(.vector)
+diff --git a/target/linux/generic/pending-5.4/333-arc-enable-unaligned-access-in-kernel-mode.patch b/target/linux/generic/pending-5.4/333-arc-enable-unaligned-access-in-kernel-mode.patch
+new file mode 100644
+index 0000000000..1848a84cc4
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/333-arc-enable-unaligned-access-in-kernel-mode.patch
+@@ -0,0 +1,24 @@
++From: Alexey Brodkin <abrodkin@synopsys.com>
++Subject: arc: enable unaligned access in kernel mode
++
++This enables misaligned access handling even in kernel mode.
++Some wireless drivers (ath9k-htc and mt7601u) use misaligned accesses
++here and there and to cope with that without fixing stuff in the drivers
++we're just gracefully handling it on ARC.
++
++Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
++---
++ arch/arc/kernel/unaligned.c | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/arch/arc/kernel/unaligned.c
+++++ b/arch/arc/kernel/unaligned.c
++@@ -202,7 +202,7 @@ int misaligned_fixup(unsigned long addre
++ 	char buf[TASK_COMM_LEN];
++ 
++ 	/* handle user mode only and only if enabled by sysadmin */
++-	if (!user_mode(regs) || !unaligned_enabled)
+++	if (!unaligned_enabled)
++ 		return 1;
++ 
++ 	if (no_unaligned_warning) {
+diff --git a/target/linux/generic/pending-5.4/342-powerpc-Enable-kernel-XZ-compression-option-on-PPC_8.patch b/target/linux/generic/pending-5.4/342-powerpc-Enable-kernel-XZ-compression-option-on-PPC_8.patch
+new file mode 100644
+index 0000000000..8d4c74219f
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/342-powerpc-Enable-kernel-XZ-compression-option-on-PPC_8.patch
+@@ -0,0 +1,25 @@
++From 66770a004afe10df11d3902e16eaa0c2c39436bb Mon Sep 17 00:00:00 2001
++From: Pawel Dembicki <paweldembicki@gmail.com>
++Date: Fri, 24 May 2019 17:56:19 +0200
++Subject: [PATCH] powerpc: Enable kernel XZ compression option on PPC_85xx
++
++Enable kernel XZ compression option on PPC_85xx. Tested with
++simpleImage on TP-Link TL-WDR4900 (Freescale P1014 processor).
++
++Suggested-by: Christian Lamparter <chunkeey@gmail.com>
++Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
++---
++ arch/powerpc/Kconfig | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/arch/powerpc/Kconfig
+++++ b/arch/powerpc/Kconfig
++@@ -205,7 +205,7 @@ config PPC
++ 	select HAVE_KERNEL_GZIP
++ 	select HAVE_KERNEL_LZMA			if DEFAULT_UIMAGE
++ 	select HAVE_KERNEL_LZO			if DEFAULT_UIMAGE
++-	select HAVE_KERNEL_XZ			if PPC_BOOK3S || 44x
+++	select HAVE_KERNEL_XZ			if PPC_BOOK3S || 44x || PPC_85xx
++ 	select HAVE_KPROBES
++ 	select HAVE_KPROBES_ON_FTRACE
++ 	select HAVE_KRETPROBES
+diff --git a/target/linux/generic/pending-5.4/400-mtd-add-rootfs-split-support.patch b/target/linux/generic/pending-5.4/400-mtd-add-rootfs-split-support.patch
+new file mode 100644
+index 0000000000..83a4ed39a3
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/400-mtd-add-rootfs-split-support.patch
+@@ -0,0 +1,107 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: make rootfs split/detection more generic - patch can be moved to generic-2.6 after testing on other platforms
++
++lede-commit: 328e660b31f0937d52c5ae3d6e7029409918a9df
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ drivers/mtd/Kconfig            | 17 +++++++++++++++++
++ drivers/mtd/mtdpart.c          | 35 +++++++++++++++++++++++++++++++++++
++ include/linux/mtd/partitions.h |  2 ++
++ 3 files changed, 54 insertions(+)
++
++--- a/drivers/mtd/Kconfig
+++++ b/drivers/mtd/Kconfig
++@@ -12,6 +12,23 @@ menuconfig MTD
++ 
++ if MTD
++ 
+++menu "OpenWrt specific MTD options"
+++
+++config MTD_ROOTFS_ROOT_DEV
+++	bool "Automatically set 'rootfs' partition to be root filesystem"
+++	default y
+++
+++config MTD_SPLIT_FIRMWARE
+++	bool "Automatically split firmware partition for kernel+rootfs"
+++	default y
+++
+++config MTD_SPLIT_FIRMWARE_NAME
+++	string "Firmware partition name"
+++	depends on MTD_SPLIT_FIRMWARE
+++	default "firmware"
+++
+++endmenu
+++
++ config MTD_TESTS
++ 	tristate "MTD tests support (DANGEROUS)"
++ 	depends on m
++--- a/drivers/mtd/mtdpart.c
+++++ b/drivers/mtd/mtdpart.c
++@@ -15,10 +15,12 @@
++ #include <linux/kmod.h>
++ #include <linux/mtd/mtd.h>
++ #include <linux/mtd/partitions.h>
+++#include <linux/magic.h>
++ #include <linux/err.h>
++ #include <linux/of.h>
++ 
++ #include "mtdcore.h"
+++#include "mtdsplit/mtdsplit.h"
++ 
++ /* Our partition linked list */
++ static LIST_HEAD(mtd_partitions);
++@@ -38,6 +40,8 @@ struct mtd_part {
++ 	struct list_head list;
++ };
++ 
+++static void mtd_partition_split(struct mtd_info *master, struct mtd_part *part);
+++
++ /*
++  * Given a pointer to the MTD object in the mtd_part structure, we can retrieve
++  * the pointer to that structure.
++@@ -612,6 +616,7 @@ int mtd_add_partition(struct mtd_info *p
++ 	if (ret)
++ 		goto err_remove_part;
++ 
+++	mtd_partition_split(parent, new);
++ 	mtd_add_partition_attrs(new);
++ 
++ 	return 0;
++@@ -698,6 +703,29 @@ int mtd_del_partition(struct mtd_info *m
++ }
++ EXPORT_SYMBOL_GPL(mtd_del_partition);
++ 
+++#ifdef CONFIG_MTD_SPLIT_FIRMWARE_NAME
+++#define SPLIT_FIRMWARE_NAME	CONFIG_MTD_SPLIT_FIRMWARE_NAME
+++#else
+++#define SPLIT_FIRMWARE_NAME	"unused"
+++#endif
+++
+++static void split_firmware(struct mtd_info *master, struct mtd_part *part)
+++{
+++}
+++
+++static void mtd_partition_split(struct mtd_info *master, struct mtd_part *part)
+++{
+++	static int rootfs_found = 0;
+++
+++	if (rootfs_found)
+++		return;
+++
+++	if (IS_ENABLED(CONFIG_MTD_SPLIT_FIRMWARE) &&
+++	    !strcmp(part->mtd.name, SPLIT_FIRMWARE_NAME) &&
+++	    !of_find_property(mtd_get_of_node(&part->mtd), "compatible", NULL))
+++		split_firmware(master, part);
+++}
+++
++ /*
++  * This function, given a master MTD object and a partition table, creates
++  * and registers slave MTD objects which are bound to the master according to
++@@ -738,6 +766,7 @@ int add_mtd_partitions(struct mtd_info *
++ 			goto err_del_partitions;
++ 		}
++ 
+++		mtd_partition_split(master, slave);
++ 		mtd_add_partition_attrs(slave);
++ 		/* Look for subpartitions */
++ 		parse_mtd_partitions(&slave->mtd, parts[i].types, NULL);
+diff --git a/target/linux/generic/pending-5.4/401-mtd-add-support-for-different-partition-parser-types.patch b/target/linux/generic/pending-5.4/401-mtd-add-support-for-different-partition-parser-types.patch
+new file mode 100644
+index 0000000000..f471c62376
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/401-mtd-add-support-for-different-partition-parser-types.patch
+@@ -0,0 +1,142 @@
++From: Gabor Juhos <juhosg@openwrt.org>
++Subject: mtd: add support for different partition parser types
++
++Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
++---
++ drivers/mtd/mtdpart.c          |   56 ++++++++++++++++++++++++++++++++++++++++
++ include/linux/mtd/partitions.h |   11 ++++++++
++ 2 files changed, 67 insertions(+)
++
++--- a/drivers/mtd/mtdpart.c
+++++ b/drivers/mtd/mtdpart.c
++@@ -41,6 +41,10 @@ struct mtd_part {
++ };
++ 
++ static void mtd_partition_split(struct mtd_info *master, struct mtd_part *part);
+++static int parse_mtd_partitions_by_type(struct mtd_info *master,
+++					enum mtd_parser_type type,
+++					const struct mtd_partition **pparts,
+++					struct mtd_part_parser_data *data);
++ 
++ /*
++  * Given a pointer to the MTD object in the mtd_part structure, we can retrieve
++@@ -703,6 +707,36 @@ int mtd_del_partition(struct mtd_info *m
++ }
++ EXPORT_SYMBOL_GPL(mtd_del_partition);
++ 
+++static int
+++run_parsers_by_type(struct mtd_part *slave, enum mtd_parser_type type)
+++{
+++	struct mtd_partition *parts;
+++	int nr_parts;
+++	int i;
+++
+++	nr_parts = parse_mtd_partitions_by_type(&slave->mtd, type, (const struct mtd_partition **)&parts,
+++						NULL);
+++	if (nr_parts <= 0)
+++		return nr_parts;
+++
+++	if (WARN_ON(!parts))
+++		return 0;
+++
+++	for (i = 0; i < nr_parts; i++) {
+++		/* adjust partition offsets */
+++		parts[i].offset += slave->offset;
+++
+++		mtd_add_partition(slave->parent,
+++				  parts[i].name,
+++				  parts[i].offset,
+++				  parts[i].size);
+++	}
+++
+++	kfree(parts);
+++
+++	return nr_parts;
+++}
+++
++ #ifdef CONFIG_MTD_SPLIT_FIRMWARE_NAME
++ #define SPLIT_FIRMWARE_NAME	CONFIG_MTD_SPLIT_FIRMWARE_NAME
++ #else
++@@ -1052,6 +1086,61 @@ void mtd_part_parser_cleanup(struct mtd_
++ 	}
++ }
++ 
+++static struct mtd_part_parser *
+++get_partition_parser_by_type(enum mtd_parser_type type,
+++			     struct mtd_part_parser *start)
+++{
+++	struct mtd_part_parser *p, *ret = NULL;
+++
+++	spin_lock(&part_parser_lock);
+++
+++	p = list_prepare_entry(start, &part_parsers, list);
+++	if (start)
+++		mtd_part_parser_put(start);
+++
+++	list_for_each_entry_continue(p, &part_parsers, list) {
+++		if (p->type == type && try_module_get(p->owner)) {
+++			ret = p;
+++			break;
+++		}
+++	}
+++
+++	spin_unlock(&part_parser_lock);
+++
+++	return ret;
+++}
+++
+++static int parse_mtd_partitions_by_type(struct mtd_info *master,
+++					enum mtd_parser_type type,
+++					const struct mtd_partition **pparts,
+++					struct mtd_part_parser_data *data)
+++{
+++	struct mtd_part_parser *prev = NULL;
+++	int ret = 0;
+++
+++	while (1) {
+++		struct mtd_part_parser *parser;
+++
+++		parser = get_partition_parser_by_type(type, prev);
+++		if (!parser)
+++			break;
+++
+++		ret = (*parser->parse_fn)(master, pparts, data);
+++
+++		if (ret > 0) {
+++			mtd_part_parser_put(parser);
+++			printk(KERN_NOTICE
+++			       "%d %s partitions found on MTD device %s\n",
+++			       ret, parser->name, master->name);
+++			break;
+++		}
+++
+++		prev = parser;
+++	}
+++
+++	return ret;
+++}
+++
++ int mtd_is_partition(const struct mtd_info *mtd)
++ {
++ 	struct mtd_part *part;
++--- a/include/linux/mtd/partitions.h
+++++ b/include/linux/mtd/partitions.h
++@@ -73,6 +73,10 @@ struct mtd_part_parser_data {
++  * Functions dealing with the various ways of partitioning the space
++  */
++ 
+++enum mtd_parser_type {
+++	MTD_PARSER_TYPE_DEVICE = 0,
+++};
+++
++ struct mtd_part_parser {
++ 	struct list_head list;
++ 	struct module *owner;
++@@ -81,6 +85,7 @@ struct mtd_part_parser {
++ 	int (*parse_fn)(struct mtd_info *, const struct mtd_partition **,
++ 			struct mtd_part_parser_data *);
++ 	void (*cleanup)(const struct mtd_partition *pparts, int nr_parts);
+++	enum mtd_parser_type type;
++ };
++ 
++ /* Container for passing around a set of parsed partitions */
+diff --git a/target/linux/generic/pending-5.4/402-mtd-use-typed-mtd-parsers-for-rootfs-and-firmware-split.patch b/target/linux/generic/pending-5.4/402-mtd-use-typed-mtd-parsers-for-rootfs-and-firmware-split.patch
+new file mode 100644
+index 0000000000..afe3ec7756
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/402-mtd-use-typed-mtd-parsers-for-rootfs-and-firmware-split.patch
+@@ -0,0 +1,44 @@
++From: Gabor Juhos <juhosg@openwrt.org>
++Subject: kernel/3.10: allow to use partition parsers for rootfs and firmware split
++
++lede-commit: 3b71cd94bc9517bc25267dccb393b07d4b54564e
++Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
++---
++ drivers/mtd/mtdpart.c          | 37 +++++++++++++++++++++++++++++++++++++
++ include/linux/mtd/partitions.h |  2 ++
++ 2 files changed, 39 insertions(+)
++
++--- a/drivers/mtd/mtdpart.c
+++++ b/drivers/mtd/mtdpart.c
++@@ -745,6 +745,7 @@ run_parsers_by_type(struct mtd_part *sla
++ 
++ static void split_firmware(struct mtd_info *master, struct mtd_part *part)
++ {
+++	run_parsers_by_type(part, MTD_PARSER_TYPE_FIRMWARE);
++ }
++ 
++ static void mtd_partition_split(struct mtd_info *master, struct mtd_part *part)
++@@ -754,6 +755,12 @@ static void mtd_partition_split(struct m
++ 	if (rootfs_found)
++ 		return;
++ 
+++	if (!strcmp(part->mtd.name, "rootfs")) {
+++		run_parsers_by_type(part, MTD_PARSER_TYPE_ROOTFS);
+++
+++		rootfs_found = 1;
+++	}
+++
++ 	if (IS_ENABLED(CONFIG_MTD_SPLIT_FIRMWARE) &&
++ 	    !strcmp(part->mtd.name, SPLIT_FIRMWARE_NAME) &&
++ 	    !of_find_property(mtd_get_of_node(&part->mtd), "compatible", NULL))
++--- a/include/linux/mtd/partitions.h
+++++ b/include/linux/mtd/partitions.h
++@@ -75,6 +75,8 @@ struct mtd_part_parser_data {
++ 
++ enum mtd_parser_type {
++ 	MTD_PARSER_TYPE_DEVICE = 0,
+++	MTD_PARSER_TYPE_ROOTFS,
+++	MTD_PARSER_TYPE_FIRMWARE,
++ };
++ 
++ struct mtd_part_parser {
+diff --git a/target/linux/generic/pending-5.4/403-mtd-hook-mtdsplit-to-Kbuild.patch b/target/linux/generic/pending-5.4/403-mtd-hook-mtdsplit-to-Kbuild.patch
+new file mode 100644
+index 0000000000..5d868fffa8
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/403-mtd-hook-mtdsplit-to-Kbuild.patch
+@@ -0,0 +1,32 @@
++From: Gabor Juhos <juhosg@openwrt.org>
++Subject: [PATCH] kernel/3.10: move squashfs check from rootfs split code into a separate file
++
++lede-commit: d89bea92b31b4e157a0fa438e75370f089f73427
++Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
++---
++ drivers/mtd/Kconfig  | 2 ++
++ drivers/mtd/Makefile | 2 ++
++ 2 files changed, 4 insertions(+)
++
++--- a/drivers/mtd/Kconfig
+++++ b/drivers/mtd/Kconfig
++@@ -27,6 +27,8 @@ config MTD_SPLIT_FIRMWARE_NAME
++ 	depends on MTD_SPLIT_FIRMWARE
++ 	default "firmware"
++ 
+++source "drivers/mtd/mtdsplit/Kconfig"
+++
++ endmenu
++ 
++ config MTD_TESTS
++--- a/drivers/mtd/Makefile
+++++ b/drivers/mtd/Makefile
++@@ -9,6 +9,8 @@ mtd-y				:= mtdcore.o mtdsuper.o mtdconc
++ 
++ obj-y				+= parsers/
++ 
+++obj-$(CONFIG_MTD_SPLIT)		+= mtdsplit/
+++
++ # 'Users' - code which presents functionality to userspace.
++ obj-$(CONFIG_MTD_BLKDEVS)	+= mtd_blkdevs.o
++ obj-$(CONFIG_MTD_BLOCK)		+= mtdblock.o
+diff --git a/target/linux/generic/pending-5.4/404-mtd-add-more-helper-functions.patch b/target/linux/generic/pending-5.4/404-mtd-add-more-helper-functions.patch
+new file mode 100644
+index 0000000000..059a440f0a
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/404-mtd-add-more-helper-functions.patch
+@@ -0,0 +1,76 @@
++From: Gabor Juhos <juhosg@openwrt.org>
++Subject: kernel/3.10: add separate rootfs partition parser
++
++lede-commit: daec7ad7688415156e2730e401503d09bd3acf91
++Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
++---
++ drivers/mtd/mtdpart.c          | 29 +++++++++++++++++++++++++++++
++ include/linux/mtd/mtd.h        | 18 ++++++++++++++++++
++ include/linux/mtd/partitions.h |  2 ++
++ 3 files changed, 49 insertions(+)
++
++--- a/drivers/mtd/mtdpart.c
+++++ b/drivers/mtd/mtdpart.c
++@@ -1165,6 +1165,24 @@ int mtd_is_partition(const struct mtd_in
++ }
++ EXPORT_SYMBOL_GPL(mtd_is_partition);
++ 
+++struct mtd_info *mtd_get_master(const struct mtd_info *mtd)
+++{
+++	if (!mtd_is_partition(mtd))
+++		return (struct mtd_info *)mtd;
+++
+++	return mtd_to_part(mtd)->parent;
+++}
+++EXPORT_SYMBOL_GPL(mtd_get_master);
+++
+++uint64_t mtdpart_get_offset(const struct mtd_info *mtd)
+++{
+++	if (!mtd_is_partition(mtd))
+++		return 0;
+++
+++	return mtd_to_part(mtd)->offset;
+++}
+++EXPORT_SYMBOL_GPL(mtdpart_get_offset);
+++
++ /* Returns the size of the entire flash chip */
++ uint64_t mtd_get_device_size(const struct mtd_info *mtd)
++ {
++--- a/include/linux/mtd/mtd.h
+++++ b/include/linux/mtd/mtd.h
++@@ -504,6 +504,24 @@ static inline void mtd_align_erase_req(s
++ 		req->len += mtd->erasesize - mod;
++ }
++ 
+++static inline uint64_t mtd_roundup_to_eb(uint64_t sz, struct mtd_info *mtd)
+++{
+++	if (mtd_mod_by_eb(sz, mtd) == 0)
+++		return sz;
+++
+++	/* Round up to next erase block */
+++	return (mtd_div_by_eb(sz, mtd) + 1) * mtd->erasesize;
+++}
+++
+++static inline uint64_t mtd_rounddown_to_eb(uint64_t sz, struct mtd_info *mtd)
+++{
+++	if (mtd_mod_by_eb(sz, mtd) == 0)
+++		return sz;
+++
+++	/* Round down to the start of the current erase block */
+++	return (mtd_div_by_eb(sz, mtd)) * mtd->erasesize;
+++}
+++
++ static inline uint32_t mtd_div_by_ws(uint64_t sz, struct mtd_info *mtd)
++ {
++ 	if (mtd->writesize_shift)
++--- a/include/linux/mtd/partitions.h
+++++ b/include/linux/mtd/partitions.h
++@@ -116,6 +116,8 @@ int mtd_is_partition(const struct mtd_in
++ int mtd_add_partition(struct mtd_info *master, const char *name,
++ 		      long long offset, long long length);
++ int mtd_del_partition(struct mtd_info *master, int partno);
+++struct mtd_info *mtd_get_master(const struct mtd_info *mtd);
+++uint64_t mtdpart_get_offset(const struct mtd_info *mtd);
++ uint64_t mtd_get_device_size(const struct mtd_info *mtd);
++ 
++ #endif
+diff --git a/target/linux/generic/pending-5.4/410-mtd-parsers-ofpart-fix-parsing-subpartitions.patch b/target/linux/generic/pending-5.4/410-mtd-parsers-ofpart-fix-parsing-subpartitions.patch
+new file mode 100644
+index 0000000000..d0fc1d50e2
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/410-mtd-parsers-ofpart-fix-parsing-subpartitions.patch
+@@ -0,0 +1,76 @@
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
++Date: Thu, 6 May 2021 12:33:58 +0200
++Subject: [PATCH] mtd: parsers: ofpart: fix parsing subpartitions
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++ofpart was recently patched to not scan random partition nodes as
++subpartitions. That change unfortunately broke scanning valid
++subpartitions like:
++
++partitions {
++	compatible = "fixed-partitions";
++	#address-cells = <1>;
++	#size-cells = <1>;
++
++	partition@0 {
++		compatible = "fixed-partitions";
++		label = "bootloader";
++		reg = <0x0 0x100000>;
++
++		partition@0 {
++			label = "config";
++			reg = <0x80000 0x80000>;
++		};
++	};
++};
++
++Fix that regression by adding 1 more code path. We actually need 3
++conditional blocks to support 3 possible cases. This change also makes
++code easier to understand & follow.
++
++Reported-by: David Bauer <mail@david-bauer.net>
++Fixes: 2d751203aacf ("mtd: parsers: ofpart: limit parsing of deprecated DT syntax
++Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
++---
++ drivers/mtd/parsers/ofpart_core.c | 26 ++++++++++++++------------
++ 1 file changed, 14 insertions(+), 12 deletions(-)
++
++--- a/drivers/mtd/parsers/ofpart_core.c
+++++ b/drivers/mtd/parsers/ofpart_core.c
++@@ -57,20 +57,22 @@ static int parse_fixed_partitions(struct
++ 	if (!mtd_node)
++ 		return 0;
++ 
++-	ofpart_node = of_get_child_by_name(mtd_node, "partitions");
++-	if (!ofpart_node && !mtd_is_partition(master)) {
++-		/*
++-		 * We might get here even when ofpart isn't used at all (e.g.,
++-		 * when using another parser), so don't be louder than
++-		 * KERN_DEBUG
++-		 */
++-		pr_debug("%s: 'partitions' subnode not found on %pOF. Trying to parse direct subnodes as partitions.\n",
++-			 master->name, mtd_node);
+++	if (!mtd_is_partition(master)) { /* Master */
+++		ofpart_node = of_get_child_by_name(mtd_node, "partitions");
+++		if (!ofpart_node) {
+++			/*
+++			 * We might get here even when ofpart isn't used at all (e.g.,
+++			 * when using another parser), so don't be louder than
+++			 * KERN_DEBUG
+++			 */
+++			pr_debug("%s: 'partitions' subnode not found on %pOF. Trying to parse direct subnodes as partitions.\n",
+++				master->name, mtd_node);
+++			ofpart_node = mtd_node;
+++			dedicated = false;
+++		}
+++	} else { /* Partition */
++ 		ofpart_node = mtd_node;
++-		dedicated = false;
++ 	}
++-	if (!ofpart_node)
++-		return 0;
++ 
++ 	of_id = of_match_node(parse_ofpart_match_table, ofpart_node);
++ 	if (dedicated && !of_id) {
+diff --git a/target/linux/generic/pending-5.4/411-mtd-partial_eraseblock_write.patch b/target/linux/generic/pending-5.4/411-mtd-partial_eraseblock_write.patch
+new file mode 100644
+index 0000000000..c48a144d3d
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/411-mtd-partial_eraseblock_write.patch
+@@ -0,0 +1,130 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: mtd: implement write support for partitions covering only a part of an eraseblock (buffer data that would otherwise be erased)
++
++lede-commit: 87a8e8ac1067f58ba831c4aae443f3655c31cd80
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ drivers/mtd/mtdpart.c   | 90 ++++++++++++++++++++++++++++++++++++++++++++-----
++ include/linux/mtd/mtd.h |  4 +++
++ 2 files changed, 85 insertions(+), 9 deletions(-)
++
++--- a/drivers/mtd/mtdpart.c
+++++ b/drivers/mtd/mtdpart.c
++@@ -22,6 +22,8 @@
++ #include "mtdcore.h"
++ #include "mtdsplit/mtdsplit.h"
++ 
+++#define MTD_ERASE_PARTIAL	0x8000 /* partition only covers parts of an erase block */
+++
++ /* Our partition linked list */
++ static LIST_HEAD(mtd_partitions);
++ static DEFINE_MUTEX(mtd_partitions_mutex);
++@@ -206,11 +208,77 @@ static int part_erase(struct mtd_info *m
++ {
++ 	struct mtd_part *part = mtd_to_part(mtd);
++ 	int ret;
+++	size_t wrlen = 0;
+++	u8 *erase_buf = NULL;
+++	u32 erase_buf_ofs = 0;
+++	bool partial_start = false;
+++
+++	if (mtd->flags & MTD_ERASE_PARTIAL) {
+++		size_t readlen = 0;
+++		u64 mtd_ofs;
+++
+++		erase_buf = kmalloc(part->parent->erasesize, GFP_ATOMIC);
+++		if (!erase_buf)
+++			return -ENOMEM;
+++
+++		mtd_ofs = part->offset + instr->addr;
+++		erase_buf_ofs = do_div(mtd_ofs, part->parent->erasesize);
+++
+++		if (erase_buf_ofs > 0) {
+++			instr->addr -= erase_buf_ofs;
+++			ret = mtd_read(part->parent,
+++				instr->addr + part->offset,
+++				part->parent->erasesize,
+++				&readlen, erase_buf);
+++
+++			instr->len += erase_buf_ofs;
+++			partial_start = true;
+++		} else {
+++			mtd_ofs = part->offset + part->mtd.size;
+++			erase_buf_ofs = part->parent->erasesize -
+++				do_div(mtd_ofs, part->parent->erasesize);
+++
+++			if (erase_buf_ofs > 0) {
+++				instr->len += erase_buf_ofs;
+++				ret = mtd_read(part->parent,
+++					part->offset + instr->addr +
+++					instr->len - part->parent->erasesize,
+++					part->parent->erasesize, &readlen,
+++					erase_buf);
+++			} else {
+++				ret = 0;
+++			}
+++		}
+++		if (ret < 0) {
+++			kfree(erase_buf);
+++			return ret;
+++		}
+++
+++	}
++ 
++ 	instr->addr += part->offset;
++ 	ret = part->parent->_erase(part->parent, instr);
++ 	if (instr->fail_addr != MTD_FAIL_ADDR_UNKNOWN)
++ 		instr->fail_addr -= part->offset;
+++
+++	if (mtd->flags & MTD_ERASE_PARTIAL) {
+++		if (partial_start) {
+++			part->parent->_write(part->parent,
+++				instr->addr, erase_buf_ofs,
+++				&wrlen, erase_buf);
+++			instr->addr += erase_buf_ofs;
+++		} else {
+++			instr->len -= erase_buf_ofs;
+++			part->parent->_write(part->parent,
+++				instr->addr + instr->len,
+++				erase_buf_ofs, &wrlen,
+++				erase_buf +
+++				part->parent->erasesize -
+++				erase_buf_ofs);
+++		}
+++		kfree(erase_buf);
+++	}
+++
++ 	instr->addr -= part->offset;
++ 
++ 	return ret;
++@@ -525,19 +593,22 @@ static struct mtd_part *allocate_partiti
++ 	remainder = do_div(tmp, wr_alignment);
++ 	if ((slave->mtd.flags & MTD_WRITEABLE) && remainder) {
++ 		/* Doesn't start on a boundary of major erase size */
++-		/* FIXME: Let it be writable if it is on a boundary of
++-		 * _minor_ erase size though */
++-		slave->mtd.flags &= ~MTD_WRITEABLE;
++-		printk(KERN_WARNING"mtd: partition \"%s\" doesn't start on an erase/write block boundary -- force read-only\n",
++-			part->name);
+++		slave->mtd.flags |= MTD_ERASE_PARTIAL;
+++		if (((u32)slave->mtd.size) > parent->erasesize)
+++			slave->mtd.flags &= ~MTD_WRITEABLE;
+++		else
+++			slave->mtd.erasesize = slave->mtd.size;
++ 	}
++ 
++ 	tmp = part_absolute_offset(parent) + slave->offset + slave->mtd.size;
++ 	remainder = do_div(tmp, wr_alignment);
++ 	if ((slave->mtd.flags & MTD_WRITEABLE) && remainder) {
++-		slave->mtd.flags &= ~MTD_WRITEABLE;
++-		printk(KERN_WARNING"mtd: partition \"%s\" doesn't end on an erase/write block -- force read-only\n",
++-			part->name);
+++		slave->mtd.flags |= MTD_ERASE_PARTIAL;
+++
+++		if ((u32)slave->mtd.size > parent->erasesize)
+++			slave->mtd.flags &= ~MTD_WRITEABLE;
+++		else
+++			slave->mtd.erasesize = slave->mtd.size;
++ 	}
++ 
++ 	mtd_set_ooblayout(&slave->mtd, &part_ooblayout_ops);
+diff --git a/target/linux/generic/pending-5.4/412-mtd-partial_eraseblock_unlock.patch b/target/linux/generic/pending-5.4/412-mtd-partial_eraseblock_unlock.patch
+new file mode 100644
+index 0000000000..b23bc1b201
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/412-mtd-partial_eraseblock_unlock.patch
+@@ -0,0 +1,40 @@
++From: Tim Harvey <tharvey@gateworks.com>
++Subject: mtd: allow partial block unlock
++
++This allows sysupgrade for devices such as the Gateworks Avila/Cambria
++product families based on the ixp4xx using the redboot bootloader with
++combined FIS directory and RedBoot config partitions on larger FLASH
++devices with larger eraseblocks.
++
++This second iteration of this patch addresses previous issues:
++- whitespace breakage fixed
++- unlock in all scenarios
++- simplification and fix logic bug
++
++[john@phrozen.org: this should be moved to the ixp4xx folder]
++
++Signed-off-by: Tim Harvey <tharvey@gateworks.com>
++---
++ drivers/mtd/mtdpart.c | 11 ++++++++++-
++ 1 file changed, 10 insertions(+), 1 deletion(-)
++
++--- a/drivers/mtd/mtdpart.c
+++++ b/drivers/mtd/mtdpart.c
++@@ -293,7 +293,16 @@ static int part_lock(struct mtd_info *mt
++ static int part_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
++ {
++ 	struct mtd_part *part = mtd_to_part(mtd);
++-	return part->parent->_unlock(part->parent, ofs + part->offset, len);
+++
+++	ofs += part->offset;
+++
+++	if (mtd->flags & MTD_ERASE_PARTIAL) {
+++		/* round up len to next erasesize and round down offset to prev block */
+++		len = (mtd_div_by_eb(len, part->parent) + 1) * part->parent->erasesize;
+++		ofs &= ~(part->parent->erasesize - 1);
+++	}
+++
+++	return part->parent->_unlock(part->parent, ofs, len);
++ }
++ 
++ static int part_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
+diff --git a/target/linux/generic/pending-5.4/419-mtd-redboot-add-of_match_table-with-DT-binding.patch b/target/linux/generic/pending-5.4/419-mtd-redboot-add-of_match_table-with-DT-binding.patch
+new file mode 100644
+index 0000000000..7692f484ae
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/419-mtd-redboot-add-of_match_table-with-DT-binding.patch
+@@ -0,0 +1,22 @@
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
++Subject: [PATCH] mtd: redboot: add of_match_table with DT binding
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++This allows parsing RedBoot compatible partitions for properly described
++flash device in DT.
++
++Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
++---
++
++--- a/drivers/mtd/parsers/redboot.c
+++++ b/drivers/mtd/parsers/redboot.c
++@@ -305,6 +305,7 @@ static int parse_redboot_partitions(stru
++ 
++ static const struct of_device_id mtd_parser_redboot_of_match_table[] = {
++ 	{ .compatible = "redboot-fis" },
+++	{ .compatible = "ecoscentric,redboot-fis-partitions" },
++ 	{},
++ };
++ MODULE_DEVICE_TABLE(of, mtd_parser_redboot_of_match_table);
+diff --git a/target/linux/generic/pending-5.4/420-mtd-redboot_space.patch b/target/linux/generic/pending-5.4/420-mtd-redboot_space.patch
+new file mode 100644
+index 0000000000..a3cd4ecf1f
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/420-mtd-redboot_space.patch
+@@ -0,0 +1,41 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: add patch for including unpartitioned space in the rootfs partition for redboot devices (if applicable)
++
++[john@phrozen.org: used by ixp and others]
++
++lede-commit: 394918851f84e4d00fa16eb900e7700e95091f00
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ drivers/mtd/redboot.c | 19 +++++++++++++------
++ 1 file changed, 13 insertions(+), 6 deletions(-)
++
++--- a/drivers/mtd/parsers/redboot.c
+++++ b/drivers/mtd/parsers/redboot.c
++@@ -279,14 +279,21 @@ static int parse_redboot_partitions(stru
++ #endif
++ 		names += strlen(names)+1;
++ 
++-#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
++ 		if(fl->next && fl->img->flash_base + fl->img->size + master->erasesize <= fl->next->img->flash_base) {
++-			i++;
++-			parts[i].offset = parts[i-1].size + parts[i-1].offset;
++-			parts[i].size = fl->next->img->flash_base - parts[i].offset;
++-			parts[i].name = nullname;
++-		}
+++			if (!strcmp(parts[i].name, "rootfs")) {
+++				parts[i].size = fl->next->img->flash_base;
+++				parts[i].size &= ~(master->erasesize - 1);
+++				parts[i].size -= parts[i].offset;
+++#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
+++				nrparts--;
+++			} else {
+++				i++;
+++				parts[i].offset = parts[i-1].size + parts[i-1].offset;
+++				parts[i].size = fl->next->img->flash_base - parts[i].offset;
+++				parts[i].name = nullname;
++ #endif
+++			}
+++		}
++ 		tmp_fl = fl;
++ 		fl = fl->next;
++ 		kfree(tmp_fl);
+diff --git a/target/linux/generic/pending-5.4/430-mtd-add-myloader-partition-parser.patch b/target/linux/generic/pending-5.4/430-mtd-add-myloader-partition-parser.patch
+new file mode 100644
+index 0000000000..3319ed94c2
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/430-mtd-add-myloader-partition-parser.patch
+@@ -0,0 +1,229 @@
++From: Florian Fainelli <f.fainelli@gmail.com>
++Subject: Add myloader partition table parser
++
++[john@phozen.org: shoud be upstreamable]
++
++lede-commit: d8bf22859b51faa09d22c056fe221a45d2f7a3b8
++Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
++[adjust for kernel 5.4, add myloader.c to patch]
++Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
++
++--- a/drivers/mtd/parsers/Kconfig
+++++ b/drivers/mtd/parsers/Kconfig
++@@ -57,6 +57,22 @@ config MTD_CMDLINE_PARTS
++ 
++ 	  If unsure, say 'N'.
++ 
+++config MTD_MYLOADER_PARTS
+++	tristate "MyLoader partition parsing"
+++	depends on ADM5120 || ATH25 || ATH79
+++	---help---
+++	  MyLoader is a bootloader which allows the user to define partitions
+++	  in flash devices, by putting a table in the second erase block
+++	  on the device, similar to a partition table. This table gives the 
+++	  offsets and lengths of the user defined partitions.
+++
+++	  If you need code which can detect and parse these tables, and
+++	  register MTD 'partitions' corresponding to each image detected,
+++	  enable this option.
+++
+++	  You will still need the parsing functions to be called by the driver
+++	  for your particular device. It won't happen automatically.
+++
++ config MTD_OF_PARTS
++ 	tristate "OpenFirmware (device tree) partitioning parser"
++ 	default y
++--- a/drivers/mtd/parsers/Makefile
+++++ b/drivers/mtd/parsers/Makefile
++@@ -3,6 +3,7 @@ obj-$(CONFIG_MTD_AR7_PARTS)		+= ar7part.
++ obj-$(CONFIG_MTD_BCM47XX_PARTS)		+= bcm47xxpart.o
++ obj-$(CONFIG_MTD_BCM63XX_PARTS)		+= bcm63xxpart.o
++ obj-$(CONFIG_MTD_CMDLINE_PARTS)		+= cmdlinepart.o
+++obj-$(CONFIG_MTD_MYLOADER_PARTS)		+= myloader.o
++ obj-$(CONFIG_MTD_OF_PARTS)		+= ofpart.o
++ ofpart-y				+= ofpart_core.o
++ ofpart-$(CONFIG_MTD_OF_PARTS_BCM4908)	+= ofpart_bcm4908.o
++--- /dev/null
+++++ b/drivers/mtd/parsers/myloader.c
++@@ -0,0 +1,181 @@
+++/*
+++ *  Parse MyLoader-style flash partition tables and produce a Linux partition
+++ *  array to match.
+++ *
+++ *  Copyright (C) 2007-2009 Gabor Juhos <juhosg@openwrt.org>
+++ *
+++ *  This file was based on drivers/mtd/redboot.c
+++ *  Author: Red Hat, Inc. - David Woodhouse <dwmw2@cambridge.redhat.com>
+++ *
+++ *  This program is free software; you can redistribute it and/or modify it
+++ *  under the terms of the GNU General Public License version 2 as published
+++ *  by the Free Software Foundation.
+++ */
+++
+++#include <linux/kernel.h>
+++#include <linux/module.h>
+++#include <linux/version.h>
+++#include <linux/slab.h>
+++#include <linux/init.h>
+++#include <linux/vmalloc.h>
+++#include <linux/mtd/mtd.h>
+++#include <linux/mtd/partitions.h>
+++#include <linux/byteorder/generic.h>
+++#include <linux/myloader.h>
+++
+++#define BLOCK_LEN_MIN		0x10000
+++#define PART_NAME_LEN		32
+++
+++struct part_data {
+++	struct mylo_partition_table	tab;
+++	char names[MYLO_MAX_PARTITIONS][PART_NAME_LEN];
+++};
+++
+++static int myloader_parse_partitions(struct mtd_info *master,
+++				     const struct mtd_partition **pparts,
+++				     struct mtd_part_parser_data *data)
+++{
+++	struct part_data *buf;
+++	struct mylo_partition_table *tab;
+++	struct mylo_partition *part;
+++	struct mtd_partition *mtd_parts;
+++	struct mtd_partition *mtd_part;
+++	int num_parts;
+++	int ret, i;
+++	size_t retlen;
+++	char *names;
+++	unsigned long offset;
+++	unsigned long blocklen;
+++
+++	buf = vmalloc(sizeof(*buf));
+++	if (!buf) {
+++		return -ENOMEM;
+++		goto out;
+++	}
+++	tab = &buf->tab;
+++
+++	blocklen = master->erasesize;
+++	if (blocklen < BLOCK_LEN_MIN)
+++		blocklen = BLOCK_LEN_MIN;
+++
+++	offset = blocklen;
+++
+++	/* Find the partition table */
+++	for (i = 0; i < 4; i++, offset += blocklen) {
+++		printk(KERN_DEBUG "%s: searching for MyLoader partition table"
+++				" at offset 0x%lx\n", master->name, offset);
+++
+++		ret = mtd_read(master, offset, sizeof(*buf), &retlen,
+++			       (void *)buf);
+++		if (ret)
+++			goto out_free_buf;
+++
+++		if (retlen != sizeof(*buf)) {
+++			ret = -EIO;
+++			goto out_free_buf;
+++		}
+++
+++		/* Check for Partition Table magic number */
+++		if (tab->magic == le32_to_cpu(MYLO_MAGIC_PARTITIONS))
+++			break;
+++
+++	}
+++
+++	if (tab->magic != le32_to_cpu(MYLO_MAGIC_PARTITIONS)) {
+++		printk(KERN_DEBUG "%s: no MyLoader partition table found\n",
+++			master->name);
+++		ret = 0;
+++		goto out_free_buf;
+++	}
+++
+++	/* The MyLoader and the Partition Table is always present */
+++	num_parts = 2;
+++
+++	/* Detect number of used partitions */
+++	for (i = 0; i < MYLO_MAX_PARTITIONS; i++) {
+++		part = &tab->partitions[i];
+++
+++		if (le16_to_cpu(part->type) == PARTITION_TYPE_FREE)
+++			continue;
+++
+++		num_parts++;
+++	}
+++
+++	mtd_parts = kzalloc((num_parts * sizeof(*mtd_part) +
+++				num_parts * PART_NAME_LEN), GFP_KERNEL);
+++
+++	if (!mtd_parts) {
+++		ret = -ENOMEM;
+++		goto out_free_buf;
+++	}
+++
+++	mtd_part = mtd_parts;
+++	names = (char *)&mtd_parts[num_parts];
+++
+++	strncpy(names, "myloader", PART_NAME_LEN);
+++	mtd_part->name = names;
+++	mtd_part->offset = 0;
+++	mtd_part->size = offset;
+++	mtd_part->mask_flags = MTD_WRITEABLE;
+++	mtd_part++;
+++	names += PART_NAME_LEN;
+++
+++	strncpy(names, "partition_table", PART_NAME_LEN);
+++	mtd_part->name = names;
+++	mtd_part->offset = offset;
+++	mtd_part->size = blocklen;
+++	mtd_part->mask_flags = MTD_WRITEABLE;
+++	mtd_part++;
+++	names += PART_NAME_LEN;
+++
+++	for (i = 0; i < MYLO_MAX_PARTITIONS; i++) {
+++		part = &tab->partitions[i];
+++
+++		if (le16_to_cpu(part->type) == PARTITION_TYPE_FREE)
+++			continue;
+++
+++		if ((buf->names[i][0]) && (buf->names[i][0] != '\xff'))
+++			strncpy(names, buf->names[i], PART_NAME_LEN);
+++		else
+++			snprintf(names, PART_NAME_LEN, "partition%d", i);
+++
+++		mtd_part->offset = le32_to_cpu(part->addr);
+++		mtd_part->size = le32_to_cpu(part->size);
+++		mtd_part->name = names;
+++		mtd_part++;
+++		names += PART_NAME_LEN;
+++	}
+++
+++	*pparts = mtd_parts;
+++	ret = num_parts;
+++
+++ out_free_buf:
+++	vfree(buf);
+++ out:
+++	return ret;
+++}
+++
+++static struct mtd_part_parser myloader_mtd_parser = {
+++	.owner		= THIS_MODULE,
+++	.parse_fn	= myloader_parse_partitions,
+++	.name		= "MyLoader",
+++};
+++
+++static int __init myloader_mtd_parser_init(void)
+++{
+++	register_mtd_parser(&myloader_mtd_parser);
+++
+++	return 0;
+++}
+++
+++static void __exit myloader_mtd_parser_exit(void)
+++{
+++	deregister_mtd_parser(&myloader_mtd_parser);
+++}
+++
+++module_init(myloader_mtd_parser_init);
+++module_exit(myloader_mtd_parser_exit);
+++
+++MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
+++MODULE_DESCRIPTION("Parsing code for MyLoader partition tables");
+++MODULE_LICENSE("GPL v2");
+diff --git a/target/linux/generic/pending-5.4/431-mtd-bcm47xxpart-check-for-bad-blocks-when-calculatin.patch b/target/linux/generic/pending-5.4/431-mtd-bcm47xxpart-check-for-bad-blocks-when-calculatin.patch
+new file mode 100644
+index 0000000000..2ea59cd872
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/431-mtd-bcm47xxpart-check-for-bad-blocks-when-calculatin.patch
+@@ -0,0 +1,68 @@
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
++Subject: [PATCH] mtd: bcm47xxpart: check for bad blocks when calculating offsets
++
++Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
++---
++
++--- a/drivers/mtd/parsers/parser_trx.c
+++++ b/drivers/mtd/parsers/parser_trx.c
++@@ -25,6 +25,33 @@ struct trx_header {
++ 	uint32_t offset[3];
++ } __packed;
++ 
+++/*
+++ * Calculate real end offset (address) for a given amount of data. It checks
+++ * all blocks skipping bad ones.
+++ */
+++static size_t parser_trx_real_offset(struct mtd_info *mtd, size_t bytes)
+++{
+++	size_t real_offset = 0;
+++
+++	if (mtd_block_isbad(mtd, real_offset))
+++		pr_warn("Base offset shouldn't be at bad block");
+++
+++	while (bytes >= mtd->erasesize) {
+++		bytes -= mtd->erasesize;
+++		real_offset += mtd->erasesize;
+++		while (mtd_block_isbad(mtd, real_offset)) {
+++			real_offset += mtd->erasesize;
+++
+++			if (real_offset >= mtd->size)
+++				return real_offset - mtd->erasesize;
+++		}
+++	}
+++
+++	real_offset += bytes;
+++
+++	return real_offset;
+++}
+++
++ static const char *parser_trx_data_part_name(struct mtd_info *master,
++ 					     size_t offset)
++ {
++@@ -79,21 +106,21 @@ static int parser_trx_parse(struct mtd_i
++ 	if (trx.offset[2]) {
++ 		part = &parts[curr_part++];
++ 		part->name = "loader";
++-		part->offset = trx.offset[i];
+++		part->offset = parser_trx_real_offset(mtd, trx.offset[i]);
++ 		i++;
++ 	}
++ 
++ 	if (trx.offset[i]) {
++ 		part = &parts[curr_part++];
++ 		part->name = "linux";
++-		part->offset = trx.offset[i];
+++		part->offset = parser_trx_real_offset(mtd, trx.offset[i]);
++ 		i++;
++ 	}
++ 
++ 	if (trx.offset[i]) {
++ 		part = &parts[curr_part++];
++-		part->name = parser_trx_data_part_name(mtd, trx.offset[i]);
++-		part->offset = trx.offset[i];
+++		part->offset = parser_trx_real_offset(mtd, trx.offset[i]);
+++		part->name = parser_trx_data_part_name(mtd, part->offset);
++ 		i++;
++ 	}
++ 
+diff --git a/target/linux/generic/pending-5.4/432-mtd-bcm47xxpart-detect-T_Meter-partition.patch b/target/linux/generic/pending-5.4/432-mtd-bcm47xxpart-detect-T_Meter-partition.patch
+new file mode 100644
+index 0000000000..852654d924
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/432-mtd-bcm47xxpart-detect-T_Meter-partition.patch
+@@ -0,0 +1,37 @@
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
++Subject: mtd: bcm47xxpart: detect T_Meter partition
++
++It can be found on many Netgear devices. It consists of many 0x30 blocks
++starting with 4D 54.
++
++Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
++---
++ drivers/mtd/bcm47xxpart.c | 10 ++++++++++
++ 1 file changed, 10 insertions(+)
++
++--- a/drivers/mtd/parsers/bcm47xxpart.c
+++++ b/drivers/mtd/parsers/bcm47xxpart.c
++@@ -35,6 +35,7 @@
++ #define NVRAM_HEADER			0x48534C46	/* FLSH */
++ #define POT_MAGIC1			0x54544f50	/* POTT */
++ #define POT_MAGIC2			0x504f		/* OP */
+++#define T_METER_MAGIC			0x4D540000	/* MT */
++ #define ML_MAGIC1			0x39685a42
++ #define ML_MAGIC2			0x26594131
++ #define TRX_MAGIC			0x30524448
++@@ -178,6 +179,15 @@ static int bcm47xxpart_parse(struct mtd_
++ 					     MTD_WRITEABLE);
++ 			continue;
++ 		}
+++
+++		/* T_Meter */
+++		if ((le32_to_cpu(buf[0x000 / 4]) & 0xFFFF0000) == T_METER_MAGIC &&
+++		    (le32_to_cpu(buf[0x030 / 4]) & 0xFFFF0000) == T_METER_MAGIC &&
+++		    (le32_to_cpu(buf[0x060 / 4]) & 0xFFFF0000) == T_METER_MAGIC) {
+++			bcm47xxpart_add_part(&parts[curr_part++], "T_Meter", offset,
+++					     MTD_WRITEABLE);
+++			continue;
+++		}
++ 
++ 		/* TRX */
++ 		if (buf[0x000 / 4] == TRX_MAGIC) {
+diff --git a/target/linux/generic/pending-5.4/435-mtd-add-routerbootpart-parser-config.patch b/target/linux/generic/pending-5.4/435-mtd-add-routerbootpart-parser-config.patch
+new file mode 100644
+index 0000000000..ab1e09a5f1
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/435-mtd-add-routerbootpart-parser-config.patch
+@@ -0,0 +1,38 @@
++From 4437e01fb6bca63fccdba5d6c44888b0935885c2 Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Thibaut=20VAR=C3=88NE?= <hacks@slashdirt.org>
++Date: Tue, 24 Mar 2020 11:45:07 +0100
++Subject: [PATCH] generic: routerboot partition build bits (5.4)
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++This patch adds routerbootpart kernel build bits
++
++Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
++---
++ drivers/mtd/parsers/Kconfig  | 9 +++++++++
++ drivers/mtd/parsers/Makefile | 1 +
++ 2 files changed, 10 insertions(+)
++
++--- a/drivers/mtd/parsers/Kconfig
+++++ b/drivers/mtd/parsers/Kconfig
++@@ -195,3 +195,12 @@ config MTD_REDBOOT_PARTS_READONLY
++ 	  'FIS directory' images, enable this option.
++ 
++ endif # MTD_REDBOOT_PARTS
+++
+++config MTD_ROUTERBOOT_PARTS
+++	tristate "RouterBoot flash partition parser"
+++	depends on MTD && OF
+++	help
+++	 MikroTik RouterBoot is implemented as a multi segment system on the
+++	 flash, some of which are fixed and some of which are located at
+++	 variable offsets. This parser handles both cases via properly
+++	 formatted DTS.
++--- a/drivers/mtd/parsers/Makefile
+++++ b/drivers/mtd/parsers/Makefile
++@@ -13,3 +13,4 @@ obj-$(CONFIG_MTD_AFS_PARTS)		+= afs.o
++ obj-$(CONFIG_MTD_PARSER_TRX)		+= parser_trx.o
++ obj-$(CONFIG_MTD_SHARPSL_PARTS)		+= sharpslpart.o
++ obj-$(CONFIG_MTD_REDBOOT_PARTS)		+= redboot.o
+++obj-$(CONFIG_MTD_ROUTERBOOT_PARTS)		+= routerbootpart.o
+diff --git a/target/linux/generic/pending-5.4/447-mtd-spinand-gigadevice-Add-support-for-GD5F4GQ4xC.patch b/target/linux/generic/pending-5.4/447-mtd-spinand-gigadevice-Add-support-for-GD5F4GQ4xC.patch
+new file mode 100644
+index 0000000000..e1fcb15d5a
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/447-mtd-spinand-gigadevice-Add-support-for-GD5F4GQ4xC.patch
+@@ -0,0 +1,87 @@
++From 30521ccfb4597f91b9e5c7967acef9c7c85e58a8 Mon Sep 17 00:00:00 2001
++From: Hauke Mehrtens <hauke@hauke-m.de>
++Date: Wed, 12 Aug 2020 22:50:26 +0200
++Subject: [PATCH v2 447/447] mtd: spinand: gigadevice: Add support for
++ GD5F4GQ4xC
++
++This adds support for the following 4GiB chips:
++GD5F4GQ4RCYIG 1.8V
++GD5F4GQ4UCYIG 3.3V
++
++The datasheet can be found here:
++https://www.novitronic.ch/sixcms/media.php/2/DS-00173-GD5F4GQ4xCxIG-Rev1.574695.pdf
++
++The GD5F4GQ4UCYIGT (3.3V) version is used on the Imagination
++Technologies Creator Ci40 (Marduk), the 1.8V version was not tested.
++
++This device only works in single SPI mode and not in dual or quad mode
++for me on this board.
++
++Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
++---
++ drivers/mtd/nand/spi/gigadevice.c | 49 +++++++++++++++++++++++++++++++
++ 1 file changed, 49 insertions(+)
++
++--- a/drivers/mtd/nand/spi/gigadevice.c
+++++ b/drivers/mtd/nand/spi/gigadevice.c
++@@ -132,6 +132,35 @@ static const struct mtd_ooblayout_ops gd
++ 	.free = gd5fxgq4_variant2_ooblayout_free,
++ };
++ 
+++static int gd5fxgq4xc_ooblayout_256_ecc(struct mtd_info *mtd, int section,
+++					struct mtd_oob_region *oobregion)
+++{
+++	if (section)
+++		return -ERANGE;
+++
+++	oobregion->offset = 128;
+++	oobregion->length = 128;
+++
+++	return 0;
+++}
+++
+++static int gd5fxgq4xc_ooblayout_256_free(struct mtd_info *mtd, int section,
+++					 struct mtd_oob_region *oobregion)
+++{
+++	if (section)
+++		return -ERANGE;
+++
+++	oobregion->offset = 1;
+++	oobregion->length = 127;
+++
+++	return 0;
+++}
+++
+++static const struct mtd_ooblayout_ops gd5fxgq4xc_oob_256_ops = {
+++	.ecc = gd5fxgq4xc_ooblayout_256_ecc,
+++	.free = gd5fxgq4xc_ooblayout_256_free,
+++};
+++
++ static int gd5fxgq4uexxg_ecc_get_status(struct spinand_device *spinand,
++ 					u8 status)
++ {
++@@ -222,6 +251,24 @@ static const struct spinand_info gigadev
++ 		     SPINAND_HAS_QE_BIT,
++ 		     SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout,
++ 				     gd5fxgq4xa_ecc_get_status)),
+++	SPINAND_INFO("GD5F4GQ4RC", 0xa468,
+++		     NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
+++		     NAND_ECCREQ(8, 512),
+++		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants_f,
+++					      &write_cache_variants,
+++					      &update_cache_variants),
+++		     SPINAND_HAS_QE_BIT,
+++		     SPINAND_ECCINFO(&gd5fxgq4xc_oob_256_ops,
+++				     gd5fxgq4ufxxg_ecc_get_status)),
+++	SPINAND_INFO("GD5F4GQ4UC", 0xb468,
+++		     NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
+++		     NAND_ECCREQ(8, 512),
+++		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants_f,
+++					      &write_cache_variants,
+++					      &update_cache_variants),
+++		     SPINAND_HAS_QE_BIT,
+++		     SPINAND_ECCINFO(&gd5fxgq4xc_oob_256_ops,
+++				     gd5fxgq4ufxxg_ecc_get_status)),
++ 	SPINAND_INFO("GD5F1GQ4UExxG", 0xd1,
++ 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
++ 		     NAND_ECCREQ(8, 512),
+diff --git a/target/linux/generic/pending-5.4/450-mtd-spi-nor-allow-NOR-driver-to-write-fewer-bytes-th.patch b/target/linux/generic/pending-5.4/450-mtd-spi-nor-allow-NOR-driver-to-write-fewer-bytes-th.patch
+new file mode 100644
+index 0000000000..fe2d7a6b23
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/450-mtd-spi-nor-allow-NOR-driver-to-write-fewer-bytes-th.patch
+@@ -0,0 +1,22 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Thu, 22 Feb 2018 11:11:57 +0100
++Subject: [PATCH] mtd: spi-nor: allow NOR driver to write fewer bytes than
++ requested
++
++The write size can be constrained by the maximum message/transfer size
++of the SPI controller. Only check for ret = 0 to avoid an infinite loop.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/mtd/spi-nor/spi-nor.c
+++++ b/drivers/mtd/spi-nor/spi-nor.c
++@@ -2706,7 +2706,7 @@ static int spi_nor_write(struct mtd_info
++ 
++ 		write_enable(nor);
++ 		ret = spi_nor_write_data(nor, addr, page_remain, buf + i);
++-		if (ret < 0)
+++		if (ret <= 0)
++ 			goto write_err;
++ 		written = ret;
++ 
+diff --git a/target/linux/generic/pending-5.4/460-mtd-cfi_cmdset_0002-no-erase_suspend.patch b/target/linux/generic/pending-5.4/460-mtd-cfi_cmdset_0002-no-erase_suspend.patch
+new file mode 100644
+index 0000000000..659a6386ae
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/460-mtd-cfi_cmdset_0002-no-erase_suspend.patch
+@@ -0,0 +1,25 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: kernel: disable cfi cmdset 0002 erase suspend
++
++on some platforms, erase suspend leads to data corruption and lockups when write
++ops collide with erase ops. this has been observed on the buffalo wzr-hp-g300nh.
++rather than play whack-a-mole with a hard to reproduce issue on a variety of devices,
++simply disable erase suspend, as it will usually not produce any useful gain on
++the small filesystems used on embedded hardware.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ drivers/mtd/chips/cfi_cmdset_0002.c | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
++@@ -909,7 +909,7 @@ static int get_chip(struct map_info *map
++ 		return 0;
++ 
++ 	case FL_ERASING:
++-		if (!cfip || !(cfip->EraseSuspend & (0x1|0x2)) ||
+++		if (1 /* no suspend */ || !cfip || !(cfip->EraseSuspend & (0x1|0x2)) ||
++ 		    !(mode == FL_READY || mode == FL_POINT ||
++ 		    (mode == FL_WRITING && (cfip->EraseSuspend & 0x2))))
++ 			goto sleep;
+diff --git a/target/linux/generic/pending-5.4/461-mtd-cfi_cmdset_0002-add-buffer-write-cmd-timeout.patch b/target/linux/generic/pending-5.4/461-mtd-cfi_cmdset_0002-add-buffer-write-cmd-timeout.patch
+new file mode 100644
+index 0000000000..8d2195e133
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/461-mtd-cfi_cmdset_0002-add-buffer-write-cmd-timeout.patch
+@@ -0,0 +1,17 @@
++From: George Kashperko <george@znau.edu.ua>
++Subject: Issue map read after Write Buffer Load command to ensure chip is ready to receive data.
++
++Signed-off-by: George Kashperko <george@znau.edu.ua>
++---
++ drivers/mtd/chips/cfi_cmdset_0002.c |    1 +
++ 1 file changed, 1 insertion(+)
++--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
++@@ -2054,6 +2054,7 @@ static int __xipram do_write_buffer(stru
++ 
++ 	/* Write Buffer Load */
++ 	map_write(map, CMD(0x25), cmd_adr);
+++	(void) map_read(map, cmd_adr);
++ 
++ 	chip->state = FL_WRITING_TO_BUFFER;
++ 
+diff --git a/target/linux/generic/pending-5.4/465-m25p80-mx-disable-software-protection.patch b/target/linux/generic/pending-5.4/465-m25p80-mx-disable-software-protection.patch
+new file mode 100644
+index 0000000000..24d2d4567d
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/465-m25p80-mx-disable-software-protection.patch
+@@ -0,0 +1,18 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: Disable software protection bits for Macronix flashes.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ drivers/mtd/spi-nor/spi-nor.c | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/drivers/mtd/spi-nor/spi-nor.c
+++++ b/drivers/mtd/spi-nor/spi-nor.c
++@@ -4884,6 +4884,7 @@ int spi_nor_scan(struct spi_nor *nor, co
++ 	 */
++ 	if (JEDEC_MFR(nor->info) == SNOR_MFR_ATMEL ||
++ 	    JEDEC_MFR(nor->info) == SNOR_MFR_INTEL ||
+++	    JEDEC_MFR(nor->info) == SNOR_MFR_MACRONIX ||
++ 	    JEDEC_MFR(nor->info) == SNOR_MFR_SST ||
++ 	    nor->info->flags & SPI_NOR_HAS_LOCK)
++ 		nor->clear_sr_bp = spi_nor_clear_sr_bp;
+diff --git a/target/linux/generic/pending-5.4/466-Revert-mtd-spi-nor-fix-Spansion-regressions-aliased-.patch b/target/linux/generic/pending-5.4/466-Revert-mtd-spi-nor-fix-Spansion-regressions-aliased-.patch
+new file mode 100644
+index 0000000000..70f1e9f059
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/466-Revert-mtd-spi-nor-fix-Spansion-regressions-aliased-.patch
+@@ -0,0 +1,35 @@
++From: Matthias Schiffer <mschiffer@universe-factory.net>
++Date: Tue, 9 Jan 2018 20:41:48 +0100
++Subject: [PATCH] Revert "mtd: spi-nor: fix Spansion regressions (aliased with
++ Winbond)"
++
++This reverts commit 67b9bcd36906e12a15ffec19463afbbd6a41660e.
++
++The underlying issue breaking Spansion flash has been fixed with "mtd: spi-nor:
++wait until lock/unlock operations are ready" and "mtd: spi-nor: wait for SR_WIP
++to clear on initial unlock", so we can support unlocking for Winbond flash
++again.
++
++Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
++---
++ drivers/mtd/spi-nor/spi-nor.c | 4 +++-
++ 1 file changed, 3 insertions(+), 1 deletion(-)
++
++--- a/drivers/mtd/spi-nor/spi-nor.c
+++++ b/drivers/mtd/spi-nor/spi-nor.c
++@@ -4398,6 +4398,7 @@ static void st_micron_set_default_init(s
++ 
++ static void winbond_set_default_init(struct spi_nor *nor)
++ {
+++	nor->flags |= SNOR_F_HAS_LOCK;
++ 	nor->params.set_4byte = winbond_set_4byte;
++ }
++ 
++@@ -4886,6 +4887,7 @@ int spi_nor_scan(struct spi_nor *nor, co
++ 	    JEDEC_MFR(nor->info) == SNOR_MFR_INTEL ||
++ 	    JEDEC_MFR(nor->info) == SNOR_MFR_MACRONIX ||
++ 	    JEDEC_MFR(nor->info) == SNOR_MFR_SST ||
+++	    JEDEC_MFR(nor->info) == SNOR_MFR_WINBOND ||
++ 	    nor->info->flags & SPI_NOR_HAS_LOCK)
++ 		nor->clear_sr_bp = spi_nor_clear_sr_bp;
++ 
+diff --git a/target/linux/generic/pending-5.4/470-mtd-spi-nor-support-limiting-4K-sectors-support-base.patch b/target/linux/generic/pending-5.4/470-mtd-spi-nor-support-limiting-4K-sectors-support-base.patch
+new file mode 100644
+index 0000000000..d3e587ff97
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/470-mtd-spi-nor-support-limiting-4K-sectors-support-base.patch
+@@ -0,0 +1,79 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sat, 4 Nov 2017 07:40:23 +0100
++Subject: [PATCH] mtd: spi-nor: support limiting 4K sectors support based on
++ flash size
++
++Some devices need 4K sectors to be able to deal with small flash chips.
++For instance, w25x05 is 64 KiB in size, and without 4K sectors, the
++entire chip is just one erase block.
++On bigger flash chip sizes, using 4K sectors can significantly slow down
++many operations, including using a writable filesystem. There are several
++platforms where it makes sense to use a single kernel on both kinds of
++devices.
++
++To support this properly, allow configuring an upper flash chip size
++limit for 4K sectors support.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/mtd/spi-nor/Kconfig
+++++ b/drivers/mtd/spi-nor/Kconfig
++@@ -34,6 +34,17 @@ config SPI_ASPEED_SMC
++ 	  and support for the SPI flash memory controller (SPI) for
++ 	  the host firmware. The implementation only supports SPI NOR.
++ 
+++config MTD_SPI_NOR_USE_4K_SECTORS_LIMIT
+++	int "Maximum flash chip size to use 4K sectors on (in KiB)"
+++	depends on MTD_SPI_NOR_USE_4K_SECTORS
+++	default "4096"
+++	help
+++	  There are many flash chips that support 4K sectors, but are so large
+++	  that using them significantly slows down writing large amounts of
+++	  data or using a writable filesystem.
+++	  Any flash chip larger than the size specified in this option will
+++	  not use 4K sectors.
+++
++ config SPI_CADENCE_QUADSPI
++ 	tristate "Cadence Quad SPI controller"
++ 	depends on OF && (ARM || ARM64 || COMPILE_TEST)
++--- a/drivers/mtd/spi-nor/spi-nor.c
+++++ b/drivers/mtd/spi-nor/spi-nor.c
++@@ -4464,6 +4464,7 @@ static void spi_nor_info_init_params(str
++ 	struct spi_nor_erase_map *map = &params->erase_map;
++ 	const struct flash_info *info = nor->info;
++ 	struct device_node *np = spi_nor_get_flash_node(nor);
+++	struct mtd_info *mtd = &nor->mtd;
++ 	u8 i, erase_mask;
++ 
++ 	/* Initialize legacy flash parameters and settings. */
++@@ -4527,6 +4528,21 @@ static void spi_nor_info_init_params(str
++ 	 */
++ 	erase_mask = 0;
++ 	i = 0;
+++#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
+++	if ((info->flags & SECT_4K_PMC) && (mtd->size <=
+++		   CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT * 1024)) {
+++		erase_mask |= BIT(i);
+++		spi_nor_set_erase_type(&map->erase_type[i], 4096u,
+++				       SPINOR_OP_BE_4K_PMC);
+++		i++;
+++	} else if ((info->flags & SECT_4K) && (mtd->size <=
+++	    CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT * 1024)) {
+++		erase_mask |= BIT(i);
+++		spi_nor_set_erase_type(&map->erase_type[i], 4096u,
+++				       SPINOR_OP_BE_4K);
+++		i++;
+++	}
+++#else
++ 	if (info->flags & SECT_4K_PMC) {
++ 		erase_mask |= BIT(i);
++ 		spi_nor_set_erase_type(&map->erase_type[i], 4096u,
++@@ -4538,6 +4554,7 @@ static void spi_nor_info_init_params(str
++ 				       SPINOR_OP_BE_4K);
++ 		i++;
++ 	}
+++#endif
++ 	erase_mask |= BIT(i);
++ 	spi_nor_set_erase_type(&map->erase_type[i], info->sector_size,
++ 			       SPINOR_OP_SE);
+diff --git a/target/linux/generic/pending-5.4/476-mtd-spi-nor-add-eon-en25q128.patch b/target/linux/generic/pending-5.4/476-mtd-spi-nor-add-eon-en25q128.patch
+new file mode 100644
+index 0000000000..b62dae536b
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/476-mtd-spi-nor-add-eon-en25q128.patch
+@@ -0,0 +1,18 @@
++From: Piotr Dymacz <pepe2k@gmail.com>
++Subject: kernel/mtd: add support for EON EN25Q128
++
++Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
++---
++ drivers/mtd/spi-nor/spi-nor.c | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/drivers/mtd/spi-nor/spi-nor.c
+++++ b/drivers/mtd/spi-nor/spi-nor.c
++@@ -2179,6 +2179,7 @@ static const struct flash_info spi_nor_i
++ 	{ "en25q32b",   INFO(0x1c3016, 0, 64 * 1024,   64, 0) },
++ 	{ "en25p64",    INFO(0x1c2017, 0, 64 * 1024,  128, 0) },
++ 	{ "en25q64",    INFO(0x1c3017, 0, 64 * 1024,  128, SECT_4K) },
+++	{ "en25q128",   INFO(0x1c3018, 0, 64 * 1024,  256, SECT_4K) },
++ 	{ "en25q80a",   INFO(0x1c3014, 0, 64 * 1024,   16,
++ 			SECT_4K | SPI_NOR_DUAL_READ) },
++ 	{ "en25qh32",   INFO(0x1c7016, 0, 64 * 1024,   64, 0) },
+diff --git a/target/linux/generic/pending-5.4/479-mtd-spi-nor-add-xtx-xt25f128b.patch b/target/linux/generic/pending-5.4/479-mtd-spi-nor-add-xtx-xt25f128b.patch
+new file mode 100644
+index 0000000000..39e02604fe
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/479-mtd-spi-nor-add-xtx-xt25f128b.patch
+@@ -0,0 +1,42 @@
++From patchwork Thu Feb  6 17:19:41 2020
++Content-Type: text/plain; charset="utf-8"
++MIME-Version: 1.0
++Content-Transfer-Encoding: 7bit
++X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
++X-Patchwork-Id: 1234465
++Date: Thu, 6 Feb 2020 19:19:41 +0200
++From: Daniel Golle <daniel@makrotopia.org>
++To: linux-mtd@lists.infradead.org
++Subject: [PATCH v2] mtd: spi-nor: Add support for xt25f128b chip
++Message-ID: <20200206171941.GA2398@makrotopia.org>
++MIME-Version: 1.0
++Content-Disposition: inline
++List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-mtd>,
++ <mailto:linux-mtd-request@lists.infradead.org?subject=subscribe>
++Cc: Eitan Cohen <eitan@neot-semadar.com>, Piotr Dymacz <pepe2k@gmail.com>,
++ Tudor Ambarus <tudor.ambarus@microchip.com>
++Sender: "linux-mtd" <linux-mtd-bounces@lists.infradead.org>
++Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org
++
++Add XT25F128B made by XTX Technology (Shenzhen) Limited.
++This chip supports dual and quad read and uniform 4K-byte erase.
++Verified on Teltonika RUT955 which comes with XT25F128B in recent
++versions of the device.
++
++Signed-off-by: Daniel Golle <daniel@makrotopia.org>
++---
++ drivers/mtd/spi-nor/spi-nor.c | 4 ++++
++ 1 file changed, 4 insertions(+)
++
++--- a/drivers/mtd/spi-nor/spi-nor.c
+++++ b/drivers/mtd/spi-nor/spi-nor.c
++@@ -2506,6 +2506,9 @@ static const struct flash_info spi_nor_i
++ 	/* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */
++ 	{ "XM25QH64A", INFO(0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
++ 	{ "XM25QH128A", INFO(0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+++
+++	/* XTX Technology (Shenzhen) Limited */
+++	{ "xt25f128b", INFO(0x0B4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
++ 	{ },
++ };
++ 
+diff --git a/target/linux/generic/pending-5.4/480-mtd-set-rootfs-to-be-root-dev.patch b/target/linux/generic/pending-5.4/480-mtd-set-rootfs-to-be-root-dev.patch
+new file mode 100644
+index 0000000000..95863d6edb
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/480-mtd-set-rootfs-to-be-root-dev.patch
+@@ -0,0 +1,38 @@
++From: Gabor Juhos <juhosg@openwrt.org>
++Subject: kernel/3.1[02]: move MTD root device setup code to mtdcore
++
++The current code only allows to automatically set
++root device on MTD partitions. Move the code to MTD
++core to allow to use it with all MTD devices.
++
++Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
++---
++ drivers/mtd/mtdcore.c | 10 ++++++++++
++ 1 file changed, 10 insertions(+)
++
++--- a/drivers/mtd/mtdcore.c
+++++ b/drivers/mtd/mtdcore.c
++@@ -27,6 +27,7 @@
++ #include <linux/reboot.h>
++ #include <linux/leds.h>
++ #include <linux/debugfs.h>
+++#include <linux/root_dev.h>
++ #include <linux/nvmem-provider.h>
++ 
++ #include <linux/mtd/mtd.h>
++@@ -699,6 +700,15 @@ int add_mtd_device(struct mtd_info *mtd)
++ 	   of this try_ nonsense, and no bitching about it
++ 	   either. :) */
++ 	__module_get(THIS_MODULE);
+++
+++	if (!strcmp(mtd->name, "rootfs") &&
+++	    IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV) &&
+++	    ROOT_DEV == 0) {
+++		pr_notice("mtd: device %d (%s) set to be root filesystem\n",
+++			  mtd->index, mtd->name);
+++		ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, mtd->index);
+++	}
+++
++ 	return 0;
++ 
++ fail_nvmem_add:
+diff --git a/target/linux/generic/pending-5.4/481-mtd-spi-nor-rework-broken-flash-reset-support.patch b/target/linux/generic/pending-5.4/481-mtd-spi-nor-rework-broken-flash-reset-support.patch
+new file mode 100644
+index 0000000000..81b4f190d4
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/481-mtd-spi-nor-rework-broken-flash-reset-support.patch
+@@ -0,0 +1,167 @@
++From ea92cbb50a78404e29de2cc3999a240615ffb1c8 Mon Sep 17 00:00:00 2001
++From: Chuanhong Guo <gch981213@gmail.com>
++Date: Mon, 6 Apr 2020 17:58:48 +0800
++Subject: [PATCH] mtd: spi-nor: rework broken-flash-reset support
++
++Instead of resetting flash to 3B address on remove hook, this
++implementation only enters 4B mode when needed, which prevents
++more unexpected reboot stuck. This implementation makes it only
++break when a kernel panic happens during flash operation on 16M+
++areas.
++*OpenWrt only*: silent broken-flash-reset warning. We are not dealing
++with vendors and it's unpleasant for users to se that unnecessary
++and long WARN_ON print.
++
++Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
++---
++ drivers/mtd/spi-nor/spi-nor.c | 52 +++++++++++++++++++++++++++++++++--
++ 1 file changed, 49 insertions(+), 3 deletions(-)
++
++--- a/drivers/mtd/spi-nor/spi-nor.c
+++++ b/drivers/mtd/spi-nor/spi-nor.c
++@@ -616,6 +616,22 @@ static void spi_nor_set_4byte_opcodes(st
++ 	}
++ }
++ 
+++static int spi_nor_check_set_addr_width(struct spi_nor *nor, loff_t addr)
+++{
+++	u8 addr_width;
+++
+++	if ((nor->flags & (SNOR_F_4B_OPCODES | SNOR_F_BROKEN_RESET)) !=
+++	    SNOR_F_BROKEN_RESET)
+++		return 0;
+++
+++	addr_width = addr & 0xff000000 ? 4 : 3;
+++	if (nor->addr_width == addr_width)
+++		return 0;
+++
+++	nor->addr_width = addr_width;
+++	return nor->params.set_4byte(nor, addr_width == 4);
+++}
+++
++ static int macronix_set_4byte(struct spi_nor *nor, bool enable)
++ {
++ 	if (nor->spimem) {
++@@ -1261,6 +1277,10 @@ static int spi_nor_erase(struct mtd_info
++ 	if (ret)
++ 		return ret;
++ 
+++	ret = spi_nor_check_set_addr_width(nor, instr->addr + instr->len);
+++	if (ret < 0)
+++		return ret;
+++
++ 	/* whole-chip erase? */
++ 	if (len == mtd->size && !(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) {
++ 		unsigned long timeout;
++@@ -1317,6 +1337,7 @@ static int spi_nor_erase(struct mtd_info
++ 	write_disable(nor);
++ 
++ erase_err:
+++	spi_nor_check_set_addr_width(nor, 0);
++ 	spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_ERASE);
++ 
++ 	return ret;
++@@ -1623,7 +1644,9 @@ static int spi_nor_lock(struct mtd_info
++ 	if (ret)
++ 		return ret;
++ 
+++	spi_nor_check_set_addr_width(nor, ofs + len);
++ 	ret = nor->params.locking_ops->lock(nor, ofs, len);
+++	spi_nor_check_set_addr_width(nor, 0);
++ 
++ 	spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_UNLOCK);
++ 	return ret;
++@@ -1638,7 +1661,9 @@ static int spi_nor_unlock(struct mtd_inf
++ 	if (ret)
++ 		return ret;
++ 
+++	spi_nor_check_set_addr_width(nor, ofs + len);
++ 	ret = nor->params.locking_ops->unlock(nor, ofs, len);
+++	spi_nor_check_set_addr_width(nor, 0);
++ 
++ 	spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_LOCK);
++ 	return ret;
++@@ -1653,7 +1678,9 @@ static int spi_nor_is_locked(struct mtd_
++ 	if (ret)
++ 		return ret;
++ 
+++	spi_nor_check_set_addr_width(nor, ofs + len);
++ 	ret = nor->params.locking_ops->is_locked(nor, ofs, len);
+++	spi_nor_check_set_addr_width(nor, 0);
++ 
++ 	spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_LOCK);
++ 	return ret;
++@@ -2559,6 +2586,10 @@ static int spi_nor_read(struct mtd_info
++ 	if (ret)
++ 		return ret;
++ 
+++	ret = spi_nor_check_set_addr_width(nor, from + len);
+++	if (ret < 0)
+++		return ret;
+++
++ 	while (len) {
++ 		loff_t addr = from;
++ 
++@@ -2582,6 +2613,7 @@ static int spi_nor_read(struct mtd_info
++ 	ret = 0;
++ 
++ read_err:
+++	spi_nor_check_set_addr_width(nor, 0);
++ 	spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ);
++ 	return ret;
++ }
++@@ -2599,6 +2631,10 @@ static int sst_write(struct mtd_info *mt
++ 	if (ret)
++ 		return ret;
++ 
+++	ret = spi_nor_check_set_addr_width(nor, to + len);
+++	if (ret < 0)
+++		return ret;
+++
++ 	write_enable(nor);
++ 
++ 	nor->sst_write_second = false;
++@@ -2661,6 +2697,7 @@ static int sst_write(struct mtd_info *mt
++ 	}
++ sst_write_err:
++ 	*retlen += actual;
+++	spi_nor_check_set_addr_width(nor, 0);
++ 	spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE);
++ 	return ret;
++ }
++@@ -2683,6 +2720,10 @@ static int spi_nor_write(struct mtd_info
++ 	if (ret)
++ 		return ret;
++ 
+++	ret = spi_nor_check_set_addr_width(nor, to + len);
+++	if (ret < 0)
+++		return ret;
+++
++ 	for (i = 0; i < len; ) {
++ 		ssize_t written;
++ 		loff_t addr = to + i;
++@@ -2722,6 +2763,7 @@ static int spi_nor_write(struct mtd_info
++ 	}
++ 
++ write_err:
+++	spi_nor_check_set_addr_width(nor, 0);
++ 	spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE);
++ 	return ret;
++ }
++@@ -4726,9 +4768,13 @@ static int spi_nor_init(struct spi_nor *
++ 		 * reboots (e.g., crashes). Warn the user (or hopefully, system
++ 		 * designer) that this is bad.
++ 		 */
++-		WARN_ONCE(nor->flags & SNOR_F_BROKEN_RESET,
++-			  "enabling reset hack; may not recover from unexpected reboots\n");
++-		nor->params.set_4byte(nor, true);
+++		if (nor->flags & SNOR_F_BROKEN_RESET) {
+++			dev_warn(nor->dev,
+++				"enabling reset hack; may not recover from unexpected reboots\n");
+++			nor->addr_width = 3;
+++		} else {
+++			nor->params.set_4byte(nor, true);
+++		}
++ 	}
++ 
++ 	return 0;
+diff --git a/target/linux/generic/pending-5.4/482-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch b/target/linux/generic/pending-5.4/482-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch
+new file mode 100644
+index 0000000000..3a22133230
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/482-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch
+@@ -0,0 +1,24 @@
++From d68b4aa22e8c625685bfad642dd7337948dc0ad1 Mon Sep 17 00:00:00 2001
++From: Koen Vandeputte <koen.vandeputte@ncentric.com>
++Date: Mon, 6 Jan 2020 13:07:56 +0100
++Subject: [PATCH] mtd: spi-nor: add support for Gigadevice GD25D05
++
++Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
++---
++ drivers/mtd/spi-nor/spi-nor.c | 5 +++++
++ 1 file changed, 5 insertions(+)
++
++--- a/drivers/mtd/spi-nor/spi-nor.c
+++++ b/drivers/mtd/spi-nor/spi-nor.c
++@@ -2232,6 +2232,11 @@ static const struct flash_info spi_nor_i
++ 
++ 	/* GigaDevice */
++ 	{
+++		"gd25d05", INFO(0xc84010, 0, 64 * 1024,  1,
+++			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+++			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+++	},
+++	{
++ 		"gd25q16", INFO(0xc84015, 0, 64 * 1024,  32,
++ 			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
++ 			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+diff --git a/target/linux/generic/pending-5.4/482-mtd-spi-nor-fix-4-byte-opcode-support-for-w25q256.patch b/target/linux/generic/pending-5.4/482-mtd-spi-nor-fix-4-byte-opcode-support-for-w25q256.patch
+new file mode 100644
+index 0000000000..63366e6032
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/482-mtd-spi-nor-fix-4-byte-opcode-support-for-w25q256.patch
+@@ -0,0 +1,60 @@
++From: Mantas Pucka <mantas@8devices.com>
++To: linux-mtd@lists.infradead.org
++Subject: [PATCH] mtd: spi-nor: fix 4-byte opcode support for w25q256
++Date: Wed, 15 Apr 2020 16:48:30 +0300
++Message-ID: <1586958510-24012-1-git-send-email-mantas@8devices.com>
++
++There are 2 different chips (w25q256fv and w25q256jv) that share
++the same JEDEC ID. Only w25q256jv fully supports 4-byte opcodes.
++Use SFDP header version to differentiate between them.
++
++for OpenWRT only: rebased to linux-v5.4
++
++Signed-off-by: Mantas Pucka <mantas@8devices.com>
++---
++
++--- a/drivers/mtd/spi-nor/spi-nor.c
+++++ b/drivers/mtd/spi-nor/spi-nor.c
++@@ -2172,6 +2172,32 @@ static struct spi_nor_fixups gd25q256_fi
++ 	.default_init = gd25q256_default_init,
++ };
++ 
+++static int
+++w25q256_post_bfpt_fixups(struct spi_nor *nor,
+++			 const struct sfdp_parameter_header *bfpt_header,
+++			 const struct sfdp_bfpt *bfpt,
+++			 struct spi_nor_flash_parameter *params)
+++{
+++	/*
+++	 * W25Q256JV supports 4B opcodes but W25Q256FV does not.
+++	 * Unfortunately, Winbond has re-used the same JEDEC ID for both
+++	 * variants which prevents us from defining a new entry in the parts
+++	 * table.
+++	 * To differentiate between W25Q256JV and W25Q256FV check SFDP header
+++	 * version: only JV has JESD216A compliant structure (version 5)
+++	 */
+++
+++	if (bfpt_header->major == SFDP_JESD216_MAJOR &&
+++	    bfpt_header->minor == SFDP_JESD216A_MINOR)
+++		nor->flags |= SNOR_F_4B_OPCODES;
+++
+++	return 0;
+++}
+++
+++static struct spi_nor_fixups w25q256_fixups = {
+++	.post_bfpt = w25q256_post_bfpt_fixups,
+++};
+++
++ /* NOTE: double check command sets and memory organization when you add
++  * more nor chips.  This current list focusses on newer chips, which
++  * have been converging on command sets which including JEDEC ID.
++@@ -2515,7 +2541,8 @@ static const struct flash_info spi_nor_i
++ 	{ "w25q80", INFO(0xef5014, 0, 64 * 1024,  16, SECT_4K) },
++ 	{ "w25q80bl", INFO(0xef4014, 0, 64 * 1024,  16, SECT_4K) },
++ 	{ "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) },
++-	{ "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+++	{ "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+++			  .fixups = &w25q256_fixups },
++ 	{ "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 512,
++ 			     SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
++ 	{ "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024,
+diff --git a/target/linux/generic/pending-5.4/490-ubi-auto-attach-mtd-device-named-ubi-or-data-on-boot.patch b/target/linux/generic/pending-5.4/490-ubi-auto-attach-mtd-device-named-ubi-or-data-on-boot.patch
+new file mode 100644
+index 0000000000..b21daea4f0
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/490-ubi-auto-attach-mtd-device-named-ubi-or-data-on-boot.patch
+@@ -0,0 +1,97 @@
++From: Daniel Golle <daniel@makrotopia.org>
++Subject: ubi: auto-attach mtd device named "ubi" or "data" on boot
++
++Signed-off-by: Daniel Golle <daniel@makrotopia.org>
++---
++ drivers/mtd/ubi/build.c | 36 ++++++++++++++++++++++++++++++++++++
++ 1 file changed, 36 insertions(+)
++
++--- a/drivers/mtd/ubi/build.c
+++++ b/drivers/mtd/ubi/build.c
++@@ -1168,6 +1168,73 @@ static struct mtd_info * __init open_mtd
++ 	return mtd;
++ }
++ 
+++/*
+++ * This function tries attaching mtd partitions named either "ubi" or "data"
+++ * during boot.
+++ */
+++static void __init ubi_auto_attach(void)
+++{
+++	int err;
+++	struct mtd_info *mtd;
+++	loff_t offset = 0;
+++	size_t len;
+++	char magic[4];
+++
+++	/* try attaching mtd device named "ubi" or "data" */
+++	mtd = open_mtd_device("ubi");
+++	if (IS_ERR(mtd))
+++		mtd = open_mtd_device("data");
+++
+++	if (IS_ERR(mtd))
+++		return;
+++
+++	/* get the first not bad block */
+++	if (mtd_can_have_bb(mtd))
+++		while (mtd_block_isbad(mtd, offset)) {
+++			offset += mtd->erasesize;
+++
+++			if (offset > mtd->size) {
+++				pr_err("UBI error: Failed to find a non-bad "
+++				       "block on mtd%d\n", mtd->index);
+++				goto cleanup;
+++			}
+++		}
+++
+++	/* check if the read from flash was successful */
+++	err = mtd_read(mtd, offset, 4, &len, (void *) magic);
+++	if ((err && !mtd_is_bitflip(err)) || len != 4) {
+++		pr_err("UBI error: unable to read from mtd%d\n", mtd->index);
+++		goto cleanup;
+++	}
+++
+++	/* check for a valid ubi magic */
+++	if (strncmp(magic, "UBI#", 4)) {
+++		pr_err("UBI error: no valid UBI magic found inside mtd%d\n", mtd->index);
+++		goto cleanup;
+++	}
+++
+++	/* don't auto-add media types where UBI doesn't makes sense */
+++	if (mtd->type != MTD_NANDFLASH &&
+++	    mtd->type != MTD_NORFLASH &&
+++	    mtd->type != MTD_DATAFLASH &&
+++	    mtd->type != MTD_MLCNANDFLASH)
+++		goto cleanup;
+++
+++	mutex_lock(&ubi_devices_mutex);
+++	pr_notice("UBI: auto-attach mtd%d\n", mtd->index);
+++	err = ubi_attach_mtd_dev(mtd, UBI_DEV_NUM_AUTO, 0, 0);
+++	mutex_unlock(&ubi_devices_mutex);
+++	if (err < 0) {
+++		pr_err("UBI error: cannot attach mtd%d\n", mtd->index);
+++		goto cleanup;
+++	}
+++
+++	return;
+++
+++cleanup:
+++	put_mtd_device(mtd);
+++}
+++
++ static int __init ubi_init(void)
++ {
++ 	int err, i, k;
++@@ -1251,6 +1318,12 @@ static int __init ubi_init(void)
++ 		}
++ 	}
++ 
+++	/* auto-attach mtd devices only if built-in to the kernel and no ubi.mtd
+++	 * parameter was given */
+++	if (IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV) &&
+++	    !ubi_is_module() && !mtd_devs)
+++		ubi_auto_attach();
+++
++ 	err = ubiblock_init();
++ 	if (err) {
++ 		pr_err("UBI error: block: cannot initialize, error %d\n", err);
+diff --git a/target/linux/generic/pending-5.4/491-ubi-auto-create-ubiblock-device-for-rootfs.patch b/target/linux/generic/pending-5.4/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
+new file mode 100644
+index 0000000000..61fcbac92e
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
+@@ -0,0 +1,66 @@
++From: Daniel Golle <daniel@makrotopia.org>
++Subject: ubi: auto-create ubiblock device for rootfs
++
++Signed-off-by: Daniel Golle <daniel@makrotopia.org>
++---
++ drivers/mtd/ubi/block.c | 42 ++++++++++++++++++++++++++++++++++++++++++
++ 1 file changed, 42 insertions(+)
++
++--- a/drivers/mtd/ubi/block.c
+++++ b/drivers/mtd/ubi/block.c
++@@ -652,6 +652,44 @@ static void __init ubiblock_create_from_
++ 	}
++ }
++ 
+++#define UBIFS_NODE_MAGIC  0x06101831
+++static inline int ubi_vol_is_ubifs(struct ubi_volume_desc *desc)
+++{
+++	int ret;
+++	uint32_t magic_of, magic;
+++	ret = ubi_read(desc, 0, (char *)&magic_of, 0, 4);
+++	if (ret)
+++		return 0;
+++	magic = le32_to_cpu(magic_of);
+++	return magic == UBIFS_NODE_MAGIC;
+++}
+++
+++static void __init ubiblock_create_auto_rootfs(void)
+++{
+++	int ubi_num, ret, is_ubifs;
+++	struct ubi_volume_desc *desc;
+++	struct ubi_volume_info vi;
+++
+++	for (ubi_num = 0; ubi_num < UBI_MAX_DEVICES; ubi_num++) {
+++		desc = ubi_open_volume_nm(ubi_num, "rootfs", UBI_READONLY);
+++		if (IS_ERR(desc))
+++			continue;
+++
+++		ubi_get_volume_info(desc, &vi);
+++		is_ubifs = ubi_vol_is_ubifs(desc);
+++		ubi_close_volume(desc);
+++		if (is_ubifs)
+++			break;
+++
+++		ret = ubiblock_create(&vi);
+++		if (ret)
+++			pr_err("UBI error: block: can't add '%s' volume, err=%d\n",
+++				vi.name, ret);
+++		/* always break if we get here */
+++		break;
+++	}
+++}
+++
++ static void ubiblock_remove_all(void)
++ {
++ 	struct ubiblock *next;
++@@ -684,6 +722,10 @@ int __init ubiblock_init(void)
++ 	 */
++ 	ubiblock_create_from_param();
++ 
+++	/* auto-attach "rootfs" volume if existing and non-ubifs */
+++	if (IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV))
+++		ubiblock_create_auto_rootfs();
+++
++ 	/*
++ 	 * Block devices are only created upon user requests, so we ignore
++ 	 * existing volumes.
+diff --git a/target/linux/generic/pending-5.4/492-try-auto-mounting-ubi0-rootfs-in-init-do_mounts.c.patch b/target/linux/generic/pending-5.4/492-try-auto-mounting-ubi0-rootfs-in-init-do_mounts.c.patch
+new file mode 100644
+index 0000000000..aa61f4ae8d
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/492-try-auto-mounting-ubi0-rootfs-in-init-do_mounts.c.patch
+@@ -0,0 +1,51 @@
++From: Daniel Golle <daniel@makrotopia.org>
++Subject: try auto-mounting ubi0:rootfs in init/do_mounts.c
++
++Signed-off-by: Daniel Golle <daniel@makrotopia.org>
++---
++ init/do_mounts.c | 26 +++++++++++++++++++++++++-
++ 1 file changed, 25 insertions(+), 1 deletion(-)
++
++--- a/init/do_mounts.c
+++++ b/init/do_mounts.c
++@@ -460,7 +460,28 @@ retry:
++ out:
++ 	put_page(page);
++ }
++- 
+++
+++static int __init mount_ubi_rootfs(void)
+++{
+++	int flags = MS_SILENT;
+++	int err, tried = 0;
+++
+++	while (tried < 2) {
+++		err = do_mount_root("ubi0:rootfs", "ubifs", flags, \
+++					root_mount_data);
+++		switch (err) {
+++			case -EACCES:
+++				flags |= MS_RDONLY;
+++				tried++;
+++				break;
+++			default:
+++				return err;
+++		}
+++	}
+++
+++	return -EINVAL;
+++}
+++
++ #ifdef CONFIG_ROOT_NFS
++ 
++ #define NFSROOT_TIMEOUT_MIN	5
++@@ -554,6 +575,10 @@ void __init mount_root(void)
++ 			change_floppy("root floppy");
++ 	}
++ #endif
+++#ifdef CONFIG_MTD_ROOTFS_ROOT_DEV
+++	if (!mount_ubi_rootfs())
+++		return;
+++#endif
++ #ifdef CONFIG_BLOCK
++ 	{
++ 		int err = create_dev("/dev/root", ROOT_DEV);
+diff --git a/target/linux/generic/pending-5.4/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch b/target/linux/generic/pending-5.4/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch
+new file mode 100644
+index 0000000000..2dff46807e
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch
+@@ -0,0 +1,34 @@
++From: Daniel Golle <daniel@makrotopia.org>
++Subject: ubi: set ROOT_DEV to ubiblock "rootfs" if unset
++
++Signed-off-by: Daniel Golle <daniel@makrotopia.org>
++---
++ drivers/mtd/ubi/block.c | 10 ++++++++++
++ 1 file changed, 10 insertions(+)
++
++--- a/drivers/mtd/ubi/block.c
+++++ b/drivers/mtd/ubi/block.c
++@@ -42,6 +42,7 @@
++ #include <linux/scatterlist.h>
++ #include <linux/idr.h>
++ #include <asm/div64.h>
+++#include <linux/root_dev.h>
++ 
++ #include "ubi-media.h"
++ #include "ubi.h"
++@@ -458,6 +459,15 @@ int ubiblock_create(struct ubi_volume_in
++ 	dev_info(disk_to_dev(dev->gd), "created from ubi%d:%d(%s)",
++ 		 dev->ubi_num, dev->vol_id, vi->name);
++ 	mutex_unlock(&devices_mutex);
+++
+++	if (!strcmp(vi->name, "rootfs") &&
+++	    IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV) &&
+++	    ROOT_DEV == 0) {
+++		pr_notice("ubiblock: device ubiblock%d_%d (%s) set to be root filesystem\n",
+++			  dev->ubi_num, dev->vol_id, vi->name);
+++		ROOT_DEV = MKDEV(gd->major, gd->first_minor);
+++	}
+++
++ 	return 0;
++ 
++ out_free_queue:
+diff --git a/target/linux/generic/pending-5.4/494-mtd-ubi-add-EOF-marker-support.patch b/target/linux/generic/pending-5.4/494-mtd-ubi-add-EOF-marker-support.patch
+new file mode 100644
+index 0000000000..fc48146221
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/494-mtd-ubi-add-EOF-marker-support.patch
+@@ -0,0 +1,60 @@
++From: Gabor Juhos <juhosg@openwrt.org>
++Subject: mtd: add EOF marker support to the UBI layer
++
++Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
++---
++ drivers/mtd/ubi/attach.c | 25 ++++++++++++++++++++++---
++ drivers/mtd/ubi/ubi.h    |  1 +
++ 2 files changed, 23 insertions(+), 3 deletions(-)
++
++--- a/drivers/mtd/ubi/attach.c
+++++ b/drivers/mtd/ubi/attach.c
++@@ -926,6 +926,13 @@ static bool vol_ignored(int vol_id)
++ #endif
++ }
++ 
+++static bool ec_hdr_has_eof(struct ubi_ec_hdr *ech)
+++{
+++	return ech->padding1[0] == 'E' &&
+++	       ech->padding1[1] == 'O' &&
+++	       ech->padding1[2] == 'F';
+++}
+++
++ /**
++  * scan_peb - scan and process UBI headers of a PEB.
++  * @ubi: UBI device description object
++@@ -958,9 +965,21 @@ static int scan_peb(struct ubi_device *u
++ 		return 0;
++ 	}
++ 
++-	err = ubi_io_read_ec_hdr(ubi, pnum, ech, 0);
++-	if (err < 0)
++-		return err;
+++	if (!ai->eof_found) {
+++		err = ubi_io_read_ec_hdr(ubi, pnum, ech, 0);
+++		if (err < 0)
+++			return err;
+++
+++		if (ec_hdr_has_eof(ech)) {
+++			pr_notice("UBI: EOF marker found, PEBs from %d will be erased\n",
+++				pnum);
+++			ai->eof_found = true;
+++		}
+++	}
+++
+++	if (ai->eof_found)
+++		err = UBI_IO_FF_BITFLIPS;
+++
++ 	switch (err) {
++ 	case 0:
++ 		break;
++--- a/drivers/mtd/ubi/ubi.h
+++++ b/drivers/mtd/ubi/ubi.h
++@@ -780,6 +780,7 @@ struct ubi_attach_info {
++ 	int mean_ec;
++ 	uint64_t ec_sum;
++ 	int ec_count;
+++	bool eof_found;
++ 	struct kmem_cache *aeb_slab_cache;
++ 	struct ubi_ec_hdr *ech;
++ 	struct ubi_vid_io_buf *vidb;
+diff --git a/target/linux/generic/pending-5.4/495-mtd-core-add-get_mtd_device_by_node.patch b/target/linux/generic/pending-5.4/495-mtd-core-add-get_mtd_device_by_node.patch
+new file mode 100644
+index 0000000000..a173381820
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/495-mtd-core-add-get_mtd_device_by_node.patch
+@@ -0,0 +1,75 @@
++From 1bd1b740f208d1cf4071932cc51860d37266c402 Mon Sep 17 00:00:00 2001
++From: Bernhard Frauendienst <kernel@nospam.obeliks.de>
++Date: Sat, 1 Sep 2018 00:30:11 +0200
++Subject: [PATCH 495/497] mtd: core: add get_mtd_device_by_node
++
++Add function to retrieve a mtd device by its OF node. Since drivers can
++assign arbitrary names to mtd devices in the absence of a label
++property, there is no other reliable way to retrieve a mtd device for a
++given OF node.
++
++Signed-off-by: Bernhard Frauendienst <kernel@nospam.obeliks.de>
++Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
++---
++ drivers/mtd/mtdcore.c   | 38 ++++++++++++++++++++++++++++++++++++++
++ include/linux/mtd/mtd.h |  2 ++
++ 2 files changed, 40 insertions(+)
++
++--- a/drivers/mtd/mtdcore.c
+++++ b/drivers/mtd/mtdcore.c
++@@ -1053,6 +1053,44 @@ out_unlock:
++ }
++ EXPORT_SYMBOL_GPL(get_mtd_device_nm);
++ 
+++/**
+++ *	get_mtd_device_by_node - obtain a validated handle for an MTD device
+++ *	by of_node
+++ *	@of_node: OF node of MTD device to open
+++ *
+++ *	This function returns MTD device description structure in case of
+++ *	success and an error code in case of failure.
+++ */
+++struct mtd_info *get_mtd_device_by_node(const struct device_node *of_node)
+++{
+++	int err = -ENODEV;
+++	struct mtd_info *mtd = NULL, *other;
+++
+++	mutex_lock(&mtd_table_mutex);
+++
+++	mtd_for_each_device(other) {
+++		if (of_node == other->dev.of_node) {
+++			mtd = other;
+++			break;
+++		}
+++	}
+++
+++	if (!mtd)
+++		goto out_unlock;
+++
+++	err = __get_mtd_device(mtd);
+++	if (err)
+++		goto out_unlock;
+++
+++	mutex_unlock(&mtd_table_mutex);
+++	return mtd;
+++
+++out_unlock:
+++	mutex_unlock(&mtd_table_mutex);
+++	return ERR_PTR(err);
+++}
+++EXPORT_SYMBOL_GPL(get_mtd_device_by_node);
+++
++ void put_mtd_device(struct mtd_info *mtd)
++ {
++ 	mutex_lock(&mtd_table_mutex);
++--- a/include/linux/mtd/mtd.h
+++++ b/include/linux/mtd/mtd.h
++@@ -586,6 +586,8 @@ extern struct mtd_info *get_mtd_device(s
++ extern int __get_mtd_device(struct mtd_info *mtd);
++ extern void __put_mtd_device(struct mtd_info *mtd);
++ extern struct mtd_info *get_mtd_device_nm(const char *name);
+++extern struct mtd_info *get_mtd_device_by_node(
+++		const struct device_node *of_node);
++ extern void put_mtd_device(struct mtd_info *mtd);
++ 
++ 
+diff --git a/target/linux/generic/pending-5.4/496-dt-bindings-add-bindings-for-mtd-concat-devices.patch b/target/linux/generic/pending-5.4/496-dt-bindings-add-bindings-for-mtd-concat-devices.patch
+new file mode 100644
+index 0000000000..01f3b9ec2d
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/496-dt-bindings-add-bindings-for-mtd-concat-devices.patch
+@@ -0,0 +1,52 @@
++From 5734c6669fba7ddb5ef491ccff7159d15dba0b59 Mon Sep 17 00:00:00 2001
++From: Bernhard Frauendienst <kernel@nospam.obeliks.de>
++Date: Wed, 5 Sep 2018 01:32:51 +0200
++Subject: [PATCH 496/497] dt-bindings: add bindings for mtd-concat devices
++
++Document virtual mtd-concat device bindings.
++
++Signed-off-by: Bernhard Frauendienst <kernel@nospam.obeliks.de>
++---
++ .../devicetree/bindings/mtd/mtd-concat.txt    | 36 +++++++++++++++++++
++ 1 file changed, 36 insertions(+)
++ create mode 100644 Documentation/devicetree/bindings/mtd/mtd-concat.txt
++
++--- /dev/null
+++++ b/Documentation/devicetree/bindings/mtd/mtd-concat.txt
++@@ -0,0 +1,36 @@
+++Virtual MTD concat device
+++
+++Requires properties:
+++- devices: list of phandles to mtd nodes that should be concatenated
+++
+++Example:
+++
+++&spi {
+++	flash0: flash@0 {
+++		...
+++	};
+++	flash1: flash@1 {
+++		...
+++	};
+++};
+++
+++flash {
+++	compatible = "mtd-concat";
+++
+++	devices = <&flash0 &flash1>;
+++
+++	partitions {
+++		compatible = "fixed-partitions";
+++
+++		partition@0 {
+++			label = "boot";
+++			reg = <0x0000000 0x0040000>;
+++			read-only;
+++		};
+++
+++		partition@40000 {
+++			label = "firmware";
+++			reg = <0x0040000 0x1fc0000>;
+++		};
+++	}
+++}
+diff --git a/target/linux/generic/pending-5.4/497-mtd-mtdconcat-add-dt-driver-for-concat-devices.patch b/target/linux/generic/pending-5.4/497-mtd-mtdconcat-add-dt-driver-for-concat-devices.patch
+new file mode 100644
+index 0000000000..1c42ed7bff
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/497-mtd-mtdconcat-add-dt-driver-for-concat-devices.patch
+@@ -0,0 +1,216 @@
++From e53f712d8eac71f54399b61038ccf87d2cee99d7 Mon Sep 17 00:00:00 2001
++From: Bernhard Frauendienst <kernel@nospam.obeliks.de>
++Date: Sat, 25 Aug 2018 12:35:22 +0200
++Subject: [PATCH 497/497] mtd: mtdconcat: add dt driver for concat devices
++
++Some mtd drivers like physmap variants have support for concatenating
++multiple mtd devices, but there is no generic way to define such a
++concat device from within the device tree.
++
++This is useful for some SoC boards that use multiple flash chips as
++memory banks of a single mtd device, with partitions spanning chip
++borders.
++
++This commit adds a driver for creating virtual mtd-concat devices. They
++must have a compatible = "mtd-concat" line, and define a list of devices
++to concat in the 'devices' property, for example:
++
++flash {
++  compatible = "mtd-concat";
++
++  devices = <&flash0 &flash1>;
++
++  partitions {
++    ...
++  };
++};
++
++The driver is added to the very end of the mtd Makefile to increase the
++likelyhood of all child devices already being loaded at the time of
++probing, preventing unnecessary deferred probes.
++
++Signed-off-by: Bernhard Frauendienst <kernel@nospam.obeliks.de>
++---
++ drivers/mtd/Kconfig                 |   2 +
++ drivers/mtd/Makefile                |   3 +
++ drivers/mtd/composite/Kconfig       |  12 +++
++ drivers/mtd/composite/Makefile      |   6 ++
++ drivers/mtd/composite/virt_concat.c | 128 ++++++++++++++++++++++++++++
++ 5 files changed, 151 insertions(+)
++ create mode 100644 drivers/mtd/composite/Kconfig
++ create mode 100644 drivers/mtd/composite/Makefile
++ create mode 100644 drivers/mtd/composite/virt_concat.c
++
++--- a/drivers/mtd/Kconfig
+++++ b/drivers/mtd/Kconfig
++@@ -228,4 +228,6 @@ source "drivers/mtd/ubi/Kconfig"
++ 
++ source "drivers/mtd/hyperbus/Kconfig"
++ 
+++source "drivers/mtd/composite/Kconfig"
+++
++ endif # MTD
++--- a/drivers/mtd/Makefile
+++++ b/drivers/mtd/Makefile
++@@ -32,3 +32,6 @@ obj-y		+= chips/ lpddr/ maps/ devices/ n
++ obj-$(CONFIG_MTD_SPI_NOR)	+= spi-nor/
++ obj-$(CONFIG_MTD_UBI)		+= ubi/
++ obj-$(CONFIG_MTD_HYPERBUS)	+= hyperbus/
+++
+++# Composite drivers must be loaded last
+++obj-y				+= composite/
++--- /dev/null
+++++ b/drivers/mtd/composite/Kconfig
++@@ -0,0 +1,12 @@
+++menu "Composite MTD device drivers"
+++	depends on MTD!=n
+++
+++config MTD_VIRT_CONCAT
+++	tristate "Virtual concat MTD device"
+++	help
+++	  This driver allows creation of a virtual MTD concat device, which
+++	  concatenates multiple underlying MTD devices to a single device.
+++	  This is required by some SoC boards where multiple memory banks are
+++	  used as one device with partitions spanning across device boundaries.
+++
+++endmenu
++--- /dev/null
+++++ b/drivers/mtd/composite/Makefile
++@@ -0,0 +1,6 @@
+++# SPDX-License-Identifier: GPL-2.0
+++#
+++# linux/drivers/mtd/composite/Makefile
+++#
+++
+++obj-$(CONFIG_MTD_VIRT_CONCAT)   += virt_concat.o
++--- /dev/null
+++++ b/drivers/mtd/composite/virt_concat.c
++@@ -0,0 +1,128 @@
+++// SPDX-License-Identifier: GPL-2.0+
+++/*
+++ * Virtual concat MTD device driver
+++ *
+++ * Copyright (C) 2018 Bernhard Frauendienst
+++ * Author: Bernhard Frauendienst, kernel@nospam.obeliks.de
+++ */
+++
+++#include <linux/module.h>
+++#include <linux/device.h>
+++#include <linux/mtd/concat.h>
+++#include <linux/mtd/mtd.h>
+++#include <linux/mtd/partitions.h>
+++#include <linux/of.h>
+++#include <linux/of_platform.h>
+++#include <linux/slab.h>
+++
+++/*
+++ * struct of_virt_concat - platform device driver data.
+++ * @cmtd the final mtd_concat device
+++ * @num_devices the number of devices in @devices
+++ * @devices points to an array of devices already loaded
+++ */
+++struct of_virt_concat {
+++	struct mtd_info	*cmtd;
+++	int num_devices;
+++	struct mtd_info	**devices;
+++};
+++
+++static int virt_concat_remove(struct platform_device *pdev)
+++{
+++	struct of_virt_concat *info;
+++	int i;
+++
+++	info = platform_get_drvdata(pdev);
+++	if (!info)
+++		return 0;
+++
+++	// unset data for when this is called after a probe error
+++	platform_set_drvdata(pdev, NULL);
+++
+++	if (info->cmtd) {
+++		mtd_device_unregister(info->cmtd);
+++		mtd_concat_destroy(info->cmtd);
+++	}
+++
+++	if (info->devices) {
+++		for (i = 0; i < info->num_devices; i++)
+++			put_mtd_device(info->devices[i]);
+++	}
+++
+++	return 0;
+++}
+++
+++static int virt_concat_probe(struct platform_device *pdev)
+++{
+++	struct device_node *node = pdev->dev.of_node;
+++	struct of_phandle_iterator it;
+++	struct of_virt_concat *info;
+++	struct mtd_info *mtd;
+++	int err = 0, count;
+++
+++	count = of_count_phandle_with_args(node, "devices", NULL);
+++	if (count <= 0)
+++		return -EINVAL;
+++
+++	info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
+++	if (!info)
+++		return -ENOMEM;
+++	info->devices = devm_kcalloc(&pdev->dev, count,
+++				     sizeof(*(info->devices)), GFP_KERNEL);
+++	if (!info->devices) {
+++		err = -ENOMEM;
+++		goto err_remove;
+++	}
+++
+++	platform_set_drvdata(pdev, info);
+++
+++	of_for_each_phandle(&it, err, node, "devices", NULL, 0) {
+++		mtd = get_mtd_device_by_node(it.node);
+++		if (IS_ERR(mtd)) {
+++			of_node_put(it.node);
+++			err = -EPROBE_DEFER;
+++			goto err_remove;
+++		}
+++
+++		info->devices[info->num_devices++] = mtd;
+++	}
+++
+++	info->cmtd = mtd_concat_create(info->devices, info->num_devices,
+++				       dev_name(&pdev->dev));
+++	if (!info->cmtd) {
+++		err = -ENXIO;
+++		goto err_remove;
+++	}
+++
+++	info->cmtd->dev.parent = &pdev->dev;
+++	mtd_set_of_node(info->cmtd, node);
+++	mtd_device_register(info->cmtd, NULL, 0);
+++
+++	return 0;
+++
+++err_remove:
+++	virt_concat_remove(pdev);
+++
+++	return err;
+++}
+++
+++static const struct of_device_id virt_concat_of_match[] = {
+++	{ .compatible = "mtd-concat", },
+++	{ /* sentinel */ }
+++};
+++MODULE_DEVICE_TABLE(of, virt_concat_of_match);
+++
+++static struct platform_driver virt_concat_driver = {
+++	.probe = virt_concat_probe,
+++	.remove = virt_concat_remove,
+++	.driver	 = {
+++		.name   = "virt-mtdconcat",
+++		.of_match_table = virt_concat_of_match,
+++	},
+++};
+++
+++module_platform_driver(virt_concat_driver);
+++
+++MODULE_LICENSE("GPL v2");
+++MODULE_AUTHOR("Bernhard Frauendienst <kernel@nospam.obeliks.de>");
+++MODULE_DESCRIPTION("Virtual concat MTD device driver");
+diff --git a/target/linux/generic/pending-5.4/498-mtd-mtdconcat-select-readwrite-function.patch b/target/linux/generic/pending-5.4/498-mtd-mtdconcat-select-readwrite-function.patch
+new file mode 100644
+index 0000000000..129bbffd0f
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/498-mtd-mtdconcat-select-readwrite-function.patch
+@@ -0,0 +1,24 @@
++--- a/drivers/mtd/mtdconcat.c
+++++ b/drivers/mtd/mtdconcat.c
++@@ -642,8 +642,12 @@ struct mtd_info *mtd_concat_create(struc
++ 		concat->mtd._writev = concat_writev;
++ 	if (subdev[0]->_read_oob)
++ 		concat->mtd._read_oob = concat_read_oob;
+++	else
+++		concat->mtd._read = concat_read;
++ 	if (subdev[0]->_write_oob)
++ 		concat->mtd._write_oob = concat_write_oob;
+++	else
+++		concat->mtd._write = concat_write;
++ 	if (subdev[0]->_block_isbad)
++ 		concat->mtd._block_isbad = concat_block_isbad;
++ 	if (subdev[0]->_block_markbad)
++@@ -701,8 +705,6 @@ struct mtd_info *mtd_concat_create(struc
++ 	concat->mtd.name = name;
++ 
++ 	concat->mtd._erase = concat_erase;
++-	concat->mtd._read = concat_read;
++-	concat->mtd._write = concat_write;
++ 	concat->mtd._sync = concat_sync;
++ 	concat->mtd._lock = concat_lock;
++ 	concat->mtd._unlock = concat_unlock;
+diff --git a/target/linux/generic/pending-5.4/530-jffs2_make_lzma_available.patch b/target/linux/generic/pending-5.4/530-jffs2_make_lzma_available.patch
+new file mode 100644
+index 0000000000..052db7ef5c
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/530-jffs2_make_lzma_available.patch
+@@ -0,0 +1,5180 @@
++From: Alexandros C. Couloumbis <alex@ozo.com>
++Subject: fs: add jffs2/lzma support (not activated by default yet)
++
++lede-commit: c2c88d315fa0e881f8b19da07b62859b915b11b2
++Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
++---
++ fs/jffs2/Kconfig             |    9 +
++ fs/jffs2/Makefile            |    3 +
++ fs/jffs2/compr.c             |    6 +
++ fs/jffs2/compr.h             |   10 +-
++ fs/jffs2/compr_lzma.c        |  128 +++
++ fs/jffs2/super.c             |   33 +-
++ include/linux/lzma.h         |   62 ++
++ include/linux/lzma/LzFind.h  |  115 +++
++ include/linux/lzma/LzHash.h  |   54 +
++ include/linux/lzma/LzmaDec.h |  231 +++++
++ include/linux/lzma/LzmaEnc.h |   80 ++
++ include/linux/lzma/Types.h   |  226 +++++
++ include/uapi/linux/jffs2.h   |    1 +
++ lib/Kconfig                  |    6 +
++ lib/Makefile                 |   12 +
++ lib/lzma/LzFind.c            |  761 ++++++++++++++
++ lib/lzma/LzmaDec.c           |  999 +++++++++++++++++++
++ lib/lzma/LzmaEnc.c           | 2271 ++++++++++++++++++++++++++++++++++++++++++
++ lib/lzma/Makefile            |    7 +
++ 19 files changed, 5008 insertions(+), 6 deletions(-)
++ create mode 100644 fs/jffs2/compr_lzma.c
++ create mode 100644 include/linux/lzma.h
++ create mode 100644 include/linux/lzma/LzFind.h
++ create mode 100644 include/linux/lzma/LzHash.h
++ create mode 100644 include/linux/lzma/LzmaDec.h
++ create mode 100644 include/linux/lzma/LzmaEnc.h
++ create mode 100644 include/linux/lzma/Types.h
++ create mode 100644 lib/lzma/LzFind.c
++ create mode 100644 lib/lzma/LzmaDec.c
++ create mode 100644 lib/lzma/LzmaEnc.c
++ create mode 100644 lib/lzma/Makefile
++
++--- a/fs/jffs2/Kconfig
+++++ b/fs/jffs2/Kconfig
++@@ -136,6 +136,15 @@ config JFFS2_LZO
++ 	  This feature was added in July, 2007. Say 'N' if you need
++ 	  compatibility with older bootloaders or kernels.
++ 
+++config JFFS2_LZMA
+++	bool "JFFS2 LZMA compression support" if JFFS2_COMPRESSION_OPTIONS
+++	select LZMA_COMPRESS
+++	select LZMA_DECOMPRESS
+++	depends on JFFS2_FS
+++	default n
+++	help
+++	  JFFS2 wrapper to the LZMA C SDK
+++
++ config JFFS2_RTIME
++ 	bool "JFFS2 RTIME compression support" if JFFS2_COMPRESSION_OPTIONS
++ 	depends on JFFS2_FS
++--- a/fs/jffs2/Makefile
+++++ b/fs/jffs2/Makefile
++@@ -19,4 +19,7 @@ jffs2-$(CONFIG_JFFS2_RUBIN)	+= compr_rub
++ jffs2-$(CONFIG_JFFS2_RTIME)	+= compr_rtime.o
++ jffs2-$(CONFIG_JFFS2_ZLIB)	+= compr_zlib.o
++ jffs2-$(CONFIG_JFFS2_LZO)	+= compr_lzo.o
+++jffs2-$(CONFIG_JFFS2_LZMA)	+= compr_lzma.o
++ jffs2-$(CONFIG_JFFS2_SUMMARY)   += summary.o
+++
+++CFLAGS_compr_lzma.o += -Iinclude/linux -Ilib/lzma
++--- a/fs/jffs2/compr.c
+++++ b/fs/jffs2/compr.c
++@@ -378,6 +378,9 @@ int __init jffs2_compressors_init(void)
++ #ifdef CONFIG_JFFS2_LZO
++ 	jffs2_lzo_init();
++ #endif
+++#ifdef CONFIG_JFFS2_LZMA
+++	jffs2_lzma_init();
+++#endif
++ /* Setting default compression mode */
++ #ifdef CONFIG_JFFS2_CMODE_NONE
++ 	jffs2_compression_mode = JFFS2_COMPR_MODE_NONE;
++@@ -401,6 +404,9 @@ int __init jffs2_compressors_init(void)
++ int jffs2_compressors_exit(void)
++ {
++ /* Unregistering compressors */
+++#ifdef CONFIG_JFFS2_LZMA
+++	jffs2_lzma_exit();
+++#endif
++ #ifdef CONFIG_JFFS2_LZO
++ 	jffs2_lzo_exit();
++ #endif
++--- a/fs/jffs2/compr.h
+++++ b/fs/jffs2/compr.h
++@@ -29,9 +29,9 @@
++ #define JFFS2_DYNRUBIN_PRIORITY  20
++ #define JFFS2_LZARI_PRIORITY     30
++ #define JFFS2_RTIME_PRIORITY     50
++-#define JFFS2_ZLIB_PRIORITY      60
++-#define JFFS2_LZO_PRIORITY       80
++-
+++#define JFFS2_LZMA_PRIORITY      70
+++#define JFFS2_ZLIB_PRIORITY      80
+++#define JFFS2_LZO_PRIORITY       90
++ 
++ #define JFFS2_RUBINMIPS_DISABLED /* RUBINs will be used only */
++ #define JFFS2_DYNRUBIN_DISABLED  /*	   for decompression */
++@@ -101,5 +101,9 @@ void jffs2_zlib_exit(void);
++ int jffs2_lzo_init(void);
++ void jffs2_lzo_exit(void);
++ #endif
+++#ifdef CONFIG_JFFS2_LZMA
+++int jffs2_lzma_init(void);
+++void jffs2_lzma_exit(void);
+++#endif
++ 
++ #endif /* __JFFS2_COMPR_H__ */
++--- /dev/null
+++++ b/fs/jffs2/compr_lzma.c
++@@ -0,0 +1,128 @@
+++/*
+++ * JFFS2 -- Journalling Flash File System, Version 2.
+++ *
+++ * For licensing information, see the file 'LICENCE' in this directory.
+++ *
+++ * JFFS2 wrapper to the LZMA C SDK
+++ *
+++ */
+++
+++#include <linux/lzma.h>
+++#include "compr.h"
+++
+++#ifdef __KERNEL__
+++	static DEFINE_MUTEX(deflate_mutex);
+++#endif
+++
+++CLzmaEncHandle *p;
+++Byte propsEncoded[LZMA_PROPS_SIZE];
+++SizeT propsSize = sizeof(propsEncoded);
+++
+++STATIC void lzma_free_workspace(void)
+++{
+++	LzmaEnc_Destroy(p, &lzma_alloc, &lzma_alloc);
+++}
+++
+++STATIC int INIT lzma_alloc_workspace(CLzmaEncProps *props)
+++{
+++	if ((p = (CLzmaEncHandle *)LzmaEnc_Create(&lzma_alloc)) == NULL)
+++	{
+++		PRINT_ERROR("Failed to allocate lzma deflate workspace\n");
+++		return -ENOMEM;
+++	}
+++
+++	if (LzmaEnc_SetProps(p, props) != SZ_OK)
+++	{
+++		lzma_free_workspace();
+++		return -1;
+++	}
+++
+++	if (LzmaEnc_WriteProperties(p, propsEncoded, &propsSize) != SZ_OK)
+++	{
+++		lzma_free_workspace();
+++		return -1;
+++	}
+++
+++	return 0;
+++}
+++
+++STATIC int jffs2_lzma_compress(unsigned char *data_in, unsigned char *cpage_out,
+++			      uint32_t *sourcelen, uint32_t *dstlen)
+++{
+++	SizeT compress_size = (SizeT)(*dstlen);
+++	int ret;
+++
+++	#ifdef __KERNEL__
+++		mutex_lock(&deflate_mutex);
+++	#endif
+++
+++	ret = LzmaEnc_MemEncode(p, cpage_out, &compress_size, data_in, *sourcelen,
+++		0, NULL, &lzma_alloc, &lzma_alloc);
+++
+++	#ifdef __KERNEL__
+++		mutex_unlock(&deflate_mutex);
+++	#endif
+++
+++	if (ret != SZ_OK)
+++		return -1;
+++
+++	*dstlen = (uint32_t)compress_size;
+++
+++	return 0;
+++}
+++
+++STATIC int jffs2_lzma_decompress(unsigned char *data_in, unsigned char *cpage_out,
+++				 uint32_t srclen, uint32_t destlen)
+++{
+++	int ret;
+++	SizeT dl = (SizeT)destlen;
+++	SizeT sl = (SizeT)srclen;
+++	ELzmaStatus status;
+++
+++	ret = LzmaDecode(cpage_out, &dl, data_in, &sl, propsEncoded,
+++		propsSize, LZMA_FINISH_ANY, &status, &lzma_alloc);
+++
+++	if (ret != SZ_OK || status == LZMA_STATUS_NOT_FINISHED || dl != (SizeT)destlen)
+++		return -1;
+++
+++	return 0;
+++}
+++
+++static struct jffs2_compressor jffs2_lzma_comp = {
+++	.priority = JFFS2_LZMA_PRIORITY,
+++	.name = "lzma",
+++	.compr = JFFS2_COMPR_LZMA,
+++	.compress = &jffs2_lzma_compress,
+++	.decompress = &jffs2_lzma_decompress,
+++	.disabled = 0,
+++};
+++
+++int INIT jffs2_lzma_init(void)
+++{
+++	int ret;
+++	CLzmaEncProps props;
+++	LzmaEncProps_Init(&props);
+++
+++	props.dictSize = LZMA_BEST_DICT(0x2000);
+++	props.level = LZMA_BEST_LEVEL;
+++	props.lc = LZMA_BEST_LC;
+++	props.lp = LZMA_BEST_LP;
+++	props.pb = LZMA_BEST_PB;
+++	props.fb = LZMA_BEST_FB;
+++
+++	ret = lzma_alloc_workspace(&props);
+++	if (ret < 0)
+++		return ret;
+++
+++	ret = jffs2_register_compressor(&jffs2_lzma_comp);
+++	if (ret)
+++		lzma_free_workspace();
+++
+++	return ret;
+++}
+++
+++void jffs2_lzma_exit(void)
+++{
+++	jffs2_unregister_compressor(&jffs2_lzma_comp);
+++	lzma_free_workspace();
+++}
++--- a/fs/jffs2/super.c
+++++ b/fs/jffs2/super.c
++@@ -380,14 +380,41 @@ static int __init init_jffs2_fs(void)
++ 	BUILD_BUG_ON(sizeof(struct jffs2_raw_inode) != 68);
++ 	BUILD_BUG_ON(sizeof(struct jffs2_raw_summary) != 32);
++ 
++-	pr_info("version 2.2."
+++	pr_info("version 2.2"
++ #ifdef CONFIG_JFFS2_FS_WRITEBUFFER
++ 	       " (NAND)"
++ #endif
++ #ifdef CONFIG_JFFS2_SUMMARY
++-	       " (SUMMARY) "
+++	       " (SUMMARY)"
++ #endif
++-	       " © 2001-2006 Red Hat, Inc.\n");
+++#ifdef CONFIG_JFFS2_ZLIB
+++	       " (ZLIB)"
+++#endif
+++#ifdef CONFIG_JFFS2_LZO
+++	       " (LZO)"
+++#endif
+++#ifdef CONFIG_JFFS2_LZMA
+++	       " (LZMA)"
+++#endif
+++#ifdef CONFIG_JFFS2_RTIME
+++	       " (RTIME)"
+++#endif
+++#ifdef CONFIG_JFFS2_RUBIN
+++	       " (RUBIN)"
+++#endif
+++#ifdef  CONFIG_JFFS2_CMODE_NONE
+++	       " (CMODE_NONE)"
+++#endif
+++#ifdef CONFIG_JFFS2_CMODE_PRIORITY
+++	       " (CMODE_PRIORITY)"
+++#endif
+++#ifdef CONFIG_JFFS2_CMODE_SIZE
+++	       " (CMODE_SIZE)"
+++#endif
+++#ifdef CONFIG_JFFS2_CMODE_FAVOURLZO
+++	       " (CMODE_FAVOURLZO)"
+++#endif
+++	       " (c) 2001-2006 Red Hat, Inc.\n");
++ 
++ 	jffs2_inode_cachep = kmem_cache_create("jffs2_i",
++ 					     sizeof(struct jffs2_inode_info),
++--- /dev/null
+++++ b/include/linux/lzma.h
++@@ -0,0 +1,62 @@
+++#ifndef __LZMA_H__
+++#define __LZMA_H__
+++
+++#ifdef __KERNEL__
+++	#include <linux/kernel.h>
+++	#include <linux/sched.h>
+++	#include <linux/slab.h>
+++	#include <linux/vmalloc.h>
+++	#include <linux/init.h>
+++	#define LZMA_MALLOC vmalloc
+++	#define LZMA_FREE vfree
+++	#define PRINT_ERROR(msg) printk(KERN_WARNING #msg)
+++	#define INIT __init
+++	#define STATIC static
+++#else
+++	#include <stdint.h>
+++	#include <stdlib.h>
+++	#include <stdio.h>
+++	#include <unistd.h>
+++	#include <string.h>
+++	#include <asm/types.h>
+++	#include <errno.h>
+++	#include <linux/jffs2.h>
+++	#ifndef PAGE_SIZE
+++		extern int page_size;
+++		#define PAGE_SIZE page_size
+++	#endif
+++	#define LZMA_MALLOC malloc
+++	#define LZMA_FREE free
+++	#define PRINT_ERROR(msg) fprintf(stderr, msg)
+++	#define INIT
+++	#define STATIC
+++#endif
+++
+++#include "lzma/LzmaDec.h"
+++#include "lzma/LzmaEnc.h"
+++
+++#define LZMA_BEST_LEVEL (9)
+++#define LZMA_BEST_LC    (0)
+++#define LZMA_BEST_LP    (0)
+++#define LZMA_BEST_PB    (0)
+++#define LZMA_BEST_FB  (273)
+++
+++#define LZMA_BEST_DICT(n) (((int)((n) / 2)) * 2)
+++
+++static void *p_lzma_malloc(void *p, size_t size)
+++{
+++	if (size == 0)
+++		return NULL;
+++
+++	return LZMA_MALLOC(size);
+++}
+++
+++static void p_lzma_free(void *p, void *address)
+++{
+++	if (address != NULL)
+++		LZMA_FREE(address);
+++}
+++
+++static ISzAlloc lzma_alloc = {p_lzma_malloc, p_lzma_free};
+++
+++#endif
++--- /dev/null
+++++ b/include/linux/lzma/LzFind.h
++@@ -0,0 +1,115 @@
+++/* LzFind.h -- Match finder for LZ algorithms
+++2009-04-22 : Igor Pavlov : Public domain */
+++
+++#ifndef __LZ_FIND_H
+++#define __LZ_FIND_H
+++
+++#include "Types.h"
+++
+++#ifdef __cplusplus
+++extern "C" {
+++#endif
+++
+++typedef UInt32 CLzRef;
+++
+++typedef struct _CMatchFinder
+++{
+++  Byte *buffer;
+++  UInt32 pos;
+++  UInt32 posLimit;
+++  UInt32 streamPos;
+++  UInt32 lenLimit;
+++
+++  UInt32 cyclicBufferPos;
+++  UInt32 cyclicBufferSize; /* it must be = (historySize + 1) */
+++
+++  UInt32 matchMaxLen;
+++  CLzRef *hash;
+++  CLzRef *son;
+++  UInt32 hashMask;
+++  UInt32 cutValue;
+++
+++  Byte *bufferBase;
+++  ISeqInStream *stream;
+++  int streamEndWasReached;
+++
+++  UInt32 blockSize;
+++  UInt32 keepSizeBefore;
+++  UInt32 keepSizeAfter;
+++
+++  UInt32 numHashBytes;
+++  int directInput;
+++  size_t directInputRem;
+++  int btMode;
+++  int bigHash;
+++  UInt32 historySize;
+++  UInt32 fixedHashSize;
+++  UInt32 hashSizeSum;
+++  UInt32 numSons;
+++  SRes result;
+++  UInt32 crc[256];
+++} CMatchFinder;
+++
+++#define Inline_MatchFinder_GetPointerToCurrentPos(p) ((p)->buffer)
+++#define Inline_MatchFinder_GetIndexByte(p, index) ((p)->buffer[(Int32)(index)])
+++
+++#define Inline_MatchFinder_GetNumAvailableBytes(p) ((p)->streamPos - (p)->pos)
+++
+++int MatchFinder_NeedMove(CMatchFinder *p);
+++Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p);
+++void MatchFinder_MoveBlock(CMatchFinder *p);
+++void MatchFinder_ReadIfRequired(CMatchFinder *p);
+++
+++void MatchFinder_Construct(CMatchFinder *p);
+++
+++/* Conditions:
+++     historySize <= 3 GB
+++     keepAddBufferBefore + matchMaxLen + keepAddBufferAfter < 511MB
+++*/
+++int MatchFinder_Create(CMatchFinder *p, UInt32 historySize,
+++    UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter,
+++    ISzAlloc *alloc);
+++void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc);
+++void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems);
+++void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue);
+++
+++UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *buffer, CLzRef *son,
+++    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue,
+++    UInt32 *distances, UInt32 maxLen);
+++
+++/*
+++Conditions:
+++  Mf_GetNumAvailableBytes_Func must be called before each Mf_GetMatchLen_Func.
+++  Mf_GetPointerToCurrentPos_Func's result must be used only before any other function
+++*/
+++
+++typedef void (*Mf_Init_Func)(void *object);
+++typedef Byte (*Mf_GetIndexByte_Func)(void *object, Int32 index);
+++typedef UInt32 (*Mf_GetNumAvailableBytes_Func)(void *object);
+++typedef const Byte * (*Mf_GetPointerToCurrentPos_Func)(void *object);
+++typedef UInt32 (*Mf_GetMatches_Func)(void *object, UInt32 *distances);
+++typedef void (*Mf_Skip_Func)(void *object, UInt32);
+++
+++typedef struct _IMatchFinder
+++{
+++  Mf_Init_Func Init;
+++  Mf_GetIndexByte_Func GetIndexByte;
+++  Mf_GetNumAvailableBytes_Func GetNumAvailableBytes;
+++  Mf_GetPointerToCurrentPos_Func GetPointerToCurrentPos;
+++  Mf_GetMatches_Func GetMatches;
+++  Mf_Skip_Func Skip;
+++} IMatchFinder;
+++
+++void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable);
+++
+++void MatchFinder_Init(CMatchFinder *p);
+++UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
+++UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
+++void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
+++void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
+++
+++#ifdef __cplusplus
+++}
+++#endif
+++
+++#endif
++--- /dev/null
+++++ b/include/linux/lzma/LzHash.h
++@@ -0,0 +1,54 @@
+++/* LzHash.h -- HASH functions for LZ algorithms
+++2009-02-07 : Igor Pavlov : Public domain */
+++
+++#ifndef __LZ_HASH_H
+++#define __LZ_HASH_H
+++
+++#define kHash2Size (1 << 10)
+++#define kHash3Size (1 << 16)
+++#define kHash4Size (1 << 20)
+++
+++#define kFix3HashSize (kHash2Size)
+++#define kFix4HashSize (kHash2Size + kHash3Size)
+++#define kFix5HashSize (kHash2Size + kHash3Size + kHash4Size)
+++
+++#define HASH2_CALC hashValue = cur[0] | ((UInt32)cur[1] << 8);
+++
+++#define HASH3_CALC { \
+++  UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
+++  hash2Value = temp & (kHash2Size - 1); \
+++  hashValue = (temp ^ ((UInt32)cur[2] << 8)) & p->hashMask; }
+++
+++#define HASH4_CALC { \
+++  UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
+++  hash2Value = temp & (kHash2Size - 1); \
+++  hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \
+++  hashValue = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)) & p->hashMask; }
+++
+++#define HASH5_CALC { \
+++  UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
+++  hash2Value = temp & (kHash2Size - 1); \
+++  hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \
+++  hash4Value = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)); \
+++  hashValue = (hash4Value ^ (p->crc[cur[4]] << 3)) & p->hashMask; \
+++  hash4Value &= (kHash4Size - 1); }
+++
+++/* #define HASH_ZIP_CALC hashValue = ((cur[0] | ((UInt32)cur[1] << 8)) ^ p->crc[cur[2]]) & 0xFFFF; */
+++#define HASH_ZIP_CALC hashValue = ((cur[2] | ((UInt32)cur[0] << 8)) ^ p->crc[cur[1]]) & 0xFFFF;
+++
+++
+++#define MT_HASH2_CALC \
+++  hash2Value = (p->crc[cur[0]] ^ cur[1]) & (kHash2Size - 1);
+++
+++#define MT_HASH3_CALC { \
+++  UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
+++  hash2Value = temp & (kHash2Size - 1); \
+++  hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); }
+++
+++#define MT_HASH4_CALC { \
+++  UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
+++  hash2Value = temp & (kHash2Size - 1); \
+++  hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \
+++  hash4Value = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)) & (kHash4Size - 1); }
+++
+++#endif
++--- /dev/null
+++++ b/include/linux/lzma/LzmaDec.h
++@@ -0,0 +1,231 @@
+++/* LzmaDec.h -- LZMA Decoder
+++2009-02-07 : Igor Pavlov : Public domain */
+++
+++#ifndef __LZMA_DEC_H
+++#define __LZMA_DEC_H
+++
+++#include "Types.h"
+++
+++#ifdef __cplusplus
+++extern "C" {
+++#endif
+++
+++/* #define _LZMA_PROB32 */
+++/* _LZMA_PROB32 can increase the speed on some CPUs,
+++   but memory usage for CLzmaDec::probs will be doubled in that case */
+++
+++#ifdef _LZMA_PROB32
+++#define CLzmaProb UInt32
+++#else
+++#define CLzmaProb UInt16
+++#endif
+++
+++
+++/* ---------- LZMA Properties ---------- */
+++
+++#define LZMA_PROPS_SIZE 5
+++
+++typedef struct _CLzmaProps
+++{
+++  unsigned lc, lp, pb;
+++  UInt32 dicSize;
+++} CLzmaProps;
+++
+++/* LzmaProps_Decode - decodes properties
+++Returns:
+++  SZ_OK
+++  SZ_ERROR_UNSUPPORTED - Unsupported properties
+++*/
+++
+++SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size);
+++
+++
+++/* ---------- LZMA Decoder state ---------- */
+++
+++/* LZMA_REQUIRED_INPUT_MAX = number of required input bytes for worst case.
+++   Num bits = log2((2^11 / 31) ^ 22) + 26 < 134 + 26 = 160; */
+++
+++#define LZMA_REQUIRED_INPUT_MAX 20
+++
+++typedef struct
+++{
+++  CLzmaProps prop;
+++  CLzmaProb *probs;
+++  Byte *dic;
+++  const Byte *buf;
+++  UInt32 range, code;
+++  SizeT dicPos;
+++  SizeT dicBufSize;
+++  UInt32 processedPos;
+++  UInt32 checkDicSize;
+++  unsigned state;
+++  UInt32 reps[4];
+++  unsigned remainLen;
+++  int needFlush;
+++  int needInitState;
+++  UInt32 numProbs;
+++  unsigned tempBufSize;
+++  Byte tempBuf[LZMA_REQUIRED_INPUT_MAX];
+++} CLzmaDec;
+++
+++#define LzmaDec_Construct(p) { (p)->dic = 0; (p)->probs = 0; }
+++
+++void LzmaDec_Init(CLzmaDec *p);
+++
+++/* There are two types of LZMA streams:
+++     0) Stream with end mark. That end mark adds about 6 bytes to compressed size.
+++     1) Stream without end mark. You must know exact uncompressed size to decompress such stream. */
+++
+++typedef enum
+++{
+++  LZMA_FINISH_ANY,   /* finish at any point */
+++  LZMA_FINISH_END    /* block must be finished at the end */
+++} ELzmaFinishMode;
+++
+++/* ELzmaFinishMode has meaning only if the decoding reaches output limit !!!
+++
+++   You must use LZMA_FINISH_END, when you know that current output buffer
+++   covers last bytes of block. In other cases you must use LZMA_FINISH_ANY.
+++
+++   If LZMA decoder sees end marker before reaching output limit, it returns SZ_OK,
+++   and output value of destLen will be less than output buffer size limit.
+++   You can check status result also.
+++
+++   You can use multiple checks to test data integrity after full decompression:
+++     1) Check Result and "status" variable.
+++     2) Check that output(destLen) = uncompressedSize, if you know real uncompressedSize.
+++     3) Check that output(srcLen) = compressedSize, if you know real compressedSize.
+++        You must use correct finish mode in that case. */
+++
+++typedef enum
+++{
+++  LZMA_STATUS_NOT_SPECIFIED,               /* use main error code instead */
+++  LZMA_STATUS_FINISHED_WITH_MARK,          /* stream was finished with end mark. */
+++  LZMA_STATUS_NOT_FINISHED,                /* stream was not finished */
+++  LZMA_STATUS_NEEDS_MORE_INPUT,            /* you must provide more input bytes */
+++  LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK  /* there is probability that stream was finished without end mark */
+++} ELzmaStatus;
+++
+++/* ELzmaStatus is used only as output value for function call */
+++
+++
+++/* ---------- Interfaces ---------- */
+++
+++/* There are 3 levels of interfaces:
+++     1) Dictionary Interface
+++     2) Buffer Interface
+++     3) One Call Interface
+++   You can select any of these interfaces, but don't mix functions from different
+++   groups for same object. */
+++
+++
+++/* There are two variants to allocate state for Dictionary Interface:
+++     1) LzmaDec_Allocate / LzmaDec_Free
+++     2) LzmaDec_AllocateProbs / LzmaDec_FreeProbs
+++   You can use variant 2, if you set dictionary buffer manually.
+++   For Buffer Interface you must always use variant 1.
+++
+++LzmaDec_Allocate* can return:
+++  SZ_OK
+++  SZ_ERROR_MEM         - Memory allocation error
+++  SZ_ERROR_UNSUPPORTED - Unsupported properties
+++*/
+++
+++SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc);
+++void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc);
+++
+++SRes LzmaDec_Allocate(CLzmaDec *state, const Byte *prop, unsigned propsSize, ISzAlloc *alloc);
+++void LzmaDec_Free(CLzmaDec *state, ISzAlloc *alloc);
+++
+++/* ---------- Dictionary Interface ---------- */
+++
+++/* You can use it, if you want to eliminate the overhead for data copying from
+++   dictionary to some other external buffer.
+++   You must work with CLzmaDec variables directly in this interface.
+++
+++   STEPS:
+++     LzmaDec_Constr()
+++     LzmaDec_Allocate()
+++     for (each new stream)
+++     {
+++       LzmaDec_Init()
+++       while (it needs more decompression)
+++       {
+++         LzmaDec_DecodeToDic()
+++         use data from CLzmaDec::dic and update CLzmaDec::dicPos
+++       }
+++     }
+++     LzmaDec_Free()
+++*/
+++
+++/* LzmaDec_DecodeToDic
+++
+++   The decoding to internal dictionary buffer (CLzmaDec::dic).
+++   You must manually update CLzmaDec::dicPos, if it reaches CLzmaDec::dicBufSize !!!
+++
+++finishMode:
+++  It has meaning only if the decoding reaches output limit (dicLimit).
+++  LZMA_FINISH_ANY - Decode just dicLimit bytes.
+++  LZMA_FINISH_END - Stream must be finished after dicLimit.
+++
+++Returns:
+++  SZ_OK
+++    status:
+++      LZMA_STATUS_FINISHED_WITH_MARK
+++      LZMA_STATUS_NOT_FINISHED
+++      LZMA_STATUS_NEEDS_MORE_INPUT
+++      LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK
+++  SZ_ERROR_DATA - Data error
+++*/
+++
+++SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit,
+++    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
+++
+++
+++/* ---------- Buffer Interface ---------- */
+++
+++/* It's zlib-like interface.
+++   See LzmaDec_DecodeToDic description for information about STEPS and return results,
+++   but you must use LzmaDec_DecodeToBuf instead of LzmaDec_DecodeToDic and you don't need
+++   to work with CLzmaDec variables manually.
+++
+++finishMode:
+++  It has meaning only if the decoding reaches output limit (*destLen).
+++  LZMA_FINISH_ANY - Decode just destLen bytes.
+++  LZMA_FINISH_END - Stream must be finished after (*destLen).
+++*/
+++
+++SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen,
+++    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
+++
+++
+++/* ---------- One Call Interface ---------- */
+++
+++/* LzmaDecode
+++
+++finishMode:
+++  It has meaning only if the decoding reaches output limit (*destLen).
+++  LZMA_FINISH_ANY - Decode just destLen bytes.
+++  LZMA_FINISH_END - Stream must be finished after (*destLen).
+++
+++Returns:
+++  SZ_OK
+++    status:
+++      LZMA_STATUS_FINISHED_WITH_MARK
+++      LZMA_STATUS_NOT_FINISHED
+++      LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK
+++  SZ_ERROR_DATA - Data error
+++  SZ_ERROR_MEM  - Memory allocation error
+++  SZ_ERROR_UNSUPPORTED - Unsupported properties
+++  SZ_ERROR_INPUT_EOF - It needs more bytes in input buffer (src).
+++*/
+++
+++SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
+++    const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode,
+++    ELzmaStatus *status, ISzAlloc *alloc);
+++
+++#ifdef __cplusplus
+++}
+++#endif
+++
+++#endif
++--- /dev/null
+++++ b/include/linux/lzma/LzmaEnc.h
++@@ -0,0 +1,80 @@
+++/*  LzmaEnc.h -- LZMA Encoder
+++2009-02-07 : Igor Pavlov : Public domain */
+++
+++#ifndef __LZMA_ENC_H
+++#define __LZMA_ENC_H
+++
+++#include "Types.h"
+++
+++#ifdef __cplusplus
+++extern "C" {
+++#endif
+++
+++#define LZMA_PROPS_SIZE 5
+++
+++typedef struct _CLzmaEncProps
+++{
+++  int level;       /*  0 <= level <= 9 */
+++  UInt32 dictSize; /* (1 << 12) <= dictSize <= (1 << 27) for 32-bit version
+++                      (1 << 12) <= dictSize <= (1 << 30) for 64-bit version
+++                       default = (1 << 24) */
+++  int lc;          /* 0 <= lc <= 8, default = 3 */
+++  int lp;          /* 0 <= lp <= 4, default = 0 */
+++  int pb;          /* 0 <= pb <= 4, default = 2 */
+++  int algo;        /* 0 - fast, 1 - normal, default = 1 */
+++  int fb;          /* 5 <= fb <= 273, default = 32 */
+++  int btMode;      /* 0 - hashChain Mode, 1 - binTree mode - normal, default = 1 */
+++  int numHashBytes; /* 2, 3 or 4, default = 4 */
+++  UInt32 mc;        /* 1 <= mc <= (1 << 30), default = 32 */
+++  unsigned writeEndMark;  /* 0 - do not write EOPM, 1 - write EOPM, default = 0 */
+++  int numThreads;  /* 1 or 2, default = 2 */
+++} CLzmaEncProps;
+++
+++void LzmaEncProps_Init(CLzmaEncProps *p);
+++void LzmaEncProps_Normalize(CLzmaEncProps *p);
+++UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2);
+++
+++
+++/* ---------- CLzmaEncHandle Interface ---------- */
+++
+++/* LzmaEnc_* functions can return the following exit codes:
+++Returns:
+++  SZ_OK           - OK
+++  SZ_ERROR_MEM    - Memory allocation error
+++  SZ_ERROR_PARAM  - Incorrect paramater in props
+++  SZ_ERROR_WRITE  - Write callback error.
+++  SZ_ERROR_PROGRESS - some break from progress callback
+++  SZ_ERROR_THREAD - errors in multithreading functions (only for Mt version)
+++*/
+++
+++typedef void * CLzmaEncHandle;
+++
+++CLzmaEncHandle LzmaEnc_Create(ISzAlloc *alloc);
+++void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig);
+++SRes LzmaEnc_SetProps(CLzmaEncHandle p, const CLzmaEncProps *props);
+++SRes LzmaEnc_WriteProperties(CLzmaEncHandle p, Byte *properties, SizeT *size);
+++SRes LzmaEnc_Encode(CLzmaEncHandle p, ISeqOutStream *outStream, ISeqInStream *inStream,
+++    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
+++SRes LzmaEnc_MemEncode(CLzmaEncHandle p, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
+++    int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
+++
+++/* ---------- One Call Interface ---------- */
+++
+++/* LzmaEncode
+++Return code:
+++  SZ_OK               - OK
+++  SZ_ERROR_MEM        - Memory allocation error
+++  SZ_ERROR_PARAM      - Incorrect paramater
+++  SZ_ERROR_OUTPUT_EOF - output buffer overflow
+++  SZ_ERROR_THREAD     - errors in multithreading functions (only for Mt version)
+++*/
+++
+++SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
+++    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
+++    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
+++
+++#ifdef __cplusplus
+++}
+++#endif
+++
+++#endif
++--- /dev/null
+++++ b/include/linux/lzma/Types.h
++@@ -0,0 +1,226 @@
+++/* Types.h -- Basic types
+++2009-11-23 : Igor Pavlov : Public domain */
+++
+++#ifndef __7Z_TYPES_H
+++#define __7Z_TYPES_H
+++
+++#include <stddef.h>
+++
+++#ifdef _WIN32
+++#include <windows.h>
+++#endif
+++
+++#ifndef EXTERN_C_BEGIN
+++#ifdef __cplusplus
+++#define EXTERN_C_BEGIN extern "C" {
+++#define EXTERN_C_END }
+++#else
+++#define EXTERN_C_BEGIN
+++#define EXTERN_C_END
+++#endif
+++#endif
+++
+++EXTERN_C_BEGIN
+++
+++#define SZ_OK 0
+++
+++#define SZ_ERROR_DATA 1
+++#define SZ_ERROR_MEM 2
+++#define SZ_ERROR_CRC 3
+++#define SZ_ERROR_UNSUPPORTED 4
+++#define SZ_ERROR_PARAM 5
+++#define SZ_ERROR_INPUT_EOF 6
+++#define SZ_ERROR_OUTPUT_EOF 7
+++#define SZ_ERROR_READ 8
+++#define SZ_ERROR_WRITE 9
+++#define SZ_ERROR_PROGRESS 10
+++#define SZ_ERROR_FAIL 11
+++#define SZ_ERROR_THREAD 12
+++
+++#define SZ_ERROR_ARCHIVE 16
+++#define SZ_ERROR_NO_ARCHIVE 17
+++
+++typedef int SRes;
+++
+++#ifdef _WIN32
+++typedef DWORD WRes;
+++#else
+++typedef int WRes;
+++#endif
+++
+++#ifndef RINOK
+++#define RINOK(x) { int __result__ = (x); if (__result__ != 0) return __result__; }
+++#endif
+++
+++typedef unsigned char Byte;
+++typedef short Int16;
+++typedef unsigned short UInt16;
+++
+++#ifdef _LZMA_UINT32_IS_ULONG
+++typedef long Int32;
+++typedef unsigned long UInt32;
+++#else
+++typedef int Int32;
+++typedef unsigned int UInt32;
+++#endif
+++
+++#ifdef _SZ_NO_INT_64
+++
+++/* define _SZ_NO_INT_64, if your compiler doesn't support 64-bit integers.
+++   NOTES: Some code will work incorrectly in that case! */
+++
+++typedef long Int64;
+++typedef unsigned long UInt64;
+++
+++#else
+++
+++#if defined(_MSC_VER) || defined(__BORLANDC__)
+++typedef __int64 Int64;
+++typedef unsigned __int64 UInt64;
+++#else
+++typedef long long int Int64;
+++typedef unsigned long long int UInt64;
+++#endif
+++
+++#endif
+++
+++#ifdef _LZMA_NO_SYSTEM_SIZE_T
+++typedef UInt32 SizeT;
+++#else
+++typedef size_t SizeT;
+++#endif
+++
+++typedef int Bool;
+++#define True 1
+++#define False 0
+++
+++
+++#ifdef _WIN32
+++#define MY_STD_CALL __stdcall
+++#else
+++#define MY_STD_CALL
+++#endif
+++
+++#ifdef _MSC_VER
+++
+++#if _MSC_VER >= 1300
+++#define MY_NO_INLINE __declspec(noinline)
+++#else
+++#define MY_NO_INLINE
+++#endif
+++
+++#define MY_CDECL __cdecl
+++#define MY_FAST_CALL __fastcall
+++
+++#else
+++
+++#define MY_CDECL
+++#define MY_FAST_CALL
+++
+++#endif
+++
+++
+++/* The following interfaces use first parameter as pointer to structure */
+++
+++typedef struct
+++{
+++  SRes (*Read)(void *p, void *buf, size_t *size);
+++    /* if (input(*size) != 0 && output(*size) == 0) means end_of_stream.
+++       (output(*size) < input(*size)) is allowed */
+++} ISeqInStream;
+++
+++/* it can return SZ_ERROR_INPUT_EOF */
+++SRes SeqInStream_Read(ISeqInStream *stream, void *buf, size_t size);
+++SRes SeqInStream_Read2(ISeqInStream *stream, void *buf, size_t size, SRes errorType);
+++SRes SeqInStream_ReadByte(ISeqInStream *stream, Byte *buf);
+++
+++typedef struct
+++{
+++  size_t (*Write)(void *p, const void *buf, size_t size);
+++    /* Returns: result - the number of actually written bytes.
+++       (result < size) means error */
+++} ISeqOutStream;
+++
+++typedef enum
+++{
+++  SZ_SEEK_SET = 0,
+++  SZ_SEEK_CUR = 1,
+++  SZ_SEEK_END = 2
+++} ESzSeek;
+++
+++typedef struct
+++{
+++  SRes (*Read)(void *p, void *buf, size_t *size);  /* same as ISeqInStream::Read */
+++  SRes (*Seek)(void *p, Int64 *pos, ESzSeek origin);
+++} ISeekInStream;
+++
+++typedef struct
+++{
+++  SRes (*Look)(void *p, void **buf, size_t *size);
+++    /* if (input(*size) != 0 && output(*size) == 0) means end_of_stream.
+++       (output(*size) > input(*size)) is not allowed
+++       (output(*size) < input(*size)) is allowed */
+++  SRes (*Skip)(void *p, size_t offset);
+++    /* offset must be <= output(*size) of Look */
+++
+++  SRes (*Read)(void *p, void *buf, size_t *size);
+++    /* reads directly (without buffer). It's same as ISeqInStream::Read */
+++  SRes (*Seek)(void *p, Int64 *pos, ESzSeek origin);
+++} ILookInStream;
+++
+++SRes LookInStream_LookRead(ILookInStream *stream, void *buf, size_t *size);
+++SRes LookInStream_SeekTo(ILookInStream *stream, UInt64 offset);
+++
+++/* reads via ILookInStream::Read */
+++SRes LookInStream_Read2(ILookInStream *stream, void *buf, size_t size, SRes errorType);
+++SRes LookInStream_Read(ILookInStream *stream, void *buf, size_t size);
+++
+++#define LookToRead_BUF_SIZE (1 << 14)
+++
+++typedef struct
+++{
+++  ILookInStream s;
+++  ISeekInStream *realStream;
+++  size_t pos;
+++  size_t size;
+++  Byte buf[LookToRead_BUF_SIZE];
+++} CLookToRead;
+++
+++void LookToRead_CreateVTable(CLookToRead *p, int lookahead);
+++void LookToRead_Init(CLookToRead *p);
+++
+++typedef struct
+++{
+++  ISeqInStream s;
+++  ILookInStream *realStream;
+++} CSecToLook;
+++
+++void SecToLook_CreateVTable(CSecToLook *p);
+++
+++typedef struct
+++{
+++  ISeqInStream s;
+++  ILookInStream *realStream;
+++} CSecToRead;
+++
+++void SecToRead_CreateVTable(CSecToRead *p);
+++
+++typedef struct
+++{
+++  SRes (*Progress)(void *p, UInt64 inSize, UInt64 outSize);
+++    /* Returns: result. (result != SZ_OK) means break.
+++       Value (UInt64)(Int64)-1 for size means unknown value. */
+++} ICompressProgress;
+++
+++typedef struct
+++{
+++  void *(*Alloc)(void *p, size_t size);
+++  void (*Free)(void *p, void *address); /* address can be 0 */
+++} ISzAlloc;
+++
+++#define IAlloc_Alloc(p, size) (p)->Alloc((p), size)
+++#define IAlloc_Free(p, a) (p)->Free((p), a)
+++
+++EXTERN_C_END
+++
+++#endif
++--- a/include/uapi/linux/jffs2.h
+++++ b/include/uapi/linux/jffs2.h
++@@ -46,6 +46,7 @@
++ #define JFFS2_COMPR_DYNRUBIN	0x05
++ #define JFFS2_COMPR_ZLIB	0x06
++ #define JFFS2_COMPR_LZO		0x07
+++#define JFFS2_COMPR_LZMA	0x08
++ /* Compatibility flags. */
++ #define JFFS2_COMPAT_MASK 0xc000      /* What do to if an unknown nodetype is found */
++ #define JFFS2_NODE_ACCURATE 0x2000
++--- a/lib/Kconfig
+++++ b/lib/Kconfig
++@@ -303,6 +303,12 @@ config ZSTD_DECOMPRESS
++ 
++ source "lib/xz/Kconfig"
++ 
+++config LZMA_COMPRESS
+++    tristate
+++
+++config LZMA_DECOMPRESS
+++    tristate
+++
++ #
++ # These all provide a common interface (hence the apparent duplication with
++ # ZLIB_INFLATE; DECOMPRESS_GZIP is just a wrapper.)
++--- a/lib/Makefile
+++++ b/lib/Makefile
++@@ -3,6 +3,16 @@
++ # Makefile for some libs needed in the kernel.
++ #
++ 
+++ifdef CONFIG_JFFS2_ZLIB
+++	CONFIG_ZLIB_INFLATE:=y
+++	CONFIG_ZLIB_DEFLATE:=y
+++endif
+++
+++ifdef CONFIG_JFFS2_LZMA
+++	CONFIG_LZMA_DECOMPRESS:=y
+++	CONFIG_LZMA_COMPRESS:=y
+++endif
+++
++ ifdef CONFIG_FUNCTION_TRACER
++ ORIG_CFLAGS := $(KBUILD_CFLAGS)
++ KBUILD_CFLAGS = $(subst $(CC_FLAGS_FTRACE),,$(ORIG_CFLAGS))
++@@ -149,6 +159,8 @@ obj-$(CONFIG_ZSTD_COMPRESS) += zstd/
++ obj-$(CONFIG_ZSTD_DECOMPRESS) += zstd/
++ obj-$(CONFIG_XZ_DEC) += xz/
++ obj-$(CONFIG_RAID6_PQ) += raid6/
+++obj-$(CONFIG_LZMA_COMPRESS) += lzma/
+++obj-$(CONFIG_LZMA_DECOMPRESS) += lzma/
++ 
++ lib-$(CONFIG_DECOMPRESS_GZIP) += decompress_inflate.o
++ lib-$(CONFIG_DECOMPRESS_BZIP2) += decompress_bunzip2.o
++--- /dev/null
+++++ b/lib/lzma/LzFind.c
++@@ -0,0 +1,761 @@
+++/* LzFind.c -- Match finder for LZ algorithms
+++2009-04-22 : Igor Pavlov : Public domain */
+++
+++#include <string.h>
+++
+++#include "LzFind.h"
+++#include "LzHash.h"
+++
+++#define kEmptyHashValue 0
+++#define kMaxValForNormalize ((UInt32)0xFFFFFFFF)
+++#define kNormalizeStepMin (1 << 10) /* it must be power of 2 */
+++#define kNormalizeMask (~(kNormalizeStepMin - 1))
+++#define kMaxHistorySize ((UInt32)3 << 30)
+++
+++#define kStartMaxLen 3
+++
+++static void LzInWindow_Free(CMatchFinder *p, ISzAlloc *alloc)
+++{
+++  if (!p->directInput)
+++  {
+++    alloc->Free(alloc, p->bufferBase);
+++    p->bufferBase = 0;
+++  }
+++}
+++
+++/* keepSizeBefore + keepSizeAfter + keepSizeReserv must be < 4G) */
+++
+++static int LzInWindow_Create(CMatchFinder *p, UInt32 keepSizeReserv, ISzAlloc *alloc)
+++{
+++  UInt32 blockSize = p->keepSizeBefore + p->keepSizeAfter + keepSizeReserv;
+++  if (p->directInput)
+++  {
+++    p->blockSize = blockSize;
+++    return 1;
+++  }
+++  if (p->bufferBase == 0 || p->blockSize != blockSize)
+++  {
+++    LzInWindow_Free(p, alloc);
+++    p->blockSize = blockSize;
+++    p->bufferBase = (Byte *)alloc->Alloc(alloc, (size_t)blockSize);
+++  }
+++  return (p->bufferBase != 0);
+++}
+++
+++Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
+++Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; }
+++
+++UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; }
+++
+++void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
+++{
+++  p->posLimit -= subValue;
+++  p->pos -= subValue;
+++  p->streamPos -= subValue;
+++}
+++
+++static void MatchFinder_ReadBlock(CMatchFinder *p)
+++{
+++  if (p->streamEndWasReached || p->result != SZ_OK)
+++    return;
+++  if (p->directInput)
+++  {
+++    UInt32 curSize = 0xFFFFFFFF - p->streamPos;
+++    if (curSize > p->directInputRem)
+++      curSize = (UInt32)p->directInputRem;
+++    p->directInputRem -= curSize;
+++    p->streamPos += curSize;
+++    if (p->directInputRem == 0)
+++      p->streamEndWasReached = 1;
+++    return;
+++  }
+++  for (;;)
+++  {
+++    Byte *dest = p->buffer + (p->streamPos - p->pos);
+++    size_t size = (p->bufferBase + p->blockSize - dest);
+++    if (size == 0)
+++      return;
+++    p->result = p->stream->Read(p->stream, dest, &size);
+++    if (p->result != SZ_OK)
+++      return;
+++    if (size == 0)
+++    {
+++      p->streamEndWasReached = 1;
+++      return;
+++    }
+++    p->streamPos += (UInt32)size;
+++    if (p->streamPos - p->pos > p->keepSizeAfter)
+++      return;
+++  }
+++}
+++
+++void MatchFinder_MoveBlock(CMatchFinder *p)
+++{
+++  memmove(p->bufferBase,
+++    p->buffer - p->keepSizeBefore,
+++    (size_t)(p->streamPos - p->pos + p->keepSizeBefore));
+++  p->buffer = p->bufferBase + p->keepSizeBefore;
+++}
+++
+++int MatchFinder_NeedMove(CMatchFinder *p)
+++{
+++  if (p->directInput)
+++    return 0;
+++  /* if (p->streamEndWasReached) return 0; */
+++  return ((size_t)(p->bufferBase + p->blockSize - p->buffer) <= p->keepSizeAfter);
+++}
+++
+++void MatchFinder_ReadIfRequired(CMatchFinder *p)
+++{
+++  if (p->streamEndWasReached)
+++    return;
+++  if (p->keepSizeAfter >= p->streamPos - p->pos)
+++    MatchFinder_ReadBlock(p);
+++}
+++
+++static void MatchFinder_CheckAndMoveAndRead(CMatchFinder *p)
+++{
+++  if (MatchFinder_NeedMove(p))
+++    MatchFinder_MoveBlock(p);
+++  MatchFinder_ReadBlock(p);
+++}
+++
+++static void MatchFinder_SetDefaultSettings(CMatchFinder *p)
+++{
+++  p->cutValue = 32;
+++  p->btMode = 1;
+++  p->numHashBytes = 4;
+++  p->bigHash = 0;
+++}
+++
+++#define kCrcPoly 0xEDB88320
+++
+++void MatchFinder_Construct(CMatchFinder *p)
+++{
+++  UInt32 i;
+++  p->bufferBase = 0;
+++  p->directInput = 0;
+++  p->hash = 0;
+++  MatchFinder_SetDefaultSettings(p);
+++
+++  for (i = 0; i < 256; i++)
+++  {
+++    UInt32 r = i;
+++    int j;
+++    for (j = 0; j < 8; j++)
+++      r = (r >> 1) ^ (kCrcPoly & ~((r & 1) - 1));
+++    p->crc[i] = r;
+++  }
+++}
+++
+++static void MatchFinder_FreeThisClassMemory(CMatchFinder *p, ISzAlloc *alloc)
+++{
+++  alloc->Free(alloc, p->hash);
+++  p->hash = 0;
+++}
+++
+++void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc)
+++{
+++  MatchFinder_FreeThisClassMemory(p, alloc);
+++  LzInWindow_Free(p, alloc);
+++}
+++
+++static CLzRef* AllocRefs(UInt32 num, ISzAlloc *alloc)
+++{
+++  size_t sizeInBytes = (size_t)num * sizeof(CLzRef);
+++  if (sizeInBytes / sizeof(CLzRef) != num)
+++    return 0;
+++  return (CLzRef *)alloc->Alloc(alloc, sizeInBytes);
+++}
+++
+++int MatchFinder_Create(CMatchFinder *p, UInt32 historySize,
+++    UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter,
+++    ISzAlloc *alloc)
+++{
+++  UInt32 sizeReserv;
+++  if (historySize > kMaxHistorySize)
+++  {
+++    MatchFinder_Free(p, alloc);
+++    return 0;
+++  }
+++  sizeReserv = historySize >> 1;
+++  if (historySize > ((UInt32)2 << 30))
+++    sizeReserv = historySize >> 2;
+++  sizeReserv += (keepAddBufferBefore + matchMaxLen + keepAddBufferAfter) / 2 + (1 << 19);
+++
+++  p->keepSizeBefore = historySize + keepAddBufferBefore + 1;
+++  p->keepSizeAfter = matchMaxLen + keepAddBufferAfter;
+++  /* we need one additional byte, since we use MoveBlock after pos++ and before dictionary using */
+++  if (LzInWindow_Create(p, sizeReserv, alloc))
+++  {
+++    UInt32 newCyclicBufferSize = historySize + 1;
+++    UInt32 hs;
+++    p->matchMaxLen = matchMaxLen;
+++    {
+++      p->fixedHashSize = 0;
+++      if (p->numHashBytes == 2)
+++        hs = (1 << 16) - 1;
+++      else
+++      {
+++        hs = historySize - 1;
+++        hs |= (hs >> 1);
+++        hs |= (hs >> 2);
+++        hs |= (hs >> 4);
+++        hs |= (hs >> 8);
+++        hs >>= 1;
+++        hs |= 0xFFFF; /* don't change it! It's required for Deflate */
+++        if (hs > (1 << 24))
+++        {
+++          if (p->numHashBytes == 3)
+++            hs = (1 << 24) - 1;
+++          else
+++            hs >>= 1;
+++        }
+++      }
+++      p->hashMask = hs;
+++      hs++;
+++      if (p->numHashBytes > 2) p->fixedHashSize += kHash2Size;
+++      if (p->numHashBytes > 3) p->fixedHashSize += kHash3Size;
+++      if (p->numHashBytes > 4) p->fixedHashSize += kHash4Size;
+++      hs += p->fixedHashSize;
+++    }
+++
+++    {
+++      UInt32 prevSize = p->hashSizeSum + p->numSons;
+++      UInt32 newSize;
+++      p->historySize = historySize;
+++      p->hashSizeSum = hs;
+++      p->cyclicBufferSize = newCyclicBufferSize;
+++      p->numSons = (p->btMode ? newCyclicBufferSize * 2 : newCyclicBufferSize);
+++      newSize = p->hashSizeSum + p->numSons;
+++      if (p->hash != 0 && prevSize == newSize)
+++        return 1;
+++      MatchFinder_FreeThisClassMemory(p, alloc);
+++      p->hash = AllocRefs(newSize, alloc);
+++      if (p->hash != 0)
+++      {
+++        p->son = p->hash + p->hashSizeSum;
+++        return 1;
+++      }
+++    }
+++  }
+++  MatchFinder_Free(p, alloc);
+++  return 0;
+++}
+++
+++static void MatchFinder_SetLimits(CMatchFinder *p)
+++{
+++  UInt32 limit = kMaxValForNormalize - p->pos;
+++  UInt32 limit2 = p->cyclicBufferSize - p->cyclicBufferPos;
+++  if (limit2 < limit)
+++    limit = limit2;
+++  limit2 = p->streamPos - p->pos;
+++  if (limit2 <= p->keepSizeAfter)
+++  {
+++    if (limit2 > 0)
+++      limit2 = 1;
+++  }
+++  else
+++    limit2 -= p->keepSizeAfter;
+++  if (limit2 < limit)
+++    limit = limit2;
+++  {
+++    UInt32 lenLimit = p->streamPos - p->pos;
+++    if (lenLimit > p->matchMaxLen)
+++      lenLimit = p->matchMaxLen;
+++    p->lenLimit = lenLimit;
+++  }
+++  p->posLimit = p->pos + limit;
+++}
+++
+++void MatchFinder_Init(CMatchFinder *p)
+++{
+++  UInt32 i;
+++  for (i = 0; i < p->hashSizeSum; i++)
+++    p->hash[i] = kEmptyHashValue;
+++  p->cyclicBufferPos = 0;
+++  p->buffer = p->bufferBase;
+++  p->pos = p->streamPos = p->cyclicBufferSize;
+++  p->result = SZ_OK;
+++  p->streamEndWasReached = 0;
+++  MatchFinder_ReadBlock(p);
+++  MatchFinder_SetLimits(p);
+++}
+++
+++static UInt32 MatchFinder_GetSubValue(CMatchFinder *p)
+++{
+++  return (p->pos - p->historySize - 1) & kNormalizeMask;
+++}
+++
+++void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
+++{
+++  UInt32 i;
+++  for (i = 0; i < numItems; i++)
+++  {
+++    UInt32 value = items[i];
+++    if (value <= subValue)
+++      value = kEmptyHashValue;
+++    else
+++      value -= subValue;
+++    items[i] = value;
+++  }
+++}
+++
+++static void MatchFinder_Normalize(CMatchFinder *p)
+++{
+++  UInt32 subValue = MatchFinder_GetSubValue(p);
+++  MatchFinder_Normalize3(subValue, p->hash, p->hashSizeSum + p->numSons);
+++  MatchFinder_ReduceOffsets(p, subValue);
+++}
+++
+++static void MatchFinder_CheckLimits(CMatchFinder *p)
+++{
+++  if (p->pos == kMaxValForNormalize)
+++    MatchFinder_Normalize(p);
+++  if (!p->streamEndWasReached && p->keepSizeAfter == p->streamPos - p->pos)
+++    MatchFinder_CheckAndMoveAndRead(p);
+++  if (p->cyclicBufferPos == p->cyclicBufferSize)
+++    p->cyclicBufferPos = 0;
+++  MatchFinder_SetLimits(p);
+++}
+++
+++static UInt32 * Hc_GetMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
+++    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
+++    UInt32 *distances, UInt32 maxLen)
+++{
+++  son[_cyclicBufferPos] = curMatch;
+++  for (;;)
+++  {
+++    UInt32 delta = pos - curMatch;
+++    if (cutValue-- == 0 || delta >= _cyclicBufferSize)
+++      return distances;
+++    {
+++      const Byte *pb = cur - delta;
+++      curMatch = son[_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)];
+++      if (pb[maxLen] == cur[maxLen] && *pb == *cur)
+++      {
+++        UInt32 len = 0;
+++        while (++len != lenLimit)
+++          if (pb[len] != cur[len])
+++            break;
+++        if (maxLen < len)
+++        {
+++          *distances++ = maxLen = len;
+++          *distances++ = delta - 1;
+++          if (len == lenLimit)
+++            return distances;
+++        }
+++      }
+++    }
+++  }
+++}
+++
+++UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
+++    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
+++    UInt32 *distances, UInt32 maxLen)
+++{
+++  CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1;
+++  CLzRef *ptr1 = son + (_cyclicBufferPos << 1);
+++  UInt32 len0 = 0, len1 = 0;
+++  for (;;)
+++  {
+++    UInt32 delta = pos - curMatch;
+++    if (cutValue-- == 0 || delta >= _cyclicBufferSize)
+++    {
+++      *ptr0 = *ptr1 = kEmptyHashValue;
+++      return distances;
+++    }
+++    {
+++      CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1);
+++      const Byte *pb = cur - delta;
+++      UInt32 len = (len0 < len1 ? len0 : len1);
+++      if (pb[len] == cur[len])
+++      {
+++        if (++len != lenLimit && pb[len] == cur[len])
+++          while (++len != lenLimit)
+++            if (pb[len] != cur[len])
+++              break;
+++        if (maxLen < len)
+++        {
+++          *distances++ = maxLen = len;
+++          *distances++ = delta - 1;
+++          if (len == lenLimit)
+++          {
+++            *ptr1 = pair[0];
+++            *ptr0 = pair[1];
+++            return distances;
+++          }
+++        }
+++      }
+++      if (pb[len] < cur[len])
+++      {
+++        *ptr1 = curMatch;
+++        ptr1 = pair + 1;
+++        curMatch = *ptr1;
+++        len1 = len;
+++      }
+++      else
+++      {
+++        *ptr0 = curMatch;
+++        ptr0 = pair;
+++        curMatch = *ptr0;
+++        len0 = len;
+++      }
+++    }
+++  }
+++}
+++
+++static void SkipMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
+++    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue)
+++{
+++  CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1;
+++  CLzRef *ptr1 = son + (_cyclicBufferPos << 1);
+++  UInt32 len0 = 0, len1 = 0;
+++  for (;;)
+++  {
+++    UInt32 delta = pos - curMatch;
+++    if (cutValue-- == 0 || delta >= _cyclicBufferSize)
+++    {
+++      *ptr0 = *ptr1 = kEmptyHashValue;
+++      return;
+++    }
+++    {
+++      CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1);
+++      const Byte *pb = cur - delta;
+++      UInt32 len = (len0 < len1 ? len0 : len1);
+++      if (pb[len] == cur[len])
+++      {
+++        while (++len != lenLimit)
+++          if (pb[len] != cur[len])
+++            break;
+++        {
+++          if (len == lenLimit)
+++          {
+++            *ptr1 = pair[0];
+++            *ptr0 = pair[1];
+++            return;
+++          }
+++        }
+++      }
+++      if (pb[len] < cur[len])
+++      {
+++        *ptr1 = curMatch;
+++        ptr1 = pair + 1;
+++        curMatch = *ptr1;
+++        len1 = len;
+++      }
+++      else
+++      {
+++        *ptr0 = curMatch;
+++        ptr0 = pair;
+++        curMatch = *ptr0;
+++        len0 = len;
+++      }
+++    }
+++  }
+++}
+++
+++#define MOVE_POS \
+++  ++p->cyclicBufferPos; \
+++  p->buffer++; \
+++  if (++p->pos == p->posLimit) MatchFinder_CheckLimits(p);
+++
+++#define MOVE_POS_RET MOVE_POS return offset;
+++
+++static void MatchFinder_MovePos(CMatchFinder *p) { MOVE_POS; }
+++
+++#define GET_MATCHES_HEADER2(minLen, ret_op) \
+++  UInt32 lenLimit; UInt32 hashValue; const Byte *cur; UInt32 curMatch; \
+++  lenLimit = p->lenLimit; { if (lenLimit < minLen) { MatchFinder_MovePos(p); ret_op; }} \
+++  cur = p->buffer;
+++
+++#define GET_MATCHES_HEADER(minLen) GET_MATCHES_HEADER2(minLen, return 0)
+++#define SKIP_HEADER(minLen)        GET_MATCHES_HEADER2(minLen, continue)
+++
+++#define MF_PARAMS(p) p->pos, p->buffer, p->son, p->cyclicBufferPos, p->cyclicBufferSize, p->cutValue
+++
+++#define GET_MATCHES_FOOTER(offset, maxLen) \
+++  offset = (UInt32)(GetMatchesSpec1(lenLimit, curMatch, MF_PARAMS(p), \
+++  distances + offset, maxLen) - distances); MOVE_POS_RET;
+++
+++#define SKIP_FOOTER \
+++  SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MOVE_POS;
+++
+++static UInt32 Bt2_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
+++{
+++  UInt32 offset;
+++  GET_MATCHES_HEADER(2)
+++  HASH2_CALC;
+++  curMatch = p->hash[hashValue];
+++  p->hash[hashValue] = p->pos;
+++  offset = 0;
+++  GET_MATCHES_FOOTER(offset, 1)
+++}
+++
+++UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
+++{
+++  UInt32 offset;
+++  GET_MATCHES_HEADER(3)
+++  HASH_ZIP_CALC;
+++  curMatch = p->hash[hashValue];
+++  p->hash[hashValue] = p->pos;
+++  offset = 0;
+++  GET_MATCHES_FOOTER(offset, 2)
+++}
+++
+++static UInt32 Bt3_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
+++{
+++  UInt32 hash2Value, delta2, maxLen, offset;
+++  GET_MATCHES_HEADER(3)
+++
+++  HASH3_CALC;
+++
+++  delta2 = p->pos - p->hash[hash2Value];
+++  curMatch = p->hash[kFix3HashSize + hashValue];
+++
+++  p->hash[hash2Value] =
+++  p->hash[kFix3HashSize + hashValue] = p->pos;
+++
+++
+++  maxLen = 2;
+++  offset = 0;
+++  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
+++  {
+++    for (; maxLen != lenLimit; maxLen++)
+++      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
+++        break;
+++    distances[0] = maxLen;
+++    distances[1] = delta2 - 1;
+++    offset = 2;
+++    if (maxLen == lenLimit)
+++    {
+++      SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p));
+++      MOVE_POS_RET;
+++    }
+++  }
+++  GET_MATCHES_FOOTER(offset, maxLen)
+++}
+++
+++static UInt32 Bt4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
+++{
+++  UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset;
+++  GET_MATCHES_HEADER(4)
+++
+++  HASH4_CALC;
+++
+++  delta2 = p->pos - p->hash[                hash2Value];
+++  delta3 = p->pos - p->hash[kFix3HashSize + hash3Value];
+++  curMatch = p->hash[kFix4HashSize + hashValue];
+++
+++  p->hash[                hash2Value] =
+++  p->hash[kFix3HashSize + hash3Value] =
+++  p->hash[kFix4HashSize + hashValue] = p->pos;
+++
+++  maxLen = 1;
+++  offset = 0;
+++  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
+++  {
+++    distances[0] = maxLen = 2;
+++    distances[1] = delta2 - 1;
+++    offset = 2;
+++  }
+++  if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur)
+++  {
+++    maxLen = 3;
+++    distances[offset + 1] = delta3 - 1;
+++    offset += 2;
+++    delta2 = delta3;
+++  }
+++  if (offset != 0)
+++  {
+++    for (; maxLen != lenLimit; maxLen++)
+++      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
+++        break;
+++    distances[offset - 2] = maxLen;
+++    if (maxLen == lenLimit)
+++    {
+++      SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p));
+++      MOVE_POS_RET;
+++    }
+++  }
+++  if (maxLen < 3)
+++    maxLen = 3;
+++  GET_MATCHES_FOOTER(offset, maxLen)
+++}
+++
+++static UInt32 Hc4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
+++{
+++  UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset;
+++  GET_MATCHES_HEADER(4)
+++
+++  HASH4_CALC;
+++
+++  delta2 = p->pos - p->hash[                hash2Value];
+++  delta3 = p->pos - p->hash[kFix3HashSize + hash3Value];
+++  curMatch = p->hash[kFix4HashSize + hashValue];
+++
+++  p->hash[                hash2Value] =
+++  p->hash[kFix3HashSize + hash3Value] =
+++  p->hash[kFix4HashSize + hashValue] = p->pos;
+++
+++  maxLen = 1;
+++  offset = 0;
+++  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
+++  {
+++    distances[0] = maxLen = 2;
+++    distances[1] = delta2 - 1;
+++    offset = 2;
+++  }
+++  if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur)
+++  {
+++    maxLen = 3;
+++    distances[offset + 1] = delta3 - 1;
+++    offset += 2;
+++    delta2 = delta3;
+++  }
+++  if (offset != 0)
+++  {
+++    for (; maxLen != lenLimit; maxLen++)
+++      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
+++        break;
+++    distances[offset - 2] = maxLen;
+++    if (maxLen == lenLimit)
+++    {
+++      p->son[p->cyclicBufferPos] = curMatch;
+++      MOVE_POS_RET;
+++    }
+++  }
+++  if (maxLen < 3)
+++    maxLen = 3;
+++  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
+++    distances + offset, maxLen) - (distances));
+++  MOVE_POS_RET
+++}
+++
+++UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
+++{
+++  UInt32 offset;
+++  GET_MATCHES_HEADER(3)
+++  HASH_ZIP_CALC;
+++  curMatch = p->hash[hashValue];
+++  p->hash[hashValue] = p->pos;
+++  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
+++    distances, 2) - (distances));
+++  MOVE_POS_RET
+++}
+++
+++static void Bt2_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
+++{
+++  do
+++  {
+++    SKIP_HEADER(2)
+++    HASH2_CALC;
+++    curMatch = p->hash[hashValue];
+++    p->hash[hashValue] = p->pos;
+++    SKIP_FOOTER
+++  }
+++  while (--num != 0);
+++}
+++
+++void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
+++{
+++  do
+++  {
+++    SKIP_HEADER(3)
+++    HASH_ZIP_CALC;
+++    curMatch = p->hash[hashValue];
+++    p->hash[hashValue] = p->pos;
+++    SKIP_FOOTER
+++  }
+++  while (--num != 0);
+++}
+++
+++static void Bt3_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
+++{
+++  do
+++  {
+++    UInt32 hash2Value;
+++    SKIP_HEADER(3)
+++    HASH3_CALC;
+++    curMatch = p->hash[kFix3HashSize + hashValue];
+++    p->hash[hash2Value] =
+++    p->hash[kFix3HashSize + hashValue] = p->pos;
+++    SKIP_FOOTER
+++  }
+++  while (--num != 0);
+++}
+++
+++static void Bt4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
+++{
+++  do
+++  {
+++    UInt32 hash2Value, hash3Value;
+++    SKIP_HEADER(4)
+++    HASH4_CALC;
+++    curMatch = p->hash[kFix4HashSize + hashValue];
+++    p->hash[                hash2Value] =
+++    p->hash[kFix3HashSize + hash3Value] = p->pos;
+++    p->hash[kFix4HashSize + hashValue] = p->pos;
+++    SKIP_FOOTER
+++  }
+++  while (--num != 0);
+++}
+++
+++static void Hc4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
+++{
+++  do
+++  {
+++    UInt32 hash2Value, hash3Value;
+++    SKIP_HEADER(4)
+++    HASH4_CALC;
+++    curMatch = p->hash[kFix4HashSize + hashValue];
+++    p->hash[                hash2Value] =
+++    p->hash[kFix3HashSize + hash3Value] =
+++    p->hash[kFix4HashSize + hashValue] = p->pos;
+++    p->son[p->cyclicBufferPos] = curMatch;
+++    MOVE_POS
+++  }
+++  while (--num != 0);
+++}
+++
+++void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
+++{
+++  do
+++  {
+++    SKIP_HEADER(3)
+++    HASH_ZIP_CALC;
+++    curMatch = p->hash[hashValue];
+++    p->hash[hashValue] = p->pos;
+++    p->son[p->cyclicBufferPos] = curMatch;
+++    MOVE_POS
+++  }
+++  while (--num != 0);
+++}
+++
+++void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable)
+++{
+++  vTable->Init = (Mf_Init_Func)MatchFinder_Init;
+++  vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinder_GetIndexByte;
+++  vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinder_GetNumAvailableBytes;
+++  vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinder_GetPointerToCurrentPos;
+++  if (!p->btMode)
+++  {
+++    vTable->GetMatches = (Mf_GetMatches_Func)Hc4_MatchFinder_GetMatches;
+++    vTable->Skip = (Mf_Skip_Func)Hc4_MatchFinder_Skip;
+++  }
+++  else if (p->numHashBytes == 2)
+++  {
+++    vTable->GetMatches = (Mf_GetMatches_Func)Bt2_MatchFinder_GetMatches;
+++    vTable->Skip = (Mf_Skip_Func)Bt2_MatchFinder_Skip;
+++  }
+++  else if (p->numHashBytes == 3)
+++  {
+++    vTable->GetMatches = (Mf_GetMatches_Func)Bt3_MatchFinder_GetMatches;
+++    vTable->Skip = (Mf_Skip_Func)Bt3_MatchFinder_Skip;
+++  }
+++  else
+++  {
+++    vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
+++    vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
+++  }
+++}
++--- /dev/null
+++++ b/lib/lzma/LzmaDec.c
++@@ -0,0 +1,999 @@
+++/* LzmaDec.c -- LZMA Decoder
+++2009-09-20 : Igor Pavlov : Public domain */
+++
+++#include "LzmaDec.h"
+++
+++#include <string.h>
+++
+++#define kNumTopBits 24
+++#define kTopValue ((UInt32)1 << kNumTopBits)
+++
+++#define kNumBitModelTotalBits 11
+++#define kBitModelTotal (1 << kNumBitModelTotalBits)
+++#define kNumMoveBits 5
+++
+++#define RC_INIT_SIZE 5
+++
+++#define NORMALIZE if (range < kTopValue) { range <<= 8; code = (code << 8) | (*buf++); }
+++
+++#define IF_BIT_0(p) ttt = *(p); NORMALIZE; bound = (range >> kNumBitModelTotalBits) * ttt; if (code < bound)
+++#define UPDATE_0(p) range = bound; *(p) = (CLzmaProb)(ttt + ((kBitModelTotal - ttt) >> kNumMoveBits));
+++#define UPDATE_1(p) range -= bound; code -= bound; *(p) = (CLzmaProb)(ttt - (ttt >> kNumMoveBits));
+++#define GET_BIT2(p, i, A0, A1) IF_BIT_0(p) \
+++  { UPDATE_0(p); i = (i + i); A0; } else \
+++  { UPDATE_1(p); i = (i + i) + 1; A1; }
+++#define GET_BIT(p, i) GET_BIT2(p, i, ; , ;)
+++
+++#define TREE_GET_BIT(probs, i) { GET_BIT((probs + i), i); }
+++#define TREE_DECODE(probs, limit, i) \
+++  { i = 1; do { TREE_GET_BIT(probs, i); } while (i < limit); i -= limit; }
+++
+++/* #define _LZMA_SIZE_OPT */
+++
+++#ifdef _LZMA_SIZE_OPT
+++#define TREE_6_DECODE(probs, i) TREE_DECODE(probs, (1 << 6), i)
+++#else
+++#define TREE_6_DECODE(probs, i) \
+++  { i = 1; \
+++  TREE_GET_BIT(probs, i); \
+++  TREE_GET_BIT(probs, i); \
+++  TREE_GET_BIT(probs, i); \
+++  TREE_GET_BIT(probs, i); \
+++  TREE_GET_BIT(probs, i); \
+++  TREE_GET_BIT(probs, i); \
+++  i -= 0x40; }
+++#endif
+++
+++#define NORMALIZE_CHECK if (range < kTopValue) { if (buf >= bufLimit) return DUMMY_ERROR; range <<= 8; code = (code << 8) | (*buf++); }
+++
+++#define IF_BIT_0_CHECK(p) ttt = *(p); NORMALIZE_CHECK; bound = (range >> kNumBitModelTotalBits) * ttt; if (code < bound)
+++#define UPDATE_0_CHECK range = bound;
+++#define UPDATE_1_CHECK range -= bound; code -= bound;
+++#define GET_BIT2_CHECK(p, i, A0, A1) IF_BIT_0_CHECK(p) \
+++  { UPDATE_0_CHECK; i = (i + i); A0; } else \
+++  { UPDATE_1_CHECK; i = (i + i) + 1; A1; }
+++#define GET_BIT_CHECK(p, i) GET_BIT2_CHECK(p, i, ; , ;)
+++#define TREE_DECODE_CHECK(probs, limit, i) \
+++  { i = 1; do { GET_BIT_CHECK(probs + i, i) } while (i < limit); i -= limit; }
+++
+++
+++#define kNumPosBitsMax 4
+++#define kNumPosStatesMax (1 << kNumPosBitsMax)
+++
+++#define kLenNumLowBits 3
+++#define kLenNumLowSymbols (1 << kLenNumLowBits)
+++#define kLenNumMidBits 3
+++#define kLenNumMidSymbols (1 << kLenNumMidBits)
+++#define kLenNumHighBits 8
+++#define kLenNumHighSymbols (1 << kLenNumHighBits)
+++
+++#define LenChoice 0
+++#define LenChoice2 (LenChoice + 1)
+++#define LenLow (LenChoice2 + 1)
+++#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
+++#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
+++#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
+++
+++
+++#define kNumStates 12
+++#define kNumLitStates 7
+++
+++#define kStartPosModelIndex 4
+++#define kEndPosModelIndex 14
+++#define kNumFullDistances (1 << (kEndPosModelIndex >> 1))
+++
+++#define kNumPosSlotBits 6
+++#define kNumLenToPosStates 4
+++
+++#define kNumAlignBits 4
+++#define kAlignTableSize (1 << kNumAlignBits)
+++
+++#define kMatchMinLen 2
+++#define kMatchSpecLenStart (kMatchMinLen + kLenNumLowSymbols + kLenNumMidSymbols + kLenNumHighSymbols)
+++
+++#define IsMatch 0
+++#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax))
+++#define IsRepG0 (IsRep + kNumStates)
+++#define IsRepG1 (IsRepG0 + kNumStates)
+++#define IsRepG2 (IsRepG1 + kNumStates)
+++#define IsRep0Long (IsRepG2 + kNumStates)
+++#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax))
+++#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits))
+++#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex)
+++#define LenCoder (Align + kAlignTableSize)
+++#define RepLenCoder (LenCoder + kNumLenProbs)
+++#define Literal (RepLenCoder + kNumLenProbs)
+++
+++#define LZMA_BASE_SIZE 1846
+++#define LZMA_LIT_SIZE 768
+++
+++#define LzmaProps_GetNumProbs(p) ((UInt32)LZMA_BASE_SIZE + (LZMA_LIT_SIZE << ((p)->lc + (p)->lp)))
+++
+++#if Literal != LZMA_BASE_SIZE
+++StopCompilingDueBUG
+++#endif
+++
+++#define LZMA_DIC_MIN (1 << 12)
+++
+++/* First LZMA-symbol is always decoded.
+++And it decodes new LZMA-symbols while (buf < bufLimit), but "buf" is without last normalization
+++Out:
+++  Result:
+++    SZ_OK - OK
+++    SZ_ERROR_DATA - Error
+++  p->remainLen:
+++    < kMatchSpecLenStart : normal remain
+++    = kMatchSpecLenStart : finished
+++    = kMatchSpecLenStart + 1 : Flush marker
+++    = kMatchSpecLenStart + 2 : State Init Marker
+++*/
+++
+++static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit, const Byte *bufLimit)
+++{
+++  CLzmaProb *probs = p->probs;
+++
+++  unsigned state = p->state;
+++  UInt32 rep0 = p->reps[0], rep1 = p->reps[1], rep2 = p->reps[2], rep3 = p->reps[3];
+++  unsigned pbMask = ((unsigned)1 << (p->prop.pb)) - 1;
+++  unsigned lpMask = ((unsigned)1 << (p->prop.lp)) - 1;
+++  unsigned lc = p->prop.lc;
+++
+++  Byte *dic = p->dic;
+++  SizeT dicBufSize = p->dicBufSize;
+++  SizeT dicPos = p->dicPos;
+++
+++  UInt32 processedPos = p->processedPos;
+++  UInt32 checkDicSize = p->checkDicSize;
+++  unsigned len = 0;
+++
+++  const Byte *buf = p->buf;
+++  UInt32 range = p->range;
+++  UInt32 code = p->code;
+++
+++  do
+++  {
+++    CLzmaProb *prob;
+++    UInt32 bound;
+++    unsigned ttt;
+++    unsigned posState = processedPos & pbMask;
+++
+++    prob = probs + IsMatch + (state << kNumPosBitsMax) + posState;
+++    IF_BIT_0(prob)
+++    {
+++      unsigned symbol;
+++      UPDATE_0(prob);
+++      prob = probs + Literal;
+++      if (checkDicSize != 0 || processedPos != 0)
+++        prob += (LZMA_LIT_SIZE * (((processedPos & lpMask) << lc) +
+++        (dic[(dicPos == 0 ? dicBufSize : dicPos) - 1] >> (8 - lc))));
+++
+++      if (state < kNumLitStates)
+++      {
+++        state -= (state < 4) ? state : 3;
+++        symbol = 1;
+++        do { GET_BIT(prob + symbol, symbol) } while (symbol < 0x100);
+++      }
+++      else
+++      {
+++        unsigned matchByte = p->dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)];
+++        unsigned offs = 0x100;
+++        state -= (state < 10) ? 3 : 6;
+++        symbol = 1;
+++        do
+++        {
+++          unsigned bit;
+++          CLzmaProb *probLit;
+++          matchByte <<= 1;
+++          bit = (matchByte & offs);
+++          probLit = prob + offs + bit + symbol;
+++          GET_BIT2(probLit, symbol, offs &= ~bit, offs &= bit)
+++        }
+++        while (symbol < 0x100);
+++      }
+++      dic[dicPos++] = (Byte)symbol;
+++      processedPos++;
+++      continue;
+++    }
+++    else
+++    {
+++      UPDATE_1(prob);
+++      prob = probs + IsRep + state;
+++      IF_BIT_0(prob)
+++      {
+++        UPDATE_0(prob);
+++        state += kNumStates;
+++        prob = probs + LenCoder;
+++      }
+++      else
+++      {
+++        UPDATE_1(prob);
+++        if (checkDicSize == 0 && processedPos == 0)
+++          return SZ_ERROR_DATA;
+++        prob = probs + IsRepG0 + state;
+++        IF_BIT_0(prob)
+++        {
+++          UPDATE_0(prob);
+++          prob = probs + IsRep0Long + (state << kNumPosBitsMax) + posState;
+++          IF_BIT_0(prob)
+++          {
+++            UPDATE_0(prob);
+++            dic[dicPos] = dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)];
+++            dicPos++;
+++            processedPos++;
+++            state = state < kNumLitStates ? 9 : 11;
+++            continue;
+++          }
+++          UPDATE_1(prob);
+++        }
+++        else
+++        {
+++          UInt32 distance;
+++          UPDATE_1(prob);
+++          prob = probs + IsRepG1 + state;
+++          IF_BIT_0(prob)
+++          {
+++            UPDATE_0(prob);
+++            distance = rep1;
+++          }
+++          else
+++          {
+++            UPDATE_1(prob);
+++            prob = probs + IsRepG2 + state;
+++            IF_BIT_0(prob)
+++            {
+++              UPDATE_0(prob);
+++              distance = rep2;
+++            }
+++            else
+++            {
+++              UPDATE_1(prob);
+++              distance = rep3;
+++              rep3 = rep2;
+++            }
+++            rep2 = rep1;
+++          }
+++          rep1 = rep0;
+++          rep0 = distance;
+++        }
+++        state = state < kNumLitStates ? 8 : 11;
+++        prob = probs + RepLenCoder;
+++      }
+++      {
+++        unsigned limit, offset;
+++        CLzmaProb *probLen = prob + LenChoice;
+++        IF_BIT_0(probLen)
+++        {
+++          UPDATE_0(probLen);
+++          probLen = prob + LenLow + (posState << kLenNumLowBits);
+++          offset = 0;
+++          limit = (1 << kLenNumLowBits);
+++        }
+++        else
+++        {
+++          UPDATE_1(probLen);
+++          probLen = prob + LenChoice2;
+++          IF_BIT_0(probLen)
+++          {
+++            UPDATE_0(probLen);
+++            probLen = prob + LenMid + (posState << kLenNumMidBits);
+++            offset = kLenNumLowSymbols;
+++            limit = (1 << kLenNumMidBits);
+++          }
+++          else
+++          {
+++            UPDATE_1(probLen);
+++            probLen = prob + LenHigh;
+++            offset = kLenNumLowSymbols + kLenNumMidSymbols;
+++            limit = (1 << kLenNumHighBits);
+++          }
+++        }
+++        TREE_DECODE(probLen, limit, len);
+++        len += offset;
+++      }
+++
+++      if (state >= kNumStates)
+++      {
+++        UInt32 distance;
+++        prob = probs + PosSlot +
+++            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << kNumPosSlotBits);
+++        TREE_6_DECODE(prob, distance);
+++        if (distance >= kStartPosModelIndex)
+++        {
+++          unsigned posSlot = (unsigned)distance;
+++          int numDirectBits = (int)(((distance >> 1) - 1));
+++          distance = (2 | (distance & 1));
+++          if (posSlot < kEndPosModelIndex)
+++          {
+++            distance <<= numDirectBits;
+++            prob = probs + SpecPos + distance - posSlot - 1;
+++            {
+++              UInt32 mask = 1;
+++              unsigned i = 1;
+++              do
+++              {
+++                GET_BIT2(prob + i, i, ; , distance |= mask);
+++                mask <<= 1;
+++              }
+++              while (--numDirectBits != 0);
+++            }
+++          }
+++          else
+++          {
+++            numDirectBits -= kNumAlignBits;
+++            do
+++            {
+++              NORMALIZE
+++              range >>= 1;
+++
+++              {
+++                UInt32 t;
+++                code -= range;
+++                t = (0 - ((UInt32)code >> 31)); /* (UInt32)((Int32)code >> 31) */
+++                distance = (distance << 1) + (t + 1);
+++                code += range & t;
+++              }
+++              /*
+++              distance <<= 1;
+++              if (code >= range)
+++              {
+++                code -= range;
+++                distance |= 1;
+++              }
+++              */
+++            }
+++            while (--numDirectBits != 0);
+++            prob = probs + Align;
+++            distance <<= kNumAlignBits;
+++            {
+++              unsigned i = 1;
+++              GET_BIT2(prob + i, i, ; , distance |= 1);
+++              GET_BIT2(prob + i, i, ; , distance |= 2);
+++              GET_BIT2(prob + i, i, ; , distance |= 4);
+++              GET_BIT2(prob + i, i, ; , distance |= 8);
+++            }
+++            if (distance == (UInt32)0xFFFFFFFF)
+++            {
+++              len += kMatchSpecLenStart;
+++              state -= kNumStates;
+++              break;
+++            }
+++          }
+++        }
+++        rep3 = rep2;
+++        rep2 = rep1;
+++        rep1 = rep0;
+++        rep0 = distance + 1;
+++        if (checkDicSize == 0)
+++        {
+++          if (distance >= processedPos)
+++            return SZ_ERROR_DATA;
+++        }
+++        else if (distance >= checkDicSize)
+++          return SZ_ERROR_DATA;
+++        state = (state < kNumStates + kNumLitStates) ? kNumLitStates : kNumLitStates + 3;
+++      }
+++
+++      len += kMatchMinLen;
+++
+++      if (limit == dicPos)
+++        return SZ_ERROR_DATA;
+++      {
+++        SizeT rem = limit - dicPos;
+++        unsigned curLen = ((rem < len) ? (unsigned)rem : len);
+++        SizeT pos = (dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0);
+++
+++        processedPos += curLen;
+++
+++        len -= curLen;
+++        if (pos + curLen <= dicBufSize)
+++        {
+++          Byte *dest = dic + dicPos;
+++          ptrdiff_t src = (ptrdiff_t)pos - (ptrdiff_t)dicPos;
+++          const Byte *lim = dest + curLen;
+++          dicPos += curLen;
+++          do
+++            *(dest) = (Byte)*(dest + src);
+++          while (++dest != lim);
+++        }
+++        else
+++        {
+++          do
+++          {
+++            dic[dicPos++] = dic[pos];
+++            if (++pos == dicBufSize)
+++              pos = 0;
+++          }
+++          while (--curLen != 0);
+++        }
+++      }
+++    }
+++  }
+++  while (dicPos < limit && buf < bufLimit);
+++  NORMALIZE;
+++  p->buf = buf;
+++  p->range = range;
+++  p->code = code;
+++  p->remainLen = len;
+++  p->dicPos = dicPos;
+++  p->processedPos = processedPos;
+++  p->reps[0] = rep0;
+++  p->reps[1] = rep1;
+++  p->reps[2] = rep2;
+++  p->reps[3] = rep3;
+++  p->state = state;
+++
+++  return SZ_OK;
+++}
+++
+++static void MY_FAST_CALL LzmaDec_WriteRem(CLzmaDec *p, SizeT limit)
+++{
+++  if (p->remainLen != 0 && p->remainLen < kMatchSpecLenStart)
+++  {
+++    Byte *dic = p->dic;
+++    SizeT dicPos = p->dicPos;
+++    SizeT dicBufSize = p->dicBufSize;
+++    unsigned len = p->remainLen;
+++    UInt32 rep0 = p->reps[0];
+++    if (limit - dicPos < len)
+++      len = (unsigned)(limit - dicPos);
+++
+++    if (p->checkDicSize == 0 && p->prop.dicSize - p->processedPos <= len)
+++      p->checkDicSize = p->prop.dicSize;
+++
+++    p->processedPos += len;
+++    p->remainLen -= len;
+++    while (len-- != 0)
+++    {
+++      dic[dicPos] = dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)];
+++      dicPos++;
+++    }
+++    p->dicPos = dicPos;
+++  }
+++}
+++
+++static int MY_FAST_CALL LzmaDec_DecodeReal2(CLzmaDec *p, SizeT limit, const Byte *bufLimit)
+++{
+++  do
+++  {
+++    SizeT limit2 = limit;
+++    if (p->checkDicSize == 0)
+++    {
+++      UInt32 rem = p->prop.dicSize - p->processedPos;
+++      if (limit - p->dicPos > rem)
+++        limit2 = p->dicPos + rem;
+++    }
+++    RINOK(LzmaDec_DecodeReal(p, limit2, bufLimit));
+++    if (p->processedPos >= p->prop.dicSize)
+++      p->checkDicSize = p->prop.dicSize;
+++    LzmaDec_WriteRem(p, limit);
+++  }
+++  while (p->dicPos < limit && p->buf < bufLimit && p->remainLen < kMatchSpecLenStart);
+++
+++  if (p->remainLen > kMatchSpecLenStart)
+++  {
+++    p->remainLen = kMatchSpecLenStart;
+++  }
+++  return 0;
+++}
+++
+++typedef enum
+++{
+++  DUMMY_ERROR, /* unexpected end of input stream */
+++  DUMMY_LIT,
+++  DUMMY_MATCH,
+++  DUMMY_REP
+++} ELzmaDummy;
+++
+++static ELzmaDummy LzmaDec_TryDummy(const CLzmaDec *p, const Byte *buf, SizeT inSize)
+++{
+++  UInt32 range = p->range;
+++  UInt32 code = p->code;
+++  const Byte *bufLimit = buf + inSize;
+++  CLzmaProb *probs = p->probs;
+++  unsigned state = p->state;
+++  ELzmaDummy res;
+++
+++  {
+++    CLzmaProb *prob;
+++    UInt32 bound;
+++    unsigned ttt;
+++    unsigned posState = (p->processedPos) & ((1 << p->prop.pb) - 1);
+++
+++    prob = probs + IsMatch + (state << kNumPosBitsMax) + posState;
+++    IF_BIT_0_CHECK(prob)
+++    {
+++      UPDATE_0_CHECK
+++
+++      /* if (bufLimit - buf >= 7) return DUMMY_LIT; */
+++
+++      prob = probs + Literal;
+++      if (p->checkDicSize != 0 || p->processedPos != 0)
+++        prob += (LZMA_LIT_SIZE *
+++          ((((p->processedPos) & ((1 << (p->prop.lp)) - 1)) << p->prop.lc) +
+++          (p->dic[(p->dicPos == 0 ? p->dicBufSize : p->dicPos) - 1] >> (8 - p->prop.lc))));
+++
+++      if (state < kNumLitStates)
+++      {
+++        unsigned symbol = 1;
+++        do { GET_BIT_CHECK(prob + symbol, symbol) } while (symbol < 0x100);
+++      }
+++      else
+++      {
+++        unsigned matchByte = p->dic[p->dicPos - p->reps[0] +
+++            ((p->dicPos < p->reps[0]) ? p->dicBufSize : 0)];
+++        unsigned offs = 0x100;
+++        unsigned symbol = 1;
+++        do
+++        {
+++          unsigned bit;
+++          CLzmaProb *probLit;
+++          matchByte <<= 1;
+++          bit = (matchByte & offs);
+++          probLit = prob + offs + bit + symbol;
+++          GET_BIT2_CHECK(probLit, symbol, offs &= ~bit, offs &= bit)
+++        }
+++        while (symbol < 0x100);
+++      }
+++      res = DUMMY_LIT;
+++    }
+++    else
+++    {
+++      unsigned len;
+++      UPDATE_1_CHECK;
+++
+++      prob = probs + IsRep + state;
+++      IF_BIT_0_CHECK(prob)
+++      {
+++        UPDATE_0_CHECK;
+++        state = 0;
+++        prob = probs + LenCoder;
+++        res = DUMMY_MATCH;
+++      }
+++      else
+++      {
+++        UPDATE_1_CHECK;
+++        res = DUMMY_REP;
+++        prob = probs + IsRepG0 + state;
+++        IF_BIT_0_CHECK(prob)
+++        {
+++          UPDATE_0_CHECK;
+++          prob = probs + IsRep0Long + (state << kNumPosBitsMax) + posState;
+++          IF_BIT_0_CHECK(prob)
+++          {
+++            UPDATE_0_CHECK;
+++            NORMALIZE_CHECK;
+++            return DUMMY_REP;
+++          }
+++          else
+++          {
+++            UPDATE_1_CHECK;
+++          }
+++        }
+++        else
+++        {
+++          UPDATE_1_CHECK;
+++          prob = probs + IsRepG1 + state;
+++          IF_BIT_0_CHECK(prob)
+++          {
+++            UPDATE_0_CHECK;
+++          }
+++          else
+++          {
+++            UPDATE_1_CHECK;
+++            prob = probs + IsRepG2 + state;
+++            IF_BIT_0_CHECK(prob)
+++            {
+++              UPDATE_0_CHECK;
+++            }
+++            else
+++            {
+++              UPDATE_1_CHECK;
+++            }
+++          }
+++        }
+++        state = kNumStates;
+++        prob = probs + RepLenCoder;
+++      }
+++      {
+++        unsigned limit, offset;
+++        CLzmaProb *probLen = prob + LenChoice;
+++        IF_BIT_0_CHECK(probLen)
+++        {
+++          UPDATE_0_CHECK;
+++          probLen = prob + LenLow + (posState << kLenNumLowBits);
+++          offset = 0;
+++          limit = 1 << kLenNumLowBits;
+++        }
+++        else
+++        {
+++          UPDATE_1_CHECK;
+++          probLen = prob + LenChoice2;
+++          IF_BIT_0_CHECK(probLen)
+++          {
+++            UPDATE_0_CHECK;
+++            probLen = prob + LenMid + (posState << kLenNumMidBits);
+++            offset = kLenNumLowSymbols;
+++            limit = 1 << kLenNumMidBits;
+++          }
+++          else
+++          {
+++            UPDATE_1_CHECK;
+++            probLen = prob + LenHigh;
+++            offset = kLenNumLowSymbols + kLenNumMidSymbols;
+++            limit = 1 << kLenNumHighBits;
+++          }
+++        }
+++        TREE_DECODE_CHECK(probLen, limit, len);
+++        len += offset;
+++      }
+++
+++      if (state < 4)
+++      {
+++        unsigned posSlot;
+++        prob = probs + PosSlot +
+++            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
+++            kNumPosSlotBits);
+++        TREE_DECODE_CHECK(prob, 1 << kNumPosSlotBits, posSlot);
+++        if (posSlot >= kStartPosModelIndex)
+++        {
+++          int numDirectBits = ((posSlot >> 1) - 1);
+++
+++          /* if (bufLimit - buf >= 8) return DUMMY_MATCH; */
+++
+++          if (posSlot < kEndPosModelIndex)
+++          {
+++            prob = probs + SpecPos + ((2 | (posSlot & 1)) << numDirectBits) - posSlot - 1;
+++          }
+++          else
+++          {
+++            numDirectBits -= kNumAlignBits;
+++            do
+++            {
+++              NORMALIZE_CHECK
+++              range >>= 1;
+++              code -= range & (((code - range) >> 31) - 1);
+++              /* if (code >= range) code -= range; */
+++            }
+++            while (--numDirectBits != 0);
+++            prob = probs + Align;
+++            numDirectBits = kNumAlignBits;
+++          }
+++          {
+++            unsigned i = 1;
+++            do
+++            {
+++              GET_BIT_CHECK(prob + i, i);
+++            }
+++            while (--numDirectBits != 0);
+++          }
+++        }
+++      }
+++    }
+++  }
+++  NORMALIZE_CHECK;
+++  return res;
+++}
+++
+++
+++static void LzmaDec_InitRc(CLzmaDec *p, const Byte *data)
+++{
+++  p->code = ((UInt32)data[1] << 24) | ((UInt32)data[2] << 16) | ((UInt32)data[3] << 8) | ((UInt32)data[4]);
+++  p->range = 0xFFFFFFFF;
+++  p->needFlush = 0;
+++}
+++
+++void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
+++{
+++  p->needFlush = 1;
+++  p->remainLen = 0;
+++  p->tempBufSize = 0;
+++
+++  if (initDic)
+++  {
+++    p->processedPos = 0;
+++    p->checkDicSize = 0;
+++    p->needInitState = 1;
+++  }
+++  if (initState)
+++    p->needInitState = 1;
+++}
+++
+++void LzmaDec_Init(CLzmaDec *p)
+++{
+++  p->dicPos = 0;
+++  LzmaDec_InitDicAndState(p, True, True);
+++}
+++
+++static void LzmaDec_InitStateReal(CLzmaDec *p)
+++{
+++  UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (p->prop.lc + p->prop.lp));
+++  UInt32 i;
+++  CLzmaProb *probs = p->probs;
+++  for (i = 0; i < numProbs; i++)
+++    probs[i] = kBitModelTotal >> 1;
+++  p->reps[0] = p->reps[1] = p->reps[2] = p->reps[3] = 1;
+++  p->state = 0;
+++  p->needInitState = 0;
+++}
+++
+++SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
+++    ELzmaFinishMode finishMode, ELzmaStatus *status)
+++{
+++  SizeT inSize = *srcLen;
+++  (*srcLen) = 0;
+++  LzmaDec_WriteRem(p, dicLimit);
+++
+++  *status = LZMA_STATUS_NOT_SPECIFIED;
+++
+++  while (p->remainLen != kMatchSpecLenStart)
+++  {
+++      int checkEndMarkNow;
+++
+++      if (p->needFlush != 0)
+++      {
+++        for (; inSize > 0 && p->tempBufSize < RC_INIT_SIZE; (*srcLen)++, inSize--)
+++          p->tempBuf[p->tempBufSize++] = *src++;
+++        if (p->tempBufSize < RC_INIT_SIZE)
+++        {
+++          *status = LZMA_STATUS_NEEDS_MORE_INPUT;
+++          return SZ_OK;
+++        }
+++        if (p->tempBuf[0] != 0)
+++          return SZ_ERROR_DATA;
+++
+++        LzmaDec_InitRc(p, p->tempBuf);
+++        p->tempBufSize = 0;
+++      }
+++
+++      checkEndMarkNow = 0;
+++      if (p->dicPos >= dicLimit)
+++      {
+++        if (p->remainLen == 0 && p->code == 0)
+++        {
+++          *status = LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK;
+++          return SZ_OK;
+++        }
+++        if (finishMode == LZMA_FINISH_ANY)
+++        {
+++          *status = LZMA_STATUS_NOT_FINISHED;
+++          return SZ_OK;
+++        }
+++        if (p->remainLen != 0)
+++        {
+++          *status = LZMA_STATUS_NOT_FINISHED;
+++          return SZ_ERROR_DATA;
+++        }
+++        checkEndMarkNow = 1;
+++      }
+++
+++      if (p->needInitState)
+++        LzmaDec_InitStateReal(p);
+++
+++      if (p->tempBufSize == 0)
+++      {
+++        SizeT processed;
+++        const Byte *bufLimit;
+++        if (inSize < LZMA_REQUIRED_INPUT_MAX || checkEndMarkNow)
+++        {
+++          int dummyRes = LzmaDec_TryDummy(p, src, inSize);
+++          if (dummyRes == DUMMY_ERROR)
+++          {
+++            memcpy(p->tempBuf, src, inSize);
+++            p->tempBufSize = (unsigned)inSize;
+++            (*srcLen) += inSize;
+++            *status = LZMA_STATUS_NEEDS_MORE_INPUT;
+++            return SZ_OK;
+++          }
+++          if (checkEndMarkNow && dummyRes != DUMMY_MATCH)
+++          {
+++            *status = LZMA_STATUS_NOT_FINISHED;
+++            return SZ_ERROR_DATA;
+++          }
+++          bufLimit = src;
+++        }
+++        else
+++          bufLimit = src + inSize - LZMA_REQUIRED_INPUT_MAX;
+++        p->buf = src;
+++        if (LzmaDec_DecodeReal2(p, dicLimit, bufLimit) != 0)
+++          return SZ_ERROR_DATA;
+++        processed = (SizeT)(p->buf - src);
+++        (*srcLen) += processed;
+++        src += processed;
+++        inSize -= processed;
+++      }
+++      else
+++      {
+++        unsigned rem = p->tempBufSize, lookAhead = 0;
+++        while (rem < LZMA_REQUIRED_INPUT_MAX && lookAhead < inSize)
+++          p->tempBuf[rem++] = src[lookAhead++];
+++        p->tempBufSize = rem;
+++        if (rem < LZMA_REQUIRED_INPUT_MAX || checkEndMarkNow)
+++        {
+++          int dummyRes = LzmaDec_TryDummy(p, p->tempBuf, rem);
+++          if (dummyRes == DUMMY_ERROR)
+++          {
+++            (*srcLen) += lookAhead;
+++            *status = LZMA_STATUS_NEEDS_MORE_INPUT;
+++            return SZ_OK;
+++          }
+++          if (checkEndMarkNow && dummyRes != DUMMY_MATCH)
+++          {
+++            *status = LZMA_STATUS_NOT_FINISHED;
+++            return SZ_ERROR_DATA;
+++          }
+++        }
+++        p->buf = p->tempBuf;
+++        if (LzmaDec_DecodeReal2(p, dicLimit, p->buf) != 0)
+++          return SZ_ERROR_DATA;
+++        lookAhead -= (rem - (unsigned)(p->buf - p->tempBuf));
+++        (*srcLen) += lookAhead;
+++        src += lookAhead;
+++        inSize -= lookAhead;
+++        p->tempBufSize = 0;
+++      }
+++  }
+++  if (p->code == 0)
+++    *status = LZMA_STATUS_FINISHED_WITH_MARK;
+++  return (p->code == 0) ? SZ_OK : SZ_ERROR_DATA;
+++}
+++
+++SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status)
+++{
+++  SizeT outSize = *destLen;
+++  SizeT inSize = *srcLen;
+++  *srcLen = *destLen = 0;
+++  for (;;)
+++  {
+++    SizeT inSizeCur = inSize, outSizeCur, dicPos;
+++    ELzmaFinishMode curFinishMode;
+++    SRes res;
+++    if (p->dicPos == p->dicBufSize)
+++      p->dicPos = 0;
+++    dicPos = p->dicPos;
+++    if (outSize > p->dicBufSize - dicPos)
+++    {
+++      outSizeCur = p->dicBufSize;
+++      curFinishMode = LZMA_FINISH_ANY;
+++    }
+++    else
+++    {
+++      outSizeCur = dicPos + outSize;
+++      curFinishMode = finishMode;
+++    }
+++
+++    res = LzmaDec_DecodeToDic(p, outSizeCur, src, &inSizeCur, curFinishMode, status);
+++    src += inSizeCur;
+++    inSize -= inSizeCur;
+++    *srcLen += inSizeCur;
+++    outSizeCur = p->dicPos - dicPos;
+++    memcpy(dest, p->dic + dicPos, outSizeCur);
+++    dest += outSizeCur;
+++    outSize -= outSizeCur;
+++    *destLen += outSizeCur;
+++    if (res != 0)
+++      return res;
+++    if (outSizeCur == 0 || outSize == 0)
+++      return SZ_OK;
+++  }
+++}
+++
+++void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
+++{
+++  alloc->Free(alloc, p->probs);
+++  p->probs = 0;
+++}
+++
+++static void LzmaDec_FreeDict(CLzmaDec *p, ISzAlloc *alloc)
+++{
+++  alloc->Free(alloc, p->dic);
+++  p->dic = 0;
+++}
+++
+++void LzmaDec_Free(CLzmaDec *p, ISzAlloc *alloc)
+++{
+++  LzmaDec_FreeProbs(p, alloc);
+++  LzmaDec_FreeDict(p, alloc);
+++}
+++
+++SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
+++{
+++  UInt32 dicSize;
+++  Byte d;
+++
+++  if (size < LZMA_PROPS_SIZE)
+++    return SZ_ERROR_UNSUPPORTED;
+++  else
+++    dicSize = data[1] | ((UInt32)data[2] << 8) | ((UInt32)data[3] << 16) | ((UInt32)data[4] << 24);
+++
+++  if (dicSize < LZMA_DIC_MIN)
+++    dicSize = LZMA_DIC_MIN;
+++  p->dicSize = dicSize;
+++
+++  d = data[0];
+++  if (d >= (9 * 5 * 5))
+++    return SZ_ERROR_UNSUPPORTED;
+++
+++  p->lc = d % 9;
+++  d /= 9;
+++  p->pb = d / 5;
+++  p->lp = d % 5;
+++
+++  return SZ_OK;
+++}
+++
+++static SRes LzmaDec_AllocateProbs2(CLzmaDec *p, const CLzmaProps *propNew, ISzAlloc *alloc)
+++{
+++  UInt32 numProbs = LzmaProps_GetNumProbs(propNew);
+++  if (p->probs == 0 || numProbs != p->numProbs)
+++  {
+++    LzmaDec_FreeProbs(p, alloc);
+++    p->probs = (CLzmaProb *)alloc->Alloc(alloc, numProbs * sizeof(CLzmaProb));
+++    p->numProbs = numProbs;
+++    if (p->probs == 0)
+++      return SZ_ERROR_MEM;
+++  }
+++  return SZ_OK;
+++}
+++
+++SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
+++{
+++  CLzmaProps propNew;
+++  RINOK(LzmaProps_Decode(&propNew, props, propsSize));
+++  RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc));
+++  p->prop = propNew;
+++  return SZ_OK;
+++}
+++
+++SRes LzmaDec_Allocate(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
+++{
+++  CLzmaProps propNew;
+++  SizeT dicBufSize;
+++  RINOK(LzmaProps_Decode(&propNew, props, propsSize));
+++  RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc));
+++  dicBufSize = propNew.dicSize;
+++  if (p->dic == 0 || dicBufSize != p->dicBufSize)
+++  {
+++    LzmaDec_FreeDict(p, alloc);
+++    p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize);
+++    if (p->dic == 0)
+++    {
+++      LzmaDec_FreeProbs(p, alloc);
+++      return SZ_ERROR_MEM;
+++    }
+++  }
+++  p->dicBufSize = dicBufSize;
+++  p->prop = propNew;
+++  return SZ_OK;
+++}
+++
+++SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
+++    const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode,
+++    ELzmaStatus *status, ISzAlloc *alloc)
+++{
+++  CLzmaDec p;
+++  SRes res;
+++  SizeT inSize = *srcLen;
+++  SizeT outSize = *destLen;
+++  *srcLen = *destLen = 0;
+++  if (inSize < RC_INIT_SIZE)
+++    return SZ_ERROR_INPUT_EOF;
+++
+++  LzmaDec_Construct(&p);
+++  res = LzmaDec_AllocateProbs(&p, propData, propSize, alloc);
+++  if (res != 0)
+++    return res;
+++  p.dic = dest;
+++  p.dicBufSize = outSize;
+++
+++  LzmaDec_Init(&p);
+++
+++  *srcLen = inSize;
+++  res = LzmaDec_DecodeToDic(&p, outSize, src, srcLen, finishMode, status);
+++
+++  if (res == SZ_OK && *status == LZMA_STATUS_NEEDS_MORE_INPUT)
+++    res = SZ_ERROR_INPUT_EOF;
+++
+++  (*destLen) = p.dicPos;
+++  LzmaDec_FreeProbs(&p, alloc);
+++  return res;
+++}
++--- /dev/null
+++++ b/lib/lzma/LzmaEnc.c
++@@ -0,0 +1,2271 @@
+++/* LzmaEnc.c -- LZMA Encoder
+++2009-11-24 : Igor Pavlov : Public domain */
+++
+++#include <string.h>
+++
+++/* #define SHOW_STAT */
+++/* #define SHOW_STAT2 */
+++
+++#if defined(SHOW_STAT) || defined(SHOW_STAT2)
+++#include <stdio.h>
+++#endif
+++
+++#include "LzmaEnc.h"
+++
+++/* disable MT */
+++#define _7ZIP_ST
+++
+++#include "LzFind.h"
+++#ifndef _7ZIP_ST
+++#include "LzFindMt.h"
+++#endif
+++
+++#ifdef SHOW_STAT
+++static int ttt = 0;
+++#endif
+++
+++#define kBlockSizeMax ((1 << LZMA_NUM_BLOCK_SIZE_BITS) - 1)
+++
+++#define kBlockSize (9 << 10)
+++#define kUnpackBlockSize (1 << 18)
+++#define kMatchArraySize (1 << 21)
+++#define kMatchRecordMaxSize ((LZMA_MATCH_LEN_MAX * 2 + 3) * LZMA_MATCH_LEN_MAX)
+++
+++#define kNumMaxDirectBits (31)
+++
+++#define kNumTopBits 24
+++#define kTopValue ((UInt32)1 << kNumTopBits)
+++
+++#define kNumBitModelTotalBits 11
+++#define kBitModelTotal (1 << kNumBitModelTotalBits)
+++#define kNumMoveBits 5
+++#define kProbInitValue (kBitModelTotal >> 1)
+++
+++#define kNumMoveReducingBits 4
+++#define kNumBitPriceShiftBits 4
+++#define kBitPrice (1 << kNumBitPriceShiftBits)
+++
+++void LzmaEncProps_Init(CLzmaEncProps *p)
+++{
+++  p->level = 5;
+++  p->dictSize = p->mc = 0;
+++  p->lc = p->lp = p->pb = p->algo = p->fb = p->btMode = p->numHashBytes = p->numThreads = -1;
+++  p->writeEndMark = 0;
+++}
+++
+++void LzmaEncProps_Normalize(CLzmaEncProps *p)
+++{
+++  int level = p->level;
+++  if (level < 0) level = 5;
+++  p->level = level;
+++  if (p->dictSize == 0) p->dictSize = (level <= 5 ? (1 << (level * 2 + 14)) : (level == 6 ? (1 << 25) : (1 << 26)));
+++  if (p->lc < 0) p->lc = 3;
+++  if (p->lp < 0) p->lp = 0;
+++  if (p->pb < 0) p->pb = 2;
+++  if (p->algo < 0) p->algo = (level < 5 ? 0 : 1);
+++  if (p->fb < 0) p->fb = (level < 7 ? 32 : 64);
+++  if (p->btMode < 0) p->btMode = (p->algo == 0 ? 0 : 1);
+++  if (p->numHashBytes < 0) p->numHashBytes = 4;
+++  if (p->mc == 0)  p->mc = (16 + (p->fb >> 1)) >> (p->btMode ? 0 : 1);
+++  if (p->numThreads < 0)
+++    p->numThreads =
+++      #ifndef _7ZIP_ST
+++      ((p->btMode && p->algo) ? 2 : 1);
+++      #else
+++      1;
+++      #endif
+++}
+++
+++UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
+++{
+++  CLzmaEncProps props = *props2;
+++  LzmaEncProps_Normalize(&props);
+++  return props.dictSize;
+++}
+++
+++/* #define LZMA_LOG_BSR */
+++/* Define it for Intel's CPU */
+++
+++
+++#ifdef LZMA_LOG_BSR
+++
+++#define kDicLogSizeMaxCompress 30
+++
+++#define BSR2_RET(pos, res) { unsigned long i; _BitScanReverse(&i, (pos)); res = (i + i) + ((pos >> (i - 1)) & 1); }
+++
+++UInt32 GetPosSlot1(UInt32 pos)
+++{
+++  UInt32 res;
+++  BSR2_RET(pos, res);
+++  return res;
+++}
+++#define GetPosSlot2(pos, res) { BSR2_RET(pos, res); }
+++#define GetPosSlot(pos, res) { if (pos < 2) res = pos; else BSR2_RET(pos, res); }
+++
+++#else
+++
+++#define kNumLogBits (9 + (int)sizeof(size_t) / 2)
+++#define kDicLogSizeMaxCompress ((kNumLogBits - 1) * 2 + 7)
+++
+++void LzmaEnc_FastPosInit(Byte *g_FastPos)
+++{
+++  int c = 2, slotFast;
+++  g_FastPos[0] = 0;
+++  g_FastPos[1] = 1;
+++
+++  for (slotFast = 2; slotFast < kNumLogBits * 2; slotFast++)
+++  {
+++    UInt32 k = (1 << ((slotFast >> 1) - 1));
+++    UInt32 j;
+++    for (j = 0; j < k; j++, c++)
+++      g_FastPos[c] = (Byte)slotFast;
+++  }
+++}
+++
+++#define BSR2_RET(pos, res) { UInt32 i = 6 + ((kNumLogBits - 1) & \
+++  (0 - (((((UInt32)1 << (kNumLogBits + 6)) - 1) - pos) >> 31))); \
+++  res = p->g_FastPos[pos >> i] + (i * 2); }
+++/*
+++#define BSR2_RET(pos, res) { res = (pos < (1 << (kNumLogBits + 6))) ? \
+++  p->g_FastPos[pos >> 6] + 12 : \
+++  p->g_FastPos[pos >> (6 + kNumLogBits - 1)] + (6 + (kNumLogBits - 1)) * 2; }
+++*/
+++
+++#define GetPosSlot1(pos) p->g_FastPos[pos]
+++#define GetPosSlot2(pos, res) { BSR2_RET(pos, res); }
+++#define GetPosSlot(pos, res) { if (pos < kNumFullDistances) res = p->g_FastPos[pos]; else BSR2_RET(pos, res); }
+++
+++#endif
+++
+++
+++#define LZMA_NUM_REPS 4
+++
+++typedef unsigned CState;
+++
+++typedef struct
+++{
+++  UInt32 price;
+++
+++  CState state;
+++  int prev1IsChar;
+++  int prev2;
+++
+++  UInt32 posPrev2;
+++  UInt32 backPrev2;
+++
+++  UInt32 posPrev;
+++  UInt32 backPrev;
+++  UInt32 backs[LZMA_NUM_REPS];
+++} COptimal;
+++
+++#define kNumOpts (1 << 12)
+++
+++#define kNumLenToPosStates 4
+++#define kNumPosSlotBits 6
+++#define kDicLogSizeMin 0
+++#define kDicLogSizeMax 32
+++#define kDistTableSizeMax (kDicLogSizeMax * 2)
+++
+++
+++#define kNumAlignBits 4
+++#define kAlignTableSize (1 << kNumAlignBits)
+++#define kAlignMask (kAlignTableSize - 1)
+++
+++#define kStartPosModelIndex 4
+++#define kEndPosModelIndex 14
+++#define kNumPosModels (kEndPosModelIndex - kStartPosModelIndex)
+++
+++#define kNumFullDistances (1 << (kEndPosModelIndex >> 1))
+++
+++#ifdef _LZMA_PROB32
+++#define CLzmaProb UInt32
+++#else
+++#define CLzmaProb UInt16
+++#endif
+++
+++#define LZMA_PB_MAX 4
+++#define LZMA_LC_MAX 8
+++#define LZMA_LP_MAX 4
+++
+++#define LZMA_NUM_PB_STATES_MAX (1 << LZMA_PB_MAX)
+++
+++
+++#define kLenNumLowBits 3
+++#define kLenNumLowSymbols (1 << kLenNumLowBits)
+++#define kLenNumMidBits 3
+++#define kLenNumMidSymbols (1 << kLenNumMidBits)
+++#define kLenNumHighBits 8
+++#define kLenNumHighSymbols (1 << kLenNumHighBits)
+++
+++#define kLenNumSymbolsTotal (kLenNumLowSymbols + kLenNumMidSymbols + kLenNumHighSymbols)
+++
+++#define LZMA_MATCH_LEN_MIN 2
+++#define LZMA_MATCH_LEN_MAX (LZMA_MATCH_LEN_MIN + kLenNumSymbolsTotal - 1)
+++
+++#define kNumStates 12
+++
+++typedef struct
+++{
+++  CLzmaProb choice;
+++  CLzmaProb choice2;
+++  CLzmaProb low[LZMA_NUM_PB_STATES_MAX << kLenNumLowBits];
+++  CLzmaProb mid[LZMA_NUM_PB_STATES_MAX << kLenNumMidBits];
+++  CLzmaProb high[kLenNumHighSymbols];
+++} CLenEnc;
+++
+++typedef struct
+++{
+++  CLenEnc p;
+++  UInt32 prices[LZMA_NUM_PB_STATES_MAX][kLenNumSymbolsTotal];
+++  UInt32 tableSize;
+++  UInt32 counters[LZMA_NUM_PB_STATES_MAX];
+++} CLenPriceEnc;
+++
+++typedef struct
+++{
+++  UInt32 range;
+++  Byte cache;
+++  UInt64 low;
+++  UInt64 cacheSize;
+++  Byte *buf;
+++  Byte *bufLim;
+++  Byte *bufBase;
+++  ISeqOutStream *outStream;
+++  UInt64 processed;
+++  SRes res;
+++} CRangeEnc;
+++
+++typedef struct
+++{
+++  CLzmaProb *litProbs;
+++
+++  CLzmaProb isMatch[kNumStates][LZMA_NUM_PB_STATES_MAX];
+++  CLzmaProb isRep[kNumStates];
+++  CLzmaProb isRepG0[kNumStates];
+++  CLzmaProb isRepG1[kNumStates];
+++  CLzmaProb isRepG2[kNumStates];
+++  CLzmaProb isRep0Long[kNumStates][LZMA_NUM_PB_STATES_MAX];
+++
+++  CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits];
+++  CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex];
+++  CLzmaProb posAlignEncoder[1 << kNumAlignBits];
+++
+++  CLenPriceEnc lenEnc;
+++  CLenPriceEnc repLenEnc;
+++
+++  UInt32 reps[LZMA_NUM_REPS];
+++  UInt32 state;
+++} CSaveState;
+++
+++typedef struct
+++{
+++  IMatchFinder matchFinder;
+++  void *matchFinderObj;
+++
+++  #ifndef _7ZIP_ST
+++  Bool mtMode;
+++  CMatchFinderMt matchFinderMt;
+++  #endif
+++
+++  CMatchFinder matchFinderBase;
+++
+++  #ifndef _7ZIP_ST
+++  Byte pad[128];
+++  #endif
+++
+++  UInt32 optimumEndIndex;
+++  UInt32 optimumCurrentIndex;
+++
+++  UInt32 longestMatchLength;
+++  UInt32 numPairs;
+++  UInt32 numAvail;
+++  COptimal opt[kNumOpts];
+++
+++  #ifndef LZMA_LOG_BSR
+++  Byte g_FastPos[1 << kNumLogBits];
+++  #endif
+++
+++  UInt32 ProbPrices[kBitModelTotal >> kNumMoveReducingBits];
+++  UInt32 matches[LZMA_MATCH_LEN_MAX * 2 + 2 + 1];
+++  UInt32 numFastBytes;
+++  UInt32 additionalOffset;
+++  UInt32 reps[LZMA_NUM_REPS];
+++  UInt32 state;
+++
+++  UInt32 posSlotPrices[kNumLenToPosStates][kDistTableSizeMax];
+++  UInt32 distancesPrices[kNumLenToPosStates][kNumFullDistances];
+++  UInt32 alignPrices[kAlignTableSize];
+++  UInt32 alignPriceCount;
+++
+++  UInt32 distTableSize;
+++
+++  unsigned lc, lp, pb;
+++  unsigned lpMask, pbMask;
+++
+++  CLzmaProb *litProbs;
+++
+++  CLzmaProb isMatch[kNumStates][LZMA_NUM_PB_STATES_MAX];
+++  CLzmaProb isRep[kNumStates];
+++  CLzmaProb isRepG0[kNumStates];
+++  CLzmaProb isRepG1[kNumStates];
+++  CLzmaProb isRepG2[kNumStates];
+++  CLzmaProb isRep0Long[kNumStates][LZMA_NUM_PB_STATES_MAX];
+++
+++  CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits];
+++  CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex];
+++  CLzmaProb posAlignEncoder[1 << kNumAlignBits];
+++
+++  CLenPriceEnc lenEnc;
+++  CLenPriceEnc repLenEnc;
+++
+++  unsigned lclp;
+++
+++  Bool fastMode;
+++
+++  CRangeEnc rc;
+++
+++  Bool writeEndMark;
+++  UInt64 nowPos64;
+++  UInt32 matchPriceCount;
+++  Bool finished;
+++  Bool multiThread;
+++
+++  SRes result;
+++  UInt32 dictSize;
+++  UInt32 matchFinderCycles;
+++
+++  int needInit;
+++
+++  CSaveState saveState;
+++} CLzmaEnc;
+++
+++void LzmaEnc_SaveState(CLzmaEncHandle pp)
+++{
+++  CLzmaEnc *p = (CLzmaEnc *)pp;
+++  CSaveState *dest = &p->saveState;
+++  int i;
+++  dest->lenEnc = p->lenEnc;
+++  dest->repLenEnc = p->repLenEnc;
+++  dest->state = p->state;
+++
+++  for (i = 0; i < kNumStates; i++)
+++  {
+++    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
+++    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
+++  }
+++  for (i = 0; i < kNumLenToPosStates; i++)
+++    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
+++  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
+++  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
+++  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
+++  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
+++  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
+++  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
+++  memcpy(dest->reps, p->reps, sizeof(p->reps));
+++  memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb));
+++}
+++
+++void LzmaEnc_RestoreState(CLzmaEncHandle pp)
+++{
+++  CLzmaEnc *dest = (CLzmaEnc *)pp;
+++  const CSaveState *p = &dest->saveState;
+++  int i;
+++  dest->lenEnc = p->lenEnc;
+++  dest->repLenEnc = p->repLenEnc;
+++  dest->state = p->state;
+++
+++  for (i = 0; i < kNumStates; i++)
+++  {
+++    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
+++    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
+++  }
+++  for (i = 0; i < kNumLenToPosStates; i++)
+++    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
+++  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
+++  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
+++  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
+++  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
+++  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
+++  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
+++  memcpy(dest->reps, p->reps, sizeof(p->reps));
+++  memcpy(dest->litProbs, p->litProbs, (0x300 << dest->lclp) * sizeof(CLzmaProb));
+++}
+++
+++SRes LzmaEnc_SetProps(CLzmaEncHandle pp, const CLzmaEncProps *props2)
+++{
+++  CLzmaEnc *p = (CLzmaEnc *)pp;
+++  CLzmaEncProps props = *props2;
+++  LzmaEncProps_Normalize(&props);
+++
+++  if (props.lc > LZMA_LC_MAX || props.lp > LZMA_LP_MAX || props.pb > LZMA_PB_MAX ||
+++      props.dictSize > (1 << kDicLogSizeMaxCompress) || props.dictSize > (1 << 30))
+++    return SZ_ERROR_PARAM;
+++  p->dictSize = props.dictSize;
+++  p->matchFinderCycles = props.mc;
+++  {
+++    unsigned fb = props.fb;
+++    if (fb < 5)
+++      fb = 5;
+++    if (fb > LZMA_MATCH_LEN_MAX)
+++      fb = LZMA_MATCH_LEN_MAX;
+++    p->numFastBytes = fb;
+++  }
+++  p->lc = props.lc;
+++  p->lp = props.lp;
+++  p->pb = props.pb;
+++  p->fastMode = (props.algo == 0);
+++  p->matchFinderBase.btMode = props.btMode;
+++  {
+++    UInt32 numHashBytes = 4;
+++    if (props.btMode)
+++    {
+++      if (props.numHashBytes < 2)
+++        numHashBytes = 2;
+++      else if (props.numHashBytes < 4)
+++        numHashBytes = props.numHashBytes;
+++    }
+++    p->matchFinderBase.numHashBytes = numHashBytes;
+++  }
+++
+++  p->matchFinderBase.cutValue = props.mc;
+++
+++  p->writeEndMark = props.writeEndMark;
+++
+++  #ifndef _7ZIP_ST
+++  /*
+++  if (newMultiThread != _multiThread)
+++  {
+++    ReleaseMatchFinder();
+++    _multiThread = newMultiThread;
+++  }
+++  */
+++  p->multiThread = (props.numThreads > 1);
+++  #endif
+++
+++  return SZ_OK;
+++}
+++
+++static const int kLiteralNextStates[kNumStates] = {0, 0, 0, 0, 1, 2, 3, 4,  5,  6,   4, 5};
+++static const int kMatchNextStates[kNumStates]   = {7, 7, 7, 7, 7, 7, 7, 10, 10, 10, 10, 10};
+++static const int kRepNextStates[kNumStates]     = {8, 8, 8, 8, 8, 8, 8, 11, 11, 11, 11, 11};
+++static const int kShortRepNextStates[kNumStates]= {9, 9, 9, 9, 9, 9, 9, 11, 11, 11, 11, 11};
+++
+++#define IsCharState(s) ((s) < 7)
+++
+++#define GetLenToPosState(len) (((len) < kNumLenToPosStates + 1) ? (len) - 2 : kNumLenToPosStates - 1)
+++
+++#define kInfinityPrice (1 << 30)
+++
+++static void RangeEnc_Construct(CRangeEnc *p)
+++{
+++  p->outStream = 0;
+++  p->bufBase = 0;
+++}
+++
+++#define RangeEnc_GetProcessed(p) ((p)->processed + ((p)->buf - (p)->bufBase) + (p)->cacheSize)
+++
+++#define RC_BUF_SIZE (1 << 16)
+++static int RangeEnc_Alloc(CRangeEnc *p, ISzAlloc *alloc)
+++{
+++  if (p->bufBase == 0)
+++  {
+++    p->bufBase = (Byte *)alloc->Alloc(alloc, RC_BUF_SIZE);
+++    if (p->bufBase == 0)
+++      return 0;
+++    p->bufLim = p->bufBase + RC_BUF_SIZE;
+++  }
+++  return 1;
+++}
+++
+++static void RangeEnc_Free(CRangeEnc *p, ISzAlloc *alloc)
+++{
+++  alloc->Free(alloc, p->bufBase);
+++  p->bufBase = 0;
+++}
+++
+++static void RangeEnc_Init(CRangeEnc *p)
+++{
+++  /* Stream.Init(); */
+++  p->low = 0;
+++  p->range = 0xFFFFFFFF;
+++  p->cacheSize = 1;
+++  p->cache = 0;
+++
+++  p->buf = p->bufBase;
+++
+++  p->processed = 0;
+++  p->res = SZ_OK;
+++}
+++
+++static void RangeEnc_FlushStream(CRangeEnc *p)
+++{
+++  size_t num;
+++  if (p->res != SZ_OK)
+++    return;
+++  num = p->buf - p->bufBase;
+++  if (num != p->outStream->Write(p->outStream, p->bufBase, num))
+++    p->res = SZ_ERROR_WRITE;
+++  p->processed += num;
+++  p->buf = p->bufBase;
+++}
+++
+++static void MY_FAST_CALL RangeEnc_ShiftLow(CRangeEnc *p)
+++{
+++  if ((UInt32)p->low < (UInt32)0xFF000000 || (int)(p->low >> 32) != 0)
+++  {
+++    Byte temp = p->cache;
+++    do
+++    {
+++      Byte *buf = p->buf;
+++      *buf++ = (Byte)(temp + (Byte)(p->low >> 32));
+++      p->buf = buf;
+++      if (buf == p->bufLim)
+++        RangeEnc_FlushStream(p);
+++      temp = 0xFF;
+++    }
+++    while (--p->cacheSize != 0);
+++    p->cache = (Byte)((UInt32)p->low >> 24);
+++  }
+++  p->cacheSize++;
+++  p->low = (UInt32)p->low << 8;
+++}
+++
+++static void RangeEnc_FlushData(CRangeEnc *p)
+++{
+++  int i;
+++  for (i = 0; i < 5; i++)
+++    RangeEnc_ShiftLow(p);
+++}
+++
+++static void RangeEnc_EncodeDirectBits(CRangeEnc *p, UInt32 value, int numBits)
+++{
+++  do
+++  {
+++    p->range >>= 1;
+++    p->low += p->range & (0 - ((value >> --numBits) & 1));
+++    if (p->range < kTopValue)
+++    {
+++      p->range <<= 8;
+++      RangeEnc_ShiftLow(p);
+++    }
+++  }
+++  while (numBits != 0);
+++}
+++
+++static void RangeEnc_EncodeBit(CRangeEnc *p, CLzmaProb *prob, UInt32 symbol)
+++{
+++  UInt32 ttt = *prob;
+++  UInt32 newBound = (p->range >> kNumBitModelTotalBits) * ttt;
+++  if (symbol == 0)
+++  {
+++    p->range = newBound;
+++    ttt += (kBitModelTotal - ttt) >> kNumMoveBits;
+++  }
+++  else
+++  {
+++    p->low += newBound;
+++    p->range -= newBound;
+++    ttt -= ttt >> kNumMoveBits;
+++  }
+++  *prob = (CLzmaProb)ttt;
+++  if (p->range < kTopValue)
+++  {
+++    p->range <<= 8;
+++    RangeEnc_ShiftLow(p);
+++  }
+++}
+++
+++static void LitEnc_Encode(CRangeEnc *p, CLzmaProb *probs, UInt32 symbol)
+++{
+++  symbol |= 0x100;
+++  do
+++  {
+++    RangeEnc_EncodeBit(p, probs + (symbol >> 8), (symbol >> 7) & 1);
+++    symbol <<= 1;
+++  }
+++  while (symbol < 0x10000);
+++}
+++
+++static void LitEnc_EncodeMatched(CRangeEnc *p, CLzmaProb *probs, UInt32 symbol, UInt32 matchByte)
+++{
+++  UInt32 offs = 0x100;
+++  symbol |= 0x100;
+++  do
+++  {
+++    matchByte <<= 1;
+++    RangeEnc_EncodeBit(p, probs + (offs + (matchByte & offs) + (symbol >> 8)), (symbol >> 7) & 1);
+++    symbol <<= 1;
+++    offs &= ~(matchByte ^ symbol);
+++  }
+++  while (symbol < 0x10000);
+++}
+++
+++void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
+++{
+++  UInt32 i;
+++  for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits))
+++  {
+++    const int kCyclesBits = kNumBitPriceShiftBits;
+++    UInt32 w = i;
+++    UInt32 bitCount = 0;
+++    int j;
+++    for (j = 0; j < kCyclesBits; j++)
+++    {
+++      w = w * w;
+++      bitCount <<= 1;
+++      while (w >= ((UInt32)1 << 16))
+++      {
+++        w >>= 1;
+++        bitCount++;
+++      }
+++    }
+++    ProbPrices[i >> kNumMoveReducingBits] = ((kNumBitModelTotalBits << kCyclesBits) - 15 - bitCount);
+++  }
+++}
+++
+++
+++#define GET_PRICE(prob, symbol) \
+++  p->ProbPrices[((prob) ^ (((-(int)(symbol))) & (kBitModelTotal - 1))) >> kNumMoveReducingBits];
+++
+++#define GET_PRICEa(prob, symbol) \
+++  ProbPrices[((prob) ^ ((-((int)(symbol))) & (kBitModelTotal - 1))) >> kNumMoveReducingBits];
+++
+++#define GET_PRICE_0(prob) p->ProbPrices[(prob) >> kNumMoveReducingBits]
+++#define GET_PRICE_1(prob) p->ProbPrices[((prob) ^ (kBitModelTotal - 1)) >> kNumMoveReducingBits]
+++
+++#define GET_PRICE_0a(prob) ProbPrices[(prob) >> kNumMoveReducingBits]
+++#define GET_PRICE_1a(prob) ProbPrices[((prob) ^ (kBitModelTotal - 1)) >> kNumMoveReducingBits]
+++
+++static UInt32 LitEnc_GetPrice(const CLzmaProb *probs, UInt32 symbol, UInt32 *ProbPrices)
+++{
+++  UInt32 price = 0;
+++  symbol |= 0x100;
+++  do
+++  {
+++    price += GET_PRICEa(probs[symbol >> 8], (symbol >> 7) & 1);
+++    symbol <<= 1;
+++  }
+++  while (symbol < 0x10000);
+++  return price;
+++}
+++
+++static UInt32 LitEnc_GetPriceMatched(const CLzmaProb *probs, UInt32 symbol, UInt32 matchByte, UInt32 *ProbPrices)
+++{
+++  UInt32 price = 0;
+++  UInt32 offs = 0x100;
+++  symbol |= 0x100;
+++  do
+++  {
+++    matchByte <<= 1;
+++    price += GET_PRICEa(probs[offs + (matchByte & offs) + (symbol >> 8)], (symbol >> 7) & 1);
+++    symbol <<= 1;
+++    offs &= ~(matchByte ^ symbol);
+++  }
+++  while (symbol < 0x10000);
+++  return price;
+++}
+++
+++
+++static void RcTree_Encode(CRangeEnc *rc, CLzmaProb *probs, int numBitLevels, UInt32 symbol)
+++{
+++  UInt32 m = 1;
+++  int i;
+++  for (i = numBitLevels; i != 0;)
+++  {
+++    UInt32 bit;
+++    i--;
+++    bit = (symbol >> i) & 1;
+++    RangeEnc_EncodeBit(rc, probs + m, bit);
+++    m = (m << 1) | bit;
+++  }
+++}
+++
+++static void RcTree_ReverseEncode(CRangeEnc *rc, CLzmaProb *probs, int numBitLevels, UInt32 symbol)
+++{
+++  UInt32 m = 1;
+++  int i;
+++  for (i = 0; i < numBitLevels; i++)
+++  {
+++    UInt32 bit = symbol & 1;
+++    RangeEnc_EncodeBit(rc, probs + m, bit);
+++    m = (m << 1) | bit;
+++    symbol >>= 1;
+++  }
+++}
+++
+++static UInt32 RcTree_GetPrice(const CLzmaProb *probs, int numBitLevels, UInt32 symbol, UInt32 *ProbPrices)
+++{
+++  UInt32 price = 0;
+++  symbol |= (1 << numBitLevels);
+++  while (symbol != 1)
+++  {
+++    price += GET_PRICEa(probs[symbol >> 1], symbol & 1);
+++    symbol >>= 1;
+++  }
+++  return price;
+++}
+++
+++static UInt32 RcTree_ReverseGetPrice(const CLzmaProb *probs, int numBitLevels, UInt32 symbol, UInt32 *ProbPrices)
+++{
+++  UInt32 price = 0;
+++  UInt32 m = 1;
+++  int i;
+++  for (i = numBitLevels; i != 0; i--)
+++  {
+++    UInt32 bit = symbol & 1;
+++    symbol >>= 1;
+++    price += GET_PRICEa(probs[m], bit);
+++    m = (m << 1) | bit;
+++  }
+++  return price;
+++}
+++
+++
+++static void LenEnc_Init(CLenEnc *p)
+++{
+++  unsigned i;
+++  p->choice = p->choice2 = kProbInitValue;
+++  for (i = 0; i < (LZMA_NUM_PB_STATES_MAX << kLenNumLowBits); i++)
+++    p->low[i] = kProbInitValue;
+++  for (i = 0; i < (LZMA_NUM_PB_STATES_MAX << kLenNumMidBits); i++)
+++    p->mid[i] = kProbInitValue;
+++  for (i = 0; i < kLenNumHighSymbols; i++)
+++    p->high[i] = kProbInitValue;
+++}
+++
+++static void LenEnc_Encode(CLenEnc *p, CRangeEnc *rc, UInt32 symbol, UInt32 posState)
+++{
+++  if (symbol < kLenNumLowSymbols)
+++  {
+++    RangeEnc_EncodeBit(rc, &p->choice, 0);
+++    RcTree_Encode(rc, p->low + (posState << kLenNumLowBits), kLenNumLowBits, symbol);
+++  }
+++  else
+++  {
+++    RangeEnc_EncodeBit(rc, &p->choice, 1);
+++    if (symbol < kLenNumLowSymbols + kLenNumMidSymbols)
+++    {
+++      RangeEnc_EncodeBit(rc, &p->choice2, 0);
+++      RcTree_Encode(rc, p->mid + (posState << kLenNumMidBits), kLenNumMidBits, symbol - kLenNumLowSymbols);
+++    }
+++    else
+++    {
+++      RangeEnc_EncodeBit(rc, &p->choice2, 1);
+++      RcTree_Encode(rc, p->high, kLenNumHighBits, symbol - kLenNumLowSymbols - kLenNumMidSymbols);
+++    }
+++  }
+++}
+++
+++static void LenEnc_SetPrices(CLenEnc *p, UInt32 posState, UInt32 numSymbols, UInt32 *prices, UInt32 *ProbPrices)
+++{
+++  UInt32 a0 = GET_PRICE_0a(p->choice);
+++  UInt32 a1 = GET_PRICE_1a(p->choice);
+++  UInt32 b0 = a1 + GET_PRICE_0a(p->choice2);
+++  UInt32 b1 = a1 + GET_PRICE_1a(p->choice2);
+++  UInt32 i = 0;
+++  for (i = 0; i < kLenNumLowSymbols; i++)
+++  {
+++    if (i >= numSymbols)
+++      return;
+++    prices[i] = a0 + RcTree_GetPrice(p->low + (posState << kLenNumLowBits), kLenNumLowBits, i, ProbPrices);
+++  }
+++  for (; i < kLenNumLowSymbols + kLenNumMidSymbols; i++)
+++  {
+++    if (i >= numSymbols)
+++      return;
+++    prices[i] = b0 + RcTree_GetPrice(p->mid + (posState << kLenNumMidBits), kLenNumMidBits, i - kLenNumLowSymbols, ProbPrices);
+++  }
+++  for (; i < numSymbols; i++)
+++    prices[i] = b1 + RcTree_GetPrice(p->high, kLenNumHighBits, i - kLenNumLowSymbols - kLenNumMidSymbols, ProbPrices);
+++}
+++
+++static void MY_FAST_CALL LenPriceEnc_UpdateTable(CLenPriceEnc *p, UInt32 posState, UInt32 *ProbPrices)
+++{
+++  LenEnc_SetPrices(&p->p, posState, p->tableSize, p->prices[posState], ProbPrices);
+++  p->counters[posState] = p->tableSize;
+++}
+++
+++static void LenPriceEnc_UpdateTables(CLenPriceEnc *p, UInt32 numPosStates, UInt32 *ProbPrices)
+++{
+++  UInt32 posState;
+++  for (posState = 0; posState < numPosStates; posState++)
+++    LenPriceEnc_UpdateTable(p, posState, ProbPrices);
+++}
+++
+++static void LenEnc_Encode2(CLenPriceEnc *p, CRangeEnc *rc, UInt32 symbol, UInt32 posState, Bool updatePrice, UInt32 *ProbPrices)
+++{
+++  LenEnc_Encode(&p->p, rc, symbol, posState);
+++  if (updatePrice)
+++    if (--p->counters[posState] == 0)
+++      LenPriceEnc_UpdateTable(p, posState, ProbPrices);
+++}
+++
+++
+++
+++
+++static void MovePos(CLzmaEnc *p, UInt32 num)
+++{
+++  #ifdef SHOW_STAT
+++  ttt += num;
+++  printf("\n MovePos %d", num);
+++  #endif
+++  if (num != 0)
+++  {
+++    p->additionalOffset += num;
+++    p->matchFinder.Skip(p->matchFinderObj, num);
+++  }
+++}
+++
+++static UInt32 ReadMatchDistances(CLzmaEnc *p, UInt32 *numDistancePairsRes)
+++{
+++  UInt32 lenRes = 0, numPairs;
+++  p->numAvail = p->matchFinder.GetNumAvailableBytes(p->matchFinderObj);
+++  numPairs = p->matchFinder.GetMatches(p->matchFinderObj, p->matches);
+++  #ifdef SHOW_STAT
+++  printf("\n i = %d numPairs = %d    ", ttt, numPairs / 2);
+++  ttt++;
+++  {
+++    UInt32 i;
+++    for (i = 0; i < numPairs; i += 2)
+++      printf("%2d %6d   | ", p->matches[i], p->matches[i + 1]);
+++  }
+++  #endif
+++  if (numPairs > 0)
+++  {
+++    lenRes = p->matches[numPairs - 2];
+++    if (lenRes == p->numFastBytes)
+++    {
+++      const Byte *pby = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
+++      UInt32 distance = p->matches[numPairs - 1] + 1;
+++      UInt32 numAvail = p->numAvail;
+++      if (numAvail > LZMA_MATCH_LEN_MAX)
+++        numAvail = LZMA_MATCH_LEN_MAX;
+++      {
+++        const Byte *pby2 = pby - distance;
+++        for (; lenRes < numAvail && pby[lenRes] == pby2[lenRes]; lenRes++);
+++      }
+++    }
+++  }
+++  p->additionalOffset++;
+++  *numDistancePairsRes = numPairs;
+++  return lenRes;
+++}
+++
+++
+++#define MakeAsChar(p) (p)->backPrev = (UInt32)(-1); (p)->prev1IsChar = False;
+++#define MakeAsShortRep(p) (p)->backPrev = 0; (p)->prev1IsChar = False;
+++#define IsShortRep(p) ((p)->backPrev == 0)
+++
+++static UInt32 GetRepLen1Price(CLzmaEnc *p, UInt32 state, UInt32 posState)
+++{
+++  return
+++    GET_PRICE_0(p->isRepG0[state]) +
+++    GET_PRICE_0(p->isRep0Long[state][posState]);
+++}
+++
+++static UInt32 GetPureRepPrice(CLzmaEnc *p, UInt32 repIndex, UInt32 state, UInt32 posState)
+++{
+++  UInt32 price;
+++  if (repIndex == 0)
+++  {
+++    price = GET_PRICE_0(p->isRepG0[state]);
+++    price += GET_PRICE_1(p->isRep0Long[state][posState]);
+++  }
+++  else
+++  {
+++    price = GET_PRICE_1(p->isRepG0[state]);
+++    if (repIndex == 1)
+++      price += GET_PRICE_0(p->isRepG1[state]);
+++    else
+++    {
+++      price += GET_PRICE_1(p->isRepG1[state]);
+++      price += GET_PRICE(p->isRepG2[state], repIndex - 2);
+++    }
+++  }
+++  return price;
+++}
+++
+++static UInt32 GetRepPrice(CLzmaEnc *p, UInt32 repIndex, UInt32 len, UInt32 state, UInt32 posState)
+++{
+++  return p->repLenEnc.prices[posState][len - LZMA_MATCH_LEN_MIN] +
+++    GetPureRepPrice(p, repIndex, state, posState);
+++}
+++
+++static UInt32 Backward(CLzmaEnc *p, UInt32 *backRes, UInt32 cur)
+++{
+++  UInt32 posMem = p->opt[cur].posPrev;
+++  UInt32 backMem = p->opt[cur].backPrev;
+++  p->optimumEndIndex = cur;
+++  do
+++  {
+++    if (p->opt[cur].prev1IsChar)
+++    {
+++      MakeAsChar(&p->opt[posMem])
+++      p->opt[posMem].posPrev = posMem - 1;
+++      if (p->opt[cur].prev2)
+++      {
+++        p->opt[posMem - 1].prev1IsChar = False;
+++        p->opt[posMem - 1].posPrev = p->opt[cur].posPrev2;
+++        p->opt[posMem - 1].backPrev = p->opt[cur].backPrev2;
+++      }
+++    }
+++    {
+++      UInt32 posPrev = posMem;
+++      UInt32 backCur = backMem;
+++
+++      backMem = p->opt[posPrev].backPrev;
+++      posMem = p->opt[posPrev].posPrev;
+++
+++      p->opt[posPrev].backPrev = backCur;
+++      p->opt[posPrev].posPrev = cur;
+++      cur = posPrev;
+++    }
+++  }
+++  while (cur != 0);
+++  *backRes = p->opt[0].backPrev;
+++  p->optimumCurrentIndex  = p->opt[0].posPrev;
+++  return p->optimumCurrentIndex;
+++}
+++
+++#define LIT_PROBS(pos, prevByte) (p->litProbs + ((((pos) & p->lpMask) << p->lc) + ((prevByte) >> (8 - p->lc))) * 0x300)
+++
+++static UInt32 GetOptimum(CLzmaEnc *p, UInt32 position, UInt32 *backRes)
+++{
+++  UInt32 numAvail, mainLen, numPairs, repMaxIndex, i, posState, lenEnd, len, cur;
+++  UInt32 matchPrice, repMatchPrice, normalMatchPrice;
+++  UInt32 reps[LZMA_NUM_REPS], repLens[LZMA_NUM_REPS];
+++  UInt32 *matches;
+++  const Byte *data;
+++  Byte curByte, matchByte;
+++  if (p->optimumEndIndex != p->optimumCurrentIndex)
+++  {
+++    const COptimal *opt = &p->opt[p->optimumCurrentIndex];
+++    UInt32 lenRes = opt->posPrev - p->optimumCurrentIndex;
+++    *backRes = opt->backPrev;
+++    p->optimumCurrentIndex = opt->posPrev;
+++    return lenRes;
+++  }
+++  p->optimumCurrentIndex = p->optimumEndIndex = 0;
+++
+++  if (p->additionalOffset == 0)
+++    mainLen = ReadMatchDistances(p, &numPairs);
+++  else
+++  {
+++    mainLen = p->longestMatchLength;
+++    numPairs = p->numPairs;
+++  }
+++
+++  numAvail = p->numAvail;
+++  if (numAvail < 2)
+++  {
+++    *backRes = (UInt32)(-1);
+++    return 1;
+++  }
+++  if (numAvail > LZMA_MATCH_LEN_MAX)
+++    numAvail = LZMA_MATCH_LEN_MAX;
+++
+++  data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
+++  repMaxIndex = 0;
+++  for (i = 0; i < LZMA_NUM_REPS; i++)
+++  {
+++    UInt32 lenTest;
+++    const Byte *data2;
+++    reps[i] = p->reps[i];
+++    data2 = data - (reps[i] + 1);
+++    if (data[0] != data2[0] || data[1] != data2[1])
+++    {
+++      repLens[i] = 0;
+++      continue;
+++    }
+++    for (lenTest = 2; lenTest < numAvail && data[lenTest] == data2[lenTest]; lenTest++);
+++    repLens[i] = lenTest;
+++    if (lenTest > repLens[repMaxIndex])
+++      repMaxIndex = i;
+++  }
+++  if (repLens[repMaxIndex] >= p->numFastBytes)
+++  {
+++    UInt32 lenRes;
+++    *backRes = repMaxIndex;
+++    lenRes = repLens[repMaxIndex];
+++    MovePos(p, lenRes - 1);
+++    return lenRes;
+++  }
+++
+++  matches = p->matches;
+++  if (mainLen >= p->numFastBytes)
+++  {
+++    *backRes = matches[numPairs - 1] + LZMA_NUM_REPS;
+++    MovePos(p, mainLen - 1);
+++    return mainLen;
+++  }
+++  curByte = *data;
+++  matchByte = *(data - (reps[0] + 1));
+++
+++  if (mainLen < 2 && curByte != matchByte && repLens[repMaxIndex] < 2)
+++  {
+++    *backRes = (UInt32)-1;
+++    return 1;
+++  }
+++
+++  p->opt[0].state = (CState)p->state;
+++
+++  posState = (position & p->pbMask);
+++
+++  {
+++    const CLzmaProb *probs = LIT_PROBS(position, *(data - 1));
+++    p->opt[1].price = GET_PRICE_0(p->isMatch[p->state][posState]) +
+++        (!IsCharState(p->state) ?
+++          LitEnc_GetPriceMatched(probs, curByte, matchByte, p->ProbPrices) :
+++          LitEnc_GetPrice(probs, curByte, p->ProbPrices));
+++  }
+++
+++  MakeAsChar(&p->opt[1]);
+++
+++  matchPrice = GET_PRICE_1(p->isMatch[p->state][posState]);
+++  repMatchPrice = matchPrice + GET_PRICE_1(p->isRep[p->state]);
+++
+++  if (matchByte == curByte)
+++  {
+++    UInt32 shortRepPrice = repMatchPrice + GetRepLen1Price(p, p->state, posState);
+++    if (shortRepPrice < p->opt[1].price)
+++    {
+++      p->opt[1].price = shortRepPrice;
+++      MakeAsShortRep(&p->opt[1]);
+++    }
+++  }
+++  lenEnd = ((mainLen >= repLens[repMaxIndex]) ? mainLen : repLens[repMaxIndex]);
+++
+++  if (lenEnd < 2)
+++  {
+++    *backRes = p->opt[1].backPrev;
+++    return 1;
+++  }
+++
+++  p->opt[1].posPrev = 0;
+++  for (i = 0; i < LZMA_NUM_REPS; i++)
+++    p->opt[0].backs[i] = reps[i];
+++
+++  len = lenEnd;
+++  do
+++    p->opt[len--].price = kInfinityPrice;
+++  while (len >= 2);
+++
+++  for (i = 0; i < LZMA_NUM_REPS; i++)
+++  {
+++    UInt32 repLen = repLens[i];
+++    UInt32 price;
+++    if (repLen < 2)
+++      continue;
+++    price = repMatchPrice + GetPureRepPrice(p, i, p->state, posState);
+++    do
+++    {
+++      UInt32 curAndLenPrice = price + p->repLenEnc.prices[posState][repLen - 2];
+++      COptimal *opt = &p->opt[repLen];
+++      if (curAndLenPrice < opt->price)
+++      {
+++        opt->price = curAndLenPrice;
+++        opt->posPrev = 0;
+++        opt->backPrev = i;
+++        opt->prev1IsChar = False;
+++      }
+++    }
+++    while (--repLen >= 2);
+++  }
+++
+++  normalMatchPrice = matchPrice + GET_PRICE_0(p->isRep[p->state]);
+++
+++  len = ((repLens[0] >= 2) ? repLens[0] + 1 : 2);
+++  if (len <= mainLen)
+++  {
+++    UInt32 offs = 0;
+++    while (len > matches[offs])
+++      offs += 2;
+++    for (; ; len++)
+++    {
+++      COptimal *opt;
+++      UInt32 distance = matches[offs + 1];
+++
+++      UInt32 curAndLenPrice = normalMatchPrice + p->lenEnc.prices[posState][len - LZMA_MATCH_LEN_MIN];
+++      UInt32 lenToPosState = GetLenToPosState(len);
+++      if (distance < kNumFullDistances)
+++        curAndLenPrice += p->distancesPrices[lenToPosState][distance];
+++      else
+++      {
+++        UInt32 slot;
+++        GetPosSlot2(distance, slot);
+++        curAndLenPrice += p->alignPrices[distance & kAlignMask] + p->posSlotPrices[lenToPosState][slot];
+++      }
+++      opt = &p->opt[len];
+++      if (curAndLenPrice < opt->price)
+++      {
+++        opt->price = curAndLenPrice;
+++        opt->posPrev = 0;
+++        opt->backPrev = distance + LZMA_NUM_REPS;
+++        opt->prev1IsChar = False;
+++      }
+++      if (len == matches[offs])
+++      {
+++        offs += 2;
+++        if (offs == numPairs)
+++          break;
+++      }
+++    }
+++  }
+++
+++  cur = 0;
+++
+++    #ifdef SHOW_STAT2
+++    if (position >= 0)
+++    {
+++      unsigned i;
+++      printf("\n pos = %4X", position);
+++      for (i = cur; i <= lenEnd; i++)
+++      printf("\nprice[%4X] = %d", position - cur + i, p->opt[i].price);
+++    }
+++    #endif
+++
+++  for (;;)
+++  {
+++    UInt32 numAvailFull, newLen, numPairs, posPrev, state, posState, startLen;
+++    UInt32 curPrice, curAnd1Price, matchPrice, repMatchPrice;
+++    Bool nextIsChar;
+++    Byte curByte, matchByte;
+++    const Byte *data;
+++    COptimal *curOpt;
+++    COptimal *nextOpt;
+++
+++    cur++;
+++    if (cur == lenEnd)
+++      return Backward(p, backRes, cur);
+++
+++    newLen = ReadMatchDistances(p, &numPairs);
+++    if (newLen >= p->numFastBytes)
+++    {
+++      p->numPairs = numPairs;
+++      p->longestMatchLength = newLen;
+++      return Backward(p, backRes, cur);
+++    }
+++    position++;
+++    curOpt = &p->opt[cur];
+++    posPrev = curOpt->posPrev;
+++    if (curOpt->prev1IsChar)
+++    {
+++      posPrev--;
+++      if (curOpt->prev2)
+++      {
+++        state = p->opt[curOpt->posPrev2].state;
+++        if (curOpt->backPrev2 < LZMA_NUM_REPS)
+++          state = kRepNextStates[state];
+++        else
+++          state = kMatchNextStates[state];
+++      }
+++      else
+++        state = p->opt[posPrev].state;
+++      state = kLiteralNextStates[state];
+++    }
+++    else
+++      state = p->opt[posPrev].state;
+++    if (posPrev == cur - 1)
+++    {
+++      if (IsShortRep(curOpt))
+++        state = kShortRepNextStates[state];
+++      else
+++        state = kLiteralNextStates[state];
+++    }
+++    else
+++    {
+++      UInt32 pos;
+++      const COptimal *prevOpt;
+++      if (curOpt->prev1IsChar && curOpt->prev2)
+++      {
+++        posPrev = curOpt->posPrev2;
+++        pos = curOpt->backPrev2;
+++        state = kRepNextStates[state];
+++      }
+++      else
+++      {
+++        pos = curOpt->backPrev;
+++        if (pos < LZMA_NUM_REPS)
+++          state = kRepNextStates[state];
+++        else
+++          state = kMatchNextStates[state];
+++      }
+++      prevOpt = &p->opt[posPrev];
+++      if (pos < LZMA_NUM_REPS)
+++      {
+++        UInt32 i;
+++        reps[0] = prevOpt->backs[pos];
+++        for (i = 1; i <= pos; i++)
+++          reps[i] = prevOpt->backs[i - 1];
+++        for (; i < LZMA_NUM_REPS; i++)
+++          reps[i] = prevOpt->backs[i];
+++      }
+++      else
+++      {
+++        UInt32 i;
+++        reps[0] = (pos - LZMA_NUM_REPS);
+++        for (i = 1; i < LZMA_NUM_REPS; i++)
+++          reps[i] = prevOpt->backs[i - 1];
+++      }
+++    }
+++    curOpt->state = (CState)state;
+++
+++    curOpt->backs[0] = reps[0];
+++    curOpt->backs[1] = reps[1];
+++    curOpt->backs[2] = reps[2];
+++    curOpt->backs[3] = reps[3];
+++
+++    curPrice = curOpt->price;
+++    nextIsChar = False;
+++    data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
+++    curByte = *data;
+++    matchByte = *(data - (reps[0] + 1));
+++
+++    posState = (position & p->pbMask);
+++
+++    curAnd1Price = curPrice + GET_PRICE_0(p->isMatch[state][posState]);
+++    {
+++      const CLzmaProb *probs = LIT_PROBS(position, *(data - 1));
+++      curAnd1Price +=
+++        (!IsCharState(state) ?
+++          LitEnc_GetPriceMatched(probs, curByte, matchByte, p->ProbPrices) :
+++          LitEnc_GetPrice(probs, curByte, p->ProbPrices));
+++    }
+++
+++    nextOpt = &p->opt[cur + 1];
+++
+++    if (curAnd1Price < nextOpt->price)
+++    {
+++      nextOpt->price = curAnd1Price;
+++      nextOpt->posPrev = cur;
+++      MakeAsChar(nextOpt);
+++      nextIsChar = True;
+++    }
+++
+++    matchPrice = curPrice + GET_PRICE_1(p->isMatch[state][posState]);
+++    repMatchPrice = matchPrice + GET_PRICE_1(p->isRep[state]);
+++
+++    if (matchByte == curByte && !(nextOpt->posPrev < cur && nextOpt->backPrev == 0))
+++    {
+++      UInt32 shortRepPrice = repMatchPrice + GetRepLen1Price(p, state, posState);
+++      if (shortRepPrice <= nextOpt->price)
+++      {
+++        nextOpt->price = shortRepPrice;
+++        nextOpt->posPrev = cur;
+++        MakeAsShortRep(nextOpt);
+++        nextIsChar = True;
+++      }
+++    }
+++    numAvailFull = p->numAvail;
+++    {
+++      UInt32 temp = kNumOpts - 1 - cur;
+++      if (temp < numAvailFull)
+++        numAvailFull = temp;
+++    }
+++
+++    if (numAvailFull < 2)
+++      continue;
+++    numAvail = (numAvailFull <= p->numFastBytes ? numAvailFull : p->numFastBytes);
+++
+++    if (!nextIsChar && matchByte != curByte) /* speed optimization */
+++    {
+++      /* try Literal + rep0 */
+++      UInt32 temp;
+++      UInt32 lenTest2;
+++      const Byte *data2 = data - (reps[0] + 1);
+++      UInt32 limit = p->numFastBytes + 1;
+++      if (limit > numAvailFull)
+++        limit = numAvailFull;
+++
+++      for (temp = 1; temp < limit && data[temp] == data2[temp]; temp++);
+++      lenTest2 = temp - 1;
+++      if (lenTest2 >= 2)
+++      {
+++        UInt32 state2 = kLiteralNextStates[state];
+++        UInt32 posStateNext = (position + 1) & p->pbMask;
+++        UInt32 nextRepMatchPrice = curAnd1Price +
+++            GET_PRICE_1(p->isMatch[state2][posStateNext]) +
+++            GET_PRICE_1(p->isRep[state2]);
+++        /* for (; lenTest2 >= 2; lenTest2--) */
+++        {
+++          UInt32 curAndLenPrice;
+++          COptimal *opt;
+++          UInt32 offset = cur + 1 + lenTest2;
+++          while (lenEnd < offset)
+++            p->opt[++lenEnd].price = kInfinityPrice;
+++          curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext);
+++          opt = &p->opt[offset];
+++          if (curAndLenPrice < opt->price)
+++          {
+++            opt->price = curAndLenPrice;
+++            opt->posPrev = cur + 1;
+++            opt->backPrev = 0;
+++            opt->prev1IsChar = True;
+++            opt->prev2 = False;
+++          }
+++        }
+++      }
+++    }
+++
+++    startLen = 2; /* speed optimization */
+++    {
+++    UInt32 repIndex;
+++    for (repIndex = 0; repIndex < LZMA_NUM_REPS; repIndex++)
+++    {
+++      UInt32 lenTest;
+++      UInt32 lenTestTemp;
+++      UInt32 price;
+++      const Byte *data2 = data - (reps[repIndex] + 1);
+++      if (data[0] != data2[0] || data[1] != data2[1])
+++        continue;
+++      for (lenTest = 2; lenTest < numAvail && data[lenTest] == data2[lenTest]; lenTest++);
+++      while (lenEnd < cur + lenTest)
+++        p->opt[++lenEnd].price = kInfinityPrice;
+++      lenTestTemp = lenTest;
+++      price = repMatchPrice + GetPureRepPrice(p, repIndex, state, posState);
+++      do
+++      {
+++        UInt32 curAndLenPrice = price + p->repLenEnc.prices[posState][lenTest - 2];
+++        COptimal *opt = &p->opt[cur + lenTest];
+++        if (curAndLenPrice < opt->price)
+++        {
+++          opt->price = curAndLenPrice;
+++          opt->posPrev = cur;
+++          opt->backPrev = repIndex;
+++          opt->prev1IsChar = False;
+++        }
+++      }
+++      while (--lenTest >= 2);
+++      lenTest = lenTestTemp;
+++
+++      if (repIndex == 0)
+++        startLen = lenTest + 1;
+++
+++      /* if (_maxMode) */
+++        {
+++          UInt32 lenTest2 = lenTest + 1;
+++          UInt32 limit = lenTest2 + p->numFastBytes;
+++          UInt32 nextRepMatchPrice;
+++          if (limit > numAvailFull)
+++            limit = numAvailFull;
+++          for (; lenTest2 < limit && data[lenTest2] == data2[lenTest2]; lenTest2++);
+++          lenTest2 -= lenTest + 1;
+++          if (lenTest2 >= 2)
+++          {
+++            UInt32 state2 = kRepNextStates[state];
+++            UInt32 posStateNext = (position + lenTest) & p->pbMask;
+++            UInt32 curAndLenCharPrice =
+++                price + p->repLenEnc.prices[posState][lenTest - 2] +
+++                GET_PRICE_0(p->isMatch[state2][posStateNext]) +
+++                LitEnc_GetPriceMatched(LIT_PROBS(position + lenTest, data[lenTest - 1]),
+++                    data[lenTest], data2[lenTest], p->ProbPrices);
+++            state2 = kLiteralNextStates[state2];
+++            posStateNext = (position + lenTest + 1) & p->pbMask;
+++            nextRepMatchPrice = curAndLenCharPrice +
+++                GET_PRICE_1(p->isMatch[state2][posStateNext]) +
+++                GET_PRICE_1(p->isRep[state2]);
+++
+++            /* for (; lenTest2 >= 2; lenTest2--) */
+++            {
+++              UInt32 curAndLenPrice;
+++              COptimal *opt;
+++              UInt32 offset = cur + lenTest + 1 + lenTest2;
+++              while (lenEnd < offset)
+++                p->opt[++lenEnd].price = kInfinityPrice;
+++              curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext);
+++              opt = &p->opt[offset];
+++              if (curAndLenPrice < opt->price)
+++              {
+++                opt->price = curAndLenPrice;
+++                opt->posPrev = cur + lenTest + 1;
+++                opt->backPrev = 0;
+++                opt->prev1IsChar = True;
+++                opt->prev2 = True;
+++                opt->posPrev2 = cur;
+++                opt->backPrev2 = repIndex;
+++              }
+++            }
+++          }
+++        }
+++    }
+++    }
+++    /* for (UInt32 lenTest = 2; lenTest <= newLen; lenTest++) */
+++    if (newLen > numAvail)
+++    {
+++      newLen = numAvail;
+++      for (numPairs = 0; newLen > matches[numPairs]; numPairs += 2);
+++      matches[numPairs] = newLen;
+++      numPairs += 2;
+++    }
+++    if (newLen >= startLen)
+++    {
+++      UInt32 normalMatchPrice = matchPrice + GET_PRICE_0(p->isRep[state]);
+++      UInt32 offs, curBack, posSlot;
+++      UInt32 lenTest;
+++      while (lenEnd < cur + newLen)
+++        p->opt[++lenEnd].price = kInfinityPrice;
+++
+++      offs = 0;
+++      while (startLen > matches[offs])
+++        offs += 2;
+++      curBack = matches[offs + 1];
+++      GetPosSlot2(curBack, posSlot);
+++      for (lenTest = /*2*/ startLen; ; lenTest++)
+++      {
+++        UInt32 curAndLenPrice = normalMatchPrice + p->lenEnc.prices[posState][lenTest - LZMA_MATCH_LEN_MIN];
+++        UInt32 lenToPosState = GetLenToPosState(lenTest);
+++        COptimal *opt;
+++        if (curBack < kNumFullDistances)
+++          curAndLenPrice += p->distancesPrices[lenToPosState][curBack];
+++        else
+++          curAndLenPrice += p->posSlotPrices[lenToPosState][posSlot] + p->alignPrices[curBack & kAlignMask];
+++
+++        opt = &p->opt[cur + lenTest];
+++        if (curAndLenPrice < opt->price)
+++        {
+++          opt->price = curAndLenPrice;
+++          opt->posPrev = cur;
+++          opt->backPrev = curBack + LZMA_NUM_REPS;
+++          opt->prev1IsChar = False;
+++        }
+++
+++        if (/*_maxMode && */lenTest == matches[offs])
+++        {
+++          /* Try Match + Literal + Rep0 */
+++          const Byte *data2 = data - (curBack + 1);
+++          UInt32 lenTest2 = lenTest + 1;
+++          UInt32 limit = lenTest2 + p->numFastBytes;
+++          UInt32 nextRepMatchPrice;
+++          if (limit > numAvailFull)
+++            limit = numAvailFull;
+++          for (; lenTest2 < limit && data[lenTest2] == data2[lenTest2]; lenTest2++);
+++          lenTest2 -= lenTest + 1;
+++          if (lenTest2 >= 2)
+++          {
+++            UInt32 state2 = kMatchNextStates[state];
+++            UInt32 posStateNext = (position + lenTest) & p->pbMask;
+++            UInt32 curAndLenCharPrice = curAndLenPrice +
+++                GET_PRICE_0(p->isMatch[state2][posStateNext]) +
+++                LitEnc_GetPriceMatched(LIT_PROBS(position + lenTest, data[lenTest - 1]),
+++                    data[lenTest], data2[lenTest], p->ProbPrices);
+++            state2 = kLiteralNextStates[state2];
+++            posStateNext = (posStateNext + 1) & p->pbMask;
+++            nextRepMatchPrice = curAndLenCharPrice +
+++                GET_PRICE_1(p->isMatch[state2][posStateNext]) +
+++                GET_PRICE_1(p->isRep[state2]);
+++
+++            /* for (; lenTest2 >= 2; lenTest2--) */
+++            {
+++              UInt32 offset = cur + lenTest + 1 + lenTest2;
+++              UInt32 curAndLenPrice;
+++              COptimal *opt;
+++              while (lenEnd < offset)
+++                p->opt[++lenEnd].price = kInfinityPrice;
+++              curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext);
+++              opt = &p->opt[offset];
+++              if (curAndLenPrice < opt->price)
+++              {
+++                opt->price = curAndLenPrice;
+++                opt->posPrev = cur + lenTest + 1;
+++                opt->backPrev = 0;
+++                opt->prev1IsChar = True;
+++                opt->prev2 = True;
+++                opt->posPrev2 = cur;
+++                opt->backPrev2 = curBack + LZMA_NUM_REPS;
+++              }
+++            }
+++          }
+++          offs += 2;
+++          if (offs == numPairs)
+++            break;
+++          curBack = matches[offs + 1];
+++          if (curBack >= kNumFullDistances)
+++            GetPosSlot2(curBack, posSlot);
+++        }
+++      }
+++    }
+++  }
+++}
+++
+++#define ChangePair(smallDist, bigDist) (((bigDist) >> 7) > (smallDist))
+++
+++static UInt32 GetOptimumFast(CLzmaEnc *p, UInt32 *backRes)
+++{
+++  UInt32 numAvail, mainLen, mainDist, numPairs, repIndex, repLen, i;
+++  const Byte *data;
+++  const UInt32 *matches;
+++
+++  if (p->additionalOffset == 0)
+++    mainLen = ReadMatchDistances(p, &numPairs);
+++  else
+++  {
+++    mainLen = p->longestMatchLength;
+++    numPairs = p->numPairs;
+++  }
+++
+++  numAvail = p->numAvail;
+++  *backRes = (UInt32)-1;
+++  if (numAvail < 2)
+++    return 1;
+++  if (numAvail > LZMA_MATCH_LEN_MAX)
+++    numAvail = LZMA_MATCH_LEN_MAX;
+++  data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
+++
+++  repLen = repIndex = 0;
+++  for (i = 0; i < LZMA_NUM_REPS; i++)
+++  {
+++    UInt32 len;
+++    const Byte *data2 = data - (p->reps[i] + 1);
+++    if (data[0] != data2[0] || data[1] != data2[1])
+++      continue;
+++    for (len = 2; len < numAvail && data[len] == data2[len]; len++);
+++    if (len >= p->numFastBytes)
+++    {
+++      *backRes = i;
+++      MovePos(p, len - 1);
+++      return len;
+++    }
+++    if (len > repLen)
+++    {
+++      repIndex = i;
+++      repLen = len;
+++    }
+++  }
+++
+++  matches = p->matches;
+++  if (mainLen >= p->numFastBytes)
+++  {
+++    *backRes = matches[numPairs - 1] + LZMA_NUM_REPS;
+++    MovePos(p, mainLen - 1);
+++    return mainLen;
+++  }
+++
+++  mainDist = 0; /* for GCC */
+++  if (mainLen >= 2)
+++  {
+++    mainDist = matches[numPairs - 1];
+++    while (numPairs > 2 && mainLen == matches[numPairs - 4] + 1)
+++    {
+++      if (!ChangePair(matches[numPairs - 3], mainDist))
+++        break;
+++      numPairs -= 2;
+++      mainLen = matches[numPairs - 2];
+++      mainDist = matches[numPairs - 1];
+++    }
+++    if (mainLen == 2 && mainDist >= 0x80)
+++      mainLen = 1;
+++  }
+++
+++  if (repLen >= 2 && (
+++        (repLen + 1 >= mainLen) ||
+++        (repLen + 2 >= mainLen && mainDist >= (1 << 9)) ||
+++        (repLen + 3 >= mainLen && mainDist >= (1 << 15))))
+++  {
+++    *backRes = repIndex;
+++    MovePos(p, repLen - 1);
+++    return repLen;
+++  }
+++
+++  if (mainLen < 2 || numAvail <= 2)
+++    return 1;
+++
+++  p->longestMatchLength = ReadMatchDistances(p, &p->numPairs);
+++  if (p->longestMatchLength >= 2)
+++  {
+++    UInt32 newDistance = matches[p->numPairs - 1];
+++    if ((p->longestMatchLength >= mainLen && newDistance < mainDist) ||
+++        (p->longestMatchLength == mainLen + 1 && !ChangePair(mainDist, newDistance)) ||
+++        (p->longestMatchLength > mainLen + 1) ||
+++        (p->longestMatchLength + 1 >= mainLen && mainLen >= 3 && ChangePair(newDistance, mainDist)))
+++      return 1;
+++  }
+++
+++  data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
+++  for (i = 0; i < LZMA_NUM_REPS; i++)
+++  {
+++    UInt32 len, limit;
+++    const Byte *data2 = data - (p->reps[i] + 1);
+++    if (data[0] != data2[0] || data[1] != data2[1])
+++      continue;
+++    limit = mainLen - 1;
+++    for (len = 2; len < limit && data[len] == data2[len]; len++);
+++    if (len >= limit)
+++      return 1;
+++  }
+++  *backRes = mainDist + LZMA_NUM_REPS;
+++  MovePos(p, mainLen - 2);
+++  return mainLen;
+++}
+++
+++static void WriteEndMarker(CLzmaEnc *p, UInt32 posState)
+++{
+++  UInt32 len;
+++  RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 1);
+++  RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 0);
+++  p->state = kMatchNextStates[p->state];
+++  len = LZMA_MATCH_LEN_MIN;
+++  LenEnc_Encode2(&p->lenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices);
+++  RcTree_Encode(&p->rc, p->posSlotEncoder[GetLenToPosState(len)], kNumPosSlotBits, (1 << kNumPosSlotBits) - 1);
+++  RangeEnc_EncodeDirectBits(&p->rc, (((UInt32)1 << 30) - 1) >> kNumAlignBits, 30 - kNumAlignBits);
+++  RcTree_ReverseEncode(&p->rc, p->posAlignEncoder, kNumAlignBits, kAlignMask);
+++}
+++
+++static SRes CheckErrors(CLzmaEnc *p)
+++{
+++  if (p->result != SZ_OK)
+++    return p->result;
+++  if (p->rc.res != SZ_OK)
+++    p->result = SZ_ERROR_WRITE;
+++  if (p->matchFinderBase.result != SZ_OK)
+++    p->result = SZ_ERROR_READ;
+++  if (p->result != SZ_OK)
+++    p->finished = True;
+++  return p->result;
+++}
+++
+++static SRes Flush(CLzmaEnc *p, UInt32 nowPos)
+++{
+++  /* ReleaseMFStream(); */
+++  p->finished = True;
+++  if (p->writeEndMark)
+++    WriteEndMarker(p, nowPos & p->pbMask);
+++  RangeEnc_FlushData(&p->rc);
+++  RangeEnc_FlushStream(&p->rc);
+++  return CheckErrors(p);
+++}
+++
+++static void FillAlignPrices(CLzmaEnc *p)
+++{
+++  UInt32 i;
+++  for (i = 0; i < kAlignTableSize; i++)
+++    p->alignPrices[i] = RcTree_ReverseGetPrice(p->posAlignEncoder, kNumAlignBits, i, p->ProbPrices);
+++  p->alignPriceCount = 0;
+++}
+++
+++static void FillDistancesPrices(CLzmaEnc *p)
+++{
+++  UInt32 tempPrices[kNumFullDistances];
+++  UInt32 i, lenToPosState;
+++  for (i = kStartPosModelIndex; i < kNumFullDistances; i++)
+++  {
+++    UInt32 posSlot = GetPosSlot1(i);
+++    UInt32 footerBits = ((posSlot >> 1) - 1);
+++    UInt32 base = ((2 | (posSlot & 1)) << footerBits);
+++    tempPrices[i] = RcTree_ReverseGetPrice(p->posEncoders + base - posSlot - 1, footerBits, i - base, p->ProbPrices);
+++  }
+++
+++  for (lenToPosState = 0; lenToPosState < kNumLenToPosStates; lenToPosState++)
+++  {
+++    UInt32 posSlot;
+++    const CLzmaProb *encoder = p->posSlotEncoder[lenToPosState];
+++    UInt32 *posSlotPrices = p->posSlotPrices[lenToPosState];
+++    for (posSlot = 0; posSlot < p->distTableSize; posSlot++)
+++      posSlotPrices[posSlot] = RcTree_GetPrice(encoder, kNumPosSlotBits, posSlot, p->ProbPrices);
+++    for (posSlot = kEndPosModelIndex; posSlot < p->distTableSize; posSlot++)
+++      posSlotPrices[posSlot] += ((((posSlot >> 1) - 1) - kNumAlignBits) << kNumBitPriceShiftBits);
+++
+++    {
+++      UInt32 *distancesPrices = p->distancesPrices[lenToPosState];
+++      UInt32 i;
+++      for (i = 0; i < kStartPosModelIndex; i++)
+++        distancesPrices[i] = posSlotPrices[i];
+++      for (; i < kNumFullDistances; i++)
+++        distancesPrices[i] = posSlotPrices[GetPosSlot1(i)] + tempPrices[i];
+++    }
+++  }
+++  p->matchPriceCount = 0;
+++}
+++
+++void LzmaEnc_Construct(CLzmaEnc *p)
+++{
+++  RangeEnc_Construct(&p->rc);
+++  MatchFinder_Construct(&p->matchFinderBase);
+++  #ifndef _7ZIP_ST
+++  MatchFinderMt_Construct(&p->matchFinderMt);
+++  p->matchFinderMt.MatchFinder = &p->matchFinderBase;
+++  #endif
+++
+++  {
+++    CLzmaEncProps props;
+++    LzmaEncProps_Init(&props);
+++    LzmaEnc_SetProps(p, &props);
+++  }
+++
+++  #ifndef LZMA_LOG_BSR
+++  LzmaEnc_FastPosInit(p->g_FastPos);
+++  #endif
+++
+++  LzmaEnc_InitPriceTables(p->ProbPrices);
+++  p->litProbs = 0;
+++  p->saveState.litProbs = 0;
+++}
+++
+++CLzmaEncHandle LzmaEnc_Create(ISzAlloc *alloc)
+++{
+++  void *p;
+++  p = alloc->Alloc(alloc, sizeof(CLzmaEnc));
+++  if (p != 0)
+++    LzmaEnc_Construct((CLzmaEnc *)p);
+++  return p;
+++}
+++
+++void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
+++{
+++  alloc->Free(alloc, p->litProbs);
+++  alloc->Free(alloc, p->saveState.litProbs);
+++  p->litProbs = 0;
+++  p->saveState.litProbs = 0;
+++}
+++
+++void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
+++{
+++  #ifndef _7ZIP_ST
+++  MatchFinderMt_Destruct(&p->matchFinderMt, allocBig);
+++  #endif
+++  MatchFinder_Free(&p->matchFinderBase, allocBig);
+++  LzmaEnc_FreeLits(p, alloc);
+++  RangeEnc_Free(&p->rc, alloc);
+++}
+++
+++void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig)
+++{
+++  LzmaEnc_Destruct((CLzmaEnc *)p, alloc, allocBig);
+++  alloc->Free(alloc, p);
+++}
+++
+++static SRes LzmaEnc_CodeOneBlock(CLzmaEnc *p, Bool useLimits, UInt32 maxPackSize, UInt32 maxUnpackSize)
+++{
+++  UInt32 nowPos32, startPos32;
+++  if (p->needInit)
+++  {
+++    p->matchFinder.Init(p->matchFinderObj);
+++    p->needInit = 0;
+++  }
+++
+++  if (p->finished)
+++    return p->result;
+++  RINOK(CheckErrors(p));
+++
+++  nowPos32 = (UInt32)p->nowPos64;
+++  startPos32 = nowPos32;
+++
+++  if (p->nowPos64 == 0)
+++  {
+++    UInt32 numPairs;
+++    Byte curByte;
+++    if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) == 0)
+++      return Flush(p, nowPos32);
+++    ReadMatchDistances(p, &numPairs);
+++    RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][0], 0);
+++    p->state = kLiteralNextStates[p->state];
+++    curByte = p->matchFinder.GetIndexByte(p->matchFinderObj, 0 - p->additionalOffset);
+++    LitEnc_Encode(&p->rc, p->litProbs, curByte);
+++    p->additionalOffset--;
+++    nowPos32++;
+++  }
+++
+++  if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) != 0)
+++  for (;;)
+++  {
+++    UInt32 pos, len, posState;
+++
+++    if (p->fastMode)
+++      len = GetOptimumFast(p, &pos);
+++    else
+++      len = GetOptimum(p, nowPos32, &pos);
+++
+++    #ifdef SHOW_STAT2
+++    printf("\n pos = %4X,   len = %d   pos = %d", nowPos32, len, pos);
+++    #endif
+++
+++    posState = nowPos32 & p->pbMask;
+++    if (len == 1 && pos == (UInt32)-1)
+++    {
+++      Byte curByte;
+++      CLzmaProb *probs;
+++      const Byte *data;
+++
+++      RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 0);
+++      data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset;
+++      curByte = *data;
+++      probs = LIT_PROBS(nowPos32, *(data - 1));
+++      if (IsCharState(p->state))
+++        LitEnc_Encode(&p->rc, probs, curByte);
+++      else
+++        LitEnc_EncodeMatched(&p->rc, probs, curByte, *(data - p->reps[0] - 1));
+++      p->state = kLiteralNextStates[p->state];
+++    }
+++    else
+++    {
+++      RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 1);
+++      if (pos < LZMA_NUM_REPS)
+++      {
+++        RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 1);
+++        if (pos == 0)
+++        {
+++          RangeEnc_EncodeBit(&p->rc, &p->isRepG0[p->state], 0);
+++          RangeEnc_EncodeBit(&p->rc, &p->isRep0Long[p->state][posState], ((len == 1) ? 0 : 1));
+++        }
+++        else
+++        {
+++          UInt32 distance = p->reps[pos];
+++          RangeEnc_EncodeBit(&p->rc, &p->isRepG0[p->state], 1);
+++          if (pos == 1)
+++            RangeEnc_EncodeBit(&p->rc, &p->isRepG1[p->state], 0);
+++          else
+++          {
+++            RangeEnc_EncodeBit(&p->rc, &p->isRepG1[p->state], 1);
+++            RangeEnc_EncodeBit(&p->rc, &p->isRepG2[p->state], pos - 2);
+++            if (pos == 3)
+++              p->reps[3] = p->reps[2];
+++            p->reps[2] = p->reps[1];
+++          }
+++          p->reps[1] = p->reps[0];
+++          p->reps[0] = distance;
+++        }
+++        if (len == 1)
+++          p->state = kShortRepNextStates[p->state];
+++        else
+++        {
+++          LenEnc_Encode2(&p->repLenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices);
+++          p->state = kRepNextStates[p->state];
+++        }
+++      }
+++      else
+++      {
+++        UInt32 posSlot;
+++        RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 0);
+++        p->state = kMatchNextStates[p->state];
+++        LenEnc_Encode2(&p->lenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices);
+++        pos -= LZMA_NUM_REPS;
+++        GetPosSlot(pos, posSlot);
+++        RcTree_Encode(&p->rc, p->posSlotEncoder[GetLenToPosState(len)], kNumPosSlotBits, posSlot);
+++
+++        if (posSlot >= kStartPosModelIndex)
+++        {
+++          UInt32 footerBits = ((posSlot >> 1) - 1);
+++          UInt32 base = ((2 | (posSlot & 1)) << footerBits);
+++          UInt32 posReduced = pos - base;
+++
+++          if (posSlot < kEndPosModelIndex)
+++            RcTree_ReverseEncode(&p->rc, p->posEncoders + base - posSlot - 1, footerBits, posReduced);
+++          else
+++          {
+++            RangeEnc_EncodeDirectBits(&p->rc, posReduced >> kNumAlignBits, footerBits - kNumAlignBits);
+++            RcTree_ReverseEncode(&p->rc, p->posAlignEncoder, kNumAlignBits, posReduced & kAlignMask);
+++            p->alignPriceCount++;
+++          }
+++        }
+++        p->reps[3] = p->reps[2];
+++        p->reps[2] = p->reps[1];
+++        p->reps[1] = p->reps[0];
+++        p->reps[0] = pos;
+++        p->matchPriceCount++;
+++      }
+++    }
+++    p->additionalOffset -= len;
+++    nowPos32 += len;
+++    if (p->additionalOffset == 0)
+++    {
+++      UInt32 processed;
+++      if (!p->fastMode)
+++      {
+++        if (p->matchPriceCount >= (1 << 7))
+++          FillDistancesPrices(p);
+++        if (p->alignPriceCount >= kAlignTableSize)
+++          FillAlignPrices(p);
+++      }
+++      if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) == 0)
+++        break;
+++      processed = nowPos32 - startPos32;
+++      if (useLimits)
+++      {
+++        if (processed + kNumOpts + 300 >= maxUnpackSize ||
+++            RangeEnc_GetProcessed(&p->rc) + kNumOpts * 2 >= maxPackSize)
+++          break;
+++      }
+++      else if (processed >= (1 << 15))
+++      {
+++        p->nowPos64 += nowPos32 - startPos32;
+++        return CheckErrors(p);
+++      }
+++    }
+++  }
+++  p->nowPos64 += nowPos32 - startPos32;
+++  return Flush(p, nowPos32);
+++}
+++
+++#define kBigHashDicLimit ((UInt32)1 << 24)
+++
+++static SRes LzmaEnc_Alloc(CLzmaEnc *p, UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
+++{
+++  UInt32 beforeSize = kNumOpts;
+++  Bool btMode;
+++  if (!RangeEnc_Alloc(&p->rc, alloc))
+++    return SZ_ERROR_MEM;
+++  btMode = (p->matchFinderBase.btMode != 0);
+++  #ifndef _7ZIP_ST
+++  p->mtMode = (p->multiThread && !p->fastMode && btMode);
+++  #endif
+++
+++  {
+++    unsigned lclp = p->lc + p->lp;
+++    if (p->litProbs == 0 || p->saveState.litProbs == 0 || p->lclp != lclp)
+++    {
+++      LzmaEnc_FreeLits(p, alloc);
+++      p->litProbs = (CLzmaProb *)alloc->Alloc(alloc, (0x300 << lclp) * sizeof(CLzmaProb));
+++      p->saveState.litProbs = (CLzmaProb *)alloc->Alloc(alloc, (0x300 << lclp) * sizeof(CLzmaProb));
+++      if (p->litProbs == 0 || p->saveState.litProbs == 0)
+++      {
+++        LzmaEnc_FreeLits(p, alloc);
+++        return SZ_ERROR_MEM;
+++      }
+++      p->lclp = lclp;
+++    }
+++  }
+++
+++  p->matchFinderBase.bigHash = (p->dictSize > kBigHashDicLimit);
+++
+++  if (beforeSize + p->dictSize < keepWindowSize)
+++    beforeSize = keepWindowSize - p->dictSize;
+++
+++  #ifndef _7ZIP_ST
+++  if (p->mtMode)
+++  {
+++    RINOK(MatchFinderMt_Create(&p->matchFinderMt, p->dictSize, beforeSize, p->numFastBytes, LZMA_MATCH_LEN_MAX, allocBig));
+++    p->matchFinderObj = &p->matchFinderMt;
+++    MatchFinderMt_CreateVTable(&p->matchFinderMt, &p->matchFinder);
+++  }
+++  else
+++  #endif
+++  {
+++    if (!MatchFinder_Create(&p->matchFinderBase, p->dictSize, beforeSize, p->numFastBytes, LZMA_MATCH_LEN_MAX, allocBig))
+++      return SZ_ERROR_MEM;
+++    p->matchFinderObj = &p->matchFinderBase;
+++    MatchFinder_CreateVTable(&p->matchFinderBase, &p->matchFinder);
+++  }
+++  return SZ_OK;
+++}
+++
+++void LzmaEnc_Init(CLzmaEnc *p)
+++{
+++  UInt32 i;
+++  p->state = 0;
+++  for (i = 0 ; i < LZMA_NUM_REPS; i++)
+++    p->reps[i] = 0;
+++
+++  RangeEnc_Init(&p->rc);
+++
+++
+++  for (i = 0; i < kNumStates; i++)
+++  {
+++    UInt32 j;
+++    for (j = 0; j < LZMA_NUM_PB_STATES_MAX; j++)
+++    {
+++      p->isMatch[i][j] = kProbInitValue;
+++      p->isRep0Long[i][j] = kProbInitValue;
+++    }
+++    p->isRep[i] = kProbInitValue;
+++    p->isRepG0[i] = kProbInitValue;
+++    p->isRepG1[i] = kProbInitValue;
+++    p->isRepG2[i] = kProbInitValue;
+++  }
+++
+++  {
+++    UInt32 num = 0x300 << (p->lp + p->lc);
+++    for (i = 0; i < num; i++)
+++      p->litProbs[i] = kProbInitValue;
+++  }
+++
+++  {
+++    for (i = 0; i < kNumLenToPosStates; i++)
+++    {
+++      CLzmaProb *probs = p->posSlotEncoder[i];
+++      UInt32 j;
+++      for (j = 0; j < (1 << kNumPosSlotBits); j++)
+++        probs[j] = kProbInitValue;
+++    }
+++  }
+++  {
+++    for (i = 0; i < kNumFullDistances - kEndPosModelIndex; i++)
+++      p->posEncoders[i] = kProbInitValue;
+++  }
+++
+++  LenEnc_Init(&p->lenEnc.p);
+++  LenEnc_Init(&p->repLenEnc.p);
+++
+++  for (i = 0; i < (1 << kNumAlignBits); i++)
+++    p->posAlignEncoder[i] = kProbInitValue;
+++
+++  p->optimumEndIndex = 0;
+++  p->optimumCurrentIndex = 0;
+++  p->additionalOffset = 0;
+++
+++  p->pbMask = (1 << p->pb) - 1;
+++  p->lpMask = (1 << p->lp) - 1;
+++}
+++
+++void LzmaEnc_InitPrices(CLzmaEnc *p)
+++{
+++  if (!p->fastMode)
+++  {
+++    FillDistancesPrices(p);
+++    FillAlignPrices(p);
+++  }
+++
+++  p->lenEnc.tableSize =
+++  p->repLenEnc.tableSize =
+++      p->numFastBytes + 1 - LZMA_MATCH_LEN_MIN;
+++  LenPriceEnc_UpdateTables(&p->lenEnc, 1 << p->pb, p->ProbPrices);
+++  LenPriceEnc_UpdateTables(&p->repLenEnc, 1 << p->pb, p->ProbPrices);
+++}
+++
+++static SRes LzmaEnc_AllocAndInit(CLzmaEnc *p, UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
+++{
+++  UInt32 i;
+++  for (i = 0; i < (UInt32)kDicLogSizeMaxCompress; i++)
+++    if (p->dictSize <= ((UInt32)1 << i))
+++      break;
+++  p->distTableSize = i * 2;
+++
+++  p->finished = False;
+++  p->result = SZ_OK;
+++  RINOK(LzmaEnc_Alloc(p, keepWindowSize, alloc, allocBig));
+++  LzmaEnc_Init(p);
+++  LzmaEnc_InitPrices(p);
+++  p->nowPos64 = 0;
+++  return SZ_OK;
+++}
+++
+++static SRes LzmaEnc_Prepare(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream,
+++    ISzAlloc *alloc, ISzAlloc *allocBig)
+++{
+++  CLzmaEnc *p = (CLzmaEnc *)pp;
+++  p->matchFinderBase.stream = inStream;
+++  p->needInit = 1;
+++  p->rc.outStream = outStream;
+++  return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig);
+++}
+++
+++SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp,
+++    ISeqInStream *inStream, UInt32 keepWindowSize,
+++    ISzAlloc *alloc, ISzAlloc *allocBig)
+++{
+++  CLzmaEnc *p = (CLzmaEnc *)pp;
+++  p->matchFinderBase.stream = inStream;
+++  p->needInit = 1;
+++  return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
+++}
+++
+++static void LzmaEnc_SetInputBuf(CLzmaEnc *p, const Byte *src, SizeT srcLen)
+++{
+++  p->matchFinderBase.directInput = 1;
+++  p->matchFinderBase.bufferBase = (Byte *)src;
+++  p->matchFinderBase.directInputRem = srcLen;
+++}
+++
+++SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
+++    UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
+++{
+++  CLzmaEnc *p = (CLzmaEnc *)pp;
+++  LzmaEnc_SetInputBuf(p, src, srcLen);
+++  p->needInit = 1;
+++
+++  return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
+++}
+++
+++void LzmaEnc_Finish(CLzmaEncHandle pp)
+++{
+++  #ifndef _7ZIP_ST
+++  CLzmaEnc *p = (CLzmaEnc *)pp;
+++  if (p->mtMode)
+++    MatchFinderMt_ReleaseStream(&p->matchFinderMt);
+++  #else
+++  pp = pp;
+++  #endif
+++}
+++
+++typedef struct
+++{
+++  ISeqOutStream funcTable;
+++  Byte *data;
+++  SizeT rem;
+++  Bool overflow;
+++} CSeqOutStreamBuf;
+++
+++static size_t MyWrite(void *pp, const void *data, size_t size)
+++{
+++  CSeqOutStreamBuf *p = (CSeqOutStreamBuf *)pp;
+++  if (p->rem < size)
+++  {
+++    size = p->rem;
+++    p->overflow = True;
+++  }
+++  memcpy(p->data, data, size);
+++  p->rem -= size;
+++  p->data += size;
+++  return size;
+++}
+++
+++
+++UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp)
+++{
+++  const CLzmaEnc *p = (CLzmaEnc *)pp;
+++  return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj);
+++}
+++
+++const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp)
+++{
+++  const CLzmaEnc *p = (CLzmaEnc *)pp;
+++  return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset;
+++}
+++
+++SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit,
+++    Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize)
+++{
+++  CLzmaEnc *p = (CLzmaEnc *)pp;
+++  UInt64 nowPos64;
+++  SRes res;
+++  CSeqOutStreamBuf outStream;
+++
+++  outStream.funcTable.Write = MyWrite;
+++  outStream.data = dest;
+++  outStream.rem = *destLen;
+++  outStream.overflow = False;
+++
+++  p->writeEndMark = False;
+++  p->finished = False;
+++  p->result = SZ_OK;
+++
+++  if (reInit)
+++    LzmaEnc_Init(p);
+++  LzmaEnc_InitPrices(p);
+++  nowPos64 = p->nowPos64;
+++  RangeEnc_Init(&p->rc);
+++  p->rc.outStream = &outStream.funcTable;
+++
+++  res = LzmaEnc_CodeOneBlock(p, True, desiredPackSize, *unpackSize);
+++
+++  *unpackSize = (UInt32)(p->nowPos64 - nowPos64);
+++  *destLen -= outStream.rem;
+++  if (outStream.overflow)
+++    return SZ_ERROR_OUTPUT_EOF;
+++
+++  return res;
+++}
+++
+++static SRes LzmaEnc_Encode2(CLzmaEnc *p, ICompressProgress *progress)
+++{
+++  SRes res = SZ_OK;
+++
+++  #ifndef _7ZIP_ST
+++  Byte allocaDummy[0x300];
+++  int i = 0;
+++  for (i = 0; i < 16; i++)
+++    allocaDummy[i] = (Byte)i;
+++  #endif
+++
+++  for (;;)
+++  {
+++    res = LzmaEnc_CodeOneBlock(p, False, 0, 0);
+++    if (res != SZ_OK || p->finished != 0)
+++      break;
+++    if (progress != 0)
+++    {
+++      res = progress->Progress(progress, p->nowPos64, RangeEnc_GetProcessed(&p->rc));
+++      if (res != SZ_OK)
+++      {
+++        res = SZ_ERROR_PROGRESS;
+++        break;
+++      }
+++    }
+++  }
+++  LzmaEnc_Finish(p);
+++  return res;
+++}
+++
+++SRes LzmaEnc_Encode(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress,
+++    ISzAlloc *alloc, ISzAlloc *allocBig)
+++{
+++  RINOK(LzmaEnc_Prepare(pp, outStream, inStream, alloc, allocBig));
+++  return LzmaEnc_Encode2((CLzmaEnc *)pp, progress);
+++}
+++
+++SRes LzmaEnc_WriteProperties(CLzmaEncHandle pp, Byte *props, SizeT *size)
+++{
+++  CLzmaEnc *p = (CLzmaEnc *)pp;
+++  int i;
+++  UInt32 dictSize = p->dictSize;
+++  if (*size < LZMA_PROPS_SIZE)
+++    return SZ_ERROR_PARAM;
+++  *size = LZMA_PROPS_SIZE;
+++  props[0] = (Byte)((p->pb * 5 + p->lp) * 9 + p->lc);
+++
+++  for (i = 11; i <= 30; i++)
+++  {
+++    if (dictSize <= ((UInt32)2 << i))
+++    {
+++      dictSize = (2 << i);
+++      break;
+++    }
+++    if (dictSize <= ((UInt32)3 << i))
+++    {
+++      dictSize = (3 << i);
+++      break;
+++    }
+++  }
+++
+++  for (i = 0; i < 4; i++)
+++    props[1 + i] = (Byte)(dictSize >> (8 * i));
+++  return SZ_OK;
+++}
+++
+++SRes LzmaEnc_MemEncode(CLzmaEncHandle pp, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
+++    int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig)
+++{
+++  SRes res;
+++  CLzmaEnc *p = (CLzmaEnc *)pp;
+++
+++  CSeqOutStreamBuf outStream;
+++
+++  LzmaEnc_SetInputBuf(p, src, srcLen);
+++
+++  outStream.funcTable.Write = MyWrite;
+++  outStream.data = dest;
+++  outStream.rem = *destLen;
+++  outStream.overflow = False;
+++
+++  p->writeEndMark = writeEndMark;
+++
+++  p->rc.outStream = &outStream.funcTable;
+++  res = LzmaEnc_MemPrepare(pp, src, srcLen, 0, alloc, allocBig);
+++  if (res == SZ_OK)
+++    res = LzmaEnc_Encode2(p, progress);
+++
+++  *destLen -= outStream.rem;
+++  if (outStream.overflow)
+++    return SZ_ERROR_OUTPUT_EOF;
+++  return res;
+++}
+++
+++SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
+++    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
+++    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig)
+++{
+++  CLzmaEnc *p = (CLzmaEnc *)LzmaEnc_Create(alloc);
+++  SRes res;
+++  if (p == 0)
+++    return SZ_ERROR_MEM;
+++
+++  res = LzmaEnc_SetProps(p, props);
+++  if (res == SZ_OK)
+++  {
+++    res = LzmaEnc_WriteProperties(p, propsEncoded, propsSize);
+++    if (res == SZ_OK)
+++      res = LzmaEnc_MemEncode(p, dest, destLen, src, srcLen,
+++          writeEndMark, progress, alloc, allocBig);
+++  }
+++
+++  LzmaEnc_Destroy(p, alloc, allocBig);
+++  return res;
+++}
++--- /dev/null
+++++ b/lib/lzma/Makefile
++@@ -0,0 +1,7 @@
+++lzma_compress-objs := LzFind.o LzmaEnc.o
+++lzma_decompress-objs := LzmaDec.o
+++
+++obj-$(CONFIG_LZMA_COMPRESS) += lzma_compress.o
+++obj-$(CONFIG_LZMA_DECOMPRESS) += lzma_decompress.o
+++
+++EXTRA_CFLAGS += -Iinclude/linux -Iinclude/linux/lzma -include types.h
+diff --git a/target/linux/generic/pending-5.4/532-jffs2_eofdetect.patch b/target/linux/generic/pending-5.4/532-jffs2_eofdetect.patch
+new file mode 100644
+index 0000000000..df4ab9b754
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/532-jffs2_eofdetect.patch
+@@ -0,0 +1,65 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: fs: jffs2: EOF marker
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ fs/jffs2/build.c | 10 ++++++++++
++ fs/jffs2/scan.c  | 21 +++++++++++++++++++--
++ 2 files changed, 29 insertions(+), 2 deletions(-)
++
++--- a/fs/jffs2/build.c
+++++ b/fs/jffs2/build.c
++@@ -117,6 +117,16 @@ static int jffs2_build_filesystem(struct
++ 	dbg_fsbuild("scanned flash completely\n");
++ 	jffs2_dbg_dump_block_lists_nolock(c);
++ 
+++	if (c->flags & (1 << 7)) {
+++		printk("%s(): unlocking the mtd device... ", __func__);
+++		mtd_unlock(c->mtd, 0, c->mtd->size);
+++		printk("done.\n");
+++
+++		printk("%s(): erasing all blocks after the end marker... ", __func__);
+++		jffs2_erase_pending_blocks(c, -1);
+++		printk("done.\n");
+++	}
+++
++ 	dbg_fsbuild("pass 1 starting\n");
++ 	c->flags |= JFFS2_SB_FLAG_BUILDING;
++ 	/* Now scan the directory tree, increasing nlink according to every dirent found. */
++--- a/fs/jffs2/scan.c
+++++ b/fs/jffs2/scan.c
++@@ -148,8 +148,14 @@ int jffs2_scan_medium(struct jffs2_sb_in
++ 		/* reset summary info for next eraseblock scan */
++ 		jffs2_sum_reset_collected(s);
++ 
++-		ret = jffs2_scan_eraseblock(c, jeb, buf_size?flashbuf:(flashbuf+jeb->offset),
++-						buf_size, s);
+++		if (c->flags & (1 << 7)) {
+++			if (mtd_block_isbad(c->mtd, jeb->offset))
+++				ret = BLK_STATE_BADBLOCK;
+++			else
+++				ret = BLK_STATE_ALLFF;
+++		} else
+++			ret = jffs2_scan_eraseblock(c, jeb, buf_size?flashbuf:(flashbuf+jeb->offset),
+++							buf_size, s);
++ 
++ 		if (ret < 0)
++ 			goto out;
++@@ -564,6 +570,17 @@ full_scan:
++ 			return err;
++ 	}
++ 
+++	if ((buf[0] == 0xde) &&
+++		(buf[1] == 0xad) &&
+++		(buf[2] == 0xc0) &&
+++		(buf[3] == 0xde)) {
+++		/* end of filesystem. erase everything after this point */
+++		printk("%s(): End of filesystem marker found at 0x%x\n", __func__, jeb->offset);
+++		c->flags |= (1 << 7);
+++
+++		return BLK_STATE_ALLFF;
+++	}
+++
++ 	/* We temporarily use 'ofs' as a pointer into the buffer/jeb */
++ 	ofs = 0;
++ 	max_ofs = EMPTY_SCAN_SIZE(c->sector_size);
+diff --git a/target/linux/generic/pending-5.4/600-netfilter_conntrack_flush.patch b/target/linux/generic/pending-5.4/600-netfilter_conntrack_flush.patch
+new file mode 100644
+index 0000000000..eaf8c78052
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/600-netfilter_conntrack_flush.patch
+@@ -0,0 +1,88 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: netfilter: add support for flushing conntrack via /proc
++
++lede-commit 8193bbe59a74d34d6a26d4a8cb857b1952905314
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ net/netfilter/nf_conntrack_standalone.c | 59 ++++++++++++++++++++++++++++++++-
++ 1 file changed, 58 insertions(+), 1 deletion(-)
++
++--- a/net/netfilter/nf_conntrack_standalone.c
+++++ b/net/netfilter/nf_conntrack_standalone.c
++@@ -9,6 +9,7 @@
++ #include <linux/percpu.h>
++ #include <linux/netdevice.h>
++ #include <linux/security.h>
+++#include <linux/inet.h>
++ #include <net/net_namespace.h>
++ #ifdef CONFIG_SYSCTL
++ #include <linux/sysctl.h>
++@@ -455,6 +456,56 @@ static int ct_cpu_seq_show(struct seq_fi
++ 	return 0;
++ }
++ 
+++struct kill_request {
+++	u16 family;
+++	union nf_inet_addr addr;
+++};
+++
+++static int kill_matching(struct nf_conn *i, void *data)
+++{
+++	struct kill_request *kr = data;
+++	struct nf_conntrack_tuple *t1 = &i->tuplehash[IP_CT_DIR_ORIGINAL].tuple;
+++	struct nf_conntrack_tuple *t2 = &i->tuplehash[IP_CT_DIR_REPLY].tuple;
+++
+++	if (!kr->family)
+++		return 1;
+++
+++	if (t1->src.l3num != kr->family)
+++		return 0;
+++
+++	return (nf_inet_addr_cmp(&kr->addr, &t1->src.u3) ||
+++	        nf_inet_addr_cmp(&kr->addr, &t1->dst.u3) ||
+++	        nf_inet_addr_cmp(&kr->addr, &t2->src.u3) ||
+++	        nf_inet_addr_cmp(&kr->addr, &t2->dst.u3));
+++}
+++
+++static int ct_file_write(struct file *file, char *buf, size_t count)
+++{
+++	struct seq_file *seq = file->private_data;
+++	struct net *net = seq_file_net(seq);
+++	struct kill_request kr = { };
+++
+++	if (count == 0)
+++		return 0;
+++
+++	if (count >= INET6_ADDRSTRLEN)
+++		count = INET6_ADDRSTRLEN - 1;
+++
+++	if (strnchr(buf, count, ':')) {
+++		kr.family = AF_INET6;
+++		if (!in6_pton(buf, count, (void *)&kr.addr, '\n', NULL))
+++			return -EINVAL;
+++	} else if (strnchr(buf, count, '.')) {
+++		kr.family = AF_INET;
+++		if (!in4_pton(buf, count, (void *)&kr.addr, '\n', NULL))
+++			return -EINVAL;
+++	}
+++
+++	nf_ct_iterate_cleanup_net(net, kill_matching, &kr, 0, 0);
+++
+++	return 0;
+++}
+++
++ static const struct seq_operations ct_cpu_seq_ops = {
++ 	.start	= ct_cpu_seq_start,
++ 	.next	= ct_cpu_seq_next,
++@@ -468,8 +519,9 @@ static int nf_conntrack_standalone_init_
++ 	kuid_t root_uid;
++ 	kgid_t root_gid;
++ 
++-	pde = proc_create_net("nf_conntrack", 0440, net->proc_net, &ct_seq_ops,
++-			sizeof(struct ct_iter_state));
+++	pde = proc_create_net_data_write("nf_conntrack", 0440, net->proc_net,
+++					 &ct_seq_ops, &ct_file_write,
+++					 sizeof(struct ct_iter_state), NULL);
++ 	if (!pde)
++ 		goto out_nf_conntrack;
++ 
+diff --git a/target/linux/generic/pending-5.4/610-netfilter_match_bypass_default_checks.patch b/target/linux/generic/pending-5.4/610-netfilter_match_bypass_default_checks.patch
+new file mode 100644
+index 0000000000..703ac8215e
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/610-netfilter_match_bypass_default_checks.patch
+@@ -0,0 +1,110 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: kernel: add a new version of my netfilter speedup patches for linux 2.6.39 and 3.0
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ include/uapi/linux/netfilter_ipv4/ip_tables.h |  1 +
++ net/ipv4/netfilter/ip_tables.c                | 37 +++++++++++++++++++++++++++
++ 2 files changed, 38 insertions(+)
++
++--- a/include/uapi/linux/netfilter_ipv4/ip_tables.h
+++++ b/include/uapi/linux/netfilter_ipv4/ip_tables.h
++@@ -89,6 +89,7 @@ struct ipt_ip {
++ #define IPT_F_FRAG		0x01	/* Set if rule is a fragment rule */
++ #define IPT_F_GOTO		0x02	/* Set if jump is a goto */
++ #define IPT_F_MASK		0x03	/* All possible flag bits mask. */
+++#define IPT_F_NO_DEF_MATCH	0x80	/* Internal: no default match rules present */
++ 
++ /* Values for "inv" field in struct ipt_ip. */
++ #define IPT_INV_VIA_IN		0x01	/* Invert the sense of IN IFACE. */
++--- a/net/ipv4/netfilter/ip_tables.c
+++++ b/net/ipv4/netfilter/ip_tables.c
++@@ -50,6 +50,9 @@ ip_packet_match(const struct iphdr *ip,
++ {
++ 	unsigned long ret;
++ 
+++	if (ipinfo->flags & IPT_F_NO_DEF_MATCH)
+++		return true;
+++
++ 	if (NF_INVF(ipinfo, IPT_INV_SRCIP,
++ 		    (ip->saddr & ipinfo->smsk.s_addr) != ipinfo->src.s_addr) ||
++ 	    NF_INVF(ipinfo, IPT_INV_DSTIP,
++@@ -80,6 +83,29 @@ ip_packet_match(const struct iphdr *ip,
++ 	return true;
++ }
++ 
+++static void
+++ip_checkdefault(struct ipt_ip *ip)
+++{
+++	static const char iface_mask[IFNAMSIZ] = {};
+++
+++	if (ip->invflags || ip->flags & IPT_F_FRAG)
+++		return;
+++
+++	if (memcmp(ip->iniface_mask, iface_mask, IFNAMSIZ) != 0)
+++		return;
+++
+++	if (memcmp(ip->outiface_mask, iface_mask, IFNAMSIZ) != 0)
+++		return;
+++
+++	if (ip->smsk.s_addr || ip->dmsk.s_addr)
+++		return;
+++
+++	if (ip->proto)
+++		return;
+++
+++	ip->flags |= IPT_F_NO_DEF_MATCH;
+++}
+++
++ static bool
++ ip_checkentry(const struct ipt_ip *ip)
++ {
++@@ -524,6 +550,8 @@ find_check_entry(struct ipt_entry *e, st
++ 	struct xt_mtchk_param mtpar;
++ 	struct xt_entry_match *ematch;
++ 
+++	ip_checkdefault(&e->ip);
+++
++ 	if (!xt_percpu_counter_alloc(alloc_state, &e->counters))
++ 		return -ENOMEM;
++ 
++@@ -818,6 +846,7 @@ copy_entries_to_user(unsigned int total_
++ 	const struct xt_table_info *private = table->private;
++ 	int ret = 0;
++ 	const void *loc_cpu_entry;
+++	u8 flags;
++ 
++ 	counters = alloc_counters(table);
++ 	if (IS_ERR(counters))
++@@ -845,6 +874,14 @@ copy_entries_to_user(unsigned int total_
++ 			goto free_counters;
++ 		}
++ 
+++		flags = e->ip.flags & IPT_F_MASK;
+++		if (copy_to_user(userptr + off
+++				 + offsetof(struct ipt_entry, ip.flags),
+++				 &flags, sizeof(flags)) != 0) {
+++			ret = -EFAULT;
+++			goto free_counters;
+++		}
+++
++ 		for (i = sizeof(struct ipt_entry);
++ 		     i < e->target_offset;
++ 		     i += m->u.match_size) {
++@@ -1225,12 +1262,15 @@ compat_copy_entry_to_user(struct ipt_ent
++ 	compat_uint_t origsize;
++ 	const struct xt_entry_match *ematch;
++ 	int ret = 0;
+++	u8 flags = e->ip.flags & IPT_F_MASK;
++ 
++ 	origsize = *size;
++ 	ce = *dstptr;
++ 	if (copy_to_user(ce, e, sizeof(struct ipt_entry)) != 0 ||
++ 	    copy_to_user(&ce->counters, &counters[i],
++-	    sizeof(counters[i])) != 0)
+++	    sizeof(counters[i])) != 0 ||
+++	    copy_to_user(&ce->ip.flags, &flags,
+++	    sizeof(flags)) != 0)
++ 		return -EFAULT;
++ 
++ 	*dstptr += sizeof(struct compat_ipt_entry);
+diff --git a/target/linux/generic/pending-5.4/611-netfilter_match_bypass_default_table.patch b/target/linux/generic/pending-5.4/611-netfilter_match_bypass_default_table.patch
+new file mode 100644
+index 0000000000..baf738a8d2
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/611-netfilter_match_bypass_default_table.patch
+@@ -0,0 +1,106 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: netfilter: match bypass default table
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ net/ipv4/netfilter/ip_tables.c | 79 +++++++++++++++++++++++++++++++-----------
++ 1 file changed, 58 insertions(+), 21 deletions(-)
++
++--- a/net/ipv4/netfilter/ip_tables.c
+++++ b/net/ipv4/netfilter/ip_tables.c
++@@ -246,6 +246,33 @@ struct ipt_entry *ipt_next_entry(const s
++ 	return (void *)entry + entry->next_offset;
++ }
++ 
+++static bool
+++ipt_handle_default_rule(struct ipt_entry *e, unsigned int *verdict)
+++{
+++	struct xt_entry_target *t;
+++	struct xt_standard_target *st;
+++
+++	if (e->target_offset != sizeof(struct ipt_entry))
+++		return false;
+++
+++	if (!(e->ip.flags & IPT_F_NO_DEF_MATCH))
+++		return false;
+++
+++	t = ipt_get_target(e);
+++	if (t->u.kernel.target->target)
+++		return false;
+++
+++	st = (struct xt_standard_target *) t;
+++	if (st->verdict == XT_RETURN)
+++		return false;
+++
+++	if (st->verdict >= 0)
+++		return false;
+++
+++	*verdict = (unsigned)(-st->verdict) - 1;
+++	return true;
+++}
+++
++ /* Returns one of the generic firewall policies, like NF_ACCEPT. */
++ unsigned int
++ ipt_do_table(struct sk_buff *skb,
++@@ -266,27 +293,28 @@ ipt_do_table(struct sk_buff *skb,
++ 	unsigned int addend;
++ 
++ 	/* Initialization */
+++	WARN_ON(!(table->valid_hooks & (1 << hook)));
+++	local_bh_disable();
+++	private = READ_ONCE(table->private); /* Address dependency. */
+++	cpu        = smp_processor_id();
+++	table_base = private->entries;
+++
+++	e = get_entry(table_base, private->hook_entry[hook]);
+++	if (ipt_handle_default_rule(e, &verdict)) {
+++		struct xt_counters *counter;
+++
+++		counter = xt_get_this_cpu_counter(&e->counters);
+++		ADD_COUNTER(*counter, skb->len, 1);
+++		local_bh_enable();
+++		return verdict;
+++	}
+++
++ 	stackidx = 0;
++ 	ip = ip_hdr(skb);
++ 	indev = state->in ? state->in->name : nulldevname;
++ 	outdev = state->out ? state->out->name : nulldevname;
++-	/* We handle fragments by dealing with the first fragment as
++-	 * if it was a normal packet.  All other fragments are treated
++-	 * normally, except that they will NEVER match rules that ask
++-	 * things we don't know, ie. tcp syn flag or ports).  If the
++-	 * rule is also a fragment-specific rule, non-fragments won't
++-	 * match it. */
++-	acpar.fragoff = ntohs(ip->frag_off) & IP_OFFSET;
++-	acpar.thoff   = ip_hdrlen(skb);
++-	acpar.hotdrop = false;
++-	acpar.state   = state;
++ 
++-	WARN_ON(!(table->valid_hooks & (1 << hook)));
++-	local_bh_disable();
++ 	addend = xt_write_recseq_begin();
++-	private = READ_ONCE(table->private); /* Address dependency. */
++-	cpu        = smp_processor_id();
++-	table_base = private->entries;
++ 	jumpstack  = (struct ipt_entry **)private->jumpstack[cpu];
++ 
++ 	/* Switch to alternate jumpstack if we're being invoked via TEE.
++@@ -299,7 +327,16 @@ ipt_do_table(struct sk_buff *skb,
++ 	if (static_key_false(&xt_tee_enabled))
++ 		jumpstack += private->stacksize * __this_cpu_read(nf_skb_duplicated);
++ 
++-	e = get_entry(table_base, private->hook_entry[hook]);
+++	/* We handle fragments by dealing with the first fragment as
+++	 * if it was a normal packet.  All other fragments are treated
+++	 * normally, except that they will NEVER match rules that ask
+++	 * things we don't know, ie. tcp syn flag or ports).  If the
+++	 * rule is also a fragment-specific rule, non-fragments won't
+++	 * match it. */
+++	acpar.fragoff = ntohs(ip->frag_off) & IP_OFFSET;
+++	acpar.thoff   = ip_hdrlen(skb);
+++	acpar.hotdrop = false;
+++	acpar.state   = state;
++ 
++ 	do {
++ 		const struct xt_entry_target *t;
+diff --git a/target/linux/generic/pending-5.4/612-netfilter_match_reduce_memory_access.patch b/target/linux/generic/pending-5.4/612-netfilter_match_reduce_memory_access.patch
+new file mode 100644
+index 0000000000..79da6778b6
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/612-netfilter_match_reduce_memory_access.patch
+@@ -0,0 +1,22 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: netfilter: reduce match memory access
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ net/ipv4/netfilter/ip_tables.c | 4 ++--
++ 1 file changed, 2 insertions(+), 2 deletions(-)
++
++--- a/net/ipv4/netfilter/ip_tables.c
+++++ b/net/ipv4/netfilter/ip_tables.c
++@@ -53,9 +53,9 @@ ip_packet_match(const struct iphdr *ip,
++ 	if (ipinfo->flags & IPT_F_NO_DEF_MATCH)
++ 		return true;
++ 
++-	if (NF_INVF(ipinfo, IPT_INV_SRCIP,
+++	if (NF_INVF(ipinfo, IPT_INV_SRCIP, ipinfo->smsk.s_addr &&
++ 		    (ip->saddr & ipinfo->smsk.s_addr) != ipinfo->src.s_addr) ||
++-	    NF_INVF(ipinfo, IPT_INV_DSTIP,
+++	    NF_INVF(ipinfo, IPT_INV_DSTIP, ipinfo->dmsk.s_addr &&
++ 		    (ip->daddr & ipinfo->dmsk.s_addr) != ipinfo->dst.s_addr))
++ 		return false;
++ 
+diff --git a/target/linux/generic/pending-5.4/613-netfilter_optional_tcp_window_check.patch b/target/linux/generic/pending-5.4/613-netfilter_optional_tcp_window_check.patch
+new file mode 100644
+index 0000000000..0735f8d20d
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/613-netfilter_optional_tcp_window_check.patch
+@@ -0,0 +1,73 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: netfilter: optional tcp window check
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ net/netfilter/nf_conntrack_proto_tcp.c | 13 +++++++++++++
++ 1 file changed, 13 insertions(+)
++
++--- a/net/netfilter/nf_conntrack_proto_tcp.c
+++++ b/net/netfilter/nf_conntrack_proto_tcp.c
++@@ -31,6 +31,9 @@
++ #include <net/netfilter/ipv4/nf_conntrack_ipv4.h>
++ #include <net/netfilter/ipv6/nf_conntrack_ipv6.h>
++ 
+++/* Do not check the TCP window for incoming packets  */
+++static int nf_ct_tcp_no_window_check __read_mostly = 1;
+++
++ /* "Be conservative in what you do,
++     be liberal in what you accept from others."
++     If it's non-zero, we mark only out of window RST segments as INVALID. */
++@@ -476,6 +479,9 @@ static bool tcp_in_window(const struct n
++ 	s32 receiver_offset;
++ 	bool res, in_recv_win;
++ 
+++	if (nf_ct_tcp_no_window_check)
+++		return true;
+++
++ 	/*
++ 	 * Get the required data from the packet.
++ 	 */
++@@ -1130,7 +1136,7 @@ int nf_conntrack_tcp_packet(struct nf_co
++ 		 IP_CT_TCP_FLAG_DATA_UNACKNOWLEDGED &&
++ 		 timeouts[new_state] > timeouts[TCP_CONNTRACK_UNACK])
++ 		timeout = timeouts[TCP_CONNTRACK_UNACK];
++-	else if (ct->proto.tcp.last_win == 0 &&
+++	else if (!nf_ct_tcp_no_window_check && ct->proto.tcp.last_win == 0 &&
++ 		 timeouts[new_state] > timeouts[TCP_CONNTRACK_RETRANS])
++ 		timeout = timeouts[TCP_CONNTRACK_RETRANS];
++ 	else
++--- a/net/netfilter/nf_conntrack_standalone.c
+++++ b/net/netfilter/nf_conntrack_standalone.c
++@@ -25,6 +25,9 @@
++ #include <net/netfilter/nf_conntrack_timestamp.h>
++ #include <linux/rculist_nulls.h>
++ 
+++/* Do not check the TCP window for incoming packets  */
+++static int nf_ct_tcp_no_window_check __read_mostly = 1;
+++
++ static bool enable_hooks __read_mostly;
++ MODULE_PARM_DESC(enable_hooks, "Always enable conntrack hooks");
++ module_param(enable_hooks, bool, 0000);
++@@ -650,6 +653,7 @@ enum nf_ct_sysctl_index {
++ 	NF_SYSCTL_CT_PROTO_TIMEOUT_GRE_STREAM,
++ #endif
++ 
+++	NF_SYSCTL_CT_PROTO_TCP_NO_WINDOW_CHECK,
++ 	__NF_SYSCTL_CT_LAST_SYSCTL,
++ };
++ 
++@@ -976,6 +980,13 @@ static struct ctl_table nf_ct_sysctl_tab
++ 		.proc_handler   = proc_dointvec_jiffies,
++ 	},
++ #endif
+++	[NF_SYSCTL_CT_PROTO_TCP_NO_WINDOW_CHECK] = {
+++		.procname       = "nf_conntrack_tcp_no_window_check",
+++		.data           = &nf_ct_tcp_no_window_check,
+++		.maxlen         = sizeof(unsigned int),
+++		.mode           = 0644,
+++		.proc_handler   = proc_dointvec,
+++	},
++ 	{}
++ };
++ 
+diff --git a/target/linux/generic/pending-5.4/620-net_sched-codel-do-not-defer-queue-length-update.patch b/target/linux/generic/pending-5.4/620-net_sched-codel-do-not-defer-queue-length-update.patch
+new file mode 100644
+index 0000000000..ca85b8a98c
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/620-net_sched-codel-do-not-defer-queue-length-update.patch
+@@ -0,0 +1,86 @@
++From: Konstantin Khlebnikov <khlebnikov@yandex-team.ru>
++Date: Mon, 21 Aug 2017 11:14:14 +0300
++Subject: [PATCH] net_sched/codel: do not defer queue length update
++
++When codel wants to drop last packet in ->dequeue() it cannot call
++qdisc_tree_reduce_backlog() right away - it will notify parent qdisc
++about zero qlen and HTB/HFSC will deactivate class. The same class will
++be deactivated second time by caller of ->dequeue(). Currently codel and
++fq_codel defer update. This triggers warning in HFSC when it's qlen != 0
++but there is no active classes.
++
++This patch update parent queue length immediately: just temporary increase
++qlen around qdisc_tree_reduce_backlog() to prevent first class deactivation
++if we have skb to return.
++
++This might open another problem in HFSC - now operation peek could fail and
++deactivate parent class.
++
++Signed-off-by: Konstantin Khlebnikov <khlebnikov@yandex-team.ru>
++Link: https://bugzilla.kernel.org/show_bug.cgi?id=109581
++---
++
++--- a/net/sched/sch_codel.c
+++++ b/net/sched/sch_codel.c
++@@ -95,11 +95,17 @@ static struct sk_buff *codel_qdisc_deque
++ 			    &q->stats, qdisc_pkt_len, codel_get_enqueue_time,
++ 			    drop_func, dequeue_func);
++ 
++-	/* We cant call qdisc_tree_reduce_backlog() if our qlen is 0,
++-	 * or HTB crashes. Defer it for next round.
+++	/* If our qlen is 0 qdisc_tree_reduce_backlog() will deactivate
+++	 * parent class, dequeue in parent qdisc will do the same if we
+++	 * return skb. Temporary increment qlen if we have skb.
++ 	 */
++-	if (q->stats.drop_count && sch->q.qlen) {
++-		qdisc_tree_reduce_backlog(sch, q->stats.drop_count, q->stats.drop_len);
+++	if (q->stats.drop_count) {
+++		if (skb)
+++			sch->q.qlen++;
+++		qdisc_tree_reduce_backlog(sch, q->stats.drop_count,
+++					  q->stats.drop_len);
+++		if (skb)
+++			sch->q.qlen--;
++ 		q->stats.drop_count = 0;
++ 		q->stats.drop_len = 0;
++ 	}
++--- a/net/sched/sch_fq_codel.c
+++++ b/net/sched/sch_fq_codel.c
++@@ -305,6 +305,21 @@ begin:
++ 			    &flow->cvars, &q->cstats, qdisc_pkt_len,
++ 			    codel_get_enqueue_time, drop_func, dequeue_func);
++ 
+++	/* If our qlen is 0 qdisc_tree_reduce_backlog() will deactivate
+++	 * parent class, dequeue in parent qdisc will do the same if we
+++	 * return skb. Temporary increment qlen if we have skb.
+++	 */
+++	if (q->cstats.drop_count) {
+++		if (skb)
+++			sch->q.qlen++;
+++		qdisc_tree_reduce_backlog(sch, q->cstats.drop_count,
+++					  q->cstats.drop_len);
+++		if (skb)
+++			sch->q.qlen--;
+++		q->cstats.drop_count = 0;
+++		q->cstats.drop_len = 0;
+++	}
+++
++ 	if (!skb) {
++ 		/* force a pass through old_flows to prevent starvation */
++ 		if ((head == &q->new_flows) && !list_empty(&q->old_flows))
++@@ -315,15 +330,6 @@ begin:
++ 	}
++ 	qdisc_bstats_update(sch, skb);
++ 	flow->deficit -= qdisc_pkt_len(skb);
++-	/* We cant call qdisc_tree_reduce_backlog() if our qlen is 0,
++-	 * or HTB crashes. Defer it for next round.
++-	 */
++-	if (q->cstats.drop_count && sch->q.qlen) {
++-		qdisc_tree_reduce_backlog(sch, q->cstats.drop_count,
++-					  q->cstats.drop_len);
++-		q->cstats.drop_count = 0;
++-		q->cstats.drop_len = 0;
++-	}
++ 	return skb;
++ }
++ 
+diff --git a/target/linux/generic/pending-5.4/630-packet_socket_type.patch b/target/linux/generic/pending-5.4/630-packet_socket_type.patch
+new file mode 100644
+index 0000000000..d9bfda1303
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/630-packet_socket_type.patch
+@@ -0,0 +1,138 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: net: add an optimization for dealing with raw sockets
++
++lede-commit: 4898039703d7315f0f3431c860123338ec3be0f6
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ include/uapi/linux/if_packet.h |  3 +++
++ net/packet/af_packet.c         | 34 +++++++++++++++++++++++++++-------
++ net/packet/internal.h          |  1 +
++ 3 files changed, 31 insertions(+), 7 deletions(-)
++
++--- a/include/uapi/linux/if_packet.h
+++++ b/include/uapi/linux/if_packet.h
++@@ -32,6 +32,8 @@ struct sockaddr_ll {
++ #define PACKET_KERNEL		7		/* To kernel space	*/
++ /* Unused, PACKET_FASTROUTE and PACKET_LOOPBACK are invisible to user space */
++ #define PACKET_FASTROUTE	6		/* Fastrouted frame	*/
+++#define PACKET_MASK_ANY		0xffffffff	/* mask for packet type bits */
+++
++ 
++ /* Packet socket options */
++ 
++@@ -58,6 +60,7 @@ struct sockaddr_ll {
++ #define PACKET_ROLLOVER_STATS		21
++ #define PACKET_FANOUT_DATA		22
++ #define PACKET_IGNORE_OUTGOING		23
+++#define PACKET_RECV_TYPE		24
++ 
++ #define PACKET_FANOUT_HASH		0
++ #define PACKET_FANOUT_LB		1
++--- a/net/packet/af_packet.c
+++++ b/net/packet/af_packet.c
++@@ -1797,6 +1797,7 @@ static int packet_rcv_spkt(struct sk_buf
++ {
++ 	struct sock *sk;
++ 	struct sockaddr_pkt *spkt;
+++	struct packet_sock *po;
++ 
++ 	/*
++ 	 *	When we registered the protocol we saved the socket in the data
++@@ -1804,6 +1805,7 @@ static int packet_rcv_spkt(struct sk_buf
++ 	 */
++ 
++ 	sk = pt->af_packet_priv;
+++	po = pkt_sk(sk);
++ 
++ 	/*
++ 	 *	Yank back the headers [hope the device set this
++@@ -1816,7 +1818,7 @@ static int packet_rcv_spkt(struct sk_buf
++ 	 *	so that this procedure is noop.
++ 	 */
++ 
++-	if (skb->pkt_type == PACKET_LOOPBACK)
+++	if (!(po->pkt_type & (1 << skb->pkt_type)))
++ 		goto out;
++ 
++ 	if (!net_eq(dev_net(dev), sock_net(sk)))
++@@ -2054,12 +2056,12 @@ static int packet_rcv(struct sk_buff *sk
++ 	unsigned int snaplen, res;
++ 	bool is_drop_n_account = false;
++ 
++-	if (skb->pkt_type == PACKET_LOOPBACK)
++-		goto drop;
++-
++ 	sk = pt->af_packet_priv;
++ 	po = pkt_sk(sk);
++ 
+++	if (!(po->pkt_type & (1 << skb->pkt_type)))
+++		goto drop;
+++
++ 	if (!net_eq(dev_net(dev), sock_net(sk)))
++ 		goto drop;
++ 
++@@ -2185,12 +2187,12 @@ static int tpacket_rcv(struct sk_buff *s
++ 	BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h2)) != 32);
++ 	BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h3)) != 48);
++ 
++-	if (skb->pkt_type == PACKET_LOOPBACK)
++-		goto drop;
++-
++ 	sk = pt->af_packet_priv;
++ 	po = pkt_sk(sk);
++ 
+++	if (!(po->pkt_type & (1 << skb->pkt_type)))
+++		goto drop;
+++
++ 	if (!net_eq(dev_net(dev), sock_net(sk)))
++ 		goto drop;
++ 
++@@ -3289,6 +3291,7 @@ static int packet_create(struct net *net
++ 	mutex_init(&po->pg_vec_lock);
++ 	po->rollover = NULL;
++ 	po->prot_hook.func = packet_rcv;
+++	po->pkt_type = PACKET_MASK_ANY & ~(1 << PACKET_LOOPBACK);
++ 
++ 	if (sock->type == SOCK_PACKET)
++ 		po->prot_hook.func = packet_rcv_spkt;
++@@ -3924,6 +3927,16 @@ packet_setsockopt(struct socket *sock, i
++ 		po->xmit = val ? packet_direct_xmit : dev_queue_xmit;
++ 		return 0;
++ 	}
+++        case PACKET_RECV_TYPE:
+++        {
+++                unsigned int val;
+++                if (optlen != sizeof(val))
+++                        return -EINVAL;
+++                if (copy_from_user(&val, optval, sizeof(val)))
+++                        return -EFAULT;
+++                po->pkt_type = val & ~BIT(PACKET_LOOPBACK);
+++                return 0;
+++        }
++ 	default:
++ 		return -ENOPROTOOPT;
++ 	}
++@@ -3980,6 +3993,13 @@ static int packet_getsockopt(struct sock
++ 	case PACKET_VNET_HDR:
++ 		val = po->has_vnet_hdr;
++ 		break;
+++	case PACKET_RECV_TYPE:
+++		if (len > sizeof(unsigned int))
+++			len = sizeof(unsigned int);
+++		val = po->pkt_type;
+++
+++		data = &val;
+++		break;
++ 	case PACKET_VERSION:
++ 		val = po->tp_version;
++ 		break;
++--- a/net/packet/internal.h
+++++ b/net/packet/internal.h
++@@ -136,6 +136,7 @@ struct packet_sock {
++ 	int			(*xmit)(struct sk_buff *skb);
++ 	struct packet_type	prot_hook ____cacheline_aligned_in_smp;
++ 	atomic_t		tp_drops ____cacheline_aligned_in_smp;
+++	unsigned int		pkt_type;
++ };
++ 
++ static struct packet_sock *pkt_sk(struct sock *sk)
+diff --git a/target/linux/generic/pending-5.4/640-netfilter-nf_flow_table-add-hardware-offload-support.patch b/target/linux/generic/pending-5.4/640-netfilter-nf_flow_table-add-hardware-offload-support.patch
+new file mode 100644
+index 0000000000..02600ebed0
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/640-netfilter-nf_flow_table-add-hardware-offload-support.patch
+@@ -0,0 +1,564 @@
++From: Pablo Neira Ayuso <pablo@netfilter.org>
++Date: Thu, 11 Jan 2018 16:32:00 +0100
++Subject: [PATCH] netfilter: nf_flow_table: add hardware offload support
++
++This patch adds the infrastructure to offload flows to hardware, in case
++the nic/switch comes with built-in flow tables capabilities.
++
++If the hardware comes with no hardware flow tables or they have
++limitations in terms of features, the existing infrastructure falls back
++to the software flow table implementation.
++
++The software flow table garbage collector skips entries that resides in
++the hardware, so the hardware will be responsible for releasing this
++flow table entry too via flow_offload_dead().
++
++Hardware configuration, either to add or to delete entries, is done from
++the hardware offload workqueue, to ensure this is done from user context
++given that we may sleep when grabbing the mdio mutex.
++
++Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
++---
++ create mode 100644 net/netfilter/nf_flow_table_hw.c
++
++--- a/include/linux/netdevice.h
+++++ b/include/linux/netdevice.h
++@@ -928,6 +928,13 @@ struct devlink;
++ struct tlsdev_ops;
++ 
++ 
+++struct flow_offload;
+++
+++enum flow_offload_type {
+++	FLOW_OFFLOAD_ADD	= 0,
+++	FLOW_OFFLOAD_DEL,
+++};
+++
++ /*
++  * This structure defines the management hooks for network devices.
++  * The following hooks can be defined; unless noted otherwise, they are
++@@ -1160,6 +1167,10 @@ struct tlsdev_ops;
++  * int (*ndo_bridge_dellink)(struct net_device *dev, struct nlmsghdr *nlh,
++  *			     u16 flags);
++  *
+++ * int (*ndo_flow_offload)(enum flow_offload_type type,
+++ *			   struct flow_offload *flow);
+++ *	Adds/deletes flow entry to/from net device flowtable.
+++ *
++  * int (*ndo_change_carrier)(struct net_device *dev, bool new_carrier);
++  *	Called to change device carrier. Soft-devices (like dummy, team, etc)
++  *	which do not represent real hardware may define this to allow their
++@@ -1407,6 +1418,8 @@ struct net_device_ops {
++ 	int			(*ndo_bridge_dellink)(struct net_device *dev,
++ 						      struct nlmsghdr *nlh,
++ 						      u16 flags);
+++	int			(*ndo_flow_offload)(enum flow_offload_type type,
+++						    struct flow_offload *flow);
++ 	int			(*ndo_change_carrier)(struct net_device *dev,
++ 						      bool new_carrier);
++ 	int			(*ndo_get_phys_port_id)(struct net_device *dev,
++--- a/include/net/netfilter/nf_flow_table.h
+++++ b/include/net/netfilter/nf_flow_table.h
++@@ -21,11 +21,17 @@ struct nf_flowtable_type {
++ 	struct module			*owner;
++ };
++ 
+++enum nf_flowtable_flags {
+++	NF_FLOWTABLE_F_HW		= 0x1,
+++};
+++
++ struct nf_flowtable {
++ 	struct list_head		list;
++ 	struct rhashtable		rhashtable;
++ 	const struct nf_flowtable_type	*type;
+++	u32				flags;
++ 	struct delayed_work		gc_work;
+++	possible_net_t			ft_net;
++ };
++ 
++ enum flow_offload_tuple_dir {
++@@ -68,6 +74,7 @@ struct flow_offload_tuple_rhash {
++ #define FLOW_OFFLOAD_DNAT	0x2
++ #define FLOW_OFFLOAD_DYING	0x4
++ #define FLOW_OFFLOAD_TEARDOWN	0x8
+++#define FLOW_OFFLOAD_HW		0x10
++ 
++ struct flow_offload {
++ 	struct flow_offload_tuple_rhash		tuplehash[FLOW_OFFLOAD_DIR_MAX];
++@@ -120,6 +127,22 @@ unsigned int nf_flow_offload_ip_hook(voi
++ unsigned int nf_flow_offload_ipv6_hook(void *priv, struct sk_buff *skb,
++ 				       const struct nf_hook_state *state);
++ 
+++void nf_flow_offload_hw_add(struct net *net, struct flow_offload *flow,
+++			    struct nf_conn *ct);
+++void nf_flow_offload_hw_del(struct net *net, struct flow_offload *flow);
+++
+++struct nf_flow_table_hw {
+++	struct module	*owner;
+++	void		(*add)(struct net *net, struct flow_offload *flow,
+++			       struct nf_conn *ct);
+++	void		(*del)(struct net *net, struct flow_offload *flow);
+++};
+++
+++int nf_flow_table_hw_register(const struct nf_flow_table_hw *offload);
+++void nf_flow_table_hw_unregister(const struct nf_flow_table_hw *offload);
+++
+++extern struct work_struct nf_flow_offload_hw_work;
+++
++ #define MODULE_ALIAS_NF_FLOWTABLE(family)	\
++ 	MODULE_ALIAS("nf-flowtable-" __stringify(family))
++ 
++--- a/include/uapi/linux/netfilter/nf_tables.h
+++++ b/include/uapi/linux/netfilter/nf_tables.h
++@@ -1516,6 +1516,7 @@ enum nft_object_attributes {
++  * @NFTA_FLOWTABLE_HOOK: netfilter hook configuration(NLA_U32)
++  * @NFTA_FLOWTABLE_USE: number of references to this flow table (NLA_U32)
++  * @NFTA_FLOWTABLE_HANDLE: object handle (NLA_U64)
+++ * @NFTA_FLOWTABLE_FLAGS: flags (NLA_U32)
++  */
++ enum nft_flowtable_attributes {
++ 	NFTA_FLOWTABLE_UNSPEC,
++@@ -1525,6 +1526,7 @@ enum nft_flowtable_attributes {
++ 	NFTA_FLOWTABLE_USE,
++ 	NFTA_FLOWTABLE_HANDLE,
++ 	NFTA_FLOWTABLE_PAD,
+++	NFTA_FLOWTABLE_FLAGS,
++ 	__NFTA_FLOWTABLE_MAX
++ };
++ #define NFTA_FLOWTABLE_MAX	(__NFTA_FLOWTABLE_MAX - 1)
++--- a/net/netfilter/Kconfig
+++++ b/net/netfilter/Kconfig
++@@ -711,6 +711,15 @@ config NF_FLOW_TABLE
++ 
++ 	  To compile it as a module, choose M here.
++ 
+++config NF_FLOW_TABLE_HW
+++	tristate "Netfilter flow table hardware offload module"
+++	depends on NF_FLOW_TABLE
+++	help
+++	  This option adds hardware offload support for the flow table core
+++	  infrastructure.
+++
+++	  To compile it as a module, choose M here.
+++
++ config NETFILTER_XTABLES
++ 	tristate "Netfilter Xtables support (required for ip_tables)"
++ 	default m if NETFILTER_ADVANCED=n
++--- a/net/netfilter/Makefile
+++++ b/net/netfilter/Makefile
++@@ -123,6 +123,7 @@ obj-$(CONFIG_NF_FLOW_TABLE)	+= nf_flow_t
++ nf_flow_table-objs := nf_flow_table_core.o nf_flow_table_ip.o
++ 
++ obj-$(CONFIG_NF_FLOW_TABLE_INET) += nf_flow_table_inet.o
+++obj-$(CONFIG_NF_FLOW_TABLE_HW)	+= nf_flow_table_hw.o
++ 
++ # generic X tables
++ obj-$(CONFIG_NETFILTER_XTABLES) += x_tables.o xt_tcpudp.o
++--- a/net/netfilter/nf_flow_table_core.c
+++++ b/net/netfilter/nf_flow_table_core.c
++@@ -248,10 +248,16 @@ static inline bool nf_flow_has_expired(c
++ 	return nf_flow_timeout_delta(flow->timeout) <= 0;
++ }
++ 
+++static inline bool nf_flow_in_hw(const struct flow_offload *flow)
+++{
+++	return flow->flags & FLOW_OFFLOAD_HW;
+++}
+++
++ static void flow_offload_del(struct nf_flowtable *flow_table,
++ 			     struct flow_offload *flow)
++ {
++ 	struct flow_offload_entry *e;
+++	struct net *net = read_pnet(&flow_table->ft_net);
++ 
++ 	rhashtable_remove_fast(&flow_table->rhashtable,
++ 			       &flow->tuplehash[FLOW_OFFLOAD_DIR_ORIGINAL].node,
++@@ -271,6 +277,9 @@ static void flow_offload_del(struct nf_f
++ 	if (!(flow->flags & FLOW_OFFLOAD_TEARDOWN))
++ 		flow_offload_fixup_ct_state(e->ct);
++ 
+++	if (nf_flow_in_hw(flow))
+++		nf_flow_offload_hw_del(net, flow);
+++
++ 	flow_offload_free(flow);
++ }
++ 
++@@ -361,6 +370,9 @@ static void nf_flow_offload_gc_step(stru
++ 	if (!teardown)
++ 		nf_ct_offload_timeout(flow);
++ 
+++	if (nf_flow_in_hw(flow) && !teardown)
+++		return;
+++
++ 	if (nf_flow_has_expired(flow) || teardown)
++ 		flow_offload_del(flow_table, flow);
++ }
++@@ -490,10 +502,43 @@ int nf_flow_dnat_port(const struct flow_
++ }
++ EXPORT_SYMBOL_GPL(nf_flow_dnat_port);
++ 
+++static const struct nf_flow_table_hw __rcu *nf_flow_table_hw_hook __read_mostly;
+++
+++static int nf_flow_offload_hw_init(struct nf_flowtable *flow_table)
+++{
+++	const struct nf_flow_table_hw *offload;
+++
+++	if (!rcu_access_pointer(nf_flow_table_hw_hook))
+++		request_module("nf-flow-table-hw");
+++
+++	rcu_read_lock();
+++	offload = rcu_dereference(nf_flow_table_hw_hook);
+++	if (!offload)
+++		goto err_no_hw_offload;
+++
+++	if (!try_module_get(offload->owner))
+++		goto err_no_hw_offload;
+++
+++	rcu_read_unlock();
+++
+++	return 0;
+++
+++err_no_hw_offload:
+++	rcu_read_unlock();
+++
+++	return -EOPNOTSUPP;
+++}
+++
++ int nf_flow_table_init(struct nf_flowtable *flowtable)
++ {
++ 	int err;
++ 
+++	if (flowtable->flags & NF_FLOWTABLE_F_HW) {
+++		err = nf_flow_offload_hw_init(flowtable);
+++		if (err)
+++			return err;
+++	}
+++
++ 	INIT_DEFERRABLE_WORK(&flowtable->gc_work, nf_flow_offload_work_gc);
++ 
++ 	err = rhashtable_init(&flowtable->rhashtable,
++@@ -534,6 +579,8 @@ static void nf_flow_table_iterate_cleanu
++ {
++ 	nf_flow_table_iterate(flowtable, nf_flow_table_do_cleanup, dev);
++ 	flush_delayed_work(&flowtable->gc_work);
+++	if (flowtable->flags & NF_FLOWTABLE_F_HW)
+++		flush_work(&nf_flow_offload_hw_work);
++ }
++ 
++ void nf_flow_table_cleanup(struct net_device *dev)
++@@ -547,6 +594,26 @@ void nf_flow_table_cleanup(struct net_de
++ }
++ EXPORT_SYMBOL_GPL(nf_flow_table_cleanup);
++ 
+++struct work_struct nf_flow_offload_hw_work;
+++EXPORT_SYMBOL_GPL(nf_flow_offload_hw_work);
+++
+++/* Give the hardware workqueue the chance to remove entries from hardware.*/
+++static void nf_flow_offload_hw_free(struct nf_flowtable *flowtable)
+++{
+++	const struct nf_flow_table_hw *offload;
+++
+++	flush_work(&nf_flow_offload_hw_work);
+++
+++	rcu_read_lock();
+++	offload = rcu_dereference(nf_flow_table_hw_hook);
+++	if (!offload) {
+++		rcu_read_unlock();
+++		return;
+++	}
+++	module_put(offload->owner);
+++	rcu_read_unlock();
+++}
+++
++ void nf_flow_table_free(struct nf_flowtable *flow_table)
++ {
++ 	mutex_lock(&flowtable_lock);
++@@ -556,9 +623,58 @@ void nf_flow_table_free(struct nf_flowta
++ 	nf_flow_table_iterate(flow_table, nf_flow_table_do_cleanup, NULL);
++ 	nf_flow_table_iterate(flow_table, nf_flow_offload_gc_step, flow_table);
++ 	rhashtable_destroy(&flow_table->rhashtable);
+++	if (flow_table->flags & NF_FLOWTABLE_F_HW)
+++		nf_flow_offload_hw_free(flow_table);
++ }
++ EXPORT_SYMBOL_GPL(nf_flow_table_free);
++ 
+++/* Must be called from user context. */
+++void nf_flow_offload_hw_add(struct net *net, struct flow_offload *flow,
+++			    struct nf_conn *ct)
+++{
+++	const struct nf_flow_table_hw *offload;
+++
+++	rcu_read_lock();
+++	offload = rcu_dereference(nf_flow_table_hw_hook);
+++	if (offload)
+++		offload->add(net, flow, ct);
+++	rcu_read_unlock();
+++}
+++EXPORT_SYMBOL_GPL(nf_flow_offload_hw_add);
+++
+++/* Must be called from user context. */
+++void nf_flow_offload_hw_del(struct net *net, struct flow_offload *flow)
+++{
+++	const struct nf_flow_table_hw *offload;
+++
+++	rcu_read_lock();
+++	offload = rcu_dereference(nf_flow_table_hw_hook);
+++	if (offload)
+++		offload->del(net, flow);
+++	rcu_read_unlock();
+++}
+++EXPORT_SYMBOL_GPL(nf_flow_offload_hw_del);
+++
+++int nf_flow_table_hw_register(const struct nf_flow_table_hw *offload)
+++{
+++	if (rcu_access_pointer(nf_flow_table_hw_hook))
+++		return -EBUSY;
+++
+++	rcu_assign_pointer(nf_flow_table_hw_hook, offload);
+++
+++	return 0;
+++}
+++EXPORT_SYMBOL_GPL(nf_flow_table_hw_register);
+++
+++void nf_flow_table_hw_unregister(const struct nf_flow_table_hw *offload)
+++{
+++	WARN_ON(rcu_access_pointer(nf_flow_table_hw_hook) != offload);
+++	rcu_assign_pointer(nf_flow_table_hw_hook, NULL);
+++
+++	synchronize_rcu();
+++}
+++EXPORT_SYMBOL_GPL(nf_flow_table_hw_unregister);
+++
++ static int nf_flow_table_netdev_event(struct notifier_block *this,
++ 				      unsigned long event, void *ptr)
++ {
++--- /dev/null
+++++ b/net/netfilter/nf_flow_table_hw.c
++@@ -0,0 +1,169 @@
+++#include <linux/kernel.h>
+++#include <linux/init.h>
+++#include <linux/module.h>
+++#include <linux/netfilter.h>
+++#include <linux/rhashtable.h>
+++#include <linux/netdevice.h>
+++#include <net/netfilter/nf_flow_table.h>
+++#include <net/netfilter/nf_conntrack.h>
+++#include <net/netfilter/nf_conntrack_core.h>
+++#include <net/netfilter/nf_conntrack_tuple.h>
+++
+++static DEFINE_SPINLOCK(flow_offload_hw_pending_list_lock);
+++static LIST_HEAD(flow_offload_hw_pending_list);
+++
+++static DEFINE_MUTEX(nf_flow_offload_hw_mutex);
+++
+++struct flow_offload_hw {
+++	struct list_head	list;
+++	enum flow_offload_type	type;
+++	struct flow_offload	*flow;
+++	struct nf_conn		*ct;
+++	possible_net_t		flow_hw_net;
+++};
+++
+++static int do_flow_offload_hw(struct net *net, struct flow_offload *flow,
+++			      int type)
+++{
+++	struct net_device *indev;
+++	int ret, ifindex;
+++
+++	ifindex = flow->tuplehash[FLOW_OFFLOAD_DIR_ORIGINAL].tuple.iifidx;
+++	indev = dev_get_by_index(net, ifindex);
+++	if (WARN_ON(!indev))
+++		return 0;
+++
+++	mutex_lock(&nf_flow_offload_hw_mutex);
+++	ret = indev->netdev_ops->ndo_flow_offload(type, flow);
+++	mutex_unlock(&nf_flow_offload_hw_mutex);
+++
+++	dev_put(indev);
+++
+++	return ret;
+++}
+++
+++static void flow_offload_hw_work_add(struct flow_offload_hw *offload)
+++{
+++	struct net *net;
+++	int ret;
+++
+++	if (nf_ct_is_dying(offload->ct))
+++		return;
+++
+++	net = read_pnet(&offload->flow_hw_net);
+++	ret = do_flow_offload_hw(net, offload->flow, FLOW_OFFLOAD_ADD);
+++	if (ret >= 0)
+++		offload->flow->flags |= FLOW_OFFLOAD_HW;
+++}
+++
+++static void flow_offload_hw_work_del(struct flow_offload_hw *offload)
+++{
+++	struct net *net = read_pnet(&offload->flow_hw_net);
+++
+++	do_flow_offload_hw(net, offload->flow, FLOW_OFFLOAD_DEL);
+++}
+++
+++static void flow_offload_hw_work(struct work_struct *work)
+++{
+++	struct flow_offload_hw *offload, *next;
+++	LIST_HEAD(hw_offload_pending);
+++
+++	spin_lock_bh(&flow_offload_hw_pending_list_lock);
+++	list_replace_init(&flow_offload_hw_pending_list, &hw_offload_pending);
+++	spin_unlock_bh(&flow_offload_hw_pending_list_lock);
+++
+++	list_for_each_entry_safe(offload, next, &hw_offload_pending, list) {
+++		switch (offload->type) {
+++		case FLOW_OFFLOAD_ADD:
+++			flow_offload_hw_work_add(offload);
+++			break;
+++		case FLOW_OFFLOAD_DEL:
+++			flow_offload_hw_work_del(offload);
+++			break;
+++		}
+++		if (offload->ct)
+++			nf_conntrack_put(&offload->ct->ct_general);
+++		list_del(&offload->list);
+++		kfree(offload);
+++	}
+++}
+++
+++static void flow_offload_queue_work(struct flow_offload_hw *offload)
+++{
+++	spin_lock_bh(&flow_offload_hw_pending_list_lock);
+++	list_add_tail(&offload->list, &flow_offload_hw_pending_list);
+++	spin_unlock_bh(&flow_offload_hw_pending_list_lock);
+++
+++	schedule_work(&nf_flow_offload_hw_work);
+++}
+++
+++static void flow_offload_hw_add(struct net *net, struct flow_offload *flow,
+++				struct nf_conn *ct)
+++{
+++	struct flow_offload_hw *offload;
+++
+++	offload = kmalloc(sizeof(struct flow_offload_hw), GFP_ATOMIC);
+++	if (!offload)
+++		return;
+++
+++	nf_conntrack_get(&ct->ct_general);
+++	offload->type = FLOW_OFFLOAD_ADD;
+++	offload->ct = ct;
+++	offload->flow = flow;
+++	write_pnet(&offload->flow_hw_net, net);
+++
+++	flow_offload_queue_work(offload);
+++}
+++
+++static void flow_offload_hw_del(struct net *net, struct flow_offload *flow)
+++{
+++	struct flow_offload_hw *offload;
+++
+++	offload = kmalloc(sizeof(struct flow_offload_hw), GFP_ATOMIC);
+++	if (!offload)
+++		return;
+++
+++	offload->type = FLOW_OFFLOAD_DEL;
+++	offload->ct = NULL;
+++	offload->flow = flow;
+++	write_pnet(&offload->flow_hw_net, net);
+++
+++	flow_offload_queue_work(offload);
+++}
+++
+++static const struct nf_flow_table_hw flow_offload_hw = {
+++	.add	= flow_offload_hw_add,
+++	.del	= flow_offload_hw_del,
+++	.owner	= THIS_MODULE,
+++};
+++
+++static int __init nf_flow_table_hw_module_init(void)
+++{
+++	INIT_WORK(&nf_flow_offload_hw_work, flow_offload_hw_work);
+++	nf_flow_table_hw_register(&flow_offload_hw);
+++
+++	return 0;
+++}
+++
+++static void __exit nf_flow_table_hw_module_exit(void)
+++{
+++	struct flow_offload_hw *offload, *next;
+++	LIST_HEAD(hw_offload_pending);
+++
+++	nf_flow_table_hw_unregister(&flow_offload_hw);
+++	cancel_work_sync(&nf_flow_offload_hw_work);
+++
+++	list_for_each_entry_safe(offload, next, &hw_offload_pending, list) {
+++		if (offload->ct)
+++			nf_conntrack_put(&offload->ct->ct_general);
+++		list_del(&offload->list);
+++		kfree(offload);
+++	}
+++}
+++
+++module_init(nf_flow_table_hw_module_init);
+++module_exit(nf_flow_table_hw_module_exit);
+++
+++MODULE_LICENSE("GPL");
+++MODULE_AUTHOR("Pablo Neira Ayuso <pablo@netfilter.org>");
+++MODULE_ALIAS("nf-flow-table-hw");
++--- a/net/netfilter/nf_tables_api.c
+++++ b/net/netfilter/nf_tables_api.c
++@@ -5743,6 +5743,13 @@ static int nf_tables_flowtable_parse_hoo
++ 	if (err < 0)
++ 		return err;
++ 
+++	for (i = 0; i < n; i++) {
+++		if (flowtable->data.flags & NF_FLOWTABLE_F_HW &&
+++		    !dev_array[i]->netdev_ops->ndo_flow_offload) {
+++			return -EOPNOTSUPP;
+++		}
+++	}
+++
++ 	ops = kcalloc(n, sizeof(struct nf_hook_ops), GFP_KERNEL);
++ 	if (!ops)
++ 		return -ENOMEM;
++@@ -5873,10 +5880,19 @@ static int nf_tables_newflowtable(struct
++ 	}
++ 
++ 	flowtable->data.type = type;
+++	write_pnet(&flowtable->data.ft_net, net);
+++
++ 	err = type->init(&flowtable->data);
++ 	if (err < 0)
++ 		goto err3;
++ 
+++	if (nla[NFTA_FLOWTABLE_FLAGS]) {
+++		flowtable->data.flags =
+++			ntohl(nla_get_be32(nla[NFTA_FLOWTABLE_FLAGS]));
+++		if (flowtable->data.flags & ~NF_FLOWTABLE_F_HW)
+++			goto err4;
+++	}
+++
++ 	err = nf_tables_flowtable_parse_hook(&ctx, nla[NFTA_FLOWTABLE_HOOK],
++ 					     flowtable);
++ 	if (err < 0)
++@@ -6002,7 +6018,8 @@ static int nf_tables_fill_flowtable_info
++ 	    nla_put_string(skb, NFTA_FLOWTABLE_NAME, flowtable->name) ||
++ 	    nla_put_be32(skb, NFTA_FLOWTABLE_USE, htonl(flowtable->use)) ||
++ 	    nla_put_be64(skb, NFTA_FLOWTABLE_HANDLE, cpu_to_be64(flowtable->handle),
++-			 NFTA_FLOWTABLE_PAD))
+++			 NFTA_FLOWTABLE_PAD) ||
+++	    nla_put_be32(skb, NFTA_FLOWTABLE_FLAGS, htonl(flowtable->data.flags)))
++ 		goto nla_put_failure;
++ 
++ 	nest = nla_nest_start_noflag(skb, NFTA_FLOWTABLE_HOOK);
++--- a/net/netfilter/nft_flow_offload.c
+++++ b/net/netfilter/nft_flow_offload.c
++@@ -128,6 +128,9 @@ static void nft_flow_offload_eval(const
++ 	if (ret < 0)
++ 		goto err_flow_add;
++ 
+++	if (flowtable->flags & NF_FLOWTABLE_F_HW)
+++		nf_flow_offload_hw_add(nft_net(pkt), flow, ct);
+++
++ 	dst_release(route.tuple[!dir].dst);
++ 	return;
++ 
+diff --git a/target/linux/generic/pending-5.4/641-netfilter-nf_flow_table-support-hw-offload-through-v.patch b/target/linux/generic/pending-5.4/641-netfilter-nf_flow_table-support-hw-offload-through-v.patch
+new file mode 100644
+index 0000000000..9f113c7108
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/641-netfilter-nf_flow_table-support-hw-offload-through-v.patch
+@@ -0,0 +1,306 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Thu, 15 Mar 2018 20:46:31 +0100
++Subject: [PATCH] netfilter: nf_flow_table: support hw offload through
++ virtual interfaces
++
++There are hardware offload devices that support offloading VLANs and
++PPPoE devices. Additionally, it is useful to be able to offload packets
++routed through bridge interfaces as well.
++Add support for finding the path to the offload device through these
++virtual interfaces, while collecting useful parameters for the offload
++device, like VLAN ID/protocol, PPPoE session and Ethernet MAC address.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/include/linux/netdevice.h
+++++ b/include/linux/netdevice.h
++@@ -929,6 +929,7 @@ struct tlsdev_ops;
++ 
++ 
++ struct flow_offload;
+++struct flow_offload_hw_path;
++ 
++ enum flow_offload_type {
++ 	FLOW_OFFLOAD_ADD	= 0,
++@@ -1167,8 +1168,15 @@ enum flow_offload_type {
++  * int (*ndo_bridge_dellink)(struct net_device *dev, struct nlmsghdr *nlh,
++  *			     u16 flags);
++  *
+++ * int (*ndo_flow_offload_check)(struct flow_offload_hw_path *path);
+++ *	For virtual devices like bridges, vlan, and pppoe, fill in the
+++ *	underlying network device that can be used for offloading connections.
+++ *	Return an error if offloading is not supported.
+++ *
++  * int (*ndo_flow_offload)(enum flow_offload_type type,
++- *			   struct flow_offload *flow);
+++ *			   struct flow_offload *flow,
+++ *			   struct flow_offload_hw_path *src,
+++ *			   struct flow_offload_hw_path *dest);
++  *	Adds/deletes flow entry to/from net device flowtable.
++  *
++  * int (*ndo_change_carrier)(struct net_device *dev, bool new_carrier);
++@@ -1418,8 +1426,11 @@ struct net_device_ops {
++ 	int			(*ndo_bridge_dellink)(struct net_device *dev,
++ 						      struct nlmsghdr *nlh,
++ 						      u16 flags);
+++	int			(*ndo_flow_offload_check)(struct flow_offload_hw_path *path);
++ 	int			(*ndo_flow_offload)(enum flow_offload_type type,
++-						    struct flow_offload *flow);
+++						    struct flow_offload *flow,
+++						    struct flow_offload_hw_path *src,
+++						    struct flow_offload_hw_path *dest);
++ 	int			(*ndo_change_carrier)(struct net_device *dev,
++ 						      bool new_carrier);
++ 	int			(*ndo_get_phys_port_id)(struct net_device *dev,
++--- a/include/net/netfilter/nf_flow_table.h
+++++ b/include/net/netfilter/nf_flow_table.h
++@@ -85,6 +85,21 @@ struct flow_offload {
++ 	};
++ };
++ 
+++#define FLOW_OFFLOAD_PATH_ETHERNET	BIT(0)
+++#define FLOW_OFFLOAD_PATH_VLAN		BIT(1)
+++#define FLOW_OFFLOAD_PATH_PPPOE		BIT(2)
+++
+++struct flow_offload_hw_path {
+++	struct net_device *dev;
+++	u32 flags;
+++
+++	u8 eth_src[ETH_ALEN];
+++	u8 eth_dest[ETH_ALEN];
+++	u16 vlan_proto;
+++	u16 vlan_id;
+++	u16 pppoe_sid;
+++};
+++
++ #define NF_FLOW_TIMEOUT (30 * HZ)
++ 
++ struct nf_flow_route {
++--- a/net/netfilter/nf_flow_table_hw.c
+++++ b/net/netfilter/nf_flow_table_hw.c
++@@ -19,48 +19,77 @@ struct flow_offload_hw {
++ 	enum flow_offload_type	type;
++ 	struct flow_offload	*flow;
++ 	struct nf_conn		*ct;
++-	possible_net_t		flow_hw_net;
+++
+++	struct flow_offload_hw_path src;
+++	struct flow_offload_hw_path dest;
++ };
++ 
++-static int do_flow_offload_hw(struct net *net, struct flow_offload *flow,
++-			      int type)
+++static void flow_offload_check_ethernet(struct flow_offload_tuple *tuple,
+++					struct dst_entry *dst,
+++					struct flow_offload_hw_path *path)
++ {
++-	struct net_device *indev;
++-	int ret, ifindex;
+++	struct net_device *dev = path->dev;
+++	struct neighbour *n;
++ 
++-	ifindex = flow->tuplehash[FLOW_OFFLOAD_DIR_ORIGINAL].tuple.iifidx;
++-	indev = dev_get_by_index(net, ifindex);
++-	if (WARN_ON(!indev))
++-		return 0;
++-
++-	mutex_lock(&nf_flow_offload_hw_mutex);
++-	ret = indev->netdev_ops->ndo_flow_offload(type, flow);
++-	mutex_unlock(&nf_flow_offload_hw_mutex);
+++	if (dev->type != ARPHRD_ETHER)
+++		return;
++ 
++-	dev_put(indev);
+++	memcpy(path->eth_src, path->dev->dev_addr, ETH_ALEN);
+++	n = dst_neigh_lookup(dst, &tuple->src_v4);
+++	if (!n)
+++		return;
++ 
++-	return ret;
+++	memcpy(path->eth_dest, n->ha, ETH_ALEN);
+++	path->flags |= FLOW_OFFLOAD_PATH_ETHERNET;
+++	neigh_release(n);
++ }
++ 
++-static void flow_offload_hw_work_add(struct flow_offload_hw *offload)
+++static int flow_offload_check_path(struct net *net,
+++				   struct flow_offload_tuple *tuple,
+++				   struct dst_entry *dst,
+++				   struct flow_offload_hw_path *path)
++ {
++-	struct net *net;
++-	int ret;
+++	struct net_device *dev;
++ 
++-	if (nf_ct_is_dying(offload->ct))
++-		return;
+++	dev = dev_get_by_index_rcu(net, tuple->iifidx);
+++	if (!dev)
+++		return -ENOENT;
+++
+++	path->dev = dev;
+++	flow_offload_check_ethernet(tuple, dst, path);
++ 
++-	net = read_pnet(&offload->flow_hw_net);
++-	ret = do_flow_offload_hw(net, offload->flow, FLOW_OFFLOAD_ADD);
++-	if (ret >= 0)
++-		offload->flow->flags |= FLOW_OFFLOAD_HW;
+++	if (dev->netdev_ops->ndo_flow_offload_check)
+++		return dev->netdev_ops->ndo_flow_offload_check(path);
+++
+++	return 0;
++ }
++ 
++-static void flow_offload_hw_work_del(struct flow_offload_hw *offload)
+++static int do_flow_offload_hw(struct flow_offload_hw *offload)
++ {
++-	struct net *net = read_pnet(&offload->flow_hw_net);
+++	struct net_device *src_dev = offload->src.dev;
+++	struct net_device *dest_dev = offload->dest.dev;
+++	int ret;
+++
+++	ret = src_dev->netdev_ops->ndo_flow_offload(offload->type,
+++						    offload->flow,
+++						    &offload->src,
+++						    &offload->dest);
+++
+++	/* restore devices in case the driver mangled them */
+++	offload->src.dev = src_dev;
+++	offload->dest.dev = dest_dev;
++ 
++-	do_flow_offload_hw(net, offload->flow, FLOW_OFFLOAD_DEL);
+++	return ret;
+++}
+++
+++static void flow_offload_hw_free(struct flow_offload_hw *offload)
+++{
+++	dev_put(offload->src.dev);
+++	dev_put(offload->dest.dev);
+++	if (offload->ct)
+++		nf_conntrack_put(&offload->ct->ct_general);
+++	list_del(&offload->list);
+++	kfree(offload);
++ }
++ 
++ static void flow_offload_hw_work(struct work_struct *work)
++@@ -73,18 +102,22 @@ static void flow_offload_hw_work(struct
++ 	spin_unlock_bh(&flow_offload_hw_pending_list_lock);
++ 
++ 	list_for_each_entry_safe(offload, next, &hw_offload_pending, list) {
+++		mutex_lock(&nf_flow_offload_hw_mutex);
++ 		switch (offload->type) {
++ 		case FLOW_OFFLOAD_ADD:
++-			flow_offload_hw_work_add(offload);
+++			if (nf_ct_is_dying(offload->ct))
+++				break;
+++
+++			if (do_flow_offload_hw(offload) >= 0)
+++				offload->flow->flags |= FLOW_OFFLOAD_HW;
++ 			break;
++ 		case FLOW_OFFLOAD_DEL:
++-			flow_offload_hw_work_del(offload);
+++			do_flow_offload_hw(offload);
++ 			break;
++ 		}
++-		if (offload->ct)
++-			nf_conntrack_put(&offload->ct->ct_general);
++-		list_del(&offload->list);
++-		kfree(offload);
+++		mutex_unlock(&nf_flow_offload_hw_mutex);
+++
+++		flow_offload_hw_free(offload);
++ 	}
++ }
++ 
++@@ -97,20 +130,56 @@ static void flow_offload_queue_work(stru
++ 	schedule_work(&nf_flow_offload_hw_work);
++ }
++ 
+++static struct flow_offload_hw *
+++flow_offload_hw_prepare(struct net *net, struct flow_offload *flow)
+++{
+++	struct flow_offload_hw_path src = {};
+++	struct flow_offload_hw_path dest = {};
+++	struct flow_offload_tuple *tuple_s, *tuple_d;
+++	struct flow_offload_hw *offload = NULL;
+++
+++	rcu_read_lock_bh();
+++
+++	tuple_s = &flow->tuplehash[FLOW_OFFLOAD_DIR_ORIGINAL].tuple;
+++	tuple_d = &flow->tuplehash[FLOW_OFFLOAD_DIR_REPLY].tuple;
+++
+++	if (flow_offload_check_path(net, tuple_s, tuple_d->dst_cache, &src))
+++		goto out;
+++
+++	if (flow_offload_check_path(net, tuple_d, tuple_s->dst_cache, &dest))
+++		goto out;
+++
+++	if (!src.dev->netdev_ops->ndo_flow_offload)
+++		goto out;
+++
+++	offload = kzalloc(sizeof(struct flow_offload_hw), GFP_ATOMIC);
+++	if (!offload)
+++		goto out;
+++
+++	dev_hold(src.dev);
+++	dev_hold(dest.dev);
+++	offload->src = src;
+++	offload->dest = dest;
+++	offload->flow = flow;
+++
+++out:
+++	rcu_read_unlock_bh();
+++
+++	return offload;
+++}
+++
++ static void flow_offload_hw_add(struct net *net, struct flow_offload *flow,
++ 				struct nf_conn *ct)
++ {
++ 	struct flow_offload_hw *offload;
++ 
++-	offload = kmalloc(sizeof(struct flow_offload_hw), GFP_ATOMIC);
+++	offload = flow_offload_hw_prepare(net, flow);
++ 	if (!offload)
++ 		return;
++ 
++ 	nf_conntrack_get(&ct->ct_general);
++ 	offload->type = FLOW_OFFLOAD_ADD;
++ 	offload->ct = ct;
++-	offload->flow = flow;
++-	write_pnet(&offload->flow_hw_net, net);
++ 
++ 	flow_offload_queue_work(offload);
++ }
++@@ -119,14 +188,11 @@ static void flow_offload_hw_del(struct n
++ {
++ 	struct flow_offload_hw *offload;
++ 
++-	offload = kmalloc(sizeof(struct flow_offload_hw), GFP_ATOMIC);
+++	offload = flow_offload_hw_prepare(net, flow);
++ 	if (!offload)
++ 		return;
++ 
++ 	offload->type = FLOW_OFFLOAD_DEL;
++-	offload->ct = NULL;
++-	offload->flow = flow;
++-	write_pnet(&offload->flow_hw_net, net);
++ 
++ 	flow_offload_queue_work(offload);
++ }
++@@ -153,12 +219,8 @@ static void __exit nf_flow_table_hw_modu
++ 	nf_flow_table_hw_unregister(&flow_offload_hw);
++ 	cancel_work_sync(&nf_flow_offload_hw_work);
++ 
++-	list_for_each_entry_safe(offload, next, &hw_offload_pending, list) {
++-		if (offload->ct)
++-			nf_conntrack_put(&offload->ct->ct_general);
++-		list_del(&offload->list);
++-		kfree(offload);
++-	}
+++	list_for_each_entry_safe(offload, next, &hw_offload_pending, list)
+++		flow_offload_hw_free(offload);
++ }
++ 
++ module_init(nf_flow_table_hw_module_init);
+diff --git a/target/linux/generic/pending-5.4/642-net-8021q-support-hardware-flow-table-offload.patch b/target/linux/generic/pending-5.4/642-net-8021q-support-hardware-flow-table-offload.patch
+new file mode 100644
+index 0000000000..d67cad7159
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/642-net-8021q-support-hardware-flow-table-offload.patch
+@@ -0,0 +1,61 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Thu, 15 Mar 2018 20:49:58 +0100
++Subject: [PATCH] net: 8021q: support hardware flow table offload
++
++Add the VLAN ID and protocol information
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/8021q/vlan_dev.c
+++++ b/net/8021q/vlan_dev.c
++@@ -27,6 +27,11 @@
++ #include <linux/phy.h>
++ #include <net/arp.h>
++ 
+++#if IS_ENABLED(CONFIG_NF_FLOW_TABLE)
+++#include <linux/netfilter.h>
+++#include <net/netfilter/nf_flow_table.h>
+++#endif
+++
++ #include "vlan.h"
++ #include "vlanproc.h"
++ #include <linux/if_vlan.h>
++@@ -744,6 +749,27 @@ static int vlan_dev_get_iflink(const str
++ 	return real_dev->ifindex;
++ }
++ 
+++#if IS_ENABLED(CONFIG_NF_FLOW_TABLE)
+++static int vlan_dev_flow_offload_check(struct flow_offload_hw_path *path)
+++{
+++	struct net_device *dev = path->dev;
+++	struct vlan_dev_priv *vlan = vlan_dev_priv(dev);
+++
+++	if (path->flags & FLOW_OFFLOAD_PATH_VLAN)
+++		return -EEXIST;
+++
+++	path->flags |= FLOW_OFFLOAD_PATH_VLAN;
+++	path->vlan_proto = vlan->vlan_proto;
+++	path->vlan_id = vlan->vlan_id;
+++	path->dev = vlan->real_dev;
+++
+++	if (vlan->real_dev->netdev_ops->ndo_flow_offload_check)
+++		return vlan->real_dev->netdev_ops->ndo_flow_offload_check(path);
+++
+++	return 0;
+++}
+++#endif /* CONFIG_NF_FLOW_TABLE */
+++
++ static const struct ethtool_ops vlan_ethtool_ops = {
++ 	.get_link_ksettings	= vlan_ethtool_get_link_ksettings,
++ 	.get_drvinfo	        = vlan_ethtool_get_drvinfo,
++@@ -782,6 +808,9 @@ static const struct net_device_ops vlan_
++ #endif
++ 	.ndo_fix_features	= vlan_dev_fix_features,
++ 	.ndo_get_iflink		= vlan_dev_get_iflink,
+++#if IS_ENABLED(CONFIG_NF_FLOW_TABLE)
+++	.ndo_flow_offload_check = vlan_dev_flow_offload_check,
+++#endif
++ };
++ 
++ static void vlan_dev_free(struct net_device *dev)
+diff --git a/target/linux/generic/pending-5.4/643-net-bridge-support-hardware-flow-table-offload.patch b/target/linux/generic/pending-5.4/643-net-bridge-support-hardware-flow-table-offload.patch
+new file mode 100644
+index 0000000000..d47482dc67
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/643-net-bridge-support-hardware-flow-table-offload.patch
+@@ -0,0 +1,61 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Thu, 15 Mar 2018 20:50:37 +0100
++Subject: [PATCH] net: bridge: support hardware flow table offload
++
++Look up the real device and pass it on
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/net/bridge/br_device.c
+++++ b/net/bridge/br_device.c
++@@ -14,6 +14,10 @@
++ #include <linux/ethtool.h>
++ #include <linux/list.h>
++ #include <linux/netfilter_bridge.h>
+++#if IS_ENABLED(CONFIG_NF_FLOW_TABLE)
+++#include <linux/netfilter.h>
+++#include <net/netfilter/nf_flow_table.h>
+++#endif
++ 
++ #include <linux/uaccess.h>
++ #include "br_private.h"
++@@ -382,6 +386,28 @@ static const struct ethtool_ops br_ethto
++ 	.get_link	= ethtool_op_get_link,
++ };
++ 
+++#if IS_ENABLED(CONFIG_NF_FLOW_TABLE)
+++static int br_flow_offload_check(struct flow_offload_hw_path *path)
+++{
+++	struct net_device *dev = path->dev;
+++	struct net_bridge *br = netdev_priv(dev);
+++	struct net_bridge_fdb_entry *dst;
+++
+++	if (!(path->flags & FLOW_OFFLOAD_PATH_ETHERNET))
+++		return -EINVAL;
+++
+++	dst = br_fdb_find_rcu(br, path->eth_dest, path->vlan_id);
+++	if (!dst || !dst->dst)
+++		return -ENOENT;
+++
+++	path->dev = dst->dst->dev;
+++	if (path->dev->netdev_ops->ndo_flow_offload_check)
+++		return path->dev->netdev_ops->ndo_flow_offload_check(path);
+++
+++	return 0;
+++}
+++#endif /* CONFIG_NF_FLOW_TABLE */
+++
++ static const struct net_device_ops br_netdev_ops = {
++ 	.ndo_open		 = br_dev_open,
++ 	.ndo_stop		 = br_dev_stop,
++@@ -410,6 +436,9 @@ static const struct net_device_ops br_ne
++ 	.ndo_bridge_setlink	 = br_setlink,
++ 	.ndo_bridge_dellink	 = br_dellink,
++ 	.ndo_features_check	 = passthru_features_check,
+++#if IS_ENABLED(CONFIG_NF_FLOW_TABLE)
+++	.ndo_flow_offload_check	 = br_flow_offload_check,
+++#endif
++ };
++ 
++ static struct device_type br_type = {
+diff --git a/target/linux/generic/pending-5.4/644-net-pppoe-support-hardware-flow-table-offload.patch b/target/linux/generic/pending-5.4/644-net-pppoe-support-hardware-flow-table-offload.patch
+new file mode 100644
+index 0000000000..1eb6a83337
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/644-net-pppoe-support-hardware-flow-table-offload.patch
+@@ -0,0 +1,125 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Thu, 15 Mar 2018 21:15:00 +0100
++Subject: [PATCH] net: pppoe: support hardware flow table offload
++
++Pass on the PPPoE session ID and the remote MAC address
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/net/ppp/ppp_generic.c
+++++ b/drivers/net/ppp/ppp_generic.c
++@@ -53,6 +53,11 @@
++ #include <net/net_namespace.h>
++ #include <net/netns/generic.h>
++ 
+++#if IS_ENABLED(CONFIG_NF_FLOW_TABLE)
+++#include <linux/netfilter.h>
+++#include <net/netfilter/nf_flow_table.h>
+++#endif
+++
++ #define PPP_VERSION	"2.4.2"
++ 
++ /*
++@@ -1373,12 +1378,37 @@ static void ppp_dev_priv_destructor(stru
++ 		ppp_destroy_interface(ppp);
++ }
++ 
+++#if IS_ENABLED(CONFIG_NF_FLOW_TABLE)
+++static int ppp_flow_offload_check(struct flow_offload_hw_path *path)
+++{
+++	struct ppp *ppp = netdev_priv(path->dev);
+++	struct ppp_channel *chan;
+++	struct channel *pch;
+++
+++	if (ppp->flags & SC_MULTILINK)
+++		return -EOPNOTSUPP;
+++
+++	if (list_empty(&ppp->channels))
+++		return -ENODEV;
+++
+++	pch = list_first_entry(&ppp->channels, struct channel, clist);
+++	chan = pch->chan;
+++	if (!chan->ops->flow_offload_check)
+++		return -EOPNOTSUPP;
+++
+++	return chan->ops->flow_offload_check(chan, path);
+++}
+++#endif /* CONFIG_NF_FLOW_TABLE */
+++
++ static const struct net_device_ops ppp_netdev_ops = {
++ 	.ndo_init	 = ppp_dev_init,
++ 	.ndo_uninit      = ppp_dev_uninit,
++ 	.ndo_start_xmit  = ppp_start_xmit,
++ 	.ndo_do_ioctl    = ppp_net_ioctl,
++ 	.ndo_get_stats64 = ppp_get_stats64,
+++#if IS_ENABLED(CONFIG_NF_FLOW_TABLE)
+++	.ndo_flow_offload_check = ppp_flow_offload_check,
+++#endif
++ };
++ 
++ static struct device_type ppp_type = {
++--- a/drivers/net/ppp/pppoe.c
+++++ b/drivers/net/ppp/pppoe.c
++@@ -73,6 +73,11 @@
++ #include <linux/proc_fs.h>
++ #include <linux/seq_file.h>
++ 
+++#if IS_ENABLED(CONFIG_NF_FLOW_TABLE)
+++#include <linux/netfilter.h>
+++#include <net/netfilter/nf_flow_table.h>
+++#endif
+++
++ #include <linux/nsproxy.h>
++ #include <net/net_namespace.h>
++ #include <net/netns/generic.h>
++@@ -974,8 +979,36 @@ static int pppoe_xmit(struct ppp_channel
++ 	return __pppoe_xmit(sk, skb);
++ }
++ 
+++#if IS_ENABLED(CONFIG_NF_FLOW_TABLE)
+++static int pppoe_flow_offload_check(struct ppp_channel *chan,
+++				    struct flow_offload_hw_path *path)
+++{
+++	struct sock *sk = (struct sock *)chan->private;
+++	struct pppox_sock *po = pppox_sk(sk);
+++	struct net_device *dev = po->pppoe_dev;
+++
+++	if (sock_flag(sk, SOCK_DEAD) ||
+++	    !(sk->sk_state & PPPOX_CONNECTED) || !dev)
+++		return -ENODEV;
+++
+++	path->dev = po->pppoe_dev;
+++	path->flags |= FLOW_OFFLOAD_PATH_PPPOE;
+++	memcpy(path->eth_src, po->pppoe_dev->dev_addr, ETH_ALEN);
+++	memcpy(path->eth_dest, po->pppoe_pa.remote, ETH_ALEN);
+++	path->pppoe_sid = be16_to_cpu(po->num);
+++
+++	if (path->dev->netdev_ops->ndo_flow_offload_check)
+++		return path->dev->netdev_ops->ndo_flow_offload_check(path);
+++
+++	return 0;
+++}
+++#endif /* CONFIG_NF_FLOW_TABLE */
+++
++ static const struct ppp_channel_ops pppoe_chan_ops = {
++ 	.start_xmit = pppoe_xmit,
+++#if IS_ENABLED(CONFIG_NF_FLOW_TABLE)
+++	.flow_offload_check = pppoe_flow_offload_check,
+++#endif
++ };
++ 
++ static int pppoe_recvmsg(struct socket *sock, struct msghdr *m,
++--- a/include/linux/ppp_channel.h
+++++ b/include/linux/ppp_channel.h
++@@ -28,6 +28,10 @@ struct ppp_channel_ops {
++ 	int	(*start_xmit)(struct ppp_channel *, struct sk_buff *);
++ 	/* Handle an ioctl call that has come in via /dev/ppp. */
++ 	int	(*ioctl)(struct ppp_channel *, unsigned int, unsigned long);
+++
+++#if IS_ENABLED(CONFIG_NF_FLOW_TABLE)
+++	int	(*flow_offload_check)(struct ppp_channel *, struct flow_offload_hw_path *);
+++#endif
++ };
++ 
++ struct ppp_channel {
+diff --git a/target/linux/generic/pending-5.4/645-netfilter-nf_flow_table-rework-hardware-offload-time.patch b/target/linux/generic/pending-5.4/645-netfilter-nf_flow_table-rework-hardware-offload-time.patch
+new file mode 100644
+index 0000000000..3c44c29273
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/645-netfilter-nf_flow_table-rework-hardware-offload-time.patch
+@@ -0,0 +1,37 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sun, 25 Mar 2018 21:10:55 +0200
++Subject: [PATCH] netfilter: nf_flow_table: rework hardware offload timeout
++ handling
++
++Some offload implementations send keepalive packets + explicit
++notifications of TCP FIN/RST packets. In this case it is more convenient
++to simply let the driver update flow->timeout handling and use the
++regular flow offload gc step.
++
++For drivers that manage their own lifetime, a separate flag can be set
++to avoid gc timeouts.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/include/net/netfilter/nf_flow_table.h
+++++ b/include/net/netfilter/nf_flow_table.h
++@@ -75,6 +75,7 @@ struct flow_offload_tuple_rhash {
++ #define FLOW_OFFLOAD_DYING	0x4
++ #define FLOW_OFFLOAD_TEARDOWN	0x8
++ #define FLOW_OFFLOAD_HW		0x10
+++#define FLOW_OFFLOAD_KEEP	0x20
++ 
++ struct flow_offload {
++ 	struct flow_offload_tuple_rhash		tuplehash[FLOW_OFFLOAD_DIR_MAX];
++--- a/net/netfilter/nf_flow_table_core.c
+++++ b/net/netfilter/nf_flow_table_core.c
++@@ -370,7 +370,7 @@ static void nf_flow_offload_gc_step(stru
++ 	if (!teardown)
++ 		nf_ct_offload_timeout(flow);
++ 
++-	if (nf_flow_in_hw(flow) && !teardown)
+++	if ((flow->flags & FLOW_OFFLOAD_KEEP) && !teardown)
++ 		return;
++ 
++ 	if (nf_flow_has_expired(flow) || teardown)
+diff --git a/target/linux/generic/pending-5.4/646-netfilter-nf_flow_table-rework-private-driver-data.patch b/target/linux/generic/pending-5.4/646-netfilter-nf_flow_table-rework-private-driver-data.patch
+new file mode 100644
+index 0000000000..159ad8a0aa
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/646-netfilter-nf_flow_table-rework-private-driver-data.patch
+@@ -0,0 +1,25 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 27 Apr 2018 14:42:14 +0200
++Subject: [PATCH] netfilter: nf_flow_table: rework private driver data
++
++Move the timeout out of the union, since it can be shared between the
++driver and the stack. Add a private pointer that the driver can use to
++point to its own data structures
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/include/net/netfilter/nf_flow_table.h
+++++ b/include/net/netfilter/nf_flow_table.h
++@@ -80,9 +80,10 @@ struct flow_offload_tuple_rhash {
++ struct flow_offload {
++ 	struct flow_offload_tuple_rhash		tuplehash[FLOW_OFFLOAD_DIR_MAX];
++ 	u32					flags;
+++	u32					timeout;
++ 	union {
++ 		/* Your private driver data here. */
++-		u32		timeout;
+++		void *priv;
++ 	};
++ };
++ 
+diff --git a/target/linux/generic/pending-5.4/647-net-dsa-support-hardware-flow-table-offload.patch b/target/linux/generic/pending-5.4/647-net-dsa-support-hardware-flow-table-offload.patch
+new file mode 100644
+index 0000000000..91aae5b65c
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/647-net-dsa-support-hardware-flow-table-offload.patch
+@@ -0,0 +1,78 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Thu, 17 Sep 2020 18:41:23 +0200
++Subject: [PATCH] net: dsa: support hardware flow table offload
++
++Look up the master device and the port id
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/include/net/netfilter/nf_flow_table.h
+++++ b/include/net/netfilter/nf_flow_table.h
++@@ -90,6 +90,7 @@ struct flow_offload {
++ #define FLOW_OFFLOAD_PATH_ETHERNET	BIT(0)
++ #define FLOW_OFFLOAD_PATH_VLAN		BIT(1)
++ #define FLOW_OFFLOAD_PATH_PPPOE		BIT(2)
+++#define FLOW_OFFLOAD_PATH_DSA		BIT(3)
++ 
++ struct flow_offload_hw_path {
++ 	struct net_device *dev;
++@@ -100,6 +101,7 @@ struct flow_offload_hw_path {
++ 	u16 vlan_proto;
++ 	u16 vlan_id;
++ 	u16 pppoe_sid;
+++	u16 dsa_port;
++ };
++ 
++ #define NF_FLOW_TIMEOUT (30 * HZ)
++--- a/net/dsa/slave.c
+++++ b/net/dsa/slave.c
++@@ -19,6 +19,10 @@
++ #include <linux/if_bridge.h>
++ #include <linux/netpoll.h>
++ #include <linux/ptp_classify.h>
+++#if IS_ENABLED(CONFIG_NF_FLOW_TABLE)
+++#include <linux/netfilter.h>
+++#include <net/netfilter/nf_flow_table.h>
+++#endif
++ 
++ #include "dsa_priv.h"
++ 
++@@ -1226,6 +1230,27 @@ static struct devlink_port *dsa_slave_ge
++ 	return dp->ds->devlink ? &dp->devlink_port : NULL;
++ }
++ 
+++#if IS_ENABLED(CONFIG_NF_FLOW_TABLE)
+++static int dsa_flow_offload_check(struct flow_offload_hw_path *path)
+++{
+++	struct net_device *dev = path->dev;
+++	struct dsa_port *dp;
+++
+++	if (!(path->flags & FLOW_OFFLOAD_PATH_ETHERNET))
+++		return -EINVAL;
+++
+++	dp = dsa_slave_to_port(dev);
+++	path->dsa_port = dp->index;
+++	path->dev = dsa_slave_to_master(dev);
+++	path->flags |= FLOW_OFFLOAD_PATH_DSA;
+++
+++	if (path->dev->netdev_ops->ndo_flow_offload_check)
+++		return path->dev->netdev_ops->ndo_flow_offload_check(path);
+++
+++	return 0;
+++}
+++#endif /* CONFIG_NF_FLOW_TABLE */
+++
++ static const struct net_device_ops dsa_slave_netdev_ops = {
++ 	.ndo_open	 	= dsa_slave_open,
++ 	.ndo_stop		= dsa_slave_close,
++@@ -1250,6 +1275,9 @@ static const struct net_device_ops dsa_s
++ 	.ndo_vlan_rx_add_vid	= dsa_slave_vlan_rx_add_vid,
++ 	.ndo_vlan_rx_kill_vid	= dsa_slave_vlan_rx_kill_vid,
++ 	.ndo_get_devlink_port	= dsa_slave_get_devlink_port,
+++#if IS_ENABLED(CONFIG_NF_FLOW_TABLE)
+++	.ndo_flow_offload_check	 = dsa_flow_offload_check,
+++#endif
++ };
++ 
++ static struct device_type dsa_type = {
+diff --git a/target/linux/generic/pending-5.4/655-increase_skb_pad.patch b/target/linux/generic/pending-5.4/655-increase_skb_pad.patch
+new file mode 100644
+index 0000000000..e325301d3c
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/655-increase_skb_pad.patch
+@@ -0,0 +1,20 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: kernel: add a few patches for avoiding unnecessary skb reallocations - significantly improves ethernet<->wireless performance
++
++lede-commit: 6f89cffc9add6939d44a6b54cf9a5e77849aa7fd
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ include/linux/skbuff.h | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++--- a/include/linux/skbuff.h
+++++ b/include/linux/skbuff.h
++@@ -2650,7 +2650,7 @@ static inline int pskb_network_may_pull(
++  * NET_IP_ALIGN(2) + ethernet_header(14) + IP_header(20/40) + ports(8)
++  */
++ #ifndef NET_SKB_PAD
++-#define NET_SKB_PAD	max(32, L1_CACHE_BYTES)
+++#define NET_SKB_PAD	max(64, L1_CACHE_BYTES)
++ #endif
++ 
++ int ___pskb_trim(struct sk_buff *skb, unsigned int len);
+diff --git a/target/linux/generic/pending-5.4/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch b/target/linux/generic/pending-5.4/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch
+new file mode 100644
+index 0000000000..39f7af29d9
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch
+@@ -0,0 +1,501 @@
++From: Steven Barth <steven@midlink.org>
++Subject: Add support for MAP-E FMRs (mesh mode)
++
++MAP-E FMRs (draft-ietf-softwire-map-10) are rules for IPv4-communication
++between MAP CEs (mesh mode) without the need to forward such data to a
++border relay. This is similar to how 6rd works but for IPv4 over IPv6.
++
++Signed-off-by: Steven Barth <cyrus@openwrt.org>
++---
++ include/net/ip6_tunnel.h       |  13 ++
++ include/uapi/linux/if_tunnel.h |  13 ++
++ net/ipv6/ip6_tunnel.c          | 276 +++++++++++++++++++++++++++++++++++++++--
++ 3 files changed, 291 insertions(+), 11 deletions(-)
++
++--- a/include/net/ip6_tunnel.h
+++++ b/include/net/ip6_tunnel.h
++@@ -18,6 +18,18 @@
++ /* determine capability on a per-packet basis */
++ #define IP6_TNL_F_CAP_PER_PACKET 0x40000
++ 
+++/* IPv6 tunnel FMR */
+++struct __ip6_tnl_fmr {
+++	struct __ip6_tnl_fmr *next; /* next fmr in list */
+++	struct in6_addr ip6_prefix;
+++	struct in_addr ip4_prefix;
+++
+++	__u8 ip6_prefix_len;
+++	__u8 ip4_prefix_len;
+++	__u8 ea_len;
+++	__u8 offset;
+++};
+++
++ struct __ip6_tnl_parm {
++ 	char name[IFNAMSIZ];	/* name of tunnel device */
++ 	int link;		/* ifindex of underlying L2 interface */
++@@ -29,6 +41,7 @@ struct __ip6_tnl_parm {
++ 	__u32 flags;		/* tunnel flags */
++ 	struct in6_addr laddr;	/* local tunnel end-point address */
++ 	struct in6_addr raddr;	/* remote tunnel end-point address */
+++	struct __ip6_tnl_fmr *fmrs;	/* FMRs */
++ 
++ 	__be16			i_flags;
++ 	__be16			o_flags;
++--- a/include/uapi/linux/if_tunnel.h
+++++ b/include/uapi/linux/if_tunnel.h
++@@ -77,10 +77,23 @@ enum {
++ 	IFLA_IPTUN_ENCAP_DPORT,
++ 	IFLA_IPTUN_COLLECT_METADATA,
++ 	IFLA_IPTUN_FWMARK,
+++	IFLA_IPTUN_FMRS,
++ 	__IFLA_IPTUN_MAX,
++ };
++ #define IFLA_IPTUN_MAX	(__IFLA_IPTUN_MAX - 1)
++ 
+++enum {
+++	IFLA_IPTUN_FMR_UNSPEC,
+++	IFLA_IPTUN_FMR_IP6_PREFIX,
+++	IFLA_IPTUN_FMR_IP4_PREFIX,
+++	IFLA_IPTUN_FMR_IP6_PREFIX_LEN,
+++	IFLA_IPTUN_FMR_IP4_PREFIX_LEN,
+++	IFLA_IPTUN_FMR_EA_LEN,
+++	IFLA_IPTUN_FMR_OFFSET,
+++	__IFLA_IPTUN_FMR_MAX,
+++};
+++#define IFLA_IPTUN_FMR_MAX (__IFLA_IPTUN_FMR_MAX - 1)
+++
++ enum tunnel_encap_types {
++ 	TUNNEL_ENCAP_NONE,
++ 	TUNNEL_ENCAP_FOU,
++--- a/net/ipv6/ip6_tunnel.c
+++++ b/net/ipv6/ip6_tunnel.c
++@@ -11,6 +11,9 @@
++  *      linux/net/ipv6/sit.c and linux/net/ipv4/ipip.c
++  *
++  *      RFC 2473
+++ *
+++ *      Changes:
+++ *      Steven Barth <cyrus@openwrt.org>:           MAP-E FMR support
++  */
++ 
++ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
++@@ -67,9 +70,9 @@ static bool log_ecn_error = true;
++ module_param(log_ecn_error, bool, 0644);
++ MODULE_PARM_DESC(log_ecn_error, "Log packets received with corrupted ECN");
++ 
++-static u32 HASH(const struct in6_addr *addr1, const struct in6_addr *addr2)
+++static u32 HASH(const struct in6_addr *addr)
++ {
++-	u32 hash = ipv6_addr_hash(addr1) ^ ipv6_addr_hash(addr2);
+++	u32 hash = ipv6_addr_hash(addr);
++ 
++ 	return hash_32(hash, IP6_TUNNEL_HASH_SIZE_SHIFT);
++ }
++@@ -136,20 +139,29 @@ static struct net_device_stats *ip6_get_
++ static struct ip6_tnl *
++ ip6_tnl_lookup(struct net *net, const struct in6_addr *remote, const struct in6_addr *local)
++ {
++-	unsigned int hash = HASH(remote, local);
+++	unsigned int hash = HASH(local);
++ 	struct ip6_tnl *t;
++ 	struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id);
++ 	struct in6_addr any;
+++	struct __ip6_tnl_fmr *fmr;
++ 
++ 	for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) {
++-		if (ipv6_addr_equal(local, &t->parms.laddr) &&
++-		    ipv6_addr_equal(remote, &t->parms.raddr) &&
++-		    (t->dev->flags & IFF_UP))
+++		if (!ipv6_addr_equal(local, &t->parms.laddr) ||
+++				!(t->dev->flags & IFF_UP))
+++			continue;
+++
+++		if (ipv6_addr_equal(remote, &t->parms.raddr))
++ 			return t;
+++
+++		for (fmr = t->parms.fmrs; fmr; fmr = fmr->next) {
+++			if (ipv6_prefix_equal(remote, &fmr->ip6_prefix,
+++					fmr->ip6_prefix_len))
+++				return t;
+++		}
++ 	}
++ 
++ 	memset(&any, 0, sizeof(any));
++-	hash = HASH(&any, local);
+++	hash = HASH(local);
++ 	for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) {
++ 		if (ipv6_addr_equal(local, &t->parms.laddr) &&
++ 		    ipv6_addr_any(&t->parms.raddr) &&
++@@ -157,7 +169,7 @@ ip6_tnl_lookup(struct net *net, const st
++ 			return t;
++ 	}
++ 
++-	hash = HASH(remote, &any);
+++	hash = HASH(&any);
++ 	for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) {
++ 		if (ipv6_addr_equal(remote, &t->parms.raddr) &&
++ 		    ipv6_addr_any(&t->parms.laddr) &&
++@@ -197,7 +209,7 @@ ip6_tnl_bucket(struct ip6_tnl_net *ip6n,
++ 
++ 	if (!ipv6_addr_any(remote) || !ipv6_addr_any(local)) {
++ 		prio = 1;
++-		h = HASH(remote, local);
+++		h = HASH(local);
++ 	}
++ 	return &ip6n->tnls[prio][h];
++ }
++@@ -377,6 +389,12 @@ ip6_tnl_dev_uninit(struct net_device *de
++ 	struct net *net = t->net;
++ 	struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id);
++ 
+++	while (t->parms.fmrs) {
+++		struct __ip6_tnl_fmr *next = t->parms.fmrs->next;
+++		kfree(t->parms.fmrs);
+++		t->parms.fmrs = next;
+++	}
+++
++ 	if (dev == ip6n->fb_tnl_dev)
++ 		RCU_INIT_POINTER(ip6n->tnls_wc[0], NULL);
++ 	else
++@@ -766,6 +784,107 @@ int ip6_tnl_rcv_ctl(struct ip6_tnl *t,
++ }
++ EXPORT_SYMBOL_GPL(ip6_tnl_rcv_ctl);
++ 
+++/**
+++ * ip4ip6_fmr_calc - calculate target / source IPv6-address based on FMR
+++ *   @dest: destination IPv6 address buffer
+++ *   @skb: received socket buffer
+++ *   @fmr: MAP FMR
+++ *   @xmit: Calculate for xmit or rcv
+++ **/
+++static void ip4ip6_fmr_calc(struct in6_addr *dest,
+++		const struct iphdr *iph, const uint8_t *end,
+++		const struct __ip6_tnl_fmr *fmr, bool xmit)
+++{
+++	int psidlen = fmr->ea_len - (32 - fmr->ip4_prefix_len);
+++	u8 *portp = NULL;
+++	bool use_dest_addr;
+++	const struct iphdr *dsth = iph;
+++
+++	if ((u8*)dsth >= end)
+++		return;
+++
+++	/* find significant IP header */
+++	if (iph->protocol == IPPROTO_ICMP) {
+++		struct icmphdr *ih = (struct icmphdr*)(((u8*)dsth) + dsth->ihl * 4);
+++		if (ih && ((u8*)&ih[1]) <= end && (
+++			ih->type == ICMP_DEST_UNREACH ||
+++			ih->type == ICMP_SOURCE_QUENCH ||
+++			ih->type == ICMP_TIME_EXCEEDED ||
+++			ih->type == ICMP_PARAMETERPROB ||
+++			ih->type == ICMP_REDIRECT))
+++				dsth = (const struct iphdr*)&ih[1];
+++	}
+++
+++	/* in xmit-path use dest port by default and source port only if
+++		this is an ICMP reply to something else; vice versa in rcv-path */
+++	use_dest_addr = (xmit && dsth == iph) || (!xmit && dsth != iph);
+++
+++	/* get dst port */
+++	if (((u8*)&dsth[1]) <= end && (
+++		dsth->protocol == IPPROTO_UDP ||
+++		dsth->protocol == IPPROTO_TCP ||
+++		dsth->protocol == IPPROTO_SCTP ||
+++		dsth->protocol == IPPROTO_DCCP)) {
+++			/* for UDP, TCP, SCTP and DCCP source and dest port
+++			follow IPv4 header directly */
+++			portp = ((u8*)dsth) + dsth->ihl * 4;
+++
+++			if (use_dest_addr)
+++				portp += sizeof(u16);
+++	} else if (iph->protocol == IPPROTO_ICMP) {
+++		struct icmphdr *ih = (struct icmphdr*)(((u8*)dsth) + dsth->ihl * 4);
+++
+++		/* use icmp identifier as port */
+++		if (((u8*)&ih) <= end && (
+++		    (use_dest_addr && (
+++		    ih->type == ICMP_ECHOREPLY ||
+++			ih->type == ICMP_TIMESTAMPREPLY ||
+++			ih->type == ICMP_INFO_REPLY ||
+++			ih->type == ICMP_ADDRESSREPLY)) ||
+++			(!use_dest_addr && (
+++			ih->type == ICMP_ECHO ||
+++			ih->type == ICMP_TIMESTAMP ||
+++			ih->type == ICMP_INFO_REQUEST ||
+++			ih->type == ICMP_ADDRESS)
+++			)))
+++				portp = (u8*)&ih->un.echo.id;
+++	}
+++
+++	if ((portp && &portp[2] <= end) || psidlen == 0) {
+++		int frombyte = fmr->ip6_prefix_len / 8;
+++		int fromrem = fmr->ip6_prefix_len % 8;
+++		int bytes = sizeof(struct in6_addr) - frombyte;
+++		const u32 *addr = (use_dest_addr) ? &iph->daddr : &iph->saddr;
+++		u64 eabits = ((u64)ntohl(*addr)) << (32 + fmr->ip4_prefix_len);
+++		u64 t = 0;
+++
+++		/* extract PSID from port and add it to eabits */
+++		u16 psidbits = 0;
+++		if (psidlen > 0) {
+++			psidbits = ((u16)portp[0]) << 8 | ((u16)portp[1]);
+++			psidbits >>= 16 - psidlen - fmr->offset;
+++			psidbits = (u16)(psidbits << (16 - psidlen));
+++			eabits |= ((u64)psidbits) << (48 - (fmr->ea_len - psidlen));
+++		}
+++
+++		/* rewrite destination address */
+++		*dest = fmr->ip6_prefix;
+++		memcpy(&dest->s6_addr[10], addr, sizeof(*addr));
+++		dest->s6_addr16[7] = htons(psidbits >> (16 - psidlen));
+++
+++		if (bytes > sizeof(u64))
+++			bytes = sizeof(u64);
+++
+++		/* insert eabits */
+++		memcpy(&t, &dest->s6_addr[frombyte], bytes);
+++		t = be64_to_cpu(t) & ~(((((u64)1) << fmr->ea_len) - 1)
+++			<< (64 - fmr->ea_len - fromrem));
+++		t = cpu_to_be64(t | (eabits >> fromrem));
+++		memcpy(&dest->s6_addr[frombyte], &t, bytes);
+++	}
+++}
+++
+++
++ static int __ip6_tnl_rcv(struct ip6_tnl *tunnel, struct sk_buff *skb,
++ 			 const struct tnl_ptk_info *tpi,
++ 			 struct metadata_dst *tun_dst,
++@@ -818,6 +937,27 @@ static int __ip6_tnl_rcv(struct ip6_tnl
++ 	skb_reset_network_header(skb);
++ 	memset(skb->cb, 0, sizeof(struct inet6_skb_parm));
++ 
+++	if (tpi->proto == htons(ETH_P_IP) && tunnel->parms.fmrs &&
+++		!ipv6_addr_equal(&ipv6h->saddr, &tunnel->parms.raddr)) {
+++			/* Packet didn't come from BR, so lookup FMR */
+++			struct __ip6_tnl_fmr *fmr;
+++			struct in6_addr expected = tunnel->parms.raddr;
+++			for (fmr = tunnel->parms.fmrs; fmr; fmr = fmr->next)
+++				if (ipv6_prefix_equal(&ipv6h->saddr,
+++					&fmr->ip6_prefix, fmr->ip6_prefix_len))
+++						break;
+++
+++			/* Check that IPv6 matches IPv4 source to prevent spoofing */
+++			if (fmr)
+++				ip4ip6_fmr_calc(&expected, ip_hdr(skb),
+++						skb_tail_pointer(skb), fmr, false);
+++
+++			if (!ipv6_addr_equal(&ipv6h->saddr, &expected)) {
+++				rcu_read_unlock();
+++				goto drop;
+++			}
+++	}
+++
++ 	__skb_tunnel_rx(skb, tunnel->dev, tunnel->net);
++ 
++ 	err = dscp_ecn_decapsulate(tunnel, ipv6h, skb);
++@@ -958,6 +1098,7 @@ static void init_tel_txopt(struct ipv6_t
++ 	opt->ops.opt_nflen = 8;
++ }
++ 
+++
++ /**
++  * ip6_tnl_addr_conflict - compare packet addresses to tunnel's own
++  *   @t: the outgoing tunnel device
++@@ -1310,6 +1451,7 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str
++ {
++ 	struct ip6_tnl *t = netdev_priv(dev);
++ 	struct ipv6hdr *ipv6h;
+++	struct __ip6_tnl_fmr *fmr;
++ 	int encap_limit = -1;
++ 	__u16 offset;
++ 	struct flowi6 fl6;
++@@ -1375,6 +1517,18 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str
++ 	fl6.flowi6_uid = sock_net_uid(dev_net(dev), NULL);
++ 	dsfield = INET_ECN_encapsulate(dsfield, ipv6_get_dsfield(ipv6h));
++ 
+++	/* try to find matching FMR */
+++	for (fmr = t->parms.fmrs; fmr; fmr = fmr->next) {
+++		unsigned mshift = 32 - fmr->ip4_prefix_len;
+++		if (ntohl(fmr->ip4_prefix.s_addr) >> mshift ==
+++				ntohl(ip_hdr(skb)->daddr) >> mshift)
+++			break;
+++	}
+++
+++	/* change dstaddr according to FMR */
+++	if (fmr)
+++		ip4ip6_fmr_calc(&fl6.daddr, ip_hdr(skb), skb_tail_pointer(skb), fmr, true);
+++
++ 	if (iptunnel_handle_offloads(skb, SKB_GSO_IPXIP6))
++ 		return -1;
++ 
++@@ -1504,6 +1658,14 @@ ip6_tnl_change(struct ip6_tnl *t, const
++ 	t->parms.link = p->link;
++ 	t->parms.proto = p->proto;
++ 	t->parms.fwmark = p->fwmark;
+++
+++	while (t->parms.fmrs) {
+++		struct __ip6_tnl_fmr *next = t->parms.fmrs->next;
+++		kfree(t->parms.fmrs);
+++		t->parms.fmrs = next;
+++	}
+++	t->parms.fmrs = p->fmrs;
+++
++ 	dst_cache_reset(&t->dst_cache);
++ 	ip6_tnl_link_config(t);
++ 	return 0;
++@@ -1542,6 +1704,7 @@ ip6_tnl_parm_from_user(struct __ip6_tnl_
++ 	p->flowinfo = u->flowinfo;
++ 	p->link = u->link;
++ 	p->proto = u->proto;
+++	p->fmrs = NULL;
++ 	memcpy(p->name, u->name, sizeof(u->name));
++ }
++ 
++@@ -1926,6 +2089,15 @@ static int ip6_tnl_validate(struct nlatt
++ 	return 0;
++ }
++ 
+++static const struct nla_policy ip6_tnl_fmr_policy[IFLA_IPTUN_FMR_MAX + 1] = {
+++	[IFLA_IPTUN_FMR_IP6_PREFIX] = { .len = sizeof(struct in6_addr) },
+++	[IFLA_IPTUN_FMR_IP4_PREFIX] = { .len = sizeof(struct in_addr) },
+++	[IFLA_IPTUN_FMR_IP6_PREFIX_LEN] = { .type = NLA_U8 },
+++	[IFLA_IPTUN_FMR_IP4_PREFIX_LEN] = { .type = NLA_U8 },
+++	[IFLA_IPTUN_FMR_EA_LEN] = { .type = NLA_U8 },
+++	[IFLA_IPTUN_FMR_OFFSET] = { .type = NLA_U8 }
+++};
+++
++ static void ip6_tnl_netlink_parms(struct nlattr *data[],
++ 				  struct __ip6_tnl_parm *parms)
++ {
++@@ -1963,6 +2135,46 @@ static void ip6_tnl_netlink_parms(struct
++ 
++ 	if (data[IFLA_IPTUN_FWMARK])
++ 		parms->fwmark = nla_get_u32(data[IFLA_IPTUN_FWMARK]);
+++
+++	if (data[IFLA_IPTUN_FMRS]) {
+++		unsigned rem;
+++		struct nlattr *fmr;
+++		nla_for_each_nested(fmr, data[IFLA_IPTUN_FMRS], rem) {
+++			struct nlattr *fmrd[IFLA_IPTUN_FMR_MAX + 1], *c;
+++			struct __ip6_tnl_fmr *nfmr;
+++
+++			nla_parse_nested(fmrd, IFLA_IPTUN_FMR_MAX,
+++				fmr, ip6_tnl_fmr_policy, NULL);
+++
+++			if (!(nfmr = kzalloc(sizeof(*nfmr), GFP_KERNEL)))
+++				continue;
+++
+++			nfmr->offset = 6;
+++
+++			if ((c = fmrd[IFLA_IPTUN_FMR_IP6_PREFIX]))
+++				nla_memcpy(&nfmr->ip6_prefix, fmrd[IFLA_IPTUN_FMR_IP6_PREFIX],
+++					sizeof(nfmr->ip6_prefix));
+++
+++			if ((c = fmrd[IFLA_IPTUN_FMR_IP4_PREFIX]))
+++				nla_memcpy(&nfmr->ip4_prefix, fmrd[IFLA_IPTUN_FMR_IP4_PREFIX],
+++					sizeof(nfmr->ip4_prefix));
+++
+++			if ((c = fmrd[IFLA_IPTUN_FMR_IP6_PREFIX_LEN]))
+++				nfmr->ip6_prefix_len = nla_get_u8(c);
+++
+++			if ((c = fmrd[IFLA_IPTUN_FMR_IP4_PREFIX_LEN]))
+++				nfmr->ip4_prefix_len = nla_get_u8(c);
+++
+++			if ((c = fmrd[IFLA_IPTUN_FMR_EA_LEN]))
+++				nfmr->ea_len = nla_get_u8(c);
+++
+++			if ((c = fmrd[IFLA_IPTUN_FMR_OFFSET]))
+++				nfmr->offset = nla_get_u8(c);
+++
+++			nfmr->next = parms->fmrs;
+++			parms->fmrs = nfmr;
+++		}
+++	}
++ }
++ 
++ static bool ip6_tnl_netlink_encap_parms(struct nlattr *data[],
++@@ -2078,6 +2290,12 @@ static void ip6_tnl_dellink(struct net_d
++ 
++ static size_t ip6_tnl_get_size(const struct net_device *dev)
++ {
+++	const struct ip6_tnl *t = netdev_priv(dev);
+++	struct __ip6_tnl_fmr *c;
+++	int fmrs = 0;
+++	for (c = t->parms.fmrs; c; c = c->next)
+++		++fmrs;
+++
++ 	return
++ 		/* IFLA_IPTUN_LINK */
++ 		nla_total_size(4) +
++@@ -2107,6 +2325,24 @@ static size_t ip6_tnl_get_size(const str
++ 		nla_total_size(0) +
++ 		/* IFLA_IPTUN_FWMARK */
++ 		nla_total_size(4) +
+++		/* IFLA_IPTUN_FMRS */
+++		nla_total_size(0) +
+++		(
+++			/* nest */
+++			nla_total_size(0) +
+++			/* IFLA_IPTUN_FMR_IP6_PREFIX */
+++			nla_total_size(sizeof(struct in6_addr)) +
+++			/* IFLA_IPTUN_FMR_IP4_PREFIX */
+++			nla_total_size(sizeof(struct in_addr)) +
+++			/* IFLA_IPTUN_FMR_EA_LEN */
+++			nla_total_size(1) +
+++			/* IFLA_IPTUN_FMR_IP6_PREFIX_LEN */
+++			nla_total_size(1) +
+++			/* IFLA_IPTUN_FMR_IP4_PREFIX_LEN */
+++			nla_total_size(1) +
+++			/* IFLA_IPTUN_FMR_OFFSET */
+++			nla_total_size(1)
+++		) * fmrs +
++ 		0;
++ }
++ 
++@@ -2114,6 +2350,9 @@ static int ip6_tnl_fill_info(struct sk_b
++ {
++ 	struct ip6_tnl *tunnel = netdev_priv(dev);
++ 	struct __ip6_tnl_parm *parm = &tunnel->parms;
+++	struct __ip6_tnl_fmr *c;
+++	int fmrcnt = 0;
+++	struct nlattr *fmrs;
++ 
++ 	if (nla_put_u32(skb, IFLA_IPTUN_LINK, parm->link) ||
++ 	    nla_put_in6_addr(skb, IFLA_IPTUN_LOCAL, &parm->laddr) ||
++@@ -2123,9 +2362,27 @@ static int ip6_tnl_fill_info(struct sk_b
++ 	    nla_put_be32(skb, IFLA_IPTUN_FLOWINFO, parm->flowinfo) ||
++ 	    nla_put_u32(skb, IFLA_IPTUN_FLAGS, parm->flags) ||
++ 	    nla_put_u8(skb, IFLA_IPTUN_PROTO, parm->proto) ||
++-	    nla_put_u32(skb, IFLA_IPTUN_FWMARK, parm->fwmark))
+++	    nla_put_u32(skb, IFLA_IPTUN_FWMARK, parm->fwmark) ||
+++	    !(fmrs = nla_nest_start(skb, IFLA_IPTUN_FMRS)))
++ 		goto nla_put_failure;
++ 
+++	for (c = parm->fmrs; c; c = c->next) {
+++		struct nlattr *fmr = nla_nest_start(skb, ++fmrcnt);
+++		if (!fmr ||
+++			nla_put(skb, IFLA_IPTUN_FMR_IP6_PREFIX,
+++				sizeof(c->ip6_prefix), &c->ip6_prefix) ||
+++			nla_put(skb, IFLA_IPTUN_FMR_IP4_PREFIX,
+++				sizeof(c->ip4_prefix), &c->ip4_prefix) ||
+++			nla_put_u8(skb, IFLA_IPTUN_FMR_IP6_PREFIX_LEN, c->ip6_prefix_len) ||
+++			nla_put_u8(skb, IFLA_IPTUN_FMR_IP4_PREFIX_LEN, c->ip4_prefix_len) ||
+++			nla_put_u8(skb, IFLA_IPTUN_FMR_EA_LEN, c->ea_len) ||
+++			nla_put_u8(skb, IFLA_IPTUN_FMR_OFFSET, c->offset))
+++				goto nla_put_failure;
+++
+++		nla_nest_end(skb, fmr);
+++	}
+++	nla_nest_end(skb, fmrs);
+++
++ 	if (nla_put_u16(skb, IFLA_IPTUN_ENCAP_TYPE, tunnel->encap.type) ||
++ 	    nla_put_be16(skb, IFLA_IPTUN_ENCAP_SPORT, tunnel->encap.sport) ||
++ 	    nla_put_be16(skb, IFLA_IPTUN_ENCAP_DPORT, tunnel->encap.dport) ||
++@@ -2165,6 +2422,7 @@ static const struct nla_policy ip6_tnl_p
++ 	[IFLA_IPTUN_ENCAP_DPORT]	= { .type = NLA_U16 },
++ 	[IFLA_IPTUN_COLLECT_METADATA]	= { .type = NLA_FLAG },
++ 	[IFLA_IPTUN_FWMARK]		= { .type = NLA_U32 },
+++	[IFLA_IPTUN_FMRS]		= { .type = NLA_NESTED },
++ };
++ 
++ static struct rtnl_link_ops ip6_link_ops __read_mostly = {
+diff --git a/target/linux/generic/pending-5.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-5.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
+new file mode 100644
+index 0000000000..06227cfafe
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
+@@ -0,0 +1,263 @@
++From: Jonas Gorski <jogo@openwrt.org>
++Subject: ipv6: allow rejecting with "source address failed policy"
++
++RFC6204 L-14 requires rejecting traffic from invalid addresses with
++ICMPv6 Destination Unreachable, Code 5 (Source address failed ingress/
++egress policy) on the LAN side, so add an appropriate rule for that.
++
++Signed-off-by: Jonas Gorski <jogo@openwrt.org>
++---
++ include/net/netns/ipv6.h       |  1 +
++ include/uapi/linux/fib_rules.h |  4 +++
++ include/uapi/linux/rtnetlink.h |  1 +
++ net/ipv4/fib_semantics.c       |  4 +++
++ net/ipv4/fib_trie.c            |  1 +
++ net/ipv4/ipmr.c                |  1 +
++ net/ipv6/fib6_rules.c          |  4 +++
++ net/ipv6/ip6mr.c               |  2 ++
++ net/ipv6/route.c               | 58 +++++++++++++++++++++++++++++++++++++++++-
++ 9 files changed, 75 insertions(+), 1 deletion(-)
++
++--- a/include/net/netns/ipv6.h
+++++ b/include/net/netns/ipv6.h
++@@ -84,6 +84,7 @@ struct netns_ipv6 {
++ 	unsigned int		fib6_rules_require_fldissect;
++ 	bool			fib6_has_custom_rules;
++ 	struct rt6_info         *ip6_prohibit_entry;
+++	struct rt6_info		*ip6_policy_failed_entry;
++ 	struct rt6_info         *ip6_blk_hole_entry;
++ 	struct fib6_table       *fib6_local_tbl;
++ 	struct fib_rules_ops    *fib6_rules_ops;
++--- a/include/uapi/linux/fib_rules.h
+++++ b/include/uapi/linux/fib_rules.h
++@@ -82,6 +82,10 @@ enum {
++ 	FR_ACT_BLACKHOLE,	/* Drop without notification */
++ 	FR_ACT_UNREACHABLE,	/* Drop with ENETUNREACH */
++ 	FR_ACT_PROHIBIT,	/* Drop with EACCES */
+++	FR_ACT_RES9,
+++	FR_ACT_RES10,
+++	FR_ACT_RES11,
+++	FR_ACT_POLICY_FAILED,	/* Drop with EACCES */
++ 	__FR_ACT_MAX,
++ };
++ 
++--- a/include/uapi/linux/rtnetlink.h
+++++ b/include/uapi/linux/rtnetlink.h
++@@ -235,6 +235,7 @@ enum {
++ 	RTN_THROW,		/* Not in this table		*/
++ 	RTN_NAT,		/* Translate this address	*/
++ 	RTN_XRESOLVE,		/* Use external resolver	*/
+++	RTN_POLICY_FAILED,	/* Failed ingress/egress policy */
++ 	__RTN_MAX
++ };
++ 
++--- a/net/ipv4/fib_semantics.c
+++++ b/net/ipv4/fib_semantics.c
++@@ -141,6 +141,10 @@ const struct fib_prop fib_props[RTN_MAX
++ 		.error	= -EINVAL,
++ 		.scope	= RT_SCOPE_NOWHERE,
++ 	},
+++	[RTN_POLICY_FAILED] = {
+++		.error	= -EACCES,
+++		.scope	= RT_SCOPE_UNIVERSE,
+++	},
++ };
++ 
++ static void rt_fibinfo_free(struct rtable __rcu **rtp)
++--- a/net/ipv4/fib_trie.c
+++++ b/net/ipv4/fib_trie.c
++@@ -2596,6 +2596,7 @@ static const char *const rtn_type_names[
++ 	[RTN_THROW] = "THROW",
++ 	[RTN_NAT] = "NAT",
++ 	[RTN_XRESOLVE] = "XRESOLVE",
+++	[RTN_POLICY_FAILED] = "POLICY_FAILED",
++ };
++ 
++ static inline const char *rtn_type(char *buf, size_t len, unsigned int t)
++--- a/net/ipv4/ipmr.c
+++++ b/net/ipv4/ipmr.c
++@@ -173,6 +173,7 @@ static int ipmr_rule_action(struct fib_r
++ 	case FR_ACT_UNREACHABLE:
++ 		return -ENETUNREACH;
++ 	case FR_ACT_PROHIBIT:
+++	case FR_ACT_POLICY_FAILED:
++ 		return -EACCES;
++ 	case FR_ACT_BLACKHOLE:
++ 	default:
++--- a/net/ipv6/fib6_rules.c
+++++ b/net/ipv6/fib6_rules.c
++@@ -216,6 +216,10 @@ static int __fib6_rule_action(struct fib
++ 		err = -EACCES;
++ 		rt = net->ipv6.ip6_prohibit_entry;
++ 		goto discard_pkt;
+++	case FR_ACT_POLICY_FAILED:
+++		err = -EACCES;
+++		rt = net->ipv6.ip6_policy_failed_entry;
+++		goto discard_pkt;
++ 	}
++ 
++ 	tb_id = fib_rule_get_table(rule, arg);
++--- a/net/ipv6/ip6mr.c
+++++ b/net/ipv6/ip6mr.c
++@@ -161,6 +161,8 @@ static int ip6mr_rule_action(struct fib_
++ 		return -ENETUNREACH;
++ 	case FR_ACT_PROHIBIT:
++ 		return -EACCES;
+++	case FR_ACT_POLICY_FAILED:
+++		return -EACCES;
++ 	case FR_ACT_BLACKHOLE:
++ 	default:
++ 		return -EINVAL;
++--- a/net/ipv6/route.c
+++++ b/net/ipv6/route.c
++@@ -94,6 +94,8 @@ static int		ip6_pkt_discard(struct sk_bu
++ static int		ip6_pkt_discard_out(struct net *net, struct sock *sk, struct sk_buff *skb);
++ static int		ip6_pkt_prohibit(struct sk_buff *skb);
++ static int		ip6_pkt_prohibit_out(struct net *net, struct sock *sk, struct sk_buff *skb);
+++static int		ip6_pkt_policy_failed(struct sk_buff *skb);
+++static int		ip6_pkt_policy_failed_out(struct net *net, struct sock *sk, struct sk_buff *skb);
++ static void		ip6_link_failure(struct sk_buff *skb);
++ static void		ip6_rt_update_pmtu(struct dst_entry *dst, struct sock *sk,
++ 					   struct sk_buff *skb, u32 mtu,
++@@ -327,6 +329,18 @@ static const struct rt6_info ip6_prohibi
++ 	.rt6i_flags	= (RTF_REJECT | RTF_NONEXTHOP),
++ };
++ 
+++static const struct rt6_info ip6_policy_failed_entry_template = {
+++	.dst = {
+++		.__refcnt	= ATOMIC_INIT(1),
+++		.__use		= 1,
+++		.obsolete	= DST_OBSOLETE_FORCE_CHK,
+++		.error		= -EACCES,
+++		.input		= ip6_pkt_policy_failed,
+++		.output		= ip6_pkt_policy_failed_out,
+++	},
+++	.rt6i_flags	= (RTF_REJECT | RTF_NONEXTHOP),
+++};
+++
++ static const struct rt6_info ip6_blk_hole_entry_template = {
++ 	.dst = {
++ 		.__refcnt	= ATOMIC_INIT(1),
++@@ -1048,6 +1062,7 @@ static const int fib6_prop[RTN_MAX + 1]
++ 	[RTN_BLACKHOLE]	= -EINVAL,
++ 	[RTN_UNREACHABLE] = -EHOSTUNREACH,
++ 	[RTN_PROHIBIT]	= -EACCES,
+++	[RTN_POLICY_FAILED] = -EACCES,
++ 	[RTN_THROW]	= -EAGAIN,
++ 	[RTN_NAT]	= -EINVAL,
++ 	[RTN_XRESOLVE]	= -EINVAL,
++@@ -1085,6 +1100,10 @@ static void ip6_rt_init_dst_reject(struc
++ 		rt->dst.output = ip6_pkt_prohibit_out;
++ 		rt->dst.input = ip6_pkt_prohibit;
++ 		break;
+++	case RTN_POLICY_FAILED:
+++		rt->dst.output = ip6_pkt_policy_failed_out;
+++		rt->dst.input = ip6_pkt_policy_failed;
+++		break;
++ 	case RTN_THROW:
++ 	case RTN_UNREACHABLE:
++ 	default:
++@@ -4434,6 +4453,17 @@ static int ip6_pkt_prohibit_out(struct n
++ 	return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES);
++ }
++ 
+++static int ip6_pkt_policy_failed(struct sk_buff *skb)
+++{
+++	return ip6_pkt_drop(skb, ICMPV6_POLICY_FAIL, IPSTATS_MIB_INNOROUTES);
+++}
+++
+++static int ip6_pkt_policy_failed_out(struct net *net, struct sock *sk, struct sk_buff *skb)
+++{
+++	skb->dev = skb_dst(skb)->dev;
+++	return ip6_pkt_drop(skb, ICMPV6_POLICY_FAIL, IPSTATS_MIB_OUTNOROUTES);
+++}
+++
++ /*
++  *	Allocate a dst for local (unicast / anycast) address.
++  */
++@@ -4914,7 +4944,8 @@ static int rtm_to_fib6_config(struct sk_
++ 	if (rtm->rtm_type == RTN_UNREACHABLE ||
++ 	    rtm->rtm_type == RTN_BLACKHOLE ||
++ 	    rtm->rtm_type == RTN_PROHIBIT ||
++-	    rtm->rtm_type == RTN_THROW)
+++	    rtm->rtm_type == RTN_THROW ||
+++	    rtm->rtm_type == RTN_POLICY_FAILED)
++ 		cfg->fc_flags |= RTF_REJECT;
++ 
++ 	if (rtm->rtm_type == RTN_LOCAL)
++@@ -6037,6 +6068,8 @@ static int ip6_route_dev_notify(struct n
++ #ifdef CONFIG_IPV6_MULTIPLE_TABLES
++ 		net->ipv6.ip6_prohibit_entry->dst.dev = dev;
++ 		net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev);
+++		net->ipv6.ip6_policy_failed_entry->dst.dev = dev;
+++		net->ipv6.ip6_policy_failed_entry->rt6i_idev = in6_dev_get(dev);
++ 		net->ipv6.ip6_blk_hole_entry->dst.dev = dev;
++ 		net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev);
++ #endif
++@@ -6048,6 +6081,7 @@ static int ip6_route_dev_notify(struct n
++ 		in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev);
++ #ifdef CONFIG_IPV6_MULTIPLE_TABLES
++ 		in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev);
+++		in6_dev_put_clear(&net->ipv6.ip6_policy_failed_entry->rt6i_idev);
++ 		in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev);
++ #endif
++ 	}
++@@ -6240,6 +6274,8 @@ static int __net_init ip6_route_net_init
++ 
++ #ifdef CONFIG_IPV6_MULTIPLE_TABLES
++ 	net->ipv6.fib6_has_custom_rules = false;
+++
+++
++ 	net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template,
++ 					       sizeof(*net->ipv6.ip6_prohibit_entry),
++ 					       GFP_KERNEL);
++@@ -6250,11 +6286,21 @@ static int __net_init ip6_route_net_init
++ 			 ip6_template_metrics, true);
++ 	INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->rt6i_uncached);
++ 
+++	net->ipv6.ip6_policy_failed_entry =
+++				kmemdup(&ip6_policy_failed_entry_template,
+++				sizeof(*net->ipv6.ip6_policy_failed_entry), GFP_KERNEL);
+++	if (!net->ipv6.ip6_policy_failed_entry)
+++		goto out_ip6_prohibit_entry;
+++	net->ipv6.ip6_policy_failed_entry->dst.ops = &net->ipv6.ip6_dst_ops;
+++	dst_init_metrics(&net->ipv6.ip6_policy_failed_entry->dst,
+++			 ip6_template_metrics, true);
+++	INIT_LIST_HEAD(&net->ipv6.ip6_policy_failed_entry->rt6i_uncached);
+++
++ 	net->ipv6.ip6_blk_hole_entry = kmemdup(&ip6_blk_hole_entry_template,
++ 					       sizeof(*net->ipv6.ip6_blk_hole_entry),
++ 					       GFP_KERNEL);
++ 	if (!net->ipv6.ip6_blk_hole_entry)
++-		goto out_ip6_prohibit_entry;
+++		goto out_ip6_policy_failed_entry;
++ 	net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops;
++ 	dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst,
++ 			 ip6_template_metrics, true);
++@@ -6278,6 +6324,8 @@ out:
++ 	return ret;
++ 
++ #ifdef CONFIG_IPV6_MULTIPLE_TABLES
+++out_ip6_policy_failed_entry:
+++	kfree(net->ipv6.ip6_policy_failed_entry);
++ out_ip6_prohibit_entry:
++ 	kfree(net->ipv6.ip6_prohibit_entry);
++ out_ip6_null_entry:
++@@ -6297,6 +6345,7 @@ static void __net_exit ip6_route_net_exi
++ 	kfree(net->ipv6.ip6_null_entry);
++ #ifdef CONFIG_IPV6_MULTIPLE_TABLES
++ 	kfree(net->ipv6.ip6_prohibit_entry);
+++	kfree(net->ipv6.ip6_policy_failed_entry);
++ 	kfree(net->ipv6.ip6_blk_hole_entry);
++ #endif
++ 	dst_entries_destroy(&net->ipv6.ip6_dst_ops);
++@@ -6374,6 +6423,9 @@ void __init ip6_route_init_special_entri
++ 	init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
++ 	init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev;
++ 	init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
+++	init_net.ipv6.ip6_policy_failed_entry->dst.dev = init_net.loopback_dev;
+++	init_net.ipv6.ip6_policy_failed_entry->rt6i_idev =
+++		in6_dev_get(init_net.loopback_dev);
++   #endif
++ }
++ 
+diff --git a/target/linux/generic/pending-5.4/671-net-provide-defines-for-_POLICY_FAILED-until-all-cod.patch b/target/linux/generic/pending-5.4/671-net-provide-defines-for-_POLICY_FAILED-until-all-cod.patch
+new file mode 100644
+index 0000000000..a92d8ec4c1
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/671-net-provide-defines-for-_POLICY_FAILED-until-all-cod.patch
+@@ -0,0 +1,50 @@
++From: Jonas Gorski <jogo@openwrt.org>
++Subject: net: provide defines for _POLICY_FAILED until all code is updated
++
++Upstream introduced ICMPV6_POLICY_FAIL for code 5 of destination
++unreachable, conflicting with our name.
++
++Add appropriate defines to allow our code to build with the new
++name until we have updated our local patches for older kernels
++and userspace packages.
++
++Signed-off-by: Jonas Gorski <jogo@openwrt.org>
++---
++ include/uapi/linux/fib_rules.h | 2 ++
++ include/uapi/linux/icmpv6.h    | 2 ++
++ include/uapi/linux/rtnetlink.h | 2 ++
++ 3 files changed, 6 insertions(+)
++
++--- a/include/uapi/linux/fib_rules.h
+++++ b/include/uapi/linux/fib_rules.h
++@@ -89,6 +89,8 @@ enum {
++ 	__FR_ACT_MAX,
++ };
++ 
+++#define FR_ACT_FAILED_POLICY FR_ACT_POLICY_FAILED
+++
++ #define FR_ACT_MAX (__FR_ACT_MAX - 1)
++ 
++ #endif
++--- a/include/uapi/linux/icmpv6.h
+++++ b/include/uapi/linux/icmpv6.h
++@@ -125,6 +125,8 @@ struct icmp6hdr {
++ #define ICMPV6_POLICY_FAIL		5
++ #define ICMPV6_REJECT_ROUTE		6
++ 
+++#define ICMPV6_FAILED_POLICY		ICMPV6_POLICY_FAIL
+++
++ /*
++  *	Codes for Time Exceeded
++  */
++--- a/include/uapi/linux/rtnetlink.h
+++++ b/include/uapi/linux/rtnetlink.h
++@@ -239,6 +239,8 @@ enum {
++ 	__RTN_MAX
++ };
++ 
+++#define RTN_FAILED_POLICY RTN_POLICY_FAILED
+++
++ #define RTN_MAX (__RTN_MAX - 1)
++ 
++ 
+diff --git a/target/linux/generic/pending-5.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch b/target/linux/generic/pending-5.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
+new file mode 100644
+index 0000000000..e0540866c6
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
+@@ -0,0 +1,149 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: net: replace GRO optimization patch with a new one that supports VLANs/bridges with different MAC addresses
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ include/linux/netdevice.h |  2 ++
++ include/linux/skbuff.h    |  3 ++-
++ net/core/dev.c            | 48 +++++++++++++++++++++++++++++++++++++++++++++++
++ net/ethernet/eth.c        | 18 +++++++++++++++++-
++ 4 files changed, 69 insertions(+), 2 deletions(-)
++
++--- a/include/linux/netdevice.h
+++++ b/include/linux/netdevice.h
++@@ -1931,6 +1931,8 @@ struct net_device {
++ 	struct netdev_hw_addr_list	mc;
++ 	struct netdev_hw_addr_list	dev_addrs;
++ 
+++	unsigned char		local_addr_mask[MAX_ADDR_LEN];
+++
++ #ifdef CONFIG_SYSFS
++ 	struct kset		*queues_kset;
++ #endif
++--- a/include/linux/skbuff.h
+++++ b/include/linux/skbuff.h
++@@ -824,6 +824,7 @@ struct sk_buff {
++ #ifdef CONFIG_TLS_DEVICE
++ 	__u8			decrypted:1;
++ #endif
+++	__u8			gro_skip:1;
++ 
++ #ifdef CONFIG_NET_SCHED
++ 	__u16			tc_index;	/* traffic control index */
++--- a/net/core/dev.c
+++++ b/net/core/dev.c
++@@ -5495,6 +5495,9 @@ static enum gro_result dev_gro_receive(s
++ 	int same_flow;
++ 	int grow;
++ 
+++	if (skb->gro_skip)
+++		goto normal;
+++
++ 	if (netif_elide_gro(skb->dev))
++ 		goto normal;
++ 
++@@ -7297,6 +7300,48 @@ static void __netdev_adjacent_dev_unlink
++ 					   &upper_dev->adj_list.lower);
++ }
++ 
+++static void __netdev_addr_mask(unsigned char *mask, const unsigned char *addr,
+++			       struct net_device *dev)
+++{
+++	int i;
+++
+++	for (i = 0; i < dev->addr_len; i++)
+++		mask[i] |= addr[i] ^ dev->dev_addr[i];
+++}
+++
+++static void __netdev_upper_mask(unsigned char *mask, struct net_device *dev,
+++				struct net_device *lower)
+++{
+++	struct net_device *cur;
+++	struct list_head *iter;
+++
+++	netdev_for_each_upper_dev_rcu(dev, cur, iter) {
+++		__netdev_addr_mask(mask, cur->dev_addr, lower);
+++		__netdev_upper_mask(mask, cur, lower);
+++	}
+++}
+++
+++static void __netdev_update_addr_mask(struct net_device *dev)
+++{
+++	unsigned char mask[MAX_ADDR_LEN];
+++	struct net_device *cur;
+++	struct list_head *iter;
+++
+++	memset(mask, 0, sizeof(mask));
+++	__netdev_upper_mask(mask, dev, dev);
+++	memcpy(dev->local_addr_mask, mask, dev->addr_len);
+++
+++	netdev_for_each_lower_dev(dev, cur, iter)
+++		__netdev_update_addr_mask(cur);
+++}
+++
+++static void netdev_update_addr_mask(struct net_device *dev)
+++{
+++	rcu_read_lock();
+++	__netdev_update_addr_mask(dev);
+++	rcu_read_unlock();
+++}
+++
++ static int __netdev_upper_dev_link(struct net_device *dev,
++ 				   struct net_device *upper_dev, bool master,
++ 				   void *upper_priv, void *upper_info,
++@@ -7347,6 +7392,7 @@ static int __netdev_upper_dev_link(struc
++ 	if (ret)
++ 		return ret;
++ 
+++	netdev_update_addr_mask(dev);
++ 	ret = call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
++ 					    &changeupper_info.info);
++ 	ret = notifier_to_errno(ret);
++@@ -7440,6 +7486,7 @@ void netdev_upper_dev_unlink(struct net_
++ 
++ 	__netdev_adjacent_dev_unlink_neighbour(dev, upper_dev);
++ 
+++	netdev_update_addr_mask(dev);
++ 	call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
++ 				      &changeupper_info.info);
++ 
++@@ -8170,6 +8217,7 @@ int dev_set_mac_address(struct net_devic
++ 	if (err)
++ 		return err;
++ 	dev->addr_assign_type = NET_ADDR_SET;
+++	netdev_update_addr_mask(dev);
++ 	call_netdevice_notifiers(NETDEV_CHANGEADDR, dev);
++ 	add_device_randomness(dev->dev_addr, dev->addr_len);
++ 	return 0;
++--- a/net/ethernet/eth.c
+++++ b/net/ethernet/eth.c
++@@ -143,6 +143,18 @@ u32 eth_get_headlen(const struct net_dev
++ }
++ EXPORT_SYMBOL(eth_get_headlen);
++ 
+++static inline bool
+++eth_check_local_mask(const void *addr1, const void *addr2, const void *mask)
+++{
+++	const u16 *a1 = addr1;
+++	const u16 *a2 = addr2;
+++	const u16 *m = mask;
+++
+++	return (((a1[0] ^ a2[0]) & ~m[0]) |
+++		((a1[1] ^ a2[1]) & ~m[1]) |
+++		((a1[2] ^ a2[2]) & ~m[2]));
+++}
+++
++ /**
++  * eth_type_trans - determine the packet's protocol ID.
++  * @skb: received socket data
++@@ -174,6 +186,10 @@ __be16 eth_type_trans(struct sk_buff *sk
++ 		} else {
++ 			skb->pkt_type = PACKET_OTHERHOST;
++ 		}
+++
+++		if (eth_check_local_mask(eth->h_dest, dev->dev_addr,
+++					 dev->local_addr_mask))
+++			skb->gro_skip = 1;
++ 	}
++ 
++ 	/*
+diff --git a/target/linux/generic/pending-5.4/681-NET-add-of_get_mac_address_mtd.patch b/target/linux/generic/pending-5.4/681-NET-add-of_get_mac_address_mtd.patch
+new file mode 100644
+index 0000000000..b02febefd8
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/681-NET-add-of_get_mac_address_mtd.patch
+@@ -0,0 +1,135 @@
++From: John Crispin <blogic@openwrt.org>
++Subject: NET: add mtd-mac-address support to of_get_mac_address()
++
++Many embedded devices have information such as mac addresses stored inside mtd
++devices. This patch allows us to add a property inside a node describing a
++network interface. The new property points at a mtd partition with an offset
++where the mac address can be found.
++
++Signed-off-by: John Crispin <blogic@openwrt.org>
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ drivers/of/of_net.c    |   37 +++++++++++++++++++++++++++++++++++++
++ include/linux/of_net.h |    1 +
++ 2 files changed, 38 insertions(+)
++
++--- a/drivers/of/of_net.c
+++++ b/drivers/of/of_net.c
++@@ -11,6 +11,7 @@
++ #include <linux/phy.h>
++ #include <linux/export.h>
++ #include <linux/device.h>
+++#include <linux/mtd/mtd.h>
++ 
++ /**
++  * of_get_phy_mode - Get phy mode for given device_node
++@@ -39,7 +40,7 @@ int of_get_phy_mode(struct device_node *
++ }
++ EXPORT_SYMBOL_GPL(of_get_phy_mode);
++ 
++-static const void *of_get_mac_addr(struct device_node *np, const char *name)
+++static void *of_get_mac_addr(struct device_node *np, const char *name)
++ {
++ 	struct property *pp = of_find_property(np, name, NULL);
++ 
++@@ -72,6 +73,79 @@ static const void *of_get_mac_addr_nvmem
++ 	return mac;
++ }
++ 
+++static const void *of_get_mac_address_mtd(struct device_node *np)
+++{
+++#ifdef CONFIG_MTD
+++	struct device_node *mtd_np = NULL;
+++	struct property *prop;
+++	size_t retlen;
+++	int size, ret;
+++	struct mtd_info *mtd;
+++	const char *part;
+++	const __be32 *list;
+++	phandle phandle;
+++	u32 mac_inc = 0;
+++	u8 mac[ETH_ALEN];
+++	void *addr;
+++	u32 inc_idx;
+++
+++	list = of_get_property(np, "mtd-mac-address", &size);
+++	if (!list || (size != (2 * sizeof(*list))))
+++		return NULL;
+++
+++	phandle = be32_to_cpup(list++);
+++	if (phandle)
+++		mtd_np = of_find_node_by_phandle(phandle);
+++
+++	if (!mtd_np)
+++		return NULL;
+++
+++	part = of_get_property(mtd_np, "label", NULL);
+++	if (!part)
+++		part = mtd_np->name;
+++
+++	mtd = get_mtd_device_nm(part);
+++	if (IS_ERR(mtd))
+++		return NULL;
+++
+++	ret = mtd_read(mtd, be32_to_cpup(list), 6, &retlen, mac);
+++	put_mtd_device(mtd);
+++
+++	if (of_property_read_u32(np, "mtd-mac-address-increment-byte", &inc_idx))
+++		inc_idx = 5;
+++	if (inc_idx > 5)
+++		return NULL;
+++
+++	if (!of_property_read_u32(np, "mtd-mac-address-increment", &mac_inc))
+++		mac[inc_idx] += mac_inc;
+++
+++	if (!is_valid_ether_addr(mac))
+++		return NULL;
+++
+++	addr = of_get_mac_addr(np, "mac-address");
+++	if (addr) {
+++		memcpy(addr, mac, ETH_ALEN);
+++		return addr;
+++	}
+++
+++	prop = kzalloc(sizeof(*prop), GFP_KERNEL);
+++	if (!prop)
+++		return NULL;
+++
+++	prop->name = "mac-address";
+++	prop->length = ETH_ALEN;
+++	prop->value = kmemdup(mac, ETH_ALEN, GFP_KERNEL);
+++	if (!prop->value || of_add_property(np, prop))
+++		goto free;
+++
+++	return prop->value;
+++free:
+++	kfree(prop->value);
+++	kfree(prop);
+++#endif
+++	return NULL;
+++}
+++
++ /**
++  * Search the device tree for the best MAC address to use.  'mac-address' is
++  * checked first, because that is supposed to contain to "most recent" MAC
++@@ -92,12 +166,20 @@ static const void *of_get_mac_addr_nvmem
++  * this case, the real MAC is in 'local-mac-address', and 'mac-address' exists
++  * but is all zeros.
++  *
+++ *
+++ * If a mtd-mac-address property exists, try to fetch the MAC address from the
+++ * specified mtd device, and store it as a 'mac-address' property
+++ *
++  * Return: Will be a valid pointer on success and ERR_PTR in case of error.
++ */
++ const void *of_get_mac_address(struct device_node *np)
++ {
++ 	const void *addr;
++ 
+++	addr = of_get_mac_address_mtd(np);
+++	if (addr)
+++		return addr;
+++
++ 	addr = of_get_mac_addr(np, "mac-address");
++ 	if (addr)
++ 		return addr;
+diff --git a/target/linux/generic/pending-5.4/703-phy-add-detach-callback-to-struct-phy_driver.patch b/target/linux/generic/pending-5.4/703-phy-add-detach-callback-to-struct-phy_driver.patch
+new file mode 100644
+index 0000000000..b74b04ca59
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/703-phy-add-detach-callback-to-struct-phy_driver.patch
+@@ -0,0 +1,38 @@
++From: Gabor Juhos <juhosg@openwrt.org>
++Subject: generic: add detach callback to struct phy_driver
++
++lede-commit: fe61fc2d7d0b3fb348b502f68f98243b3ddf5867
++
++Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
++---
++ drivers/net/phy/phy_device.c | 3 +++
++ include/linux/phy.h          | 6 ++++++
++ 2 files changed, 9 insertions(+)
++
++--- a/drivers/net/phy/phy_device.c
+++++ b/drivers/net/phy/phy_device.c
++@@ -1465,6 +1465,9 @@ void phy_detach(struct phy_device *phyde
++ 	struct module *ndev_owner = NULL;
++ 	struct mii_bus *bus;
++ 
+++	if (phydev->drv && phydev->drv->detach)
+++		phydev->drv->detach(phydev);
+++
++ 	if (phydev->sysfs_links) {
++ 		if (dev)
++ 			sysfs_remove_link(&dev->dev.kobj, "phydev");
++--- a/include/linux/phy.h
+++++ b/include/linux/phy.h
++@@ -540,6 +540,12 @@ struct phy_driver {
++ 	/* Override default interrupt handling */
++ 	int (*handle_interrupt)(struct phy_device *phydev);
++ 
+++	/*
+++	 * Called before an ethernet device is detached
+++	 * from the PHY.
+++	 */
+++	void (*detach)(struct phy_device *phydev);
+++
++ 	/* Clears up any memory if needed */
++ 	void (*remove)(struct phy_device *phydev);
++ 
+diff --git a/target/linux/generic/pending-5.4/710-bridge-add-sysctl-knob-for-filtering-rx-tx-BPDU-pack.patch b/target/linux/generic/pending-5.4/710-bridge-add-sysctl-knob-for-filtering-rx-tx-BPDU-pack.patch
+new file mode 100644
+index 0000000000..586d264cd5
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/710-bridge-add-sysctl-knob-for-filtering-rx-tx-BPDU-pack.patch
+@@ -0,0 +1,107 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 27 Aug 2021 12:22:32 +0200
++Subject: [PATCH] bridge: add sysctl knob for filtering rx/tx BPDU packets on a
++ port
++
++Some devices (e.g. wireless APs) can't have devices behind them be part of
++a bridge topology with redundant links, due to address limitations.
++Additionally, broadcast traffic on these devices is somewhat expensive, due to
++the low data rate and wakeups of clients in powersave mode.
++This sysctl knob can be used to ensure that BPDU packets are never sent
++or forwarded to/from these devices
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/include/linux/if_bridge.h
+++++ b/include/linux/if_bridge.h
++@@ -47,6 +47,7 @@ struct br_ip_list {
++ #define BR_BCAST_FLOOD		BIT(14)
++ #define BR_NEIGH_SUPPRESS	BIT(15)
++ #define BR_ISOLATED		BIT(16)
+++#define BR_BPDU_FILTER		BIT(17)
++ 
++ #define BR_DEFAULT_AGEING_TIME	(300 * HZ)
++ 
++--- a/net/bridge/br_forward.c
+++++ b/net/bridge/br_forward.c
++@@ -191,6 +191,7 @@ out:
++ void br_flood(struct net_bridge *br, struct sk_buff *skb,
++ 	      enum br_pkt_type pkt_type, bool local_rcv, bool local_orig)
++ {
+++	const unsigned char *dest = eth_hdr(skb)->h_dest;
++ 	struct net_bridge_port *prev = NULL;
++ 	struct net_bridge_port *p;
++ 
++@@ -206,6 +207,10 @@ void br_flood(struct net_bridge *br, str
++ 		case BR_PKT_MULTICAST:
++ 			if (!(p->flags & BR_MCAST_FLOOD) && skb->dev != br->dev)
++ 				continue;
+++			if ((p->flags & BR_BPDU_FILTER) &&
+++			    unlikely(is_link_local_ether_addr(dest) &&
+++				     dest[5] == 0))
+++				continue;
++ 			break;
++ 		case BR_PKT_BROADCAST:
++ 			if (!(p->flags & BR_BCAST_FLOOD) && skb->dev != br->dev)
++--- a/net/bridge/br_input.c
+++++ b/net/bridge/br_input.c
++@@ -300,6 +300,8 @@ rx_handler_result_t br_handle_frame(stru
++ 		fwd_mask |= p->group_fwd_mask;
++ 		switch (dest[5]) {
++ 		case 0x00:	/* Bridge Group Address */
+++			if (p->flags & BR_BPDU_FILTER)
+++				goto drop;
++ 			/* If STP is turned off,
++ 			   then must forward to keep loop detection */
++ 			if (p->br->stp_enabled == BR_NO_STP ||
++--- a/net/bridge/br_sysfs_if.c
+++++ b/net/bridge/br_sysfs_if.c
++@@ -233,6 +233,7 @@ BRPORT_ATTR_FLAG(multicast_flood, BR_MCA
++ BRPORT_ATTR_FLAG(broadcast_flood, BR_BCAST_FLOOD);
++ BRPORT_ATTR_FLAG(neigh_suppress, BR_NEIGH_SUPPRESS);
++ BRPORT_ATTR_FLAG(isolated, BR_ISOLATED);
+++BRPORT_ATTR_FLAG(bpdu_filter, BR_BPDU_FILTER);
++ 
++ #ifdef CONFIG_BRIDGE_IGMP_SNOOPING
++ static ssize_t show_multicast_router(struct net_bridge_port *p, char *buf)
++@@ -285,6 +286,7 @@ static const struct brport_attribute *br
++ 	&brport_attr_group_fwd_mask,
++ 	&brport_attr_neigh_suppress,
++ 	&brport_attr_isolated,
+++	&brport_attr_bpdu_filter,
++ 	&brport_attr_backup_port,
++ 	NULL
++ };
++--- a/net/bridge/br_stp_bpdu.c
+++++ b/net/bridge/br_stp_bpdu.c
++@@ -80,7 +80,8 @@ void br_send_config_bpdu(struct net_brid
++ {
++ 	unsigned char buf[35];
++ 
++-	if (p->br->stp_enabled != BR_KERNEL_STP)
+++	if (p->br->stp_enabled != BR_KERNEL_STP ||
+++	    (p->flags & BR_BPDU_FILTER))
++ 		return;
++ 
++ 	buf[0] = 0;
++@@ -125,7 +126,8 @@ void br_send_tcn_bpdu(struct net_bridge_
++ {
++ 	unsigned char buf[4];
++ 
++-	if (p->br->stp_enabled != BR_KERNEL_STP)
+++	if (p->br->stp_enabled != BR_KERNEL_STP ||
+++	    (p->flags & BR_BPDU_FILTER))
++ 		return;
++ 
++ 	buf[0] = 0;
++@@ -168,6 +170,9 @@ void br_stp_rcv(const struct stp_proto *
++ 	if (!(br->dev->flags & IFF_UP))
++ 		goto out;
++ 
+++	if (p->flags & BR_BPDU_FILTER)
+++		goto out;
+++
++ 	if (p->state == BR_STATE_DISABLED)
++ 		goto out;
++ 
+diff --git a/target/linux/generic/pending-5.4/735-net-phy-at803x-fix-at8033-sgmii-mode.patch b/target/linux/generic/pending-5.4/735-net-phy-at803x-fix-at8033-sgmii-mode.patch
+new file mode 100644
+index 0000000000..795743057a
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/735-net-phy-at803x-fix-at8033-sgmii-mode.patch
+@@ -0,0 +1,51 @@
++From: Roman Yeryomin <roman@advem.lv>
++Subject: kernel: add at803x fix for sgmii mode
++
++Some (possibly broken) bootloaders incorreclty initialize at8033
++phy. This patch enables sgmii autonegotiation mode.
++
++[john@phrozen.org: felix added this to his upstream queue]
++
++Signed-off-by: Roman Yeryomin <roman@advem.lv>
++---
++ drivers/net/phy/at803x.c | 25 +++++++++++++++++++++++++
++ 1 file changed, 25 insertions(+)
++
++--- a/drivers/net/phy/at803x.c
+++++ b/drivers/net/phy/at803x.c
++@@ -46,6 +46,7 @@
++ #define AT803X_LOC_MAC_ADDR_32_47_OFFSET	0x804A
++ #define AT803X_REG_CHIP_CONFIG			0x1f
++ #define AT803X_BT_BX_REG_SEL			0x8000
+++#define AT803X_SGMII_ANEG_EN			0x1000
++ 
++ #define AT803X_DEBUG_ADDR			0x1D
++ #define AT803X_DEBUG_DATA			0x1E
++@@ -259,6 +260,27 @@ static int at803x_probe(struct phy_devic
++ static int at803x_config_init(struct phy_device *phydev)
++ {
++ 	int ret;
+++	u32 v;
+++
+++	if (phydev->drv->phy_id == ATH8031_PHY_ID &&
+++		phydev->interface == PHY_INTERFACE_MODE_SGMII)
+++	{
+++		v = phy_read(phydev, AT803X_REG_CHIP_CONFIG);
+++		/* select SGMII/fiber page */
+++		ret = phy_write(phydev, AT803X_REG_CHIP_CONFIG,
+++						v & ~AT803X_BT_BX_REG_SEL);
+++		if (ret)
+++			return ret;
+++		/* enable SGMII autonegotiation */
+++		ret = phy_write(phydev, MII_BMCR, AT803X_SGMII_ANEG_EN);
+++		if (ret)
+++			return ret;
+++		/* select copper page */
+++		ret = phy_write(phydev, AT803X_REG_CHIP_CONFIG,
+++						v | AT803X_BT_BX_REG_SEL);
+++		if (ret)
+++			return ret;
+++	}
++ 
++ 	/* The RX and TX delay default is:
++ 	 *   after HW reset: RX delay enabled and TX delay disabled
+diff --git a/target/linux/generic/pending-5.4/739-net-avoid-tx-fault-with-Nokia-GPON-module.patch b/target/linux/generic/pending-5.4/739-net-avoid-tx-fault-with-Nokia-GPON-module.patch
+new file mode 100644
+index 0000000000..627d33e2ea
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/739-net-avoid-tx-fault-with-Nokia-GPON-module.patch
+@@ -0,0 +1,108 @@
++From 283b211aa01bdae94dffb3121655dbb20bf237f4 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Tue, 3 Dec 2019 15:22:05 +0000
++Subject: net: sfp: avoid tx-fault with Nokia GPON module
++
++The Nokia GPON module can hold tx-fault active while it is initialising
++which can take up to 60s. Avoid this causing the module to be declared
++faulty after the SFP MSA defined non-cooled module timeout.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 42 ++++++++++++++++++++++++++++++------------
++ 1 file changed, 30 insertions(+), 12 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -155,10 +155,20 @@ static const enum gpiod_flags gpio_flags
++ 	GPIOD_ASIS,
++ };
++ 
++-#define T_WAIT		msecs_to_jiffies(50)
++-#define T_INIT_JIFFIES	msecs_to_jiffies(300)
++-#define T_RESET_US	10
++-#define T_FAULT_RECOVER	msecs_to_jiffies(1000)
+++/* t_start_up (SFF-8431) or t_init (SFF-8472) is the time required for a
+++ * non-cooled module to initialise its laser safety circuitry. We wait
+++ * an initial T_WAIT period before we check the tx fault to give any PHY
+++ * on board (for a copper SFP) time to initialise.
+++ */
+++#define T_WAIT			msecs_to_jiffies(50)
+++#define T_START_UP		msecs_to_jiffies(300)
+++#define T_START_UP_BAD_GPON	msecs_to_jiffies(60000)
+++
+++/* t_reset is the time required to assert the TX_DISABLE signal to reset
+++ * an indicated TX_FAULT.
+++ */
+++#define T_RESET_US		10
+++#define T_FAULT_RECOVER		msecs_to_jiffies(1000)
++ 
++ /* SFP module presence detection is poor: the three MOD DEF signals are
++  * the same length on the PCB, which means it's possible for MOD DEF 0 to
++@@ -218,6 +228,7 @@ struct sfp {
++ 
++ 	struct sfp_eeprom_id id;
++ 	unsigned int module_power_mW;
+++	unsigned int module_t_start_up;
++ 
++ #if IS_ENABLED(CONFIG_HWMON)
++ 	struct sfp_diag diag;
++@@ -1655,6 +1666,12 @@ static int sfp_sm_mod_probe(struct sfp *
++ 	if (ret < 0)
++ 		return ret;
++ 
+++	if (!memcmp(id.base.vendor_name, "ALCATELLUCENT   ", 16) &&
+++	    !memcmp(id.base.vendor_pn, "3FE46541AA      ", 16))
+++		sfp->module_t_start_up = T_START_UP_BAD_GPON;
+++	else
+++		sfp->module_t_start_up = T_START_UP;
+++
++ 	return 0;
++ }
++ 
++@@ -1860,11 +1877,12 @@ static void sfp_sm_main(struct sfp *sfp,
++ 			break;
++ 
++ 		if (sfp->state & SFP_F_TX_FAULT) {
++-			/* Wait t_init before indicating that the link is up,
++-			 * provided the current state indicates no TX_FAULT. If
++-			 * TX_FAULT clears before this time, that's fine too.
+++			/* Wait up to t_init (SFF-8472) or t_start_up (SFF-8431)
+++			 * from the TX_DISABLE deassertion for the module to
+++			 * initialise, which is indicated by TX_FAULT
+++			 * deasserting.
++ 			 */
++-			timeout = T_INIT_JIFFIES;
+++			timeout = sfp->module_t_start_up;
++ 			if (timeout > T_WAIT)
++ 				timeout -= T_WAIT;
++ 			else
++@@ -1881,8 +1899,8 @@ static void sfp_sm_main(struct sfp *sfp,
++ 
++ 	case SFP_S_INIT:
++ 		if (event == SFP_E_TIMEOUT && sfp->state & SFP_F_TX_FAULT) {
++-			/* TX_FAULT is still asserted after t_init, so assume
++-			 * there is a fault.
+++			/* TX_FAULT is still asserted after t_init or
+++			 * or t_start_up, so assume there is a fault.
++ 			 */
++ 			sfp_sm_fault(sfp, SFP_S_INIT_TX_FAULT,
++ 				     sfp->sm_retries == 5);
++@@ -1901,7 +1919,7 @@ static void sfp_sm_main(struct sfp *sfp,
++ 	case SFP_S_INIT_TX_FAULT:
++ 		if (event == SFP_E_TIMEOUT) {
++ 			sfp_module_tx_fault_reset(sfp);
++-			sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES);
+++			sfp_sm_next(sfp, SFP_S_INIT, sfp->module_t_start_up);
++ 		}
++ 		break;
++ 
++@@ -1925,7 +1943,7 @@ static void sfp_sm_main(struct sfp *sfp,
++ 	case SFP_S_TX_FAULT:
++ 		if (event == SFP_E_TIMEOUT) {
++ 			sfp_module_tx_fault_reset(sfp);
++-			sfp_sm_next(sfp, SFP_S_REINIT, T_INIT_JIFFIES);
+++			sfp_sm_next(sfp, SFP_S_REINIT, sfp->module_t_start_up);
++ 		}
++ 		break;
++ 
+diff --git a/target/linux/generic/pending-5.4/740-net-sfp-remove-incomplete-100BASE-FX-and-100BASE-LX-.patch b/target/linux/generic/pending-5.4/740-net-sfp-remove-incomplete-100BASE-FX-and-100BASE-LX-.patch
+new file mode 100644
+index 0000000000..4de6305827
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/740-net-sfp-remove-incomplete-100BASE-FX-and-100BASE-LX-.patch
+@@ -0,0 +1,52 @@
++From 29cd215aaf6c2050c43e4de03aee436c16f90b96 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Thu, 21 Nov 2019 17:27:14 +0000
++Subject: [PATCH 643/660] net: sfp: remove incomplete 100BASE-FX and 100BASE-LX
++ support
++
++The 100BASE-FX and 100BASE-LX support assumes a PHY is present; this
++is probably an incorrect assumption. In any case, sfp_parse_support()
++will fail such a module. Let's stop pretending we support these
++modules.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp-bus.c |  4 +---
++ drivers/net/phy/sfp.c     | 13 +------------
++ 2 files changed, 2 insertions(+), 15 deletions(-)
++
++--- a/drivers/net/phy/sfp-bus.c
+++++ b/drivers/net/phy/sfp-bus.c
++@@ -342,9 +342,7 @@ phy_interface_t sfp_select_interface(str
++ 	if (phylink_test(link_modes, 2500baseX_Full))
++ 		return PHY_INTERFACE_MODE_2500BASEX;
++ 
++-	if (id->base.e1000_base_t ||
++-	    id->base.e100_base_lx ||
++-	    id->base.e100_base_fx)
+++	if (id->base.e1000_base_t)
++ 		return PHY_INTERFACE_MODE_SGMII;
++ 
++ 	if (phylink_test(link_modes, 1000baseX_Full))
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -1489,18 +1489,7 @@ static void sfp_sm_fault(struct sfp *sfp
++ 
++ static void sfp_sm_probe_for_phy(struct sfp *sfp)
++ {
++-	/* Setting the serdes link mode is guesswork: there's no
++-	 * field in the EEPROM which indicates what mode should
++-	 * be used.
++-	 *
++-	 * If it's a gigabit-only fiber module, it probably does
++-	 * not have a PHY, so switch to 802.3z negotiation mode.
++-	 * Otherwise, switch to SGMII mode (which is required to
++-	 * support non-gigabit speeds) and probe for a PHY.
++-	 */
++-	if (sfp->id.base.e1000_base_t ||
++-	    sfp->id.base.e100_base_lx ||
++-	    sfp->id.base.e100_base_fx)
+++	if (sfp->id.base.e1000_base_t)
++ 		sfp_sm_probe_phy(sfp);
++ }
++ 
+diff --git a/target/linux/generic/pending-5.4/741-net-sfp-derive-interface-mode-from-ethtool-link-mode.patch b/target/linux/generic/pending-5.4/741-net-sfp-derive-interface-mode-from-ethtool-link-mode.patch
+new file mode 100644
+index 0000000000..8158c78b0e
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/741-net-sfp-derive-interface-mode-from-ethtool-link-mode.patch
+@@ -0,0 +1,89 @@
++From dc45d9e04572b5cd6d32f51cdf9f62b18022e6dd Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Thu, 21 Nov 2019 17:32:59 +0000
++Subject: [PATCH 644/660] net: sfp: derive interface mode from ethtool link
++ modes
++
++We don't need the EEPROM ID to derive the phy interface mode as we can
++derive it merely from the ethtool link modes.  Remove the EEPROM ID
++argument to sfp_select_interface().
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/marvell10g.c |  2 +-
++ drivers/net/phy/phylink.c    |  2 +-
++ drivers/net/phy/sfp-bus.c    | 11 ++++-------
++ include/linux/sfp.h          |  2 --
++ 4 files changed, 6 insertions(+), 11 deletions(-)
++
++--- a/drivers/net/phy/marvell10g.c
+++++ b/drivers/net/phy/marvell10g.c
++@@ -214,7 +214,7 @@ static int mv3310_sfp_insert(void *upstr
++ 	phy_interface_t iface;
++ 
++ 	sfp_parse_support(phydev->sfp_bus, id, support);
++-	iface = sfp_select_interface(phydev->sfp_bus, id, support);
+++	iface = sfp_select_interface(phydev->sfp_bus, support);
++ 
++ 	if (iface != PHY_INTERFACE_MODE_10GKR) {
++ 		dev_err(&phydev->mdio.dev, "incompatible SFP module inserted\n");
++--- a/drivers/net/phy/phylink.c
+++++ b/drivers/net/phy/phylink.c
++@@ -1718,7 +1718,7 @@ static int phylink_sfp_module_insert(voi
++ 
++ 	linkmode_copy(support1, support);
++ 
++-	iface = sfp_select_interface(pl->sfp_bus, id, config.advertising);
+++	iface = sfp_select_interface(pl->sfp_bus, config.advertising);
++ 	if (iface == PHY_INTERFACE_MODE_NA) {
++ 		phylink_err(pl,
++ 			    "selection of interface failed, advertisement %*pb\n",
++--- a/drivers/net/phy/sfp-bus.c
+++++ b/drivers/net/phy/sfp-bus.c
++@@ -320,16 +320,12 @@ EXPORT_SYMBOL_GPL(sfp_parse_support);
++ /**
++  * sfp_select_interface() - Select appropriate phy_interface_t mode
++  * @bus: a pointer to the &struct sfp_bus structure for the sfp module
++- * @id: a pointer to the module's &struct sfp_eeprom_id
++  * @link_modes: ethtool link modes mask
++  *
++- * Derive the phy_interface_t mode for the information found in the
++- * module's identifying EEPROM and the link modes mask. There is no
++- * standard or defined way to derive this information, so we decide
++- * based upon the link mode mask.
+++ * Derive the phy_interface_t mode for the SFP module from the link
+++ * modes mask.
++  */
++ phy_interface_t sfp_select_interface(struct sfp_bus *bus,
++-				     const struct sfp_eeprom_id *id,
++ 				     unsigned long *link_modes)
++ {
++ 	if (phylink_test(link_modes, 10000baseCR_Full) ||
++@@ -342,7 +338,8 @@ phy_interface_t sfp_select_interface(str
++ 	if (phylink_test(link_modes, 2500baseX_Full))
++ 		return PHY_INTERFACE_MODE_2500BASEX;
++ 
++-	if (id->base.e1000_base_t)
+++	if (phylink_test(link_modes, 1000baseT_Half) ||
+++	    phylink_test(link_modes, 1000baseT_Full))
++ 		return PHY_INTERFACE_MODE_SGMII;
++ 
++ 	if (phylink_test(link_modes, 1000baseX_Full))
++--- a/include/linux/sfp.h
+++++ b/include/linux/sfp.h
++@@ -504,7 +504,6 @@ int sfp_parse_port(struct sfp_bus *bus,
++ void sfp_parse_support(struct sfp_bus *bus, const struct sfp_eeprom_id *id,
++ 		       unsigned long *support);
++ phy_interface_t sfp_select_interface(struct sfp_bus *bus,
++-				     const struct sfp_eeprom_id *id,
++ 				     unsigned long *link_modes);
++ 
++ int sfp_get_module_info(struct sfp_bus *bus, struct ethtool_modinfo *modinfo);
++@@ -532,7 +531,6 @@ static inline void sfp_parse_support(str
++ }
++ 
++ static inline phy_interface_t sfp_select_interface(struct sfp_bus *bus,
++-						   const struct sfp_eeprom_id *id,
++ 						   unsigned long *link_modes)
++ {
++ 	return PHY_INTERFACE_MODE_NA;
+diff --git a/target/linux/generic/pending-5.4/742-net-sfp-add-more-extended-compliance-codes.patch b/target/linux/generic/pending-5.4/742-net-sfp-add-more-extended-compliance-codes.patch
+new file mode 100644
+index 0000000000..0ddca287b9
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/742-net-sfp-add-more-extended-compliance-codes.patch
+@@ -0,0 +1,251 @@
++From c66a4e76c8554c84e64b9315314576ac403c6641 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Thu, 26 Sep 2019 15:14:18 +0100
++Subject: [PATCH 645/660] net: sfp: add more extended compliance codes
++
++SFF-8024 is used to define various constants re-used in several SFF
++SFP-related specifications.  Split these constants from the enum, and
++rename them to indicate that they're defined by SFF-8024.
++
++Add and use updated SFF-8024 extended compliance code definitions for
++10GBASE-T, 5GBASE-T and 2.5GBASE-T modules.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp-bus.c | 60 ++++++++++++++++------------
++ drivers/net/phy/sfp.c     |  4 +-
++ include/linux/sfp.h       | 82 ++++++++++++++++++++++++++-------------
++ 3 files changed, 93 insertions(+), 53 deletions(-)
++
++--- a/drivers/net/phy/sfp-bus.c
+++++ b/drivers/net/phy/sfp-bus.c
++@@ -124,35 +124,35 @@ int sfp_parse_port(struct sfp_bus *bus,
++ 
++ 	/* port is the physical connector, set this from the connector field. */
++ 	switch (id->base.connector) {
++-	case SFP_CONNECTOR_SC:
++-	case SFP_CONNECTOR_FIBERJACK:
++-	case SFP_CONNECTOR_LC:
++-	case SFP_CONNECTOR_MT_RJ:
++-	case SFP_CONNECTOR_MU:
++-	case SFP_CONNECTOR_OPTICAL_PIGTAIL:
+++	case SFF8024_CONNECTOR_SC:
+++	case SFF8024_CONNECTOR_FIBERJACK:
+++	case SFF8024_CONNECTOR_LC:
+++	case SFF8024_CONNECTOR_MT_RJ:
+++	case SFF8024_CONNECTOR_MU:
+++	case SFF8024_CONNECTOR_OPTICAL_PIGTAIL:
+++	case SFF8024_CONNECTOR_MPO_1X12:
+++	case SFF8024_CONNECTOR_MPO_2X16:
++ 		port = PORT_FIBRE;
++ 		break;
++ 
++-	case SFP_CONNECTOR_RJ45:
+++	case SFF8024_CONNECTOR_RJ45:
++ 		port = PORT_TP;
++ 		break;
++ 
++-	case SFP_CONNECTOR_COPPER_PIGTAIL:
+++	case SFF8024_CONNECTOR_COPPER_PIGTAIL:
++ 		port = PORT_DA;
++ 		break;
++ 
++-	case SFP_CONNECTOR_UNSPEC:
+++	case SFF8024_CONNECTOR_UNSPEC:
++ 		if (id->base.e1000_base_t) {
++ 			port = PORT_TP;
++ 			break;
++ 		}
++ 		/* fallthrough */
++-	case SFP_CONNECTOR_SG: /* guess */
++-	case SFP_CONNECTOR_MPO_1X12:
++-	case SFP_CONNECTOR_MPO_2X16:
++-	case SFP_CONNECTOR_HSSDC_II:
++-	case SFP_CONNECTOR_NOSEPARATE:
++-	case SFP_CONNECTOR_MXC_2X16:
+++	case SFF8024_CONNECTOR_SG: /* guess */
+++	case SFF8024_CONNECTOR_HSSDC_II:
+++	case SFF8024_CONNECTOR_NOSEPARATE:
+++	case SFF8024_CONNECTOR_MXC_2X16:
++ 		port = PORT_OTHER;
++ 		break;
++ 	default:
++@@ -261,22 +261,33 @@ void sfp_parse_support(struct sfp_bus *b
++ 	}
++ 
++ 	switch (id->base.extended_cc) {
++-	case 0x00: /* Unspecified */
+++	case SFF8024_ECC_UNSPEC:
++ 		break;
++-	case 0x02: /* 100Gbase-SR4 or 25Gbase-SR */
+++	case SFF8024_ECC_100GBASE_SR4_25GBASE_SR:
++ 		phylink_set(modes, 100000baseSR4_Full);
++ 		phylink_set(modes, 25000baseSR_Full);
++ 		break;
++-	case 0x03: /* 100Gbase-LR4 or 25Gbase-LR */
++-	case 0x04: /* 100Gbase-ER4 or 25Gbase-ER */
+++	case SFF8024_ECC_100GBASE_LR4_25GBASE_LR:
+++	case SFF8024_ECC_100GBASE_ER4_25GBASE_ER:
++ 		phylink_set(modes, 100000baseLR4_ER4_Full);
++ 		break;
++-	case 0x0b: /* 100Gbase-CR4 or 25Gbase-CR CA-L */
++-	case 0x0c: /* 25Gbase-CR CA-S */
++-	case 0x0d: /* 25Gbase-CR CA-N */
+++	case SFF8024_ECC_100GBASE_CR4:
++ 		phylink_set(modes, 100000baseCR4_Full);
+++		/* fallthrough */
+++	case SFF8024_ECC_25GBASE_CR_S:
+++	case SFF8024_ECC_25GBASE_CR_N:
++ 		phylink_set(modes, 25000baseCR_Full);
++ 		break;
+++	case SFF8024_ECC_10GBASE_T_SFI:
+++	case SFF8024_ECC_10GBASE_T_SR:
+++		phylink_set(modes, 10000baseT_Full);
+++		break;
+++	case SFF8024_ECC_5GBASE_T:
+++		phylink_set(modes, 5000baseT_Full);
+++		break;
+++	case SFF8024_ECC_2_5GBASE_T:
+++		phylink_set(modes, 2500baseT_Full);
+++		break;
++ 	default:
++ 		dev_warn(bus->sfp_dev,
++ 			 "Unknown/unsupported extended compliance code: 0x%02x\n",
++@@ -301,7 +312,7 @@ void sfp_parse_support(struct sfp_bus *b
++ 	 */
++ 	if (bitmap_empty(modes, __ETHTOOL_LINK_MODE_MASK_NBITS)) {
++ 		/* If the encoding and bit rate allows 1000baseX */
++-		if (id->base.encoding == SFP_ENCODING_8B10B && br_nom &&
+++		if (id->base.encoding == SFF8024_ENCODING_8B10B && br_nom &&
++ 		    br_min <= 1300 && br_max >= 1200)
++ 			phylink_set(modes, 1000baseX_Full);
++ 	}
++@@ -332,7 +343,8 @@ phy_interface_t sfp_select_interface(str
++ 	    phylink_test(link_modes, 10000baseSR_Full) ||
++ 	    phylink_test(link_modes, 10000baseLR_Full) ||
++ 	    phylink_test(link_modes, 10000baseLRM_Full) ||
++-	    phylink_test(link_modes, 10000baseER_Full))
+++	    phylink_test(link_modes, 10000baseER_Full) ||
+++	    phylink_test(link_modes, 10000baseT_Full))
++ 		return PHY_INTERFACE_MODE_10GKR;
++ 
++ 	if (phylink_test(link_modes, 2500baseX_Full))
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -242,7 +242,7 @@ struct sfp {
++ 
++ static bool sff_module_supported(const struct sfp_eeprom_id *id)
++ {
++-	return id->base.phys_id == SFP_PHYS_ID_SFF &&
+++	return id->base.phys_id == SFF8024_ID_SFF_8472 &&
++ 	       id->base.phys_ext_id == SFP_PHYS_EXT_ID_SFP;
++ }
++ 
++@@ -253,7 +253,7 @@ static const struct sff_data sff_data =
++ 
++ static bool sfp_module_supported(const struct sfp_eeprom_id *id)
++ {
++-	return id->base.phys_id == SFP_PHYS_ID_SFP &&
+++	return id->base.phys_id == SFF8024_ID_SFP &&
++ 	       id->base.phys_ext_id == SFP_PHYS_EXT_ID_SFP;
++ }
++ 
++--- a/include/linux/sfp.h
+++++ b/include/linux/sfp.h
++@@ -275,6 +275,61 @@ struct sfp_diag {
++ 	__be16 cal_v_offset;
++ } __packed;
++ 
+++/* SFF8024 defined constants */
+++enum {
+++	SFF8024_ID_UNK			= 0x00,
+++	SFF8024_ID_SFF_8472		= 0x02,
+++	SFF8024_ID_SFP			= 0x03,
+++	SFF8024_ID_DWDM_SFP		= 0x0b,
+++	SFF8024_ID_QSFP_8438		= 0x0c,
+++	SFF8024_ID_QSFP_8436_8636	= 0x0d,
+++	SFF8024_ID_QSFP28_8636		= 0x11,
+++
+++	SFF8024_ENCODING_UNSPEC		= 0x00,
+++	SFF8024_ENCODING_8B10B		= 0x01,
+++	SFF8024_ENCODING_4B5B		= 0x02,
+++	SFF8024_ENCODING_NRZ		= 0x03,
+++	SFF8024_ENCODING_8472_MANCHESTER= 0x04,
+++	SFF8024_ENCODING_8472_SONET	= 0x05,
+++	SFF8024_ENCODING_8472_64B66B	= 0x06,
+++	SFF8024_ENCODING_8436_MANCHESTER= 0x06,
+++	SFF8024_ENCODING_8436_SONET	= 0x04,
+++	SFF8024_ENCODING_8436_64B66B	= 0x05,
+++	SFF8024_ENCODING_256B257B	= 0x07,
+++	SFF8024_ENCODING_PAM4		= 0x08,
+++
+++	SFF8024_CONNECTOR_UNSPEC	= 0x00,
+++	/* codes 01-05 not supportable on SFP, but some modules have single SC */
+++	SFF8024_CONNECTOR_SC		= 0x01,
+++	SFF8024_CONNECTOR_FIBERJACK	= 0x06,
+++	SFF8024_CONNECTOR_LC		= 0x07,
+++	SFF8024_CONNECTOR_MT_RJ		= 0x08,
+++	SFF8024_CONNECTOR_MU		= 0x09,
+++	SFF8024_CONNECTOR_SG		= 0x0a,
+++	SFF8024_CONNECTOR_OPTICAL_PIGTAIL= 0x0b,
+++	SFF8024_CONNECTOR_MPO_1X12	= 0x0c,
+++	SFF8024_CONNECTOR_MPO_2X16	= 0x0d,
+++	SFF8024_CONNECTOR_HSSDC_II	= 0x20,
+++	SFF8024_CONNECTOR_COPPER_PIGTAIL= 0x21,
+++	SFF8024_CONNECTOR_RJ45		= 0x22,
+++	SFF8024_CONNECTOR_NOSEPARATE	= 0x23,
+++	SFF8024_CONNECTOR_MXC_2X16	= 0x24,
+++
+++	SFF8024_ECC_UNSPEC		= 0x00,
+++	SFF8024_ECC_100G_25GAUI_C2M_AOC	= 0x01,
+++	SFF8024_ECC_100GBASE_SR4_25GBASE_SR = 0x02,
+++	SFF8024_ECC_100GBASE_LR4_25GBASE_LR = 0x03,
+++	SFF8024_ECC_100GBASE_ER4_25GBASE_ER = 0x04,
+++	SFF8024_ECC_100GBASE_SR10	= 0x05,
+++	SFF8024_ECC_100GBASE_CR4	= 0x0b,
+++	SFF8024_ECC_25GBASE_CR_S	= 0x0c,
+++	SFF8024_ECC_25GBASE_CR_N	= 0x0d,
+++	SFF8024_ECC_10GBASE_T_SFI	= 0x16,
+++	SFF8024_ECC_10GBASE_T_SR	= 0x1c,
+++	SFF8024_ECC_5GBASE_T		= 0x1d,
+++	SFF8024_ECC_2_5GBASE_T		= 0x1e,
+++};
+++
++ /* SFP EEPROM registers */
++ enum {
++ 	SFP_PHYS_ID			= 0x00,
++@@ -309,34 +364,7 @@ enum {
++ 	SFP_SFF8472_COMPLIANCE		= 0x5e,
++ 	SFP_CC_EXT			= 0x5f,
++ 
++-	SFP_PHYS_ID_SFF			= 0x02,
++-	SFP_PHYS_ID_SFP			= 0x03,
++ 	SFP_PHYS_EXT_ID_SFP		= 0x04,
++-	SFP_CONNECTOR_UNSPEC		= 0x00,
++-	/* codes 01-05 not supportable on SFP, but some modules have single SC */
++-	SFP_CONNECTOR_SC		= 0x01,
++-	SFP_CONNECTOR_FIBERJACK		= 0x06,
++-	SFP_CONNECTOR_LC		= 0x07,
++-	SFP_CONNECTOR_MT_RJ		= 0x08,
++-	SFP_CONNECTOR_MU		= 0x09,
++-	SFP_CONNECTOR_SG		= 0x0a,
++-	SFP_CONNECTOR_OPTICAL_PIGTAIL	= 0x0b,
++-	SFP_CONNECTOR_MPO_1X12		= 0x0c,
++-	SFP_CONNECTOR_MPO_2X16		= 0x0d,
++-	SFP_CONNECTOR_HSSDC_II		= 0x20,
++-	SFP_CONNECTOR_COPPER_PIGTAIL	= 0x21,
++-	SFP_CONNECTOR_RJ45		= 0x22,
++-	SFP_CONNECTOR_NOSEPARATE	= 0x23,
++-	SFP_CONNECTOR_MXC_2X16		= 0x24,
++-	SFP_ENCODING_UNSPEC		= 0x00,
++-	SFP_ENCODING_8B10B		= 0x01,
++-	SFP_ENCODING_4B5B		= 0x02,
++-	SFP_ENCODING_NRZ		= 0x03,
++-	SFP_ENCODING_8472_MANCHESTER	= 0x04,
++-	SFP_ENCODING_8472_SONET		= 0x05,
++-	SFP_ENCODING_8472_64B66B	= 0x06,
++-	SFP_ENCODING_256B257B		= 0x07,
++-	SFP_ENCODING_PAM4		= 0x08,
++ 	SFP_OPTIONS_HIGH_POWER_LEVEL	= BIT(13),
++ 	SFP_OPTIONS_PAGING_A2		= BIT(12),
++ 	SFP_OPTIONS_RETIMER		= BIT(11),
+diff --git a/target/linux/generic/pending-5.4/743-net-sfp-add-module-start-stop-upstream-notifications.patch b/target/linux/generic/pending-5.4/743-net-sfp-add-module-start-stop-upstream-notifications.patch
+new file mode 100644
+index 0000000000..44de1b2a32
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/743-net-sfp-add-module-start-stop-upstream-notifications.patch
+@@ -0,0 +1,131 @@
++From f9a5a54b59cb904b37bf7409a43635ab195d0214 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Tue, 19 Nov 2019 10:13:25 +0000
++Subject: [PATCH 646/660] net: sfp: add module start/stop upstream
++ notifications
++
++When dealing with some copper modules, we can't positively know the
++module capabilities are until we have probed the PHY. Without the full
++capabilities, we may end up failing a module that we could otherwise
++drive with a restricted set of capabilities.
++
++An example of this would be a module with a NBASE-T PHY plugged into
++a host that supports phy interface modes 2500BASE-X and SGMII. The
++PHY supports 10GBASE-R, 5000BASE-X, 2500BASE-X, SGMII interface modes,
++which means a subset of the capabilities are compatible with the host.
++
++However, reading the module EEPROM leads us to believe that the module
++only supports ethtool link mode 10GBASE-T, which is incompatible with
++the host - and thus results in the module being rejected.
++
++This patch adds an extra notification which are triggered after the
++SFP module's PHY probe, and a corresponding notification just before
++the PHY is removed.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp-bus.c | 21 +++++++++++++++++++++
++ drivers/net/phy/sfp.c     |  8 ++++++++
++ drivers/net/phy/sfp.h     |  2 ++
++ include/linux/sfp.h       |  4 ++++
++ 4 files changed, 35 insertions(+)
++
++--- a/drivers/net/phy/sfp-bus.c
+++++ b/drivers/net/phy/sfp-bus.c
++@@ -712,6 +712,27 @@ void sfp_module_remove(struct sfp_bus *b
++ }
++ EXPORT_SYMBOL_GPL(sfp_module_remove);
++ 
+++int sfp_module_start(struct sfp_bus *bus)
+++{
+++	const struct sfp_upstream_ops *ops = sfp_get_upstream_ops(bus);
+++	int ret = 0;
+++
+++	if (ops && ops->module_start)
+++		ret = ops->module_start(bus->upstream);
+++
+++	return ret;
+++}
+++EXPORT_SYMBOL_GPL(sfp_module_start);
+++
+++void sfp_module_stop(struct sfp_bus *bus)
+++{
+++	const struct sfp_upstream_ops *ops = sfp_get_upstream_ops(bus);
+++
+++	if (ops && ops->module_stop)
+++		ops->module_stop(bus->upstream);
+++}
+++EXPORT_SYMBOL_GPL(sfp_module_stop);
+++
++ static void sfp_socket_clear(struct sfp_bus *bus)
++ {
++ 	bus->sfp_dev = NULL;
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -59,6 +59,7 @@ enum {
++ 	SFP_DEV_UP,
++ 
++ 	SFP_S_DOWN = 0,
+++	SFP_S_FAIL,
++ 	SFP_S_WAIT,
++ 	SFP_S_INIT,
++ 	SFP_S_INIT_TX_FAULT,
++@@ -122,6 +123,7 @@ static const char *event_to_str(unsigned
++ 
++ static const char * const sm_state_strings[] = {
++ 	[SFP_S_DOWN] = "down",
+++	[SFP_S_FAIL] = "fail",
++ 	[SFP_S_WAIT] = "wait",
++ 	[SFP_S_INIT] = "init",
++ 	[SFP_S_INIT_TX_FAULT] = "init_tx_fault",
++@@ -1831,6 +1833,8 @@ static void sfp_sm_main(struct sfp *sfp,
++ 		if (sfp->sm_state == SFP_S_LINK_UP &&
++ 		    sfp->sm_dev_state == SFP_DEV_UP)
++ 			sfp_sm_link_down(sfp);
+++		if (sfp->sm_state > SFP_S_INIT)
+++			sfp_module_stop(sfp->sfp_bus);
++ 		if (sfp->mod_phy)
++ 			sfp_sm_phy_detach(sfp);
++ 		sfp_module_tx_disable(sfp);
++@@ -1898,6 +1902,10 @@ static void sfp_sm_main(struct sfp *sfp,
++ 			 * clear.  Probe for the PHY and check the LOS state.
++ 			 */
++ 			sfp_sm_probe_for_phy(sfp);
+++			if (sfp_module_start(sfp->sfp_bus)) {
+++				sfp_sm_next(sfp, SFP_S_FAIL, 0);
+++				break;
+++			}
++ 			sfp_sm_link_check_los(sfp);
++ 
++ 			/* Reset the fault retry count */
++--- a/drivers/net/phy/sfp.h
+++++ b/drivers/net/phy/sfp.h
++@@ -22,6 +22,8 @@ void sfp_link_up(struct sfp_bus *bus);
++ void sfp_link_down(struct sfp_bus *bus);
++ int sfp_module_insert(struct sfp_bus *bus, const struct sfp_eeprom_id *id);
++ void sfp_module_remove(struct sfp_bus *bus);
+++int sfp_module_start(struct sfp_bus *bus);
+++void sfp_module_stop(struct sfp_bus *bus);
++ int sfp_link_configure(struct sfp_bus *bus, const struct sfp_eeprom_id *id);
++ struct sfp_bus *sfp_register_socket(struct device *dev, struct sfp *sfp,
++ 				    const struct sfp_socket_ops *ops);
++--- a/include/linux/sfp.h
+++++ b/include/linux/sfp.h
++@@ -507,6 +507,8 @@ struct sfp_bus;
++  * @module_insert: called after a module has been detected to determine
++  *   whether the module is supported for the upstream device.
++  * @module_remove: called after the module has been removed.
+++ * @module_start: called after the PHY probe step
+++ * @module_stop: called before the PHY is removed
++  * @link_down: called when the link is non-operational for whatever
++  *   reason.
++  * @link_up: called when the link is operational.
++@@ -520,6 +522,8 @@ struct sfp_upstream_ops {
++ 	void (*detach)(void *priv, struct sfp_bus *bus);
++ 	int (*module_insert)(void *priv, const struct sfp_eeprom_id *id);
++ 	void (*module_remove)(void *priv);
+++	int (*module_start)(void *priv);
+++	void (*module_stop)(void *priv);
++ 	void (*link_down)(void *priv);
++ 	void (*link_up)(void *priv);
++ 	int (*connect_phy)(void *priv, struct phy_device *);
+diff --git a/target/linux/generic/pending-5.4/744-net-sfp-move-phy_start-phy_stop-to-phylink.patch b/target/linux/generic/pending-5.4/744-net-sfp-move-phy_start-phy_stop-to-phylink.patch
+new file mode 100644
+index 0000000000..e88a81df2d
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/744-net-sfp-move-phy_start-phy_stop-to-phylink.patch
+@@ -0,0 +1,72 @@
++From e2dc261b872a92a055eb2e86ac136baf9b20f2f2 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Thu, 21 Nov 2019 17:21:33 +0000
++Subject: [PATCH 647/660] net: sfp: move phy_start()/phy_stop() to phylink
++
++Move phy_start() and phy_stop() into the module_start and module_stop
++notifications in phylink, rather than having them in the SFP code.
++This gives phylink responsibility for controlling the PHY, rather
++than having SFP start and stop the PHY state machine.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/phylink.c | 22 ++++++++++++++++++++++
++ drivers/net/phy/sfp.c     |  2 --
++ 2 files changed, 22 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/phy/phylink.c
+++++ b/drivers/net/phy/phylink.c
++@@ -1772,6 +1772,26 @@ static int phylink_sfp_module_insert(voi
++ 	return ret;
++ }
++ 
+++static int phylink_sfp_module_start(void *upstream)
+++{
+++	struct phylink *pl = upstream;
+++
+++	/* If this SFP module has a PHY, start the PHY now. */
+++	if (pl->phydev)
+++		phy_start(pl->phydev);
+++		
+++	return 0;
+++}
+++
+++static void phylink_sfp_module_stop(void *upstream)
+++{
+++	struct phylink *pl = upstream;
+++
+++	/* If this SFP module has a PHY, stop it. */
+++	if (pl->phydev)
+++		phy_stop(pl->phydev);
+++}
+++
++ static void phylink_sfp_link_down(void *upstream)
++ {
++ 	struct phylink *pl = upstream;
++@@ -1807,6 +1827,8 @@ static const struct sfp_upstream_ops sfp
++ 	.attach = phylink_sfp_attach,
++ 	.detach = phylink_sfp_detach,
++ 	.module_insert = phylink_sfp_module_insert,
+++	.module_start = phylink_sfp_module_start,
+++	.module_stop = phylink_sfp_module_stop,
++ 	.link_up = phylink_sfp_link_up,
++ 	.link_down = phylink_sfp_link_down,
++ 	.connect_phy = phylink_sfp_connect_phy,
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -1396,7 +1396,6 @@ static void sfp_sm_mod_next(struct sfp *
++ 
++ static void sfp_sm_phy_detach(struct sfp *sfp)
++ {
++-	phy_stop(sfp->mod_phy);
++ 	sfp_remove_phy(sfp->sfp_bus);
++ 	phy_device_remove(sfp->mod_phy);
++ 	phy_device_free(sfp->mod_phy);
++@@ -1427,7 +1426,6 @@ static void sfp_sm_probe_phy(struct sfp
++ 	}
++ 
++ 	sfp->mod_phy = phy;
++-	phy_start(phy);
++ }
++ 
++ static void sfp_sm_link_up(struct sfp *sfp)
+diff --git a/target/linux/generic/pending-5.4/745-net-mdio-i2c-add-support-for-Clause-45-accesses.patch b/target/linux/generic/pending-5.4/745-net-mdio-i2c-add-support-for-Clause-45-accesses.patch
+new file mode 100644
+index 0000000000..761a94b3d4
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/745-net-mdio-i2c-add-support-for-Clause-45-accesses.patch
+@@ -0,0 +1,74 @@
++From c9de73988a35c6c85810a992954ac568cca503e5 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Wed, 2 Oct 2019 10:31:10 +0100
++Subject: [PATCH 648/660] net: mdio-i2c: add support for Clause 45 accesses
++
++Some SFP+ modules have PHYs on them just like SFP modules do, except
++they are Clause 45 PHYs.  The I2C protocol used to access them is
++modified slightly in order to send the device address and 16-bit
++register index.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/mdio-i2c.c | 28 ++++++++++++++++++++--------
++ 1 file changed, 20 insertions(+), 8 deletions(-)
++
++--- a/drivers/net/phy/mdio-i2c.c
+++++ b/drivers/net/phy/mdio-i2c.c
++@@ -33,17 +33,24 @@ static int i2c_mii_read(struct mii_bus *
++ {
++ 	struct i2c_adapter *i2c = bus->priv;
++ 	struct i2c_msg msgs[2];
++-	u8 data[2], dev_addr = reg;
+++	u8 addr[3], data[2], *p;
++ 	int bus_addr, ret;
++ 
++ 	if (!i2c_mii_valid_phy_id(phy_id))
++ 		return 0xffff;
++ 
+++	p = addr;
+++	if (reg & MII_ADDR_C45) {
+++		*p++ = 0x20 | ((reg >> 16) & 31);
+++		*p++ = reg >> 8;
+++	}
+++	*p++ = reg;
+++
++ 	bus_addr = i2c_mii_phy_addr(phy_id);
++ 	msgs[0].addr = bus_addr;
++ 	msgs[0].flags = 0;
++-	msgs[0].len = 1;
++-	msgs[0].buf = &dev_addr;
+++	msgs[0].len = p - addr;
+++	msgs[0].buf = addr;
++ 	msgs[1].addr = bus_addr;
++ 	msgs[1].flags = I2C_M_RD;
++ 	msgs[1].len = sizeof(data);
++@@ -61,18 +68,23 @@ static int i2c_mii_write(struct mii_bus
++ 	struct i2c_adapter *i2c = bus->priv;
++ 	struct i2c_msg msg;
++ 	int ret;
++-	u8 data[3];
+++	u8 data[5], *p;
++ 
++ 	if (!i2c_mii_valid_phy_id(phy_id))
++ 		return 0;
++ 
++-	data[0] = reg;
++-	data[1] = val >> 8;
++-	data[2] = val;
+++	p = data;
+++	if (reg & MII_ADDR_C45) {
+++		*p++ = (reg >> 16) & 31;
+++		*p++ = reg >> 8;
+++	}
+++	*p++ = reg;
+++	*p++ = val >> 8;
+++	*p++ = val;
++ 
++ 	msg.addr = i2c_mii_phy_addr(phy_id);
++ 	msg.flags = 0;
++-	msg.len = 3;
+++	msg.len = p - data;
++ 	msg.buf = data;
++ 
++ 	ret = i2c_transfer(i2c, &msg, 1);
+diff --git a/target/linux/generic/pending-5.4/746-net-phylink-re-split-__phylink_connect_phy.patch b/target/linux/generic/pending-5.4/746-net-phylink-re-split-__phylink_connect_phy.patch
+new file mode 100644
+index 0000000000..d547a18d6e
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/746-net-phylink-re-split-__phylink_connect_phy.patch
+@@ -0,0 +1,93 @@
++From 0db7fba746b5608c30d4e2ba1c99a2a309e2d288 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Fri, 8 Nov 2019 15:22:48 +0000
++Subject: [PATCH 649/660] net: phylink: re-split __phylink_connect_phy()
++
++In order to support Clause 45 PHYs on SFP+ modules, which have an
++indeterminant phy interface mode, we need to be able to call
++phylink_bringup_phy() with a different interface mode to that used when
++binding the PHY. Reduce __phylink_connect_phy() to an attach operation,
++and move the call to phylink_bringup_phy() to its call sites.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/phylink.c | 39 ++++++++++++++++++++++++---------------
++ 1 file changed, 24 insertions(+), 15 deletions(-)
++
++--- a/drivers/net/phy/phylink.c
+++++ b/drivers/net/phy/phylink.c
++@@ -765,11 +765,9 @@ static int phylink_bringup_phy(struct ph
++ 	return 0;
++ }
++ 
++-static int __phylink_connect_phy(struct phylink *pl, struct phy_device *phy,
++-		phy_interface_t interface)
+++static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
+++			      phy_interface_t interface)
++ {
++-	int ret;
++-
++ 	if (WARN_ON(pl->link_an_mode == MLO_AN_FIXED ||
++ 		    (pl->link_an_mode == MLO_AN_INBAND &&
++ 		     phy_interface_mode_is_8023z(interface))))
++@@ -778,15 +776,7 @@ static int __phylink_connect_phy(struct
++ 	if (pl->phydev)
++ 		return -EBUSY;
++ 
++-	ret = phy_attach_direct(pl->netdev, phy, 0, interface);
++-	if (ret)
++-		return ret;
++-
++-	ret = phylink_bringup_phy(pl, phy);
++-	if (ret)
++-		phy_detach(phy);
++-
++-	return ret;
+++	return phy_attach_direct(pl->netdev, phy, 0, interface);
++ }
++ 
++ /**
++@@ -806,13 +796,23 @@ static int __phylink_connect_phy(struct
++  */
++ int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
++ {
+++	int ret;
+++
++ 	/* Use PHY device/driver interface */
++ 	if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
++ 		pl->link_interface = phy->interface;
++ 		pl->link_config.interface = pl->link_interface;
++ 	}
++ 
++-	return __phylink_connect_phy(pl, phy, pl->link_interface);
+++	ret = phylink_attach_phy(pl, phy, pl->link_interface);
+++	if (ret < 0)
+++		return ret;
+++
+++	ret = phylink_bringup_phy(pl, phy);
+++	if (ret)
+++		phy_detach(phy);
+++
+++	return ret;
++ }
++ EXPORT_SYMBOL_GPL(phylink_connect_phy);
++ 
++@@ -1814,8 +1814,17 @@ static void phylink_sfp_link_up(void *up
++ static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
++ {
++ 	struct phylink *pl = upstream;
+++	int ret;
++ 
++-	return __phylink_connect_phy(upstream, phy, pl->link_config.interface);
+++	ret = phylink_attach_phy(pl, phy, pl->link_config.interface);
+++	if (ret < 0)
+++		return ret;
+++
+++	ret = phylink_bringup_phy(pl, phy);
+++	if (ret)
+++		phy_detach(phy);
+++
+++	return ret;
++ }
++ 
++ static void phylink_sfp_disconnect_phy(void *upstream)
+diff --git a/target/linux/generic/pending-5.4/747-net-phylink-support-Clause-45-PHYs-on-SFP-modules.patch b/target/linux/generic/pending-5.4/747-net-phylink-support-Clause-45-PHYs-on-SFP-modules.patch
+new file mode 100644
+index 0000000000..673de1005a
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/747-net-phylink-support-Clause-45-PHYs-on-SFP-modules.patch
+@@ -0,0 +1,89 @@
++From caf32f96f13df7d3ae6cb8bf8001c88ae22025ca Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Fri, 8 Nov 2019 15:28:22 +0000
++Subject: [PATCH 650/660] net: phylink: support Clause 45 PHYs on SFP+ modules
++
++Some SFP+ modules have Clause 45 PHYs embedded on them, which need a
++little more handling in order to ensure that they are correctly setup,
++as they switch the PHY link mode according to the negotiated speed.
++
++With Clause 22 PHYs, we assumed that they would operate in SGMII mode,
++but this assumption is now false.  Adapt phylink to support Clause 45
++PHYs on SFP+ modules.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/phylink.c | 21 ++++++++++++++++-----
++ 1 file changed, 16 insertions(+), 5 deletions(-)
++
++--- a/drivers/net/phy/phylink.c
+++++ b/drivers/net/phy/phylink.c
++@@ -712,7 +712,8 @@ static void phylink_phy_change(struct ph
++ 		    phy_duplex_to_str(phydev->duplex));
++ }
++ 
++-static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy)
+++static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
+++			       phy_interface_t interface)
++ {
++ 	struct phylink_link_state config;
++ 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
++@@ -730,7 +731,7 @@ static int phylink_bringup_phy(struct ph
++ 	memset(&config, 0, sizeof(config));
++ 	linkmode_copy(supported, phy->supported);
++ 	linkmode_copy(config.advertising, phy->advertising);
++-	config.interface = pl->link_config.interface;
+++	config.interface = interface;
++ 
++ 	ret = phylink_validate(pl, supported, &config);
++ 	if (ret)
++@@ -746,6 +747,7 @@ static int phylink_bringup_phy(struct ph
++ 	mutex_lock(&phy->lock);
++ 	mutex_lock(&pl->state_mutex);
++ 	pl->phydev = phy;
+++	pl->phy_state.interface = interface;
++ 	linkmode_copy(pl->supported, supported);
++ 	linkmode_copy(pl->link_config.advertising, config.advertising);
++ 
++@@ -808,7 +810,7 @@ int phylink_connect_phy(struct phylink *
++ 	if (ret < 0)
++ 		return ret;
++ 
++-	ret = phylink_bringup_phy(pl, phy);
+++	ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
++ 	if (ret)
++ 		phy_detach(phy);
++ 
++@@ -861,7 +863,7 @@ int phylink_of_phy_connect(struct phylin
++ 	if (!phy_dev)
++ 		return -ENODEV;
++ 
++-	ret = phylink_bringup_phy(pl, phy_dev);
+++	ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
++ 	if (ret)
++ 		phy_detach(phy_dev);
++ 
++@@ -1814,13 +1816,22 @@ static void phylink_sfp_link_up(void *up
++ static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
++ {
++ 	struct phylink *pl = upstream;
+++	phy_interface_t interface = pl->link_config.interface;
++ 	int ret;
++ 
++ 	ret = phylink_attach_phy(pl, phy, pl->link_config.interface);
++ 	if (ret < 0)
++ 		return ret;
++ 
++-	ret = phylink_bringup_phy(pl, phy);
+++	/* Clause 45 PHYs switch their Serdes lane between several different
+++	 * modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G
+++	 * speeds.  We really need to know which interface modes the PHY and
+++	 * MAC supports to properly work out which linkmodes can be supported.
+++	 */
+++	if (phy->is_c45)
+++		interface = PHY_INTERFACE_MODE_NA;
+++
+++	ret = phylink_bringup_phy(pl, phy, interface);
++ 	if (ret)
++ 		phy_detach(phy);
++ 
+diff --git a/target/linux/generic/pending-5.4/748-net-phylink-split-link_an_mode-configured-and-curren.patch b/target/linux/generic/pending-5.4/748-net-phylink-split-link_an_mode-configured-and-curren.patch
+new file mode 100644
+index 0000000000..eaf21dbc87
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/748-net-phylink-split-link_an_mode-configured-and-curren.patch
+@@ -0,0 +1,257 @@
++From d1339d6956f0255b6ce2412328a98945be8cc3ca Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Sat, 16 Nov 2019 11:30:18 +0000
++Subject: [PATCH 651/660] net: phylink: split link_an_mode configured and
++ current settings
++
++Split link_an_mode between the configured setting and the current
++operating setting.  This is an important distinction to make when we
++need to configure PHY mode for a plugged SFP+ module that does not
++use in-band signalling.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/phylink.c | 59 ++++++++++++++++++++-------------------
++ 1 file changed, 31 insertions(+), 28 deletions(-)
++
++--- a/drivers/net/phy/phylink.c
+++++ b/drivers/net/phy/phylink.c
++@@ -48,7 +48,8 @@ struct phylink {
++ 	unsigned long phylink_disable_state; /* bitmask of disables */
++ 	struct phy_device *phydev;
++ 	phy_interface_t link_interface;	/* PHY_INTERFACE_xxx */
++-	u8 link_an_mode;		/* MLO_AN_xxx */
+++	u8 cfg_link_an_mode;		/* MLO_AN_xxx */
+++	u8 cur_link_an_mode;
++ 	u8 link_port;			/* The current non-phy ethtool port */
++ 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
++ 
++@@ -258,12 +259,12 @@ static int phylink_parse_mode(struct phy
++ 
++ 	dn = fwnode_get_named_child_node(fwnode, "fixed-link");
++ 	if (dn || fwnode_property_present(fwnode, "fixed-link"))
++-		pl->link_an_mode = MLO_AN_FIXED;
+++		pl->cfg_link_an_mode = MLO_AN_FIXED;
++ 	fwnode_handle_put(dn);
++ 
++ 	if (fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
++ 	    strcmp(managed, "in-band-status") == 0) {
++-		if (pl->link_an_mode == MLO_AN_FIXED) {
+++		if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
++ 			phylink_err(pl,
++ 				    "can't use both fixed-link and in-band-status\n");
++ 			return -EINVAL;
++@@ -275,7 +276,7 @@ static int phylink_parse_mode(struct phy
++ 		phylink_set(pl->supported, Asym_Pause);
++ 		phylink_set(pl->supported, Pause);
++ 		pl->link_config.an_enabled = true;
++-		pl->link_an_mode = MLO_AN_INBAND;
+++		pl->cfg_link_an_mode = MLO_AN_INBAND;
++ 
++ 		switch (pl->link_config.interface) {
++ 		case PHY_INTERFACE_MODE_SGMII:
++@@ -335,14 +336,14 @@ static void phylink_mac_config(struct ph
++ {
++ 	phylink_dbg(pl,
++ 		    "%s: mode=%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n",
++-		    __func__, phylink_an_mode_str(pl->link_an_mode),
+++		    __func__, phylink_an_mode_str(pl->cur_link_an_mode),
++ 		    phy_modes(state->interface),
++ 		    phy_speed_to_str(state->speed),
++ 		    phy_duplex_to_str(state->duplex),
++ 		    __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising,
++ 		    state->pause, state->link, state->an_enabled);
++ 
++-	pl->ops->mac_config(pl->config, pl->link_an_mode, state);
+++	pl->ops->mac_config(pl->config, pl->cur_link_an_mode, state);
++ }
++ 
++ static void phylink_mac_config_up(struct phylink *pl,
++@@ -443,7 +444,7 @@ static void phylink_mac_link_up(struct p
++ 	struct net_device *ndev = pl->netdev;
++ 
++ 	pl->cur_interface = link_state.interface;
++-	pl->ops->mac_link_up(pl->config, pl->link_an_mode,
+++	pl->ops->mac_link_up(pl->config, pl->cur_link_an_mode,
++ 			     pl->cur_interface, pl->phydev);
++ 
++ 	if (ndev)
++@@ -462,7 +463,7 @@ static void phylink_mac_link_down(struct
++ 
++ 	if (ndev)
++ 		netif_carrier_off(ndev);
++-	pl->ops->mac_link_down(pl->config, pl->link_an_mode,
+++	pl->ops->mac_link_down(pl->config, pl->cur_link_an_mode,
++ 			       pl->cur_interface);
++ 	phylink_info(pl, "Link is Down\n");
++ }
++@@ -481,7 +482,7 @@ static void phylink_resolve(struct work_
++ 	} else if (pl->mac_link_dropped) {
++ 		link_state.link = false;
++ 	} else {
++-		switch (pl->link_an_mode) {
+++		switch (pl->cur_link_an_mode) {
++ 		case MLO_AN_PHY:
++ 			link_state = pl->phy_state;
++ 			phylink_resolve_flow(pl, &link_state);
++@@ -649,7 +650,7 @@ struct phylink *phylink_create(struct ph
++ 		return ERR_PTR(ret);
++ 	}
++ 
++-	if (pl->link_an_mode == MLO_AN_FIXED) {
+++	if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
++ 		ret = phylink_parse_fixedlink(pl, fwnode);
++ 		if (ret < 0) {
++ 			kfree(pl);
++@@ -657,6 +658,8 @@ struct phylink *phylink_create(struct ph
++ 		}
++ 	}
++ 
+++	pl->cur_link_an_mode = pl->cfg_link_an_mode;
+++
++ 	ret = phylink_register_sfp(pl, fwnode);
++ 	if (ret < 0) {
++ 		kfree(pl);
++@@ -770,8 +773,8 @@ static int phylink_bringup_phy(struct ph
++ static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
++ 			      phy_interface_t interface)
++ {
++-	if (WARN_ON(pl->link_an_mode == MLO_AN_FIXED ||
++-		    (pl->link_an_mode == MLO_AN_INBAND &&
+++	if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
+++		    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
++ 		     phy_interface_mode_is_8023z(interface))))
++ 		return -EINVAL;
++ 
++@@ -838,8 +841,8 @@ int phylink_of_phy_connect(struct phylin
++ 	int ret;
++ 
++ 	/* Fixed links and 802.3z are handled without needing a PHY */
++-	if (pl->link_an_mode == MLO_AN_FIXED ||
++-	    (pl->link_an_mode == MLO_AN_INBAND &&
+++	if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
+++	    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
++ 	     phy_interface_mode_is_8023z(pl->link_interface)))
++ 		return 0;
++ 
++@@ -850,7 +853,7 @@ int phylink_of_phy_connect(struct phylin
++ 		phy_node = of_parse_phandle(dn, "phy-device", 0);
++ 
++ 	if (!phy_node) {
++-		if (pl->link_an_mode == MLO_AN_PHY)
+++		if (pl->cfg_link_an_mode == MLO_AN_PHY)
++ 			return -ENODEV;
++ 		return 0;
++ 	}
++@@ -913,7 +916,7 @@ int phylink_fixed_state_cb(struct phylin
++ 	/* It does not make sense to let the link be overriden unless we use
++ 	 * MLO_AN_FIXED
++ 	 */
++-	if (pl->link_an_mode != MLO_AN_FIXED)
+++	if (pl->cfg_link_an_mode != MLO_AN_FIXED)
++ 		return -EINVAL;
++ 
++ 	mutex_lock(&pl->state_mutex);
++@@ -963,7 +966,7 @@ void phylink_start(struct phylink *pl)
++ 	ASSERT_RTNL();
++ 
++ 	phylink_info(pl, "configuring for %s/%s link mode\n",
++-		     phylink_an_mode_str(pl->link_an_mode),
+++		     phylink_an_mode_str(pl->cur_link_an_mode),
++ 		     phy_modes(pl->link_config.interface));
++ 
++ 	/* Always set the carrier off */
++@@ -986,7 +989,7 @@ void phylink_start(struct phylink *pl)
++ 	clear_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
++ 	phylink_run_resolve(pl);
++ 
++-	if (pl->link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
+++	if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
++ 		int irq = gpiod_to_irq(pl->link_gpio);
++ 
++ 		if (irq > 0) {
++@@ -1001,7 +1004,7 @@ void phylink_start(struct phylink *pl)
++ 		if (irq <= 0)
++ 			mod_timer(&pl->link_poll, jiffies + HZ);
++ 	}
++-	if (pl->link_an_mode == MLO_AN_FIXED && pl->get_fixed_state)
+++	if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->get_fixed_state)
++ 		mod_timer(&pl->link_poll, jiffies + HZ);
++ 	if (pl->phydev)
++ 		phy_start(pl->phydev);
++@@ -1128,7 +1131,7 @@ int phylink_ethtool_ksettings_get(struct
++ 
++ 	linkmode_copy(kset->link_modes.supported, pl->supported);
++ 
++-	switch (pl->link_an_mode) {
+++	switch (pl->cur_link_an_mode) {
++ 	case MLO_AN_FIXED:
++ 		/* We are using fixed settings. Report these as the
++ 		 * current link settings - and note that these also
++@@ -1200,7 +1203,7 @@ int phylink_ethtool_ksettings_set(struct
++ 		/* If we have a fixed link (as specified by firmware), refuse
++ 		 * to change link parameters.
++ 		 */
++-		if (pl->link_an_mode == MLO_AN_FIXED &&
+++		if (pl->cur_link_an_mode == MLO_AN_FIXED &&
++ 		    (s->speed != pl->link_config.speed ||
++ 		     s->duplex != pl->link_config.duplex))
++ 			return -EINVAL;
++@@ -1212,7 +1215,7 @@ int phylink_ethtool_ksettings_set(struct
++ 		__clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising);
++ 	} else {
++ 		/* If we have a fixed link, refuse to enable autonegotiation */
++-		if (pl->link_an_mode == MLO_AN_FIXED)
+++		if (pl->cur_link_an_mode == MLO_AN_FIXED)
++ 			return -EINVAL;
++ 
++ 		config.speed = SPEED_UNKNOWN;
++@@ -1254,7 +1257,7 @@ int phylink_ethtool_ksettings_set(struct
++ 	 * configuration. For a fixed link, this isn't able to change any
++ 	 * parameters, which just leaves inband mode.
++ 	 */
++-	if (pl->link_an_mode == MLO_AN_INBAND &&
+++	if (pl->cur_link_an_mode == MLO_AN_INBAND &&
++ 	    !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) {
++ 		phylink_mac_config(pl, &pl->link_config);
++ 		phylink_mac_an_restart(pl);
++@@ -1344,7 +1347,7 @@ int phylink_ethtool_set_pauseparam(struc
++ 				   pause->tx_pause);
++ 	} else if (!test_bit(PHYLINK_DISABLE_STOPPED,
++ 			     &pl->phylink_disable_state)) {
++-		switch (pl->link_an_mode) {
+++		switch (pl->cur_link_an_mode) {
++ 		case MLO_AN_FIXED:
++ 			/* Should we allow fixed links to change against the config? */
++ 			phylink_resolve_flow(pl, config);
++@@ -1551,7 +1554,7 @@ static int phylink_mii_read(struct phyli
++ 	struct phylink_link_state state;
++ 	int val = 0xffff;
++ 
++-	switch (pl->link_an_mode) {
+++	switch (pl->cur_link_an_mode) {
++ 	case MLO_AN_FIXED:
++ 		if (phy_id == 0) {
++ 			phylink_get_fixed_state(pl, &state);
++@@ -1579,7 +1582,7 @@ static int phylink_mii_read(struct phyli
++ static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
++ 			     unsigned int reg, unsigned int val)
++ {
++-	switch (pl->link_an_mode) {
+++	switch (pl->cur_link_an_mode) {
++ 	case MLO_AN_FIXED:
++ 		break;
++ 
++@@ -1753,10 +1756,10 @@ static int phylink_sfp_module_insert(voi
++ 		linkmode_copy(pl->link_config.advertising, config.advertising);
++ 	}
++ 
++-	if (pl->link_an_mode != MLO_AN_INBAND ||
+++	if (pl->cur_link_an_mode != MLO_AN_INBAND ||
++ 	    pl->link_config.interface != config.interface) {
++ 		pl->link_config.interface = config.interface;
++-		pl->link_an_mode = MLO_AN_INBAND;
+++		pl->cur_link_an_mode = MLO_AN_INBAND;
++ 
++ 		changed = true;
++ 
+diff --git a/target/linux/generic/pending-5.4/749-net-phylink-split-phylink_sfp_module_insert.patch b/target/linux/generic/pending-5.4/749-net-phylink-split-phylink_sfp_module_insert.patch
+new file mode 100644
+index 0000000000..b840d71c43
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/749-net-phylink-split-phylink_sfp_module_insert.patch
+@@ -0,0 +1,120 @@
++From 36569971241ae6b81376da4937d2c8760122d10b Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Thu, 21 Nov 2019 17:58:58 +0000
++Subject: [PATCH 652/660] net: phylink: split phylink_sfp_module_insert()
++
++Split out the configuration step from phylink_sfp_module_insert() so
++we can re-use this later.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/phylink.c | 47 +++++++++++++++++++++++----------------
++ 1 file changed, 28 insertions(+), 19 deletions(-)
++
++--- a/drivers/net/phy/phylink.c
+++++ b/drivers/net/phy/phylink.c
++@@ -1688,25 +1688,21 @@ static void phylink_sfp_detach(void *ups
++ 	pl->netdev->sfp_bus = NULL;
++ }
++ 
++-static int phylink_sfp_module_insert(void *upstream,
++-				     const struct sfp_eeprom_id *id)
+++static int phylink_sfp_config(struct phylink *pl, u8 mode, u8 port,
+++			      const unsigned long *supported,
+++			      const unsigned long *advertising)
++ {
++-	struct phylink *pl = upstream;
++-	__ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, };
++ 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
+++	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
++ 	struct phylink_link_state config;
++ 	phy_interface_t iface;
++-	int ret = 0;
++ 	bool changed;
++-	u8 port;
+++	int ret;
++ 
++-	ASSERT_RTNL();
++-
++-	sfp_parse_support(pl->sfp_bus, id, support);
++-	port = sfp_parse_port(pl->sfp_bus, id, support);
+++	linkmode_copy(support, supported);
++ 
++ 	memset(&config, 0, sizeof(config));
++-	linkmode_copy(config.advertising, support);
+++	linkmode_copy(config.advertising, advertising);
++ 	config.interface = PHY_INTERFACE_MODE_NA;
++ 	config.speed = SPEED_UNKNOWN;
++ 	config.duplex = DUPLEX_UNKNOWN;
++@@ -1721,8 +1717,6 @@ static int phylink_sfp_module_insert(voi
++ 		return ret;
++ 	}
++ 
++-	linkmode_copy(support1, support);
++-
++ 	iface = sfp_select_interface(pl->sfp_bus, config.advertising);
++ 	if (iface == PHY_INTERFACE_MODE_NA) {
++ 		phylink_err(pl,
++@@ -1732,18 +1726,18 @@ static int phylink_sfp_module_insert(voi
++ 	}
++ 
++ 	config.interface = iface;
+++	linkmode_copy(support1, support);
++ 	ret = phylink_validate(pl, support1, &config);
++ 	if (ret) {
++ 		phylink_err(pl, "validation of %s/%s with support %*pb failed: %d\n",
++-			    phylink_an_mode_str(MLO_AN_INBAND),
+++			    phylink_an_mode_str(mode),
++ 			    phy_modes(config.interface),
++ 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support, ret);
++ 		return ret;
++ 	}
++ 
++ 	phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
++-		    phylink_an_mode_str(MLO_AN_INBAND),
++-		    phy_modes(config.interface),
+++		    phylink_an_mode_str(mode), phy_modes(config.interface),
++ 		    __ETHTOOL_LINK_MODE_MASK_NBITS, support);
++ 
++ 	if (phy_interface_mode_is_8023z(iface) && pl->phydev)
++@@ -1756,15 +1750,15 @@ static int phylink_sfp_module_insert(voi
++ 		linkmode_copy(pl->link_config.advertising, config.advertising);
++ 	}
++ 
++-	if (pl->cur_link_an_mode != MLO_AN_INBAND ||
+++	if (pl->cur_link_an_mode != mode ||
++ 	    pl->link_config.interface != config.interface) {
++ 		pl->link_config.interface = config.interface;
++-		pl->cur_link_an_mode = MLO_AN_INBAND;
+++		pl->cur_link_an_mode = mode;
++ 
++ 		changed = true;
++ 
++ 		phylink_info(pl, "switched to %s/%s link mode\n",
++-			     phylink_an_mode_str(MLO_AN_INBAND),
+++			     phylink_an_mode_str(mode),
++ 			     phy_modes(config.interface));
++ 	}
++ 
++@@ -1777,6 +1771,21 @@ static int phylink_sfp_module_insert(voi
++ 	return ret;
++ }
++ 
+++static int phylink_sfp_module_insert(void *upstream,
+++				     const struct sfp_eeprom_id *id)
+++{
+++	struct phylink *pl = upstream;
+++	__ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, };
+++	u8 port;
+++
+++	ASSERT_RTNL();
+++
+++	sfp_parse_support(pl->sfp_bus, id, support);
+++	port = sfp_parse_port(pl->sfp_bus, id, support);
+++
+++	return phylink_sfp_config(pl, MLO_AN_INBAND, port, support, support);
+++}
+++
++ static int phylink_sfp_module_start(void *upstream)
++ {
++ 	struct phylink *pl = upstream;
+diff --git a/target/linux/generic/pending-5.4/750-net-phylink-delay-MAC-configuration-for-copper-SFP-m.patch b/target/linux/generic/pending-5.4/750-net-phylink-delay-MAC-configuration-for-copper-SFP-m.patch
+new file mode 100644
+index 0000000000..667170a398
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/750-net-phylink-delay-MAC-configuration-for-copper-SFP-m.patch
+@@ -0,0 +1,201 @@
++From 52c956003a9d5bcae1f445f9dfd42b624adb6e87 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Wed, 11 Dec 2019 10:56:45 +0000
++Subject: [PATCH] net: phylink: delay MAC configuration for copper SFP modules
++
++Knowing whether we need to delay the MAC configuration because a module
++may have a PHY is useful to phylink to allow NBASE-T modules to work on
++systems supporting no more than 2.5G speeds.
++
++This commit allows us to delay such configuration until after the PHY
++has been probed by recording the parsed capabilities, and if the module
++may have a PHY, doing no more until the module_start() notification is
++called.  At that point, we either have a PHY, or we don't.
++
++We move the PHY-based setup a little later, and use the PHYs support
++capabilities rather than the EEPROM parsed capabilities to determine
++whether we can support the PHY.
++
++Reviewed-by: Andrew Lunn <andrew@lunn.ch>
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ drivers/net/phy/phylink.c | 53 +++++++++++++++++++++++++++++++--------
++ drivers/net/phy/sfp-bus.c | 28 +++++++++++++++++++++
++ include/linux/sfp.h       |  7 ++++++
++ 3 files changed, 78 insertions(+), 10 deletions(-)
++
++--- a/drivers/net/phy/phylink.c
+++++ b/drivers/net/phy/phylink.c
++@@ -72,6 +72,9 @@ struct phylink {
++ 	bool mac_link_dropped;
++ 
++ 	struct sfp_bus *sfp_bus;
+++	bool sfp_may_have_phy;
+++	__ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
+++	u8 sfp_port;
++ };
++ 
++ #define phylink_printk(level, pl, fmt, ...) \
++@@ -1688,7 +1691,7 @@ static void phylink_sfp_detach(void *ups
++ 	pl->netdev->sfp_bus = NULL;
++ }
++ 
++-static int phylink_sfp_config(struct phylink *pl, u8 mode, u8 port,
+++static int phylink_sfp_config(struct phylink *pl, u8 mode,
++ 			      const unsigned long *supported,
++ 			      const unsigned long *advertising)
++ {
++@@ -1762,7 +1765,7 @@ static int phylink_sfp_config(struct phy
++ 			     phy_modes(config.interface));
++ 	}
++ 
++-	pl->link_port = port;
+++	pl->link_port = pl->sfp_port;
++ 
++ 	if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
++ 				 &pl->phylink_disable_state))
++@@ -1775,15 +1778,20 @@ static int phylink_sfp_module_insert(voi
++ 				     const struct sfp_eeprom_id *id)
++ {
++ 	struct phylink *pl = upstream;
++-	__ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, };
++-	u8 port;
+++	unsigned long *support = pl->sfp_support;
++ 
++ 	ASSERT_RTNL();
++ 
+++	linkmode_zero(support);
++ 	sfp_parse_support(pl->sfp_bus, id, support);
++-	port = sfp_parse_port(pl->sfp_bus, id, support);
+++	pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, support);
++ 
++-	return phylink_sfp_config(pl, MLO_AN_INBAND, port, support, support);
+++	/* If this module may have a PHY connecting later, defer until later */
+++	pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
+++	if (pl->sfp_may_have_phy)
+++		return 0;
+++
+++	return phylink_sfp_config(pl, MLO_AN_INBAND, support, support);
++ }
++ 
++ static int phylink_sfp_module_start(void *upstream)
++@@ -1791,10 +1799,19 @@ static int phylink_sfp_module_start(void
++ 	struct phylink *pl = upstream;
++ 
++ 	/* If this SFP module has a PHY, start the PHY now. */
++-	if (pl->phydev)
+++	if (pl->phydev) {
++ 		phy_start(pl->phydev);
++-		
++-	return 0;
+++		return 0;
+++	}
+++
+++	/* If the module may have a PHY but we didn't detect one we
+++	 * need to configure the MAC here.
+++	 */
+++	if (!pl->sfp_may_have_phy)
+++		return 0;
+++
+++	return phylink_sfp_config(pl, MLO_AN_INBAND,
+++				  pl->sfp_support, pl->sfp_support);
++ }
++ 
++ static void phylink_sfp_module_stop(void *upstream)
++@@ -1828,10 +1845,26 @@ static void phylink_sfp_link_up(void *up
++ static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
++ {
++ 	struct phylink *pl = upstream;
++-	phy_interface_t interface = pl->link_config.interface;
+++	phy_interface_t interface;
++ 	int ret;
++ 
++-	ret = phylink_attach_phy(pl, phy, pl->link_config.interface);
+++	/*
+++	 * This is the new way of dealing with flow control for PHYs,
+++	 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
+++	 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
+++	 * using our validate call to the MAC, we rely upon the MAC
+++	 * clearing the bits from both supported and advertising fields.
+++	 */
+++	phy_support_asym_pause(phy);
+++
+++	/* Do the initial configuration */
+++	ret = phylink_sfp_config(pl, MLO_AN_INBAND, phy->supported,
+++				 phy->advertising);
+++	if (ret < 0)
+++		return ret;
+++
+++	interface = pl->link_config.interface;
+++	ret = phylink_attach_phy(pl, phy, interface);
++ 	if (ret < 0)
++ 		return ret;
++ 
++--- a/drivers/net/phy/sfp-bus.c
+++++ b/drivers/net/phy/sfp-bus.c
++@@ -103,6 +103,7 @@ static const struct sfp_quirk *sfp_looku
++ 
++ 	return NULL;
++ }
+++
++ /**
++  * sfp_parse_port() - Parse the EEPROM base ID, setting the port type
++  * @bus: a pointer to the &struct sfp_bus structure for the sfp module
++@@ -179,6 +180,33 @@ int sfp_parse_port(struct sfp_bus *bus,
++ EXPORT_SYMBOL_GPL(sfp_parse_port);
++ 
++ /**
+++ * sfp_may_have_phy() - indicate whether the module may have a PHY
+++ * @bus: a pointer to the &struct sfp_bus structure for the sfp module
+++ * @id: a pointer to the module's &struct sfp_eeprom_id
+++ *
+++ * Parse the EEPROM identification given in @id, and return whether
+++ * this module may have a PHY.
+++ */
+++bool sfp_may_have_phy(struct sfp_bus *bus, const struct sfp_eeprom_id *id)
+++{
+++	if (id->base.e1000_base_t)
+++		return true;
+++
+++	if (id->base.phys_id != SFF8024_ID_DWDM_SFP) {
+++		switch (id->base.extended_cc) {
+++		case SFF8024_ECC_10GBASE_T_SFI:
+++		case SFF8024_ECC_10GBASE_T_SR:
+++		case SFF8024_ECC_5GBASE_T:
+++		case SFF8024_ECC_2_5GBASE_T:
+++			return true;
+++		}
+++	}
+++
+++	return false;
+++}
+++EXPORT_SYMBOL_GPL(sfp_may_have_phy);
+++
+++/**
++  * sfp_parse_support() - Parse the eeprom id for supported link modes
++  * @bus: a pointer to the &struct sfp_bus structure for the sfp module
++  * @id: a pointer to the module's &struct sfp_eeprom_id
++--- a/include/linux/sfp.h
+++++ b/include/linux/sfp.h
++@@ -533,6 +533,7 @@ struct sfp_upstream_ops {
++ #if IS_ENABLED(CONFIG_SFP)
++ int sfp_parse_port(struct sfp_bus *bus, const struct sfp_eeprom_id *id,
++ 		   unsigned long *support);
+++bool sfp_may_have_phy(struct sfp_bus *bus, const struct sfp_eeprom_id *id);
++ void sfp_parse_support(struct sfp_bus *bus, const struct sfp_eeprom_id *id,
++ 		       unsigned long *support);
++ phy_interface_t sfp_select_interface(struct sfp_bus *bus,
++@@ -556,6 +557,12 @@ static inline int sfp_parse_port(struct
++ 	return PORT_OTHER;
++ }
++ 
+++static inline bool sfp_may_have_phy(struct sfp_bus *bus,
+++				    const struct sfp_eeprom_id *id)
+++{
+++	return false;
+++}
+++
++ static inline void sfp_parse_support(struct sfp_bus *bus,
++ 				     const struct sfp_eeprom_id *id,
++ 				     unsigned long *support)
+diff --git a/target/linux/generic/pending-5.4/751-net-phylink-make-Broadcom-BCM84881-based-SFPs-work.patch b/target/linux/generic/pending-5.4/751-net-phylink-make-Broadcom-BCM84881-based-SFPs-work.patch
+new file mode 100644
+index 0000000000..d58304410a
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/751-net-phylink-make-Broadcom-BCM84881-based-SFPs-work.patch
+@@ -0,0 +1,59 @@
++From 7adb5b2126bc013f0964ddaefad6ad1b132e86c3 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Wed, 11 Dec 2019 10:56:50 +0000
++Subject: [PATCH] net: phylink: make Broadcom BCM84881 based SFPs work
++
++The Broadcom BCM84881 does not appear to send the SGMII control word
++when operating in SGMII mode, which causes network adapters to fail
++to link with the PHY, or decide to operate at fixed 1G speed, even if
++the PHY negotiated 100M.
++
++Work around this by detecting the Broadcom BCM84881 and switch to phy
++mode rather than inband mode.
++
++Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ drivers/net/phy/phylink.c | 18 ++++++++++++++++--
++ 1 file changed, 16 insertions(+), 2 deletions(-)
++
++--- a/drivers/net/phy/phylink.c
+++++ b/drivers/net/phy/phylink.c
++@@ -1842,10 +1842,20 @@ static void phylink_sfp_link_up(void *up
++ 	phylink_run_resolve(pl);
++ }
++ 
+++/* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
+++ * or 802.3z control word, so inband will not work.
+++ */
+++static bool phylink_phy_no_inband(struct phy_device *phy)
+++{
+++	return phy->is_c45 &&
+++		(phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150;
+++}
+++
++ static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
++ {
++ 	struct phylink *pl = upstream;
++ 	phy_interface_t interface;
+++	u8 mode;
++ 	int ret;
++ 
++ 	/*
++@@ -1857,9 +1867,13 @@ static int phylink_sfp_connect_phy(void
++ 	 */
++ 	phy_support_asym_pause(phy);
++ 
+++	if (phylink_phy_no_inband(phy))
+++		mode = MLO_AN_PHY;
+++	else
+++		mode = MLO_AN_INBAND;
+++
++ 	/* Do the initial configuration */
++-	ret = phylink_sfp_config(pl, MLO_AN_INBAND, phy->supported,
++-				 phy->advertising);
+++	ret = phylink_sfp_config(pl, mode, phy->supported, phy->advertising);
++ 	if (ret < 0)
++ 		return ret;
++ 
+diff --git a/target/linux/generic/pending-5.4/752-net-phy-add-Broadcom-BCM84881-PHY-driver.patch b/target/linux/generic/pending-5.4/752-net-phy-add-Broadcom-BCM84881-PHY-driver.patch
+new file mode 100644
+index 0000000000..783dec0479
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/752-net-phy-add-Broadcom-BCM84881-PHY-driver.patch
+@@ -0,0 +1,315 @@
++From 75f4d8d10e016f7428c268424483a927ee7a78bb Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Wed, 11 Dec 2019 10:56:56 +0000
++Subject: [PATCH] net: phy: add Broadcom BCM84881 PHY driver
++
++Add a rudimentary Clause 45 driver for the BCM84881 PHY, found on
++Methode DM7052 SFPs.
++
++Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++Signed-off-by: David S. Miller <davem@davemloft.net>
++---
++ drivers/net/phy/Kconfig    |   6 +
++ drivers/net/phy/Makefile   |   1 +
++ drivers/net/phy/bcm84881.c | 269 +++++++++++++++++++++++++++++++++++++
++ 3 files changed, 276 insertions(+)
++ create mode 100644 drivers/net/phy/bcm84881.c
++
++--- a/drivers/net/phy/Kconfig
+++++ b/drivers/net/phy/Kconfig
++@@ -330,6 +330,12 @@ config BROADCOM_PHY
++ 	  Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464,
++ 	  BCM5481, BCM54810 and BCM5482 PHYs.
++ 
+++config BCM84881_PHY
+++	tristate "Broadcom BCM84881 PHY"
+++	depends on PHYLIB
+++	---help---
+++	  Support the Broadcom BCM84881 PHY.
+++
++ config CICADA_PHY
++ 	tristate "Cicada PHYs"
++ 	---help---
++--- a/drivers/net/phy/Makefile
+++++ b/drivers/net/phy/Makefile
++@@ -62,6 +62,7 @@ obj-$(CONFIG_BCM87XX_PHY)	+= bcm87xx.o
++ obj-$(CONFIG_BCM_CYGNUS_PHY)	+= bcm-cygnus.o
++ obj-$(CONFIG_BCM_NET_PHYLIB)	+= bcm-phy-lib.o
++ obj-$(CONFIG_BROADCOM_PHY)	+= broadcom.o
+++obj-$(CONFIG_BCM84881_PHY)	+= bcm84881.o
++ obj-$(CONFIG_CICADA_PHY)	+= cicada.o
++ obj-$(CONFIG_CORTINA_PHY)	+= cortina.o
++ obj-$(CONFIG_DAVICOM_PHY)	+= davicom.o
++--- /dev/null
+++++ b/drivers/net/phy/bcm84881.c
++@@ -0,0 +1,269 @@
+++// SPDX-License-Identifier: GPL-2.0
+++// Broadcom BCM84881 NBASE-T PHY driver, as found on a SFP+ module.
+++// Copyright (C) 2019 Russell King, Deep Blue Solutions Ltd.
+++//
+++// Like the Marvell 88x3310, the Broadcom 84881 changes its host-side
+++// interface according to the operating speed between 10GBASE-R,
+++// 2500BASE-X and SGMII (but unlike the 88x3310, without the control
+++// word).
+++//
+++// This driver only supports those aspects of the PHY that I'm able to
+++// observe and test with the SFP+ module, which is an incomplete subset
+++// of what this PHY is able to support. For example, I only assume it
+++// supports a single lane Serdes connection, but it may be that the PHY
+++// is able to support more than that.
+++#include <linux/delay.h>
+++#include <linux/module.h>
+++#include <linux/phy.h>
+++
+++enum {
+++	MDIO_AN_C22 = 0xffe0,
+++};
+++
+++static int bcm84881_wait_init(struct phy_device *phydev)
+++{
+++	unsigned int tries = 20;
+++	int ret, val;
+++
+++	do {
+++		val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1);
+++		if (val < 0) {
+++			ret = val;
+++			break;
+++		}
+++		if (!(val & MDIO_CTRL1_RESET)) {
+++			ret = 0;
+++			break;
+++		}
+++		if (!--tries) {
+++			ret = -ETIMEDOUT;
+++			break;
+++		}
+++		msleep(100);
+++	} while (1);
+++
+++	if (ret)
+++		phydev_err(phydev, "%s failed: %d\n", __func__, ret);
+++
+++	return ret;
+++}
+++
+++static int bcm84881_config_init(struct phy_device *phydev)
+++{
+++	switch (phydev->interface) {
+++	case PHY_INTERFACE_MODE_SGMII:
+++	case PHY_INTERFACE_MODE_2500BASEX:
+++	case PHY_INTERFACE_MODE_10GKR:
+++		break;
+++	default:
+++		return -ENODEV;
+++	}
+++	return 0;
+++}
+++
+++static int bcm84881_probe(struct phy_device *phydev)
+++{
+++	/* This driver requires PMAPMD and AN blocks */
+++	const u32 mmd_mask = MDIO_DEVS_PMAPMD | MDIO_DEVS_AN;
+++
+++	if (!phydev->is_c45 ||
+++	    (phydev->c45_ids.devices_in_package & mmd_mask) != mmd_mask)
+++		return -ENODEV;
+++
+++	return 0;
+++}
+++
+++static int bcm84881_get_features(struct phy_device *phydev)
+++{
+++	int ret;
+++
+++	ret = genphy_c45_pma_read_abilities(phydev);
+++	if (ret)
+++		return ret;
+++
+++	/* Although the PHY sets bit 1.11.8, it does not support 10M modes */
+++	linkmode_clear_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT,
+++			   phydev->supported);
+++	linkmode_clear_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT,
+++			   phydev->supported);
+++
+++	return 0;
+++}
+++
+++static int bcm84881_config_aneg(struct phy_device *phydev)
+++{
+++	bool changed = false;
+++	u32 adv;
+++	int ret;
+++
+++	/* Wait for the PHY to finish initialising, otherwise our
+++	 * advertisement may be overwritten.
+++	 */
+++	ret = bcm84881_wait_init(phydev);
+++	if (ret)
+++		return ret;
+++
+++	/* We don't support manual MDI control */
+++	phydev->mdix_ctrl = ETH_TP_MDI_AUTO;
+++
+++	/* disabled autoneg doesn't seem to work with this PHY */
+++	if (phydev->autoneg == AUTONEG_DISABLE)
+++		return -EINVAL;
+++
+++	ret = genphy_c45_an_config_aneg(phydev);
+++	if (ret < 0)
+++		return ret;
+++	if (ret > 0)
+++		changed = true;
+++
+++	adv = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
+++	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN,
+++				     MDIO_AN_C22 + MII_CTRL1000,
+++				     ADVERTISE_1000FULL | ADVERTISE_1000HALF,
+++				     adv);
+++	if (ret < 0)
+++		return ret;
+++	if (ret > 0)
+++		changed = true;
+++
+++	return genphy_c45_check_and_restart_aneg(phydev, changed);
+++}
+++
+++static int bcm84881_aneg_done(struct phy_device *phydev)
+++{
+++	int bmsr, val;
+++
+++	val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1);
+++	if (val < 0)
+++		return val;
+++
+++	bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR);
+++	if (bmsr < 0)
+++		return val;
+++
+++	return !!(val & MDIO_AN_STAT1_COMPLETE) &&
+++	       !!(bmsr & BMSR_ANEGCOMPLETE);
+++}
+++
+++static int bcm84881_read_status(struct phy_device *phydev)
+++{
+++	unsigned int mode;
+++	int bmsr, val;
+++
+++	val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1);
+++	if (val < 0)
+++		return val;
+++
+++	if (val & MDIO_AN_CTRL1_RESTART) {
+++		phydev->link = 0;
+++		return 0;
+++	}
+++
+++	val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1);
+++	if (val < 0)
+++		return val;
+++
+++	bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR);
+++	if (bmsr < 0)
+++		return val;
+++
+++	phydev->autoneg_complete = !!(val & MDIO_AN_STAT1_COMPLETE) &&
+++				   !!(bmsr & BMSR_ANEGCOMPLETE);
+++	phydev->link = !!(val & MDIO_STAT1_LSTATUS) &&
+++		       !!(bmsr & BMSR_LSTATUS);
+++	if (phydev->autoneg == AUTONEG_ENABLE && !phydev->autoneg_complete)
+++		phydev->link = false;
+++
+++	if (!phydev->link)
+++		return 0;
+++
+++	linkmode_zero(phydev->lp_advertising);
+++	phydev->speed = SPEED_UNKNOWN;
+++	phydev->duplex = DUPLEX_UNKNOWN;
+++	phydev->pause = 0;
+++	phydev->asym_pause = 0;
+++	phydev->mdix = 0;
+++
+++	if (phydev->autoneg_complete) {
+++		val = genphy_c45_read_lpa(phydev);
+++		if (val < 0)
+++			return val;
+++
+++		val = phy_read_mmd(phydev, MDIO_MMD_AN,
+++				   MDIO_AN_C22 + MII_STAT1000);
+++		if (val < 0)
+++			return val;
+++
+++		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
+++
+++		if (phydev->autoneg == AUTONEG_ENABLE)
+++			phy_resolve_aneg_linkmode(phydev);
+++	}
+++
+++	if (phydev->autoneg == AUTONEG_DISABLE) {
+++		/* disabled autoneg doesn't seem to work, so force the link
+++		 * down.
+++		 */
+++		phydev->link = 0;
+++		return 0;
+++	}
+++
+++	/* Set the host link mode - we set the phy interface mode and
+++	 * the speed according to this register so that downshift works.
+++	 * We leave the duplex setting as per the resolution from the
+++	 * above.
+++	 */
+++	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, 0x4011);
+++	mode = (val & 0x1e) >> 1;
+++	if (mode == 1 || mode == 2)
+++		phydev->interface = PHY_INTERFACE_MODE_SGMII;
+++	else if (mode == 3)
+++		phydev->interface = PHY_INTERFACE_MODE_10GKR;
+++	else if (mode == 4)
+++		phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
+++	switch (mode & 7) {
+++	case 1:
+++		phydev->speed = SPEED_100;
+++		break;
+++	case 2:
+++		phydev->speed = SPEED_1000;
+++		break;
+++	case 3:
+++		phydev->speed = SPEED_10000;
+++		break;
+++	case 4:
+++		phydev->speed = SPEED_2500;
+++		break;
+++	case 5:
+++		phydev->speed = SPEED_5000;
+++		break;
+++	}
+++
+++	return genphy_c45_read_mdix(phydev);
+++}
+++
+++static struct phy_driver bcm84881_drivers[] = {
+++	{
+++		.phy_id		= 0xae025150,
+++		.phy_id_mask	= 0xfffffff0,
+++		.name		= "Broadcom BCM84881",
+++		.config_init	= bcm84881_config_init,
+++		.probe		= bcm84881_probe,
+++		.get_features	= bcm84881_get_features,
+++		.config_aneg	= bcm84881_config_aneg,
+++		.aneg_done	= bcm84881_aneg_done,
+++		.read_status	= bcm84881_read_status,
+++	},
+++};
+++
+++module_phy_driver(bcm84881_drivers);
+++
+++/* FIXME: module auto-loading for Clause 45 PHYs seems non-functional */
+++static struct mdio_device_id __maybe_unused bcm84881_tbl[] = {
+++	{ 0xae025150, 0xfffffff0 },
+++	{ },
+++};
+++MODULE_AUTHOR("Russell King");
+++MODULE_DESCRIPTION("Broadcom BCM84881 PHY driver");
+++MODULE_DEVICE_TABLE(mdio, bcm84881_tbl);
+++MODULE_LICENSE("GPL");
+diff --git a/target/linux/generic/pending-5.4/753-net-sfp-add-support-for-Clause-45-PHYs.patch b/target/linux/generic/pending-5.4/753-net-sfp-add-support-for-Clause-45-PHYs.patch
+new file mode 100644
+index 0000000000..338ddc3761
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/753-net-sfp-add-support-for-Clause-45-PHYs.patch
+@@ -0,0 +1,94 @@
++From 6df6709dc3d00e0bc948d45dfa8d8f18ba379c48 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Tue, 5 Nov 2019 11:56:18 +0000
++Subject: [PATCH 656/660] net: sfp: add support for Clause 45 PHYs
++
++Some SFP+ modules have a Clause 45 PHY onboard, which is accessible via
++the normal I2C address.  Detect 10G BASE-T PHYs which may have an
++accessible PHY and probe for it.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 44 +++++++++++++++++++++++++++++++++++++++----
++ 1 file changed, 40 insertions(+), 4 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -1402,12 +1402,12 @@ static void sfp_sm_phy_detach(struct sfp
++ 	sfp->mod_phy = NULL;
++ }
++ 
++-static void sfp_sm_probe_phy(struct sfp *sfp)
+++static void sfp_sm_probe_phy(struct sfp *sfp, bool is_c45)
++ {
++ 	struct phy_device *phy;
++ 	int err;
++ 
++-	phy = mdiobus_scan(sfp->i2c_mii, SFP_PHY_ADDR);
+++	phy = get_phy_device(sfp->i2c_mii, SFP_PHY_ADDR, is_c45);
++ 	if (phy == ERR_PTR(-ENODEV)) {
++ 		dev_info(sfp->dev, "no PHY detected\n");
++ 		return;
++@@ -1417,6 +1417,13 @@ static void sfp_sm_probe_phy(struct sfp
++ 		return;
++ 	}
++ 
+++	err = phy_device_register(phy);
+++	if (err) {
+++		phy_device_free(phy);
+++		dev_err(sfp->dev, "phy_device_register failed: %d\n", err);
+++		return;
+++	}
+++
++ 	err = sfp_add_phy(sfp->sfp_bus, phy);
++ 	if (err) {
++ 		phy_device_remove(phy);
++@@ -1487,10 +1494,32 @@ static void sfp_sm_fault(struct sfp *sfp
++ 	}
++ }
++ 
+++/* Probe a SFP for a PHY device if the module supports copper - the PHY
+++ * normally sits at I2C bus address 0x56, and may either be a clause 22
+++ * or clause 45 PHY.
+++ *
+++ * Clause 22 copper SFP modules normally operate in Cisco SGMII mode with
+++ * negotiation enabled, but some may be in 1000base-X - which is for the
+++ * PHY driver to determine.
+++ *
+++ * Clause 45 copper SFP+ modules (10G) appear to switch their interface
+++ * mode according to the negotiated line speed.
+++ */
++ static void sfp_sm_probe_for_phy(struct sfp *sfp)
++ {
++-	if (sfp->id.base.e1000_base_t)
++-		sfp_sm_probe_phy(sfp);
+++	switch (sfp->id.base.extended_cc) {
+++	case SFF8024_ECC_10GBASE_T_SFI:
+++	case SFF8024_ECC_10GBASE_T_SR:
+++	case SFF8024_ECC_5GBASE_T:
+++	case SFF8024_ECC_2_5GBASE_T:
+++		sfp_sm_probe_phy(sfp, true);
+++		break;
+++
+++	default:
+++		if (sfp->id.base.e1000_base_t)
+++			sfp_sm_probe_phy(sfp, false);
+++		break;
+++	}
++ }
++ 
++ static int sfp_module_parse_power(struct sfp *sfp)
++@@ -1550,6 +1579,13 @@ static int sfp_sm_mod_hpower(struct sfp
++ 		return -EAGAIN;
++ 	}
++ 
+++	/* DM7052 reports as a high power module, responds to reads (with
+++	 * all bytes 0xff) at 0x51 but does not accept writes.  In any case,
+++	 * if the bit is already set, we're already in high power mode.
+++	 */
+++	if (!!(val & BIT(0)) == enable)
+++		return 0;
+++
++ 	if (enable)
++ 		val |= BIT(0);
++ 	else
+diff --git a/target/linux/generic/pending-5.4/754-net-sfp-fix-unbind.patch b/target/linux/generic/pending-5.4/754-net-sfp-fix-unbind.patch
+new file mode 100644
+index 0000000000..8d98a5d7a1
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/754-net-sfp-fix-unbind.patch
+@@ -0,0 +1,28 @@
++From 729fd05aac22cdf1e502fbf1bf80e5ebba0d9fbc Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Tue, 3 Dec 2019 17:48:28 +0000
++Subject: [PATCH] net: sfp: fix unbind
++
++When unbinding, we don't correctly tear down the module state, leaving
++(for example) the hwmon registration behind. Ensure everything is
++properly removed by sending a remove event at unbind.
++
++Fixes: 6b0da5c9c1a3 ("net: sfp: track upstream's attachment state in state machine")
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 4 ++++
++ 1 file changed, 4 insertions(+)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -2344,6 +2344,10 @@ static int sfp_remove(struct platform_de
++ 
++ 	sfp_unregister_socket(sfp->sfp_bus);
++ 
+++	rtnl_lock();
+++	sfp_sm_event(sfp, SFP_E_REMOVE);
+++	rtnl_unlock();
+++
++ 	return 0;
++ }
++ 
+diff --git a/target/linux/generic/pending-5.4/755-net-sfp-fix-hwmon.patch b/target/linux/generic/pending-5.4/755-net-sfp-fix-hwmon.patch
+new file mode 100644
+index 0000000000..8bfe37bf4c
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/755-net-sfp-fix-hwmon.patch
+@@ -0,0 +1,44 @@
++From 5eb0df5023c6ae8a71a7848fd5e1f788d86e51ae Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Tue, 3 Dec 2019 18:46:04 +0000
++Subject: [PATCH] net: sfp: fix hwmon
++
++The referenced commit below allowed more than one hwmon device to be
++created per SFP, which is definitely not what we want. Avoid this by
++only creating the hwmon device just as we transition to WAITDEV state.
++
++Fixes: 139d3a212a1f ("net: sfp: allow modules with slow diagnostics to probe")
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 13 ++++---------
++ 1 file changed, 4 insertions(+), 9 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -1796,6 +1796,10 @@ static void sfp_sm_module(struct sfp *sf
++ 			break;
++ 		}
++ 
+++		err = sfp_hwmon_insert(sfp);
+++		if (err)
+++			dev_warn(sfp->dev, "hwmon probe failed: %d\n", err);
+++
++ 		sfp_sm_mod_next(sfp, SFP_MOD_WAITDEV, 0);
++ 		/* fall through */
++ 	case SFP_MOD_WAITDEV:
++@@ -1845,15 +1849,6 @@ static void sfp_sm_module(struct sfp *sf
++ 	case SFP_MOD_ERROR:
++ 		break;
++ 	}
++-
++-#if IS_ENABLED(CONFIG_HWMON)
++-	if (sfp->sm_mod_state >= SFP_MOD_WAITDEV &&
++-	    IS_ERR_OR_NULL(sfp->hwmon_dev)) {
++-		err = sfp_hwmon_insert(sfp);
++-		if (err)
++-			dev_warn(sfp->dev, "hwmon probe failed: %d\n", err);
++-	}
++-#endif
++ }
++ 
++ static void sfp_sm_main(struct sfp *sfp, unsigned int event)
+diff --git a/target/linux/generic/pending-5.4/756-net-sfp-use-a-definition-for-the-fault-recovery-atte.patch b/target/linux/generic/pending-5.4/756-net-sfp-use-a-definition-for-the-fault-recovery-atte.patch
+new file mode 100644
+index 0000000000..47d807813a
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/756-net-sfp-use-a-definition-for-the-fault-recovery-atte.patch
+@@ -0,0 +1,55 @@
++From 4d6bfb6fbb00af38402db4d1ce464e22def9fd9e Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Thu, 28 Nov 2019 14:24:40 +0000
++Subject: [PATCH 1/4] net: sfp: use a definition for the fault recovery
++ attempts
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 14 +++++++++++---
++ 1 file changed, 11 insertions(+), 3 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -172,6 +172,14 @@ static const enum gpiod_flags gpio_flags
++ #define T_RESET_US		10
++ #define T_FAULT_RECOVER		msecs_to_jiffies(1000)
++ 
+++/* N_FAULT_INIT is the number of recovery attempts at module initialisation
+++ * time. If the TX_FAULT signal is not deasserted after this number of
+++ * attempts at clearing it, we decide that the module is faulty.
+++ * N_FAULT is the same but after the module has initialised.
+++ */
+++#define N_FAULT_INIT		5
+++#define N_FAULT			5
+++
++ /* SFP module presence detection is poor: the three MOD DEF signals are
++  * the same length on the PCB, which means it's possible for MOD DEF 0 to
++  * connect before the I2C bus on MOD DEF 1/2.
++@@ -1885,7 +1893,7 @@ static void sfp_sm_main(struct sfp *sfp,
++ 		sfp_module_tx_enable(sfp);
++ 
++ 		/* Initialise the fault clearance retries */
++-		sfp->sm_retries = 5;
+++		sfp->sm_retries = N_FAULT_INIT;
++ 
++ 		/* We need to check the TX_FAULT state, which is not defined
++ 		 * while TX_DISABLE is asserted. The earliest we want to do
++@@ -1925,7 +1933,7 @@ static void sfp_sm_main(struct sfp *sfp,
++ 			 * or t_start_up, so assume there is a fault.
++ 			 */
++ 			sfp_sm_fault(sfp, SFP_S_INIT_TX_FAULT,
++-				     sfp->sm_retries == 5);
+++				     sfp->sm_retries == N_FAULT_INIT);
++ 		} else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) {
++ 	init_done:	/* TX_FAULT deasserted or we timed out with TX_FAULT
++ 			 * clear.  Probe for the PHY and check the LOS state.
++@@ -1938,7 +1946,7 @@ static void sfp_sm_main(struct sfp *sfp,
++ 			sfp_sm_link_check_los(sfp);
++ 
++ 			/* Reset the fault retry count */
++-			sfp->sm_retries = 5;
+++			sfp->sm_retries = N_FAULT;
++ 		}
++ 		break;
++ 
+diff --git a/target/linux/generic/pending-5.4/757-net-sfp-rename-sm_retries.patch b/target/linux/generic/pending-5.4/757-net-sfp-rename-sm_retries.patch
+new file mode 100644
+index 0000000000..0ca73c9266
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/757-net-sfp-rename-sm_retries.patch
+@@ -0,0 +1,60 @@
++From bfa3cbb01c7ea34d7369c9bd2ec1b2dc67082b04 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Mon, 2 Dec 2019 18:06:44 +0000
++Subject: [PATCH 2/4] net: sfp: rename sm_retries
++
++Rename sm_retries as sm_fault_retries, as this is what this member is
++tracking.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 10 +++++-----
++ 1 file changed, 5 insertions(+), 5 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -234,7 +234,7 @@ struct sfp {
++ 	unsigned char sm_mod_tries;
++ 	unsigned char sm_dev_state;
++ 	unsigned short sm_state;
++-	unsigned int sm_retries;
+++	unsigned char sm_fault_retries;
++ 
++ 	struct sfp_eeprom_id id;
++ 	unsigned int module_power_mW;
++@@ -1490,7 +1490,7 @@ static bool sfp_los_event_inactive(struc
++ 
++ static void sfp_sm_fault(struct sfp *sfp, unsigned int next_state, bool warn)
++ {
++-	if (sfp->sm_retries && !--sfp->sm_retries) {
+++	if (sfp->sm_fault_retries && !--sfp->sm_fault_retries) {
++ 		dev_err(sfp->dev,
++ 			"module persistently indicates fault, disabling\n");
++ 		sfp_sm_next(sfp, SFP_S_TX_DISABLE, 0);
++@@ -1893,7 +1893,7 @@ static void sfp_sm_main(struct sfp *sfp,
++ 		sfp_module_tx_enable(sfp);
++ 
++ 		/* Initialise the fault clearance retries */
++-		sfp->sm_retries = N_FAULT_INIT;
+++		sfp->sm_fault_retries = N_FAULT_INIT;
++ 
++ 		/* We need to check the TX_FAULT state, which is not defined
++ 		 * while TX_DISABLE is asserted. The earliest we want to do
++@@ -1933,7 +1933,7 @@ static void sfp_sm_main(struct sfp *sfp,
++ 			 * or t_start_up, so assume there is a fault.
++ 			 */
++ 			sfp_sm_fault(sfp, SFP_S_INIT_TX_FAULT,
++-				     sfp->sm_retries == N_FAULT_INIT);
+++				     sfp->sm_fault_retries == N_FAULT_INIT);
++ 		} else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) {
++ 	init_done:	/* TX_FAULT deasserted or we timed out with TX_FAULT
++ 			 * clear.  Probe for the PHY and check the LOS state.
++@@ -1946,7 +1946,7 @@ static void sfp_sm_main(struct sfp *sfp,
++ 			sfp_sm_link_check_los(sfp);
++ 
++ 			/* Reset the fault retry count */
++-			sfp->sm_retries = N_FAULT;
+++			sfp->sm_fault_retries = N_FAULT;
++ 		}
++ 		break;
++ 
+diff --git a/target/linux/generic/pending-5.4/758-net-sfp-error-handling-for-phy-probe.patch b/target/linux/generic/pending-5.4/758-net-sfp-error-handling-for-phy-probe.patch
+new file mode 100644
+index 0000000000..b0bb905fec
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/758-net-sfp-error-handling-for-phy-probe.patch
+@@ -0,0 +1,97 @@
++From 1fba543dc8edf4a43bff3276306648bb27c1e207 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Fri, 29 Nov 2019 00:30:08 +0000
++Subject: [PATCH 3/4] net: sfp: error handling for phy probe
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 26 +++++++++++++++++---------
++ 1 file changed, 17 insertions(+), 9 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -1410,7 +1410,7 @@ static void sfp_sm_phy_detach(struct sfp
++ 	sfp->mod_phy = NULL;
++ }
++ 
++-static void sfp_sm_probe_phy(struct sfp *sfp, bool is_c45)
+++static int sfp_sm_probe_phy(struct sfp *sfp, bool is_c45)
++ {
++ 	struct phy_device *phy;
++ 	int err;
++@@ -1418,18 +1418,18 @@ static void sfp_sm_probe_phy(struct sfp
++ 	phy = get_phy_device(sfp->i2c_mii, SFP_PHY_ADDR, is_c45);
++ 	if (phy == ERR_PTR(-ENODEV)) {
++ 		dev_info(sfp->dev, "no PHY detected\n");
++-		return;
+++		return 0;
++ 	}
++ 	if (IS_ERR(phy)) {
++ 		dev_err(sfp->dev, "mdiobus scan returned %ld\n", PTR_ERR(phy));
++-		return;
+++		return PTR_ERR(phy);
++ 	}
++ 
++ 	err = phy_device_register(phy);
++ 	if (err) {
++ 		phy_device_free(phy);
++ 		dev_err(sfp->dev, "phy_device_register failed: %d\n", err);
++-		return;
+++		return err;
++ 	}
++ 
++ 	err = sfp_add_phy(sfp->sfp_bus, phy);
++@@ -1437,10 +1437,12 @@ static void sfp_sm_probe_phy(struct sfp
++ 		phy_device_remove(phy);
++ 		phy_device_free(phy);
++ 		dev_err(sfp->dev, "sfp_add_phy failed: %d\n", err);
++-		return;
+++		return err;
++ 	}
++ 
++ 	sfp->mod_phy = phy;
+++
+++	return 0;
++ }
++ 
++ static void sfp_sm_link_up(struct sfp *sfp)
++@@ -1513,21 +1515,24 @@ static void sfp_sm_fault(struct sfp *sfp
++  * Clause 45 copper SFP+ modules (10G) appear to switch their interface
++  * mode according to the negotiated line speed.
++  */
++-static void sfp_sm_probe_for_phy(struct sfp *sfp)
+++static int sfp_sm_probe_for_phy(struct sfp *sfp)
++ {
+++	int err = 0;
+++
++ 	switch (sfp->id.base.extended_cc) {
++ 	case SFF8024_ECC_10GBASE_T_SFI:
++ 	case SFF8024_ECC_10GBASE_T_SR:
++ 	case SFF8024_ECC_5GBASE_T:
++ 	case SFF8024_ECC_2_5GBASE_T:
++-		sfp_sm_probe_phy(sfp, true);
+++		err = sfp_sm_probe_phy(sfp, true);
++ 		break;
++ 
++ 	default:
++ 		if (sfp->id.base.e1000_base_t)
++-			sfp_sm_probe_phy(sfp, false);
+++			err = sfp_sm_probe_phy(sfp, false);
++ 		break;
++ 	}
+++	return err;
++ }
++ 
++ static int sfp_module_parse_power(struct sfp *sfp)
++@@ -1938,7 +1943,10 @@ static void sfp_sm_main(struct sfp *sfp,
++ 	init_done:	/* TX_FAULT deasserted or we timed out with TX_FAULT
++ 			 * clear.  Probe for the PHY and check the LOS state.
++ 			 */
++-			sfp_sm_probe_for_phy(sfp);
+++			if (sfp_sm_probe_for_phy(sfp)) {
+++				sfp_sm_next(sfp, SFP_S_FAIL, 0);
+++				break;
+++			}
++ 			if (sfp_module_start(sfp->sfp_bus)) {
++ 				sfp_sm_next(sfp, SFP_S_FAIL, 0);
++ 				break;
+diff --git a/target/linux/generic/pending-5.4/759-net-sfp-re-attempt-probing-for-phy.patch b/target/linux/generic/pending-5.4/759-net-sfp-re-attempt-probing-for-phy.patch
+new file mode 100644
+index 0000000000..d122bc7c62
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/759-net-sfp-re-attempt-probing-for-phy.patch
+@@ -0,0 +1,132 @@
++From 6c4efe83a0acf6f06c89ae17b885fa5739eb5be7 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Mon, 2 Dec 2019 18:20:22 +0000
++Subject: [PATCH 4/4] net: sfp: re-attempt probing for phy
++
++Some 1000BASE-T PHY modules take a while for the PHY to wake up.
++Retry the probe a number of times before deciding that the module has
++no PHY.
++
++Tested with:
++ Sourcephotonics SPGBTXCNFC - PHY takes less than 50ms to respond.
++ Champion One 1000SFPT - PHY takes about 200ms to respond.
++ Mikrotik S-RJ01 - no PHY
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++---
++ drivers/net/phy/sfp.c | 59 ++++++++++++++++++++++++++++++++++++---------------
++ 1 file changed, 42 insertions(+), 17 deletions(-)
++
++--- a/drivers/net/phy/sfp.c
+++++ b/drivers/net/phy/sfp.c
++@@ -62,6 +62,7 @@ enum {
++ 	SFP_S_FAIL,
++ 	SFP_S_WAIT,
++ 	SFP_S_INIT,
+++	SFP_S_INIT_PHY,
++ 	SFP_S_INIT_TX_FAULT,
++ 	SFP_S_WAIT_LOS,
++ 	SFP_S_LINK_UP,
++@@ -126,6 +127,7 @@ static const char * const sm_state_strin
++ 	[SFP_S_FAIL] = "fail",
++ 	[SFP_S_WAIT] = "wait",
++ 	[SFP_S_INIT] = "init",
+++	[SFP_S_INIT_PHY] = "init_phy",
++ 	[SFP_S_INIT_TX_FAULT] = "init_tx_fault",
++ 	[SFP_S_WAIT_LOS] = "wait_los",
++ 	[SFP_S_LINK_UP] = "link_up",
++@@ -180,6 +182,12 @@ static const enum gpiod_flags gpio_flags
++ #define N_FAULT_INIT		5
++ #define N_FAULT			5
++ 
+++/* T_PHY_RETRY is the time interval between attempts to probe the PHY.
+++ * R_PHY_RETRY is the number of attempts.
+++ */
+++#define T_PHY_RETRY		msecs_to_jiffies(50)
+++#define R_PHY_RETRY		12
+++
++ /* SFP module presence detection is poor: the three MOD DEF signals are
++  * the same length on the PCB, which means it's possible for MOD DEF 0 to
++  * connect before the I2C bus on MOD DEF 1/2.
++@@ -235,6 +243,7 @@ struct sfp {
++ 	unsigned char sm_dev_state;
++ 	unsigned short sm_state;
++ 	unsigned char sm_fault_retries;
+++	unsigned char sm_phy_retries;
++ 
++ 	struct sfp_eeprom_id id;
++ 	unsigned int module_power_mW;
++@@ -1416,10 +1425,8 @@ static int sfp_sm_probe_phy(struct sfp *
++ 	int err;
++ 
++ 	phy = get_phy_device(sfp->i2c_mii, SFP_PHY_ADDR, is_c45);
++-	if (phy == ERR_PTR(-ENODEV)) {
++-		dev_info(sfp->dev, "no PHY detected\n");
++-		return 0;
++-	}
+++	if (phy == ERR_PTR(-ENODEV))
+++		return PTR_ERR(phy);
++ 	if (IS_ERR(phy)) {
++ 		dev_err(sfp->dev, "mdiobus scan returned %ld\n", PTR_ERR(phy));
++ 		return PTR_ERR(phy);
++@@ -1867,6 +1874,7 @@ static void sfp_sm_module(struct sfp *sf
++ static void sfp_sm_main(struct sfp *sfp, unsigned int event)
++ {
++ 	unsigned long timeout;
+++	int ret;
++ 
++ 	/* Some events are global */
++ 	if (sfp->sm_state != SFP_S_DOWN &&
++@@ -1940,22 +1948,39 @@ static void sfp_sm_main(struct sfp *sfp,
++ 			sfp_sm_fault(sfp, SFP_S_INIT_TX_FAULT,
++ 				     sfp->sm_fault_retries == N_FAULT_INIT);
++ 		} else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) {
++-	init_done:	/* TX_FAULT deasserted or we timed out with TX_FAULT
++-			 * clear.  Probe for the PHY and check the LOS state.
++-			 */
++-			if (sfp_sm_probe_for_phy(sfp)) {
++-				sfp_sm_next(sfp, SFP_S_FAIL, 0);
++-				break;
++-			}
++-			if (sfp_module_start(sfp->sfp_bus)) {
++-				sfp_sm_next(sfp, SFP_S_FAIL, 0);
+++	init_done:
+++			sfp->sm_phy_retries = R_PHY_RETRY;
+++			goto phy_probe;
+++		}
+++		break;
+++
+++	case SFP_S_INIT_PHY:
+++		if (event != SFP_E_TIMEOUT)
+++			break;
+++	phy_probe:
+++		/* TX_FAULT deasserted or we timed out with TX_FAULT
+++		 * clear.  Probe for the PHY and check the LOS state.
+++		 */
+++		ret = sfp_sm_probe_for_phy(sfp);
+++		if (ret == -ENODEV) {
+++			if (--sfp->sm_phy_retries) {
+++				sfp_sm_next(sfp, SFP_S_INIT_PHY, T_PHY_RETRY);
++ 				break;
+++			} else {
+++				dev_info(sfp->dev, "no PHY detected\n");
++ 			}
++-			sfp_sm_link_check_los(sfp);
++-
++-			/* Reset the fault retry count */
++-			sfp->sm_fault_retries = N_FAULT;
+++		} else if (ret) {
+++			sfp_sm_next(sfp, SFP_S_FAIL, 0);
+++			break;
++ 		}
+++		if (sfp_module_start(sfp->sfp_bus)) {
+++			sfp_sm_next(sfp, SFP_S_FAIL, 0);
+++			break;
+++		}
+++		sfp_sm_link_check_los(sfp);
+++
+++		/* Reset the fault retry count */
+++		sfp->sm_fault_retries = N_FAULT;
++ 		break;
++ 
++ 	case SFP_S_INIT_TX_FAULT:
+diff --git a/target/linux/generic/pending-5.4/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch b/target/linux/generic/pending-5.4/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch
+new file mode 100644
+index 0000000000..a49b48f744
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch
+@@ -0,0 +1,27 @@
++From a1b291f3f6c80a6c5ccad7283fc472d77a2a4763 Mon Sep 17 00:00:00 2001
++From: Russell King <rmk+kernel@armlinux.org.uk>
++Date: Sun, 22 Dec 2019 12:40:11 +0000
++Subject: [PATCH] net: dsa: mv88e6xxx: fix vlan setup
++
++Provide an option that drivers can set to indicate they want to receive
++vlan configuration even when vlan filtering is disabled. This is safe
++for Marvell DSA bridges, which do not look up ingress traffic in the
++VTU if the port is in 8021Q disabled state. Whether this change is
++suitable for all DSA bridges is not known.
++
++Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
++Signed-off-by: DENG Qingfang <dqfext@gmail.com>
++---
++ drivers/net/dsa/mv88e6xxx/chip.c |  1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++++ b/drivers/net/dsa/mv88e6xxx/chip.c
++@@ -2663,6 +2663,7 @@ static int mv88e6xxx_setup(struct dsa_sw
++ 
++ 	chip->ds = ds;
++ 	ds->slave_mii_bus = mv88e6xxx_default_mdio_bus(chip);
+++	ds->configure_vlan_while_not_filtering = true;
++ 
++ 	mv88e6xxx_reg_lock(chip);
++ 
+diff --git a/target/linux/generic/pending-5.4/761-net-dsa-mt7530-Support-EEE-features.patch b/target/linux/generic/pending-5.4/761-net-dsa-mt7530-Support-EEE-features.patch
+new file mode 100644
+index 0000000000..c2dc35d134
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/761-net-dsa-mt7530-Support-EEE-features.patch
+@@ -0,0 +1,121 @@
++From 9cfb2d426c38272f245e9e6f62b3552d1ed5852b Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
++Date: Tue, 21 Apr 2020 00:18:08 +0200
++Subject: [PATCH] net: dsa: mt7530: Support EEE features
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++Signed-off-by: René van Dorst <opensource@vdorst.com>
++--- a/drivers/net/dsa/mt7530.c
+++++ b/drivers/net/dsa/mt7530.c
++@@ -1407,9 +1407,13 @@ static void mt7530_phylink_mac_config(st
++ 	switch (state->speed) {
++ 	case SPEED_1000:
++ 		mcr_new |= PMCR_FORCE_SPEED_1000;
+++		if (priv->eee_enable & BIT(port))
+++			mcr_new |= PMCR_FORCE_EEE1G;
++ 		break;
++ 	case SPEED_100:
++ 		mcr_new |= PMCR_FORCE_SPEED_100;
+++		if (priv->eee_enable & BIT(port))
+++			mcr_new |= PMCR_FORCE_EEE100;
++ 		break;
++ 	}
++ 	if (state->duplex == DUPLEX_FULL) {
++@@ -1545,6 +1549,54 @@ mt7530_phylink_mac_link_state(struct dsa
++ 	return 1;
++ }
++ 
+++static int mt7530_get_mac_eee(struct dsa_switch *ds, int port,
+++			      struct ethtool_eee *e)
+++{
+++	struct mt7530_priv *priv = ds->priv;
+++	u32 eeecr, pmsr;
+++
+++	e->eee_enabled = !!(priv->eee_enable & BIT(port));
+++
+++	if (e->eee_enabled) {
+++		eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
+++		e->tx_lpi_enabled = !(eeecr & LPI_MODE_EN);
+++		e->tx_lpi_timer   = (eeecr >> 4) & 0xFFF;
+++		pmsr = mt7530_read(priv, MT7530_PMSR_P(port));
+++		e->eee_active  = e->eee_enabled && !!(pmsr & PMSR_EEE1G);
+++	} else {
+++		e->tx_lpi_enabled = 0;
+++		e->tx_lpi_timer = 0;
+++		e->eee_active = 0;
+++	}
+++
+++	return 0;
+++}
+++
+++static int mt7530_set_mac_eee(struct dsa_switch *ds, int port,
+++			      struct ethtool_eee *e)
+++{
+++	struct mt7530_priv *priv = ds->priv;
+++	u32 eeecr;
+++
+++	if (e->tx_lpi_enabled && e->tx_lpi_timer > 0xFFF)
+++		return -EINVAL;
+++
+++	if (e->eee_enabled) {
+++		priv->eee_enable |= BIT(port);
+++		//MT7530_PMEEECR_P
+++		eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
+++		eeecr &= 0xFFFF0000;
+++		if (!e->tx_lpi_enabled)
+++			eeecr |= LPI_MODE_EN;
+++		eeecr |= LPI_THRESH(e->tx_lpi_timer);
+++		mt7530_write(priv, MT7530_PMEEECR_P(port), eeecr);
+++	} else {
+++		priv->eee_enable &= ~(BIT(port));
+++	}
+++
+++	return 0;
+++}
+++
++ static const struct dsa_switch_ops mt7530_switch_ops = {
++ 	.get_tag_protocol	= mtk_get_tag_protocol,
++ 	.setup			= mt7530_setup,
++@@ -1572,6 +1624,8 @@ static const struct dsa_switch_ops mt753
++ 	.phylink_mac_config	= mt7530_phylink_mac_config,
++ 	.phylink_mac_link_down	= mt7530_phylink_mac_link_down,
++ 	.phylink_mac_link_up	= mt7530_phylink_mac_link_up,
+++	.get_mac_eee		= mt7530_get_mac_eee,
+++	.set_mac_eee		= mt7530_set_mac_eee,
++ };
++ 
++ static const struct of_device_id mt7530_of_match[] = {
++--- a/drivers/net/dsa/mt7530.h
+++++ b/drivers/net/dsa/mt7530.h
++@@ -212,6 +212,8 @@ enum mt7530_vlan_port_attr {
++ #define  PMCR_RX_EN			BIT(13)
++ #define  PMCR_BACKOFF_EN		BIT(9)
++ #define  PMCR_BACKPR_EN			BIT(8)
+++#define  PMCR_FORCE_EEE1G		BIT(7)
+++#define  PMCR_FORCE_EEE100		BIT(6)
++ #define  PMCR_TX_FC_EN			BIT(5)
++ #define  PMCR_RX_FC_EN			BIT(4)
++ #define  PMCR_FORCE_SPEED_1000		BIT(3)
++@@ -233,6 +235,12 @@ enum mt7530_vlan_port_attr {
++ #define  PMSR_DPX			BIT(1)
++ #define  PMSR_LINK			BIT(0)
++ 
+++#define MT7530_PMEEECR_P(x)		(0x3004 + (x) * 0x100)
+++#define  WAKEUP_TIME_1000(x)		((x & 0xFF) << 24)
+++#define  WAKEUP_TIME_100(x)		((x & 0xFF) << 16)
+++#define  LPI_THRESH(x)			((x & 0xFFF) << 4)
+++#define  LPI_MODE_EN			BIT(0)
+++
++ /* Register for MIB */
++ #define MT7530_PORT_MIB_COUNTER(x)	(0x4000 + (x) * 0x100)
++ #define MT7530_MIB_CCR			0x4fe0
++@@ -471,6 +479,7 @@ struct mt7530_priv {
++ 	unsigned int		p5_intf_sel;
++ 	u8			mirror_rx;
++ 	u8			mirror_tx;
+++	u8			eee_enable;
++ 
++ 	struct mt7530_port	ports[MT7530_NUM_PORTS];
++ 	/* protect among processes for registers access*/
+diff --git a/target/linux/generic/pending-5.4/762-net-bridge-switchdev-Refactor-br_switchdev_fdb_notif.patch b/target/linux/generic/pending-5.4/762-net-bridge-switchdev-Refactor-br_switchdev_fdb_notif.patch
+new file mode 100644
+index 0000000000..bfa2d375e1
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/762-net-bridge-switchdev-Refactor-br_switchdev_fdb_notif.patch
+@@ -0,0 +1,71 @@
++From 46fe6cecb296d850c1ee2b333e57093ac4b733f3 Mon Sep 17 00:00:00 2001
++From: Tobias Waldekranz <tobias@waldekranz.com>
++Date: Sat, 16 Jan 2021 02:25:09 +0100
++Subject: [PATCH] net: bridge: switchdev: Refactor br_switchdev_fdb_notify
++
++Instead of having to add more and more arguments to
++br_switchdev_fdb_call_notifiers, get rid of it and build the info
++struct directly in br_switchdev_fdb_notify.
++
++Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
++Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
++---
++ net/bridge/br_switchdev.c | 37 +++++++++++--------------------------
++ 1 file changed, 11 insertions(+), 26 deletions(-)
++
++--- a/net/bridge/br_switchdev.c
+++++ b/net/bridge/br_switchdev.c
++@@ -102,42 +102,27 @@ int br_switchdev_set_port_flag(struct ne
++ 	return 0;
++ }
++ 
++-static void
++-br_switchdev_fdb_call_notifiers(bool adding, const unsigned char *mac,
++-				u16 vid, struct net_device *dev,
++-				bool added_by_user, bool offloaded)
++-{
++-	struct switchdev_notifier_fdb_info info;
++-	unsigned long notifier_type;
++-
++-	info.addr = mac;
++-	info.vid = vid;
++-	info.added_by_user = added_by_user;
++-	info.offloaded = offloaded;
++-	notifier_type = adding ? SWITCHDEV_FDB_ADD_TO_DEVICE : SWITCHDEV_FDB_DEL_TO_DEVICE;
++-	call_switchdev_notifiers(notifier_type, dev, &info.info, NULL);
++-}
++-
++ void
++ br_switchdev_fdb_notify(const struct net_bridge_fdb_entry *fdb, int type)
++ {
+++	struct switchdev_notifier_fdb_info info = {
+++		.addr = fdb->key.addr.addr,
+++		.vid = fdb->key.vlan_id,
+++		.added_by_user = fdb->added_by_user,
+++		.offloaded = fdb->offloaded,
+++	};
+++
++ 	if (!fdb->dst)
++ 		return;
++ 
++ 	switch (type) {
++ 	case RTM_DELNEIGH:
++-		br_switchdev_fdb_call_notifiers(false, fdb->key.addr.addr,
++-						fdb->key.vlan_id,
++-						fdb->dst->dev,
++-						fdb->added_by_user,
++-						fdb->offloaded);
+++		call_switchdev_notifiers(SWITCHDEV_FDB_DEL_TO_DEVICE,
+++					 fdb->dst->dev, &info.info, NULL);
++ 		break;
++ 	case RTM_NEWNEIGH:
++-		br_switchdev_fdb_call_notifiers(true, fdb->key.addr.addr,
++-						fdb->key.vlan_id,
++-						fdb->dst->dev,
++-						fdb->added_by_user,
++-						fdb->offloaded);
+++		call_switchdev_notifiers(SWITCHDEV_FDB_ADD_TO_DEVICE,
+++					 fdb->dst->dev, &info.info, NULL);
++ 		break;
++ 	}
++ }
+diff --git a/target/linux/generic/pending-5.4/763-net-bridge-switchdev-Include-local-flag-in-FDB-notif.patch b/target/linux/generic/pending-5.4/763-net-bridge-switchdev-Include-local-flag-in-FDB-notif.patch
+new file mode 100644
+index 0000000000..49d6f079ba
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/763-net-bridge-switchdev-Include-local-flag-in-FDB-notif.patch
+@@ -0,0 +1,42 @@
++From ec5be4f79026282925ae383caa431a8d41e3456a Mon Sep 17 00:00:00 2001
++From: Tobias Waldekranz <tobias@waldekranz.com>
++Date: Sat, 16 Jan 2021 02:25:10 +0100
++Subject: [PATCH] net: bridge: switchdev: Include local flag in FDB
++ notifications
++
++Some switchdev drivers, notably DSA, ignore all dynamically learned
++address notifications (!added_by_user) as these are autonomously added
++by the switch. Previously, such a notification was indistinguishable
++from a local address notification. Include a local bit in the
++notification so that the two classes can be discriminated.
++
++This allows DSA-like devices to add local addresses to the hardware
++FDB (with the CPU as the destination), thereby avoiding flows towards
++the CPU being flooded by the switch as unknown unicast.
++
++Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
++---
++ include/net/switchdev.h   | 1 +
++ net/bridge/br_switchdev.c | 1 +
++ 2 files changed, 2 insertions(+)
++
++--- a/include/net/switchdev.h
+++++ b/include/net/switchdev.h
++@@ -124,6 +124,7 @@ struct switchdev_notifier_fdb_info {
++ 	const unsigned char *addr;
++ 	u16 vid;
++ 	u8 added_by_user:1,
+++	   local:1,
++ 	   offloaded:1;
++ };
++ 
++--- a/net/bridge/br_switchdev.c
+++++ b/net/bridge/br_switchdev.c
++@@ -109,6 +109,7 @@ br_switchdev_fdb_notify(const struct net
++ 		.addr = fdb->key.addr.addr,
++ 		.vid = fdb->key.vlan_id,
++ 		.added_by_user = fdb->added_by_user,
+++		.local = fdb->is_local,
++ 		.offloaded = fdb->offloaded,
++ 	};
++ 
+diff --git a/target/linux/generic/pending-5.4/764-net-bridge-switchdev-Send-FDB-notifications-for-host.patch b/target/linux/generic/pending-5.4/764-net-bridge-switchdev-Send-FDB-notifications-for-host.patch
+new file mode 100644
+index 0000000000..8b869dd8f3
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/764-net-bridge-switchdev-Send-FDB-notifications-for-host.patch
+@@ -0,0 +1,94 @@
++From 2e50fd9322047253c327550b4485cf8761035a8c Mon Sep 17 00:00:00 2001
++From: Tobias Waldekranz <tobias@waldekranz.com>
++Date: Sat, 16 Jan 2021 02:25:11 +0100
++Subject: [PATCH] net: bridge: switchdev: Send FDB notifications for host
++ addresses
++
++Treat addresses added to the bridge itself in the same way as regular
++ports and send out a notification so that drivers may sync it down to
++the hardware FDB.
++
++Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
++---
++ net/bridge/br_fdb.c       |  4 ++--
++ net/bridge/br_private.h   |  7 ++++---
++ net/bridge/br_switchdev.c | 11 +++++------
++ 3 files changed, 11 insertions(+), 11 deletions(-)
++
++--- a/net/bridge/br_fdb.c
+++++ b/net/bridge/br_fdb.c
++@@ -581,7 +581,7 @@ void br_fdb_update(struct net_bridge *br
++ 
++ 			/* fastpath: update of existing entry */
++ 			if (unlikely(source != fdb->dst && !fdb->is_sticky)) {
++-				br_switchdev_fdb_notify(fdb, RTM_DELNEIGH);
+++				br_switchdev_fdb_notify(br, fdb, RTM_DELNEIGH);
++ 				fdb->dst = source;
++ 				fdb_modified = true;
++ 				/* Take over HW learned entry */
++@@ -697,7 +697,7 @@ static void fdb_notify(struct net_bridge
++ 	int err = -ENOBUFS;
++ 
++ 	if (swdev_notify)
++-		br_switchdev_fdb_notify(fdb, type);
+++		br_switchdev_fdb_notify(br, fdb, type);
++ 
++ 	skb = nlmsg_new(fdb_nlmsg_size(), GFP_ATOMIC);
++ 	if (skb == NULL)
++--- a/net/bridge/br_private.h
+++++ b/net/bridge/br_private.h
++@@ -1203,8 +1203,8 @@ bool nbp_switchdev_allowed_egress(const
++ int br_switchdev_set_port_flag(struct net_bridge_port *p,
++ 			       unsigned long flags,
++ 			       unsigned long mask);
++-void br_switchdev_fdb_notify(const struct net_bridge_fdb_entry *fdb,
++-			     int type);
+++void br_switchdev_fdb_notify(struct net_bridge *br,
+++			     const struct net_bridge_fdb_entry *fdb, int type);
++ int br_switchdev_port_vlan_add(struct net_device *dev, u16 vid, u16 flags,
++ 			       struct netlink_ext_ack *extack);
++ int br_switchdev_port_vlan_del(struct net_device *dev, u16 vid);
++@@ -1250,7 +1250,8 @@ static inline int br_switchdev_port_vlan
++ }
++ 
++ static inline void
++-br_switchdev_fdb_notify(const struct net_bridge_fdb_entry *fdb, int type)
+++br_switchdev_fdb_notify(struct net_bridge *br,
+++			const struct net_bridge_fdb_entry *fdb, int type)
++ {
++ }
++ 
++--- a/net/bridge/br_switchdev.c
+++++ b/net/bridge/br_switchdev.c
++@@ -103,7 +103,8 @@ int br_switchdev_set_port_flag(struct ne
++ }
++ 
++ void
++-br_switchdev_fdb_notify(const struct net_bridge_fdb_entry *fdb, int type)
+++br_switchdev_fdb_notify(struct net_bridge *br,
+++			const struct net_bridge_fdb_entry *fdb, int type)
++ {
++ 	struct switchdev_notifier_fdb_info info = {
++ 		.addr = fdb->key.addr.addr,
++@@ -112,18 +113,16 @@ br_switchdev_fdb_notify(const struct net
++ 		.local = fdb->is_local,
++ 		.offloaded = fdb->offloaded,
++ 	};
++-
++-	if (!fdb->dst)
++-		return;
+++	struct net_device *dev = fdb->dst ? fdb->dst->dev : br->dev;
++ 
++ 	switch (type) {
++ 	case RTM_DELNEIGH:
++ 		call_switchdev_notifiers(SWITCHDEV_FDB_DEL_TO_DEVICE,
++-					 fdb->dst->dev, &info.info, NULL);
+++					 dev, &info.info, NULL);
++ 		break;
++ 	case RTM_NEWNEIGH:
++ 		call_switchdev_notifiers(SWITCHDEV_FDB_ADD_TO_DEVICE,
++-					 fdb->dst->dev, &info.info, NULL);
+++					 dev, &info.info, NULL);
++ 		break;
++ 	}
++ }
+diff --git a/target/linux/generic/pending-5.4/765-net-dsa-Include-local-addresses-in-assisted-CPU-port.patch b/target/linux/generic/pending-5.4/765-net-dsa-Include-local-addresses-in-assisted-CPU-port.patch
+new file mode 100644
+index 0000000000..d951246260
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/765-net-dsa-Include-local-addresses-in-assisted-CPU-port.patch
+@@ -0,0 +1,36 @@
++From dd082716b43a3684b2f473ae5d1e76d1c076d86d Mon Sep 17 00:00:00 2001
++From: Tobias Waldekranz <tobias@waldekranz.com>
++Date: Sat, 16 Jan 2021 02:25:12 +0100
++Subject: [PATCH] net: dsa: Include local addresses in assisted CPU port
++ learning
++
++Add local addresses (i.e. the ports' MAC addresses) to the hardware
++FDB when assisted CPU port learning is enabled.
++
++NOTE: The bridge's own MAC address is also "local". If that address is
++not shared with any port, the bridge's MAC is not be added by this
++functionality - but the following commit takes care of that case.
++
++Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
++---
++ net/dsa/slave.c | 8 +++++---
++ 1 file changed, 5 insertions(+), 3 deletions(-)
++
++--- a/net/dsa/slave.c
+++++ b/net/dsa/slave.c
++@@ -1698,10 +1698,12 @@ static int dsa_slave_switchdev_event(str
++ 		fdb_info = ptr;
++ 
++ 		if (dsa_slave_dev_check(dev)) {
++-			if (!fdb_info->added_by_user)
++-				return NOTIFY_OK;
++-
++ 			dp = dsa_slave_to_port(dev);
+++
+++			if (fdb_info->local && dp->ds->assisted_learning_on_cpu_port)
+++				dp = dp->cpu_dp;
+++			else if (!fdb_info->added_by_user)
+++				return NOTIFY_OK;
++ 		} else {
++ 			/* Snoop addresses learnt on foreign interfaces
++ 			 * bridged with us, for switches that don't
+diff --git a/target/linux/generic/pending-5.4/766-net-dsa-Include-bridge-addresses-in-assisted-CPU-por.patch b/target/linux/generic/pending-5.4/766-net-dsa-Include-bridge-addresses-in-assisted-CPU-por.patch
+new file mode 100644
+index 0000000000..46504aeeff
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/766-net-dsa-Include-bridge-addresses-in-assisted-CPU-por.patch
+@@ -0,0 +1,30 @@
++From 0663ebde114a6fb2c28c622ba5212b302d4d2581 Mon Sep 17 00:00:00 2001
++From: Tobias Waldekranz <tobias@waldekranz.com>
++Date: Sat, 16 Jan 2021 02:25:13 +0100
++Subject: [PATCH] net: dsa: Include bridge addresses in assisted CPU port
++ learning
++
++Now that notifications are sent out for addresses added to the bridge
++itself, extend DSA to include those addresses in the hardware FDB when
++assisted CPU port learning is enabled.
++
++Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
++---
++ net/dsa/slave.c | 6 +++++-
++ 1 file changed, 5 insertions(+), 1 deletion(-)
++
++--- a/net/dsa/slave.c
+++++ b/net/dsa/slave.c
++@@ -1712,7 +1712,11 @@ static int dsa_slave_switchdev_event(str
++ 			struct net_device *br_dev;
++ 			struct dsa_slave_priv *p;
++ 
++-			br_dev = netdev_master_upper_dev_get_rcu(dev);
+++			if (netif_is_bridge_master(dev))
+++				br_dev = dev;
+++			else
+++				br_dev = netdev_master_upper_dev_get_rcu(dev);
+++
++ 			if (!br_dev)
++ 				return NOTIFY_DONE;
++ 
+diff --git a/target/linux/generic/pending-5.4/767-net-dsa-Sync-static-FDB-entries-on-foreign-interface.patch b/target/linux/generic/pending-5.4/767-net-dsa-Sync-static-FDB-entries-on-foreign-interface.patch
+new file mode 100644
+index 0000000000..e626086bc1
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/767-net-dsa-Sync-static-FDB-entries-on-foreign-interface.patch
+@@ -0,0 +1,56 @@
++From 81e39fd78db82fb51b05fff309b9c521f1a0bc5a Mon Sep 17 00:00:00 2001
++From: Tobias Waldekranz <tobias@waldekranz.com>
++Date: Sat, 16 Jan 2021 02:25:14 +0100
++Subject: [PATCH] net: dsa: Sync static FDB entries on foreign interfaces to
++ hardware
++
++Reuse the "assisted_learning_on_cpu_port" functionality to always add
++entries for user-configured entries on foreign interfaces, even if
++assisted_learning_on_cpu_port is not enabled. E.g. in this situation:
++
++   br0
++   / \
++swp0 dummy0
++
++$ bridge fdb add 02:00:de:ad:00:01 dev dummy0 vlan 1 master
++
++Results in DSA adding an entry in the hardware FDB, pointing this
++address towards the CPU port.
++
++The same is true for entries added to the bridge itself, e.g:
++
++$ bridge fdb add 02:00:de:ad:00:01 dev br0 vlan 1 self
++
++Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
++---
++ net/dsa/slave.c | 12 ++++++++----
++ 1 file changed, 8 insertions(+), 4 deletions(-)
++
++--- a/net/dsa/slave.c
+++++ b/net/dsa/slave.c
++@@ -1705,9 +1705,12 @@ static int dsa_slave_switchdev_event(str
++ 			else if (!fdb_info->added_by_user)
++ 				return NOTIFY_OK;
++ 		} else {
++-			/* Snoop addresses learnt on foreign interfaces
++-			 * bridged with us, for switches that don't
++-			 * automatically learn SA from CPU-injected traffic
+++			/* Snoop addresses added to foreign interfaces
+++			 * bridged with us, or the bridge
+++			 * itself. Dynamically learned addresses can
+++			 * also be added for switches that don't
+++			 * automatically learn SA from CPU-injected
+++			 * traffic.
++ 			 */
++ 			struct net_device *br_dev;
++ 			struct dsa_slave_priv *p;
++@@ -1729,7 +1732,8 @@ static int dsa_slave_switchdev_event(str
++ 
++ 			dp = p->dp->cpu_dp;
++ 
++-			if (!dp->ds->assisted_learning_on_cpu_port)
+++			if (!fdb_info->added_by_user &&
+++			    !dp->ds->assisted_learning_on_cpu_port)
++ 				return NOTIFY_DONE;
++ 		}
++ 
+diff --git a/target/linux/generic/pending-5.4/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch b/target/linux/generic/pending-5.4/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
+new file mode 100644
+index 0000000000..cb421f164b
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
+@@ -0,0 +1,27 @@
++From:   Tobias Waldekranz <tobias@waldekranz.com>
++Subject: [RFC net-next 7/7] net: dsa: mv88e6xxx: Request assisted learning on CPU port
++Date:   Sat, 16 Jan 2021 02:25:15 +0100
++Archived-At: <https://lore.kernel.org/netdev/20210116012515.3152-8-tobias@waldekranz.com/>
++
++While the hardware is capable of performing learning on the CPU port,
++it requires alot of additions to the bridge's forwarding path in order
++to handle multi-destination traffic correctly.
++
++Until that is in place, opt for the next best thing and let DSA sync
++the relevant addresses down to the hardware FDB.
++
++Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
++---
++ drivers/net/dsa/mv88e6xxx/chip.c | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++++ b/drivers/net/dsa/mv88e6xxx/chip.c
++@@ -5080,6 +5080,7 @@ static int mv88e6xxx_register_switch(str
++ 	ds->ops = &mv88e6xxx_switch_ops;
++ 	ds->ageing_time_min = chip->info->age_time_coeff;
++ 	ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX;
+++	ds->assisted_learning_on_cpu_port = true;
++ 
++ 	dev_set_drvdata(dev, ds);
++ 
+diff --git a/target/linux/generic/pending-5.4/770-00-net-ethernet-mtk_eth_soc-use-napi_consume_skb.patch b/target/linux/generic/pending-5.4/770-00-net-ethernet-mtk_eth_soc-use-napi_consume_skb.patch
+new file mode 100644
+index 0000000000..2f0c7934f5
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/770-00-net-ethernet-mtk_eth_soc-use-napi_consume_skb.patch
+@@ -0,0 +1,72 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Mon, 8 Jun 2020 17:01:12 +0200
++Subject: [PATCH] net: ethernet: mtk_eth_soc: use napi_consume_skb
++
++Should improve performance, since it can use bulk free
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++@@ -874,7 +874,8 @@ static int txd_to_idx(struct mtk_tx_ring
++ 	return ((void *)dma - (void *)ring->dma) / sizeof(*dma);
++ }
++ 
++-static void mtk_tx_unmap(struct mtk_eth *eth, struct mtk_tx_buf *tx_buf)
+++static void mtk_tx_unmap(struct mtk_eth *eth, struct mtk_tx_buf *tx_buf,
+++			 bool napi)
++ {
++ 	if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
++ 		if (tx_buf->flags & MTK_TX_FLAGS_SINGLE0) {
++@@ -906,8 +907,12 @@ static void mtk_tx_unmap(struct mtk_eth
++ 
++ 	tx_buf->flags = 0;
++ 	if (tx_buf->skb &&
++-	    (tx_buf->skb != (struct sk_buff *)MTK_DMA_DUMMY_DESC))
++-		dev_kfree_skb_any(tx_buf->skb);
+++	    (tx_buf->skb != (struct sk_buff *)MTK_DMA_DUMMY_DESC)) {
+++		if (napi)
+++			napi_consume_skb(tx_buf->skb, napi);
+++		else
+++			dev_kfree_skb_any(tx_buf->skb);
+++	}
++ 	tx_buf->skb = NULL;
++ }
++ 
++@@ -1085,7 +1090,7 @@ err_dma:
++ 		tx_buf = mtk_desc_to_tx_buf(ring, itxd);
++ 
++ 		/* unmap dma */
++-		mtk_tx_unmap(eth, tx_buf);
+++		mtk_tx_unmap(eth, tx_buf, false);
++ 
++ 		itxd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU;
++ 		if (!MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA))
++@@ -1403,7 +1408,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
++ 			done[mac]++;
++ 			budget--;
++ 		}
++-		mtk_tx_unmap(eth, tx_buf);
+++		mtk_tx_unmap(eth, tx_buf, true);
++ 
++ 		ring->last_free = desc;
++ 		atomic_inc(&ring->free_count);
++@@ -1440,7 +1445,7 @@ static int mtk_poll_tx_pdma(struct mtk_e
++ 			budget--;
++ 		}
++ 
++-		mtk_tx_unmap(eth, tx_buf);
+++		mtk_tx_unmap(eth, tx_buf, true);
++ 
++ 		desc = &ring->dma[cpu];
++ 		ring->last_free = desc;
++@@ -1642,7 +1647,7 @@ static void mtk_tx_clean(struct mtk_eth
++ 
++ 	if (ring->buf) {
++ 		for (i = 0; i < MTK_DMA_SIZE; i++)
++-			mtk_tx_unmap(eth, &ring->buf[i]);
+++			mtk_tx_unmap(eth, &ring->buf[i], false);
++ 		kfree(ring->buf);
++ 		ring->buf = NULL;
++ 	}
+diff --git a/target/linux/generic/pending-5.4/770-01-net-ethernet-mtk_eth_soc-significantly-reduce-mdio-b.patch b/target/linux/generic/pending-5.4/770-01-net-ethernet-mtk_eth_soc-significantly-reduce-mdio-b.patch
+new file mode 100644
+index 0000000000..922c35a3e4
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/770-01-net-ethernet-mtk_eth_soc-significantly-reduce-mdio-b.patch
+@@ -0,0 +1,26 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Mon, 8 Jun 2020 17:02:39 +0200
++Subject: [PATCH] net: ethernet: mtk_eth_soc: significantly reduce mdio bus
++ access latency
++
++usleep_range often ends up sleeping much longer than the 10-20us provided
++as a range here. This causes significant latency in mdio bus acceses,
++which easily adds multiple seconds to the boot time on MT7621 when polling
++DSA slave ports.
++Use cond_resched instead of usleep_range, since the MDIO access does not
++take much time
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++@@ -85,7 +85,7 @@ static int mtk_mdio_busy_wait(struct mtk
++ 			return 0;
++ 		if (time_after(jiffies, t_start + PHY_IAC_TIMEOUT))
++ 			break;
++-		usleep_range(10, 20);
+++		cond_resched();
++ 	}
++ 
++ 	dev_err(eth->dev, "mdio: MDIO timeout\n");
+diff --git a/target/linux/generic/pending-5.4/770-03-net-ethernet-mtk_eth_soc-fix-unnecessary-tx-queue-st.patch b/target/linux/generic/pending-5.4/770-03-net-ethernet-mtk_eth_soc-fix-unnecessary-tx-queue-st.patch
+new file mode 100644
+index 0000000000..6eeae6985f
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/770-03-net-ethernet-mtk_eth_soc-fix-unnecessary-tx-queue-st.patch
+@@ -0,0 +1,50 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Wed, 26 Aug 2020 16:55:54 +0200
++Subject: [PATCH] net: ethernet: mtk_eth_soc: fix unnecessary tx queue
++ stops
++
++When running short on descriptors, only stop the queue for the netdev that tx
++was attempted for. By the time the something tries to send on the other netdev,
++the ring might have some more room already
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++@@ -1147,17 +1147,6 @@ static void mtk_wake_queue(struct mtk_et
++ 	}
++ }
++ 
++-static void mtk_stop_queue(struct mtk_eth *eth)
++-{
++-	int i;
++-
++-	for (i = 0; i < MTK_MAC_COUNT; i++) {
++-		if (!eth->netdev[i])
++-			continue;
++-		netif_stop_queue(eth->netdev[i]);
++-	}
++-}
++-
++ static int mtk_start_xmit(struct sk_buff *skb, struct net_device *dev)
++ {
++ 	struct mtk_mac *mac = netdev_priv(dev);
++@@ -1178,7 +1167,7 @@ static int mtk_start_xmit(struct sk_buff
++ 
++ 	tx_num = mtk_cal_txd_req(skb);
++ 	if (unlikely(atomic_read(&ring->free_count) <= tx_num)) {
++-		mtk_stop_queue(eth);
+++		netif_stop_queue(dev);
++ 		netif_err(eth, tx_queued, dev,
++ 			  "Tx Ring full when queue awake!\n");
++ 		spin_unlock(&eth->page_lock);
++@@ -1204,7 +1193,7 @@ static int mtk_start_xmit(struct sk_buff
++ 		goto drop;
++ 
++ 	if (unlikely(atomic_read(&ring->free_count) <= ring->thresh))
++-		mtk_stop_queue(eth);
+++		netif_stop_queue(dev);
++ 
++ 	spin_unlock(&eth->page_lock);
++ 
+diff --git a/target/linux/generic/pending-5.4/770-04-net-ethernet-mtk_eth_soc-use-larger-burst-size-for-q.patch b/target/linux/generic/pending-5.4/770-04-net-ethernet-mtk_eth_soc-use-larger-burst-size-for-q.patch
+new file mode 100644
+index 0000000000..cd042ce409
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/770-04-net-ethernet-mtk_eth_soc-use-larger-burst-size-for-q.patch
+@@ -0,0 +1,32 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Wed, 26 Aug 2020 16:58:55 +0200
++Subject: [PATCH] net: ethernet: mtk_eth_soc: use larger burst size for
++ qdma tx
++
++Improves tx performance
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++@@ -2208,7 +2208,7 @@ static int mtk_start_dma(struct mtk_eth
++ 	if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
++ 		mtk_w32(eth,
++ 			MTK_TX_WB_DDONE | MTK_TX_DMA_EN |
++-			MTK_DMA_SIZE_16DWORDS | MTK_NDP_CO_PRO |
+++			MTK_TX_BT_32DWORDS | MTK_NDP_CO_PRO |
++ 			MTK_RX_DMA_EN | MTK_RX_2B_OFFSET |
++ 			MTK_RX_BT_32DWORDS,
++ 			MTK_QDMA_GLO_CFG);
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++@@ -197,7 +197,7 @@
++ #define MTK_RX_BT_32DWORDS	(3 << 11)
++ #define MTK_NDP_CO_PRO		BIT(10)
++ #define MTK_TX_WB_DDONE		BIT(6)
++-#define MTK_DMA_SIZE_16DWORDS	(2 << 4)
+++#define MTK_TX_BT_32DWORDS	(3 << 4)
++ #define MTK_RX_DMA_BUSY		BIT(3)
++ #define MTK_TX_DMA_BUSY		BIT(1)
++ #define MTK_RX_DMA_EN		BIT(2)
+diff --git a/target/linux/generic/pending-5.4/770-05-net-ethernet-mtk_eth_soc-increase-DMA-ring-sizes.patch b/target/linux/generic/pending-5.4/770-05-net-ethernet-mtk_eth_soc-increase-DMA-ring-sizes.patch
+new file mode 100644
+index 0000000000..f68cbc333c
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/770-05-net-ethernet-mtk_eth_soc-increase-DMA-ring-sizes.patch
+@@ -0,0 +1,21 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Wed, 26 Aug 2020 16:59:41 +0200
++Subject: [PATCH] net: ethernet: mtk_eth_soc: increase DMA ring sizes
++
++256 descriptors is not enough for multi-gigabit traffic under load on MT7622.
++Bump it to 512 to improve performance
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++@@ -19,7 +19,7 @@
++ #define MTK_QDMA_PAGE_SIZE	2048
++ #define	MTK_MAX_RX_LENGTH	1536
++ #define MTK_TX_DMA_BUF_LEN	0x3fff
++-#define MTK_DMA_SIZE		256
+++#define MTK_DMA_SIZE		512
++ #define MTK_NAPI_WEIGHT		64
++ #define MTK_MAC_COUNT		2
++ #define MTK_RX_ETH_HLEN		(VLAN_ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN)
+diff --git a/target/linux/generic/pending-5.4/770-06-net-ethernet-mtk_eth_soc-implement-dynamic-interrupt.patch b/target/linux/generic/pending-5.4/770-06-net-ethernet-mtk_eth_soc-implement-dynamic-interrupt.patch
+new file mode 100644
+index 0000000000..9302f0b1f7
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/770-06-net-ethernet-mtk_eth_soc-implement-dynamic-interrupt.patch
+@@ -0,0 +1,281 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Wed, 26 Aug 2020 17:02:30 +0200
++Subject: [PATCH] net: ethernet: mtk_eth_soc: implement dynamic interrupt
++ moderation
++
++Reduces the number of interrupts under load
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/net/ethernet/mediatek/Kconfig
+++++ b/drivers/net/ethernet/mediatek/Kconfig
++@@ -10,6 +10,7 @@ if NET_VENDOR_MEDIATEK
++ config NET_MEDIATEK_SOC
++ 	tristate "MediaTek SoC Gigabit Ethernet support"
++ 	select PHYLINK
+++	select DIMLIB
++ 	---help---
++ 	  This driver supports the gigabit ethernet MACs in the
++ 	  MediaTek SoC family.
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++@@ -1249,12 +1249,13 @@ static void mtk_update_rx_cpu_idx(struct
++ static int mtk_poll_rx(struct napi_struct *napi, int budget,
++ 		       struct mtk_eth *eth)
++ {
+++	struct dim_sample dim_sample = {};
++ 	struct mtk_rx_ring *ring;
++ 	int idx;
++ 	struct sk_buff *skb;
++ 	u8 *data, *new_data;
++ 	struct mtk_rx_dma *rxd, trxd;
++-	int done = 0;
+++	int done = 0, bytes = 0;
++ 
++ 	while (done < budget) {
++ 		struct net_device *netdev;
++@@ -1328,6 +1329,7 @@ static int mtk_poll_rx(struct napi_struc
++ 		else
++ 			skb_checksum_none_assert(skb);
++ 		skb->protocol = eth_type_trans(skb, netdev);
+++		bytes += pktlen;
++ 
++ 		if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX &&
++ 		    (trxd.rxd2 & RX_DMA_VTAG))
++@@ -1359,6 +1361,12 @@ rx_done:
++ 		mtk_update_rx_cpu_idx(eth);
++ 	}
++ 
+++	eth->rx_packets += done;
+++	eth->rx_bytes += bytes;
+++	dim_update_sample(eth->rx_events, eth->rx_packets, eth->rx_bytes,
+++			  &dim_sample);
+++	net_dim(&eth->rx_dim, dim_sample);
+++
++ 	return done;
++ }
++ 
++@@ -1451,6 +1459,7 @@ static int mtk_poll_tx_pdma(struct mtk_e
++ static int mtk_poll_tx(struct mtk_eth *eth, int budget)
++ {
++ 	struct mtk_tx_ring *ring = &eth->tx_ring;
+++	struct dim_sample dim_sample = {};
++ 	unsigned int done[MTK_MAX_DEVS];
++ 	unsigned int bytes[MTK_MAX_DEVS];
++ 	int total = 0, i;
++@@ -1468,8 +1477,14 @@ static int mtk_poll_tx(struct mtk_eth *e
++ 			continue;
++ 		netdev_completed_queue(eth->netdev[i], done[i], bytes[i]);
++ 		total += done[i];
+++		eth->tx_packets += done[i];
+++		eth->tx_bytes += bytes[i];
++ 	}
++ 
+++	dim_update_sample(eth->tx_events, eth->tx_packets, eth->tx_bytes,
+++			  &dim_sample);
+++	net_dim(&eth->tx_dim, dim_sample);
+++
++ 	if (mtk_queue_stopped(eth) &&
++ 	    (atomic_read(&ring->free_count) > ring->thresh))
++ 		mtk_wake_queue(eth);
++@@ -2144,6 +2159,7 @@ static irqreturn_t mtk_handle_irq_rx(int
++ {
++ 	struct mtk_eth *eth = _eth;
++ 
+++	eth->rx_events++;
++ 	if (likely(napi_schedule_prep(&eth->rx_napi))) {
++ 		__napi_schedule(&eth->rx_napi);
++ 		mtk_rx_irq_disable(eth, MTK_RX_DONE_INT);
++@@ -2156,6 +2172,7 @@ static irqreturn_t mtk_handle_irq_tx(int
++ {
++ 	struct mtk_eth *eth = _eth;
++ 
+++	eth->tx_events++;
++ 	if (likely(napi_schedule_prep(&eth->tx_napi))) {
++ 		__napi_schedule(&eth->tx_napi);
++ 		mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
++@@ -2332,6 +2349,9 @@ static int mtk_stop(struct net_device *d
++ 	napi_disable(&eth->tx_napi);
++ 	napi_disable(&eth->rx_napi);
++ 
+++	cancel_work_sync(&eth->rx_dim.work);
+++	cancel_work_sync(&eth->tx_dim.work);
+++
++ 	if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA))
++ 		mtk_stop_dma(eth, MTK_QDMA_GLO_CFG);
++ 	mtk_stop_dma(eth, MTK_PDMA_GLO_CFG);
++@@ -2381,6 +2401,64 @@ err_disable_clks:
++ 	return ret;
++ }
++ 
+++static void mtk_dim_rx(struct work_struct *work)
+++{
+++	struct dim *dim = container_of(work, struct dim, work);
+++	struct mtk_eth *eth = container_of(dim, struct mtk_eth, rx_dim);
+++	struct dim_cq_moder cur_profile;
+++	u32 val, cur;
+++
+++	cur_profile = net_dim_get_rx_moderation(eth->rx_dim.mode,
+++						dim->profile_ix);
+++	spin_lock_bh(&eth->dim_lock);
+++
+++	val = mtk_r32(eth, MTK_PDMA_DELAY_INT);
+++	val &= MTK_PDMA_DELAY_TX_MASK;
+++	val |= MTK_PDMA_DELAY_RX_EN;
+++
+++	cur = min_t(u32, DIV_ROUND_UP(cur_profile.usec, 20), MTK_PDMA_DELAY_PTIME_MASK);
+++	val |= cur << MTK_PDMA_DELAY_RX_PTIME_SHIFT;
+++
+++	cur = min_t(u32, cur_profile.pkts, MTK_PDMA_DELAY_PINT_MASK);
+++	val |= cur << MTK_PDMA_DELAY_RX_PINT_SHIFT;
+++
+++	mtk_w32(eth, val, MTK_PDMA_DELAY_INT);
+++	mtk_w32(eth, val, MTK_QDMA_DELAY_INT);
+++
+++	spin_unlock_bh(&eth->dim_lock);
+++
+++	dim->state = DIM_START_MEASURE;
+++}
+++
+++static void mtk_dim_tx(struct work_struct *work)
+++{
+++	struct dim *dim = container_of(work, struct dim, work);
+++	struct mtk_eth *eth = container_of(dim, struct mtk_eth, tx_dim);
+++	struct dim_cq_moder cur_profile;
+++	u32 val, cur;
+++
+++	cur_profile = net_dim_get_tx_moderation(eth->tx_dim.mode,
+++						dim->profile_ix);
+++	spin_lock_bh(&eth->dim_lock);
+++
+++	val = mtk_r32(eth, MTK_PDMA_DELAY_INT);
+++	val &= MTK_PDMA_DELAY_RX_MASK;
+++	val |= MTK_PDMA_DELAY_TX_EN;
+++
+++	cur = min_t(u32, DIV_ROUND_UP(cur_profile.usec, 20), MTK_PDMA_DELAY_PTIME_MASK);
+++	val |= cur << MTK_PDMA_DELAY_TX_PTIME_SHIFT;
+++
+++	cur = min_t(u32, cur_profile.pkts, MTK_PDMA_DELAY_PINT_MASK);
+++	val |= cur << MTK_PDMA_DELAY_TX_PINT_SHIFT;
+++
+++	mtk_w32(eth, val, MTK_PDMA_DELAY_INT);
+++	mtk_w32(eth, val, MTK_QDMA_DELAY_INT);
+++
+++	spin_unlock_bh(&eth->dim_lock);
+++
+++	dim->state = DIM_START_MEASURE;
+++}
+++
++ static int mtk_hw_init(struct mtk_eth *eth)
++ {
++ 	int i, val, ret;
++@@ -2402,9 +2480,6 @@ static int mtk_hw_init(struct mtk_eth *e
++ 			goto err_disable_pm;
++ 		}
++ 
++-		/* enable interrupt delay for RX */
++-		mtk_w32(eth, MTK_PDMA_DELAY_RX_DELAY, MTK_PDMA_DELAY_INT);
++-
++ 		/* disable delay and normal interrupt */
++ 		mtk_tx_irq_disable(eth, ~0);
++ 		mtk_rx_irq_disable(eth, ~0);
++@@ -2443,11 +2518,10 @@ static int mtk_hw_init(struct mtk_eth *e
++ 	/* Enable RX VLan Offloading */
++ 	mtk_w32(eth, 1, MTK_CDMP_EG_CTRL);
++ 
++-	/* enable interrupt delay for RX */
++-	mtk_w32(eth, MTK_PDMA_DELAY_RX_DELAY, MTK_PDMA_DELAY_INT);
+++	mtk_dim_rx(&eth->rx_dim.work);
+++	mtk_dim_tx(&eth->tx_dim.work);
++ 
++ 	/* disable delay and normal interrupt */
++-	mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
++ 	mtk_tx_irq_disable(eth, ~0);
++ 	mtk_rx_irq_disable(eth, ~0);
++ 
++@@ -2951,6 +3025,13 @@ static int mtk_probe(struct platform_dev
++ 	spin_lock_init(&eth->page_lock);
++ 	spin_lock_init(&eth->tx_irq_lock);
++ 	spin_lock_init(&eth->rx_irq_lock);
+++	spin_lock_init(&eth->dim_lock);
+++
+++	eth->rx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
+++	INIT_WORK(&eth->rx_dim.work, mtk_dim_rx);
+++
+++	eth->tx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
+++	INIT_WORK(&eth->tx_dim.work, mtk_dim_tx);
++ 
++ 	if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
++ 		eth->ethsys = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++@@ -15,6 +15,7 @@
++ #include <linux/u64_stats_sync.h>
++ #include <linux/refcount.h>
++ #include <linux/phylink.h>
+++#include <linux/dim.h>
++ 
++ #define MTK_QDMA_PAGE_SIZE	2048
++ #define	MTK_MAX_RX_LENGTH	1536
++@@ -131,13 +132,18 @@
++ 
++ /* PDMA Delay Interrupt Register */
++ #define MTK_PDMA_DELAY_INT		0xa0c
+++#define MTK_PDMA_DELAY_RX_MASK		GENMASK(15, 0)
++ #define MTK_PDMA_DELAY_RX_EN		BIT(15)
++-#define MTK_PDMA_DELAY_RX_PINT		4
++ #define MTK_PDMA_DELAY_RX_PINT_SHIFT	8
++-#define MTK_PDMA_DELAY_RX_PTIME		4
++-#define MTK_PDMA_DELAY_RX_DELAY		\
++-	(MTK_PDMA_DELAY_RX_EN | MTK_PDMA_DELAY_RX_PTIME | \
++-	(MTK_PDMA_DELAY_RX_PINT << MTK_PDMA_DELAY_RX_PINT_SHIFT))
+++#define MTK_PDMA_DELAY_RX_PTIME_SHIFT	0
+++
+++#define MTK_PDMA_DELAY_TX_MASK		GENMASK(31, 16)
+++#define MTK_PDMA_DELAY_TX_EN		BIT(31)
+++#define MTK_PDMA_DELAY_TX_PINT_SHIFT	24
+++#define MTK_PDMA_DELAY_TX_PTIME_SHIFT	16
+++
+++#define MTK_PDMA_DELAY_PINT_MASK	0x7f
+++#define MTK_PDMA_DELAY_PTIME_MASK	0xff
++ 
++ /* PDMA Interrupt Status Register */
++ #define MTK_PDMA_INT_STATUS	0xa20
++@@ -219,6 +225,7 @@
++ /* QDMA Interrupt Status Register */
++ #define MTK_QDMA_INT_STATUS	0x1A18
++ #define MTK_RX_DONE_DLY		BIT(30)
+++#define MTK_TX_DONE_DLY		BIT(28)
++ #define MTK_RX_DONE_INT3	BIT(19)
++ #define MTK_RX_DONE_INT2	BIT(18)
++ #define MTK_RX_DONE_INT1	BIT(17)
++@@ -228,8 +235,7 @@
++ #define MTK_TX_DONE_INT1	BIT(1)
++ #define MTK_TX_DONE_INT0	BIT(0)
++ #define MTK_RX_DONE_INT		MTK_RX_DONE_DLY
++-#define MTK_TX_DONE_INT		(MTK_TX_DONE_INT0 | MTK_TX_DONE_INT1 | \
++-				 MTK_TX_DONE_INT2 | MTK_TX_DONE_INT3)
+++#define MTK_TX_DONE_INT		MTK_TX_DONE_DLY
++ 
++ /* QDMA Interrupt grouping registers */
++ #define MTK_QDMA_INT_GRP1	0x1a20
++@@ -912,6 +918,18 @@ struct mtk_eth {
++ 
++ 	const struct mtk_soc_data	*soc;
++ 
+++	spinlock_t			dim_lock;
+++
+++	u32				rx_events;
+++	u32				rx_packets;
+++	u32				rx_bytes;
+++	struct dim			rx_dim;
+++
+++	u32				tx_events;
+++	u32				tx_packets;
+++	u32				tx_bytes;
+++	struct dim			tx_dim;
+++
++ 	u32				tx_int_mask_reg;
++ 	u32				tx_int_status_reg;
++ 	u32				rx_dma_l4_valid;
+diff --git a/target/linux/generic/pending-5.4/770-08-net-ethernet-mtk_eth_soc-cache-hardware-pointer-of-l.patch b/target/linux/generic/pending-5.4/770-08-net-ethernet-mtk_eth_soc-cache-hardware-pointer-of-l.patch
+new file mode 100644
+index 0000000000..b280b6cf4b
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/770-08-net-ethernet-mtk_eth_soc-cache-hardware-pointer-of-l.patch
+@@ -0,0 +1,67 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Thu, 27 Aug 2020 06:32:03 +0200
++Subject: [PATCH] net: ethernet: mtk_eth_soc: cache hardware pointer of last
++ freed tx descriptor
++
++The value is only updated by the CPU, so it is cheaper to access from the ring
++data structure than from a hardware register
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++@@ -1379,7 +1379,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
++ 	struct mtk_tx_buf *tx_buf;
++ 	u32 cpu, dma;
++ 
++-	cpu = mtk_r32(eth, MTK_QTX_CRX_PTR);
+++	cpu = ring->last_free_ptr;
++ 	dma = mtk_r32(eth, MTK_QTX_DRX_PTR);
++ 
++ 	desc = mtk_qdma_phys_to_virt(ring, cpu);
++@@ -1413,6 +1413,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
++ 		cpu = next_cpu;
++ 	}
++ 
+++	ring->last_free_ptr = cpu;
++ 	mtk_w32(eth, cpu, MTK_QTX_CRX_PTR);
++ 
++ 	return budget;
++@@ -1613,6 +1614,7 @@ static int mtk_tx_alloc(struct mtk_eth *
++ 	atomic_set(&ring->free_count, MTK_DMA_SIZE - 2);
++ 	ring->next_free = &ring->dma[0];
++ 	ring->last_free = &ring->dma[MTK_DMA_SIZE - 1];
+++	ring->last_free_ptr = (u32)(ring->phys + ((MTK_DMA_SIZE - 1) * sz));
++ 	ring->thresh = MAX_SKB_FRAGS;
++ 
++ 	/* make sure that all changes to the dma ring are flushed before we
++@@ -1626,9 +1628,7 @@ static int mtk_tx_alloc(struct mtk_eth *
++ 		mtk_w32(eth,
++ 			ring->phys + ((MTK_DMA_SIZE - 1) * sz),
++ 			MTK_QTX_CRX_PTR);
++-		mtk_w32(eth,
++-			ring->phys + ((MTK_DMA_SIZE - 1) * sz),
++-			MTK_QTX_DRX_PTR);
+++		mtk_w32(eth, ring->last_free_ptr, MTK_QTX_DRX_PTR);
++ 		mtk_w32(eth, (QDMA_RES_THRES << 8) | QDMA_RES_THRES,
++ 			MTK_QTX_CFG(0));
++ 	} else {
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++@@ -644,6 +644,7 @@ struct mtk_tx_buf {
++  * @phys:		The physical addr of tx_buf
++  * @next_free:		Pointer to the next free descriptor
++  * @last_free:		Pointer to the last free descriptor
+++ * @last_free_ptr:	Hardware pointer value of the last free descriptor
++  * @thresh:		The threshold of minimum amount of free descriptors
++  * @free_count:		QDMA uses a linked list. Track how many free descriptors
++  *			are present
++@@ -654,6 +655,7 @@ struct mtk_tx_ring {
++ 	dma_addr_t phys;
++ 	struct mtk_tx_dma *next_free;
++ 	struct mtk_tx_dma *last_free;
+++	u32 last_free_ptr;
++ 	u16 thresh;
++ 	atomic_t free_count;
++ 	int dma_size;
+diff --git a/target/linux/generic/pending-5.4/770-09-net-ethernet-mtk_eth_soc-only-read-the-full-rx-descr.patch b/target/linux/generic/pending-5.4/770-09-net-ethernet-mtk_eth_soc-only-read-the-full-rx-descr.patch
+new file mode 100644
+index 0000000000..c2f5013e26
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/770-09-net-ethernet-mtk_eth_soc-only-read-the-full-rx-descr.patch
+@@ -0,0 +1,44 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Thu, 27 Aug 2020 09:24:25 +0200
++Subject: [PATCH] net: ethernet: mtk_eth_soc: only read the full rx
++ descriptor if DMA is done
++
++Uncached memory access is expensive, and there is no need to access all
++descriptor words if we can't process them anyway
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++@@ -793,13 +793,18 @@ static inline int mtk_max_buf_size(int f
++ 	return buf_size;
++ }
++ 
++-static inline void mtk_rx_get_desc(struct mtk_rx_dma *rxd,
+++static inline bool mtk_rx_get_desc(struct mtk_rx_dma *rxd,
++ 				   struct mtk_rx_dma *dma_rxd)
++ {
++-	rxd->rxd1 = READ_ONCE(dma_rxd->rxd1);
++ 	rxd->rxd2 = READ_ONCE(dma_rxd->rxd2);
+++	if (!(rxd->rxd2 & RX_DMA_DONE))
+++		return false;
+++
+++	rxd->rxd1 = READ_ONCE(dma_rxd->rxd1);
++ 	rxd->rxd3 = READ_ONCE(dma_rxd->rxd3);
++ 	rxd->rxd4 = READ_ONCE(dma_rxd->rxd4);
+++
+++	return true;
++ }
++ 
++ /* the qdma core needs scratch memory to be setup */
++@@ -1271,8 +1276,7 @@ static int mtk_poll_rx(struct napi_struc
++ 		rxd = &ring->dma[idx];
++ 		data = ring->data[idx];
++ 
++-		mtk_rx_get_desc(&trxd, rxd);
++-		if (!(trxd.rxd2 & RX_DMA_DONE))
+++		if (!mtk_rx_get_desc(&trxd, rxd))
++ 			break;
++ 
++ 		/* find out which mac the packet come from. values start at 1 */
+diff --git a/target/linux/generic/pending-5.4/770-10-net-ethernet-mtk_eth_soc-unmap-rx-data-before-callin.patch b/target/linux/generic/pending-5.4/770-10-net-ethernet-mtk_eth_soc-unmap-rx-data-before-callin.patch
+new file mode 100644
+index 0000000000..285fcf8971
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/770-10-net-ethernet-mtk_eth_soc-unmap-rx-data-before-callin.patch
+@@ -0,0 +1,44 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Thu, 27 Aug 2020 09:44:43 +0200
++Subject: [PATCH] net: ethernet: mtk_eth_soc: unmap rx data before calling
++ build_skb
++
++Since build_skb accesses the data area (for initializing shinfo), dma unmap
++needs to happen before that call
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++@@ -1314,17 +1314,18 @@ static int mtk_poll_rx(struct napi_struc
++ 			goto release_desc;
++ 		}
++ 
+++		dma_unmap_single(eth->dev, trxd.rxd1,
+++				 ring->buf_size, DMA_FROM_DEVICE);
+++
++ 		/* receive data */
++ 		skb = build_skb(data, ring->frag_size);
++ 		if (unlikely(!skb)) {
++-			skb_free_frag(new_data);
+++			skb_free_frag(data);
++ 			netdev->stats.rx_dropped++;
++-			goto release_desc;
+++			goto skip_rx;
++ 		}
++ 		skb_reserve(skb, NET_SKB_PAD + NET_IP_ALIGN);
++ 
++-		dma_unmap_single(eth->dev, trxd.rxd1,
++-				 ring->buf_size, DMA_FROM_DEVICE);
++ 		pktlen = RX_DMA_GET_PLEN0(trxd.rxd2);
++ 		skb->dev = netdev;
++ 		skb_put(skb, pktlen);
++@@ -1342,6 +1343,7 @@ static int mtk_poll_rx(struct napi_struc
++ 		skb_record_rx_queue(skb, 0);
++ 		napi_gro_receive(napi, skb);
++ 
+++skip_rx:
++ 		ring->data[idx] = new_data;
++ 		rxd->rxd1 = (unsigned int)dma_addr;
++ 
+diff --git a/target/linux/generic/pending-5.4/770-11-net-ethernet-mtk_eth_soc-avoid-rearming-interrupt-if.patch b/target/linux/generic/pending-5.4/770-11-net-ethernet-mtk_eth_soc-avoid-rearming-interrupt-if.patch
+new file mode 100644
+index 0000000000..4036e32354
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/770-11-net-ethernet-mtk_eth_soc-avoid-rearming-interrupt-if.patch
+@@ -0,0 +1,35 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Fri, 4 Sep 2020 18:14:05 +0200
++Subject: [PATCH] net: ethernet: mtk_eth_soc: avoid rearming interrupt if
++ napi_complete returns false
++
++Reduces unnecessary interrupts
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++@@ -1536,8 +1536,8 @@ static int mtk_napi_tx(struct napi_struc
++ 	if (status & MTK_TX_DONE_INT)
++ 		return budget;
++ 
++-	napi_complete(napi);
++-	mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
+++	if (napi_complete(napi))
+++		mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
++ 
++ 	return tx_done;
++ }
++@@ -1570,8 +1570,9 @@ poll_again:
++ 		remain_budget -= rx_done;
++ 		goto poll_again;
++ 	}
++-	napi_complete(napi);
++-	mtk_rx_irq_enable(eth, MTK_RX_DONE_INT);
+++
+++	if (napi_complete(napi))
+++		mtk_rx_irq_enable(eth, MTK_RX_DONE_INT);
++ 
++ 	return rx_done + budget - remain_budget;
++ }
+diff --git a/target/linux/generic/pending-5.4/770-13-net-ethernet-mtk_eth_soc-fix-parsing-packets-in-GDM.patch b/target/linux/generic/pending-5.4/770-13-net-ethernet-mtk_eth_soc-fix-parsing-packets-in-GDM.patch
+new file mode 100644
+index 0000000000..b1bde7bbff
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/770-13-net-ethernet-mtk_eth_soc-fix-parsing-packets-in-GDM.patch
+@@ -0,0 +1,67 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sun, 13 Sep 2020 08:17:02 +0200
++Subject: [PATCH] net: ethernet: mtk_eth_soc: fix parsing packets in GDM
++
++When using DSA, set the special tag in GDM ingress control to allow the MAC
++to parse packets properly earlier. This affects rx DMA source port reporting.
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++@@ -19,6 +19,7 @@
++ #include <linux/interrupt.h>
++ #include <linux/pinctrl/devinfo.h>
++ #include <linux/phylink.h>
+++#include <net/dsa.h>
++ 
++ #include "mtk_eth_soc.h"
++ 
++@@ -1280,13 +1281,12 @@ static int mtk_poll_rx(struct napi_struc
++ 			break;
++ 
++ 		/* find out which mac the packet come from. values start at 1 */
++-		if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
+++		if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) ||
+++		    (trxd.rxd4 & RX_DMA_SPECIAL_TAG))
++ 			mac = 0;
++-		} else {
++-			mac = (trxd.rxd4 >> RX_DMA_FPORT_SHIFT) &
++-				RX_DMA_FPORT_MASK;
++-			mac--;
++-		}
+++		else
+++			mac = ((trxd.rxd4 >> RX_DMA_FPORT_SHIFT) &
+++			       RX_DMA_FPORT_MASK) - 1;
++ 
++ 		if (unlikely(mac < 0 || mac >= MTK_MAC_COUNT ||
++ 			     !eth->netdev[mac]))
++@@ -2268,6 +2268,9 @@ static void mtk_gdm_config(struct mtk_et
++ 
++ 		val |= config;
++ 
+++		if (!i && eth->netdev[0] && netdev_uses_dsa(eth->netdev[0]))
+++			val |= MTK_GDMA_SPECIAL_TAG;
+++
++ 		mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
++ 	}
++ 	/* Reset and enable PSE */
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++@@ -82,6 +82,7 @@
++ 
++ /* GDM Exgress Control Register */
++ #define MTK_GDMA_FWD_CFG(x)	(0x500 + (x * 0x1000))
+++#define MTK_GDMA_SPECIAL_TAG	BIT(24)
++ #define MTK_GDMA_ICS_EN		BIT(22)
++ #define MTK_GDMA_TCS_EN		BIT(21)
++ #define MTK_GDMA_UCS_EN		BIT(20)
++@@ -324,6 +325,7 @@
++ #define RX_DMA_L4_VALID_PDMA	BIT(30)		/* when PDMA is used */
++ #define RX_DMA_FPORT_SHIFT	19
++ #define RX_DMA_FPORT_MASK	0x7
+++#define RX_DMA_SPECIAL_TAG	BIT(22)
++ 
++ /* PHY Indirect Access Control registers */
++ #define MTK_PHY_IAC		0x10004
+diff --git a/target/linux/generic/pending-5.4/770-14-net-ethernet-mtk_eth_soc-set-PPE-flow-hash-as-skb-ha.patch b/target/linux/generic/pending-5.4/770-14-net-ethernet-mtk_eth_soc-set-PPE-flow-hash-as-skb-ha.patch
+new file mode 100644
+index 0000000000..4ab3d84163
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/770-14-net-ethernet-mtk_eth_soc-set-PPE-flow-hash-as-skb-ha.patch
+@@ -0,0 +1,41 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sun, 13 Sep 2020 08:27:24 +0200
++Subject: [PATCH] net: ethernet: mtk_eth_soc: set PPE flow hash as skb hash
++ if present
++
++This improves GRO performance
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++@@ -19,6 +19,7 @@
++ #include <linux/interrupt.h>
++ #include <linux/pinctrl/devinfo.h>
++ #include <linux/phylink.h>
+++#include <linux/jhash.h>
++ #include <net/dsa.h>
++ 
++ #include "mtk_eth_soc.h"
++@@ -1267,6 +1268,7 @@ static int mtk_poll_rx(struct napi_struc
++ 		struct net_device *netdev;
++ 		unsigned int pktlen;
++ 		dma_addr_t dma_addr;
+++		u32 hash;
++ 		int mac;
++ 
++ 		ring = mtk_get_rx_ring(eth);
++@@ -1336,6 +1338,12 @@ static int mtk_poll_rx(struct napi_struc
++ 		skb->protocol = eth_type_trans(skb, netdev);
++ 		bytes += pktlen;
++ 
+++		hash = trxd.rxd4 & GENMASK(13, 0);
+++		if (hash != GENMASK(13, 0)) {
+++			hash = jhash_1word(hash, 0);
+++			skb_set_hash(skb, hash, PKT_HASH_TYPE_L4);
+++		}
+++
++ 		if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX &&
++ 		    (trxd.rxd2 & RX_DMA_VTAG))
++ 			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
+diff --git a/target/linux/generic/pending-5.4/770-15-net-ethernet-mediatek-mtk_eth_soc-add-support-for-in.patch b/target/linux/generic/pending-5.4/770-15-net-ethernet-mediatek-mtk_eth_soc-add-support-for-in.patch
+new file mode 100644
+index 0000000000..f609f11d2c
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/770-15-net-ethernet-mediatek-mtk_eth_soc-add-support-for-in.patch
+@@ -0,0 +1,1058 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sun, 11 Oct 2020 22:23:08 +0200
++Subject: [PATCH] ethernet: mediatek: mtk_eth_soc: add support for
++ initializing the PPE
++
++The PPE (packet processing engine) is used to offload NAT/routed or even
++bridged flows. This patch brings up the PPE and uses it to get a packet
++hash. It also contains some functionality that will be used to bring up
++flow offloading later
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ create mode 100644 drivers/net/ethernet/mediatek/mtk_ppe.c
++ create mode 100644 drivers/net/ethernet/mediatek/mtk_ppe.h
++ create mode 100644 drivers/net/ethernet/mediatek/mtk_ppe_regs.h
++
++--- a/drivers/net/ethernet/mediatek/Makefile
+++++ b/drivers/net/ethernet/mediatek/Makefile
++@@ -4,4 +4,4 @@
++ #
++ 
++ obj-$(CONFIG_NET_MEDIATEK_SOC)                 += mtk_eth.o
++-mtk_eth-y := mtk_eth_soc.o mtk_sgmii.o mtk_eth_path.o
+++mtk_eth-y := mtk_eth_soc.o mtk_sgmii.o mtk_eth_path.o mtk_ppe.o
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++@@ -2301,12 +2301,17 @@ static int mtk_open(struct net_device *d
++ 
++ 	/* we run 2 netdevs on the same dma ring so we only bring it up once */
++ 	if (!refcount_read(&eth->dma_refcnt)) {
++-		int err = mtk_start_dma(eth);
+++		u32 gdm_config = MTK_GDMA_TO_PDMA;
+++		int err;
++ 
+++		err = mtk_start_dma(eth);
++ 		if (err)
++ 			return err;
++ 
++-		mtk_gdm_config(eth, MTK_GDMA_TO_PDMA);
+++		if (eth->soc->offload_version && mtk_ppe_start(&eth->ppe) == 0)
+++			gdm_config = MTK_GDMA_TO_PPE;
+++
+++		mtk_gdm_config(eth, gdm_config);
++ 
++ 		napi_enable(&eth->tx_napi);
++ 		napi_enable(&eth->rx_napi);
++@@ -2376,6 +2381,9 @@ static int mtk_stop(struct net_device *d
++ 
++ 	mtk_dma_free(eth);
++ 
+++	if (eth->soc->offload_version)
+++		mtk_ppe_stop(&eth->ppe);
+++
++ 	return 0;
++ }
++ 
++@@ -3165,6 +3173,13 @@ static int mtk_probe(struct platform_dev
++ 			goto err_free_dev;
++ 	}
++ 
+++	if (eth->soc->offload_version) {
+++		err = mtk_ppe_init(&eth->ppe, eth->dev,
+++				   eth->base + MTK_ETH_PPE_BASE, 2);
+++		if (err)
+++			goto err_free_dev;
+++	}
+++
++ 	for (i = 0; i < MTK_MAX_DEVS; i++) {
++ 		if (!eth->netdev[i])
++ 			continue;
++@@ -3239,6 +3254,7 @@ static const struct mtk_soc_data mt7621_
++ 	.hw_features = MTK_HW_FEATURES,
++ 	.required_clks = MT7621_CLKS_BITMAP,
++ 	.required_pctl = false,
+++	.offload_version = 2,
++ };
++ 
++ static const struct mtk_soc_data mt7622_data = {
++@@ -3247,6 +3263,7 @@ static const struct mtk_soc_data mt7622_
++ 	.hw_features = MTK_HW_FEATURES,
++ 	.required_clks = MT7622_CLKS_BITMAP,
++ 	.required_pctl = false,
+++	.offload_version = 2,
++ };
++ 
++ static const struct mtk_soc_data mt7623_data = {
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++@@ -16,6 +16,7 @@
++ #include <linux/refcount.h>
++ #include <linux/phylink.h>
++ #include <linux/dim.h>
+++#include "mtk_ppe.h"
++ 
++ #define MTK_QDMA_PAGE_SIZE	2048
++ #define	MTK_MAX_RX_LENGTH	1536
++@@ -87,6 +88,7 @@
++ #define MTK_GDMA_TCS_EN		BIT(21)
++ #define MTK_GDMA_UCS_EN		BIT(20)
++ #define MTK_GDMA_TO_PDMA	0x0
+++#define MTK_GDMA_TO_PPE		0x4444
++ #define MTK_GDMA_DROP_ALL       0x7777
++ 
++ /* Unicast Filter MAC Address Register - Low */
++@@ -321,6 +323,12 @@
++ #define RX_DMA_VID(_x)		((_x) & 0xfff)
++ 
++ /* QDMA descriptor rxd4 */
+++#define MTK_RXD4_FOE_ENTRY	GENMASK(13, 0)
+++#define MTK_RXD4_PPE_CPU_REASON	GENMASK(18, 14)
+++#define MTK_RXD4_SRC_PORT	GENMASK(21, 19)
+++#define MTK_RXD4_ALG		GENMASK(31, 22)
+++
+++/* QDMA descriptor rxd4 */
++ #define RX_DMA_L4_VALID		BIT(24)
++ #define RX_DMA_L4_VALID_PDMA	BIT(30)		/* when PDMA is used */
++ #define RX_DMA_FPORT_SHIFT	19
++@@ -827,6 +835,7 @@ struct mtk_soc_data {
++ 	u32		caps;
++ 	u32		required_clks;
++ 	bool		required_pctl;
+++	u8		offload_version;
++ 	netdev_features_t hw_features;
++ };
++ 
++@@ -938,6 +947,8 @@ struct mtk_eth {
++ 	u32				tx_int_status_reg;
++ 	u32				rx_dma_l4_valid;
++ 	int				ip_align;
+++
+++	struct mtk_ppe			ppe;
++ };
++ 
++ /* struct mtk_mac -	the structure that holds the info about the MACs of the
++--- /dev/null
+++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
++@@ -0,0 +1,497 @@
+++// SPDX-License-Identifier: GPL-2.0-only
+++/* Copyright (C) 2020 Felix Fietkau <nbd@nbd.name> */
+++
+++#include <linux/kernel.h>
+++#include <linux/jiffies.h>
+++#include <linux/delay.h>
+++#include <linux/io.h>
+++#include <linux/etherdevice.h>
+++#include <linux/platform_device.h>
+++#include "mtk_ppe.h"
+++#include "mtk_ppe_regs.h"
+++
+++static void ppe_w32(struct mtk_ppe *ppe, u32 reg, u32 val)
+++{
+++	writel(val, ppe->base + reg);
+++}
+++
+++static u32 ppe_r32(struct mtk_ppe *ppe, u32 reg)
+++{
+++	return readl(ppe->base + reg);
+++}
+++
+++static u32 ppe_m32(struct mtk_ppe *ppe, u32 reg, u32 mask, u32 set)
+++{
+++	u32 val;
+++
+++	val = ppe_r32(ppe, reg);
+++	val &= ~mask;
+++	val |= set;
+++	ppe_w32(ppe, reg, val);
+++
+++	return val;
+++}
+++
+++static u32 ppe_set(struct mtk_ppe *ppe, u32 reg, u32 val)
+++{
+++	return ppe_m32(ppe, reg, 0, val);
+++}
+++
+++static u32 ppe_clear(struct mtk_ppe *ppe, u32 reg, u32 val)
+++{
+++	return ppe_m32(ppe, reg, val, 0);
+++}
+++
+++static int mtk_ppe_wait_busy(struct mtk_ppe *ppe)
+++{
+++	unsigned long timeout = jiffies + HZ;
+++
+++	while (time_is_after_jiffies(timeout)) {
+++		if (!(ppe_r32(ppe, MTK_PPE_GLO_CFG) & MTK_PPE_GLO_CFG_BUSY))
+++			return 0;
+++
+++		usleep_range(10, 20);
+++	}
+++
+++	dev_err(ppe->dev, "PPE table busy");
+++
+++	return -ETIMEDOUT;
+++}
+++
+++static void mtk_ppe_cache_clear(struct mtk_ppe *ppe)
+++{
+++	ppe_set(ppe, MTK_PPE_CACHE_CTL, MTK_PPE_CACHE_CTL_CLEAR);
+++	ppe_clear(ppe, MTK_PPE_CACHE_CTL, MTK_PPE_CACHE_CTL_CLEAR);
+++}
+++
+++static void mtk_ppe_cache_enable(struct mtk_ppe *ppe, bool enable)
+++{
+++	mtk_ppe_cache_clear(ppe);
+++
+++	ppe_m32(ppe, MTK_PPE_CACHE_CTL, MTK_PPE_CACHE_CTL_EN,
+++		enable * MTK_PPE_CACHE_CTL_EN);
+++}
+++
+++static u32 mtk_ppe_hash_entry(struct mtk_foe_entry *e)
+++{
+++	u32 hv1, hv2, hv3;
+++	u32 hash;
+++
+++	switch (FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, e->ib1)) {
+++		case MTK_PPE_PKT_TYPE_BRIDGE:
+++			hv1 = e->bridge.src_mac_lo;
+++			hv1 ^= ((e->bridge.src_mac_hi & 0xffff) << 16);
+++			hv2 = e->bridge.src_mac_hi >> 16;
+++			hv2 ^= e->bridge.dest_mac_lo;
+++			hv3 = e->bridge.dest_mac_hi;
+++			break;
+++		case MTK_PPE_PKT_TYPE_IPV4_ROUTE:
+++		case MTK_PPE_PKT_TYPE_IPV4_HNAPT:
+++			hv1 = e->ipv4.orig.ports;
+++			hv2 = e->ipv4.orig.dest_ip;
+++			hv3 = e->ipv4.orig.src_ip;
+++			break;
+++		case MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T:
+++		case MTK_PPE_PKT_TYPE_IPV6_ROUTE_5T:
+++			hv1 = e->ipv6.src_ip[3] ^ e->ipv6.dest_ip[3];
+++			hv1 ^= e->ipv6.ports;
+++
+++			hv2 = e->ipv6.src_ip[2] ^ e->ipv6.dest_ip[2];
+++			hv2 ^= e->ipv6.dest_ip[0];
+++
+++			hv3 = e->ipv6.src_ip[1] ^ e->ipv6.dest_ip[1];
+++			hv3 ^= e->ipv6.src_ip[0];
+++			break;
+++		case MTK_PPE_PKT_TYPE_IPV4_DSLITE:
+++		case MTK_PPE_PKT_TYPE_IPV6_6RD:
+++		default:
+++			WARN_ON_ONCE(1);
+++			return MTK_PPE_HASH_MASK;
+++	}
+++
+++	hash = (hv1 & hv2) | ((~hv1) & hv3);
+++	hash = (hash >> 24) | ((hash & 0xffffff) << 8);
+++	hash ^= hv1 ^ hv2 ^ hv3;
+++	hash ^= hash >> 16;
+++	hash <<= 1;
+++	hash &= MTK_PPE_ENTRIES - 1;
+++
+++	return hash;
+++}
+++
+++static inline struct mtk_foe_mac_info *
+++mtk_foe_entry_l2(struct mtk_foe_entry *entry)
+++{
+++	int type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1);
+++
+++	if (type >= MTK_PPE_PKT_TYPE_IPV4_DSLITE)
+++		return &entry->ipv6.l2;
+++
+++	return &entry->ipv4.l2;
+++}
+++
+++static inline u32 *
+++mtk_foe_entry_ib2(struct mtk_foe_entry *entry)
+++{
+++	int type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1);
+++
+++	if (type >= MTK_PPE_PKT_TYPE_IPV4_DSLITE)
+++		return &entry->ipv6.ib2;
+++
+++	return &entry->ipv4.ib2;
+++}
+++
+++int mtk_foe_entry_prepare(struct mtk_foe_entry *entry, int type, int l4proto,
+++			  u8 pse_port, u8 *src_mac, u8 *dest_mac)
+++{
+++	struct mtk_foe_mac_info *l2;
+++	u32 ports_pad, val;
+++
+++	memset(entry, 0, sizeof(*entry));
+++
+++	val = FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_BIND) |
+++	      FIELD_PREP(MTK_FOE_IB1_PACKET_TYPE, type) |
+++	      FIELD_PREP(MTK_FOE_IB1_UDP, l4proto == IPPROTO_UDP) |
+++	      MTK_FOE_IB1_BIND_TTL |
+++	      MTK_FOE_IB1_BIND_CACHE |
+++	      MTK_FOE_IB1_BIND_KEEPALIVE;
+++	entry->ib1 = val;
+++
+++	val = FIELD_PREP(MTK_FOE_IB2_PORT_MG, 0x3f) |
+++	      FIELD_PREP(MTK_FOE_IB2_PORT_AG, 0x1f) |
+++	      FIELD_PREP(MTK_FOE_IB2_DEST_PORT, pse_port);
+++
+++	if (is_multicast_ether_addr(dest_mac))
+++		val |= MTK_FOE_IB2_MULTICAST;
+++
+++	ports_pad = 0xa5a5a500 | (l4proto & 0xff);
+++	if (type == MTK_PPE_PKT_TYPE_IPV4_ROUTE)
+++		entry->ipv4.orig.ports = ports_pad;
+++	if (type == MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T)
+++		entry->ipv6.ports = ports_pad;
+++
+++	if (type >= MTK_PPE_PKT_TYPE_IPV4_DSLITE) {
+++		entry->ipv6.ib2 = val;
+++		l2 = &entry->ipv6.l2;
+++	} else {
+++		entry->ipv4.ib2 = val;
+++		l2 = &entry->ipv4.l2;
+++	}
+++
+++	l2->dest_mac_hi = get_unaligned_be32(dest_mac);
+++	l2->dest_mac_lo = get_unaligned_be16(dest_mac + 4);
+++	l2->src_mac_hi = get_unaligned_be32(src_mac);
+++	l2->src_mac_lo = get_unaligned_be16(src_mac + 4);
+++
+++	if (type >= MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T)
+++		l2->etype = ETH_P_IPV6;
+++	else
+++		l2->etype = ETH_P_IP;
+++
+++	return 0;
+++}
+++
+++int mtk_foe_entry_set_ipv4_tuple(struct mtk_foe_entry *entry, bool egress,
+++				 __be32 src_addr, __be16 src_port,
+++				 __be32 dest_addr, __be16 dest_port)
+++{
+++	int type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1);
+++	struct mtk_ipv4_tuple *t;
+++
+++	switch (type) {
+++	case MTK_PPE_PKT_TYPE_IPV4_HNAPT:
+++		if (egress) {
+++			t = &entry->ipv4.new;
+++			break;
+++		}
+++		fallthrough;
+++	case MTK_PPE_PKT_TYPE_IPV4_DSLITE:
+++	case MTK_PPE_PKT_TYPE_IPV4_ROUTE:
+++		t = &entry->ipv4.orig;
+++		break;
+++	case MTK_PPE_PKT_TYPE_IPV6_6RD:
+++		entry->ipv6_6rd.tunnel_src_ip = be32_to_cpu(src_addr);
+++		entry->ipv6_6rd.tunnel_dest_ip = be32_to_cpu(dest_addr);
+++		return 0;
+++	default:
+++		WARN_ON_ONCE(1);
+++		return -EINVAL;
+++	}
+++
+++	t->src_ip = be32_to_cpu(src_addr);
+++	t->dest_ip = be32_to_cpu(dest_addr);
+++
+++	if (type == MTK_PPE_PKT_TYPE_IPV4_ROUTE)
+++		return 0;
+++
+++	t->src_port = be16_to_cpu(src_port);
+++	t->dest_port = be16_to_cpu(dest_port);
+++
+++	return 0;
+++}
+++
+++int mtk_foe_entry_set_ipv6_tuple(struct mtk_foe_entry *entry,
+++				 __be32 *src_addr, __be16 src_port,
+++				 __be32 *dest_addr, __be16 dest_port)
+++{
+++	int type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1);
+++	u32 *src, *dest;
+++	int i;
+++
+++	switch (type) {
+++	case MTK_PPE_PKT_TYPE_IPV4_DSLITE:
+++		src = entry->dslite.tunnel_src_ip;
+++		dest = entry->dslite.tunnel_dest_ip;
+++		break;
+++	case MTK_PPE_PKT_TYPE_IPV6_ROUTE_5T:
+++	case MTK_PPE_PKT_TYPE_IPV6_6RD:
+++		entry->ipv6.src_port = be16_to_cpu(src_port);
+++		entry->ipv6.dest_port = be16_to_cpu(dest_port);
+++		fallthrough;
+++	case MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T:
+++		src = entry->ipv6.src_ip;
+++		dest = entry->ipv6.dest_ip;
+++		break;
+++	default:
+++		WARN_ON_ONCE(1);
+++		return -EINVAL;
+++	};
+++
+++	for (i = 0; i < 4; i++)
+++		src[i] = be32_to_cpu(src_addr[i]);
+++	for (i = 0; i < 4; i++)
+++		dest[i] = be32_to_cpu(dest_addr[i]);
+++
+++	return 0;
+++}
+++
+++int mtk_foe_entry_set_dsa(struct mtk_foe_entry *entry, int port)
+++{
+++	struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(entry);
+++
+++	l2->etype = BIT(port);
+++
+++	if (!(entry->ib1 & MTK_FOE_IB1_BIND_VLAN_LAYER))
+++		entry->ib1 |= FIELD_PREP(MTK_FOE_IB1_BIND_VLAN_LAYER, 1);
+++	else
+++		l2->etype |= BIT(8);
+++
+++	entry->ib1 &= ~MTK_FOE_IB1_BIND_VLAN_TAG;
+++
+++	return 0;
+++}
+++
+++int mtk_foe_entry_set_vlan(struct mtk_foe_entry *entry, int vid)
+++{
+++	struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(entry);
+++
+++	switch (FIELD_GET(MTK_FOE_IB1_BIND_VLAN_LAYER, entry->ib1)) {
+++	case 0:
+++		entry->ib1 |= MTK_FOE_IB1_BIND_VLAN_TAG |
+++			      FIELD_PREP(MTK_FOE_IB1_BIND_VLAN_LAYER, 1);
+++		l2->vlan1 = vid;
+++		return 0;
+++	case 1:
+++		if (!(entry->ib1 & MTK_FOE_IB1_BIND_VLAN_TAG)) {
+++			l2->vlan1 = vid;
+++			l2->etype |= BIT(8);
+++		} else {
+++			l2->vlan2 = vid;
+++			entry->ib1 += FIELD_PREP(MTK_FOE_IB1_BIND_VLAN_LAYER, 1);
+++		}
+++		return 0;
+++	default:
+++		return -ENOSPC;
+++	}
+++}
+++
+++int mtk_foe_entry_set_pppoe(struct mtk_foe_entry *entry, int sid)
+++{
+++	struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(entry);
+++
+++	if (!(entry->ib1 & MTK_FOE_IB1_BIND_VLAN_LAYER) ||
+++	    (entry->ib1 & MTK_FOE_IB1_BIND_VLAN_TAG))
+++		l2->etype = ETH_P_PPP_SES;
+++
+++	entry->ib1 |= MTK_FOE_IB1_BIND_PPPOE;
+++	l2->pppoe_id = sid;
+++
+++	return 0;
+++}
+++
+++static inline bool mtk_foe_entry_usable(struct mtk_foe_entry *entry)
+++{
+++	return !(entry->ib1 & MTK_FOE_IB1_STATIC) &&
+++	       FIELD_GET(MTK_FOE_IB1_STATE, entry->ib1) != MTK_FOE_STATE_BIND;
+++}
+++
+++int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_foe_entry *entry,
+++			 u16 timestamp)
+++{
+++	struct mtk_foe_entry *hwe;
+++	u32 hash;
+++
+++	timestamp &= MTK_FOE_IB1_BIND_TIMESTAMP;
+++	entry->ib1 &= ~MTK_FOE_IB1_BIND_TIMESTAMP;
+++	entry->ib1 |= FIELD_PREP(MTK_FOE_IB1_BIND_TIMESTAMP, timestamp);
+++
+++	hash = mtk_ppe_hash_entry(entry);
+++	hwe = &ppe->foe_table[hash];
+++	if (!mtk_foe_entry_usable(hwe)) {
+++		hwe++;
+++		hash++;
+++
+++		if (!mtk_foe_entry_usable(hwe))
+++			return -ENOSPC;
+++	}
+++
+++	memcpy(&hwe->data, &entry->data, sizeof(hwe->data));
+++	wmb();
+++	hwe->ib1 = entry->ib1;
+++
+++	dma_wmb();
+++
+++	mtk_ppe_cache_clear(ppe);
+++
+++	return hash;
+++}
+++
+++int mtk_ppe_init(struct mtk_ppe *ppe, struct device *dev, void __iomem *base,
+++		 int version)
+++{
+++	struct mtk_foe_entry *foe;
+++
+++	/* need to allocate a separate device, since it PPE DMA access is
+++	 * not coherent.
+++	 */
+++	ppe->base = base;
+++	ppe->dev = dev;
+++	ppe->version = version;
+++
+++	foe = dmam_alloc_coherent(ppe->dev, MTK_PPE_ENTRIES * sizeof(*foe),
+++				  &ppe->foe_phys, GFP_KERNEL);
+++	if (!foe)
+++		return -ENOMEM;
+++
+++	ppe->foe_table = foe;
+++
+++	return 0;
+++}
+++
+++static void mtk_ppe_init_foe_table(struct mtk_ppe *ppe)
+++{
+++	static const u8 skip[] = { 12, 25, 38, 51, 76, 89, 102 };
+++	int i, k;
+++
+++	memset(ppe->foe_table, 0, MTK_PPE_ENTRIES * sizeof(ppe->foe_table));
+++
+++	if (!IS_ENABLED(CONFIG_SOC_MT7621))
+++		return;
+++
+++	/* skip all entries that cross the 1024 byte boundary */
+++	for (i = 0; i < MTK_PPE_ENTRIES; i += 128)
+++		for (k = 0; k < ARRAY_SIZE(skip); k++)
+++			ppe->foe_table[i + skip[k]].ib1 |= MTK_FOE_IB1_STATIC;
+++}
+++
+++int mtk_ppe_start(struct mtk_ppe *ppe)
+++{
+++	u32 val;
+++
+++	mtk_ppe_init_foe_table(ppe);
+++	ppe_w32(ppe, MTK_PPE_TB_BASE, ppe->foe_phys);
+++
+++	val = MTK_PPE_TB_CFG_ENTRY_80B |
+++	      MTK_PPE_TB_CFG_AGE_NON_L4 |
+++	      MTK_PPE_TB_CFG_AGE_UNBIND |
+++	      MTK_PPE_TB_CFG_AGE_TCP |
+++	      MTK_PPE_TB_CFG_AGE_UDP |
+++	      MTK_PPE_TB_CFG_AGE_TCP_FIN |
+++	      FIELD_PREP(MTK_PPE_TB_CFG_SEARCH_MISS,
+++			 MTK_PPE_SEARCH_MISS_ACTION_FORWARD_BUILD) |
+++	      FIELD_PREP(MTK_PPE_TB_CFG_KEEPALIVE,
+++			 MTK_PPE_KEEPALIVE_DUP_CPU) |
+++	      FIELD_PREP(MTK_PPE_TB_CFG_HASH_MODE, 1) |
+++	      FIELD_PREP(MTK_PPE_TB_CFG_SCAN_MODE,
+++			 MTK_PPE_SCAN_MODE_KEEPALIVE_AGE) |
+++	      FIELD_PREP(MTK_PPE_TB_CFG_ENTRY_NUM,
+++			 MTK_PPE_ENTRIES_SHIFT);
+++	ppe_w32(ppe, MTK_PPE_TB_CFG, val);
+++
+++	ppe_w32(ppe, MTK_PPE_IP_PROTO_CHK,
+++		MTK_PPE_IP_PROTO_CHK_IPV4 | MTK_PPE_IP_PROTO_CHK_IPV6);
+++
+++	mtk_ppe_cache_enable(ppe, true);
+++
+++	val = MTK_PPE_FLOW_CFG_IP4_TCP_FRAG |
+++	      MTK_PPE_FLOW_CFG_IP4_UDP_FRAG |
+++	      MTK_PPE_FLOW_CFG_IP6_3T_ROUTE |
+++	      MTK_PPE_FLOW_CFG_IP6_5T_ROUTE |
+++	      MTK_PPE_FLOW_CFG_IP6_6RD |
+++	      MTK_PPE_FLOW_CFG_IP4_NAT |
+++	      MTK_PPE_FLOW_CFG_IP4_NAPT |
+++	      MTK_PPE_FLOW_CFG_IP4_DSLITE |
+++	      MTK_PPE_FLOW_CFG_L2_BRIDGE |
+++	      MTK_PPE_FLOW_CFG_IP4_NAT_FRAG;
+++	ppe_w32(ppe, MTK_PPE_FLOW_CFG, val);
+++
+++	val = FIELD_PREP(MTK_PPE_UNBIND_AGE_MIN_PACKETS, 1000) |
+++	      FIELD_PREP(MTK_PPE_UNBIND_AGE_DELTA, 3);
+++	ppe_w32(ppe, MTK_PPE_UNBIND_AGE, val);
+++
+++	val = FIELD_PREP(MTK_PPE_BIND_AGE0_DELTA_UDP, 12) |
+++	      FIELD_PREP(MTK_PPE_BIND_AGE0_DELTA_NON_L4, 1);
+++	ppe_w32(ppe, MTK_PPE_BIND_AGE0, val);
+++
+++	val = FIELD_PREP(MTK_PPE_BIND_AGE1_DELTA_TCP_FIN, 1) |
+++	      FIELD_PREP(MTK_PPE_BIND_AGE1_DELTA_TCP, 7);
+++	ppe_w32(ppe, MTK_PPE_BIND_AGE1, val);
+++
+++	val = MTK_PPE_BIND_LIMIT0_QUARTER | MTK_PPE_BIND_LIMIT0_HALF;
+++	ppe_w32(ppe, MTK_PPE_BIND_LIMIT0, val);
+++
+++	val = MTK_PPE_BIND_LIMIT1_FULL |
+++	      FIELD_PREP(MTK_PPE_BIND_LIMIT1_NON_L4, 1);
+++	ppe_w32(ppe, MTK_PPE_BIND_LIMIT1, val);
+++
+++	val = FIELD_PREP(MTK_PPE_BIND_RATE_BIND, 30) |
+++	      FIELD_PREP(MTK_PPE_BIND_RATE_PREBIND, 1);
+++	ppe_w32(ppe, MTK_PPE_BIND_RATE, val);
+++
+++	/* enable PPE */
+++	val = MTK_PPE_GLO_CFG_EN |
+++	      MTK_PPE_GLO_CFG_IP4_L4_CS_DROP |
+++	      MTK_PPE_GLO_CFG_IP4_CS_DROP |
+++	      MTK_PPE_GLO_CFG_FLOW_DROP_UPDATE;
+++	ppe_w32(ppe, MTK_PPE_GLO_CFG, val);
+++
+++	ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT, 0);
+++
+++	return 0;
+++}
+++
+++int mtk_ppe_stop(struct mtk_ppe *ppe)
+++{
+++	u32 val;
+++	int i;
+++
+++	for (i = 0; i < MTK_PPE_ENTRIES; i++)
+++		ppe->foe_table[i].ib1 = FIELD_PREP(MTK_FOE_IB1_STATE,
+++						   MTK_FOE_STATE_INVALID);
+++
+++	mtk_ppe_cache_enable(ppe, false);
+++
+++	/* disable offload engine */
+++	ppe_clear(ppe, MTK_PPE_GLO_CFG, MTK_PPE_GLO_CFG_EN);
+++	ppe_w32(ppe, MTK_PPE_FLOW_CFG, 0);
+++
+++	/* disable aging */
+++	val = MTK_PPE_TB_CFG_AGE_NON_L4 |
+++	      MTK_PPE_TB_CFG_AGE_UNBIND |
+++	      MTK_PPE_TB_CFG_AGE_TCP |
+++	      MTK_PPE_TB_CFG_AGE_UDP |
+++	      MTK_PPE_TB_CFG_AGE_TCP_FIN;
+++	ppe_clear(ppe, MTK_PPE_TB_CFG, val);
+++
+++	return mtk_ppe_wait_busy(ppe);
+++}
++--- /dev/null
+++++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
++@@ -0,0 +1,274 @@
+++// SPDX-License-Identifier: GPL-2.0-only
+++/* Copyright (C) 2020 Felix Fietkau <nbd@nbd.name> */
+++
+++#ifndef __MTK_PPE_H
+++#define __MTK_PPE_H
+++
+++#include <linux/kernel.h>
+++#include <linux/bitfield.h>
+++
+++#define MTK_ETH_PPE_BASE		0xc00
+++
+++#define MTK_PPE_ENTRIES_SHIFT		3
+++#define MTK_PPE_ENTRIES			(1024 << MTK_PPE_ENTRIES_SHIFT)
+++#define MTK_PPE_HASH_MASK		(MTK_PPE_ENTRIES - 1)
+++
+++#define MTK_FOE_IB1_UNBIND_TIMESTAMP	GENMASK(7, 0)
+++#define MTK_FOE_IB1_UNBIND_PACKETS	GENMASK(23, 8)
+++#define MTK_FOE_IB1_UNBIND_PREBIND	BIT(24)
+++
+++#define MTK_FOE_IB1_BIND_TIMESTAMP	GENMASK(14, 0)
+++#define MTK_FOE_IB1_BIND_KEEPALIVE	BIT(15)
+++#define MTK_FOE_IB1_BIND_VLAN_LAYER	GENMASK(18, 16)
+++#define MTK_FOE_IB1_BIND_PPPOE		BIT(19)
+++#define MTK_FOE_IB1_BIND_VLAN_TAG	BIT(20)
+++#define MTK_FOE_IB1_BIND_PKT_SAMPLE	BIT(21)
+++#define MTK_FOE_IB1_BIND_CACHE		BIT(22)
+++#define MTK_FOE_IB1_BIND_TUNNEL_DECAP	BIT(23)
+++#define MTK_FOE_IB1_BIND_TTL		BIT(24)
+++
+++#define MTK_FOE_IB1_PACKET_TYPE		GENMASK(27, 25)
+++#define MTK_FOE_IB1_STATE		GENMASK(29, 28)
+++#define MTK_FOE_IB1_UDP			BIT(30)
+++#define MTK_FOE_IB1_STATIC		BIT(31)
+++
+++enum {
+++	MTK_PPE_PKT_TYPE_IPV4_HNAPT = 0,
+++	MTK_PPE_PKT_TYPE_IPV4_ROUTE = 1,
+++	MTK_PPE_PKT_TYPE_BRIDGE = 2,
+++	MTK_PPE_PKT_TYPE_IPV4_DSLITE = 3,
+++	MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T = 4,
+++	MTK_PPE_PKT_TYPE_IPV6_ROUTE_5T = 5,
+++	MTK_PPE_PKT_TYPE_IPV6_6RD = 7,
+++};
+++
+++#define MTK_FOE_IB2_QID			GENMASK(3, 0)
+++#define MTK_FOE_IB2_PSE_QOS		BIT(4)
+++#define MTK_FOE_IB2_DEST_PORT		GENMASK(7, 5)
+++#define MTK_FOE_IB2_MULTICAST		BIT(8)
+++
+++#define MTK_FOE_IB2_WHNAT_QID2		GENMASK(13, 12)
+++#define MTK_FOE_IB2_WHNAT_DEVIDX	BIT(16)
+++#define MTK_FOE_IB2_WHNAT_NAT		BIT(17)
+++
+++#define MTK_FOE_IB2_PORT_MG		GENMASK(17, 12)
+++
+++#define MTK_FOE_IB2_PORT_AG		GENMASK(23, 18)
+++
+++#define MTK_FOE_IB2_DSCP		GENMASK(31, 24)
+++
+++#define MTK_FOE_VLAN2_WHNAT_BSS		GEMMASK(5, 0)
+++#define MTK_FOE_VLAN2_WHNAT_WCID	GENMASK(13, 6)
+++#define MTK_FOE_VLAN2_WHNAT_RING	GENMASK(15, 14)
+++
+++enum {
+++	MTK_FOE_STATE_INVALID,
+++	MTK_FOE_STATE_UNBIND,
+++	MTK_FOE_STATE_BIND,
+++	MTK_FOE_STATE_FIN
+++};
+++
+++struct mtk_foe_mac_info {
+++	u16 vlan1;
+++	u16 etype;
+++
+++	u32 dest_mac_hi;
+++
+++	u16 vlan2;
+++	u16 dest_mac_lo;
+++
+++	u32 src_mac_hi;
+++
+++	u16 pppoe_id;
+++	u16 src_mac_lo;
+++};
+++
+++struct mtk_foe_bridge {
+++	u32 dest_mac_hi;
+++
+++	u16 src_mac_lo;
+++	u16 dest_mac_lo;
+++
+++	u32 src_mac_hi;
+++
+++	u32 ib2;
+++
+++	u32 _rsv[5];
+++
+++	u32 udf_tsid;
+++	struct mtk_foe_mac_info l2;
+++};
+++
+++struct mtk_ipv4_tuple {
+++	u32 src_ip;
+++	u32 dest_ip;
+++	union {
+++		struct {
+++			u16 dest_port;
+++			u16 src_port;
+++		};
+++		struct {
+++			u8 protocol;
+++			u8 _pad[3]; /* fill with 0xa5a5a5 */
+++		};
+++		u32 ports;
+++	};
+++};
+++
+++struct mtk_foe_ipv4 {
+++	struct mtk_ipv4_tuple orig;
+++
+++	u32 ib2;
+++
+++	struct mtk_ipv4_tuple new;
+++
+++	u16 timestamp;
+++	u16 _rsv0[3];
+++
+++	u32 udf_tsid;
+++
+++	struct mtk_foe_mac_info l2;
+++};
+++
+++struct mtk_foe_ipv4_dslite {
+++	struct mtk_ipv4_tuple ip4;
+++
+++	u32 tunnel_src_ip[4];
+++	u32 tunnel_dest_ip[4];
+++
+++	u8 flow_label[3];
+++	u8 priority;
+++
+++	u32 udf_tsid;
+++
+++	u32 ib2;
+++
+++	struct mtk_foe_mac_info l2;
+++};
+++
+++struct mtk_foe_ipv6 {
+++	u32 src_ip[4];
+++	u32 dest_ip[4];
+++
+++	union {
+++		struct {
+++			u8 protocol;
+++			u8 _pad[3]; /* fill with 0xa5a5a5 */
+++		}; /* 3-tuple */
+++		struct {
+++			u16 dest_port;
+++			u16 src_port;
+++		}; /* 5-tuple */
+++		u32 ports;
+++	};
+++
+++	u32 _rsv[3];
+++
+++	u32 udf;
+++
+++	u32 ib2;
+++	struct mtk_foe_mac_info l2;
+++};
+++
+++struct mtk_foe_ipv6_6rd {
+++	u32 src_ip[4];
+++	u32 dest_ip[4];
+++	u16 dest_port;
+++	u16 src_port;
+++
+++	u32 tunnel_src_ip;
+++	u32 tunnel_dest_ip;
+++
+++	u16 hdr_csum;
+++	u8 dscp;
+++	u8 ttl;
+++
+++	u8 flag;
+++	u8 pad;
+++	u8 per_flow_6rd_id;
+++	u8 pad2;
+++
+++	u32 ib2;
+++	struct mtk_foe_mac_info l2;
+++};
+++
+++struct mtk_foe_entry {
+++	u32 ib1;
+++
+++	union {
+++		struct mtk_foe_bridge bridge;
+++		struct mtk_foe_ipv4 ipv4;
+++		struct mtk_foe_ipv4_dslite dslite;
+++		struct mtk_foe_ipv6 ipv6;
+++		struct mtk_foe_ipv6_6rd ipv6_6rd;
+++		u32 data[19];
+++	};
+++};
+++
+++enum {
+++	MTK_PPE_CPU_REASON_TTL_EXCEEDED			= 0x02,
+++	MTK_PPE_CPU_REASON_OPTION_HEADER		= 0x03,
+++	MTK_PPE_CPU_REASON_NO_FLOW			= 0x07,
+++	MTK_PPE_CPU_REASON_IPV4_FRAG			= 0x08,
+++	MTK_PPE_CPU_REASON_IPV4_DSLITE_FRAG		= 0x09,
+++	MTK_PPE_CPU_REASON_IPV4_DSLITE_NO_TCP_UDP	= 0x0a,
+++	MTK_PPE_CPU_REASON_IPV6_6RD_NO_TCP_UDP		= 0x0b,
+++	MTK_PPE_CPU_REASON_TCP_FIN_SYN_RST		= 0x0c,
+++	MTK_PPE_CPU_REASON_UN_HIT			= 0x0d,
+++	MTK_PPE_CPU_REASON_HIT_UNBIND			= 0x0e,
+++	MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED	= 0x0f,
+++	MTK_PPE_CPU_REASON_HIT_BIND_TCP_FIN		= 0x10,
+++	MTK_PPE_CPU_REASON_HIT_TTL_1			= 0x11,
+++	MTK_PPE_CPU_REASON_HIT_BIND_VLAN_VIOLATION	= 0x12,
+++	MTK_PPE_CPU_REASON_KEEPALIVE_UC_OLD_HDR		= 0x13,
+++	MTK_PPE_CPU_REASON_KEEPALIVE_MC_NEW_HDR		= 0x14,
+++	MTK_PPE_CPU_REASON_KEEPALIVE_DUP_OLD_HDR	= 0x15,
+++	MTK_PPE_CPU_REASON_HIT_BIND_FORCE_CPU		= 0x16,
+++	MTK_PPE_CPU_REASON_TUNNEL_OPTION_HEADER		= 0x17,
+++	MTK_PPE_CPU_REASON_MULTICAST_TO_CPU		= 0x18,
+++	MTK_PPE_CPU_REASON_MULTICAST_TO_GMAC1_CPU	= 0x19,
+++	MTK_PPE_CPU_REASON_HIT_PRE_BIND			= 0x1a,
+++	MTK_PPE_CPU_REASON_PACKET_SAMPLING		= 0x1b,
+++	MTK_PPE_CPU_REASON_EXCEED_MTU			= 0x1c,
+++	MTK_PPE_CPU_REASON_PPE_BYPASS			= 0x1e,
+++	MTK_PPE_CPU_REASON_INVALID			= 0x1f,
+++};
+++
+++struct mtk_ppe {
+++	struct device *dev;
+++	void __iomem *base;
+++	int version;
+++
+++	struct mtk_foe_entry *foe_table;
+++	dma_addr_t foe_phys;
+++
+++	void *acct_table;
+++};
+++
+++int mtk_ppe_init(struct mtk_ppe *ppe, struct device *dev, void __iomem *base,
+++		 int version);
+++int mtk_ppe_start(struct mtk_ppe *ppe);
+++int mtk_ppe_stop(struct mtk_ppe *ppe);
+++
+++static inline void
+++mtk_foe_entry_clear(struct mtk_ppe *ppe, u16 hash)
+++{
+++	ppe->foe_table[hash].ib1 = 0;
+++	dma_wmb();
+++}
+++
+++int mtk_foe_entry_prepare(struct mtk_foe_entry *entry, int type, int l4proto,
+++			  u8 pse_port, u8 *src_mac, u8 *dest_mac);
+++int mtk_foe_entry_set_ipv4_tuple(struct mtk_foe_entry *entry, bool orig,
+++				 __be32 src_addr, __be16 src_port,
+++				 __be32 dest_addr, __be16 dest_port);
+++int mtk_foe_entry_set_ipv6_tuple(struct mtk_foe_entry *entry,
+++				 __be32 *src_addr, __be16 src_port,
+++				 __be32 *dest_addr, __be16 dest_port);
+++int mtk_foe_entry_set_dsa(struct mtk_foe_entry *entry, int port);
+++int mtk_foe_entry_set_vlan(struct mtk_foe_entry *entry, int vid);
+++int mtk_foe_entry_set_pppoe(struct mtk_foe_entry *entry, int sid);
+++int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_foe_entry *entry,
+++			 u16 timestamp);
+++
+++#endif
++--- /dev/null
+++++ b/drivers/net/ethernet/mediatek/mtk_ppe_regs.h
++@@ -0,0 +1,144 @@
+++// SPDX-License-Identifier: GPL-2.0-only
+++/* Copyright (C) 2020 Felix Fietkau <nbd@nbd.name> */
+++
+++#ifndef __MTK_PPE_REGS_H
+++#define __MTK_PPE_REGS_H
+++
+++#define MTK_PPE_GLO_CFG				0x200
+++#define MTK_PPE_GLO_CFG_EN			BIT(0)
+++#define MTK_PPE_GLO_CFG_TSID_EN			BIT(1)
+++#define MTK_PPE_GLO_CFG_IP4_L4_CS_DROP		BIT(2)
+++#define MTK_PPE_GLO_CFG_IP4_CS_DROP		BIT(3)
+++#define MTK_PPE_GLO_CFG_TTL0_DROP		BIT(4)
+++#define MTK_PPE_GLO_CFG_PPE_BSWAP		BIT(5)
+++#define MTK_PPE_GLO_CFG_PSE_HASH_OFS		BIT(6)
+++#define MTK_PPE_GLO_CFG_MCAST_TB_EN		BIT(7)
+++#define MTK_PPE_GLO_CFG_FLOW_DROP_KA		BIT(8)
+++#define MTK_PPE_GLO_CFG_FLOW_DROP_UPDATE	BIT(9)
+++#define MTK_PPE_GLO_CFG_UDP_LITE_EN		BIT(10)
+++#define MTK_PPE_GLO_CFG_UDP_LEN_DROP		BIT(11)
+++#define MTK_PPE_GLO_CFG_MCAST_ENTRIES		GNEMASK(13, 12)
+++#define MTK_PPE_GLO_CFG_BUSY			BIT(31)
+++
+++#define MTK_PPE_FLOW_CFG			0x204
+++#define MTK_PPE_FLOW_CFG_IP4_TCP_FRAG		BIT(6)
+++#define MTK_PPE_FLOW_CFG_IP4_UDP_FRAG		BIT(7)
+++#define MTK_PPE_FLOW_CFG_IP6_3T_ROUTE		BIT(8)
+++#define MTK_PPE_FLOW_CFG_IP6_5T_ROUTE		BIT(9)
+++#define MTK_PPE_FLOW_CFG_IP6_6RD		BIT(10)
+++#define MTK_PPE_FLOW_CFG_IP4_NAT		BIT(12)
+++#define MTK_PPE_FLOW_CFG_IP4_NAPT		BIT(13)
+++#define MTK_PPE_FLOW_CFG_IP4_DSLITE		BIT(14)
+++#define MTK_PPE_FLOW_CFG_L2_BRIDGE		BIT(15)
+++#define MTK_PPE_FLOW_CFG_IP_PROTO_BLACKLIST	BIT(16)
+++#define MTK_PPE_FLOW_CFG_IP4_NAT_FRAG		BIT(17)
+++#define MTK_PPE_FLOW_CFG_IP4_HASH_FLOW_LABEL	BIT(18)
+++#define MTK_PPE_FLOW_CFG_IP4_HASH_GRE_KEY	BIT(19)
+++#define MTK_PPE_FLOW_CFG_IP6_HASH_GRE_KEY	BIT(20)
+++
+++#define MTK_PPE_IP_PROTO_CHK			0x208
+++#define MTK_PPE_IP_PROTO_CHK_IPV4		GENMASK(15, 0)
+++#define MTK_PPE_IP_PROTO_CHK_IPV6		GENMASK(31, 16)
+++
+++#define MTK_PPE_TB_CFG				0x21c
+++#define MTK_PPE_TB_CFG_ENTRY_NUM		GENMASK(2, 0)
+++#define MTK_PPE_TB_CFG_ENTRY_80B		BIT(3)
+++#define MTK_PPE_TB_CFG_SEARCH_MISS		GENMASK(5, 4)
+++#define MTK_PPE_TB_CFG_AGE_PREBIND		BIT(6)
+++#define MTK_PPE_TB_CFG_AGE_NON_L4		BIT(7)
+++#define MTK_PPE_TB_CFG_AGE_UNBIND		BIT(8)
+++#define MTK_PPE_TB_CFG_AGE_TCP			BIT(9)
+++#define MTK_PPE_TB_CFG_AGE_UDP			BIT(10)
+++#define MTK_PPE_TB_CFG_AGE_TCP_FIN		BIT(11)
+++#define MTK_PPE_TB_CFG_KEEPALIVE		GENMASK(13, 12)
+++#define MTK_PPE_TB_CFG_HASH_MODE		GENMASK(15, 14)
+++#define MTK_PPE_TB_CFG_SCAN_MODE		GENMASK(17, 16)
+++#define MTK_PPE_TB_CFG_HASH_DEBUG		GENMASK(19, 18)
+++
+++enum {
+++	MTK_PPE_SCAN_MODE_DISABLED,
+++	MTK_PPE_SCAN_MODE_CHECK_AGE,
+++	MTK_PPE_SCAN_MODE_KEEPALIVE_AGE,
+++};
+++
+++enum {
+++	MTK_PPE_KEEPALIVE_DISABLE,
+++	MTK_PPE_KEEPALIVE_UNICAST_CPU,
+++	MTK_PPE_KEEPALIVE_DUP_CPU = 3,
+++};
+++
+++enum {
+++	MTK_PPE_SEARCH_MISS_ACTION_DROP,
+++	MTK_PPE_SEARCH_MISS_ACTION_FORWARD = 2,
+++	MTK_PPE_SEARCH_MISS_ACTION_FORWARD_BUILD = 3,
+++};
+++
+++#define MTK_PPE_TB_BASE				0x220
+++
+++#define MTK_PPE_TB_USED				0x224
+++#define MTK_PPE_TB_USED_NUM			GENMASK(13, 0)
+++
+++#define MTK_PPE_BIND_RATE			0x228
+++#define MTK_PPE_BIND_RATE_BIND			GENMASK(15, 0)
+++#define MTK_PPE_BIND_RATE_PREBIND		GENMASK(31, 16)
+++
+++#define MTK_PPE_BIND_LIMIT0			0x22c
+++#define MTK_PPE_BIND_LIMIT0_QUARTER		GENMASK(13, 0)
+++#define MTK_PPE_BIND_LIMIT0_HALF		GENMASK(29, 16)
+++
+++#define MTK_PPE_BIND_LIMIT1			0x230
+++#define MTK_PPE_BIND_LIMIT1_FULL		GENMASK(13, 0)
+++#define MTK_PPE_BIND_LIMIT1_NON_L4		GENMASK(23, 16)
+++
+++#define MTK_PPE_KEEPALIVE			0x234
+++#define MTK_PPE_KEEPALIVE_TIME			GENMASK(15, 0)
+++#define MTK_PPE_KEEPALIVE_TIME_TCP		GENMASK(23, 16)
+++#define MTK_PPE_KEEPALIVE_TIME_UDP		GENMASK(31, 24)
+++
+++#define MTK_PPE_UNBIND_AGE			0x238
+++#define MTK_PPE_UNBIND_AGE_MIN_PACKETS		GENMASK(31, 16)
+++#define MTK_PPE_UNBIND_AGE_DELTA		GENMASK(7, 0)
+++
+++#define MTK_PPE_BIND_AGE0			0x23c
+++#define MTK_PPE_BIND_AGE0_DELTA_NON_L4		GENMASK(30, 16)
+++#define MTK_PPE_BIND_AGE0_DELTA_UDP		GENMASK(14, 0)
+++
+++#define MTK_PPE_BIND_AGE1			0x240
+++#define MTK_PPE_BIND_AGE1_DELTA_TCP_FIN		GENMASK(30, 16)
+++#define MTK_PPE_BIND_AGE1_DELTA_TCP		GENMASK(14, 0)
+++
+++#define MTK_PPE_HASH_SEED			0x244
+++
+++#define MTK_PPE_DEFAULT_CPU_PORT		0x248
+++#define MTK_PPE_DEFAULT_CPU_PORT_MASK(_n)	(GENMASK(2, 0) << ((_n) * 4))
+++
+++#define MTK_PPE_MTU_DROP			0x308
+++
+++#define MTK_PPE_VLAN_MTU0			0x30c
+++#define MTK_PPE_VLAN_MTU0_NONE			GENMASK(13, 0)
+++#define MTK_PPE_VLAN_MTU0_1TAG			GENMASK(29, 16)
+++
+++#define MTK_PPE_VLAN_MTU1			0x310
+++#define MTK_PPE_VLAN_MTU1_2TAG			GENMASK(13, 0)
+++#define MTK_PPE_VLAN_MTU1_3TAG			GENMASK(29, 16)
+++
+++#define MTK_PPE_VPM_TPID			0x318
+++
+++#define MTK_PPE_CACHE_CTL			0x320
+++#define MTK_PPE_CACHE_CTL_EN			BIT(0)
+++#define MTK_PPE_CACHE_CTL_LOCK_CLR		BIT(4)
+++#define MTK_PPE_CACHE_CTL_REQ			BIT(8)
+++#define MTK_PPE_CACHE_CTL_CLEAR			BIT(9)
+++#define MTK_PPE_CACHE_CTL_CMD			GENMASK(13, 12)
+++
+++#define MTK_PPE_MIB_CFG				0x334
+++#define MTK_PPE_MIB_CFG_EN			BIT(0)
+++#define MTK_PPE_MIB_CFG_RD_CLR			BIT(1)
+++
+++#define MTK_PPE_MIB_TB_BASE			0x338
+++
+++#define MTK_PPE_MIB_CACHE_CTL			0x350
+++#define MTK_PPE_MIB_CACHE_CTL_EN		BIT(0)
+++#define MTK_PPE_MIB_CACHE_CTL_FLUSH		BIT(2)
+++
+++#endif
+diff --git a/target/linux/generic/pending-5.4/770-16-net-ethernet-mediatek-mtk_eth_soc-add-flow-offloadin.patch b/target/linux/generic/pending-5.4/770-16-net-ethernet-mediatek-mtk_eth_soc-add-flow-offloadin.patch
+new file mode 100644
+index 0000000000..b0f06f603b
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/770-16-net-ethernet-mediatek-mtk_eth_soc-add-flow-offloadin.patch
+@@ -0,0 +1,401 @@
++From: Felix Fietkau <nbd@nbd.name>
++Date: Sun, 11 Oct 2020 22:28:32 +0200
++Subject: [PATCH] net: ethernet: mediatek: mtk_eth_soc: add flow offloading
++ support
++
++Only supports IPv4 for now
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ create mode 100644 drivers/net/ethernet/mediatek/mtk_offload.c
++ create mode 100644 drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c
++
++--- a/drivers/net/ethernet/mediatek/Makefile
+++++ b/drivers/net/ethernet/mediatek/Makefile
++@@ -4,4 +4,4 @@
++ #
++ 
++ obj-$(CONFIG_NET_MEDIATEK_SOC)                 += mtk_eth.o
++-mtk_eth-y := mtk_eth_soc.o mtk_sgmii.o mtk_eth_path.o mtk_ppe.o
+++mtk_eth-y := mtk_eth_soc.o mtk_sgmii.o mtk_eth_path.o mtk_ppe.o mtk_ppe_debugfs.o mtk_offload.o
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++@@ -20,6 +20,8 @@
++ #include <linux/pinctrl/devinfo.h>
++ #include <linux/phylink.h>
++ #include <linux/jhash.h>
+++#include <linux/netfilter.h>
+++#include <net/netfilter/nf_flow_table.h>
++ #include <net/dsa.h>
++ 
++ #include "mtk_eth_soc.h"
++@@ -1348,8 +1350,12 @@ static int mtk_poll_rx(struct napi_struc
++ 		    (trxd.rxd2 & RX_DMA_VTAG))
++ 			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
++ 					       RX_DMA_VID(trxd.rxd3));
++-		skb_record_rx_queue(skb, 0);
++-		napi_gro_receive(napi, skb);
+++		if (mtk_offload_check_rx(eth, skb, trxd.rxd4) == 0) {
+++			skb_record_rx_queue(skb, 0);
+++			napi_gro_receive(napi, skb);
+++		} else {
+++			dev_kfree_skb(skb);
+++		}
++ 
++ skip_rx:
++ 		ring->data[idx] = new_data;
++@@ -2882,6 +2888,25 @@ static int mtk_set_rxnfc(struct net_devi
++ 	return ret;
++ }
++ 
+++static int
+++mtk_flow_offload(enum flow_offload_type type, struct flow_offload *flow,
+++		struct flow_offload_hw_path *src,
+++		struct flow_offload_hw_path *dest)
+++{
+++	struct mtk_mac *mac = netdev_priv(src->dev);
+++	struct mtk_eth *eth = mac->hw;
+++
+++	if (!eth->soc->offload_version)
+++		return -EINVAL;
+++
+++	if (src->dev->base_addr != dest->dev->base_addr)
+++		return -EINVAL;
+++
+++	mac = netdev_priv(src->dev);
+++
+++	return mtk_flow_offload_add(eth, type, flow, src, dest);
+++}
+++
++ static const struct ethtool_ops mtk_ethtool_ops = {
++ 	.get_link_ksettings	= mtk_get_link_ksettings,
++ 	.set_link_ksettings	= mtk_set_link_ksettings,
++@@ -2913,6 +2938,7 @@ static const struct net_device_ops mtk_n
++ #ifdef CONFIG_NET_POLL_CONTROLLER
++ 	.ndo_poll_controller	= mtk_poll_controller,
++ #endif
+++	.ndo_flow_offload       = mtk_flow_offload,
++ };
++ 
++ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
++@@ -3178,6 +3204,10 @@ static int mtk_probe(struct platform_dev
++ 				   eth->base + MTK_ETH_PPE_BASE, 2);
++ 		if (err)
++ 			goto err_free_dev;
+++
+++		err = mtk_flow_offload_init(eth);
+++		if (err)
+++			goto err_free_dev;
++ 	}
++ 
++ 	for (i = 0; i < MTK_MAX_DEVS; i++) {
++--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++@@ -949,6 +949,7 @@ struct mtk_eth {
++ 	int				ip_align;
++ 
++ 	struct mtk_ppe			ppe;
+++	struct flow_offload __rcu       **foe_flow_table;
++ };
++ 
++ /* struct mtk_mac -	the structure that holds the info about the MACs of the
++@@ -993,4 +994,12 @@ int mtk_gmac_sgmii_path_setup(struct mtk
++ int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id);
++ int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id);
++ 
+++int mtk_flow_offload_init(struct mtk_eth *eth);
+++int mtk_flow_offload_add(struct mtk_eth *eth,
+++			 enum flow_offload_type type,
+++			 struct flow_offload *flow,
+++			 struct flow_offload_hw_path *src,
+++			 struct flow_offload_hw_path *dest);
+++int mtk_offload_check_rx(struct mtk_eth *eth, struct sk_buff *skb, u32 rxd4);
+++
++ #endif /* MTK_ETH_H */
++--- /dev/null
+++++ b/drivers/net/ethernet/mediatek/mtk_offload.c
++@@ -0,0 +1,146 @@
+++/*   This program is free software; you can redistribute it and/or modify
+++ *   it under the terms of the GNU General Public License as published by
+++ *   the Free Software Foundation; version 2 of the License
+++ *
+++ *   This program is distributed in the hope that it will be useful,
+++ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+++ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+++ *   GNU General Public License for more details.
+++ *
+++ *   Copyright (C) 2018 John Crispin <john@phrozen.org>
+++ */
+++
+++#include <net/netfilter/nf_flow_table.h>
+++#include "mtk_eth_soc.h"
+++
+++static int
+++mtk_offload_prepare_v4(struct mtk_eth *eth, struct mtk_foe_entry *entry,
+++		       struct flow_offload_tuple *s_tuple,
+++		       struct flow_offload_tuple *d_tuple,
+++		       struct flow_offload_hw_path *src,
+++		       struct flow_offload_hw_path *dest)
+++{
+++	int dest_port = 1;
+++
+++	if (dest->dev == eth->netdev[1])
+++	    dest_port = 2;
+++
+++	mtk_foe_entry_prepare(entry, MTK_PPE_PKT_TYPE_IPV4_HNAPT, s_tuple->l4proto,
+++			      dest_port, dest->eth_src, dest->eth_dest);
+++	mtk_foe_entry_set_ipv4_tuple(entry, false,
+++				     s_tuple->src_v4.s_addr, s_tuple->src_port,
+++				     s_tuple->dst_v4.s_addr, s_tuple->dst_port);
+++	mtk_foe_entry_set_ipv4_tuple(entry, true,
+++				     d_tuple->dst_v4.s_addr, d_tuple->dst_port,
+++				     d_tuple->src_v4.s_addr, d_tuple->src_port);
+++
+++	if (dest->flags & FLOW_OFFLOAD_PATH_PPPOE)
+++		mtk_foe_entry_set_pppoe(entry, dest->pppoe_sid);
+++
+++	if (dest->flags & FLOW_OFFLOAD_PATH_VLAN)
+++		mtk_foe_entry_set_vlan(entry, dest->vlan_id);
+++
+++	if (dest->flags & FLOW_OFFLOAD_PATH_DSA)
+++		mtk_foe_entry_set_dsa(entry, dest->dsa_port);
+++
+++	return 0;
+++}
+++
+++int mtk_flow_offload_add(struct mtk_eth *eth,
+++			 enum flow_offload_type type,
+++			 struct flow_offload *flow,
+++			 struct flow_offload_hw_path *src,
+++			 struct flow_offload_hw_path *dest)
+++{
+++	struct flow_offload_tuple *otuple = &flow->tuplehash[FLOW_OFFLOAD_DIR_ORIGINAL].tuple;
+++	struct flow_offload_tuple *rtuple = &flow->tuplehash[FLOW_OFFLOAD_DIR_REPLY].tuple;
+++	struct mtk_foe_entry orig, reply;
+++	u32 ohash, rhash, timestamp;
+++
+++	if (otuple->l4proto != IPPROTO_TCP && otuple->l4proto != IPPROTO_UDP)
+++		return -EINVAL;
+++
+++	if (type == FLOW_OFFLOAD_DEL) {
+++		ohash = (unsigned long)flow->priv;
+++		rhash = ohash >> 16;
+++		ohash &= 0xffff;
+++		mtk_foe_entry_clear(&eth->ppe, ohash);
+++		mtk_foe_entry_clear(&eth->ppe, rhash);
+++		rcu_assign_pointer(eth->foe_flow_table[ohash], NULL);
+++		rcu_assign_pointer(eth->foe_flow_table[rhash], NULL);
+++		synchronize_rcu();
+++
+++		return 0;
+++	}
+++
+++	switch (otuple->l3proto) {
+++	case AF_INET:
+++		if (mtk_offload_prepare_v4(eth, &orig, otuple, rtuple, src, dest) ||
+++		    mtk_offload_prepare_v4(eth, &reply, rtuple, otuple, dest, src))
+++			return -EINVAL;
+++		break;
+++	default:
+++		return -EINVAL;
+++	}
+++
+++	timestamp = mtk_r32(eth, 0x0010);
+++
+++	ohash = mtk_foe_entry_commit(&eth->ppe, &orig, timestamp);
+++	if (ohash < 0)
+++		return -EINVAL;
+++
+++	rhash = mtk_foe_entry_commit(&eth->ppe, &reply, timestamp);
+++	if (rhash < 0) {
+++		mtk_foe_entry_clear(&eth->ppe, ohash);
+++		return -EINVAL;
+++	}
+++
+++	rcu_assign_pointer(eth->foe_flow_table[ohash], flow);
+++	rcu_assign_pointer(eth->foe_flow_table[rhash], flow);
+++
+++	ohash |= rhash << 16;
+++	flow->priv = (void *)(unsigned long)ohash;
+++
+++	return 0;
+++}
+++
+++static void mtk_offload_keepalive(struct mtk_eth *eth, unsigned int hash)
+++{
+++	struct flow_offload *flow;
+++
+++	rcu_read_lock();
+++	flow = rcu_dereference(eth->foe_flow_table[hash]);
+++	if (flow)
+++		flow->timeout = jiffies + 30 * HZ;
+++	rcu_read_unlock();
+++}
+++
+++int mtk_offload_check_rx(struct mtk_eth *eth, struct sk_buff *skb, u32 rxd4)
+++{
+++	unsigned int hash;
+++
+++	switch (FIELD_GET(MTK_RXD4_PPE_CPU_REASON, rxd4)) {
+++	case MTK_PPE_CPU_REASON_KEEPALIVE_UC_OLD_HDR:
+++	case MTK_PPE_CPU_REASON_KEEPALIVE_MC_NEW_HDR:
+++	case MTK_PPE_CPU_REASON_KEEPALIVE_DUP_OLD_HDR:
+++		hash = FIELD_GET(MTK_RXD4_FOE_ENTRY, rxd4);
+++		mtk_offload_keepalive(eth, hash);
+++		return -1;
+++	case MTK_PPE_CPU_REASON_PACKET_SAMPLING:
+++		return -1;
+++	default:
+++		return 0;
+++	}
+++}
+++
+++int mtk_flow_offload_init(struct mtk_eth *eth)
+++{
+++	eth->foe_flow_table = devm_kcalloc(eth->dev, MTK_PPE_ENTRIES,
+++					   sizeof(*eth->foe_flow_table),
+++					   GFP_KERNEL);
+++
+++	if (!eth->foe_flow_table)
+++		return -ENOMEM;
+++
+++	return 0;
+++}
++--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
+++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
++@@ -375,6 +375,8 @@ int mtk_ppe_init(struct mtk_ppe *ppe, st
++ 
++ 	ppe->foe_table = foe;
++ 
+++	mtk_ppe_debugfs_init(ppe);
+++
++ 	return 0;
++ }
++ 
++--- a/drivers/net/ethernet/mediatek/mtk_ppe.h
+++++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
++@@ -271,4 +271,7 @@ int mtk_foe_entry_set_pppoe(struct mtk_f
++ int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_foe_entry *entry,
++ 			 u16 timestamp);
++ 
+++/* internal */
+++int mtk_ppe_debugfs_init(struct mtk_ppe *ppe);
+++
++ #endif
++--- /dev/null
+++++ b/drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c
++@@ -0,0 +1,114 @@
+++/*   This program is free software; you can redistribute it and/or modify
+++ *   it under the terms of the GNU General Public License as published by
+++ *   the Free Software Foundation; version 2 of the License
+++ *
+++ *   This program is distributed in the hope that it will be useful,
+++ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+++ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+++ *   GNU General Public License for more details.
+++ *
+++ *   Copyright (C) 2014-2016 Sean Wang <sean.wang@mediatek.com>
+++ *   Copyright (C) 2016-2017 John Crispin <blogic@openwrt.org>
+++ *   Copyright (C) 2020 Felix Fietkau <nbd@nbd.name>
+++ */
+++
+++#include <linux/kernel.h>
+++#include <linux/debugfs.h>
+++#include "mtk_eth_soc.h"
+++
+++static const char *mtk_foe_entry_state_str[] = {
+++	"INVALID",
+++	"UNBIND",
+++	"BIND",
+++	"FIN"
+++};
+++
+++static const char *mtk_foe_packet_type_str[] = {
+++	"IPV4_HNAPT",
+++	"IPV4_HNAT",
+++	"IPV6_1T_ROUTE",
+++	"IPV4_DSLITE",
+++	"IPV6_3T_ROUTE",
+++	"IPV6_5T_ROUTE",
+++	"IPV6_6RD",
+++};
+++
+++#define es(entry)		(mtk_foe_entry_state_str[FIELD_GET(MTK_FOE_IB1_STATE, entry->ib1)])
+++//#define ei(entry, end)		(MTK_PPE_TBL_SZ - (int)(end - entry))
+++#define pt(entry)		(mtk_foe_packet_type_str[FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1)])
+++
+++static int mtk_ppe_debugfs_foe_show(struct seq_file *m, void *private)
+++{
+++	struct mtk_ppe *ppe = m->private;
+++	int i, count;
+++
+++	for (i = 0, count = 0; i < MTK_PPE_ENTRIES; i++) {
+++		struct mtk_foe_entry *entry = &ppe->foe_table[i];
+++
+++		if (!FIELD_GET(MTK_FOE_IB1_STATE, entry->ib1))
+++			continue;
+++
+++		if (FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1) ==
+++		    MTK_PPE_PKT_TYPE_IPV4_HNAPT) {
+++			struct mtk_foe_ipv4 *ip4 = &entry->ipv4;
+++			struct mtk_foe_mac_info *l2 = &ip4->l2;
+++
+++			__be32 saddr = htonl(ip4->orig.src_ip);
+++			__be32 daddr = htonl(ip4->orig.dest_ip);
+++			__be32 nsaddr = htonl(ip4->new.src_ip);
+++			__be32 ndaddr = htonl(ip4->new.dest_ip);
+++			unsigned char h_dest[ETH_ALEN];
+++			unsigned char h_source[ETH_ALEN];
+++
+++			*((__be32 *) h_source) = htonl(l2->src_mac_hi);
+++			*((__be16*) &h_source[4]) = htons(l2->src_mac_lo);
+++			*((__be32*) h_dest) = htonl(l2->dest_mac_hi);
+++			*((__be16*) &h_dest[4]) = htons(l2->dest_mac_lo);
+++			seq_printf(m,
+++				   "(%x)0x%05x|state=%s|type=%s|"
+++				   "%pI4:%d->%pI4:%d=>%pI4:%d->%pI4:%d|%pM=>%pM|"
+++				   "etype=0x%04x|info1=0x%x|info2=0x%x|"
+++				   "vlan1=%d|vlan2=%d\n",
+++				   count, i, es(entry), pt(entry),
+++				   &saddr, ip4->orig.src_port,
+++				   &daddr, ip4->orig.dest_port,
+++				   &nsaddr, ip4->new.src_port,
+++				   &ndaddr, ip4->new.dest_port,
+++				   h_source, h_dest,
+++				   ntohs(l2->etype),
+++				   entry->ib1,
+++				   ip4->ib2,
+++				   l2->vlan1,
+++				   l2->vlan2);
+++			count++;
+++		} else
+++			seq_printf(m, "0x%05x state=%s\n", count, es(entry));
+++	}
+++
+++	return 0;
+++}
+++
+++static int mtk_ppe_debugfs_foe_open(struct inode *inode, struct file *file)
+++{
+++	return single_open(file, mtk_ppe_debugfs_foe_show, inode->i_private);
+++}
+++
+++static const struct file_operations mtk_ppe_debugfs_foe_fops = {
+++	.open = mtk_ppe_debugfs_foe_open,
+++	.read = seq_read,
+++	.llseek = seq_lseek,
+++	.release = single_release,
+++};
+++
+++int mtk_ppe_debugfs_init(struct mtk_ppe *ppe)
+++{
+++	struct dentry *root;
+++
+++	root = debugfs_create_dir("mtk_ppe", NULL);
+++	if (!root)
+++		return -ENOMEM;
+++
+++	debugfs_create_file("entries", S_IRUGO, root, ppe, &mtk_ppe_debugfs_foe_fops);
+++
+++	return 0;
+++}
+diff --git a/target/linux/generic/pending-5.4/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch b/target/linux/generic/pending-5.4/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch
+new file mode 100644
+index 0000000000..511a9f7555
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch
+@@ -0,0 +1,64 @@
++From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
++Subject: [PATCH] bcma: get SoC device struct & copy its DMA params to the
++ subdevices
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++For bus devices to be fully usable it's required to set their DMA
++parameters.
++
++For years it has been missing and remained unnoticed because of
++mips_dma_alloc_coherent() silently handling the empty coherent_dma_mask.
++Kernel 4.19 came with a lot of DMA changes and caused a regression on
++the bcm47xx. Starting with the commit f8c55dc6e828 ("MIPS: use generic
++dma noncoherent ops for simple noncoherent platforms") DMA coherent
++allocations just fail. Example:
++[    1.114914] bgmac_bcma bcma0:2: Allocation of TX ring 0x200 failed
++[    1.121215] bgmac_bcma bcma0:2: Unable to alloc memory for DMA
++[    1.127626] bgmac_bcma: probe of bcma0:2 failed with error -12
++[    1.133838] bgmac_bcma: Broadcom 47xx GBit MAC driver loaded
++
++This change fixes above regression in addition to the MIPS bcm47xx
++commit 321c46b91550 ("MIPS: BCM47XX: Setup struct device for the SoC").
++
++It also fixes another *old* GPIO regression caused by a parent pointing
++to the NULL:
++[    0.157054] missing gpiochip .dev parent pointer
++[    0.157287] bcma: bus0: Error registering GPIO driver: -22
++introduced by the commit 74f4e0cc6108 ("bcma: switch GPIO portions to
++use GPIOLIB_IRQCHIP").
++
++Fixes: f8c55dc6e828 ("MIPS: use generic dma noncoherent ops for simple noncoherent platforms")
++Fixes: 74f4e0cc6108 ("bcma: switch GPIO portions to use GPIOLIB_IRQCHIP")
++Cc: linux-mips@linux-mips.org
++Cc: Christoph Hellwig <hch@lst.de>
++Cc: Linus Walleij <linus.walleij@linaro.org>
++Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
++---
++
++--- a/drivers/bcma/host_soc.c
+++++ b/drivers/bcma/host_soc.c
++@@ -191,6 +191,8 @@ int __init bcma_host_soc_init(struct bcm
++ 	struct bcma_bus *bus = &soc->bus;
++ 	int err;
++ 
+++	bus->dev = soc->dev;
+++
++ 	/* Scan bus and initialize it */
++ 	err = bcma_bus_early_register(bus);
++ 	if (err)
++--- a/drivers/bcma/main.c
+++++ b/drivers/bcma/main.c
++@@ -241,8 +241,10 @@ void bcma_prepare_core(struct bcma_bus *
++ 	core->dev.bus = &bcma_bus_type;
++ 	dev_set_name(&core->dev, "bcma%d:%d", bus->num, core->core_index);
++ 	core->dev.parent = bus->dev;
++-	if (bus->dev)
+++	if (bus->dev) {
++ 		bcma_of_fill_device(bus->dev, core);
+++		dma_coerce_mask_and_coherent(&core->dev, bus->dev->coherent_dma_mask);
+++	}
++ 
++ 	switch (bus->hosttype) {
++ 	case BCMA_HOSTTYPE_PCI:
+diff --git a/target/linux/generic/pending-5.4/810-pci_disable_common_quirks.patch b/target/linux/generic/pending-5.4/810-pci_disable_common_quirks.patch
+new file mode 100644
+index 0000000000..5aea055b72
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/810-pci_disable_common_quirks.patch
+@@ -0,0 +1,62 @@
++From: Gabor Juhos <juhosg@openwrt.org>
++Subject: debloat: add kernel config option to disabling common PCI quirks
++
++Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
++---
++ drivers/pci/Kconfig  | 6 ++++++
++ drivers/pci/quirks.c | 6 ++++++
++ 2 files changed, 12 insertions(+)
++
++--- a/drivers/pci/Kconfig
+++++ b/drivers/pci/Kconfig
++@@ -115,6 +115,13 @@ config XEN_PCIDEV_FRONTEND
++           The PCI device frontend driver allows the kernel to import arbitrary
++           PCI devices from a PCI backend to support PCI driver domains.
++ 
+++config PCI_DISABLE_COMMON_QUIRKS
+++	bool "PCI disable common quirks"
+++	depends on PCI
+++	help
+++	  If you don't know what to do here, say N.
+++
+++
++ config PCI_ATS
++ 	bool
++ 
++--- a/drivers/pci/quirks.c
+++++ b/drivers/pci/quirks.c
++@@ -206,6 +206,7 @@ static void quirk_mmio_always_on(struct
++ DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID,
++ 				PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on);
++ 
+++#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
++ /*
++  * The Mellanox Tavor device gives false positive parity errors.  Mark this
++  * device with a broken_parity_status to allow PCI scanning code to "skip"
++@@ -3323,6 +3324,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
++ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
++ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
++ 
+++#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
+++
++ /*
++  * Ivytown NTB BAR sizes are misreported by the hardware due to an erratum.
++  * To work around this, query the size it should be configured to by the
++@@ -3348,6 +3351,8 @@ static void quirk_intel_ntb(struct pci_d
++ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb);
++ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb);
++ 
+++#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
+++
++ /*
++  * Some BIOS implementations leave the Intel GPU interrupts enabled, even
++  * though no one is handling them (e.g., if the i915 driver is never
++@@ -3386,6 +3391,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
++ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
++ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);
++ 
+++#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
+++
++ /*
++  * PCI devices which are on Intel chips can skip the 10ms delay
++  * before entering D3 mode.
+diff --git a/target/linux/generic/pending-5.4/811-pci_disable_usb_common_quirks.patch b/target/linux/generic/pending-5.4/811-pci_disable_usb_common_quirks.patch
+new file mode 100644
+index 0000000000..6e4584c8a1
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/811-pci_disable_usb_common_quirks.patch
+@@ -0,0 +1,115 @@
++From: Felix Fietkau <nbd@nbd.name>
++Subject: debloat: disable common USB quirks
++
++Signed-off-by: Felix Fietkau <nbd@nbd.name>
++---
++ drivers/usb/host/pci-quirks.c | 16 ++++++++++++++++
++ drivers/usb/host/pci-quirks.h | 18 +++++++++++++++++-
++ include/linux/usb/hcd.h       |  7 +++++++
++ 3 files changed, 40 insertions(+), 1 deletion(-)
++
++--- a/drivers/usb/host/pci-quirks.c
+++++ b/drivers/usb/host/pci-quirks.c
++@@ -125,6 +125,8 @@ struct amd_chipset_type {
++ 	u8 rev;
++ };
++ 
+++#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
+++
++ static struct amd_chipset_info {
++ 	struct pci_dev	*nb_dev;
++ 	struct pci_dev	*smbus_dev;
++@@ -630,6 +632,10 @@ bool usb_amd_pt_check_port(struct device
++ }
++ EXPORT_SYMBOL_GPL(usb_amd_pt_check_port);
++ 
+++#endif /* CONFIG_PCI_DISABLE_COMMON_QUIRKS */
+++
+++#if IS_ENABLED(CONFIG_USB_UHCI_HCD)
+++
++ /*
++  * Make sure the controller is completely inactive, unable to
++  * generate interrupts or do DMA.
++@@ -709,8 +715,17 @@ reset_needed:
++ 	uhci_reset_hc(pdev, base);
++ 	return 1;
++ }
+++#else
+++int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base)
+++{
+++	return 0;
+++}
+++
+++#endif
++ EXPORT_SYMBOL_GPL(uhci_check_and_reset_hc);
++ 
+++#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
+++
++ static inline int io_type_enabled(struct pci_dev *pdev, unsigned int mask)
++ {
++ 	u16 cmd;
++@@ -1271,3 +1286,4 @@ static void quirk_usb_early_handoff(stru
++ }
++ DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,
++ 			PCI_CLASS_SERIAL_USB, 8, quirk_usb_early_handoff);
+++#endif
++--- a/drivers/usb/host/pci-quirks.h
+++++ b/drivers/usb/host/pci-quirks.h
++@@ -5,6 +5,9 @@
++ #ifdef CONFIG_USB_PCI
++ void uhci_reset_hc(struct pci_dev *pdev, unsigned long base);
++ int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base);
+++#endif  /* CONFIG_USB_PCI */
+++
+++#if defined(CONFIG_USB_PCI) && !defined(CONFIG_PCI_DISABLE_COMMON_QUIRKS)
++ int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *pdev);
++ bool usb_amd_hang_symptom_quirk(void);
++ bool usb_amd_prefetch_quirk(void);
++@@ -19,6 +22,18 @@ void sb800_prefetch(struct device *dev,
++ bool usb_amd_pt_check_port(struct device *device, int port);
++ #else
++ struct pci_dev;
+++static inline int usb_amd_quirk_pll_check(void)
+++{
+++	return 0;
+++}
+++static inline bool usb_amd_hang_symptom_quirk(void)
+++{
+++	return false;
+++}
+++static inline bool usb_amd_prefetch_quirk(void)
+++{
+++	return false;
+++}
++ static inline void usb_amd_quirk_pll_disable(void) {}
++ static inline void usb_amd_quirk_pll_enable(void) {}
++ static inline void usb_asmedia_modifyflowcontrol(struct pci_dev *pdev) {}
++@@ -29,6 +44,11 @@ static inline bool usb_amd_pt_check_port
++ {
++ 	return false;
++ }
+++static inline void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev) {}
+++static inline bool usb_xhci_needs_pci_reset(struct pci_dev *pdev)
+++{
+++	return false;
+++}
++ #endif  /* CONFIG_USB_PCI */
++ 
++ #endif  /*  __LINUX_USB_PCI_QUIRKS_H  */
++--- a/include/linux/usb/hcd.h
+++++ b/include/linux/usb/hcd.h
++@@ -483,7 +483,14 @@ extern int usb_hcd_pci_probe(struct pci_
++ extern void usb_hcd_pci_remove(struct pci_dev *dev);
++ extern void usb_hcd_pci_shutdown(struct pci_dev *dev);
++ 
+++#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
++ extern int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *dev);
+++#else
+++static inline int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *dev)
+++{
+++	return 0;
+++}
+++#endif
++ 
++ #ifdef CONFIG_PM
++ extern const struct dev_pm_ops usb_hcd_pci_pm_ops;
+diff --git a/target/linux/generic/pending-5.4/820-libata-Assign-OF-node-to-the-SCSI-device.patch b/target/linux/generic/pending-5.4/820-libata-Assign-OF-node-to-the-SCSI-device.patch
+new file mode 100644
+index 0000000000..bec9363fa1
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/820-libata-Assign-OF-node-to-the-SCSI-device.patch
+@@ -0,0 +1,86 @@
++From 43a93893eb33e996836b99fb3e1f7300c0132a51 Mon Sep 17 00:00:00 2001
++From: Linus Walleij <linus.walleij@linaro.org>
++Date: Tue, 31 Dec 2019 18:15:33 +0100
++Subject: [PATCH 5/7] libata: Assign OF node to the SCSI device
++
++When we spawn a SCSI device from an ATA device in libata-scsi
++the SCSI device had no relation to the device tree.
++
++The DT binding allows us to define port nodes under a
++PATA (IDE) or SATA host controller, so we can have proper device
++nodes for these devices.
++
++If OF is enabled, walk the children of the host controller node
++to see if there is a valid device tree node to assign. The reg
++is used to match to ID 0 for the master device and ID 1 for the
++slave device.
++
++The corresponding device tree bindings have been accepted by
++the device tree maintainers.
++
++Cc: Chris Healy <cphealy@gmail.com>
++Cc: Martin K. Petersen <martin.petersen@oracle.com>
++Cc: Bart Van Assche <bvanassche@acm.org>
++Cc: Guenter Roeck <linux@roeck-us.net>
++Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
++---
++ChangeLog v1->v2:
++- Use dev_dbg() for the debug print
++- return immediately after finding a matching OF node
++---
++ drivers/ata/libata-scsi.c | 30 ++++++++++++++++++++++++++++++
++ 1 file changed, 30 insertions(+)
++
++--- a/drivers/ata/libata-scsi.c
+++++ b/drivers/ata/libata-scsi.c
++@@ -35,6 +35,7 @@
++ #include <linux/suspend.h>
++ #include <asm/unaligned.h>
++ #include <linux/ioprio.h>
+++#include <linux/of.h>
++ 
++ #include "libata.h"
++ #include "libata-transport.h"
++@@ -4579,6 +4580,34 @@ int ata_scsi_add_hosts(struct ata_host *
++ 	return rc;
++ }
++ 
+++#ifdef CONFIG_OF
+++static void ata_scsi_assign_ofnode(struct ata_device *dev, struct ata_port *ap)
+++{
+++	struct scsi_device *sdev = dev->sdev;
+++	struct device *d = ap->host->dev;
+++	struct device_node *np = d->of_node;
+++	struct device_node *child;
+++
+++	for_each_available_child_of_node(np, child) {
+++		int ret;
+++		u32 val;
+++
+++		ret = of_property_read_u32(child, "reg", &val);
+++		if (ret)
+++			continue;
+++		if (val == dev->devno) {
+++			dev_dbg(d, "found matching device node\n");
+++			sdev->sdev_gendev.of_node = child;
+++			return;
+++		}
+++	}
+++}
+++#else
+++static void ata_scsi_assign_ofnode(struct ata_device *dev, struct ata_port *ap)
+++{
+++}
+++#endif
+++
++ void ata_scsi_scan_host(struct ata_port *ap, int sync)
++ {
++ 	int tries = 5;
++@@ -4604,6 +4633,7 @@ void ata_scsi_scan_host(struct ata_port
++ 						 NULL);
++ 			if (!IS_ERR(sdev)) {
++ 				dev->sdev = sdev;
+++				ata_scsi_assign_ofnode(dev, ap);
++ 				scsi_device_put(sdev);
++ 			} else {
++ 				dev->sdev = NULL;
+diff --git a/target/linux/generic/pending-5.4/834-ledtrig-libata.patch b/target/linux/generic/pending-5.4/834-ledtrig-libata.patch
+new file mode 100644
+index 0000000000..f33ceec126
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/834-ledtrig-libata.patch
+@@ -0,0 +1,149 @@
++From: Daniel Golle <daniel@makrotopia.org>
++Subject: libata: add ledtrig support
++
++This adds a LED trigger for each ATA port indicating disk activity.
++
++As this is needed only on specific platforms (NAS SoCs and such),
++these platforms should define ARCH_WANTS_LIBATA_LEDS if there
++are boards with LED(s) intended to indicate ATA disk activity and
++need the OS to take care of that.
++In that way, if not selected, LED trigger support not will be
++included in libata-core and both, codepaths and structures remain
++untouched.
++
++Signed-off-by: Daniel Golle <daniel@makrotopia.org>
++---
++ drivers/ata/Kconfig       | 16 ++++++++++++++++
++ drivers/ata/libata-core.c | 41 +++++++++++++++++++++++++++++++++++++++++
++ include/linux/libata.h    |  9 +++++++++
++ 3 files changed, 66 insertions(+)
++
++--- a/drivers/ata/Kconfig
+++++ b/drivers/ata/Kconfig
++@@ -45,6 +45,22 @@ config ATA_VERBOSE_ERROR
++ 
++ 	  If unsure, say Y.
++ 
+++config ARCH_WANT_LIBATA_LEDS
+++	bool
+++
+++config ATA_LEDS
+++	bool "support ATA port LED triggers"
+++	depends on ARCH_WANT_LIBATA_LEDS
+++	select NEW_LEDS
+++	select LEDS_CLASS
+++	select LEDS_TRIGGERS
+++	default y
+++	help
+++	  This option adds a LED trigger for each registered ATA port.
+++	  It is used to drive disk activity leds connected via GPIO.
+++
+++	  If unsure, say N.
+++
++ config ATA_ACPI
++ 	bool "ATA ACPI Support"
++ 	depends on ACPI
++--- a/drivers/ata/libata-core.c
+++++ b/drivers/ata/libata-core.c
++@@ -714,6 +714,19 @@ u64 ata_tf_read_block(const struct ata_t
++ 	return block;
++ }
++ 
+++#ifdef CONFIG_ATA_LEDS
+++#define LIBATA_BLINK_DELAY 20 /* ms */
+++static inline void ata_led_act(struct ata_port *ap)
+++{
+++	unsigned long led_delay = LIBATA_BLINK_DELAY;
+++
+++	if (unlikely(!ap->ledtrig))
+++		return;
+++
+++	led_trigger_blink_oneshot(ap->ledtrig, &led_delay, &led_delay, 0);
+++}
+++#endif
+++
++ /**
++  *	ata_build_rw_tf - Build ATA taskfile for given read/write request
++  *	@tf: Target ATA taskfile
++@@ -5149,6 +5162,9 @@ struct ata_queued_cmd *ata_qc_new_init(s
++ 		if (tag < 0)
++ 			return NULL;
++ 	}
+++#ifdef CONFIG_ATA_LEDS
+++	ata_led_act(ap);
+++#endif
++ 
++ 	qc = __ata_qc_from_tag(ap, tag);
++ 	qc->tag = qc->hw_tag = tag;
++@@ -6085,6 +6101,9 @@ struct ata_port *ata_port_alloc(struct a
++ 	ap->stats.unhandled_irq = 1;
++ 	ap->stats.idle_irq = 1;
++ #endif
+++#ifdef CONFIG_ATA_LEDS
+++	ap->ledtrig = kzalloc(sizeof(struct led_trigger), GFP_KERNEL);
+++#endif
++ 	ata_sff_port_init(ap);
++ 
++ 	return ap;
++@@ -6120,6 +6139,12 @@ static void ata_host_release(struct kref
++ 
++ 		kfree(ap->pmp_link);
++ 		kfree(ap->slave_link);
+++#ifdef CONFIG_ATA_LEDS
+++		if (ap->ledtrig) {
+++			led_trigger_unregister(ap->ledtrig);
+++			kfree(ap->ledtrig);
+++		};
+++#endif
++ 		kfree(ap);
++ 		host->ports[i] = NULL;
++ 	}
++@@ -6583,7 +6608,23 @@ int ata_host_register(struct ata_host *h
++ 		host->ports[i]->print_id = atomic_inc_return(&ata_print_id);
++ 		host->ports[i]->local_port_no = i + 1;
++ 	}
+++#ifdef CONFIG_ATA_LEDS
+++	for (i = 0; i < host->n_ports; i++) {
+++		if (unlikely(!host->ports[i]->ledtrig))
+++			continue;
++ 
+++		snprintf(host->ports[i]->ledtrig_name,
+++			sizeof(host->ports[i]->ledtrig_name), "ata%u",
+++			host->ports[i]->print_id);
+++
+++		host->ports[i]->ledtrig->name = host->ports[i]->ledtrig_name;
+++
+++		if (led_trigger_register(host->ports[i]->ledtrig)) {
+++			kfree(host->ports[i]->ledtrig);
+++			host->ports[i]->ledtrig = NULL;
+++		}
+++	}
+++#endif
++ 	/* Create associated sysfs transport objects  */
++ 	for (i = 0; i < host->n_ports; i++) {
++ 		rc = ata_tport_add(host->dev,host->ports[i]);
++--- a/include/linux/libata.h
+++++ b/include/linux/libata.h
++@@ -23,6 +23,9 @@
++ #include <linux/cdrom.h>
++ #include <linux/sched.h>
++ #include <linux/async.h>
+++#ifdef CONFIG_ATA_LEDS
+++#include <linux/leds.h>
+++#endif
++ 
++ /*
++  * Define if arch has non-standard setup.  This is a _PCI_ standard
++@@ -882,6 +885,12 @@ struct ata_port {
++ #ifdef CONFIG_ATA_ACPI
++ 	struct ata_acpi_gtm	__acpi_init_gtm; /* use ata_acpi_init_gtm() */
++ #endif
+++
+++#ifdef CONFIG_ATA_LEDS
+++	struct led_trigger	*ledtrig;
+++	char			ledtrig_name[8];
+++#endif
+++
++ 	/* owned by EH */
++ 	u8			sector_buf[ATA_SECT_SIZE] ____cacheline_aligned;
++ };
+diff --git a/target/linux/generic/pending-5.4/840-hwrng-bcm2835-set-quality-to-1000.patch b/target/linux/generic/pending-5.4/840-hwrng-bcm2835-set-quality-to-1000.patch
+new file mode 100644
+index 0000000000..247c6d8364
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/840-hwrng-bcm2835-set-quality-to-1000.patch
+@@ -0,0 +1,26 @@
++From d6988cf1d16faac56899918bb2b1be8d85155e3f Mon Sep 17 00:00:00 2001
++From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
++Date: Sat, 20 Feb 2021 18:36:38 +0100
++Subject: [PATCH] hwrng: bcm2835: set quality to 1000
++MIME-Version: 1.0
++Content-Type: text/plain; charset=UTF-8
++Content-Transfer-Encoding: 8bit
++
++This allows devices without a high precission timer to reduce boot from >100s
++to <30s.
++
++Signed-off-by: �lvaro Fernández Rojas <noltari@gmail.com>
++---
++ drivers/char/hw_random/bcm2835-rng.c | 1 +
++ 1 file changed, 1 insertion(+)
++
++--- a/drivers/char/hw_random/bcm2835-rng.c
+++++ b/drivers/char/hw_random/bcm2835-rng.c
++@@ -167,6 +167,7 @@ static int bcm2835_rng_probe(struct plat
++ 	priv->rng.init = bcm2835_rng_init;
++ 	priv->rng.read = bcm2835_rng_read;
++ 	priv->rng.cleanup = bcm2835_rng_cleanup;
+++	priv->rng.quality = 1000;
++ 
++ 	if (dev_of_node(dev)) {
++ 		rng_id = of_match_node(bcm2835_rng_of_match, np);
+diff --git a/target/linux/generic/pending-5.4/920-mangle_bootargs.patch b/target/linux/generic/pending-5.4/920-mangle_bootargs.patch
+new file mode 100644
+index 0000000000..83db92609b
+--- /dev/null
++++ b/target/linux/generic/pending-5.4/920-mangle_bootargs.patch
+@@ -0,0 +1,71 @@
++From: Imre Kaloz <kaloz@openwrt.org>
++Subject: init: add CONFIG_MANGLE_BOOTARGS and disable it by default
++
++Enabling this option renames the bootloader supplied root=
++and rootfstype= variables, which might have to be know but
++would break the automatisms OpenWrt uses.
++
++Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
++---
++ init/Kconfig |  9 +++++++++
++ init/main.c  | 24 ++++++++++++++++++++++++
++ 2 files changed, 33 insertions(+)
++
++--- a/init/Kconfig
+++++ b/init/Kconfig
++@@ -1665,6 +1665,15 @@ config EMBEDDED
++ 	  an embedded system so certain expert options are available
++ 	  for configuration.
++ 
+++config MANGLE_BOOTARGS
+++	bool "Rename offending bootargs"
+++	depends on EXPERT
+++	help
+++	  Sometimes the bootloader passed bogus root= and rootfstype=
+++	  parameters to the kernel, and while you want to ignore them,
+++	  you need to know the values f.e. to support dual firmware
+++	  layouts on the flash.
+++
++ config HAVE_PERF_EVENTS
++ 	bool
++ 	help
++--- a/init/main.c
+++++ b/init/main.c
++@@ -367,6 +367,29 @@ static inline void setup_nr_cpu_ids(void
++ static inline void smp_prepare_cpus(unsigned int maxcpus) { }
++ #endif
++ 
+++#ifdef CONFIG_MANGLE_BOOTARGS
+++static void __init mangle_bootargs(char *command_line)
+++{
+++	char *rootdev;
+++	char *rootfs;
+++
+++	rootdev = strstr(command_line, "root=/dev/mtdblock");
+++
+++	if (rootdev)
+++		strncpy(rootdev, "mangled_rootblock=", 18);
+++
+++	rootfs = strstr(command_line, "rootfstype");
+++
+++	if (rootfs)
+++		strncpy(rootfs, "mangled_fs", 10);
+++
+++}
+++#else
+++static void __init mangle_bootargs(char *command_line)
+++{
+++}
+++#endif
+++
++ /*
++  * We need to store the untouched command line for future reference.
++  * We also need to store the touched command line since the parameter
++@@ -597,6 +620,7 @@ asmlinkage __visible void __init start_k
++ 	pr_notice("%s", linux_banner);
++ 	early_security_init();
++ 	setup_arch(&command_line);
+++	mangle_bootargs(command_line);
++ 	setup_command_line(command_line);
++ 	setup_nr_cpu_ids();
++ 	setup_per_cpu_areas();
+-- 
+2.34.1
+
diff --git a/patches/0058-kernel-add-v5.4-checksums.patch b/patches/0058-kernel-add-v5.4-checksums.patch
new file mode 100644
index 000000000..e2c534a73
--- /dev/null
+++ b/patches/0058-kernel-add-v5.4-checksums.patch
@@ -0,0 +1,31 @@
+From 1b0b999cc8165c0d97d72463bbfdb3568eaa3bca Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Mon, 4 Sep 2023 12:31:07 +0200
+Subject: [PATCH 58/58] kernel: add v5.4 checksums
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ include/kernel-5.4 | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/include/kernel-5.4 b/include/kernel-5.4
+index daf1f1740a..ec9733780d 100644
+--- a/include/kernel-5.4
++++ b/include/kernel-5.4
+@@ -1,2 +1,13 @@
+ LINUX_VERSION-5.4 = .164
+ LINUX_KERNEL_HASH-5.4.164 = a8fdb27e0e7a871086e0c78b899088c21fbc8e16fb236d220926dc4c93e0fb2d
++
++ifeq ($(CONFIG_TARGET_ipq40xx),y)
++LINUX_VERSION-5.4 = .158
++LINUX_KERNEL_HASH-5.4.158 = 6e018fecdc8fc24553756e582d83b82d65b10a6b03ef36262a24911f839b8d59
++endif
++
++ifeq ($(CONFIG_TARGET_ipq95xx),y)
++LINUX_VERSION-5.4 = .164
++LINUX_KERNEL_HASH-5.4.164 = 0b2987b4b838d169b49f33f01ffa1bb1940eda8f159632943a6db2a3f61db233
++endif
++
+-- 
+2.34.1
+
diff --git a/patches/ath79/0002-ath79-tl-wpa8630p-fixes.patch b/patches/ath79/0002-ath79-tl-wpa8630p-fixes.patch
deleted file mode 100644
index 2a7133c30..000000000
--- a/patches/ath79/0002-ath79-tl-wpa8630p-fixes.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 643d734b0d05bc9e5fe1b4588bf0876c9fd87bd4 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Wed, 30 Jun 2021 11:36:13 +0200
-Subject: [PATCH 26/43] ath79: tl-wpa8630p fixes
-
-* a certificates partition and change default port mapping
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- target/linux/ath79/dts/qca9563_tplink_tl-wpa8630p-v2.dtsi  | 7 ++++++-
- .../linux/ath79/generic/base-files/etc/board.d/02_network  | 2 +-
- 2 files changed, 7 insertions(+), 2 deletions(-)
-
-diff --git a/target/linux/ath79/dts/qca9563_tplink_tl-wpa8630p-v2.dtsi b/target/linux/ath79/dts/qca9563_tplink_tl-wpa8630p-v2.dtsi
-index 9e6d23de4e..c39dbc515b 100644
---- a/target/linux/ath79/dts/qca9563_tplink_tl-wpa8630p-v2.dtsi
-+++ b/target/linux/ath79/dts/qca9563_tplink_tl-wpa8630p-v2.dtsi
-@@ -24,7 +24,12 @@
- 	partition@40000 {
- 		compatible = "tplink,firmware";
- 		label = "firmware";
--		reg = <0x040000 0x5e0000>;
-+		reg = <0x040000 0x5d0000>;
-+	};
-+
-+	partition@610000 {
-+		label = "certificates";
-+		reg = <0x610000 0x10000>;
- 	};
- };
- 
-diff --git a/target/linux/ath79/generic/base-files/etc/board.d/02_network b/target/linux/ath79/generic/base-files/etc/board.d/02_network
-index 31c0f11861..3ba3d72abc 100755
---- a/target/linux/ath79/generic/base-files/etc/board.d/02_network
-+++ b/target/linux/ath79/generic/base-files/etc/board.d/02_network
-@@ -385,7 +385,7 @@ ath79_setup_interfaces()
- 	tplink,tl-wpa8630p-v2.1-eu)
- 		# port 5 (internal) is the power-line port
- 		ucidef_add_switch "switch0" \
--			"0@eth0" "2:lan:3" "3:lan:2" "4:lan:1" "5:lan:4"
-+			"0@eth0" "2:wan:3" "3:wan:2" "5:wan:4" "4:lan:1"
- 		;;
- 	tplink,tl-wr842n-v2)
- 		ucidef_set_interface_wan "eth1"
--- 
-2.25.1
-
diff --git a/patches/ath79/0003-ath79-add-support-for-TP-Link-CPE710-v1.patch b/patches/ath79/0003-ath79-add-support-for-TP-Link-CPE710-v1.patch
deleted file mode 100644
index 432816be4..000000000
--- a/patches/ath79/0003-ath79-add-support-for-TP-Link-CPE710-v1.patch
+++ /dev/null
@@ -1,303 +0,0 @@
-From 6ecffc2057aa1261846e51a3966b8710f605910a Mon Sep 17 00:00:00 2001
-From: Andrew Cameron <apcameron@softhome.net>
-Date: Mon, 12 Apr 2021 13:24:33 -0500
-Subject: [PATCH 27/43] ath79: add support for TP-Link CPE710-v1
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-TP-Link CPE710-v1 is an outdoor wireless CPE for 5 GHz with
-one Ethernet port based on the AP152 reference board
-
-Specifications:
-- SoC: QCA9563-AL3A MIPS 74kc @ 775MHz, AHB @ 258MHz
-- RAM: 128MiB DDR2 @ 650MHz
-- Flash: 16MiB SPI NOR Based on the GD25Q128
-- Wi-Fi 5Ghz: ath10k chip (802.11ac for up to 867Mbps on 5GHz wireless data rate) Based on the QCA9896
-- Ethernet: one 1GbE port
-- 23dBi high-gain directional 2×2 MIMO antenna and a dedicated metal reflector
-- Power, LAN, WLAN5G Blue LEDs
-- 3x Blue LEDs
-
-Flashing instructions:
-Flash factory image through stock firmware WEB UI or through TFTP
-To get to TFTP recovery just hold reset button while powering on for
-around 30-40 seconds and release.
-Rename factory image to recovery.bin
-Stock TFTP server IP:192.168.0.100
-Stock device TFTP adress:192.168.0.254
-
-Signed-off-by: Andrew Cameron <apcameron@softhome.net>
----
- .../ath79/dts/qca9563_tplink_cpe710-v1.dts    | 141 ++++++++++++++++++
- .../generic/base-files/etc/board.d/01_leds    |   3 +-
- .../generic/base-files/etc/board.d/02_network |   1 +
- .../etc/hotplug.d/firmware/11-ath10k-caldata  |   6 +
- target/linux/ath79/image/generic-tp-link.mk   |  11 ++
- tools/firmware-utils/src/tplink-safeloader.c  |  37 +++++
- 6 files changed, 198 insertions(+), 1 deletion(-)
- create mode 100644 target/linux/ath79/dts/qca9563_tplink_cpe710-v1.dts
-
-diff --git a/target/linux/ath79/dts/qca9563_tplink_cpe710-v1.dts b/target/linux/ath79/dts/qca9563_tplink_cpe710-v1.dts
-new file mode 100644
-index 0000000000..830c3d30b8
---- /dev/null
-+++ b/target/linux/ath79/dts/qca9563_tplink_cpe710-v1.dts
-@@ -0,0 +1,141 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+
-+#include "qca956x.dtsi"
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+
-+/ {
-+	model = "TP-Link CPE710 v1";
-+	compatible = "tplink,cpe710-v1", "qca,qca9563";
-+
-+	aliases {
-+		label-mac-device = &eth0;
-+		led-boot = &led_lan;
-+		led-failsafe = &led_lan;
-+		led-upgrade = &led_lan;
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		led_lan: lan {
-+			label = "blue:lan";
-+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		wlan5g {
-+			label = "blue:wlan5g";
-+			gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
-+			linux,default-trigger = "phy0tpt";
-+		};
-+	};
-+
-+	keys {
-+		compatible = "gpio-keys";
-+
-+		reset {
-+			label = "Reset button";
-+			linux,code = <KEY_RESTART>;
-+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
-+			debounce-interval = <60>;
-+		};
-+	};
-+};
-+
-+&pcie {
-+	status = "okay";
-+};
-+
-+&spi {
-+	status = "okay";
-+
-+	flash@0 {
-+		compatible = "jedec,spi-nor";
-+		reg = <0>;
-+		spi-max-frequency = <40000000>;
-+
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			partition@0 {
-+				label = "u-boot";
-+				reg = <0x000000 0x040000>;
-+				read-only;
-+			};
-+
-+			partition@40000 {
-+				label = "u-boot-env";
-+				reg = <0x040000 0x010000>;
-+			};
-+
-+			partition@50000 {
-+				label = "partition-table";
-+				reg = <0x050000 0x010000>;
-+				read-only;
-+			};
-+
-+			info: partition@60000 {
-+				label = "info";
-+				reg = <0x060000 0x010000>;
-+				read-only;
-+			};
-+
-+			partition@70000 {
-+				compatible = "denx,uimage";
-+				label = "firmware";
-+				reg = <0x070000 0xf50000>;
-+			};
-+
-+			partition@fc0000 {
-+				label = "config";
-+				reg = <0xfc0000 0x030000>;
-+				read-only;
-+			};
-+
-+			art: partition@ff0000 {
-+				label = "art";
-+				reg = <0xff0000 0x010000>;
-+				read-only;
-+			};
-+		};
-+	};
-+};
-+
-+&pinmux {
-+	mdio_pins: mdio_pins {
-+		/* GPIO 10 as MDIO(0x20), GPIO 8 as MDC(0x21) */
-+		pinctrl-single,bits = <0x8 0x00200021 0x00ff00ff>;
-+	};
-+};
-+
-+&mdio0 {
-+	status = "okay";
-+
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&mdio_pins>;
-+
-+	phy-mask = <0x10>;
-+
-+	phy4: ethernet-phy@4 {
-+		reg = <4>;
-+		reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
-+	};
-+};
-+
-+&eth0 {
-+	status = "okay";
-+
-+	phy-handle = <&phy4>;
-+	phy-mode = "sgmii";
-+
-+	mtd-mac-address = <&info 0x8>;
-+
-+	qca956x-serdes-fixup;
-+
-+	gmac-config {
-+		device = <&gmac>;
-+	};
-+};
-diff --git a/target/linux/ath79/generic/base-files/etc/board.d/01_leds b/target/linux/ath79/generic/base-files/etc/board.d/01_leds
-index 7c5eeb1112..05bdf60f78 100755
---- a/target/linux/ath79/generic/base-files/etc/board.d/01_leds
-+++ b/target/linux/ath79/generic/base-files/etc/board.d/01_leds
-@@ -164,7 +164,8 @@ enterasys,ws-ap3705i|\
- openmesh,mr900-v1|\
- openmesh,mr900-v2|\
- openmesh,mr1750-v1|\
--openmesh,mr1750-v2)
-+openmesh,mr1750-v2|\
-+tplink,cpe710-v1)
- 	ucidef_set_led_netdev "lan" "LAN" "blue:lan" "eth0"
- 	;;
- compex,wpj344-16m|\
-diff --git a/target/linux/ath79/generic/base-files/etc/board.d/02_network b/target/linux/ath79/generic/base-files/etc/board.d/02_network
-index 3ba3d72abc..d70432ad2b 100755
---- a/target/linux/ath79/generic/base-files/etc/board.d/02_network
-+++ b/target/linux/ath79/generic/base-files/etc/board.d/02_network
-@@ -63,6 +63,7 @@ ath79_setup_interfaces()
- 	tplink,cpe510-v3|\
- 	tplink,cpe610-v1|\
- 	tplink,cpe610-v2|\
-+	tplink,cpe710-v1|\
- 	tplink,eap225-outdoor-v1|\
- 	tplink,eap225-v3|\
- 	tplink,eap245-v1|\
-diff --git a/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-index 80f755b343..4d7940d6ba 100644
---- a/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-+++ b/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-@@ -229,6 +229,12 @@ case "$FIRMWARE" in
- 		ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
- 			/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
- 		;;
-+	tplink,cpe710-v1)
-+		caldata_extract "art" 0x5000 0x2f20
-+		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary info 0x8) )
-+		ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
-+			/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
-+		;;
- 	tplink,eap225-outdoor-v1|\
- 	tplink,eap225-v3|\
- 	tplink,eap225-wall-v2|\
-diff --git a/target/linux/ath79/image/generic-tp-link.mk b/target/linux/ath79/image/generic-tp-link.mk
-index be6aa06b55..78340f650e 100644
---- a/target/linux/ath79/image/generic-tp-link.mk
-+++ b/target/linux/ath79/image/generic-tp-link.mk
-@@ -362,6 +362,17 @@ define Device/tplink_cpe610-v2
- endef
- TARGET_DEVICES += tplink_cpe610-v2
- 
-+define Device/tplink_cpe710-v1
-+  $(Device/tplink-safeloader-uimage)
-+  SOC := qca9563
-+  IMAGE_SIZE := 15680k
-+  DEVICE_MODEL := CPE710
-+  DEVICE_VARIANT := v1
-+  DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9888-ct
-+  TPLINK_BOARD_ID := CPE710V1
-+endef
-+TARGET_DEVICES += tplink_cpe710-v1
-+
- define Device/tplink-eap2x5
-   $(Device/tplink-safeloader)
-   LOADER_TYPE := elf
-diff --git a/tools/firmware-utils/src/tplink-safeloader.c b/tools/firmware-utils/src/tplink-safeloader.c
-index 70e21f99cb..c519a6d367 100644
---- a/tools/firmware-utils/src/tplink-safeloader.c
-+++ b/tools/firmware-utils/src/tplink-safeloader.c
-@@ -530,6 +530,43 @@ static struct device_info boards[] = {
- 		.first_sysupgrade_partition = "os-image",
- 		.last_sysupgrade_partition = "support-list",
- 	},
-+	/** Firmware layout for the CPE710 V1 */
-+	{
-+		.id     = "CPE710V1",
-+		.vendor = "CPE710(TP-LINK|UN|AC866-5|00000000):1.0\r\n",
-+		.support_list =
-+			"SupportList:\r\n"
-+			"CPE710(TP-LINK|UN|AC866-5|00000000):1.0\r\n"
-+			"CPE710(TP-LINK|EU|AC866-5|45550000):1.0\r\n"
-+			"CPE710(TP-LINK|US|AC866-5|55530000):1.0\r\n"
-+			"CPE710(TP-LINK|UN|AC866-5):1.0\r\n"
-+			"CPE710(TP-LINK|EU|AC866-5):1.0\r\n"
-+			"CPE710(TP-LINK|US|AC866-5):1.0\r\n",
-+		.part_trail = 0xff,
-+		.soft_ver = NULL,
-+
-+		.partitions = {
-+			{"fs-uboot", 0x00000, 0x50000},
-+			{"partition-table", 0x50000, 0x02000},
-+			{"default-mac", 0x60000, 0x00020},
-+			{"serial-number", 0x60100, 0x00020},
-+			{"product-info", 0x61100, 0x00100},
-+			{"device-info", 0x61400, 0x00400},
-+			{"signature", 0x62000, 0x00400},
-+			{"device-id", 0x63000, 0x00100},
-+			{"firmware", 0x70000, 0xf40000},
-+			{"soft-version", 0xfb0000, 0x00100},
-+			{"support-list", 0xfb1000, 0x01000},
-+			{"user-config", 0xfc0000, 0x10000},
-+			{"default-config", 0xfd0000, 0x10000},
-+			{"log", 0xfe0000, 0x10000},
-+			{"radio", 0xff0000, 0x10000},
-+			{NULL, 0, 0}
-+		},
-+
-+		.first_sysupgrade_partition = "os-image",
-+		.last_sysupgrade_partition = "support-list",
-+	},
- 
- 	{
- 		.id     = "WBS210",
--- 
-2.25.1
-
diff --git a/patches/ath79/0004-ath79-various-fixes.patch b/patches/ath79/0004-ath79-various-fixes.patch
deleted file mode 100644
index ab9786a09..000000000
--- a/patches/ath79/0004-ath79-various-fixes.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 83b7e4074c238cb64f727cde16cdfcc530aaa329 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Sat, 8 May 2021 11:30:32 +0200
-Subject: [PATCH 34/43] ath79: various fixes
-
-* free up additional 1MB rootfs space
-* make the target use bridge-vlan
-* use the single eth port as wan
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- target/linux/ath79/generic/base-files/etc/board.d/02_network | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/target/linux/ath79/generic/base-files/etc/board.d/02_network b/target/linux/ath79/generic/base-files/etc/board.d/02_network
-index d70432ad2b..b0b152ba74 100755
---- a/target/linux/ath79/generic/base-files/etc/board.d/02_network
-+++ b/target/linux/ath79/generic/base-files/etc/board.d/02_network
-@@ -95,7 +95,7 @@ ath79_setup_interfaces()
- 	ubnt,unifi|\
- 	wd,mynet-wifi-rangeextender|\
- 	winchannel,wb2000)
--		ucidef_set_interface_lan "eth0"
-+		ucidef_set_interface_wan "eth0"
- 		;;
- 	airtight,c-75)
- 		ucidef_add_switch "switch0" \
-@@ -675,6 +675,7 @@ ath79_setup_macs()
- 
- board_config_update
- board=$(board_name)
-+ucidef_set_bridge_device bridge
- ath79_setup_interfaces $board
- ath79_setup_macs $board
- board_config_flush
--- 
-2.25.1
-
diff --git a/patches/ath79/0005-certificates-add-ability-to-persistently-store-certi.patch b/patches/ath79/0005-certificates-add-ability-to-persistently-store-certi.patch
deleted file mode 100644
index 2092c50de..000000000
--- a/patches/ath79/0005-certificates-add-ability-to-persistently-store-certi.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From ee837f028bd7af515d30a8a90cc2b5ee61eecf19 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Sat, 4 Sep 2021 06:04:54 +0200
-Subject: [PATCH 35/43] certificates: add ability to persistently store
- certificates
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- target/linux/ath79/dts/qca9563_tplink_cpe710-v1.dts        | 7 ++++++-
- 3 files changed, 13 insertions(+), 4 deletions(-)
-
-diff --git a/target/linux/ath79/dts/qca9563_tplink_cpe710-v1.dts b/target/linux/ath79/dts/qca9563_tplink_cpe710-v1.dts
-index 830c3d30b8..71c6381f86 100644
---- a/target/linux/ath79/dts/qca9563_tplink_cpe710-v1.dts
-+++ b/target/linux/ath79/dts/qca9563_tplink_cpe710-v1.dts
-@@ -86,7 +86,12 @@
- 			partition@70000 {
- 				compatible = "denx,uimage";
- 				label = "firmware";
--				reg = <0x070000 0xf50000>;
-+				reg = <0x070000 0xf40000>;
-+			};
-+
-+			partition@fb0000 {
-+				label = "certificates";
-+				reg = <0xfb0000 0x10000>;
- 			};
- 
- 			partition@fc0000 {
-
diff --git a/patches/backports/0001-build-build-kernel-image-before-building-modules-pac.patch b/patches/backports/0001-build-build-kernel-image-before-building-modules-pac.patch
deleted file mode 100644
index ffe455d14..000000000
--- a/patches/backports/0001-build-build-kernel-image-before-building-modules-pac.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From c51ac602aff1a9b0093687fe39164a3b895fd4a2 Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Thu, 22 Oct 2020 10:29:34 +0200
-Subject: [PATCH 01/27] build: build kernel image before building
- modules/packages
-
-This is needed for linux 5.10, where modules.builtin is generated from
-vmlinux.o
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- include/kernel-defaults.mk | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/include/kernel-defaults.mk b/include/kernel-defaults.mk
-index 3aa1baa761..c02e0d34ca 100644
---- a/include/kernel-defaults.mk
-+++ b/include/kernel-defaults.mk
-@@ -115,7 +115,7 @@ endef
- 
- define Kernel/CompileModules/Default
- 	rm -f $(LINUX_DIR)/vmlinux $(LINUX_DIR)/System.map
--	+$(KERNEL_MAKE) modules
-+	+$(KERNEL_MAKE) $(if $(KERNELNAME),$(KERNELNAME),all) modules
- endef
- 
- OBJCOPY_STRIP = -R .reginfo -R .notes -R .note -R .comment -R .mdebug -R .note.gnu.build-id
-@@ -139,7 +139,7 @@ endef
- 
- define Kernel/CompileImage/Default
- 	rm -f $(TARGET_DIR)/init
--	+$(KERNEL_MAKE) $(if $(KERNELNAME),$(KERNELNAME),all) modules
-+	+$(KERNEL_MAKE) $(if $(KERNELNAME),$(KERNELNAME),all)
- 	$(call Kernel/CopyImage)
- endef
- 
-@@ -149,7 +149,7 @@ define Kernel/CompileImage/Initramfs
- 	$(CP) $(GENERIC_PLATFORM_DIR)/other-files/init $(TARGET_DIR)/init
- 	$(if $(SOURCE_DATE_EPOCH),touch -hcd "@$(SOURCE_DATE_EPOCH)" $(TARGET_DIR)/init)
- 	rm -rf $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION)/usr/initramfs_data.cpio*
--	+$(KERNEL_MAKE) $(if $(KERNELNAME),$(KERNELNAME),all) modules
-+	+$(KERNEL_MAKE) $(if $(KERNELNAME),$(KERNELNAME),all)
- 	$(call Kernel/CopyImage,-initramfs)
- endef
- else
--- 
-2.25.1
-
diff --git a/patches/backports/0002-build-fix-build-with-CONFIG_STRIP_KERNEL_EXPORTS.patch b/patches/backports/0002-build-fix-build-with-CONFIG_STRIP_KERNEL_EXPORTS.patch
deleted file mode 100644
index 39398eee8..000000000
--- a/patches/backports/0002-build-fix-build-with-CONFIG_STRIP_KERNEL_EXPORTS.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 6c50e27b166b30c0b3f7b730717ab4b7f446e4d0 Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Wed, 17 Feb 2021 13:49:14 +0100
-Subject: [PATCH 02/27] build: fix build with CONFIG_STRIP_KERNEL_EXPORTS
-
-Only use symtab.h on the final kernel link
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- include/kernel-defaults.mk | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/include/kernel-defaults.mk b/include/kernel-defaults.mk
-index c02e0d34ca..f9316fc3f9 100644
---- a/include/kernel-defaults.mk
-+++ b/include/kernel-defaults.mk
-@@ -3,7 +3,7 @@
- # Copyright (C) 2006-2020 OpenWrt.org
- 
- ifdef CONFIG_STRIP_KERNEL_EXPORTS
--  KERNEL_MAKEOPTS += \
-+  KERNEL_MAKEOPTS_IMAGE += \
- 	EXTRA_LDSFLAGS="-I$(KERNEL_BUILD_DIR) -include symtab.h"
- endif
- 
-@@ -139,7 +139,7 @@ endef
- 
- define Kernel/CompileImage/Default
- 	rm -f $(TARGET_DIR)/init
--	+$(KERNEL_MAKE) $(if $(KERNELNAME),$(KERNELNAME),all)
-+	+$(KERNEL_MAKE) $(KERNEL_MAKEOPTS_IMAGE) $(if $(KERNELNAME),$(KERNELNAME),all)
- 	$(call Kernel/CopyImage)
- endef
- 
-@@ -149,7 +149,7 @@ define Kernel/CompileImage/Initramfs
- 	$(CP) $(GENERIC_PLATFORM_DIR)/other-files/init $(TARGET_DIR)/init
- 	$(if $(SOURCE_DATE_EPOCH),touch -hcd "@$(SOURCE_DATE_EPOCH)" $(TARGET_DIR)/init)
- 	rm -rf $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION)/usr/initramfs_data.cpio*
--	+$(KERNEL_MAKE) $(if $(KERNELNAME),$(KERNELNAME),all)
-+	+$(KERNEL_MAKE) $(KERNEL_MAKEOPTS_IMAGE) $(if $(KERNELNAME),$(KERNELNAME),all)
- 	$(call Kernel/CopyImage,-initramfs)
- endef
- else
--- 
-2.25.1
-
diff --git a/patches/backports/0003-kernel-add-linux-5.10-support.patch b/patches/backports/0003-kernel-add-linux-5.10-support.patch
deleted file mode 100644
index 2221290cc..000000000
--- a/patches/backports/0003-kernel-add-linux-5.10-support.patch
+++ /dev/null
@@ -1,39479 +0,0 @@
-From 369794a62050fadc47b617acb29e19d6f536fe3f Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Sat, 24 Oct 2020 21:14:16 +0200
-Subject: [PATCH 03/27] kernel: add linux 5.10 support
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- include/image-commands.mk                     |    3 +-
- package/base-files/files/lib/upgrade/nand.sh  |  102 +-
- package/kernel/linux/modules/block.mk         |   16 +-
- package/kernel/linux/modules/fs.mk            |    6 +-
- package/kernel/linux/modules/netdevices.mk    |    2 +-
- package/kernel/linux/modules/netfilter.mk     |    4 +-
- package/kernel/linux/modules/usb.mk           |    2 +-
- scripts/mkits.sh                              |   45 +-
- ...dcode-path-to-awk-in-scripts-ld-vers.patch |   30 +
- .../011-kbuild-export-SUBARCH.patch           |   21 +
- ...a-neon-optimize-for-non-block-size-m.patch |  272 +
- ...a-neon-add-missing-counter-increment.patch |   38 +
- ...ut-frequently-used-members-above-cac.patch |   42 +
- ...ow_offload-handle-netdevice-events-f.patch |  106 +
- ...convert-fixed-partitions-to-the-json.patch |  324 +
- ...move-partition-binding-to-its-own-fi.patch |  115 +
- ...d-add-binding-for-BCM4908-partitions.patch |   92 +
- ...art-support-BCM4908-fixed-partitions.patch |  654 ++
- ...rt-limit-parsing-of-deprecated-DT-sy.patch |   69 +
- ...rt-make-symbol-bcm4908_partitions_qu.patch |   34 +
- ...em-cells-compatible-to-parse-mtd-as-.patch |   38 +
- ...ings-nvmem-drop-nodename-restriction.patch |   25 +
- ...Document-use-of-nvmem-cells-compatib.patch |  117 +
- ...add-binding-for-Linksys-Northstar-pa.patch |   98 +
- ...rt-support-Linksys-Northstar-partiti.patch |  156 +
- ...pi-poll-functionality-to-__napi_poll.patch |   88 +
- ...threaded-able-napi-poll-loop-support.patch |  261 +
- ...tribute-to-control-napi-threaded-mod.patch |  177 +
- ...ween-napi-kthread-mode-and-busy-poll.patch |   93 +
- ...up-on-napi_disable-for-threaded-napi.patch |   53 +
- ...y-switchdev-of-disappearance-of-old-.patch |  126 +
- ...r-when-a-non-legacy-FDB-operation-fa.patch |   52 +
- ...e-switchdev_notifier_fdb_info-in-dsa.patch |  226 +
- ...tchdev-event-implementation-under-th.patch |   85 +
- ...ly-in-dsa_slave_switchdev_event-if-w.patch |   42 +
- ...or-SWITCHDEV_-FDB-DEL-_ADD_TO_DEVICE.patch |  264 +
- ...setup-core-clock-even-in-TRGMII-mode.patch |   84 +
- ..._nvram-rename-finding-function-and-i.patch |   80 +
- ..._nvram-add-helper-checking-for-NVRAM.patch |   90 +
- ...7xx_nvram-extract-code-copying-NVRAM.patch |   80 +
- ..._nvram-look-for-NVRAM-with-for-inste.patch |   37 +
- ..._nvram-inline-code-checking-NVRAM-si.patch |   70 +
- ...rious-flag-to-disable-overcurrent-ch.patch |   88 +
- ...-platform-add-spurious_oc-DT-support.patch |   31 +
- target/linux/generic/config-5.10              | 7062 +++++++++++++++++
- target/linux/generic/config-5.4               |    1 +
- target/linux/generic/config-filter            |    6 +-
- .../generic/files/block/partitions/fit.c      |  254 +
- .../files/drivers/mtd/mtdsplit/Kconfig        |    5 +
- .../files/drivers/mtd/mtdsplit/Makefile       |    1 +
- .../drivers/mtd/mtdsplit/mtdsplit_bcm63xx.c   |  186 +
- .../files/drivers/mtd/mtdsplit/mtdsplit_fit.c |    6 +
- .../generic/files/drivers/net/phy/ar8216.c    |   16 +
- .../generic/hack-5.10/204-module_strip.patch  |  196 +
- .../210-darwin_scripts_include.patch          | 3053 +++++++
- .../211-darwin-uuid-typedef-clash.patch       |   22 +
- .../hack-5.10/212-tools_portability.patch     |  110 +
- .../hack-5.10/214-spidev_h_portability.patch  |   24 +
- .../generic/hack-5.10/220-gc_sections.patch   |  120 +
- .../hack-5.10/221-module_exports.patch        |  102 +
- .../hack-5.10/230-openwrt_lzma_options.patch  |   34 +
- .../hack-5.10/249-udp-tunnel-selection.patch  |   11 +
- .../hack-5.10/250-netfilter_depends.patch     |   27 +
- .../linux/generic/hack-5.10/251-kconfig.patch |  199 +
- .../hack-5.10/259-regmap_dynamic.patch        |  135 +
- .../260-crypto_test_dependencies.patch        |   52 +
- .../hack-5.10/261-lib-arc4-unhide.patch       |   15 +
- .../generic/hack-5.10/280-rfkill-stubs.patch  |   84 +
- ...cache-use-more-efficient-cache-blast.patch |   64 +
- .../301-mips_image_cmdline_hack.patch         |   38 +
- .../321-powerpc_crtsavres_prereq.patch        |   38 +
- .../400-block-fit-partition-parser.patch      |  177 +
- .../generic/hack-5.10/531-debloat_lzma.patch  | 1040 +++
- .../640-bridge-only-accept-EAP-locally.patch  |   82 +
- ...lter-connmark-introduce-set-dscpmark.patch |  212 +
- ...-netfilter-add-xt_FLOWOFFLOAD-target.patch |  820 ++
- .../hack-5.10/651-wireless_mesh_header.patch  |   24 +
- .../hack-5.10/660-fq_codel_defaults.patch     |   27 +
- .../661-use_fq_codel_by_default.patch         |  100 +
- .../700-swconfig_switch_drivers.patch         |  129 +
- .../710-net-dsa-mv88e6xxx-default-VID-1.patch |   18 +
- ...-dsa-mv88e6xxx-disable-ATU-violation.patch |   12 +
- .../hack-5.10/773-bgmac-add-srab-switch.patch |   98 +
- .../hack-5.10/901-debloat_sock_diag.patch     |  162 +
- .../generic/hack-5.10/902-debloat_proc.patch  |  408 +
- .../hack-5.10/904-debloat_dma_buf.patch       |   82 +
- .../hack-5.10/910-kobject_uevent.patch        |   32 +
- .../911-kobject_add_broadcast_uevent.patch    |   76 +
- ...include-asm-rwonce.h-for-kernel-code.patch |   29 +
- ...s-negative-stack-offsets-on-stack-tr.patch |   57 +
- ...CPU_MIPS64-for-remaining-MIPS64-CPUs.patch |   36 +
- ...e_mem_map-with-ARCH_PFN_OFFSET-calcu.patch |   82 +
- ...0-add-linux-spidev-compatible-si3210.patch |   18 +
- ...ame2-and-add-RENAME_WHITEOUT-support.patch |   78 +
- ...41-jffs2-add-RENAME_EXCHANGE-support.patch |   73 +
- .../142-jffs2-add-splice-ops.patch            |   20 +
- ...ge_allow_receiption_on_disabled_port.patch |   45 +
- ...-rs5c372-support_alarms_up_to_1_week.patch |   94 +
- ...he_alarm_to_be_used_as_wakeup_source.patch |   70 +
- .../pending-5.10/201-extra_optimization.patch |   31 +
- .../203-kallsyms_uncompressed.patch           |  119 +
- .../205-backtrace_module_info.patch           |   41 +
- ...e-filenames-from-deps_initramfs-list.patch |   30 +
- ...able_wilink_platform_without_drivers.patch |   20 +
- .../270-platform-mikrotik-build-bits.patch    |   31 +
- .../300-mips_expose_boot_raw.patch            |   40 +
- .../302-mips_no_branch_likely.patch           |   22 +
- .../pending-5.10/305-mips_module_reloc.patch  |  371 +
- .../307-mips_highmem_offset.patch             |   19 +
- .../pending-5.10/308-mips32r2_tune.patch      |   22 +
- ...CPU-option-reporting-to-proc-cpuinfo.patch |  140 +
- .../310-arm_module_unresolved_weak_sym.patch  |   22 +
- ...boot-put-appended-dtb-into-a-section.patch |   36 +
- ...t-command-line-parameters-from-users.patch |  281 +
- .../332-arc-add-OWRTDTB-section.patch         |   84 +
- ...able-unaligned-access-in-kernel-mode.patch |   24 +
- ...ernel-XZ-compression-option-on-PPC_8.patch |   25 +
- .../400-mtd-mtdsplit-support.patch            |  313 +
- ...t-add-of_match_table-with-DT-binding.patch |   22 +
- .../pending-5.10/420-mtd-redboot_space.patch  |   41 +
- ...30-mtd-add-myloader-partition-parser.patch |  229 +
- ...check-for-bad-blocks-when-calculatin.patch |   68 +
- ...bcm47xxpart-detect-T_Meter-partition.patch |   37 +
- ...mtd-add-routerbootpart-parser-config.patch |   38 +
- ...mtd-cfi_cmdset_0002-no-erase_suspend.patch |   25 +
- ...et_0002-add-buffer-write-cmd-timeout.patch |   17 +
- ...25p80-mx-disable-software-protection.patch |   18 +
- ...ort-limiting-4K-sectors-support-base.patch |   71 +
- .../476-mtd-spi-nor-add-eon-en25q128.patch    |   18 +
- .../479-mtd-spi-nor-add-xtx-xt25f128b.patch   |   79 +
- .../480-mtd-set-rootfs-to-be-root-dev.patch   |   38 +
- ...or-rework-broken-flash-reset-support.patch |  180 +
- ...r-add-support-for-Gigadevice-GD25D05.patch |   22 +
- .../483-mtd-spi-nor-add-gd25q512.patch        |   12 +
- ...mtd-device-named-ubi-or-data-on-boot.patch |   97 +
- ...to-create-ubiblock-device-for-rootfs.patch |   69 +
- ...ting-ubi0-rootfs-in-init-do_mounts.c.patch |   51 +
- ...ROOT_DEV-to-ubiblock-rootfs-if-unset.patch |   34 +
- .../494-mtd-ubi-add-EOF-marker-support.patch  |   60 +
- ...-mtd-core-add-get_mtd_device_by_node.patch |   75 +
- ...-add-bindings-for-mtd-concat-devices.patch |   52 +
- ...cat-add-dt-driver-for-concat-devices.patch |  216 +
- ...-mtdconcat-select-readwrite-function.patch |   24 +
- ...when-recursively-deleting-partitions.patch |   24 +
- .../500-fs_cdrom_dependencies.patch           |   40 +
- .../530-jffs2_make_lzma_available.patch       | 5180 ++++++++++++
- .../pending-5.10/532-jffs2_eofdetect.patch    |   65 +
- .../600-netfilter_conntrack_flush.patch       |   88 +
- ...etfilter_match_bypass_default_checks.patch |  110 +
- ...netfilter_match_bypass_default_table.patch |  106 +
- ...netfilter_match_reduce_memory_access.patch |   22 +
- ...-netfilter_optional_tcp_window_check.patch |   73 +
- ...del-do-not-defer-queue-length-update.patch |   86 +
- .../pending-5.10/630-packet_socket_type.patch |  138 +
- ...table-add-hash-offset-field-to-tuple.patch |   52 +
- ...filter-flowtable-add-xmit-path-types.patch |  188 +
- ...arding-path-from-virtual-netdevice-a.patch |  170 +
- ...lve-forwarding-path-for-vlan-devices.patch |   80 +
- ...e-forwarding-path-for-bridge-devices.patch |   62 +
- ...ble-use-dev_fill_forward_path-to-obt.patch |  191 +
- ...ble-use-dev_fill_forward_path-to-obt.patch |  344 +
- ...netfilter-flowtable-add-vlan-support.patch |  391 +
- ...ter-flowtable-bridge-and-VLAN-suppor.patch |  107 +
- ...ve-VLAN-tag-actions-in-forwarding-pa.patch |  207 +
- ...ow_offload-add-bridge-vlan-filtering.patch |   31 +
- ...forwarding-path-for-bridge-pppoe-dev.patch |  100 +
- ...-forwarding-path-for-dsa-slave-ports.patch |   60 +
- ...etfilter-flowtable-add-pppoe-support.patch |  263 +
- ...ter-nft_flow_offload-add-dsa-support.patch |   30 +
- ...ble-add-offload-support-for-xmit-pat.patch |  308 +
- ...sa-slave-add-support-for-TC_SETUP_FT.patch |   53 +
- ...ow_offload-use-direct-xmit-if-hardwa.patch |  108 +
- ...w_table-fix-untagging-with-hardware-.patch |  122 +
- ...w_offload-add-FLOW_ACTION_PPPOE_PUSH.patch |   26 +
- ...ble-support-for-FLOW_ACTION_PPPOE_PU.patch |   31 +
- .../pending-5.10/655-increase_skb_pad.patch   |   20 +
- ...Add-support-for-MAP-E-FMRs-mesh-mode.patch |  511 ++
- ...ng-with-source-address-failed-policy.patch |  263 +
- ...nes-for-_POLICY_FAILED-until-all-cod.patch |   50 +
- ...T-skip-GRO-for-foreign-MAC-addresses.patch |  149 +
- .../681-NET-add-of_get_mac_address_mtd.patch  |  135 +
- ...detach-callback-to-struct-phy_driver.patch |   38 +
- ...net-phy-at803x-fix-at8033-sgmii-mode.patch |   51 +
- ...760-net-dsa-mv88e6xxx-fix-vlan-setup.patch |   27 +
- ...-net-dsa-mt7530-Support-EEE-features.patch |  121 +
- ...hdev-Refactor-br_switchdev_fdb_notif.patch |   77 +
- ...hdev-Include-local-flag-in-FDB-notif.patch |   42 +
- ...hdev-Send-FDB-notifications-for-host.patch |   96 +
- ...local-addresses-in-assisted-CPU-port.patch |   36 +
- ...bridge-addresses-in-assisted-CPU-por.patch |   30 +
- ...tic-FDB-entries-on-foreign-interface.patch |   56 +
- ...equest-assisted-learning-on-CPU-port.patch |   27 +
- ...net-mtk_eth_soc-use-napi_consume_skb.patch |   72 +
- ..._eth_soc-significantly-reduce-mdio-b.patch |   26 +
- ...rnet-mtk_eth_soc-fix-rx-vlan-offload.patch |   31 +
- ..._eth_soc-fix-unnecessary-tx-queue-st.patch |   50 +
- ..._eth_soc-use-larger-burst-size-for-q.patch |   32 +
- ...-mtk_eth_soc-increase-DMA-ring-sizes.patch |   21 +
- ..._eth_soc-implement-dynamic-interrupt.patch |  281 +
- ..._eth_soc-cache-hardware-pointer-of-l.patch |   67 +
- ..._eth_soc-only-read-the-full-rx-descr.patch |   44 +
- ..._eth_soc-unmap-rx-data-before-callin.patch |   44 +
- ..._eth_soc-avoid-rearming-interrupt-if.patch |   35 +
- ...k_eth_soc-fix-parsing-packets-in-GDM.patch |   67 +
- ..._eth_soc-set-PPE-flow-hash-as-skb-ha.patch |   41 +
- ..._eth_soc-add-support-for-initializin.patch | 1307 +++
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- create mode 100644 target/linux/generic/pending-5.10/811-pci_disable_usb_common_quirks.patch
- create mode 100644 target/linux/generic/pending-5.10/820-w1-gpio-fix-problem-with-platfom-data-in-w1-gpio.patch
- create mode 100644 target/linux/generic/pending-5.10/834-ledtrig-libata.patch
- create mode 100644 target/linux/generic/pending-5.10/840-hwrng-bcm2835-set-quality-to-1000.patch
- create mode 100644 target/linux/generic/pending-5.10/920-mangle_bootargs.patch
-
-diff --git a/include/image-commands.mk b/include/image-commands.mk
-index 4d54a14ba4..2c917d613e 100644
---- a/include/image-commands.mk
-+++ b/include/image-commands.mk
-@@ -200,11 +200,12 @@ define Build/fit
- 	$(TOPDIR)/scripts/mkits.sh \
- 		-D $(DEVICE_NAME) -o $@.its -k $@ \
- 		$(if $(word 2,$(1)),-d $(word 2,$(1))) -C $(word 1,$(1)) \
-+		$(if $(word 3,$(1)),-r $(IMAGE_ROOTFS) -f $(subst _,$(comma),$(DEVICE_NAME))) \
- 		-a $(KERNEL_LOADADDR) -e $(if $(KERNEL_ENTRY),$(KERNEL_ENTRY),$(KERNEL_LOADADDR)) \
- 		$(if $(DEVICE_FDT_NUM),-n $(DEVICE_FDT_NUM)) \
- 		-c $(if $(DEVICE_DTS_CONFIG),$(DEVICE_DTS_CONFIG),"config@1") \
- 		-A $(LINUX_KARCH) -v $(LINUX_VERSION)
--	PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage -f $@.its $@.new
-+	PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage $(if $(word 3,$(1)),-E -B 0x1000 -p 0x1000) -f $@.its $@.new
- 	@mv $@.new $@
- endef
- 
-diff --git a/package/base-files/files/lib/upgrade/nand.sh b/package/base-files/files/lib/upgrade/nand.sh
-index e6f58df4f5..5bc9ff83f9 100644
---- a/package/base-files/files/lib/upgrade/nand.sh
-+++ b/package/base-files/files/lib/upgrade/nand.sh
-@@ -3,13 +3,13 @@
- 
- . /lib/functions.sh
- 
--# 'kernel' partition on NAND contains the kernel
-+# 'kernel' partition or UBI volume on NAND contains the kernel
- CI_KERNPART="${CI_KERNPART:-kernel}"
- 
- # 'ubi' partition on NAND contains UBI
- CI_UBIPART="${CI_UBIPART:-ubi}"
- 
--# 'rootfs' partition on NAND contains the rootfs
-+# 'rootfs' UBI volume on NAND contains the rootfs
- CI_ROOTPART="${CI_ROOTPART:-rootfs}"
- 
- ubi_mknod() {
-@@ -117,9 +117,11 @@ nand_restore_config() {
- nand_upgrade_prepare_ubi() {
- 	local rootfs_length="$1"
- 	local rootfs_type="$2"
--	local has_kernel="${3:-0}"
-+	local kernel_length="$3"
- 	local has_env="${4:-0}"
- 
-+	[ -n "$rootfs_length" -o -n "$kernel_length" ] || return 1
-+
- 	local mtdnum="$( find_mtd_index "$CI_UBIPART" )"
- 	if [ ! "$mtdnum" ]; then
- 		echo "cannot find ubi mtd partition $CI_UBIPART"
-@@ -148,23 +150,24 @@ nand_upgrade_prepare_ubi() {
- 	local root_ubivol="$( nand_find_volume $ubidev $CI_ROOTPART )"
- 	local data_ubivol="$( nand_find_volume $ubidev rootfs_data )"
- 
--	# remove ubiblock device of rootfs
--	local root_ubiblk="ubiblock${root_ubivol:3}"
--	if [ "$root_ubivol" -a -e "/dev/$root_ubiblk" ]; then
--		echo "removing $root_ubiblk"
--		if ! ubiblock -r /dev/$root_ubivol; then
--			echo "cannot remove $root_ubiblk"
--			return 1;
-+	local ubiblk ubiblkvol
-+	for ubiblk in /dev/ubiblock*_? ; do
-+		[ -e "$ubiblk" ] || continue
-+		echo "removing ubiblock${ubiblk:13}"
-+		ubiblkvol=ubi${ubiblk:13}
-+		if ! ubiblock -r /dev/$ubiblkvol; then
-+			echo "cannot remove $ubiblk"
-+			return 1
- 		fi
--	fi
-+	done
- 
- 	# kill volumes
- 	[ "$kern_ubivol" ] && ubirmvol /dev/$ubidev -N $CI_KERNPART || true
--	[ "$root_ubivol" ] && ubirmvol /dev/$ubidev -N $CI_ROOTPART || true
-+	[ "$root_ubivol" -a "$root_ubivol" != "$kern_ubivol" ] && ubirmvol /dev/$ubidev -N $CI_ROOTPART || true
- 	[ "$data_ubivol" ] && ubirmvol /dev/$ubidev -N rootfs_data || true
- 
- 	# update kernel
--	if [ "$has_kernel" = "1" ]; then
-+	if [ -n "$kernel_length" ]; then
- 		if ! ubimkvol /dev/$ubidev -N $CI_KERNPART -s $kernel_length; then
- 			echo "cannot create kernel volume"
- 			return 1;
-@@ -172,15 +175,17 @@ nand_upgrade_prepare_ubi() {
- 	fi
- 
- 	# update rootfs
--	local root_size_param
--	if [ "$rootfs_type" = "ubifs" ]; then
--		root_size_param="-m"
--	else
--		root_size_param="-s $rootfs_length"
--	fi
--	if ! ubimkvol /dev/$ubidev -N $CI_ROOTPART $root_size_param; then
--		echo "cannot create rootfs volume"
--		return 1;
-+	if [ -n "$rootfs_length" ]; then
-+		local root_size_param
-+		if [ "$rootfs_type" = "ubifs" ]; then
-+			root_size_param="-m"
-+		else
-+			root_size_param="-s $rootfs_length"
-+		fi
-+		if ! ubimkvol /dev/$ubidev -N $CI_ROOTPART $rootfs_size_param; then
-+			echo "cannot create rootfs volume"
-+			return 1;
-+		fi
- 	fi
- 
- 	# create rootfs_data for non-ubifs rootfs
-@@ -232,7 +237,7 @@ nand_upgrade_ubinized() {
- nand_upgrade_ubifs() {
- 	local rootfs_length=$( (cat $1 | wc -c) 2> /dev/null)
- 
--	nand_upgrade_prepare_ubi "$rootfs_length" "ubifs" "0" "0"
-+	nand_upgrade_prepare_ubi "$rootfs_length" "ubifs" "" ""
- 
- 	local ubidev="$( nand_find_ubi "$CI_UBIPART" )"
- 	local root_ubivol="$(nand_find_volume $ubidev $CI_ROOTPART)"
-@@ -241,39 +246,59 @@ nand_upgrade_ubifs() {
- 	nand_do_upgrade_success
- }
- 
-+nand_upgrade_fit() {
-+	local fit_file="$1"
-+	local fit_length="$(wc -c < "$fit_file")"
-+
-+	nand_upgrade_prepare_ubi "" "" "$fit_length" "1"
-+
-+	local fit_ubidev="$(nand_find_ubi "$CI_UBIPART")"
-+	local fit_ubivol="$(nand_find_volume $fit_ubidev "$CI_KERNPART")"
-+	ubiupdatevol /dev/$fit_ubivol -s $fit_length $fit_file
-+
-+	nand_do_upgrade_success
-+}
-+
- nand_upgrade_tar() {
- 	local tar_file="$1"
- 	local kernel_mtd="$(find_mtd_index $CI_KERNPART)"
- 
--	local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
-+	local board_dir=$(tar tf "$tar_file" | grep -m 1 '^sysupgrade-.*/$')
- 	board_dir=${board_dir%/}
- 
--	local kernel_length=$( (tar xf $tar_file ${board_dir}/kernel -O | wc -c) 2> /dev/null)
--	local rootfs_length=$( (tar xf $tar_file ${board_dir}/root -O | wc -c) 2> /dev/null)
-+	kernel_length=$( (tar xf "$tar_file" ${board_dir}/kernel -O | wc -c) 2> /dev/null)
-+	local has_rootfs=0
-+	local rootfs_length
-+	local rootfs_type
- 
--	local rootfs_type="$(identify_tar "$tar_file" ${board_dir}/root)"
-+	tar tf "$tar_file" ${board_dir}/root 1>/dev/null 2>/dev/null && has_rootfs=1
-+	[ "$has_rootfs" = "1" ] && {
-+		rootfs_length=$( (tar xf "$tar_file" ${board_dir}/root -O | wc -c) 2> /dev/null)
-+		rootfs_type="$(identify_tar "$tar_file" ${board_dir}/root)"
-+	}
- 
- 	local has_kernel=1
- 	local has_env=0
- 
- 	[ "$kernel_length" != 0 -a -n "$kernel_mtd" ] && {
--		tar xf $tar_file ${board_dir}/kernel -O | mtd write - $CI_KERNPART
-+		tar xf "$tar_file" ${board_dir}/kernel -O | mtd write - $CI_KERNPART
- 	}
--	[ "$kernel_length" = 0 -o ! -z "$kernel_mtd" ] && has_kernel=0
-+	[ "$kernel_length" = 0 -o ! -z "$kernel_mtd" ] && has_kernel=
- 
--	nand_upgrade_prepare_ubi "$rootfs_length" "$rootfs_type" "$has_kernel" "$has_env"
-+	nand_upgrade_prepare_ubi "$rootfs_length" "$rootfs_type" "${has_kernel:+$kernel_length}" "$has_env"
- 
- 	local ubidev="$( nand_find_ubi "$CI_UBIPART" )"
- 	[ "$has_kernel" = "1" ] && {
--		local kern_ubivol="$(nand_find_volume $ubidev $CI_KERNPART)"
--		tar xf $tar_file ${board_dir}/kernel -O | \
-+		local kern_ubivol="$( nand_find_volume $ubidev $CI_KERNPART )"
-+		tar xf "$tar_file" ${board_dir}/kernel -O | \
- 			ubiupdatevol /dev/$kern_ubivol -s $kernel_length -
- 	}
- 
--	local root_ubivol="$(nand_find_volume $ubidev $CI_ROOTPART)"
--	tar xf $tar_file ${board_dir}/root -O | \
--		ubiupdatevol /dev/$root_ubivol -s $rootfs_length -
--
-+	[ "$has_rootfs" = "1" ] && {
-+		local root_ubivol="$( nand_find_volume $ubidev $CI_ROOTPART )"
-+		tar xf "$tar_file" ${board_dir}/root -O | \
-+			ubiupdatevol /dev/$root_ubivol -s $rootfs_length -
-+	}
- 	nand_do_upgrade_success
- }
- 
-@@ -281,9 +306,10 @@ nand_upgrade_tar() {
- nand_do_upgrade() {
- 	local file_type=$(identify $1)
- 
--	[ ! "$(find_mtd_index "$CI_UBIPART")" ] && CI_UBIPART="rootfs"
-+	[ ! "$( find_mtd_index "$CI_UBIPART" )" ] && CI_UBIPART="rootfs"
- 
- 	case "$file_type" in
-+		"fit")		nand_upgrade_fit $1;;
- 		"ubi")		nand_upgrade_ubinized $1;;
- 		"ubifs")	nand_upgrade_ubifs $1;;
- 		*)		nand_upgrade_tar $1;;
-@@ -309,7 +335,7 @@ nand_do_platform_check() {
- 	local control_length=$( (tar xf $tar_file sysupgrade-$board_name/CONTROL -O | wc -c) 2> /dev/null)
- 	local file_type="$(identify $2)"
- 
--	[ "$control_length" = 0 -a "$file_type" != "ubi" -a "$file_type" != "ubifs" ] && {
-+	[ "$control_length" = 0 -a "$file_type" != "ubi" -a "$file_type" != "ubifs" -a "$file_type" != "fit" ] && {
- 		echo "Invalid sysupgrade file."
- 		return 1
- 	}
-diff --git a/package/kernel/linux/modules/block.mk b/package/kernel/linux/modules/block.mk
-index 373c9fbaab..b7767b3d16 100644
---- a/package/kernel/linux/modules/block.mk
-+++ b/package/kernel/linux/modules/block.mk
-@@ -537,16 +537,24 @@ endef
- $(eval $(call KernelPackage,scsi-generic))
- 
- 
-+define KernelPackage/cdrom
-+  TITLE:=Kernel library module for CD / DVD drives
-+  KCONFIG:=CONFIG_CDROM
-+  HIDDEN:=1
-+  FILES:=$(LINUX_DIR)/drivers/cdrom/cdrom.ko
-+endef
-+
-+$(eval $(call KernelPackage,cdrom))
-+
-+
- define KernelPackage/scsi-cdrom
-   SUBMENU:=$(BLOCK_MENU)
-   TITLE:=Kernel support for CD / DVD drives
--  DEPENDS:=+kmod-scsi-core
-+  DEPENDS:=+kmod-scsi-core +kmod-cdrom
-   KCONFIG:= \
-     CONFIG_BLK_DEV_SR \
-     CONFIG_BLK_DEV_SR_VENDOR=n
--  FILES:= \
--    $(LINUX_DIR)/drivers/cdrom/cdrom.ko \
--    $(LINUX_DIR)/drivers/scsi/sr_mod.ko
-+  FILES:=$(LINUX_DIR)/drivers/scsi/sr_mod.ko
-   AUTOLOAD:=$(call AutoLoad,45,sr_mod)
- endef
- 
-diff --git a/package/kernel/linux/modules/fs.mk b/package/kernel/linux/modules/fs.mk
-index d43542b17e..a0db14ecfe 100644
---- a/package/kernel/linux/modules/fs.mk
-+++ b/package/kernel/linux/modules/fs.mk
-@@ -243,6 +243,7 @@ $(eval $(call KernelPackage,fs-fscache))
- define KernelPackage/fs-hfs
-   SUBMENU:=$(FS_MENU)
-   TITLE:=HFS filesystem support
-+  DEPENDS:=+kmod-cdrom
-   KCONFIG:=CONFIG_HFS_FS
-   FILES:=$(LINUX_DIR)/fs/hfs/hfs.ko
-   AUTOLOAD:=$(call AutoLoad,30,hfs)
-@@ -259,6 +260,7 @@ $(eval $(call KernelPackage,fs-hfs))
- define KernelPackage/fs-hfsplus
-   SUBMENU:=$(FS_MENU)
-   TITLE:=HFS+ filesystem support
-+  DEPENDS:=+kmod-cdrom
-   KCONFIG:=CONFIG_HFSPLUS_FS
-   FILES:=$(LINUX_DIR)/fs/hfsplus/hfsplus.ko
-   AUTOLOAD:=$(call AutoLoad,30,hfsplus)
-@@ -275,7 +277,7 @@ $(eval $(call KernelPackage,fs-hfsplus))
- define KernelPackage/fs-isofs
-   SUBMENU:=$(FS_MENU)
-   TITLE:=ISO9660 filesystem support
--  DEPENDS:=+kmod-lib-zlib-inflate
-+  DEPENDS:=+kmod-lib-zlib-inflate +kmod-cdrom
-   KCONFIG:=CONFIG_ISO9660_FS CONFIG_JOLIET=y CONFIG_ZISOFS=n
-   FILES:=$(LINUX_DIR)/fs/isofs/isofs.ko
-   AUTOLOAD:=$(call AutoLoad,30,isofs)
-@@ -513,7 +515,7 @@ define KernelPackage/fs-udf
-   KCONFIG:=CONFIG_UDF_FS
-   FILES:=$(LINUX_DIR)/fs/udf/udf.ko
-   AUTOLOAD:=$(call AutoLoad,30,udf)
--  DEPENDS:=+kmod-lib-crc-itu-t
-+  DEPENDS:=+kmod-lib-crc-itu-t +kmod-cdrom
-   $(call AddDepends/nls)
- endef
- 
-diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk
-index 901bddddea..5f7a80bf22 100644
---- a/package/kernel/linux/modules/netdevices.mk
-+++ b/package/kernel/linux/modules/netdevices.mk
-@@ -1178,7 +1178,7 @@ $(eval $(call KernelPackage,sfp))
- define KernelPackage/igc
-   SUBMENU:=$(NETWORK_DEVICES_MENU)
-   TITLE:=Intel(R) Ethernet Controller I225 Series support
--  DEPENDS:=@PCI_SUPPORT
-+  DEPENDS:=@PCI_SUPPORT +kmod-ptp
-   KCONFIG:=CONFIG_IGC
-   FILES:=$(LINUX_DIR)/drivers/net/ethernet/intel/igc/igc.ko
-   AUTOLOAD:=$(call AutoProbe,igc)
-diff --git a/package/kernel/linux/modules/netfilter.mk b/package/kernel/linux/modules/netfilter.mk
-index b46fcebc08..e2bb1d0681 100644
---- a/package/kernel/linux/modules/netfilter.mk
-+++ b/package/kernel/linux/modules/netfilter.mk
-@@ -155,7 +155,7 @@ define KernelPackage/nf-flow
-   DEPENDS:=+kmod-nf-conntrack
-   FILES:= \
- 	$(LINUX_DIR)/net/netfilter/nf_flow_table.ko \
--	$(LINUX_DIR)/net/netfilter/nf_flow_table_hw.ko
-+	$(if $(CONFIG_LINUX_5_4),$(LINUX_DIR)/net/netfilter/nf_flow_table_hw.ko)
-   AUTOLOAD:=$(call AutoProbe,nf_flow_table nf_flow_table_hw)
- endef
- 
-@@ -1052,7 +1052,7 @@ $(eval $(call KernelPackage,ipt-rpfilter))
- define KernelPackage/nft-core
-   SUBMENU:=$(NF_MENU)
-   TITLE:=Netfilter nf_tables support
--  DEPENDS:=+kmod-nfnetlink +kmod-nf-reject +IPV6:kmod-nf-reject6 +IPV6:kmod-nf-conntrack6 +kmod-nf-nat
-+  DEPENDS:=+kmod-nfnetlink +kmod-nf-reject +IPV6:kmod-nf-reject6 +IPV6:kmod-nf-conntrack6 +kmod-nf-nat +kmod-lib-crc32c
-   FILES:=$(foreach mod,$(NFT_CORE-m),$(LINUX_DIR)/net/$(mod).ko)
-   AUTOLOAD:=$(call AutoProbe,$(notdir $(NFT_CORE-m)))
-   KCONFIG:= \
-diff --git a/package/kernel/linux/modules/usb.mk b/package/kernel/linux/modules/usb.mk
-index 93f99f7cbe..4191590ba7 100644
---- a/package/kernel/linux/modules/usb.mk
-+++ b/package/kernel/linux/modules/usb.mk
-@@ -1387,7 +1387,7 @@ define KernelPackage/usb-net-cdc-ncm
-   KCONFIG:=CONFIG_USB_NET_CDC_NCM
-   FILES:= $(LINUX_DIR)/drivers/$(USBNET_DIR)/cdc_ncm.ko
-   AUTOLOAD:=$(call AutoProbe,cdc_ncm)
--  $(call AddDepends/usb-net)
-+  $(call AddDepends/usb-net,+kmod-usb-net-cdc-ether)
- endef
- 
- define KernelPackage/usb-net-cdc-ncm/description
-diff --git a/scripts/mkits.sh b/scripts/mkits.sh
-index bb629d6fca..3d68fdacbc 100755
---- a/scripts/mkits.sh
-+++ b/scripts/mkits.sh
-@@ -23,18 +23,23 @@ usage() {
- 	printf "\n\t-c ==> set config name 'config'"
- 	printf "\n\t-a ==> set load address to 'addr' (hex)"
- 	printf "\n\t-e ==> set entry point to 'entry' (hex)"
-+	printf "\n\t-f ==> set device tree compatible string"
- 	printf "\n\t-v ==> set kernel version to 'version'"
- 	printf "\n\t-k ==> include kernel image 'kernel'"
- 	printf "\n\t-D ==> human friendly Device Tree Blob 'name'"
- 	printf "\n\t-n ==> fdt unit-address 'address'"
- 	printf "\n\t-d ==> include Device Tree Blob 'dtb'"
-+	printf "\n\t-r ==> include RootFS blob"
-+	printf "\n\t-H ==> specify hash algo instead of SHA1"
- 	printf "\n\t-o ==> create output file 'its_file'\n"
- 	exit 1
- }
- 
- FDTNUM=1
-+ROOTFSNUM=1
-+HASH=sha1
- 
--while getopts ":A:a:c:C:D:d:e:k:n:o:v:" OPTION
-+while getopts ":A:a:c:C:D:d:e:f:k:n:o:v:r:S" OPTION
- do
- 	case $OPTION in
- 		A ) ARCH=$OPTARG;;
-@@ -44,9 +49,12 @@ do
- 		D ) DEVICE=$OPTARG;;
- 		d ) DTB=$OPTARG;;
- 		e ) ENTRY_ADDR=$OPTARG;;
-+		f ) COMPATIBLE=$OPTARG;;
- 		k ) KERNEL=$OPTARG;;
- 		n ) FDTNUM=$OPTARG;;
- 		o ) OUTPUT=$OPTARG;;
-+		r ) ROOTFS=$OPTARG;;
-+		S ) HASH=$OPTARG;;
- 		v ) VERSION=$OPTARG;;
- 		* ) echo "Invalid option passed to '$0' (options:$*)"
- 		usage;;
-@@ -62,11 +70,16 @@ fi
- 
- ARCH_UPPER=$(echo "$ARCH" | tr '[:lower:]' '[:upper:]')
- 
-+if [ -n "${COMPATIBLE}" ]; then
-+	COMPATIBLE_PROP="compatible = \"${COMPATIBLE}\";"
-+fi
-+
- # Conditionally create fdt information
- if [ -n "${DTB}" ]; then
- 	FDT_NODE="
- 		fdt@$FDTNUM {
- 			description = \"${ARCH_UPPER} OpenWrt ${DEVICE} device tree blob\";
-+			${COMPATIBLE_PROP}
- 			data = /incbin/(\"${DTB}\");
- 			type = \"flat_dt\";
- 			arch = \"${ARCH}\";
-@@ -75,13 +88,34 @@ if [ -n "${DTB}" ]; then
- 				algo = \"crc32\";
- 			};
- 			hash@2 {
--				algo = \"sha1\";
-+				algo = \"${HASH}\";
- 			};
- 		};
- "
- 	FDT_PROP="fdt = \"fdt@$FDTNUM\";"
- fi
- 
-+if [ -n "${ROOTFS}" ]; then
-+	dd if="${ROOTFS}" of="${ROOTFS}.pagesync" bs=4096 conv=sync
-+	ROOTFS_NODE="
-+		rootfs@$ROOTFSNUM {
-+			description = \"${ARCH_UPPER} OpenWrt ${DEVICE} rootfs\";
-+			${COMPATIBLE_PROP}
-+			data = /incbin/(\"${ROOTFS}.pagesync\");
-+			type = \"filesystem\";
-+			arch = \"${ARCH}\";
-+			compression = \"none\";
-+			hash@1 {
-+				algo = \"crc32\";
-+			};
-+			hash@2 {
-+				algo = \"${HASH}\";
-+			};
-+		};
-+"
-+	ROOTFS_PROP="loadables = \"rootfs@${ROOTFSNUM}\";"
-+fi
-+
- # Create a default, fully populated DTS file
- DATA="/dts-v1/;
- 
-@@ -103,18 +137,21 @@ DATA="/dts-v1/;
- 				algo = \"crc32\";
- 			};
- 			hash@2 {
--				algo = \"sha1\";
-+				algo = \"$HASH\";
- 			};
- 		};
- ${FDT_NODE}
-+${ROOTFS_NODE}
- 	};
- 
- 	configurations {
- 		default = \"${CONFIG}\";
- 		${CONFIG} {
--			description = \"OpenWrt\";
-+			description = \"OpenWrt ${DEVICE}\";
- 			kernel = \"kernel@1\";
- 			${FDT_PROP}
-+			${ROOTFS_PROP}
-+			${COMPATIBLE_PROP}
- 		};
- 	};
- };"
-diff --git a/target/linux/generic/backport-5.10/010-Kbuild-don-t-hardcode-path-to-awk-in-scripts-ld-vers.patch b/target/linux/generic/backport-5.10/010-Kbuild-don-t-hardcode-path-to-awk-in-scripts-ld-vers.patch
-new file mode 100644
-index 0000000000..7ac4f9d240
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/010-Kbuild-don-t-hardcode-path-to-awk-in-scripts-ld-vers.patch
-@@ -0,0 +1,30 @@
-+From 13b1ecc3401653a355798eb1dee10cc1608202f4 Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Mon, 18 Jan 2016 12:27:49 +0100
-+Subject: [PATCH 33/34] Kbuild: don't hardcode path to awk in
-+ scripts/ld-version.sh
-+
-+On some systems /usr/bin/awk does not exist, or is broken. Find it via
-+$PATH instead.
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ scripts/ld-version.sh | 4 +++-
-+ 1 file changed, 3 insertions(+), 1 deletion(-)
-+
-+--- a/scripts/ld-version.sh
-++++ b/scripts/ld-version.sh
-+@@ -1,6 +1,7 @@
-+-#!/usr/bin/awk -f
-++#!/bin/sh
-+ # SPDX-License-Identifier: GPL-2.0
-+ # extract linker version number from stdin and turn into single number
-++exec awk '
-+ 	{
-+ 	gsub(".*\\)", "");
-+ 	gsub(".*version ", "");
-+@@ -9,3 +10,4 @@
-+ 	print a[1]*100000000 + a[2]*1000000 + a[3]*10000;
-+ 	exit
-+ 	}
-++'
-diff --git a/target/linux/generic/backport-5.10/011-kbuild-export-SUBARCH.patch b/target/linux/generic/backport-5.10/011-kbuild-export-SUBARCH.patch
-new file mode 100644
-index 0000000000..bb99e4ddbf
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/011-kbuild-export-SUBARCH.patch
-@@ -0,0 +1,21 @@
-+From 173019b66dcc9d68ad9333aa744dad1e369b5aa8 Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Sun, 9 Jul 2017 00:26:53 +0200
-+Subject: [PATCH 34/34] kernel: add compile fix for linux 4.9 on x86
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ Makefile | 4 ++--
-+ 1 file changed, 2 insertions(+), 2 deletions(-)
-+
-+--- a/Makefile
-++++ b/Makefile
-+@@ -507,7 +507,7 @@ KBUILD_LDFLAGS_MODULE :=
-+ KBUILD_LDFLAGS :=
-+ CLANG_FLAGS :=
-+ 
-+-export ARCH SRCARCH CONFIG_SHELL BASH HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE LD CC
-++export ARCH SRCARCH SUBARCH CONFIG_SHELL BASH HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE LD CC
-+ export CPP AR NM STRIP OBJCOPY OBJDUMP READELF PAHOLE RESOLVE_BTFIDS LEX YACC AWK INSTALLKERNEL
-+ export PERL PYTHON PYTHON3 CHECK CHECKFLAGS MAKE UTS_MACHINE HOSTCXX
-+ export KGZIP KBZIP2 KLZOP LZMA LZ4 XZ ZSTD
-diff --git a/target/linux/generic/backport-5.10/071-crypto-arm-chacha-neon-optimize-for-non-block-size-m.patch b/target/linux/generic/backport-5.10/071-crypto-arm-chacha-neon-optimize-for-non-block-size-m.patch
-new file mode 100644
-index 0000000000..b1f46e9af8
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/071-crypto-arm-chacha-neon-optimize-for-non-block-size-m.patch
-@@ -0,0 +1,272 @@
-+From 03662fcd41f4b764857f17b95f9a2a63c24bddd4 Mon Sep 17 00:00:00 2001
-+From: Ard Biesheuvel <ardb@kernel.org>
-+Date: Tue, 3 Nov 2020 17:28:09 +0100
-+Subject: [PATCH 1/2] crypto: arm/chacha-neon - optimize for non-block size
-+ multiples
-+
-+commit 86cd97ec4b943af35562a74688bc4e909b32c3d1 upstream.
-+
-+The current NEON based ChaCha implementation for ARM is optimized for
-+multiples of 4x the ChaCha block size (64 bytes). This makes sense for
-+block encryption, but given that ChaCha is also often used in the
-+context of networking, it makes sense to consider arbitrary length
-+inputs as well.
-+
-+For example, WireGuard typically uses 1420 byte packets, and performing
-+ChaCha encryption involves 5 invocations of chacha_4block_xor_neon()
-+and 3 invocations of chacha_block_xor_neon(), where the last one also
-+involves a memcpy() using a buffer on the stack to process the final
-+chunk of 1420 % 64 == 12 bytes.
-+
-+Let's optimize for this case as well, by letting chacha_4block_xor_neon()
-+deal with any input size between 64 and 256 bytes, using NEON permutation
-+instructions and overlapping loads and stores. This way, the 140 byte
-+tail of a 1420 byte input buffer can simply be processed in one go.
-+
-+This results in the following performance improvements for 1420 byte
-+blocks, without significant impact on power-of-2 input sizes. (Note
-+that Raspberry Pi is widely used in combination with a 32-bit kernel,
-+even though the core is 64-bit capable)
-+
-+   Cortex-A8  (BeagleBone)       :   7%
-+   Cortex-A15 (Calxeda Midway)   :  21%
-+   Cortex-A53 (Raspberry Pi 3)   :   3%
-+   Cortex-A72 (Raspberry Pi 4)   :  19%
-+
-+Cc: Eric Biggers <ebiggers@google.com>
-+Cc: "Jason A . Donenfeld" <Jason@zx2c4.com>
-+Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
-+Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-+Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
-+---
-+ arch/arm/crypto/chacha-glue.c      | 34 +++++------
-+ arch/arm/crypto/chacha-neon-core.S | 97 +++++++++++++++++++++++++++---
-+ 2 files changed, 107 insertions(+), 24 deletions(-)
-+
-+--- a/arch/arm/crypto/chacha-glue.c
-++++ b/arch/arm/crypto/chacha-glue.c
-+@@ -23,7 +23,7 @@
-+ asmlinkage void chacha_block_xor_neon(const u32 *state, u8 *dst, const u8 *src,
-+ 				      int nrounds);
-+ asmlinkage void chacha_4block_xor_neon(const u32 *state, u8 *dst, const u8 *src,
-+-				       int nrounds);
-++				       int nrounds, unsigned int nbytes);
-+ asmlinkage void hchacha_block_arm(const u32 *state, u32 *out, int nrounds);
-+ asmlinkage void hchacha_block_neon(const u32 *state, u32 *out, int nrounds);
-+ 
-+@@ -42,24 +42,24 @@ static void chacha_doneon(u32 *state, u8
-+ {
-+ 	u8 buf[CHACHA_BLOCK_SIZE];
-+ 
-+-	while (bytes >= CHACHA_BLOCK_SIZE * 4) {
-+-		chacha_4block_xor_neon(state, dst, src, nrounds);
-+-		bytes -= CHACHA_BLOCK_SIZE * 4;
-+-		src += CHACHA_BLOCK_SIZE * 4;
-+-		dst += CHACHA_BLOCK_SIZE * 4;
-+-		state[12] += 4;
-+-	}
-+-	while (bytes >= CHACHA_BLOCK_SIZE) {
-+-		chacha_block_xor_neon(state, dst, src, nrounds);
-+-		bytes -= CHACHA_BLOCK_SIZE;
-+-		src += CHACHA_BLOCK_SIZE;
-+-		dst += CHACHA_BLOCK_SIZE;
-+-		state[12]++;
-++	while (bytes > CHACHA_BLOCK_SIZE) {
-++		unsigned int l = min(bytes, CHACHA_BLOCK_SIZE * 4U);
-++
-++		chacha_4block_xor_neon(state, dst, src, nrounds, l);
-++		bytes -= l;
-++		src += l;
-++		dst += l;
-++		state[12] += DIV_ROUND_UP(l, CHACHA_BLOCK_SIZE);
-+ 	}
-+ 	if (bytes) {
-+-		memcpy(buf, src, bytes);
-+-		chacha_block_xor_neon(state, buf, buf, nrounds);
-+-		memcpy(dst, buf, bytes);
-++		const u8 *s = src;
-++		u8 *d = dst;
-++
-++		if (bytes != CHACHA_BLOCK_SIZE)
-++			s = d = memcpy(buf, src, bytes);
-++		chacha_block_xor_neon(state, d, s, nrounds);
-++		if (d != dst)
-++			memcpy(dst, buf, bytes);
-+ 	}
-+ }
-+ 
-+--- a/arch/arm/crypto/chacha-neon-core.S
-++++ b/arch/arm/crypto/chacha-neon-core.S
-+@@ -47,6 +47,7 @@
-+   */
-+ 
-+ #include <linux/linkage.h>
-++#include <asm/cache.h>
-+ 
-+ 	.text
-+ 	.fpu		neon
-+@@ -205,7 +206,7 @@ ENDPROC(hchacha_block_neon)
-+ 
-+ 	.align		5
-+ ENTRY(chacha_4block_xor_neon)
-+-	push		{r4-r5}
-++	push		{r4, lr}
-+ 	mov		r4, sp			// preserve the stack pointer
-+ 	sub		ip, sp, #0x20		// allocate a 32 byte buffer
-+ 	bic		ip, ip, #0x1f		// aligned to 32 bytes
-+@@ -229,10 +230,10 @@ ENTRY(chacha_4block_xor_neon)
-+ 	vld1.32		{q0-q1}, [r0]
-+ 	vld1.32		{q2-q3}, [ip]
-+ 
-+-	adr		r5, .Lctrinc
-++	adr		lr, .Lctrinc
-+ 	vdup.32		q15, d7[1]
-+ 	vdup.32		q14, d7[0]
-+-	vld1.32		{q4}, [r5, :128]
-++	vld1.32		{q4}, [lr, :128]
-+ 	vdup.32		q13, d6[1]
-+ 	vdup.32		q12, d6[0]
-+ 	vdup.32		q11, d5[1]
-+@@ -455,7 +456,7 @@ ENTRY(chacha_4block_xor_neon)
-+ 
-+ 	// Re-interleave the words in the first two rows of each block (x0..7).
-+ 	// Also add the counter values 0-3 to x12[0-3].
-+-	  vld1.32	{q8}, [r5, :128]	// load counter values 0-3
-++	  vld1.32	{q8}, [lr, :128]	// load counter values 0-3
-+ 	vzip.32		q0, q1			// => (0 1 0 1) (0 1 0 1)
-+ 	vzip.32		q2, q3			// => (2 3 2 3) (2 3 2 3)
-+ 	vzip.32		q4, q5			// => (4 5 4 5) (4 5 4 5)
-+@@ -493,6 +494,8 @@ ENTRY(chacha_4block_xor_neon)
-+ 
-+ 	// Re-interleave the words in the last two rows of each block (x8..15).
-+ 	vld1.32		{q8-q9}, [sp, :256]
-++	  mov		sp, r4		// restore original stack pointer
-++	  ldr		r4, [r4, #8]	// load number of bytes
-+ 	vzip.32		q12, q13	// => (12 13 12 13) (12 13 12 13)
-+ 	vzip.32		q14, q15	// => (14 15 14 15) (14 15 14 15)
-+ 	vzip.32		q8, q9		// => (8 9 8 9) (8 9 8 9)
-+@@ -520,41 +523,121 @@ ENTRY(chacha_4block_xor_neon)
-+ 	// XOR the rest of the data with the keystream
-+ 
-+ 	vld1.8		{q0-q1}, [r2]!
-++	subs		r4, r4, #96
-+ 	veor		q0, q0, q8
-+ 	veor		q1, q1, q12
-++	ble		.Lle96
-+ 	vst1.8		{q0-q1}, [r1]!
-+ 
-+ 	vld1.8		{q0-q1}, [r2]!
-++	subs		r4, r4, #32
-+ 	veor		q0, q0, q2
-+ 	veor		q1, q1, q6
-++	ble		.Lle128
-+ 	vst1.8		{q0-q1}, [r1]!
-+ 
-+ 	vld1.8		{q0-q1}, [r2]!
-++	subs		r4, r4, #32
-+ 	veor		q0, q0, q10
-+ 	veor		q1, q1, q14
-++	ble		.Lle160
-+ 	vst1.8		{q0-q1}, [r1]!
-+ 
-+ 	vld1.8		{q0-q1}, [r2]!
-++	subs		r4, r4, #32
-+ 	veor		q0, q0, q4
-+ 	veor		q1, q1, q5
-++	ble		.Lle192
-+ 	vst1.8		{q0-q1}, [r1]!
-+ 
-+ 	vld1.8		{q0-q1}, [r2]!
-++	subs		r4, r4, #32
-+ 	veor		q0, q0, q9
-+ 	veor		q1, q1, q13
-++	ble		.Lle224
-+ 	vst1.8		{q0-q1}, [r1]!
-+ 
-+ 	vld1.8		{q0-q1}, [r2]!
-++	subs		r4, r4, #32
-+ 	veor		q0, q0, q3
-+ 	veor		q1, q1, q7
-++	blt		.Llt256
-++.Lout:
-+ 	vst1.8		{q0-q1}, [r1]!
-+ 
-+ 	vld1.8		{q0-q1}, [r2]
-+-	  mov		sp, r4		// restore original stack pointer
-+ 	veor		q0, q0, q11
-+ 	veor		q1, q1, q15
-+ 	vst1.8		{q0-q1}, [r1]
-+ 
-+-	pop		{r4-r5}
-+-	bx		lr
-++	pop		{r4, pc}
-++
-++.Lle192:
-++	vmov		q4, q9
-++	vmov		q5, q13
-++
-++.Lle160:
-++	// nothing to do
-++
-++.Lfinalblock:
-++	// Process the final block if processing less than 4 full blocks.
-++	// Entered with 32 bytes of ChaCha cipher stream in q4-q5, and the
-++	// previous 32 byte output block that still needs to be written at
-++	// [r1] in q0-q1.
-++	beq		.Lfullblock
-++
-++.Lpartialblock:
-++	adr		lr, .Lpermute + 32
-++	add		r2, r2, r4
-++	add		lr, lr, r4
-++	add		r4, r4, r1
-++
-++	vld1.8		{q2-q3}, [lr]
-++	vld1.8		{q6-q7}, [r2]
-++
-++	add		r4, r4, #32
-++
-++	vtbl.8		d4, {q4-q5}, d4
-++	vtbl.8		d5, {q4-q5}, d5
-++	vtbl.8		d6, {q4-q5}, d6
-++	vtbl.8		d7, {q4-q5}, d7
-++
-++	veor		q6, q6, q2
-++	veor		q7, q7, q3
-++
-++	vst1.8		{q6-q7}, [r4]	// overlapping stores
-++	vst1.8		{q0-q1}, [r1]
-++	pop		{r4, pc}
-++
-++.Lfullblock:
-++	vmov		q11, q4
-++	vmov		q15, q5
-++	b		.Lout
-++.Lle96:
-++	vmov		q4, q2
-++	vmov		q5, q6
-++	b		.Lfinalblock
-++.Lle128:
-++	vmov		q4, q10
-++	vmov		q5, q14
-++	b		.Lfinalblock
-++.Lle224:
-++	vmov		q4, q3
-++	vmov		q5, q7
-++	b		.Lfinalblock
-++.Llt256:
-++	vmov		q4, q11
-++	vmov		q5, q15
-++	b		.Lpartialblock
-+ ENDPROC(chacha_4block_xor_neon)
-++
-++	.align		L1_CACHE_SHIFT
-++.Lpermute:
-++	.byte		0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07
-++	.byte		0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
-++	.byte		0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17
-++	.byte		0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f
-++	.byte		0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07
-++	.byte		0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
-++	.byte		0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17
-++	.byte		0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f
-diff --git a/target/linux/generic/backport-5.10/072-crypto-arm-chacha-neon-add-missing-counter-increment.patch b/target/linux/generic/backport-5.10/072-crypto-arm-chacha-neon-add-missing-counter-increment.patch
-new file mode 100644
-index 0000000000..1e4d2041e5
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/072-crypto-arm-chacha-neon-add-missing-counter-increment.patch
-@@ -0,0 +1,38 @@
-+From 7f63462faf9eab69132bea9abd48c2c05a93145b Mon Sep 17 00:00:00 2001
-+From: Ard Biesheuvel <ardb@kernel.org>
-+Date: Sun, 13 Dec 2020 15:39:29 +0100
-+Subject: [PATCH 2/2] crypto: arm/chacha-neon - add missing counter increment
-+
-+commit fd16931a2f518a32753920ff20895e5cf04c8ff1 upstream.
-+
-+Commit 86cd97ec4b943af3 ("crypto: arm/chacha-neon - optimize for non-block
-+size multiples") refactored the chacha block handling in the glue code in
-+a way that may result in the counter increment to be omitted when calling
-+chacha_block_xor_neon() to process a full block. This violates the skcipher
-+API, which requires that the output IV is suitable for handling more input
-+as long as the preceding input has been presented in round multiples of the
-+block size. Also, the same code is exposed via the chacha library interface
-+whose callers may actually rely on this increment to occur even for final
-+blocks that are smaller than the chacha block size.
-+
-+So increment the counter after calling chacha_block_xor_neon().
-+
-+Fixes: 86cd97ec4b943af3 ("crypto: arm/chacha-neon - optimize for non-block size multiples")
-+Reported-by: Eric Biggers <ebiggers@kernel.org>
-+Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
-+Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-+Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
-+---
-+ arch/arm/crypto/chacha-glue.c | 1 +
-+ 1 file changed, 1 insertion(+)
-+
-+--- a/arch/arm/crypto/chacha-glue.c
-++++ b/arch/arm/crypto/chacha-glue.c
-+@@ -60,6 +60,7 @@ static void chacha_doneon(u32 *state, u8
-+ 		chacha_block_xor_neon(state, d, s, nrounds);
-+ 		if (d != dst)
-+ 			memcpy(dst, buf, bytes);
-++		state[12]++;
-+ 	}
-+ }
-+ 
-diff --git a/target/linux/generic/backport-5.10/080-wireguard-peer-put-frequently-used-members-above-cac.patch b/target/linux/generic/backport-5.10/080-wireguard-peer-put-frequently-used-members-above-cac.patch
-new file mode 100644
-index 0000000000..444fd677b4
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/080-wireguard-peer-put-frequently-used-members-above-cac.patch
-@@ -0,0 +1,42 @@
-+From a13827e9091c07e25cdeec9a402d74a27e2a1111 Mon Sep 17 00:00:00 2001
-+From: "Jason A. Donenfeld" <Jason@zx2c4.com>
-+Date: Mon, 22 Feb 2021 17:25:46 +0100
-+Subject: [PATCH] wireguard: peer: put frequently used members above cache
-+ lines
-+
-+commit 5a0598695634a6bb4126818902dd9140cd9df8b6 upstream.
-+
-+The is_dead boolean is checked for every single packet, while the
-+internal_id member is used basically only for pr_debug messages. So it
-+makes sense to hoist up is_dead into some space formerly unused by a
-+struct hole, while demoting internal_api to below the lowest struct
-+cache line.
-+
-+Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
-+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
-+Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
-+---
-+ drivers/net/wireguard/peer.h | 4 ++--
-+ 1 file changed, 2 insertions(+), 2 deletions(-)
-+
-+--- a/drivers/net/wireguard/peer.h
-++++ b/drivers/net/wireguard/peer.h
-+@@ -39,6 +39,7 @@ struct wg_peer {
-+ 	struct prev_queue tx_queue, rx_queue;
-+ 	struct sk_buff_head staged_packet_queue;
-+ 	int serial_work_cpu;
-++	bool is_dead;
-+ 	struct noise_keypairs keypairs;
-+ 	struct endpoint endpoint;
-+ 	struct dst_cache endpoint_cache;
-+@@ -61,9 +62,8 @@ struct wg_peer {
-+ 	struct rcu_head rcu;
-+ 	struct list_head peer_list;
-+ 	struct list_head allowedips_list;
-+-	u64 internal_id;
-+ 	struct napi_struct napi;
-+-	bool is_dead;
-++	u64 internal_id;
-+ };
-+ 
-+ struct wg_peer *wg_peer_create(struct wg_device *wg,
-diff --git a/target/linux/generic/backport-5.10/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch b/target/linux/generic/backport-5.10/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch
-new file mode 100644
-index 0000000000..137264cb9f
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch
-@@ -0,0 +1,106 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Thu, 25 Jan 2018 12:58:55 +0100
-+Subject: [PATCH] netfilter: nft_flow_offload: handle netdevice events from
-+ nf_flow_table
-+
-+Move the code that deals with device events to the core.
-+
-+Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
-+---
-+
-+--- a/net/netfilter/nf_flow_table_core.c
-++++ b/net/netfilter/nf_flow_table_core.c
-+@@ -577,13 +577,41 @@ void nf_flow_table_free(struct nf_flowta
-+ }
-+ EXPORT_SYMBOL_GPL(nf_flow_table_free);
-+ 
-++static int nf_flow_table_netdev_event(struct notifier_block *this,
-++				      unsigned long event, void *ptr)
-++{
-++	struct net_device *dev = netdev_notifier_info_to_dev(ptr);
-++
-++	if (event != NETDEV_DOWN)
-++		return NOTIFY_DONE;
-++
-++	nf_flow_table_cleanup(dev);
-++
-++	return NOTIFY_DONE;
-++}
-++
-++static struct notifier_block flow_offload_netdev_notifier = {
-++	.notifier_call	= nf_flow_table_netdev_event,
-++};
-++
-+ static int __init nf_flow_table_module_init(void)
-+ {
-+-	return nf_flow_table_offload_init();
-++	int ret;
-++
-++	ret = nf_flow_table_offload_init();
-++	if (ret)
-++		return ret;
-++
-++	ret = register_netdevice_notifier(&flow_offload_netdev_notifier);
-++	if (ret)
-++		nf_flow_table_offload_exit();
-++
-++	return ret;
-+ }
-+ 
-+ static void __exit nf_flow_table_module_exit(void)
-+ {
-++	unregister_netdevice_notifier(&flow_offload_netdev_notifier);
-+ 	nf_flow_table_offload_exit();
-+ }
-+ 
-+--- a/net/netfilter/nft_flow_offload.c
-++++ b/net/netfilter/nft_flow_offload.c
-+@@ -237,47 +237,14 @@ static struct nft_expr_type nft_flow_off
-+ 	.owner		= THIS_MODULE,
-+ };
-+ 
-+-static int flow_offload_netdev_event(struct notifier_block *this,
-+-				     unsigned long event, void *ptr)
-+-{
-+-	struct net_device *dev = netdev_notifier_info_to_dev(ptr);
-+-
-+-	if (event != NETDEV_DOWN)
-+-		return NOTIFY_DONE;
-+-
-+-	nf_flow_table_cleanup(dev);
-+-
-+-	return NOTIFY_DONE;
-+-}
-+-
-+-static struct notifier_block flow_offload_netdev_notifier = {
-+-	.notifier_call	= flow_offload_netdev_event,
-+-};
-+-
-+ static int __init nft_flow_offload_module_init(void)
-+ {
-+-	int err;
-+-
-+-	err = register_netdevice_notifier(&flow_offload_netdev_notifier);
-+-	if (err)
-+-		goto err;
-+-
-+-	err = nft_register_expr(&nft_flow_offload_type);
-+-	if (err < 0)
-+-		goto register_expr;
-+-
-+-	return 0;
-+-
-+-register_expr:
-+-	unregister_netdevice_notifier(&flow_offload_netdev_notifier);
-+-err:
-+-	return err;
-++	return nft_register_expr(&nft_flow_offload_type);
-+ }
-+ 
-+ static void __exit nft_flow_offload_module_exit(void)
-+ {
-+ 	nft_unregister_expr(&nft_flow_offload_type);
-+-	unregister_netdevice_notifier(&flow_offload_netdev_notifier);
-+ }
-+ 
-+ module_init(nft_flow_offload_module_init);
-diff --git a/target/linux/generic/backport-5.10/401-v5.11-dt-bindings-mtd-convert-fixed-partitions-to-the-json.patch b/target/linux/generic/backport-5.10/401-v5.11-dt-bindings-mtd-convert-fixed-partitions-to-the-json.patch
-new file mode 100644
-index 0000000000..8aded43526
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/401-v5.11-dt-bindings-mtd-convert-fixed-partitions-to-the-json.patch
-@@ -0,0 +1,324 @@
-+From 04e9ab75267489224364fa510a88ada83e11c325 Mon Sep 17 00:00:00 2001
-+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-+Date: Thu, 10 Dec 2020 18:23:52 +0100
-+Subject: [PATCH] dt-bindings: mtd: convert "fixed-partitions" to the
-+ json-schema
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+This standardizes its documentation, allows validating with Makefile
-+checks and helps writing DTS files.
-+
-+Noticeable changes:
-+1. Dropped "Partitions can be represented by sub-nodes of a flash
-+   device." as we also support subpartitions (don't have to be part of
-+   flash device node)
-+2. Dropped "to Linux" as bindings are meant to be os agnostic.
-+
-+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-+Link: https://lore.kernel.org/r/20201210172352.31632-1-zajec5@gmail.com
-+Signed-off-by: Rob Herring <robh@kernel.org>
-+---
-+ .../devicetree/bindings/mtd/partition.txt     | 131 +--------------
-+ .../mtd/partitions/fixed-partitions.yaml      | 152 ++++++++++++++++++
-+ 2 files changed, 154 insertions(+), 129 deletions(-)
-+ create mode 100644 Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml
-+
-+--- a/Documentation/devicetree/bindings/mtd/partition.txt
-++++ b/Documentation/devicetree/bindings/mtd/partition.txt
-+@@ -24,137 +24,10 @@ another partitioning method.
-+ Available bindings are listed in the "partitions" subdirectory.
-+ 
-+ 
-+-Fixed Partitions
-+-================
-+-
-+-Partitions can be represented by sub-nodes of a flash device. This can be used
-+-on platforms which have strong conventions about which portions of a flash are
-+-used for what purposes, but which don't use an on-flash partition table such
-+-as RedBoot.
-+-
-+-The partition table should be a subnode of the flash node and should be named
-+-'partitions'. This node should have the following property:
-+-- compatible : (required) must be "fixed-partitions"
-+-Partitions are then defined in subnodes of the partitions node.
-++Deprecated: partitions defined in flash node
-++============================================
-+ 
-+ For backwards compatibility partitions as direct subnodes of the flash device are
-+ supported. This use is discouraged.
-+ NOTE: also for backwards compatibility, direct subnodes that have a compatible
-+ string are not considered partitions, as they may be used for other bindings.
-+-
-+-#address-cells & #size-cells must both be present in the partitions subnode of the
-+-flash device. There are two valid values for both:
-+-<1>: for partitions that require a single 32-bit cell to represent their
-+-     size/address (aka the value is below 4 GiB)
-+-<2>: for partitions that require two 32-bit cells to represent their
-+-     size/address (aka the value is 4 GiB or greater).
-+-
-+-Required properties:
-+-- reg : The partition's offset and size within the flash
-+-
-+-Optional properties:
-+-- label : The label / name for this partition.  If omitted, the label is taken
-+-  from the node name (excluding the unit address).
-+-- read-only : This parameter, if present, is a hint to Linux that this
-+-  partition should only be mounted read-only. This is usually used for flash
-+-  partitions containing early-boot firmware images or data which should not be
-+-  clobbered.
-+-- lock : Do not unlock the partition at initialization time (not supported on
-+-  all devices)
-+-- slc-mode: This parameter, if present, allows one to emulate SLC mode on a
-+-  partition attached to an MLC NAND thus making this partition immune to
-+-  paired-pages corruptions
-+-
-+-Examples:
-+-
-+-
-+-flash@0 {
-+-	partitions {
-+-		compatible = "fixed-partitions";
-+-		#address-cells = <1>;
-+-		#size-cells = <1>;
-+-
-+-		partition@0 {
-+-			label = "u-boot";
-+-			reg = <0x0000000 0x100000>;
-+-			read-only;
-+-		};
-+-
-+-		uimage@100000 {
-+-			reg = <0x0100000 0x200000>;
-+-		};
-+-	};
-+-};
-+-
-+-flash@1 {
-+-	partitions {
-+-		compatible = "fixed-partitions";
-+-		#address-cells = <1>;
-+-		#size-cells = <2>;
-+-
-+-		/* a 4 GiB partition */
-+-		partition@0 {
-+-			label = "filesystem";
-+-			reg = <0x00000000 0x1 0x00000000>;
-+-		};
-+-	};
-+-};
-+-
-+-flash@2 {
-+-	partitions {
-+-		compatible = "fixed-partitions";
-+-		#address-cells = <2>;
-+-		#size-cells = <2>;
-+-
-+-		/* an 8 GiB partition */
-+-		partition@0 {
-+-			label = "filesystem #1";
-+-			reg = <0x0 0x00000000 0x2 0x00000000>;
-+-		};
-+-
-+-		/* a 4 GiB partition */
-+-		partition@200000000 {
-+-			label = "filesystem #2";
-+-			reg = <0x2 0x00000000 0x1 0x00000000>;
-+-		};
-+-	};
-+-};
-+-
-+-flash@3 {
-+-	partitions {
-+-		compatible = "fixed-partitions";
-+-		#address-cells = <1>;
-+-		#size-cells = <1>;
-+-
-+-		partition@0 {
-+-			label = "bootloader";
-+-			reg = <0x000000 0x100000>;
-+-			read-only;
-+-		};
-+-
-+-		firmware@100000 {
-+-			label = "firmware";
-+-			reg = <0x100000 0xe00000>;
-+-			compatible = "brcm,trx";
-+-		};
-+-
-+-		calibration@f00000 {
-+-			label = "calibration";
-+-			reg = <0xf00000 0x100000>;
-+-			compatible = "fixed-partitions";
-+-			ranges = <0 0xf00000 0x100000>;
-+-			#address-cells = <1>;
-+-			#size-cells = <1>;
-+-
-+-			partition@0 {
-+-				label = "wifi0";
-+-				reg = <0x000000 0x080000>;
-+-			};
-+-
-+-			partition@80000 {
-+-				label = "wifi1";
-+-				reg = <0x080000 0x080000>;
-+-			};
-+-		};
-+-	};
-+-};
-+--- /dev/null
-++++ b/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml
-+@@ -0,0 +1,152 @@
-++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
-++%YAML 1.2
-++---
-++$id: http://devicetree.org/schemas/mtd/partitions/fixed-partitions.yaml#
-++$schema: http://devicetree.org/meta-schemas/core.yaml#
-++
-++title: Fixed partitions
-++
-++description: |
-++  This binding can be used on platforms which have strong conventions about
-++  which portions of a flash are used for what purposes, but which don't use an
-++  on-flash partition table such as RedBoot.
-++
-++  The partition table should be a node named "partitions". Partitions are then
-++  defined as subnodes.
-++
-++maintainers:
-++  - Rafał Miłecki <rafal@milecki.pl>
-++
-++properties:
-++  compatible:
-++    const: fixed-partitions
-++
-++  "#address-cells": true
-++
-++  "#size-cells": true
-++
-++patternProperties:
-++  "@[0-9a-f]+$":
-++    description: node describing a single flash partition
-++    type: object
-++
-++    properties:
-++      reg:
-++        description: partition's offset and size within the flash
-++        maxItems: 1
-++
-++      label:
-++        description: The label / name for this partition. If omitted, the label
-++          is taken from the node name (excluding the unit address).
-++
-++      read-only:
-++        description: This parameter, if present, is a hint that this partition
-++          should only be mounted read-only. This is usually used for flash
-++          partitions containing early-boot firmware images or data which should
-++          not be clobbered.
-++        type: boolean
-++
-++      lock:
-++        description: Do not unlock the partition at initialization time (not
-++          supported on all devices)
-++        type: boolean
-++
-++      slc-mode:
-++        description: This parameter, if present, allows one to emulate SLC mode
-++          on a partition attached to an MLC NAND thus making this partition
-++          immune to paired-pages corruptions
-++        type: boolean
-++
-++    required:
-++      - reg
-++
-++required:
-++  - "#address-cells"
-++  - "#size-cells"
-++
-++additionalProperties: true
-++
-++examples:
-++  - |
-++    partitions {
-++        compatible = "fixed-partitions";
-++        #address-cells = <1>;
-++        #size-cells = <1>;
-++
-++        partition@0 {
-++            label = "u-boot";
-++            reg = <0x0000000 0x100000>;
-++            read-only;
-++        };
-++
-++        uimage@100000 {
-++            reg = <0x0100000 0x200000>;
-++        };
-++    };
-++  - |
-++    partitions {
-++        compatible = "fixed-partitions";
-++        #address-cells = <1>;
-++        #size-cells = <2>;
-++
-++        /* a 4 GiB partition */
-++        partition@0 {
-++            label = "filesystem";
-++            reg = <0x00000000 0x1 0x00000000>;
-++        };
-++    };
-++  - |
-++    partitions {
-++        compatible = "fixed-partitions";
-++        #address-cells = <2>;
-++        #size-cells = <2>;
-++
-++        /* an 8 GiB partition */
-++        partition@0 {
-++            label = "filesystem #1";
-++            reg = <0x0 0x00000000 0x2 0x00000000>;
-++        };
-++
-++        /* a 4 GiB partition */
-++        partition@200000000 {
-++            label = "filesystem #2";
-++            reg = <0x2 0x00000000 0x1 0x00000000>;
-++        };
-++    };
-++  - |
-++    partitions {
-++        compatible = "fixed-partitions";
-++        #address-cells = <1>;
-++        #size-cells = <1>;
-++
-++        partition@0 {
-++            label = "bootloader";
-++            reg = <0x000000 0x100000>;
-++            read-only;
-++        };
-++
-++        firmware@100000 {
-++            compatible = "brcm,trx";
-++            label = "firmware";
-++            reg = <0x100000 0xe00000>;
-++        };
-++
-++        calibration@f00000 {
-++            compatible = "fixed-partitions";
-++            label = "calibration";
-++            reg = <0xf00000 0x100000>;
-++            ranges = <0 0xf00000 0x100000>;
-++            #address-cells = <1>;
-++            #size-cells = <1>;
-++
-++            partition@0 {
-++                label = "wifi0";
-++                reg = <0x000000 0x080000>;
-++            };
-++
-++            partition@80000 {
-++                label = "wifi1";
-++                reg = <0x080000 0x080000>;
-++            };
-++        };
-++    };
-diff --git a/target/linux/generic/backport-5.10/402-v5.12-0001-dt-bindings-mtd-move-partition-binding-to-its-own-fi.patch b/target/linux/generic/backport-5.10/402-v5.12-0001-dt-bindings-mtd-move-partition-binding-to-its-own-fi.patch
-new file mode 100644
-index 0000000000..f3b1179ecd
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/402-v5.12-0001-dt-bindings-mtd-move-partition-binding-to-its-own-fi.patch
-@@ -0,0 +1,115 @@
-+From 6418522022c706fd867b00b2571edba48b8fa8c7 Mon Sep 17 00:00:00 2001
-+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-+Date: Thu, 11 Feb 2021 23:04:25 +0100
-+Subject: [PATCH] dt-bindings: mtd: move partition binding to its own file
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+Single partition binding is quite common and may be:
-+1. Used by multiple parsers
-+2. Extended for more specific cases
-+
-+Move it to separated file to avoid code duplication.
-+
-+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-+Reviewed-by: Rob Herring <robh@kernel.org>
-+Signed-off-by: Richard Weinberger <richard@nod.at>
-+---
-+ .../mtd/partitions/fixed-partitions.yaml      | 33 +------------
-+ .../bindings/mtd/partitions/partition.yaml    | 47 +++++++++++++++++++
-+ 2 files changed, 48 insertions(+), 32 deletions(-)
-+ create mode 100644 Documentation/devicetree/bindings/mtd/partitions/partition.yaml
-+
-+--- a/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml
-++++ b/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml
-+@@ -27,38 +27,7 @@ properties:
-+ 
-+ patternProperties:
-+   "@[0-9a-f]+$":
-+-    description: node describing a single flash partition
-+-    type: object
-+-
-+-    properties:
-+-      reg:
-+-        description: partition's offset and size within the flash
-+-        maxItems: 1
-+-
-+-      label:
-+-        description: The label / name for this partition. If omitted, the label
-+-          is taken from the node name (excluding the unit address).
-+-
-+-      read-only:
-+-        description: This parameter, if present, is a hint that this partition
-+-          should only be mounted read-only. This is usually used for flash
-+-          partitions containing early-boot firmware images or data which should
-+-          not be clobbered.
-+-        type: boolean
-+-
-+-      lock:
-+-        description: Do not unlock the partition at initialization time (not
-+-          supported on all devices)
-+-        type: boolean
-+-
-+-      slc-mode:
-+-        description: This parameter, if present, allows one to emulate SLC mode
-+-          on a partition attached to an MLC NAND thus making this partition
-+-          immune to paired-pages corruptions
-+-        type: boolean
-+-
-+-    required:
-+-      - reg
-++    $ref: "partition.yaml#"
-+ 
-+ required:
-+   - "#address-cells"
-+--- /dev/null
-++++ b/Documentation/devicetree/bindings/mtd/partitions/partition.yaml
-+@@ -0,0 +1,47 @@
-++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
-++%YAML 1.2
-++---
-++$id: http://devicetree.org/schemas/mtd/partitions/partition.yaml#
-++$schema: http://devicetree.org/meta-schemas/core.yaml#
-++
-++title: Partition
-++
-++description: |
-++  This binding describes a single flash partition. Each partition must have its
-++  relative offset and size specified. Depending on partition function extra
-++  properties can be used.
-++
-++maintainers:
-++  - Rafał Miłecki <rafal@milecki.pl>
-++
-++properties:
-++  reg:
-++    description: partition's offset and size within the flash
-++    maxItems: 1
-++
-++  label:
-++    description: The label / name for this partition. If omitted, the label
-++      is taken from the node name (excluding the unit address).
-++
-++  read-only:
-++    description: This parameter, if present, is a hint that this partition
-++      should only be mounted read-only. This is usually used for flash
-++      partitions containing early-boot firmware images or data which should
-++      not be clobbered.
-++    type: boolean
-++
-++  lock:
-++    description: Do not unlock the partition at initialization time (not
-++      supported on all devices)
-++    type: boolean
-++
-++  slc-mode:
-++    description: This parameter, if present, allows one to emulate SLC mode
-++      on a partition attached to an MLC NAND thus making this partition
-++      immune to paired-pages corruptions
-++    type: boolean
-++
-++required:
-++  - reg
-++
-++additionalProperties: true
-diff --git a/target/linux/generic/backport-5.10/402-v5.12-0002-dt-bindings-mtd-add-binding-for-BCM4908-partitions.patch b/target/linux/generic/backport-5.10/402-v5.12-0002-dt-bindings-mtd-add-binding-for-BCM4908-partitions.patch
-new file mode 100644
-index 0000000000..8576c7d78d
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/402-v5.12-0002-dt-bindings-mtd-add-binding-for-BCM4908-partitions.patch
-@@ -0,0 +1,92 @@
-+From 6e9dff6fe3fbc452f16566e4a7e293b0decefdba Mon Sep 17 00:00:00 2001
-+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-+Date: Thu, 11 Feb 2021 23:04:26 +0100
-+Subject: [PATCH] dt-bindings: mtd: add binding for BCM4908 partitions
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+BCM4908 uses fixed partitions layout but function of some partitions may
-+vary. Some devices use multiple firmware partitions and those partitions
-+should be marked to let system discover their purpose.
-+
-+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-+Signed-off-by: Richard Weinberger <richard@nod.at>
-+---
-+ .../partitions/brcm,bcm4908-partitions.yaml   | 70 +++++++++++++++++++
-+ 1 file changed, 70 insertions(+)
-+ create mode 100644 Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml
-+
-+--- /dev/null
-++++ b/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml
-+@@ -0,0 +1,70 @@
-++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
-++%YAML 1.2
-++---
-++$id: http://devicetree.org/schemas/mtd/partitions/brcm,bcm4908-partitions.yaml#
-++$schema: http://devicetree.org/meta-schemas/core.yaml#
-++
-++title: Broadcom BCM4908 partitioning
-++
-++description: |
-++  Broadcom BCM4908 CFE bootloader supports two firmware partitions. One is used
-++  for regular booting, the other is treated as fallback.
-++
-++  This binding allows defining all fixed partitions and marking those containing
-++  firmware. System can use that information e.g. for booting or flashing
-++  purposes.
-++
-++maintainers:
-++  - Rafał Miłecki <rafal@milecki.pl>
-++
-++properties:
-++  compatible:
-++    const: brcm,bcm4908-partitions
-++
-++  "#address-cells":
-++    enum: [ 1, 2 ]
-++
-++  "#size-cells":
-++    enum: [ 1, 2 ]
-++
-++patternProperties:
-++  "^partition@[0-9a-f]+$":
-++    $ref: "partition.yaml#"
-++    properties:
-++      compatible:
-++        const: brcm,bcm4908-firmware
-++    unevaluatedProperties: false
-++
-++required:
-++  - "#address-cells"
-++  - "#size-cells"
-++
-++additionalProperties: false
-++
-++examples:
-++  - |
-++    partitions {
-++        compatible = "brcm,bcm4908-partitions";
-++        #address-cells = <1>;
-++        #size-cells = <1>;
-++
-++        partition@0 {
-++            label = "cferom";
-++            reg = <0x0 0x100000>;
-++        };
-++
-++        partition@100000 {
-++            compatible = "brcm,bcm4908-firmware";
-++            reg = <0x100000 0xf00000>;
-++        };
-++
-++        partition@1000000 {
-++            compatible = "brcm,bcm4908-firmware";
-++            reg = <0x1000000 0xf00000>;
-++        };
-++
-++        partition@1f00000 {
-++            label = "calibration";
-++            reg = <0x1f00000 0x100000>;
-++        };
-++    };
-diff --git a/target/linux/generic/backport-5.10/403-v5.13-mtd-parsers-ofpart-support-BCM4908-fixed-partitions.patch b/target/linux/generic/backport-5.10/403-v5.13-mtd-parsers-ofpart-support-BCM4908-fixed-partitions.patch
-new file mode 100644
-index 0000000000..d3891228e2
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/403-v5.13-mtd-parsers-ofpart-support-BCM4908-fixed-partitions.patch
-@@ -0,0 +1,654 @@
-+From afbef8efb591792579c633a7c545f914c6165f82 Mon Sep 17 00:00:00 2001
-+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-+Date: Thu, 11 Feb 2021 23:04:27 +0100
-+Subject: [PATCH] mtd: parsers: ofpart: support BCM4908 fixed partitions
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+Some devices use fixed partitioning with some partitions requiring some
-+extra logic. E.g. BCM4908 may have multiple firmware partitions but
-+detecting currently used one requires checking bootloader parameters.
-+
-+To support such cases without duplicating a lot of code (without copying
-+most of the ofpart.c code) support for post-parsing callback was added.
-+
-+BCM4908 support in ofpart can be enabled using config option and results
-+in compiling & executing a specific callback. It simply reads offset of
-+currently used firmware partition from the DT. Bootloader specifies it
-+using the "brcm_blparms" property.
-+
-+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-+---
-+ drivers/mtd/parsers/Kconfig                   |  9 +++
-+ drivers/mtd/parsers/Makefile                  |  2 +
-+ drivers/mtd/parsers/ofpart_bcm4908.c          | 64 +++++++++++++++++++
-+ drivers/mtd/parsers/ofpart_bcm4908.h          | 15 +++++
-+ .../mtd/parsers/{ofpart.c => ofpart_core.c}   | 28 +++++++-
-+ 5 files changed, 116 insertions(+), 2 deletions(-)
-+ create mode 100644 drivers/mtd/parsers/ofpart_bcm4908.c
-+ create mode 100644 drivers/mtd/parsers/ofpart_bcm4908.h
-+ rename drivers/mtd/parsers/{ofpart.c => ofpart_core.c} (88%)
-+
-+--- a/drivers/mtd/parsers/Kconfig
-++++ b/drivers/mtd/parsers/Kconfig
-+@@ -67,6 +67,15 @@ config MTD_OF_PARTS
-+ 	  flash memory node, as described in
-+ 	  Documentation/devicetree/bindings/mtd/partition.txt.
-+ 
-++config MTD_OF_PARTS_BCM4908
-++	bool "BCM4908 partitioning support"
-++	depends on MTD_OF_PARTS && (ARCH_BCM4908 || COMPILE_TEST)
-++	default ARCH_BCM4908
-++	help
-++	  This provides partitions parser for BCM4908 family devices
-++	  that can have multiple "firmware" partitions. It takes care of
-++	  finding currently used one and backup ones.
-++
-+ config MTD_PARSER_IMAGETAG
-+ 	tristate "Parser for BCM963XX Image Tag format partitions"
-+ 	depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST
-+--- a/drivers/mtd/parsers/Makefile
-++++ b/drivers/mtd/parsers/Makefile
-+@@ -4,6 +4,8 @@ obj-$(CONFIG_MTD_BCM47XX_PARTS)		+= bcm4
-+ obj-$(CONFIG_MTD_BCM63XX_PARTS)		+= bcm63xxpart.o
-+ obj-$(CONFIG_MTD_CMDLINE_PARTS)		+= cmdlinepart.o
-+ obj-$(CONFIG_MTD_OF_PARTS)		+= ofpart.o
-++ofpart-y				+= ofpart_core.o
-++ofpart-$(CONFIG_MTD_OF_PARTS_BCM4908)	+= ofpart_bcm4908.o
-+ obj-$(CONFIG_MTD_PARSER_IMAGETAG)	+= parser_imagetag.o
-+ obj-$(CONFIG_MTD_AFS_PARTS)		+= afs.o
-+ obj-$(CONFIG_MTD_PARSER_TRX)		+= parser_trx.o
-+--- /dev/null
-++++ b/drivers/mtd/parsers/ofpart_bcm4908.c
-+@@ -0,0 +1,64 @@
-++// SPDX-License-Identifier: GPL-2.0
-++/*
-++ * Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl>
-++ */
-++
-++#include <linux/module.h>
-++#include <linux/init.h>
-++#include <linux/of.h>
-++#include <linux/mtd/mtd.h>
-++#include <linux/slab.h>
-++#include <linux/mtd/partitions.h>
-++
-++#include "ofpart_bcm4908.h"
-++
-++#define BLPARAMS_FW_OFFSET		"NAND_RFS_OFS"
-++
-++static long long bcm4908_partitions_fw_offset(void)
-++{
-++	struct device_node *root;
-++	struct property *prop;
-++	const char *s;
-++
-++	root = of_find_node_by_path("/");
-++	if (!root)
-++		return -ENOENT;
-++
-++	of_property_for_each_string(root, "brcm_blparms", prop, s) {
-++		size_t len = strlen(BLPARAMS_FW_OFFSET);
-++		unsigned long offset;
-++		int err;
-++
-++		if (strncmp(s, BLPARAMS_FW_OFFSET, len) || s[len] != '=')
-++			continue;
-++
-++		err = kstrtoul(s + len + 1, 0, &offset);
-++		if (err) {
-++			pr_err("failed to parse %s\n", s + len + 1);
-++			return err;
-++		}
-++
-++		return offset << 10;
-++	}
-++
-++	return -ENOENT;
-++}
-++
-++int bcm4908_partitions_post_parse(struct mtd_info *mtd, struct mtd_partition *parts, int nr_parts)
-++{
-++	long long fw_offset;
-++	int i;
-++
-++	fw_offset = bcm4908_partitions_fw_offset();
-++
-++	for (i = 0; i < nr_parts; i++) {
-++		if (of_device_is_compatible(parts[i].of_node, "brcm,bcm4908-firmware")) {
-++			if (fw_offset < 0 || parts[i].offset == fw_offset)
-++				parts[i].name = "firmware";
-++			else
-++				parts[i].name = "backup";
-++		}
-++	}
-++
-++	return 0;
-++}
-+--- /dev/null
-++++ b/drivers/mtd/parsers/ofpart_bcm4908.h
-+@@ -0,0 +1,15 @@
-++/* SPDX-License-Identifier: GPL-2.0 */
-++#ifndef __BCM4908_PARTITIONS_H
-++#define __BCM4908_PARTITIONS_H
-++
-++#ifdef CONFIG_MTD_OF_PARTS_BCM4908
-++int bcm4908_partitions_post_parse(struct mtd_info *mtd, struct mtd_partition *parts, int nr_parts);
-++#else
-++static inline int bcm4908_partitions_post_parse(struct mtd_info *mtd, struct mtd_partition *parts,
-++						int nr_parts)
-++{
-++	return -EOPNOTSUPP;
-++}
-++#endif
-++
-++#endif
-+--- a/drivers/mtd/parsers/ofpart.c
-++++ /dev/null
-+@@ -1,239 +0,0 @@
-+-// SPDX-License-Identifier: GPL-2.0-or-later
-+-/*
-+- * Flash partitions described by the OF (or flattened) device tree
-+- *
-+- * Copyright © 2006 MontaVista Software Inc.
-+- * Author: Vitaly Wool <vwool@ru.mvista.com>
-+- *
-+- * Revised to handle newer style flash binding by:
-+- *   Copyright © 2007 David Gibson, IBM Corporation.
-+- */
-+-
-+-#include <linux/module.h>
-+-#include <linux/init.h>
-+-#include <linux/of.h>
-+-#include <linux/mtd/mtd.h>
-+-#include <linux/slab.h>
-+-#include <linux/mtd/partitions.h>
-+-
-+-static bool node_has_compatible(struct device_node *pp)
-+-{
-+-	return of_get_property(pp, "compatible", NULL);
-+-}
-+-
-+-static int parse_fixed_partitions(struct mtd_info *master,
-+-				  const struct mtd_partition **pparts,
-+-				  struct mtd_part_parser_data *data)
-+-{
-+-	struct mtd_partition *parts;
-+-	struct device_node *mtd_node;
-+-	struct device_node *ofpart_node;
-+-	const char *partname;
-+-	struct device_node *pp;
-+-	int nr_parts, i, ret = 0;
-+-	bool dedicated = true;
-+-
-+-
-+-	/* Pull of_node from the master device node */
-+-	mtd_node = mtd_get_of_node(master);
-+-	if (!mtd_node)
-+-		return 0;
-+-
-+-	ofpart_node = of_get_child_by_name(mtd_node, "partitions");
-+-	if (!ofpart_node) {
-+-		/*
-+-		 * We might get here even when ofpart isn't used at all (e.g.,
-+-		 * when using another parser), so don't be louder than
-+-		 * KERN_DEBUG
-+-		 */
-+-		pr_debug("%s: 'partitions' subnode not found on %pOF. Trying to parse direct subnodes as partitions.\n",
-+-			 master->name, mtd_node);
-+-		ofpart_node = mtd_node;
-+-		dedicated = false;
-+-	} else if (!of_device_is_compatible(ofpart_node, "fixed-partitions")) {
-+-		/* The 'partitions' subnode might be used by another parser */
-+-		return 0;
-+-	}
-+-
-+-	/* First count the subnodes */
-+-	nr_parts = 0;
-+-	for_each_child_of_node(ofpart_node,  pp) {
-+-		if (!dedicated && node_has_compatible(pp))
-+-			continue;
-+-
-+-		nr_parts++;
-+-	}
-+-
-+-	if (nr_parts == 0)
-+-		return 0;
-+-
-+-	parts = kcalloc(nr_parts, sizeof(*parts), GFP_KERNEL);
-+-	if (!parts)
-+-		return -ENOMEM;
-+-
-+-	i = 0;
-+-	for_each_child_of_node(ofpart_node,  pp) {
-+-		const __be32 *reg;
-+-		int len;
-+-		int a_cells, s_cells;
-+-
-+-		if (!dedicated && node_has_compatible(pp))
-+-			continue;
-+-
-+-		reg = of_get_property(pp, "reg", &len);
-+-		if (!reg) {
-+-			if (dedicated) {
-+-				pr_debug("%s: ofpart partition %pOF (%pOF) missing reg property.\n",
-+-					 master->name, pp,
-+-					 mtd_node);
-+-				goto ofpart_fail;
-+-			} else {
-+-				nr_parts--;
-+-				continue;
-+-			}
-+-		}
-+-
-+-		a_cells = of_n_addr_cells(pp);
-+-		s_cells = of_n_size_cells(pp);
-+-		if (len / 4 != a_cells + s_cells) {
-+-			pr_debug("%s: ofpart partition %pOF (%pOF) error parsing reg property.\n",
-+-				 master->name, pp,
-+-				 mtd_node);
-+-			goto ofpart_fail;
-+-		}
-+-
-+-		parts[i].offset = of_read_number(reg, a_cells);
-+-		parts[i].size = of_read_number(reg + a_cells, s_cells);
-+-		parts[i].of_node = pp;
-+-
-+-		partname = of_get_property(pp, "label", &len);
-+-		if (!partname)
-+-			partname = of_get_property(pp, "name", &len);
-+-		parts[i].name = partname;
-+-
-+-		if (of_get_property(pp, "read-only", &len))
-+-			parts[i].mask_flags |= MTD_WRITEABLE;
-+-
-+-		if (of_get_property(pp, "lock", &len))
-+-			parts[i].mask_flags |= MTD_POWERUP_LOCK;
-+-
-+-		if (of_property_read_bool(pp, "slc-mode"))
-+-			parts[i].add_flags |= MTD_SLC_ON_MLC_EMULATION;
-+-
-+-		i++;
-+-	}
-+-
-+-	if (!nr_parts)
-+-		goto ofpart_none;
-+-
-+-	*pparts = parts;
-+-	return nr_parts;
-+-
-+-ofpart_fail:
-+-	pr_err("%s: error parsing ofpart partition %pOF (%pOF)\n",
-+-	       master->name, pp, mtd_node);
-+-	ret = -EINVAL;
-+-ofpart_none:
-+-	of_node_put(pp);
-+-	kfree(parts);
-+-	return ret;
-+-}
-+-
-+-static const struct of_device_id parse_ofpart_match_table[] = {
-+-	{ .compatible = "fixed-partitions" },
-+-	{},
-+-};
-+-MODULE_DEVICE_TABLE(of, parse_ofpart_match_table);
-+-
-+-static struct mtd_part_parser ofpart_parser = {
-+-	.parse_fn = parse_fixed_partitions,
-+-	.name = "fixed-partitions",
-+-	.of_match_table = parse_ofpart_match_table,
-+-};
-+-
-+-static int parse_ofoldpart_partitions(struct mtd_info *master,
-+-				      const struct mtd_partition **pparts,
-+-				      struct mtd_part_parser_data *data)
-+-{
-+-	struct mtd_partition *parts;
-+-	struct device_node *dp;
-+-	int i, plen, nr_parts;
-+-	const struct {
-+-		__be32 offset, len;
-+-	} *part;
-+-	const char *names;
-+-
-+-	/* Pull of_node from the master device node */
-+-	dp = mtd_get_of_node(master);
-+-	if (!dp)
-+-		return 0;
-+-
-+-	part = of_get_property(dp, "partitions", &plen);
-+-	if (!part)
-+-		return 0; /* No partitions found */
-+-
-+-	pr_warn("Device tree uses obsolete partition map binding: %pOF\n", dp);
-+-
-+-	nr_parts = plen / sizeof(part[0]);
-+-
-+-	parts = kcalloc(nr_parts, sizeof(*parts), GFP_KERNEL);
-+-	if (!parts)
-+-		return -ENOMEM;
-+-
-+-	names = of_get_property(dp, "partition-names", &plen);
-+-
-+-	for (i = 0; i < nr_parts; i++) {
-+-		parts[i].offset = be32_to_cpu(part->offset);
-+-		parts[i].size   = be32_to_cpu(part->len) & ~1;
-+-		/* bit 0 set signifies read only partition */
-+-		if (be32_to_cpu(part->len) & 1)
-+-			parts[i].mask_flags = MTD_WRITEABLE;
-+-
-+-		if (names && (plen > 0)) {
-+-			int len = strlen(names) + 1;
-+-
-+-			parts[i].name = names;
-+-			plen -= len;
-+-			names += len;
-+-		} else {
-+-			parts[i].name = "unnamed";
-+-		}
-+-
-+-		part++;
-+-	}
-+-
-+-	*pparts = parts;
-+-	return nr_parts;
-+-}
-+-
-+-static struct mtd_part_parser ofoldpart_parser = {
-+-	.parse_fn = parse_ofoldpart_partitions,
-+-	.name = "ofoldpart",
-+-};
-+-
-+-static int __init ofpart_parser_init(void)
-+-{
-+-	register_mtd_parser(&ofpart_parser);
-+-	register_mtd_parser(&ofoldpart_parser);
-+-	return 0;
-+-}
-+-
-+-static void __exit ofpart_parser_exit(void)
-+-{
-+-	deregister_mtd_parser(&ofpart_parser);
-+-	deregister_mtd_parser(&ofoldpart_parser);
-+-}
-+-
-+-module_init(ofpart_parser_init);
-+-module_exit(ofpart_parser_exit);
-+-
-+-MODULE_LICENSE("GPL");
-+-MODULE_DESCRIPTION("Parser for MTD partitioning information in device tree");
-+-MODULE_AUTHOR("Vitaly Wool, David Gibson");
-+-/*
-+- * When MTD core cannot find the requested parser, it tries to load the module
-+- * with the same name. Since we provide the ofoldpart parser, we should have
-+- * the corresponding alias.
-+- */
-+-MODULE_ALIAS("fixed-partitions");
-+-MODULE_ALIAS("ofoldpart");
-+--- /dev/null
-++++ b/drivers/mtd/parsers/ofpart_core.c
-+@@ -0,0 +1,263 @@
-++// SPDX-License-Identifier: GPL-2.0-or-later
-++/*
-++ * Flash partitions described by the OF (or flattened) device tree
-++ *
-++ * Copyright © 2006 MontaVista Software Inc.
-++ * Author: Vitaly Wool <vwool@ru.mvista.com>
-++ *
-++ * Revised to handle newer style flash binding by:
-++ *   Copyright © 2007 David Gibson, IBM Corporation.
-++ */
-++
-++#include <linux/module.h>
-++#include <linux/init.h>
-++#include <linux/of.h>
-++#include <linux/mtd/mtd.h>
-++#include <linux/slab.h>
-++#include <linux/mtd/partitions.h>
-++
-++#include "ofpart_bcm4908.h"
-++
-++struct fixed_partitions_quirks {
-++	int (*post_parse)(struct mtd_info *mtd, struct mtd_partition *parts, int nr_parts);
-++};
-++
-++struct fixed_partitions_quirks bcm4908_partitions_quirks = {
-++	.post_parse = bcm4908_partitions_post_parse,
-++};
-++
-++static const struct of_device_id parse_ofpart_match_table[];
-++
-++static bool node_has_compatible(struct device_node *pp)
-++{
-++	return of_get_property(pp, "compatible", NULL);
-++}
-++
-++static int parse_fixed_partitions(struct mtd_info *master,
-++				  const struct mtd_partition **pparts,
-++				  struct mtd_part_parser_data *data)
-++{
-++	const struct fixed_partitions_quirks *quirks;
-++	const struct of_device_id *of_id;
-++	struct mtd_partition *parts;
-++	struct device_node *mtd_node;
-++	struct device_node *ofpart_node;
-++	const char *partname;
-++	struct device_node *pp;
-++	int nr_parts, i, ret = 0;
-++	bool dedicated = true;
-++
-++	/* Pull of_node from the master device node */
-++	mtd_node = mtd_get_of_node(master);
-++	if (!mtd_node)
-++		return 0;
-++
-++	ofpart_node = of_get_child_by_name(mtd_node, "partitions");
-++	if (!ofpart_node) {
-++		/*
-++		 * We might get here even when ofpart isn't used at all (e.g.,
-++		 * when using another parser), so don't be louder than
-++		 * KERN_DEBUG
-++		 */
-++		pr_debug("%s: 'partitions' subnode not found on %pOF. Trying to parse direct subnodes as partitions.\n",
-++			 master->name, mtd_node);
-++		ofpart_node = mtd_node;
-++		dedicated = false;
-++	}
-++
-++	of_id = of_match_node(parse_ofpart_match_table, ofpart_node);
-++	if (dedicated && !of_id) {
-++		/* The 'partitions' subnode might be used by another parser */
-++		return 0;
-++	}
-++
-++	quirks = of_id ? of_id->data : NULL;
-++
-++	/* First count the subnodes */
-++	nr_parts = 0;
-++	for_each_child_of_node(ofpart_node,  pp) {
-++		if (!dedicated && node_has_compatible(pp))
-++			continue;
-++
-++		nr_parts++;
-++	}
-++
-++	if (nr_parts == 0)
-++		return 0;
-++
-++	parts = kcalloc(nr_parts, sizeof(*parts), GFP_KERNEL);
-++	if (!parts)
-++		return -ENOMEM;
-++
-++	i = 0;
-++	for_each_child_of_node(ofpart_node,  pp) {
-++		const __be32 *reg;
-++		int len;
-++		int a_cells, s_cells;
-++
-++		if (!dedicated && node_has_compatible(pp))
-++			continue;
-++
-++		reg = of_get_property(pp, "reg", &len);
-++		if (!reg) {
-++			if (dedicated) {
-++				pr_debug("%s: ofpart partition %pOF (%pOF) missing reg property.\n",
-++					 master->name, pp,
-++					 mtd_node);
-++				goto ofpart_fail;
-++			} else {
-++				nr_parts--;
-++				continue;
-++			}
-++		}
-++
-++		a_cells = of_n_addr_cells(pp);
-++		s_cells = of_n_size_cells(pp);
-++		if (len / 4 != a_cells + s_cells) {
-++			pr_debug("%s: ofpart partition %pOF (%pOF) error parsing reg property.\n",
-++				 master->name, pp,
-++				 mtd_node);
-++			goto ofpart_fail;
-++		}
-++
-++		parts[i].offset = of_read_number(reg, a_cells);
-++		parts[i].size = of_read_number(reg + a_cells, s_cells);
-++		parts[i].of_node = pp;
-++
-++		partname = of_get_property(pp, "label", &len);
-++		if (!partname)
-++			partname = of_get_property(pp, "name", &len);
-++		parts[i].name = partname;
-++
-++		if (of_get_property(pp, "read-only", &len))
-++			parts[i].mask_flags |= MTD_WRITEABLE;
-++
-++		if (of_get_property(pp, "lock", &len))
-++			parts[i].mask_flags |= MTD_POWERUP_LOCK;
-++
-++		if (of_property_read_bool(pp, "slc-mode"))
-++			parts[i].add_flags |= MTD_SLC_ON_MLC_EMULATION;
-++
-++		i++;
-++	}
-++
-++	if (!nr_parts)
-++		goto ofpart_none;
-++
-++	if (quirks && quirks->post_parse)
-++		quirks->post_parse(master, parts, nr_parts);
-++
-++	*pparts = parts;
-++	return nr_parts;
-++
-++ofpart_fail:
-++	pr_err("%s: error parsing ofpart partition %pOF (%pOF)\n",
-++	       master->name, pp, mtd_node);
-++	ret = -EINVAL;
-++ofpart_none:
-++	of_node_put(pp);
-++	kfree(parts);
-++	return ret;
-++}
-++
-++static const struct of_device_id parse_ofpart_match_table[] = {
-++	/* Generic */
-++	{ .compatible = "fixed-partitions" },
-++	/* Customized */
-++	{ .compatible = "brcm,bcm4908-partitions", .data = &bcm4908_partitions_quirks, },
-++	{},
-++};
-++MODULE_DEVICE_TABLE(of, parse_ofpart_match_table);
-++
-++static struct mtd_part_parser ofpart_parser = {
-++	.parse_fn = parse_fixed_partitions,
-++	.name = "fixed-partitions",
-++	.of_match_table = parse_ofpart_match_table,
-++};
-++
-++static int parse_ofoldpart_partitions(struct mtd_info *master,
-++				      const struct mtd_partition **pparts,
-++				      struct mtd_part_parser_data *data)
-++{
-++	struct mtd_partition *parts;
-++	struct device_node *dp;
-++	int i, plen, nr_parts;
-++	const struct {
-++		__be32 offset, len;
-++	} *part;
-++	const char *names;
-++
-++	/* Pull of_node from the master device node */
-++	dp = mtd_get_of_node(master);
-++	if (!dp)
-++		return 0;
-++
-++	part = of_get_property(dp, "partitions", &plen);
-++	if (!part)
-++		return 0; /* No partitions found */
-++
-++	pr_warn("Device tree uses obsolete partition map binding: %pOF\n", dp);
-++
-++	nr_parts = plen / sizeof(part[0]);
-++
-++	parts = kcalloc(nr_parts, sizeof(*parts), GFP_KERNEL);
-++	if (!parts)
-++		return -ENOMEM;
-++
-++	names = of_get_property(dp, "partition-names", &plen);
-++
-++	for (i = 0; i < nr_parts; i++) {
-++		parts[i].offset = be32_to_cpu(part->offset);
-++		parts[i].size   = be32_to_cpu(part->len) & ~1;
-++		/* bit 0 set signifies read only partition */
-++		if (be32_to_cpu(part->len) & 1)
-++			parts[i].mask_flags = MTD_WRITEABLE;
-++
-++		if (names && (plen > 0)) {
-++			int len = strlen(names) + 1;
-++
-++			parts[i].name = names;
-++			plen -= len;
-++			names += len;
-++		} else {
-++			parts[i].name = "unnamed";
-++		}
-++
-++		part++;
-++	}
-++
-++	*pparts = parts;
-++	return nr_parts;
-++}
-++
-++static struct mtd_part_parser ofoldpart_parser = {
-++	.parse_fn = parse_ofoldpart_partitions,
-++	.name = "ofoldpart",
-++};
-++
-++static int __init ofpart_parser_init(void)
-++{
-++	register_mtd_parser(&ofpart_parser);
-++	register_mtd_parser(&ofoldpart_parser);
-++	return 0;
-++}
-++
-++static void __exit ofpart_parser_exit(void)
-++{
-++	deregister_mtd_parser(&ofpart_parser);
-++	deregister_mtd_parser(&ofoldpart_parser);
-++}
-++
-++module_init(ofpart_parser_init);
-++module_exit(ofpart_parser_exit);
-++
-++MODULE_LICENSE("GPL");
-++MODULE_DESCRIPTION("Parser for MTD partitioning information in device tree");
-++MODULE_AUTHOR("Vitaly Wool, David Gibson");
-++/*
-++ * When MTD core cannot find the requested parser, it tries to load the module
-++ * with the same name. Since we provide the ofoldpart parser, we should have
-++ * the corresponding alias.
-++ */
-++MODULE_ALIAS("fixed-partitions");
-++MODULE_ALIAS("ofoldpart");
-diff --git a/target/linux/generic/backport-5.10/404-v5.13-mtd-parsers-ofpart-limit-parsing-of-deprecated-DT-sy.patch b/target/linux/generic/backport-5.10/404-v5.13-mtd-parsers-ofpart-limit-parsing-of-deprecated-DT-sy.patch
-new file mode 100644
-index 0000000000..55a91d7680
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/404-v5.13-mtd-parsers-ofpart-limit-parsing-of-deprecated-DT-sy.patch
-@@ -0,0 +1,69 @@
-+From 2d751203aacf86a1b301a188d8551c7da91043ab Mon Sep 17 00:00:00 2001
-+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-+Date: Tue, 2 Mar 2021 20:00:12 +0100
-+Subject: [PATCH] mtd: parsers: ofpart: limit parsing of deprecated DT syntax
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+For backward compatibility ofpart still supports the old syntax like:
-+spi-flash@0 {
-+	compatible = "jedec,spi-nor";
-+	reg = <0x0>;
-+
-+	partition@0 {
-+		label = "bootloader";
-+		reg = <0x0 0x100000>;
-+	};
-+};
-+(without "partitions" subnode).
-+
-+There is no reason however to support nested partitions without a clear
-+"compatible" string like:
-+partitions {
-+	compatible = "fixed-partitions";
-+	#address-cells = <1>;
-+	#size-cells = <1>;
-+
-+	partition@0 {
-+		label = "bootloader";
-+		reg = <0x0 0x100000>;
-+
-+		partition@0 {
-+			label = "config";
-+			reg = <0x80000 0x80000>;
-+		};
-+	};
-+};
-+(we never officially supported or documented that).
-+
-+Make sure ofpart doesn't attempt to parse above.
-+
-+Cc: Ansuel Smith <ansuelsmth@gmail.com>
-+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-+Link: https://lore.kernel.org/linux-mtd/20210302190012.1255-1-zajec5@gmail.com
-+---
-+ drivers/mtd/parsers/ofpart_core.c | 4 +++-
-+ 1 file changed, 3 insertions(+), 1 deletion(-)
-+
-+--- a/drivers/mtd/parsers/ofpart_core.c
-++++ b/drivers/mtd/parsers/ofpart_core.c
-+@@ -53,7 +53,7 @@ static int parse_fixed_partitions(struct
-+ 		return 0;
-+ 
-+ 	ofpart_node = of_get_child_by_name(mtd_node, "partitions");
-+-	if (!ofpart_node) {
-++	if (!ofpart_node && !master->parent) {
-+ 		/*
-+ 		 * We might get here even when ofpart isn't used at all (e.g.,
-+ 		 * when using another parser), so don't be louder than
-+@@ -64,6 +64,8 @@ static int parse_fixed_partitions(struct
-+ 		ofpart_node = mtd_node;
-+ 		dedicated = false;
-+ 	}
-++	if (!ofpart_node)
-++		return 0;
-+ 
-+ 	of_id = of_match_node(parse_ofpart_match_table, ofpart_node);
-+ 	if (dedicated && !of_id) {
-diff --git a/target/linux/generic/backport-5.10/405-v5.13-mtd-parsers-ofpart-make-symbol-bcm4908_partitions_qu.patch b/target/linux/generic/backport-5.10/405-v5.13-mtd-parsers-ofpart-make-symbol-bcm4908_partitions_qu.patch
-new file mode 100644
-index 0000000000..f1b778a6e1
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/405-v5.13-mtd-parsers-ofpart-make-symbol-bcm4908_partitions_qu.patch
-@@ -0,0 +1,34 @@
-+From b87b6d2d6f540e29c3f98e1572d64e560d73d6c1 Mon Sep 17 00:00:00 2001
-+From: Wei Yongjun <weiyongjun1@huawei.com>
-+Date: Thu, 4 Mar 2021 06:46:00 +0000
-+Subject: [PATCH] mtd: parsers: ofpart: make symbol 'bcm4908_partitions_quirks'
-+ static
-+
-+The sparse tool complains as follows:
-+
-+drivers/mtd/parsers/ofpart_core.c:25:32: warning:
-+ symbol 'bcm4908_partitions_quirks' was not declared. Should it be static?
-+
-+This symbol is not used outside of ofpart_core.c, so this
-+commit marks it static.
-+
-+Fixes: 457da931b608 ("mtd: parsers: ofpart: support BCM4908 fixed partitions")
-+Reported-by: Hulk Robot <hulkci@huawei.com>
-+Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
-+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-+Link: https://lore.kernel.org/linux-mtd/20210304064600.3279138-1-weiyongjun1@huawei.com
-+---
-+ drivers/mtd/parsers/ofpart_core.c | 2 +-
-+ 1 file changed, 1 insertion(+), 1 deletion(-)
-+
-+--- a/drivers/mtd/parsers/ofpart_core.c
-++++ b/drivers/mtd/parsers/ofpart_core.c
-+@@ -22,7 +22,7 @@ struct fixed_partitions_quirks {
-+ 	int (*post_parse)(struct mtd_info *mtd, struct mtd_partition *parts, int nr_parts);
-+ };
-+ 
-+-struct fixed_partitions_quirks bcm4908_partitions_quirks = {
-++static struct fixed_partitions_quirks bcm4908_partitions_quirks = {
-+ 	.post_parse = bcm4908_partitions_post_parse,
-+ };
-+ 
-diff --git a/target/linux/generic/backport-5.10/406-v5.13-0001-mtd-core-add-nvmem-cells-compatible-to-parse-mtd-as-.patch b/target/linux/generic/backport-5.10/406-v5.13-0001-mtd-core-add-nvmem-cells-compatible-to-parse-mtd-as-.patch
-new file mode 100644
-index 0000000000..28335cb71f
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/406-v5.13-0001-mtd-core-add-nvmem-cells-compatible-to-parse-mtd-as-.patch
-@@ -0,0 +1,38 @@
-+From a5d83d6e2bc747b13f347962d4b335d70b23559b Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Fri, 12 Mar 2021 07:28:19 +0100
-+Subject: [PATCH] mtd: core: add nvmem-cells compatible to parse mtd as nvmem
-+ cells
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+Partitions that contains the nvmem-cells compatible will register
-+their direct subonodes as nvmem cells and the node will be treated as a
-+nvmem provider.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+Tested-by: Rafał Miłecki <rafal@milecki.pl>
-+---
-+ drivers/mtd/mtdcore.c | 3 ++-
-+ 1 file changed, 2 insertions(+), 1 deletion(-)
-+
-+--- a/drivers/mtd/mtdcore.c
-++++ b/drivers/mtd/mtdcore.c
-+@@ -531,6 +531,7 @@ static int mtd_nvmem_reg_read(void *priv
-+ 
-+ static int mtd_nvmem_add(struct mtd_info *mtd)
-+ {
-++	struct device_node *node = mtd_get_of_node(mtd);
-+ 	struct nvmem_config config = {};
-+ 
-+ 	config.id = -1;
-+@@ -543,7 +544,7 @@ static int mtd_nvmem_add(struct mtd_info
-+ 	config.stride = 1;
-+ 	config.read_only = true;
-+ 	config.root_only = true;
-+-	config.no_of_node = true;
-++	config.no_of_node = !of_device_is_compatible(node, "nvmem-cells");
-+ 	config.priv = mtd;
-+ 
-+ 	mtd->nvmem = nvmem_register(&config);
-diff --git a/target/linux/generic/backport-5.10/406-v5.13-0002-dt-bindings-nvmem-drop-nodename-restriction.patch b/target/linux/generic/backport-5.10/406-v5.13-0002-dt-bindings-nvmem-drop-nodename-restriction.patch
-new file mode 100644
-index 0000000000..14ea3f6b8c
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/406-v5.13-0002-dt-bindings-nvmem-drop-nodename-restriction.patch
-@@ -0,0 +1,25 @@
-+From 42645976c3289b03a12f1bd2bc131fd98fc27170 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Fri, 12 Mar 2021 07:28:20 +0100
-+Subject: [PATCH] devicetree: nvmem: nvmem: drop $nodename restriction
-+
-+Drop $nodename restriction as now mtd partition can also be used as
-+nvmem provider.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+---
-+ Documentation/devicetree/bindings/nvmem/nvmem.yaml | 3 ---
-+ 1 file changed, 3 deletions(-)
-+
-+--- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml
-++++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
-+@@ -20,9 +20,6 @@ description: |
-+   storage device.
-+ 
-+ properties:
-+-  $nodename:
-+-    pattern: "^(eeprom|efuse|nvram)(@.*|-[0-9a-f])*$"
-+-
-+   "#address-cells":
-+     const: 1
-+ 
-diff --git a/target/linux/generic/backport-5.10/406-v5.13-0003-dt-bindings-mtd-Document-use-of-nvmem-cells-compatib.patch b/target/linux/generic/backport-5.10/406-v5.13-0003-dt-bindings-mtd-Document-use-of-nvmem-cells-compatib.patch
-new file mode 100644
-index 0000000000..0eb4c637cf
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/406-v5.13-0003-dt-bindings-mtd-Document-use-of-nvmem-cells-compatib.patch
-@@ -0,0 +1,117 @@
-+From 377aa0135dc8489312edd3184d143ce3a89ff7ee Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Fri, 12 Mar 2021 07:28:21 +0100
-+Subject: [PATCH] dt-bindings: mtd: Document use of nvmem-cells compatible
-+
-+Document nvmem-cells compatible used to treat mtd partitions as a
-+nvmem provider.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+Reviewed-by: Rob Herring <robh@kernel.org>
-+---
-+ .../bindings/mtd/partitions/nvmem-cells.yaml  | 99 +++++++++++++++++++
-+ 1 file changed, 99 insertions(+)
-+ create mode 100644 Documentation/devicetree/bindings/mtd/partitions/nvmem-cells.yaml
-+
-+--- /dev/null
-++++ b/Documentation/devicetree/bindings/mtd/partitions/nvmem-cells.yaml
-+@@ -0,0 +1,99 @@
-++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
-++%YAML 1.2
-++---
-++$id: http://devicetree.org/schemas/mtd/partitions/nvmem-cells.yaml#
-++$schema: http://devicetree.org/meta-schemas/core.yaml#
-++
-++title: Nvmem cells
-++
-++description: |
-++  Any partition containing the compatible "nvmem-cells" will register as a
-++  nvmem provider.
-++  Each direct subnodes represents a nvmem cell following the nvmem binding.
-++  Nvmem binding to declare nvmem-cells can be found in:
-++  Documentation/devicetree/bindings/nvmem/nvmem.yaml
-++
-++maintainers:
-++  - Ansuel Smith <ansuelsmth@gmail.com>
-++
-++allOf:
-++  - $ref: /schemas/nvmem/nvmem.yaml#
-++
-++properties:
-++  compatible:
-++    const: nvmem-cells
-++
-++required:
-++  - compatible
-++
-++additionalProperties: true
-++
-++examples:
-++  - |
-++    partitions {
-++      compatible = "fixed-partitions";
-++      #address-cells = <1>;
-++      #size-cells = <1>;
-++
-++      /* ... */
-++
-++      };
-++      art: art@1200000 {
-++        compatible = "nvmem-cells";
-++        reg = <0x1200000 0x0140000>;
-++        label = "art";
-++        read-only;
-++        #address-cells = <1>;
-++        #size-cells = <1>;
-++
-++        macaddr_gmac1: macaddr_gmac1@0 {
-++          reg = <0x0 0x6>;
-++        };
-++
-++        macaddr_gmac2: macaddr_gmac2@6 {
-++          reg = <0x6 0x6>;
-++        };
-++
-++        pre_cal_24g: pre_cal_24g@1000 {
-++          reg = <0x1000 0x2f20>;
-++        };
-++
-++        pre_cal_5g: pre_cal_5g@5000{
-++          reg = <0x5000 0x2f20>;
-++        };
-++      };
-++  - |
-++    partitions {
-++        compatible = "fixed-partitions";
-++        #address-cells = <1>;
-++        #size-cells = <1>;
-++
-++        partition@0 {
-++            label = "bootloader";
-++            reg = <0x000000 0x100000>;
-++            read-only;
-++        };
-++
-++        firmware@100000 {
-++            compatible = "brcm,trx";
-++            label = "firmware";
-++            reg = <0x100000 0xe00000>;
-++        };
-++
-++        calibration@f00000 {
-++            compatible = "nvmem-cells";
-++            label = "calibration";
-++            reg = <0xf00000 0x100000>;
-++            ranges = <0 0xf00000 0x100000>;
-++            #address-cells = <1>;
-++            #size-cells = <1>;
-++
-++            wifi0@0 {
-++                reg = <0x000000 0x080000>;
-++            };
-++
-++            wifi1@80000 {
-++                reg = <0x080000 0x080000>;
-++            };
-++        };
-++    };
-diff --git a/target/linux/generic/backport-5.10/407-v5.13-0001-dt-bindings-mtd-add-binding-for-Linksys-Northstar-pa.patch b/target/linux/generic/backport-5.10/407-v5.13-0001-dt-bindings-mtd-add-binding-for-Linksys-Northstar-pa.patch
-new file mode 100644
-index 0000000000..35a4afd67b
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/407-v5.13-0001-dt-bindings-mtd-add-binding-for-Linksys-Northstar-pa.patch
-@@ -0,0 +1,98 @@
-+From 2fa7294175c76e1ec568aa75c1891fd908728c8d Mon Sep 17 00:00:00 2001
-+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-+Date: Fri, 12 Mar 2021 14:49:18 +0100
-+Subject: [PATCH] dt-bindings: mtd: add binding for Linksys Northstar
-+ partitions
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+Linksys on Broadcom Northstar devices uses fixed flash layout with
-+multiple firmware partitions.
-+
-+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-+Reviewed-by: Rob Herring <robh@kernel.org>
-+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-+Link: https://lore.kernel.org/linux-mtd/20210312134919.7767-1-zajec5@gmail.com
-+---
-+ .../mtd/partitions/linksys,ns-partitions.yaml | 74 +++++++++++++++++++
-+ 1 file changed, 74 insertions(+)
-+ create mode 100644 Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml
-+
-+--- /dev/null
-++++ b/Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml
-+@@ -0,0 +1,74 @@
-++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
-++%YAML 1.2
-++---
-++$id: http://devicetree.org/schemas/mtd/partitions/linksys,ns-partitions.yaml#
-++$schema: http://devicetree.org/meta-schemas/core.yaml#
-++
-++title: Linksys Northstar partitioning
-++
-++description: |
-++  Linksys devices based on Broadcom Northstar architecture often use two
-++  firmware partitions. One is used for regular booting, the other is treated as
-++  fallback.
-++
-++  This binding allows defining all fixed partitions and marking those containing
-++  firmware. System can use that information e.g. for booting or flashing
-++  purposes.
-++
-++maintainers:
-++  - Rafał Miłecki <rafal@milecki.pl>
-++
-++properties:
-++  compatible:
-++    const: linksys,ns-partitions
-++
-++  "#address-cells":
-++    enum: [ 1, 2 ]
-++
-++  "#size-cells":
-++    enum: [ 1, 2 ]
-++
-++patternProperties:
-++  "^partition@[0-9a-f]+$":
-++    $ref: "partition.yaml#"
-++    properties:
-++      compatible:
-++        items:
-++          - const: linksys,ns-firmware
-++          - const: brcm,trx
-++    unevaluatedProperties: false
-++
-++required:
-++  - "#address-cells"
-++  - "#size-cells"
-++
-++additionalProperties: false
-++
-++examples:
-++  - |
-++    partitions {
-++        compatible = "linksys,ns-partitions";
-++        #address-cells = <1>;
-++        #size-cells = <1>;
-++
-++        partition@0 {
-++            label = "boot";
-++            reg = <0x0 0x100000>;
-++            read-only;
-++        };
-++
-++        partition@100000 {
-++            label = "nvram";
-++            reg = <0x100000 0x100000>;
-++        };
-++
-++        partition@200000 {
-++            compatible = "linksys,ns-firmware", "brcm,trx";
-++            reg = <0x200000 0xf00000>;
-++        };
-++
-++        partition@1100000 {
-++            compatible = "linksys,ns-firmware", "brcm,trx";
-++            reg = <0x1100000 0xf00000>;
-++        };
-++    };
-diff --git a/target/linux/generic/backport-5.10/407-v5.13-0002-mtd-parsers-ofpart-support-Linksys-Northstar-partiti.patch b/target/linux/generic/backport-5.10/407-v5.13-0002-mtd-parsers-ofpart-support-Linksys-Northstar-partiti.patch
-new file mode 100644
-index 0000000000..f317889785
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/407-v5.13-0002-mtd-parsers-ofpart-support-Linksys-Northstar-partiti.patch
-@@ -0,0 +1,156 @@
-+From 7134a2d026d942210b4d26d6059c9d979ca7866e Mon Sep 17 00:00:00 2001
-+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-+Date: Fri, 12 Mar 2021 14:49:19 +0100
-+Subject: [PATCH] mtd: parsers: ofpart: support Linksys Northstar partitions
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+This allows extending ofpart parser with support for Linksys Northstar
-+devices. That support uses recently added quirks mechanism.
-+
-+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-+Link: https://lore.kernel.org/linux-mtd/20210312134919.7767-2-zajec5@gmail.com
-+---
-+ drivers/mtd/parsers/Kconfig             | 10 +++++
-+ drivers/mtd/parsers/Makefile            |  1 +
-+ drivers/mtd/parsers/ofpart_core.c       |  6 +++
-+ drivers/mtd/parsers/ofpart_linksys_ns.c | 50 +++++++++++++++++++++++++
-+ drivers/mtd/parsers/ofpart_linksys_ns.h | 18 +++++++++
-+ 5 files changed, 85 insertions(+)
-+ create mode 100644 drivers/mtd/parsers/ofpart_linksys_ns.c
-+ create mode 100644 drivers/mtd/parsers/ofpart_linksys_ns.h
-+
-+--- a/drivers/mtd/parsers/Kconfig
-++++ b/drivers/mtd/parsers/Kconfig
-+@@ -76,6 +76,16 @@ config MTD_OF_PARTS_BCM4908
-+ 	  that can have multiple "firmware" partitions. It takes care of
-+ 	  finding currently used one and backup ones.
-+ 
-++config MTD_OF_PARTS_LINKSYS_NS
-++	bool "Linksys Northstar partitioning support"
-++	depends on MTD_OF_PARTS && (ARCH_BCM_5301X || ARCH_BCM4908 || COMPILE_TEST)
-++	default ARCH_BCM_5301X
-++	help
-++	  This provides partitions parser for Linksys devices based on Broadcom
-++	  Northstar architecture. Linksys commonly uses fixed flash layout with
-++	  two "firmware" partitions. Currently used firmware has to be detected
-++	  using CFE environment variable.
-++
-+ config MTD_PARSER_IMAGETAG
-+ 	tristate "Parser for BCM963XX Image Tag format partitions"
-+ 	depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST
-+--- a/drivers/mtd/parsers/Makefile
-++++ b/drivers/mtd/parsers/Makefile
-+@@ -6,6 +6,7 @@ obj-$(CONFIG_MTD_CMDLINE_PARTS)		+= cmdl
-+ obj-$(CONFIG_MTD_OF_PARTS)		+= ofpart.o
-+ ofpart-y				+= ofpart_core.o
-+ ofpart-$(CONFIG_MTD_OF_PARTS_BCM4908)	+= ofpart_bcm4908.o
-++ofpart-$(CONFIG_MTD_OF_PARTS_LINKSYS_NS)+= ofpart_linksys_ns.o
-+ obj-$(CONFIG_MTD_PARSER_IMAGETAG)	+= parser_imagetag.o
-+ obj-$(CONFIG_MTD_AFS_PARTS)		+= afs.o
-+ obj-$(CONFIG_MTD_PARSER_TRX)		+= parser_trx.o
-+--- a/drivers/mtd/parsers/ofpart_core.c
-++++ b/drivers/mtd/parsers/ofpart_core.c
-+@@ -17,6 +17,7 @@
-+ #include <linux/mtd/partitions.h>
-+ 
-+ #include "ofpart_bcm4908.h"
-++#include "ofpart_linksys_ns.h"
-+ 
-+ struct fixed_partitions_quirks {
-+ 	int (*post_parse)(struct mtd_info *mtd, struct mtd_partition *parts, int nr_parts);
-+@@ -26,6 +27,10 @@ static struct fixed_partitions_quirks bc
-+ 	.post_parse = bcm4908_partitions_post_parse,
-+ };
-+ 
-++static struct fixed_partitions_quirks linksys_ns_partitions_quirks = {
-++	.post_parse = linksys_ns_partitions_post_parse,
-++};
-++
-+ static const struct of_device_id parse_ofpart_match_table[];
-+ 
-+ static bool node_has_compatible(struct device_node *pp)
-+@@ -167,6 +172,7 @@ static const struct of_device_id parse_o
-+ 	{ .compatible = "fixed-partitions" },
-+ 	/* Customized */
-+ 	{ .compatible = "brcm,bcm4908-partitions", .data = &bcm4908_partitions_quirks, },
-++	{ .compatible = "linksys,ns-partitions", .data = &linksys_ns_partitions_quirks, },
-+ 	{},
-+ };
-+ MODULE_DEVICE_TABLE(of, parse_ofpart_match_table);
-+--- /dev/null
-++++ b/drivers/mtd/parsers/ofpart_linksys_ns.c
-+@@ -0,0 +1,50 @@
-++// SPDX-License-Identifier: GPL-2.0
-++/*
-++ * Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl>
-++ */
-++
-++#include <linux/bcm47xx_nvram.h>
-++#include <linux/mtd/mtd.h>
-++#include <linux/mtd/partitions.h>
-++
-++#include "ofpart_linksys_ns.h"
-++
-++#define NVRAM_BOOT_PART		"bootpartition"
-++
-++static int ofpart_linksys_ns_bootpartition(void)
-++{
-++	char buf[4];
-++	int bootpartition;
-++
-++	/* Check CFE environment variable */
-++	if (bcm47xx_nvram_getenv(NVRAM_BOOT_PART, buf, sizeof(buf)) > 0) {
-++		if (!kstrtoint(buf, 0, &bootpartition))
-++			return bootpartition;
-++		pr_warn("Failed to parse %s value \"%s\"\n", NVRAM_BOOT_PART,
-++			buf);
-++	} else {
-++		pr_warn("Failed to get NVRAM \"%s\"\n", NVRAM_BOOT_PART);
-++	}
-++
-++	return 0;
-++}
-++
-++int linksys_ns_partitions_post_parse(struct mtd_info *mtd,
-++				     struct mtd_partition *parts,
-++				     int nr_parts)
-++{
-++	int bootpartition = ofpart_linksys_ns_bootpartition();
-++	int trx_idx = 0;
-++	int i;
-++
-++	for (i = 0; i < nr_parts; i++) {
-++		if (of_device_is_compatible(parts[i].of_node, "linksys,ns-firmware")) {
-++			if (trx_idx++ == bootpartition)
-++				parts[i].name = "firmware";
-++			else
-++				parts[i].name = "backup";
-++		}
-++	}
-++
-++	return 0;
-++}
-+--- /dev/null
-++++ b/drivers/mtd/parsers/ofpart_linksys_ns.h
-+@@ -0,0 +1,18 @@
-++/* SPDX-License-Identifier: GPL-2.0 */
-++#ifndef __OFPART_LINKSYS_NS_H
-++#define __OFPART_LINKSYS_NS_H
-++
-++#ifdef CONFIG_MTD_OF_PARTS_LINKSYS_NS
-++int linksys_ns_partitions_post_parse(struct mtd_info *mtd,
-++				     struct mtd_partition *parts,
-++				     int nr_parts);
-++#else
-++static inline int linksys_ns_partitions_post_parse(struct mtd_info *mtd,
-++						   struct mtd_partition *parts,
-++						   int nr_parts)
-++{
-++	return -EOPNOTSUPP;
-++}
-++#endif
-++
-++#endif
-diff --git a/target/linux/generic/backport-5.10/600-v5.12-net-extract-napi-poll-functionality-to-__napi_poll.patch b/target/linux/generic/backport-5.10/600-v5.12-net-extract-napi-poll-functionality-to-__napi_poll.patch
-new file mode 100644
-index 0000000000..366f18d94d
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/600-v5.12-net-extract-napi-poll-functionality-to-__napi_poll.patch
-@@ -0,0 +1,88 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Mon, 8 Feb 2021 11:34:08 -0800
-+Subject: [PATCH] net: extract napi poll functionality to __napi_poll()
-+
-+This commit introduces a new function __napi_poll() which does the main
-+logic of the existing napi_poll() function, and will be called by other
-+functions in later commits.
-+This idea and implementation is done by Felix Fietkau <nbd@nbd.name> and
-+is proposed as part of the patch to move napi work to work_queue
-+context.
-+This commit by itself is a code restructure.
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+Signed-off-by: Wei Wang <weiwan@google.com>
-+Reviewed-by: Alexander Duyck <alexanderduyck@fb.com>
-+Signed-off-by: David S. Miller <davem@davemloft.net>
-+---
-+
-+--- a/net/core/dev.c
-++++ b/net/core/dev.c
-+@@ -6752,15 +6752,10 @@ void __netif_napi_del(struct napi_struct
-+ }
-+ EXPORT_SYMBOL(__netif_napi_del);
-+ 
-+-static int napi_poll(struct napi_struct *n, struct list_head *repoll)
-++static int __napi_poll(struct napi_struct *n, bool *repoll)
-+ {
-+-	void *have;
-+ 	int work, weight;
-+ 
-+-	list_del_init(&n->poll_list);
-+-
-+-	have = netpoll_poll_lock(n);
-+-
-+ 	weight = n->weight;
-+ 
-+ 	/* This NAPI_STATE_SCHED test is for avoiding a race
-+@@ -6780,7 +6775,7 @@ static int napi_poll(struct napi_struct
-+ 			    n->poll, work, weight);
-+ 
-+ 	if (likely(work < weight))
-+-		goto out_unlock;
-++		return work;
-+ 
-+ 	/* Drivers must not modify the NAPI state if they
-+ 	 * consume the entire weight.  In such cases this code
-+@@ -6789,7 +6784,7 @@ static int napi_poll(struct napi_struct
-+ 	 */
-+ 	if (unlikely(napi_disable_pending(n))) {
-+ 		napi_complete(n);
-+-		goto out_unlock;
-++		return work;
-+ 	}
-+ 
-+ 	if (n->gro_bitmask) {
-+@@ -6807,12 +6802,29 @@ static int napi_poll(struct napi_struct
-+ 	if (unlikely(!list_empty(&n->poll_list))) {
-+ 		pr_warn_once("%s: Budget exhausted after napi rescheduled\n",
-+ 			     n->dev ? n->dev->name : "backlog");
-+-		goto out_unlock;
-++		return work;
-+ 	}
-+ 
-+-	list_add_tail(&n->poll_list, repoll);
-++	*repoll = true;
-++
-++	return work;
-++}
-++
-++static int napi_poll(struct napi_struct *n, struct list_head *repoll)
-++{
-++	bool do_repoll = false;
-++	void *have;
-++	int work;
-++
-++	list_del_init(&n->poll_list);
-++
-++	have = netpoll_poll_lock(n);
-++
-++	work = __napi_poll(n, &do_repoll);
-++
-++	if (do_repoll)
-++		list_add_tail(&n->poll_list, repoll);
-+ 
-+-out_unlock:
-+ 	netpoll_poll_unlock(have);
-+ 
-+ 	return work;
-diff --git a/target/linux/generic/backport-5.10/601-v5.12-net-implement-threaded-able-napi-poll-loop-support.patch b/target/linux/generic/backport-5.10/601-v5.12-net-implement-threaded-able-napi-poll-loop-support.patch
-new file mode 100644
-index 0000000000..32f22b392c
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/601-v5.12-net-implement-threaded-able-napi-poll-loop-support.patch
-@@ -0,0 +1,261 @@
-+From: Wei Wang <weiwan@google.com>
-+Date: Mon, 8 Feb 2021 11:34:09 -0800
-+Subject: [PATCH] net: implement threaded-able napi poll loop support
-+
-+This patch allows running each napi poll loop inside its own
-+kernel thread.
-+The kthread is created during netif_napi_add() if dev->threaded
-+is set. And threaded mode is enabled in napi_enable(). We will
-+provide a way to set dev->threaded and enable threaded mode
-+without a device up/down in the following patch.
-+
-+Once that threaded mode is enabled and the kthread is
-+started, napi_schedule() will wake-up such thread instead
-+of scheduling the softirq.
-+
-+The threaded poll loop behaves quite likely the net_rx_action,
-+but it does not have to manipulate local irqs and uses
-+an explicit scheduling point based on netdev_budget.
-+
-+Co-developed-by: Paolo Abeni <pabeni@redhat.com>
-+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
-+Co-developed-by: Hannes Frederic Sowa <hannes@stressinduktion.org>
-+Signed-off-by: Hannes Frederic Sowa <hannes@stressinduktion.org>
-+Co-developed-by: Jakub Kicinski <kuba@kernel.org>
-+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
-+Signed-off-by: Wei Wang <weiwan@google.com>
-+Reviewed-by: Alexander Duyck <alexanderduyck@fb.com>
-+Signed-off-by: David S. Miller <davem@davemloft.net>
-+---
-+
-+--- a/include/linux/netdevice.h
-++++ b/include/linux/netdevice.h
-+@@ -347,6 +347,7 @@ struct napi_struct {
-+ 	struct list_head	dev_list;
-+ 	struct hlist_node	napi_hash_node;
-+ 	unsigned int		napi_id;
-++	struct task_struct	*thread;
-+ };
-+ 
-+ enum {
-+@@ -357,6 +358,7 @@ enum {
-+ 	NAPI_STATE_LISTED,	/* NAPI added to system lists */
-+ 	NAPI_STATE_NO_BUSY_POLL,/* Do not add in napi_hash, no busy polling */
-+ 	NAPI_STATE_IN_BUSY_POLL,/* sk_busy_loop() owns this NAPI */
-++	NAPI_STATE_THREADED,		/* The poll is performed inside its own thread*/
-+ };
-+ 
-+ enum {
-+@@ -367,6 +369,7 @@ enum {
-+ 	NAPIF_STATE_LISTED	 = BIT(NAPI_STATE_LISTED),
-+ 	NAPIF_STATE_NO_BUSY_POLL = BIT(NAPI_STATE_NO_BUSY_POLL),
-+ 	NAPIF_STATE_IN_BUSY_POLL = BIT(NAPI_STATE_IN_BUSY_POLL),
-++	NAPIF_STATE_THREADED	 = BIT(NAPI_STATE_THREADED),
-+ };
-+ 
-+ enum gro_result {
-+@@ -497,20 +500,7 @@ static inline bool napi_complete(struct
-+  */
-+ void napi_disable(struct napi_struct *n);
-+ 
-+-/**
-+- *	napi_enable - enable NAPI scheduling
-+- *	@n: NAPI context
-+- *
-+- * Resume NAPI from being scheduled on this context.
-+- * Must be paired with napi_disable.
-+- */
-+-static inline void napi_enable(struct napi_struct *n)
-+-{
-+-	BUG_ON(!test_bit(NAPI_STATE_SCHED, &n->state));
-+-	smp_mb__before_atomic();
-+-	clear_bit(NAPI_STATE_SCHED, &n->state);
-+-	clear_bit(NAPI_STATE_NPSVC, &n->state);
-+-}
-++void napi_enable(struct napi_struct *n);
-+ 
-+ /**
-+  *	napi_synchronize - wait until NAPI is not running
-+@@ -1835,6 +1825,8 @@ enum netdev_priv_flags {
-+  *
-+  *	@wol_enabled:	Wake-on-LAN is enabled
-+  *
-++ *	@threaded:	napi threaded mode is enabled
-++ *
-+  *	@net_notifier_list:	List of per-net netdev notifier block
-+  *				that follow this device when it is moved
-+  *				to another network namespace.
-+@@ -2152,6 +2144,7 @@ struct net_device {
-+ 	struct lock_class_key	*qdisc_running_key;
-+ 	bool			proto_down;
-+ 	unsigned		wol_enabled:1;
-++	unsigned		threaded:1;
-+ 
-+ 	struct list_head	net_notifier_list;
-+ 
-+--- a/net/core/dev.c
-++++ b/net/core/dev.c
-+@@ -91,6 +91,7 @@
-+ #include <linux/etherdevice.h>
-+ #include <linux/ethtool.h>
-+ #include <linux/skbuff.h>
-++#include <linux/kthread.h>
-+ #include <linux/bpf.h>
-+ #include <linux/bpf_trace.h>
-+ #include <net/net_namespace.h>
-+@@ -1500,6 +1501,27 @@ void netdev_notify_peers(struct net_devi
-+ }
-+ EXPORT_SYMBOL(netdev_notify_peers);
-+ 
-++static int napi_threaded_poll(void *data);
-++
-++static int napi_kthread_create(struct napi_struct *n)
-++{
-++	int err = 0;
-++
-++	/* Create and wake up the kthread once to put it in
-++	 * TASK_INTERRUPTIBLE mode to avoid the blocked task
-++	 * warning and work with loadavg.
-++	 */
-++	n->thread = kthread_run(napi_threaded_poll, n, "napi/%s-%d",
-++				n->dev->name, n->napi_id);
-++	if (IS_ERR(n->thread)) {
-++		err = PTR_ERR(n->thread);
-++		pr_err("kthread_run failed with err %d\n", err);
-++		n->thread = NULL;
-++	}
-++
-++	return err;
-++}
-++
-+ static int __dev_open(struct net_device *dev, struct netlink_ext_ack *extack)
-+ {
-+ 	const struct net_device_ops *ops = dev->netdev_ops;
-+@@ -4254,6 +4276,21 @@ int gro_normal_batch __read_mostly = 8;
-+ static inline void ____napi_schedule(struct softnet_data *sd,
-+ 				     struct napi_struct *napi)
-+ {
-++	struct task_struct *thread;
-++
-++	if (test_bit(NAPI_STATE_THREADED, &napi->state)) {
-++		/* Paired with smp_mb__before_atomic() in
-++		 * napi_enable(). Use READ_ONCE() to guarantee
-++		 * a complete read on napi->thread. Only call
-++		 * wake_up_process() when it's not NULL.
-++		 */
-++		thread = READ_ONCE(napi->thread);
-++		if (thread) {
-++			wake_up_process(thread);
-++			return;
-++		}
-++	}
-++
-+ 	list_add_tail(&napi->poll_list, &sd->poll_list);
-+ 	__raise_softirq_irqoff(NET_RX_SOFTIRQ);
-+ }
-+@@ -6705,6 +6742,12 @@ void netif_napi_add(struct net_device *d
-+ 	set_bit(NAPI_STATE_NPSVC, &napi->state);
-+ 	list_add_rcu(&napi->dev_list, &dev->napi_list);
-+ 	napi_hash_add(napi);
-++	/* Create kthread for this napi if dev->threaded is set.
-++	 * Clear dev->threaded if kthread creation failed so that
-++	 * threaded mode will not be enabled in napi_enable().
-++	 */
-++	if (dev->threaded && napi_kthread_create(napi))
-++		dev->threaded = 0;
-+ }
-+ EXPORT_SYMBOL(netif_napi_add);
-+ 
-+@@ -6721,9 +6764,28 @@ void napi_disable(struct napi_struct *n)
-+ 	hrtimer_cancel(&n->timer);
-+ 
-+ 	clear_bit(NAPI_STATE_DISABLE, &n->state);
-++	clear_bit(NAPI_STATE_THREADED, &n->state);
-+ }
-+ EXPORT_SYMBOL(napi_disable);
-+ 
-++/**
-++ *	napi_enable - enable NAPI scheduling
-++ *	@n: NAPI context
-++ *
-++ * Resume NAPI from being scheduled on this context.
-++ * Must be paired with napi_disable.
-++ */
-++void napi_enable(struct napi_struct *n)
-++{
-++	BUG_ON(!test_bit(NAPI_STATE_SCHED, &n->state));
-++	smp_mb__before_atomic();
-++	clear_bit(NAPI_STATE_SCHED, &n->state);
-++	clear_bit(NAPI_STATE_NPSVC, &n->state);
-++	if (n->dev->threaded && n->thread)
-++		set_bit(NAPI_STATE_THREADED, &n->state);
-++}
-++EXPORT_SYMBOL(napi_enable);
-++
-+ static void flush_gro_hash(struct napi_struct *napi)
-+ {
-+ 	int i;
-+@@ -6749,6 +6811,11 @@ void __netif_napi_del(struct napi_struct
-+ 
-+ 	flush_gro_hash(napi);
-+ 	napi->gro_bitmask = 0;
-++
-++	if (napi->thread) {
-++		kthread_stop(napi->thread);
-++		napi->thread = NULL;
-++	}
-+ }
-+ EXPORT_SYMBOL(__netif_napi_del);
-+ 
-+@@ -6830,6 +6897,51 @@ static int napi_poll(struct napi_struct
-+ 	return work;
-+ }
-+ 
-++static int napi_thread_wait(struct napi_struct *napi)
-++{
-++	set_current_state(TASK_INTERRUPTIBLE);
-++
-++	while (!kthread_should_stop() && !napi_disable_pending(napi)) {
-++		if (test_bit(NAPI_STATE_SCHED, &napi->state)) {
-++			WARN_ON(!list_empty(&napi->poll_list));
-++			__set_current_state(TASK_RUNNING);
-++			return 0;
-++		}
-++
-++		schedule();
-++		set_current_state(TASK_INTERRUPTIBLE);
-++	}
-++	__set_current_state(TASK_RUNNING);
-++	return -1;
-++}
-++
-++static int napi_threaded_poll(void *data)
-++{
-++	struct napi_struct *napi = data;
-++	void *have;
-++
-++	while (!napi_thread_wait(napi)) {
-++		for (;;) {
-++			bool repoll = false;
-++
-++			local_bh_disable();
-++
-++			have = netpoll_poll_lock(napi);
-++			__napi_poll(napi, &repoll);
-++			netpoll_poll_unlock(have);
-++
-++			__kfree_skb_flush();
-++			local_bh_enable();
-++
-++			if (!repoll)
-++				break;
-++
-++			cond_resched();
-++		}
-++	}
-++	return 0;
-++}
-++
-+ static __latent_entropy void net_rx_action(struct softirq_action *h)
-+ {
-+ 	struct softnet_data *sd = this_cpu_ptr(&softnet_data);
-diff --git a/target/linux/generic/backport-5.10/602-v5.12-net-add-sysfs-attribute-to-control-napi-threaded-mod.patch b/target/linux/generic/backport-5.10/602-v5.12-net-add-sysfs-attribute-to-control-napi-threaded-mod.patch
-new file mode 100644
-index 0000000000..e72d5eeca4
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/602-v5.12-net-add-sysfs-attribute-to-control-napi-threaded-mod.patch
-@@ -0,0 +1,177 @@
-+From: Wei Wang <weiwan@google.com>
-+Date: Mon, 8 Feb 2021 11:34:10 -0800
-+Subject: [PATCH] net: add sysfs attribute to control napi threaded mode
-+
-+This patch adds a new sysfs attribute to the network device class.
-+Said attribute provides a per-device control to enable/disable the
-+threaded mode for all the napi instances of the given network device,
-+without the need for a device up/down.
-+User sets it to 1 or 0 to enable or disable threaded mode.
-+Note: when switching between threaded and the current softirq based mode
-+for a napi instance, it will not immediately take effect if the napi is
-+currently being polled. The mode switch will happen for the next time
-+napi_schedule() is called.
-+
-+Co-developed-by: Paolo Abeni <pabeni@redhat.com>
-+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
-+Co-developed-by: Hannes Frederic Sowa <hannes@stressinduktion.org>
-+Signed-off-by: Hannes Frederic Sowa <hannes@stressinduktion.org>
-+Co-developed-by: Felix Fietkau <nbd@nbd.name>
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+Signed-off-by: Wei Wang <weiwan@google.com>
-+Reviewed-by: Alexander Duyck <alexanderduyck@fb.com>
-+Signed-off-by: David S. Miller <davem@davemloft.net>
-+---
-+
-+--- a/Documentation/ABI/testing/sysfs-class-net
-++++ b/Documentation/ABI/testing/sysfs-class-net
-+@@ -337,3 +337,18 @@ Contact:	netdev@vger.kernel.org
-+ Description:
-+ 		32-bit unsigned integer counting the number of times the link has
-+ 		been down
-++
-++What:		/sys/class/net/<iface>/threaded
-++Date:		Jan 2021
-++KernelVersion:	5.12
-++Contact:	netdev@vger.kernel.org
-++Description:
-++		Boolean value to control the threaded mode per device. User could
-++		set this value to enable/disable threaded mode for all napi
-++		belonging to this device, without the need to do device up/down.
-++
-++		Possible values:
-++		== ==================================
-++		0  threaded mode disabled for this dev
-++		1  threaded mode enabled for this dev
-++		== ==================================
-+--- a/include/linux/netdevice.h
-++++ b/include/linux/netdevice.h
-+@@ -491,6 +491,8 @@ static inline bool napi_complete(struct
-+ 	return napi_complete_done(n, 0);
-+ }
-+ 
-++int dev_set_threaded(struct net_device *dev, bool threaded);
-++
-+ /**
-+  *	napi_disable - prevent NAPI from scheduling
-+  *	@n: NAPI context
-+--- a/net/core/dev.c
-++++ b/net/core/dev.c
-+@@ -4280,8 +4280,9 @@ static inline void ____napi_schedule(str
-+ 
-+ 	if (test_bit(NAPI_STATE_THREADED, &napi->state)) {
-+ 		/* Paired with smp_mb__before_atomic() in
-+-		 * napi_enable(). Use READ_ONCE() to guarantee
-+-		 * a complete read on napi->thread. Only call
-++		 * napi_enable()/dev_set_threaded().
-++		 * Use READ_ONCE() to guarantee a complete
-++		 * read on napi->thread. Only call
-+ 		 * wake_up_process() when it's not NULL.
-+ 		 */
-+ 		thread = READ_ONCE(napi->thread);
-+@@ -6715,6 +6716,49 @@ static void init_gro_hash(struct napi_st
-+ 	napi->gro_bitmask = 0;
-+ }
-+ 
-++int dev_set_threaded(struct net_device *dev, bool threaded)
-++{
-++	struct napi_struct *napi;
-++	int err = 0;
-++
-++	if (dev->threaded == threaded)
-++		return 0;
-++
-++	if (threaded) {
-++		list_for_each_entry(napi, &dev->napi_list, dev_list) {
-++			if (!napi->thread) {
-++				err = napi_kthread_create(napi);
-++				if (err) {
-++					threaded = false;
-++					break;
-++				}
-++			}
-++		}
-++	}
-++
-++	dev->threaded = threaded;
-++
-++	/* Make sure kthread is created before THREADED bit
-++	 * is set.
-++	 */
-++	smp_mb__before_atomic();
-++
-++	/* Setting/unsetting threaded mode on a napi might not immediately
-++	 * take effect, if the current napi instance is actively being
-++	 * polled. In this case, the switch between threaded mode and
-++	 * softirq mode will happen in the next round of napi_schedule().
-++	 * This should not cause hiccups/stalls to the live traffic.
-++	 */
-++	list_for_each_entry(napi, &dev->napi_list, dev_list) {
-++		if (threaded)
-++			set_bit(NAPI_STATE_THREADED, &napi->state);
-++		else
-++			clear_bit(NAPI_STATE_THREADED, &napi->state);
-++	}
-++
-++	return err;
-++}
-++
-+ void netif_napi_add(struct net_device *dev, struct napi_struct *napi,
-+ 		    int (*poll)(struct napi_struct *, int), int weight)
-+ {
-+--- a/net/core/net-sysfs.c
-++++ b/net/core/net-sysfs.c
-+@@ -538,6 +538,45 @@ static ssize_t phys_switch_id_show(struc
-+ }
-+ static DEVICE_ATTR_RO(phys_switch_id);
-+ 
-++static ssize_t threaded_show(struct device *dev,
-++			     struct device_attribute *attr, char *buf)
-++{
-++	struct net_device *netdev = to_net_dev(dev);
-++	ssize_t ret = -EINVAL;
-++
-++	if (!rtnl_trylock())
-++		return restart_syscall();
-++
-++	if (dev_isalive(netdev))
-++		ret = sprintf(buf, fmt_dec, netdev->threaded);
-++
-++	rtnl_unlock();
-++	return ret;
-++}
-++
-++static int modify_napi_threaded(struct net_device *dev, unsigned long val)
-++{
-++	int ret;
-++
-++	if (list_empty(&dev->napi_list))
-++		return -EOPNOTSUPP;
-++
-++	if (val != 0 && val != 1)
-++		return -EOPNOTSUPP;
-++
-++	ret = dev_set_threaded(dev, val);
-++
-++	return ret;
-++}
-++
-++static ssize_t threaded_store(struct device *dev,
-++			      struct device_attribute *attr,
-++			      const char *buf, size_t len)
-++{
-++	return netdev_store(dev, attr, buf, len, modify_napi_threaded);
-++}
-++static DEVICE_ATTR_RW(threaded);
-++
-+ static struct attribute *net_class_attrs[] __ro_after_init = {
-+ 	&dev_attr_netdev_group.attr,
-+ 	&dev_attr_type.attr,
-+@@ -570,6 +609,7 @@ static struct attribute *net_class_attrs
-+ 	&dev_attr_proto_down.attr,
-+ 	&dev_attr_carrier_up_count.attr,
-+ 	&dev_attr_carrier_down_count.attr,
-++	&dev_attr_threaded.attr,
-+ 	NULL,
-+ };
-+ ATTRIBUTE_GROUPS(net_class);
-diff --git a/target/linux/generic/backport-5.10/603-v5.12-net-fix-race-between-napi-kthread-mode-and-busy-poll.patch b/target/linux/generic/backport-5.10/603-v5.12-net-fix-race-between-napi-kthread-mode-and-busy-poll.patch
-new file mode 100644
-index 0000000000..dddc35918e
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/603-v5.12-net-fix-race-between-napi-kthread-mode-and-busy-poll.patch
-@@ -0,0 +1,93 @@
-+From: Wei Wang <weiwan@google.com>
-+Date: Mon, 1 Mar 2021 17:21:13 -0800
-+Subject: [PATCH] net: fix race between napi kthread mode and busy poll
-+
-+Currently, napi_thread_wait() checks for NAPI_STATE_SCHED bit to
-+determine if the kthread owns this napi and could call napi->poll() on
-+it. However, if socket busy poll is enabled, it is possible that the
-+busy poll thread grabs this SCHED bit (after the previous napi->poll()
-+invokes napi_complete_done() and clears SCHED bit) and tries to poll
-+on the same napi. napi_disable() could grab the SCHED bit as well.
-+This patch tries to fix this race by adding a new bit
-+NAPI_STATE_SCHED_THREADED in napi->state. This bit gets set in
-+____napi_schedule() if the threaded mode is enabled, and gets cleared
-+in napi_complete_done(), and we only poll the napi in kthread if this
-+bit is set. This helps distinguish the ownership of the napi between
-+kthread and other scenarios and fixes the race issue.
-+
-+Fixes: 29863d41bb6e ("net: implement threaded-able napi poll loop support")
-+Reported-by: Martin Zaharinov <micron10@gmail.com>
-+Suggested-by: Jakub Kicinski <kuba@kernel.org>
-+Signed-off-by: Wei Wang <weiwan@google.com>
-+Cc: Alexander Duyck <alexanderduyck@fb.com>
-+Cc: Eric Dumazet <edumazet@google.com>
-+Cc: Paolo Abeni <pabeni@redhat.com>
-+Cc: Hannes Frederic Sowa <hannes@stressinduktion.org>
-+---
-+
-+--- a/include/linux/netdevice.h
-++++ b/include/linux/netdevice.h
-+@@ -359,6 +359,7 @@ enum {
-+ 	NAPI_STATE_NO_BUSY_POLL,/* Do not add in napi_hash, no busy polling */
-+ 	NAPI_STATE_IN_BUSY_POLL,/* sk_busy_loop() owns this NAPI */
-+ 	NAPI_STATE_THREADED,		/* The poll is performed inside its own thread*/
-++	NAPI_STATE_SCHED_THREADED,	/* Napi is currently scheduled in threaded mode */
-+ };
-+ 
-+ enum {
-+@@ -370,6 +371,7 @@ enum {
-+ 	NAPIF_STATE_NO_BUSY_POLL = BIT(NAPI_STATE_NO_BUSY_POLL),
-+ 	NAPIF_STATE_IN_BUSY_POLL = BIT(NAPI_STATE_IN_BUSY_POLL),
-+ 	NAPIF_STATE_THREADED	 = BIT(NAPI_STATE_THREADED),
-++	NAPIF_STATE_SCHED_THREADED	= BIT(NAPI_STATE_SCHED_THREADED),
-+ };
-+ 
-+ enum gro_result {
-+--- a/net/core/dev.c
-++++ b/net/core/dev.c
-+@@ -4287,6 +4287,8 @@ static inline void ____napi_schedule(str
-+ 		 */
-+ 		thread = READ_ONCE(napi->thread);
-+ 		if (thread) {
-++			if (thread->state != TASK_INTERRUPTIBLE)
-++				set_bit(NAPI_STATE_SCHED_THREADED, &napi->state);
-+ 			wake_up_process(thread);
-+ 			return;
-+ 		}
-+@@ -6507,7 +6509,8 @@ bool napi_complete_done(struct napi_stru
-+ 
-+ 		WARN_ON_ONCE(!(val & NAPIF_STATE_SCHED));
-+ 
-+-		new = val & ~(NAPIF_STATE_MISSED | NAPIF_STATE_SCHED);
-++		new = val & ~(NAPIF_STATE_MISSED | NAPIF_STATE_SCHED |
-++			      NAPIF_STATE_SCHED_THREADED);
-+ 
-+ 		/* If STATE_MISSED was set, leave STATE_SCHED set,
-+ 		 * because we will call napi->poll() one more time.
-+@@ -6943,16 +6946,25 @@ static int napi_poll(struct napi_struct
-+ 
-+ static int napi_thread_wait(struct napi_struct *napi)
-+ {
-++	bool woken = false;
-++
-+ 	set_current_state(TASK_INTERRUPTIBLE);
-+ 
-+ 	while (!kthread_should_stop() && !napi_disable_pending(napi)) {
-+-		if (test_bit(NAPI_STATE_SCHED, &napi->state)) {
-++		/* Testing SCHED_THREADED bit here to make sure the current
-++		 * kthread owns this napi and could poll on this napi.
-++		 * Testing SCHED bit is not enough because SCHED bit might be
-++		 * set by some other busy poll thread or by napi_disable().
-++		 */
-++		if (test_bit(NAPI_STATE_SCHED_THREADED, &napi->state) || woken) {
-+ 			WARN_ON(!list_empty(&napi->poll_list));
-+ 			__set_current_state(TASK_RUNNING);
-+ 			return 0;
-+ 		}
-+ 
-+ 		schedule();
-++		/* woken being true indicates this thread owns this napi. */
-++		woken = true;
-+ 		set_current_state(TASK_INTERRUPTIBLE);
-+ 	}
-+ 	__set_current_state(TASK_RUNNING);
-diff --git a/target/linux/generic/backport-5.10/604-v5.12-net-fix-hangup-on-napi_disable-for-threaded-napi.patch b/target/linux/generic/backport-5.10/604-v5.12-net-fix-hangup-on-napi_disable-for-threaded-napi.patch
-new file mode 100644
-index 0000000000..4b83641291
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/604-v5.12-net-fix-hangup-on-napi_disable-for-threaded-napi.patch
-@@ -0,0 +1,53 @@
-+From: Paolo Abeni <pabeni@redhat.com>
-+Date: Fri, 9 Apr 2021 17:24:17 +0200
-+Subject: [PATCH] net: fix hangup on napi_disable for threaded napi
-+
-+napi_disable() is subject to an hangup, when the threaded
-+mode is enabled and the napi is under heavy traffic.
-+
-+If the relevant napi has been scheduled and the napi_disable()
-+kicks in before the next napi_threaded_wait() completes - so
-+that the latter quits due to the napi_disable_pending() condition,
-+the existing code leaves the NAPI_STATE_SCHED bit set and the
-+napi_disable() loop waiting for such bit will hang.
-+
-+This patch addresses the issue by dropping the NAPI_STATE_DISABLE
-+bit test in napi_thread_wait(). The later napi_threaded_poll()
-+iteration will take care of clearing the NAPI_STATE_SCHED.
-+
-+This also addresses a related problem reported by Jakub:
-+before this patch a napi_disable()/napi_enable() pair killed
-+the napi thread, effectively disabling the threaded mode.
-+On the patched kernel napi_disable() simply stops scheduling
-+the relevant thread.
-+
-+v1 -> v2:
-+  - let the main napi_thread_poll() loop clear the SCHED bit
-+
-+Reported-by: Jakub Kicinski <kuba@kernel.org>
-+Fixes: 29863d41bb6e ("net: implement threaded-able napi poll loop support")
-+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
-+Reviewed-by: Eric Dumazet <edumazet@google.com>
-+Link: https://lore.kernel.org/r/883923fa22745a9589e8610962b7dc59df09fb1f.1617981844.git.pabeni@redhat.com
-+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
-+---
-+
-+--- a/net/core/dev.c
-++++ b/net/core/dev.c
-+@@ -6951,7 +6951,7 @@ static int napi_thread_wait(struct napi_
-+ 
-+ 	set_current_state(TASK_INTERRUPTIBLE);
-+ 
-+-	while (!kthread_should_stop() && !napi_disable_pending(napi)) {
-++	while (!kthread_should_stop()) {
-+ 		/* Testing SCHED_THREADED bit here to make sure the current
-+ 		 * kthread owns this napi and could poll on this napi.
-+ 		 * Testing SCHED bit is not enough because SCHED bit might be
-+@@ -6969,6 +6969,7 @@ static int napi_thread_wait(struct napi_
-+ 		set_current_state(TASK_INTERRUPTIBLE);
-+ 	}
-+ 	__set_current_state(TASK_RUNNING);
-++
-+ 	return -1;
-+ }
-+ 
-diff --git a/target/linux/generic/backport-5.10/770-v5.12-net-bridge-notify-switchdev-of-disappearance-of-old-.patch b/target/linux/generic/backport-5.10/770-v5.12-net-bridge-notify-switchdev-of-disappearance-of-old-.patch
-new file mode 100644
-index 0000000000..c43cb4d1f2
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/770-v5.12-net-bridge-notify-switchdev-of-disappearance-of-old-.patch
-@@ -0,0 +1,126 @@
-+From 90dc8fd36078a536671adae884d0b929cce6480a Mon Sep 17 00:00:00 2001
-+From: Vladimir Oltean <vladimir.oltean@nxp.com>
-+Date: Wed, 6 Jan 2021 11:51:30 +0200
-+Subject: [PATCH] net: bridge: notify switchdev of disappearance of old FDB
-+ entry upon migration
-+
-+Currently the bridge emits atomic switchdev notifications for
-+dynamically learnt FDB entries. Monitoring these notifications works
-+wonders for switchdev drivers that want to keep their hardware FDB in
-+sync with the bridge's FDB.
-+
-+For example station A wants to talk to station B in the diagram below,
-+and we are concerned with the behavior of the bridge on the DUT device:
-+
-+                   DUT
-+ +-------------------------------------+
-+ |                 br0                 |
-+ | +------+ +------+ +------+ +------+ |
-+ | |      | |      | |      | |      | |
-+ | | swp0 | | swp1 | | swp2 | | eth0 | |
-+ +-------------------------------------+
-+      |        |                  |
-+  Station A    |                  |
-+               |                  |
-+         +--+------+--+    +--+------+--+
-+         |  |      |  |    |  |      |  |
-+         |  | swp0 |  |    |  | swp0 |  |
-+ Another |  +------+  |    |  +------+  | Another
-+  switch |     br0    |    |     br0    | switch
-+         |  +------+  |    |  +------+  |
-+         |  |      |  |    |  |      |  |
-+         |  | swp1 |  |    |  | swp1 |  |
-+         +--+------+--+    +--+------+--+
-+                                  |
-+                              Station B
-+
-+Interfaces swp0, swp1, swp2 are handled by a switchdev driver that has
-+the following property: frames injected from its control interface bypass
-+the internal address analyzer logic, and therefore, this hardware does
-+not learn from the source address of packets transmitted by the network
-+stack through it. So, since bridging between eth0 (where Station B is
-+attached) and swp0 (where Station A is attached) is done in software,
-+the switchdev hardware will never learn the source address of Station B.
-+So the traffic towards that destination will be treated as unknown, i.e.
-+flooded.
-+
-+This is where the bridge notifications come in handy. When br0 on the
-+DUT sees frames with Station B's MAC address on eth0, the switchdev
-+driver gets these notifications and can install a rule to send frames
-+towards Station B's address that are incoming from swp0, swp1, swp2,
-+only towards the control interface. This is all switchdev driver private
-+business, which the notification makes possible.
-+
-+All is fine until someone unplugs Station B's cable and moves it to the
-+other switch:
-+
-+                   DUT
-+ +-------------------------------------+
-+ |                 br0                 |
-+ | +------+ +------+ +------+ +------+ |
-+ | |      | |      | |      | |      | |
-+ | | swp0 | | swp1 | | swp2 | | eth0 | |
-+ +-------------------------------------+
-+      |        |                  |
-+  Station A    |                  |
-+               |                  |
-+         +--+------+--+    +--+------+--+
-+         |  |      |  |    |  |      |  |
-+         |  | swp0 |  |    |  | swp0 |  |
-+ Another |  +------+  |    |  +------+  | Another
-+  switch |     br0    |    |     br0    | switch
-+         |  +------+  |    |  +------+  |
-+         |  |      |  |    |  |      |  |
-+         |  | swp1 |  |    |  | swp1 |  |
-+         +--+------+--+    +--+------+--+
-+               |
-+           Station B
-+
-+Luckily for the use cases we care about, Station B is noisy enough that
-+the DUT hears it (on swp1 this time). swp1 receives the frames and
-+delivers them to the bridge, who enters the unlikely path in br_fdb_update
-+of updating an existing entry. It moves the entry in the software bridge
-+to swp1 and emits an addition notification towards that.
-+
-+As far as the switchdev driver is concerned, all that it needs to ensure
-+is that traffic between Station A and Station B is not forever broken.
-+If it does nothing, then the stale rule to send frames for Station B
-+towards the control interface remains in place. But Station B is no
-+longer reachable via the control interface, but via a port that can
-+offload the bridge port learning attribute. It's just that the port is
-+prevented from learning this address, since the rule overrides FDB
-+updates. So the rule needs to go. The question is via what mechanism.
-+
-+It sure would be possible for this switchdev driver to keep track of all
-+addresses which are sent to the control interface, and then also listen
-+for bridge notifier events on its own ports, searching for the ones that
-+have a MAC address which was previously sent to the control interface.
-+But this is cumbersome and inefficient. Instead, with one small change,
-+the bridge could notify of the address deletion from the old port, in a
-+symmetrical manner with how it did for the insertion. Then the switchdev
-+driver would not be required to monitor learn/forget events for its own
-+ports. It could just delete the rule towards the control interface upon
-+bridge entry migration. This would make hardware address learning be
-+possible again. Then it would take a few more packets until the hardware
-+and software FDB would be in sync again.
-+
-+Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
-+Acked-by: Nikolay Aleksandrov <nikolay@nvidia.com>
-+Reviewed-by: Ido Schimmel <idosch@nvidia.com>
-+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
-+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
-+---
-+ net/bridge/br_fdb.c | 1 +
-+ 1 file changed, 1 insertion(+)
-+
-+--- a/net/bridge/br_fdb.c
-++++ b/net/bridge/br_fdb.c
-+@@ -602,6 +602,7 @@ void br_fdb_update(struct net_bridge *br
-+ 			/* fastpath: update of existing entry */
-+ 			if (unlikely(source != fdb->dst &&
-+ 				     !test_bit(BR_FDB_STICKY, &fdb->flags))) {
-++				br_switchdev_fdb_notify(fdb, RTM_DELNEIGH);
-+ 				fdb->dst = source;
-+ 				fdb_modified = true;
-+ 				/* Take over HW learned entry */
-diff --git a/target/linux/generic/backport-5.10/771-v5.12-net-dsa-be-louder-when-a-non-legacy-FDB-operation-fa.patch b/target/linux/generic/backport-5.10/771-v5.12-net-dsa-be-louder-when-a-non-legacy-FDB-operation-fa.patch
-new file mode 100644
-index 0000000000..ecb81004cb
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/771-v5.12-net-dsa-be-louder-when-a-non-legacy-FDB-operation-fa.patch
-@@ -0,0 +1,52 @@
-+From 2fd186501b1cff155cc4a755c210793cfc0dffb5 Mon Sep 17 00:00:00 2001
-+From: Vladimir Oltean <vladimir.oltean@nxp.com>
-+Date: Wed, 6 Jan 2021 11:51:31 +0200
-+Subject: [PATCH] net: dsa: be louder when a non-legacy FDB operation fails
-+
-+The dev_close() call was added in commit c9eb3e0f8701 ("net: dsa: Add
-+support for learning FDB through notification") "to indicate inconsistent
-+situation" when we could not delete an FDB entry from the port.
-+
-+bridge fdb del d8:58:d7:00:ca:6d dev swp0 self master
-+
-+It is a bit drastic and at the same time not helpful if the above fails
-+to only print with netdev_dbg log level, but on the other hand to bring
-+the interface down.
-+
-+So increase the verbosity of the error message, and drop dev_close().
-+
-+Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
-+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
-+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
-+---
-+ net/dsa/slave.c | 10 +++++++---
-+ 1 file changed, 7 insertions(+), 3 deletions(-)
-+
-+--- a/net/dsa/slave.c
-++++ b/net/dsa/slave.c
-+@@ -2075,7 +2075,9 @@ static void dsa_slave_switchdev_event_wo
-+ 
-+ 		err = dsa_port_fdb_add(dp, fdb_info->addr, fdb_info->vid);
-+ 		if (err) {
-+-			netdev_dbg(dev, "fdb add failed err=%d\n", err);
-++			netdev_err(dev,
-++				   "failed to add %pM vid %d to fdb: %d\n",
-++				   fdb_info->addr, fdb_info->vid, err);
-+ 			break;
-+ 		}
-+ 		fdb_info->offloaded = true;
-+@@ -2090,9 +2092,11 @@ static void dsa_slave_switchdev_event_wo
-+ 
-+ 		err = dsa_port_fdb_del(dp, fdb_info->addr, fdb_info->vid);
-+ 		if (err) {
-+-			netdev_dbg(dev, "fdb del failed err=%d\n", err);
-+-			dev_close(dev);
-++			netdev_err(dev,
-++				   "failed to delete %pM vid %d from fdb: %d\n",
-++				   fdb_info->addr, fdb_info->vid, err);
-+ 		}
-++
-+ 		break;
-+ 	}
-+ 	rtnl_unlock();
-diff --git a/target/linux/generic/backport-5.10/772-v5.12-net-dsa-don-t-use-switchdev_notifier_fdb_info-in-dsa.patch b/target/linux/generic/backport-5.10/772-v5.12-net-dsa-don-t-use-switchdev_notifier_fdb_info-in-dsa.patch
-new file mode 100644
-index 0000000000..bb943f1312
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/772-v5.12-net-dsa-don-t-use-switchdev_notifier_fdb_info-in-dsa.patch
-@@ -0,0 +1,226 @@
-+From c4bb76a9a0ef87c4cc1f636defed5f12deb9f5a7 Mon Sep 17 00:00:00 2001
-+From: Vladimir Oltean <vladimir.oltean@nxp.com>
-+Date: Wed, 6 Jan 2021 11:51:32 +0200
-+Subject: [PATCH] net: dsa: don't use switchdev_notifier_fdb_info in
-+ dsa_switchdev_event_work
-+
-+Currently DSA doesn't add FDB entries on the CPU port, because it only
-+does so through switchdev, which is associated with a net_device, and
-+there are none of those for the CPU port.
-+
-+But actually FDB addresses on the CPU port have some use cases of their
-+own, if the switchdev operations are initiated from within the DSA
-+layer. There is just one problem with the existing code: it passes a
-+structure in dsa_switchdev_event_work which was retrieved directly from
-+switchdev, so it contains a net_device. We need to generalize the
-+contents to something that covers the CPU port as well: the "ds, port"
-+tuple is fine for that.
-+
-+Note that the new procedure for notifying the successful FDB offload is
-+inspired from the rocker model.
-+
-+Also, nothing was being done if added_by_user was false. Let's check for
-+that a lot earlier, and don't actually bother to schedule the worker
-+for nothing.
-+
-+Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
-+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
-+---
-+ net/dsa/dsa_priv.h |  12 +++++
-+ net/dsa/slave.c    | 106 ++++++++++++++++++++++-----------------------
-+ 2 files changed, 65 insertions(+), 53 deletions(-)
-+
-+--- a/net/dsa/dsa_priv.h
-++++ b/net/dsa/dsa_priv.h
-+@@ -73,6 +73,18 @@ struct dsa_notifier_mtu_info {
-+ 	int mtu;
-+ };
-+ 
-++struct dsa_switchdev_event_work {
-++	struct dsa_switch *ds;
-++	int port;
-++	struct work_struct work;
-++	unsigned long event;
-++	/* Specific for SWITCHDEV_FDB_ADD_TO_DEVICE and
-++	 * SWITCHDEV_FDB_DEL_TO_DEVICE
-++	 */
-++	unsigned char addr[ETH_ALEN];
-++	u16 vid;
-++};
-++
-+ struct dsa_slave_priv {
-+ 	/* Copy of CPU port xmit for faster access in slave transmit hot path */
-+ 	struct sk_buff *	(*xmit)(struct sk_buff *skb,
-+--- a/net/dsa/slave.c
-++++ b/net/dsa/slave.c
-+@@ -2050,76 +2050,66 @@ static int dsa_slave_netdevice_event(str
-+ 	return NOTIFY_DONE;
-+ }
-+ 
-+-struct dsa_switchdev_event_work {
-+-	struct work_struct work;
-+-	struct switchdev_notifier_fdb_info fdb_info;
-+-	struct net_device *dev;
-+-	unsigned long event;
-+-};
-++static void
-++dsa_fdb_offload_notify(struct dsa_switchdev_event_work *switchdev_work)
-++{
-++	struct dsa_switch *ds = switchdev_work->ds;
-++	struct switchdev_notifier_fdb_info info;
-++	struct dsa_port *dp;
-++
-++	if (!dsa_is_user_port(ds, switchdev_work->port))
-++		return;
-++
-++	info.addr = switchdev_work->addr;
-++	info.vid = switchdev_work->vid;
-++	info.offloaded = true;
-++	dp = dsa_to_port(ds, switchdev_work->port);
-++	call_switchdev_notifiers(SWITCHDEV_FDB_OFFLOADED,
-++				 dp->slave, &info.info, NULL);
-++}
-+ 
-+ static void dsa_slave_switchdev_event_work(struct work_struct *work)
-+ {
-+ 	struct dsa_switchdev_event_work *switchdev_work =
-+ 		container_of(work, struct dsa_switchdev_event_work, work);
-+-	struct net_device *dev = switchdev_work->dev;
-+-	struct switchdev_notifier_fdb_info *fdb_info;
-+-	struct dsa_port *dp = dsa_slave_to_port(dev);
-++	struct dsa_switch *ds = switchdev_work->ds;
-++	struct dsa_port *dp;
-+ 	int err;
-+ 
-++	dp = dsa_to_port(ds, switchdev_work->port);
-++
-+ 	rtnl_lock();
-+ 	switch (switchdev_work->event) {
-+ 	case SWITCHDEV_FDB_ADD_TO_DEVICE:
-+-		fdb_info = &switchdev_work->fdb_info;
-+-		if (!fdb_info->added_by_user)
-+-			break;
-+-
-+-		err = dsa_port_fdb_add(dp, fdb_info->addr, fdb_info->vid);
-++		err = dsa_port_fdb_add(dp, switchdev_work->addr,
-++				       switchdev_work->vid);
-+ 		if (err) {
-+-			netdev_err(dev,
-+-				   "failed to add %pM vid %d to fdb: %d\n",
-+-				   fdb_info->addr, fdb_info->vid, err);
-++			dev_err(ds->dev,
-++				"port %d failed to add %pM vid %d to fdb: %d\n",
-++				dp->index, switchdev_work->addr,
-++				switchdev_work->vid, err);
-+ 			break;
-+ 		}
-+-		fdb_info->offloaded = true;
-+-		call_switchdev_notifiers(SWITCHDEV_FDB_OFFLOADED, dev,
-+-					 &fdb_info->info, NULL);
-++		dsa_fdb_offload_notify(switchdev_work);
-+ 		break;
-+ 
-+ 	case SWITCHDEV_FDB_DEL_TO_DEVICE:
-+-		fdb_info = &switchdev_work->fdb_info;
-+-		if (!fdb_info->added_by_user)
-+-			break;
-+-
-+-		err = dsa_port_fdb_del(dp, fdb_info->addr, fdb_info->vid);
-++		err = dsa_port_fdb_del(dp, switchdev_work->addr,
-++				       switchdev_work->vid);
-+ 		if (err) {
-+-			netdev_err(dev,
-+-				   "failed to delete %pM vid %d from fdb: %d\n",
-+-				   fdb_info->addr, fdb_info->vid, err);
-++			dev_err(ds->dev,
-++				"port %d failed to delete %pM vid %d from fdb: %d\n",
-++				dp->index, switchdev_work->addr,
-++				switchdev_work->vid, err);
-+ 		}
-+ 
-+ 		break;
-+ 	}
-+ 	rtnl_unlock();
-+ 
-+-	kfree(switchdev_work->fdb_info.addr);
-+ 	kfree(switchdev_work);
-+-	dev_put(dev);
-+-}
-+-
-+-static int
-+-dsa_slave_switchdev_fdb_work_init(struct dsa_switchdev_event_work *
-+-				  switchdev_work,
-+-				  const struct switchdev_notifier_fdb_info *
-+-				  fdb_info)
-+-{
-+-	memcpy(&switchdev_work->fdb_info, fdb_info,
-+-	       sizeof(switchdev_work->fdb_info));
-+-	switchdev_work->fdb_info.addr = kzalloc(ETH_ALEN, GFP_ATOMIC);
-+-	if (!switchdev_work->fdb_info.addr)
-+-		return -ENOMEM;
-+-	ether_addr_copy((u8 *)switchdev_work->fdb_info.addr,
-+-			fdb_info->addr);
-+-	return 0;
-++	if (dsa_is_user_port(ds, dp->index))
-++		dev_put(dp->slave);
-+ }
-+ 
-+ /* Called under rcu_read_lock() */
-+@@ -2127,7 +2117,9 @@ static int dsa_slave_switchdev_event(str
-+ 				     unsigned long event, void *ptr)
-+ {
-+ 	struct net_device *dev = switchdev_notifier_info_to_dev(ptr);
-++	const struct switchdev_notifier_fdb_info *fdb_info;
-+ 	struct dsa_switchdev_event_work *switchdev_work;
-++	struct dsa_port *dp;
-+ 	int err;
-+ 
-+ 	if (event == SWITCHDEV_PORT_ATTR_SET) {
-+@@ -2140,20 +2132,32 @@ static int dsa_slave_switchdev_event(str
-+ 	if (!dsa_slave_dev_check(dev))
-+ 		return NOTIFY_DONE;
-+ 
-++	dp = dsa_slave_to_port(dev);
-++
-+ 	switchdev_work = kzalloc(sizeof(*switchdev_work), GFP_ATOMIC);
-+ 	if (!switchdev_work)
-+ 		return NOTIFY_BAD;
-+ 
-+ 	INIT_WORK(&switchdev_work->work,
-+ 		  dsa_slave_switchdev_event_work);
-+-	switchdev_work->dev = dev;
-++	switchdev_work->ds = dp->ds;
-++	switchdev_work->port = dp->index;
-+ 	switchdev_work->event = event;
-+ 
-+ 	switch (event) {
-+ 	case SWITCHDEV_FDB_ADD_TO_DEVICE:
-+ 	case SWITCHDEV_FDB_DEL_TO_DEVICE:
-+-		if (dsa_slave_switchdev_fdb_work_init(switchdev_work, ptr))
-+-			goto err_fdb_work_init;
-++		fdb_info = ptr;
-++
-++		if (!fdb_info->added_by_user) {
-++			kfree(switchdev_work);
-++			return NOTIFY_OK;
-++		}
-++
-++		ether_addr_copy(switchdev_work->addr,
-++				fdb_info->addr);
-++		switchdev_work->vid = fdb_info->vid;
-++
-+ 		dev_hold(dev);
-+ 		break;
-+ 	default:
-+@@ -2163,10 +2167,6 @@ static int dsa_slave_switchdev_event(str
-+ 
-+ 	dsa_schedule_work(&switchdev_work->work);
-+ 	return NOTIFY_OK;
-+-
-+-err_fdb_work_init:
-+-	kfree(switchdev_work);
-+-	return NOTIFY_BAD;
-+ }
-+ 
-+ static int dsa_slave_switchdev_blocking_event(struct notifier_block *unused,
-diff --git a/target/linux/generic/backport-5.10/773-v5.12-net-dsa-move-switchdev-event-implementation-under-th.patch b/target/linux/generic/backport-5.10/773-v5.12-net-dsa-move-switchdev-event-implementation-under-th.patch
-new file mode 100644
-index 0000000000..48c2af770b
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/773-v5.12-net-dsa-move-switchdev-event-implementation-under-th.patch
-@@ -0,0 +1,85 @@
-+From 447d290a58bd335d68f665713842365d3d6447df Mon Sep 17 00:00:00 2001
-+From: Vladimir Oltean <vladimir.oltean@nxp.com>
-+Date: Wed, 6 Jan 2021 11:51:33 +0200
-+Subject: [PATCH] net: dsa: move switchdev event implementation under the same
-+ switch/case statement
-+
-+We'll need to start listening to SWITCHDEV_FDB_{ADD,DEL}_TO_DEVICE
-+events even for interfaces where dsa_slave_dev_check returns false, so
-+we need that check inside the switch-case statement for SWITCHDEV_FDB_*.
-+
-+This movement also avoids a useless allocation / free of switchdev_work
-+on the untreated "default event" case.
-+
-+Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
-+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
-+---
-+ net/dsa/slave.c | 35 ++++++++++++++++-------------------
-+ 1 file changed, 16 insertions(+), 19 deletions(-)
-+
-+--- a/net/dsa/slave.c
-++++ b/net/dsa/slave.c
-+@@ -2122,31 +2122,29 @@ static int dsa_slave_switchdev_event(str
-+ 	struct dsa_port *dp;
-+ 	int err;
-+ 
-+-	if (event == SWITCHDEV_PORT_ATTR_SET) {
-++	switch (event) {
-++	case SWITCHDEV_PORT_ATTR_SET:
-+ 		err = switchdev_handle_port_attr_set(dev, ptr,
-+ 						     dsa_slave_dev_check,
-+ 						     dsa_slave_port_attr_set);
-+ 		return notifier_from_errno(err);
-+-	}
-+-
-+-	if (!dsa_slave_dev_check(dev))
-+-		return NOTIFY_DONE;
-++	case SWITCHDEV_FDB_ADD_TO_DEVICE:
-++	case SWITCHDEV_FDB_DEL_TO_DEVICE:
-++		if (!dsa_slave_dev_check(dev))
-++			return NOTIFY_DONE;
-+ 
-+-	dp = dsa_slave_to_port(dev);
-++		dp = dsa_slave_to_port(dev);
-+ 
-+-	switchdev_work = kzalloc(sizeof(*switchdev_work), GFP_ATOMIC);
-+-	if (!switchdev_work)
-+-		return NOTIFY_BAD;
-+-
-+-	INIT_WORK(&switchdev_work->work,
-+-		  dsa_slave_switchdev_event_work);
-+-	switchdev_work->ds = dp->ds;
-+-	switchdev_work->port = dp->index;
-+-	switchdev_work->event = event;
-++		switchdev_work = kzalloc(sizeof(*switchdev_work), GFP_ATOMIC);
-++		if (!switchdev_work)
-++			return NOTIFY_BAD;
-++
-++		INIT_WORK(&switchdev_work->work,
-++			  dsa_slave_switchdev_event_work);
-++		switchdev_work->ds = dp->ds;
-++		switchdev_work->port = dp->index;
-++		switchdev_work->event = event;
-+ 
-+-	switch (event) {
-+-	case SWITCHDEV_FDB_ADD_TO_DEVICE:
-+-	case SWITCHDEV_FDB_DEL_TO_DEVICE:
-+ 		fdb_info = ptr;
-+ 
-+ 		if (!fdb_info->added_by_user) {
-+@@ -2159,13 +2157,12 @@ static int dsa_slave_switchdev_event(str
-+ 		switchdev_work->vid = fdb_info->vid;
-+ 
-+ 		dev_hold(dev);
-++		dsa_schedule_work(&switchdev_work->work);
-+ 		break;
-+ 	default:
-+-		kfree(switchdev_work);
-+ 		return NOTIFY_DONE;
-+ 	}
-+ 
-+-	dsa_schedule_work(&switchdev_work->work);
-+ 	return NOTIFY_OK;
-+ }
-+ 
-diff --git a/target/linux/generic/backport-5.10/774-v5.12-net-dsa-exit-early-in-dsa_slave_switchdev_event-if-w.patch b/target/linux/generic/backport-5.10/774-v5.12-net-dsa-exit-early-in-dsa_slave_switchdev_event-if-w.patch
-new file mode 100644
-index 0000000000..a1f56353ea
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/774-v5.12-net-dsa-exit-early-in-dsa_slave_switchdev_event-if-w.patch
-@@ -0,0 +1,42 @@
-+From 5fb4a451a87d8ed3363d28b63a3295399373d6c4 Mon Sep 17 00:00:00 2001
-+From: Vladimir Oltean <vladimir.oltean@nxp.com>
-+Date: Wed, 6 Jan 2021 11:51:34 +0200
-+Subject: [PATCH] net: dsa: exit early in dsa_slave_switchdev_event if we can't
-+ program the FDB
-+
-+Right now, the following would happen for a switch driver that does not
-+implement .port_fdb_add or .port_fdb_del.
-+
-+dsa_slave_switchdev_event returns NOTIFY_OK and schedules:
-+-> dsa_slave_switchdev_event_work
-+   -> dsa_port_fdb_add
-+      -> dsa_port_notify(DSA_NOTIFIER_FDB_ADD)
-+         -> dsa_switch_fdb_add
-+            -> if (!ds->ops->port_fdb_add) return -EOPNOTSUPP;
-+   -> an error is printed with dev_dbg, and
-+      dsa_fdb_offload_notify(switchdev_work) is not called.
-+
-+We can avoid scheduling the worker for nothing and say NOTIFY_DONE.
-+Because we don't call dsa_fdb_offload_notify, the static FDB entry will
-+remain just in the software bridge.
-+
-+Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
-+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
-+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
-+---
-+ net/dsa/slave.c | 3 +++
-+ 1 file changed, 3 insertions(+)
-+
-+--- a/net/dsa/slave.c
-++++ b/net/dsa/slave.c
-+@@ -2135,6 +2135,9 @@ static int dsa_slave_switchdev_event(str
-+ 
-+ 		dp = dsa_slave_to_port(dev);
-+ 
-++		if (!dp->ds->ops->port_fdb_add || !dp->ds->ops->port_fdb_del)
-++			return NOTIFY_DONE;
-++
-+ 		switchdev_work = kzalloc(sizeof(*switchdev_work), GFP_ATOMIC);
-+ 		if (!switchdev_work)
-+ 			return NOTIFY_BAD;
-diff --git a/target/linux/generic/backport-5.10/775-v5.12-net-dsa-listen-for-SWITCHDEV_-FDB-DEL-_ADD_TO_DEVICE.patch b/target/linux/generic/backport-5.10/775-v5.12-net-dsa-listen-for-SWITCHDEV_-FDB-DEL-_ADD_TO_DEVICE.patch
-new file mode 100644
-index 0000000000..e576ff8ce2
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/775-v5.12-net-dsa-listen-for-SWITCHDEV_-FDB-DEL-_ADD_TO_DEVICE.patch
-@@ -0,0 +1,264 @@
-+From d5f19486cee79d04c054427577ac96ed123706db Mon Sep 17 00:00:00 2001
-+From: Vladimir Oltean <vladimir.oltean@nxp.com>
-+Date: Wed, 6 Jan 2021 11:51:35 +0200
-+Subject: [PATCH] net: dsa: listen for SWITCHDEV_{FDB,DEL}_ADD_TO_DEVICE on
-+ foreign bridge neighbors
-+
-+Some DSA switches (and not only) cannot learn source MAC addresses from
-+packets injected from the CPU. They only perform hardware address
-+learning from inbound traffic.
-+
-+This can be problematic when we have a bridge spanning some DSA switch
-+ports and some non-DSA ports (which we'll call "foreign interfaces" from
-+DSA's perspective).
-+
-+There are 2 classes of problems created by the lack of learning on
-+CPU-injected traffic:
-+- excessive flooding, due to the fact that DSA treats those addresses as
-+  unknown
-+- the risk of stale routes, which can lead to temporary packet loss
-+
-+To illustrate the second class, consider the following situation, which
-+is common in production equipment (wireless access points, where there
-+is a WLAN interface and an Ethernet switch, and these form a single
-+bridging domain).
-+
-+ AP 1:
-+ +------------------------------------------------------------------------+
-+ |                                          br0                           |
-+ +------------------------------------------------------------------------+
-+ +------------+ +------------+ +------------+ +------------+ +------------+
-+ |    swp0    | |    swp1    | |    swp2    | |    swp3    | |    wlan0   |
-+ +------------+ +------------+ +------------+ +------------+ +------------+
-+       |                                                       ^        ^
-+       |                                                       |        |
-+       |                                                       |        |
-+       |                                                    Client A  Client B
-+       |
-+       |
-+       |
-+ +------------+ +------------+ +------------+ +------------+ +------------+
-+ |    swp0    | |    swp1    | |    swp2    | |    swp3    | |    wlan0   |
-+ +------------+ +------------+ +------------+ +------------+ +------------+
-+ +------------------------------------------------------------------------+
-+ |                                          br0                           |
-+ +------------------------------------------------------------------------+
-+ AP 2
-+
-+- br0 of AP 1 will know that Clients A and B are reachable via wlan0
-+- the hardware fdb of a DSA switch driver today is not kept in sync with
-+  the software entries on other bridge ports, so it will not know that
-+  clients A and B are reachable via the CPU port UNLESS the hardware
-+  switch itself performs SA learning from traffic injected from the CPU.
-+  Nonetheless, a substantial number of switches don't.
-+- the hardware fdb of the DSA switch on AP 2 may autonomously learn that
-+  Client A and B are reachable through swp0. Therefore, the software br0
-+  of AP 2 also may or may not learn this. In the example we're
-+  illustrating, some Ethernet traffic has been going on, and br0 from AP
-+  2 has indeed learnt that it can reach Client B through swp0.
-+
-+One of the wireless clients, say Client B, disconnects from AP 1 and
-+roams to AP 2. The topology now looks like this:
-+
-+ AP 1:
-+ +------------------------------------------------------------------------+
-+ |                                          br0                           |
-+ +------------------------------------------------------------------------+
-+ +------------+ +------------+ +------------+ +------------+ +------------+
-+ |    swp0    | |    swp1    | |    swp2    | |    swp3    | |    wlan0   |
-+ +------------+ +------------+ +------------+ +------------+ +------------+
-+       |                                                            ^
-+       |                                                            |
-+       |                                                         Client A
-+       |
-+       |
-+       |                                                         Client B
-+       |                                                            |
-+       |                                                            v
-+ +------------+ +------------+ +------------+ +------------+ +------------+
-+ |    swp0    | |    swp1    | |    swp2    | |    swp3    | |    wlan0   |
-+ +------------+ +------------+ +------------+ +------------+ +------------+
-+ +------------------------------------------------------------------------+
-+ |                                          br0                           |
-+ +------------------------------------------------------------------------+
-+ AP 2
-+
-+- br0 of AP 1 still knows that Client A is reachable via wlan0 (no change)
-+- br0 of AP 1 will (possibly) know that Client B has left wlan0. There
-+  are cases where it might never find out though. Either way, DSA today
-+  does not process that notification in any way.
-+- the hardware FDB of the DSA switch on AP 1 may learn autonomously that
-+  Client B can be reached via swp0, if it receives any packet with
-+  Client 1's source MAC address over Ethernet.
-+- the hardware FDB of the DSA switch on AP 2 still thinks that Client B
-+  can be reached via swp0. It does not know that it has roamed to wlan0,
-+  because it doesn't perform SA learning from the CPU port.
-+
-+Now Client A contacts Client B.
-+AP 1 routes the packet fine towards swp0 and delivers it on the Ethernet
-+segment.
-+AP 2 sees a frame on swp0 and its fdb says that the destination is swp0.
-+Hairpinning is disabled => drop.
-+
-+This problem comes from the fact that these switches have a 'blind spot'
-+for addresses coming from software bridging. The generic solution is not
-+to assume that hardware learning can be enabled somehow, but to listen
-+to more bridge learning events. It turns out that the bridge driver does
-+learn in software from all inbound frames, in __br_handle_local_finish.
-+A proper SWITCHDEV_FDB_ADD_TO_DEVICE notification is emitted for the
-+addresses serviced by the bridge on 'foreign' interfaces. The software
-+bridge also does the right thing on migration, by notifying that the old
-+entry is deleted, so that does not need to be special-cased in DSA. When
-+it is deleted, we just need to delete our static FDB entry towards the
-+CPU too, and wait.
-+
-+The problem is that DSA currently only cares about SWITCHDEV_FDB_ADD_TO_DEVICE
-+events received on its own interfaces, such as static FDB entries.
-+
-+Luckily we can change that, and DSA can listen to all switchdev FDB
-+add/del events in the system and figure out if those events were emitted
-+by a bridge that spans at least one of DSA's own ports. In case that is
-+true, DSA will also offload that address towards its own CPU port, in
-+the eventuality that there might be bridge clients attached to the DSA
-+switch who want to talk to the station connected to the foreign
-+interface.
-+
-+In terms of implementation, we need to keep the fdb_info->added_by_user
-+check for the case where the switchdev event was targeted directly at a
-+DSA switch port. But we don't need to look at that flag for snooped
-+events. So the check is currently too late, we need to move it earlier.
-+This also simplifies the code a bit, since we avoid uselessly allocating
-+and freeing switchdev_work.
-+
-+We could probably do some improvements in the future. For example,
-+multi-bridge support is rudimentary at the moment. If there are two
-+bridges spanning a DSA switch's ports, and both of them need to service
-+the same MAC address, then what will happen is that the migration of one
-+of those stations will trigger the deletion of the FDB entry from the
-+CPU port while it is still used by other bridge. That could be improved
-+with reference counting but is left for another time.
-+
-+This behavior needs to be enabled at driver level by setting
-+ds->assisted_learning_on_cpu_port = true. This is because we don't want
-+to inflict a potential performance penalty (accesses through
-+MDIO/I2C/SPI are expensive) to hardware that really doesn't need it
-+because address learning on the CPU port works there.
-+
-+Reported-by: DENG Qingfang <dqfext@gmail.com>
-+Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
-+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
-+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
-+---
-+ include/net/dsa.h |  5 +++++
-+ net/dsa/slave.c   | 66 +++++++++++++++++++++++++++++++++++++++++++++----------
-+ 2 files changed, 60 insertions(+), 11 deletions(-)
-+
-+--- a/include/net/dsa.h
-++++ b/include/net/dsa.h
-+@@ -317,6 +317,11 @@ struct dsa_switch {
-+ 	 */
-+ 	bool			untag_bridge_pvid;
-+ 
-++	/* Let DSA manage the FDB entries towards the CPU, based on the
-++	 * software bridge database.
-++	 */
-++	bool			assisted_learning_on_cpu_port;
-++
-+ 	/* In case vlan_filtering_is_global is set, the VLAN awareness state
-+ 	 * should be retrieved from here and not from the per-port settings.
-+ 	 */
-+--- a/net/dsa/slave.c
-++++ b/net/dsa/slave.c
-+@@ -2112,6 +2112,28 @@ static void dsa_slave_switchdev_event_wo
-+ 		dev_put(dp->slave);
-+ }
-+ 
-++static int dsa_lower_dev_walk(struct net_device *lower_dev,
-++			      struct netdev_nested_priv *priv)
-++{
-++	if (dsa_slave_dev_check(lower_dev)) {
-++		priv->data = (void *)netdev_priv(lower_dev);
-++		return 1;
-++	}
-++
-++	return 0;
-++}
-++
-++static struct dsa_slave_priv *dsa_slave_dev_lower_find(struct net_device *dev)
-++{
-++	struct netdev_nested_priv priv = {
-++		.data = NULL,
-++	};
-++
-++	netdev_walk_all_lower_dev_rcu(dev, dsa_lower_dev_walk, &priv);
-++
-++	return (struct dsa_slave_priv *)priv.data;
-++}
-++
-+ /* Called under rcu_read_lock() */
-+ static int dsa_slave_switchdev_event(struct notifier_block *unused,
-+ 				     unsigned long event, void *ptr)
-+@@ -2130,10 +2152,37 @@ static int dsa_slave_switchdev_event(str
-+ 		return notifier_from_errno(err);
-+ 	case SWITCHDEV_FDB_ADD_TO_DEVICE:
-+ 	case SWITCHDEV_FDB_DEL_TO_DEVICE:
-+-		if (!dsa_slave_dev_check(dev))
-+-			return NOTIFY_DONE;
-++		fdb_info = ptr;
-++
-++		if (dsa_slave_dev_check(dev)) {
-++			if (!fdb_info->added_by_user)
-++				return NOTIFY_OK;
-++
-++			dp = dsa_slave_to_port(dev);
-++		} else {
-++			/* Snoop addresses learnt on foreign interfaces
-++			 * bridged with us, for switches that don't
-++			 * automatically learn SA from CPU-injected traffic
-++			 */
-++			struct net_device *br_dev;
-++			struct dsa_slave_priv *p;
-++
-++			br_dev = netdev_master_upper_dev_get_rcu(dev);
-++			if (!br_dev)
-++				return NOTIFY_DONE;
-++
-++			if (!netif_is_bridge_master(br_dev))
-++				return NOTIFY_DONE;
-++
-++			p = dsa_slave_dev_lower_find(br_dev);
-++			if (!p)
-++				return NOTIFY_DONE;
-+ 
-+-		dp = dsa_slave_to_port(dev);
-++			dp = p->dp->cpu_dp;
-++
-++			if (!dp->ds->assisted_learning_on_cpu_port)
-++				return NOTIFY_DONE;
-++		}
-+ 
-+ 		if (!dp->ds->ops->port_fdb_add || !dp->ds->ops->port_fdb_del)
-+ 			return NOTIFY_DONE;
-+@@ -2148,18 +2197,13 @@ static int dsa_slave_switchdev_event(str
-+ 		switchdev_work->port = dp->index;
-+ 		switchdev_work->event = event;
-+ 
-+-		fdb_info = ptr;
-+-
-+-		if (!fdb_info->added_by_user) {
-+-			kfree(switchdev_work);
-+-			return NOTIFY_OK;
-+-		}
-+-
-+ 		ether_addr_copy(switchdev_work->addr,
-+ 				fdb_info->addr);
-+ 		switchdev_work->vid = fdb_info->vid;
-+ 
-+-		dev_hold(dev);
-++		/* Hold a reference on the slave for dsa_fdb_offload_notify */
-++		if (dsa_is_user_port(dp->ds, dp->index))
-++			dev_hold(dev);
-+ 		dsa_schedule_work(&switchdev_work->work);
-+ 		break;
-+ 	default:
-diff --git a/target/linux/generic/backport-5.10/780-net-dsa-mt7530-setup-core-clock-even-in-TRGMII-mode.patch b/target/linux/generic/backport-5.10/780-net-dsa-mt7530-setup-core-clock-even-in-TRGMII-mode.patch
-new file mode 100644
-index 0000000000..951ae9c664
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/780-net-dsa-mt7530-setup-core-clock-even-in-TRGMII-mode.patch
-@@ -0,0 +1,84 @@
-+From c3b8e07909dbe67b0d580416c1a5257643a73be7 Mon Sep 17 00:00:00 2001
-+From: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
-+Date: Fri, 12 Mar 2021 00:07:03 -0800
-+Subject: [PATCH] net: dsa: mt7530: setup core clock even in TRGMII mode
-+
-+A recent change to MIPS ralink reset logic made it so mt7530 actually
-+resets the switch on platforms such as mt7621 (where bit 2 is the reset
-+line for the switch). That exposed an issue where the switch would not
-+function properly in TRGMII mode after a reset.
-+
-+Reconfigure core clock in TRGMII mode to fix the issue.
-+
-+Tested on Ubiquiti ER-X (MT7621) with TRGMII mode enabled.
-+
-+Fixes: 3f9ef7785a9c ("MIPS: ralink: manage low reset lines")
-+Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
-+Signed-off-by: David S. Miller <davem@davemloft.net>
-+---
-+ drivers/net/dsa/mt7530.c | 52 +++++++++++++++++++---------------------
-+ 1 file changed, 25 insertions(+), 27 deletions(-)
-+
-+--- a/drivers/net/dsa/mt7530.c
-++++ b/drivers/net/dsa/mt7530.c
-+@@ -435,34 +435,32 @@ mt7530_pad_clk_setup(struct dsa_switch *
-+ 			     TD_DM_DRVP(8) | TD_DM_DRVN(8));
-+ 
-+ 	/* Setup core clock for MT7530 */
-+-	if (!trgint) {
-+-		/* Disable MT7530 core clock */
-+-		core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);
-+-
-+-		/* Disable PLL, since phy_device has not yet been created
-+-		 * provided for phy_[read,write]_mmd_indirect is called, we
-+-		 * provide our own core_write_mmd_indirect to complete this
-+-		 * function.
-+-		 */
-+-		core_write_mmd_indirect(priv,
-+-					CORE_GSWPLL_GRP1,
-+-					MDIO_MMD_VEND2,
-+-					0);
-+-
-+-		/* Set core clock into 500Mhz */
-+-		core_write(priv, CORE_GSWPLL_GRP2,
-+-			   RG_GSWPLL_POSDIV_500M(1) |
-+-			   RG_GSWPLL_FBKDIV_500M(25));
-+-
-+-		/* Enable PLL */
-+-		core_write(priv, CORE_GSWPLL_GRP1,
-+-			   RG_GSWPLL_EN_PRE |
-+-			   RG_GSWPLL_POSDIV_200M(2) |
-+-			   RG_GSWPLL_FBKDIV_200M(32));
-+-
-+-		/* Enable MT7530 core clock */
-+-		core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);
-+-	}
-++	/* Disable MT7530 core clock */
-++	core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);
-++
-++	/* Disable PLL, since phy_device has not yet been created
-++	 * provided for phy_[read,write]_mmd_indirect is called, we
-++	 * provide our own core_write_mmd_indirect to complete this
-++	 * function.
-++	 */
-++	core_write_mmd_indirect(priv,
-++				CORE_GSWPLL_GRP1,
-++				MDIO_MMD_VEND2,
-++				0);
-++
-++	/* Set core clock into 500Mhz */
-++	core_write(priv, CORE_GSWPLL_GRP2,
-++		   RG_GSWPLL_POSDIV_500M(1) |
-++		   RG_GSWPLL_FBKDIV_500M(25));
-++
-++	/* Enable PLL */
-++	core_write(priv, CORE_GSWPLL_GRP1,
-++		   RG_GSWPLL_EN_PRE |
-++		   RG_GSWPLL_POSDIV_200M(2) |
-++		   RG_GSWPLL_FBKDIV_200M(32));
-++
-++	/* Enable MT7530 core clock */
-++	core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);
-+ 
-+ 	/* Setup the MT7530 TRGMII Tx Clock */
-+ 	core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);
-diff --git a/target/linux/generic/backport-5.10/800-v5.13-0001-firmware-bcm47xx_nvram-rename-finding-function-and-i.patch b/target/linux/generic/backport-5.10/800-v5.13-0001-firmware-bcm47xx_nvram-rename-finding-function-and-i.patch
-new file mode 100644
-index 0000000000..19938704b7
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/800-v5.13-0001-firmware-bcm47xx_nvram-rename-finding-function-and-i.patch
-@@ -0,0 +1,80 @@
-+From fb009cbdd0693bd633f11e99526617b3d392cfad Mon Sep 17 00:00:00 2001
-+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-+Date: Mon, 8 Mar 2021 10:03:16 +0100
-+Subject: [PATCH] firmware: bcm47xx_nvram: rename finding function and its
-+ variables
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+1. Use "bcm47xx_" function name prefix for consistency
-+2. It takes flash start as argument so s/iobase/flash_start/
-+3. "off" was used for finding flash end so just call it "flash_size"
-+
-+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-+Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
-+---
-+ drivers/firmware/broadcom/bcm47xx_nvram.c | 24 ++++++++++++-----------
-+ 1 file changed, 13 insertions(+), 11 deletions(-)
-+
-+--- a/drivers/firmware/broadcom/bcm47xx_nvram.c
-++++ b/drivers/firmware/broadcom/bcm47xx_nvram.c
-+@@ -48,11 +48,13 @@ static u32 find_nvram_size(void __iomem
-+ 	return 0;
-+ }
-+ 
-+-/* Probe for NVRAM header */
-+-static int nvram_find_and_copy(void __iomem *iobase, u32 lim)
-++/**
-++ * bcm47xx_nvram_find_and_copy - find NVRAM on flash mapping & copy it
-++ */
-++static int bcm47xx_nvram_find_and_copy(void __iomem *flash_start, size_t res_size)
-+ {
-+ 	struct nvram_header __iomem *header;
-+-	u32 off;
-++	size_t flash_size;
-+ 	u32 size;
-+ 
-+ 	if (nvram_len) {
-+@@ -61,25 +63,25 @@ static int nvram_find_and_copy(void __io
-+ 	}
-+ 
-+ 	/* TODO: when nvram is on nand flash check for bad blocks first. */
-+-	off = FLASH_MIN;
-+-	while (off <= lim) {
-++	flash_size = FLASH_MIN;
-++	while (flash_size <= res_size) {
-+ 		/* Windowed flash access */
-+-		size = find_nvram_size(iobase + off);
-++		size = find_nvram_size(flash_start + flash_size);
-+ 		if (size) {
-+-			header = (struct nvram_header *)(iobase + off - size);
-++			header = (struct nvram_header *)(flash_start + flash_size - size);
-+ 			goto found;
-+ 		}
-+-		off <<= 1;
-++		flash_size <<= 1;
-+ 	}
-+ 
-+ 	/* Try embedded NVRAM at 4 KB and 1 KB as last resorts */
-+-	header = (struct nvram_header *)(iobase + 4096);
-++	header = (struct nvram_header *)(flash_start + 4096);
-+ 	if (header->magic == NVRAM_MAGIC) {
-+ 		size = NVRAM_SPACE;
-+ 		goto found;
-+ 	}
-+ 
-+-	header = (struct nvram_header *)(iobase + 1024);
-++	header = (struct nvram_header *)(flash_start + 1024);
-+ 	if (header->magic == NVRAM_MAGIC) {
-+ 		size = NVRAM_SPACE;
-+ 		goto found;
-+@@ -124,7 +126,7 @@ int bcm47xx_nvram_init_from_mem(u32 base
-+ 	if (!iobase)
-+ 		return -ENOMEM;
-+ 
-+-	err = nvram_find_and_copy(iobase, lim);
-++	err = bcm47xx_nvram_find_and_copy(iobase, lim);
-+ 
-+ 	iounmap(iobase);
-+ 
-diff --git a/target/linux/generic/backport-5.10/800-v5.13-0002-firmware-bcm47xx_nvram-add-helper-checking-for-NVRAM.patch b/target/linux/generic/backport-5.10/800-v5.13-0002-firmware-bcm47xx_nvram-add-helper-checking-for-NVRAM.patch
-new file mode 100644
-index 0000000000..6ab072883d
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/800-v5.13-0002-firmware-bcm47xx_nvram-add-helper-checking-for-NVRAM.patch
-@@ -0,0 +1,90 @@
-+From 0a24b51a3264a3f942a75025ea5ff6133c8989b0 Mon Sep 17 00:00:00 2001
-+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-+Date: Mon, 8 Mar 2021 10:03:17 +0100
-+Subject: [PATCH] firmware: bcm47xx_nvram: add helper checking for NVRAM
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+This avoids duplicating code doing casting and checking for NVRAM magic.
-+
-+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-+Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
-+---
-+ drivers/firmware/broadcom/bcm47xx_nvram.c | 30 ++++++++++++++---------
-+ 1 file changed, 18 insertions(+), 12 deletions(-)
-+
-+--- a/drivers/firmware/broadcom/bcm47xx_nvram.c
-++++ b/drivers/firmware/broadcom/bcm47xx_nvram.c
-+@@ -34,14 +34,20 @@ static char nvram_buf[NVRAM_SPACE];
-+ static size_t nvram_len;
-+ static const u32 nvram_sizes[] = {0x6000, 0x8000, 0xF000, 0x10000};
-+ 
-++/**
-++ * bcm47xx_nvram_is_valid - check for a valid NVRAM at specified memory
-++ */
-++static bool bcm47xx_nvram_is_valid(void __iomem *nvram)
-++{
-++	return ((struct nvram_header *)nvram)->magic == NVRAM_MAGIC;
-++}
-++
-+ static u32 find_nvram_size(void __iomem *end)
-+ {
-+-	struct nvram_header __iomem *header;
-+ 	int i;
-+ 
-+ 	for (i = 0; i < ARRAY_SIZE(nvram_sizes); i++) {
-+-		header = (struct nvram_header *)(end - nvram_sizes[i]);
-+-		if (header->magic == NVRAM_MAGIC)
-++		if (bcm47xx_nvram_is_valid(end - nvram_sizes[i]))
-+ 			return nvram_sizes[i];
-+ 	}
-+ 
-+@@ -55,6 +61,7 @@ static int bcm47xx_nvram_find_and_copy(v
-+ {
-+ 	struct nvram_header __iomem *header;
-+ 	size_t flash_size;
-++	size_t offset;
-+ 	u32 size;
-+ 
-+ 	if (nvram_len) {
-+@@ -68,31 +75,30 @@ static int bcm47xx_nvram_find_and_copy(v
-+ 		/* Windowed flash access */
-+ 		size = find_nvram_size(flash_start + flash_size);
-+ 		if (size) {
-+-			header = (struct nvram_header *)(flash_start + flash_size - size);
-++			offset = flash_size - size;
-+ 			goto found;
-+ 		}
-+ 		flash_size <<= 1;
-+ 	}
-+ 
-+ 	/* Try embedded NVRAM at 4 KB and 1 KB as last resorts */
-+-	header = (struct nvram_header *)(flash_start + 4096);
-+-	if (header->magic == NVRAM_MAGIC) {
-+-		size = NVRAM_SPACE;
-++
-++	offset = 4096;
-++	if (bcm47xx_nvram_is_valid(flash_start + offset))
-+ 		goto found;
-+-	}
-+ 
-+-	header = (struct nvram_header *)(flash_start + 1024);
-+-	if (header->magic == NVRAM_MAGIC) {
-+-		size = NVRAM_SPACE;
-++	offset = 1024;
-++	if (bcm47xx_nvram_is_valid(flash_start + offset))
-+ 		goto found;
-+-	}
-+ 
-+ 	pr_err("no nvram found\n");
-+ 	return -ENXIO;
-+ 
-+ found:
-++	header = (struct nvram_header *)(flash_start + offset);
-+ 	__ioread32_copy(nvram_buf, header, sizeof(*header) / 4);
-+ 	nvram_len = ((struct nvram_header *)(nvram_buf))->len;
-++	size = res_size - offset;
-+ 	if (nvram_len > size) {
-+ 		pr_err("The nvram size according to the header seems to be bigger than the partition on flash\n");
-+ 		nvram_len = size;
-diff --git a/target/linux/generic/backport-5.10/800-v5.13-0003-firmware-bcm47xx_nvram-extract-code-copying-NVRAM.patch b/target/linux/generic/backport-5.10/800-v5.13-0003-firmware-bcm47xx_nvram-extract-code-copying-NVRAM.patch
-new file mode 100644
-index 0000000000..a1351f1197
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/800-v5.13-0003-firmware-bcm47xx_nvram-extract-code-copying-NVRAM.patch
-@@ -0,0 +1,80 @@
-+From 298923cf999cecd2ef06df126f85a3d68da8c4d8 Mon Sep 17 00:00:00 2001
-+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-+Date: Mon, 8 Mar 2021 10:03:18 +0100
-+Subject: [PATCH] firmware: bcm47xx_nvram: extract code copying NVRAM
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+This simplifies function finding NVRAM. It doesn't directly deal with
-+NVRAM structure anymore and is a bit smaller.
-+
-+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-+Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
-+---
-+ drivers/firmware/broadcom/bcm47xx_nvram.c | 43 +++++++++++++----------
-+ 1 file changed, 25 insertions(+), 18 deletions(-)
-+
-+--- a/drivers/firmware/broadcom/bcm47xx_nvram.c
-++++ b/drivers/firmware/broadcom/bcm47xx_nvram.c
-+@@ -55,11 +55,34 @@ static u32 find_nvram_size(void __iomem
-+ }
-+ 
-+ /**
-++ * bcm47xx_nvram_copy - copy NVRAM to internal buffer
-++ */
-++static void bcm47xx_nvram_copy(void __iomem *nvram_start, size_t res_size)
-++{
-++	struct nvram_header __iomem *header = nvram_start;
-++	size_t copy_size;
-++
-++	copy_size = header->len;
-++	if (copy_size > res_size) {
-++		pr_err("The nvram size according to the header seems to be bigger than the partition on flash\n");
-++		copy_size = res_size;
-++	}
-++	if (copy_size >= NVRAM_SPACE) {
-++		pr_err("nvram on flash (%zu bytes) is bigger than the reserved space in memory, will just copy the first %i bytes\n",
-++		       copy_size, NVRAM_SPACE - 1);
-++		copy_size = NVRAM_SPACE - 1;
-++	}
-++
-++	__ioread32_copy(nvram_buf, nvram_start, DIV_ROUND_UP(copy_size, 4));
-++	nvram_buf[NVRAM_SPACE - 1] = '\0';
-++	nvram_len = copy_size;
-++}
-++
-++/**
-+  * bcm47xx_nvram_find_and_copy - find NVRAM on flash mapping & copy it
-+  */
-+ static int bcm47xx_nvram_find_and_copy(void __iomem *flash_start, size_t res_size)
-+ {
-+-	struct nvram_header __iomem *header;
-+ 	size_t flash_size;
-+ 	size_t offset;
-+ 	u32 size;
-+@@ -95,23 +118,7 @@ static int bcm47xx_nvram_find_and_copy(v
-+ 	return -ENXIO;
-+ 
-+ found:
-+-	header = (struct nvram_header *)(flash_start + offset);
-+-	__ioread32_copy(nvram_buf, header, sizeof(*header) / 4);
-+-	nvram_len = ((struct nvram_header *)(nvram_buf))->len;
-+-	size = res_size - offset;
-+-	if (nvram_len > size) {
-+-		pr_err("The nvram size according to the header seems to be bigger than the partition on flash\n");
-+-		nvram_len = size;
-+-	}
-+-	if (nvram_len >= NVRAM_SPACE) {
-+-		pr_err("nvram on flash (%zu bytes) is bigger than the reserved space in memory, will just copy the first %i bytes\n",
-+-		       nvram_len, NVRAM_SPACE - 1);
-+-		nvram_len = NVRAM_SPACE - 1;
-+-	}
-+-	/* proceed reading data after header */
-+-	__ioread32_copy(nvram_buf + sizeof(*header), header + 1,
-+-			DIV_ROUND_UP(nvram_len, 4));
-+-	nvram_buf[NVRAM_SPACE - 1] = '\0';
-++	bcm47xx_nvram_copy(flash_start + offset, res_size - offset);
-+ 
-+ 	return 0;
-+ }
-diff --git a/target/linux/generic/backport-5.10/800-v5.13-0004-firmware-bcm47xx_nvram-look-for-NVRAM-with-for-inste.patch b/target/linux/generic/backport-5.10/800-v5.13-0004-firmware-bcm47xx_nvram-look-for-NVRAM-with-for-inste.patch
-new file mode 100644
-index 0000000000..059a13220b
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/800-v5.13-0004-firmware-bcm47xx_nvram-look-for-NVRAM-with-for-inste.patch
-@@ -0,0 +1,37 @@
-+From 98b68324f67236e8c9152976535dc1f27fb67ba8 Mon Sep 17 00:00:00 2001
-+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-+Date: Mon, 8 Mar 2021 10:03:19 +0100
-+Subject: [PATCH] firmware: bcm47xx_nvram: look for NVRAM with for instead of
-+ while
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+This loop requires variable initialization, stop condition and post
-+iteration increment. It's pretty much a for loop definition.
-+
-+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-+Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
-+---
-+ drivers/firmware/broadcom/bcm47xx_nvram.c | 4 +---
-+ 1 file changed, 1 insertion(+), 3 deletions(-)
-+
-+--- a/drivers/firmware/broadcom/bcm47xx_nvram.c
-++++ b/drivers/firmware/broadcom/bcm47xx_nvram.c
-+@@ -93,15 +93,13 @@ static int bcm47xx_nvram_find_and_copy(v
-+ 	}
-+ 
-+ 	/* TODO: when nvram is on nand flash check for bad blocks first. */
-+-	flash_size = FLASH_MIN;
-+-	while (flash_size <= res_size) {
-++	for (flash_size = FLASH_MIN; flash_size <= res_size; flash_size <<= 1) {
-+ 		/* Windowed flash access */
-+ 		size = find_nvram_size(flash_start + flash_size);
-+ 		if (size) {
-+ 			offset = flash_size - size;
-+ 			goto found;
-+ 		}
-+-		flash_size <<= 1;
-+ 	}
-+ 
-+ 	/* Try embedded NVRAM at 4 KB and 1 KB as last resorts */
-diff --git a/target/linux/generic/backport-5.10/800-v5.13-0005-firmware-bcm47xx_nvram-inline-code-checking-NVRAM-si.patch b/target/linux/generic/backport-5.10/800-v5.13-0005-firmware-bcm47xx_nvram-inline-code-checking-NVRAM-si.patch
-new file mode 100644
-index 0000000000..21d250049e
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/800-v5.13-0005-firmware-bcm47xx_nvram-inline-code-checking-NVRAM-si.patch
-@@ -0,0 +1,70 @@
-+From f52da4ccfec9192e17f5c16260dfdd6d3ea76f65 Mon Sep 17 00:00:00 2001
-+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-+Date: Mon, 8 Mar 2021 10:03:20 +0100
-+Subject: [PATCH] firmware: bcm47xx_nvram: inline code checking NVRAM size
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+Separated function was not improving code quality much (or at all).
-+Moreover it expected possible flash end address as argument and it was
-+returning NVRAM size.
-+
-+The new code always operates on offsets which means less logic and less
-+calculations.
-+
-+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-+Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
-+---
-+ drivers/firmware/broadcom/bcm47xx_nvram.c | 25 +++++++----------------
-+ 1 file changed, 7 insertions(+), 18 deletions(-)
-+
-+--- a/drivers/firmware/broadcom/bcm47xx_nvram.c
-++++ b/drivers/firmware/broadcom/bcm47xx_nvram.c
-+@@ -42,18 +42,6 @@ static bool bcm47xx_nvram_is_valid(void
-+ 	return ((struct nvram_header *)nvram)->magic == NVRAM_MAGIC;
-+ }
-+ 
-+-static u32 find_nvram_size(void __iomem *end)
-+-{
-+-	int i;
-+-
-+-	for (i = 0; i < ARRAY_SIZE(nvram_sizes); i++) {
-+-		if (bcm47xx_nvram_is_valid(end - nvram_sizes[i]))
-+-			return nvram_sizes[i];
-+-	}
-+-
-+-	return 0;
-+-}
-+-
-+ /**
-+  * bcm47xx_nvram_copy - copy NVRAM to internal buffer
-+  */
-+@@ -85,7 +73,7 @@ static int bcm47xx_nvram_find_and_copy(v
-+ {
-+ 	size_t flash_size;
-+ 	size_t offset;
-+-	u32 size;
-++	int i;
-+ 
-+ 	if (nvram_len) {
-+ 		pr_warn("nvram already initialized\n");
-+@@ -93,12 +81,13 @@ static int bcm47xx_nvram_find_and_copy(v
-+ 	}
-+ 
-+ 	/* TODO: when nvram is on nand flash check for bad blocks first. */
-++
-++	/* Try every possible flash size and check for NVRAM at its end */
-+ 	for (flash_size = FLASH_MIN; flash_size <= res_size; flash_size <<= 1) {
-+-		/* Windowed flash access */
-+-		size = find_nvram_size(flash_start + flash_size);
-+-		if (size) {
-+-			offset = flash_size - size;
-+-			goto found;
-++		for (i = 0; i < ARRAY_SIZE(nvram_sizes); i++) {
-++			offset = flash_size - nvram_sizes[i];
-++			if (bcm47xx_nvram_is_valid(flash_start + offset))
-++				goto found;
-+ 		}
-+ 	}
-+ 
-diff --git a/target/linux/generic/backport-5.10/810-v5.13-usb-ehci-add-spurious-flag-to-disable-overcurrent-ch.patch b/target/linux/generic/backport-5.10/810-v5.13-usb-ehci-add-spurious-flag-to-disable-overcurrent-ch.patch
-new file mode 100644
-index 0000000000..8f2021a0fc
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/810-v5.13-usb-ehci-add-spurious-flag-to-disable-overcurrent-ch.patch
-@@ -0,0 +1,88 @@
-+From 2d5ba37461013253d2ff0a3641b727fd32ea97a9 Mon Sep 17 00:00:00 2001
-+From: Florian Fainelli <florian@openwrt.org>
-+Date: Tue, 23 Feb 2021 18:44:53 +0100
-+Subject: [PATCH 1/3] usb: ehci: add spurious flag to disable overcurrent
-+ checking
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+This patch adds an ignore_oc flag which can be set by EHCI controller
-+not supporting or wanting to disable overcurrent checking. The EHCI
-+platform data in include/linux/usb/ehci_pdriver.h is also augmented to
-+take advantage of this new flag.
-+
-+Signed-off-by: Florian Fainelli <florian@openwrt.org>
-+Signed-off-by: �lvaro Fernández Rojas <noltari@gmail.com>
-+Link: https://lore.kernel.org/r/20210223174455.1378-2-noltari@gmail.com
-+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-+---
-+ drivers/usb/host/ehci-hcd.c      | 2 +-
-+ drivers/usb/host/ehci-hub.c      | 4 ++--
-+ drivers/usb/host/ehci-platform.c | 2 ++
-+ drivers/usb/host/ehci.h          | 1 +
-+ include/linux/usb/ehci_pdriver.h | 1 +
-+ 5 files changed, 7 insertions(+), 3 deletions(-)
-+
-+--- a/drivers/usb/host/ehci-hcd.c
-++++ b/drivers/usb/host/ehci-hcd.c
-+@@ -651,7 +651,7 @@ static int ehci_run (struct usb_hcd *hcd
-+ 		"USB %x.%x started, EHCI %x.%02x%s\n",
-+ 		((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
-+ 		temp >> 8, temp & 0xff,
-+-		ignore_oc ? ", overcurrent ignored" : "");
-++		(ignore_oc || ehci->spurious_oc) ? ", overcurrent ignored" : "");
-+ 
-+ 	ehci_writel(ehci, INTR_MASK,
-+ 		    &ehci->regs->intr_enable); /* Turn On Interrupts */
-+--- a/drivers/usb/host/ehci-hub.c
-++++ b/drivers/usb/host/ehci-hub.c
-+@@ -643,7 +643,7 @@ ehci_hub_status_data (struct usb_hcd *hc
-+ 	 * always set, seem to clear PORT_OCC and PORT_CSC when writing to
-+ 	 * PORT_POWER; that's surprising, but maybe within-spec.
-+ 	 */
-+-	if (!ignore_oc)
-++	if (!ignore_oc && !ehci->spurious_oc)
-+ 		mask = PORT_CSC | PORT_PEC | PORT_OCC;
-+ 	else
-+ 		mask = PORT_CSC | PORT_PEC;
-+@@ -1013,7 +1013,7 @@ int ehci_hub_control(
-+ 		if (temp & PORT_PEC)
-+ 			status |= USB_PORT_STAT_C_ENABLE << 16;
-+ 
-+-		if ((temp & PORT_OCC) && !ignore_oc){
-++		if ((temp & PORT_OCC) && (!ignore_oc && !ehci->spurious_oc)){
-+ 			status |= USB_PORT_STAT_C_OVERCURRENT << 16;
-+ 
-+ 			/*
-+--- a/drivers/usb/host/ehci-platform.c
-++++ b/drivers/usb/host/ehci-platform.c
-+@@ -327,6 +327,8 @@ static int ehci_platform_probe(struct pl
-+ 		hcd->has_tt = 1;
-+ 	if (pdata->reset_on_resume)
-+ 		priv->reset_on_resume = true;
-++	if (pdata->spurious_oc)
-++		ehci->spurious_oc = 1;
-+ 
-+ #ifndef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
-+ 	if (ehci->big_endian_mmio) {
-+--- a/drivers/usb/host/ehci.h
-++++ b/drivers/usb/host/ehci.h
-+@@ -218,6 +218,7 @@ struct ehci_hcd {			/* one per controlle
-+ 	unsigned		frame_index_bug:1; /* MosChip (AKA NetMos) */
-+ 	unsigned		need_oc_pp_cycle:1; /* MPC834X port power */
-+ 	unsigned		imx28_write_fix:1; /* For Freescale i.MX28 */
-++	unsigned		spurious_oc:1;
-+ 
-+ 	/* required for usb32 quirk */
-+ 	#define OHCI_CTRL_HCFS          (3 << 6)
-+--- a/include/linux/usb/ehci_pdriver.h
-++++ b/include/linux/usb/ehci_pdriver.h
-+@@ -50,6 +50,7 @@ struct usb_ehci_pdata {
-+ 	unsigned	no_io_watchdog:1;
-+ 	unsigned	reset_on_resume:1;
-+ 	unsigned	dma_mask_64:1;
-++	unsigned	spurious_oc:1;
-+ 
-+ 	/* Turn on all power and clocks */
-+ 	int (*power_on)(struct platform_device *pdev);
-diff --git a/target/linux/generic/backport-5.10/811-v5.13-usb-host-ehci-platform-add-spurious_oc-DT-support.patch b/target/linux/generic/backport-5.10/811-v5.13-usb-host-ehci-platform-add-spurious_oc-DT-support.patch
-new file mode 100644
-index 0000000000..0094d47718
---- /dev/null
-+++ b/target/linux/generic/backport-5.10/811-v5.13-usb-host-ehci-platform-add-spurious_oc-DT-support.patch
-@@ -0,0 +1,31 @@
-+From 4da57dbbffdfa7fe4e2b70b047fc5ff95ff25a3d Mon Sep 17 00:00:00 2001
-+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
-+Date: Tue, 23 Feb 2021 18:44:55 +0100
-+Subject: [PATCH 3/3] usb: host: ehci-platform: add spurious_oc DT support
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+Over-current reporting isn't supported on some platforms such as bcm63xx.
-+These devices will incorrectly report over-current if this flag isn't properly
-+activated.
-+
-+Signed-off-by: �lvaro Fernández Rojas <noltari@gmail.com>
-+Link: https://lore.kernel.org/r/20210223174455.1378-4-noltari@gmail.com
-+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-+---
-+ drivers/usb/host/ehci-platform.c | 3 +++
-+ 1 file changed, 3 insertions(+)
-+
-+--- a/drivers/usb/host/ehci-platform.c
-++++ b/drivers/usb/host/ehci-platform.c
-+@@ -286,6 +286,9 @@ static int ehci_platform_probe(struct pl
-+ 		if (of_property_read_bool(dev->dev.of_node, "big-endian"))
-+ 			ehci->big_endian_mmio = ehci->big_endian_desc = 1;
-+ 
-++		if (of_property_read_bool(dev->dev.of_node, "spurious-oc"))
-++			ehci->spurious_oc = 1;
-++
-+ 		if (of_property_read_bool(dev->dev.of_node,
-+ 					  "needs-reset-on-resume"))
-+ 			priv->reset_on_resume = true;
-diff --git a/target/linux/generic/config-5.10 b/target/linux/generic/config-5.10
-new file mode 100644
-index 0000000000..4eb5607f17
---- /dev/null
-+++ b/target/linux/generic/config-5.10
-@@ -0,0 +1,7062 @@
-+# CONFIG_104_QUAD_8 is not set
-+CONFIG_32BIT=y
-+CONFIG_64BIT_TIME=y
-+# CONFIG_6LOWPAN is not set
-+# CONFIG_6LOWPAN_DEBUGFS is not set
-+# CONFIG_6PACK is not set
-+# CONFIG_8139CP is not set
-+# CONFIG_8139TOO is not set
-+# CONFIG_9P_FS is not set
-+# CONFIG_AB3100_CORE is not set
-+# CONFIG_AB8500_CORE is not set
-+# CONFIG_ABP060MG is not set
-+# CONFIG_ABX500_CORE is not set
-+# CONFIG_ACCESSIBILITY is not set
-+# CONFIG_ACENIC is not set
-+# CONFIG_ACERHDF is not set
-+# CONFIG_ACER_WIRELESS is not set
-+# CONFIG_ACORN_PARTITION is not set
-+# CONFIG_ACPI_ALS is not set
-+# CONFIG_ACPI_APEI is not set
-+# CONFIG_ACPI_BUTTON is not set
-+# CONFIG_ACPI_CONFIGFS is not set
-+# CONFIG_ACPI_CUSTOM_METHOD is not set
-+# CONFIG_ACPI_EXTLOG is not set
-+# CONFIG_ACPI_HED is not set
-+# CONFIG_ACPI_NFIT is not set
-+# CONFIG_ACPI_REDUCED_HARDWARE_ONLY is not set
-+# CONFIG_ACPI_TABLE_UPGRADE is not set
-+# CONFIG_ACPI_VIDEO is not set
-+# CONFIG_AD2S1200 is not set
-+# CONFIG_AD2S1210 is not set
-+# CONFIG_AD2S90 is not set
-+# CONFIG_AD5064 is not set
-+# CONFIG_AD525X_DPOT is not set
-+# CONFIG_AD5272 is not set
-+# CONFIG_AD5360 is not set
-+# CONFIG_AD5380 is not set
-+# CONFIG_AD5421 is not set
-+# CONFIG_AD5446 is not set
-+# CONFIG_AD5449 is not set
-+# CONFIG_AD5504 is not set
-+# CONFIG_AD5592R is not set
-+# CONFIG_AD5593R is not set
-+# CONFIG_AD5624R_SPI is not set
-+# CONFIG_AD5686 is not set
-+# CONFIG_AD5686_SPI is not set
-+# CONFIG_AD5696_I2C is not set
-+# CONFIG_AD5755 is not set
-+# CONFIG_AD5758 is not set
-+# CONFIG_AD5761 is not set
-+# CONFIG_AD5764 is not set
-+# CONFIG_AD5770R is not set
-+# CONFIG_AD5791 is not set
-+# CONFIG_AD5933 is not set
-+# CONFIG_AD7091R5 is not set
-+# CONFIG_AD7124 is not set
-+# CONFIG_AD7150 is not set
-+# CONFIG_AD7152 is not set
-+# CONFIG_AD7192 is not set
-+# CONFIG_AD7266 is not set
-+# CONFIG_AD7280 is not set
-+# CONFIG_AD7291 is not set
-+# CONFIG_AD7292 is not set
-+# CONFIG_AD7298 is not set
-+# CONFIG_AD7303 is not set
-+# CONFIG_AD7476 is not set
-+# CONFIG_AD7606 is not set
-+# CONFIG_AD7606_IFACE_PARALLEL is not set
-+# CONFIG_AD7606_IFACE_SPI is not set
-+# CONFIG_AD7746 is not set
-+# CONFIG_AD7766 is not set
-+# CONFIG_AD7768_1 is not set
-+# CONFIG_AD7780 is not set
-+# CONFIG_AD7791 is not set
-+# CONFIG_AD7793 is not set
-+# CONFIG_AD7816 is not set
-+# CONFIG_AD7887 is not set
-+# CONFIG_AD7923 is not set
-+# CONFIG_AD7949 is not set
-+# CONFIG_AD799X is not set
-+# CONFIG_AD8366 is not set
-+# CONFIG_AD8801 is not set
-+# CONFIG_AD9467 is not set
-+# CONFIG_AD9523 is not set
-+# CONFIG_AD9832 is not set
-+# CONFIG_AD9834 is not set
-+# CONFIG_ADAPTEC_STARFIRE is not set
-+# CONFIG_ADE7854 is not set
-+# CONFIG_ADF4350 is not set
-+# CONFIG_ADF4371 is not set
-+# CONFIG_ADFS_FS is not set
-+# CONFIG_ADIN_PHY is not set
-+# CONFIG_ADIS16080 is not set
-+# CONFIG_ADIS16130 is not set
-+# CONFIG_ADIS16136 is not set
-+# CONFIG_ADIS16201 is not set
-+# CONFIG_ADIS16203 is not set
-+# CONFIG_ADIS16209 is not set
-+# CONFIG_ADIS16240 is not set
-+# CONFIG_ADIS16260 is not set
-+# CONFIG_ADIS16400 is not set
-+# CONFIG_ADIS16460 is not set
-+# CONFIG_ADIS16475 is not set
-+# CONFIG_ADIS16480 is not set
-+# CONFIG_ADI_AXI_ADC is not set
-+# CONFIG_ADJD_S311 is not set
-+# CONFIG_ADM6996_PHY is not set
-+# CONFIG_ADM8211 is not set
-+# CONFIG_ADT7316 is not set
-+# CONFIG_ADUX1020 is not set
-+CONFIG_ADVISE_SYSCALLS=y
-+# CONFIG_ADXL345_I2C is not set
-+# CONFIG_ADXL345_SPI is not set
-+# CONFIG_ADXL372_I2C is not set
-+# CONFIG_ADXL372_SPI is not set
-+# CONFIG_ADXRS290 is not set
-+# CONFIG_ADXRS450 is not set
-+CONFIG_AEABI=y
-+# CONFIG_AFE4403 is not set
-+# CONFIG_AFE4404 is not set
-+# CONFIG_AFFS_FS is not set
-+# CONFIG_AFS_DEBUG_CURSOR is not set
-+# CONFIG_AFS_FS is not set
-+# CONFIG_AF_KCM is not set
-+# CONFIG_AF_RXRPC is not set
-+# CONFIG_AF_RXRPC_INJECT_LOSS is not set
-+# CONFIG_AF_RXRPC_IPV6 is not set
-+# CONFIG_AGP is not set
-+# CONFIG_AHCI_CEVA is not set
-+# CONFIG_AHCI_IMX is not set
-+# CONFIG_AHCI_MVEBU is not set
-+# CONFIG_AHCI_QORIQ is not set
-+CONFIG_AIO=y
-+# CONFIG_AIRO is not set
-+# CONFIG_AIRO_CS is not set
-+# CONFIG_AIX_PARTITION is not set
-+# CONFIG_AK09911 is not set
-+# CONFIG_AK8974 is not set
-+# CONFIG_AK8975 is not set
-+# CONFIG_AL3010 is not set
-+# CONFIG_AL3320A is not set
-+# CONFIG_ALIM7101_WDT is not set
-+CONFIG_ALLOW_DEV_COREDUMP=y
-+# CONFIG_ALTERA_MBOX is not set
-+# CONFIG_ALTERA_MSGDMA is not set
-+# CONFIG_ALTERA_STAPL is not set
-+# CONFIG_ALTERA_TSE is not set
-+# CONFIG_ALX is not set
-+# CONFIG_AL_FIC is not set
-+# CONFIG_AM2315 is not set
-+# CONFIG_AM335X_PHY_USB is not set
-+# CONFIG_AMBA_PL08X is not set
-+# CONFIG_AMD8111_ETH is not set
-+# CONFIG_AMD_MEM_ENCRYPT is not set
-+# CONFIG_AMD_PHY is not set
-+# CONFIG_AMD_XGBE is not set
-+# CONFIG_AMD_XGBE_HAVE_ECC is not set
-+# CONFIG_AMIGA_PARTITION is not set
-+# CONFIG_AMILO_RFKILL is not set
-+# CONFIG_ANDROID is not set
-+CONFIG_ANON_INODES=y
-+# CONFIG_APDS9300 is not set
-+# CONFIG_APDS9802ALS is not set
-+# CONFIG_APDS9960 is not set
-+# CONFIG_APM8018X is not set
-+# CONFIG_APM_EMULATION is not set
-+# CONFIG_APPLE_GMUX is not set
-+# CONFIG_APPLE_MFI_FASTCHARGE is not set
-+# CONFIG_APPLE_PROPERTIES is not set
-+# CONFIG_APPLICOM is not set
-+# CONFIG_AQTION is not set
-+# CONFIG_AQUANTIA_PHY is not set
-+# CONFIG_AR5523 is not set
-+# CONFIG_AR7 is not set
-+# CONFIG_AR8216_PHY is not set
-+# CONFIG_AR8216_PHY_LEDS is not set
-+# CONFIG_ARCH_ACTIONS is not set
-+# CONFIG_ARCH_AGILEX is not set
-+# CONFIG_ARCH_ALPINE is not set
-+# CONFIG_ARCH_ARTPEC is not set
-+# CONFIG_ARCH_ASPEED is not set
-+# CONFIG_ARCH_AT91 is not set
-+# CONFIG_ARCH_AXXIA is not set
-+# CONFIG_ARCH_BCM is not set
-+# CONFIG_ARCH_BCM2835 is not set
-+# CONFIG_ARCH_BCM_21664 is not set
-+# CONFIG_ARCH_BCM_23550 is not set
-+# CONFIG_ARCH_BCM_281XX is not set
-+# CONFIG_ARCH_BCM_5301X is not set
-+# CONFIG_ARCH_BCM_53573 is not set
-+# CONFIG_ARCH_BCM_63XX is not set
-+# CONFIG_ARCH_BCM_CYGNUS is not set
-+# CONFIG_ARCH_BCM_IPROC is not set
-+# CONFIG_ARCH_BCM_NSP is not set
-+# CONFIG_ARCH_BERLIN is not set
-+CONFIG_ARCH_BINFMT_ELF_STATE=y
-+# CONFIG_ARCH_BITMAIN is not set
-+# CONFIG_ARCH_BRCMSTB is not set
-+# CONFIG_ARCH_CLPS711X is not set
-+# CONFIG_ARCH_CNS3XXX is not set
-+# CONFIG_ARCH_DAVINCI is not set
-+# CONFIG_ARCH_DIGICOLOR is not set
-+# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set
-+# CONFIG_ARCH_DOVE is not set
-+# CONFIG_ARCH_EBSA110 is not set
-+# CONFIG_ARCH_EP93XX is not set
-+# CONFIG_ARCH_EXYNOS is not set
-+CONFIG_ARCH_FLATMEM_ENABLE=y
-+# CONFIG_ARCH_FOOTBRIDGE is not set
-+# CONFIG_ARCH_GEMINI is not set
-+# CONFIG_ARCH_HI3xxx is not set
-+# CONFIG_ARCH_HIGHBANK is not set
-+# CONFIG_ARCH_HISI is not set
-+# CONFIG_ARCH_INTEGRATOR is not set
-+# CONFIG_ARCH_IOP13XX is not set
-+# CONFIG_ARCH_IOP32X is not set
-+# CONFIG_ARCH_IOP33X is not set
-+# CONFIG_ARCH_IXP4XX is not set
-+# CONFIG_ARCH_K3 is not set
-+# CONFIG_ARCH_KEEMBAY is not set
-+# CONFIG_ARCH_KEYSTONE is not set
-+# CONFIG_ARCH_KS8695 is not set
-+# CONFIG_ARCH_LAYERSCAPE is not set
-+# CONFIG_ARCH_LG1K is not set
-+# CONFIG_ARCH_LPC32XX is not set
-+# CONFIG_ARCH_MEDIATEK is not set
-+# CONFIG_ARCH_MESON is not set
-+# CONFIG_ARCH_MILBEAUT is not set
-+CONFIG_ARCH_MMAP_RND_BITS=8
-+CONFIG_ARCH_MMAP_RND_BITS_MAX=16
-+CONFIG_ARCH_MMAP_RND_BITS_MIN=8
-+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
-+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8
-+# CONFIG_ARCH_MMP is not set
-+# CONFIG_ARCH_MSTARV7 is not set
-+# CONFIG_ARCH_MULTIPLATFORM is not set
-+# CONFIG_ARCH_MULTI_V6 is not set
-+# CONFIG_ARCH_MULTI_V7 is not set
-+# CONFIG_ARCH_MV78XX0 is not set
-+# CONFIG_ARCH_MVEBU is not set
-+# CONFIG_ARCH_MXC is not set
-+# CONFIG_ARCH_MXS is not set
-+# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
-+# CONFIG_ARCH_NETX is not set
-+# CONFIG_ARCH_NOMADIK is not set
-+# CONFIG_ARCH_NPCM is not set
-+# CONFIG_ARCH_NSPIRE is not set
-+# CONFIG_ARCH_OMAP is not set
-+# CONFIG_ARCH_OMAP1 is not set
-+# CONFIG_ARCH_OMAP2 is not set
-+# CONFIG_ARCH_OMAP2PLUS is not set
-+# CONFIG_ARCH_OMAP3 is not set
-+# CONFIG_ARCH_OMAP4 is not set
-+# CONFIG_ARCH_ORION5X is not set
-+# CONFIG_ARCH_OXNAS is not set
-+# CONFIG_ARCH_PICOXCELL is not set
-+# CONFIG_ARCH_PRIMA2 is not set
-+# CONFIG_ARCH_PXA is not set
-+# CONFIG_ARCH_QCOM is not set
-+# CONFIG_ARCH_RANDOM is not set
-+# CONFIG_ARCH_RDA is not set
-+# CONFIG_ARCH_REALTEK is not set
-+# CONFIG_ARCH_REALVIEW is not set
-+# CONFIG_ARCH_RENESAS is not set
-+# CONFIG_ARCH_ROCKCHIP is not set
-+# CONFIG_ARCH_RPC is not set
-+# CONFIG_ARCH_S32 is not set
-+# CONFIG_ARCH_S3C24XX is not set
-+# CONFIG_ARCH_S3C64XX is not set
-+# CONFIG_ARCH_S5PV210 is not set
-+# CONFIG_ARCH_SA1100 is not set
-+# CONFIG_ARCH_SEATTLE is not set
-+# CONFIG_ARCH_SHMOBILE is not set
-+# CONFIG_ARCH_SIRF is not set
-+# CONFIG_ARCH_SOCFPGA is not set
-+# CONFIG_ARCH_SPARX5 is not set
-+# CONFIG_ARCH_SPRD is not set
-+# CONFIG_ARCH_STI is not set
-+# CONFIG_ARCH_STM32 is not set
-+# CONFIG_ARCH_STRATIX10 is not set
-+# CONFIG_ARCH_SUNXI is not set
-+# CONFIG_ARCH_SYNQUACER is not set
-+# CONFIG_ARCH_TANGO is not set
-+# CONFIG_ARCH_TEGRA is not set
-+# CONFIG_ARCH_THUNDER is not set
-+# CONFIG_ARCH_THUNDER2 is not set
-+# CONFIG_ARCH_U300 is not set
-+# CONFIG_ARCH_U8500 is not set
-+# CONFIG_ARCH_UNIPHIER is not set
-+# CONFIG_ARCH_VERSATILE is not set
-+# CONFIG_ARCH_VEXPRESS is not set
-+# CONFIG_ARCH_VIRT is not set
-+# CONFIG_ARCH_VISCONTI is not set
-+# CONFIG_ARCH_VT8500 is not set
-+# CONFIG_ARCH_VULCAN is not set
-+# CONFIG_ARCH_W90X900 is not set
-+# CONFIG_ARCH_WANTS_THP_SWAP is not set
-+# CONFIG_ARCH_WM8505 is not set
-+# CONFIG_ARCH_WM8750 is not set
-+# CONFIG_ARCH_WM8850 is not set
-+# CONFIG_ARCH_XGENE is not set
-+# CONFIG_ARCH_ZX is not set
-+# CONFIG_ARCH_ZYNQ is not set
-+# CONFIG_ARCH_ZYNQMP is not set
-+# CONFIG_ARCNET is not set
-+# CONFIG_ARC_EMAC is not set
-+# CONFIG_ARC_IRQ_NO_AUTOSAVE is not set
-+# CONFIG_ARM64_16K_PAGES is not set
-+# CONFIG_ARM64_64K_PAGES is not set
-+# CONFIG_ARM64_AMU_EXTN is not set
-+# CONFIG_ARM64_BTI is not set
-+# CONFIG_ARM64_CRYPTO is not set
-+# CONFIG_ARM64_E0PD is not set
-+# CONFIG_ARM64_ERRATUM_1024718 is not set
-+# CONFIG_ARM64_ERRATUM_1319367 is not set
-+# CONFIG_ARM64_ERRATUM_1463225 is not set
-+# CONFIG_ARM64_ERRATUM_1508412 is not set
-+# CONFIG_ARM64_ERRATUM_1530923 is not set
-+# CONFIG_ARM64_ERRATUM_1542419 is not set
-+# CONFIG_ARM64_ERRATUM_819472 is not set
-+# CONFIG_ARM64_ERRATUM_824069 is not set
-+# CONFIG_ARM64_ERRATUM_826319 is not set
-+# CONFIG_ARM64_ERRATUM_827319 is not set
-+# CONFIG_ARM64_ERRATUM_832075 is not set
-+# CONFIG_ARM64_ERRATUM_834220 is not set
-+# CONFIG_ARM64_ERRATUM_843419 is not set
-+# CONFIG_ARM64_ERRATUM_845719 is not set
-+# CONFIG_ARM64_ERRATUM_858921 is not set
-+# CONFIG_ARM64_HW_AFDBM is not set
-+# CONFIG_ARM64_LSE_ATOMICS is not set
-+# CONFIG_ARM64_MODULE_PLTS is not set
-+# CONFIG_ARM64_MTE is not set
-+# CONFIG_ARM64_PAN is not set
-+# CONFIG_ARM64_PMEM is not set
-+# CONFIG_ARM64_PSEUDO_NMI is not set
-+# CONFIG_ARM64_PTDUMP_DEBUGFS is not set
-+# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
-+# CONFIG_ARM64_RAS_EXTN is not set
-+# CONFIG_ARM64_RELOC_TEST is not set
-+CONFIG_ARM64_SW_TTBR0_PAN=y
-+# CONFIG_ARM64_TLB_RANGE is not set
-+# CONFIG_ARM64_UAO is not set
-+# CONFIG_ARM64_USE_LSE_ATOMICS is not set
-+# CONFIG_ARM64_VA_BITS_48 is not set
-+# CONFIG_ARM64_VHE is not set
-+# CONFIG_ARM_APPENDED_DTB is not set
-+# CONFIG_ARM_ARCH_TIMER is not set
-+# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
-+# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set
-+# CONFIG_ARM_CCI is not set
-+# CONFIG_ARM_CCI400_PMU is not set
-+# CONFIG_ARM_CCI5xx_PMU is not set
-+# CONFIG_ARM_CCI_PMU is not set
-+# CONFIG_ARM_CCN is not set
-+# CONFIG_ARM_CMN is not set
-+# CONFIG_ARM_CPUIDLE is not set
-+CONFIG_ARM_CPU_TOPOLOGY=y
-+# CONFIG_ARM_CRYPTO is not set
-+CONFIG_ARM_DMA_MEM_BUFFERABLE=y
-+# CONFIG_ARM_DSU_PMU is not set
-+# CONFIG_ARM_ERRATA_326103 is not set
-+# CONFIG_ARM_ERRATA_364296 is not set
-+# CONFIG_ARM_ERRATA_411920 is not set
-+# CONFIG_ARM_ERRATA_430973 is not set
-+# CONFIG_ARM_ERRATA_458693 is not set
-+# CONFIG_ARM_ERRATA_460075 is not set
-+# CONFIG_ARM_ERRATA_643719 is not set
-+# CONFIG_ARM_ERRATA_720789 is not set
-+# CONFIG_ARM_ERRATA_742230 is not set
-+# CONFIG_ARM_ERRATA_742231 is not set
-+# CONFIG_ARM_ERRATA_743622 is not set
-+# CONFIG_ARM_ERRATA_751472 is not set
-+# CONFIG_ARM_ERRATA_754322 is not set
-+# CONFIG_ARM_ERRATA_754327 is not set
-+# CONFIG_ARM_ERRATA_764369 is not set
-+# CONFIG_ARM_ERRATA_773022 is not set
-+# CONFIG_ARM_ERRATA_775420 is not set
-+# CONFIG_ARM_ERRATA_798181 is not set
-+# CONFIG_ARM_ERRATA_814220 is not set
-+# CONFIG_ARM_ERRATA_818325_852422 is not set
-+# CONFIG_ARM_ERRATA_821420 is not set
-+# CONFIG_ARM_ERRATA_825619 is not set
-+# CONFIG_ARM_ERRATA_852421 is not set
-+# CONFIG_ARM_ERRATA_852423 is not set
-+# CONFIG_ARM_ERRATA_857271 is not set
-+# CONFIG_ARM_ERRATA_857272 is not set
-+CONFIG_ARM_GIC_MAX_NR=1
-+# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set
-+# CONFIG_ARM_KPROBES_TEST is not set
-+# CONFIG_ARM_LPAE is not set
-+# CONFIG_ARM_MHU is not set
-+# CONFIG_ARM_MODULE_PLTS is not set
-+# CONFIG_ARM_PATCH_PHYS_VIRT is not set
-+# CONFIG_ARM_PSCI is not set
-+# CONFIG_ARM_PSCI_CHECKER is not set
-+# CONFIG_ARM_PSCI_CPUIDLE is not set
-+# CONFIG_ARM_PTDUMP_DEBUGFS is not set
-+# CONFIG_ARM_SBSA_WATCHDOG is not set
-+# CONFIG_ARM_SCPI_PROTOCOL is not set
-+# CONFIG_ARM_SDE_INTERFACE is not set
-+# CONFIG_ARM_SMCCC_SOC_ID is not set
-+# CONFIG_ARM_SMC_WATCHDOG is not set
-+# CONFIG_ARM_SP805_WATCHDOG is not set
-+# CONFIG_ARM_SPE_PMU is not set
-+# CONFIG_ARM_THUMBEE is not set
-+# CONFIG_ARM_TIMER_SP804 is not set
-+# CONFIG_ARM_UNWIND is not set
-+# CONFIG_ARM_VIRT_EXT is not set
-+# CONFIG_AS3935 is not set
-+# CONFIG_AS73211 is not set
-+# CONFIG_ASM9260_TIMER is not set
-+# CONFIG_ASUS_LAPTOP is not set
-+# CONFIG_ASUS_WIRELESS is not set
-+# CONFIG_ASYMMETRIC_KEY_TYPE is not set
-+# CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE is not set
-+# CONFIG_ASYNC_RAID6_TEST is not set
-+# CONFIG_ASYNC_TX_DMA is not set
-+# CONFIG_AT76C50X_USB is not set
-+# CONFIG_AT803X_PHY is not set
-+# CONFIG_AT91_SAMA5D2_ADC is not set
-+# CONFIG_ATA is not set
-+# CONFIG_ATAGS is not set
-+CONFIG_ATAGS_PROC=y
-+# CONFIG_ATALK is not set
-+# CONFIG_ATARI_PARTITION is not set
-+# CONFIG_ATA_ACPI is not set
-+CONFIG_ATA_BMDMA=y
-+# CONFIG_ATA_FORCE is not set
-+# CONFIG_ATA_GENERIC is not set
-+# CONFIG_ATA_LEDS is not set
-+# CONFIG_ATA_NONSTANDARD is not set
-+# CONFIG_ATA_OVER_ETH is not set
-+# CONFIG_ATA_PIIX is not set
-+CONFIG_ATA_SFF=y
-+# CONFIG_ATA_VERBOSE_ERROR is not set
-+# CONFIG_ATH10K is not set
-+# CONFIG_ATH25 is not set
-+# CONFIG_ATH5K is not set
-+# CONFIG_ATH6KL is not set
-+# CONFIG_ATH79 is not set
-+# CONFIG_ATH9K is not set
-+# CONFIG_ATH9K_HTC is not set
-+# CONFIG_ATH_DEBUG is not set
-+# CONFIG_ATL1 is not set
-+# CONFIG_ATL1C is not set
-+# CONFIG_ATL1E is not set
-+# CONFIG_ATL2 is not set
-+# CONFIG_ATLAS_EZO_SENSOR is not set
-+# CONFIG_ATLAS_PH_SENSOR is not set
-+# CONFIG_ATM is not set
-+# CONFIG_ATMEL is not set
-+# CONFIG_ATMEL_PIT is not set
-+# CONFIG_ATMEL_SSC is not set
-+# CONFIG_ATM_AMBASSADOR is not set
-+# CONFIG_ATM_BR2684 is not set
-+CONFIG_ATM_BR2684_IPFILTER=y
-+# CONFIG_ATM_CLIP is not set
-+CONFIG_ATM_CLIP_NO_ICMP=y
-+# CONFIG_ATM_DRIVERS is not set
-+# CONFIG_ATM_DUMMY is not set
-+# CONFIG_ATM_ENI is not set
-+# CONFIG_ATM_FIRESTREAM is not set
-+# CONFIG_ATM_FORE200E is not set
-+# CONFIG_ATM_HE is not set
-+# CONFIG_ATM_HORIZON is not set
-+# CONFIG_ATM_IA is not set
-+# CONFIG_ATM_IDT77252 is not set
-+# CONFIG_ATM_LANAI is not set
-+# CONFIG_ATM_LANE is not set
-+# CONFIG_ATM_MPOA is not set
-+# CONFIG_ATM_NICSTAR is not set
-+# CONFIG_ATM_SOLOS is not set
-+# CONFIG_ATM_TCP is not set
-+# CONFIG_ATM_ZATM is not set
-+# CONFIG_ATOMIC64_SELFTEST is not set
-+# CONFIG_ATP is not set
-+# CONFIG_AUDIT is not set
-+# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set
-+# CONFIG_AURORA_NB8800 is not set
-+# CONFIG_AUTOFS4_FS is not set
-+# CONFIG_AUTOFS_FS is not set
-+# CONFIG_AUTO_ZRELADDR is not set
-+# CONFIG_AUXDISPLAY is not set
-+# CONFIG_AX25 is not set
-+# CONFIG_AX25_DAMA_SLAVE is not set
-+# CONFIG_AX88796 is not set
-+# CONFIG_AX88796B_PHY is not set
-+# CONFIG_AXP20X_ADC is not set
-+# CONFIG_AXP20X_POWER is not set
-+# CONFIG_AXP288_ADC is not set
-+# CONFIG_AXP288_FUEL_GAUGE is not set
-+# CONFIG_B43 is not set
-+# CONFIG_B43LEGACY is not set
-+# CONFIG_B44 is not set
-+# CONFIG_B53 is not set
-+# CONFIG_BACKLIGHT_ADP8860 is not set
-+# CONFIG_BACKLIGHT_ADP8870 is not set
-+# CONFIG_BACKLIGHT_APPLE is not set
-+# CONFIG_BACKLIGHT_ARCXCNN is not set
-+# CONFIG_BACKLIGHT_BD6107 is not set
-+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
-+# CONFIG_BACKLIGHT_GENERIC is not set
-+# CONFIG_BACKLIGHT_GPIO is not set
-+# CONFIG_BACKLIGHT_KTD253 is not set
-+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-+# CONFIG_BACKLIGHT_LED is not set
-+# CONFIG_BACKLIGHT_LM3630A is not set
-+# CONFIG_BACKLIGHT_LM3639 is not set
-+# CONFIG_BACKLIGHT_LP855X is not set
-+# CONFIG_BACKLIGHT_LV5207LP is not set
-+# CONFIG_BACKLIGHT_PANDORA is not set
-+# CONFIG_BACKLIGHT_PM8941_WLED is not set
-+# CONFIG_BACKLIGHT_PWM is not set
-+# CONFIG_BACKLIGHT_QCOM_WLED is not set
-+# CONFIG_BACKLIGHT_RPI is not set
-+# CONFIG_BACKLIGHT_SAHARA is not set
-+# CONFIG_BACKTRACE_SELF_TEST is not set
-+# CONFIG_BAREUDP is not set
-+CONFIG_BASE_FULL=y
-+CONFIG_BASE_SMALL=0
-+# CONFIG_BATMAN_ADV is not set
-+# CONFIG_BATTERY_BQ27XXX is not set
-+# CONFIG_BATTERY_BQ27XXX_HDQ is not set
-+# CONFIG_BATTERY_CW2015 is not set
-+# CONFIG_BATTERY_DS2760 is not set
-+# CONFIG_BATTERY_DS2780 is not set
-+# CONFIG_BATTERY_DS2781 is not set
-+# CONFIG_BATTERY_DS2782 is not set
-+# CONFIG_BATTERY_GAUGE_LTC2941 is not set
-+# CONFIG_BATTERY_GOLDFISH is not set
-+# CONFIG_BATTERY_LEGO_EV3 is not set
-+# CONFIG_BATTERY_MAX17040 is not set
-+# CONFIG_BATTERY_MAX17042 is not set
-+# CONFIG_BATTERY_MAX1721X is not set
-+# CONFIG_BATTERY_SBS is not set
-+# CONFIG_BAYCOM_EPP is not set
-+# CONFIG_BAYCOM_PAR is not set
-+# CONFIG_BAYCOM_SER_FDX is not set
-+# CONFIG_BAYCOM_SER_HDX is not set
-+# CONFIG_BCACHE is not set
-+# CONFIG_BCM47XX is not set
-+# CONFIG_BCM54140_PHY is not set
-+# CONFIG_BCM63XX is not set
-+# CONFIG_BCM63XX_PHY is not set
-+# CONFIG_BCM7038_WDT is not set
-+# CONFIG_BCM7XXX_PHY is not set
-+# CONFIG_BCM84881_PHY is not set
-+# CONFIG_BCM87XX_PHY is not set
-+# CONFIG_BCMA is not set
-+# CONFIG_BCMA_DRIVER_GPIO is not set
-+CONFIG_BCMA_POSSIBLE=y
-+# CONFIG_BCMGENET is not set
-+# CONFIG_BCM_IPROC_ADC is not set
-+# CONFIG_BCM_KONA_USB2_PHY is not set
-+# CONFIG_BCM_SBA_RAID is not set
-+# CONFIG_BDI_SWITCH is not set
-+# CONFIG_BE2ISCSI is not set
-+# CONFIG_BE2NET is not set
-+# CONFIG_BEFS_FS is not set
-+# CONFIG_BFS_FS is not set
-+# CONFIG_BGMAC is not set
-+# CONFIG_BH1750 is not set
-+# CONFIG_BH1780 is not set
-+# CONFIG_BIG_KEYS is not set
-+# CONFIG_BIG_LITTLE is not set
-+# CONFIG_BINARY_PRINTF is not set
-+# CONFIG_BINFMT_AOUT is not set
-+CONFIG_BINFMT_ELF=y
-+# CONFIG_BINFMT_ELF_FDPIC is not set
-+# CONFIG_BINFMT_FLAT is not set
-+# CONFIG_BINFMT_MISC is not set
-+CONFIG_BINFMT_SCRIPT=y
-+CONFIG_BITREVERSE=y
-+# CONFIG_BLK_CGROUP_IOCOST is not set
-+# CONFIG_BLK_CGROUP_IOLATENCY is not set
-+# CONFIG_BLK_CMDLINE_PARSER is not set
-+# CONFIG_BLK_DEBUG_FS is not set
-+CONFIG_BLK_DEV=y
-+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-+# CONFIG_BLK_DEV_4DRIVES is not set
-+# CONFIG_BLK_DEV_AEC62XX is not set
-+# CONFIG_BLK_DEV_ALI14XX is not set
-+# CONFIG_BLK_DEV_ALI15X3 is not set
-+# CONFIG_BLK_DEV_AMD74XX is not set
-+# CONFIG_BLK_DEV_ATIIXP is not set
-+# CONFIG_BLK_DEV_BSG is not set
-+# CONFIG_BLK_DEV_BSGLIB is not set
-+# CONFIG_BLK_DEV_CMD640 is not set
-+# CONFIG_BLK_DEV_CMD64X is not set
-+# CONFIG_BLK_DEV_COW_COMMON is not set
-+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-+# CONFIG_BLK_DEV_CS5520 is not set
-+# CONFIG_BLK_DEV_CS5530 is not set
-+# CONFIG_BLK_DEV_CS5535 is not set
-+# CONFIG_BLK_DEV_CS5536 is not set
-+# CONFIG_BLK_DEV_CY82C693 is not set
-+# CONFIG_BLK_DEV_DAC960 is not set
-+# CONFIG_BLK_DEV_DELKIN is not set
-+# CONFIG_BLK_DEV_DRBD is not set
-+# CONFIG_BLK_DEV_DTC2278 is not set
-+# CONFIG_BLK_DEV_FD is not set
-+# CONFIG_BLK_DEV_GENERIC is not set
-+# CONFIG_BLK_DEV_HPT366 is not set
-+# CONFIG_BLK_DEV_HT6560B is not set
-+# CONFIG_BLK_DEV_IDEACPI is not set
-+# CONFIG_BLK_DEV_IDECD is not set
-+# CONFIG_BLK_DEV_IDECS is not set
-+# CONFIG_BLK_DEV_IDEPCI is not set
-+# CONFIG_BLK_DEV_IDEPNP is not set
-+# CONFIG_BLK_DEV_IDETAPE is not set
-+# CONFIG_BLK_DEV_IDE_AU1XXX is not set
-+# CONFIG_BLK_DEV_IDE_SATA is not set
-+CONFIG_BLK_DEV_INITRD=y
-+# CONFIG_BLK_DEV_INTEGRITY is not set
-+# CONFIG_BLK_DEV_IO_TRACE is not set
-+# CONFIG_BLK_DEV_IT8172 is not set
-+# CONFIG_BLK_DEV_IT8213 is not set
-+# CONFIG_BLK_DEV_IT821X is not set
-+# CONFIG_BLK_DEV_JMICRON is not set
-+# CONFIG_BLK_DEV_LOOP is not set
-+CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
-+# CONFIG_BLK_DEV_NBD is not set
-+# CONFIG_BLK_DEV_NS87415 is not set
-+# CONFIG_BLK_DEV_NULL_BLK is not set
-+# CONFIG_BLK_DEV_NVME is not set
-+# CONFIG_BLK_DEV_OFFBOARD is not set
-+# CONFIG_BLK_DEV_OPTI621 is not set
-+# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
-+# CONFIG_BLK_DEV_PDC202XX_NEW is not set
-+# CONFIG_BLK_DEV_PDC202XX_OLD is not set
-+# CONFIG_BLK_DEV_PIIX is not set
-+# CONFIG_BLK_DEV_PLATFORM is not set
-+# CONFIG_BLK_DEV_PMEM is not set
-+# CONFIG_BLK_DEV_QD65XX is not set
-+# CONFIG_BLK_DEV_RAM is not set
-+# CONFIG_BLK_DEV_RBD is not set
-+# CONFIG_BLK_DEV_RSXX is not set
-+# CONFIG_BLK_DEV_RZ1000 is not set
-+# CONFIG_BLK_DEV_SC1200 is not set
-+# CONFIG_BLK_DEV_SD is not set
-+# CONFIG_BLK_DEV_SIIMAGE is not set
-+# CONFIG_BLK_DEV_SIS5513 is not set
-+# CONFIG_BLK_DEV_SKD is not set
-+# CONFIG_BLK_DEV_SL82C105 is not set
-+# CONFIG_BLK_DEV_SLC90E66 is not set
-+# CONFIG_BLK_DEV_SR is not set
-+# CONFIG_BLK_DEV_SVWKS is not set
-+# CONFIG_BLK_DEV_SX8 is not set
-+# CONFIG_BLK_DEV_TC86C001 is not set
-+# CONFIG_BLK_DEV_THROTTLING is not set
-+# CONFIG_BLK_DEV_TRIFLEX is not set
-+# CONFIG_BLK_DEV_TRM290 is not set
-+# CONFIG_BLK_DEV_UMC8672 is not set
-+# CONFIG_BLK_DEV_UMEM is not set
-+# CONFIG_BLK_DEV_VIA82CXXX is not set
-+# CONFIG_BLK_DEV_ZONED is not set
-+# CONFIG_BLK_INLINE_ENCRYPTION is not set
-+# CONFIG_BLK_SED_OPAL is not set
-+# CONFIG_BLK_WBT is not set
-+CONFIG_BLOCK=y
-+# CONFIG_BMA180 is not set
-+# CONFIG_BMA220 is not set
-+# CONFIG_BMA400 is not set
-+# CONFIG_BMC150_ACCEL is not set
-+# CONFIG_BMC150_MAGN is not set
-+# CONFIG_BMC150_MAGN_I2C is not set
-+# CONFIG_BMC150_MAGN_SPI is not set
-+# CONFIG_BME680 is not set
-+# CONFIG_BMG160 is not set
-+# CONFIG_BMI160_I2C is not set
-+# CONFIG_BMI160_SPI is not set
-+# CONFIG_BMIPS_GENERIC is not set
-+# CONFIG_BMP280 is not set
-+# CONFIG_BNA is not set
-+# CONFIG_BNX2 is not set
-+# CONFIG_BNX2X is not set
-+# CONFIG_BNX2X_SRIOV is not set
-+# CONFIG_BNXT is not set
-+# CONFIG_BONDING is not set
-+# CONFIG_BOOKE_WDT is not set
-+CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT=3
-+# CONFIG_BOOTTIME_TRACING is not set
-+# CONFIG_BOOT_CONFIG is not set
-+# CONFIG_BOOT_PRINTK_DELAY is not set
-+CONFIG_BOOT_RAW=y
-+# CONFIG_BOUNCE is not set
-+CONFIG_BPF=y
-+# CONFIG_BPFILTER is not set
-+CONFIG_BPF_JIT=y
-+# CONFIG_BPF_JIT_ALWAYS_ON is not set
-+CONFIG_BPF_JIT_DEFAULT_ON=y
-+# CONFIG_BPF_PRELOAD is not set
-+# CONFIG_BPF_STREAM_PARSER is not set
-+CONFIG_BPF_SYSCALL=y
-+# CONFIG_BPQETHER is not set
-+CONFIG_BQL=y
-+CONFIG_BRANCH_PROFILE_NONE=y
-+# CONFIG_BRCMFMAC is not set
-+# CONFIG_BRCMSMAC is not set
-+# CONFIG_BRCMSTB_GISB_ARB is not set
-+CONFIG_BRIDGE=y
-+# CONFIG_BRIDGE_EBT_802_3 is not set
-+# CONFIG_BRIDGE_EBT_AMONG is not set
-+# CONFIG_BRIDGE_EBT_ARP is not set
-+# CONFIG_BRIDGE_EBT_ARPREPLY is not set
-+# CONFIG_BRIDGE_EBT_BROUTE is not set
-+# CONFIG_BRIDGE_EBT_DNAT is not set
-+# CONFIG_BRIDGE_EBT_IP is not set
-+# CONFIG_BRIDGE_EBT_IP6 is not set
-+# CONFIG_BRIDGE_EBT_LIMIT is not set
-+# CONFIG_BRIDGE_EBT_LOG is not set
-+# CONFIG_BRIDGE_EBT_MARK is not set
-+# CONFIG_BRIDGE_EBT_MARK_T is not set
-+# CONFIG_BRIDGE_EBT_NFLOG is not set
-+# CONFIG_BRIDGE_EBT_PKTTYPE is not set
-+# CONFIG_BRIDGE_EBT_REDIRECT is not set
-+# CONFIG_BRIDGE_EBT_SNAT is not set
-+# CONFIG_BRIDGE_EBT_STP is not set
-+# CONFIG_BRIDGE_EBT_T_FILTER is not set
-+# CONFIG_BRIDGE_EBT_T_NAT is not set
-+# CONFIG_BRIDGE_EBT_VLAN is not set
-+CONFIG_BRIDGE_IGMP_SNOOPING=y
-+# CONFIG_BRIDGE_MRP is not set
-+# CONFIG_BRIDGE_NETFILTER is not set
-+# CONFIG_BRIDGE_NF_EBTABLES is not set
-+CONFIG_BRIDGE_VLAN_FILTERING=y
-+# CONFIG_BROADCOM_PHY is not set
-+CONFIG_BROKEN_ON_SMP=y
-+# CONFIG_BSD_DISKLABEL is not set
-+# CONFIG_BSD_PROCESS_ACCT is not set
-+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
-+# CONFIG_BT is not set
-+# CONFIG_BTRFS_ASSERT is not set
-+# CONFIG_BTRFS_DEBUG is not set
-+# CONFIG_BTRFS_FS is not set
-+# CONFIG_BTRFS_FS_POSIX_ACL is not set
-+# CONFIG_BTRFS_FS_REF_VERIFY is not set
-+# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set
-+# CONFIG_BT_ATH3K is not set
-+# CONFIG_BT_BNEP is not set
-+CONFIG_BT_BNEP_MC_FILTER=y
-+CONFIG_BT_BNEP_PROTO_FILTER=y
-+# CONFIG_BT_BREDR is not set
-+# CONFIG_BT_CMTP is not set
-+# CONFIG_BT_FEATURE_DEBUG is not set
-+# CONFIG_BT_HCIBCM203X is not set
-+# CONFIG_BT_HCIBFUSB is not set
-+# CONFIG_BT_HCIBLUECARD is not set
-+# CONFIG_BT_HCIBPA10X is not set
-+# CONFIG_BT_HCIBT3C is not set
-+# CONFIG_BT_HCIBTSDIO is not set
-+# CONFIG_BT_HCIBTUSB is not set
-+# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set
-+# CONFIG_BT_HCIBTUSB_MTK is not set
-+# CONFIG_BT_HCIBTUSB_RTL is not set
-+# CONFIG_BT_HCIDTL1 is not set
-+# CONFIG_BT_HCIUART is not set
-+# CONFIG_BT_HCIUART_3WIRE is not set
-+# CONFIG_BT_HCIUART_AG6XX is not set
-+# CONFIG_BT_HCIUART_ATH3K is not set
-+CONFIG_BT_HCIUART_BCSP=y
-+CONFIG_BT_HCIUART_H4=y
-+# CONFIG_BT_HCIUART_LL is not set
-+# CONFIG_BT_HCIUART_MRVL is not set
-+# CONFIG_BT_HCIUART_QCA is not set
-+# CONFIG_BT_HCIUART_RTL is not set
-+# CONFIG_BT_HCIVHCI is not set
-+# CONFIG_BT_HIDP is not set
-+# CONFIG_BT_HS is not set
-+# CONFIG_BT_LE is not set
-+# CONFIG_BT_LEDS is not set
-+# CONFIG_BT_MRVL is not set
-+# CONFIG_BT_MSFTEXT is not set
-+# CONFIG_BT_MTKSDIO is not set
-+# CONFIG_BT_MTKUART is not set
-+# CONFIG_BT_RFCOMM is not set
-+CONFIG_BT_RFCOMM_TTY=y
-+# CONFIG_BT_SELFTEST is not set
-+CONFIG_BUG=y
-+# CONFIG_BUG_ON_DATA_CORRUPTION is not set
-+CONFIG_BUILDTIME_EXTABLE_SORT=y
-+CONFIG_BUILDTIME_TABLE_SORT=y
-+# CONFIG_BUILD_BIN2C is not set
-+CONFIG_BUILD_SALT=""
-+# CONFIG_C2PORT is not set
-+CONFIG_CACHE_L2X0_PMU=y
-+# CONFIG_CADENCE_WATCHDOG is not set
-+# CONFIG_CAIF is not set
-+# CONFIG_CAN is not set
-+# CONFIG_CAN_BCM is not set
-+# CONFIG_CAN_DEBUG_DEVICES is not set
-+# CONFIG_CAN_DEV is not set
-+# CONFIG_CAN_GS_USB is not set
-+# CONFIG_CAN_GW is not set
-+# CONFIG_CAN_HI311X is not set
-+# CONFIG_CAN_IFI_CANFD is not set
-+# CONFIG_CAN_ISOTP is not set
-+# CONFIG_CAN_J1939 is not set
-+# CONFIG_CAN_KVASER_PCIEFD is not set
-+# CONFIG_CAN_MCBA_USB is not set
-+# CONFIG_CAN_MCP251XFD is not set
-+# CONFIG_CAN_M_CAN is not set
-+# CONFIG_CAN_PEAK_PCIEFD is not set
-+# CONFIG_CAN_RAW is not set
-+# CONFIG_CAN_RCAR is not set
-+# CONFIG_CAN_RCAR_CANFD is not set
-+# CONFIG_CAN_SLCAN is not set
-+# CONFIG_CAN_SUN4I is not set
-+# CONFIG_CAN_UCAN is not set
-+# CONFIG_CAN_VCAN is not set
-+# CONFIG_CAN_VXCAN is not set
-+# CONFIG_CAPI_AVM is not set
-+# CONFIG_CAPI_EICON is not set
-+# CONFIG_CAPI_TRACE is not set
-+CONFIG_CARDBUS=y
-+# CONFIG_CARDMAN_4000 is not set
-+# CONFIG_CARDMAN_4040 is not set
-+# CONFIG_CARL9170 is not set
-+# CONFIG_CASSINI is not set
-+# CONFIG_CAVIUM_CPT is not set
-+# CONFIG_CAVIUM_ERRATUM_22375 is not set
-+# CONFIG_CAVIUM_ERRATUM_23144 is not set
-+# CONFIG_CAVIUM_ERRATUM_23154 is not set
-+# CONFIG_CAVIUM_ERRATUM_27456 is not set
-+# CONFIG_CAVIUM_ERRATUM_30115 is not set
-+# CONFIG_CAVIUM_OCTEON_SOC is not set
-+# CONFIG_CAVIUM_PTP is not set
-+# CONFIG_CB710_CORE is not set
-+# CONFIG_CC10001_ADC is not set
-+# CONFIG_CCS811 is not set
-+CONFIG_CC_CAN_LINK=y
-+CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
-+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-+# CONFIG_CDROM_PKTCDVD is not set
-+# CONFIG_CEPH_FS is not set
-+# CONFIG_CEPH_LIB is not set
-+# CONFIG_CFG80211 is not set
-+# CONFIG_CFG80211_CERTIFICATION_ONUS is not set
-+# CONFIG_CGROUPS is not set
-+# CONFIG_CHARGER_ADP5061 is not set
-+# CONFIG_CHARGER_BD99954 is not set
-+# CONFIG_CHARGER_BQ2415X is not set
-+# CONFIG_CHARGER_BQ24190 is not set
-+# CONFIG_CHARGER_BQ24257 is not set
-+# CONFIG_CHARGER_BQ24735 is not set
-+# CONFIG_CHARGER_BQ2515X is not set
-+# CONFIG_CHARGER_BQ25890 is not set
-+# CONFIG_CHARGER_BQ25980 is not set
-+# CONFIG_CHARGER_DETECTOR_MAX14656 is not set
-+# CONFIG_CHARGER_GPIO is not set
-+# CONFIG_CHARGER_ISP1704 is not set
-+# CONFIG_CHARGER_LP8727 is not set
-+# CONFIG_CHARGER_LT3651 is not set
-+# CONFIG_CHARGER_LTC3651 is not set
-+# CONFIG_CHARGER_MANAGER is not set
-+# CONFIG_CHARGER_MAX8903 is not set
-+# CONFIG_CHARGER_RT9455 is not set
-+# CONFIG_CHARGER_SBS is not set
-+# CONFIG_CHARGER_SMB347 is not set
-+# CONFIG_CHARGER_TWL4030 is not set
-+# CONFIG_CHARGER_UCS1002 is not set
-+# CONFIG_CHASH_SELFTEST is not set
-+# CONFIG_CHASH_STATS is not set
-+# CONFIG_CHECKPOINT_RESTORE is not set
-+# CONFIG_CHELSIO_T1 is not set
-+# CONFIG_CHELSIO_T3 is not set
-+# CONFIG_CHELSIO_T4 is not set
-+# CONFIG_CHELSIO_T4VF is not set
-+# CONFIG_CHROME_PLATFORMS is not set
-+# CONFIG_CHR_DEV_OSST is not set
-+# CONFIG_CHR_DEV_SCH is not set
-+# CONFIG_CHR_DEV_SG is not set
-+# CONFIG_CHR_DEV_ST is not set
-+# CONFIG_CICADA_PHY is not set
-+# CONFIG_CIFS is not set
-+# CONFIG_CIFS_ACL is not set
-+CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y
-+# CONFIG_CIFS_DEBUG is not set
-+# CONFIG_CIFS_DEBUG2 is not set
-+# CONFIG_CIFS_FSCACHE is not set
-+# CONFIG_CIFS_NFSD_EXPORT is not set
-+CONFIG_CIFS_POSIX=y
-+# CONFIG_CIFS_SMB2 is not set
-+# CONFIG_CIFS_STATS is not set
-+# CONFIG_CIFS_STATS2 is not set
-+# CONFIG_CIFS_WEAK_PW_HASH is not set
-+CONFIG_CIFS_XATTR=y
-+# CONFIG_CIO_DAC is not set
-+CONFIG_CLANG_VERSION=0
-+# CONFIG_CLEANCACHE is not set
-+# CONFIG_CLKSRC_VERSATILE is not set
-+# CONFIG_CLK_HSDK is not set
-+# CONFIG_CLK_QORIQ is not set
-+# CONFIG_CLOCK_THERMAL is not set
-+CONFIG_CLS_U32_MARK=y
-+# CONFIG_CLS_U32_PERF is not set
-+# CONFIG_CM32181 is not set
-+# CONFIG_CM3232 is not set
-+# CONFIG_CM3323 is not set
-+# CONFIG_CM3605 is not set
-+# CONFIG_CM36651 is not set
-+# CONFIG_CMA is not set
-+CONFIG_CMDLINE=""
-+# CONFIG_CMDLINE_BOOL is not set
-+# CONFIG_CMDLINE_EXTEND is not set
-+# CONFIG_CMDLINE_FORCE is not set
-+# CONFIG_CMDLINE_FROM_BOOTLOADER is not set
-+# CONFIG_CMDLINE_PARTITION is not set
-+# CONFIG_CNIC is not set
-+# CONFIG_CODA_FS is not set
-+# CONFIG_CODE_PATCHING_SELFTEST is not set
-+# CONFIG_COMEDI is not set
-+# CONFIG_COMMON_CLK_CDCE706 is not set
-+# CONFIG_COMMON_CLK_CDCE925 is not set
-+# CONFIG_COMMON_CLK_CS2000_CP is not set
-+# CONFIG_COMMON_CLK_FIXED_MMIO is not set
-+# CONFIG_COMMON_CLK_IPROC is not set
-+# CONFIG_COMMON_CLK_MAX9485 is not set
-+# CONFIG_COMMON_CLK_MT6765 is not set
-+# CONFIG_COMMON_CLK_MT8167 is not set
-+# CONFIG_COMMON_CLK_MT8167_AUDSYS is not set
-+# CONFIG_COMMON_CLK_MT8167_IMGSYS is not set
-+# CONFIG_COMMON_CLK_MT8167_MFGCFG is not set
-+# CONFIG_COMMON_CLK_MT8167_MMSYS is not set
-+# CONFIG_COMMON_CLK_MT8167_VDECSYS is not set
-+# CONFIG_COMMON_CLK_NXP is not set
-+# CONFIG_COMMON_CLK_PIC32 is not set
-+# CONFIG_COMMON_CLK_PWM is not set
-+# CONFIG_COMMON_CLK_PXA is not set
-+# CONFIG_COMMON_CLK_QCOM is not set
-+# CONFIG_COMMON_CLK_SI514 is not set
-+# CONFIG_COMMON_CLK_SI5341 is not set
-+# CONFIG_COMMON_CLK_SI5351 is not set
-+# CONFIG_COMMON_CLK_SI544 is not set
-+# CONFIG_COMMON_CLK_SI570 is not set
-+# CONFIG_COMMON_CLK_VC5 is not set
-+# CONFIG_COMMON_CLK_XGENE is not set
-+# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set
-+CONFIG_COMPACTION=y
-+# CONFIG_COMPAL_LAPTOP is not set
-+# CONFIG_COMPAT is not set
-+# CONFIG_COMPAT_BRK is not set
-+# CONFIG_COMPILE_TEST is not set
-+# CONFIG_CONFIGFS_FS is not set
-+# CONFIG_CONNECTOR is not set
-+CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7
-+CONFIG_CONSOLE_LOGLEVEL_QUIET=4
-+CONFIG_CONSTRUCTORS=y
-+# CONFIG_CONTEXT_SWITCH_TRACER is not set
-+# CONFIG_COPS is not set
-+# CONFIG_CORDIC is not set
-+# CONFIG_COREDUMP is not set
-+# CONFIG_CORESIGHT is not set
-+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-+# CONFIG_CORTINA_PHY is not set
-+# CONFIG_COUNTER is not set
-+# CONFIG_CPA_DEBUG is not set
-+# CONFIG_CPU_BIG_ENDIAN is not set
-+# CONFIG_CPU_BPREDICT_DISABLE is not set
-+# CONFIG_CPU_DCACHE_DISABLE is not set
-+# CONFIG_CPU_FREQ is not set
-+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
-+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
-+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
-+# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set
-+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
-+# CONFIG_CPU_FREQ_GOV_SCHEDUTIL is not set
-+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
-+# CONFIG_CPU_FREQ_THERMAL is not set
-+# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
-+# CONFIG_CPU_ICACHE_DISABLE is not set
-+# CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND is not set
-+# CONFIG_CPU_IDLE is not set
-+# CONFIG_CPU_IDLE_GOV_LADDER is not set
-+# CONFIG_CPU_IDLE_GOV_MENU is not set
-+# CONFIG_CPU_IDLE_GOV_TEO is not set
-+# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set
-+# CONFIG_CPU_ISOLATION is not set
-+CONFIG_CPU_LITTLE_ENDIAN=y
-+# CONFIG_CPU_NO_EFFICIENT_FFS is not set
-+CONFIG_CPU_SW_DOMAIN_PAN=y
-+# CONFIG_CRAMFS is not set
-+CONFIG_CRAMFS_BLOCKDEV=y
-+# CONFIG_CRAMFS_MTD is not set
-+# CONFIG_CRASH_DUMP is not set
-+# CONFIG_CRC16 is not set
-+CONFIG_CRC32=y
-+# CONFIG_CRC32_BIT is not set
-+CONFIG_CRC32_SARWATE=y
-+# CONFIG_CRC32_SELFTEST is not set
-+# CONFIG_CRC32_SLICEBY4 is not set
-+# CONFIG_CRC32_SLICEBY8 is not set
-+# CONFIG_CRC4 is not set
-+# CONFIG_CRC64 is not set
-+# CONFIG_CRC7 is not set
-+# CONFIG_CRC8 is not set
-+# CONFIG_CRC_CCITT is not set
-+# CONFIG_CRC_ITU_T is not set
-+# CONFIG_CRC_T10DIF is not set
-+CONFIG_CROSS_COMPILE=""
-+# CONFIG_CROSS_MEMORY_ATTACH is not set
-+CONFIG_CRYPTO=y
-+# CONFIG_CRYPTO_842 is not set
-+# CONFIG_CRYPTO_ADIANTUM is not set
-+# CONFIG_CRYPTO_AEAD is not set
-+# CONFIG_CRYPTO_AEGIS128 is not set
-+# CONFIG_CRYPTO_AEGIS128L is not set
-+# CONFIG_CRYPTO_AEGIS128L_AESNI_SSE2 is not set
-+# CONFIG_CRYPTO_AEGIS128_AESNI_SSE2 is not set
-+# CONFIG_CRYPTO_AEGIS256 is not set
-+# CONFIG_CRYPTO_AEGIS256_AESNI_SSE2 is not set
-+CONFIG_CRYPTO_AES=y
-+# CONFIG_CRYPTO_AES_586 is not set
-+# CONFIG_CRYPTO_AES_ARM is not set
-+# CONFIG_CRYPTO_AES_ARM_BS is not set
-+# CONFIG_CRYPTO_AES_ARM_CE is not set
-+# CONFIG_CRYPTO_AES_NI_INTEL is not set
-+# CONFIG_CRYPTO_AES_TI is not set
-+CONFIG_CRYPTO_ALGAPI=y
-+CONFIG_CRYPTO_ALGAPI2=y
-+# CONFIG_CRYPTO_ANSI_CPRNG is not set
-+# CONFIG_CRYPTO_ANUBIS is not set
-+# CONFIG_CRYPTO_ARC4 is not set
-+# CONFIG_CRYPTO_AUTHENC is not set
-+# CONFIG_CRYPTO_BLAKE2B is not set
-+# CONFIG_CRYPTO_BLAKE2S is not set
-+# CONFIG_CRYPTO_BLAKE2S_X86 is not set
-+# CONFIG_CRYPTO_BLOWFISH is not set
-+# CONFIG_CRYPTO_CAMELLIA is not set
-+# CONFIG_CRYPTO_CAST5 is not set
-+# CONFIG_CRYPTO_CAST6 is not set
-+# CONFIG_CRYPTO_CBC is not set
-+# CONFIG_CRYPTO_CCM is not set
-+# CONFIG_CRYPTO_CFB is not set
-+# CONFIG_CRYPTO_CHACHA20 is not set
-+# CONFIG_CRYPTO_CHACHA20POLY1305 is not set
-+# CONFIG_CRYPTO_CHACHA20_NEON is not set
-+# CONFIG_CRYPTO_CHACHA20_X86_64 is not set
-+# CONFIG_CRYPTO_CHACHA_MIPS is not set
-+# CONFIG_CRYPTO_CMAC is not set
-+# CONFIG_CRYPTO_CRC32 is not set
-+# CONFIG_CRYPTO_CRC32C is not set
-+# CONFIG_CRYPTO_CRC32C_INTEL is not set
-+# CONFIG_CRYPTO_CRC32_ARM_CE is not set
-+# CONFIG_CRYPTO_CRCT10DIF is not set
-+# CONFIG_CRYPTO_CRYPTD is not set
-+# CONFIG_CRYPTO_CTR is not set
-+# CONFIG_CRYPTO_CTS is not set
-+# CONFIG_CRYPTO_CURVE25519 is not set
-+# CONFIG_CRYPTO_CURVE25519_NEON is not set
-+# CONFIG_CRYPTO_CURVE25519_X86 is not set
-+# CONFIG_CRYPTO_DEFLATE is not set
-+# CONFIG_CRYPTO_DES is not set
-+# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set
-+# CONFIG_CRYPTO_DEV_ATMEL_AES is not set
-+# CONFIG_CRYPTO_DEV_ATMEL_AUTHENC is not set
-+# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set
-+# CONFIG_CRYPTO_DEV_ATMEL_SHA is not set
-+# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set
-+# CONFIG_CRYPTO_DEV_ATMEL_TDES is not set
-+# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set
-+# CONFIG_CRYPTO_DEV_CCP is not set
-+# CONFIG_CRYPTO_DEV_CCP_DEBUGFS is not set
-+# CONFIG_CRYPTO_DEV_CCREE is not set
-+# CONFIG_CRYPTO_DEV_FSL_CAAM is not set
-+# CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC is not set
-+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
-+# CONFIG_CRYPTO_DEV_HISI_SEC is not set
-+# CONFIG_CRYPTO_DEV_HISI_ZIP is not set
-+# CONFIG_CRYPTO_DEV_IMGTEC_HASH is not set
-+# CONFIG_CRYPTO_DEV_MARVELL_CESA is not set
-+# CONFIG_CRYPTO_DEV_MV_CESA is not set
-+# CONFIG_CRYPTO_DEV_MXC_SCC is not set
-+# CONFIG_CRYPTO_DEV_MXS_DCP is not set
-+# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set
-+# CONFIG_CRYPTO_DEV_QAT_C3XXX is not set
-+# CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set
-+# CONFIG_CRYPTO_DEV_QAT_C62X is not set
-+# CONFIG_CRYPTO_DEV_QAT_C62XVF is not set
-+# CONFIG_CRYPTO_DEV_QAT_DH895xCC is not set
-+# CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set
-+# CONFIG_CRYPTO_DEV_QCE is not set
-+# CONFIG_CRYPTO_DEV_S5P is not set
-+# CONFIG_CRYPTO_DEV_SAFEXCEL is not set
-+# CONFIG_CRYPTO_DEV_SAHARA is not set
-+# CONFIG_CRYPTO_DEV_SP_PSP is not set
-+# CONFIG_CRYPTO_DEV_TALITOS is not set
-+# CONFIG_CRYPTO_DEV_VIRTIO is not set
-+# CONFIG_CRYPTO_DH is not set
-+# CONFIG_CRYPTO_DRBG_CTR is not set
-+# CONFIG_CRYPTO_DRBG_HASH is not set
-+# CONFIG_CRYPTO_DRBG_MENU is not set
-+# CONFIG_CRYPTO_ECB is not set
-+# CONFIG_CRYPTO_ECDH is not set
-+# CONFIG_CRYPTO_ECHAINIV is not set
-+# CONFIG_CRYPTO_ECRDSA is not set
-+# CONFIG_CRYPTO_ESSIV is not set
-+# CONFIG_CRYPTO_FCRYPT is not set
-+# CONFIG_CRYPTO_FIPS is not set
-+# CONFIG_CRYPTO_GCM is not set
-+# CONFIG_CRYPTO_GF128MUL is not set
-+# CONFIG_CRYPTO_GHASH is not set
-+# CONFIG_CRYPTO_GHASH_ARM_CE is not set
-+# CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL is not set
-+# CONFIG_CRYPTO_HASH is not set
-+# CONFIG_CRYPTO_HMAC is not set
-+# CONFIG_CRYPTO_HW is not set
-+# CONFIG_CRYPTO_JITTERENTROPY is not set
-+# CONFIG_CRYPTO_KEYWRAP is not set
-+# CONFIG_CRYPTO_KHAZAD is not set
-+CONFIG_CRYPTO_LIB_AES=y
-+CONFIG_CRYPTO_LIB_ARC4=y
-+# CONFIG_CRYPTO_LIB_BLAKE2S is not set
-+# CONFIG_CRYPTO_LIB_CHACHA is not set
-+# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set
-+# CONFIG_CRYPTO_LIB_CURVE25519 is not set
-+# CONFIG_CRYPTO_LIB_POLY1305 is not set
-+CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9
-+# CONFIG_CRYPTO_LRW is not set
-+# CONFIG_CRYPTO_LZ4 is not set
-+# CONFIG_CRYPTO_LZ4HC is not set
-+# CONFIG_CRYPTO_LZO is not set
-+# CONFIG_CRYPTO_MANAGER is not set
-+# CONFIG_CRYPTO_MANAGER2 is not set
-+CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
-+# CONFIG_CRYPTO_MCRYPTD is not set
-+# CONFIG_CRYPTO_MD4 is not set
-+# CONFIG_CRYPTO_MD5 is not set
-+# CONFIG_CRYPTO_MICHAEL_MIC is not set
-+# CONFIG_CRYPTO_MORUS1280 is not set
-+# CONFIG_CRYPTO_MORUS1280_AVX2 is not set
-+# CONFIG_CRYPTO_MORUS1280_SSE2 is not set
-+# CONFIG_CRYPTO_MORUS640 is not set
-+# CONFIG_CRYPTO_MORUS640_SSE2 is not set
-+# CONFIG_CRYPTO_NHPOLY1305_NEON is not set
-+# CONFIG_CRYPTO_NULL is not set
-+# CONFIG_CRYPTO_OFB is not set
-+# CONFIG_CRYPTO_PCBC is not set
-+# CONFIG_CRYPTO_PCOMP is not set
-+# CONFIG_CRYPTO_PCOMP2 is not set
-+CONFIG_CRYPTO_PCRYPT=y
-+# CONFIG_CRYPTO_POLY1305 is not set
-+# CONFIG_CRYPTO_POLY1305_ARM is not set
-+# CONFIG_CRYPTO_POLY1305_MIPS is not set
-+# CONFIG_CRYPTO_POLY1305_NEON is not set
-+# CONFIG_CRYPTO_POLY1305_X86_64 is not set
-+# CONFIG_CRYPTO_RMD128 is not set
-+# CONFIG_CRYPTO_RMD160 is not set
-+# CONFIG_CRYPTO_RMD256 is not set
-+# CONFIG_CRYPTO_RMD320 is not set
-+# CONFIG_CRYPTO_RNG is not set
-+# CONFIG_CRYPTO_RSA is not set
-+# CONFIG_CRYPTO_SALSA20 is not set
-+# CONFIG_CRYPTO_SALSA20_586 is not set
-+# CONFIG_CRYPTO_SEED is not set
-+# CONFIG_CRYPTO_SEQIV is not set
-+# CONFIG_CRYPTO_SERPENT is not set
-+# CONFIG_CRYPTO_SHA1 is not set
-+# CONFIG_CRYPTO_SHA1_ARM is not set
-+# CONFIG_CRYPTO_SHA1_ARM_CE is not set
-+# CONFIG_CRYPTO_SHA1_ARM_NEON is not set
-+# CONFIG_CRYPTO_SHA256 is not set
-+# CONFIG_CRYPTO_SHA256_ARM is not set
-+# CONFIG_CRYPTO_SHA2_ARM_CE is not set
-+# CONFIG_CRYPTO_SHA3 is not set
-+# CONFIG_CRYPTO_SHA3_ARM64 is not set
-+# CONFIG_CRYPTO_SHA512 is not set
-+# CONFIG_CRYPTO_SHA512_ARM is not set
-+# CONFIG_CRYPTO_SHA512_ARM64_CE is not set
-+# CONFIG_CRYPTO_SIMD is not set
-+CONFIG_CRYPTO_SKCIPHER=y
-+CONFIG_CRYPTO_SKCIPHER2=y
-+# CONFIG_CRYPTO_SM2 is not set
-+# CONFIG_CRYPTO_SM3 is not set
-+# CONFIG_CRYPTO_SM3_ARM64_CE is not set
-+# CONFIG_CRYPTO_SM4 is not set
-+# CONFIG_CRYPTO_SM4_ARM64_CE is not set
-+# CONFIG_CRYPTO_SPECK is not set
-+# CONFIG_CRYPTO_STATS is not set
-+# CONFIG_CRYPTO_STREEBOG is not set
-+# CONFIG_CRYPTO_TEA is not set
-+# CONFIG_CRYPTO_TEST is not set
-+# CONFIG_CRYPTO_TGR192 is not set
-+# CONFIG_CRYPTO_TWOFISH is not set
-+# CONFIG_CRYPTO_TWOFISH_586 is not set
-+# CONFIG_CRYPTO_TWOFISH_COMMON is not set
-+# CONFIG_CRYPTO_USER is not set
-+# CONFIG_CRYPTO_USER_API_AEAD is not set
-+# CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE is not set
-+# CONFIG_CRYPTO_USER_API_HASH is not set
-+# CONFIG_CRYPTO_USER_API_RNG is not set
-+# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set
-+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
-+# CONFIG_CRYPTO_VMAC is not set
-+# CONFIG_CRYPTO_WP512 is not set
-+# CONFIG_CRYPTO_XCBC is not set
-+# CONFIG_CRYPTO_XTS is not set
-+# CONFIG_CRYPTO_XXHASH is not set
-+# CONFIG_CRYPTO_ZLIB is not set
-+# CONFIG_CRYPTO_ZSTD is not set
-+# CONFIG_CS5535_MFGPT is not set
-+# CONFIG_CS89x0 is not set
-+# CONFIG_CSD_LOCK_WAIT_DEBUG is not set
-+# CONFIG_CUSE is not set
-+# CONFIG_CW1200 is not set
-+# CONFIG_CXD2880_SPI_DRV is not set
-+# CONFIG_CXL_AFU_DRIVER_OPS is not set
-+# CONFIG_CXL_BASE is not set
-+# CONFIG_CXL_EEH is not set
-+# CONFIG_CXL_KERNEL_API is not set
-+# CONFIG_CXL_LIB is not set
-+# CONFIG_CYPRESS_FIRMWARE is not set
-+# CONFIG_DA280 is not set
-+# CONFIG_DA311 is not set
-+# CONFIG_DAVICOM_PHY is not set
-+# CONFIG_DAX is not set
-+# CONFIG_DCB is not set
-+# CONFIG_DDR is not set
-+# CONFIG_DEBUG_ALIGN_RODATA is not set
-+# CONFIG_DEBUG_ATOMIC_SLEEP is not set
-+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
-+# CONFIG_DEBUG_BUGVERBOSE is not set
-+# CONFIG_DEBUG_CREDENTIALS is not set
-+# CONFIG_DEBUG_DEVRES is not set
-+# CONFIG_DEBUG_DRIVER is not set
-+# CONFIG_DEBUG_EFI is not set
-+# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_32B is not set
-+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
-+CONFIG_DEBUG_FS=y
-+CONFIG_DEBUG_FS_ALLOW_ALL=y
-+# CONFIG_DEBUG_FS_ALLOW_NONE is not set
-+# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set
-+# CONFIG_DEBUG_GPIO is not set
-+# CONFIG_DEBUG_HIGHMEM is not set
-+# CONFIG_DEBUG_ICEDCC is not set
-+# CONFIG_DEBUG_INFO is not set
-+# CONFIG_DEBUG_INFO_BTF is not set
-+# CONFIG_DEBUG_INFO_COMPRESSED is not set
-+# CONFIG_DEBUG_INFO_DWARF4 is not set
-+CONFIG_DEBUG_INFO_REDUCED=y
-+# CONFIG_DEBUG_INFO_SPLIT is not set
-+CONFIG_DEBUG_KERNEL=y
-+# CONFIG_DEBUG_KMEMLEAK is not set
-+# CONFIG_DEBUG_KOBJECT is not set
-+# CONFIG_DEBUG_KOBJECT_RELEASE is not set
-+# CONFIG_DEBUG_LIST is not set
-+# CONFIG_DEBUG_LL is not set
-+# CONFIG_DEBUG_LL_UART_8250 is not set
-+# CONFIG_DEBUG_LL_UART_PL01X is not set
-+# CONFIG_DEBUG_LOCKDEP is not set
-+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
-+# CONFIG_DEBUG_LOCK_ALLOC is not set
-+# CONFIG_DEBUG_MEMORY_INIT is not set
-+# CONFIG_DEBUG_MISC is not set
-+# CONFIG_DEBUG_MUTEXES is not set
-+# CONFIG_DEBUG_NOTIFIERS is not set
-+# CONFIG_DEBUG_NX_TEST is not set
-+# CONFIG_DEBUG_OBJECTS is not set
-+# CONFIG_DEBUG_PAGEALLOC is not set
-+# CONFIG_DEBUG_PAGE_REF is not set
-+# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
-+# CONFIG_DEBUG_PER_CPU_MAPS is not set
-+# CONFIG_DEBUG_PINCTRL is not set
-+# CONFIG_DEBUG_PI_LIST is not set
-+# CONFIG_DEBUG_PLIST is not set
-+# CONFIG_DEBUG_PREEMPT is not set
-+# CONFIG_DEBUG_RODATA_TEST is not set
-+# CONFIG_DEBUG_RSEQ is not set
-+# CONFIG_DEBUG_RT_MUTEXES is not set
-+# CONFIG_DEBUG_RWSEMS is not set
-+# CONFIG_DEBUG_SECTION_MISMATCH is not set
-+# CONFIG_DEBUG_SEMIHOSTING is not set
-+# CONFIG_DEBUG_SG is not set
-+# CONFIG_DEBUG_SHIRQ is not set
-+# CONFIG_DEBUG_SLAB is not set
-+# CONFIG_DEBUG_SPINLOCK is not set
-+# CONFIG_DEBUG_STACKOVERFLOW is not set
-+# CONFIG_DEBUG_STACK_USAGE is not set
-+# CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set
-+# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set
-+# CONFIG_DEBUG_TIMEKEEPING is not set
-+# CONFIG_DEBUG_UART_8250_PALMCHIP is not set
-+# CONFIG_DEBUG_UART_8250_WORD is not set
-+# CONFIG_DEBUG_UART_BCM63XX is not set
-+# CONFIG_DEBUG_UART_FLOW_CONTROL is not set
-+# CONFIG_DEBUG_USER is not set
-+# CONFIG_DEBUG_VIRTUAL is not set
-+# CONFIG_DEBUG_VM is not set
-+# CONFIG_DEBUG_VM_PGTABLE is not set
-+# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
-+# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
-+# CONFIG_DEBUG_WX is not set
-+# CONFIG_DEBUG_ZBOOT is not set
-+# CONFIG_DECNET is not set
-+CONFIG_DEFAULT_CUBIC=y
-+CONFIG_DEFAULT_DEADLINE=y
-+CONFIG_DEFAULT_HOSTNAME="(none)"
-+CONFIG_DEFAULT_INIT=""
-+CONFIG_DEFAULT_IOSCHED="deadline"
-+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
-+# CONFIG_DEFAULT_NOOP is not set
-+# CONFIG_DEFAULT_RENO is not set
-+CONFIG_DEFAULT_SECURITY=""
-+CONFIG_DEFAULT_SECURITY_DAC=y
-+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
-+CONFIG_DEFAULT_TCP_CONG="cubic"
-+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-+# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set
-+# CONFIG_DELL_LAPTOP is not set
-+# CONFIG_DELL_RBTN is not set
-+# CONFIG_DELL_SMBIOS is not set
-+# CONFIG_DELL_SMO8800 is not set
-+# CONFIG_DEPRECATED_PARAM_STRUCT is not set
-+# CONFIG_DETECT_HUNG_TASK is not set
-+# CONFIG_DEVKMEM is not set
-+# CONFIG_DEVMEM is not set
-+CONFIG_DEVPORT=y
-+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
-+# CONFIG_DEVTMPFS is not set
-+# CONFIG_DEVTMPFS_MOUNT is not set
-+# CONFIG_DEV_DAX is not set
-+# CONFIG_DGAP is not set
-+# CONFIG_DGNC is not set
-+# CONFIG_DHT11 is not set
-+# CONFIG_DISCONTIGMEM_MANUAL is not set
-+# CONFIG_DISPLAY_CONNECTOR_ANALOG_TV is not set
-+# CONFIG_DISPLAY_CONNECTOR_DVI is not set
-+# CONFIG_DISPLAY_CONNECTOR_HDMI is not set
-+# CONFIG_DISPLAY_ENCODER_TFP410 is not set
-+# CONFIG_DISPLAY_ENCODER_TPD12S015 is not set
-+# CONFIG_DISPLAY_PANEL_DPI is not set
-+# CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02 is not set
-+# CONFIG_DISPLAY_PANEL_TPO_TD028TTEC1 is not set
-+# CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1 is not set
-+# CONFIG_DL2K is not set
-+# CONFIG_DLHL60D is not set
-+# CONFIG_DLM is not set
-+# CONFIG_DM9000 is not set
-+# CONFIG_DMABUF_HEAPS is not set
-+# CONFIG_DMABUF_MOVE_NOTIFY is not set
-+# CONFIG_DMABUF_SELFTESTS is not set
-+# CONFIG_DMADEVICES is not set
-+# CONFIG_DMADEVICES_DEBUG is not set
-+# CONFIG_DMARD06 is not set
-+# CONFIG_DMARD09 is not set
-+# CONFIG_DMARD10 is not set
-+# CONFIG_DMASCC is not set
-+# CONFIG_DMATEST is not set
-+# CONFIG_DMA_API_DEBUG is not set
-+CONFIG_DMA_COHERENT_POOL=y
-+CONFIG_DMA_DECLARE_COHERENT=y
-+# CONFIG_DMA_ENGINE is not set
-+# CONFIG_DMA_FENCE_TRACE is not set
-+# CONFIG_DMA_JZ4780 is not set
-+CONFIG_DMA_NONCOHERENT_MMAP=y
-+# CONFIG_DMA_NOOP_OPS is not set
-+# CONFIG_DMA_SHARED_BUFFER is not set
-+# CONFIG_DMA_VIRT_OPS is not set
-+# CONFIG_DM_CACHE is not set
-+# CONFIG_DM_CLONE is not set
-+# CONFIG_DM_DEBUG is not set
-+# CONFIG_DM_DELAY is not set
-+# CONFIG_DM_DUST is not set
-+# CONFIG_DM_EBS is not set
-+# CONFIG_DM_ERA is not set
-+# CONFIG_DM_FLAKEY is not set
-+# CONFIG_DM_INTEGRITY is not set
-+# CONFIG_DM_LOG_USERSPACE is not set
-+# CONFIG_DM_LOG_WRITES is not set
-+# CONFIG_DM_MQ_DEFAULT is not set
-+# CONFIG_DM_MULTIPATH is not set
-+# CONFIG_DM_RAID is not set
-+# CONFIG_DM_SWITCH is not set
-+# CONFIG_DM_THIN_PROVISIONING is not set
-+# CONFIG_DM_UEVENT is not set
-+# CONFIG_DM_UNSTRIPED is not set
-+# CONFIG_DM_VERITY is not set
-+# CONFIG_DM_WRITECACHE is not set
-+# CONFIG_DM_ZERO is not set
-+# CONFIG_DNET is not set
-+# CONFIG_DNOTIFY is not set
-+# CONFIG_DNS_RESOLVER is not set
-+CONFIG_DOUBLEFAULT=y
-+# CONFIG_DP83822_PHY is not set
-+# CONFIG_DP83848_PHY is not set
-+# CONFIG_DP83867_PHY is not set
-+# CONFIG_DP83869_PHY is not set
-+# CONFIG_DP83TC811_PHY is not set
-+# CONFIG_DPOT_DAC is not set
-+# CONFIG_DPS310 is not set
-+CONFIG_DQL=y
-+# CONFIG_DRAGONRISE_FF is not set
-+# CONFIG_DRM is not set
-+# CONFIG_DRM_AMDGPU is not set
-+# CONFIG_DRM_AMDGPU_CIK is not set
-+# CONFIG_DRM_AMDGPU_GART_DEBUGFS is not set
-+# CONFIG_DRM_AMDGPU_SI is not set
-+# CONFIG_DRM_AMDGPU_USERPTR is not set
-+# CONFIG_DRM_AMD_ACP is not set
-+# CONFIG_DRM_AMD_DC_DCN2_0 is not set
-+# CONFIG_DRM_AMD_DC_DCN3_0 is not set
-+# CONFIG_DRM_AMD_DC_HDCP is not set
-+# CONFIG_DRM_AMD_DC_SI is not set
-+# CONFIG_DRM_ANALOGIX_ANX6345 is not set
-+# CONFIG_DRM_ANALOGIX_ANX78XX is not set
-+# CONFIG_DRM_ARCPGU is not set
-+# CONFIG_DRM_ARMADA is not set
-+# CONFIG_DRM_AST is not set
-+# CONFIG_DRM_BOCHS is not set
-+# CONFIG_DRM_CDNS_DSI is not set
-+# CONFIG_DRM_CDNS_MHDP8546 is not set
-+# CONFIG_DRM_CHRONTEL_CH7033 is not set
-+# CONFIG_DRM_CIRRUS_QEMU is not set
-+# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set
-+# CONFIG_DRM_DEBUG_MM is not set
-+# CONFIG_DRM_DEBUG_SELFTEST is not set
-+# CONFIG_DRM_DISPLAY_CONNECTOR is not set
-+# CONFIG_DRM_DP_AUX_CHARDEV is not set
-+# CONFIG_DRM_DP_CEC is not set
-+# CONFIG_DRM_DUMB_VGA_DAC is not set
-+# CONFIG_DRM_DW_HDMI_CEC is not set
-+# CONFIG_DRM_ETNAVIV is not set
-+# CONFIG_DRM_EXYNOS is not set
-+# CONFIG_DRM_FBDEV_EMULATION is not set
-+# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set
-+# CONFIG_DRM_FSL_DCU is not set
-+# CONFIG_DRM_GM12U320 is not set
-+# CONFIG_DRM_GMA500 is not set
-+# CONFIG_DRM_HDLCD is not set
-+# CONFIG_DRM_HISI_HIBMC is not set
-+# CONFIG_DRM_HISI_KIRIN is not set
-+# CONFIG_DRM_I2C_ADV7511 is not set
-+# CONFIG_DRM_I2C_CH7006 is not set
-+# CONFIG_DRM_I2C_NXP_TDA9950 is not set
-+# CONFIG_DRM_I2C_NXP_TDA998X is not set
-+# CONFIG_DRM_I2C_SIL164 is not set
-+# CONFIG_DRM_I915 is not set
-+# CONFIG_DRM_KOMEDA is not set
-+# CONFIG_DRM_LEGACY is not set
-+# CONFIG_DRM_LIB_RANDOM is not set
-+# CONFIG_DRM_LIMA is not set
-+# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
-+# CONFIG_DRM_LONTIUM_LT9611 is not set
-+# CONFIG_DRM_LVDS_CODEC is not set
-+# CONFIG_DRM_LVDS_ENCODER is not set
-+# CONFIG_DRM_MALI_DISPLAY is not set
-+# CONFIG_DRM_MCDE is not set
-+# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set
-+# CONFIG_DRM_MGAG200 is not set
-+# CONFIG_DRM_MXSFB is not set
-+# CONFIG_DRM_NOUVEAU is not set
-+# CONFIG_DRM_NWL_MIPI_DSI is not set
-+# CONFIG_DRM_NXP_PTN3460 is not set
-+# CONFIG_DRM_OMAP is not set
-+# CONFIG_DRM_PANEL_ARM_VERSATILE is not set
-+# CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set
-+# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set
-+# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set
-+# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set
-+# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set
-+# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set
-+# CONFIG_DRM_PANEL_LG_LB035Q02 is not set
-+# CONFIG_DRM_PANEL_LG_LG4573 is not set
-+# CONFIG_DRM_PANEL_LVDS is not set
-+# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set
-+# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set
-+# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set
-+# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set
-+# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set
-+# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set
-+# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set
-+# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set
-+# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set
-+# CONFIG_DRM_PANEL_ROCKTECH_JH057N00900 is not set
-+# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set
-+# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set
-+# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set
-+# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set
-+# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set
-+# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set
-+# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set
-+# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set
-+# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set
-+# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set
-+# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set
-+# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set
-+# CONFIG_DRM_PANEL_SIMPLE is not set
-+# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set
-+# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set
-+# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set
-+# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set
-+# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set
-+# CONFIG_DRM_PANEL_TPO_TPG110 is not set
-+# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set
-+# CONFIG_DRM_PANFROST is not set
-+# CONFIG_DRM_PARADE_PS8622 is not set
-+# CONFIG_DRM_PARADE_PS8640 is not set
-+# CONFIG_DRM_PL111 is not set
-+# CONFIG_DRM_QXL is not set
-+# CONFIG_DRM_RADEON is not set
-+# CONFIG_DRM_RADEON_USERPTR is not set
-+# CONFIG_DRM_RCAR_DW_HDMI is not set
-+# CONFIG_DRM_RCAR_LVDS is not set
-+# CONFIG_DRM_SII902X is not set
-+# CONFIG_DRM_SII9234 is not set
-+# CONFIG_DRM_SIL_SII8620 is not set
-+# CONFIG_DRM_SIMPLE_BRIDGE is not set
-+# CONFIG_DRM_STI is not set
-+# CONFIG_DRM_STM is not set
-+# CONFIG_DRM_SUN4I is not set
-+# CONFIG_DRM_THINE_THC63LVD1024 is not set
-+# CONFIG_DRM_TIDSS is not set
-+# CONFIG_DRM_TILCDC is not set
-+# CONFIG_DRM_TINYDRM is not set
-+# CONFIG_DRM_TI_SN65DSI86 is not set
-+# CONFIG_DRM_TI_TFP410 is not set
-+# CONFIG_DRM_TI_TPD12S015 is not set
-+# CONFIG_DRM_TOSHIBA_TC358762 is not set
-+# CONFIG_DRM_TOSHIBA_TC358764 is not set
-+# CONFIG_DRM_TOSHIBA_TC358767 is not set
-+# CONFIG_DRM_TOSHIBA_TC358768 is not set
-+# CONFIG_DRM_TOSHIBA_TC358775 is not set
-+# CONFIG_DRM_UDL is not set
-+# CONFIG_DRM_VBOXVIDEO is not set
-+# CONFIG_DRM_VC4_HDMI_CEC is not set
-+# CONFIG_DRM_VGEM is not set
-+# CONFIG_DRM_VIRTIO_GPU is not set
-+# CONFIG_DRM_VKMS is not set
-+# CONFIG_DRM_VMWGFX is not set
-+# CONFIG_DRM_XEN is not set
-+# CONFIG_DS1682 is not set
-+# CONFIG_DS1803 is not set
-+# CONFIG_DS4424 is not set
-+# CONFIG_DST_CACHE is not set
-+# CONFIG_DTLK is not set
-+# CONFIG_DUMMY is not set
-+CONFIG_DUMMY_CONSOLE_COLUMNS=80
-+CONFIG_DUMMY_CONSOLE_ROWS=25
-+# CONFIG_DUMMY_IRQ is not set
-+# CONFIG_DVB_A8293 is not set
-+# CONFIG_DVB_AF9013 is not set
-+# CONFIG_DVB_AF9033 is not set
-+# CONFIG_DVB_AS102 is not set
-+# CONFIG_DVB_ASCOT2E is not set
-+# CONFIG_DVB_ATBM8830 is not set
-+# CONFIG_DVB_AU8522_DTV is not set
-+# CONFIG_DVB_AU8522_V4L is not set
-+# CONFIG_DVB_B2C2_FLEXCOP_USB is not set
-+# CONFIG_DVB_BCM3510 is not set
-+# CONFIG_DVB_CORE is not set
-+# CONFIG_DVB_CX22700 is not set
-+# CONFIG_DVB_CX22702 is not set
-+# CONFIG_DVB_CX24110 is not set
-+# CONFIG_DVB_CX24116 is not set
-+# CONFIG_DVB_CX24117 is not set
-+# CONFIG_DVB_CX24120 is not set
-+# CONFIG_DVB_CX24123 is not set
-+# CONFIG_DVB_CXD2099 is not set
-+# CONFIG_DVB_CXD2820R is not set
-+# CONFIG_DVB_CXD2841ER is not set
-+# CONFIG_DVB_CXD2880 is not set
-+# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set
-+# CONFIG_DVB_DIB3000MB is not set
-+# CONFIG_DVB_DIB3000MC is not set
-+# CONFIG_DVB_DIB7000M is not set
-+# CONFIG_DVB_DIB7000P is not set
-+# CONFIG_DVB_DIB8000 is not set
-+# CONFIG_DVB_DIB9000 is not set
-+# CONFIG_DVB_DRX39XYJ is not set
-+# CONFIG_DVB_DRXD is not set
-+# CONFIG_DVB_DRXK is not set
-+# CONFIG_DVB_DS3000 is not set
-+# CONFIG_DVB_DUMMY_FE is not set
-+# CONFIG_DVB_DYNAMIC_MINORS is not set
-+# CONFIG_DVB_EC100 is not set
-+# CONFIG_DVB_FIREDTV is not set
-+# CONFIG_DVB_HELENE is not set
-+# CONFIG_DVB_HORUS3A is not set
-+# CONFIG_DVB_ISL6405 is not set
-+# CONFIG_DVB_ISL6421 is not set
-+# CONFIG_DVB_ISL6423 is not set
-+# CONFIG_DVB_IX2505V is not set
-+# CONFIG_DVB_L64781 is not set
-+# CONFIG_DVB_LG2160 is not set
-+# CONFIG_DVB_LGDT3305 is not set
-+# CONFIG_DVB_LGDT3306A is not set
-+# CONFIG_DVB_LGDT330X is not set
-+# CONFIG_DVB_LGS8GL5 is not set
-+# CONFIG_DVB_LGS8GXX is not set
-+# CONFIG_DVB_LNBH25 is not set
-+# CONFIG_DVB_LNBH29 is not set
-+# CONFIG_DVB_LNBP21 is not set
-+# CONFIG_DVB_LNBP22 is not set
-+# CONFIG_DVB_M88DS3103 is not set
-+# CONFIG_DVB_M88RS2000 is not set
-+CONFIG_DVB_MAX_ADAPTERS=16
-+# CONFIG_DVB_MB86A16 is not set
-+# CONFIG_DVB_MB86A20S is not set
-+# CONFIG_DVB_MMAP is not set
-+# CONFIG_DVB_MN88443X is not set
-+# CONFIG_DVB_MN88472 is not set
-+# CONFIG_DVB_MN88473 is not set
-+# CONFIG_DVB_MT312 is not set
-+# CONFIG_DVB_MT352 is not set
-+# CONFIG_DVB_MXL5XX is not set
-+# CONFIG_DVB_NET is not set
-+# CONFIG_DVB_NXT200X is not set
-+# CONFIG_DVB_NXT6000 is not set
-+# CONFIG_DVB_OR51132 is not set
-+# CONFIG_DVB_OR51211 is not set
-+# CONFIG_DVB_PLATFORM_DRIVERS is not set
-+# CONFIG_DVB_PLL is not set
-+# CONFIG_DVB_RTL2830 is not set
-+# CONFIG_DVB_RTL2832 is not set
-+# CONFIG_DVB_RTL2832_SDR is not set
-+# CONFIG_DVB_S5H1409 is not set
-+# CONFIG_DVB_S5H1411 is not set
-+# CONFIG_DVB_S5H1420 is not set
-+# CONFIG_DVB_S5H1432 is not set
-+# CONFIG_DVB_S921 is not set
-+# CONFIG_DVB_SI2165 is not set
-+# CONFIG_DVB_SI2168 is not set
-+# CONFIG_DVB_SI21XX is not set
-+# CONFIG_DVB_SP2 is not set
-+# CONFIG_DVB_SP8870 is not set
-+# CONFIG_DVB_SP887X is not set
-+# CONFIG_DVB_STB0899 is not set
-+# CONFIG_DVB_STB6000 is not set
-+# CONFIG_DVB_STB6100 is not set
-+# CONFIG_DVB_STV0288 is not set
-+# CONFIG_DVB_STV0297 is not set
-+# CONFIG_DVB_STV0299 is not set
-+# CONFIG_DVB_STV0367 is not set
-+# CONFIG_DVB_STV0900 is not set
-+# CONFIG_DVB_STV090x is not set
-+# CONFIG_DVB_STV0910 is not set
-+# CONFIG_DVB_STV6110 is not set
-+# CONFIG_DVB_STV6110x is not set
-+# CONFIG_DVB_STV6111 is not set
-+# CONFIG_DVB_TC90522 is not set
-+# CONFIG_DVB_TDA10021 is not set
-+# CONFIG_DVB_TDA10023 is not set
-+# CONFIG_DVB_TDA10048 is not set
-+# CONFIG_DVB_TDA1004X is not set
-+# CONFIG_DVB_TDA10071 is not set
-+# CONFIG_DVB_TDA10086 is not set
-+# CONFIG_DVB_TDA18271C2DD is not set
-+# CONFIG_DVB_TDA665x is not set
-+# CONFIG_DVB_TDA8083 is not set
-+# CONFIG_DVB_TDA8261 is not set
-+# CONFIG_DVB_TDA826X is not set
-+# CONFIG_DVB_TEST_DRIVERS is not set
-+# CONFIG_DVB_TS2020 is not set
-+# CONFIG_DVB_TTUSB_BUDGET is not set
-+# CONFIG_DVB_TTUSB_DEC is not set
-+# CONFIG_DVB_TUA6100 is not set
-+# CONFIG_DVB_TUNER_CX24113 is not set
-+# CONFIG_DVB_TUNER_DIB0070 is not set
-+# CONFIG_DVB_TUNER_DIB0090 is not set
-+# CONFIG_DVB_TUNER_ITD1000 is not set
-+# CONFIG_DVB_ULE_DEBUG is not set
-+# CONFIG_DVB_USB_V2 is not set
-+# CONFIG_DVB_VES1820 is not set
-+# CONFIG_DVB_VES1X93 is not set
-+# CONFIG_DVB_ZD1301_DEMOD is not set
-+# CONFIG_DVB_ZL10036 is not set
-+# CONFIG_DVB_ZL10039 is not set
-+# CONFIG_DVB_ZL10353 is not set
-+# CONFIG_DWC_XLGMAC is not set
-+# CONFIG_DWMAC_DWC_QOS_ETH is not set
-+# CONFIG_DWMAC_INTEL_PLAT is not set
-+# CONFIG_DWMAC_IPQ806X is not set
-+# CONFIG_DWMAC_LPC18XX is not set
-+# CONFIG_DWMAC_MESON is not set
-+# CONFIG_DWMAC_ROCKCHIP is not set
-+# CONFIG_DWMAC_SOCFPGA is not set
-+# CONFIG_DWMAC_STI is not set
-+# CONFIG_DW_AXI_DMAC is not set
-+# CONFIG_DW_DMAC is not set
-+# CONFIG_DW_DMAC_PCI is not set
-+# CONFIG_DW_EDMA is not set
-+# CONFIG_DW_EDMA_PCIE is not set
-+# CONFIG_DW_WATCHDOG is not set
-+# CONFIG_DYNAMIC_DEBUG is not set
-+CONFIG_DYNAMIC_DEBUG_CORE=y
-+# CONFIG_E100 is not set
-+# CONFIG_E1000 is not set
-+# CONFIG_E1000E is not set
-+# CONFIG_E1000E_HWTS is not set
-+# CONFIG_EARLY_PRINTK_8250 is not set
-+# CONFIG_EARLY_PRINTK_USB_XDBC is not set
-+# CONFIG_EBC_C384_WDT is not set
-+# CONFIG_ECHO is not set
-+# CONFIG_ECRYPT_FS is not set
-+# CONFIG_EDAC is not set
-+# CONFIG_EEEPC_LAPTOP is not set
-+# CONFIG_EEPROM_93CX6 is not set
-+# CONFIG_EEPROM_93XX46 is not set
-+# CONFIG_EEPROM_AT24 is not set
-+# CONFIG_EEPROM_AT25 is not set
-+# CONFIG_EEPROM_DIGSY_MTC_CFG is not set
-+# CONFIG_EEPROM_EE1004 is not set
-+# CONFIG_EEPROM_IDT_89HPESX is not set
-+# CONFIG_EEPROM_LEGACY is not set
-+# CONFIG_EEPROM_MAX6875 is not set
-+# CONFIG_EFI is not set
-+CONFIG_EFI_PARTITION=y
-+# CONFIG_EFS_FS is not set
-+CONFIG_ELFCORE=y
-+# CONFIG_ELF_CORE is not set
-+# CONFIG_EMAC_ROCKCHIP is not set
-+CONFIG_EMBEDDED=y
-+# CONFIG_EM_TIMER_STI is not set
-+# CONFIG_ENABLE_MUST_CHECK is not set
-+CONFIG_ENABLE_WARN_DEPRECATED=y
-+# CONFIG_ENA_ETHERNET is not set
-+# CONFIG_ENC28J60 is not set
-+# CONFIG_ENCLOSURE_SERVICES is not set
-+# CONFIG_ENCRYPTED_KEYS is not set
-+# CONFIG_ENCX24J600 is not set
-+# CONFIG_ENERGY_MODEL is not set
-+# CONFIG_ENIC is not set
-+# CONFIG_ENVELOPE_DETECTOR is not set
-+# CONFIG_EPAPR_PARAVIRT is not set
-+# CONFIG_EPIC100 is not set
-+CONFIG_EPOLL=y
-+# CONFIG_EQUALIZER is not set
-+# CONFIG_EROFS_FS is not set
-+# CONFIG_ET131X is not set
-+CONFIG_ETHERNET=y
-+# CONFIG_ETHOC is not set
-+# CONFIG_ETHTOOL_NETLINK is not set
-+CONFIG_EVENTFD=y
-+# CONFIG_EVM is not set
-+# CONFIG_EXFAT_FS is not set
-+CONFIG_EXPERT=y
-+CONFIG_EXPORTFS=y
-+# CONFIG_EXPORTFS_BLOCK_OPS is not set
-+# CONFIG_EXT2_FS is not set
-+CONFIG_EXT2_FS_XATTR=y
-+# CONFIG_EXT3_FS is not set
-+# CONFIG_EXT4_DEBUG is not set
-+# CONFIG_EXT4_ENCRYPTION is not set
-+# CONFIG_EXT4_FS is not set
-+# CONFIG_EXT4_FS_POSIX_ACL is not set
-+# CONFIG_EXT4_FS_SECURITY is not set
-+CONFIG_EXT4_USE_FOR_EXT2=y
-+# CONFIG_EXTCON is not set
-+# CONFIG_EXTCON_ADC_JACK is not set
-+# CONFIG_EXTCON_ARIZONA is not set
-+# CONFIG_EXTCON_AXP288 is not set
-+# CONFIG_EXTCON_FSA9480 is not set
-+# CONFIG_EXTCON_GPIO is not set
-+# CONFIG_EXTCON_INTEL_INT3496 is not set
-+# CONFIG_EXTCON_MAX3355 is not set
-+# CONFIG_EXTCON_PTN5150 is not set
-+# CONFIG_EXTCON_QCOM_SPMI_MISC is not set
-+# CONFIG_EXTCON_RT8973A is not set
-+# CONFIG_EXTCON_SM5502 is not set
-+# CONFIG_EXTCON_USB_GPIO is not set
-+CONFIG_EXTRA_FIRMWARE=""
-+CONFIG_EXTRA_TARGETS=""
-+# CONFIG_EXYNOS_ADC is not set
-+# CONFIG_EXYNOS_VIDEO is not set
-+# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set
-+# CONFIG_EZX_PCAP is not set
-+# CONFIG_F2FS_CHECK_FS is not set
-+# CONFIG_F2FS_FAULT_INJECTION is not set
-+# CONFIG_F2FS_FS is not set
-+# CONFIG_F2FS_FS_COMPRESSION is not set
-+# CONFIG_F2FS_FS_ENCRYPTION is not set
-+# CONFIG_F2FS_FS_POSIX_ACL is not set
-+# CONFIG_F2FS_FS_SECURITY is not set
-+CONFIG_F2FS_FS_XATTR=y
-+# CONFIG_F2FS_IO_TRACE is not set
-+CONFIG_F2FS_STAT_FS=y
-+# CONFIG_FAILOVER is not set
-+# CONFIG_FAIR_GROUP_SCHED is not set
-+# CONFIG_FANOTIFY is not set
-+# CONFIG_FANOTIFY_ACCESS_PERMISSIONS is not set
-+CONFIG_FAT_DEFAULT_CODEPAGE=437
-+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
-+# CONFIG_FAT_DEFAULT_UTF8 is not set
-+# CONFIG_FAT_FS is not set
-+# CONFIG_FAULT_INJECTION is not set
-+# CONFIG_FB is not set
-+# CONFIG_FB_3DFX is not set
-+# CONFIG_FB_ARC is not set
-+# CONFIG_FB_ARK is not set
-+# CONFIG_FB_ARMCLCD is not set
-+# CONFIG_FB_ASILIANT is not set
-+# CONFIG_FB_ATY is not set
-+# CONFIG_FB_ATY128 is not set
-+# CONFIG_FB_AUO_K190X is not set
-+# CONFIG_FB_BACKLIGHT is not set
-+# CONFIG_FB_BIG_ENDIAN is not set
-+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
-+# CONFIG_FB_BOTH_ENDIAN is not set
-+# CONFIG_FB_BROADSHEET is not set
-+# CONFIG_FB_CARMINE is not set
-+# CONFIG_FB_CFB_COPYAREA is not set
-+# CONFIG_FB_CFB_FILLRECT is not set
-+# CONFIG_FB_CFB_IMAGEBLIT is not set
-+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
-+# CONFIG_FB_CIRRUS is not set
-+# CONFIG_FB_CYBER2000 is not set
-+# CONFIG_FB_DA8XX is not set
-+# CONFIG_FB_DDC is not set
-+# CONFIG_FB_FLEX is not set
-+# CONFIG_FB_FOREIGN_ENDIAN is not set
-+# CONFIG_FB_GEODE is not set
-+# CONFIG_FB_GOLDFISH is not set
-+# CONFIG_FB_HGA is not set
-+# CONFIG_FB_I740 is not set
-+# CONFIG_FB_IBM_GXT4500 is not set
-+# CONFIG_FB_IMSTT is not set
-+# CONFIG_FB_IMX is not set
-+# CONFIG_FB_KYRO is not set
-+# CONFIG_FB_LE80578 is not set
-+# CONFIG_FB_LITTLE_ENDIAN is not set
-+# CONFIG_FB_MACMODES is not set
-+# CONFIG_FB_MATROX is not set
-+# CONFIG_FB_MB862XX is not set
-+# CONFIG_FB_METRONOME is not set
-+# CONFIG_FB_MODE_HELPERS is not set
-+# CONFIG_FB_MXS is not set
-+# CONFIG_FB_N411 is not set
-+# CONFIG_FB_NEOMAGIC is not set
-+CONFIG_FB_NOTIFY=y
-+# CONFIG_FB_NVIDIA is not set
-+# CONFIG_FB_OF is not set
-+# CONFIG_FB_OMAP2 is not set
-+# CONFIG_FB_OPENCORES is not set
-+# CONFIG_FB_PM2 is not set
-+# CONFIG_FB_PM3 is not set
-+# CONFIG_FB_PS3 is not set
-+# CONFIG_FB_PXA is not set
-+# CONFIG_FB_RADEON is not set
-+# CONFIG_FB_RIVA is not set
-+# CONFIG_FB_S1D13XXX is not set
-+# CONFIG_FB_S3 is not set
-+# CONFIG_FB_SAVAGE is not set
-+# CONFIG_FB_SIMPLE is not set
-+# CONFIG_FB_SIS is not set
-+# CONFIG_FB_SM712 is not set
-+# CONFIG_FB_SM750 is not set
-+# CONFIG_FB_SMSCUFX is not set
-+# CONFIG_FB_SSD1307 is not set
-+# CONFIG_FB_SVGALIB is not set
-+# CONFIG_FB_SYS_COPYAREA is not set
-+# CONFIG_FB_SYS_FILLRECT is not set
-+# CONFIG_FB_SYS_FOPS is not set
-+# CONFIG_FB_SYS_IMAGEBLIT is not set
-+# CONFIG_FB_TFT is not set
-+# CONFIG_FB_TFT_AGM1264K_FL is not set
-+# CONFIG_FB_TFT_BD663474 is not set
-+# CONFIG_FB_TFT_FBTFT_DEVICE is not set
-+# CONFIG_FB_TFT_HX8340BN is not set
-+# CONFIG_FB_TFT_HX8347D is not set
-+# CONFIG_FB_TFT_HX8353D is not set
-+# CONFIG_FB_TFT_HX8357D is not set
-+# CONFIG_FB_TFT_ILI9163 is not set
-+# CONFIG_FB_TFT_ILI9320 is not set
-+# CONFIG_FB_TFT_ILI9325 is not set
-+# CONFIG_FB_TFT_ILI9340 is not set
-+# CONFIG_FB_TFT_ILI9341 is not set
-+# CONFIG_FB_TFT_ILI9481 is not set
-+# CONFIG_FB_TFT_ILI9486 is not set
-+# CONFIG_FB_TFT_PCD8544 is not set
-+# CONFIG_FB_TFT_RA8875 is not set
-+# CONFIG_FB_TFT_S6D02A1 is not set
-+# CONFIG_FB_TFT_S6D1121 is not set
-+# CONFIG_FB_TFT_SEPS525 is not set
-+# CONFIG_FB_TFT_SH1106 is not set
-+# CONFIG_FB_TFT_SSD1289 is not set
-+# CONFIG_FB_TFT_SSD1305 is not set
-+# CONFIG_FB_TFT_SSD1306 is not set
-+# CONFIG_FB_TFT_SSD1325 is not set
-+# CONFIG_FB_TFT_SSD1331 is not set
-+# CONFIG_FB_TFT_SSD1351 is not set
-+# CONFIG_FB_TFT_ST7735R is not set
-+# CONFIG_FB_TFT_ST7789V is not set
-+# CONFIG_FB_TFT_TINYLCD is not set
-+# CONFIG_FB_TFT_TLS8204 is not set
-+# CONFIG_FB_TFT_UC1611 is not set
-+# CONFIG_FB_TFT_UC1701 is not set
-+# CONFIG_FB_TFT_UPD161704 is not set
-+# CONFIG_FB_TFT_WATTEROTT is not set
-+# CONFIG_FB_TILEBLITTING is not set
-+# CONFIG_FB_TMIO is not set
-+# CONFIG_FB_TRIDENT is not set
-+# CONFIG_FB_UDL is not set
-+# CONFIG_FB_UVESA is not set
-+# CONFIG_FB_VGA16 is not set
-+# CONFIG_FB_VIA is not set
-+# CONFIG_FB_VIRTUAL is not set
-+# CONFIG_FB_VOODOO1 is not set
-+# CONFIG_FB_VT8623 is not set
-+# CONFIG_FB_XGI is not set
-+# CONFIG_FCOE is not set
-+# CONFIG_FCOE_FNIC is not set
-+# CONFIG_FDDI is not set
-+# CONFIG_FEALNX is not set
-+# CONFIG_FENCE_TRACE is not set
-+# CONFIG_FHANDLE is not set
-+CONFIG_FIB_RULES=y
-+# CONFIG_FIELDBUS_DEV is not set
-+CONFIG_FILE_LOCKING=y
-+# CONFIG_FIND_BIT_BENCHMARK is not set
-+# CONFIG_FIREWIRE is not set
-+# CONFIG_FIREWIRE_NOSY is not set
-+# CONFIG_FIREWIRE_SERIAL is not set
-+# CONFIG_FIRMWARE_EDID is not set
-+# CONFIG_FIRMWARE_IN_KERNEL is not set
-+# CONFIG_FIRMWARE_MEMMAP is not set
-+# CONFIG_FIT_PARTITION is not set
-+# CONFIG_FIXED_PHY is not set
-+CONFIG_FLATMEM=y
-+CONFIG_FLATMEM_MANUAL=y
-+CONFIG_FLAT_NODE_MEM_MAP=y
-+# CONFIG_FM10K is not set
-+# CONFIG_FMC is not set
-+# CONFIG_FONTS is not set
-+# CONFIG_FONT_6x8 is not set
-+# CONFIG_FONT_TER16x32 is not set
-+# CONFIG_FORCEDETH is not set
-+CONFIG_FORCE_MAX_ZONEORDER=11
-+CONFIG_FORTIFY_SOURCE=y
-+# CONFIG_FPGA is not set
-+# CONFIG_FRAMEBUFFER_CONSOLE is not set
-+# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set
-+# CONFIG_FRAME_POINTER is not set
-+CONFIG_FRAME_WARN=1024
-+# CONFIG_FREEZER is not set
-+# CONFIG_FRONTSWAP is not set
-+# CONFIG_FSCACHE is not set
-+# CONFIG_FSI is not set
-+# CONFIG_FSL_EDMA is not set
-+# CONFIG_FSL_ERRATUM_A008585 is not set
-+# CONFIG_FSL_MC_BUS is not set
-+# CONFIG_FSL_PQ_MDIO is not set
-+# CONFIG_FSL_QDMA is not set
-+# CONFIG_FSL_RCPM is not set
-+# CONFIG_FSL_XGMAC_MDIO is not set
-+CONFIG_FSNOTIFY=y
-+# CONFIG_FS_DAX is not set
-+# CONFIG_FS_ENCRYPTION is not set
-+# CONFIG_FS_POSIX_ACL is not set
-+# CONFIG_FS_VERITY is not set
-+# CONFIG_FTGMAC100 is not set
-+# CONFIG_FTL is not set
-+# CONFIG_FTMAC100 is not set
-+# CONFIG_FTRACE is not set
-+# CONFIG_FTRACE_STARTUP_TEST is not set
-+# CONFIG_FTR_FIXUP_SELFTEST is not set
-+# CONFIG_FTWDT010_WATCHDOG is not set
-+# CONFIG_FUJITSU_ES is not set
-+# CONFIG_FUJITSU_LAPTOP is not set
-+# CONFIG_FUJITSU_TABLET is not set
-+# CONFIG_FUNCTION_TRACER is not set
-+# CONFIG_FUSE_FS is not set
-+# CONFIG_FUSION is not set
-+# CONFIG_FUSION_FC is not set
-+# CONFIG_FUSION_SAS is not set
-+# CONFIG_FUSION_SPI is not set
-+CONFIG_FUTEX=y
-+CONFIG_FUTEX_PI=y
-+# CONFIG_FW_CFG_SYSFS is not set
-+CONFIG_FW_LOADER=y
-+# CONFIG_FW_LOADER_COMPRESS is not set
-+CONFIG_FW_LOADER_USER_HELPER=y
-+CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
-+# CONFIG_FXAS21002C is not set
-+# CONFIG_FXOS8700_I2C is not set
-+# CONFIG_FXOS8700_SPI is not set
-+CONFIG_GACT_PROB=y
-+# CONFIG_GADGET_UAC1 is not set
-+# CONFIG_GAMEPORT is not set
-+# CONFIG_GATEWORKS_GW16083 is not set
-+# CONFIG_GCC_PLUGINS is not set
-+# CONFIG_GCOV is not set
-+# CONFIG_GCOV_KERNEL is not set
-+# CONFIG_GDB_SCRIPTS is not set
-+# CONFIG_GEMINI_ETHERNET is not set
-+# CONFIG_GENERIC_ADC_BATTERY is not set
-+# CONFIG_GENERIC_ADC_THERMAL is not set
-+CONFIG_GENERIC_CALIBRATE_DELAY=y
-+# CONFIG_GENERIC_CPU_DEVICES is not set
-+CONFIG_GENERIC_HWEIGHT=y
-+# CONFIG_GENERIC_IRQ_DEBUGFS is not set
-+CONFIG_GENERIC_IRQ_IPI=y
-+CONFIG_GENERIC_IRQ_PROBE=y
-+CONFIG_GENERIC_NET_UTILS=y
-+# CONFIG_GENERIC_PHY is not set
-+CONFIG_GENERIC_PTDUMP=y
-+CONFIG_GENERIC_VDSO_TIME_NS=y
-+# CONFIG_GENEVE is not set
-+# CONFIG_GENWQE is not set
-+# CONFIG_GFS2_FS is not set
-+# CONFIG_GIGASET_CAPI is not set
-+# CONFIG_GIGASET_DEBUG is not set
-+# CONFIG_GIGASET_DUMMYLL is not set
-+# CONFIG_GLOB_SELFTEST is not set
-+# CONFIG_GNSS is not set
-+# CONFIG_GOLDFISH is not set
-+# CONFIG_GOOGLE_FIRMWARE is not set
-+# CONFIG_GP2AP002 is not set
-+# CONFIG_GP2AP020A00F is not set
-+# CONFIG_GPD_POCKET_FAN is not set
-+# CONFIG_GPIOLIB is not set
-+CONFIG_GPIOLIB_FASTPATH_LIMIT=512
-+# CONFIG_GPIO_104_DIO_48E is not set
-+# CONFIG_GPIO_104_IDIO_16 is not set
-+# CONFIG_GPIO_104_IDI_48 is not set
-+# CONFIG_GPIO_74X164 is not set
-+# CONFIG_GPIO_74XX_MMIO is not set
-+# CONFIG_GPIO_ADNP is not set
-+# CONFIG_GPIO_ADP5588 is not set
-+# CONFIG_GPIO_AGGREGATOR is not set
-+# CONFIG_GPIO_ALTERA is not set
-+# CONFIG_GPIO_AMD8111 is not set
-+# CONFIG_GPIO_AMDPT is not set
-+# CONFIG_GPIO_AMD_FCH is not set
-+# CONFIG_GPIO_BCM_KONA is not set
-+# CONFIG_GPIO_BT8XX is not set
-+# CONFIG_GPIO_CADENCE is not set
-+# CONFIG_GPIO_CDEV is not set
-+# CONFIG_GPIO_CS5535 is not set
-+# CONFIG_GPIO_DWAPB is not set
-+# CONFIG_GPIO_EM is not set
-+# CONFIG_GPIO_EXAR is not set
-+# CONFIG_GPIO_F7188X is not set
-+# CONFIG_GPIO_FTGPIO010 is not set
-+# CONFIG_GPIO_GENERIC_PLATFORM is not set
-+# CONFIG_GPIO_GPIO_MM is not set
-+# CONFIG_GPIO_GRGPIO is not set
-+# CONFIG_GPIO_GW_PLD is not set
-+# CONFIG_GPIO_HLWD is not set
-+# CONFIG_GPIO_ICH is not set
-+# CONFIG_GPIO_IT87 is not set
-+# CONFIG_GPIO_LOGICVC is not set
-+# CONFIG_GPIO_LYNXPOINT is not set
-+# CONFIG_GPIO_MAX3191X is not set
-+# CONFIG_GPIO_MAX7300 is not set
-+# CONFIG_GPIO_MAX7301 is not set
-+# CONFIG_GPIO_MAX732X is not set
-+# CONFIG_GPIO_MB86S7X is not set
-+# CONFIG_GPIO_MC33880 is not set
-+# CONFIG_GPIO_MCP23S08 is not set
-+# CONFIG_GPIO_ML_IOH is not set
-+# CONFIG_GPIO_MOCKUP is not set
-+# CONFIG_GPIO_MPC8XXX is not set
-+# CONFIG_GPIO_PCA953X is not set
-+# CONFIG_GPIO_PCA953X_IRQ is not set
-+# CONFIG_GPIO_PCA9570 is not set
-+# CONFIG_GPIO_PCF857X is not set
-+# CONFIG_GPIO_PCH is not set
-+# CONFIG_GPIO_PCIE_IDIO_24 is not set
-+# CONFIG_GPIO_PCI_IDIO_16 is not set
-+# CONFIG_GPIO_PISOSR is not set
-+# CONFIG_GPIO_PL061 is not set
-+# CONFIG_GPIO_RCAR is not set
-+# CONFIG_GPIO_RDC321X is not set
-+# CONFIG_GPIO_SAMA5D2_PIOBU is not set
-+# CONFIG_GPIO_SCH is not set
-+# CONFIG_GPIO_SCH311X is not set
-+# CONFIG_GPIO_SIFIVE is not set
-+# CONFIG_GPIO_SX150X is not set
-+# CONFIG_GPIO_SYSCON is not set
-+CONFIG_GPIO_SYSFS=y
-+# CONFIG_GPIO_TPIC2810 is not set
-+# CONFIG_GPIO_TS4900 is not set
-+# CONFIG_GPIO_TS5500 is not set
-+# CONFIG_GPIO_VX855 is not set
-+# CONFIG_GPIO_WATCHDOG is not set
-+# CONFIG_GPIO_WINBOND is not set
-+# CONFIG_GPIO_WS16C48 is not set
-+# CONFIG_GPIO_XGENE is not set
-+# CONFIG_GPIO_XILINX is not set
-+# CONFIG_GPIO_XRA1403 is not set
-+# CONFIG_GPIO_ZEVIO is not set
-+# CONFIG_GPIO_ZX is not set
-+# CONFIG_GREENASIA_FF is not set
-+# CONFIG_GREYBUS is not set
-+# CONFIG_GS_FPGABOOT is not set
-+# CONFIG_GTP is not set
-+# CONFIG_GUP_BENCHMARK is not set
-+# CONFIG_GVE is not set
-+# CONFIG_HABANA_AI is not set
-+# CONFIG_HAMACHI is not set
-+# CONFIG_HAMRADIO is not set
-+# CONFIG_HAPPYMEAL is not set
-+CONFIG_HARDENED_USERCOPY=y
-+# CONFIG_HARDENED_USERCOPY_FALLBACK is not set
-+# CONFIG_HARDENED_USERCOPY_PAGESPAN is not set
-+CONFIG_HARDEN_EL2_VECTORS=y
-+# CONFIG_HARDLOCKUP_DETECTOR is not set
-+# CONFIG_HCALL_STATS is not set
-+# CONFIG_HDC100X is not set
-+# CONFIG_HDC2010 is not set
-+# CONFIG_HDLC is not set
-+# CONFIG_HDLC_CISCO is not set
-+# CONFIG_HDLC_FR is not set
-+# CONFIG_HDLC_PPP is not set
-+# CONFIG_HDLC_RAW is not set
-+# CONFIG_HDLC_RAW_ETH is not set
-+# CONFIG_HDMI_LPE_AUDIO is not set
-+# CONFIG_HDQ_MASTER_OMAP is not set
-+# CONFIG_HEADERS_CHECK is not set
-+# CONFIG_HEADERS_INSTALL is not set
-+# CONFIG_HEADER_TEST is not set
-+# CONFIG_HERMES is not set
-+# CONFIG_HFSPLUS_FS is not set
-+# CONFIG_HFSPLUS_FS_POSIX_ACL is not set
-+# CONFIG_HFS_FS is not set
-+# CONFIG_HFS_FS_POSIX_ACL is not set
-+# CONFIG_HI8435 is not set
-+# CONFIG_HIBERNATION is not set
-+# CONFIG_HID is not set
-+# CONFIG_HIDRAW is not set
-+# CONFIG_HID_A4TECH is not set
-+# CONFIG_HID_ACCUTOUCH is not set
-+# CONFIG_HID_ACRUX is not set
-+# CONFIG_HID_ACRUX_FF is not set
-+# CONFIG_HID_ALPS is not set
-+# CONFIG_HID_APPLE is not set
-+# CONFIG_HID_APPLEIR is not set
-+# CONFIG_HID_ASUS is not set
-+# CONFIG_HID_AUREAL is not set
-+# CONFIG_HID_BATTERY_STRENGTH is not set
-+# CONFIG_HID_BELKIN is not set
-+# CONFIG_HID_BETOP_FF is not set
-+# CONFIG_HID_BIGBEN_FF is not set
-+# CONFIG_HID_CHERRY is not set
-+# CONFIG_HID_CHICONY is not set
-+# CONFIG_HID_CMEDIA is not set
-+# CONFIG_HID_CORSAIR is not set
-+# CONFIG_HID_COUGAR is not set
-+# CONFIG_HID_CP2112 is not set
-+# CONFIG_HID_CREATIVE_SB0540 is not set
-+# CONFIG_HID_CYPRESS is not set
-+# CONFIG_HID_DRAGONRISE is not set
-+# CONFIG_HID_ELAN is not set
-+# CONFIG_HID_ELECOM is not set
-+# CONFIG_HID_ELO is not set
-+# CONFIG_HID_EMS_FF is not set
-+# CONFIG_HID_EZKEY is not set
-+# CONFIG_HID_GEMBIRD is not set
-+# CONFIG_HID_GENERIC is not set
-+# CONFIG_HID_GFRM is not set
-+# CONFIG_HID_GLORIOUS is not set
-+# CONFIG_HID_GOOGLE_HAMMER is not set
-+# CONFIG_HID_GREENASIA is not set
-+# CONFIG_HID_GT683R is not set
-+# CONFIG_HID_GYRATION is not set
-+# CONFIG_HID_HOLTEK is not set
-+# CONFIG_HID_ICADE is not set
-+# CONFIG_HID_ITE is not set
-+# CONFIG_HID_JABRA is not set
-+# CONFIG_HID_KENSINGTON is not set
-+# CONFIG_HID_KEYTOUCH is not set
-+# CONFIG_HID_KYE is not set
-+# CONFIG_HID_LCPOWER is not set
-+# CONFIG_HID_LED is not set
-+# CONFIG_HID_LENOVO is not set
-+# CONFIG_HID_LOGITECH is not set
-+# CONFIG_HID_LOGITECH_DJ is not set
-+# CONFIG_HID_LOGITECH_HIDPP is not set
-+# CONFIG_HID_MACALLY is not set
-+# CONFIG_HID_MAGICMOUSE is not set
-+# CONFIG_HID_MALTRON is not set
-+# CONFIG_HID_MAYFLASH is not set
-+# CONFIG_HID_MCP2221 is not set
-+# CONFIG_HID_MICROSOFT is not set
-+# CONFIG_HID_MONTEREY is not set
-+# CONFIG_HID_MULTITOUCH is not set
-+# CONFIG_HID_NTI is not set
-+# CONFIG_HID_NTRIG is not set
-+# CONFIG_HID_ORTEK is not set
-+# CONFIG_HID_PANTHERLORD is not set
-+# CONFIG_HID_PENMOUNT is not set
-+# CONFIG_HID_PETALYNX is not set
-+# CONFIG_HID_PICOLCD is not set
-+# CONFIG_HID_PID is not set
-+# CONFIG_HID_PLANTRONICS is not set
-+# CONFIG_HID_PRIMAX is not set
-+# CONFIG_HID_PRODIKEYS is not set
-+# CONFIG_HID_REDRAGON is not set
-+# CONFIG_HID_RETRODE is not set
-+# CONFIG_HID_RMI is not set
-+# CONFIG_HID_ROCCAT is not set
-+# CONFIG_HID_SAITEK is not set
-+# CONFIG_HID_SAMSUNG is not set
-+# CONFIG_HID_SENSOR_HUB is not set
-+# CONFIG_HID_SMARTJOYPLUS is not set
-+# CONFIG_HID_SONY is not set
-+# CONFIG_HID_SPEEDLINK is not set
-+# CONFIG_HID_STEAM is not set
-+# CONFIG_HID_STEELSERIES is not set
-+# CONFIG_HID_SUNPLUS is not set
-+# CONFIG_HID_THINGM is not set
-+# CONFIG_HID_THRUSTMASTER is not set
-+# CONFIG_HID_TIVO is not set
-+# CONFIG_HID_TOPSEED is not set
-+# CONFIG_HID_TWINHAN is not set
-+# CONFIG_HID_U2FZERO is not set
-+# CONFIG_HID_UCLOGIC is not set
-+# CONFIG_HID_UDRAW_PS3 is not set
-+# CONFIG_HID_VIEWSONIC is not set
-+# CONFIG_HID_VIVALDI is not set
-+# CONFIG_HID_WACOM is not set
-+# CONFIG_HID_WALTOP is not set
-+# CONFIG_HID_WIIMOTE is not set
-+# CONFIG_HID_XINMO is not set
-+# CONFIG_HID_ZEROPLUS is not set
-+# CONFIG_HID_ZYDACRON is not set
-+# CONFIG_HIGHMEM is not set
-+CONFIG_HIGH_RES_TIMERS=y
-+# CONFIG_HINIC is not set
-+# CONFIG_HIP04_ETH is not set
-+# CONFIG_HIPPI is not set
-+# CONFIG_HISILICON_ERRATUM_161010101 is not set
-+# CONFIG_HISILICON_ERRATUM_161600802 is not set
-+# CONFIG_HISI_DMA is not set
-+# CONFIG_HISI_FEMAC is not set
-+# CONFIG_HISI_HIKEY_USB is not set
-+# CONFIG_HIX5HD2_GMAC is not set
-+# CONFIG_HMC425 is not set
-+# CONFIG_HMC6352 is not set
-+# CONFIG_HNS is not set
-+# CONFIG_HNS3 is not set
-+# CONFIG_HNS_DSAF is not set
-+# CONFIG_HNS_ENET is not set
-+# CONFIG_HOSTAP is not set
-+# CONFIG_HOSTAP_CS is not set
-+# CONFIG_HOSTAP_PCI is not set
-+# CONFIG_HOSTAP_PLX is not set
-+# CONFIG_HOTPLUG_CPU is not set
-+# CONFIG_HOTPLUG_PCI is not set
-+# CONFIG_HP03 is not set
-+# CONFIG_HP100 is not set
-+# CONFIG_HP206C is not set
-+CONFIG_HPET_MMAP_DEFAULT=y
-+# CONFIG_HPFS_FS is not set
-+# CONFIG_HP_ILO is not set
-+# CONFIG_HP_WIRELESS is not set
-+# CONFIG_HSA_AMD is not set
-+# CONFIG_HSI is not set
-+# CONFIG_HSR is not set
-+# CONFIG_HTC_EGPIO is not set
-+# CONFIG_HTC_I2CPLD is not set
-+# CONFIG_HTC_PASIC3 is not set
-+# CONFIG_HTS221 is not set
-+# CONFIG_HTU21 is not set
-+# CONFIG_HUGETLBFS is not set
-+# CONFIG_HUGETLB_PAGE is not set
-+# CONFIG_HVC_DCC is not set
-+# CONFIG_HVC_UDBG is not set
-+# CONFIG_HWLAT_TRACER is not set
-+# CONFIG_HWMON is not set
-+# CONFIG_HWMON_DEBUG_CHIP is not set
-+# CONFIG_HWMON_VID is not set
-+# CONFIG_HWSPINLOCK is not set
-+# CONFIG_HWSPINLOCK_OMAP is not set
-+CONFIG_HW_PERF_EVENTS=y
-+# CONFIG_HW_RANDOM is not set
-+# CONFIG_HW_RANDOM_AMD is not set
-+# CONFIG_HW_RANDOM_ATMEL is not set
-+# CONFIG_HW_RANDOM_BA431 is not set
-+# CONFIG_HW_RANDOM_CAVIUM is not set
-+# CONFIG_HW_RANDOM_CCTRNG is not set
-+# CONFIG_HW_RANDOM_EXYNOS is not set
-+# CONFIG_HW_RANDOM_GEODE is not set
-+# CONFIG_HW_RANDOM_INTEL is not set
-+# CONFIG_HW_RANDOM_IPROC_RNG200 is not set
-+# CONFIG_HW_RANDOM_MTK is not set
-+# CONFIG_HW_RANDOM_OMAP is not set
-+# CONFIG_HW_RANDOM_OMAP3_ROM is not set
-+# CONFIG_HW_RANDOM_PPC4XX is not set
-+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
-+CONFIG_HW_RANDOM_TPM=y
-+# CONFIG_HW_RANDOM_VIA is not set
-+# CONFIG_HW_RANDOM_VIRTIO is not set
-+# CONFIG_HW_RANDOM_XIPHERA is not set
-+# CONFIG_HX711 is not set
-+# CONFIG_HYPERV is not set
-+# CONFIG_HYPERV_TSCPAGE is not set
-+# CONFIG_HYSDN is not set
-+# CONFIG_HZ is not set
-+# CONFIG_HZ_100 is not set
-+# CONFIG_HZ_1000 is not set
-+# CONFIG_HZ_1024 is not set
-+# CONFIG_HZ_128 is not set
-+# CONFIG_HZ_200 is not set
-+# CONFIG_HZ_24 is not set
-+# CONFIG_HZ_250 is not set
-+# CONFIG_HZ_256 is not set
-+# CONFIG_HZ_300 is not set
-+# CONFIG_HZ_48 is not set
-+# CONFIG_HZ_500 is not set
-+# CONFIG_HZ_PERIODIC is not set
-+# CONFIG_I2C is not set
-+# CONFIG_I2C_ALGOBIT is not set
-+# CONFIG_I2C_ALGOPCA is not set
-+# CONFIG_I2C_ALGOPCF is not set
-+# CONFIG_I2C_ALI1535 is not set
-+# CONFIG_I2C_ALI1563 is not set
-+# CONFIG_I2C_ALI15X3 is not set
-+# CONFIG_I2C_AMD756 is not set
-+# CONFIG_I2C_AMD8111 is not set
-+# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set
-+# CONFIG_I2C_AU1550 is not set
-+# CONFIG_I2C_BCM2835 is not set
-+# CONFIG_I2C_BCM_IPROC is not set
-+# CONFIG_I2C_CADENCE is not set
-+# CONFIG_I2C_CBUS_GPIO is not set
-+# CONFIG_I2C_CHARDEV is not set
-+# CONFIG_I2C_COMPAT is not set
-+# CONFIG_I2C_DEBUG_ALGO is not set
-+# CONFIG_I2C_DEBUG_BUS is not set
-+# CONFIG_I2C_DEBUG_CORE is not set
-+# CONFIG_I2C_DEMUX_PINCTRL is not set
-+# CONFIG_I2C_DESIGNWARE_PCI is not set
-+# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
-+# CONFIG_I2C_DIOLAN_U2C is not set
-+# CONFIG_I2C_EG20T is not set
-+# CONFIG_I2C_ELEKTOR is not set
-+# CONFIG_I2C_EMEV2 is not set
-+# CONFIG_I2C_GPIO is not set
-+# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set
-+# CONFIG_I2C_HELPER_AUTO is not set
-+# CONFIG_I2C_HID is not set
-+# CONFIG_I2C_I801 is not set
-+# CONFIG_I2C_IBM_IIC is not set
-+# CONFIG_I2C_IMG is not set
-+# CONFIG_I2C_ISCH is not set
-+# CONFIG_I2C_ISMT is not set
-+# CONFIG_I2C_JZ4780 is not set
-+# CONFIG_I2C_MLXCPLD is not set
-+# CONFIG_I2C_MPC is not set
-+# CONFIG_I2C_MT65XX is not set
-+# CONFIG_I2C_MUX is not set
-+# CONFIG_I2C_MUX_GPIO is not set
-+# CONFIG_I2C_MUX_GPMUX is not set
-+# CONFIG_I2C_MUX_LTC4306 is not set
-+# CONFIG_I2C_MUX_MLXCPLD is not set
-+# CONFIG_I2C_MUX_PCA9541 is not set
-+# CONFIG_I2C_MUX_PCA954x is not set
-+# CONFIG_I2C_MUX_PINCTRL is not set
-+# CONFIG_I2C_MUX_REG is not set
-+# CONFIG_I2C_MV64XXX is not set
-+# CONFIG_I2C_NFORCE2 is not set
-+# CONFIG_I2C_NOMADIK is not set
-+# CONFIG_I2C_NVIDIA_GPU is not set
-+# CONFIG_I2C_OCORES is not set
-+# CONFIG_I2C_OCTEON is not set
-+# CONFIG_I2C_PARPORT is not set
-+# CONFIG_I2C_PARPORT_LIGHT is not set
-+# CONFIG_I2C_PCA_ISA is not set
-+# CONFIG_I2C_PCA_PLATFORM is not set
-+# CONFIG_I2C_PIIX4 is not set
-+# CONFIG_I2C_PXA_PCI is not set
-+# CONFIG_I2C_PXA_SLAVE is not set
-+# CONFIG_I2C_RCAR is not set
-+# CONFIG_I2C_RK3X is not set
-+# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
-+# CONFIG_I2C_S3C2410 is not set
-+# CONFIG_I2C_SCMI is not set
-+# CONFIG_I2C_SH_MOBILE is not set
-+# CONFIG_I2C_SIMTEC is not set
-+# CONFIG_I2C_SIS5595 is not set
-+# CONFIG_I2C_SIS630 is not set
-+# CONFIG_I2C_SIS96X is not set
-+# CONFIG_I2C_SLAVE is not set
-+# CONFIG_I2C_SLAVE_EEPROM is not set
-+# CONFIG_I2C_SMBUS is not set
-+# CONFIG_I2C_STUB is not set
-+# CONFIG_I2C_TAOS_EVM is not set
-+# CONFIG_I2C_THUNDERX is not set
-+# CONFIG_I2C_TINY_USB is not set
-+# CONFIG_I2C_VERSATILE is not set
-+# CONFIG_I2C_VIA is not set
-+# CONFIG_I2C_VIAPRO is not set
-+# CONFIG_I2C_XILINX is not set
-+# CONFIG_I3C is not set
-+# CONFIG_I40E is not set
-+# CONFIG_I40EVF is not set
-+# CONFIG_I6300ESB_WDT is not set
-+# CONFIG_I82092 is not set
-+# CONFIG_I82365 is not set
-+# CONFIG_IAQCORE is not set
-+# CONFIG_IBM_ASM is not set
-+# CONFIG_IBM_EMAC_DEBUG is not set
-+# CONFIG_IBM_EMAC_EMAC4 is not set
-+# CONFIG_IBM_EMAC_MAL_CLR_ICINTSTAT is not set
-+# CONFIG_IBM_EMAC_MAL_COMMON_ERR is not set
-+# CONFIG_IBM_EMAC_NO_FLOW_CTRL is not set
-+# CONFIG_IBM_EMAC_RGMII is not set
-+# CONFIG_IBM_EMAC_TAH is not set
-+# CONFIG_IBM_EMAC_ZMII is not set
-+# CONFIG_ICE is not set
-+# CONFIG_ICP10100 is not set
-+# CONFIG_ICPLUS_PHY is not set
-+# CONFIG_ICS932S401 is not set
-+# CONFIG_IDE is not set
-+# CONFIG_IDEAPAD_LAPTOP is not set
-+# CONFIG_IDE_GD is not set
-+# CONFIG_IDE_PROC_FS is not set
-+# CONFIG_IDE_TASK_IOCTL is not set
-+# CONFIG_IDLE_PAGE_TRACKING is not set
-+# CONFIG_IEEE802154 is not set
-+# CONFIG_IEEE802154_ADF7242 is not set
-+# CONFIG_IEEE802154_ATUSB is not set
-+# CONFIG_IEEE802154_CA8210 is not set
-+# CONFIG_IEEE802154_HWSIM is not set
-+# CONFIG_IEEE802154_MCR20A is not set
-+# CONFIG_IFB is not set
-+# CONFIG_IGB is not set
-+# CONFIG_IGBVF is not set
-+# CONFIG_IGC is not set
-+# CONFIG_IIO is not set
-+# CONFIG_IIO_BUFFER is not set
-+# CONFIG_IIO_BUFFER_CB is not set
-+# CONFIG_IIO_BUFFER_DMA is not set
-+# CONFIG_IIO_BUFFER_DMAENGINE is not set
-+# CONFIG_IIO_BUFFER_HDC2010 is not set
-+# CONFIG_IIO_BUFFER_HW_CONSUMER is not set
-+# CONFIG_IIO_CONFIGFS is not set
-+CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
-+# CONFIG_IIO_CROS_EC_ACCEL_LEGACY is not set
-+# CONFIG_IIO_INTERRUPT_TRIGGER is not set
-+# CONFIG_IIO_MUX is not set
-+# CONFIG_IIO_PERIODIC_RTC_TRIGGER is not set
-+# CONFIG_IIO_RESCALE is not set
-+# CONFIG_IIO_SIMPLE_DUMMY is not set
-+# CONFIG_IIO_SSP_SENSORHUB is not set
-+# CONFIG_IIO_ST_ACCEL_3AXIS is not set
-+# CONFIG_IIO_ST_GYRO_3AXIS is not set
-+# CONFIG_IIO_ST_LSM6DSX is not set
-+# CONFIG_IIO_ST_MAGN_3AXIS is not set
-+# CONFIG_IIO_ST_PRESS is not set
-+# CONFIG_IIO_SW_DEVICE is not set
-+# CONFIG_IIO_SW_TRIGGER is not set
-+# CONFIG_IIO_SYSFS_TRIGGER is not set
-+# CONFIG_IIO_TRIGGER is not set
-+# CONFIG_IIO_TRIGGERED_EVENT is not set
-+# CONFIG_IKCONFIG is not set
-+# CONFIG_IKCONFIG_PROC is not set
-+# CONFIG_IKHEADERS is not set
-+# CONFIG_IMA is not set
-+# CONFIG_IMAGE_CMDLINE_HACK is not set
-+# CONFIG_IMGPDC_WDT is not set
-+# CONFIG_IMG_MDC_DMA is not set
-+# CONFIG_IMX7D_ADC is not set
-+# CONFIG_IMX_IPUV3_CORE is not set
-+# CONFIG_IMX_THERMAL is not set
-+# CONFIG_INA2XX_ADC is not set
-+# CONFIG_INDIRECT_PIO is not set
-+CONFIG_INET=y
-+# CONFIG_INET6_AH is not set
-+# CONFIG_INET6_ESP is not set
-+# CONFIG_INET6_ESPINTCP is not set
-+# CONFIG_INET6_IPCOMP is not set
-+# CONFIG_INET6_TUNNEL is not set
-+# CONFIG_INET6_XFRM_MODE_BEET is not set
-+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
-+# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
-+# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
-+# CONFIG_INET6_XFRM_TUNNEL is not set
-+# CONFIG_INET_AH is not set
-+# CONFIG_INET_DIAG is not set
-+# CONFIG_INET_ESP is not set
-+# CONFIG_INET_ESPINTCP is not set
-+# CONFIG_INET_IPCOMP is not set
-+# CONFIG_INET_LRO is not set
-+# CONFIG_INET_TCP_DIAG is not set
-+# CONFIG_INET_TUNNEL is not set
-+# CONFIG_INET_UDP_DIAG is not set
-+# CONFIG_INET_XFRM_MODE_BEET is not set
-+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-+# CONFIG_INET_XFRM_TUNNEL is not set
-+# CONFIG_INFINIBAND is not set
-+# CONFIG_INFTL is not set
-+# CONFIG_INGENIC_ADC is not set
-+# CONFIG_INGENIC_CGU_JZ4725B is not set
-+# CONFIG_INGENIC_CGU_JZ4740 is not set
-+# CONFIG_INGENIC_CGU_JZ4770 is not set
-+# CONFIG_INGENIC_CGU_JZ4780 is not set
-+# CONFIG_INGENIC_CGU_X1000 is not set
-+# CONFIG_INGENIC_CGU_X1830 is not set
-+# CONFIG_INGENIC_OST is not set
-+# CONFIG_INGENIC_SYSOST is not set
-+# CONFIG_INGENIC_TCU_CLK is not set
-+# CONFIG_INGENIC_TCU_IRQ is not set
-+# CONFIG_INGENIC_TIMER is not set
-+CONFIG_INIT_ENV_ARG_LIMIT=32
-+# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set
-+# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set
-+CONFIG_INIT_STACK_NONE=y
-+CONFIG_INOTIFY_USER=y
-+# CONFIG_INPUT is not set
-+# CONFIG_INPUT_AD714X is not set
-+# CONFIG_INPUT_ADXL34X is not set
-+# CONFIG_INPUT_APANEL is not set
-+# CONFIG_INPUT_ATI_REMOTE2 is not set
-+# CONFIG_INPUT_ATLAS_BTNS is not set
-+# CONFIG_INPUT_ATMEL_CAPTOUCH is not set
-+# CONFIG_INPUT_AXP20X_PEK is not set
-+# CONFIG_INPUT_BMA150 is not set
-+# CONFIG_INPUT_CM109 is not set
-+# CONFIG_INPUT_CMA3000 is not set
-+# CONFIG_INPUT_DRV260X_HAPTICS is not set
-+# CONFIG_INPUT_DRV2665_HAPTICS is not set
-+# CONFIG_INPUT_DRV2667_HAPTICS is not set
-+# CONFIG_INPUT_E3X0_BUTTON is not set
-+# CONFIG_INPUT_EVBUG is not set
-+# CONFIG_INPUT_EVDEV is not set
-+# CONFIG_INPUT_FF_MEMLESS is not set
-+# CONFIG_INPUT_GP2A is not set
-+# CONFIG_INPUT_GPIO_BEEPER is not set
-+# CONFIG_INPUT_GPIO_DECODER is not set
-+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
-+# CONFIG_INPUT_GPIO_TILT_POLLED is not set
-+# CONFIG_INPUT_GPIO_VIBRA is not set
-+# CONFIG_INPUT_IDEAPAD_SLIDEBAR is not set
-+# CONFIG_INPUT_IMS_PCU is not set
-+# CONFIG_INPUT_IQS269A is not set
-+# CONFIG_INPUT_JOYDEV is not set
-+# CONFIG_INPUT_JOYSTICK is not set
-+# CONFIG_INPUT_KEYBOARD is not set
-+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
-+# CONFIG_INPUT_KXTJ9 is not set
-+# CONFIG_INPUT_LEDS is not set
-+# CONFIG_INPUT_MATRIXKMAP is not set
-+# CONFIG_INPUT_MAX8997_HAPTIC is not set
-+CONFIG_INPUT_MISC=y
-+# CONFIG_INPUT_MMA8450 is not set
-+# CONFIG_INPUT_MOUSE is not set
-+# CONFIG_INPUT_MOUSEDEV is not set
-+# CONFIG_INPUT_MPU3050 is not set
-+# CONFIG_INPUT_MSM_VIBRATOR is not set
-+# CONFIG_INPUT_PALMAS_PWRBUTTON is not set
-+# CONFIG_INPUT_PCF8574 is not set
-+# CONFIG_INPUT_PCSPKR is not set
-+# CONFIG_INPUT_POLLDEV is not set
-+# CONFIG_INPUT_POWERMATE is not set
-+# CONFIG_INPUT_PWM_BEEPER is not set
-+# CONFIG_INPUT_PWM_VIBRA is not set
-+# CONFIG_INPUT_REGULATOR_HAPTIC is not set
-+# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set
-+# CONFIG_INPUT_SPARSEKMAP is not set
-+# CONFIG_INPUT_TABLET is not set
-+# CONFIG_INPUT_TOUCHSCREEN is not set
-+# CONFIG_INPUT_TPS65218_PWRBUTTON is not set
-+# CONFIG_INPUT_TWL4030_PWRBUTTON is not set
-+# CONFIG_INPUT_TWL4030_VIBRA is not set
-+# CONFIG_INPUT_TWL6040_VIBRA is not set
-+# CONFIG_INPUT_UINPUT is not set
-+# CONFIG_INPUT_WISTRON_BTNS is not set
-+# CONFIG_INPUT_YEALINK is not set
-+# CONFIG_INT340X_THERMAL is not set
-+# CONFIG_INTEGRITY is not set
-+# CONFIG_INTEGRITY_AUDIT is not set
-+# CONFIG_INTEGRITY_SIGNATURE is not set
-+# CONFIG_INTEL_ATOMISP2_LED is not set
-+# CONFIG_INTEL_ATOMISP2_PM is not set
-+# CONFIG_INTEL_CHT_INT33FE is not set
-+# CONFIG_INTEL_HID_EVENT is not set
-+# CONFIG_INTEL_IDLE is not set
-+# CONFIG_INTEL_IDMA64 is not set
-+# CONFIG_INTEL_INT0002_VGPIO is not set
-+# CONFIG_INTEL_IOATDMA is not set
-+# CONFIG_INTEL_ISH_HID is not set
-+# CONFIG_INTEL_MEI is not set
-+# CONFIG_INTEL_MEI_ME is not set
-+# CONFIG_INTEL_MEI_TXE is not set
-+# CONFIG_INTEL_MIC_CARD is not set
-+# CONFIG_INTEL_MIC_HOST is not set
-+# CONFIG_INTEL_MID_PTI is not set
-+# CONFIG_INTEL_OAKTRAIL is not set
-+# CONFIG_INTEL_PMC_CORE is not set
-+# CONFIG_INTEL_PUNIT_IPC is not set
-+# CONFIG_INTEL_RST is not set
-+# CONFIG_INTEL_SMARTCONNECT is not set
-+# CONFIG_INTEL_SOC_PMIC is not set
-+# CONFIG_INTEL_SOC_PMIC_CHTDC_TI is not set
-+# CONFIG_INTEL_SOC_PMIC_CHTWC is not set
-+# CONFIG_INTEL_TH is not set
-+# CONFIG_INTEL_VBTN is not set
-+# CONFIG_INTEL_XWAY_PHY is not set
-+# CONFIG_INTERCONNECT is not set
-+# CONFIG_INTERVAL_TREE_TEST is not set
-+# CONFIG_INV_ICM42600_I2C is not set
-+# CONFIG_INV_ICM42600_SPI is not set
-+# CONFIG_INV_MPU6050_I2C is not set
-+# CONFIG_INV_MPU6050_IIO is not set
-+# CONFIG_INV_MPU6050_SPI is not set
-+# CONFIG_IOMMU_SUPPORT is not set
-+# CONFIG_IONIC is not set
-+# CONFIG_IOSCHED_BFQ is not set
-+# CONFIG_IOSCHED_CFQ is not set
-+CONFIG_IOSCHED_DEADLINE=y
-+CONFIG_IOSCHED_NOOP=y
-+CONFIG_IO_STRICT_DEVMEM=y
-+# CONFIG_IO_URING is not set
-+CONFIG_IO_WQ=y
-+# CONFIG_IP17XX_PHY is not set
-+# CONFIG_IP6_NF_FILTER is not set
-+# CONFIG_IP6_NF_IPTABLES is not set
-+# CONFIG_IP6_NF_MANGLE is not set
-+# CONFIG_IP6_NF_MATCH_AH is not set
-+# CONFIG_IP6_NF_MATCH_EUI64 is not set
-+# CONFIG_IP6_NF_MATCH_FRAG is not set
-+# CONFIG_IP6_NF_MATCH_HL is not set
-+# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set
-+# CONFIG_IP6_NF_MATCH_MH is not set
-+# CONFIG_IP6_NF_MATCH_OPTS is not set
-+# CONFIG_IP6_NF_MATCH_RPFILTER is not set
-+# CONFIG_IP6_NF_MATCH_RT is not set
-+# CONFIG_IP6_NF_MATCH_SRH is not set
-+# CONFIG_IP6_NF_NAT is not set
-+# CONFIG_IP6_NF_RAW is not set
-+# CONFIG_IP6_NF_SECURITY is not set
-+# CONFIG_IP6_NF_TARGET_HL is not set
-+# CONFIG_IP6_NF_TARGET_MASQUERADE is not set
-+# CONFIG_IP6_NF_TARGET_REJECT is not set
-+# CONFIG_IP6_NF_TARGET_SYNPROXY is not set
-+# CONFIG_IPACK_BUS is not set
-+# CONFIG_IPC_NS is not set
-+# CONFIG_IPMB_DEVICE_INTERFACE is not set
-+# CONFIG_IPMI_HANDLER is not set
-+# CONFIG_IPV6 is not set
-+# CONFIG_IPV6_FOU is not set
-+# CONFIG_IPV6_FOU_TUNNEL is not set
-+# CONFIG_IPV6_ILA is not set
-+# CONFIG_IPV6_MIP6 is not set
-+# CONFIG_IPV6_MROUTE is not set
-+# CONFIG_IPV6_MROUTE_MULTIPLE_TABLES is not set
-+# CONFIG_IPV6_MULTIPLE_TABLES is not set
-+CONFIG_IPV6_NDISC_NODETYPE=y
-+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
-+# CONFIG_IPV6_ROUTER_PREF is not set
-+# CONFIG_IPV6_ROUTE_INFO is not set
-+# CONFIG_IPV6_RPL_LWTUNNEL is not set
-+# CONFIG_IPV6_SEG6_HMAC is not set
-+# CONFIG_IPV6_SEG6_LWTUNNEL is not set
-+# CONFIG_IPV6_SIT is not set
-+# CONFIG_IPV6_SIT_6RD is not set
-+# CONFIG_IPV6_TUNNEL is not set
-+# CONFIG_IPV6_VTI is not set
-+# CONFIG_IPVLAN is not set
-+# CONFIG_IPW2100 is not set
-+# CONFIG_IPW2100_DEBUG is not set
-+CONFIG_IPW2100_MONITOR=y
-+# CONFIG_IPW2200 is not set
-+# CONFIG_IPW2200_DEBUG is not set
-+CONFIG_IPW2200_MONITOR=y
-+# CONFIG_IPW2200_PROMISCUOUS is not set
-+# CONFIG_IPW2200_QOS is not set
-+# CONFIG_IPW2200_RADIOTAP is not set
-+# CONFIG_IPWIRELESS is not set
-+# CONFIG_IPX is not set
-+CONFIG_IP_ADVANCED_ROUTER=y
-+# CONFIG_IP_DCCP is not set
-+# CONFIG_IP_FIB_TRIE_STATS is not set
-+# CONFIG_IP_MROUTE is not set
-+CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
-+CONFIG_IP_MULTICAST=y
-+CONFIG_IP_MULTIPLE_TABLES=y
-+# CONFIG_IP_NF_ARPFILTER is not set
-+# CONFIG_IP_NF_ARPTABLES is not set
-+# CONFIG_IP_NF_ARP_MANGLE is not set
-+# CONFIG_IP_NF_FILTER is not set
-+# CONFIG_IP_NF_IPTABLES is not set
-+# CONFIG_IP_NF_MANGLE is not set
-+# CONFIG_IP_NF_MATCH_AH is not set
-+# CONFIG_IP_NF_MATCH_ECN is not set
-+# CONFIG_IP_NF_MATCH_RPFILTER is not set
-+# CONFIG_IP_NF_MATCH_TTL is not set
-+# CONFIG_IP_NF_RAW is not set
-+# CONFIG_IP_NF_SECURITY is not set
-+# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
-+# CONFIG_IP_NF_TARGET_ECN is not set
-+# CONFIG_IP_NF_TARGET_MASQUERADE is not set
-+# CONFIG_IP_NF_TARGET_NETMAP is not set
-+# CONFIG_IP_NF_TARGET_REDIRECT is not set
-+# CONFIG_IP_NF_TARGET_REJECT is not set
-+# CONFIG_IP_NF_TARGET_SYNPROXY is not set
-+# CONFIG_IP_NF_TARGET_TTL is not set
-+# CONFIG_IP_PIMSM_V1 is not set
-+# CONFIG_IP_PIMSM_V2 is not set
-+# CONFIG_IP_PNP is not set
-+CONFIG_IP_ROUTE_MULTIPATH=y
-+CONFIG_IP_ROUTE_VERBOSE=y
-+# CONFIG_IP_SCTP is not set
-+# CONFIG_IP_SET is not set
-+# CONFIG_IP_SET_HASH_IPMAC is not set
-+# CONFIG_IP_VS is not set
-+# CONFIG_IP_VS_MH is not set
-+CONFIG_IP_VS_MH_TAB_INDEX=10
-+# CONFIG_IRDA is not set
-+# CONFIG_IRQSOFF_TRACER is not set
-+# CONFIG_IRQ_ALL_CPUS is not set
-+# CONFIG_IRQ_DOMAIN_DEBUG is not set
-+# CONFIG_IRQ_POLL is not set
-+# CONFIG_IRQ_TIME_ACCOUNTING is not set
-+# CONFIG_IR_GPIO_CIR is not set
-+# CONFIG_IR_HIX5HD2 is not set
-+# CONFIG_IR_IGORPLUGUSB is not set
-+# CONFIG_IR_IGUANA is not set
-+# CONFIG_IR_IMG is not set
-+# CONFIG_IR_IMON is not set
-+# CONFIG_IR_JVC_DECODER is not set
-+# CONFIG_IR_LIRC_CODEC is not set
-+# CONFIG_IR_MCEUSB is not set
-+# CONFIG_IR_NEC_DECODER is not set
-+# CONFIG_IR_RC5_DECODER is not set
-+# CONFIG_IR_RC6_DECODER is not set
-+# CONFIG_IR_REDRAT3 is not set
-+# CONFIG_IR_SONY_DECODER is not set
-+# CONFIG_IR_STREAMZAP is not set
-+# CONFIG_IR_TTUSBIR is not set
-+# CONFIG_ISA_BUS is not set
-+# CONFIG_ISA_BUS_API is not set
-+# CONFIG_ISCSI_BOOT_SYSFS is not set
-+# CONFIG_ISCSI_TCP is not set
-+CONFIG_ISDN=y
-+# CONFIG_ISDN_AUDIO is not set
-+# CONFIG_ISDN_CAPI is not set
-+# CONFIG_ISDN_CAPI_CAPIDRV is not set
-+# CONFIG_ISDN_DIVERSION is not set
-+# CONFIG_ISDN_DRV_ACT2000 is not set
-+# CONFIG_ISDN_DRV_GIGASET is not set
-+# CONFIG_ISDN_DRV_HISAX is not set
-+# CONFIG_ISDN_DRV_ICN is not set
-+# CONFIG_ISDN_DRV_LOOP is not set
-+# CONFIG_ISDN_DRV_PCBIT is not set
-+# CONFIG_ISDN_DRV_SC is not set
-+# CONFIG_ISDN_I4L is not set
-+# CONFIG_ISL29003 is not set
-+# CONFIG_ISL29020 is not set
-+# CONFIG_ISL29125 is not set
-+# CONFIG_ISL29501 is not set
-+# CONFIG_ISO9660_FS is not set
-+# CONFIG_ISS4xx is not set
-+# CONFIG_ITG3200 is not set
-+# CONFIG_IWL3945 is not set
-+# CONFIG_IWLWIFI is not set
-+# CONFIG_IXGB is not set
-+# CONFIG_IXGBE is not set
-+# CONFIG_IXGBEVF is not set
-+# CONFIG_JAILHOUSE_GUEST is not set
-+# CONFIG_JBD2_DEBUG is not set
-+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
-+# CONFIG_JFFS2_CMODE_NONE is not set
-+CONFIG_JFFS2_CMODE_PRIORITY=y
-+# CONFIG_JFFS2_CMODE_SIZE is not set
-+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-+CONFIG_JFFS2_FS=y
-+CONFIG_JFFS2_FS_DEBUG=0
-+# CONFIG_JFFS2_FS_POSIX_ACL is not set
-+# CONFIG_JFFS2_FS_SECURITY is not set
-+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
-+CONFIG_JFFS2_FS_WRITEBUFFER=y
-+CONFIG_JFFS2_FS_XATTR=y
-+CONFIG_JFFS2_LZMA=y
-+# CONFIG_JFFS2_LZO is not set
-+CONFIG_JFFS2_RTIME=y
-+# CONFIG_JFFS2_RUBIN is not set
-+CONFIG_JFFS2_SUMMARY=y
-+# CONFIG_JFFS2_ZLIB is not set
-+# CONFIG_JFS_DEBUG is not set
-+# CONFIG_JFS_FS is not set
-+# CONFIG_JFS_POSIX_ACL is not set
-+# CONFIG_JFS_SECURITY is not set
-+# CONFIG_JFS_STATISTICS is not set
-+# CONFIG_JME is not set
-+CONFIG_JOLIET=y
-+# CONFIG_JSA1212 is not set
-+# CONFIG_JUMP_LABEL is not set
-+# CONFIG_JZ4740_WDT is not set
-+# CONFIG_JZ4770_PHY is not set
-+# CONFIG_KALLSYMS is not set
-+# CONFIG_KALLSYMS_ABSOLUTE_PERCPU is not set
-+# CONFIG_KALLSYMS_ALL is not set
-+CONFIG_KALLSYMS_BASE_RELATIVE=y
-+# CONFIG_KALLSYMS_UNCOMPRESSED is not set
-+# CONFIG_KARMA_PARTITION is not set
-+# CONFIG_KASAN is not set
-+CONFIG_KASAN_STACK=1
-+# CONFIG_KCMP is not set
-+# CONFIG_KCOV is not set
-+# CONFIG_KERNEL_BZIP2 is not set
-+# CONFIG_KERNEL_CAT is not set
-+# CONFIG_KERNEL_GZIP is not set
-+# CONFIG_KERNEL_LZ4 is not set
-+# CONFIG_KERNEL_LZMA is not set
-+# CONFIG_KERNEL_LZO is not set
-+CONFIG_KERNEL_MODE_NEON=y
-+CONFIG_KERNEL_XZ=y
-+# CONFIG_KERNEL_ZSTD is not set
-+CONFIG_KERNFS=y
-+# CONFIG_KEXEC is not set
-+# CONFIG_KEXEC_FILE is not set
-+# CONFIG_KEYBOARD_ADC is not set
-+# CONFIG_KEYBOARD_ADP5588 is not set
-+# CONFIG_KEYBOARD_ADP5589 is not set
-+# CONFIG_KEYBOARD_APPLESPI is not set
-+# CONFIG_KEYBOARD_ATKBD is not set
-+# CONFIG_KEYBOARD_BCM is not set
-+# CONFIG_KEYBOARD_CAP11XX is not set
-+# CONFIG_KEYBOARD_DLINK_DIR685 is not set
-+# CONFIG_KEYBOARD_GPIO is not set
-+# CONFIG_KEYBOARD_GPIO_POLLED is not set
-+# CONFIG_KEYBOARD_LKKBD is not set
-+# CONFIG_KEYBOARD_LM8323 is not set
-+# CONFIG_KEYBOARD_LM8333 is not set
-+# CONFIG_KEYBOARD_MATRIX is not set
-+# CONFIG_KEYBOARD_MAX7359 is not set
-+# CONFIG_KEYBOARD_MCS is not set
-+# CONFIG_KEYBOARD_MPR121 is not set
-+# CONFIG_KEYBOARD_NEWTON is not set
-+# CONFIG_KEYBOARD_OMAP4 is not set
-+# CONFIG_KEYBOARD_OPENCORES is not set
-+# CONFIG_KEYBOARD_PXA27x is not set
-+# CONFIG_KEYBOARD_QT1050 is not set
-+# CONFIG_KEYBOARD_QT1070 is not set
-+# CONFIG_KEYBOARD_QT2160 is not set
-+# CONFIG_KEYBOARD_SAMSUNG is not set
-+# CONFIG_KEYBOARD_SH_KEYSC is not set
-+# CONFIG_KEYBOARD_SNVS_PWRKEY is not set
-+# CONFIG_KEYBOARD_STMPE is not set
-+# CONFIG_KEYBOARD_STOWAWAY is not set
-+# CONFIG_KEYBOARD_SUNKBD is not set
-+# CONFIG_KEYBOARD_TCA6416 is not set
-+# CONFIG_KEYBOARD_TCA8418 is not set
-+# CONFIG_KEYBOARD_TEGRA is not set
-+# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set
-+# CONFIG_KEYBOARD_TWL4030 is not set
-+# CONFIG_KEYBOARD_XTKBD is not set
-+# CONFIG_KEYS is not set
-+# CONFIG_KEYS_REQUEST_CACHE is not set
-+# CONFIG_KEY_DH_OPERATIONS is not set
-+# CONFIG_KGDB is not set
-+# CONFIG_KMEMCHECK is not set
-+# CONFIG_KMX61 is not set
-+# CONFIG_KPROBES is not set
-+# CONFIG_KPROBES_SANITY_TEST is not set
-+# CONFIG_KPROBE_EVENTS_ON_NOTRACE is not set
-+# CONFIG_KPROBE_EVENT_GEN_TEST is not set
-+# CONFIG_KS7010 is not set
-+# CONFIG_KS8842 is not set
-+# CONFIG_KS8851 is not set
-+# CONFIG_KS8851_MLL is not set
-+# CONFIG_KSM is not set
-+# CONFIG_KSZ884X_PCI is not set
-+# CONFIG_KUNIT is not set
-+CONFIG_KUSER_HELPERS=y
-+# CONFIG_KVM_AMD is not set
-+# CONFIG_KVM_AMD_SEV is not set
-+# CONFIG_KVM_GUEST is not set
-+# CONFIG_KVM_INTEL is not set
-+# CONFIG_KVM_WERROR is not set
-+# CONFIG_KXCJK1013 is not set
-+# CONFIG_KXSD9 is not set
-+# CONFIG_L2TP is not set
-+# CONFIG_L2TP_ETH is not set
-+# CONFIG_L2TP_IP is not set
-+# CONFIG_L2TP_V3 is not set
-+# CONFIG_LAN743X is not set
-+# CONFIG_LANMEDIA is not set
-+# CONFIG_LANTIQ is not set
-+# CONFIG_LAPB is not set
-+# CONFIG_LASAT is not set
-+# CONFIG_LATENCYTOP is not set
-+# CONFIG_LATTICE_ECP3_CONFIG is not set
-+CONFIG_LBDAF=y
-+# CONFIG_LCD_AMS369FG06 is not set
-+# CONFIG_LCD_CLASS_DEVICE is not set
-+# CONFIG_LCD_HX8357 is not set
-+# CONFIG_LCD_ILI922X is not set
-+# CONFIG_LCD_ILI9320 is not set
-+# CONFIG_LCD_L4F00242T03 is not set
-+# CONFIG_LCD_LD9040 is not set
-+# CONFIG_LCD_LMS283GF05 is not set
-+# CONFIG_LCD_LMS501KF03 is not set
-+# CONFIG_LCD_LTV350QV is not set
-+# CONFIG_LCD_OTM3225A is not set
-+# CONFIG_LCD_S6E63M0 is not set
-+# CONFIG_LCD_TDO24M is not set
-+# CONFIG_LCD_VGG2432A4 is not set
-+CONFIG_LDISC_AUTOLOAD=y
-+# CONFIG_LDM_PARTITION is not set
-+CONFIG_LD_DEAD_CODE_DATA_ELIMINATION=y
-+# CONFIG_LEDS_AN30259A is not set
-+# CONFIG_LEDS_APU is not set
-+# CONFIG_LEDS_AW2013 is not set
-+# CONFIG_LEDS_BCM6328 is not set
-+# CONFIG_LEDS_BCM6358 is not set
-+# CONFIG_LEDS_BD2802 is not set
-+# CONFIG_LEDS_BLINKM is not set
-+CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y
-+CONFIG_LEDS_CLASS=y
-+# CONFIG_LEDS_CLASS_FLASH is not set
-+CONFIG_LEDS_CLASS_MULTICOLOR=y
-+# CONFIG_LEDS_CR0014114 is not set
-+# CONFIG_LEDS_DAC124S085 is not set
-+# CONFIG_LEDS_EL15203000 is not set
-+# CONFIG_LEDS_GPIO is not set
-+# CONFIG_LEDS_INTEL_SS4200 is not set
-+# CONFIG_LEDS_IS31FL319X is not set
-+# CONFIG_LEDS_IS31FL32XX is not set
-+# CONFIG_LEDS_LM3530 is not set
-+# CONFIG_LEDS_LM3532 is not set
-+# CONFIG_LEDS_LM355x is not set
-+# CONFIG_LEDS_LM3642 is not set
-+# CONFIG_LEDS_LM3692X is not set
-+# CONFIG_LEDS_LP3944 is not set
-+# CONFIG_LEDS_LP3952 is not set
-+# CONFIG_LEDS_LP50XX is not set
-+# CONFIG_LEDS_LP5521 is not set
-+# CONFIG_LEDS_LP5523 is not set
-+# CONFIG_LEDS_LP5562 is not set
-+# CONFIG_LEDS_LP55XX_COMMON is not set
-+# CONFIG_LEDS_LP8501 is not set
-+# CONFIG_LEDS_LP8860 is not set
-+# CONFIG_LEDS_LT3593 is not set
-+# CONFIG_LEDS_MLXCPLD is not set
-+# CONFIG_LEDS_MLXREG is not set
-+# CONFIG_LEDS_NIC78BX is not set
-+# CONFIG_LEDS_NS2 is not set
-+# CONFIG_LEDS_OT200 is not set
-+# CONFIG_LEDS_PCA9532 is not set
-+# CONFIG_LEDS_PCA955X is not set
-+# CONFIG_LEDS_PCA963X is not set
-+# CONFIG_LEDS_PWM is not set
-+# CONFIG_LEDS_REGULATOR is not set
-+# CONFIG_LEDS_SPI_BYTE is not set
-+# CONFIG_LEDS_SYSCON is not set
-+# CONFIG_LEDS_TCA6507 is not set
-+# CONFIG_LEDS_TI_LMU_COMMON is not set
-+# CONFIG_LEDS_TLC591XX is not set
-+CONFIG_LEDS_TRIGGERS=y
-+# CONFIG_LEDS_TRIGGER_ACTIVITY is not set
-+# CONFIG_LEDS_TRIGGER_AUDIO is not set
-+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
-+# CONFIG_LEDS_TRIGGER_CAMERA is not set
-+# CONFIG_LEDS_TRIGGER_CPU is not set
-+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-+# CONFIG_LEDS_TRIGGER_DISK is not set
-+# CONFIG_LEDS_TRIGGER_GPIO is not set
-+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-+# CONFIG_LEDS_TRIGGER_MTD is not set
-+CONFIG_LEDS_TRIGGER_NETDEV=y
-+# CONFIG_LEDS_TRIGGER_ONESHOT is not set
-+# CONFIG_LEDS_TRIGGER_PANIC is not set
-+# CONFIG_LEDS_TRIGGER_PATTERN is not set
-+CONFIG_LEDS_TRIGGER_TIMER=y
-+# CONFIG_LEDS_TRIGGER_TRANSIENT is not set
-+# CONFIG_LEDS_TURRIS_OMNIA is not set
-+# CONFIG_LEDS_USER is not set
-+# CONFIG_LED_TRIGGER_PHY is not set
-+# CONFIG_LEGACY_PTYS is not set
-+# CONFIG_LGUEST is not set
-+# CONFIG_LIB80211 is not set
-+# CONFIG_LIB80211_CRYPT_CCMP is not set
-+# CONFIG_LIB80211_CRYPT_TKIP is not set
-+# CONFIG_LIB80211_CRYPT_WEP is not set
-+# CONFIG_LIB80211_DEBUG is not set
-+# CONFIG_LIBCRC32C is not set
-+# CONFIG_LIBERTAS is not set
-+# CONFIG_LIBERTAS_THINFIRM is not set
-+# CONFIG_LIBERTAS_USB is not set
-+# CONFIG_LIBFC is not set
-+# CONFIG_LIBFCOE is not set
-+# CONFIG_LIBIPW_DEBUG is not set
-+# CONFIG_LIBNVDIMM is not set
-+# CONFIG_LIDAR_LITE_V2 is not set
-+CONFIG_LINEAR_RANGES=y
-+# CONFIG_LIQUIDIO is not set
-+# CONFIG_LIQUIDIO_VF is not set
-+# CONFIG_LIS3L02DQ is not set
-+# CONFIG_LKDTM is not set
-+CONFIG_LLC=y
-+# CONFIG_LLC2 is not set
-+# CONFIG_LMP91000 is not set
-+# CONFIG_LNET is not set
-+CONFIG_LOCALVERSION=""
-+# CONFIG_LOCALVERSION_AUTO is not set
-+# CONFIG_LOCKD is not set
-+CONFIG_LOCKDEP_SUPPORT=y
-+CONFIG_LOCKD_V4=y
-+# CONFIG_LOCKUP_DETECTOR is not set
-+# CONFIG_LOCK_EVENT_COUNTS is not set
-+# CONFIG_LOCK_STAT is not set
-+# CONFIG_LOCK_TORTURE_TEST is not set
-+# CONFIG_LOGFS is not set
-+# CONFIG_LOGIG940_FF is not set
-+# CONFIG_LOGIRUMBLEPAD2_FF is not set
-+# CONFIG_LOGITECH_FF is not set
-+# CONFIG_LOGIWHEELS_FF is not set
-+# CONFIG_LOGO is not set
-+CONFIG_LOG_BUF_SHIFT=17
-+CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
-+# CONFIG_LOONGSON_MC146818 is not set
-+# CONFIG_LPC_ICH is not set
-+# CONFIG_LPC_SCH is not set
-+# CONFIG_LP_CONSOLE is not set
-+# CONFIG_LSI_ET1011C_PHY is not set
-+CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity"
-+CONFIG_LSM_MMAP_MIN_ADDR=65536
-+# CONFIG_LTC1660 is not set
-+# CONFIG_LTC2471 is not set
-+# CONFIG_LTC2485 is not set
-+# CONFIG_LTC2496 is not set
-+# CONFIG_LTC2497 is not set
-+# CONFIG_LTC2632 is not set
-+# CONFIG_LTC2983 is not set
-+# CONFIG_LTE_GDM724X is not set
-+# CONFIG_LTPC is not set
-+# CONFIG_LTR501 is not set
-+# CONFIG_LUSTRE_FS is not set
-+# CONFIG_LV0104CS is not set
-+# CONFIG_LWTUNNEL is not set
-+# CONFIG_LXT_PHY is not set
-+# CONFIG_LZ4HC_COMPRESS is not set
-+# CONFIG_LZ4_COMPRESS is not set
-+# CONFIG_LZ4_DECOMPRESS is not set
-+CONFIG_LZMA_COMPRESS=y
-+CONFIG_LZMA_DECOMPRESS=y
-+# CONFIG_LZO_COMPRESS is not set
-+# CONFIG_LZO_DECOMPRESS is not set
-+# CONFIG_M62332 is not set
-+# CONFIG_MAC80211 is not set
-+# CONFIG_MAC80211_MESSAGE_TRACING is not set
-+CONFIG_MAC80211_STA_HASH_MAX_SIZE=0
-+# CONFIG_MACB is not set
-+# CONFIG_MACH_ASM9260 is not set
-+# CONFIG_MACH_DECSTATION is not set
-+# CONFIG_MACH_INGENIC is not set
-+# CONFIG_MACH_INGENIC_SOC is not set
-+# CONFIG_MACH_JAZZ is not set
-+# CONFIG_MACH_JZ4740 is not set
-+# CONFIG_MACH_LOONGSON2EF is not set
-+# CONFIG_MACH_LOONGSON32 is not set
-+# CONFIG_MACH_LOONGSON64 is not set
-+# CONFIG_MACH_PIC32 is not set
-+# CONFIG_MACH_PISTACHIO is not set
-+# CONFIG_MACH_TX39XX is not set
-+# CONFIG_MACH_TX49XX is not set
-+# CONFIG_MACH_VR41XX is not set
-+# CONFIG_MACH_XILFPGA is not set
-+# CONFIG_MACINTOSH_DRIVERS is not set
-+# CONFIG_MACSEC is not set
-+# CONFIG_MACVLAN is not set
-+# CONFIG_MACVTAP is not set
-+# CONFIG_MAC_EMUMOUSEBTN is not set
-+# CONFIG_MAC_PARTITION is not set
-+# CONFIG_MAG3110 is not set
-+# CONFIG_MAGIC_SYSRQ is not set
-+CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1
-+# CONFIG_MAGIC_SYSRQ_SERIAL is not set
-+CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE=""
-+# CONFIG_MAILBOX is not set
-+# CONFIG_MANAGER_SBS is not set
-+# CONFIG_MANDATORY_FILE_LOCKING is not set
-+# CONFIG_MANGLE_BOOTARGS is not set
-+# CONFIG_MARVELL_10G_PHY is not set
-+# CONFIG_MARVELL_PHY is not set
-+# CONFIG_MAX1027 is not set
-+# CONFIG_MAX11100 is not set
-+# CONFIG_MAX1118 is not set
-+# CONFIG_MAX1241 is not set
-+# CONFIG_MAX1363 is not set
-+# CONFIG_MAX30100 is not set
-+# CONFIG_MAX30102 is not set
-+# CONFIG_MAX31856 is not set
-+# CONFIG_MAX44000 is not set
-+# CONFIG_MAX44009 is not set
-+# CONFIG_MAX517 is not set
-+# CONFIG_MAX5432 is not set
-+# CONFIG_MAX5481 is not set
-+# CONFIG_MAX5487 is not set
-+# CONFIG_MAX5821 is not set
-+# CONFIG_MAX63XX_WATCHDOG is not set
-+# CONFIG_MAX9611 is not set
-+# CONFIG_MAXIM_THERMOCOUPLE is not set
-+CONFIG_MAY_USE_DEVLINK=y
-+# CONFIG_MB1232 is not set
-+# CONFIG_MC3230 is not set
-+# CONFIG_MCB is not set
-+# CONFIG_MCP320X is not set
-+# CONFIG_MCP3422 is not set
-+# CONFIG_MCP3911 is not set
-+# CONFIG_MCP4018 is not set
-+# CONFIG_MCP41010 is not set
-+# CONFIG_MCP4131 is not set
-+# CONFIG_MCP4531 is not set
-+# CONFIG_MCP4725 is not set
-+# CONFIG_MCP4922 is not set
-+# CONFIG_MCPM is not set
-+# CONFIG_MD is not set
-+# CONFIG_MDIO_BCM_UNIMAC is not set
-+# CONFIG_MDIO_BITBANG is not set
-+# CONFIG_MDIO_BUS_MUX_GPIO is not set
-+# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
-+# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set
-+# CONFIG_MDIO_DEVICE is not set
-+# CONFIG_MDIO_DEVRES is not set
-+# CONFIG_MDIO_HISI_FEMAC is not set
-+# CONFIG_MDIO_IPQ4019 is not set
-+# CONFIG_MDIO_IPQ8064 is not set
-+# CONFIG_MDIO_MSCC_MIIM is not set
-+# CONFIG_MDIO_MVUSB is not set
-+# CONFIG_MDIO_OCTEON is not set
-+# CONFIG_MDIO_THUNDER is not set
-+# CONFIG_MDIO_XPCS is not set
-+# CONFIG_MD_FAULTY is not set
-+# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
-+# CONFIG_MEDIA_ATTACH is not set
-+# CONFIG_MEDIA_CAMERA_SUPPORT is not set
-+# CONFIG_MEDIA_CEC_SUPPORT is not set
-+# CONFIG_MEDIA_CONTROLLER is not set
-+# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
-+# CONFIG_MEDIA_PCI_SUPPORT is not set
-+# CONFIG_MEDIA_PLATFORM_SUPPORT is not set
-+# CONFIG_MEDIA_RADIO_SUPPORT is not set
-+# CONFIG_MEDIA_RC_SUPPORT is not set
-+# CONFIG_MEDIA_SDR_SUPPORT is not set
-+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
-+# CONFIG_MEDIA_SUPPORT is not set
-+# CONFIG_MEDIA_SUPPORT_FILTER is not set
-+# CONFIG_MEDIA_TEST_SUPPORT is not set
-+# CONFIG_MEDIA_TUNER_E4000 is not set
-+# CONFIG_MEDIA_TUNER_FC0011 is not set
-+# CONFIG_MEDIA_TUNER_FC0012 is not set
-+# CONFIG_MEDIA_TUNER_FC0013 is not set
-+# CONFIG_MEDIA_TUNER_FC2580 is not set
-+# CONFIG_MEDIA_TUNER_IT913X is not set
-+# CONFIG_MEDIA_TUNER_M88RS6000T is not set
-+# CONFIG_MEDIA_TUNER_MAX2165 is not set
-+# CONFIG_MEDIA_TUNER_MC44S803 is not set
-+# CONFIG_MEDIA_TUNER_MSI001 is not set
-+# CONFIG_MEDIA_TUNER_MT2060 is not set
-+# CONFIG_MEDIA_TUNER_MT2063 is not set
-+# CONFIG_MEDIA_TUNER_MT20XX is not set
-+# CONFIG_MEDIA_TUNER_MT2131 is not set
-+# CONFIG_MEDIA_TUNER_MT2266 is not set
-+# CONFIG_MEDIA_TUNER_MXL301RF is not set
-+# CONFIG_MEDIA_TUNER_MXL5005S is not set
-+# CONFIG_MEDIA_TUNER_MXL5007T is not set
-+# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
-+# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
-+# CONFIG_MEDIA_TUNER_QT1010 is not set
-+# CONFIG_MEDIA_TUNER_R820T is not set
-+# CONFIG_MEDIA_TUNER_SI2157 is not set
-+# CONFIG_MEDIA_TUNER_SIMPLE is not set
-+# CONFIG_MEDIA_TUNER_TDA18212 is not set
-+# CONFIG_MEDIA_TUNER_TDA18218 is not set
-+# CONFIG_MEDIA_TUNER_TDA18250 is not set
-+# CONFIG_MEDIA_TUNER_TDA18271 is not set
-+# CONFIG_MEDIA_TUNER_TDA827X is not set
-+# CONFIG_MEDIA_TUNER_TDA8290 is not set
-+# CONFIG_MEDIA_TUNER_TDA9887 is not set
-+# CONFIG_MEDIA_TUNER_TEA5761 is not set
-+# CONFIG_MEDIA_TUNER_TEA5767 is not set
-+# CONFIG_MEDIA_TUNER_TUA9001 is not set
-+# CONFIG_MEDIA_TUNER_XC2028 is not set
-+# CONFIG_MEDIA_TUNER_XC4000 is not set
-+# CONFIG_MEDIA_TUNER_XC5000 is not set
-+# CONFIG_MEDIA_USB_SUPPORT is not set
-+# CONFIG_MEGARAID_LEGACY is not set
-+# CONFIG_MEGARAID_NEWGEN is not set
-+# CONFIG_MEGARAID_SAS is not set
-+# CONFIG_MELLANOX_PLATFORM is not set
-+CONFIG_MEMBARRIER=y
-+# CONFIG_MEMORY is not set
-+# CONFIG_MEMORY_FAILURE is not set
-+# CONFIG_MEMORY_HOTPLUG is not set
-+# CONFIG_MEMSTICK is not set
-+# CONFIG_MEMTEST is not set
-+# CONFIG_MEN_A21_WDT is not set
-+# CONFIG_MESON_SM is not set
-+CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
-+# CONFIG_MFD_88PM800 is not set
-+# CONFIG_MFD_88PM805 is not set
-+# CONFIG_MFD_88PM860X is not set
-+# CONFIG_MFD_AAT2870_CORE is not set
-+# CONFIG_MFD_AC100 is not set
-+# CONFIG_MFD_ACT8945A is not set
-+# CONFIG_MFD_ARIZONA_I2C is not set
-+# CONFIG_MFD_ARIZONA_SPI is not set
-+# CONFIG_MFD_AS3711 is not set
-+# CONFIG_MFD_AS3722 is not set
-+# CONFIG_MFD_ASIC3 is not set
-+# CONFIG_MFD_ATMEL_FLEXCOM is not set
-+# CONFIG_MFD_ATMEL_HLCDC is not set
-+# CONFIG_MFD_AXP20X is not set
-+# CONFIG_MFD_AXP20X_I2C is not set
-+# CONFIG_MFD_BCM590XX is not set
-+# CONFIG_MFD_BD9571MWV is not set
-+# CONFIG_MFD_CORE is not set
-+# CONFIG_MFD_CPCAP is not set
-+# CONFIG_MFD_CROS_EC is not set
-+# CONFIG_MFD_CS5535 is not set
-+# CONFIG_MFD_DA9052_I2C is not set
-+# CONFIG_MFD_DA9052_SPI is not set
-+# CONFIG_MFD_DA9055 is not set
-+# CONFIG_MFD_DA9062 is not set
-+# CONFIG_MFD_DA9063 is not set
-+# CONFIG_MFD_DA9150 is not set
-+# CONFIG_MFD_DLN2 is not set
-+# CONFIG_MFD_EXYNOS_LPASS is not set
-+# CONFIG_MFD_GATEWORKS_GSC is not set
-+# CONFIG_MFD_HI6421_PMIC is not set
-+# CONFIG_MFD_INTEL_M10_BMC is not set
-+# CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set
-+# CONFIG_MFD_IQS62X is not set
-+# CONFIG_MFD_JANZ_CMODIO is not set
-+# CONFIG_MFD_KEMPLD is not set
-+# CONFIG_MFD_LM3533 is not set
-+# CONFIG_MFD_LOCHNAGAR is not set
-+# CONFIG_MFD_LP3943 is not set
-+# CONFIG_MFD_LP8788 is not set
-+# CONFIG_MFD_MADERA is not set
-+# CONFIG_MFD_MAX14577 is not set
-+# CONFIG_MFD_MAX77620 is not set
-+# CONFIG_MFD_MAX77650 is not set
-+# CONFIG_MFD_MAX77686 is not set
-+# CONFIG_MFD_MAX77693 is not set
-+# CONFIG_MFD_MAX77843 is not set
-+# CONFIG_MFD_MAX8907 is not set
-+# CONFIG_MFD_MAX8925 is not set
-+# CONFIG_MFD_MAX8997 is not set
-+# CONFIG_MFD_MAX8998 is not set
-+# CONFIG_MFD_MC13XXX is not set
-+# CONFIG_MFD_MC13XXX_I2C is not set
-+# CONFIG_MFD_MC13XXX_SPI is not set
-+# CONFIG_MFD_MENF21BMC is not set
-+# CONFIG_MFD_MP2629 is not set
-+# CONFIG_MFD_MT6360 is not set
-+# CONFIG_MFD_MT6397 is not set
-+# CONFIG_MFD_OMAP_USB_HOST is not set
-+# CONFIG_MFD_PALMAS is not set
-+# CONFIG_MFD_PCF50633 is not set
-+# CONFIG_MFD_PM8921_CORE is not set
-+# CONFIG_MFD_PM8XXX is not set
-+# CONFIG_MFD_RC5T583 is not set
-+# CONFIG_MFD_RDC321X is not set
-+# CONFIG_MFD_RETU is not set
-+# CONFIG_MFD_RK808 is not set
-+# CONFIG_MFD_RN5T618 is not set
-+# CONFIG_MFD_ROHM_BD70528 is not set
-+# CONFIG_MFD_ROHM_BD71828 is not set
-+# CONFIG_MFD_ROHM_BD718XX is not set
-+# CONFIG_MFD_RT5033 is not set
-+# CONFIG_MFD_RTSX_PCI is not set
-+# CONFIG_MFD_RTSX_USB is not set
-+# CONFIG_MFD_SEC_CORE is not set
-+# CONFIG_MFD_SI476X_CORE is not set
-+# CONFIG_MFD_SKY81452 is not set
-+# CONFIG_MFD_SM501 is not set
-+# CONFIG_MFD_SMSC is not set
-+# CONFIG_MFD_STMFX is not set
-+# CONFIG_MFD_STMPE is not set
-+# CONFIG_MFD_STPMIC1 is not set
-+# CONFIG_MFD_SYSCON is not set
-+# CONFIG_MFD_T7L66XB is not set
-+# CONFIG_MFD_TC3589X is not set
-+# CONFIG_MFD_TC6387XB is not set
-+# CONFIG_MFD_TC6393XB is not set
-+# CONFIG_MFD_TIMBERDALE is not set
-+# CONFIG_MFD_TI_AM335X_TSCADC is not set
-+# CONFIG_MFD_TI_LMU is not set
-+# CONFIG_MFD_TI_LP873X is not set
-+# CONFIG_MFD_TI_LP87565 is not set
-+# CONFIG_MFD_TMIO is not set
-+# CONFIG_MFD_TPS65086 is not set
-+# CONFIG_MFD_TPS65090 is not set
-+# CONFIG_MFD_TPS65217 is not set
-+# CONFIG_MFD_TPS65218 is not set
-+# CONFIG_MFD_TPS6586X is not set
-+# CONFIG_MFD_TPS65910 is not set
-+# CONFIG_MFD_TPS65912 is not set
-+# CONFIG_MFD_TPS65912_I2C is not set
-+# CONFIG_MFD_TPS65912_SPI is not set
-+# CONFIG_MFD_TPS68470 is not set
-+# CONFIG_MFD_TPS80031 is not set
-+# CONFIG_MFD_TQMX86 is not set
-+# CONFIG_MFD_VIPERBOARD is not set
-+# CONFIG_MFD_VX855 is not set
-+# CONFIG_MFD_WL1273_CORE is not set
-+# CONFIG_MFD_WM831X is not set
-+# CONFIG_MFD_WM831X_I2C is not set
-+# CONFIG_MFD_WM831X_SPI is not set
-+# CONFIG_MFD_WM8350_I2C is not set
-+# CONFIG_MFD_WM8400 is not set
-+# CONFIG_MFD_WM8994 is not set
-+# CONFIG_MG_DISK is not set
-+# CONFIG_MHI_BUS is not set
-+# CONFIG_MICREL_KS8995MA is not set
-+# CONFIG_MICREL_PHY is not set
-+# CONFIG_MICROCHIP_KSZ is not set
-+# CONFIG_MICROCHIP_PHY is not set
-+# CONFIG_MICROCHIP_PIT64B is not set
-+# CONFIG_MICROCHIP_T1_PHY is not set
-+# CONFIG_MICROSEMI_PHY is not set
-+# CONFIG_MIGRATION is not set
-+CONFIG_MII=y
-+# CONFIG_MIKROTIK is not set
-+# CONFIG_MIKROTIK_RB532 is not set
-+# CONFIG_MINIX_FS is not set
-+# CONFIG_MINIX_FS_NATIVE_ENDIAN is not set
-+# CONFIG_MINIX_SUBPARTITION is not set
-+# CONFIG_MIPS_ALCHEMY is not set
-+# CONFIG_MIPS_CDMM is not set
-+# CONFIG_MIPS_COBALT is not set
-+# CONFIG_MIPS_FPU_EMULATOR is not set
-+# CONFIG_MIPS_FP_SUPPORT is not set
-+# CONFIG_MIPS_GENERIC is not set
-+# CONFIG_MIPS_GENERIC_KERNEL is not set
-+# CONFIG_MIPS_MALTA is not set
-+# CONFIG_MIPS_O32_FP64_SUPPORT is not set
-+# CONFIG_MIPS_PARAVIRT is not set
-+# CONFIG_MIPS_PLATFORM_DEVICES is not set
-+# CONFIG_MIPS_SEAD3 is not set
-+# CONFIG_MISC_ALCOR_PCI is not set
-+CONFIG_MISC_FILESYSTEMS=y
-+# CONFIG_MISC_RTSX_PCI is not set
-+# CONFIG_MISC_RTSX_USB is not set
-+# CONFIG_MISDN is not set
-+# CONFIG_MISDN_AVMFRITZ is not set
-+# CONFIG_MISDN_HFCPCI is not set
-+# CONFIG_MISDN_HFCUSB is not set
-+# CONFIG_MISDN_INFINEON is not set
-+# CONFIG_MISDN_NETJET is not set
-+# CONFIG_MISDN_SPEEDFAX is not set
-+# CONFIG_MISDN_W6692 is not set
-+# CONFIG_MKISS is not set
-+# CONFIG_MLX4_CORE is not set
-+# CONFIG_MLX4_EN is not set
-+# CONFIG_MLX5_CORE is not set
-+# CONFIG_MLX90614 is not set
-+# CONFIG_MLX90632 is not set
-+# CONFIG_MLXFW is not set
-+# CONFIG_MLXSW_CORE is not set
-+# CONFIG_MLX_CPLD_PLATFORM is not set
-+# CONFIG_MLX_PLATFORM is not set
-+# CONFIG_MMA7455_I2C is not set
-+# CONFIG_MMA7455_SPI is not set
-+# CONFIG_MMA7660 is not set
-+# CONFIG_MMA8452 is not set
-+# CONFIG_MMA9551 is not set
-+# CONFIG_MMA9553 is not set
-+# CONFIG_MMC is not set
-+# CONFIG_MMC35240 is not set
-+# CONFIG_MMC_ARMMMCI is not set
-+# CONFIG_MMC_AU1X is not set
-+# CONFIG_MMC_BLOCK is not set
-+CONFIG_MMC_BLOCK_BOUNCE=y
-+CONFIG_MMC_BLOCK_MINORS=8
-+# CONFIG_MMC_CAVIUM_THUNDERX is not set
-+# CONFIG_MMC_CB710 is not set
-+# CONFIG_MMC_CQHCI is not set
-+# CONFIG_MMC_DEBUG is not set
-+# CONFIG_MMC_DW is not set
-+# CONFIG_MMC_HSQ is not set
-+# CONFIG_MMC_JZ4740 is not set
-+# CONFIG_MMC_MTK is not set
-+# CONFIG_MMC_MVSDIO is not set
-+# CONFIG_MMC_S3C is not set
-+# CONFIG_MMC_SDHCI is not set
-+# CONFIG_MMC_SDHCI_ACPI is not set
-+# CONFIG_MMC_SDHCI_AM654 is not set
-+# CONFIG_MMC_SDHCI_BCM_KONA is not set
-+# CONFIG_MMC_SDHCI_CADENCE is not set
-+# CONFIG_MMC_SDHCI_F_SDH30 is not set
-+# CONFIG_MMC_SDHCI_IPROC is not set
-+# CONFIG_MMC_SDHCI_MILBEAUT is not set
-+# CONFIG_MMC_SDHCI_MSM is not set
-+# CONFIG_MMC_SDHCI_OF_ARASAN is not set
-+# CONFIG_MMC_SDHCI_OF_ASPEED is not set
-+# CONFIG_MMC_SDHCI_OF_AT91 is not set
-+# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set
-+# CONFIG_MMC_SDHCI_OF_ESDHC is not set
-+# CONFIG_MMC_SDHCI_OF_HLWD is not set
-+# CONFIG_MMC_SDHCI_OMAP is not set
-+# CONFIG_MMC_SDHCI_PXAV2 is not set
-+# CONFIG_MMC_SDHCI_PXAV3 is not set
-+# CONFIG_MMC_SDHCI_S3C is not set
-+# CONFIG_MMC_SDHCI_XENON is not set
-+# CONFIG_MMC_SDRICOH_CS is not set
-+# CONFIG_MMC_SPI is not set
-+# CONFIG_MMC_STM32_SDMMC is not set
-+# CONFIG_MMC_TEST is not set
-+# CONFIG_MMC_TIFM_SD is not set
-+# CONFIG_MMC_TOSHIBA_PCI is not set
-+# CONFIG_MMC_USDHI6ROL0 is not set
-+# CONFIG_MMC_USHC is not set
-+# CONFIG_MMC_VIA_SDMMC is not set
-+# CONFIG_MMC_VUB300 is not set
-+# CONFIG_MMIOTRACE is not set
-+CONFIG_MMU=y
-+CONFIG_MMU_GATHER_RCU_TABLE_FREE=y
-+CONFIG_MMU_GATHER_TABLE_FREE=y
-+CONFIG_MODULES=y
-+# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set
-+# CONFIG_MODULE_COMPRESS is not set
-+# CONFIG_MODULE_FORCE_LOAD is not set
-+# CONFIG_MODULE_FORCE_UNLOAD is not set
-+# CONFIG_MODULE_SIG is not set
-+# CONFIG_MODULE_SRCVERSION_ALL is not set
-+CONFIG_MODULE_STRIPPED=y
-+CONFIG_MODULE_UNLOAD=y
-+# CONFIG_MODVERSIONS is not set
-+# CONFIG_MOST is not set
-+# CONFIG_MOUSE_APPLETOUCH is not set
-+# CONFIG_MOUSE_ELAN_I2C is not set
-+# CONFIG_MOUSE_GPIO is not set
-+# CONFIG_MOUSE_INPORT is not set
-+# CONFIG_MOUSE_LOGIBM is not set
-+# CONFIG_MOUSE_PC110PAD is not set
-+# CONFIG_MOUSE_PS2_FOCALTECH is not set
-+# CONFIG_MOUSE_PS2_SENTELIC is not set
-+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
-+# CONFIG_MOUSE_SYNAPTICS_USB is not set
-+# CONFIG_MOXTET is not set
-+# CONFIG_MPL115 is not set
-+# CONFIG_MPL115_I2C is not set
-+# CONFIG_MPL115_SPI is not set
-+# CONFIG_MPL3115 is not set
-+# CONFIG_MPLS is not set
-+# CONFIG_MPTCP is not set
-+# CONFIG_MPU3050_I2C is not set
-+# CONFIG_MQ_IOSCHED_DEADLINE is not set
-+# CONFIG_MQ_IOSCHED_KYBER is not set
-+# CONFIG_MS5611 is not set
-+# CONFIG_MS5637 is not set
-+# CONFIG_MSCC_OCELOT_SWITCH is not set
-+# CONFIG_MSDOS_FS is not set
-+CONFIG_MSDOS_PARTITION=y
-+# CONFIG_MSI_BITMAP_SELFTEST is not set
-+# CONFIG_MSI_LAPTOP is not set
-+# CONFIG_MST_IRQ is not set
-+CONFIG_MTD=y
-+# CONFIG_MTD_ABSENT is not set
-+# CONFIG_MTD_AFS_PARTS is not set
-+# CONFIG_MTD_AR7_PARTS is not set
-+CONFIG_MTD_BLKDEVS=y
-+CONFIG_MTD_BLOCK=y
-+# CONFIG_MTD_BLOCK2MTD is not set
-+CONFIG_MTD_CFI=y
-+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-+CONFIG_MTD_CFI_AMDSTD=y
-+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
-+CONFIG_MTD_CFI_I1=y
-+CONFIG_MTD_CFI_I2=y
-+# CONFIG_MTD_CFI_I4 is not set
-+# CONFIG_MTD_CFI_I8 is not set
-+CONFIG_MTD_CFI_INTELEXT=y
-+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-+CONFIG_MTD_CFI_NOSWAP=y
-+# CONFIG_MTD_CFI_STAA is not set
-+CONFIG_MTD_CFI_UTIL=y
-+# CONFIG_MTD_CMDLINE_PARTS is not set
-+CONFIG_MTD_COMPLEX_MAPPINGS=y
-+# CONFIG_MTD_DATAFLASH is not set
-+# CONFIG_MTD_DOCG3 is not set
-+CONFIG_MTD_GEN_PROBE=y
-+# CONFIG_MTD_GPIO_ADDR is not set
-+# CONFIG_MTD_HYPERBUS is not set
-+# CONFIG_MTD_IMPA7 is not set
-+# CONFIG_MTD_INTEL_VR_NOR is not set
-+# CONFIG_MTD_JEDECPROBE is not set
-+# CONFIG_MTD_LATCH_ADDR is not set
-+# CONFIG_MTD_LPDDR is not set
-+# CONFIG_MTD_LPDDR2_NVM is not set
-+# CONFIG_MTD_M25P80 is not set
-+CONFIG_MTD_MAP_BANK_WIDTH_1=y
-+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-+CONFIG_MTD_MAP_BANK_WIDTH_2=y
-+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-+CONFIG_MTD_MAP_BANK_WIDTH_4=y
-+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-+# CONFIG_MTD_MCHP23K256 is not set
-+# CONFIG_MTD_MT81xx_NOR is not set
-+# CONFIG_MTD_MTDRAM is not set
-+# CONFIG_MTD_MYLOADER_PARTS is not set
-+# CONFIG_MTD_NAND is not set
-+# CONFIG_MTD_NAND_AMS_DELTA is not set
-+# CONFIG_MTD_NAND_AR934X is not set
-+# CONFIG_MTD_NAND_AR934X_HW_ECC is not set
-+# CONFIG_MTD_NAND_ARASAN is not set
-+# CONFIG_MTD_NAND_ATMEL is not set
-+# CONFIG_MTD_NAND_AU1550 is not set
-+# CONFIG_MTD_NAND_BCH is not set
-+# CONFIG_MTD_NAND_BF5XX is not set
-+# CONFIG_MTD_NAND_BRCMNAND is not set
-+# CONFIG_MTD_NAND_CADENCE is not set
-+# CONFIG_MTD_NAND_CAFE is not set
-+# CONFIG_MTD_NAND_CM_X270 is not set
-+# CONFIG_MTD_NAND_CS553X is not set
-+# CONFIG_MTD_NAND_DAVINCI is not set
-+# CONFIG_MTD_NAND_DENALI is not set
-+# CONFIG_MTD_NAND_DENALI_DT is not set
-+# CONFIG_MTD_NAND_DENALI_PCI is not set
-+CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR=0xff108018
-+# CONFIG_MTD_NAND_DISKONCHIP is not set
-+# CONFIG_MTD_NAND_DOCG4 is not set
-+# CONFIG_MTD_NAND_ECC is not set
-+# CONFIG_MTD_NAND_ECC_BCH is not set
-+# CONFIG_MTD_NAND_ECC_SMC is not set
-+# CONFIG_MTD_NAND_ECC_SW_BCH is not set
-+# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set
-+# CONFIG_MTD_NAND_FSL_ELBC is not set
-+# CONFIG_MTD_NAND_FSL_IFC is not set
-+# CONFIG_MTD_NAND_FSL_UPM is not set
-+# CONFIG_MTD_NAND_FSMC is not set
-+# CONFIG_MTD_NAND_GPIO is not set
-+# CONFIG_MTD_NAND_GPMI_NAND is not set
-+# CONFIG_MTD_NAND_HISI504 is not set
-+CONFIG_MTD_NAND_IDS=y
-+# CONFIG_MTD_NAND_JZ4740 is not set
-+# CONFIG_MTD_NAND_MPC5121_NFC is not set
-+# CONFIG_MTD_NAND_MTK is not set
-+# CONFIG_MTD_NAND_MXC is not set
-+# CONFIG_MTD_NAND_MXIC is not set
-+# CONFIG_MTD_NAND_NANDSIM is not set
-+# CONFIG_MTD_NAND_NDFC is not set
-+# CONFIG_MTD_NAND_NUC900 is not set
-+# CONFIG_MTD_NAND_OMAP2 is not set
-+# CONFIG_MTD_NAND_OMAP_BCH_BUILD is not set
-+# CONFIG_MTD_NAND_ORION is not set
-+# CONFIG_MTD_NAND_PASEMI is not set
-+# CONFIG_MTD_NAND_PLATFORM is not set
-+# CONFIG_MTD_NAND_PXA3xx is not set
-+# CONFIG_MTD_NAND_RB4XX is not set
-+# CONFIG_MTD_NAND_RB750 is not set
-+# CONFIG_MTD_NAND_RICOH is not set
-+# CONFIG_MTD_NAND_S3C2410 is not set
-+# CONFIG_MTD_NAND_SHARPSL is not set
-+# CONFIG_MTD_NAND_SH_FLCTL is not set
-+# CONFIG_MTD_NAND_SOCRATES is not set
-+# CONFIG_MTD_NAND_TMIO is not set
-+# CONFIG_MTD_NAND_TXX9NDFMC is not set
-+CONFIG_MTD_OF_PARTS=y
-+# CONFIG_MTD_ONENAND is not set
-+# CONFIG_MTD_OOPS is not set
-+# CONFIG_MTD_OTP is not set
-+# CONFIG_MTD_PARTITIONED_MASTER is not set
-+# CONFIG_MTD_PCI is not set
-+# CONFIG_MTD_PCMCIA is not set
-+# CONFIG_MTD_PHRAM is not set
-+# CONFIG_MTD_PHYSMAP is not set
-+# CONFIG_MTD_PHYSMAP_COMPAT is not set
-+# CONFIG_MTD_PHYSMAP_GEMINI is not set
-+# CONFIG_MTD_PHYSMAP_GPIO_ADDR is not set
-+CONFIG_MTD_PHYSMAP_OF=y
-+# CONFIG_MTD_PHYSMAP_OF_GEMINI is not set
-+# CONFIG_MTD_PHYSMAP_OF_VERSATILE is not set
-+# CONFIG_MTD_PHYSMAP_VERSATILE is not set
-+# CONFIG_MTD_PLATRAM is not set
-+# CONFIG_MTD_PMC551 is not set
-+# CONFIG_MTD_RAM is not set
-+# CONFIG_MTD_RAW_NAND is not set
-+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
-+# CONFIG_MTD_REDBOOT_PARTS is not set
-+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
-+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
-+# CONFIG_MTD_ROM is not set
-+CONFIG_MTD_ROOTFS_ROOT_DEV=y
-+# CONFIG_MTD_ROUTERBOOT_PARTS is not set
-+# CONFIG_MTD_SLRAM is not set
-+# CONFIG_MTD_SM_COMMON is not set
-+# CONFIG_MTD_SPINAND_MT29F is not set
-+# CONFIG_MTD_SPI_NAND is not set
-+# CONFIG_MTD_SPI_NOR is not set
-+# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
-+CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=4096
-+CONFIG_MTD_SPLIT=y
-+# CONFIG_MTD_SPLIT_BCM63XX_FW is not set
-+# CONFIG_MTD_SPLIT_BCM_WFI_FW is not set
-+# CONFIG_MTD_SPLIT_BRNIMAGE_FW is not set
-+# CONFIG_MTD_SPLIT_ELF_FW is not set
-+# CONFIG_MTD_SPLIT_EVA_FW is not set
-+# CONFIG_MTD_SPLIT_FIRMWARE is not set
-+CONFIG_MTD_SPLIT_FIRMWARE_NAME="firmware"
-+# CONFIG_MTD_SPLIT_FIT_FW is not set
-+# CONFIG_MTD_SPLIT_JIMAGE_FW is not set
-+# CONFIG_MTD_SPLIT_LZMA_FW is not set
-+# CONFIG_MTD_SPLIT_MINOR_FW is not set
-+# CONFIG_MTD_SPLIT_SEAMA_FW is not set
-+CONFIG_MTD_SPLIT_SQUASHFS_ROOT=y
-+CONFIG_MTD_SPLIT_SUPPORT=y
-+# CONFIG_MTD_SPLIT_TPLINK_FW is not set
-+# CONFIG_MTD_SPLIT_TRX_FW is not set
-+# CONFIG_MTD_SPLIT_UIMAGE_FW is not set
-+# CONFIG_MTD_SPLIT_WRGG_FW is not set
-+# CONFIG_MTD_SST25L is not set
-+# CONFIG_MTD_SWAP is not set
-+# CONFIG_MTD_TESTS is not set
-+# CONFIG_MTD_UBI is not set
-+# CONFIG_MTD_UBI_FASTMAP is not set
-+# CONFIG_MTD_UBI_GLUEBI is not set
-+# CONFIG_MTD_UIMAGE_SPLIT is not set
-+# CONFIG_MTD_VIRT_CONCAT is not set
-+# CONFIG_MTK_MMC is not set
-+# CONFIG_MTK_MMSYS is not set
-+CONFIG_MULTIUSER=y
-+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
-+# CONFIG_MV643XX_ETH is not set
-+# CONFIG_MVMDIO is not set
-+# CONFIG_MVNETA_BM is not set
-+# CONFIG_MVSW61XX_PHY is not set
-+# CONFIG_MVSWITCH_PHY is not set
-+# CONFIG_MV_XOR_V2 is not set
-+# CONFIG_MWAVE is not set
-+# CONFIG_MWL8K is not set
-+# CONFIG_MXC4005 is not set
-+# CONFIG_MXC6255 is not set
-+# CONFIG_MYRI10GE is not set
-+# CONFIG_NAMESPACES is not set
-+# CONFIG_NATIONAL_PHY is not set
-+# CONFIG_NATSEMI is not set
-+# CONFIG_NAU7802 is not set
-+# CONFIG_NBPFAXI_DMA is not set
-+# CONFIG_NCP_FS is not set
-+# CONFIG_NE2000 is not set
-+# CONFIG_NE2K_PCI is not set
-+# CONFIG_NEC_MARKEINS is not set
-+CONFIG_NET=y
-+# CONFIG_NETCONSOLE is not set
-+CONFIG_NETDEVICES=y
-+# CONFIG_NETDEVSIM is not set
-+# CONFIG_NETFILTER is not set
-+# CONFIG_NETFILTER_ADVANCED is not set
-+# CONFIG_NETFILTER_DEBUG is not set
-+# CONFIG_NETFILTER_INGRESS is not set
-+# CONFIG_NETFILTER_NETLINK is not set
-+# CONFIG_NETFILTER_NETLINK_ACCT is not set
-+# CONFIG_NETFILTER_NETLINK_GLUE_CT is not set
-+# CONFIG_NETFILTER_NETLINK_LOG is not set
-+# CONFIG_NETFILTER_NETLINK_OSF is not set
-+# CONFIG_NETFILTER_NETLINK_QUEUE is not set
-+# CONFIG_NETFILTER_XTABLES is not set
-+# CONFIG_NETFILTER_XT_CONNMARK is not set
-+# CONFIG_NETFILTER_XT_MARK is not set
-+# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set
-+# CONFIG_NETFILTER_XT_MATCH_BPF is not set
-+# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set
-+# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set
-+# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
-+# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set
-+# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set
-+# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
-+# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set
-+# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set
-+# CONFIG_NETFILTER_XT_MATCH_CPU is not set
-+# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
-+# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set
-+# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
-+# CONFIG_NETFILTER_XT_MATCH_ECN is not set
-+# CONFIG_NETFILTER_XT_MATCH_ESP is not set
-+# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
-+# CONFIG_NETFILTER_XT_MATCH_HELPER is not set
-+# CONFIG_NETFILTER_XT_MATCH_HL is not set
-+# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set
-+# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
-+# CONFIG_NETFILTER_XT_MATCH_L2TP is not set
-+# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
-+# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
-+# CONFIG_NETFILTER_XT_MATCH_MAC is not set
-+# CONFIG_NETFILTER_XT_MATCH_MARK is not set
-+# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
-+# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set
-+# CONFIG_NETFILTER_XT_MATCH_OSF is not set
-+# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
-+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
-+# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
-+# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
-+# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
-+# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
-+# CONFIG_NETFILTER_XT_MATCH_REALM is not set
-+# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
-+# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
-+# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set
-+# CONFIG_NETFILTER_XT_MATCH_STATE is not set
-+# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
-+# CONFIG_NETFILTER_XT_MATCH_STRING is not set
-+# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
-+# CONFIG_NETFILTER_XT_MATCH_TIME is not set
-+# CONFIG_NETFILTER_XT_MATCH_U32 is not set
-+# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set
-+# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set
-+# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
-+# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
-+# CONFIG_NETFILTER_XT_TARGET_CT is not set
-+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
-+# CONFIG_NETFILTER_XT_TARGET_HL is not set
-+# CONFIG_NETFILTER_XT_TARGET_HMARK is not set
-+# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set
-+# CONFIG_NETFILTER_XT_TARGET_LED is not set
-+# CONFIG_NETFILTER_XT_TARGET_LOG is not set
-+# CONFIG_NETFILTER_XT_TARGET_MARK is not set
-+# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set
-+# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
-+# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
-+# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
-+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
-+# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set
-+# CONFIG_NETFILTER_XT_TARGET_SECMARK is not set
-+# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
-+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
-+# CONFIG_NETFILTER_XT_TARGET_TEE is not set
-+# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set
-+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
-+# CONFIG_NETLABEL is not set
-+# CONFIG_NETLINK_DIAG is not set
-+# CONFIG_NETLINK_MMAP is not set
-+# CONFIG_NETPOLL is not set
-+# CONFIG_NETROM is not set
-+CONFIG_NETWORK_FILESYSTEMS=y
-+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
-+# CONFIG_NETWORK_SECMARK is not set
-+# CONFIG_NETXEN_NIC is not set
-+# CONFIG_NET_9P is not set
-+# CONFIG_NET_ACT_BPF is not set
-+# CONFIG_NET_ACT_CSUM is not set
-+# CONFIG_NET_ACT_CT is not set
-+# CONFIG_NET_ACT_GACT is not set
-+# CONFIG_NET_ACT_GATE is not set
-+# CONFIG_NET_ACT_IFE is not set
-+# CONFIG_NET_ACT_IPT is not set
-+# CONFIG_NET_ACT_MIRRED is not set
-+# CONFIG_NET_ACT_MPLS is not set
-+# CONFIG_NET_ACT_NAT is not set
-+# CONFIG_NET_ACT_PEDIT is not set
-+# CONFIG_NET_ACT_POLICE is not set
-+# CONFIG_NET_ACT_SAMPLE is not set
-+# CONFIG_NET_ACT_SIMP is not set
-+# CONFIG_NET_ACT_SKBEDIT is not set
-+# CONFIG_NET_ACT_SKBMOD is not set
-+# CONFIG_NET_ACT_TUNNEL_KEY is not set
-+# CONFIG_NET_ACT_VLAN is not set
-+CONFIG_NET_CADENCE=y
-+# CONFIG_NET_CALXEDA_XGMAC is not set
-+CONFIG_NET_CLS=y
-+# CONFIG_NET_CLS_ACT is not set
-+# CONFIG_NET_CLS_BASIC is not set
-+# CONFIG_NET_CLS_BPF is not set
-+# CONFIG_NET_CLS_FLOW is not set
-+# CONFIG_NET_CLS_FLOWER is not set
-+# CONFIG_NET_CLS_FW is not set
-+CONFIG_NET_CLS_IND=y
-+# CONFIG_NET_CLS_MATCHALL is not set
-+# CONFIG_NET_CLS_ROUTE4 is not set
-+# CONFIG_NET_CLS_RSVP is not set
-+# CONFIG_NET_CLS_RSVP6 is not set
-+# CONFIG_NET_CLS_TCINDEX is not set
-+# CONFIG_NET_CLS_U32 is not set
-+CONFIG_NET_CORE=y
-+# CONFIG_NET_DEVLINK is not set
-+# CONFIG_NET_DROP_MONITOR is not set
-+# CONFIG_NET_DSA is not set
-+# CONFIG_NET_DSA_AR9331 is not set
-+# CONFIG_NET_DSA_BCM_SF2 is not set
-+# CONFIG_NET_DSA_LANTIQ_GSWIP is not set
-+# CONFIG_NET_DSA_LEGACY is not set
-+# CONFIG_NET_DSA_LOOP is not set
-+# CONFIG_NET_DSA_MICROCHIP_KSZ8795 is not set
-+# CONFIG_NET_DSA_MICROCHIP_KSZ9477 is not set
-+# CONFIG_NET_DSA_MSCC_SEVILLE is not set
-+# CONFIG_NET_DSA_MT7530 is not set
-+# CONFIG_NET_DSA_MV88E6060 is not set
-+# CONFIG_NET_DSA_MV88E6123_61_65 is not set
-+# CONFIG_NET_DSA_MV88E6131 is not set
-+# CONFIG_NET_DSA_MV88E6171 is not set
-+# CONFIG_NET_DSA_MV88E6352 is not set
-+# CONFIG_NET_DSA_MV88E6XXX is not set
-+# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
-+# CONFIG_NET_DSA_MV88E6XXX_PTP is not set
-+# CONFIG_NET_DSA_QCA8K is not set
-+# CONFIG_NET_DSA_REALTEK_SMI is not set
-+# CONFIG_NET_DSA_SJA1105 is not set
-+# CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set
-+# CONFIG_NET_DSA_SMSC_LAN9303_MDIO is not set
-+# CONFIG_NET_DSA_TAG_8021Q is not set
-+# CONFIG_NET_DSA_TAG_AR9331 is not set
-+# CONFIG_NET_DSA_TAG_BRCM is not set
-+# CONFIG_NET_DSA_TAG_BRCM_PREPEND is not set
-+# CONFIG_NET_DSA_TAG_DSA is not set
-+# CONFIG_NET_DSA_TAG_EDSA is not set
-+# CONFIG_NET_DSA_TAG_GSWIP is not set
-+# CONFIG_NET_DSA_TAG_KSZ is not set
-+# CONFIG_NET_DSA_TAG_LAN9303 is not set
-+# CONFIG_NET_DSA_TAG_MTK is not set
-+# CONFIG_NET_DSA_TAG_OCELOT is not set
-+# CONFIG_NET_DSA_TAG_QCA is not set
-+# CONFIG_NET_DSA_TAG_RTL4_A is not set
-+# CONFIG_NET_DSA_TAG_SJA1105 is not set
-+# CONFIG_NET_DSA_TAG_TRAILER is not set
-+# CONFIG_NET_DSA_VITESSE_VSC73XX is not set
-+# CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM is not set
-+# CONFIG_NET_DSA_VITESSE_VSC73XX_SPI is not set
-+# CONFIG_NET_EMATCH is not set
-+# CONFIG_NET_EMATCH_CANID is not set
-+# CONFIG_NET_EMATCH_CMP is not set
-+# CONFIG_NET_EMATCH_IPT is not set
-+# CONFIG_NET_EMATCH_META is not set
-+# CONFIG_NET_EMATCH_NBYTE is not set
-+CONFIG_NET_EMATCH_STACK=32
-+# CONFIG_NET_EMATCH_TEXT is not set
-+# CONFIG_NET_EMATCH_U32 is not set
-+# CONFIG_NET_FAILOVER is not set
-+# CONFIG_NET_FC is not set
-+# CONFIG_NET_FOU is not set
-+# CONFIG_NET_FOU_IP_TUNNELS is not set
-+# CONFIG_NET_IFE is not set
-+# CONFIG_NET_IPGRE is not set
-+CONFIG_NET_IPGRE_BROADCAST=y
-+# CONFIG_NET_IPGRE_DEMUX is not set
-+# CONFIG_NET_IPIP is not set
-+# CONFIG_NET_IPVTI is not set
-+# CONFIG_NET_IP_TUNNEL is not set
-+# CONFIG_NET_KEY is not set
-+# CONFIG_NET_KEY_MIGRATE is not set
-+# CONFIG_NET_L3_MASTER_DEV is not set
-+# CONFIG_NET_MEDIATEK_STAR_EMAC is not set
-+# CONFIG_NET_MPLS_GSO is not set
-+# CONFIG_NET_NCSI is not set
-+# CONFIG_NET_NSH is not set
-+# CONFIG_NET_PACKET_ENGINE is not set
-+# CONFIG_NET_PKTGEN is not set
-+# CONFIG_NET_POLL_CONTROLLER is not set
-+# CONFIG_NET_PTP_CLASSIFY is not set
-+CONFIG_NET_RX_BUSY_POLL=y
-+# CONFIG_NET_SB1000 is not set
-+CONFIG_NET_SCHED=y
-+# CONFIG_NET_SCH_ATM is not set
-+# CONFIG_NET_SCH_CAKE is not set
-+# CONFIG_NET_SCH_CBQ is not set
-+# CONFIG_NET_SCH_CBS is not set
-+# CONFIG_NET_SCH_CHOKE is not set
-+# CONFIG_NET_SCH_CODEL is not set
-+# CONFIG_NET_SCH_DEFAULT is not set
-+# CONFIG_NET_SCH_DRR is not set
-+# CONFIG_NET_SCH_DSMARK is not set
-+# CONFIG_NET_SCH_ETF is not set
-+# CONFIG_NET_SCH_ETS is not set
-+CONFIG_NET_SCH_FIFO=y
-+# CONFIG_NET_SCH_FQ is not set
-+CONFIG_NET_SCH_FQ_CODEL=y
-+# CONFIG_NET_SCH_FQ_PIE is not set
-+# CONFIG_NET_SCH_GRED is not set
-+# CONFIG_NET_SCH_HFSC is not set
-+# CONFIG_NET_SCH_HHF is not set
-+# CONFIG_NET_SCH_HTB is not set
-+# CONFIG_NET_SCH_INGRESS is not set
-+# CONFIG_NET_SCH_MQPRIO is not set
-+# CONFIG_NET_SCH_MULTIQ is not set
-+# CONFIG_NET_SCH_NETEM is not set
-+# CONFIG_NET_SCH_PIE is not set
-+# CONFIG_NET_SCH_PLUG is not set
-+# CONFIG_NET_SCH_PRIO is not set
-+# CONFIG_NET_SCH_QFQ is not set
-+# CONFIG_NET_SCH_RED is not set
-+# CONFIG_NET_SCH_SFB is not set
-+# CONFIG_NET_SCH_SFQ is not set
-+# CONFIG_NET_SCH_SKBPRIO is not set
-+# CONFIG_NET_SCH_TAPRIO is not set
-+# CONFIG_NET_SCH_TBF is not set
-+# CONFIG_NET_SCH_TEQL is not set
-+# CONFIG_NET_SCTPPROBE is not set
-+# CONFIG_NET_SWITCHDEV is not set
-+# CONFIG_NET_TCPPROBE is not set
-+# CONFIG_NET_TC_SKB_EXT is not set
-+# CONFIG_NET_TEAM is not set
-+# CONFIG_NET_TULIP is not set
-+# CONFIG_NET_UDP_TUNNEL is not set
-+CONFIG_NET_VENDOR_3COM=y
-+CONFIG_NET_VENDOR_8390=y
-+CONFIG_NET_VENDOR_ADAPTEC=y
-+CONFIG_NET_VENDOR_AGERE=y
-+CONFIG_NET_VENDOR_ALACRITECH=y
-+CONFIG_NET_VENDOR_ALTEON=y
-+CONFIG_NET_VENDOR_AMAZON=y
-+CONFIG_NET_VENDOR_AMD=y
-+CONFIG_NET_VENDOR_AQUANTIA=y
-+CONFIG_NET_VENDOR_ARC=y
-+CONFIG_NET_VENDOR_ATHEROS=y
-+CONFIG_NET_VENDOR_AURORA=y
-+CONFIG_NET_VENDOR_BROADCOM=y
-+CONFIG_NET_VENDOR_BROCADE=y
-+CONFIG_NET_VENDOR_CADENCE=y
-+CONFIG_NET_VENDOR_CAVIUM=y
-+CONFIG_NET_VENDOR_CHELSIO=y
-+CONFIG_NET_VENDOR_CIRRUS=y
-+CONFIG_NET_VENDOR_CISCO=y
-+CONFIG_NET_VENDOR_CORTINA=y
-+CONFIG_NET_VENDOR_DEC=y
-+CONFIG_NET_VENDOR_DLINK=y
-+CONFIG_NET_VENDOR_EMULEX=y
-+CONFIG_NET_VENDOR_EXAR=y
-+CONFIG_NET_VENDOR_EZCHIP=y
-+CONFIG_NET_VENDOR_FARADAY=y
-+CONFIG_NET_VENDOR_FREESCALE=y
-+CONFIG_NET_VENDOR_FUJITSU=y
-+CONFIG_NET_VENDOR_GOOGLE=y
-+CONFIG_NET_VENDOR_HISILICON=y
-+CONFIG_NET_VENDOR_HP=y
-+CONFIG_NET_VENDOR_HUAWEI=y
-+CONFIG_NET_VENDOR_I825XX=y
-+CONFIG_NET_VENDOR_IBM=y
-+CONFIG_NET_VENDOR_INTEL=y
-+CONFIG_NET_VENDOR_MARVELL=y
-+CONFIG_NET_VENDOR_MELLANOX=y
-+CONFIG_NET_VENDOR_MICREL=y
-+CONFIG_NET_VENDOR_MICROCHIP=y
-+CONFIG_NET_VENDOR_MICROSEMI=y
-+CONFIG_NET_VENDOR_MYRI=y
-+CONFIG_NET_VENDOR_NATSEMI=y
-+CONFIG_NET_VENDOR_NETERION=y
-+CONFIG_NET_VENDOR_NETRONOME=y
-+CONFIG_NET_VENDOR_NI=y
-+CONFIG_NET_VENDOR_NVIDIA=y
-+CONFIG_NET_VENDOR_OKI=y
-+CONFIG_NET_VENDOR_PACKET_ENGINES=y
-+CONFIG_NET_VENDOR_PENSANDO=y
-+CONFIG_NET_VENDOR_QLOGIC=y
-+CONFIG_NET_VENDOR_QUALCOMM=y
-+CONFIG_NET_VENDOR_RDC=y
-+CONFIG_NET_VENDOR_REALTEK=y
-+CONFIG_NET_VENDOR_RENESAS=y
-+CONFIG_NET_VENDOR_ROCKER=y
-+CONFIG_NET_VENDOR_SAMSUNG=y
-+CONFIG_NET_VENDOR_SEEQ=y
-+CONFIG_NET_VENDOR_SILAN=y
-+CONFIG_NET_VENDOR_SIS=y
-+CONFIG_NET_VENDOR_SMSC=y
-+CONFIG_NET_VENDOR_SOCIONEXT=y
-+CONFIG_NET_VENDOR_SOLARFLARE=y
-+CONFIG_NET_VENDOR_STMICRO=y
-+CONFIG_NET_VENDOR_SUN=y
-+CONFIG_NET_VENDOR_SYNOPSYS=y
-+CONFIG_NET_VENDOR_TEHUTI=y
-+CONFIG_NET_VENDOR_TI=y
-+CONFIG_NET_VENDOR_TOSHIBA=y
-+CONFIG_NET_VENDOR_VIA=y
-+CONFIG_NET_VENDOR_WIZNET=y
-+CONFIG_NET_VENDOR_XILINX=y
-+CONFIG_NET_VENDOR_XIRCOM=y
-+# CONFIG_NET_VRF is not set
-+# CONFIG_NET_XGENE is not set
-+CONFIG_NEW_LEDS=y
-+# CONFIG_NFC is not set
-+# CONFIG_NFP is not set
-+# CONFIG_NFSD is not set
-+# CONFIG_NFSD_V2_ACL is not set
-+CONFIG_NFSD_V3=y
-+# CONFIG_NFSD_V3_ACL is not set
-+# CONFIG_NFSD_V4 is not set
-+# CONFIG_NFS_ACL_SUPPORT is not set
-+CONFIG_NFS_COMMON=y
-+# CONFIG_NFS_DISABLE_UDP_SUPPORT is not set
-+# CONFIG_NFS_FS is not set
-+# CONFIG_NFS_FSCACHE is not set
-+# CONFIG_NFS_SWAP is not set
-+# CONFIG_NFS_V2 is not set
-+CONFIG_NFS_V3=y
-+# CONFIG_NFS_V3_ACL is not set
-+# CONFIG_NFS_V4 is not set
-+# CONFIG_NFS_V4_1 is not set
-+# CONFIG_NFTL is not set
-+# CONFIG_NFT_BRIDGE_META is not set
-+# CONFIG_NFT_BRIDGE_REJECT is not set
-+# CONFIG_NFT_CONNLIMIT is not set
-+# CONFIG_NFT_DUP_IPV4 is not set
-+# CONFIG_NFT_DUP_IPV6 is not set
-+# CONFIG_NFT_FIB_IPV4 is not set
-+# CONFIG_NFT_FIB_IPV6 is not set
-+# CONFIG_NFT_FIB_NETDEV is not set
-+# CONFIG_NFT_FLOW_OFFLOAD is not set
-+# CONFIG_NFT_OBJREF is not set
-+# CONFIG_NFT_OSF is not set
-+# CONFIG_NFT_RT is not set
-+# CONFIG_NFT_SET_BITMAP is not set
-+# CONFIG_NFT_SOCKET is not set
-+# CONFIG_NFT_SYNPROXY is not set
-+# CONFIG_NFT_TPROXY is not set
-+# CONFIG_NFT_TUNNEL is not set
-+# CONFIG_NFT_XFRM is not set
-+# CONFIG_NF_CONNTRACK is not set
-+# CONFIG_NF_CONNTRACK_AMANDA is not set
-+# CONFIG_NF_CONNTRACK_BRIDGE is not set
-+# CONFIG_NF_CONNTRACK_EVENTS is not set
-+# CONFIG_NF_CONNTRACK_FTP is not set
-+# CONFIG_NF_CONNTRACK_H323 is not set
-+# CONFIG_NF_CONNTRACK_IPV4 is not set
-+# CONFIG_NF_CONNTRACK_IPV6 is not set
-+# CONFIG_NF_CONNTRACK_IRC is not set
-+# CONFIG_NF_CONNTRACK_LABELS is not set
-+# CONFIG_NF_CONNTRACK_MARK is not set
-+# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
-+# CONFIG_NF_CONNTRACK_PPTP is not set
-+CONFIG_NF_CONNTRACK_PROCFS=y
-+# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set
-+# CONFIG_NF_CONNTRACK_SANE is not set
-+# CONFIG_NF_CONNTRACK_SECMARK is not set
-+# CONFIG_NF_CONNTRACK_SIP is not set
-+# CONFIG_NF_CONNTRACK_SNMP is not set
-+# CONFIG_NF_CONNTRACK_TFTP is not set
-+# CONFIG_NF_CONNTRACK_TIMEOUT is not set
-+# CONFIG_NF_CONNTRACK_TIMESTAMP is not set
-+# CONFIG_NF_CONNTRACK_ZONES is not set
-+# CONFIG_NF_CT_NETLINK is not set
-+# CONFIG_NF_CT_NETLINK_HELPER is not set
-+# CONFIG_NF_CT_NETLINK_TIMEOUT is not set
-+# CONFIG_NF_CT_PROTO_DCCP is not set
-+# CONFIG_NF_CT_PROTO_GRE is not set
-+# CONFIG_NF_CT_PROTO_SCTP is not set
-+# CONFIG_NF_CT_PROTO_UDPLITE is not set
-+# CONFIG_NF_DEFRAG_IPV4 is not set
-+# CONFIG_NF_DUP_IPV4 is not set
-+# CONFIG_NF_DUP_IPV6 is not set
-+# CONFIG_NF_FLOW_TABLE is not set
-+# CONFIG_NF_LOG_ARP is not set
-+# CONFIG_NF_LOG_BRIDGE is not set
-+# CONFIG_NF_LOG_IPV4 is not set
-+# CONFIG_NF_LOG_NETDEV is not set
-+# CONFIG_NF_NAT is not set
-+# CONFIG_NF_NAT_AMANDA is not set
-+# CONFIG_NF_NAT_FTP is not set
-+# CONFIG_NF_NAT_H323 is not set
-+# CONFIG_NF_NAT_IPV6 is not set
-+# CONFIG_NF_NAT_IRC is not set
-+CONFIG_NF_NAT_MASQUERADE_IPV4=y
-+CONFIG_NF_NAT_MASQUERADE_IPV6=y
-+# CONFIG_NF_NAT_NEEDED is not set
-+# CONFIG_NF_NAT_PPTP is not set
-+# CONFIG_NF_NAT_PROTO_GRE is not set
-+# CONFIG_NF_NAT_SIP is not set
-+# CONFIG_NF_NAT_SNMP_BASIC is not set
-+# CONFIG_NF_NAT_TFTP is not set
-+# CONFIG_NF_REJECT_IPV4 is not set
-+# CONFIG_NF_REJECT_IPV6 is not set
-+# CONFIG_NF_SOCKET_IPV4 is not set
-+# CONFIG_NF_SOCKET_IPV6 is not set
-+# CONFIG_NF_TABLES is not set
-+CONFIG_NF_TABLES_ARP=y
-+CONFIG_NF_TABLES_BRIDGE=y
-+CONFIG_NF_TABLES_INET=y
-+CONFIG_NF_TABLES_IPV4=y
-+CONFIG_NF_TABLES_IPV6=y
-+CONFIG_NF_TABLES_NETDEV=y
-+# CONFIG_NF_TABLES_SET is not set
-+# CONFIG_NF_TPROXY_IPV4 is not set
-+# CONFIG_NF_TPROXY_IPV6 is not set
-+# CONFIG_NI65 is not set
-+# CONFIG_NI903X_WDT is not set
-+# CONFIG_NIC7018_WDT is not set
-+# CONFIG_NILFS2_FS is not set
-+# CONFIG_NIU is not set
-+# CONFIG_NI_XGE_MANAGEMENT_ENET is not set
-+CONFIG_NLATTR=y
-+# CONFIG_NLMON is not set
-+# CONFIG_NLM_XLP_BOARD is not set
-+# CONFIG_NLM_XLR_BOARD is not set
-+# CONFIG_NLS is not set
-+# CONFIG_NLS_ASCII is not set
-+# CONFIG_NLS_CODEPAGE_1250 is not set
-+# CONFIG_NLS_CODEPAGE_1251 is not set
-+# CONFIG_NLS_CODEPAGE_437 is not set
-+# CONFIG_NLS_CODEPAGE_737 is not set
-+# CONFIG_NLS_CODEPAGE_775 is not set
-+# CONFIG_NLS_CODEPAGE_850 is not set
-+# CONFIG_NLS_CODEPAGE_852 is not set
-+# CONFIG_NLS_CODEPAGE_855 is not set
-+# CONFIG_NLS_CODEPAGE_857 is not set
-+# CONFIG_NLS_CODEPAGE_860 is not set
-+# CONFIG_NLS_CODEPAGE_861 is not set
-+# CONFIG_NLS_CODEPAGE_862 is not set
-+# CONFIG_NLS_CODEPAGE_863 is not set
-+# CONFIG_NLS_CODEPAGE_864 is not set
-+# CONFIG_NLS_CODEPAGE_865 is not set
-+# CONFIG_NLS_CODEPAGE_866 is not set
-+# CONFIG_NLS_CODEPAGE_869 is not set
-+# CONFIG_NLS_CODEPAGE_874 is not set
-+# CONFIG_NLS_CODEPAGE_932 is not set
-+# CONFIG_NLS_CODEPAGE_936 is not set
-+# CONFIG_NLS_CODEPAGE_949 is not set
-+# CONFIG_NLS_CODEPAGE_950 is not set
-+CONFIG_NLS_DEFAULT="iso8859-1"
-+# CONFIG_NLS_ISO8859_1 is not set
-+# CONFIG_NLS_ISO8859_13 is not set
-+# CONFIG_NLS_ISO8859_14 is not set
-+# CONFIG_NLS_ISO8859_15 is not set
-+# CONFIG_NLS_ISO8859_2 is not set
-+# CONFIG_NLS_ISO8859_3 is not set
-+# CONFIG_NLS_ISO8859_4 is not set
-+# CONFIG_NLS_ISO8859_5 is not set
-+# CONFIG_NLS_ISO8859_6 is not set
-+# CONFIG_NLS_ISO8859_7 is not set
-+# CONFIG_NLS_ISO8859_8 is not set
-+# CONFIG_NLS_ISO8859_9 is not set
-+# CONFIG_NLS_KOI8_R is not set
-+# CONFIG_NLS_KOI8_U is not set
-+# CONFIG_NLS_MAC_CELTIC is not set
-+# CONFIG_NLS_MAC_CENTEURO is not set
-+# CONFIG_NLS_MAC_CROATIAN is not set
-+# CONFIG_NLS_MAC_CYRILLIC is not set
-+# CONFIG_NLS_MAC_GAELIC is not set
-+# CONFIG_NLS_MAC_GREEK is not set
-+# CONFIG_NLS_MAC_ICELAND is not set
-+# CONFIG_NLS_MAC_INUIT is not set
-+# CONFIG_NLS_MAC_ROMAN is not set
-+# CONFIG_NLS_MAC_ROMANIAN is not set
-+# CONFIG_NLS_MAC_TURKISH is not set
-+# CONFIG_NLS_UTF8 is not set
-+CONFIG_NMI_LOG_BUF_SHIFT=13
-+# CONFIG_NOA1305 is not set
-+# CONFIG_NOP_USB_XCEIV is not set
-+# CONFIG_NORTEL_HERMES is not set
-+# CONFIG_NOTIFIER_ERROR_INJECTION is not set
-+# CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT is not set
-+# CONFIG_NOZOMI is not set
-+# CONFIG_NO_BOOTMEM is not set
-+# CONFIG_NO_HZ is not set
-+# CONFIG_NO_HZ_FULL is not set
-+# CONFIG_NO_HZ_IDLE is not set
-+# CONFIG_NS83820 is not set
-+# CONFIG_NTB is not set
-+# CONFIG_NTFS_DEBUG is not set
-+# CONFIG_NTFS_FS is not set
-+# CONFIG_NTFS_RW is not set
-+# CONFIG_NTP_PPS is not set
-+# CONFIG_NULL_TTY is not set
-+# CONFIG_NUMA is not set
-+# CONFIG_NVM is not set
-+# CONFIG_NVMEM is not set
-+# CONFIG_NVMEM_BCM_OCOTP is not set
-+# CONFIG_NVMEM_IMX_OCOTP is not set
-+# CONFIG_NVMEM_REBOOT_MODE is not set
-+# CONFIG_NVMEM_SYSFS is not set
-+# CONFIG_NVME_FC is not set
-+# CONFIG_NVME_TARGET is not set
-+# CONFIG_NVRAM is not set
-+# CONFIG_NV_TCO is not set
-+# CONFIG_NXP_STB220 is not set
-+# CONFIG_NXP_STB225 is not set
-+# CONFIG_NXP_TJA11XX_PHY is not set
-+# CONFIG_N_GSM is not set
-+# CONFIG_OABI_COMPAT is not set
-+# CONFIG_OBS600 is not set
-+# CONFIG_OCFS2_FS is not set
-+# CONFIG_OCTEONTX2_AF is not set
-+# CONFIG_OCTEONTX2_PF is not set
-+# CONFIG_OF_OVERLAY is not set
-+CONFIG_OF_RESERVED_MEM=y
-+# CONFIG_OF_UNITTEST is not set
-+# CONFIG_OMAP2_DSS_DEBUG is not set
-+# CONFIG_OMAP2_DSS_DEBUGFS is not set
-+# CONFIG_OMAP2_DSS_SDI is not set
-+# CONFIG_OMAP_OCP2SCP is not set
-+# CONFIG_OMAP_USB2 is not set
-+# CONFIG_OMFS_FS is not set
-+# CONFIG_OPENVSWITCH is not set
-+# CONFIG_OPROFILE is not set
-+# CONFIG_OPROFILE_EVENT_MULTIPLEX is not set
-+# CONFIG_OPT3001 is not set
-+CONFIG_OPTIMIZE_INLINING=y
-+# CONFIG_ORANGEFS_FS is not set
-+# CONFIG_ORION_WATCHDOG is not set
-+# CONFIG_OSF_PARTITION is not set
-+CONFIG_OVERLAY_FS=y
-+# CONFIG_OVERLAY_FS_INDEX is not set
-+# CONFIG_OVERLAY_FS_METACOPY is not set
-+CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y
-+# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set
-+CONFIG_OVERLAY_FS_XINO_AUTO=y
-+# CONFIG_OWL_LOADER is not set
-+# CONFIG_P54_COMMON is not set
-+# CONFIG_PA12203001 is not set
-+CONFIG_PACKET=y
-+# CONFIG_PACKET_DIAG is not set
-+# CONFIG_PACKING is not set
-+# CONFIG_PAGE_EXTENSION is not set
-+# CONFIG_PAGE_OWNER is not set
-+# CONFIG_PAGE_POISONING is not set
-+# CONFIG_PAGE_REPORTING is not set
-+# CONFIG_PAGE_SIZE_16KB is not set
-+# CONFIG_PAGE_SIZE_32KB is not set
-+CONFIG_PAGE_SIZE_4KB=y
-+# CONFIG_PAGE_SIZE_64KB is not set
-+# CONFIG_PAGE_SIZE_8KB is not set
-+# CONFIG_PALMAS_GPADC is not set
-+# CONFIG_PANASONIC_LAPTOP is not set
-+# CONFIG_PANEL is not set
-+CONFIG_PANIC_ON_OOPS=y
-+CONFIG_PANIC_ON_OOPS_VALUE=1
-+CONFIG_PANIC_TIMEOUT=1
-+# CONFIG_PANTHERLORD_FF is not set
-+# CONFIG_PARAVIRT is not set
-+# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set
-+# CONFIG_PARPORT is not set
-+# CONFIG_PARPORT_1284 is not set
-+# CONFIG_PARPORT_AX88796 is not set
-+# CONFIG_PARPORT_GSC is not set
-+# CONFIG_PARPORT_PC is not set
-+CONFIG_PARTITION_ADVANCED=y
-+# CONFIG_PATA_ALI is not set
-+# CONFIG_PATA_AMD is not set
-+# CONFIG_PATA_ARASAN_CF is not set
-+# CONFIG_PATA_ARTOP is not set
-+# CONFIG_PATA_ATIIXP is not set
-+# CONFIG_PATA_ATP867X is not set
-+# CONFIG_PATA_CMD640_PCI is not set
-+# CONFIG_PATA_CMD64X is not set
-+# CONFIG_PATA_CS5520 is not set
-+# CONFIG_PATA_CS5530 is not set
-+# CONFIG_PATA_CS5535 is not set
-+# CONFIG_PATA_CS5536 is not set
-+# CONFIG_PATA_CYPRESS is not set
-+# CONFIG_PATA_EFAR is not set
-+# CONFIG_PATA_HPT366 is not set
-+# CONFIG_PATA_HPT37X is not set
-+# CONFIG_PATA_HPT3X2N is not set
-+# CONFIG_PATA_HPT3X3 is not set
-+# CONFIG_PATA_IMX is not set
-+# CONFIG_PATA_ISAPNP is not set
-+# CONFIG_PATA_IT8213 is not set
-+# CONFIG_PATA_IT821X is not set
-+# CONFIG_PATA_JMICRON is not set
-+# CONFIG_PATA_LEGACY is not set
-+# CONFIG_PATA_MARVELL is not set
-+# CONFIG_PATA_MPIIX is not set
-+# CONFIG_PATA_NETCELL is not set
-+# CONFIG_PATA_NINJA32 is not set
-+# CONFIG_PATA_NS87410 is not set
-+# CONFIG_PATA_NS87415 is not set
-+# CONFIG_PATA_OCTEON_CF is not set
-+# CONFIG_PATA_OF_PLATFORM is not set
-+# CONFIG_PATA_OLDPIIX is not set
-+# CONFIG_PATA_OPTI is not set
-+# CONFIG_PATA_OPTIDMA is not set
-+# CONFIG_PATA_PCMCIA is not set
-+# CONFIG_PATA_PDC2027X is not set
-+# CONFIG_PATA_PDC_OLD is not set
-+# CONFIG_PATA_PLATFORM is not set
-+# CONFIG_PATA_QDI is not set
-+# CONFIG_PATA_RADISYS is not set
-+# CONFIG_PATA_RDC is not set
-+# CONFIG_PATA_RZ1000 is not set
-+# CONFIG_PATA_SC1200 is not set
-+# CONFIG_PATA_SCH is not set
-+# CONFIG_PATA_SERVERWORKS is not set
-+# CONFIG_PATA_SIL680 is not set
-+# CONFIG_PATA_SIS is not set
-+# CONFIG_PATA_TOSHIBA is not set
-+# CONFIG_PATA_TRIFLEX is not set
-+# CONFIG_PATA_VIA is not set
-+# CONFIG_PATA_WINBOND is not set
-+# CONFIG_PATA_WINBOND_VLB is not set
-+# CONFIG_PC104 is not set
-+# CONFIG_PC300TOO is not set
-+# CONFIG_PCCARD is not set
-+# CONFIG_PCH_DMA is not set
-+# CONFIG_PCH_GBE is not set
-+# CONFIG_PCH_PHUB is not set
-+# CONFIG_PCI is not set
-+# CONFIG_PCI200SYN is not set
-+# CONFIG_PCIEAER is not set
-+# CONFIG_PCIEAER_INJECT is not set
-+# CONFIG_PCIEASPM is not set
-+# CONFIG_PCIEPORTBUS is not set
-+# CONFIG_PCIE_AL is not set
-+# CONFIG_PCIE_ALTERA is not set
-+# CONFIG_PCIE_ARMADA_8K is not set
-+# CONFIG_PCIE_BUS_DEFAULT is not set
-+# CONFIG_PCIE_BUS_PEER2PEER is not set
-+CONFIG_PCIE_BUS_PERFORMANCE=y
-+# CONFIG_PCIE_BUS_SAFE is not set
-+# CONFIG_PCIE_BUS_TUNE_OFF is not set
-+# CONFIG_PCIE_BW is not set
-+# CONFIG_PCIE_CADENCE_HOST is not set
-+# CONFIG_PCIE_CADENCE_PLAT_HOST is not set
-+# CONFIG_PCIE_DPC is not set
-+# CONFIG_PCIE_DW_PLAT is not set
-+# CONFIG_PCIE_DW_PLAT_HOST is not set
-+# CONFIG_PCIE_ECRC is not set
-+# CONFIG_PCIE_IPROC is not set
-+# CONFIG_PCIE_KIRIN is not set
-+# CONFIG_PCIE_LAYERSCAPE_GEN4 is not set
-+# CONFIG_PCIE_PTM is not set
-+# CONFIG_PCIE_XILINX is not set
-+# CONFIG_PCIPCWATCHDOG is not set
-+# CONFIG_PCI_ATMEL is not set
-+# CONFIG_PCI_CNB20LE_QUIRK is not set
-+# CONFIG_PCI_DEBUG is not set
-+# CONFIG_PCI_DISABLE_COMMON_QUIRKS is not set
-+# CONFIG_PCI_ENDPOINT is not set
-+# CONFIG_PCI_ENDPOINT_TEST is not set
-+# CONFIG_PCI_FTPCI100 is not set
-+# CONFIG_PCI_HERMES is not set
-+# CONFIG_PCI_HISI is not set
-+# CONFIG_PCI_HOST_GENERIC is not set
-+# CONFIG_PCI_HOST_THUNDER_ECAM is not set
-+# CONFIG_PCI_HOST_THUNDER_PEM is not set
-+# CONFIG_PCI_IOV is not set
-+# CONFIG_PCI_J721E_HOST is not set
-+# CONFIG_PCI_LAYERSCAPE is not set
-+# CONFIG_PCI_MESON is not set
-+# CONFIG_PCI_MSI is not set
-+# CONFIG_PCI_PASID is not set
-+# CONFIG_PCI_PF_STUB is not set
-+# CONFIG_PCI_PRI is not set
-+CONFIG_PCI_QUIRKS=y
-+# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set
-+# CONFIG_PCI_STUB is not set
-+# CONFIG_PCI_SW_SWITCHTEC is not set
-+CONFIG_PCI_SYSCALL=y
-+# CONFIG_PCI_V3_SEMI is not set
-+# CONFIG_PCI_XGENE is not set
-+# CONFIG_PCMCIA is not set
-+# CONFIG_PCMCIA_3C574 is not set
-+# CONFIG_PCMCIA_3C589 is not set
-+# CONFIG_PCMCIA_AHA152X is not set
-+# CONFIG_PCMCIA_ATMEL is not set
-+# CONFIG_PCMCIA_AXNET is not set
-+# CONFIG_PCMCIA_DEBUG is not set
-+# CONFIG_PCMCIA_FDOMAIN is not set
-+# CONFIG_PCMCIA_FMVJ18X is not set
-+# CONFIG_PCMCIA_HERMES is not set
-+# CONFIG_PCMCIA_LOAD_CIS is not set
-+# CONFIG_PCMCIA_NINJA_SCSI is not set
-+# CONFIG_PCMCIA_NMCLAN is not set
-+# CONFIG_PCMCIA_PCNET is not set
-+# CONFIG_PCMCIA_QLOGIC is not set
-+# CONFIG_PCMCIA_RAYCS is not set
-+# CONFIG_PCMCIA_SMC91C92 is not set
-+# CONFIG_PCMCIA_SPECTRUM is not set
-+# CONFIG_PCMCIA_SYM53C500 is not set
-+# CONFIG_PCMCIA_WL3501 is not set
-+# CONFIG_PCMCIA_XIRC2PS is not set
-+# CONFIG_PCMCIA_XIRCOM is not set
-+# CONFIG_PCNET32 is not set
-+# CONFIG_PCSPKR_PLATFORM is not set
-+# CONFIG_PCS_XPCS is not set
-+# CONFIG_PD6729 is not set
-+# CONFIG_PDA_POWER is not set
-+# CONFIG_PDC_ADMA is not set
-+# CONFIG_PERCPU_STATS is not set
-+# CONFIG_PERCPU_TEST is not set
-+# CONFIG_PERF_EVENTS is not set
-+# CONFIG_PERF_EVENTS_AMD_POWER is not set
-+# CONFIG_PERSISTENT_KEYRINGS is not set
-+# CONFIG_PHANTOM is not set
-+# CONFIG_PHONET is not set
-+# CONFIG_PHYLIB is not set
-+# CONFIG_PHYS_ADDR_T_64BIT is not set
-+# CONFIG_PHY_CADENCE_DP is not set
-+# CONFIG_PHY_CADENCE_DPHY is not set
-+# CONFIG_PHY_CADENCE_SALVO is not set
-+# CONFIG_PHY_CADENCE_SIERRA is not set
-+# CONFIG_PHY_CADENCE_TORRENT is not set
-+# CONFIG_PHY_CPCAP_USB is not set
-+# CONFIG_PHY_EXYNOS_DP_VIDEO is not set
-+# CONFIG_PHY_EXYNOS_MIPI_VIDEO is not set
-+# CONFIG_PHY_FSL_IMX8MQ_USB is not set
-+# CONFIG_PHY_INTEL_KEEMBAY_EMMC is not set
-+# CONFIG_PHY_MAPPHONE_MDM6600 is not set
-+# CONFIG_PHY_MIXEL_MIPI_DPHY is not set
-+# CONFIG_PHY_MTK_HDMI is not set
-+# CONFIG_PHY_OCELOT_SERDES is not set
-+# CONFIG_PHY_PXA_28NM_HSIC is not set
-+# CONFIG_PHY_PXA_28NM_USB2 is not set
-+# CONFIG_PHY_QCOM_DWC3 is not set
-+# CONFIG_PHY_QCOM_USB_HS is not set
-+# CONFIG_PHY_QCOM_USB_HSIC is not set
-+# CONFIG_PHY_SAMSUNG_USB2 is not set
-+# CONFIG_PHY_TUSB1210 is not set
-+# CONFIG_PHY_XGENE is not set
-+# CONFIG_PI433 is not set
-+# CONFIG_PID_IN_CONTEXTIDR is not set
-+# CONFIG_PID_NS is not set
-+CONFIG_PINCONF=y
-+# CONFIG_PINCTRL is not set
-+# CONFIG_PINCTRL_AMD is not set
-+# CONFIG_PINCTRL_AXP209 is not set
-+# CONFIG_PINCTRL_CEDARFORK is not set
-+# CONFIG_PINCTRL_EXYNOS is not set
-+# CONFIG_PINCTRL_EXYNOS5440 is not set
-+# CONFIG_PINCTRL_ICELAKE is not set
-+# CONFIG_PINCTRL_INGENIC is not set
-+# CONFIG_PINCTRL_MCP23S08 is not set
-+# CONFIG_PINCTRL_MSM8X74 is not set
-+# CONFIG_PINCTRL_MT6779 is not set
-+# CONFIG_PINCTRL_MT8167 is not set
-+# CONFIG_PINCTRL_MT8192 is not set
-+# CONFIG_PINCTRL_MTK_V2 is not set
-+# CONFIG_PINCTRL_OCELOT is not set
-+CONFIG_PINCTRL_SINGLE=y
-+# CONFIG_PINCTRL_STMFX is not set
-+# CONFIG_PINCTRL_SX150X is not set
-+# CONFIG_PING is not set
-+CONFIG_PINMUX=y
-+# CONFIG_PKCS7_MESSAGE_PARSER is not set
-+# CONFIG_PL310_ERRATA_588369 is not set
-+# CONFIG_PL310_ERRATA_727915 is not set
-+# CONFIG_PL310_ERRATA_753970 is not set
-+# CONFIG_PL310_ERRATA_769419 is not set
-+# CONFIG_PL320_MBOX is not set
-+# CONFIG_PL330_DMA is not set
-+# CONFIG_PLATFORM_MHU is not set
-+# CONFIG_PLAT_SPEAR is not set
-+# CONFIG_PLIP is not set
-+# CONFIG_PLX_DMA is not set
-+# CONFIG_PLX_HERMES is not set
-+# CONFIG_PM is not set
-+# CONFIG_PMBUS is not set
-+# CONFIG_PMC_MSP is not set
-+# CONFIG_PMIC_ADP5520 is not set
-+# CONFIG_PMIC_DA903X is not set
-+# CONFIG_PMS7003 is not set
-+# CONFIG_PM_AUTOSLEEP is not set
-+# CONFIG_PM_DEBUG is not set
-+# CONFIG_PM_DEVFREQ is not set
-+# CONFIG_PM_WAKELOCKS is not set
-+# CONFIG_POSIX_MQUEUE is not set
-+CONFIG_POSIX_TIMERS=y
-+# CONFIG_POWERCAP is not set
-+# CONFIG_POWER_AVS is not set
-+# CONFIG_POWER_RESET is not set
-+# CONFIG_POWER_RESET_BRCMKONA is not set
-+# CONFIG_POWER_RESET_BRCMSTB is not set
-+# CONFIG_POWER_RESET_GPIO is not set
-+# CONFIG_POWER_RESET_GPIO_RESTART is not set
-+# CONFIG_POWER_RESET_LINKSTATION is not set
-+# CONFIG_POWER_RESET_LTC2952 is not set
-+# CONFIG_POWER_RESET_PIIX4_POWEROFF is not set
-+# CONFIG_POWER_RESET_RESTART is not set
-+# CONFIG_POWER_RESET_SYSCON is not set
-+# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set
-+# CONFIG_POWER_RESET_VERSATILE is not set
-+# CONFIG_POWER_RESET_XGENE is not set
-+# CONFIG_POWER_SUPPLY is not set
-+# CONFIG_POWER_SUPPLY_DEBUG is not set
-+# CONFIG_POWER_SUPPLY_HWMON is not set
-+# CONFIG_PPC4xx_GPIO is not set
-+# CONFIG_PPC_16K_PAGES is not set
-+# CONFIG_PPC_256K_PAGES is not set
-+CONFIG_PPC_4K_PAGES=y
-+# CONFIG_PPC_64K_PAGES is not set
-+# CONFIG_PPC_DISABLE_WERROR is not set
-+# CONFIG_PPC_EMULATED_STATS is not set
-+# CONFIG_PPC_EPAPR_HV_BYTECHAN is not set
-+# CONFIG_PPP is not set
-+# CONFIG_PPPOATM is not set
-+# CONFIG_PPPOE is not set
-+# CONFIG_PPPOL2TP is not set
-+# CONFIG_PPP_ASYNC is not set
-+# CONFIG_PPP_BSDCOMP is not set
-+# CONFIG_PPP_DEFLATE is not set
-+CONFIG_PPP_FILTER=y
-+# CONFIG_PPP_MPPE is not set
-+CONFIG_PPP_MULTILINK=y
-+# CONFIG_PPP_SYNC_TTY is not set
-+# CONFIG_PPS is not set
-+# CONFIG_PPS_CLIENT_GPIO is not set
-+# CONFIG_PPS_CLIENT_KTIMER is not set
-+# CONFIG_PPS_CLIENT_LDISC is not set
-+# CONFIG_PPS_CLIENT_PARPORT is not set
-+# CONFIG_PPS_DEBUG is not set
-+# CONFIG_PPTP is not set
-+# CONFIG_PREEMPT is not set
-+# CONFIG_PREEMPTIRQ_DELAY_TEST is not set
-+# CONFIG_PREEMPTIRQ_EVENTS is not set
-+CONFIG_PREEMPT_NONE=y
-+# CONFIG_PREEMPT_TRACER is not set
-+# CONFIG_PREEMPT_VOLUNTARY is not set
-+# CONFIG_PRESTERA is not set
-+CONFIG_PREVENT_FIRMWARE_BUILD=y
-+# CONFIG_PRIME_NUMBERS is not set
-+CONFIG_PRINTK=y
-+# CONFIG_PRINTK_CALLER is not set
-+CONFIG_PRINTK_NMI=y
-+CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
-+# CONFIG_PRINTK_TIME is not set
-+CONFIG_PRINT_STACK_DEPTH=64
-+# CONFIG_PRISM2_USB is not set
-+# CONFIG_PRISM54 is not set
-+# CONFIG_PROC_CHILDREN is not set
-+CONFIG_PROC_FS=y
-+# CONFIG_PROC_KCORE is not set
-+# CONFIG_PROC_PAGE_MONITOR is not set
-+# CONFIG_PROC_STRIPPED is not set
-+CONFIG_PROC_SYSCTL=y
-+# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set
-+# CONFIG_PROFILE_ALL_BRANCHES is not set
-+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
-+# CONFIG_PROFILING is not set
-+# CONFIG_PROVE_LOCKING is not set
-+# CONFIG_PROVE_RCU is not set
-+# CONFIG_PROVE_RCU_LIST is not set
-+# CONFIG_PROVE_RCU_REPEATEDLY is not set
-+# CONFIG_PSAMPLE is not set
-+# CONFIG_PSB6970_PHY is not set
-+# CONFIG_PSI is not set
-+# CONFIG_PSTORE is not set
-+# CONFIG_PTDUMP_DEBUGFS is not set
-+# CONFIG_PTP_1588_CLOCK is not set
-+# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set
-+# CONFIG_PTP_1588_CLOCK_IDTCM is not set
-+# CONFIG_PTP_1588_CLOCK_IXP46X is not set
-+# CONFIG_PTP_1588_CLOCK_KVM is not set
-+# CONFIG_PTP_1588_CLOCK_PCH is not set
-+# CONFIG_PTP_1588_CLOCK_VMW is not set
-+# CONFIG_PUBLIC_KEY_ALGO_RSA is not set
-+# CONFIG_PVPANIC is not set
-+# CONFIG_PWM is not set
-+# CONFIG_PWM_DEBUG is not set
-+# CONFIG_PWM_FSL_FTM is not set
-+# CONFIG_PWM_PCA9685 is not set
-+CONFIG_PWRSEQ_EMMC=y
-+# CONFIG_PWRSEQ_SD8787 is not set
-+CONFIG_PWRSEQ_SIMPLE=y
-+# CONFIG_QCA7000 is not set
-+# CONFIG_QCA7000_SPI is not set
-+# CONFIG_QCA7000_UART is not set
-+# CONFIG_QCOM_EMAC is not set
-+# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set
-+# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set
-+# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set
-+# CONFIG_QCOM_HIDMA is not set
-+# CONFIG_QCOM_HIDMA_MGMT is not set
-+# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set
-+# CONFIG_QCOM_SPMI_ADC5 is not set
-+# CONFIG_QCOM_SPMI_IADC is not set
-+# CONFIG_QCOM_SPMI_TEMP_ALARM is not set
-+# CONFIG_QCOM_SPMI_VADC is not set
-+# CONFIG_QED is not set
-+# CONFIG_QLA3XXX is not set
-+# CONFIG_QLCNIC is not set
-+# CONFIG_QLGE is not set
-+# CONFIG_QNX4FS_FS is not set
-+# CONFIG_QNX6FS_FS is not set
-+# CONFIG_QORIQ_CPUFREQ is not set
-+# CONFIG_QORIQ_THERMAL is not set
-+# CONFIG_QRTR is not set
-+# CONFIG_QSEMI_PHY is not set
-+# CONFIG_QUEUED_LOCK_STAT is not set
-+# CONFIG_QUICC_ENGINE is not set
-+# CONFIG_QUOTA is not set
-+# CONFIG_QUOTACTL is not set
-+# CONFIG_QUOTA_DEBUG is not set
-+# CONFIG_R3964 is not set
-+# CONFIG_R6040 is not set
-+# CONFIG_R8169 is not set
-+# CONFIG_R8188EU is not set
-+# CONFIG_R8712U is not set
-+# CONFIG_R8723AU is not set
-+# CONFIG_RADIO_ADAPTERS is not set
-+# CONFIG_RADIO_AZTECH is not set
-+# CONFIG_RADIO_CADET is not set
-+# CONFIG_RADIO_GEMTEK is not set
-+# CONFIG_RADIO_MAXIRADIO is not set
-+# CONFIG_RADIO_RTRACK is not set
-+# CONFIG_RADIO_RTRACK2 is not set
-+# CONFIG_RADIO_SF16FMI is not set
-+# CONFIG_RADIO_SF16FMR2 is not set
-+# CONFIG_RADIO_TERRATEC is not set
-+# CONFIG_RADIO_TRUST is not set
-+# CONFIG_RADIO_TYPHOON is not set
-+# CONFIG_RADIO_ZOLTRIX is not set
-+# CONFIG_RAID6_PQ_BENCHMARK is not set
-+# CONFIG_RAID_ATTRS is not set
-+# CONFIG_RALINK is not set
-+# CONFIG_RANDOM32_SELFTEST is not set
-+# CONFIG_RANDOMIZE_BASE is not set
-+# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
-+# CONFIG_RANDOM_TRUST_CPU is not set
-+# CONFIG_RAPIDIO is not set
-+# CONFIG_RAS is not set
-+# CONFIG_RAW_DRIVER is not set
-+# CONFIG_RBTREE_TEST is not set
-+# CONFIG_RCU_BOOST is not set
-+CONFIG_RCU_CPU_STALL_TIMEOUT=60
-+# CONFIG_RCU_EQS_DEBUG is not set
-+# CONFIG_RCU_EXPEDITE_BOOT is not set
-+CONFIG_RCU_EXPERT=y
-+CONFIG_RCU_FANOUT=32
-+CONFIG_RCU_FANOUT_LEAF=16
-+# CONFIG_RCU_FAST_NO_HZ is not set
-+CONFIG_RCU_KTHREAD_PRIO=0
-+# CONFIG_RCU_NOCB_CPU is not set
-+# CONFIG_RCU_PERF_TEST is not set
-+# CONFIG_RCU_REF_SCALE_TEST is not set
-+# CONFIG_RCU_SCALE_TEST is not set
-+# CONFIG_RCU_STRICT_GRACE_PERIOD is not set
-+# CONFIG_RCU_TORTURE_TEST is not set
-+CONFIG_RCU_TORTURE_TEST_SLOW_INIT_DELAY=3
-+# CONFIG_RCU_TRACE is not set
-+# CONFIG_RC_ATI_REMOTE is not set
-+# CONFIG_RC_CORE is not set
-+# CONFIG_RC_DECODERS is not set
-+# CONFIG_RC_LOOPBACK is not set
-+# CONFIG_RC_MAP is not set
-+# CONFIG_RDS is not set
-+# CONFIG_RD_BZIP2 is not set
-+# CONFIG_RD_GZIP is not set
-+# CONFIG_RD_LZ4 is not set
-+# CONFIG_RD_LZMA is not set
-+# CONFIG_RD_LZO is not set
-+# CONFIG_RD_XZ is not set
-+# CONFIG_RD_ZSTD is not set
-+# CONFIG_READABLE_ASM is not set
-+# CONFIG_READ_ONLY_THP_FOR_FS is not set
-+# CONFIG_REALTEK_PHY is not set
-+# CONFIG_REDWOOD is not set
-+# CONFIG_REED_SOLOMON_TEST is not set
-+# CONFIG_REGMAP is not set
-+# CONFIG_REGMAP_I2C is not set
-+# CONFIG_REGMAP_MMIO is not set
-+# CONFIG_REGMAP_SPI is not set
-+# CONFIG_REGULATOR is not set
-+# CONFIG_REGULATOR_88PG86X is not set
-+# CONFIG_REGULATOR_ACT8865 is not set
-+# CONFIG_REGULATOR_AD5398 is not set
-+# CONFIG_REGULATOR_ANATOP is not set
-+# CONFIG_REGULATOR_DA9210 is not set
-+# CONFIG_REGULATOR_DA9211 is not set
-+# CONFIG_REGULATOR_DEBUG is not set
-+# CONFIG_REGULATOR_FAN53555 is not set
-+# CONFIG_REGULATOR_FAN53880 is not set
-+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
-+# CONFIG_REGULATOR_GPIO is not set
-+# CONFIG_REGULATOR_ISL6271A is not set
-+# CONFIG_REGULATOR_ISL9305 is not set
-+# CONFIG_REGULATOR_LP3971 is not set
-+# CONFIG_REGULATOR_LP3972 is not set
-+# CONFIG_REGULATOR_LP872X is not set
-+# CONFIG_REGULATOR_LP8755 is not set
-+# CONFIG_REGULATOR_LTC3589 is not set
-+# CONFIG_REGULATOR_LTC3676 is not set
-+# CONFIG_REGULATOR_MAX1586 is not set
-+# CONFIG_REGULATOR_MAX77620 is not set
-+# CONFIG_REGULATOR_MAX77826 is not set
-+# CONFIG_REGULATOR_MAX8649 is not set
-+# CONFIG_REGULATOR_MAX8660 is not set
-+# CONFIG_REGULATOR_MAX8952 is not set
-+# CONFIG_REGULATOR_MAX8973 is not set
-+# CONFIG_REGULATOR_MCP16502 is not set
-+# CONFIG_REGULATOR_MP5416 is not set
-+# CONFIG_REGULATOR_MP8859 is not set
-+# CONFIG_REGULATOR_MP886X is not set
-+# CONFIG_REGULATOR_MPQ7920 is not set
-+# CONFIG_REGULATOR_MT6311 is not set
-+# CONFIG_REGULATOR_PCA9450 is not set
-+# CONFIG_REGULATOR_PFUZE100 is not set
-+# CONFIG_REGULATOR_PV88060 is not set
-+# CONFIG_REGULATOR_PV88080 is not set
-+# CONFIG_REGULATOR_PV88090 is not set
-+# CONFIG_REGULATOR_PWM is not set
-+# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set
-+# CONFIG_REGULATOR_RT4801 is not set
-+# CONFIG_REGULATOR_RTMV20 is not set
-+# CONFIG_REGULATOR_SLG51000 is not set
-+# CONFIG_REGULATOR_SY8106A is not set
-+# CONFIG_REGULATOR_SY8824X is not set
-+# CONFIG_REGULATOR_SY8827N is not set
-+# CONFIG_REGULATOR_TI_ABB is not set
-+# CONFIG_REGULATOR_TPS51632 is not set
-+# CONFIG_REGULATOR_TPS62360 is not set
-+# CONFIG_REGULATOR_TPS65023 is not set
-+# CONFIG_REGULATOR_TPS6507X is not set
-+# CONFIG_REGULATOR_TPS65132 is not set
-+# CONFIG_REGULATOR_TPS6524X is not set
-+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
-+# CONFIG_REGULATOR_VCTRL is not set
-+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
-+# CONFIG_REISERFS_CHECK is not set
-+# CONFIG_REISERFS_FS is not set
-+# CONFIG_REISERFS_FS_POSIX_ACL is not set
-+# CONFIG_REISERFS_FS_SECURITY is not set
-+CONFIG_REISERFS_FS_XATTR=y
-+# CONFIG_REISERFS_PROC_INFO is not set
-+# CONFIG_RELAY is not set
-+# CONFIG_RELOCATABLE is not set
-+# CONFIG_REMOTEPROC is not set
-+# CONFIG_RENESAS_PHY is not set
-+# CONFIG_RESET_ATH79 is not set
-+# CONFIG_RESET_BERLIN is not set
-+# CONFIG_RESET_BRCMSTB_RESCAL is not set
-+# CONFIG_RESET_CONTROLLER is not set
-+# CONFIG_RESET_IMX7 is not set
-+# CONFIG_RESET_INTEL_GW is not set
-+# CONFIG_RESET_LANTIQ is not set
-+# CONFIG_RESET_LPC18XX is not set
-+# CONFIG_RESET_MESON is not set
-+# CONFIG_RESET_PISTACHIO is not set
-+# CONFIG_RESET_SOCFPGA is not set
-+# CONFIG_RESET_STM32 is not set
-+# CONFIG_RESET_SUNXI is not set
-+# CONFIG_RESET_TEGRA_BPMP is not set
-+# CONFIG_RESET_TI_SYSCON is not set
-+# CONFIG_RESET_ZYNQ is not set
-+# CONFIG_RFD77402 is not set
-+# CONFIG_RFD_FTL is not set
-+CONFIG_RFKILL=y
-+# CONFIG_RFKILL_FULL is not set
-+# CONFIG_RFKILL_GPIO is not set
-+# CONFIG_RFKILL_INPUT is not set
-+# CONFIG_RFKILL_LEDS is not set
-+# CONFIG_RFKILL_REGULATOR is not set
-+# CONFIG_RING_BUFFER_BENCHMARK is not set
-+# CONFIG_RING_BUFFER_STARTUP_TEST is not set
-+# CONFIG_RMI4_CORE is not set
-+# CONFIG_RMNET is not set
-+# CONFIG_ROCKCHIP_PHY is not set
-+# CONFIG_ROCKER is not set
-+# CONFIG_ROMFS_FS is not set
-+# CONFIG_ROSE is not set
-+# CONFIG_RPCSEC_GSS_KRB5 is not set
-+# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
-+# CONFIG_RPMSG_VIRTIO is not set
-+# CONFIG_RPR0521 is not set
-+# CONFIG_RSEQ is not set
-+# CONFIG_RT2X00 is not set
-+# CONFIG_RTC_CLASS is not set
-+# CONFIG_RTC_DEBUG is not set
-+# CONFIG_RTC_DRV_ABB5ZES3 is not set
-+# CONFIG_RTC_DRV_ABEOZ9 is not set
-+# CONFIG_RTC_DRV_ABX80X is not set
-+# CONFIG_RTC_DRV_ARMADA38X is not set
-+# CONFIG_RTC_DRV_AU1XXX is not set
-+# CONFIG_RTC_DRV_BQ32K is not set
-+# CONFIG_RTC_DRV_BQ4802 is not set
-+# CONFIG_RTC_DRV_CADENCE is not set
-+CONFIG_RTC_DRV_CMOS=y
-+# CONFIG_RTC_DRV_DS1286 is not set
-+# CONFIG_RTC_DRV_DS1302 is not set
-+# CONFIG_RTC_DRV_DS1305 is not set
-+# CONFIG_RTC_DRV_DS1307 is not set
-+# CONFIG_RTC_DRV_DS1307_CENTURY is not set
-+# CONFIG_RTC_DRV_DS1307_HWMON is not set
-+# CONFIG_RTC_DRV_DS1343 is not set
-+# CONFIG_RTC_DRV_DS1347 is not set
-+# CONFIG_RTC_DRV_DS1374 is not set
-+# CONFIG_RTC_DRV_DS1390 is not set
-+# CONFIG_RTC_DRV_DS1511 is not set
-+# CONFIG_RTC_DRV_DS1553 is not set
-+# CONFIG_RTC_DRV_DS1672 is not set
-+# CONFIG_RTC_DRV_DS1685_FAMILY is not set
-+# CONFIG_RTC_DRV_DS1742 is not set
-+# CONFIG_RTC_DRV_DS2404 is not set
-+# CONFIG_RTC_DRV_DS3232 is not set
-+# CONFIG_RTC_DRV_DS3234 is not set
-+# CONFIG_RTC_DRV_EM3027 is not set
-+# CONFIG_RTC_DRV_EP93XX is not set
-+# CONFIG_RTC_DRV_FM3130 is not set
-+# CONFIG_RTC_DRV_FTRTC010 is not set
-+# CONFIG_RTC_DRV_GENERIC is not set
-+# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set
-+# CONFIG_RTC_DRV_HYM8563 is not set
-+# CONFIG_RTC_DRV_ISL12022 is not set
-+# CONFIG_RTC_DRV_ISL12026 is not set
-+# CONFIG_RTC_DRV_ISL12057 is not set
-+# CONFIG_RTC_DRV_ISL1208 is not set
-+# CONFIG_RTC_DRV_JZ4740 is not set
-+# CONFIG_RTC_DRV_M41T80 is not set
-+# CONFIG_RTC_DRV_M41T93 is not set
-+# CONFIG_RTC_DRV_M41T94 is not set
-+# CONFIG_RTC_DRV_M48T35 is not set
-+# CONFIG_RTC_DRV_M48T59 is not set
-+# CONFIG_RTC_DRV_M48T86 is not set
-+# CONFIG_RTC_DRV_MAX6900 is not set
-+# CONFIG_RTC_DRV_MAX6902 is not set
-+# CONFIG_RTC_DRV_MAX6916 is not set
-+# CONFIG_RTC_DRV_MCP795 is not set
-+# CONFIG_RTC_DRV_MOXART is not set
-+# CONFIG_RTC_DRV_MPC5121 is not set
-+# CONFIG_RTC_DRV_MSM6242 is not set
-+# CONFIG_RTC_DRV_MT2712 is not set
-+# CONFIG_RTC_DRV_OMAP is not set
-+# CONFIG_RTC_DRV_PCF2123 is not set
-+# CONFIG_RTC_DRV_PCF2127 is not set
-+# CONFIG_RTC_DRV_PCF85063 is not set
-+# CONFIG_RTC_DRV_PCF8523 is not set
-+# CONFIG_RTC_DRV_PCF85363 is not set
-+# CONFIG_RTC_DRV_PCF8563 is not set
-+# CONFIG_RTC_DRV_PCF8583 is not set
-+# CONFIG_RTC_DRV_PL030 is not set
-+# CONFIG_RTC_DRV_PL031 is not set
-+# CONFIG_RTC_DRV_PS3 is not set
-+# CONFIG_RTC_DRV_PT7C4338 is not set
-+# CONFIG_RTC_DRV_R7301 is not set
-+# CONFIG_RTC_DRV_R9701 is not set
-+# CONFIG_RTC_DRV_RP5C01 is not set
-+# CONFIG_RTC_DRV_RS5C348 is not set
-+# CONFIG_RTC_DRV_RS5C372 is not set
-+# CONFIG_RTC_DRV_RTC7301 is not set
-+# CONFIG_RTC_DRV_RV3028 is not set
-+# CONFIG_RTC_DRV_RV3029C2 is not set
-+# CONFIG_RTC_DRV_RV3032 is not set
-+# CONFIG_RTC_DRV_RV8803 is not set
-+# CONFIG_RTC_DRV_RX4581 is not set
-+# CONFIG_RTC_DRV_RX6110 is not set
-+# CONFIG_RTC_DRV_RX8010 is not set
-+# CONFIG_RTC_DRV_RX8025 is not set
-+# CONFIG_RTC_DRV_RX8581 is not set
-+# CONFIG_RTC_DRV_S35390A is not set
-+# CONFIG_RTC_DRV_SD3078 is not set
-+# CONFIG_RTC_DRV_SNVS is not set
-+# CONFIG_RTC_DRV_STK17TA8 is not set
-+# CONFIG_RTC_DRV_SUN6I is not set
-+# CONFIG_RTC_DRV_TEST is not set
-+# CONFIG_RTC_DRV_V3020 is not set
-+# CONFIG_RTC_DRV_X1205 is not set
-+# CONFIG_RTC_DRV_XGENE is not set
-+# CONFIG_RTC_DRV_ZYNQMP is not set
-+CONFIG_RTC_HCTOSYS=y
-+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
-+CONFIG_RTC_INTF_DEV=y
-+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
-+CONFIG_RTC_INTF_PROC=y
-+CONFIG_RTC_INTF_SYSFS=y
-+CONFIG_RTC_LIB=y
-+# CONFIG_RTC_NVMEM is not set
-+CONFIG_RTC_SYSTOHC=y
-+CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
-+# CONFIG_RTL8180 is not set
-+# CONFIG_RTL8187 is not set
-+# CONFIG_RTL8192E is not set
-+# CONFIG_RTL8192U is not set
-+# CONFIG_RTL8306_PHY is not set
-+# CONFIG_RTL8366RB_PHY is not set
-+# CONFIG_RTL8366S_PHY is not set
-+# CONFIG_RTL8366_SMI is not set
-+# CONFIG_RTL8366_SMI_DEBUG_FS is not set
-+# CONFIG_RTL8367B_PHY is not set
-+# CONFIG_RTL8367_PHY is not set
-+# CONFIG_RTLLIB is not set
-+# CONFIG_RTL_CARDS is not set
-+# CONFIG_RTS5208 is not set
-+CONFIG_RT_MUTEXES=y
-+# CONFIG_RUNTIME_DEBUG is not set
-+CONFIG_RUNTIME_TESTING_MENU=y
-+CONFIG_RWSEM_GENERIC_SPINLOCK=y
-+CONFIG_RXKAD=y
-+# CONFIG_S2IO is not set
-+# CONFIG_SAMPLES is not set
-+# CONFIG_SAMSUNG_LAPTOP is not set
-+# CONFIG_SATA_ACARD_AHCI is not set
-+# CONFIG_SATA_AHCI is not set
-+# CONFIG_SATA_AHCI_PLATFORM is not set
-+# CONFIG_SATA_DWC is not set
-+# CONFIG_SATA_FSL is not set
-+# CONFIG_SATA_HIGHBANK is not set
-+# CONFIG_SATA_HOST is not set
-+# CONFIG_SATA_INIC162X is not set
-+CONFIG_SATA_MOBILE_LPM_POLICY=0
-+# CONFIG_SATA_MV is not set
-+# CONFIG_SATA_NV is not set
-+# CONFIG_SATA_PMP is not set
-+# CONFIG_SATA_PROMISE is not set
-+# CONFIG_SATA_QSTOR is not set
-+# CONFIG_SATA_RCAR is not set
-+# CONFIG_SATA_SIL is not set
-+# CONFIG_SATA_SIL24 is not set
-+# CONFIG_SATA_SIS is not set
-+# CONFIG_SATA_SVW is not set
-+# CONFIG_SATA_SX4 is not set
-+# CONFIG_SATA_ULI is not set
-+# CONFIG_SATA_VIA is not set
-+# CONFIG_SATA_VITESSE is not set
-+# CONFIG_SBC_FITPC2_WATCHDOG is not set
-+CONFIG_SBITMAP=y
-+# CONFIG_SC92031 is not set
-+# CONFIG_SCA3000 is not set
-+# CONFIG_SCACHE_DEBUGFS is not set
-+# CONFIG_SCC is not set
-+# CONFIG_SCD30_CORE is not set
-+# CONFIG_SCF_TORTURE_TEST is not set
-+# CONFIG_SCHEDSTATS is not set
-+# CONFIG_SCHED_AUTOGROUP is not set
-+# CONFIG_SCHED_DEBUG is not set
-+CONFIG_SCHED_HRTICK=y
-+# CONFIG_SCHED_MC is not set
-+CONFIG_SCHED_OMIT_FRAME_POINTER=y
-+# CONFIG_SCHED_SMT is not set
-+# CONFIG_SCHED_STACK_END_CHECK is not set
-+# CONFIG_SCHED_TRACER is not set
-+# CONFIG_SCR24X is not set
-+# CONFIG_SCSI is not set
-+# CONFIG_SCSI_3W_9XXX is not set
-+# CONFIG_SCSI_3W_SAS is not set
-+# CONFIG_SCSI_7000FASST is not set
-+# CONFIG_SCSI_AACRAID is not set
-+# CONFIG_SCSI_ACARD is not set
-+# CONFIG_SCSI_ADVANSYS is not set
-+# CONFIG_SCSI_AHA152X is not set
-+# CONFIG_SCSI_AHA1542 is not set
-+# CONFIG_SCSI_AIC79XX is not set
-+# CONFIG_SCSI_AIC7XXX is not set
-+# CONFIG_SCSI_AIC94XX is not set
-+# CONFIG_SCSI_AM53C974 is not set
-+# CONFIG_SCSI_ARCMSR is not set
-+# CONFIG_SCSI_BFA_FC is not set
-+# CONFIG_SCSI_BNX2X_FCOE is not set
-+# CONFIG_SCSI_BNX2_ISCSI is not set
-+# CONFIG_SCSI_BUSLOGIC is not set
-+# CONFIG_SCSI_CHELSIO_FCOE is not set
-+# CONFIG_SCSI_CONSTANTS is not set
-+# CONFIG_SCSI_CXGB3_ISCSI is not set
-+# CONFIG_SCSI_CXGB4_ISCSI is not set
-+# CONFIG_SCSI_DC395x is not set
-+# CONFIG_SCSI_DEBUG is not set
-+# CONFIG_SCSI_DH is not set
-+CONFIG_SCSI_DMA=y
-+# CONFIG_SCSI_DMX3191D is not set
-+# CONFIG_SCSI_DPT_I2O is not set
-+# CONFIG_SCSI_DTC3280 is not set
-+# CONFIG_SCSI_EATA is not set
-+# CONFIG_SCSI_ESAS2R is not set
-+# CONFIG_SCSI_FC_ATTRS is not set
-+# CONFIG_SCSI_FDOMAIN_PCI is not set
-+# CONFIG_SCSI_FUTURE_DOMAIN is not set
-+# CONFIG_SCSI_GDTH is not set
-+# CONFIG_SCSI_GENERIC_NCR5380 is not set
-+# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
-+# CONFIG_SCSI_HISI_SAS is not set
-+# CONFIG_SCSI_HPSA is not set
-+# CONFIG_SCSI_HPTIOP is not set
-+# CONFIG_SCSI_IN2000 is not set
-+# CONFIG_SCSI_INIA100 is not set
-+# CONFIG_SCSI_INITIO is not set
-+# CONFIG_SCSI_IPR is not set
-+# CONFIG_SCSI_IPS is not set
-+# CONFIG_SCSI_ISCI is not set
-+# CONFIG_SCSI_ISCSI_ATTRS is not set
-+# CONFIG_SCSI_LOGGING is not set
-+CONFIG_SCSI_LOWLEVEL=y
-+# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
-+# CONFIG_SCSI_LPFC is not set
-+CONFIG_SCSI_MOD=y
-+# CONFIG_SCSI_MPT2SAS is not set
-+# CONFIG_SCSI_MPT3SAS is not set
-+# CONFIG_SCSI_MQ_DEFAULT is not set
-+# CONFIG_SCSI_MVSAS is not set
-+# CONFIG_SCSI_MVSAS_DEBUG is not set
-+# CONFIG_SCSI_MVUMI is not set
-+# CONFIG_SCSI_MYRB is not set
-+# CONFIG_SCSI_MYRS is not set
-+# CONFIG_SCSI_NCR53C406A is not set
-+# CONFIG_SCSI_NETLINK is not set
-+# CONFIG_SCSI_NSP32 is not set
-+# CONFIG_SCSI_OSD_INITIATOR is not set
-+# CONFIG_SCSI_PAS16 is not set
-+# CONFIG_SCSI_PM8001 is not set
-+# CONFIG_SCSI_PMCRAID is not set
-+CONFIG_SCSI_PROC_FS=y
-+# CONFIG_SCSI_QLA_FC is not set
-+# CONFIG_SCSI_QLA_ISCSI is not set
-+# CONFIG_SCSI_QLOGIC_1280 is not set
-+# CONFIG_SCSI_QLOGIC_FAS is not set
-+# CONFIG_SCSI_SAS_ATTRS is not set
-+# CONFIG_SCSI_SAS_LIBSAS is not set
-+# CONFIG_SCSI_SCAN_ASYNC is not set
-+# CONFIG_SCSI_SMARTPQI is not set
-+# CONFIG_SCSI_SNIC is not set
-+# CONFIG_SCSI_SPI_ATTRS is not set
-+# CONFIG_SCSI_SRP_ATTRS is not set
-+# CONFIG_SCSI_STEX is not set
-+# CONFIG_SCSI_SYM53C416 is not set
-+# CONFIG_SCSI_SYM53C8XX_2 is not set
-+# CONFIG_SCSI_T128 is not set
-+# CONFIG_SCSI_U14_34F is not set
-+# CONFIG_SCSI_UFSHCD is not set
-+# CONFIG_SCSI_ULTRASTOR is not set
-+# CONFIG_SCSI_VIRTIO is not set
-+# CONFIG_SCSI_WD719X is not set
-+# CONFIG_SCx200_ACB is not set
-+# CONFIG_SDIO_UART is not set
-+# CONFIG_SDR_MAX2175 is not set
-+# CONFIG_SDR_PLATFORM_DRIVERS is not set
-+# CONFIG_SD_ADC_MODULATOR is not set
-+# CONFIG_SECCOMP is not set
-+CONFIG_SECTION_MISMATCH_WARN_ONLY=y
-+# CONFIG_SECURITY is not set
-+# CONFIG_SECURITYFS is not set
-+# CONFIG_SECURITY_APPARMOR is not set
-+CONFIG_SECURITY_DMESG_RESTRICT=y
-+# CONFIG_SECURITY_LOADPIN is not set
-+# CONFIG_SECURITY_LOCKDOWN_LSM is not set
-+# CONFIG_SECURITY_PATH is not set
-+# CONFIG_SECURITY_SAFESETID is not set
-+# CONFIG_SECURITY_SELINUX_AVC_STATS is not set
-+# CONFIG_SECURITY_SELINUX_BOOTPARAM is not set
-+CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=0
-+# CONFIG_SECURITY_SELINUX_DEVELOP is not set
-+# CONFIG_SECURITY_SELINUX_DISABLE is not set
-+# CONFIG_SECURITY_SMACK is not set
-+# CONFIG_SECURITY_TOMOYO is not set
-+# CONFIG_SECURITY_YAMA is not set
-+CONFIG_SELECT_MEMORY_MODEL=y
-+# CONFIG_SENSIRION_SGP30 is not set
-+# CONFIG_SENSORS_ABITUGURU is not set
-+# CONFIG_SENSORS_ABITUGURU3 is not set
-+# CONFIG_SENSORS_ACPI_POWER is not set
-+# CONFIG_SENSORS_AD7314 is not set
-+# CONFIG_SENSORS_AD7414 is not set
-+# CONFIG_SENSORS_AD7418 is not set
-+# CONFIG_SENSORS_ADC128D818 is not set
-+# CONFIG_SENSORS_ADCXX is not set
-+# CONFIG_SENSORS_ADM1021 is not set
-+# CONFIG_SENSORS_ADM1025 is not set
-+# CONFIG_SENSORS_ADM1026 is not set
-+# CONFIG_SENSORS_ADM1029 is not set
-+# CONFIG_SENSORS_ADM1031 is not set
-+# CONFIG_SENSORS_ADM1177 is not set
-+# CONFIG_SENSORS_ADM1266 is not set
-+# CONFIG_SENSORS_ADM1275 is not set
-+# CONFIG_SENSORS_ADM9240 is not set
-+# CONFIG_SENSORS_ADS1015 is not set
-+# CONFIG_SENSORS_ADS7828 is not set
-+# CONFIG_SENSORS_ADS7871 is not set
-+# CONFIG_SENSORS_ADT7310 is not set
-+# CONFIG_SENSORS_ADT7410 is not set
-+# CONFIG_SENSORS_ADT7411 is not set
-+# CONFIG_SENSORS_ADT7462 is not set
-+# CONFIG_SENSORS_ADT7470 is not set
-+# CONFIG_SENSORS_ADT7475 is not set
-+# CONFIG_SENSORS_AMC6821 is not set
-+# CONFIG_SENSORS_APDS990X is not set
-+# CONFIG_SENSORS_APPLESMC is not set
-+# CONFIG_SENSORS_AS370 is not set
-+# CONFIG_SENSORS_ASB100 is not set
-+# CONFIG_SENSORS_ASC7621 is not set
-+# CONFIG_SENSORS_ASPEED is not set
-+# CONFIG_SENSORS_ATK0110 is not set
-+# CONFIG_SENSORS_ATXP1 is not set
-+# CONFIG_SENSORS_AXI_FAN_CONTROL is not set
-+# CONFIG_SENSORS_BEL_PFE is not set
-+# CONFIG_SENSORS_BH1770 is not set
-+# CONFIG_SENSORS_BH1780 is not set
-+# CONFIG_SENSORS_CORETEMP is not set
-+# CONFIG_SENSORS_CORSAIR_CPRO is not set
-+# CONFIG_SENSORS_DELL_SMM is not set
-+# CONFIG_SENSORS_DME1737 is not set
-+# CONFIG_SENSORS_DRIVETEMP is not set
-+# CONFIG_SENSORS_DS1621 is not set
-+# CONFIG_SENSORS_DS620 is not set
-+# CONFIG_SENSORS_EMC1403 is not set
-+# CONFIG_SENSORS_EMC2103 is not set
-+# CONFIG_SENSORS_EMC6W201 is not set
-+# CONFIG_SENSORS_F71805F is not set
-+# CONFIG_SENSORS_F71882FG is not set
-+# CONFIG_SENSORS_F75375S is not set
-+# CONFIG_SENSORS_FAM15H_POWER is not set
-+# CONFIG_SENSORS_FSCHMD is not set
-+# CONFIG_SENSORS_FTSTEUTATES is not set
-+# CONFIG_SENSORS_G760A is not set
-+# CONFIG_SENSORS_G762 is not set
-+# CONFIG_SENSORS_GL518SM is not set
-+# CONFIG_SENSORS_GL520SM is not set
-+# CONFIG_SENSORS_GPIO_FAN is not set
-+# CONFIG_SENSORS_GSC is not set
-+# CONFIG_SENSORS_HDAPS is not set
-+# CONFIG_SENSORS_HIH6130 is not set
-+# CONFIG_SENSORS_HMC5843 is not set
-+# CONFIG_SENSORS_HMC5843_I2C is not set
-+# CONFIG_SENSORS_HMC5843_SPI is not set
-+# CONFIG_SENSORS_HTU21 is not set
-+# CONFIG_SENSORS_I5500 is not set
-+# CONFIG_SENSORS_I5K_AMB is not set
-+# CONFIG_SENSORS_IBM_CFFPS is not set
-+# CONFIG_SENSORS_IIO_HWMON is not set
-+# CONFIG_SENSORS_INA209 is not set
-+# CONFIG_SENSORS_INA2XX is not set
-+# CONFIG_SENSORS_INA3221 is not set
-+# CONFIG_SENSORS_INSPUR_IPSPS is not set
-+# CONFIG_SENSORS_IR35221 is not set
-+# CONFIG_SENSORS_IR38064 is not set
-+# CONFIG_SENSORS_IRPS5401 is not set
-+# CONFIG_SENSORS_ISL29018 is not set
-+# CONFIG_SENSORS_ISL29028 is not set
-+# CONFIG_SENSORS_ISL68137 is not set
-+# CONFIG_SENSORS_IT87 is not set
-+# CONFIG_SENSORS_JC42 is not set
-+# CONFIG_SENSORS_K10TEMP is not set
-+# CONFIG_SENSORS_K8TEMP is not set
-+# CONFIG_SENSORS_LINEAGE is not set
-+# CONFIG_SENSORS_LIS3LV02D is not set
-+# CONFIG_SENSORS_LIS3_I2C is not set
-+# CONFIG_SENSORS_LIS3_SPI is not set
-+# CONFIG_SENSORS_LM25066 is not set
-+# CONFIG_SENSORS_LM63 is not set
-+# CONFIG_SENSORS_LM70 is not set
-+# CONFIG_SENSORS_LM73 is not set
-+# CONFIG_SENSORS_LM75 is not set
-+# CONFIG_SENSORS_LM77 is not set
-+# CONFIG_SENSORS_LM78 is not set
-+# CONFIG_SENSORS_LM80 is not set
-+# CONFIG_SENSORS_LM83 is not set
-+# CONFIG_SENSORS_LM85 is not set
-+# CONFIG_SENSORS_LM87 is not set
-+# CONFIG_SENSORS_LM90 is not set
-+# CONFIG_SENSORS_LM92 is not set
-+# CONFIG_SENSORS_LM93 is not set
-+# CONFIG_SENSORS_LM95234 is not set
-+# CONFIG_SENSORS_LM95241 is not set
-+# CONFIG_SENSORS_LM95245 is not set
-+# CONFIG_SENSORS_LTC2945 is not set
-+# CONFIG_SENSORS_LTC2947_I2C is not set
-+# CONFIG_SENSORS_LTC2947_SPI is not set
-+# CONFIG_SENSORS_LTC2978 is not set
-+# CONFIG_SENSORS_LTC2990 is not set
-+# CONFIG_SENSORS_LTC3815 is not set
-+# CONFIG_SENSORS_LTC4151 is not set
-+# CONFIG_SENSORS_LTC4215 is not set
-+# CONFIG_SENSORS_LTC4222 is not set
-+# CONFIG_SENSORS_LTC4245 is not set
-+# CONFIG_SENSORS_LTC4260 is not set
-+# CONFIG_SENSORS_LTC4261 is not set
-+# CONFIG_SENSORS_LTQ_CPUTEMP is not set
-+# CONFIG_SENSORS_MAX1111 is not set
-+# CONFIG_SENSORS_MAX16064 is not set
-+# CONFIG_SENSORS_MAX16065 is not set
-+# CONFIG_SENSORS_MAX1619 is not set
-+# CONFIG_SENSORS_MAX16601 is not set
-+# CONFIG_SENSORS_MAX1668 is not set
-+# CONFIG_SENSORS_MAX197 is not set
-+# CONFIG_SENSORS_MAX20730 is not set
-+# CONFIG_SENSORS_MAX20751 is not set
-+# CONFIG_SENSORS_MAX31722 is not set
-+# CONFIG_SENSORS_MAX31730 is not set
-+# CONFIG_SENSORS_MAX31785 is not set
-+# CONFIG_SENSORS_MAX31790 is not set
-+# CONFIG_SENSORS_MAX34440 is not set
-+# CONFIG_SENSORS_MAX6621 is not set
-+# CONFIG_SENSORS_MAX6639 is not set
-+# CONFIG_SENSORS_MAX6642 is not set
-+# CONFIG_SENSORS_MAX6650 is not set
-+# CONFIG_SENSORS_MAX6697 is not set
-+# CONFIG_SENSORS_MAX8688 is not set
-+# CONFIG_SENSORS_MCP3021 is not set
-+# CONFIG_SENSORS_MP2975 is not set
-+# CONFIG_SENSORS_MR75203 is not set
-+# CONFIG_SENSORS_NCT6683 is not set
-+# CONFIG_SENSORS_NCT6775 is not set
-+# CONFIG_SENSORS_NCT7802 is not set
-+# CONFIG_SENSORS_NCT7904 is not set
-+# CONFIG_SENSORS_NPCM7XX is not set
-+# CONFIG_SENSORS_NSA320 is not set
-+# CONFIG_SENSORS_NTC_THERMISTOR is not set
-+# CONFIG_SENSORS_OCC_P8_I2C is not set
-+# CONFIG_SENSORS_PC87360 is not set
-+# CONFIG_SENSORS_PC87427 is not set
-+# CONFIG_SENSORS_PCF8591 is not set
-+# CONFIG_SENSORS_PMBUS is not set
-+# CONFIG_SENSORS_POWR1220 is not set
-+# CONFIG_SENSORS_PWM_FAN is not set
-+# CONFIG_SENSORS_PXE1610 is not set
-+# CONFIG_SENSORS_RM3100_I2C is not set
-+# CONFIG_SENSORS_RM3100_SPI is not set
-+# CONFIG_SENSORS_SCH5627 is not set
-+# CONFIG_SENSORS_SCH5636 is not set
-+# CONFIG_SENSORS_SCH56XX_COMMON is not set
-+# CONFIG_SENSORS_SHT15 is not set
-+# CONFIG_SENSORS_SHT21 is not set
-+# CONFIG_SENSORS_SHT3x is not set
-+# CONFIG_SENSORS_SHTC1 is not set
-+# CONFIG_SENSORS_SIS5595 is not set
-+# CONFIG_SENSORS_SMM665 is not set
-+# CONFIG_SENSORS_SMSC47B397 is not set
-+# CONFIG_SENSORS_SMSC47M1 is not set
-+# CONFIG_SENSORS_SMSC47M192 is not set
-+# CONFIG_SENSORS_STTS751 is not set
-+# CONFIG_SENSORS_TC654 is not set
-+# CONFIG_SENSORS_TC74 is not set
-+# CONFIG_SENSORS_THMC50 is not set
-+# CONFIG_SENSORS_TMP102 is not set
-+# CONFIG_SENSORS_TMP103 is not set
-+# CONFIG_SENSORS_TMP108 is not set
-+# CONFIG_SENSORS_TMP401 is not set
-+# CONFIG_SENSORS_TMP421 is not set
-+# CONFIG_SENSORS_TMP513 is not set
-+# CONFIG_SENSORS_TPS40422 is not set
-+# CONFIG_SENSORS_TPS53679 is not set
-+# CONFIG_SENSORS_TSL2550 is not set
-+# CONFIG_SENSORS_TSL2563 is not set
-+# CONFIG_SENSORS_UCD9000 is not set
-+# CONFIG_SENSORS_UCD9200 is not set
-+# CONFIG_SENSORS_VEXPRESS is not set
-+# CONFIG_SENSORS_VIA686A is not set
-+# CONFIG_SENSORS_VIA_CPUTEMP is not set
-+# CONFIG_SENSORS_VT1211 is not set
-+# CONFIG_SENSORS_VT8231 is not set
-+# CONFIG_SENSORS_W83627EHF is not set
-+# CONFIG_SENSORS_W83627HF is not set
-+# CONFIG_SENSORS_W83773G is not set
-+# CONFIG_SENSORS_W83781D is not set
-+# CONFIG_SENSORS_W83791D is not set
-+# CONFIG_SENSORS_W83792D is not set
-+# CONFIG_SENSORS_W83793 is not set
-+# CONFIG_SENSORS_W83795 is not set
-+# CONFIG_SENSORS_W83L785TS is not set
-+# CONFIG_SENSORS_W83L786NG is not set
-+# CONFIG_SENSORS_XDPE122 is not set
-+# CONFIG_SENSORS_XGENE is not set
-+# CONFIG_SENSORS_ZL6100 is not set
-+CONFIG_SERIAL_8250=y
-+# CONFIG_SERIAL_8250_16550A_VARIANTS is not set
-+# CONFIG_SERIAL_8250_ACCENT is not set
-+# CONFIG_SERIAL_8250_ASPEED_VUART is not set
-+# CONFIG_SERIAL_8250_BOCA is not set
-+CONFIG_SERIAL_8250_CONSOLE=y
-+# CONFIG_SERIAL_8250_CS is not set
-+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
-+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-+CONFIG_SERIAL_8250_DMA=y
-+# CONFIG_SERIAL_8250_DW is not set
-+# CONFIG_SERIAL_8250_EM is not set
-+# CONFIG_SERIAL_8250_EXAR is not set
-+# CONFIG_SERIAL_8250_EXAR_ST16C554 is not set
-+# CONFIG_SERIAL_8250_EXTENDED is not set
-+# CONFIG_SERIAL_8250_FINTEK is not set
-+# CONFIG_SERIAL_8250_FOURPORT is not set
-+# CONFIG_SERIAL_8250_HUB6 is not set
-+# CONFIG_SERIAL_8250_INGENIC is not set
-+# CONFIG_SERIAL_8250_LPSS is not set
-+# CONFIG_SERIAL_8250_MANY_PORTS is not set
-+# CONFIG_SERIAL_8250_MID is not set
-+# CONFIG_SERIAL_8250_MOXA is not set
-+CONFIG_SERIAL_8250_NR_UARTS=2
-+# CONFIG_SERIAL_8250_PCI is not set
-+# CONFIG_SERIAL_8250_RSA is not set
-+# CONFIG_SERIAL_8250_RT288X is not set
-+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
-+# CONFIG_SERIAL_ALTERA_UART is not set
-+# CONFIG_SERIAL_AMBA_PL010 is not set
-+# CONFIG_SERIAL_AMBA_PL011 is not set
-+# CONFIG_SERIAL_ARC is not set
-+# CONFIG_SERIAL_BCM63XX is not set
-+# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set
-+CONFIG_SERIAL_CORE=y
-+CONFIG_SERIAL_CORE_CONSOLE=y
-+# CONFIG_SERIAL_DEV_BUS is not set
-+CONFIG_SERIAL_EARLYCON=y
-+# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set
-+# CONFIG_SERIAL_FSL_LINFLEXUART is not set
-+# CONFIG_SERIAL_FSL_LPUART is not set
-+# CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
-+# CONFIG_SERIAL_IFX6X60 is not set
-+# CONFIG_SERIAL_JSM is not set
-+# CONFIG_SERIAL_MAX3100 is not set
-+# CONFIG_SERIAL_MAX310X is not set
-+# CONFIG_SERIAL_NONSTANDARD is not set
-+# CONFIG_SERIAL_OF_PLATFORM is not set
-+# CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL is not set
-+# CONFIG_SERIAL_PCH_UART is not set
-+# CONFIG_SERIAL_RP2 is not set
-+# CONFIG_SERIAL_SC16IS7XX is not set
-+# CONFIG_SERIAL_SCCNXP is not set
-+# CONFIG_SERIAL_SH_SCI is not set
-+# CONFIG_SERIAL_SIFIVE is not set
-+# CONFIG_SERIAL_SPRD is not set
-+# CONFIG_SERIAL_STM32 is not set
-+# CONFIG_SERIAL_ST_ASC is not set
-+# CONFIG_SERIAL_TIMBERDALE is not set
-+# CONFIG_SERIAL_UARTLITE is not set
-+# CONFIG_SERIAL_XILINX_PS_UART is not set
-+# CONFIG_SERIO is not set
-+# CONFIG_SERIO_ALTERA_PS2 is not set
-+# CONFIG_SERIO_AMBAKMI is not set
-+# CONFIG_SERIO_APBPS2 is not set
-+# CONFIG_SERIO_ARC_PS2 is not set
-+# CONFIG_SERIO_CT82C710 is not set
-+# CONFIG_SERIO_GPIO_PS2 is not set
-+# CONFIG_SERIO_I8042 is not set
-+# CONFIG_SERIO_LIBPS2 is not set
-+# CONFIG_SERIO_PARKBD is not set
-+# CONFIG_SERIO_PCIPS2 is not set
-+# CONFIG_SERIO_PS2MULT is not set
-+# CONFIG_SERIO_RAW is not set
-+# CONFIG_SERIO_SERPORT is not set
-+# CONFIG_SERIO_SUN4I_PS2 is not set
-+# CONFIG_SFC is not set
-+# CONFIG_SFC_FALCON is not set
-+# CONFIG_SFI is not set
-+# CONFIG_SFP is not set
-+# CONFIG_SF_PDMA is not set
-+# CONFIG_SGETMASK_SYSCALL is not set
-+# CONFIG_SGI_IOC4 is not set
-+# CONFIG_SGI_IP22 is not set
-+# CONFIG_SGI_IP27 is not set
-+# CONFIG_SGI_IP28 is not set
-+# CONFIG_SGI_IP30 is not set
-+# CONFIG_SGI_IP32 is not set
-+# CONFIG_SGI_MFD_IOC3 is not set
-+# CONFIG_SGI_PARTITION is not set
-+# CONFIG_SG_POOL is not set
-+# CONFIG_SG_SPLIT is not set
-+CONFIG_SHMEM=y
-+# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set
-+# CONFIG_SH_ETH is not set
-+# CONFIG_SH_TIMER_CMT is not set
-+# CONFIG_SH_TIMER_MTU2 is not set
-+# CONFIG_SH_TIMER_TMU is not set
-+# CONFIG_SI1133 is not set
-+# CONFIG_SI1145 is not set
-+# CONFIG_SI7005 is not set
-+# CONFIG_SI7020 is not set
-+# CONFIG_SIBYTE_BIGSUR is not set
-+# CONFIG_SIBYTE_CARMEL is not set
-+# CONFIG_SIBYTE_CRHINE is not set
-+# CONFIG_SIBYTE_CRHONE is not set
-+# CONFIG_SIBYTE_LITTLESUR is not set
-+# CONFIG_SIBYTE_RHONE is not set
-+# CONFIG_SIBYTE_SENTOSA is not set
-+# CONFIG_SIBYTE_SWARM is not set
-+CONFIG_SIGNALFD=y
-+# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set
-+# CONFIG_SIMPLE_GPIO is not set
-+# CONFIG_SIMPLE_PM_BUS is not set
-+# CONFIG_SIOX is not set
-+# CONFIG_SIS190 is not set
-+# CONFIG_SIS900 is not set
-+# CONFIG_SKGE is not set
-+# CONFIG_SKY2 is not set
-+# CONFIG_SKY2_DEBUG is not set
-+# CONFIG_SLAB is not set
-+CONFIG_SLABINFO=y
-+# CONFIG_SLAB_FREELIST_HARDENED is not set
-+# CONFIG_SLAB_FREELIST_RANDOM is not set
-+CONFIG_SLAB_MERGE_DEFAULT=y
-+# CONFIG_SLHC is not set
-+# CONFIG_SLICOSS is not set
-+# CONFIG_SLIMBUS is not set
-+# CONFIG_SLIP is not set
-+# CONFIG_SLOB is not set
-+CONFIG_SLUB=y
-+CONFIG_SLUB_CPU_PARTIAL=y
-+# CONFIG_SLUB_DEBUG is not set
-+# CONFIG_SLUB_DEBUG_ON is not set
-+# CONFIG_SLUB_MEMCG_SYSFS_ON is not set
-+# CONFIG_SLUB_STATS is not set
-+# CONFIG_SMARTJOYPLUS_FF is not set
-+# CONFIG_SMC911X is not set
-+# CONFIG_SMC9194 is not set
-+# CONFIG_SMC91X is not set
-+# CONFIG_SMP is not set
-+# CONFIG_SMSC911X is not set
-+# CONFIG_SMSC9420 is not set
-+# CONFIG_SMSC_PHY is not set
-+# CONFIG_SMS_SDIO_DRV is not set
-+# CONFIG_SMS_USB_DRV is not set
-+# CONFIG_SM_FTL is not set
-+# CONFIG_SND is not set
-+# CONFIG_SND_AC97_POWER_SAVE is not set
-+# CONFIG_SND_AD1816A is not set
-+# CONFIG_SND_AD1848 is not set
-+# CONFIG_SND_AD1889 is not set
-+# CONFIG_SND_ADLIB is not set
-+# CONFIG_SND_ALI5451 is not set
-+# CONFIG_SND_ALOOP is not set
-+# CONFIG_SND_ALS100 is not set
-+# CONFIG_SND_ALS300 is not set
-+# CONFIG_SND_ALS4000 is not set
-+# CONFIG_SND_ARM is not set
-+# CONFIG_SND_ASIHPI is not set
-+# CONFIG_SND_ATIIXP is not set
-+# CONFIG_SND_ATIIXP_MODEM is not set
-+# CONFIG_SND_ATMEL_AC97C is not set
-+# CONFIG_SND_ATMEL_SOC is not set
-+# CONFIG_SND_AU8810 is not set
-+# CONFIG_SND_AU8820 is not set
-+# CONFIG_SND_AU8830 is not set
-+# CONFIG_SND_AUDIO_GRAPH_CARD is not set
-+# CONFIG_SND_AUDIO_GRAPH_SCU_CARD is not set
-+# CONFIG_SND_AW2 is not set
-+# CONFIG_SND_AZT2320 is not set
-+# CONFIG_SND_AZT3328 is not set
-+# CONFIG_SND_BCD2000 is not set
-+# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set
-+# CONFIG_SND_BT87X is not set
-+# CONFIG_SND_CA0106 is not set
-+# CONFIG_SND_CMI8330 is not set
-+# CONFIG_SND_CMIPCI is not set
-+# CONFIG_SND_CS4231 is not set
-+# CONFIG_SND_CS4236 is not set
-+# CONFIG_SND_CS4281 is not set
-+# CONFIG_SND_CS46XX is not set
-+# CONFIG_SND_CS5530 is not set
-+# CONFIG_SND_CS5535AUDIO is not set
-+# CONFIG_SND_CTXFI is not set
-+# CONFIG_SND_DARLA20 is not set
-+# CONFIG_SND_DARLA24 is not set
-+# CONFIG_SND_DEBUG is not set
-+# CONFIG_SND_DESIGNWARE_I2S is not set
-+CONFIG_SND_DRIVERS=y
-+# CONFIG_SND_DUMMY is not set
-+# CONFIG_SND_DYNAMIC_MINORS is not set
-+# CONFIG_SND_ECHO3G is not set
-+# CONFIG_SND_EDMA_SOC is not set
-+# CONFIG_SND_EMU10K1 is not set
-+# CONFIG_SND_EMU10K1X is not set
-+# CONFIG_SND_EMU10K1_SEQ is not set
-+# CONFIG_SND_ENS1370 is not set
-+# CONFIG_SND_ENS1371 is not set
-+# CONFIG_SND_ES1688 is not set
-+# CONFIG_SND_ES18XX is not set
-+# CONFIG_SND_ES1938 is not set
-+# CONFIG_SND_ES1968 is not set
-+# CONFIG_SND_FIREWIRE is not set
-+# CONFIG_SND_FM801 is not set
-+# CONFIG_SND_GINA20 is not set
-+# CONFIG_SND_GINA24 is not set
-+# CONFIG_SND_GUSCLASSIC is not set
-+# CONFIG_SND_GUSEXTREME is not set
-+# CONFIG_SND_GUSMAX is not set
-+# CONFIG_SND_HDA_INTEL is not set
-+# CONFIG_SND_HDA_INTEL_DETECT_DMIC is not set
-+# CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM is not set
-+CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0
-+CONFIG_SND_HDA_PREALLOC_SIZE=64
-+# CONFIG_SND_HDSP is not set
-+# CONFIG_SND_HDSPM is not set
-+# CONFIG_SND_HRTIMER is not set
-+# CONFIG_SND_HWDEP is not set
-+# CONFIG_SND_I2S_HI6210_I2S is not set
-+# CONFIG_SND_ICE1712 is not set
-+# CONFIG_SND_ICE1724 is not set
-+# CONFIG_SND_INDIGO is not set
-+# CONFIG_SND_INDIGODJ is not set
-+# CONFIG_SND_INDIGODJX is not set
-+# CONFIG_SND_INDIGOIO is not set
-+# CONFIG_SND_INDIGOIOX is not set
-+# CONFIG_SND_INTEL8X0 is not set
-+# CONFIG_SND_INTEL8X0M is not set
-+# CONFIG_SND_INTERWAVE is not set
-+# CONFIG_SND_INTERWAVE_STB is not set
-+# CONFIG_SND_ISA is not set
-+# CONFIG_SND_JZ4740_SOC_I2S is not set
-+# CONFIG_SND_KIRKWOOD_SOC is not set
-+# CONFIG_SND_KORG1212 is not set
-+# CONFIG_SND_LAYLA20 is not set
-+# CONFIG_SND_LAYLA24 is not set
-+# CONFIG_SND_LOLA is not set
-+# CONFIG_SND_LX6464ES is not set
-+# CONFIG_SND_MAESTRO3 is not set
-+CONFIG_SND_MAX_CARDS=16
-+# CONFIG_SND_MIA is not set
-+# CONFIG_SND_MIPS is not set
-+# CONFIG_SND_MIRO is not set
-+# CONFIG_SND_MIXART is not set
-+# CONFIG_SND_MIXER_OSS is not set
-+# CONFIG_SND_MONA is not set
-+# CONFIG_SND_MPC52xx_SOC_EFIKA is not set
-+# CONFIG_SND_MPU401 is not set
-+# CONFIG_SND_MTPAV is not set
-+# CONFIG_SND_MTS64 is not set
-+# CONFIG_SND_MXS_SOC is not set
-+# CONFIG_SND_NM256 is not set
-+# CONFIG_SND_OPL3SA2 is not set
-+# CONFIG_SND_OPL3_LIB_SEQ is not set
-+# CONFIG_SND_OPL4_LIB_SEQ is not set
-+# CONFIG_SND_OPTI92X_AD1848 is not set
-+# CONFIG_SND_OPTI92X_CS4231 is not set
-+# CONFIG_SND_OPTI93X is not set
-+CONFIG_SND_OSSEMUL=y
-+# CONFIG_SND_OXYGEN is not set
-+CONFIG_SND_PCI=y
-+# CONFIG_SND_PCM is not set
-+# CONFIG_SND_PCMCIA is not set
-+# CONFIG_SND_PCM_OSS is not set
-+CONFIG_SND_PCM_OSS_PLUGINS=y
-+# CONFIG_SND_PCM_TIMER is not set
-+# CONFIG_SND_PCM_XRUN_DEBUG is not set
-+# CONFIG_SND_PCXHR is not set
-+# CONFIG_SND_PDAUDIOCF is not set
-+# CONFIG_SND_PORTMAN2X4 is not set
-+# CONFIG_SND_POWERPC_SOC is not set
-+# CONFIG_SND_PPC is not set
-+CONFIG_SND_PROC_FS=y
-+# CONFIG_SND_RAWMIDI is not set
-+# CONFIG_SND_RAWMIDI_SEQ is not set
-+# CONFIG_SND_RIPTIDE is not set
-+# CONFIG_SND_RME32 is not set
-+# CONFIG_SND_RME96 is not set
-+# CONFIG_SND_RME9652 is not set
-+# CONFIG_SND_RTCTIMER is not set
-+# CONFIG_SND_SB16 is not set
-+# CONFIG_SND_SB8 is not set
-+# CONFIG_SND_SBAWE is not set
-+# CONFIG_SND_SBAWE_SEQ is not set
-+# CONFIG_SND_SE6X is not set
-+# CONFIG_SND_SEQUENCER is not set
-+# CONFIG_SND_SERIAL_U16550 is not set
-+# CONFIG_SND_SIMPLE_CARD is not set
-+# CONFIG_SND_SIMPLE_SCU_CARD is not set
-+# CONFIG_SND_SIS7019 is not set
-+# CONFIG_SND_SOC is not set
-+# CONFIG_SND_SOC_AC97_CODEC is not set
-+# CONFIG_SND_SOC_ADAU1701 is not set
-+# CONFIG_SND_SOC_ADAU1761_I2C is not set
-+# CONFIG_SND_SOC_ADAU1761_SPI is not set
-+# CONFIG_SND_SOC_ADAU7002 is not set
-+# CONFIG_SND_SOC_ADAU7118_HW is not set
-+# CONFIG_SND_SOC_ADAU7118_I2C is not set
-+# CONFIG_SND_SOC_AK4104 is not set
-+# CONFIG_SND_SOC_AK4118 is not set
-+# CONFIG_SND_SOC_AK4458 is not set
-+# CONFIG_SND_SOC_AK4554 is not set
-+# CONFIG_SND_SOC_AK4613 is not set
-+# CONFIG_SND_SOC_AK4642 is not set
-+# CONFIG_SND_SOC_AK5386 is not set
-+# CONFIG_SND_SOC_AK5558 is not set
-+# CONFIG_SND_SOC_ALC5623 is not set
-+# CONFIG_SND_SOC_AMD_ACP is not set
-+# CONFIG_SND_SOC_AMD_ACP3x is not set
-+# CONFIG_SND_SOC_AMD_RENOIR is not set
-+# CONFIG_SND_SOC_AU1XAUDIO is not set
-+# CONFIG_SND_SOC_AU1XPSC is not set
-+# CONFIG_SND_SOC_BD28623 is not set
-+# CONFIG_SND_SOC_BT_SCO is not set
-+# CONFIG_SND_SOC_CS35L32 is not set
-+# CONFIG_SND_SOC_CS35L33 is not set
-+# CONFIG_SND_SOC_CS35L34 is not set
-+# CONFIG_SND_SOC_CS35L35 is not set
-+# CONFIG_SND_SOC_CS35L36 is not set
-+# CONFIG_SND_SOC_CS4234 is not set
-+# CONFIG_SND_SOC_CS4265 is not set
-+# CONFIG_SND_SOC_CS4270 is not set
-+# CONFIG_SND_SOC_CS4271 is not set
-+# CONFIG_SND_SOC_CS4271_I2C is not set
-+# CONFIG_SND_SOC_CS4271_SPI is not set
-+# CONFIG_SND_SOC_CS42L42 is not set
-+# CONFIG_SND_SOC_CS42L51_I2C is not set
-+# CONFIG_SND_SOC_CS42L52 is not set
-+# CONFIG_SND_SOC_CS42L56 is not set
-+# CONFIG_SND_SOC_CS42L73 is not set
-+# CONFIG_SND_SOC_CS42XX8_I2C is not set
-+# CONFIG_SND_SOC_CS43130 is not set
-+# CONFIG_SND_SOC_CS4341 is not set
-+# CONFIG_SND_SOC_CS4349 is not set
-+# CONFIG_SND_SOC_CS53L30 is not set
-+# CONFIG_SND_SOC_CX2072X is not set
-+# CONFIG_SND_SOC_DA7213 is not set
-+# CONFIG_SND_SOC_DIO2125 is not set
-+# CONFIG_SND_SOC_DMIC is not set
-+# CONFIG_SND_SOC_ES7134 is not set
-+# CONFIG_SND_SOC_ES7241 is not set
-+# CONFIG_SND_SOC_ES8316 is not set
-+# CONFIG_SND_SOC_ES8328 is not set
-+# CONFIG_SND_SOC_ES8328_I2C is not set
-+# CONFIG_SND_SOC_ES8328_SPI is not set
-+# CONFIG_SND_SOC_EUKREA_TLV320 is not set
-+# CONFIG_SND_SOC_FSL_ASOC_CARD is not set
-+# CONFIG_SND_SOC_FSL_ASRC is not set
-+# CONFIG_SND_SOC_FSL_AUDMIX is not set
-+# CONFIG_SND_SOC_FSL_ESAI is not set
-+# CONFIG_SND_SOC_FSL_MICFIL is not set
-+# CONFIG_SND_SOC_FSL_SAI is not set
-+# CONFIG_SND_SOC_FSL_SPDIF is not set
-+# CONFIG_SND_SOC_FSL_SSI is not set
-+# CONFIG_SND_SOC_GTM601 is not set
-+# CONFIG_SND_SOC_ICS43432 is not set
-+# CONFIG_SND_SOC_IMG is not set
-+# CONFIG_SND_SOC_IMX_AUDMIX is not set
-+# CONFIG_SND_SOC_IMX_AUDMUX is not set
-+# CONFIG_SND_SOC_IMX_ES8328 is not set
-+# CONFIG_SND_SOC_IMX_SPDIF is not set
-+# CONFIG_SND_SOC_IMX_WM8962 is not set
-+# CONFIG_SND_SOC_INNO_RK3036 is not set
-+# CONFIG_SND_SOC_INTEL_APL is not set
-+# CONFIG_SND_SOC_INTEL_BAYTRAIL is not set
-+# CONFIG_SND_SOC_INTEL_BDW_RT5677_MACH is not set
-+# CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH is not set
-+# CONFIG_SND_SOC_INTEL_BXT_RT298_MACH is not set
-+# CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH is not set
-+# CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH is not set
-+# CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH is not set
-+# CONFIG_SND_SOC_INTEL_BYT_CHT_ES8316_MACH is not set
-+# CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH is not set
-+# CONFIG_SND_SOC_INTEL_BYT_MAX98090_MACH is not set
-+# CONFIG_SND_SOC_INTEL_BYT_RT5640_MACH is not set
-+# CONFIG_SND_SOC_INTEL_CATPT is not set
-+# CONFIG_SND_SOC_INTEL_CFL is not set
-+# CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH is not set
-+# CONFIG_SND_SOC_INTEL_CHT_BSW_NAU8824_MACH is not set
-+# CONFIG_SND_SOC_INTEL_CHT_BSW_RT5645_MACH is not set
-+# CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH is not set
-+# CONFIG_SND_SOC_INTEL_CML_H is not set
-+# CONFIG_SND_SOC_INTEL_CML_LP is not set
-+# CONFIG_SND_SOC_INTEL_CNL is not set
-+# CONFIG_SND_SOC_INTEL_GLK is not set
-+# CONFIG_SND_SOC_INTEL_HASWELL is not set
-+# CONFIG_SND_SOC_INTEL_KBL is not set
-+# CONFIG_SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH is not set
-+# CONFIG_SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH is not set
-+# CONFIG_SND_SOC_INTEL_KEEMBAY is not set
-+# CONFIG_SND_SOC_INTEL_SKL is not set
-+# CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH is not set
-+# CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH is not set
-+# CONFIG_SND_SOC_INTEL_SKL_RT286_MACH is not set
-+# CONFIG_SND_SOC_INTEL_SKYLAKE is not set
-+# CONFIG_SND_SOC_INTEL_SST is not set
-+CONFIG_SND_SOC_INTEL_SST_TOPLEVEL=y
-+# CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES is not set
-+# CONFIG_SND_SOC_JZ4725B_CODEC is not set
-+# CONFIG_SND_SOC_JZ4740_CODEC is not set
-+# CONFIG_SND_SOC_JZ4770_CODEC is not set
-+# CONFIG_SND_SOC_MA120X0P is not set
-+# CONFIG_SND_SOC_MAX9759 is not set
-+# CONFIG_SND_SOC_MAX98088 is not set
-+# CONFIG_SND_SOC_MAX98357A is not set
-+# CONFIG_SND_SOC_MAX98373 is not set
-+# CONFIG_SND_SOC_MAX98373_I2C is not set
-+# CONFIG_SND_SOC_MAX98390 is not set
-+# CONFIG_SND_SOC_MAX98504 is not set
-+# CONFIG_SND_SOC_MAX9860 is not set
-+# CONFIG_SND_SOC_MAX9867 is not set
-+# CONFIG_SND_SOC_MAX98927 is not set
-+# CONFIG_SND_SOC_MEDIATEK is not set
-+# CONFIG_SND_SOC_MPC5200_AC97 is not set
-+# CONFIG_SND_SOC_MPC5200_I2S is not set
-+# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
-+# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
-+# CONFIG_SND_SOC_MT2701 is not set
-+# CONFIG_SND_SOC_MT6351 is not set
-+# CONFIG_SND_SOC_MT6358 is not set
-+# CONFIG_SND_SOC_MT6660 is not set
-+# CONFIG_SND_SOC_MT6797 is not set
-+# CONFIG_SND_SOC_MT8173 is not set
-+# CONFIG_SND_SOC_MT8183 is not set
-+# CONFIG_SND_SOC_MTK_BTCVSD is not set
-+# CONFIG_SND_SOC_NAU8540 is not set
-+# CONFIG_SND_SOC_NAU8810 is not set
-+# CONFIG_SND_SOC_NAU8822 is not set
-+# CONFIG_SND_SOC_NAU8824 is not set
-+# CONFIG_SND_SOC_PCM1681 is not set
-+# CONFIG_SND_SOC_PCM1789_I2C is not set
-+# CONFIG_SND_SOC_PCM1792A is not set
-+# CONFIG_SND_SOC_PCM179X_I2C is not set
-+# CONFIG_SND_SOC_PCM179X_SPI is not set
-+# CONFIG_SND_SOC_PCM186X_I2C is not set
-+# CONFIG_SND_SOC_PCM186X_SPI is not set
-+# CONFIG_SND_SOC_PCM3060_I2C is not set
-+# CONFIG_SND_SOC_PCM3060_SPI is not set
-+# CONFIG_SND_SOC_PCM3168A_I2C is not set
-+# CONFIG_SND_SOC_PCM3168A_SPI is not set
-+# CONFIG_SND_SOC_PCM512x_I2C is not set
-+# CONFIG_SND_SOC_PCM512x_SPI is not set
-+# CONFIG_SND_SOC_QCOM is not set
-+# CONFIG_SND_SOC_RK3328 is not set
-+# CONFIG_SND_SOC_RT5616 is not set
-+# CONFIG_SND_SOC_RT5631 is not set
-+# CONFIG_SND_SOC_RT5677_SPI is not set
-+# CONFIG_SND_SOC_SGTL5000 is not set
-+# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set
-+# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set
-+# CONFIG_SND_SOC_SOF_TOPLEVEL is not set
-+# CONFIG_SND_SOC_SPDIF is not set
-+# CONFIG_SND_SOC_SSM2305 is not set
-+# CONFIG_SND_SOC_SSM2602_I2C is not set
-+# CONFIG_SND_SOC_SSM2602_SPI is not set
-+# CONFIG_SND_SOC_SSM4567 is not set
-+# CONFIG_SND_SOC_STA32X is not set
-+# CONFIG_SND_SOC_STA350 is not set
-+# CONFIG_SND_SOC_STI_SAS is not set
-+# CONFIG_SND_SOC_TAS2552 is not set
-+# CONFIG_SND_SOC_TAS2562 is not set
-+# CONFIG_SND_SOC_TAS2764 is not set
-+# CONFIG_SND_SOC_TAS2770 is not set
-+# CONFIG_SND_SOC_TAS5086 is not set
-+# CONFIG_SND_SOC_TAS571X is not set
-+# CONFIG_SND_SOC_TAS5720 is not set
-+# CONFIG_SND_SOC_TAS6424 is not set
-+# CONFIG_SND_SOC_TDA7419 is not set
-+# CONFIG_SND_SOC_TFA9879 is not set
-+# CONFIG_SND_SOC_TLV320ADCX140 is not set
-+# CONFIG_SND_SOC_TLV320AIC23_I2C is not set
-+# CONFIG_SND_SOC_TLV320AIC23_SPI is not set
-+# CONFIG_SND_SOC_TLV320AIC31XX is not set
-+# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set
-+# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set
-+# CONFIG_SND_SOC_TLV320AIC3X is not set
-+# CONFIG_SND_SOC_TPA6130A2 is not set
-+# CONFIG_SND_SOC_TS3A227E is not set
-+# CONFIG_SND_SOC_TSCS42XX is not set
-+# CONFIG_SND_SOC_TSCS454 is not set
-+# CONFIG_SND_SOC_UDA1334 is not set
-+# CONFIG_SND_SOC_WM8510 is not set
-+# CONFIG_SND_SOC_WM8523 is not set
-+# CONFIG_SND_SOC_WM8524 is not set
-+# CONFIG_SND_SOC_WM8580 is not set
-+# CONFIG_SND_SOC_WM8711 is not set
-+# CONFIG_SND_SOC_WM8728 is not set
-+# CONFIG_SND_SOC_WM8731 is not set
-+# CONFIG_SND_SOC_WM8737 is not set
-+# CONFIG_SND_SOC_WM8741 is not set
-+# CONFIG_SND_SOC_WM8750 is not set
-+# CONFIG_SND_SOC_WM8753 is not set
-+# CONFIG_SND_SOC_WM8770 is not set
-+# CONFIG_SND_SOC_WM8776 is not set
-+# CONFIG_SND_SOC_WM8782 is not set
-+# CONFIG_SND_SOC_WM8804_I2C is not set
-+# CONFIG_SND_SOC_WM8804_SPI is not set
-+# CONFIG_SND_SOC_WM8903 is not set
-+# CONFIG_SND_SOC_WM8904 is not set
-+# CONFIG_SND_SOC_WM8960 is not set
-+# CONFIG_SND_SOC_WM8962 is not set
-+# CONFIG_SND_SOC_WM8974 is not set
-+# CONFIG_SND_SOC_WM8978 is not set
-+# CONFIG_SND_SOC_WM8985 is not set
-+# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set
-+# CONFIG_SND_SOC_XILINX_I2S is not set
-+# CONFIG_SND_SOC_XILINX_SPDIF is not set
-+# CONFIG_SND_SOC_XTFPGA_I2S is not set
-+# CONFIG_SND_SOC_ZL38060 is not set
-+# CONFIG_SND_SOC_ZX_AUD96P22 is not set
-+# CONFIG_SND_SONICVIBES is not set
-+# CONFIG_SND_SPI is not set
-+# CONFIG_SND_SSCAPE is not set
-+# CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_ACPI is not set
-+# CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_PCI is not set
-+# CONFIG_SND_SUN4I_CODEC is not set
-+# CONFIG_SND_SUPPORT_OLD_API is not set
-+# CONFIG_SND_TIMER is not set
-+# CONFIG_SND_TRIDENT is not set
-+CONFIG_SND_USB=y
-+# CONFIG_SND_USB_6FIRE is not set
-+# CONFIG_SND_USB_AUDIO is not set
-+# CONFIG_SND_USB_CAIAQ is not set
-+# CONFIG_SND_USB_HIFACE is not set
-+# CONFIG_SND_USB_POD is not set
-+# CONFIG_SND_USB_PODHD is not set
-+# CONFIG_SND_USB_TONEPORT is not set
-+# CONFIG_SND_USB_UA101 is not set
-+# CONFIG_SND_USB_US122L is not set
-+# CONFIG_SND_USB_USX2Y is not set
-+# CONFIG_SND_USB_VARIAX is not set
-+# CONFIG_SND_VERBOSE_PRINTK is not set
-+CONFIG_SND_VERBOSE_PROCFS=y
-+# CONFIG_SND_VIA82XX is not set
-+# CONFIG_SND_VIA82XX_MODEM is not set
-+# CONFIG_SND_VIRTUOSO is not set
-+# CONFIG_SND_VX222 is not set
-+# CONFIG_SND_VXPOCKET is not set
-+# CONFIG_SND_WAVEFRONT is not set
-+CONFIG_SND_X86=y
-+# CONFIG_SND_XEN_FRONTEND is not set
-+# CONFIG_SND_YMFPCI is not set
-+# CONFIG_SNI_RM is not set
-+# CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set
-+# CONFIG_SOCK_CGROUP_DATA is not set
-+# CONFIG_SOC_AM33XX is not set
-+# CONFIG_SOC_AM43XX is not set
-+# CONFIG_SOC_BRCMSTB is not set
-+# CONFIG_SOC_CAMERA is not set
-+# CONFIG_SOC_DRA7XX is not set
-+# CONFIG_SOC_HAS_OMAP2_SDRC is not set
-+# CONFIG_SOC_OMAP5 is not set
-+# CONFIG_SOC_TI is not set
-+# CONFIG_SOFTLOCKUP_DETECTOR is not set
-+# CONFIG_SOFT_WATCHDOG is not set
-+# CONFIG_SOLARIS_X86_PARTITION is not set
-+# CONFIG_SONYPI is not set
-+# CONFIG_SONY_LAPTOP is not set
-+# CONFIG_SOUND is not set
-+# CONFIG_SOUNDWIRE is not set
-+# CONFIG_SOUND_OSS_CORE is not set
-+# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
-+# CONFIG_SOUND_PRIME is not set
-+# CONFIG_SP5100_TCO is not set
-+# CONFIG_SPARSEMEM_MANUAL is not set
-+# CONFIG_SPARSEMEM_STATIC is not set
-+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
-+# CONFIG_SPARSE_IRQ is not set
-+# CONFIG_SPARSE_RCU_POINTER is not set
-+# CONFIG_SPEAKUP is not set
-+# CONFIG_SPI is not set
-+# CONFIG_SPINLOCK_TEST is not set
-+# CONFIG_SPI_ALTERA is not set
-+# CONFIG_SPI_AMD is not set
-+# CONFIG_SPI_AU1550 is not set
-+# CONFIG_SPI_AXI_SPI_ENGINE is not set
-+# CONFIG_SPI_BCM2835 is not set
-+# CONFIG_SPI_BCM_QSPI is not set
-+# CONFIG_SPI_BITBANG is not set
-+# CONFIG_SPI_BUTTERFLY is not set
-+# CONFIG_SPI_CADENCE is not set
-+# CONFIG_SPI_CADENCE_QUADSPI is not set
-+# CONFIG_SPI_DEBUG is not set
-+# CONFIG_SPI_DESIGNWARE is not set
-+# CONFIG_SPI_FSL_DSPI is not set
-+# CONFIG_SPI_FSL_ESPI is not set
-+# CONFIG_SPI_FSL_SPI is not set
-+# CONFIG_SPI_GPIO is not set
-+# CONFIG_SPI_GPIO_OLD is not set
-+# CONFIG_SPI_IMG_SPFI is not set
-+# CONFIG_SPI_LANTIQ_SSC is not set
-+# CONFIG_SPI_LM70_LLP is not set
-+# CONFIG_SPI_LOOPBACK_TEST is not set
-+# CONFIG_SPI_MASTER is not set
-+# CONFIG_SPI_MEM is not set
-+# CONFIG_SPI_MPC52xx is not set
-+# CONFIG_SPI_MPC52xx_PSC is not set
-+# CONFIG_SPI_MTK_QUADSPI is not set
-+# CONFIG_SPI_MUX is not set
-+# CONFIG_SPI_MXIC is not set
-+# CONFIG_SPI_NXP_FLEXSPI is not set
-+# CONFIG_SPI_OCTEON is not set
-+# CONFIG_SPI_OC_TINY is not set
-+# CONFIG_SPI_ORION is not set
-+# CONFIG_SPI_PL022 is not set
-+# CONFIG_SPI_PPC4xx is not set
-+# CONFIG_SPI_PXA2XX is not set
-+# CONFIG_SPI_PXA2XX_PCI is not set
-+# CONFIG_SPI_QCOM_QSPI is not set
-+# CONFIG_SPI_ROCKCHIP is not set
-+# CONFIG_SPI_S3C64XX is not set
-+# CONFIG_SPI_SC18IS602 is not set
-+# CONFIG_SPI_SIFIVE is not set
-+# CONFIG_SPI_SLAVE is not set
-+# CONFIG_SPI_SPIDEV is not set
-+# CONFIG_SPI_THUNDERX is not set
-+# CONFIG_SPI_TI_QSPI is not set
-+# CONFIG_SPI_TLE62X0 is not set
-+# CONFIG_SPI_TOPCLIFF_PCH is not set
-+# CONFIG_SPI_XCOMM is not set
-+# CONFIG_SPI_XILINX is not set
-+# CONFIG_SPI_XWAY is not set
-+# CONFIG_SPI_ZYNQMP_GQSPI is not set
-+CONFIG_SPLIT_PTLOCK_CPUS=4
-+# CONFIG_SPMI is not set
-+# CONFIG_SPS30 is not set
-+CONFIG_SQUASHFS=y
-+# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set
-+# CONFIG_SQUASHFS_DECOMP_MULTI is not set
-+CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
-+# CONFIG_SQUASHFS_DECOMP_SINGLE is not set
-+CONFIG_SQUASHFS_EMBEDDED=y
-+# CONFIG_SQUASHFS_FILE_CACHE is not set
-+CONFIG_SQUASHFS_FILE_DIRECT=y
-+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
-+# CONFIG_SQUASHFS_LZ4 is not set
-+# CONFIG_SQUASHFS_LZO is not set
-+# CONFIG_SQUASHFS_XATTR is not set
-+CONFIG_SQUASHFS_XZ=y
-+# CONFIG_SQUASHFS_ZLIB is not set
-+# CONFIG_SQUASHFS_ZSTD is not set
-+# CONFIG_SRAM is not set
-+# CONFIG_SRF04 is not set
-+# CONFIG_SRF08 is not set
-+# CONFIG_SSB is not set
-+# CONFIG_SSB_DEBUG is not set
-+# CONFIG_SSB_DRIVER_GPIO is not set
-+# CONFIG_SSB_HOST_SOC is not set
-+# CONFIG_SSB_PCMCIAHOST is not set
-+CONFIG_SSB_POSSIBLE=y
-+# CONFIG_SSB_SDIOHOST is not set
-+# CONFIG_SSB_SILENT is not set
-+# CONFIG_SSFDC is not set
-+# CONFIG_STACKPROTECTOR is not set
-+# CONFIG_STACKPROTECTOR_STRONG is not set
-+# CONFIG_STACKTRACE is not set
-+CONFIG_STACKTRACE_SUPPORT=y
-+# CONFIG_STACK_TRACER is not set
-+# CONFIG_STACK_VALIDATION is not set
-+CONFIG_STAGING=y
-+# CONFIG_STAGING_BOARD is not set
-+# CONFIG_STAGING_GASKET_FRAMEWORK is not set
-+# CONFIG_STAGING_MEDIA is not set
-+CONFIG_STANDALONE=y
-+# CONFIG_STATIC_KEYS_SELFTEST is not set
-+# CONFIG_STATIC_USERMODEHELPER is not set
-+CONFIG_STDBINUTILS=y
-+# CONFIG_STE10XP is not set
-+# CONFIG_STE_MODEM_RPROC is not set
-+# CONFIG_STK3310 is not set
-+# CONFIG_STK8312 is not set
-+# CONFIG_STK8BA50 is not set
-+# CONFIG_STM is not set
-+# CONFIG_STMMAC_ETH is not set
-+# CONFIG_STMMAC_PCI is not set
-+# CONFIG_STMMAC_PLATFORM is not set
-+# CONFIG_STM_DUMMY is not set
-+# CONFIG_STM_SOURCE_CONSOLE is not set
-+CONFIG_STP=y
-+# CONFIG_STREAM_PARSER is not set
-+# CONFIG_STRICT_DEVMEM is not set
-+CONFIG_STRICT_KERNEL_RWX=y
-+CONFIG_STRICT_MODULE_RWX=y
-+# CONFIG_STRING_SELFTEST is not set
-+CONFIG_STRIP_ASM_SYMS=y
-+# CONFIG_STX104 is not set
-+# CONFIG_ST_UVIS25 is not set
-+# CONFIG_SUN4I_GPADC is not set
-+# CONFIG_SUN50I_DE2_BUS is not set
-+# CONFIG_SUN50I_ERRATUM_UNKNOWN1 is not set
-+# CONFIG_SUNDANCE is not set
-+# CONFIG_SUNGEM is not set
-+# CONFIG_SUNRPC is not set
-+# CONFIG_SUNRPC_DEBUG is not set
-+CONFIG_SUNRPC_DISABLE_INSECURE_ENCTYPES=y
-+# CONFIG_SUNRPC_GSS is not set
-+# CONFIG_SUNXI_SRAM is not set
-+# CONFIG_SUN_PARTITION is not set
-+# CONFIG_SURFACE_3_BUTTON is not set
-+# CONFIG_SUSPEND is not set
-+# CONFIG_SUSPEND_SKIP_SYNC is not set
-+CONFIG_SWAP=y
-+# CONFIG_SWCONFIG is not set
-+# CONFIG_SWCONFIG_B53 is not set
-+# CONFIG_SWCONFIG_B53_MDIO_DRIVER is not set
-+# CONFIG_SWCONFIG_B53_MMAP_DRIVER is not set
-+# CONFIG_SWCONFIG_B53_SPI_DRIVER is not set
-+# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set
-+# CONFIG_SWCONFIG_LEDS is not set
-+# CONFIG_SW_SYNC is not set
-+# CONFIG_SX9310 is not set
-+# CONFIG_SX9500 is not set
-+# CONFIG_SXGBE_ETH is not set
-+CONFIG_SYMBOLIC_ERRNAME=y
-+# CONFIG_SYNCLINK_CS is not set
-+# CONFIG_SYNC_FILE is not set
-+# CONFIG_SYNOPSYS_DWC_ETH_QOS is not set
-+# CONFIG_SYNTH_EVENTS is not set
-+CONFIG_SYN_COOKIES=y
-+# CONFIG_SYSCON_REBOOT_MODE is not set
-+CONFIG_SYSCTL=y
-+# CONFIG_SYSCTL_SYSCALL is not set
-+CONFIG_SYSFS=y
-+# CONFIG_SYSFS_DEPRECATED is not set
-+# CONFIG_SYSFS_DEPRECATED_V2 is not set
-+# CONFIG_SYSFS_SYSCALL is not set
-+# CONFIG_SYSTEMPORT is not set
-+# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set
-+# CONFIG_SYSTEM_DATA_VERIFICATION is not set
-+# CONFIG_SYSTEM_TRUSTED_KEYRING is not set
-+CONFIG_SYSTEM_TRUSTED_KEYS=""
-+# CONFIG_SYSV68_PARTITION is not set
-+CONFIG_SYSVIPC=y
-+CONFIG_SYSVIPC_SYSCTL=y
-+# CONFIG_SYSV_FS is not set
-+# CONFIG_SYS_HYPERVISOR is not set
-+# CONFIG_T5403 is not set
-+# CONFIG_TARGET_CORE is not set
-+# CONFIG_TASKSTATS is not set
-+# CONFIG_TASKS_RCU is not set
-+CONFIG_TASKS_TRACE_RCU_READ_MB=y
-+# CONFIG_TASK_XACCT is not set
-+# CONFIG_TC35815 is not set
-+# CONFIG_TCG_ATMEL is not set
-+# CONFIG_TCG_CRB is not set
-+# CONFIG_TCG_FTPM_TEE is not set
-+# CONFIG_TCG_INFINEON is not set
-+# CONFIG_TCG_NSC is not set
-+# CONFIG_TCG_ST33_I2C is not set
-+# CONFIG_TCG_TIS is not set
-+# CONFIG_TCG_TIS_I2C_ATMEL is not set
-+# CONFIG_TCG_TIS_I2C_INFINEON is not set
-+# CONFIG_TCG_TIS_I2C_NUVOTON is not set
-+# CONFIG_TCG_TIS_SPI is not set
-+# CONFIG_TCG_TIS_ST33ZP24_I2C is not set
-+# CONFIG_TCG_TIS_ST33ZP24_SPI is not set
-+# CONFIG_TCG_TPM is not set
-+# CONFIG_TCG_VTPM_PROXY is not set
-+# CONFIG_TCG_XEN is not set
-+# CONFIG_TCIC is not set
-+CONFIG_TCP_CONG_ADVANCED=y
-+# CONFIG_TCP_CONG_BBR is not set
-+# CONFIG_TCP_CONG_BIC is not set
-+# CONFIG_TCP_CONG_CDG is not set
-+CONFIG_TCP_CONG_CUBIC=y
-+# CONFIG_TCP_CONG_DCTCP is not set
-+# CONFIG_TCP_CONG_HSTCP is not set
-+# CONFIG_TCP_CONG_HTCP is not set
-+# CONFIG_TCP_CONG_HYBLA is not set
-+# CONFIG_TCP_CONG_ILLINOIS is not set
-+# CONFIG_TCP_CONG_LP is not set
-+# CONFIG_TCP_CONG_NV is not set
-+# CONFIG_TCP_CONG_SCALABLE is not set
-+# CONFIG_TCP_CONG_VEGAS is not set
-+# CONFIG_TCP_CONG_VENO is not set
-+# CONFIG_TCP_CONG_WESTWOOD is not set
-+# CONFIG_TCP_CONG_YEAH is not set
-+# CONFIG_TCP_MD5SIG is not set
-+# CONFIG_TCS3414 is not set
-+# CONFIG_TCS3472 is not set
-+# CONFIG_TEE is not set
-+# CONFIG_TEGRA_AHB is not set
-+# CONFIG_TEGRA_HOST1X is not set
-+# CONFIG_TEHUTI is not set
-+# CONFIG_TERANETICS_PHY is not set
-+# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set
-+# CONFIG_TEST_BITFIELD is not set
-+# CONFIG_TEST_BITMAP is not set
-+# CONFIG_TEST_BITOPS is not set
-+# CONFIG_TEST_BLACKHOLE_DEV is not set
-+# CONFIG_TEST_BPF is not set
-+# CONFIG_TEST_FIRMWARE is not set
-+# CONFIG_TEST_FREE_PAGES is not set
-+# CONFIG_TEST_HASH is not set
-+# CONFIG_TEST_HEXDUMP is not set
-+# CONFIG_TEST_IDA is not set
-+# CONFIG_TEST_KMOD is not set
-+# CONFIG_TEST_KSTRTOX is not set
-+# CONFIG_TEST_LIST_SORT is not set
-+# CONFIG_TEST_LKM is not set
-+# CONFIG_TEST_LOCKUP is not set
-+# CONFIG_TEST_MEMCAT_P is not set
-+# CONFIG_TEST_MEMINIT is not set
-+# CONFIG_TEST_MIN_HEAP is not set
-+# CONFIG_TEST_OVERFLOW is not set
-+# CONFIG_TEST_POWER is not set
-+# CONFIG_TEST_PRINTF is not set
-+# CONFIG_TEST_RHASHTABLE is not set
-+# CONFIG_TEST_SORT is not set
-+# CONFIG_TEST_STACKINIT is not set
-+# CONFIG_TEST_STATIC_KEYS is not set
-+# CONFIG_TEST_STRING_HELPERS is not set
-+# CONFIG_TEST_STRSCPY is not set
-+# CONFIG_TEST_SYSCTL is not set
-+# CONFIG_TEST_UDELAY is not set
-+# CONFIG_TEST_USER_COPY is not set
-+# CONFIG_TEST_UUID is not set
-+# CONFIG_TEST_VMALLOC is not set
-+# CONFIG_TEST_XARRAY is not set
-+CONFIG_TEXTSEARCH=y
-+# CONFIG_TEXTSEARCH_BM is not set
-+# CONFIG_TEXTSEARCH_FSM is not set
-+# CONFIG_TEXTSEARCH_KMP is not set
-+# CONFIG_THERMAL is not set
-+# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set
-+# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set
-+# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set
-+# CONFIG_THERMAL_EMULATION is not set
-+# CONFIG_THERMAL_GOV_BANG_BANG is not set
-+# CONFIG_THERMAL_GOV_FAIR_SHARE is not set
-+# CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set
-+# CONFIG_THERMAL_GOV_USER_SPACE is not set
-+# CONFIG_THERMAL_HWMON is not set
-+# CONFIG_THERMAL_MMIO is not set
-+# CONFIG_THERMAL_NETLINK is not set
-+# CONFIG_THERMAL_STATISTICS is not set
-+# CONFIG_THERMAL_WRITABLE_TRIPS is not set
-+# CONFIG_THINKPAD_ACPI is not set
-+CONFIG_THIN_ARCHIVES=y
-+# CONFIG_THRUSTMASTER_FF is not set
-+# CONFIG_THUMB2_KERNEL is not set
-+# CONFIG_THUNDERBOLT is not set
-+# CONFIG_THUNDER_NIC_BGX is not set
-+# CONFIG_THUNDER_NIC_PF is not set
-+# CONFIG_THUNDER_NIC_RGX is not set
-+# CONFIG_THUNDER_NIC_VF is not set
-+# CONFIG_TICK_CPU_ACCOUNTING is not set
-+CONFIG_TICK_ONESHOT=y
-+# CONFIG_TIFM_CORE is not set
-+# CONFIG_TIGON3 is not set
-+# CONFIG_TIMB_DMA is not set
-+CONFIG_TIMERFD=y
-+# CONFIG_TIMER_STATS is not set
-+# CONFIG_TIME_NS is not set
-+# CONFIG_TINYDRM_HX8357D is not set
-+# CONFIG_TINYDRM_ILI9225 is not set
-+# CONFIG_TINYDRM_ILI9341 is not set
-+# CONFIG_TINYDRM_ILI9486 is not set
-+# CONFIG_TINYDRM_MI0283QT is not set
-+# CONFIG_TINYDRM_REPAPER is not set
-+# CONFIG_TINYDRM_ST7586 is not set
-+# CONFIG_TINYDRM_ST7735R is not set
-+CONFIG_TINY_RCU=y
-+# CONFIG_TIPC is not set
-+# CONFIG_TI_ADC081C is not set
-+# CONFIG_TI_ADC0832 is not set
-+# CONFIG_TI_ADC084S021 is not set
-+# CONFIG_TI_ADC108S102 is not set
-+# CONFIG_TI_ADC12138 is not set
-+# CONFIG_TI_ADC128S052 is not set
-+# CONFIG_TI_ADC161S626 is not set
-+# CONFIG_TI_ADS1015 is not set
-+# CONFIG_TI_ADS124S08 is not set
-+# CONFIG_TI_ADS7950 is not set
-+# CONFIG_TI_ADS8344 is not set
-+# CONFIG_TI_ADS8688 is not set
-+# CONFIG_TI_AM335X_ADC is not set
-+# CONFIG_TI_CPSW is not set
-+# CONFIG_TI_CPSW_ALE is not set
-+# CONFIG_TI_CPSW_PHY_SEL is not set
-+# CONFIG_TI_CPTS is not set
-+# CONFIG_TI_DAC082S085 is not set
-+# CONFIG_TI_DAC5571 is not set
-+# CONFIG_TI_DAC7311 is not set
-+# CONFIG_TI_DAC7512 is not set
-+# CONFIG_TI_DAC7612 is not set
-+# CONFIG_TI_DAVINCI_CPDMA is not set
-+# CONFIG_TI_DAVINCI_MDIO is not set
-+# CONFIG_TI_ST is not set
-+# CONFIG_TI_SYSCON_RESET is not set
-+# CONFIG_TI_TLC4541 is not set
-+# CONFIG_TLAN is not set
-+# CONFIG_TLS is not set
-+# CONFIG_TMD_HERMES is not set
-+# CONFIG_TMP006 is not set
-+# CONFIG_TMP007 is not set
-+CONFIG_TMPFS=y
-+# CONFIG_TMPFS_INODE64 is not set
-+# CONFIG_TMPFS_POSIX_ACL is not set
-+CONFIG_TMPFS_XATTR=y
-+# CONFIG_TOPSTAR_LAPTOP is not set
-+# CONFIG_TORTURE_TEST is not set
-+# CONFIG_TOSHIBA_HAPS is not set
-+# CONFIG_TOUCHSCREEN_88PM860X is not set
-+# CONFIG_TOUCHSCREEN_AD7877 is not set
-+# CONFIG_TOUCHSCREEN_AD7879 is not set
-+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
-+# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
-+# CONFIG_TOUCHSCREEN_ADC is not set
-+# CONFIG_TOUCHSCREEN_ADS7846 is not set
-+# CONFIG_TOUCHSCREEN_AR1021_I2C is not set
-+# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
-+# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set
-+# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set
-+# CONFIG_TOUCHSCREEN_BU21013 is not set
-+# CONFIG_TOUCHSCREEN_BU21029 is not set
-+# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set
-+# CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set
-+# CONFIG_TOUCHSCREEN_COLIBRI_VF50 is not set
-+# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set
-+# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
-+# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set
-+# CONFIG_TOUCHSCREEN_CYTTSP4_I2C is not set
-+# CONFIG_TOUCHSCREEN_CYTTSP4_SPI is not set
-+# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set
-+# CONFIG_TOUCHSCREEN_CYTTSP_I2C is not set
-+# CONFIG_TOUCHSCREEN_CYTTSP_SPI is not set
-+# CONFIG_TOUCHSCREEN_DA9034 is not set
-+# CONFIG_TOUCHSCREEN_DA9052 is not set
-+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
-+# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set
-+# CONFIG_TOUCHSCREEN_EETI is not set
-+# CONFIG_TOUCHSCREEN_EGALAX is not set
-+# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set
-+# CONFIG_TOUCHSCREEN_EKTF2127 is not set
-+# CONFIG_TOUCHSCREEN_ELAN is not set
-+# CONFIG_TOUCHSCREEN_ELO is not set
-+# CONFIG_TOUCHSCREEN_EXC3000 is not set
-+# CONFIG_TOUCHSCREEN_FUJITSU is not set
-+# CONFIG_TOUCHSCREEN_GOODIX is not set
-+# CONFIG_TOUCHSCREEN_GUNZE is not set
-+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
-+# CONFIG_TOUCHSCREEN_HIDEEP is not set
-+# CONFIG_TOUCHSCREEN_HP600 is not set
-+# CONFIG_TOUCHSCREEN_HP7XX is not set
-+# CONFIG_TOUCHSCREEN_HTCPEN is not set
-+# CONFIG_TOUCHSCREEN_ILI210X is not set
-+# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set
-+# CONFIG_TOUCHSCREEN_INEXIO is not set
-+# CONFIG_TOUCHSCREEN_IPAQ_MICRO is not set
-+# CONFIG_TOUCHSCREEN_IPROC is not set
-+# CONFIG_TOUCHSCREEN_IQS5XX is not set
-+# CONFIG_TOUCHSCREEN_LPC32XX is not set
-+# CONFIG_TOUCHSCREEN_MAX11801 is not set
-+# CONFIG_TOUCHSCREEN_MC13783 is not set
-+# CONFIG_TOUCHSCREEN_MCS5000 is not set
-+# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set
-+# CONFIG_TOUCHSCREEN_MIGOR is not set
-+# CONFIG_TOUCHSCREEN_MK712 is not set
-+# CONFIG_TOUCHSCREEN_MMS114 is not set
-+# CONFIG_TOUCHSCREEN_MTOUCH is not set
-+# CONFIG_TOUCHSCREEN_MX25 is not set
-+# CONFIG_TOUCHSCREEN_MXS_LRADC is not set
-+# CONFIG_TOUCHSCREEN_PCAP is not set
-+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
-+# CONFIG_TOUCHSCREEN_PIXCIR is not set
-+# CONFIG_TOUCHSCREEN_PROPERTIES is not set
-+# CONFIG_TOUCHSCREEN_RASPBERRYPI_FW is not set
-+# CONFIG_TOUCHSCREEN_RM_TS is not set
-+# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set
-+# CONFIG_TOUCHSCREEN_RPI_FT5406 is not set
-+# CONFIG_TOUCHSCREEN_S3C2410 is not set
-+# CONFIG_TOUCHSCREEN_S6SY761 is not set
-+# CONFIG_TOUCHSCREEN_SILEAD is not set
-+# CONFIG_TOUCHSCREEN_SIS_I2C is not set
-+# CONFIG_TOUCHSCREEN_ST1232 is not set
-+# CONFIG_TOUCHSCREEN_STMFTS is not set
-+# CONFIG_TOUCHSCREEN_STMPE is not set
-+# CONFIG_TOUCHSCREEN_SUN4I is not set
-+# CONFIG_TOUCHSCREEN_SUR40 is not set
-+# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set
-+# CONFIG_TOUCHSCREEN_SX8654 is not set
-+# CONFIG_TOUCHSCREEN_TI_AM335X_TSC is not set
-+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
-+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
-+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
-+# CONFIG_TOUCHSCREEN_TPS6507X is not set
-+# CONFIG_TOUCHSCREEN_TS4800 is not set
-+# CONFIG_TOUCHSCREEN_TSC2004 is not set
-+# CONFIG_TOUCHSCREEN_TSC2005 is not set
-+# CONFIG_TOUCHSCREEN_TSC2007 is not set
-+# CONFIG_TOUCHSCREEN_TSC2007_IIO is not set
-+# CONFIG_TOUCHSCREEN_TSC200X_CORE is not set
-+# CONFIG_TOUCHSCREEN_TSC_SERIO is not set
-+# CONFIG_TOUCHSCREEN_UCB1400 is not set
-+# CONFIG_TOUCHSCREEN_USB_3M is not set
-+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
-+# CONFIG_TOUCHSCREEN_USB_DMC_TSC10 is not set
-+# CONFIG_TOUCHSCREEN_USB_E2I is not set
-+# CONFIG_TOUCHSCREEN_USB_EASYTOUCH is not set
-+# CONFIG_TOUCHSCREEN_USB_EGALAX is not set
-+# CONFIG_TOUCHSCREEN_USB_ELO is not set
-+# CONFIG_TOUCHSCREEN_USB_ETT_TC45USB is not set
-+# CONFIG_TOUCHSCREEN_USB_ETURBO is not set
-+# CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH is not set
-+# CONFIG_TOUCHSCREEN_USB_GOTOP is not set
-+# CONFIG_TOUCHSCREEN_USB_GUNZE is not set
-+# CONFIG_TOUCHSCREEN_USB_IDEALTEK is not set
-+# CONFIG_TOUCHSCREEN_USB_IRTOUCH is not set
-+# CONFIG_TOUCHSCREEN_USB_ITM is not set
-+# CONFIG_TOUCHSCREEN_USB_JASTEC is not set
-+# CONFIG_TOUCHSCREEN_USB_NEXIO is not set
-+# CONFIG_TOUCHSCREEN_USB_PANJIT is not set
-+# CONFIG_TOUCHSCREEN_USB_ZYTRONIC is not set
-+# CONFIG_TOUCHSCREEN_W90X900 is not set
-+# CONFIG_TOUCHSCREEN_WACOM_I2C is not set
-+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
-+# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set
-+# CONFIG_TOUCHSCREEN_WM831X is not set
-+# CONFIG_TOUCHSCREEN_WM9705 is not set
-+# CONFIG_TOUCHSCREEN_WM9712 is not set
-+# CONFIG_TOUCHSCREEN_WM9713 is not set
-+# CONFIG_TOUCHSCREEN_WM97XX is not set
-+# CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set
-+# CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE is not set
-+# CONFIG_TOUCHSCREEN_ZET6223 is not set
-+# CONFIG_TOUCHSCREEN_ZFORCE is not set
-+# CONFIG_TOUCHSCREEN_ZINITIX is not set
-+# CONFIG_TPL0102 is not set
-+# CONFIG_TPS6105X is not set
-+# CONFIG_TPS65010 is not set
-+# CONFIG_TPS6507X is not set
-+# CONFIG_TRACEPOINT_BENCHMARK is not set
-+# CONFIG_TRACER_SNAPSHOT is not set
-+# CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP is not set
-+# CONFIG_TRACE_BRANCH_PROFILING is not set
-+# CONFIG_TRACE_EVAL_MAP_FILE is not set
-+# CONFIG_TRACE_EVENT_INJECT is not set
-+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-+# CONFIG_TRACE_SINK is not set
-+# CONFIG_TRACING_EVENTS_GPIO is not set
-+CONFIG_TRACING_SUPPORT=y
-+CONFIG_TRAD_SIGNALS=y
-+# CONFIG_TRANSPARENT_HUGEPAGE is not set
-+# CONFIG_TREE_RCU is not set
-+# CONFIG_TREE_RCU_TRACE is not set
-+# CONFIG_TRIM_UNUSED_KSYMS is not set
-+# CONFIG_TRUSTED_FOUNDATIONS is not set
-+# CONFIG_TRUSTED_KEYS is not set
-+# CONFIG_TSL2583 is not set
-+# CONFIG_TSL2772 is not set
-+# CONFIG_TSL2x7x is not set
-+# CONFIG_TSL4531 is not set
-+# CONFIG_TSYS01 is not set
-+# CONFIG_TSYS02D is not set
-+# CONFIG_TTPCI_EEPROM is not set
-+CONFIG_TTY=y
-+# CONFIG_TTY_PRINTK is not set
-+# CONFIG_TUN is not set
-+# CONFIG_TUN_VNET_CROSS_LE is not set
-+# CONFIG_TWL4030_CORE is not set
-+# CONFIG_TWL4030_MADC is not set
-+# CONFIG_TWL6030_GPADC is not set
-+# CONFIG_TWL6040_CORE is not set
-+# CONFIG_TYPEC is not set
-+# CONFIG_TYPEC_TCPM is not set
-+# CONFIG_TYPEC_UCSI is not set
-+# CONFIG_TYPHOON is not set
-+# CONFIG_UACCESS_WITH_MEMCPY is not set
-+# CONFIG_UBIFS_ATIME_SUPPORT is not set
-+# CONFIG_UBIFS_FS_AUTHENTICATION is not set
-+# CONFIG_UBIFS_FS_ENCRYPTION is not set
-+# CONFIG_UBIFS_FS_SECURITY is not set
-+CONFIG_UBIFS_FS_XATTR=y
-+# CONFIG_UBIFS_FS_ZLIB is not set
-+# CONFIG_UBIFS_FS_ZSTD is not set
-+# CONFIG_UBSAN is not set
-+CONFIG_UBSAN_ALIGNMENT=y
-+# CONFIG_UCB1400_CORE is not set
-+# CONFIG_UCSI is not set
-+# CONFIG_UDF_FS is not set
-+# CONFIG_UDMABUF is not set
-+CONFIG_UEVENT_HELPER=y
-+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-+# CONFIG_UFS_FS is not set
-+# CONFIG_UHID is not set
-+CONFIG_UID16=y
-+# CONFIG_UIO is not set
-+# CONFIG_ULTRA is not set
-+# CONFIG_ULTRIX_PARTITION is not set
-+# CONFIG_UNICODE is not set
-+# CONFIG_UNISYSSPAR is not set
-+# CONFIG_UNISYS_VISORBUS is not set
-+CONFIG_UNIX=y
-+CONFIG_UNIX98_PTYS=y
-+# CONFIG_UNIXWARE_DISKLABEL is not set
-+# CONFIG_UNIX_DIAG is not set
-+CONFIG_UNIX_SCM=y
-+# CONFIG_UNUSED_SYMBOLS is not set
-+# CONFIG_UNWINDER_FRAME_POINTER is not set
-+# CONFIG_UPROBES is not set
-+# CONFIG_UPROBE_EVENTS is not set
-+# CONFIG_US5182D is not set
-+# CONFIG_USB is not set
-+# CONFIG_USB4 is not set
-+# CONFIG_USBIP_CORE is not set
-+CONFIG_USBIP_VHCI_HC_PORTS=8
-+CONFIG_USBIP_VHCI_NR_HCS=1
-+# CONFIG_USBIP_VUDC is not set
-+# CONFIG_USBPCWATCHDOG is not set
-+# CONFIG_USB_ACM is not set
-+# CONFIG_USB_ADUTUX is not set
-+# CONFIG_USB_AIRSPY is not set
-+CONFIG_USB_ALI_M5632=y
-+# CONFIG_USB_AMD5536UDC is not set
-+CONFIG_USB_AN2720=y
-+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
-+# CONFIG_USB_APPLEDISPLAY is not set
-+CONFIG_USB_ARCH_HAS_HCD=y
-+CONFIG_USB_ARMLINUX=y
-+# CONFIG_USB_ATM is not set
-+CONFIG_USB_AUTOSUSPEND_DELAY=2
-+# CONFIG_USB_BDC_UDC is not set
-+CONFIG_USB_BELKIN=y
-+# CONFIG_USB_C67X00_HCD is not set
-+# CONFIG_USB_CATC is not set
-+# CONFIG_USB_CDC_COMPOSITE is not set
-+# CONFIG_USB_CDNS3 is not set
-+# CONFIG_USB_CHAOSKEY is not set
-+# CONFIG_USB_CHIPIDEA is not set
-+# CONFIG_USB_CHIPIDEA_GENERIC is not set
-+# CONFIG_USB_CHIPIDEA_IMX is not set
-+# CONFIG_USB_CHIPIDEA_MSM is not set
-+# CONFIG_USB_CHIPIDEA_PCI is not set
-+# CONFIG_USB_CHIPIDEA_TEGRA is not set
-+# CONFIG_USB_CONFIGFS is not set
-+# CONFIG_USB_CONN_GPIO is not set
-+# CONFIG_USB_CXACRU is not set
-+# CONFIG_USB_CYPRESS_CY7C63 is not set
-+# CONFIG_USB_CYTHERM is not set
-+CONFIG_USB_DEFAULT_PERSIST=y
-+# CONFIG_USB_DSBR is not set
-+# CONFIG_USB_DUMMY_HCD is not set
-+# CONFIG_USB_DWC2 is not set
-+# CONFIG_USB_DWC2_DEBUG is not set
-+# CONFIG_USB_DWC2_DUAL_ROLE is not set
-+# CONFIG_USB_DWC2_HOST is not set
-+# CONFIG_USB_DWC2_PERIPHERAL is not set
-+# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set
-+# CONFIG_USB_DWC3 is not set
-+# CONFIG_USB_DWC3_EXYNOS is not set
-+# CONFIG_USB_DWC3_HAPS is not set
-+# CONFIG_USB_DWC3_KEYSTONE is not set
-+# CONFIG_USB_DWC3_OF_SIMPLE is not set
-+# CONFIG_USB_DWC3_PCI is not set
-+# CONFIG_USB_DWC3_QCOM is not set
-+# CONFIG_USB_DWC3_ULPI is not set
-+# CONFIG_USB_DYNAMIC_MINORS is not set
-+# CONFIG_USB_EG20T is not set
-+# CONFIG_USB_EHCI_ATH79 is not set
-+# CONFIG_USB_EHCI_FSL is not set
-+# CONFIG_USB_EHCI_HCD is not set
-+# CONFIG_USB_EHCI_HCD_AT91 is not set
-+# CONFIG_USB_EHCI_HCD_OMAP is not set
-+# CONFIG_USB_EHCI_HCD_PPC_OF is not set
-+# CONFIG_USB_EHCI_MSM is not set
-+# CONFIG_USB_EHCI_MV is not set
-+CONFIG_USB_EHCI_ROOT_HUB_TT=y
-+CONFIG_USB_EHCI_TT_NEWSCHED=y
-+# CONFIG_USB_EHSET_TEST_FIXTURE is not set
-+# CONFIG_USB_EMI26 is not set
-+# CONFIG_USB_EMI62 is not set
-+# CONFIG_USB_EPSON2888 is not set
-+# CONFIG_USB_EZUSB_FX2 is not set
-+# CONFIG_USB_FEW_INIT_RETRIES is not set
-+# CONFIG_USB_FOTG210_HCD is not set
-+# CONFIG_USB_FOTG210_UDC is not set
-+# CONFIG_USB_FSL_USB2 is not set
-+# CONFIG_USB_FTDI_ELAN is not set
-+# CONFIG_USB_FUNCTIONFS is not set
-+# CONFIG_USB_FUSB300 is not set
-+# CONFIG_USB_GADGET is not set
-+# CONFIG_USB_GADGETFS is not set
-+# CONFIG_USB_GADGET_DEBUG is not set
-+# CONFIG_USB_GADGET_DEBUG_FILES is not set
-+# CONFIG_USB_GADGET_DEBUG_FS is not set
-+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
-+CONFIG_USB_GADGET_VBUS_DRAW=2
-+# CONFIG_USB_GADGET_XILINX is not set
-+# CONFIG_USB_GL860 is not set
-+# CONFIG_USB_GOKU is not set
-+# CONFIG_USB_GPIO_VBUS is not set
-+# CONFIG_USB_GR_UDC is not set
-+# CONFIG_USB_GSPCA is not set
-+# CONFIG_USB_GSPCA_BENQ is not set
-+# CONFIG_USB_GSPCA_CONEX is not set
-+# CONFIG_USB_GSPCA_CPIA1 is not set
-+# CONFIG_USB_GSPCA_DTCS033 is not set
-+# CONFIG_USB_GSPCA_ETOMS is not set
-+# CONFIG_USB_GSPCA_FINEPIX is not set
-+# CONFIG_USB_GSPCA_JEILINJ is not set
-+# CONFIG_USB_GSPCA_JL2005BCD is not set
-+# CONFIG_USB_GSPCA_KINECT is not set
-+# CONFIG_USB_GSPCA_KONICA is not set
-+# CONFIG_USB_GSPCA_MARS is not set
-+# CONFIG_USB_GSPCA_MR97310A is not set
-+# CONFIG_USB_GSPCA_NW80X is not set
-+# CONFIG_USB_GSPCA_OV519 is not set
-+# CONFIG_USB_GSPCA_OV534 is not set
-+# CONFIG_USB_GSPCA_OV534_9 is not set
-+# CONFIG_USB_GSPCA_PAC207 is not set
-+# CONFIG_USB_GSPCA_PAC7302 is not set
-+# CONFIG_USB_GSPCA_PAC7311 is not set
-+# CONFIG_USB_GSPCA_SE401 is not set
-+# CONFIG_USB_GSPCA_SN9C2028 is not set
-+# CONFIG_USB_GSPCA_SN9C20X is not set
-+# CONFIG_USB_GSPCA_SONIXB is not set
-+# CONFIG_USB_GSPCA_SONIXJ is not set
-+# CONFIG_USB_GSPCA_SPCA1528 is not set
-+# CONFIG_USB_GSPCA_SPCA500 is not set
-+# CONFIG_USB_GSPCA_SPCA501 is not set
-+# CONFIG_USB_GSPCA_SPCA505 is not set
-+# CONFIG_USB_GSPCA_SPCA506 is not set
-+# CONFIG_USB_GSPCA_SPCA508 is not set
-+# CONFIG_USB_GSPCA_SPCA561 is not set
-+# CONFIG_USB_GSPCA_SQ905 is not set
-+# CONFIG_USB_GSPCA_SQ905C is not set
-+# CONFIG_USB_GSPCA_SQ930X is not set
-+# CONFIG_USB_GSPCA_STK014 is not set
-+# CONFIG_USB_GSPCA_STK1135 is not set
-+# CONFIG_USB_GSPCA_STV0680 is not set
-+# CONFIG_USB_GSPCA_SUNPLUS is not set
-+# CONFIG_USB_GSPCA_T613 is not set
-+# CONFIG_USB_GSPCA_TOPRO is not set
-+# CONFIG_USB_GSPCA_TOUPTEK is not set
-+# CONFIG_USB_GSPCA_TV8532 is not set
-+# CONFIG_USB_GSPCA_VC032X is not set
-+# CONFIG_USB_GSPCA_VICAM is not set
-+# CONFIG_USB_GSPCA_XIRLINK_CIT is not set
-+# CONFIG_USB_GSPCA_ZC3XX is not set
-+# CONFIG_USB_G_ACM_MS is not set
-+# CONFIG_USB_G_DBGP is not set
-+# CONFIG_USB_G_HID is not set
-+# CONFIG_USB_G_MULTI is not set
-+# CONFIG_USB_G_NCM is not set
-+# CONFIG_USB_G_NOKIA is not set
-+# CONFIG_USB_G_PRINTER is not set
-+# CONFIG_USB_G_SERIAL is not set
-+# CONFIG_USB_G_WEBCAM is not set
-+# CONFIG_USB_HACKRF is not set
-+# CONFIG_USB_HCD_TEST_MODE is not set
-+# CONFIG_USB_HID is not set
-+# CONFIG_USB_HIDDEV is not set
-+# CONFIG_USB_HSIC_USB3503 is not set
-+# CONFIG_USB_HSIC_USB4604 is not set
-+# CONFIG_USB_HSO is not set
-+# CONFIG_USB_HUB_USB251XB is not set
-+# CONFIG_USB_HWA_HCD is not set
-+# CONFIG_USB_IDMOUSE is not set
-+# CONFIG_USB_IMX21_HCD is not set
-+# CONFIG_USB_IOWARRIOR is not set
-+# CONFIG_USB_IPHETH is not set
-+# CONFIG_USB_ISIGHTFW is not set
-+# CONFIG_USB_ISP116X_HCD is not set
-+# CONFIG_USB_ISP1301 is not set
-+# CONFIG_USB_ISP1362_HCD is not set
-+# CONFIG_USB_ISP1760 is not set
-+# CONFIG_USB_ISP1760_HCD is not set
-+# CONFIG_USB_KAWETH is not set
-+# CONFIG_USB_KBD is not set
-+# CONFIG_USB_KC2190 is not set
-+# CONFIG_USB_LAN78XX is not set
-+# CONFIG_USB_LCD is not set
-+# CONFIG_USB_LD is not set
-+# CONFIG_USB_LED is not set
-+# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set
-+# CONFIG_USB_LED_TRIG is not set
-+# CONFIG_USB_LEGOTOWER is not set
-+# CONFIG_USB_LGM_PHY is not set
-+# CONFIG_USB_LINK_LAYER_TEST is not set
-+# CONFIG_USB_M5602 is not set
-+# CONFIG_USB_M66592 is not set
-+# CONFIG_USB_MASS_STORAGE is not set
-+# CONFIG_USB_MAX3420_UDC is not set
-+# CONFIG_USB_MAX3421_HCD is not set
-+# CONFIG_USB_MDC800 is not set
-+# CONFIG_USB_MICROTEK is not set
-+# CONFIG_USB_MIDI_GADGET is not set
-+# CONFIG_USB_MON is not set
-+# CONFIG_USB_MOUSE is not set
-+# CONFIG_USB_MSI2500 is not set
-+# CONFIG_USB_MSM_OTG is not set
-+# CONFIG_USB_MTU3 is not set
-+# CONFIG_USB_MUSB_HDRC is not set
-+# CONFIG_USB_MV_U3D is not set
-+# CONFIG_USB_MV_UDC is not set
-+# CONFIG_USB_MXS_PHY is not set
-+# CONFIG_USB_NET2272 is not set
-+# CONFIG_USB_NET2280 is not set
-+# CONFIG_USB_NET_AQC111 is not set
-+# CONFIG_USB_NET_AX88179_178A is not set
-+# CONFIG_USB_NET_AX8817X is not set
-+# CONFIG_USB_NET_CDCETHER is not set
-+# CONFIG_USB_NET_CDC_EEM is not set
-+# CONFIG_USB_NET_CDC_MBIM is not set
-+# CONFIG_USB_NET_CDC_NCM is not set
-+# CONFIG_USB_NET_CDC_SUBSET is not set
-+# CONFIG_USB_NET_CH9200 is not set
-+# CONFIG_USB_NET_CX82310_ETH is not set
-+# CONFIG_USB_NET_DM9601 is not set
-+# CONFIG_USB_NET_DRIVERS is not set
-+# CONFIG_USB_NET_GL620A is not set
-+# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set
-+# CONFIG_USB_NET_INT51X1 is not set
-+# CONFIG_USB_NET_KALMIA is not set
-+# CONFIG_USB_NET_MCS7830 is not set
-+# CONFIG_USB_NET_NET1080 is not set
-+# CONFIG_USB_NET_PLUSB is not set
-+# CONFIG_USB_NET_QMI_WWAN is not set
-+# CONFIG_USB_NET_RNDIS_HOST is not set
-+# CONFIG_USB_NET_RNDIS_WLAN is not set
-+# CONFIG_USB_NET_SMSC75XX is not set
-+# CONFIG_USB_NET_SMSC95XX is not set
-+# CONFIG_USB_NET_SR9700 is not set
-+# CONFIG_USB_NET_SR9800 is not set
-+# CONFIG_USB_NET_ZAURUS is not set
-+# CONFIG_USB_OHCI_HCD is not set
-+# CONFIG_USB_OHCI_HCD_PCI is not set
-+# CONFIG_USB_OHCI_HCD_PPC_OF is not set
-+# CONFIG_USB_OHCI_HCD_PPC_OF_BE is not set
-+# CONFIG_USB_OHCI_HCD_PPC_OF_LE is not set
-+# CONFIG_USB_OHCI_HCD_SSB is not set
-+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
-+# CONFIG_USB_OTG is not set
-+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
-+# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set
-+# CONFIG_USB_OTG_FSM is not set
-+# CONFIG_USB_OTG_PRODUCTLIST is not set
-+# CONFIG_USB_OTG_WHITELIST is not set
-+# CONFIG_USB_OXU210HP_HCD is not set
-+# CONFIG_USB_PCI is not set
-+# CONFIG_USB_PEGASUS is not set
-+# CONFIG_USB_PHY is not set
-+# CONFIG_USB_PRINTER is not set
-+# CONFIG_USB_PWC_INPUT_EVDEV is not set
-+# CONFIG_USB_PXA27X is not set
-+# CONFIG_USB_R8A66597 is not set
-+# CONFIG_USB_R8A66597_HCD is not set
-+# CONFIG_USB_RAW_GADGET is not set
-+# CONFIG_USB_RCAR_PHY is not set
-+# CONFIG_USB_RENESAS_USBHS is not set
-+# CONFIG_USB_RIO500 is not set
-+# CONFIG_USB_ROLES_INTEL_XHCI is not set
-+# CONFIG_USB_ROLE_SWITCH is not set
-+# CONFIG_USB_RTL8150 is not set
-+# CONFIG_USB_RTL8152 is not set
-+# CONFIG_USB_S2255 is not set
-+# CONFIG_USB_SERIAL is not set
-+# CONFIG_USB_SERIAL_AIRCABLE is not set
-+# CONFIG_USB_SERIAL_ARK3116 is not set
-+# CONFIG_USB_SERIAL_BELKIN is not set
-+# CONFIG_USB_SERIAL_CH341 is not set
-+# CONFIG_USB_SERIAL_CP210X is not set
-+# CONFIG_USB_SERIAL_CYBERJACK is not set
-+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
-+# CONFIG_USB_SERIAL_DEBUG is not set
-+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
-+# CONFIG_USB_SERIAL_EDGEPORT is not set
-+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
-+# CONFIG_USB_SERIAL_EMPEG is not set
-+# CONFIG_USB_SERIAL_F81232 is not set
-+# CONFIG_USB_SERIAL_F8153X is not set
-+# CONFIG_USB_SERIAL_FTDI_SIO is not set
-+# CONFIG_USB_SERIAL_GARMIN is not set
-+CONFIG_USB_SERIAL_GENERIC=y
-+# CONFIG_USB_SERIAL_IPAQ is not set
-+# CONFIG_USB_SERIAL_IPW is not set
-+# CONFIG_USB_SERIAL_IR is not set
-+# CONFIG_USB_SERIAL_IUU is not set
-+# CONFIG_USB_SERIAL_KEYSPAN is not set
-+CONFIG_USB_SERIAL_KEYSPAN_MPR=y
-+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
-+CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
-+CONFIG_USB_SERIAL_KEYSPAN_USA19=y
-+CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
-+CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
-+CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
-+CONFIG_USB_SERIAL_KEYSPAN_USA28=y
-+CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
-+CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
-+CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
-+CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
-+CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
-+# CONFIG_USB_SERIAL_KLSI is not set
-+# CONFIG_USB_SERIAL_KOBIL_SCT is not set
-+# CONFIG_USB_SERIAL_MCT_U232 is not set
-+# CONFIG_USB_SERIAL_METRO is not set
-+# CONFIG_USB_SERIAL_MOS7715_PARPORT is not set
-+# CONFIG_USB_SERIAL_MOS7720 is not set
-+# CONFIG_USB_SERIAL_MOS7840 is not set
-+# CONFIG_USB_SERIAL_MXUPORT is not set
-+# CONFIG_USB_SERIAL_NAVMAN is not set
-+# CONFIG_USB_SERIAL_OMNINET is not set
-+# CONFIG_USB_SERIAL_OPTICON is not set
-+# CONFIG_USB_SERIAL_OPTION is not set
-+# CONFIG_USB_SERIAL_OTI6858 is not set
-+# CONFIG_USB_SERIAL_PL2303 is not set
-+# CONFIG_USB_SERIAL_QCAUX is not set
-+# CONFIG_USB_SERIAL_QT2 is not set
-+# CONFIG_USB_SERIAL_QUALCOMM is not set
-+# CONFIG_USB_SERIAL_SAFE is not set
-+CONFIG_USB_SERIAL_SAFE_PADDED=y
-+# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
-+# CONFIG_USB_SERIAL_SIMPLE is not set
-+# CONFIG_USB_SERIAL_SPCP8X5 is not set
-+# CONFIG_USB_SERIAL_SSU100 is not set
-+# CONFIG_USB_SERIAL_SYMBOL is not set
-+# CONFIG_USB_SERIAL_TI is not set
-+# CONFIG_USB_SERIAL_UPD78F0730 is not set
-+# CONFIG_USB_SERIAL_VISOR is not set
-+# CONFIG_USB_SERIAL_WHITEHEAT is not set
-+# CONFIG_USB_SERIAL_WISHBONE is not set
-+# CONFIG_USB_SERIAL_XIRCOM is not set
-+# CONFIG_USB_SERIAL_XSENS_MT is not set
-+# CONFIG_USB_SEVSEG is not set
-+# CONFIG_USB_SIERRA_NET is not set
-+# CONFIG_USB_SISUSBVGA is not set
-+# CONFIG_USB_SL811_HCD is not set
-+# CONFIG_USB_SNP_UDC_PLAT is not set
-+# CONFIG_USB_SPEEDTOUCH is not set
-+# CONFIG_USB_STKWEBCAM is not set
-+# CONFIG_USB_STORAGE is not set
-+# CONFIG_USB_STORAGE_ALAUDA is not set
-+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
-+# CONFIG_USB_STORAGE_DATAFAB is not set
-+# CONFIG_USB_STORAGE_DEBUG is not set
-+# CONFIG_USB_STORAGE_ENE_UB6250 is not set
-+# CONFIG_USB_STORAGE_FREECOM is not set
-+# CONFIG_USB_STORAGE_ISD200 is not set
-+# CONFIG_USB_STORAGE_JUMPSHOT is not set
-+# CONFIG_USB_STORAGE_KARMA is not set
-+# CONFIG_USB_STORAGE_ONETOUCH is not set
-+# CONFIG_USB_STORAGE_REALTEK is not set
-+# CONFIG_USB_STORAGE_SDDR09 is not set
-+# CONFIG_USB_STORAGE_SDDR55 is not set
-+# CONFIG_USB_STORAGE_USBAT is not set
-+# CONFIG_USB_STV06XX is not set
-+# CONFIG_USB_SUPPORT is not set
-+# CONFIG_USB_SWITCH_FSA9480 is not set
-+# CONFIG_USB_TEST is not set
-+# CONFIG_USB_TMC is not set
-+# CONFIG_USB_TRANCEVIBRATOR is not set
-+# CONFIG_USB_UAS is not set
-+# CONFIG_USB_UEAGLEATM is not set
-+# CONFIG_USB_ULPI is not set
-+# CONFIG_USB_ULPI_BUS is not set
-+# CONFIG_USB_USBNET is not set
-+# CONFIG_USB_USS720 is not set
-+# CONFIG_USB_VIDEO_CLASS is not set
-+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
-+# CONFIG_USB_VL600 is not set
-+# CONFIG_USB_WDM is not set
-+# CONFIG_USB_WHCI_HCD is not set
-+# CONFIG_USB_WUSB is not set
-+# CONFIG_USB_WUSB_CBAF is not set
-+# CONFIG_USB_XHCI_DBGCAP is not set
-+# CONFIG_USB_XHCI_HCD is not set
-+# CONFIG_USB_XHCI_MVEBU is not set
-+# CONFIG_USB_XHCI_PCI_RENESAS is not set
-+# CONFIG_USB_XUSBATM is not set
-+# CONFIG_USB_YUREX is not set
-+# CONFIG_USB_ZD1201 is not set
-+# CONFIG_USB_ZERO is not set
-+# CONFIG_USB_ZR364XX is not set
-+# CONFIG_USELIB is not set
-+# CONFIG_USERFAULTFD is not set
-+# CONFIG_USERIO is not set
-+# CONFIG_USE_OF is not set
-+# CONFIG_UTS_NS is not set
-+# CONFIG_UWB is not set
-+# CONFIG_U_SERIAL_CONSOLE is not set
-+# CONFIG_V4L_MEM2MEM_DRIVERS is not set
-+# CONFIG_V4L_PLATFORM_DRIVERS is not set
-+# CONFIG_V4L_TEST_DRIVERS is not set
-+# CONFIG_VALIDATE_FS_PARSER is not set
-+# CONFIG_VBOXGUEST is not set
-+# CONFIG_VCNL3020 is not set
-+# CONFIG_VCNL4000 is not set
-+# CONFIG_VCNL4035 is not set
-+# CONFIG_VDPA is not set
-+CONFIG_VDSO=y
-+# CONFIG_VEML6030 is not set
-+# CONFIG_VEML6070 is not set
-+# CONFIG_VETH is not set
-+# CONFIG_VEXPRESS_CONFIG is not set
-+# CONFIG_VF610_ADC is not set
-+# CONFIG_VF610_DAC is not set
-+# CONFIG_VFAT_FS is not set
-+# CONFIG_VFIO is not set
-+# CONFIG_VGASTATE is not set
-+# CONFIG_VGA_ARB is not set
-+# CONFIG_VGA_SWITCHEROO is not set
-+# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set
-+CONFIG_VHOST_MENU=y
-+# CONFIG_VHOST_NET is not set
-+# CONFIG_VHOST_VSOCK is not set
-+# CONFIG_VIA_RHINE is not set
-+# CONFIG_VIA_VELOCITY is not set
-+# CONFIG_VIDEO_AD5820 is not set
-+# CONFIG_VIDEO_AD9389B is not set
-+# CONFIG_VIDEO_ADP1653 is not set
-+# CONFIG_VIDEO_ADV7170 is not set
-+# CONFIG_VIDEO_ADV7175 is not set
-+# CONFIG_VIDEO_ADV7180 is not set
-+# CONFIG_VIDEO_ADV7183 is not set
-+# CONFIG_VIDEO_ADV7343 is not set
-+# CONFIG_VIDEO_ADV7393 is not set
-+# CONFIG_VIDEO_ADV748X is not set
-+# CONFIG_VIDEO_ADV7511 is not set
-+# CONFIG_VIDEO_ADV7604 is not set
-+# CONFIG_VIDEO_ADV7842 is not set
-+# CONFIG_VIDEO_ADV_DEBUG is not set
-+# CONFIG_VIDEO_AK7375 is not set
-+# CONFIG_VIDEO_AK881X is not set
-+# CONFIG_VIDEO_ASPEED is not set
-+# CONFIG_VIDEO_AU0828 is not set
-+# CONFIG_VIDEO_BT819 is not set
-+# CONFIG_VIDEO_BT848 is not set
-+# CONFIG_VIDEO_BT856 is not set
-+# CONFIG_VIDEO_BT866 is not set
-+# CONFIG_VIDEO_CADENCE is not set
-+# CONFIG_VIDEO_CAFE_CCIC is not set
-+# CONFIG_VIDEO_CS3308 is not set
-+# CONFIG_VIDEO_CS5345 is not set
-+# CONFIG_VIDEO_CS53L32A is not set
-+# CONFIG_VIDEO_CX231XX is not set
-+# CONFIG_VIDEO_CX2341X is not set
-+# CONFIG_VIDEO_CX25840 is not set
-+# CONFIG_VIDEO_CX88 is not set
-+# CONFIG_VIDEO_DEV is not set
-+# CONFIG_VIDEO_DM6446_CCDC is not set
-+# CONFIG_VIDEO_DT3155 is not set
-+# CONFIG_VIDEO_DW9714 is not set
-+# CONFIG_VIDEO_DW9768 is not set
-+# CONFIG_VIDEO_DW9807_VCM is not set
-+# CONFIG_VIDEO_EM28XX is not set
-+# CONFIG_VIDEO_ET8EK8 is not set
-+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
-+# CONFIG_VIDEO_GO7007 is not set
-+# CONFIG_VIDEO_GS1662 is not set
-+# CONFIG_VIDEO_HDPVR is not set
-+# CONFIG_VIDEO_HEXIUM_GEMINI is not set
-+# CONFIG_VIDEO_HEXIUM_ORION is not set
-+# CONFIG_VIDEO_HI556 is not set
-+# CONFIG_VIDEO_I2C is not set
-+# CONFIG_VIDEO_IMX214 is not set
-+# CONFIG_VIDEO_IMX219 is not set
-+# CONFIG_VIDEO_IMX258 is not set
-+# CONFIG_VIDEO_IMX274 is not set
-+# CONFIG_VIDEO_IMX290 is not set
-+# CONFIG_VIDEO_IMX319 is not set
-+# CONFIG_VIDEO_IMX355 is not set
-+# CONFIG_VIDEO_IR_I2C is not set
-+# CONFIG_VIDEO_IVTV is not set
-+# CONFIG_VIDEO_KS0127 is not set
-+# CONFIG_VIDEO_LM3560 is not set
-+# CONFIG_VIDEO_LM3646 is not set
-+# CONFIG_VIDEO_M52790 is not set
-+# CONFIG_VIDEO_M5MOLS is not set
-+# CONFIG_VIDEO_MAX9286 is not set
-+# CONFIG_VIDEO_ML86V7667 is not set
-+# CONFIG_VIDEO_MSP3400 is not set
-+# CONFIG_VIDEO_MT9M001 is not set
-+# CONFIG_VIDEO_MT9M032 is not set
-+# CONFIG_VIDEO_MT9M111 is not set
-+# CONFIG_VIDEO_MT9P031 is not set
-+# CONFIG_VIDEO_MT9T001 is not set
-+# CONFIG_VIDEO_MT9T112 is not set
-+# CONFIG_VIDEO_MT9V011 is not set
-+# CONFIG_VIDEO_MT9V032 is not set
-+# CONFIG_VIDEO_MT9V111 is not set
-+# CONFIG_VIDEO_MUX is not set
-+# CONFIG_VIDEO_MXB is not set
-+# CONFIG_VIDEO_NOON010PC30 is not set
-+# CONFIG_VIDEO_OMAP2_VOUT is not set
-+# CONFIG_VIDEO_OV13858 is not set
-+# CONFIG_VIDEO_OV2640 is not set
-+# CONFIG_VIDEO_OV2659 is not set
-+# CONFIG_VIDEO_OV2680 is not set
-+# CONFIG_VIDEO_OV2685 is not set
-+# CONFIG_VIDEO_OV2740 is not set
-+# CONFIG_VIDEO_OV5640 is not set
-+# CONFIG_VIDEO_OV5645 is not set
-+# CONFIG_VIDEO_OV5647 is not set
-+# CONFIG_VIDEO_OV5670 is not set
-+# CONFIG_VIDEO_OV5675 is not set
-+# CONFIG_VIDEO_OV5695 is not set
-+# CONFIG_VIDEO_OV6650 is not set
-+# CONFIG_VIDEO_OV7251 is not set
-+# CONFIG_VIDEO_OV7640 is not set
-+# CONFIG_VIDEO_OV7670 is not set
-+# CONFIG_VIDEO_OV772X is not set
-+# CONFIG_VIDEO_OV7740 is not set
-+# CONFIG_VIDEO_OV8856 is not set
-+# CONFIG_VIDEO_OV9640 is not set
-+# CONFIG_VIDEO_OV9650 is not set
-+# CONFIG_VIDEO_PVRUSB2 is not set
-+# CONFIG_VIDEO_RDACM20 is not set
-+# CONFIG_VIDEO_RJ54N1 is not set
-+# CONFIG_VIDEO_S5C73M3 is not set
-+# CONFIG_VIDEO_S5K4ECGX is not set
-+# CONFIG_VIDEO_S5K5BAF is not set
-+# CONFIG_VIDEO_S5K6A3 is not set
-+# CONFIG_VIDEO_S5K6AA is not set
-+# CONFIG_VIDEO_SAA6588 is not set
-+# CONFIG_VIDEO_SAA6752HS is not set
-+# CONFIG_VIDEO_SAA7110 is not set
-+# CONFIG_VIDEO_SAA711X is not set
-+# CONFIG_VIDEO_SAA7127 is not set
-+# CONFIG_VIDEO_SAA7134 is not set
-+# CONFIG_VIDEO_SAA717X is not set
-+# CONFIG_VIDEO_SAA7185 is not set
-+# CONFIG_VIDEO_SH_MOBILE_CEU is not set
-+# CONFIG_VIDEO_SMIAPP is not set
-+# CONFIG_VIDEO_SONY_BTF_MPX is not set
-+# CONFIG_VIDEO_SR030PC30 is not set
-+# CONFIG_VIDEO_STK1160_COMMON is not set
-+# CONFIG_VIDEO_ST_MIPID02 is not set
-+# CONFIG_VIDEO_TC358743 is not set
-+# CONFIG_VIDEO_TDA1997X is not set
-+# CONFIG_VIDEO_TDA7432 is not set
-+# CONFIG_VIDEO_TDA9840 is not set
-+# CONFIG_VIDEO_TEA6415C is not set
-+# CONFIG_VIDEO_TEA6420 is not set
-+# CONFIG_VIDEO_THS7303 is not set
-+# CONFIG_VIDEO_THS8200 is not set
-+# CONFIG_VIDEO_TIMBERDALE is not set
-+# CONFIG_VIDEO_TLV320AIC23B is not set
-+# CONFIG_VIDEO_TM6000 is not set
-+# CONFIG_VIDEO_TVAUDIO is not set
-+# CONFIG_VIDEO_TVP514X is not set
-+# CONFIG_VIDEO_TVP5150 is not set
-+# CONFIG_VIDEO_TVP7002 is not set
-+# CONFIG_VIDEO_TW2804 is not set
-+# CONFIG_VIDEO_TW9903 is not set
-+# CONFIG_VIDEO_TW9906 is not set
-+# CONFIG_VIDEO_TW9910 is not set
-+# CONFIG_VIDEO_UDA1342 is not set
-+# CONFIG_VIDEO_UPD64031A is not set
-+# CONFIG_VIDEO_UPD64083 is not set
-+# CONFIG_VIDEO_USBTV is not set
-+# CONFIG_VIDEO_USBVISION is not set
-+# CONFIG_VIDEO_V4L2 is not set
-+# CONFIG_VIDEO_VP27SMPX is not set
-+# CONFIG_VIDEO_VPX3220 is not set
-+# CONFIG_VIDEO_VS6624 is not set
-+# CONFIG_VIDEO_WM8739 is not set
-+# CONFIG_VIDEO_WM8775 is not set
-+# CONFIG_VIDEO_XILINX is not set
-+# CONFIG_VIDEO_ZORAN is not set
-+# CONFIG_VIRTIO_BALLOON is not set
-+# CONFIG_VIRTIO_BLK_SCSI is not set
-+# CONFIG_VIRTIO_CONSOLE is not set
-+# CONFIG_VIRTIO_FS is not set
-+# CONFIG_VIRTIO_INPUT is not set
-+CONFIG_VIRTIO_MENU=y
-+# CONFIG_VIRTIO_MMIO is not set
-+# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set
-+# CONFIG_VIRTIO_PCI is not set
-+# CONFIG_VIRTUALIZATION is not set
-+# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
-+# CONFIG_VIRT_DRIVERS is not set
-+CONFIG_VIRT_TO_BUS=y
-+# CONFIG_VITESSE_PHY is not set
-+# CONFIG_VL53L0X_I2C is not set
-+# CONFIG_VL6180 is not set
-+CONFIG_VLAN_8021Q=y
-+# CONFIG_VLAN_8021Q_GVRP is not set
-+# CONFIG_VLAN_8021Q_MVRP is not set
-+# CONFIG_VME_BUS is not set
-+# CONFIG_VMSPLIT_1G is not set
-+# CONFIG_VMSPLIT_2G is not set
-+# CONFIG_VMSPLIT_2G_OPT is not set
-+CONFIG_VMSPLIT_3G=y
-+# CONFIG_VMSPLIT_3G_OPT is not set
-+# CONFIG_VMWARE_PVSCSI is not set
-+# CONFIG_VMXNET3 is not set
-+# CONFIG_VM_EVENT_COUNTERS is not set
-+# CONFIG_VOP_BUS is not set
-+# CONFIG_VORTEX is not set
-+# CONFIG_VSOCKETS is not set
-+# CONFIG_VSOCKETS_DIAG is not set
-+# CONFIG_VT is not set
-+# CONFIG_VT6655 is not set
-+# CONFIG_VT6656 is not set
-+# CONFIG_VXFS_FS is not set
-+# CONFIG_VXGE is not set
-+# CONFIG_VXLAN is not set
-+# CONFIG_VZ89X is not set
-+# CONFIG_W1 is not set
-+# CONFIG_W1_CON is not set
-+# CONFIG_W1_MASTER_DS1WM is not set
-+# CONFIG_W1_MASTER_DS2482 is not set
-+# CONFIG_W1_MASTER_DS2490 is not set
-+# CONFIG_W1_MASTER_GPIO is not set
-+# CONFIG_W1_MASTER_MATROX is not set
-+# CONFIG_W1_MASTER_SGI is not set
-+# CONFIG_W1_SLAVE_DS2405 is not set
-+# CONFIG_W1_SLAVE_DS2406 is not set
-+# CONFIG_W1_SLAVE_DS2408 is not set
-+# CONFIG_W1_SLAVE_DS2413 is not set
-+# CONFIG_W1_SLAVE_DS2423 is not set
-+# CONFIG_W1_SLAVE_DS2430 is not set
-+# CONFIG_W1_SLAVE_DS2431 is not set
-+# CONFIG_W1_SLAVE_DS2433 is not set
-+# CONFIG_W1_SLAVE_DS2438 is not set
-+# CONFIG_W1_SLAVE_DS250X is not set
-+# CONFIG_W1_SLAVE_DS2780 is not set
-+# CONFIG_W1_SLAVE_DS2781 is not set
-+# CONFIG_W1_SLAVE_DS2805 is not set
-+# CONFIG_W1_SLAVE_DS28E04 is not set
-+# CONFIG_W1_SLAVE_DS28E17 is not set
-+# CONFIG_W1_SLAVE_SMEM is not set
-+# CONFIG_W1_SLAVE_THERM is not set
-+# CONFIG_W83627HF_WDT is not set
-+# CONFIG_W83877F_WDT is not set
-+# CONFIG_W83977F_WDT is not set
-+# CONFIG_WAN is not set
-+# CONFIG_WANXL is not set
-+# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set
-+CONFIG_WATCHDOG=y
-+# CONFIG_WATCHDOG_CORE is not set
-+CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y
-+# CONFIG_WATCHDOG_NOWAYOUT is not set
-+CONFIG_WATCHDOG_OPEN_TIMEOUT=0
-+# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set
-+# CONFIG_WATCHDOG_SYSFS is not set
-+# CONFIG_WATCH_QUEUE is not set
-+# CONFIG_WD80x3 is not set
-+# CONFIG_WDAT_WDT is not set
-+# CONFIG_WDTPCI is not set
-+CONFIG_WEXT_CORE=y
-+CONFIG_WEXT_PRIV=y
-+CONFIG_WEXT_PROC=y
-+CONFIG_WEXT_SPY=y
-+CONFIG_WILINK_PLATFORM_DATA=y
-+# CONFIG_WIMAX is not set
-+# CONFIG_WIREGUARD is not set
-+CONFIG_WIRELESS=y
-+CONFIG_WIRELESS_EXT=y
-+# CONFIG_WIRELESS_WDS is not set
-+# CONFIG_WIZNET_W5100 is not set
-+# CONFIG_WIZNET_W5300 is not set
-+# CONFIG_WL1251 is not set
-+# CONFIG_WL12XX is not set
-+# CONFIG_WL18XX is not set
-+CONFIG_WLAN=y
-+# CONFIG_WLAN_VENDOR_ADMTEK is not set
-+# CONFIG_WLAN_VENDOR_ATH is not set
-+# CONFIG_WLAN_VENDOR_ATMEL is not set
-+# CONFIG_WLAN_VENDOR_BROADCOM is not set
-+# CONFIG_WLAN_VENDOR_CISCO is not set
-+# CONFIG_WLAN_VENDOR_INTEL is not set
-+# CONFIG_WLAN_VENDOR_INTERSIL is not set
-+# CONFIG_WLAN_VENDOR_MARVELL is not set
-+# CONFIG_WLAN_VENDOR_MEDIATEK is not set
-+# CONFIG_WLAN_VENDOR_MICROCHIP is not set
-+# CONFIG_WLAN_VENDOR_QUANTENNA is not set
-+# CONFIG_WLAN_VENDOR_RALINK is not set
-+# CONFIG_WLAN_VENDOR_REALTEK is not set
-+# CONFIG_WLAN_VENDOR_RSI is not set
-+# CONFIG_WLAN_VENDOR_ST is not set
-+# CONFIG_WLAN_VENDOR_TI is not set
-+# CONFIG_WLAN_VENDOR_ZYDAS is not set
-+# CONFIG_WLCORE is not set
-+CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
-+# CONFIG_WQ_WATCHDOG is not set
-+# CONFIG_WW_MUTEX_SELFTEST is not set
-+# CONFIG_X25 is not set
-+# CONFIG_X509_CERTIFICATE_PARSER is not set
-+# CONFIG_X86_PKG_TEMP_THERMAL is not set
-+CONFIG_X86_SYSFB=y
-+# CONFIG_XDP_SOCKETS is not set
-+# CONFIG_XEN is not set
-+# CONFIG_XEN_GRANT_DMA_ALLOC is not set
-+# CONFIG_XEN_PVCALLS_FRONTEND is not set
-+CONFIG_XEN_SCRUB_PAGES_DEFAULT=y
-+CONFIG_XFRM=y
-+# CONFIG_XFRM_INTERFACE is not set
-+# CONFIG_XFRM_IPCOMP is not set
-+# CONFIG_XFRM_MIGRATE is not set
-+# CONFIG_XFRM_STATISTICS is not set
-+# CONFIG_XFRM_SUB_POLICY is not set
-+# CONFIG_XFRM_USER is not set
-+# CONFIG_XFS_DEBUG is not set
-+# CONFIG_XFS_FS is not set
-+# CONFIG_XFS_ONLINE_SCRUB is not set
-+# CONFIG_XFS_POSIX_ACL is not set
-+# CONFIG_XFS_QUOTA is not set
-+# CONFIG_XFS_RT is not set
-+# CONFIG_XFS_SUPPORT_V4 is not set
-+# CONFIG_XFS_WARN is not set
-+# CONFIG_XILINX_AXI_EMAC is not set
-+# CONFIG_XILINX_DMA is not set
-+# CONFIG_XILINX_EMACLITE is not set
-+# CONFIG_XILINX_GMII2RGMII is not set
-+# CONFIG_XILINX_LL_TEMAC is not set
-+# CONFIG_XILINX_SDFEC is not set
-+# CONFIG_XILINX_VCU is not set
-+# CONFIG_XILINX_WATCHDOG is not set
-+# CONFIG_XILINX_XADC is not set
-+# CONFIG_XILINX_ZYNQMP_DMA is not set
-+# CONFIG_XILINX_ZYNQMP_DPDMA is not set
-+# CONFIG_XILLYBUS is not set
-+# CONFIG_XIL_AXIS_FIFO is not set
-+# CONFIG_XIP_KERNEL is not set
-+# CONFIG_XMON is not set
-+CONFIG_XZ_DEC=y
-+# CONFIG_XZ_DEC_ARM is not set
-+# CONFIG_XZ_DEC_ARMTHUMB is not set
-+# CONFIG_XZ_DEC_BCJ is not set
-+# CONFIG_XZ_DEC_IA64 is not set
-+# CONFIG_XZ_DEC_POWERPC is not set
-+# CONFIG_XZ_DEC_SPARC is not set
-+# CONFIG_XZ_DEC_TEST is not set
-+# CONFIG_XZ_DEC_X86 is not set
-+# CONFIG_YAM is not set
-+# CONFIG_YELLOWFIN is not set
-+# CONFIG_YENTA is not set
-+# CONFIG_YENTA_O2 is not set
-+# CONFIG_YENTA_RICOH is not set
-+# CONFIG_YENTA_TI is not set
-+# CONFIG_YENTA_TOSHIBA is not set
-+# CONFIG_ZBUD is not set
-+# CONFIG_ZD1211RW is not set
-+# CONFIG_ZD1211RW_DEBUG is not set
-+# CONFIG_ZEROPLUS_FF is not set
-+# CONFIG_ZIIRAVE_WATCHDOG is not set
-+# CONFIG_ZISOFS is not set
-+# CONFIG_ZLIB_DEFLATE is not set
-+# CONFIG_ZLIB_INFLATE is not set
-+CONFIG_ZONE_DMA=y
-+# CONFIG_ZOPT2201 is not set
-+# CONFIG_ZPA2326 is not set
-+# CONFIG_ZPOOL is not set
-+# CONFIG_ZRAM is not set
-+# CONFIG_ZRAM_MEMORY_TRACKING is not set
-+# CONFIG_ZSMALLOC is not set
-+# CONFIG_ZX_TDM is not set
-diff --git a/target/linux/generic/config-5.4 b/target/linux/generic/config-5.4
-index 50e627297e..da0e2e2186 100644
---- a/target/linux/generic/config-5.4
-+++ b/target/linux/generic/config-5.4
-@@ -3287,6 +3287,7 @@ CONFIG_MTD_ROOTFS_ROOT_DEV=y
- CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=4096
- CONFIG_MTD_SPLIT=y
- # CONFIG_MTD_SPLIT_BCM_WFI_FW is not set
-+# CONFIG_MTD_SPLIT_BCM63XX_FW is not set
- # CONFIG_MTD_SPLIT_BRNIMAGE_FW is not set
- # CONFIG_MTD_SPLIT_ELF_FW is not set
- # CONFIG_MTD_SPLIT_EVA_FW is not set
-diff --git a/target/linux/generic/config-filter b/target/linux/generic/config-filter
-index 0d53ed9c3c..7d634b56cf 100644
---- a/target/linux/generic/config-filter
-+++ b/target/linux/generic/config-filter
-@@ -1,7 +1,11 @@
--# CONFIG_ARCH_(ENABLE|HAS|HAVE|INLINE|SUPPORTS|USE|WANT)_.* is not set
-+# CONFIG_ARM64_AS_.* is not set
-+# CONFIG_ARM64_CONT_.*_SHIFT is not set
-+# CONFIG_ARCH_(ENABLE|HAS|HAVE|INLINE|SUPPORTS|USE|WANT|STACKWALK)_.* is not set
- # CONFIG_AS_.* is not set
- # CONFIG_CC_(CAN|HAS|IS|VERSION)_.* is not set
- # CONFIG_LD_.* is not set
- # CONFIG_GCC_VERSION is not set
- # CONFIG_INLINE_.* is not set
- # CONFIG_HAVE_(?!(ARCH_TIMER|TCM|SMP)).* is not set
-+# CONFIG_SET_FS is not set
-+# CONFIG_TASKS_.* is not set
-diff --git a/target/linux/generic/files/block/partitions/fit.c b/target/linux/generic/files/block/partitions/fit.c
-new file mode 100644
-index 0000000000..c0d9642505
---- /dev/null
-+++ b/target/linux/generic/files/block/partitions/fit.c
-@@ -0,0 +1,254 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later
-+/*
-+ *  fs/partitions/fit.c
-+ *  Copyright (C) 2021  Daniel Golle
-+ *
-+ *  headers extracted from U-Boot mkimage sources
-+ *  (C) Copyright 2008 Semihalf
-+ *  (C) Copyright 2000-2005
-+ *  Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-+ *
-+ *  based on existing partition parsers
-+ *  Copyright (C) 1991-1998  Linus Torvalds
-+ *  Re-organised Feb 1998 Russell King
-+ */
-+
-+#define pr_fmt(fmt) fmt
-+
-+#include <linux/types.h>
-+#include <linux/of.h>
-+#include <linux/of_device.h>
-+#include <linux/of_fdt.h>
-+#include <linux/libfdt.h>
-+
-+#include "check.h"
-+
-+#define FIT_IMAGES_PATH		"/images"
-+#define FIT_CONFS_PATH		"/configurations"
-+
-+/* hash/signature/key node */
-+#define FIT_HASH_NODENAME	"hash"
-+#define FIT_ALGO_PROP		"algo"
-+#define FIT_VALUE_PROP		"value"
-+#define FIT_IGNORE_PROP		"uboot-ignore"
-+#define FIT_SIG_NODENAME	"signature"
-+#define FIT_KEY_REQUIRED	"required"
-+#define FIT_KEY_HINT		"key-name-hint"
-+
-+/* cipher node */
-+#define FIT_CIPHER_NODENAME	"cipher"
-+#define FIT_ALGO_PROP		"algo"
-+
-+/* image node */
-+#define FIT_DATA_PROP		"data"
-+#define FIT_DATA_POSITION_PROP	"data-position"
-+#define FIT_DATA_OFFSET_PROP	"data-offset"
-+#define FIT_DATA_SIZE_PROP	"data-size"
-+#define FIT_TIMESTAMP_PROP	"timestamp"
-+#define FIT_DESC_PROP		"description"
-+#define FIT_ARCH_PROP		"arch"
-+#define FIT_TYPE_PROP		"type"
-+#define FIT_OS_PROP		"os"
-+#define FIT_COMP_PROP		"compression"
-+#define FIT_ENTRY_PROP		"entry"
-+#define FIT_LOAD_PROP		"load"
-+
-+/* configuration node */
-+#define FIT_KERNEL_PROP		"kernel"
-+#define FIT_FILESYSTEM_PROP	"filesystem"
-+#define FIT_RAMDISK_PROP	"ramdisk"
-+#define FIT_FDT_PROP		"fdt"
-+#define FIT_LOADABLE_PROP	"loadables"
-+#define FIT_DEFAULT_PROP	"default"
-+#define FIT_SETUP_PROP		"setup"
-+#define FIT_FPGA_PROP		"fpga"
-+#define FIT_FIRMWARE_PROP	"firmware"
-+#define FIT_STANDALONE_PROP	"standalone"
-+
-+#define FIT_MAX_HASH_LEN	HASH_MAX_DIGEST_SIZE
-+
-+#define MIN_FREE_SECT		16
-+#define REMAIN_VOLNAME		"rootfs_data"
-+
-+int parse_fit_partitions(struct parsed_partitions *state, u64 fit_start_sector, u64 sectors, int *slot, int add_remain)
-+{
-+	struct address_space *mapping = state->bdev->bd_inode->i_mapping;
-+	struct page *page;
-+	void *fit, *init_fit;
-+	struct partition_meta_info *info;
-+	char tmp[sizeof(info->volname)];
-+	u64 dsize, dsectors, imgmaxsect = 0;
-+	u32 size, image_pos, image_len;
-+	const u32 *image_offset_be, *image_len_be, *image_pos_be;
-+	int ret = 1, node, images, config;
-+	const char *image_name, *image_type, *image_description, *config_default,
-+		*config_description, *config_loadables;
-+	int image_name_len, image_type_len, image_description_len, config_default_len,
-+		config_description_len, config_loadables_len;
-+	sector_t start_sect, nr_sects;
-+	size_t label_min;
-+
-+	if (fit_start_sector % (1<<(PAGE_SHIFT - SECTOR_SHIFT)))
-+		return -ERANGE;
-+
-+	page = read_mapping_page(mapping, fit_start_sector >> (PAGE_SHIFT - SECTOR_SHIFT), NULL);
-+	if (!page)
-+		return -ENOMEM;
-+
-+	init_fit = page_address(page);
-+
-+	if (!init_fit) {
-+		put_page(page);
-+		return -EFAULT;
-+	}
-+
-+	if (fdt_check_header(init_fit)) {
-+		put_page(page);
-+		return 0;
-+	}
-+
-+	dsectors = get_capacity(state->bdev->bd_disk);
-+	if (sectors)
-+		dsectors = (dsectors>sectors)?sectors:dsectors;
-+
-+	dsize = dsectors << SECTOR_SHIFT;
-+	printk(KERN_DEBUG "FIT: volume size: %llu sectors (%llu bytes)\n", dsectors, dsize);
-+
-+	size = fdt_totalsize(init_fit);
-+	printk(KERN_DEBUG "FIT: FDT structure size: %u bytes\n", size);
-+	if (size > PAGE_SIZE) {
-+		printk(KERN_ERR "FIT: FDT structure beyond page boundaries, use 'mkimage -E ...'!\n");
-+		put_page(page);
-+		return -ENOTSUPP;
-+	}
-+
-+	if (size >= dsize) {
-+		put_page(page);
-+		state->access_beyond_eod = (size >= dsize);
-+		return 0;
-+	}
-+
-+	fit = kmemdup(init_fit, size, GFP_KERNEL);
-+	put_page(page);
-+	if (!fit)
-+		return -ENOMEM;
-+
-+	config = fdt_path_offset(fit, FIT_CONFS_PATH);
-+	if (config < 0) {
-+		printk(KERN_ERR "FIT: Cannot find %s node: %d\n", FIT_CONFS_PATH, images);
-+		ret = -ENOENT;
-+		goto ret_out;
-+	}
-+
-+	config_default = fdt_getprop(fit, config, FIT_DEFAULT_PROP, &config_default_len);
-+
-+	if (!config_default) {
-+		printk(KERN_ERR "FIT: Cannot find default configuration\n");
-+		ret = -ENOENT;
-+		goto ret_out;
-+	}
-+
-+	node = fdt_subnode_offset(fit, config, config_default);
-+	if (node < 0) {
-+		printk(KERN_ERR "FIT: Cannot find %s node: %d\n", config_default, node);
-+		ret = -ENOENT;
-+		goto ret_out;
-+	}
-+
-+	config_description = fdt_getprop(fit, node, FIT_DESC_PROP, &config_description_len);
-+	config_loadables = fdt_getprop(fit, node, FIT_LOADABLE_PROP, &config_loadables_len);
-+
-+	printk(KERN_DEBUG "FIT: Default configuration: %s%s%s%s\n", config_default,
-+		config_description?" (":"", config_description?:"", config_description?")":"");
-+
-+	images = fdt_path_offset(fit, FIT_IMAGES_PATH);
-+	if (images < 0) {
-+		printk(KERN_ERR "FIT: Cannot find %s node: %d\n", FIT_IMAGES_PATH, images);
-+		ret = -EINVAL;
-+		goto ret_out;
-+	}
-+
-+	fdt_for_each_subnode(node, fit, images) {
-+		image_name = fdt_get_name(fit, node, &image_name_len);
-+		image_type = fdt_getprop(fit, node, FIT_TYPE_PROP, &image_type_len);
-+		image_offset_be = fdt_getprop(fit, node, FIT_DATA_OFFSET_PROP, NULL);
-+		image_pos_be = fdt_getprop(fit, node, FIT_DATA_POSITION_PROP, NULL);
-+		image_len_be = fdt_getprop(fit, node, FIT_DATA_SIZE_PROP, NULL);
-+		if (!image_name || !image_type || !image_len_be)
-+			continue;
-+
-+		image_len = be32_to_cpu(*image_len_be);
-+		if (!image_len)
-+			continue;
-+
-+		if (image_offset_be)
-+			image_pos = be32_to_cpu(*image_offset_be) + size;
-+		else if (image_pos_be)
-+			image_pos = be32_to_cpu(*image_pos_be);
-+		else
-+			continue;
-+
-+		image_description = fdt_getprop(fit, node, FIT_DESC_PROP, &image_description_len);
-+
-+		printk(KERN_DEBUG "FIT: %16s sub-image 0x%08x - 0x%08x '%s' %s%s%s\n",
-+			image_type, image_pos, image_pos + image_len, image_name,
-+			image_description?"(":"", image_description?:"", image_description?") ":"");
-+
-+		if (strcmp(image_type, FIT_FILESYSTEM_PROP))
-+			continue;
-+
-+		if (image_pos & ((1 << PAGE_SHIFT)-1)) {
-+			printk(KERN_ERR "FIT: image %s start not aligned to page boundaries, skipping\n", image_name);
-+			continue;
-+		}
-+
-+		if (image_len & ((1 << PAGE_SHIFT)-1)) {
-+			printk(KERN_ERR "FIT: sub-image %s end not aligned to page boundaries, skipping\n", image_name);
-+			continue;
-+		}
-+
-+		start_sect = image_pos >> SECTOR_SHIFT;
-+		nr_sects = image_len >> SECTOR_SHIFT;
-+		imgmaxsect = (imgmaxsect < (start_sect + nr_sects))?(start_sect + nr_sects):imgmaxsect;
-+
-+		if (start_sect + nr_sects > dsectors) {
-+			state->access_beyond_eod = 1;
-+			continue;
-+		}
-+
-+		put_partition(state, ++(*slot), fit_start_sector + start_sect, nr_sects);
-+		state->parts[*slot].flags = 0;
-+		info = &state->parts[*slot].info;
-+
-+		label_min = min_t(int, sizeof(info->volname) - 1, image_name_len);
-+		strncpy(info->volname, image_name, label_min);
-+		info->volname[label_min] = '\0';
-+
-+		snprintf(tmp, sizeof(tmp), "(%s)", info->volname);
-+		strlcat(state->pp_buf, tmp, PAGE_SIZE);
-+
-+		state->parts[*slot].has_info = true;
-+
-+		if (config_loadables && !strcmp(image_name, config_loadables)) {
-+			printk(KERN_DEBUG "FIT: selecting configured loadable %s to be root filesystem\n", image_name);
-+			state->parts[*slot].flags |= ADDPART_FLAG_ROOTDEV;
-+		}
-+	}
-+
-+	if (add_remain && (imgmaxsect + MIN_FREE_SECT) < dsectors) {
-+		put_partition(state, ++(*slot), fit_start_sector + imgmaxsect, dsectors - imgmaxsect);
-+		state->parts[*slot].flags = 0;
-+		info = &state->parts[*slot].info;
-+		strcpy(info->volname, REMAIN_VOLNAME);
-+		snprintf(tmp, sizeof(tmp), "(%s)", REMAIN_VOLNAME);
-+		strlcat(state->pp_buf, tmp, PAGE_SIZE);
-+	}
-+ret_out:
-+	kfree(fit);
-+	return ret;
-+}
-+
-+int fit_partition(struct parsed_partitions *state) {
-+	int slot = 0;
-+	return parse_fit_partitions(state, 0, 0, &slot, 0);
-+}
-diff --git a/target/linux/generic/files/drivers/mtd/mtdsplit/Kconfig b/target/linux/generic/files/drivers/mtd/mtdsplit/Kconfig
-index 4832b8d9e4..794a39f2c3 100644
---- a/target/linux/generic/files/drivers/mtd/mtdsplit/Kconfig
-+++ b/target/linux/generic/files/drivers/mtd/mtdsplit/Kconfig
-@@ -20,6 +20,11 @@ config MTD_SPLIT_SQUASHFS_ROOT
- 
- comment "Firmware partition parsers"
- 
-+config MTD_SPLIT_BCM63XX_FW
-+	bool "BCM63xx firmware parser"
-+	depends on MTD_SPLIT_SUPPORT
-+	select MTD_SPLIT
-+
- config MTD_SPLIT_BCM_WFI_FW
- 	bool "Broadcom Whole Flash Image parser"
- 	depends on MTD_SPLIT_SUPPORT
-diff --git a/target/linux/generic/files/drivers/mtd/mtdsplit/Makefile b/target/linux/generic/files/drivers/mtd/mtdsplit/Makefile
-index 9217d8f64f..1461099b7c 100644
---- a/target/linux/generic/files/drivers/mtd/mtdsplit/Makefile
-+++ b/target/linux/generic/files/drivers/mtd/mtdsplit/Makefile
-@@ -1,4 +1,5 @@
- obj-$(CONFIG_MTD_SPLIT)		+= mtdsplit.o
-+obj-$(CONFIG_MTD_SPLIT_BCM63XX_FW) += mtdsplit_bcm63xx.o
- obj-$(CONFIG_MTD_SPLIT_BCM_WFI_FW) += mtdsplit_bcm_wfi.o
- obj-$(CONFIG_MTD_SPLIT_CFE_BOOTFS) += mtdsplit_cfe_bootfs.o
- obj-$(CONFIG_MTD_SPLIT_SEAMA_FW) += mtdsplit_seama.o
-diff --git a/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_bcm63xx.c b/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_bcm63xx.c
-new file mode 100644
-index 0000000000..3a4b8a754f
---- /dev/null
-+++ b/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_bcm63xx.c
-@@ -0,0 +1,186 @@
-+/*
-+ * Firmware MTD split for BCM63XX, based on bcm63xxpart.c
-+ *
-+ * Copyright (C) 2006-2008 Florian Fainelli <florian@openwrt.org>
-+ * Copyright (C) 2006-2008 Mike Albon <malbon@openwrt.org>
-+ * Copyright (C) 2009-2010 Daniel Dickinson <openwrt@cshore.neomailbox.net>
-+ * Copyright (C) 2011-2013 Jonas Gorski <jonas.gorski@gmail.com>
-+ * Copyright (C) 2015 Simon Arlott <simon@fire.lp0.eu>
-+ * Copyright (C) 2017 �lvaro Fernández Rojas <noltari@gmail.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ *
-+ */
-+
-+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-+
-+#include <linux/bcm963xx_tag.h>
-+#include <linux/crc32.h>
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/slab.h>
-+#include <linux/byteorder/generic.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/partitions.h>
-+
-+#include "mtdsplit.h"
-+
-+/* Ensure strings read from flash structs are null terminated */
-+#define STR_NULL_TERMINATE(x) \
-+	do { char *_str = (x); _str[sizeof(x) - 1] = 0; } while (0)
-+
-+#define BCM63XX_NR_PARTS 2
-+
-+static int bcm63xx_read_image_tag(struct mtd_info *master, loff_t offset,
-+				  struct bcm_tag *hdr)
-+{
-+	int ret;
-+	size_t retlen;
-+	u32 computed_crc;
-+
-+	ret = mtd_read(master, offset, sizeof(*hdr), &retlen, (void *) hdr);
-+	if (ret)
-+		return ret;
-+
-+	if (retlen != sizeof(*hdr))
-+		return -EIO;
-+
-+	computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)hdr,
-+				offsetof(struct bcm_tag, header_crc));
-+	if (computed_crc == hdr->header_crc) {
-+	    STR_NULL_TERMINATE(hdr->board_id);
-+	    STR_NULL_TERMINATE(hdr->tag_version);
-+
-+		pr_info("CFE image tag found at 0x%llx with version %s, "
-+			"board type %s\n", offset, hdr->tag_version,
-+			hdr->board_id);
-+
-+		return 0;
-+	} else {
-+		pr_err("CFE image tag at 0x%llx CRC invalid "
-+		       "(expected %08x, actual %08x)\n",
-+		       offset, hdr->header_crc, computed_crc);
-+
-+		return 1;
-+	}
-+}
-+
-+static int bcm63xx_parse_partitions(struct mtd_info *master,
-+				    const struct mtd_partition **pparts,
-+				    struct bcm_tag *hdr)
-+{
-+	struct mtd_partition *parts;
-+	unsigned int flash_image_start;
-+	unsigned int kernel_address;
-+	unsigned int kernel_length;
-+	size_t kernel_offset = 0, kernel_size = 0;
-+	size_t rootfs_offset = 0, rootfs_size = 0;
-+	int kernel_part, rootfs_part;
-+
-+	STR_NULL_TERMINATE(hdr->flash_image_start);
-+	if (kstrtouint(hdr->flash_image_start, 10, &flash_image_start) ||
-+	    flash_image_start < BCM963XX_EXTENDED_SIZE) {
-+		pr_err("invalid rootfs address: %*ph\n",
-+		       (int) sizeof(hdr->flash_image_start),
-+		       hdr->flash_image_start);
-+		return -EINVAL;
-+	}
-+
-+	STR_NULL_TERMINATE(hdr->kernel_address);
-+	if (kstrtouint(hdr->kernel_address, 10, &kernel_address) ||
-+	    kernel_address < BCM963XX_EXTENDED_SIZE) {
-+		pr_err("invalid kernel address: %*ph\n",
-+		       (int) sizeof(hdr->kernel_address), hdr->kernel_address);
-+		return -EINVAL;
-+	}
-+
-+	STR_NULL_TERMINATE(hdr->kernel_length);
-+	if (kstrtouint(hdr->kernel_length, 10, &kernel_length) ||
-+	    !kernel_length) {
-+		pr_err("invalid kernel length: %*ph\n",
-+		       (int) sizeof(hdr->kernel_length), hdr->kernel_length);
-+		return -EINVAL;
-+	}
-+
-+	kernel_offset = kernel_address - BCM963XX_EXTENDED_SIZE -
-+			mtdpart_get_offset(master);
-+	kernel_size = kernel_length;
-+
-+	if (flash_image_start < kernel_address) {
-+		/* rootfs first */
-+		rootfs_part = 0;
-+		kernel_part = 1;
-+		rootfs_offset = flash_image_start - BCM963XX_EXTENDED_SIZE -
-+				mtdpart_get_offset(master);
-+		rootfs_size = kernel_offset - rootfs_offset;
-+	} else {
-+		/* kernel first */
-+		kernel_part = 0;
-+		rootfs_part = 1;
-+		rootfs_offset = kernel_offset + kernel_size;
-+		rootfs_size = master->size - rootfs_offset;
-+	}
-+
-+	if (mtd_check_rootfs_magic(master, rootfs_offset, NULL))
-+		pr_warn("rootfs magic not found\n");
-+
-+	parts = kzalloc(BCM63XX_NR_PARTS * sizeof(*parts), GFP_KERNEL);
-+	if (!parts)
-+		return -ENOMEM;
-+
-+	parts[kernel_part].name = KERNEL_PART_NAME;
-+	parts[kernel_part].offset = kernel_offset;
-+	parts[kernel_part].size = kernel_size;
-+
-+	parts[rootfs_part].name = ROOTFS_PART_NAME;
-+	parts[rootfs_part].offset = rootfs_offset;
-+	parts[rootfs_part].size = rootfs_size;
-+
-+	*pparts = parts;
-+	return BCM63XX_NR_PARTS;
-+}
-+
-+static int mtdsplit_parse_bcm63xx(struct mtd_info *master,
-+				  const struct mtd_partition **pparts,
-+				  struct mtd_part_parser_data *data)
-+{
-+	struct bcm_tag hdr;
-+	loff_t offset;
-+
-+	if (mtd_type_is_nand(master))
-+		return -EINVAL;
-+
-+	/* find bcm63xx_cfe image on erase block boundaries */
-+	for (offset = 0; offset < master->size; offset += master->erasesize) {
-+		if (!bcm63xx_read_image_tag(master, offset, (void *) &hdr))
-+			return bcm63xx_parse_partitions(master, pparts,
-+							(void *) &hdr);
-+	}
-+
-+	return -EINVAL;
-+}
-+
-+static const struct of_device_id mtdsplit_fit_of_match_table[] = {
-+	{ .compatible = "brcm,bcm963xx-imagetag" },
-+	{ },
-+};
-+
-+static struct mtd_part_parser mtdsplit_bcm63xx_parser = {
-+	.owner = THIS_MODULE,
-+	.name = "bcm63xx-fw",
-+	.of_match_table = mtdsplit_fit_of_match_table,
-+	.parse_fn = mtdsplit_parse_bcm63xx,
-+	.type = MTD_PARSER_TYPE_FIRMWARE,
-+};
-+
-+static int __init mtdsplit_bcm63xx_init(void)
-+{
-+	register_mtd_parser(&mtdsplit_bcm63xx_parser);
-+
-+	return 0;
-+}
-+
-+module_init(mtdsplit_bcm63xx_init);
-diff --git a/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_fit.c b/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_fit.c
-index 67ee33d085..5cc1658dbd 100644
---- a/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_fit.c
-+++ b/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_fit.c
-@@ -49,6 +49,8 @@ mtdsplit_fit_parse(struct mtd_info *mtd,
- 		   const struct mtd_partition **pparts,
- 	           struct mtd_part_parser_data *data)
- {
-+	struct device_node *np = mtd_get_of_node(mtd);
-+	const char *cmdline_match = NULL;
- 	struct fdt_header hdr;
- 	size_t hdr_len, retlen;
- 	size_t offset;
-@@ -57,6 +59,10 @@ mtdsplit_fit_parse(struct mtd_info *mtd,
- 	struct mtd_partition *parts;
- 	int ret;
- 
-+	of_property_read_string(np, "openwrt,cmdline-match", &cmdline_match);
-+	if (cmdline_match && !strstr(saved_command_line, cmdline_match))
-+		return -ENODEV;
-+
- 	hdr_len = sizeof(struct fdt_header);
- 
- 	/* Parse the MTD device & search for the FIT image location */
-diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.c b/target/linux/generic/files/drivers/net/phy/ar8216.c
-index 0b0348bfdf..ef0fc54949 100644
---- a/target/linux/generic/files/drivers/net/phy/ar8216.c
-+++ b/target/linux/generic/files/drivers/net/phy/ar8216.c
-@@ -513,6 +513,8 @@ ar8216_read_port_link(struct ar8xxx_priv *priv, int port,
- 	}
- }
- 
-+#ifdef CONFIG_ETHERNET_PACKET_MANGLE
-+
- static struct sk_buff *
- ar8216_mangle_tx(struct net_device *dev, struct sk_buff *skb)
- {
-@@ -579,6 +581,8 @@ ar8216_mangle_rx(struct net_device *dev, struct sk_buff *skb)
- 	buf[15 + 2] = vlan & 0xff;
- }
- 
-+#endif
-+
- int
- ar8216_wait_bit(struct ar8xxx_priv *priv, int reg, u32 mask, u32 val)
- {
-@@ -887,7 +891,11 @@ ar8216_phy_write(struct ar8xxx_priv *priv, int addr, int regnum, u16 val)
- static int
- ar8229_hw_init(struct ar8xxx_priv *priv)
- {
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 5, 0)
-+	phy_interface_t phy_if_mode;
-+#else
- 	int phy_if_mode;
-+#endif
- 
- 	if (priv->initialized)
- 		return 0;
-@@ -895,7 +903,11 @@ ar8229_hw_init(struct ar8xxx_priv *priv)
- 	ar8xxx_write(priv, AR8216_REG_CTRL, AR8216_CTRL_RESET);
- 	ar8xxx_reg_wait(priv, AR8216_REG_CTRL, AR8216_CTRL_RESET, 0, 1000);
- 
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 5, 0)
-+	of_get_phy_mode(priv->pdev->of_node, &phy_if_mode);
-+#else
- 	phy_if_mode = of_get_phy_mode(priv->pdev->of_node);
-+#endif
- 
- 	if (phy_if_mode == PHY_INTERFACE_MODE_GMII) {
- 		ar8xxx_write(priv, AR8229_REG_OPER_MODE0,
-@@ -2449,6 +2461,7 @@ ar8xxx_phy_config_init(struct phy_device *phydev)
- 	if (ret)
- 		return ret;
- 
-+#ifdef CONFIG_ETHERNET_PACKET_MANGLE
- 	/* VID fixup only needed on ar8216 */
- 	if (chip_is_ar8216(priv)) {
- 		dev->phy_ptr = priv;
-@@ -2456,6 +2469,7 @@ ar8xxx_phy_config_init(struct phy_device *phydev)
- 		dev->eth_mangle_rx = ar8216_mangle_rx;
- 		dev->eth_mangle_tx = ar8216_mangle_tx;
- 	}
-+#endif
- 
- 	return 0;
- }
-@@ -2687,10 +2701,12 @@ ar8xxx_phy_detach(struct phy_device *phydev)
- 	if (!dev)
- 		return;
- 
-+#ifdef CONFIG_ETHERNET_PACKET_MANGLE
- 	dev->phy_ptr = NULL;
- 	dev->priv_flags &= ~IFF_NO_IP_ALIGN;
- 	dev->eth_mangle_rx = NULL;
- 	dev->eth_mangle_tx = NULL;
-+#endif
- }
- 
- static void
-diff --git a/target/linux/generic/hack-5.10/204-module_strip.patch b/target/linux/generic/hack-5.10/204-module_strip.patch
-new file mode 100644
-index 0000000000..06159b0120
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/204-module_strip.patch
-@@ -0,0 +1,196 @@
-+From a779a482fb9b9f8fcdf8b2519c789b4b9bb5dd05 Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Fri, 7 Jul 2017 16:56:48 +0200
-+Subject: build: add a hack for removing non-essential module info
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ include/linux/module.h      | 13 ++++++++-----
-+ include/linux/moduleparam.h | 15 ++++++++++++---
-+ init/Kconfig                |  7 +++++++
-+ kernel/module.c             |  5 ++++-
-+ scripts/mod/modpost.c       | 12 ++++++++++++
-+ 5 files changed, 43 insertions(+), 9 deletions(-)
-+
-+--- a/include/linux/module.h
-++++ b/include/linux/module.h
-+@@ -161,6 +161,7 @@ extern void cleanup_module(void);
-+ 
-+ /* Generic info of form tag = "info" */
-+ #define MODULE_INFO(tag, info) __MODULE_INFO(tag, tag, info)
-++#define MODULE_INFO_STRIP(tag, info) __MODULE_INFO_STRIP(tag, tag, info)
-+ 
-+ /* For userspace: you can also call me... */
-+ #define MODULE_ALIAS(_alias) MODULE_INFO(alias, _alias)
-+@@ -230,12 +231,12 @@ extern void cleanup_module(void);
-+  * Author(s), use "Name <email>" or just "Name", for multiple
-+  * authors use multiple MODULE_AUTHOR() statements/lines.
-+  */
-+-#define MODULE_AUTHOR(_author) MODULE_INFO(author, _author)
-++#define MODULE_AUTHOR(_author) MODULE_INFO_STRIP(author, _author)
-+ 
-+ /* What your module does. */
-+-#define MODULE_DESCRIPTION(_description) MODULE_INFO(description, _description)
-++#define MODULE_DESCRIPTION(_description) MODULE_INFO_STRIP(description, _description)
-+ 
-+-#ifdef MODULE
-++#if defined(MODULE) && !defined(CONFIG_MODULE_STRIPPED)
-+ /* Creates an alias so file2alias.c can find device table. */
-+ #define MODULE_DEVICE_TABLE(type, name)					\
-+ extern typeof(name) __mod_##type##__##name##_device_table		\
-+@@ -262,7 +263,9 @@ extern typeof(name) __mod_##type##__##na
-+  */
-+ 
-+ #if defined(MODULE) || !defined(CONFIG_SYSFS)
-+-#define MODULE_VERSION(_version) MODULE_INFO(version, _version)
-++#define MODULE_VERSION(_version) MODULE_INFO_STRIP(version, _version)
-++#elif defined(CONFIG_MODULE_STRIPPED)
-++#define MODULE_VERSION(_version) __MODULE_INFO_DISABLED(version)
-+ #else
-+ #define MODULE_VERSION(_version)					\
-+ 	MODULE_INFO(version, _version);					\
-+@@ -285,7 +288,7 @@ extern typeof(name) __mod_##type##__##na
-+ /* Optional firmware file (or files) needed by the module
-+  * format is simply firmware file name.  Multiple firmware
-+  * files require multiple MODULE_FIRMWARE() specifiers */
-+-#define MODULE_FIRMWARE(_firmware) MODULE_INFO(firmware, _firmware)
-++#define MODULE_FIRMWARE(_firmware) MODULE_INFO_STRIP(firmware, _firmware)
-+ 
-+ #define MODULE_IMPORT_NS(ns) MODULE_INFO(import_ns, #ns)
-+ 
-+--- a/include/linux/moduleparam.h
-++++ b/include/linux/moduleparam.h
-+@@ -20,6 +20,16 @@
-+ /* Chosen so that structs with an unsigned long line up. */
-+ #define MAX_PARAM_PREFIX_LEN (64 - sizeof(unsigned long))
-+ 
-++/* This struct is here for syntactic coherency, it is not used */
-++#define __MODULE_INFO_DISABLED(name)					  \
-++  struct __UNIQUE_ID(name) {}
-++
-++#ifdef CONFIG_MODULE_STRIPPED
-++#define __MODULE_INFO_STRIP(tag, name, info) __MODULE_INFO_DISABLED(name)
-++#else
-++#define __MODULE_INFO_STRIP(tag, name, info) __MODULE_INFO(tag, name, info)
-++#endif
-++
-+ #define __MODULE_INFO(tag, name, info)					  \
-+ static const char __UNIQUE_ID(name)[]					  \
-+   __used __section(".modinfo") __attribute__((unused, aligned(1)))	  \
-+@@ -31,7 +41,7 @@ static const char __UNIQUE_ID(name)[]
-+ /* One for each parameter, describing how to use it.  Some files do
-+    multiple of these per line, so can't just use MODULE_INFO. */
-+ #define MODULE_PARM_DESC(_parm, desc) \
-+-	__MODULE_INFO(parm, _parm, #_parm ":" desc)
-++	__MODULE_INFO_STRIP(parm, _parm, #_parm ":" desc)
-+ 
-+ struct kernel_param;
-+ 
-+--- a/init/Kconfig
-++++ b/init/Kconfig
-+@@ -2338,6 +2338,13 @@ config UNUSED_KSYMS_WHITELIST
-+ 	  one per line. The path can be absolute, or relative to the kernel
-+ 	  source tree.
-+ 
-++config MODULE_STRIPPED
-++	bool "Reduce module size"
-++	depends on MODULES
-++	help
-++	  Remove module parameter descriptions, author info, version, aliases,
-++	  device tables, etc.
-++
-+ endif # MODULES
-+ 
-+ config MODULES_TREE_LOOKUP
-+--- a/kernel/module.c
-++++ b/kernel/module.c
-+@@ -3243,9 +3243,11 @@ static int setup_load_info(struct load_i
-+ 
-+ static int check_modinfo(struct module *mod, struct load_info *info, int flags)
-+ {
-+-	const char *modmagic = get_modinfo(info, "vermagic");
-+ 	int err;
-+ 
-++#ifndef CONFIG_MODULE_STRIPPED
-++	const char *modmagic = get_modinfo(info, "vermagic");
-++
-+ 	if (flags & MODULE_INIT_IGNORE_VERMAGIC)
-+ 		modmagic = NULL;
-+ 
-+@@ -3266,6 +3268,7 @@ static int check_modinfo(struct module *
-+ 				mod->name);
-+ 		add_taint_module(mod, TAINT_OOT_MODULE, LOCKDEP_STILL_OK);
-+ 	}
-++#endif
-+ 
-+ 	check_modinfo_retpoline(mod, info);
-+ 
-+--- a/scripts/mod/modpost.c
-++++ b/scripts/mod/modpost.c
-+@@ -2037,7 +2037,9 @@ static void read_symbols(const char *mod
-+ 		symname = remove_dot(info.strtab + sym->st_name);
-+ 
-+ 		handle_symbol(mod, &info, sym, symname);
-++#ifndef CONFIG_MODULE_STRIPPED
-+ 		handle_moddevtable(mod, &info, sym, symname);
-++#endif
-+ 	}
-+ 
-+ 	for (sym = info.symtab_start; sym < info.symtab_stop; sym++) {
-+@@ -2250,8 +2252,10 @@ static void add_header(struct buffer *b,
-+ 	buf_printf(b, "\n");
-+ 	buf_printf(b, "BUILD_SALT;\n");
-+ 	buf_printf(b, "\n");
-++#ifndef CONFIG_MODULE_STRIPPED
-+ 	buf_printf(b, "MODULE_INFO(vermagic, VERMAGIC_STRING);\n");
-+ 	buf_printf(b, "MODULE_INFO(name, KBUILD_MODNAME);\n");
-++#endif
-+ 	buf_printf(b, "\n");
-+ 	buf_printf(b, "__visible struct module __this_module\n");
-+ 	buf_printf(b, "__section(\".gnu.linkonce.this_module\") = {\n");
-+@@ -2268,8 +2272,10 @@ static void add_header(struct buffer *b,
-+ 
-+ static void add_intree_flag(struct buffer *b, int is_intree)
-+ {
-++#ifndef CONFIG_MODULE_STRIPPED
-+ 	if (is_intree)
-+ 		buf_printf(b, "\nMODULE_INFO(intree, \"Y\");\n");
-++#endif
-+ }
-+ 
-+ /* Cannot check for assembler */
-+@@ -2282,8 +2288,10 @@ static void add_retpoline(struct buffer
-+ 
-+ static void add_staging_flag(struct buffer *b, const char *name)
-+ {
-++#ifndef CONFIG_MODULE_STRIPPED
-+ 	if (strstarts(name, "drivers/staging"))
-+ 		buf_printf(b, "\nMODULE_INFO(staging, \"Y\");\n");
-++#endif
-+ }
-+ 
-+ /**
-+@@ -2367,11 +2375,13 @@ static void add_depends(struct buffer *b
-+ 
-+ static void add_srcversion(struct buffer *b, struct module *mod)
-+ {
-++#ifndef CONFIG_MODULE_STRIPPED
-+ 	if (mod->srcversion[0]) {
-+ 		buf_printf(b, "\n");
-+ 		buf_printf(b, "MODULE_INFO(srcversion, \"%s\");\n",
-+ 			   mod->srcversion);
-+ 	}
-++#endif
-+ }
-+ 
-+ static void write_buf(struct buffer *b, const char *fname)
-+@@ -2643,7 +2653,9 @@ int main(int argc, char **argv)
-+ 		add_staging_flag(&buf, mod->name);
-+ 		err |= add_versions(&buf, mod);
-+ 		add_depends(&buf, mod);
-++#ifndef CONFIG_MODULE_STRIPPED
-+ 		add_moddevtable(&buf, mod);
-++#endif
-+ 		add_srcversion(&buf, mod);
-+ 
-+ 		sprintf(fname, "%s.mod.c", mod->name);
-diff --git a/target/linux/generic/hack-5.10/210-darwin_scripts_include.patch b/target/linux/generic/hack-5.10/210-darwin_scripts_include.patch
-new file mode 100644
-index 0000000000..be6adc0d11
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/210-darwin_scripts_include.patch
-@@ -0,0 +1,3053 @@
-+From db7c30dcd9a0391bf13b62c9f91e144d762ef43a Mon Sep 17 00:00:00 2001
-+From: Florian Fainelli <f.fainelli@gmail.com>
-+Date: Fri, 7 Jul 2017 17:00:49 +0200
-+Subject: Add an OSX specific patch to make the kernel be compiled
-+
-+lede-commit: 3fc2a24f0422b2f55f9ed43f116db3111f700526
-+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
-+---
-+ scripts/kconfig/Makefile   |    3 +
-+ scripts/mod/elf.h          | 3007 ++++++++++++++++++++++++++++++++++++++++++++
-+ scripts/mod/mk_elfconfig.c |    4 +
-+ scripts/mod/modpost.h      |    4 +
-+ 4 files changed, 3018 insertions(+)
-+ create mode 100644 scripts/mod/elf.h
-+
-+--- /dev/null
-++++ b/scripts/mod/elf.h
-+@@ -0,0 +1,3007 @@
-++/* This file defines standard ELF types, structures, and macros.
-++   Copyright (C) 1995-2012 Free Software Foundation, Inc.
-++   This file is part of the GNU C Library.
-++
-++   The GNU C Library is free software; you can redistribute it and/or
-++   modify it under the terms of the GNU Lesser General Public
-++   License as published by the Free Software Foundation; either
-++   version 2.1 of the License, or (at your option) any later version.
-++
-++   The GNU C Library is distributed in the hope that it will be useful,
-++   but WITHOUT ANY WARRANTY; without even the implied warranty of
-++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-++   Lesser General Public License for more details.
-++
-++   You should have received a copy of the GNU Lesser General Public
-++   License along with the GNU C Library; if not, see
-++   <http://www.gnu.org/licenses/>.  */
-++
-++#ifndef _ELF_H
-++#define	_ELF_H 1
-++
-++/* Standard ELF types.  */
-++
-++#include <stdint.h>
-++
-++/* Type for a 16-bit quantity.  */
-++typedef uint16_t Elf32_Half;
-++typedef uint16_t Elf64_Half;
-++
-++/* Types for signed and unsigned 32-bit quantities.  */
-++typedef uint32_t Elf32_Word;
-++typedef	int32_t  Elf32_Sword;
-++typedef uint32_t Elf64_Word;
-++typedef	int32_t  Elf64_Sword;
-++
-++/* Types for signed and unsigned 64-bit quantities.  */
-++typedef uint64_t Elf32_Xword;
-++typedef	int64_t  Elf32_Sxword;
-++typedef uint64_t Elf64_Xword;
-++typedef	int64_t  Elf64_Sxword;
-++
-++/* Type of addresses.  */
-++typedef uint32_t Elf32_Addr;
-++typedef uint64_t Elf64_Addr;
-++
-++/* Type of file offsets.  */
-++typedef uint32_t Elf32_Off;
-++typedef uint64_t Elf64_Off;
-++
-++/* Type for section indices, which are 16-bit quantities.  */
-++typedef uint16_t Elf32_Section;
-++typedef uint16_t Elf64_Section;
-++
-++/* Type for version symbol information.  */
-++typedef Elf32_Half Elf32_Versym;
-++typedef Elf64_Half Elf64_Versym;
-++
-++
-++/* The ELF file header.  This appears at the start of every ELF file.  */
-++
-++#define EI_NIDENT (16)
-++
-++typedef struct
-++{
-++  unsigned char	e_ident[EI_NIDENT];	/* Magic number and other info */
-++  Elf32_Half	e_type;			/* Object file type */
-++  Elf32_Half	e_machine;		/* Architecture */
-++  Elf32_Word	e_version;		/* Object file version */
-++  Elf32_Addr	e_entry;		/* Entry point virtual address */
-++  Elf32_Off	e_phoff;		/* Program header table file offset */
-++  Elf32_Off	e_shoff;		/* Section header table file offset */
-++  Elf32_Word	e_flags;		/* Processor-specific flags */
-++  Elf32_Half	e_ehsize;		/* ELF header size in bytes */
-++  Elf32_Half	e_phentsize;		/* Program header table entry size */
-++  Elf32_Half	e_phnum;		/* Program header table entry count */
-++  Elf32_Half	e_shentsize;		/* Section header table entry size */
-++  Elf32_Half	e_shnum;		/* Section header table entry count */
-++  Elf32_Half	e_shstrndx;		/* Section header string table index */
-++} Elf32_Ehdr;
-++
-++typedef struct
-++{
-++  unsigned char	e_ident[EI_NIDENT];	/* Magic number and other info */
-++  Elf64_Half	e_type;			/* Object file type */
-++  Elf64_Half	e_machine;		/* Architecture */
-++  Elf64_Word	e_version;		/* Object file version */
-++  Elf64_Addr	e_entry;		/* Entry point virtual address */
-++  Elf64_Off	e_phoff;		/* Program header table file offset */
-++  Elf64_Off	e_shoff;		/* Section header table file offset */
-++  Elf64_Word	e_flags;		/* Processor-specific flags */
-++  Elf64_Half	e_ehsize;		/* ELF header size in bytes */
-++  Elf64_Half	e_phentsize;		/* Program header table entry size */
-++  Elf64_Half	e_phnum;		/* Program header table entry count */
-++  Elf64_Half	e_shentsize;		/* Section header table entry size */
-++  Elf64_Half	e_shnum;		/* Section header table entry count */
-++  Elf64_Half	e_shstrndx;		/* Section header string table index */
-++} Elf64_Ehdr;
-++
-++/* Fields in the e_ident array.  The EI_* macros are indices into the
-++   array.  The macros under each EI_* macro are the values the byte
-++   may have.  */
-++
-++#define EI_MAG0		0		/* File identification byte 0 index */
-++#define ELFMAG0		0x7f		/* Magic number byte 0 */
-++
-++#define EI_MAG1		1		/* File identification byte 1 index */
-++#define ELFMAG1		'E'		/* Magic number byte 1 */
-++
-++#define EI_MAG2		2		/* File identification byte 2 index */
-++#define ELFMAG2		'L'		/* Magic number byte 2 */
-++
-++#define EI_MAG3		3		/* File identification byte 3 index */
-++#define ELFMAG3		'F'		/* Magic number byte 3 */
-++
-++/* Conglomeration of the identification bytes, for easy testing as a word.  */
-++#define	ELFMAG		"\177ELF"
-++#define	SELFMAG		4
-++
-++#define EI_CLASS	4		/* File class byte index */
-++#define ELFCLASSNONE	0		/* Invalid class */
-++#define ELFCLASS32	1		/* 32-bit objects */
-++#define ELFCLASS64	2		/* 64-bit objects */
-++#define ELFCLASSNUM	3
-++
-++#define EI_DATA		5		/* Data encoding byte index */
-++#define ELFDATANONE	0		/* Invalid data encoding */
-++#define ELFDATA2LSB	1		/* 2's complement, little endian */
-++#define ELFDATA2MSB	2		/* 2's complement, big endian */
-++#define ELFDATANUM	3
-++
-++#define EI_VERSION	6		/* File version byte index */
-++					/* Value must be EV_CURRENT */
-++
-++#define EI_OSABI	7		/* OS ABI identification */
-++#define ELFOSABI_NONE		0	/* UNIX System V ABI */
-++#define ELFOSABI_SYSV		0	/* Alias.  */
-++#define ELFOSABI_HPUX		1	/* HP-UX */
-++#define ELFOSABI_NETBSD		2	/* NetBSD.  */
-++#define ELFOSABI_GNU		3	/* Object uses GNU ELF extensions.  */
-++#define ELFOSABI_LINUX		ELFOSABI_GNU /* Compatibility alias.  */
-++#define ELFOSABI_SOLARIS	6	/* Sun Solaris.  */
-++#define ELFOSABI_AIX		7	/* IBM AIX.  */
-++#define ELFOSABI_IRIX		8	/* SGI Irix.  */
-++#define ELFOSABI_FREEBSD	9	/* FreeBSD.  */
-++#define ELFOSABI_TRU64		10	/* Compaq TRU64 UNIX.  */
-++#define ELFOSABI_MODESTO	11	/* Novell Modesto.  */
-++#define ELFOSABI_OPENBSD	12	/* OpenBSD.  */
-++#define ELFOSABI_ARM_AEABI	64	/* ARM EABI */
-++#define ELFOSABI_ARM		97	/* ARM */
-++#define ELFOSABI_STANDALONE	255	/* Standalone (embedded) application */
-++
-++#define EI_ABIVERSION	8		/* ABI version */
-++
-++#define EI_PAD		9		/* Byte index of padding bytes */
-++
-++/* Legal values for e_type (object file type).  */
-++
-++#define ET_NONE		0		/* No file type */
-++#define ET_REL		1		/* Relocatable file */
-++#define ET_EXEC		2		/* Executable file */
-++#define ET_DYN		3		/* Shared object file */
-++#define ET_CORE		4		/* Core file */
-++#define	ET_NUM		5		/* Number of defined types */
-++#define ET_LOOS		0xfe00		/* OS-specific range start */
-++#define ET_HIOS		0xfeff		/* OS-specific range end */
-++#define ET_LOPROC	0xff00		/* Processor-specific range start */
-++#define ET_HIPROC	0xffff		/* Processor-specific range end */
-++
-++/* Legal values for e_machine (architecture).  */
-++
-++#define EM_NONE		 0		/* No machine */
-++#define EM_M32		 1		/* AT&T WE 32100 */
-++#define EM_SPARC	 2		/* SUN SPARC */
-++#define EM_386		 3		/* Intel 80386 */
-++#define EM_68K		 4		/* Motorola m68k family */
-++#define EM_88K		 5		/* Motorola m88k family */
-++#define EM_860		 7		/* Intel 80860 */
-++#define EM_MIPS		 8		/* MIPS R3000 big-endian */
-++#define EM_S370		 9		/* IBM System/370 */
-++#define EM_MIPS_RS3_LE	10		/* MIPS R3000 little-endian */
-++
-++#define EM_PARISC	15		/* HPPA */
-++#define EM_VPP500	17		/* Fujitsu VPP500 */
-++#define EM_SPARC32PLUS	18		/* Sun's "v8plus" */
-++#define EM_960		19		/* Intel 80960 */
-++#define EM_PPC		20		/* PowerPC */
-++#define EM_PPC64	21		/* PowerPC 64-bit */
-++#define EM_S390		22		/* IBM S390 */
-++
-++#define EM_V800		36		/* NEC V800 series */
-++#define EM_FR20		37		/* Fujitsu FR20 */
-++#define EM_RH32		38		/* TRW RH-32 */
-++#define EM_RCE		39		/* Motorola RCE */
-++#define EM_ARM		40		/* ARM */
-++#define EM_FAKE_ALPHA	41		/* Digital Alpha */
-++#define EM_SH		42		/* Hitachi SH */
-++#define EM_SPARCV9	43		/* SPARC v9 64-bit */
-++#define EM_TRICORE	44		/* Siemens Tricore */
-++#define EM_ARC		45		/* Argonaut RISC Core */
-++#define EM_H8_300	46		/* Hitachi H8/300 */
-++#define EM_H8_300H	47		/* Hitachi H8/300H */
-++#define EM_H8S		48		/* Hitachi H8S */
-++#define EM_H8_500	49		/* Hitachi H8/500 */
-++#define EM_IA_64	50		/* Intel Merced */
-++#define EM_MIPS_X	51		/* Stanford MIPS-X */
-++#define EM_COLDFIRE	52		/* Motorola Coldfire */
-++#define EM_68HC12	53		/* Motorola M68HC12 */
-++#define EM_MMA		54		/* Fujitsu MMA Multimedia Accelerator*/
-++#define EM_PCP		55		/* Siemens PCP */
-++#define EM_NCPU		56		/* Sony nCPU embeeded RISC */
-++#define EM_NDR1		57		/* Denso NDR1 microprocessor */
-++#define EM_STARCORE	58		/* Motorola Start*Core processor */
-++#define EM_ME16		59		/* Toyota ME16 processor */
-++#define EM_ST100	60		/* STMicroelectronic ST100 processor */
-++#define EM_TINYJ	61		/* Advanced Logic Corp. Tinyj emb.fam*/
-++#define EM_X86_64	62		/* AMD x86-64 architecture */
-++#define EM_PDSP		63		/* Sony DSP Processor */
-++
-++#define EM_FX66		66		/* Siemens FX66 microcontroller */
-++#define EM_ST9PLUS	67		/* STMicroelectronics ST9+ 8/16 mc */
-++#define EM_ST7		68		/* STmicroelectronics ST7 8 bit mc */
-++#define EM_68HC16	69		/* Motorola MC68HC16 microcontroller */
-++#define EM_68HC11	70		/* Motorola MC68HC11 microcontroller */
-++#define EM_68HC08	71		/* Motorola MC68HC08 microcontroller */
-++#define EM_68HC05	72		/* Motorola MC68HC05 microcontroller */
-++#define EM_SVX		73		/* Silicon Graphics SVx */
-++#define EM_ST19		74		/* STMicroelectronics ST19 8 bit mc */
-++#define EM_VAX		75		/* Digital VAX */
-++#define EM_CRIS		76		/* Axis Communications 32-bit embedded processor */
-++#define EM_JAVELIN	77		/* Infineon Technologies 32-bit embedded processor */
-++#define EM_FIREPATH	78		/* Element 14 64-bit DSP Processor */
-++#define EM_ZSP		79		/* LSI Logic 16-bit DSP Processor */
-++#define EM_MMIX		80		/* Donald Knuth's educational 64-bit processor */
-++#define EM_HUANY	81		/* Harvard University machine-independent object files */
-++#define EM_PRISM	82		/* SiTera Prism */
-++#define EM_AVR		83		/* Atmel AVR 8-bit microcontroller */
-++#define EM_FR30		84		/* Fujitsu FR30 */
-++#define EM_D10V		85		/* Mitsubishi D10V */
-++#define EM_D30V		86		/* Mitsubishi D30V */
-++#define EM_V850		87		/* NEC v850 */
-++#define EM_M32R		88		/* Mitsubishi M32R */
-++#define EM_MN10300	89		/* Matsushita MN10300 */
-++#define EM_MN10200	90		/* Matsushita MN10200 */
-++#define EM_PJ		91		/* picoJava */
-++#define EM_OPENRISC	92		/* OpenRISC 32-bit embedded processor */
-++#define EM_ARC_A5	93		/* ARC Cores Tangent-A5 */
-++#define EM_XTENSA	94		/* Tensilica Xtensa Architecture */
-++#define EM_TILEPRO	188		/* Tilera TILEPro */
-++#define EM_TILEGX	191		/* Tilera TILE-Gx */
-++#define EM_NUM		192
-++
-++/* If it is necessary to assign new unofficial EM_* values, please
-++   pick large random numbers (0x8523, 0xa7f2, etc.) to minimize the
-++   chances of collision with official or non-GNU unofficial values.  */
-++
-++#define EM_ALPHA	0x9026
-++
-++/* Legal values for e_version (version).  */
-++
-++#define EV_NONE		0		/* Invalid ELF version */
-++#define EV_CURRENT	1		/* Current version */
-++#define EV_NUM		2
-++
-++/* Section header.  */
-++
-++typedef struct
-++{
-++  Elf32_Word	sh_name;		/* Section name (string tbl index) */
-++  Elf32_Word	sh_type;		/* Section type */
-++  Elf32_Word	sh_flags;		/* Section flags */
-++  Elf32_Addr	sh_addr;		/* Section virtual addr at execution */
-++  Elf32_Off	sh_offset;		/* Section file offset */
-++  Elf32_Word	sh_size;		/* Section size in bytes */
-++  Elf32_Word	sh_link;		/* Link to another section */
-++  Elf32_Word	sh_info;		/* Additional section information */
-++  Elf32_Word	sh_addralign;		/* Section alignment */
-++  Elf32_Word	sh_entsize;		/* Entry size if section holds table */
-++} Elf32_Shdr;
-++
-++typedef struct
-++{
-++  Elf64_Word	sh_name;		/* Section name (string tbl index) */
-++  Elf64_Word	sh_type;		/* Section type */
-++  Elf64_Xword	sh_flags;		/* Section flags */
-++  Elf64_Addr	sh_addr;		/* Section virtual addr at execution */
-++  Elf64_Off	sh_offset;		/* Section file offset */
-++  Elf64_Xword	sh_size;		/* Section size in bytes */
-++  Elf64_Word	sh_link;		/* Link to another section */
-++  Elf64_Word	sh_info;		/* Additional section information */
-++  Elf64_Xword	sh_addralign;		/* Section alignment */
-++  Elf64_Xword	sh_entsize;		/* Entry size if section holds table */
-++} Elf64_Shdr;
-++
-++/* Special section indices.  */
-++
-++#define SHN_UNDEF	0		/* Undefined section */
-++#define SHN_LORESERVE	0xff00		/* Start of reserved indices */
-++#define SHN_LOPROC	0xff00		/* Start of processor-specific */
-++#define SHN_BEFORE	0xff00		/* Order section before all others
-++					   (Solaris).  */
-++#define SHN_AFTER	0xff01		/* Order section after all others
-++					   (Solaris).  */
-++#define SHN_HIPROC	0xff1f		/* End of processor-specific */
-++#define SHN_LOOS	0xff20		/* Start of OS-specific */
-++#define SHN_HIOS	0xff3f		/* End of OS-specific */
-++#define SHN_ABS		0xfff1		/* Associated symbol is absolute */
-++#define SHN_COMMON	0xfff2		/* Associated symbol is common */
-++#define SHN_XINDEX	0xffff		/* Index is in extra table.  */
-++#define SHN_HIRESERVE	0xffff		/* End of reserved indices */
-++
-++/* Legal values for sh_type (section type).  */
-++
-++#define SHT_NULL	  0		/* Section header table entry unused */
-++#define SHT_PROGBITS	  1		/* Program data */
-++#define SHT_SYMTAB	  2		/* Symbol table */
-++#define SHT_STRTAB	  3		/* String table */
-++#define SHT_RELA	  4		/* Relocation entries with addends */
-++#define SHT_HASH	  5		/* Symbol hash table */
-++#define SHT_DYNAMIC	  6		/* Dynamic linking information */
-++#define SHT_NOTE	  7		/* Notes */
-++#define SHT_NOBITS	  8		/* Program space with no data (bss) */
-++#define SHT_REL		  9		/* Relocation entries, no addends */
-++#define SHT_SHLIB	  10		/* Reserved */
-++#define SHT_DYNSYM	  11		/* Dynamic linker symbol table */
-++#define SHT_INIT_ARRAY	  14		/* Array of constructors */
-++#define SHT_FINI_ARRAY	  15		/* Array of destructors */
-++#define SHT_PREINIT_ARRAY 16		/* Array of pre-constructors */
-++#define SHT_GROUP	  17		/* Section group */
-++#define SHT_SYMTAB_SHNDX  18		/* Extended section indeces */
-++#define	SHT_NUM		  19		/* Number of defined types.  */
-++#define SHT_LOOS	  0x60000000	/* Start OS-specific.  */
-++#define SHT_GNU_ATTRIBUTES 0x6ffffff5	/* Object attributes.  */
-++#define SHT_GNU_HASH	  0x6ffffff6	/* GNU-style hash table.  */
-++#define SHT_GNU_LIBLIST	  0x6ffffff7	/* Prelink library list */
-++#define SHT_CHECKSUM	  0x6ffffff8	/* Checksum for DSO content.  */
-++#define SHT_LOSUNW	  0x6ffffffa	/* Sun-specific low bound.  */
-++#define SHT_SUNW_move	  0x6ffffffa
-++#define SHT_SUNW_COMDAT   0x6ffffffb
-++#define SHT_SUNW_syminfo  0x6ffffffc
-++#define SHT_GNU_verdef	  0x6ffffffd	/* Version definition section.  */
-++#define SHT_GNU_verneed	  0x6ffffffe	/* Version needs section.  */
-++#define SHT_GNU_versym	  0x6fffffff	/* Version symbol table.  */
-++#define SHT_HISUNW	  0x6fffffff	/* Sun-specific high bound.  */
-++#define SHT_HIOS	  0x6fffffff	/* End OS-specific type */
-++#define SHT_LOPROC	  0x70000000	/* Start of processor-specific */
-++#define SHT_HIPROC	  0x7fffffff	/* End of processor-specific */
-++#define SHT_LOUSER	  0x80000000	/* Start of application-specific */
-++#define SHT_HIUSER	  0x8fffffff	/* End of application-specific */
-++
-++/* Legal values for sh_flags (section flags).  */
-++
-++#define SHF_WRITE	     (1 << 0)	/* Writable */
-++#define SHF_ALLOC	     (1 << 1)	/* Occupies memory during execution */
-++#define SHF_EXECINSTR	     (1 << 2)	/* Executable */
-++#define SHF_MERGE	     (1 << 4)	/* Might be merged */
-++#define SHF_STRINGS	     (1 << 5)	/* Contains nul-terminated strings */
-++#define SHF_INFO_LINK	     (1 << 6)	/* `sh_info' contains SHT index */
-++#define SHF_LINK_ORDER	     (1 << 7)	/* Preserve order after combining */
-++#define SHF_OS_NONCONFORMING (1 << 8)	/* Non-standard OS specific handling
-++					   required */
-++#define SHF_GROUP	     (1 << 9)	/* Section is member of a group.  */
-++#define SHF_TLS		     (1 << 10)	/* Section hold thread-local data.  */
-++#define SHF_MASKOS	     0x0ff00000	/* OS-specific.  */
-++#define SHF_MASKPROC	     0xf0000000	/* Processor-specific */
-++#define SHF_ORDERED	     (1 << 30)	/* Special ordering requirement
-++					   (Solaris).  */
-++#define SHF_EXCLUDE	     (1 << 31)	/* Section is excluded unless
-++					   referenced or allocated (Solaris).*/
-++
-++/* Section group handling.  */
-++#define GRP_COMDAT	0x1		/* Mark group as COMDAT.  */
-++
-++/* Symbol table entry.  */
-++
-++typedef struct
-++{
-++  Elf32_Word	st_name;		/* Symbol name (string tbl index) */
-++  Elf32_Addr	st_value;		/* Symbol value */
-++  Elf32_Word	st_size;		/* Symbol size */
-++  unsigned char	st_info;		/* Symbol type and binding */
-++  unsigned char	st_other;		/* Symbol visibility */
-++  Elf32_Section	st_shndx;		/* Section index */
-++} Elf32_Sym;
-++
-++typedef struct
-++{
-++  Elf64_Word	st_name;		/* Symbol name (string tbl index) */
-++  unsigned char	st_info;		/* Symbol type and binding */
-++  unsigned char st_other;		/* Symbol visibility */
-++  Elf64_Section	st_shndx;		/* Section index */
-++  Elf64_Addr	st_value;		/* Symbol value */
-++  Elf64_Xword	st_size;		/* Symbol size */
-++} Elf64_Sym;
-++
-++/* The syminfo section if available contains additional information about
-++   every dynamic symbol.  */
-++
-++typedef struct
-++{
-++  Elf32_Half si_boundto;		/* Direct bindings, symbol bound to */
-++  Elf32_Half si_flags;			/* Per symbol flags */
-++} Elf32_Syminfo;
-++
-++typedef struct
-++{
-++  Elf64_Half si_boundto;		/* Direct bindings, symbol bound to */
-++  Elf64_Half si_flags;			/* Per symbol flags */
-++} Elf64_Syminfo;
-++
-++/* Possible values for si_boundto.  */
-++#define SYMINFO_BT_SELF		0xffff	/* Symbol bound to self */
-++#define SYMINFO_BT_PARENT	0xfffe	/* Symbol bound to parent */
-++#define SYMINFO_BT_LOWRESERVE	0xff00	/* Beginning of reserved entries */
-++
-++/* Possible bitmasks for si_flags.  */
-++#define SYMINFO_FLG_DIRECT	0x0001	/* Direct bound symbol */
-++#define SYMINFO_FLG_PASSTHRU	0x0002	/* Pass-thru symbol for translator */
-++#define SYMINFO_FLG_COPY	0x0004	/* Symbol is a copy-reloc */
-++#define SYMINFO_FLG_LAZYLOAD	0x0008	/* Symbol bound to object to be lazy
-++					   loaded */
-++/* Syminfo version values.  */
-++#define SYMINFO_NONE		0
-++#define SYMINFO_CURRENT		1
-++#define SYMINFO_NUM		2
-++
-++
-++/* How to extract and insert information held in the st_info field.  */
-++
-++#define ELF32_ST_BIND(val)		(((unsigned char) (val)) >> 4)
-++#define ELF32_ST_TYPE(val)		((val) & 0xf)
-++#define ELF32_ST_INFO(bind, type)	(((bind) << 4) + ((type) & 0xf))
-++
-++/* Both Elf32_Sym and Elf64_Sym use the same one-byte st_info field.  */
-++#define ELF64_ST_BIND(val)		ELF32_ST_BIND (val)
-++#define ELF64_ST_TYPE(val)		ELF32_ST_TYPE (val)
-++#define ELF64_ST_INFO(bind, type)	ELF32_ST_INFO ((bind), (type))
-++
-++/* Legal values for ST_BIND subfield of st_info (symbol binding).  */
-++
-++#define STB_LOCAL	0		/* Local symbol */
-++#define STB_GLOBAL	1		/* Global symbol */
-++#define STB_WEAK	2		/* Weak symbol */
-++#define	STB_NUM		3		/* Number of defined types.  */
-++#define STB_LOOS	10		/* Start of OS-specific */
-++#define STB_GNU_UNIQUE	10		/* Unique symbol.  */
-++#define STB_HIOS	12		/* End of OS-specific */
-++#define STB_LOPROC	13		/* Start of processor-specific */
-++#define STB_HIPROC	15		/* End of processor-specific */
-++
-++/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
-++
-++#define STT_NOTYPE	0		/* Symbol type is unspecified */
-++#define STT_OBJECT	1		/* Symbol is a data object */
-++#define STT_FUNC	2		/* Symbol is a code object */
-++#define STT_SECTION	3		/* Symbol associated with a section */
-++#define STT_FILE	4		/* Symbol's name is file name */
-++#define STT_COMMON	5		/* Symbol is a common data object */
-++#define STT_TLS		6		/* Symbol is thread-local data object*/
-++#define	STT_NUM		7		/* Number of defined types.  */
-++#define STT_LOOS	10		/* Start of OS-specific */
-++#define STT_GNU_IFUNC	10		/* Symbol is indirect code object */
-++#define STT_HIOS	12		/* End of OS-specific */
-++#define STT_LOPROC	13		/* Start of processor-specific */
-++#define STT_HIPROC	15		/* End of processor-specific */
-++
-++
-++/* Symbol table indices are found in the hash buckets and chain table
-++   of a symbol hash table section.  This special index value indicates
-++   the end of a chain, meaning no further symbols are found in that bucket.  */
-++
-++#define STN_UNDEF	0		/* End of a chain.  */
-++
-++
-++/* How to extract and insert information held in the st_other field.  */
-++
-++#define ELF32_ST_VISIBILITY(o)	((o) & 0x03)
-++
-++/* For ELF64 the definitions are the same.  */
-++#define ELF64_ST_VISIBILITY(o)	ELF32_ST_VISIBILITY (o)
-++
-++/* Symbol visibility specification encoded in the st_other field.  */
-++#define STV_DEFAULT	0		/* Default symbol visibility rules */
-++#define STV_INTERNAL	1		/* Processor specific hidden class */
-++#define STV_HIDDEN	2		/* Sym unavailable in other modules */
-++#define STV_PROTECTED	3		/* Not preemptible, not exported */
-++
-++
-++/* Relocation table entry without addend (in section of type SHT_REL).  */
-++
-++typedef struct
-++{
-++  Elf32_Addr	r_offset;		/* Address */
-++  Elf32_Word	r_info;			/* Relocation type and symbol index */
-++} Elf32_Rel;
-++
-++/* I have seen two different definitions of the Elf64_Rel and
-++   Elf64_Rela structures, so we'll leave them out until Novell (or
-++   whoever) gets their act together.  */
-++/* The following, at least, is used on Sparc v9, MIPS, and Alpha.  */
-++
-++typedef struct
-++{
-++  Elf64_Addr	r_offset;		/* Address */
-++  Elf64_Xword	r_info;			/* Relocation type and symbol index */
-++} Elf64_Rel;
-++
-++/* Relocation table entry with addend (in section of type SHT_RELA).  */
-++
-++typedef struct
-++{
-++  Elf32_Addr	r_offset;		/* Address */
-++  Elf32_Word	r_info;			/* Relocation type and symbol index */
-++  Elf32_Sword	r_addend;		/* Addend */
-++} Elf32_Rela;
-++
-++typedef struct
-++{
-++  Elf64_Addr	r_offset;		/* Address */
-++  Elf64_Xword	r_info;			/* Relocation type and symbol index */
-++  Elf64_Sxword	r_addend;		/* Addend */
-++} Elf64_Rela;
-++
-++/* How to extract and insert information held in the r_info field.  */
-++
-++#define ELF32_R_SYM(val)		((val) >> 8)
-++#define ELF32_R_TYPE(val)		((val) & 0xff)
-++#define ELF32_R_INFO(sym, type)		(((sym) << 8) + ((type) & 0xff))
-++
-++#define ELF64_R_SYM(i)			((i) >> 32)
-++#define ELF64_R_TYPE(i)			((i) & 0xffffffff)
-++#define ELF64_R_INFO(sym,type)		((((Elf64_Xword) (sym)) << 32) + (type))
-++
-++/* Program segment header.  */
-++
-++typedef struct
-++{
-++  Elf32_Word	p_type;			/* Segment type */
-++  Elf32_Off	p_offset;		/* Segment file offset */
-++  Elf32_Addr	p_vaddr;		/* Segment virtual address */
-++  Elf32_Addr	p_paddr;		/* Segment physical address */
-++  Elf32_Word	p_filesz;		/* Segment size in file */
-++  Elf32_Word	p_memsz;		/* Segment size in memory */
-++  Elf32_Word	p_flags;		/* Segment flags */
-++  Elf32_Word	p_align;		/* Segment alignment */
-++} Elf32_Phdr;
-++
-++typedef struct
-++{
-++  Elf64_Word	p_type;			/* Segment type */
-++  Elf64_Word	p_flags;		/* Segment flags */
-++  Elf64_Off	p_offset;		/* Segment file offset */
-++  Elf64_Addr	p_vaddr;		/* Segment virtual address */
-++  Elf64_Addr	p_paddr;		/* Segment physical address */
-++  Elf64_Xword	p_filesz;		/* Segment size in file */
-++  Elf64_Xword	p_memsz;		/* Segment size in memory */
-++  Elf64_Xword	p_align;		/* Segment alignment */
-++} Elf64_Phdr;
-++
-++/* Special value for e_phnum.  This indicates that the real number of
-++   program headers is too large to fit into e_phnum.  Instead the real
-++   value is in the field sh_info of section 0.  */
-++
-++#define PN_XNUM		0xffff
-++
-++/* Legal values for p_type (segment type).  */
-++
-++#define	PT_NULL		0		/* Program header table entry unused */
-++#define PT_LOAD		1		/* Loadable program segment */
-++#define PT_DYNAMIC	2		/* Dynamic linking information */
-++#define PT_INTERP	3		/* Program interpreter */
-++#define PT_NOTE		4		/* Auxiliary information */
-++#define PT_SHLIB	5		/* Reserved */
-++#define PT_PHDR		6		/* Entry for header table itself */
-++#define PT_TLS		7		/* Thread-local storage segment */
-++#define	PT_NUM		8		/* Number of defined types */
-++#define PT_LOOS		0x60000000	/* Start of OS-specific */
-++#define PT_GNU_EH_FRAME	0x6474e550	/* GCC .eh_frame_hdr segment */
-++#define PT_GNU_STACK	0x6474e551	/* Indicates stack executability */
-++#define PT_GNU_RELRO	0x6474e552	/* Read-only after relocation */
-++#define PT_LOSUNW	0x6ffffffa
-++#define PT_SUNWBSS	0x6ffffffa	/* Sun Specific segment */
-++#define PT_SUNWSTACK	0x6ffffffb	/* Stack segment */
-++#define PT_HISUNW	0x6fffffff
-++#define PT_HIOS		0x6fffffff	/* End of OS-specific */
-++#define PT_LOPROC	0x70000000	/* Start of processor-specific */
-++#define PT_HIPROC	0x7fffffff	/* End of processor-specific */
-++
-++/* Legal values for p_flags (segment flags).  */
-++
-++#define PF_X		(1 << 0)	/* Segment is executable */
-++#define PF_W		(1 << 1)	/* Segment is writable */
-++#define PF_R		(1 << 2)	/* Segment is readable */
-++#define PF_MASKOS	0x0ff00000	/* OS-specific */
-++#define PF_MASKPROC	0xf0000000	/* Processor-specific */
-++
-++/* Legal values for note segment descriptor types for core files. */
-++
-++#define NT_PRSTATUS	1		/* Contains copy of prstatus struct */
-++#define NT_FPREGSET	2		/* Contains copy of fpregset struct */
-++#define NT_PRPSINFO	3		/* Contains copy of prpsinfo struct */
-++#define NT_PRXREG	4		/* Contains copy of prxregset struct */
-++#define NT_TASKSTRUCT	4		/* Contains copy of task structure */
-++#define NT_PLATFORM	5		/* String from sysinfo(SI_PLATFORM) */
-++#define NT_AUXV		6		/* Contains copy of auxv array */
-++#define NT_GWINDOWS	7		/* Contains copy of gwindows struct */
-++#define NT_ASRS		8		/* Contains copy of asrset struct */
-++#define NT_PSTATUS	10		/* Contains copy of pstatus struct */
-++#define NT_PSINFO	13		/* Contains copy of psinfo struct */
-++#define NT_PRCRED	14		/* Contains copy of prcred struct */
-++#define NT_UTSNAME	15		/* Contains copy of utsname struct */
-++#define NT_LWPSTATUS	16		/* Contains copy of lwpstatus struct */
-++#define NT_LWPSINFO	17		/* Contains copy of lwpinfo struct */
-++#define NT_PRFPXREG	20		/* Contains copy of fprxregset struct */
-++#define NT_PRXFPREG	0x46e62b7f	/* Contains copy of user_fxsr_struct */
-++#define NT_PPC_VMX	0x100		/* PowerPC Altivec/VMX registers */
-++#define NT_PPC_SPE	0x101		/* PowerPC SPE/EVR registers */
-++#define NT_PPC_VSX	0x102		/* PowerPC VSX registers */
-++#define NT_386_TLS	0x200		/* i386 TLS slots (struct user_desc) */
-++#define NT_386_IOPERM	0x201		/* x86 io permission bitmap (1=deny) */
-++#define NT_X86_XSTATE	0x202		/* x86 extended state using xsave */
-++
-++/* Legal values for the note segment descriptor types for object files.  */
-++
-++#define NT_VERSION	1		/* Contains a version string.  */
-++
-++
-++/* Dynamic section entry.  */
-++
-++typedef struct
-++{
-++  Elf32_Sword	d_tag;			/* Dynamic entry type */
-++  union
-++    {
-++      Elf32_Word d_val;			/* Integer value */
-++      Elf32_Addr d_ptr;			/* Address value */
-++    } d_un;
-++} Elf32_Dyn;
-++
-++typedef struct
-++{
-++  Elf64_Sxword	d_tag;			/* Dynamic entry type */
-++  union
-++    {
-++      Elf64_Xword d_val;		/* Integer value */
-++      Elf64_Addr d_ptr;			/* Address value */
-++    } d_un;
-++} Elf64_Dyn;
-++
-++/* Legal values for d_tag (dynamic entry type).  */
-++
-++#define DT_NULL		0		/* Marks end of dynamic section */
-++#define DT_NEEDED	1		/* Name of needed library */
-++#define DT_PLTRELSZ	2		/* Size in bytes of PLT relocs */
-++#define DT_PLTGOT	3		/* Processor defined value */
-++#define DT_HASH		4		/* Address of symbol hash table */
-++#define DT_STRTAB	5		/* Address of string table */
-++#define DT_SYMTAB	6		/* Address of symbol table */
-++#define DT_RELA		7		/* Address of Rela relocs */
-++#define DT_RELASZ	8		/* Total size of Rela relocs */
-++#define DT_RELAENT	9		/* Size of one Rela reloc */
-++#define DT_STRSZ	10		/* Size of string table */
-++#define DT_SYMENT	11		/* Size of one symbol table entry */
-++#define DT_INIT		12		/* Address of init function */
-++#define DT_FINI		13		/* Address of termination function */
-++#define DT_SONAME	14		/* Name of shared object */
-++#define DT_RPATH	15		/* Library search path (deprecated) */
-++#define DT_SYMBOLIC	16		/* Start symbol search here */
-++#define DT_REL		17		/* Address of Rel relocs */
-++#define DT_RELSZ	18		/* Total size of Rel relocs */
-++#define DT_RELENT	19		/* Size of one Rel reloc */
-++#define DT_PLTREL	20		/* Type of reloc in PLT */
-++#define DT_DEBUG	21		/* For debugging; unspecified */
-++#define DT_TEXTREL	22		/* Reloc might modify .text */
-++#define DT_JMPREL	23		/* Address of PLT relocs */
-++#define	DT_BIND_NOW	24		/* Process relocations of object */
-++#define	DT_INIT_ARRAY	25		/* Array with addresses of init fct */
-++#define	DT_FINI_ARRAY	26		/* Array with addresses of fini fct */
-++#define	DT_INIT_ARRAYSZ	27		/* Size in bytes of DT_INIT_ARRAY */
-++#define	DT_FINI_ARRAYSZ	28		/* Size in bytes of DT_FINI_ARRAY */
-++#define DT_RUNPATH	29		/* Library search path */
-++#define DT_FLAGS	30		/* Flags for the object being loaded */
-++#define DT_ENCODING	32		/* Start of encoded range */
-++#define DT_PREINIT_ARRAY 32		/* Array with addresses of preinit fct*/
-++#define DT_PREINIT_ARRAYSZ 33		/* size in bytes of DT_PREINIT_ARRAY */
-++#define	DT_NUM		34		/* Number used */
-++#define DT_LOOS		0x6000000d	/* Start of OS-specific */
-++#define DT_HIOS		0x6ffff000	/* End of OS-specific */
-++#define DT_LOPROC	0x70000000	/* Start of processor-specific */
-++#define DT_HIPROC	0x7fffffff	/* End of processor-specific */
-++#define	DT_PROCNUM	DT_MIPS_NUM	/* Most used by any processor */
-++
-++/* DT_* entries which fall between DT_VALRNGHI & DT_VALRNGLO use the
-++   Dyn.d_un.d_val field of the Elf*_Dyn structure.  This follows Sun's
-++   approach.  */
-++#define DT_VALRNGLO	0x6ffffd00
-++#define DT_GNU_PRELINKED 0x6ffffdf5	/* Prelinking timestamp */
-++#define DT_GNU_CONFLICTSZ 0x6ffffdf6	/* Size of conflict section */
-++#define DT_GNU_LIBLISTSZ 0x6ffffdf7	/* Size of library list */
-++#define DT_CHECKSUM	0x6ffffdf8
-++#define DT_PLTPADSZ	0x6ffffdf9
-++#define DT_MOVEENT	0x6ffffdfa
-++#define DT_MOVESZ	0x6ffffdfb
-++#define DT_FEATURE_1	0x6ffffdfc	/* Feature selection (DTF_*).  */
-++#define DT_POSFLAG_1	0x6ffffdfd	/* Flags for DT_* entries, effecting
-++					   the following DT_* entry.  */
-++#define DT_SYMINSZ	0x6ffffdfe	/* Size of syminfo table (in bytes) */
-++#define DT_SYMINENT	0x6ffffdff	/* Entry size of syminfo */
-++#define DT_VALRNGHI	0x6ffffdff
-++#define DT_VALTAGIDX(tag)	(DT_VALRNGHI - (tag))	/* Reverse order! */
-++#define DT_VALNUM 12
-++
-++/* DT_* entries which fall between DT_ADDRRNGHI & DT_ADDRRNGLO use the
-++   Dyn.d_un.d_ptr field of the Elf*_Dyn structure.
-++
-++   If any adjustment is made to the ELF object after it has been
-++   built these entries will need to be adjusted.  */
-++#define DT_ADDRRNGLO	0x6ffffe00
-++#define DT_GNU_HASH	0x6ffffef5	/* GNU-style hash table.  */
-++#define DT_TLSDESC_PLT	0x6ffffef6
-++#define DT_TLSDESC_GOT	0x6ffffef7
-++#define DT_GNU_CONFLICT	0x6ffffef8	/* Start of conflict section */
-++#define DT_GNU_LIBLIST	0x6ffffef9	/* Library list */
-++#define DT_CONFIG	0x6ffffefa	/* Configuration information.  */
-++#define DT_DEPAUDIT	0x6ffffefb	/* Dependency auditing.  */
-++#define DT_AUDIT	0x6ffffefc	/* Object auditing.  */
-++#define	DT_PLTPAD	0x6ffffefd	/* PLT padding.  */
-++#define	DT_MOVETAB	0x6ffffefe	/* Move table.  */
-++#define DT_SYMINFO	0x6ffffeff	/* Syminfo table.  */
-++#define DT_ADDRRNGHI	0x6ffffeff
-++#define DT_ADDRTAGIDX(tag)	(DT_ADDRRNGHI - (tag))	/* Reverse order! */
-++#define DT_ADDRNUM 11
-++
-++/* The versioning entry types.  The next are defined as part of the
-++   GNU extension.  */
-++#define DT_VERSYM	0x6ffffff0
-++
-++#define DT_RELACOUNT	0x6ffffff9
-++#define DT_RELCOUNT	0x6ffffffa
-++
-++/* These were chosen by Sun.  */
-++#define DT_FLAGS_1	0x6ffffffb	/* State flags, see DF_1_* below.  */
-++#define	DT_VERDEF	0x6ffffffc	/* Address of version definition
-++					   table */
-++#define	DT_VERDEFNUM	0x6ffffffd	/* Number of version definitions */
-++#define	DT_VERNEED	0x6ffffffe	/* Address of table with needed
-++					   versions */
-++#define	DT_VERNEEDNUM	0x6fffffff	/* Number of needed versions */
-++#define DT_VERSIONTAGIDX(tag)	(DT_VERNEEDNUM - (tag))	/* Reverse order! */
-++#define DT_VERSIONTAGNUM 16
-++
-++/* Sun added these machine-independent extensions in the "processor-specific"
-++   range.  Be compatible.  */
-++#define DT_AUXILIARY    0x7ffffffd      /* Shared object to load before self */
-++#define DT_FILTER       0x7fffffff      /* Shared object to get values from */
-++#define DT_EXTRATAGIDX(tag)	((Elf32_Word)-((Elf32_Sword) (tag) <<1>>1)-1)
-++#define DT_EXTRANUM	3
-++
-++/* Values of `d_un.d_val' in the DT_FLAGS entry.  */
-++#define DF_ORIGIN	0x00000001	/* Object may use DF_ORIGIN */
-++#define DF_SYMBOLIC	0x00000002	/* Symbol resolutions starts here */
-++#define DF_TEXTREL	0x00000004	/* Object contains text relocations */
-++#define DF_BIND_NOW	0x00000008	/* No lazy binding for this object */
-++#define DF_STATIC_TLS	0x00000010	/* Module uses the static TLS model */
-++
-++/* State flags selectable in the `d_un.d_val' element of the DT_FLAGS_1
-++   entry in the dynamic section.  */
-++#define DF_1_NOW	0x00000001	/* Set RTLD_NOW for this object.  */
-++#define DF_1_GLOBAL	0x00000002	/* Set RTLD_GLOBAL for this object.  */
-++#define DF_1_GROUP	0x00000004	/* Set RTLD_GROUP for this object.  */
-++#define DF_1_NODELETE	0x00000008	/* Set RTLD_NODELETE for this object.*/
-++#define DF_1_LOADFLTR	0x00000010	/* Trigger filtee loading at runtime.*/
-++#define DF_1_INITFIRST	0x00000020	/* Set RTLD_INITFIRST for this object*/
-++#define DF_1_NOOPEN	0x00000040	/* Set RTLD_NOOPEN for this object.  */
-++#define DF_1_ORIGIN	0x00000080	/* $ORIGIN must be handled.  */
-++#define DF_1_DIRECT	0x00000100	/* Direct binding enabled.  */
-++#define DF_1_TRANS	0x00000200
-++#define DF_1_INTERPOSE	0x00000400	/* Object is used to interpose.  */
-++#define DF_1_NODEFLIB	0x00000800	/* Ignore default lib search path.  */
-++#define DF_1_NODUMP	0x00001000	/* Object can't be dldump'ed.  */
-++#define DF_1_CONFALT	0x00002000	/* Configuration alternative created.*/
-++#define DF_1_ENDFILTEE	0x00004000	/* Filtee terminates filters search. */
-++#define	DF_1_DISPRELDNE	0x00008000	/* Disp reloc applied at build time. */
-++#define	DF_1_DISPRELPND	0x00010000	/* Disp reloc applied at run-time.  */
-++
-++/* Flags for the feature selection in DT_FEATURE_1.  */
-++#define DTF_1_PARINIT	0x00000001
-++#define DTF_1_CONFEXP	0x00000002
-++
-++/* Flags in the DT_POSFLAG_1 entry effecting only the next DT_* entry.  */
-++#define DF_P1_LAZYLOAD	0x00000001	/* Lazyload following object.  */
-++#define DF_P1_GROUPPERM	0x00000002	/* Symbols from next object are not
-++					   generally available.  */
-++
-++/* Version definition sections.  */
-++
-++typedef struct
-++{
-++  Elf32_Half	vd_version;		/* Version revision */
-++  Elf32_Half	vd_flags;		/* Version information */
-++  Elf32_Half	vd_ndx;			/* Version Index */
-++  Elf32_Half	vd_cnt;			/* Number of associated aux entries */
-++  Elf32_Word	vd_hash;		/* Version name hash value */
-++  Elf32_Word	vd_aux;			/* Offset in bytes to verdaux array */
-++  Elf32_Word	vd_next;		/* Offset in bytes to next verdef
-++					   entry */
-++} Elf32_Verdef;
-++
-++typedef struct
-++{
-++  Elf64_Half	vd_version;		/* Version revision */
-++  Elf64_Half	vd_flags;		/* Version information */
-++  Elf64_Half	vd_ndx;			/* Version Index */
-++  Elf64_Half	vd_cnt;			/* Number of associated aux entries */
-++  Elf64_Word	vd_hash;		/* Version name hash value */
-++  Elf64_Word	vd_aux;			/* Offset in bytes to verdaux array */
-++  Elf64_Word	vd_next;		/* Offset in bytes to next verdef
-++					   entry */
-++} Elf64_Verdef;
-++
-++
-++/* Legal values for vd_version (version revision).  */
-++#define VER_DEF_NONE	0		/* No version */
-++#define VER_DEF_CURRENT	1		/* Current version */
-++#define VER_DEF_NUM	2		/* Given version number */
-++
-++/* Legal values for vd_flags (version information flags).  */
-++#define VER_FLG_BASE	0x1		/* Version definition of file itself */
-++#define VER_FLG_WEAK	0x2		/* Weak version identifier */
-++
-++/* Versym symbol index values.  */
-++#define	VER_NDX_LOCAL		0	/* Symbol is local.  */
-++#define	VER_NDX_GLOBAL		1	/* Symbol is global.  */
-++#define	VER_NDX_LORESERVE	0xff00	/* Beginning of reserved entries.  */
-++#define	VER_NDX_ELIMINATE	0xff01	/* Symbol is to be eliminated.  */
-++
-++/* Auxialiary version information.  */
-++
-++typedef struct
-++{
-++  Elf32_Word	vda_name;		/* Version or dependency names */
-++  Elf32_Word	vda_next;		/* Offset in bytes to next verdaux
-++					   entry */
-++} Elf32_Verdaux;
-++
-++typedef struct
-++{
-++  Elf64_Word	vda_name;		/* Version or dependency names */
-++  Elf64_Word	vda_next;		/* Offset in bytes to next verdaux
-++					   entry */
-++} Elf64_Verdaux;
-++
-++
-++/* Version dependency section.  */
-++
-++typedef struct
-++{
-++  Elf32_Half	vn_version;		/* Version of structure */
-++  Elf32_Half	vn_cnt;			/* Number of associated aux entries */
-++  Elf32_Word	vn_file;		/* Offset of filename for this
-++					   dependency */
-++  Elf32_Word	vn_aux;			/* Offset in bytes to vernaux array */
-++  Elf32_Word	vn_next;		/* Offset in bytes to next verneed
-++					   entry */
-++} Elf32_Verneed;
-++
-++typedef struct
-++{
-++  Elf64_Half	vn_version;		/* Version of structure */
-++  Elf64_Half	vn_cnt;			/* Number of associated aux entries */
-++  Elf64_Word	vn_file;		/* Offset of filename for this
-++					   dependency */
-++  Elf64_Word	vn_aux;			/* Offset in bytes to vernaux array */
-++  Elf64_Word	vn_next;		/* Offset in bytes to next verneed
-++					   entry */
-++} Elf64_Verneed;
-++
-++
-++/* Legal values for vn_version (version revision).  */
-++#define VER_NEED_NONE	 0		/* No version */
-++#define VER_NEED_CURRENT 1		/* Current version */
-++#define VER_NEED_NUM	 2		/* Given version number */
-++
-++/* Auxiliary needed version information.  */
-++
-++typedef struct
-++{
-++  Elf32_Word	vna_hash;		/* Hash value of dependency name */
-++  Elf32_Half	vna_flags;		/* Dependency specific information */
-++  Elf32_Half	vna_other;		/* Unused */
-++  Elf32_Word	vna_name;		/* Dependency name string offset */
-++  Elf32_Word	vna_next;		/* Offset in bytes to next vernaux
-++					   entry */
-++} Elf32_Vernaux;
-++
-++typedef struct
-++{
-++  Elf64_Word	vna_hash;		/* Hash value of dependency name */
-++  Elf64_Half	vna_flags;		/* Dependency specific information */
-++  Elf64_Half	vna_other;		/* Unused */
-++  Elf64_Word	vna_name;		/* Dependency name string offset */
-++  Elf64_Word	vna_next;		/* Offset in bytes to next vernaux
-++					   entry */
-++} Elf64_Vernaux;
-++
-++
-++/* Legal values for vna_flags.  */
-++#define VER_FLG_WEAK	0x2		/* Weak version identifier */
-++
-++
-++/* Auxiliary vector.  */
-++
-++/* This vector is normally only used by the program interpreter.  The
-++   usual definition in an ABI supplement uses the name auxv_t.  The
-++   vector is not usually defined in a standard <elf.h> file, but it
-++   can't hurt.  We rename it to avoid conflicts.  The sizes of these
-++   types are an arrangement between the exec server and the program
-++   interpreter, so we don't fully specify them here.  */
-++
-++typedef struct
-++{
-++  uint32_t a_type;		/* Entry type */
-++  union
-++    {
-++      uint32_t a_val;		/* Integer value */
-++      /* We use to have pointer elements added here.  We cannot do that,
-++	 though, since it does not work when using 32-bit definitions
-++	 on 64-bit platforms and vice versa.  */
-++    } a_un;
-++} Elf32_auxv_t;
-++
-++typedef struct
-++{
-++  uint64_t a_type;		/* Entry type */
-++  union
-++    {
-++      uint64_t a_val;		/* Integer value */
-++      /* We use to have pointer elements added here.  We cannot do that,
-++	 though, since it does not work when using 32-bit definitions
-++	 on 64-bit platforms and vice versa.  */
-++    } a_un;
-++} Elf64_auxv_t;
-++
-++/* Legal values for a_type (entry type).  */
-++
-++#define AT_NULL		0		/* End of vector */
-++#define AT_IGNORE	1		/* Entry should be ignored */
-++#define AT_EXECFD	2		/* File descriptor of program */
-++#define AT_PHDR		3		/* Program headers for program */
-++#define AT_PHENT	4		/* Size of program header entry */
-++#define AT_PHNUM	5		/* Number of program headers */
-++#define AT_PAGESZ	6		/* System page size */
-++#define AT_BASE		7		/* Base address of interpreter */
-++#define AT_FLAGS	8		/* Flags */
-++#define AT_ENTRY	9		/* Entry point of program */
-++#define AT_NOTELF	10		/* Program is not ELF */
-++#define AT_UID		11		/* Real uid */
-++#define AT_EUID		12		/* Effective uid */
-++#define AT_GID		13		/* Real gid */
-++#define AT_EGID		14		/* Effective gid */
-++#define AT_CLKTCK	17		/* Frequency of times() */
-++
-++/* Some more special a_type values describing the hardware.  */
-++#define AT_PLATFORM	15		/* String identifying platform.  */
-++#define AT_HWCAP	16		/* Machine dependent hints about
-++					   processor capabilities.  */
-++
-++/* This entry gives some information about the FPU initialization
-++   performed by the kernel.  */
-++#define AT_FPUCW	18		/* Used FPU control word.  */
-++
-++/* Cache block sizes.  */
-++#define AT_DCACHEBSIZE	19		/* Data cache block size.  */
-++#define AT_ICACHEBSIZE	20		/* Instruction cache block size.  */
-++#define AT_UCACHEBSIZE	21		/* Unified cache block size.  */
-++
-++/* A special ignored value for PPC, used by the kernel to control the
-++   interpretation of the AUXV. Must be > 16.  */
-++#define AT_IGNOREPPC	22		/* Entry should be ignored.  */
-++
-++#define	AT_SECURE	23		/* Boolean, was exec setuid-like?  */
-++
-++#define AT_BASE_PLATFORM 24		/* String identifying real platforms.*/
-++
-++#define AT_RANDOM	25		/* Address of 16 random bytes.  */
-++
-++#define AT_EXECFN	31		/* Filename of executable.  */
-++
-++/* Pointer to the global system page used for system calls and other
-++   nice things.  */
-++#define AT_SYSINFO	32
-++#define AT_SYSINFO_EHDR	33
-++
-++/* Shapes of the caches.  Bits 0-3 contains associativity; bits 4-7 contains
-++   log2 of line size; mask those to get cache size.  */
-++#define AT_L1I_CACHESHAPE	34
-++#define AT_L1D_CACHESHAPE	35
-++#define AT_L2_CACHESHAPE	36
-++#define AT_L3_CACHESHAPE	37
-++
-++/* Note section contents.  Each entry in the note section begins with
-++   a header of a fixed form.  */
-++
-++typedef struct
-++{
-++  Elf32_Word n_namesz;			/* Length of the note's name.  */
-++  Elf32_Word n_descsz;			/* Length of the note's descriptor.  */
-++  Elf32_Word n_type;			/* Type of the note.  */
-++} Elf32_Nhdr;
-++
-++typedef struct
-++{
-++  Elf64_Word n_namesz;			/* Length of the note's name.  */
-++  Elf64_Word n_descsz;			/* Length of the note's descriptor.  */
-++  Elf64_Word n_type;			/* Type of the note.  */
-++} Elf64_Nhdr;
-++
-++/* Known names of notes.  */
-++
-++/* Solaris entries in the note section have this name.  */
-++#define ELF_NOTE_SOLARIS	"SUNW Solaris"
-++
-++/* Note entries for GNU systems have this name.  */
-++#define ELF_NOTE_GNU		"GNU"
-++
-++
-++/* Defined types of notes for Solaris.  */
-++
-++/* Value of descriptor (one word) is desired pagesize for the binary.  */
-++#define ELF_NOTE_PAGESIZE_HINT	1
-++
-++
-++/* Defined note types for GNU systems.  */
-++
-++/* ABI information.  The descriptor consists of words:
-++   word 0: OS descriptor
-++   word 1: major version of the ABI
-++   word 2: minor version of the ABI
-++   word 3: subminor version of the ABI
-++*/
-++#define NT_GNU_ABI_TAG	1
-++#define ELF_NOTE_ABI	NT_GNU_ABI_TAG /* Old name.  */
-++
-++/* Known OSes.  These values can appear in word 0 of an
-++   NT_GNU_ABI_TAG note section entry.  */
-++#define ELF_NOTE_OS_LINUX	0
-++#define ELF_NOTE_OS_GNU		1
-++#define ELF_NOTE_OS_SOLARIS2	2
-++#define ELF_NOTE_OS_FREEBSD	3
-++
-++/* Synthetic hwcap information.  The descriptor begins with two words:
-++   word 0: number of entries
-++   word 1: bitmask of enabled entries
-++   Then follow variable-length entries, one byte followed by a
-++   '\0'-terminated hwcap name string.  The byte gives the bit
-++   number to test if enabled, (1U << bit) & bitmask.  */
-++#define NT_GNU_HWCAP	2
-++
-++/* Build ID bits as generated by ld --build-id.
-++   The descriptor consists of any nonzero number of bytes.  */
-++#define NT_GNU_BUILD_ID	3
-++
-++/* Version note generated by GNU gold containing a version string.  */
-++#define NT_GNU_GOLD_VERSION	4
-++
-++
-++/* Move records.  */
-++typedef struct
-++{
-++  Elf32_Xword m_value;		/* Symbol value.  */
-++  Elf32_Word m_info;		/* Size and index.  */
-++  Elf32_Word m_poffset;		/* Symbol offset.  */
-++  Elf32_Half m_repeat;		/* Repeat count.  */
-++  Elf32_Half m_stride;		/* Stride info.  */
-++} Elf32_Move;
-++
-++typedef struct
-++{
-++  Elf64_Xword m_value;		/* Symbol value.  */
-++  Elf64_Xword m_info;		/* Size and index.  */
-++  Elf64_Xword m_poffset;	/* Symbol offset.  */
-++  Elf64_Half m_repeat;		/* Repeat count.  */
-++  Elf64_Half m_stride;		/* Stride info.  */
-++} Elf64_Move;
-++
-++/* Macro to construct move records.  */
-++#define ELF32_M_SYM(info)	((info) >> 8)
-++#define ELF32_M_SIZE(info)	((unsigned char) (info))
-++#define ELF32_M_INFO(sym, size)	(((sym) << 8) + (unsigned char) (size))
-++
-++#define ELF64_M_SYM(info)	ELF32_M_SYM (info)
-++#define ELF64_M_SIZE(info)	ELF32_M_SIZE (info)
-++#define ELF64_M_INFO(sym, size)	ELF32_M_INFO (sym, size)
-++
-++
-++/* Motorola 68k specific definitions.  */
-++
-++/* Values for Elf32_Ehdr.e_flags.  */
-++#define EF_CPU32	0x00810000
-++
-++/* m68k relocs.  */
-++
-++#define R_68K_NONE	0		/* No reloc */
-++#define R_68K_32	1		/* Direct 32 bit  */
-++#define R_68K_16	2		/* Direct 16 bit  */
-++#define R_68K_8		3		/* Direct 8 bit  */
-++#define R_68K_PC32	4		/* PC relative 32 bit */
-++#define R_68K_PC16	5		/* PC relative 16 bit */
-++#define R_68K_PC8	6		/* PC relative 8 bit */
-++#define R_68K_GOT32	7		/* 32 bit PC relative GOT entry */
-++#define R_68K_GOT16	8		/* 16 bit PC relative GOT entry */
-++#define R_68K_GOT8	9		/* 8 bit PC relative GOT entry */
-++#define R_68K_GOT32O	10		/* 32 bit GOT offset */
-++#define R_68K_GOT16O	11		/* 16 bit GOT offset */
-++#define R_68K_GOT8O	12		/* 8 bit GOT offset */
-++#define R_68K_PLT32	13		/* 32 bit PC relative PLT address */
-++#define R_68K_PLT16	14		/* 16 bit PC relative PLT address */
-++#define R_68K_PLT8	15		/* 8 bit PC relative PLT address */
-++#define R_68K_PLT32O	16		/* 32 bit PLT offset */
-++#define R_68K_PLT16O	17		/* 16 bit PLT offset */
-++#define R_68K_PLT8O	18		/* 8 bit PLT offset */
-++#define R_68K_COPY	19		/* Copy symbol at runtime */
-++#define R_68K_GLOB_DAT	20		/* Create GOT entry */
-++#define R_68K_JMP_SLOT	21		/* Create PLT entry */
-++#define R_68K_RELATIVE	22		/* Adjust by program base */
-++#define R_68K_TLS_GD32      25          /* 32 bit GOT offset for GD */
-++#define R_68K_TLS_GD16      26          /* 16 bit GOT offset for GD */
-++#define R_68K_TLS_GD8       27          /* 8 bit GOT offset for GD */
-++#define R_68K_TLS_LDM32     28          /* 32 bit GOT offset for LDM */
-++#define R_68K_TLS_LDM16     29          /* 16 bit GOT offset for LDM */
-++#define R_68K_TLS_LDM8      30          /* 8 bit GOT offset for LDM */
-++#define R_68K_TLS_LDO32     31          /* 32 bit module-relative offset */
-++#define R_68K_TLS_LDO16     32          /* 16 bit module-relative offset */
-++#define R_68K_TLS_LDO8      33          /* 8 bit module-relative offset */
-++#define R_68K_TLS_IE32      34          /* 32 bit GOT offset for IE */
-++#define R_68K_TLS_IE16      35          /* 16 bit GOT offset for IE */
-++#define R_68K_TLS_IE8       36          /* 8 bit GOT offset for IE */
-++#define R_68K_TLS_LE32      37          /* 32 bit offset relative to
-++					   static TLS block */
-++#define R_68K_TLS_LE16      38          /* 16 bit offset relative to
-++					   static TLS block */
-++#define R_68K_TLS_LE8       39          /* 8 bit offset relative to
-++					   static TLS block */
-++#define R_68K_TLS_DTPMOD32  40          /* 32 bit module number */
-++#define R_68K_TLS_DTPREL32  41          /* 32 bit module-relative offset */
-++#define R_68K_TLS_TPREL32   42          /* 32 bit TP-relative offset */
-++/* Keep this the last entry.  */
-++#define R_68K_NUM	43
-++
-++/* Intel 80386 specific definitions.  */
-++
-++/* i386 relocs.  */
-++
-++#define R_386_NONE	   0		/* No reloc */
-++#define R_386_32	   1		/* Direct 32 bit  */
-++#define R_386_PC32	   2		/* PC relative 32 bit */
-++#define R_386_GOT32	   3		/* 32 bit GOT entry */
-++#define R_386_PLT32	   4		/* 32 bit PLT address */
-++#define R_386_COPY	   5		/* Copy symbol at runtime */
-++#define R_386_GLOB_DAT	   6		/* Create GOT entry */
-++#define R_386_JMP_SLOT	   7		/* Create PLT entry */
-++#define R_386_RELATIVE	   8		/* Adjust by program base */
-++#define R_386_GOTOFF	   9		/* 32 bit offset to GOT */
-++#define R_386_GOTPC	   10		/* 32 bit PC relative offset to GOT */
-++#define R_386_32PLT	   11
-++#define R_386_TLS_TPOFF	   14		/* Offset in static TLS block */
-++#define R_386_TLS_IE	   15		/* Address of GOT entry for static TLS
-++					   block offset */
-++#define R_386_TLS_GOTIE	   16		/* GOT entry for static TLS block
-++					   offset */
-++#define R_386_TLS_LE	   17		/* Offset relative to static TLS
-++					   block */
-++#define R_386_TLS_GD	   18		/* Direct 32 bit for GNU version of
-++					   general dynamic thread local data */
-++#define R_386_TLS_LDM	   19		/* Direct 32 bit for GNU version of
-++					   local dynamic thread local data
-++					   in LE code */
-++#define R_386_16	   20
-++#define R_386_PC16	   21
-++#define R_386_8		   22
-++#define R_386_PC8	   23
-++#define R_386_TLS_GD_32	   24		/* Direct 32 bit for general dynamic
-++					   thread local data */
-++#define R_386_TLS_GD_PUSH  25		/* Tag for pushl in GD TLS code */
-++#define R_386_TLS_GD_CALL  26		/* Relocation for call to
-++					   __tls_get_addr() */
-++#define R_386_TLS_GD_POP   27		/* Tag for popl in GD TLS code */
-++#define R_386_TLS_LDM_32   28		/* Direct 32 bit for local dynamic
-++					   thread local data in LE code */
-++#define R_386_TLS_LDM_PUSH 29		/* Tag for pushl in LDM TLS code */
-++#define R_386_TLS_LDM_CALL 30		/* Relocation for call to
-++					   __tls_get_addr() in LDM code */
-++#define R_386_TLS_LDM_POP  31		/* Tag for popl in LDM TLS code */
-++#define R_386_TLS_LDO_32   32		/* Offset relative to TLS block */
-++#define R_386_TLS_IE_32	   33		/* GOT entry for negated static TLS
-++					   block offset */
-++#define R_386_TLS_LE_32	   34		/* Negated offset relative to static
-++					   TLS block */
-++#define R_386_TLS_DTPMOD32 35		/* ID of module containing symbol */
-++#define R_386_TLS_DTPOFF32 36		/* Offset in TLS block */
-++#define R_386_TLS_TPOFF32  37		/* Negated offset in static TLS block */
-++/* 38? */
-++#define R_386_TLS_GOTDESC  39		/* GOT offset for TLS descriptor.  */
-++#define R_386_TLS_DESC_CALL 40		/* Marker of call through TLS
-++					   descriptor for
-++					   relaxation.  */
-++#define R_386_TLS_DESC     41		/* TLS descriptor containing
-++					   pointer to code and to
-++					   argument, returning the TLS
-++					   offset for the symbol.  */
-++#define R_386_IRELATIVE	   42		/* Adjust indirectly by program base */
-++/* Keep this the last entry.  */
-++#define R_386_NUM	   43
-++
-++/* SUN SPARC specific definitions.  */
-++
-++/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
-++
-++#define STT_SPARC_REGISTER	13	/* Global register reserved to app. */
-++
-++/* Values for Elf64_Ehdr.e_flags.  */
-++
-++#define EF_SPARCV9_MM		3
-++#define EF_SPARCV9_TSO		0
-++#define EF_SPARCV9_PSO		1
-++#define EF_SPARCV9_RMO		2
-++#define EF_SPARC_LEDATA		0x800000 /* little endian data */
-++#define EF_SPARC_EXT_MASK	0xFFFF00
-++#define EF_SPARC_32PLUS		0x000100 /* generic V8+ features */
-++#define EF_SPARC_SUN_US1	0x000200 /* Sun UltraSPARC1 extensions */
-++#define EF_SPARC_HAL_R1		0x000400 /* HAL R1 extensions */
-++#define EF_SPARC_SUN_US3	0x000800 /* Sun UltraSPARCIII extensions */
-++
-++/* SPARC relocs.  */
-++
-++#define R_SPARC_NONE		0	/* No reloc */
-++#define R_SPARC_8		1	/* Direct 8 bit */
-++#define R_SPARC_16		2	/* Direct 16 bit */
-++#define R_SPARC_32		3	/* Direct 32 bit */
-++#define R_SPARC_DISP8		4	/* PC relative 8 bit */
-++#define R_SPARC_DISP16		5	/* PC relative 16 bit */
-++#define R_SPARC_DISP32		6	/* PC relative 32 bit */
-++#define R_SPARC_WDISP30		7	/* PC relative 30 bit shifted */
-++#define R_SPARC_WDISP22		8	/* PC relative 22 bit shifted */
-++#define R_SPARC_HI22		9	/* High 22 bit */
-++#define R_SPARC_22		10	/* Direct 22 bit */
-++#define R_SPARC_13		11	/* Direct 13 bit */
-++#define R_SPARC_LO10		12	/* Truncated 10 bit */
-++#define R_SPARC_GOT10		13	/* Truncated 10 bit GOT entry */
-++#define R_SPARC_GOT13		14	/* 13 bit GOT entry */
-++#define R_SPARC_GOT22		15	/* 22 bit GOT entry shifted */
-++#define R_SPARC_PC10		16	/* PC relative 10 bit truncated */
-++#define R_SPARC_PC22		17	/* PC relative 22 bit shifted */
-++#define R_SPARC_WPLT30		18	/* 30 bit PC relative PLT address */
-++#define R_SPARC_COPY		19	/* Copy symbol at runtime */
-++#define R_SPARC_GLOB_DAT	20	/* Create GOT entry */
-++#define R_SPARC_JMP_SLOT	21	/* Create PLT entry */
-++#define R_SPARC_RELATIVE	22	/* Adjust by program base */
-++#define R_SPARC_UA32		23	/* Direct 32 bit unaligned */
-++
-++/* Additional Sparc64 relocs.  */
-++
-++#define R_SPARC_PLT32		24	/* Direct 32 bit ref to PLT entry */
-++#define R_SPARC_HIPLT22		25	/* High 22 bit PLT entry */
-++#define R_SPARC_LOPLT10		26	/* Truncated 10 bit PLT entry */
-++#define R_SPARC_PCPLT32		27	/* PC rel 32 bit ref to PLT entry */
-++#define R_SPARC_PCPLT22		28	/* PC rel high 22 bit PLT entry */
-++#define R_SPARC_PCPLT10		29	/* PC rel trunc 10 bit PLT entry */
-++#define R_SPARC_10		30	/* Direct 10 bit */
-++#define R_SPARC_11		31	/* Direct 11 bit */
-++#define R_SPARC_64		32	/* Direct 64 bit */
-++#define R_SPARC_OLO10		33	/* 10bit with secondary 13bit addend */
-++#define R_SPARC_HH22		34	/* Top 22 bits of direct 64 bit */
-++#define R_SPARC_HM10		35	/* High middle 10 bits of ... */
-++#define R_SPARC_LM22		36	/* Low middle 22 bits of ... */
-++#define R_SPARC_PC_HH22		37	/* Top 22 bits of pc rel 64 bit */
-++#define R_SPARC_PC_HM10		38	/* High middle 10 bit of ... */
-++#define R_SPARC_PC_LM22		39	/* Low miggle 22 bits of ... */
-++#define R_SPARC_WDISP16		40	/* PC relative 16 bit shifted */
-++#define R_SPARC_WDISP19		41	/* PC relative 19 bit shifted */
-++#define R_SPARC_GLOB_JMP	42	/* was part of v9 ABI but was removed */
-++#define R_SPARC_7		43	/* Direct 7 bit */
-++#define R_SPARC_5		44	/* Direct 5 bit */
-++#define R_SPARC_6		45	/* Direct 6 bit */
-++#define R_SPARC_DISP64		46	/* PC relative 64 bit */
-++#define R_SPARC_PLT64		47	/* Direct 64 bit ref to PLT entry */
-++#define R_SPARC_HIX22		48	/* High 22 bit complemented */
-++#define R_SPARC_LOX10		49	/* Truncated 11 bit complemented */
-++#define R_SPARC_H44		50	/* Direct high 12 of 44 bit */
-++#define R_SPARC_M44		51	/* Direct mid 22 of 44 bit */
-++#define R_SPARC_L44		52	/* Direct low 10 of 44 bit */
-++#define R_SPARC_REGISTER	53	/* Global register usage */
-++#define R_SPARC_UA64		54	/* Direct 64 bit unaligned */
-++#define R_SPARC_UA16		55	/* Direct 16 bit unaligned */
-++#define R_SPARC_TLS_GD_HI22	56
-++#define R_SPARC_TLS_GD_LO10	57
-++#define R_SPARC_TLS_GD_ADD	58
-++#define R_SPARC_TLS_GD_CALL	59
-++#define R_SPARC_TLS_LDM_HI22	60
-++#define R_SPARC_TLS_LDM_LO10	61
-++#define R_SPARC_TLS_LDM_ADD	62
-++#define R_SPARC_TLS_LDM_CALL	63
-++#define R_SPARC_TLS_LDO_HIX22	64
-++#define R_SPARC_TLS_LDO_LOX10	65
-++#define R_SPARC_TLS_LDO_ADD	66
-++#define R_SPARC_TLS_IE_HI22	67
-++#define R_SPARC_TLS_IE_LO10	68
-++#define R_SPARC_TLS_IE_LD	69
-++#define R_SPARC_TLS_IE_LDX	70
-++#define R_SPARC_TLS_IE_ADD	71
-++#define R_SPARC_TLS_LE_HIX22	72
-++#define R_SPARC_TLS_LE_LOX10	73
-++#define R_SPARC_TLS_DTPMOD32	74
-++#define R_SPARC_TLS_DTPMOD64	75
-++#define R_SPARC_TLS_DTPOFF32	76
-++#define R_SPARC_TLS_DTPOFF64	77
-++#define R_SPARC_TLS_TPOFF32	78
-++#define R_SPARC_TLS_TPOFF64	79
-++#define R_SPARC_GOTDATA_HIX22	80
-++#define R_SPARC_GOTDATA_LOX10	81
-++#define R_SPARC_GOTDATA_OP_HIX22	82
-++#define R_SPARC_GOTDATA_OP_LOX10	83
-++#define R_SPARC_GOTDATA_OP	84
-++#define R_SPARC_H34		85
-++#define R_SPARC_SIZE32		86
-++#define R_SPARC_SIZE64		87
-++#define R_SPARC_WDISP10		88
-++#define R_SPARC_JMP_IREL	248
-++#define R_SPARC_IRELATIVE	249
-++#define R_SPARC_GNU_VTINHERIT	250
-++#define R_SPARC_GNU_VTENTRY	251
-++#define R_SPARC_REV32		252
-++/* Keep this the last entry.  */
-++#define R_SPARC_NUM		253
-++
-++/* For Sparc64, legal values for d_tag of Elf64_Dyn.  */
-++
-++#define DT_SPARC_REGISTER 0x70000001
-++#define DT_SPARC_NUM	2
-++
-++/* MIPS R3000 specific definitions.  */
-++
-++/* Legal values for e_flags field of Elf32_Ehdr.  */
-++
-++#define EF_MIPS_NOREORDER   1		/* A .noreorder directive was used */
-++#define EF_MIPS_PIC	    2		/* Contains PIC code */
-++#define EF_MIPS_CPIC	    4		/* Uses PIC calling sequence */
-++#define EF_MIPS_XGOT	    8
-++#define EF_MIPS_64BIT_WHIRL 16
-++#define EF_MIPS_ABI2	    32
-++#define EF_MIPS_ABI_ON32    64
-++#define EF_MIPS_ARCH	    0xf0000000	/* MIPS architecture level */
-++
-++/* Legal values for MIPS architecture level.  */
-++
-++#define EF_MIPS_ARCH_1	    0x00000000	/* -mips1 code.  */
-++#define EF_MIPS_ARCH_2	    0x10000000	/* -mips2 code.  */
-++#define EF_MIPS_ARCH_3	    0x20000000	/* -mips3 code.  */
-++#define EF_MIPS_ARCH_4	    0x30000000	/* -mips4 code.  */
-++#define EF_MIPS_ARCH_5	    0x40000000	/* -mips5 code.  */
-++#define EF_MIPS_ARCH_32	    0x60000000	/* MIPS32 code.  */
-++#define EF_MIPS_ARCH_64	    0x70000000	/* MIPS64 code.  */
-++
-++/* The following are non-official names and should not be used.  */
-++
-++#define E_MIPS_ARCH_1	  0x00000000	/* -mips1 code.  */
-++#define E_MIPS_ARCH_2	  0x10000000	/* -mips2 code.  */
-++#define E_MIPS_ARCH_3	  0x20000000	/* -mips3 code.  */
-++#define E_MIPS_ARCH_4	  0x30000000	/* -mips4 code.  */
-++#define E_MIPS_ARCH_5	  0x40000000	/* -mips5 code.  */
-++#define E_MIPS_ARCH_32	  0x60000000	/* MIPS32 code.  */
-++#define E_MIPS_ARCH_64	  0x70000000	/* MIPS64 code.  */
-++
-++/* Special section indices.  */
-++
-++#define SHN_MIPS_ACOMMON    0xff00	/* Allocated common symbols */
-++#define SHN_MIPS_TEXT	    0xff01	/* Allocated test symbols.  */
-++#define SHN_MIPS_DATA	    0xff02	/* Allocated data symbols.  */
-++#define SHN_MIPS_SCOMMON    0xff03	/* Small common symbols */
-++#define SHN_MIPS_SUNDEFINED 0xff04	/* Small undefined symbols */
-++
-++/* Legal values for sh_type field of Elf32_Shdr.  */
-++
-++#define SHT_MIPS_LIBLIST       0x70000000 /* Shared objects used in link */
-++#define SHT_MIPS_MSYM	       0x70000001
-++#define SHT_MIPS_CONFLICT      0x70000002 /* Conflicting symbols */
-++#define SHT_MIPS_GPTAB	       0x70000003 /* Global data area sizes */
-++#define SHT_MIPS_UCODE	       0x70000004 /* Reserved for SGI/MIPS compilers */
-++#define SHT_MIPS_DEBUG	       0x70000005 /* MIPS ECOFF debugging information*/
-++#define SHT_MIPS_REGINFO       0x70000006 /* Register usage information */
-++#define SHT_MIPS_PACKAGE       0x70000007
-++#define SHT_MIPS_PACKSYM       0x70000008
-++#define SHT_MIPS_RELD	       0x70000009
-++#define SHT_MIPS_IFACE         0x7000000b
-++#define SHT_MIPS_CONTENT       0x7000000c
-++#define SHT_MIPS_OPTIONS       0x7000000d /* Miscellaneous options.  */
-++#define SHT_MIPS_SHDR	       0x70000010
-++#define SHT_MIPS_FDESC	       0x70000011
-++#define SHT_MIPS_EXTSYM	       0x70000012
-++#define SHT_MIPS_DENSE	       0x70000013
-++#define SHT_MIPS_PDESC	       0x70000014
-++#define SHT_MIPS_LOCSYM	       0x70000015
-++#define SHT_MIPS_AUXSYM	       0x70000016
-++#define SHT_MIPS_OPTSYM	       0x70000017
-++#define SHT_MIPS_LOCSTR	       0x70000018
-++#define SHT_MIPS_LINE	       0x70000019
-++#define SHT_MIPS_RFDESC	       0x7000001a
-++#define SHT_MIPS_DELTASYM      0x7000001b
-++#define SHT_MIPS_DELTAINST     0x7000001c
-++#define SHT_MIPS_DELTACLASS    0x7000001d
-++#define SHT_MIPS_DWARF         0x7000001e /* DWARF debugging information.  */
-++#define SHT_MIPS_DELTADECL     0x7000001f
-++#define SHT_MIPS_SYMBOL_LIB    0x70000020
-++#define SHT_MIPS_EVENTS	       0x70000021 /* Event section.  */
-++#define SHT_MIPS_TRANSLATE     0x70000022
-++#define SHT_MIPS_PIXIE	       0x70000023
-++#define SHT_MIPS_XLATE	       0x70000024
-++#define SHT_MIPS_XLATE_DEBUG   0x70000025
-++#define SHT_MIPS_WHIRL	       0x70000026
-++#define SHT_MIPS_EH_REGION     0x70000027
-++#define SHT_MIPS_XLATE_OLD     0x70000028
-++#define SHT_MIPS_PDR_EXCEPTION 0x70000029
-++
-++/* Legal values for sh_flags field of Elf32_Shdr.  */
-++
-++#define SHF_MIPS_GPREL	 0x10000000	/* Must be part of global data area */
-++#define SHF_MIPS_MERGE	 0x20000000
-++#define SHF_MIPS_ADDR	 0x40000000
-++#define SHF_MIPS_STRINGS 0x80000000
-++#define SHF_MIPS_NOSTRIP 0x08000000
-++#define SHF_MIPS_LOCAL	 0x04000000
-++#define SHF_MIPS_NAMES	 0x02000000
-++#define SHF_MIPS_NODUPE	 0x01000000
-++
-++
-++/* Symbol tables.  */
-++
-++/* MIPS specific values for `st_other'.  */
-++#define STO_MIPS_DEFAULT		0x0
-++#define STO_MIPS_INTERNAL		0x1
-++#define STO_MIPS_HIDDEN			0x2
-++#define STO_MIPS_PROTECTED		0x3
-++#define STO_MIPS_PLT			0x8
-++#define STO_MIPS_SC_ALIGN_UNUSED	0xff
-++
-++/* MIPS specific values for `st_info'.  */
-++#define STB_MIPS_SPLIT_COMMON		13
-++
-++/* Entries found in sections of type SHT_MIPS_GPTAB.  */
-++
-++typedef union
-++{
-++  struct
-++    {
-++      Elf32_Word gt_current_g_value;	/* -G value used for compilation */
-++      Elf32_Word gt_unused;		/* Not used */
-++    } gt_header;			/* First entry in section */
-++  struct
-++    {
-++      Elf32_Word gt_g_value;		/* If this value were used for -G */
-++      Elf32_Word gt_bytes;		/* This many bytes would be used */
-++    } gt_entry;				/* Subsequent entries in section */
-++} Elf32_gptab;
-++
-++/* Entry found in sections of type SHT_MIPS_REGINFO.  */
-++
-++typedef struct
-++{
-++  Elf32_Word	ri_gprmask;		/* General registers used */
-++  Elf32_Word	ri_cprmask[4];		/* Coprocessor registers used */
-++  Elf32_Sword	ri_gp_value;		/* $gp register value */
-++} Elf32_RegInfo;
-++
-++/* Entries found in sections of type SHT_MIPS_OPTIONS.  */
-++
-++typedef struct
-++{
-++  unsigned char kind;		/* Determines interpretation of the
-++				   variable part of descriptor.  */
-++  unsigned char size;		/* Size of descriptor, including header.  */
-++  Elf32_Section section;	/* Section header index of section affected,
-++				   0 for global options.  */
-++  Elf32_Word info;		/* Kind-specific information.  */
-++} Elf_Options;
-++
-++/* Values for `kind' field in Elf_Options.  */
-++
-++#define ODK_NULL	0	/* Undefined.  */
-++#define ODK_REGINFO	1	/* Register usage information.  */
-++#define ODK_EXCEPTIONS	2	/* Exception processing options.  */
-++#define ODK_PAD		3	/* Section padding options.  */
-++#define ODK_HWPATCH	4	/* Hardware workarounds performed */
-++#define ODK_FILL	5	/* record the fill value used by the linker. */
-++#define ODK_TAGS	6	/* reserve space for desktop tools to write. */
-++#define ODK_HWAND	7	/* HW workarounds.  'AND' bits when merging. */
-++#define ODK_HWOR	8	/* HW workarounds.  'OR' bits when merging.  */
-++
-++/* Values for `info' in Elf_Options for ODK_EXCEPTIONS entries.  */
-++
-++#define OEX_FPU_MIN	0x1f	/* FPE's which MUST be enabled.  */
-++#define OEX_FPU_MAX	0x1f00	/* FPE's which MAY be enabled.  */
-++#define OEX_PAGE0	0x10000	/* page zero must be mapped.  */
-++#define OEX_SMM		0x20000	/* Force sequential memory mode?  */
-++#define OEX_FPDBUG	0x40000	/* Force floating point debug mode?  */
-++#define OEX_PRECISEFP	OEX_FPDBUG
-++#define OEX_DISMISS	0x80000	/* Dismiss invalid address faults?  */
-++
-++#define OEX_FPU_INVAL	0x10
-++#define OEX_FPU_DIV0	0x08
-++#define OEX_FPU_OFLO	0x04
-++#define OEX_FPU_UFLO	0x02
-++#define OEX_FPU_INEX	0x01
-++
-++/* Masks for `info' in Elf_Options for an ODK_HWPATCH entry.  */
-++
-++#define OHW_R4KEOP	0x1	/* R4000 end-of-page patch.  */
-++#define OHW_R8KPFETCH	0x2	/* may need R8000 prefetch patch.  */
-++#define OHW_R5KEOP	0x4	/* R5000 end-of-page patch.  */
-++#define OHW_R5KCVTL	0x8	/* R5000 cvt.[ds].l bug.  clean=1.  */
-++
-++#define OPAD_PREFIX	0x1
-++#define OPAD_POSTFIX	0x2
-++#define OPAD_SYMBOL	0x4
-++
-++/* Entry found in `.options' section.  */
-++
-++typedef struct
-++{
-++  Elf32_Word hwp_flags1;	/* Extra flags.  */
-++  Elf32_Word hwp_flags2;	/* Extra flags.  */
-++} Elf_Options_Hw;
-++
-++/* Masks for `info' in ElfOptions for ODK_HWAND and ODK_HWOR entries.  */
-++
-++#define OHWA0_R4KEOP_CHECKED	0x00000001
-++#define OHWA1_R4KEOP_CLEAN	0x00000002
-++
-++/* MIPS relocs.  */
-++
-++#define R_MIPS_NONE		0	/* No reloc */
-++#define R_MIPS_16		1	/* Direct 16 bit */
-++#define R_MIPS_32		2	/* Direct 32 bit */
-++#define R_MIPS_REL32		3	/* PC relative 32 bit */
-++#define R_MIPS_26		4	/* Direct 26 bit shifted */
-++#define R_MIPS_HI16		5	/* High 16 bit */
-++#define R_MIPS_LO16		6	/* Low 16 bit */
-++#define R_MIPS_GPREL16		7	/* GP relative 16 bit */
-++#define R_MIPS_LITERAL		8	/* 16 bit literal entry */
-++#define R_MIPS_GOT16		9	/* 16 bit GOT entry */
-++#define R_MIPS_PC16		10	/* PC relative 16 bit */
-++#define R_MIPS_CALL16		11	/* 16 bit GOT entry for function */
-++#define R_MIPS_GPREL32		12	/* GP relative 32 bit */
-++
-++#define R_MIPS_SHIFT5		16
-++#define R_MIPS_SHIFT6		17
-++#define R_MIPS_64		18
-++#define R_MIPS_GOT_DISP		19
-++#define R_MIPS_GOT_PAGE		20
-++#define R_MIPS_GOT_OFST		21
-++#define R_MIPS_GOT_HI16		22
-++#define R_MIPS_GOT_LO16		23
-++#define R_MIPS_SUB		24
-++#define R_MIPS_INSERT_A		25
-++#define R_MIPS_INSERT_B		26
-++#define R_MIPS_DELETE		27
-++#define R_MIPS_HIGHER		28
-++#define R_MIPS_HIGHEST		29
-++#define R_MIPS_CALL_HI16	30
-++#define R_MIPS_CALL_LO16	31
-++#define R_MIPS_SCN_DISP		32
-++#define R_MIPS_REL16		33
-++#define R_MIPS_ADD_IMMEDIATE	34
-++#define R_MIPS_PJUMP		35
-++#define R_MIPS_RELGOT		36
-++#define R_MIPS_JALR		37
-++#define R_MIPS_TLS_DTPMOD32	38	/* Module number 32 bit */
-++#define R_MIPS_TLS_DTPREL32	39	/* Module-relative offset 32 bit */
-++#define R_MIPS_TLS_DTPMOD64	40	/* Module number 64 bit */
-++#define R_MIPS_TLS_DTPREL64	41	/* Module-relative offset 64 bit */
-++#define R_MIPS_TLS_GD		42	/* 16 bit GOT offset for GD */
-++#define R_MIPS_TLS_LDM		43	/* 16 bit GOT offset for LDM */
-++#define R_MIPS_TLS_DTPREL_HI16	44	/* Module-relative offset, high 16 bits */
-++#define R_MIPS_TLS_DTPREL_LO16	45	/* Module-relative offset, low 16 bits */
-++#define R_MIPS_TLS_GOTTPREL	46	/* 16 bit GOT offset for IE */
-++#define R_MIPS_TLS_TPREL32	47	/* TP-relative offset, 32 bit */
-++#define R_MIPS_TLS_TPREL64	48	/* TP-relative offset, 64 bit */
-++#define R_MIPS_TLS_TPREL_HI16	49	/* TP-relative offset, high 16 bits */
-++#define R_MIPS_TLS_TPREL_LO16	50	/* TP-relative offset, low 16 bits */
-++#define R_MIPS_GLOB_DAT		51
-++#define R_MIPS_COPY		126
-++#define R_MIPS_JUMP_SLOT        127
-++/* Keep this the last entry.  */
-++#define R_MIPS_NUM		128
-++
-++/* Legal values for p_type field of Elf32_Phdr.  */
-++
-++#define PT_MIPS_REGINFO	0x70000000	/* Register usage information */
-++#define PT_MIPS_RTPROC  0x70000001	/* Runtime procedure table. */
-++#define PT_MIPS_OPTIONS 0x70000002
-++
-++/* Special program header types.  */
-++
-++#define PF_MIPS_LOCAL	0x10000000
-++
-++/* Legal values for d_tag field of Elf32_Dyn.  */
-++
-++#define DT_MIPS_RLD_VERSION  0x70000001	/* Runtime linker interface version */
-++#define DT_MIPS_TIME_STAMP   0x70000002	/* Timestamp */
-++#define DT_MIPS_ICHECKSUM    0x70000003	/* Checksum */
-++#define DT_MIPS_IVERSION     0x70000004	/* Version string (string tbl index) */
-++#define DT_MIPS_FLAGS	     0x70000005	/* Flags */
-++#define DT_MIPS_BASE_ADDRESS 0x70000006	/* Base address */
-++#define DT_MIPS_MSYM	     0x70000007
-++#define DT_MIPS_CONFLICT     0x70000008	/* Address of CONFLICT section */
-++#define DT_MIPS_LIBLIST	     0x70000009	/* Address of LIBLIST section */
-++#define DT_MIPS_LOCAL_GOTNO  0x7000000a	/* Number of local GOT entries */
-++#define DT_MIPS_CONFLICTNO   0x7000000b	/* Number of CONFLICT entries */
-++#define DT_MIPS_LIBLISTNO    0x70000010	/* Number of LIBLIST entries */
-++#define DT_MIPS_SYMTABNO     0x70000011	/* Number of DYNSYM entries */
-++#define DT_MIPS_UNREFEXTNO   0x70000012	/* First external DYNSYM */
-++#define DT_MIPS_GOTSYM	     0x70000013	/* First GOT entry in DYNSYM */
-++#define DT_MIPS_HIPAGENO     0x70000014	/* Number of GOT page table entries */
-++#define DT_MIPS_RLD_MAP	     0x70000016	/* Address of run time loader map.  */
-++#define DT_MIPS_DELTA_CLASS  0x70000017	/* Delta C++ class definition.  */
-++#define DT_MIPS_DELTA_CLASS_NO    0x70000018 /* Number of entries in
-++						DT_MIPS_DELTA_CLASS.  */
-++#define DT_MIPS_DELTA_INSTANCE    0x70000019 /* Delta C++ class instances.  */
-++#define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a /* Number of entries in
-++						DT_MIPS_DELTA_INSTANCE.  */
-++#define DT_MIPS_DELTA_RELOC  0x7000001b /* Delta relocations.  */
-++#define DT_MIPS_DELTA_RELOC_NO 0x7000001c /* Number of entries in
-++					     DT_MIPS_DELTA_RELOC.  */
-++#define DT_MIPS_DELTA_SYM    0x7000001d /* Delta symbols that Delta
-++					   relocations refer to.  */
-++#define DT_MIPS_DELTA_SYM_NO 0x7000001e /* Number of entries in
-++					   DT_MIPS_DELTA_SYM.  */
-++#define DT_MIPS_DELTA_CLASSSYM 0x70000020 /* Delta symbols that hold the
-++					     class declaration.  */
-++#define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021 /* Number of entries in
-++						DT_MIPS_DELTA_CLASSSYM.  */
-++#define DT_MIPS_CXX_FLAGS    0x70000022 /* Flags indicating for C++ flavor.  */
-++#define DT_MIPS_PIXIE_INIT   0x70000023
-++#define DT_MIPS_SYMBOL_LIB   0x70000024
-++#define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025
-++#define DT_MIPS_LOCAL_GOTIDX 0x70000026
-++#define DT_MIPS_HIDDEN_GOTIDX 0x70000027
-++#define DT_MIPS_PROTECTED_GOTIDX 0x70000028
-++#define DT_MIPS_OPTIONS	     0x70000029 /* Address of .options.  */
-++#define DT_MIPS_INTERFACE    0x7000002a /* Address of .interface.  */
-++#define DT_MIPS_DYNSTR_ALIGN 0x7000002b
-++#define DT_MIPS_INTERFACE_SIZE 0x7000002c /* Size of the .interface section. */
-++#define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d /* Address of rld_text_rsolve
-++						    function stored in GOT.  */
-++#define DT_MIPS_PERF_SUFFIX  0x7000002e /* Default suffix of dso to be added
-++					   by rld on dlopen() calls.  */
-++#define DT_MIPS_COMPACT_SIZE 0x7000002f /* (O32)Size of compact rel section. */
-++#define DT_MIPS_GP_VALUE     0x70000030 /* GP value for aux GOTs.  */
-++#define DT_MIPS_AUX_DYNAMIC  0x70000031 /* Address of aux .dynamic.  */
-++/* The address of .got.plt in an executable using the new non-PIC ABI.  */
-++#define DT_MIPS_PLTGOT	     0x70000032
-++/* The base of the PLT in an executable using the new non-PIC ABI if that
-++   PLT is writable.  For a non-writable PLT, this is omitted or has a zero
-++   value.  */
-++#define DT_MIPS_RWPLT        0x70000034
-++#define DT_MIPS_NUM	     0x35
-++
-++/* Legal values for DT_MIPS_FLAGS Elf32_Dyn entry.  */
-++
-++#define RHF_NONE		   0		/* No flags */
-++#define RHF_QUICKSTART		   (1 << 0)	/* Use quickstart */
-++#define RHF_NOTPOT		   (1 << 1)	/* Hash size not power of 2 */
-++#define RHF_NO_LIBRARY_REPLACEMENT (1 << 2)	/* Ignore LD_LIBRARY_PATH */
-++#define RHF_NO_MOVE		   (1 << 3)
-++#define RHF_SGI_ONLY		   (1 << 4)
-++#define RHF_GUARANTEE_INIT	   (1 << 5)
-++#define RHF_DELTA_C_PLUS_PLUS	   (1 << 6)
-++#define RHF_GUARANTEE_START_INIT   (1 << 7)
-++#define RHF_PIXIE		   (1 << 8)
-++#define RHF_DEFAULT_DELAY_LOAD	   (1 << 9)
-++#define RHF_REQUICKSTART	   (1 << 10)
-++#define RHF_REQUICKSTARTED	   (1 << 11)
-++#define RHF_CORD		   (1 << 12)
-++#define RHF_NO_UNRES_UNDEF	   (1 << 13)
-++#define RHF_RLD_ORDER_SAFE	   (1 << 14)
-++
-++/* Entries found in sections of type SHT_MIPS_LIBLIST.  */
-++
-++typedef struct
-++{
-++  Elf32_Word l_name;		/* Name (string table index) */
-++  Elf32_Word l_time_stamp;	/* Timestamp */
-++  Elf32_Word l_checksum;	/* Checksum */
-++  Elf32_Word l_version;		/* Interface version */
-++  Elf32_Word l_flags;		/* Flags */
-++} Elf32_Lib;
-++
-++typedef struct
-++{
-++  Elf64_Word l_name;		/* Name (string table index) */
-++  Elf64_Word l_time_stamp;	/* Timestamp */
-++  Elf64_Word l_checksum;	/* Checksum */
-++  Elf64_Word l_version;		/* Interface version */
-++  Elf64_Word l_flags;		/* Flags */
-++} Elf64_Lib;
-++
-++
-++/* Legal values for l_flags.  */
-++
-++#define LL_NONE		  0
-++#define LL_EXACT_MATCH	  (1 << 0)	/* Require exact match */
-++#define LL_IGNORE_INT_VER (1 << 1)	/* Ignore interface version */
-++#define LL_REQUIRE_MINOR  (1 << 2)
-++#define LL_EXPORTS	  (1 << 3)
-++#define LL_DELAY_LOAD	  (1 << 4)
-++#define LL_DELTA	  (1 << 5)
-++
-++/* Entries found in sections of type SHT_MIPS_CONFLICT.  */
-++
-++typedef Elf32_Addr Elf32_Conflict;
-++
-++
-++/* HPPA specific definitions.  */
-++
-++/* Legal values for e_flags field of Elf32_Ehdr.  */
-++
-++#define EF_PARISC_TRAPNIL	0x00010000 /* Trap nil pointer dereference.  */
-++#define EF_PARISC_EXT		0x00020000 /* Program uses arch. extensions. */
-++#define EF_PARISC_LSB		0x00040000 /* Program expects little endian. */
-++#define EF_PARISC_WIDE		0x00080000 /* Program expects wide mode.  */
-++#define EF_PARISC_NO_KABP	0x00100000 /* No kernel assisted branch
-++					      prediction.  */
-++#define EF_PARISC_LAZYSWAP	0x00400000 /* Allow lazy swapping.  */
-++#define EF_PARISC_ARCH		0x0000ffff /* Architecture version.  */
-++
-++/* Defined values for `e_flags & EF_PARISC_ARCH' are:  */
-++
-++#define EFA_PARISC_1_0		    0x020b /* PA-RISC 1.0 big-endian.  */
-++#define EFA_PARISC_1_1		    0x0210 /* PA-RISC 1.1 big-endian.  */
-++#define EFA_PARISC_2_0		    0x0214 /* PA-RISC 2.0 big-endian.  */
-++
-++/* Additional section indeces.  */
-++
-++#define SHN_PARISC_ANSI_COMMON	0xff00	   /* Section for tenatively declared
-++					      symbols in ANSI C.  */
-++#define SHN_PARISC_HUGE_COMMON	0xff01	   /* Common blocks in huge model.  */
-++
-++/* Legal values for sh_type field of Elf32_Shdr.  */
-++
-++#define SHT_PARISC_EXT		0x70000000 /* Contains product specific ext. */
-++#define SHT_PARISC_UNWIND	0x70000001 /* Unwind information.  */
-++#define SHT_PARISC_DOC		0x70000002 /* Debug info for optimized code. */
-++
-++/* Legal values for sh_flags field of Elf32_Shdr.  */
-++
-++#define SHF_PARISC_SHORT	0x20000000 /* Section with short addressing. */
-++#define SHF_PARISC_HUGE		0x40000000 /* Section far from gp.  */
-++#define SHF_PARISC_SBP		0x80000000 /* Static branch prediction code. */
-++
-++/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
-++
-++#define STT_PARISC_MILLICODE	13	/* Millicode function entry point.  */
-++
-++#define STT_HP_OPAQUE		(STT_LOOS + 0x1)
-++#define STT_HP_STUB		(STT_LOOS + 0x2)
-++
-++/* HPPA relocs.  */
-++
-++#define R_PARISC_NONE		0	/* No reloc.  */
-++#define R_PARISC_DIR32		1	/* Direct 32-bit reference.  */
-++#define R_PARISC_DIR21L		2	/* Left 21 bits of eff. address.  */
-++#define R_PARISC_DIR17R		3	/* Right 17 bits of eff. address.  */
-++#define R_PARISC_DIR17F		4	/* 17 bits of eff. address.  */
-++#define R_PARISC_DIR14R		6	/* Right 14 bits of eff. address.  */
-++#define R_PARISC_PCREL32	9	/* 32-bit rel. address.  */
-++#define R_PARISC_PCREL21L	10	/* Left 21 bits of rel. address.  */
-++#define R_PARISC_PCREL17R	11	/* Right 17 bits of rel. address.  */
-++#define R_PARISC_PCREL17F	12	/* 17 bits of rel. address.  */
-++#define R_PARISC_PCREL14R	14	/* Right 14 bits of rel. address.  */
-++#define R_PARISC_DPREL21L	18	/* Left 21 bits of rel. address.  */
-++#define R_PARISC_DPREL14R	22	/* Right 14 bits of rel. address.  */
-++#define R_PARISC_GPREL21L	26	/* GP-relative, left 21 bits.  */
-++#define R_PARISC_GPREL14R	30	/* GP-relative, right 14 bits.  */
-++#define R_PARISC_LTOFF21L	34	/* LT-relative, left 21 bits.  */
-++#define R_PARISC_LTOFF14R	38	/* LT-relative, right 14 bits.  */
-++#define R_PARISC_SECREL32	41	/* 32 bits section rel. address.  */
-++#define R_PARISC_SEGBASE	48	/* No relocation, set segment base.  */
-++#define R_PARISC_SEGREL32	49	/* 32 bits segment rel. address.  */
-++#define R_PARISC_PLTOFF21L	50	/* PLT rel. address, left 21 bits.  */
-++#define R_PARISC_PLTOFF14R	54	/* PLT rel. address, right 14 bits.  */
-++#define R_PARISC_LTOFF_FPTR32	57	/* 32 bits LT-rel. function pointer. */
-++#define R_PARISC_LTOFF_FPTR21L	58	/* LT-rel. fct ptr, left 21 bits. */
-++#define R_PARISC_LTOFF_FPTR14R	62	/* LT-rel. fct ptr, right 14 bits. */
-++#define R_PARISC_FPTR64		64	/* 64 bits function address.  */
-++#define R_PARISC_PLABEL32	65	/* 32 bits function address.  */
-++#define R_PARISC_PLABEL21L	66	/* Left 21 bits of fdesc address.  */
-++#define R_PARISC_PLABEL14R	70	/* Right 14 bits of fdesc address.  */
-++#define R_PARISC_PCREL64	72	/* 64 bits PC-rel. address.  */
-++#define R_PARISC_PCREL22F	74	/* 22 bits PC-rel. address.  */
-++#define R_PARISC_PCREL14WR	75	/* PC-rel. address, right 14 bits.  */
-++#define R_PARISC_PCREL14DR	76	/* PC rel. address, right 14 bits.  */
-++#define R_PARISC_PCREL16F	77	/* 16 bits PC-rel. address.  */
-++#define R_PARISC_PCREL16WF	78	/* 16 bits PC-rel. address.  */
-++#define R_PARISC_PCREL16DF	79	/* 16 bits PC-rel. address.  */
-++#define R_PARISC_DIR64		80	/* 64 bits of eff. address.  */
-++#define R_PARISC_DIR14WR	83	/* 14 bits of eff. address.  */
-++#define R_PARISC_DIR14DR	84	/* 14 bits of eff. address.  */
-++#define R_PARISC_DIR16F		85	/* 16 bits of eff. address.  */
-++#define R_PARISC_DIR16WF	86	/* 16 bits of eff. address.  */
-++#define R_PARISC_DIR16DF	87	/* 16 bits of eff. address.  */
-++#define R_PARISC_GPREL64	88	/* 64 bits of GP-rel. address.  */
-++#define R_PARISC_GPREL14WR	91	/* GP-rel. address, right 14 bits.  */
-++#define R_PARISC_GPREL14DR	92	/* GP-rel. address, right 14 bits.  */
-++#define R_PARISC_GPREL16F	93	/* 16 bits GP-rel. address.  */
-++#define R_PARISC_GPREL16WF	94	/* 16 bits GP-rel. address.  */
-++#define R_PARISC_GPREL16DF	95	/* 16 bits GP-rel. address.  */
-++#define R_PARISC_LTOFF64	96	/* 64 bits LT-rel. address.  */
-++#define R_PARISC_LTOFF14WR	99	/* LT-rel. address, right 14 bits.  */
-++#define R_PARISC_LTOFF14DR	100	/* LT-rel. address, right 14 bits.  */
-++#define R_PARISC_LTOFF16F	101	/* 16 bits LT-rel. address.  */
-++#define R_PARISC_LTOFF16WF	102	/* 16 bits LT-rel. address.  */
-++#define R_PARISC_LTOFF16DF	103	/* 16 bits LT-rel. address.  */
-++#define R_PARISC_SECREL64	104	/* 64 bits section rel. address.  */
-++#define R_PARISC_SEGREL64	112	/* 64 bits segment rel. address.  */
-++#define R_PARISC_PLTOFF14WR	115	/* PLT-rel. address, right 14 bits.  */
-++#define R_PARISC_PLTOFF14DR	116	/* PLT-rel. address, right 14 bits.  */
-++#define R_PARISC_PLTOFF16F	117	/* 16 bits LT-rel. address.  */
-++#define R_PARISC_PLTOFF16WF	118	/* 16 bits PLT-rel. address.  */
-++#define R_PARISC_PLTOFF16DF	119	/* 16 bits PLT-rel. address.  */
-++#define R_PARISC_LTOFF_FPTR64	120	/* 64 bits LT-rel. function ptr.  */
-++#define R_PARISC_LTOFF_FPTR14WR	123	/* LT-rel. fct. ptr., right 14 bits. */
-++#define R_PARISC_LTOFF_FPTR14DR	124	/* LT-rel. fct. ptr., right 14 bits. */
-++#define R_PARISC_LTOFF_FPTR16F	125	/* 16 bits LT-rel. function ptr.  */
-++#define R_PARISC_LTOFF_FPTR16WF	126	/* 16 bits LT-rel. function ptr.  */
-++#define R_PARISC_LTOFF_FPTR16DF	127	/* 16 bits LT-rel. function ptr.  */
-++#define R_PARISC_LORESERVE	128
-++#define R_PARISC_COPY		128	/* Copy relocation.  */
-++#define R_PARISC_IPLT		129	/* Dynamic reloc, imported PLT */
-++#define R_PARISC_EPLT		130	/* Dynamic reloc, exported PLT */
-++#define R_PARISC_TPREL32	153	/* 32 bits TP-rel. address.  */
-++#define R_PARISC_TPREL21L	154	/* TP-rel. address, left 21 bits.  */
-++#define R_PARISC_TPREL14R	158	/* TP-rel. address, right 14 bits.  */
-++#define R_PARISC_LTOFF_TP21L	162	/* LT-TP-rel. address, left 21 bits. */
-++#define R_PARISC_LTOFF_TP14R	166	/* LT-TP-rel. address, right 14 bits.*/
-++#define R_PARISC_LTOFF_TP14F	167	/* 14 bits LT-TP-rel. address.  */
-++#define R_PARISC_TPREL64	216	/* 64 bits TP-rel. address.  */
-++#define R_PARISC_TPREL14WR	219	/* TP-rel. address, right 14 bits.  */
-++#define R_PARISC_TPREL14DR	220	/* TP-rel. address, right 14 bits.  */
-++#define R_PARISC_TPREL16F	221	/* 16 bits TP-rel. address.  */
-++#define R_PARISC_TPREL16WF	222	/* 16 bits TP-rel. address.  */
-++#define R_PARISC_TPREL16DF	223	/* 16 bits TP-rel. address.  */
-++#define R_PARISC_LTOFF_TP64	224	/* 64 bits LT-TP-rel. address.  */
-++#define R_PARISC_LTOFF_TP14WR	227	/* LT-TP-rel. address, right 14 bits.*/
-++#define R_PARISC_LTOFF_TP14DR	228	/* LT-TP-rel. address, right 14 bits.*/
-++#define R_PARISC_LTOFF_TP16F	229	/* 16 bits LT-TP-rel. address.  */
-++#define R_PARISC_LTOFF_TP16WF	230	/* 16 bits LT-TP-rel. address.  */
-++#define R_PARISC_LTOFF_TP16DF	231	/* 16 bits LT-TP-rel. address.  */
-++#define R_PARISC_GNU_VTENTRY	232
-++#define R_PARISC_GNU_VTINHERIT	233
-++#define R_PARISC_TLS_GD21L	234	/* GD 21-bit left.  */
-++#define R_PARISC_TLS_GD14R	235	/* GD 14-bit right.  */
-++#define R_PARISC_TLS_GDCALL	236	/* GD call to __t_g_a.  */
-++#define R_PARISC_TLS_LDM21L	237	/* LD module 21-bit left.  */
-++#define R_PARISC_TLS_LDM14R	238	/* LD module 14-bit right.  */
-++#define R_PARISC_TLS_LDMCALL	239	/* LD module call to __t_g_a.  */
-++#define R_PARISC_TLS_LDO21L	240	/* LD offset 21-bit left.  */
-++#define R_PARISC_TLS_LDO14R	241	/* LD offset 14-bit right.  */
-++#define R_PARISC_TLS_DTPMOD32	242	/* DTP module 32-bit.  */
-++#define R_PARISC_TLS_DTPMOD64	243	/* DTP module 64-bit.  */
-++#define R_PARISC_TLS_DTPOFF32	244	/* DTP offset 32-bit.  */
-++#define R_PARISC_TLS_DTPOFF64	245	/* DTP offset 32-bit.  */
-++#define R_PARISC_TLS_LE21L	R_PARISC_TPREL21L
-++#define R_PARISC_TLS_LE14R	R_PARISC_TPREL14R
-++#define R_PARISC_TLS_IE21L	R_PARISC_LTOFF_TP21L
-++#define R_PARISC_TLS_IE14R	R_PARISC_LTOFF_TP14R
-++#define R_PARISC_TLS_TPREL32	R_PARISC_TPREL32
-++#define R_PARISC_TLS_TPREL64	R_PARISC_TPREL64
-++#define R_PARISC_HIRESERVE	255
-++
-++/* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr.  */
-++
-++#define PT_HP_TLS		(PT_LOOS + 0x0)
-++#define PT_HP_CORE_NONE		(PT_LOOS + 0x1)
-++#define PT_HP_CORE_VERSION	(PT_LOOS + 0x2)
-++#define PT_HP_CORE_KERNEL	(PT_LOOS + 0x3)
-++#define PT_HP_CORE_COMM		(PT_LOOS + 0x4)
-++#define PT_HP_CORE_PROC		(PT_LOOS + 0x5)
-++#define PT_HP_CORE_LOADABLE	(PT_LOOS + 0x6)
-++#define PT_HP_CORE_STACK	(PT_LOOS + 0x7)
-++#define PT_HP_CORE_SHM		(PT_LOOS + 0x8)
-++#define PT_HP_CORE_MMF		(PT_LOOS + 0x9)
-++#define PT_HP_PARALLEL		(PT_LOOS + 0x10)
-++#define PT_HP_FASTBIND		(PT_LOOS + 0x11)
-++#define PT_HP_OPT_ANNOT		(PT_LOOS + 0x12)
-++#define PT_HP_HSL_ANNOT		(PT_LOOS + 0x13)
-++#define PT_HP_STACK		(PT_LOOS + 0x14)
-++
-++#define PT_PARISC_ARCHEXT	0x70000000
-++#define PT_PARISC_UNWIND	0x70000001
-++
-++/* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr.  */
-++
-++#define PF_PARISC_SBP		0x08000000
-++
-++#define PF_HP_PAGE_SIZE		0x00100000
-++#define PF_HP_FAR_SHARED	0x00200000
-++#define PF_HP_NEAR_SHARED	0x00400000
-++#define PF_HP_CODE		0x01000000
-++#define PF_HP_MODIFY		0x02000000
-++#define PF_HP_LAZYSWAP		0x04000000
-++#define PF_HP_SBP		0x08000000
-++
-++
-++/* Alpha specific definitions.  */
-++
-++/* Legal values for e_flags field of Elf64_Ehdr.  */
-++
-++#define EF_ALPHA_32BIT		1	/* All addresses must be < 2GB.  */
-++#define EF_ALPHA_CANRELAX	2	/* Relocations for relaxing exist.  */
-++
-++/* Legal values for sh_type field of Elf64_Shdr.  */
-++
-++/* These two are primerily concerned with ECOFF debugging info.  */
-++#define SHT_ALPHA_DEBUG		0x70000001
-++#define SHT_ALPHA_REGINFO	0x70000002
-++
-++/* Legal values for sh_flags field of Elf64_Shdr.  */
-++
-++#define SHF_ALPHA_GPREL		0x10000000
-++
-++/* Legal values for st_other field of Elf64_Sym.  */
-++#define STO_ALPHA_NOPV		0x80	/* No PV required.  */
-++#define STO_ALPHA_STD_GPLOAD	0x88	/* PV only used for initial ldgp.  */
-++
-++/* Alpha relocs.  */
-++
-++#define R_ALPHA_NONE		0	/* No reloc */
-++#define R_ALPHA_REFLONG		1	/* Direct 32 bit */
-++#define R_ALPHA_REFQUAD		2	/* Direct 64 bit */
-++#define R_ALPHA_GPREL32		3	/* GP relative 32 bit */
-++#define R_ALPHA_LITERAL		4	/* GP relative 16 bit w/optimization */
-++#define R_ALPHA_LITUSE		5	/* Optimization hint for LITERAL */
-++#define R_ALPHA_GPDISP		6	/* Add displacement to GP */
-++#define R_ALPHA_BRADDR		7	/* PC+4 relative 23 bit shifted */
-++#define R_ALPHA_HINT		8	/* PC+4 relative 16 bit shifted */
-++#define R_ALPHA_SREL16		9	/* PC relative 16 bit */
-++#define R_ALPHA_SREL32		10	/* PC relative 32 bit */
-++#define R_ALPHA_SREL64		11	/* PC relative 64 bit */
-++#define R_ALPHA_GPRELHIGH	17	/* GP relative 32 bit, high 16 bits */
-++#define R_ALPHA_GPRELLOW	18	/* GP relative 32 bit, low 16 bits */
-++#define R_ALPHA_GPREL16		19	/* GP relative 16 bit */
-++#define R_ALPHA_COPY		24	/* Copy symbol at runtime */
-++#define R_ALPHA_GLOB_DAT	25	/* Create GOT entry */
-++#define R_ALPHA_JMP_SLOT	26	/* Create PLT entry */
-++#define R_ALPHA_RELATIVE	27	/* Adjust by program base */
-++#define R_ALPHA_TLS_GD_HI	28
-++#define R_ALPHA_TLSGD		29
-++#define R_ALPHA_TLS_LDM		30
-++#define R_ALPHA_DTPMOD64	31
-++#define R_ALPHA_GOTDTPREL	32
-++#define R_ALPHA_DTPREL64	33
-++#define R_ALPHA_DTPRELHI	34
-++#define R_ALPHA_DTPRELLO	35
-++#define R_ALPHA_DTPREL16	36
-++#define R_ALPHA_GOTTPREL	37
-++#define R_ALPHA_TPREL64		38
-++#define R_ALPHA_TPRELHI		39
-++#define R_ALPHA_TPRELLO		40
-++#define R_ALPHA_TPREL16		41
-++/* Keep this the last entry.  */
-++#define R_ALPHA_NUM		46
-++
-++/* Magic values of the LITUSE relocation addend.  */
-++#define LITUSE_ALPHA_ADDR	0
-++#define LITUSE_ALPHA_BASE	1
-++#define LITUSE_ALPHA_BYTOFF	2
-++#define LITUSE_ALPHA_JSR	3
-++#define LITUSE_ALPHA_TLS_GD	4
-++#define LITUSE_ALPHA_TLS_LDM	5
-++
-++/* Legal values for d_tag of Elf64_Dyn.  */
-++#define DT_ALPHA_PLTRO		(DT_LOPROC + 0)
-++#define DT_ALPHA_NUM		1
-++
-++/* PowerPC specific declarations */
-++
-++/* Values for Elf32/64_Ehdr.e_flags.  */
-++#define EF_PPC_EMB		0x80000000	/* PowerPC embedded flag */
-++
-++/* Cygnus local bits below */
-++#define EF_PPC_RELOCATABLE	0x00010000	/* PowerPC -mrelocatable flag*/
-++#define EF_PPC_RELOCATABLE_LIB	0x00008000	/* PowerPC -mrelocatable-lib
-++						   flag */
-++
-++/* PowerPC relocations defined by the ABIs */
-++#define R_PPC_NONE		0
-++#define R_PPC_ADDR32		1	/* 32bit absolute address */
-++#define R_PPC_ADDR24		2	/* 26bit address, 2 bits ignored.  */
-++#define R_PPC_ADDR16		3	/* 16bit absolute address */
-++#define R_PPC_ADDR16_LO		4	/* lower 16bit of absolute address */
-++#define R_PPC_ADDR16_HI		5	/* high 16bit of absolute address */
-++#define R_PPC_ADDR16_HA		6	/* adjusted high 16bit */
-++#define R_PPC_ADDR14		7	/* 16bit address, 2 bits ignored */
-++#define R_PPC_ADDR14_BRTAKEN	8
-++#define R_PPC_ADDR14_BRNTAKEN	9
-++#define R_PPC_REL24		10	/* PC relative 26 bit */
-++#define R_PPC_REL14		11	/* PC relative 16 bit */
-++#define R_PPC_REL14_BRTAKEN	12
-++#define R_PPC_REL14_BRNTAKEN	13
-++#define R_PPC_GOT16		14
-++#define R_PPC_GOT16_LO		15
-++#define R_PPC_GOT16_HI		16
-++#define R_PPC_GOT16_HA		17
-++#define R_PPC_PLTREL24		18
-++#define R_PPC_COPY		19
-++#define R_PPC_GLOB_DAT		20
-++#define R_PPC_JMP_SLOT		21
-++#define R_PPC_RELATIVE		22
-++#define R_PPC_LOCAL24PC		23
-++#define R_PPC_UADDR32		24
-++#define R_PPC_UADDR16		25
-++#define R_PPC_REL32		26
-++#define R_PPC_PLT32		27
-++#define R_PPC_PLTREL32		28
-++#define R_PPC_PLT16_LO		29
-++#define R_PPC_PLT16_HI		30
-++#define R_PPC_PLT16_HA		31
-++#define R_PPC_SDAREL16		32
-++#define R_PPC_SECTOFF		33
-++#define R_PPC_SECTOFF_LO	34
-++#define R_PPC_SECTOFF_HI	35
-++#define R_PPC_SECTOFF_HA	36
-++
-++/* PowerPC relocations defined for the TLS access ABI.  */
-++#define R_PPC_TLS		67 /* none	(sym+add)@tls */
-++#define R_PPC_DTPMOD32		68 /* word32	(sym+add)@dtpmod */
-++#define R_PPC_TPREL16		69 /* half16*	(sym+add)@tprel */
-++#define R_PPC_TPREL16_LO	70 /* half16	(sym+add)@tprel@l */
-++#define R_PPC_TPREL16_HI	71 /* half16	(sym+add)@tprel@h */
-++#define R_PPC_TPREL16_HA	72 /* half16	(sym+add)@tprel@ha */
-++#define R_PPC_TPREL32		73 /* word32	(sym+add)@tprel */
-++#define R_PPC_DTPREL16		74 /* half16*	(sym+add)@dtprel */
-++#define R_PPC_DTPREL16_LO	75 /* half16	(sym+add)@dtprel@l */
-++#define R_PPC_DTPREL16_HI	76 /* half16	(sym+add)@dtprel@h */
-++#define R_PPC_DTPREL16_HA	77 /* half16	(sym+add)@dtprel@ha */
-++#define R_PPC_DTPREL32		78 /* word32	(sym+add)@dtprel */
-++#define R_PPC_GOT_TLSGD16	79 /* half16*	(sym+add)@got@tlsgd */
-++#define R_PPC_GOT_TLSGD16_LO	80 /* half16	(sym+add)@got@tlsgd@l */
-++#define R_PPC_GOT_TLSGD16_HI	81 /* half16	(sym+add)@got@tlsgd@h */
-++#define R_PPC_GOT_TLSGD16_HA	82 /* half16	(sym+add)@got@tlsgd@ha */
-++#define R_PPC_GOT_TLSLD16	83 /* half16*	(sym+add)@got@tlsld */
-++#define R_PPC_GOT_TLSLD16_LO	84 /* half16	(sym+add)@got@tlsld@l */
-++#define R_PPC_GOT_TLSLD16_HI	85 /* half16	(sym+add)@got@tlsld@h */
-++#define R_PPC_GOT_TLSLD16_HA	86 /* half16	(sym+add)@got@tlsld@ha */
-++#define R_PPC_GOT_TPREL16	87 /* half16*	(sym+add)@got@tprel */
-++#define R_PPC_GOT_TPREL16_LO	88 /* half16	(sym+add)@got@tprel@l */
-++#define R_PPC_GOT_TPREL16_HI	89 /* half16	(sym+add)@got@tprel@h */
-++#define R_PPC_GOT_TPREL16_HA	90 /* half16	(sym+add)@got@tprel@ha */
-++#define R_PPC_GOT_DTPREL16	91 /* half16*	(sym+add)@got@dtprel */
-++#define R_PPC_GOT_DTPREL16_LO	92 /* half16*	(sym+add)@got@dtprel@l */
-++#define R_PPC_GOT_DTPREL16_HI	93 /* half16*	(sym+add)@got@dtprel@h */
-++#define R_PPC_GOT_DTPREL16_HA	94 /* half16*	(sym+add)@got@dtprel@ha */
-++
-++/* The remaining relocs are from the Embedded ELF ABI, and are not
-++   in the SVR4 ELF ABI.  */
-++#define R_PPC_EMB_NADDR32	101
-++#define R_PPC_EMB_NADDR16	102
-++#define R_PPC_EMB_NADDR16_LO	103
-++#define R_PPC_EMB_NADDR16_HI	104
-++#define R_PPC_EMB_NADDR16_HA	105
-++#define R_PPC_EMB_SDAI16	106
-++#define R_PPC_EMB_SDA2I16	107
-++#define R_PPC_EMB_SDA2REL	108
-++#define R_PPC_EMB_SDA21		109	/* 16 bit offset in SDA */
-++#define R_PPC_EMB_MRKREF	110
-++#define R_PPC_EMB_RELSEC16	111
-++#define R_PPC_EMB_RELST_LO	112
-++#define R_PPC_EMB_RELST_HI	113
-++#define R_PPC_EMB_RELST_HA	114
-++#define R_PPC_EMB_BIT_FLD	115
-++#define R_PPC_EMB_RELSDA	116	/* 16 bit relative offset in SDA */
-++
-++/* Diab tool relocations.  */
-++#define R_PPC_DIAB_SDA21_LO	180	/* like EMB_SDA21, but lower 16 bit */
-++#define R_PPC_DIAB_SDA21_HI	181	/* like EMB_SDA21, but high 16 bit */
-++#define R_PPC_DIAB_SDA21_HA	182	/* like EMB_SDA21, adjusted high 16 */
-++#define R_PPC_DIAB_RELSDA_LO	183	/* like EMB_RELSDA, but lower 16 bit */
-++#define R_PPC_DIAB_RELSDA_HI	184	/* like EMB_RELSDA, but high 16 bit */
-++#define R_PPC_DIAB_RELSDA_HA	185	/* like EMB_RELSDA, adjusted high 16 */
-++
-++/* GNU extension to support local ifunc.  */
-++#define R_PPC_IRELATIVE		248
-++
-++/* GNU relocs used in PIC code sequences.  */
-++#define R_PPC_REL16		249	/* half16   (sym+add-.) */
-++#define R_PPC_REL16_LO		250	/* half16   (sym+add-.)@l */
-++#define R_PPC_REL16_HI		251	/* half16   (sym+add-.)@h */
-++#define R_PPC_REL16_HA		252	/* half16   (sym+add-.)@ha */
-++
-++/* This is a phony reloc to handle any old fashioned TOC16 references
-++   that may still be in object files.  */
-++#define R_PPC_TOC16		255
-++
-++/* PowerPC specific values for the Dyn d_tag field.  */
-++#define DT_PPC_GOT		(DT_LOPROC + 0)
-++#define DT_PPC_NUM		1
-++
-++/* PowerPC64 relocations defined by the ABIs */
-++#define R_PPC64_NONE		R_PPC_NONE
-++#define R_PPC64_ADDR32		R_PPC_ADDR32 /* 32bit absolute address */
-++#define R_PPC64_ADDR24		R_PPC_ADDR24 /* 26bit address, word aligned */
-++#define R_PPC64_ADDR16		R_PPC_ADDR16 /* 16bit absolute address */
-++#define R_PPC64_ADDR16_LO	R_PPC_ADDR16_LO	/* lower 16bits of address */
-++#define R_PPC64_ADDR16_HI	R_PPC_ADDR16_HI	/* high 16bits of address. */
-++#define R_PPC64_ADDR16_HA	R_PPC_ADDR16_HA /* adjusted high 16bits.  */
-++#define R_PPC64_ADDR14		R_PPC_ADDR14 /* 16bit address, word aligned */
-++#define R_PPC64_ADDR14_BRTAKEN	R_PPC_ADDR14_BRTAKEN
-++#define R_PPC64_ADDR14_BRNTAKEN	R_PPC_ADDR14_BRNTAKEN
-++#define R_PPC64_REL24		R_PPC_REL24 /* PC-rel. 26 bit, word aligned */
-++#define R_PPC64_REL14		R_PPC_REL14 /* PC relative 16 bit */
-++#define R_PPC64_REL14_BRTAKEN	R_PPC_REL14_BRTAKEN
-++#define R_PPC64_REL14_BRNTAKEN	R_PPC_REL14_BRNTAKEN
-++#define R_PPC64_GOT16		R_PPC_GOT16
-++#define R_PPC64_GOT16_LO	R_PPC_GOT16_LO
-++#define R_PPC64_GOT16_HI	R_PPC_GOT16_HI
-++#define R_PPC64_GOT16_HA	R_PPC_GOT16_HA
-++
-++#define R_PPC64_COPY		R_PPC_COPY
-++#define R_PPC64_GLOB_DAT	R_PPC_GLOB_DAT
-++#define R_PPC64_JMP_SLOT	R_PPC_JMP_SLOT
-++#define R_PPC64_RELATIVE	R_PPC_RELATIVE
-++
-++#define R_PPC64_UADDR32		R_PPC_UADDR32
-++#define R_PPC64_UADDR16		R_PPC_UADDR16
-++#define R_PPC64_REL32		R_PPC_REL32
-++#define R_PPC64_PLT32		R_PPC_PLT32
-++#define R_PPC64_PLTREL32	R_PPC_PLTREL32
-++#define R_PPC64_PLT16_LO	R_PPC_PLT16_LO
-++#define R_PPC64_PLT16_HI	R_PPC_PLT16_HI
-++#define R_PPC64_PLT16_HA	R_PPC_PLT16_HA
-++
-++#define R_PPC64_SECTOFF		R_PPC_SECTOFF
-++#define R_PPC64_SECTOFF_LO	R_PPC_SECTOFF_LO
-++#define R_PPC64_SECTOFF_HI	R_PPC_SECTOFF_HI
-++#define R_PPC64_SECTOFF_HA	R_PPC_SECTOFF_HA
-++#define R_PPC64_ADDR30		37 /* word30 (S + A - P) >> 2 */
-++#define R_PPC64_ADDR64		38 /* doubleword64 S + A */
-++#define R_PPC64_ADDR16_HIGHER	39 /* half16 #higher(S + A) */
-++#define R_PPC64_ADDR16_HIGHERA	40 /* half16 #highera(S + A) */
-++#define R_PPC64_ADDR16_HIGHEST	41 /* half16 #highest(S + A) */
-++#define R_PPC64_ADDR16_HIGHESTA	42 /* half16 #highesta(S + A) */
-++#define R_PPC64_UADDR64		43 /* doubleword64 S + A */
-++#define R_PPC64_REL64		44 /* doubleword64 S + A - P */
-++#define R_PPC64_PLT64		45 /* doubleword64 L + A */
-++#define R_PPC64_PLTREL64	46 /* doubleword64 L + A - P */
-++#define R_PPC64_TOC16		47 /* half16* S + A - .TOC */
-++#define R_PPC64_TOC16_LO	48 /* half16 #lo(S + A - .TOC.) */
-++#define R_PPC64_TOC16_HI	49 /* half16 #hi(S + A - .TOC.) */
-++#define R_PPC64_TOC16_HA	50 /* half16 #ha(S + A - .TOC.) */
-++#define R_PPC64_TOC		51 /* doubleword64 .TOC */
-++#define R_PPC64_PLTGOT16	52 /* half16* M + A */
-++#define R_PPC64_PLTGOT16_LO	53 /* half16 #lo(M + A) */
-++#define R_PPC64_PLTGOT16_HI	54 /* half16 #hi(M + A) */
-++#define R_PPC64_PLTGOT16_HA	55 /* half16 #ha(M + A) */
-++
-++#define R_PPC64_ADDR16_DS	56 /* half16ds* (S + A) >> 2 */
-++#define R_PPC64_ADDR16_LO_DS	57 /* half16ds  #lo(S + A) >> 2 */
-++#define R_PPC64_GOT16_DS	58 /* half16ds* (G + A) >> 2 */
-++#define R_PPC64_GOT16_LO_DS	59 /* half16ds  #lo(G + A) >> 2 */
-++#define R_PPC64_PLT16_LO_DS	60 /* half16ds  #lo(L + A) >> 2 */
-++#define R_PPC64_SECTOFF_DS	61 /* half16ds* (R + A) >> 2 */
-++#define R_PPC64_SECTOFF_LO_DS	62 /* half16ds  #lo(R + A) >> 2 */
-++#define R_PPC64_TOC16_DS	63 /* half16ds* (S + A - .TOC.) >> 2 */
-++#define R_PPC64_TOC16_LO_DS	64 /* half16ds  #lo(S + A - .TOC.) >> 2 */
-++#define R_PPC64_PLTGOT16_DS	65 /* half16ds* (M + A) >> 2 */
-++#define R_PPC64_PLTGOT16_LO_DS	66 /* half16ds  #lo(M + A) >> 2 */
-++
-++/* PowerPC64 relocations defined for the TLS access ABI.  */
-++#define R_PPC64_TLS		67 /* none	(sym+add)@tls */
-++#define R_PPC64_DTPMOD64	68 /* doubleword64 (sym+add)@dtpmod */
-++#define R_PPC64_TPREL16		69 /* half16*	(sym+add)@tprel */
-++#define R_PPC64_TPREL16_LO	70 /* half16	(sym+add)@tprel@l */
-++#define R_PPC64_TPREL16_HI	71 /* half16	(sym+add)@tprel@h */
-++#define R_PPC64_TPREL16_HA	72 /* half16	(sym+add)@tprel@ha */
-++#define R_PPC64_TPREL64		73 /* doubleword64 (sym+add)@tprel */
-++#define R_PPC64_DTPREL16	74 /* half16*	(sym+add)@dtprel */
-++#define R_PPC64_DTPREL16_LO	75 /* half16	(sym+add)@dtprel@l */
-++#define R_PPC64_DTPREL16_HI	76 /* half16	(sym+add)@dtprel@h */
-++#define R_PPC64_DTPREL16_HA	77 /* half16	(sym+add)@dtprel@ha */
-++#define R_PPC64_DTPREL64	78 /* doubleword64 (sym+add)@dtprel */
-++#define R_PPC64_GOT_TLSGD16	79 /* half16*	(sym+add)@got@tlsgd */
-++#define R_PPC64_GOT_TLSGD16_LO	80 /* half16	(sym+add)@got@tlsgd@l */
-++#define R_PPC64_GOT_TLSGD16_HI	81 /* half16	(sym+add)@got@tlsgd@h */
-++#define R_PPC64_GOT_TLSGD16_HA	82 /* half16	(sym+add)@got@tlsgd@ha */
-++#define R_PPC64_GOT_TLSLD16	83 /* half16*	(sym+add)@got@tlsld */
-++#define R_PPC64_GOT_TLSLD16_LO	84 /* half16	(sym+add)@got@tlsld@l */
-++#define R_PPC64_GOT_TLSLD16_HI	85 /* half16	(sym+add)@got@tlsld@h */
-++#define R_PPC64_GOT_TLSLD16_HA	86 /* half16	(sym+add)@got@tlsld@ha */
-++#define R_PPC64_GOT_TPREL16_DS	87 /* half16ds*	(sym+add)@got@tprel */
-++#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */
-++#define R_PPC64_GOT_TPREL16_HI	89 /* half16	(sym+add)@got@tprel@h */
-++#define R_PPC64_GOT_TPREL16_HA	90 /* half16	(sym+add)@got@tprel@ha */
-++#define R_PPC64_GOT_DTPREL16_DS	91 /* half16ds*	(sym+add)@got@dtprel */
-++#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */
-++#define R_PPC64_GOT_DTPREL16_HI	93 /* half16	(sym+add)@got@dtprel@h */
-++#define R_PPC64_GOT_DTPREL16_HA	94 /* half16	(sym+add)@got@dtprel@ha */
-++#define R_PPC64_TPREL16_DS	95 /* half16ds*	(sym+add)@tprel */
-++#define R_PPC64_TPREL16_LO_DS	96 /* half16ds	(sym+add)@tprel@l */
-++#define R_PPC64_TPREL16_HIGHER	97 /* half16	(sym+add)@tprel@higher */
-++#define R_PPC64_TPREL16_HIGHERA	98 /* half16	(sym+add)@tprel@highera */
-++#define R_PPC64_TPREL16_HIGHEST	99 /* half16	(sym+add)@tprel@highest */
-++#define R_PPC64_TPREL16_HIGHESTA 100 /* half16	(sym+add)@tprel@highesta */
-++#define R_PPC64_DTPREL16_DS	101 /* half16ds* (sym+add)@dtprel */
-++#define R_PPC64_DTPREL16_LO_DS	102 /* half16ds	(sym+add)@dtprel@l */
-++#define R_PPC64_DTPREL16_HIGHER	103 /* half16	(sym+add)@dtprel@higher */
-++#define R_PPC64_DTPREL16_HIGHERA 104 /* half16	(sym+add)@dtprel@highera */
-++#define R_PPC64_DTPREL16_HIGHEST 105 /* half16	(sym+add)@dtprel@highest */
-++#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16	(sym+add)@dtprel@highesta */
-++
-++/* GNU extension to support local ifunc.  */
-++#define R_PPC64_JMP_IREL	247
-++#define R_PPC64_IRELATIVE	248
-++#define R_PPC64_REL16		249	/* half16   (sym+add-.) */
-++#define R_PPC64_REL16_LO	250	/* half16   (sym+add-.)@l */
-++#define R_PPC64_REL16_HI	251	/* half16   (sym+add-.)@h */
-++#define R_PPC64_REL16_HA	252	/* half16   (sym+add-.)@ha */
-++
-++/* PowerPC64 specific values for the Dyn d_tag field.  */
-++#define DT_PPC64_GLINK  (DT_LOPROC + 0)
-++#define DT_PPC64_OPD	(DT_LOPROC + 1)
-++#define DT_PPC64_OPDSZ	(DT_LOPROC + 2)
-++#define DT_PPC64_NUM    3
-++
-++
-++/* ARM specific declarations */
-++
-++/* Processor specific flags for the ELF header e_flags field.  */
-++#define EF_ARM_RELEXEC		0x01
-++#define EF_ARM_HASENTRY		0x02
-++#define EF_ARM_INTERWORK	0x04
-++#define EF_ARM_APCS_26		0x08
-++#define EF_ARM_APCS_FLOAT	0x10
-++#define EF_ARM_PIC		0x20
-++#define EF_ARM_ALIGN8		0x40 /* 8-bit structure alignment is in use */
-++#define EF_ARM_NEW_ABI		0x80
-++#define EF_ARM_OLD_ABI		0x100
-++#define EF_ARM_SOFT_FLOAT	0x200
-++#define EF_ARM_VFP_FLOAT	0x400
-++#define EF_ARM_MAVERICK_FLOAT	0x800
-++
-++
-++/* Other constants defined in the ARM ELF spec. version B-01.  */
-++/* NB. These conflict with values defined above.  */
-++#define EF_ARM_SYMSARESORTED	0x04
-++#define EF_ARM_DYNSYMSUSESEGIDX	0x08
-++#define EF_ARM_MAPSYMSFIRST	0x10
-++#define EF_ARM_EABIMASK		0XFF000000
-++
-++/* Constants defined in AAELF.  */
-++#define EF_ARM_BE8	    0x00800000
-++#define EF_ARM_LE8	    0x00400000
-++
-++#define EF_ARM_EABI_VERSION(flags)	((flags) & EF_ARM_EABIMASK)
-++#define EF_ARM_EABI_UNKNOWN	0x00000000
-++#define EF_ARM_EABI_VER1	0x01000000
-++#define EF_ARM_EABI_VER2	0x02000000
-++#define EF_ARM_EABI_VER3	0x03000000
-++#define EF_ARM_EABI_VER4	0x04000000
-++#define EF_ARM_EABI_VER5	0x05000000
-++
-++/* Additional symbol types for Thumb.  */
-++#define STT_ARM_TFUNC		STT_LOPROC /* A Thumb function.  */
-++#define STT_ARM_16BIT		STT_HIPROC /* A Thumb label.  */
-++
-++/* ARM-specific values for sh_flags */
-++#define SHF_ARM_ENTRYSECT	0x10000000 /* Section contains an entry point */
-++#define SHF_ARM_COMDEF		0x80000000 /* Section may be multiply defined
-++					      in the input to a link step.  */
-++
-++/* ARM-specific program header flags */
-++#define PF_ARM_SB		0x10000000 /* Segment contains the location
-++					      addressed by the static base. */
-++#define PF_ARM_PI		0x20000000 /* Position-independent segment.  */
-++#define PF_ARM_ABS		0x40000000 /* Absolute segment.  */
-++
-++/* Processor specific values for the Phdr p_type field.  */
-++#define PT_ARM_EXIDX		(PT_LOPROC + 1)	/* ARM unwind segment.  */
-++
-++/* Processor specific values for the Shdr sh_type field.  */
-++#define SHT_ARM_EXIDX		(SHT_LOPROC + 1) /* ARM unwind section.  */
-++#define SHT_ARM_PREEMPTMAP	(SHT_LOPROC + 2) /* Preemption details.  */
-++#define SHT_ARM_ATTRIBUTES	(SHT_LOPROC + 3) /* ARM attributes section.  */
-++
-++
-++/* ARM relocs.  */
-++
-++#define R_ARM_NONE		0	/* No reloc */
-++#define R_ARM_PC24		1	/* PC relative 26 bit branch */
-++#define R_ARM_ABS32		2	/* Direct 32 bit  */
-++#define R_ARM_REL32		3	/* PC relative 32 bit */
-++#define R_ARM_PC13		4
-++#define R_ARM_ABS16		5	/* Direct 16 bit */
-++#define R_ARM_ABS12		6	/* Direct 12 bit */
-++#define R_ARM_THM_ABS5		7
-++#define R_ARM_ABS8		8	/* Direct 8 bit */
-++#define R_ARM_SBREL32		9
-++#define R_ARM_THM_PC22		10
-++#define R_ARM_THM_PC8		11
-++#define R_ARM_AMP_VCALL9	12
-++#define R_ARM_SWI24		13	/* Obsolete static relocation.  */
-++#define R_ARM_TLS_DESC		13      /* Dynamic relocation.  */
-++#define R_ARM_THM_SWI8		14
-++#define R_ARM_XPC25		15
-++#define R_ARM_THM_XPC22		16
-++#define R_ARM_TLS_DTPMOD32	17	/* ID of module containing symbol */
-++#define R_ARM_TLS_DTPOFF32	18	/* Offset in TLS block */
-++#define R_ARM_TLS_TPOFF32	19	/* Offset in static TLS block */
-++#define R_ARM_COPY		20	/* Copy symbol at runtime */
-++#define R_ARM_GLOB_DAT		21	/* Create GOT entry */
-++#define R_ARM_JUMP_SLOT		22	/* Create PLT entry */
-++#define R_ARM_RELATIVE		23	/* Adjust by program base */
-++#define R_ARM_GOTOFF		24	/* 32 bit offset to GOT */
-++#define R_ARM_GOTPC		25	/* 32 bit PC relative offset to GOT */
-++#define R_ARM_GOT32		26	/* 32 bit GOT entry */
-++#define R_ARM_PLT32		27	/* 32 bit PLT address */
-++#define R_ARM_ALU_PCREL_7_0	32
-++#define R_ARM_ALU_PCREL_15_8	33
-++#define R_ARM_ALU_PCREL_23_15	34
-++#define R_ARM_LDR_SBREL_11_0	35
-++#define R_ARM_ALU_SBREL_19_12	36
-++#define R_ARM_ALU_SBREL_27_20	37
-++#define R_ARM_TLS_GOTDESC	90
-++#define R_ARM_TLS_CALL		91
-++#define R_ARM_TLS_DESCSEQ	92
-++#define R_ARM_THM_TLS_CALL	93
-++#define R_ARM_GNU_VTENTRY	100
-++#define R_ARM_GNU_VTINHERIT	101
-++#define R_ARM_THM_PC11		102	/* thumb unconditional branch */
-++#define R_ARM_THM_PC9		103	/* thumb conditional branch */
-++#define R_ARM_TLS_GD32		104	/* PC-rel 32 bit for global dynamic
-++					   thread local data */
-++#define R_ARM_TLS_LDM32		105	/* PC-rel 32 bit for local dynamic
-++					   thread local data */
-++#define R_ARM_TLS_LDO32		106	/* 32 bit offset relative to TLS
-++					   block */
-++#define R_ARM_TLS_IE32		107	/* PC-rel 32 bit for GOT entry of
-++					   static TLS block offset */
-++#define R_ARM_TLS_LE32		108	/* 32 bit offset relative to static
-++					   TLS block */
-++#define	R_ARM_THM_TLS_DESCSEQ	129
-++#define R_ARM_IRELATIVE		160
-++#define R_ARM_RXPC25		249
-++#define R_ARM_RSBREL32		250
-++#define R_ARM_THM_RPC22		251
-++#define R_ARM_RREL32		252
-++#define R_ARM_RABS22		253
-++#define R_ARM_RPC24		254
-++#define R_ARM_RBASE		255
-++/* Keep this the last entry.  */
-++#define R_ARM_NUM		256
-++
-++/* IA-64 specific declarations.  */
-++
-++/* Processor specific flags for the Ehdr e_flags field.  */
-++#define EF_IA_64_MASKOS		0x0000000f	/* os-specific flags */
-++#define EF_IA_64_ABI64		0x00000010	/* 64-bit ABI */
-++#define EF_IA_64_ARCH		0xff000000	/* arch. version mask */
-++
-++/* Processor specific values for the Phdr p_type field.  */
-++#define PT_IA_64_ARCHEXT	(PT_LOPROC + 0)	/* arch extension bits */
-++#define PT_IA_64_UNWIND		(PT_LOPROC + 1)	/* ia64 unwind bits */
-++#define PT_IA_64_HP_OPT_ANOT	(PT_LOOS + 0x12)
-++#define PT_IA_64_HP_HSL_ANOT	(PT_LOOS + 0x13)
-++#define PT_IA_64_HP_STACK	(PT_LOOS + 0x14)
-++
-++/* Processor specific flags for the Phdr p_flags field.  */
-++#define PF_IA_64_NORECOV	0x80000000	/* spec insns w/o recovery */
-++
-++/* Processor specific values for the Shdr sh_type field.  */
-++#define SHT_IA_64_EXT		(SHT_LOPROC + 0) /* extension bits */
-++#define SHT_IA_64_UNWIND	(SHT_LOPROC + 1) /* unwind bits */
-++
-++/* Processor specific flags for the Shdr sh_flags field.  */
-++#define SHF_IA_64_SHORT		0x10000000	/* section near gp */
-++#define SHF_IA_64_NORECOV	0x20000000	/* spec insns w/o recovery */
-++
-++/* Processor specific values for the Dyn d_tag field.  */
-++#define DT_IA_64_PLT_RESERVE	(DT_LOPROC + 0)
-++#define DT_IA_64_NUM		1
-++
-++/* IA-64 relocations.  */
-++#define R_IA64_NONE		0x00	/* none */
-++#define R_IA64_IMM14		0x21	/* symbol + addend, add imm14 */
-++#define R_IA64_IMM22		0x22	/* symbol + addend, add imm22 */
-++#define R_IA64_IMM64		0x23	/* symbol + addend, mov imm64 */
-++#define R_IA64_DIR32MSB		0x24	/* symbol + addend, data4 MSB */
-++#define R_IA64_DIR32LSB		0x25	/* symbol + addend, data4 LSB */
-++#define R_IA64_DIR64MSB		0x26	/* symbol + addend, data8 MSB */
-++#define R_IA64_DIR64LSB		0x27	/* symbol + addend, data8 LSB */
-++#define R_IA64_GPREL22		0x2a	/* @gprel(sym + add), add imm22 */
-++#define R_IA64_GPREL64I		0x2b	/* @gprel(sym + add), mov imm64 */
-++#define R_IA64_GPREL32MSB	0x2c	/* @gprel(sym + add), data4 MSB */
-++#define R_IA64_GPREL32LSB	0x2d	/* @gprel(sym + add), data4 LSB */
-++#define R_IA64_GPREL64MSB	0x2e	/* @gprel(sym + add), data8 MSB */
-++#define R_IA64_GPREL64LSB	0x2f	/* @gprel(sym + add), data8 LSB */
-++#define R_IA64_LTOFF22		0x32	/* @ltoff(sym + add), add imm22 */
-++#define R_IA64_LTOFF64I		0x33	/* @ltoff(sym + add), mov imm64 */
-++#define R_IA64_PLTOFF22		0x3a	/* @pltoff(sym + add), add imm22 */
-++#define R_IA64_PLTOFF64I	0x3b	/* @pltoff(sym + add), mov imm64 */
-++#define R_IA64_PLTOFF64MSB	0x3e	/* @pltoff(sym + add), data8 MSB */
-++#define R_IA64_PLTOFF64LSB	0x3f	/* @pltoff(sym + add), data8 LSB */
-++#define R_IA64_FPTR64I		0x43	/* @fptr(sym + add), mov imm64 */
-++#define R_IA64_FPTR32MSB	0x44	/* @fptr(sym + add), data4 MSB */
-++#define R_IA64_FPTR32LSB	0x45	/* @fptr(sym + add), data4 LSB */
-++#define R_IA64_FPTR64MSB	0x46	/* @fptr(sym + add), data8 MSB */
-++#define R_IA64_FPTR64LSB	0x47	/* @fptr(sym + add), data8 LSB */
-++#define R_IA64_PCREL60B		0x48	/* @pcrel(sym + add), brl */
-++#define R_IA64_PCREL21B		0x49	/* @pcrel(sym + add), ptb, call */
-++#define R_IA64_PCREL21M		0x4a	/* @pcrel(sym + add), chk.s */
-++#define R_IA64_PCREL21F		0x4b	/* @pcrel(sym + add), fchkf */
-++#define R_IA64_PCREL32MSB	0x4c	/* @pcrel(sym + add), data4 MSB */
-++#define R_IA64_PCREL32LSB	0x4d	/* @pcrel(sym + add), data4 LSB */
-++#define R_IA64_PCREL64MSB	0x4e	/* @pcrel(sym + add), data8 MSB */
-++#define R_IA64_PCREL64LSB	0x4f	/* @pcrel(sym + add), data8 LSB */
-++#define R_IA64_LTOFF_FPTR22	0x52	/* @ltoff(@fptr(s+a)), imm22 */
-++#define R_IA64_LTOFF_FPTR64I	0x53	/* @ltoff(@fptr(s+a)), imm64 */
-++#define R_IA64_LTOFF_FPTR32MSB	0x54	/* @ltoff(@fptr(s+a)), data4 MSB */
-++#define R_IA64_LTOFF_FPTR32LSB	0x55	/* @ltoff(@fptr(s+a)), data4 LSB */
-++#define R_IA64_LTOFF_FPTR64MSB	0x56	/* @ltoff(@fptr(s+a)), data8 MSB */
-++#define R_IA64_LTOFF_FPTR64LSB	0x57	/* @ltoff(@fptr(s+a)), data8 LSB */
-++#define R_IA64_SEGREL32MSB	0x5c	/* @segrel(sym + add), data4 MSB */
-++#define R_IA64_SEGREL32LSB	0x5d	/* @segrel(sym + add), data4 LSB */
-++#define R_IA64_SEGREL64MSB	0x5e	/* @segrel(sym + add), data8 MSB */
-++#define R_IA64_SEGREL64LSB	0x5f	/* @segrel(sym + add), data8 LSB */
-++#define R_IA64_SECREL32MSB	0x64	/* @secrel(sym + add), data4 MSB */
-++#define R_IA64_SECREL32LSB	0x65	/* @secrel(sym + add), data4 LSB */
-++#define R_IA64_SECREL64MSB	0x66	/* @secrel(sym + add), data8 MSB */
-++#define R_IA64_SECREL64LSB	0x67	/* @secrel(sym + add), data8 LSB */
-++#define R_IA64_REL32MSB		0x6c	/* data 4 + REL */
-++#define R_IA64_REL32LSB		0x6d	/* data 4 + REL */
-++#define R_IA64_REL64MSB		0x6e	/* data 8 + REL */
-++#define R_IA64_REL64LSB		0x6f	/* data 8 + REL */
-++#define R_IA64_LTV32MSB		0x74	/* symbol + addend, data4 MSB */
-++#define R_IA64_LTV32LSB		0x75	/* symbol + addend, data4 LSB */
-++#define R_IA64_LTV64MSB		0x76	/* symbol + addend, data8 MSB */
-++#define R_IA64_LTV64LSB		0x77	/* symbol + addend, data8 LSB */
-++#define R_IA64_PCREL21BI	0x79	/* @pcrel(sym + add), 21bit inst */
-++#define R_IA64_PCREL22		0x7a	/* @pcrel(sym + add), 22bit inst */
-++#define R_IA64_PCREL64I		0x7b	/* @pcrel(sym + add), 64bit inst */
-++#define R_IA64_IPLTMSB		0x80	/* dynamic reloc, imported PLT, MSB */
-++#define R_IA64_IPLTLSB		0x81	/* dynamic reloc, imported PLT, LSB */
-++#define R_IA64_COPY		0x84	/* copy relocation */
-++#define R_IA64_SUB		0x85	/* Addend and symbol difference */
-++#define R_IA64_LTOFF22X		0x86	/* LTOFF22, relaxable.  */
-++#define R_IA64_LDXMOV		0x87	/* Use of LTOFF22X.  */
-++#define R_IA64_TPREL14		0x91	/* @tprel(sym + add), imm14 */
-++#define R_IA64_TPREL22		0x92	/* @tprel(sym + add), imm22 */
-++#define R_IA64_TPREL64I		0x93	/* @tprel(sym + add), imm64 */
-++#define R_IA64_TPREL64MSB	0x96	/* @tprel(sym + add), data8 MSB */
-++#define R_IA64_TPREL64LSB	0x97	/* @tprel(sym + add), data8 LSB */
-++#define R_IA64_LTOFF_TPREL22	0x9a	/* @ltoff(@tprel(s+a)), imm2 */
-++#define R_IA64_DTPMOD64MSB	0xa6	/* @dtpmod(sym + add), data8 MSB */
-++#define R_IA64_DTPMOD64LSB	0xa7	/* @dtpmod(sym + add), data8 LSB */
-++#define R_IA64_LTOFF_DTPMOD22	0xaa	/* @ltoff(@dtpmod(sym + add)), imm22 */
-++#define R_IA64_DTPREL14		0xb1	/* @dtprel(sym + add), imm14 */
-++#define R_IA64_DTPREL22		0xb2	/* @dtprel(sym + add), imm22 */
-++#define R_IA64_DTPREL64I	0xb3	/* @dtprel(sym + add), imm64 */
-++#define R_IA64_DTPREL32MSB	0xb4	/* @dtprel(sym + add), data4 MSB */
-++#define R_IA64_DTPREL32LSB	0xb5	/* @dtprel(sym + add), data4 LSB */
-++#define R_IA64_DTPREL64MSB	0xb6	/* @dtprel(sym + add), data8 MSB */
-++#define R_IA64_DTPREL64LSB	0xb7	/* @dtprel(sym + add), data8 LSB */
-++#define R_IA64_LTOFF_DTPREL22	0xba	/* @ltoff(@dtprel(s+a)), imm22 */
-++
-++/* SH specific declarations */
-++
-++/* Processor specific flags for the ELF header e_flags field.  */
-++#define EF_SH_MACH_MASK		0x1f
-++#define EF_SH_UNKNOWN		0x0
-++#define EF_SH1			0x1
-++#define EF_SH2			0x2
-++#define EF_SH3			0x3
-++#define EF_SH_DSP		0x4
-++#define EF_SH3_DSP		0x5
-++#define EF_SH4AL_DSP		0x6
-++#define EF_SH3E			0x8
-++#define EF_SH4			0x9
-++#define EF_SH2E			0xb
-++#define EF_SH4A			0xc
-++#define EF_SH2A			0xd
-++#define EF_SH4_NOFPU		0x10
-++#define EF_SH4A_NOFPU		0x11
-++#define EF_SH4_NOMMU_NOFPU	0x12
-++#define EF_SH2A_NOFPU		0x13
-++#define EF_SH3_NOMMU		0x14
-++#define EF_SH2A_SH4_NOFPU	0x15
-++#define EF_SH2A_SH3_NOFPU	0x16
-++#define EF_SH2A_SH4		0x17
-++#define EF_SH2A_SH3E		0x18
-++
-++/* SH relocs.  */
-++#define	R_SH_NONE		0
-++#define	R_SH_DIR32		1
-++#define	R_SH_REL32		2
-++#define	R_SH_DIR8WPN		3
-++#define	R_SH_IND12W		4
-++#define	R_SH_DIR8WPL		5
-++#define	R_SH_DIR8WPZ		6
-++#define	R_SH_DIR8BP		7
-++#define	R_SH_DIR8W		8
-++#define	R_SH_DIR8L		9
-++#define	R_SH_SWITCH16		25
-++#define	R_SH_SWITCH32		26
-++#define	R_SH_USES		27
-++#define	R_SH_COUNT		28
-++#define	R_SH_ALIGN		29
-++#define	R_SH_CODE		30
-++#define	R_SH_DATA		31
-++#define	R_SH_LABEL		32
-++#define	R_SH_SWITCH8		33
-++#define	R_SH_GNU_VTINHERIT	34
-++#define	R_SH_GNU_VTENTRY	35
-++#define	R_SH_TLS_GD_32		144
-++#define	R_SH_TLS_LD_32		145
-++#define	R_SH_TLS_LDO_32		146
-++#define	R_SH_TLS_IE_32		147
-++#define	R_SH_TLS_LE_32		148
-++#define	R_SH_TLS_DTPMOD32	149
-++#define	R_SH_TLS_DTPOFF32	150
-++#define	R_SH_TLS_TPOFF32	151
-++#define	R_SH_GOT32		160
-++#define	R_SH_PLT32		161
-++#define	R_SH_COPY		162
-++#define	R_SH_GLOB_DAT		163
-++#define	R_SH_JMP_SLOT		164
-++#define	R_SH_RELATIVE		165
-++#define	R_SH_GOTOFF		166
-++#define	R_SH_GOTPC		167
-++/* Keep this the last entry.  */
-++#define	R_SH_NUM		256
-++
-++/* S/390 specific definitions.  */
-++
-++/* Valid values for the e_flags field.  */
-++
-++#define EF_S390_HIGH_GPRS    0x00000001  /* High GPRs kernel facility needed.  */
-++
-++/* Additional s390 relocs */
-++
-++#define R_390_NONE		0	/* No reloc.  */
-++#define R_390_8			1	/* Direct 8 bit.  */
-++#define R_390_12		2	/* Direct 12 bit.  */
-++#define R_390_16		3	/* Direct 16 bit.  */
-++#define R_390_32		4	/* Direct 32 bit.  */
-++#define R_390_PC32		5	/* PC relative 32 bit.	*/
-++#define R_390_GOT12		6	/* 12 bit GOT offset.  */
-++#define R_390_GOT32		7	/* 32 bit GOT offset.  */
-++#define R_390_PLT32		8	/* 32 bit PC relative PLT address.  */
-++#define R_390_COPY		9	/* Copy symbol at runtime.  */
-++#define R_390_GLOB_DAT		10	/* Create GOT entry.  */
-++#define R_390_JMP_SLOT		11	/* Create PLT entry.  */
-++#define R_390_RELATIVE		12	/* Adjust by program base.  */
-++#define R_390_GOTOFF32		13	/* 32 bit offset to GOT.	 */
-++#define R_390_GOTPC		14	/* 32 bit PC relative offset to GOT.  */
-++#define R_390_GOT16		15	/* 16 bit GOT offset.  */
-++#define R_390_PC16		16	/* PC relative 16 bit.	*/
-++#define R_390_PC16DBL		17	/* PC relative 16 bit shifted by 1.  */
-++#define R_390_PLT16DBL		18	/* 16 bit PC rel. PLT shifted by 1.  */
-++#define R_390_PC32DBL		19	/* PC relative 32 bit shifted by 1.  */
-++#define R_390_PLT32DBL		20	/* 32 bit PC rel. PLT shifted by 1.  */
-++#define R_390_GOTPCDBL		21	/* 32 bit PC rel. GOT shifted by 1.  */
-++#define R_390_64		22	/* Direct 64 bit.  */
-++#define R_390_PC64		23	/* PC relative 64 bit.	*/
-++#define R_390_GOT64		24	/* 64 bit GOT offset.  */
-++#define R_390_PLT64		25	/* 64 bit PC relative PLT address.  */
-++#define R_390_GOTENT		26	/* 32 bit PC rel. to GOT entry >> 1. */
-++#define R_390_GOTOFF16		27	/* 16 bit offset to GOT. */
-++#define R_390_GOTOFF64		28	/* 64 bit offset to GOT. */
-++#define R_390_GOTPLT12		29	/* 12 bit offset to jump slot.	*/
-++#define R_390_GOTPLT16		30	/* 16 bit offset to jump slot.	*/
-++#define R_390_GOTPLT32		31	/* 32 bit offset to jump slot.	*/
-++#define R_390_GOTPLT64		32	/* 64 bit offset to jump slot.	*/
-++#define R_390_GOTPLTENT		33	/* 32 bit rel. offset to jump slot.  */
-++#define R_390_PLTOFF16		34	/* 16 bit offset from GOT to PLT. */
-++#define R_390_PLTOFF32		35	/* 32 bit offset from GOT to PLT. */
-++#define R_390_PLTOFF64		36	/* 16 bit offset from GOT to PLT. */
-++#define R_390_TLS_LOAD		37	/* Tag for load insn in TLS code.  */
-++#define R_390_TLS_GDCALL	38	/* Tag for function call in general
-++					   dynamic TLS code. */
-++#define R_390_TLS_LDCALL	39	/* Tag for function call in local
-++					   dynamic TLS code. */
-++#define R_390_TLS_GD32		40	/* Direct 32 bit for general dynamic
-++					   thread local data.  */
-++#define R_390_TLS_GD64		41	/* Direct 64 bit for general dynamic
-++					  thread local data.  */
-++#define R_390_TLS_GOTIE12	42	/* 12 bit GOT offset for static TLS
-++					   block offset.  */
-++#define R_390_TLS_GOTIE32	43	/* 32 bit GOT offset for static TLS
-++					   block offset.  */
-++#define R_390_TLS_GOTIE64	44	/* 64 bit GOT offset for static TLS
-++					   block offset. */
-++#define R_390_TLS_LDM32		45	/* Direct 32 bit for local dynamic
-++					   thread local data in LE code.  */
-++#define R_390_TLS_LDM64		46	/* Direct 64 bit for local dynamic
-++					   thread local data in LE code.  */
-++#define R_390_TLS_IE32		47	/* 32 bit address of GOT entry for
-++					   negated static TLS block offset.  */
-++#define R_390_TLS_IE64		48	/* 64 bit address of GOT entry for
-++					   negated static TLS block offset.  */
-++#define R_390_TLS_IEENT		49	/* 32 bit rel. offset to GOT entry for
-++					   negated static TLS block offset.  */
-++#define R_390_TLS_LE32		50	/* 32 bit negated offset relative to
-++					   static TLS block.  */
-++#define R_390_TLS_LE64		51	/* 64 bit negated offset relative to
-++					   static TLS block.  */
-++#define R_390_TLS_LDO32		52	/* 32 bit offset relative to TLS
-++					   block.  */
-++#define R_390_TLS_LDO64		53	/* 64 bit offset relative to TLS
-++					   block.  */
-++#define R_390_TLS_DTPMOD	54	/* ID of module containing symbol.  */
-++#define R_390_TLS_DTPOFF	55	/* Offset in TLS block.	 */
-++#define R_390_TLS_TPOFF		56	/* Negated offset in static TLS
-++					   block.  */
-++#define R_390_20		57	/* Direct 20 bit.  */
-++#define R_390_GOT20		58	/* 20 bit GOT offset.  */
-++#define R_390_GOTPLT20		59	/* 20 bit offset to jump slot.  */
-++#define R_390_TLS_GOTIE20	60	/* 20 bit GOT offset for static TLS
-++					   block offset.  */
-++#define R_390_IRELATIVE         61      /* STT_GNU_IFUNC relocation.  */
-++/* Keep this the last entry.  */
-++#define R_390_NUM		62
-++
-++
-++/* CRIS relocations.  */
-++#define R_CRIS_NONE		0
-++#define R_CRIS_8		1
-++#define R_CRIS_16		2
-++#define R_CRIS_32		3
-++#define R_CRIS_8_PCREL		4
-++#define R_CRIS_16_PCREL		5
-++#define R_CRIS_32_PCREL		6
-++#define R_CRIS_GNU_VTINHERIT	7
-++#define R_CRIS_GNU_VTENTRY	8
-++#define R_CRIS_COPY		9
-++#define R_CRIS_GLOB_DAT		10
-++#define R_CRIS_JUMP_SLOT	11
-++#define R_CRIS_RELATIVE		12
-++#define R_CRIS_16_GOT		13
-++#define R_CRIS_32_GOT		14
-++#define R_CRIS_16_GOTPLT	15
-++#define R_CRIS_32_GOTPLT	16
-++#define R_CRIS_32_GOTREL	17
-++#define R_CRIS_32_PLT_GOTREL	18
-++#define R_CRIS_32_PLT_PCREL	19
-++
-++#define R_CRIS_NUM		20
-++
-++
-++/* AMD x86-64 relocations.  */
-++#define R_X86_64_NONE		0	/* No reloc */
-++#define R_X86_64_64		1	/* Direct 64 bit  */
-++#define R_X86_64_PC32		2	/* PC relative 32 bit signed */
-++#define R_X86_64_GOT32		3	/* 32 bit GOT entry */
-++#define R_X86_64_PLT32		4	/* 32 bit PLT address */
-++#define R_X86_64_COPY		5	/* Copy symbol at runtime */
-++#define R_X86_64_GLOB_DAT	6	/* Create GOT entry */
-++#define R_X86_64_JUMP_SLOT	7	/* Create PLT entry */
-++#define R_X86_64_RELATIVE	8	/* Adjust by program base */
-++#define R_X86_64_GOTPCREL	9	/* 32 bit signed PC relative
-++					   offset to GOT */
-++#define R_X86_64_32		10	/* Direct 32 bit zero extended */
-++#define R_X86_64_32S		11	/* Direct 32 bit sign extended */
-++#define R_X86_64_16		12	/* Direct 16 bit zero extended */
-++#define R_X86_64_PC16		13	/* 16 bit sign extended pc relative */
-++#define R_X86_64_8		14	/* Direct 8 bit sign extended  */
-++#define R_X86_64_PC8		15	/* 8 bit sign extended pc relative */
-++#define R_X86_64_DTPMOD64	16	/* ID of module containing symbol */
-++#define R_X86_64_DTPOFF64	17	/* Offset in module's TLS block */
-++#define R_X86_64_TPOFF64	18	/* Offset in initial TLS block */
-++#define R_X86_64_TLSGD		19	/* 32 bit signed PC relative offset
-++					   to two GOT entries for GD symbol */
-++#define R_X86_64_TLSLD		20	/* 32 bit signed PC relative offset
-++					   to two GOT entries for LD symbol */
-++#define R_X86_64_DTPOFF32	21	/* Offset in TLS block */
-++#define R_X86_64_GOTTPOFF	22	/* 32 bit signed PC relative offset
-++					   to GOT entry for IE symbol */
-++#define R_X86_64_TPOFF32	23	/* Offset in initial TLS block */
-++#define R_X86_64_PC64		24	/* PC relative 64 bit */
-++#define R_X86_64_GOTOFF64	25	/* 64 bit offset to GOT */
-++#define R_X86_64_GOTPC32	26	/* 32 bit signed pc relative
-++					   offset to GOT */
-++#define R_X86_64_GOT64		27	/* 64-bit GOT entry offset */
-++#define R_X86_64_GOTPCREL64	28	/* 64-bit PC relative offset
-++					   to GOT entry */
-++#define R_X86_64_GOTPC64	29	/* 64-bit PC relative offset to GOT */
-++#define R_X86_64_GOTPLT64	30 	/* like GOT64, says PLT entry needed */
-++#define R_X86_64_PLTOFF64	31	/* 64-bit GOT relative offset
-++					   to PLT entry */
-++#define R_X86_64_SIZE32		32	/* Size of symbol plus 32-bit addend */
-++#define R_X86_64_SIZE64		33	/* Size of symbol plus 64-bit addend */
-++#define R_X86_64_GOTPC32_TLSDESC 34	/* GOT offset for TLS descriptor.  */
-++#define R_X86_64_TLSDESC_CALL   35	/* Marker for call through TLS
-++					   descriptor.  */
-++#define R_X86_64_TLSDESC        36	/* TLS descriptor.  */
-++#define R_X86_64_IRELATIVE	37	/* Adjust indirectly by program base */
-++#define R_X86_64_RELATIVE64	38	/* 64-bit adjust by program base */
-++
-++#define R_X86_64_NUM		39
-++
-++
-++/* AM33 relocations.  */
-++#define R_MN10300_NONE		0	/* No reloc.  */
-++#define R_MN10300_32		1	/* Direct 32 bit.  */
-++#define R_MN10300_16		2	/* Direct 16 bit.  */
-++#define R_MN10300_8		3	/* Direct 8 bit.  */
-++#define R_MN10300_PCREL32	4	/* PC-relative 32-bit.  */
-++#define R_MN10300_PCREL16	5	/* PC-relative 16-bit signed.  */
-++#define R_MN10300_PCREL8	6	/* PC-relative 8-bit signed.  */
-++#define R_MN10300_GNU_VTINHERIT	7	/* Ancient C++ vtable garbage... */
-++#define R_MN10300_GNU_VTENTRY	8	/* ... collection annotation.  */
-++#define R_MN10300_24		9	/* Direct 24 bit.  */
-++#define R_MN10300_GOTPC32	10	/* 32-bit PCrel offset to GOT.  */
-++#define R_MN10300_GOTPC16	11	/* 16-bit PCrel offset to GOT.  */
-++#define R_MN10300_GOTOFF32	12	/* 32-bit offset from GOT.  */
-++#define R_MN10300_GOTOFF24	13	/* 24-bit offset from GOT.  */
-++#define R_MN10300_GOTOFF16	14	/* 16-bit offset from GOT.  */
-++#define R_MN10300_PLT32		15	/* 32-bit PCrel to PLT entry.  */
-++#define R_MN10300_PLT16		16	/* 16-bit PCrel to PLT entry.  */
-++#define R_MN10300_GOT32		17	/* 32-bit offset to GOT entry.  */
-++#define R_MN10300_GOT24		18	/* 24-bit offset to GOT entry.  */
-++#define R_MN10300_GOT16		19	/* 16-bit offset to GOT entry.  */
-++#define R_MN10300_COPY		20	/* Copy symbol at runtime.  */
-++#define R_MN10300_GLOB_DAT	21	/* Create GOT entry.  */
-++#define R_MN10300_JMP_SLOT	22	/* Create PLT entry.  */
-++#define R_MN10300_RELATIVE	23	/* Adjust by program base.  */
-++
-++#define R_MN10300_NUM		24
-++
-++
-++/* M32R relocs.  */
-++#define R_M32R_NONE		0	/* No reloc. */
-++#define R_M32R_16		1	/* Direct 16 bit. */
-++#define R_M32R_32		2	/* Direct 32 bit. */
-++#define R_M32R_24		3	/* Direct 24 bit. */
-++#define R_M32R_10_PCREL		4	/* PC relative 10 bit shifted. */
-++#define R_M32R_18_PCREL		5	/* PC relative 18 bit shifted. */
-++#define R_M32R_26_PCREL		6	/* PC relative 26 bit shifted. */
-++#define R_M32R_HI16_ULO		7	/* High 16 bit with unsigned low. */
-++#define R_M32R_HI16_SLO		8	/* High 16 bit with signed low. */
-++#define R_M32R_LO16		9	/* Low 16 bit. */
-++#define R_M32R_SDA16		10	/* 16 bit offset in SDA. */
-++#define R_M32R_GNU_VTINHERIT	11
-++#define R_M32R_GNU_VTENTRY	12
-++/* M32R relocs use SHT_RELA.  */
-++#define R_M32R_16_RELA		33	/* Direct 16 bit. */
-++#define R_M32R_32_RELA		34	/* Direct 32 bit. */
-++#define R_M32R_24_RELA		35	/* Direct 24 bit. */
-++#define R_M32R_10_PCREL_RELA	36	/* PC relative 10 bit shifted. */
-++#define R_M32R_18_PCREL_RELA	37	/* PC relative 18 bit shifted. */
-++#define R_M32R_26_PCREL_RELA	38	/* PC relative 26 bit shifted. */
-++#define R_M32R_HI16_ULO_RELA	39	/* High 16 bit with unsigned low */
-++#define R_M32R_HI16_SLO_RELA	40	/* High 16 bit with signed low */
-++#define R_M32R_LO16_RELA	41	/* Low 16 bit */
-++#define R_M32R_SDA16_RELA	42	/* 16 bit offset in SDA */
-++#define R_M32R_RELA_GNU_VTINHERIT	43
-++#define R_M32R_RELA_GNU_VTENTRY	44
-++#define R_M32R_REL32		45	/* PC relative 32 bit.  */
-++
-++#define R_M32R_GOT24		48	/* 24 bit GOT entry */
-++#define R_M32R_26_PLTREL	49	/* 26 bit PC relative to PLT shifted */
-++#define R_M32R_COPY		50	/* Copy symbol at runtime */
-++#define R_M32R_GLOB_DAT		51	/* Create GOT entry */
-++#define R_M32R_JMP_SLOT		52	/* Create PLT entry */
-++#define R_M32R_RELATIVE		53	/* Adjust by program base */
-++#define R_M32R_GOTOFF		54	/* 24 bit offset to GOT */
-++#define R_M32R_GOTPC24		55	/* 24 bit PC relative offset to GOT */
-++#define R_M32R_GOT16_HI_ULO	56	/* High 16 bit GOT entry with unsigned
-++					   low */
-++#define R_M32R_GOT16_HI_SLO	57	/* High 16 bit GOT entry with signed
-++					   low */
-++#define R_M32R_GOT16_LO		58	/* Low 16 bit GOT entry */
-++#define R_M32R_GOTPC_HI_ULO	59	/* High 16 bit PC relative offset to
-++					   GOT with unsigned low */
-++#define R_M32R_GOTPC_HI_SLO	60	/* High 16 bit PC relative offset to
-++					   GOT with signed low */
-++#define R_M32R_GOTPC_LO		61	/* Low 16 bit PC relative offset to
-++					   GOT */
-++#define R_M32R_GOTOFF_HI_ULO	62	/* High 16 bit offset to GOT
-++					   with unsigned low */
-++#define R_M32R_GOTOFF_HI_SLO	63	/* High 16 bit offset to GOT
-++					   with signed low */
-++#define R_M32R_GOTOFF_LO	64	/* Low 16 bit offset to GOT */
-++#define R_M32R_NUM		256	/* Keep this the last entry. */
-++
-++
-++/* TILEPro relocations.  */
-++#define R_TILEPRO_NONE		0	/* No reloc */
-++#define R_TILEPRO_32		1	/* Direct 32 bit */
-++#define R_TILEPRO_16		2	/* Direct 16 bit */
-++#define R_TILEPRO_8		3	/* Direct 8 bit */
-++#define R_TILEPRO_32_PCREL	4	/* PC relative 32 bit */
-++#define R_TILEPRO_16_PCREL	5	/* PC relative 16 bit */
-++#define R_TILEPRO_8_PCREL	6	/* PC relative 8 bit */
-++#define R_TILEPRO_LO16		7	/* Low 16 bit */
-++#define R_TILEPRO_HI16		8	/* High 16 bit */
-++#define R_TILEPRO_HA16		9	/* High 16 bit, adjusted */
-++#define R_TILEPRO_COPY		10	/* Copy relocation */
-++#define R_TILEPRO_GLOB_DAT	11	/* Create GOT entry */
-++#define R_TILEPRO_JMP_SLOT	12	/* Create PLT entry */
-++#define R_TILEPRO_RELATIVE	13	/* Adjust by program base */
-++#define R_TILEPRO_BROFF_X1	14	/* X1 pipe branch offset */
-++#define R_TILEPRO_JOFFLONG_X1	15	/* X1 pipe jump offset */
-++#define R_TILEPRO_JOFFLONG_X1_PLT 16	/* X1 pipe jump offset to PLT */
-++#define R_TILEPRO_IMM8_X0	17	/* X0 pipe 8-bit */
-++#define R_TILEPRO_IMM8_Y0	18	/* Y0 pipe 8-bit */
-++#define R_TILEPRO_IMM8_X1	19	/* X1 pipe 8-bit */
-++#define R_TILEPRO_IMM8_Y1	20	/* Y1 pipe 8-bit */
-++#define R_TILEPRO_MT_IMM15_X1	21	/* X1 pipe mtspr */
-++#define R_TILEPRO_MF_IMM15_X1	22	/* X1 pipe mfspr */
-++#define R_TILEPRO_IMM16_X0	23	/* X0 pipe 16-bit */
-++#define R_TILEPRO_IMM16_X1	24	/* X1 pipe 16-bit */
-++#define R_TILEPRO_IMM16_X0_LO	25	/* X0 pipe low 16-bit */
-++#define R_TILEPRO_IMM16_X1_LO	26	/* X1 pipe low 16-bit */
-++#define R_TILEPRO_IMM16_X0_HI	27	/* X0 pipe high 16-bit */
-++#define R_TILEPRO_IMM16_X1_HI	28	/* X1 pipe high 16-bit */
-++#define R_TILEPRO_IMM16_X0_HA	29	/* X0 pipe high 16-bit, adjusted */
-++#define R_TILEPRO_IMM16_X1_HA	30	/* X1 pipe high 16-bit, adjusted */
-++#define R_TILEPRO_IMM16_X0_PCREL 31	/* X0 pipe PC relative 16 bit */
-++#define R_TILEPRO_IMM16_X1_PCREL 32	/* X1 pipe PC relative 16 bit */
-++#define R_TILEPRO_IMM16_X0_LO_PCREL 33	/* X0 pipe PC relative low 16 bit */
-++#define R_TILEPRO_IMM16_X1_LO_PCREL 34	/* X1 pipe PC relative low 16 bit */
-++#define R_TILEPRO_IMM16_X0_HI_PCREL 35	/* X0 pipe PC relative high 16 bit */
-++#define R_TILEPRO_IMM16_X1_HI_PCREL 36	/* X1 pipe PC relative high 16 bit */
-++#define R_TILEPRO_IMM16_X0_HA_PCREL 37	/* X0 pipe PC relative ha() 16 bit */
-++#define R_TILEPRO_IMM16_X1_HA_PCREL 38	/* X1 pipe PC relative ha() 16 bit */
-++#define R_TILEPRO_IMM16_X0_GOT	39	/* X0 pipe 16-bit GOT offset */
-++#define R_TILEPRO_IMM16_X1_GOT	40	/* X1 pipe 16-bit GOT offset */
-++#define R_TILEPRO_IMM16_X0_GOT_LO 41	/* X0 pipe low 16-bit GOT offset */
-++#define R_TILEPRO_IMM16_X1_GOT_LO 42	/* X1 pipe low 16-bit GOT offset */
-++#define R_TILEPRO_IMM16_X0_GOT_HI 43	/* X0 pipe high 16-bit GOT offset */
-++#define R_TILEPRO_IMM16_X1_GOT_HI 44	/* X1 pipe high 16-bit GOT offset */
-++#define R_TILEPRO_IMM16_X0_GOT_HA 45	/* X0 pipe ha() 16-bit GOT offset */
-++#define R_TILEPRO_IMM16_X1_GOT_HA 46	/* X1 pipe ha() 16-bit GOT offset */
-++#define R_TILEPRO_MMSTART_X0	47	/* X0 pipe mm "start" */
-++#define R_TILEPRO_MMEND_X0	48	/* X0 pipe mm "end" */
-++#define R_TILEPRO_MMSTART_X1	49	/* X1 pipe mm "start" */
-++#define R_TILEPRO_MMEND_X1	50	/* X1 pipe mm "end" */
-++#define R_TILEPRO_SHAMT_X0	51	/* X0 pipe shift amount */
-++#define R_TILEPRO_SHAMT_X1	52	/* X1 pipe shift amount */
-++#define R_TILEPRO_SHAMT_Y0	53	/* Y0 pipe shift amount */
-++#define R_TILEPRO_SHAMT_Y1	54	/* Y1 pipe shift amount */
-++#define R_TILEPRO_DEST_IMM8_X1	55	/* X1 pipe destination 8-bit */
-++/* Relocs 56-59 are currently not defined.  */
-++#define R_TILEPRO_TLS_GD_CALL	60	/* "jal" for TLS GD */
-++#define R_TILEPRO_IMM8_X0_TLS_GD_ADD 61	/* X0 pipe "addi" for TLS GD */
-++#define R_TILEPRO_IMM8_X1_TLS_GD_ADD 62	/* X1 pipe "addi" for TLS GD */
-++#define R_TILEPRO_IMM8_Y0_TLS_GD_ADD 63	/* Y0 pipe "addi" for TLS GD */
-++#define R_TILEPRO_IMM8_Y1_TLS_GD_ADD 64	/* Y1 pipe "addi" for TLS GD */
-++#define R_TILEPRO_TLS_IE_LOAD	65	/* "lw_tls" for TLS IE */
-++#define R_TILEPRO_IMM16_X0_TLS_GD 66	/* X0 pipe 16-bit TLS GD offset */
-++#define R_TILEPRO_IMM16_X1_TLS_GD 67	/* X1 pipe 16-bit TLS GD offset */
-++#define R_TILEPRO_IMM16_X0_TLS_GD_LO 68	/* X0 pipe low 16-bit TLS GD offset */
-++#define R_TILEPRO_IMM16_X1_TLS_GD_LO 69	/* X1 pipe low 16-bit TLS GD offset */
-++#define R_TILEPRO_IMM16_X0_TLS_GD_HI 70	/* X0 pipe high 16-bit TLS GD offset */
-++#define R_TILEPRO_IMM16_X1_TLS_GD_HI 71	/* X1 pipe high 16-bit TLS GD offset */
-++#define R_TILEPRO_IMM16_X0_TLS_GD_HA 72	/* X0 pipe ha() 16-bit TLS GD offset */
-++#define R_TILEPRO_IMM16_X1_TLS_GD_HA 73	/* X1 pipe ha() 16-bit TLS GD offset */
-++#define R_TILEPRO_IMM16_X0_TLS_IE 74	/* X0 pipe 16-bit TLS IE offset */
-++#define R_TILEPRO_IMM16_X1_TLS_IE 75	/* X1 pipe 16-bit TLS IE offset */
-++#define R_TILEPRO_IMM16_X0_TLS_IE_LO 76	/* X0 pipe low 16-bit TLS IE offset */
-++#define R_TILEPRO_IMM16_X1_TLS_IE_LO 77	/* X1 pipe low 16-bit TLS IE offset */
-++#define R_TILEPRO_IMM16_X0_TLS_IE_HI 78	/* X0 pipe high 16-bit TLS IE offset */
-++#define R_TILEPRO_IMM16_X1_TLS_IE_HI 79	/* X1 pipe high 16-bit TLS IE offset */
-++#define R_TILEPRO_IMM16_X0_TLS_IE_HA 80	/* X0 pipe ha() 16-bit TLS IE offset */
-++#define R_TILEPRO_IMM16_X1_TLS_IE_HA 81	/* X1 pipe ha() 16-bit TLS IE offset */
-++#define R_TILEPRO_TLS_DTPMOD32	82	/* ID of module containing symbol */
-++#define R_TILEPRO_TLS_DTPOFF32	83	/* Offset in TLS block */
-++#define R_TILEPRO_TLS_TPOFF32	84	/* Offset in static TLS block */
-++#define R_TILEPRO_IMM16_X0_TLS_LE 85	/* X0 pipe 16-bit TLS LE offset */
-++#define R_TILEPRO_IMM16_X1_TLS_LE 86	/* X1 pipe 16-bit TLS LE offset */
-++#define R_TILEPRO_IMM16_X0_TLS_LE_LO 87	/* X0 pipe low 16-bit TLS LE offset */
-++#define R_TILEPRO_IMM16_X1_TLS_LE_LO 88	/* X1 pipe low 16-bit TLS LE offset */
-++#define R_TILEPRO_IMM16_X0_TLS_LE_HI 89	/* X0 pipe high 16-bit TLS LE offset */
-++#define R_TILEPRO_IMM16_X1_TLS_LE_HI 90	/* X1 pipe high 16-bit TLS LE offset */
-++#define R_TILEPRO_IMM16_X0_TLS_LE_HA 91	/* X0 pipe ha() 16-bit TLS LE offset */
-++#define R_TILEPRO_IMM16_X1_TLS_LE_HA 92	/* X1 pipe ha() 16-bit TLS LE offset */
-++
-++#define R_TILEPRO_GNU_VTINHERIT	128	/* GNU C++ vtable hierarchy */
-++#define R_TILEPRO_GNU_VTENTRY	129	/* GNU C++ vtable member usage */
-++
-++#define R_TILEPRO_NUM		130
-++
-++
-++/* TILE-Gx relocations.  */
-++#define R_TILEGX_NONE		0	/* No reloc */
-++#define R_TILEGX_64		1	/* Direct 64 bit */
-++#define R_TILEGX_32		2	/* Direct 32 bit */
-++#define R_TILEGX_16		3	/* Direct 16 bit */
-++#define R_TILEGX_8		4	/* Direct 8 bit */
-++#define R_TILEGX_64_PCREL	5	/* PC relative 64 bit */
-++#define R_TILEGX_32_PCREL	6	/* PC relative 32 bit */
-++#define R_TILEGX_16_PCREL	7	/* PC relative 16 bit */
-++#define R_TILEGX_8_PCREL	8	/* PC relative 8 bit */
-++#define R_TILEGX_HW0		9	/* hword 0 16-bit */
-++#define R_TILEGX_HW1		10	/* hword 1 16-bit */
-++#define R_TILEGX_HW2		11	/* hword 2 16-bit */
-++#define R_TILEGX_HW3		12	/* hword 3 16-bit */
-++#define R_TILEGX_HW0_LAST	13	/* last hword 0 16-bit */
-++#define R_TILEGX_HW1_LAST	14	/* last hword 1 16-bit */
-++#define R_TILEGX_HW2_LAST	15	/* last hword 2 16-bit */
-++#define R_TILEGX_COPY		16	/* Copy relocation */
-++#define R_TILEGX_GLOB_DAT	17	/* Create GOT entry */
-++#define R_TILEGX_JMP_SLOT	18	/* Create PLT entry */
-++#define R_TILEGX_RELATIVE	19	/* Adjust by program base */
-++#define R_TILEGX_BROFF_X1	20	/* X1 pipe branch offset */
-++#define R_TILEGX_JUMPOFF_X1	21	/* X1 pipe jump offset */
-++#define R_TILEGX_JUMPOFF_X1_PLT	22	/* X1 pipe jump offset to PLT */
-++#define R_TILEGX_IMM8_X0	23	/* X0 pipe 8-bit */
-++#define R_TILEGX_IMM8_Y0	24	/* Y0 pipe 8-bit */
-++#define R_TILEGX_IMM8_X1	25	/* X1 pipe 8-bit */
-++#define R_TILEGX_IMM8_Y1	26	/* Y1 pipe 8-bit */
-++#define R_TILEGX_DEST_IMM8_X1	27	/* X1 pipe destination 8-bit */
-++#define R_TILEGX_MT_IMM14_X1	28	/* X1 pipe mtspr */
-++#define R_TILEGX_MF_IMM14_X1	29	/* X1 pipe mfspr */
-++#define R_TILEGX_MMSTART_X0	30	/* X0 pipe mm "start" */
-++#define R_TILEGX_MMEND_X0	31	/* X0 pipe mm "end" */
-++#define R_TILEGX_SHAMT_X0	32	/* X0 pipe shift amount */
-++#define R_TILEGX_SHAMT_X1	33	/* X1 pipe shift amount */
-++#define R_TILEGX_SHAMT_Y0	34	/* Y0 pipe shift amount */
-++#define R_TILEGX_SHAMT_Y1	35	/* Y1 pipe shift amount */
-++#define R_TILEGX_IMM16_X0_HW0	36	/* X0 pipe hword 0 */
-++#define R_TILEGX_IMM16_X1_HW0	37	/* X1 pipe hword 0 */
-++#define R_TILEGX_IMM16_X0_HW1	38	/* X0 pipe hword 1 */
-++#define R_TILEGX_IMM16_X1_HW1	39	/* X1 pipe hword 1 */
-++#define R_TILEGX_IMM16_X0_HW2	40	/* X0 pipe hword 2 */
-++#define R_TILEGX_IMM16_X1_HW2	41	/* X1 pipe hword 2 */
-++#define R_TILEGX_IMM16_X0_HW3	42	/* X0 pipe hword 3 */
-++#define R_TILEGX_IMM16_X1_HW3	43	/* X1 pipe hword 3 */
-++#define R_TILEGX_IMM16_X0_HW0_LAST 44	/* X0 pipe last hword 0 */
-++#define R_TILEGX_IMM16_X1_HW0_LAST 45	/* X1 pipe last hword 0 */
-++#define R_TILEGX_IMM16_X0_HW1_LAST 46	/* X0 pipe last hword 1 */
-++#define R_TILEGX_IMM16_X1_HW1_LAST 47	/* X1 pipe last hword 1 */
-++#define R_TILEGX_IMM16_X0_HW2_LAST 48	/* X0 pipe last hword 2 */
-++#define R_TILEGX_IMM16_X1_HW2_LAST 49	/* X1 pipe last hword 2 */
-++#define R_TILEGX_IMM16_X0_HW0_PCREL 50	/* X0 pipe PC relative hword 0 */
-++#define R_TILEGX_IMM16_X1_HW0_PCREL 51	/* X1 pipe PC relative hword 0 */
-++#define R_TILEGX_IMM16_X0_HW1_PCREL 52	/* X0 pipe PC relative hword 1 */
-++#define R_TILEGX_IMM16_X1_HW1_PCREL 53	/* X1 pipe PC relative hword 1 */
-++#define R_TILEGX_IMM16_X0_HW2_PCREL 54	/* X0 pipe PC relative hword 2 */
-++#define R_TILEGX_IMM16_X1_HW2_PCREL 55	/* X1 pipe PC relative hword 2 */
-++#define R_TILEGX_IMM16_X0_HW3_PCREL 56	/* X0 pipe PC relative hword 3 */
-++#define R_TILEGX_IMM16_X1_HW3_PCREL 57	/* X1 pipe PC relative hword 3 */
-++#define R_TILEGX_IMM16_X0_HW0_LAST_PCREL 58 /* X0 pipe PC-rel last hword 0 */
-++#define R_TILEGX_IMM16_X1_HW0_LAST_PCREL 59 /* X1 pipe PC-rel last hword 0 */
-++#define R_TILEGX_IMM16_X0_HW1_LAST_PCREL 60 /* X0 pipe PC-rel last hword 1 */
-++#define R_TILEGX_IMM16_X1_HW1_LAST_PCREL 61 /* X1 pipe PC-rel last hword 1 */
-++#define R_TILEGX_IMM16_X0_HW2_LAST_PCREL 62 /* X0 pipe PC-rel last hword 2 */
-++#define R_TILEGX_IMM16_X1_HW2_LAST_PCREL 63 /* X1 pipe PC-rel last hword 2 */
-++#define R_TILEGX_IMM16_X0_HW0_GOT 64	/* X0 pipe hword 0 GOT offset */
-++#define R_TILEGX_IMM16_X1_HW0_GOT 65	/* X1 pipe hword 0 GOT offset */
-++/* Relocs 66-71 are currently not defined.  */
-++#define R_TILEGX_IMM16_X0_HW0_LAST_GOT 72 /* X0 pipe last hword 0 GOT offset */
-++#define R_TILEGX_IMM16_X1_HW0_LAST_GOT 73 /* X1 pipe last hword 0 GOT offset */
-++#define R_TILEGX_IMM16_X0_HW1_LAST_GOT 74 /* X0 pipe last hword 1 GOT offset */
-++#define R_TILEGX_IMM16_X1_HW1_LAST_GOT 75 /* X1 pipe last hword 1 GOT offset */
-++/* Relocs 76-77 are currently not defined.  */
-++#define R_TILEGX_IMM16_X0_HW0_TLS_GD 78	/* X0 pipe hword 0 TLS GD offset */
-++#define R_TILEGX_IMM16_X1_HW0_TLS_GD 79	/* X1 pipe hword 0 TLS GD offset */
-++#define R_TILEGX_IMM16_X0_HW0_TLS_LE 80	/* X0 pipe hword 0 TLS LE offset */
-++#define R_TILEGX_IMM16_X1_HW0_TLS_LE 81	/* X1 pipe hword 0 TLS LE offset */
-++#define R_TILEGX_IMM16_X0_HW0_LAST_TLS_LE 82 /* X0 pipe last hword 0 LE off */
-++#define R_TILEGX_IMM16_X1_HW0_LAST_TLS_LE 83 /* X1 pipe last hword 0 LE off */
-++#define R_TILEGX_IMM16_X0_HW1_LAST_TLS_LE 84 /* X0 pipe last hword 1 LE off */
-++#define R_TILEGX_IMM16_X1_HW1_LAST_TLS_LE 85 /* X1 pipe last hword 1 LE off */
-++#define R_TILEGX_IMM16_X0_HW0_LAST_TLS_GD 86 /* X0 pipe last hword 0 GD off */
-++#define R_TILEGX_IMM16_X1_HW0_LAST_TLS_GD 87 /* X1 pipe last hword 0 GD off */
-++#define R_TILEGX_IMM16_X0_HW1_LAST_TLS_GD 88 /* X0 pipe last hword 1 GD off */
-++#define R_TILEGX_IMM16_X1_HW1_LAST_TLS_GD 89 /* X1 pipe last hword 1 GD off */
-++/* Relocs 90-91 are currently not defined.  */
-++#define R_TILEGX_IMM16_X0_HW0_TLS_IE 92	/* X0 pipe hword 0 TLS IE offset */
-++#define R_TILEGX_IMM16_X1_HW0_TLS_IE 93	/* X1 pipe hword 0 TLS IE offset */
-++/* Relocs 94-99 are currently not defined.  */
-++#define R_TILEGX_IMM16_X0_HW0_LAST_TLS_IE 100 /* X0 pipe last hword 0 IE off */
-++#define R_TILEGX_IMM16_X1_HW0_LAST_TLS_IE 101 /* X1 pipe last hword 0 IE off */
-++#define R_TILEGX_IMM16_X0_HW1_LAST_TLS_IE 102 /* X0 pipe last hword 1 IE off */
-++#define R_TILEGX_IMM16_X1_HW1_LAST_TLS_IE 103 /* X1 pipe last hword 1 IE off */
-++/* Relocs 104-105 are currently not defined.  */
-++#define R_TILEGX_TLS_DTPMOD64	106	/* 64-bit ID of symbol's module */
-++#define R_TILEGX_TLS_DTPOFF64	107	/* 64-bit offset in TLS block */
-++#define R_TILEGX_TLS_TPOFF64	108	/* 64-bit offset in static TLS block */
-++#define R_TILEGX_TLS_DTPMOD32	109	/* 32-bit ID of symbol's module */
-++#define R_TILEGX_TLS_DTPOFF32	110	/* 32-bit offset in TLS block */
-++#define R_TILEGX_TLS_TPOFF32	111	/* 32-bit offset in static TLS block */
-++#define R_TILEGX_TLS_GD_CALL	112	/* "jal" for TLS GD */
-++#define R_TILEGX_IMM8_X0_TLS_GD_ADD 113	/* X0 pipe "addi" for TLS GD */
-++#define R_TILEGX_IMM8_X1_TLS_GD_ADD 114	/* X1 pipe "addi" for TLS GD */
-++#define R_TILEGX_IMM8_Y0_TLS_GD_ADD 115	/* Y0 pipe "addi" for TLS GD */
-++#define R_TILEGX_IMM8_Y1_TLS_GD_ADD 116	/* Y1 pipe "addi" for TLS GD */
-++#define R_TILEGX_TLS_IE_LOAD	117	/* "ld_tls" for TLS IE */
-++#define R_TILEGX_IMM8_X0_TLS_ADD 118	/* X0 pipe "addi" for TLS GD/IE */
-++#define R_TILEGX_IMM8_X1_TLS_ADD 119	/* X1 pipe "addi" for TLS GD/IE */
-++#define R_TILEGX_IMM8_Y0_TLS_ADD 120	/* Y0 pipe "addi" for TLS GD/IE */
-++#define R_TILEGX_IMM8_Y1_TLS_ADD 121	/* Y1 pipe "addi" for TLS GD/IE */
-++
-++#define R_TILEGX_GNU_VTINHERIT	128	/* GNU C++ vtable hierarchy */
-++#define R_TILEGX_GNU_VTENTRY	129	/* GNU C++ vtable member usage */
-++
-++#define R_TILEGX_NUM		130
-++
-++#endif	/* elf.h */
-+--- a/scripts/mod/mk_elfconfig.c
-++++ b/scripts/mod/mk_elfconfig.c
-+@@ -2,7 +2,11 @@
-+ #include <stdio.h>
-+ #include <stdlib.h>
-+ #include <string.h>
-++#ifndef __APPLE__
-+ #include <elf.h>
-++#else
-++#include "elf.h"
-++#endif
-+ 
-+ int
-+ main(int argc, char **argv)
-+--- a/scripts/mod/modpost.h
-++++ b/scripts/mod/modpost.h
-+@@ -8,7 +8,11 @@
-+ #include <sys/mman.h>
-+ #include <fcntl.h>
-+ #include <unistd.h>
-++#if !(defined(__APPLE__) || defined(__CYGWIN__))
-+ #include <elf.h>
-++#else
-++#include "elf.h"
-++#endif
-+ 
-+ #include "elfconfig.h"
-+ 
-diff --git a/target/linux/generic/hack-5.10/211-darwin-uuid-typedef-clash.patch b/target/linux/generic/hack-5.10/211-darwin-uuid-typedef-clash.patch
-new file mode 100644
-index 0000000000..50a6227148
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/211-darwin-uuid-typedef-clash.patch
-@@ -0,0 +1,22 @@
-+From e44fc2af1ddc452b6659d08c16973d65c73b7d0a Mon Sep 17 00:00:00 2001
-+From: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
-+Date: Wed, 5 Feb 2020 18:36:43 +0000
-+Subject: [PATCH] file2alias: build on macos
-+
-+Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
-+---
-+ scripts/mod/file2alias.c | 3 +++
-+ 1 file changed, 3 insertions(+)
-+
-+--- a/scripts/mod/file2alias.c
-++++ b/scripts/mod/file2alias.c
-+@@ -38,6 +38,9 @@ typedef struct {
-+ 	__u8 b[16];
-+ } guid_t;
-+ 
-++#ifdef __APPLE__
-++#define uuid_t compat_uuid_t
-++#endif
-+ /* backwards compatibility, don't use in new code */
-+ typedef struct {
-+ 	__u8 b[16];
-diff --git a/target/linux/generic/hack-5.10/212-tools_portability.patch b/target/linux/generic/hack-5.10/212-tools_portability.patch
-new file mode 100644
-index 0000000000..0d8eb6fb9d
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/212-tools_portability.patch
-@@ -0,0 +1,110 @@
-+From 48232d3d931c95953ce2ddfe7da7bb164aef6a73 Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Fri, 7 Jul 2017 17:03:16 +0200
-+Subject: fix portability of some includes files in tools/ used on the host
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ tools/include/tools/be_byteshift.h |  4 ++++
-+ tools/include/tools/le_byteshift.h |  4 ++++
-+ tools/include/tools/linux_types.h  | 22 ++++++++++++++++++++++
-+ 3 files changed, 30 insertions(+)
-+ create mode 100644 tools/include/tools/linux_types.h
-+
-+--- a/tools/include/tools/be_byteshift.h
-++++ b/tools/include/tools/be_byteshift.h
-+@@ -2,6 +2,10 @@
-+ #ifndef _TOOLS_BE_BYTESHIFT_H
-+ #define _TOOLS_BE_BYTESHIFT_H
-+ 
-++#ifndef __linux__
-++#include "linux_types.h"
-++#endif
-++
-+ #include <stdint.h>
-+ 
-+ static inline uint16_t __get_unaligned_be16(const uint8_t *p)
-+--- a/tools/include/tools/le_byteshift.h
-++++ b/tools/include/tools/le_byteshift.h
-+@@ -2,6 +2,10 @@
-+ #ifndef _TOOLS_LE_BYTESHIFT_H
-+ #define _TOOLS_LE_BYTESHIFT_H
-+ 
-++#ifndef __linux__
-++#include "linux_types.h"
-++#endif
-++
-+ #include <stdint.h>
-+ 
-+ static inline uint16_t __get_unaligned_le16(const uint8_t *p)
-+--- /dev/null
-++++ b/tools/include/tools/linux_types.h
-+@@ -0,0 +1,26 @@
-++#ifndef __LINUX_TYPES_H
-++#define __LINUX_TYPES_H
-++
-++#include <stdint.h>
-++
-++typedef int8_t __s8;
-++typedef uint8_t __u8;
-++typedef uint8_t __be8;
-++typedef uint8_t __le8;
-++
-++typedef int16_t __s16;
-++typedef uint16_t __u16;
-++typedef uint16_t __be16;
-++typedef uint16_t __le16;
-++
-++typedef int32_t __s32;
-++typedef uint32_t __u32;
-++typedef uint32_t __be32;
-++typedef uint32_t __le32;
-++
-++typedef int64_t __s64;
-++typedef uint64_t __u64;
-++typedef uint64_t __be64;
-++typedef uint64_t __le64;
-++
-++#endif
-+--- a/tools/include/linux/types.h
-++++ b/tools/include/linux/types.h
-+@@ -7,8 +7,12 @@
-+ #include <stdint.h>
-+ 
-+ #define __SANE_USERSPACE_TYPES__	/* For PPC64, to get LL64 types */
-++#ifndef __linux__
-++#include <tools/linux_types.h>
-++#else
-+ #include <asm/types.h>
-+ #include <asm/posix_types.h>
-++#endif
-+ 
-+ struct page;
-+ struct kmem_cache;
-+--- a/tools/perf/pmu-events/jevents.c
-++++ b/tools/perf/pmu-events/jevents.c
-+@@ -1,4 +1,6 @@
-++#ifdef __linux__
-+ #define  _XOPEN_SOURCE 500	/* needed for nftw() */
-++#endif
-+ #define  _GNU_SOURCE		/* needed for asprintf() */
-+ 
-+ /* Parse event JSON files */
-+@@ -35,6 +37,7 @@
-+ #include <stdlib.h>
-+ #include <errno.h>
-+ #include <string.h>
-++#include <strings.h>
-+ #include <ctype.h>
-+ #include <unistd.h>
-+ #include <stdarg.h>
-+--- a/tools/perf/pmu-events/json.c
-++++ b/tools/perf/pmu-events/json.c
-+@@ -38,7 +38,6 @@
-+ #include <unistd.h>
-+ #include "jsmn.h"
-+ #include "json.h"
-+-#include <linux/kernel.h>
-+ 
-+ 
-+ static char *mapfile(const char *fn, size_t *size)
-diff --git a/target/linux/generic/hack-5.10/214-spidev_h_portability.patch b/target/linux/generic/hack-5.10/214-spidev_h_portability.patch
-new file mode 100644
-index 0000000000..506d50ad4d
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/214-spidev_h_portability.patch
-@@ -0,0 +1,24 @@
-+From be9be95ff10e16a5b4ad36f903978d0cc5747024 Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Fri, 7 Jul 2017 17:04:08 +0200
-+Subject: kernel: fix linux/spi/spidev.h portability issues with musl
-+
-+Felix will try to get this define included into musl
-+
-+lede-commit: 795e7cf60de19e7a076a46874fab7bb88b43bbff
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ include/uapi/linux/spi/spidev.h | 2 +-
-+ 1 file changed, 1 insertion(+), 1 deletion(-)
-+
-+--- a/include/uapi/linux/spi/spidev.h
-++++ b/include/uapi/linux/spi/spidev.h
-+@@ -121,7 +121,7 @@ struct spi_ioc_transfer {
-+ 
-+ /* not all platforms use <asm-generic/ioctl.h> or _IOC_TYPECHECK() ... */
-+ #define SPI_MSGSIZE(N) \
-+-	((((N)*(sizeof (struct spi_ioc_transfer))) < (1 << _IOC_SIZEBITS)) \
-++	((((N)*(sizeof (struct spi_ioc_transfer))) < (1 << 13)) \
-+ 		? ((N)*(sizeof (struct spi_ioc_transfer))) : 0)
-+ #define SPI_IOC_MESSAGE(N) _IOW(SPI_IOC_MAGIC, 0, char[SPI_MSGSIZE(N)])
-+ 
-diff --git a/target/linux/generic/hack-5.10/220-gc_sections.patch b/target/linux/generic/hack-5.10/220-gc_sections.patch
-new file mode 100644
-index 0000000000..810c5aecf5
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/220-gc_sections.patch
-@@ -0,0 +1,120 @@
-+From e3d8676f5722b7622685581e06e8f53e6138e3ab Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Sat, 15 Jul 2017 23:42:36 +0200
-+Subject: use -ffunction-sections, -fdata-sections and --gc-sections
-+
-+In combination with kernel symbol export stripping this significantly reduces
-+the kernel image size. Used on both ARM and MIPS architectures.
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
-+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-+---
-+--- a/arch/arm/Kconfig
-++++ b/arch/arm/Kconfig
-+@@ -113,6 +113,7 @@ config ARM
-+ 	select HAVE_UID16
-+ 	select HAVE_VIRT_CPU_ACCOUNTING_GEN
-+ 	select IRQ_FORCED_THREADING
-++	select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
-+ 	select MODULES_USE_ELF_REL
-+ 	select NEED_DMA_MAP_STATE
-+ 	select OF_EARLY_FLATTREE if OF
-+--- a/arch/arm/boot/compressed/Makefile
-++++ b/arch/arm/boot/compressed/Makefile
-+@@ -98,6 +98,7 @@ $(foreach o, $(libfdt_objs) atags_to_fdt
-+ ifdef building_out_of_srctree
-+ $(shell rm -f $(addprefix $(obj)/, fdt_rw.c fdt_ro.c fdt_wip.c fdt.c))
-+ endif
-++KBUILD_CFLAGS_KERNEL := $(patsubst -f%-sections,,$(KBUILD_CFLAGS_KERNEL))
-+ 
-+ targets       := vmlinux vmlinux.lds piggy_data piggy.o \
-+ 		 lib1funcs.o ashldi3.o bswapsdi2.o \
-+--- a/arch/arm/kernel/vmlinux.lds.S
-++++ b/arch/arm/kernel/vmlinux.lds.S
-+@@ -100,24 +100,24 @@ SECTIONS
-+ 	}
-+ 	.init.arch.info : {
-+ 		__arch_info_begin = .;
-+-		*(.arch.info.init)
-++		KEEP(*(.arch.info.init))
-+ 		__arch_info_end = .;
-+ 	}
-+ 	.init.tagtable : {
-+ 		__tagtable_begin = .;
-+-		*(.taglist.init)
-++		KEEP(*(.taglist.init))
-+ 		__tagtable_end = .;
-+ 	}
-+ #ifdef CONFIG_SMP_ON_UP
-+ 	.init.smpalt : {
-+ 		__smpalt_begin = .;
-+-		*(.alt.smp.init)
-++		KEEP(*(.alt.smp.init))
-+ 		__smpalt_end = .;
-+ 	}
-+ #endif
-+ 	.init.pv_table : {
-+ 		__pv_table_begin = .;
-+-		*(.pv_table)
-++		KEEP(*(.pv_table))
-+ 		__pv_table_end = .;
-+ 	}
-+ 
-+--- a/arch/arm/include/asm/vmlinux.lds.h
-++++ b/arch/arm/include/asm/vmlinux.lds.h
-+@@ -23,19 +23,19 @@
-+ #define ARM_MMU_DISCARD(x)
-+ #else
-+ #define ARM_MMU_KEEP(x)
-+-#define ARM_MMU_DISCARD(x)	x
-++#define ARM_MMU_DISCARD(x)	KEEP(x)
-+ #endif
-+ 
-+ #define PROC_INFO							\
-+ 		. = ALIGN(4);						\
-+ 		__proc_info_begin = .;					\
-+-		*(.proc.info.init)					\
-++		KEEP(*(.proc.info.init))				\
-+ 		__proc_info_end = .;
-+ 
-+ #define IDMAP_TEXT							\
-+ 		ALIGN_FUNCTION();					\
-+ 		__idmap_text_start = .;					\
-+-		*(.idmap.text)						\
-++		KEEP(*(.idmap.text))					\
-+ 		__idmap_text_end = .;					\
-+ 
-+ #define ARM_DISCARD							\
-+@@ -96,12 +96,12 @@
-+ 	. = ALIGN(8);							\
-+ 	.ARM.unwind_idx : {						\
-+ 		__start_unwind_idx = .;					\
-+-		*(.ARM.exidx*)						\
-++		KEEP(*(.ARM.exidx*))					\
-+ 		__stop_unwind_idx = .;					\
-+ 	}								\
-+ 	.ARM.unwind_tab : {						\
-+ 		__start_unwind_tab = .;					\
-+-		*(.ARM.extab*)						\
-++		KEEP(*(.ARM.extab*))					\
-+ 		__stop_unwind_tab = .;					\
-+ 	}
-+ 
-+@@ -112,14 +112,14 @@
-+ #define ARM_VECTORS							\
-+ 	__vectors_start = .;						\
-+ 	.vectors 0xffff0000 : AT(__vectors_start) {			\
-+-		*(.vectors)						\
-++		KEEP(*(.vectors))					\
-+ 	}								\
-+ 	. = __vectors_start + SIZEOF(.vectors);				\
-+ 	__vectors_end = .;						\
-+ 									\
-+ 	__stubs_start = .;						\
-+ 	.stubs ADDR(.vectors) + 0x1000 : AT(__stubs_start) {		\
-+-		*(.stubs)						\
-++		KEEP(*(.stubs))						\
-+ 	}								\
-+ 	. = __stubs_start + SIZEOF(.stubs);				\
-+ 	__stubs_end = .;						\
-diff --git a/target/linux/generic/hack-5.10/221-module_exports.patch b/target/linux/generic/hack-5.10/221-module_exports.patch
-new file mode 100644
-index 0000000000..07885408f1
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/221-module_exports.patch
-@@ -0,0 +1,102 @@
-+From b14784e7883390c20ed3ff904892255404a5914b Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Fri, 7 Jul 2017 17:05:53 +0200
-+Subject: add an optional config option for stripping all unnecessary symbol exports from the kernel image
-+
-+lede-commit: bb5a40c64b7c4f4848509fa0a6625055fc9e66cc
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ include/asm-generic/vmlinux.lds.h | 18 +++++++++++++++---
-+ include/linux/export.h            |  9 ++++++++-
-+ scripts/Makefile.build            |  2 +-
-+ 3 files changed, 24 insertions(+), 5 deletions(-)
-+
-+--- a/include/asm-generic/vmlinux.lds.h
-++++ b/include/asm-generic/vmlinux.lds.h
-+@@ -81,6 +81,16 @@
-+ #define RO_EXCEPTION_TABLE
-+ #endif
-+ 
-++#ifndef SYMTAB_KEEP
-++#define SYMTAB_KEEP KEEP(*(SORT(___ksymtab+*)))
-++#define SYMTAB_KEEP_GPL KEEP(*(SORT(___ksymtab_gpl+*)))
-++#endif
-++
-++#ifndef SYMTAB_DISCARD
-++#define SYMTAB_DISCARD
-++#define SYMTAB_DISCARD_GPL
-++#endif
-++
-+ /* Align . to a 8 byte boundary equals to maximum function alignment. */
-+ #define ALIGN_FUNCTION()  . = ALIGN(8)
-+ 
-+@@ -473,14 +483,14 @@
-+ 	/* Kernel symbol table: Normal symbols */			\
-+ 	__ksymtab         : AT(ADDR(__ksymtab) - LOAD_OFFSET) {		\
-+ 		__start___ksymtab = .;					\
-+-		KEEP(*(SORT(___ksymtab+*)))				\
-++		SYMTAB_KEEP						\
-+ 		__stop___ksymtab = .;					\
-+ 	}								\
-+ 									\
-+ 	/* Kernel symbol table: GPL-only symbols */			\
-+ 	__ksymtab_gpl     : AT(ADDR(__ksymtab_gpl) - LOAD_OFFSET) {	\
-+ 		__start___ksymtab_gpl = .;				\
-+-		KEEP(*(SORT(___ksymtab_gpl+*)))				\
-++		SYMTAB_KEEP_GPL						\
-+ 		__stop___ksymtab_gpl = .;				\
-+ 	}								\
-+ 									\
-+@@ -542,7 +552,7 @@
-+ 									\
-+ 	/* Kernel symbol table: strings */				\
-+         __ksymtab_strings : AT(ADDR(__ksymtab_strings) - LOAD_OFFSET) {	\
-+-		*(__ksymtab_strings)					\
-++		*(__ksymtab_strings+*)					\
-+ 	}								\
-+ 									\
-+ 	/* __*init sections */						\
-+@@ -1017,6 +1027,8 @@
-+ 
-+ #define COMMON_DISCARDS							\
-+ 	SANITIZER_DISCARDS						\
-++	SYMTAB_DISCARD							\
-++	SYMTAB_DISCARD_GPL						\
-+ 	*(.discard)							\
-+ 	*(.discard.*)							\
-+ 	*(.modinfo)							\
-+--- a/include/linux/export.h
-++++ b/include/linux/export.h
-+@@ -82,6 +82,12 @@ struct kernel_symbol {
-+ 
-+ #else
-+ 
-++#ifdef MODULE
-++#define __EXPORT_SUFFIX(sym)
-++#else
-++#define __EXPORT_SUFFIX(sym) "+" #sym
-++#endif
-++
-+ /*
-+  * For every exported symbol, do the following:
-+  *
-+@@ -99,7 +105,7 @@ struct kernel_symbol {
-+ 	extern const char __kstrtab_##sym[];					\
-+ 	extern const char __kstrtabns_##sym[];					\
-+ 	__CRC_SYMBOL(sym, sec);							\
-+-	asm("	.section \"__ksymtab_strings\",\"aMS\",%progbits,1	\n"	\
-++	asm("	.section \"__ksymtab_strings" __EXPORT_SUFFIX(sym) "\",\"aMS\",%progbits,1	\n"	\
-+ 	    "__kstrtab_" #sym ":					\n"	\
-+ 	    "	.asciz 	\"" #sym "\"					\n"	\
-+ 	    "__kstrtabns_" #sym ":					\n"	\
-+--- a/scripts/Makefile.build
-++++ b/scripts/Makefile.build
-+@@ -366,7 +366,7 @@ targets += $(lib-y) $(always-y) $(MAKECM
-+ # Linker scripts preprocessor (.lds.S -> .lds)
-+ # ---------------------------------------------------------------------------
-+ quiet_cmd_cpp_lds_S = LDS     $@
-+-      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -U$(ARCH) \
-++      cmd_cpp_lds_S = $(CPP) $(EXTRA_LDSFLAGS) $(cpp_flags) -P -U$(ARCH) \
-+ 	                     -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
-+ 
-+ $(obj)/%.lds: $(src)/%.lds.S FORCE
-diff --git a/target/linux/generic/hack-5.10/230-openwrt_lzma_options.patch b/target/linux/generic/hack-5.10/230-openwrt_lzma_options.patch
-new file mode 100644
-index 0000000000..906527faf9
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/230-openwrt_lzma_options.patch
-@@ -0,0 +1,34 @@
-+From b3d00b452467f621317953d9e4c6f9ae8dcfd271 Mon Sep 17 00:00:00 2001
-+From: Imre Kaloz <kaloz@openwrt.org>
-+Date: Fri, 7 Jul 2017 17:06:55 +0200
-+Subject: use the openwrt lzma options for now
-+
-+lede-commit: 548de949f392049420a6a1feeef118b30ab8ea8c
-+Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
-+---
-+ lib/decompress.c              |  1 +
-+ scripts/Makefile.lib          |  2 +-
-+ usr/gen_initramfs_list.sh | 10 +++++-----
-+ 3 files changed, 7 insertions(+), 6 deletions(-)
-+
-+--- a/lib/decompress.c
-++++ b/lib/decompress.c
-+@@ -53,6 +53,7 @@ static const struct compress_format comp
-+ 	{ {0x1f, 0x9e}, "gzip", gunzip },
-+ 	{ {0x42, 0x5a}, "bzip2", bunzip2 },
-+ 	{ {0x5d, 0x00}, "lzma", unlzma },
-++	{ {0x6d, 0x00}, "lzma-openwrt", unlzma },
-+ 	{ {0xfd, 0x37}, "xz", unxz },
-+ 	{ {0x89, 0x4c}, "lzo", unlzo },
-+ 	{ {0x02, 0x21}, "lz4", unlz4 },
-+--- a/scripts/Makefile.lib
-++++ b/scripts/Makefile.lib
-+@@ -370,7 +370,7 @@ quiet_cmd_bzip2 = BZIP2   $@
-+ # ---------------------------------------------------------------------------
-+ 
-+ quiet_cmd_lzma = LZMA    $@
-+-      cmd_lzma = { cat $(real-prereqs) | $(LZMA) -9; $(size_append); } > $@
-++      cmd_lzma = { cat $(real-prereqs) | $(LZMA) e -d20 -lc1 -lp2 -pb2 -eos -si -so; $(size_append); } > $@
-+ 
-+ quiet_cmd_lzo = LZO     $@
-+       cmd_lzo = { cat $(real-prereqs) | $(KLZOP) -9; $(size_append); } > $@
-diff --git a/target/linux/generic/hack-5.10/249-udp-tunnel-selection.patch b/target/linux/generic/hack-5.10/249-udp-tunnel-selection.patch
-new file mode 100644
-index 0000000000..2c74298dfe
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/249-udp-tunnel-selection.patch
-@@ -0,0 +1,11 @@
-+--- a/net/ipv4/Kconfig
-++++ b/net/ipv4/Kconfig
-+@@ -315,7 +315,7 @@ config NET_IPVTI
-+ 	  on top.
-+ 
-+ config NET_UDP_TUNNEL
-+-	tristate
-++	tristate "IP: UDP tunneling support"
-+ 	select NET_IP_TUNNEL
-+ 	default n
-+ 
-diff --git a/target/linux/generic/hack-5.10/250-netfilter_depends.patch b/target/linux/generic/hack-5.10/250-netfilter_depends.patch
-new file mode 100644
-index 0000000000..b27b440157
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/250-netfilter_depends.patch
-@@ -0,0 +1,27 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: hack: net: remove bogus netfilter dependencies
-+
-+lede-commit: 589d2a377dee27d206fc3725325309cf649e4df6
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ net/netfilter/Kconfig | 2 --
-+ 1 file changed, 2 deletions(-)
-+
-+--- a/net/netfilter/Kconfig
-++++ b/net/netfilter/Kconfig
-+@@ -228,7 +228,6 @@ config NF_CONNTRACK_FTP
-+ 
-+ config NF_CONNTRACK_H323
-+ 	tristate "H.323 protocol support"
-+-	depends on IPV6 || IPV6=n
-+ 	depends on NETFILTER_ADVANCED
-+ 	help
-+ 	  H.323 is a VoIP signalling protocol from ITU-T. As one of the most
-+@@ -1072,7 +1071,6 @@ config NETFILTER_XT_TARGET_SECMARK
-+ 
-+ config NETFILTER_XT_TARGET_TCPMSS
-+ 	tristate '"TCPMSS" target support'
-+-	depends on IPV6 || IPV6=n
-+ 	default m if NETFILTER_ADVANCED=n
-+ 	help
-+ 	  This option adds a `TCPMSS' target, which allows you to alter the
-diff --git a/target/linux/generic/hack-5.10/251-kconfig.patch b/target/linux/generic/hack-5.10/251-kconfig.patch
-new file mode 100644
-index 0000000000..f80561c8e6
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/251-kconfig.patch
-@@ -0,0 +1,199 @@
-+From da3c50704f14132f4adf80d48e9a4cd5d46e54c9 Mon Sep 17 00:00:00 2001
-+From: John Crispin <john@phrozen.org>
-+Date: Fri, 7 Jul 2017 17:09:21 +0200
-+Subject: kconfig: owrt specifc dependencies
-+
-+Signed-off-by: John Crispin <john@phrozen.org>
-+---
-+ crypto/Kconfig        | 10 +++++-----
-+ drivers/bcma/Kconfig  |  1 +
-+ drivers/ssb/Kconfig   |  3 ++-
-+ lib/Kconfig           |  8 ++++----
-+ net/netfilter/Kconfig |  2 +-
-+ net/wireless/Kconfig  | 17 ++++++++++-------
-+ sound/core/Kconfig    |  4 ++--
-+ 7 files changed, 25 insertions(+), 20 deletions(-)
-+
-+--- a/crypto/Kconfig
-++++ b/crypto/Kconfig
-+@@ -33,7 +33,7 @@ config CRYPTO_FIPS
-+ 	  this is.
-+ 
-+ config CRYPTO_ALGAPI
-+-	tristate
-++	tristate "ALGAPI"
-+ 	select CRYPTO_ALGAPI2
-+ 	help
-+ 	  This option provides the API for cryptographic algorithms.
-+@@ -42,7 +42,7 @@ config CRYPTO_ALGAPI2
-+ 	tristate
-+ 
-+ config CRYPTO_AEAD
-+-	tristate
-++	tristate "AEAD"
-+ 	select CRYPTO_AEAD2
-+ 	select CRYPTO_ALGAPI
-+ 
-+@@ -53,7 +53,7 @@ config CRYPTO_AEAD2
-+ 	select CRYPTO_RNG2
-+ 
-+ config CRYPTO_SKCIPHER
-+-	tristate
-++	tristate "SKCIPHER"
-+ 	select CRYPTO_SKCIPHER2
-+ 	select CRYPTO_ALGAPI
-+ 
-+@@ -63,7 +63,7 @@ config CRYPTO_SKCIPHER2
-+ 	select CRYPTO_RNG2
-+ 
-+ config CRYPTO_HASH
-+-	tristate
-++	tristate "HASH"
-+ 	select CRYPTO_HASH2
-+ 	select CRYPTO_ALGAPI
-+ 
-+@@ -72,7 +72,7 @@ config CRYPTO_HASH2
-+ 	select CRYPTO_ALGAPI2
-+ 
-+ config CRYPTO_RNG
-+-	tristate
-++	tristate "RNG"
-+ 	select CRYPTO_RNG2
-+ 	select CRYPTO_ALGAPI
-+ 
-+--- a/drivers/bcma/Kconfig
-++++ b/drivers/bcma/Kconfig
-+@@ -16,6 +16,7 @@ if BCMA
-+ # Support for Block-I/O. SELECT this from the driver that needs it.
-+ config BCMA_BLOCKIO
-+ 	bool
-++	default y
-+ 
-+ config BCMA_HOST_PCI_POSSIBLE
-+ 	bool
-+--- a/drivers/ssb/Kconfig
-++++ b/drivers/ssb/Kconfig
-+@@ -29,6 +29,7 @@ config SSB_SPROM
-+ config SSB_BLOCKIO
-+ 	bool
-+ 	depends on SSB
-++	default y
-+ 
-+ config SSB_PCIHOST_POSSIBLE
-+ 	bool
-+@@ -49,7 +50,7 @@ config SSB_PCIHOST
-+ config SSB_B43_PCI_BRIDGE
-+ 	bool
-+ 	depends on SSB_PCIHOST
-+-	default n
-++	default y
-+ 
-+ config SSB_PCMCIAHOST_POSSIBLE
-+ 	bool
-+--- a/lib/Kconfig
-++++ b/lib/Kconfig
-+@@ -419,16 +419,16 @@ config BCH_CONST_T
-+ # Textsearch support is select'ed if needed
-+ #
-+ config TEXTSEARCH
-+-	bool
-++	bool "Textsearch support"
-+ 
-+ config TEXTSEARCH_KMP
-+-	tristate
-++	tristate "Textsearch KMP"
-+ 
-+ config TEXTSEARCH_BM
-+-	tristate
-++	tristate "Textsearch BM"
-+ 
-+ config TEXTSEARCH_FSM
-+-	tristate
-++	tristate "Textsearch FSM"
-+ 
-+ config BTREE
-+ 	bool
-+--- a/net/netfilter/Kconfig
-++++ b/net/netfilter/Kconfig
-+@@ -11,7 +11,7 @@ config NETFILTER_INGRESS
-+ 	  infrastructure.
-+ 
-+ config NETFILTER_NETLINK
-+-	tristate
-++	tristate "Netfilter NFNETLINK interface"
-+ 
-+ config NETFILTER_FAMILY_BRIDGE
-+ 	bool
-+--- a/net/wireless/Kconfig
-++++ b/net/wireless/Kconfig
-+@@ -1,6 +1,6 @@
-+ # SPDX-License-Identifier: GPL-2.0-only
-+ config WIRELESS_EXT
-+-	bool
-++	bool "Wireless extensions"
-+ 
-+ config WEXT_CORE
-+ 	def_bool y
-+@@ -12,10 +12,10 @@ config WEXT_PROC
-+ 	depends on WEXT_CORE
-+ 
-+ config WEXT_SPY
-+-	bool
-++	bool "WEXT_SPY"
-+ 
-+ config WEXT_PRIV
-+-	bool
-++	bool "WEXT_PRIV"
-+ 
-+ config CFG80211
-+ 	tristate "cfg80211 - wireless configuration API"
-+@@ -204,7 +204,7 @@ config CFG80211_WEXT_EXPORT
-+ endif # CFG80211
-+ 
-+ config LIB80211
-+-	tristate
-++	tristate "LIB80211"
-+ 	default n
-+ 	help
-+ 	  This options enables a library of common routines used
-+@@ -213,17 +213,17 @@ config LIB80211
-+ 	  Drivers should select this themselves if needed.
-+ 
-+ config LIB80211_CRYPT_WEP
-+-	tristate
-++	tristate "LIB80211_CRYPT_WEP"
-+ 	select CRYPTO_LIB_ARC4
-+ 
-+ config LIB80211_CRYPT_CCMP
-+-	tristate
-++	tristate "LIB80211_CRYPT_CCMP"
-+ 	select CRYPTO
-+ 	select CRYPTO_AES
-+ 	select CRYPTO_CCM
-+ 
-+ config LIB80211_CRYPT_TKIP
-+-	tristate
-++	tristate "LIB80211_CRYPT_TKIP"
-+ 	select CRYPTO_LIB_ARC4
-+ 
-+ config LIB80211_DEBUG
-+--- a/sound/core/Kconfig
-++++ b/sound/core/Kconfig
-+@@ -17,7 +17,7 @@ config SND_DMAENGINE_PCM
-+ 	tristate
-+ 
-+ config SND_HWDEP
-+-	tristate
-++	tristate "Sound hardware support"
-+ 
-+ config SND_SEQ_DEVICE
-+ 	tristate
-+@@ -27,7 +27,7 @@ config SND_RAWMIDI
-+ 	select SND_SEQ_DEVICE if SND_SEQUENCER != n
-+ 
-+ config SND_COMPRESS_OFFLOAD
-+-	tristate
-++	tristate "Compression offloading support"
-+ 
-+ config SND_JACK
-+ 	bool
-diff --git a/target/linux/generic/hack-5.10/259-regmap_dynamic.patch b/target/linux/generic/hack-5.10/259-regmap_dynamic.patch
-new file mode 100644
-index 0000000000..e5159cb000
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/259-regmap_dynamic.patch
-@@ -0,0 +1,135 @@
-+From 811d9e2268a62b830cfe93cd8bc929afcb8b198b Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Sat, 15 Jul 2017 21:12:38 +0200
-+Subject: kernel: move regmap bloat out of the kernel image if it is only being used in modules
-+
-+lede-commit: 96f39119815028073583e4fca3a9c5fe9141e998
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ drivers/base/regmap/Kconfig  | 15 ++++++++++-----
-+ drivers/base/regmap/Makefile | 12 ++++++++----
-+ drivers/base/regmap/regmap.c |  3 +++
-+ include/linux/regmap.h       |  2 +-
-+ 4 files changed, 22 insertions(+), 10 deletions(-)
-+
-+--- a/drivers/base/regmap/Kconfig
-++++ b/drivers/base/regmap/Kconfig
-+@@ -4,9 +4,8 @@
-+ # subsystems should select the appropriate symbols.
-+ 
-+ config REGMAP
-+-	default y if (REGMAP_I2C || REGMAP_SPI || REGMAP_SPMI || REGMAP_W1 || REGMAP_AC97 || REGMAP_MMIO || REGMAP_IRQ || REGMAP_SOUNDWIRE || REGMAP_SCCB || REGMAP_I3C || REGMAP_SPI_AVMM)
-+ 	select IRQ_DOMAIN if REGMAP_IRQ
-+-	bool
-++	tristate
-+ 
-+ config REGCACHE_COMPRESSED
-+ 	select LZO_COMPRESS
-+@@ -14,46 +13,59 @@ config REGCACHE_COMPRESSED
-+ 	bool
-+ 
-+ config REGMAP_AC97
-++	select REGMAP
-+ 	tristate
-+ 
-+ config REGMAP_I2C
-+ 	tristate
-++	select REGMAP
-+ 	depends on I2C
-+ 
-+ config REGMAP_SLIMBUS
-+ 	tristate
-++	select REGMAP
-+ 	depends on SLIMBUS
-+ 
-+ config REGMAP_SPI
-+ 	tristate
-++	select REGMAP
-++	depends on SPI_MASTER
-+ 	depends on SPI
-+ 
-+ config REGMAP_SPMI
-+ 	tristate
-++	select REGMAP
-+ 	depends on SPMI
-+ 
-+ config REGMAP_W1
-+ 	tristate
-++	select REGMAP
-+ 	depends on W1
-+ 
-+ config REGMAP_MMIO
-+ 	tristate
-++	select REGMAP
-+ 
-+ config REGMAP_IRQ
-+ 	bool
-++	select REGMAP
-+ 
-+ config REGMAP_SOUNDWIRE
-+ 	tristate
-++	select REGMAP
-+ 	depends on SOUNDWIRE
-+ 
-+ config REGMAP_SCCB
-+ 	tristate
-++	select REGMAP
-+ 	depends on I2C
-+ 
-+ config REGMAP_I3C
-+ 	tristate
-++	select REGMAP
-+ 	depends on I3C
-+ 
-+ config REGMAP_SPI_AVMM
-+ 	tristate
-++	select REGMAP
-+ 	depends on SPI
-+--- a/drivers/base/regmap/Makefile
-++++ b/drivers/base/regmap/Makefile
-+@@ -2,10 +2,14 @@
-+ # For include/trace/define_trace.h to include trace.h
-+ CFLAGS_regmap.o := -I$(src)
-+ 
-+-obj-$(CONFIG_REGMAP) += regmap.o regcache.o
-+-obj-$(CONFIG_REGMAP) += regcache-rbtree.o regcache-flat.o
-+-obj-$(CONFIG_REGCACHE_COMPRESSED) += regcache-lzo.o
-+-obj-$(CONFIG_DEBUG_FS) += regmap-debugfs.o
-++regmap-core-objs = regmap.o regcache.o regcache-rbtree.o regcache-flat.o
-++ifdef CONFIG_DEBUG_FS
-++regmap-core-objs += regmap-debugfs.o
-++endif
-++ifdef CONFIG_REGCACHE_COMPRESSED
-++regmap-core-objs += regcache-lzo.o
-++endif
-++obj-$(CONFIG_REGMAP) += regmap-core.o
-+ obj-$(CONFIG_REGMAP_AC97) += regmap-ac97.o
-+ obj-$(CONFIG_REGMAP_I2C) += regmap-i2c.o
-+ obj-$(CONFIG_REGMAP_SLIMBUS) += regmap-slimbus.o
-+--- a/drivers/base/regmap/regmap.c
-++++ b/drivers/base/regmap/regmap.c
-+@@ -9,6 +9,7 @@
-+ #include <linux/device.h>
-+ #include <linux/slab.h>
-+ #include <linux/export.h>
-++#include <linux/module.h>
-+ #include <linux/mutex.h>
-+ #include <linux/err.h>
-+ #include <linux/property.h>
-+@@ -3296,3 +3297,5 @@ static int __init regmap_initcall(void)
-+ 	return 0;
-+ }
-+ postcore_initcall(regmap_initcall);
-++
-++MODULE_LICENSE("GPL");
-+--- a/include/linux/regmap.h
-++++ b/include/linux/regmap.h
-+@@ -179,7 +179,7 @@ struct reg_sequence {
-+ 	__ret ?: __tmp; \
-+ })
-+ 
-+-#ifdef CONFIG_REGMAP
-++#if IS_REACHABLE(CONFIG_REGMAP)
-+ 
-+ enum regmap_endian {
-+ 	/* Unspecified -> 0 -> Backwards compatible default */
-diff --git a/target/linux/generic/hack-5.10/260-crypto_test_dependencies.patch b/target/linux/generic/hack-5.10/260-crypto_test_dependencies.patch
-new file mode 100644
-index 0000000000..1eab709c46
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/260-crypto_test_dependencies.patch
-@@ -0,0 +1,52 @@
-+From fd1799b0bf5efa46dd3e6dfbbf3955564807e508 Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Fri, 7 Jul 2017 17:12:51 +0200
-+Subject: kernel: prevent cryptomgr from pulling in useless extra dependencies for tests that are not run
-+
-+Reduces kernel size after LZMA by about 5k on MIPS
-+
-+lede-commit: 044c316167e076479a344c59905e5b435b84a77f
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ crypto/Kconfig   | 13 ++++++-------
-+ crypto/algboss.c |  4 ++++
-+ 2 files changed, 10 insertions(+), 7 deletions(-)
-+
-+--- a/crypto/Kconfig
-++++ b/crypto/Kconfig
-+@@ -120,13 +120,13 @@ config CRYPTO_MANAGER
-+ 	  cbc(aes).
-+ 
-+ config CRYPTO_MANAGER2
-+-	def_tristate CRYPTO_MANAGER || (CRYPTO_MANAGER!=n && CRYPTO_ALGAPI=y)
-+-	select CRYPTO_AEAD2
-+-	select CRYPTO_HASH2
-+-	select CRYPTO_SKCIPHER2
-+-	select CRYPTO_AKCIPHER2
-+-	select CRYPTO_KPP2
-+-	select CRYPTO_ACOMP2
-++	def_tristate CRYPTO_MANAGER || (CRYPTO_MANAGER!=n && CRYPTO_ALGAPI=y && !CRYPTO_MANAGER_DISABLE_TESTS)
-++	select CRYPTO_AEAD2 if !CRYPTO_MANAGER_DISABLE_TESTS
-++	select CRYPTO_HASH2 if !CRYPTO_MANAGER_DISABLE_TESTS
-++	select CRYPTO_SKCIPHER2 if !CRYPTO_MANAGER_DISABLE_TESTS
-++	select CRYPTO_AKCIPHER2 if !CRYPTO_MANAGER_DISABLE_TESTS
-++	select CRYPTO_KPP2 if !CRYPTO_MANAGER_DISABLE_TESTS
-++	select CRYPTO_ACOMP2 if !CRYPTO_MANAGER_DISABLE_TESTS
-+ 
-+ config CRYPTO_USER
-+ 	tristate "Userspace cryptographic algorithm configuration"
-+--- a/crypto/algboss.c
-++++ b/crypto/algboss.c
-+@@ -230,8 +230,12 @@ static int cryptomgr_schedule_test(struc
-+ 	type = alg->cra_flags;
-+ 
-+ 	/* Do not test internal algorithms. */
-++#ifdef CONFIG_CRYPTO_MANAGER_DISABLE_TESTS
-++	type |= CRYPTO_ALG_TESTED;
-++#else
-+ 	if (type & CRYPTO_ALG_INTERNAL)
-+ 		type |= CRYPTO_ALG_TESTED;
-++#endif
-+ 
-+ 	param->type = type;
-+ 
-diff --git a/target/linux/generic/hack-5.10/261-lib-arc4-unhide.patch b/target/linux/generic/hack-5.10/261-lib-arc4-unhide.patch
-new file mode 100644
-index 0000000000..a7668acfad
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/261-lib-arc4-unhide.patch
-@@ -0,0 +1,15 @@
-+This makes it possible to select CONFIG_CRYPTO_LIB_ARC4 directly. We 
-+need this to be able to compile this into the kernel and make use of it 
-+from backports.
-+
-+--- a/lib/crypto/Kconfig
-++++ b/lib/crypto/Kconfig
-+@@ -6,7 +6,7 @@ config CRYPTO_LIB_AES
-+ 	tristate
-+ 
-+ config CRYPTO_LIB_ARC4
-+-	tristate
-++	tristate "ARC4 cipher library"
-+ 
-+ config CRYPTO_ARCH_HAVE_LIB_BLAKE2S
-+ 	tristate
-diff --git a/target/linux/generic/hack-5.10/280-rfkill-stubs.patch b/target/linux/generic/hack-5.10/280-rfkill-stubs.patch
-new file mode 100644
-index 0000000000..2e48aea1cf
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/280-rfkill-stubs.patch
-@@ -0,0 +1,84 @@
-+From 236c1acdfef5958010ac9814a9872e0a46fd78ee Mon Sep 17 00:00:00 2001
-+From: John Crispin <john@phrozen.org>
-+Date: Fri, 7 Jul 2017 17:13:44 +0200
-+Subject: rfkill: add fake rfkill support
-+
-+allow building of modules depending on RFKILL even if RFKILL is not enabled.
-+
-+Signed-off-by: John Crispin <john@phrozen.org>
-+---
-+ include/linux/rfkill.h |  2 +-
-+ net/Makefile           |  2 +-
-+ net/rfkill/Kconfig     | 14 +++++++++-----
-+ net/rfkill/Makefile    |  2 +-
-+ 4 files changed, 12 insertions(+), 8 deletions(-)
-+
-+--- a/include/linux/rfkill.h
-++++ b/include/linux/rfkill.h
-+@@ -64,7 +64,7 @@ struct rfkill_ops {
-+ 	int	(*set_block)(void *data, bool blocked);
-+ };
-+ 
-+-#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
-++#if defined(CONFIG_RFKILL_FULL) || defined(CONFIG_RFKILL_FULL_MODULE)
-+ /**
-+  * rfkill_alloc - Allocate rfkill structure
-+  * @name: name of the struct -- the string is not copied internally
-+--- a/net/Makefile
-++++ b/net/Makefile
-+@@ -53,7 +53,7 @@ obj-$(CONFIG_TIPC)		+= tipc/
-+ obj-$(CONFIG_NETLABEL)		+= netlabel/
-+ obj-$(CONFIG_IUCV)		+= iucv/
-+ obj-$(CONFIG_SMC)		+= smc/
-+-obj-$(CONFIG_RFKILL)		+= rfkill/
-++obj-$(CONFIG_RFKILL_FULL)	+= rfkill/
-+ obj-$(CONFIG_NET_9P)		+= 9p/
-+ obj-$(CONFIG_CAIF)		+= caif/
-+ ifneq ($(CONFIG_DCB),)
-+--- a/net/rfkill/Kconfig
-++++ b/net/rfkill/Kconfig
-+@@ -2,7 +2,11 @@
-+ #
-+ # RF switch subsystem configuration
-+ #
-+-menuconfig RFKILL
-++config RFKILL
-++	bool
-++	default y
-++
-++menuconfig RFKILL_FULL
-+ 	tristate "RF switch subsystem support"
-+ 	help
-+ 	  Say Y here if you want to have control over RF switches
-+@@ -14,19 +18,19 @@ menuconfig RFKILL
-+ # LED trigger support
-+ config RFKILL_LEDS
-+ 	bool
-+-	depends on RFKILL
-++	depends on RFKILL_FULL
-+ 	depends on LEDS_TRIGGERS = y || RFKILL = LEDS_TRIGGERS
-+ 	default y
-+ 
-+ config RFKILL_INPUT
-+ 	bool "RF switch input support" if EXPERT
-+-	depends on RFKILL
-++	depends on RFKILL_FULL
-+ 	depends on INPUT = y || RFKILL = INPUT
-+ 	default y if !EXPERT
-+ 
-+ config RFKILL_GPIO
-+ 	tristate "GPIO RFKILL driver"
-+-	depends on RFKILL
-++	depends on RFKILL_FULL
-+ 	depends on GPIOLIB || COMPILE_TEST
-+ 	default n
-+ 	help
-+--- a/net/rfkill/Makefile
-++++ b/net/rfkill/Makefile
-+@@ -5,5 +5,5 @@
-+ 
-+ rfkill-y			+= core.o
-+ rfkill-$(CONFIG_RFKILL_INPUT)	+= input.o
-+-obj-$(CONFIG_RFKILL)		+= rfkill.o
-++obj-$(CONFIG_RFKILL_FULL)	+= rfkill.o
-+ obj-$(CONFIG_RFKILL_GPIO)	+= rfkill-gpio.o
-diff --git a/target/linux/generic/hack-5.10/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch b/target/linux/generic/hack-5.10/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch
-new file mode 100644
-index 0000000000..fe89de7e08
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch
-@@ -0,0 +1,64 @@
-+From: Ben Menchaca <ben.menchaca@qca.qualcomm.com>
-+Date: Fri, 7 Jun 2013 18:35:22 -0500
-+Subject: MIPS: r4k_cache: use more efficient cache blast
-+
-+Optimize the compiler output for larger cache blast cases that are
-+common for DMA-based networking.
-+
-+Signed-off-by: Ben Menchaca <ben.menchaca@qca.qualcomm.com>
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+--- a/arch/mips/include/asm/r4kcache.h
-++++ b/arch/mips/include/asm/r4kcache.h
-+@@ -296,14 +296,46 @@ static inline void prot##extra##blast_##
-+ 						    unsigned long end)	\
-+ {									\
-+ 	unsigned long lsize = cpu_##desc##_line_size();			\
-++	unsigned long lsize_2 = lsize * 2;				\
-++	unsigned long lsize_3 = lsize * 3;				\
-++	unsigned long lsize_4 = lsize * 4;				\
-++	unsigned long lsize_5 = lsize * 5;				\
-++	unsigned long lsize_6 = lsize * 6;				\
-++	unsigned long lsize_7 = lsize * 7;				\
-++	unsigned long lsize_8 = lsize * 8;				\
-+ 	unsigned long addr = start & ~(lsize - 1);			\
-+-	unsigned long aend = (end - 1) & ~(lsize - 1);			\
-++	unsigned long aend = (end + lsize - 1) & ~(lsize - 1);		\
-++	int lines = (aend - addr) / lsize;				\
-+ 									\
-+-	while (1) {							\
-++	while (lines >= 8) {						\
-++		prot##cache_op(hitop, addr);				\
-++		prot##cache_op(hitop, addr + lsize);			\
-++		prot##cache_op(hitop, addr + lsize_2);			\
-++		prot##cache_op(hitop, addr + lsize_3);			\
-++		prot##cache_op(hitop, addr + lsize_4);			\
-++		prot##cache_op(hitop, addr + lsize_5);			\
-++		prot##cache_op(hitop, addr + lsize_6);			\
-++		prot##cache_op(hitop, addr + lsize_7);			\
-++		addr += lsize_8;					\
-++		lines -= 8;						\
-++	}								\
-++									\
-++	if (lines & 0x4) {						\
-++		prot##cache_op(hitop, addr);				\
-++		prot##cache_op(hitop, addr + lsize);			\
-++		prot##cache_op(hitop, addr + lsize_2);			\
-++		prot##cache_op(hitop, addr + lsize_3);			\
-++		addr += lsize_4;					\
-++	}								\
-++									\
-++	if (lines & 0x2) {						\
-++		prot##cache_op(hitop, addr);				\
-++		prot##cache_op(hitop, addr + lsize);			\
-++		addr += lsize_2;					\
-++	}								\
-++									\
-++	if (lines & 0x1) {						\
-+ 		prot##cache_op(hitop, addr);				\
-+-		if (addr == aend)					\
-+-			break;						\
-+-		addr += lsize;						\
-+ 	}								\
-+ }
-+ 
-diff --git a/target/linux/generic/hack-5.10/301-mips_image_cmdline_hack.patch b/target/linux/generic/hack-5.10/301-mips_image_cmdline_hack.patch
-new file mode 100644
-index 0000000000..6c0828fa8a
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/301-mips_image_cmdline_hack.patch
-@@ -0,0 +1,38 @@
-+From: John Crispin <john@phrozen.org>
-+Subject: hack: kernel: add generic image_cmdline hack to MIPS targets
-+
-+lede-commit: d59f5b3a987a48508257a0ddbaeadc7909f9f976
-+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-+---
-+ arch/mips/Kconfig       | 4 ++++
-+ arch/mips/kernel/head.S | 6 ++++++
-+ 2 files changed, 10 insertions(+)
-+
-+--- a/arch/mips/Kconfig
-++++ b/arch/mips/Kconfig
-+@@ -1162,6 +1162,10 @@ config MIPS_MSC
-+ config SYNC_R4K
-+ 	bool
-+ 
-++config IMAGE_CMDLINE_HACK
-++	bool "OpenWrt specific image command line hack"
-++	default n
-++
-+ config NO_IOPORT_MAP
-+ 	def_bool n
-+ 
-+--- a/arch/mips/kernel/head.S
-++++ b/arch/mips/kernel/head.S
-+@@ -79,6 +79,12 @@ FEXPORT(__kernel_entry)
-+ 	j	kernel_entry
-+ #endif /* CONFIG_BOOT_RAW */
-+ 
-++#ifdef CONFIG_IMAGE_CMDLINE_HACK
-++	.ascii	"CMDLINE:"
-++EXPORT(__image_cmdline)
-++	.fill	0x400
-++#endif /* CONFIG_IMAGE_CMDLINE_HACK */
-++
-+ 	__REF
-+ 
-+ NESTED(kernel_entry, 16, sp)			# kernel entry point
-diff --git a/target/linux/generic/hack-5.10/321-powerpc_crtsavres_prereq.patch b/target/linux/generic/hack-5.10/321-powerpc_crtsavres_prereq.patch
-new file mode 100644
-index 0000000000..4bb438295d
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/321-powerpc_crtsavres_prereq.patch
-@@ -0,0 +1,38 @@
-+From 107c0964cb8db7ca28ac5199426414fdab3c274d Mon Sep 17 00:00:00 2001
-+From: "Alexandros C. Couloumbis" <alex@ozo.com>
-+Date: Fri, 7 Jul 2017 17:14:51 +0200
-+Subject: hack: arch: powerpc: drop register save/restore library from modules
-+
-+Upstream GCC uses a libgcc function for saving/restoring registers. This
-+makes the code bigger, and upstream kernels need to carry that function
-+for every single kernel module. Our GCC is patched to avoid those
-+references, so we can drop the extra bloat for modules.
-+
-+lede-commit: e8e1084654f50904e6bf77b70b2de3f137d7b3ec
-+Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
-+---
-+ arch/powerpc/Makefile | 1 -
-+ 1 file changed, 1 deletion(-)
-+
-+--- a/arch/powerpc/Makefile
-++++ b/arch/powerpc/Makefile
-+@@ -61,19 +61,6 @@ machine-$(CONFIG_PPC64) += 64
-+ machine-$(CONFIG_CPU_LITTLE_ENDIAN) += le
-+ UTS_MACHINE := $(subst $(space),,$(machine-y))
-+ 
-+-# XXX This needs to be before we override LD below
-+-ifdef CONFIG_PPC32
-+-KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o
-+-else
-+-ifeq ($(call ld-ifversion, -ge, 225000000, y),y)
-+-# Have the linker provide sfpr if possible.
-+-# There is a corresponding test in arch/powerpc/lib/Makefile
-+-KBUILD_LDFLAGS_MODULE += --save-restore-funcs
-+-else
-+-KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o
-+-endif
-+-endif
-+-
-+ ifdef CONFIG_CPU_LITTLE_ENDIAN
-+ KBUILD_CFLAGS	+= -mlittle-endian
-+ KBUILD_LDFLAGS	+= -EL
-diff --git a/target/linux/generic/hack-5.10/400-block-fit-partition-parser.patch b/target/linux/generic/hack-5.10/400-block-fit-partition-parser.patch
-new file mode 100644
-index 0000000000..a414be6e84
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/400-block-fit-partition-parser.patch
-@@ -0,0 +1,177 @@
-+--- a/block/blk.h
-++++ b/block/blk.h
-+@@ -357,6 +357,7 @@ char *disk_name(struct gendisk *hd, int
-+ #define ADDPART_FLAG_NONE	0
-+ #define ADDPART_FLAG_RAID	1
-+ #define ADDPART_FLAG_WHOLEDISK	2
-++#define ADDPART_FLAG_ROOTDEV	4
-+ void delete_partition(struct hd_struct *part);
-+ int bdev_add_partition(struct block_device *bdev, int partno,
-+ 		sector_t start, sector_t length);
-+--- a/block/partitions/Kconfig
-++++ b/block/partitions/Kconfig
-+@@ -101,6 +101,13 @@ config ATARI_PARTITION
-+ 	  Say Y here if you would like to use hard disks under Linux which
-+ 	  were partitioned under the Atari OS.
-+ 
-++config FIT_PARTITION
-++	bool "Flattened-Image-Tree (FIT) partition support" if PARTITION_ADVANCED
-++	default n
-++	help
-++	  Say Y here if your system needs to mount the filesystem part of
-++	  a Flattened-Image-Tree (FIT) image commonly used with Das U-Boot.
-++
-+ config IBM_PARTITION
-+ 	bool "IBM disk label and partition support"
-+ 	depends on PARTITION_ADVANCED && S390
-+--- a/block/partitions/Makefile
-++++ b/block/partitions/Makefile
-+@@ -8,6 +8,7 @@ obj-$(CONFIG_ACORN_PARTITION) += acorn.o
-+ obj-$(CONFIG_AMIGA_PARTITION) += amiga.o
-+ obj-$(CONFIG_ATARI_PARTITION) += atari.o
-+ obj-$(CONFIG_AIX_PARTITION) += aix.o
-++obj-$(CONFIG_FIT_PARTITION) += fit.o
-+ obj-$(CONFIG_CMDLINE_PARTITION) += cmdline.o
-+ obj-$(CONFIG_MAC_PARTITION) += mac.o
-+ obj-$(CONFIG_LDM_PARTITION) += ldm.o
-+--- a/block/partitions/check.h
-++++ b/block/partitions/check.h
-+@@ -58,6 +58,7 @@ int amiga_partition(struct parsed_partit
-+ int atari_partition(struct parsed_partitions *state);
-+ int cmdline_partition(struct parsed_partitions *state);
-+ int efi_partition(struct parsed_partitions *state);
-++int fit_partition(struct parsed_partitions *state);
-+ int ibm_partition(struct parsed_partitions *);
-+ int karma_partition(struct parsed_partitions *state);
-+ int ldm_partition(struct parsed_partitions *state);
-+@@ -68,3 +69,5 @@ int sgi_partition(struct parsed_partitio
-+ int sun_partition(struct parsed_partitions *state);
-+ int sysv68_partition(struct parsed_partitions *state);
-+ int ultrix_partition(struct parsed_partitions *state);
-++
-++int parse_fit_partitions(struct parsed_partitions *state, u64 start_sector, u64 nr_sectors, int *slot, int add_remain);
-+--- a/block/partitions/core.c
-++++ b/block/partitions/core.c
-+@@ -10,6 +10,10 @@
-+ #include <linux/vmalloc.h>
-+ #include <linux/blktrace_api.h>
-+ #include <linux/raid/detect.h>
-++#ifdef CONFIG_FIT_PARTITION
-++#include <linux/root_dev.h>
-++#endif
-++
-+ #include "check.h"
-+ 
-+ static int (*check_part[])(struct parsed_partitions *) = {
-+@@ -46,6 +50,9 @@ static int (*check_part[])(struct parsed
-+ #ifdef CONFIG_EFI_PARTITION
-+ 	efi_partition,		/* this must come before msdos */
-+ #endif
-++#ifdef CONFIG_FIT_PARTITION
-++	fit_partition,
-++#endif
-+ #ifdef CONFIG_SGI_PARTITION
-+ 	sgi_partition,
-+ #endif
-+@@ -215,6 +222,18 @@ static ssize_t part_discard_alignment_sh
-+ 				p->start_sect));
-+ }
-+ 
-++static ssize_t part_name_show(struct device *dev,
-++			      struct device_attribute *attr, char *buf)
-++{
-++	struct hd_struct *p = dev_to_part(dev);
-++
-++	if (p->info && p->info->volname)
-++		return sprintf(buf, "%s\n", p->info->volname);
-++
-++	buf[0] = '\0';
-++	return 0;
-++}
-++
-+ static DEVICE_ATTR(partition, 0444, part_partition_show, NULL);
-+ static DEVICE_ATTR(start, 0444, part_start_show, NULL);
-+ static DEVICE_ATTR(size, 0444, part_size_show, NULL);
-+@@ -223,6 +242,7 @@ static DEVICE_ATTR(alignment_offset, 044
-+ static DEVICE_ATTR(discard_alignment, 0444, part_discard_alignment_show, NULL);
-+ static DEVICE_ATTR(stat, 0444, part_stat_show, NULL);
-+ static DEVICE_ATTR(inflight, 0444, part_inflight_show, NULL);
-++static DEVICE_ATTR(name, 0444, part_name_show, NULL);
-+ #ifdef CONFIG_FAIL_MAKE_REQUEST
-+ static struct device_attribute dev_attr_fail =
-+ 	__ATTR(make-it-fail, 0644, part_fail_show, part_fail_store);
-+@@ -237,6 +257,7 @@ static struct attribute *part_attrs[] =
-+ 	&dev_attr_discard_alignment.attr,
-+ 	&dev_attr_stat.attr,
-+ 	&dev_attr_inflight.attr,
-++	&dev_attr_name.attr,
-+ #ifdef CONFIG_FAIL_MAKE_REQUEST
-+ 	&dev_attr_fail.attr,
-+ #endif
-+@@ -694,6 +715,11 @@ static bool blk_add_partition(struct gen
-+ 	    (state->parts[p].flags & ADDPART_FLAG_RAID))
-+ 		md_autodetect_dev(part_to_dev(part)->devt);
-+ 
-++#ifdef CONFIG_FIT_PARTITION
-++	if ((state->parts[p].flags & ADDPART_FLAG_ROOTDEV) && ROOT_DEV == 0)
-++		ROOT_DEV = part_to_dev(part)->devt;
-++#endif
-++
-+ 	return true;
-+ }
-+ 
-+--- a/drivers/mtd/ubi/block.c
-++++ b/drivers/mtd/ubi/block.c
-+@@ -396,7 +396,7 @@ int ubiblock_create(struct ubi_volume_in
-+ 	dev->leb_size = vi->usable_leb_size;
-+ 
-+ 	/* Initialize the gendisk of this ubiblock device */
-+-	gd = alloc_disk(1);
-++	gd = alloc_disk(0);
-+ 	if (!gd) {
-+ 		pr_err("UBI: block: alloc_disk failed\n");
-+ 		ret = -ENODEV;
-+@@ -413,6 +413,7 @@ int ubiblock_create(struct ubi_volume_in
-+ 		goto out_put_disk;
-+ 	}
-+ 	gd->private_data = dev;
-++	gd->flags |= GENHD_FL_EXT_DEVT;
-+ 	sprintf(gd->disk_name, "ubiblock%d_%d", dev->ubi_num, dev->vol_id);
-+ 	set_capacity(gd, disk_capacity);
-+ 	dev->gd = gd;
-+--- a/block/partitions/efi.c
-++++ b/block/partitions/efi.c
-+@@ -706,6 +706,9 @@ int efi_partition(struct parsed_partitio
-+ 	gpt_entry *ptes = NULL;
-+ 	u32 i;
-+ 	unsigned ssz = bdev_logical_block_size(state->bdev) / 512;
-++#ifdef CONFIG_FIT_PARTITION
-++	u32 extra_slot = 64;
-++#endif
-+ 
-+ 	if (!find_valid_gpt(state, &gpt, &ptes) || !gpt || !ptes) {
-+ 		kfree(gpt);
-+@@ -739,6 +742,11 @@ int efi_partition(struct parsed_partitio
-+ 				ARRAY_SIZE(ptes[i].partition_name));
-+ 		utf16_le_to_7bit(ptes[i].partition_name, label_max, info->volname);
-+ 		state->parts[i + 1].has_info = true;
-++#ifdef CONFIG_FIT_PARTITION
-++		/* If this is a U-Boot FIT volume it may have subpartitions */
-++		if (!efi_guidcmp(ptes[i].partition_type_guid, PARTITION_LINUX_FIT_GUID))
-++			(void) parse_fit_partitions(state, start * ssz, size * ssz, &extra_slot, 1);
-++#endif
-+ 	}
-+ 	kfree(ptes);
-+ 	kfree(gpt);
-+--- a/block/partitions/efi.h
-++++ b/block/partitions/efi.h
-+@@ -52,6 +52,9 @@
-+ #define PARTITION_LINUX_LVM_GUID \
-+     EFI_GUID( 0xe6d6d379, 0xf507, 0x44c2, \
-+               0xa2, 0x3c, 0x23, 0x8f, 0x2a, 0x3d, 0xf9, 0x28)
-++#define PARTITION_LINUX_FIT_GUID \
-++    EFI_GUID( 0xcae9be83, 0xb15f, 0x49cc, \
-++              0x86, 0x3f, 0x08, 0x1b, 0x74, 0x4a, 0x2d, 0x93)
-+ 
-+ typedef struct _gpt_header {
-+ 	__le64 signature;
-diff --git a/target/linux/generic/hack-5.10/531-debloat_lzma.patch b/target/linux/generic/hack-5.10/531-debloat_lzma.patch
-new file mode 100644
-index 0000000000..2f70eee3e9
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/531-debloat_lzma.patch
-@@ -0,0 +1,1040 @@
-+From 3fd297761ac246c54d7723c57fca95c112b99465 Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Sat, 15 Jul 2017 21:15:44 +0200
-+Subject: lzma: de-bloat the lzma library used by jffs2
-+
-+lede-commit: 3fd1dd08fbcbb78b34efefd32c3032e5c99108d6
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ include/linux/lzma/LzFind.h  |  17 ---
-+ include/linux/lzma/LzmaDec.h | 101 ---------------
-+ include/linux/lzma/LzmaEnc.h |  20 ---
-+ lib/lzma/LzFind.c            | 287 ++++---------------------------------------
-+ lib/lzma/LzmaDec.c           |  86 +------------
-+ lib/lzma/LzmaEnc.c           | 172 ++------------------------
-+ 6 files changed, 42 insertions(+), 641 deletions(-)
-+
-+--- a/include/linux/lzma/LzFind.h
-++++ b/include/linux/lzma/LzFind.h
-+@@ -55,11 +55,6 @@ typedef struct _CMatchFinder
-+ 
-+ #define Inline_MatchFinder_GetNumAvailableBytes(p) ((p)->streamPos - (p)->pos)
-+ 
-+-int MatchFinder_NeedMove(CMatchFinder *p);
-+-Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p);
-+-void MatchFinder_MoveBlock(CMatchFinder *p);
-+-void MatchFinder_ReadIfRequired(CMatchFinder *p);
-+-
-+ void MatchFinder_Construct(CMatchFinder *p);
-+ 
-+ /* Conditions:
-+@@ -70,12 +65,6 @@ int MatchFinder_Create(CMatchFinder *p,
-+     UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter,
-+     ISzAlloc *alloc);
-+ void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc);
-+-void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems);
-+-void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue);
-+-
-+-UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *buffer, CLzRef *son,
-+-    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue,
-+-    UInt32 *distances, UInt32 maxLen);
-+ 
-+ /*
-+ Conditions:
-+@@ -102,12 +91,6 @@ typedef struct _IMatchFinder
-+ 
-+ void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable);
-+ 
-+-void MatchFinder_Init(CMatchFinder *p);
-+-UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
-+-UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
-+-void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
-+-void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
-+-
-+ #ifdef __cplusplus
-+ }
-+ #endif
-+--- a/include/linux/lzma/LzmaDec.h
-++++ b/include/linux/lzma/LzmaDec.h
-+@@ -31,14 +31,6 @@ typedef struct _CLzmaProps
-+   UInt32 dicSize;
-+ } CLzmaProps;
-+ 
-+-/* LzmaProps_Decode - decodes properties
-+-Returns:
-+-  SZ_OK
-+-  SZ_ERROR_UNSUPPORTED - Unsupported properties
-+-*/
-+-
-+-SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size);
-+-
-+ 
-+ /* ---------- LZMA Decoder state ---------- */
-+ 
-+@@ -70,8 +62,6 @@ typedef struct
-+ 
-+ #define LzmaDec_Construct(p) { (p)->dic = 0; (p)->probs = 0; }
-+ 
-+-void LzmaDec_Init(CLzmaDec *p);
-+-
-+ /* There are two types of LZMA streams:
-+      0) Stream with end mark. That end mark adds about 6 bytes to compressed size.
-+      1) Stream without end mark. You must know exact uncompressed size to decompress such stream. */
-+@@ -108,97 +98,6 @@ typedef enum
-+ 
-+ /* ELzmaStatus is used only as output value for function call */
-+ 
-+-
-+-/* ---------- Interfaces ---------- */
-+-
-+-/* There are 3 levels of interfaces:
-+-     1) Dictionary Interface
-+-     2) Buffer Interface
-+-     3) One Call Interface
-+-   You can select any of these interfaces, but don't mix functions from different
-+-   groups for same object. */
-+-
-+-
-+-/* There are two variants to allocate state for Dictionary Interface:
-+-     1) LzmaDec_Allocate / LzmaDec_Free
-+-     2) LzmaDec_AllocateProbs / LzmaDec_FreeProbs
-+-   You can use variant 2, if you set dictionary buffer manually.
-+-   For Buffer Interface you must always use variant 1.
-+-
-+-LzmaDec_Allocate* can return:
-+-  SZ_OK
-+-  SZ_ERROR_MEM         - Memory allocation error
-+-  SZ_ERROR_UNSUPPORTED - Unsupported properties
-+-*/
-+-
-+-SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc);
-+-void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc);
-+-
-+-SRes LzmaDec_Allocate(CLzmaDec *state, const Byte *prop, unsigned propsSize, ISzAlloc *alloc);
-+-void LzmaDec_Free(CLzmaDec *state, ISzAlloc *alloc);
-+-
-+-/* ---------- Dictionary Interface ---------- */
-+-
-+-/* You can use it, if you want to eliminate the overhead for data copying from
-+-   dictionary to some other external buffer.
-+-   You must work with CLzmaDec variables directly in this interface.
-+-
-+-   STEPS:
-+-     LzmaDec_Constr()
-+-     LzmaDec_Allocate()
-+-     for (each new stream)
-+-     {
-+-       LzmaDec_Init()
-+-       while (it needs more decompression)
-+-       {
-+-         LzmaDec_DecodeToDic()
-+-         use data from CLzmaDec::dic and update CLzmaDec::dicPos
-+-       }
-+-     }
-+-     LzmaDec_Free()
-+-*/
-+-
-+-/* LzmaDec_DecodeToDic
-+-
-+-   The decoding to internal dictionary buffer (CLzmaDec::dic).
-+-   You must manually update CLzmaDec::dicPos, if it reaches CLzmaDec::dicBufSize !!!
-+-
-+-finishMode:
-+-  It has meaning only if the decoding reaches output limit (dicLimit).
-+-  LZMA_FINISH_ANY - Decode just dicLimit bytes.
-+-  LZMA_FINISH_END - Stream must be finished after dicLimit.
-+-
-+-Returns:
-+-  SZ_OK
-+-    status:
-+-      LZMA_STATUS_FINISHED_WITH_MARK
-+-      LZMA_STATUS_NOT_FINISHED
-+-      LZMA_STATUS_NEEDS_MORE_INPUT
-+-      LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK
-+-  SZ_ERROR_DATA - Data error
-+-*/
-+-
-+-SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit,
-+-    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
-+-
-+-
-+-/* ---------- Buffer Interface ---------- */
-+-
-+-/* It's zlib-like interface.
-+-   See LzmaDec_DecodeToDic description for information about STEPS and return results,
-+-   but you must use LzmaDec_DecodeToBuf instead of LzmaDec_DecodeToDic and you don't need
-+-   to work with CLzmaDec variables manually.
-+-
-+-finishMode:
-+-  It has meaning only if the decoding reaches output limit (*destLen).
-+-  LZMA_FINISH_ANY - Decode just destLen bytes.
-+-  LZMA_FINISH_END - Stream must be finished after (*destLen).
-+-*/
-+-
-+-SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen,
-+-    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
-+-
-+-
-+ /* ---------- One Call Interface ---------- */
-+ 
-+ /* LzmaDecode
-+--- a/include/linux/lzma/LzmaEnc.h
-++++ b/include/linux/lzma/LzmaEnc.h
-+@@ -31,9 +31,6 @@ typedef struct _CLzmaEncProps
-+ } CLzmaEncProps;
-+ 
-+ void LzmaEncProps_Init(CLzmaEncProps *p);
-+-void LzmaEncProps_Normalize(CLzmaEncProps *p);
-+-UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2);
-+-
-+ 
-+ /* ---------- CLzmaEncHandle Interface ---------- */
-+ 
-+@@ -53,26 +50,9 @@ CLzmaEncHandle LzmaEnc_Create(ISzAlloc *
-+ void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig);
-+ SRes LzmaEnc_SetProps(CLzmaEncHandle p, const CLzmaEncProps *props);
-+ SRes LzmaEnc_WriteProperties(CLzmaEncHandle p, Byte *properties, SizeT *size);
-+-SRes LzmaEnc_Encode(CLzmaEncHandle p, ISeqOutStream *outStream, ISeqInStream *inStream,
-+-    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
-+ SRes LzmaEnc_MemEncode(CLzmaEncHandle p, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
-+     int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
-+ 
-+-/* ---------- One Call Interface ---------- */
-+-
-+-/* LzmaEncode
-+-Return code:
-+-  SZ_OK               - OK
-+-  SZ_ERROR_MEM        - Memory allocation error
-+-  SZ_ERROR_PARAM      - Incorrect paramater
-+-  SZ_ERROR_OUTPUT_EOF - output buffer overflow
-+-  SZ_ERROR_THREAD     - errors in multithreading functions (only for Mt version)
-+-*/
-+-
-+-SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
-+-    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
-+-    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
-+-
-+ #ifdef __cplusplus
-+ }
-+ #endif
-+--- a/lib/lzma/LzFind.c
-++++ b/lib/lzma/LzFind.c
-+@@ -14,9 +14,15 @@
-+ 
-+ #define kStartMaxLen 3
-+ 
-++#if 0
-++#define DIRECT_INPUT	p->directInput
-++#else
-++#define DIRECT_INPUT	1
-++#endif
-++
-+ static void LzInWindow_Free(CMatchFinder *p, ISzAlloc *alloc)
-+ {
-+-  if (!p->directInput)
-++  if (!DIRECT_INPUT)
-+   {
-+     alloc->Free(alloc, p->bufferBase);
-+     p->bufferBase = 0;
-+@@ -28,7 +34,7 @@ static void LzInWindow_Free(CMatchFinder
-+ static int LzInWindow_Create(CMatchFinder *p, UInt32 keepSizeReserv, ISzAlloc *alloc)
-+ {
-+   UInt32 blockSize = p->keepSizeBefore + p->keepSizeAfter + keepSizeReserv;
-+-  if (p->directInput)
-++  if (DIRECT_INPUT)
-+   {
-+     p->blockSize = blockSize;
-+     return 1;
-+@@ -42,12 +48,12 @@ static int LzInWindow_Create(CMatchFinde
-+   return (p->bufferBase != 0);
-+ }
-+ 
-+-Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
-+-Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; }
-++static Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
-++static Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; }
-+ 
-+-UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; }
-++static UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; }
-+ 
-+-void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
-++static void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
-+ {
-+   p->posLimit -= subValue;
-+   p->pos -= subValue;
-+@@ -58,7 +64,7 @@ static void MatchFinder_ReadBlock(CMatch
-+ {
-+   if (p->streamEndWasReached || p->result != SZ_OK)
-+     return;
-+-  if (p->directInput)
-++  if (DIRECT_INPUT)
-+   {
-+     UInt32 curSize = 0xFFFFFFFF - p->streamPos;
-+     if (curSize > p->directInputRem)
-+@@ -89,7 +95,7 @@ static void MatchFinder_ReadBlock(CMatch
-+   }
-+ }
-+ 
-+-void MatchFinder_MoveBlock(CMatchFinder *p)
-++static void MatchFinder_MoveBlock(CMatchFinder *p)
-+ {
-+   memmove(p->bufferBase,
-+     p->buffer - p->keepSizeBefore,
-+@@ -97,22 +103,14 @@ void MatchFinder_MoveBlock(CMatchFinder
-+   p->buffer = p->bufferBase + p->keepSizeBefore;
-+ }
-+ 
-+-int MatchFinder_NeedMove(CMatchFinder *p)
-++static int MatchFinder_NeedMove(CMatchFinder *p)
-+ {
-+-  if (p->directInput)
-++  if (DIRECT_INPUT)
-+     return 0;
-+   /* if (p->streamEndWasReached) return 0; */
-+   return ((size_t)(p->bufferBase + p->blockSize - p->buffer) <= p->keepSizeAfter);
-+ }
-+ 
-+-void MatchFinder_ReadIfRequired(CMatchFinder *p)
-+-{
-+-  if (p->streamEndWasReached)
-+-    return;
-+-  if (p->keepSizeAfter >= p->streamPos - p->pos)
-+-    MatchFinder_ReadBlock(p);
-+-}
-+-
-+ static void MatchFinder_CheckAndMoveAndRead(CMatchFinder *p)
-+ {
-+   if (MatchFinder_NeedMove(p))
-+@@ -268,7 +266,7 @@ static void MatchFinder_SetLimits(CMatch
-+   p->posLimit = p->pos + limit;
-+ }
-+ 
-+-void MatchFinder_Init(CMatchFinder *p)
-++static void MatchFinder_Init(CMatchFinder *p)
-+ {
-+   UInt32 i;
-+   for (i = 0; i < p->hashSizeSum; i++)
-+@@ -287,7 +285,7 @@ static UInt32 MatchFinder_GetSubValue(CM
-+   return (p->pos - p->historySize - 1) & kNormalizeMask;
-+ }
-+ 
-+-void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
-++static void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
-+ {
-+   UInt32 i;
-+   for (i = 0; i < numItems; i++)
-+@@ -319,38 +317,7 @@ static void MatchFinder_CheckLimits(CMat
-+   MatchFinder_SetLimits(p);
-+ }
-+ 
-+-static UInt32 * Hc_GetMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
-+-    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
-+-    UInt32 *distances, UInt32 maxLen)
-+-{
-+-  son[_cyclicBufferPos] = curMatch;
-+-  for (;;)
-+-  {
-+-    UInt32 delta = pos - curMatch;
-+-    if (cutValue-- == 0 || delta >= _cyclicBufferSize)
-+-      return distances;
-+-    {
-+-      const Byte *pb = cur - delta;
-+-      curMatch = son[_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)];
-+-      if (pb[maxLen] == cur[maxLen] && *pb == *cur)
-+-      {
-+-        UInt32 len = 0;
-+-        while (++len != lenLimit)
-+-          if (pb[len] != cur[len])
-+-            break;
-+-        if (maxLen < len)
-+-        {
-+-          *distances++ = maxLen = len;
-+-          *distances++ = delta - 1;
-+-          if (len == lenLimit)
-+-            return distances;
-+-        }
-+-      }
-+-    }
-+-  }
-+-}
-+-
-+-UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
-++static UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
-+     UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
-+     UInt32 *distances, UInt32 maxLen)
-+ {
-+@@ -460,10 +427,10 @@ static void SkipMatchesSpec(UInt32 lenLi
-+   p->buffer++; \
-+   if (++p->pos == p->posLimit) MatchFinder_CheckLimits(p);
-+ 
-+-#define MOVE_POS_RET MOVE_POS return offset;
-+-
-+ static void MatchFinder_MovePos(CMatchFinder *p) { MOVE_POS; }
-+ 
-++#define MOVE_POS_RET MatchFinder_MovePos(p); return offset;
-++
-+ #define GET_MATCHES_HEADER2(minLen, ret_op) \
-+   UInt32 lenLimit; UInt32 hashValue; const Byte *cur; UInt32 curMatch; \
-+   lenLimit = p->lenLimit; { if (lenLimit < minLen) { MatchFinder_MovePos(p); ret_op; }} \
-+@@ -479,62 +446,7 @@ static void MatchFinder_MovePos(CMatchFi
-+   distances + offset, maxLen) - distances); MOVE_POS_RET;
-+ 
-+ #define SKIP_FOOTER \
-+-  SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MOVE_POS;
-+-
-+-static UInt32 Bt2_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-+-{
-+-  UInt32 offset;
-+-  GET_MATCHES_HEADER(2)
-+-  HASH2_CALC;
-+-  curMatch = p->hash[hashValue];
-+-  p->hash[hashValue] = p->pos;
-+-  offset = 0;
-+-  GET_MATCHES_FOOTER(offset, 1)
-+-}
-+-
-+-UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-+-{
-+-  UInt32 offset;
-+-  GET_MATCHES_HEADER(3)
-+-  HASH_ZIP_CALC;
-+-  curMatch = p->hash[hashValue];
-+-  p->hash[hashValue] = p->pos;
-+-  offset = 0;
-+-  GET_MATCHES_FOOTER(offset, 2)
-+-}
-+-
-+-static UInt32 Bt3_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-+-{
-+-  UInt32 hash2Value, delta2, maxLen, offset;
-+-  GET_MATCHES_HEADER(3)
-+-
-+-  HASH3_CALC;
-+-
-+-  delta2 = p->pos - p->hash[hash2Value];
-+-  curMatch = p->hash[kFix3HashSize + hashValue];
-+-
-+-  p->hash[hash2Value] =
-+-  p->hash[kFix3HashSize + hashValue] = p->pos;
-+-
-+-
-+-  maxLen = 2;
-+-  offset = 0;
-+-  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
-+-  {
-+-    for (; maxLen != lenLimit; maxLen++)
-+-      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
-+-        break;
-+-    distances[0] = maxLen;
-+-    distances[1] = delta2 - 1;
-+-    offset = 2;
-+-    if (maxLen == lenLimit)
-+-    {
-+-      SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p));
-+-      MOVE_POS_RET;
-+-    }
-+-  }
-+-  GET_MATCHES_FOOTER(offset, maxLen)
-+-}
-++  SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MatchFinder_MovePos(p);
-+ 
-+ static UInt32 Bt4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-+ {
-+@@ -583,108 +495,6 @@ static UInt32 Bt4_MatchFinder_GetMatches
-+   GET_MATCHES_FOOTER(offset, maxLen)
-+ }
-+ 
-+-static UInt32 Hc4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-+-{
-+-  UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset;
-+-  GET_MATCHES_HEADER(4)
-+-
-+-  HASH4_CALC;
-+-
-+-  delta2 = p->pos - p->hash[                hash2Value];
-+-  delta3 = p->pos - p->hash[kFix3HashSize + hash3Value];
-+-  curMatch = p->hash[kFix4HashSize + hashValue];
-+-
-+-  p->hash[                hash2Value] =
-+-  p->hash[kFix3HashSize + hash3Value] =
-+-  p->hash[kFix4HashSize + hashValue] = p->pos;
-+-
-+-  maxLen = 1;
-+-  offset = 0;
-+-  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
-+-  {
-+-    distances[0] = maxLen = 2;
-+-    distances[1] = delta2 - 1;
-+-    offset = 2;
-+-  }
-+-  if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur)
-+-  {
-+-    maxLen = 3;
-+-    distances[offset + 1] = delta3 - 1;
-+-    offset += 2;
-+-    delta2 = delta3;
-+-  }
-+-  if (offset != 0)
-+-  {
-+-    for (; maxLen != lenLimit; maxLen++)
-+-      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
-+-        break;
-+-    distances[offset - 2] = maxLen;
-+-    if (maxLen == lenLimit)
-+-    {
-+-      p->son[p->cyclicBufferPos] = curMatch;
-+-      MOVE_POS_RET;
-+-    }
-+-  }
-+-  if (maxLen < 3)
-+-    maxLen = 3;
-+-  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
-+-    distances + offset, maxLen) - (distances));
-+-  MOVE_POS_RET
-+-}
-+-
-+-UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-+-{
-+-  UInt32 offset;
-+-  GET_MATCHES_HEADER(3)
-+-  HASH_ZIP_CALC;
-+-  curMatch = p->hash[hashValue];
-+-  p->hash[hashValue] = p->pos;
-+-  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
-+-    distances, 2) - (distances));
-+-  MOVE_POS_RET
-+-}
-+-
-+-static void Bt2_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-+-{
-+-  do
-+-  {
-+-    SKIP_HEADER(2)
-+-    HASH2_CALC;
-+-    curMatch = p->hash[hashValue];
-+-    p->hash[hashValue] = p->pos;
-+-    SKIP_FOOTER
-+-  }
-+-  while (--num != 0);
-+-}
-+-
-+-void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-+-{
-+-  do
-+-  {
-+-    SKIP_HEADER(3)
-+-    HASH_ZIP_CALC;
-+-    curMatch = p->hash[hashValue];
-+-    p->hash[hashValue] = p->pos;
-+-    SKIP_FOOTER
-+-  }
-+-  while (--num != 0);
-+-}
-+-
-+-static void Bt3_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-+-{
-+-  do
-+-  {
-+-    UInt32 hash2Value;
-+-    SKIP_HEADER(3)
-+-    HASH3_CALC;
-+-    curMatch = p->hash[kFix3HashSize + hashValue];
-+-    p->hash[hash2Value] =
-+-    p->hash[kFix3HashSize + hashValue] = p->pos;
-+-    SKIP_FOOTER
-+-  }
-+-  while (--num != 0);
-+-}
-+-
-+ static void Bt4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-+ {
-+   do
-+@@ -701,61 +511,12 @@ static void Bt4_MatchFinder_Skip(CMatchF
-+   while (--num != 0);
-+ }
-+ 
-+-static void Hc4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-+-{
-+-  do
-+-  {
-+-    UInt32 hash2Value, hash3Value;
-+-    SKIP_HEADER(4)
-+-    HASH4_CALC;
-+-    curMatch = p->hash[kFix4HashSize + hashValue];
-+-    p->hash[                hash2Value] =
-+-    p->hash[kFix3HashSize + hash3Value] =
-+-    p->hash[kFix4HashSize + hashValue] = p->pos;
-+-    p->son[p->cyclicBufferPos] = curMatch;
-+-    MOVE_POS
-+-  }
-+-  while (--num != 0);
-+-}
-+-
-+-void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-+-{
-+-  do
-+-  {
-+-    SKIP_HEADER(3)
-+-    HASH_ZIP_CALC;
-+-    curMatch = p->hash[hashValue];
-+-    p->hash[hashValue] = p->pos;
-+-    p->son[p->cyclicBufferPos] = curMatch;
-+-    MOVE_POS
-+-  }
-+-  while (--num != 0);
-+-}
-+-
-+ void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable)
-+ {
-+   vTable->Init = (Mf_Init_Func)MatchFinder_Init;
-+   vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinder_GetIndexByte;
-+   vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinder_GetNumAvailableBytes;
-+   vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinder_GetPointerToCurrentPos;
-+-  if (!p->btMode)
-+-  {
-+-    vTable->GetMatches = (Mf_GetMatches_Func)Hc4_MatchFinder_GetMatches;
-+-    vTable->Skip = (Mf_Skip_Func)Hc4_MatchFinder_Skip;
-+-  }
-+-  else if (p->numHashBytes == 2)
-+-  {
-+-    vTable->GetMatches = (Mf_GetMatches_Func)Bt2_MatchFinder_GetMatches;
-+-    vTable->Skip = (Mf_Skip_Func)Bt2_MatchFinder_Skip;
-+-  }
-+-  else if (p->numHashBytes == 3)
-+-  {
-+-    vTable->GetMatches = (Mf_GetMatches_Func)Bt3_MatchFinder_GetMatches;
-+-    vTable->Skip = (Mf_Skip_Func)Bt3_MatchFinder_Skip;
-+-  }
-+-  else
-+-  {
-+-    vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
-+-    vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
-+-  }
-++  vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
-++  vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
-+ }
-+--- a/lib/lzma/LzmaDec.c
-++++ b/lib/lzma/LzmaDec.c
-+@@ -682,7 +682,7 @@ static void LzmaDec_InitRc(CLzmaDec *p,
-+   p->needFlush = 0;
-+ }
-+ 
-+-void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
-++static void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
-+ {
-+   p->needFlush = 1;
-+   p->remainLen = 0;
-+@@ -698,7 +698,7 @@ void LzmaDec_InitDicAndState(CLzmaDec *p
-+     p->needInitState = 1;
-+ }
-+ 
-+-void LzmaDec_Init(CLzmaDec *p)
-++static void LzmaDec_Init(CLzmaDec *p)
-+ {
-+   p->dicPos = 0;
-+   LzmaDec_InitDicAndState(p, True, True);
-+@@ -716,7 +716,7 @@ static void LzmaDec_InitStateReal(CLzmaD
-+   p->needInitState = 0;
-+ }
-+ 
-+-SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
-++static SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
-+     ELzmaFinishMode finishMode, ELzmaStatus *status)
-+ {
-+   SizeT inSize = *srcLen;
-+@@ -837,65 +837,13 @@ SRes LzmaDec_DecodeToDic(CLzmaDec *p, Si
-+   return (p->code == 0) ? SZ_OK : SZ_ERROR_DATA;
-+ }
-+ 
-+-SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status)
-+-{
-+-  SizeT outSize = *destLen;
-+-  SizeT inSize = *srcLen;
-+-  *srcLen = *destLen = 0;
-+-  for (;;)
-+-  {
-+-    SizeT inSizeCur = inSize, outSizeCur, dicPos;
-+-    ELzmaFinishMode curFinishMode;
-+-    SRes res;
-+-    if (p->dicPos == p->dicBufSize)
-+-      p->dicPos = 0;
-+-    dicPos = p->dicPos;
-+-    if (outSize > p->dicBufSize - dicPos)
-+-    {
-+-      outSizeCur = p->dicBufSize;
-+-      curFinishMode = LZMA_FINISH_ANY;
-+-    }
-+-    else
-+-    {
-+-      outSizeCur = dicPos + outSize;
-+-      curFinishMode = finishMode;
-+-    }
-+-
-+-    res = LzmaDec_DecodeToDic(p, outSizeCur, src, &inSizeCur, curFinishMode, status);
-+-    src += inSizeCur;
-+-    inSize -= inSizeCur;
-+-    *srcLen += inSizeCur;
-+-    outSizeCur = p->dicPos - dicPos;
-+-    memcpy(dest, p->dic + dicPos, outSizeCur);
-+-    dest += outSizeCur;
-+-    outSize -= outSizeCur;
-+-    *destLen += outSizeCur;
-+-    if (res != 0)
-+-      return res;
-+-    if (outSizeCur == 0 || outSize == 0)
-+-      return SZ_OK;
-+-  }
-+-}
-+-
-+-void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
-++static void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
-+ {
-+   alloc->Free(alloc, p->probs);
-+   p->probs = 0;
-+ }
-+ 
-+-static void LzmaDec_FreeDict(CLzmaDec *p, ISzAlloc *alloc)
-+-{
-+-  alloc->Free(alloc, p->dic);
-+-  p->dic = 0;
-+-}
-+-
-+-void LzmaDec_Free(CLzmaDec *p, ISzAlloc *alloc)
-+-{
-+-  LzmaDec_FreeProbs(p, alloc);
-+-  LzmaDec_FreeDict(p, alloc);
-+-}
-+-
-+-SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
-++static SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
-+ {
-+   UInt32 dicSize;
-+   Byte d;
-+@@ -935,7 +883,7 @@ static SRes LzmaDec_AllocateProbs2(CLzma
-+   return SZ_OK;
-+ }
-+ 
-+-SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
-++static SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
-+ {
-+   CLzmaProps propNew;
-+   RINOK(LzmaProps_Decode(&propNew, props, propsSize));
-+@@ -943,28 +891,6 @@ SRes LzmaDec_AllocateProbs(CLzmaDec *p,
-+   p->prop = propNew;
-+   return SZ_OK;
-+ }
-+-
-+-SRes LzmaDec_Allocate(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
-+-{
-+-  CLzmaProps propNew;
-+-  SizeT dicBufSize;
-+-  RINOK(LzmaProps_Decode(&propNew, props, propsSize));
-+-  RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc));
-+-  dicBufSize = propNew.dicSize;
-+-  if (p->dic == 0 || dicBufSize != p->dicBufSize)
-+-  {
-+-    LzmaDec_FreeDict(p, alloc);
-+-    p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize);
-+-    if (p->dic == 0)
-+-    {
-+-      LzmaDec_FreeProbs(p, alloc);
-+-      return SZ_ERROR_MEM;
-+-    }
-+-  }
-+-  p->dicBufSize = dicBufSize;
-+-  p->prop = propNew;
-+-  return SZ_OK;
-+-}
-+ 
-+ SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
-+     const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode,
-+--- a/lib/lzma/LzmaEnc.c
-++++ b/lib/lzma/LzmaEnc.c
-+@@ -53,7 +53,7 @@ void LzmaEncProps_Init(CLzmaEncProps *p)
-+   p->writeEndMark = 0;
-+ }
-+ 
-+-void LzmaEncProps_Normalize(CLzmaEncProps *p)
-++static void LzmaEncProps_Normalize(CLzmaEncProps *p)
-+ {
-+   int level = p->level;
-+   if (level < 0) level = 5;
-+@@ -76,7 +76,7 @@ void LzmaEncProps_Normalize(CLzmaEncProp
-+       #endif
-+ }
-+ 
-+-UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
-++static UInt32 __maybe_unused LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
-+ {
-+   CLzmaEncProps props = *props2;
-+   LzmaEncProps_Normalize(&props);
-+@@ -93,7 +93,7 @@ UInt32 LzmaEncProps_GetDictSize(const CL
-+ 
-+ #define BSR2_RET(pos, res) { unsigned long i; _BitScanReverse(&i, (pos)); res = (i + i) + ((pos >> (i - 1)) & 1); }
-+ 
-+-UInt32 GetPosSlot1(UInt32 pos)
-++static UInt32 GetPosSlot1(UInt32 pos)
-+ {
-+   UInt32 res;
-+   BSR2_RET(pos, res);
-+@@ -107,7 +107,7 @@ UInt32 GetPosSlot1(UInt32 pos)
-+ #define kNumLogBits (9 + (int)sizeof(size_t) / 2)
-+ #define kDicLogSizeMaxCompress ((kNumLogBits - 1) * 2 + 7)
-+ 
-+-void LzmaEnc_FastPosInit(Byte *g_FastPos)
-++static void LzmaEnc_FastPosInit(Byte *g_FastPos)
-+ {
-+   int c = 2, slotFast;
-+   g_FastPos[0] = 0;
-+@@ -339,58 +339,6 @@ typedef struct
-+   CSaveState saveState;
-+ } CLzmaEnc;
-+ 
-+-void LzmaEnc_SaveState(CLzmaEncHandle pp)
-+-{
-+-  CLzmaEnc *p = (CLzmaEnc *)pp;
-+-  CSaveState *dest = &p->saveState;
-+-  int i;
-+-  dest->lenEnc = p->lenEnc;
-+-  dest->repLenEnc = p->repLenEnc;
-+-  dest->state = p->state;
-+-
-+-  for (i = 0; i < kNumStates; i++)
-+-  {
-+-    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
-+-    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
-+-  }
-+-  for (i = 0; i < kNumLenToPosStates; i++)
-+-    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
-+-  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
-+-  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
-+-  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
-+-  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
-+-  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
-+-  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
-+-  memcpy(dest->reps, p->reps, sizeof(p->reps));
-+-  memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb));
-+-}
-+-
-+-void LzmaEnc_RestoreState(CLzmaEncHandle pp)
-+-{
-+-  CLzmaEnc *dest = (CLzmaEnc *)pp;
-+-  const CSaveState *p = &dest->saveState;
-+-  int i;
-+-  dest->lenEnc = p->lenEnc;
-+-  dest->repLenEnc = p->repLenEnc;
-+-  dest->state = p->state;
-+-
-+-  for (i = 0; i < kNumStates; i++)
-+-  {
-+-    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
-+-    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
-+-  }
-+-  for (i = 0; i < kNumLenToPosStates; i++)
-+-    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
-+-  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
-+-  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
-+-  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
-+-  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
-+-  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
-+-  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
-+-  memcpy(dest->reps, p->reps, sizeof(p->reps));
-+-  memcpy(dest->litProbs, p->litProbs, (0x300 << dest->lclp) * sizeof(CLzmaProb));
-+-}
-+-
-+ SRes LzmaEnc_SetProps(CLzmaEncHandle pp, const CLzmaEncProps *props2)
-+ {
-+   CLzmaEnc *p = (CLzmaEnc *)pp;
-+@@ -600,7 +548,7 @@ static void LitEnc_EncodeMatched(CRangeE
-+   while (symbol < 0x10000);
-+ }
-+ 
-+-void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
-++static void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
-+ {
-+   UInt32 i;
-+   for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits))
-+@@ -1676,7 +1624,7 @@ static void FillDistancesPrices(CLzmaEnc
-+   p->matchPriceCount = 0;
-+ }
-+ 
-+-void LzmaEnc_Construct(CLzmaEnc *p)
-++static void LzmaEnc_Construct(CLzmaEnc *p)
-+ {
-+   RangeEnc_Construct(&p->rc);
-+   MatchFinder_Construct(&p->matchFinderBase);
-+@@ -1709,7 +1657,7 @@ CLzmaEncHandle LzmaEnc_Create(ISzAlloc *
-+   return p;
-+ }
-+ 
-+-void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
-++static void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
-+ {
-+   alloc->Free(alloc, p->litProbs);
-+   alloc->Free(alloc, p->saveState.litProbs);
-+@@ -1717,7 +1665,7 @@ void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAl
-+   p->saveState.litProbs = 0;
-+ }
-+ 
-+-void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
-++static void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
-+ {
-+   #ifndef _7ZIP_ST
-+   MatchFinderMt_Destruct(&p->matchFinderMt, allocBig);
-+@@ -1947,7 +1895,7 @@ static SRes LzmaEnc_Alloc(CLzmaEnc *p, U
-+   return SZ_OK;
-+ }
-+ 
-+-void LzmaEnc_Init(CLzmaEnc *p)
-++static void LzmaEnc_Init(CLzmaEnc *p)
-+ {
-+   UInt32 i;
-+   p->state = 0;
-+@@ -2005,7 +1953,7 @@ void LzmaEnc_Init(CLzmaEnc *p)
-+   p->lpMask = (1 << p->lp) - 1;
-+ }
-+ 
-+-void LzmaEnc_InitPrices(CLzmaEnc *p)
-++static void LzmaEnc_InitPrices(CLzmaEnc *p)
-+ {
-+   if (!p->fastMode)
-+   {
-+@@ -2037,26 +1985,6 @@ static SRes LzmaEnc_AllocAndInit(CLzmaEn
-+   return SZ_OK;
-+ }
-+ 
-+-static SRes LzmaEnc_Prepare(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream,
-+-    ISzAlloc *alloc, ISzAlloc *allocBig)
-+-{
-+-  CLzmaEnc *p = (CLzmaEnc *)pp;
-+-  p->matchFinderBase.stream = inStream;
-+-  p->needInit = 1;
-+-  p->rc.outStream = outStream;
-+-  return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig);
-+-}
-+-
-+-SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp,
-+-    ISeqInStream *inStream, UInt32 keepWindowSize,
-+-    ISzAlloc *alloc, ISzAlloc *allocBig)
-+-{
-+-  CLzmaEnc *p = (CLzmaEnc *)pp;
-+-  p->matchFinderBase.stream = inStream;
-+-  p->needInit = 1;
-+-  return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
-+-}
-+-
-+ static void LzmaEnc_SetInputBuf(CLzmaEnc *p, const Byte *src, SizeT srcLen)
-+ {
-+   p->matchFinderBase.directInput = 1;
-+@@ -2064,7 +1992,7 @@ static void LzmaEnc_SetInputBuf(CLzmaEnc
-+   p->matchFinderBase.directInputRem = srcLen;
-+ }
-+ 
-+-SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
-++static SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
-+     UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
-+ {
-+   CLzmaEnc *p = (CLzmaEnc *)pp;
-+@@ -2074,7 +2002,7 @@ SRes LzmaEnc_MemPrepare(CLzmaEncHandle p
-+   return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
-+ }
-+ 
-+-void LzmaEnc_Finish(CLzmaEncHandle pp)
-++static void LzmaEnc_Finish(CLzmaEncHandle pp)
-+ {
-+   #ifndef _7ZIP_ST
-+   CLzmaEnc *p = (CLzmaEnc *)pp;
-+@@ -2107,53 +2035,6 @@ static size_t MyWrite(void *pp, const vo
-+   return size;
-+ }
-+ 
-+-
-+-UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp)
-+-{
-+-  const CLzmaEnc *p = (CLzmaEnc *)pp;
-+-  return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj);
-+-}
-+-
-+-const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp)
-+-{
-+-  const CLzmaEnc *p = (CLzmaEnc *)pp;
-+-  return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset;
-+-}
-+-
-+-SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit,
-+-    Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize)
-+-{
-+-  CLzmaEnc *p = (CLzmaEnc *)pp;
-+-  UInt64 nowPos64;
-+-  SRes res;
-+-  CSeqOutStreamBuf outStream;
-+-
-+-  outStream.funcTable.Write = MyWrite;
-+-  outStream.data = dest;
-+-  outStream.rem = *destLen;
-+-  outStream.overflow = False;
-+-
-+-  p->writeEndMark = False;
-+-  p->finished = False;
-+-  p->result = SZ_OK;
-+-
-+-  if (reInit)
-+-    LzmaEnc_Init(p);
-+-  LzmaEnc_InitPrices(p);
-+-  nowPos64 = p->nowPos64;
-+-  RangeEnc_Init(&p->rc);
-+-  p->rc.outStream = &outStream.funcTable;
-+-
-+-  res = LzmaEnc_CodeOneBlock(p, True, desiredPackSize, *unpackSize);
-+-
-+-  *unpackSize = (UInt32)(p->nowPos64 - nowPos64);
-+-  *destLen -= outStream.rem;
-+-  if (outStream.overflow)
-+-    return SZ_ERROR_OUTPUT_EOF;
-+-
-+-  return res;
-+-}
-+-
-+ static SRes LzmaEnc_Encode2(CLzmaEnc *p, ICompressProgress *progress)
-+ {
-+   SRes res = SZ_OK;
-+@@ -2184,13 +2065,6 @@ static SRes LzmaEnc_Encode2(CLzmaEnc *p,
-+   return res;
-+ }
-+ 
-+-SRes LzmaEnc_Encode(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress,
-+-    ISzAlloc *alloc, ISzAlloc *allocBig)
-+-{
-+-  RINOK(LzmaEnc_Prepare(pp, outStream, inStream, alloc, allocBig));
-+-  return LzmaEnc_Encode2((CLzmaEnc *)pp, progress);
-+-}
-+-
-+ SRes LzmaEnc_WriteProperties(CLzmaEncHandle pp, Byte *props, SizeT *size)
-+ {
-+   CLzmaEnc *p = (CLzmaEnc *)pp;
-+@@ -2247,25 +2121,3 @@ SRes LzmaEnc_MemEncode(CLzmaEncHandle pp
-+     return SZ_ERROR_OUTPUT_EOF;
-+   return res;
-+ }
-+-
-+-SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
-+-    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
-+-    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig)
-+-{
-+-  CLzmaEnc *p = (CLzmaEnc *)LzmaEnc_Create(alloc);
-+-  SRes res;
-+-  if (p == 0)
-+-    return SZ_ERROR_MEM;
-+-
-+-  res = LzmaEnc_SetProps(p, props);
-+-  if (res == SZ_OK)
-+-  {
-+-    res = LzmaEnc_WriteProperties(p, propsEncoded, propsSize);
-+-    if (res == SZ_OK)
-+-      res = LzmaEnc_MemEncode(p, dest, destLen, src, srcLen,
-+-          writeEndMark, progress, alloc, allocBig);
-+-  }
-+-
-+-  LzmaEnc_Destroy(p, alloc, allocBig);
-+-  return res;
-+-}
-diff --git a/target/linux/generic/hack-5.10/640-bridge-only-accept-EAP-locally.patch b/target/linux/generic/hack-5.10/640-bridge-only-accept-EAP-locally.patch
-new file mode 100644
-index 0000000000..d8e5f2fc9b
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/640-bridge-only-accept-EAP-locally.patch
-@@ -0,0 +1,82 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Fri, 7 Jul 2017 17:18:54 +0200
-+Subject: bridge: only accept EAP locally
-+
-+When bridging, do not forward EAP frames to other ports, only deliver
-+them locally, regardless of the state.
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+[add disable_eap_hack sysfs attribute]
-+Signed-off-by: Etienne Champetier <champetier.etienne@gmail.com>
-+---
-+
-+--- a/net/bridge/br_input.c
-++++ b/net/bridge/br_input.c
-+@@ -107,10 +107,14 @@ int br_handle_frame_finish(struct net *n
-+ 		}
-+ 	}
-+ 
-++	BR_INPUT_SKB_CB(skb)->brdev = br->dev;
-++
-++	if (skb->protocol == htons(ETH_P_PAE) && !br->disable_eap_hack)
-++		return br_pass_frame_up(skb);
-++
-+ 	if (state == BR_STATE_LEARNING)
-+ 		goto drop;
-+ 
-+-	BR_INPUT_SKB_CB(skb)->brdev = br->dev;
-+ 	BR_INPUT_SKB_CB(skb)->src_port_isolated = !!(p->flags & BR_ISOLATED);
-+ 
-+ 	if (IS_ENABLED(CONFIG_INET) &&
-+--- a/net/bridge/br_private.h
-++++ b/net/bridge/br_private.h
-+@@ -404,6 +404,8 @@ struct net_bridge {
-+ 	u16				group_fwd_mask;
-+ 	u16				group_fwd_mask_required;
-+ 
-++	bool				disable_eap_hack;
-++
-+ 	/* STP */
-+ 	bridge_id			designated_root;
-+ 	bridge_id			bridge_id;
-+--- a/net/bridge/br_sysfs_br.c
-++++ b/net/bridge/br_sysfs_br.c
-+@@ -164,6 +164,30 @@ static ssize_t group_fwd_mask_store(stru
-+ }
-+ static DEVICE_ATTR_RW(group_fwd_mask);
-+ 
-++static ssize_t disable_eap_hack_show(struct device *d,
-++				   struct device_attribute *attr,
-++				   char *buf)
-++{
-++	struct net_bridge *br = to_bridge(d);
-++	return sprintf(buf, "%u\n", br->disable_eap_hack);
-++}
-++
-++static int set_disable_eap_hack(struct net_bridge *br, unsigned long val)
-++{
-++	br->disable_eap_hack = !!val;
-++
-++	return 0;
-++}
-++
-++static ssize_t disable_eap_hack_store(struct device *d,
-++				    struct device_attribute *attr,
-++				    const char *buf,
-++				    size_t len)
-++{
-++	return store_bridge_parm(d, buf, len, set_disable_eap_hack);
-++}
-++static DEVICE_ATTR_RW(disable_eap_hack);
-++
-+ static ssize_t priority_show(struct device *d, struct device_attribute *attr,
-+ 			     char *buf)
-+ {
-+@@ -849,6 +873,7 @@ static struct attribute *bridge_attrs[]
-+ 	&dev_attr_ageing_time.attr,
-+ 	&dev_attr_stp_state.attr,
-+ 	&dev_attr_group_fwd_mask.attr,
-++	&dev_attr_disable_eap_hack.attr,
-+ 	&dev_attr_priority.attr,
-+ 	&dev_attr_bridge_id.attr,
-+ 	&dev_attr_root_id.attr,
-diff --git a/target/linux/generic/hack-5.10/645-netfilter-connmark-introduce-set-dscpmark.patch b/target/linux/generic/hack-5.10/645-netfilter-connmark-introduce-set-dscpmark.patch
-new file mode 100644
-index 0000000000..2d3fe01a75
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/645-netfilter-connmark-introduce-set-dscpmark.patch
-@@ -0,0 +1,212 @@
-+From eda40b8c8c82e0f2789d6bc8bf63846dce2e8f32 Mon Sep 17 00:00:00 2001
-+From: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
-+Date: Sat, 23 Mar 2019 09:29:49 +0000
-+Subject: [PATCH] netfilter: connmark: introduce set-dscpmark
-+
-+set-dscpmark is a method of storing the DSCP of an ip packet into
-+conntrack mark.  In combination with a suitable tc filter action
-+(act_ctinfo) DSCP values are able to be stored in the mark on egress and
-+restored on ingress across links that otherwise alter or bleach DSCP.
-+
-+This is useful for qdiscs such as CAKE which are able to shape according
-+to policies based on DSCP.
-+
-+Ingress classification is traditionally a challenging task since
-+iptables rules haven't yet run and tc filter/eBPF programs are pre-NAT
-+lookups, hence are unable to see internal IPv4 addresses as used on the
-+typical home masquerading gateway.
-+
-+x_tables CONNMARK set-dscpmark target solves the problem of storing the
-+DSCP to the conntrack mark in a way suitable for the new act_ctinfo tc
-+action to restore.
-+
-+The set-dscpmark option accepts 2 parameters, a 32bit 'dscpmask' and a
-+32bit 'statemask'.  The dscp mask must be 6 contiguous bits and
-+represents the area where the DSCP will be stored in the connmark.  The
-+state mask is a minimum 1 bit length mask that must not overlap with the
-+dscpmask.  It represents a flag which is set when the DSCP has been
-+stored in the conntrack mark. This is useful to implement a 'one shot'
-+iptables based classification where the 'complicated' iptables rules are
-+only run once to classify the connection on initial (egress) packet and
-+subsequent packets are all marked/restored with the same DSCP.  A state
-+mask of zero disables the setting of a status bit/s.
-+
-+example syntax with a suitably modified iptables user space application:
-+
-+iptables -A QOS_MARK_eth0 -t mangle -j CONNMARK --set-dscpmark 0xfc000000/0x01000000
-+
-+Would store the DSCP in the top 6 bits of the 32bit mark field, and use
-+the LSB of the top byte as the 'DSCP has been stored' marker.
-+
-+|----0xFC----conntrack mark----000000---|
-+| Bits 31-26 | bit 25 | bit24 |~~~ Bit 0|
-+| DSCP       | unused | flag  |unused   |
-+|-----------------------0x01---000000---|
-+      ^                   ^
-+      |                   |
-+      ---|             Conditional flag
-+         |             set this when dscp
-+|-ip diffserv-|        stored in mark
-+| 6 bits      |
-+|-------------|
-+
-+an identically configured tc action to restore looks like:
-+
-+tc filter show dev eth0 ingress
-+filter parent ffff: protocol all pref 10 u32 chain 0
-+filter parent ffff: protocol all pref 10 u32 chain 0 fh 800: ht divisor 1
-+filter parent ffff: protocol all pref 10 u32 chain 0 fh 800::800 order 2048 key ht 800 bkt 0 flowid 1: not_in_hw
-+  match 00000000/00000000 at 0
-+	action order 1: ctinfo zone 0 pipe
-+	 index 2 ref 1 bind 1 dscp 0xfc000000/0x1000000
-+
-+	action order 2: mirred (Egress Redirect to device ifb4eth0) stolen
-+	index 1 ref 1 bind 1
-+
-+|----0xFC----conntrack mark----000000---|
-+| Bits 31-26 | bit 25 | bit24 |~~~ Bit 0|
-+| DSCP       | unused | flag  |unused   |
-+|-----------------------0x01---000000---|
-+      |                   |
-+      |                   |
-+      ---|             Conditional flag
-+         v             only restore if set
-+|-ip diffserv-|
-+| 6 bits      |
-+|-------------|
-+
-+Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
-+---
-+ include/uapi/linux/netfilter/xt_connmark.h | 10 ++++
-+ net/netfilter/xt_connmark.c                | 55 ++++++++++++++++++----
-+ 2 files changed, 57 insertions(+), 8 deletions(-)
-+
-+--- a/include/uapi/linux/netfilter/xt_connmark.h
-++++ b/include/uapi/linux/netfilter/xt_connmark.h
-+@@ -20,6 +20,11 @@ enum {
-+ };
-+ 
-+ enum {
-++	XT_CONNMARK_VALUE =	(1 << 0),
-++	XT_CONNMARK_DSCP = 	(1 << 1)
-++};
-++
-++enum {
-+ 	D_SHIFT_LEFT = 0,
-+ 	D_SHIFT_RIGHT,
-+ };
-+@@ -34,6 +39,11 @@ struct xt_connmark_tginfo2 {
-+ 	__u8 shift_dir, shift_bits, mode;
-+ };
-+ 
-++struct xt_connmark_tginfo3 {
-++	__u32 ctmark, ctmask, nfmask;
-++	__u8 shift_dir, shift_bits, mode, func;
-++};
-++
-+ struct xt_connmark_mtinfo1 {
-+ 	__u32 mark, mask;
-+ 	__u8 invert;
-+--- a/net/netfilter/xt_connmark.c
-++++ b/net/netfilter/xt_connmark.c
-+@@ -24,12 +24,13 @@ MODULE_ALIAS("ipt_connmark");
-+ MODULE_ALIAS("ip6t_connmark");
-+ 
-+ static unsigned int
-+-connmark_tg_shift(struct sk_buff *skb, const struct xt_connmark_tginfo2 *info)
-++connmark_tg_shift(struct sk_buff *skb, const struct xt_connmark_tginfo3 *info)
-+ {
-+ 	enum ip_conntrack_info ctinfo;
-+ 	u_int32_t new_targetmark;
-+ 	struct nf_conn *ct;
-+ 	u_int32_t newmark;
-++	u_int8_t dscp;
-+ 
-+ 	ct = nf_ct_get(skb, &ctinfo);
-+ 	if (ct == NULL)
-+@@ -37,12 +38,24 @@ connmark_tg_shift(struct sk_buff *skb, c
-+ 
-+ 	switch (info->mode) {
-+ 	case XT_CONNMARK_SET:
-+-		newmark = (ct->mark & ~info->ctmask) ^ info->ctmark;
-+-		if (info->shift_dir == D_SHIFT_RIGHT)
-+-			newmark >>= info->shift_bits;
-+-		else
-+-			newmark <<= info->shift_bits;
-++		newmark = ct->mark;
-++		if (info->func & XT_CONNMARK_VALUE) {
-++			newmark = (newmark & ~info->ctmask) ^ info->ctmark;
-++			if (info->shift_dir == D_SHIFT_RIGHT)
-++				newmark >>= info->shift_bits;
-++			else
-++				newmark <<= info->shift_bits;
-++		} else if (info->func & XT_CONNMARK_DSCP) {
-++			if (skb->protocol == htons(ETH_P_IP))
-++				dscp = ipv4_get_dsfield(ip_hdr(skb)) >> 2;
-++			else if (skb->protocol == htons(ETH_P_IPV6))
-++				dscp = ipv6_get_dsfield(ipv6_hdr(skb)) >> 2;
-++			else	/* protocol doesn't have diffserv */
-++				break;
-+ 
-++			newmark = (newmark & ~info->ctmark) |
-++				  (info->ctmask | (dscp << info->shift_bits));
-++		}
-+ 		if (ct->mark != newmark) {
-+ 			ct->mark = newmark;
-+ 			nf_conntrack_event_cache(IPCT_MARK, ct);
-+@@ -81,20 +94,36 @@ static unsigned int
-+ connmark_tg(struct sk_buff *skb, const struct xt_action_param *par)
-+ {
-+ 	const struct xt_connmark_tginfo1 *info = par->targinfo;
-+-	const struct xt_connmark_tginfo2 info2 = {
-++	const struct xt_connmark_tginfo3 info3 = {
-+ 		.ctmark	= info->ctmark,
-+ 		.ctmask	= info->ctmask,
-+ 		.nfmask	= info->nfmask,
-+ 		.mode	= info->mode,
-++		.func	= XT_CONNMARK_VALUE
-+ 	};
-+ 
-+-	return connmark_tg_shift(skb, &info2);
-++	return connmark_tg_shift(skb, &info3);
-+ }
-+ 
-+ static unsigned int
-+ connmark_tg_v2(struct sk_buff *skb, const struct xt_action_param *par)
-+ {
-+ 	const struct xt_connmark_tginfo2 *info = par->targinfo;
-++	const struct xt_connmark_tginfo3 info3 = {
-++		.ctmark	= info->ctmark,
-++		.ctmask	= info->ctmask,
-++		.nfmask	= info->nfmask,
-++		.mode	= info->mode,
-++		.func	= XT_CONNMARK_VALUE
-++	};
-++
-++	return connmark_tg_shift(skb, &info3);
-++}
-++
-++static unsigned int
-++connmark_tg_v3(struct sk_buff *skb, const struct xt_action_param *par)
-++{
-++	const struct xt_connmark_tginfo3 *info = par->targinfo;
-+ 
-+ 	return connmark_tg_shift(skb, info);
-+ }
-+@@ -165,6 +194,16 @@ static struct xt_target connmark_tg_reg[
-+ 		.targetsize     = sizeof(struct xt_connmark_tginfo2),
-+ 		.destroy        = connmark_tg_destroy,
-+ 		.me             = THIS_MODULE,
-++	},
-++	{
-++		.name           = "CONNMARK",
-++		.revision       = 3,
-++		.family         = NFPROTO_UNSPEC,
-++		.checkentry     = connmark_tg_check,
-++		.target         = connmark_tg_v3,
-++		.targetsize     = sizeof(struct xt_connmark_tginfo3),
-++		.destroy        = connmark_tg_destroy,
-++		.me             = THIS_MODULE,
-+ 	}
-+ };
-+ 
-diff --git a/target/linux/generic/hack-5.10/650-netfilter-add-xt_FLOWOFFLOAD-target.patch b/target/linux/generic/hack-5.10/650-netfilter-add-xt_FLOWOFFLOAD-target.patch
-new file mode 100644
-index 0000000000..97aa7a673b
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/650-netfilter-add-xt_FLOWOFFLOAD-target.patch
-@@ -0,0 +1,820 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Tue, 20 Feb 2018 15:56:02 +0100
-+Subject: [PATCH] netfilter: add xt_FLOWOFFLOAD target
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ create mode 100644 net/netfilter/xt_OFFLOAD.c
-+
-+--- a/net/ipv4/netfilter/Kconfig
-++++ b/net/ipv4/netfilter/Kconfig
-+@@ -56,8 +56,6 @@ config NF_TABLES_ARP
-+ 	help
-+ 	  This option enables the ARP support for nf_tables.
-+ 
-+-endif # NF_TABLES
-+-
-+ config NF_FLOW_TABLE_IPV4
-+ 	tristate "Netfilter flow table IPv4 module"
-+ 	depends on NF_FLOW_TABLE
-+@@ -66,6 +64,8 @@ config NF_FLOW_TABLE_IPV4
-+ 
-+ 	  To compile it as a module, choose M here.
-+ 
-++endif # NF_TABLES
-++
-+ config NF_DUP_IPV4
-+ 	tristate "Netfilter IPv4 packet duplication to alternate destination"
-+ 	depends on !NF_CONNTRACK || NF_CONNTRACK
-+--- a/net/ipv6/netfilter/Kconfig
-++++ b/net/ipv6/netfilter/Kconfig
-+@@ -45,7 +45,6 @@ config NFT_FIB_IPV6
-+ 	  multicast or blackhole.
-+ 
-+ endif # NF_TABLES_IPV6
-+-endif # NF_TABLES
-+ 
-+ config NF_FLOW_TABLE_IPV6
-+ 	tristate "Netfilter flow table IPv6 module"
-+@@ -55,6 +54,8 @@ config NF_FLOW_TABLE_IPV6
-+ 
-+ 	  To compile it as a module, choose M here.
-+ 
-++endif # NF_TABLES
-++
-+ config NF_DUP_IPV6
-+ 	tristate "Netfilter IPv6 packet duplication to alternate destination"
-+ 	depends on !NF_CONNTRACK || NF_CONNTRACK
-+--- a/net/netfilter/Kconfig
-++++ b/net/netfilter/Kconfig
-+@@ -683,8 +683,6 @@ config NFT_FIB_NETDEV
-+ 
-+ endif # NF_TABLES_NETDEV
-+ 
-+-endif # NF_TABLES
-+-
-+ config NF_FLOW_TABLE_INET
-+ 	tristate "Netfilter flow table mixed IPv4/IPv6 module"
-+ 	depends on NF_FLOW_TABLE
-+@@ -693,11 +691,12 @@ config NF_FLOW_TABLE_INET
-+ 
-+ 	  To compile it as a module, choose M here.
-+ 
-++endif # NF_TABLES
-++
-+ config NF_FLOW_TABLE
-+ 	tristate "Netfilter flow table module"
-+ 	depends on NETFILTER_INGRESS
-+ 	depends on NF_CONNTRACK
-+-	depends on NF_TABLES
-+ 	help
-+ 	  This option adds the flow table core infrastructure.
-+ 
-+@@ -977,6 +976,15 @@ config NETFILTER_XT_TARGET_NOTRACK
-+ 	depends on NETFILTER_ADVANCED
-+ 	select NETFILTER_XT_TARGET_CT
-+ 
-++config NETFILTER_XT_TARGET_FLOWOFFLOAD
-++	tristate '"FLOWOFFLOAD" target support'
-++	depends on NF_FLOW_TABLE
-++	depends on NETFILTER_INGRESS
-++	help
-++	  This option adds a `FLOWOFFLOAD' target, which uses the nf_flow_offload
-++	  module to speed up processing of packets by bypassing the usual
-++	  netfilter chains
-++
-+ config NETFILTER_XT_TARGET_RATEEST
-+ 	tristate '"RATEEST" target support'
-+ 	depends on NETFILTER_ADVANCED
-+--- a/net/netfilter/Makefile
-++++ b/net/netfilter/Makefile
-+@@ -145,6 +145,7 @@ obj-$(CONFIG_NETFILTER_XT_TARGET_CLASSIF
-+ obj-$(CONFIG_NETFILTER_XT_TARGET_CONNSECMARK) += xt_CONNSECMARK.o
-+ obj-$(CONFIG_NETFILTER_XT_TARGET_CT) += xt_CT.o
-+ obj-$(CONFIG_NETFILTER_XT_TARGET_DSCP) += xt_DSCP.o
-++obj-$(CONFIG_NETFILTER_XT_TARGET_FLOWOFFLOAD) += xt_FLOWOFFLOAD.o
-+ obj-$(CONFIG_NETFILTER_XT_TARGET_HL) += xt_HL.o
-+ obj-$(CONFIG_NETFILTER_XT_TARGET_HMARK) += xt_HMARK.o
-+ obj-$(CONFIG_NETFILTER_XT_TARGET_LED) += xt_LED.o
-+--- /dev/null
-++++ b/net/netfilter/xt_FLOWOFFLOAD.c
-+@@ -0,0 +1,658 @@
-++/*
-++ * Copyright (C) 2018-2021 Felix Fietkau <nbd@nbd.name>
-++ *
-++ * This program is free software; you can redistribute it and/or modify
-++ * it under the terms of the GNU General Public License version 2 as
-++ * published by the Free Software Foundation.
-++ */
-++#include <linux/module.h>
-++#include <linux/init.h>
-++#include <linux/netfilter.h>
-++#include <linux/netfilter/xt_FLOWOFFLOAD.h>
-++#include <net/ip.h>
-++#include <net/netfilter/nf_conntrack.h>
-++#include <net/netfilter/nf_conntrack_extend.h>
-++#include <net/netfilter/nf_conntrack_helper.h>
-++#include <net/netfilter/nf_flow_table.h>
-++
-++struct xt_flowoffload_hook {
-++	struct hlist_node list;
-++	struct nf_hook_ops ops;
-++	struct net *net;
-++	bool registered;
-++	bool used;
-++};
-++
-++struct xt_flowoffload_table {
-++	struct nf_flowtable ft;
-++	struct hlist_head hooks;
-++	struct delayed_work work;
-++};
-++
-++static DEFINE_SPINLOCK(hooks_lock);
-++
-++struct xt_flowoffload_table flowtable[2];
-++
-++static unsigned int
-++xt_flowoffload_net_hook(void *priv, struct sk_buff *skb,
-++			const struct nf_hook_state *state)
-++{
-++	struct nf_flowtable *ft = priv;
-++
-++	if (!atomic_read(&ft->rhashtable.nelems))
-++		return NF_ACCEPT;
-++
-++	switch (skb->protocol) {
-++	case htons(ETH_P_IP):
-++		return nf_flow_offload_ip_hook(priv, skb, state);
-++	case htons(ETH_P_IPV6):
-++		return nf_flow_offload_ipv6_hook(priv, skb, state);
-++	}
-++
-++	return NF_ACCEPT;
-++}
-++
-++static int
-++xt_flowoffload_create_hook(struct xt_flowoffload_table *table,
-++			   struct net_device *dev)
-++{
-++	struct xt_flowoffload_hook *hook;
-++	struct nf_hook_ops *ops;
-++
-++	hook = kzalloc(sizeof(*hook), GFP_ATOMIC);
-++	if (!hook)
-++		return -ENOMEM;
-++
-++	ops = &hook->ops;
-++	ops->pf = NFPROTO_NETDEV;
-++	ops->hooknum = NF_NETDEV_INGRESS;
-++	ops->priority = 10;
-++	ops->priv = &table->ft;
-++	ops->hook = xt_flowoffload_net_hook;
-++	ops->dev = dev;
-++
-++	hlist_add_head(&hook->list, &table->hooks);
-++	mod_delayed_work(system_power_efficient_wq, &table->work, 0);
-++
-++	return 0;
-++}
-++
-++static struct xt_flowoffload_hook *
-++flow_offload_lookup_hook(struct xt_flowoffload_table *table,
-++			 struct net_device *dev)
-++{
-++	struct xt_flowoffload_hook *hook;
-++
-++	hlist_for_each_entry(hook, &table->hooks, list) {
-++		if (hook->ops.dev == dev)
-++			return hook;
-++	}
-++
-++	return NULL;
-++}
-++
-++static void
-++xt_flowoffload_check_device(struct xt_flowoffload_table *table,
-++			    struct net_device *dev)
-++{
-++	struct xt_flowoffload_hook *hook;
-++
-++	if (!dev)
-++		return;
-++
-++	spin_lock_bh(&hooks_lock);
-++	hook = flow_offload_lookup_hook(table, dev);
-++	if (hook)
-++		hook->used = true;
-++	else
-++		xt_flowoffload_create_hook(table, dev);
-++	spin_unlock_bh(&hooks_lock);
-++}
-++
-++static void
-++xt_flowoffload_register_hooks(struct xt_flowoffload_table *table)
-++{
-++	struct xt_flowoffload_hook *hook;
-++
-++restart:
-++	hlist_for_each_entry(hook, &table->hooks, list) {
-++		if (hook->registered)
-++			continue;
-++
-++		hook->registered = true;
-++		hook->net = dev_net(hook->ops.dev);
-++		spin_unlock_bh(&hooks_lock);
-++		nf_register_net_hook(hook->net, &hook->ops);
-++		if (table->ft.flags & NF_FLOWTABLE_HW_OFFLOAD)
-++			table->ft.type->setup(&table->ft, hook->ops.dev,
-++					      FLOW_BLOCK_BIND);
-++		spin_lock_bh(&hooks_lock);
-++		goto restart;
-++	}
-++
-++}
-++
-++static bool
-++xt_flowoffload_cleanup_hooks(struct xt_flowoffload_table *table)
-++{
-++	struct xt_flowoffload_hook *hook;
-++	bool active = false;
-++
-++restart:
-++	spin_lock_bh(&hooks_lock);
-++	hlist_for_each_entry(hook, &table->hooks, list) {
-++		if (hook->used || !hook->registered) {
-++			active = true;
-++			continue;
-++		}
-++
-++		hlist_del(&hook->list);
-++		spin_unlock_bh(&hooks_lock);
-++		if (table->ft.flags & NF_FLOWTABLE_HW_OFFLOAD)
-++			table->ft.type->setup(&table->ft, hook->ops.dev,
-++					      FLOW_BLOCK_UNBIND);
-++		nf_unregister_net_hook(hook->net, &hook->ops);
-++		kfree(hook);
-++		goto restart;
-++	}
-++	spin_unlock_bh(&hooks_lock);
-++
-++	return active;
-++}
-++
-++static void
-++xt_flowoffload_check_hook(struct flow_offload *flow, void *data)
-++{
-++	struct xt_flowoffload_table *table = data;
-++	struct flow_offload_tuple *tuple0 = &flow->tuplehash[0].tuple;
-++	struct flow_offload_tuple *tuple1 = &flow->tuplehash[1].tuple;
-++	struct xt_flowoffload_hook *hook;
-++
-++	spin_lock_bh(&hooks_lock);
-++	hlist_for_each_entry(hook, &table->hooks, list) {
-++		if (hook->ops.dev->ifindex != tuple0->iifidx &&
-++		    hook->ops.dev->ifindex != tuple1->iifidx)
-++			continue;
-++
-++		hook->used = true;
-++	}
-++	spin_unlock_bh(&hooks_lock);
-++
-++	cond_resched();
-++}
-++
-++static void
-++xt_flowoffload_hook_work(struct work_struct *work)
-++{
-++	struct xt_flowoffload_table *table;
-++	struct xt_flowoffload_hook *hook;
-++	int err;
-++
-++	table = container_of(work, struct xt_flowoffload_table, work.work);
-++
-++	spin_lock_bh(&hooks_lock);
-++	xt_flowoffload_register_hooks(table);
-++	hlist_for_each_entry(hook, &table->hooks, list)
-++		hook->used = false;
-++	spin_unlock_bh(&hooks_lock);
-++
-++	err = nf_flow_table_iterate(&table->ft, xt_flowoffload_check_hook,
-++				    table);
-++	if (err && err != -EAGAIN)
-++		goto out;
-++
-++	if (!xt_flowoffload_cleanup_hooks(table))
-++		return;
-++
-++out:
-++	queue_delayed_work(system_power_efficient_wq, &table->work, HZ);
-++}
-++
-++static bool
-++xt_flowoffload_skip(struct sk_buff *skb, int family)
-++{
-++	if (skb_sec_path(skb))
-++		return true;
-++
-++	if (family == NFPROTO_IPV4) {
-++		const struct ip_options *opt = &(IPCB(skb)->opt);
-++
-++		if (unlikely(opt->optlen))
-++			return true;
-++	}
-++
-++	return false;
-++}
-++
-++static bool flow_is_valid_ether_device(const struct net_device *dev)
-++{
-++	if (!dev || (dev->flags & IFF_LOOPBACK) || dev->type != ARPHRD_ETHER ||
-++	    dev->addr_len != ETH_ALEN || !is_valid_ether_addr(dev->dev_addr))
-++		return false;
-++
-++	return true;
-++}
-++
-++static void
-++xt_flowoffload_route_check_path(struct nf_flow_route *route,
-++				const struct nf_conn *ct,
-++				enum ip_conntrack_dir dir,
-++				struct net_device **out_dev)
-++{
-++	const struct dst_entry *dst = route->tuple[dir].dst;
-++	const void *daddr = &ct->tuplehash[!dir].tuple.src.u3;
-++	struct net_device_path_stack stack;
-++	enum net_device_path_type prev_type;
-++	struct net_device *dev = dst->dev;
-++	struct neighbour *n;
-++	bool last = false;
-++	u8 nud_state;
-++	int i;
-++
-++	route->tuple[!dir].in.ifindex = dev->ifindex;
-++	route->tuple[dir].out.ifindex = dev->ifindex;
-++
-++	if (route->tuple[dir].xmit_type == FLOW_OFFLOAD_XMIT_XFRM)
-++		return;
-++
-++	if ((dev->flags & IFF_LOOPBACK) ||
-++	    dev->type != ARPHRD_ETHER || dev->addr_len != ETH_ALEN ||
-++	    !is_valid_ether_addr(dev->dev_addr))
-++		return;
-++
-++	n = dst_neigh_lookup(dst, daddr);
-++	if (!n)
-++		return;
-++
-++	read_lock_bh(&n->lock);
-++	nud_state = n->nud_state;
-++	memcpy(route->tuple[dir].out.h_dest, n->ha, ETH_ALEN);
-++	read_unlock_bh(&n->lock);
-++	neigh_release(n);
-++
-++	if (!(nud_state & NUD_VALID))
-++		return;
-++
-++	if (dev_fill_forward_path(dev, route->tuple[dir].out.h_dest, &stack) ||
-++	    !stack.num_paths)
-++		return;
-++
-++	prev_type = DEV_PATH_ETHERNET;
-++	for (i = 0; i <= stack.num_paths; i++) {
-++		const struct net_device_path *path = &stack.path[i];
-++		int n_encaps = route->tuple[!dir].in.num_encaps;
-++
-++		dev = (struct net_device *)path->dev;
-++		if (flow_is_valid_ether_device(dev)) {
-++			if (route->tuple[dir].xmit_type != FLOW_OFFLOAD_XMIT_DIRECT) {
-++				memcpy(route->tuple[dir].out.h_source,
-++				       dev->dev_addr, ETH_ALEN);
-++				route->tuple[dir].out.ifindex = dev->ifindex;
-++			}
-++			route->tuple[dir].xmit_type = FLOW_OFFLOAD_XMIT_DIRECT;
-++		}
-++
-++		switch (path->type) {
-++		case DEV_PATH_PPPOE:
-++		case DEV_PATH_VLAN:
-++			if (n_encaps >= NF_FLOW_TABLE_ENCAP_MAX ||
-++			    i == stack.num_paths) {
-++				last = true;
-++				break;
-++			}
-++
-++			route->tuple[!dir].in.num_encaps++;
-++			route->tuple[!dir].in.encap[n_encaps].id = path->encap.id;
-++			route->tuple[!dir].in.encap[n_encaps].proto = path->encap.proto;
-++			if (path->type == DEV_PATH_PPPOE)
-++				memcpy(route->tuple[dir].out.h_dest,
-++				       path->encap.h_dest, ETH_ALEN);
-++			break;
-++		case DEV_PATH_BRIDGE:
-++			switch (path->bridge.vlan_mode) {
-++			case DEV_PATH_BR_VLAN_TAG:
-++				if (n_encaps >= NF_FLOW_TABLE_ENCAP_MAX ||
-++				    i == stack.num_paths) {
-++					last = true;
-++					break;
-++				}
-++
-++				route->tuple[!dir].in.num_encaps++;
-++				route->tuple[!dir].in.encap[n_encaps].id =
-++					path->bridge.vlan_id;
-++				route->tuple[!dir].in.encap[n_encaps].proto =
-++					path->bridge.vlan_proto;
-++				break;
-++			case DEV_PATH_BR_VLAN_UNTAG:
-++				route->tuple[!dir].in.num_encaps--;
-++				break;
-++			case DEV_PATH_BR_VLAN_UNTAG_HW:
-++				route->tuple[!dir].in.ingress_vlans |= BIT(n_encaps - 1);
-++				break;
-++			case DEV_PATH_BR_VLAN_KEEP:
-++				break;
-++			}
-++			break;
-++		default:
-++			last = true;
-++			break;
-++		}
-++
-++		if (last)
-++			break;
-++	}
-++
-++	*out_dev = dev;
-++	route->tuple[dir].out.hw_ifindex = dev->ifindex;
-++	route->tuple[!dir].in.ifindex = dev->ifindex;
-++}
-++
-++static int
-++xt_flowoffload_route_dir(struct nf_flow_route *route, const struct nf_conn *ct,
-++			 enum ip_conntrack_dir dir,
-++			 const struct xt_action_param *par, int ifindex)
-++{
-++	struct dst_entry *dst = NULL;
-++	struct flowi fl;
-++
-++	memset(&fl, 0, sizeof(fl));
-++	switch (xt_family(par)) {
-++	case NFPROTO_IPV4:
-++		fl.u.ip4.daddr = ct->tuplehash[!dir].tuple.src.u3.ip;
-++		fl.u.ip4.flowi4_oif = ifindex;
-++		break;
-++	case NFPROTO_IPV6:
-++		fl.u.ip6.saddr = ct->tuplehash[!dir].tuple.dst.u3.in6;
-++		fl.u.ip6.daddr = ct->tuplehash[!dir].tuple.src.u3.in6;
-++		fl.u.ip6.flowi6_oif = ifindex;
-++		break;
-++	}
-++
-++	nf_route(xt_net(par), &dst, &fl, false, xt_family(par));
-++	if (!dst)
-++		return -ENOENT;
-++
-++	route->tuple[dir].dst = dst;
-++	if (dst_xfrm(dst))
-++		route->tuple[dir].xmit_type = FLOW_OFFLOAD_XMIT_XFRM;
-++	else
-++		route->tuple[dir].xmit_type = FLOW_OFFLOAD_XMIT_NEIGH;
-++
-++	return 0;
-++}
-++
-++static int
-++xt_flowoffload_route(struct sk_buff *skb, const struct nf_conn *ct,
-++		     const struct xt_action_param *par,
-++		     struct nf_flow_route *route, enum ip_conntrack_dir dir,
-++		     struct net_device **dev)
-++{
-++	int ret;
-++
-++	ret = xt_flowoffload_route_dir(route, ct, dir, par,
-++				       dev[dir]->ifindex);
-++	if (ret)
-++		return ret;
-++
-++	ret = xt_flowoffload_route_dir(route, ct, !dir, par,
-++				       dev[!dir]->ifindex);
-++	if (ret)
-++		return ret;
-++
-++	xt_flowoffload_route_check_path(route, ct, dir, &dev[!dir]);
-++	xt_flowoffload_route_check_path(route, ct, !dir, &dev[dir]);
-++
-++	return 0;
-++}
-++
-++static unsigned int
-++flowoffload_tg(struct sk_buff *skb, const struct xt_action_param *par)
-++{
-++	struct xt_flowoffload_table *table;
-++	const struct xt_flowoffload_target_info *info = par->targinfo;
-++	struct tcphdr _tcph, *tcph = NULL;
-++	enum ip_conntrack_info ctinfo;
-++	enum ip_conntrack_dir dir;
-++	struct nf_flow_route route = {};
-++	struct flow_offload *flow = NULL;
-++	struct net_device *devs[2] = {};
-++	struct nf_conn *ct;
-++	struct net *net;
-++
-++	if (xt_flowoffload_skip(skb, xt_family(par)))
-++		return XT_CONTINUE;
-++
-++	ct = nf_ct_get(skb, &ctinfo);
-++	if (ct == NULL)
-++		return XT_CONTINUE;
-++
-++	switch (ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple.dst.protonum) {
-++	case IPPROTO_TCP:
-++		if (ct->proto.tcp.state != TCP_CONNTRACK_ESTABLISHED)
-++			return XT_CONTINUE;
-++
-++		tcph = skb_header_pointer(skb, par->thoff,
-++					  sizeof(_tcph), &_tcph);
-++		if (unlikely(!tcph || tcph->fin || tcph->rst))
-++			return XT_CONTINUE;
-++		break;
-++	case IPPROTO_UDP:
-++		break;
-++	default:
-++		return XT_CONTINUE;
-++	}
-++
-++	if (nf_ct_ext_exist(ct, NF_CT_EXT_HELPER) ||
-++	    ct->status & IPS_SEQ_ADJUST)
-++		return XT_CONTINUE;
-++
-++	if (!nf_ct_is_confirmed(ct))
-++		return XT_CONTINUE;
-++
-++	devs[dir] = xt_out(par);
-++	devs[!dir] = xt_in(par);
-++
-++	if (!devs[dir] || !devs[!dir])
-++		return XT_CONTINUE;
-++
-++	if (test_and_set_bit(IPS_OFFLOAD_BIT, &ct->status))
-++		return XT_CONTINUE;
-++
-++	dir = CTINFO2DIR(ctinfo);
-++
-++	if (xt_flowoffload_route(skb, ct, par, &route, dir, devs) < 0)
-++		goto err_flow_route;
-++
-++	flow = flow_offload_alloc(ct);
-++	if (!flow)
-++		goto err_flow_alloc;
-++
-++	if (flow_offload_route_init(flow, &route) < 0)
-++		goto err_flow_add;
-++
-++	if (tcph) {
-++		ct->proto.tcp.seen[0].flags |= IP_CT_TCP_FLAG_BE_LIBERAL;
-++		ct->proto.tcp.seen[1].flags |= IP_CT_TCP_FLAG_BE_LIBERAL;
-++	}
-++
-++	table = &flowtable[!!(info->flags & XT_FLOWOFFLOAD_HW)];
-++	if (flow_offload_add(&table->ft, flow) < 0)
-++		goto err_flow_add;
-++
-++	xt_flowoffload_check_device(table, devs[0]);
-++	xt_flowoffload_check_device(table, devs[1]);
-++
-++	net = read_pnet(&table->ft.net);
-++	if (!net)
-++		write_pnet(&table->ft.net, xt_net(par));
-++
-++	dst_release(route.tuple[dir].dst);
-++	dst_release(route.tuple[!dir].dst);
-++
-++	return XT_CONTINUE;
-++
-++err_flow_add:
-++	flow_offload_free(flow);
-++err_flow_alloc:
-++	dst_release(route.tuple[dir].dst);
-++	dst_release(route.tuple[!dir].dst);
-++err_flow_route:
-++	clear_bit(IPS_OFFLOAD_BIT, &ct->status);
-++
-++	return XT_CONTINUE;
-++}
-++
-++static int flowoffload_chk(const struct xt_tgchk_param *par)
-++{
-++	struct xt_flowoffload_target_info *info = par->targinfo;
-++
-++	if (info->flags & ~XT_FLOWOFFLOAD_MASK)
-++		return -EINVAL;
-++
-++	return 0;
-++}
-++
-++static struct xt_target offload_tg_reg __read_mostly = {
-++	.family		= NFPROTO_UNSPEC,
-++	.name		= "FLOWOFFLOAD",
-++	.revision	= 0,
-++	.targetsize	= sizeof(struct xt_flowoffload_target_info),
-++	.usersize	= sizeof(struct xt_flowoffload_target_info),
-++	.checkentry	= flowoffload_chk,
-++	.target		= flowoffload_tg,
-++	.me		= THIS_MODULE,
-++};
-++
-++static int flow_offload_netdev_event(struct notifier_block *this,
-++				     unsigned long event, void *ptr)
-++{
-++	struct xt_flowoffload_hook *hook0, *hook1;
-++	struct net_device *dev = netdev_notifier_info_to_dev(ptr);
-++
-++	if (event != NETDEV_UNREGISTER)
-++		return NOTIFY_DONE;
-++
-++	spin_lock_bh(&hooks_lock);
-++	hook0 = flow_offload_lookup_hook(&flowtable[0], dev);
-++	if (hook0)
-++		hlist_del(&hook0->list);
-++
-++	hook1 = flow_offload_lookup_hook(&flowtable[1], dev);
-++	if (hook1)
-++		hlist_del(&hook1->list);
-++	spin_unlock_bh(&hooks_lock);
-++
-++	if (hook0) {
-++		nf_unregister_net_hook(hook0->net, &hook0->ops);
-++		kfree(hook0);
-++	}
-++
-++	if (hook1) {
-++		nf_unregister_net_hook(hook1->net, &hook1->ops);
-++		kfree(hook1);
-++	}
-++
-++	nf_flow_table_cleanup(dev);
-++
-++	return NOTIFY_DONE;
-++}
-++
-++static struct notifier_block flow_offload_netdev_notifier = {
-++	.notifier_call	= flow_offload_netdev_event,
-++};
-++
-++static unsigned int
-++nf_flow_offload_inet_hook(void *priv, struct sk_buff *skb,
-++			  const struct nf_hook_state *state)
-++{
-++	switch (skb->protocol) {
-++	case htons(ETH_P_IP):
-++		return nf_flow_offload_ip_hook(priv, skb, state);
-++	case htons(ETH_P_IPV6):
-++		return nf_flow_offload_ipv6_hook(priv, skb, state);
-++	}
-++
-++	return NF_ACCEPT;
-++}
-++
-++static int nf_flow_rule_route_inet(struct net *net,
-++				   const struct flow_offload *flow,
-++				   enum flow_offload_tuple_dir dir,
-++				   struct nf_flow_rule *flow_rule)
-++{
-++	const struct flow_offload_tuple *flow_tuple = &flow->tuplehash[dir].tuple;
-++	int err;
-++
-++	switch (flow_tuple->l3proto) {
-++	case NFPROTO_IPV4:
-++		err = nf_flow_rule_route_ipv4(net, flow, dir, flow_rule);
-++		break;
-++	case NFPROTO_IPV6:
-++		err = nf_flow_rule_route_ipv6(net, flow, dir, flow_rule);
-++		break;
-++	default:
-++		err = -1;
-++		break;
-++	}
-++
-++	return err;
-++}
-++
-++static struct nf_flowtable_type flowtable_inet = {
-++	.family		= NFPROTO_INET,
-++	.init		= nf_flow_table_init,
-++	.setup		= nf_flow_table_offload_setup,
-++	.action		= nf_flow_rule_route_inet,
-++	.free		= nf_flow_table_free,
-++	.hook		= nf_flow_offload_inet_hook,
-++	.owner		= THIS_MODULE,
-++};
-++
-++static int init_flowtable(struct xt_flowoffload_table *tbl)
-++{
-++	INIT_DELAYED_WORK(&tbl->work, xt_flowoffload_hook_work);
-++	tbl->ft.type = &flowtable_inet;
-++
-++	return nf_flow_table_init(&tbl->ft);
-++}
-++
-++static int __init xt_flowoffload_tg_init(void)
-++{
-++	int ret;
-++
-++	register_netdevice_notifier(&flow_offload_netdev_notifier);
-++
-++	ret = init_flowtable(&flowtable[0]);
-++	if (ret)
-++		return ret;
-++
-++	ret = init_flowtable(&flowtable[1]);
-++	if (ret)
-++		goto cleanup;
-++
-++	flowtable[1].ft.flags = NF_FLOWTABLE_HW_OFFLOAD;
-++
-++	ret = xt_register_target(&offload_tg_reg);
-++	if (ret)
-++		goto cleanup2;
-++
-++	return 0;
-++
-++cleanup2:
-++	nf_flow_table_free(&flowtable[1].ft);
-++cleanup:
-++	nf_flow_table_free(&flowtable[0].ft);
-++	return ret;
-++}
-++
-++static void __exit xt_flowoffload_tg_exit(void)
-++{
-++	xt_unregister_target(&offload_tg_reg);
-++	unregister_netdevice_notifier(&flow_offload_netdev_notifier);
-++	nf_flow_table_free(&flowtable[0].ft);
-++	nf_flow_table_free(&flowtable[1].ft);
-++}
-++
-++MODULE_LICENSE("GPL");
-++module_init(xt_flowoffload_tg_init);
-++module_exit(xt_flowoffload_tg_exit);
-+--- a/net/netfilter/nf_flow_table_core.c
-++++ b/net/netfilter/nf_flow_table_core.c
-+@@ -7,7 +7,6 @@
-+ #include <linux/netdevice.h>
-+ #include <net/ip.h>
-+ #include <net/ip6_route.h>
-+-#include <net/netfilter/nf_tables.h>
-+ #include <net/netfilter/nf_flow_table.h>
-+ #include <net/netfilter/nf_conntrack.h>
-+ #include <net/netfilter/nf_conntrack_core.h>
-+@@ -356,8 +355,7 @@ flow_offload_lookup(struct nf_flowtable
-+ }
-+ EXPORT_SYMBOL_GPL(flow_offload_lookup);
-+ 
-+-static int
-+-nf_flow_table_iterate(struct nf_flowtable *flow_table,
-++int nf_flow_table_iterate(struct nf_flowtable *flow_table,
-+ 		      void (*iter)(struct flow_offload *flow, void *data),
-+ 		      void *data)
-+ {
-+@@ -389,6 +387,7 @@ nf_flow_table_iterate(struct nf_flowtabl
-+ 
-+ 	return err;
-+ }
-++EXPORT_SYMBOL_GPL(nf_flow_table_iterate);
-+ 
-+ static void nf_flow_offload_gc_step(struct flow_offload *flow, void *data)
-+ {
-+--- /dev/null
-++++ b/include/uapi/linux/netfilter/xt_FLOWOFFLOAD.h
-+@@ -0,0 +1,17 @@
-++/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-++#ifndef _XT_FLOWOFFLOAD_H
-++#define _XT_FLOWOFFLOAD_H
-++
-++#include <linux/types.h>
-++
-++enum {
-++	XT_FLOWOFFLOAD_HW	= 1 << 0,
-++
-++	XT_FLOWOFFLOAD_MASK	= XT_FLOWOFFLOAD_HW
-++};
-++
-++struct xt_flowoffload_target_info {
-++	__u32 flags;
-++};
-++
-++#endif /* _XT_FLOWOFFLOAD_H */
-+--- a/include/net/netfilter/nf_flow_table.h
-++++ b/include/net/netfilter/nf_flow_table.h
-+@@ -266,6 +266,10 @@ void nf_flow_table_free(struct nf_flowta
-+ 
-+ void flow_offload_teardown(struct flow_offload *flow);
-+ 
-++int nf_flow_table_iterate(struct nf_flowtable *flow_table,
-++                      void (*iter)(struct flow_offload *flow, void *data),
-++                      void *data);
-++
-+ int nf_flow_snat_port(const struct flow_offload *flow,
-+ 		      struct sk_buff *skb, unsigned int thoff,
-+ 		      u8 protocol, enum flow_offload_tuple_dir dir);
-diff --git a/target/linux/generic/hack-5.10/651-wireless_mesh_header.patch b/target/linux/generic/hack-5.10/651-wireless_mesh_header.patch
-new file mode 100644
-index 0000000000..0639ad4e48
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/651-wireless_mesh_header.patch
-@@ -0,0 +1,24 @@
-+From 6d3bc769657b0ee7c7506dad9911111c4226a7ea Mon Sep 17 00:00:00 2001
-+From: Imre Kaloz <kaloz@openwrt.org>
-+Date: Fri, 7 Jul 2017 17:21:05 +0200
-+Subject: mac80211: increase wireless mesh header size
-+
-+lede-commit 3d4466cfd8f75f717efdb1f96fdde3c70d865fc1
-+Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
-+---
-+ include/linux/netdevice.h | 4 ++--
-+ 1 file changed, 2 insertions(+), 2 deletions(-)
-+
-+--- a/include/linux/netdevice.h
-++++ b/include/linux/netdevice.h
-+@@ -144,8 +144,8 @@ static inline bool dev_xmit_complete(int
-+ 
-+ #if defined(CONFIG_HYPERV_NET)
-+ # define LL_MAX_HEADER 128
-+-#elif defined(CONFIG_WLAN) || IS_ENABLED(CONFIG_AX25)
-+-# if defined(CONFIG_MAC80211_MESH)
-++#elif defined(CONFIG_WLAN) || IS_ENABLED(CONFIG_AX25) || 1
-++# if defined(CONFIG_MAC80211_MESH) || 1
-+ #  define LL_MAX_HEADER 128
-+ # else
-+ #  define LL_MAX_HEADER 96
-diff --git a/target/linux/generic/hack-5.10/660-fq_codel_defaults.patch b/target/linux/generic/hack-5.10/660-fq_codel_defaults.patch
-new file mode 100644
-index 0000000000..6794349e26
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/660-fq_codel_defaults.patch
-@@ -0,0 +1,27 @@
-+From a6ccb238939b25851474a279b20367fd24a0e816 Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Fri, 7 Jul 2017 17:21:53 +0200
-+Subject:  hack: net: fq_codel: tune defaults for small devices
-+
-+Assume that x86_64 devices always have a big memory and do not need this 
-+optimization compared to devices with only 32 MB or 64 MB RAM.
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ net/sched/sch_fq_codel.c | 2 +-
-+ 1 file changed, 1 insertion(+), 1 deletion(-)
-+
-+--- a/net/sched/sch_fq_codel.c
-++++ b/net/sched/sch_fq_codel.c
-+@@ -461,7 +461,11 @@ static int fq_codel_init(struct Qdisc *s
-+ 
-+ 	sch->limit = 10*1024;
-+ 	q->flows_cnt = 1024;
-++#ifdef CONFIG_X86_64
-+ 	q->memory_limit = 32 << 20; /* 32 MBytes */
-++#else
-++	q->memory_limit = 4 << 20; /* 4 MBytes */
-++#endif
-+ 	q->drop_batch_size = 64;
-+ 	q->quantum = psched_mtu(qdisc_dev(sch));
-+ 	INIT_LIST_HEAD(&q->new_flows);
-diff --git a/target/linux/generic/hack-5.10/661-use_fq_codel_by_default.patch b/target/linux/generic/hack-5.10/661-use_fq_codel_by_default.patch
-new file mode 100644
-index 0000000000..ceabf81249
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/661-use_fq_codel_by_default.patch
-@@ -0,0 +1,100 @@
-+From 1d418f7e88035ed7a94073f6354246c66e9193e9 Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Fri, 7 Jul 2017 17:22:58 +0200
-+Subject: fq_codel: switch default qdisc from pfifo_fast to fq_codel and remove pfifo_fast
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ include/net/sch_generic.h | 3 ++-
-+ net/sched/Kconfig         | 3 ++-
-+ net/sched/sch_api.c       | 2 +-
-+ net/sched/sch_fq_codel.c  | 3 ++-
-+ net/sched/sch_generic.c   | 4 ++--
-+ 5 files changed, 9 insertions(+), 6 deletions(-)
-+
-+--- a/include/net/sch_generic.h
-++++ b/include/net/sch_generic.h
-+@@ -578,12 +578,13 @@ extern struct Qdisc_ops noop_qdisc_ops;
-+ extern struct Qdisc_ops pfifo_fast_ops;
-+ extern struct Qdisc_ops mq_qdisc_ops;
-+ extern struct Qdisc_ops noqueue_qdisc_ops;
-++extern struct Qdisc_ops fq_codel_qdisc_ops;
-+ extern const struct Qdisc_ops *default_qdisc_ops;
-+ static inline const struct Qdisc_ops *
-+ get_default_qdisc_ops(const struct net_device *dev, int ntx)
-+ {
-+ 	return ntx < dev->real_num_tx_queues ?
-+-			default_qdisc_ops : &pfifo_fast_ops;
-++			default_qdisc_ops : &fq_codel_qdisc_ops;
-+ }
-+ 
-+ struct Qdisc_class_common {
-+--- a/net/sched/Kconfig
-++++ b/net/sched/Kconfig
-+@@ -4,8 +4,9 @@
-+ #
-+ 
-+ menuconfig NET_SCHED
-+-	bool "QoS and/or fair queueing"
-++	def_bool y
-+ 	select NET_SCH_FIFO
-++	select NET_SCH_FQ_CODEL
-+ 	help
-+ 	  When the kernel has several packets to send out over a network
-+ 	  device, it has to decide which ones to send first, which ones to
-+--- a/net/sched/sch_api.c
-++++ b/net/sched/sch_api.c
-+@@ -2282,7 +2282,7 @@ static int __init pktsched_init(void)
-+ 		return err;
-+ 	}
-+ 
-+-	register_qdisc(&pfifo_fast_ops);
-++	register_qdisc(&fq_codel_qdisc_ops);
-+ 	register_qdisc(&pfifo_qdisc_ops);
-+ 	register_qdisc(&bfifo_qdisc_ops);
-+ 	register_qdisc(&pfifo_head_drop_qdisc_ops);
-+--- a/net/sched/sch_fq_codel.c
-++++ b/net/sched/sch_fq_codel.c
-+@@ -701,7 +701,7 @@ static const struct Qdisc_class_ops fq_c
-+ 	.walk		=	fq_codel_walk,
-+ };
-+ 
-+-static struct Qdisc_ops fq_codel_qdisc_ops __read_mostly = {
-++struct Qdisc_ops fq_codel_qdisc_ops __read_mostly = {
-+ 	.cl_ops		=	&fq_codel_class_ops,
-+ 	.id		=	"fq_codel",
-+ 	.priv_size	=	sizeof(struct fq_codel_sched_data),
-+@@ -716,6 +716,7 @@ static struct Qdisc_ops fq_codel_qdisc_o
-+ 	.dump_stats =	fq_codel_dump_stats,
-+ 	.owner		=	THIS_MODULE,
-+ };
-++EXPORT_SYMBOL(fq_codel_qdisc_ops);
-+ 
-+ static int __init fq_codel_module_init(void)
-+ {
-+--- a/net/sched/sch_generic.c
-++++ b/net/sched/sch_generic.c
-+@@ -32,7 +32,7 @@
-+ #include <net/xfrm.h>
-+ 
-+ /* Qdisc to use by default */
-+-const struct Qdisc_ops *default_qdisc_ops = &pfifo_fast_ops;
-++const struct Qdisc_ops *default_qdisc_ops = &fq_codel_qdisc_ops;
-+ EXPORT_SYMBOL(default_qdisc_ops);
-+ 
-+ /* Main transmission queue. */
-+@@ -1018,12 +1018,12 @@ static void attach_one_default_qdisc(str
-+ 				     void *_unused)
-+ {
-+ 	struct Qdisc *qdisc;
-+-	const struct Qdisc_ops *ops = default_qdisc_ops;
-++	const struct Qdisc_ops *ops = &fq_codel_qdisc_ops;
-+ 
-+ 	if (dev->priv_flags & IFF_NO_QUEUE)
-+ 		ops = &noqueue_qdisc_ops;
-+ 	else if(dev->type == ARPHRD_CAN)
-+-		ops = &pfifo_fast_ops;
-++		ops = &fq_codel_qdisc_ops;
-+ 
-+ 	qdisc = qdisc_create_dflt(dev_queue, ops, TC_H_ROOT, NULL);
-+ 	if (!qdisc)
-diff --git a/target/linux/generic/hack-5.10/700-swconfig_switch_drivers.patch b/target/linux/generic/hack-5.10/700-swconfig_switch_drivers.patch
-new file mode 100644
-index 0000000000..560937a7c1
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/700-swconfig_switch_drivers.patch
-@@ -0,0 +1,129 @@
-+From 36e516290611e613aa92996cb4339561452695b4 Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Fri, 7 Jul 2017 17:24:23 +0200
-+Subject: net: swconfig: adds openwrt switch layer
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ drivers/net/phy/Kconfig   | 83 +++++++++++++++++++++++++++++++++++++++++++++++
-+ drivers/net/phy/Makefile  | 15 +++++++++
-+ include/uapi/linux/Kbuild |  1 +
-+ 3 files changed, 99 insertions(+)
-+
-+--- a/drivers/net/phy/Kconfig
-++++ b/drivers/net/phy/Kconfig
-+@@ -61,6 +61,80 @@ config SFP
-+ 	depends on HWMON || HWMON=n
-+ 	select MDIO_I2C
-+ 
-++comment "Switch configuration API + drivers"
-++
-++config SWCONFIG
-++	tristate "Switch configuration API"
-++	help
-++	  Switch configuration API using netlink. This allows
-++	  you to configure the VLAN features of certain switches.
-++
-++config SWCONFIG_LEDS
-++	bool "Switch LED trigger support"
-++	depends on (SWCONFIG && LEDS_TRIGGERS)
-++
-++config ADM6996_PHY
-++	tristate "Driver for ADM6996 switches"
-++	select SWCONFIG
-++	help
-++	  Currently supports the ADM6996FC and ADM6996M switches.
-++	  Support for FC is very limited.
-++
-++config AR8216_PHY
-++	tristate "Driver for Atheros AR8216 switches"
-++	select SWCONFIG
-++
-++config AR8216_PHY_LEDS
-++	bool "Atheros AR8216 switch LED support"
-++	depends on (AR8216_PHY && LEDS_CLASS)
-++
-++source "drivers/net/phy/b53/Kconfig"
-++
-++config IP17XX_PHY
-++	tristate "Driver for IC+ IP17xx switches"
-++	select SWCONFIG
-++
-++config PSB6970_PHY
-++	tristate "Lantiq XWAY Tantos (PSB6970) Ethernet switch"
-++	select SWCONFIG
-++	select ETHERNET_PACKET_MANGLE
-++
-++config RTL8306_PHY
-++	tristate "Driver for Realtek RTL8306S switches"
-++	select SWCONFIG
-++
-++config RTL8366_SMI
-++	tristate "Driver for the RTL8366 SMI interface"
-++	depends on GPIOLIB
-++	help
-++	  This module implements the SMI interface protocol which is used
-++	  by some RTL8366 ethernet switch devices via the generic GPIO API.
-++
-++if RTL8366_SMI
-++
-++config RTL8366_SMI_DEBUG_FS
-++	bool "RTL8366 SMI interface debugfs support"
-++        depends on DEBUG_FS
-++        default n
-++
-++config RTL8366S_PHY
-++	tristate "Driver for the Realtek RTL8366S switch"
-++	select SWCONFIG
-++
-++config RTL8366RB_PHY
-++	tristate "Driver for the Realtek RTL8366RB switch"
-++	select SWCONFIG
-++
-++config RTL8367_PHY
-++	tristate "Driver for the Realtek RTL8367R/M switches"
-++	select SWCONFIG
-++
-++config RTL8367B_PHY
-++	tristate "Driver fot the Realtek RTL8367R-VB switch"
-++	select SWCONFIG
-++
-++endif # RTL8366_SMI
-++
-+ comment "MII PHY device drivers"
-+ 
-+ config AMD_PHY
-+--- a/drivers/net/phy/Makefile
-++++ b/drivers/net/phy/Makefile
-+@@ -24,6 +24,19 @@ libphy-$(CONFIG_LED_TRIGGER_PHY)	+= phy_
-+ obj-$(CONFIG_PHYLINK)		+= phylink.o
-+ obj-$(CONFIG_PHYLIB)		+= libphy.o
-+ 
-++obj-$(CONFIG_SWCONFIG)		+= swconfig.o
-++obj-$(CONFIG_ADM6996_PHY)	+= adm6996.o
-++obj-$(CONFIG_AR8216_PHY)	+= ar8216.o ar8327.o
-++obj-$(CONFIG_SWCONFIG_B53)	+= b53/
-++obj-$(CONFIG_IP17XX_PHY)	+= ip17xx.o
-++obj-$(CONFIG_PSB6970_PHY)	+= psb6970.o
-++obj-$(CONFIG_RTL8306_PHY)	+= rtl8306.o
-++obj-$(CONFIG_RTL8366_SMI)	+= rtl8366_smi.o
-++obj-$(CONFIG_RTL8366S_PHY)	+= rtl8366s.o
-++obj-$(CONFIG_RTL8366RB_PHY)	+= rtl8366rb.o
-++obj-$(CONFIG_RTL8367_PHY)	+= rtl8367.o
-++obj-$(CONFIG_RTL8367B_PHY)	+= rtl8367b.o
-++
-+ obj-$(CONFIG_NETWORK_PHY_TIMESTAMPING) += mii_timestamper.o
-+ 
-+ obj-$(CONFIG_SFP)		+= sfp.o
-+--- a/include/linux/platform_data/b53.h
-++++ b/include/linux/platform_data/b53.h
-+@@ -29,6 +29,9 @@ struct b53_platform_data {
-+ 	u32 chip_id;
-+ 	u16 enabled_ports;
-+ 
-++	/* allow to specify an ethX alias */
-++	const char *alias;
-++
-+ 	/* only used by MMAP'd driver */
-+ 	unsigned big_endian:1;
-+ 	void __iomem *regs;
-diff --git a/target/linux/generic/hack-5.10/710-net-dsa-mv88e6xxx-default-VID-1.patch b/target/linux/generic/hack-5.10/710-net-dsa-mv88e6xxx-default-VID-1.patch
-new file mode 100644
-index 0000000000..f301cc1e2d
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/710-net-dsa-mv88e6xxx-default-VID-1.patch
-@@ -0,0 +1,18 @@
-+--- a/drivers/net/dsa/mv88e6xxx/chip.c
-++++ b/drivers/net/dsa/mv88e6xxx/chip.c
-+@@ -2088,6 +2088,7 @@ static int mv88e6xxx_port_fdb_add(struct
-+ 	struct mv88e6xxx_chip *chip = ds->priv;
-+ 	int err;
-+ 
-++	vid = vid ? : 1;
-+ 	mv88e6xxx_reg_lock(chip);
-+ 	err = mv88e6xxx_port_db_load_purge(chip, port, addr, vid,
-+ 					   MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC);
-+@@ -2102,6 +2103,7 @@ static int mv88e6xxx_port_fdb_del(struct
-+ 	struct mv88e6xxx_chip *chip = ds->priv;
-+ 	int err;
-+ 
-++	vid = vid ? : 1;
-+ 	mv88e6xxx_reg_lock(chip);
-+ 	err = mv88e6xxx_port_db_load_purge(chip, port, addr, vid, 0);
-+ 	mv88e6xxx_reg_unlock(chip);
-diff --git a/target/linux/generic/hack-5.10/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch b/target/linux/generic/hack-5.10/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch
-new file mode 100644
-index 0000000000..46a1ba1d96
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch
-@@ -0,0 +1,12 @@
-+--- a/drivers/net/dsa/mv88e6xxx/chip.c
-++++ b/drivers/net/dsa/mv88e6xxx/chip.c
-+@@ -2650,6 +2650,9 @@ static int mv88e6xxx_setup_port(struct m
-+ 	if (dsa_is_cpu_port(ds, port))
-+ 		reg = 0;
-+ 
-++	/* Disable ATU member violation interrupt */
-++	reg |= MV88E6XXX_PORT_ASSOC_VECTOR_IGNORE_WRONG;
-++
-+ 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ASSOC_VECTOR,
-+ 				   reg);
-+ 	if (err)
-diff --git a/target/linux/generic/hack-5.10/773-bgmac-add-srab-switch.patch b/target/linux/generic/hack-5.10/773-bgmac-add-srab-switch.patch
-new file mode 100644
-index 0000000000..1c1b727ab7
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/773-bgmac-add-srab-switch.patch
-@@ -0,0 +1,98 @@
-+From 3cb240533ab787899dc7f17aa7d6c5b4810e2e58 Mon Sep 17 00:00:00 2001
-+From: Hauke Mehrtens <hauke@hauke-m.de>
-+Date: Fri, 7 Jul 2017 17:26:01 +0200
-+Subject: bcm53xx: bgmac: use srab switch driver
-+
-+use the srab switch driver on these SoCs.
-+
-+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-+---
-+ drivers/net/ethernet/broadcom/bgmac-bcma.c |  1 +
-+ drivers/net/ethernet/broadcom/bgmac.c      | 24 ++++++++++++++++++++++++
-+ drivers/net/ethernet/broadcom/bgmac.h      |  4 ++++
-+ 3 files changed, 29 insertions(+)
-+
-+--- a/drivers/net/ethernet/broadcom/bgmac-bcma.c
-++++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c
-+@@ -268,6 +268,7 @@ static int bgmac_probe(struct bcma_devic
-+ 		bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
-+ 		bgmac->feature_flags |= BGMAC_FEAT_NO_RESET;
-+ 		bgmac->feature_flags |= BGMAC_FEAT_FORCE_SPEED_2500;
-++		bgmac->feature_flags |= BGMAC_FEAT_SRAB;
-+ 		break;
-+ 	default:
-+ 		bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
-+--- a/drivers/net/ethernet/broadcom/bgmac.c
-++++ b/drivers/net/ethernet/broadcom/bgmac.c
-+@@ -12,6 +12,7 @@
-+ #include <linux/bcma/bcma.h>
-+ #include <linux/etherdevice.h>
-+ #include <linux/interrupt.h>
-++#include <linux/platform_data/b53.h>
-+ #include <linux/bcm47xx_nvram.h>
-+ #include <linux/phy.h>
-+ #include <linux/phy_fixed.h>
-+@@ -1408,6 +1409,17 @@ static const struct ethtool_ops bgmac_et
-+ 	.set_link_ksettings     = phy_ethtool_set_link_ksettings,
-+ };
-+ 
-++static struct b53_platform_data bgmac_b53_pdata = {
-++};
-++
-++static struct platform_device bgmac_b53_dev = {
-++	.name		= "b53-srab-switch",
-++	.id		= -1,
-++	.dev		= {
-++		.platform_data = &bgmac_b53_pdata,
-++	},
-++};
-++
-+ /**************************************************
-+  * MII
-+  **************************************************/
-+@@ -1542,6 +1554,14 @@ int bgmac_enet_probe(struct bgmac *bgmac
-+ 	/* Omit FCS from max MTU size */
-+ 	net_dev->max_mtu = BGMAC_RX_MAX_FRAME_SIZE - ETH_FCS_LEN;
-+ 
-++	if ((bgmac->feature_flags & BGMAC_FEAT_SRAB) && !bgmac_b53_pdata.regs) {
-++		bgmac_b53_pdata.regs = ioremap_nocache(0x18007000, 0x1000);
-++
-++		err = platform_device_register(&bgmac_b53_dev);
-++		if (!err)
-++			bgmac->b53_device = &bgmac_b53_dev;
-++	}
-++
-+ 	err = register_netdev(bgmac->net_dev);
-+ 	if (err) {
-+ 		dev_err(bgmac->dev, "Cannot register net device\n");
-+@@ -1564,6 +1584,10 @@ EXPORT_SYMBOL_GPL(bgmac_enet_probe);
-+ 
-+ void bgmac_enet_remove(struct bgmac *bgmac)
-+ {
-++	if (bgmac->b53_device)
-++		platform_device_unregister(&bgmac_b53_dev);
-++	bgmac->b53_device = NULL;
-++
-+ 	unregister_netdev(bgmac->net_dev);
-+ 	phy_disconnect(bgmac->net_dev->phydev);
-+ 	netif_napi_del(&bgmac->napi);
-+--- a/drivers/net/ethernet/broadcom/bgmac.h
-++++ b/drivers/net/ethernet/broadcom/bgmac.h
-+@@ -428,6 +428,7 @@
-+ #define BGMAC_FEAT_CC4_IF_SW_TYPE_RGMII	BIT(18)
-+ #define BGMAC_FEAT_CC7_IF_TYPE_RGMII	BIT(19)
-+ #define BGMAC_FEAT_IDM_MASK		BIT(20)
-++#define BGMAC_FEAT_SRAB			BIT(21)
-+ 
-+ struct bgmac_slot_info {
-+ 	union {
-+@@ -533,6 +534,9 @@ struct bgmac {
-+ 	void (*cmn_maskset32)(struct bgmac *bgmac, u16 offset, u32 mask,
-+ 			      u32 set);
-+ 	int (*phy_connect)(struct bgmac *bgmac);
-++
-++	/* platform device for associated switch */
-++	struct platform_device *b53_device;
-+ };
-+ 
-+ struct bgmac *bgmac_alloc(struct device *dev);
-diff --git a/target/linux/generic/hack-5.10/901-debloat_sock_diag.patch b/target/linux/generic/hack-5.10/901-debloat_sock_diag.patch
-new file mode 100644
-index 0000000000..fc2a0a4862
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/901-debloat_sock_diag.patch
-@@ -0,0 +1,162 @@
-+From 3b6115d6b57a263bdc8c9b1df273bd4a7955eead Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Sat, 8 Jul 2017 08:16:31 +0200
-+Subject: debloat: add some debloat patches, strip down procfs and make O_DIRECT support optional, saves ~15K after lzma on MIPS
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ net/Kconfig         | 3 +++
-+ net/core/Makefile   | 3 ++-
-+ net/core/sock.c     | 2 ++
-+ net/ipv4/Kconfig    | 1 +
-+ net/netlink/Kconfig | 1 +
-+ net/packet/Kconfig  | 1 +
-+ net/unix/Kconfig    | 1 +
-+ 7 files changed, 11 insertions(+), 1 deletion(-)
-+
-+--- a/net/Kconfig
-++++ b/net/Kconfig
-+@@ -98,6 +98,9 @@ source "net/mptcp/Kconfig"
-+ 
-+ endif # if INET
-+ 
-++config SOCK_DIAG
-++	bool
-++
-+ config NETWORK_SECMARK
-+ 	bool "Security Marking"
-+ 	help
-+--- a/net/core/Makefile
-++++ b/net/core/Makefile
-+@@ -10,9 +10,10 @@ obj-$(CONFIG_SYSCTL) += sysctl_net_core.
-+ 
-+ obj-y		     += dev.o dev_addr_lists.o dst.o netevent.o \
-+ 			neighbour.o rtnetlink.o utils.o link_watch.o filter.o \
-+-			sock_diag.o dev_ioctl.o tso.o sock_reuseport.o \
-++ 			dev_ioctl.o tso.o sock_reuseport.o \
-+ 			fib_notifier.o xdp.o flow_offload.o
-+ 
-++obj-$(CONFIG_SOCK_DIAG) += sock_diag.o
-+ obj-y += net-sysfs.o
-+ obj-$(CONFIG_PAGE_POOL) += page_pool.o
-+ obj-$(CONFIG_PROC_FS) += net-procfs.o
-+--- a/net/core/sock.c
-++++ b/net/core/sock.c
-+@@ -114,6 +114,7 @@
-+ #include <linux/memcontrol.h>
-+ #include <linux/prefetch.h>
-+ #include <linux/compat.h>
-++#include <linux/cookie.h>
-+ 
-+ #include <linux/uaccess.h>
-+ 
-+@@ -141,6 +142,7 @@
-+ 
-+ static DEFINE_MUTEX(proto_list_mutex);
-+ static LIST_HEAD(proto_list);
-++DEFINE_COOKIE(sock_cookie);
-+ 
-+ static void sock_inuse_add(struct net *net, int val);
-+ 
-+@@ -526,6 +528,18 @@ discard_and_relse:
-+ }
-+ EXPORT_SYMBOL(__sk_receive_skb);
-+ 
-++u64 __sock_gen_cookie(struct sock *sk)
-++{
-++	while (1) {
-++		u64 res = atomic64_read(&sk->sk_cookie);
-++
-++		if (res)
-++			return res;
-++		res = gen_cookie_next(&sock_cookie);
-++		atomic64_cmpxchg(&sk->sk_cookie, 0, res);
-++	}
-++}
-++
-+ struct dst_entry *__sk_dst_check(struct sock *sk, u32 cookie)
-+ {
-+ 	struct dst_entry *dst = __sk_dst_get(sk);
-+@@ -1808,9 +1822,11 @@ static void __sk_free(struct sock *sk)
-+ 	if (likely(sk->sk_net_refcnt))
-+ 		sock_inuse_add(sock_net(sk), -1);
-+ 
-++#ifdef CONFIG_SOCK_DIAG
-+ 	if (unlikely(sk->sk_net_refcnt && sock_diag_has_destroy_listeners(sk)))
-+ 		sock_diag_broadcast_destroy(sk);
-+ 	else
-++#endif
-+ 		sk_destruct(sk);
-+ }
-+ 
-+--- a/net/core/sock_diag.c
-++++ b/net/core/sock_diag.c
-+@@ -11,7 +11,6 @@
-+ #include <linux/tcp.h>
-+ #include <linux/workqueue.h>
-+ #include <linux/nospec.h>
-+-#include <linux/cookie.h>
-+ #include <linux/inet_diag.h>
-+ #include <linux/sock_diag.h>
-+ 
-+@@ -20,20 +19,6 @@ static int (*inet_rcv_compat)(struct sk_
-+ static DEFINE_MUTEX(sock_diag_table_mutex);
-+ static struct workqueue_struct *broadcast_wq;
-+ 
-+-DEFINE_COOKIE(sock_cookie);
-+-
-+-u64 __sock_gen_cookie(struct sock *sk)
-+-{
-+-	while (1) {
-+-		u64 res = atomic64_read(&sk->sk_cookie);
-+-
-+-		if (res)
-+-			return res;
-+-		res = gen_cookie_next(&sock_cookie);
-+-		atomic64_cmpxchg(&sk->sk_cookie, 0, res);
-+-	}
-+-}
-+-
-+ int sock_diag_check_cookie(struct sock *sk, const __u32 *cookie)
-+ {
-+ 	u64 res;
-+--- a/net/ipv4/Kconfig
-++++ b/net/ipv4/Kconfig
-+@@ -414,6 +414,7 @@ config INET_TUNNEL
-+ 
-+ config INET_DIAG
-+ 	tristate "INET: socket monitoring interface"
-++	select SOCK_DIAG
-+ 	default y
-+ 	help
-+ 	  Support for INET (TCP, DCCP, etc) socket monitoring interface used by
-+--- a/net/netlink/Kconfig
-++++ b/net/netlink/Kconfig
-+@@ -5,6 +5,7 @@
-+ 
-+ config NETLINK_DIAG
-+ 	tristate "NETLINK: socket monitoring interface"
-++	select SOCK_DIAG
-+ 	default n
-+ 	help
-+ 	  Support for NETLINK socket monitoring interface used by the ss tool.
-+--- a/net/packet/Kconfig
-++++ b/net/packet/Kconfig
-+@@ -19,6 +19,7 @@ config PACKET
-+ config PACKET_DIAG
-+ 	tristate "Packet: sockets monitoring interface"
-+ 	depends on PACKET
-++	select SOCK_DIAG
-+ 	default n
-+ 	help
-+ 	  Support for PF_PACKET sockets monitoring interface used by the ss tool.
-+--- a/net/unix/Kconfig
-++++ b/net/unix/Kconfig
-+@@ -28,6 +28,7 @@ config UNIX_SCM
-+ config UNIX_DIAG
-+ 	tristate "UNIX: socket monitoring interface"
-+ 	depends on UNIX
-++	select SOCK_DIAG
-+ 	default n
-+ 	help
-+ 	  Support for UNIX socket monitoring interface used by the ss tool.
-diff --git a/target/linux/generic/hack-5.10/902-debloat_proc.patch b/target/linux/generic/hack-5.10/902-debloat_proc.patch
-new file mode 100644
-index 0000000000..3208e5554f
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/902-debloat_proc.patch
-@@ -0,0 +1,408 @@
-+From 9e3f1d0805b2d919904dd9a4ff0d956314cc3cba Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Sat, 8 Jul 2017 08:20:09 +0200
-+Subject: debloat: procfs
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ fs/locks.c               |  2 ++
-+ fs/proc/Kconfig          |  5 +++++
-+ fs/proc/consoles.c       |  3 +++
-+ fs/proc/proc_tty.c       | 11 ++++++++++-
-+ include/net/snmp.h       | 18 +++++++++++++++++-
-+ ipc/msg.c                |  3 +++
-+ ipc/sem.c                |  2 ++
-+ ipc/shm.c                |  2 ++
-+ ipc/util.c               |  3 +++
-+ kernel/exec_domain.c     |  2 ++
-+ kernel/irq/proc.c        |  9 +++++++++
-+ kernel/time/timer_list.c |  2 ++
-+ mm/vmalloc.c             |  2 ++
-+ mm/vmstat.c              |  8 +++++---
-+ net/8021q/vlanproc.c     |  6 ++++++
-+ net/core/net-procfs.c    | 18 ++++++++++++------
-+ net/core/sock.c          |  2 ++
-+ net/ipv4/fib_trie.c      | 18 ++++++++++++------
-+ net/ipv4/proc.c          |  3 +++
-+ net/ipv4/route.c         |  3 +++
-+ 20 files changed, 105 insertions(+), 17 deletions(-)
-+
-+--- a/fs/locks.c
-++++ b/fs/locks.c
-+@@ -2993,6 +2993,8 @@ static const struct seq_operations locks
-+ 
-+ static int __init proc_locks_init(void)
-+ {
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		return 0;
-+ 	proc_create_seq_private("locks", 0, NULL, &locks_seq_operations,
-+ 			sizeof(struct locks_iterator), NULL);
-+ 	return 0;
-+--- a/fs/proc/Kconfig
-++++ b/fs/proc/Kconfig
-+@@ -100,6 +100,11 @@ config PROC_CHILDREN
-+ 	  Say Y if you are running any user-space software which takes benefit from
-+ 	  this interface. For example, rkt is such a piece of software.
-+ 
-++config PROC_STRIPPED
-++	default n
-++	depends on EXPERT
-++	bool "Strip non-essential /proc functionality to reduce code size"
-++
-+ config PROC_PID_ARCH_STATUS
-+ 	def_bool n
-+ 	depends on PROC_FS
-+--- a/fs/proc/consoles.c
-++++ b/fs/proc/consoles.c
-+@@ -92,6 +92,9 @@ static const struct seq_operations conso
-+ 
-+ static int __init proc_consoles_init(void)
-+ {
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		return 0;
-++
-+ 	proc_create_seq("consoles", 0, NULL, &consoles_op);
-+ 	return 0;
-+ }
-+--- a/fs/proc/proc_tty.c
-++++ b/fs/proc/proc_tty.c
-+@@ -133,7 +133,10 @@ static const struct seq_operations tty_d
-+ void proc_tty_register_driver(struct tty_driver *driver)
-+ {
-+ 	struct proc_dir_entry *ent;
-+-		
-++
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		return;
-++
-+ 	if (!driver->driver_name || driver->proc_entry ||
-+ 	    !driver->ops->proc_show)
-+ 		return;
-+@@ -150,6 +153,9 @@ void proc_tty_unregister_driver(struct t
-+ {
-+ 	struct proc_dir_entry *ent;
-+ 
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		return;
-++
-+ 	ent = driver->proc_entry;
-+ 	if (!ent)
-+ 		return;
-+@@ -164,6 +170,9 @@ void proc_tty_unregister_driver(struct t
-+  */
-+ void __init proc_tty_init(void)
-+ {
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		return;
-++
-+ 	if (!proc_mkdir("tty", NULL))
-+ 		return;
-+ 	proc_mkdir("tty/ldisc", NULL);	/* Preserved: it's userspace visible */
-+--- a/include/net/snmp.h
-++++ b/include/net/snmp.h
-+@@ -124,6 +124,21 @@ struct linux_tls_mib {
-+ #define DECLARE_SNMP_STAT(type, name)	\
-+ 	extern __typeof__(type) __percpu *name
-+ 
-++#ifdef CONFIG_PROC_STRIPPED
-++#define __SNMP_STATS_DUMMY(mib)	\
-++	do { (void) mib->mibs[0]; } while(0)
-++
-++#define __SNMP_INC_STATS(mib, field) __SNMP_STATS_DUMMY(mib)
-++#define SNMP_INC_STATS_ATOMIC_LONG(mib, field) __SNMP_STATS_DUMMY(mib)
-++#define SNMP_INC_STATS(mib, field) __SNMP_STATS_DUMMY(mib)
-++#define SNMP_DEC_STATS(mib, field) __SNMP_STATS_DUMMY(mib)
-++#define __SNMP_ADD_STATS(mib, field, addend) __SNMP_STATS_DUMMY(mib)
-++#define SNMP_ADD_STATS(mib, field, addend) __SNMP_STATS_DUMMY(mib)
-++#define SNMP_UPD_PO_STATS(mib, basefield, addend) __SNMP_STATS_DUMMY(mib)
-++#define __SNMP_UPD_PO_STATS(mib, basefield, addend) __SNMP_STATS_DUMMY(mib)
-++
-++#else
-++
-+ #define __SNMP_INC_STATS(mib, field)	\
-+ 			__this_cpu_inc(mib->mibs[field])
-+ 
-+@@ -154,8 +169,9 @@ struct linux_tls_mib {
-+ 		__this_cpu_add(ptr[basefield##OCTETS], addend);	\
-+ 	} while (0)
-+ 
-++#endif
-+ 
-+-#if BITS_PER_LONG==32
-++#if (BITS_PER_LONG==32) && !defined(CONFIG_PROC_STRIPPED)
-+ 
-+ #define __SNMP_ADD_STATS64(mib, field, addend) 				\
-+ 	do {								\
-+--- a/ipc/msg.c
-++++ b/ipc/msg.c
-+@@ -1348,6 +1348,9 @@ void __init msg_init(void)
-+ {
-+ 	msg_init_ns(&init_ipc_ns);
-+ 
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		return;
-++
-+ 	ipc_init_proc_interface("sysvipc/msg",
-+ 				"       key      msqid perms      cbytes       qnum lspid lrpid   uid   gid  cuid  cgid      stime      rtime      ctime\n",
-+ 				IPC_MSG_IDS, sysvipc_msg_proc_show);
-+--- a/ipc/sem.c
-++++ b/ipc/sem.c
-+@@ -266,6 +266,8 @@ void sem_exit_ns(struct ipc_namespace *n
-+ void __init sem_init(void)
-+ {
-+ 	sem_init_ns(&init_ipc_ns);
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		return;
-+ 	ipc_init_proc_interface("sysvipc/sem",
-+ 				"       key      semid perms      nsems   uid   gid  cuid  cgid      otime      ctime\n",
-+ 				IPC_SEM_IDS, sysvipc_sem_proc_show);
-+--- a/ipc/shm.c
-++++ b/ipc/shm.c
-+@@ -144,6 +144,8 @@ pure_initcall(ipc_ns_init);
-+ 
-+ void __init shm_init(void)
-+ {
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		return;
-+ 	ipc_init_proc_interface("sysvipc/shm",
-+ #if BITS_PER_LONG <= 32
-+ 				"       key      shmid perms       size  cpid  lpid nattch   uid   gid  cuid  cgid      atime      dtime      ctime        rss       swap\n",
-+--- a/ipc/util.c
-++++ b/ipc/util.c
-+@@ -140,6 +140,9 @@ void __init ipc_init_proc_interface(cons
-+ 	struct proc_dir_entry *pde;
-+ 	struct ipc_proc_iface *iface;
-+ 
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		return;
-++
-+ 	iface = kmalloc(sizeof(*iface), GFP_KERNEL);
-+ 	if (!iface)
-+ 		return;
-+--- a/kernel/exec_domain.c
-++++ b/kernel/exec_domain.c
-+@@ -29,6 +29,8 @@ static int execdomains_proc_show(struct
-+ 
-+ static int __init proc_execdomains_init(void)
-+ {
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		return 0;
-+ 	proc_create_single("execdomains", 0, NULL, execdomains_proc_show);
-+ 	return 0;
-+ }
-+--- a/kernel/irq/proc.c
-++++ b/kernel/irq/proc.c
-+@@ -341,6 +341,9 @@ void register_irq_proc(unsigned int irq,
-+ 	void __maybe_unused *irqp = (void *)(unsigned long) irq;
-+ 	char name [MAX_NAMELEN];
-+ 
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED) && !IS_ENABLED(CONFIG_SMP))
-++		return;
-++
-+ 	if (!root_irq_dir || (desc->irq_data.chip == &no_irq_chip))
-+ 		return;
-+ 
-+@@ -394,6 +397,9 @@ void unregister_irq_proc(unsigned int ir
-+ {
-+ 	char name [MAX_NAMELEN];
-+ 
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED) && !IS_ENABLED(CONFIG_SMP))
-++		return;
-++
-+ 	if (!root_irq_dir || !desc->dir)
-+ 		return;
-+ #ifdef CONFIG_SMP
-+@@ -432,6 +438,9 @@ void init_irq_proc(void)
-+ 	unsigned int irq;
-+ 	struct irq_desc *desc;
-+ 
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED) && !IS_ENABLED(CONFIG_SMP))
-++		return;
-++
-+ 	/* create /proc/irq */
-+ 	root_irq_dir = proc_mkdir("irq", NULL);
-+ 	if (!root_irq_dir)
-+--- a/kernel/time/timer_list.c
-++++ b/kernel/time/timer_list.c
-+@@ -370,6 +370,8 @@ static int __init init_timer_list_procfs
-+ {
-+ 	struct proc_dir_entry *pe;
-+ 
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		return 0;
-+ 	pe = proc_create_seq_private("timer_list", 0400, NULL, &timer_list_sops,
-+ 			sizeof(struct timer_list_iter), NULL);
-+ 	if (!pe)
-+--- a/mm/vmalloc.c
-++++ b/mm/vmalloc.c
-+@@ -3572,6 +3572,8 @@ static const struct seq_operations vmall
-+ 
-+ static int __init proc_vmalloc_init(void)
-+ {
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		return 0;
-+ 	if (IS_ENABLED(CONFIG_NUMA))
-+ 		proc_create_seq_private("vmallocinfo", 0400, NULL,
-+ 				&vmalloc_op,
-+--- a/mm/vmstat.c
-++++ b/mm/vmstat.c
-+@@ -2044,10 +2044,12 @@ void __init init_mm_internals(void)
-+ 	start_shepherd_timer();
-+ #endif
-+ #ifdef CONFIG_PROC_FS
-+-	proc_create_seq("buddyinfo", 0444, NULL, &fragmentation_op);
-+-	proc_create_seq("pagetypeinfo", 0400, NULL, &pagetypeinfo_op);
-++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) {
-++		proc_create_seq("buddyinfo", 0444, NULL, &fragmentation_op);
-++		proc_create_seq("pagetypeinfo", 0400, NULL, &pagetypeinfo_op);
-++		proc_create_seq("zoneinfo", 0444, NULL, &zoneinfo_op);
-++	}
-+ 	proc_create_seq("vmstat", 0444, NULL, &vmstat_op);
-+-	proc_create_seq("zoneinfo", 0444, NULL, &zoneinfo_op);
-+ #endif
-+ }
-+ 
-+--- a/net/8021q/vlanproc.c
-++++ b/net/8021q/vlanproc.c
-+@@ -93,6 +93,9 @@ void vlan_proc_cleanup(struct net *net)
-+ {
-+ 	struct vlan_net *vn = net_generic(net, vlan_net_id);
-+ 
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		return;
-++
-+ 	if (vn->proc_vlan_conf)
-+ 		remove_proc_entry(name_conf, vn->proc_vlan_dir);
-+ 
-+@@ -112,6 +115,9 @@ int __net_init vlan_proc_init(struct net
-+ {
-+ 	struct vlan_net *vn = net_generic(net, vlan_net_id);
-+ 
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		return 0;
-++
-+ 	vn->proc_vlan_dir = proc_net_mkdir(net, name_root, net->proc_net);
-+ 	if (!vn->proc_vlan_dir)
-+ 		goto err;
-+--- a/net/core/net-procfs.c
-++++ b/net/core/net-procfs.c
-+@@ -290,10 +290,12 @@ static int __net_init dev_proc_net_init(
-+ 	if (!proc_create_net("dev", 0444, net->proc_net, &dev_seq_ops,
-+ 			sizeof(struct seq_net_private)))
-+ 		goto out;
-+-	if (!proc_create_seq("softnet_stat", 0444, net->proc_net,
-++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED) &&
-++			!proc_create_seq("softnet_stat", 0444, net->proc_net,
-+ 			 &softnet_seq_ops))
-+ 		goto out_dev;
-+-	if (!proc_create_net("ptype", 0444, net->proc_net, &ptype_seq_ops,
-++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED) &&
-++			!proc_create_net("ptype", 0444, net->proc_net, &ptype_seq_ops,
-+ 			sizeof(struct seq_net_private)))
-+ 		goto out_softnet;
-+ 
-+@@ -303,9 +305,11 @@ static int __net_init dev_proc_net_init(
-+ out:
-+ 	return rc;
-+ out_ptype:
-+-	remove_proc_entry("ptype", net->proc_net);
-++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		remove_proc_entry("ptype", net->proc_net);
-+ out_softnet:
-+-	remove_proc_entry("softnet_stat", net->proc_net);
-++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		remove_proc_entry("softnet_stat", net->proc_net);
-+ out_dev:
-+ 	remove_proc_entry("dev", net->proc_net);
-+ 	goto out;
-+@@ -315,8 +319,10 @@ static void __net_exit dev_proc_net_exit
-+ {
-+ 	wext_proc_exit(net);
-+ 
-+-	remove_proc_entry("ptype", net->proc_net);
-+-	remove_proc_entry("softnet_stat", net->proc_net);
-++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) {
-++		remove_proc_entry("ptype", net->proc_net);
-++		remove_proc_entry("softnet_stat", net->proc_net);
-++	}
-+ 	remove_proc_entry("dev", net->proc_net);
-+ }
-+ 
-+--- a/net/core/sock.c
-++++ b/net/core/sock.c
-+@@ -3680,6 +3680,8 @@ static __net_initdata struct pernet_oper
-+ 
-+ static int __init proto_init(void)
-+ {
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		return 0;
-+ 	return register_pernet_subsys(&proto_net_ops);
-+ }
-+ 
-+--- a/net/ipv4/fib_trie.c
-++++ b/net/ipv4/fib_trie.c
-+@@ -2986,11 +2986,13 @@ static const struct seq_operations fib_r
-+ 
-+ int __net_init fib_proc_init(struct net *net)
-+ {
-+-	if (!proc_create_net("fib_trie", 0444, net->proc_net, &fib_trie_seq_ops,
-++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED) &&
-++			!proc_create_net("fib_trie", 0444, net->proc_net, &fib_trie_seq_ops,
-+ 			sizeof(struct fib_trie_iter)))
-+ 		goto out1;
-+ 
-+-	if (!proc_create_net_single("fib_triestat", 0444, net->proc_net,
-++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED) &&
-++			!proc_create_net_single("fib_triestat", 0444, net->proc_net,
-+ 			fib_triestat_seq_show, NULL))
-+ 		goto out2;
-+ 
-+@@ -3001,17 +3003,21 @@ int __net_init fib_proc_init(struct net
-+ 	return 0;
-+ 
-+ out3:
-+-	remove_proc_entry("fib_triestat", net->proc_net);
-++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		remove_proc_entry("fib_triestat", net->proc_net);
-+ out2:
-+-	remove_proc_entry("fib_trie", net->proc_net);
-++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		remove_proc_entry("fib_trie", net->proc_net);
-+ out1:
-+ 	return -ENOMEM;
-+ }
-+ 
-+ void __net_exit fib_proc_exit(struct net *net)
-+ {
-+-	remove_proc_entry("fib_trie", net->proc_net);
-+-	remove_proc_entry("fib_triestat", net->proc_net);
-++	if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) {
-++		remove_proc_entry("fib_trie", net->proc_net);
-++		remove_proc_entry("fib_triestat", net->proc_net);
-++	}
-+ 	remove_proc_entry("route", net->proc_net);
-+ }
-+ 
-+--- a/net/ipv4/proc.c
-++++ b/net/ipv4/proc.c
-+@@ -528,5 +528,8 @@ static __net_initdata struct pernet_oper
-+ 
-+ int __init ip_misc_proc_init(void)
-+ {
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		return 0;
-++
-+ 	return register_pernet_subsys(&ip_proc_ops);
-+ }
-+--- a/net/ipv4/route.c
-++++ b/net/ipv4/route.c
-+@@ -409,6 +409,9 @@ static struct pernet_operations ip_rt_pr
-+ 
-+ static int __init ip_rt_proc_init(void)
-+ {
-++	if (IS_ENABLED(CONFIG_PROC_STRIPPED))
-++		return 0;
-++
-+ 	return register_pernet_subsys(&ip_rt_proc_ops);
-+ }
-+ 
-diff --git a/target/linux/generic/hack-5.10/904-debloat_dma_buf.patch b/target/linux/generic/hack-5.10/904-debloat_dma_buf.patch
-new file mode 100644
-index 0000000000..2f5f685063
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/904-debloat_dma_buf.patch
-@@ -0,0 +1,82 @@
-+From e3692cb2fcd5ba1244512a0f43b8118f65f1c375 Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Sat, 8 Jul 2017 08:20:43 +0200
-+Subject: debloat: dmabuf
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ drivers/base/Kconfig      |  2 +-
-+ drivers/dma-buf/Makefile  | 10 +++++++---
-+ drivers/dma-buf/dma-buf.c |  4 +++-
-+ kernel/sched/core.c       |  1 +
-+ 4 files changed, 12 insertions(+), 5 deletions(-)
-+
-+--- a/drivers/base/Kconfig
-++++ b/drivers/base/Kconfig
-+@@ -184,7 +184,7 @@ config SOC_BUS
-+ source "drivers/base/regmap/Kconfig"
-+ 
-+ config DMA_SHARED_BUFFER
-+-	bool
-++	tristate
-+ 	default n
-+ 	select IRQ_WORK
-+ 	help
-+--- a/drivers/dma-buf/Makefile
-++++ b/drivers/dma-buf/Makefile
-+@@ -1,15 +1,19 @@
-+ # SPDX-License-Identifier: GPL-2.0-only
-+-obj-y := dma-buf.o dma-fence.o dma-fence-array.o dma-fence-chain.o \
-++obj-$(CONFIG_DMA_SHARED_BUFFER) := dma-shared-buffer.o
-++
-++dma-buf-objs-y := dma-buf.o dma-fence.o dma-fence-array.o dma-fence-chain.o \
-+ 	 dma-resv.o seqno-fence.o
-+-obj-$(CONFIG_DMABUF_HEAPS)	+= dma-heap.o
-+-obj-$(CONFIG_DMABUF_HEAPS)	+= heaps/
-+-obj-$(CONFIG_SYNC_FILE)		+= sync_file.o
-+-obj-$(CONFIG_SW_SYNC)		+= sw_sync.o sync_debug.o
-+-obj-$(CONFIG_UDMABUF)		+= udmabuf.o
-++dma-buf-objs-$(CONFIG_DMABUF_HEAPS)	+= dma-heap.o
-++dma-buf-objs-$(CONFIG_DMABUF_HEAPS)	+= heaps/
-++dma-buf-objs-$(CONFIG_SYNC_FILE)		+= sync_file.o
-++dma-buf-objs-$(CONFIG_SW_SYNC)		+= sw_sync.o sync_debug.o
-++dma-buf-objs-$(CONFIG_UDMABUF)		+= udmabuf.o
-+ 
-+ dmabuf_selftests-y := \
-+ 	selftest.o \
-+ 	st-dma-fence.o \
-+ 	st-dma-fence-chain.o
-+ 
-+-obj-$(CONFIG_DMABUF_SELFTESTS)	+= dmabuf_selftests.o
-++dma-buf-objs-$(CONFIG_DMABUF_SELFTESTS)	+= dmabuf_selftests.o
-++
-++dma-shared-buffer-objs :=  $(dma-buf-objs-y)
-+--- a/drivers/dma-buf/dma-buf.c
-++++ b/drivers/dma-buf/dma-buf.c
-+@@ -1418,4 +1418,5 @@ static void __exit dma_buf_deinit(void)
-+ 	dma_buf_uninit_debugfs();
-+ 	kern_unmount(dma_buf_mnt);
-+ }
-+-__exitcall(dma_buf_deinit);
-++module_exit(dma_buf_deinit);
-++MODULE_LICENSE("GPL");
-+--- a/kernel/sched/core.c
-++++ b/kernel/sched/core.c
-+@@ -3051,6 +3051,7 @@ int wake_up_state(struct task_struct *p,
-+ {
-+ 	return try_to_wake_up(p, state, 0);
-+ }
-++EXPORT_SYMBOL_GPL(wake_up_state);
-+ 
-+ /*
-+  * Perform scheduler related setup for a newly forked process p.
-+--- a/fs/d_path.c
-++++ b/fs/d_path.c
-+@@ -311,6 +311,7 @@ char *dynamic_dname(struct dentry *dentr
-+ 	buffer += buflen - sz;
-+ 	return memcpy(buffer, temp, sz);
-+ }
-++EXPORT_SYMBOL_GPL(dynamic_dname);
-+ 
-+ char *simple_dname(struct dentry *dentry, char *buffer, int buflen)
-+ {
-diff --git a/target/linux/generic/hack-5.10/910-kobject_uevent.patch b/target/linux/generic/hack-5.10/910-kobject_uevent.patch
-new file mode 100644
-index 0000000000..c4c41ca400
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/910-kobject_uevent.patch
-@@ -0,0 +1,32 @@
-+From 0d37e6edc09c99e683dd91ca0e83bbc0df8477b3 Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Sun, 16 Jul 2017 16:56:10 +0200
-+Subject: lib: add uevent_next_seqnum()
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ include/linux/kobject.h |  5 +++++
-+ lib/kobject_uevent.c    | 37 +++++++++++++++++++++++++++++++++++++
-+ 2 files changed, 42 insertions(+)
-+
-+--- a/lib/kobject_uevent.c
-++++ b/lib/kobject_uevent.c
-+@@ -179,6 +179,18 @@ out:
-+ 	return r;
-+ }
-+ 
-++u64 uevent_next_seqnum(void)
-++{
-++	u64 seq;
-++
-++	mutex_lock(&uevent_sock_mutex);
-++	seq = ++uevent_seqnum;
-++	mutex_unlock(&uevent_sock_mutex);
-++
-++	return seq;
-++}
-++EXPORT_SYMBOL_GPL(uevent_next_seqnum);
-++
-+ /**
-+  * kobject_synth_uevent - send synthetic uevent with arguments
-+  *
-diff --git a/target/linux/generic/hack-5.10/911-kobject_add_broadcast_uevent.patch b/target/linux/generic/hack-5.10/911-kobject_add_broadcast_uevent.patch
-new file mode 100644
-index 0000000000..1f3002da4c
---- /dev/null
-+++ b/target/linux/generic/hack-5.10/911-kobject_add_broadcast_uevent.patch
-@@ -0,0 +1,76 @@
-+From 0d37e6edc09c99e683dd91ca0e83bbc0df8477b3 Mon Sep 17 00:00:00 2001
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Sun, 16 Jul 2017 16:56:10 +0200
-+Subject: lib: add uevent_next_seqnum()
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ include/linux/kobject.h |  5 +++++
-+ lib/kobject_uevent.c    | 37 +++++++++++++++++++++++++++++++++++++
-+ 2 files changed, 42 insertions(+)
-+
-+--- a/include/linux/kobject.h
-++++ b/include/linux/kobject.h
-+@@ -32,6 +32,8 @@
-+ #define UEVENT_NUM_ENVP			64	/* number of env pointers */
-+ #define UEVENT_BUFFER_SIZE		2048	/* buffer for the variables */
-+ 
-++struct sk_buff;
-++
-+ #ifdef CONFIG_UEVENT_HELPER
-+ /* path to the userspace helper executed on an event */
-+ extern char uevent_helper[];
-+@@ -244,4 +246,7 @@ int kobject_synth_uevent(struct kobject
-+ __printf(2, 3)
-+ int add_uevent_var(struct kobj_uevent_env *env, const char *format, ...);
-+ 
-++int broadcast_uevent(struct sk_buff *skb, __u32 pid, __u32 group,
-++		     gfp_t allocation);
-++
-+ #endif /* _KOBJECT_H_ */
-+--- a/lib/kobject_uevent.c
-++++ b/lib/kobject_uevent.c
-+@@ -690,6 +690,43 @@ int add_uevent_var(struct kobj_uevent_en
-+ EXPORT_SYMBOL_GPL(add_uevent_var);
-+ 
-+ #if defined(CONFIG_NET)
-++int broadcast_uevent(struct sk_buff *skb, __u32 pid, __u32 group,
-++		     gfp_t allocation)
-++{
-++	struct uevent_sock *ue_sk;
-++	int err = 0;
-++
-++	/* send netlink message */
-++	mutex_lock(&uevent_sock_mutex);
-++	list_for_each_entry(ue_sk, &uevent_sock_list, list) {
-++		struct sock *uevent_sock = ue_sk->sk;
-++		struct sk_buff *skb2;
-++
-++		skb2 = skb_clone(skb, allocation);
-++		if (!skb2)
-++			break;
-++
-++		err = netlink_broadcast(uevent_sock, skb2, pid, group,
-++					allocation);
-++		if (err)
-++			break;
-++	}
-++	mutex_unlock(&uevent_sock_mutex);
-++
-++	kfree_skb(skb);
-++	return err;
-++}
-++#else
-++int broadcast_uevent(struct sk_buff *skb, __u32 pid, __u32 group,
-++		     gfp_t allocation)
-++{
-++	kfree_skb(skb);
-++	return 0;
-++}
-++#endif
-++EXPORT_SYMBOL_GPL(broadcast_uevent);
-++
-++#if defined(CONFIG_NET)
-+ static int uevent_net_broadcast(struct sock *usk, struct sk_buff *skb,
-+ 				struct netlink_ext_ack *extack)
-+ {
-diff --git a/target/linux/generic/pending-5.10/100-compiler.h-only-include-asm-rwonce.h-for-kernel-code.patch b/target/linux/generic/pending-5.10/100-compiler.h-only-include-asm-rwonce.h-for-kernel-code.patch
-new file mode 100644
-index 0000000000..39b98eac1b
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/100-compiler.h-only-include-asm-rwonce.h-for-kernel-code.patch
-@@ -0,0 +1,29 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Thu, 22 Oct 2020 22:00:03 +0200
-+Subject: [PATCH] compiler.h: only include asm/rwonce.h for kernel code
-+
-+This header file is not in uapi, which makes any user space code that includes
-+linux/compiler.h to fail with the error 'asm/rwonce.h: No such file or directory'
-+
-+Fixes: e506ea451254 ("compiler.h: Split {READ,WRITE}_ONCE definitions out into rwonce.h")
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/include/linux/compiler.h
-++++ b/include/linux/compiler.h
-+@@ -211,6 +211,8 @@ void ftrace_likely_update(struct ftrace_
-+ 	__v;								\
-+ })
-+ 
-++#include <asm/rwonce.h>
-++
-+ #endif /* __KERNEL__ */
-+ 
-+ /*
-+@@ -243,6 +245,4 @@ static inline void *offset_to_ptr(const
-+  */
-+ #define prevent_tail_call_optimization()	mb()
-+ 
-+-#include <asm/rwonce.h>
-+-
-+ #endif /* __LINUX_COMPILER_H */
-diff --git a/target/linux/generic/pending-5.10/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch b/target/linux/generic/pending-5.10/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch
-new file mode 100644
-index 0000000000..cc9f99e8b0
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch
-@@ -0,0 +1,57 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Wed, 18 Apr 2018 10:50:05 +0200
-+Subject: [PATCH] MIPS: only process negative stack offsets on stack traces
-+
-+Fixes endless back traces in cases where the compiler emits a stack
-+pointer increase in a branch delay slot (probably for some form of
-+function return).
-+
-+[    3.475442] BUG: MAX_STACK_TRACE_ENTRIES too low!
-+[    3.480070] turning off the locking correctness validator.
-+[    3.485521] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.14.34 #0
-+[    3.491475] Stack : 00000000 00000000 00000000 00000000 80e0fce2 00000034 00000000 00000000
-+[    3.499764]         87c3838c 80696377 8061047c 00000000 00000001 00000001 87c2d850 6534689f
-+[    3.508059]         00000000 00000000 80e10000 00000000 00000000 000000cf 0000000f 00000000
-+[    3.516353]         00000000 806a0000 00076891 00000000 00000000 00000000 ffffffff 00000000
-+[    3.524648]         806c0000 00000004 80e10000 806a0000 00000003 80690000 00000000 80700000
-+[    3.532942]         ...
-+[    3.535362] Call Trace:
-+[    3.537818] [<80010a48>] show_stack+0x58/0x100
-+[    3.542207] [<804c2f78>] dump_stack+0xe8/0x170
-+[    3.546613] [<80079f90>] save_trace+0xf0/0x110
-+[    3.551010] [<8007b1ec>] mark_lock+0x33c/0x78c
-+[    3.555413] [<8007bf48>] __lock_acquire+0x2ac/0x1a08
-+[    3.560337] [<8007de60>] lock_acquire+0x64/0x8c
-+[    3.564846] [<804e1570>] _raw_spin_lock_irqsave+0x54/0x78
-+[    3.570186] [<801b618c>] kernfs_notify+0x94/0xac
-+[    3.574770] [<801b7b10>] sysfs_notify+0x74/0xa0
-+[    3.579257] [<801b618c>] kernfs_notify+0x94/0xac
-+[    3.583839] [<801b7b10>] sysfs_notify+0x74/0xa0
-+[    3.588329] [<801b618c>] kernfs_notify+0x94/0xac
-+[    3.592911] [<801b7b10>] sysfs_notify+0x74/0xa0
-+[    3.597401] [<801b618c>] kernfs_notify+0x94/0xac
-+[    3.601983] [<801b7b10>] sysfs_notify+0x74/0xa0
-+[    3.606473] [<801b618c>] kernfs_notify+0x94/0xac
-+[    3.611055] [<801b7b10>] sysfs_notify+0x74/0xa0
-+[    3.615545] [<801b618c>] kernfs_notify+0x94/0xac
-+[    3.620125] [<801b7b10>] sysfs_notify+0x74/0xa0
-+[    3.624619] [<801b618c>] kernfs_notify+0x94/0xac
-+[    3.629197] [<801b7b10>] sysfs_notify+0x74/0xa0
-+[    3.633691] [<801b618c>] kernfs_notify+0x94/0xac
-+[    3.638269] [<801b7b10>] sysfs_notify+0x74/0xa0
-+[    3.642763] [<801b618c>] kernfs_notify+0x94/0xac
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/arch/mips/kernel/process.c
-++++ b/arch/mips/kernel/process.c
-+@@ -380,6 +380,8 @@ static inline int is_sp_move_ins(union m
-+ 
-+ 	if (ip->i_format.opcode == addiu_op ||
-+ 	    ip->i_format.opcode == daddiu_op) {
-++		if (ip->i_format.simmediate > 0)
-++			return 0;
-+ 		*frame_size = -ip->i_format.simmediate;
-+ 		return 1;
-+ 	}
-diff --git a/target/linux/generic/pending-5.10/103-MIPS-select-CPU_MIPS64-for-remaining-MIPS64-CPUs.patch b/target/linux/generic/pending-5.10/103-MIPS-select-CPU_MIPS64-for-remaining-MIPS64-CPUs.patch
-new file mode 100644
-index 0000000000..cf79e9a449
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/103-MIPS-select-CPU_MIPS64-for-remaining-MIPS64-CPUs.patch
-@@ -0,0 +1,36 @@
-+From 6523061868212473f63812a0c477a161742bed42 Mon Sep 17 00:00:00 2001
-+From: "Jason A. Donenfeld" <Jason@zx2c4.com>
-+Date: Sat, 27 Feb 2021 13:20:24 +0100
-+Subject: [PATCH] MIPS: select CPU_MIPS64 for remaining MIPS64 CPUs
-+
-+The CPU_MIPS64 and CPU_MIPS32 variables are supposed to be able to
-+distinguish broadly between 64-bit and 32-bit MIPS CPUs. However, they
-+weren't selected by the specialty CPUs, Octeon and Loongson, which meant
-+it was possible to hit a weird state of:
-+
-+    MIPS=y, CONFIG_64BIT=y, CPU_MIPS64=n
-+
-+This commit rectifies the issue by having CPU_MIPS64 be selected when
-+the missing Octeon or Loongson models are selected.
-+
-+Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
-+Cc: Ralf Baechle <ralf@linux-mips.org>
-+Cc: George Cherian <gcherian@marvell.com>
-+Cc: Huacai Chen <chenhuacai@kernel.org>
-+Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
-+Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
-+---
-+ arch/mips/Kconfig | 2 +-
-+ 1 file changed, 1 insertion(+), 1 deletion(-)
-+
-+--- a/arch/mips/Kconfig
-++++ b/arch/mips/Kconfig
-+@@ -2075,7 +2075,7 @@ config CPU_MIPS32
-+ config CPU_MIPS64
-+ 	bool
-+ 	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
-+-		     CPU_MIPS64_R6
-++		     CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
-+ 
-+ #
-+ # These indicate the revision of the architecture
-diff --git a/target/linux/generic/pending-5.10/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch b/target/linux/generic/pending-5.10/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch
-new file mode 100644
-index 0000000000..4375e727cf
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch
-@@ -0,0 +1,82 @@
-+From: Tobias Wolf <dev-NTEO@vplace.de>
-+Subject: mm: Fix alloc_node_mem_map with ARCH_PFN_OFFSET calculation
-+
-+An rt288x (ralink) based router (Belkin F5D8235 v1) does not boot with any
-+kernel beyond version 4.3 resulting in:
-+
-+BUG: Bad page state in process swapper  pfn:086ac
-+
-+bisect resulted in:
-+
-+a1c34a3bf00af2cede839879502e12dc68491ad5 is the first bad commit
-+commit a1c34a3bf00af2cede839879502e12dc68491ad5
-+Author: Laura Abbott <laura@labbott.name>
-+Date:   Thu Nov 5 18:48:46 2015 -0800
-+
-+    mm: Don't offset memmap for flatmem
-+
-+    Srinivas Kandagatla reported bad page messages when trying to remove the
-+    bottom 2MB on an ARM based IFC6410 board
-+
-+      BUG: Bad page state in process swapper  pfn:fffa8
-+      page:ef7fb500 count:0 mapcount:0 mapping:  (null) index:0x0
-+      flags: 0x96640253(locked|error|dirty|active|arch_1|reclaim|mlocked)
-+      page dumped because: PAGE_FLAGS_CHECK_AT_FREE flag(s) set
-+      bad because of flags:
-+      flags: 0x200041(locked|active|mlocked)
-+      Modules linked in:
-+      CPU: 0 PID: 0 Comm: swapper Not tainted 3.19.0-rc3-00007-g412f9ba-dirty
-+#816
-+      Hardware name: Qualcomm (Flattened Device Tree)
-+        unwind_backtrace
-+        show_stack
-+        dump_stack
-+        bad_page
-+        free_pages_prepare
-+        free_hot_cold_page
-+        __free_pages
-+        free_highmem_page
-+        mem_init
-+        start_kernel
-+      Disabling lock debugging due to kernel taint
-+    [...]
-+:040000 040000 2de013c372345fd471cd58f0553c9b38b0ef1cc4
-+0a8156f848733dfa21e16c196dfb6c0a76290709 M      mm
-+
-+This fix for ARM does not account ARCH_PFN_OFFSET for mem_map as later used by
-+page_to_pfn anymore.
-+
-+The following output was generated with two hacked in printk statements:
-+
-+printk("before %p vs. %p or %p\n", mem_map, mem_map - offset, mem_map -
-+(pgdat->node_start_pfn - ARCH_PFN_OFFSET));
-+		if (page_to_pfn(mem_map) != pgdat->node_start_pfn)
-+			mem_map -= offset + (pgdat->node_start_pfn - ARCH_PFN_OFFSET);
-+printk("after %p\n", mem_map);
-+
-+Output:
-+
-+[    0.000000] before 8861b280 vs. 8861b280 or 8851b280
-+[    0.000000] after 8851b280
-+
-+As seen in the first line mem_map with subtraction of offset does not equal the
-+mem_map after subtraction of ARCH_PFN_OFFSET.
-+
-+After adding the offset of ARCH_PFN_OFFSET as well to mem_map as the
-+previously calculated offset is zero for the named platform it is able to boot
-+4.4 and 4.9-rc7 again.
-+
-+Signed-off-by: Tobias Wolf <dev-NTEO@vplace.de>
-+---
-+
-+--- a/mm/page_alloc.c
-++++ b/mm/page_alloc.c
-+@@ -7027,7 +7027,7 @@ static void __ref alloc_node_mem_map(str
-+ 	if (pgdat == NODE_DATA(0)) {
-+ 		mem_map = NODE_DATA(0)->node_mem_map;
-+ 		if (page_to_pfn(mem_map) != pgdat->node_start_pfn)
-+-			mem_map -= offset;
-++			mem_map -= offset + (pgdat->node_start_pfn - ARCH_PFN_OFFSET);
-+ 	}
-+ #endif
-+ }
-diff --git a/target/linux/generic/pending-5.10/130-add-linux-spidev-compatible-si3210.patch b/target/linux/generic/pending-5.10/130-add-linux-spidev-compatible-si3210.patch
-new file mode 100644
-index 0000000000..355e900a3b
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/130-add-linux-spidev-compatible-si3210.patch
-@@ -0,0 +1,18 @@
-+From: Giuseppe Lippolis <giu.lippolis@gmail.com>
-+Subject: Add the linux,spidev compatible in spidev Several device in ramips have this binding in the dts
-+
-+Signed-off-by: Giuseppe Lippolis <giu.lippolis@gmail.com>
-+---
-+ drivers/spi/spidev.c | 1 +
-+ 1 file changed, 1 insertion(+)
-+
-+--- a/drivers/spi/spidev.c
-++++ b/drivers/spi/spidev.c
-+@@ -682,6 +682,7 @@ static const struct of_device_id spidev_
-+ 	{ .compatible = "lwn,bk4" },
-+ 	{ .compatible = "dh,dhcom-board" },
-+ 	{ .compatible = "menlo,m53cpld" },
-++	{ .compatible = "siliconlabs,si3210" },
-+ 	{},
-+ };
-+ MODULE_DEVICE_TABLE(of, spidev_dt_ids);
-diff --git a/target/linux/generic/pending-5.10/140-jffs2-use-.rename2-and-add-RENAME_WHITEOUT-support.patch b/target/linux/generic/pending-5.10/140-jffs2-use-.rename2-and-add-RENAME_WHITEOUT-support.patch
-new file mode 100644
-index 0000000000..e48da41fae
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/140-jffs2-use-.rename2-and-add-RENAME_WHITEOUT-support.patch
-@@ -0,0 +1,78 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: jffs2: use .rename2 and add RENAME_WHITEOUT support
-+
-+It is required for renames on overlayfs
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/fs/jffs2/dir.c
-++++ b/fs/jffs2/dir.c
-+@@ -609,7 +609,8 @@ static int jffs2_rmdir (struct inode *di
-+ 	return ret;
-+ }
-+ 
-+-static int jffs2_mknod (struct inode *dir_i, struct dentry *dentry, umode_t mode, dev_t rdev)
-++static int __jffs2_mknod (struct inode *dir_i, struct dentry *dentry,
-++			  umode_t mode, dev_t rdev, bool whiteout)
-+ {
-+ 	struct jffs2_inode_info *f, *dir_f;
-+ 	struct jffs2_sb_info *c;
-+@@ -748,7 +749,11 @@ static int jffs2_mknod (struct inode *di
-+ 	mutex_unlock(&dir_f->sem);
-+ 	jffs2_complete_reservation(c);
-+ 
-+-	d_instantiate_new(dentry, inode);
-++	if (!whiteout)
-++		d_instantiate_new(dentry, inode);
-++	else
-++		unlock_new_inode(inode);
-++
-+ 	return 0;
-+ 
-+  fail:
-+@@ -756,6 +761,17 @@ static int jffs2_mknod (struct inode *di
-+ 	return ret;
-+ }
-+ 
-++static int jffs2_mknod (struct inode *dir_i, struct dentry *dentry, umode_t mode, dev_t rdev)
-++{
-++	return __jffs2_mknod(dir_i, dentry, mode, rdev, false);
-++}
-++
-++static int jffs2_whiteout (struct inode *old_dir, struct dentry *old_dentry)
-++{
-++	return __jffs2_mknod(old_dir, old_dentry, S_IFCHR | WHITEOUT_MODE,
-++			     WHITEOUT_DEV, true);
-++}
-++
-+ static int jffs2_rename (struct inode *old_dir_i, struct dentry *old_dentry,
-+ 			 struct inode *new_dir_i, struct dentry *new_dentry,
-+ 			 unsigned int flags)
-+@@ -766,7 +782,7 @@ static int jffs2_rename (struct inode *o
-+ 	uint8_t type;
-+ 	uint32_t now;
-+ 
-+-	if (flags & ~RENAME_NOREPLACE)
-++	if (flags & ~(RENAME_NOREPLACE|RENAME_WHITEOUT))
-+ 		return -EINVAL;
-+ 
-+ 	/* The VFS will check for us and prevent trying to rename a
-+@@ -832,9 +848,14 @@ static int jffs2_rename (struct inode *o
-+ 	if (d_is_dir(old_dentry) && !victim_f)
-+ 		inc_nlink(new_dir_i);
-+ 
-+-	/* Unlink the original */
-+-	ret = jffs2_do_unlink(c, JFFS2_INODE_INFO(old_dir_i),
-+-			      old_dentry->d_name.name, old_dentry->d_name.len, NULL, now);
-++	if (flags & RENAME_WHITEOUT)
-++		/* Replace with whiteout */
-++		ret = jffs2_whiteout(old_dir_i, old_dentry);
-++	else
-++		/* Unlink the original */
-++		ret = jffs2_do_unlink(c, JFFS2_INODE_INFO(old_dir_i),
-++				      old_dentry->d_name.name,
-++				      old_dentry->d_name.len, NULL, now);
-+ 
-+ 	/* We don't touch inode->i_nlink */
-+ 
-diff --git a/target/linux/generic/pending-5.10/141-jffs2-add-RENAME_EXCHANGE-support.patch b/target/linux/generic/pending-5.10/141-jffs2-add-RENAME_EXCHANGE-support.patch
-new file mode 100644
-index 0000000000..dbc72339c6
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/141-jffs2-add-RENAME_EXCHANGE-support.patch
-@@ -0,0 +1,73 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: jffs2: add RENAME_EXCHANGE support
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/fs/jffs2/dir.c
-++++ b/fs/jffs2/dir.c
-+@@ -779,18 +779,31 @@ static int jffs2_rename (struct inode *o
-+ 	int ret;
-+ 	struct jffs2_sb_info *c = JFFS2_SB_INFO(old_dir_i->i_sb);
-+ 	struct jffs2_inode_info *victim_f = NULL;
-++	struct inode *fst_inode = d_inode(old_dentry);
-++	struct inode *snd_inode = d_inode(new_dentry);
-+ 	uint8_t type;
-+ 	uint32_t now;
-+ 
-+-	if (flags & ~(RENAME_NOREPLACE|RENAME_WHITEOUT))
-++	if (flags & ~(RENAME_NOREPLACE|RENAME_WHITEOUT|RENAME_EXCHANGE))
-+ 		return -EINVAL;
-+ 
-++	if ((flags & RENAME_EXCHANGE) && (old_dir_i != new_dir_i)) {
-++		if (S_ISDIR(fst_inode->i_mode) && !S_ISDIR(snd_inode->i_mode)) {
-++			inc_nlink(new_dir_i);
-++			drop_nlink(old_dir_i);
-++		}
-++		else if (!S_ISDIR(fst_inode->i_mode) && S_ISDIR(snd_inode->i_mode)) {
-++			drop_nlink(new_dir_i);
-++			inc_nlink(old_dir_i);
-++		}
-++	}
-++
-+ 	/* The VFS will check for us and prevent trying to rename a
-+ 	 * file over a directory and vice versa, but if it's a directory,
-+ 	 * the VFS can't check whether the victim is empty. The filesystem
-+ 	 * needs to do that for itself.
-+ 	 */
-+-	if (d_really_is_positive(new_dentry)) {
-++	if (d_really_is_positive(new_dentry) && !(flags & RENAME_EXCHANGE)) {
-+ 		victim_f = JFFS2_INODE_INFO(d_inode(new_dentry));
-+ 		if (d_is_dir(new_dentry)) {
-+ 			struct jffs2_full_dirent *fd;
-+@@ -825,7 +838,7 @@ static int jffs2_rename (struct inode *o
-+ 	if (ret)
-+ 		return ret;
-+ 
-+-	if (victim_f) {
-++	if (victim_f && !(flags & RENAME_EXCHANGE)) {
-+ 		/* There was a victim. Kill it off nicely */
-+ 		if (d_is_dir(new_dentry))
-+ 			clear_nlink(d_inode(new_dentry));
-+@@ -851,6 +864,12 @@ static int jffs2_rename (struct inode *o
-+ 	if (flags & RENAME_WHITEOUT)
-+ 		/* Replace with whiteout */
-+ 		ret = jffs2_whiteout(old_dir_i, old_dentry);
-++	else if (flags & RENAME_EXCHANGE)
-++		/* Replace the original */
-++		ret = jffs2_do_link(c, JFFS2_INODE_INFO(old_dir_i),
-++				    d_inode(new_dentry)->i_ino, type,
-++				    old_dentry->d_name.name, old_dentry->d_name.len,
-++				    now);
-+ 	else
-+ 		/* Unlink the original */
-+ 		ret = jffs2_do_unlink(c, JFFS2_INODE_INFO(old_dir_i),
-+@@ -882,7 +901,7 @@ static int jffs2_rename (struct inode *o
-+ 		return ret;
-+ 	}
-+ 
-+-	if (d_is_dir(old_dentry))
-++	if (d_is_dir(old_dentry) && !(flags & RENAME_EXCHANGE))
-+ 		drop_nlink(old_dir_i);
-+ 
-+ 	new_dir_i->i_mtime = new_dir_i->i_ctime = old_dir_i->i_mtime = old_dir_i->i_ctime = ITIME(now);
-diff --git a/target/linux/generic/pending-5.10/142-jffs2-add-splice-ops.patch b/target/linux/generic/pending-5.10/142-jffs2-add-splice-ops.patch
-new file mode 100644
-index 0000000000..de847a1f5c
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/142-jffs2-add-splice-ops.patch
-@@ -0,0 +1,20 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: jffs2: add splice ops
-+
-+Add splice_read using generic_file_splice_read.
-+Add splice_write using iter_file_splice_write
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/fs/jffs2/file.c
-++++ b/fs/jffs2/file.c
-+@@ -53,6 +53,8 @@ const struct file_operations jffs2_file_
-+ 	.open =		generic_file_open,
-+  	.read_iter =	generic_file_read_iter,
-+  	.write_iter =	generic_file_write_iter,
-++	.splice_read =	generic_file_splice_read,
-++	.splice_write =	iter_file_splice_write,
-+ 	.unlocked_ioctl=jffs2_ioctl,
-+ 	.mmap =		generic_file_readonly_mmap,
-+ 	.fsync =	jffs2_fsync,
-diff --git a/target/linux/generic/pending-5.10/150-bridge_allow_receiption_on_disabled_port.patch b/target/linux/generic/pending-5.10/150-bridge_allow_receiption_on_disabled_port.patch
-new file mode 100644
-index 0000000000..6de22b1c7d
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/150-bridge_allow_receiption_on_disabled_port.patch
-@@ -0,0 +1,45 @@
-+From: Stephen Hemminger <stephen@networkplumber.org>
-+Subject: bridge: allow receiption on disabled port
-+
-+When an ethernet device is enslaved to a bridge, and the bridge STP
-+detects loss of carrier (or operational state down), then normally
-+packet receiption is blocked.
-+
-+This breaks control applications like WPA which maybe expecting to
-+receive packets to negotiate to bring link up. The bridge needs to
-+block forwarding packets from these disabled ports, but there is no
-+hard requirement to not allow local packet delivery.
-+
-+Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+
-+--- a/net/bridge/br_input.c
-++++ b/net/bridge/br_input.c
-+@@ -195,6 +195,9 @@ static void __br_handle_local_finish(str
-+ /* note: already called with rcu_read_lock */
-+ static int br_handle_local_finish(struct net *net, struct sock *sk, struct sk_buff *skb)
-+ {
-++	struct net_bridge_port *p = br_port_get_rcu(skb->dev);
-++
-++	if (p->state != BR_STATE_DISABLED)
-+ 	__br_handle_local_finish(skb);
-+ 
-+ 	/* return 1 to signal the okfn() was called so it's ok to use the skb */
-+@@ -348,6 +351,17 @@ static rx_handler_result_t br_handle_fra
-+ 
-+ forward:
-+ 	switch (p->state) {
-++	case BR_STATE_DISABLED:
-++		if (ether_addr_equal(p->br->dev->dev_addr, dest))
-++			skb->pkt_type = PACKET_HOST;
-++
-++		if (NF_HOOK(NFPROTO_BRIDGE, NF_BR_PRE_ROUTING,
-++			dev_net(skb->dev), NULL, skb, skb->dev, NULL,
-++			br_handle_local_finish) == 1) {
-++			return RX_HANDLER_PASS;
-++		}
-++		break;
-++
-+ 	case BR_STATE_FORWARDING:
-+ 	case BR_STATE_LEARNING:
-+ 		if (ether_addr_equal(p->br->dev->dev_addr, dest))
-diff --git a/target/linux/generic/pending-5.10/190-rtc-rs5c372-support_alarms_up_to_1_week.patch b/target/linux/generic/pending-5.10/190-rtc-rs5c372-support_alarms_up_to_1_week.patch
-new file mode 100644
-index 0000000000..13b79b5c09
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/190-rtc-rs5c372-support_alarms_up_to_1_week.patch
-@@ -0,0 +1,94 @@
-+From: Daniel González Cabanelas <dgcbueu@gmail.com>
-+Subject: [PATCH 1/2] rtc: rs5c372: support alarms up to 1 week
-+
-+The Ricoh R2221x, R2223x, RS5C372, RV5C387A chips can handle 1 week
-+alarms.
-+
-+Read the "wday" alarm register and convert it to a date to support up 1
-+week in our driver.
-+
-+Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
-+---
-+ drivers/rtc/rtc-rs5c372.c | 48 ++++++++++++++++++++++++++++++++++-----
-+ 1 file changed, 42 insertions(+), 6 deletions(-)
-+
-+--- a/drivers/rtc/rtc-rs5c372.c
-++++ b/drivers/rtc/rtc-rs5c372.c
-+@@ -393,7 +393,9 @@ static int rs5c_read_alarm(struct device
-+ {
-+ 	struct i2c_client	*client = to_i2c_client(dev);
-+ 	struct rs5c372		*rs5c = i2c_get_clientdata(client);
-+-	int			status;
-++	int			status, wday_offs;
-++	struct rtc_time 	rtc;
-++	unsigned long 		alarm_secs;
-+ 
-+ 	status = rs5c_get_regs(rs5c);
-+ 	if (status < 0)
-+@@ -403,6 +405,30 @@ static int rs5c_read_alarm(struct device
-+ 	t->time.tm_sec = 0;
-+ 	t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f);
-+ 	t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]);
-++	t->time.tm_wday = ffs(rs5c->regs[RS5C_REG_ALARM_A_WDAY] & 0x7f) - 1;
-++
-++	/* determine the day, month and year based on alarm wday, taking as a
-++	 * reference the current time from the rtc
-++	 */
-++	status = rs5c372_rtc_read_time(dev, &rtc);
-++	if (status < 0)
-++		return status;
-++
-++	wday_offs = t->time.tm_wday - rtc.tm_wday;
-++	alarm_secs = mktime64(rtc.tm_year + 1900,
-++			      rtc.tm_mon + 1,
-++			      rtc.tm_mday + wday_offs,
-++			      t->time.tm_hour,
-++			      t->time.tm_min,
-++			      t->time.tm_sec);
-++
-++	if (wday_offs < 0 || (wday_offs == 0 &&
-++			      (t->time.tm_hour < rtc.tm_hour ||
-++			       (t->time.tm_hour == rtc.tm_hour &&
-++				t->time.tm_min <= rtc.tm_min))))
-++		alarm_secs += 7 * 86400;
-++
-++	rtc_time64_to_tm(alarm_secs, &t->time);
-+ 
-+ 	/* ... and status */
-+ 	t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE);
-+@@ -417,12 +443,20 @@ static int rs5c_set_alarm(struct device
-+ 	struct rs5c372		*rs5c = i2c_get_clientdata(client);
-+ 	int			status, addr, i;
-+ 	unsigned char		buf[3];
-++	struct rtc_time 	rtc_tm;
-++	unsigned long 		rtc_secs, alarm_secs;
-+ 
-+-	/* only handle up to 24 hours in the future, like RTC_ALM_SET */
-+-	if (t->time.tm_mday != -1
-+-			|| t->time.tm_mon != -1
-+-			|| t->time.tm_year != -1)
-++	/* chip only can handle alarms up to one week in the future*/
-++	status = rs5c372_rtc_read_time(dev, &rtc_tm);
-++	if (status)
-++		return status;
-++	rtc_secs = rtc_tm_to_time64(&rtc_tm);
-++	alarm_secs = rtc_tm_to_time64(&t->time);
-++	if (alarm_secs >= rtc_secs + 7 * 86400) {
-++		dev_err(dev, "%s: alarm maximum is one week in the future (%d)\n",
-++			__func__, status);
-+ 		return -EINVAL;
-++	}
-+ 
-+ 	/* REVISIT: round up tm_sec */
-+ 
-+@@ -443,7 +477,9 @@ static int rs5c_set_alarm(struct device
-+ 	/* set alarm */
-+ 	buf[0] = bin2bcd(t->time.tm_min);
-+ 	buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour);
-+-	buf[2] = 0x7f;	/* any/all days */
-++	/* each bit is the day of the week, 0x7f means all days */
-++	buf[2] = (t->time.tm_wday >= 0 && t->time.tm_wday < 7) ?
-++		  BIT(t->time.tm_wday) : 0x7f;
-+ 
-+ 	for (i = 0; i < sizeof(buf); i++) {
-+ 		addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i);
-diff --git a/target/linux/generic/pending-5.10/191-rtc-rs5c372-let_the_alarm_to_be_used_as_wakeup_source.patch b/target/linux/generic/pending-5.10/191-rtc-rs5c372-let_the_alarm_to_be_used_as_wakeup_source.patch
-new file mode 100644
-index 0000000000..7e9d0e66c0
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/191-rtc-rs5c372-let_the_alarm_to_be_used_as_wakeup_source.patch
-@@ -0,0 +1,70 @@
-+From: Daniel González Cabanelas <dgcbueu@gmail.com>
-+Subject: [PATCH 2/2] rtc: rs5c372: let the alarm to be used as wakeup source
-+
-+Currently there is no use for the interrupts on the rs5c372 RTC and the
-+wakealarm isn't enabled. There are some devices like NASes which use this
-+RTC to wake up from the power off state when the INTR pin is activated by
-+the alarm clock.
-+
-+Enable the alarm and let to be used as a wakeup source.
-+
-+Tested on a Buffalo LS421DE NAS.
-+
-+Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
-+---
-+ drivers/rtc/rtc-rs5c372.c | 16 ++++++++++++++++
-+ 1 file changed, 16 insertions(+)
-+
-+--- a/drivers/rtc/rtc-rs5c372.c
-++++ b/drivers/rtc/rtc-rs5c372.c
-+@@ -654,6 +654,7 @@ static int rs5c372_probe(struct i2c_clie
-+ 	int err = 0;
-+ 	int smbus_mode = 0;
-+ 	struct rs5c372 *rs5c372;
-++	bool rs5c372_can_wakeup_device = false;
-+ 
-+ 	dev_dbg(&client->dev, "%s\n", __func__);
-+ 
-+@@ -689,6 +690,12 @@ static int rs5c372_probe(struct i2c_clie
-+ 	else
-+ 		rs5c372->type = id->driver_data;
-+ 
-++#ifdef CONFIG_OF
-++	if(of_property_read_bool(client->dev.of_node,
-++					      "wakeup-source"))
-++		rs5c372_can_wakeup_device = true;
-++#endif
-++
-+ 	/* we read registers 0x0f then 0x00-0x0f; skip the first one */
-+ 	rs5c372->regs = &rs5c372->buf[1];
-+ 	rs5c372->smbus = smbus_mode;
-+@@ -722,6 +729,8 @@ static int rs5c372_probe(struct i2c_clie
-+ 		goto exit;
-+ 	}
-+ 
-++	rs5c372->has_irq = 1;
-++
-+ 	/* if the oscillator lost power and no other software (like
-+ 	 * the bootloader) set it up, do it here.
-+ 	 *
-+@@ -748,6 +757,10 @@ static int rs5c372_probe(struct i2c_clie
-+ 			);
-+ 
-+ 	/* REVISIT use client->irq to register alarm irq ... */
-++	if (rs5c372_can_wakeup_device) {
-++		device_init_wakeup(&client->dev, true);
-++	}
-++
-+ 	rs5c372->rtc = devm_rtc_device_register(&client->dev,
-+ 					rs5c372_driver.driver.name,
-+ 					&rs5c372_rtc_ops, THIS_MODULE);
-+@@ -761,6 +774,9 @@ static int rs5c372_probe(struct i2c_clie
-+ 	if (err)
-+ 		goto exit;
-+ 
-++	/* the rs5c372 alarm only supports a minute accuracy */
-++	rs5c372->rtc->uie_unsupported = 1;
-++
-+ 	return 0;
-+ 
-+ exit:
-diff --git a/target/linux/generic/pending-5.10/201-extra_optimization.patch b/target/linux/generic/pending-5.10/201-extra_optimization.patch
-new file mode 100644
-index 0000000000..df973258ab
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/201-extra_optimization.patch
-@@ -0,0 +1,31 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: Upgrade to Linux 2.6.19
-+
-+- Includes large parts of the patch from #1021 by dpalffy
-+- Includes RB532 NAND driver changes by n0-1
-+
-+[john@phrozen.org: feix will add this to his upstream queue]
-+
-+lede-commit: bff468813f78f81e36ebb2a3f4354de7365e640f
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ Makefile | 6 +++---
-+ 1 file changed, 3 insertions(+), 3 deletions(-)
-+
-+--- a/Makefile
-++++ b/Makefile
-+@@ -734,11 +734,11 @@ KBUILD_CFLAGS	+= $(call cc-disable-warni
-+ KBUILD_CFLAGS	+= $(call cc-disable-warning, address-of-packed-member)
-+ 
-+ ifdef CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE
-+-KBUILD_CFLAGS += -O2
-++KBUILD_CFLAGS += -O2 $(EXTRA_OPTIMIZATION)
-+ else ifdef CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE_O3
-+-KBUILD_CFLAGS += -O3
-++KBUILD_CFLAGS += -O3 $(EXTRA_OPTIMIZATION)
-+ else ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
-+-KBUILD_CFLAGS += -Os
-++KBUILD_CFLAGS += -Os -fno-reorder-blocks -fno-tree-ch $(EXTRA_OPTIMIZATION)
-+ endif
-+ 
-+ # Tell gcc to never replace conditional load with a non-conditional one
-diff --git a/target/linux/generic/pending-5.10/203-kallsyms_uncompressed.patch b/target/linux/generic/pending-5.10/203-kallsyms_uncompressed.patch
-new file mode 100644
-index 0000000000..9f2014c8ec
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/203-kallsyms_uncompressed.patch
-@@ -0,0 +1,119 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: kernel: add a config option for keeping the kallsyms table uncompressed, saving ~9kb kernel size after lzma on ar71xx
-+
-+[john@phrozen.org: added to my upstream queue 30.12.2016]
-+lede-commit: e0e3509b5ce2ccf93d4d67ea907613f5f7ec2eed
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ init/Kconfig            | 11 +++++++++++
-+ kernel/kallsyms.c       |  8 ++++++++
-+ scripts/kallsyms.c      | 12 ++++++++++++
-+ scripts/link-vmlinux.sh |  4 ++++
-+ 4 files changed, 35 insertions(+)
-+
-+--- a/init/Kconfig
-++++ b/init/Kconfig
-+@@ -1385,6 +1385,17 @@ config SYSCTL_ARCH_UNALIGN_ALLOW
-+ 	  the unaligned access emulation.
-+ 	  see arch/parisc/kernel/unaligned.c for reference
-+ 
-++config KALLSYMS_UNCOMPRESSED
-++	bool "Keep kallsyms uncompressed"
-++	depends on KALLSYMS
-++	help
-++		Normally kallsyms contains compressed symbols (using a token table),
-++		reducing the uncompressed kernel image size. Keeping the symbol table
-++		uncompressed significantly improves the size of this part in compressed
-++		kernel images.
-++
-++		Say N unless you need compressed kernel images to be small.
-++
-+ config HAVE_PCSPKR_PLATFORM
-+ 	bool
-+ 
-+--- a/kernel/kallsyms.c
-++++ b/kernel/kallsyms.c
-+@@ -77,6 +77,11 @@ static unsigned int kallsyms_expand_symb
-+ 	 * For every byte on the compressed symbol data, copy the table
-+ 	 * entry for that byte.
-+ 	 */
-++#ifdef CONFIG_KALLSYMS_UNCOMPRESSED
-++	memcpy(result, data + 1, len - 1);
-++	result += len - 1;
-++	len = 0;
-++#endif
-+ 	while (len) {
-+ 		tptr = &kallsyms_token_table[kallsyms_token_index[*data]];
-+ 		data++;
-+@@ -109,6 +114,9 @@ tail:
-+  */
-+ static char kallsyms_get_symbol_type(unsigned int off)
-+ {
-++#ifdef CONFIG_KALLSYMS_UNCOMPRESSED
-++	return kallsyms_names[off + 1];
-++#endif
-+ 	/*
-+ 	 * Get just the first code, look it up in the token table,
-+ 	 * and return the first char from this token.
-+--- a/scripts/kallsyms.c
-++++ b/scripts/kallsyms.c
-+@@ -58,6 +58,7 @@ static struct addr_range percpu_range =
-+ static struct sym_entry **table;
-+ static unsigned int table_size, table_cnt;
-+ static int all_symbols;
-++static int uncompressed;
-+ static int absolute_percpu;
-+ static int base_relative;
-+ 
-+@@ -486,6 +487,9 @@ static void write_src(void)
-+ 
-+ 	free(markers);
-+ 
-++	if (uncompressed)
-++		return;
-++
-+ 	output_label("kallsyms_token_table");
-+ 	off = 0;
-+ 	for (i = 0; i < 256; i++) {
-+@@ -537,6 +541,9 @@ static unsigned char *find_token(unsigne
-+ {
-+ 	int i;
-+ 
-++	if (uncompressed)
-++		return NULL;
-++
-+ 	for (i = 0; i < len - 1; i++) {
-+ 		if (str[i] == token[0] && str[i+1] == token[1])
-+ 			return &str[i];
-+@@ -609,6 +616,9 @@ static void optimize_result(void)
-+ {
-+ 	int i, best;
-+ 
-++	if (uncompressed)
-++		return;
-++
-+ 	/* using the '\0' symbol last allows compress_symbols to use standard
-+ 	 * fast string functions */
-+ 	for (i = 255; i >= 0; i--) {
-+@@ -773,6 +783,8 @@ int main(int argc, char **argv)
-+ 				absolute_percpu = 1;
-+ 			else if (strcmp(argv[i], "--base-relative") == 0)
-+ 				base_relative = 1;
-++			else if (strcmp(argv[i], "--uncompressed") == 0)
-++				uncompressed = 1;
-+ 			else
-+ 				usage();
-+ 		}
-+--- a/scripts/link-vmlinux.sh
-++++ b/scripts/link-vmlinux.sh
-+@@ -186,6 +186,10 @@ kallsyms()
-+ 		kallsymopt="${kallsymopt} --base-relative"
-+ 	fi
-+ 
-++	if [ -n "${CONFIG_KALLSYMS_UNCOMPRESSED}" ]; then
-++		kallsymopt="${kallsymopt} --uncompressed"
-++	fi
-++
-+ 	info KSYMS ${2}
-+ 	${NM} -n ${1} | scripts/kallsyms ${kallsymopt} > ${2}
-+ }
-diff --git a/target/linux/generic/pending-5.10/205-backtrace_module_info.patch b/target/linux/generic/pending-5.10/205-backtrace_module_info.patch
-new file mode 100644
-index 0000000000..5953214757
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/205-backtrace_module_info.patch
-@@ -0,0 +1,41 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: kernel: when KALLSYMS is disabled, print module address + size for matching backtrace entries
-+
-+[john@phrozen.org: felix will add this to his upstream queue]
-+
-+lede-commit 53827cdc824556cda910b23ce5030c363b8f1461
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ lib/vsprintf.c | 15 +++++++++++----
-+ 1 file changed, 11 insertions(+), 4 deletions(-)
-+
-+--- a/lib/vsprintf.c
-++++ b/lib/vsprintf.c
-+@@ -957,8 +957,10 @@ char *symbol_string(char *buf, char *end
-+ 		    struct printf_spec spec, const char *fmt)
-+ {
-+ 	unsigned long value;
-+-#ifdef CONFIG_KALLSYMS
-+ 	char sym[KSYM_SYMBOL_LEN];
-++#ifndef CONFIG_KALLSYMS
-++	struct module *mod;
-++	int len;
-+ #endif
-+ 
-+ 	if (fmt[1] == 'R')
-+@@ -975,8 +977,14 @@ char *symbol_string(char *buf, char *end
-+ 
-+ 	return string_nocheck(buf, end, sym, spec);
-+ #else
-+-	return special_hex_number(buf, end, value, sizeof(void *));
-++	len = snprintf(sym, sizeof(sym), "0x%lx", value);
-++	mod = __module_address(value);
-++	if (mod)
-++		snprintf(sym + len, sizeof(sym) - len, " [%s@%p+0x%x]",
-++			 mod->name, mod->core_layout.base,
-++			 mod->core_layout.size);
-+ #endif
-++	return string(buf, end, sym, spec);
-+ }
-+ 
-+ static const struct printf_spec default_str_spec = {
-diff --git a/target/linux/generic/pending-5.10/240-remove-unsane-filenames-from-deps_initramfs-list.patch b/target/linux/generic/pending-5.10/240-remove-unsane-filenames-from-deps_initramfs-list.patch
-new file mode 100644
-index 0000000000..29cfade716
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/240-remove-unsane-filenames-from-deps_initramfs-list.patch
-@@ -0,0 +1,30 @@
-+From: Gabor Juhos <juhosg@openwrt.org>
-+Subject: usr: sanitize deps_initramfs list
-+
-+If any filename in the intramfs dependency
-+list contains a colon, that causes a kernel
-+build error like this:
-+
-+/devel/openwrt/build_dir/linux-ar71xx_generic/linux-3.6.6/usr/Makefile:58: *** multiple target patterns.  Stop.
-+make[5]: *** [usr] Error 2
-+
-+Fix it by removing such filenames from the
-+deps_initramfs list.
-+
-+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ usr/Makefile | 8 +++++---
-+ 1 file changed, 5 insertions(+), 3 deletions(-)
-+
-+--- a/usr/Makefile
-++++ b/usr/Makefile
-+@@ -61,6 +61,8 @@ hostprogs := gen_init_cpio
-+ # The dependency list is generated by gen_initramfs.sh -l
-+ -include $(obj)/.initramfs_data.cpio.d
-+ 
-++deps_initramfs := $(foreach v,$(deps_initramfs),$(if $(findstring :,$(v)),,$(v)))
-++
-+ # do not try to update files included in initramfs
-+ $(deps_initramfs): ;
-+ 
-diff --git a/target/linux/generic/pending-5.10/261-enable_wilink_platform_without_drivers.patch b/target/linux/generic/pending-5.10/261-enable_wilink_platform_without_drivers.patch
-new file mode 100644
-index 0000000000..cd31f9d934
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/261-enable_wilink_platform_without_drivers.patch
-@@ -0,0 +1,20 @@
-+From: Imre Kaloz <kaloz@openwrt.org>
-+Subject: [PATCH] hack: net: wireless: make the wl12xx glue code available with
-+ compat-wireless, too
-+
-+Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
-+---
-+ drivers/net/wireless/ti/Kconfig | 2 +-
-+ 1 file changed, 1 insertion(+), 1 deletion(-)
-+
-+--- a/drivers/net/wireless/ti/Kconfig
-++++ b/drivers/net/wireless/ti/Kconfig
-+@@ -20,7 +20,7 @@ source "drivers/net/wireless/ti/wlcore/K
-+ 
-+ config WILINK_PLATFORM_DATA
-+ 	bool "TI WiLink platform data"
-+-	depends on WLCORE_SDIO || WL1251_SDIO
-++	depends on WLCORE_SDIO || WL1251_SDIO || ARCH_OMAP2PLUS
-+ 	default y
-+ 	help
-+ 	Small platform data bit needed to pass data to the sdio modules.
-diff --git a/target/linux/generic/pending-5.10/270-platform-mikrotik-build-bits.patch b/target/linux/generic/pending-5.10/270-platform-mikrotik-build-bits.patch
-new file mode 100644
-index 0000000000..df738ef97b
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/270-platform-mikrotik-build-bits.patch
-@@ -0,0 +1,31 @@
-+From c2deb5ef01a0ef09088832744cbace9e239a6ee0 Mon Sep 17 00:00:00 2001
-+From: =?UTF-8?q?Thibaut=20VAR=C3=88NE?= <hacks@slashdirt.org>
-+Date: Sat, 28 Mar 2020 12:11:50 +0100
-+Subject: [PATCH] generic: platform/mikrotik build bits (5.4)
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+This patch adds platform/mikrotik kernel build bits
-+
-+Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
-+---
-+ drivers/platform/Kconfig  | 2 ++
-+ drivers/platform/Makefile | 1 +
-+ 2 files changed, 3 insertions(+)
-+
-+--- a/drivers/platform/Kconfig
-++++ b/drivers/platform/Kconfig
-+@@ -13,3 +13,5 @@ source "drivers/platform/chrome/Kconfig"
-+ source "drivers/platform/mellanox/Kconfig"
-+ 
-+ source "drivers/platform/olpc/Kconfig"
-++
-++source "drivers/platform/mikrotik/Kconfig"
-+--- a/drivers/platform/Makefile
-++++ b/drivers/platform/Makefile
-+@@ -9,3 +9,4 @@ obj-$(CONFIG_MIPS)		+= mips/
-+ obj-$(CONFIG_OLPC_EC)		+= olpc/
-+ obj-$(CONFIG_GOLDFISH)		+= goldfish/
-+ obj-$(CONFIG_CHROME_PLATFORMS)	+= chrome/
-++obj-$(CONFIG_MIKROTIK)		+= mikrotik/
-diff --git a/target/linux/generic/pending-5.10/300-mips_expose_boot_raw.patch b/target/linux/generic/pending-5.10/300-mips_expose_boot_raw.patch
-new file mode 100644
-index 0000000000..a454733e66
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/300-mips_expose_boot_raw.patch
-@@ -0,0 +1,40 @@
-+From: Mark Miller <mark@mirell.org>
-+Subject: mips: expose CONFIG_BOOT_RAW
-+
-+This exposes the CONFIG_BOOT_RAW symbol in Kconfig. This is needed on
-+certain Broadcom chipsets running CFE in order to load the kernel.
-+
-+Signed-off-by: Mark Miller <mark@mirell.org>
-+Acked-by: Rob Landley <rob@landley.net>
-+---
-+--- a/arch/mips/Kconfig
-++++ b/arch/mips/Kconfig
-+@@ -1077,9 +1077,6 @@ config FW_ARC
-+ config ARCH_MAY_HAVE_PC_FDC
-+ 	bool
-+ 
-+-config BOOT_RAW
-+-	bool
-+-
-+ config CEVT_BCM1480
-+ 	bool
-+ 
-+@@ -3169,6 +3166,18 @@ choice
-+ 		bool "Extend builtin kernel arguments with bootloader arguments"
-+ endchoice
-+ 
-++config BOOT_RAW
-++	bool "Enable the kernel to be executed from the load address"
-++	default n
-++	help
-++	 Allow the kernel to be executed from the load address for
-++	 bootloaders which cannot read the ELF format. This places
-++	 a jump to start_kernel at the load address.
-++
-++	 If unsure, say N.
-++
-++
-++
-+ endmenu
-+ 
-+ config LOCKDEP_SUPPORT
-diff --git a/target/linux/generic/pending-5.10/302-mips_no_branch_likely.patch b/target/linux/generic/pending-5.10/302-mips_no_branch_likely.patch
-new file mode 100644
-index 0000000000..271923fca8
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/302-mips_no_branch_likely.patch
-@@ -0,0 +1,22 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: mips: use -mno-branch-likely for kernel and userspace
-+
-+saves ~11k kernel size after lzma and ~12k squashfs size in the
-+
-+lede-commit: 41a039f46450ffae9483d6216422098669da2900
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ arch/mips/Makefile | 2 +-
-+ 1 file changed, 1 insertion(+), 1 deletion(-)
-+
-+--- a/arch/mips/Makefile
-++++ b/arch/mips/Makefile
-+@@ -95,7 +95,7 @@ all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlin
-+ # machines may also.  Since BFD is incredibly buggy with respect to
-+ # crossformat linking we rely on the elf2ecoff tool for format conversion.
-+ #
-+-cflags-y			+= -G 0 -mno-abicalls -fno-pic -pipe
-++cflags-y			+= -G 0 -mno-abicalls -fno-pic -pipe -mno-branch-likely
-+ cflags-y			+= -msoft-float
-+ LDFLAGS_vmlinux			+= -G 0 -static -n -nostdlib
-+ KBUILD_AFLAGS_MODULE		+= -mlong-calls
-diff --git a/target/linux/generic/pending-5.10/305-mips_module_reloc.patch b/target/linux/generic/pending-5.10/305-mips_module_reloc.patch
-new file mode 100644
-index 0000000000..839ba24293
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/305-mips_module_reloc.patch
-@@ -0,0 +1,371 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: mips: replace -mlong-calls with -mno-long-calls to make function calls faster in kernel modules to achieve this, try to
-+
-+lede-commit: 3b3d64743ba2a874df9d70cd19e242205b0a788c
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ arch/mips/Makefile             |   5 +
-+ arch/mips/include/asm/module.h |   5 +
-+ arch/mips/kernel/module.c      | 279 ++++++++++++++++++++++++++++++++++++++++-
-+ 3 files changed, 284 insertions(+), 5 deletions(-)
-+
-+--- a/arch/mips/Makefile
-++++ b/arch/mips/Makefile
-+@@ -98,8 +98,18 @@ all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlin
-+ cflags-y			+= -G 0 -mno-abicalls -fno-pic -pipe -mno-branch-likely
-+ cflags-y			+= -msoft-float
-+ LDFLAGS_vmlinux			+= -G 0 -static -n -nostdlib
-++ifdef CONFIG_64BIT
-+ KBUILD_AFLAGS_MODULE		+= -mlong-calls
-+ KBUILD_CFLAGS_MODULE		+= -mlong-calls
-++else
-++  ifdef CONFIG_DYNAMIC_FTRACE
-++    KBUILD_AFLAGS_MODULE	+= -mlong-calls
-++    KBUILD_CFLAGS_MODULE	+= -mlong-calls
-++  else
-++    KBUILD_AFLAGS_MODULE	+= -mno-long-calls
-++    KBUILD_CFLAGS_MODULE	+= -mno-long-calls
-++  endif
-++endif
-+ 
-+ ifeq ($(CONFIG_RELOCATABLE),y)
-+ LDFLAGS_vmlinux			+= --emit-relocs
-+--- a/arch/mips/include/asm/module.h
-++++ b/arch/mips/include/asm/module.h
-+@@ -12,6 +12,11 @@ struct mod_arch_specific {
-+ 	const struct exception_table_entry *dbe_start;
-+ 	const struct exception_table_entry *dbe_end;
-+ 	struct mips_hi16 *r_mips_hi16_list;
-++
-++	void *phys_plt_tbl;
-++	void *virt_plt_tbl;
-++	unsigned int phys_plt_offset;
-++	unsigned int virt_plt_offset;
-+ };
-+ 
-+ typedef uint8_t Elf64_Byte;		/* Type for a 8-bit quantity.  */
-+--- a/arch/mips/kernel/module.c
-++++ b/arch/mips/kernel/module.c
-+@@ -31,14 +31,221 @@ struct mips_hi16 {
-+ static LIST_HEAD(dbe_list);
-+ static DEFINE_SPINLOCK(dbe_lock);
-+ 
-+-#ifdef MODULE_START
-++/*
-++ * Get the potential max trampolines size required of the init and
-++ * non-init sections. Only used if we cannot find enough contiguous
-++ * physically mapped memory to put the module into.
-++ */
-++static unsigned int
-++get_plt_size(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
-++             const char *secstrings, unsigned int symindex, bool is_init)
-++{
-++	unsigned long ret = 0;
-++	unsigned int i, j;
-++	Elf_Sym *syms;
-++
-++	/* Everything marked ALLOC (this includes the exported symbols) */
-++	for (i = 1; i < hdr->e_shnum; ++i) {
-++		unsigned int info = sechdrs[i].sh_info;
-++
-++		if (sechdrs[i].sh_type != SHT_REL
-++		    && sechdrs[i].sh_type != SHT_RELA)
-++			continue;
-++
-++		/* Not a valid relocation section? */
-++		if (info >= hdr->e_shnum)
-++			continue;
-++
-++		/* Don't bother with non-allocated sections */
-++		if (!(sechdrs[info].sh_flags & SHF_ALLOC))
-++			continue;
-++
-++		/* If it's called *.init*, and we're not init, we're
-++                   not interested */
-++		if ((strstr(secstrings + sechdrs[i].sh_name, ".init") != 0)
-++		    != is_init)
-++			continue;
-++
-++		syms = (Elf_Sym *) sechdrs[symindex].sh_addr;
-++		if (sechdrs[i].sh_type == SHT_REL) {
-++			Elf_Mips_Rel *rel = (void *) sechdrs[i].sh_addr;
-++			unsigned int size = sechdrs[i].sh_size / sizeof(*rel);
-++
-++			for (j = 0; j < size; ++j) {
-++				Elf_Sym *sym;
-++
-++				if (ELF_MIPS_R_TYPE(rel[j]) != R_MIPS_26)
-++					continue;
-++
-++				sym = syms + ELF_MIPS_R_SYM(rel[j]);
-++				if (!is_init && sym->st_shndx != SHN_UNDEF)
-++					continue;
-++
-++				ret += 4 * sizeof(int);
-++			}
-++		} else {
-++			Elf_Mips_Rela *rela = (void *) sechdrs[i].sh_addr;
-++			unsigned int size = sechdrs[i].sh_size / sizeof(*rela);
-++
-++			for (j = 0; j < size; ++j) {
-++				Elf_Sym *sym;
-++
-++				if (ELF_MIPS_R_TYPE(rela[j]) != R_MIPS_26)
-++					continue;
-++
-++				sym = syms + ELF_MIPS_R_SYM(rela[j]);
-++				if (!is_init && sym->st_shndx != SHN_UNDEF)
-++					continue;
-++
-++				ret += 4 * sizeof(int);
-++			}
-++		}
-++	}
-++
-++	return ret;
-++}
-++
-++#ifndef MODULE_START
-++static void *alloc_phys(unsigned long size)
-++{
-++	unsigned order;
-++	struct page *page;
-++	struct page *p;
-++
-++	size = PAGE_ALIGN(size);
-++	order = get_order(size);
-++
-++	page = alloc_pages(GFP_KERNEL | __GFP_NORETRY | __GFP_NOWARN |
-++			__GFP_THISNODE, order);
-++	if (!page)
-++		return NULL;
-++
-++	split_page(page, order);
-++
-++	/* mark all pages except for the last one */
-++	for (p = page; p + 1 < page + (size >> PAGE_SHIFT); ++p)
-++		set_bit(PG_owner_priv_1, &p->flags);
-++
-++	for (p = page + (size >> PAGE_SHIFT); p < page + (1 << order); ++p)
-++		__free_page(p);
-++
-++	return page_address(page);
-++}
-++#endif
-++
-++static void free_phys(void *ptr)
-++{
-++	struct page *page;
-++	bool free;
-++
-++	page = virt_to_page(ptr);
-++	do {
-++		free = test_and_clear_bit(PG_owner_priv_1, &page->flags);
-++		__free_page(page);
-++		page++;
-++	} while (free);
-++}
-++
-++
-+ void *module_alloc(unsigned long size)
-+ {
-++#ifdef MODULE_START
-+ 	return __vmalloc_node_range(size, 1, MODULE_START, MODULE_END,
-+ 				GFP_KERNEL, PAGE_KERNEL, 0, NUMA_NO_NODE,
-+ 				__builtin_return_address(0));
-++#else
-++	void *ptr;
-++
-++	if (size == 0)
-++		return NULL;
-++
-++	ptr = alloc_phys(size);
-++
-++	/* If we failed to allocate physically contiguous memory,
-++	 * fall back to regular vmalloc. The module loader code will
-++	 * create jump tables to handle long jumps */
-++	if (!ptr)
-++		return vmalloc(size);
-++
-++	return ptr;
-++#endif
-+ }
-++
-++static inline bool is_phys_addr(void *ptr)
-++{
-++#ifdef CONFIG_64BIT
-++	return (KSEGX((unsigned long)ptr) == CKSEG0);
-++#else
-++	return (KSEGX(ptr) == KSEG0);
-+ #endif
-++}
-++
-++/* Free memory returned from module_alloc */
-++void module_memfree(void *module_region)
-++{
-++	if (is_phys_addr(module_region))
-++		free_phys(module_region);
-++	else
-++		vfree(module_region);
-++}
-++
-++static void *__module_alloc(int size, bool phys)
-++{
-++	void *ptr;
-++
-++	if (phys)
-++		ptr = kmalloc(size, GFP_KERNEL);
-++	else
-++		ptr = vmalloc(size);
-++	return ptr;
-++}
-++
-++static void __module_free(void *ptr)
-++{
-++	if (is_phys_addr(ptr))
-++		kfree(ptr);
-++	else
-++		vfree(ptr);
-++}
-++
-++int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs,
-++			      char *secstrings, struct module *mod)
-++{
-++	unsigned int symindex = 0;
-++	unsigned int core_size, init_size;
-++	int i;
-++
-++	mod->arch.phys_plt_offset = 0;
-++	mod->arch.virt_plt_offset = 0;
-++	mod->arch.phys_plt_tbl = NULL;
-++	mod->arch.virt_plt_tbl = NULL;
-++
-++	if (IS_ENABLED(CONFIG_64BIT))
-++		return 0;
-++
-++	for (i = 1; i < hdr->e_shnum; i++)
-++		if (sechdrs[i].sh_type == SHT_SYMTAB)
-++			symindex = i;
-++
-++	core_size = get_plt_size(hdr, sechdrs, secstrings, symindex, false);
-++	init_size = get_plt_size(hdr, sechdrs, secstrings, symindex, true);
-++
-++	if ((core_size + init_size) == 0)
-++		return 0;
-++
-++	mod->arch.phys_plt_tbl = __module_alloc(core_size + init_size, 1);
-++	if (!mod->arch.phys_plt_tbl)
-++		return -ENOMEM;
-++
-++	mod->arch.virt_plt_tbl = __module_alloc(core_size + init_size, 0);
-++	if (!mod->arch.virt_plt_tbl) {
-++		__module_free(mod->arch.phys_plt_tbl);
-++		mod->arch.phys_plt_tbl = NULL;
-++		return -ENOMEM;
-++	}
-++
-++	return 0;
-++}
-+ 
-+ static int apply_r_mips_none(struct module *me, u32 *location,
-+ 			     u32 base, Elf_Addr v, bool rela)
-+@@ -54,9 +261,40 @@ static int apply_r_mips_32(struct module
-+ 	return 0;
-+ }
-+ 
-++static Elf_Addr add_plt_entry_to(unsigned *plt_offset,
-++				 void *start, Elf_Addr v)
-++{
-++	unsigned *tramp = start + *plt_offset;
-++	*plt_offset += 4 * sizeof(int);
-++
-++	/* adjust carry for addiu */
-++	if (v & 0x00008000)
-++		v += 0x10000;
-++
-++	tramp[0] = 0x3c190000 | (v >> 16);      /* lui t9, hi16 */
-++	tramp[1] = 0x27390000 | (v & 0xffff);   /* addiu t9, t9, lo16 */
-++	tramp[2] = 0x03200008;                  /* jr t9 */
-++	tramp[3] = 0x00000000;                  /* nop */
-++
-++	return (Elf_Addr) tramp;
-++}
-++
-++static Elf_Addr add_plt_entry(struct module *me, void *location, Elf_Addr v)
-++{
-++	if (is_phys_addr(location))
-++		return add_plt_entry_to(&me->arch.phys_plt_offset,
-++				me->arch.phys_plt_tbl, v);
-++	else
-++		return add_plt_entry_to(&me->arch.virt_plt_offset,
-++				me->arch.virt_plt_tbl, v);
-++
-++}
-++
-+ static int apply_r_mips_26(struct module *me, u32 *location,
-+ 			   u32 base, Elf_Addr v, bool rela)
-+ {
-++	u32 ofs = base & 0x03ffffff;
-++
-+ 	if (v % 4) {
-+ 		pr_err("module %s: dangerous R_MIPS_26 relocation\n",
-+ 		       me->name);
-+@@ -64,13 +302,17 @@ static int apply_r_mips_26(struct module
-+ 	}
-+ 
-+ 	if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) {
-+-		pr_err("module %s: relocation overflow\n",
-+-		       me->name);
-+-		return -ENOEXEC;
-++		v = add_plt_entry(me, location, v + (ofs << 2));
-++		if (!v) {
-++			pr_err("module %s: relocation overflow\n",
-++			       me->name);
-++			return -ENOEXEC;
-++		}
-++		ofs = 0;
-+ 	}
-+ 
-+ 	*location = (*location & ~0x03ffffff) |
-+-		    ((base + (v >> 2)) & 0x03ffffff);
-++		    ((ofs + (v >> 2)) & 0x03ffffff);
-+ 
-+ 	return 0;
-+ }
-+@@ -446,9 +688,36 @@ int module_finalize(const Elf_Ehdr *hdr,
-+ 		list_add(&me->arch.dbe_list, &dbe_list);
-+ 		spin_unlock_irq(&dbe_lock);
-+ 	}
-++
-++	/* Get rid of the fixup trampoline if we're running the module
-++	 * from physically mapped address space */
-++	if (me->arch.phys_plt_offset == 0) {
-++		__module_free(me->arch.phys_plt_tbl);
-++		me->arch.phys_plt_tbl = NULL;
-++	}
-++	if (me->arch.virt_plt_offset == 0) {
-++		__module_free(me->arch.virt_plt_tbl);
-++		me->arch.virt_plt_tbl = NULL;
-++	}
-++
-+ 	return 0;
-+ }
-+ 
-++void module_arch_freeing_init(struct module *mod)
-++{
-++	if (mod->state == MODULE_STATE_LIVE)
-++		return;
-++
-++	if (mod->arch.phys_plt_tbl) {
-++		__module_free(mod->arch.phys_plt_tbl);
-++		mod->arch.phys_plt_tbl = NULL;
-++	}
-++	if (mod->arch.virt_plt_tbl) {
-++		__module_free(mod->arch.virt_plt_tbl);
-++		mod->arch.virt_plt_tbl = NULL;
-++	}
-++}
-++
-+ void module_arch_cleanup(struct module *mod)
-+ {
-+ 	spin_lock_irq(&dbe_lock);
-diff --git a/target/linux/generic/pending-5.10/307-mips_highmem_offset.patch b/target/linux/generic/pending-5.10/307-mips_highmem_offset.patch
-new file mode 100644
-index 0000000000..e1ada22f34
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/307-mips_highmem_offset.patch
-@@ -0,0 +1,19 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: kernel: adjust mips highmem offset to avoid the need for -mlong-calls on systems with >256M RAM
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ arch/mips/include/asm/mach-generic/spaces.h | 2 +-
-+ 1 file changed, 1 insertion(+), 1 deletion(-)
-+
-+--- a/arch/mips/include/asm/mach-generic/spaces.h
-++++ b/arch/mips/include/asm/mach-generic/spaces.h
-+@@ -54,7 +54,7 @@
-+  * Memory above this physical address will be considered highmem.
-+  */
-+ #ifndef HIGHMEM_START
-+-#define HIGHMEM_START		_AC(0x20000000, UL)
-++#define HIGHMEM_START		_AC(0x10000000, UL)
-+ #endif
-+ 
-+ #endif /* CONFIG_32BIT */
-diff --git a/target/linux/generic/pending-5.10/308-mips32r2_tune.patch b/target/linux/generic/pending-5.10/308-mips32r2_tune.patch
-new file mode 100644
-index 0000000000..bbea947382
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/308-mips32r2_tune.patch
-@@ -0,0 +1,22 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: kernel: add -mtune=34kc to MIPS CFLAGS when building for mips32r2
-+
-+This provides a good tradeoff across at least 24Kc-74Kc, while also
-+producing smaller code.
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ arch/mips/Makefile | 2 +-
-+ 1 file changed, 1 insertion(+), 1 deletion(-)
-+
-+--- a/arch/mips/Makefile
-++++ b/arch/mips/Makefile
-+@@ -174,7 +174,7 @@ cflags-$(CONFIG_CPU_VR41XX)	+= -march=r4
-+ cflags-$(CONFIG_CPU_R4X00)	+= -march=r4600 -Wa,--trap
-+ cflags-$(CONFIG_CPU_TX49XX)	+= -march=r4600 -Wa,--trap
-+ cflags-$(CONFIG_CPU_MIPS32_R1)	+= -march=mips32 -Wa,--trap
-+-cflags-$(CONFIG_CPU_MIPS32_R2)	+= -march=mips32r2 -Wa,--trap
-++cflags-$(CONFIG_CPU_MIPS32_R2)	+= -march=mips32r2 -mtune=34kc -Wa,--trap
-+ cflags-$(CONFIG_CPU_MIPS32_R5)	+= -march=mips32r5 -Wa,--trap -modd-spreg
-+ cflags-$(CONFIG_CPU_MIPS32_R6)	+= -march=mips32r6 -Wa,--trap -modd-spreg
-+ cflags-$(CONFIG_CPU_MIPS64_R1)	+= -march=mips64 -Wa,--trap
-diff --git a/target/linux/generic/pending-5.10/309-MIPS-Add-CPU-option-reporting-to-proc-cpuinfo.patch b/target/linux/generic/pending-5.10/309-MIPS-Add-CPU-option-reporting-to-proc-cpuinfo.patch
-new file mode 100644
-index 0000000000..794f027f18
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/309-MIPS-Add-CPU-option-reporting-to-proc-cpuinfo.patch
-@@ -0,0 +1,140 @@
-+From 87ec87c2ad615c1a177cd08ef5fa29fc739f6e50 Mon Sep 17 00:00:00 2001
-+From: Hauke Mehrtens <hauke@hauke-m.de>
-+Date: Sun, 23 Dec 2018 18:06:53 +0100
-+Subject: [PATCH] MIPS: Add CPU option reporting to /proc/cpuinfo
-+
-+Many MIPS CPUs have optional CPU features which are not activates for
-+all CPU cores. Print the CPU options which are implemented in the core
-+in /proc/cpuinfo. This makes it possible to see what features are
-+supported and which are not supported. This should cover all standard
-+MIPS extensions, before it only printed information about the main MIPS
-+ASEs.
-+
-+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-+---
-+ arch/mips/kernel/proc.c | 116 ++++++++++++++++++++++++++++++++++++++++
-+ 1 file changed, 116 insertions(+)
-+
-+--- a/arch/mips/kernel/proc.c
-++++ b/arch/mips/kernel/proc.c
-+@@ -138,6 +138,120 @@ static int show_cpuinfo(struct seq_file
-+ 		seq_printf(m, "micromips kernel\t: %s\n",
-+ 		      (read_c0_config3() & MIPS_CONF3_ISA_OE) ?  "yes" : "no");
-+ 	}
-++
-++	seq_printf(m, "Options implemented\t:");
-++	if (cpu_has_tlb)
-++		seq_printf(m, "%s", " tlb");
-++	if (cpu_has_ftlb)
-++		seq_printf(m, "%s", " ftlb");
-++	if (cpu_has_tlbinv)
-++		seq_printf(m, "%s", " tlbinv");
-++	if (cpu_has_segments)
-++		seq_printf(m, "%s", " segments");
-++	if (cpu_has_rixiex)
-++		seq_printf(m, "%s", " rixiex");
-++	if (cpu_has_ldpte)
-++		seq_printf(m, "%s", " ldpte");
-++	if (cpu_has_maar)
-++		seq_printf(m, "%s", " maar");
-++	if (cpu_has_rw_llb)
-++		seq_printf(m, "%s", " rw_llb");
-++	if (cpu_has_4kex)
-++		seq_printf(m, "%s", " 4kex");
-++	if (cpu_has_3k_cache)
-++		seq_printf(m, "%s", " 3k_cache");
-++	if (cpu_has_4k_cache)
-++		seq_printf(m, "%s", " 4k_cache");
-++	if (cpu_has_6k_cache)
-++		seq_printf(m, "%s", " 6k_cache");
-++	if (cpu_has_8k_cache)
-++		seq_printf(m, "%s", " 8k_cache");
-++	if (cpu_has_tx39_cache)
-++		seq_printf(m, "%s", " tx39_cache");
-++	if (cpu_has_octeon_cache)
-++		seq_printf(m, "%s", " octeon_cache");
-++	if (cpu_has_fpu)
-++		seq_printf(m, "%s", " fpu");
-++	if (cpu_has_32fpr)
-++		seq_printf(m, "%s", " 32fpr");
-++	if (cpu_has_cache_cdex_p)
-++		seq_printf(m, "%s", " cache_cdex_p");
-++	if (cpu_has_cache_cdex_s)
-++		seq_printf(m, "%s", " cache_cdex_s");
-++	if (cpu_has_prefetch)
-++		seq_printf(m, "%s", " prefetch");
-++	if (cpu_has_mcheck)
-++		seq_printf(m, "%s", " mcheck");
-++	if (cpu_has_ejtag)
-++		seq_printf(m, "%s", " ejtag");
-++	if (cpu_has_llsc)
-++		seq_printf(m, "%s", " llsc");
-++	if (cpu_has_guestctl0ext)
-++		seq_printf(m, "%s", " guestctl0ext");
-++	if (cpu_has_guestctl1)
-++		seq_printf(m, "%s", " guestctl1");
-++	if (cpu_has_guestctl2)
-++		seq_printf(m, "%s", " guestctl2");
-++	if (cpu_has_guestid)
-++		seq_printf(m, "%s", " guestid");
-++	if (cpu_has_drg)
-++		seq_printf(m, "%s", " drg");
-++	if (cpu_has_rixi)
-++		seq_printf(m, "%s", " rixi");
-++	if (cpu_has_lpa)
-++		seq_printf(m, "%s", " lpa");
-++	if (cpu_has_mvh)
-++		seq_printf(m, "%s", " mvh");
-++	if (cpu_has_vtag_icache)
-++		seq_printf(m, "%s", " vtag_icache");
-++	if (cpu_has_dc_aliases)
-++		seq_printf(m, "%s", " dc_aliases");
-++	if (cpu_has_ic_fills_f_dc)
-++		seq_printf(m, "%s", " ic_fills_f_dc");
-++	if (cpu_has_pindexed_dcache)
-++		seq_printf(m, "%s", " pindexed_dcache");
-++	if (cpu_has_userlocal)
-++		seq_printf(m, "%s", " userlocal");
-++	if (cpu_has_nofpuex)
-++		seq_printf(m, "%s", " nofpuex");
-++	if (cpu_has_vint)
-++		seq_printf(m, "%s", " vint");
-++	if (cpu_has_veic)
-++		seq_printf(m, "%s", " veic");
-++	if (cpu_has_inclusive_pcaches)
-++		seq_printf(m, "%s", " inclusive_pcaches");
-++	if (cpu_has_perf_cntr_intr_bit)
-++		seq_printf(m, "%s", " perf_cntr_intr_bit");
-++	if (cpu_has_ufr)
-++		seq_printf(m, "%s", " ufr");
-++	if (cpu_has_fre)
-++		seq_printf(m, "%s", " fre");
-++	if (cpu_has_cdmm)
-++		seq_printf(m, "%s", " cdmm");
-++	if (cpu_has_small_pages)
-++		seq_printf(m, "%s", " small_pages");
-++	if (cpu_has_nan_legacy)
-++		seq_printf(m, "%s", " nan_legacy");
-++	if (cpu_has_nan_2008)
-++		seq_printf(m, "%s", " nan_2008");
-++	if (cpu_has_ebase_wg)
-++		seq_printf(m, "%s", " ebase_wg");
-++	if (cpu_has_badinstr)
-++		seq_printf(m, "%s", " badinstr");
-++	if (cpu_has_badinstrp)
-++		seq_printf(m, "%s", " badinstrp");
-++	if (cpu_has_contextconfig)
-++		seq_printf(m, "%s", " contextconfig");
-++	if (cpu_has_perf)
-++		seq_printf(m, "%s", " perf");
-++	if (cpu_has_shared_ftlb_ram)
-++		seq_printf(m, "%s", " shared_ftlb_ram");
-++	if (cpu_has_shared_ftlb_entries)
-++		seq_printf(m, "%s", " shared_ftlb_entries");
-++	if (cpu_has_mipsmt_pertccounters)
-++		seq_printf(m, "%s", " mipsmt_pertccounters");
-++	seq_printf(m, "\n");
-++
-+ 	seq_printf(m, "shadow register sets\t: %d\n",
-+ 		      cpu_data[n].srsets);
-+ 	seq_printf(m, "kscratch registers\t: %d\n",
-diff --git a/target/linux/generic/pending-5.10/310-arm_module_unresolved_weak_sym.patch b/target/linux/generic/pending-5.10/310-arm_module_unresolved_weak_sym.patch
-new file mode 100644
-index 0000000000..191dc6ac3c
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/310-arm_module_unresolved_weak_sym.patch
-@@ -0,0 +1,22 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: fix errors in unresolved weak symbols on arm
-+
-+lede-commit: 570699d4838a907c3ef9f2819bf19eb72997b32f
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ arch/arm/kernel/module.c | 4 ++++
-+ 1 file changed, 4 insertions(+)
-+
-+--- a/arch/arm/kernel/module.c
-++++ b/arch/arm/kernel/module.c
-+@@ -105,6 +105,10 @@ apply_relocate(Elf32_Shdr *sechdrs, cons
-+ 			return -ENOEXEC;
-+ 		}
-+ 
-++		if ((IS_ERR_VALUE(sym->st_value) || !sym->st_value) &&
-++		    ELF_ST_BIND(sym->st_info) == STB_WEAK)
-++			continue;
-++
-+ 		loc = dstsec->sh_addr + rel->r_offset;
-+ 
-+ 		switch (ELF32_R_TYPE(rel->r_info)) {
-diff --git a/target/linux/generic/pending-5.10/311-MIPS-zboot-put-appended-dtb-into-a-section.patch b/target/linux/generic/pending-5.10/311-MIPS-zboot-put-appended-dtb-into-a-section.patch
-new file mode 100644
-index 0000000000..3f8808f702
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/311-MIPS-zboot-put-appended-dtb-into-a-section.patch
-@@ -0,0 +1,36 @@
-+From 7d1531c81c0fb4c93bea8dc316043ad0e4d0c270 Mon Sep 17 00:00:00 2001
-+From: Chuanhong Guo <gch981213@gmail.com>
-+Date: Sun, 25 Oct 2020 23:19:40 +0800
-+Subject: [PATCH] MIPS: zboot: put appended dtb into a section
-+
-+This will make a separated section for dtb appear in ELF, and we can
-+then use objcopy to patch a dtb into vmlinuz when RAW_APPENDED_DTB
-+is set in kernel config.
-+
-+command to patch a dtb:
-+objcopy --set-section-flags=.appended_dtb=alloc,contents \
-+        --update-section=.appended_dtb=<target>.dtb vmlinuz vmlinuz-dtb
-+
-+Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
-+---
-+ arch/mips/boot/compressed/ld.script | 9 ++++++---
-+ 1 file changed, 6 insertions(+), 3 deletions(-)
-+
-+--- a/arch/mips/boot/compressed/ld.script
-++++ b/arch/mips/boot/compressed/ld.script
-+@@ -31,9 +31,12 @@ SECTIONS
-+ 		CONSTRUCTORS
-+ 		. = ALIGN(16);
-+ 	}
-+-	__appended_dtb = .;
-+-	/* leave space for appended DTB */
-+-	. += 0x100000;
-++
-++	.appended_dtb : {
-++		__appended_dtb = .;
-++		/* leave space for appended DTB */
-++		. += 0x100000;
-++	}
-+ 
-+ 	_edata = .;
-+ 	/* End of data section */
-diff --git a/target/linux/generic/pending-5.10/330-MIPS-kexec-Accept-command-line-parameters-from-users.patch b/target/linux/generic/pending-5.10/330-MIPS-kexec-Accept-command-line-parameters-from-users.patch
-new file mode 100644
-index 0000000000..2808c95322
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/330-MIPS-kexec-Accept-command-line-parameters-from-users.patch
-@@ -0,0 +1,281 @@
-+From: Yousong Zhou <yszhou4tech@gmail.com>
-+Subject: MIPS: kexec: Accept command line parameters from userspace.
-+
-+Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com>
-+---
-+ arch/mips/kernel/machine_kexec.c   |  153 +++++++++++++++++++++++++++++++-----
-+ arch/mips/kernel/machine_kexec.h   |   20 +++++
-+ arch/mips/kernel/relocate_kernel.S |   21 +++--
-+ 3 files changed, 167 insertions(+), 27 deletions(-)
-+ create mode 100644 arch/mips/kernel/machine_kexec.h
-+
-+--- a/arch/mips/kernel/machine_kexec.c
-++++ b/arch/mips/kernel/machine_kexec.c
-+@@ -9,14 +9,11 @@
-+ #include <linux/delay.h>
-+ #include <linux/libfdt.h>
-+ 
-++#include <asm/bootinfo.h>
-+ #include <asm/cacheflush.h>
-+ #include <asm/page.h>
-+-
-+-extern const unsigned char relocate_new_kernel[];
-+-extern const size_t relocate_new_kernel_size;
-+-
-+-extern unsigned long kexec_start_address;
-+-extern unsigned long kexec_indirection_page;
-++#include <linux/uaccess.h>
-++#include "machine_kexec.h"
-+ 
-+ static unsigned long reboot_code_buffer;
-+ 
-+@@ -30,6 +27,101 @@ void (*_crash_smp_send_stop)(void) = NUL
-+ void (*_machine_kexec_shutdown)(void) = NULL;
-+ void (*_machine_crash_shutdown)(struct pt_regs *regs) = NULL;
-+ 
-++static void machine_kexec_print_args(void)
-++{
-++	unsigned long argc = (int)kexec_args[0];
-++	int i;
-++
-++	pr_info("kexec_args[0] (argc): %lu\n", argc);
-++	pr_info("kexec_args[1] (argv): %p\n", (void *)kexec_args[1]);
-++	pr_info("kexec_args[2] (env ): %p\n", (void *)kexec_args[2]);
-++	pr_info("kexec_args[3] (desc): %p\n", (void *)kexec_args[3]);
-++
-++	for (i = 0; i < argc; i++) {
-++		pr_info("kexec_argv[%d] = %p, %s\n",
-++				i, kexec_argv[i], kexec_argv[i]);
-++	}
-++}
-++
-++static void machine_kexec_init_argv(struct kimage *image)
-++{
-++	void __user *buf = NULL;
-++	size_t bufsz;
-++	size_t size;
-++	int i;
-++
-++	bufsz = 0;
-++	for (i = 0; i < image->nr_segments; i++) {
-++		struct kexec_segment *seg;
-++
-++		seg = &image->segment[i];
-++		if (seg->bufsz < 6)
-++			continue;
-++
-++		if (strncmp((char *) seg->buf, "kexec ", 6))
-++			continue;
-++
-++		buf = seg->buf;
-++		bufsz = seg->bufsz;
-++		break;
-++	}
-++
-++	if (!buf)
-++		return;
-++
-++	size = KEXEC_COMMAND_LINE_SIZE;
-++	size = min(size, bufsz);
-++	if (size < bufsz)
-++		pr_warn("kexec command line truncated to %zd bytes\n", size);
-++
-++	/* Copy to kernel space */
-++	if (copy_from_user(kexec_argv_buf, buf, size))
-++		pr_warn("kexec command line copy to kernel space failed\n");
-++
-++	kexec_argv_buf[size - 1] = 0;
-++}
-++
-++static void machine_kexec_parse_argv(struct kimage *image)
-++{
-++	char *reboot_code_buffer;
-++	int reloc_delta;
-++	char *ptr;
-++	int argc;
-++	int i;
-++
-++	ptr = kexec_argv_buf;
-++	argc = 0;
-++
-++	/*
-++	 * convert command line string to array of parameters
-++	 * (as bootloader does).
-++	 */
-++	while (ptr && *ptr && (KEXEC_MAX_ARGC > argc)) {
-++		if (*ptr == ' ') {
-++			*ptr++ = '\0';
-++			continue;
-++		}
-++
-++		kexec_argv[argc++] = ptr;
-++		ptr = strchr(ptr, ' ');
-++	}
-++
-++	if (!argc)
-++		return;
-++
-++	kexec_args[0] = argc;
-++	kexec_args[1] = (unsigned long)kexec_argv;
-++	kexec_args[2] = 0;
-++	kexec_args[3] = 0;
-++
-++	reboot_code_buffer = page_address(image->control_code_page);
-++	reloc_delta = reboot_code_buffer - (char *)kexec_relocate_new_kernel;
-++
-++	kexec_args[1] += reloc_delta;
-++	for (i = 0; i < argc; i++)
-++		kexec_argv[i] += reloc_delta;
-++}
-++
-+ static void kexec_image_info(const struct kimage *kimage)
-+ {
-+ 	unsigned long i;
-+@@ -99,6 +191,18 @@ machine_kexec_prepare(struct kimage *kim
-+ #endif
-+ 
-+ 	kexec_image_info(kimage);
-++	/*
-++	 * Whenever arguments passed from kexec-tools, Init the arguments as
-++	 * the original ones to try avoiding booting failure.
-++	 */
-++
-++	kexec_args[0] = fw_arg0;
-++	kexec_args[1] = fw_arg1;
-++	kexec_args[2] = fw_arg2;
-++	kexec_args[3] = fw_arg3;
-++
-++	machine_kexec_init_argv(kimage);
-++	machine_kexec_parse_argv(kimage);
-+ 
-+ 	if (_machine_kexec_prepare)
-+ 		return _machine_kexec_prepare(kimage);
-+@@ -161,7 +265,7 @@ machine_crash_shutdown(struct pt_regs *r
-+ void kexec_nonboot_cpu_jump(void)
-+ {
-+ 	local_flush_icache_range((unsigned long)relocated_kexec_smp_wait,
-+-				 reboot_code_buffer + relocate_new_kernel_size);
-++				 reboot_code_buffer + KEXEC_RELOCATE_NEW_KERNEL_SIZE);
-+ 
-+ 	relocated_kexec_smp_wait(NULL);
-+ }
-+@@ -199,7 +303,7 @@ void kexec_reboot(void)
-+ 	 * machine_kexec() CPU.
-+ 	 */
-+ 	local_flush_icache_range(reboot_code_buffer,
-+-				 reboot_code_buffer + relocate_new_kernel_size);
-++				 reboot_code_buffer + KEXEC_RELOCATE_NEW_KERNEL_SIZE);
-+ 
-+ 	do_kexec = (void *)reboot_code_buffer;
-+ 	do_kexec();
-+@@ -212,10 +316,12 @@ machine_kexec(struct kimage *image)
-+ 	unsigned long *ptr;
-+ 
-+ 	reboot_code_buffer =
-+-	  (unsigned long)page_address(image->control_code_page);
-++		(unsigned long)page_address(image->control_code_page);
-++	pr_info("reboot_code_buffer = %p\n", (void *)reboot_code_buffer);
-+ 
-+ 	kexec_start_address =
-+ 		(unsigned long) phys_to_virt(image->start);
-++	pr_info("kexec_start_address = %p\n", (void *)kexec_start_address);
-+ 
-+ 	if (image->type == KEXEC_TYPE_DEFAULT) {
-+ 		kexec_indirection_page =
-+@@ -223,9 +329,19 @@ machine_kexec(struct kimage *image)
-+ 	} else {
-+ 		kexec_indirection_page = (unsigned long)&image->head;
-+ 	}
-++	pr_info("kexec_indirection_page = %p\n", (void *)kexec_indirection_page);
-+ 
-+-	memcpy((void*)reboot_code_buffer, relocate_new_kernel,
-+-	       relocate_new_kernel_size);
-++	pr_info("Where is memcpy: %p\n", memcpy);
-++	pr_info("kexec_relocate_new_kernel = %p, kexec_relocate_new_kernel_end = %p\n",
-++		(void *)kexec_relocate_new_kernel, &kexec_relocate_new_kernel_end);
-++	pr_info("Copy %lu bytes from %p to %p\n", KEXEC_RELOCATE_NEW_KERNEL_SIZE,
-++		(void *)kexec_relocate_new_kernel, (void *)reboot_code_buffer);
-++	memcpy((void*)reboot_code_buffer, kexec_relocate_new_kernel,
-++	       KEXEC_RELOCATE_NEW_KERNEL_SIZE);
-++
-++	pr_info("Before _print_args().\n");
-++	machine_kexec_print_args();
-++	pr_info("Before eval loop.\n");
-+ 
-+ 	/*
-+ 	 * The generic kexec code builds a page list with physical
-+@@ -256,7 +372,7 @@ machine_kexec(struct kimage *image)
-+ #ifdef CONFIG_SMP
-+ 	/* All secondary cpus now may jump to kexec_wait cycle */
-+ 	relocated_kexec_smp_wait = reboot_code_buffer +
-+-		(void *)(kexec_smp_wait - relocate_new_kernel);
-++		(void *)(kexec_smp_wait - kexec_relocate_new_kernel);
-+ 	smp_wmb();
-+ 	atomic_set(&kexec_ready_to_reboot, 1);
-+ #endif
-+--- /dev/null
-++++ b/arch/mips/kernel/machine_kexec.h
-+@@ -0,0 +1,20 @@
-++#ifndef _MACHINE_KEXEC_H
-++#define _MACHINE_KEXEC_H
-++
-++#ifndef __ASSEMBLY__
-++extern const unsigned char kexec_relocate_new_kernel[];
-++extern unsigned long kexec_relocate_new_kernel_end;
-++extern unsigned long kexec_start_address;
-++extern unsigned long kexec_indirection_page;
-++
-++extern char kexec_argv_buf[];
-++extern char *kexec_argv[];
-++
-++#define KEXEC_RELOCATE_NEW_KERNEL_SIZE	((unsigned long)&kexec_relocate_new_kernel_end - (unsigned long)kexec_relocate_new_kernel)
-++#endif /* !__ASSEMBLY__ */
-++
-++#define KEXEC_COMMAND_LINE_SIZE		256
-++#define KEXEC_ARGV_SIZE			(KEXEC_COMMAND_LINE_SIZE / 16)
-++#define KEXEC_MAX_ARGC			(KEXEC_ARGV_SIZE / sizeof(long))
-++
-++#endif
-+--- a/arch/mips/kernel/relocate_kernel.S
-++++ b/arch/mips/kernel/relocate_kernel.S
-+@@ -10,8 +10,9 @@
-+ #include <asm/mipsregs.h>
-+ #include <asm/stackframe.h>
-+ #include <asm/addrspace.h>
-++#include "machine_kexec.h"
-+ 
-+-LEAF(relocate_new_kernel)
-++LEAF(kexec_relocate_new_kernel)
-+ 	PTR_L a0,	arg0
-+ 	PTR_L a1,	arg1
-+ 	PTR_L a2,	arg2
-+@@ -96,7 +97,7 @@ done:
-+ #endif
-+ 	/* jump to kexec_start_address */
-+ 	j		s1
-+-	END(relocate_new_kernel)
-++	END(kexec_relocate_new_kernel)
-+ 
-+ #ifdef CONFIG_SMP
-+ /*
-+@@ -182,9 +183,15 @@ kexec_indirection_page:
-+ 	PTR		0
-+ 	.size		kexec_indirection_page, PTRSIZE
-+ 
-+-relocate_new_kernel_end:
-++kexec_argv_buf:
-++	EXPORT(kexec_argv_buf)
-++	.skip		KEXEC_COMMAND_LINE_SIZE
-++	.size		kexec_argv_buf, KEXEC_COMMAND_LINE_SIZE
-++
-++kexec_argv:
-++	EXPORT(kexec_argv)
-++	.skip		KEXEC_ARGV_SIZE
-++	.size		kexec_argv, KEXEC_ARGV_SIZE
-+ 
-+-relocate_new_kernel_size:
-+-	EXPORT(relocate_new_kernel_size)
-+-	PTR		relocate_new_kernel_end - relocate_new_kernel
-+-	.size		relocate_new_kernel_size, PTRSIZE
-++kexec_relocate_new_kernel_end:
-++	EXPORT(kexec_relocate_new_kernel_end)
-diff --git a/target/linux/generic/pending-5.10/332-arc-add-OWRTDTB-section.patch b/target/linux/generic/pending-5.10/332-arc-add-OWRTDTB-section.patch
-new file mode 100644
-index 0000000000..30158cf399
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/332-arc-add-OWRTDTB-section.patch
-@@ -0,0 +1,84 @@
-+From bb0c3b0175240bf152fd7c644821a0cf9f77c37c Mon Sep 17 00:00:00 2001
-+From: Evgeniy Didin <Evgeniy.Didin@synopsys.com>
-+Date: Fri, 15 Mar 2019 18:53:38 +0300
-+Subject: [PATCH] arc add OWRTDTB section
-+
-+This change allows OpenWRT to patch resulting kernel binary with
-+external .dtb.
-+
-+That allows us to re-use exactky the same vmlinux on different boards
-+given its ARC core configurations match (at least cache line sizes etc).
-+
-+""patch-dtb" searches for ASCII "OWRTDTB:" strign and copies external
-+.dtb right after it, keeping the string in place.
-+
-+Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
-+Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
-+Signed-off-by: Evgeniy Didin <Evgeniy.Didin@synopsys.com>
-+---
-+ arch/arc/kernel/head.S        | 10 ++++++++++
-+ arch/arc/kernel/setup.c       |  4 +++-
-+ arch/arc/kernel/vmlinux.lds.S | 13 +++++++++++++
-+ 3 files changed, 26 insertions(+), 1 deletion(-)
-+
-+--- a/arch/arc/kernel/head.S
-++++ b/arch/arc/kernel/head.S
-+@@ -88,6 +88,16 @@
-+ 	DSP_EARLY_INIT
-+ .endm
-+ 
-++	; Here "patch-dtb" will embed external .dtb
-++	; Note "patch-dtb" searches for ASCII "OWRTDTB:" string
-++	; and pastes .dtb right after it, hense the string precedes
-++	; __image_dtb symbol.
-++	.section .owrt, "aw",@progbits
-++	.ascii  "OWRTDTB:"
-++ENTRY(__image_dtb)
-++	.fill   0x4000
-++END(__image_dtb)
-++
-+ 	.section .init.text, "ax",@progbits
-+ 
-+ ;----------------------------------------------------------------
-+--- a/arch/arc/kernel/setup.c
-++++ b/arch/arc/kernel/setup.c
-+@@ -495,6 +495,8 @@ static inline bool uboot_arg_invalid(uns
-+ /* We always pass 0 as magic from U-boot */
-+ #define UBOOT_MAGIC_VALUE	0
-+ 
-++extern struct boot_param_header __image_dtb;
-++
-+ void __init handle_uboot_args(void)
-+ {
-+ 	bool use_embedded_dtb = true;
-+@@ -533,7 +535,7 @@ void __init handle_uboot_args(void)
-+ ignore_uboot_args:
-+ 
-+ 	if (use_embedded_dtb) {
-+-		machine_desc = setup_machine_fdt(__dtb_start);
-++		machine_desc = setup_machine_fdt(&__image_dtb);
-+ 		if (!machine_desc)
-+ 			panic("Embedded DT invalid\n");
-+ 	}
-+--- a/arch/arc/kernel/vmlinux.lds.S
-++++ b/arch/arc/kernel/vmlinux.lds.S
-+@@ -27,6 +27,19 @@ SECTIONS
-+ 
-+ 	. = CONFIG_LINUX_LINK_BASE;
-+ 
-++	/*
-++	* In OpenWRT we want to patch built binary embedding .dtb of choice.
-++	* This is implemented with "patch-dtb" utility which searches for
-++	* "OWRTDTB:" string in first 16k of image and if it is found
-++	* copies .dtb right after mentioned string.
-++	*
-++	* Note: "OWRTDTB:" won't be overwritten with .dtb, .dtb will follow it.
-++	*/
-++ 	.owrt : {
-++		*(.owrt)
-++	. = ALIGN(PAGE_SIZE);
-++	}
-++
-+ 	_int_vec_base_lds = .;
-+ 	.vector : {
-+ 		*(.vector)
-diff --git a/target/linux/generic/pending-5.10/333-arc-enable-unaligned-access-in-kernel-mode.patch b/target/linux/generic/pending-5.10/333-arc-enable-unaligned-access-in-kernel-mode.patch
-new file mode 100644
-index 0000000000..1848a84cc4
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/333-arc-enable-unaligned-access-in-kernel-mode.patch
-@@ -0,0 +1,24 @@
-+From: Alexey Brodkin <abrodkin@synopsys.com>
-+Subject: arc: enable unaligned access in kernel mode
-+
-+This enables misaligned access handling even in kernel mode.
-+Some wireless drivers (ath9k-htc and mt7601u) use misaligned accesses
-+here and there and to cope with that without fixing stuff in the drivers
-+we're just gracefully handling it on ARC.
-+
-+Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
-+---
-+ arch/arc/kernel/unaligned.c | 2 +-
-+ 1 file changed, 1 insertion(+), 1 deletion(-)
-+
-+--- a/arch/arc/kernel/unaligned.c
-++++ b/arch/arc/kernel/unaligned.c
-+@@ -202,7 +202,7 @@ int misaligned_fixup(unsigned long addre
-+ 	char buf[TASK_COMM_LEN];
-+ 
-+ 	/* handle user mode only and only if enabled by sysadmin */
-+-	if (!user_mode(regs) || !unaligned_enabled)
-++	if (!unaligned_enabled)
-+ 		return 1;
-+ 
-+ 	if (no_unaligned_warning) {
-diff --git a/target/linux/generic/pending-5.10/342-powerpc-Enable-kernel-XZ-compression-option-on-PPC_8.patch b/target/linux/generic/pending-5.10/342-powerpc-Enable-kernel-XZ-compression-option-on-PPC_8.patch
-new file mode 100644
-index 0000000000..6792a66f8a
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/342-powerpc-Enable-kernel-XZ-compression-option-on-PPC_8.patch
-@@ -0,0 +1,25 @@
-+From 66770a004afe10df11d3902e16eaa0c2c39436bb Mon Sep 17 00:00:00 2001
-+From: Pawel Dembicki <paweldembicki@gmail.com>
-+Date: Fri, 24 May 2019 17:56:19 +0200
-+Subject: [PATCH] powerpc: Enable kernel XZ compression option on PPC_85xx
-+
-+Enable kernel XZ compression option on PPC_85xx. Tested with
-+simpleImage on TP-Link TL-WDR4900 (Freescale P1014 processor).
-+
-+Suggested-by: Christian Lamparter <chunkeey@gmail.com>
-+Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
-+---
-+ arch/powerpc/Kconfig | 2 +-
-+ 1 file changed, 1 insertion(+), 1 deletion(-)
-+
-+--- a/arch/powerpc/Kconfig
-++++ b/arch/powerpc/Kconfig
-+@@ -214,7 +214,7 @@ config PPC
-+ 	select HAVE_KERNEL_GZIP
-+ 	select HAVE_KERNEL_LZMA			if DEFAULT_UIMAGE
-+ 	select HAVE_KERNEL_LZO			if DEFAULT_UIMAGE
-+-	select HAVE_KERNEL_XZ			if PPC_BOOK3S || 44x
-++	select HAVE_KERNEL_XZ			if PPC_BOOK3S || 44x || PPC_85xx
-+ 	select HAVE_KPROBES
-+ 	select HAVE_KPROBES_ON_FTRACE
-+ 	select HAVE_KRETPROBES
-diff --git a/target/linux/generic/pending-5.10/400-mtd-mtdsplit-support.patch b/target/linux/generic/pending-5.10/400-mtd-mtdsplit-support.patch
-new file mode 100644
-index 0000000000..6f816a6ad3
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/400-mtd-mtdsplit-support.patch
-@@ -0,0 +1,313 @@
-+--- a/drivers/mtd/Kconfig
-++++ b/drivers/mtd/Kconfig
-+@@ -12,6 +12,25 @@ menuconfig MTD
-+ 
-+ if MTD
-+ 
-++menu "OpenWrt specific MTD options"
-++
-++config MTD_ROOTFS_ROOT_DEV
-++	bool "Automatically set 'rootfs' partition to be root filesystem"
-++	default y
-++
-++config MTD_SPLIT_FIRMWARE
-++	bool "Automatically split firmware partition for kernel+rootfs"
-++	default y
-++
-++config MTD_SPLIT_FIRMWARE_NAME
-++	string "Firmware partition name"
-++	depends on MTD_SPLIT_FIRMWARE
-++	default "firmware"
-++
-++source "drivers/mtd/mtdsplit/Kconfig"
-++
-++endmenu
-++
-+ config MTD_TESTS
-+ 	tristate "MTD tests support (DANGEROUS)"
-+ 	depends on m
-+--- a/drivers/mtd/mtdpart.c
-++++ b/drivers/mtd/mtdpart.c
-+@@ -15,10 +15,12 @@
-+ #include <linux/kmod.h>
-+ #include <linux/mtd/mtd.h>
-+ #include <linux/mtd/partitions.h>
-++#include <linux/magic.h>
-+ #include <linux/err.h>
-+ #include <linux/of.h>
-+ 
-+ #include "mtdcore.h"
-++#include "mtdsplit/mtdsplit.h"
-+ 
-+ /*
-+  * MTD methods which simply translate the effective address and pass through
-+@@ -236,6 +238,146 @@ static int mtd_add_partition_attrs(struc
-+ 	return ret;
-+ }
-+ 
-++static DEFINE_SPINLOCK(part_parser_lock);
-++static LIST_HEAD(part_parsers);
-++
-++static struct mtd_part_parser *mtd_part_parser_get(const char *name)
-++{
-++	struct mtd_part_parser *p, *ret = NULL;
-++
-++	spin_lock(&part_parser_lock);
-++
-++	list_for_each_entry(p, &part_parsers, list)
-++		if (!strcmp(p->name, name) && try_module_get(p->owner)) {
-++			ret = p;
-++			break;
-++		}
-++
-++	spin_unlock(&part_parser_lock);
-++
-++	return ret;
-++}
-++
-++static inline void mtd_part_parser_put(const struct mtd_part_parser *p)
-++{
-++	module_put(p->owner);
-++}
-++
-++static struct mtd_part_parser *
-++get_partition_parser_by_type(enum mtd_parser_type type,
-++			     struct mtd_part_parser *start)
-++{
-++	struct mtd_part_parser *p, *ret = NULL;
-++
-++	spin_lock(&part_parser_lock);
-++
-++	p = list_prepare_entry(start, &part_parsers, list);
-++	if (start)
-++		mtd_part_parser_put(start);
-++
-++	list_for_each_entry_continue(p, &part_parsers, list) {
-++		if (p->type == type && try_module_get(p->owner)) {
-++			ret = p;
-++			break;
-++		}
-++	}
-++
-++	spin_unlock(&part_parser_lock);
-++
-++	return ret;
-++}
-++
-++static int parse_mtd_partitions_by_type(struct mtd_info *master,
-++					enum mtd_parser_type type,
-++					const struct mtd_partition **pparts,
-++					struct mtd_part_parser_data *data)
-++{
-++	struct mtd_part_parser *prev = NULL;
-++	int ret = 0;
-++
-++	while (1) {
-++		struct mtd_part_parser *parser;
-++
-++		parser = get_partition_parser_by_type(type, prev);
-++		if (!parser)
-++			break;
-++
-++		ret = (*parser->parse_fn)(master, pparts, data);
-++
-++		if (ret > 0) {
-++			mtd_part_parser_put(parser);
-++			printk(KERN_NOTICE
-++			       "%d %s partitions found on MTD device %s\n",
-++			       ret, parser->name, master->name);
-++			break;
-++		}
-++
-++		prev = parser;
-++	}
-++
-++	return ret;
-++}
-++
-++static int
-++run_parsers_by_type(struct mtd_info *child, enum mtd_parser_type type)
-++{
-++	struct mtd_partition *parts;
-++	int nr_parts;
-++	int i;
-++
-++	nr_parts = parse_mtd_partitions_by_type(child, type, (const struct mtd_partition **)&parts,
-++						NULL);
-++	if (nr_parts <= 0)
-++		return nr_parts;
-++
-++	if (WARN_ON(!parts))
-++		return 0;
-++
-++	for (i = 0; i < nr_parts; i++) {
-++		/* adjust partition offsets */
-++		parts[i].offset += child->part.offset;
-++
-++		mtd_add_partition(child->parent,
-++				  parts[i].name,
-++				  parts[i].offset,
-++				  parts[i].size);
-++	}
-++
-++	kfree(parts);
-++
-++	return nr_parts;
-++}
-++
-++#ifdef CONFIG_MTD_SPLIT_FIRMWARE_NAME
-++#define SPLIT_FIRMWARE_NAME	CONFIG_MTD_SPLIT_FIRMWARE_NAME
-++#else
-++#define SPLIT_FIRMWARE_NAME	"unused"
-++#endif
-++
-++static void split_firmware(struct mtd_info *master, struct mtd_info *part)
-++{
-++	run_parsers_by_type(part, MTD_PARSER_TYPE_FIRMWARE);
-++}
-++
-++static void mtd_partition_split(struct mtd_info *master, struct mtd_info *part)
-++{
-++	static int rootfs_found = 0;
-++
-++	if (rootfs_found)
-++		return;
-++
-++	if (!strcmp(part->name, "rootfs")) {
-++		run_parsers_by_type(part, MTD_PARSER_TYPE_ROOTFS);
-++
-++		rootfs_found = 1;
-++	}
-++
-++	if (IS_ENABLED(CONFIG_MTD_SPLIT_FIRMWARE) &&
-++	    !strcmp(part->name, SPLIT_FIRMWARE_NAME) &&
-++	    !of_find_property(mtd_get_of_node(part), "compatible", NULL))
-++		split_firmware(master, part);
-++}
-++
-+ int mtd_add_partition(struct mtd_info *parent, const char *name,
-+ 		      long long offset, long long length)
-+ {
-+@@ -274,6 +416,7 @@ int mtd_add_partition(struct mtd_info *p
-+ 	if (ret)
-+ 		goto err_remove_part;
-+ 
-++	mtd_partition_split(parent, child);
-+ 	mtd_add_partition_attrs(child);
-+ 
-+ 	return 0;
-+@@ -422,6 +565,7 @@ int add_mtd_partitions(struct mtd_info *
-+ 			goto err_del_partitions;
-+ 		}
-+ 
-++		mtd_partition_split(master, child);
-+ 		mtd_add_partition_attrs(child);
-+ 
-+ 		/* Look for subpartitions */
-+@@ -438,31 +582,6 @@ err_del_partitions:
-+ 	return ret;
-+ }
-+ 
-+-static DEFINE_SPINLOCK(part_parser_lock);
-+-static LIST_HEAD(part_parsers);
-+-
-+-static struct mtd_part_parser *mtd_part_parser_get(const char *name)
-+-{
-+-	struct mtd_part_parser *p, *ret = NULL;
-+-
-+-	spin_lock(&part_parser_lock);
-+-
-+-	list_for_each_entry(p, &part_parsers, list)
-+-		if (!strcmp(p->name, name) && try_module_get(p->owner)) {
-+-			ret = p;
-+-			break;
-+-		}
-+-
-+-	spin_unlock(&part_parser_lock);
-+-
-+-	return ret;
-+-}
-+-
-+-static inline void mtd_part_parser_put(const struct mtd_part_parser *p)
-+-{
-+-	module_put(p->owner);
-+-}
-+-
-+ /*
-+  * Many partition parsers just expected the core to kfree() all their data in
-+  * one chunk. Do that by default.
-+--- a/include/linux/mtd/partitions.h
-++++ b/include/linux/mtd/partitions.h
-+@@ -75,6 +75,12 @@ struct mtd_part_parser_data {
-+  * Functions dealing with the various ways of partitioning the space
-+  */
-+ 
-++enum mtd_parser_type {
-++	MTD_PARSER_TYPE_DEVICE = 0,
-++	MTD_PARSER_TYPE_ROOTFS,
-++	MTD_PARSER_TYPE_FIRMWARE,
-++};
-++
-+ struct mtd_part_parser {
-+ 	struct list_head list;
-+ 	struct module *owner;
-+@@ -83,6 +89,7 @@ struct mtd_part_parser {
-+ 	int (*parse_fn)(struct mtd_info *, const struct mtd_partition **,
-+ 			struct mtd_part_parser_data *);
-+ 	void (*cleanup)(const struct mtd_partition *pparts, int nr_parts);
-++	enum mtd_parser_type type;
-+ };
-+ 
-+ /* Container for passing around a set of parsed partitions */
-+--- a/drivers/mtd/Makefile
-++++ b/drivers/mtd/Makefile
-+@@ -9,6 +9,8 @@ mtd-y				:= mtdcore.o mtdsuper.o mtdconc
-+ 
-+ obj-y				+= parsers/
-+ 
-++obj-$(CONFIG_MTD_SPLIT)		+= mtdsplit/
-++
-+ # 'Users' - code which presents functionality to userspace.
-+ obj-$(CONFIG_MTD_BLKDEVS)	+= mtd_blkdevs.o
-+ obj-$(CONFIG_MTD_BLOCK)		+= mtdblock.o
-+--- a/include/linux/mtd/mtd.h
-++++ b/include/linux/mtd/mtd.h
-+@@ -608,6 +608,24 @@ static inline void mtd_align_erase_req(s
-+ 		req->len += mtd->erasesize - mod;
-+ }
-+ 
-++static inline uint64_t mtd_roundup_to_eb(uint64_t sz, struct mtd_info *mtd)
-++{
-++	if (mtd_mod_by_eb(sz, mtd) == 0)
-++		return sz;
-++
-++	/* Round up to next erase block */
-++	return (mtd_div_by_eb(sz, mtd) + 1) * mtd->erasesize;
-++}
-++
-++static inline uint64_t mtd_rounddown_to_eb(uint64_t sz, struct mtd_info *mtd)
-++{
-++	if (mtd_mod_by_eb(sz, mtd) == 0)
-++		return sz;
-++
-++	/* Round down to the start of the current erase block */
-++	return (mtd_div_by_eb(sz, mtd)) * mtd->erasesize;
-++}
-++
-+ static inline uint32_t mtd_div_by_ws(uint64_t sz, struct mtd_info *mtd)
-+ {
-+ 	if (mtd->writesize_shift)
-+@@ -680,6 +698,13 @@ extern void __put_mtd_device(struct mtd_
-+ extern struct mtd_info *get_mtd_device_nm(const char *name);
-+ extern void put_mtd_device(struct mtd_info *mtd);
-+ 
-++static inline uint64_t mtdpart_get_offset(const struct mtd_info *mtd)
-++{
-++	if (!mtd_is_partition(mtd))
-++		return 0;
-++
-++	return mtd->part.offset;
-++}
-+ 
-+ struct mtd_notifier {
-+ 	void (*add)(struct mtd_info *mtd);
-diff --git a/target/linux/generic/pending-5.10/419-mtd-redboot-add-of_match_table-with-DT-binding.patch b/target/linux/generic/pending-5.10/419-mtd-redboot-add-of_match_table-with-DT-binding.patch
-new file mode 100644
-index 0000000000..8358a307cd
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/419-mtd-redboot-add-of_match_table-with-DT-binding.patch
-@@ -0,0 +1,22 @@
-+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-+Subject: [PATCH] mtd: redboot: add of_match_table with DT binding
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+This allows parsing RedBoot compatible partitions for properly described
-+flash device in DT.
-+
-+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-+---
-+
-+--- a/drivers/mtd/parsers/redboot.c
-++++ b/drivers/mtd/parsers/redboot.c
-+@@ -300,6 +300,7 @@ static int parse_redboot_partitions(stru
-+ 
-+ static const struct of_device_id mtd_parser_redboot_of_match_table[] = {
-+ 	{ .compatible = "redboot-fis" },
-++	{ .compatible = "ecoscentric,redboot-fis-partitions" },
-+ 	{},
-+ };
-+ MODULE_DEVICE_TABLE(of, mtd_parser_redboot_of_match_table);
-diff --git a/target/linux/generic/pending-5.10/420-mtd-redboot_space.patch b/target/linux/generic/pending-5.10/420-mtd-redboot_space.patch
-new file mode 100644
-index 0000000000..a2cf838989
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/420-mtd-redboot_space.patch
-@@ -0,0 +1,41 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: add patch for including unpartitioned space in the rootfs partition for redboot devices (if applicable)
-+
-+[john@phrozen.org: used by ixp and others]
-+
-+lede-commit: 394918851f84e4d00fa16eb900e7700e95091f00
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ drivers/mtd/redboot.c | 19 +++++++++++++------
-+ 1 file changed, 13 insertions(+), 6 deletions(-)
-+
-+--- a/drivers/mtd/parsers/redboot.c
-++++ b/drivers/mtd/parsers/redboot.c
-+@@ -274,14 +274,21 @@ static int parse_redboot_partitions(stru
-+ #endif
-+ 		names += strlen(names)+1;
-+ 
-+-#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
-+ 		if(fl->next && fl->img->flash_base + fl->img->size + master->erasesize <= fl->next->img->flash_base) {
-+-			i++;
-+-			parts[i].offset = parts[i-1].size + parts[i-1].offset;
-+-			parts[i].size = fl->next->img->flash_base - parts[i].offset;
-+-			parts[i].name = nullname;
-+-		}
-++			if (!strcmp(parts[i].name, "rootfs")) {
-++				parts[i].size = fl->next->img->flash_base;
-++				parts[i].size &= ~(master->erasesize - 1);
-++				parts[i].size -= parts[i].offset;
-++#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
-++				nrparts--;
-++			} else {
-++				i++;
-++				parts[i].offset = parts[i-1].size + parts[i-1].offset;
-++				parts[i].size = fl->next->img->flash_base - parts[i].offset;
-++				parts[i].name = nullname;
-+ #endif
-++			}
-++		}
-+ 		tmp_fl = fl;
-+ 		fl = fl->next;
-+ 		kfree(tmp_fl);
-diff --git a/target/linux/generic/pending-5.10/430-mtd-add-myloader-partition-parser.patch b/target/linux/generic/pending-5.10/430-mtd-add-myloader-partition-parser.patch
-new file mode 100644
-index 0000000000..0889c9a343
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/430-mtd-add-myloader-partition-parser.patch
-@@ -0,0 +1,229 @@
-+From: Florian Fainelli <f.fainelli@gmail.com>
-+Subject: Add myloader partition table parser
-+
-+[john@phozen.org: shoud be upstreamable]
-+
-+lede-commit: d8bf22859b51faa09d22c056fe221a45d2f7a3b8
-+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
-+[adjust for kernel 5.4, add myloader.c to patch]
-+Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
-+
-+--- a/drivers/mtd/parsers/Kconfig
-++++ b/drivers/mtd/parsers/Kconfig
-+@@ -57,6 +57,22 @@ config MTD_CMDLINE_PARTS
-+ 
-+ 	  If unsure, say 'N'.
-+ 
-++config MTD_MYLOADER_PARTS
-++	tristate "MyLoader partition parsing"
-++	depends on ADM5120 || ATH25 || ATH79
-++	help
-++	  MyLoader is a bootloader which allows the user to define partitions
-++	  in flash devices, by putting a table in the second erase block
-++	  on the device, similar to a partition table. This table gives the 
-++	  offsets and lengths of the user defined partitions.
-++
-++	  If you need code which can detect and parse these tables, and
-++	  register MTD 'partitions' corresponding to each image detected,
-++	  enable this option.
-++
-++	  You will still need the parsing functions to be called by the driver
-++	  for your particular device. It won't happen automatically.
-++
-+ config MTD_OF_PARTS
-+ 	tristate "OpenFirmware (device tree) partitioning parser"
-+ 	default y
-+--- a/drivers/mtd/parsers/Makefile
-++++ b/drivers/mtd/parsers/Makefile
-+@@ -3,6 +3,7 @@ obj-$(CONFIG_MTD_AR7_PARTS)		+= ar7part.
-+ obj-$(CONFIG_MTD_BCM47XX_PARTS)		+= bcm47xxpart.o
-+ obj-$(CONFIG_MTD_BCM63XX_PARTS)		+= bcm63xxpart.o
-+ obj-$(CONFIG_MTD_CMDLINE_PARTS)		+= cmdlinepart.o
-++obj-$(CONFIG_MTD_MYLOADER_PARTS)		+= myloader.o
-+ obj-$(CONFIG_MTD_OF_PARTS)		+= ofpart.o
-+ ofpart-y				+= ofpart_core.o
-+ ofpart-$(CONFIG_MTD_OF_PARTS_BCM4908)	+= ofpart_bcm4908.o
-+--- /dev/null
-++++ b/drivers/mtd/parsers/myloader.c
-+@@ -0,0 +1,181 @@
-++/*
-++ *  Parse MyLoader-style flash partition tables and produce a Linux partition
-++ *  array to match.
-++ *
-++ *  Copyright (C) 2007-2009 Gabor Juhos <juhosg@openwrt.org>
-++ *
-++ *  This file was based on drivers/mtd/redboot.c
-++ *  Author: Red Hat, Inc. - David Woodhouse <dwmw2@cambridge.redhat.com>
-++ *
-++ *  This program is free software; you can redistribute it and/or modify it
-++ *  under the terms of the GNU General Public License version 2 as published
-++ *  by the Free Software Foundation.
-++ */
-++
-++#include <linux/kernel.h>
-++#include <linux/module.h>
-++#include <linux/version.h>
-++#include <linux/slab.h>
-++#include <linux/init.h>
-++#include <linux/vmalloc.h>
-++#include <linux/mtd/mtd.h>
-++#include <linux/mtd/partitions.h>
-++#include <linux/byteorder/generic.h>
-++#include <linux/myloader.h>
-++
-++#define BLOCK_LEN_MIN		0x10000
-++#define PART_NAME_LEN		32
-++
-++struct part_data {
-++	struct mylo_partition_table	tab;
-++	char names[MYLO_MAX_PARTITIONS][PART_NAME_LEN];
-++};
-++
-++static int myloader_parse_partitions(struct mtd_info *master,
-++				     const struct mtd_partition **pparts,
-++				     struct mtd_part_parser_data *data)
-++{
-++	struct part_data *buf;
-++	struct mylo_partition_table *tab;
-++	struct mylo_partition *part;
-++	struct mtd_partition *mtd_parts;
-++	struct mtd_partition *mtd_part;
-++	int num_parts;
-++	int ret, i;
-++	size_t retlen;
-++	char *names;
-++	unsigned long offset;
-++	unsigned long blocklen;
-++
-++	buf = vmalloc(sizeof(*buf));
-++	if (!buf) {
-++		return -ENOMEM;
-++		goto out;
-++	}
-++	tab = &buf->tab;
-++
-++	blocklen = master->erasesize;
-++	if (blocklen < BLOCK_LEN_MIN)
-++		blocklen = BLOCK_LEN_MIN;
-++
-++	offset = blocklen;
-++
-++	/* Find the partition table */
-++	for (i = 0; i < 4; i++, offset += blocklen) {
-++		printk(KERN_DEBUG "%s: searching for MyLoader partition table"
-++				" at offset 0x%lx\n", master->name, offset);
-++
-++		ret = mtd_read(master, offset, sizeof(*buf), &retlen,
-++			       (void *)buf);
-++		if (ret)
-++			goto out_free_buf;
-++
-++		if (retlen != sizeof(*buf)) {
-++			ret = -EIO;
-++			goto out_free_buf;
-++		}
-++
-++		/* Check for Partition Table magic number */
-++		if (tab->magic == le32_to_cpu(MYLO_MAGIC_PARTITIONS))
-++			break;
-++
-++	}
-++
-++	if (tab->magic != le32_to_cpu(MYLO_MAGIC_PARTITIONS)) {
-++		printk(KERN_DEBUG "%s: no MyLoader partition table found\n",
-++			master->name);
-++		ret = 0;
-++		goto out_free_buf;
-++	}
-++
-++	/* The MyLoader and the Partition Table is always present */
-++	num_parts = 2;
-++
-++	/* Detect number of used partitions */
-++	for (i = 0; i < MYLO_MAX_PARTITIONS; i++) {
-++		part = &tab->partitions[i];
-++
-++		if (le16_to_cpu(part->type) == PARTITION_TYPE_FREE)
-++			continue;
-++
-++		num_parts++;
-++	}
-++
-++	mtd_parts = kzalloc((num_parts * sizeof(*mtd_part) +
-++				num_parts * PART_NAME_LEN), GFP_KERNEL);
-++
-++	if (!mtd_parts) {
-++		ret = -ENOMEM;
-++		goto out_free_buf;
-++	}
-++
-++	mtd_part = mtd_parts;
-++	names = (char *)&mtd_parts[num_parts];
-++
-++	strncpy(names, "myloader", PART_NAME_LEN);
-++	mtd_part->name = names;
-++	mtd_part->offset = 0;
-++	mtd_part->size = offset;
-++	mtd_part->mask_flags = MTD_WRITEABLE;
-++	mtd_part++;
-++	names += PART_NAME_LEN;
-++
-++	strncpy(names, "partition_table", PART_NAME_LEN);
-++	mtd_part->name = names;
-++	mtd_part->offset = offset;
-++	mtd_part->size = blocklen;
-++	mtd_part->mask_flags = MTD_WRITEABLE;
-++	mtd_part++;
-++	names += PART_NAME_LEN;
-++
-++	for (i = 0; i < MYLO_MAX_PARTITIONS; i++) {
-++		part = &tab->partitions[i];
-++
-++		if (le16_to_cpu(part->type) == PARTITION_TYPE_FREE)
-++			continue;
-++
-++		if ((buf->names[i][0]) && (buf->names[i][0] != '\xff'))
-++			strncpy(names, buf->names[i], PART_NAME_LEN);
-++		else
-++			snprintf(names, PART_NAME_LEN, "partition%d", i);
-++
-++		mtd_part->offset = le32_to_cpu(part->addr);
-++		mtd_part->size = le32_to_cpu(part->size);
-++		mtd_part->name = names;
-++		mtd_part++;
-++		names += PART_NAME_LEN;
-++	}
-++
-++	*pparts = mtd_parts;
-++	ret = num_parts;
-++
-++ out_free_buf:
-++	vfree(buf);
-++ out:
-++	return ret;
-++}
-++
-++static struct mtd_part_parser myloader_mtd_parser = {
-++	.owner		= THIS_MODULE,
-++	.parse_fn	= myloader_parse_partitions,
-++	.name		= "MyLoader",
-++};
-++
-++static int __init myloader_mtd_parser_init(void)
-++{
-++	register_mtd_parser(&myloader_mtd_parser);
-++
-++	return 0;
-++}
-++
-++static void __exit myloader_mtd_parser_exit(void)
-++{
-++	deregister_mtd_parser(&myloader_mtd_parser);
-++}
-++
-++module_init(myloader_mtd_parser_init);
-++module_exit(myloader_mtd_parser_exit);
-++
-++MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
-++MODULE_DESCRIPTION("Parsing code for MyLoader partition tables");
-++MODULE_LICENSE("GPL v2");
-diff --git a/target/linux/generic/pending-5.10/431-mtd-bcm47xxpart-check-for-bad-blocks-when-calculatin.patch b/target/linux/generic/pending-5.10/431-mtd-bcm47xxpart-check-for-bad-blocks-when-calculatin.patch
-new file mode 100644
-index 0000000000..2ea59cd872
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/431-mtd-bcm47xxpart-check-for-bad-blocks-when-calculatin.patch
-@@ -0,0 +1,68 @@
-+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
-+Subject: [PATCH] mtd: bcm47xxpart: check for bad blocks when calculating offsets
-+
-+Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
-+---
-+
-+--- a/drivers/mtd/parsers/parser_trx.c
-++++ b/drivers/mtd/parsers/parser_trx.c
-+@@ -25,6 +25,33 @@ struct trx_header {
-+ 	uint32_t offset[3];
-+ } __packed;
-+ 
-++/*
-++ * Calculate real end offset (address) for a given amount of data. It checks
-++ * all blocks skipping bad ones.
-++ */
-++static size_t parser_trx_real_offset(struct mtd_info *mtd, size_t bytes)
-++{
-++	size_t real_offset = 0;
-++
-++	if (mtd_block_isbad(mtd, real_offset))
-++		pr_warn("Base offset shouldn't be at bad block");
-++
-++	while (bytes >= mtd->erasesize) {
-++		bytes -= mtd->erasesize;
-++		real_offset += mtd->erasesize;
-++		while (mtd_block_isbad(mtd, real_offset)) {
-++			real_offset += mtd->erasesize;
-++
-++			if (real_offset >= mtd->size)
-++				return real_offset - mtd->erasesize;
-++		}
-++	}
-++
-++	real_offset += bytes;
-++
-++	return real_offset;
-++}
-++
-+ static const char *parser_trx_data_part_name(struct mtd_info *master,
-+ 					     size_t offset)
-+ {
-+@@ -79,21 +106,21 @@ static int parser_trx_parse(struct mtd_i
-+ 	if (trx.offset[2]) {
-+ 		part = &parts[curr_part++];
-+ 		part->name = "loader";
-+-		part->offset = trx.offset[i];
-++		part->offset = parser_trx_real_offset(mtd, trx.offset[i]);
-+ 		i++;
-+ 	}
-+ 
-+ 	if (trx.offset[i]) {
-+ 		part = &parts[curr_part++];
-+ 		part->name = "linux";
-+-		part->offset = trx.offset[i];
-++		part->offset = parser_trx_real_offset(mtd, trx.offset[i]);
-+ 		i++;
-+ 	}
-+ 
-+ 	if (trx.offset[i]) {
-+ 		part = &parts[curr_part++];
-+-		part->name = parser_trx_data_part_name(mtd, trx.offset[i]);
-+-		part->offset = trx.offset[i];
-++		part->offset = parser_trx_real_offset(mtd, trx.offset[i]);
-++		part->name = parser_trx_data_part_name(mtd, part->offset);
-+ 		i++;
-+ 	}
-+ 
-diff --git a/target/linux/generic/pending-5.10/432-mtd-bcm47xxpart-detect-T_Meter-partition.patch b/target/linux/generic/pending-5.10/432-mtd-bcm47xxpart-detect-T_Meter-partition.patch
-new file mode 100644
-index 0000000000..852654d924
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/432-mtd-bcm47xxpart-detect-T_Meter-partition.patch
-@@ -0,0 +1,37 @@
-+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
-+Subject: mtd: bcm47xxpart: detect T_Meter partition
-+
-+It can be found on many Netgear devices. It consists of many 0x30 blocks
-+starting with 4D 54.
-+
-+Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
-+---
-+ drivers/mtd/bcm47xxpart.c | 10 ++++++++++
-+ 1 file changed, 10 insertions(+)
-+
-+--- a/drivers/mtd/parsers/bcm47xxpart.c
-++++ b/drivers/mtd/parsers/bcm47xxpart.c
-+@@ -35,6 +35,7 @@
-+ #define NVRAM_HEADER			0x48534C46	/* FLSH */
-+ #define POT_MAGIC1			0x54544f50	/* POTT */
-+ #define POT_MAGIC2			0x504f		/* OP */
-++#define T_METER_MAGIC			0x4D540000	/* MT */
-+ #define ML_MAGIC1			0x39685a42
-+ #define ML_MAGIC2			0x26594131
-+ #define TRX_MAGIC			0x30524448
-+@@ -178,6 +179,15 @@ static int bcm47xxpart_parse(struct mtd_
-+ 					     MTD_WRITEABLE);
-+ 			continue;
-+ 		}
-++
-++		/* T_Meter */
-++		if ((le32_to_cpu(buf[0x000 / 4]) & 0xFFFF0000) == T_METER_MAGIC &&
-++		    (le32_to_cpu(buf[0x030 / 4]) & 0xFFFF0000) == T_METER_MAGIC &&
-++		    (le32_to_cpu(buf[0x060 / 4]) & 0xFFFF0000) == T_METER_MAGIC) {
-++			bcm47xxpart_add_part(&parts[curr_part++], "T_Meter", offset,
-++					     MTD_WRITEABLE);
-++			continue;
-++		}
-+ 
-+ 		/* TRX */
-+ 		if (buf[0x000 / 4] == TRX_MAGIC) {
-diff --git a/target/linux/generic/pending-5.10/435-mtd-add-routerbootpart-parser-config.patch b/target/linux/generic/pending-5.10/435-mtd-add-routerbootpart-parser-config.patch
-new file mode 100644
-index 0000000000..ab1e09a5f1
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/435-mtd-add-routerbootpart-parser-config.patch
-@@ -0,0 +1,38 @@
-+From 4437e01fb6bca63fccdba5d6c44888b0935885c2 Mon Sep 17 00:00:00 2001
-+From: =?UTF-8?q?Thibaut=20VAR=C3=88NE?= <hacks@slashdirt.org>
-+Date: Tue, 24 Mar 2020 11:45:07 +0100
-+Subject: [PATCH] generic: routerboot partition build bits (5.4)
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+This patch adds routerbootpart kernel build bits
-+
-+Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
-+---
-+ drivers/mtd/parsers/Kconfig  | 9 +++++++++
-+ drivers/mtd/parsers/Makefile | 1 +
-+ 2 files changed, 10 insertions(+)
-+
-+--- a/drivers/mtd/parsers/Kconfig
-++++ b/drivers/mtd/parsers/Kconfig
-+@@ -195,3 +195,12 @@ config MTD_REDBOOT_PARTS_READONLY
-+ 	  'FIS directory' images, enable this option.
-+ 
-+ endif # MTD_REDBOOT_PARTS
-++
-++config MTD_ROUTERBOOT_PARTS
-++	tristate "RouterBoot flash partition parser"
-++	depends on MTD && OF
-++	help
-++	 MikroTik RouterBoot is implemented as a multi segment system on the
-++	 flash, some of which are fixed and some of which are located at
-++	 variable offsets. This parser handles both cases via properly
-++	 formatted DTS.
-+--- a/drivers/mtd/parsers/Makefile
-++++ b/drivers/mtd/parsers/Makefile
-+@@ -13,3 +13,4 @@ obj-$(CONFIG_MTD_AFS_PARTS)		+= afs.o
-+ obj-$(CONFIG_MTD_PARSER_TRX)		+= parser_trx.o
-+ obj-$(CONFIG_MTD_SHARPSL_PARTS)		+= sharpslpart.o
-+ obj-$(CONFIG_MTD_REDBOOT_PARTS)		+= redboot.o
-++obj-$(CONFIG_MTD_ROUTERBOOT_PARTS)		+= routerbootpart.o
-diff --git a/target/linux/generic/pending-5.10/460-mtd-cfi_cmdset_0002-no-erase_suspend.patch b/target/linux/generic/pending-5.10/460-mtd-cfi_cmdset_0002-no-erase_suspend.patch
-new file mode 100644
-index 0000000000..659a6386ae
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/460-mtd-cfi_cmdset_0002-no-erase_suspend.patch
-@@ -0,0 +1,25 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: kernel: disable cfi cmdset 0002 erase suspend
-+
-+on some platforms, erase suspend leads to data corruption and lockups when write
-+ops collide with erase ops. this has been observed on the buffalo wzr-hp-g300nh.
-+rather than play whack-a-mole with a hard to reproduce issue on a variety of devices,
-+simply disable erase suspend, as it will usually not produce any useful gain on
-+the small filesystems used on embedded hardware.
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ drivers/mtd/chips/cfi_cmdset_0002.c | 2 +-
-+ 1 file changed, 1 insertion(+), 1 deletion(-)
-+
-+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
-++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
-+@@ -909,7 +909,7 @@ static int get_chip(struct map_info *map
-+ 		return 0;
-+ 
-+ 	case FL_ERASING:
-+-		if (!cfip || !(cfip->EraseSuspend & (0x1|0x2)) ||
-++		if (1 /* no suspend */ || !cfip || !(cfip->EraseSuspend & (0x1|0x2)) ||
-+ 		    !(mode == FL_READY || mode == FL_POINT ||
-+ 		    (mode == FL_WRITING && (cfip->EraseSuspend & 0x2))))
-+ 			goto sleep;
-diff --git a/target/linux/generic/pending-5.10/461-mtd-cfi_cmdset_0002-add-buffer-write-cmd-timeout.patch b/target/linux/generic/pending-5.10/461-mtd-cfi_cmdset_0002-add-buffer-write-cmd-timeout.patch
-new file mode 100644
-index 0000000000..79276b1b87
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/461-mtd-cfi_cmdset_0002-add-buffer-write-cmd-timeout.patch
-@@ -0,0 +1,17 @@
-+From: George Kashperko <george@znau.edu.ua>
-+Subject: Issue map read after Write Buffer Load command to ensure chip is ready to receive data.
-+
-+Signed-off-by: George Kashperko <george@znau.edu.ua>
-+---
-+ drivers/mtd/chips/cfi_cmdset_0002.c |    1 +
-+ 1 file changed, 1 insertion(+)
-+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
-++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
-+@@ -2053,6 +2053,7 @@ static int __xipram do_write_buffer(stru
-+ 
-+ 	/* Write Buffer Load */
-+ 	map_write(map, CMD(0x25), cmd_adr);
-++	(void) map_read(map, cmd_adr);
-+ 
-+ 	chip->state = FL_WRITING_TO_BUFFER;
-+ 
-diff --git a/target/linux/generic/pending-5.10/465-m25p80-mx-disable-software-protection.patch b/target/linux/generic/pending-5.10/465-m25p80-mx-disable-software-protection.patch
-new file mode 100644
-index 0000000000..e9a9cad869
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/465-m25p80-mx-disable-software-protection.patch
-@@ -0,0 +1,18 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: Disable software protection bits for Macronix flashes.
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ drivers/mtd/spi-nor/spi-nor.c | 1 +
-+ 1 file changed, 1 insertion(+)
-+
-+--- a/drivers/mtd/spi-nor/macronix.c
-++++ b/drivers/mtd/spi-nor/macronix.c
-+@@ -96,6 +96,7 @@ static void macronix_default_init(struct
-+ {
-+ 	nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
-+ 	nor->params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode;
-++	nor->flags |= SNOR_F_HAS_LOCK;
-+ }
-+ 
-+ static const struct spi_nor_fixups macronix_fixups = {
-diff --git a/target/linux/generic/pending-5.10/470-mtd-spi-nor-support-limiting-4K-sectors-support-base.patch b/target/linux/generic/pending-5.10/470-mtd-spi-nor-support-limiting-4K-sectors-support-base.patch
-new file mode 100644
-index 0000000000..d000094e1d
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/470-mtd-spi-nor-support-limiting-4K-sectors-support-base.patch
-@@ -0,0 +1,71 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Sat, 4 Nov 2017 07:40:23 +0100
-+Subject: [PATCH] mtd: spi-nor: support limiting 4K sectors support based on
-+ flash size
-+
-+Some devices need 4K sectors to be able to deal with small flash chips.
-+For instance, w25x05 is 64 KiB in size, and without 4K sectors, the
-+entire chip is just one erase block.
-+On bigger flash chip sizes, using 4K sectors can significantly slow down
-+many operations, including using a writable filesystem. There are several
-+platforms where it makes sense to use a single kernel on both kinds of
-+devices.
-+
-+To support this properly, allow configuring an upper flash chip size
-+limit for 4K sectors support.
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/drivers/mtd/spi-nor/Kconfig
-++++ b/drivers/mtd/spi-nor/Kconfig
-+@@ -24,6 +24,17 @@ config MTD_SPI_NOR_USE_4K_SECTORS
-+ 	  Please note that some tools/drivers/filesystems may not work with
-+ 	  4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).
-+ 
-++config MTD_SPI_NOR_USE_4K_SECTORS_LIMIT
-++	int "Maximum flash chip size to use 4K sectors on (in KiB)"
-++	depends on MTD_SPI_NOR_USE_4K_SECTORS
-++	default "4096"
-++	help
-++	  There are many flash chips that support 4K sectors, but are so large
-++	  that using them significantly slows down writing large amounts of
-++	  data or using a writable filesystem.
-++	  Any flash chip larger than the size specified in this option will
-++	  not use 4K sectors.
-++
-+ source "drivers/mtd/spi-nor/controllers/Kconfig"
-+ 
-+ endif # MTD_SPI_NOR
-+--- a/drivers/mtd/spi-nor/core.c
-++++ b/drivers/mtd/spi-nor/core.c
-+@@ -2786,6 +2786,21 @@ static void spi_nor_info_init_params(str
-+ 	 */
-+ 	erase_mask = 0;
-+ 	i = 0;
-++#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
-++	if ((info->flags & SECT_4K_PMC) && (params->size <=
-++		   CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT * 1024)) {
-++		erase_mask |= BIT(i);
-++		spi_nor_set_erase_type(&map->erase_type[i], 4096u,
-++				       SPINOR_OP_BE_4K_PMC);
-++		i++;
-++	} else if ((info->flags & SECT_4K) && (params->size <=
-++	    CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT * 1024)) {
-++		erase_mask |= BIT(i);
-++		spi_nor_set_erase_type(&map->erase_type[i], 4096u,
-++				       SPINOR_OP_BE_4K);
-++		i++;
-++	}
-++#else
-+ 	if (info->flags & SECT_4K_PMC) {
-+ 		erase_mask |= BIT(i);
-+ 		spi_nor_set_erase_type(&map->erase_type[i], 4096u,
-+@@ -2797,6 +2812,7 @@ static void spi_nor_info_init_params(str
-+ 				       SPINOR_OP_BE_4K);
-+ 		i++;
-+ 	}
-++#endif
-+ 	erase_mask |= BIT(i);
-+ 	spi_nor_set_erase_type(&map->erase_type[i], info->sector_size,
-+ 			       SPINOR_OP_SE);
-diff --git a/target/linux/generic/pending-5.10/476-mtd-spi-nor-add-eon-en25q128.patch b/target/linux/generic/pending-5.10/476-mtd-spi-nor-add-eon-en25q128.patch
-new file mode 100644
-index 0000000000..325fca62f3
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/476-mtd-spi-nor-add-eon-en25q128.patch
-@@ -0,0 +1,18 @@
-+From: Piotr Dymacz <pepe2k@gmail.com>
-+Subject: kernel/mtd: add support for EON EN25Q128
-+
-+Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
-+---
-+ drivers/mtd/spi-nor/spi-nor.c | 1 +
-+ 1 file changed, 1 insertion(+)
-+
-+--- a/drivers/mtd/spi-nor/eon.c
-++++ b/drivers/mtd/spi-nor/eon.c
-+@@ -15,6 +15,7 @@ static const struct flash_info eon_parts
-+ 	{ "en25q32b",   INFO(0x1c3016, 0, 64 * 1024,   64, 0) },
-+ 	{ "en25p64",    INFO(0x1c2017, 0, 64 * 1024,  128, 0) },
-+ 	{ "en25q64",    INFO(0x1c3017, 0, 64 * 1024,  128, SECT_4K) },
-++	{ "en25q128",   INFO(0x1c3018, 0, 64 * 1024,  256, SECT_4K) },
-+ 	{ "en25q80a",   INFO(0x1c3014, 0, 64 * 1024,   16,
-+ 			     SECT_4K | SPI_NOR_DUAL_READ) },
-+ 	{ "en25qh16",   INFO(0x1c7015, 0, 64 * 1024,   32,
-diff --git a/target/linux/generic/pending-5.10/479-mtd-spi-nor-add-xtx-xt25f128b.patch b/target/linux/generic/pending-5.10/479-mtd-spi-nor-add-xtx-xt25f128b.patch
-new file mode 100644
-index 0000000000..9ff6ffae58
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/479-mtd-spi-nor-add-xtx-xt25f128b.patch
-@@ -0,0 +1,79 @@
-+From patchwork Thu Feb  6 17:19:41 2020
-+Content-Type: text/plain; charset="utf-8"
-+MIME-Version: 1.0
-+Content-Transfer-Encoding: 7bit
-+X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
-+X-Patchwork-Id: 1234465
-+Date: Thu, 6 Feb 2020 19:19:41 +0200
-+From: Daniel Golle <daniel@makrotopia.org>
-+To: linux-mtd@lists.infradead.org
-+Subject: [PATCH v2] mtd: spi-nor: Add support for xt25f128b chip
-+Message-ID: <20200206171941.GA2398@makrotopia.org>
-+MIME-Version: 1.0
-+Content-Disposition: inline
-+List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-mtd>,
-+ <mailto:linux-mtd-request@lists.infradead.org?subject=subscribe>
-+Cc: Eitan Cohen <eitan@neot-semadar.com>, Piotr Dymacz <pepe2k@gmail.com>,
-+ Tudor Ambarus <tudor.ambarus@microchip.com>
-+Sender: "linux-mtd" <linux-mtd-bounces@lists.infradead.org>
-+Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org
-+
-+Add XT25F128B made by XTX Technology (Shenzhen) Limited.
-+This chip supports dual and quad read and uniform 4K-byte erase.
-+Verified on Teltonika RUT955 which comes with XT25F128B in recent
-+versions of the device.
-+
-+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ drivers/mtd/spi-nor/spi-nor.c | 4 ++++
-+ 1 file changed, 4 insertions(+)
-+
-+--- a/drivers/mtd/spi-nor/Makefile
-++++ b/drivers/mtd/spi-nor/Makefile
-+@@ -17,6 +17,7 @@ spi-nor-objs			+= sst.o
-+ spi-nor-objs			+= winbond.o
-+ spi-nor-objs			+= xilinx.o
-+ spi-nor-objs			+= xmc.o
-++spi-nor-objs			+= xtx.o
-+ obj-$(CONFIG_MTD_SPI_NOR)	+= spi-nor.o
-+ 
-+ obj-$(CONFIG_MTD_SPI_NOR)	+= controllers/
-+--- /dev/null
-++++ b/drivers/mtd/spi-nor/xtx.c
-+@@ -0,0 +1,15 @@
-++// SPDX-License-Identifier: GPL-2.0
-++#include <linux/mtd/spi-nor.h>
-++
-++#include "core.h"
-++
-++static const struct flash_info xtx_parts[] = {
-++	/* XTX Technology (Shenzhen) Limited */
-++	{ "xt25f128b", INFO(0x0B4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-++};
-++
-++const struct spi_nor_manufacturer spi_nor_xtx = {
-++	.name = "xtx",
-++	.parts = xtx_parts,
-++	.nparts = ARRAY_SIZE(xtx_parts),
-++};
-+--- a/drivers/mtd/spi-nor/core.c
-++++ b/drivers/mtd/spi-nor/core.c
-+@@ -2026,6 +2026,7 @@ static const struct spi_nor_manufacturer
-+ 	&spi_nor_winbond,
-+ 	&spi_nor_xilinx,
-+ 	&spi_nor_xmc,
-++	&spi_nor_xtx,
-+ };
-+ 
-+ static const struct flash_info *
-+--- a/drivers/mtd/spi-nor/core.h
-++++ b/drivers/mtd/spi-nor/core.h
-+@@ -398,6 +398,7 @@ extern const struct spi_nor_manufacturer
-+ extern const struct spi_nor_manufacturer spi_nor_winbond;
-+ extern const struct spi_nor_manufacturer spi_nor_xilinx;
-+ extern const struct spi_nor_manufacturer spi_nor_xmc;
-++extern const struct spi_nor_manufacturer spi_nor_xtx;
-+ 
-+ int spi_nor_write_enable(struct spi_nor *nor);
-+ int spi_nor_write_disable(struct spi_nor *nor);
-diff --git a/target/linux/generic/pending-5.10/480-mtd-set-rootfs-to-be-root-dev.patch b/target/linux/generic/pending-5.10/480-mtd-set-rootfs-to-be-root-dev.patch
-new file mode 100644
-index 0000000000..e01b991942
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/480-mtd-set-rootfs-to-be-root-dev.patch
-@@ -0,0 +1,38 @@
-+From: Gabor Juhos <juhosg@openwrt.org>
-+Subject: kernel/3.1[02]: move MTD root device setup code to mtdcore
-+
-+The current code only allows to automatically set
-+root device on MTD partitions. Move the code to MTD
-+core to allow to use it with all MTD devices.
-+
-+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-+---
-+ drivers/mtd/mtdcore.c | 10 ++++++++++
-+ 1 file changed, 10 insertions(+)
-+
-+--- a/drivers/mtd/mtdcore.c
-++++ b/drivers/mtd/mtdcore.c
-+@@ -27,6 +27,7 @@
-+ #include <linux/reboot.h>
-+ #include <linux/leds.h>
-+ #include <linux/debugfs.h>
-++#include <linux/root_dev.h>
-+ #include <linux/nvmem-provider.h>
-+ 
-+ #include <linux/mtd/mtd.h>
-+@@ -693,6 +694,15 @@ int add_mtd_device(struct mtd_info *mtd)
-+ 	   of this try_ nonsense, and no bitching about it
-+ 	   either. :) */
-+ 	__module_get(THIS_MODULE);
-++
-++	if (!strcmp(mtd->name, "rootfs") &&
-++	    IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV) &&
-++	    ROOT_DEV == 0) {
-++		pr_notice("mtd: device %d (%s) set to be root filesystem\n",
-++			  mtd->index, mtd->name);
-++		ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, mtd->index);
-++	}
-++
-+ 	return 0;
-+ 
-+ fail_nvmem_add:
-diff --git a/target/linux/generic/pending-5.10/481-mtd-spi-nor-rework-broken-flash-reset-support.patch b/target/linux/generic/pending-5.10/481-mtd-spi-nor-rework-broken-flash-reset-support.patch
-new file mode 100644
-index 0000000000..5cb85172fb
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/481-mtd-spi-nor-rework-broken-flash-reset-support.patch
-@@ -0,0 +1,180 @@
-+From ea92cbb50a78404e29de2cc3999a240615ffb1c8 Mon Sep 17 00:00:00 2001
-+From: Chuanhong Guo <gch981213@gmail.com>
-+Date: Mon, 6 Apr 2020 17:58:48 +0800
-+Subject: [PATCH] mtd: spi-nor: rework broken-flash-reset support
-+
-+Instead of resetting flash to 3B address on remove hook, this
-+implementation only enters 4B mode when needed, which prevents
-+more unexpected reboot stuck. This implementation makes it only
-+break when a kernel panic happens during flash operation on 16M+
-+areas.
-+*OpenWrt only*: silent broken-flash-reset warning. We are not dealing
-+with vendors and it's unpleasant for users to se that unnecessary
-+and long WARN_ON print.
-+
-+Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
-+---
-+ drivers/mtd/spi-nor/spi-nor.c | 52 +++++++++++++++++++++++++++++++++--
-+ 1 file changed, 49 insertions(+), 3 deletions(-)
-+
-+--- a/drivers/mtd/spi-nor/core.c
-++++ b/drivers/mtd/spi-nor/core.c
-+@@ -1447,6 +1447,23 @@ destroy_erase_cmd_list:
-+ 	return ret;
-+ }
-+ 
-++int spi_nor_check_set_addr_width(struct spi_nor *nor, loff_t addr)
-++{
-++	u8 addr_width;
-++
-++	if ((nor->flags & (SNOR_F_4B_OPCODES | SNOR_F_BROKEN_RESET)) !=
-++	    SNOR_F_BROKEN_RESET)
-++		return 0;
-++
-++	addr_width = addr & 0xff000000 ? 4 : 3;
-++	if (nor->addr_width == addr_width)
-++		return 0;
-++
-++	nor->addr_width = addr_width;
-++
-++	return nor->params->set_4byte_addr_mode(nor, addr_width == 4);
-++}
-++
-+ /*
-+  * Erase an address range on the nor chip.  The address range may extend
-+  * one or more erase sectors.  Return an error is there is a problem erasing.
-+@@ -1474,6 +1491,10 @@ static int spi_nor_erase(struct mtd_info
-+ 	if (ret)
-+ 		return ret;
-+ 
-++	ret = spi_nor_check_set_addr_width(nor, instr->addr + instr->len);
-++	if (ret < 0)
-++		return ret;
-++
-+ 	/* whole-chip erase? */
-+ 	if (len == mtd->size && !(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) {
-+ 		unsigned long timeout;
-+@@ -1533,6 +1554,7 @@ static int spi_nor_erase(struct mtd_info
-+ 	ret = spi_nor_write_disable(nor);
-+ 
-+ erase_err:
-++	spi_nor_check_set_addr_width(nor, 0);
-+ 	spi_nor_unlock_and_unprep(nor);
-+ 
-+ 	return ret;
-+@@ -1872,7 +1894,9 @@ static int spi_nor_lock(struct mtd_info
-+ 	if (ret)
-+ 		return ret;
-+ 
-++	spi_nor_check_set_addr_width(nor, ofs + len);
-+ 	ret = nor->params->locking_ops->lock(nor, ofs, len);
-++	spi_nor_check_set_addr_width(nor, 0);
-+ 
-+ 	spi_nor_unlock_and_unprep(nor);
-+ 	return ret;
-+@@ -1887,7 +1911,9 @@ static int spi_nor_unlock(struct mtd_inf
-+ 	if (ret)
-+ 		return ret;
-+ 
-++	spi_nor_check_set_addr_width(nor, ofs + len);
-+ 	ret = nor->params->locking_ops->unlock(nor, ofs, len);
-++	spi_nor_check_set_addr_width(nor, 0);
-+ 
-+ 	spi_nor_unlock_and_unprep(nor);
-+ 	return ret;
-+@@ -1902,7 +1928,9 @@ static int spi_nor_is_locked(struct mtd_
-+ 	if (ret)
-+ 		return ret;
-+ 
-++	spi_nor_check_set_addr_width(nor, ofs + len);
-+ 	ret = nor->params->locking_ops->is_locked(nor, ofs, len);
-++	spi_nor_check_set_addr_width(nor, 0);
-+ 
-+ 	spi_nor_unlock_and_unprep(nor);
-+ 	return ret;
-+@@ -2095,6 +2123,10 @@ static int spi_nor_read(struct mtd_info
-+ 	if (ret)
-+ 		return ret;
-+ 
-++	ret = spi_nor_check_set_addr_width(nor, from + len);
-++	if (ret < 0)
-++		return ret;
-++
-+ 	while (len) {
-+ 		loff_t addr = from;
-+ 
-+@@ -2118,6 +2150,7 @@ static int spi_nor_read(struct mtd_info
-+ 	ret = 0;
-+ 
-+ read_err:
-++	spi_nor_check_set_addr_width(nor, 0);
-+ 	spi_nor_unlock_and_unprep(nor);
-+ 	return ret;
-+ }
-+@@ -2140,6 +2173,10 @@ static int spi_nor_write(struct mtd_info
-+ 	if (ret)
-+ 		return ret;
-+ 
-++	ret = spi_nor_check_set_addr_width(nor, to + len);
-++	if (ret < 0)
-++		return ret;
-++
-+ 	for (i = 0; i < len; ) {
-+ 		ssize_t written;
-+ 		loff_t addr = to + i;
-+@@ -2182,6 +2219,7 @@ static int spi_nor_write(struct mtd_info
-+ 	}
-+ 
-+ write_err:
-++	spi_nor_check_set_addr_width(nor, 0);
-+ 	spi_nor_unlock_and_unprep(nor);
-+ 	return ret;
-+ }
-+@@ -2977,9 +3015,13 @@ static int spi_nor_init(struct spi_nor *
-+ 		 * reboots (e.g., crashes). Warn the user (or hopefully, system
-+ 		 * designer) that this is bad.
-+ 		 */
-+-		WARN_ONCE(nor->flags & SNOR_F_BROKEN_RESET,
-+-			  "enabling reset hack; may not recover from unexpected reboots\n");
-+-		nor->params->set_4byte_addr_mode(nor, true);
-++		if (nor->flags & SNOR_F_BROKEN_RESET) {
-++			dev_warn(nor->dev,
-++				"enabling reset hack; may not recover from unexpected reboots\n");
-++			nor->addr_width = 3;
-++		} else {
-++			nor->params->set_4byte_addr_mode(nor, true);
-++		}
-+ 	}
-+ 
-+ 	return 0;
-+--- a/drivers/mtd/spi-nor/core.h
-++++ b/drivers/mtd/spi-nor/core.h
-+@@ -400,6 +400,7 @@ extern const struct spi_nor_manufacturer
-+ extern const struct spi_nor_manufacturer spi_nor_xmc;
-+ extern const struct spi_nor_manufacturer spi_nor_xtx;
-+ 
-++int spi_nor_check_set_addr_width(struct spi_nor *nor, loff_t addr);
-+ int spi_nor_write_enable(struct spi_nor *nor);
-+ int spi_nor_write_disable(struct spi_nor *nor);
-+ int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable);
-+--- a/drivers/mtd/spi-nor/sst.c
-++++ b/drivers/mtd/spi-nor/sst.c
-+@@ -55,6 +55,10 @@ static int sst_write(struct mtd_info *mt
-+ 	if (ret)
-+ 		return ret;
-+ 
-++	ret = spi_nor_check_set_addr_width(nor, to + len);
-++	if (ret < 0)
-++		return ret;
-++
-+ 	ret = spi_nor_write_enable(nor);
-+ 	if (ret)
-+ 		goto out;
-+@@ -124,6 +128,7 @@ static int sst_write(struct mtd_info *mt
-+ 	}
-+ out:
-+ 	*retlen += actual;
-++	spi_nor_check_set_addr_width(nor, 0);
-+ 	spi_nor_unlock_and_unprep(nor);
-+ 	return ret;
-+ }
-diff --git a/target/linux/generic/pending-5.10/482-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch b/target/linux/generic/pending-5.10/482-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch
-new file mode 100644
-index 0000000000..c32cde559d
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/482-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch
-@@ -0,0 +1,22 @@
-+From d68b4aa22e8c625685bfad642dd7337948dc0ad1 Mon Sep 17 00:00:00 2001
-+From: Koen Vandeputte <koen.vandeputte@ncentric.com>
-+Date: Mon, 6 Jan 2020 13:07:56 +0100
-+Subject: [PATCH] mtd: spi-nor: add support for Gigadevice GD25D05
-+
-+Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
-+---
-+ drivers/mtd/spi-nor/spi-nor.c | 5 +++++
-+ 1 file changed, 5 insertions(+)
-+
-+--- a/drivers/mtd/spi-nor/gigadevice.c
-++++ b/drivers/mtd/spi-nor/gigadevice.c
-+@@ -24,6 +24,9 @@ static struct spi_nor_fixups gd25q256_fi
-+ };
-+ 
-+ static const struct flash_info gigadevice_parts[] = {
-++	{ "gd25q05", INFO(0xc84010, 0, 64 * 1024,  1,
-++			  SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
-++			  SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },
-+ 	{ "gd25q16", INFO(0xc84015, 0, 64 * 1024,  32,
-+ 			  SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
-+ 			  SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },
-diff --git a/target/linux/generic/pending-5.10/483-mtd-spi-nor-add-gd25q512.patch b/target/linux/generic/pending-5.10/483-mtd-spi-nor-add-gd25q512.patch
-new file mode 100644
-index 0000000000..6f41546964
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/483-mtd-spi-nor-add-gd25q512.patch
-@@ -0,0 +1,12 @@
-+--- a/drivers/mtd/spi-nor/gigadevice.c
-++++ b/drivers/mtd/spi-nor/gigadevice.c
-+@@ -53,6 +53,9 @@ static const struct flash_info gigadevic
-+ 			   SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK |
-+ 			   SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6)
-+ 		.fixups = &gd25q256_fixups },
-++	{ "gd25q512", INFO(0xc84020, 0, 64 * 1024, 1024,
-++			   SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
-++			   SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4B_OPCODES) },
-+ };
-+ 
-+ const struct spi_nor_manufacturer spi_nor_gigadevice = {
-diff --git a/target/linux/generic/pending-5.10/490-ubi-auto-attach-mtd-device-named-ubi-or-data-on-boot.patch b/target/linux/generic/pending-5.10/490-ubi-auto-attach-mtd-device-named-ubi-or-data-on-boot.patch
-new file mode 100644
-index 0000000000..7c9766fa7b
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/490-ubi-auto-attach-mtd-device-named-ubi-or-data-on-boot.patch
-@@ -0,0 +1,97 @@
-+From: Daniel Golle <daniel@makrotopia.org>
-+Subject: ubi: auto-attach mtd device named "ubi" or "data" on boot
-+
-+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
-+---
-+ drivers/mtd/ubi/build.c | 36 ++++++++++++++++++++++++++++++++++++
-+ 1 file changed, 36 insertions(+)
-+
-+--- a/drivers/mtd/ubi/build.c
-++++ b/drivers/mtd/ubi/build.c
-+@@ -1192,6 +1192,73 @@ static struct mtd_info * __init open_mtd
-+ 	return mtd;
-+ }
-+ 
-++/*
-++ * This function tries attaching mtd partitions named either "ubi" or "data"
-++ * during boot.
-++ */
-++static void __init ubi_auto_attach(void)
-++{
-++	int err;
-++	struct mtd_info *mtd;
-++	loff_t offset = 0;
-++	size_t len;
-++	char magic[4];
-++
-++	/* try attaching mtd device named "ubi" or "data" */
-++	mtd = open_mtd_device("ubi");
-++	if (IS_ERR(mtd))
-++		mtd = open_mtd_device("data");
-++
-++	if (IS_ERR(mtd))
-++		return;
-++
-++	/* get the first not bad block */
-++	if (mtd_can_have_bb(mtd))
-++		while (mtd_block_isbad(mtd, offset)) {
-++			offset += mtd->erasesize;
-++
-++			if (offset > mtd->size) {
-++				pr_err("UBI error: Failed to find a non-bad "
-++				       "block on mtd%d\n", mtd->index);
-++				goto cleanup;
-++			}
-++		}
-++
-++	/* check if the read from flash was successful */
-++	err = mtd_read(mtd, offset, 4, &len, (void *) magic);
-++	if ((err && !mtd_is_bitflip(err)) || len != 4) {
-++		pr_err("UBI error: unable to read from mtd%d\n", mtd->index);
-++		goto cleanup;
-++	}
-++
-++	/* check for a valid ubi magic */
-++	if (strncmp(magic, "UBI#", 4)) {
-++		pr_err("UBI error: no valid UBI magic found inside mtd%d\n", mtd->index);
-++		goto cleanup;
-++	}
-++
-++	/* don't auto-add media types where UBI doesn't makes sense */
-++	if (mtd->type != MTD_NANDFLASH &&
-++	    mtd->type != MTD_NORFLASH &&
-++	    mtd->type != MTD_DATAFLASH &&
-++	    mtd->type != MTD_MLCNANDFLASH)
-++		goto cleanup;
-++
-++	mutex_lock(&ubi_devices_mutex);
-++	pr_notice("UBI: auto-attach mtd%d\n", mtd->index);
-++	err = ubi_attach_mtd_dev(mtd, UBI_DEV_NUM_AUTO, 0, 0);
-++	mutex_unlock(&ubi_devices_mutex);
-++	if (err < 0) {
-++		pr_err("UBI error: cannot attach mtd%d\n", mtd->index);
-++		goto cleanup;
-++	}
-++
-++	return;
-++
-++cleanup:
-++	put_mtd_device(mtd);
-++}
-++
-+ static int __init ubi_init(void)
-+ {
-+ 	int err, i, k;
-+@@ -1275,6 +1342,12 @@ static int __init ubi_init(void)
-+ 		}
-+ 	}
-+ 
-++	/* auto-attach mtd devices only if built-in to the kernel and no ubi.mtd
-++	 * parameter was given */
-++	if (IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV) &&
-++	    !ubi_is_module() && !mtd_devs)
-++		ubi_auto_attach();
-++
-+ 	err = ubiblock_init();
-+ 	if (err) {
-+ 		pr_err("UBI error: block: cannot initialize, error %d\n", err);
-diff --git a/target/linux/generic/pending-5.10/491-ubi-auto-create-ubiblock-device-for-rootfs.patch b/target/linux/generic/pending-5.10/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
-new file mode 100644
-index 0000000000..a2b48fd4fc
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
-@@ -0,0 +1,69 @@
-+From: Daniel Golle <daniel@makrotopia.org>
-+Subject: ubi: auto-create ubiblock device for rootfs
-+
-+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
-+---
-+ drivers/mtd/ubi/block.c | 42 ++++++++++++++++++++++++++++++++++++++++++
-+ 1 file changed, 42 insertions(+)
-+
-+--- a/drivers/mtd/ubi/block.c
-++++ b/drivers/mtd/ubi/block.c
-+@@ -652,6 +652,47 @@ static void __init ubiblock_create_from_
-+ 	}
-+ }
-+ 
-++#define UBIFS_NODE_MAGIC  0x06101831
-++static inline int ubi_vol_is_ubifs(struct ubi_volume_desc *desc)
-++{
-++	int ret;
-++	uint32_t magic_of, magic;
-++	ret = ubi_read(desc, 0, (char *)&magic_of, 0, 4);
-++	if (ret)
-++		return 0;
-++	magic = le32_to_cpu(magic_of);
-++	return magic == UBIFS_NODE_MAGIC;
-++}
-++
-++static void __init ubiblock_create_auto_rootfs(void)
-++{
-++	int ubi_num, ret, is_ubifs;
-++	struct ubi_volume_desc *desc;
-++	struct ubi_volume_info vi;
-++
-++	for (ubi_num = 0; ubi_num < UBI_MAX_DEVICES; ubi_num++) {
-++		desc = ubi_open_volume_nm(ubi_num, "rootfs", UBI_READONLY);
-++		if (IS_ERR(desc))
-++			desc = ubi_open_volume_nm(ubi_num, "fit", UBI_READONLY);;
-++
-++		if (IS_ERR(desc))
-++			continue;
-++
-++		ubi_get_volume_info(desc, &vi);
-++		is_ubifs = ubi_vol_is_ubifs(desc);
-++		ubi_close_volume(desc);
-++		if (is_ubifs)
-++			break;
-++
-++		ret = ubiblock_create(&vi);
-++		if (ret)
-++			pr_err("UBI error: block: can't add '%s' volume, err=%d\n",
-++				vi.name, ret);
-++		/* always break if we get here */
-++		break;
-++	}
-++}
-++
-+ static void ubiblock_remove_all(void)
-+ {
-+ 	struct ubiblock *next;
-+@@ -684,6 +725,10 @@ int __init ubiblock_init(void)
-+ 	 */
-+ 	ubiblock_create_from_param();
-+ 
-++	/* auto-attach "rootfs" volume if existing and non-ubifs */
-++	if (IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV))
-++		ubiblock_create_auto_rootfs();
-++
-+ 	/*
-+ 	 * Block devices are only created upon user requests, so we ignore
-+ 	 * existing volumes.
-diff --git a/target/linux/generic/pending-5.10/492-try-auto-mounting-ubi0-rootfs-in-init-do_mounts.c.patch b/target/linux/generic/pending-5.10/492-try-auto-mounting-ubi0-rootfs-in-init-do_mounts.c.patch
-new file mode 100644
-index 0000000000..af65cbfa59
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/492-try-auto-mounting-ubi0-rootfs-in-init-do_mounts.c.patch
-@@ -0,0 +1,51 @@
-+From: Daniel Golle <daniel@makrotopia.org>
-+Subject: try auto-mounting ubi0:rootfs in init/do_mounts.c
-+
-+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
-+---
-+ init/do_mounts.c | 26 +++++++++++++++++++++++++-
-+ 1 file changed, 25 insertions(+), 1 deletion(-)
-+
-+--- a/init/do_mounts.c
-++++ b/init/do_mounts.c
-+@@ -474,7 +474,28 @@ retry:
-+ out:
-+ 	put_page(page);
-+ }
-+- 
-++
-++static int __init mount_ubi_rootfs(void)
-++{
-++	int flags = MS_SILENT;
-++	int err, tried = 0;
-++
-++	while (tried < 2) {
-++		err = do_mount_root("ubi0:rootfs", "ubifs", flags, \
-++					root_mount_data);
-++		switch (err) {
-++			case -EACCES:
-++				flags |= MS_RDONLY;
-++				tried++;
-++				break;
-++			default:
-++				return err;
-++		}
-++	}
-++
-++	return -EINVAL;
-++}
-++
-+ #ifdef CONFIG_ROOT_NFS
-+ 
-+ #define NFSROOT_TIMEOUT_MIN	5
-+@@ -567,6 +588,10 @@ void __init mount_root(void)
-+ 		return;
-+ 	}
-+ #endif
-++#ifdef CONFIG_MTD_ROOTFS_ROOT_DEV
-++	if (!mount_ubi_rootfs())
-++		return;
-++#endif
-+ #ifdef CONFIG_BLOCK
-+ 	{
-+ 		int err = create_dev("/dev/root", ROOT_DEV);
-diff --git a/target/linux/generic/pending-5.10/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch b/target/linux/generic/pending-5.10/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch
-new file mode 100644
-index 0000000000..2dff46807e
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch
-@@ -0,0 +1,34 @@
-+From: Daniel Golle <daniel@makrotopia.org>
-+Subject: ubi: set ROOT_DEV to ubiblock "rootfs" if unset
-+
-+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
-+---
-+ drivers/mtd/ubi/block.c | 10 ++++++++++
-+ 1 file changed, 10 insertions(+)
-+
-+--- a/drivers/mtd/ubi/block.c
-++++ b/drivers/mtd/ubi/block.c
-+@@ -42,6 +42,7 @@
-+ #include <linux/scatterlist.h>
-+ #include <linux/idr.h>
-+ #include <asm/div64.h>
-++#include <linux/root_dev.h>
-+ 
-+ #include "ubi-media.h"
-+ #include "ubi.h"
-+@@ -458,6 +459,15 @@ int ubiblock_create(struct ubi_volume_in
-+ 	dev_info(disk_to_dev(dev->gd), "created from ubi%d:%d(%s)",
-+ 		 dev->ubi_num, dev->vol_id, vi->name);
-+ 	mutex_unlock(&devices_mutex);
-++
-++	if (!strcmp(vi->name, "rootfs") &&
-++	    IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV) &&
-++	    ROOT_DEV == 0) {
-++		pr_notice("ubiblock: device ubiblock%d_%d (%s) set to be root filesystem\n",
-++			  dev->ubi_num, dev->vol_id, vi->name);
-++		ROOT_DEV = MKDEV(gd->major, gd->first_minor);
-++	}
-++
-+ 	return 0;
-+ 
-+ out_free_queue:
-diff --git a/target/linux/generic/pending-5.10/494-mtd-ubi-add-EOF-marker-support.patch b/target/linux/generic/pending-5.10/494-mtd-ubi-add-EOF-marker-support.patch
-new file mode 100644
-index 0000000000..81d32ca5a5
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/494-mtd-ubi-add-EOF-marker-support.patch
-@@ -0,0 +1,60 @@
-+From: Gabor Juhos <juhosg@openwrt.org>
-+Subject: mtd: add EOF marker support to the UBI layer
-+
-+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-+---
-+ drivers/mtd/ubi/attach.c | 25 ++++++++++++++++++++++---
-+ drivers/mtd/ubi/ubi.h    |  1 +
-+ 2 files changed, 23 insertions(+), 3 deletions(-)
-+
-+--- a/drivers/mtd/ubi/attach.c
-++++ b/drivers/mtd/ubi/attach.c
-+@@ -926,6 +926,13 @@ static bool vol_ignored(int vol_id)
-+ #endif
-+ }
-+ 
-++static bool ec_hdr_has_eof(struct ubi_ec_hdr *ech)
-++{
-++	return ech->padding1[0] == 'E' &&
-++	       ech->padding1[1] == 'O' &&
-++	       ech->padding1[2] == 'F';
-++}
-++
-+ /**
-+  * scan_peb - scan and process UBI headers of a PEB.
-+  * @ubi: UBI device description object
-+@@ -958,9 +965,21 @@ static int scan_peb(struct ubi_device *u
-+ 		return 0;
-+ 	}
-+ 
-+-	err = ubi_io_read_ec_hdr(ubi, pnum, ech, 0);
-+-	if (err < 0)
-+-		return err;
-++	if (!ai->eof_found) {
-++		err = ubi_io_read_ec_hdr(ubi, pnum, ech, 0);
-++		if (err < 0)
-++			return err;
-++
-++		if (ec_hdr_has_eof(ech)) {
-++			pr_notice("UBI: EOF marker found, PEBs from %d will be erased\n",
-++				pnum);
-++			ai->eof_found = true;
-++		}
-++	}
-++
-++	if (ai->eof_found)
-++		err = UBI_IO_FF_BITFLIPS;
-++
-+ 	switch (err) {
-+ 	case 0:
-+ 		break;
-+--- a/drivers/mtd/ubi/ubi.h
-++++ b/drivers/mtd/ubi/ubi.h
-+@@ -782,6 +782,7 @@ struct ubi_attach_info {
-+ 	int mean_ec;
-+ 	uint64_t ec_sum;
-+ 	int ec_count;
-++	bool eof_found;
-+ 	struct kmem_cache *aeb_slab_cache;
-+ 	struct ubi_ec_hdr *ech;
-+ 	struct ubi_vid_io_buf *vidb;
-diff --git a/target/linux/generic/pending-5.10/495-mtd-core-add-get_mtd_device_by_node.patch b/target/linux/generic/pending-5.10/495-mtd-core-add-get_mtd_device_by_node.patch
-new file mode 100644
-index 0000000000..7a7ad6b263
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/495-mtd-core-add-get_mtd_device_by_node.patch
-@@ -0,0 +1,75 @@
-+From 1bd1b740f208d1cf4071932cc51860d37266c402 Mon Sep 17 00:00:00 2001
-+From: Bernhard Frauendienst <kernel@nospam.obeliks.de>
-+Date: Sat, 1 Sep 2018 00:30:11 +0200
-+Subject: [PATCH 495/497] mtd: core: add get_mtd_device_by_node
-+
-+Add function to retrieve a mtd device by its OF node. Since drivers can
-+assign arbitrary names to mtd devices in the absence of a label
-+property, there is no other reliable way to retrieve a mtd device for a
-+given OF node.
-+
-+Signed-off-by: Bernhard Frauendienst <kernel@nospam.obeliks.de>
-+Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
-+---
-+ drivers/mtd/mtdcore.c   | 38 ++++++++++++++++++++++++++++++++++++++
-+ include/linux/mtd/mtd.h |  2 ++
-+ 2 files changed, 40 insertions(+)
-+
-+--- a/drivers/mtd/mtdcore.c
-++++ b/drivers/mtd/mtdcore.c
-+@@ -1053,6 +1053,44 @@ out_unlock:
-+ }
-+ EXPORT_SYMBOL_GPL(get_mtd_device_nm);
-+ 
-++/**
-++ *	get_mtd_device_by_node - obtain a validated handle for an MTD device
-++ *	by of_node
-++ *	@of_node: OF node of MTD device to open
-++ *
-++ *	This function returns MTD device description structure in case of
-++ *	success and an error code in case of failure.
-++ */
-++struct mtd_info *get_mtd_device_by_node(const struct device_node *of_node)
-++{
-++	int err = -ENODEV;
-++	struct mtd_info *mtd = NULL, *other;
-++
-++	mutex_lock(&mtd_table_mutex);
-++
-++	mtd_for_each_device(other) {
-++		if (of_node == other->dev.of_node) {
-++			mtd = other;
-++			break;
-++		}
-++	}
-++
-++	if (!mtd)
-++		goto out_unlock;
-++
-++	err = __get_mtd_device(mtd);
-++	if (err)
-++		goto out_unlock;
-++
-++	mutex_unlock(&mtd_table_mutex);
-++	return mtd;
-++
-++out_unlock:
-++	mutex_unlock(&mtd_table_mutex);
-++	return ERR_PTR(err);
-++}
-++EXPORT_SYMBOL_GPL(get_mtd_device_by_node);
-++
-+ void put_mtd_device(struct mtd_info *mtd)
-+ {
-+ 	mutex_lock(&mtd_table_mutex);
-+--- a/include/linux/mtd/mtd.h
-++++ b/include/linux/mtd/mtd.h
-+@@ -696,6 +696,8 @@ extern struct mtd_info *get_mtd_device(s
-+ extern int __get_mtd_device(struct mtd_info *mtd);
-+ extern void __put_mtd_device(struct mtd_info *mtd);
-+ extern struct mtd_info *get_mtd_device_nm(const char *name);
-++extern struct mtd_info *get_mtd_device_by_node(
-++		const struct device_node *of_node);
-+ extern void put_mtd_device(struct mtd_info *mtd);
-+ 
-+ static inline uint64_t mtdpart_get_offset(const struct mtd_info *mtd)
-diff --git a/target/linux/generic/pending-5.10/496-dt-bindings-add-bindings-for-mtd-concat-devices.patch b/target/linux/generic/pending-5.10/496-dt-bindings-add-bindings-for-mtd-concat-devices.patch
-new file mode 100644
-index 0000000000..01f3b9ec2d
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/496-dt-bindings-add-bindings-for-mtd-concat-devices.patch
-@@ -0,0 +1,52 @@
-+From 5734c6669fba7ddb5ef491ccff7159d15dba0b59 Mon Sep 17 00:00:00 2001
-+From: Bernhard Frauendienst <kernel@nospam.obeliks.de>
-+Date: Wed, 5 Sep 2018 01:32:51 +0200
-+Subject: [PATCH 496/497] dt-bindings: add bindings for mtd-concat devices
-+
-+Document virtual mtd-concat device bindings.
-+
-+Signed-off-by: Bernhard Frauendienst <kernel@nospam.obeliks.de>
-+---
-+ .../devicetree/bindings/mtd/mtd-concat.txt    | 36 +++++++++++++++++++
-+ 1 file changed, 36 insertions(+)
-+ create mode 100644 Documentation/devicetree/bindings/mtd/mtd-concat.txt
-+
-+--- /dev/null
-++++ b/Documentation/devicetree/bindings/mtd/mtd-concat.txt
-+@@ -0,0 +1,36 @@
-++Virtual MTD concat device
-++
-++Requires properties:
-++- devices: list of phandles to mtd nodes that should be concatenated
-++
-++Example:
-++
-++&spi {
-++	flash0: flash@0 {
-++		...
-++	};
-++	flash1: flash@1 {
-++		...
-++	};
-++};
-++
-++flash {
-++	compatible = "mtd-concat";
-++
-++	devices = <&flash0 &flash1>;
-++
-++	partitions {
-++		compatible = "fixed-partitions";
-++
-++		partition@0 {
-++			label = "boot";
-++			reg = <0x0000000 0x0040000>;
-++			read-only;
-++		};
-++
-++		partition@40000 {
-++			label = "firmware";
-++			reg = <0x0040000 0x1fc0000>;
-++		};
-++	}
-++}
-diff --git a/target/linux/generic/pending-5.10/497-mtd-mtdconcat-add-dt-driver-for-concat-devices.patch b/target/linux/generic/pending-5.10/497-mtd-mtdconcat-add-dt-driver-for-concat-devices.patch
-new file mode 100644
-index 0000000000..058cab09e5
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/497-mtd-mtdconcat-add-dt-driver-for-concat-devices.patch
-@@ -0,0 +1,216 @@
-+From e53f712d8eac71f54399b61038ccf87d2cee99d7 Mon Sep 17 00:00:00 2001
-+From: Bernhard Frauendienst <kernel@nospam.obeliks.de>
-+Date: Sat, 25 Aug 2018 12:35:22 +0200
-+Subject: [PATCH 497/497] mtd: mtdconcat: add dt driver for concat devices
-+
-+Some mtd drivers like physmap variants have support for concatenating
-+multiple mtd devices, but there is no generic way to define such a
-+concat device from within the device tree.
-+
-+This is useful for some SoC boards that use multiple flash chips as
-+memory banks of a single mtd device, with partitions spanning chip
-+borders.
-+
-+This commit adds a driver for creating virtual mtd-concat devices. They
-+must have a compatible = "mtd-concat" line, and define a list of devices
-+to concat in the 'devices' property, for example:
-+
-+flash {
-+  compatible = "mtd-concat";
-+
-+  devices = <&flash0 &flash1>;
-+
-+  partitions {
-+    ...
-+  };
-+};
-+
-+The driver is added to the very end of the mtd Makefile to increase the
-+likelyhood of all child devices already being loaded at the time of
-+probing, preventing unnecessary deferred probes.
-+
-+Signed-off-by: Bernhard Frauendienst <kernel@nospam.obeliks.de>
-+---
-+ drivers/mtd/Kconfig                 |   2 +
-+ drivers/mtd/Makefile                |   3 +
-+ drivers/mtd/composite/Kconfig       |  12 +++
-+ drivers/mtd/composite/Makefile      |   6 ++
-+ drivers/mtd/composite/virt_concat.c | 128 ++++++++++++++++++++++++++++
-+ 5 files changed, 151 insertions(+)
-+ create mode 100644 drivers/mtd/composite/Kconfig
-+ create mode 100644 drivers/mtd/composite/Makefile
-+ create mode 100644 drivers/mtd/composite/virt_concat.c
-+
-+--- a/drivers/mtd/Kconfig
-++++ b/drivers/mtd/Kconfig
-+@@ -238,4 +238,6 @@ source "drivers/mtd/ubi/Kconfig"
-+ 
-+ source "drivers/mtd/hyperbus/Kconfig"
-+ 
-++source "drivers/mtd/composite/Kconfig"
-++
-+ endif # MTD
-+--- a/drivers/mtd/Makefile
-++++ b/drivers/mtd/Makefile
-+@@ -33,3 +33,6 @@ obj-y		+= chips/ lpddr/ maps/ devices/ n
-+ obj-$(CONFIG_MTD_SPI_NOR)	+= spi-nor/
-+ obj-$(CONFIG_MTD_UBI)		+= ubi/
-+ obj-$(CONFIG_MTD_HYPERBUS)	+= hyperbus/
-++
-++# Composite drivers must be loaded last
-++obj-y				+= composite/
-+--- /dev/null
-++++ b/drivers/mtd/composite/Kconfig
-+@@ -0,0 +1,12 @@
-++menu "Composite MTD device drivers"
-++	depends on MTD!=n
-++
-++config MTD_VIRT_CONCAT
-++	tristate "Virtual concat MTD device"
-++	help
-++	  This driver allows creation of a virtual MTD concat device, which
-++	  concatenates multiple underlying MTD devices to a single device.
-++	  This is required by some SoC boards where multiple memory banks are
-++	  used as one device with partitions spanning across device boundaries.
-++
-++endmenu
-+--- /dev/null
-++++ b/drivers/mtd/composite/Makefile
-+@@ -0,0 +1,6 @@
-++# SPDX-License-Identifier: GPL-2.0
-++#
-++# linux/drivers/mtd/composite/Makefile
-++#
-++
-++obj-$(CONFIG_MTD_VIRT_CONCAT)   += virt_concat.o
-+--- /dev/null
-++++ b/drivers/mtd/composite/virt_concat.c
-+@@ -0,0 +1,128 @@
-++// SPDX-License-Identifier: GPL-2.0+
-++/*
-++ * Virtual concat MTD device driver
-++ *
-++ * Copyright (C) 2018 Bernhard Frauendienst
-++ * Author: Bernhard Frauendienst, kernel@nospam.obeliks.de
-++ */
-++
-++#include <linux/module.h>
-++#include <linux/device.h>
-++#include <linux/mtd/concat.h>
-++#include <linux/mtd/mtd.h>
-++#include <linux/mtd/partitions.h>
-++#include <linux/of.h>
-++#include <linux/of_platform.h>
-++#include <linux/slab.h>
-++
-++/*
-++ * struct of_virt_concat - platform device driver data.
-++ * @cmtd the final mtd_concat device
-++ * @num_devices the number of devices in @devices
-++ * @devices points to an array of devices already loaded
-++ */
-++struct of_virt_concat {
-++	struct mtd_info	*cmtd;
-++	int num_devices;
-++	struct mtd_info	**devices;
-++};
-++
-++static int virt_concat_remove(struct platform_device *pdev)
-++{
-++	struct of_virt_concat *info;
-++	int i;
-++
-++	info = platform_get_drvdata(pdev);
-++	if (!info)
-++		return 0;
-++
-++	// unset data for when this is called after a probe error
-++	platform_set_drvdata(pdev, NULL);
-++
-++	if (info->cmtd) {
-++		mtd_device_unregister(info->cmtd);
-++		mtd_concat_destroy(info->cmtd);
-++	}
-++
-++	if (info->devices) {
-++		for (i = 0; i < info->num_devices; i++)
-++			put_mtd_device(info->devices[i]);
-++	}
-++
-++	return 0;
-++}
-++
-++static int virt_concat_probe(struct platform_device *pdev)
-++{
-++	struct device_node *node = pdev->dev.of_node;
-++	struct of_phandle_iterator it;
-++	struct of_virt_concat *info;
-++	struct mtd_info *mtd;
-++	int err = 0, count;
-++
-++	count = of_count_phandle_with_args(node, "devices", NULL);
-++	if (count <= 0)
-++		return -EINVAL;
-++
-++	info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
-++	if (!info)
-++		return -ENOMEM;
-++	info->devices = devm_kcalloc(&pdev->dev, count,
-++				     sizeof(*(info->devices)), GFP_KERNEL);
-++	if (!info->devices) {
-++		err = -ENOMEM;
-++		goto err_remove;
-++	}
-++
-++	platform_set_drvdata(pdev, info);
-++
-++	of_for_each_phandle(&it, err, node, "devices", NULL, 0) {
-++		mtd = get_mtd_device_by_node(it.node);
-++		if (IS_ERR(mtd)) {
-++			of_node_put(it.node);
-++			err = -EPROBE_DEFER;
-++			goto err_remove;
-++		}
-++
-++		info->devices[info->num_devices++] = mtd;
-++	}
-++
-++	info->cmtd = mtd_concat_create(info->devices, info->num_devices,
-++				       dev_name(&pdev->dev));
-++	if (!info->cmtd) {
-++		err = -ENXIO;
-++		goto err_remove;
-++	}
-++
-++	info->cmtd->dev.parent = &pdev->dev;
-++	mtd_set_of_node(info->cmtd, node);
-++	mtd_device_register(info->cmtd, NULL, 0);
-++
-++	return 0;
-++
-++err_remove:
-++	virt_concat_remove(pdev);
-++
-++	return err;
-++}
-++
-++static const struct of_device_id virt_concat_of_match[] = {
-++	{ .compatible = "mtd-concat", },
-++	{ /* sentinel */ }
-++};
-++MODULE_DEVICE_TABLE(of, virt_concat_of_match);
-++
-++static struct platform_driver virt_concat_driver = {
-++	.probe = virt_concat_probe,
-++	.remove = virt_concat_remove,
-++	.driver	 = {
-++		.name   = "virt-mtdconcat",
-++		.of_match_table = virt_concat_of_match,
-++	},
-++};
-++
-++module_platform_driver(virt_concat_driver);
-++
-++MODULE_LICENSE("GPL v2");
-++MODULE_AUTHOR("Bernhard Frauendienst <kernel@nospam.obeliks.de>");
-++MODULE_DESCRIPTION("Virtual concat MTD device driver");
-diff --git a/target/linux/generic/pending-5.10/498-mtd-mtdconcat-select-readwrite-function.patch b/target/linux/generic/pending-5.10/498-mtd-mtdconcat-select-readwrite-function.patch
-new file mode 100644
-index 0000000000..9aad0f3e6c
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/498-mtd-mtdconcat-select-readwrite-function.patch
-@@ -0,0 +1,24 @@
-+--- a/drivers/mtd/mtdconcat.c
-++++ b/drivers/mtd/mtdconcat.c
-+@@ -683,8 +683,12 @@ struct mtd_info *mtd_concat_create(struc
-+ 		concat->mtd._writev = concat_writev;
-+ 	if (subdev[0]->_read_oob)
-+ 		concat->mtd._read_oob = concat_read_oob;
-++	else
-++		concat->mtd._read = concat_read;
-+ 	if (subdev[0]->_write_oob)
-+ 		concat->mtd._write_oob = concat_write_oob;
-++	else
-++		concat->mtd._write = concat_write;
-+ 	if (subdev[0]->_block_isbad)
-+ 		concat->mtd._block_isbad = concat_block_isbad;
-+ 	if (subdev[0]->_block_markbad)
-+@@ -744,8 +748,6 @@ struct mtd_info *mtd_concat_create(struc
-+ 	concat->mtd.name = name;
-+ 
-+ 	concat->mtd._erase = concat_erase;
-+-	concat->mtd._read = concat_read;
-+-	concat->mtd._write = concat_write;
-+ 	concat->mtd._sync = concat_sync;
-+ 	concat->mtd._lock = concat_lock;
-+ 	concat->mtd._unlock = concat_unlock;
-diff --git a/target/linux/generic/pending-5.10/499-mtd-don-t-lock-when-recursively-deleting-partitions.patch b/target/linux/generic/pending-5.10/499-mtd-don-t-lock-when-recursively-deleting-partitions.patch
-new file mode 100644
-index 0000000000..505131b684
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/499-mtd-don-t-lock-when-recursively-deleting-partitions.patch
-@@ -0,0 +1,24 @@
-+From: David Bauer <mail@david-bauer.net>
-+Date: Wed, 17 Feb 2021 03:21:39 +0100
-+Subject: [PATCH] mtd: don't lock when recursively deleting partitions
-+
-+When recursively deleting partitions, don't acquire the masters
-+partition lock twice. Otherwise the process endy up in a deadlocked
-+state.
-+
-+Signed-off-by: David Bauer <mail@david-bauer.net>
-+---
-+ drivers/mtd/mtdpart.c | 2 +-
-+ 1 file changed, 1 insertion(+), 1 deletion(-)
-+
-+--- a/drivers/mtd/mtdpart.c
-++++ b/drivers/mtd/mtdpart.c
-+@@ -474,7 +474,7 @@ static int __del_mtd_partitions(struct m
-+ 
-+ 	list_for_each_entry_safe(child, next, &mtd->partitions, part.node) {
-+ 		if (mtd_has_partitions(child))
-+-			del_mtd_partitions(child);
-++			__del_mtd_partitions(child);
-+ 
-+ 		pr_info("Deleting %s MTD partition\n", child->name);
-+ 		ret = del_mtd_device(child);
-diff --git a/target/linux/generic/pending-5.10/500-fs_cdrom_dependencies.patch b/target/linux/generic/pending-5.10/500-fs_cdrom_dependencies.patch
-new file mode 100644
-index 0000000000..0a5a3aae5d
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/500-fs_cdrom_dependencies.patch
-@@ -0,0 +1,40 @@
-+--- a/fs/hfs/Kconfig
-++++ b/fs/hfs/Kconfig
-+@@ -2,6 +2,7 @@
-+ config HFS_FS
-+ 	tristate "Apple Macintosh file system support"
-+ 	depends on BLOCK
-++	select CDROM
-+ 	select NLS
-+ 	help
-+ 	  If you say Y here, you will be able to mount Macintosh-formatted
-+--- a/fs/hfsplus/Kconfig
-++++ b/fs/hfsplus/Kconfig
-+@@ -2,6 +2,7 @@
-+ config HFSPLUS_FS
-+ 	tristate "Apple Extended HFS file system support"
-+ 	depends on BLOCK
-++	select CDROM
-+ 	select NLS
-+ 	select NLS_UTF8
-+ 	help
-+--- a/fs/isofs/Kconfig
-++++ b/fs/isofs/Kconfig
-+@@ -1,6 +1,7 @@
-+ # SPDX-License-Identifier: GPL-2.0-only
-+ config ISO9660_FS
-+ 	tristate "ISO 9660 CDROM file system support"
-++	select CDROM
-+ 	help
-+ 	  This is the standard file system used on CD-ROMs.  It was previously
-+ 	  known as "High Sierra File System" and is called "hsfs" on other
-+--- a/fs/udf/Kconfig
-++++ b/fs/udf/Kconfig
-+@@ -1,6 +1,7 @@
-+ # SPDX-License-Identifier: GPL-2.0-only
-+ config UDF_FS
-+ 	tristate "UDF file system support"
-++	select CDROM
-+ 	select CRC_ITU_T
-+ 	select NLS
-+ 	help
-diff --git a/target/linux/generic/pending-5.10/530-jffs2_make_lzma_available.patch b/target/linux/generic/pending-5.10/530-jffs2_make_lzma_available.patch
-new file mode 100644
-index 0000000000..1bccb30a69
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/530-jffs2_make_lzma_available.patch
-@@ -0,0 +1,5180 @@
-+From: Alexandros C. Couloumbis <alex@ozo.com>
-+Subject: fs: add jffs2/lzma support (not activated by default yet)
-+
-+lede-commit: c2c88d315fa0e881f8b19da07b62859b915b11b2
-+Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
-+---
-+ fs/jffs2/Kconfig             |    9 +
-+ fs/jffs2/Makefile            |    3 +
-+ fs/jffs2/compr.c             |    6 +
-+ fs/jffs2/compr.h             |   10 +-
-+ fs/jffs2/compr_lzma.c        |  128 +++
-+ fs/jffs2/super.c             |   33 +-
-+ include/linux/lzma.h         |   62 ++
-+ include/linux/lzma/LzFind.h  |  115 +++
-+ include/linux/lzma/LzHash.h  |   54 +
-+ include/linux/lzma/LzmaDec.h |  231 +++++
-+ include/linux/lzma/LzmaEnc.h |   80 ++
-+ include/linux/lzma/Types.h   |  226 +++++
-+ include/uapi/linux/jffs2.h   |    1 +
-+ lib/Kconfig                  |    6 +
-+ lib/Makefile                 |   12 +
-+ lib/lzma/LzFind.c            |  761 ++++++++++++++
-+ lib/lzma/LzmaDec.c           |  999 +++++++++++++++++++
-+ lib/lzma/LzmaEnc.c           | 2271 ++++++++++++++++++++++++++++++++++++++++++
-+ lib/lzma/Makefile            |    7 +
-+ 19 files changed, 5008 insertions(+), 6 deletions(-)
-+ create mode 100644 fs/jffs2/compr_lzma.c
-+ create mode 100644 include/linux/lzma.h
-+ create mode 100644 include/linux/lzma/LzFind.h
-+ create mode 100644 include/linux/lzma/LzHash.h
-+ create mode 100644 include/linux/lzma/LzmaDec.h
-+ create mode 100644 include/linux/lzma/LzmaEnc.h
-+ create mode 100644 include/linux/lzma/Types.h
-+ create mode 100644 lib/lzma/LzFind.c
-+ create mode 100644 lib/lzma/LzmaDec.c
-+ create mode 100644 lib/lzma/LzmaEnc.c
-+ create mode 100644 lib/lzma/Makefile
-+
-+--- a/fs/jffs2/Kconfig
-++++ b/fs/jffs2/Kconfig
-+@@ -136,6 +136,15 @@ config JFFS2_LZO
-+ 	  This feature was added in July, 2007. Say 'N' if you need
-+ 	  compatibility with older bootloaders or kernels.
-+ 
-++config JFFS2_LZMA
-++	bool "JFFS2 LZMA compression support" if JFFS2_COMPRESSION_OPTIONS
-++	select LZMA_COMPRESS
-++	select LZMA_DECOMPRESS
-++	depends on JFFS2_FS
-++	default n
-++	help
-++	  JFFS2 wrapper to the LZMA C SDK
-++
-+ config JFFS2_RTIME
-+ 	bool "JFFS2 RTIME compression support" if JFFS2_COMPRESSION_OPTIONS
-+ 	depends on JFFS2_FS
-+--- a/fs/jffs2/Makefile
-++++ b/fs/jffs2/Makefile
-+@@ -19,4 +19,7 @@ jffs2-$(CONFIG_JFFS2_RUBIN)	+= compr_rub
-+ jffs2-$(CONFIG_JFFS2_RTIME)	+= compr_rtime.o
-+ jffs2-$(CONFIG_JFFS2_ZLIB)	+= compr_zlib.o
-+ jffs2-$(CONFIG_JFFS2_LZO)	+= compr_lzo.o
-++jffs2-$(CONFIG_JFFS2_LZMA)	+= compr_lzma.o
-+ jffs2-$(CONFIG_JFFS2_SUMMARY)   += summary.o
-++
-++CFLAGS_compr_lzma.o += -Iinclude/linux -Ilib/lzma
-+--- a/fs/jffs2/compr.c
-++++ b/fs/jffs2/compr.c
-+@@ -378,6 +378,9 @@ int __init jffs2_compressors_init(void)
-+ #ifdef CONFIG_JFFS2_LZO
-+ 	jffs2_lzo_init();
-+ #endif
-++#ifdef CONFIG_JFFS2_LZMA
-++	jffs2_lzma_init();
-++#endif
-+ /* Setting default compression mode */
-+ #ifdef CONFIG_JFFS2_CMODE_NONE
-+ 	jffs2_compression_mode = JFFS2_COMPR_MODE_NONE;
-+@@ -401,6 +404,9 @@ int __init jffs2_compressors_init(void)
-+ int jffs2_compressors_exit(void)
-+ {
-+ /* Unregistering compressors */
-++#ifdef CONFIG_JFFS2_LZMA
-++	jffs2_lzma_exit();
-++#endif
-+ #ifdef CONFIG_JFFS2_LZO
-+ 	jffs2_lzo_exit();
-+ #endif
-+--- a/fs/jffs2/compr.h
-++++ b/fs/jffs2/compr.h
-+@@ -29,9 +29,9 @@
-+ #define JFFS2_DYNRUBIN_PRIORITY  20
-+ #define JFFS2_LZARI_PRIORITY     30
-+ #define JFFS2_RTIME_PRIORITY     50
-+-#define JFFS2_ZLIB_PRIORITY      60
-+-#define JFFS2_LZO_PRIORITY       80
-+-
-++#define JFFS2_LZMA_PRIORITY      70
-++#define JFFS2_ZLIB_PRIORITY      80
-++#define JFFS2_LZO_PRIORITY       90
-+ 
-+ #define JFFS2_RUBINMIPS_DISABLED /* RUBINs will be used only */
-+ #define JFFS2_DYNRUBIN_DISABLED  /*	   for decompression */
-+@@ -101,5 +101,9 @@ void jffs2_zlib_exit(void);
-+ int jffs2_lzo_init(void);
-+ void jffs2_lzo_exit(void);
-+ #endif
-++#ifdef CONFIG_JFFS2_LZMA
-++int jffs2_lzma_init(void);
-++void jffs2_lzma_exit(void);
-++#endif
-+ 
-+ #endif /* __JFFS2_COMPR_H__ */
-+--- /dev/null
-++++ b/fs/jffs2/compr_lzma.c
-+@@ -0,0 +1,128 @@
-++/*
-++ * JFFS2 -- Journalling Flash File System, Version 2.
-++ *
-++ * For licensing information, see the file 'LICENCE' in this directory.
-++ *
-++ * JFFS2 wrapper to the LZMA C SDK
-++ *
-++ */
-++
-++#include <linux/lzma.h>
-++#include "compr.h"
-++
-++#ifdef __KERNEL__
-++	static DEFINE_MUTEX(deflate_mutex);
-++#endif
-++
-++CLzmaEncHandle *p;
-++Byte propsEncoded[LZMA_PROPS_SIZE];
-++SizeT propsSize = sizeof(propsEncoded);
-++
-++STATIC void lzma_free_workspace(void)
-++{
-++	LzmaEnc_Destroy(p, &lzma_alloc, &lzma_alloc);
-++}
-++
-++STATIC int INIT lzma_alloc_workspace(CLzmaEncProps *props)
-++{
-++	if ((p = (CLzmaEncHandle *)LzmaEnc_Create(&lzma_alloc)) == NULL)
-++	{
-++		PRINT_ERROR("Failed to allocate lzma deflate workspace\n");
-++		return -ENOMEM;
-++	}
-++
-++	if (LzmaEnc_SetProps(p, props) != SZ_OK)
-++	{
-++		lzma_free_workspace();
-++		return -1;
-++	}
-++
-++	if (LzmaEnc_WriteProperties(p, propsEncoded, &propsSize) != SZ_OK)
-++	{
-++		lzma_free_workspace();
-++		return -1;
-++	}
-++
-++	return 0;
-++}
-++
-++STATIC int jffs2_lzma_compress(unsigned char *data_in, unsigned char *cpage_out,
-++			      uint32_t *sourcelen, uint32_t *dstlen)
-++{
-++	SizeT compress_size = (SizeT)(*dstlen);
-++	int ret;
-++
-++	#ifdef __KERNEL__
-++		mutex_lock(&deflate_mutex);
-++	#endif
-++
-++	ret = LzmaEnc_MemEncode(p, cpage_out, &compress_size, data_in, *sourcelen,
-++		0, NULL, &lzma_alloc, &lzma_alloc);
-++
-++	#ifdef __KERNEL__
-++		mutex_unlock(&deflate_mutex);
-++	#endif
-++
-++	if (ret != SZ_OK)
-++		return -1;
-++
-++	*dstlen = (uint32_t)compress_size;
-++
-++	return 0;
-++}
-++
-++STATIC int jffs2_lzma_decompress(unsigned char *data_in, unsigned char *cpage_out,
-++				 uint32_t srclen, uint32_t destlen)
-++{
-++	int ret;
-++	SizeT dl = (SizeT)destlen;
-++	SizeT sl = (SizeT)srclen;
-++	ELzmaStatus status;
-++
-++	ret = LzmaDecode(cpage_out, &dl, data_in, &sl, propsEncoded,
-++		propsSize, LZMA_FINISH_ANY, &status, &lzma_alloc);
-++
-++	if (ret != SZ_OK || status == LZMA_STATUS_NOT_FINISHED || dl != (SizeT)destlen)
-++		return -1;
-++
-++	return 0;
-++}
-++
-++static struct jffs2_compressor jffs2_lzma_comp = {
-++	.priority = JFFS2_LZMA_PRIORITY,
-++	.name = "lzma",
-++	.compr = JFFS2_COMPR_LZMA,
-++	.compress = &jffs2_lzma_compress,
-++	.decompress = &jffs2_lzma_decompress,
-++	.disabled = 0,
-++};
-++
-++int INIT jffs2_lzma_init(void)
-++{
-++	int ret;
-++	CLzmaEncProps props;
-++	LzmaEncProps_Init(&props);
-++
-++	props.dictSize = LZMA_BEST_DICT(0x2000);
-++	props.level = LZMA_BEST_LEVEL;
-++	props.lc = LZMA_BEST_LC;
-++	props.lp = LZMA_BEST_LP;
-++	props.pb = LZMA_BEST_PB;
-++	props.fb = LZMA_BEST_FB;
-++
-++	ret = lzma_alloc_workspace(&props);
-++	if (ret < 0)
-++		return ret;
-++
-++	ret = jffs2_register_compressor(&jffs2_lzma_comp);
-++	if (ret)
-++		lzma_free_workspace();
-++
-++	return ret;
-++}
-++
-++void jffs2_lzma_exit(void)
-++{
-++	jffs2_unregister_compressor(&jffs2_lzma_comp);
-++	lzma_free_workspace();
-++}
-+--- a/fs/jffs2/super.c
-++++ b/fs/jffs2/super.c
-+@@ -374,14 +374,41 @@ static int __init init_jffs2_fs(void)
-+ 	BUILD_BUG_ON(sizeof(struct jffs2_raw_inode) != 68);
-+ 	BUILD_BUG_ON(sizeof(struct jffs2_raw_summary) != 32);
-+ 
-+-	pr_info("version 2.2."
-++	pr_info("version 2.2"
-+ #ifdef CONFIG_JFFS2_FS_WRITEBUFFER
-+ 	       " (NAND)"
-+ #endif
-+ #ifdef CONFIG_JFFS2_SUMMARY
-+-	       " (SUMMARY) "
-++	       " (SUMMARY)"
-+ #endif
-+-	       " © 2001-2006 Red Hat, Inc.\n");
-++#ifdef CONFIG_JFFS2_ZLIB
-++	       " (ZLIB)"
-++#endif
-++#ifdef CONFIG_JFFS2_LZO
-++	       " (LZO)"
-++#endif
-++#ifdef CONFIG_JFFS2_LZMA
-++	       " (LZMA)"
-++#endif
-++#ifdef CONFIG_JFFS2_RTIME
-++	       " (RTIME)"
-++#endif
-++#ifdef CONFIG_JFFS2_RUBIN
-++	       " (RUBIN)"
-++#endif
-++#ifdef  CONFIG_JFFS2_CMODE_NONE
-++	       " (CMODE_NONE)"
-++#endif
-++#ifdef CONFIG_JFFS2_CMODE_PRIORITY
-++	       " (CMODE_PRIORITY)"
-++#endif
-++#ifdef CONFIG_JFFS2_CMODE_SIZE
-++	       " (CMODE_SIZE)"
-++#endif
-++#ifdef CONFIG_JFFS2_CMODE_FAVOURLZO
-++	       " (CMODE_FAVOURLZO)"
-++#endif
-++	       " (c) 2001-2006 Red Hat, Inc.\n");
-+ 
-+ 	jffs2_inode_cachep = kmem_cache_create("jffs2_i",
-+ 					     sizeof(struct jffs2_inode_info),
-+--- /dev/null
-++++ b/include/linux/lzma.h
-+@@ -0,0 +1,62 @@
-++#ifndef __LZMA_H__
-++#define __LZMA_H__
-++
-++#ifdef __KERNEL__
-++	#include <linux/kernel.h>
-++	#include <linux/sched.h>
-++	#include <linux/slab.h>
-++	#include <linux/vmalloc.h>
-++	#include <linux/init.h>
-++	#define LZMA_MALLOC vmalloc
-++	#define LZMA_FREE vfree
-++	#define PRINT_ERROR(msg) printk(KERN_WARNING #msg)
-++	#define INIT __init
-++	#define STATIC static
-++#else
-++	#include <stdint.h>
-++	#include <stdlib.h>
-++	#include <stdio.h>
-++	#include <unistd.h>
-++	#include <string.h>
-++	#include <asm/types.h>
-++	#include <errno.h>
-++	#include <linux/jffs2.h>
-++	#ifndef PAGE_SIZE
-++		extern int page_size;
-++		#define PAGE_SIZE page_size
-++	#endif
-++	#define LZMA_MALLOC malloc
-++	#define LZMA_FREE free
-++	#define PRINT_ERROR(msg) fprintf(stderr, msg)
-++	#define INIT
-++	#define STATIC
-++#endif
-++
-++#include "lzma/LzmaDec.h"
-++#include "lzma/LzmaEnc.h"
-++
-++#define LZMA_BEST_LEVEL (9)
-++#define LZMA_BEST_LC    (0)
-++#define LZMA_BEST_LP    (0)
-++#define LZMA_BEST_PB    (0)
-++#define LZMA_BEST_FB  (273)
-++
-++#define LZMA_BEST_DICT(n) (((int)((n) / 2)) * 2)
-++
-++static void *p_lzma_malloc(void *p, size_t size)
-++{
-++	if (size == 0)
-++		return NULL;
-++
-++	return LZMA_MALLOC(size);
-++}
-++
-++static void p_lzma_free(void *p, void *address)
-++{
-++	if (address != NULL)
-++		LZMA_FREE(address);
-++}
-++
-++static ISzAlloc lzma_alloc = {p_lzma_malloc, p_lzma_free};
-++
-++#endif
-+--- /dev/null
-++++ b/include/linux/lzma/LzFind.h
-+@@ -0,0 +1,115 @@
-++/* LzFind.h -- Match finder for LZ algorithms
-++2009-04-22 : Igor Pavlov : Public domain */
-++
-++#ifndef __LZ_FIND_H
-++#define __LZ_FIND_H
-++
-++#include "Types.h"
-++
-++#ifdef __cplusplus
-++extern "C" {
-++#endif
-++
-++typedef UInt32 CLzRef;
-++
-++typedef struct _CMatchFinder
-++{
-++  Byte *buffer;
-++  UInt32 pos;
-++  UInt32 posLimit;
-++  UInt32 streamPos;
-++  UInt32 lenLimit;
-++
-++  UInt32 cyclicBufferPos;
-++  UInt32 cyclicBufferSize; /* it must be = (historySize + 1) */
-++
-++  UInt32 matchMaxLen;
-++  CLzRef *hash;
-++  CLzRef *son;
-++  UInt32 hashMask;
-++  UInt32 cutValue;
-++
-++  Byte *bufferBase;
-++  ISeqInStream *stream;
-++  int streamEndWasReached;
-++
-++  UInt32 blockSize;
-++  UInt32 keepSizeBefore;
-++  UInt32 keepSizeAfter;
-++
-++  UInt32 numHashBytes;
-++  int directInput;
-++  size_t directInputRem;
-++  int btMode;
-++  int bigHash;
-++  UInt32 historySize;
-++  UInt32 fixedHashSize;
-++  UInt32 hashSizeSum;
-++  UInt32 numSons;
-++  SRes result;
-++  UInt32 crc[256];
-++} CMatchFinder;
-++
-++#define Inline_MatchFinder_GetPointerToCurrentPos(p) ((p)->buffer)
-++#define Inline_MatchFinder_GetIndexByte(p, index) ((p)->buffer[(Int32)(index)])
-++
-++#define Inline_MatchFinder_GetNumAvailableBytes(p) ((p)->streamPos - (p)->pos)
-++
-++int MatchFinder_NeedMove(CMatchFinder *p);
-++Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p);
-++void MatchFinder_MoveBlock(CMatchFinder *p);
-++void MatchFinder_ReadIfRequired(CMatchFinder *p);
-++
-++void MatchFinder_Construct(CMatchFinder *p);
-++
-++/* Conditions:
-++     historySize <= 3 GB
-++     keepAddBufferBefore + matchMaxLen + keepAddBufferAfter < 511MB
-++*/
-++int MatchFinder_Create(CMatchFinder *p, UInt32 historySize,
-++    UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter,
-++    ISzAlloc *alloc);
-++void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc);
-++void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems);
-++void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue);
-++
-++UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *buffer, CLzRef *son,
-++    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue,
-++    UInt32 *distances, UInt32 maxLen);
-++
-++/*
-++Conditions:
-++  Mf_GetNumAvailableBytes_Func must be called before each Mf_GetMatchLen_Func.
-++  Mf_GetPointerToCurrentPos_Func's result must be used only before any other function
-++*/
-++
-++typedef void (*Mf_Init_Func)(void *object);
-++typedef Byte (*Mf_GetIndexByte_Func)(void *object, Int32 index);
-++typedef UInt32 (*Mf_GetNumAvailableBytes_Func)(void *object);
-++typedef const Byte * (*Mf_GetPointerToCurrentPos_Func)(void *object);
-++typedef UInt32 (*Mf_GetMatches_Func)(void *object, UInt32 *distances);
-++typedef void (*Mf_Skip_Func)(void *object, UInt32);
-++
-++typedef struct _IMatchFinder
-++{
-++  Mf_Init_Func Init;
-++  Mf_GetIndexByte_Func GetIndexByte;
-++  Mf_GetNumAvailableBytes_Func GetNumAvailableBytes;
-++  Mf_GetPointerToCurrentPos_Func GetPointerToCurrentPos;
-++  Mf_GetMatches_Func GetMatches;
-++  Mf_Skip_Func Skip;
-++} IMatchFinder;
-++
-++void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable);
-++
-++void MatchFinder_Init(CMatchFinder *p);
-++UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
-++UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
-++void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
-++void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
-++
-++#ifdef __cplusplus
-++}
-++#endif
-++
-++#endif
-+--- /dev/null
-++++ b/include/linux/lzma/LzHash.h
-+@@ -0,0 +1,54 @@
-++/* LzHash.h -- HASH functions for LZ algorithms
-++2009-02-07 : Igor Pavlov : Public domain */
-++
-++#ifndef __LZ_HASH_H
-++#define __LZ_HASH_H
-++
-++#define kHash2Size (1 << 10)
-++#define kHash3Size (1 << 16)
-++#define kHash4Size (1 << 20)
-++
-++#define kFix3HashSize (kHash2Size)
-++#define kFix4HashSize (kHash2Size + kHash3Size)
-++#define kFix5HashSize (kHash2Size + kHash3Size + kHash4Size)
-++
-++#define HASH2_CALC hashValue = cur[0] | ((UInt32)cur[1] << 8);
-++
-++#define HASH3_CALC { \
-++  UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
-++  hash2Value = temp & (kHash2Size - 1); \
-++  hashValue = (temp ^ ((UInt32)cur[2] << 8)) & p->hashMask; }
-++
-++#define HASH4_CALC { \
-++  UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
-++  hash2Value = temp & (kHash2Size - 1); \
-++  hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \
-++  hashValue = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)) & p->hashMask; }
-++
-++#define HASH5_CALC { \
-++  UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
-++  hash2Value = temp & (kHash2Size - 1); \
-++  hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \
-++  hash4Value = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)); \
-++  hashValue = (hash4Value ^ (p->crc[cur[4]] << 3)) & p->hashMask; \
-++  hash4Value &= (kHash4Size - 1); }
-++
-++/* #define HASH_ZIP_CALC hashValue = ((cur[0] | ((UInt32)cur[1] << 8)) ^ p->crc[cur[2]]) & 0xFFFF; */
-++#define HASH_ZIP_CALC hashValue = ((cur[2] | ((UInt32)cur[0] << 8)) ^ p->crc[cur[1]]) & 0xFFFF;
-++
-++
-++#define MT_HASH2_CALC \
-++  hash2Value = (p->crc[cur[0]] ^ cur[1]) & (kHash2Size - 1);
-++
-++#define MT_HASH3_CALC { \
-++  UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
-++  hash2Value = temp & (kHash2Size - 1); \
-++  hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); }
-++
-++#define MT_HASH4_CALC { \
-++  UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
-++  hash2Value = temp & (kHash2Size - 1); \
-++  hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \
-++  hash4Value = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)) & (kHash4Size - 1); }
-++
-++#endif
-+--- /dev/null
-++++ b/include/linux/lzma/LzmaDec.h
-+@@ -0,0 +1,231 @@
-++/* LzmaDec.h -- LZMA Decoder
-++2009-02-07 : Igor Pavlov : Public domain */
-++
-++#ifndef __LZMA_DEC_H
-++#define __LZMA_DEC_H
-++
-++#include "Types.h"
-++
-++#ifdef __cplusplus
-++extern "C" {
-++#endif
-++
-++/* #define _LZMA_PROB32 */
-++/* _LZMA_PROB32 can increase the speed on some CPUs,
-++   but memory usage for CLzmaDec::probs will be doubled in that case */
-++
-++#ifdef _LZMA_PROB32
-++#define CLzmaProb UInt32
-++#else
-++#define CLzmaProb UInt16
-++#endif
-++
-++
-++/* ---------- LZMA Properties ---------- */
-++
-++#define LZMA_PROPS_SIZE 5
-++
-++typedef struct _CLzmaProps
-++{
-++  unsigned lc, lp, pb;
-++  UInt32 dicSize;
-++} CLzmaProps;
-++
-++/* LzmaProps_Decode - decodes properties
-++Returns:
-++  SZ_OK
-++  SZ_ERROR_UNSUPPORTED - Unsupported properties
-++*/
-++
-++SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size);
-++
-++
-++/* ---------- LZMA Decoder state ---------- */
-++
-++/* LZMA_REQUIRED_INPUT_MAX = number of required input bytes for worst case.
-++   Num bits = log2((2^11 / 31) ^ 22) + 26 < 134 + 26 = 160; */
-++
-++#define LZMA_REQUIRED_INPUT_MAX 20
-++
-++typedef struct
-++{
-++  CLzmaProps prop;
-++  CLzmaProb *probs;
-++  Byte *dic;
-++  const Byte *buf;
-++  UInt32 range, code;
-++  SizeT dicPos;
-++  SizeT dicBufSize;
-++  UInt32 processedPos;
-++  UInt32 checkDicSize;
-++  unsigned state;
-++  UInt32 reps[4];
-++  unsigned remainLen;
-++  int needFlush;
-++  int needInitState;
-++  UInt32 numProbs;
-++  unsigned tempBufSize;
-++  Byte tempBuf[LZMA_REQUIRED_INPUT_MAX];
-++} CLzmaDec;
-++
-++#define LzmaDec_Construct(p) { (p)->dic = 0; (p)->probs = 0; }
-++
-++void LzmaDec_Init(CLzmaDec *p);
-++
-++/* There are two types of LZMA streams:
-++     0) Stream with end mark. That end mark adds about 6 bytes to compressed size.
-++     1) Stream without end mark. You must know exact uncompressed size to decompress such stream. */
-++
-++typedef enum
-++{
-++  LZMA_FINISH_ANY,   /* finish at any point */
-++  LZMA_FINISH_END    /* block must be finished at the end */
-++} ELzmaFinishMode;
-++
-++/* ELzmaFinishMode has meaning only if the decoding reaches output limit !!!
-++
-++   You must use LZMA_FINISH_END, when you know that current output buffer
-++   covers last bytes of block. In other cases you must use LZMA_FINISH_ANY.
-++
-++   If LZMA decoder sees end marker before reaching output limit, it returns SZ_OK,
-++   and output value of destLen will be less than output buffer size limit.
-++   You can check status result also.
-++
-++   You can use multiple checks to test data integrity after full decompression:
-++     1) Check Result and "status" variable.
-++     2) Check that output(destLen) = uncompressedSize, if you know real uncompressedSize.
-++     3) Check that output(srcLen) = compressedSize, if you know real compressedSize.
-++        You must use correct finish mode in that case. */
-++
-++typedef enum
-++{
-++  LZMA_STATUS_NOT_SPECIFIED,               /* use main error code instead */
-++  LZMA_STATUS_FINISHED_WITH_MARK,          /* stream was finished with end mark. */
-++  LZMA_STATUS_NOT_FINISHED,                /* stream was not finished */
-++  LZMA_STATUS_NEEDS_MORE_INPUT,            /* you must provide more input bytes */
-++  LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK  /* there is probability that stream was finished without end mark */
-++} ELzmaStatus;
-++
-++/* ELzmaStatus is used only as output value for function call */
-++
-++
-++/* ---------- Interfaces ---------- */
-++
-++/* There are 3 levels of interfaces:
-++     1) Dictionary Interface
-++     2) Buffer Interface
-++     3) One Call Interface
-++   You can select any of these interfaces, but don't mix functions from different
-++   groups for same object. */
-++
-++
-++/* There are two variants to allocate state for Dictionary Interface:
-++     1) LzmaDec_Allocate / LzmaDec_Free
-++     2) LzmaDec_AllocateProbs / LzmaDec_FreeProbs
-++   You can use variant 2, if you set dictionary buffer manually.
-++   For Buffer Interface you must always use variant 1.
-++
-++LzmaDec_Allocate* can return:
-++  SZ_OK
-++  SZ_ERROR_MEM         - Memory allocation error
-++  SZ_ERROR_UNSUPPORTED - Unsupported properties
-++*/
-++
-++SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc);
-++void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc);
-++
-++SRes LzmaDec_Allocate(CLzmaDec *state, const Byte *prop, unsigned propsSize, ISzAlloc *alloc);
-++void LzmaDec_Free(CLzmaDec *state, ISzAlloc *alloc);
-++
-++/* ---------- Dictionary Interface ---------- */
-++
-++/* You can use it, if you want to eliminate the overhead for data copying from
-++   dictionary to some other external buffer.
-++   You must work with CLzmaDec variables directly in this interface.
-++
-++   STEPS:
-++     LzmaDec_Constr()
-++     LzmaDec_Allocate()
-++     for (each new stream)
-++     {
-++       LzmaDec_Init()
-++       while (it needs more decompression)
-++       {
-++         LzmaDec_DecodeToDic()
-++         use data from CLzmaDec::dic and update CLzmaDec::dicPos
-++       }
-++     }
-++     LzmaDec_Free()
-++*/
-++
-++/* LzmaDec_DecodeToDic
-++
-++   The decoding to internal dictionary buffer (CLzmaDec::dic).
-++   You must manually update CLzmaDec::dicPos, if it reaches CLzmaDec::dicBufSize !!!
-++
-++finishMode:
-++  It has meaning only if the decoding reaches output limit (dicLimit).
-++  LZMA_FINISH_ANY - Decode just dicLimit bytes.
-++  LZMA_FINISH_END - Stream must be finished after dicLimit.
-++
-++Returns:
-++  SZ_OK
-++    status:
-++      LZMA_STATUS_FINISHED_WITH_MARK
-++      LZMA_STATUS_NOT_FINISHED
-++      LZMA_STATUS_NEEDS_MORE_INPUT
-++      LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK
-++  SZ_ERROR_DATA - Data error
-++*/
-++
-++SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit,
-++    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
-++
-++
-++/* ---------- Buffer Interface ---------- */
-++
-++/* It's zlib-like interface.
-++   See LzmaDec_DecodeToDic description for information about STEPS and return results,
-++   but you must use LzmaDec_DecodeToBuf instead of LzmaDec_DecodeToDic and you don't need
-++   to work with CLzmaDec variables manually.
-++
-++finishMode:
-++  It has meaning only if the decoding reaches output limit (*destLen).
-++  LZMA_FINISH_ANY - Decode just destLen bytes.
-++  LZMA_FINISH_END - Stream must be finished after (*destLen).
-++*/
-++
-++SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen,
-++    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
-++
-++
-++/* ---------- One Call Interface ---------- */
-++
-++/* LzmaDecode
-++
-++finishMode:
-++  It has meaning only if the decoding reaches output limit (*destLen).
-++  LZMA_FINISH_ANY - Decode just destLen bytes.
-++  LZMA_FINISH_END - Stream must be finished after (*destLen).
-++
-++Returns:
-++  SZ_OK
-++    status:
-++      LZMA_STATUS_FINISHED_WITH_MARK
-++      LZMA_STATUS_NOT_FINISHED
-++      LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK
-++  SZ_ERROR_DATA - Data error
-++  SZ_ERROR_MEM  - Memory allocation error
-++  SZ_ERROR_UNSUPPORTED - Unsupported properties
-++  SZ_ERROR_INPUT_EOF - It needs more bytes in input buffer (src).
-++*/
-++
-++SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
-++    const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode,
-++    ELzmaStatus *status, ISzAlloc *alloc);
-++
-++#ifdef __cplusplus
-++}
-++#endif
-++
-++#endif
-+--- /dev/null
-++++ b/include/linux/lzma/LzmaEnc.h
-+@@ -0,0 +1,80 @@
-++/*  LzmaEnc.h -- LZMA Encoder
-++2009-02-07 : Igor Pavlov : Public domain */
-++
-++#ifndef __LZMA_ENC_H
-++#define __LZMA_ENC_H
-++
-++#include "Types.h"
-++
-++#ifdef __cplusplus
-++extern "C" {
-++#endif
-++
-++#define LZMA_PROPS_SIZE 5
-++
-++typedef struct _CLzmaEncProps
-++{
-++  int level;       /*  0 <= level <= 9 */
-++  UInt32 dictSize; /* (1 << 12) <= dictSize <= (1 << 27) for 32-bit version
-++                      (1 << 12) <= dictSize <= (1 << 30) for 64-bit version
-++                       default = (1 << 24) */
-++  int lc;          /* 0 <= lc <= 8, default = 3 */
-++  int lp;          /* 0 <= lp <= 4, default = 0 */
-++  int pb;          /* 0 <= pb <= 4, default = 2 */
-++  int algo;        /* 0 - fast, 1 - normal, default = 1 */
-++  int fb;          /* 5 <= fb <= 273, default = 32 */
-++  int btMode;      /* 0 - hashChain Mode, 1 - binTree mode - normal, default = 1 */
-++  int numHashBytes; /* 2, 3 or 4, default = 4 */
-++  UInt32 mc;        /* 1 <= mc <= (1 << 30), default = 32 */
-++  unsigned writeEndMark;  /* 0 - do not write EOPM, 1 - write EOPM, default = 0 */
-++  int numThreads;  /* 1 or 2, default = 2 */
-++} CLzmaEncProps;
-++
-++void LzmaEncProps_Init(CLzmaEncProps *p);
-++void LzmaEncProps_Normalize(CLzmaEncProps *p);
-++UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2);
-++
-++
-++/* ---------- CLzmaEncHandle Interface ---------- */
-++
-++/* LzmaEnc_* functions can return the following exit codes:
-++Returns:
-++  SZ_OK           - OK
-++  SZ_ERROR_MEM    - Memory allocation error
-++  SZ_ERROR_PARAM  - Incorrect paramater in props
-++  SZ_ERROR_WRITE  - Write callback error.
-++  SZ_ERROR_PROGRESS - some break from progress callback
-++  SZ_ERROR_THREAD - errors in multithreading functions (only for Mt version)
-++*/
-++
-++typedef void * CLzmaEncHandle;
-++
-++CLzmaEncHandle LzmaEnc_Create(ISzAlloc *alloc);
-++void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig);
-++SRes LzmaEnc_SetProps(CLzmaEncHandle p, const CLzmaEncProps *props);
-++SRes LzmaEnc_WriteProperties(CLzmaEncHandle p, Byte *properties, SizeT *size);
-++SRes LzmaEnc_Encode(CLzmaEncHandle p, ISeqOutStream *outStream, ISeqInStream *inStream,
-++    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
-++SRes LzmaEnc_MemEncode(CLzmaEncHandle p, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
-++    int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
-++
-++/* ---------- One Call Interface ---------- */
-++
-++/* LzmaEncode
-++Return code:
-++  SZ_OK               - OK
-++  SZ_ERROR_MEM        - Memory allocation error
-++  SZ_ERROR_PARAM      - Incorrect paramater
-++  SZ_ERROR_OUTPUT_EOF - output buffer overflow
-++  SZ_ERROR_THREAD     - errors in multithreading functions (only for Mt version)
-++*/
-++
-++SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
-++    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
-++    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
-++
-++#ifdef __cplusplus
-++}
-++#endif
-++
-++#endif
-+--- /dev/null
-++++ b/include/linux/lzma/Types.h
-+@@ -0,0 +1,226 @@
-++/* Types.h -- Basic types
-++2009-11-23 : Igor Pavlov : Public domain */
-++
-++#ifndef __7Z_TYPES_H
-++#define __7Z_TYPES_H
-++
-++#include <stddef.h>
-++
-++#ifdef _WIN32
-++#include <windows.h>
-++#endif
-++
-++#ifndef EXTERN_C_BEGIN
-++#ifdef __cplusplus
-++#define EXTERN_C_BEGIN extern "C" {
-++#define EXTERN_C_END }
-++#else
-++#define EXTERN_C_BEGIN
-++#define EXTERN_C_END
-++#endif
-++#endif
-++
-++EXTERN_C_BEGIN
-++
-++#define SZ_OK 0
-++
-++#define SZ_ERROR_DATA 1
-++#define SZ_ERROR_MEM 2
-++#define SZ_ERROR_CRC 3
-++#define SZ_ERROR_UNSUPPORTED 4
-++#define SZ_ERROR_PARAM 5
-++#define SZ_ERROR_INPUT_EOF 6
-++#define SZ_ERROR_OUTPUT_EOF 7
-++#define SZ_ERROR_READ 8
-++#define SZ_ERROR_WRITE 9
-++#define SZ_ERROR_PROGRESS 10
-++#define SZ_ERROR_FAIL 11
-++#define SZ_ERROR_THREAD 12
-++
-++#define SZ_ERROR_ARCHIVE 16
-++#define SZ_ERROR_NO_ARCHIVE 17
-++
-++typedef int SRes;
-++
-++#ifdef _WIN32
-++typedef DWORD WRes;
-++#else
-++typedef int WRes;
-++#endif
-++
-++#ifndef RINOK
-++#define RINOK(x) { int __result__ = (x); if (__result__ != 0) return __result__; }
-++#endif
-++
-++typedef unsigned char Byte;
-++typedef short Int16;
-++typedef unsigned short UInt16;
-++
-++#ifdef _LZMA_UINT32_IS_ULONG
-++typedef long Int32;
-++typedef unsigned long UInt32;
-++#else
-++typedef int Int32;
-++typedef unsigned int UInt32;
-++#endif
-++
-++#ifdef _SZ_NO_INT_64
-++
-++/* define _SZ_NO_INT_64, if your compiler doesn't support 64-bit integers.
-++   NOTES: Some code will work incorrectly in that case! */
-++
-++typedef long Int64;
-++typedef unsigned long UInt64;
-++
-++#else
-++
-++#if defined(_MSC_VER) || defined(__BORLANDC__)
-++typedef __int64 Int64;
-++typedef unsigned __int64 UInt64;
-++#else
-++typedef long long int Int64;
-++typedef unsigned long long int UInt64;
-++#endif
-++
-++#endif
-++
-++#ifdef _LZMA_NO_SYSTEM_SIZE_T
-++typedef UInt32 SizeT;
-++#else
-++typedef size_t SizeT;
-++#endif
-++
-++typedef int Bool;
-++#define True 1
-++#define False 0
-++
-++
-++#ifdef _WIN32
-++#define MY_STD_CALL __stdcall
-++#else
-++#define MY_STD_CALL
-++#endif
-++
-++#ifdef _MSC_VER
-++
-++#if _MSC_VER >= 1300
-++#define MY_NO_INLINE __declspec(noinline)
-++#else
-++#define MY_NO_INLINE
-++#endif
-++
-++#define MY_CDECL __cdecl
-++#define MY_FAST_CALL __fastcall
-++
-++#else
-++
-++#define MY_CDECL
-++#define MY_FAST_CALL
-++
-++#endif
-++
-++
-++/* The following interfaces use first parameter as pointer to structure */
-++
-++typedef struct
-++{
-++  SRes (*Read)(void *p, void *buf, size_t *size);
-++    /* if (input(*size) != 0 && output(*size) == 0) means end_of_stream.
-++       (output(*size) < input(*size)) is allowed */
-++} ISeqInStream;
-++
-++/* it can return SZ_ERROR_INPUT_EOF */
-++SRes SeqInStream_Read(ISeqInStream *stream, void *buf, size_t size);
-++SRes SeqInStream_Read2(ISeqInStream *stream, void *buf, size_t size, SRes errorType);
-++SRes SeqInStream_ReadByte(ISeqInStream *stream, Byte *buf);
-++
-++typedef struct
-++{
-++  size_t (*Write)(void *p, const void *buf, size_t size);
-++    /* Returns: result - the number of actually written bytes.
-++       (result < size) means error */
-++} ISeqOutStream;
-++
-++typedef enum
-++{
-++  SZ_SEEK_SET = 0,
-++  SZ_SEEK_CUR = 1,
-++  SZ_SEEK_END = 2
-++} ESzSeek;
-++
-++typedef struct
-++{
-++  SRes (*Read)(void *p, void *buf, size_t *size);  /* same as ISeqInStream::Read */
-++  SRes (*Seek)(void *p, Int64 *pos, ESzSeek origin);
-++} ISeekInStream;
-++
-++typedef struct
-++{
-++  SRes (*Look)(void *p, void **buf, size_t *size);
-++    /* if (input(*size) != 0 && output(*size) == 0) means end_of_stream.
-++       (output(*size) > input(*size)) is not allowed
-++       (output(*size) < input(*size)) is allowed */
-++  SRes (*Skip)(void *p, size_t offset);
-++    /* offset must be <= output(*size) of Look */
-++
-++  SRes (*Read)(void *p, void *buf, size_t *size);
-++    /* reads directly (without buffer). It's same as ISeqInStream::Read */
-++  SRes (*Seek)(void *p, Int64 *pos, ESzSeek origin);
-++} ILookInStream;
-++
-++SRes LookInStream_LookRead(ILookInStream *stream, void *buf, size_t *size);
-++SRes LookInStream_SeekTo(ILookInStream *stream, UInt64 offset);
-++
-++/* reads via ILookInStream::Read */
-++SRes LookInStream_Read2(ILookInStream *stream, void *buf, size_t size, SRes errorType);
-++SRes LookInStream_Read(ILookInStream *stream, void *buf, size_t size);
-++
-++#define LookToRead_BUF_SIZE (1 << 14)
-++
-++typedef struct
-++{
-++  ILookInStream s;
-++  ISeekInStream *realStream;
-++  size_t pos;
-++  size_t size;
-++  Byte buf[LookToRead_BUF_SIZE];
-++} CLookToRead;
-++
-++void LookToRead_CreateVTable(CLookToRead *p, int lookahead);
-++void LookToRead_Init(CLookToRead *p);
-++
-++typedef struct
-++{
-++  ISeqInStream s;
-++  ILookInStream *realStream;
-++} CSecToLook;
-++
-++void SecToLook_CreateVTable(CSecToLook *p);
-++
-++typedef struct
-++{
-++  ISeqInStream s;
-++  ILookInStream *realStream;
-++} CSecToRead;
-++
-++void SecToRead_CreateVTable(CSecToRead *p);
-++
-++typedef struct
-++{
-++  SRes (*Progress)(void *p, UInt64 inSize, UInt64 outSize);
-++    /* Returns: result. (result != SZ_OK) means break.
-++       Value (UInt64)(Int64)-1 for size means unknown value. */
-++} ICompressProgress;
-++
-++typedef struct
-++{
-++  void *(*Alloc)(void *p, size_t size);
-++  void (*Free)(void *p, void *address); /* address can be 0 */
-++} ISzAlloc;
-++
-++#define IAlloc_Alloc(p, size) (p)->Alloc((p), size)
-++#define IAlloc_Free(p, a) (p)->Free((p), a)
-++
-++EXTERN_C_END
-++
-++#endif
-+--- a/include/uapi/linux/jffs2.h
-++++ b/include/uapi/linux/jffs2.h
-+@@ -46,6 +46,7 @@
-+ #define JFFS2_COMPR_DYNRUBIN	0x05
-+ #define JFFS2_COMPR_ZLIB	0x06
-+ #define JFFS2_COMPR_LZO		0x07
-++#define JFFS2_COMPR_LZMA	0x08
-+ /* Compatibility flags. */
-+ #define JFFS2_COMPAT_MASK 0xc000      /* What do to if an unknown nodetype is found */
-+ #define JFFS2_NODE_ACCURATE 0x2000
-+--- a/lib/Kconfig
-++++ b/lib/Kconfig
-+@@ -316,6 +316,12 @@ config ZSTD_DECOMPRESS
-+ 
-+ source "lib/xz/Kconfig"
-+ 
-++config LZMA_COMPRESS
-++    tristate
-++
-++config LZMA_DECOMPRESS
-++    tristate
-++
-+ #
-+ # These all provide a common interface (hence the apparent duplication with
-+ # ZLIB_INFLATE; DECOMPRESS_GZIP is just a wrapper.)
-+--- a/lib/Makefile
-++++ b/lib/Makefile
-+@@ -136,6 +136,16 @@ CFLAGS_kobject.o += -DDEBUG
-+ CFLAGS_kobject_uevent.o += -DDEBUG
-+ endif
-+ 
-++ifdef CONFIG_JFFS2_ZLIB
-++  CONFIG_ZLIB_INFLATE:=y
-++  CONFIG_ZLIB_DEFLATE:=y
-++endif
-++
-++ifdef CONFIG_JFFS2_LZMA
-++  CONFIG_LZMA_DECOMPRESS:=y
-++  CONFIG_LZMA_COMPRESS:=y
-++endif
-++
-+ obj-$(CONFIG_DEBUG_INFO_REDUCED) += debug_info.o
-+ CFLAGS_debug_info.o += $(call cc-option, -femit-struct-debug-detailed=any)
-+ 
-+@@ -191,6 +201,8 @@ obj-$(CONFIG_ZSTD_COMPRESS) += zstd/
-+ obj-$(CONFIG_ZSTD_DECOMPRESS) += zstd/
-+ obj-$(CONFIG_XZ_DEC) += xz/
-+ obj-$(CONFIG_RAID6_PQ) += raid6/
-++obj-$(CONFIG_LZMA_COMPRESS) += lzma/
-++obj-$(CONFIG_LZMA_DECOMPRESS) += lzma/
-+ 
-+ lib-$(CONFIG_DECOMPRESS_GZIP) += decompress_inflate.o
-+ lib-$(CONFIG_DECOMPRESS_BZIP2) += decompress_bunzip2.o
-+--- /dev/null
-++++ b/lib/lzma/LzFind.c
-+@@ -0,0 +1,761 @@
-++/* LzFind.c -- Match finder for LZ algorithms
-++2009-04-22 : Igor Pavlov : Public domain */
-++
-++#include <string.h>
-++
-++#include "LzFind.h"
-++#include "LzHash.h"
-++
-++#define kEmptyHashValue 0
-++#define kMaxValForNormalize ((UInt32)0xFFFFFFFF)
-++#define kNormalizeStepMin (1 << 10) /* it must be power of 2 */
-++#define kNormalizeMask (~(kNormalizeStepMin - 1))
-++#define kMaxHistorySize ((UInt32)3 << 30)
-++
-++#define kStartMaxLen 3
-++
-++static void LzInWindow_Free(CMatchFinder *p, ISzAlloc *alloc)
-++{
-++  if (!p->directInput)
-++  {
-++    alloc->Free(alloc, p->bufferBase);
-++    p->bufferBase = 0;
-++  }
-++}
-++
-++/* keepSizeBefore + keepSizeAfter + keepSizeReserv must be < 4G) */
-++
-++static int LzInWindow_Create(CMatchFinder *p, UInt32 keepSizeReserv, ISzAlloc *alloc)
-++{
-++  UInt32 blockSize = p->keepSizeBefore + p->keepSizeAfter + keepSizeReserv;
-++  if (p->directInput)
-++  {
-++    p->blockSize = blockSize;
-++    return 1;
-++  }
-++  if (p->bufferBase == 0 || p->blockSize != blockSize)
-++  {
-++    LzInWindow_Free(p, alloc);
-++    p->blockSize = blockSize;
-++    p->bufferBase = (Byte *)alloc->Alloc(alloc, (size_t)blockSize);
-++  }
-++  return (p->bufferBase != 0);
-++}
-++
-++Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
-++Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; }
-++
-++UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; }
-++
-++void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
-++{
-++  p->posLimit -= subValue;
-++  p->pos -= subValue;
-++  p->streamPos -= subValue;
-++}
-++
-++static void MatchFinder_ReadBlock(CMatchFinder *p)
-++{
-++  if (p->streamEndWasReached || p->result != SZ_OK)
-++    return;
-++  if (p->directInput)
-++  {
-++    UInt32 curSize = 0xFFFFFFFF - p->streamPos;
-++    if (curSize > p->directInputRem)
-++      curSize = (UInt32)p->directInputRem;
-++    p->directInputRem -= curSize;
-++    p->streamPos += curSize;
-++    if (p->directInputRem == 0)
-++      p->streamEndWasReached = 1;
-++    return;
-++  }
-++  for (;;)
-++  {
-++    Byte *dest = p->buffer + (p->streamPos - p->pos);
-++    size_t size = (p->bufferBase + p->blockSize - dest);
-++    if (size == 0)
-++      return;
-++    p->result = p->stream->Read(p->stream, dest, &size);
-++    if (p->result != SZ_OK)
-++      return;
-++    if (size == 0)
-++    {
-++      p->streamEndWasReached = 1;
-++      return;
-++    }
-++    p->streamPos += (UInt32)size;
-++    if (p->streamPos - p->pos > p->keepSizeAfter)
-++      return;
-++  }
-++}
-++
-++void MatchFinder_MoveBlock(CMatchFinder *p)
-++{
-++  memmove(p->bufferBase,
-++    p->buffer - p->keepSizeBefore,
-++    (size_t)(p->streamPos - p->pos + p->keepSizeBefore));
-++  p->buffer = p->bufferBase + p->keepSizeBefore;
-++}
-++
-++int MatchFinder_NeedMove(CMatchFinder *p)
-++{
-++  if (p->directInput)
-++    return 0;
-++  /* if (p->streamEndWasReached) return 0; */
-++  return ((size_t)(p->bufferBase + p->blockSize - p->buffer) <= p->keepSizeAfter);
-++}
-++
-++void MatchFinder_ReadIfRequired(CMatchFinder *p)
-++{
-++  if (p->streamEndWasReached)
-++    return;
-++  if (p->keepSizeAfter >= p->streamPos - p->pos)
-++    MatchFinder_ReadBlock(p);
-++}
-++
-++static void MatchFinder_CheckAndMoveAndRead(CMatchFinder *p)
-++{
-++  if (MatchFinder_NeedMove(p))
-++    MatchFinder_MoveBlock(p);
-++  MatchFinder_ReadBlock(p);
-++}
-++
-++static void MatchFinder_SetDefaultSettings(CMatchFinder *p)
-++{
-++  p->cutValue = 32;
-++  p->btMode = 1;
-++  p->numHashBytes = 4;
-++  p->bigHash = 0;
-++}
-++
-++#define kCrcPoly 0xEDB88320
-++
-++void MatchFinder_Construct(CMatchFinder *p)
-++{
-++  UInt32 i;
-++  p->bufferBase = 0;
-++  p->directInput = 0;
-++  p->hash = 0;
-++  MatchFinder_SetDefaultSettings(p);
-++
-++  for (i = 0; i < 256; i++)
-++  {
-++    UInt32 r = i;
-++    int j;
-++    for (j = 0; j < 8; j++)
-++      r = (r >> 1) ^ (kCrcPoly & ~((r & 1) - 1));
-++    p->crc[i] = r;
-++  }
-++}
-++
-++static void MatchFinder_FreeThisClassMemory(CMatchFinder *p, ISzAlloc *alloc)
-++{
-++  alloc->Free(alloc, p->hash);
-++  p->hash = 0;
-++}
-++
-++void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc)
-++{
-++  MatchFinder_FreeThisClassMemory(p, alloc);
-++  LzInWindow_Free(p, alloc);
-++}
-++
-++static CLzRef* AllocRefs(UInt32 num, ISzAlloc *alloc)
-++{
-++  size_t sizeInBytes = (size_t)num * sizeof(CLzRef);
-++  if (sizeInBytes / sizeof(CLzRef) != num)
-++    return 0;
-++  return (CLzRef *)alloc->Alloc(alloc, sizeInBytes);
-++}
-++
-++int MatchFinder_Create(CMatchFinder *p, UInt32 historySize,
-++    UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter,
-++    ISzAlloc *alloc)
-++{
-++  UInt32 sizeReserv;
-++  if (historySize > kMaxHistorySize)
-++  {
-++    MatchFinder_Free(p, alloc);
-++    return 0;
-++  }
-++  sizeReserv = historySize >> 1;
-++  if (historySize > ((UInt32)2 << 30))
-++    sizeReserv = historySize >> 2;
-++  sizeReserv += (keepAddBufferBefore + matchMaxLen + keepAddBufferAfter) / 2 + (1 << 19);
-++
-++  p->keepSizeBefore = historySize + keepAddBufferBefore + 1;
-++  p->keepSizeAfter = matchMaxLen + keepAddBufferAfter;
-++  /* we need one additional byte, since we use MoveBlock after pos++ and before dictionary using */
-++  if (LzInWindow_Create(p, sizeReserv, alloc))
-++  {
-++    UInt32 newCyclicBufferSize = historySize + 1;
-++    UInt32 hs;
-++    p->matchMaxLen = matchMaxLen;
-++    {
-++      p->fixedHashSize = 0;
-++      if (p->numHashBytes == 2)
-++        hs = (1 << 16) - 1;
-++      else
-++      {
-++        hs = historySize - 1;
-++        hs |= (hs >> 1);
-++        hs |= (hs >> 2);
-++        hs |= (hs >> 4);
-++        hs |= (hs >> 8);
-++        hs >>= 1;
-++        hs |= 0xFFFF; /* don't change it! It's required for Deflate */
-++        if (hs > (1 << 24))
-++        {
-++          if (p->numHashBytes == 3)
-++            hs = (1 << 24) - 1;
-++          else
-++            hs >>= 1;
-++        }
-++      }
-++      p->hashMask = hs;
-++      hs++;
-++      if (p->numHashBytes > 2) p->fixedHashSize += kHash2Size;
-++      if (p->numHashBytes > 3) p->fixedHashSize += kHash3Size;
-++      if (p->numHashBytes > 4) p->fixedHashSize += kHash4Size;
-++      hs += p->fixedHashSize;
-++    }
-++
-++    {
-++      UInt32 prevSize = p->hashSizeSum + p->numSons;
-++      UInt32 newSize;
-++      p->historySize = historySize;
-++      p->hashSizeSum = hs;
-++      p->cyclicBufferSize = newCyclicBufferSize;
-++      p->numSons = (p->btMode ? newCyclicBufferSize * 2 : newCyclicBufferSize);
-++      newSize = p->hashSizeSum + p->numSons;
-++      if (p->hash != 0 && prevSize == newSize)
-++        return 1;
-++      MatchFinder_FreeThisClassMemory(p, alloc);
-++      p->hash = AllocRefs(newSize, alloc);
-++      if (p->hash != 0)
-++      {
-++        p->son = p->hash + p->hashSizeSum;
-++        return 1;
-++      }
-++    }
-++  }
-++  MatchFinder_Free(p, alloc);
-++  return 0;
-++}
-++
-++static void MatchFinder_SetLimits(CMatchFinder *p)
-++{
-++  UInt32 limit = kMaxValForNormalize - p->pos;
-++  UInt32 limit2 = p->cyclicBufferSize - p->cyclicBufferPos;
-++  if (limit2 < limit)
-++    limit = limit2;
-++  limit2 = p->streamPos - p->pos;
-++  if (limit2 <= p->keepSizeAfter)
-++  {
-++    if (limit2 > 0)
-++      limit2 = 1;
-++  }
-++  else
-++    limit2 -= p->keepSizeAfter;
-++  if (limit2 < limit)
-++    limit = limit2;
-++  {
-++    UInt32 lenLimit = p->streamPos - p->pos;
-++    if (lenLimit > p->matchMaxLen)
-++      lenLimit = p->matchMaxLen;
-++    p->lenLimit = lenLimit;
-++  }
-++  p->posLimit = p->pos + limit;
-++}
-++
-++void MatchFinder_Init(CMatchFinder *p)
-++{
-++  UInt32 i;
-++  for (i = 0; i < p->hashSizeSum; i++)
-++    p->hash[i] = kEmptyHashValue;
-++  p->cyclicBufferPos = 0;
-++  p->buffer = p->bufferBase;
-++  p->pos = p->streamPos = p->cyclicBufferSize;
-++  p->result = SZ_OK;
-++  p->streamEndWasReached = 0;
-++  MatchFinder_ReadBlock(p);
-++  MatchFinder_SetLimits(p);
-++}
-++
-++static UInt32 MatchFinder_GetSubValue(CMatchFinder *p)
-++{
-++  return (p->pos - p->historySize - 1) & kNormalizeMask;
-++}
-++
-++void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
-++{
-++  UInt32 i;
-++  for (i = 0; i < numItems; i++)
-++  {
-++    UInt32 value = items[i];
-++    if (value <= subValue)
-++      value = kEmptyHashValue;
-++    else
-++      value -= subValue;
-++    items[i] = value;
-++  }
-++}
-++
-++static void MatchFinder_Normalize(CMatchFinder *p)
-++{
-++  UInt32 subValue = MatchFinder_GetSubValue(p);
-++  MatchFinder_Normalize3(subValue, p->hash, p->hashSizeSum + p->numSons);
-++  MatchFinder_ReduceOffsets(p, subValue);
-++}
-++
-++static void MatchFinder_CheckLimits(CMatchFinder *p)
-++{
-++  if (p->pos == kMaxValForNormalize)
-++    MatchFinder_Normalize(p);
-++  if (!p->streamEndWasReached && p->keepSizeAfter == p->streamPos - p->pos)
-++    MatchFinder_CheckAndMoveAndRead(p);
-++  if (p->cyclicBufferPos == p->cyclicBufferSize)
-++    p->cyclicBufferPos = 0;
-++  MatchFinder_SetLimits(p);
-++}
-++
-++static UInt32 * Hc_GetMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
-++    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
-++    UInt32 *distances, UInt32 maxLen)
-++{
-++  son[_cyclicBufferPos] = curMatch;
-++  for (;;)
-++  {
-++    UInt32 delta = pos - curMatch;
-++    if (cutValue-- == 0 || delta >= _cyclicBufferSize)
-++      return distances;
-++    {
-++      const Byte *pb = cur - delta;
-++      curMatch = son[_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)];
-++      if (pb[maxLen] == cur[maxLen] && *pb == *cur)
-++      {
-++        UInt32 len = 0;
-++        while (++len != lenLimit)
-++          if (pb[len] != cur[len])
-++            break;
-++        if (maxLen < len)
-++        {
-++          *distances++ = maxLen = len;
-++          *distances++ = delta - 1;
-++          if (len == lenLimit)
-++            return distances;
-++        }
-++      }
-++    }
-++  }
-++}
-++
-++UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
-++    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
-++    UInt32 *distances, UInt32 maxLen)
-++{
-++  CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1;
-++  CLzRef *ptr1 = son + (_cyclicBufferPos << 1);
-++  UInt32 len0 = 0, len1 = 0;
-++  for (;;)
-++  {
-++    UInt32 delta = pos - curMatch;
-++    if (cutValue-- == 0 || delta >= _cyclicBufferSize)
-++    {
-++      *ptr0 = *ptr1 = kEmptyHashValue;
-++      return distances;
-++    }
-++    {
-++      CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1);
-++      const Byte *pb = cur - delta;
-++      UInt32 len = (len0 < len1 ? len0 : len1);
-++      if (pb[len] == cur[len])
-++      {
-++        if (++len != lenLimit && pb[len] == cur[len])
-++          while (++len != lenLimit)
-++            if (pb[len] != cur[len])
-++              break;
-++        if (maxLen < len)
-++        {
-++          *distances++ = maxLen = len;
-++          *distances++ = delta - 1;
-++          if (len == lenLimit)
-++          {
-++            *ptr1 = pair[0];
-++            *ptr0 = pair[1];
-++            return distances;
-++          }
-++        }
-++      }
-++      if (pb[len] < cur[len])
-++      {
-++        *ptr1 = curMatch;
-++        ptr1 = pair + 1;
-++        curMatch = *ptr1;
-++        len1 = len;
-++      }
-++      else
-++      {
-++        *ptr0 = curMatch;
-++        ptr0 = pair;
-++        curMatch = *ptr0;
-++        len0 = len;
-++      }
-++    }
-++  }
-++}
-++
-++static void SkipMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
-++    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue)
-++{
-++  CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1;
-++  CLzRef *ptr1 = son + (_cyclicBufferPos << 1);
-++  UInt32 len0 = 0, len1 = 0;
-++  for (;;)
-++  {
-++    UInt32 delta = pos - curMatch;
-++    if (cutValue-- == 0 || delta >= _cyclicBufferSize)
-++    {
-++      *ptr0 = *ptr1 = kEmptyHashValue;
-++      return;
-++    }
-++    {
-++      CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1);
-++      const Byte *pb = cur - delta;
-++      UInt32 len = (len0 < len1 ? len0 : len1);
-++      if (pb[len] == cur[len])
-++      {
-++        while (++len != lenLimit)
-++          if (pb[len] != cur[len])
-++            break;
-++        {
-++          if (len == lenLimit)
-++          {
-++            *ptr1 = pair[0];
-++            *ptr0 = pair[1];
-++            return;
-++          }
-++        }
-++      }
-++      if (pb[len] < cur[len])
-++      {
-++        *ptr1 = curMatch;
-++        ptr1 = pair + 1;
-++        curMatch = *ptr1;
-++        len1 = len;
-++      }
-++      else
-++      {
-++        *ptr0 = curMatch;
-++        ptr0 = pair;
-++        curMatch = *ptr0;
-++        len0 = len;
-++      }
-++    }
-++  }
-++}
-++
-++#define MOVE_POS \
-++  ++p->cyclicBufferPos; \
-++  p->buffer++; \
-++  if (++p->pos == p->posLimit) MatchFinder_CheckLimits(p);
-++
-++#define MOVE_POS_RET MOVE_POS return offset;
-++
-++static void MatchFinder_MovePos(CMatchFinder *p) { MOVE_POS; }
-++
-++#define GET_MATCHES_HEADER2(minLen, ret_op) \
-++  UInt32 lenLimit; UInt32 hashValue; const Byte *cur; UInt32 curMatch; \
-++  lenLimit = p->lenLimit; { if (lenLimit < minLen) { MatchFinder_MovePos(p); ret_op; }} \
-++  cur = p->buffer;
-++
-++#define GET_MATCHES_HEADER(minLen) GET_MATCHES_HEADER2(minLen, return 0)
-++#define SKIP_HEADER(minLen)        GET_MATCHES_HEADER2(minLen, continue)
-++
-++#define MF_PARAMS(p) p->pos, p->buffer, p->son, p->cyclicBufferPos, p->cyclicBufferSize, p->cutValue
-++
-++#define GET_MATCHES_FOOTER(offset, maxLen) \
-++  offset = (UInt32)(GetMatchesSpec1(lenLimit, curMatch, MF_PARAMS(p), \
-++  distances + offset, maxLen) - distances); MOVE_POS_RET;
-++
-++#define SKIP_FOOTER \
-++  SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MOVE_POS;
-++
-++static UInt32 Bt2_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-++{
-++  UInt32 offset;
-++  GET_MATCHES_HEADER(2)
-++  HASH2_CALC;
-++  curMatch = p->hash[hashValue];
-++  p->hash[hashValue] = p->pos;
-++  offset = 0;
-++  GET_MATCHES_FOOTER(offset, 1)
-++}
-++
-++UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-++{
-++  UInt32 offset;
-++  GET_MATCHES_HEADER(3)
-++  HASH_ZIP_CALC;
-++  curMatch = p->hash[hashValue];
-++  p->hash[hashValue] = p->pos;
-++  offset = 0;
-++  GET_MATCHES_FOOTER(offset, 2)
-++}
-++
-++static UInt32 Bt3_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-++{
-++  UInt32 hash2Value, delta2, maxLen, offset;
-++  GET_MATCHES_HEADER(3)
-++
-++  HASH3_CALC;
-++
-++  delta2 = p->pos - p->hash[hash2Value];
-++  curMatch = p->hash[kFix3HashSize + hashValue];
-++
-++  p->hash[hash2Value] =
-++  p->hash[kFix3HashSize + hashValue] = p->pos;
-++
-++
-++  maxLen = 2;
-++  offset = 0;
-++  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
-++  {
-++    for (; maxLen != lenLimit; maxLen++)
-++      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
-++        break;
-++    distances[0] = maxLen;
-++    distances[1] = delta2 - 1;
-++    offset = 2;
-++    if (maxLen == lenLimit)
-++    {
-++      SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p));
-++      MOVE_POS_RET;
-++    }
-++  }
-++  GET_MATCHES_FOOTER(offset, maxLen)
-++}
-++
-++static UInt32 Bt4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-++{
-++  UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset;
-++  GET_MATCHES_HEADER(4)
-++
-++  HASH4_CALC;
-++
-++  delta2 = p->pos - p->hash[                hash2Value];
-++  delta3 = p->pos - p->hash[kFix3HashSize + hash3Value];
-++  curMatch = p->hash[kFix4HashSize + hashValue];
-++
-++  p->hash[                hash2Value] =
-++  p->hash[kFix3HashSize + hash3Value] =
-++  p->hash[kFix4HashSize + hashValue] = p->pos;
-++
-++  maxLen = 1;
-++  offset = 0;
-++  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
-++  {
-++    distances[0] = maxLen = 2;
-++    distances[1] = delta2 - 1;
-++    offset = 2;
-++  }
-++  if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur)
-++  {
-++    maxLen = 3;
-++    distances[offset + 1] = delta3 - 1;
-++    offset += 2;
-++    delta2 = delta3;
-++  }
-++  if (offset != 0)
-++  {
-++    for (; maxLen != lenLimit; maxLen++)
-++      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
-++        break;
-++    distances[offset - 2] = maxLen;
-++    if (maxLen == lenLimit)
-++    {
-++      SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p));
-++      MOVE_POS_RET;
-++    }
-++  }
-++  if (maxLen < 3)
-++    maxLen = 3;
-++  GET_MATCHES_FOOTER(offset, maxLen)
-++}
-++
-++static UInt32 Hc4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-++{
-++  UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset;
-++  GET_MATCHES_HEADER(4)
-++
-++  HASH4_CALC;
-++
-++  delta2 = p->pos - p->hash[                hash2Value];
-++  delta3 = p->pos - p->hash[kFix3HashSize + hash3Value];
-++  curMatch = p->hash[kFix4HashSize + hashValue];
-++
-++  p->hash[                hash2Value] =
-++  p->hash[kFix3HashSize + hash3Value] =
-++  p->hash[kFix4HashSize + hashValue] = p->pos;
-++
-++  maxLen = 1;
-++  offset = 0;
-++  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
-++  {
-++    distances[0] = maxLen = 2;
-++    distances[1] = delta2 - 1;
-++    offset = 2;
-++  }
-++  if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur)
-++  {
-++    maxLen = 3;
-++    distances[offset + 1] = delta3 - 1;
-++    offset += 2;
-++    delta2 = delta3;
-++  }
-++  if (offset != 0)
-++  {
-++    for (; maxLen != lenLimit; maxLen++)
-++      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
-++        break;
-++    distances[offset - 2] = maxLen;
-++    if (maxLen == lenLimit)
-++    {
-++      p->son[p->cyclicBufferPos] = curMatch;
-++      MOVE_POS_RET;
-++    }
-++  }
-++  if (maxLen < 3)
-++    maxLen = 3;
-++  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
-++    distances + offset, maxLen) - (distances));
-++  MOVE_POS_RET
-++}
-++
-++UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-++{
-++  UInt32 offset;
-++  GET_MATCHES_HEADER(3)
-++  HASH_ZIP_CALC;
-++  curMatch = p->hash[hashValue];
-++  p->hash[hashValue] = p->pos;
-++  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
-++    distances, 2) - (distances));
-++  MOVE_POS_RET
-++}
-++
-++static void Bt2_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-++{
-++  do
-++  {
-++    SKIP_HEADER(2)
-++    HASH2_CALC;
-++    curMatch = p->hash[hashValue];
-++    p->hash[hashValue] = p->pos;
-++    SKIP_FOOTER
-++  }
-++  while (--num != 0);
-++}
-++
-++void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-++{
-++  do
-++  {
-++    SKIP_HEADER(3)
-++    HASH_ZIP_CALC;
-++    curMatch = p->hash[hashValue];
-++    p->hash[hashValue] = p->pos;
-++    SKIP_FOOTER
-++  }
-++  while (--num != 0);
-++}
-++
-++static void Bt3_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-++{
-++  do
-++  {
-++    UInt32 hash2Value;
-++    SKIP_HEADER(3)
-++    HASH3_CALC;
-++    curMatch = p->hash[kFix3HashSize + hashValue];
-++    p->hash[hash2Value] =
-++    p->hash[kFix3HashSize + hashValue] = p->pos;
-++    SKIP_FOOTER
-++  }
-++  while (--num != 0);
-++}
-++
-++static void Bt4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-++{
-++  do
-++  {
-++    UInt32 hash2Value, hash3Value;
-++    SKIP_HEADER(4)
-++    HASH4_CALC;
-++    curMatch = p->hash[kFix4HashSize + hashValue];
-++    p->hash[                hash2Value] =
-++    p->hash[kFix3HashSize + hash3Value] = p->pos;
-++    p->hash[kFix4HashSize + hashValue] = p->pos;
-++    SKIP_FOOTER
-++  }
-++  while (--num != 0);
-++}
-++
-++static void Hc4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-++{
-++  do
-++  {
-++    UInt32 hash2Value, hash3Value;
-++    SKIP_HEADER(4)
-++    HASH4_CALC;
-++    curMatch = p->hash[kFix4HashSize + hashValue];
-++    p->hash[                hash2Value] =
-++    p->hash[kFix3HashSize + hash3Value] =
-++    p->hash[kFix4HashSize + hashValue] = p->pos;
-++    p->son[p->cyclicBufferPos] = curMatch;
-++    MOVE_POS
-++  }
-++  while (--num != 0);
-++}
-++
-++void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-++{
-++  do
-++  {
-++    SKIP_HEADER(3)
-++    HASH_ZIP_CALC;
-++    curMatch = p->hash[hashValue];
-++    p->hash[hashValue] = p->pos;
-++    p->son[p->cyclicBufferPos] = curMatch;
-++    MOVE_POS
-++  }
-++  while (--num != 0);
-++}
-++
-++void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable)
-++{
-++  vTable->Init = (Mf_Init_Func)MatchFinder_Init;
-++  vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinder_GetIndexByte;
-++  vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinder_GetNumAvailableBytes;
-++  vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinder_GetPointerToCurrentPos;
-++  if (!p->btMode)
-++  {
-++    vTable->GetMatches = (Mf_GetMatches_Func)Hc4_MatchFinder_GetMatches;
-++    vTable->Skip = (Mf_Skip_Func)Hc4_MatchFinder_Skip;
-++  }
-++  else if (p->numHashBytes == 2)
-++  {
-++    vTable->GetMatches = (Mf_GetMatches_Func)Bt2_MatchFinder_GetMatches;
-++    vTable->Skip = (Mf_Skip_Func)Bt2_MatchFinder_Skip;
-++  }
-++  else if (p->numHashBytes == 3)
-++  {
-++    vTable->GetMatches = (Mf_GetMatches_Func)Bt3_MatchFinder_GetMatches;
-++    vTable->Skip = (Mf_Skip_Func)Bt3_MatchFinder_Skip;
-++  }
-++  else
-++  {
-++    vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
-++    vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
-++  }
-++}
-+--- /dev/null
-++++ b/lib/lzma/LzmaDec.c
-+@@ -0,0 +1,999 @@
-++/* LzmaDec.c -- LZMA Decoder
-++2009-09-20 : Igor Pavlov : Public domain */
-++
-++#include "LzmaDec.h"
-++
-++#include <string.h>
-++
-++#define kNumTopBits 24
-++#define kTopValue ((UInt32)1 << kNumTopBits)
-++
-++#define kNumBitModelTotalBits 11
-++#define kBitModelTotal (1 << kNumBitModelTotalBits)
-++#define kNumMoveBits 5
-++
-++#define RC_INIT_SIZE 5
-++
-++#define NORMALIZE if (range < kTopValue) { range <<= 8; code = (code << 8) | (*buf++); }
-++
-++#define IF_BIT_0(p) ttt = *(p); NORMALIZE; bound = (range >> kNumBitModelTotalBits) * ttt; if (code < bound)
-++#define UPDATE_0(p) range = bound; *(p) = (CLzmaProb)(ttt + ((kBitModelTotal - ttt) >> kNumMoveBits));
-++#define UPDATE_1(p) range -= bound; code -= bound; *(p) = (CLzmaProb)(ttt - (ttt >> kNumMoveBits));
-++#define GET_BIT2(p, i, A0, A1) IF_BIT_0(p) \
-++  { UPDATE_0(p); i = (i + i); A0; } else \
-++  { UPDATE_1(p); i = (i + i) + 1; A1; }
-++#define GET_BIT(p, i) GET_BIT2(p, i, ; , ;)
-++
-++#define TREE_GET_BIT(probs, i) { GET_BIT((probs + i), i); }
-++#define TREE_DECODE(probs, limit, i) \
-++  { i = 1; do { TREE_GET_BIT(probs, i); } while (i < limit); i -= limit; }
-++
-++/* #define _LZMA_SIZE_OPT */
-++
-++#ifdef _LZMA_SIZE_OPT
-++#define TREE_6_DECODE(probs, i) TREE_DECODE(probs, (1 << 6), i)
-++#else
-++#define TREE_6_DECODE(probs, i) \
-++  { i = 1; \
-++  TREE_GET_BIT(probs, i); \
-++  TREE_GET_BIT(probs, i); \
-++  TREE_GET_BIT(probs, i); \
-++  TREE_GET_BIT(probs, i); \
-++  TREE_GET_BIT(probs, i); \
-++  TREE_GET_BIT(probs, i); \
-++  i -= 0x40; }
-++#endif
-++
-++#define NORMALIZE_CHECK if (range < kTopValue) { if (buf >= bufLimit) return DUMMY_ERROR; range <<= 8; code = (code << 8) | (*buf++); }
-++
-++#define IF_BIT_0_CHECK(p) ttt = *(p); NORMALIZE_CHECK; bound = (range >> kNumBitModelTotalBits) * ttt; if (code < bound)
-++#define UPDATE_0_CHECK range = bound;
-++#define UPDATE_1_CHECK range -= bound; code -= bound;
-++#define GET_BIT2_CHECK(p, i, A0, A1) IF_BIT_0_CHECK(p) \
-++  { UPDATE_0_CHECK; i = (i + i); A0; } else \
-++  { UPDATE_1_CHECK; i = (i + i) + 1; A1; }
-++#define GET_BIT_CHECK(p, i) GET_BIT2_CHECK(p, i, ; , ;)
-++#define TREE_DECODE_CHECK(probs, limit, i) \
-++  { i = 1; do { GET_BIT_CHECK(probs + i, i) } while (i < limit); i -= limit; }
-++
-++
-++#define kNumPosBitsMax 4
-++#define kNumPosStatesMax (1 << kNumPosBitsMax)
-++
-++#define kLenNumLowBits 3
-++#define kLenNumLowSymbols (1 << kLenNumLowBits)
-++#define kLenNumMidBits 3
-++#define kLenNumMidSymbols (1 << kLenNumMidBits)
-++#define kLenNumHighBits 8
-++#define kLenNumHighSymbols (1 << kLenNumHighBits)
-++
-++#define LenChoice 0
-++#define LenChoice2 (LenChoice + 1)
-++#define LenLow (LenChoice2 + 1)
-++#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
-++#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
-++#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
-++
-++
-++#define kNumStates 12
-++#define kNumLitStates 7
-++
-++#define kStartPosModelIndex 4
-++#define kEndPosModelIndex 14
-++#define kNumFullDistances (1 << (kEndPosModelIndex >> 1))
-++
-++#define kNumPosSlotBits 6
-++#define kNumLenToPosStates 4
-++
-++#define kNumAlignBits 4
-++#define kAlignTableSize (1 << kNumAlignBits)
-++
-++#define kMatchMinLen 2
-++#define kMatchSpecLenStart (kMatchMinLen + kLenNumLowSymbols + kLenNumMidSymbols + kLenNumHighSymbols)
-++
-++#define IsMatch 0
-++#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax))
-++#define IsRepG0 (IsRep + kNumStates)
-++#define IsRepG1 (IsRepG0 + kNumStates)
-++#define IsRepG2 (IsRepG1 + kNumStates)
-++#define IsRep0Long (IsRepG2 + kNumStates)
-++#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax))
-++#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits))
-++#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex)
-++#define LenCoder (Align + kAlignTableSize)
-++#define RepLenCoder (LenCoder + kNumLenProbs)
-++#define Literal (RepLenCoder + kNumLenProbs)
-++
-++#define LZMA_BASE_SIZE 1846
-++#define LZMA_LIT_SIZE 768
-++
-++#define LzmaProps_GetNumProbs(p) ((UInt32)LZMA_BASE_SIZE + (LZMA_LIT_SIZE << ((p)->lc + (p)->lp)))
-++
-++#if Literal != LZMA_BASE_SIZE
-++StopCompilingDueBUG
-++#endif
-++
-++#define LZMA_DIC_MIN (1 << 12)
-++
-++/* First LZMA-symbol is always decoded.
-++And it decodes new LZMA-symbols while (buf < bufLimit), but "buf" is without last normalization
-++Out:
-++  Result:
-++    SZ_OK - OK
-++    SZ_ERROR_DATA - Error
-++  p->remainLen:
-++    < kMatchSpecLenStart : normal remain
-++    = kMatchSpecLenStart : finished
-++    = kMatchSpecLenStart + 1 : Flush marker
-++    = kMatchSpecLenStart + 2 : State Init Marker
-++*/
-++
-++static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit, const Byte *bufLimit)
-++{
-++  CLzmaProb *probs = p->probs;
-++
-++  unsigned state = p->state;
-++  UInt32 rep0 = p->reps[0], rep1 = p->reps[1], rep2 = p->reps[2], rep3 = p->reps[3];
-++  unsigned pbMask = ((unsigned)1 << (p->prop.pb)) - 1;
-++  unsigned lpMask = ((unsigned)1 << (p->prop.lp)) - 1;
-++  unsigned lc = p->prop.lc;
-++
-++  Byte *dic = p->dic;
-++  SizeT dicBufSize = p->dicBufSize;
-++  SizeT dicPos = p->dicPos;
-++
-++  UInt32 processedPos = p->processedPos;
-++  UInt32 checkDicSize = p->checkDicSize;
-++  unsigned len = 0;
-++
-++  const Byte *buf = p->buf;
-++  UInt32 range = p->range;
-++  UInt32 code = p->code;
-++
-++  do
-++  {
-++    CLzmaProb *prob;
-++    UInt32 bound;
-++    unsigned ttt;
-++    unsigned posState = processedPos & pbMask;
-++
-++    prob = probs + IsMatch + (state << kNumPosBitsMax) + posState;
-++    IF_BIT_0(prob)
-++    {
-++      unsigned symbol;
-++      UPDATE_0(prob);
-++      prob = probs + Literal;
-++      if (checkDicSize != 0 || processedPos != 0)
-++        prob += (LZMA_LIT_SIZE * (((processedPos & lpMask) << lc) +
-++        (dic[(dicPos == 0 ? dicBufSize : dicPos) - 1] >> (8 - lc))));
-++
-++      if (state < kNumLitStates)
-++      {
-++        state -= (state < 4) ? state : 3;
-++        symbol = 1;
-++        do { GET_BIT(prob + symbol, symbol) } while (symbol < 0x100);
-++      }
-++      else
-++      {
-++        unsigned matchByte = p->dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)];
-++        unsigned offs = 0x100;
-++        state -= (state < 10) ? 3 : 6;
-++        symbol = 1;
-++        do
-++        {
-++          unsigned bit;
-++          CLzmaProb *probLit;
-++          matchByte <<= 1;
-++          bit = (matchByte & offs);
-++          probLit = prob + offs + bit + symbol;
-++          GET_BIT2(probLit, symbol, offs &= ~bit, offs &= bit)
-++        }
-++        while (symbol < 0x100);
-++      }
-++      dic[dicPos++] = (Byte)symbol;
-++      processedPos++;
-++      continue;
-++    }
-++    else
-++    {
-++      UPDATE_1(prob);
-++      prob = probs + IsRep + state;
-++      IF_BIT_0(prob)
-++      {
-++        UPDATE_0(prob);
-++        state += kNumStates;
-++        prob = probs + LenCoder;
-++      }
-++      else
-++      {
-++        UPDATE_1(prob);
-++        if (checkDicSize == 0 && processedPos == 0)
-++          return SZ_ERROR_DATA;
-++        prob = probs + IsRepG0 + state;
-++        IF_BIT_0(prob)
-++        {
-++          UPDATE_0(prob);
-++          prob = probs + IsRep0Long + (state << kNumPosBitsMax) + posState;
-++          IF_BIT_0(prob)
-++          {
-++            UPDATE_0(prob);
-++            dic[dicPos] = dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)];
-++            dicPos++;
-++            processedPos++;
-++            state = state < kNumLitStates ? 9 : 11;
-++            continue;
-++          }
-++          UPDATE_1(prob);
-++        }
-++        else
-++        {
-++          UInt32 distance;
-++          UPDATE_1(prob);
-++          prob = probs + IsRepG1 + state;
-++          IF_BIT_0(prob)
-++          {
-++            UPDATE_0(prob);
-++            distance = rep1;
-++          }
-++          else
-++          {
-++            UPDATE_1(prob);
-++            prob = probs + IsRepG2 + state;
-++            IF_BIT_0(prob)
-++            {
-++              UPDATE_0(prob);
-++              distance = rep2;
-++            }
-++            else
-++            {
-++              UPDATE_1(prob);
-++              distance = rep3;
-++              rep3 = rep2;
-++            }
-++            rep2 = rep1;
-++          }
-++          rep1 = rep0;
-++          rep0 = distance;
-++        }
-++        state = state < kNumLitStates ? 8 : 11;
-++        prob = probs + RepLenCoder;
-++      }
-++      {
-++        unsigned limit, offset;
-++        CLzmaProb *probLen = prob + LenChoice;
-++        IF_BIT_0(probLen)
-++        {
-++          UPDATE_0(probLen);
-++          probLen = prob + LenLow + (posState << kLenNumLowBits);
-++          offset = 0;
-++          limit = (1 << kLenNumLowBits);
-++        }
-++        else
-++        {
-++          UPDATE_1(probLen);
-++          probLen = prob + LenChoice2;
-++          IF_BIT_0(probLen)
-++          {
-++            UPDATE_0(probLen);
-++            probLen = prob + LenMid + (posState << kLenNumMidBits);
-++            offset = kLenNumLowSymbols;
-++            limit = (1 << kLenNumMidBits);
-++          }
-++          else
-++          {
-++            UPDATE_1(probLen);
-++            probLen = prob + LenHigh;
-++            offset = kLenNumLowSymbols + kLenNumMidSymbols;
-++            limit = (1 << kLenNumHighBits);
-++          }
-++        }
-++        TREE_DECODE(probLen, limit, len);
-++        len += offset;
-++      }
-++
-++      if (state >= kNumStates)
-++      {
-++        UInt32 distance;
-++        prob = probs + PosSlot +
-++            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << kNumPosSlotBits);
-++        TREE_6_DECODE(prob, distance);
-++        if (distance >= kStartPosModelIndex)
-++        {
-++          unsigned posSlot = (unsigned)distance;
-++          int numDirectBits = (int)(((distance >> 1) - 1));
-++          distance = (2 | (distance & 1));
-++          if (posSlot < kEndPosModelIndex)
-++          {
-++            distance <<= numDirectBits;
-++            prob = probs + SpecPos + distance - posSlot - 1;
-++            {
-++              UInt32 mask = 1;
-++              unsigned i = 1;
-++              do
-++              {
-++                GET_BIT2(prob + i, i, ; , distance |= mask);
-++                mask <<= 1;
-++              }
-++              while (--numDirectBits != 0);
-++            }
-++          }
-++          else
-++          {
-++            numDirectBits -= kNumAlignBits;
-++            do
-++            {
-++              NORMALIZE
-++              range >>= 1;
-++
-++              {
-++                UInt32 t;
-++                code -= range;
-++                t = (0 - ((UInt32)code >> 31)); /* (UInt32)((Int32)code >> 31) */
-++                distance = (distance << 1) + (t + 1);
-++                code += range & t;
-++              }
-++              /*
-++              distance <<= 1;
-++              if (code >= range)
-++              {
-++                code -= range;
-++                distance |= 1;
-++              }
-++              */
-++            }
-++            while (--numDirectBits != 0);
-++            prob = probs + Align;
-++            distance <<= kNumAlignBits;
-++            {
-++              unsigned i = 1;
-++              GET_BIT2(prob + i, i, ; , distance |= 1);
-++              GET_BIT2(prob + i, i, ; , distance |= 2);
-++              GET_BIT2(prob + i, i, ; , distance |= 4);
-++              GET_BIT2(prob + i, i, ; , distance |= 8);
-++            }
-++            if (distance == (UInt32)0xFFFFFFFF)
-++            {
-++              len += kMatchSpecLenStart;
-++              state -= kNumStates;
-++              break;
-++            }
-++          }
-++        }
-++        rep3 = rep2;
-++        rep2 = rep1;
-++        rep1 = rep0;
-++        rep0 = distance + 1;
-++        if (checkDicSize == 0)
-++        {
-++          if (distance >= processedPos)
-++            return SZ_ERROR_DATA;
-++        }
-++        else if (distance >= checkDicSize)
-++          return SZ_ERROR_DATA;
-++        state = (state < kNumStates + kNumLitStates) ? kNumLitStates : kNumLitStates + 3;
-++      }
-++
-++      len += kMatchMinLen;
-++
-++      if (limit == dicPos)
-++        return SZ_ERROR_DATA;
-++      {
-++        SizeT rem = limit - dicPos;
-++        unsigned curLen = ((rem < len) ? (unsigned)rem : len);
-++        SizeT pos = (dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0);
-++
-++        processedPos += curLen;
-++
-++        len -= curLen;
-++        if (pos + curLen <= dicBufSize)
-++        {
-++          Byte *dest = dic + dicPos;
-++          ptrdiff_t src = (ptrdiff_t)pos - (ptrdiff_t)dicPos;
-++          const Byte *lim = dest + curLen;
-++          dicPos += curLen;
-++          do
-++            *(dest) = (Byte)*(dest + src);
-++          while (++dest != lim);
-++        }
-++        else
-++        {
-++          do
-++          {
-++            dic[dicPos++] = dic[pos];
-++            if (++pos == dicBufSize)
-++              pos = 0;
-++          }
-++          while (--curLen != 0);
-++        }
-++      }
-++    }
-++  }
-++  while (dicPos < limit && buf < bufLimit);
-++  NORMALIZE;
-++  p->buf = buf;
-++  p->range = range;
-++  p->code = code;
-++  p->remainLen = len;
-++  p->dicPos = dicPos;
-++  p->processedPos = processedPos;
-++  p->reps[0] = rep0;
-++  p->reps[1] = rep1;
-++  p->reps[2] = rep2;
-++  p->reps[3] = rep3;
-++  p->state = state;
-++
-++  return SZ_OK;
-++}
-++
-++static void MY_FAST_CALL LzmaDec_WriteRem(CLzmaDec *p, SizeT limit)
-++{
-++  if (p->remainLen != 0 && p->remainLen < kMatchSpecLenStart)
-++  {
-++    Byte *dic = p->dic;
-++    SizeT dicPos = p->dicPos;
-++    SizeT dicBufSize = p->dicBufSize;
-++    unsigned len = p->remainLen;
-++    UInt32 rep0 = p->reps[0];
-++    if (limit - dicPos < len)
-++      len = (unsigned)(limit - dicPos);
-++
-++    if (p->checkDicSize == 0 && p->prop.dicSize - p->processedPos <= len)
-++      p->checkDicSize = p->prop.dicSize;
-++
-++    p->processedPos += len;
-++    p->remainLen -= len;
-++    while (len-- != 0)
-++    {
-++      dic[dicPos] = dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)];
-++      dicPos++;
-++    }
-++    p->dicPos = dicPos;
-++  }
-++}
-++
-++static int MY_FAST_CALL LzmaDec_DecodeReal2(CLzmaDec *p, SizeT limit, const Byte *bufLimit)
-++{
-++  do
-++  {
-++    SizeT limit2 = limit;
-++    if (p->checkDicSize == 0)
-++    {
-++      UInt32 rem = p->prop.dicSize - p->processedPos;
-++      if (limit - p->dicPos > rem)
-++        limit2 = p->dicPos + rem;
-++    }
-++    RINOK(LzmaDec_DecodeReal(p, limit2, bufLimit));
-++    if (p->processedPos >= p->prop.dicSize)
-++      p->checkDicSize = p->prop.dicSize;
-++    LzmaDec_WriteRem(p, limit);
-++  }
-++  while (p->dicPos < limit && p->buf < bufLimit && p->remainLen < kMatchSpecLenStart);
-++
-++  if (p->remainLen > kMatchSpecLenStart)
-++  {
-++    p->remainLen = kMatchSpecLenStart;
-++  }
-++  return 0;
-++}
-++
-++typedef enum
-++{
-++  DUMMY_ERROR, /* unexpected end of input stream */
-++  DUMMY_LIT,
-++  DUMMY_MATCH,
-++  DUMMY_REP
-++} ELzmaDummy;
-++
-++static ELzmaDummy LzmaDec_TryDummy(const CLzmaDec *p, const Byte *buf, SizeT inSize)
-++{
-++  UInt32 range = p->range;
-++  UInt32 code = p->code;
-++  const Byte *bufLimit = buf + inSize;
-++  CLzmaProb *probs = p->probs;
-++  unsigned state = p->state;
-++  ELzmaDummy res;
-++
-++  {
-++    CLzmaProb *prob;
-++    UInt32 bound;
-++    unsigned ttt;
-++    unsigned posState = (p->processedPos) & ((1 << p->prop.pb) - 1);
-++
-++    prob = probs + IsMatch + (state << kNumPosBitsMax) + posState;
-++    IF_BIT_0_CHECK(prob)
-++    {
-++      UPDATE_0_CHECK
-++
-++      /* if (bufLimit - buf >= 7) return DUMMY_LIT; */
-++
-++      prob = probs + Literal;
-++      if (p->checkDicSize != 0 || p->processedPos != 0)
-++        prob += (LZMA_LIT_SIZE *
-++          ((((p->processedPos) & ((1 << (p->prop.lp)) - 1)) << p->prop.lc) +
-++          (p->dic[(p->dicPos == 0 ? p->dicBufSize : p->dicPos) - 1] >> (8 - p->prop.lc))));
-++
-++      if (state < kNumLitStates)
-++      {
-++        unsigned symbol = 1;
-++        do { GET_BIT_CHECK(prob + symbol, symbol) } while (symbol < 0x100);
-++      }
-++      else
-++      {
-++        unsigned matchByte = p->dic[p->dicPos - p->reps[0] +
-++            ((p->dicPos < p->reps[0]) ? p->dicBufSize : 0)];
-++        unsigned offs = 0x100;
-++        unsigned symbol = 1;
-++        do
-++        {
-++          unsigned bit;
-++          CLzmaProb *probLit;
-++          matchByte <<= 1;
-++          bit = (matchByte & offs);
-++          probLit = prob + offs + bit + symbol;
-++          GET_BIT2_CHECK(probLit, symbol, offs &= ~bit, offs &= bit)
-++        }
-++        while (symbol < 0x100);
-++      }
-++      res = DUMMY_LIT;
-++    }
-++    else
-++    {
-++      unsigned len;
-++      UPDATE_1_CHECK;
-++
-++      prob = probs + IsRep + state;
-++      IF_BIT_0_CHECK(prob)
-++      {
-++        UPDATE_0_CHECK;
-++        state = 0;
-++        prob = probs + LenCoder;
-++        res = DUMMY_MATCH;
-++      }
-++      else
-++      {
-++        UPDATE_1_CHECK;
-++        res = DUMMY_REP;
-++        prob = probs + IsRepG0 + state;
-++        IF_BIT_0_CHECK(prob)
-++        {
-++          UPDATE_0_CHECK;
-++          prob = probs + IsRep0Long + (state << kNumPosBitsMax) + posState;
-++          IF_BIT_0_CHECK(prob)
-++          {
-++            UPDATE_0_CHECK;
-++            NORMALIZE_CHECK;
-++            return DUMMY_REP;
-++          }
-++          else
-++          {
-++            UPDATE_1_CHECK;
-++          }
-++        }
-++        else
-++        {
-++          UPDATE_1_CHECK;
-++          prob = probs + IsRepG1 + state;
-++          IF_BIT_0_CHECK(prob)
-++          {
-++            UPDATE_0_CHECK;
-++          }
-++          else
-++          {
-++            UPDATE_1_CHECK;
-++            prob = probs + IsRepG2 + state;
-++            IF_BIT_0_CHECK(prob)
-++            {
-++              UPDATE_0_CHECK;
-++            }
-++            else
-++            {
-++              UPDATE_1_CHECK;
-++            }
-++          }
-++        }
-++        state = kNumStates;
-++        prob = probs + RepLenCoder;
-++      }
-++      {
-++        unsigned limit, offset;
-++        CLzmaProb *probLen = prob + LenChoice;
-++        IF_BIT_0_CHECK(probLen)
-++        {
-++          UPDATE_0_CHECK;
-++          probLen = prob + LenLow + (posState << kLenNumLowBits);
-++          offset = 0;
-++          limit = 1 << kLenNumLowBits;
-++        }
-++        else
-++        {
-++          UPDATE_1_CHECK;
-++          probLen = prob + LenChoice2;
-++          IF_BIT_0_CHECK(probLen)
-++          {
-++            UPDATE_0_CHECK;
-++            probLen = prob + LenMid + (posState << kLenNumMidBits);
-++            offset = kLenNumLowSymbols;
-++            limit = 1 << kLenNumMidBits;
-++          }
-++          else
-++          {
-++            UPDATE_1_CHECK;
-++            probLen = prob + LenHigh;
-++            offset = kLenNumLowSymbols + kLenNumMidSymbols;
-++            limit = 1 << kLenNumHighBits;
-++          }
-++        }
-++        TREE_DECODE_CHECK(probLen, limit, len);
-++        len += offset;
-++      }
-++
-++      if (state < 4)
-++      {
-++        unsigned posSlot;
-++        prob = probs + PosSlot +
-++            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
-++            kNumPosSlotBits);
-++        TREE_DECODE_CHECK(prob, 1 << kNumPosSlotBits, posSlot);
-++        if (posSlot >= kStartPosModelIndex)
-++        {
-++          int numDirectBits = ((posSlot >> 1) - 1);
-++
-++          /* if (bufLimit - buf >= 8) return DUMMY_MATCH; */
-++
-++          if (posSlot < kEndPosModelIndex)
-++          {
-++            prob = probs + SpecPos + ((2 | (posSlot & 1)) << numDirectBits) - posSlot - 1;
-++          }
-++          else
-++          {
-++            numDirectBits -= kNumAlignBits;
-++            do
-++            {
-++              NORMALIZE_CHECK
-++              range >>= 1;
-++              code -= range & (((code - range) >> 31) - 1);
-++              /* if (code >= range) code -= range; */
-++            }
-++            while (--numDirectBits != 0);
-++            prob = probs + Align;
-++            numDirectBits = kNumAlignBits;
-++          }
-++          {
-++            unsigned i = 1;
-++            do
-++            {
-++              GET_BIT_CHECK(prob + i, i);
-++            }
-++            while (--numDirectBits != 0);
-++          }
-++        }
-++      }
-++    }
-++  }
-++  NORMALIZE_CHECK;
-++  return res;
-++}
-++
-++
-++static void LzmaDec_InitRc(CLzmaDec *p, const Byte *data)
-++{
-++  p->code = ((UInt32)data[1] << 24) | ((UInt32)data[2] << 16) | ((UInt32)data[3] << 8) | ((UInt32)data[4]);
-++  p->range = 0xFFFFFFFF;
-++  p->needFlush = 0;
-++}
-++
-++void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
-++{
-++  p->needFlush = 1;
-++  p->remainLen = 0;
-++  p->tempBufSize = 0;
-++
-++  if (initDic)
-++  {
-++    p->processedPos = 0;
-++    p->checkDicSize = 0;
-++    p->needInitState = 1;
-++  }
-++  if (initState)
-++    p->needInitState = 1;
-++}
-++
-++void LzmaDec_Init(CLzmaDec *p)
-++{
-++  p->dicPos = 0;
-++  LzmaDec_InitDicAndState(p, True, True);
-++}
-++
-++static void LzmaDec_InitStateReal(CLzmaDec *p)
-++{
-++  UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (p->prop.lc + p->prop.lp));
-++  UInt32 i;
-++  CLzmaProb *probs = p->probs;
-++  for (i = 0; i < numProbs; i++)
-++    probs[i] = kBitModelTotal >> 1;
-++  p->reps[0] = p->reps[1] = p->reps[2] = p->reps[3] = 1;
-++  p->state = 0;
-++  p->needInitState = 0;
-++}
-++
-++SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
-++    ELzmaFinishMode finishMode, ELzmaStatus *status)
-++{
-++  SizeT inSize = *srcLen;
-++  (*srcLen) = 0;
-++  LzmaDec_WriteRem(p, dicLimit);
-++
-++  *status = LZMA_STATUS_NOT_SPECIFIED;
-++
-++  while (p->remainLen != kMatchSpecLenStart)
-++  {
-++      int checkEndMarkNow;
-++
-++      if (p->needFlush != 0)
-++      {
-++        for (; inSize > 0 && p->tempBufSize < RC_INIT_SIZE; (*srcLen)++, inSize--)
-++          p->tempBuf[p->tempBufSize++] = *src++;
-++        if (p->tempBufSize < RC_INIT_SIZE)
-++        {
-++          *status = LZMA_STATUS_NEEDS_MORE_INPUT;
-++          return SZ_OK;
-++        }
-++        if (p->tempBuf[0] != 0)
-++          return SZ_ERROR_DATA;
-++
-++        LzmaDec_InitRc(p, p->tempBuf);
-++        p->tempBufSize = 0;
-++      }
-++
-++      checkEndMarkNow = 0;
-++      if (p->dicPos >= dicLimit)
-++      {
-++        if (p->remainLen == 0 && p->code == 0)
-++        {
-++          *status = LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK;
-++          return SZ_OK;
-++        }
-++        if (finishMode == LZMA_FINISH_ANY)
-++        {
-++          *status = LZMA_STATUS_NOT_FINISHED;
-++          return SZ_OK;
-++        }
-++        if (p->remainLen != 0)
-++        {
-++          *status = LZMA_STATUS_NOT_FINISHED;
-++          return SZ_ERROR_DATA;
-++        }
-++        checkEndMarkNow = 1;
-++      }
-++
-++      if (p->needInitState)
-++        LzmaDec_InitStateReal(p);
-++
-++      if (p->tempBufSize == 0)
-++      {
-++        SizeT processed;
-++        const Byte *bufLimit;
-++        if (inSize < LZMA_REQUIRED_INPUT_MAX || checkEndMarkNow)
-++        {
-++          int dummyRes = LzmaDec_TryDummy(p, src, inSize);
-++          if (dummyRes == DUMMY_ERROR)
-++          {
-++            memcpy(p->tempBuf, src, inSize);
-++            p->tempBufSize = (unsigned)inSize;
-++            (*srcLen) += inSize;
-++            *status = LZMA_STATUS_NEEDS_MORE_INPUT;
-++            return SZ_OK;
-++          }
-++          if (checkEndMarkNow && dummyRes != DUMMY_MATCH)
-++          {
-++            *status = LZMA_STATUS_NOT_FINISHED;
-++            return SZ_ERROR_DATA;
-++          }
-++          bufLimit = src;
-++        }
-++        else
-++          bufLimit = src + inSize - LZMA_REQUIRED_INPUT_MAX;
-++        p->buf = src;
-++        if (LzmaDec_DecodeReal2(p, dicLimit, bufLimit) != 0)
-++          return SZ_ERROR_DATA;
-++        processed = (SizeT)(p->buf - src);
-++        (*srcLen) += processed;
-++        src += processed;
-++        inSize -= processed;
-++      }
-++      else
-++      {
-++        unsigned rem = p->tempBufSize, lookAhead = 0;
-++        while (rem < LZMA_REQUIRED_INPUT_MAX && lookAhead < inSize)
-++          p->tempBuf[rem++] = src[lookAhead++];
-++        p->tempBufSize = rem;
-++        if (rem < LZMA_REQUIRED_INPUT_MAX || checkEndMarkNow)
-++        {
-++          int dummyRes = LzmaDec_TryDummy(p, p->tempBuf, rem);
-++          if (dummyRes == DUMMY_ERROR)
-++          {
-++            (*srcLen) += lookAhead;
-++            *status = LZMA_STATUS_NEEDS_MORE_INPUT;
-++            return SZ_OK;
-++          }
-++          if (checkEndMarkNow && dummyRes != DUMMY_MATCH)
-++          {
-++            *status = LZMA_STATUS_NOT_FINISHED;
-++            return SZ_ERROR_DATA;
-++          }
-++        }
-++        p->buf = p->tempBuf;
-++        if (LzmaDec_DecodeReal2(p, dicLimit, p->buf) != 0)
-++          return SZ_ERROR_DATA;
-++        lookAhead -= (rem - (unsigned)(p->buf - p->tempBuf));
-++        (*srcLen) += lookAhead;
-++        src += lookAhead;
-++        inSize -= lookAhead;
-++        p->tempBufSize = 0;
-++      }
-++  }
-++  if (p->code == 0)
-++    *status = LZMA_STATUS_FINISHED_WITH_MARK;
-++  return (p->code == 0) ? SZ_OK : SZ_ERROR_DATA;
-++}
-++
-++SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status)
-++{
-++  SizeT outSize = *destLen;
-++  SizeT inSize = *srcLen;
-++  *srcLen = *destLen = 0;
-++  for (;;)
-++  {
-++    SizeT inSizeCur = inSize, outSizeCur, dicPos;
-++    ELzmaFinishMode curFinishMode;
-++    SRes res;
-++    if (p->dicPos == p->dicBufSize)
-++      p->dicPos = 0;
-++    dicPos = p->dicPos;
-++    if (outSize > p->dicBufSize - dicPos)
-++    {
-++      outSizeCur = p->dicBufSize;
-++      curFinishMode = LZMA_FINISH_ANY;
-++    }
-++    else
-++    {
-++      outSizeCur = dicPos + outSize;
-++      curFinishMode = finishMode;
-++    }
-++
-++    res = LzmaDec_DecodeToDic(p, outSizeCur, src, &inSizeCur, curFinishMode, status);
-++    src += inSizeCur;
-++    inSize -= inSizeCur;
-++    *srcLen += inSizeCur;
-++    outSizeCur = p->dicPos - dicPos;
-++    memcpy(dest, p->dic + dicPos, outSizeCur);
-++    dest += outSizeCur;
-++    outSize -= outSizeCur;
-++    *destLen += outSizeCur;
-++    if (res != 0)
-++      return res;
-++    if (outSizeCur == 0 || outSize == 0)
-++      return SZ_OK;
-++  }
-++}
-++
-++void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
-++{
-++  alloc->Free(alloc, p->probs);
-++  p->probs = 0;
-++}
-++
-++static void LzmaDec_FreeDict(CLzmaDec *p, ISzAlloc *alloc)
-++{
-++  alloc->Free(alloc, p->dic);
-++  p->dic = 0;
-++}
-++
-++void LzmaDec_Free(CLzmaDec *p, ISzAlloc *alloc)
-++{
-++  LzmaDec_FreeProbs(p, alloc);
-++  LzmaDec_FreeDict(p, alloc);
-++}
-++
-++SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
-++{
-++  UInt32 dicSize;
-++  Byte d;
-++
-++  if (size < LZMA_PROPS_SIZE)
-++    return SZ_ERROR_UNSUPPORTED;
-++  else
-++    dicSize = data[1] | ((UInt32)data[2] << 8) | ((UInt32)data[3] << 16) | ((UInt32)data[4] << 24);
-++
-++  if (dicSize < LZMA_DIC_MIN)
-++    dicSize = LZMA_DIC_MIN;
-++  p->dicSize = dicSize;
-++
-++  d = data[0];
-++  if (d >= (9 * 5 * 5))
-++    return SZ_ERROR_UNSUPPORTED;
-++
-++  p->lc = d % 9;
-++  d /= 9;
-++  p->pb = d / 5;
-++  p->lp = d % 5;
-++
-++  return SZ_OK;
-++}
-++
-++static SRes LzmaDec_AllocateProbs2(CLzmaDec *p, const CLzmaProps *propNew, ISzAlloc *alloc)
-++{
-++  UInt32 numProbs = LzmaProps_GetNumProbs(propNew);
-++  if (p->probs == 0 || numProbs != p->numProbs)
-++  {
-++    LzmaDec_FreeProbs(p, alloc);
-++    p->probs = (CLzmaProb *)alloc->Alloc(alloc, numProbs * sizeof(CLzmaProb));
-++    p->numProbs = numProbs;
-++    if (p->probs == 0)
-++      return SZ_ERROR_MEM;
-++  }
-++  return SZ_OK;
-++}
-++
-++SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
-++{
-++  CLzmaProps propNew;
-++  RINOK(LzmaProps_Decode(&propNew, props, propsSize));
-++  RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc));
-++  p->prop = propNew;
-++  return SZ_OK;
-++}
-++
-++SRes LzmaDec_Allocate(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
-++{
-++  CLzmaProps propNew;
-++  SizeT dicBufSize;
-++  RINOK(LzmaProps_Decode(&propNew, props, propsSize));
-++  RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc));
-++  dicBufSize = propNew.dicSize;
-++  if (p->dic == 0 || dicBufSize != p->dicBufSize)
-++  {
-++    LzmaDec_FreeDict(p, alloc);
-++    p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize);
-++    if (p->dic == 0)
-++    {
-++      LzmaDec_FreeProbs(p, alloc);
-++      return SZ_ERROR_MEM;
-++    }
-++  }
-++  p->dicBufSize = dicBufSize;
-++  p->prop = propNew;
-++  return SZ_OK;
-++}
-++
-++SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
-++    const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode,
-++    ELzmaStatus *status, ISzAlloc *alloc)
-++{
-++  CLzmaDec p;
-++  SRes res;
-++  SizeT inSize = *srcLen;
-++  SizeT outSize = *destLen;
-++  *srcLen = *destLen = 0;
-++  if (inSize < RC_INIT_SIZE)
-++    return SZ_ERROR_INPUT_EOF;
-++
-++  LzmaDec_Construct(&p);
-++  res = LzmaDec_AllocateProbs(&p, propData, propSize, alloc);
-++  if (res != 0)
-++    return res;
-++  p.dic = dest;
-++  p.dicBufSize = outSize;
-++
-++  LzmaDec_Init(&p);
-++
-++  *srcLen = inSize;
-++  res = LzmaDec_DecodeToDic(&p, outSize, src, srcLen, finishMode, status);
-++
-++  if (res == SZ_OK && *status == LZMA_STATUS_NEEDS_MORE_INPUT)
-++    res = SZ_ERROR_INPUT_EOF;
-++
-++  (*destLen) = p.dicPos;
-++  LzmaDec_FreeProbs(&p, alloc);
-++  return res;
-++}
-+--- /dev/null
-++++ b/lib/lzma/LzmaEnc.c
-+@@ -0,0 +1,2271 @@
-++/* LzmaEnc.c -- LZMA Encoder
-++2009-11-24 : Igor Pavlov : Public domain */
-++
-++#include <string.h>
-++
-++/* #define SHOW_STAT */
-++/* #define SHOW_STAT2 */
-++
-++#if defined(SHOW_STAT) || defined(SHOW_STAT2)
-++#include <stdio.h>
-++#endif
-++
-++#include "LzmaEnc.h"
-++
-++/* disable MT */
-++#define _7ZIP_ST
-++
-++#include "LzFind.h"
-++#ifndef _7ZIP_ST
-++#include "LzFindMt.h"
-++#endif
-++
-++#ifdef SHOW_STAT
-++static int ttt = 0;
-++#endif
-++
-++#define kBlockSizeMax ((1 << LZMA_NUM_BLOCK_SIZE_BITS) - 1)
-++
-++#define kBlockSize (9 << 10)
-++#define kUnpackBlockSize (1 << 18)
-++#define kMatchArraySize (1 << 21)
-++#define kMatchRecordMaxSize ((LZMA_MATCH_LEN_MAX * 2 + 3) * LZMA_MATCH_LEN_MAX)
-++
-++#define kNumMaxDirectBits (31)
-++
-++#define kNumTopBits 24
-++#define kTopValue ((UInt32)1 << kNumTopBits)
-++
-++#define kNumBitModelTotalBits 11
-++#define kBitModelTotal (1 << kNumBitModelTotalBits)
-++#define kNumMoveBits 5
-++#define kProbInitValue (kBitModelTotal >> 1)
-++
-++#define kNumMoveReducingBits 4
-++#define kNumBitPriceShiftBits 4
-++#define kBitPrice (1 << kNumBitPriceShiftBits)
-++
-++void LzmaEncProps_Init(CLzmaEncProps *p)
-++{
-++  p->level = 5;
-++  p->dictSize = p->mc = 0;
-++  p->lc = p->lp = p->pb = p->algo = p->fb = p->btMode = p->numHashBytes = p->numThreads = -1;
-++  p->writeEndMark = 0;
-++}
-++
-++void LzmaEncProps_Normalize(CLzmaEncProps *p)
-++{
-++  int level = p->level;
-++  if (level < 0) level = 5;
-++  p->level = level;
-++  if (p->dictSize == 0) p->dictSize = (level <= 5 ? (1 << (level * 2 + 14)) : (level == 6 ? (1 << 25) : (1 << 26)));
-++  if (p->lc < 0) p->lc = 3;
-++  if (p->lp < 0) p->lp = 0;
-++  if (p->pb < 0) p->pb = 2;
-++  if (p->algo < 0) p->algo = (level < 5 ? 0 : 1);
-++  if (p->fb < 0) p->fb = (level < 7 ? 32 : 64);
-++  if (p->btMode < 0) p->btMode = (p->algo == 0 ? 0 : 1);
-++  if (p->numHashBytes < 0) p->numHashBytes = 4;
-++  if (p->mc == 0)  p->mc = (16 + (p->fb >> 1)) >> (p->btMode ? 0 : 1);
-++  if (p->numThreads < 0)
-++    p->numThreads =
-++      #ifndef _7ZIP_ST
-++      ((p->btMode && p->algo) ? 2 : 1);
-++      #else
-++      1;
-++      #endif
-++}
-++
-++UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
-++{
-++  CLzmaEncProps props = *props2;
-++  LzmaEncProps_Normalize(&props);
-++  return props.dictSize;
-++}
-++
-++/* #define LZMA_LOG_BSR */
-++/* Define it for Intel's CPU */
-++
-++
-++#ifdef LZMA_LOG_BSR
-++
-++#define kDicLogSizeMaxCompress 30
-++
-++#define BSR2_RET(pos, res) { unsigned long i; _BitScanReverse(&i, (pos)); res = (i + i) + ((pos >> (i - 1)) & 1); }
-++
-++UInt32 GetPosSlot1(UInt32 pos)
-++{
-++  UInt32 res;
-++  BSR2_RET(pos, res);
-++  return res;
-++}
-++#define GetPosSlot2(pos, res) { BSR2_RET(pos, res); }
-++#define GetPosSlot(pos, res) { if (pos < 2) res = pos; else BSR2_RET(pos, res); }
-++
-++#else
-++
-++#define kNumLogBits (9 + (int)sizeof(size_t) / 2)
-++#define kDicLogSizeMaxCompress ((kNumLogBits - 1) * 2 + 7)
-++
-++void LzmaEnc_FastPosInit(Byte *g_FastPos)
-++{
-++  int c = 2, slotFast;
-++  g_FastPos[0] = 0;
-++  g_FastPos[1] = 1;
-++
-++  for (slotFast = 2; slotFast < kNumLogBits * 2; slotFast++)
-++  {
-++    UInt32 k = (1 << ((slotFast >> 1) - 1));
-++    UInt32 j;
-++    for (j = 0; j < k; j++, c++)
-++      g_FastPos[c] = (Byte)slotFast;
-++  }
-++}
-++
-++#define BSR2_RET(pos, res) { UInt32 i = 6 + ((kNumLogBits - 1) & \
-++  (0 - (((((UInt32)1 << (kNumLogBits + 6)) - 1) - pos) >> 31))); \
-++  res = p->g_FastPos[pos >> i] + (i * 2); }
-++/*
-++#define BSR2_RET(pos, res) { res = (pos < (1 << (kNumLogBits + 6))) ? \
-++  p->g_FastPos[pos >> 6] + 12 : \
-++  p->g_FastPos[pos >> (6 + kNumLogBits - 1)] + (6 + (kNumLogBits - 1)) * 2; }
-++*/
-++
-++#define GetPosSlot1(pos) p->g_FastPos[pos]
-++#define GetPosSlot2(pos, res) { BSR2_RET(pos, res); }
-++#define GetPosSlot(pos, res) { if (pos < kNumFullDistances) res = p->g_FastPos[pos]; else BSR2_RET(pos, res); }
-++
-++#endif
-++
-++
-++#define LZMA_NUM_REPS 4
-++
-++typedef unsigned CState;
-++
-++typedef struct
-++{
-++  UInt32 price;
-++
-++  CState state;
-++  int prev1IsChar;
-++  int prev2;
-++
-++  UInt32 posPrev2;
-++  UInt32 backPrev2;
-++
-++  UInt32 posPrev;
-++  UInt32 backPrev;
-++  UInt32 backs[LZMA_NUM_REPS];
-++} COptimal;
-++
-++#define kNumOpts (1 << 12)
-++
-++#define kNumLenToPosStates 4
-++#define kNumPosSlotBits 6
-++#define kDicLogSizeMin 0
-++#define kDicLogSizeMax 32
-++#define kDistTableSizeMax (kDicLogSizeMax * 2)
-++
-++
-++#define kNumAlignBits 4
-++#define kAlignTableSize (1 << kNumAlignBits)
-++#define kAlignMask (kAlignTableSize - 1)
-++
-++#define kStartPosModelIndex 4
-++#define kEndPosModelIndex 14
-++#define kNumPosModels (kEndPosModelIndex - kStartPosModelIndex)
-++
-++#define kNumFullDistances (1 << (kEndPosModelIndex >> 1))
-++
-++#ifdef _LZMA_PROB32
-++#define CLzmaProb UInt32
-++#else
-++#define CLzmaProb UInt16
-++#endif
-++
-++#define LZMA_PB_MAX 4
-++#define LZMA_LC_MAX 8
-++#define LZMA_LP_MAX 4
-++
-++#define LZMA_NUM_PB_STATES_MAX (1 << LZMA_PB_MAX)
-++
-++
-++#define kLenNumLowBits 3
-++#define kLenNumLowSymbols (1 << kLenNumLowBits)
-++#define kLenNumMidBits 3
-++#define kLenNumMidSymbols (1 << kLenNumMidBits)
-++#define kLenNumHighBits 8
-++#define kLenNumHighSymbols (1 << kLenNumHighBits)
-++
-++#define kLenNumSymbolsTotal (kLenNumLowSymbols + kLenNumMidSymbols + kLenNumHighSymbols)
-++
-++#define LZMA_MATCH_LEN_MIN 2
-++#define LZMA_MATCH_LEN_MAX (LZMA_MATCH_LEN_MIN + kLenNumSymbolsTotal - 1)
-++
-++#define kNumStates 12
-++
-++typedef struct
-++{
-++  CLzmaProb choice;
-++  CLzmaProb choice2;
-++  CLzmaProb low[LZMA_NUM_PB_STATES_MAX << kLenNumLowBits];
-++  CLzmaProb mid[LZMA_NUM_PB_STATES_MAX << kLenNumMidBits];
-++  CLzmaProb high[kLenNumHighSymbols];
-++} CLenEnc;
-++
-++typedef struct
-++{
-++  CLenEnc p;
-++  UInt32 prices[LZMA_NUM_PB_STATES_MAX][kLenNumSymbolsTotal];
-++  UInt32 tableSize;
-++  UInt32 counters[LZMA_NUM_PB_STATES_MAX];
-++} CLenPriceEnc;
-++
-++typedef struct
-++{
-++  UInt32 range;
-++  Byte cache;
-++  UInt64 low;
-++  UInt64 cacheSize;
-++  Byte *buf;
-++  Byte *bufLim;
-++  Byte *bufBase;
-++  ISeqOutStream *outStream;
-++  UInt64 processed;
-++  SRes res;
-++} CRangeEnc;
-++
-++typedef struct
-++{
-++  CLzmaProb *litProbs;
-++
-++  CLzmaProb isMatch[kNumStates][LZMA_NUM_PB_STATES_MAX];
-++  CLzmaProb isRep[kNumStates];
-++  CLzmaProb isRepG0[kNumStates];
-++  CLzmaProb isRepG1[kNumStates];
-++  CLzmaProb isRepG2[kNumStates];
-++  CLzmaProb isRep0Long[kNumStates][LZMA_NUM_PB_STATES_MAX];
-++
-++  CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits];
-++  CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex];
-++  CLzmaProb posAlignEncoder[1 << kNumAlignBits];
-++
-++  CLenPriceEnc lenEnc;
-++  CLenPriceEnc repLenEnc;
-++
-++  UInt32 reps[LZMA_NUM_REPS];
-++  UInt32 state;
-++} CSaveState;
-++
-++typedef struct
-++{
-++  IMatchFinder matchFinder;
-++  void *matchFinderObj;
-++
-++  #ifndef _7ZIP_ST
-++  Bool mtMode;
-++  CMatchFinderMt matchFinderMt;
-++  #endif
-++
-++  CMatchFinder matchFinderBase;
-++
-++  #ifndef _7ZIP_ST
-++  Byte pad[128];
-++  #endif
-++
-++  UInt32 optimumEndIndex;
-++  UInt32 optimumCurrentIndex;
-++
-++  UInt32 longestMatchLength;
-++  UInt32 numPairs;
-++  UInt32 numAvail;
-++  COptimal opt[kNumOpts];
-++
-++  #ifndef LZMA_LOG_BSR
-++  Byte g_FastPos[1 << kNumLogBits];
-++  #endif
-++
-++  UInt32 ProbPrices[kBitModelTotal >> kNumMoveReducingBits];
-++  UInt32 matches[LZMA_MATCH_LEN_MAX * 2 + 2 + 1];
-++  UInt32 numFastBytes;
-++  UInt32 additionalOffset;
-++  UInt32 reps[LZMA_NUM_REPS];
-++  UInt32 state;
-++
-++  UInt32 posSlotPrices[kNumLenToPosStates][kDistTableSizeMax];
-++  UInt32 distancesPrices[kNumLenToPosStates][kNumFullDistances];
-++  UInt32 alignPrices[kAlignTableSize];
-++  UInt32 alignPriceCount;
-++
-++  UInt32 distTableSize;
-++
-++  unsigned lc, lp, pb;
-++  unsigned lpMask, pbMask;
-++
-++  CLzmaProb *litProbs;
-++
-++  CLzmaProb isMatch[kNumStates][LZMA_NUM_PB_STATES_MAX];
-++  CLzmaProb isRep[kNumStates];
-++  CLzmaProb isRepG0[kNumStates];
-++  CLzmaProb isRepG1[kNumStates];
-++  CLzmaProb isRepG2[kNumStates];
-++  CLzmaProb isRep0Long[kNumStates][LZMA_NUM_PB_STATES_MAX];
-++
-++  CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits];
-++  CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex];
-++  CLzmaProb posAlignEncoder[1 << kNumAlignBits];
-++
-++  CLenPriceEnc lenEnc;
-++  CLenPriceEnc repLenEnc;
-++
-++  unsigned lclp;
-++
-++  Bool fastMode;
-++
-++  CRangeEnc rc;
-++
-++  Bool writeEndMark;
-++  UInt64 nowPos64;
-++  UInt32 matchPriceCount;
-++  Bool finished;
-++  Bool multiThread;
-++
-++  SRes result;
-++  UInt32 dictSize;
-++  UInt32 matchFinderCycles;
-++
-++  int needInit;
-++
-++  CSaveState saveState;
-++} CLzmaEnc;
-++
-++void LzmaEnc_SaveState(CLzmaEncHandle pp)
-++{
-++  CLzmaEnc *p = (CLzmaEnc *)pp;
-++  CSaveState *dest = &p->saveState;
-++  int i;
-++  dest->lenEnc = p->lenEnc;
-++  dest->repLenEnc = p->repLenEnc;
-++  dest->state = p->state;
-++
-++  for (i = 0; i < kNumStates; i++)
-++  {
-++    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
-++    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
-++  }
-++  for (i = 0; i < kNumLenToPosStates; i++)
-++    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
-++  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
-++  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
-++  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
-++  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
-++  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
-++  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
-++  memcpy(dest->reps, p->reps, sizeof(p->reps));
-++  memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb));
-++}
-++
-++void LzmaEnc_RestoreState(CLzmaEncHandle pp)
-++{
-++  CLzmaEnc *dest = (CLzmaEnc *)pp;
-++  const CSaveState *p = &dest->saveState;
-++  int i;
-++  dest->lenEnc = p->lenEnc;
-++  dest->repLenEnc = p->repLenEnc;
-++  dest->state = p->state;
-++
-++  for (i = 0; i < kNumStates; i++)
-++  {
-++    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
-++    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
-++  }
-++  for (i = 0; i < kNumLenToPosStates; i++)
-++    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
-++  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
-++  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
-++  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
-++  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
-++  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
-++  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
-++  memcpy(dest->reps, p->reps, sizeof(p->reps));
-++  memcpy(dest->litProbs, p->litProbs, (0x300 << dest->lclp) * sizeof(CLzmaProb));
-++}
-++
-++SRes LzmaEnc_SetProps(CLzmaEncHandle pp, const CLzmaEncProps *props2)
-++{
-++  CLzmaEnc *p = (CLzmaEnc *)pp;
-++  CLzmaEncProps props = *props2;
-++  LzmaEncProps_Normalize(&props);
-++
-++  if (props.lc > LZMA_LC_MAX || props.lp > LZMA_LP_MAX || props.pb > LZMA_PB_MAX ||
-++      props.dictSize > (1 << kDicLogSizeMaxCompress) || props.dictSize > (1 << 30))
-++    return SZ_ERROR_PARAM;
-++  p->dictSize = props.dictSize;
-++  p->matchFinderCycles = props.mc;
-++  {
-++    unsigned fb = props.fb;
-++    if (fb < 5)
-++      fb = 5;
-++    if (fb > LZMA_MATCH_LEN_MAX)
-++      fb = LZMA_MATCH_LEN_MAX;
-++    p->numFastBytes = fb;
-++  }
-++  p->lc = props.lc;
-++  p->lp = props.lp;
-++  p->pb = props.pb;
-++  p->fastMode = (props.algo == 0);
-++  p->matchFinderBase.btMode = props.btMode;
-++  {
-++    UInt32 numHashBytes = 4;
-++    if (props.btMode)
-++    {
-++      if (props.numHashBytes < 2)
-++        numHashBytes = 2;
-++      else if (props.numHashBytes < 4)
-++        numHashBytes = props.numHashBytes;
-++    }
-++    p->matchFinderBase.numHashBytes = numHashBytes;
-++  }
-++
-++  p->matchFinderBase.cutValue = props.mc;
-++
-++  p->writeEndMark = props.writeEndMark;
-++
-++  #ifndef _7ZIP_ST
-++  /*
-++  if (newMultiThread != _multiThread)
-++  {
-++    ReleaseMatchFinder();
-++    _multiThread = newMultiThread;
-++  }
-++  */
-++  p->multiThread = (props.numThreads > 1);
-++  #endif
-++
-++  return SZ_OK;
-++}
-++
-++static const int kLiteralNextStates[kNumStates] = {0, 0, 0, 0, 1, 2, 3, 4,  5,  6,   4, 5};
-++static const int kMatchNextStates[kNumStates]   = {7, 7, 7, 7, 7, 7, 7, 10, 10, 10, 10, 10};
-++static const int kRepNextStates[kNumStates]     = {8, 8, 8, 8, 8, 8, 8, 11, 11, 11, 11, 11};
-++static const int kShortRepNextStates[kNumStates]= {9, 9, 9, 9, 9, 9, 9, 11, 11, 11, 11, 11};
-++
-++#define IsCharState(s) ((s) < 7)
-++
-++#define GetLenToPosState(len) (((len) < kNumLenToPosStates + 1) ? (len) - 2 : kNumLenToPosStates - 1)
-++
-++#define kInfinityPrice (1 << 30)
-++
-++static void RangeEnc_Construct(CRangeEnc *p)
-++{
-++  p->outStream = 0;
-++  p->bufBase = 0;
-++}
-++
-++#define RangeEnc_GetProcessed(p) ((p)->processed + ((p)->buf - (p)->bufBase) + (p)->cacheSize)
-++
-++#define RC_BUF_SIZE (1 << 16)
-++static int RangeEnc_Alloc(CRangeEnc *p, ISzAlloc *alloc)
-++{
-++  if (p->bufBase == 0)
-++  {
-++    p->bufBase = (Byte *)alloc->Alloc(alloc, RC_BUF_SIZE);
-++    if (p->bufBase == 0)
-++      return 0;
-++    p->bufLim = p->bufBase + RC_BUF_SIZE;
-++  }
-++  return 1;
-++}
-++
-++static void RangeEnc_Free(CRangeEnc *p, ISzAlloc *alloc)
-++{
-++  alloc->Free(alloc, p->bufBase);
-++  p->bufBase = 0;
-++}
-++
-++static void RangeEnc_Init(CRangeEnc *p)
-++{
-++  /* Stream.Init(); */
-++  p->low = 0;
-++  p->range = 0xFFFFFFFF;
-++  p->cacheSize = 1;
-++  p->cache = 0;
-++
-++  p->buf = p->bufBase;
-++
-++  p->processed = 0;
-++  p->res = SZ_OK;
-++}
-++
-++static void RangeEnc_FlushStream(CRangeEnc *p)
-++{
-++  size_t num;
-++  if (p->res != SZ_OK)
-++    return;
-++  num = p->buf - p->bufBase;
-++  if (num != p->outStream->Write(p->outStream, p->bufBase, num))
-++    p->res = SZ_ERROR_WRITE;
-++  p->processed += num;
-++  p->buf = p->bufBase;
-++}
-++
-++static void MY_FAST_CALL RangeEnc_ShiftLow(CRangeEnc *p)
-++{
-++  if ((UInt32)p->low < (UInt32)0xFF000000 || (int)(p->low >> 32) != 0)
-++  {
-++    Byte temp = p->cache;
-++    do
-++    {
-++      Byte *buf = p->buf;
-++      *buf++ = (Byte)(temp + (Byte)(p->low >> 32));
-++      p->buf = buf;
-++      if (buf == p->bufLim)
-++        RangeEnc_FlushStream(p);
-++      temp = 0xFF;
-++    }
-++    while (--p->cacheSize != 0);
-++    p->cache = (Byte)((UInt32)p->low >> 24);
-++  }
-++  p->cacheSize++;
-++  p->low = (UInt32)p->low << 8;
-++}
-++
-++static void RangeEnc_FlushData(CRangeEnc *p)
-++{
-++  int i;
-++  for (i = 0; i < 5; i++)
-++    RangeEnc_ShiftLow(p);
-++}
-++
-++static void RangeEnc_EncodeDirectBits(CRangeEnc *p, UInt32 value, int numBits)
-++{
-++  do
-++  {
-++    p->range >>= 1;
-++    p->low += p->range & (0 - ((value >> --numBits) & 1));
-++    if (p->range < kTopValue)
-++    {
-++      p->range <<= 8;
-++      RangeEnc_ShiftLow(p);
-++    }
-++  }
-++  while (numBits != 0);
-++}
-++
-++static void RangeEnc_EncodeBit(CRangeEnc *p, CLzmaProb *prob, UInt32 symbol)
-++{
-++  UInt32 ttt = *prob;
-++  UInt32 newBound = (p->range >> kNumBitModelTotalBits) * ttt;
-++  if (symbol == 0)
-++  {
-++    p->range = newBound;
-++    ttt += (kBitModelTotal - ttt) >> kNumMoveBits;
-++  }
-++  else
-++  {
-++    p->low += newBound;
-++    p->range -= newBound;
-++    ttt -= ttt >> kNumMoveBits;
-++  }
-++  *prob = (CLzmaProb)ttt;
-++  if (p->range < kTopValue)
-++  {
-++    p->range <<= 8;
-++    RangeEnc_ShiftLow(p);
-++  }
-++}
-++
-++static void LitEnc_Encode(CRangeEnc *p, CLzmaProb *probs, UInt32 symbol)
-++{
-++  symbol |= 0x100;
-++  do
-++  {
-++    RangeEnc_EncodeBit(p, probs + (symbol >> 8), (symbol >> 7) & 1);
-++    symbol <<= 1;
-++  }
-++  while (symbol < 0x10000);
-++}
-++
-++static void LitEnc_EncodeMatched(CRangeEnc *p, CLzmaProb *probs, UInt32 symbol, UInt32 matchByte)
-++{
-++  UInt32 offs = 0x100;
-++  symbol |= 0x100;
-++  do
-++  {
-++    matchByte <<= 1;
-++    RangeEnc_EncodeBit(p, probs + (offs + (matchByte & offs) + (symbol >> 8)), (symbol >> 7) & 1);
-++    symbol <<= 1;
-++    offs &= ~(matchByte ^ symbol);
-++  }
-++  while (symbol < 0x10000);
-++}
-++
-++void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
-++{
-++  UInt32 i;
-++  for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits))
-++  {
-++    const int kCyclesBits = kNumBitPriceShiftBits;
-++    UInt32 w = i;
-++    UInt32 bitCount = 0;
-++    int j;
-++    for (j = 0; j < kCyclesBits; j++)
-++    {
-++      w = w * w;
-++      bitCount <<= 1;
-++      while (w >= ((UInt32)1 << 16))
-++      {
-++        w >>= 1;
-++        bitCount++;
-++      }
-++    }
-++    ProbPrices[i >> kNumMoveReducingBits] = ((kNumBitModelTotalBits << kCyclesBits) - 15 - bitCount);
-++  }
-++}
-++
-++
-++#define GET_PRICE(prob, symbol) \
-++  p->ProbPrices[((prob) ^ (((-(int)(symbol))) & (kBitModelTotal - 1))) >> kNumMoveReducingBits];
-++
-++#define GET_PRICEa(prob, symbol) \
-++  ProbPrices[((prob) ^ ((-((int)(symbol))) & (kBitModelTotal - 1))) >> kNumMoveReducingBits];
-++
-++#define GET_PRICE_0(prob) p->ProbPrices[(prob) >> kNumMoveReducingBits]
-++#define GET_PRICE_1(prob) p->ProbPrices[((prob) ^ (kBitModelTotal - 1)) >> kNumMoveReducingBits]
-++
-++#define GET_PRICE_0a(prob) ProbPrices[(prob) >> kNumMoveReducingBits]
-++#define GET_PRICE_1a(prob) ProbPrices[((prob) ^ (kBitModelTotal - 1)) >> kNumMoveReducingBits]
-++
-++static UInt32 LitEnc_GetPrice(const CLzmaProb *probs, UInt32 symbol, UInt32 *ProbPrices)
-++{
-++  UInt32 price = 0;
-++  symbol |= 0x100;
-++  do
-++  {
-++    price += GET_PRICEa(probs[symbol >> 8], (symbol >> 7) & 1);
-++    symbol <<= 1;
-++  }
-++  while (symbol < 0x10000);
-++  return price;
-++}
-++
-++static UInt32 LitEnc_GetPriceMatched(const CLzmaProb *probs, UInt32 symbol, UInt32 matchByte, UInt32 *ProbPrices)
-++{
-++  UInt32 price = 0;
-++  UInt32 offs = 0x100;
-++  symbol |= 0x100;
-++  do
-++  {
-++    matchByte <<= 1;
-++    price += GET_PRICEa(probs[offs + (matchByte & offs) + (symbol >> 8)], (symbol >> 7) & 1);
-++    symbol <<= 1;
-++    offs &= ~(matchByte ^ symbol);
-++  }
-++  while (symbol < 0x10000);
-++  return price;
-++}
-++
-++
-++static void RcTree_Encode(CRangeEnc *rc, CLzmaProb *probs, int numBitLevels, UInt32 symbol)
-++{
-++  UInt32 m = 1;
-++  int i;
-++  for (i = numBitLevels; i != 0;)
-++  {
-++    UInt32 bit;
-++    i--;
-++    bit = (symbol >> i) & 1;
-++    RangeEnc_EncodeBit(rc, probs + m, bit);
-++    m = (m << 1) | bit;
-++  }
-++}
-++
-++static void RcTree_ReverseEncode(CRangeEnc *rc, CLzmaProb *probs, int numBitLevels, UInt32 symbol)
-++{
-++  UInt32 m = 1;
-++  int i;
-++  for (i = 0; i < numBitLevels; i++)
-++  {
-++    UInt32 bit = symbol & 1;
-++    RangeEnc_EncodeBit(rc, probs + m, bit);
-++    m = (m << 1) | bit;
-++    symbol >>= 1;
-++  }
-++}
-++
-++static UInt32 RcTree_GetPrice(const CLzmaProb *probs, int numBitLevels, UInt32 symbol, UInt32 *ProbPrices)
-++{
-++  UInt32 price = 0;
-++  symbol |= (1 << numBitLevels);
-++  while (symbol != 1)
-++  {
-++    price += GET_PRICEa(probs[symbol >> 1], symbol & 1);
-++    symbol >>= 1;
-++  }
-++  return price;
-++}
-++
-++static UInt32 RcTree_ReverseGetPrice(const CLzmaProb *probs, int numBitLevels, UInt32 symbol, UInt32 *ProbPrices)
-++{
-++  UInt32 price = 0;
-++  UInt32 m = 1;
-++  int i;
-++  for (i = numBitLevels; i != 0; i--)
-++  {
-++    UInt32 bit = symbol & 1;
-++    symbol >>= 1;
-++    price += GET_PRICEa(probs[m], bit);
-++    m = (m << 1) | bit;
-++  }
-++  return price;
-++}
-++
-++
-++static void LenEnc_Init(CLenEnc *p)
-++{
-++  unsigned i;
-++  p->choice = p->choice2 = kProbInitValue;
-++  for (i = 0; i < (LZMA_NUM_PB_STATES_MAX << kLenNumLowBits); i++)
-++    p->low[i] = kProbInitValue;
-++  for (i = 0; i < (LZMA_NUM_PB_STATES_MAX << kLenNumMidBits); i++)
-++    p->mid[i] = kProbInitValue;
-++  for (i = 0; i < kLenNumHighSymbols; i++)
-++    p->high[i] = kProbInitValue;
-++}
-++
-++static void LenEnc_Encode(CLenEnc *p, CRangeEnc *rc, UInt32 symbol, UInt32 posState)
-++{
-++  if (symbol < kLenNumLowSymbols)
-++  {
-++    RangeEnc_EncodeBit(rc, &p->choice, 0);
-++    RcTree_Encode(rc, p->low + (posState << kLenNumLowBits), kLenNumLowBits, symbol);
-++  }
-++  else
-++  {
-++    RangeEnc_EncodeBit(rc, &p->choice, 1);
-++    if (symbol < kLenNumLowSymbols + kLenNumMidSymbols)
-++    {
-++      RangeEnc_EncodeBit(rc, &p->choice2, 0);
-++      RcTree_Encode(rc, p->mid + (posState << kLenNumMidBits), kLenNumMidBits, symbol - kLenNumLowSymbols);
-++    }
-++    else
-++    {
-++      RangeEnc_EncodeBit(rc, &p->choice2, 1);
-++      RcTree_Encode(rc, p->high, kLenNumHighBits, symbol - kLenNumLowSymbols - kLenNumMidSymbols);
-++    }
-++  }
-++}
-++
-++static void LenEnc_SetPrices(CLenEnc *p, UInt32 posState, UInt32 numSymbols, UInt32 *prices, UInt32 *ProbPrices)
-++{
-++  UInt32 a0 = GET_PRICE_0a(p->choice);
-++  UInt32 a1 = GET_PRICE_1a(p->choice);
-++  UInt32 b0 = a1 + GET_PRICE_0a(p->choice2);
-++  UInt32 b1 = a1 + GET_PRICE_1a(p->choice2);
-++  UInt32 i = 0;
-++  for (i = 0; i < kLenNumLowSymbols; i++)
-++  {
-++    if (i >= numSymbols)
-++      return;
-++    prices[i] = a0 + RcTree_GetPrice(p->low + (posState << kLenNumLowBits), kLenNumLowBits, i, ProbPrices);
-++  }
-++  for (; i < kLenNumLowSymbols + kLenNumMidSymbols; i++)
-++  {
-++    if (i >= numSymbols)
-++      return;
-++    prices[i] = b0 + RcTree_GetPrice(p->mid + (posState << kLenNumMidBits), kLenNumMidBits, i - kLenNumLowSymbols, ProbPrices);
-++  }
-++  for (; i < numSymbols; i++)
-++    prices[i] = b1 + RcTree_GetPrice(p->high, kLenNumHighBits, i - kLenNumLowSymbols - kLenNumMidSymbols, ProbPrices);
-++}
-++
-++static void MY_FAST_CALL LenPriceEnc_UpdateTable(CLenPriceEnc *p, UInt32 posState, UInt32 *ProbPrices)
-++{
-++  LenEnc_SetPrices(&p->p, posState, p->tableSize, p->prices[posState], ProbPrices);
-++  p->counters[posState] = p->tableSize;
-++}
-++
-++static void LenPriceEnc_UpdateTables(CLenPriceEnc *p, UInt32 numPosStates, UInt32 *ProbPrices)
-++{
-++  UInt32 posState;
-++  for (posState = 0; posState < numPosStates; posState++)
-++    LenPriceEnc_UpdateTable(p, posState, ProbPrices);
-++}
-++
-++static void LenEnc_Encode2(CLenPriceEnc *p, CRangeEnc *rc, UInt32 symbol, UInt32 posState, Bool updatePrice, UInt32 *ProbPrices)
-++{
-++  LenEnc_Encode(&p->p, rc, symbol, posState);
-++  if (updatePrice)
-++    if (--p->counters[posState] == 0)
-++      LenPriceEnc_UpdateTable(p, posState, ProbPrices);
-++}
-++
-++
-++
-++
-++static void MovePos(CLzmaEnc *p, UInt32 num)
-++{
-++  #ifdef SHOW_STAT
-++  ttt += num;
-++  printf("\n MovePos %d", num);
-++  #endif
-++  if (num != 0)
-++  {
-++    p->additionalOffset += num;
-++    p->matchFinder.Skip(p->matchFinderObj, num);
-++  }
-++}
-++
-++static UInt32 ReadMatchDistances(CLzmaEnc *p, UInt32 *numDistancePairsRes)
-++{
-++  UInt32 lenRes = 0, numPairs;
-++  p->numAvail = p->matchFinder.GetNumAvailableBytes(p->matchFinderObj);
-++  numPairs = p->matchFinder.GetMatches(p->matchFinderObj, p->matches);
-++  #ifdef SHOW_STAT
-++  printf("\n i = %d numPairs = %d    ", ttt, numPairs / 2);
-++  ttt++;
-++  {
-++    UInt32 i;
-++    for (i = 0; i < numPairs; i += 2)
-++      printf("%2d %6d   | ", p->matches[i], p->matches[i + 1]);
-++  }
-++  #endif
-++  if (numPairs > 0)
-++  {
-++    lenRes = p->matches[numPairs - 2];
-++    if (lenRes == p->numFastBytes)
-++    {
-++      const Byte *pby = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
-++      UInt32 distance = p->matches[numPairs - 1] + 1;
-++      UInt32 numAvail = p->numAvail;
-++      if (numAvail > LZMA_MATCH_LEN_MAX)
-++        numAvail = LZMA_MATCH_LEN_MAX;
-++      {
-++        const Byte *pby2 = pby - distance;
-++        for (; lenRes < numAvail && pby[lenRes] == pby2[lenRes]; lenRes++);
-++      }
-++    }
-++  }
-++  p->additionalOffset++;
-++  *numDistancePairsRes = numPairs;
-++  return lenRes;
-++}
-++
-++
-++#define MakeAsChar(p) (p)->backPrev = (UInt32)(-1); (p)->prev1IsChar = False;
-++#define MakeAsShortRep(p) (p)->backPrev = 0; (p)->prev1IsChar = False;
-++#define IsShortRep(p) ((p)->backPrev == 0)
-++
-++static UInt32 GetRepLen1Price(CLzmaEnc *p, UInt32 state, UInt32 posState)
-++{
-++  return
-++    GET_PRICE_0(p->isRepG0[state]) +
-++    GET_PRICE_0(p->isRep0Long[state][posState]);
-++}
-++
-++static UInt32 GetPureRepPrice(CLzmaEnc *p, UInt32 repIndex, UInt32 state, UInt32 posState)
-++{
-++  UInt32 price;
-++  if (repIndex == 0)
-++  {
-++    price = GET_PRICE_0(p->isRepG0[state]);
-++    price += GET_PRICE_1(p->isRep0Long[state][posState]);
-++  }
-++  else
-++  {
-++    price = GET_PRICE_1(p->isRepG0[state]);
-++    if (repIndex == 1)
-++      price += GET_PRICE_0(p->isRepG1[state]);
-++    else
-++    {
-++      price += GET_PRICE_1(p->isRepG1[state]);
-++      price += GET_PRICE(p->isRepG2[state], repIndex - 2);
-++    }
-++  }
-++  return price;
-++}
-++
-++static UInt32 GetRepPrice(CLzmaEnc *p, UInt32 repIndex, UInt32 len, UInt32 state, UInt32 posState)
-++{
-++  return p->repLenEnc.prices[posState][len - LZMA_MATCH_LEN_MIN] +
-++    GetPureRepPrice(p, repIndex, state, posState);
-++}
-++
-++static UInt32 Backward(CLzmaEnc *p, UInt32 *backRes, UInt32 cur)
-++{
-++  UInt32 posMem = p->opt[cur].posPrev;
-++  UInt32 backMem = p->opt[cur].backPrev;
-++  p->optimumEndIndex = cur;
-++  do
-++  {
-++    if (p->opt[cur].prev1IsChar)
-++    {
-++      MakeAsChar(&p->opt[posMem])
-++      p->opt[posMem].posPrev = posMem - 1;
-++      if (p->opt[cur].prev2)
-++      {
-++        p->opt[posMem - 1].prev1IsChar = False;
-++        p->opt[posMem - 1].posPrev = p->opt[cur].posPrev2;
-++        p->opt[posMem - 1].backPrev = p->opt[cur].backPrev2;
-++      }
-++    }
-++    {
-++      UInt32 posPrev = posMem;
-++      UInt32 backCur = backMem;
-++
-++      backMem = p->opt[posPrev].backPrev;
-++      posMem = p->opt[posPrev].posPrev;
-++
-++      p->opt[posPrev].backPrev = backCur;
-++      p->opt[posPrev].posPrev = cur;
-++      cur = posPrev;
-++    }
-++  }
-++  while (cur != 0);
-++  *backRes = p->opt[0].backPrev;
-++  p->optimumCurrentIndex  = p->opt[0].posPrev;
-++  return p->optimumCurrentIndex;
-++}
-++
-++#define LIT_PROBS(pos, prevByte) (p->litProbs + ((((pos) & p->lpMask) << p->lc) + ((prevByte) >> (8 - p->lc))) * 0x300)
-++
-++static UInt32 GetOptimum(CLzmaEnc *p, UInt32 position, UInt32 *backRes)
-++{
-++  UInt32 numAvail, mainLen, numPairs, repMaxIndex, i, posState, lenEnd, len, cur;
-++  UInt32 matchPrice, repMatchPrice, normalMatchPrice;
-++  UInt32 reps[LZMA_NUM_REPS], repLens[LZMA_NUM_REPS];
-++  UInt32 *matches;
-++  const Byte *data;
-++  Byte curByte, matchByte;
-++  if (p->optimumEndIndex != p->optimumCurrentIndex)
-++  {
-++    const COptimal *opt = &p->opt[p->optimumCurrentIndex];
-++    UInt32 lenRes = opt->posPrev - p->optimumCurrentIndex;
-++    *backRes = opt->backPrev;
-++    p->optimumCurrentIndex = opt->posPrev;
-++    return lenRes;
-++  }
-++  p->optimumCurrentIndex = p->optimumEndIndex = 0;
-++
-++  if (p->additionalOffset == 0)
-++    mainLen = ReadMatchDistances(p, &numPairs);
-++  else
-++  {
-++    mainLen = p->longestMatchLength;
-++    numPairs = p->numPairs;
-++  }
-++
-++  numAvail = p->numAvail;
-++  if (numAvail < 2)
-++  {
-++    *backRes = (UInt32)(-1);
-++    return 1;
-++  }
-++  if (numAvail > LZMA_MATCH_LEN_MAX)
-++    numAvail = LZMA_MATCH_LEN_MAX;
-++
-++  data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
-++  repMaxIndex = 0;
-++  for (i = 0; i < LZMA_NUM_REPS; i++)
-++  {
-++    UInt32 lenTest;
-++    const Byte *data2;
-++    reps[i] = p->reps[i];
-++    data2 = data - (reps[i] + 1);
-++    if (data[0] != data2[0] || data[1] != data2[1])
-++    {
-++      repLens[i] = 0;
-++      continue;
-++    }
-++    for (lenTest = 2; lenTest < numAvail && data[lenTest] == data2[lenTest]; lenTest++);
-++    repLens[i] = lenTest;
-++    if (lenTest > repLens[repMaxIndex])
-++      repMaxIndex = i;
-++  }
-++  if (repLens[repMaxIndex] >= p->numFastBytes)
-++  {
-++    UInt32 lenRes;
-++    *backRes = repMaxIndex;
-++    lenRes = repLens[repMaxIndex];
-++    MovePos(p, lenRes - 1);
-++    return lenRes;
-++  }
-++
-++  matches = p->matches;
-++  if (mainLen >= p->numFastBytes)
-++  {
-++    *backRes = matches[numPairs - 1] + LZMA_NUM_REPS;
-++    MovePos(p, mainLen - 1);
-++    return mainLen;
-++  }
-++  curByte = *data;
-++  matchByte = *(data - (reps[0] + 1));
-++
-++  if (mainLen < 2 && curByte != matchByte && repLens[repMaxIndex] < 2)
-++  {
-++    *backRes = (UInt32)-1;
-++    return 1;
-++  }
-++
-++  p->opt[0].state = (CState)p->state;
-++
-++  posState = (position & p->pbMask);
-++
-++  {
-++    const CLzmaProb *probs = LIT_PROBS(position, *(data - 1));
-++    p->opt[1].price = GET_PRICE_0(p->isMatch[p->state][posState]) +
-++        (!IsCharState(p->state) ?
-++          LitEnc_GetPriceMatched(probs, curByte, matchByte, p->ProbPrices) :
-++          LitEnc_GetPrice(probs, curByte, p->ProbPrices));
-++  }
-++
-++  MakeAsChar(&p->opt[1]);
-++
-++  matchPrice = GET_PRICE_1(p->isMatch[p->state][posState]);
-++  repMatchPrice = matchPrice + GET_PRICE_1(p->isRep[p->state]);
-++
-++  if (matchByte == curByte)
-++  {
-++    UInt32 shortRepPrice = repMatchPrice + GetRepLen1Price(p, p->state, posState);
-++    if (shortRepPrice < p->opt[1].price)
-++    {
-++      p->opt[1].price = shortRepPrice;
-++      MakeAsShortRep(&p->opt[1]);
-++    }
-++  }
-++  lenEnd = ((mainLen >= repLens[repMaxIndex]) ? mainLen : repLens[repMaxIndex]);
-++
-++  if (lenEnd < 2)
-++  {
-++    *backRes = p->opt[1].backPrev;
-++    return 1;
-++  }
-++
-++  p->opt[1].posPrev = 0;
-++  for (i = 0; i < LZMA_NUM_REPS; i++)
-++    p->opt[0].backs[i] = reps[i];
-++
-++  len = lenEnd;
-++  do
-++    p->opt[len--].price = kInfinityPrice;
-++  while (len >= 2);
-++
-++  for (i = 0; i < LZMA_NUM_REPS; i++)
-++  {
-++    UInt32 repLen = repLens[i];
-++    UInt32 price;
-++    if (repLen < 2)
-++      continue;
-++    price = repMatchPrice + GetPureRepPrice(p, i, p->state, posState);
-++    do
-++    {
-++      UInt32 curAndLenPrice = price + p->repLenEnc.prices[posState][repLen - 2];
-++      COptimal *opt = &p->opt[repLen];
-++      if (curAndLenPrice < opt->price)
-++      {
-++        opt->price = curAndLenPrice;
-++        opt->posPrev = 0;
-++        opt->backPrev = i;
-++        opt->prev1IsChar = False;
-++      }
-++    }
-++    while (--repLen >= 2);
-++  }
-++
-++  normalMatchPrice = matchPrice + GET_PRICE_0(p->isRep[p->state]);
-++
-++  len = ((repLens[0] >= 2) ? repLens[0] + 1 : 2);
-++  if (len <= mainLen)
-++  {
-++    UInt32 offs = 0;
-++    while (len > matches[offs])
-++      offs += 2;
-++    for (; ; len++)
-++    {
-++      COptimal *opt;
-++      UInt32 distance = matches[offs + 1];
-++
-++      UInt32 curAndLenPrice = normalMatchPrice + p->lenEnc.prices[posState][len - LZMA_MATCH_LEN_MIN];
-++      UInt32 lenToPosState = GetLenToPosState(len);
-++      if (distance < kNumFullDistances)
-++        curAndLenPrice += p->distancesPrices[lenToPosState][distance];
-++      else
-++      {
-++        UInt32 slot;
-++        GetPosSlot2(distance, slot);
-++        curAndLenPrice += p->alignPrices[distance & kAlignMask] + p->posSlotPrices[lenToPosState][slot];
-++      }
-++      opt = &p->opt[len];
-++      if (curAndLenPrice < opt->price)
-++      {
-++        opt->price = curAndLenPrice;
-++        opt->posPrev = 0;
-++        opt->backPrev = distance + LZMA_NUM_REPS;
-++        opt->prev1IsChar = False;
-++      }
-++      if (len == matches[offs])
-++      {
-++        offs += 2;
-++        if (offs == numPairs)
-++          break;
-++      }
-++    }
-++  }
-++
-++  cur = 0;
-++
-++    #ifdef SHOW_STAT2
-++    if (position >= 0)
-++    {
-++      unsigned i;
-++      printf("\n pos = %4X", position);
-++      for (i = cur; i <= lenEnd; i++)
-++      printf("\nprice[%4X] = %d", position - cur + i, p->opt[i].price);
-++    }
-++    #endif
-++
-++  for (;;)
-++  {
-++    UInt32 numAvailFull, newLen, numPairs, posPrev, state, posState, startLen;
-++    UInt32 curPrice, curAnd1Price, matchPrice, repMatchPrice;
-++    Bool nextIsChar;
-++    Byte curByte, matchByte;
-++    const Byte *data;
-++    COptimal *curOpt;
-++    COptimal *nextOpt;
-++
-++    cur++;
-++    if (cur == lenEnd)
-++      return Backward(p, backRes, cur);
-++
-++    newLen = ReadMatchDistances(p, &numPairs);
-++    if (newLen >= p->numFastBytes)
-++    {
-++      p->numPairs = numPairs;
-++      p->longestMatchLength = newLen;
-++      return Backward(p, backRes, cur);
-++    }
-++    position++;
-++    curOpt = &p->opt[cur];
-++    posPrev = curOpt->posPrev;
-++    if (curOpt->prev1IsChar)
-++    {
-++      posPrev--;
-++      if (curOpt->prev2)
-++      {
-++        state = p->opt[curOpt->posPrev2].state;
-++        if (curOpt->backPrev2 < LZMA_NUM_REPS)
-++          state = kRepNextStates[state];
-++        else
-++          state = kMatchNextStates[state];
-++      }
-++      else
-++        state = p->opt[posPrev].state;
-++      state = kLiteralNextStates[state];
-++    }
-++    else
-++      state = p->opt[posPrev].state;
-++    if (posPrev == cur - 1)
-++    {
-++      if (IsShortRep(curOpt))
-++        state = kShortRepNextStates[state];
-++      else
-++        state = kLiteralNextStates[state];
-++    }
-++    else
-++    {
-++      UInt32 pos;
-++      const COptimal *prevOpt;
-++      if (curOpt->prev1IsChar && curOpt->prev2)
-++      {
-++        posPrev = curOpt->posPrev2;
-++        pos = curOpt->backPrev2;
-++        state = kRepNextStates[state];
-++      }
-++      else
-++      {
-++        pos = curOpt->backPrev;
-++        if (pos < LZMA_NUM_REPS)
-++          state = kRepNextStates[state];
-++        else
-++          state = kMatchNextStates[state];
-++      }
-++      prevOpt = &p->opt[posPrev];
-++      if (pos < LZMA_NUM_REPS)
-++      {
-++        UInt32 i;
-++        reps[0] = prevOpt->backs[pos];
-++        for (i = 1; i <= pos; i++)
-++          reps[i] = prevOpt->backs[i - 1];
-++        for (; i < LZMA_NUM_REPS; i++)
-++          reps[i] = prevOpt->backs[i];
-++      }
-++      else
-++      {
-++        UInt32 i;
-++        reps[0] = (pos - LZMA_NUM_REPS);
-++        for (i = 1; i < LZMA_NUM_REPS; i++)
-++          reps[i] = prevOpt->backs[i - 1];
-++      }
-++    }
-++    curOpt->state = (CState)state;
-++
-++    curOpt->backs[0] = reps[0];
-++    curOpt->backs[1] = reps[1];
-++    curOpt->backs[2] = reps[2];
-++    curOpt->backs[3] = reps[3];
-++
-++    curPrice = curOpt->price;
-++    nextIsChar = False;
-++    data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
-++    curByte = *data;
-++    matchByte = *(data - (reps[0] + 1));
-++
-++    posState = (position & p->pbMask);
-++
-++    curAnd1Price = curPrice + GET_PRICE_0(p->isMatch[state][posState]);
-++    {
-++      const CLzmaProb *probs = LIT_PROBS(position, *(data - 1));
-++      curAnd1Price +=
-++        (!IsCharState(state) ?
-++          LitEnc_GetPriceMatched(probs, curByte, matchByte, p->ProbPrices) :
-++          LitEnc_GetPrice(probs, curByte, p->ProbPrices));
-++    }
-++
-++    nextOpt = &p->opt[cur + 1];
-++
-++    if (curAnd1Price < nextOpt->price)
-++    {
-++      nextOpt->price = curAnd1Price;
-++      nextOpt->posPrev = cur;
-++      MakeAsChar(nextOpt);
-++      nextIsChar = True;
-++    }
-++
-++    matchPrice = curPrice + GET_PRICE_1(p->isMatch[state][posState]);
-++    repMatchPrice = matchPrice + GET_PRICE_1(p->isRep[state]);
-++
-++    if (matchByte == curByte && !(nextOpt->posPrev < cur && nextOpt->backPrev == 0))
-++    {
-++      UInt32 shortRepPrice = repMatchPrice + GetRepLen1Price(p, state, posState);
-++      if (shortRepPrice <= nextOpt->price)
-++      {
-++        nextOpt->price = shortRepPrice;
-++        nextOpt->posPrev = cur;
-++        MakeAsShortRep(nextOpt);
-++        nextIsChar = True;
-++      }
-++    }
-++    numAvailFull = p->numAvail;
-++    {
-++      UInt32 temp = kNumOpts - 1 - cur;
-++      if (temp < numAvailFull)
-++        numAvailFull = temp;
-++    }
-++
-++    if (numAvailFull < 2)
-++      continue;
-++    numAvail = (numAvailFull <= p->numFastBytes ? numAvailFull : p->numFastBytes);
-++
-++    if (!nextIsChar && matchByte != curByte) /* speed optimization */
-++    {
-++      /* try Literal + rep0 */
-++      UInt32 temp;
-++      UInt32 lenTest2;
-++      const Byte *data2 = data - (reps[0] + 1);
-++      UInt32 limit = p->numFastBytes + 1;
-++      if (limit > numAvailFull)
-++        limit = numAvailFull;
-++
-++      for (temp = 1; temp < limit && data[temp] == data2[temp]; temp++);
-++      lenTest2 = temp - 1;
-++      if (lenTest2 >= 2)
-++      {
-++        UInt32 state2 = kLiteralNextStates[state];
-++        UInt32 posStateNext = (position + 1) & p->pbMask;
-++        UInt32 nextRepMatchPrice = curAnd1Price +
-++            GET_PRICE_1(p->isMatch[state2][posStateNext]) +
-++            GET_PRICE_1(p->isRep[state2]);
-++        /* for (; lenTest2 >= 2; lenTest2--) */
-++        {
-++          UInt32 curAndLenPrice;
-++          COptimal *opt;
-++          UInt32 offset = cur + 1 + lenTest2;
-++          while (lenEnd < offset)
-++            p->opt[++lenEnd].price = kInfinityPrice;
-++          curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext);
-++          opt = &p->opt[offset];
-++          if (curAndLenPrice < opt->price)
-++          {
-++            opt->price = curAndLenPrice;
-++            opt->posPrev = cur + 1;
-++            opt->backPrev = 0;
-++            opt->prev1IsChar = True;
-++            opt->prev2 = False;
-++          }
-++        }
-++      }
-++    }
-++
-++    startLen = 2; /* speed optimization */
-++    {
-++    UInt32 repIndex;
-++    for (repIndex = 0; repIndex < LZMA_NUM_REPS; repIndex++)
-++    {
-++      UInt32 lenTest;
-++      UInt32 lenTestTemp;
-++      UInt32 price;
-++      const Byte *data2 = data - (reps[repIndex] + 1);
-++      if (data[0] != data2[0] || data[1] != data2[1])
-++        continue;
-++      for (lenTest = 2; lenTest < numAvail && data[lenTest] == data2[lenTest]; lenTest++);
-++      while (lenEnd < cur + lenTest)
-++        p->opt[++lenEnd].price = kInfinityPrice;
-++      lenTestTemp = lenTest;
-++      price = repMatchPrice + GetPureRepPrice(p, repIndex, state, posState);
-++      do
-++      {
-++        UInt32 curAndLenPrice = price + p->repLenEnc.prices[posState][lenTest - 2];
-++        COptimal *opt = &p->opt[cur + lenTest];
-++        if (curAndLenPrice < opt->price)
-++        {
-++          opt->price = curAndLenPrice;
-++          opt->posPrev = cur;
-++          opt->backPrev = repIndex;
-++          opt->prev1IsChar = False;
-++        }
-++      }
-++      while (--lenTest >= 2);
-++      lenTest = lenTestTemp;
-++
-++      if (repIndex == 0)
-++        startLen = lenTest + 1;
-++
-++      /* if (_maxMode) */
-++        {
-++          UInt32 lenTest2 = lenTest + 1;
-++          UInt32 limit = lenTest2 + p->numFastBytes;
-++          UInt32 nextRepMatchPrice;
-++          if (limit > numAvailFull)
-++            limit = numAvailFull;
-++          for (; lenTest2 < limit && data[lenTest2] == data2[lenTest2]; lenTest2++);
-++          lenTest2 -= lenTest + 1;
-++          if (lenTest2 >= 2)
-++          {
-++            UInt32 state2 = kRepNextStates[state];
-++            UInt32 posStateNext = (position + lenTest) & p->pbMask;
-++            UInt32 curAndLenCharPrice =
-++                price + p->repLenEnc.prices[posState][lenTest - 2] +
-++                GET_PRICE_0(p->isMatch[state2][posStateNext]) +
-++                LitEnc_GetPriceMatched(LIT_PROBS(position + lenTest, data[lenTest - 1]),
-++                    data[lenTest], data2[lenTest], p->ProbPrices);
-++            state2 = kLiteralNextStates[state2];
-++            posStateNext = (position + lenTest + 1) & p->pbMask;
-++            nextRepMatchPrice = curAndLenCharPrice +
-++                GET_PRICE_1(p->isMatch[state2][posStateNext]) +
-++                GET_PRICE_1(p->isRep[state2]);
-++
-++            /* for (; lenTest2 >= 2; lenTest2--) */
-++            {
-++              UInt32 curAndLenPrice;
-++              COptimal *opt;
-++              UInt32 offset = cur + lenTest + 1 + lenTest2;
-++              while (lenEnd < offset)
-++                p->opt[++lenEnd].price = kInfinityPrice;
-++              curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext);
-++              opt = &p->opt[offset];
-++              if (curAndLenPrice < opt->price)
-++              {
-++                opt->price = curAndLenPrice;
-++                opt->posPrev = cur + lenTest + 1;
-++                opt->backPrev = 0;
-++                opt->prev1IsChar = True;
-++                opt->prev2 = True;
-++                opt->posPrev2 = cur;
-++                opt->backPrev2 = repIndex;
-++              }
-++            }
-++          }
-++        }
-++    }
-++    }
-++    /* for (UInt32 lenTest = 2; lenTest <= newLen; lenTest++) */
-++    if (newLen > numAvail)
-++    {
-++      newLen = numAvail;
-++      for (numPairs = 0; newLen > matches[numPairs]; numPairs += 2);
-++      matches[numPairs] = newLen;
-++      numPairs += 2;
-++    }
-++    if (newLen >= startLen)
-++    {
-++      UInt32 normalMatchPrice = matchPrice + GET_PRICE_0(p->isRep[state]);
-++      UInt32 offs, curBack, posSlot;
-++      UInt32 lenTest;
-++      while (lenEnd < cur + newLen)
-++        p->opt[++lenEnd].price = kInfinityPrice;
-++
-++      offs = 0;
-++      while (startLen > matches[offs])
-++        offs += 2;
-++      curBack = matches[offs + 1];
-++      GetPosSlot2(curBack, posSlot);
-++      for (lenTest = /*2*/ startLen; ; lenTest++)
-++      {
-++        UInt32 curAndLenPrice = normalMatchPrice + p->lenEnc.prices[posState][lenTest - LZMA_MATCH_LEN_MIN];
-++        UInt32 lenToPosState = GetLenToPosState(lenTest);
-++        COptimal *opt;
-++        if (curBack < kNumFullDistances)
-++          curAndLenPrice += p->distancesPrices[lenToPosState][curBack];
-++        else
-++          curAndLenPrice += p->posSlotPrices[lenToPosState][posSlot] + p->alignPrices[curBack & kAlignMask];
-++
-++        opt = &p->opt[cur + lenTest];
-++        if (curAndLenPrice < opt->price)
-++        {
-++          opt->price = curAndLenPrice;
-++          opt->posPrev = cur;
-++          opt->backPrev = curBack + LZMA_NUM_REPS;
-++          opt->prev1IsChar = False;
-++        }
-++
-++        if (/*_maxMode && */lenTest == matches[offs])
-++        {
-++          /* Try Match + Literal + Rep0 */
-++          const Byte *data2 = data - (curBack + 1);
-++          UInt32 lenTest2 = lenTest + 1;
-++          UInt32 limit = lenTest2 + p->numFastBytes;
-++          UInt32 nextRepMatchPrice;
-++          if (limit > numAvailFull)
-++            limit = numAvailFull;
-++          for (; lenTest2 < limit && data[lenTest2] == data2[lenTest2]; lenTest2++);
-++          lenTest2 -= lenTest + 1;
-++          if (lenTest2 >= 2)
-++          {
-++            UInt32 state2 = kMatchNextStates[state];
-++            UInt32 posStateNext = (position + lenTest) & p->pbMask;
-++            UInt32 curAndLenCharPrice = curAndLenPrice +
-++                GET_PRICE_0(p->isMatch[state2][posStateNext]) +
-++                LitEnc_GetPriceMatched(LIT_PROBS(position + lenTest, data[lenTest - 1]),
-++                    data[lenTest], data2[lenTest], p->ProbPrices);
-++            state2 = kLiteralNextStates[state2];
-++            posStateNext = (posStateNext + 1) & p->pbMask;
-++            nextRepMatchPrice = curAndLenCharPrice +
-++                GET_PRICE_1(p->isMatch[state2][posStateNext]) +
-++                GET_PRICE_1(p->isRep[state2]);
-++
-++            /* for (; lenTest2 >= 2; lenTest2--) */
-++            {
-++              UInt32 offset = cur + lenTest + 1 + lenTest2;
-++              UInt32 curAndLenPrice;
-++              COptimal *opt;
-++              while (lenEnd < offset)
-++                p->opt[++lenEnd].price = kInfinityPrice;
-++              curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext);
-++              opt = &p->opt[offset];
-++              if (curAndLenPrice < opt->price)
-++              {
-++                opt->price = curAndLenPrice;
-++                opt->posPrev = cur + lenTest + 1;
-++                opt->backPrev = 0;
-++                opt->prev1IsChar = True;
-++                opt->prev2 = True;
-++                opt->posPrev2 = cur;
-++                opt->backPrev2 = curBack + LZMA_NUM_REPS;
-++              }
-++            }
-++          }
-++          offs += 2;
-++          if (offs == numPairs)
-++            break;
-++          curBack = matches[offs + 1];
-++          if (curBack >= kNumFullDistances)
-++            GetPosSlot2(curBack, posSlot);
-++        }
-++      }
-++    }
-++  }
-++}
-++
-++#define ChangePair(smallDist, bigDist) (((bigDist) >> 7) > (smallDist))
-++
-++static UInt32 GetOptimumFast(CLzmaEnc *p, UInt32 *backRes)
-++{
-++  UInt32 numAvail, mainLen, mainDist, numPairs, repIndex, repLen, i;
-++  const Byte *data;
-++  const UInt32 *matches;
-++
-++  if (p->additionalOffset == 0)
-++    mainLen = ReadMatchDistances(p, &numPairs);
-++  else
-++  {
-++    mainLen = p->longestMatchLength;
-++    numPairs = p->numPairs;
-++  }
-++
-++  numAvail = p->numAvail;
-++  *backRes = (UInt32)-1;
-++  if (numAvail < 2)
-++    return 1;
-++  if (numAvail > LZMA_MATCH_LEN_MAX)
-++    numAvail = LZMA_MATCH_LEN_MAX;
-++  data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
-++
-++  repLen = repIndex = 0;
-++  for (i = 0; i < LZMA_NUM_REPS; i++)
-++  {
-++    UInt32 len;
-++    const Byte *data2 = data - (p->reps[i] + 1);
-++    if (data[0] != data2[0] || data[1] != data2[1])
-++      continue;
-++    for (len = 2; len < numAvail && data[len] == data2[len]; len++);
-++    if (len >= p->numFastBytes)
-++    {
-++      *backRes = i;
-++      MovePos(p, len - 1);
-++      return len;
-++    }
-++    if (len > repLen)
-++    {
-++      repIndex = i;
-++      repLen = len;
-++    }
-++  }
-++
-++  matches = p->matches;
-++  if (mainLen >= p->numFastBytes)
-++  {
-++    *backRes = matches[numPairs - 1] + LZMA_NUM_REPS;
-++    MovePos(p, mainLen - 1);
-++    return mainLen;
-++  }
-++
-++  mainDist = 0; /* for GCC */
-++  if (mainLen >= 2)
-++  {
-++    mainDist = matches[numPairs - 1];
-++    while (numPairs > 2 && mainLen == matches[numPairs - 4] + 1)
-++    {
-++      if (!ChangePair(matches[numPairs - 3], mainDist))
-++        break;
-++      numPairs -= 2;
-++      mainLen = matches[numPairs - 2];
-++      mainDist = matches[numPairs - 1];
-++    }
-++    if (mainLen == 2 && mainDist >= 0x80)
-++      mainLen = 1;
-++  }
-++
-++  if (repLen >= 2 && (
-++        (repLen + 1 >= mainLen) ||
-++        (repLen + 2 >= mainLen && mainDist >= (1 << 9)) ||
-++        (repLen + 3 >= mainLen && mainDist >= (1 << 15))))
-++  {
-++    *backRes = repIndex;
-++    MovePos(p, repLen - 1);
-++    return repLen;
-++  }
-++
-++  if (mainLen < 2 || numAvail <= 2)
-++    return 1;
-++
-++  p->longestMatchLength = ReadMatchDistances(p, &p->numPairs);
-++  if (p->longestMatchLength >= 2)
-++  {
-++    UInt32 newDistance = matches[p->numPairs - 1];
-++    if ((p->longestMatchLength >= mainLen && newDistance < mainDist) ||
-++        (p->longestMatchLength == mainLen + 1 && !ChangePair(mainDist, newDistance)) ||
-++        (p->longestMatchLength > mainLen + 1) ||
-++        (p->longestMatchLength + 1 >= mainLen && mainLen >= 3 && ChangePair(newDistance, mainDist)))
-++      return 1;
-++  }
-++
-++  data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
-++  for (i = 0; i < LZMA_NUM_REPS; i++)
-++  {
-++    UInt32 len, limit;
-++    const Byte *data2 = data - (p->reps[i] + 1);
-++    if (data[0] != data2[0] || data[1] != data2[1])
-++      continue;
-++    limit = mainLen - 1;
-++    for (len = 2; len < limit && data[len] == data2[len]; len++);
-++    if (len >= limit)
-++      return 1;
-++  }
-++  *backRes = mainDist + LZMA_NUM_REPS;
-++  MovePos(p, mainLen - 2);
-++  return mainLen;
-++}
-++
-++static void WriteEndMarker(CLzmaEnc *p, UInt32 posState)
-++{
-++  UInt32 len;
-++  RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 1);
-++  RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 0);
-++  p->state = kMatchNextStates[p->state];
-++  len = LZMA_MATCH_LEN_MIN;
-++  LenEnc_Encode2(&p->lenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices);
-++  RcTree_Encode(&p->rc, p->posSlotEncoder[GetLenToPosState(len)], kNumPosSlotBits, (1 << kNumPosSlotBits) - 1);
-++  RangeEnc_EncodeDirectBits(&p->rc, (((UInt32)1 << 30) - 1) >> kNumAlignBits, 30 - kNumAlignBits);
-++  RcTree_ReverseEncode(&p->rc, p->posAlignEncoder, kNumAlignBits, kAlignMask);
-++}
-++
-++static SRes CheckErrors(CLzmaEnc *p)
-++{
-++  if (p->result != SZ_OK)
-++    return p->result;
-++  if (p->rc.res != SZ_OK)
-++    p->result = SZ_ERROR_WRITE;
-++  if (p->matchFinderBase.result != SZ_OK)
-++    p->result = SZ_ERROR_READ;
-++  if (p->result != SZ_OK)
-++    p->finished = True;
-++  return p->result;
-++}
-++
-++static SRes Flush(CLzmaEnc *p, UInt32 nowPos)
-++{
-++  /* ReleaseMFStream(); */
-++  p->finished = True;
-++  if (p->writeEndMark)
-++    WriteEndMarker(p, nowPos & p->pbMask);
-++  RangeEnc_FlushData(&p->rc);
-++  RangeEnc_FlushStream(&p->rc);
-++  return CheckErrors(p);
-++}
-++
-++static void FillAlignPrices(CLzmaEnc *p)
-++{
-++  UInt32 i;
-++  for (i = 0; i < kAlignTableSize; i++)
-++    p->alignPrices[i] = RcTree_ReverseGetPrice(p->posAlignEncoder, kNumAlignBits, i, p->ProbPrices);
-++  p->alignPriceCount = 0;
-++}
-++
-++static void FillDistancesPrices(CLzmaEnc *p)
-++{
-++  UInt32 tempPrices[kNumFullDistances];
-++  UInt32 i, lenToPosState;
-++  for (i = kStartPosModelIndex; i < kNumFullDistances; i++)
-++  {
-++    UInt32 posSlot = GetPosSlot1(i);
-++    UInt32 footerBits = ((posSlot >> 1) - 1);
-++    UInt32 base = ((2 | (posSlot & 1)) << footerBits);
-++    tempPrices[i] = RcTree_ReverseGetPrice(p->posEncoders + base - posSlot - 1, footerBits, i - base, p->ProbPrices);
-++  }
-++
-++  for (lenToPosState = 0; lenToPosState < kNumLenToPosStates; lenToPosState++)
-++  {
-++    UInt32 posSlot;
-++    const CLzmaProb *encoder = p->posSlotEncoder[lenToPosState];
-++    UInt32 *posSlotPrices = p->posSlotPrices[lenToPosState];
-++    for (posSlot = 0; posSlot < p->distTableSize; posSlot++)
-++      posSlotPrices[posSlot] = RcTree_GetPrice(encoder, kNumPosSlotBits, posSlot, p->ProbPrices);
-++    for (posSlot = kEndPosModelIndex; posSlot < p->distTableSize; posSlot++)
-++      posSlotPrices[posSlot] += ((((posSlot >> 1) - 1) - kNumAlignBits) << kNumBitPriceShiftBits);
-++
-++    {
-++      UInt32 *distancesPrices = p->distancesPrices[lenToPosState];
-++      UInt32 i;
-++      for (i = 0; i < kStartPosModelIndex; i++)
-++        distancesPrices[i] = posSlotPrices[i];
-++      for (; i < kNumFullDistances; i++)
-++        distancesPrices[i] = posSlotPrices[GetPosSlot1(i)] + tempPrices[i];
-++    }
-++  }
-++  p->matchPriceCount = 0;
-++}
-++
-++void LzmaEnc_Construct(CLzmaEnc *p)
-++{
-++  RangeEnc_Construct(&p->rc);
-++  MatchFinder_Construct(&p->matchFinderBase);
-++  #ifndef _7ZIP_ST
-++  MatchFinderMt_Construct(&p->matchFinderMt);
-++  p->matchFinderMt.MatchFinder = &p->matchFinderBase;
-++  #endif
-++
-++  {
-++    CLzmaEncProps props;
-++    LzmaEncProps_Init(&props);
-++    LzmaEnc_SetProps(p, &props);
-++  }
-++
-++  #ifndef LZMA_LOG_BSR
-++  LzmaEnc_FastPosInit(p->g_FastPos);
-++  #endif
-++
-++  LzmaEnc_InitPriceTables(p->ProbPrices);
-++  p->litProbs = 0;
-++  p->saveState.litProbs = 0;
-++}
-++
-++CLzmaEncHandle LzmaEnc_Create(ISzAlloc *alloc)
-++{
-++  void *p;
-++  p = alloc->Alloc(alloc, sizeof(CLzmaEnc));
-++  if (p != 0)
-++    LzmaEnc_Construct((CLzmaEnc *)p);
-++  return p;
-++}
-++
-++void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
-++{
-++  alloc->Free(alloc, p->litProbs);
-++  alloc->Free(alloc, p->saveState.litProbs);
-++  p->litProbs = 0;
-++  p->saveState.litProbs = 0;
-++}
-++
-++void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
-++{
-++  #ifndef _7ZIP_ST
-++  MatchFinderMt_Destruct(&p->matchFinderMt, allocBig);
-++  #endif
-++  MatchFinder_Free(&p->matchFinderBase, allocBig);
-++  LzmaEnc_FreeLits(p, alloc);
-++  RangeEnc_Free(&p->rc, alloc);
-++}
-++
-++void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig)
-++{
-++  LzmaEnc_Destruct((CLzmaEnc *)p, alloc, allocBig);
-++  alloc->Free(alloc, p);
-++}
-++
-++static SRes LzmaEnc_CodeOneBlock(CLzmaEnc *p, Bool useLimits, UInt32 maxPackSize, UInt32 maxUnpackSize)
-++{
-++  UInt32 nowPos32, startPos32;
-++  if (p->needInit)
-++  {
-++    p->matchFinder.Init(p->matchFinderObj);
-++    p->needInit = 0;
-++  }
-++
-++  if (p->finished)
-++    return p->result;
-++  RINOK(CheckErrors(p));
-++
-++  nowPos32 = (UInt32)p->nowPos64;
-++  startPos32 = nowPos32;
-++
-++  if (p->nowPos64 == 0)
-++  {
-++    UInt32 numPairs;
-++    Byte curByte;
-++    if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) == 0)
-++      return Flush(p, nowPos32);
-++    ReadMatchDistances(p, &numPairs);
-++    RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][0], 0);
-++    p->state = kLiteralNextStates[p->state];
-++    curByte = p->matchFinder.GetIndexByte(p->matchFinderObj, 0 - p->additionalOffset);
-++    LitEnc_Encode(&p->rc, p->litProbs, curByte);
-++    p->additionalOffset--;
-++    nowPos32++;
-++  }
-++
-++  if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) != 0)
-++  for (;;)
-++  {
-++    UInt32 pos, len, posState;
-++
-++    if (p->fastMode)
-++      len = GetOptimumFast(p, &pos);
-++    else
-++      len = GetOptimum(p, nowPos32, &pos);
-++
-++    #ifdef SHOW_STAT2
-++    printf("\n pos = %4X,   len = %d   pos = %d", nowPos32, len, pos);
-++    #endif
-++
-++    posState = nowPos32 & p->pbMask;
-++    if (len == 1 && pos == (UInt32)-1)
-++    {
-++      Byte curByte;
-++      CLzmaProb *probs;
-++      const Byte *data;
-++
-++      RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 0);
-++      data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset;
-++      curByte = *data;
-++      probs = LIT_PROBS(nowPos32, *(data - 1));
-++      if (IsCharState(p->state))
-++        LitEnc_Encode(&p->rc, probs, curByte);
-++      else
-++        LitEnc_EncodeMatched(&p->rc, probs, curByte, *(data - p->reps[0] - 1));
-++      p->state = kLiteralNextStates[p->state];
-++    }
-++    else
-++    {
-++      RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 1);
-++      if (pos < LZMA_NUM_REPS)
-++      {
-++        RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 1);
-++        if (pos == 0)
-++        {
-++          RangeEnc_EncodeBit(&p->rc, &p->isRepG0[p->state], 0);
-++          RangeEnc_EncodeBit(&p->rc, &p->isRep0Long[p->state][posState], ((len == 1) ? 0 : 1));
-++        }
-++        else
-++        {
-++          UInt32 distance = p->reps[pos];
-++          RangeEnc_EncodeBit(&p->rc, &p->isRepG0[p->state], 1);
-++          if (pos == 1)
-++            RangeEnc_EncodeBit(&p->rc, &p->isRepG1[p->state], 0);
-++          else
-++          {
-++            RangeEnc_EncodeBit(&p->rc, &p->isRepG1[p->state], 1);
-++            RangeEnc_EncodeBit(&p->rc, &p->isRepG2[p->state], pos - 2);
-++            if (pos == 3)
-++              p->reps[3] = p->reps[2];
-++            p->reps[2] = p->reps[1];
-++          }
-++          p->reps[1] = p->reps[0];
-++          p->reps[0] = distance;
-++        }
-++        if (len == 1)
-++          p->state = kShortRepNextStates[p->state];
-++        else
-++        {
-++          LenEnc_Encode2(&p->repLenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices);
-++          p->state = kRepNextStates[p->state];
-++        }
-++      }
-++      else
-++      {
-++        UInt32 posSlot;
-++        RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 0);
-++        p->state = kMatchNextStates[p->state];
-++        LenEnc_Encode2(&p->lenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices);
-++        pos -= LZMA_NUM_REPS;
-++        GetPosSlot(pos, posSlot);
-++        RcTree_Encode(&p->rc, p->posSlotEncoder[GetLenToPosState(len)], kNumPosSlotBits, posSlot);
-++
-++        if (posSlot >= kStartPosModelIndex)
-++        {
-++          UInt32 footerBits = ((posSlot >> 1) - 1);
-++          UInt32 base = ((2 | (posSlot & 1)) << footerBits);
-++          UInt32 posReduced = pos - base;
-++
-++          if (posSlot < kEndPosModelIndex)
-++            RcTree_ReverseEncode(&p->rc, p->posEncoders + base - posSlot - 1, footerBits, posReduced);
-++          else
-++          {
-++            RangeEnc_EncodeDirectBits(&p->rc, posReduced >> kNumAlignBits, footerBits - kNumAlignBits);
-++            RcTree_ReverseEncode(&p->rc, p->posAlignEncoder, kNumAlignBits, posReduced & kAlignMask);
-++            p->alignPriceCount++;
-++          }
-++        }
-++        p->reps[3] = p->reps[2];
-++        p->reps[2] = p->reps[1];
-++        p->reps[1] = p->reps[0];
-++        p->reps[0] = pos;
-++        p->matchPriceCount++;
-++      }
-++    }
-++    p->additionalOffset -= len;
-++    nowPos32 += len;
-++    if (p->additionalOffset == 0)
-++    {
-++      UInt32 processed;
-++      if (!p->fastMode)
-++      {
-++        if (p->matchPriceCount >= (1 << 7))
-++          FillDistancesPrices(p);
-++        if (p->alignPriceCount >= kAlignTableSize)
-++          FillAlignPrices(p);
-++      }
-++      if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) == 0)
-++        break;
-++      processed = nowPos32 - startPos32;
-++      if (useLimits)
-++      {
-++        if (processed + kNumOpts + 300 >= maxUnpackSize ||
-++            RangeEnc_GetProcessed(&p->rc) + kNumOpts * 2 >= maxPackSize)
-++          break;
-++      }
-++      else if (processed >= (1 << 15))
-++      {
-++        p->nowPos64 += nowPos32 - startPos32;
-++        return CheckErrors(p);
-++      }
-++    }
-++  }
-++  p->nowPos64 += nowPos32 - startPos32;
-++  return Flush(p, nowPos32);
-++}
-++
-++#define kBigHashDicLimit ((UInt32)1 << 24)
-++
-++static SRes LzmaEnc_Alloc(CLzmaEnc *p, UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
-++{
-++  UInt32 beforeSize = kNumOpts;
-++  Bool btMode;
-++  if (!RangeEnc_Alloc(&p->rc, alloc))
-++    return SZ_ERROR_MEM;
-++  btMode = (p->matchFinderBase.btMode != 0);
-++  #ifndef _7ZIP_ST
-++  p->mtMode = (p->multiThread && !p->fastMode && btMode);
-++  #endif
-++
-++  {
-++    unsigned lclp = p->lc + p->lp;
-++    if (p->litProbs == 0 || p->saveState.litProbs == 0 || p->lclp != lclp)
-++    {
-++      LzmaEnc_FreeLits(p, alloc);
-++      p->litProbs = (CLzmaProb *)alloc->Alloc(alloc, (0x300 << lclp) * sizeof(CLzmaProb));
-++      p->saveState.litProbs = (CLzmaProb *)alloc->Alloc(alloc, (0x300 << lclp) * sizeof(CLzmaProb));
-++      if (p->litProbs == 0 || p->saveState.litProbs == 0)
-++      {
-++        LzmaEnc_FreeLits(p, alloc);
-++        return SZ_ERROR_MEM;
-++      }
-++      p->lclp = lclp;
-++    }
-++  }
-++
-++  p->matchFinderBase.bigHash = (p->dictSize > kBigHashDicLimit);
-++
-++  if (beforeSize + p->dictSize < keepWindowSize)
-++    beforeSize = keepWindowSize - p->dictSize;
-++
-++  #ifndef _7ZIP_ST
-++  if (p->mtMode)
-++  {
-++    RINOK(MatchFinderMt_Create(&p->matchFinderMt, p->dictSize, beforeSize, p->numFastBytes, LZMA_MATCH_LEN_MAX, allocBig));
-++    p->matchFinderObj = &p->matchFinderMt;
-++    MatchFinderMt_CreateVTable(&p->matchFinderMt, &p->matchFinder);
-++  }
-++  else
-++  #endif
-++  {
-++    if (!MatchFinder_Create(&p->matchFinderBase, p->dictSize, beforeSize, p->numFastBytes, LZMA_MATCH_LEN_MAX, allocBig))
-++      return SZ_ERROR_MEM;
-++    p->matchFinderObj = &p->matchFinderBase;
-++    MatchFinder_CreateVTable(&p->matchFinderBase, &p->matchFinder);
-++  }
-++  return SZ_OK;
-++}
-++
-++void LzmaEnc_Init(CLzmaEnc *p)
-++{
-++  UInt32 i;
-++  p->state = 0;
-++  for (i = 0 ; i < LZMA_NUM_REPS; i++)
-++    p->reps[i] = 0;
-++
-++  RangeEnc_Init(&p->rc);
-++
-++
-++  for (i = 0; i < kNumStates; i++)
-++  {
-++    UInt32 j;
-++    for (j = 0; j < LZMA_NUM_PB_STATES_MAX; j++)
-++    {
-++      p->isMatch[i][j] = kProbInitValue;
-++      p->isRep0Long[i][j] = kProbInitValue;
-++    }
-++    p->isRep[i] = kProbInitValue;
-++    p->isRepG0[i] = kProbInitValue;
-++    p->isRepG1[i] = kProbInitValue;
-++    p->isRepG2[i] = kProbInitValue;
-++  }
-++
-++  {
-++    UInt32 num = 0x300 << (p->lp + p->lc);
-++    for (i = 0; i < num; i++)
-++      p->litProbs[i] = kProbInitValue;
-++  }
-++
-++  {
-++    for (i = 0; i < kNumLenToPosStates; i++)
-++    {
-++      CLzmaProb *probs = p->posSlotEncoder[i];
-++      UInt32 j;
-++      for (j = 0; j < (1 << kNumPosSlotBits); j++)
-++        probs[j] = kProbInitValue;
-++    }
-++  }
-++  {
-++    for (i = 0; i < kNumFullDistances - kEndPosModelIndex; i++)
-++      p->posEncoders[i] = kProbInitValue;
-++  }
-++
-++  LenEnc_Init(&p->lenEnc.p);
-++  LenEnc_Init(&p->repLenEnc.p);
-++
-++  for (i = 0; i < (1 << kNumAlignBits); i++)
-++    p->posAlignEncoder[i] = kProbInitValue;
-++
-++  p->optimumEndIndex = 0;
-++  p->optimumCurrentIndex = 0;
-++  p->additionalOffset = 0;
-++
-++  p->pbMask = (1 << p->pb) - 1;
-++  p->lpMask = (1 << p->lp) - 1;
-++}
-++
-++void LzmaEnc_InitPrices(CLzmaEnc *p)
-++{
-++  if (!p->fastMode)
-++  {
-++    FillDistancesPrices(p);
-++    FillAlignPrices(p);
-++  }
-++
-++  p->lenEnc.tableSize =
-++  p->repLenEnc.tableSize =
-++      p->numFastBytes + 1 - LZMA_MATCH_LEN_MIN;
-++  LenPriceEnc_UpdateTables(&p->lenEnc, 1 << p->pb, p->ProbPrices);
-++  LenPriceEnc_UpdateTables(&p->repLenEnc, 1 << p->pb, p->ProbPrices);
-++}
-++
-++static SRes LzmaEnc_AllocAndInit(CLzmaEnc *p, UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
-++{
-++  UInt32 i;
-++  for (i = 0; i < (UInt32)kDicLogSizeMaxCompress; i++)
-++    if (p->dictSize <= ((UInt32)1 << i))
-++      break;
-++  p->distTableSize = i * 2;
-++
-++  p->finished = False;
-++  p->result = SZ_OK;
-++  RINOK(LzmaEnc_Alloc(p, keepWindowSize, alloc, allocBig));
-++  LzmaEnc_Init(p);
-++  LzmaEnc_InitPrices(p);
-++  p->nowPos64 = 0;
-++  return SZ_OK;
-++}
-++
-++static SRes LzmaEnc_Prepare(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream,
-++    ISzAlloc *alloc, ISzAlloc *allocBig)
-++{
-++  CLzmaEnc *p = (CLzmaEnc *)pp;
-++  p->matchFinderBase.stream = inStream;
-++  p->needInit = 1;
-++  p->rc.outStream = outStream;
-++  return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig);
-++}
-++
-++SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp,
-++    ISeqInStream *inStream, UInt32 keepWindowSize,
-++    ISzAlloc *alloc, ISzAlloc *allocBig)
-++{
-++  CLzmaEnc *p = (CLzmaEnc *)pp;
-++  p->matchFinderBase.stream = inStream;
-++  p->needInit = 1;
-++  return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
-++}
-++
-++static void LzmaEnc_SetInputBuf(CLzmaEnc *p, const Byte *src, SizeT srcLen)
-++{
-++  p->matchFinderBase.directInput = 1;
-++  p->matchFinderBase.bufferBase = (Byte *)src;
-++  p->matchFinderBase.directInputRem = srcLen;
-++}
-++
-++SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
-++    UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
-++{
-++  CLzmaEnc *p = (CLzmaEnc *)pp;
-++  LzmaEnc_SetInputBuf(p, src, srcLen);
-++  p->needInit = 1;
-++
-++  return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
-++}
-++
-++void LzmaEnc_Finish(CLzmaEncHandle pp)
-++{
-++  #ifndef _7ZIP_ST
-++  CLzmaEnc *p = (CLzmaEnc *)pp;
-++  if (p->mtMode)
-++    MatchFinderMt_ReleaseStream(&p->matchFinderMt);
-++  #else
-++  pp = pp;
-++  #endif
-++}
-++
-++typedef struct
-++{
-++  ISeqOutStream funcTable;
-++  Byte *data;
-++  SizeT rem;
-++  Bool overflow;
-++} CSeqOutStreamBuf;
-++
-++static size_t MyWrite(void *pp, const void *data, size_t size)
-++{
-++  CSeqOutStreamBuf *p = (CSeqOutStreamBuf *)pp;
-++  if (p->rem < size)
-++  {
-++    size = p->rem;
-++    p->overflow = True;
-++  }
-++  memcpy(p->data, data, size);
-++  p->rem -= size;
-++  p->data += size;
-++  return size;
-++}
-++
-++
-++UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp)
-++{
-++  const CLzmaEnc *p = (CLzmaEnc *)pp;
-++  return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj);
-++}
-++
-++const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp)
-++{
-++  const CLzmaEnc *p = (CLzmaEnc *)pp;
-++  return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset;
-++}
-++
-++SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit,
-++    Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize)
-++{
-++  CLzmaEnc *p = (CLzmaEnc *)pp;
-++  UInt64 nowPos64;
-++  SRes res;
-++  CSeqOutStreamBuf outStream;
-++
-++  outStream.funcTable.Write = MyWrite;
-++  outStream.data = dest;
-++  outStream.rem = *destLen;
-++  outStream.overflow = False;
-++
-++  p->writeEndMark = False;
-++  p->finished = False;
-++  p->result = SZ_OK;
-++
-++  if (reInit)
-++    LzmaEnc_Init(p);
-++  LzmaEnc_InitPrices(p);
-++  nowPos64 = p->nowPos64;
-++  RangeEnc_Init(&p->rc);
-++  p->rc.outStream = &outStream.funcTable;
-++
-++  res = LzmaEnc_CodeOneBlock(p, True, desiredPackSize, *unpackSize);
-++
-++  *unpackSize = (UInt32)(p->nowPos64 - nowPos64);
-++  *destLen -= outStream.rem;
-++  if (outStream.overflow)
-++    return SZ_ERROR_OUTPUT_EOF;
-++
-++  return res;
-++}
-++
-++static SRes LzmaEnc_Encode2(CLzmaEnc *p, ICompressProgress *progress)
-++{
-++  SRes res = SZ_OK;
-++
-++  #ifndef _7ZIP_ST
-++  Byte allocaDummy[0x300];
-++  int i = 0;
-++  for (i = 0; i < 16; i++)
-++    allocaDummy[i] = (Byte)i;
-++  #endif
-++
-++  for (;;)
-++  {
-++    res = LzmaEnc_CodeOneBlock(p, False, 0, 0);
-++    if (res != SZ_OK || p->finished != 0)
-++      break;
-++    if (progress != 0)
-++    {
-++      res = progress->Progress(progress, p->nowPos64, RangeEnc_GetProcessed(&p->rc));
-++      if (res != SZ_OK)
-++      {
-++        res = SZ_ERROR_PROGRESS;
-++        break;
-++      }
-++    }
-++  }
-++  LzmaEnc_Finish(p);
-++  return res;
-++}
-++
-++SRes LzmaEnc_Encode(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress,
-++    ISzAlloc *alloc, ISzAlloc *allocBig)
-++{
-++  RINOK(LzmaEnc_Prepare(pp, outStream, inStream, alloc, allocBig));
-++  return LzmaEnc_Encode2((CLzmaEnc *)pp, progress);
-++}
-++
-++SRes LzmaEnc_WriteProperties(CLzmaEncHandle pp, Byte *props, SizeT *size)
-++{
-++  CLzmaEnc *p = (CLzmaEnc *)pp;
-++  int i;
-++  UInt32 dictSize = p->dictSize;
-++  if (*size < LZMA_PROPS_SIZE)
-++    return SZ_ERROR_PARAM;
-++  *size = LZMA_PROPS_SIZE;
-++  props[0] = (Byte)((p->pb * 5 + p->lp) * 9 + p->lc);
-++
-++  for (i = 11; i <= 30; i++)
-++  {
-++    if (dictSize <= ((UInt32)2 << i))
-++    {
-++      dictSize = (2 << i);
-++      break;
-++    }
-++    if (dictSize <= ((UInt32)3 << i))
-++    {
-++      dictSize = (3 << i);
-++      break;
-++    }
-++  }
-++
-++  for (i = 0; i < 4; i++)
-++    props[1 + i] = (Byte)(dictSize >> (8 * i));
-++  return SZ_OK;
-++}
-++
-++SRes LzmaEnc_MemEncode(CLzmaEncHandle pp, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
-++    int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig)
-++{
-++  SRes res;
-++  CLzmaEnc *p = (CLzmaEnc *)pp;
-++
-++  CSeqOutStreamBuf outStream;
-++
-++  LzmaEnc_SetInputBuf(p, src, srcLen);
-++
-++  outStream.funcTable.Write = MyWrite;
-++  outStream.data = dest;
-++  outStream.rem = *destLen;
-++  outStream.overflow = False;
-++
-++  p->writeEndMark = writeEndMark;
-++
-++  p->rc.outStream = &outStream.funcTable;
-++  res = LzmaEnc_MemPrepare(pp, src, srcLen, 0, alloc, allocBig);
-++  if (res == SZ_OK)
-++    res = LzmaEnc_Encode2(p, progress);
-++
-++  *destLen -= outStream.rem;
-++  if (outStream.overflow)
-++    return SZ_ERROR_OUTPUT_EOF;
-++  return res;
-++}
-++
-++SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
-++    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
-++    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig)
-++{
-++  CLzmaEnc *p = (CLzmaEnc *)LzmaEnc_Create(alloc);
-++  SRes res;
-++  if (p == 0)
-++    return SZ_ERROR_MEM;
-++
-++  res = LzmaEnc_SetProps(p, props);
-++  if (res == SZ_OK)
-++  {
-++    res = LzmaEnc_WriteProperties(p, propsEncoded, propsSize);
-++    if (res == SZ_OK)
-++      res = LzmaEnc_MemEncode(p, dest, destLen, src, srcLen,
-++          writeEndMark, progress, alloc, allocBig);
-++  }
-++
-++  LzmaEnc_Destroy(p, alloc, allocBig);
-++  return res;
-++}
-+--- /dev/null
-++++ b/lib/lzma/Makefile
-+@@ -0,0 +1,7 @@
-++lzma_compress-objs := LzFind.o LzmaEnc.o
-++lzma_decompress-objs := LzmaDec.o
-++
-++obj-$(CONFIG_LZMA_COMPRESS) += lzma_compress.o
-++obj-$(CONFIG_LZMA_DECOMPRESS) += lzma_decompress.o
-++
-++EXTRA_CFLAGS += -Iinclude/linux -Iinclude/linux/lzma -include types.h
-diff --git a/target/linux/generic/pending-5.10/532-jffs2_eofdetect.patch b/target/linux/generic/pending-5.10/532-jffs2_eofdetect.patch
-new file mode 100644
-index 0000000000..a1d7dc1a69
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/532-jffs2_eofdetect.patch
-@@ -0,0 +1,65 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: fs: jffs2: EOF marker
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ fs/jffs2/build.c | 10 ++++++++++
-+ fs/jffs2/scan.c  | 21 +++++++++++++++++++--
-+ 2 files changed, 29 insertions(+), 2 deletions(-)
-+
-+--- a/fs/jffs2/build.c
-++++ b/fs/jffs2/build.c
-+@@ -117,6 +117,16 @@ static int jffs2_build_filesystem(struct
-+ 	dbg_fsbuild("scanned flash completely\n");
-+ 	jffs2_dbg_dump_block_lists_nolock(c);
-+ 
-++	if (c->flags & (1 << 7)) {
-++		printk("%s(): unlocking the mtd device... ", __func__);
-++		mtd_unlock(c->mtd, 0, c->mtd->size);
-++		printk("done.\n");
-++
-++		printk("%s(): erasing all blocks after the end marker... ", __func__);
-++		jffs2_erase_pending_blocks(c, -1);
-++		printk("done.\n");
-++	}
-++
-+ 	dbg_fsbuild("pass 1 starting\n");
-+ 	c->flags |= JFFS2_SB_FLAG_BUILDING;
-+ 	/* Now scan the directory tree, increasing nlink according to every dirent found. */
-+--- a/fs/jffs2/scan.c
-++++ b/fs/jffs2/scan.c
-+@@ -148,8 +148,14 @@ int jffs2_scan_medium(struct jffs2_sb_in
-+ 		/* reset summary info for next eraseblock scan */
-+ 		jffs2_sum_reset_collected(s);
-+ 
-+-		ret = jffs2_scan_eraseblock(c, jeb, buf_size?flashbuf:(flashbuf+jeb->offset),
-+-						buf_size, s);
-++		if (c->flags & (1 << 7)) {
-++			if (mtd_block_isbad(c->mtd, jeb->offset))
-++				ret = BLK_STATE_BADBLOCK;
-++			else
-++				ret = BLK_STATE_ALLFF;
-++		} else
-++			ret = jffs2_scan_eraseblock(c, jeb, buf_size?flashbuf:(flashbuf+jeb->offset),
-++							buf_size, s);
-+ 
-+ 		if (ret < 0)
-+ 			goto out;
-+@@ -565,6 +571,17 @@ full_scan:
-+ 			return err;
-+ 	}
-+ 
-++	if ((buf[0] == 0xde) &&
-++		(buf[1] == 0xad) &&
-++		(buf[2] == 0xc0) &&
-++		(buf[3] == 0xde)) {
-++		/* end of filesystem. erase everything after this point */
-++		printk("%s(): End of filesystem marker found at 0x%x\n", __func__, jeb->offset);
-++		c->flags |= (1 << 7);
-++
-++		return BLK_STATE_ALLFF;
-++	}
-++
-+ 	/* We temporarily use 'ofs' as a pointer into the buffer/jeb */
-+ 	ofs = 0;
-+ 	max_ofs = EMPTY_SCAN_SIZE(c->sector_size);
-diff --git a/target/linux/generic/pending-5.10/600-netfilter_conntrack_flush.patch b/target/linux/generic/pending-5.10/600-netfilter_conntrack_flush.patch
-new file mode 100644
-index 0000000000..f82849c356
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/600-netfilter_conntrack_flush.patch
-@@ -0,0 +1,88 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: netfilter: add support for flushing conntrack via /proc
-+
-+lede-commit 8193bbe59a74d34d6a26d4a8cb857b1952905314
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ net/netfilter/nf_conntrack_standalone.c | 59 ++++++++++++++++++++++++++++++++-
-+ 1 file changed, 58 insertions(+), 1 deletion(-)
-+
-+--- a/net/netfilter/nf_conntrack_standalone.c
-++++ b/net/netfilter/nf_conntrack_standalone.c
-+@@ -9,6 +9,7 @@
-+ #include <linux/percpu.h>
-+ #include <linux/netdevice.h>
-+ #include <linux/security.h>
-++#include <linux/inet.h>
-+ #include <net/net_namespace.h>
-+ #ifdef CONFIG_SYSCTL
-+ #include <linux/sysctl.h>
-+@@ -456,6 +457,56 @@ static int ct_cpu_seq_show(struct seq_fi
-+ 	return 0;
-+ }
-+ 
-++struct kill_request {
-++	u16 family;
-++	union nf_inet_addr addr;
-++};
-++
-++static int kill_matching(struct nf_conn *i, void *data)
-++{
-++	struct kill_request *kr = data;
-++	struct nf_conntrack_tuple *t1 = &i->tuplehash[IP_CT_DIR_ORIGINAL].tuple;
-++	struct nf_conntrack_tuple *t2 = &i->tuplehash[IP_CT_DIR_REPLY].tuple;
-++
-++	if (!kr->family)
-++		return 1;
-++
-++	if (t1->src.l3num != kr->family)
-++		return 0;
-++
-++	return (nf_inet_addr_cmp(&kr->addr, &t1->src.u3) ||
-++	        nf_inet_addr_cmp(&kr->addr, &t1->dst.u3) ||
-++	        nf_inet_addr_cmp(&kr->addr, &t2->src.u3) ||
-++	        nf_inet_addr_cmp(&kr->addr, &t2->dst.u3));
-++}
-++
-++static int ct_file_write(struct file *file, char *buf, size_t count)
-++{
-++	struct seq_file *seq = file->private_data;
-++	struct net *net = seq_file_net(seq);
-++	struct kill_request kr = { };
-++
-++	if (count == 0)
-++		return 0;
-++
-++	if (count >= INET6_ADDRSTRLEN)
-++		count = INET6_ADDRSTRLEN - 1;
-++
-++	if (strnchr(buf, count, ':')) {
-++		kr.family = AF_INET6;
-++		if (!in6_pton(buf, count, (void *)&kr.addr, '\n', NULL))
-++			return -EINVAL;
-++	} else if (strnchr(buf, count, '.')) {
-++		kr.family = AF_INET;
-++		if (!in4_pton(buf, count, (void *)&kr.addr, '\n', NULL))
-++			return -EINVAL;
-++	}
-++
-++	nf_ct_iterate_cleanup_net(net, kill_matching, &kr, 0, 0);
-++
-++	return 0;
-++}
-++
-+ static const struct seq_operations ct_cpu_seq_ops = {
-+ 	.start	= ct_cpu_seq_start,
-+ 	.next	= ct_cpu_seq_next,
-+@@ -469,8 +520,9 @@ static int nf_conntrack_standalone_init_
-+ 	kuid_t root_uid;
-+ 	kgid_t root_gid;
-+ 
-+-	pde = proc_create_net("nf_conntrack", 0440, net->proc_net, &ct_seq_ops,
-+-			sizeof(struct ct_iter_state));
-++	pde = proc_create_net_data_write("nf_conntrack", 0440, net->proc_net,
-++					 &ct_seq_ops, &ct_file_write,
-++					 sizeof(struct ct_iter_state), NULL);
-+ 	if (!pde)
-+ 		goto out_nf_conntrack;
-+ 
-diff --git a/target/linux/generic/pending-5.10/610-netfilter_match_bypass_default_checks.patch b/target/linux/generic/pending-5.10/610-netfilter_match_bypass_default_checks.patch
-new file mode 100644
-index 0000000000..457703121c
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/610-netfilter_match_bypass_default_checks.patch
-@@ -0,0 +1,110 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: kernel: add a new version of my netfilter speedup patches for linux 2.6.39 and 3.0
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ include/uapi/linux/netfilter_ipv4/ip_tables.h |  1 +
-+ net/ipv4/netfilter/ip_tables.c                | 37 +++++++++++++++++++++++++++
-+ 2 files changed, 38 insertions(+)
-+
-+--- a/include/uapi/linux/netfilter_ipv4/ip_tables.h
-++++ b/include/uapi/linux/netfilter_ipv4/ip_tables.h
-+@@ -89,6 +89,7 @@ struct ipt_ip {
-+ #define IPT_F_FRAG		0x01	/* Set if rule is a fragment rule */
-+ #define IPT_F_GOTO		0x02	/* Set if jump is a goto */
-+ #define IPT_F_MASK		0x03	/* All possible flag bits mask. */
-++#define IPT_F_NO_DEF_MATCH	0x80	/* Internal: no default match rules present */
-+ 
-+ /* Values for "inv" field in struct ipt_ip. */
-+ #define IPT_INV_VIA_IN		0x01	/* Invert the sense of IN IFACE. */
-+--- a/net/ipv4/netfilter/ip_tables.c
-++++ b/net/ipv4/netfilter/ip_tables.c
-+@@ -50,6 +50,9 @@ ip_packet_match(const struct iphdr *ip,
-+ {
-+ 	unsigned long ret;
-+ 
-++	if (ipinfo->flags & IPT_F_NO_DEF_MATCH)
-++		return true;
-++
-+ 	if (NF_INVF(ipinfo, IPT_INV_SRCIP,
-+ 		    (ip->saddr & ipinfo->smsk.s_addr) != ipinfo->src.s_addr) ||
-+ 	    NF_INVF(ipinfo, IPT_INV_DSTIP,
-+@@ -80,6 +83,29 @@ ip_packet_match(const struct iphdr *ip,
-+ 	return true;
-+ }
-+ 
-++static void
-++ip_checkdefault(struct ipt_ip *ip)
-++{
-++	static const char iface_mask[IFNAMSIZ] = {};
-++
-++	if (ip->invflags || ip->flags & IPT_F_FRAG)
-++		return;
-++
-++	if (memcmp(ip->iniface_mask, iface_mask, IFNAMSIZ) != 0)
-++		return;
-++
-++	if (memcmp(ip->outiface_mask, iface_mask, IFNAMSIZ) != 0)
-++		return;
-++
-++	if (ip->smsk.s_addr || ip->dmsk.s_addr)
-++		return;
-++
-++	if (ip->proto)
-++		return;
-++
-++	ip->flags |= IPT_F_NO_DEF_MATCH;
-++}
-++
-+ static bool
-+ ip_checkentry(const struct ipt_ip *ip)
-+ {
-+@@ -524,6 +550,8 @@ find_check_entry(struct ipt_entry *e, st
-+ 	struct xt_mtchk_param mtpar;
-+ 	struct xt_entry_match *ematch;
-+ 
-++	ip_checkdefault(&e->ip);
-++
-+ 	if (!xt_percpu_counter_alloc(alloc_state, &e->counters))
-+ 		return -ENOMEM;
-+ 
-+@@ -818,6 +846,7 @@ copy_entries_to_user(unsigned int total_
-+ 	const struct xt_table_info *private = table->private;
-+ 	int ret = 0;
-+ 	const void *loc_cpu_entry;
-++	u8 flags;
-+ 
-+ 	counters = alloc_counters(table);
-+ 	if (IS_ERR(counters))
-+@@ -845,6 +874,14 @@ copy_entries_to_user(unsigned int total_
-+ 			goto free_counters;
-+ 		}
-+ 
-++		flags = e->ip.flags & IPT_F_MASK;
-++		if (copy_to_user(userptr + off
-++				 + offsetof(struct ipt_entry, ip.flags),
-++				 &flags, sizeof(flags)) != 0) {
-++			ret = -EFAULT;
-++			goto free_counters;
-++		}
-++
-+ 		for (i = sizeof(struct ipt_entry);
-+ 		     i < e->target_offset;
-+ 		     i += m->u.match_size) {
-+@@ -1223,12 +1260,15 @@ compat_copy_entry_to_user(struct ipt_ent
-+ 	compat_uint_t origsize;
-+ 	const struct xt_entry_match *ematch;
-+ 	int ret = 0;
-++	u8 flags = e->ip.flags & IPT_F_MASK;
-+ 
-+ 	origsize = *size;
-+ 	ce = *dstptr;
-+ 	if (copy_to_user(ce, e, sizeof(struct ipt_entry)) != 0 ||
-+ 	    copy_to_user(&ce->counters, &counters[i],
-+-	    sizeof(counters[i])) != 0)
-++	    sizeof(counters[i])) != 0 ||
-++	    copy_to_user(&ce->ip.flags, &flags,
-++	    sizeof(flags)) != 0)
-+ 		return -EFAULT;
-+ 
-+ 	*dstptr += sizeof(struct compat_ipt_entry);
-diff --git a/target/linux/generic/pending-5.10/611-netfilter_match_bypass_default_table.patch b/target/linux/generic/pending-5.10/611-netfilter_match_bypass_default_table.patch
-new file mode 100644
-index 0000000000..baf738a8d2
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/611-netfilter_match_bypass_default_table.patch
-@@ -0,0 +1,106 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: netfilter: match bypass default table
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ net/ipv4/netfilter/ip_tables.c | 79 +++++++++++++++++++++++++++++++-----------
-+ 1 file changed, 58 insertions(+), 21 deletions(-)
-+
-+--- a/net/ipv4/netfilter/ip_tables.c
-++++ b/net/ipv4/netfilter/ip_tables.c
-+@@ -246,6 +246,33 @@ struct ipt_entry *ipt_next_entry(const s
-+ 	return (void *)entry + entry->next_offset;
-+ }
-+ 
-++static bool
-++ipt_handle_default_rule(struct ipt_entry *e, unsigned int *verdict)
-++{
-++	struct xt_entry_target *t;
-++	struct xt_standard_target *st;
-++
-++	if (e->target_offset != sizeof(struct ipt_entry))
-++		return false;
-++
-++	if (!(e->ip.flags & IPT_F_NO_DEF_MATCH))
-++		return false;
-++
-++	t = ipt_get_target(e);
-++	if (t->u.kernel.target->target)
-++		return false;
-++
-++	st = (struct xt_standard_target *) t;
-++	if (st->verdict == XT_RETURN)
-++		return false;
-++
-++	if (st->verdict >= 0)
-++		return false;
-++
-++	*verdict = (unsigned)(-st->verdict) - 1;
-++	return true;
-++}
-++
-+ /* Returns one of the generic firewall policies, like NF_ACCEPT. */
-+ unsigned int
-+ ipt_do_table(struct sk_buff *skb,
-+@@ -266,27 +293,28 @@ ipt_do_table(struct sk_buff *skb,
-+ 	unsigned int addend;
-+ 
-+ 	/* Initialization */
-++	WARN_ON(!(table->valid_hooks & (1 << hook)));
-++	local_bh_disable();
-++	private = READ_ONCE(table->private); /* Address dependency. */
-++	cpu        = smp_processor_id();
-++	table_base = private->entries;
-++
-++	e = get_entry(table_base, private->hook_entry[hook]);
-++	if (ipt_handle_default_rule(e, &verdict)) {
-++		struct xt_counters *counter;
-++
-++		counter = xt_get_this_cpu_counter(&e->counters);
-++		ADD_COUNTER(*counter, skb->len, 1);
-++		local_bh_enable();
-++		return verdict;
-++	}
-++
-+ 	stackidx = 0;
-+ 	ip = ip_hdr(skb);
-+ 	indev = state->in ? state->in->name : nulldevname;
-+ 	outdev = state->out ? state->out->name : nulldevname;
-+-	/* We handle fragments by dealing with the first fragment as
-+-	 * if it was a normal packet.  All other fragments are treated
-+-	 * normally, except that they will NEVER match rules that ask
-+-	 * things we don't know, ie. tcp syn flag or ports).  If the
-+-	 * rule is also a fragment-specific rule, non-fragments won't
-+-	 * match it. */
-+-	acpar.fragoff = ntohs(ip->frag_off) & IP_OFFSET;
-+-	acpar.thoff   = ip_hdrlen(skb);
-+-	acpar.hotdrop = false;
-+-	acpar.state   = state;
-+ 
-+-	WARN_ON(!(table->valid_hooks & (1 << hook)));
-+-	local_bh_disable();
-+ 	addend = xt_write_recseq_begin();
-+-	private = READ_ONCE(table->private); /* Address dependency. */
-+-	cpu        = smp_processor_id();
-+-	table_base = private->entries;
-+ 	jumpstack  = (struct ipt_entry **)private->jumpstack[cpu];
-+ 
-+ 	/* Switch to alternate jumpstack if we're being invoked via TEE.
-+@@ -299,7 +327,16 @@ ipt_do_table(struct sk_buff *skb,
-+ 	if (static_key_false(&xt_tee_enabled))
-+ 		jumpstack += private->stacksize * __this_cpu_read(nf_skb_duplicated);
-+ 
-+-	e = get_entry(table_base, private->hook_entry[hook]);
-++	/* We handle fragments by dealing with the first fragment as
-++	 * if it was a normal packet.  All other fragments are treated
-++	 * normally, except that they will NEVER match rules that ask
-++	 * things we don't know, ie. tcp syn flag or ports).  If the
-++	 * rule is also a fragment-specific rule, non-fragments won't
-++	 * match it. */
-++	acpar.fragoff = ntohs(ip->frag_off) & IP_OFFSET;
-++	acpar.thoff   = ip_hdrlen(skb);
-++	acpar.hotdrop = false;
-++	acpar.state   = state;
-+ 
-+ 	do {
-+ 		const struct xt_entry_target *t;
-diff --git a/target/linux/generic/pending-5.10/612-netfilter_match_reduce_memory_access.patch b/target/linux/generic/pending-5.10/612-netfilter_match_reduce_memory_access.patch
-new file mode 100644
-index 0000000000..79da6778b6
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/612-netfilter_match_reduce_memory_access.patch
-@@ -0,0 +1,22 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: netfilter: reduce match memory access
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ net/ipv4/netfilter/ip_tables.c | 4 ++--
-+ 1 file changed, 2 insertions(+), 2 deletions(-)
-+
-+--- a/net/ipv4/netfilter/ip_tables.c
-++++ b/net/ipv4/netfilter/ip_tables.c
-+@@ -53,9 +53,9 @@ ip_packet_match(const struct iphdr *ip,
-+ 	if (ipinfo->flags & IPT_F_NO_DEF_MATCH)
-+ 		return true;
-+ 
-+-	if (NF_INVF(ipinfo, IPT_INV_SRCIP,
-++	if (NF_INVF(ipinfo, IPT_INV_SRCIP, ipinfo->smsk.s_addr &&
-+ 		    (ip->saddr & ipinfo->smsk.s_addr) != ipinfo->src.s_addr) ||
-+-	    NF_INVF(ipinfo, IPT_INV_DSTIP,
-++	    NF_INVF(ipinfo, IPT_INV_DSTIP, ipinfo->dmsk.s_addr &&
-+ 		    (ip->daddr & ipinfo->dmsk.s_addr) != ipinfo->dst.s_addr))
-+ 		return false;
-+ 
-diff --git a/target/linux/generic/pending-5.10/613-netfilter_optional_tcp_window_check.patch b/target/linux/generic/pending-5.10/613-netfilter_optional_tcp_window_check.patch
-new file mode 100644
-index 0000000000..61776921c6
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/613-netfilter_optional_tcp_window_check.patch
-@@ -0,0 +1,73 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: netfilter: optional tcp window check
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ net/netfilter/nf_conntrack_proto_tcp.c | 13 +++++++++++++
-+ 1 file changed, 13 insertions(+)
-+
-+--- a/net/netfilter/nf_conntrack_proto_tcp.c
-++++ b/net/netfilter/nf_conntrack_proto_tcp.c
-+@@ -31,6 +31,9 @@
-+ #include <net/netfilter/ipv4/nf_conntrack_ipv4.h>
-+ #include <net/netfilter/ipv6/nf_conntrack_ipv6.h>
-+ 
-++/* Do not check the TCP window for incoming packets  */
-++static int nf_ct_tcp_no_window_check __read_mostly = 1;
-++
-+ /* "Be conservative in what you do,
-+     be liberal in what you accept from others."
-+     If it's non-zero, we mark only out of window RST segments as INVALID. */
-+@@ -476,6 +479,9 @@ static bool tcp_in_window(const struct n
-+ 	s32 receiver_offset;
-+ 	bool res, in_recv_win;
-+ 
-++	if (nf_ct_tcp_no_window_check)
-++		return true;
-++
-+ 	/*
-+ 	 * Get the required data from the packet.
-+ 	 */
-+@@ -1130,7 +1136,7 @@ int nf_conntrack_tcp_packet(struct nf_co
-+ 		 IP_CT_TCP_FLAG_DATA_UNACKNOWLEDGED &&
-+ 		 timeouts[new_state] > timeouts[TCP_CONNTRACK_UNACK])
-+ 		timeout = timeouts[TCP_CONNTRACK_UNACK];
-+-	else if (ct->proto.tcp.last_win == 0 &&
-++	else if (!nf_ct_tcp_no_window_check && ct->proto.tcp.last_win == 0 &&
-+ 		 timeouts[new_state] > timeouts[TCP_CONNTRACK_RETRANS])
-+ 		timeout = timeouts[TCP_CONNTRACK_RETRANS];
-+ 	else
-+--- a/net/netfilter/nf_conntrack_standalone.c
-++++ b/net/netfilter/nf_conntrack_standalone.c
-+@@ -25,6 +25,9 @@
-+ #include <net/netfilter/nf_conntrack_timestamp.h>
-+ #include <linux/rculist_nulls.h>
-+ 
-++/* Do not check the TCP window for incoming packets  */
-++static int nf_ct_tcp_no_window_check __read_mostly = 1;
-++
-+ static bool enable_hooks __read_mostly;
-+ MODULE_PARM_DESC(enable_hooks, "Always enable conntrack hooks");
-+ module_param(enable_hooks, bool, 0000);
-+@@ -651,6 +654,7 @@ enum nf_ct_sysctl_index {
-+ 	NF_SYSCTL_CT_PROTO_TIMEOUT_GRE_STREAM,
-+ #endif
-+ 
-++	NF_SYSCTL_CT_PROTO_TCP_NO_WINDOW_CHECK,
-+ 	__NF_SYSCTL_CT_LAST_SYSCTL,
-+ };
-+ 
-+@@ -977,6 +981,13 @@ static struct ctl_table nf_ct_sysctl_tab
-+ 		.proc_handler   = proc_dointvec_jiffies,
-+ 	},
-+ #endif
-++	[NF_SYSCTL_CT_PROTO_TCP_NO_WINDOW_CHECK] = {
-++		.procname       = "nf_conntrack_tcp_no_window_check",
-++		.data           = &nf_ct_tcp_no_window_check,
-++		.maxlen         = sizeof(unsigned int),
-++		.mode           = 0644,
-++		.proc_handler   = proc_dointvec,
-++	},
-+ 	{}
-+ };
-+ 
-diff --git a/target/linux/generic/pending-5.10/620-net_sched-codel-do-not-defer-queue-length-update.patch b/target/linux/generic/pending-5.10/620-net_sched-codel-do-not-defer-queue-length-update.patch
-new file mode 100644
-index 0000000000..4b4825ae3b
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/620-net_sched-codel-do-not-defer-queue-length-update.patch
-@@ -0,0 +1,86 @@
-+From: Konstantin Khlebnikov <khlebnikov@yandex-team.ru>
-+Date: Mon, 21 Aug 2017 11:14:14 +0300
-+Subject: [PATCH] net_sched/codel: do not defer queue length update
-+
-+When codel wants to drop last packet in ->dequeue() it cannot call
-+qdisc_tree_reduce_backlog() right away - it will notify parent qdisc
-+about zero qlen and HTB/HFSC will deactivate class. The same class will
-+be deactivated second time by caller of ->dequeue(). Currently codel and
-+fq_codel defer update. This triggers warning in HFSC when it's qlen != 0
-+but there is no active classes.
-+
-+This patch update parent queue length immediately: just temporary increase
-+qlen around qdisc_tree_reduce_backlog() to prevent first class deactivation
-+if we have skb to return.
-+
-+This might open another problem in HFSC - now operation peek could fail and
-+deactivate parent class.
-+
-+Signed-off-by: Konstantin Khlebnikov <khlebnikov@yandex-team.ru>
-+Link: https://bugzilla.kernel.org/show_bug.cgi?id=109581
-+---
-+
-+--- a/net/sched/sch_codel.c
-++++ b/net/sched/sch_codel.c
-+@@ -95,11 +95,17 @@ static struct sk_buff *codel_qdisc_deque
-+ 			    &q->stats, qdisc_pkt_len, codel_get_enqueue_time,
-+ 			    drop_func, dequeue_func);
-+ 
-+-	/* We cant call qdisc_tree_reduce_backlog() if our qlen is 0,
-+-	 * or HTB crashes. Defer it for next round.
-++	/* If our qlen is 0 qdisc_tree_reduce_backlog() will deactivate
-++	 * parent class, dequeue in parent qdisc will do the same if we
-++	 * return skb. Temporary increment qlen if we have skb.
-+ 	 */
-+-	if (q->stats.drop_count && sch->q.qlen) {
-+-		qdisc_tree_reduce_backlog(sch, q->stats.drop_count, q->stats.drop_len);
-++	if (q->stats.drop_count) {
-++		if (skb)
-++			sch->q.qlen++;
-++		qdisc_tree_reduce_backlog(sch, q->stats.drop_count,
-++					  q->stats.drop_len);
-++		if (skb)
-++			sch->q.qlen--;
-+ 		q->stats.drop_count = 0;
-+ 		q->stats.drop_len = 0;
-+ 	}
-+--- a/net/sched/sch_fq_codel.c
-++++ b/net/sched/sch_fq_codel.c
-+@@ -304,6 +304,21 @@ begin:
-+ 			    &flow->cvars, &q->cstats, qdisc_pkt_len,
-+ 			    codel_get_enqueue_time, drop_func, dequeue_func);
-+ 
-++	/* If our qlen is 0 qdisc_tree_reduce_backlog() will deactivate
-++	 * parent class, dequeue in parent qdisc will do the same if we
-++	 * return skb. Temporary increment qlen if we have skb.
-++	 */
-++	if (q->cstats.drop_count) {
-++		if (skb)
-++			sch->q.qlen++;
-++		qdisc_tree_reduce_backlog(sch, q->cstats.drop_count,
-++					  q->cstats.drop_len);
-++		if (skb)
-++			sch->q.qlen--;
-++		q->cstats.drop_count = 0;
-++		q->cstats.drop_len = 0;
-++	}
-++
-+ 	if (!skb) {
-+ 		/* force a pass through old_flows to prevent starvation */
-+ 		if ((head == &q->new_flows) && !list_empty(&q->old_flows))
-+@@ -314,15 +329,6 @@ begin:
-+ 	}
-+ 	qdisc_bstats_update(sch, skb);
-+ 	flow->deficit -= qdisc_pkt_len(skb);
-+-	/* We cant call qdisc_tree_reduce_backlog() if our qlen is 0,
-+-	 * or HTB crashes. Defer it for next round.
-+-	 */
-+-	if (q->cstats.drop_count && sch->q.qlen) {
-+-		qdisc_tree_reduce_backlog(sch, q->cstats.drop_count,
-+-					  q->cstats.drop_len);
-+-		q->cstats.drop_count = 0;
-+-		q->cstats.drop_len = 0;
-+-	}
-+ 	return skb;
-+ }
-+ 
-diff --git a/target/linux/generic/pending-5.10/630-packet_socket_type.patch b/target/linux/generic/pending-5.10/630-packet_socket_type.patch
-new file mode 100644
-index 0000000000..104bcbe5a5
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/630-packet_socket_type.patch
-@@ -0,0 +1,138 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: net: add an optimization for dealing with raw sockets
-+
-+lede-commit: 4898039703d7315f0f3431c860123338ec3be0f6
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ include/uapi/linux/if_packet.h |  3 +++
-+ net/packet/af_packet.c         | 34 +++++++++++++++++++++++++++-------
-+ net/packet/internal.h          |  1 +
-+ 3 files changed, 31 insertions(+), 7 deletions(-)
-+
-+--- a/include/uapi/linux/if_packet.h
-++++ b/include/uapi/linux/if_packet.h
-+@@ -32,6 +32,8 @@ struct sockaddr_ll {
-+ #define PACKET_KERNEL		7		/* To kernel space	*/
-+ /* Unused, PACKET_FASTROUTE and PACKET_LOOPBACK are invisible to user space */
-+ #define PACKET_FASTROUTE	6		/* Fastrouted frame	*/
-++#define PACKET_MASK_ANY		0xffffffff	/* mask for packet type bits */
-++
-+ 
-+ /* Packet socket options */
-+ 
-+@@ -58,6 +60,7 @@ struct sockaddr_ll {
-+ #define PACKET_ROLLOVER_STATS		21
-+ #define PACKET_FANOUT_DATA		22
-+ #define PACKET_IGNORE_OUTGOING		23
-++#define PACKET_RECV_TYPE		24
-+ 
-+ #define PACKET_FANOUT_HASH		0
-+ #define PACKET_FANOUT_LB		1
-+--- a/net/packet/af_packet.c
-++++ b/net/packet/af_packet.c
-+@@ -1801,6 +1801,7 @@ static int packet_rcv_spkt(struct sk_buf
-+ {
-+ 	struct sock *sk;
-+ 	struct sockaddr_pkt *spkt;
-++	struct packet_sock *po;
-+ 
-+ 	/*
-+ 	 *	When we registered the protocol we saved the socket in the data
-+@@ -1808,6 +1809,7 @@ static int packet_rcv_spkt(struct sk_buf
-+ 	 */
-+ 
-+ 	sk = pt->af_packet_priv;
-++	po = pkt_sk(sk);
-+ 
-+ 	/*
-+ 	 *	Yank back the headers [hope the device set this
-+@@ -1820,7 +1822,7 @@ static int packet_rcv_spkt(struct sk_buf
-+ 	 *	so that this procedure is noop.
-+ 	 */
-+ 
-+-	if (skb->pkt_type == PACKET_LOOPBACK)
-++	if (!(po->pkt_type & (1 << skb->pkt_type)))
-+ 		goto out;
-+ 
-+ 	if (!net_eq(dev_net(dev), sock_net(sk)))
-+@@ -2058,12 +2060,12 @@ static int packet_rcv(struct sk_buff *sk
-+ 	unsigned int snaplen, res;
-+ 	bool is_drop_n_account = false;
-+ 
-+-	if (skb->pkt_type == PACKET_LOOPBACK)
-+-		goto drop;
-+-
-+ 	sk = pt->af_packet_priv;
-+ 	po = pkt_sk(sk);
-+ 
-++	if (!(po->pkt_type & (1 << skb->pkt_type)))
-++		goto drop;
-++
-+ 	if (!net_eq(dev_net(dev), sock_net(sk)))
-+ 		goto drop;
-+ 
-+@@ -2189,12 +2191,12 @@ static int tpacket_rcv(struct sk_buff *s
-+ 	BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h2)) != 32);
-+ 	BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h3)) != 48);
-+ 
-+-	if (skb->pkt_type == PACKET_LOOPBACK)
-+-		goto drop;
-+-
-+ 	sk = pt->af_packet_priv;
-+ 	po = pkt_sk(sk);
-+ 
-++	if (!(po->pkt_type & (1 << skb->pkt_type)))
-++		goto drop;
-++
-+ 	if (!net_eq(dev_net(dev), sock_net(sk)))
-+ 		goto drop;
-+ 
-+@@ -3293,6 +3295,7 @@ static int packet_create(struct net *net
-+ 	mutex_init(&po->pg_vec_lock);
-+ 	po->rollover = NULL;
-+ 	po->prot_hook.func = packet_rcv;
-++	po->pkt_type = PACKET_MASK_ANY & ~(1 << PACKET_LOOPBACK);
-+ 
-+ 	if (sock->type == SOCK_PACKET)
-+ 		po->prot_hook.func = packet_rcv_spkt;
-+@@ -3927,6 +3930,16 @@ packet_setsockopt(struct socket *sock, i
-+ 		po->xmit = val ? packet_direct_xmit : dev_queue_xmit;
-+ 		return 0;
-+ 	}
-++	case PACKET_RECV_TYPE:
-++	{
-++		unsigned int val;
-++		if (optlen != sizeof(val))
-++			return -EINVAL;
-++		if (copy_from_sockptr(&val, optval, sizeof(val)))
-++			return -EFAULT;
-++		po->pkt_type = val & ~BIT(PACKET_LOOPBACK);
-++		return 0;
-++	}
-+ 	default:
-+ 		return -ENOPROTOOPT;
-+ 	}
-+@@ -3983,6 +3996,13 @@ static int packet_getsockopt(struct sock
-+ 	case PACKET_VNET_HDR:
-+ 		val = po->has_vnet_hdr;
-+ 		break;
-++	case PACKET_RECV_TYPE:
-++		if (len > sizeof(unsigned int))
-++			len = sizeof(unsigned int);
-++		val = po->pkt_type;
-++
-++		data = &val;
-++		break;
-+ 	case PACKET_VERSION:
-+ 		val = po->tp_version;
-+ 		break;
-+--- a/net/packet/internal.h
-++++ b/net/packet/internal.h
-+@@ -136,6 +136,7 @@ struct packet_sock {
-+ 	int			(*xmit)(struct sk_buff *skb);
-+ 	struct packet_type	prot_hook ____cacheline_aligned_in_smp;
-+ 	atomic_t		tp_drops ____cacheline_aligned_in_smp;
-++	unsigned int		pkt_type;
-+ };
-+ 
-+ static struct packet_sock *pkt_sk(struct sock *sk)
-diff --git a/target/linux/generic/pending-5.10/640-00-netfilter-flowtable-add-hash-offset-field-to-tuple.patch b/target/linux/generic/pending-5.10/640-00-netfilter-flowtable-add-hash-offset-field-to-tuple.patch
-new file mode 100644
-index 0000000000..c881ccfcb0
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-00-netfilter-flowtable-add-hash-offset-field-to-tuple.patch
-@@ -0,0 +1,52 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Fri, 20 Nov 2020 13:49:13 +0100
-+Subject: [PATCH] netfilter: flowtable: add hash offset field to tuple
-+
-+Add a placeholder field to calculate hash tuple offset. Similar to
-+2c407aca6497 ("netfilter: conntrack: avoid gcc-10 zero-length-bounds
-+warning").
-+
-+Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
-+---
-+
-+--- a/include/net/netfilter/nf_flow_table.h
-++++ b/include/net/netfilter/nf_flow_table.h
-+@@ -107,6 +107,10 @@ struct flow_offload_tuple {
-+ 
-+ 	u8				l3proto;
-+ 	u8				l4proto;
-++
-++	/* All members above are keys for lookups, see flow_offload_hash(). */
-++	struct { }			__hash;
-++
-+ 	u8				dir;
-+ 
-+ 	u16				mtu;
-+--- a/net/netfilter/nf_flow_table_core.c
-++++ b/net/netfilter/nf_flow_table_core.c
-+@@ -191,14 +191,14 @@ static u32 flow_offload_hash(const void
-+ {
-+ 	const struct flow_offload_tuple *tuple = data;
-+ 
-+-	return jhash(tuple, offsetof(struct flow_offload_tuple, dir), seed);
-++	return jhash(tuple, offsetof(struct flow_offload_tuple, __hash), seed);
-+ }
-+ 
-+ static u32 flow_offload_hash_obj(const void *data, u32 len, u32 seed)
-+ {
-+ 	const struct flow_offload_tuple_rhash *tuplehash = data;
-+ 
-+-	return jhash(&tuplehash->tuple, offsetof(struct flow_offload_tuple, dir), seed);
-++	return jhash(&tuplehash->tuple, offsetof(struct flow_offload_tuple, __hash), seed);
-+ }
-+ 
-+ static int flow_offload_hash_cmp(struct rhashtable_compare_arg *arg,
-+@@ -207,7 +207,7 @@ static int flow_offload_hash_cmp(struct
-+ 	const struct flow_offload_tuple *tuple = arg->key;
-+ 	const struct flow_offload_tuple_rhash *x = ptr;
-+ 
-+-	if (memcmp(&x->tuple, tuple, offsetof(struct flow_offload_tuple, dir)))
-++	if (memcmp(&x->tuple, tuple, offsetof(struct flow_offload_tuple, __hash)))
-+ 		return 1;
-+ 
-+ 	return 0;
-diff --git a/target/linux/generic/pending-5.10/640-01-netfilter-flowtable-add-xmit-path-types.patch b/target/linux/generic/pending-5.10/640-01-netfilter-flowtable-add-xmit-path-types.patch
-new file mode 100644
-index 0000000000..e47d03e48d
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-01-netfilter-flowtable-add-xmit-path-types.patch
-@@ -0,0 +1,188 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Fri, 20 Nov 2020 13:49:14 +0100
-+Subject: [PATCH] netfilter: flowtable: add xmit path types
-+
-+Add the xmit_type field that defines the two supported xmit paths in the
-+flowtable data plane, which are the neighbour and the xfrm xmit paths.
-+This patch prepares for new flowtable xmit path types to come.
-+
-+Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
-+---
-+
-+--- a/include/net/netfilter/nf_flow_table.h
-++++ b/include/net/netfilter/nf_flow_table.h
-+@@ -89,6 +89,11 @@ enum flow_offload_tuple_dir {
-+ 	FLOW_OFFLOAD_DIR_MAX = IP_CT_DIR_MAX
-+ };
-+ 
-++enum flow_offload_xmit_type {
-++	FLOW_OFFLOAD_XMIT_NEIGH		= 0,
-++	FLOW_OFFLOAD_XMIT_XFRM,
-++};
-++
-+ struct flow_offload_tuple {
-+ 	union {
-+ 		struct in_addr		src_v4;
-+@@ -111,7 +116,8 @@ struct flow_offload_tuple {
-+ 	/* All members above are keys for lookups, see flow_offload_hash(). */
-+ 	struct { }			__hash;
-+ 
-+-	u8				dir;
-++	u8				dir:6,
-++					xmit_type:2;
-+ 
-+ 	u16				mtu;
-+ 
-+@@ -158,7 +164,8 @@ static inline __s32 nf_flow_timeout_delt
-+ 
-+ struct nf_flow_route {
-+ 	struct {
-+-		struct dst_entry	*dst;
-++		struct dst_entry		*dst;
-++		enum flow_offload_xmit_type	xmit_type;
-+ 	} tuple[FLOW_OFFLOAD_DIR_MAX];
-+ };
-+ 
-+--- a/net/netfilter/nf_flow_table_core.c
-++++ b/net/netfilter/nf_flow_table_core.c
-+@@ -95,6 +95,7 @@ static int flow_offload_fill_route(struc
-+ 	}
-+ 
-+ 	flow_tuple->iifidx = other_dst->dev->ifindex;
-++	flow_tuple->xmit_type = route->tuple[dir].xmit_type;
-+ 	flow_tuple->dst_cache = dst;
-+ 
-+ 	return 0;
-+--- a/net/netfilter/nf_flow_table_ip.c
-++++ b/net/netfilter/nf_flow_table_ip.c
-+@@ -220,10 +220,20 @@ static bool nf_flow_exceeds_mtu(const st
-+ 	return true;
-+ }
-+ 
-+-static int nf_flow_offload_dst_check(struct dst_entry *dst)
-++static inline struct dst_entry *
-++nft_flow_dst(struct flow_offload_tuple_rhash *tuplehash)
-+ {
-+-	if (unlikely(dst_xfrm(dst)))
-++	return tuplehash->tuple.dst_cache;
-++}
-++
-++static int nf_flow_offload_dst_check(struct flow_offload_tuple_rhash *tuplehash)
-++{
-++	struct dst_entry *dst;
-++
-++	if (unlikely(tuplehash->tuple.xmit_type == FLOW_OFFLOAD_XMIT_XFRM)) {
-++		dst = nft_flow_dst(tuplehash);
-+ 		return dst_check(dst, 0) ? 0 : -1;
-++	}
-+ 
-+ 	return 0;
-+ }
-+@@ -265,8 +275,6 @@ nf_flow_offload_ip_hook(void *priv, stru
-+ 
-+ 	dir = tuplehash->tuple.dir;
-+ 	flow = container_of(tuplehash, struct flow_offload, tuplehash[dir]);
-+-	rt = (struct rtable *)flow->tuplehash[dir].tuple.dst_cache;
-+-	outdev = rt->dst.dev;
-+ 
-+ 	if (unlikely(nf_flow_exceeds_mtu(skb, flow->tuplehash[dir].tuple.mtu)))
-+ 		return NF_ACCEPT;
-+@@ -280,7 +288,7 @@ nf_flow_offload_ip_hook(void *priv, stru
-+ 
-+ 	flow_offload_refresh(flow_table, flow);
-+ 
-+-	if (nf_flow_offload_dst_check(&rt->dst)) {
-++	if (nf_flow_offload_dst_check(tuplehash)) {
-+ 		flow_offload_teardown(flow);
-+ 		return NF_ACCEPT;
-+ 	}
-+@@ -295,13 +303,16 @@ nf_flow_offload_ip_hook(void *priv, stru
-+ 	if (flow_table->flags & NF_FLOWTABLE_COUNTER)
-+ 		nf_ct_acct_update(flow->ct, tuplehash->tuple.dir, skb->len);
-+ 
-+-	if (unlikely(dst_xfrm(&rt->dst))) {
-++	rt = (struct rtable *)tuplehash->tuple.dst_cache;
-++
-++	if (unlikely(tuplehash->tuple.xmit_type == FLOW_OFFLOAD_XMIT_XFRM)) {
-+ 		memset(skb->cb, 0, sizeof(struct inet_skb_parm));
-+ 		IPCB(skb)->iif = skb->dev->ifindex;
-+ 		IPCB(skb)->flags = IPSKB_FORWARDED;
-+ 		return nf_flow_xmit_xfrm(skb, state, &rt->dst);
-+ 	}
-+ 
-++	outdev = rt->dst.dev;
-+ 	skb->dev = outdev;
-+ 	nexthop = rt_nexthop(rt, flow->tuplehash[!dir].tuple.src_v4.s_addr);
-+ 	skb_dst_set_noref(skb, &rt->dst);
-+@@ -506,8 +517,6 @@ nf_flow_offload_ipv6_hook(void *priv, st
-+ 
-+ 	dir = tuplehash->tuple.dir;
-+ 	flow = container_of(tuplehash, struct flow_offload, tuplehash[dir]);
-+-	rt = (struct rt6_info *)flow->tuplehash[dir].tuple.dst_cache;
-+-	outdev = rt->dst.dev;
-+ 
-+ 	if (unlikely(nf_flow_exceeds_mtu(skb, flow->tuplehash[dir].tuple.mtu)))
-+ 		return NF_ACCEPT;
-+@@ -518,7 +527,7 @@ nf_flow_offload_ipv6_hook(void *priv, st
-+ 
-+ 	flow_offload_refresh(flow_table, flow);
-+ 
-+-	if (nf_flow_offload_dst_check(&rt->dst)) {
-++	if (nf_flow_offload_dst_check(tuplehash)) {
-+ 		flow_offload_teardown(flow);
-+ 		return NF_ACCEPT;
-+ 	}
-+@@ -536,13 +545,16 @@ nf_flow_offload_ipv6_hook(void *priv, st
-+ 	if (flow_table->flags & NF_FLOWTABLE_COUNTER)
-+ 		nf_ct_acct_update(flow->ct, tuplehash->tuple.dir, skb->len);
-+ 
-+-	if (unlikely(dst_xfrm(&rt->dst))) {
-++	rt = (struct rt6_info *)tuplehash->tuple.dst_cache;
-++
-++	if (unlikely(tuplehash->tuple.xmit_type == FLOW_OFFLOAD_XMIT_XFRM)) {
-+ 		memset(skb->cb, 0, sizeof(struct inet6_skb_parm));
-+ 		IP6CB(skb)->iif = skb->dev->ifindex;
-+ 		IP6CB(skb)->flags = IP6SKB_FORWARDED;
-+ 		return nf_flow_xmit_xfrm(skb, state, &rt->dst);
-+ 	}
-+ 
-++	outdev = rt->dst.dev;
-+ 	skb->dev = outdev;
-+ 	nexthop = rt6_nexthop(rt, &flow->tuplehash[!dir].tuple.src_v6);
-+ 	skb_dst_set_noref(skb, &rt->dst);
-+--- a/net/netfilter/nft_flow_offload.c
-++++ b/net/netfilter/nft_flow_offload.c
-+@@ -19,6 +19,22 @@ struct nft_flow_offload {
-+ 	struct nft_flowtable	*flowtable;
-+ };
-+ 
-++static enum flow_offload_xmit_type nft_xmit_type(struct dst_entry *dst)
-++{
-++	if (dst_xfrm(dst))
-++		return FLOW_OFFLOAD_XMIT_XFRM;
-++
-++	return FLOW_OFFLOAD_XMIT_NEIGH;
-++}
-++
-++static void nft_default_forward_path(struct nf_flow_route *route,
-++				     struct dst_entry *dst_cache,
-++				     enum ip_conntrack_dir dir)
-++{
-++	route->tuple[dir].dst		= dst_cache;
-++	route->tuple[dir].xmit_type	= nft_xmit_type(dst_cache);
-++}
-++
-+ static int nft_flow_route(const struct nft_pktinfo *pkt,
-+ 			  const struct nf_conn *ct,
-+ 			  struct nf_flow_route *route,
-+@@ -44,8 +60,8 @@ static int nft_flow_route(const struct n
-+ 	if (!other_dst)
-+ 		return -ENOENT;
-+ 
-+-	route->tuple[dir].dst		= this_dst;
-+-	route->tuple[!dir].dst		= other_dst;
-++	nft_default_forward_path(route, this_dst, dir);
-++	nft_default_forward_path(route, other_dst, !dir);
-+ 
-+ 	return 0;
-+ }
-diff --git a/target/linux/generic/pending-5.10/640-02-net-resolve-forwarding-path-from-virtual-netdevice-a.patch b/target/linux/generic/pending-5.10/640-02-net-resolve-forwarding-path-from-virtual-netdevice-a.patch
-new file mode 100644
-index 0000000000..224831d593
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-02-net-resolve-forwarding-path-from-virtual-netdevice-a.patch
-@@ -0,0 +1,170 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Thu, 4 Mar 2021 23:18:11 +0100
-+Subject: [PATCH] net: resolve forwarding path from virtual netdevice and
-+ HW destination address
-+
-+This patch adds dev_fill_forward_path() which resolves the path to reach
-+the real netdevice from the IP forwarding side. This function takes as
-+input the netdevice and the destination hardware address and it walks
-+down the devices calling .ndo_fill_forward_path() for each device until
-+the real device is found.
-+
-+For instance, assuming the following topology:
-+
-+               IP forwarding
-+              /             \
-+           br0              eth0
-+           / \
-+       eth1  eth2
-+        .
-+        .
-+        .
-+       ethX
-+ ab:cd:ef:ab:cd:ef
-+
-+where eth1 and eth2 are bridge ports and eth0 provides WAN connectivity.
-+ethX is the interface in another box which is connected to the eth1
-+bridge port.
-+
-+For packets going through IP forwarding to br0 whose destination MAC
-+address is ab:cd:ef:ab:cd:ef, dev_fill_forward_path() provides the
-+following path:
-+
-+	br0 -> eth1
-+
-+.ndo_fill_forward_path for br0 looks up at the FDB for the bridge port
-+from the destination MAC address to get the bridge port eth1.
-+
-+This information allows to create a fast path that bypasses the classic
-+bridge and IP forwarding paths, so packets go directly from the bridge
-+port eth1 to eth0 (wan interface) and vice versa.
-+
-+             fast path
-+      .------------------------.
-+     /                          \
-+    |           IP forwarding   |
-+    |          /             \  \/
-+    |       br0               eth0
-+    .       / \
-+     -> eth1  eth2
-+        .
-+        .
-+        .
-+       ethX
-+ ab:cd:ef:ab:cd:ef
-+
-+Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
-+---
-+
-+--- a/include/linux/netdevice.h
-++++ b/include/linux/netdevice.h
-+@@ -827,6 +827,27 @@ typedef u16 (*select_queue_fallback_t)(s
-+ 				       struct sk_buff *skb,
-+ 				       struct net_device *sb_dev);
-+ 
-++enum net_device_path_type {
-++	DEV_PATH_ETHERNET = 0,
-++};
-++
-++struct net_device_path {
-++	enum net_device_path_type	type;
-++	const struct net_device		*dev;
-++};
-++
-++#define NET_DEVICE_PATH_STACK_MAX	5
-++
-++struct net_device_path_stack {
-++	int			num_paths;
-++	struct net_device_path	path[NET_DEVICE_PATH_STACK_MAX];
-++};
-++
-++struct net_device_path_ctx {
-++	const struct net_device *dev;
-++	const u8		*daddr;
-++};
-++
-+ enum tc_setup_type {
-+ 	TC_SETUP_QDISC_MQPRIO,
-+ 	TC_SETUP_CLSU32,
-+@@ -1273,6 +1294,8 @@ struct netdev_net_notifier {
-+  * struct net_device *(*ndo_get_peer_dev)(struct net_device *dev);
-+  *	If a device is paired with a peer device, return the peer instance.
-+  *	The caller must be under RCU read context.
-++ * int (*ndo_fill_forward_path)(struct net_device_path_ctx *ctx, struct net_device_path *path);
-++ *     Get the forwarding path to reach the real device from the HW destination address
-+  */
-+ struct net_device_ops {
-+ 	int			(*ndo_init)(struct net_device *dev);
-+@@ -1481,6 +1504,8 @@ struct net_device_ops {
-+ 	int			(*ndo_tunnel_ctl)(struct net_device *dev,
-+ 						  struct ip_tunnel_parm *p, int cmd);
-+ 	struct net_device *	(*ndo_get_peer_dev)(struct net_device *dev);
-++	int                     (*ndo_fill_forward_path)(struct net_device_path_ctx *ctx,
-++                                                         struct net_device_path *path);
-+ };
-+ 
-+ /**
-+@@ -2795,6 +2820,8 @@ void dev_remove_offload(struct packet_of
-+ 
-+ int dev_get_iflink(const struct net_device *dev);
-+ int dev_fill_metadata_dst(struct net_device *dev, struct sk_buff *skb);
-++int dev_fill_forward_path(const struct net_device *dev, const u8 *daddr,
-++			  struct net_device_path_stack *stack);
-+ struct net_device *__dev_get_by_flags(struct net *net, unsigned short flags,
-+ 				      unsigned short mask);
-+ struct net_device *dev_get_by_name(struct net *net, const char *name);
-+--- a/net/core/dev.c
-++++ b/net/core/dev.c
-+@@ -847,6 +847,52 @@ int dev_fill_metadata_dst(struct net_dev
-+ }
-+ EXPORT_SYMBOL_GPL(dev_fill_metadata_dst);
-+ 
-++static struct net_device_path *dev_fwd_path(struct net_device_path_stack *stack)
-++{
-++	int k = stack->num_paths++;
-++
-++	if (WARN_ON_ONCE(k >= NET_DEVICE_PATH_STACK_MAX))
-++		return NULL;
-++
-++	return &stack->path[k];
-++}
-++
-++int dev_fill_forward_path(const struct net_device *dev, const u8 *daddr,
-++			  struct net_device_path_stack *stack)
-++{
-++	const struct net_device *last_dev;
-++	struct net_device_path_ctx ctx = {
-++		.dev	= dev,
-++		.daddr	= daddr,
-++	};
-++	struct net_device_path *path;
-++	int ret = 0;
-++
-++	stack->num_paths = 0;
-++	while (ctx.dev && ctx.dev->netdev_ops->ndo_fill_forward_path) {
-++		last_dev = ctx.dev;
-++		path = dev_fwd_path(stack);
-++		if (!path)
-++			return -1;
-++
-++		memset(path, 0, sizeof(struct net_device_path));
-++		ret = ctx.dev->netdev_ops->ndo_fill_forward_path(&ctx, path);
-++		if (ret < 0)
-++			return -1;
-++
-++		if (WARN_ON_ONCE(last_dev == ctx.dev))
-++			return -1;
-++	}
-++	path = dev_fwd_path(stack);
-++	if (!path)
-++		return -1;
-++	path->type = DEV_PATH_ETHERNET;
-++	path->dev = ctx.dev;
-++
-++	return ret;
-++}
-++EXPORT_SYMBOL_GPL(dev_fill_forward_path);
-++
-+ /**
-+  *	__dev_get_by_name	- find a device by its name
-+  *	@net: the applicable net namespace
-diff --git a/target/linux/generic/pending-5.10/640-03-net-8021q-resolve-forwarding-path-for-vlan-devices.patch b/target/linux/generic/pending-5.10/640-03-net-8021q-resolve-forwarding-path-for-vlan-devices.patch
-new file mode 100644
-index 0000000000..69e025be26
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-03-net-8021q-resolve-forwarding-path-for-vlan-devices.patch
-@@ -0,0 +1,80 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Fri, 20 Nov 2020 13:49:16 +0100
-+Subject: [PATCH] net: 8021q: resolve forwarding path for vlan devices
-+
-+Add .ndo_fill_forward_path for vlan devices.
-+
-+For instance, assuming the following topology:
-+
-+                   IP forwarding
-+                  /             \
-+            eth0.100             eth0
-+            |
-+            eth0
-+            .
-+            .
-+            .
-+           ethX
-+     ab:cd:ef:ab:cd:ef
-+
-+For packets going through IP forwarding to eth0.100 whose destination
-+MAC address is ab:cd:ef:ab:cd:ef, dev_fill_forward_path() provides the
-+following path:
-+
-+        eth0.100 -> eth0
-+
-+Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
-+---
-+
-+--- a/include/linux/netdevice.h
-++++ b/include/linux/netdevice.h
-+@@ -829,11 +829,18 @@ typedef u16 (*select_queue_fallback_t)(s
-+ 
-+ enum net_device_path_type {
-+ 	DEV_PATH_ETHERNET = 0,
-++	DEV_PATH_VLAN,
-+ };
-+ 
-+ struct net_device_path {
-+ 	enum net_device_path_type	type;
-+ 	const struct net_device		*dev;
-++	union {
-++		struct {
-++			u16		id;
-++			__be16		proto;
-++		} encap;
-++	};
-+ };
-+ 
-+ #define NET_DEVICE_PATH_STACK_MAX	5
-+--- a/net/8021q/vlan_dev.c
-++++ b/net/8021q/vlan_dev.c
-+@@ -767,6 +767,20 @@ static int vlan_dev_get_iflink(const str
-+ 	return real_dev->ifindex;
-+ }
-+ 
-++static int vlan_dev_fill_forward_path(struct net_device_path_ctx *ctx,
-++				      struct net_device_path *path)
-++{
-++	struct vlan_dev_priv *vlan = vlan_dev_priv(ctx->dev);
-++
-++	path->type = DEV_PATH_VLAN;
-++	path->encap.id = vlan->vlan_id;
-++	path->encap.proto = vlan->vlan_proto;
-++	path->dev = ctx->dev;
-++	ctx->dev = vlan->real_dev;
-++
-++	return 0;
-++}
-++
-+ static const struct ethtool_ops vlan_ethtool_ops = {
-+ 	.get_link_ksettings	= vlan_ethtool_get_link_ksettings,
-+ 	.get_drvinfo	        = vlan_ethtool_get_drvinfo,
-+@@ -805,6 +819,7 @@ static const struct net_device_ops vlan_
-+ #endif
-+ 	.ndo_fix_features	= vlan_dev_fix_features,
-+ 	.ndo_get_iflink		= vlan_dev_get_iflink,
-++	.ndo_fill_forward_path	= vlan_dev_fill_forward_path,
-+ };
-+ 
-+ static void vlan_dev_free(struct net_device *dev)
-diff --git a/target/linux/generic/pending-5.10/640-04-bridge-resolve-forwarding-path-for-bridge-devices.patch b/target/linux/generic/pending-5.10/640-04-bridge-resolve-forwarding-path-for-bridge-devices.patch
-new file mode 100644
-index 0000000000..cfb817f20f
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-04-bridge-resolve-forwarding-path-for-bridge-devices.patch
-@@ -0,0 +1,62 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Fri, 20 Nov 2020 13:49:17 +0100
-+Subject: [PATCH] bridge: resolve forwarding path for bridge devices
-+
-+Add .ndo_fill_forward_path for bridge devices.
-+
-+Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
-+---
-+
-+--- a/include/linux/netdevice.h
-++++ b/include/linux/netdevice.h
-+@@ -830,6 +830,7 @@ typedef u16 (*select_queue_fallback_t)(s
-+ enum net_device_path_type {
-+ 	DEV_PATH_ETHERNET = 0,
-+ 	DEV_PATH_VLAN,
-++	DEV_PATH_BRIDGE,
-+ };
-+ 
-+ struct net_device_path {
-+--- a/net/bridge/br_device.c
-++++ b/net/bridge/br_device.c
-+@@ -398,6 +398,32 @@ static int br_del_slave(struct net_devic
-+ 	return br_del_if(br, slave_dev);
-+ }
-+ 
-++static int br_fill_forward_path(struct net_device_path_ctx *ctx,
-++				struct net_device_path *path)
-++{
-++	struct net_bridge_fdb_entry *f;
-++	struct net_bridge_port *dst;
-++	struct net_bridge *br;
-++
-++	if (netif_is_bridge_port(ctx->dev))
-++		return -1;
-++
-++	br = netdev_priv(ctx->dev);
-++	f = br_fdb_find_rcu(br, ctx->daddr, 0);
-++	if (!f || !f->dst)
-++		return -1;
-++
-++	dst = READ_ONCE(f->dst);
-++	if (!dst)
-++		return -1;
-++
-++	path->type = DEV_PATH_BRIDGE;
-++	path->dev = dst->br->dev;
-++	ctx->dev = dst->dev;
-++
-++	return 0;
-++}
-++
-+ static const struct ethtool_ops br_ethtool_ops = {
-+ 	.get_drvinfo		 = br_getinfo,
-+ 	.get_link		 = ethtool_op_get_link,
-+@@ -432,6 +458,7 @@ static const struct net_device_ops br_ne
-+ 	.ndo_bridge_setlink	 = br_setlink,
-+ 	.ndo_bridge_dellink	 = br_dellink,
-+ 	.ndo_features_check	 = passthru_features_check,
-++	.ndo_fill_forward_path	 = br_fill_forward_path,
-+ };
-+ 
-+ static struct device_type br_type = {
-diff --git a/target/linux/generic/pending-5.10/640-05-netfilter-flowtable-use-dev_fill_forward_path-to-obt.patch b/target/linux/generic/pending-5.10/640-05-netfilter-flowtable-use-dev_fill_forward_path-to-obt.patch
-new file mode 100644
-index 0000000000..1f61cff09d
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-05-netfilter-flowtable-use-dev_fill_forward_path-to-obt.patch
-@@ -0,0 +1,191 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Fri, 20 Nov 2020 13:49:18 +0100
-+Subject: [PATCH] netfilter: flowtable: use dev_fill_forward_path() to
-+ obtain ingress device
-+
-+Obtain the ingress device in the tuple from the route in the reply
-+direction. Use dev_fill_forward_path() instead to get the real ingress
-+device for this flow.
-+
-+Fall back to use the ingress device that the IP forwarding route
-+provides if:
-+
-+- dev_fill_forward_path() finds no real ingress device.
-+- the ingress device that is obtained is not part of the flowtable
-+  devices.
-+- this route has a xfrm policy.
-+
-+Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
-+---
-+
-+--- a/include/net/netfilter/nf_flow_table.h
-++++ b/include/net/netfilter/nf_flow_table.h
-+@@ -165,6 +165,9 @@ static inline __s32 nf_flow_timeout_delt
-+ struct nf_flow_route {
-+ 	struct {
-+ 		struct dst_entry		*dst;
-++		struct {
-++			u32			ifindex;
-++		} in;
-+ 		enum flow_offload_xmit_type	xmit_type;
-+ 	} tuple[FLOW_OFFLOAD_DIR_MAX];
-+ };
-+--- a/net/netfilter/nf_flow_table_core.c
-++++ b/net/netfilter/nf_flow_table_core.c
-+@@ -79,7 +79,6 @@ static int flow_offload_fill_route(struc
-+ 				   enum flow_offload_tuple_dir dir)
-+ {
-+ 	struct flow_offload_tuple *flow_tuple = &flow->tuplehash[dir].tuple;
-+-	struct dst_entry *other_dst = route->tuple[!dir].dst;
-+ 	struct dst_entry *dst = route->tuple[dir].dst;
-+ 
-+ 	if (!dst_hold_safe(route->tuple[dir].dst))
-+@@ -94,7 +93,7 @@ static int flow_offload_fill_route(struc
-+ 		break;
-+ 	}
-+ 
-+-	flow_tuple->iifidx = other_dst->dev->ifindex;
-++	flow_tuple->iifidx = route->tuple[dir].in.ifindex;
-+ 	flow_tuple->xmit_type = route->tuple[dir].xmit_type;
-+ 	flow_tuple->dst_cache = dst;
-+ 
-+--- a/net/netfilter/nft_flow_offload.c
-++++ b/net/netfilter/nft_flow_offload.c
-+@@ -31,14 +31,104 @@ static void nft_default_forward_path(str
-+ 				     struct dst_entry *dst_cache,
-+ 				     enum ip_conntrack_dir dir)
-+ {
-++	route->tuple[!dir].in.ifindex	= dst_cache->dev->ifindex;
-+ 	route->tuple[dir].dst		= dst_cache;
-+ 	route->tuple[dir].xmit_type	= nft_xmit_type(dst_cache);
-+ }
-+ 
-++static int nft_dev_fill_forward_path(const struct nf_flow_route *route,
-++				     const struct dst_entry *dst_cache,
-++				     const struct nf_conn *ct,
-++				     enum ip_conntrack_dir dir,
-++				     struct net_device_path_stack *stack)
-++{
-++	const void *daddr = &ct->tuplehash[!dir].tuple.src.u3;
-++	struct net_device *dev = dst_cache->dev;
-++	unsigned char ha[ETH_ALEN];
-++	struct neighbour *n;
-++	u8 nud_state;
-++
-++	n = dst_neigh_lookup(dst_cache, daddr);
-++	if (!n)
-++		return -1;
-++
-++	read_lock_bh(&n->lock);
-++	nud_state = n->nud_state;
-++	ether_addr_copy(ha, n->ha);
-++	read_unlock_bh(&n->lock);
-++	neigh_release(n);
-++
-++	if (!(nud_state & NUD_VALID))
-++		return -1;
-++
-++	return dev_fill_forward_path(dev, ha, stack);
-++}
-++
-++struct nft_forward_info {
-++	const struct net_device *indev;
-++};
-++
-++static void nft_dev_path_info(const struct net_device_path_stack *stack,
-++			      struct nft_forward_info *info)
-++{
-++	const struct net_device_path *path;
-++	int i;
-++
-++	for (i = 0; i < stack->num_paths; i++) {
-++		path = &stack->path[i];
-++		switch (path->type) {
-++		case DEV_PATH_ETHERNET:
-++			info->indev = path->dev;
-++			break;
-++		case DEV_PATH_VLAN:
-++		case DEV_PATH_BRIDGE:
-++		default:
-++			info->indev = NULL;
-++			break;
-++		}
-++	}
-++}
-++
-++static bool nft_flowtable_find_dev(const struct net_device *dev,
-++				   struct nft_flowtable *ft)
-++{
-++	struct nft_hook *hook;
-++	bool found = false;
-++
-++	list_for_each_entry_rcu(hook, &ft->hook_list, list) {
-++		if (hook->ops.dev != dev)
-++			continue;
-++
-++		found = true;
-++		break;
-++	}
-++
-++	return found;
-++}
-++
-++static void nft_dev_forward_path(struct nf_flow_route *route,
-++				 const struct nf_conn *ct,
-++				 enum ip_conntrack_dir dir,
-++				 struct nft_flowtable *ft)
-++{
-++	const struct dst_entry *dst = route->tuple[dir].dst;
-++	struct net_device_path_stack stack;
-++	struct nft_forward_info info = {};
-++
-++	if (nft_dev_fill_forward_path(route, dst, ct, dir, &stack) >= 0)
-++		nft_dev_path_info(&stack, &info);
-++
-++	if (!info.indev || !nft_flowtable_find_dev(info.indev, ft))
-++		return;
-++
-++	route->tuple[!dir].in.ifindex = info.indev->ifindex;
-++}
-++
-+ static int nft_flow_route(const struct nft_pktinfo *pkt,
-+ 			  const struct nf_conn *ct,
-+ 			  struct nf_flow_route *route,
-+-			  enum ip_conntrack_dir dir)
-++			  enum ip_conntrack_dir dir,
-++			  struct nft_flowtable *ft)
-+ {
-+ 	struct dst_entry *this_dst = skb_dst(pkt->skb);
-+ 	struct dst_entry *other_dst = NULL;
-+@@ -63,6 +153,12 @@ static int nft_flow_route(const struct n
-+ 	nft_default_forward_path(route, this_dst, dir);
-+ 	nft_default_forward_path(route, other_dst, !dir);
-+ 
-++	if (route->tuple[dir].xmit_type	== FLOW_OFFLOAD_XMIT_NEIGH &&
-++	    route->tuple[!dir].xmit_type == FLOW_OFFLOAD_XMIT_NEIGH) {
-++		nft_dev_forward_path(route, ct, dir, ft);
-++		nft_dev_forward_path(route, ct, !dir, ft);
-++	}
-++
-+ 	return 0;
-+ }
-+ 
-+@@ -90,8 +186,8 @@ static void nft_flow_offload_eval(const
-+ 	struct nft_flow_offload *priv = nft_expr_priv(expr);
-+ 	struct nf_flowtable *flowtable = &priv->flowtable->data;
-+ 	struct tcphdr _tcph, *tcph = NULL;
-++	struct nf_flow_route route = {};
-+ 	enum ip_conntrack_info ctinfo;
-+-	struct nf_flow_route route;
-+ 	struct flow_offload *flow;
-+ 	enum ip_conntrack_dir dir;
-+ 	struct nf_conn *ct;
-+@@ -128,7 +224,7 @@ static void nft_flow_offload_eval(const
-+ 		goto out;
-+ 
-+ 	dir = CTINFO2DIR(ctinfo);
-+-	if (nft_flow_route(pkt, ct, &route, dir) < 0)
-++	if (nft_flow_route(pkt, ct, &route, dir, priv->flowtable) < 0)
-+ 		goto err_flow_route;
-+ 
-+ 	flow = flow_offload_alloc(ct);
-diff --git a/target/linux/generic/pending-5.10/640-06-netfilter-flowtable-use-dev_fill_forward_path-to-obt.patch b/target/linux/generic/pending-5.10/640-06-netfilter-flowtable-use-dev_fill_forward_path-to-obt.patch
-new file mode 100644
-index 0000000000..ada14e6c7a
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-06-netfilter-flowtable-use-dev_fill_forward_path-to-obt.patch
-@@ -0,0 +1,344 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Thu, 4 Mar 2021 03:26:35 +0100
-+Subject: [PATCH] netfilter: flowtable: use dev_fill_forward_path() to
-+ obtain egress device
-+
-+The egress device in the tuple is obtained from route. Use
-+dev_fill_forward_path() instead to provide the real egress device for
-+this flow whenever this is available.
-+
-+The new FLOW_OFFLOAD_XMIT_DIRECT type uses dev_queue_xmit() to transmit
-+ethernet frames. Cache the source and destination hardware address to
-+use dev_queue_xmit() to transfer packets.
-+
-+The FLOW_OFFLOAD_XMIT_DIRECT replaces FLOW_OFFLOAD_XMIT_NEIGH if
-+dev_fill_forward_path() finds a direct transmit path.
-+
-+In case of topology updates, if peer is moved to different bridge port,
-+the connection will time out, reconnect will result in a new entry with
-+the correct path. Snooping fdb updates would allow for cleaning up stale
-+flowtable entries.
-+
-+Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
-+---
-+
-+--- a/include/net/netfilter/nf_flow_table.h
-++++ b/include/net/netfilter/nf_flow_table.h
-+@@ -92,6 +92,7 @@ enum flow_offload_tuple_dir {
-+ enum flow_offload_xmit_type {
-+ 	FLOW_OFFLOAD_XMIT_NEIGH		= 0,
-+ 	FLOW_OFFLOAD_XMIT_XFRM,
-++	FLOW_OFFLOAD_XMIT_DIRECT,
-+ };
-+ 
-+ struct flow_offload_tuple {
-+@@ -120,8 +121,14 @@ struct flow_offload_tuple {
-+ 					xmit_type:2;
-+ 
-+ 	u16				mtu;
-+-
-+-	struct dst_entry		*dst_cache;
-++	union {
-++		struct dst_entry	*dst_cache;
-++		struct {
-++			u32		ifidx;
-++			u8		h_source[ETH_ALEN];
-++			u8		h_dest[ETH_ALEN];
-++		} out;
-++	};
-+ };
-+ 
-+ struct flow_offload_tuple_rhash {
-+@@ -168,6 +175,11 @@ struct nf_flow_route {
-+ 		struct {
-+ 			u32			ifindex;
-+ 		} in;
-++		struct {
-++			u32			ifindex;
-++			u8			h_source[ETH_ALEN];
-++			u8			h_dest[ETH_ALEN];
-++		} out;
-+ 		enum flow_offload_xmit_type	xmit_type;
-+ 	} tuple[FLOW_OFFLOAD_DIR_MAX];
-+ };
-+--- a/net/netfilter/nf_flow_table_core.c
-++++ b/net/netfilter/nf_flow_table_core.c
-+@@ -81,9 +81,6 @@ static int flow_offload_fill_route(struc
-+ 	struct flow_offload_tuple *flow_tuple = &flow->tuplehash[dir].tuple;
-+ 	struct dst_entry *dst = route->tuple[dir].dst;
-+ 
-+-	if (!dst_hold_safe(route->tuple[dir].dst))
-+-		return -1;
-+-
-+ 	switch (flow_tuple->l3proto) {
-+ 	case NFPROTO_IPV4:
-+ 		flow_tuple->mtu = ip_dst_mtu_maybe_forward(dst, true);
-+@@ -94,12 +91,36 @@ static int flow_offload_fill_route(struc
-+ 	}
-+ 
-+ 	flow_tuple->iifidx = route->tuple[dir].in.ifindex;
-++
-++	switch (route->tuple[dir].xmit_type) {
-++	case FLOW_OFFLOAD_XMIT_DIRECT:
-++		memcpy(flow_tuple->out.h_dest, route->tuple[dir].out.h_dest,
-++		       ETH_ALEN);
-++		memcpy(flow_tuple->out.h_source, route->tuple[dir].out.h_source,
-++		       ETH_ALEN);
-++		flow_tuple->out.ifidx = route->tuple[dir].out.ifindex;
-++		break;
-++	case FLOW_OFFLOAD_XMIT_XFRM:
-++	case FLOW_OFFLOAD_XMIT_NEIGH:
-++		if (!dst_hold_safe(route->tuple[dir].dst))
-++			return -1;
-++
-++		flow_tuple->dst_cache = dst;
-++		break;
-++	}
-+ 	flow_tuple->xmit_type = route->tuple[dir].xmit_type;
-+-	flow_tuple->dst_cache = dst;
-+ 
-+ 	return 0;
-+ }
-+ 
-++static void nft_flow_dst_release(struct flow_offload *flow,
-++				 enum flow_offload_tuple_dir dir)
-++{
-++	if (flow->tuplehash[dir].tuple.xmit_type == FLOW_OFFLOAD_XMIT_NEIGH ||
-++	    flow->tuplehash[dir].tuple.xmit_type == FLOW_OFFLOAD_XMIT_XFRM)
-++		dst_release(flow->tuplehash[dir].tuple.dst_cache);
-++}
-++
-+ int flow_offload_route_init(struct flow_offload *flow,
-+ 			    const struct nf_flow_route *route)
-+ {
-+@@ -118,7 +139,7 @@ int flow_offload_route_init(struct flow_
-+ 	return 0;
-+ 
-+ err_route_reply:
-+-	dst_release(route->tuple[FLOW_OFFLOAD_DIR_ORIGINAL].dst);
-++	nft_flow_dst_release(flow, FLOW_OFFLOAD_DIR_ORIGINAL);
-+ 
-+ 	return err;
-+ }
-+@@ -169,8 +190,8 @@ static void flow_offload_fixup_ct(struct
-+ 
-+ static void flow_offload_route_release(struct flow_offload *flow)
-+ {
-+-	dst_release(flow->tuplehash[FLOW_OFFLOAD_DIR_ORIGINAL].tuple.dst_cache);
-+-	dst_release(flow->tuplehash[FLOW_OFFLOAD_DIR_REPLY].tuple.dst_cache);
-++	nft_flow_dst_release(flow, FLOW_OFFLOAD_DIR_ORIGINAL);
-++	nft_flow_dst_release(flow, FLOW_OFFLOAD_DIR_REPLY);
-+ }
-+ 
-+ void flow_offload_free(struct flow_offload *flow)
-+--- a/net/netfilter/nf_flow_table_ip.c
-++++ b/net/netfilter/nf_flow_table_ip.c
-+@@ -248,6 +248,24 @@ static unsigned int nf_flow_xmit_xfrm(st
-+ 	return NF_STOLEN;
-+ }
-+ 
-++static unsigned int nf_flow_queue_xmit(struct net *net, struct sk_buff *skb,
-++				       const struct flow_offload_tuple_rhash *tuplehash,
-++				       unsigned short type)
-++{
-++	struct net_device *outdev;
-++
-++	outdev = dev_get_by_index_rcu(net, tuplehash->tuple.out.ifidx);
-++	if (!outdev)
-++		return NF_DROP;
-++
-++	skb->dev = outdev;
-++	dev_hard_header(skb, skb->dev, type, tuplehash->tuple.out.h_dest,
-++			tuplehash->tuple.out.h_source, skb->len);
-++	dev_queue_xmit(skb);
-++
-++	return NF_STOLEN;
-++}
-++
-+ unsigned int
-+ nf_flow_offload_ip_hook(void *priv, struct sk_buff *skb,
-+ 			const struct nf_hook_state *state)
-+@@ -262,6 +280,7 @@ nf_flow_offload_ip_hook(void *priv, stru
-+ 	unsigned int thoff;
-+ 	struct iphdr *iph;
-+ 	__be32 nexthop;
-++	int ret;
-+ 
-+ 	if (skb->protocol != htons(ETH_P_IP))
-+ 		return NF_ACCEPT;
-+@@ -303,22 +322,32 @@ nf_flow_offload_ip_hook(void *priv, stru
-+ 	if (flow_table->flags & NF_FLOWTABLE_COUNTER)
-+ 		nf_ct_acct_update(flow->ct, tuplehash->tuple.dir, skb->len);
-+ 
-+-	rt = (struct rtable *)tuplehash->tuple.dst_cache;
-+-
-+ 	if (unlikely(tuplehash->tuple.xmit_type == FLOW_OFFLOAD_XMIT_XFRM)) {
-++		rt = (struct rtable *)tuplehash->tuple.dst_cache;
-+ 		memset(skb->cb, 0, sizeof(struct inet_skb_parm));
-+ 		IPCB(skb)->iif = skb->dev->ifindex;
-+ 		IPCB(skb)->flags = IPSKB_FORWARDED;
-+ 		return nf_flow_xmit_xfrm(skb, state, &rt->dst);
-+ 	}
-+ 
-+-	outdev = rt->dst.dev;
-+-	skb->dev = outdev;
-+-	nexthop = rt_nexthop(rt, flow->tuplehash[!dir].tuple.src_v4.s_addr);
-+-	skb_dst_set_noref(skb, &rt->dst);
-+-	neigh_xmit(NEIGH_ARP_TABLE, outdev, &nexthop, skb);
-++	switch (tuplehash->tuple.xmit_type) {
-++	case FLOW_OFFLOAD_XMIT_NEIGH:
-++		rt = (struct rtable *)tuplehash->tuple.dst_cache;
-++		outdev = rt->dst.dev;
-++		skb->dev = outdev;
-++		nexthop = rt_nexthop(rt, flow->tuplehash[!dir].tuple.src_v4.s_addr);
-++		skb_dst_set_noref(skb, &rt->dst);
-++		neigh_xmit(NEIGH_ARP_TABLE, outdev, &nexthop, skb);
-++		ret = NF_STOLEN;
-++		break;
-++	case FLOW_OFFLOAD_XMIT_DIRECT:
-++		ret = nf_flow_queue_xmit(state->net, skb, tuplehash, ETH_P_IP);
-++		if (ret == NF_DROP)
-++			flow_offload_teardown(flow);
-++		break;
-++	}
-+ 
-+-	return NF_STOLEN;
-++	return ret;
-+ }
-+ EXPORT_SYMBOL_GPL(nf_flow_offload_ip_hook);
-+ 
-+@@ -504,6 +533,7 @@ nf_flow_offload_ipv6_hook(void *priv, st
-+ 	struct net_device *outdev;
-+ 	struct ipv6hdr *ip6h;
-+ 	struct rt6_info *rt;
-++	int ret;
-+ 
-+ 	if (skb->protocol != htons(ETH_P_IPV6))
-+ 		return NF_ACCEPT;
-+@@ -545,21 +575,31 @@ nf_flow_offload_ipv6_hook(void *priv, st
-+ 	if (flow_table->flags & NF_FLOWTABLE_COUNTER)
-+ 		nf_ct_acct_update(flow->ct, tuplehash->tuple.dir, skb->len);
-+ 
-+-	rt = (struct rt6_info *)tuplehash->tuple.dst_cache;
-+-
-+ 	if (unlikely(tuplehash->tuple.xmit_type == FLOW_OFFLOAD_XMIT_XFRM)) {
-++		rt = (struct rt6_info *)tuplehash->tuple.dst_cache;
-+ 		memset(skb->cb, 0, sizeof(struct inet6_skb_parm));
-+ 		IP6CB(skb)->iif = skb->dev->ifindex;
-+ 		IP6CB(skb)->flags = IP6SKB_FORWARDED;
-+ 		return nf_flow_xmit_xfrm(skb, state, &rt->dst);
-+ 	}
-+ 
-+-	outdev = rt->dst.dev;
-+-	skb->dev = outdev;
-+-	nexthop = rt6_nexthop(rt, &flow->tuplehash[!dir].tuple.src_v6);
-+-	skb_dst_set_noref(skb, &rt->dst);
-+-	neigh_xmit(NEIGH_ND_TABLE, outdev, nexthop, skb);
-++	switch (tuplehash->tuple.xmit_type) {
-++	case FLOW_OFFLOAD_XMIT_NEIGH:
-++		rt = (struct rt6_info *)tuplehash->tuple.dst_cache;
-++		outdev = rt->dst.dev;
-++		skb->dev = outdev;
-++		nexthop = rt6_nexthop(rt, &flow->tuplehash[!dir].tuple.src_v6);
-++		skb_dst_set_noref(skb, &rt->dst);
-++		neigh_xmit(NEIGH_ND_TABLE, outdev, nexthop, skb);
-++		ret = NF_STOLEN;
-++		break;
-++	case FLOW_OFFLOAD_XMIT_DIRECT:
-++		ret = nf_flow_queue_xmit(state->net, skb, tuplehash, ETH_P_IPV6);
-++		if (ret == NF_DROP)
-++			flow_offload_teardown(flow);
-++		break;
-++	}
-+ 
-+-	return NF_STOLEN;
-++	return ret;
-+ }
-+ EXPORT_SYMBOL_GPL(nf_flow_offload_ipv6_hook);
-+--- a/net/netfilter/nft_flow_offload.c
-++++ b/net/netfilter/nft_flow_offload.c
-+@@ -39,12 +39,11 @@ static void nft_default_forward_path(str
-+ static int nft_dev_fill_forward_path(const struct nf_flow_route *route,
-+ 				     const struct dst_entry *dst_cache,
-+ 				     const struct nf_conn *ct,
-+-				     enum ip_conntrack_dir dir,
-++				     enum ip_conntrack_dir dir, u8 *ha,
-+ 				     struct net_device_path_stack *stack)
-+ {
-+ 	const void *daddr = &ct->tuplehash[!dir].tuple.src.u3;
-+ 	struct net_device *dev = dst_cache->dev;
-+-	unsigned char ha[ETH_ALEN];
-+ 	struct neighbour *n;
-+ 	u8 nud_state;
-+ 
-+@@ -66,27 +65,43 @@ static int nft_dev_fill_forward_path(con
-+ 
-+ struct nft_forward_info {
-+ 	const struct net_device *indev;
-++	const struct net_device *outdev;
-++	u8 h_source[ETH_ALEN];
-++	u8 h_dest[ETH_ALEN];
-++	enum flow_offload_xmit_type xmit_type;
-+ };
-+ 
-+ static void nft_dev_path_info(const struct net_device_path_stack *stack,
-+-			      struct nft_forward_info *info)
-++			      struct nft_forward_info *info,
-++			      unsigned char *ha)
-+ {
-+ 	const struct net_device_path *path;
-+ 	int i;
-+ 
-++	memcpy(info->h_dest, ha, ETH_ALEN);
-++
-+ 	for (i = 0; i < stack->num_paths; i++) {
-+ 		path = &stack->path[i];
-+ 		switch (path->type) {
-+ 		case DEV_PATH_ETHERNET:
-+ 			info->indev = path->dev;
-++			if (is_zero_ether_addr(info->h_source))
-++				memcpy(info->h_source, path->dev->dev_addr, ETH_ALEN);
-+ 			break;
-+-		case DEV_PATH_VLAN:
-+ 		case DEV_PATH_BRIDGE:
-++			if (is_zero_ether_addr(info->h_source))
-++				memcpy(info->h_source, path->dev->dev_addr, ETH_ALEN);
-++
-++			info->xmit_type = FLOW_OFFLOAD_XMIT_DIRECT;
-++			break;
-++		case DEV_PATH_VLAN:
-+ 		default:
-+ 			info->indev = NULL;
-+ 			break;
-+ 		}
-+ 	}
-++	if (!info->outdev)
-++		info->outdev = info->indev;
-+ }
-+ 
-+ static bool nft_flowtable_find_dev(const struct net_device *dev,
-+@@ -114,14 +129,22 @@ static void nft_dev_forward_path(struct
-+ 	const struct dst_entry *dst = route->tuple[dir].dst;
-+ 	struct net_device_path_stack stack;
-+ 	struct nft_forward_info info = {};
-++	unsigned char ha[ETH_ALEN];
-+ 
-+-	if (nft_dev_fill_forward_path(route, dst, ct, dir, &stack) >= 0)
-+-		nft_dev_path_info(&stack, &info);
-++	if (nft_dev_fill_forward_path(route, dst, ct, dir, ha, &stack) >= 0)
-++		nft_dev_path_info(&stack, &info, ha);
-+ 
-+ 	if (!info.indev || !nft_flowtable_find_dev(info.indev, ft))
-+ 		return;
-+ 
-+ 	route->tuple[!dir].in.ifindex = info.indev->ifindex;
-++
-++	if (info.xmit_type == FLOW_OFFLOAD_XMIT_DIRECT) {
-++		memcpy(route->tuple[dir].out.h_source, info.h_source, ETH_ALEN);
-++		memcpy(route->tuple[dir].out.h_dest, info.h_dest, ETH_ALEN);
-++		route->tuple[dir].out.ifindex = info.outdev->ifindex;
-++		route->tuple[dir].xmit_type = info.xmit_type;
-++	}
-+ }
-+ 
-+ static int nft_flow_route(const struct nft_pktinfo *pkt,
-diff --git a/target/linux/generic/pending-5.10/640-07-netfilter-flowtable-add-vlan-support.patch b/target/linux/generic/pending-5.10/640-07-netfilter-flowtable-add-vlan-support.patch
-new file mode 100644
-index 0000000000..fea1b59dc3
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-07-netfilter-flowtable-add-vlan-support.patch
-@@ -0,0 +1,391 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Fri, 20 Nov 2020 13:49:20 +0100
-+Subject: [PATCH] netfilter: flowtable: add vlan support
-+
-+Add the vlan id and protocol to the flow tuple to uniquely identify
-+flows from the receive path. For the transmit path, dev_hard_header() on
-+the vlan device push the headers. This patch includes support for two
-+VLAN headers (QinQ) from the ingress path.
-+
-+Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
-+---
-+
-+--- a/include/net/netfilter/nf_flow_table.h
-++++ b/include/net/netfilter/nf_flow_table.h
-+@@ -95,6 +95,8 @@ enum flow_offload_xmit_type {
-+ 	FLOW_OFFLOAD_XMIT_DIRECT,
-+ };
-+ 
-++#define NF_FLOW_TABLE_ENCAP_MAX		2
-++
-+ struct flow_offload_tuple {
-+ 	union {
-+ 		struct in_addr		src_v4;
-+@@ -113,13 +115,17 @@ struct flow_offload_tuple {
-+ 
-+ 	u8				l3proto;
-+ 	u8				l4proto;
-++	struct {
-++		u16			id;
-++		__be16			proto;
-++	} encap[NF_FLOW_TABLE_ENCAP_MAX];
-+ 
-+ 	/* All members above are keys for lookups, see flow_offload_hash(). */
-+ 	struct { }			__hash;
-+ 
-+-	u8				dir:6,
-+-					xmit_type:2;
-+-
-++	u8				dir:4,
-++					xmit_type:2,
-++					encap_num:2;
-+ 	u16				mtu;
-+ 	union {
-+ 		struct dst_entry	*dst_cache;
-+@@ -174,6 +180,11 @@ struct nf_flow_route {
-+ 		struct dst_entry		*dst;
-+ 		struct {
-+ 			u32			ifindex;
-++			struct {
-++				u16		id;
-++				__be16		proto;
-++			} encap[NF_FLOW_TABLE_ENCAP_MAX];
-++			u8			num_encaps;
-+ 		} in;
-+ 		struct {
-+ 			u32			ifindex;
-+--- a/net/netfilter/nf_flow_table_core.c
-++++ b/net/netfilter/nf_flow_table_core.c
-+@@ -80,6 +80,7 @@ static int flow_offload_fill_route(struc
-+ {
-+ 	struct flow_offload_tuple *flow_tuple = &flow->tuplehash[dir].tuple;
-+ 	struct dst_entry *dst = route->tuple[dir].dst;
-++	int i, j = 0;
-+ 
-+ 	switch (flow_tuple->l3proto) {
-+ 	case NFPROTO_IPV4:
-+@@ -91,6 +92,12 @@ static int flow_offload_fill_route(struc
-+ 	}
-+ 
-+ 	flow_tuple->iifidx = route->tuple[dir].in.ifindex;
-++	for (i = route->tuple[dir].in.num_encaps - 1; i >= 0; i--) {
-++		flow_tuple->encap[j].id = route->tuple[dir].in.encap[i].id;
-++		flow_tuple->encap[j].proto = route->tuple[dir].in.encap[i].proto;
-++		j++;
-++	}
-++	flow_tuple->encap_num = route->tuple[dir].in.num_encaps;
-+ 
-+ 	switch (route->tuple[dir].xmit_type) {
-+ 	case FLOW_OFFLOAD_XMIT_DIRECT:
-+--- a/net/netfilter/nf_flow_table_ip.c
-++++ b/net/netfilter/nf_flow_table_ip.c
-+@@ -159,17 +159,38 @@ static bool ip_has_options(unsigned int
-+ 	return thoff != sizeof(struct iphdr);
-+ }
-+ 
-++static void nf_flow_tuple_encap(struct sk_buff *skb,
-++				struct flow_offload_tuple *tuple)
-++{
-++	int i = 0;
-++
-++	if (skb_vlan_tag_present(skb)) {
-++		tuple->encap[i].id = skb_vlan_tag_get(skb);
-++		tuple->encap[i].proto = skb->vlan_proto;
-++		i++;
-++	}
-++	if (skb->protocol == htons(ETH_P_8021Q)) {
-++		struct vlan_ethhdr *veth = (struct vlan_ethhdr *)skb_mac_header(skb);
-++
-++		tuple->encap[i].id = ntohs(veth->h_vlan_TCI);
-++		tuple->encap[i].proto = skb->protocol;
-++	}
-++}
-++
-+ static int nf_flow_tuple_ip(struct sk_buff *skb, const struct net_device *dev,
-+ 			    struct flow_offload_tuple *tuple)
-+ {
-+-	unsigned int thoff, hdrsize;
-++	unsigned int thoff, hdrsize, offset = 0;
-+ 	struct flow_ports *ports;
-+ 	struct iphdr *iph;
-+ 
-+-	if (!pskb_may_pull(skb, sizeof(*iph)))
-++	if (skb->protocol == htons(ETH_P_8021Q))
-++		offset += VLAN_HLEN;
-++
-++	if (!pskb_may_pull(skb, sizeof(*iph) + offset))
-+ 		return -1;
-+ 
-+-	iph = ip_hdr(skb);
-++	iph = (struct iphdr *)(skb_network_header(skb) + offset);
-+ 	thoff = iph->ihl * 4;
-+ 
-+ 	if (ip_is_fragment(iph) ||
-+@@ -191,11 +212,11 @@ static int nf_flow_tuple_ip(struct sk_bu
-+ 		return -1;
-+ 
-+ 	thoff = iph->ihl * 4;
-+-	if (!pskb_may_pull(skb, thoff + hdrsize))
-++	if (!pskb_may_pull(skb, thoff + hdrsize + offset))
-+ 		return -1;
-+ 
-+-	iph = ip_hdr(skb);
-+-	ports = (struct flow_ports *)(skb_network_header(skb) + thoff);
-++	iph = (struct iphdr *)(skb_network_header(skb) + offset);
-++	ports = (struct flow_ports *)(skb_network_header(skb) + thoff + offset);
-+ 
-+ 	tuple->src_v4.s_addr	= iph->saddr;
-+ 	tuple->dst_v4.s_addr	= iph->daddr;
-+@@ -204,6 +225,7 @@ static int nf_flow_tuple_ip(struct sk_bu
-+ 	tuple->l3proto		= AF_INET;
-+ 	tuple->l4proto		= iph->protocol;
-+ 	tuple->iifidx		= dev->ifindex;
-++	nf_flow_tuple_encap(skb, tuple);
-+ 
-+ 	return 0;
-+ }
-+@@ -248,6 +270,40 @@ static unsigned int nf_flow_xmit_xfrm(st
-+ 	return NF_STOLEN;
-+ }
-+ 
-++static bool nf_flow_skb_encap_protocol(const struct sk_buff *skb, __be16 proto)
-++{
-++	if (skb->protocol == htons(ETH_P_8021Q)) {
-++		struct vlan_ethhdr *veth;
-++
-++		veth = (struct vlan_ethhdr *)skb_mac_header(skb);
-++		if (veth->h_vlan_encapsulated_proto == proto)
-++			return true;
-++	}
-++
-++	return false;
-++}
-++
-++static void nf_flow_encap_pop(struct sk_buff *skb,
-++			      struct flow_offload_tuple_rhash *tuplehash)
-++{
-++	struct vlan_hdr *vlan_hdr;
-++	int i;
-++
-++	for (i = 0; i < tuplehash->tuple.encap_num; i++) {
-++		if (skb_vlan_tag_present(skb)) {
-++			__vlan_hwaccel_clear_tag(skb);
-++			continue;
-++		}
-++		if (skb->protocol == htons(ETH_P_8021Q)) {
-++			vlan_hdr = (struct vlan_hdr *)skb->data;
-++			__skb_pull(skb, VLAN_HLEN);
-++			vlan_set_encap_proto(skb, vlan_hdr);
-++			skb_reset_network_header(skb);
-++			break;
-++		}
-++	}
-++}
-++
-+ static unsigned int nf_flow_queue_xmit(struct net *net, struct sk_buff *skb,
-+ 				       const struct flow_offload_tuple_rhash *tuplehash,
-+ 				       unsigned short type)
-+@@ -276,13 +332,15 @@ nf_flow_offload_ip_hook(void *priv, stru
-+ 	enum flow_offload_tuple_dir dir;
-+ 	struct flow_offload *flow;
-+ 	struct net_device *outdev;
-++	unsigned int thoff, mtu;
-+ 	struct rtable *rt;
-+-	unsigned int thoff;
-+ 	struct iphdr *iph;
-+ 	__be32 nexthop;
-++	u32 offset = 0;
-+ 	int ret;
-+ 
-+-	if (skb->protocol != htons(ETH_P_IP))
-++	if (skb->protocol != htons(ETH_P_IP) &&
-++	    !nf_flow_skb_encap_protocol(skb, htons(ETH_P_IP)))
-+ 		return NF_ACCEPT;
-+ 
-+ 	if (nf_flow_tuple_ip(skb, state->in, &tuple) < 0)
-+@@ -295,14 +353,19 @@ nf_flow_offload_ip_hook(void *priv, stru
-+ 	dir = tuplehash->tuple.dir;
-+ 	flow = container_of(tuplehash, struct flow_offload, tuplehash[dir]);
-+ 
-+-	if (unlikely(nf_flow_exceeds_mtu(skb, flow->tuplehash[dir].tuple.mtu)))
-++	mtu = flow->tuplehash[dir].tuple.mtu + offset;
-++	if (unlikely(nf_flow_exceeds_mtu(skb, mtu)))
-+ 		return NF_ACCEPT;
-+ 
-+-	if (skb_try_make_writable(skb, sizeof(*iph)))
-++	if (skb->protocol == htons(ETH_P_8021Q))
-++		offset += VLAN_HLEN;
-++
-++	if (skb_try_make_writable(skb, sizeof(*iph) + offset))
-+ 		return NF_DROP;
-+ 
-+-	thoff = ip_hdr(skb)->ihl * 4;
-+-	if (nf_flow_state_check(flow, ip_hdr(skb)->protocol, skb, thoff))
-++	iph = (struct iphdr *)(skb_network_header(skb) + offset);
-++	thoff = (iph->ihl * 4) + offset;
-++	if (nf_flow_state_check(flow, iph->protocol, skb, thoff))
-+ 		return NF_ACCEPT;
-+ 
-+ 	flow_offload_refresh(flow_table, flow);
-+@@ -312,6 +375,9 @@ nf_flow_offload_ip_hook(void *priv, stru
-+ 		return NF_ACCEPT;
-+ 	}
-+ 
-++	nf_flow_encap_pop(skb, tuplehash);
-++	thoff -= offset;
-++
-+ 	if (nf_flow_nat_ip(flow, skb, thoff, dir) < 0)
-+ 		return NF_DROP;
-+ 
-+@@ -479,14 +545,17 @@ static int nf_flow_nat_ipv6(const struct
-+ static int nf_flow_tuple_ipv6(struct sk_buff *skb, const struct net_device *dev,
-+ 			      struct flow_offload_tuple *tuple)
-+ {
-+-	unsigned int thoff, hdrsize;
-++	unsigned int thoff, hdrsize, offset = 0;
-+ 	struct flow_ports *ports;
-+ 	struct ipv6hdr *ip6h;
-+ 
-+-	if (!pskb_may_pull(skb, sizeof(*ip6h)))
-++	if (skb->protocol == htons(ETH_P_8021Q))
-++		offset += VLAN_HLEN;
-++
-++	if (!pskb_may_pull(skb, sizeof(*ip6h) + offset))
-+ 		return -1;
-+ 
-+-	ip6h = ipv6_hdr(skb);
-++	ip6h = (struct ipv6hdr *)(skb_network_header(skb) + offset);
-+ 
-+ 	switch (ip6h->nexthdr) {
-+ 	case IPPROTO_TCP:
-+@@ -503,11 +572,11 @@ static int nf_flow_tuple_ipv6(struct sk_
-+ 		return -1;
-+ 
-+ 	thoff = sizeof(*ip6h);
-+-	if (!pskb_may_pull(skb, thoff + hdrsize))
-++	if (!pskb_may_pull(skb, thoff + hdrsize + offset))
-+ 		return -1;
-+ 
-+-	ip6h = ipv6_hdr(skb);
-+-	ports = (struct flow_ports *)(skb_network_header(skb) + thoff);
-++	ip6h = (struct ipv6hdr *)(skb_network_header(skb) + offset);
-++	ports = (struct flow_ports *)(skb_network_header(skb) + thoff + offset);
-+ 
-+ 	tuple->src_v6		= ip6h->saddr;
-+ 	tuple->dst_v6		= ip6h->daddr;
-+@@ -516,6 +585,7 @@ static int nf_flow_tuple_ipv6(struct sk_
-+ 	tuple->l3proto		= AF_INET6;
-+ 	tuple->l4proto		= ip6h->nexthdr;
-+ 	tuple->iifidx		= dev->ifindex;
-++	nf_flow_tuple_encap(skb, tuple);
-+ 
-+ 	return 0;
-+ }
-+@@ -533,9 +603,12 @@ nf_flow_offload_ipv6_hook(void *priv, st
-+ 	struct net_device *outdev;
-+ 	struct ipv6hdr *ip6h;
-+ 	struct rt6_info *rt;
-++	unsigned int mtu;
-++	u32 offset = 0;
-+ 	int ret;
-+ 
-+-	if (skb->protocol != htons(ETH_P_IPV6))
-++	if (skb->protocol != htons(ETH_P_IPV6) &&
-++	    !nf_flow_skb_encap_protocol(skb, htons(ETH_P_IPV6)))
-+ 		return NF_ACCEPT;
-+ 
-+ 	if (nf_flow_tuple_ipv6(skb, state->in, &tuple) < 0)
-+@@ -548,11 +621,15 @@ nf_flow_offload_ipv6_hook(void *priv, st
-+ 	dir = tuplehash->tuple.dir;
-+ 	flow = container_of(tuplehash, struct flow_offload, tuplehash[dir]);
-+ 
-+-	if (unlikely(nf_flow_exceeds_mtu(skb, flow->tuplehash[dir].tuple.mtu)))
-++	mtu = flow->tuplehash[dir].tuple.mtu + offset;
-++	if (unlikely(nf_flow_exceeds_mtu(skb, mtu)))
-+ 		return NF_ACCEPT;
-+ 
-+-	if (nf_flow_state_check(flow, ipv6_hdr(skb)->nexthdr, skb,
-+-				sizeof(*ip6h)))
-++	if (skb->protocol == htons(ETH_P_8021Q))
-++		offset += VLAN_HLEN;
-++
-++	ip6h = (struct ipv6hdr *)(skb_network_header(skb) + offset);
-++	if (nf_flow_state_check(flow, ip6h->nexthdr, skb, sizeof(*ip6h)))
-+ 		return NF_ACCEPT;
-+ 
-+ 	flow_offload_refresh(flow_table, flow);
-+@@ -562,6 +639,8 @@ nf_flow_offload_ipv6_hook(void *priv, st
-+ 		return NF_ACCEPT;
-+ 	}
-+ 
-++	nf_flow_encap_pop(skb, tuplehash);
-++
-+ 	if (skb_try_make_writable(skb, sizeof(*ip6h)))
-+ 		return NF_DROP;
-+ 
-+--- a/net/netfilter/nft_flow_offload.c
-++++ b/net/netfilter/nft_flow_offload.c
-+@@ -66,6 +66,11 @@ static int nft_dev_fill_forward_path(con
-+ struct nft_forward_info {
-+ 	const struct net_device *indev;
-+ 	const struct net_device *outdev;
-++	struct id {
-++		__u16	id;
-++		__be16	proto;
-++	} encap[NF_FLOW_TABLE_ENCAP_MAX];
-++	u8 num_encaps;
-+ 	u8 h_source[ETH_ALEN];
-+ 	u8 h_dest[ETH_ALEN];
-+ 	enum flow_offload_xmit_type xmit_type;
-+@@ -84,9 +89,23 @@ static void nft_dev_path_info(const stru
-+ 		path = &stack->path[i];
-+ 		switch (path->type) {
-+ 		case DEV_PATH_ETHERNET:
-++		case DEV_PATH_VLAN:
-+ 			info->indev = path->dev;
-+ 			if (is_zero_ether_addr(info->h_source))
-+ 				memcpy(info->h_source, path->dev->dev_addr, ETH_ALEN);
-++
-++			if (path->type == DEV_PATH_ETHERNET)
-++				break;
-++
-++			/* DEV_PATH_VLAN */
-++			if (info->num_encaps >= NF_FLOW_TABLE_ENCAP_MAX) {
-++				info->indev = NULL;
-++				break;
-++			}
-++			info->outdev = path->dev;
-++			info->encap[info->num_encaps].id = path->encap.id;
-++			info->encap[info->num_encaps].proto = path->encap.proto;
-++			info->num_encaps++;
-+ 			break;
-+ 		case DEV_PATH_BRIDGE:
-+ 			if (is_zero_ether_addr(info->h_source))
-+@@ -94,7 +113,6 @@ static void nft_dev_path_info(const stru
-+ 
-+ 			info->xmit_type = FLOW_OFFLOAD_XMIT_DIRECT;
-+ 			break;
-+-		case DEV_PATH_VLAN:
-+ 		default:
-+ 			info->indev = NULL;
-+ 			break;
-+@@ -130,6 +148,7 @@ static void nft_dev_forward_path(struct
-+ 	struct net_device_path_stack stack;
-+ 	struct nft_forward_info info = {};
-+ 	unsigned char ha[ETH_ALEN];
-++	int i;
-+ 
-+ 	if (nft_dev_fill_forward_path(route, dst, ct, dir, ha, &stack) >= 0)
-+ 		nft_dev_path_info(&stack, &info, ha);
-+@@ -138,6 +157,11 @@ static void nft_dev_forward_path(struct
-+ 		return;
-+ 
-+ 	route->tuple[!dir].in.ifindex = info.indev->ifindex;
-++	for (i = 0; i < info.num_encaps; i++) {
-++		route->tuple[!dir].in.encap[i].id = info.encap[i].id;
-++		route->tuple[!dir].in.encap[i].proto = info.encap[i].proto;
-++	}
-++	route->tuple[!dir].in.num_encaps = info.num_encaps;
-+ 
-+ 	if (info.xmit_type == FLOW_OFFLOAD_XMIT_DIRECT) {
-+ 		memcpy(route->tuple[dir].out.h_source, info.h_source, ETH_ALEN);
-diff --git a/target/linux/generic/pending-5.10/640-08-selftests-netfilter-flowtable-bridge-and-VLAN-suppor.patch b/target/linux/generic/pending-5.10/640-08-selftests-netfilter-flowtable-bridge-and-VLAN-suppor.patch
-new file mode 100644
-index 0000000000..1ee015c6aa
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-08-selftests-netfilter-flowtable-bridge-and-VLAN-suppor.patch
-@@ -0,0 +1,107 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Fri, 20 Nov 2020 13:49:21 +0100
-+Subject: [PATCH] selftests: netfilter: flowtable bridge and VLAN support
-+
-+This patch adds two new tests to cover bridge and VLAN support:
-+
-+- Add a bridge device to the Router1 (nsr1) container and attach the
-+  veth0 device to the bridge. Set the IP address to the bridge device
-+  to exercise the bridge forwarding path.
-+
-+- Add VLAN encapsulation between to the bridge device in the Router1 and
-+  one of the sender containers (ns1).
-+
-+Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
-+---
-+
-+--- a/tools/testing/selftests/netfilter/nft_flowtable.sh
-++++ b/tools/testing/selftests/netfilter/nft_flowtable.sh
-+@@ -371,6 +371,88 @@ else
-+ 	ip netns exec nsr1 nft list ruleset
-+ fi
-+ 
-++# Another test:
-++# Add bridge interface br0 to Router1, with NAT enabled.
-++ip -net nsr1 link add name br0 type bridge
-++ip -net nsr1 addr flush dev veth0
-++ip -net nsr1 link set up dev veth0
-++ip -net nsr1 link set veth0 master br0
-++ip -net nsr1 addr add 10.0.1.1/24 dev br0
-++ip -net nsr1 addr add dead:1::1/64 dev br0
-++ip -net nsr1 link set up dev br0
-++
-++ip netns exec nsr1 sysctl net.ipv4.conf.br0.forwarding=1 > /dev/null
-++
-++# br0 with NAT enabled.
-++ip netns exec nsr1 nft -f - <<EOF
-++flush table ip nat
-++table ip nat {
-++   chain prerouting {
-++      type nat hook prerouting priority 0; policy accept;
-++      meta iif "br0" ip daddr 10.6.6.6 tcp dport 1666 counter dnat ip to 10.0.2.99:12345
-++   }
-++
-++   chain postrouting {
-++      type nat hook postrouting priority 0; policy accept;
-++      meta oifname "veth1" counter masquerade
-++   }
-++}
-++EOF
-++
-++if test_tcp_forwarding_nat ns1 ns2; then
-++	echo "PASS: flow offloaded for ns1/ns2 with bridge NAT"
-++else
-++	echo "FAIL: flow offload for ns1/ns2 with bridge NAT" 1>&2
-++	ip netns exec nsr1 nft list ruleset
-++	ret=1
-++fi
-++
-++# Another test:
-++# Add bridge interface br0 to Router1, with NAT and VLAN.
-++ip -net nsr1 link set veth0 nomaster
-++ip -net nsr1 link set down dev veth0
-++ip -net nsr1 link add link veth0 name veth0.10 type vlan id 10
-++ip -net nsr1 link set up dev veth0
-++ip -net nsr1 link set up dev veth0.10
-++ip -net nsr1 link set veth0.10 master br0
-++
-++ip -net ns1 addr flush dev eth0
-++ip -net ns1 link add link eth0 name eth0.10 type vlan id 10
-++ip -net ns1 link set eth0 up
-++ip -net ns1 link set eth0.10 up
-++ip -net ns1 addr add 10.0.1.99/24 dev eth0.10
-++ip -net ns1 route add default via 10.0.1.1
-++ip -net ns1 addr add dead:1::99/64 dev eth0.10
-++
-++if test_tcp_forwarding_nat ns1 ns2; then
-++	echo "PASS: flow offloaded for ns1/ns2 with bridge NAT and VLAN"
-++else
-++	echo "FAIL: flow offload for ns1/ns2 with bridge NAT and VLAN" 1>&2
-++	ip netns exec nsr1 nft list ruleset
-++	ret=1
-++fi
-++
-++# restore test topology (remove bridge and VLAN)
-++ip -net nsr1 link set veth0 nomaster
-++ip -net nsr1 link set veth0 down
-++ip -net nsr1 link set veth0.10 down
-++ip -net nsr1 link delete veth0.10 type vlan
-++ip -net nsr1 link delete br0 type bridge
-++ip -net ns1 addr flush dev eth0.10
-++ip -net ns1 link set eth0.10 down
-++ip -net ns1 link set eth0 down
-++ip -net ns1 link delete eth0.10 type vlan
-++
-++# restore address in ns1 and nsr1
-++ip -net ns1 link set eth0 up
-++ip -net ns1 addr add 10.0.1.99/24 dev eth0
-++ip -net ns1 route add default via 10.0.1.1
-++ip -net ns1 addr add dead:1::99/64 dev eth0
-++ip -net ns1 route add default via dead:1::1
-++ip -net nsr1 addr add 10.0.1.1/24 dev veth0
-++ip -net nsr1 addr add dead:1::1/64 dev veth0
-++ip -net nsr1 link set up dev veth0
-++
-+ KEY_SHA="0x"$(ps -xaf | sha1sum | cut -d " " -f 1)
-+ KEY_AES="0x"$(ps -xaf | md5sum | cut -d " " -f 1)
-+ SPI1=$RANDOM
-diff --git a/target/linux/generic/pending-5.10/640-09-net-bridge-resolve-VLAN-tag-actions-in-forwarding-pa.patch b/target/linux/generic/pending-5.10/640-09-net-bridge-resolve-VLAN-tag-actions-in-forwarding-pa.patch
-new file mode 100644
-index 0000000000..8f8d58b299
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-09-net-bridge-resolve-VLAN-tag-actions-in-forwarding-pa.patch
-@@ -0,0 +1,207 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Mon, 7 Dec 2020 20:31:45 +0100
-+Subject: [PATCH] net: bridge: resolve VLAN tag actions in forwarding
-+ path for bridge devices
-+
-+Depending on the VLAN settings of the bridge and the port, the bridge can
-+either add or remove a tag. When vlan filtering is enabled, the fdb lookup
-+also needs to know the VLAN tag/proto for the destination address
-+To provide this, keep track of the stack of VLAN tags for the path in the
-+lookup context
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
-+---
-+
-+--- a/include/linux/netdevice.h
-++++ b/include/linux/netdevice.h
-+@@ -841,10 +841,20 @@ struct net_device_path {
-+ 			u16		id;
-+ 			__be16		proto;
-+ 		} encap;
-++		struct {
-++			enum {
-++				DEV_PATH_BR_VLAN_KEEP,
-++				DEV_PATH_BR_VLAN_TAG,
-++				DEV_PATH_BR_VLAN_UNTAG,
-++			}		vlan_mode;
-++			u16		vlan_id;
-++			__be16		vlan_proto;
-++		} bridge;
-+ 	};
-+ };
-+ 
-+ #define NET_DEVICE_PATH_STACK_MAX	5
-++#define NET_DEVICE_PATH_VLAN_MAX	2
-+ 
-+ struct net_device_path_stack {
-+ 	int			num_paths;
-+@@ -854,6 +864,12 @@ struct net_device_path_stack {
-+ struct net_device_path_ctx {
-+ 	const struct net_device *dev;
-+ 	const u8		*daddr;
-++
-++	int			num_vlans;
-++	struct {
-++		u16		id;
-++		__be16		proto;
-++	} vlan[NET_DEVICE_PATH_VLAN_MAX];
-+ };
-+ 
-+ enum tc_setup_type {
-+--- a/net/8021q/vlan_dev.c
-++++ b/net/8021q/vlan_dev.c
-+@@ -777,6 +777,12 @@ static int vlan_dev_fill_forward_path(st
-+ 	path->encap.proto = vlan->vlan_proto;
-+ 	path->dev = ctx->dev;
-+ 	ctx->dev = vlan->real_dev;
-++	if (ctx->num_vlans >= ARRAY_SIZE(ctx->vlan))
-++		return -ENOSPC;
-++
-++	ctx->vlan[ctx->num_vlans].id = vlan->vlan_id;
-++	ctx->vlan[ctx->num_vlans].proto = vlan->vlan_proto;
-++	ctx->num_vlans++;
-+ 
-+ 	return 0;
-+ }
-+--- a/net/bridge/br_device.c
-++++ b/net/bridge/br_device.c
-+@@ -409,7 +409,10 @@ static int br_fill_forward_path(struct n
-+ 		return -1;
-+ 
-+ 	br = netdev_priv(ctx->dev);
-+-	f = br_fdb_find_rcu(br, ctx->daddr, 0);
-++
-++	br_vlan_fill_forward_path_pvid(br, ctx, path);
-++
-++	f = br_fdb_find_rcu(br, ctx->daddr, path->bridge.vlan_id);
-+ 	if (!f || !f->dst)
-+ 		return -1;
-+ 
-+@@ -417,10 +420,28 @@ static int br_fill_forward_path(struct n
-+ 	if (!dst)
-+ 		return -1;
-+ 
-++	if (br_vlan_fill_forward_path_mode(br, dst, path))
-++		return -1;
-++
-+ 	path->type = DEV_PATH_BRIDGE;
-+ 	path->dev = dst->br->dev;
-+ 	ctx->dev = dst->dev;
-+ 
-++	switch (path->bridge.vlan_mode) {
-++	case DEV_PATH_BR_VLAN_TAG:
-++		if (ctx->num_vlans >= ARRAY_SIZE(ctx->vlan))
-++			return -ENOSPC;
-++		ctx->vlan[ctx->num_vlans].id = path->bridge.vlan_id;
-++		ctx->vlan[ctx->num_vlans].proto = path->bridge.vlan_proto;
-++		ctx->num_vlans++;
-++		break;
-++	case DEV_PATH_BR_VLAN_UNTAG:
-++		ctx->num_vlans--;
-++		break;
-++	case DEV_PATH_BR_VLAN_KEEP:
-++		break;
-++	}
-++
-+ 	return 0;
-+ }
-+ 
-+--- a/net/bridge/br_private.h
-++++ b/net/bridge/br_private.h
-+@@ -1095,6 +1095,13 @@ void br_vlan_notify(const struct net_bri
-+ bool br_vlan_can_enter_range(const struct net_bridge_vlan *v_curr,
-+ 			     const struct net_bridge_vlan *range_end);
-+ 
-++void br_vlan_fill_forward_path_pvid(struct net_bridge *br,
-++				    struct net_device_path_ctx *ctx,
-++				    struct net_device_path *path);
-++int br_vlan_fill_forward_path_mode(struct net_bridge *br,
-++				   struct net_bridge_port *dst,
-++				   struct net_device_path *path);
-++
-+ static inline struct net_bridge_vlan_group *br_vlan_group(
-+ 					const struct net_bridge *br)
-+ {
-+@@ -1252,6 +1259,19 @@ static inline int nbp_get_num_vlan_infos
-+ {
-+ 	return 0;
-+ }
-++
-++static inline void br_vlan_fill_forward_path_pvid(struct net_bridge *br,
-++						  struct net_device_path_ctx *ctx,
-++						  struct net_device_path *path)
-++{
-++}
-++
-++static inline int br_vlan_fill_forward_path_mode(struct net_bridge *br,
-++						 struct net_bridge_port *dst,
-++						 struct net_device_path *path)
-++{
-++	return 0;
-++}
-+ 
-+ static inline struct net_bridge_vlan_group *br_vlan_group(
-+ 					const struct net_bridge *br)
-+--- a/net/bridge/br_vlan.c
-++++ b/net/bridge/br_vlan.c
-+@@ -1327,6 +1327,59 @@ int br_vlan_get_pvid_rcu(const struct ne
-+ }
-+ EXPORT_SYMBOL_GPL(br_vlan_get_pvid_rcu);
-+ 
-++void br_vlan_fill_forward_path_pvid(struct net_bridge *br,
-++				    struct net_device_path_ctx *ctx,
-++				    struct net_device_path *path)
-++{
-++	struct net_bridge_vlan_group *vg;
-++	int idx = ctx->num_vlans - 1;
-++	u16 vid;
-++
-++	path->bridge.vlan_mode = DEV_PATH_BR_VLAN_KEEP;
-++
-++	if (!br_opt_get(br, BROPT_VLAN_ENABLED))
-++		return;
-++
-++	vg = br_vlan_group(br);
-++
-++	if (idx >= 0 &&
-++	    ctx->vlan[idx].proto == br->vlan_proto) {
-++		vid = ctx->vlan[idx].id;
-++	} else {
-++		path->bridge.vlan_mode = DEV_PATH_BR_VLAN_TAG;
-++		vid = br_get_pvid(vg);
-++	}
-++
-++	path->bridge.vlan_id = vid;
-++	path->bridge.vlan_proto = br->vlan_proto;
-++}
-++
-++int br_vlan_fill_forward_path_mode(struct net_bridge *br,
-++				   struct net_bridge_port *dst,
-++				   struct net_device_path *path)
-++{
-++	struct net_bridge_vlan_group *vg;
-++	struct net_bridge_vlan *v;
-++
-++	if (!br_opt_get(br, BROPT_VLAN_ENABLED))
-++		return 0;
-++
-++	vg = nbp_vlan_group_rcu(dst);
-++	v = br_vlan_find(vg, path->bridge.vlan_id);
-++	if (!v || !br_vlan_should_use(v))
-++		return -EINVAL;
-++
-++	if (!(v->flags & BRIDGE_VLAN_INFO_UNTAGGED))
-++		return 0;
-++
-++	if (path->bridge.vlan_mode == DEV_PATH_BR_VLAN_TAG)
-++		path->bridge.vlan_mode = DEV_PATH_BR_VLAN_KEEP;
-++	else
-++		path->bridge.vlan_mode = DEV_PATH_BR_VLAN_UNTAG;
-++
-++	return 0;
-++}
-++
-+ int br_vlan_get_info(const struct net_device *dev, u16 vid,
-+ 		     struct bridge_vlan_info *p_vinfo)
-+ {
-diff --git a/target/linux/generic/pending-5.10/640-10-netfilter-nft_flow_offload-add-bridge-vlan-filtering.patch b/target/linux/generic/pending-5.10/640-10-netfilter-nft_flow_offload-add-bridge-vlan-filtering.patch
-new file mode 100644
-index 0000000000..86fd6bf77b
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-10-netfilter-nft_flow_offload-add-bridge-vlan-filtering.patch
-@@ -0,0 +1,31 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Sun, 24 Jan 2021 18:01:34 +0100
-+Subject: [PATCH] netfilter: nft_flow_offload: add bridge vlan filtering
-+ support
-+
-+Add the vlan tag based when PVID is set on.
-+
-+Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
-+---
-+
-+--- a/net/netfilter/nft_flow_offload.c
-++++ b/net/netfilter/nft_flow_offload.c
-+@@ -111,6 +111,18 @@ static void nft_dev_path_info(const stru
-+ 			if (is_zero_ether_addr(info->h_source))
-+ 				memcpy(info->h_source, path->dev->dev_addr, ETH_ALEN);
-+ 
-++			switch (path->bridge.vlan_mode) {
-++			case DEV_PATH_BR_VLAN_TAG:
-++				info->encap[info->num_encaps].id = path->bridge.vlan_id;
-++				info->encap[info->num_encaps].proto = path->bridge.vlan_proto;
-++				info->num_encaps++;
-++				break;
-++			case DEV_PATH_BR_VLAN_UNTAG:
-++				info->num_encaps--;
-++				break;
-++			case DEV_PATH_BR_VLAN_KEEP:
-++				break;
-++			}
-+ 			info->xmit_type = FLOW_OFFLOAD_XMIT_DIRECT;
-+ 			break;
-+ 		default:
-diff --git a/target/linux/generic/pending-5.10/640-11-net-ppp-resolve-forwarding-path-for-bridge-pppoe-dev.patch b/target/linux/generic/pending-5.10/640-11-net-ppp-resolve-forwarding-path-for-bridge-pppoe-dev.patch
-new file mode 100644
-index 0000000000..88c89b27a0
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-11-net-ppp-resolve-forwarding-path-for-bridge-pppoe-dev.patch
-@@ -0,0 +1,100 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Tue, 2 Mar 2021 21:45:16 +0100
-+Subject: [PATCH] net: ppp: resolve forwarding path for bridge pppoe
-+ devices
-+
-+Pass on the PPPoE session ID and the real device.
-+---
-+
-+--- a/drivers/net/ppp/ppp_generic.c
-++++ b/drivers/net/ppp/ppp_generic.c
-+@@ -1450,12 +1450,34 @@ static void ppp_dev_priv_destructor(stru
-+ 		ppp_destroy_interface(ppp);
-+ }
-+ 
-++static int ppp_fill_forward_path(struct net_device_path_ctx *ctx,
-++				 struct net_device_path *path)
-++{
-++	struct ppp *ppp = netdev_priv(path->dev);
-++	struct ppp_channel *chan;
-++	struct channel *pch;
-++
-++	if (ppp->flags & SC_MULTILINK)
-++		return -EOPNOTSUPP;
-++
-++	if (list_empty(&ppp->channels))
-++		return -ENODEV;
-++
-++	pch = list_first_entry(&ppp->channels, struct channel, clist);
-++	chan = pch->chan;
-++	if (!chan->ops->fill_forward_path)
-++		return -EOPNOTSUPP;
-++
-++	return chan->ops->fill_forward_path(ctx, path, chan);
-++}
-++
-+ static const struct net_device_ops ppp_netdev_ops = {
-+ 	.ndo_init	 = ppp_dev_init,
-+ 	.ndo_uninit      = ppp_dev_uninit,
-+ 	.ndo_start_xmit  = ppp_start_xmit,
-+ 	.ndo_do_ioctl    = ppp_net_ioctl,
-+ 	.ndo_get_stats64 = ppp_get_stats64,
-++	.ndo_fill_forward_path = ppp_fill_forward_path,
-+ };
-+ 
-+ static struct device_type ppp_type = {
-+--- a/drivers/net/ppp/pppoe.c
-++++ b/drivers/net/ppp/pppoe.c
-+@@ -972,8 +972,30 @@ static int pppoe_xmit(struct ppp_channel
-+ 	return __pppoe_xmit(sk, skb);
-+ }
-+ 
-++static int pppoe_fill_forward_path(struct net_device_path_ctx *ctx,
-++				   struct net_device_path *path,
-++				   const struct ppp_channel *chan)
-++{
-++	struct sock *sk = (struct sock *)chan->private;
-++	struct pppox_sock *po = pppox_sk(sk);
-++	struct net_device *dev = po->pppoe_dev;
-++
-++	if (sock_flag(sk, SOCK_DEAD) ||
-++	    !(sk->sk_state & PPPOX_CONNECTED) || !dev)
-++		return -1;
-++
-++	path->type = DEV_PATH_PPPOE;
-++	path->encap.proto = htons(ETH_P_PPP_SES);
-++	path->encap.id = be16_to_cpu(po->num);
-++	path->dev = ctx->dev;
-++	ctx->dev = dev;
-++
-++	return 0;
-++}
-++
-+ static const struct ppp_channel_ops pppoe_chan_ops = {
-+ 	.start_xmit = pppoe_xmit,
-++	.fill_forward_path = pppoe_fill_forward_path,
-+ };
-+ 
-+ static int pppoe_recvmsg(struct socket *sock, struct msghdr *m,
-+--- a/include/linux/netdevice.h
-++++ b/include/linux/netdevice.h
-+@@ -831,6 +831,7 @@ enum net_device_path_type {
-+ 	DEV_PATH_ETHERNET = 0,
-+ 	DEV_PATH_VLAN,
-+ 	DEV_PATH_BRIDGE,
-++	DEV_PATH_PPPOE,
-+ };
-+ 
-+ struct net_device_path {
-+--- a/include/linux/ppp_channel.h
-++++ b/include/linux/ppp_channel.h
-+@@ -28,6 +28,9 @@ struct ppp_channel_ops {
-+ 	int	(*start_xmit)(struct ppp_channel *, struct sk_buff *);
-+ 	/* Handle an ioctl call that has come in via /dev/ppp. */
-+ 	int	(*ioctl)(struct ppp_channel *, unsigned int, unsigned long);
-++	int	(*fill_forward_path)(struct net_device_path_ctx *,
-++				     struct net_device_path *,
-++				     const struct ppp_channel *);
-+ };
-+ 
-+ struct ppp_channel {
-diff --git a/target/linux/generic/pending-5.10/640-12-net-dsa-resolve-forwarding-path-for-dsa-slave-ports.patch b/target/linux/generic/pending-5.10/640-12-net-dsa-resolve-forwarding-path-for-dsa-slave-ports.patch
-new file mode 100644
-index 0000000000..0b85742290
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-12-net-dsa-resolve-forwarding-path-for-dsa-slave-ports.patch
-@@ -0,0 +1,60 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Thu, 4 Mar 2021 23:19:06 +0100
-+Subject: [PATCH] net: dsa: resolve forwarding path for dsa slave ports
-+
-+Add .ndo_fill_forward_path for dsa slave port devices
-+---
-+
-+--- a/include/linux/netdevice.h
-++++ b/include/linux/netdevice.h
-+@@ -832,6 +832,7 @@ enum net_device_path_type {
-+ 	DEV_PATH_VLAN,
-+ 	DEV_PATH_BRIDGE,
-+ 	DEV_PATH_PPPOE,
-++	DEV_PATH_DSA,
-+ };
-+ 
-+ struct net_device_path {
-+@@ -851,6 +852,10 @@ struct net_device_path {
-+ 			u16		vlan_id;
-+ 			__be16		vlan_proto;
-+ 		} bridge;
-++		struct {
-++			int port;
-++			u16 proto;
-++		} dsa;
-+ 	};
-+ };
-+ 
-+--- a/net/dsa/slave.c
-++++ b/net/dsa/slave.c
-+@@ -1617,6 +1617,21 @@ static struct devlink_port *dsa_slave_ge
-+ 	return dp->ds->devlink ? &dp->devlink_port : NULL;
-+ }
-+ 
-++static int dsa_slave_fill_forward_path(struct net_device_path_ctx *ctx,
-++				       struct net_device_path *path)
-++{
-++	struct dsa_port *dp = dsa_slave_to_port(ctx->dev);
-++	struct dsa_port *cpu_dp = dp->cpu_dp;
-++
-++	path->dev = ctx->dev;
-++	path->type = DEV_PATH_DSA;
-++	path->dsa.proto = cpu_dp->tag_ops->proto;
-++	path->dsa.port = dp->index;
-++	ctx->dev = cpu_dp->master;
-++
-++	return 0;
-++}
-++
-+ static const struct net_device_ops dsa_slave_netdev_ops = {
-+ 	.ndo_open	 	= dsa_slave_open,
-+ 	.ndo_stop		= dsa_slave_close,
-+@@ -1642,6 +1657,7 @@ static const struct net_device_ops dsa_s
-+ 	.ndo_vlan_rx_kill_vid	= dsa_slave_vlan_rx_kill_vid,
-+ 	.ndo_get_devlink_port	= dsa_slave_get_devlink_port,
-+ 	.ndo_change_mtu		= dsa_slave_change_mtu,
-++	.ndo_fill_forward_path	= dsa_slave_fill_forward_path,
-+ };
-+ 
-+ static struct device_type dsa_type = {
-diff --git a/target/linux/generic/pending-5.10/640-13-netfilter-flowtable-add-pppoe-support.patch b/target/linux/generic/pending-5.10/640-13-netfilter-flowtable-add-pppoe-support.patch
-new file mode 100644
-index 0000000000..524f466bf9
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-13-netfilter-flowtable-add-pppoe-support.patch
-@@ -0,0 +1,263 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Mon, 1 Mar 2021 23:52:49 +0100
-+Subject: [PATCH] netfilter: flowtable: add pppoe support
-+
-+---
-+
-+--- a/drivers/net/ppp/ppp_generic.c
-++++ b/drivers/net/ppp/ppp_generic.c
-+@@ -1453,7 +1453,7 @@ static void ppp_dev_priv_destructor(stru
-+ static int ppp_fill_forward_path(struct net_device_path_ctx *ctx,
-+ 				 struct net_device_path *path)
-+ {
-+-	struct ppp *ppp = netdev_priv(path->dev);
-++	struct ppp *ppp = netdev_priv(ctx->dev);
-+ 	struct ppp_channel *chan;
-+ 	struct channel *pch;
-+ 
-+--- a/drivers/net/ppp/pppoe.c
-++++ b/drivers/net/ppp/pppoe.c
-+@@ -987,6 +987,7 @@ static int pppoe_fill_forward_path(struc
-+ 	path->type = DEV_PATH_PPPOE;
-+ 	path->encap.proto = htons(ETH_P_PPP_SES);
-+ 	path->encap.id = be16_to_cpu(po->num);
-++	memcpy(path->encap.h_dest, po->pppoe_pa.remote, ETH_ALEN);
-+ 	path->dev = ctx->dev;
-+ 	ctx->dev = dev;
-+ 
-+--- a/include/linux/netdevice.h
-++++ b/include/linux/netdevice.h
-+@@ -842,6 +842,7 @@ struct net_device_path {
-+ 		struct {
-+ 			u16		id;
-+ 			__be16		proto;
-++			u8		h_dest[ETH_ALEN];
-+ 		} encap;
-+ 		struct {
-+ 			enum {
-+--- a/net/netfilter/nf_flow_table_ip.c
-++++ b/net/netfilter/nf_flow_table_ip.c
-+@@ -7,6 +7,9 @@
-+ #include <linux/ip.h>
-+ #include <linux/ipv6.h>
-+ #include <linux/netdevice.h>
-++#include <linux/if_ether.h>
-++#include <linux/if_pppox.h>
-++#include <linux/ppp_defs.h>
-+ #include <net/ip.h>
-+ #include <net/ipv6.h>
-+ #include <net/ip6_route.h>
-+@@ -162,6 +165,8 @@ static bool ip_has_options(unsigned int
-+ static void nf_flow_tuple_encap(struct sk_buff *skb,
-+ 				struct flow_offload_tuple *tuple)
-+ {
-++	struct vlan_ethhdr *veth;
-++	struct pppoe_hdr *phdr;
-+ 	int i = 0;
-+ 
-+ 	if (skb_vlan_tag_present(skb)) {
-+@@ -169,23 +174,35 @@ static void nf_flow_tuple_encap(struct s
-+ 		tuple->encap[i].proto = skb->vlan_proto;
-+ 		i++;
-+ 	}
-+-	if (skb->protocol == htons(ETH_P_8021Q)) {
-+-		struct vlan_ethhdr *veth = (struct vlan_ethhdr *)skb_mac_header(skb);
-+-
-++	switch (skb->protocol) {
-++	case htons(ETH_P_8021Q):
-++		veth = (struct vlan_ethhdr *)skb_mac_header(skb);
-+ 		tuple->encap[i].id = ntohs(veth->h_vlan_TCI);
-+ 		tuple->encap[i].proto = skb->protocol;
-++		break;
-++	case htons(ETH_P_PPP_SES):
-++		phdr = (struct pppoe_hdr *)skb_mac_header(skb);
-++		tuple->encap[i].id = ntohs(phdr->sid);
-++		tuple->encap[i].proto = skb->protocol;
-++		break;
-+ 	}
-+ }
-+ 
-+ static int nf_flow_tuple_ip(struct sk_buff *skb, const struct net_device *dev,
-+-			    struct flow_offload_tuple *tuple)
-++			    struct flow_offload_tuple *tuple, u32 *nhoff)
-+ {
-+ 	unsigned int thoff, hdrsize, offset = 0;
-+ 	struct flow_ports *ports;
-+ 	struct iphdr *iph;
-+ 
-+-	if (skb->protocol == htons(ETH_P_8021Q))
-++	switch (skb->protocol) {
-++	case htons(ETH_P_8021Q):
-+ 		offset += VLAN_HLEN;
-++		break;
-++	case htons(ETH_P_PPP_SES):
-++		offset += PPPOE_SES_HLEN;
-++		break;
-++	}
-+ 
-+ 	if (!pskb_may_pull(skb, sizeof(*iph) + offset))
-+ 		return -1;
-+@@ -226,6 +243,7 @@ static int nf_flow_tuple_ip(struct sk_bu
-+ 	tuple->l4proto		= iph->protocol;
-+ 	tuple->iifidx		= dev->ifindex;
-+ 	nf_flow_tuple_encap(skb, tuple);
-++	*nhoff = offset;
-+ 
-+ 	return 0;
-+ }
-+@@ -270,14 +288,36 @@ static unsigned int nf_flow_xmit_xfrm(st
-+ 	return NF_STOLEN;
-+ }
-+ 
-++static inline __be16 nf_flow_pppoe_proto(const struct sk_buff *skb)
-++{
-++	__be16 proto;
-++
-++	proto = *((__be16 *)(skb_mac_header(skb) + ETH_HLEN +
-++			     sizeof(struct pppoe_hdr)));
-++	switch (proto) {
-++	case htons(PPP_IP):
-++		return htons(ETH_P_IP);
-++	case htons(PPP_IPV6):
-++		return htons(ETH_P_IPV6);
-++	}
-++
-++	return 0;
-++}
-++
-+ static bool nf_flow_skb_encap_protocol(const struct sk_buff *skb, __be16 proto)
-+ {
-+-	if (skb->protocol == htons(ETH_P_8021Q)) {
-+-		struct vlan_ethhdr *veth;
-++	struct vlan_ethhdr *veth;
-+ 
-++	switch (skb->protocol) {
-++	case htons(ETH_P_8021Q):
-+ 		veth = (struct vlan_ethhdr *)skb_mac_header(skb);
-+ 		if (veth->h_vlan_encapsulated_proto == proto)
-+ 			return true;
-++		break;
-++	case htons(ETH_P_PPP_SES):
-++		if (nf_flow_pppoe_proto(skb) == proto)
-++			return true;
-++		break;
-+ 	}
-+ 
-+ 	return false;
-+@@ -294,12 +334,18 @@ static void nf_flow_encap_pop(struct sk_
-+ 			__vlan_hwaccel_clear_tag(skb);
-+ 			continue;
-+ 		}
-+-		if (skb->protocol == htons(ETH_P_8021Q)) {
-++		switch (skb->protocol) {
-++		case htons(ETH_P_8021Q):
-+ 			vlan_hdr = (struct vlan_hdr *)skb->data;
-+ 			__skb_pull(skb, VLAN_HLEN);
-+ 			vlan_set_encap_proto(skb, vlan_hdr);
-+ 			skb_reset_network_header(skb);
-+ 			break;
-++		case htons(ETH_P_PPP_SES):
-++			skb->protocol = nf_flow_pppoe_proto(skb);
-++			skb_pull(skb, PPPOE_SES_HLEN);
-++			skb_reset_network_header(skb);
-++			break;
-+ 		}
-+ 	}
-+ }
-+@@ -343,7 +389,7 @@ nf_flow_offload_ip_hook(void *priv, stru
-+ 	    !nf_flow_skb_encap_protocol(skb, htons(ETH_P_IP)))
-+ 		return NF_ACCEPT;
-+ 
-+-	if (nf_flow_tuple_ip(skb, state->in, &tuple) < 0)
-++	if (nf_flow_tuple_ip(skb, state->in, &tuple, &offset) < 0)
-+ 		return NF_ACCEPT;
-+ 
-+ 	tuplehash = flow_offload_lookup(flow_table, &tuple);
-+@@ -357,9 +403,6 @@ nf_flow_offload_ip_hook(void *priv, stru
-+ 	if (unlikely(nf_flow_exceeds_mtu(skb, mtu)))
-+ 		return NF_ACCEPT;
-+ 
-+-	if (skb->protocol == htons(ETH_P_8021Q))
-+-		offset += VLAN_HLEN;
-+-
-+ 	if (skb_try_make_writable(skb, sizeof(*iph) + offset))
-+ 		return NF_DROP;
-+ 
-+@@ -543,14 +586,20 @@ static int nf_flow_nat_ipv6(const struct
-+ }
-+ 
-+ static int nf_flow_tuple_ipv6(struct sk_buff *skb, const struct net_device *dev,
-+-			      struct flow_offload_tuple *tuple)
-++			      struct flow_offload_tuple *tuple, u32 *nhoff)
-+ {
-+ 	unsigned int thoff, hdrsize, offset = 0;
-+ 	struct flow_ports *ports;
-+ 	struct ipv6hdr *ip6h;
-+ 
-+-	if (skb->protocol == htons(ETH_P_8021Q))
-++	switch (skb->protocol) {
-++	case htons(ETH_P_8021Q):
-+ 		offset += VLAN_HLEN;
-++		break;
-++	case htons(ETH_P_PPP_SES):
-++		offset += PPPOE_SES_HLEN;
-++		break;
-++	}
-+ 
-+ 	if (!pskb_may_pull(skb, sizeof(*ip6h) + offset))
-+ 		return -1;
-+@@ -586,6 +635,7 @@ static int nf_flow_tuple_ipv6(struct sk_
-+ 	tuple->l4proto		= ip6h->nexthdr;
-+ 	tuple->iifidx		= dev->ifindex;
-+ 	nf_flow_tuple_encap(skb, tuple);
-++	*nhoff = offset;
-+ 
-+ 	return 0;
-+ }
-+@@ -611,7 +661,7 @@ nf_flow_offload_ipv6_hook(void *priv, st
-+ 	    !nf_flow_skb_encap_protocol(skb, htons(ETH_P_IPV6)))
-+ 		return NF_ACCEPT;
-+ 
-+-	if (nf_flow_tuple_ipv6(skb, state->in, &tuple) < 0)
-++	if (nf_flow_tuple_ipv6(skb, state->in, &tuple, &offset) < 0)
-+ 		return NF_ACCEPT;
-+ 
-+ 	tuplehash = flow_offload_lookup(flow_table, &tuple);
-+@@ -625,9 +675,6 @@ nf_flow_offload_ipv6_hook(void *priv, st
-+ 	if (unlikely(nf_flow_exceeds_mtu(skb, mtu)))
-+ 		return NF_ACCEPT;
-+ 
-+-	if (skb->protocol == htons(ETH_P_8021Q))
-+-		offset += VLAN_HLEN;
-+-
-+ 	ip6h = (struct ipv6hdr *)(skb_network_header(skb) + offset);
-+ 	if (nf_flow_state_check(flow, ip6h->nexthdr, skb, sizeof(*ip6h)))
-+ 		return NF_ACCEPT;
-+--- a/net/netfilter/nft_flow_offload.c
-++++ b/net/netfilter/nft_flow_offload.c
-+@@ -90,6 +90,7 @@ static void nft_dev_path_info(const stru
-+ 		switch (path->type) {
-+ 		case DEV_PATH_ETHERNET:
-+ 		case DEV_PATH_VLAN:
-++		case DEV_PATH_PPPOE:
-+ 			info->indev = path->dev;
-+ 			if (is_zero_ether_addr(info->h_source))
-+ 				memcpy(info->h_source, path->dev->dev_addr, ETH_ALEN);
-+@@ -97,7 +98,7 @@ static void nft_dev_path_info(const stru
-+ 			if (path->type == DEV_PATH_ETHERNET)
-+ 				break;
-+ 
-+-			/* DEV_PATH_VLAN */
-++			/* DEV_PATH_VLAN and DEV_PATH_PPPOE */
-+ 			if (info->num_encaps >= NF_FLOW_TABLE_ENCAP_MAX) {
-+ 				info->indev = NULL;
-+ 				break;
-+@@ -106,6 +107,8 @@ static void nft_dev_path_info(const stru
-+ 			info->encap[info->num_encaps].id = path->encap.id;
-+ 			info->encap[info->num_encaps].proto = path->encap.proto;
-+ 			info->num_encaps++;
-++			if (path->type == DEV_PATH_PPPOE)
-++				memcpy(info->h_dest, path->encap.h_dest, ETH_ALEN);
-+ 			break;
-+ 		case DEV_PATH_BRIDGE:
-+ 			if (is_zero_ether_addr(info->h_source))
-diff --git a/target/linux/generic/pending-5.10/640-14-netfilter-nft_flow_offload-add-dsa-support.patch b/target/linux/generic/pending-5.10/640-14-netfilter-nft_flow_offload-add-dsa-support.patch
-new file mode 100644
-index 0000000000..7ff5dad1f7
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-14-netfilter-nft_flow_offload-add-dsa-support.patch
-@@ -0,0 +1,30 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Thu, 4 Mar 2021 19:22:55 +0100
-+Subject: [PATCH] netfilter: nft_flow_offload: add dsa support
-+
-+Replace the master ethernet device by the dsa slave port.
-+
-+Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
-+---
-+
-+--- a/net/netfilter/nft_flow_offload.c
-++++ b/net/netfilter/nft_flow_offload.c
-+@@ -89,6 +89,7 @@ static void nft_dev_path_info(const stru
-+ 		path = &stack->path[i];
-+ 		switch (path->type) {
-+ 		case DEV_PATH_ETHERNET:
-++		case DEV_PATH_DSA:
-+ 		case DEV_PATH_VLAN:
-+ 		case DEV_PATH_PPPOE:
-+ 			info->indev = path->dev;
-+@@ -97,6 +98,10 @@ static void nft_dev_path_info(const stru
-+ 
-+ 			if (path->type == DEV_PATH_ETHERNET)
-+ 				break;
-++			if (path->type == DEV_PATH_DSA) {
-++				i = stack->num_paths;
-++				break;
-++			}
-+ 
-+ 			/* DEV_PATH_VLAN and DEV_PATH_PPPOE */
-+ 			if (info->num_encaps >= NF_FLOW_TABLE_ENCAP_MAX) {
-diff --git a/target/linux/generic/pending-5.10/640-15-netfilter-flowtable-add-offload-support-for-xmit-pat.patch b/target/linux/generic/pending-5.10/640-15-netfilter-flowtable-add-offload-support-for-xmit-pat.patch
-new file mode 100644
-index 0000000000..696ea03332
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-15-netfilter-flowtable-add-offload-support-for-xmit-pat.patch
-@@ -0,0 +1,308 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Mon, 7 Dec 2020 20:31:44 +0100
-+Subject: [PATCH] netfilter: flowtable: add offload support for xmit path
-+ types
-+
-+When the flow tuple xmit_type is set to FLOW_OFFLOAD_XMIT_DIRECT, the
-+dst_cache pointer is not valid, and the h_source/h_dest/ifidx out fields
-+need to be used.
-+
-+This patch also adds the FLOW_ACTION_VLAN_PUSH action to pass the VLAN
-+tag to the driver.
-+---
-+
-+--- a/net/netfilter/nf_flow_table_offload.c
-++++ b/net/netfilter/nf_flow_table_offload.c
-+@@ -175,28 +175,45 @@ static int flow_offload_eth_src(struct n
-+ 				enum flow_offload_tuple_dir dir,
-+ 				struct nf_flow_rule *flow_rule)
-+ {
-+-	const struct flow_offload_tuple *tuple = &flow->tuplehash[!dir].tuple;
-+ 	struct flow_action_entry *entry0 = flow_action_entry_next(flow_rule);
-+ 	struct flow_action_entry *entry1 = flow_action_entry_next(flow_rule);
-+-	struct net_device *dev;
-++	const struct flow_offload_tuple *other_tuple, *this_tuple;
-++	struct net_device *dev = NULL;
-++	const unsigned char *addr;
-+ 	u32 mask, val;
-+ 	u16 val16;
-+ 
-+-	dev = dev_get_by_index(net, tuple->iifidx);
-+-	if (!dev)
-+-		return -ENOENT;
-++	this_tuple = &flow->tuplehash[dir].tuple;
-++
-++	switch (this_tuple->xmit_type) {
-++	case FLOW_OFFLOAD_XMIT_DIRECT:
-++		addr = this_tuple->out.h_source;
-++		break;
-++	case FLOW_OFFLOAD_XMIT_NEIGH:
-++		other_tuple = &flow->tuplehash[!dir].tuple;
-++		dev = dev_get_by_index(net, other_tuple->iifidx);
-++		if (!dev)
-++			return -ENOENT;
-++
-++		addr = dev->dev_addr;
-++		break;
-++	default:
-++		return -EOPNOTSUPP;
-++	}
-+ 
-+ 	mask = ~0xffff0000;
-+-	memcpy(&val16, dev->dev_addr, 2);
-++	memcpy(&val16, addr, 2);
-+ 	val = val16 << 16;
-+ 	flow_offload_mangle(entry0, FLOW_ACT_MANGLE_HDR_TYPE_ETH, 4,
-+ 			    &val, &mask);
-+ 
-+ 	mask = ~0xffffffff;
-+-	memcpy(&val, dev->dev_addr + 2, 4);
-++	memcpy(&val, addr + 2, 4);
-+ 	flow_offload_mangle(entry1, FLOW_ACT_MANGLE_HDR_TYPE_ETH, 8,
-+ 			    &val, &mask);
-+-	dev_put(dev);
-++
-++	if (dev)
-++		dev_put(dev);
-+ 
-+ 	return 0;
-+ }
-+@@ -208,27 +225,40 @@ static int flow_offload_eth_dst(struct n
-+ {
-+ 	struct flow_action_entry *entry0 = flow_action_entry_next(flow_rule);
-+ 	struct flow_action_entry *entry1 = flow_action_entry_next(flow_rule);
-+-	const void *daddr = &flow->tuplehash[!dir].tuple.src_v4;
-++	const struct flow_offload_tuple *other_tuple, *this_tuple;
-+ 	const struct dst_entry *dst_cache;
-+ 	unsigned char ha[ETH_ALEN];
-+ 	struct neighbour *n;
-++	const void *daddr;
-+ 	u32 mask, val;
-+ 	u8 nud_state;
-+ 	u16 val16;
-+ 
-+-	dst_cache = flow->tuplehash[dir].tuple.dst_cache;
-+-	n = dst_neigh_lookup(dst_cache, daddr);
-+-	if (!n)
-+-		return -ENOENT;
-+-
-+-	read_lock_bh(&n->lock);
-+-	nud_state = n->nud_state;
-+-	ether_addr_copy(ha, n->ha);
-+-	read_unlock_bh(&n->lock);
-++	this_tuple = &flow->tuplehash[dir].tuple;
-+ 
-+-	if (!(nud_state & NUD_VALID)) {
-++	switch (this_tuple->xmit_type) {
-++	case FLOW_OFFLOAD_XMIT_DIRECT:
-++		ether_addr_copy(ha, this_tuple->out.h_dest);
-++		break;
-++	case FLOW_OFFLOAD_XMIT_NEIGH:
-++		other_tuple = &flow->tuplehash[!dir].tuple;
-++		daddr = &other_tuple->src_v4;
-++		dst_cache = this_tuple->dst_cache;
-++		n = dst_neigh_lookup(dst_cache, daddr);
-++		if (!n)
-++			return -ENOENT;
-++
-++		read_lock_bh(&n->lock);
-++		nud_state = n->nud_state;
-++		ether_addr_copy(ha, n->ha);
-++		read_unlock_bh(&n->lock);
-+ 		neigh_release(n);
-+-		return -ENOENT;
-++
-++		if (!(nud_state & NUD_VALID))
-++			return -ENOENT;
-++		break;
-++	default:
-++		return -EOPNOTSUPP;
-+ 	}
-+ 
-+ 	mask = ~0xffffffff;
-+@@ -241,7 +271,6 @@ static int flow_offload_eth_dst(struct n
-+ 	val = val16;
-+ 	flow_offload_mangle(entry1, FLOW_ACT_MANGLE_HDR_TYPE_ETH, 4,
-+ 			    &val, &mask);
-+-	neigh_release(n);
-+ 
-+ 	return 0;
-+ }
-+@@ -463,27 +492,52 @@ static void flow_offload_ipv4_checksum(s
-+ 	}
-+ }
-+ 
-+-static void flow_offload_redirect(const struct flow_offload *flow,
-++static void flow_offload_redirect(struct net *net,
-++				  const struct flow_offload *flow,
-+ 				  enum flow_offload_tuple_dir dir,
-+ 				  struct nf_flow_rule *flow_rule)
-+ {
-+-	struct flow_action_entry *entry = flow_action_entry_next(flow_rule);
-+-	struct rtable *rt;
-++	const struct flow_offload_tuple *this_tuple, *other_tuple;
-++	struct flow_action_entry *entry;
-++	struct net_device *dev;
-++	int ifindex;
-++
-++	this_tuple = &flow->tuplehash[dir].tuple;
-++	switch (this_tuple->xmit_type) {
-++	case FLOW_OFFLOAD_XMIT_DIRECT:
-++		this_tuple = &flow->tuplehash[dir].tuple;
-++		ifindex = this_tuple->out.ifidx;
-++		break;
-++	case FLOW_OFFLOAD_XMIT_NEIGH:
-++		other_tuple = &flow->tuplehash[!dir].tuple;
-++		ifindex = other_tuple->iifidx;
-++		break;
-++	default:
-++		return;
-++	}
-+ 
-+-	rt = (struct rtable *)flow->tuplehash[dir].tuple.dst_cache;
-++	dev = dev_get_by_index(net, ifindex);
-++	if (!dev)
-++		return;
-++
-++	entry = flow_action_entry_next(flow_rule);
-+ 	entry->id = FLOW_ACTION_REDIRECT;
-+-	entry->dev = rt->dst.dev;
-+-	dev_hold(rt->dst.dev);
-++	entry->dev = dev;
-+ }
-+ 
-+ static void flow_offload_encap_tunnel(const struct flow_offload *flow,
-+ 				      enum flow_offload_tuple_dir dir,
-+ 				      struct nf_flow_rule *flow_rule)
-+ {
-++	const struct flow_offload_tuple *this_tuple;
-+ 	struct flow_action_entry *entry;
-+ 	struct dst_entry *dst;
-+ 
-+-	dst = flow->tuplehash[dir].tuple.dst_cache;
-++	this_tuple = &flow->tuplehash[dir].tuple;
-++	if (this_tuple->xmit_type == FLOW_OFFLOAD_XMIT_DIRECT)
-++		return;
-++
-++	dst = this_tuple->dst_cache;
-+ 	if (dst && dst->lwtstate) {
-+ 		struct ip_tunnel_info *tun_info;
-+ 
-+@@ -500,10 +554,15 @@ static void flow_offload_decap_tunnel(co
-+ 				      enum flow_offload_tuple_dir dir,
-+ 				      struct nf_flow_rule *flow_rule)
-+ {
-++	const struct flow_offload_tuple *other_tuple;
-+ 	struct flow_action_entry *entry;
-+ 	struct dst_entry *dst;
-+ 
-+-	dst = flow->tuplehash[!dir].tuple.dst_cache;
-++	other_tuple = &flow->tuplehash[!dir].tuple;
-++	if (other_tuple->xmit_type == FLOW_OFFLOAD_XMIT_DIRECT)
-++		return;
-++
-++	dst = other_tuple->dst_cache;
-+ 	if (dst && dst->lwtstate) {
-+ 		struct ip_tunnel_info *tun_info;
-+ 
-+@@ -515,10 +574,14 @@ static void flow_offload_decap_tunnel(co
-+ 	}
-+ }
-+ 
-+-int nf_flow_rule_route_ipv4(struct net *net, const struct flow_offload *flow,
-+-			    enum flow_offload_tuple_dir dir,
-+-			    struct nf_flow_rule *flow_rule)
-++static int
-++nf_flow_rule_route_common(struct net *net, const struct flow_offload *flow,
-++			  enum flow_offload_tuple_dir dir,
-++			  struct nf_flow_rule *flow_rule)
-+ {
-++	const struct flow_offload_tuple *other_tuple;
-++	int i;
-++
-+ 	flow_offload_decap_tunnel(flow, dir, flow_rule);
-+ 	flow_offload_encap_tunnel(flow, dir, flow_rule);
-+ 
-+@@ -526,6 +589,26 @@ int nf_flow_rule_route_ipv4(struct net *
-+ 	    flow_offload_eth_dst(net, flow, dir, flow_rule) < 0)
-+ 		return -1;
-+ 
-++	other_tuple = &flow->tuplehash[!dir].tuple;
-++
-++	for (i = 0; i < other_tuple->encap_num; i++) {
-++		struct flow_action_entry *entry = flow_action_entry_next(flow_rule);
-++
-++		entry->id = FLOW_ACTION_VLAN_PUSH;
-++		entry->vlan.vid = other_tuple->encap[i].id;
-++		entry->vlan.proto = other_tuple->encap[i].proto;
-++	}
-++
-++	return 0;
-++}
-++
-++int nf_flow_rule_route_ipv4(struct net *net, const struct flow_offload *flow,
-++			    enum flow_offload_tuple_dir dir,
-++			    struct nf_flow_rule *flow_rule)
-++{
-++	if (nf_flow_rule_route_common(net, flow, dir, flow_rule) < 0)
-++		return -1;
-++
-+ 	if (test_bit(NF_FLOW_SNAT, &flow->flags)) {
-+ 		flow_offload_ipv4_snat(net, flow, dir, flow_rule);
-+ 		flow_offload_port_snat(net, flow, dir, flow_rule);
-+@@ -538,7 +621,7 @@ int nf_flow_rule_route_ipv4(struct net *
-+ 	    test_bit(NF_FLOW_DNAT, &flow->flags))
-+ 		flow_offload_ipv4_checksum(net, flow, flow_rule);
-+ 
-+-	flow_offload_redirect(flow, dir, flow_rule);
-++	flow_offload_redirect(net, flow, dir, flow_rule);
-+ 
-+ 	return 0;
-+ }
-+@@ -548,11 +631,7 @@ int nf_flow_rule_route_ipv6(struct net *
-+ 			    enum flow_offload_tuple_dir dir,
-+ 			    struct nf_flow_rule *flow_rule)
-+ {
-+-	flow_offload_decap_tunnel(flow, dir, flow_rule);
-+-	flow_offload_encap_tunnel(flow, dir, flow_rule);
-+-
-+-	if (flow_offload_eth_src(net, flow, dir, flow_rule) < 0 ||
-+-	    flow_offload_eth_dst(net, flow, dir, flow_rule) < 0)
-++	if (nf_flow_rule_route_common(net, flow, dir, flow_rule) < 0)
-+ 		return -1;
-+ 
-+ 	if (test_bit(NF_FLOW_SNAT, &flow->flags)) {
-+@@ -564,7 +643,7 @@ int nf_flow_rule_route_ipv6(struct net *
-+ 		flow_offload_port_dnat(net, flow, dir, flow_rule);
-+ 	}
-+ 
-+-	flow_offload_redirect(flow, dir, flow_rule);
-++	flow_offload_redirect(net, flow, dir, flow_rule);
-+ 
-+ 	return 0;
-+ }
-+@@ -578,10 +657,10 @@ nf_flow_offload_rule_alloc(struct net *n
-+ 			   enum flow_offload_tuple_dir dir)
-+ {
-+ 	const struct nf_flowtable *flowtable = offload->flowtable;
-++	const struct flow_offload_tuple *tuple, *other_tuple;
-+ 	const struct flow_offload *flow = offload->flow;
-+-	const struct flow_offload_tuple *tuple;
-++	struct dst_entry *other_dst = NULL;
-+ 	struct nf_flow_rule *flow_rule;
-+-	struct dst_entry *other_dst;
-+ 	int err = -ENOMEM;
-+ 
-+ 	flow_rule = kzalloc(sizeof(*flow_rule), GFP_KERNEL);
-+@@ -597,7 +676,10 @@ nf_flow_offload_rule_alloc(struct net *n
-+ 	flow_rule->rule->match.key = &flow_rule->match.key;
-+ 
-+ 	tuple = &flow->tuplehash[dir].tuple;
-+-	other_dst = flow->tuplehash[!dir].tuple.dst_cache;
-++	other_tuple = &flow->tuplehash[!dir].tuple;
-++	if (other_tuple->xmit_type == FLOW_OFFLOAD_XMIT_NEIGH)
-++		other_dst = other_tuple->dst_cache;
-++
-+ 	err = nf_flow_rule_match(&flow_rule->match, tuple, other_dst);
-+ 	if (err < 0)
-+ 		goto err_flow_match;
-diff --git a/target/linux/generic/pending-5.10/640-16-dsa-slave-add-support-for-TC_SETUP_FT.patch b/target/linux/generic/pending-5.10/640-16-dsa-slave-add-support-for-TC_SETUP_FT.patch
-new file mode 100644
-index 0000000000..4dade26f60
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-16-dsa-slave-add-support-for-TC_SETUP_FT.patch
-@@ -0,0 +1,53 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Mon, 18 Jan 2021 22:39:17 +0100
-+Subject: [PATCH] dsa: slave: add support for TC_SETUP_FT
-+
-+The dsa infrastructure provides a well-defined hierarchy of devices,
-+pass up the call to set up the flow block to the master device. From the
-+software dataplane, the netfilter infrastructure uses the dsa slave
-+devices to refer to the input and output device for the given skbuff.
-+Similarly, the flowtable definition in the ruleset refers to the dsa
-+slave port devices.
-+
-+This patch adds the glue code to call ndo_setup_tc with TC_SETUP_FT
-+with the master device via the dsa slave devices.
-+
-+Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
-+---
-+
-+--- a/net/dsa/slave.c
-++++ b/net/dsa/slave.c
-+@@ -1237,14 +1237,32 @@ static int dsa_slave_setup_tc_block(stru
-+ 	}
-+ }
-+ 
-++static int dsa_slave_setup_ft_block(struct dsa_switch *ds, int port,
-++				    void *type_data)
-++{
-++	struct dsa_port *cpu_dp = dsa_to_port(ds, port)->cpu_dp;
-++	struct net_device *master = cpu_dp->master;
-++
-++	if (!master->netdev_ops->ndo_setup_tc)
-++		return -EOPNOTSUPP;
-++
-++	return master->netdev_ops->ndo_setup_tc(master, TC_SETUP_FT, type_data);
-++}
-++
-+ static int dsa_slave_setup_tc(struct net_device *dev, enum tc_setup_type type,
-+ 			      void *type_data)
-+ {
-+ 	struct dsa_port *dp = dsa_slave_to_port(dev);
-+ 	struct dsa_switch *ds = dp->ds;
-+ 
-+-	if (type == TC_SETUP_BLOCK)
-++	switch (type) {
-++	case TC_SETUP_BLOCK:
-+ 		return dsa_slave_setup_tc_block(dev, type_data);
-++	case TC_SETUP_FT:
-++		return dsa_slave_setup_ft_block(ds, dp->index, type_data);
-++	default:
-++		break;
-++	}
-+ 
-+ 	if (!ds->ops->port_setup_tc)
-+ 		return -EOPNOTSUPP;
-diff --git a/target/linux/generic/pending-5.10/640-17-netfilter-nft_flow_offload-use-direct-xmit-if-hardwa.patch b/target/linux/generic/pending-5.10/640-17-netfilter-nft_flow_offload-use-direct-xmit-if-hardwa.patch
-new file mode 100644
-index 0000000000..26d172bcf7
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-17-netfilter-nft_flow_offload-use-direct-xmit-if-hardwa.patch
-@@ -0,0 +1,108 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Thu, 4 Mar 2021 19:24:11 +0100
-+Subject: [PATCH] netfilter: nft_flow_offload: use direct xmit if
-+ hardware offload is enabled
-+
-+If there is a forward path to reach an ethernet device and hardware
-+offload is enabled, then use the direct xmit path.
-+---
-+
-+--- a/include/net/netfilter/nf_flow_table.h
-++++ b/include/net/netfilter/nf_flow_table.h
-+@@ -131,6 +131,7 @@ struct flow_offload_tuple {
-+ 		struct dst_entry	*dst_cache;
-+ 		struct {
-+ 			u32		ifidx;
-++			u32		hw_ifidx;
-+ 			u8		h_source[ETH_ALEN];
-+ 			u8		h_dest[ETH_ALEN];
-+ 		} out;
-+@@ -188,6 +189,7 @@ struct nf_flow_route {
-+ 		} in;
-+ 		struct {
-+ 			u32			ifindex;
-++			u32			hw_ifindex;
-+ 			u8			h_source[ETH_ALEN];
-+ 			u8			h_dest[ETH_ALEN];
-+ 		} out;
-+--- a/net/netfilter/nf_flow_table_core.c
-++++ b/net/netfilter/nf_flow_table_core.c
-+@@ -106,6 +106,7 @@ static int flow_offload_fill_route(struc
-+ 		memcpy(flow_tuple->out.h_source, route->tuple[dir].out.h_source,
-+ 		       ETH_ALEN);
-+ 		flow_tuple->out.ifidx = route->tuple[dir].out.ifindex;
-++		flow_tuple->out.hw_ifidx = route->tuple[dir].out.hw_ifindex;
-+ 		break;
-+ 	case FLOW_OFFLOAD_XMIT_XFRM:
-+ 	case FLOW_OFFLOAD_XMIT_NEIGH:
-+--- a/net/netfilter/nf_flow_table_offload.c
-++++ b/net/netfilter/nf_flow_table_offload.c
-+@@ -506,7 +506,7 @@ static void flow_offload_redirect(struct
-+ 	switch (this_tuple->xmit_type) {
-+ 	case FLOW_OFFLOAD_XMIT_DIRECT:
-+ 		this_tuple = &flow->tuplehash[dir].tuple;
-+-		ifindex = this_tuple->out.ifidx;
-++		ifindex = this_tuple->out.hw_ifidx;
-+ 		break;
-+ 	case FLOW_OFFLOAD_XMIT_NEIGH:
-+ 		other_tuple = &flow->tuplehash[!dir].tuple;
-+--- a/net/netfilter/nft_flow_offload.c
-++++ b/net/netfilter/nft_flow_offload.c
-+@@ -66,6 +66,7 @@ static int nft_dev_fill_forward_path(con
-+ struct nft_forward_info {
-+ 	const struct net_device *indev;
-+ 	const struct net_device *outdev;
-++	const struct net_device *hw_outdev;
-+ 	struct id {
-+ 		__u16	id;
-+ 		__be16	proto;
-+@@ -76,9 +77,18 @@ struct nft_forward_info {
-+ 	enum flow_offload_xmit_type xmit_type;
-+ };
-+ 
-++static bool nft_is_valid_ether_device(const struct net_device *dev)
-++{
-++	if (!dev || (dev->flags & IFF_LOOPBACK) || dev->type != ARPHRD_ETHER ||
-++	    dev->addr_len != ETH_ALEN || !is_valid_ether_addr(dev->dev_addr))
-++		return false;
-++
-++	return true;
-++}
-++
-+ static void nft_dev_path_info(const struct net_device_path_stack *stack,
-+ 			      struct nft_forward_info *info,
-+-			      unsigned char *ha)
-++			      unsigned char *ha, struct nf_flowtable *flowtable)
-+ {
-+ 	const struct net_device_path *path;
-+ 	int i;
-+@@ -140,6 +150,12 @@ static void nft_dev_path_info(const stru
-+ 	}
-+ 	if (!info->outdev)
-+ 		info->outdev = info->indev;
-++
-++	info->hw_outdev = info->indev;
-++
-++	if (nf_flowtable_hw_offload(flowtable) &&
-++	    nft_is_valid_ether_device(info->indev))
-++		info->xmit_type = FLOW_OFFLOAD_XMIT_DIRECT;
-+ }
-+ 
-+ static bool nft_flowtable_find_dev(const struct net_device *dev,
-+@@ -171,7 +187,7 @@ static void nft_dev_forward_path(struct
-+ 	int i;
-+ 
-+ 	if (nft_dev_fill_forward_path(route, dst, ct, dir, ha, &stack) >= 0)
-+-		nft_dev_path_info(&stack, &info, ha);
-++		nft_dev_path_info(&stack, &info, ha, &ft->data);
-+ 
-+ 	if (!info.indev || !nft_flowtable_find_dev(info.indev, ft))
-+ 		return;
-+@@ -187,6 +203,7 @@ static void nft_dev_forward_path(struct
-+ 		memcpy(route->tuple[dir].out.h_source, info.h_source, ETH_ALEN);
-+ 		memcpy(route->tuple[dir].out.h_dest, info.h_dest, ETH_ALEN);
-+ 		route->tuple[dir].out.ifindex = info.outdev->ifindex;
-++		route->tuple[dir].out.hw_ifindex = info.hw_outdev->ifindex;
-+ 		route->tuple[dir].xmit_type = info.xmit_type;
-+ 	}
-+ }
-diff --git a/target/linux/generic/pending-5.10/640-18-netfilter-nf_flow_table-fix-untagging-with-hardware-.patch b/target/linux/generic/pending-5.10/640-18-netfilter-nf_flow_table-fix-untagging-with-hardware-.patch
-new file mode 100644
-index 0000000000..18f43196eb
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-18-netfilter-nf_flow_table-fix-untagging-with-hardware-.patch
-@@ -0,0 +1,122 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Mon, 8 Mar 2021 12:06:44 +0100
-+Subject: [PATCH] netfilter: nf_flow_table: fix untagging with
-+ hardware-offloaded bridge vlan_filtering
-+
-+When switchdev offloading is enabled, treat an untagged VLAN as tagged for
-+ingress only
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/include/linux/netdevice.h
-++++ b/include/linux/netdevice.h
-+@@ -849,6 +849,7 @@ struct net_device_path {
-+ 				DEV_PATH_BR_VLAN_KEEP,
-+ 				DEV_PATH_BR_VLAN_TAG,
-+ 				DEV_PATH_BR_VLAN_UNTAG,
-++				DEV_PATH_BR_VLAN_UNTAG_HW,
-+ 			}		vlan_mode;
-+ 			u16		vlan_id;
-+ 			__be16		vlan_proto;
-+--- a/include/net/netfilter/nf_flow_table.h
-++++ b/include/net/netfilter/nf_flow_table.h
-+@@ -123,9 +123,10 @@ struct flow_offload_tuple {
-+ 	/* All members above are keys for lookups, see flow_offload_hash(). */
-+ 	struct { }			__hash;
-+ 
-+-	u8				dir:4,
-++	u8				dir:2,
-+ 					xmit_type:2,
-+-					encap_num:2;
-++					encap_num:2,
-++					in_vlan_ingress:2;
-+ 	u16				mtu;
-+ 	union {
-+ 		struct dst_entry	*dst_cache;
-+@@ -185,7 +186,8 @@ struct nf_flow_route {
-+ 				u16		id;
-+ 				__be16		proto;
-+ 			} encap[NF_FLOW_TABLE_ENCAP_MAX];
-+-			u8			num_encaps;
-++			u8			num_encaps:2,
-++						ingress_vlans:2;
-+ 		} in;
-+ 		struct {
-+ 			u32			ifindex;
-+--- a/net/bridge/br_device.c
-++++ b/net/bridge/br_device.c
-+@@ -435,6 +435,7 @@ static int br_fill_forward_path(struct n
-+ 		ctx->vlan[ctx->num_vlans].proto = path->bridge.vlan_proto;
-+ 		ctx->num_vlans++;
-+ 		break;
-++	case DEV_PATH_BR_VLAN_UNTAG_HW:
-+ 	case DEV_PATH_BR_VLAN_UNTAG:
-+ 		ctx->num_vlans--;
-+ 		break;
-+--- a/net/bridge/br_vlan.c
-++++ b/net/bridge/br_vlan.c
-+@@ -1374,6 +1374,8 @@ int br_vlan_fill_forward_path_mode(struc
-+ 
-+ 	if (path->bridge.vlan_mode == DEV_PATH_BR_VLAN_TAG)
-+ 		path->bridge.vlan_mode = DEV_PATH_BR_VLAN_KEEP;
-++	else if (v->priv_flags & BR_VLFLAG_ADDED_BY_SWITCHDEV)
-++		path->bridge.vlan_mode = DEV_PATH_BR_VLAN_UNTAG_HW;
-+ 	else
-+ 		path->bridge.vlan_mode = DEV_PATH_BR_VLAN_UNTAG;
-+ 
-+--- a/net/netfilter/nf_flow_table_core.c
-++++ b/net/netfilter/nf_flow_table_core.c
-+@@ -95,6 +95,8 @@ static int flow_offload_fill_route(struc
-+ 	for (i = route->tuple[dir].in.num_encaps - 1; i >= 0; i--) {
-+ 		flow_tuple->encap[j].id = route->tuple[dir].in.encap[i].id;
-+ 		flow_tuple->encap[j].proto = route->tuple[dir].in.encap[i].proto;
-++		if (route->tuple[dir].in.ingress_vlans & BIT(i))
-++			flow_tuple->in_vlan_ingress |= BIT(j);
-+ 		j++;
-+ 	}
-+ 	flow_tuple->encap_num = route->tuple[dir].in.num_encaps;
-+--- a/net/netfilter/nf_flow_table_offload.c
-++++ b/net/netfilter/nf_flow_table_offload.c
-+@@ -592,8 +592,12 @@ nf_flow_rule_route_common(struct net *ne
-+ 	other_tuple = &flow->tuplehash[!dir].tuple;
-+ 
-+ 	for (i = 0; i < other_tuple->encap_num; i++) {
-+-		struct flow_action_entry *entry = flow_action_entry_next(flow_rule);
-++		struct flow_action_entry *entry;
-+ 
-++		if (other_tuple->in_vlan_ingress & BIT(i))
-++			continue;
-++
-++		entry = flow_action_entry_next(flow_rule);
-+ 		entry->id = FLOW_ACTION_VLAN_PUSH;
-+ 		entry->vlan.vid = other_tuple->encap[i].id;
-+ 		entry->vlan.proto = other_tuple->encap[i].proto;
-+--- a/net/netfilter/nft_flow_offload.c
-++++ b/net/netfilter/nft_flow_offload.c
-+@@ -72,6 +72,7 @@ struct nft_forward_info {
-+ 		__be16	proto;
-+ 	} encap[NF_FLOW_TABLE_ENCAP_MAX];
-+ 	u8 num_encaps;
-++	u8 ingress_vlans;
-+ 	u8 h_source[ETH_ALEN];
-+ 	u8 h_dest[ETH_ALEN];
-+ 	enum flow_offload_xmit_type xmit_type;
-+@@ -130,6 +131,9 @@ static void nft_dev_path_info(const stru
-+ 				memcpy(info->h_source, path->dev->dev_addr, ETH_ALEN);
-+ 
-+ 			switch (path->bridge.vlan_mode) {
-++			case DEV_PATH_BR_VLAN_UNTAG_HW:
-++				info->ingress_vlans |= BIT(info->num_encaps - 1);
-++				break;
-+ 			case DEV_PATH_BR_VLAN_TAG:
-+ 				info->encap[info->num_encaps].id = path->bridge.vlan_id;
-+ 				info->encap[info->num_encaps].proto = path->bridge.vlan_proto;
-+@@ -198,6 +202,7 @@ static void nft_dev_forward_path(struct
-+ 		route->tuple[!dir].in.encap[i].proto = info.encap[i].proto;
-+ 	}
-+ 	route->tuple[!dir].in.num_encaps = info.num_encaps;
-++	route->tuple[!dir].in.ingress_vlans = info.ingress_vlans;
-+ 
-+ 	if (info.xmit_type == FLOW_OFFLOAD_XMIT_DIRECT) {
-+ 		memcpy(route->tuple[dir].out.h_source, info.h_source, ETH_ALEN);
-diff --git a/target/linux/generic/pending-5.10/640-19-net-flow_offload-add-FLOW_ACTION_PPPOE_PUSH.patch b/target/linux/generic/pending-5.10/640-19-net-flow_offload-add-FLOW_ACTION_PPPOE_PUSH.patch
-new file mode 100644
-index 0000000000..3eaad27cdf
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-19-net-flow_offload-add-FLOW_ACTION_PPPOE_PUSH.patch
-@@ -0,0 +1,26 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Tue, 2 Mar 2021 00:51:31 +0100
-+Subject: [PATCH] net: flow_offload: add FLOW_ACTION_PPPOE_PUSH
-+
-+---
-+
-+--- a/include/net/flow_offload.h
-++++ b/include/net/flow_offload.h
-+@@ -147,6 +147,7 @@ enum flow_action_id {
-+ 	FLOW_ACTION_MPLS_POP,
-+ 	FLOW_ACTION_MPLS_MANGLE,
-+ 	FLOW_ACTION_GATE,
-++	FLOW_ACTION_PPPOE_PUSH,
-+ 	NUM_FLOW_ACTIONS,
-+ };
-+ 
-+@@ -271,6 +272,9 @@ struct flow_action_entry {
-+ 			u32		num_entries;
-+ 			struct action_gate_entry *entries;
-+ 		} gate;
-++		struct {				/* FLOW_ACTION_PPPOE_PUSH */
-++			u16		sid;
-++		} pppoe;
-+ 	};
-+ 	struct flow_action_cookie *cookie; /* user defined action cookie */
-+ };
-diff --git a/target/linux/generic/pending-5.10/640-20-netfilter-flowtable-support-for-FLOW_ACTION_PPPOE_PU.patch b/target/linux/generic/pending-5.10/640-20-netfilter-flowtable-support-for-FLOW_ACTION_PPPOE_PU.patch
-new file mode 100644
-index 0000000000..fcafff1fff
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/640-20-netfilter-flowtable-support-for-FLOW_ACTION_PPPOE_PU.patch
-@@ -0,0 +1,31 @@
-+From: Pablo Neira Ayuso <pablo@netfilter.org>
-+Date: Tue, 2 Mar 2021 01:01:50 +0100
-+Subject: [PATCH] netfilter: flowtable: support for
-+ FLOW_ACTION_PPPOE_PUSH
-+
-+---
-+
-+--- a/net/netfilter/nf_flow_table_offload.c
-++++ b/net/netfilter/nf_flow_table_offload.c
-+@@ -598,9 +598,18 @@ nf_flow_rule_route_common(struct net *ne
-+ 			continue;
-+ 
-+ 		entry = flow_action_entry_next(flow_rule);
-+-		entry->id = FLOW_ACTION_VLAN_PUSH;
-+-		entry->vlan.vid = other_tuple->encap[i].id;
-+-		entry->vlan.proto = other_tuple->encap[i].proto;
-++
-++		switch (other_tuple->encap[i].proto) {
-++		case htons(ETH_P_PPP_SES):
-++			entry->id = FLOW_ACTION_PPPOE_PUSH;
-++			entry->pppoe.sid = other_tuple->encap[i].id;
-++			break;
-++		case htons(ETH_P_8021Q):
-++			entry->id = FLOW_ACTION_VLAN_PUSH;
-++			entry->vlan.vid = other_tuple->encap[i].id;
-++			entry->vlan.proto = other_tuple->encap[i].proto;
-++			break;
-++		}
-+ 	}
-+ 
-+ 	return 0;
-diff --git a/target/linux/generic/pending-5.10/655-increase_skb_pad.patch b/target/linux/generic/pending-5.10/655-increase_skb_pad.patch
-new file mode 100644
-index 0000000000..ff39ddb8b3
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/655-increase_skb_pad.patch
-@@ -0,0 +1,20 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: kernel: add a few patches for avoiding unnecessary skb reallocations - significantly improves ethernet<->wireless performance
-+
-+lede-commit: 6f89cffc9add6939d44a6b54cf9a5e77849aa7fd
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ include/linux/skbuff.h | 2 +-
-+ 1 file changed, 1 insertion(+), 1 deletion(-)
-+
-+--- a/include/linux/skbuff.h
-++++ b/include/linux/skbuff.h
-+@@ -2676,7 +2676,7 @@ static inline int pskb_network_may_pull(
-+  * NET_IP_ALIGN(2) + ethernet_header(14) + IP_header(20/40) + ports(8)
-+  */
-+ #ifndef NET_SKB_PAD
-+-#define NET_SKB_PAD	max(32, L1_CACHE_BYTES)
-++#define NET_SKB_PAD	max(64, L1_CACHE_BYTES)
-+ #endif
-+ 
-+ int ___pskb_trim(struct sk_buff *skb, unsigned int len);
-diff --git a/target/linux/generic/pending-5.10/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch b/target/linux/generic/pending-5.10/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch
-new file mode 100644
-index 0000000000..924baa0607
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch
-@@ -0,0 +1,511 @@
-+From: Steven Barth <steven@midlink.org>
-+Subject: Add support for MAP-E FMRs (mesh mode)
-+
-+MAP-E FMRs (draft-ietf-softwire-map-10) are rules for IPv4-communication
-+between MAP CEs (mesh mode) without the need to forward such data to a
-+border relay. This is similar to how 6rd works but for IPv4 over IPv6.
-+
-+Signed-off-by: Steven Barth <cyrus@openwrt.org>
-+---
-+ include/net/ip6_tunnel.h       |  13 ++
-+ include/uapi/linux/if_tunnel.h |  13 ++
-+ net/ipv6/ip6_tunnel.c          | 276 +++++++++++++++++++++++++++++++++++++++--
-+ 3 files changed, 291 insertions(+), 11 deletions(-)
-+
-+--- a/include/net/ip6_tunnel.h
-++++ b/include/net/ip6_tunnel.h
-+@@ -18,6 +18,18 @@
-+ /* determine capability on a per-packet basis */
-+ #define IP6_TNL_F_CAP_PER_PACKET 0x40000
-+ 
-++/* IPv6 tunnel FMR */
-++struct __ip6_tnl_fmr {
-++	struct __ip6_tnl_fmr *next; /* next fmr in list */
-++	struct in6_addr ip6_prefix;
-++	struct in_addr ip4_prefix;
-++
-++	__u8 ip6_prefix_len;
-++	__u8 ip4_prefix_len;
-++	__u8 ea_len;
-++	__u8 offset;
-++};
-++
-+ struct __ip6_tnl_parm {
-+ 	char name[IFNAMSIZ];	/* name of tunnel device */
-+ 	int link;		/* ifindex of underlying L2 interface */
-+@@ -29,6 +41,7 @@ struct __ip6_tnl_parm {
-+ 	__u32 flags;		/* tunnel flags */
-+ 	struct in6_addr laddr;	/* local tunnel end-point address */
-+ 	struct in6_addr raddr;	/* remote tunnel end-point address */
-++	struct __ip6_tnl_fmr *fmrs;	/* FMRs */
-+ 
-+ 	__be16			i_flags;
-+ 	__be16			o_flags;
-+--- a/include/uapi/linux/if_tunnel.h
-++++ b/include/uapi/linux/if_tunnel.h
-+@@ -77,10 +77,23 @@ enum {
-+ 	IFLA_IPTUN_ENCAP_DPORT,
-+ 	IFLA_IPTUN_COLLECT_METADATA,
-+ 	IFLA_IPTUN_FWMARK,
-++	IFLA_IPTUN_FMRS,
-+ 	__IFLA_IPTUN_MAX,
-+ };
-+ #define IFLA_IPTUN_MAX	(__IFLA_IPTUN_MAX - 1)
-+ 
-++enum {
-++	IFLA_IPTUN_FMR_UNSPEC,
-++	IFLA_IPTUN_FMR_IP6_PREFIX,
-++	IFLA_IPTUN_FMR_IP4_PREFIX,
-++	IFLA_IPTUN_FMR_IP6_PREFIX_LEN,
-++	IFLA_IPTUN_FMR_IP4_PREFIX_LEN,
-++	IFLA_IPTUN_FMR_EA_LEN,
-++	IFLA_IPTUN_FMR_OFFSET,
-++	__IFLA_IPTUN_FMR_MAX,
-++};
-++#define IFLA_IPTUN_FMR_MAX (__IFLA_IPTUN_FMR_MAX - 1)
-++
-+ enum tunnel_encap_types {
-+ 	TUNNEL_ENCAP_NONE,
-+ 	TUNNEL_ENCAP_FOU,
-+--- a/net/ipv6/ip6_tunnel.c
-++++ b/net/ipv6/ip6_tunnel.c
-+@@ -11,6 +11,9 @@
-+  *      linux/net/ipv6/sit.c and linux/net/ipv4/ipip.c
-+  *
-+  *      RFC 2473
-++ *
-++ *      Changes:
-++ *      Steven Barth <cyrus@openwrt.org>:           MAP-E FMR support
-+  */
-+ 
-+ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-+@@ -67,9 +70,9 @@ static bool log_ecn_error = true;
-+ module_param(log_ecn_error, bool, 0644);
-+ MODULE_PARM_DESC(log_ecn_error, "Log packets received with corrupted ECN");
-+ 
-+-static u32 HASH(const struct in6_addr *addr1, const struct in6_addr *addr2)
-++static u32 HASH(const struct in6_addr *addr)
-+ {
-+-	u32 hash = ipv6_addr_hash(addr1) ^ ipv6_addr_hash(addr2);
-++	u32 hash = ipv6_addr_hash(addr);
-+ 
-+ 	return hash_32(hash, IP6_TUNNEL_HASH_SIZE_SHIFT);
-+ }
-+@@ -144,17 +147,33 @@ static struct ip6_tnl *
-+ ip6_tnl_lookup(struct net *net, int link,
-+ 	       const struct in6_addr *remote, const struct in6_addr *local)
-+ {
-+-	unsigned int hash = HASH(remote, local);
-++	unsigned int hash = HASH(local);
-+ 	struct ip6_tnl *t, *cand = NULL;
-+ 	struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id);
-+ 	struct in6_addr any;
-+ 
-+ 	for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) {
-+ 		if (!ipv6_addr_equal(local, &t->parms.laddr) ||
-+-		    !ipv6_addr_equal(remote, &t->parms.raddr) ||
-+ 		    !(t->dev->flags & IFF_UP))
-+ 			continue;
-+ 
-++		if (!ipv6_addr_equal(remote, &t->parms.raddr)) {
-++			struct __ip6_tnl_fmr *fmr;
-++			bool found = false;
-++
-++			for (fmr = t->parms.fmrs; fmr; fmr = fmr->next) {
-++				if (!ipv6_prefix_equal(remote, &fmr->ip6_prefix,
-++						       fmr->ip6_prefix_len))
-++					continue;
-++
-++				found = true;
-++				break;
-++			}
-++
-++			if (!found)
-++				continue;
-++		}
-++
-+ 		if (link == t->parms.link)
-+ 			return t;
-+ 		else
-+@@ -162,7 +181,7 @@ ip6_tnl_lookup(struct net *net, int link
-+ 	}
-+ 
-+ 	memset(&any, 0, sizeof(any));
-+-	hash = HASH(&any, local);
-++	hash = HASH(local);
-+ 	for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) {
-+ 		if (!ipv6_addr_equal(local, &t->parms.laddr) ||
-+ 		    !ipv6_addr_any(&t->parms.raddr) ||
-+@@ -175,7 +194,7 @@ ip6_tnl_lookup(struct net *net, int link
-+ 			cand = t;
-+ 	}
-+ 
-+-	hash = HASH(remote, &any);
-++	hash = HASH(&any);
-+ 	for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) {
-+ 		if (!ipv6_addr_equal(remote, &t->parms.raddr) ||
-+ 		    !ipv6_addr_any(&t->parms.laddr) ||
-+@@ -223,7 +242,7 @@ ip6_tnl_bucket(struct ip6_tnl_net *ip6n,
-+ 
-+ 	if (!ipv6_addr_any(remote) || !ipv6_addr_any(local)) {
-+ 		prio = 1;
-+-		h = HASH(remote, local);
-++		h = HASH(local);
-+ 	}
-+ 	return &ip6n->tnls[prio][h];
-+ }
-+@@ -406,6 +425,12 @@ ip6_tnl_dev_uninit(struct net_device *de
-+ 	struct net *net = t->net;
-+ 	struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id);
-+ 
-++	while (t->parms.fmrs) {
-++		struct __ip6_tnl_fmr *next = t->parms.fmrs->next;
-++		kfree(t->parms.fmrs);
-++		t->parms.fmrs = next;
-++	}
-++
-+ 	if (dev == ip6n->fb_tnl_dev)
-+ 		RCU_INIT_POINTER(ip6n->tnls_wc[0], NULL);
-+ 	else
-+@@ -822,6 +847,107 @@ int ip6_tnl_rcv_ctl(struct ip6_tnl *t,
-+ }
-+ EXPORT_SYMBOL_GPL(ip6_tnl_rcv_ctl);
-+ 
-++/**
-++ * ip4ip6_fmr_calc - calculate target / source IPv6-address based on FMR
-++ *   @dest: destination IPv6 address buffer
-++ *   @skb: received socket buffer
-++ *   @fmr: MAP FMR
-++ *   @xmit: Calculate for xmit or rcv
-++ **/
-++static void ip4ip6_fmr_calc(struct in6_addr *dest,
-++		const struct iphdr *iph, const uint8_t *end,
-++		const struct __ip6_tnl_fmr *fmr, bool xmit)
-++{
-++	int psidlen = fmr->ea_len - (32 - fmr->ip4_prefix_len);
-++	u8 *portp = NULL;
-++	bool use_dest_addr;
-++	const struct iphdr *dsth = iph;
-++
-++	if ((u8*)dsth >= end)
-++		return;
-++
-++	/* find significant IP header */
-++	if (iph->protocol == IPPROTO_ICMP) {
-++		struct icmphdr *ih = (struct icmphdr*)(((u8*)dsth) + dsth->ihl * 4);
-++		if (ih && ((u8*)&ih[1]) <= end && (
-++			ih->type == ICMP_DEST_UNREACH ||
-++			ih->type == ICMP_SOURCE_QUENCH ||
-++			ih->type == ICMP_TIME_EXCEEDED ||
-++			ih->type == ICMP_PARAMETERPROB ||
-++			ih->type == ICMP_REDIRECT))
-++				dsth = (const struct iphdr*)&ih[1];
-++	}
-++
-++	/* in xmit-path use dest port by default and source port only if
-++		this is an ICMP reply to something else; vice versa in rcv-path */
-++	use_dest_addr = (xmit && dsth == iph) || (!xmit && dsth != iph);
-++
-++	/* get dst port */
-++	if (((u8*)&dsth[1]) <= end && (
-++		dsth->protocol == IPPROTO_UDP ||
-++		dsth->protocol == IPPROTO_TCP ||
-++		dsth->protocol == IPPROTO_SCTP ||
-++		dsth->protocol == IPPROTO_DCCP)) {
-++			/* for UDP, TCP, SCTP and DCCP source and dest port
-++			follow IPv4 header directly */
-++			portp = ((u8*)dsth) + dsth->ihl * 4;
-++
-++			if (use_dest_addr)
-++				portp += sizeof(u16);
-++	} else if (iph->protocol == IPPROTO_ICMP) {
-++		struct icmphdr *ih = (struct icmphdr*)(((u8*)dsth) + dsth->ihl * 4);
-++
-++		/* use icmp identifier as port */
-++		if (((u8*)&ih) <= end && (
-++		    (use_dest_addr && (
-++		    ih->type == ICMP_ECHOREPLY ||
-++			ih->type == ICMP_TIMESTAMPREPLY ||
-++			ih->type == ICMP_INFO_REPLY ||
-++			ih->type == ICMP_ADDRESSREPLY)) ||
-++			(!use_dest_addr && (
-++			ih->type == ICMP_ECHO ||
-++			ih->type == ICMP_TIMESTAMP ||
-++			ih->type == ICMP_INFO_REQUEST ||
-++			ih->type == ICMP_ADDRESS)
-++			)))
-++				portp = (u8*)&ih->un.echo.id;
-++	}
-++
-++	if ((portp && &portp[2] <= end) || psidlen == 0) {
-++		int frombyte = fmr->ip6_prefix_len / 8;
-++		int fromrem = fmr->ip6_prefix_len % 8;
-++		int bytes = sizeof(struct in6_addr) - frombyte;
-++		const u32 *addr = (use_dest_addr) ? &iph->daddr : &iph->saddr;
-++		u64 eabits = ((u64)ntohl(*addr)) << (32 + fmr->ip4_prefix_len);
-++		u64 t = 0;
-++
-++		/* extract PSID from port and add it to eabits */
-++		u16 psidbits = 0;
-++		if (psidlen > 0) {
-++			psidbits = ((u16)portp[0]) << 8 | ((u16)portp[1]);
-++			psidbits >>= 16 - psidlen - fmr->offset;
-++			psidbits = (u16)(psidbits << (16 - psidlen));
-++			eabits |= ((u64)psidbits) << (48 - (fmr->ea_len - psidlen));
-++		}
-++
-++		/* rewrite destination address */
-++		*dest = fmr->ip6_prefix;
-++		memcpy(&dest->s6_addr[10], addr, sizeof(*addr));
-++		dest->s6_addr16[7] = htons(psidbits >> (16 - psidlen));
-++
-++		if (bytes > sizeof(u64))
-++			bytes = sizeof(u64);
-++
-++		/* insert eabits */
-++		memcpy(&t, &dest->s6_addr[frombyte], bytes);
-++		t = be64_to_cpu(t) & ~(((((u64)1) << fmr->ea_len) - 1)
-++			<< (64 - fmr->ea_len - fromrem));
-++		t = cpu_to_be64(t | (eabits >> fromrem));
-++		memcpy(&dest->s6_addr[frombyte], &t, bytes);
-++	}
-++}
-++
-++
-+ static int __ip6_tnl_rcv(struct ip6_tnl *tunnel, struct sk_buff *skb,
-+ 			 const struct tnl_ptk_info *tpi,
-+ 			 struct metadata_dst *tun_dst,
-+@@ -874,6 +1000,27 @@ static int __ip6_tnl_rcv(struct ip6_tnl
-+ 	skb_reset_network_header(skb);
-+ 	memset(skb->cb, 0, sizeof(struct inet6_skb_parm));
-+ 
-++	if (tpi->proto == htons(ETH_P_IP) && tunnel->parms.fmrs &&
-++		!ipv6_addr_equal(&ipv6h->saddr, &tunnel->parms.raddr)) {
-++			/* Packet didn't come from BR, so lookup FMR */
-++			struct __ip6_tnl_fmr *fmr;
-++			struct in6_addr expected = tunnel->parms.raddr;
-++			for (fmr = tunnel->parms.fmrs; fmr; fmr = fmr->next)
-++				if (ipv6_prefix_equal(&ipv6h->saddr,
-++					&fmr->ip6_prefix, fmr->ip6_prefix_len))
-++						break;
-++
-++			/* Check that IPv6 matches IPv4 source to prevent spoofing */
-++			if (fmr)
-++				ip4ip6_fmr_calc(&expected, ip_hdr(skb),
-++						skb_tail_pointer(skb), fmr, false);
-++
-++			if (!ipv6_addr_equal(&ipv6h->saddr, &expected)) {
-++				rcu_read_unlock();
-++				goto drop;
-++			}
-++	}
-++
-+ 	__skb_tunnel_rx(skb, tunnel->dev, tunnel->net);
-+ 
-+ 	err = dscp_ecn_decapsulate(tunnel, ipv6h, skb);
-+@@ -1025,6 +1172,7 @@ static void init_tel_txopt(struct ipv6_t
-+ 	opt->ops.opt_nflen = 8;
-+ }
-+ 
-++
-+ /**
-+  * ip6_tnl_addr_conflict - compare packet addresses to tunnel's own
-+  *   @t: the outgoing tunnel device
-+@@ -1307,6 +1455,7 @@ ipxip6_tnl_xmit(struct sk_buff *skb, str
-+ 		u8 protocol)
-+ {
-+ 	struct ip6_tnl *t = netdev_priv(dev);
-++	struct __ip6_tnl_fmr *fmr;
-+ 	struct ipv6hdr *ipv6h;
-+ 	const struct iphdr  *iph;
-+ 	int encap_limit = -1;
-+@@ -1406,6 +1555,18 @@ ipxip6_tnl_xmit(struct sk_buff *skb, str
-+ 	fl6.flowi6_uid = sock_net_uid(dev_net(dev), NULL);
-+ 	dsfield = INET_ECN_encapsulate(dsfield, orig_dsfield);
-+ 
-++	/* try to find matching FMR */
-++	for (fmr = t->parms.fmrs; fmr; fmr = fmr->next) {
-++		unsigned mshift = 32 - fmr->ip4_prefix_len;
-++		if (ntohl(fmr->ip4_prefix.s_addr) >> mshift ==
-++				ntohl(ip_hdr(skb)->daddr) >> mshift)
-++			break;
-++	}
-++
-++	/* change dstaddr according to FMR */
-++	if (fmr)
-++		ip4ip6_fmr_calc(&fl6.daddr, ip_hdr(skb), skb_tail_pointer(skb), fmr, true);
-++
-+ 	if (iptunnel_handle_offloads(skb, SKB_GSO_IPXIP6))
-+ 		return -1;
-+ 
-+@@ -1556,6 +1717,14 @@ ip6_tnl_change(struct ip6_tnl *t, const
-+ 	t->parms.link = p->link;
-+ 	t->parms.proto = p->proto;
-+ 	t->parms.fwmark = p->fwmark;
-++
-++	while (t->parms.fmrs) {
-++		struct __ip6_tnl_fmr *next = t->parms.fmrs->next;
-++		kfree(t->parms.fmrs);
-++		t->parms.fmrs = next;
-++	}
-++	t->parms.fmrs = p->fmrs;
-++
-+ 	dst_cache_reset(&t->dst_cache);
-+ 	ip6_tnl_link_config(t);
-+ 	return 0;
-+@@ -1594,6 +1763,7 @@ ip6_tnl_parm_from_user(struct __ip6_tnl_
-+ 	p->flowinfo = u->flowinfo;
-+ 	p->link = u->link;
-+ 	p->proto = u->proto;
-++	p->fmrs = NULL;
-+ 	memcpy(p->name, u->name, sizeof(u->name));
-+ }
-+ 
-+@@ -1979,6 +2149,15 @@ static int ip6_tnl_validate(struct nlatt
-+ 	return 0;
-+ }
-+ 
-++static const struct nla_policy ip6_tnl_fmr_policy[IFLA_IPTUN_FMR_MAX + 1] = {
-++	[IFLA_IPTUN_FMR_IP6_PREFIX] = { .len = sizeof(struct in6_addr) },
-++	[IFLA_IPTUN_FMR_IP4_PREFIX] = { .len = sizeof(struct in_addr) },
-++	[IFLA_IPTUN_FMR_IP6_PREFIX_LEN] = { .type = NLA_U8 },
-++	[IFLA_IPTUN_FMR_IP4_PREFIX_LEN] = { .type = NLA_U8 },
-++	[IFLA_IPTUN_FMR_EA_LEN] = { .type = NLA_U8 },
-++	[IFLA_IPTUN_FMR_OFFSET] = { .type = NLA_U8 }
-++};
-++
-+ static void ip6_tnl_netlink_parms(struct nlattr *data[],
-+ 				  struct __ip6_tnl_parm *parms)
-+ {
-+@@ -2016,6 +2195,46 @@ static void ip6_tnl_netlink_parms(struct
-+ 
-+ 	if (data[IFLA_IPTUN_FWMARK])
-+ 		parms->fwmark = nla_get_u32(data[IFLA_IPTUN_FWMARK]);
-++
-++	if (data[IFLA_IPTUN_FMRS]) {
-++		unsigned rem;
-++		struct nlattr *fmr;
-++		nla_for_each_nested(fmr, data[IFLA_IPTUN_FMRS], rem) {
-++			struct nlattr *fmrd[IFLA_IPTUN_FMR_MAX + 1], *c;
-++			struct __ip6_tnl_fmr *nfmr;
-++
-++			nla_parse_nested(fmrd, IFLA_IPTUN_FMR_MAX,
-++				fmr, ip6_tnl_fmr_policy, NULL);
-++
-++			if (!(nfmr = kzalloc(sizeof(*nfmr), GFP_KERNEL)))
-++				continue;
-++
-++			nfmr->offset = 6;
-++
-++			if ((c = fmrd[IFLA_IPTUN_FMR_IP6_PREFIX]))
-++				nla_memcpy(&nfmr->ip6_prefix, fmrd[IFLA_IPTUN_FMR_IP6_PREFIX],
-++					sizeof(nfmr->ip6_prefix));
-++
-++			if ((c = fmrd[IFLA_IPTUN_FMR_IP4_PREFIX]))
-++				nla_memcpy(&nfmr->ip4_prefix, fmrd[IFLA_IPTUN_FMR_IP4_PREFIX],
-++					sizeof(nfmr->ip4_prefix));
-++
-++			if ((c = fmrd[IFLA_IPTUN_FMR_IP6_PREFIX_LEN]))
-++				nfmr->ip6_prefix_len = nla_get_u8(c);
-++
-++			if ((c = fmrd[IFLA_IPTUN_FMR_IP4_PREFIX_LEN]))
-++				nfmr->ip4_prefix_len = nla_get_u8(c);
-++
-++			if ((c = fmrd[IFLA_IPTUN_FMR_EA_LEN]))
-++				nfmr->ea_len = nla_get_u8(c);
-++
-++			if ((c = fmrd[IFLA_IPTUN_FMR_OFFSET]))
-++				nfmr->offset = nla_get_u8(c);
-++
-++			nfmr->next = parms->fmrs;
-++			parms->fmrs = nfmr;
-++		}
-++	}
-+ }
-+ 
-+ static bool ip6_tnl_netlink_encap_parms(struct nlattr *data[],
-+@@ -2131,6 +2350,12 @@ static void ip6_tnl_dellink(struct net_d
-+ 
-+ static size_t ip6_tnl_get_size(const struct net_device *dev)
-+ {
-++	const struct ip6_tnl *t = netdev_priv(dev);
-++	struct __ip6_tnl_fmr *c;
-++	int fmrs = 0;
-++	for (c = t->parms.fmrs; c; c = c->next)
-++		++fmrs;
-++
-+ 	return
-+ 		/* IFLA_IPTUN_LINK */
-+ 		nla_total_size(4) +
-+@@ -2160,6 +2385,24 @@ static size_t ip6_tnl_get_size(const str
-+ 		nla_total_size(0) +
-+ 		/* IFLA_IPTUN_FWMARK */
-+ 		nla_total_size(4) +
-++		/* IFLA_IPTUN_FMRS */
-++		nla_total_size(0) +
-++		(
-++			/* nest */
-++			nla_total_size(0) +
-++			/* IFLA_IPTUN_FMR_IP6_PREFIX */
-++			nla_total_size(sizeof(struct in6_addr)) +
-++			/* IFLA_IPTUN_FMR_IP4_PREFIX */
-++			nla_total_size(sizeof(struct in_addr)) +
-++			/* IFLA_IPTUN_FMR_EA_LEN */
-++			nla_total_size(1) +
-++			/* IFLA_IPTUN_FMR_IP6_PREFIX_LEN */
-++			nla_total_size(1) +
-++			/* IFLA_IPTUN_FMR_IP4_PREFIX_LEN */
-++			nla_total_size(1) +
-++			/* IFLA_IPTUN_FMR_OFFSET */
-++			nla_total_size(1)
-++		) * fmrs +
-+ 		0;
-+ }
-+ 
-+@@ -2167,6 +2410,9 @@ static int ip6_tnl_fill_info(struct sk_b
-+ {
-+ 	struct ip6_tnl *tunnel = netdev_priv(dev);
-+ 	struct __ip6_tnl_parm *parm = &tunnel->parms;
-++	struct __ip6_tnl_fmr *c;
-++	int fmrcnt = 0;
-++	struct nlattr *fmrs;
-+ 
-+ 	if (nla_put_u32(skb, IFLA_IPTUN_LINK, parm->link) ||
-+ 	    nla_put_in6_addr(skb, IFLA_IPTUN_LOCAL, &parm->laddr) ||
-+@@ -2176,9 +2422,27 @@ static int ip6_tnl_fill_info(struct sk_b
-+ 	    nla_put_be32(skb, IFLA_IPTUN_FLOWINFO, parm->flowinfo) ||
-+ 	    nla_put_u32(skb, IFLA_IPTUN_FLAGS, parm->flags) ||
-+ 	    nla_put_u8(skb, IFLA_IPTUN_PROTO, parm->proto) ||
-+-	    nla_put_u32(skb, IFLA_IPTUN_FWMARK, parm->fwmark))
-++	    nla_put_u32(skb, IFLA_IPTUN_FWMARK, parm->fwmark) ||
-++	    !(fmrs = nla_nest_start(skb, IFLA_IPTUN_FMRS)))
-+ 		goto nla_put_failure;
-+ 
-++	for (c = parm->fmrs; c; c = c->next) {
-++		struct nlattr *fmr = nla_nest_start(skb, ++fmrcnt);
-++		if (!fmr ||
-++			nla_put(skb, IFLA_IPTUN_FMR_IP6_PREFIX,
-++				sizeof(c->ip6_prefix), &c->ip6_prefix) ||
-++			nla_put(skb, IFLA_IPTUN_FMR_IP4_PREFIX,
-++				sizeof(c->ip4_prefix), &c->ip4_prefix) ||
-++			nla_put_u8(skb, IFLA_IPTUN_FMR_IP6_PREFIX_LEN, c->ip6_prefix_len) ||
-++			nla_put_u8(skb, IFLA_IPTUN_FMR_IP4_PREFIX_LEN, c->ip4_prefix_len) ||
-++			nla_put_u8(skb, IFLA_IPTUN_FMR_EA_LEN, c->ea_len) ||
-++			nla_put_u8(skb, IFLA_IPTUN_FMR_OFFSET, c->offset))
-++				goto nla_put_failure;
-++
-++		nla_nest_end(skb, fmr);
-++	}
-++	nla_nest_end(skb, fmrs);
-++
-+ 	if (nla_put_u16(skb, IFLA_IPTUN_ENCAP_TYPE, tunnel->encap.type) ||
-+ 	    nla_put_be16(skb, IFLA_IPTUN_ENCAP_SPORT, tunnel->encap.sport) ||
-+ 	    nla_put_be16(skb, IFLA_IPTUN_ENCAP_DPORT, tunnel->encap.dport) ||
-+@@ -2218,6 +2482,7 @@ static const struct nla_policy ip6_tnl_p
-+ 	[IFLA_IPTUN_ENCAP_DPORT]	= { .type = NLA_U16 },
-+ 	[IFLA_IPTUN_COLLECT_METADATA]	= { .type = NLA_FLAG },
-+ 	[IFLA_IPTUN_FWMARK]		= { .type = NLA_U32 },
-++	[IFLA_IPTUN_FMRS]		= { .type = NLA_NESTED },
-+ };
-+ 
-+ static struct rtnl_link_ops ip6_link_ops __read_mostly = {
-diff --git a/target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
-new file mode 100644
-index 0000000000..625cc430e2
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
-@@ -0,0 +1,263 @@
-+From: Jonas Gorski <jogo@openwrt.org>
-+Subject: ipv6: allow rejecting with "source address failed policy"
-+
-+RFC6204 L-14 requires rejecting traffic from invalid addresses with
-+ICMPv6 Destination Unreachable, Code 5 (Source address failed ingress/
-+egress policy) on the LAN side, so add an appropriate rule for that.
-+
-+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
-+---
-+ include/net/netns/ipv6.h       |  1 +
-+ include/uapi/linux/fib_rules.h |  4 +++
-+ include/uapi/linux/rtnetlink.h |  1 +
-+ net/ipv4/fib_semantics.c       |  4 +++
-+ net/ipv4/fib_trie.c            |  1 +
-+ net/ipv4/ipmr.c                |  1 +
-+ net/ipv6/fib6_rules.c          |  4 +++
-+ net/ipv6/ip6mr.c               |  2 ++
-+ net/ipv6/route.c               | 58 +++++++++++++++++++++++++++++++++++++++++-
-+ 9 files changed, 75 insertions(+), 1 deletion(-)
-+
-+--- a/include/net/netns/ipv6.h
-++++ b/include/net/netns/ipv6.h
-+@@ -87,6 +87,7 @@ struct netns_ipv6 {
-+ 	unsigned int		fib6_routes_require_src;
-+ #endif
-+ 	struct rt6_info         *ip6_prohibit_entry;
-++	struct rt6_info		*ip6_policy_failed_entry;
-+ 	struct rt6_info         *ip6_blk_hole_entry;
-+ 	struct fib6_table       *fib6_local_tbl;
-+ 	struct fib_rules_ops    *fib6_rules_ops;
-+--- a/include/uapi/linux/fib_rules.h
-++++ b/include/uapi/linux/fib_rules.h
-+@@ -82,6 +82,10 @@ enum {
-+ 	FR_ACT_BLACKHOLE,	/* Drop without notification */
-+ 	FR_ACT_UNREACHABLE,	/* Drop with ENETUNREACH */
-+ 	FR_ACT_PROHIBIT,	/* Drop with EACCES */
-++	FR_ACT_RES9,
-++	FR_ACT_RES10,
-++	FR_ACT_RES11,
-++	FR_ACT_POLICY_FAILED,	/* Drop with EACCES */
-+ 	__FR_ACT_MAX,
-+ };
-+ 
-+--- a/include/uapi/linux/rtnetlink.h
-++++ b/include/uapi/linux/rtnetlink.h
-+@@ -249,6 +249,7 @@ enum {
-+ 	RTN_THROW,		/* Not in this table		*/
-+ 	RTN_NAT,		/* Translate this address	*/
-+ 	RTN_XRESOLVE,		/* Use external resolver	*/
-++	RTN_POLICY_FAILED,	/* Failed ingress/egress policy */
-+ 	__RTN_MAX
-+ };
-+ 
-+--- a/net/ipv4/fib_semantics.c
-++++ b/net/ipv4/fib_semantics.c
-+@@ -141,6 +141,10 @@ const struct fib_prop fib_props[RTN_MAX
-+ 		.error	= -EINVAL,
-+ 		.scope	= RT_SCOPE_NOWHERE,
-+ 	},
-++	[RTN_POLICY_FAILED] = {
-++		.error	= -EACCES,
-++		.scope	= RT_SCOPE_UNIVERSE,
-++	},
-+ };
-+ 
-+ static void rt_fibinfo_free(struct rtable __rcu **rtp)
-+--- a/net/ipv4/fib_trie.c
-++++ b/net/ipv4/fib_trie.c
-+@@ -2734,6 +2734,7 @@ static const char *const rtn_type_names[
-+ 	[RTN_THROW] = "THROW",
-+ 	[RTN_NAT] = "NAT",
-+ 	[RTN_XRESOLVE] = "XRESOLVE",
-++	[RTN_POLICY_FAILED] = "POLICY_FAILED",
-+ };
-+ 
-+ static inline const char *rtn_type(char *buf, size_t len, unsigned int t)
-+--- a/net/ipv4/ipmr.c
-++++ b/net/ipv4/ipmr.c
-+@@ -175,6 +175,7 @@ static int ipmr_rule_action(struct fib_r
-+ 	case FR_ACT_UNREACHABLE:
-+ 		return -ENETUNREACH;
-+ 	case FR_ACT_PROHIBIT:
-++	case FR_ACT_POLICY_FAILED:
-+ 		return -EACCES;
-+ 	case FR_ACT_BLACKHOLE:
-+ 	default:
-+--- a/net/ipv6/fib6_rules.c
-++++ b/net/ipv6/fib6_rules.c
-+@@ -220,6 +220,10 @@ static int __fib6_rule_action(struct fib
-+ 		err = -EACCES;
-+ 		rt = net->ipv6.ip6_prohibit_entry;
-+ 		goto discard_pkt;
-++	case FR_ACT_POLICY_FAILED:
-++		err = -EACCES;
-++		rt = net->ipv6.ip6_policy_failed_entry;
-++		goto discard_pkt;
-+ 	}
-+ 
-+ 	tb_id = fib_rule_get_table(rule, arg);
-+--- a/net/ipv6/ip6mr.c
-++++ b/net/ipv6/ip6mr.c
-+@@ -163,6 +163,8 @@ static int ip6mr_rule_action(struct fib_
-+ 		return -ENETUNREACH;
-+ 	case FR_ACT_PROHIBIT:
-+ 		return -EACCES;
-++	case FR_ACT_POLICY_FAILED:
-++		return -EACCES;
-+ 	case FR_ACT_BLACKHOLE:
-+ 	default:
-+ 		return -EINVAL;
-+--- a/net/ipv6/route.c
-++++ b/net/ipv6/route.c
-+@@ -94,6 +94,8 @@ static int		ip6_pkt_discard(struct sk_bu
-+ static int		ip6_pkt_discard_out(struct net *net, struct sock *sk, struct sk_buff *skb);
-+ static int		ip6_pkt_prohibit(struct sk_buff *skb);
-+ static int		ip6_pkt_prohibit_out(struct net *net, struct sock *sk, struct sk_buff *skb);
-++static int		ip6_pkt_policy_failed(struct sk_buff *skb);
-++static int		ip6_pkt_policy_failed_out(struct net *net, struct sock *sk, struct sk_buff *skb);
-+ static void		ip6_link_failure(struct sk_buff *skb);
-+ static void		ip6_rt_update_pmtu(struct dst_entry *dst, struct sock *sk,
-+ 					   struct sk_buff *skb, u32 mtu,
-+@@ -309,6 +311,18 @@ static const struct rt6_info ip6_prohibi
-+ 	.rt6i_flags	= (RTF_REJECT | RTF_NONEXTHOP),
-+ };
-+ 
-++static const struct rt6_info ip6_policy_failed_entry_template = {
-++	.dst = {
-++		.__refcnt	= ATOMIC_INIT(1),
-++		.__use		= 1,
-++		.obsolete	= DST_OBSOLETE_FORCE_CHK,
-++		.error		= -EACCES,
-++		.input		= ip6_pkt_policy_failed,
-++		.output		= ip6_pkt_policy_failed_out,
-++	},
-++	.rt6i_flags	= (RTF_REJECT | RTF_NONEXTHOP),
-++};
-++
-+ static const struct rt6_info ip6_blk_hole_entry_template = {
-+ 	.dst = {
-+ 		.__refcnt	= ATOMIC_INIT(1),
-+@@ -1030,6 +1044,7 @@ static const int fib6_prop[RTN_MAX + 1]
-+ 	[RTN_BLACKHOLE]	= -EINVAL,
-+ 	[RTN_UNREACHABLE] = -EHOSTUNREACH,
-+ 	[RTN_PROHIBIT]	= -EACCES,
-++	[RTN_POLICY_FAILED] = -EACCES,
-+ 	[RTN_THROW]	= -EAGAIN,
-+ 	[RTN_NAT]	= -EINVAL,
-+ 	[RTN_XRESOLVE]	= -EINVAL,
-+@@ -1065,6 +1080,10 @@ static void ip6_rt_init_dst_reject(struc
-+ 		rt->dst.output = ip6_pkt_prohibit_out;
-+ 		rt->dst.input = ip6_pkt_prohibit;
-+ 		break;
-++	case RTN_POLICY_FAILED:
-++		rt->dst.output = ip6_pkt_policy_failed_out;
-++		rt->dst.input = ip6_pkt_policy_failed;
-++		break;
-+ 	case RTN_THROW:
-+ 	case RTN_UNREACHABLE:
-+ 	default:
-+@@ -4414,6 +4433,17 @@ static int ip6_pkt_prohibit_out(struct n
-+ 	return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES);
-+ }
-+ 
-++static int ip6_pkt_policy_failed(struct sk_buff *skb)
-++{
-++	return ip6_pkt_drop(skb, ICMPV6_POLICY_FAIL, IPSTATS_MIB_INNOROUTES);
-++}
-++
-++static int ip6_pkt_policy_failed_out(struct net *net, struct sock *sk, struct sk_buff *skb)
-++{
-++	skb->dev = skb_dst(skb)->dev;
-++	return ip6_pkt_drop(skb, ICMPV6_POLICY_FAIL, IPSTATS_MIB_OUTNOROUTES);
-++}
-++
-+ /*
-+  *	Allocate a dst for local (unicast / anycast) address.
-+  */
-+@@ -4894,7 +4924,8 @@ static int rtm_to_fib6_config(struct sk_
-+ 	if (rtm->rtm_type == RTN_UNREACHABLE ||
-+ 	    rtm->rtm_type == RTN_BLACKHOLE ||
-+ 	    rtm->rtm_type == RTN_PROHIBIT ||
-+-	    rtm->rtm_type == RTN_THROW)
-++	    rtm->rtm_type == RTN_THROW ||
-++	    rtm->rtm_type == RTN_POLICY_FAILED)
-+ 		cfg->fc_flags |= RTF_REJECT;
-+ 
-+ 	if (rtm->rtm_type == RTN_LOCAL)
-+@@ -6062,6 +6093,8 @@ static int ip6_route_dev_notify(struct n
-+ #ifdef CONFIG_IPV6_MULTIPLE_TABLES
-+ 		net->ipv6.ip6_prohibit_entry->dst.dev = dev;
-+ 		net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev);
-++		net->ipv6.ip6_policy_failed_entry->dst.dev = dev;
-++		net->ipv6.ip6_policy_failed_entry->rt6i_idev = in6_dev_get(dev);
-+ 		net->ipv6.ip6_blk_hole_entry->dst.dev = dev;
-+ 		net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev);
-+ #endif
-+@@ -6073,6 +6106,7 @@ static int ip6_route_dev_notify(struct n
-+ 		in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev);
-+ #ifdef CONFIG_IPV6_MULTIPLE_TABLES
-+ 		in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev);
-++		in6_dev_put_clear(&net->ipv6.ip6_policy_failed_entry->rt6i_idev);
-+ 		in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev);
-+ #endif
-+ 	}
-+@@ -6264,6 +6298,8 @@ static int __net_init ip6_route_net_init
-+ 
-+ #ifdef CONFIG_IPV6_MULTIPLE_TABLES
-+ 	net->ipv6.fib6_has_custom_rules = false;
-++
-++
-+ 	net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template,
-+ 					       sizeof(*net->ipv6.ip6_prohibit_entry),
-+ 					       GFP_KERNEL);
-+@@ -6274,11 +6310,21 @@ static int __net_init ip6_route_net_init
-+ 			 ip6_template_metrics, true);
-+ 	INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->rt6i_uncached);
-+ 
-++	net->ipv6.ip6_policy_failed_entry =
-++				kmemdup(&ip6_policy_failed_entry_template,
-++				sizeof(*net->ipv6.ip6_policy_failed_entry), GFP_KERNEL);
-++	if (!net->ipv6.ip6_policy_failed_entry)
-++		goto out_ip6_prohibit_entry;
-++	net->ipv6.ip6_policy_failed_entry->dst.ops = &net->ipv6.ip6_dst_ops;
-++	dst_init_metrics(&net->ipv6.ip6_policy_failed_entry->dst,
-++			 ip6_template_metrics, true);
-++	INIT_LIST_HEAD(&net->ipv6.ip6_policy_failed_entry->rt6i_uncached);
-++
-+ 	net->ipv6.ip6_blk_hole_entry = kmemdup(&ip6_blk_hole_entry_template,
-+ 					       sizeof(*net->ipv6.ip6_blk_hole_entry),
-+ 					       GFP_KERNEL);
-+ 	if (!net->ipv6.ip6_blk_hole_entry)
-+-		goto out_ip6_prohibit_entry;
-++		goto out_ip6_policy_failed_entry;
-+ 	net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops;
-+ 	dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst,
-+ 			 ip6_template_metrics, true);
-+@@ -6305,6 +6351,8 @@ out:
-+ 	return ret;
-+ 
-+ #ifdef CONFIG_IPV6_MULTIPLE_TABLES
-++out_ip6_policy_failed_entry:
-++	kfree(net->ipv6.ip6_policy_failed_entry);
-+ out_ip6_prohibit_entry:
-+ 	kfree(net->ipv6.ip6_prohibit_entry);
-+ out_ip6_null_entry:
-+@@ -6324,6 +6372,7 @@ static void __net_exit ip6_route_net_exi
-+ 	kfree(net->ipv6.ip6_null_entry);
-+ #ifdef CONFIG_IPV6_MULTIPLE_TABLES
-+ 	kfree(net->ipv6.ip6_prohibit_entry);
-++	kfree(net->ipv6.ip6_policy_failed_entry);
-+ 	kfree(net->ipv6.ip6_blk_hole_entry);
-+ #endif
-+ 	dst_entries_destroy(&net->ipv6.ip6_dst_ops);
-+@@ -6401,6 +6450,9 @@ void __init ip6_route_init_special_entri
-+ 	init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
-+ 	init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev;
-+ 	init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
-++	init_net.ipv6.ip6_policy_failed_entry->dst.dev = init_net.loopback_dev;
-++	init_net.ipv6.ip6_policy_failed_entry->rt6i_idev =
-++		in6_dev_get(init_net.loopback_dev);
-+   #endif
-+ }
-+ 
-diff --git a/target/linux/generic/pending-5.10/671-net-provide-defines-for-_POLICY_FAILED-until-all-cod.patch b/target/linux/generic/pending-5.10/671-net-provide-defines-for-_POLICY_FAILED-until-all-cod.patch
-new file mode 100644
-index 0000000000..0e7f35db89
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/671-net-provide-defines-for-_POLICY_FAILED-until-all-cod.patch
-@@ -0,0 +1,50 @@
-+From: Jonas Gorski <jogo@openwrt.org>
-+Subject: net: provide defines for _POLICY_FAILED until all code is updated
-+
-+Upstream introduced ICMPV6_POLICY_FAIL for code 5 of destination
-+unreachable, conflicting with our name.
-+
-+Add appropriate defines to allow our code to build with the new
-+name until we have updated our local patches for older kernels
-+and userspace packages.
-+
-+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
-+---
-+ include/uapi/linux/fib_rules.h | 2 ++
-+ include/uapi/linux/icmpv6.h    | 2 ++
-+ include/uapi/linux/rtnetlink.h | 2 ++
-+ 3 files changed, 6 insertions(+)
-+
-+--- a/include/uapi/linux/fib_rules.h
-++++ b/include/uapi/linux/fib_rules.h
-+@@ -89,6 +89,8 @@ enum {
-+ 	__FR_ACT_MAX,
-+ };
-+ 
-++#define FR_ACT_FAILED_POLICY FR_ACT_POLICY_FAILED
-++
-+ #define FR_ACT_MAX (__FR_ACT_MAX - 1)
-+ 
-+ #endif
-+--- a/include/uapi/linux/icmpv6.h
-++++ b/include/uapi/linux/icmpv6.h
-+@@ -126,6 +126,8 @@ struct icmp6hdr {
-+ #define ICMPV6_POLICY_FAIL		5
-+ #define ICMPV6_REJECT_ROUTE		6
-+ 
-++#define ICMPV6_FAILED_POLICY		ICMPV6_POLICY_FAIL
-++
-+ /*
-+  *	Codes for Time Exceeded
-+  */
-+--- a/include/uapi/linux/rtnetlink.h
-++++ b/include/uapi/linux/rtnetlink.h
-+@@ -253,6 +253,8 @@ enum {
-+ 	__RTN_MAX
-+ };
-+ 
-++#define RTN_FAILED_POLICY RTN_POLICY_FAILED
-++
-+ #define RTN_MAX (__RTN_MAX - 1)
-+ 
-+ 
-diff --git a/target/linux/generic/pending-5.10/680-NET-skip-GRO-for-foreign-MAC-addresses.patch b/target/linux/generic/pending-5.10/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
-new file mode 100644
-index 0000000000..4e1ae4b2c8
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
-@@ -0,0 +1,149 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: net: replace GRO optimization patch with a new one that supports VLANs/bridges with different MAC addresses
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ include/linux/netdevice.h |  2 ++
-+ include/linux/skbuff.h    |  3 ++-
-+ net/core/dev.c            | 48 +++++++++++++++++++++++++++++++++++++++++++++++
-+ net/ethernet/eth.c        | 18 +++++++++++++++++-
-+ 4 files changed, 69 insertions(+), 2 deletions(-)
-+
-+--- a/include/linux/netdevice.h
-++++ b/include/linux/netdevice.h
-+@@ -2029,6 +2029,8 @@ struct net_device {
-+ 	struct netdev_hw_addr_list	mc;
-+ 	struct netdev_hw_addr_list	dev_addrs;
-+ 
-++	unsigned char		local_addr_mask[MAX_ADDR_LEN];
-++
-+ #ifdef CONFIG_SYSFS
-+ 	struct kset		*queues_kset;
-+ #endif
-+--- a/include/linux/skbuff.h
-++++ b/include/linux/skbuff.h
-+@@ -858,6 +858,7 @@ struct sk_buff {
-+ #ifdef CONFIG_TLS_DEVICE
-+ 	__u8			decrypted:1;
-+ #endif
-++	__u8			gro_skip:1;
-+ 
-+ #ifdef CONFIG_NET_SCHED
-+ 	__u16			tc_index;	/* traffic control index */
-+--- a/net/core/dev.c
-++++ b/net/core/dev.c
-+@@ -6017,6 +6017,9 @@ static enum gro_result dev_gro_receive(s
-+ 	int same_flow;
-+ 	int grow;
-+ 
-++	if (skb->gro_skip)
-++		goto normal;
-++
-+ 	if (netif_elide_gro(skb->dev))
-+ 		goto normal;
-+ 
-+@@ -7985,6 +7988,48 @@ static void __netdev_adjacent_dev_unlink
-+ 					   &upper_dev->adj_list.lower);
-+ }
-+ 
-++static void __netdev_addr_mask(unsigned char *mask, const unsigned char *addr,
-++			       struct net_device *dev)
-++{
-++	int i;
-++
-++	for (i = 0; i < dev->addr_len; i++)
-++		mask[i] |= addr[i] ^ dev->dev_addr[i];
-++}
-++
-++static void __netdev_upper_mask(unsigned char *mask, struct net_device *dev,
-++				struct net_device *lower)
-++{
-++	struct net_device *cur;
-++	struct list_head *iter;
-++
-++	netdev_for_each_upper_dev_rcu(dev, cur, iter) {
-++		__netdev_addr_mask(mask, cur->dev_addr, lower);
-++		__netdev_upper_mask(mask, cur, lower);
-++	}
-++}
-++
-++static void __netdev_update_addr_mask(struct net_device *dev)
-++{
-++	unsigned char mask[MAX_ADDR_LEN];
-++	struct net_device *cur;
-++	struct list_head *iter;
-++
-++	memset(mask, 0, sizeof(mask));
-++	__netdev_upper_mask(mask, dev, dev);
-++	memcpy(dev->local_addr_mask, mask, dev->addr_len);
-++
-++	netdev_for_each_lower_dev(dev, cur, iter)
-++		__netdev_update_addr_mask(cur);
-++}
-++
-++static void netdev_update_addr_mask(struct net_device *dev)
-++{
-++	rcu_read_lock();
-++	__netdev_update_addr_mask(dev);
-++	rcu_read_unlock();
-++}
-++
-+ static int __netdev_upper_dev_link(struct net_device *dev,
-+ 				   struct net_device *upper_dev, bool master,
-+ 				   void *upper_priv, void *upper_info,
-+@@ -8036,6 +8081,7 @@ static int __netdev_upper_dev_link(struc
-+ 	if (ret)
-+ 		return ret;
-+ 
-++	netdev_update_addr_mask(dev);
-+ 	ret = call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
-+ 					    &changeupper_info.info);
-+ 	ret = notifier_to_errno(ret);
-+@@ -8132,6 +8178,7 @@ static void __netdev_upper_dev_unlink(st
-+ 
-+ 	__netdev_adjacent_dev_unlink_neighbour(dev, upper_dev);
-+ 
-++	netdev_update_addr_mask(dev);
-+ 	call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
-+ 				      &changeupper_info.info);
-+ 
-+@@ -8918,6 +8965,7 @@ int dev_set_mac_address(struct net_devic
-+ 	if (err)
-+ 		return err;
-+ 	dev->addr_assign_type = NET_ADDR_SET;
-++	netdev_update_addr_mask(dev);
-+ 	call_netdevice_notifiers(NETDEV_CHANGEADDR, dev);
-+ 	add_device_randomness(dev->dev_addr, dev->addr_len);
-+ 	return 0;
-+--- a/net/ethernet/eth.c
-++++ b/net/ethernet/eth.c
-+@@ -143,6 +143,18 @@ u32 eth_get_headlen(const struct net_dev
-+ }
-+ EXPORT_SYMBOL(eth_get_headlen);
-+ 
-++static inline bool
-++eth_check_local_mask(const void *addr1, const void *addr2, const void *mask)
-++{
-++	const u16 *a1 = addr1;
-++	const u16 *a2 = addr2;
-++	const u16 *m = mask;
-++
-++	return (((a1[0] ^ a2[0]) & ~m[0]) |
-++		((a1[1] ^ a2[1]) & ~m[1]) |
-++		((a1[2] ^ a2[2]) & ~m[2]));
-++}
-++
-+ /**
-+  * eth_type_trans - determine the packet's protocol ID.
-+  * @skb: received socket data
-+@@ -174,6 +186,10 @@ __be16 eth_type_trans(struct sk_buff *sk
-+ 		} else {
-+ 			skb->pkt_type = PACKET_OTHERHOST;
-+ 		}
-++
-++		if (eth_check_local_mask(eth->h_dest, dev->dev_addr,
-++					 dev->local_addr_mask))
-++			skb->gro_skip = 1;
-+ 	}
-+ 
-+ 	/*
-diff --git a/target/linux/generic/pending-5.10/681-NET-add-of_get_mac_address_mtd.patch b/target/linux/generic/pending-5.10/681-NET-add-of_get_mac_address_mtd.patch
-new file mode 100644
-index 0000000000..71fbfe9978
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/681-NET-add-of_get_mac_address_mtd.patch
-@@ -0,0 +1,135 @@
-+From: John Crispin <blogic@openwrt.org>
-+Subject: NET: add mtd-mac-address support to of_get_mac_address()
-+
-+Many embedded devices have information such as mac addresses stored inside mtd
-+devices. This patch allows us to add a property inside a node describing a
-+network interface. The new property points at a mtd partition with an offset
-+where the mac address can be found.
-+
-+Signed-off-by: John Crispin <blogic@openwrt.org>
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ drivers/of/of_net.c    |   37 +++++++++++++++++++++++++++++++++++++
-+ include/linux/of_net.h |    1 +
-+ 2 files changed, 38 insertions(+)
-+
-+--- a/drivers/of/of_net.c
-++++ b/drivers/of/of_net.c
-+@@ -11,6 +11,7 @@
-+ #include <linux/phy.h>
-+ #include <linux/export.h>
-+ #include <linux/device.h>
-++#include <linux/mtd/mtd.h>
-+ 
-+ /**
-+  * of_get_phy_mode - Get phy mode for given device_node
-+@@ -45,7 +46,7 @@ int of_get_phy_mode(struct device_node *
-+ }
-+ EXPORT_SYMBOL_GPL(of_get_phy_mode);
-+ 
-+-static const void *of_get_mac_addr(struct device_node *np, const char *name)
-++static void *of_get_mac_addr(struct device_node *np, const char *name)
-+ {
-+ 	struct property *pp = of_find_property(np, name, NULL);
-+ 
-+@@ -78,6 +79,79 @@ static const void *of_get_mac_addr_nvmem
-+ 	return mac;
-+ }
-+ 
-++static const void *of_get_mac_address_mtd(struct device_node *np)
-++{
-++#ifdef CONFIG_MTD
-++	struct device_node *mtd_np = NULL;
-++	struct property *prop;
-++	size_t retlen;
-++	int size, ret;
-++	struct mtd_info *mtd;
-++	const char *part;
-++	const __be32 *list;
-++	phandle phandle;
-++	u32 mac_inc = 0;
-++	u8 mac[ETH_ALEN];
-++	void *addr;
-++	u32 inc_idx;
-++
-++	list = of_get_property(np, "mtd-mac-address", &size);
-++	if (!list || (size != (2 * sizeof(*list))))
-++		return NULL;
-++
-++	phandle = be32_to_cpup(list++);
-++	if (phandle)
-++		mtd_np = of_find_node_by_phandle(phandle);
-++
-++	if (!mtd_np)
-++		return NULL;
-++
-++	part = of_get_property(mtd_np, "label", NULL);
-++	if (!part)
-++		part = mtd_np->name;
-++
-++	mtd = get_mtd_device_nm(part);
-++	if (IS_ERR(mtd))
-++		return NULL;
-++
-++	ret = mtd_read(mtd, be32_to_cpup(list), 6, &retlen, mac);
-++	put_mtd_device(mtd);
-++
-++	if (of_property_read_u32(np, "mtd-mac-address-increment-byte", &inc_idx))
-++		inc_idx = 5;
-++	if (inc_idx > 5)
-++		return NULL;
-++
-++	if (!of_property_read_u32(np, "mtd-mac-address-increment", &mac_inc))
-++		mac[inc_idx] += mac_inc;
-++
-++	if (!is_valid_ether_addr(mac))
-++		return NULL;
-++
-++	addr = of_get_mac_addr(np, "mac-address");
-++	if (addr) {
-++		memcpy(addr, mac, ETH_ALEN);
-++		return addr;
-++	}
-++
-++	prop = kzalloc(sizeof(*prop), GFP_KERNEL);
-++	if (!prop)
-++		return NULL;
-++
-++	prop->name = "mac-address";
-++	prop->length = ETH_ALEN;
-++	prop->value = kmemdup(mac, ETH_ALEN, GFP_KERNEL);
-++	if (!prop->value || of_add_property(np, prop))
-++		goto free;
-++
-++	return prop->value;
-++free:
-++	kfree(prop->value);
-++	kfree(prop);
-++#endif
-++	return NULL;
-++}
-++
-+ /**
-+  * Search the device tree for the best MAC address to use.  'mac-address' is
-+  * checked first, because that is supposed to contain to "most recent" MAC
-+@@ -98,12 +172,20 @@ static const void *of_get_mac_addr_nvmem
-+  * this case, the real MAC is in 'local-mac-address', and 'mac-address' exists
-+  * but is all zeros.
-+  *
-++ *
-++ * If a mtd-mac-address property exists, try to fetch the MAC address from the
-++ * specified mtd device, and store it as a 'mac-address' property
-++ *
-+  * Return: Will be a valid pointer on success and ERR_PTR in case of error.
-+ */
-+ const void *of_get_mac_address(struct device_node *np)
-+ {
-+ 	const void *addr;
-+ 
-++	addr = of_get_mac_address_mtd(np);
-++	if (addr)
-++		return addr;
-++
-+ 	addr = of_get_mac_addr(np, "mac-address");
-+ 	if (addr)
-+ 		return addr;
-diff --git a/target/linux/generic/pending-5.10/703-phy-add-detach-callback-to-struct-phy_driver.patch b/target/linux/generic/pending-5.10/703-phy-add-detach-callback-to-struct-phy_driver.patch
-new file mode 100644
-index 0000000000..9aa54082a5
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/703-phy-add-detach-callback-to-struct-phy_driver.patch
-@@ -0,0 +1,38 @@
-+From: Gabor Juhos <juhosg@openwrt.org>
-+Subject: generic: add detach callback to struct phy_driver
-+
-+lede-commit: fe61fc2d7d0b3fb348b502f68f98243b3ddf5867
-+
-+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-+---
-+ drivers/net/phy/phy_device.c | 3 +++
-+ include/linux/phy.h          | 6 ++++++
-+ 2 files changed, 9 insertions(+)
-+
-+--- a/drivers/net/phy/phy_device.c
-++++ b/drivers/net/phy/phy_device.c
-+@@ -1651,6 +1651,9 @@ void phy_detach(struct phy_device *phyde
-+ 	struct module *ndev_owner = NULL;
-+ 	struct mii_bus *bus;
-+ 
-++	if (phydev->drv && phydev->drv->detach)
-++		phydev->drv->detach(phydev);
-++
-+ 	if (phydev->sysfs_links) {
-+ 		if (dev)
-+ 			sysfs_remove_link(&dev->dev.kobj, "phydev");
-+--- a/include/linux/phy.h
-++++ b/include/linux/phy.h
-+@@ -761,6 +761,12 @@ struct phy_driver {
-+ 	/** @handle_interrupt: Override default interrupt handling */
-+ 	irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
-+ 
-++	/*
-++	 * Called before an ethernet device is detached
-++	 * from the PHY.
-++	 */
-++	void (*detach)(struct phy_device *phydev);
-++
-+ 	/** @remove: Clears up any memory if needed */
-+ 	void (*remove)(struct phy_device *phydev);
-+ 
-diff --git a/target/linux/generic/pending-5.10/735-net-phy-at803x-fix-at8033-sgmii-mode.patch b/target/linux/generic/pending-5.10/735-net-phy-at803x-fix-at8033-sgmii-mode.patch
-new file mode 100644
-index 0000000000..b063b10251
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/735-net-phy-at803x-fix-at8033-sgmii-mode.patch
-@@ -0,0 +1,51 @@
-+From: Roman Yeryomin <roman@advem.lv>
-+Subject: kernel: add at803x fix for sgmii mode
-+
-+Some (possibly broken) bootloaders incorreclty initialize at8033
-+phy. This patch enables sgmii autonegotiation mode.
-+
-+[john@phrozen.org: felix added this to his upstream queue]
-+
-+Signed-off-by: Roman Yeryomin <roman@advem.lv>
-+---
-+ drivers/net/phy/at803x.c | 25 +++++++++++++++++++++++++
-+ 1 file changed, 25 insertions(+)
-+
-+--- a/drivers/net/phy/at803x.c
-++++ b/drivers/net/phy/at803x.c
-+@@ -76,6 +76,7 @@
-+ #define AT803X_LOC_MAC_ADDR_32_47_OFFSET	0x804A
-+ #define AT803X_REG_CHIP_CONFIG			0x1f
-+ #define AT803X_BT_BX_REG_SEL			0x8000
-++#define AT803X_SGMII_ANEG_EN			0x1000
-+ 
-+ #define AT803X_DEBUG_ADDR			0x1D
-+ #define AT803X_DEBUG_DATA			0x1E
-+@@ -562,6 +563,27 @@ static int at8031_pll_config(struct phy_
-+ static int at803x_config_init(struct phy_device *phydev)
-+ {
-+ 	int ret;
-++	u32 v;
-++
-++	if (phydev->drv->phy_id == ATH8031_PHY_ID &&
-++		phydev->interface == PHY_INTERFACE_MODE_SGMII)
-++	{
-++		v = phy_read(phydev, AT803X_REG_CHIP_CONFIG);
-++		/* select SGMII/fiber page */
-++		ret = phy_write(phydev, AT803X_REG_CHIP_CONFIG,
-++						v & ~AT803X_BT_BX_REG_SEL);
-++		if (ret)
-++			return ret;
-++		/* enable SGMII autonegotiation */
-++		ret = phy_write(phydev, MII_BMCR, AT803X_SGMII_ANEG_EN);
-++		if (ret)
-++			return ret;
-++		/* select copper page */
-++		ret = phy_write(phydev, AT803X_REG_CHIP_CONFIG,
-++						v | AT803X_BT_BX_REG_SEL);
-++		if (ret)
-++			return ret;
-++	}
-+ 
-+ 	/* The RX and TX delay default is:
-+ 	 *   after HW reset: RX delay enabled and TX delay disabled
-diff --git a/target/linux/generic/pending-5.10/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch b/target/linux/generic/pending-5.10/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch
-new file mode 100644
-index 0000000000..42b91fe4c3
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch
-@@ -0,0 +1,27 @@
-+From a1b291f3f6c80a6c5ccad7283fc472d77a2a4763 Mon Sep 17 00:00:00 2001
-+From: Russell King <rmk+kernel@armlinux.org.uk>
-+Date: Sun, 22 Dec 2019 12:40:11 +0000
-+Subject: [PATCH] net: dsa: mv88e6xxx: fix vlan setup
-+
-+Provide an option that drivers can set to indicate they want to receive
-+vlan configuration even when vlan filtering is disabled. This is safe
-+for Marvell DSA bridges, which do not look up ingress traffic in the
-+VTU if the port is in 8021Q disabled state. Whether this change is
-+suitable for all DSA bridges is not known.
-+
-+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
-+Signed-off-by: DENG Qingfang <dqfext@gmail.com>
-+---
-+ drivers/net/dsa/mv88e6xxx/chip.c |  1 +
-+ 1 file changed, 1 insertion(+)
-+
-+--- a/drivers/net/dsa/mv88e6xxx/chip.c
-++++ b/drivers/net/dsa/mv88e6xxx/chip.c
-+@@ -2857,6 +2857,7 @@ static int mv88e6xxx_setup(struct dsa_sw
-+ 
-+ 	chip->ds = ds;
-+ 	ds->slave_mii_bus = mv88e6xxx_default_mdio_bus(chip);
-++	ds->configure_vlan_while_not_filtering = true;
-+ 
-+ 	mv88e6xxx_reg_lock(chip);
-+ 
-diff --git a/target/linux/generic/pending-5.10/761-net-dsa-mt7530-Support-EEE-features.patch b/target/linux/generic/pending-5.10/761-net-dsa-mt7530-Support-EEE-features.patch
-new file mode 100644
-index 0000000000..3e654f4b04
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/761-net-dsa-mt7530-Support-EEE-features.patch
-@@ -0,0 +1,121 @@
-+From 9cfb2d426c38272f245e9e6f62b3552d1ed5852b Mon Sep 17 00:00:00 2001
-+From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
-+Date: Tue, 21 Apr 2020 00:18:08 +0200
-+Subject: [PATCH] net: dsa: mt7530: Support EEE features
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+Signed-off-by: René van Dorst <opensource@vdorst.com>
-+--- a/drivers/net/dsa/mt7530.c
-++++ b/drivers/net/dsa/mt7530.c
-+@@ -2264,9 +2264,13 @@ static void mt753x_phylink_mac_link_up(s
-+ 	switch (speed) {
-+ 	case SPEED_1000:
-+ 		mcr |= PMCR_FORCE_SPEED_1000;
-++		if (priv->eee_enable & BIT(port))
-++			mcr |= PMCR_FORCE_EEE1G;
-+ 		break;
-+ 	case SPEED_100:
-+ 		mcr |= PMCR_FORCE_SPEED_100;
-++		if (priv->eee_enable & BIT(port))
-++			mcr |= PMCR_FORCE_EEE100;
-+ 		break;
-+ 	}
-+ 	if (duplex == DUPLEX_FULL) {
-+@@ -2507,6 +2511,54 @@ mt753x_phy_write(struct dsa_switch *ds,
-+ 	return priv->info->phy_write(ds, port, regnum, val);
-+ }
-+ 
-++static int mt7530_get_mac_eee(struct dsa_switch *ds, int port,
-++			      struct ethtool_eee *e)
-++{
-++	struct mt7530_priv *priv = ds->priv;
-++	u32 eeecr, pmsr;
-++
-++	e->eee_enabled = !!(priv->eee_enable & BIT(port));
-++
-++	if (e->eee_enabled) {
-++		eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
-++		e->tx_lpi_enabled = !(eeecr & LPI_MODE_EN);
-++		e->tx_lpi_timer   = (eeecr >> 4) & 0xFFF;
-++		pmsr = mt7530_read(priv, MT7530_PMSR_P(port));
-++		e->eee_active  = e->eee_enabled && !!(pmsr & PMSR_EEE1G);
-++	} else {
-++		e->tx_lpi_enabled = 0;
-++		e->tx_lpi_timer = 0;
-++		e->eee_active = 0;
-++	}
-++
-++	return 0;
-++}
-++
-++static int mt7530_set_mac_eee(struct dsa_switch *ds, int port,
-++			      struct ethtool_eee *e)
-++{
-++	struct mt7530_priv *priv = ds->priv;
-++	u32 eeecr;
-++
-++	if (e->tx_lpi_enabled && e->tx_lpi_timer > 0xFFF)
-++		return -EINVAL;
-++
-++	if (e->eee_enabled) {
-++		priv->eee_enable |= BIT(port);
-++		//MT7530_PMEEECR_P
-++		eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
-++		eeecr &= 0xFFFF0000;
-++		if (!e->tx_lpi_enabled)
-++			eeecr |= LPI_MODE_EN;
-++		eeecr = LPI_THRESH(e->tx_lpi_timer);
-++		mt7530_write(priv, MT7530_PMEEECR_P(port), eeecr);
-++	} else {
-++		priv->eee_enable &= ~(BIT(port));
-++	}
-++
-++	return 0;
-++}
-++
-+ static const struct dsa_switch_ops mt7530_switch_ops = {
-+ 	.get_tag_protocol	= mtk_get_tag_protocol,
-+ 	.setup			= mt753x_setup,
-+@@ -2535,6 +2587,8 @@ static const struct dsa_switch_ops mt753
-+ 	.phylink_mac_an_restart	= mt753x_phylink_mac_an_restart,
-+ 	.phylink_mac_link_down	= mt753x_phylink_mac_link_down,
-+ 	.phylink_mac_link_up	= mt753x_phylink_mac_link_up,
-++	.get_mac_eee		= mt7530_get_mac_eee,
-++	.set_mac_eee		= mt7530_set_mac_eee,
-+ };
-+ 
-+ static const struct mt753x_info mt753x_table[] = {
-+--- a/drivers/net/dsa/mt7530.h
-++++ b/drivers/net/dsa/mt7530.h
-+@@ -240,6 +240,8 @@ enum mt7530_vlan_port_attr {
-+ #define  PMCR_RX_EN			BIT(13)
-+ #define  PMCR_BACKOFF_EN		BIT(9)
-+ #define  PMCR_BACKPR_EN			BIT(8)
-++#define  PMCR_FORCE_EEE1G		BIT(7)
-++#define  PMCR_FORCE_EEE100		BIT(6)
-+ #define  PMCR_TX_FC_EN			BIT(5)
-+ #define  PMCR_RX_FC_EN			BIT(4)
-+ #define  PMCR_FORCE_SPEED_1000		BIT(3)
-+@@ -289,6 +291,12 @@ enum mt7530_vlan_port_attr {
-+ #define MT7531_DBG_CNT(x)		(0x3018 + (x) * 0x100)
-+ #define  MT7531_DIS_CLR			BIT(31)
-+ 
-++#define MT7530_PMEEECR_P(x)		(0x3004 + (x) * 0x100)
-++#define  WAKEUP_TIME_1000(x)		((x & 0xFF) << 24)
-++#define  WAKEUP_TIME_100(x)		((x & 0xFF) << 16)
-++#define  LPI_THRESH(x)			((x & 0xFFF) << 4)
-++#define  LPI_MODE_EN			BIT(0)
-++
-+ /* Register for MIB */
-+ #define MT7530_PORT_MIB_COUNTER(x)	(0x4000 + (x) * 0x100)
-+ #define MT7530_MIB_CCR			0x4fe0
-+@@ -732,6 +740,7 @@ struct mt7530_priv {
-+ 	unsigned int		p5_intf_sel;
-+ 	u8			mirror_rx;
-+ 	u8			mirror_tx;
-++	u8			eee_enable;
-+ 
-+ 	struct mt7530_port	ports[MT7530_NUM_PORTS];
-+ 	/* protect among processes for registers access*/
-diff --git a/target/linux/generic/pending-5.10/762-net-bridge-switchdev-Refactor-br_switchdev_fdb_notif.patch b/target/linux/generic/pending-5.10/762-net-bridge-switchdev-Refactor-br_switchdev_fdb_notif.patch
-new file mode 100644
-index 0000000000..fbc8342b0e
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/762-net-bridge-switchdev-Refactor-br_switchdev_fdb_notif.patch
-@@ -0,0 +1,77 @@
-+From 46fe6cecb296d850c1ee2b333e57093ac4b733f3 Mon Sep 17 00:00:00 2001
-+From: Tobias Waldekranz <tobias@waldekranz.com>
-+Date: Sat, 16 Jan 2021 02:25:09 +0100
-+Subject: [PATCH] net: bridge: switchdev: Refactor br_switchdev_fdb_notify
-+
-+Instead of having to add more and more arguments to
-+br_switchdev_fdb_call_notifiers, get rid of it and build the info
-+struct directly in br_switchdev_fdb_notify.
-+
-+Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
-+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
-+---
-+ net/bridge/br_switchdev.c | 41 +++++++++++----------------------------
-+ 1 file changed, 11 insertions(+), 30 deletions(-)
-+
-+--- a/net/bridge/br_switchdev.c
-++++ b/net/bridge/br_switchdev.c
-+@@ -102,25 +102,16 @@ int br_switchdev_set_port_flag(struct ne
-+ 	return 0;
-+ }
-+ 
-+-static void
-+-br_switchdev_fdb_call_notifiers(bool adding, const unsigned char *mac,
-+-				u16 vid, struct net_device *dev,
-+-				bool added_by_user, bool offloaded)
-+-{
-+-	struct switchdev_notifier_fdb_info info;
-+-	unsigned long notifier_type;
-+-
-+-	info.addr = mac;
-+-	info.vid = vid;
-+-	info.added_by_user = added_by_user;
-+-	info.offloaded = offloaded;
-+-	notifier_type = adding ? SWITCHDEV_FDB_ADD_TO_DEVICE : SWITCHDEV_FDB_DEL_TO_DEVICE;
-+-	call_switchdev_notifiers(notifier_type, dev, &info.info, NULL);
-+-}
-+-
-+ void
-+ br_switchdev_fdb_notify(const struct net_bridge_fdb_entry *fdb, int type)
-+ {
-++	struct switchdev_notifier_fdb_info info = {
-++		.addr = fdb->key.addr.addr,
-++		.vid = fdb->key.vlan_id,
-++		.added_by_user = test_bit(BR_FDB_ADDED_BY_USER, &fdb->flags),
-++		.offloaded = test_bit(BR_FDB_OFFLOADED, &fdb->flags),
-++	};
-++
-+ 	if (!fdb->dst)
-+ 		return;
-+ 	if (test_bit(BR_FDB_LOCAL, &fdb->flags))
-+@@ -128,22 +119,12 @@ br_switchdev_fdb_notify(const struct net
-+ 
-+ 	switch (type) {
-+ 	case RTM_DELNEIGH:
-+-		br_switchdev_fdb_call_notifiers(false, fdb->key.addr.addr,
-+-						fdb->key.vlan_id,
-+-						fdb->dst->dev,
-+-						test_bit(BR_FDB_ADDED_BY_USER,
-+-							 &fdb->flags),
-+-						test_bit(BR_FDB_OFFLOADED,
-+-							 &fdb->flags));
-++		call_switchdev_notifiers(SWITCHDEV_FDB_DEL_TO_DEVICE,
-++					 fdb->dst->dev, &info.info, NULL);
-+ 		break;
-+ 	case RTM_NEWNEIGH:
-+-		br_switchdev_fdb_call_notifiers(true, fdb->key.addr.addr,
-+-						fdb->key.vlan_id,
-+-						fdb->dst->dev,
-+-						test_bit(BR_FDB_ADDED_BY_USER,
-+-							 &fdb->flags),
-+-						test_bit(BR_FDB_OFFLOADED,
-+-							 &fdb->flags));
-++		call_switchdev_notifiers(SWITCHDEV_FDB_ADD_TO_DEVICE,
-++					 fdb->dst->dev, &info.info, NULL);
-+ 		break;
-+ 	}
-+ }
-diff --git a/target/linux/generic/pending-5.10/763-net-bridge-switchdev-Include-local-flag-in-FDB-notif.patch b/target/linux/generic/pending-5.10/763-net-bridge-switchdev-Include-local-flag-in-FDB-notif.patch
-new file mode 100644
-index 0000000000..41374c88df
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/763-net-bridge-switchdev-Include-local-flag-in-FDB-notif.patch
-@@ -0,0 +1,42 @@
-+From ec5be4f79026282925ae383caa431a8d41e3456a Mon Sep 17 00:00:00 2001
-+From: Tobias Waldekranz <tobias@waldekranz.com>
-+Date: Sat, 16 Jan 2021 02:25:10 +0100
-+Subject: [PATCH] net: bridge: switchdev: Include local flag in FDB
-+ notifications
-+
-+Some switchdev drivers, notably DSA, ignore all dynamically learned
-+address notifications (!added_by_user) as these are autonomously added
-+by the switch. Previously, such a notification was indistinguishable
-+from a local address notification. Include a local bit in the
-+notification so that the two classes can be discriminated.
-+
-+This allows DSA-like devices to add local addresses to the hardware
-+FDB (with the CPU as the destination), thereby avoiding flows towards
-+the CPU being flooded by the switch as unknown unicast.
-+
-+Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
-+---
-+ include/net/switchdev.h   | 1 +
-+ net/bridge/br_switchdev.c | 1 +
-+ 2 files changed, 2 insertions(+)
-+
-+--- a/include/net/switchdev.h
-++++ b/include/net/switchdev.h
-+@@ -224,6 +224,7 @@ struct switchdev_notifier_fdb_info {
-+ 	const unsigned char *addr;
-+ 	u16 vid;
-+ 	u8 added_by_user:1,
-++	   local:1,
-+ 	   offloaded:1;
-+ };
-+ 
-+--- a/net/bridge/br_switchdev.c
-++++ b/net/bridge/br_switchdev.c
-+@@ -109,6 +109,7 @@ br_switchdev_fdb_notify(const struct net
-+ 		.addr = fdb->key.addr.addr,
-+ 		.vid = fdb->key.vlan_id,
-+ 		.added_by_user = test_bit(BR_FDB_ADDED_BY_USER, &fdb->flags),
-++		.local = test_bit(BR_FDB_LOCAL, &fdb->flags),
-+ 		.offloaded = test_bit(BR_FDB_OFFLOADED, &fdb->flags),
-+ 	};
-+ 
-diff --git a/target/linux/generic/pending-5.10/764-net-bridge-switchdev-Send-FDB-notifications-for-host.patch b/target/linux/generic/pending-5.10/764-net-bridge-switchdev-Send-FDB-notifications-for-host.patch
-new file mode 100644
-index 0000000000..0e773888df
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/764-net-bridge-switchdev-Send-FDB-notifications-for-host.patch
-@@ -0,0 +1,96 @@
-+From 2e50fd9322047253c327550b4485cf8761035a8c Mon Sep 17 00:00:00 2001
-+From: Tobias Waldekranz <tobias@waldekranz.com>
-+Date: Sat, 16 Jan 2021 02:25:11 +0100
-+Subject: [PATCH] net: bridge: switchdev: Send FDB notifications for host
-+ addresses
-+
-+Treat addresses added to the bridge itself in the same way as regular
-+ports and send out a notification so that drivers may sync it down to
-+the hardware FDB.
-+
-+Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
-+---
-+ net/bridge/br_fdb.c       |  4 ++--
-+ net/bridge/br_private.h   |  7 ++++---
-+ net/bridge/br_switchdev.c | 11 +++++------
-+ 3 files changed, 11 insertions(+), 11 deletions(-)
-+
-+--- a/net/bridge/br_fdb.c
-++++ b/net/bridge/br_fdb.c
-+@@ -602,7 +602,7 @@ void br_fdb_update(struct net_bridge *br
-+ 			/* fastpath: update of existing entry */
-+ 			if (unlikely(source != fdb->dst &&
-+ 				     !test_bit(BR_FDB_STICKY, &fdb->flags))) {
-+-				br_switchdev_fdb_notify(fdb, RTM_DELNEIGH);
-++				br_switchdev_fdb_notify(br, fdb, RTM_DELNEIGH);
-+ 				fdb->dst = source;
-+ 				fdb_modified = true;
-+ 				/* Take over HW learned entry */
-+@@ -735,7 +735,7 @@ static void fdb_notify(struct net_bridge
-+ 	int err = -ENOBUFS;
-+ 
-+ 	if (swdev_notify)
-+-		br_switchdev_fdb_notify(fdb, type);
-++		br_switchdev_fdb_notify(br, fdb, type);
-+ 
-+ 	skb = nlmsg_new(fdb_nlmsg_size(), GFP_ATOMIC);
-+ 	if (skb == NULL)
-+--- a/net/bridge/br_private.h
-++++ b/net/bridge/br_private.h
-+@@ -1527,8 +1527,8 @@ bool nbp_switchdev_allowed_egress(const
-+ int br_switchdev_set_port_flag(struct net_bridge_port *p,
-+ 			       unsigned long flags,
-+ 			       unsigned long mask);
-+-void br_switchdev_fdb_notify(const struct net_bridge_fdb_entry *fdb,
-+-			     int type);
-++void br_switchdev_fdb_notify(struct net_bridge *br,
-++			     const struct net_bridge_fdb_entry *fdb, int type);
-+ int br_switchdev_port_vlan_add(struct net_device *dev, u16 vid, u16 flags,
-+ 			       struct netlink_ext_ack *extack);
-+ int br_switchdev_port_vlan_del(struct net_device *dev, u16 vid);
-+@@ -1574,7 +1574,8 @@ static inline int br_switchdev_port_vlan
-+ }
-+ 
-+ static inline void
-+-br_switchdev_fdb_notify(const struct net_bridge_fdb_entry *fdb, int type)
-++br_switchdev_fdb_notify(struct net_bridge *br,
-++			const struct net_bridge_fdb_entry *fdb, int type)
-+ {
-+ }
-+ 
-+--- a/net/bridge/br_switchdev.c
-++++ b/net/bridge/br_switchdev.c
-+@@ -103,7 +103,8 @@ int br_switchdev_set_port_flag(struct ne
-+ }
-+ 
-+ void
-+-br_switchdev_fdb_notify(const struct net_bridge_fdb_entry *fdb, int type)
-++br_switchdev_fdb_notify(struct net_bridge *br,
-++			const struct net_bridge_fdb_entry *fdb, int type)
-+ {
-+ 	struct switchdev_notifier_fdb_info info = {
-+ 		.addr = fdb->key.addr.addr,
-+@@ -112,20 +113,19 @@ br_switchdev_fdb_notify(const struct net
-+ 		.local = test_bit(BR_FDB_LOCAL, &fdb->flags),
-+ 		.offloaded = test_bit(BR_FDB_OFFLOADED, &fdb->flags),
-+ 	};
-++	struct net_device *dev = fdb->dst ? fdb->dst->dev : br->dev;
-+ 
-+-	if (!fdb->dst)
-+-		return;
-+ 	if (test_bit(BR_FDB_LOCAL, &fdb->flags))
-+ 		return;
-+ 
-+ 	switch (type) {
-+ 	case RTM_DELNEIGH:
-+ 		call_switchdev_notifiers(SWITCHDEV_FDB_DEL_TO_DEVICE,
-+-					 fdb->dst->dev, &info.info, NULL);
-++					 dev, &info.info, NULL);
-+ 		break;
-+ 	case RTM_NEWNEIGH:
-+ 		call_switchdev_notifiers(SWITCHDEV_FDB_ADD_TO_DEVICE,
-+-					 fdb->dst->dev, &info.info, NULL);
-++					 dev, &info.info, NULL);
-+ 		break;
-+ 	}
-+ }
-diff --git a/target/linux/generic/pending-5.10/765-net-dsa-Include-local-addresses-in-assisted-CPU-port.patch b/target/linux/generic/pending-5.10/765-net-dsa-Include-local-addresses-in-assisted-CPU-port.patch
-new file mode 100644
-index 0000000000..c86a854212
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/765-net-dsa-Include-local-addresses-in-assisted-CPU-port.patch
-@@ -0,0 +1,36 @@
-+From dd082716b43a3684b2f473ae5d1e76d1c076d86d Mon Sep 17 00:00:00 2001
-+From: Tobias Waldekranz <tobias@waldekranz.com>
-+Date: Sat, 16 Jan 2021 02:25:12 +0100
-+Subject: [PATCH] net: dsa: Include local addresses in assisted CPU port
-+ learning
-+
-+Add local addresses (i.e. the ports' MAC addresses) to the hardware
-+FDB when assisted CPU port learning is enabled.
-+
-+NOTE: The bridge's own MAC address is also "local". If that address is
-+not shared with any port, the bridge's MAC is not be added by this
-+functionality - but the following commit takes care of that case.
-+
-+Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
-+---
-+ net/dsa/slave.c | 8 +++++---
-+ 1 file changed, 5 insertions(+), 3 deletions(-)
-+
-+--- a/net/dsa/slave.c
-++++ b/net/dsa/slave.c
-+@@ -2189,10 +2189,12 @@ static int dsa_slave_switchdev_event(str
-+ 		fdb_info = ptr;
-+ 
-+ 		if (dsa_slave_dev_check(dev)) {
-+-			if (!fdb_info->added_by_user)
-+-				return NOTIFY_OK;
-+-
-+ 			dp = dsa_slave_to_port(dev);
-++
-++			if (fdb_info->local && dp->ds->assisted_learning_on_cpu_port)
-++				dp = dp->cpu_dp;
-++			else if (!fdb_info->added_by_user)
-++				return NOTIFY_OK;
-+ 		} else {
-+ 			/* Snoop addresses learnt on foreign interfaces
-+ 			 * bridged with us, for switches that don't
-diff --git a/target/linux/generic/pending-5.10/766-net-dsa-Include-bridge-addresses-in-assisted-CPU-por.patch b/target/linux/generic/pending-5.10/766-net-dsa-Include-bridge-addresses-in-assisted-CPU-por.patch
-new file mode 100644
-index 0000000000..bf356422de
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/766-net-dsa-Include-bridge-addresses-in-assisted-CPU-por.patch
-@@ -0,0 +1,30 @@
-+From 0663ebde114a6fb2c28c622ba5212b302d4d2581 Mon Sep 17 00:00:00 2001
-+From: Tobias Waldekranz <tobias@waldekranz.com>
-+Date: Sat, 16 Jan 2021 02:25:13 +0100
-+Subject: [PATCH] net: dsa: Include bridge addresses in assisted CPU port
-+ learning
-+
-+Now that notifications are sent out for addresses added to the bridge
-+itself, extend DSA to include those addresses in the hardware FDB when
-+assisted CPU port learning is enabled.
-+
-+Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
-+---
-+ net/dsa/slave.c | 6 +++++-
-+ 1 file changed, 5 insertions(+), 1 deletion(-)
-+
-+--- a/net/dsa/slave.c
-++++ b/net/dsa/slave.c
-+@@ -2203,7 +2203,11 @@ static int dsa_slave_switchdev_event(str
-+ 			struct net_device *br_dev;
-+ 			struct dsa_slave_priv *p;
-+ 
-+-			br_dev = netdev_master_upper_dev_get_rcu(dev);
-++			if (netif_is_bridge_master(dev))
-++				br_dev = dev;
-++			else
-++				br_dev = netdev_master_upper_dev_get_rcu(dev);
-++
-+ 			if (!br_dev)
-+ 				return NOTIFY_DONE;
-+ 
-diff --git a/target/linux/generic/pending-5.10/767-net-dsa-Sync-static-FDB-entries-on-foreign-interface.patch b/target/linux/generic/pending-5.10/767-net-dsa-Sync-static-FDB-entries-on-foreign-interface.patch
-new file mode 100644
-index 0000000000..84ad38f6eb
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/767-net-dsa-Sync-static-FDB-entries-on-foreign-interface.patch
-@@ -0,0 +1,56 @@
-+From 81e39fd78db82fb51b05fff309b9c521f1a0bc5a Mon Sep 17 00:00:00 2001
-+From: Tobias Waldekranz <tobias@waldekranz.com>
-+Date: Sat, 16 Jan 2021 02:25:14 +0100
-+Subject: [PATCH] net: dsa: Sync static FDB entries on foreign interfaces to
-+ hardware
-+
-+Reuse the "assisted_learning_on_cpu_port" functionality to always add
-+entries for user-configured entries on foreign interfaces, even if
-+assisted_learning_on_cpu_port is not enabled. E.g. in this situation:
-+
-+   br0
-+   / \
-+swp0 dummy0
-+
-+$ bridge fdb add 02:00:de:ad:00:01 dev dummy0 vlan 1 master
-+
-+Results in DSA adding an entry in the hardware FDB, pointing this
-+address towards the CPU port.
-+
-+The same is true for entries added to the bridge itself, e.g:
-+
-+$ bridge fdb add 02:00:de:ad:00:01 dev br0 vlan 1 self
-+
-+Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
-+---
-+ net/dsa/slave.c | 12 ++++++++----
-+ 1 file changed, 8 insertions(+), 4 deletions(-)
-+
-+--- a/net/dsa/slave.c
-++++ b/net/dsa/slave.c
-+@@ -2196,9 +2196,12 @@ static int dsa_slave_switchdev_event(str
-+ 			else if (!fdb_info->added_by_user)
-+ 				return NOTIFY_OK;
-+ 		} else {
-+-			/* Snoop addresses learnt on foreign interfaces
-+-			 * bridged with us, for switches that don't
-+-			 * automatically learn SA from CPU-injected traffic
-++			/* Snoop addresses added to foreign interfaces
-++			 * bridged with us, or the bridge
-++			 * itself. Dynamically learned addresses can
-++			 * also be added for switches that don't
-++			 * automatically learn SA from CPU-injected
-++			 * traffic.
-+ 			 */
-+ 			struct net_device *br_dev;
-+ 			struct dsa_slave_priv *p;
-+@@ -2220,7 +2223,8 @@ static int dsa_slave_switchdev_event(str
-+ 
-+ 			dp = p->dp->cpu_dp;
-+ 
-+-			if (!dp->ds->assisted_learning_on_cpu_port)
-++			if (!fdb_info->added_by_user &&
-++			    !dp->ds->assisted_learning_on_cpu_port)
-+ 				return NOTIFY_DONE;
-+ 		}
-+ 
-diff --git a/target/linux/generic/pending-5.10/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch b/target/linux/generic/pending-5.10/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
-new file mode 100644
-index 0000000000..5b8d058247
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
-@@ -0,0 +1,27 @@
-+From:   Tobias Waldekranz <tobias@waldekranz.com>
-+Subject: [RFC net-next 7/7] net: dsa: mv88e6xxx: Request assisted learning on CPU port
-+Date:   Sat, 16 Jan 2021 02:25:15 +0100
-+Archived-At: <https://lore.kernel.org/netdev/20210116012515.3152-8-tobias@waldekranz.com/>
-+
-+While the hardware is capable of performing learning on the CPU port,
-+it requires alot of additions to the bridge's forwarding path in order
-+to handle multi-destination traffic correctly.
-+
-+Until that is in place, opt for the next best thing and let DSA sync
-+the relevant addresses down to the hardware FDB.
-+
-+Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
-+---
-+ drivers/net/dsa/mv88e6xxx/chip.c | 1 +
-+ 1 file changed, 1 insertion(+)
-+
-+--- a/drivers/net/dsa/mv88e6xxx/chip.c
-++++ b/drivers/net/dsa/mv88e6xxx/chip.c
-+@@ -5405,6 +5405,7 @@ static int mv88e6xxx_register_switch(str
-+ 	ds->ops = &mv88e6xxx_switch_ops;
-+ 	ds->ageing_time_min = chip->info->age_time_coeff;
-+ 	ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX;
-++	ds->assisted_learning_on_cpu_port = true;
-+ 
-+ 	dev_set_drvdata(dev, ds);
-+ 
-diff --git a/target/linux/generic/pending-5.10/770-00-net-ethernet-mtk_eth_soc-use-napi_consume_skb.patch b/target/linux/generic/pending-5.10/770-00-net-ethernet-mtk_eth_soc-use-napi_consume_skb.patch
-new file mode 100644
-index 0000000000..85c859b388
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/770-00-net-ethernet-mtk_eth_soc-use-napi_consume_skb.patch
-@@ -0,0 +1,72 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Mon, 8 Jun 2020 17:01:12 +0200
-+Subject: [PATCH] net: ethernet: mtk_eth_soc: use napi_consume_skb
-+
-+Should improve performance, since it can use bulk free
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+@@ -857,7 +857,8 @@ static int txd_to_idx(struct mtk_tx_ring
-+ 	return ((void *)dma - (void *)ring->dma) / sizeof(*dma);
-+ }
-+ 
-+-static void mtk_tx_unmap(struct mtk_eth *eth, struct mtk_tx_buf *tx_buf)
-++static void mtk_tx_unmap(struct mtk_eth *eth, struct mtk_tx_buf *tx_buf,
-++			 bool napi)
-+ {
-+ 	if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
-+ 		if (tx_buf->flags & MTK_TX_FLAGS_SINGLE0) {
-+@@ -889,8 +890,12 @@ static void mtk_tx_unmap(struct mtk_eth
-+ 
-+ 	tx_buf->flags = 0;
-+ 	if (tx_buf->skb &&
-+-	    (tx_buf->skb != (struct sk_buff *)MTK_DMA_DUMMY_DESC))
-+-		dev_kfree_skb_any(tx_buf->skb);
-++	    (tx_buf->skb != (struct sk_buff *)MTK_DMA_DUMMY_DESC)) {
-++		if (napi)
-++			napi_consume_skb(tx_buf->skb, napi);
-++		else
-++			dev_kfree_skb_any(tx_buf->skb);
-++	}
-+ 	tx_buf->skb = NULL;
-+ }
-+ 
-+@@ -1068,7 +1073,7 @@ err_dma:
-+ 		tx_buf = mtk_desc_to_tx_buf(ring, itxd);
-+ 
-+ 		/* unmap dma */
-+-		mtk_tx_unmap(eth, tx_buf);
-++		mtk_tx_unmap(eth, tx_buf, false);
-+ 
-+ 		itxd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU;
-+ 		if (!MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA))
-+@@ -1386,7 +1391,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
-+ 			done[mac]++;
-+ 			budget--;
-+ 		}
-+-		mtk_tx_unmap(eth, tx_buf);
-++		mtk_tx_unmap(eth, tx_buf, true);
-+ 
-+ 		ring->last_free = desc;
-+ 		atomic_inc(&ring->free_count);
-+@@ -1423,7 +1428,7 @@ static int mtk_poll_tx_pdma(struct mtk_e
-+ 			budget--;
-+ 		}
-+ 
-+-		mtk_tx_unmap(eth, tx_buf);
-++		mtk_tx_unmap(eth, tx_buf, true);
-+ 
-+ 		desc = &ring->dma[cpu];
-+ 		ring->last_free = desc;
-+@@ -1625,7 +1630,7 @@ static void mtk_tx_clean(struct mtk_eth
-+ 
-+ 	if (ring->buf) {
-+ 		for (i = 0; i < MTK_DMA_SIZE; i++)
-+-			mtk_tx_unmap(eth, &ring->buf[i]);
-++			mtk_tx_unmap(eth, &ring->buf[i], false);
-+ 		kfree(ring->buf);
-+ 		ring->buf = NULL;
-+ 	}
-diff --git a/target/linux/generic/pending-5.10/770-01-net-ethernet-mtk_eth_soc-significantly-reduce-mdio-b.patch b/target/linux/generic/pending-5.10/770-01-net-ethernet-mtk_eth_soc-significantly-reduce-mdio-b.patch
-new file mode 100644
-index 0000000000..922c35a3e4
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/770-01-net-ethernet-mtk_eth_soc-significantly-reduce-mdio-b.patch
-@@ -0,0 +1,26 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Mon, 8 Jun 2020 17:02:39 +0200
-+Subject: [PATCH] net: ethernet: mtk_eth_soc: significantly reduce mdio bus
-+ access latency
-+
-+usleep_range often ends up sleeping much longer than the 10-20us provided
-+as a range here. This causes significant latency in mdio bus acceses,
-+which easily adds multiple seconds to the boot time on MT7621 when polling
-+DSA slave ports.
-+Use cond_resched instead of usleep_range, since the MDIO access does not
-+take much time
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+@@ -85,7 +85,7 @@ static int mtk_mdio_busy_wait(struct mtk
-+ 			return 0;
-+ 		if (time_after(jiffies, t_start + PHY_IAC_TIMEOUT))
-+ 			break;
-+-		usleep_range(10, 20);
-++		cond_resched();
-+ 	}
-+ 
-+ 	dev_err(eth->dev, "mdio: MDIO timeout\n");
-diff --git a/target/linux/generic/pending-5.10/770-02-net-ethernet-mtk_eth_soc-fix-rx-vlan-offload.patch b/target/linux/generic/pending-5.10/770-02-net-ethernet-mtk_eth_soc-fix-rx-vlan-offload.patch
-new file mode 100644
-index 0000000000..cebfe32d95
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/770-02-net-ethernet-mtk_eth_soc-fix-rx-vlan-offload.patch
-@@ -0,0 +1,31 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Wed, 26 Aug 2020 16:52:12 +0200
-+Subject: [PATCH] net: ethernet: mtk_eth_soc: fix rx vlan offload
-+
-+The VLAN ID in the rx descriptor is only valid if the RX_DMA_VID bit is set
-+Fixes frames wrongly marked with VLAN tags
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+@@ -1324,7 +1324,7 @@ static int mtk_poll_rx(struct napi_struc
-+ 		skb->protocol = eth_type_trans(skb, netdev);
-+ 
-+ 		if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX &&
-+-		    RX_DMA_VID(trxd.rxd3))
-++		    (trxd.rxd2 & RX_DMA_VTAG))
-+ 			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
-+ 					       RX_DMA_VID(trxd.rxd3));
-+ 		skb_record_rx_queue(skb, 0);
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-+@@ -295,6 +295,7 @@
-+ #define RX_DMA_LSO		BIT(30)
-+ #define RX_DMA_PLEN0(_x)	(((_x) & 0x3fff) << 16)
-+ #define RX_DMA_GET_PLEN0(_x)	(((_x) >> 16) & 0x3fff)
-++#define RX_DMA_VTAG		BIT(15)
-+ 
-+ /* QDMA descriptor rxd3 */
-+ #define RX_DMA_VID(_x)		((_x) & 0xfff)
-diff --git a/target/linux/generic/pending-5.10/770-03-net-ethernet-mtk_eth_soc-fix-unnecessary-tx-queue-st.patch b/target/linux/generic/pending-5.10/770-03-net-ethernet-mtk_eth_soc-fix-unnecessary-tx-queue-st.patch
-new file mode 100644
-index 0000000000..82bdb10eba
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/770-03-net-ethernet-mtk_eth_soc-fix-unnecessary-tx-queue-st.patch
-@@ -0,0 +1,50 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Wed, 26 Aug 2020 16:55:54 +0200
-+Subject: [PATCH] net: ethernet: mtk_eth_soc: fix unnecessary tx queue
-+ stops
-+
-+When running short on descriptors, only stop the queue for the netdev that tx
-+was attempted for. By the time the something tries to send on the other netdev,
-+the ring might have some more room already
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+@@ -1130,17 +1130,6 @@ static void mtk_wake_queue(struct mtk_et
-+ 	}
-+ }
-+ 
-+-static void mtk_stop_queue(struct mtk_eth *eth)
-+-{
-+-	int i;
-+-
-+-	for (i = 0; i < MTK_MAC_COUNT; i++) {
-+-		if (!eth->netdev[i])
-+-			continue;
-+-		netif_stop_queue(eth->netdev[i]);
-+-	}
-+-}
-+-
-+ static netdev_tx_t mtk_start_xmit(struct sk_buff *skb, struct net_device *dev)
-+ {
-+ 	struct mtk_mac *mac = netdev_priv(dev);
-+@@ -1161,7 +1150,7 @@ static netdev_tx_t mtk_start_xmit(struct
-+ 
-+ 	tx_num = mtk_cal_txd_req(skb);
-+ 	if (unlikely(atomic_read(&ring->free_count) <= tx_num)) {
-+-		mtk_stop_queue(eth);
-++		netif_stop_queue(dev);
-+ 		netif_err(eth, tx_queued, dev,
-+ 			  "Tx Ring full when queue awake!\n");
-+ 		spin_unlock(&eth->page_lock);
-+@@ -1187,7 +1176,7 @@ static netdev_tx_t mtk_start_xmit(struct
-+ 		goto drop;
-+ 
-+ 	if (unlikely(atomic_read(&ring->free_count) <= ring->thresh))
-+-		mtk_stop_queue(eth);
-++		netif_stop_queue(dev);
-+ 
-+ 	spin_unlock(&eth->page_lock);
-+ 
-diff --git a/target/linux/generic/pending-5.10/770-04-net-ethernet-mtk_eth_soc-use-larger-burst-size-for-q.patch b/target/linux/generic/pending-5.10/770-04-net-ethernet-mtk_eth_soc-use-larger-burst-size-for-q.patch
-new file mode 100644
-index 0000000000..94c0510257
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/770-04-net-ethernet-mtk_eth_soc-use-larger-burst-size-for-q.patch
-@@ -0,0 +1,32 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Wed, 26 Aug 2020 16:58:55 +0200
-+Subject: [PATCH] net: ethernet: mtk_eth_soc: use larger burst size for
-+ qdma tx
-+
-+Improves tx performance
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+@@ -2191,7 +2191,7 @@ static int mtk_start_dma(struct mtk_eth
-+ 	if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
-+ 		mtk_w32(eth,
-+ 			MTK_TX_WB_DDONE | MTK_TX_DMA_EN |
-+-			MTK_DMA_SIZE_16DWORDS | MTK_NDP_CO_PRO |
-++			MTK_TX_BT_32DWORDS | MTK_NDP_CO_PRO |
-+ 			MTK_RX_DMA_EN | MTK_RX_2B_OFFSET |
-+ 			MTK_RX_BT_32DWORDS,
-+ 			MTK_QDMA_GLO_CFG);
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-+@@ -197,7 +197,7 @@
-+ #define MTK_RX_BT_32DWORDS	(3 << 11)
-+ #define MTK_NDP_CO_PRO		BIT(10)
-+ #define MTK_TX_WB_DDONE		BIT(6)
-+-#define MTK_DMA_SIZE_16DWORDS	(2 << 4)
-++#define MTK_TX_BT_32DWORDS	(3 << 4)
-+ #define MTK_RX_DMA_BUSY		BIT(3)
-+ #define MTK_TX_DMA_BUSY		BIT(1)
-+ #define MTK_RX_DMA_EN		BIT(2)
-diff --git a/target/linux/generic/pending-5.10/770-05-net-ethernet-mtk_eth_soc-increase-DMA-ring-sizes.patch b/target/linux/generic/pending-5.10/770-05-net-ethernet-mtk_eth_soc-increase-DMA-ring-sizes.patch
-new file mode 100644
-index 0000000000..f68cbc333c
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/770-05-net-ethernet-mtk_eth_soc-increase-DMA-ring-sizes.patch
-@@ -0,0 +1,21 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Wed, 26 Aug 2020 16:59:41 +0200
-+Subject: [PATCH] net: ethernet: mtk_eth_soc: increase DMA ring sizes
-+
-+256 descriptors is not enough for multi-gigabit traffic under load on MT7622.
-+Bump it to 512 to improve performance
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-+@@ -19,7 +19,7 @@
-+ #define MTK_QDMA_PAGE_SIZE	2048
-+ #define	MTK_MAX_RX_LENGTH	1536
-+ #define MTK_TX_DMA_BUF_LEN	0x3fff
-+-#define MTK_DMA_SIZE		256
-++#define MTK_DMA_SIZE		512
-+ #define MTK_NAPI_WEIGHT		64
-+ #define MTK_MAC_COUNT		2
-+ #define MTK_RX_ETH_HLEN		(VLAN_ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN)
-diff --git a/target/linux/generic/pending-5.10/770-06-net-ethernet-mtk_eth_soc-implement-dynamic-interrupt.patch b/target/linux/generic/pending-5.10/770-06-net-ethernet-mtk_eth_soc-implement-dynamic-interrupt.patch
-new file mode 100644
-index 0000000000..61a51ba33b
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/770-06-net-ethernet-mtk_eth_soc-implement-dynamic-interrupt.patch
-@@ -0,0 +1,281 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Wed, 26 Aug 2020 17:02:30 +0200
-+Subject: [PATCH] net: ethernet: mtk_eth_soc: implement dynamic interrupt
-+ moderation
-+
-+Reduces the number of interrupts under load
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/drivers/net/ethernet/mediatek/Kconfig
-++++ b/drivers/net/ethernet/mediatek/Kconfig
-+@@ -10,6 +10,7 @@ if NET_VENDOR_MEDIATEK
-+ config NET_MEDIATEK_SOC
-+ 	tristate "MediaTek SoC Gigabit Ethernet support"
-+ 	select PHYLINK
-++	select DIMLIB
-+ 	help
-+ 	  This driver supports the gigabit ethernet MACs in the
-+ 	  MediaTek SoC family.
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+@@ -1232,12 +1232,13 @@ static void mtk_update_rx_cpu_idx(struct
-+ static int mtk_poll_rx(struct napi_struct *napi, int budget,
-+ 		       struct mtk_eth *eth)
-+ {
-++	struct dim_sample dim_sample = {};
-+ 	struct mtk_rx_ring *ring;
-+ 	int idx;
-+ 	struct sk_buff *skb;
-+ 	u8 *data, *new_data;
-+ 	struct mtk_rx_dma *rxd, trxd;
-+-	int done = 0;
-++	int done = 0, bytes = 0;
-+ 
-+ 	while (done < budget) {
-+ 		struct net_device *netdev;
-+@@ -1311,6 +1312,7 @@ static int mtk_poll_rx(struct napi_struc
-+ 		else
-+ 			skb_checksum_none_assert(skb);
-+ 		skb->protocol = eth_type_trans(skb, netdev);
-++		bytes += pktlen;
-+ 
-+ 		if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX &&
-+ 		    (trxd.rxd2 & RX_DMA_VTAG))
-+@@ -1342,6 +1344,12 @@ rx_done:
-+ 		mtk_update_rx_cpu_idx(eth);
-+ 	}
-+ 
-++	eth->rx_packets += done;
-++	eth->rx_bytes += bytes;
-++	dim_update_sample(eth->rx_events, eth->rx_packets, eth->rx_bytes,
-++			  &dim_sample);
-++	net_dim(&eth->rx_dim, dim_sample);
-++
-+ 	return done;
-+ }
-+ 
-+@@ -1434,6 +1442,7 @@ static int mtk_poll_tx_pdma(struct mtk_e
-+ static int mtk_poll_tx(struct mtk_eth *eth, int budget)
-+ {
-+ 	struct mtk_tx_ring *ring = &eth->tx_ring;
-++	struct dim_sample dim_sample = {};
-+ 	unsigned int done[MTK_MAX_DEVS];
-+ 	unsigned int bytes[MTK_MAX_DEVS];
-+ 	int total = 0, i;
-+@@ -1451,8 +1460,14 @@ static int mtk_poll_tx(struct mtk_eth *e
-+ 			continue;
-+ 		netdev_completed_queue(eth->netdev[i], done[i], bytes[i]);
-+ 		total += done[i];
-++		eth->tx_packets += done[i];
-++		eth->tx_bytes += bytes[i];
-+ 	}
-+ 
-++	dim_update_sample(eth->tx_events, eth->tx_packets, eth->tx_bytes,
-++			  &dim_sample);
-++	net_dim(&eth->tx_dim, dim_sample);
-++
-+ 	if (mtk_queue_stopped(eth) &&
-+ 	    (atomic_read(&ring->free_count) > ring->thresh))
-+ 		mtk_wake_queue(eth);
-+@@ -2127,6 +2142,7 @@ static irqreturn_t mtk_handle_irq_rx(int
-+ {
-+ 	struct mtk_eth *eth = _eth;
-+ 
-++	eth->rx_events++;
-+ 	if (likely(napi_schedule_prep(&eth->rx_napi))) {
-+ 		__napi_schedule(&eth->rx_napi);
-+ 		mtk_rx_irq_disable(eth, MTK_RX_DONE_INT);
-+@@ -2139,6 +2155,7 @@ static irqreturn_t mtk_handle_irq_tx(int
-+ {
-+ 	struct mtk_eth *eth = _eth;
-+ 
-++	eth->tx_events++;
-+ 	if (likely(napi_schedule_prep(&eth->tx_napi))) {
-+ 		__napi_schedule(&eth->tx_napi);
-+ 		mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
-+@@ -2315,6 +2332,9 @@ static int mtk_stop(struct net_device *d
-+ 	napi_disable(&eth->tx_napi);
-+ 	napi_disable(&eth->rx_napi);
-+ 
-++	cancel_work_sync(&eth->rx_dim.work);
-++	cancel_work_sync(&eth->tx_dim.work);
-++
-+ 	if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA))
-+ 		mtk_stop_dma(eth, MTK_QDMA_GLO_CFG);
-+ 	mtk_stop_dma(eth, MTK_PDMA_GLO_CFG);
-+@@ -2364,6 +2384,64 @@ err_disable_clks:
-+ 	return ret;
-+ }
-+ 
-++static void mtk_dim_rx(struct work_struct *work)
-++{
-++	struct dim *dim = container_of(work, struct dim, work);
-++	struct mtk_eth *eth = container_of(dim, struct mtk_eth, rx_dim);
-++	struct dim_cq_moder cur_profile;
-++	u32 val, cur;
-++
-++	cur_profile = net_dim_get_rx_moderation(eth->rx_dim.mode,
-++						dim->profile_ix);
-++	spin_lock_bh(&eth->dim_lock);
-++
-++	val = mtk_r32(eth, MTK_PDMA_DELAY_INT);
-++	val &= MTK_PDMA_DELAY_TX_MASK;
-++	val |= MTK_PDMA_DELAY_RX_EN;
-++
-++	cur = min_t(u32, DIV_ROUND_UP(cur_profile.usec, 20), MTK_PDMA_DELAY_PTIME_MASK);
-++	val |= cur << MTK_PDMA_DELAY_RX_PTIME_SHIFT;
-++
-++	cur = min_t(u32, cur_profile.pkts, MTK_PDMA_DELAY_PINT_MASK);
-++	val |= cur << MTK_PDMA_DELAY_RX_PINT_SHIFT;
-++
-++	mtk_w32(eth, val, MTK_PDMA_DELAY_INT);
-++	mtk_w32(eth, val, MTK_QDMA_DELAY_INT);
-++
-++	spin_unlock_bh(&eth->dim_lock);
-++
-++	dim->state = DIM_START_MEASURE;
-++}
-++
-++static void mtk_dim_tx(struct work_struct *work)
-++{
-++	struct dim *dim = container_of(work, struct dim, work);
-++	struct mtk_eth *eth = container_of(dim, struct mtk_eth, tx_dim);
-++	struct dim_cq_moder cur_profile;
-++	u32 val, cur;
-++
-++	cur_profile = net_dim_get_tx_moderation(eth->tx_dim.mode,
-++						dim->profile_ix);
-++	spin_lock_bh(&eth->dim_lock);
-++
-++	val = mtk_r32(eth, MTK_PDMA_DELAY_INT);
-++	val &= MTK_PDMA_DELAY_RX_MASK;
-++	val |= MTK_PDMA_DELAY_TX_EN;
-++
-++	cur = min_t(u32, DIV_ROUND_UP(cur_profile.usec, 20), MTK_PDMA_DELAY_PTIME_MASK);
-++	val |= cur << MTK_PDMA_DELAY_TX_PTIME_SHIFT;
-++
-++	cur = min_t(u32, cur_profile.pkts, MTK_PDMA_DELAY_PINT_MASK);
-++	val |= cur << MTK_PDMA_DELAY_TX_PINT_SHIFT;
-++
-++	mtk_w32(eth, val, MTK_PDMA_DELAY_INT);
-++	mtk_w32(eth, val, MTK_QDMA_DELAY_INT);
-++
-++	spin_unlock_bh(&eth->dim_lock);
-++
-++	dim->state = DIM_START_MEASURE;
-++}
-++
-+ static int mtk_hw_init(struct mtk_eth *eth)
-+ {
-+ 	int i, val, ret;
-+@@ -2385,9 +2463,6 @@ static int mtk_hw_init(struct mtk_eth *e
-+ 			goto err_disable_pm;
-+ 		}
-+ 
-+-		/* enable interrupt delay for RX */
-+-		mtk_w32(eth, MTK_PDMA_DELAY_RX_DELAY, MTK_PDMA_DELAY_INT);
-+-
-+ 		/* disable delay and normal interrupt */
-+ 		mtk_tx_irq_disable(eth, ~0);
-+ 		mtk_rx_irq_disable(eth, ~0);
-+@@ -2426,11 +2501,10 @@ static int mtk_hw_init(struct mtk_eth *e
-+ 	/* Enable RX VLan Offloading */
-+ 	mtk_w32(eth, 1, MTK_CDMP_EG_CTRL);
-+ 
-+-	/* enable interrupt delay for RX */
-+-	mtk_w32(eth, MTK_PDMA_DELAY_RX_DELAY, MTK_PDMA_DELAY_INT);
-++	mtk_dim_rx(&eth->rx_dim.work);
-++	mtk_dim_tx(&eth->tx_dim.work);
-+ 
-+ 	/* disable delay and normal interrupt */
-+-	mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
-+ 	mtk_tx_irq_disable(eth, ~0);
-+ 	mtk_rx_irq_disable(eth, ~0);
-+ 
-+@@ -2934,6 +3008,13 @@ static int mtk_probe(struct platform_dev
-+ 	spin_lock_init(&eth->page_lock);
-+ 	spin_lock_init(&eth->tx_irq_lock);
-+ 	spin_lock_init(&eth->rx_irq_lock);
-++	spin_lock_init(&eth->dim_lock);
-++
-++	eth->rx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
-++	INIT_WORK(&eth->rx_dim.work, mtk_dim_rx);
-++
-++	eth->tx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
-++	INIT_WORK(&eth->tx_dim.work, mtk_dim_tx);
-+ 
-+ 	if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
-+ 		eth->ethsys = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-+@@ -15,6 +15,7 @@
-+ #include <linux/u64_stats_sync.h>
-+ #include <linux/refcount.h>
-+ #include <linux/phylink.h>
-++#include <linux/dim.h>
-+ 
-+ #define MTK_QDMA_PAGE_SIZE	2048
-+ #define	MTK_MAX_RX_LENGTH	1536
-+@@ -131,13 +132,18 @@
-+ 
-+ /* PDMA Delay Interrupt Register */
-+ #define MTK_PDMA_DELAY_INT		0xa0c
-++#define MTK_PDMA_DELAY_RX_MASK		GENMASK(15, 0)
-+ #define MTK_PDMA_DELAY_RX_EN		BIT(15)
-+-#define MTK_PDMA_DELAY_RX_PINT		4
-+ #define MTK_PDMA_DELAY_RX_PINT_SHIFT	8
-+-#define MTK_PDMA_DELAY_RX_PTIME		4
-+-#define MTK_PDMA_DELAY_RX_DELAY		\
-+-	(MTK_PDMA_DELAY_RX_EN | MTK_PDMA_DELAY_RX_PTIME | \
-+-	(MTK_PDMA_DELAY_RX_PINT << MTK_PDMA_DELAY_RX_PINT_SHIFT))
-++#define MTK_PDMA_DELAY_RX_PTIME_SHIFT	0
-++
-++#define MTK_PDMA_DELAY_TX_MASK		GENMASK(31, 16)
-++#define MTK_PDMA_DELAY_TX_EN		BIT(31)
-++#define MTK_PDMA_DELAY_TX_PINT_SHIFT	24
-++#define MTK_PDMA_DELAY_TX_PTIME_SHIFT	16
-++
-++#define MTK_PDMA_DELAY_PINT_MASK	0x7f
-++#define MTK_PDMA_DELAY_PTIME_MASK	0xff
-+ 
-+ /* PDMA Interrupt Status Register */
-+ #define MTK_PDMA_INT_STATUS	0xa20
-+@@ -219,6 +225,7 @@
-+ /* QDMA Interrupt Status Register */
-+ #define MTK_QDMA_INT_STATUS	0x1A18
-+ #define MTK_RX_DONE_DLY		BIT(30)
-++#define MTK_TX_DONE_DLY		BIT(28)
-+ #define MTK_RX_DONE_INT3	BIT(19)
-+ #define MTK_RX_DONE_INT2	BIT(18)
-+ #define MTK_RX_DONE_INT1	BIT(17)
-+@@ -228,8 +235,7 @@
-+ #define MTK_TX_DONE_INT1	BIT(1)
-+ #define MTK_TX_DONE_INT0	BIT(0)
-+ #define MTK_RX_DONE_INT		MTK_RX_DONE_DLY
-+-#define MTK_TX_DONE_INT		(MTK_TX_DONE_INT0 | MTK_TX_DONE_INT1 | \
-+-				 MTK_TX_DONE_INT2 | MTK_TX_DONE_INT3)
-++#define MTK_TX_DONE_INT		MTK_TX_DONE_DLY
-+ 
-+ /* QDMA Interrupt grouping registers */
-+ #define MTK_QDMA_INT_GRP1	0x1a20
-+@@ -892,6 +898,18 @@ struct mtk_eth {
-+ 
-+ 	const struct mtk_soc_data	*soc;
-+ 
-++	spinlock_t			dim_lock;
-++
-++	u32				rx_events;
-++	u32				rx_packets;
-++	u32				rx_bytes;
-++	struct dim			rx_dim;
-++
-++	u32				tx_events;
-++	u32				tx_packets;
-++	u32				tx_bytes;
-++	struct dim			tx_dim;
-++
-+ 	u32				tx_int_mask_reg;
-+ 	u32				tx_int_status_reg;
-+ 	u32				rx_dma_l4_valid;
-diff --git a/target/linux/generic/pending-5.10/770-08-net-ethernet-mtk_eth_soc-cache-hardware-pointer-of-l.patch b/target/linux/generic/pending-5.10/770-08-net-ethernet-mtk_eth_soc-cache-hardware-pointer-of-l.patch
-new file mode 100644
-index 0000000000..20181b8d12
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/770-08-net-ethernet-mtk_eth_soc-cache-hardware-pointer-of-l.patch
-@@ -0,0 +1,67 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Thu, 27 Aug 2020 06:32:03 +0200
-+Subject: [PATCH] net: ethernet: mtk_eth_soc: cache hardware pointer of last
-+ freed tx descriptor
-+
-+The value is only updated by the CPU, so it is cheaper to access from the ring
-+data structure than from a hardware register
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+@@ -1362,7 +1362,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
-+ 	struct mtk_tx_buf *tx_buf;
-+ 	u32 cpu, dma;
-+ 
-+-	cpu = mtk_r32(eth, MTK_QTX_CRX_PTR);
-++	cpu = ring->last_free_ptr;
-+ 	dma = mtk_r32(eth, MTK_QTX_DRX_PTR);
-+ 
-+ 	desc = mtk_qdma_phys_to_virt(ring, cpu);
-+@@ -1396,6 +1396,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
-+ 		cpu = next_cpu;
-+ 	}
-+ 
-++	ring->last_free_ptr = cpu;
-+ 	mtk_w32(eth, cpu, MTK_QTX_CRX_PTR);
-+ 
-+ 	return budget;
-+@@ -1596,6 +1597,7 @@ static int mtk_tx_alloc(struct mtk_eth *
-+ 	atomic_set(&ring->free_count, MTK_DMA_SIZE - 2);
-+ 	ring->next_free = &ring->dma[0];
-+ 	ring->last_free = &ring->dma[MTK_DMA_SIZE - 1];
-++	ring->last_free_ptr = (u32)(ring->phys + ((MTK_DMA_SIZE - 1) * sz));
-+ 	ring->thresh = MAX_SKB_FRAGS;
-+ 
-+ 	/* make sure that all changes to the dma ring are flushed before we
-+@@ -1609,9 +1611,7 @@ static int mtk_tx_alloc(struct mtk_eth *
-+ 		mtk_w32(eth,
-+ 			ring->phys + ((MTK_DMA_SIZE - 1) * sz),
-+ 			MTK_QTX_CRX_PTR);
-+-		mtk_w32(eth,
-+-			ring->phys + ((MTK_DMA_SIZE - 1) * sz),
-+-			MTK_QTX_DRX_PTR);
-++		mtk_w32(eth, ring->last_free_ptr, MTK_QTX_DRX_PTR);
-+ 		mtk_w32(eth, (QDMA_RES_THRES << 8) | QDMA_RES_THRES,
-+ 			MTK_QTX_CFG(0));
-+ 	} else {
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-+@@ -624,6 +624,7 @@ struct mtk_tx_buf {
-+  * @phys:		The physical addr of tx_buf
-+  * @next_free:		Pointer to the next free descriptor
-+  * @last_free:		Pointer to the last free descriptor
-++ * @last_free_ptr:	Hardware pointer value of the last free descriptor
-+  * @thresh:		The threshold of minimum amount of free descriptors
-+  * @free_count:		QDMA uses a linked list. Track how many free descriptors
-+  *			are present
-+@@ -634,6 +635,7 @@ struct mtk_tx_ring {
-+ 	dma_addr_t phys;
-+ 	struct mtk_tx_dma *next_free;
-+ 	struct mtk_tx_dma *last_free;
-++	u32 last_free_ptr;
-+ 	u16 thresh;
-+ 	atomic_t free_count;
-+ 	int dma_size;
-diff --git a/target/linux/generic/pending-5.10/770-09-net-ethernet-mtk_eth_soc-only-read-the-full-rx-descr.patch b/target/linux/generic/pending-5.10/770-09-net-ethernet-mtk_eth_soc-only-read-the-full-rx-descr.patch
-new file mode 100644
-index 0000000000..bbd8ae7be4
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/770-09-net-ethernet-mtk_eth_soc-only-read-the-full-rx-descr.patch
-@@ -0,0 +1,44 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Thu, 27 Aug 2020 09:24:25 +0200
-+Subject: [PATCH] net: ethernet: mtk_eth_soc: only read the full rx
-+ descriptor if DMA is done
-+
-+Uncached memory access is expensive, and there is no need to access all
-+descriptor words if we can't process them anyway
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+@@ -776,13 +776,18 @@ static inline int mtk_max_buf_size(int f
-+ 	return buf_size;
-+ }
-+ 
-+-static inline void mtk_rx_get_desc(struct mtk_rx_dma *rxd,
-++static inline bool mtk_rx_get_desc(struct mtk_rx_dma *rxd,
-+ 				   struct mtk_rx_dma *dma_rxd)
-+ {
-+-	rxd->rxd1 = READ_ONCE(dma_rxd->rxd1);
-+ 	rxd->rxd2 = READ_ONCE(dma_rxd->rxd2);
-++	if (!(rxd->rxd2 & RX_DMA_DONE))
-++		return false;
-++
-++	rxd->rxd1 = READ_ONCE(dma_rxd->rxd1);
-+ 	rxd->rxd3 = READ_ONCE(dma_rxd->rxd3);
-+ 	rxd->rxd4 = READ_ONCE(dma_rxd->rxd4);
-++
-++	return true;
-+ }
-+ 
-+ /* the qdma core needs scratch memory to be setup */
-+@@ -1254,8 +1259,7 @@ static int mtk_poll_rx(struct napi_struc
-+ 		rxd = &ring->dma[idx];
-+ 		data = ring->data[idx];
-+ 
-+-		mtk_rx_get_desc(&trxd, rxd);
-+-		if (!(trxd.rxd2 & RX_DMA_DONE))
-++		if (!mtk_rx_get_desc(&trxd, rxd))
-+ 			break;
-+ 
-+ 		/* find out which mac the packet come from. values start at 1 */
-diff --git a/target/linux/generic/pending-5.10/770-10-net-ethernet-mtk_eth_soc-unmap-rx-data-before-callin.patch b/target/linux/generic/pending-5.10/770-10-net-ethernet-mtk_eth_soc-unmap-rx-data-before-callin.patch
-new file mode 100644
-index 0000000000..4a19fa1164
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/770-10-net-ethernet-mtk_eth_soc-unmap-rx-data-before-callin.patch
-@@ -0,0 +1,44 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Thu, 27 Aug 2020 09:44:43 +0200
-+Subject: [PATCH] net: ethernet: mtk_eth_soc: unmap rx data before calling
-+ build_skb
-+
-+Since build_skb accesses the data area (for initializing shinfo), dma unmap
-+needs to happen before that call
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+@@ -1297,17 +1297,18 @@ static int mtk_poll_rx(struct napi_struc
-+ 			goto release_desc;
-+ 		}
-+ 
-++		dma_unmap_single(eth->dev, trxd.rxd1,
-++				 ring->buf_size, DMA_FROM_DEVICE);
-++
-+ 		/* receive data */
-+ 		skb = build_skb(data, ring->frag_size);
-+ 		if (unlikely(!skb)) {
-+-			skb_free_frag(new_data);
-++			skb_free_frag(data);
-+ 			netdev->stats.rx_dropped++;
-+-			goto release_desc;
-++			goto skip_rx;
-+ 		}
-+ 		skb_reserve(skb, NET_SKB_PAD + NET_IP_ALIGN);
-+ 
-+-		dma_unmap_single(eth->dev, trxd.rxd1,
-+-				 ring->buf_size, DMA_FROM_DEVICE);
-+ 		pktlen = RX_DMA_GET_PLEN0(trxd.rxd2);
-+ 		skb->dev = netdev;
-+ 		skb_put(skb, pktlen);
-+@@ -1325,6 +1326,7 @@ static int mtk_poll_rx(struct napi_struc
-+ 		skb_record_rx_queue(skb, 0);
-+ 		napi_gro_receive(napi, skb);
-+ 
-++skip_rx:
-+ 		ring->data[idx] = new_data;
-+ 		rxd->rxd1 = (unsigned int)dma_addr;
-+ 
-diff --git a/target/linux/generic/pending-5.10/770-11-net-ethernet-mtk_eth_soc-avoid-rearming-interrupt-if.patch b/target/linux/generic/pending-5.10/770-11-net-ethernet-mtk_eth_soc-avoid-rearming-interrupt-if.patch
-new file mode 100644
-index 0000000000..4c61951d77
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/770-11-net-ethernet-mtk_eth_soc-avoid-rearming-interrupt-if.patch
-@@ -0,0 +1,35 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Fri, 4 Sep 2020 18:14:05 +0200
-+Subject: [PATCH] net: ethernet: mtk_eth_soc: avoid rearming interrupt if
-+ napi_complete returns false
-+
-+Reduces unnecessary interrupts
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+@@ -1519,8 +1519,8 @@ static int mtk_napi_tx(struct napi_struc
-+ 	if (status & MTK_TX_DONE_INT)
-+ 		return budget;
-+ 
-+-	napi_complete(napi);
-+-	mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
-++	if (napi_complete(napi))
-++		mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
-+ 
-+ 	return tx_done;
-+ }
-+@@ -1553,8 +1553,9 @@ poll_again:
-+ 		remain_budget -= rx_done;
-+ 		goto poll_again;
-+ 	}
-+-	napi_complete(napi);
-+-	mtk_rx_irq_enable(eth, MTK_RX_DONE_INT);
-++
-++	if (napi_complete(napi))
-++		mtk_rx_irq_enable(eth, MTK_RX_DONE_INT);
-+ 
-+ 	return rx_done + budget - remain_budget;
-+ }
-diff --git a/target/linux/generic/pending-5.10/770-13-net-ethernet-mtk_eth_soc-fix-parsing-packets-in-GDM.patch b/target/linux/generic/pending-5.10/770-13-net-ethernet-mtk_eth_soc-fix-parsing-packets-in-GDM.patch
-new file mode 100644
-index 0000000000..d81d4bf5f4
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/770-13-net-ethernet-mtk_eth_soc-fix-parsing-packets-in-GDM.patch
-@@ -0,0 +1,67 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Sun, 13 Sep 2020 08:17:02 +0200
-+Subject: [PATCH] net: ethernet: mtk_eth_soc: fix parsing packets in GDM
-+
-+When using DSA, set the special tag in GDM ingress control to allow the MAC
-+to parse packets properly earlier. This affects rx DMA source port reporting.
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+@@ -19,6 +19,7 @@
-+ #include <linux/interrupt.h>
-+ #include <linux/pinctrl/devinfo.h>
-+ #include <linux/phylink.h>
-++#include <net/dsa.h>
-+ 
-+ #include "mtk_eth_soc.h"
-+ 
-+@@ -1263,13 +1264,12 @@ static int mtk_poll_rx(struct napi_struc
-+ 			break;
-+ 
-+ 		/* find out which mac the packet come from. values start at 1 */
-+-		if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
-++		if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) ||
-++		    (trxd.rxd4 & RX_DMA_SPECIAL_TAG))
-+ 			mac = 0;
-+-		} else {
-+-			mac = (trxd.rxd4 >> RX_DMA_FPORT_SHIFT) &
-+-				RX_DMA_FPORT_MASK;
-+-			mac--;
-+-		}
-++		else
-++			mac = ((trxd.rxd4 >> RX_DMA_FPORT_SHIFT) &
-++			       RX_DMA_FPORT_MASK) - 1;
-+ 
-+ 		if (unlikely(mac < 0 || mac >= MTK_MAC_COUNT ||
-+ 			     !eth->netdev[mac]))
-+@@ -2251,6 +2251,9 @@ static void mtk_gdm_config(struct mtk_et
-+ 
-+ 		val |= config;
-+ 
-++		if (!i && eth->netdev[0] && netdev_uses_dsa(eth->netdev[0]))
-++			val |= MTK_GDMA_SPECIAL_TAG;
-++
-+ 		mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
-+ 	}
-+ 	/* Reset and enable PSE */
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-+@@ -82,6 +82,7 @@
-+ 
-+ /* GDM Exgress Control Register */
-+ #define MTK_GDMA_FWD_CFG(x)	(0x500 + (x * 0x1000))
-++#define MTK_GDMA_SPECIAL_TAG	BIT(24)
-+ #define MTK_GDMA_ICS_EN		BIT(22)
-+ #define MTK_GDMA_TCS_EN		BIT(21)
-+ #define MTK_GDMA_UCS_EN		BIT(20)
-+@@ -311,6 +312,7 @@
-+ #define RX_DMA_L4_VALID_PDMA	BIT(30)		/* when PDMA is used */
-+ #define RX_DMA_FPORT_SHIFT	19
-+ #define RX_DMA_FPORT_MASK	0x7
-++#define RX_DMA_SPECIAL_TAG	BIT(22)
-+ 
-+ /* PHY Indirect Access Control registers */
-+ #define MTK_PHY_IAC		0x10004
-diff --git a/target/linux/generic/pending-5.10/770-14-net-ethernet-mtk_eth_soc-set-PPE-flow-hash-as-skb-ha.patch b/target/linux/generic/pending-5.10/770-14-net-ethernet-mtk_eth_soc-set-PPE-flow-hash-as-skb-ha.patch
-new file mode 100644
-index 0000000000..e94b352b9c
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/770-14-net-ethernet-mtk_eth_soc-set-PPE-flow-hash-as-skb-ha.patch
-@@ -0,0 +1,41 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Sun, 13 Sep 2020 08:27:24 +0200
-+Subject: [PATCH] net: ethernet: mtk_eth_soc: set PPE flow hash as skb hash
-+ if present
-+
-+This improves GRO performance
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+@@ -19,6 +19,7 @@
-+ #include <linux/interrupt.h>
-+ #include <linux/pinctrl/devinfo.h>
-+ #include <linux/phylink.h>
-++#include <linux/jhash.h>
-+ #include <net/dsa.h>
-+ 
-+ #include "mtk_eth_soc.h"
-+@@ -1250,6 +1251,7 @@ static int mtk_poll_rx(struct napi_struc
-+ 		struct net_device *netdev;
-+ 		unsigned int pktlen;
-+ 		dma_addr_t dma_addr;
-++		u32 hash;
-+ 		int mac;
-+ 
-+ 		ring = mtk_get_rx_ring(eth);
-+@@ -1319,6 +1321,12 @@ static int mtk_poll_rx(struct napi_struc
-+ 		skb->protocol = eth_type_trans(skb, netdev);
-+ 		bytes += pktlen;
-+ 
-++		hash = trxd.rxd4 & GENMASK(13, 0);
-++		if (hash != GENMASK(13, 0)) {
-++			hash = jhash_1word(hash, 0);
-++			skb_set_hash(skb, hash, PKT_HASH_TYPE_L4);
-++		}
-++
-+ 		if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX &&
-+ 		    (trxd.rxd2 & RX_DMA_VTAG))
-+ 			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
-diff --git a/target/linux/generic/pending-5.10/770-15-net-ethernet-mtk_eth_soc-add-support-for-initializin.patch b/target/linux/generic/pending-5.10/770-15-net-ethernet-mtk_eth_soc-add-support-for-initializin.patch
-new file mode 100644
-index 0000000000..09282175b0
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/770-15-net-ethernet-mtk_eth_soc-add-support-for-initializin.patch
-@@ -0,0 +1,1307 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Sun, 11 Oct 2020 22:23:08 +0200
-+Subject: [PATCH] ethernet: mediatek: mtk_eth_soc: add support for
-+ initializing the PPE
-+
-+The PPE (packet processing engine) is used to offload NAT/routed or even
-+bridged flows. This patch brings up the PPE and uses it to get a packet
-+hash. It also contains some functionality that will be used to bring up
-+flow offloading.
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ create mode 100644 drivers/net/ethernet/mediatek/mtk_ppe.c
-+ create mode 100644 drivers/net/ethernet/mediatek/mtk_ppe.h
-+ create mode 100644 drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c
-+ create mode 100644 drivers/net/ethernet/mediatek/mtk_ppe_regs.h
-+
-+--- a/drivers/net/ethernet/mediatek/Makefile
-++++ b/drivers/net/ethernet/mediatek/Makefile
-+@@ -4,5 +4,5 @@
-+ #
-+ 
-+ obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk_eth.o
-+-mtk_eth-y := mtk_eth_soc.o mtk_sgmii.o mtk_eth_path.o
-++mtk_eth-y := mtk_eth_soc.o mtk_sgmii.o mtk_eth_path.o mtk_ppe.o mtk_ppe_debugfs.o
-+ obj-$(CONFIG_NET_MEDIATEK_STAR_EMAC) += mtk_star_emac.o
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+@@ -2284,12 +2284,17 @@ static int mtk_open(struct net_device *d
-+ 
-+ 	/* we run 2 netdevs on the same dma ring so we only bring it up once */
-+ 	if (!refcount_read(&eth->dma_refcnt)) {
-+-		int err = mtk_start_dma(eth);
-++		u32 gdm_config = MTK_GDMA_TO_PDMA;
-++		int err;
-+ 
-++		err = mtk_start_dma(eth);
-+ 		if (err)
-+ 			return err;
-+ 
-+-		mtk_gdm_config(eth, MTK_GDMA_TO_PDMA);
-++		if (eth->soc->offload_version && mtk_ppe_start(&eth->ppe) == 0)
-++			gdm_config = MTK_GDMA_TO_PPE;
-++
-++		mtk_gdm_config(eth, gdm_config);
-+ 
-+ 		napi_enable(&eth->tx_napi);
-+ 		napi_enable(&eth->rx_napi);
-+@@ -2359,6 +2364,9 @@ static int mtk_stop(struct net_device *d
-+ 
-+ 	mtk_dma_free(eth);
-+ 
-++	if (eth->soc->offload_version)
-++		mtk_ppe_stop(&eth->ppe);
-++
-+ 	return 0;
-+ }
-+ 
-+@@ -3148,6 +3156,13 @@ static int mtk_probe(struct platform_dev
-+ 			goto err_free_dev;
-+ 	}
-+ 
-++	if (eth->soc->offload_version) {
-++		err = mtk_ppe_init(&eth->ppe, eth->dev,
-++				   eth->base + MTK_ETH_PPE_BASE, 2);
-++		if (err)
-++			goto err_free_dev;
-++	}
-++
-+ 	for (i = 0; i < MTK_MAX_DEVS; i++) {
-+ 		if (!eth->netdev[i])
-+ 			continue;
-+@@ -3222,6 +3237,7 @@ static const struct mtk_soc_data mt7621_
-+ 	.hw_features = MTK_HW_FEATURES,
-+ 	.required_clks = MT7621_CLKS_BITMAP,
-+ 	.required_pctl = false,
-++	.offload_version = 2,
-+ };
-+ 
-+ static const struct mtk_soc_data mt7622_data = {
-+@@ -3230,6 +3246,7 @@ static const struct mtk_soc_data mt7622_
-+ 	.hw_features = MTK_HW_FEATURES,
-+ 	.required_clks = MT7622_CLKS_BITMAP,
-+ 	.required_pctl = false,
-++	.offload_version = 2,
-+ };
-+ 
-+ static const struct mtk_soc_data mt7623_data = {
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-+@@ -16,6 +16,7 @@
-+ #include <linux/refcount.h>
-+ #include <linux/phylink.h>
-+ #include <linux/dim.h>
-++#include "mtk_ppe.h"
-+ 
-+ #define MTK_QDMA_PAGE_SIZE	2048
-+ #define	MTK_MAX_RX_LENGTH	1536
-+@@ -87,6 +88,7 @@
-+ #define MTK_GDMA_TCS_EN		BIT(21)
-+ #define MTK_GDMA_UCS_EN		BIT(20)
-+ #define MTK_GDMA_TO_PDMA	0x0
-++#define MTK_GDMA_TO_PPE		0x4444
-+ #define MTK_GDMA_DROP_ALL       0x7777
-+ 
-+ /* Unicast Filter MAC Address Register - Low */
-+@@ -308,6 +310,12 @@
-+ #define RX_DMA_VID(_x)		((_x) & 0xfff)
-+ 
-+ /* QDMA descriptor rxd4 */
-++#define MTK_RXD4_FOE_ENTRY	GENMASK(13, 0)
-++#define MTK_RXD4_PPE_CPU_REASON	GENMASK(18, 14)
-++#define MTK_RXD4_SRC_PORT	GENMASK(21, 19)
-++#define MTK_RXD4_ALG		GENMASK(31, 22)
-++
-++/* QDMA descriptor rxd4 */
-+ #define RX_DMA_L4_VALID		BIT(24)
-+ #define RX_DMA_L4_VALID_PDMA	BIT(30)		/* when PDMA is used */
-+ #define RX_DMA_FPORT_SHIFT	19
-+@@ -807,6 +815,7 @@ struct mtk_soc_data {
-+ 	u32		caps;
-+ 	u32		required_clks;
-+ 	bool		required_pctl;
-++	u8		offload_version;
-+ 	netdev_features_t hw_features;
-+ };
-+ 
-+@@ -918,6 +927,8 @@ struct mtk_eth {
-+ 	u32				tx_int_status_reg;
-+ 	u32				rx_dma_l4_valid;
-+ 	int				ip_align;
-++
-++	struct mtk_ppe			ppe;
-+ };
-+ 
-+ /* struct mtk_mac -	the structure that holds the info about the MACs of the
-+--- /dev/null
-++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
-+@@ -0,0 +1,511 @@
-++// SPDX-License-Identifier: GPL-2.0-only
-++/* Copyright (C) 2020 Felix Fietkau <nbd@nbd.name> */
-++
-++#include <linux/kernel.h>
-++#include <linux/jiffies.h>
-++#include <linux/delay.h>
-++#include <linux/io.h>
-++#include <linux/etherdevice.h>
-++#include <linux/platform_device.h>
-++#include "mtk_ppe.h"
-++#include "mtk_ppe_regs.h"
-++
-++static void ppe_w32(struct mtk_ppe *ppe, u32 reg, u32 val)
-++{
-++	writel(val, ppe->base + reg);
-++}
-++
-++static u32 ppe_r32(struct mtk_ppe *ppe, u32 reg)
-++{
-++	return readl(ppe->base + reg);
-++}
-++
-++static u32 ppe_m32(struct mtk_ppe *ppe, u32 reg, u32 mask, u32 set)
-++{
-++	u32 val;
-++
-++	val = ppe_r32(ppe, reg);
-++	val &= ~mask;
-++	val |= set;
-++	ppe_w32(ppe, reg, val);
-++
-++	return val;
-++}
-++
-++static u32 ppe_set(struct mtk_ppe *ppe, u32 reg, u32 val)
-++{
-++	return ppe_m32(ppe, reg, 0, val);
-++}
-++
-++static u32 ppe_clear(struct mtk_ppe *ppe, u32 reg, u32 val)
-++{
-++	return ppe_m32(ppe, reg, val, 0);
-++}
-++
-++static int mtk_ppe_wait_busy(struct mtk_ppe *ppe)
-++{
-++	unsigned long timeout = jiffies + HZ;
-++
-++	while (time_is_after_jiffies(timeout)) {
-++		if (!(ppe_r32(ppe, MTK_PPE_GLO_CFG) & MTK_PPE_GLO_CFG_BUSY))
-++			return 0;
-++
-++		usleep_range(10, 20);
-++	}
-++
-++	dev_err(ppe->dev, "PPE table busy");
-++
-++	return -ETIMEDOUT;
-++}
-++
-++static void mtk_ppe_cache_clear(struct mtk_ppe *ppe)
-++{
-++	ppe_set(ppe, MTK_PPE_CACHE_CTL, MTK_PPE_CACHE_CTL_CLEAR);
-++	ppe_clear(ppe, MTK_PPE_CACHE_CTL, MTK_PPE_CACHE_CTL_CLEAR);
-++}
-++
-++static void mtk_ppe_cache_enable(struct mtk_ppe *ppe, bool enable)
-++{
-++	mtk_ppe_cache_clear(ppe);
-++
-++	ppe_m32(ppe, MTK_PPE_CACHE_CTL, MTK_PPE_CACHE_CTL_EN,
-++		enable * MTK_PPE_CACHE_CTL_EN);
-++}
-++
-++static u32 mtk_ppe_hash_entry(struct mtk_foe_entry *e)
-++{
-++	u32 hv1, hv2, hv3;
-++	u32 hash;
-++
-++	switch (FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, e->ib1)) {
-++		case MTK_PPE_PKT_TYPE_BRIDGE:
-++			hv1 = e->bridge.src_mac_lo;
-++			hv1 ^= ((e->bridge.src_mac_hi & 0xffff) << 16);
-++			hv2 = e->bridge.src_mac_hi >> 16;
-++			hv2 ^= e->bridge.dest_mac_lo;
-++			hv3 = e->bridge.dest_mac_hi;
-++			break;
-++		case MTK_PPE_PKT_TYPE_IPV4_ROUTE:
-++		case MTK_PPE_PKT_TYPE_IPV4_HNAPT:
-++			hv1 = e->ipv4.orig.ports;
-++			hv2 = e->ipv4.orig.dest_ip;
-++			hv3 = e->ipv4.orig.src_ip;
-++			break;
-++		case MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T:
-++		case MTK_PPE_PKT_TYPE_IPV6_ROUTE_5T:
-++			hv1 = e->ipv6.src_ip[3] ^ e->ipv6.dest_ip[3];
-++			hv1 ^= e->ipv6.ports;
-++
-++			hv2 = e->ipv6.src_ip[2] ^ e->ipv6.dest_ip[2];
-++			hv2 ^= e->ipv6.dest_ip[0];
-++
-++			hv3 = e->ipv6.src_ip[1] ^ e->ipv6.dest_ip[1];
-++			hv3 ^= e->ipv6.src_ip[0];
-++			break;
-++		case MTK_PPE_PKT_TYPE_IPV4_DSLITE:
-++		case MTK_PPE_PKT_TYPE_IPV6_6RD:
-++		default:
-++			WARN_ON_ONCE(1);
-++			return MTK_PPE_HASH_MASK;
-++	}
-++
-++	hash = (hv1 & hv2) | ((~hv1) & hv3);
-++	hash = (hash >> 24) | ((hash & 0xffffff) << 8);
-++	hash ^= hv1 ^ hv2 ^ hv3;
-++	hash ^= hash >> 16;
-++	hash <<= 1;
-++	hash &= MTK_PPE_ENTRIES - 1;
-++
-++	return hash;
-++}
-++
-++static inline struct mtk_foe_mac_info *
-++mtk_foe_entry_l2(struct mtk_foe_entry *entry)
-++{
-++	int type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1);
-++
-++	if (type >= MTK_PPE_PKT_TYPE_IPV4_DSLITE)
-++		return &entry->ipv6.l2;
-++
-++	return &entry->ipv4.l2;
-++}
-++
-++static inline u32 *
-++mtk_foe_entry_ib2(struct mtk_foe_entry *entry)
-++{
-++	int type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1);
-++
-++	if (type >= MTK_PPE_PKT_TYPE_IPV4_DSLITE)
-++		return &entry->ipv6.ib2;
-++
-++	return &entry->ipv4.ib2;
-++}
-++
-++int mtk_foe_entry_prepare(struct mtk_foe_entry *entry, int type, int l4proto,
-++			  u8 pse_port, u8 *src_mac, u8 *dest_mac)
-++{
-++	struct mtk_foe_mac_info *l2;
-++	u32 ports_pad, val;
-++
-++	memset(entry, 0, sizeof(*entry));
-++
-++	val = FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_BIND) |
-++	      FIELD_PREP(MTK_FOE_IB1_PACKET_TYPE, type) |
-++	      FIELD_PREP(MTK_FOE_IB1_UDP, l4proto == IPPROTO_UDP) |
-++	      MTK_FOE_IB1_BIND_TTL |
-++	      MTK_FOE_IB1_BIND_CACHE;
-++	entry->ib1 = val;
-++
-++	val = FIELD_PREP(MTK_FOE_IB2_PORT_MG, 0x3f) |
-++	      FIELD_PREP(MTK_FOE_IB2_PORT_AG, 0x1f) |
-++	      FIELD_PREP(MTK_FOE_IB2_DEST_PORT, pse_port);
-++
-++	if (is_multicast_ether_addr(dest_mac))
-++		val |= MTK_FOE_IB2_MULTICAST;
-++
-++	ports_pad = 0xa5a5a500 | (l4proto & 0xff);
-++	if (type == MTK_PPE_PKT_TYPE_IPV4_ROUTE)
-++		entry->ipv4.orig.ports = ports_pad;
-++	if (type == MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T)
-++		entry->ipv6.ports = ports_pad;
-++
-++	if (type >= MTK_PPE_PKT_TYPE_IPV4_DSLITE) {
-++		entry->ipv6.ib2 = val;
-++		l2 = &entry->ipv6.l2;
-++	} else {
-++		entry->ipv4.ib2 = val;
-++		l2 = &entry->ipv4.l2;
-++	}
-++
-++	l2->dest_mac_hi = get_unaligned_be32(dest_mac);
-++	l2->dest_mac_lo = get_unaligned_be16(dest_mac + 4);
-++	l2->src_mac_hi = get_unaligned_be32(src_mac);
-++	l2->src_mac_lo = get_unaligned_be16(src_mac + 4);
-++
-++	if (type >= MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T)
-++		l2->etype = ETH_P_IPV6;
-++	else
-++		l2->etype = ETH_P_IP;
-++
-++	return 0;
-++}
-++
-++int mtk_foe_entry_set_pse_port(struct mtk_foe_entry *entry, u8 port)
-++{
-++	u32 *ib2 = mtk_foe_entry_ib2(entry);
-++	u32 val;
-++
-++	val = *ib2;
-++	val &= ~MTK_FOE_IB2_DEST_PORT;
-++	val |= FIELD_PREP(MTK_FOE_IB2_DEST_PORT, port);
-++	*ib2 = val;
-++
-++	return 0;
-++}
-++
-++int mtk_foe_entry_set_ipv4_tuple(struct mtk_foe_entry *entry, bool egress,
-++				 __be32 src_addr, __be16 src_port,
-++				 __be32 dest_addr, __be16 dest_port)
-++{
-++	int type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1);
-++	struct mtk_ipv4_tuple *t;
-++
-++	switch (type) {
-++	case MTK_PPE_PKT_TYPE_IPV4_HNAPT:
-++		if (egress) {
-++			t = &entry->ipv4.new;
-++			break;
-++		}
-++		fallthrough;
-++	case MTK_PPE_PKT_TYPE_IPV4_DSLITE:
-++	case MTK_PPE_PKT_TYPE_IPV4_ROUTE:
-++		t = &entry->ipv4.orig;
-++		break;
-++	case MTK_PPE_PKT_TYPE_IPV6_6RD:
-++		entry->ipv6_6rd.tunnel_src_ip = be32_to_cpu(src_addr);
-++		entry->ipv6_6rd.tunnel_dest_ip = be32_to_cpu(dest_addr);
-++		return 0;
-++	default:
-++		WARN_ON_ONCE(1);
-++		return -EINVAL;
-++	}
-++
-++	t->src_ip = be32_to_cpu(src_addr);
-++	t->dest_ip = be32_to_cpu(dest_addr);
-++
-++	if (type == MTK_PPE_PKT_TYPE_IPV4_ROUTE)
-++		return 0;
-++
-++	t->src_port = be16_to_cpu(src_port);
-++	t->dest_port = be16_to_cpu(dest_port);
-++
-++	return 0;
-++}
-++
-++int mtk_foe_entry_set_ipv6_tuple(struct mtk_foe_entry *entry,
-++				 __be32 *src_addr, __be16 src_port,
-++				 __be32 *dest_addr, __be16 dest_port)
-++{
-++	int type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1);
-++	u32 *src, *dest;
-++	int i;
-++
-++	switch (type) {
-++	case MTK_PPE_PKT_TYPE_IPV4_DSLITE:
-++		src = entry->dslite.tunnel_src_ip;
-++		dest = entry->dslite.tunnel_dest_ip;
-++		break;
-++	case MTK_PPE_PKT_TYPE_IPV6_ROUTE_5T:
-++	case MTK_PPE_PKT_TYPE_IPV6_6RD:
-++		entry->ipv6.src_port = be16_to_cpu(src_port);
-++		entry->ipv6.dest_port = be16_to_cpu(dest_port);
-++		fallthrough;
-++	case MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T:
-++		src = entry->ipv6.src_ip;
-++		dest = entry->ipv6.dest_ip;
-++		break;
-++	default:
-++		WARN_ON_ONCE(1);
-++		return -EINVAL;
-++	};
-++
-++	for (i = 0; i < 4; i++)
-++		src[i] = be32_to_cpu(src_addr[i]);
-++	for (i = 0; i < 4; i++)
-++		dest[i] = be32_to_cpu(dest_addr[i]);
-++
-++	return 0;
-++}
-++
-++int mtk_foe_entry_set_dsa(struct mtk_foe_entry *entry, int port)
-++{
-++	struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(entry);
-++
-++	l2->etype = BIT(port);
-++
-++	if (!(entry->ib1 & MTK_FOE_IB1_BIND_VLAN_LAYER))
-++		entry->ib1 |= FIELD_PREP(MTK_FOE_IB1_BIND_VLAN_LAYER, 1);
-++	else
-++		l2->etype |= BIT(8);
-++
-++	entry->ib1 &= ~MTK_FOE_IB1_BIND_VLAN_TAG;
-++
-++	return 0;
-++}
-++
-++int mtk_foe_entry_set_vlan(struct mtk_foe_entry *entry, int vid)
-++{
-++	struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(entry);
-++
-++	switch (FIELD_GET(MTK_FOE_IB1_BIND_VLAN_LAYER, entry->ib1)) {
-++	case 0:
-++		entry->ib1 |= MTK_FOE_IB1_BIND_VLAN_TAG |
-++			      FIELD_PREP(MTK_FOE_IB1_BIND_VLAN_LAYER, 1);
-++		l2->vlan1 = vid;
-++		return 0;
-++	case 1:
-++		if (!(entry->ib1 & MTK_FOE_IB1_BIND_VLAN_TAG)) {
-++			l2->vlan1 = vid;
-++			l2->etype |= BIT(8);
-++		} else {
-++			l2->vlan2 = vid;
-++			entry->ib1 += FIELD_PREP(MTK_FOE_IB1_BIND_VLAN_LAYER, 1);
-++		}
-++		return 0;
-++	default:
-++		return -ENOSPC;
-++	}
-++}
-++
-++int mtk_foe_entry_set_pppoe(struct mtk_foe_entry *entry, int sid)
-++{
-++	struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(entry);
-++
-++	if (!(entry->ib1 & MTK_FOE_IB1_BIND_VLAN_LAYER) ||
-++	    (entry->ib1 & MTK_FOE_IB1_BIND_VLAN_TAG))
-++		l2->etype = ETH_P_PPP_SES;
-++
-++	entry->ib1 |= MTK_FOE_IB1_BIND_PPPOE;
-++	l2->pppoe_id = sid;
-++
-++	return 0;
-++}
-++
-++static inline bool mtk_foe_entry_usable(struct mtk_foe_entry *entry)
-++{
-++	return !(entry->ib1 & MTK_FOE_IB1_STATIC) &&
-++	       FIELD_GET(MTK_FOE_IB1_STATE, entry->ib1) != MTK_FOE_STATE_BIND;
-++}
-++
-++int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_foe_entry *entry,
-++			 u16 timestamp)
-++{
-++	struct mtk_foe_entry *hwe;
-++	u32 hash;
-++
-++	timestamp &= MTK_FOE_IB1_BIND_TIMESTAMP;
-++	entry->ib1 &= ~MTK_FOE_IB1_BIND_TIMESTAMP;
-++	entry->ib1 |= FIELD_PREP(MTK_FOE_IB1_BIND_TIMESTAMP, timestamp);
-++
-++	hash = mtk_ppe_hash_entry(entry);
-++	hwe = &ppe->foe_table[hash];
-++	if (!mtk_foe_entry_usable(hwe)) {
-++		hwe++;
-++		hash++;
-++
-++		if (!mtk_foe_entry_usable(hwe))
-++			return -ENOSPC;
-++	}
-++
-++	memcpy(&hwe->data, &entry->data, sizeof(hwe->data));
-++	wmb();
-++	hwe->ib1 = entry->ib1;
-++
-++	dma_wmb();
-++
-++	mtk_ppe_cache_clear(ppe);
-++
-++	return hash;
-++}
-++
-++int mtk_ppe_init(struct mtk_ppe *ppe, struct device *dev, void __iomem *base,
-++		 int version)
-++{
-++	struct mtk_foe_entry *foe;
-++
-++	/* need to allocate a separate device, since it PPE DMA access is
-++	 * not coherent.
-++	 */
-++	ppe->base = base;
-++	ppe->dev = dev;
-++	ppe->version = version;
-++
-++	foe = dmam_alloc_coherent(ppe->dev, MTK_PPE_ENTRIES * sizeof(*foe),
-++				  &ppe->foe_phys, GFP_KERNEL);
-++	if (!foe)
-++		return -ENOMEM;
-++
-++	ppe->foe_table = foe;
-++
-++	mtk_ppe_debugfs_init(ppe);
-++
-++	return 0;
-++}
-++
-++static void mtk_ppe_init_foe_table(struct mtk_ppe *ppe)
-++{
-++	static const u8 skip[] = { 12, 25, 38, 51, 76, 89, 102 };
-++	int i, k;
-++
-++	memset(ppe->foe_table, 0, MTK_PPE_ENTRIES * sizeof(ppe->foe_table));
-++
-++	if (!IS_ENABLED(CONFIG_SOC_MT7621))
-++		return;
-++
-++	/* skip all entries that cross the 1024 byte boundary */
-++	for (i = 0; i < MTK_PPE_ENTRIES; i += 128)
-++		for (k = 0; k < ARRAY_SIZE(skip); k++)
-++			ppe->foe_table[i + skip[k]].ib1 |= MTK_FOE_IB1_STATIC;
-++}
-++
-++int mtk_ppe_start(struct mtk_ppe *ppe)
-++{
-++	u32 val;
-++
-++	mtk_ppe_init_foe_table(ppe);
-++	ppe_w32(ppe, MTK_PPE_TB_BASE, ppe->foe_phys);
-++
-++	val = MTK_PPE_TB_CFG_ENTRY_80B |
-++	      MTK_PPE_TB_CFG_AGE_NON_L4 |
-++	      MTK_PPE_TB_CFG_AGE_UNBIND |
-++	      MTK_PPE_TB_CFG_AGE_TCP |
-++	      MTK_PPE_TB_CFG_AGE_UDP |
-++	      MTK_PPE_TB_CFG_AGE_TCP_FIN |
-++	      FIELD_PREP(MTK_PPE_TB_CFG_SEARCH_MISS,
-++			 MTK_PPE_SEARCH_MISS_ACTION_FORWARD_BUILD) |
-++	      FIELD_PREP(MTK_PPE_TB_CFG_KEEPALIVE,
-++			 MTK_PPE_KEEPALIVE_DISABLE) |
-++	      FIELD_PREP(MTK_PPE_TB_CFG_HASH_MODE, 1) |
-++	      FIELD_PREP(MTK_PPE_TB_CFG_SCAN_MODE,
-++			 MTK_PPE_SCAN_MODE_KEEPALIVE_AGE) |
-++	      FIELD_PREP(MTK_PPE_TB_CFG_ENTRY_NUM,
-++			 MTK_PPE_ENTRIES_SHIFT);
-++	ppe_w32(ppe, MTK_PPE_TB_CFG, val);
-++
-++	ppe_w32(ppe, MTK_PPE_IP_PROTO_CHK,
-++		MTK_PPE_IP_PROTO_CHK_IPV4 | MTK_PPE_IP_PROTO_CHK_IPV6);
-++
-++	mtk_ppe_cache_enable(ppe, true);
-++
-++	val = MTK_PPE_FLOW_CFG_IP4_TCP_FRAG |
-++	      MTK_PPE_FLOW_CFG_IP4_UDP_FRAG |
-++	      MTK_PPE_FLOW_CFG_IP6_3T_ROUTE |
-++	      MTK_PPE_FLOW_CFG_IP6_5T_ROUTE |
-++	      MTK_PPE_FLOW_CFG_IP6_6RD |
-++	      MTK_PPE_FLOW_CFG_IP4_NAT |
-++	      MTK_PPE_FLOW_CFG_IP4_NAPT |
-++	      MTK_PPE_FLOW_CFG_IP4_DSLITE |
-++	      MTK_PPE_FLOW_CFG_L2_BRIDGE |
-++	      MTK_PPE_FLOW_CFG_IP4_NAT_FRAG;
-++	ppe_w32(ppe, MTK_PPE_FLOW_CFG, val);
-++
-++	val = FIELD_PREP(MTK_PPE_UNBIND_AGE_MIN_PACKETS, 1000) |
-++	      FIELD_PREP(MTK_PPE_UNBIND_AGE_DELTA, 3);
-++	ppe_w32(ppe, MTK_PPE_UNBIND_AGE, val);
-++
-++	val = FIELD_PREP(MTK_PPE_BIND_AGE0_DELTA_UDP, 12) |
-++	      FIELD_PREP(MTK_PPE_BIND_AGE0_DELTA_NON_L4, 1);
-++	ppe_w32(ppe, MTK_PPE_BIND_AGE0, val);
-++
-++	val = FIELD_PREP(MTK_PPE_BIND_AGE1_DELTA_TCP_FIN, 1) |
-++	      FIELD_PREP(MTK_PPE_BIND_AGE1_DELTA_TCP, 7);
-++	ppe_w32(ppe, MTK_PPE_BIND_AGE1, val);
-++
-++	val = MTK_PPE_BIND_LIMIT0_QUARTER | MTK_PPE_BIND_LIMIT0_HALF;
-++	ppe_w32(ppe, MTK_PPE_BIND_LIMIT0, val);
-++
-++	val = MTK_PPE_BIND_LIMIT1_FULL |
-++	      FIELD_PREP(MTK_PPE_BIND_LIMIT1_NON_L4, 1);
-++	ppe_w32(ppe, MTK_PPE_BIND_LIMIT1, val);
-++
-++	val = FIELD_PREP(MTK_PPE_BIND_RATE_BIND, 30) |
-++	      FIELD_PREP(MTK_PPE_BIND_RATE_PREBIND, 1);
-++	ppe_w32(ppe, MTK_PPE_BIND_RATE, val);
-++
-++	/* enable PPE */
-++	val = MTK_PPE_GLO_CFG_EN |
-++	      MTK_PPE_GLO_CFG_IP4_L4_CS_DROP |
-++	      MTK_PPE_GLO_CFG_IP4_CS_DROP |
-++	      MTK_PPE_GLO_CFG_FLOW_DROP_UPDATE;
-++	ppe_w32(ppe, MTK_PPE_GLO_CFG, val);
-++
-++	ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT, 0);
-++
-++	return 0;
-++}
-++
-++int mtk_ppe_stop(struct mtk_ppe *ppe)
-++{
-++	u32 val;
-++	int i;
-++
-++	for (i = 0; i < MTK_PPE_ENTRIES; i++)
-++		ppe->foe_table[i].ib1 = FIELD_PREP(MTK_FOE_IB1_STATE,
-++						   MTK_FOE_STATE_INVALID);
-++
-++	mtk_ppe_cache_enable(ppe, false);
-++
-++	/* disable offload engine */
-++	ppe_clear(ppe, MTK_PPE_GLO_CFG, MTK_PPE_GLO_CFG_EN);
-++	ppe_w32(ppe, MTK_PPE_FLOW_CFG, 0);
-++
-++	/* disable aging */
-++	val = MTK_PPE_TB_CFG_AGE_NON_L4 |
-++	      MTK_PPE_TB_CFG_AGE_UNBIND |
-++	      MTK_PPE_TB_CFG_AGE_TCP |
-++	      MTK_PPE_TB_CFG_AGE_UDP |
-++	      MTK_PPE_TB_CFG_AGE_TCP_FIN;
-++	ppe_clear(ppe, MTK_PPE_TB_CFG, val);
-++
-++	return mtk_ppe_wait_busy(ppe);
-++}
-+--- /dev/null
-++++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
-+@@ -0,0 +1,287 @@
-++// SPDX-License-Identifier: GPL-2.0-only
-++/* Copyright (C) 2020 Felix Fietkau <nbd@nbd.name> */
-++
-++#ifndef __MTK_PPE_H
-++#define __MTK_PPE_H
-++
-++#include <linux/kernel.h>
-++#include <linux/bitfield.h>
-++
-++#define MTK_ETH_PPE_BASE		0xc00
-++
-++#define MTK_PPE_ENTRIES_SHIFT		3
-++#define MTK_PPE_ENTRIES			(1024 << MTK_PPE_ENTRIES_SHIFT)
-++#define MTK_PPE_HASH_MASK		(MTK_PPE_ENTRIES - 1)
-++
-++#define MTK_FOE_IB1_UNBIND_TIMESTAMP	GENMASK(7, 0)
-++#define MTK_FOE_IB1_UNBIND_PACKETS	GENMASK(23, 8)
-++#define MTK_FOE_IB1_UNBIND_PREBIND	BIT(24)
-++
-++#define MTK_FOE_IB1_BIND_TIMESTAMP	GENMASK(14, 0)
-++#define MTK_FOE_IB1_BIND_KEEPALIVE	BIT(15)
-++#define MTK_FOE_IB1_BIND_VLAN_LAYER	GENMASK(18, 16)
-++#define MTK_FOE_IB1_BIND_PPPOE		BIT(19)
-++#define MTK_FOE_IB1_BIND_VLAN_TAG	BIT(20)
-++#define MTK_FOE_IB1_BIND_PKT_SAMPLE	BIT(21)
-++#define MTK_FOE_IB1_BIND_CACHE		BIT(22)
-++#define MTK_FOE_IB1_BIND_TUNNEL_DECAP	BIT(23)
-++#define MTK_FOE_IB1_BIND_TTL		BIT(24)
-++
-++#define MTK_FOE_IB1_PACKET_TYPE		GENMASK(27, 25)
-++#define MTK_FOE_IB1_STATE		GENMASK(29, 28)
-++#define MTK_FOE_IB1_UDP			BIT(30)
-++#define MTK_FOE_IB1_STATIC		BIT(31)
-++
-++enum {
-++	MTK_PPE_PKT_TYPE_IPV4_HNAPT = 0,
-++	MTK_PPE_PKT_TYPE_IPV4_ROUTE = 1,
-++	MTK_PPE_PKT_TYPE_BRIDGE = 2,
-++	MTK_PPE_PKT_TYPE_IPV4_DSLITE = 3,
-++	MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T = 4,
-++	MTK_PPE_PKT_TYPE_IPV6_ROUTE_5T = 5,
-++	MTK_PPE_PKT_TYPE_IPV6_6RD = 7,
-++};
-++
-++#define MTK_FOE_IB2_QID			GENMASK(3, 0)
-++#define MTK_FOE_IB2_PSE_QOS		BIT(4)
-++#define MTK_FOE_IB2_DEST_PORT		GENMASK(7, 5)
-++#define MTK_FOE_IB2_MULTICAST		BIT(8)
-++
-++#define MTK_FOE_IB2_WHNAT_QID2		GENMASK(13, 12)
-++#define MTK_FOE_IB2_WHNAT_DEVIDX	BIT(16)
-++#define MTK_FOE_IB2_WHNAT_NAT		BIT(17)
-++
-++#define MTK_FOE_IB2_PORT_MG		GENMASK(17, 12)
-++
-++#define MTK_FOE_IB2_PORT_AG		GENMASK(23, 18)
-++
-++#define MTK_FOE_IB2_DSCP		GENMASK(31, 24)
-++
-++#define MTK_FOE_VLAN2_WHNAT_BSS		GEMMASK(5, 0)
-++#define MTK_FOE_VLAN2_WHNAT_WCID	GENMASK(13, 6)
-++#define MTK_FOE_VLAN2_WHNAT_RING	GENMASK(15, 14)
-++
-++enum {
-++	MTK_FOE_STATE_INVALID,
-++	MTK_FOE_STATE_UNBIND,
-++	MTK_FOE_STATE_BIND,
-++	MTK_FOE_STATE_FIN
-++};
-++
-++struct mtk_foe_mac_info {
-++	u16 vlan1;
-++	u16 etype;
-++
-++	u32 dest_mac_hi;
-++
-++	u16 vlan2;
-++	u16 dest_mac_lo;
-++
-++	u32 src_mac_hi;
-++
-++	u16 pppoe_id;
-++	u16 src_mac_lo;
-++};
-++
-++struct mtk_foe_bridge {
-++	u32 dest_mac_hi;
-++
-++	u16 src_mac_lo;
-++	u16 dest_mac_lo;
-++
-++	u32 src_mac_hi;
-++
-++	u32 ib2;
-++
-++	u32 _rsv[5];
-++
-++	u32 udf_tsid;
-++	struct mtk_foe_mac_info l2;
-++};
-++
-++struct mtk_ipv4_tuple {
-++	u32 src_ip;
-++	u32 dest_ip;
-++	union {
-++		struct {
-++			u16 dest_port;
-++			u16 src_port;
-++		};
-++		struct {
-++			u8 protocol;
-++			u8 _pad[3]; /* fill with 0xa5a5a5 */
-++		};
-++		u32 ports;
-++	};
-++};
-++
-++struct mtk_foe_ipv4 {
-++	struct mtk_ipv4_tuple orig;
-++
-++	u32 ib2;
-++
-++	struct mtk_ipv4_tuple new;
-++
-++	u16 timestamp;
-++	u16 _rsv0[3];
-++
-++	u32 udf_tsid;
-++
-++	struct mtk_foe_mac_info l2;
-++};
-++
-++struct mtk_foe_ipv4_dslite {
-++	struct mtk_ipv4_tuple ip4;
-++
-++	u32 tunnel_src_ip[4];
-++	u32 tunnel_dest_ip[4];
-++
-++	u8 flow_label[3];
-++	u8 priority;
-++
-++	u32 udf_tsid;
-++
-++	u32 ib2;
-++
-++	struct mtk_foe_mac_info l2;
-++};
-++
-++struct mtk_foe_ipv6 {
-++	u32 src_ip[4];
-++	u32 dest_ip[4];
-++
-++	union {
-++		struct {
-++			u8 protocol;
-++			u8 _pad[3]; /* fill with 0xa5a5a5 */
-++		}; /* 3-tuple */
-++		struct {
-++			u16 dest_port;
-++			u16 src_port;
-++		}; /* 5-tuple */
-++		u32 ports;
-++	};
-++
-++	u32 _rsv[3];
-++
-++	u32 udf;
-++
-++	u32 ib2;
-++	struct mtk_foe_mac_info l2;
-++};
-++
-++struct mtk_foe_ipv6_6rd {
-++	u32 src_ip[4];
-++	u32 dest_ip[4];
-++	u16 dest_port;
-++	u16 src_port;
-++
-++	u32 tunnel_src_ip;
-++	u32 tunnel_dest_ip;
-++
-++	u16 hdr_csum;
-++	u8 dscp;
-++	u8 ttl;
-++
-++	u8 flag;
-++	u8 pad;
-++	u8 per_flow_6rd_id;
-++	u8 pad2;
-++
-++	u32 ib2;
-++	struct mtk_foe_mac_info l2;
-++};
-++
-++struct mtk_foe_entry {
-++	u32 ib1;
-++
-++	union {
-++		struct mtk_foe_bridge bridge;
-++		struct mtk_foe_ipv4 ipv4;
-++		struct mtk_foe_ipv4_dslite dslite;
-++		struct mtk_foe_ipv6 ipv6;
-++		struct mtk_foe_ipv6_6rd ipv6_6rd;
-++		u32 data[19];
-++	};
-++};
-++
-++enum {
-++	MTK_PPE_CPU_REASON_TTL_EXCEEDED			= 0x02,
-++	MTK_PPE_CPU_REASON_OPTION_HEADER		= 0x03,
-++	MTK_PPE_CPU_REASON_NO_FLOW			= 0x07,
-++	MTK_PPE_CPU_REASON_IPV4_FRAG			= 0x08,
-++	MTK_PPE_CPU_REASON_IPV4_DSLITE_FRAG		= 0x09,
-++	MTK_PPE_CPU_REASON_IPV4_DSLITE_NO_TCP_UDP	= 0x0a,
-++	MTK_PPE_CPU_REASON_IPV6_6RD_NO_TCP_UDP		= 0x0b,
-++	MTK_PPE_CPU_REASON_TCP_FIN_SYN_RST		= 0x0c,
-++	MTK_PPE_CPU_REASON_UN_HIT			= 0x0d,
-++	MTK_PPE_CPU_REASON_HIT_UNBIND			= 0x0e,
-++	MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED	= 0x0f,
-++	MTK_PPE_CPU_REASON_HIT_BIND_TCP_FIN		= 0x10,
-++	MTK_PPE_CPU_REASON_HIT_TTL_1			= 0x11,
-++	MTK_PPE_CPU_REASON_HIT_BIND_VLAN_VIOLATION	= 0x12,
-++	MTK_PPE_CPU_REASON_KEEPALIVE_UC_OLD_HDR		= 0x13,
-++	MTK_PPE_CPU_REASON_KEEPALIVE_MC_NEW_HDR		= 0x14,
-++	MTK_PPE_CPU_REASON_KEEPALIVE_DUP_OLD_HDR	= 0x15,
-++	MTK_PPE_CPU_REASON_HIT_BIND_FORCE_CPU		= 0x16,
-++	MTK_PPE_CPU_REASON_TUNNEL_OPTION_HEADER		= 0x17,
-++	MTK_PPE_CPU_REASON_MULTICAST_TO_CPU		= 0x18,
-++	MTK_PPE_CPU_REASON_MULTICAST_TO_GMAC1_CPU	= 0x19,
-++	MTK_PPE_CPU_REASON_HIT_PRE_BIND			= 0x1a,
-++	MTK_PPE_CPU_REASON_PACKET_SAMPLING		= 0x1b,
-++	MTK_PPE_CPU_REASON_EXCEED_MTU			= 0x1c,
-++	MTK_PPE_CPU_REASON_PPE_BYPASS			= 0x1e,
-++	MTK_PPE_CPU_REASON_INVALID			= 0x1f,
-++};
-++
-++struct mtk_ppe {
-++	struct device *dev;
-++	void __iomem *base;
-++	int version;
-++
-++	struct mtk_foe_entry *foe_table;
-++	dma_addr_t foe_phys;
-++
-++	void *acct_table;
-++};
-++
-++int mtk_ppe_init(struct mtk_ppe *ppe, struct device *dev, void __iomem *base,
-++		 int version);
-++int mtk_ppe_start(struct mtk_ppe *ppe);
-++int mtk_ppe_stop(struct mtk_ppe *ppe);
-++
-++static inline void
-++mtk_foe_entry_clear(struct mtk_ppe *ppe, u16 hash)
-++{
-++	ppe->foe_table[hash].ib1 = 0;
-++	dma_wmb();
-++}
-++
-++static inline int
-++mtk_foe_entry_timestamp(struct mtk_ppe *ppe, u16 hash)
-++{
-++	u32 ib1 = READ_ONCE(ppe->foe_table[hash].ib1);
-++
-++	if (FIELD_GET(MTK_FOE_IB1_STATE, ib1) != MTK_FOE_STATE_BIND)
-++		return -1;
-++
-++	return FIELD_GET(MTK_FOE_IB1_BIND_TIMESTAMP, ib1);
-++}
-++
-++int mtk_foe_entry_prepare(struct mtk_foe_entry *entry, int type, int l4proto,
-++			  u8 pse_port, u8 *src_mac, u8 *dest_mac);
-++int mtk_foe_entry_set_pse_port(struct mtk_foe_entry *entry, u8 port);
-++int mtk_foe_entry_set_ipv4_tuple(struct mtk_foe_entry *entry, bool orig,
-++				 __be32 src_addr, __be16 src_port,
-++				 __be32 dest_addr, __be16 dest_port);
-++int mtk_foe_entry_set_ipv6_tuple(struct mtk_foe_entry *entry,
-++				 __be32 *src_addr, __be16 src_port,
-++				 __be32 *dest_addr, __be16 dest_port);
-++int mtk_foe_entry_set_dsa(struct mtk_foe_entry *entry, int port);
-++int mtk_foe_entry_set_vlan(struct mtk_foe_entry *entry, int vid);
-++int mtk_foe_entry_set_pppoe(struct mtk_foe_entry *entry, int sid);
-++int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_foe_entry *entry,
-++			 u16 timestamp);
-++int mtk_ppe_debugfs_init(struct mtk_ppe *ppe);
-++
-++#endif
-+--- /dev/null
-++++ b/drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c
-+@@ -0,0 +1,217 @@
-++// SPDX-License-Identifier: GPL-2.0-only
-++/* Copyright (C) 2020 Felix Fietkau <nbd@nbd.name> */
-++
-++#include <linux/kernel.h>
-++#include <linux/debugfs.h>
-++#include "mtk_eth_soc.h"
-++
-++struct mtk_flow_addr_info
-++{
-++	void *src, *dest;
-++	u16 *src_port, *dest_port;
-++	bool ipv6;
-++};
-++
-++static const char *mtk_foe_entry_state_str(int state)
-++{
-++	static const char * const state_str[] = {
-++		[MTK_FOE_STATE_INVALID] = "INV",
-++		[MTK_FOE_STATE_UNBIND] = "UNB",
-++		[MTK_FOE_STATE_BIND] = "BND",
-++		[MTK_FOE_STATE_FIN] = "FIN",
-++	};
-++
-++	if (state >= ARRAY_SIZE(state_str) || !state_str[state])
-++		return "UNK";
-++
-++	return state_str[state];
-++}
-++
-++static const char *mtk_foe_pkt_type_str(int type)
-++{
-++	static const char * const type_str[] = {
-++		[MTK_PPE_PKT_TYPE_IPV4_HNAPT] = "IPv4 5T",
-++		[MTK_PPE_PKT_TYPE_IPV4_ROUTE] = "IPv4 3T",
-++		[MTK_PPE_PKT_TYPE_BRIDGE] = "L2",
-++		[MTK_PPE_PKT_TYPE_IPV4_DSLITE] = "DS-LITE",
-++		[MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T] = "IPv6 3T",
-++		[MTK_PPE_PKT_TYPE_IPV6_ROUTE_5T] = "IPv6 5T",
-++		[MTK_PPE_PKT_TYPE_IPV6_6RD] = "6RD",
-++	};
-++
-++	if (type >= ARRAY_SIZE(type_str) || !type_str[type])
-++		return "UNKNOWN";
-++
-++	return type_str[type];
-++}
-++
-++static void
-++mtk_print_addr(struct seq_file *m, u32 *addr, bool ipv6)
-++{
-++	u32 n_addr[4];
-++	int i;
-++
-++	if (!ipv6) {
-++		seq_printf(m, "%pI4h", addr);
-++		return;
-++	}
-++
-++	for (i = 0; i < ARRAY_SIZE(n_addr); i++)
-++		n_addr[i] = htonl(addr[i]);
-++	seq_printf(m, "%pI6", n_addr);
-++}
-++
-++static void
-++mtk_print_addr_info(struct seq_file *m, struct mtk_flow_addr_info *ai)
-++{
-++	mtk_print_addr(m, ai->src, ai->ipv6);
-++	if (ai->src_port)
-++		seq_printf(m, ":%d", *ai->src_port);
-++	seq_printf(m, "->");
-++	mtk_print_addr(m, ai->dest, ai->ipv6);
-++	if (ai->dest_port)
-++		seq_printf(m, ":%d", *ai->dest_port);
-++}
-++
-++static int
-++mtk_ppe_debugfs_foe_show(struct seq_file *m, void *private, bool bind)
-++{
-++	struct mtk_ppe *ppe = m->private;
-++	int i, count;
-++
-++	for (i = 0, count = 0; i < MTK_PPE_ENTRIES; i++) {
-++		struct mtk_foe_entry *entry = &ppe->foe_table[i];
-++		struct mtk_foe_mac_info *l2;
-++		struct mtk_flow_addr_info ai = {};
-++		unsigned char h_source[ETH_ALEN];
-++		unsigned char h_dest[ETH_ALEN];
-++		int type, state;
-++		u32 ib2;
-++
-++
-++		state = FIELD_GET(MTK_FOE_IB1_STATE, entry->ib1);
-++		if (!state)
-++			continue;
-++
-++		if (bind && state != MTK_FOE_STATE_BIND)
-++			continue;
-++
-++		type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1);
-++		seq_printf(m, "%05x %s %7s", i,
-++			   mtk_foe_entry_state_str(state),
-++			   mtk_foe_pkt_type_str(type));
-++
-++		switch (type) {
-++		case MTK_PPE_PKT_TYPE_IPV4_HNAPT:
-++		case MTK_PPE_PKT_TYPE_IPV4_DSLITE:
-++			ai.src_port = &entry->ipv4.orig.src_port;
-++			ai.dest_port = &entry->ipv4.orig.dest_port;
-++			fallthrough;
-++		case MTK_PPE_PKT_TYPE_IPV4_ROUTE:
-++			ai.src = &entry->ipv4.orig.src_ip;
-++			ai.dest = &entry->ipv4.orig.dest_ip;
-++			break;
-++		case MTK_PPE_PKT_TYPE_IPV6_ROUTE_5T:
-++			ai.src_port = &entry->ipv6.src_port;
-++			ai.dest_port = &entry->ipv6.dest_port;
-++			fallthrough;
-++		case MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T:
-++		case MTK_PPE_PKT_TYPE_IPV6_6RD:
-++			ai.src = &entry->ipv6.src_ip;
-++			ai.dest = &entry->ipv6.dest_ip;
-++			ai.ipv6 = true;
-++			break;
-++		}
-++
-++		seq_printf(m, " orig=");
-++		mtk_print_addr_info(m, &ai);
-++
-++		switch (type) {
-++		case MTK_PPE_PKT_TYPE_IPV4_HNAPT:
-++		case MTK_PPE_PKT_TYPE_IPV4_DSLITE:
-++			ai.src_port = &entry->ipv4.new.src_port;
-++			ai.dest_port = &entry->ipv4.new.dest_port;
-++			fallthrough;
-++		case MTK_PPE_PKT_TYPE_IPV4_ROUTE:
-++			ai.src = &entry->ipv4.new.src_ip;
-++			ai.dest = &entry->ipv4.new.dest_ip;
-++			seq_printf(m, " new=");
-++			mtk_print_addr_info(m, &ai);
-++			break;
-++		}
-++
-++		if (type >= MTK_PPE_PKT_TYPE_IPV4_DSLITE) {
-++			l2 = &entry->ipv6.l2;
-++			ib2 = entry->ipv6.ib2;
-++		} else {
-++			l2 = &entry->ipv4.l2;
-++			ib2 = entry->ipv4.ib2;
-++		}
-++
-++		*((__be32 *)h_source) = htonl(l2->src_mac_hi);
-++		*((__be16 *)&h_source[4]) = htons(l2->src_mac_lo);
-++		*((__be32 *)h_dest) = htonl(l2->dest_mac_hi);
-++		*((__be16 *)&h_dest[4]) = htons(l2->dest_mac_lo);
-++
-++		seq_printf(m, " eth=%pM->%pM etype=%04x"
-++			      " vlan=%d,%d ib1=%08x ib2=%08x\n",
-++			   h_source, h_dest, ntohs(l2->etype),
-++			   l2->vlan1, l2->vlan2, entry->ib1, ib2);
-++	}
-++
-++	return 0;
-++}
-++
-++static int
-++mtk_ppe_debugfs_foe_show_all(struct seq_file *m, void *private)
-++{
-++	return mtk_ppe_debugfs_foe_show(m, private, false);
-++}
-++
-++static int
-++mtk_ppe_debugfs_foe_show_bind(struct seq_file *m, void *private)
-++{
-++	return mtk_ppe_debugfs_foe_show(m, private, true);
-++}
-++
-++static int
-++mtk_ppe_debugfs_foe_open_all(struct inode *inode, struct file *file)
-++{
-++	return single_open(file, mtk_ppe_debugfs_foe_show_all,
-++			   inode->i_private);
-++}
-++
-++static int
-++mtk_ppe_debugfs_foe_open_bind(struct inode *inode, struct file *file)
-++{
-++	return single_open(file, mtk_ppe_debugfs_foe_show_bind,
-++			   inode->i_private);
-++}
-++
-++int mtk_ppe_debugfs_init(struct mtk_ppe *ppe)
-++{
-++	static const struct file_operations fops_all = {
-++		.open = mtk_ppe_debugfs_foe_open_all,
-++		.read = seq_read,
-++		.llseek = seq_lseek,
-++		.release = single_release,
-++	};
-++
-++	static const struct file_operations fops_bind = {
-++		.open = mtk_ppe_debugfs_foe_open_bind,
-++		.read = seq_read,
-++		.llseek = seq_lseek,
-++		.release = single_release,
-++	};
-++
-++	struct dentry *root;
-++
-++	root = debugfs_create_dir("mtk_ppe", NULL);
-++	if (!root)
-++		return -ENOMEM;
-++
-++	debugfs_create_file("entries", S_IRUGO, root, ppe, &fops_all);
-++	debugfs_create_file("bind", S_IRUGO, root, ppe, &fops_bind);
-++
-++	return 0;
-++}
-+--- /dev/null
-++++ b/drivers/net/ethernet/mediatek/mtk_ppe_regs.h
-+@@ -0,0 +1,144 @@
-++// SPDX-License-Identifier: GPL-2.0-only
-++/* Copyright (C) 2020 Felix Fietkau <nbd@nbd.name> */
-++
-++#ifndef __MTK_PPE_REGS_H
-++#define __MTK_PPE_REGS_H
-++
-++#define MTK_PPE_GLO_CFG				0x200
-++#define MTK_PPE_GLO_CFG_EN			BIT(0)
-++#define MTK_PPE_GLO_CFG_TSID_EN			BIT(1)
-++#define MTK_PPE_GLO_CFG_IP4_L4_CS_DROP		BIT(2)
-++#define MTK_PPE_GLO_CFG_IP4_CS_DROP		BIT(3)
-++#define MTK_PPE_GLO_CFG_TTL0_DROP		BIT(4)
-++#define MTK_PPE_GLO_CFG_PPE_BSWAP		BIT(5)
-++#define MTK_PPE_GLO_CFG_PSE_HASH_OFS		BIT(6)
-++#define MTK_PPE_GLO_CFG_MCAST_TB_EN		BIT(7)
-++#define MTK_PPE_GLO_CFG_FLOW_DROP_KA		BIT(8)
-++#define MTK_PPE_GLO_CFG_FLOW_DROP_UPDATE	BIT(9)
-++#define MTK_PPE_GLO_CFG_UDP_LITE_EN		BIT(10)
-++#define MTK_PPE_GLO_CFG_UDP_LEN_DROP		BIT(11)
-++#define MTK_PPE_GLO_CFG_MCAST_ENTRIES		GNEMASK(13, 12)
-++#define MTK_PPE_GLO_CFG_BUSY			BIT(31)
-++
-++#define MTK_PPE_FLOW_CFG			0x204
-++#define MTK_PPE_FLOW_CFG_IP4_TCP_FRAG		BIT(6)
-++#define MTK_PPE_FLOW_CFG_IP4_UDP_FRAG		BIT(7)
-++#define MTK_PPE_FLOW_CFG_IP6_3T_ROUTE		BIT(8)
-++#define MTK_PPE_FLOW_CFG_IP6_5T_ROUTE		BIT(9)
-++#define MTK_PPE_FLOW_CFG_IP6_6RD		BIT(10)
-++#define MTK_PPE_FLOW_CFG_IP4_NAT		BIT(12)
-++#define MTK_PPE_FLOW_CFG_IP4_NAPT		BIT(13)
-++#define MTK_PPE_FLOW_CFG_IP4_DSLITE		BIT(14)
-++#define MTK_PPE_FLOW_CFG_L2_BRIDGE		BIT(15)
-++#define MTK_PPE_FLOW_CFG_IP_PROTO_BLACKLIST	BIT(16)
-++#define MTK_PPE_FLOW_CFG_IP4_NAT_FRAG		BIT(17)
-++#define MTK_PPE_FLOW_CFG_IP4_HASH_FLOW_LABEL	BIT(18)
-++#define MTK_PPE_FLOW_CFG_IP4_HASH_GRE_KEY	BIT(19)
-++#define MTK_PPE_FLOW_CFG_IP6_HASH_GRE_KEY	BIT(20)
-++
-++#define MTK_PPE_IP_PROTO_CHK			0x208
-++#define MTK_PPE_IP_PROTO_CHK_IPV4		GENMASK(15, 0)
-++#define MTK_PPE_IP_PROTO_CHK_IPV6		GENMASK(31, 16)
-++
-++#define MTK_PPE_TB_CFG				0x21c
-++#define MTK_PPE_TB_CFG_ENTRY_NUM		GENMASK(2, 0)
-++#define MTK_PPE_TB_CFG_ENTRY_80B		BIT(3)
-++#define MTK_PPE_TB_CFG_SEARCH_MISS		GENMASK(5, 4)
-++#define MTK_PPE_TB_CFG_AGE_PREBIND		BIT(6)
-++#define MTK_PPE_TB_CFG_AGE_NON_L4		BIT(7)
-++#define MTK_PPE_TB_CFG_AGE_UNBIND		BIT(8)
-++#define MTK_PPE_TB_CFG_AGE_TCP			BIT(9)
-++#define MTK_PPE_TB_CFG_AGE_UDP			BIT(10)
-++#define MTK_PPE_TB_CFG_AGE_TCP_FIN		BIT(11)
-++#define MTK_PPE_TB_CFG_KEEPALIVE		GENMASK(13, 12)
-++#define MTK_PPE_TB_CFG_HASH_MODE		GENMASK(15, 14)
-++#define MTK_PPE_TB_CFG_SCAN_MODE		GENMASK(17, 16)
-++#define MTK_PPE_TB_CFG_HASH_DEBUG		GENMASK(19, 18)
-++
-++enum {
-++	MTK_PPE_SCAN_MODE_DISABLED,
-++	MTK_PPE_SCAN_MODE_CHECK_AGE,
-++	MTK_PPE_SCAN_MODE_KEEPALIVE_AGE,
-++};
-++
-++enum {
-++	MTK_PPE_KEEPALIVE_DISABLE,
-++	MTK_PPE_KEEPALIVE_UNICAST_CPU,
-++	MTK_PPE_KEEPALIVE_DUP_CPU = 3,
-++};
-++
-++enum {
-++	MTK_PPE_SEARCH_MISS_ACTION_DROP,
-++	MTK_PPE_SEARCH_MISS_ACTION_FORWARD = 2,
-++	MTK_PPE_SEARCH_MISS_ACTION_FORWARD_BUILD = 3,
-++};
-++
-++#define MTK_PPE_TB_BASE				0x220
-++
-++#define MTK_PPE_TB_USED				0x224
-++#define MTK_PPE_TB_USED_NUM			GENMASK(13, 0)
-++
-++#define MTK_PPE_BIND_RATE			0x228
-++#define MTK_PPE_BIND_RATE_BIND			GENMASK(15, 0)
-++#define MTK_PPE_BIND_RATE_PREBIND		GENMASK(31, 16)
-++
-++#define MTK_PPE_BIND_LIMIT0			0x22c
-++#define MTK_PPE_BIND_LIMIT0_QUARTER		GENMASK(13, 0)
-++#define MTK_PPE_BIND_LIMIT0_HALF		GENMASK(29, 16)
-++
-++#define MTK_PPE_BIND_LIMIT1			0x230
-++#define MTK_PPE_BIND_LIMIT1_FULL		GENMASK(13, 0)
-++#define MTK_PPE_BIND_LIMIT1_NON_L4		GENMASK(23, 16)
-++
-++#define MTK_PPE_KEEPALIVE			0x234
-++#define MTK_PPE_KEEPALIVE_TIME			GENMASK(15, 0)
-++#define MTK_PPE_KEEPALIVE_TIME_TCP		GENMASK(23, 16)
-++#define MTK_PPE_KEEPALIVE_TIME_UDP		GENMASK(31, 24)
-++
-++#define MTK_PPE_UNBIND_AGE			0x238
-++#define MTK_PPE_UNBIND_AGE_MIN_PACKETS		GENMASK(31, 16)
-++#define MTK_PPE_UNBIND_AGE_DELTA		GENMASK(7, 0)
-++
-++#define MTK_PPE_BIND_AGE0			0x23c
-++#define MTK_PPE_BIND_AGE0_DELTA_NON_L4		GENMASK(30, 16)
-++#define MTK_PPE_BIND_AGE0_DELTA_UDP		GENMASK(14, 0)
-++
-++#define MTK_PPE_BIND_AGE1			0x240
-++#define MTK_PPE_BIND_AGE1_DELTA_TCP_FIN		GENMASK(30, 16)
-++#define MTK_PPE_BIND_AGE1_DELTA_TCP		GENMASK(14, 0)
-++
-++#define MTK_PPE_HASH_SEED			0x244
-++
-++#define MTK_PPE_DEFAULT_CPU_PORT		0x248
-++#define MTK_PPE_DEFAULT_CPU_PORT_MASK(_n)	(GENMASK(2, 0) << ((_n) * 4))
-++
-++#define MTK_PPE_MTU_DROP			0x308
-++
-++#define MTK_PPE_VLAN_MTU0			0x30c
-++#define MTK_PPE_VLAN_MTU0_NONE			GENMASK(13, 0)
-++#define MTK_PPE_VLAN_MTU0_1TAG			GENMASK(29, 16)
-++
-++#define MTK_PPE_VLAN_MTU1			0x310
-++#define MTK_PPE_VLAN_MTU1_2TAG			GENMASK(13, 0)
-++#define MTK_PPE_VLAN_MTU1_3TAG			GENMASK(29, 16)
-++
-++#define MTK_PPE_VPM_TPID			0x318
-++
-++#define MTK_PPE_CACHE_CTL			0x320
-++#define MTK_PPE_CACHE_CTL_EN			BIT(0)
-++#define MTK_PPE_CACHE_CTL_LOCK_CLR		BIT(4)
-++#define MTK_PPE_CACHE_CTL_REQ			BIT(8)
-++#define MTK_PPE_CACHE_CTL_CLEAR			BIT(9)
-++#define MTK_PPE_CACHE_CTL_CMD			GENMASK(13, 12)
-++
-++#define MTK_PPE_MIB_CFG				0x334
-++#define MTK_PPE_MIB_CFG_EN			BIT(0)
-++#define MTK_PPE_MIB_CFG_RD_CLR			BIT(1)
-++
-++#define MTK_PPE_MIB_TB_BASE			0x338
-++
-++#define MTK_PPE_MIB_CACHE_CTL			0x350
-++#define MTK_PPE_MIB_CACHE_CTL_EN		BIT(0)
-++#define MTK_PPE_MIB_CACHE_CTL_FLUSH		BIT(2)
-++
-++#endif
-diff --git a/target/linux/generic/pending-5.10/770-16-net-ethernet-mtk_eth_soc-add-flow-offloading-support.patch b/target/linux/generic/pending-5.10/770-16-net-ethernet-mtk_eth_soc-add-flow-offloading-support.patch
-new file mode 100644
-index 0000000000..2f1ae6cde6
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/770-16-net-ethernet-mtk_eth_soc-add-flow-offloading-support.patch
-@@ -0,0 +1,574 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Thu, 10 Dec 2020 12:19:18 +0100
-+Subject: [PATCH] net: ethernet: mtk_eth_soc: add flow offloading support
-+
-+This adds support for offloading IPv4 routed flows, including SNAT/DNAT,
-+one VLAN, and DSA.
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
-+---
-+ create mode 100644 drivers/net/ethernet/mediatek/mtk_ppe_offload.c
-+
-+--- a/drivers/net/ethernet/mediatek/Makefile
-++++ b/drivers/net/ethernet/mediatek/Makefile
-+@@ -4,5 +4,5 @@
-+ #
-+ 
-+ obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk_eth.o
-+-mtk_eth-y := mtk_eth_soc.o mtk_sgmii.o mtk_eth_path.o mtk_ppe.o mtk_ppe_debugfs.o
-++mtk_eth-y := mtk_eth_soc.o mtk_sgmii.o mtk_eth_path.o mtk_ppe.o mtk_ppe_debugfs.o mtk_ppe_offload.o
-+ obj-$(CONFIG_NET_MEDIATEK_STAR_EMAC) += mtk_star_emac.o
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+@@ -2896,6 +2896,7 @@ static const struct net_device_ops mtk_n
-+ #ifdef CONFIG_NET_POLL_CONTROLLER
-+ 	.ndo_poll_controller	= mtk_poll_controller,
-+ #endif
-++	.ndo_setup_tc		= mtk_eth_setup_tc,
-+ };
-+ 
-+ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
-+@@ -3161,6 +3162,10 @@ static int mtk_probe(struct platform_dev
-+ 				   eth->base + MTK_ETH_PPE_BASE, 2);
-+ 		if (err)
-+ 			goto err_free_dev;
-++
-++		err = mtk_eth_offload_init(eth);
-++		if (err)
-++			goto err_free_dev;
-+ 	}
-+ 
-+ 	for (i = 0; i < MTK_MAX_DEVS; i++) {
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-+@@ -16,6 +16,7 @@
-+ #include <linux/refcount.h>
-+ #include <linux/phylink.h>
-+ #include <linux/dim.h>
-++#include <linux/rhashtable.h>
-+ #include "mtk_ppe.h"
-+ 
-+ #define MTK_QDMA_PAGE_SIZE	2048
-+@@ -41,7 +42,8 @@
-+ 				 NETIF_F_HW_VLAN_CTAG_RX | \
-+ 				 NETIF_F_SG | NETIF_F_TSO | \
-+ 				 NETIF_F_TSO6 | \
-+-				 NETIF_F_IPV6_CSUM)
-++				 NETIF_F_IPV6_CSUM |\
-++				 NETIF_F_HW_TC)
-+ #define MTK_HW_FEATURES_MT7628	(NETIF_F_SG | NETIF_F_RXCSUM)
-+ #define NEXT_DESP_IDX(X, Y)	(((X) + 1) & ((Y) - 1))
-+ 
-+@@ -929,6 +931,7 @@ struct mtk_eth {
-+ 	int				ip_align;
-+ 
-+ 	struct mtk_ppe			ppe;
-++	struct rhashtable		flow_table;
-+ };
-+ 
-+ /* struct mtk_mac -	the structure that holds the info about the MACs of the
-+@@ -973,4 +976,9 @@ int mtk_gmac_sgmii_path_setup(struct mtk
-+ int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id);
-+ int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id);
-+ 
-++int mtk_eth_offload_init(struct mtk_eth *eth);
-++int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type,
-++		     void *type_data);
-++
-++
-+ #endif /* MTK_ETH_H */
-+--- /dev/null
-++++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
-+@@ -0,0 +1,491 @@
-++// SPDX-License-Identifier: GPL-2.0-only
-++/*
-++ *  Copyright (C) 2020 Felix Fietkau <nbd@nbd.name>
-++ */
-++
-++#include <linux/if_ether.h>
-++#include <linux/rhashtable.h>
-++#include <linux/if_ether.h>
-++#include <linux/ip.h>
-++#include <net/flow_offload.h>
-++#include <net/pkt_cls.h>
-++#include <net/dsa.h>
-++#include "mtk_eth_soc.h"
-++
-++struct mtk_flow_data {
-++	struct ethhdr eth;
-++
-++	union {
-++		struct {
-++			__be32 src_addr;
-++			__be32 dst_addr;
-++		} v4;
-++	};
-++
-++	__be16 src_port;
-++	__be16 dst_port;
-++
-++	struct {
-++		u16 id;
-++		__be16 proto;
-++		u8 num;
-++	} vlan;
-++	struct {
-++		u16 sid;
-++		u8 num;
-++	} pppoe;
-++};
-++
-++struct mtk_flow_entry {
-++	struct rhash_head node;
-++	unsigned long cookie;
-++	u16 hash;
-++};
-++
-++static const struct rhashtable_params mtk_flow_ht_params = {
-++	.head_offset = offsetof(struct mtk_flow_entry, node),
-++	.head_offset = offsetof(struct mtk_flow_entry, cookie),
-++	.key_len = sizeof(unsigned long),
-++	.automatic_shrinking = true,
-++};
-++
-++static u32
-++mtk_eth_timestamp(struct mtk_eth *eth)
-++{
-++	return mtk_r32(eth, 0x0010) & MTK_FOE_IB1_BIND_TIMESTAMP;
-++}
-++
-++static int
-++mtk_flow_set_ipv4_addr(struct mtk_foe_entry *foe, struct mtk_flow_data *data,
-++		       bool egress)
-++{
-++	return mtk_foe_entry_set_ipv4_tuple(foe, egress,
-++					    data->v4.src_addr, data->src_port,
-++					    data->v4.dst_addr, data->dst_port);
-++}
-++
-++static void
-++mtk_flow_offload_mangle_eth(const struct flow_action_entry *act, void *eth)
-++{
-++	void *dest = eth + act->mangle.offset;
-++	const void *src = &act->mangle.val;
-++
-++	if (act->mangle.offset > 8)
-++		return;
-++
-++	if (act->mangle.mask == 0xffff) {
-++		src += 2;
-++		dest += 2;
-++	}
-++
-++	memcpy(dest, src, act->mangle.mask ? 2 : 4);
-++}
-++
-++
-++static int
-++mtk_flow_mangle_ports(const struct flow_action_entry *act,
-++		      struct mtk_flow_data *data)
-++{
-++	u32 val = ntohl(act->mangle.val);
-++
-++	switch (act->mangle.offset) {
-++	case 0:
-++		if (act->mangle.mask == ~htonl(0xffff))
-++			data->dst_port = cpu_to_be16(val);
-++		else
-++			data->src_port = cpu_to_be16(val >> 16);
-++		break;
-++	case 2:
-++		data->dst_port = cpu_to_be16(val);
-++		break;
-++	default:
-++		return -EINVAL;
-++	}
-++
-++	return 0;
-++}
-++
-++static int
-++mtk_flow_mangle_ipv4(const struct flow_action_entry *act,
-++		     struct mtk_flow_data *data)
-++{
-++	__be32 *dest;
-++
-++	switch (act->mangle.offset) {
-++	case offsetof(struct iphdr, saddr):
-++		dest = &data->v4.src_addr;
-++		break;
-++	case offsetof(struct iphdr, daddr):
-++		dest = &data->v4.dst_addr;
-++		break;
-++	default:
-++		return -EINVAL;
-++	}
-++
-++	memcpy(dest, &act->mangle.val, sizeof(u32));
-++
-++	return 0;
-++}
-++
-++static int
-++mtk_flow_get_dsa_port(struct net_device **dev)
-++{
-++#if IS_ENABLED(CONFIG_NET_DSA)
-++	struct dsa_port *dp;
-++
-++	dp = dsa_port_from_netdev(*dev);
-++	if (IS_ERR(dp))
-++		return -ENODEV;
-++
-++	if (!dp->cpu_dp)
-++		return -ENODEV;
-++
-++	if (!dp->cpu_dp->tag_ops)
-++		return -ENODEV;
-++
-++	if (dp->cpu_dp->tag_ops->proto != DSA_TAG_PROTO_MTK)
-++		return -ENODEV;
-++
-++	*dev = dp->cpu_dp->master;
-++
-++	return dp->index;
-++#else
-++	return -ENODEV;
-++#endif
-++}
-++
-++static int
-++mtk_flow_set_output_device(struct mtk_eth *eth, struct mtk_foe_entry *foe,
-++			   struct net_device *dev)
-++{
-++	int pse_port, dsa_port;
-++
-++	dsa_port = mtk_flow_get_dsa_port(&dev);
-++	if (dsa_port >= 0)
-++		mtk_foe_entry_set_dsa(foe, dsa_port);
-++
-++	if (dev == eth->netdev[0])
-++		pse_port = 1;
-++	else if (dev == eth->netdev[1])
-++		pse_port = 2;
-++	else
-++		return -EOPNOTSUPP;
-++
-++	mtk_foe_entry_set_pse_port(foe, pse_port);
-++
-++	return 0;
-++}
-++
-++static int
-++mtk_flow_offload_replace(struct mtk_eth *eth, struct flow_cls_offload *f)
-++{
-++	struct flow_rule *rule = flow_cls_offload_flow_rule(f);
-++	struct flow_action_entry *act;
-++	struct mtk_flow_data data = {};
-++	struct mtk_foe_entry foe;
-++	struct net_device *odev = NULL;
-++	struct mtk_flow_entry *entry;
-++	int offload_type = 0;
-++	u16 addr_type = 0;
-++	u32 timestamp;
-++	u8 l4proto = 0;
-++	int err = 0;
-++	int hash;
-++	int i;
-++
-++	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_META)) {
-++		struct flow_match_meta match;
-++
-++		flow_rule_match_meta(rule, &match);
-++	} else {
-++		return -EOPNOTSUPP;
-++	}
-++
-++	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
-++		struct flow_match_control match;
-++
-++		flow_rule_match_control(rule, &match);
-++		addr_type = match.key->addr_type;
-++	} else {
-++		return -EOPNOTSUPP;
-++	}
-++
-++	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
-++		struct flow_match_basic match;
-++
-++		flow_rule_match_basic(rule, &match);
-++		l4proto = match.key->ip_proto;
-++	} else {
-++		return -EOPNOTSUPP;
-++	}
-++
-++	flow_action_for_each(i, act, &rule->action) {
-++		switch (act->id) {
-++		case FLOW_ACTION_MANGLE:
-++			if (act->mangle.htype == FLOW_ACT_MANGLE_HDR_TYPE_ETH)
-++				mtk_flow_offload_mangle_eth(act, &data.eth);
-++			break;
-++		case FLOW_ACTION_REDIRECT:
-++			odev = act->dev;
-++			break;
-++		case FLOW_ACTION_CSUM:
-++			break;
-++		case FLOW_ACTION_VLAN_PUSH:
-++			if (data.vlan.num == 1 ||
-++			    act->vlan.proto != htons(ETH_P_8021Q))
-++				return -EOPNOTSUPP;
-++
-++			data.vlan.id = act->vlan.vid;
-++			data.vlan.proto = act->vlan.proto;
-++			data.vlan.num++;
-++			break;
-++		case FLOW_ACTION_PPPOE_PUSH:
-++			if (data.pppoe.num == 1)
-++				return -EOPNOTSUPP;
-++
-++			data.pppoe.sid = act->pppoe.sid;
-++			data.pppoe.num++;
-++			break;
-++		default:
-++			return -EOPNOTSUPP;
-++		}
-++	}
-++
-++	switch (addr_type) {
-++	case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
-++		offload_type = MTK_PPE_PKT_TYPE_IPV4_HNAPT;
-++		break;
-++	default:
-++		return -EOPNOTSUPP;
-++	}
-++
-++	if (!is_valid_ether_addr(data.eth.h_source) ||
-++	    !is_valid_ether_addr(data.eth.h_dest))
-++		return -EINVAL;
-++
-++	err = mtk_foe_entry_prepare(&foe, offload_type, l4proto, 0,
-++				    data.eth.h_source,
-++				    data.eth.h_dest);
-++	if (err)
-++		return err;
-++
-++	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
-++		struct flow_match_ports ports;
-++
-++		flow_rule_match_ports(rule, &ports);
-++		data.src_port = ports.key->src;
-++		data.dst_port = ports.key->dst;
-++	} else {
-++		return -EOPNOTSUPP;
-++	}
-++
-++	if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
-++		struct flow_match_ipv4_addrs addrs;
-++
-++		flow_rule_match_ipv4_addrs(rule, &addrs);
-++
-++		data.v4.src_addr = addrs.key->src;
-++		data.v4.dst_addr = addrs.key->dst;
-++
-++		mtk_flow_set_ipv4_addr(&foe, &data, false);
-++	}
-++
-++	flow_action_for_each(i, act, &rule->action) {
-++		if (act->id != FLOW_ACTION_MANGLE)
-++			continue;
-++
-++		switch (act->mangle.htype) {
-++		case FLOW_ACT_MANGLE_HDR_TYPE_TCP:
-++		case FLOW_ACT_MANGLE_HDR_TYPE_UDP:
-++			err = mtk_flow_mangle_ports(act, &data);
-++			break;
-++		case FLOW_ACT_MANGLE_HDR_TYPE_IP4:
-++			err = mtk_flow_mangle_ipv4(act, &data);
-++			break;
-++		case FLOW_ACT_MANGLE_HDR_TYPE_ETH:
-++			/* handled earlier */
-++			break;
-++		default:
-++			return -EOPNOTSUPP;
-++		}
-++
-++		if (err)
-++			return err;
-++	}
-++
-++	if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
-++		err = mtk_flow_set_ipv4_addr(&foe, &data, true);
-++		if (err)
-++			return err;
-++	}
-++
-++	if (data.vlan.num == 1) {
-++		if (data.vlan.proto != htons(ETH_P_8021Q))
-++			return -EOPNOTSUPP;
-++
-++		mtk_foe_entry_set_vlan(&foe, data.vlan.id);
-++	}
-++	if (data.pppoe.num == 1)
-++		mtk_foe_entry_set_pppoe(&foe, data.pppoe.sid);
-++
-++	err = mtk_flow_set_output_device(eth, &foe, odev);
-++	if (err)
-++		return err;
-++
-++	entry = kzalloc(sizeof(*entry), GFP_KERNEL);
-++	if (!entry)
-++		return -ENOMEM;
-++
-++	entry->cookie = f->cookie;
-++	timestamp = mtk_eth_timestamp(eth);
-++	hash = mtk_foe_entry_commit(&eth->ppe, &foe, timestamp);
-++	if (hash < 0) {
-++		err = hash;
-++		goto free;
-++	}
-++
-++	entry->hash = hash;
-++	err = rhashtable_insert_fast(&eth->flow_table, &entry->node,
-++				     mtk_flow_ht_params);
-++	if (err < 0)
-++		goto clear_flow;
-++
-++	return 0;
-++clear_flow:
-++	mtk_foe_entry_clear(&eth->ppe, hash);
-++free:
-++	kfree(entry);
-++	return err;
-++}
-++
-++static int
-++mtk_flow_offload_destroy(struct mtk_eth *eth, struct flow_cls_offload *f)
-++{
-++	struct mtk_flow_entry *entry;
-++
-++	entry = rhashtable_lookup(&eth->flow_table, &f->cookie,
-++				  mtk_flow_ht_params);
-++	if (!entry)
-++		return -ENOENT;
-++
-++	mtk_foe_entry_clear(&eth->ppe, entry->hash);
-++	rhashtable_remove_fast(&eth->flow_table, &entry->node,
-++			       mtk_flow_ht_params);
-++	kfree(entry);
-++
-++	return 0;
-++}
-++
-++static int
-++mtk_flow_offload_stats(struct mtk_eth *eth, struct flow_cls_offload *f)
-++{
-++	struct mtk_flow_entry *entry;
-++	int timestamp;
-++	u32 idle;
-++
-++	entry = rhashtable_lookup(&eth->flow_table, &f->cookie,
-++				  mtk_flow_ht_params);
-++	if (!entry)
-++		return -ENOENT;
-++
-++	timestamp = mtk_foe_entry_timestamp(&eth->ppe, entry->hash);
-++	if (timestamp < 0)
-++		return -ETIMEDOUT;
-++
-++	idle = mtk_eth_timestamp(eth) - timestamp;
-++	f->stats.lastused = jiffies - idle * HZ;
-++
-++	return 0;
-++}
-++
-++static int
-++mtk_eth_setup_tc_block_cb(enum tc_setup_type type, void *type_data, void *cb_priv)
-++{
-++	struct flow_cls_offload *cls = type_data;
-++	struct net_device *dev = cb_priv;
-++	struct mtk_mac *mac = netdev_priv(dev);
-++	struct mtk_eth *eth = mac->hw;
-++
-++	if (!tc_can_offload(dev))
-++		return -EOPNOTSUPP;
-++
-++	if (type != TC_SETUP_CLSFLOWER)
-++		return -EOPNOTSUPP;
-++
-++	switch (cls->command) {
-++	case FLOW_CLS_REPLACE:
-++		return mtk_flow_offload_replace(eth, cls);
-++	case FLOW_CLS_DESTROY:
-++		return mtk_flow_offload_destroy(eth, cls);
-++	case FLOW_CLS_STATS:
-++		return mtk_flow_offload_stats(eth, cls);
-++	default:
-++		return -EOPNOTSUPP;
-++	}
-++
-++	return 0;
-++}
-++
-++static int
-++mtk_eth_setup_tc_block(struct net_device *dev, struct flow_block_offload *f)
-++{
-++	struct mtk_mac *mac = netdev_priv(dev);
-++	struct mtk_eth *eth = mac->hw;
-++	static LIST_HEAD(block_cb_list);
-++	struct flow_block_cb *block_cb;
-++	flow_setup_cb_t *cb;
-++
-++	if (!eth->ppe.foe_table)
-++		return -EOPNOTSUPP;
-++
-++	if (f->binder_type != FLOW_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
-++		return -EOPNOTSUPP;
-++
-++	cb = mtk_eth_setup_tc_block_cb;
-++	f->driver_block_list = &block_cb_list;
-++
-++	switch (f->command) {
-++	case FLOW_BLOCK_BIND:
-++		block_cb = flow_block_cb_lookup(f->block, cb, dev);
-++		if (block_cb) {
-++			flow_block_cb_incref(block_cb);
-++			return 0;
-++		}
-++		block_cb = flow_block_cb_alloc(cb, dev, dev, NULL);
-++		if (IS_ERR(block_cb))
-++			return PTR_ERR(block_cb);
-++
-++		flow_block_cb_add(block_cb, f);
-++		list_add_tail(&block_cb->driver_list, &block_cb_list);
-++		return 0;
-++	case FLOW_BLOCK_UNBIND:
-++		block_cb = flow_block_cb_lookup(f->block, cb, dev);
-++		if (!block_cb)
-++			return -ENOENT;
-++
-++		if (flow_block_cb_decref(block_cb)) {
-++			flow_block_cb_remove(block_cb, f);
-++			list_del(&block_cb->driver_list);
-++		}
-++		return 0;
-++	default:
-++		return -EOPNOTSUPP;
-++	}
-++}
-++
-++int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type,
-++		     void *type_data)
-++{
-++	if (type == TC_SETUP_FT)
-++		return mtk_eth_setup_tc_block(dev, type_data);
-++
-++	return -EOPNOTSUPP;
-++}
-++
-++int mtk_eth_offload_init(struct mtk_eth *eth)
-++{
-++	if (!eth->ppe.foe_table)
-++		return 0;
-++
-++	return rhashtable_init(&eth->flow_table, &mtk_flow_ht_params);
-++}
-diff --git a/target/linux/generic/pending-5.10/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch b/target/linux/generic/pending-5.10/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch
-new file mode 100644
-index 0000000000..cb02c71829
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch
-@@ -0,0 +1,70 @@
-+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-+Subject: [PATCH] bcma: get SoC device struct & copy its DMA params to the
-+ subdevices
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+For bus devices to be fully usable it's required to set their DMA
-+parameters.
-+
-+For years it has been missing and remained unnoticed because of
-+mips_dma_alloc_coherent() silently handling the empty coherent_dma_mask.
-+Kernel 4.19 came with a lot of DMA changes and caused a regression on
-+the bcm47xx. Starting with the commit f8c55dc6e828 ("MIPS: use generic
-+dma noncoherent ops for simple noncoherent platforms") DMA coherent
-+allocations just fail. Example:
-+[    1.114914] bgmac_bcma bcma0:2: Allocation of TX ring 0x200 failed
-+[    1.121215] bgmac_bcma bcma0:2: Unable to alloc memory for DMA
-+[    1.127626] bgmac_bcma: probe of bcma0:2 failed with error -12
-+[    1.133838] bgmac_bcma: Broadcom 47xx GBit MAC driver loaded
-+
-+This change fixes above regression in addition to the MIPS bcm47xx
-+commit 321c46b91550 ("MIPS: BCM47XX: Setup struct device for the SoC").
-+
-+It also fixes another *old* GPIO regression caused by a parent pointing
-+to the NULL:
-+[    0.157054] missing gpiochip .dev parent pointer
-+[    0.157287] bcma: bus0: Error registering GPIO driver: -22
-+introduced by the commit 74f4e0cc6108 ("bcma: switch GPIO portions to
-+use GPIOLIB_IRQCHIP").
-+
-+Fixes: f8c55dc6e828 ("MIPS: use generic dma noncoherent ops for simple noncoherent platforms")
-+Fixes: 74f4e0cc6108 ("bcma: switch GPIO portions to use GPIOLIB_IRQCHIP")
-+Cc: linux-mips@linux-mips.org
-+Cc: Christoph Hellwig <hch@lst.de>
-+Cc: Linus Walleij <linus.walleij@linaro.org>
-+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-+---
-+
-+--- a/drivers/bcma/host_soc.c
-++++ b/drivers/bcma/host_soc.c
-+@@ -191,6 +191,8 @@ int __init bcma_host_soc_init(struct bcm
-+ 	struct bcma_bus *bus = &soc->bus;
-+ 	int err;
-+ 
-++	bus->dev = soc->dev;
-++
-+ 	/* Scan bus and initialize it */
-+ 	err = bcma_bus_early_register(bus);
-+ 	if (err)
-+--- a/drivers/bcma/main.c
-++++ b/drivers/bcma/main.c
-+@@ -236,12 +236,16 @@ EXPORT_SYMBOL(bcma_core_irq);
-+ 
-+ void bcma_prepare_core(struct bcma_bus *bus, struct bcma_device *core)
-+ {
-++	struct device *dev = &core->dev;
-++
-+ 	core->dev.release = bcma_release_core_dev;
-+ 	core->dev.bus = &bcma_bus_type;
-+ 	dev_set_name(&core->dev, "bcma%d:%d", bus->num, core->core_index);
-+ 	core->dev.parent = bus->dev;
-+-	if (bus->dev)
-++	if (bus->dev) {
-+ 		bcma_of_fill_device(bus->dev, core);
-++		dma_coerce_mask_and_coherent(dev, bus->dev->coherent_dma_mask);
-++	}
-+ 
-+ 	switch (bus->hosttype) {
-+ 	case BCMA_HOSTTYPE_PCI:
-diff --git a/target/linux/generic/pending-5.10/810-pci_disable_common_quirks.patch b/target/linux/generic/pending-5.10/810-pci_disable_common_quirks.patch
-new file mode 100644
-index 0000000000..7e7866add8
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/810-pci_disable_common_quirks.patch
-@@ -0,0 +1,62 @@
-+From: Gabor Juhos <juhosg@openwrt.org>
-+Subject: debloat: add kernel config option to disabling common PCI quirks
-+
-+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-+---
-+ drivers/pci/Kconfig  | 6 ++++++
-+ drivers/pci/quirks.c | 6 ++++++
-+ 2 files changed, 12 insertions(+)
-+
-+--- a/drivers/pci/Kconfig
-++++ b/drivers/pci/Kconfig
-+@@ -118,6 +118,13 @@ config XEN_PCIDEV_FRONTEND
-+ 	  The PCI device frontend driver allows the kernel to import arbitrary
-+ 	  PCI devices from a PCI backend to support PCI driver domains.
-+ 
-++config PCI_DISABLE_COMMON_QUIRKS
-++	bool "PCI disable common quirks"
-++	depends on PCI
-++	help
-++	  If you don't know what to do here, say N.
-++
-++
-+ config PCI_ATS
-+ 	bool
-+ 
-+--- a/drivers/pci/quirks.c
-++++ b/drivers/pci/quirks.c
-+@@ -205,6 +205,7 @@ static void quirk_mmio_always_on(struct
-+ DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID,
-+ 				PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on);
-+ 
-++#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
-+ /*
-+  * The Mellanox Tavor device gives false positive parity errors.  Mark this
-+  * device with a broken_parity_status to allow PCI scanning code to "skip"
-+@@ -3320,6 +3321,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
-+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
-+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
-+ 
-++#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
-++
-+ /*
-+  * Ivytown NTB BAR sizes are misreported by the hardware due to an erratum.
-+  * To work around this, query the size it should be configured to by the
-+@@ -3345,6 +3348,8 @@ static void quirk_intel_ntb(struct pci_d
-+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb);
-+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb);
-+ 
-++#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
-++
-+ /*
-+  * Some BIOS implementations leave the Intel GPU interrupts enabled, even
-+  * though no one is handling them (e.g., if the i915 driver is never
-+@@ -3383,6 +3388,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
-+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
-+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);
-+ 
-++#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
-++
-+ /*
-+  * PCI devices which are on Intel chips can skip the 10ms delay
-+  * before entering D3 mode.
-diff --git a/target/linux/generic/pending-5.10/811-pci_disable_usb_common_quirks.patch b/target/linux/generic/pending-5.10/811-pci_disable_usb_common_quirks.patch
-new file mode 100644
-index 0000000000..42a8397839
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/811-pci_disable_usb_common_quirks.patch
-@@ -0,0 +1,115 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Subject: debloat: disable common USB quirks
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+ drivers/usb/host/pci-quirks.c | 16 ++++++++++++++++
-+ drivers/usb/host/pci-quirks.h | 18 +++++++++++++++++-
-+ include/linux/usb/hcd.h       |  7 +++++++
-+ 3 files changed, 40 insertions(+), 1 deletion(-)
-+
-+--- a/drivers/usb/host/pci-quirks.c
-++++ b/drivers/usb/host/pci-quirks.c
-+@@ -128,6 +128,8 @@ struct amd_chipset_type {
-+ 	u8 rev;
-+ };
-+ 
-++#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
-++
-+ static struct amd_chipset_info {
-+ 	struct pci_dev	*nb_dev;
-+ 	struct pci_dev	*smbus_dev;
-+@@ -633,6 +635,10 @@ bool usb_amd_pt_check_port(struct device
-+ }
-+ EXPORT_SYMBOL_GPL(usb_amd_pt_check_port);
-+ 
-++#endif /* CONFIG_PCI_DISABLE_COMMON_QUIRKS */
-++
-++#if IS_ENABLED(CONFIG_USB_UHCI_HCD)
-++
-+ /*
-+  * Make sure the controller is completely inactive, unable to
-+  * generate interrupts or do DMA.
-+@@ -712,8 +718,17 @@ reset_needed:
-+ 	uhci_reset_hc(pdev, base);
-+ 	return 1;
-+ }
-++#else
-++int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base)
-++{
-++	return 0;
-++}
-++
-++#endif
-+ EXPORT_SYMBOL_GPL(uhci_check_and_reset_hc);
-+ 
-++#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
-++
-+ static inline int io_type_enabled(struct pci_dev *pdev, unsigned int mask)
-+ {
-+ 	u16 cmd;
-+@@ -1285,3 +1300,4 @@ static void quirk_usb_early_handoff(stru
-+ }
-+ DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,
-+ 			PCI_CLASS_SERIAL_USB, 8, quirk_usb_early_handoff);
-++#endif
-+--- a/drivers/usb/host/pci-quirks.h
-++++ b/drivers/usb/host/pci-quirks.h
-+@@ -5,6 +5,9 @@
-+ #ifdef CONFIG_USB_PCI
-+ void uhci_reset_hc(struct pci_dev *pdev, unsigned long base);
-+ int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base);
-++#endif  /* CONFIG_USB_PCI */
-++
-++#if defined(CONFIG_USB_PCI) && !defined(CONFIG_PCI_DISABLE_COMMON_QUIRKS)
-+ int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *pdev);
-+ bool usb_amd_hang_symptom_quirk(void);
-+ bool usb_amd_prefetch_quirk(void);
-+@@ -19,6 +22,18 @@ void sb800_prefetch(struct device *dev,
-+ bool usb_amd_pt_check_port(struct device *device, int port);
-+ #else
-+ struct pci_dev;
-++static inline int usb_amd_quirk_pll_check(void)
-++{
-++	return 0;
-++}
-++static inline bool usb_amd_hang_symptom_quirk(void)
-++{
-++	return false;
-++}
-++static inline bool usb_amd_prefetch_quirk(void)
-++{
-++	return false;
-++}
-+ static inline void usb_amd_quirk_pll_disable(void) {}
-+ static inline void usb_amd_quirk_pll_enable(void) {}
-+ static inline void usb_asmedia_modifyflowcontrol(struct pci_dev *pdev) {}
-+@@ -29,6 +44,11 @@ static inline bool usb_amd_pt_check_port
-+ {
-+ 	return false;
-+ }
-++static inline void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev) {}
-++static inline bool usb_xhci_needs_pci_reset(struct pci_dev *pdev)
-++{
-++	return false;
-++}
-+ #endif  /* CONFIG_USB_PCI */
-+ 
-+ #endif  /*  __LINUX_USB_PCI_QUIRKS_H  */
-+--- a/include/linux/usb/hcd.h
-++++ b/include/linux/usb/hcd.h
-+@@ -484,7 +484,14 @@ extern int usb_hcd_pci_probe(struct pci_
-+ extern void usb_hcd_pci_remove(struct pci_dev *dev);
-+ extern void usb_hcd_pci_shutdown(struct pci_dev *dev);
-+ 
-++#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
-+ extern int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *dev);
-++#else
-++static inline int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *dev)
-++{
-++	return 0;
-++}
-++#endif
-+ 
-+ #ifdef CONFIG_PM
-+ extern const struct dev_pm_ops usb_hcd_pci_pm_ops;
-diff --git a/target/linux/generic/pending-5.10/820-w1-gpio-fix-problem-with-platfom-data-in-w1-gpio.patch b/target/linux/generic/pending-5.10/820-w1-gpio-fix-problem-with-platfom-data-in-w1-gpio.patch
-new file mode 100644
-index 0000000000..33eb34c913
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/820-w1-gpio-fix-problem-with-platfom-data-in-w1-gpio.patch
-@@ -0,0 +1,26 @@
-+From d9c8bc8c1408f3e8529db6e4e04017b4c579c342 Mon Sep 17 00:00:00 2001
-+From: Pawel Dembicki <paweldembicki@gmail.com>
-+Date: Sun, 18 Feb 2018 17:08:04 +0100
-+Subject: [PATCH] w1: gpio: fix problem with platfom data in w1-gpio
-+
-+In devices, where fdt is used, is impossible to apply platform data
-+without proper fdt node.
-+
-+This patch allow to use platform data in devices with fdt.
-+
-+Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
-+---
-+ drivers/w1/masters/w1-gpio.c | 7 +++----
-+ 1 file changed, 3 insertions(+), 4 deletions(-)
-+
-+--- a/drivers/w1/masters/w1-gpio.c
-++++ b/drivers/w1/masters/w1-gpio.c
-+@@ -76,7 +76,7 @@ static int w1_gpio_probe(struct platform
-+ 	enum gpiod_flags gflags = GPIOD_OUT_LOW_OPEN_DRAIN;
-+ 	int err;
-+ 
-+-	if (of_have_populated_dt()) {
-++	if (of_have_populated_dt() && !dev_get_platdata(&pdev->dev)) {
-+ 		pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
-+ 		if (!pdata)
-+ 			return -ENOMEM;
-diff --git a/target/linux/generic/pending-5.10/834-ledtrig-libata.patch b/target/linux/generic/pending-5.10/834-ledtrig-libata.patch
-new file mode 100644
-index 0000000000..a52e712d8c
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/834-ledtrig-libata.patch
-@@ -0,0 +1,149 @@
-+From: Daniel Golle <daniel@makrotopia.org>
-+Subject: libata: add ledtrig support
-+
-+This adds a LED trigger for each ATA port indicating disk activity.
-+
-+As this is needed only on specific platforms (NAS SoCs and such),
-+these platforms should define ARCH_WANTS_LIBATA_LEDS if there
-+are boards with LED(s) intended to indicate ATA disk activity and
-+need the OS to take care of that.
-+In that way, if not selected, LED trigger support not will be
-+included in libata-core and both, codepaths and structures remain
-+untouched.
-+
-+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
-+---
-+ drivers/ata/Kconfig       | 16 ++++++++++++++++
-+ drivers/ata/libata-core.c | 41 +++++++++++++++++++++++++++++++++++++++++
-+ include/linux/libata.h    |  9 +++++++++
-+ 3 files changed, 66 insertions(+)
-+
-+--- a/drivers/ata/Kconfig
-++++ b/drivers/ata/Kconfig
-+@@ -67,6 +67,22 @@ config ATA_FORCE
-+ 
-+ 	  If unsure, say Y.
-+ 
-++config ARCH_WANT_LIBATA_LEDS
-++	bool
-++
-++config ATA_LEDS
-++	bool "support ATA port LED triggers"
-++	depends on ARCH_WANT_LIBATA_LEDS
-++	select NEW_LEDS
-++	select LEDS_CLASS
-++	select LEDS_TRIGGERS
-++	default y
-++	help
-++	  This option adds a LED trigger for each registered ATA port.
-++	  It is used to drive disk activity leds connected via GPIO.
-++
-++	  If unsure, say N.
-++
-+ config ATA_ACPI
-+ 	bool "ATA ACPI Support"
-+ 	depends on ACPI
-+--- a/drivers/ata/libata-core.c
-++++ b/drivers/ata/libata-core.c
-+@@ -650,6 +650,19 @@ u64 ata_tf_read_block(const struct ata_t
-+ 	return block;
-+ }
-+ 
-++#ifdef CONFIG_ATA_LEDS
-++#define LIBATA_BLINK_DELAY 20 /* ms */
-++static inline void ata_led_act(struct ata_port *ap)
-++{
-++	unsigned long led_delay = LIBATA_BLINK_DELAY;
-++
-++	if (unlikely(!ap->ledtrig))
-++		return;
-++
-++	led_trigger_blink_oneshot(ap->ledtrig, &led_delay, &led_delay, 0);
-++}
-++#endif
-++
-+ /**
-+  *	ata_build_rw_tf - Build ATA taskfile for given read/write request
-+  *	@tf: Target ATA taskfile
-+@@ -4513,6 +4526,9 @@ struct ata_queued_cmd *ata_qc_new_init(s
-+ 		if (tag < 0)
-+ 			return NULL;
-+ 	}
-++#ifdef CONFIG_ATA_LEDS
-++	ata_led_act(ap);
-++#endif
-+ 
-+ 	qc = __ata_qc_from_tag(ap, tag);
-+ 	qc->tag = qc->hw_tag = tag;
-+@@ -5291,6 +5307,9 @@ struct ata_port *ata_port_alloc(struct a
-+ 	ap->stats.unhandled_irq = 1;
-+ 	ap->stats.idle_irq = 1;
-+ #endif
-++#ifdef CONFIG_ATA_LEDS
-++	ap->ledtrig = kzalloc(sizeof(struct led_trigger), GFP_KERNEL);
-++#endif
-+ 	ata_sff_port_init(ap);
-+ 
-+ 	return ap;
-+@@ -5326,6 +5345,12 @@ static void ata_host_release(struct kref
-+ 
-+ 		kfree(ap->pmp_link);
-+ 		kfree(ap->slave_link);
-++#ifdef CONFIG_ATA_LEDS
-++		if (ap->ledtrig) {
-++			led_trigger_unregister(ap->ledtrig);
-++			kfree(ap->ledtrig);
-++		};
-++#endif
-+ 		kfree(ap);
-+ 		host->ports[i] = NULL;
-+ 	}
-+@@ -5732,7 +5757,23 @@ int ata_host_register(struct ata_host *h
-+ 		host->ports[i]->print_id = atomic_inc_return(&ata_print_id);
-+ 		host->ports[i]->local_port_no = i + 1;
-+ 	}
-++#ifdef CONFIG_ATA_LEDS
-++	for (i = 0; i < host->n_ports; i++) {
-++		if (unlikely(!host->ports[i]->ledtrig))
-++			continue;
-+ 
-++		snprintf(host->ports[i]->ledtrig_name,
-++			sizeof(host->ports[i]->ledtrig_name), "ata%u",
-++			host->ports[i]->print_id);
-++
-++		host->ports[i]->ledtrig->name = host->ports[i]->ledtrig_name;
-++
-++		if (led_trigger_register(host->ports[i]->ledtrig)) {
-++			kfree(host->ports[i]->ledtrig);
-++			host->ports[i]->ledtrig = NULL;
-++		}
-++	}
-++#endif
-+ 	/* Create associated sysfs transport objects  */
-+ 	for (i = 0; i < host->n_ports; i++) {
-+ 		rc = ata_tport_add(host->dev,host->ports[i]);
-+--- a/include/linux/libata.h
-++++ b/include/linux/libata.h
-+@@ -23,6 +23,9 @@
-+ #include <linux/cdrom.h>
-+ #include <linux/sched.h>
-+ #include <linux/async.h>
-++#ifdef CONFIG_ATA_LEDS
-++#include <linux/leds.h>
-++#endif
-+ 
-+ /*
-+  * Define if arch has non-standard setup.  This is a _PCI_ standard
-+@@ -882,6 +885,12 @@ struct ata_port {
-+ #ifdef CONFIG_ATA_ACPI
-+ 	struct ata_acpi_gtm	__acpi_init_gtm; /* use ata_acpi_init_gtm() */
-+ #endif
-++
-++#ifdef CONFIG_ATA_LEDS
-++	struct led_trigger	*ledtrig;
-++	char			ledtrig_name[8];
-++#endif
-++
-+ 	/* owned by EH */
-+ 	u8			sector_buf[ATA_SECT_SIZE] ____cacheline_aligned;
-+ };
-diff --git a/target/linux/generic/pending-5.10/840-hwrng-bcm2835-set-quality-to-1000.patch b/target/linux/generic/pending-5.10/840-hwrng-bcm2835-set-quality-to-1000.patch
-new file mode 100644
-index 0000000000..580f0b1bfa
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/840-hwrng-bcm2835-set-quality-to-1000.patch
-@@ -0,0 +1,26 @@
-+From d6988cf1d16faac56899918bb2b1be8d85155e3f Mon Sep 17 00:00:00 2001
-+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
-+Date: Sat, 20 Feb 2021 18:36:38 +0100
-+Subject: [PATCH] hwrng: bcm2835: set quality to 1000
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+This allows devices without a high precission timer to reduce boot from >100s
-+to <30s.
-+
-+Signed-off-by: �lvaro Fernández Rojas <noltari@gmail.com>
-+---
-+ drivers/char/hw_random/bcm2835-rng.c | 1 +
-+ 1 file changed, 1 insertion(+)
-+
-+--- a/drivers/char/hw_random/bcm2835-rng.c
-++++ b/drivers/char/hw_random/bcm2835-rng.c
-+@@ -163,6 +163,7 @@ static int bcm2835_rng_probe(struct plat
-+ 	priv->rng.init = bcm2835_rng_init;
-+ 	priv->rng.read = bcm2835_rng_read;
-+ 	priv->rng.cleanup = bcm2835_rng_cleanup;
-++	priv->rng.quality = 1000;
-+ 
-+ 	if (dev_of_node(dev)) {
-+ 		rng_id = of_match_node(bcm2835_rng_of_match, dev->of_node);
-diff --git a/target/linux/generic/pending-5.10/920-mangle_bootargs.patch b/target/linux/generic/pending-5.10/920-mangle_bootargs.patch
-new file mode 100644
-index 0000000000..9008a88e2e
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/920-mangle_bootargs.patch
-@@ -0,0 +1,71 @@
-+From: Imre Kaloz <kaloz@openwrt.org>
-+Subject: init: add CONFIG_MANGLE_BOOTARGS and disable it by default
-+
-+Enabling this option renames the bootloader supplied root=
-+and rootfstype= variables, which might have to be know but
-+would break the automatisms OpenWrt uses.
-+
-+Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
-+---
-+ init/Kconfig |  9 +++++++++
-+ init/main.c  | 24 ++++++++++++++++++++++++
-+ 2 files changed, 33 insertions(+)
-+
-+--- a/init/Kconfig
-++++ b/init/Kconfig
-+@@ -1791,6 +1791,15 @@ config EMBEDDED
-+ 	  an embedded system so certain expert options are available
-+ 	  for configuration.
-+ 
-++config MANGLE_BOOTARGS
-++	bool "Rename offending bootargs"
-++	depends on EXPERT
-++	help
-++	  Sometimes the bootloader passed bogus root= and rootfstype=
-++	  parameters to the kernel, and while you want to ignore them,
-++	  you need to know the values f.e. to support dual firmware
-++	  layouts on the flash.
-++
-+ config HAVE_PERF_EVENTS
-+ 	bool
-+ 	help
-+--- a/init/main.c
-++++ b/init/main.c
-+@@ -607,6 +607,29 @@ static inline void setup_nr_cpu_ids(void
-+ static inline void smp_prepare_cpus(unsigned int maxcpus) { }
-+ #endif
-+ 
-++#ifdef CONFIG_MANGLE_BOOTARGS
-++static void __init mangle_bootargs(char *command_line)
-++{
-++	char *rootdev;
-++	char *rootfs;
-++
-++	rootdev = strstr(command_line, "root=/dev/mtdblock");
-++
-++	if (rootdev)
-++		strncpy(rootdev, "mangled_rootblock=", 18);
-++
-++	rootfs = strstr(command_line, "rootfstype");
-++
-++	if (rootfs)
-++		strncpy(rootfs, "mangled_fs", 10);
-++
-++}
-++#else
-++static void __init mangle_bootargs(char *command_line)
-++{
-++}
-++#endif
-++
-+ /*
-+  * We need to store the untouched command line for future reference.
-+  * We also need to store the touched command line since the parameter
-+@@ -868,6 +891,7 @@ asmlinkage __visible void __init __no_sa
-+ 	pr_notice("%s", linux_banner);
-+ 	early_security_init();
-+ 	setup_arch(&command_line);
-++	mangle_bootargs(command_line);
-+ 	setup_boot_config(command_line);
-+ 	setup_command_line(command_line);
-+ 	setup_nr_cpu_ids();
--- 
-2.25.1
-
diff --git a/patches/backports/0004-mediatek-update-to-latest-trunk-version.patch b/patches/backports/0004-mediatek-update-to-latest-trunk-version.patch
deleted file mode 100644
index 903261b10..000000000
--- a/patches/backports/0004-mediatek-update-to-latest-trunk-version.patch
+++ /dev/null
@@ -1,108825 +0,0 @@
-From 29f60bb65745d63e7d8cce273bd3f773fda251ff Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Thu, 9 Apr 2020 09:53:24 +0200
-Subject: [PATCH 04/27] mediatek: update to latest trunk version
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- package/boot/mt7623n-preloader/Makefile       |     4 +-
- package/boot/uboot-mediatek/Makefile          |     2 +-
- target/linux/mediatek/Makefile                |     4 +-
- .../dts/mt7622-buffalo-wsr-2533dhp2.dts       |   339 +
- .../mt7622-elecom-wrc-2533gent.dts            |     3 +-
- .../mediatek/dts/mt7622-linksys-e8450-ubi.dts |    61 +
- .../mediatek/dts/mt7622-linksys-e8450.dts     |   106 +
- .../mt7622-linksys-e8450.dtsi}                |   344 +-
- target/linux/mediatek/dts/mt7622-rfb1-ubi.dts |    68 +
- .../mt7622-ubnt-unifi-6-lr.dts                |     0
- .../mt7623a-unielec-u7623-02-emmc-512m.dts    |    17 +
- .../dts/mt7623a-unielec-u7623-02-emmc.dtsi    |   339 +
- .../drivers/net/phy/mtk/mt753x/Kconfig        |     3 +
- .../drivers/net/phy/mtk/mt753x/Makefile       |    11 +
- .../drivers/net/phy/mtk/mt753x/mt7530.c       |   631 +
- .../drivers/net/phy/mtk/mt753x/mt7530.h       |    13 +
- .../drivers/net/phy/mtk/mt753x/mt7531.c       |   918 +
- .../drivers/net/phy/mtk/mt753x/mt7531.h       |    13 +
- .../drivers/net/phy/mtk/mt753x/mt753x.h       |   213 +
- .../net/phy/mtk/mt753x/mt753x_common.c        |    90 +
- .../drivers/net/phy/mtk/mt753x/mt753x_mdio.c  |   597 +
- .../drivers/net/phy/mtk/mt753x/mt753x_nl.c    |   382 +
- .../drivers/net/phy/mtk/mt753x/mt753x_nl.h    |    43 +
- .../drivers/net/phy/mtk/mt753x/mt753x_regs.h  |   294 +
- .../net/phy/mtk/mt753x/mt753x_swconfig.c      |   510 +
- .../net/phy/mtk/mt753x/mt753x_swconfig.h      |    29 +
- .../drivers/net/phy/mtk/mt753x/mt753x_vlan.c  |   183 +
- .../drivers/net/phy/mtk/mt753x/mt753x_vlan.h  |    40 +
- .../files-5.10/drivers/net/phy/rtk/Makefile   |    66 +
- .../drivers/net/phy/rtk/modules.builtin       |     1 +
- .../drivers/net/phy/rtk/rtl8367c/acl.c        |  2061 ++
- .../drivers/net/phy/rtk/rtl8367c/cpu.c        |   537 +
- .../drivers/net/phy/rtk/rtl8367c/dot1x.c      |   843 +
- .../drivers/net/phy/rtk/rtl8367c/eee.c        |   162 +
- .../drivers/net/phy/rtk/rtl8367c/i2c.c        |   436 +
- .../drivers/net/phy/rtk/rtl8367c/igmp.c       |  1555 ++
- .../net/phy/rtk/rtl8367c/include/acl.h        |   990 +
- .../net/phy/rtk/rtl8367c/include/cpu.h        |   327 +
- .../net/phy/rtk/rtl8367c/include/dot1x.h      |   470 +
- .../net/phy/rtk/rtl8367c/include/eee.h        |    82 +
- .../net/phy/rtk/rtl8367c/include/i2c.h        |   168 +
- .../net/phy/rtk/rtl8367c/include/igmp.h       |   769 +
- .../net/phy/rtk/rtl8367c/include/interrupt.h  |   254 +
- .../drivers/net/phy/rtk/rtl8367c/include/l2.h |  1181 +
- .../net/phy/rtk/rtl8367c/include/leaky.h      |   371 +
- .../net/phy/rtk/rtl8367c/include/led.h        |   481 +
- .../net/phy/rtk/rtl8367c/include/mirror.h     |   272 +
- .../net/phy/rtk/rtl8367c/include/oam.h        |   188 +
- .../net/phy/rtk/rtl8367c/include/port.h       |   959 +
- .../net/phy/rtk/rtl8367c/include/ptp.h        |   511 +
- .../net/phy/rtk/rtl8367c/include/qos.h        |   781 +
- .../net/phy/rtk/rtl8367c/include/rate.h       |   305 +
- .../net/phy/rtk/rtl8367c/include/rldp.h       |   264 +
- .../net/phy/rtk/rtl8367c/include/rtk_error.h  |   229 +
- .../net/phy/rtk/rtl8367c/include/rtk_hal.h    |    44 +
- .../net/phy/rtk/rtl8367c/include/rtk_switch.h |   737 +
- .../net/phy/rtk/rtl8367c/include/rtk_types.h  |   155 +
- .../rtk/rtl8367c/include/rtl8367c_asicdrv.h   |   129 +
- .../rtl8367c/include/rtl8367c_asicdrv_acl.h   |   231 +
- .../include/rtl8367c_asicdrv_cputag.h         |    49 +
- .../rtl8367c/include/rtl8367c_asicdrv_dot1x.h |    52 +
- .../rtl8367c/include/rtl8367c_asicdrv_eav.h   |   109 +
- .../rtl8367c/include/rtl8367c_asicdrv_eee.h   |    31 +
- .../rtl8367c/include/rtl8367c_asicdrv_fc.h    |    99 +
- .../rtl8367c/include/rtl8367c_asicdrv_green.h |    36 +
- .../rtl8367c/include/rtl8367c_asicdrv_hsb.h   |    43 +
- .../rtl8367c/include/rtl8367c_asicdrv_i2c.h   |    47 +
- .../rtl8367c/include/rtl8367c_asicdrv_igmp.h  |   169 +
- .../include/rtl8367c_asicdrv_inbwctrl.h       |    30 +
- .../include/rtl8367c_asicdrv_interrupt.h      |    66 +
- .../rtl8367c/include/rtl8367c_asicdrv_led.h   |   138 +
- .../rtl8367c/include/rtl8367c_asicdrv_lut.h   |   159 +
- .../rtl8367c/include/rtl8367c_asicdrv_meter.h |    34 +
- .../rtl8367c/include/rtl8367c_asicdrv_mib.h   |   133 +
- .../include/rtl8367c_asicdrv_mirror.h         |    49 +
- .../rtl8367c/include/rtl8367c_asicdrv_misc.h  |    34 +
- .../rtl8367c/include/rtl8367c_asicdrv_oam.h   |    47 +
- .../rtl8367c/include/rtl8367c_asicdrv_phy.h   |    43 +
- .../rtl8367c/include/rtl8367c_asicdrv_port.h  |   237 +
- .../include/rtl8367c_asicdrv_portIsolation.h  |    28 +
- .../rtl8367c/include/rtl8367c_asicdrv_qos.h   |    96 +
- .../rtl8367c/include/rtl8367c_asicdrv_rldp.h  |    60 +
- .../rtl8367c/include/rtl8367c_asicdrv_rma.h   |    57 +
- .../include/rtl8367c_asicdrv_scheduling.h     |    58 +
- .../rtl8367c/include/rtl8367c_asicdrv_storm.h |    61 +
- .../rtl8367c/include/rtl8367c_asicdrv_svlan.h |   132 +
- .../include/rtl8367c_asicdrv_trunking.h       |    48 +
- .../rtl8367c_asicdrv_unknownMulticast.h       |    59 +
- .../rtl8367c/include/rtl8367c_asicdrv_vlan.h  |   157 +
- .../phy/rtk/rtl8367c/include/rtl8367c_base.h  |   596 +
- .../phy/rtk/rtl8367c/include/rtl8367c_reg.h   | 22819 ++++++++++++++++
- .../net/phy/rtk/rtl8367c/include/smi.h        |    54 +
- .../net/phy/rtk/rtl8367c/include/stat.h       |   433 +
- .../net/phy/rtk/rtl8367c/include/storm.h      |   422 +
- .../net/phy/rtk/rtl8367c/include/svlan.h      |   896 +
- .../net/phy/rtk/rtl8367c/include/trap.h       |   757 +
- .../net/phy/rtk/rtl8367c/include/trunk.h      |   328 +
- .../net/phy/rtk/rtl8367c/include/vlan.h       |   892 +
- .../drivers/net/phy/rtk/rtl8367c/interrupt.c  |   434 +
- .../drivers/net/phy/rtk/rtl8367c/l2.c         |  2911 ++
- .../drivers/net/phy/rtk/rtl8367c/leaky.c      |   590 +
- .../drivers/net/phy/rtk/rtl8367c/led.c        |   792 +
- .../drivers/net/phy/rtk/rtl8367c/mirror.c     |   548 +
- .../drivers/net/phy/rtk/rtl8367c/oam.c        |   245 +
- .../drivers/net/phy/rtk/rtl8367c/port.c       |  2467 ++
- .../drivers/net/phy/rtk/rtl8367c/ptp.c        |   759 +
- .../drivers/net/phy/rtk/rtl8367c/qos.c        |  1452 +
- .../drivers/net/phy/rtk/rtl8367c/rate.c       |   607 +
- .../drivers/net/phy/rtk/rtl8367c/rldp.c       |   468 +
- .../drivers/net/phy/rtk/rtl8367c/rtk_hal.c    |   839 +
- .../drivers/net/phy/rtk/rtl8367c/rtk_switch.c |  1796 ++
- .../net/phy/rtk/rtl8367c/rtl8367c_asicdrv.c   |   639 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_acl.c   |  1173 +
- .../rtk/rtl8367c/rtl8367c_asicdrv_cputag.c    |   369 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_dot1x.c |   415 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_eav.c   |   877 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_eee.c   |   141 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_fc.c    |  1354 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_green.c |   445 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_hsb.c   |    81 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_i2c.c   |   474 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_igmp.c  |  2109 ++
- .../rtk/rtl8367c/rtl8367c_asicdrv_inbwctrl.c  |   164 +
- .../rtk/rtl8367c/rtl8367c_asicdrv_interrupt.c |   205 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_led.c   |   727 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_lut.c   |  1549 ++
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_meter.c |   305 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_mib.c   |   570 +
- .../rtk/rtl8367c/rtl8367c_asicdrv_mirror.c    |   472 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_misc.c  |   268 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_oam.c   |   194 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_phy.c   |   394 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_port.c  |  5752 ++++
- .../rtl8367c/rtl8367c_asicdrv_portIsolation.c |   119 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_qos.c   |   778 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_rldp.c  |   674 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_rma.c   |   362 +
- .../rtl8367c/rtl8367c_asicdrv_scheduling.c    |   525 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_storm.c |   851 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_svlan.c |  1003 +
- .../rtk/rtl8367c/rtl8367c_asicdrv_trunking.c  |   356 +
- .../rtl8367c_asicdrv_unknownMulticast.c       |   238 +
- .../phy/rtk/rtl8367c/rtl8367c_asicdrv_vlan.c  |  1505 +
- .../drivers/net/phy/rtk/rtl8367c/smi.c        |   444 +
- .../drivers/net/phy/rtk/rtl8367c/stat.c       |   626 +
- .../drivers/net/phy/rtk/rtl8367c/storm.c      |   816 +
- .../drivers/net/phy/rtk/rtl8367c/svlan.c      |  2415 ++
- .../drivers/net/phy/rtk/rtl8367c/trap.c       |  1229 +
- .../drivers/net/phy/rtk/rtl8367c/trunk.c      |   605 +
- .../drivers/net/phy/rtk/rtl8367c/vlan.c       |  2124 ++
- .../files-5.10/drivers/net/phy/rtk/rtl8367s.c |   580 +
- .../drivers/net/phy/rtk/rtl8367s_dbg.c        |   648 +
- .../drivers/net/phy/rtk/rtl8367s_mdio.c       |   312 +
- .../boot/dts/mediatek/mt7622-rfb1-ubi.dts     |   644 -
- target/linux/mediatek/image/Makefile          |     2 +-
- .../mediatek/image/gen_mt7622_emmc_img.sh     |    19 -
- target/linux/mediatek/image/mt7622.mk         |   173 +-
- target/linux/mediatek/image/mt7623.mk         |     2 +
- .../mt7622/base-files/etc/board.d/01_leds     |    17 +
- .../mt7622/base-files/etc/board.d/02_network  |    21 +-
- .../mt7622/base-files/etc/init.d/bootcount    |    11 +
- .../base-files/etc/uci-defaults/09_fix_crc    |    10 +
- .../base-files/lib/preinit/79_move_config     |    18 -
- .../mt7622/base-files/lib/upgrade/buffalo.sh  |   126 +
- .../mt7622/base-files/lib/upgrade/platform.sh |    61 +-
- .../mt7622/{config-5.4 => config-5.10}        |   207 +-
- target/linux/mediatek/mt7622/target.mk        |     3 +-
- .../mt7623/base-files/etc/board.d/02_network  |     1 -
- target/linux/mediatek/mt7623/config-5.4       |     1 +
- .../mt7629/base-files/etc/board.d/02_network  |     1 -
- target/linux/mediatek/mt7629/config-5.4       |     1 +
- .../100-dts-update-mt7622-rfb1.patch          |   119 +
- .../101-dts-update-mt7629-rfb.patch           |    37 +
- .../105-dts-mt7622-enable-pstore.patch        |    25 +
- .../110-dts-fix-bpi2-console.patch            |    10 +
- .../111-dts-fix-bpi64-console.patch           |    11 +
- .../112-dts-fix-bpi64-lan-names.patch         |    37 +
- .../113-dts-fix-bpi64-leds-and-buttons.patch  |    56 +
- .../114-dts-bpi64-disable-rtc.patch           |    21 +
- .../130-dts-mt7629-add-snand-support.patch    |    97 +
- .../131-dts-mt7622-add-snand-support.patch    |    96 +
- ...dts-fix-wmac-support-for-mt7622-rfb1.patch |    18 +
- ...s-mt7623-eip97-inside-secure-support.patch |    23 +
- ...-phy-phy-mtk-tphy-Add-hifsys-support.patch |    66 +
- ...e-mtk-ecc-header-file-to-include-mtd.patch |   139 +
- .../310-mtd-spinand-disable-on-die-ECC.patch  |    31 +
- ...aTek-Add-SPI-NAND-Flash-interface-dr.patch |  1246 +
- .../patches-5.10/330-mtk-bmt-support.patch    |   855 +
- ...Add-support-for-the-Fidelix-FM35X1GA.patch |   122 +
- ...trx-Allow-to-specify-trx-magic-in-DT.patch |    75 +
- ...ove-dependency-to-BRCM-architectures.patch |    23 +
- ...Fix-WAITRDY-break-condition-and-time.patch |    36 +
- ...ypto-add-eip97-inside-secure-support.patch |    27 +
- ...01-crypto-fix-eip97-cache-incoherent.patch |    26 +
- .../patches-5.10/410-bt-mtk-serial-fix.patch  |    33 +
- ...or-add-support-for-Winbond-W25Q512JV.patch |    28 +
- .../500-gsw-rtl8367s-mt7622-support.patch     |    25 +
- ...ngs-PCI-Mediatek-Update-PCIe-binding.patch |   415 +
- ...e-regmap-to-get-shared-pcie-cfg-base.patch |   217 +
- ...ek-Split-PCIe-node-for-MT2712-MT7622.patch |   417 +
- ...dts-mediatek-Update-mt7629-PCIe-node.patch |   203 +
- ...diatek-fix-clearing-interrupt-status.patch |    24 +
- ..._eth_soc-add-support-for-coherent-DM.patch |    85 +
- ...ediatek-add-support-for-coherent-DMA.patch |   108 +
- .../patches-5.10/800-ubnt-ledbar-driver.patch |    29 +
- ...mt7622-bpi-r64-aliases-for-dtoverlay.patch |    80 +
- .../0227-arm-dts-Add-Unielec-U7623-DTS.patch  |   387 -
- .../patches-5.4/0310-mtk-bmt-support.patch    |   837 +
- ...trx-Allow-to-specify-trx-magic-in-DT.patch |    75 +
- ...ove-dependency-to-BRCM-architectures.patch |    23 +
- 210 files changed, 105104 insertions(+), 1565 deletions(-)
- create mode 100644 target/linux/mediatek/dts/mt7622-buffalo-wsr-2533dhp2.dts
- rename target/linux/mediatek/{files-5.4/arch/arm64/boot/dts/mediatek => dts}/mt7622-elecom-wrc-2533gent.dts (99%)
- create mode 100644 target/linux/mediatek/dts/mt7622-linksys-e8450-ubi.dts
- create mode 100644 target/linux/mediatek/dts/mt7622-linksys-e8450.dts
- rename target/linux/mediatek/{files-5.4/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64-rootdisk.dts => dts/mt7622-linksys-e8450.dtsi} (50%)
- create mode 100644 target/linux/mediatek/dts/mt7622-rfb1-ubi.dts
- rename target/linux/mediatek/{files-5.4/arch/arm64/boot/dts/mediatek => dts}/mt7622-ubnt-unifi-6-lr.dts (100%)
- create mode 100644 target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc-512m.dts
- create mode 100644 target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/Kconfig
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/Makefile
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt7530.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt7530.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt7531.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt7531.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_common.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_mdio.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_nl.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_nl.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_regs.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_swconfig.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_swconfig.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_vlan.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_vlan.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/Makefile
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/modules.builtin
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/acl.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/cpu.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/dot1x.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/eee.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/i2c.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/igmp.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/acl.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/cpu.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/dot1x.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/eee.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/i2c.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/igmp.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/interrupt.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/l2.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/leaky.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/led.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/mirror.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/oam.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/port.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/ptp.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/qos.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rate.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rldp.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtk_error.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtk_hal.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtk_switch.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtk_types.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_acl.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_cputag.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_dot1x.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_eav.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_eee.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_fc.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_green.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_hsb.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_i2c.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_igmp.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_inbwctrl.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_interrupt.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_led.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_lut.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_meter.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_mib.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_mirror.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_misc.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_oam.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_phy.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_port.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_portIsolation.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_qos.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_rldp.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_rma.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_scheduling.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_storm.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_svlan.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_trunking.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_unknownMulticast.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_vlan.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_base.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_reg.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/smi.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/stat.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/storm.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/svlan.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/trap.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/trunk.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/vlan.h
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/interrupt.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/l2.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/leaky.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/led.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/mirror.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/oam.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/port.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/ptp.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/qos.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rate.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rldp.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtk_hal.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtk_switch.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_acl.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_cputag.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_dot1x.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_eav.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_eee.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_fc.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_green.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_hsb.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_i2c.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_igmp.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_inbwctrl.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_interrupt.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_led.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_lut.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_meter.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_mib.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_mirror.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_misc.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_oam.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_phy.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_port.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_portIsolation.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_qos.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_rldp.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_rma.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_scheduling.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_storm.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_svlan.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_trunking.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_unknownMulticast.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_vlan.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/smi.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/stat.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/storm.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/svlan.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/trap.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/trunk.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/vlan.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367s.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367s_dbg.c
- create mode 100644 target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367s_mdio.c
- delete mode 100644 target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-rfb1-ubi.dts
- delete mode 100755 target/linux/mediatek/image/gen_mt7622_emmc_img.sh
- create mode 100755 target/linux/mediatek/mt7622/base-files/etc/board.d/01_leds
- create mode 100755 target/linux/mediatek/mt7622/base-files/etc/init.d/bootcount
- create mode 100644 target/linux/mediatek/mt7622/base-files/etc/uci-defaults/09_fix_crc
- delete mode 100644 target/linux/mediatek/mt7622/base-files/lib/preinit/79_move_config
- create mode 100644 target/linux/mediatek/mt7622/base-files/lib/upgrade/buffalo.sh
- rename target/linux/mediatek/mt7622/{config-5.4 => config-5.10} (67%)
- mode change 100755 => 100644 target/linux/mediatek/mt7623/base-files/etc/board.d/02_network
- mode change 100755 => 100644 target/linux/mediatek/mt7629/base-files/etc/board.d/02_network
- create mode 100644 target/linux/mediatek/patches-5.10/100-dts-update-mt7622-rfb1.patch
- create mode 100644 target/linux/mediatek/patches-5.10/101-dts-update-mt7629-rfb.patch
- create mode 100644 target/linux/mediatek/patches-5.10/105-dts-mt7622-enable-pstore.patch
- create mode 100644 target/linux/mediatek/patches-5.10/110-dts-fix-bpi2-console.patch
- create mode 100644 target/linux/mediatek/patches-5.10/111-dts-fix-bpi64-console.patch
- create mode 100644 target/linux/mediatek/patches-5.10/112-dts-fix-bpi64-lan-names.patch
- create mode 100644 target/linux/mediatek/patches-5.10/113-dts-fix-bpi64-leds-and-buttons.patch
- create mode 100644 target/linux/mediatek/patches-5.10/114-dts-bpi64-disable-rtc.patch
- create mode 100644 target/linux/mediatek/patches-5.10/130-dts-mt7629-add-snand-support.patch
- create mode 100644 target/linux/mediatek/patches-5.10/131-dts-mt7622-add-snand-support.patch
- create mode 100644 target/linux/mediatek/patches-5.10/140-dts-fix-wmac-support-for-mt7622-rfb1.patch
- create mode 100644 target/linux/mediatek/patches-5.10/150-dts-mt7623-eip97-inside-secure-support.patch
- create mode 100644 target/linux/mediatek/patches-5.10/200-phy-phy-mtk-tphy-Add-hifsys-support.patch
- create mode 100644 target/linux/mediatek/patches-5.10/300-mtd-mtk-ecc-move-mtk-ecc-header-file-to-include-mtd.patch
- create mode 100644 target/linux/mediatek/patches-5.10/310-mtd-spinand-disable-on-die-ECC.patch
- create mode 100644 target/linux/mediatek/patches-5.10/320-spi-spi-mem-MediaTek-Add-SPI-NAND-Flash-interface-dr.patch
- create mode 100644 target/linux/mediatek/patches-5.10/330-mtk-bmt-support.patch
- create mode 100644 target/linux/mediatek/patches-5.10/340-mtd-spinand-Add-support-for-the-Fidelix-FM35X1GA.patch
- create mode 100644 target/linux/mediatek/patches-5.10/350-mtd-parsers-trx-Allow-to-specify-trx-magic-in-DT.patch
- create mode 100644 target/linux/mediatek/patches-5.10/351-mtd-parsers-Remove-dependency-to-BRCM-architectures.patch
- create mode 100644 target/linux/mediatek/patches-5.10/360-mtd-rawnand-mtk-Fix-WAITRDY-break-condition-and-time.patch
- create mode 100644 target/linux/mediatek/patches-5.10/400-crypto-add-eip97-inside-secure-support.patch
- create mode 100644 target/linux/mediatek/patches-5.10/401-crypto-fix-eip97-cache-incoherent.patch
- create mode 100644 target/linux/mediatek/patches-5.10/410-bt-mtk-serial-fix.patch
- create mode 100644 target/linux/mediatek/patches-5.10/420-mtd-spi-nor-add-support-for-Winbond-W25Q512JV.patch
- create mode 100644 target/linux/mediatek/patches-5.10/500-gsw-rtl8367s-mt7622-support.patch
- create mode 100644 target/linux/mediatek/patches-5.10/600-dt-bindings-PCI-Mediatek-Update-PCIe-binding.patch
- create mode 100644 target/linux/mediatek/patches-5.10/601-PCI-mediatek-Use-regmap-to-get-shared-pcie-cfg-base.patch
- create mode 100644 target/linux/mediatek/patches-5.10/602-arm64-dts-mediatek-Split-PCIe-node-for-MT2712-MT7622.patch
- create mode 100644 target/linux/mediatek/patches-5.10/603-ARM-dts-mediatek-Update-mt7629-PCIe-node.patch
- create mode 100644 target/linux/mediatek/patches-5.10/610-pcie-mediatek-fix-clearing-interrupt-status.patch
- create mode 100644 target/linux/mediatek/patches-5.10/700-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch
- create mode 100644 target/linux/mediatek/patches-5.10/710-pci-pcie-mediatek-add-support-for-coherent-DMA.patch
- create mode 100644 target/linux/mediatek/patches-5.10/800-ubnt-ledbar-driver.patch
- create mode 100644 target/linux/mediatek/patches-5.10/900-dts-mt7622-bpi-r64-aliases-for-dtoverlay.patch
- delete mode 100644 target/linux/mediatek/patches-5.4/0227-arm-dts-Add-Unielec-U7623-DTS.patch
- create mode 100644 target/linux/mediatek/patches-5.4/0310-mtk-bmt-support.patch
- create mode 100644 target/linux/mediatek/patches-5.4/0350-mtd-parsers-trx-Allow-to-specify-trx-magic-in-DT.patch
- create mode 100644 target/linux/mediatek/patches-5.4/0351-mtd-parsers-Remove-dependency-to-BRCM-architectures.patch
-
-diff --git a/package/boot/mt7623n-preloader/Makefile b/package/boot/mt7623n-preloader/Makefile
-index 0faaf46d3f..f5b7d7309c 100644
---- a/package/boot/mt7623n-preloader/Makefile
-+++ b/package/boot/mt7623n-preloader/Makefile
-@@ -79,5 +79,5 @@ define Build/InstallDev
- 	gunzip -c $(PKG_BUILD_DIR)/mt7623n_bpir2-preloader.bin.gz > $(STAGING_DIR_IMAGE)/mt7623n_bpir2-preloader.bin
- endef
- 
--$(eval $(call BuildPackage,mt7623n-preloader))
--$(eval $(call BuildPackage,mt7622-preloader))
-+#$(eval $(call BuildPackage,mt7623n-preloader))
-+#$(eval $(call BuildPackage,mt7622-preloader))
-diff --git a/package/boot/uboot-mediatek/Makefile b/package/boot/uboot-mediatek/Makefile
-index c46b906cb5..a4be43ae28 100644
---- a/package/boot/uboot-mediatek/Makefile
-+++ b/package/boot/uboot-mediatek/Makefile
-@@ -50,4 +50,4 @@ define Build/InstallDev
- 	$(INSTALL_BIN) $(PKG_BUILD_DIR)/$(UBOOT_IMAGE) $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-$(UBOOT_IMAGE)
- endef
- 
--$(eval $(call BuildPackage/U-Boot))
-+#$(eval $(call BuildPackage/U-Boot))
-diff --git a/target/linux/mediatek/Makefile b/target/linux/mediatek/Makefile
-index c8ab5e01e6..0825b8c6ed 100644
---- a/target/linux/mediatek/Makefile
-+++ b/target/linux/mediatek/Makefile
-@@ -6,10 +6,10 @@ ARCH:=arm
- BOARD:=mediatek
- BOARDNAME:=MediaTek Ralink ARM
- SUBTARGETS:=mt7622 mt7623 mt7629
--FEATURES:=squashfs nand ramdisk fpu
-+FEATURES:=squashfs nand separate_ramdisk fpu dt-overlay
- 
- KERNEL_PATCHVER:=5.4
--KERNEL_TESTING_PATCHVER:=5.4
-+KERNEL_TESTING_PATCHVER:=5.10
- 
- include $(INCLUDE_DIR)/target.mk
- DEFAULT_PACKAGES += \
-diff --git a/target/linux/mediatek/dts/mt7622-buffalo-wsr-2533dhp2.dts b/target/linux/mediatek/dts/mt7622-buffalo-wsr-2533dhp2.dts
-new file mode 100644
-index 0000000000..ce5cd1c9be
---- /dev/null
-+++ b/target/linux/mediatek/dts/mt7622-buffalo-wsr-2533dhp2.dts
-@@ -0,0 +1,339 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+/dts-v1/;
-+#include <dt-bindings/input/input.h>
-+#include <dt-bindings/gpio/gpio.h>
-+
-+#include "mt7622.dtsi"
-+#include "mt6380.dtsi"
-+
-+/ {
-+	model = "Buffalo WSR-2533DHP2";
-+	compatible = "buffalo,wsr-2533dhp2", "mediatek,mt7622";
-+
-+	aliases {
-+		serial0 = &uart0;
-+		led-boot = &power_green;
-+		led-failsafe = &power_amber;
-+		led-running = &power_green;
-+		led-upgrade = &power_green;
-+	};
-+
-+	chosen {
-+		bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
-+	};
-+
-+	memory {
-+		reg = <0 0x40000000 0 0x0F000000>;
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		wireless_amber {
-+			label = "amber:wireless";
-+			gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		power_amber: power_amber {
-+			label = "amber:power";
-+			gpios = <&pio 3 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		power_green: power_green {
-+			label = "green:power";
-+			gpios = <&pio 4 GPIO_ACTIVE_LOW>;
-+			default-state = "on";
-+		};
-+
-+		wireless_green {
-+			label = "green:wireless";
-+			gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		internet {
-+			label = "green:internet";
-+			gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		router {
-+			label = "green:router";
-+			gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
-+
-+	keys {
-+		compatible = "gpio-keys";
-+		poll-interval = <100>;
-+
-+		reset {
-+			label = "reset";
-+			gpios = <&pio 0 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_RESTART>;
-+		};
-+
-+		/* GPIO 1 and 16 are a tri-state switch button with
-+		 * ROUTER / AP / WB.
-+		 */
-+		router {
-+			label = "router";
-+			gpios = <&pio 1 GPIO_ACTIVE_LOW>;
-+			linux,code = <BTN_0>;
-+			linux,input-type = <EV_SW>;
-+		};
-+
-+		bridge {
-+			label = "wb";
-+			gpios = <&pio 16 GPIO_ACTIVE_LOW>;
-+			linux,code = <BTN_1>;
-+			linux,input-type = <EV_SW>;
-+		};
-+
-+		/* GPIO 18 is a switch button with AUTO / MANUAL. */
-+		manual {
-+			label = "manual";
-+			gpios = <&pio 18 GPIO_ACTIVE_LOW>;
-+			linux,code = <BTN_2>;
-+			linux,input-type = <EV_SW>;
-+		};
-+
-+		wps {
-+			label = "wps";
-+			gpios = <&pio 102 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_WPS_BUTTON>;
-+		};
-+	};
-+
-+	rtkgsw: rtkgsw@0 {
-+		compatible = "mediatek,rtk-gsw";
-+		mediatek,ethsys = <&ethsys>;
-+		mediatek,mdio = <&mdio>;
-+		mediatek,reset-pin = <&pio 54 GPIO_ACTIVE_HIGH>;
-+	};
-+};
-+
-+&cpu0 {
-+	proc-supply = <&mt6380_vcpu_reg>;
-+	sram-supply = <&mt6380_vm_reg>;
-+};
-+
-+&cpu1 {
-+	proc-supply = <&mt6380_vcpu_reg>;
-+	sram-supply = <&mt6380_vm_reg>;
-+};
-+
-+&pcie0 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pcie0_pins>;
-+	status = "okay";
-+};
-+
-+&slot0 {
-+	status = "okay";
-+
-+	wifi@0,0 {
-+		compatible = "mediatek,mt76";
-+		reg = <0x0000 0 0 0 0>;
-+		mediatek,mtd-eeprom = <&factory 0x5000>;
-+		ieee80211-freq-limit = <5000000 6000000>;
-+	};
-+};
-+
-+&pio {
-+	eth_pins: eth-pins {
-+		mux {
-+			function = "eth";
-+			groups = "mdc_mdio", "rgmii_via_gmac2";
-+		};
-+	};
-+
-+	/* Parallel nand is shared pin with eMMC */
-+	parallel_nand_pins: parallel-nand-pins {
-+		mux {
-+			function = "flash";
-+			groups = "par_nand";
-+		};
-+
-+		conf-cmd-dat {
-+			pins = "NCEB", "NWEB", "NREB",
-+				  "NDL4", "NDL5", "NDL6",
-+				  "NDL7", "NRB", "NCLE",
-+				  "NALE", "NDL0", "NDL1",
-+				  "NDL2", "NDL3";
-+			input-enable;
-+			drive-strength = <8>;
-+			bias-pull-up;
-+		};
-+	};
-+
-+	pcie0_pins: pcie0-pins {
-+		mux {
-+			function = "pcie";
-+			groups = "pcie0_pad_perst",
-+				 "pcie0_1_waken",
-+				 "pcie0_1_clkreq";
-+		};
-+	};
-+
-+	pmic_bus_pins: pmic-bus-pins {
-+		mux {
-+			function = "pmic";
-+			groups = "pmic_bus";
-+		};
-+	};
-+
-+	pwm7_pins: pwm1-2-pins {
-+		mux {
-+			function = "pwm";
-+			groups = "pwm_ch7_2";
-+		};
-+	};
-+
-+	uart0_pins: uart0-pins {
-+		mux {
-+			function = "uart";
-+			groups = "uart0_0_tx_rx" ;
-+		};
-+	};
-+
-+	watchdog_pins: watchdog-pins {
-+		mux {
-+			function = "watchdog";
-+			groups = "watchdog";
-+		};
-+	};
-+};
-+
-+&bch {
-+	status = "okay";
-+};
-+
-+&eth {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&eth_pins>;
-+	status = "okay";
-+
-+	gmac0: mac@0 {
-+		compatible = "mediatek,eth-mac";
-+		reg = <0>;
-+
-+		phy-connection-type = "2500base-x";
-+
-+		mtd-mac-address = <&factory 0x4>;
-+		mtd-mac-address-increment = <(-1)>;
-+
-+		fixed-link {
-+			speed = <2500>;
-+			full-duplex;
-+			pause;
-+		};
-+	};
-+
-+	mdio: mdio-bus {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+	};
-+};
-+
-+&nandc {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&parallel_nand_pins>;
-+	status = "okay";
-+
-+	nand@0 {
-+		reg = <0>;
-+		nand-ecc-mode = "hw";
-+
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			partition@0 {
-+				label = "Preloader";
-+				reg = <0x0 0x80000>;
-+				read-only;
-+			};
-+
-+			partition@80000 {
-+				label = "ATF";
-+				reg = <0x80000 0x40000>;
-+				read-only;
-+			};
-+
-+			partition@c0000 {
-+				label = "Bootloader";
-+				reg = <0xc0000 0x80000>;
-+				read-only;
-+			};
-+
-+			partition@140000 {
-+				label = "Config";
-+				reg = <0x140000 0x80000>;
-+			};
-+
-+			factory: partition@1c0000 {
-+				label = "factory";
-+				reg = <0x1c0000 0x40000>;
-+				read-only;
-+			};
-+
-+			partition@200000 {
-+				compatible = "brcm,trx";
-+				trx-magic = <0x32504844>;
-+				label = "firmware";
-+				reg = <0x200000 0x3a00000>;
-+			};
-+
-+			partition@3C00000 {
-+				label = "Kernel2";
-+				reg = <0x3c00000 0x3a00000>;
-+			};
-+
-+			partition@7600000 {
-+				label = "glbcfg";
-+				reg = <0x7600000 0x200000>;
-+				read-only;
-+			};
-+
-+			partition@7800000 {
-+				label = "board_data";
-+				reg = <0x7800000 0x200000>;
-+				read-only;
-+			};
-+		};
-+	};
-+};
-+
-+&pwm {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pwm7_pins>;
-+	status = "okay";
-+};
-+
-+&pwrap {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pmic_bus_pins>;
-+	status = "okay";
-+};
-+
-+&uart0 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&uart0_pins>;
-+	status = "okay";
-+};
-+
-+&watchdog {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&watchdog_pins>;
-+	status = "okay";
-+};
-+
-+&wmac {
-+	status = "okay";
-+
-+	mediatek,mtd-eeprom = <&factory 0x0>;
-+};
-+
-+&rtc {
-+	status = "disabled";
-+};
-diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-elecom-wrc-2533gent.dts b/target/linux/mediatek/dts/mt7622-elecom-wrc-2533gent.dts
-similarity index 99%
-rename from target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-elecom-wrc-2533gent.dts
-rename to target/linux/mediatek/dts/mt7622-elecom-wrc-2533gent.dts
-index 2ac1c6a671..2f3e5b1fb0 100644
---- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-elecom-wrc-2533gent.dts
-+++ b/target/linux/mediatek/dts/mt7622-elecom-wrc-2533gent.dts
-@@ -1,9 +1,8 @@
-+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
- /*
-  * Copyright (c) 2017 MediaTek Inc.
-  * Author: Ming Huang <ming.huang@mediatek.com>
-  *	   Sean Wang <sean.wang@mediatek.com>
-- *
-- * SPDX-License-Identifier: (GPL-2.0-only OR MIT)
-  */
- 
- /dts-v1/;
-diff --git a/target/linux/mediatek/dts/mt7622-linksys-e8450-ubi.dts b/target/linux/mediatek/dts/mt7622-linksys-e8450-ubi.dts
-new file mode 100644
-index 0000000000..d6cadd320c
---- /dev/null
-+++ b/target/linux/mediatek/dts/mt7622-linksys-e8450-ubi.dts
-@@ -0,0 +1,61 @@
-+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
-+
-+/dts-v1/;
-+#include "mt7622-linksys-e8450.dtsi"
-+
-+/ {
-+	model = "Linksys E8450 (UBI)";
-+	compatible = "linksys,e8450-ubi", "mediatek,mt7622";
-+
-+	aliases {
-+		label-mac-device = &wan;
-+	};
-+};
-+
-+&snand {
-+	partitions {
-+		compatible = "fixed-partitions";
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+
-+		partition@0 {
-+			label = "bl2";
-+			reg = <0x0 0x80000>;
-+			read-only;
-+		};
-+
-+		partition@80000 {
-+			label = "fip";
-+			reg = <0x80000 0x140000>;
-+			read-only;
-+		};
-+
-+		factory: partition@1c0000 {
-+			label = "factory";
-+			reg = <0x1c0000 0x100000>;
-+			read-only;
-+		};
-+
-+		partition@300000 {
-+			label = "ubi";
-+			reg = <0x300000 0x7d00000>;
-+		};
-+	};
-+};
-+
-+&wmac {
-+	mediatek,mtd-eeprom = <&factory 0x0>;
-+	status = "okay";
-+};
-+
-+&wmac1 {
-+	mediatek,mtd-eeprom = <&factory 0x5000>;
-+};
-+
-+&gmac0 {
-+	mtd-mac-address = <&factory 0x7fff4>;
-+};
-+
-+&wan {
-+	mtd-mac-address = <&factory 0x7fffa>;
-+};
-diff --git a/target/linux/mediatek/dts/mt7622-linksys-e8450.dts b/target/linux/mediatek/dts/mt7622-linksys-e8450.dts
-new file mode 100644
-index 0000000000..b30b5d2455
---- /dev/null
-+++ b/target/linux/mediatek/dts/mt7622-linksys-e8450.dts
-@@ -0,0 +1,106 @@
-+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
-+
-+/dts-v1/;
-+#include "mt7622-linksys-e8450.dtsi"
-+
-+/ {
-+	model = "Linksys E8450";
-+	compatible = "linksys,e8450", "mediatek,mt7622";
-+
-+	aliases {
-+		label-mac-device = &wan;
-+	};
-+};
-+
-+&snand {
-+	mediatek,bmt-v2;
-+	mediatek,bmt-table-size = <0x1000>;
-+
-+	partitions {
-+		compatible = "fixed-partitions";
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+
-+		partition@0 {
-+			label = "Preloader";
-+			reg = <0x00000 0x0080000>;
-+			read-only;
-+		};
-+
-+		partition@80000 {
-+			label = "ATF";
-+			reg = <0x80000 0x0040000>;
-+		};
-+
-+		partition@c0000 {
-+			label = "u-boot";
-+			reg = <0xc0000 0x0080000>;
-+		};
-+
-+		partition@140000 {
-+			label = "u-boot-env";
-+			reg = <0x140000 0x0080000>;
-+		};
-+
-+		factory: partition@1c0000 {
-+			label = "factory";
-+			reg = <0x1c0000 0x0100000>;
-+		};
-+
-+		partition@300000 {
-+			label = "devinfo";
-+			reg = <0x300000 0x020000>;
-+		};
-+
-+		partition@320000 {
-+			label = "senv";
-+			reg = <0x320000 0x020000>;
-+		};
-+
-+		partition@360000 {
-+			label = "bootseq";
-+			reg = <0x360000 0x020000>;
-+		};
-+
-+		partition@500000 {
-+			label = "firmware1";
-+			compatible = "denx,fit";
-+			openwrt,cmdline-match = "mtdparts=master";
-+			reg = <0x500000 0x1E00000>;
-+		};
-+
-+		partition@2300000 {
-+			label = "firmware2";
-+			compatible = "denx,fit";
-+			openwrt,cmdline-match = "mtdparts=slave";
-+			reg = <0x2300000 0x1E00000>;
-+		};
-+
-+		partition@4100000 {
-+			label = "data";
-+			reg = <0x4100000 0x1900000>;
-+		};
-+
-+		partition@5100000 {
-+			label = "mfg";
-+			reg = <0x5a00000 0x1400000>;
-+		};
-+	};
-+};
-+
-+&wmac {
-+	mediatek,mtd-eeprom = <&factory 0x0000>;
-+	status = "okay";
-+};
-+
-+&wmac1 {
-+	mediatek,mtd-eeprom = <&factory 0x05000>;
-+};
-+
-+&gmac0 {
-+	mtd-mac-address = <&factory 0x7fff4>;
-+};
-+
-+&wan {
-+	mtd-mac-address = <&factory 0x7fffa>;
-+};
-diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64-rootdisk.dts b/target/linux/mediatek/dts/mt7622-linksys-e8450.dtsi
-similarity index 50%
-rename from target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64-rootdisk.dts
-rename to target/linux/mediatek/dts/mt7622-linksys-e8450.dtsi
-index 36d908652d..9bcaf4e9d7 100644
---- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64-rootdisk.dts
-+++ b/target/linux/mediatek/dts/mt7622-linksys-e8450.dtsi
-@@ -1,9 +1,4 @@
--/*
-- * Copyright (c) 2018 MediaTek Inc.
-- * Author: Ryder Lee <ryder.lee@mediatek.com>
-- *
-- * SPDX-License-Identifier: (GPL-2.0-only OR MIT)
-- */
-+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
- 
- /dts-v1/;
- #include <dt-bindings/input/input.h>
-@@ -13,16 +8,19 @@
- #include "mt6380.dtsi"
- 
- / {
--	model = "Bananapi BPI-R64";
--	compatible = "bananapi,bpi-r64-rootdisk", "mediatek,mt7622";
-+	compatible = "linksys,e8450", "mediatek,mt7622";
- 
- 	aliases {
- 		serial0 = &uart0;
-+		led-boot = &led_power;
-+		led-failsafe = &led_power;
-+		led-running = &led_power;
-+		led-upgrade = &led_power;
- 	};
- 
- 	chosen {
- 		stdout-path = "serial0:115200n8";
--		bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512 root=/dev/mmcblk0p7 rootfstype=squashfs,f2fs";
-+		bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
- 	};
- 
- 	cpus {
-@@ -41,29 +39,43 @@
- 		compatible = "gpio-keys";
- 
- 		factory {
--			label = "factory";
--			linux,code = <BTN_0>;
--			gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
-+			label = "reset";
-+			linux,code = <KEY_RESTART>;
-+			gpios = <&pio 0 GPIO_ACTIVE_LOW>;
- 		};
- 
- 		wps {
- 			label = "wps";
- 			linux,code = <KEY_WPS_BUTTON>;
--			gpios = <&pio 102 GPIO_ACTIVE_HIGH>;
-+			gpios = <&pio 102 GPIO_ACTIVE_LOW>;
- 		};
- 	};
- 
--	leds {
-+	gpio-leds {
- 		compatible = "gpio-leds";
- 
--		green {
--			label = "bpi-r64:pio:green";
--			gpios = <&pio 89 GPIO_ACTIVE_HIGH>;
-+		led_power: power_blue {
-+			label = "power:blue";
-+			gpios = <&pio 95 GPIO_ACTIVE_LOW>;
-+			default-state = "on";
- 		};
- 
--		red {
--			label = "bpi-r64:pio:red";
--			gpios = <&pio 88 GPIO_ACTIVE_HIGH>;
-+		power_orange {
-+			label = "power:orange";
-+			gpios = <&pio 96 GPIO_ACTIVE_LOW>;
-+			default-state = "off";
-+		};
-+
-+		inet_blue {
-+			label = "inet:blue";
-+			gpios = <&pio 97 GPIO_ACTIVE_LOW>;
-+			default-state = "off";
-+		};
-+
-+		inet_orange {
-+			label = "inet:orange";
-+			gpios = <&pio 98 GPIO_ACTIVE_LOW>;
-+			default-state = "off";
- 		};
- 	};
- 
-@@ -71,6 +83,14 @@
- 		reg = <0 0x40000000 0 0x40000000>;
- 	};
- 
-+	reserved-memory {
-+		ramoops@0x4ff00000 {
-+			compatible = "ramoops";
-+			reg = <0 0x4ff00000 0 0x10000>;
-+			record-size = <0x1000>;
-+		};
-+	};
-+
- 	reg_1p8v: regulator-1p8v {
- 		compatible = "regulator-fixed";
- 		regulator-name = "fixed-1.8V";
-@@ -99,7 +119,7 @@
- };
- 
- &bch {
--	status = "disabled";
-+	status = "okay";
- };
- 
- &btif {
-@@ -113,7 +133,10 @@
- };
- 
- &eth {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&eth_pins>;
- 	status = "okay";
-+
- 	gmac0: mac@0 {
- 		compatible = "mediatek,eth-mac";
- 		reg = <0>;
-@@ -126,54 +149,42 @@
- 		};
- 	};
- 
--	gmac1: mac@1 {
--		compatible = "mediatek,eth-mac";
--		reg = <1>;
--		phy-mode = "rgmii";
--
--		fixed-link {
--			speed = <1000>;
--			full-duplex;
--			pause;
--		};
--	};
--
--	mdio: mdio-bus {
-+	mdio-bus {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
- 
--		switch@1f {
-+		switch@0 {
- 			compatible = "mediatek,mt7531";
--			reg = <0x1f>;
-+			reg = <0>;
- 			reset-gpios = <&pio 54 0>;
- 
- 			ports {
- 				#address-cells = <1>;
- 				#size-cells = <0>;
- 
--				wan: port@0 {
-+				port@0 {
- 					reg = <0>;
--					label = "wan";
-+					label = "lan1";
- 				};
- 
- 				port@1 {
- 					reg = <1>;
--					label = "lan0";
-+					label = "lan2";
- 				};
- 
- 				port@2 {
- 					reg = <2>;
--					label = "lan1";
-+					label = "lan3";
- 				};
- 
- 				port@3 {
- 					reg = <3>;
--					label = "lan2";
-+					label = "lan4";
- 				};
- 
--				port@4 {
-+				wan: port@4 {
- 					reg = <4>;
--					label = "lan3";
-+					label = "wan";
- 				};
- 
- 				port@6 {
-@@ -194,67 +205,6 @@
- 	};
- };
- 
--&i2c1 {
--	pinctrl-names = "default";
--	pinctrl-0 = <&i2c1_pins>;
--	status = "okay";
--};
--
--&i2c2 {
--	pinctrl-names = "default";
--	pinctrl-0 = <&i2c2_pins>;
--	status = "okay";
--};
--
--&mmc0 {
--	pinctrl-names = "default", "state_uhs";
--	pinctrl-0 = <&emmc_pins_default>;
--	pinctrl-1 = <&emmc_pins_uhs>;
--	status = "okay";
--	bus-width = <8>;
--	max-frequency = <50000000>;
--	cap-mmc-highspeed;
--	mmc-hs200-1_8v;
--	vmmc-supply = <&reg_3p3v>;
--	vqmmc-supply = <&reg_1p8v>;
--	assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>;
--	assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
--	non-removable;
--};
--
--&mmc1 {
--	pinctrl-names = "default", "state_uhs";
--	pinctrl-0 = <&sd0_pins_default>;
--	pinctrl-1 = <&sd0_pins_uhs>;
--	status = "okay";
--	bus-width = <4>;
--	max-frequency = <50000000>;
--	cap-sd-highspeed;
--	r_smpl = <1>;
--	cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>;
--	vmmc-supply = <&reg_3p3v>;
--	vqmmc-supply = <&reg_3p3v>;
--	assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
--	assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
--};
--
--&nandc {
--	pinctrl-names = "default";
--	pinctrl-0 = <&parallel_nand_pins>;
--	status = "disabled";
--};
--
--&nor_flash {
--	pinctrl-names = "default";
--	pinctrl-0 = <&spi_nor_pins>;
--	status = "disabled";
--
--	flash@0 {
--		compatible = "jedec,spi-nor";
--		reg = <0>;
--	};
--};
--
- &pcie0 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&pcie0_pins>;
-@@ -268,62 +218,6 @@
- };
- 
- &pio {
--	/* Attention: GPIO 90 is used to switch between PCIe@1,0 and
--	 * SATA functions. i.e. output-high: PCIe, output-low: SATA
--	 */
--	asm_sel {
--		gpio-hog;
--		gpios = <90 GPIO_ACTIVE_HIGH>;
--		output-high;
--	};
--
--	/* eMMC is shared pin with parallel NAND */
--	emmc_pins_default: emmc-pins-default {
--		mux {
--			function = "emmc", "emmc_rst";
--			groups = "emmc";
--		};
--
--		/* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",
--		 * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4,
--		 * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
--		 */
--		conf-cmd-dat {
--			pins = "NDL0", "NDL1", "NDL2",
--			       "NDL3", "NDL4", "NDL5",
--			       "NDL6", "NDL7", "NRB";
--			input-enable;
--			bias-pull-up;
--		};
--
--		conf-clk {
--			pins = "NCLE";
--			bias-pull-down;
--		};
--	};
--
--	emmc_pins_uhs: emmc-pins-uhs {
--		mux {
--			function = "emmc";
--			groups = "emmc";
--		};
--
--		conf-cmd-dat {
--			pins = "NDL0", "NDL1", "NDL2",
--			       "NDL3", "NDL4", "NDL5",
--			       "NDL6", "NDL7", "NRB";
--			input-enable;
--			drive-strength = <4>;
--			bias-pull-up;
--		};
--
--		conf-clk {
--			pins = "NCLE";
--			drive-strength = <4>;
--			bias-pull-down;
--		};
--	};
--
- 	eth_pins: eth-pins {
- 		mux {
- 			function = "eth";
-@@ -331,36 +225,6 @@
- 		};
- 	};
- 
--	i2c1_pins: i2c1-pins {
--		mux {
--			function = "i2c";
--			groups =  "i2c1_0";
--		};
--	};
--
--	i2c2_pins: i2c2-pins {
--		mux {
--			function = "i2c";
--			groups =  "i2c2_0";
--		};
--	};
--
--	i2s1_pins: i2s1-pins {
--		mux {
--			function = "i2s";
--			groups =  "i2s_out_mclk_bclk_ws",
--				  "i2s1_in_data",
--				  "i2s1_out_data";
--		};
--
--		conf {
--			pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK",
--			       "I2S_WS", "I2S_MCLK";
--			drive-strength = <12>;
--			bias-pull-down;
--		};
--	};
--
- 	irrx_pins: irrx-pins {
- 		mux {
- 			function = "ir";
-@@ -375,14 +239,6 @@
- 		};
- 	};
- 
--	/* Parallel nand is shared pin with eMMC */
--	parallel_nand_pins: parallel-nand-pins {
--		mux {
--			function = "flash";
--			groups = "par_nand";
--		};
--	};
--
- 	pcie0_pins: pcie0-pins {
- 		mux {
- 			function = "pcie";
-@@ -422,53 +278,6 @@
- 		};
- 	};
- 
--	sd0_pins_default: sd0-pins-default {
--		mux {
--			function = "sd";
--			groups = "sd_0";
--		};
--
--		/* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN",
--		 *  "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1,
--		 *  DAT2, DAT3, CMD, CLK for SD respectively.
--		 */
--		conf-cmd-data {
--			pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
--			       "I2S2_IN","I2S4_OUT";
--			input-enable;
--			drive-strength = <8>;
--			bias-pull-up;
--		};
--		conf-clk {
--			pins = "I2S3_OUT";
--			drive-strength = <12>;
--			bias-pull-down;
--		};
--		conf-cd {
--			pins = "TXD3";
--			bias-pull-up;
--		};
--	};
--
--	sd0_pins_uhs: sd0-pins-uhs {
--		mux {
--			function = "sd";
--			groups = "sd_0";
--		};
--
--		conf-cmd-data {
--			pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
--			       "I2S2_IN","I2S4_OUT";
--			input-enable;
--			bias-pull-up;
--		};
--
--		conf-clk {
--			pins = "I2S3_OUT";
--			bias-pull-down;
--		};
--	};
--
- 	/* Serial NAND is shared pin with SPI-NOR */
- 	serial_nand_pins: serial-nand-pins {
- 		mux {
-@@ -491,22 +300,6 @@
- 		};
- 	};
- 
--	/* SPI-NOR is shared pin with serial NAND */
--	spi_nor_pins: spi-nor-pins {
--		mux {
--			function = "flash";
--			groups = "spi_nor";
--		};
--	};
--
--	/* serial NAND is shared pin with SPI-NOR */
--	serial_nand_pins: serial-nand-pins {
--		mux {
--			function = "flash";
--			groups = "snfi";
--		};
--	};
--
- 	uart0_pins: uart0-pins {
- 		mux {
- 			function = "uart";
-@@ -543,11 +336,32 @@
- };
- 
- &sata {
--	status = "disable";
-+	status = "disabled";
- };
- 
- &sata_phy {
--	status = "disable";
-+	status = "disabled";
-+};
-+
-+&slot0 {
-+	wmac1: mt7915@0,0 {
-+		reg = <0x0000 0 0 0 0>;
-+		ieee80211-freq-limit = <5000000 6000000>;
-+	};
-+};
-+
-+&snfi {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&serial_nand_pins>;
-+	status = "okay";
-+
-+	snand: spi_nand@0 {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		compatible = "spi-nand";
-+		spi-max-frequency = <104000000>;
-+		reg = <0>;
-+	};
- };
- 
- &spi0 {
-@@ -584,6 +398,10 @@
- 	status = "okay";
- };
- 
-+&rtc {
-+	status = "disabled";
-+};
-+
- &watchdog {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&watchdog_pins>;
-diff --git a/target/linux/mediatek/dts/mt7622-rfb1-ubi.dts b/target/linux/mediatek/dts/mt7622-rfb1-ubi.dts
-new file mode 100644
-index 0000000000..a54e710924
---- /dev/null
-+++ b/target/linux/mediatek/dts/mt7622-rfb1-ubi.dts
-@@ -0,0 +1,68 @@
-+/dts-v1/;
-+
-+#include "mt7622-rfb1.dts"
-+/ {
-+	model = "MT7622_MT7531 RFB (UBI)";
-+	compatible = "mediatek,mt7622,ubi";
-+};
-+
-+&snfi {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&serial_nand_pins>;
-+	status = "okay";
-+
-+	spi_nand@0 {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		compatible = "spi-nand";
-+		spi-max-frequency = <104000000>;
-+		reg = <0>;
-+
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			partition@0 {
-+				label = "Preloader";
-+				reg = <0x00000 0x0080000>;
-+				read-only;
-+			};
-+
-+			partition@80000 {
-+				label = "ATF";
-+				reg = <0x80000 0x0040000>;
-+			};
-+
-+			partition@c0000 {
-+				label = "Bootloader";
-+				reg = <0xc0000 0x0080000>;
-+			};
-+
-+			partition@140000 {
-+				label = "Config";
-+				reg = <0x140000 0x0080000>;
-+			};
-+
-+			factory: partition@1c0000 {
-+				label = "Factory";
-+				reg = <0x1c0000 0x0040000>;
-+			};
-+
-+			partition@200000 {
-+				label = "kernel";
-+				reg = <0x200000 0x400000>;
-+			};
-+
-+			partition@600000 {
-+				label = "ubi";
-+				reg = <0x600000 0x1C00000>;
-+			};
-+
-+			partition@2200000 {
-+				label = "User_data";
-+				reg = <0x2200000 0x4000000>;
-+			};
-+		};
-+	};
-+};
-diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-ubnt-unifi-6-lr.dts b/target/linux/mediatek/dts/mt7622-ubnt-unifi-6-lr.dts
-similarity index 100%
-rename from target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-ubnt-unifi-6-lr.dts
-rename to target/linux/mediatek/dts/mt7622-ubnt-unifi-6-lr.dts
-diff --git a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc-512m.dts b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc-512m.dts
-new file mode 100644
-index 0000000000..822ca3fd49
---- /dev/null
-+++ b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc-512m.dts
-@@ -0,0 +1,17 @@
-+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
-+/*
-+ * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
-+ */
-+
-+/dts-v1/;
-+#include "mt7623a-unielec-u7623-02-emmc.dtsi"
-+
-+/ {
-+	model = "UniElec U7623-02 eMMC (512M RAM)";
-+	compatible = "unielec,u7623-02-emmc-512m", "unielec,u7623-02-emmc", "mediatek,mt7623";
-+
-+	memory@80000000 {
-+		device_type = "memory";
-+		reg = <0 0x80000000 0 0x20000000>;
-+	};
-+};
-diff --git a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi
-new file mode 100644
-index 0000000000..aa1e82b58a
---- /dev/null
-+++ b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi
-@@ -0,0 +1,339 @@
-+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
-+/*
-+ * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
-+ */
-+
-+#include <dt-bindings/input/input.h>
-+#include "mt7623.dtsi"
-+#include "mt6323.dtsi"
-+
-+/ {
-+	compatible = "unielec,u7623-02-emmc", "mediatek,mt7623";
-+
-+	aliases {
-+		serial2 = &uart2;
-+	};
-+
-+	chosen {
-+		bootargs = "root=/dev/mmcblk0p2 rootfstype=squashfs,f2fs console=ttyS0,115200 blkdevparts=mmcblk0:3M@6M(recovery),256M@9M(root)";
-+		stdout-path = "serial2:115200n8";
-+	};
-+
-+	cpus {
-+		cpu@0 {
-+			proc-supply = <&mt6323_vproc_reg>;
-+		};
-+
-+		cpu@1 {
-+			proc-supply = <&mt6323_vproc_reg>;
-+		};
-+
-+		cpu@2 {
-+			proc-supply = <&mt6323_vproc_reg>;
-+		};
-+
-+		cpu@3 {
-+			proc-supply = <&mt6323_vproc_reg>;
-+		};
-+	};
-+
-+	reg_1p8v: regulator-1p8v {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-1.8V";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <1800000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+
-+	reg_3p3v: regulator-3p3v {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-3.3V";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+
-+	reg_5v: regulator-5v {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-5V";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+
-+	gpio-keys {
-+		compatible = "gpio-keys";
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&key_pins_a>;
-+
-+		factory {
-+			label = "factory";
-+			linux,code = <KEY_RESTART>;
-+			gpios = <&pio 256 GPIO_ACTIVE_LOW>;
-+		};
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&led_pins_unielec>;
-+
-+		led3 {
-+			label = "u7623-01:green:led3";
-+			gpios = <&pio 14 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		led4 {
-+			label = "u7623-01:green:led4";
-+			gpios = <&pio 15 GPIO_ACTIVE_LOW>;
-+		};
-+	};
-+};
-+
-+&crypto {
-+	status = "okay";
-+};
-+
-+&eth {
-+	status = "okay";
-+
-+	gmac0: mac@0 {
-+		compatible = "mediatek,eth-mac";
-+		reg = <0>;
-+		phy-mode = "trgmii";
-+
-+		fixed-link {
-+			speed = <1000>;
-+			full-duplex;
-+			pause;
-+		};
-+	};
-+
-+	mdio: mdio-bus {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		mt7530: switch@0 {
-+			compatible = "mediatek,mt7530";
-+		};
-+	};
-+};
-+
-+&mt7530 {
-+	compatible = "mediatek,mt7530";
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+	reg = <0>;
-+	pinctrl-names = "default";
-+	mediatek,mcm;
-+	resets = <&ethsys 2>;
-+	reset-names = "mcm";
-+	core-supply = <&mt6323_vpa_reg>;
-+	io-supply = <&mt6323_vemc3v3_reg>;
-+
-+	dsa,mii-bus = <&mdio>;
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0>;
-+
-+		port@0 {
-+			reg = <0>;
-+			label = "lan0";
-+			cpu = <&cpu_port0>;
-+		};
-+
-+		port@1 {
-+			reg = <1>;
-+			label = "lan1";
-+			cpu = <&cpu_port0>;
-+		};
-+
-+		port@2 {
-+			reg = <2>;
-+			label = "lan2";
-+			cpu = <&cpu_port0>;
-+		};
-+
-+		port@3 {
-+			reg = <3>;
-+			label = "lan3";
-+			cpu = <&cpu_port0>;
-+		};
-+
-+		port@4 {
-+			reg = <4>;
-+			label = "wan";
-+			cpu = <&cpu_port0>;
-+		};
-+
-+		cpu_port0: port@6 {
-+			reg = <6>;
-+			label = "cpu";
-+			ethernet = <&gmac0>;
-+			phy-mode = "trgmii";
-+
-+			fixed-link {
-+				speed = <1000>;
-+				full-duplex;
-+			};
-+		};
-+	};
-+};
-+
-+&mmc0 {
-+	pinctrl-names = "default", "state_uhs";
-+	pinctrl-0 = <&mmc0_pins_default>;
-+	pinctrl-1 = <&mmc0_pins_uhs>;
-+	status = "okay";
-+	bus-width = <8>;
-+	max-frequency = <50000000>;
-+	cap-mmc-highspeed;
-+	vmmc-supply = <&reg_3p3v>;
-+	vqmmc-supply = <&reg_1p8v>;
-+	non-removable;
-+};
-+
-+&pio {
-+	key_pins_a: keys-alt {
-+		pins-keys {
-+			pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
-+				 <MT7623_PIN_257_GPIO257_FUNC_GPIO257>;
-+			input-enable;
-+		};
-+	};
-+
-+	led_pins_unielec: leds-unielec {
-+		pins-leds {
-+			pinmux = <MT7623_PIN_14_GPIO14_FUNC_GPIO14>,
-+				 <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
-+		};
-+	};
-+
-+	mmc0_pins_default: mmc0default {
-+		pins_cmd_dat {
-+			pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
-+				 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
-+				 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
-+				 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
-+				 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
-+				 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
-+				 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
-+				 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
-+				 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
-+			input-enable;
-+			bias-pull-up;
-+		};
-+
-+		pins_clk {
-+			pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
-+			bias-pull-down;
-+		};
-+
-+		pins_rst {
-+			pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
-+			bias-pull-up;
-+		};
-+	};
-+
-+	mmc0_pins_uhs: mmc0 {
-+		pins_cmd_dat {
-+			pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
-+				 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
-+				 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
-+				 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
-+				 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
-+				 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
-+				 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
-+				 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
-+				 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
-+			input-enable;
-+			drive-strength = <MTK_DRIVE_2mA>;
-+			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
-+		};
-+
-+		pins_clk {
-+			pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
-+			drive-strength = <MTK_DRIVE_2mA>;
-+			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
-+		};
-+
-+		pins_rst {
-+			pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
-+			bias-pull-up;
-+		};
-+	};
-+
-+	pcie_default: pcie_pin_default {
-+		pins_cmd_dat {
-+			pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
-+				 <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
-+			bias-disable;
-+		};
-+	};
-+};
-+
-+&pwm {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pwm_pins_a>;
-+	status = "okay";
-+};
-+
-+&pwrap {
-+	mt6323 {
-+		mt6323led: led {
-+			compatible = "mediatek,mt6323-led";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+
-+			led@0 {
-+				reg = <0>;
-+				label = "led0";
-+			};
-+		};
-+	};
-+};
-+
-+&uart2 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&uart2_pins_b>;
-+	status = "okay";
-+};
-+
-+&usb1 {
-+	vusb33-supply = <&reg_3p3v>;
-+	vbus-supply = <&reg_3p3v>;
-+	status = "okay";
-+};
-+
-+&u3phy1 {
-+	status = "okay";
-+};
-+
-+&u3phy2 {
-+	status = "okay";
-+	mediatek,phy-switch = <&hifsys>;
-+};
-+
-+&pcie {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pcie_default>;
-+	status = "okay";
-+
-+	pcie@1,0 {
-+		status = "okay";
-+	};
-+
-+	pcie@2,0 {
-+		status = "okay";
-+	};
-+};
-+
-+&pcie1_phy {
-+	status = "okay";
-+};
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/Kconfig b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/Kconfig
-new file mode 100644
-index 0000000000..d9e0230cf0
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/Kconfig
-@@ -0,0 +1,3 @@
-+
-+config MT753X_GSW
-+	tristate "Driver for the MediaTek MT753x switch"
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/Makefile b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/Makefile
-new file mode 100644
-index 0000000000..7aae451cd1
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/Makefile
-@@ -0,0 +1,11 @@
-+#
-+# Makefile for MediaTek MT753x gigabit switch
-+#
-+
-+obj-$(CONFIG_MT753X_GSW)	+= mt753x.o
-+
-+mt753x-$(CONFIG_SWCONFIG)	+= mt753x_swconfig.o
-+
-+mt753x-y			+= mt753x_mdio.o mt7530.o mt7531.o \
-+					mt753x_common.o mt753x_vlan.o \
-+					mt753x_nl.o
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt7530.c b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt7530.c
-new file mode 100644
-index 0000000000..6a94d0d2f4
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt7530.c
-@@ -0,0 +1,631 @@
-+// SPDX-License-Identifier: GPL-2.0-only
-+/*
-+ * Copyright (c) 2018 MediaTek Inc.
-+ * Author: Weijie Gao <weijie.gao@mediatek.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/delay.h>
-+
-+#include "mt753x.h"
-+#include "mt753x_regs.h"
-+
-+/* MT7530 registers */
-+
-+/* Unique fields of PMCR for MT7530 */
-+#define FORCE_MODE			BIT(15)
-+
-+/* Unique fields of GMACCR for MT7530 */
-+#define VLAN_SUPT_NO_S			14
-+#define VLAN_SUPT_NO_M			0x1c000
-+#define LATE_COL_DROP			BIT(13)
-+
-+/* Unique fields of (M)HWSTRAP for MT7530 */
-+#define BOND_OPTION			BIT(24)
-+#define P5_PHY0_SEL			BIT(20)
-+#define CHG_TRAP			BIT(16)
-+#define LOOPDET_DIS			BIT(14)
-+#define P5_INTF_SEL_GMAC5		BIT(13)
-+#define SMI_ADDR_S			11
-+#define SMI_ADDR_M			0x1800
-+#define XTAL_FSEL_S			9
-+#define XTAL_FSEL_M			0x600
-+#define P6_INTF_DIS			BIT(8)
-+#define P5_INTF_MODE_RGMII		BIT(7)
-+#define P5_INTF_DIS_S			BIT(6)
-+#define C_MDIO_BPS_S			BIT(5)
-+#define EEPROM_EN_S			BIT(4)
-+
-+/* PHY EEE Register bitmap of define */
-+#define PHY_DEV07			0x07
-+#define PHY_DEV07_REG_03C		0x3c
-+
-+/* PHY Extend Register 0x14 bitmap of define */
-+#define PHY_EXT_REG_14			0x14
-+
-+/* Fields of PHY_EXT_REG_14 */
-+#define PHY_EN_DOWN_SHFIT		BIT(4)
-+
-+/* PHY Token Ring Register 0x10 bitmap of define */
-+#define PHY_TR_REG_10			0x10
-+
-+/* PHY Token Ring Register 0x12 bitmap of define */
-+#define PHY_TR_REG_12			0x12
-+
-+/* PHY LPI PCS/DSP Control Register bitmap of define */
-+#define PHY_LPI_REG_11			0x11
-+
-+/* PHY DEV 0x1e Register bitmap of define */
-+#define PHY_DEV1E			0x1e
-+#define PHY_DEV1E_REG_123		0x123
-+#define PHY_DEV1E_REG_A6		0xa6
-+
-+/* Values of XTAL_FSEL */
-+#define XTAL_20MHZ			1
-+#define XTAL_40MHZ			2
-+#define XTAL_25MHZ			3
-+
-+#define P6ECR				0x7830
-+#define P6_INTF_MODE_TRGMII		BIT(0)
-+
-+#define TRGMII_TXCTRL			0x7a40
-+#define TRAIN_TXEN			BIT(31)
-+#define TXC_INV				BIT(30)
-+#define TX_DOEO				BIT(29)
-+#define TX_RST				BIT(28)
-+
-+#define TRGMII_TD0_CTRL			0x7a50
-+#define TRGMII_TD1_CTRL			0x7a58
-+#define TRGMII_TD2_CTRL			0x7a60
-+#define TRGMII_TD3_CTRL			0x7a68
-+#define TRGMII_TXCTL_CTRL		0x7a70
-+#define TRGMII_TCK_CTRL			0x7a78
-+#define TRGMII_TD_CTRL(n)		(0x7a50 + (n) * 8)
-+#define NUM_TRGMII_CTRL			6
-+#define TX_DMPEDRV			BIT(31)
-+#define TX_DM_SR			BIT(15)
-+#define TX_DMERODT			BIT(14)
-+#define TX_DMOECTL			BIT(13)
-+#define TX_TAP_S			8
-+#define TX_TAP_M			0xf00
-+#define TX_TRAIN_WD_S			0
-+#define TX_TRAIN_WD_M			0xff
-+
-+#define TRGMII_TD0_ODT			0x7a54
-+#define TRGMII_TD1_ODT			0x7a5c
-+#define TRGMII_TD2_ODT			0x7a64
-+#define TRGMII_TD3_ODT			0x7a6c
-+#define TRGMII_TXCTL_ODT		0x7574
-+#define TRGMII_TCK_ODT			0x757c
-+#define TRGMII_TD_ODT(n)		(0x7a54 + (n) * 8)
-+#define NUM_TRGMII_ODT			6
-+#define TX_DM_DRVN_PRE_S		30
-+#define TX_DM_DRVN_PRE_M		0xc0000000
-+#define TX_DM_DRVP_PRE_S		28
-+#define TX_DM_DRVP_PRE_M		0x30000000
-+#define TX_DM_TDSEL_S			24
-+#define TX_DM_TDSEL_M			0xf000000
-+#define TX_ODTEN			BIT(23)
-+#define TX_DME_PRE			BIT(20)
-+#define TX_DM_DRVNT0			BIT(19)
-+#define TX_DM_DRVPT0			BIT(18)
-+#define TX_DM_DRVNTE			BIT(17)
-+#define TX_DM_DRVPTE			BIT(16)
-+#define TX_DM_ODTN_S			12
-+#define TX_DM_ODTN_M			0x7000
-+#define TX_DM_ODTP_S			8
-+#define TX_DM_ODTP_M			0x700
-+#define TX_DM_DRVN_S			4
-+#define TX_DM_DRVN_M			0xf0
-+#define TX_DM_DRVP_S			0
-+#define TX_DM_DRVP_M			0x0f
-+
-+#define P5RGMIIRXCR			0x7b00
-+#define CSR_RGMII_RCTL_CFG_S		24
-+#define CSR_RGMII_RCTL_CFG_M		0x7000000
-+#define CSR_RGMII_RXD_CFG_S		16
-+#define CSR_RGMII_RXD_CFG_M		0x70000
-+#define CSR_RGMII_EDGE_ALIGN		BIT(8)
-+#define CSR_RGMII_RXC_90DEG_CFG_S	4
-+#define CSR_RGMII_RXC_90DEG_CFG_M	0xf0
-+#define CSR_RGMII_RXC_0DEG_CFG_S	0
-+#define CSR_RGMII_RXC_0DEG_CFG_M	0x0f
-+
-+#define P5RGMIITXCR			0x7b04
-+#define CSR_RGMII_TXEN_CFG_S		16
-+#define CSR_RGMII_TXEN_CFG_M		0x70000
-+#define CSR_RGMII_TXD_CFG_S		8
-+#define CSR_RGMII_TXD_CFG_M		0x700
-+#define CSR_RGMII_TXC_CFG_S		0
-+#define CSR_RGMII_TXC_CFG_M		0x1f
-+
-+#define CHIP_REV			0x7ffc
-+#define CHIP_NAME_S			16
-+#define CHIP_NAME_M			0xffff0000
-+#define CHIP_REV_S			0
-+#define CHIP_REV_M			0x0f
-+
-+/* MMD registers */
-+#define CORE_PLL_GROUP2			0x401
-+#define RG_SYSPLL_EN_NORMAL		BIT(15)
-+#define RG_SYSPLL_VODEN			BIT(14)
-+#define RG_SYSPLL_POSDIV_S		5
-+#define RG_SYSPLL_POSDIV_M		0x60
-+
-+#define CORE_PLL_GROUP4			0x403
-+#define RG_SYSPLL_DDSFBK_EN		BIT(12)
-+#define RG_SYSPLL_BIAS_EN		BIT(11)
-+#define RG_SYSPLL_BIAS_LPF_EN		BIT(10)
-+
-+#define CORE_PLL_GROUP5			0x404
-+#define RG_LCDDS_PCW_NCPO1_S		0
-+#define RG_LCDDS_PCW_NCPO1_M		0xffff
-+
-+#define CORE_PLL_GROUP6			0x405
-+#define RG_LCDDS_PCW_NCPO0_S		0
-+#define RG_LCDDS_PCW_NCPO0_M		0xffff
-+
-+#define CORE_PLL_GROUP7			0x406
-+#define RG_LCDDS_PWDB			BIT(15)
-+#define RG_LCDDS_ISO_EN			BIT(13)
-+#define RG_LCCDS_C_S			4
-+#define RG_LCCDS_C_M			0x70
-+#define RG_LCDDS_PCW_NCPO_CHG		BIT(3)
-+
-+#define CORE_PLL_GROUP10		0x409
-+#define RG_LCDDS_SSC_DELTA_S		0
-+#define RG_LCDDS_SSC_DELTA_M		0xfff
-+
-+#define CORE_PLL_GROUP11		0x40a
-+#define RG_LCDDS_SSC_DELTA1_S		0
-+#define RG_LCDDS_SSC_DELTA1_M		0xfff
-+
-+#define CORE_GSWPLL_GCR_1		0x040d
-+#define GSWPLL_PREDIV_S			14
-+#define GSWPLL_PREDIV_M			0xc000
-+#define GSWPLL_POSTDIV_200M_S		12
-+#define GSWPLL_POSTDIV_200M_M		0x3000
-+#define GSWPLL_EN_PRE			BIT(11)
-+#define GSWPLL_FBKSEL			BIT(10)
-+#define GSWPLL_BP			BIT(9)
-+#define GSWPLL_BR			BIT(8)
-+#define GSWPLL_FBKDIV_200M_S		0
-+#define GSWPLL_FBKDIV_200M_M		0xff
-+
-+#define CORE_GSWPLL_GCR_2		0x040e
-+#define GSWPLL_POSTDIV_500M_S		8
-+#define GSWPLL_POSTDIV_500M_M		0x300
-+#define GSWPLL_FBKDIV_500M_S		0
-+#define GSWPLL_FBKDIV_500M_M		0xff
-+
-+#define TRGMII_GSW_CLK_CG		0x0410
-+#define TRGMIICK_EN			BIT(1)
-+#define GSWCK_EN			BIT(0)
-+
-+static int mt7530_mii_read(struct gsw_mt753x *gsw, int phy, int reg)
-+{
-+	if (phy < MT753X_NUM_PHYS)
-+		phy = (gsw->phy_base + phy) & MT753X_SMI_ADDR_MASK;
-+
-+	return mdiobus_read(gsw->host_bus, phy, reg);
-+}
-+
-+static void mt7530_mii_write(struct gsw_mt753x *gsw, int phy, int reg, u16 val)
-+{
-+	if (phy < MT753X_NUM_PHYS)
-+		phy = (gsw->phy_base + phy) & MT753X_SMI_ADDR_MASK;
-+
-+	mdiobus_write(gsw->host_bus, phy, reg, val);
-+}
-+
-+static int mt7530_mmd_read(struct gsw_mt753x *gsw, int addr, int devad, u16 reg)
-+{
-+	u16 val;
-+
-+	if (addr < MT753X_NUM_PHYS)
-+		addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK;
-+
-+	mutex_lock(&gsw->host_bus->mdio_lock);
-+
-+	gsw->host_bus->write(gsw->host_bus, addr, MII_MMD_ACC_CTL_REG,
-+			     (MMD_ADDR << MMD_CMD_S) |
-+			     ((devad << MMD_DEVAD_S) & MMD_DEVAD_M));
-+
-+	gsw->host_bus->write(gsw->host_bus, addr, MII_MMD_ADDR_DATA_REG, reg);
-+
-+	gsw->host_bus->write(gsw->host_bus, addr, MII_MMD_ACC_CTL_REG,
-+			     (MMD_DATA << MMD_CMD_S) |
-+			     ((devad << MMD_DEVAD_S) & MMD_DEVAD_M));
-+
-+	val = gsw->host_bus->read(gsw->host_bus, addr, MII_MMD_ADDR_DATA_REG);
-+
-+	mutex_unlock(&gsw->host_bus->mdio_lock);
-+
-+	return val;
-+}
-+
-+static void mt7530_mmd_write(struct gsw_mt753x *gsw, int addr, int devad,
-+			     u16 reg, u16 val)
-+{
-+	if (addr < MT753X_NUM_PHYS)
-+		addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK;
-+
-+	mutex_lock(&gsw->host_bus->mdio_lock);
-+
-+	gsw->host_bus->write(gsw->host_bus, addr, MII_MMD_ACC_CTL_REG,
-+		      (MMD_ADDR << MMD_CMD_S) |
-+		      ((devad << MMD_DEVAD_S) & MMD_DEVAD_M));
-+
-+	gsw->host_bus->write(gsw->host_bus, addr, MII_MMD_ADDR_DATA_REG, reg);
-+
-+	gsw->host_bus->write(gsw->host_bus, addr, MII_MMD_ACC_CTL_REG,
-+		      (MMD_DATA << MMD_CMD_S) |
-+		      ((devad << MMD_DEVAD_S) & MMD_DEVAD_M));
-+
-+	gsw->host_bus->write(gsw->host_bus, addr, MII_MMD_ADDR_DATA_REG, val);
-+
-+	mutex_unlock(&gsw->host_bus->mdio_lock);
-+}
-+
-+static void mt7530_core_reg_write(struct gsw_mt753x *gsw, u32 reg, u32 val)
-+{
-+	gsw->mmd_write(gsw, 0, 0x1f, reg, val);
-+}
-+
-+static void mt7530_trgmii_setting(struct gsw_mt753x *gsw)
-+{
-+	u16 i;
-+
-+	mt7530_core_reg_write(gsw, CORE_PLL_GROUP5, 0x0780);
-+	mdelay(1);
-+	mt7530_core_reg_write(gsw, CORE_PLL_GROUP6, 0);
-+	mt7530_core_reg_write(gsw, CORE_PLL_GROUP10, 0x87);
-+	mdelay(1);
-+	mt7530_core_reg_write(gsw, CORE_PLL_GROUP11, 0x87);
-+
-+	/* PLL BIAS enable */
-+	mt7530_core_reg_write(gsw, CORE_PLL_GROUP4,
-+			      RG_SYSPLL_DDSFBK_EN | RG_SYSPLL_BIAS_EN);
-+	mdelay(1);
-+
-+	/* PLL LPF enable */
-+	mt7530_core_reg_write(gsw, CORE_PLL_GROUP4,
-+			      RG_SYSPLL_DDSFBK_EN |
-+			      RG_SYSPLL_BIAS_EN | RG_SYSPLL_BIAS_LPF_EN);
-+
-+	/* sys PLL enable */
-+	mt7530_core_reg_write(gsw, CORE_PLL_GROUP2,
-+			      RG_SYSPLL_EN_NORMAL | RG_SYSPLL_VODEN |
-+			      (1 << RG_SYSPLL_POSDIV_S));
-+
-+	/* LCDDDS PWDS */
-+	mt7530_core_reg_write(gsw, CORE_PLL_GROUP7,
-+			      (3 << RG_LCCDS_C_S) |
-+			      RG_LCDDS_PWDB | RG_LCDDS_ISO_EN);
-+	mdelay(1);
-+
-+	/* Enable MT7530 TRGMII clock */
-+	mt7530_core_reg_write(gsw, TRGMII_GSW_CLK_CG, GSWCK_EN | TRGMIICK_EN);
-+
-+	/* lower Tx Driving */
-+	for (i = 0 ; i < NUM_TRGMII_ODT; i++)
-+		mt753x_reg_write(gsw, TRGMII_TD_ODT(i),
-+				 (4 << TX_DM_DRVP_S) | (4 << TX_DM_DRVN_S));
-+}
-+
-+static void mt7530_rgmii_setting(struct gsw_mt753x *gsw)
-+{
-+	u32 val;
-+
-+	mt7530_core_reg_write(gsw, CORE_PLL_GROUP5, 0x0c80);
-+	mdelay(1);
-+	mt7530_core_reg_write(gsw, CORE_PLL_GROUP6, 0);
-+	mt7530_core_reg_write(gsw, CORE_PLL_GROUP10, 0x87);
-+	mdelay(1);
-+	mt7530_core_reg_write(gsw, CORE_PLL_GROUP11, 0x87);
-+
-+	val = mt753x_reg_read(gsw, TRGMII_TXCTRL);
-+	val &= ~TXC_INV;
-+	mt753x_reg_write(gsw, TRGMII_TXCTRL, val);
-+
-+	mt753x_reg_write(gsw, TRGMII_TCK_CTRL,
-+			 (8 << TX_TAP_S) | (0x55 << TX_TRAIN_WD_S));
-+}
-+
-+static int mt7530_mac_port_setup(struct gsw_mt753x *gsw)
-+{
-+	u32 hwstrap, p6ecr = 0, p5mcr, p6mcr, phyad;
-+
-+	hwstrap = mt753x_reg_read(gsw, MHWSTRAP);
-+	hwstrap &= ~(P6_INTF_DIS | P5_INTF_MODE_RGMII | P5_INTF_DIS_S);
-+	hwstrap |= P5_INTF_SEL_GMAC5;
-+	if (!gsw->port5_cfg.enabled) {
-+		p5mcr = FORCE_MODE;
-+		hwstrap |= P5_INTF_DIS_S;
-+	} else {
-+		p5mcr = (IPG_96BIT_WITH_SHORT_IPG << IPG_CFG_S) |
-+			MAC_MODE | MAC_TX_EN | MAC_RX_EN |
-+			BKOFF_EN | BACKPR_EN;
-+
-+		if (gsw->port5_cfg.force_link) {
-+			p5mcr |= FORCE_MODE | FORCE_LINK | FORCE_RX_FC |
-+				 FORCE_TX_FC;
-+			p5mcr |= gsw->port5_cfg.speed << FORCE_SPD_S;
-+
-+			if (gsw->port5_cfg.duplex)
-+				p5mcr |= FORCE_DPX;
-+		}
-+
-+		switch (gsw->port5_cfg.phy_mode) {
-+		case PHY_INTERFACE_MODE_MII:
-+		case PHY_INTERFACE_MODE_GMII:
-+			break;
-+		case PHY_INTERFACE_MODE_RGMII:
-+			hwstrap |= P5_INTF_MODE_RGMII;
-+			break;
-+		default:
-+			dev_info(gsw->dev, "%s is not supported by port5\n",
-+				 phy_modes(gsw->port5_cfg.phy_mode));
-+			p5mcr = FORCE_MODE;
-+			hwstrap |= P5_INTF_DIS_S;
-+		}
-+
-+		/* Port5 to PHY direct mode */
-+		if (of_property_read_u32(gsw->port5_cfg.np, "phy-address",
-+					 &phyad))
-+			goto parse_p6;
-+
-+		if (phyad != 0 && phyad != 4) {
-+			dev_info(gsw->dev,
-+				 "Only PHY 0/4 can be connected to Port 5\n");
-+			goto parse_p6;
-+		}
-+
-+		hwstrap &= ~P5_INTF_SEL_GMAC5;
-+		if (phyad == 0)
-+			hwstrap |= P5_PHY0_SEL;
-+		else
-+			hwstrap &= ~P5_PHY0_SEL;
-+	}
-+
-+parse_p6:
-+	if (!gsw->port6_cfg.enabled) {
-+		p6mcr = FORCE_MODE;
-+		hwstrap |= P6_INTF_DIS;
-+	} else {
-+		p6mcr = (IPG_96BIT_WITH_SHORT_IPG << IPG_CFG_S) |
-+			MAC_MODE | MAC_TX_EN | MAC_RX_EN |
-+			BKOFF_EN | BACKPR_EN;
-+
-+		if (gsw->port6_cfg.force_link) {
-+			p6mcr |= FORCE_MODE | FORCE_LINK | FORCE_RX_FC |
-+				 FORCE_TX_FC;
-+			p6mcr |= gsw->port6_cfg.speed << FORCE_SPD_S;
-+
-+			if (gsw->port6_cfg.duplex)
-+				p6mcr |= FORCE_DPX;
-+		}
-+
-+		switch (gsw->port6_cfg.phy_mode) {
-+		case PHY_INTERFACE_MODE_RGMII:
-+			p6ecr = BIT(1);
-+			break;
-+		case PHY_INTERFACE_MODE_TRGMII:
-+			/* set MT7530 central align */
-+			p6ecr = BIT(0);
-+			break;
-+		default:
-+			dev_info(gsw->dev, "%s is not supported by port6\n",
-+				 phy_modes(gsw->port6_cfg.phy_mode));
-+			p6mcr = FORCE_MODE;
-+			hwstrap |= P6_INTF_DIS;
-+		}
-+	}
-+
-+	mt753x_reg_write(gsw, MHWSTRAP, hwstrap);
-+	mt753x_reg_write(gsw, P6ECR, p6ecr);
-+
-+	mt753x_reg_write(gsw, PMCR(5), p5mcr);
-+	mt753x_reg_write(gsw, PMCR(6), p6mcr);
-+
-+	return 0;
-+}
-+
-+static void mt7530_core_pll_setup(struct gsw_mt753x *gsw)
-+{
-+	u32 hwstrap;
-+
-+	hwstrap = mt753x_reg_read(gsw, HWSTRAP);
-+
-+	switch ((hwstrap & XTAL_FSEL_M) >> XTAL_FSEL_S) {
-+	case XTAL_40MHZ:
-+		/* Disable MT7530 core clock */
-+		mt7530_core_reg_write(gsw, TRGMII_GSW_CLK_CG, 0);
-+
-+		/* disable MT7530 PLL */
-+		mt7530_core_reg_write(gsw, CORE_GSWPLL_GCR_1,
-+				      (2 << GSWPLL_POSTDIV_200M_S) |
-+				      (32 << GSWPLL_FBKDIV_200M_S));
-+
-+		/* For MT7530 core clock = 500Mhz */
-+		mt7530_core_reg_write(gsw, CORE_GSWPLL_GCR_2,
-+				      (1 << GSWPLL_POSTDIV_500M_S) |
-+				      (25 << GSWPLL_FBKDIV_500M_S));
-+
-+		/* Enable MT7530 PLL */
-+		mt7530_core_reg_write(gsw, CORE_GSWPLL_GCR_1,
-+				      (2 << GSWPLL_POSTDIV_200M_S) |
-+				      (32 << GSWPLL_FBKDIV_200M_S) |
-+				      GSWPLL_EN_PRE);
-+
-+		usleep_range(20, 40);
-+
-+		/* Enable MT7530 core clock */
-+		mt7530_core_reg_write(gsw, TRGMII_GSW_CLK_CG, GSWCK_EN);
-+		break;
-+	default:
-+		/* TODO: PLL settings for 20/25MHz */
-+		break;
-+	}
-+
-+	hwstrap = mt753x_reg_read(gsw, HWSTRAP);
-+	hwstrap |= CHG_TRAP;
-+	if (gsw->direct_phy_access)
-+		hwstrap &= ~C_MDIO_BPS_S;
-+	else
-+		hwstrap |= C_MDIO_BPS_S;
-+
-+	mt753x_reg_write(gsw, MHWSTRAP, hwstrap);
-+
-+	if (gsw->port6_cfg.enabled &&
-+	    gsw->port6_cfg.phy_mode == PHY_INTERFACE_MODE_TRGMII) {
-+		mt7530_trgmii_setting(gsw);
-+	} else {
-+		/* RGMII */
-+		mt7530_rgmii_setting(gsw);
-+	}
-+
-+	/* delay setting for 10/1000M */
-+	mt753x_reg_write(gsw, P5RGMIIRXCR,
-+			 CSR_RGMII_EDGE_ALIGN |
-+			 (2 << CSR_RGMII_RXC_0DEG_CFG_S));
-+	mt753x_reg_write(gsw, P5RGMIITXCR, 0x14 << CSR_RGMII_TXC_CFG_S);
-+}
-+
-+static int mt7530_sw_detect(struct gsw_mt753x *gsw, struct chip_rev *crev)
-+{
-+	u32 rev;
-+
-+	rev = mt753x_reg_read(gsw, CHIP_REV);
-+
-+	if (((rev & CHIP_NAME_M) >> CHIP_NAME_S) == MT7530) {
-+		if (crev) {
-+			crev->rev = rev & CHIP_REV_M;
-+			crev->name = "MT7530";
-+		}
-+
-+		return 0;
-+	}
-+
-+	return -ENODEV;
-+}
-+
-+static void mt7530_phy_setting(struct gsw_mt753x *gsw)
-+{
-+	int i;
-+	u32 val;
-+
-+	for (i = 0; i < MT753X_NUM_PHYS; i++) {
-+		/* Disable EEE */
-+		gsw->mmd_write(gsw, i, PHY_DEV07, PHY_DEV07_REG_03C, 0);
-+
-+		/* Enable HW auto downshift */
-+		gsw->mii_write(gsw, i, 0x1f, 0x1);
-+		val = gsw->mii_read(gsw, i, PHY_EXT_REG_14);
-+		val |= PHY_EN_DOWN_SHFIT;
-+		gsw->mii_write(gsw, i, PHY_EXT_REG_14, val);
-+
-+		/* Increase SlvDPSready time */
-+		gsw->mii_write(gsw, i, 0x1f, 0x52b5);
-+		gsw->mii_write(gsw, i, PHY_TR_REG_10, 0xafae);
-+		gsw->mii_write(gsw, i, PHY_TR_REG_12, 0x2f);
-+		gsw->mii_write(gsw, i, PHY_TR_REG_10, 0x8fae);
-+
-+		/* Increase post_update_timer */
-+		gsw->mii_write(gsw, i, 0x1f, 0x3);
-+		gsw->mii_write(gsw, i, PHY_LPI_REG_11, 0x4b);
-+		gsw->mii_write(gsw, i, 0x1f, 0);
-+
-+		/* Adjust 100_mse_threshold */
-+		gsw->mmd_write(gsw, i, PHY_DEV1E, PHY_DEV1E_REG_123, 0xffff);
-+
-+		/* Disable mcc */
-+		gsw->mmd_write(gsw, i, PHY_DEV1E, PHY_DEV1E_REG_A6, 0x300);
-+	}
-+}
-+
-+static inline bool get_phy_access_mode(const struct device_node *np)
-+{
-+	return of_property_read_bool(np, "mt7530,direct-phy-access");
-+}
-+
-+static int mt7530_sw_init(struct gsw_mt753x *gsw)
-+{
-+	int i;
-+	u32 val;
-+
-+	gsw->direct_phy_access = get_phy_access_mode(gsw->dev->of_node);
-+
-+	/* Force MT7530 to use (in)direct PHY access */
-+	val = mt753x_reg_read(gsw, HWSTRAP);
-+	val |= CHG_TRAP;
-+	if (gsw->direct_phy_access)
-+		val &= ~C_MDIO_BPS_S;
-+	else
-+		val |= C_MDIO_BPS_S;
-+	mt753x_reg_write(gsw, MHWSTRAP, val);
-+
-+	/* Read PHY address base from HWSTRAP */
-+	gsw->phy_base  = (((val & SMI_ADDR_M) >> SMI_ADDR_S) << 3) + 8;
-+	gsw->phy_base &= MT753X_SMI_ADDR_MASK;
-+
-+	if (gsw->direct_phy_access) {
-+		gsw->mii_read = mt7530_mii_read;
-+		gsw->mii_write = mt7530_mii_write;
-+		gsw->mmd_read = mt7530_mmd_read;
-+		gsw->mmd_write = mt7530_mmd_write;
-+	} else {
-+		gsw->mii_read = mt753x_mii_read;
-+		gsw->mii_write = mt753x_mii_write;
-+		gsw->mmd_read = mt753x_mmd_ind_read;
-+		gsw->mmd_write = mt753x_mmd_ind_write;
-+	}
-+
-+	for (i = 0; i < MT753X_NUM_PHYS; i++) {
-+		val = gsw->mii_read(gsw, i, MII_BMCR);
-+		val |= BMCR_PDOWN;
-+		gsw->mii_write(gsw, i, MII_BMCR, val);
-+	}
-+
-+	/* Force MAC link down before reset */
-+	mt753x_reg_write(gsw, PMCR(5), FORCE_MODE);
-+	mt753x_reg_write(gsw, PMCR(6), FORCE_MODE);
-+
-+	/* Switch soft reset */
-+	/* BUG: sw reset causes gsw int flooding */
-+	mt753x_reg_write(gsw, SYS_CTRL, SW_PHY_RST | SW_SYS_RST | SW_REG_RST);
-+	usleep_range(10, 20);
-+
-+	/* global mac control settings configuration */
-+	mt753x_reg_write(gsw, GMACCR,
-+			 LATE_COL_DROP | (15 << MTCC_LMT_S) |
-+			 (2 << MAX_RX_JUMBO_S) | RX_PKT_LEN_MAX_JUMBO);
-+
-+	mt7530_core_pll_setup(gsw);
-+	mt7530_mac_port_setup(gsw);
-+
-+	return 0;
-+}
-+
-+static int mt7530_sw_post_init(struct gsw_mt753x *gsw)
-+{
-+	int i;
-+	u32 val;
-+
-+	mt7530_phy_setting(gsw);
-+
-+	for (i = 0; i < MT753X_NUM_PHYS; i++) {
-+		val = gsw->mii_read(gsw, i, MII_BMCR);
-+		val &= ~BMCR_PDOWN;
-+		gsw->mii_write(gsw, i, MII_BMCR, val);
-+	}
-+
-+	return 0;
-+}
-+
-+struct mt753x_sw_id mt7530_id = {
-+	.model = MT7530,
-+	.detect = mt7530_sw_detect,
-+	.init = mt7530_sw_init,
-+	.post_init = mt7530_sw_post_init
-+};
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt7530.h b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt7530.h
-new file mode 100644
-index 0000000000..40243d4e5a
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt7530.h
-@@ -0,0 +1,13 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+/*
-+ * Copyright (c) 2018 MediaTek Inc.
-+ */
-+
-+#ifndef _MT7530_H_
-+#define _MT7530_H_
-+
-+#include "mt753x.h"
-+
-+extern struct mt753x_sw_id mt7530_id;
-+
-+#endif /* _MT7530_H_ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt7531.c b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt7531.c
-new file mode 100644
-index 0000000000..7ebf09c102
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt7531.c
-@@ -0,0 +1,918 @@
-+// SPDX-License-Identifier: GPL-2.0-only
-+/*
-+ * Copyright (c) 2018 MediaTek Inc.
-+ * Author: Zhanguo Ju <zhanguo.ju@mediatek.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/delay.h>
-+#include <linux/hrtimer.h>
-+
-+#include "mt753x.h"
-+#include "mt753x_regs.h"
-+
-+/* MT7531 registers */
-+#define SGMII_REG_BASE			0x5000
-+#define SGMII_REG_PORT_BASE		0x1000
-+#define SGMII_REG(p, r)			(SGMII_REG_BASE + \
-+					(p) * SGMII_REG_PORT_BASE + (r))
-+#define PCS_CONTROL_1(p)		SGMII_REG(p, 0x00)
-+#define SGMII_MODE(p)			SGMII_REG(p, 0x20)
-+#define QPHY_PWR_STATE_CTRL(p)		SGMII_REG(p, 0xe8)
-+#define PHYA_CTRL_SIGNAL3(p)		SGMII_REG(p, 0x128)
-+
-+/* Fields of PCS_CONTROL_1 */
-+#define SGMII_LINK_STATUS		BIT(18)
-+#define SGMII_AN_ENABLE			BIT(12)
-+#define SGMII_AN_RESTART		BIT(9)
-+
-+/* Fields of SGMII_MODE */
-+#define SGMII_REMOTE_FAULT_DIS		BIT(8)
-+#define SGMII_IF_MODE_FORCE_DUPLEX	BIT(4)
-+#define SGMII_IF_MODE_FORCE_SPEED_S	0x2
-+#define SGMII_IF_MODE_FORCE_SPEED_M	0x0c
-+#define SGMII_IF_MODE_ADVERT_AN		BIT(1)
-+
-+/* Values of SGMII_IF_MODE_FORCE_SPEED */
-+#define SGMII_IF_MODE_FORCE_SPEED_10	0
-+#define SGMII_IF_MODE_FORCE_SPEED_100	1
-+#define SGMII_IF_MODE_FORCE_SPEED_1000	2
-+
-+/* Fields of QPHY_PWR_STATE_CTRL */
-+#define PHYA_PWD			BIT(4)
-+
-+/* Fields of PHYA_CTRL_SIGNAL3 */
-+#define RG_TPHY_SPEED_S			2
-+#define RG_TPHY_SPEED_M			0x0c
-+
-+/* Values of RG_TPHY_SPEED */
-+#define RG_TPHY_SPEED_1000		0
-+#define RG_TPHY_SPEED_2500		1
-+
-+/* Unique fields of (M)HWSTRAP for MT7531 */
-+#define XTAL_FSEL_S			7
-+#define XTAL_FSEL_M			BIT(7)
-+#define PHY_EN				BIT(6)
-+#define CHG_STRAP			BIT(8)
-+
-+/* Efuse Register Define */
-+#define GBE_EFUSE			0x7bc8
-+#define GBE_SEL_EFUSE_EN		BIT(0)
-+
-+/* PHY ENABLE Register bitmap define */
-+#define PHY_DEV1F			0x1f
-+#define PHY_DEV1F_REG_44		0x44
-+#define PHY_DEV1F_REG_104		0x104
-+#define PHY_DEV1F_REG_10A		0x10a
-+#define PHY_DEV1F_REG_10B		0x10b
-+#define PHY_DEV1F_REG_10C		0x10c
-+#define PHY_DEV1F_REG_10D		0x10d
-+#define PHY_DEV1F_REG_268		0x268
-+#define PHY_DEV1F_REG_269		0x269
-+#define PHY_DEV1F_REG_403		0x403
-+
-+/* Fields of PHY_DEV1F_REG_403 */
-+#define GBE_EFUSE_SETTING		BIT(3)
-+#define PHY_EN_BYPASS_MODE		BIT(4)
-+#define POWER_ON_OFF			BIT(5)
-+#define PHY_PLL_M			GENMASK(9, 8)
-+#define PHY_PLL_SEL(x)			(((x) << 8) & GENMASK(9, 8))
-+
-+/* PHY EEE Register bitmap of define */
-+#define PHY_DEV07			0x07
-+#define PHY_DEV07_REG_03C		0x3c
-+
-+/* PHY Extend Register 0x14 bitmap of define */
-+#define PHY_EXT_REG_14			0x14
-+
-+/* Fields of PHY_EXT_REG_14 */
-+#define PHY_EN_DOWN_SHFIT		BIT(4)
-+
-+/* PHY Extend Register 0x17 bitmap of define */
-+#define PHY_EXT_REG_17			0x17
-+
-+/* Fields of PHY_EXT_REG_17 */
-+#define PHY_LINKDOWN_POWER_SAVING_EN	BIT(4)
-+
-+/* PHY Token Ring Register 0x10 bitmap of define */
-+#define PHY_TR_REG_10			0x10
-+
-+/* PHY Token Ring Register 0x12 bitmap of define */
-+#define PHY_TR_REG_12			0x12
-+
-+/* PHY DEV 0x1e Register bitmap of define */
-+#define PHY_DEV1E			0x1e
-+#define PHY_DEV1E_REG_13		0x13
-+#define PHY_DEV1E_REG_14		0x14
-+#define PHY_DEV1E_REG_41		0x41
-+#define PHY_DEV1E_REG_A6		0xa6
-+#define PHY_DEV1E_REG_0C6		0x0c6
-+#define PHY_DEV1E_REG_0FE		0x0fe
-+#define PHY_DEV1E_REG_123		0x123
-+#define PHY_DEV1E_REG_189		0x189
-+
-+/* Fields of PHY_DEV1E_REG_0C6 */
-+#define PHY_POWER_SAVING_S		8
-+#define PHY_POWER_SAVING_M		0x300
-+#define PHY_POWER_SAVING_TX		0x0
-+
-+/* Fields of PHY_DEV1E_REG_189 */
-+#define DESCRAMBLER_CLEAR_EN		0x1
-+
-+/* Values of XTAL_FSEL_S */
-+#define XTAL_40MHZ			0
-+#define XTAL_25MHZ			1
-+
-+#define PLLGP_EN			0x7820
-+#define EN_COREPLL			BIT(2)
-+#define SW_CLKSW			BIT(1)
-+#define SW_PLLGP			BIT(0)
-+
-+#define PLLGP_CR0			0x78a8
-+#define RG_COREPLL_EN			BIT(22)
-+#define RG_COREPLL_POSDIV_S		23
-+#define RG_COREPLL_POSDIV_M		0x3800000
-+#define RG_COREPLL_SDM_PCW_S		1
-+#define RG_COREPLL_SDM_PCW_M		0x3ffffe
-+#define RG_COREPLL_SDM_PCW_CHG		BIT(0)
-+
-+/* TOP Signals Status Register */
-+#define TOP_SIG_SR			0x780c
-+#define PAD_DUAL_SGMII_EN		BIT(1)
-+
-+/* RGMII and SGMII PLL clock */
-+#define ANA_PLLGP_CR2			0x78b0
-+#define ANA_PLLGP_CR5			0x78bc
-+
-+/* GPIO mode define */
-+#define GPIO_MODE_REGS(x)		(0x7c0c + (((x) / 8) * 4))
-+#define GPIO_MODE_S			4
-+
-+/* GPIO GROUP IOLB SMT0 Control */
-+#define SMT0_IOLB			0x7f04
-+#define SMT_IOLB_5_SMI_MDC_EN		BIT(5)
-+
-+/* Unique fields of PMCR for MT7531 */
-+#define FORCE_MODE_EEE1G		BIT(25)
-+#define FORCE_MODE_EEE100		BIT(26)
-+#define FORCE_MODE_TX_FC		BIT(27)
-+#define FORCE_MODE_RX_FC		BIT(28)
-+#define FORCE_MODE_DPX			BIT(29)
-+#define FORCE_MODE_SPD			BIT(30)
-+#define FORCE_MODE_LNK			BIT(31)
-+#define FORCE_MODE			BIT(15)
-+
-+#define CHIP_REV			0x781C
-+#define CHIP_NAME_S			16
-+#define CHIP_NAME_M			0xffff0000
-+#define CHIP_REV_S			0
-+#define CHIP_REV_M			0x0f
-+#define CHIP_REV_E1			0x0
-+
-+#define CLKGEN_CTRL			0x7500
-+#define CLK_SKEW_OUT_S			8
-+#define CLK_SKEW_OUT_M			0x300
-+#define CLK_SKEW_IN_S			6
-+#define CLK_SKEW_IN_M			0xc0
-+#define RXCLK_NO_DELAY			BIT(5)
-+#define TXCLK_NO_REVERSE		BIT(4)
-+#define GP_MODE_S			1
-+#define GP_MODE_M			0x06
-+#define GP_CLK_EN			BIT(0)
-+
-+/* Values of GP_MODE */
-+#define GP_MODE_RGMII			0
-+#define GP_MODE_MII			1
-+#define GP_MODE_REV_MII			2
-+
-+/* Values of CLK_SKEW_IN */
-+#define CLK_SKEW_IN_NO_CHANGE		0
-+#define CLK_SKEW_IN_DELAY_100PPS	1
-+#define CLK_SKEW_IN_DELAY_200PPS	2
-+#define CLK_SKEW_IN_REVERSE		3
-+
-+/* Values of CLK_SKEW_OUT */
-+#define CLK_SKEW_OUT_NO_CHANGE		0
-+#define CLK_SKEW_OUT_DELAY_100PPS	1
-+#define CLK_SKEW_OUT_DELAY_200PPS	2
-+#define CLK_SKEW_OUT_REVERSE		3
-+
-+/* Proprietory Control Register of Internal Phy device 0x1e */
-+#define RXADC_CONTROL_3			0xc2
-+#define RXADC_LDO_CONTROL_2		0xd3
-+
-+/* Proprietory Control Register of Internal Phy device 0x1f */
-+#define TXVLD_DA_271			0x271
-+#define TXVLD_DA_272			0x272
-+#define TXVLD_DA_273			0x273
-+
-+/* DSP Channel and NOD_ADDR*/
-+#define DSP_CH				0x2
-+#define DSP_NOD_ADDR			0xD
-+
-+/* gpio pinmux pins and functions define */
-+static int gpio_int_pins[] = {0};
-+static int gpio_int_funcs[] = {1};
-+static int gpio_mdc_pins[] = {11, 20};
-+static int gpio_mdc_funcs[] = {2, 2};
-+static int gpio_mdio_pins[] = {12, 21};
-+static int gpio_mdio_funcs[] = {2, 2};
-+
-+static int mt7531_set_port_sgmii_force_mode(struct gsw_mt753x *gsw, u32 port,
-+					    struct mt753x_port_cfg *port_cfg)
-+{
-+	u32 speed, port_base, val;
-+	ktime_t timeout;
-+	u32 timeout_us;
-+
-+	if (port < 5 || port >= MT753X_NUM_PORTS) {
-+		dev_info(gsw->dev, "port %d is not a SGMII port\n", port);
-+		return -EINVAL;
-+	}
-+
-+	port_base = port - 5;
-+
-+	switch (port_cfg->speed) {
-+	case MAC_SPD_1000:
-+		speed = RG_TPHY_SPEED_1000;
-+		break;
-+	case MAC_SPD_2500:
-+		speed = RG_TPHY_SPEED_2500;
-+		break;
-+	default:
-+		dev_info(gsw->dev, "invalid SGMII speed idx %d for port %d\n",
-+			 port_cfg->speed, port);
-+
-+		speed = RG_TPHY_SPEED_1000;
-+	}
-+
-+	/* Step 1: Speed select register setting */
-+	val = mt753x_reg_read(gsw, PHYA_CTRL_SIGNAL3(port_base));
-+	val &= ~RG_TPHY_SPEED_M;
-+	val |= speed << RG_TPHY_SPEED_S;
-+	mt753x_reg_write(gsw, PHYA_CTRL_SIGNAL3(port_base), val);
-+
-+	/* Step 2 : Disable AN */
-+	val = mt753x_reg_read(gsw, PCS_CONTROL_1(port_base));
-+	val &= ~SGMII_AN_ENABLE;
-+	mt753x_reg_write(gsw, PCS_CONTROL_1(port_base), val);
-+
-+	/* Step 3: SGMII force mode setting */
-+	val = mt753x_reg_read(gsw, SGMII_MODE(port_base));
-+	val &= ~SGMII_IF_MODE_ADVERT_AN;
-+	val &= ~SGMII_IF_MODE_FORCE_SPEED_M;
-+	val |= SGMII_IF_MODE_FORCE_SPEED_1000 << SGMII_IF_MODE_FORCE_SPEED_S;
-+	val |= SGMII_IF_MODE_FORCE_DUPLEX;
-+	/* For sgmii force mode, 0 is full duplex and 1 is half duplex */
-+	if (port_cfg->duplex)
-+		val &= ~SGMII_IF_MODE_FORCE_DUPLEX;
-+
-+	mt753x_reg_write(gsw, SGMII_MODE(port_base), val);
-+
-+	/* Step 4: XXX: Disable Link partner's AN and set force mode */
-+
-+	/* Step 5: XXX: Special setting for PHYA ==> reserved for flexible */
-+
-+	/* Step 6 : Release PHYA power down state */
-+	val = mt753x_reg_read(gsw, QPHY_PWR_STATE_CTRL(port_base));
-+	val &= ~PHYA_PWD;
-+	mt753x_reg_write(gsw, QPHY_PWR_STATE_CTRL(port_base), val);
-+
-+	/* Step 7 : Polling SGMII_LINK_STATUS */
-+	timeout_us = 2000000;
-+	timeout = ktime_add_us(ktime_get(), timeout_us);
-+	while (1) {
-+		val = mt753x_reg_read(gsw, PCS_CONTROL_1(port_base));
-+		val &= SGMII_LINK_STATUS;
-+
-+		if (val)
-+			break;
-+
-+		if (ktime_compare(ktime_get(), timeout) > 0)
-+			return -ETIMEDOUT;
-+	}
-+
-+	return 0;
-+}
-+
-+static int mt7531_set_port_sgmii_an_mode(struct gsw_mt753x *gsw, u32 port,
-+					 struct mt753x_port_cfg *port_cfg)
-+{
-+	u32 speed, port_base, val;
-+	ktime_t timeout;
-+	u32 timeout_us;
-+
-+	if (port < 5 || port >= MT753X_NUM_PORTS) {
-+		dev_info(gsw->dev, "port %d is not a SGMII port\n", port);
-+		return -EINVAL;
-+	}
-+
-+	port_base = port - 5;
-+
-+	switch (port_cfg->speed) {
-+	case MAC_SPD_1000:
-+		speed = RG_TPHY_SPEED_1000;
-+		break;
-+	case MAC_SPD_2500:
-+		speed = RG_TPHY_SPEED_2500;
-+		break;
-+	default:
-+		dev_info(gsw->dev, "invalid SGMII speed idx %d for port %d\n",
-+			 port_cfg->speed, port);
-+
-+		speed = RG_TPHY_SPEED_1000;
-+	}
-+
-+	/* Step 1: Speed select register setting */
-+	val = mt753x_reg_read(gsw, PHYA_CTRL_SIGNAL3(port_base));
-+	val &= ~RG_TPHY_SPEED_M;
-+	val |= speed << RG_TPHY_SPEED_S;
-+	mt753x_reg_write(gsw, PHYA_CTRL_SIGNAL3(port_base), val);
-+
-+	/* Step 2: Remote fault disable */
-+	val = mt753x_reg_read(gsw, SGMII_MODE(port));
-+	val |= SGMII_REMOTE_FAULT_DIS;
-+	mt753x_reg_write(gsw, SGMII_MODE(port), val);
-+
-+	/* Step 3: Setting Link partner's AN enable = 1 */
-+
-+	/* Step 4: Setting Link partner's device ability for speed/duplex */
-+
-+	/* Step 5: AN re-start */
-+	val = mt753x_reg_read(gsw, PCS_CONTROL_1(port));
-+	val |= SGMII_AN_RESTART;
-+	mt753x_reg_write(gsw, PCS_CONTROL_1(port), val);
-+
-+	/* Step 6: Special setting for PHYA ==> reserved for flexible */
-+
-+	/* Step 7 : Polling SGMII_LINK_STATUS */
-+	timeout_us = 2000000;
-+	timeout = ktime_add_us(ktime_get(), timeout_us);
-+	while (1) {
-+		val = mt753x_reg_read(gsw, PCS_CONTROL_1(port_base));
-+		val &= SGMII_LINK_STATUS;
-+
-+		if (val)
-+			break;
-+
-+		if (ktime_compare(ktime_get(), timeout) > 0)
-+			return -ETIMEDOUT;
-+	}
-+
-+	return 0;
-+}
-+
-+static int mt7531_set_port_rgmii(struct gsw_mt753x *gsw, u32 port)
-+{
-+	u32 val;
-+
-+	if (port != 5) {
-+		dev_info(gsw->dev, "RGMII mode is not available for port %d\n",
-+			 port);
-+		return -EINVAL;
-+	}
-+
-+	val = mt753x_reg_read(gsw, CLKGEN_CTRL);
-+	val |= GP_CLK_EN;
-+	val &= ~GP_MODE_M;
-+	val |= GP_MODE_RGMII << GP_MODE_S;
-+	val |= TXCLK_NO_REVERSE;
-+	val |= RXCLK_NO_DELAY;
-+	val &= ~CLK_SKEW_IN_M;
-+	val |= CLK_SKEW_IN_NO_CHANGE << CLK_SKEW_IN_S;
-+	val &= ~CLK_SKEW_OUT_M;
-+	val |= CLK_SKEW_OUT_NO_CHANGE << CLK_SKEW_OUT_S;
-+	mt753x_reg_write(gsw, CLKGEN_CTRL, val);
-+
-+	return 0;
-+}
-+
-+static int mt7531_mac_port_setup(struct gsw_mt753x *gsw, u32 port,
-+				 struct mt753x_port_cfg *port_cfg)
-+{
-+	u32 pmcr;
-+	u32 speed;
-+
-+	if (port < 5 || port >= MT753X_NUM_PORTS) {
-+		dev_info(gsw->dev, "port %d is not a MAC port\n", port);
-+		return -EINVAL;
-+	}
-+
-+	if (port_cfg->enabled) {
-+		pmcr = (IPG_96BIT_WITH_SHORT_IPG << IPG_CFG_S) |
-+		       MAC_MODE | MAC_TX_EN | MAC_RX_EN |
-+		       BKOFF_EN | BACKPR_EN;
-+
-+		if (port_cfg->force_link) {
-+			/* PMCR's speed field 0x11 is reserved,
-+			 * sw should set 0x10
-+			 */
-+			speed = port_cfg->speed;
-+			if (port_cfg->speed == MAC_SPD_2500)
-+				speed = MAC_SPD_1000;
-+
-+			pmcr |= FORCE_MODE_LNK | FORCE_LINK |
-+				FORCE_MODE_SPD | FORCE_MODE_DPX |
-+				FORCE_MODE_RX_FC | FORCE_MODE_TX_FC |
-+				FORCE_RX_FC | FORCE_TX_FC |
-+				(speed << FORCE_SPD_S);
-+
-+			if (port_cfg->duplex)
-+				pmcr |= FORCE_DPX;
-+		}
-+	} else {
-+		pmcr = FORCE_MODE_LNK;
-+	}
-+
-+	switch (port_cfg->phy_mode) {
-+	case PHY_INTERFACE_MODE_RGMII:
-+		mt7531_set_port_rgmii(gsw, port);
-+		break;
-+	case PHY_INTERFACE_MODE_SGMII:
-+		if (port_cfg->force_link)
-+			mt7531_set_port_sgmii_force_mode(gsw, port, port_cfg);
-+		else
-+			mt7531_set_port_sgmii_an_mode(gsw, port, port_cfg);
-+		break;
-+	default:
-+		if (port_cfg->enabled)
-+			dev_info(gsw->dev, "%s is not supported by port %d\n",
-+				 phy_modes(port_cfg->phy_mode), port);
-+
-+		pmcr = FORCE_MODE_LNK;
-+	}
-+
-+	mt753x_reg_write(gsw, PMCR(port), pmcr);
-+
-+	return 0;
-+}
-+
-+static void mt7531_core_pll_setup(struct gsw_mt753x *gsw)
-+{
-+	u32 hwstrap;
-+	u32 val;
-+
-+	val = mt753x_reg_read(gsw, TOP_SIG_SR);
-+	if (val & PAD_DUAL_SGMII_EN)
-+		return;
-+
-+	hwstrap = mt753x_reg_read(gsw, HWSTRAP);
-+
-+	switch ((hwstrap & XTAL_FSEL_M) >> XTAL_FSEL_S) {
-+	case XTAL_25MHZ:
-+		/* Step 1 : Disable MT7531 COREPLL */
-+		val = mt753x_reg_read(gsw, PLLGP_EN);
-+		val &= ~EN_COREPLL;
-+		mt753x_reg_write(gsw, PLLGP_EN, val);
-+
-+		/* Step 2: switch to XTAL output */
-+		val = mt753x_reg_read(gsw, PLLGP_EN);
-+		val |= SW_CLKSW;
-+		mt753x_reg_write(gsw, PLLGP_EN, val);
-+
-+		val = mt753x_reg_read(gsw, PLLGP_CR0);
-+		val &= ~RG_COREPLL_EN;
-+		mt753x_reg_write(gsw, PLLGP_CR0, val);
-+
-+		/* Step 3: disable PLLGP and enable program PLLGP */
-+		val = mt753x_reg_read(gsw, PLLGP_EN);
-+		val |= SW_PLLGP;
-+		mt753x_reg_write(gsw, PLLGP_EN, val);
-+
-+		/* Step 4: program COREPLL output frequency to 500MHz */
-+		val = mt753x_reg_read(gsw, PLLGP_CR0);
-+		val &= ~RG_COREPLL_POSDIV_M;
-+		val |= 2 << RG_COREPLL_POSDIV_S;
-+		mt753x_reg_write(gsw, PLLGP_CR0, val);
-+		usleep_range(25, 35);
-+
-+		val = mt753x_reg_read(gsw, PLLGP_CR0);
-+		val &= ~RG_COREPLL_SDM_PCW_M;
-+		val |= 0x140000 << RG_COREPLL_SDM_PCW_S;
-+		mt753x_reg_write(gsw, PLLGP_CR0, val);
-+
-+		/* Set feedback divide ratio update signal to high */
-+		val = mt753x_reg_read(gsw, PLLGP_CR0);
-+		val |= RG_COREPLL_SDM_PCW_CHG;
-+		mt753x_reg_write(gsw, PLLGP_CR0, val);
-+		/* Wait for at least 16 XTAL clocks */
-+		usleep_range(10, 20);
-+
-+		/* Step 5: set feedback divide ratio update signal to low */
-+		val = mt753x_reg_read(gsw, PLLGP_CR0);
-+		val &= ~RG_COREPLL_SDM_PCW_CHG;
-+		mt753x_reg_write(gsw, PLLGP_CR0, val);
-+
-+		/* Enable 325M clock for SGMII */
-+		mt753x_reg_write(gsw, ANA_PLLGP_CR5, 0xad0000);
-+
-+		/* Enable 250SSC clock for RGMII */
-+		mt753x_reg_write(gsw, ANA_PLLGP_CR2, 0x4f40000);
-+
-+		/* Step 6: Enable MT7531 PLL */
-+		val = mt753x_reg_read(gsw, PLLGP_CR0);
-+		val |= RG_COREPLL_EN;
-+		mt753x_reg_write(gsw, PLLGP_CR0, val);
-+
-+		val = mt753x_reg_read(gsw, PLLGP_EN);
-+		val |= EN_COREPLL;
-+		mt753x_reg_write(gsw, PLLGP_EN, val);
-+		usleep_range(25, 35);
-+
-+		break;
-+	case XTAL_40MHZ:
-+		/* Step 1 : Disable MT7531 COREPLL */
-+		val = mt753x_reg_read(gsw, PLLGP_EN);
-+		val &= ~EN_COREPLL;
-+		mt753x_reg_write(gsw, PLLGP_EN, val);
-+
-+		/* Step 2: switch to XTAL output */
-+		val = mt753x_reg_read(gsw, PLLGP_EN);
-+		val |= SW_CLKSW;
-+		mt753x_reg_write(gsw, PLLGP_EN, val);
-+
-+		val = mt753x_reg_read(gsw, PLLGP_CR0);
-+		val &= ~RG_COREPLL_EN;
-+		mt753x_reg_write(gsw, PLLGP_CR0, val);
-+
-+		/* Step 3: disable PLLGP and enable program PLLGP */
-+		val = mt753x_reg_read(gsw, PLLGP_EN);
-+		val |= SW_PLLGP;
-+		mt753x_reg_write(gsw, PLLGP_EN, val);
-+
-+		/* Step 4: program COREPLL output frequency to 500MHz */
-+		val = mt753x_reg_read(gsw, PLLGP_CR0);
-+		val &= ~RG_COREPLL_POSDIV_M;
-+		val |= 2 << RG_COREPLL_POSDIV_S;
-+		mt753x_reg_write(gsw, PLLGP_CR0, val);
-+		usleep_range(25, 35);
-+
-+		val = mt753x_reg_read(gsw, PLLGP_CR0);
-+		val &= ~RG_COREPLL_SDM_PCW_M;
-+		val |= 0x190000 << RG_COREPLL_SDM_PCW_S;
-+		mt753x_reg_write(gsw, PLLGP_CR0, val);
-+
-+		/* Set feedback divide ratio update signal to high */
-+		val = mt753x_reg_read(gsw, PLLGP_CR0);
-+		val |= RG_COREPLL_SDM_PCW_CHG;
-+		mt753x_reg_write(gsw, PLLGP_CR0, val);
-+		/* Wait for at least 16 XTAL clocks */
-+		usleep_range(10, 20);
-+
-+		/* Step 5: set feedback divide ratio update signal to low */
-+		val = mt753x_reg_read(gsw, PLLGP_CR0);
-+		val &= ~RG_COREPLL_SDM_PCW_CHG;
-+		mt753x_reg_write(gsw, PLLGP_CR0, val);
-+
-+		/* Enable 325M clock for SGMII */
-+		mt753x_reg_write(gsw, ANA_PLLGP_CR5, 0xad0000);
-+
-+		/* Enable 250SSC clock for RGMII */
-+		mt753x_reg_write(gsw, ANA_PLLGP_CR2, 0x4f40000);
-+
-+		/* Step 6: Enable MT7531 PLL */
-+		val = mt753x_reg_read(gsw, PLLGP_CR0);
-+		val |= RG_COREPLL_EN;
-+		mt753x_reg_write(gsw, PLLGP_CR0, val);
-+
-+		val = mt753x_reg_read(gsw, PLLGP_EN);
-+		val |= EN_COREPLL;
-+		mt753x_reg_write(gsw, PLLGP_EN, val);
-+		usleep_range(25, 35);
-+		break;
-+	}
-+}
-+
-+static int mt7531_internal_phy_calibration(struct gsw_mt753x *gsw)
-+{
-+	return 0;
-+}
-+
-+static int mt7531_sw_detect(struct gsw_mt753x *gsw, struct chip_rev *crev)
-+{
-+	u32 rev, topsig;
-+
-+	rev = mt753x_reg_read(gsw, CHIP_REV);
-+
-+	if (((rev & CHIP_NAME_M) >> CHIP_NAME_S) == MT7531) {
-+		if (crev) {
-+			topsig = mt753x_reg_read(gsw, TOP_SIG_SR);
-+
-+			crev->rev = rev & CHIP_REV_M;
-+			crev->name = topsig & PAD_DUAL_SGMII_EN ?
-+				     "MT7531AE" : "MT7531BE";
-+		}
-+
-+		return 0;
-+	}
-+
-+	return -ENODEV;
-+}
-+
-+static void pinmux_set_mux_7531(struct gsw_mt753x *gsw, u32 pin, u32 mode)
-+{
-+	u32 val;
-+
-+	val = mt753x_reg_read(gsw, GPIO_MODE_REGS(pin));
-+	val &= ~(0xf << (pin & 7) * GPIO_MODE_S);
-+	val |= mode << (pin & 7) * GPIO_MODE_S;
-+	mt753x_reg_write(gsw, GPIO_MODE_REGS(pin), val);
-+}
-+
-+static int mt7531_set_gpio_pinmux(struct gsw_mt753x *gsw)
-+{
-+	u32 group = 0;
-+	struct device_node *np = gsw->dev->of_node;
-+
-+	/* Set GPIO 0 interrupt mode */
-+	pinmux_set_mux_7531(gsw, gpio_int_pins[0], gpio_int_funcs[0]);
-+
-+	of_property_read_u32(np, "mediatek,mdio_master_pinmux", &group);
-+
-+	/* group = 0: do nothing, 1: 1st group (AE), 2: 2nd group (BE) */
-+	if (group > 0 && group <= 2) {
-+		group--;
-+		pinmux_set_mux_7531(gsw, gpio_mdc_pins[group],
-+				    gpio_mdc_funcs[group]);
-+		pinmux_set_mux_7531(gsw, gpio_mdio_pins[group],
-+				    gpio_mdio_funcs[group]);
-+	}
-+
-+	return 0;
-+}
-+
-+static void mt7531_phy_pll_setup(struct gsw_mt753x *gsw)
-+{
-+	u32 hwstrap;
-+	u32 val;
-+
-+	hwstrap = mt753x_reg_read(gsw, HWSTRAP);
-+
-+	switch ((hwstrap & XTAL_FSEL_M) >> XTAL_FSEL_S) {
-+	case XTAL_25MHZ:
-+		/* disable pll auto calibration */
-+		gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_104, 0x608);
-+
-+		/* change pll sel */
-+		val = gsw->mmd_read(gsw, 0, PHY_DEV1F,
-+				     PHY_DEV1F_REG_403);
-+		val &= ~(PHY_PLL_M);
-+		val |= PHY_PLL_SEL(3);
-+		gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_403, val);
-+
-+		/* set divider ratio */
-+		gsw->mmd_write(gsw, 0, PHY_DEV1F,
-+			       PHY_DEV1F_REG_10A, 0x1009);
-+
-+		/* set divider ratio */
-+		gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_10B, 0x7c6);
-+
-+		/* capacitance and resistance adjustment */
-+		gsw->mmd_write(gsw, 0, PHY_DEV1F,
-+			       PHY_DEV1F_REG_10C, 0xa8be);
-+
-+		break;
-+	case XTAL_40MHZ:
-+		/* disable pll auto calibration */
-+		gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_104, 0x608);
-+
-+		/* change pll sel */
-+		val = gsw->mmd_read(gsw, 0, PHY_DEV1F,
-+				     PHY_DEV1F_REG_403);
-+		val &= ~(PHY_PLL_M);
-+		val |= PHY_PLL_SEL(3);
-+		gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_403, val);
-+
-+		/* set divider ratio */
-+		gsw->mmd_write(gsw, 0, PHY_DEV1F,
-+			       PHY_DEV1F_REG_10A, 0x1018);
-+
-+		/* set divider ratio */
-+		gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_10B, 0xc676);
-+
-+		/* capacitance and resistance adjustment */
-+		gsw->mmd_write(gsw, 0, PHY_DEV1F,
-+			       PHY_DEV1F_REG_10C, 0xd8be);
-+		break;
-+	}
-+
-+	/* power down pll. additional delay is not required via mdio access */
-+	gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_10D, 0x10);
-+
-+	/* power up pll */
-+	gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_10D, 0x14);
-+}
-+
-+static void mt7531_phy_setting(struct gsw_mt753x *gsw)
-+{
-+	int i;
-+	u32 val;
-+
-+	/* Adjust DAC TX Delay */
-+	gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_44, 0xc0);
-+
-+	for (i = 0; i < MT753X_NUM_PHYS; i++) {
-+		/* Disable EEE */
-+		gsw->mmd_write(gsw, i, PHY_DEV07, PHY_DEV07_REG_03C, 0);
-+
-+		/* Enable HW auto downshift */
-+		gsw->mii_write(gsw, i, 0x1f, 0x1);
-+		val = gsw->mii_read(gsw, i, PHY_EXT_REG_14);
-+		val |= PHY_EN_DOWN_SHFIT;
-+		gsw->mii_write(gsw, i, PHY_EXT_REG_14, val);
-+
-+		/* Increase SlvDPSready time */
-+		gsw->mii_write(gsw, i, 0x1f, 0x52b5);
-+		gsw->mii_write(gsw, i, PHY_TR_REG_10, 0xafae);
-+		gsw->mii_write(gsw, i, PHY_TR_REG_12, 0x2f);
-+		gsw->mii_write(gsw, i, PHY_TR_REG_10, 0x8fae);
-+		gsw->mii_write(gsw, i, 0x1f, 0);
-+
-+		/* Adjust 100_mse_threshold */
-+		gsw->mmd_write(gsw, i, PHY_DEV1E, PHY_DEV1E_REG_123, 0xffff);
-+
-+		/* Disable mcc */
-+		gsw->mmd_write(gsw, i, PHY_DEV1E, PHY_DEV1E_REG_A6, 0x300);
-+
-+		/* PHY link down power saving enable */
-+		val = gsw->mii_read(gsw, i, PHY_EXT_REG_17);
-+		val |= PHY_LINKDOWN_POWER_SAVING_EN;
-+		gsw->mii_write(gsw, i, PHY_EXT_REG_17, val);
-+
-+		val = gsw->mmd_read(gsw, i, PHY_DEV1E, PHY_DEV1E_REG_0C6);
-+		val &= ~PHY_POWER_SAVING_M;
-+		val |= PHY_POWER_SAVING_TX << PHY_POWER_SAVING_S;
-+		gsw->mmd_write(gsw, i, PHY_DEV1E, PHY_DEV1E_REG_0C6, val);
-+
-+		/* Set TX Pair delay selection */
-+		gsw->mmd_write(gsw, i, PHY_DEV1E, PHY_DEV1E_REG_13, 0x404);
-+		gsw->mmd_write(gsw, i, PHY_DEV1E, PHY_DEV1E_REG_14, 0x404);
-+	}
-+}
-+
-+static void mt7531_adjust_line_driving(struct gsw_mt753x *gsw, u32 port)
-+{
-+	/* For ADC timing margin window for LDO calibration */
-+	gsw->mmd_write(gsw, port, PHY_DEV1E, RXADC_LDO_CONTROL_2, 0x2222);
-+
-+	/* Adjust AD sample timing */
-+	gsw->mmd_write(gsw, port, PHY_DEV1E, RXADC_CONTROL_3, 0x4444);
-+
-+	/* Adjust Line driver current for different mode */
-+	gsw->mmd_write(gsw, port, PHY_DEV1F, TXVLD_DA_271, 0x2ca5);
-+
-+	/* Adjust Line driver current for different mode */
-+	gsw->mmd_write(gsw, port, PHY_DEV1F, TXVLD_DA_272, 0xc6b);
-+
-+	/* Adjust Line driver amplitude for 10BT */
-+	gsw->mmd_write(gsw, port, PHY_DEV1F, TXVLD_DA_273, 0x3000);
-+
-+	/* Adjust RX Echo path filter */
-+	gsw->mmd_write(gsw, port, PHY_DEV1E, PHY_DEV1E_REG_0FE, 0x2);
-+
-+	/* Adjust RX HVGA bias current */
-+	gsw->mmd_write(gsw, port, PHY_DEV1E, PHY_DEV1E_REG_41, 0x3333);
-+
-+	/* Adjust TX class AB driver 1 */
-+	gsw->mmd_write(gsw, port, PHY_DEV1F, PHY_DEV1F_REG_268, 0x388);
-+
-+	/* Adjust TX class AB driver 2 */
-+	gsw->mmd_write(gsw, port, PHY_DEV1F, PHY_DEV1F_REG_269, 0x4448);
-+}
-+
-+static void mt7531_eee_setting(struct gsw_mt753x *gsw, u32 port)
-+{
-+	u32 tr_reg_control;
-+	u32 val;
-+
-+	/* Disable generate signal to clear the scramble_lock when lpi mode */
-+	val = gsw->mmd_read(gsw, port, PHY_DEV1E, PHY_DEV1E_REG_189);
-+	val &= ~DESCRAMBLER_CLEAR_EN;
-+	gsw->mmd_write(gsw, port, PHY_DEV1E, PHY_DEV1E_REG_189, val);
-+
-+	/* roll back CR*/
-+	gsw->mii_write(gsw, port, 0x1f, 0x52b5);
-+	gsw->mmd_write(gsw, port, 0x1e, 0x2d1, 0);
-+	tr_reg_control = (1 << 15) | (0 << 13) | (DSP_CH << 11) |
-+			 (DSP_NOD_ADDR << 7) | (0x8 << 1);
-+	gsw->mii_write(gsw, port, 17, 0x1b);
-+	gsw->mii_write(gsw, port, 18, 0);
-+	gsw->mii_write(gsw, port, 16, tr_reg_control);
-+	tr_reg_control = (1 << 15) | (0 << 13) | (DSP_CH << 11) |
-+			 (DSP_NOD_ADDR << 7) | (0xf << 1);
-+	gsw->mii_write(gsw, port, 17, 0);
-+	gsw->mii_write(gsw, port, 18, 0);
-+	gsw->mii_write(gsw, port, 16, tr_reg_control);
-+
-+	tr_reg_control = (1 << 15) | (0 << 13) | (DSP_CH << 11) |
-+			 (DSP_NOD_ADDR << 7) | (0x10 << 1);
-+	gsw->mii_write(gsw, port, 17, 0x500);
-+	gsw->mii_write(gsw, port, 18, 0);
-+	gsw->mii_write(gsw, port, 16, tr_reg_control);
-+	gsw->mii_write(gsw, port, 0x1f, 0);
-+}
-+
-+static int mt7531_sw_init(struct gsw_mt753x *gsw)
-+{
-+	int i;
-+	u32 val;
-+
-+	gsw->phy_base = (gsw->smi_addr + 1) & MT753X_SMI_ADDR_MASK;
-+
-+	gsw->mii_read = mt753x_mii_read;
-+	gsw->mii_write = mt753x_mii_write;
-+	gsw->mmd_read = mt753x_mmd_read;
-+	gsw->mmd_write = mt753x_mmd_write;
-+
-+	for (i = 0; i < MT753X_NUM_PHYS; i++) {
-+		val = gsw->mii_read(gsw, i, MII_BMCR);
-+		val |= BMCR_ISOLATE;
-+		gsw->mii_write(gsw, i, MII_BMCR, val);
-+	}
-+
-+	/* Force MAC link down before reset */
-+	mt753x_reg_write(gsw, PMCR(5), FORCE_MODE_LNK);
-+	mt753x_reg_write(gsw, PMCR(6), FORCE_MODE_LNK);
-+
-+	/* Switch soft reset */
-+	mt753x_reg_write(gsw, SYS_CTRL, SW_SYS_RST | SW_REG_RST);
-+	usleep_range(10, 20);
-+
-+	/* Enable MDC input Schmitt Trigger */
-+	val = mt753x_reg_read(gsw, SMT0_IOLB);
-+	mt753x_reg_write(gsw, SMT0_IOLB, val | SMT_IOLB_5_SMI_MDC_EN);
-+
-+	/* Set 7531 gpio pinmux */
-+	mt7531_set_gpio_pinmux(gsw);
-+
-+	/* Global mac control settings */
-+	mt753x_reg_write(gsw, GMACCR,
-+			 (15 << MTCC_LMT_S) | (11 << MAX_RX_JUMBO_S) |
-+			 RX_PKT_LEN_MAX_JUMBO);
-+
-+	mt7531_core_pll_setup(gsw);
-+	mt7531_mac_port_setup(gsw, 5, &gsw->port5_cfg);
-+	mt7531_mac_port_setup(gsw, 6, &gsw->port6_cfg);
-+
-+	return 0;
-+}
-+
-+static int mt7531_sw_post_init(struct gsw_mt753x *gsw)
-+{
-+	int i;
-+	u32 val;
-+
-+	mt7531_phy_pll_setup(gsw);
-+
-+	/* Internal PHYs are disabled by default. SW should enable them.
-+	 * Note that this may already be enabled in bootloader stage.
-+	 */
-+	val = gsw->mmd_read(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_403);
-+	val |= PHY_EN_BYPASS_MODE;
-+	val &= ~POWER_ON_OFF;
-+	gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_403, val);
-+
-+	mt7531_phy_setting(gsw);
-+
-+	for (i = 0; i < MT753X_NUM_PHYS; i++) {
-+		val = gsw->mii_read(gsw, i, MII_BMCR);
-+		val &= ~BMCR_ISOLATE;
-+		gsw->mii_write(gsw, i, MII_BMCR, val);
-+	}
-+
-+	for (i = 0; i < MT753X_NUM_PHYS; i++)
-+		mt7531_adjust_line_driving(gsw, i);
-+
-+	for (i = 0; i < MT753X_NUM_PHYS; i++)
-+		mt7531_eee_setting(gsw, i);
-+
-+	val = mt753x_reg_read(gsw, CHIP_REV);
-+	val &= CHIP_REV_M;
-+	if (val == CHIP_REV_E1) {
-+		mt7531_internal_phy_calibration(gsw);
-+	} else {
-+		val = mt753x_reg_read(gsw, GBE_EFUSE);
-+		if (val & GBE_SEL_EFUSE_EN) {
-+			val = gsw->mmd_read(gsw, 0, PHY_DEV1F,
-+					    PHY_DEV1F_REG_403);
-+			val &= ~GBE_EFUSE_SETTING;
-+			gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_403,
-+				       val);
-+		} else {
-+			mt7531_internal_phy_calibration(gsw);
-+		}
-+	}
-+
-+	return 0;
-+}
-+
-+struct mt753x_sw_id mt7531_id = {
-+	.model = MT7531,
-+	.detect = mt7531_sw_detect,
-+	.init = mt7531_sw_init,
-+	.post_init = mt7531_sw_post_init
-+};
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Zhanguo Ju <zhanguo.ju@mediatek.com>");
-+MODULE_DESCRIPTION("Driver for MediaTek MT753x Gigabit Switch");
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt7531.h b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt7531.h
-new file mode 100644
-index 0000000000..52c8a49fd3
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt7531.h
-@@ -0,0 +1,13 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+/*
-+ * Copyright (c) 2018 MediaTek Inc.
-+ */
-+
-+#ifndef _MT7531_H_
-+#define _MT7531_H_
-+
-+#include "mt753x.h"
-+
-+extern struct mt753x_sw_id mt7531_id;
-+
-+#endif /* _MT7531_H_ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x.h b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x.h
-new file mode 100644
-index 0000000000..27cd6f4f1e
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x.h
-@@ -0,0 +1,213 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+/*
-+ * Copyright (c) 2018 MediaTek Inc.
-+ * Author: Weijie Gao <weijie.gao@mediatek.com>
-+ */
-+
-+#ifndef _MT753X_H_
-+#define _MT753X_H_
-+
-+#include <linux/list.h>
-+#include <linux/mutex.h>
-+#include <linux/netdevice.h>
-+#include <linux/of_mdio.h>
-+#include <linux/workqueue.h>
-+#include <linux/gpio/consumer.h>
-+
-+#ifdef CONFIG_SWCONFIG
-+#include <linux/switch.h>
-+#endif
-+
-+#include "mt753x_vlan.h"
-+
-+#define MT753X_DFL_CPU_PORT	6
-+#define MT753X_NUM_PHYS		5
-+
-+#define MT753X_DFL_SMI_ADDR	0x1f
-+#define MT753X_SMI_ADDR_MASK	0x1f
-+
-+struct gsw_mt753x;
-+
-+enum mt753x_model {
-+	MT7530 = 0x7530,
-+	MT7531 = 0x7531
-+};
-+
-+struct mt753x_port_cfg {
-+	struct device_node *np;
-+	phy_interface_t phy_mode;
-+	u32 enabled: 1;
-+	u32 force_link: 1;
-+	u32 speed: 2;
-+	u32 duplex: 1;
-+};
-+
-+struct mt753x_phy {
-+	struct gsw_mt753x *gsw;
-+	struct net_device netdev;
-+	struct phy_device *phydev;
-+};
-+
-+struct gsw_mt753x {
-+	u32 id;
-+
-+	struct device *dev;
-+	struct mii_bus *host_bus;
-+	struct mii_bus *gphy_bus;
-+	struct mutex mii_lock;	/* MII access lock */
-+	u32 smi_addr;
-+	u32 phy_base;
-+	int direct_phy_access;
-+
-+	enum mt753x_model model;
-+	const char *name;
-+
-+	struct mt753x_port_cfg port5_cfg;
-+	struct mt753x_port_cfg port6_cfg;
-+
-+	int phy_status_poll;
-+	struct mt753x_phy phys[MT753X_NUM_PHYS];
-+
-+	int phy_link_sts;
-+
-+	int irq;
-+	int reset_pin;
-+	struct work_struct irq_worker;
-+
-+#ifdef CONFIG_SWCONFIG
-+	struct switch_dev swdev;
-+	u32 cpu_port;
-+#endif
-+
-+	int global_vlan_enable;
-+	struct mt753x_vlan_entry vlan_entries[MT753X_NUM_VLANS];
-+	struct mt753x_port_entry port_entries[MT753X_NUM_PORTS];
-+
-+	int (*mii_read)(struct gsw_mt753x *gsw, int phy, int reg);
-+	void (*mii_write)(struct gsw_mt753x *gsw, int phy, int reg, u16 val);
-+
-+	int (*mmd_read)(struct gsw_mt753x *gsw, int addr, int devad, u16 reg);
-+	void (*mmd_write)(struct gsw_mt753x *gsw, int addr, int devad, u16 reg,
-+			  u16 val);
-+
-+	struct list_head list;
-+};
-+
-+struct chip_rev {
-+	const char *name;
-+	u32 rev;
-+};
-+
-+struct mt753x_sw_id {
-+	enum mt753x_model model;
-+	int (*detect)(struct gsw_mt753x *gsw, struct chip_rev *crev);
-+	int (*init)(struct gsw_mt753x *gsw);
-+	int (*post_init)(struct gsw_mt753x *gsw);
-+};
-+
-+extern struct list_head mt753x_devs;
-+
-+struct gsw_mt753x *mt753x_get_gsw(u32 id);
-+struct gsw_mt753x *mt753x_get_first_gsw(void);
-+void mt753x_put_gsw(void);
-+void mt753x_lock_gsw(void);
-+
-+u32 mt753x_reg_read(struct gsw_mt753x *gsw, u32 reg);
-+void mt753x_reg_write(struct gsw_mt753x *gsw, u32 reg, u32 val);
-+
-+int mt753x_mii_read(struct gsw_mt753x *gsw, int phy, int reg);
-+void mt753x_mii_write(struct gsw_mt753x *gsw, int phy, int reg, u16 val);
-+
-+int mt753x_mmd_read(struct gsw_mt753x *gsw, int addr, int devad, u16 reg);
-+void mt753x_mmd_write(struct gsw_mt753x *gsw, int addr, int devad, u16 reg,
-+		      u16 val);
-+
-+int mt753x_mmd_ind_read(struct gsw_mt753x *gsw, int addr, int devad, u16 reg);
-+void mt753x_mmd_ind_write(struct gsw_mt753x *gsw, int addr, int devad, u16 reg,
-+			  u16 val);
-+
-+void mt753x_irq_worker(struct work_struct *work);
-+void mt753x_irq_enable(struct gsw_mt753x *gsw);
-+
-+/* MDIO Indirect Access Registers */
-+#define MII_MMD_ACC_CTL_REG		0x0d
-+#define MMD_CMD_S			14
-+#define MMD_CMD_M			0xc000
-+#define MMD_DEVAD_S			0
-+#define MMD_DEVAD_M			0x1f
-+
-+/* MMD_CMD: MMD commands */
-+#define MMD_ADDR			0
-+#define MMD_DATA			1
-+
-+#define MII_MMD_ADDR_DATA_REG		0x0e
-+
-+/* Procedure of MT753x Internal Register Access
-+ *
-+ * 1. Internal Register Address
-+ *
-+ *    The MT753x has a 16-bit register address and each register is 32-bit.
-+ *    This means the lowest two bits are not used as the register address is
-+ *    4-byte aligned.
-+ *
-+ *    Rest of the valid bits are divided into two parts:
-+ *      Bit 15..6 is the Page address
-+ *      Bit 5..2 is the low address
-+ *
-+ *    -------------------------------------------------------------------
-+ *    | 15  14  13  12  11  10   9   8   7   6 | 5   4   3   2 | 1   0  |
-+ *    |----------------------------------------|---------------|--------|
-+ *    |              Page Address              |    Address    | Unused |
-+ *    -------------------------------------------------------------------
-+ *
-+ * 2. MDIO access timing
-+ *
-+ *    The MT753x uses the following MDIO timing for a single register read
-+ *
-+ *      Phase 1: Write Page Address
-+ *    -------------------------------------------------------------------
-+ *    | ST | OP | PHY_ADDR | TYPE | RSVD | TA |  RSVD |    PAGE_ADDR    |
-+ *    -------------------------------------------------------------------
-+ *    | 01 | 01 |   11111  |   1  | 1111 | xx | 00000 | REG_ADDR[15..6] |
-+ *    -------------------------------------------------------------------
-+ *
-+ *      Phase 2: Write low Address & Read low word
-+ *    -------------------------------------------------------------------
-+ *    | ST | OP | PHY_ADDR | TYPE |    LOW_ADDR    | TA |      DATA     |
-+ *    -------------------------------------------------------------------
-+ *    | 01 | 10 |   11111  |   0  | REG_ADDR[5..2] | xx |  DATA[15..0]  |
-+ *    -------------------------------------------------------------------
-+ *
-+ *      Phase 3: Read high word
-+ *    -------------------------------------------------------------------
-+ *    | ST | OP | PHY_ADDR | TYPE | RSVD | TA |           DATA          |
-+ *    -------------------------------------------------------------------
-+ *    | 01 | 10 |   11111  |   1  | 0000 | xx |       DATA[31..16]      |
-+ *    -------------------------------------------------------------------
-+ *
-+ *    The MT753x uses the following MDIO timing for a single register write
-+ *
-+ *      Phase 1: Write Page Address (The same as read)
-+ *
-+ *      Phase 2: Write low Address and low word
-+ *    -------------------------------------------------------------------
-+ *    | ST | OP | PHY_ADDR | TYPE |    LOW_ADDR    | TA |      DATA     |
-+ *    -------------------------------------------------------------------
-+ *    | 01 | 01 |   11111  |   0  | REG_ADDR[5..2] | xx |  DATA[15..0]  |
-+ *    -------------------------------------------------------------------
-+ *
-+ *      Phase 3: write high word
-+ *    -------------------------------------------------------------------
-+ *    | ST | OP | PHY_ADDR | TYPE | RSVD | TA |           DATA          |
-+ *    -------------------------------------------------------------------
-+ *    | 01 | 01 |   11111  |   1  | 0000 | xx |       DATA[31..16]      |
-+ *    -------------------------------------------------------------------
-+ *
-+ */
-+
-+/* Internal Register Address fields */
-+#define MT753X_REG_PAGE_ADDR_S		6
-+#define MT753X_REG_PAGE_ADDR_M		0xffc0
-+#define MT753X_REG_ADDR_S		2
-+#define MT753X_REG_ADDR_M		0x3c
-+#endif /* _MT753X_H_ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_common.c b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_common.c
-new file mode 100644
-index 0000000000..4015ddf125
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_common.c
-@@ -0,0 +1,90 @@
-+// SPDX-License-Identifier: GPL-2.0-only
-+/*
-+ * Copyright (c) 2018 MediaTek Inc.
-+ * Author: Weijie Gao <weijie.gao@mediatek.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/delay.h>
-+
-+#include "mt753x.h"
-+#include "mt753x_regs.h"
-+
-+void mt753x_irq_enable(struct gsw_mt753x *gsw)
-+{
-+	u32 val;
-+	int i;
-+
-+	/* Record initial PHY link status */
-+	for (i = 0; i < MT753X_NUM_PHYS; i++) {
-+		val = gsw->mii_read(gsw, i, MII_BMSR);
-+		if (val & BMSR_LSTATUS)
-+			gsw->phy_link_sts |= BIT(i);
-+	}
-+
-+	val = BIT(MT753X_NUM_PHYS) - 1;
-+
-+	mt753x_reg_write(gsw, SYS_INT_EN, val);
-+}
-+
-+static void display_port_link_status(struct gsw_mt753x *gsw, u32 port)
-+{
-+	u32 pmsr, speed_bits;
-+	const char *speed;
-+
-+	pmsr = mt753x_reg_read(gsw, PMSR(port));
-+
-+	speed_bits = (pmsr & MAC_SPD_STS_M) >> MAC_SPD_STS_S;
-+
-+	switch (speed_bits) {
-+	case MAC_SPD_10:
-+		speed = "10Mbps";
-+		break;
-+	case MAC_SPD_100:
-+		speed = "100Mbps";
-+		break;
-+	case MAC_SPD_1000:
-+		speed = "1Gbps";
-+		break;
-+	case MAC_SPD_2500:
-+		speed = "2.5Gbps";
-+		break;
-+	}
-+
-+	if (pmsr & MAC_LNK_STS) {
-+		dev_info(gsw->dev, "Port %d Link is Up - %s/%s\n",
-+			 port, speed, (pmsr & MAC_DPX_STS) ? "Full" : "Half");
-+	} else {
-+		dev_info(gsw->dev, "Port %d Link is Down\n", port);
-+	}
-+}
-+
-+void mt753x_irq_worker(struct work_struct *work)
-+{
-+	struct gsw_mt753x *gsw;
-+	u32 sts, physts, laststs;
-+	int i;
-+
-+	gsw = container_of(work, struct gsw_mt753x, irq_worker);
-+
-+	sts = mt753x_reg_read(gsw, SYS_INT_STS);
-+
-+	/* Check for changed PHY link status */
-+	for (i = 0; i < MT753X_NUM_PHYS; i++) {
-+		if (!(sts & PHY_LC_INT(i)))
-+			continue;
-+
-+		laststs = gsw->phy_link_sts & BIT(i);
-+		physts = !!(gsw->mii_read(gsw, i, MII_BMSR) & BMSR_LSTATUS);
-+		physts <<= i;
-+
-+		if (physts ^ laststs) {
-+			gsw->phy_link_sts ^= BIT(i);
-+			display_port_link_status(gsw, i);
-+		}
-+	}
-+
-+	mt753x_reg_write(gsw, SYS_INT_STS, sts);
-+
-+	enable_irq(gsw->irq);
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_mdio.c b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_mdio.c
-new file mode 100644
-index 0000000000..3e2e6d68ae
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_mdio.c
-@@ -0,0 +1,597 @@
-+// SPDX-License-Identifier: GPL-2.0-only
-+/*
-+ * Copyright (c) 2018 MediaTek Inc.
-+ * Author: Weijie Gao <weijie.gao@mediatek.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/delay.h>
-+#include <linux/reset.h>
-+#include <linux/hrtimer.h>
-+#include <linux/mii.h>
-+#include <linux/of_mdio.h>
-+#include <linux/of_platform.h>
-+#include <linux/of_gpio.h>
-+#include <linux/of_net.h>
-+#include <linux/of_irq.h>
-+#include <linux/phy.h>
-+
-+#include "mt753x.h"
-+#include "mt753x_swconfig.h"
-+#include "mt753x_regs.h"
-+#include "mt753x_nl.h"
-+#include "mt7530.h"
-+#include "mt7531.h"
-+
-+static u32 mt753x_id;
-+struct list_head mt753x_devs;
-+static DEFINE_MUTEX(mt753x_devs_lock);
-+
-+static struct mt753x_sw_id *mt753x_sw_ids[] = {
-+	&mt7530_id,
-+	&mt7531_id,
-+};
-+
-+u32 mt753x_reg_read(struct gsw_mt753x *gsw, u32 reg)
-+{
-+	u32 high, low;
-+
-+	mutex_lock(&gsw->host_bus->mdio_lock);
-+
-+	gsw->host_bus->write(gsw->host_bus, gsw->smi_addr, 0x1f,
-+		(reg & MT753X_REG_PAGE_ADDR_M) >> MT753X_REG_PAGE_ADDR_S);
-+
-+	low = gsw->host_bus->read(gsw->host_bus, gsw->smi_addr,
-+		(reg & MT753X_REG_ADDR_M) >> MT753X_REG_ADDR_S);
-+
-+	high = gsw->host_bus->read(gsw->host_bus, gsw->smi_addr, 0x10);
-+
-+	mutex_unlock(&gsw->host_bus->mdio_lock);
-+
-+	return (high << 16) | (low & 0xffff);
-+}
-+
-+void mt753x_reg_write(struct gsw_mt753x *gsw, u32 reg, u32 val)
-+{
-+	mutex_lock(&gsw->host_bus->mdio_lock);
-+
-+	gsw->host_bus->write(gsw->host_bus, gsw->smi_addr, 0x1f,
-+		(reg & MT753X_REG_PAGE_ADDR_M) >> MT753X_REG_PAGE_ADDR_S);
-+
-+	gsw->host_bus->write(gsw->host_bus, gsw->smi_addr,
-+		(reg & MT753X_REG_ADDR_M) >> MT753X_REG_ADDR_S, val & 0xffff);
-+
-+	gsw->host_bus->write(gsw->host_bus, gsw->smi_addr, 0x10, val >> 16);
-+
-+	mutex_unlock(&gsw->host_bus->mdio_lock);
-+}
-+
-+/* Indirect MDIO clause 22/45 access */
-+static int mt753x_mii_rw(struct gsw_mt753x *gsw, int phy, int reg, u16 data,
-+			 u32 cmd, u32 st)
-+{
-+	ktime_t timeout;
-+	u32 val, timeout_us;
-+	int ret = 0;
-+
-+	timeout_us = 100000;
-+	timeout = ktime_add_us(ktime_get(), timeout_us);
-+	while (1) {
-+		val = mt753x_reg_read(gsw, PHY_IAC);
-+
-+		if ((val & PHY_ACS_ST) == 0)
-+			break;
-+
-+		if (ktime_compare(ktime_get(), timeout) > 0)
-+			return -ETIMEDOUT;
-+	}
-+
-+	val = (st << MDIO_ST_S) |
-+	      ((cmd << MDIO_CMD_S) & MDIO_CMD_M) |
-+	      ((phy << MDIO_PHY_ADDR_S) & MDIO_PHY_ADDR_M) |
-+	      ((reg << MDIO_REG_ADDR_S) & MDIO_REG_ADDR_M);
-+
-+	if (cmd == MDIO_CMD_WRITE || cmd == MDIO_CMD_ADDR)
-+		val |= data & MDIO_RW_DATA_M;
-+
-+	mt753x_reg_write(gsw, PHY_IAC, val | PHY_ACS_ST);
-+
-+	timeout_us = 100000;
-+	timeout = ktime_add_us(ktime_get(), timeout_us);
-+	while (1) {
-+		val = mt753x_reg_read(gsw, PHY_IAC);
-+
-+		if ((val & PHY_ACS_ST) == 0)
-+			break;
-+
-+		if (ktime_compare(ktime_get(), timeout) > 0)
-+			return -ETIMEDOUT;
-+	}
-+
-+	if (cmd == MDIO_CMD_READ || cmd == MDIO_CMD_READ_C45) {
-+		val = mt753x_reg_read(gsw, PHY_IAC);
-+		ret = val & MDIO_RW_DATA_M;
-+	}
-+
-+	return ret;
-+}
-+
-+int mt753x_mii_read(struct gsw_mt753x *gsw, int phy, int reg)
-+{
-+	int val;
-+
-+	if (phy < MT753X_NUM_PHYS)
-+		phy = (gsw->phy_base + phy) & MT753X_SMI_ADDR_MASK;
-+
-+	mutex_lock(&gsw->mii_lock);
-+	val = mt753x_mii_rw(gsw, phy, reg, 0, MDIO_CMD_READ, MDIO_ST_C22);
-+	mutex_unlock(&gsw->mii_lock);
-+
-+	return val;
-+}
-+
-+void mt753x_mii_write(struct gsw_mt753x *gsw, int phy, int reg, u16 val)
-+{
-+	if (phy < MT753X_NUM_PHYS)
-+		phy = (gsw->phy_base + phy) & MT753X_SMI_ADDR_MASK;
-+
-+	mutex_lock(&gsw->mii_lock);
-+	mt753x_mii_rw(gsw, phy, reg, val, MDIO_CMD_WRITE, MDIO_ST_C22);
-+	mutex_unlock(&gsw->mii_lock);
-+}
-+
-+int mt753x_mmd_read(struct gsw_mt753x *gsw, int addr, int devad, u16 reg)
-+{
-+	int val;
-+
-+	if (addr < MT753X_NUM_PHYS)
-+		addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK;
-+
-+	mutex_lock(&gsw->mii_lock);
-+	mt753x_mii_rw(gsw, addr, devad, reg, MDIO_CMD_ADDR, MDIO_ST_C45);
-+	val = mt753x_mii_rw(gsw, addr, devad, 0, MDIO_CMD_READ_C45,
-+			    MDIO_ST_C45);
-+	mutex_unlock(&gsw->mii_lock);
-+
-+	return val;
-+}
-+
-+void mt753x_mmd_write(struct gsw_mt753x *gsw, int addr, int devad, u16 reg,
-+		      u16 val)
-+{
-+	if (addr < MT753X_NUM_PHYS)
-+		addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK;
-+
-+	mutex_lock(&gsw->mii_lock);
-+	mt753x_mii_rw(gsw, addr, devad, reg, MDIO_CMD_ADDR, MDIO_ST_C45);
-+	mt753x_mii_rw(gsw, addr, devad, val, MDIO_CMD_WRITE, MDIO_ST_C45);
-+	mutex_unlock(&gsw->mii_lock);
-+}
-+
-+int mt753x_mmd_ind_read(struct gsw_mt753x *gsw, int addr, int devad, u16 reg)
-+{
-+	u16 val;
-+
-+	if (addr < MT753X_NUM_PHYS)
-+		addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK;
-+
-+	mutex_lock(&gsw->mii_lock);
-+
-+	mt753x_mii_rw(gsw, addr, MII_MMD_ACC_CTL_REG,
-+		      (MMD_ADDR << MMD_CMD_S) |
-+		      ((devad << MMD_DEVAD_S) & MMD_DEVAD_M),
-+		      MDIO_CMD_WRITE, MDIO_ST_C22);
-+
-+	mt753x_mii_rw(gsw, addr, MII_MMD_ADDR_DATA_REG, reg,
-+		      MDIO_CMD_WRITE, MDIO_ST_C22);
-+
-+	mt753x_mii_rw(gsw, addr, MII_MMD_ACC_CTL_REG,
-+		      (MMD_DATA << MMD_CMD_S) |
-+		      ((devad << MMD_DEVAD_S) & MMD_DEVAD_M),
-+		      MDIO_CMD_WRITE, MDIO_ST_C22);
-+
-+	val = mt753x_mii_rw(gsw, addr, MII_MMD_ADDR_DATA_REG, 0,
-+			    MDIO_CMD_READ, MDIO_ST_C22);
-+
-+	mutex_unlock(&gsw->mii_lock);
-+
-+	return val;
-+}
-+
-+void mt753x_mmd_ind_write(struct gsw_mt753x *gsw, int addr, int devad, u16 reg,
-+			  u16 val)
-+{
-+	if (addr < MT753X_NUM_PHYS)
-+		addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK;
-+
-+	mutex_lock(&gsw->mii_lock);
-+
-+	mt753x_mii_rw(gsw, addr, MII_MMD_ACC_CTL_REG,
-+		      (MMD_ADDR << MMD_CMD_S) |
-+		      ((devad << MMD_DEVAD_S) & MMD_DEVAD_M),
-+		      MDIO_CMD_WRITE, MDIO_ST_C22);
-+
-+	mt753x_mii_rw(gsw, addr, MII_MMD_ADDR_DATA_REG, reg,
-+		      MDIO_CMD_WRITE, MDIO_ST_C22);
-+
-+	mt753x_mii_rw(gsw, addr, MII_MMD_ACC_CTL_REG,
-+		      (MMD_DATA << MMD_CMD_S) |
-+		      ((devad << MMD_DEVAD_S) & MMD_DEVAD_M),
-+		      MDIO_CMD_WRITE, MDIO_ST_C22);
-+
-+	mt753x_mii_rw(gsw, addr, MII_MMD_ADDR_DATA_REG, val,
-+		      MDIO_CMD_WRITE, MDIO_ST_C22);
-+
-+	mutex_unlock(&gsw->mii_lock);
-+}
-+
-+static inline int mt753x_get_duplex(const struct device_node *np)
-+{
-+	return of_property_read_bool(np, "full-duplex");
-+}
-+
-+static void mt753x_load_port_cfg(struct gsw_mt753x *gsw)
-+{
-+	struct device_node *port_np;
-+	struct device_node *fixed_link_node;
-+	struct mt753x_port_cfg *port_cfg;
-+	u32 port;
-+
-+	for_each_child_of_node(gsw->dev->of_node, port_np) {
-+		if (!of_device_is_compatible(port_np, "mediatek,mt753x-port"))
-+			continue;
-+
-+		if (!of_device_is_available(port_np))
-+			continue;
-+
-+		if (of_property_read_u32(port_np, "reg", &port))
-+			continue;
-+
-+		switch (port) {
-+		case 5:
-+			port_cfg = &gsw->port5_cfg;
-+			break;
-+		case 6:
-+			port_cfg = &gsw->port6_cfg;
-+			break;
-+		default:
-+			continue;
-+		}
-+
-+		if (port_cfg->enabled) {
-+			dev_info(gsw->dev, "duplicated node for port%d\n",
-+				 port_cfg->phy_mode);
-+			continue;
-+		}
-+
-+		port_cfg->np = port_np;
-+
-+		if (of_get_phy_mode(port_np, &port_cfg->phy_mode) < 0) {
-+			dev_info(gsw->dev, "incorrect phy-mode %d\n", port);
-+			continue;
-+		}
-+
-+		fixed_link_node = of_get_child_by_name(port_np, "fixed-link");
-+		if (fixed_link_node) {
-+			u32 speed;
-+
-+			port_cfg->force_link = 1;
-+			port_cfg->duplex = mt753x_get_duplex(fixed_link_node);
-+
-+			if (of_property_read_u32(fixed_link_node, "speed",
-+						 &speed)) {
-+				speed = 0;
-+				continue;
-+			}
-+
-+			of_node_put(fixed_link_node);
-+
-+			switch (speed) {
-+			case 10:
-+				port_cfg->speed = MAC_SPD_10;
-+				break;
-+			case 100:
-+				port_cfg->speed = MAC_SPD_100;
-+				break;
-+			case 1000:
-+				port_cfg->speed = MAC_SPD_1000;
-+				break;
-+			case 2500:
-+				port_cfg->speed = MAC_SPD_2500;
-+				break;
-+			default:
-+				dev_info(gsw->dev, "incorrect speed %d\n",
-+					 speed);
-+				continue;
-+			}
-+		}
-+
-+		port_cfg->enabled = 1;
-+	}
-+}
-+
-+static void mt753x_add_gsw(struct gsw_mt753x *gsw)
-+{
-+	mutex_lock(&mt753x_devs_lock);
-+	gsw->id = mt753x_id++;
-+	INIT_LIST_HEAD(&gsw->list);
-+	list_add_tail(&gsw->list, &mt753x_devs);
-+	mutex_unlock(&mt753x_devs_lock);
-+}
-+
-+static void mt753x_remove_gsw(struct gsw_mt753x *gsw)
-+{
-+	mutex_lock(&mt753x_devs_lock);
-+	list_del(&gsw->list);
-+	mutex_unlock(&mt753x_devs_lock);
-+}
-+
-+
-+struct gsw_mt753x *mt753x_get_gsw(u32 id)
-+{
-+	struct gsw_mt753x *dev;
-+
-+	mutex_lock(&mt753x_devs_lock);
-+
-+	list_for_each_entry(dev, &mt753x_devs, list) {
-+		if (dev->id == id)
-+			return dev;
-+	}
-+
-+	mutex_unlock(&mt753x_devs_lock);
-+
-+	return NULL;
-+}
-+
-+struct gsw_mt753x *mt753x_get_first_gsw(void)
-+{
-+	struct gsw_mt753x *dev;
-+
-+	mutex_lock(&mt753x_devs_lock);
-+
-+	list_for_each_entry(dev, &mt753x_devs, list)
-+		return dev;
-+
-+	mutex_unlock(&mt753x_devs_lock);
-+
-+	return NULL;
-+}
-+
-+void mt753x_put_gsw(void)
-+{
-+	mutex_unlock(&mt753x_devs_lock);
-+}
-+
-+void mt753x_lock_gsw(void)
-+{
-+	mutex_lock(&mt753x_devs_lock);
-+}
-+
-+static int mt753x_hw_reset(struct gsw_mt753x *gsw)
-+{
-+	struct device_node *np = gsw->dev->of_node;
-+	struct reset_control *rstc;
-+	int mcm;
-+	int ret = -EINVAL;
-+
-+	mcm = of_property_read_bool(np, "mediatek,mcm");
-+	if (mcm) {
-+		rstc = devm_reset_control_get(gsw->dev, "mcm");
-+		ret = IS_ERR(rstc);
-+		if (IS_ERR(rstc)) {
-+			dev_err(gsw->dev, "Missing reset ctrl of switch\n");
-+			return ret;
-+		}
-+
-+		reset_control_assert(rstc);
-+		msleep(30);
-+		reset_control_deassert(rstc);
-+
-+		gsw->reset_pin = -1;
-+		return 0;
-+	}
-+
-+	gsw->reset_pin = of_get_named_gpio(np, "reset-gpios", 0);
-+	if (gsw->reset_pin < 0) {
-+		dev_err(gsw->dev, "Missing reset pin of switch\n");
-+		return ret;
-+	}
-+
-+	ret = devm_gpio_request(gsw->dev, gsw->reset_pin, "mt753x-reset");
-+	if (ret) {
-+		dev_info(gsw->dev, "Failed to request gpio %d\n",
-+			 gsw->reset_pin);
-+		return ret;
-+	}
-+
-+	gpio_direction_output(gsw->reset_pin, 0);
-+	msleep(30);
-+	gpio_set_value(gsw->reset_pin, 1);
-+	msleep(500);
-+
-+	return 0;
-+}
-+
-+static irqreturn_t mt753x_irq_handler(int irq, void *dev)
-+{
-+	struct gsw_mt753x *gsw = dev;
-+
-+	disable_irq_nosync(gsw->irq);
-+
-+	schedule_work(&gsw->irq_worker);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static int mt753x_probe(struct platform_device *pdev)
-+{
-+	struct gsw_mt753x *gsw;
-+	struct mt753x_sw_id *sw;
-+	struct device_node *np = pdev->dev.of_node;
-+	struct device_node *mdio;
-+	struct mii_bus *mdio_bus;
-+	int ret = -EINVAL;
-+	struct chip_rev rev;
-+	struct mt753x_mapping *map;
-+	int i;
-+
-+	mdio = of_parse_phandle(np, "mediatek,mdio", 0);
-+	if (!mdio)
-+		return -EINVAL;
-+
-+	mdio_bus = of_mdio_find_bus(mdio);
-+	if (!mdio_bus)
-+		return -EPROBE_DEFER;
-+
-+	gsw = devm_kzalloc(&pdev->dev, sizeof(struct gsw_mt753x), GFP_KERNEL);
-+	if (!gsw)
-+		return -ENOMEM;
-+
-+	gsw->host_bus = mdio_bus;
-+	gsw->dev = &pdev->dev;
-+	mutex_init(&gsw->mii_lock);
-+
-+	/* Switch hard reset */
-+	if (mt753x_hw_reset(gsw))
-+		goto fail;
-+
-+	/* Fetch the SMI address dirst */
-+	if (of_property_read_u32(np, "mediatek,smi-addr", &gsw->smi_addr))
-+		gsw->smi_addr = MT753X_DFL_SMI_ADDR;
-+
-+	/* Get LAN/WAN port mapping */
-+	map = mt753x_find_mapping(np);
-+	if (map) {
-+		mt753x_apply_mapping(gsw, map);
-+		gsw->global_vlan_enable = 1;
-+		dev_info(gsw->dev, "LAN/WAN VLAN setting=%s\n", map->name);
-+	}
-+
-+	/* Load MAC port configurations */
-+	mt753x_load_port_cfg(gsw);
-+
-+	/* Check for valid switch and then initialize */
-+	for (i = 0; i < ARRAY_SIZE(mt753x_sw_ids); i++) {
-+		if (!mt753x_sw_ids[i]->detect(gsw, &rev)) {
-+			sw = mt753x_sw_ids[i];
-+
-+			gsw->name = rev.name;
-+			gsw->model = sw->model;
-+
-+			dev_info(gsw->dev, "Switch is MediaTek %s rev %d",
-+				 gsw->name, rev.rev);
-+
-+			/* Initialize the switch */
-+			ret = sw->init(gsw);
-+			if (ret)
-+				goto fail;
-+
-+			break;
-+		}
-+	}
-+
-+	if (i >= ARRAY_SIZE(mt753x_sw_ids)) {
-+		dev_err(gsw->dev, "No mt753x switch found\n");
-+		goto fail;
-+	}
-+
-+	gsw->irq = platform_get_irq(pdev, 0);
-+	if (gsw->irq >= 0) {
-+		ret = devm_request_irq(gsw->dev, gsw->irq, mt753x_irq_handler,
-+				       0, dev_name(gsw->dev), gsw);
-+		if (ret) {
-+			dev_err(gsw->dev, "Failed to request irq %d\n",
-+				gsw->irq);
-+			goto fail;
-+		}
-+
-+		INIT_WORK(&gsw->irq_worker, mt753x_irq_worker);
-+	}
-+
-+	platform_set_drvdata(pdev, gsw);
-+
-+	gsw->phy_status_poll = of_property_read_bool(gsw->dev->of_node,
-+						     "mediatek,phy-poll");
-+
-+	mt753x_add_gsw(gsw);
-+
-+	mt753x_swconfig_init(gsw);
-+
-+	if (sw->post_init)
-+		sw->post_init(gsw);
-+
-+	if (gsw->irq >= 0)
-+		mt753x_irq_enable(gsw);
-+
-+	return 0;
-+
-+fail:
-+	devm_kfree(&pdev->dev, gsw);
-+
-+	return ret;
-+}
-+
-+static int mt753x_remove(struct platform_device *pdev)
-+{
-+	struct gsw_mt753x *gsw = platform_get_drvdata(pdev);
-+
-+	if (gsw->irq >= 0)
-+		cancel_work_sync(&gsw->irq_worker);
-+
-+	if (gsw->reset_pin >= 0)
-+		devm_gpio_free(&pdev->dev, gsw->reset_pin);
-+
-+#ifdef CONFIG_SWCONFIG
-+	mt753x_swconfig_destroy(gsw);
-+#endif
-+
-+	mt753x_remove_gsw(gsw);
-+
-+	platform_set_drvdata(pdev, NULL);
-+
-+	return 0;
-+}
-+
-+static const struct of_device_id mt753x_ids[] = {
-+	{ .compatible = "mediatek,mt753x" },
-+	{ },
-+};
-+
-+MODULE_DEVICE_TABLE(of, mt753x_ids);
-+
-+static struct platform_driver mt753x_driver = {
-+	.probe = mt753x_probe,
-+	.remove = mt753x_remove,
-+	.driver = {
-+		.name = "mt753x",
-+		.of_match_table = mt753x_ids,
-+	},
-+};
-+
-+static int __init mt753x_init(void)
-+{
-+	int ret;
-+
-+	INIT_LIST_HEAD(&mt753x_devs);
-+	ret = platform_driver_register(&mt753x_driver);
-+
-+	mt753x_nl_init();
-+
-+	return ret;
-+}
-+module_init(mt753x_init);
-+
-+static void __exit mt753x_exit(void)
-+{
-+	mt753x_nl_exit();
-+
-+	platform_driver_unregister(&mt753x_driver);
-+}
-+module_exit(mt753x_exit);
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Weijie Gao <weijie.gao@mediatek.com>");
-+MODULE_DESCRIPTION("Driver for MediaTek MT753x Gigabit Switch");
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_nl.c b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_nl.c
-new file mode 100644
-index 0000000000..ccde2c9209
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_nl.c
-@@ -0,0 +1,382 @@
-+// SPDX-License-Identifier: GPL-2.0-only
-+/*
-+ * Copyright (c) 2018 MediaTek Inc.
-+ * Author: Sirui Zhao <Sirui.Zhao@mediatek.com>
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <net/genetlink.h>
-+
-+#include "mt753x.h"
-+#include "mt753x_nl.h"
-+
-+struct mt753x_nl_cmd_item {
-+	enum mt753x_cmd cmd;
-+	bool require_dev;
-+	int (*process)(struct genl_info *info, struct gsw_mt753x *gsw);
-+	u32 nr_required_attrs;
-+	const enum mt753x_attr *required_attrs;
-+};
-+
-+static int mt753x_nl_response(struct sk_buff *skb, struct genl_info *info);
-+
-+/*
-+static const struct nla_policy mt753x_nl_cmd_policy[] = {
-+	[MT753X_ATTR_TYPE_MESG] = { .type = NLA_STRING },
-+	[MT753X_ATTR_TYPE_PHY] = { .type = NLA_S32 },
-+	[MT753X_ATTR_TYPE_REG] = { .type = NLA_S32 },
-+	[MT753X_ATTR_TYPE_VAL] = { .type = NLA_S32 },
-+	[MT753X_ATTR_TYPE_DEV_NAME] = { .type = NLA_S32 },
-+	[MT753X_ATTR_TYPE_DEV_ID] = { .type = NLA_S32 },
-+	[MT753X_ATTR_TYPE_DEVAD] = { .type = NLA_S32 },
-+};
-+*/
-+
-+static const struct genl_ops mt753x_nl_ops[] = {
-+	{
-+		.cmd = MT753X_CMD_REQUEST,
-+		.doit = mt753x_nl_response,
-+//		.policy = mt753x_nl_cmd_policy,
-+		.flags = GENL_ADMIN_PERM,
-+	}, {
-+		.cmd = MT753X_CMD_READ,
-+		.doit = mt753x_nl_response,
-+//		.policy = mt753x_nl_cmd_policy,
-+		.flags = GENL_ADMIN_PERM,
-+	}, {
-+		.cmd = MT753X_CMD_WRITE,
-+		.doit = mt753x_nl_response,
-+//		.policy = mt753x_nl_cmd_policy,
-+		.flags = GENL_ADMIN_PERM,
-+	},
-+};
-+
-+static struct genl_family mt753x_nl_family = {
-+	.name =		MT753X_GENL_NAME,
-+	.version =	MT753X_GENL_VERSION,
-+	.maxattr =	MT753X_NR_ATTR_TYPE,
-+	.ops =		mt753x_nl_ops,
-+	.n_ops =	ARRAY_SIZE(mt753x_nl_ops),
-+};
-+
-+static int mt753x_nl_list_devs(char *buff, int size)
-+{
-+	struct gsw_mt753x *gsw;
-+	int len, total = 0;
-+	char buf[80];
-+
-+	memset(buff, 0, size);
-+
-+	mt753x_lock_gsw();
-+
-+	list_for_each_entry(gsw, &mt753x_devs, list) {
-+		len = snprintf(buf, sizeof(buf),
-+			       "id: %d, model: %s, node: %s\n",
-+			       gsw->id, gsw->name, gsw->dev->of_node->name);
-+		strncat(buff, buf, size - total);
-+		total += len;
-+	}
-+
-+	mt753x_put_gsw();
-+
-+	return total;
-+}
-+
-+static int mt753x_nl_prepare_reply(struct genl_info *info, u8 cmd,
-+				   struct sk_buff **skbp)
-+{
-+	struct sk_buff *msg;
-+	void *reply;
-+
-+	if (!info)
-+		return -EINVAL;
-+
-+	msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL);
-+	if (!msg)
-+		return -ENOMEM;
-+
-+	/* Construct send-back message header */
-+	reply = genlmsg_put(msg, info->snd_portid, info->snd_seq,
-+			    &mt753x_nl_family, 0, cmd);
-+	if (!reply) {
-+		nlmsg_free(msg);
-+		return -EINVAL;
-+	}
-+
-+	*skbp = msg;
-+	return 0;
-+}
-+
-+static int mt753x_nl_send_reply(struct sk_buff *skb, struct genl_info *info)
-+{
-+	struct genlmsghdr *genlhdr = nlmsg_data(nlmsg_hdr(skb));
-+	void *reply = genlmsg_data(genlhdr);
-+
-+	/* Finalize a generic netlink message (update message header) */
-+	genlmsg_end(skb, reply);
-+
-+	/* reply to a request */
-+	return genlmsg_reply(skb, info);
-+}
-+
-+static s32 mt753x_nl_get_s32(struct genl_info *info, enum mt753x_attr attr,
-+			     s32 defval)
-+{
-+	struct nlattr *na;
-+
-+	na = info->attrs[attr];
-+	if (na)
-+		return nla_get_s32(na);
-+
-+	return defval;
-+}
-+
-+static int mt753x_nl_get_u32(struct genl_info *info, enum mt753x_attr attr,
-+			     u32 *val)
-+{
-+	struct nlattr *na;
-+
-+	na = info->attrs[attr];
-+	if (na) {
-+		*val = nla_get_u32(na);
-+		return 0;
-+	}
-+
-+	return -1;
-+}
-+
-+static struct gsw_mt753x *mt753x_nl_parse_find_gsw(struct genl_info *info)
-+{
-+	struct gsw_mt753x *gsw;
-+	struct nlattr *na;
-+	int gsw_id;
-+
-+	na = info->attrs[MT753X_ATTR_TYPE_DEV_ID];
-+	if (na) {
-+		gsw_id = nla_get_s32(na);
-+		if (gsw_id >= 0)
-+			gsw = mt753x_get_gsw(gsw_id);
-+		else
-+			gsw = mt753x_get_first_gsw();
-+	} else {
-+		gsw = mt753x_get_first_gsw();
-+	}
-+
-+	return gsw;
-+}
-+
-+static int mt753x_nl_get_swdevs(struct genl_info *info, struct gsw_mt753x *gsw)
-+{
-+	struct sk_buff *rep_skb = NULL;
-+	char dev_info[512];
-+	int ret;
-+
-+	ret = mt753x_nl_list_devs(dev_info, sizeof(dev_info));
-+	if (!ret) {
-+		pr_info("No switch registered\n");
-+		return -EINVAL;
-+	}
-+
-+	ret = mt753x_nl_prepare_reply(info, MT753X_CMD_REPLY, &rep_skb);
-+	if (ret < 0)
-+		goto err;
-+
-+	ret = nla_put_string(rep_skb, MT753X_ATTR_TYPE_MESG, dev_info);
-+	if (ret < 0)
-+		goto err;
-+
-+	return mt753x_nl_send_reply(rep_skb, info);
-+
-+err:
-+	if (rep_skb)
-+		nlmsg_free(rep_skb);
-+
-+	return ret;
-+}
-+
-+static int mt753x_nl_reply_read(struct genl_info *info, struct gsw_mt753x *gsw)
-+{
-+	struct sk_buff *rep_skb = NULL;
-+	s32 phy, devad, reg;
-+	int value;
-+	int ret = 0;
-+
-+	phy = mt753x_nl_get_s32(info, MT753X_ATTR_TYPE_PHY, -1);
-+	devad = mt753x_nl_get_s32(info, MT753X_ATTR_TYPE_DEVAD, -1);
-+	reg = mt753x_nl_get_s32(info, MT753X_ATTR_TYPE_REG, -1);
-+
-+	if (reg < 0)
-+		goto err;
-+
-+	ret = mt753x_nl_prepare_reply(info, MT753X_CMD_READ, &rep_skb);
-+	if (ret < 0)
-+		goto err;
-+
-+	if (phy >= 0) {
-+		if (devad < 0)
-+			value = gsw->mii_read(gsw, phy, reg);
-+		else
-+			value = gsw->mmd_read(gsw, phy, devad, reg);
-+	} else {
-+		value = mt753x_reg_read(gsw, reg);
-+	}
-+
-+	ret = nla_put_s32(rep_skb, MT753X_ATTR_TYPE_REG, reg);
-+	if (ret < 0)
-+		goto err;
-+
-+	ret = nla_put_s32(rep_skb, MT753X_ATTR_TYPE_VAL, value);
-+	if (ret < 0)
-+		goto err;
-+
-+	return mt753x_nl_send_reply(rep_skb, info);
-+
-+err:
-+	if (rep_skb)
-+		nlmsg_free(rep_skb);
-+
-+	return ret;
-+}
-+
-+static int mt753x_nl_reply_write(struct genl_info *info, struct gsw_mt753x *gsw)
-+{
-+	struct sk_buff *rep_skb = NULL;
-+	s32 phy, devad, reg;
-+	u32 value;
-+	int ret = 0;
-+
-+	phy = mt753x_nl_get_s32(info, MT753X_ATTR_TYPE_PHY, -1);
-+	devad = mt753x_nl_get_s32(info, MT753X_ATTR_TYPE_DEVAD, -1);
-+	reg = mt753x_nl_get_s32(info, MT753X_ATTR_TYPE_REG, -1);
-+
-+	if (mt753x_nl_get_u32(info, MT753X_ATTR_TYPE_VAL, &value))
-+		goto err;
-+
-+	if (reg < 0)
-+		goto err;
-+
-+	ret = mt753x_nl_prepare_reply(info, MT753X_CMD_WRITE, &rep_skb);
-+	if (ret < 0)
-+		goto err;
-+
-+	if (phy >= 0) {
-+		if (devad < 0)
-+			gsw->mii_write(gsw, phy, reg, value);
-+		else
-+			gsw->mmd_write(gsw, phy, devad, reg, value);
-+	} else {
-+		mt753x_reg_write(gsw, reg, value);
-+	}
-+
-+	ret = nla_put_s32(rep_skb, MT753X_ATTR_TYPE_REG, reg);
-+	if (ret < 0)
-+		goto err;
-+
-+	ret = nla_put_s32(rep_skb, MT753X_ATTR_TYPE_VAL, value);
-+	if (ret < 0)
-+		goto err;
-+
-+	return mt753x_nl_send_reply(rep_skb, info);
-+
-+err:
-+	if (rep_skb)
-+		nlmsg_free(rep_skb);
-+
-+	return ret;
-+}
-+
-+static const enum mt753x_attr mt753x_nl_cmd_read_attrs[] = {
-+	MT753X_ATTR_TYPE_REG
-+};
-+
-+static const enum mt753x_attr mt753x_nl_cmd_write_attrs[] = {
-+	MT753X_ATTR_TYPE_REG,
-+	MT753X_ATTR_TYPE_VAL
-+};
-+
-+static const struct mt753x_nl_cmd_item mt753x_nl_cmds[] = {
-+	{
-+		.cmd = MT753X_CMD_REQUEST,
-+		.require_dev = false,
-+		.process = mt753x_nl_get_swdevs
-+	}, {
-+		.cmd = MT753X_CMD_READ,
-+		.require_dev = true,
-+		.process = mt753x_nl_reply_read,
-+		.required_attrs = mt753x_nl_cmd_read_attrs,
-+		.nr_required_attrs = ARRAY_SIZE(mt753x_nl_cmd_read_attrs),
-+	}, {
-+		.cmd = MT753X_CMD_WRITE,
-+		.require_dev = true,
-+		.process = mt753x_nl_reply_write,
-+		.required_attrs = mt753x_nl_cmd_write_attrs,
-+		.nr_required_attrs = ARRAY_SIZE(mt753x_nl_cmd_write_attrs),
-+	}
-+};
-+
-+static int mt753x_nl_response(struct sk_buff *skb, struct genl_info *info)
-+{
-+	struct genlmsghdr *hdr = nlmsg_data(info->nlhdr);
-+	const struct mt753x_nl_cmd_item *cmditem = NULL;
-+	struct gsw_mt753x *gsw = NULL;
-+	u32 sat_req_attrs = 0;
-+	int i, ret;
-+
-+	for (i = 0; i < ARRAY_SIZE(mt753x_nl_cmds); i++) {
-+		if (hdr->cmd == mt753x_nl_cmds[i].cmd) {
-+			cmditem = &mt753x_nl_cmds[i];
-+			break;
-+		}
-+	}
-+
-+	if (!cmditem) {
-+		pr_info("mt753x-nl: unknown cmd %u\n", hdr->cmd);
-+		return -EINVAL;
-+	}
-+
-+	for (i = 0; i < cmditem->nr_required_attrs; i++) {
-+		if (info->attrs[cmditem->required_attrs[i]])
-+			sat_req_attrs++;
-+	}
-+
-+	if (sat_req_attrs != cmditem->nr_required_attrs) {
-+		pr_info("mt753x-nl: missing required attr(s) for cmd %u\n",
-+			hdr->cmd);
-+		return -EINVAL;
-+	}
-+
-+	if (cmditem->require_dev) {
-+		gsw = mt753x_nl_parse_find_gsw(info);
-+		if (!gsw) {
-+			pr_info("mt753x-nl: failed to find switch dev\n");
-+			return -EINVAL;
-+		}
-+	}
-+
-+	ret = cmditem->process(info, gsw);
-+
-+	mt753x_put_gsw();
-+
-+	return ret;
-+}
-+
-+int __init mt753x_nl_init(void)
-+{
-+	int ret;
-+
-+	ret = genl_register_family(&mt753x_nl_family);
-+	if (ret) {
-+		pr_info("mt753x-nl: genl_register_family_with_ops failed\n");
-+		return ret;
-+	}
-+
-+	return 0;
-+}
-+
-+void __exit mt753x_nl_exit(void)
-+{
-+	genl_unregister_family(&mt753x_nl_family);
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_nl.h b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_nl.h
-new file mode 100644
-index 0000000000..85dc9e791a
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_nl.h
-@@ -0,0 +1,43 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+/*
-+ * Copyright (c) 2018 MediaTek Inc.
-+ * Author: Sirui Zhao <Sirui.Zhao@mediatek.com>
-+ */
-+
-+#ifndef _MT753X_NL_H_
-+#define _MT753X_NL_H_
-+
-+#define MT753X_GENL_NAME		"mt753x"
-+#define MT753X_GENL_VERSION		0x1
-+
-+enum mt753x_cmd {
-+	MT753X_CMD_UNSPEC = 0,
-+	MT753X_CMD_REQUEST,
-+	MT753X_CMD_REPLY,
-+	MT753X_CMD_READ,
-+	MT753X_CMD_WRITE,
-+
-+	__MT753X_CMD_MAX,
-+};
-+
-+enum mt753x_attr {
-+	MT753X_ATTR_TYPE_UNSPEC = 0,
-+	MT753X_ATTR_TYPE_MESG,
-+	MT753X_ATTR_TYPE_PHY,
-+	MT753X_ATTR_TYPE_DEVAD,
-+	MT753X_ATTR_TYPE_REG,
-+	MT753X_ATTR_TYPE_VAL,
-+	MT753X_ATTR_TYPE_DEV_NAME,
-+	MT753X_ATTR_TYPE_DEV_ID,
-+
-+	__MT753X_ATTR_TYPE_MAX,
-+};
-+
-+#define MT753X_NR_ATTR_TYPE		(__MT753X_ATTR_TYPE_MAX - 1)
-+
-+#ifdef __KERNEL__
-+int __init mt753x_nl_init(void);
-+void __exit mt753x_nl_exit(void);
-+#endif /* __KERNEL__ */
-+
-+#endif /* _MT753X_NL_H_ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_regs.h b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_regs.h
-new file mode 100644
-index 0000000000..3f23ae200e
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_regs.h
-@@ -0,0 +1,294 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+/*
-+ * Copyright (c) 2018 MediaTek Inc.
-+ * Author: Weijie Gao <weijie.gao@mediatek.com>
-+ */
-+
-+#ifndef _MT753X_REGS_H_
-+#define _MT753X_REGS_H_
-+
-+#include <linux/bitops.h>
-+
-+/* Values of Egress TAG Control */
-+#define ETAG_CTRL_UNTAG			0
-+#define ETAG_CTRL_TAG			2
-+#define ETAG_CTRL_SWAP			1
-+#define ETAG_CTRL_STACK			3
-+
-+#define VTCR				0x90
-+#define VAWD1				0x94
-+#define VAWD2				0x98
-+
-+/* Fields of VTCR */
-+#define VTCR_BUSY			BIT(31)
-+#define IDX_INVLD			BIT(16)
-+#define VTCR_FUNC_S			12
-+#define VTCR_FUNC_M			0xf000
-+#define VTCR_VID_S			0
-+#define VTCR_VID_M			0xfff
-+
-+/* Values of VTCR_FUNC */
-+#define VTCR_READ_VLAN_ENTRY		0
-+#define VTCR_WRITE_VLAN_ENTRY		1
-+#define VTCR_INVD_VLAN_ENTRY		2
-+#define VTCR_ENABLE_VLAN_ENTRY		3
-+#define VTCR_READ_ACL_ENTRY		4
-+#define VTCR_WRITE_ACL_ENTRY		5
-+#define VTCR_READ_TRTCM_TABLE		6
-+#define VTCR_WRITE_TRTCM_TABLE		7
-+#define VTCR_READ_ACL_MASK_ENTRY	8
-+#define VTCR_WRITE_ACL_MASK_ENTRY	9
-+#define VTCR_READ_ACL_RULE_ENTRY	10
-+#define VTCR_WRITE_ACL_RULE_ENTRY	11
-+#define VTCR_READ_ACL_RATE_ENTRY	12
-+#define VTCR_WRITE_ACL_RATE_ENTRY	13
-+
-+/* VLAN entry fields */
-+/* VAWD1 */
-+#define PORT_STAG			BIT(31)
-+#define IVL_MAC				BIT(30)
-+#define EG_CON				BIT(29)
-+#define VTAG_EN				BIT(28)
-+#define COPY_PRI			BIT(27)
-+#define USER_PRI_S			24
-+#define USER_PRI_M			0x7000000
-+#define PORT_MEM_S			16
-+#define PORT_MEM_M			0xff0000
-+#define S_TAG1_S			4
-+#define S_TAG1_M			0xfff0
-+#define FID_S				1
-+#define FID_M				0x0e
-+#define VENTRY_VALID			BIT(0)
-+
-+/* VAWD2 */
-+#define S_TAG2_S			16
-+#define S_TAG2_M			0xffff0000
-+#define PORT_ETAG_S(p)			((p) * 2)
-+#define PORT_ETAG_M			0x03
-+
-+#define PORT_CTRL_BASE			0x2000
-+#define PORT_CTRL_PORT_OFFSET		0x100
-+#define PORT_CTRL_REG(p, r)		(PORT_CTRL_BASE + \
-+					(p) * PORT_CTRL_PORT_OFFSET +  (r))
-+#define CKGCR(p)			PORT_CTRL_REG(p, 0x00)
-+#define PCR(p)				PORT_CTRL_REG(p, 0x04)
-+#define PIC(p)				PORT_CTRL_REG(p, 0x08)
-+#define PSC(p)				PORT_CTRL_REG(p, 0x0c)
-+#define PVC(p)				PORT_CTRL_REG(p, 0x10)
-+#define PPBV1(p)			PORT_CTRL_REG(p, 0x14)
-+#define PPBV2(p)			PORT_CTRL_REG(p, 0x18)
-+#define BSR(p)				PORT_CTRL_REG(p, 0x1c)
-+#define STAG01				PORT_CTRL_REG(p, 0x20)
-+#define STAG23				PORT_CTRL_REG(p, 0x24)
-+#define STAG45				PORT_CTRL_REG(p, 0x28)
-+#define STAG67				PORT_CTRL_REG(p, 0x2c)
-+
-+#define PPBV(p, g)			(PPBV1(p) + ((g) / 2) * 4)
-+
-+/* Fields of PCR */
-+#define MLDV2_EN			BIT(30)
-+#define EG_TAG_S			28
-+#define EG_TAG_M			0x30000000
-+#define PORT_PRI_S			24
-+#define PORT_PRI_M			0x7000000
-+#define PORT_MATRIX_S			16
-+#define PORT_MATRIX_M			0xff0000
-+#define UP2DSCP_EN			BIT(12)
-+#define UP2TAG_EN			BIT(11)
-+#define ACL_EN				BIT(10)
-+#define PORT_TX_MIR			BIT(9)
-+#define PORT_RX_MIR			BIT(8)
-+#define ACL_MIR				BIT(7)
-+#define MIS_PORT_FW_S			4
-+#define MIS_PORT_FW_M			0x70
-+#define VLAN_MIS			BIT(2)
-+#define PORT_VLAN_S			0
-+#define PORT_VLAN_M			0x03
-+
-+/* Values of PORT_VLAN */
-+#define PORT_MATRIX_MODE		0
-+#define FALLBACK_MODE			1
-+#define CHECK_MODE			2
-+#define SECURITY_MODE			3
-+
-+/* Fields of PVC */
-+#define STAG_VPID_S			16
-+#define STAG_VPID_M			0xffff0000
-+#define DIS_PVID			BIT(15)
-+#define FORCE_PVID			BIT(14)
-+#define PT_VPM				BIT(12)
-+#define PT_OPTION			BIT(11)
-+#define PVC_EG_TAG_S			8
-+#define PVC_EG_TAG_M			0x700
-+#define VLAN_ATTR_S			6
-+#define VLAN_ATTR_M			0xc0
-+#define PVC_PORT_STAG			BIT(5)
-+#define BC_LKYV_EN			BIT(4)
-+#define MC_LKYV_EN			BIT(3)
-+#define UC_LKYV_EN			BIT(2)
-+#define ACC_FRM_S			0
-+#define ACC_FRM_M			0x03
-+
-+/* Values of VLAN_ATTR */
-+#define VA_USER_PORT			0
-+#define VA_STACK_PORT			1
-+#define VA_TRANSLATION_PORT		2
-+#define VA_TRANSPARENT_PORT		3
-+
-+/* Fields of PPBV */
-+#define GRP_PORT_PRI_S(g)		(((g) % 2) * 16 + 13)
-+#define GRP_PORT_PRI_M			0x07
-+#define GRP_PORT_VID_S(g)		(((g) % 2) * 16)
-+#define GRP_PORT_VID_M			0xfff
-+
-+#define PORT_MAC_CTRL_BASE		0x3000
-+#define PORT_MAC_CTRL_PORT_OFFSET	0x100
-+#define PORT_MAC_CTRL_REG(p, r)		(PORT_MAC_CTRL_BASE + \
-+					(p) * PORT_MAC_CTRL_PORT_OFFSET + (r))
-+#define PMCR(p)				PORT_MAC_CTRL_REG(p, 0x00)
-+#define PMEEECR(p)			PORT_MAC_CTRL_REG(p, 0x04)
-+#define PMSR(p)				PORT_MAC_CTRL_REG(p, 0x08)
-+#define PINT_EN(p)			PORT_MAC_CTRL_REG(p, 0x10)
-+#define PINT_STS(p)			PORT_MAC_CTRL_REG(p, 0x14)
-+
-+#define GMACCR				(PORT_MAC_CTRL_BASE + 0xe0)
-+#define TXCRC_EN			BIT(19)
-+#define RXCRC_EN			BIT(18)
-+#define PRMBL_LMT_EN			BIT(17)
-+#define MTCC_LMT_S			9
-+#define MTCC_LMT_M			0x1e00
-+#define MAX_RX_JUMBO_S			2
-+#define MAX_RX_JUMBO_M			0x3c
-+#define MAX_RX_PKT_LEN_S		0
-+#define MAX_RX_PKT_LEN_M		0x3
-+
-+/* Values of MAX_RX_PKT_LEN */
-+#define RX_PKT_LEN_1518			0
-+#define RX_PKT_LEN_1536			1
-+#define RX_PKT_LEN_1522			2
-+#define RX_PKT_LEN_MAX_JUMBO		3
-+
-+/* Fields of PMCR */
-+#define IPG_CFG_S			18
-+#define IPG_CFG_M			0xc0000
-+#define EXT_PHY				BIT(17)
-+#define MAC_MODE			BIT(16)
-+#define MAC_TX_EN			BIT(14)
-+#define MAC_RX_EN			BIT(13)
-+#define MAC_PRE				BIT(11)
-+#define BKOFF_EN			BIT(9)
-+#define BACKPR_EN			BIT(8)
-+#define FORCE_EEE1G			BIT(7)
-+#define FORCE_EEE1000			BIT(6)
-+#define FORCE_RX_FC			BIT(5)
-+#define FORCE_TX_FC			BIT(4)
-+#define FORCE_SPD_S			2
-+#define FORCE_SPD_M			0x0c
-+#define FORCE_DPX			BIT(1)
-+#define FORCE_LINK			BIT(0)
-+
-+/* Fields of PMSR */
-+#define EEE1G_STS			BIT(7)
-+#define EEE100_STS			BIT(6)
-+#define RX_FC_STS			BIT(5)
-+#define TX_FC_STS			BIT(4)
-+#define MAC_SPD_STS_S			2
-+#define MAC_SPD_STS_M			0x0c
-+#define MAC_DPX_STS			BIT(1)
-+#define MAC_LNK_STS			BIT(0)
-+
-+/* Values of MAC_SPD_STS */
-+#define MAC_SPD_10			0
-+#define MAC_SPD_100			1
-+#define MAC_SPD_1000			2
-+#define MAC_SPD_2500			3
-+
-+/* Values of IPG_CFG */
-+#define IPG_96BIT			0
-+#define IPG_96BIT_WITH_SHORT_IPG	1
-+#define IPG_64BIT			2
-+
-+#define MIB_COUNTER_BASE		0x4000
-+#define MIB_COUNTER_PORT_OFFSET		0x100
-+#define MIB_COUNTER_REG(p, r)		(MIB_COUNTER_BASE + \
-+					(p) * MIB_COUNTER_PORT_OFFSET + (r))
-+#define STATS_TDPC			0x00
-+#define STATS_TCRC			0x04
-+#define STATS_TUPC			0x08
-+#define STATS_TMPC			0x0C
-+#define STATS_TBPC			0x10
-+#define STATS_TCEC			0x14
-+#define STATS_TSCEC			0x18
-+#define STATS_TMCEC			0x1C
-+#define STATS_TDEC			0x20
-+#define STATS_TLCEC			0x24
-+#define STATS_TXCEC			0x28
-+#define STATS_TPPC			0x2C
-+#define STATS_TL64PC			0x30
-+#define STATS_TL65PC			0x34
-+#define STATS_TL128PC			0x38
-+#define STATS_TL256PC			0x3C
-+#define STATS_TL512PC			0x40
-+#define STATS_TL1024PC			0x44
-+#define STATS_TOC			0x48
-+#define STATS_RDPC			0x60
-+#define STATS_RFPC			0x64
-+#define STATS_RUPC			0x68
-+#define STATS_RMPC			0x6C
-+#define STATS_RBPC			0x70
-+#define STATS_RAEPC			0x74
-+#define STATS_RCEPC			0x78
-+#define STATS_RUSPC			0x7C
-+#define STATS_RFEPC			0x80
-+#define STATS_ROSPC			0x84
-+#define STATS_RJEPC			0x88
-+#define STATS_RPPC			0x8C
-+#define STATS_RL64PC			0x90
-+#define STATS_RL65PC			0x94
-+#define STATS_RL128PC			0x98
-+#define STATS_RL256PC			0x9C
-+#define STATS_RL512PC			0xA0
-+#define STATS_RL1024PC			0xA4
-+#define STATS_ROC			0xA8
-+#define STATS_RDPC_CTRL			0xB0
-+#define STATS_RDPC_ING			0xB4
-+#define STATS_RDPC_ARL			0xB8
-+
-+#define SYS_CTRL			0x7000
-+#define SW_PHY_RST			BIT(2)
-+#define SW_SYS_RST			BIT(1)
-+#define SW_REG_RST			BIT(0)
-+
-+#define SYS_INT_EN			0x7008
-+#define SYS_INT_STS			0x700c
-+#define MAC_PC_INT			BIT(16)
-+#define PHY_INT(p)			BIT((p) + 8)
-+#define PHY_LC_INT(p)			BIT(p)
-+
-+#define PHY_IAC				0x701c
-+#define PHY_ACS_ST			BIT(31)
-+#define MDIO_REG_ADDR_S			25
-+#define MDIO_REG_ADDR_M			0x3e000000
-+#define MDIO_PHY_ADDR_S			20
-+#define MDIO_PHY_ADDR_M			0x1f00000
-+#define MDIO_CMD_S			18
-+#define MDIO_CMD_M			0xc0000
-+#define MDIO_ST_S			16
-+#define MDIO_ST_M			0x30000
-+#define MDIO_RW_DATA_S			0
-+#define MDIO_RW_DATA_M			0xffff
-+
-+/* MDIO_CMD: MDIO commands */
-+#define MDIO_CMD_ADDR			0
-+#define MDIO_CMD_WRITE			1
-+#define MDIO_CMD_READ			2
-+#define MDIO_CMD_READ_C45		3
-+
-+/* MDIO_ST: MDIO start field */
-+#define MDIO_ST_C45			0
-+#define MDIO_ST_C22			1
-+
-+#define HWSTRAP				0x7800
-+#define MHWSTRAP			0x7804
-+
-+#endif /* _MT753X_REGS_H_ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_swconfig.c b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_swconfig.c
-new file mode 100644
-index 0000000000..342ad576b2
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_swconfig.c
-@@ -0,0 +1,510 @@
-+// SPDX-License-Identifier: GPL-2.0-only
-+/*
-+ * Copyright (c) 2018 MediaTek Inc.
-+ * Author: Weijie Gao <weijie.gao@mediatek.com>
-+ */
-+
-+#include <linux/if.h>
-+#include <linux/list.h>
-+#include <linux/if_ether.h>
-+#include <linux/skbuff.h>
-+#include <linux/netdevice.h>
-+#include <linux/netlink.h>
-+#include <linux/bitops.h>
-+#include <net/genetlink.h>
-+#include <linux/delay.h>
-+#include <linux/phy.h>
-+#include <linux/netdevice.h>
-+#include <linux/etherdevice.h>
-+#include <linux/lockdep.h>
-+#include <linux/workqueue.h>
-+#include <linux/of_device.h>
-+
-+#include "mt753x.h"
-+#include "mt753x_swconfig.h"
-+#include "mt753x_regs.h"
-+
-+#define MT753X_PORT_MIB_TXB_ID	18	/* TxByte */
-+#define MT753X_PORT_MIB_RXB_ID	37	/* RxByte */
-+
-+#define MIB_DESC(_s, _o, _n)   \
-+	{                       \
-+		.size = (_s),   \
-+		.offset = (_o), \
-+		.name = (_n),   \
-+	}
-+
-+struct mt753x_mib_desc {
-+	unsigned int size;
-+	unsigned int offset;
-+	const char *name;
-+};
-+
-+static const struct mt753x_mib_desc mt753x_mibs[] = {
-+	MIB_DESC(1, STATS_TDPC, "TxDrop"),
-+	MIB_DESC(1, STATS_TCRC, "TxCRC"),
-+	MIB_DESC(1, STATS_TUPC, "TxUni"),
-+	MIB_DESC(1, STATS_TMPC, "TxMulti"),
-+	MIB_DESC(1, STATS_TBPC, "TxBroad"),
-+	MIB_DESC(1, STATS_TCEC, "TxCollision"),
-+	MIB_DESC(1, STATS_TSCEC, "TxSingleCol"),
-+	MIB_DESC(1, STATS_TMCEC, "TxMultiCol"),
-+	MIB_DESC(1, STATS_TDEC, "TxDefer"),
-+	MIB_DESC(1, STATS_TLCEC, "TxLateCol"),
-+	MIB_DESC(1, STATS_TXCEC, "TxExcCol"),
-+	MIB_DESC(1, STATS_TPPC, "TxPause"),
-+	MIB_DESC(1, STATS_TL64PC, "Tx64Byte"),
-+	MIB_DESC(1, STATS_TL65PC, "Tx65Byte"),
-+	MIB_DESC(1, STATS_TL128PC, "Tx128Byte"),
-+	MIB_DESC(1, STATS_TL256PC, "Tx256Byte"),
-+	MIB_DESC(1, STATS_TL512PC, "Tx512Byte"),
-+	MIB_DESC(1, STATS_TL1024PC, "Tx1024Byte"),
-+	MIB_DESC(2, STATS_TOC, "TxByte"),
-+	MIB_DESC(1, STATS_RDPC, "RxDrop"),
-+	MIB_DESC(1, STATS_RFPC, "RxFiltered"),
-+	MIB_DESC(1, STATS_RUPC, "RxUni"),
-+	MIB_DESC(1, STATS_RMPC, "RxMulti"),
-+	MIB_DESC(1, STATS_RBPC, "RxBroad"),
-+	MIB_DESC(1, STATS_RAEPC, "RxAlignErr"),
-+	MIB_DESC(1, STATS_RCEPC, "RxCRC"),
-+	MIB_DESC(1, STATS_RUSPC, "RxUnderSize"),
-+	MIB_DESC(1, STATS_RFEPC, "RxFragment"),
-+	MIB_DESC(1, STATS_ROSPC, "RxOverSize"),
-+	MIB_DESC(1, STATS_RJEPC, "RxJabber"),
-+	MIB_DESC(1, STATS_RPPC, "RxPause"),
-+	MIB_DESC(1, STATS_RL64PC, "Rx64Byte"),
-+	MIB_DESC(1, STATS_RL65PC, "Rx65Byte"),
-+	MIB_DESC(1, STATS_RL128PC, "Rx128Byte"),
-+	MIB_DESC(1, STATS_RL256PC, "Rx256Byte"),
-+	MIB_DESC(1, STATS_RL512PC, "Rx512Byte"),
-+	MIB_DESC(1, STATS_RL1024PC, "Rx1024Byte"),
-+	MIB_DESC(2, STATS_ROC, "RxByte"),
-+	MIB_DESC(1, STATS_RDPC_CTRL, "RxCtrlDrop"),
-+	MIB_DESC(1, STATS_RDPC_ING, "RxIngDrop"),
-+	MIB_DESC(1, STATS_RDPC_ARL, "RxARLDrop")
-+};
-+
-+enum {
-+	/* Global attributes. */
-+	MT753X_ATTR_ENABLE_VLAN,
-+};
-+
-+static int mt753x_get_vlan_enable(struct switch_dev *dev,
-+				  const struct switch_attr *attr,
-+				  struct switch_val *val)
-+{
-+	struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev);
-+
-+	val->value.i = gsw->global_vlan_enable;
-+
-+	return 0;
-+}
-+
-+static int mt753x_set_vlan_enable(struct switch_dev *dev,
-+				  const struct switch_attr *attr,
-+				  struct switch_val *val)
-+{
-+	struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev);
-+
-+	gsw->global_vlan_enable = val->value.i != 0;
-+
-+	return 0;
-+}
-+
-+static int mt753x_get_port_pvid(struct switch_dev *dev, int port, int *val)
-+{
-+	struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev);
-+
-+	if (port >= MT753X_NUM_PORTS)
-+		return -EINVAL;
-+
-+	*val = mt753x_reg_read(gsw, PPBV1(port));
-+	*val &= GRP_PORT_VID_M;
-+
-+	return 0;
-+}
-+
-+static int mt753x_set_port_pvid(struct switch_dev *dev, int port, int pvid)
-+{
-+	struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev);
-+
-+	if (port >= MT753X_NUM_PORTS)
-+		return -EINVAL;
-+
-+	if (pvid < MT753X_MIN_VID || pvid > MT753X_MAX_VID)
-+		return -EINVAL;
-+
-+	gsw->port_entries[port].pvid = pvid;
-+
-+	return 0;
-+}
-+
-+static int mt753x_get_vlan_ports(struct switch_dev *dev, struct switch_val *val)
-+{
-+	struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev);
-+	u32 member;
-+	u32 etags;
-+	int i;
-+
-+	val->len = 0;
-+
-+	if (val->port_vlan < 0 || val->port_vlan >= MT753X_NUM_VLANS)
-+		return -EINVAL;
-+
-+	mt753x_vlan_ctrl(gsw, VTCR_READ_VLAN_ENTRY, val->port_vlan);
-+
-+	member = mt753x_reg_read(gsw, VAWD1);
-+	member &= PORT_MEM_M;
-+	member >>= PORT_MEM_S;
-+
-+	etags = mt753x_reg_read(gsw, VAWD2);
-+
-+	for (i = 0; i < MT753X_NUM_PORTS; i++) {
-+		struct switch_port *p;
-+		int etag;
-+
-+		if (!(member & BIT(i)))
-+			continue;
-+
-+		p = &val->value.ports[val->len++];
-+		p->id = i;
-+
-+		etag = (etags >> PORT_ETAG_S(i)) & PORT_ETAG_M;
-+
-+		if (etag == ETAG_CTRL_TAG)
-+			p->flags |= BIT(SWITCH_PORT_FLAG_TAGGED);
-+		else if (etag != ETAG_CTRL_UNTAG)
-+			dev_info(gsw->dev,
-+				 "vlan egress tag control neither untag nor tag.\n");
-+	}
-+
-+	return 0;
-+}
-+
-+static int mt753x_set_vlan_ports(struct switch_dev *dev, struct switch_val *val)
-+{
-+	struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev);
-+	u8 member = 0;
-+	u8 etags = 0;
-+	int i;
-+
-+	if (val->port_vlan < 0 || val->port_vlan >= MT753X_NUM_VLANS ||
-+	    val->len > MT753X_NUM_PORTS)
-+		return -EINVAL;
-+
-+	for (i = 0; i < val->len; i++) {
-+		struct switch_port *p = &val->value.ports[i];
-+
-+		if (p->id >= MT753X_NUM_PORTS)
-+			return -EINVAL;
-+
-+		member |= BIT(p->id);
-+
-+		if (p->flags & BIT(SWITCH_PORT_FLAG_TAGGED))
-+			etags |= BIT(p->id);
-+	}
-+
-+	gsw->vlan_entries[val->port_vlan].member = member;
-+	gsw->vlan_entries[val->port_vlan].etags = etags;
-+
-+	return 0;
-+}
-+
-+static int mt753x_set_vid(struct switch_dev *dev,
-+			  const struct switch_attr *attr,
-+			  struct switch_val *val)
-+{
-+	struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev);
-+	int vlan;
-+	u16 vid;
-+
-+	vlan = val->port_vlan;
-+	vid = (u16)val->value.i;
-+
-+	if (vlan < 0 || vlan >= MT753X_NUM_VLANS)
-+		return -EINVAL;
-+
-+	if (vid < MT753X_MIN_VID || vid > MT753X_MAX_VID)
-+		return -EINVAL;
-+
-+	gsw->vlan_entries[vlan].vid = vid;
-+	return 0;
-+}
-+
-+static int mt753x_get_vid(struct switch_dev *dev,
-+			  const struct switch_attr *attr,
-+			  struct switch_val *val)
-+{
-+	val->value.i = val->port_vlan;
-+	return 0;
-+}
-+
-+static int mt753x_get_port_link(struct switch_dev *dev, int port,
-+				struct switch_port_link *link)
-+{
-+	struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev);
-+	u32 speed, pmsr;
-+
-+	if (port < 0 || port >= MT753X_NUM_PORTS)
-+		return -EINVAL;
-+
-+	pmsr = mt753x_reg_read(gsw, PMSR(port));
-+
-+	link->link = pmsr & MAC_LNK_STS;
-+	link->duplex = pmsr & MAC_DPX_STS;
-+	speed = (pmsr & MAC_SPD_STS_M) >> MAC_SPD_STS_S;
-+
-+	switch (speed) {
-+	case MAC_SPD_10:
-+		link->speed = SWITCH_PORT_SPEED_10;
-+		break;
-+	case MAC_SPD_100:
-+		link->speed = SWITCH_PORT_SPEED_100;
-+		break;
-+	case MAC_SPD_1000:
-+		link->speed = SWITCH_PORT_SPEED_1000;
-+		break;
-+	case MAC_SPD_2500:
-+		/* TODO: swconfig has no support for 2500 now */
-+		link->speed = SWITCH_PORT_SPEED_UNKNOWN;
-+		break;
-+	}
-+
-+	return 0;
-+}
-+
-+static int mt753x_set_port_link(struct switch_dev *dev, int port,
-+				struct switch_port_link *link)
-+{
-+#ifndef MODULE
-+	if (port >= MT753X_NUM_PHYS)
-+		return -EINVAL;
-+
-+	return switch_generic_set_link(dev, port, link);
-+#else
-+	return -ENOTSUPP;
-+#endif
-+}
-+
-+static u64 get_mib_counter(struct gsw_mt753x *gsw, int i, int port)
-+{
-+	unsigned int offset;
-+	u64 lo, hi, hi2;
-+
-+	offset = mt753x_mibs[i].offset;
-+
-+	if (mt753x_mibs[i].size == 1)
-+		return mt753x_reg_read(gsw, MIB_COUNTER_REG(port, offset));
-+
-+	do {
-+		hi = mt753x_reg_read(gsw, MIB_COUNTER_REG(port, offset + 4));
-+		lo = mt753x_reg_read(gsw, MIB_COUNTER_REG(port, offset));
-+		hi2 = mt753x_reg_read(gsw, MIB_COUNTER_REG(port, offset + 4));
-+	} while (hi2 != hi);
-+
-+	return (hi << 32) | lo;
-+}
-+
-+static int mt753x_get_port_mib(struct switch_dev *dev,
-+			       const struct switch_attr *attr,
-+			       struct switch_val *val)
-+{
-+	static char buf[4096];
-+	struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev);
-+	int i, len = 0;
-+
-+	if (val->port_vlan >= MT753X_NUM_PORTS)
-+		return -EINVAL;
-+
-+	len += snprintf(buf + len, sizeof(buf) - len,
-+			"Port %d MIB counters\n", val->port_vlan);
-+
-+	for (i = 0; i < ARRAY_SIZE(mt753x_mibs); ++i) {
-+		u64 counter;
-+
-+		len += snprintf(buf + len, sizeof(buf) - len,
-+				"%-11s: ", mt753x_mibs[i].name);
-+		counter = get_mib_counter(gsw, i, val->port_vlan);
-+		len += snprintf(buf + len, sizeof(buf) - len, "%llu\n",
-+				counter);
-+	}
-+
-+	val->value.s = buf;
-+	val->len = len;
-+	return 0;
-+}
-+
-+static int mt753x_get_port_stats(struct switch_dev *dev, int port,
-+				 struct switch_port_stats *stats)
-+{
-+	struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev);
-+
-+	if (port < 0 || port >= MT753X_NUM_PORTS)
-+		return -EINVAL;
-+
-+	stats->tx_bytes = get_mib_counter(gsw, MT753X_PORT_MIB_TXB_ID, port);
-+	stats->rx_bytes = get_mib_counter(gsw, MT753X_PORT_MIB_RXB_ID, port);
-+
-+	return 0;
-+}
-+
-+static void mt753x_port_isolation(struct gsw_mt753x *gsw)
-+{
-+	int i;
-+
-+	for (i = 0; i < MT753X_NUM_PORTS; i++)
-+		mt753x_reg_write(gsw, PCR(i),
-+				 BIT(gsw->cpu_port) << PORT_MATRIX_S);
-+
-+	mt753x_reg_write(gsw, PCR(gsw->cpu_port), PORT_MATRIX_M);
-+
-+	for (i = 0; i < MT753X_NUM_PORTS; i++)
-+		mt753x_reg_write(gsw, PVC(i),
-+				 (0x8100 << STAG_VPID_S) |
-+				 (VA_TRANSPARENT_PORT << VLAN_ATTR_S));
-+}
-+
-+static int mt753x_apply_config(struct switch_dev *dev)
-+{
-+	struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev);
-+
-+	if (!gsw->global_vlan_enable) {
-+		mt753x_port_isolation(gsw);
-+		return 0;
-+	}
-+
-+	mt753x_apply_vlan_config(gsw);
-+
-+	return 0;
-+}
-+
-+static int mt753x_reset_switch(struct switch_dev *dev)
-+{
-+	struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev);
-+	int i;
-+
-+	memset(gsw->port_entries, 0, sizeof(gsw->port_entries));
-+	memset(gsw->vlan_entries, 0, sizeof(gsw->vlan_entries));
-+
-+	/* set default vid of each vlan to the same number of vlan, so the vid
-+	 * won't need be set explicitly.
-+	 */
-+	for (i = 0; i < MT753X_NUM_VLANS; i++)
-+		gsw->vlan_entries[i].vid = i;
-+
-+	return 0;
-+}
-+
-+static int mt753x_phy_read16(struct switch_dev *dev, int addr, u8 reg,
-+			     u16 *value)
-+{
-+	struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev);
-+
-+	*value = gsw->mii_read(gsw, addr, reg);
-+
-+	return 0;
-+}
-+
-+static int mt753x_phy_write16(struct switch_dev *dev, int addr, u8 reg,
-+			      u16 value)
-+{
-+	struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev);
-+
-+	gsw->mii_write(gsw, addr, reg, value);
-+
-+	return 0;
-+}
-+
-+static const struct switch_attr mt753x_global[] = {
-+	{
-+		.type = SWITCH_TYPE_INT,
-+		.name = "enable_vlan",
-+		.description = "VLAN mode (1:enabled)",
-+		.max = 1,
-+		.id = MT753X_ATTR_ENABLE_VLAN,
-+		.get = mt753x_get_vlan_enable,
-+		.set = mt753x_set_vlan_enable,
-+	}
-+};
-+
-+static const struct switch_attr mt753x_port[] = {
-+	{
-+		.type = SWITCH_TYPE_STRING,
-+		.name = "mib",
-+		.description = "Get MIB counters for port",
-+		.get = mt753x_get_port_mib,
-+		.set = NULL,
-+	},
-+};
-+
-+static const struct switch_attr mt753x_vlan[] = {
-+	{
-+		.type = SWITCH_TYPE_INT,
-+		.name = "vid",
-+		.description = "VLAN ID (0-4094)",
-+		.set = mt753x_set_vid,
-+		.get = mt753x_get_vid,
-+		.max = 4094,
-+	},
-+};
-+
-+static const struct switch_dev_ops mt753x_swdev_ops = {
-+	.attr_global = {
-+		.attr = mt753x_global,
-+		.n_attr = ARRAY_SIZE(mt753x_global),
-+	},
-+	.attr_port = {
-+		.attr = mt753x_port,
-+		.n_attr = ARRAY_SIZE(mt753x_port),
-+	},
-+	.attr_vlan = {
-+		.attr = mt753x_vlan,
-+		.n_attr = ARRAY_SIZE(mt753x_vlan),
-+	},
-+	.get_vlan_ports = mt753x_get_vlan_ports,
-+	.set_vlan_ports = mt753x_set_vlan_ports,
-+	.get_port_pvid = mt753x_get_port_pvid,
-+	.set_port_pvid = mt753x_set_port_pvid,
-+	.get_port_link = mt753x_get_port_link,
-+	.set_port_link = mt753x_set_port_link,
-+	.get_port_stats = mt753x_get_port_stats,
-+	.apply_config = mt753x_apply_config,
-+	.reset_switch = mt753x_reset_switch,
-+	.phy_read16 = mt753x_phy_read16,
-+	.phy_write16 = mt753x_phy_write16,
-+};
-+
-+int mt753x_swconfig_init(struct gsw_mt753x *gsw)
-+{
-+	struct device_node *np = gsw->dev->of_node;
-+	struct switch_dev *swdev;
-+	int ret;
-+
-+	if (of_property_read_u32(np, "mediatek,cpuport", &gsw->cpu_port))
-+		gsw->cpu_port = MT753X_DFL_CPU_PORT;
-+
-+	swdev = &gsw->swdev;
-+
-+	swdev->name = gsw->name;
-+	swdev->alias = gsw->name;
-+	swdev->cpu_port = gsw->cpu_port;
-+	swdev->ports = MT753X_NUM_PORTS;
-+	swdev->vlans = MT753X_NUM_VLANS;
-+	swdev->ops = &mt753x_swdev_ops;
-+
-+	ret = register_switch(swdev, NULL);
-+	if (ret) {
-+		dev_notice(gsw->dev, "Failed to register switch %s\n",
-+			   swdev->name);
-+		return ret;
-+	}
-+
-+	mt753x_apply_config(swdev);
-+
-+	return 0;
-+}
-+
-+void mt753x_swconfig_destroy(struct gsw_mt753x *gsw)
-+{
-+	unregister_switch(&gsw->swdev);
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_swconfig.h b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_swconfig.h
-new file mode 100644
-index 0000000000..f000364ee8
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_swconfig.h
-@@ -0,0 +1,29 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+/*
-+ * Copyright (c) 2018 MediaTek Inc.
-+ * Author: Weijie Gao <weijie.gao@mediatek.com>
-+ */
-+
-+#ifndef _MT753X_SWCONFIG_H_
-+#define _MT753X_SWCONFIG_H_
-+
-+#ifdef CONFIG_SWCONFIG
-+#include <linux/switch.h>
-+#include "mt753x.h"
-+
-+int mt753x_swconfig_init(struct gsw_mt753x *gsw);
-+void mt753x_swconfig_destroy(struct gsw_mt753x *gsw);
-+#else
-+static inline int mt753x_swconfig_init(struct gsw_mt753x *gsw)
-+{
-+	mt753x_apply_vlan_config(gsw);
-+
-+	return 0;
-+}
-+
-+static inline void mt753x_swconfig_destroy(struct gsw_mt753x *gsw)
-+{
-+}
-+#endif
-+
-+#endif /* _MT753X_SWCONFIG_H_ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_vlan.c b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_vlan.c
-new file mode 100644
-index 0000000000..4d88eee8de
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_vlan.c
-@@ -0,0 +1,183 @@
-+// SPDX-License-Identifier: GPL-2.0-only
-+/*
-+ * Copyright (c) 2018 MediaTek Inc.
-+ */
-+
-+#include "mt753x.h"
-+#include "mt753x_regs.h"
-+
-+struct mt753x_mapping mt753x_def_mapping[] = {
-+	{
-+		.name = "llllw",
-+		.pvids = { 1, 1, 1, 1, 2, 2, 1 },
-+		.members = { 0, 0x4f, 0x30 },
-+		.etags = { 0, 0, 0 },
-+		.vids = { 0, 1, 2 },
-+	}, {
-+		.name = "wllll",
-+		.pvids = { 2, 1, 1, 1, 1, 2, 1 },
-+		.members = { 0, 0x5e, 0x21 },
-+		.etags = { 0, 0, 0 },
-+		.vids = { 0, 1, 2 },
-+	}, {
-+		.name = "lwlll",
-+		.pvids = { 1, 2, 1, 1, 1, 2, 1 },
-+		.members = { 0, 0x5d, 0x22 },
-+		.etags = { 0, 0, 0 },
-+		.vids = { 0, 1, 2 },
-+	},
-+};
-+
-+void mt753x_vlan_ctrl(struct gsw_mt753x *gsw, u32 cmd, u32 val)
-+{
-+	int i;
-+
-+	mt753x_reg_write(gsw, VTCR,
-+			 VTCR_BUSY | ((cmd << VTCR_FUNC_S) & VTCR_FUNC_M) |
-+			 (val & VTCR_VID_M));
-+
-+	for (i = 0; i < 300; i++) {
-+		u32 val = mt753x_reg_read(gsw, VTCR);
-+
-+		if ((val & VTCR_BUSY) == 0)
-+			break;
-+
-+		usleep_range(1000, 1100);
-+	}
-+
-+	if (i == 300)
-+		dev_info(gsw->dev, "vtcr timeout\n");
-+}
-+
-+static void mt753x_write_vlan_entry(struct gsw_mt753x *gsw, int vlan, u16 vid,
-+				    u8 ports, u8 etags)
-+{
-+	int port;
-+	u32 val;
-+
-+	/* vlan port membership */
-+	if (ports)
-+		mt753x_reg_write(gsw, VAWD1,
-+				 IVL_MAC | VTAG_EN | VENTRY_VALID |
-+				 ((ports << PORT_MEM_S) & PORT_MEM_M));
-+	else
-+		mt753x_reg_write(gsw, VAWD1, 0);
-+
-+	/* egress mode */
-+	val = 0;
-+	for (port = 0; port < MT753X_NUM_PORTS; port++) {
-+		if (etags & BIT(port))
-+			val |= ETAG_CTRL_TAG << PORT_ETAG_S(port);
-+		else
-+			val |= ETAG_CTRL_UNTAG << PORT_ETAG_S(port);
-+	}
-+	mt753x_reg_write(gsw, VAWD2, val);
-+
-+	/* write to vlan table */
-+	mt753x_vlan_ctrl(gsw, VTCR_WRITE_VLAN_ENTRY, vid);
-+}
-+
-+void mt753x_apply_vlan_config(struct gsw_mt753x *gsw)
-+{
-+	int i, j;
-+	u8 tag_ports;
-+	u8 untag_ports;
-+
-+	/* set all ports as security mode */
-+	for (i = 0; i < MT753X_NUM_PORTS; i++)
-+		mt753x_reg_write(gsw, PCR(i),
-+				 PORT_MATRIX_M | SECURITY_MODE);
-+
-+	/* check if a port is used in tag/untag vlan egress mode */
-+	tag_ports = 0;
-+	untag_ports = 0;
-+
-+	for (i = 0; i < MT753X_NUM_VLANS; i++) {
-+		u8 member = gsw->vlan_entries[i].member;
-+		u8 etags = gsw->vlan_entries[i].etags;
-+
-+		if (!member)
-+			continue;
-+
-+		for (j = 0; j < MT753X_NUM_PORTS; j++) {
-+			if (!(member & BIT(j)))
-+				continue;
-+
-+			if (etags & BIT(j))
-+				tag_ports |= 1u << j;
-+			else
-+				untag_ports |= 1u << j;
-+		}
-+	}
-+
-+	/* set all untag-only ports as transparent and the rest as user port */
-+	for (i = 0; i < MT753X_NUM_PORTS; i++) {
-+		u32 pvc_mode = 0x8100 << STAG_VPID_S;
-+
-+		if (untag_ports & BIT(i) && !(tag_ports & BIT(i)))
-+			pvc_mode = (0x8100 << STAG_VPID_S) |
-+				(VA_TRANSPARENT_PORT << VLAN_ATTR_S);
-+
-+		mt753x_reg_write(gsw, PVC(i), pvc_mode);
-+	}
-+
-+	/* first clear the switch vlan table */
-+	for (i = 0; i < MT753X_NUM_VLANS; i++)
-+		mt753x_write_vlan_entry(gsw, i, i, 0, 0);
-+
-+	/* now program only vlans with members to avoid
-+	 * clobbering remapped entries in later iterations
-+	 */
-+	for (i = 0; i < MT753X_NUM_VLANS; i++) {
-+		u16 vid = gsw->vlan_entries[i].vid;
-+		u8 member = gsw->vlan_entries[i].member;
-+		u8 etags = gsw->vlan_entries[i].etags;
-+
-+		if (member)
-+			mt753x_write_vlan_entry(gsw, i, vid, member, etags);
-+	}
-+
-+	/* Port Default PVID */
-+	for (i = 0; i < MT753X_NUM_PORTS; i++) {
-+		int vlan = gsw->port_entries[i].pvid;
-+		u16 pvid = 0;
-+		u32 val;
-+
-+		if (vlan < MT753X_NUM_VLANS && gsw->vlan_entries[vlan].member)
-+			pvid = gsw->vlan_entries[vlan].vid;
-+
-+		val = mt753x_reg_read(gsw, PPBV1(i));
-+		val &= ~GRP_PORT_VID_M;
-+		val |= pvid;
-+		mt753x_reg_write(gsw, PPBV1(i), val);
-+	}
-+}
-+
-+struct mt753x_mapping *mt753x_find_mapping(struct device_node *np)
-+{
-+	const char *map;
-+	int i;
-+
-+	if (of_property_read_string(np, "mediatek,portmap", &map))
-+		return NULL;
-+
-+	for (i = 0; i < ARRAY_SIZE(mt753x_def_mapping); i++)
-+		if (!strcmp(map, mt753x_def_mapping[i].name))
-+			return &mt753x_def_mapping[i];
-+
-+	return NULL;
-+}
-+
-+void mt753x_apply_mapping(struct gsw_mt753x *gsw, struct mt753x_mapping *map)
-+{
-+	int i = 0;
-+
-+	for (i = 0; i < MT753X_NUM_PORTS; i++)
-+		gsw->port_entries[i].pvid = map->pvids[i];
-+
-+	for (i = 0; i < MT753X_NUM_VLANS; i++) {
-+		gsw->vlan_entries[i].member = map->members[i];
-+		gsw->vlan_entries[i].etags = map->etags[i];
-+		gsw->vlan_entries[i].vid = map->vids[i];
-+	}
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_vlan.h b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_vlan.h
-new file mode 100644
-index 0000000000..c726b8eacd
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_vlan.h
-@@ -0,0 +1,40 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+/*
-+ * Copyright (c) 2018 MediaTek Inc.
-+ */
-+
-+#ifndef _MT753X_VLAN_H_
-+#define _MT753X_VLAN_H_
-+
-+#define MT753X_NUM_PORTS	7
-+#define MT753X_NUM_VLANS	4095
-+#define MT753X_MAX_VID		4095
-+#define MT753X_MIN_VID		0
-+
-+struct gsw_mt753x;
-+
-+struct mt753x_port_entry {
-+	u16	pvid;
-+};
-+
-+struct mt753x_vlan_entry {
-+	u16	vid;
-+	u8	member;
-+	u8	etags;
-+};
-+
-+struct mt753x_mapping {
-+	char	*name;
-+	u16	pvids[MT753X_NUM_PORTS];
-+	u8	members[MT753X_NUM_VLANS];
-+	u8	etags[MT753X_NUM_VLANS];
-+	u16	vids[MT753X_NUM_VLANS];
-+};
-+
-+extern struct mt753x_mapping mt753x_defaults[];
-+
-+void mt753x_vlan_ctrl(struct gsw_mt753x *gsw, u32 cmd, u32 val);
-+void mt753x_apply_vlan_config(struct gsw_mt753x *gsw);
-+struct mt753x_mapping *mt753x_find_mapping(struct device_node *np);
-+void mt753x_apply_mapping(struct gsw_mt753x *gsw, struct mt753x_mapping *map);
-+#endif /* _MT753X_VLAN_H_ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/Makefile b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/Makefile
-new file mode 100644
-index 0000000000..0f2891ead4
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/Makefile
-@@ -0,0 +1,66 @@
-+obj-$(CONFIG_RTL8367S_GSW) += rtl8367s_gsw.o
-+rtl8367s_gsw-objs := rtl8367s_mdio.o rtl8367s_dbg.o
-+ifeq ($(CONFIG_SWCONFIG),y)
-+rtl8367s_gsw-objs += rtl8367s.o
-+endif
-+rtl8367s_gsw-objs += rtl8367c/acl.o
-+rtl8367s_gsw-objs += rtl8367c/cpu.o
-+rtl8367s_gsw-objs += rtl8367c/dot1x.o
-+rtl8367s_gsw-objs += rtl8367c/eee.o
-+rtl8367s_gsw-objs += rtl8367c/igmp.o
-+rtl8367s_gsw-objs += rtl8367c/interrupt.o
-+rtl8367s_gsw-objs += rtl8367c/l2.o
-+rtl8367s_gsw-objs += rtl8367c/leaky.o
-+rtl8367s_gsw-objs += rtl8367c/led.o
-+rtl8367s_gsw-objs += rtl8367c/mirror.o
-+rtl8367s_gsw-objs += rtl8367c/oam.o
-+rtl8367s_gsw-objs += rtl8367c/port.o
-+rtl8367s_gsw-objs += rtl8367c/ptp.o
-+rtl8367s_gsw-objs += rtl8367c/qos.o
-+rtl8367s_gsw-objs += rtl8367c/rate.o
-+rtl8367s_gsw-objs += rtl8367c/rldp.o
-+rtl8367s_gsw-objs += rtl8367c/rtk_switch.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_acl.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_cputag.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_dot1x.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_eav.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_eee.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_fc.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_green.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_hsb.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_igmp.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_inbwctrl.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_interrupt.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_led.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_lut.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_meter.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_mib.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_mirror.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_misc.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_oam.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_phy.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_port.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_portIsolation.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_qos.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_rldp.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_rma.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_scheduling.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_storm.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_svlan.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_trunking.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_unknownMulticast.o
-+rtl8367s_gsw-objs += rtl8367c/rtl8367c_asicdrv_vlan.o
-+rtl8367s_gsw-objs += rtl8367c/smi.o
-+rtl8367s_gsw-objs += rtl8367c/stat.o
-+rtl8367s_gsw-objs += rtl8367c/storm.o
-+rtl8367s_gsw-objs += rtl8367c/svlan.o
-+rtl8367s_gsw-objs += rtl8367c/trap.o
-+rtl8367s_gsw-objs += rtl8367c/trunk.o
-+rtl8367s_gsw-objs += rtl8367c/vlan.o
-+
-+ccflags-y += -Werror -D_LITTLE_ENDIAN -DMDC_MDIO_OPERATION
-+
-+ccflags-y += -Idrivers/net/phy/rtk/rtl8367c/include
-+ccflags-y += -Iinclude/linux/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/modules.builtin b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/modules.builtin
-new file mode 100644
-index 0000000000..961a70a150
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/modules.builtin
-@@ -0,0 +1 @@
-+kernel/drivers/net/phy/rtk/rtl8367s_gsw.ko
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/acl.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/acl.c
-new file mode 100644
-index 0000000000..75e5a5e740
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/acl.c
-@@ -0,0 +1,2061 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in ACL module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <acl.h>
-+#include <vlan.h>
-+#include <svlan.h>
-+#include <rate.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_acl.h>
-+#include <rtl8367c_asicdrv_hsb.h>
-+#include <rtl8367c_asicdrv_vlan.h>
-+#include <rtl8367c_asicdrv_svlan.h>
-+#include <rtl8367c_asicdrv_cputag.h>
-+#include <rtl8367c_asicdrv_mib.h>
-+
-+CONST_T rtk_uint8 filter_templateField[RTL8367C_ACLTEMPLATENO][RTL8367C_ACLRULEFIELDNO] = {
-+    {ACL_DMAC0,             ACL_DMAC1,          ACL_DMAC2,          ACL_SMAC0,          ACL_SMAC1,          ACL_SMAC2,          ACL_ETHERTYPE,      ACL_FIELD_SELECT15},
-+    {ACL_IP4SIP0,           ACL_IP4SIP1,        ACL_IP4DIP0,        ACL_IP4DIP1,        ACL_FIELD_SELECT13, ACL_FIELD_SELECT14, ACL_FIELD_SELECT02, ACL_FIELD_SELECT15},
-+    {ACL_IP6SIP0WITHIPV4,   ACL_IP6SIP1WITHIPV4,ACL_FIELD_SELECT03, ACL_FIELD_SELECT04, ACL_FIELD_SELECT05, ACL_FIELD_SELECT06, ACL_FIELD_SELECT07, ACL_FIELD_SELECT08},
-+    {ACL_IP6DIP0WITHIPV4,   ACL_IP6DIP1WITHIPV4,ACL_FIELD_SELECT09, ACL_FIELD_SELECT10, ACL_FIELD_SELECT11, ACL_FIELD_SELECT12, ACL_FIELD_SELECT13, ACL_FIELD_SELECT14},
-+    {ACL_VIDRANGE,          ACL_IPRANGE,        ACL_PORTRANGE,      ACL_CTAG,           ACL_STAG,           ACL_FIELD_SELECT13, ACL_FIELD_SELECT14, ACL_FIELD_SELECT15}
-+};
-+
-+CONST_T rtk_uint8 filter_advanceCaretagField[RTL8367C_ACLTEMPLATENO][2] = {
-+    {TRUE,      7},
-+    {TRUE,      7},
-+    {FALSE,     0},
-+    {FALSE,     0},
-+    {TRUE,      7},
-+};
-+
-+
-+CONST_T rtk_uint8 filter_fieldTemplateIndex[FILTER_FIELD_END][RTK_FILTER_FIELD_USED_MAX] = {
-+    {0x00, 0x01,0x02},
-+    {0x03, 0x04,0x05},
-+    {0x06},
-+    {0x43},
-+    {0x44},
-+    {0x10, 0x11},
-+    {0x12, 0x13},
-+    {0x24},
-+    {0x25},
-+    {0x35},
-+    {0x35},
-+    {0x20, 0x21,0x22,0x23},
-+    {0x30, 0x31,0x32,0x33},
-+    {0x26},
-+    {0x27},
-+    {0x14},
-+    {0x15},
-+    {0x16},
-+    {0x14},
-+    {0x15},
-+    {0x14},
-+    {0x14},
-+    {0x14},
-+
-+    {0x40},
-+    {0x41},
-+    {0x42},
-+
-+    {0x14},
-+    {0x15},
-+    {0x16},
-+    {0x22},
-+    {0x23},
-+    {0x24},
-+    {0x25},
-+    {0x26},
-+    {0x27},
-+    {0x32},
-+    {0x33},
-+    {0x34},
-+    {0x35},
-+    {0x36},
-+    {0x37},
-+    {0x47},
-+
-+    {0xFF} /* Pattern Match */
-+};
-+
-+CONST_T rtk_uint8 filter_fieldSize[FILTER_FIELD_END] = {
-+    3, 3, 1, 1, 1,
-+    2, 2, 1, 1, 1, 1, 4, 4, 1, 1,
-+    1, 1, 1, 1, 1, 1, 1, 1,
-+    1, 1, 1,
-+    1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-+    8
-+};
-+
-+CONST_T rtk_uint16 field_selector[RTL8367C_FIELDSEL_FORMAT_NUMBER][2] =
-+{
-+    {FIELDSEL_FORMAT_DEFAULT, 0},    /* Field Selector 0 */
-+    {FIELDSEL_FORMAT_DEFAULT, 0},    /* Field Selector 1 */
-+    {FIELDSEL_FORMAT_IPPAYLOAD, 12}, /* Field Selector 2 */
-+    {FIELDSEL_FORMAT_IPV6, 10},      /* Field Selector 3 */
-+    {FIELDSEL_FORMAT_IPV6, 8},       /* Field Selector 4 */
-+    {FIELDSEL_FORMAT_IPV4, 0},       /* Field Selector 5 */
-+    {FIELDSEL_FORMAT_IPV4, 8},       /* Field Selector 6 */
-+    {FIELDSEL_FORMAT_IPV6, 0},       /* Field Selector 7 */
-+    {FIELDSEL_FORMAT_IPV6, 6},       /* Field Selector 8 */
-+    {FIELDSEL_FORMAT_IPV6, 26},      /* Field Selector 9 */
-+    {FIELDSEL_FORMAT_IPV6, 24},      /* Field Selector 10 */
-+    {FIELDSEL_FORMAT_DEFAULT, 0},    /* Field Selector 11 */
-+    {FIELDSEL_FORMAT_IPV4, 6},       /* Field Selector 12 */
-+    {FIELDSEL_FORMAT_IPPAYLOAD, 0},  /* Field Selector 13 */
-+    {FIELDSEL_FORMAT_IPPAYLOAD, 2},  /* Field Selector 14 */
-+    {FIELDSEL_FORMAT_DEFAULT, 0}     /* Field Selector 15 */
-+};
-+
-+
-+static rtk_api_ret_t _rtk_filter_igrAcl_writeDataField(rtl8367c_aclrule *aclRule, rtk_filter_field_t *fieldPtr);
-+
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_init
-+ * Description:
-+ *      ACL initialization function
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NULL_POINTER - Pointer pFilter_field or pFilter_cfg point to NULL.
-+ * Note:
-+ *      This function enable and intialize ACL function
-+ */
-+rtk_api_ret_t rtk_filter_igrAcl_init(void)
-+{
-+    rtl8367c_acltemplate_t       aclTemp;
-+    rtk_uint32                 i, j;
-+    rtk_api_ret_t          ret;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((ret = rtk_filter_igrAcl_cfg_delAll()) != RT_ERR_OK)
-+        return ret;
-+
-+    for(i = 0; i < RTL8367C_ACLTEMPLATENO; i++)
-+    {
-+        for(j = 0; j < RTL8367C_ACLRULEFIELDNO;j++)
-+            aclTemp.field[j] = filter_templateField[i][j];
-+
-+        if ((ret = rtl8367c_setAsicAclTemplate(i, &aclTemp)) != RT_ERR_OK)
-+            return ret;
-+    }
-+
-+    for(i = 0; i < RTL8367C_FIELDSEL_FORMAT_NUMBER; i++)
-+    {
-+        if ((ret = rtl8367c_setAsicFieldSelector(i, field_selector[i][0], field_selector[i][1])) != RT_ERR_OK)
-+            return ret;
-+    }
-+
-+    RTK_SCAN_ALL_PHY_PORTMASK(i)
-+    {
-+        if ((ret = rtl8367c_setAsicAcl(i, TRUE)) != RT_ERR_OK)
-+            return ret;
-+
-+        if ((ret = rtl8367c_setAsicAclUnmatchedPermit(i, TRUE)) != RT_ERR_OK)
-+            return ret;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_field_add
-+ * Description:
-+ *      Add comparison rule to an ACL configuration
-+ * Input:
-+ *      pFilter_cfg     - The ACL configuration that this function will add comparison rule
-+ *      pFilter_field   - The comparison rule that will be added.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_NULL_POINTER     - Pointer pFilter_field or pFilter_cfg point to NULL.
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ * Note:
-+ *      This function add a comparison rule (*pFilter_field) to an ACL configuration (*pFilter_cfg).
-+ *      Pointer pFilter_cfg points to an ACL configuration structure, this structure keeps multiple ACL
-+ *      comparison rules by means of linked list. Pointer pFilter_field will be added to linked
-+ *      list keeped by structure that pFilter_cfg points to.
-+ */
-+rtk_api_ret_t rtk_filter_igrAcl_field_add(rtk_filter_cfg_t* pFilter_cfg, rtk_filter_field_t* pFilter_field)
-+{
-+    rtk_uint32 i;
-+    rtk_filter_field_t *tailPtr;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pFilter_cfg || NULL == pFilter_field)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(pFilter_field->fieldType >= FILTER_FIELD_END)
-+        return RT_ERR_ENTRY_INDEX;
-+
-+
-+    if(0 == pFilter_field->fieldTemplateNo)
-+    {
-+        pFilter_field->fieldTemplateNo = filter_fieldSize[pFilter_field->fieldType];
-+
-+        for(i = 0; i < pFilter_field->fieldTemplateNo; i++)
-+        {
-+            pFilter_field->fieldTemplateIdx[i] = filter_fieldTemplateIndex[pFilter_field->fieldType][i];
-+        }
-+    }
-+
-+    if(NULL == pFilter_cfg->fieldHead)
-+    {
-+        pFilter_cfg->fieldHead = pFilter_field;
-+    }
-+    else
-+    {
-+        if (pFilter_cfg->fieldHead->next == NULL)
-+        {
-+            pFilter_cfg->fieldHead->next = pFilter_field;
-+        }
-+        else
-+        {
-+            tailPtr = pFilter_cfg->fieldHead->next;
-+            while( tailPtr->next != NULL)
-+            {
-+                tailPtr = tailPtr->next;
-+            }
-+            tailPtr->next = pFilter_field;
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+static rtk_api_ret_t _rtk_filter_igrAcl_writeDataField(rtl8367c_aclrule *aclRule, rtk_filter_field_t *fieldPtr)
-+{
-+    rtk_uint32 i, tempIdx,fieldIdx, ipValue, ipMask;
-+    rtk_uint32 ip6addr[RTK_IPV6_ADDR_WORD_LENGTH];
-+    rtk_uint32 ip6mask[RTK_IPV6_ADDR_WORD_LENGTH];
-+
-+    for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+    {
-+        tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+
-+        aclRule[tempIdx].valid = TRUE;
-+    }
-+
-+    switch (fieldPtr->fieldType)
-+    {
-+    /* use DMAC structure as representative for mac structure */
-+    case FILTER_FIELD_DMAC:
-+    case FILTER_FIELD_SMAC:
-+
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.mac.value.octet[5 - i*2] | (fieldPtr->filter_pattern_union.mac.value.octet[5 - (i*2 + 1)] << 8);
-+            aclRule[tempIdx].care_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.mac.mask.octet[5 - i*2] | (fieldPtr->filter_pattern_union.mac.mask.octet[5 - (i*2 + 1)] << 8);
-+        }
-+        break;
-+    case FILTER_FIELD_ETHERTYPE:
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.etherType.value;
-+            aclRule[tempIdx].care_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.etherType.mask;
-+        }
-+        break;
-+    case FILTER_FIELD_IPV4_SIP:
-+    case FILTER_FIELD_IPV4_DIP:
-+
-+        ipValue = fieldPtr->filter_pattern_union.sip.value;
-+        ipMask = fieldPtr->filter_pattern_union.sip.mask;
-+
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] = (0xFFFF & (ipValue >> (i*16)));
-+            aclRule[tempIdx].care_bits.field[fieldIdx] = (0xFFFF & (ipMask >> (i*16)));
-+        }
-+        break;
-+    case FILTER_FIELD_IPV4_TOS:
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.ipTos.value & 0xFF;
-+            aclRule[tempIdx].care_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.ipTos.mask  & 0xFF;
-+        }
-+        break;
-+    case FILTER_FIELD_IPV4_PROTOCOL:
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.protocol.value & 0xFF;
-+            aclRule[tempIdx].care_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.protocol.mask  & 0xFF;
-+        }
-+        break;
-+    case FILTER_FIELD_IPV6_SIPV6:
-+    case FILTER_FIELD_IPV6_DIPV6:
-+        for(i = 0; i < RTK_IPV6_ADDR_WORD_LENGTH; i++)
-+        {
-+            ip6addr[i] = fieldPtr->filter_pattern_union.sipv6.value.addr[i];
-+            ip6mask[i] = fieldPtr->filter_pattern_union.sipv6.mask.addr[i];
-+        }
-+
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            if(i < 2)
-+            {
-+                aclRule[tempIdx].data_bits.field[fieldIdx] = ((ip6addr[0] & (0xFFFF << (i * 16))) >> (i * 16));
-+                aclRule[tempIdx].care_bits.field[fieldIdx] = ((ip6mask[0] & (0xFFFF << (i * 16))) >> (i * 16));
-+            }
-+            else
-+            {
-+                /*default acl template for ipv6 address supports MSB 32-bits and LSB 32-bits only*/
-+                aclRule[tempIdx].data_bits.field[fieldIdx] = ((ip6addr[3] & (0xFFFF << ((i&1) * 16))) >> ((i&1) * 16));
-+                aclRule[tempIdx].care_bits.field[fieldIdx] = ((ip6mask[3] & (0xFFFF << ((i&1) * 16))) >> ((i&1) * 16));
-+            }
-+        }
-+
-+        break;
-+    case FILTER_FIELD_CTAG:
-+    case FILTER_FIELD_STAG:
-+
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] = (fieldPtr->filter_pattern_union.l2tag.pri.value << 13) | (fieldPtr->filter_pattern_union.l2tag.cfi.value << 12) | fieldPtr->filter_pattern_union.l2tag.vid.value;
-+            aclRule[tempIdx].care_bits.field[fieldIdx] = (fieldPtr->filter_pattern_union.l2tag.pri.mask << 13) | (fieldPtr->filter_pattern_union.l2tag.cfi.mask << 12) | fieldPtr->filter_pattern_union.l2tag.vid.mask;
-+        }
-+        break;
-+    case FILTER_FIELD_IPV4_FLAG:
-+
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] &= 0x1FFF;
-+            aclRule[tempIdx].data_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.ipFlag.xf.value << 15);
-+            aclRule[tempIdx].data_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.ipFlag.df.value << 14);
-+            aclRule[tempIdx].data_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.ipFlag.mf.value << 13);
-+
-+            aclRule[tempIdx].care_bits.field[fieldIdx] &= 0x1FFF;
-+            aclRule[tempIdx].care_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.ipFlag.xf.mask << 15);
-+            aclRule[tempIdx].care_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.ipFlag.df.mask << 14);
-+            aclRule[tempIdx].care_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.ipFlag.mf.mask << 13);
-+        }
-+
-+        break;
-+    case FILTER_FIELD_IPV4_OFFSET:
-+
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] &= 0xE000;
-+            aclRule[tempIdx].data_bits.field[fieldIdx] |= fieldPtr->filter_pattern_union.inData.value;
-+
-+            aclRule[tempIdx].care_bits.field[fieldIdx] &= 0xE000;
-+            aclRule[tempIdx].care_bits.field[fieldIdx] |= fieldPtr->filter_pattern_union.inData.mask;
-+        }
-+
-+        break;
-+
-+    case FILTER_FIELD_IPV6_TRAFFIC_CLASS:
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] = (fieldPtr->filter_pattern_union.inData.value << 4)&0x0FF0;
-+            aclRule[tempIdx].care_bits.field[fieldIdx] = (fieldPtr->filter_pattern_union.inData.mask << 4)&0x0FF0;
-+        }
-+        break;
-+    case FILTER_FIELD_IPV6_NEXT_HEADER:
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.inData.value << 8;
-+            aclRule[tempIdx].care_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.inData.mask << 8;
-+        }
-+        break;
-+    case FILTER_FIELD_TCP_SPORT:
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.tcpSrcPort.value;
-+            aclRule[tempIdx].care_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.tcpSrcPort.mask;
-+        }
-+        break;
-+    case FILTER_FIELD_TCP_DPORT:
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.tcpDstPort.value;
-+            aclRule[tempIdx].care_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.tcpDstPort.mask;
-+        }
-+        break;
-+    case FILTER_FIELD_TCP_FLAG:
-+
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.tcpFlag.cwr.value << 7);
-+            aclRule[tempIdx].data_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.tcpFlag.ece.value << 6);
-+            aclRule[tempIdx].data_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.tcpFlag.urg.value << 5);
-+            aclRule[tempIdx].data_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.tcpFlag.ack.value << 4);
-+            aclRule[tempIdx].data_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.tcpFlag.psh.value << 3);
-+            aclRule[tempIdx].data_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.tcpFlag.rst.value << 2);
-+            aclRule[tempIdx].data_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.tcpFlag.syn.value << 1);
-+            aclRule[tempIdx].data_bits.field[fieldIdx] |= fieldPtr->filter_pattern_union.tcpFlag.fin.value;
-+
-+            aclRule[tempIdx].care_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.tcpFlag.cwr.mask << 7);
-+            aclRule[tempIdx].care_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.tcpFlag.ece.mask << 6);
-+            aclRule[tempIdx].care_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.tcpFlag.urg.mask << 5);
-+            aclRule[tempIdx].care_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.tcpFlag.ack.mask << 4);
-+            aclRule[tempIdx].care_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.tcpFlag.psh.mask << 3);
-+            aclRule[tempIdx].care_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.tcpFlag.rst.mask << 2);
-+            aclRule[tempIdx].care_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.tcpFlag.syn.mask << 1);
-+            aclRule[tempIdx].care_bits.field[fieldIdx] |= fieldPtr->filter_pattern_union.tcpFlag.fin.mask;
-+        }
-+        break;
-+    case FILTER_FIELD_UDP_SPORT:
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.udpSrcPort.value;
-+            aclRule[tempIdx].care_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.udpSrcPort.mask;
-+        }
-+        break;
-+    case FILTER_FIELD_UDP_DPORT:
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.udpDstPort.value;
-+            aclRule[tempIdx].care_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.udpDstPort.mask;
-+        }
-+        break;
-+    case FILTER_FIELD_ICMP_CODE:
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] &= 0xFF00;
-+            aclRule[tempIdx].data_bits.field[fieldIdx] |= fieldPtr->filter_pattern_union.icmpCode.value;
-+            aclRule[tempIdx].care_bits.field[fieldIdx] &= 0xFF00;
-+            aclRule[tempIdx].care_bits.field[fieldIdx] |= fieldPtr->filter_pattern_union.icmpCode.mask;
-+        }
-+        break;
-+    case FILTER_FIELD_ICMP_TYPE:
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] &= 0x00FF;
-+            aclRule[tempIdx].data_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.icmpType.value << 8);
-+            aclRule[tempIdx].care_bits.field[fieldIdx] &= 0x00FF;
-+            aclRule[tempIdx].care_bits.field[fieldIdx] |= (fieldPtr->filter_pattern_union.icmpType.mask << 8);
-+        }
-+        break;
-+    case FILTER_FIELD_IGMP_TYPE:
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] = (fieldPtr->filter_pattern_union.igmpType.value << 8);
-+            aclRule[tempIdx].care_bits.field[fieldIdx] = (fieldPtr->filter_pattern_union.igmpType.mask << 8);
-+        }
-+        break;
-+    case FILTER_FIELD_PATTERN_MATCH:
-+        for(i = 0; i < fieldPtr->fieldTemplateNo; i++)
-+        {
-+            tempIdx = (fieldPtr->fieldTemplateIdx[i] & 0xF0) >> 4;
-+            fieldIdx = fieldPtr->fieldTemplateIdx[i] & 0x0F;
-+
-+            aclRule[tempIdx].data_bits.field[fieldIdx] = ((fieldPtr->filter_pattern_union.pattern.value[i/2] >> (16 * (i%2))) & 0x0000FFFF );
-+            aclRule[tempIdx].care_bits.field[fieldIdx] = ((fieldPtr->filter_pattern_union.pattern.mask[i/2] >> (16 * (i%2))) & 0x0000FFFF );
-+        }
-+        break;
-+    case FILTER_FIELD_VID_RANGE:
-+    case FILTER_FIELD_IP_RANGE:
-+    case FILTER_FIELD_PORT_RANGE:
-+    default:
-+        tempIdx = (fieldPtr->fieldTemplateIdx[0] & 0xF0) >> 4;
-+        fieldIdx = fieldPtr->fieldTemplateIdx[0] & 0x0F;
-+
-+        aclRule[tempIdx].data_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.inData.value;
-+        aclRule[tempIdx].care_bits.field[fieldIdx] = fieldPtr->filter_pattern_union.inData.mask;
-+        break;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_cfg_add
-+ * Description:
-+ *      Add an ACL configuration to ASIC
-+ * Input:
-+ *      filter_id       - Start index of ACL configuration.
-+ *      pFilter_cfg     - The ACL configuration that this function will add comparison rule
-+ *      pFilter_action  - Action(s) of ACL configuration.
-+ * Output:
-+ *      ruleNum - number of rules written in acl table
-+ * Return:
-+ *      RT_ERR_OK                               - OK
-+ *      RT_ERR_FAILED                           - Failed
-+ *      RT_ERR_SMI                              - SMI access error
-+ *      RT_ERR_NULL_POINTER                     - Pointer pFilter_field or pFilter_cfg point to NULL.
-+ *      RT_ERR_INPUT                            - Invalid input parameters.
-+ *      RT_ERR_ENTRY_INDEX                      - Invalid filter_id .
-+ *      RT_ERR_NULL_POINTER                     - Pointer pFilter_action or pFilter_cfg point to NULL.
-+ *      RT_ERR_FILTER_INACL_ACT_NOT_SUPPORT     - Action is not supported in this chip.
-+ *      RT_ERR_FILTER_INACL_RULE_NOT_SUPPORT    - Rule is not supported.
-+ * Note:
-+ *      This function store pFilter_cfg, pFilter_action into ASIC. The starting
-+ *      index(es) is filter_id.
-+ */
-+rtk_api_ret_t rtk_filter_igrAcl_cfg_add(rtk_filter_id_t filter_id, rtk_filter_cfg_t* pFilter_cfg, rtk_filter_action_t* pFilter_action, rtk_filter_number_t *ruleNum)
-+{
-+    rtk_api_ret_t               retVal;
-+    rtk_uint32                  careTagData, careTagMask;
-+    rtk_uint32                  i,vidx, svidx, actType, ruleId;
-+    rtk_uint32                  aclActCtrl;
-+    rtk_uint32                  cpuPort;
-+    rtk_filter_field_t*         fieldPtr;
-+    rtl8367c_aclrule            aclRule[RTL8367C_ACLTEMPLATENO];
-+    rtl8367c_aclrule            tempRule;
-+    rtl8367c_acl_act_t          aclAct;
-+    rtk_uint32                  noRulesAdd;
-+    rtk_uint32                  portmask;
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(filter_id > RTL8367C_ACLRULEMAX )
-+        return RT_ERR_ENTRY_INDEX;
-+
-+    if((NULL == pFilter_cfg) || (NULL == pFilter_action) || (NULL == ruleNum))
-+        return RT_ERR_NULL_POINTER;
-+
-+    fieldPtr = pFilter_cfg->fieldHead;
-+
-+    /* init RULE */
-+    for(i = 0; i < RTL8367C_ACLTEMPLATENO; i++)
-+    {
-+        memset(&aclRule[i], 0, sizeof(rtl8367c_aclrule));
-+
-+        aclRule[i].data_bits.type= i;
-+        aclRule[i].care_bits.type= 0x7;
-+    }
-+
-+    while(NULL != fieldPtr)
-+    {
-+        _rtk_filter_igrAcl_writeDataField(aclRule, fieldPtr);
-+
-+        fieldPtr = fieldPtr->next;
-+    }
-+
-+    /*set care tag mask in User Defined Field 15*/
-+    /*Follow care tag should not be used while ACL template and User defined fields are fully control by system designer*/
-+    /*those advanced packet type care tag is used in default template design structure only*/
-+    careTagData = 0;
-+    careTagMask = 0;
-+
-+    for(i = CARE_TAG_TCP; i < CARE_TAG_END; i++)
-+    {
-+        if(pFilter_cfg->careTag.tagType[i].mask)
-+            careTagMask = careTagMask | (1 << (i-CARE_TAG_TCP));
-+
-+        if(pFilter_cfg->careTag.tagType[i].value)
-+            careTagData = careTagData | (1 << (i-CARE_TAG_TCP));
-+    }
-+
-+    if(careTagData || careTagMask)
-+    {
-+        i = 0;
-+        while(i < RTL8367C_ACLTEMPLATENO)
-+        {
-+            if(aclRule[i].valid == 1 && filter_advanceCaretagField[i][0] == TRUE)
-+            {
-+
-+                aclRule[i].data_bits.field[filter_advanceCaretagField[i][1]] = careTagData & 0xFFFF;
-+                aclRule[i].care_bits.field[filter_advanceCaretagField[i][1]] = careTagMask & 0xFFFF;
-+                break;
-+            }
-+            i++;
-+        }
-+        /*none of previous used template containing field 15*/
-+        if(i == RTL8367C_ACLTEMPLATENO)
-+        {
-+            i = 0;
-+            while(i < RTL8367C_ACLTEMPLATENO)
-+            {
-+                if(filter_advanceCaretagField[i][0] == TRUE)
-+                {
-+                    aclRule[i].data_bits.field[filter_advanceCaretagField[i][1]] = careTagData & 0xFFFF;
-+                    aclRule[i].care_bits.field[filter_advanceCaretagField[i][1]] = careTagMask & 0xFFFF;
-+                    aclRule[i].valid = 1;
-+                    break;
-+                }
-+                i++;
-+            }
-+        }
-+    }
-+
-+    /*Check rule number*/
-+    noRulesAdd = 0;
-+    for(i = 0; i < RTL8367C_ACLTEMPLATENO; i++)
-+    {
-+        if(1 == aclRule[i].valid)
-+        {
-+            noRulesAdd ++;
-+        }
-+    }
-+
-+    *ruleNum = noRulesAdd;
-+
-+    if((filter_id + noRulesAdd - 1) > RTL8367C_ACLRULEMAX)
-+    {
-+        return RT_ERR_ENTRY_INDEX;
-+    }
-+
-+    /*set care tag mask in TAG Indicator*/
-+    careTagData = 0;
-+    careTagMask = 0;
-+
-+    for(i = 0; i <= CARE_TAG_IPV6;i++)
-+    {
-+        if(0 == pFilter_cfg->careTag.tagType[i].mask )
-+        {
-+            careTagMask &=  ~(1 << i);
-+        }
-+        else
-+        {
-+            careTagMask |= (1 << i);
-+            if(0 == pFilter_cfg->careTag.tagType[i].value )
-+                careTagData &= ~(1 << i);
-+            else
-+                careTagData |= (1 << i);
-+        }
-+    }
-+
-+    for(i = 0; i < RTL8367C_ACLTEMPLATENO; i++)
-+    {
-+        aclRule[i].data_bits.tag_exist = (careTagData) & ACL_RULE_CARETAG_MASK;
-+        aclRule[i].care_bits.tag_exist = (careTagMask) & ACL_RULE_CARETAG_MASK;
-+    }
-+
-+    RTK_CHK_PORTMASK_VALID(&pFilter_cfg->activeport.value);
-+    RTK_CHK_PORTMASK_VALID(&pFilter_cfg->activeport.mask);
-+
-+    for(i = 0; i < RTL8367C_ACLTEMPLATENO; i++)
-+    {
-+        if(TRUE == aclRule[i].valid)
-+        {
-+            if(rtk_switch_portmask_L2P_get(&pFilter_cfg->activeport.value, &portmask) != RT_ERR_OK)
-+                return RT_ERR_PORT_MASK;
-+
-+            aclRule[i].data_bits.active_portmsk = portmask;
-+
-+            if(rtk_switch_portmask_L2P_get(&pFilter_cfg->activeport.mask, &portmask) != RT_ERR_OK)
-+                return RT_ERR_PORT_MASK;
-+
-+            aclRule[i].care_bits.active_portmsk = portmask;
-+        }
-+    }
-+
-+    if(pFilter_cfg->invert >= FILTER_INVERT_END )
-+        return RT_ERR_INPUT;
-+
-+
-+    /*Last action gets high priority if actions are the same*/
-+    memset(&aclAct, 0, sizeof(rtl8367c_acl_act_t));
-+    aclActCtrl = 0;
-+    for(actType = 0; actType < FILTER_ENACT_END; actType ++)
-+    {
-+        if(pFilter_action->actEnable[actType])
-+        {
-+            switch (actType)
-+            {
-+            case FILTER_ENACT_CVLAN_INGRESS:
-+                if(pFilter_action->filterCvlanVid > RTL8367C_EVIDMAX)
-+                    return RT_ERR_INPUT;
-+
-+                if((retVal = rtk_vlan_checkAndCreateMbr(pFilter_action->filterCvlanVid, &vidx)) != RT_ERR_OK)
-+                {
-+                    return retVal;
-+                }
-+                aclAct.cact = FILTER_ENACT_CVLAN_TYPE(actType);
-+                aclAct.cvidx_cact = vidx;
-+
-+                if(aclActCtrl &(FILTER_ENACT_CVLAN_MASK))
-+                {
-+                    if(aclAct.cact_ext == FILTER_ENACT_CACTEXT_TAGONLY)
-+                        aclAct.cact_ext = FILTER_ENACT_CACTEXT_BOTHVLANTAG;
-+                }
-+                else
-+                {
-+                    aclAct.cact_ext = FILTER_ENACT_CACTEXT_VLANONLY;
-+                }
-+
-+                aclActCtrl |= FILTER_ENACT_CVLAN_MASK;
-+                break;
-+            case FILTER_ENACT_CVLAN_EGRESS:
-+                if(pFilter_action->filterCvlanVid > RTL8367C_EVIDMAX)
-+                    return RT_ERR_INPUT;
-+
-+                if((retVal = rtk_vlan_checkAndCreateMbr(pFilter_action->filterCvlanVid, &vidx)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                aclAct.cact = FILTER_ENACT_CVLAN_TYPE(actType);
-+                aclAct.cvidx_cact = vidx;
-+
-+                if(aclActCtrl &(FILTER_ENACT_CVLAN_MASK))
-+                {
-+                    if(aclAct.cact_ext == FILTER_ENACT_CACTEXT_TAGONLY)
-+                        aclAct.cact_ext = FILTER_ENACT_CACTEXT_BOTHVLANTAG;
-+                }
-+                else
-+                {
-+                    aclAct.cact_ext = FILTER_ENACT_CACTEXT_VLANONLY;
-+                }
-+
-+                aclActCtrl |= FILTER_ENACT_CVLAN_MASK;
-+                break;
-+             case FILTER_ENACT_CVLAN_SVID:
-+
-+                aclAct.cact = FILTER_ENACT_CVLAN_TYPE(actType);
-+
-+                if(aclActCtrl &(FILTER_ENACT_CVLAN_MASK))
-+                {
-+                    if(aclAct.cact_ext == FILTER_ENACT_CACTEXT_TAGONLY)
-+                        aclAct.cact_ext = FILTER_ENACT_CACTEXT_BOTHVLANTAG;
-+                }
-+                else
-+                {
-+                    aclAct.cact_ext = FILTER_ENACT_CACTEXT_VLANONLY;
-+                }
-+
-+                aclActCtrl |= FILTER_ENACT_CVLAN_MASK;
-+                break;
-+             case FILTER_ENACT_POLICING_1:
-+                if(pFilter_action->filterPolicingIdx[1] >= (RTK_METER_NUM + RTL8367C_MAX_LOG_CNT_NUM))
-+                    return RT_ERR_INPUT;
-+
-+                aclAct.cact = FILTER_ENACT_CVLAN_TYPE(actType);
-+                aclAct.cvidx_cact = pFilter_action->filterPolicingIdx[1];
-+
-+                if(aclActCtrl &(FILTER_ENACT_CVLAN_MASK))
-+                {
-+                    if(aclAct.cact_ext == FILTER_ENACT_CACTEXT_TAGONLY)
-+                        aclAct.cact_ext = FILTER_ENACT_CACTEXT_BOTHVLANTAG;
-+                }
-+                else
-+                {
-+                    aclAct.cact_ext = FILTER_ENACT_CACTEXT_VLANONLY;
-+                }
-+
-+                aclActCtrl |= FILTER_ENACT_CVLAN_MASK;
-+                break;
-+
-+            case FILTER_ENACT_SVLAN_INGRESS:
-+            case FILTER_ENACT_SVLAN_EGRESS:
-+
-+                if((retVal = rtk_svlan_checkAndCreateMbr(pFilter_action->filterSvlanVid, &svidx)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                aclAct.sact = FILTER_ENACT_SVLAN_TYPE(actType);
-+                aclAct.svidx_sact = svidx;
-+                aclActCtrl |= FILTER_ENACT_SVLAN_MASK;
-+                break;
-+            case FILTER_ENACT_SVLAN_CVID:
-+
-+                aclAct.sact = FILTER_ENACT_SVLAN_TYPE(actType);
-+                aclActCtrl |= FILTER_ENACT_SVLAN_MASK;
-+                break;
-+            case FILTER_ENACT_POLICING_2:
-+                if(pFilter_action->filterPolicingIdx[2] >= (RTK_METER_NUM + RTL8367C_MAX_LOG_CNT_NUM))
-+                    return RT_ERR_INPUT;
-+
-+                aclAct.sact = FILTER_ENACT_SVLAN_TYPE(actType);
-+                aclAct.svidx_sact = pFilter_action->filterPolicingIdx[2];
-+                aclActCtrl |= FILTER_ENACT_SVLAN_MASK;
-+                break;
-+            case FILTER_ENACT_POLICING_0:
-+                if(pFilter_action->filterPolicingIdx[0] >= (RTK_METER_NUM + RTL8367C_MAX_LOG_CNT_NUM))
-+                    return RT_ERR_INPUT;
-+
-+                aclAct.aclmeteridx = pFilter_action->filterPolicingIdx[0];
-+                aclActCtrl |= FILTER_ENACT_POLICING_MASK;
-+                break;
-+            case FILTER_ENACT_PRIORITY:
-+            case FILTER_ENACT_1P_REMARK:
-+                if(pFilter_action->filterPriority > RTL8367C_PRIMAX)
-+                    return RT_ERR_INPUT;
-+
-+                aclAct.priact = FILTER_ENACT_PRI_TYPE(actType);
-+                aclAct.pridx = pFilter_action->filterPriority;
-+                aclActCtrl |= FILTER_ENACT_PRIORITY_MASK;
-+                break;
-+            case FILTER_ENACT_DSCP_REMARK:
-+                if(pFilter_action->filterPriority > RTL8367C_DSCPMAX)
-+                    return RT_ERR_INPUT;
-+
-+                aclAct.priact = FILTER_ENACT_PRI_TYPE(actType);
-+                aclAct.pridx = pFilter_action->filterPriority;
-+                aclActCtrl |= FILTER_ENACT_PRIORITY_MASK;
-+                break;
-+            case FILTER_ENACT_POLICING_3:
-+                if(pFilter_action->filterPriority >= (RTK_METER_NUM + RTL8367C_MAX_LOG_CNT_NUM))
-+                    return RT_ERR_INPUT;
-+
-+                aclAct.priact = FILTER_ENACT_PRI_TYPE(actType);
-+                aclAct.pridx = pFilter_action->filterPolicingIdx[3];
-+                aclActCtrl |= FILTER_ENACT_PRIORITY_MASK;
-+                break;
-+            case FILTER_ENACT_DROP:
-+
-+                aclAct.fwdact = FILTER_ENACT_FWD_TYPE(FILTER_ENACT_REDIRECT);
-+                aclAct.fwdact_ext = FALSE;
-+
-+                aclAct.fwdpmask = 0;
-+                aclActCtrl |= FILTER_ENACT_FWD_MASK;
-+                break;
-+            case FILTER_ENACT_REDIRECT:
-+                RTK_CHK_PORTMASK_VALID(&pFilter_action->filterPortmask);
-+
-+                aclAct.fwdact = FILTER_ENACT_FWD_TYPE(actType);
-+                aclAct.fwdact_ext = FALSE;
-+
-+                if(rtk_switch_portmask_L2P_get(&pFilter_action->filterPortmask, &portmask) != RT_ERR_OK)
-+                    return RT_ERR_PORT_MASK;
-+                aclAct.fwdpmask = portmask;
-+
-+                aclActCtrl |= FILTER_ENACT_FWD_MASK;
-+                break;
-+
-+            case FILTER_ENACT_ADD_DSTPORT:
-+                RTK_CHK_PORTMASK_VALID(&pFilter_action->filterPortmask);
-+
-+                aclAct.fwdact = FILTER_ENACT_FWD_TYPE(actType);
-+                aclAct.fwdact_ext = FALSE;
-+
-+                if(rtk_switch_portmask_L2P_get(&pFilter_action->filterPortmask, &portmask) != RT_ERR_OK)
-+                    return RT_ERR_PORT_MASK;
-+                aclAct.fwdpmask = portmask;
-+
-+                aclActCtrl |= FILTER_ENACT_FWD_MASK;
-+                break;
-+            case FILTER_ENACT_MIRROR:
-+                RTK_CHK_PORTMASK_VALID(&pFilter_action->filterPortmask);
-+
-+                aclAct.fwdact = FILTER_ENACT_FWD_TYPE(actType);
-+                aclAct.cact_ext = FALSE;
-+
-+                if(rtk_switch_portmask_L2P_get(&pFilter_action->filterPortmask, &portmask) != RT_ERR_OK)
-+                    return RT_ERR_PORT_MASK;
-+                aclAct.fwdpmask = portmask;
-+
-+                aclActCtrl |= FILTER_ENACT_FWD_MASK;
-+                break;
-+            case FILTER_ENACT_TRAP_CPU:
-+
-+                aclAct.fwdact = FILTER_ENACT_FWD_TYPE(actType);
-+                aclAct.fwdact_ext = FALSE;
-+
-+                aclActCtrl |= FILTER_ENACT_FWD_MASK;
-+                break;
-+            case FILTER_ENACT_COPY_CPU:
-+                if((retVal = rtl8367c_getAsicCputagTrapPort(&cpuPort)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                aclAct.fwdact = FILTER_ENACT_FWD_TYPE(FILTER_ENACT_MIRROR);
-+                aclAct.fwdact_ext = FALSE;
-+
-+                aclAct.fwdpmask = 1 << cpuPort;
-+                aclActCtrl |= FILTER_ENACT_FWD_MASK;
-+                break;
-+            case FILTER_ENACT_ISOLATION:
-+                RTK_CHK_PORTMASK_VALID(&pFilter_action->filterPortmask);
-+
-+                aclAct.fwdact_ext = TRUE;
-+
-+                if(rtk_switch_portmask_L2P_get(&pFilter_action->filterPortmask, &portmask) != RT_ERR_OK)
-+                    return RT_ERR_PORT_MASK;
-+                aclAct.fwdpmask = portmask;
-+
-+                aclActCtrl |= FILTER_ENACT_FWD_MASK;
-+                break;
-+
-+            case FILTER_ENACT_INTERRUPT:
-+
-+                aclAct.aclint = TRUE;
-+                aclActCtrl |= FILTER_ENACT_INTGPIO_MASK;
-+                break;
-+            case FILTER_ENACT_GPO:
-+
-+                aclAct.gpio_en = TRUE;
-+                aclAct.gpio_pin = pFilter_action->filterPin;
-+                aclActCtrl |= FILTER_ENACT_INTGPIO_MASK;
-+                break;
-+             case FILTER_ENACT_EGRESSCTAG_TAG:
-+
-+                if(aclActCtrl &(FILTER_ENACT_CVLAN_MASK))
-+                {
-+                    if(aclAct.cact_ext == FILTER_ENACT_CACTEXT_VLANONLY)
-+                        aclAct.cact_ext = FILTER_ENACT_CACTEXT_BOTHVLANTAG;
-+                }
-+                else
-+                {
-+                    aclAct.cact_ext = FILTER_ENACT_CACTEXT_TAGONLY;
-+                }
-+                aclAct.tag_fmt = FILTER_CTAGFMT_TAG;
-+                aclActCtrl |= FILTER_ENACT_CVLAN_MASK;
-+                break;
-+             case FILTER_ENACT_EGRESSCTAG_UNTAG:
-+
-+                if(aclActCtrl &(FILTER_ENACT_CVLAN_MASK))
-+                {
-+                    if(aclAct.cact_ext == FILTER_ENACT_CACTEXT_VLANONLY)
-+                        aclAct.cact_ext = FILTER_ENACT_CACTEXT_BOTHVLANTAG;
-+                }
-+                else
-+                {
-+                    aclAct.cact_ext = FILTER_ENACT_CACTEXT_TAGONLY;
-+                }
-+                aclAct.tag_fmt = FILTER_CTAGFMT_UNTAG;
-+                aclActCtrl |= FILTER_ENACT_CVLAN_MASK;
-+                break;
-+             case FILTER_ENACT_EGRESSCTAG_KEEP:
-+
-+                if(aclActCtrl &(FILTER_ENACT_CVLAN_MASK))
-+                {
-+                    if(aclAct.cact_ext == FILTER_ENACT_CACTEXT_VLANONLY)
-+                        aclAct.cact_ext = FILTER_ENACT_CACTEXT_BOTHVLANTAG;
-+                }
-+                else
-+                {
-+                    aclAct.cact_ext = FILTER_ENACT_CACTEXT_TAGONLY;
-+                }
-+                aclAct.tag_fmt = FILTER_CTAGFMT_KEEP;
-+                aclActCtrl |= FILTER_ENACT_CVLAN_MASK;
-+                break;
-+             case FILTER_ENACT_EGRESSCTAG_KEEPAND1PRMK:
-+
-+                if(aclActCtrl &(FILTER_ENACT_CVLAN_MASK))
-+                {
-+                    if(aclAct.cact_ext == FILTER_ENACT_CACTEXT_VLANONLY)
-+                        aclAct.cact_ext = FILTER_ENACT_CACTEXT_BOTHVLANTAG;
-+                }
-+                else
-+                {
-+                    aclAct.cact_ext = FILTER_ENACT_CACTEXT_TAGONLY;
-+                }
-+                aclAct.tag_fmt = FILTER_CTAGFMT_KEEP1PRMK;
-+                aclActCtrl |= FILTER_ENACT_CVLAN_MASK;
-+                break;
-+           default:
-+                return RT_ERR_FILTER_INACL_ACT_NOT_SUPPORT;
-+            }
-+        }
-+    }
-+
-+
-+    /*check if free ACL rules are enough*/
-+    for(i = filter_id; i < (filter_id + noRulesAdd); i++)
-+    {
-+        if((retVal = rtl8367c_getAsicAclRule(i, &tempRule)) != RT_ERR_OK )
-+            return retVal;
-+
-+        if(tempRule.valid == TRUE)
-+        {
-+            return RT_ERR_TBL_FULL;
-+        }
-+    }
-+
-+    ruleId = 0;
-+    for(i = 0; i < RTL8367C_ACLTEMPLATENO; i++)
-+    {
-+        if(aclRule[i].valid == TRUE)
-+        {
-+            /* write ACL action control */
-+            if((retVal = rtl8367c_setAsicAclActCtrl(filter_id + ruleId, aclActCtrl)) != RT_ERR_OK )
-+                return retVal;
-+            /* write ACL action */
-+            if((retVal = rtl8367c_setAsicAclAct(filter_id + ruleId, &aclAct)) != RT_ERR_OK )
-+                return retVal;
-+
-+            /* write ACL not */
-+            if((retVal = rtl8367c_setAsicAclNot(filter_id + ruleId, pFilter_cfg->invert)) != RT_ERR_OK )
-+                return retVal;
-+            /* write ACL rule */
-+            if((retVal = rtl8367c_setAsicAclRule(filter_id + ruleId, &aclRule[i])) != RT_ERR_OK )
-+                return retVal;
-+
-+            /* only the first rule will be written with input action control, aclActCtrl of other rules will be zero */
-+            aclActCtrl = 0;
-+            memset(&aclAct, 0, sizeof(rtl8367c_acl_act_t));
-+
-+            ruleId ++;
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_cfg_del
-+ * Description:
-+ *      Delete an ACL configuration from ASIC
-+ * Input:
-+ *      filter_id   - Start index of ACL configuration.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_ENTRYIDX  - Invalid filter_id.
-+ * Note:
-+ *      This function delete a group of ACL rules starting from filter_id.
-+ */
-+rtk_api_ret_t rtk_filter_igrAcl_cfg_del(rtk_filter_id_t filter_id)
-+{
-+    rtl8367c_aclrule initRule;
-+    rtl8367c_acl_act_t  initAct;
-+    rtk_api_ret_t ret;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(filter_id > RTL8367C_ACLRULEMAX )
-+        return RT_ERR_FILTER_ENTRYIDX;
-+
-+    memset(&initRule, 0, sizeof(rtl8367c_aclrule));
-+    memset(&initAct, 0, sizeof(rtl8367c_acl_act_t));
-+
-+    if((ret = rtl8367c_setAsicAclRule(filter_id, &initRule)) != RT_ERR_OK)
-+        return ret;
-+    if((ret = rtl8367c_setAsicAclActCtrl(filter_id, FILTER_ENACT_INIT_MASK))!= RT_ERR_OK)
-+        return ret;
-+    if((ret = rtl8367c_setAsicAclAct(filter_id, &initAct)) != RT_ERR_OK)
-+        return ret;
-+    if((ret = rtl8367c_setAsicAclNot(filter_id, DISABLED)) != RT_ERR_OK )
-+        return ret;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_cfg_delAll
-+ * Description:
-+ *      Delete all ACL entries from ASIC
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      This function delete all ACL configuration from ASIC.
-+ */
-+rtk_api_ret_t rtk_filter_igrAcl_cfg_delAll(void)
-+{
-+    rtk_uint32            i;
-+    rtk_api_ret_t     ret;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    for(i = 0; i < RTL8367C_ACLRULENO; i++)
-+    {
-+        if((ret = rtl8367c_setAsicAclActCtrl(i, FILTER_ENACT_INIT_MASK))!= RT_ERR_OK)
-+            return ret;
-+        if((ret = rtl8367c_setAsicAclNot(i, DISABLED)) != RT_ERR_OK )
-+            return ret;
-+    }
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_ACL_RESET_CFG, RTL8367C_ACL_RESET_CFG_OFFSET, TRUE);;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_cfg_get
-+ * Description:
-+ *      Get one ingress acl configuration from ASIC.
-+ * Input:
-+ *      filter_id       - Start index of ACL configuration.
-+ * Output:
-+ *      pFilter_cfg     - buffer pointer of ingress acl data
-+ *      pFilter_action  - buffer pointer of ingress acl action
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_NULL_POINTER     - Pointer pFilter_action or pFilter_cfg point to NULL.
-+ *      RT_ERR_FILTER_ENTRYIDX  - Invalid entry index.
-+ * Note:
-+ *      This function get configuration from ASIC.
-+ */
-+rtk_api_ret_t rtk_filter_igrAcl_cfg_get(rtk_filter_id_t filter_id, rtk_filter_cfg_raw_t *pFilter_cfg, rtk_filter_action_t *pAction)
-+{
-+    rtk_api_ret_t               retVal;
-+    rtk_uint32                  i, tmp;
-+    rtl8367c_aclrule            aclRule;
-+    rtl8367c_acl_act_t          aclAct;
-+    rtk_uint32                  cpuPort;
-+    rtl8367c_acltemplate_t      type;
-+    rtl8367c_svlan_memconf_t    svlan_cfg;
-+    rtl8367c_vlanconfiguser     vlanMC;
-+    rtk_uint32                  phyPmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pFilter_cfg || NULL == pAction)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(filter_id > RTL8367C_ACLRULEMAX)
-+        return RT_ERR_ENTRY_INDEX;
-+
-+    if ((retVal = rtl8367c_getAsicAclRule(filter_id, &aclRule)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Check valid */
-+    if(aclRule.valid == 0)
-+    {
-+        pFilter_cfg->valid = DISABLED;
-+        return RT_ERR_OK;
-+    }
-+
-+    phyPmask = aclRule.data_bits.active_portmsk;
-+    if(rtk_switch_portmask_P2L_get(phyPmask,&(pFilter_cfg->activeport.value)) != RT_ERR_OK)
-+        return RT_ERR_FAILED;
-+
-+    phyPmask = aclRule.care_bits.active_portmsk;
-+    if(rtk_switch_portmask_P2L_get(phyPmask,&(pFilter_cfg->activeport.mask)) != RT_ERR_OK)
-+        return RT_ERR_FAILED;
-+
-+    for(i = 0; i <= CARE_TAG_IPV6; i++)
-+    {
-+        if(aclRule.data_bits.tag_exist & (1 << i))
-+            pFilter_cfg->careTag.tagType[i].value = 1;
-+        else
-+            pFilter_cfg->careTag.tagType[i].value = 0;
-+
-+        if (aclRule.care_bits.tag_exist & (1 << i))
-+            pFilter_cfg->careTag.tagType[i].mask = 1;
-+        else
-+            pFilter_cfg->careTag.tagType[i].mask = 0;
-+    }
-+
-+    if(filter_advanceCaretagField[aclRule.data_bits.type][0] == TRUE)
-+    {
-+        /* Advanced Care tag setting */
-+        for(i = CARE_TAG_TCP; i < CARE_TAG_END; i++)
-+        {
-+            if(aclRule.data_bits.field[filter_advanceCaretagField[aclRule.data_bits.type][1]] & (0x0001 << (i-CARE_TAG_TCP)) )
-+                pFilter_cfg->careTag.tagType[i].value = 1;
-+            else
-+                pFilter_cfg->careTag.tagType[i].value = 0;
-+
-+            if(aclRule.care_bits.field[filter_advanceCaretagField[aclRule.care_bits.type][1]] & (0x0001 << (i-CARE_TAG_TCP)) )
-+                pFilter_cfg->careTag.tagType[i].mask = 1;
-+            else
-+                pFilter_cfg->careTag.tagType[i].mask = 0;
-+        }
-+    }
-+
-+    for(i = 0; i < RTL8367C_ACLRULEFIELDNO; i++)
-+    {
-+        pFilter_cfg->careFieldRaw[i] = aclRule.care_bits.field[i];
-+        pFilter_cfg->dataFieldRaw[i] = aclRule.data_bits.field[i];
-+    }
-+
-+    if ((retVal = rtl8367c_getAsicAclNot(filter_id, &tmp))!= RT_ERR_OK)
-+        return retVal;
-+
-+    pFilter_cfg->invert = tmp;
-+
-+    pFilter_cfg->valid = aclRule.valid;
-+
-+    memset(pAction, 0, sizeof(rtk_filter_action_t));
-+
-+    if ((retVal = rtl8367c_getAsicAclActCtrl(filter_id, &tmp))!= RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicAclAct(filter_id, &aclAct)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(tmp & FILTER_ENACT_FWD_MASK)
-+    {
-+        if(TRUE == aclAct.fwdact_ext)
-+        {
-+            pAction->actEnable[FILTER_ENACT_ISOLATION] = TRUE;
-+
-+            phyPmask = aclAct.fwdpmask;
-+            if(rtk_switch_portmask_P2L_get(phyPmask,&(pAction->filterPortmask)) != RT_ERR_OK)
-+                return RT_ERR_FAILED;
-+        }
-+        else if(aclAct.fwdact == RTL8367C_ACL_FWD_TRAP)
-+        {
-+            pAction->actEnable[FILTER_ENACT_TRAP_CPU] = TRUE;
-+        }
-+        else if (aclAct.fwdact == RTL8367C_ACL_FWD_MIRRORFUNTION )
-+        {
-+            pAction->actEnable[FILTER_ENACT_MIRROR] = TRUE;
-+
-+            phyPmask = aclAct.fwdpmask;
-+            if(rtk_switch_portmask_P2L_get(phyPmask,&(pAction->filterPortmask)) != RT_ERR_OK)
-+                return RT_ERR_FAILED;
-+        }
-+        else if (aclAct.fwdact == RTL8367C_ACL_FWD_REDIRECT)
-+        {
-+            if(aclAct.fwdpmask == 0 )
-+                pAction->actEnable[FILTER_ENACT_DROP] = TRUE;
-+            else
-+            {
-+                pAction->actEnable[FILTER_ENACT_REDIRECT] = TRUE;
-+
-+                phyPmask = aclAct.fwdpmask;
-+                if(rtk_switch_portmask_P2L_get(phyPmask,&(pAction->filterPortmask)) != RT_ERR_OK)
-+                    return RT_ERR_FAILED;
-+            }
-+        }
-+        else if (aclAct.fwdact == RTL8367C_ACL_FWD_MIRROR)
-+        {
-+            if((retVal = rtl8367c_getAsicCputagTrapPort(&cpuPort)) != RT_ERR_OK)
-+                return retVal;
-+            if (aclAct.fwdpmask == (1 << cpuPort))
-+            {
-+                pAction->actEnable[FILTER_ENACT_COPY_CPU] = TRUE;
-+            }
-+            else
-+            {
-+                pAction->actEnable[FILTER_ENACT_ADD_DSTPORT] = TRUE;
-+
-+                phyPmask = aclAct.fwdpmask;
-+                if(rtk_switch_portmask_P2L_get(phyPmask,&(pAction->filterPortmask)) != RT_ERR_OK)
-+                    return RT_ERR_FAILED;
-+            }
-+        }
-+        else
-+        {
-+            return RT_ERR_FAILED;
-+        }
-+    }
-+
-+    if(tmp & FILTER_ENACT_POLICING_MASK)
-+    {
-+        pAction->actEnable[FILTER_ENACT_POLICING_0] = TRUE;
-+        pAction->filterPolicingIdx[0] = aclAct.aclmeteridx;
-+    }
-+
-+    if(tmp & FILTER_ENACT_PRIORITY_MASK)
-+    {
-+        if(aclAct.priact == FILTER_ENACT_PRI_TYPE(FILTER_ENACT_PRIORITY))
-+        {
-+            pAction->actEnable[FILTER_ENACT_PRIORITY] = TRUE;
-+            pAction->filterPriority = aclAct.pridx;
-+        }
-+        else if(aclAct.priact == FILTER_ENACT_PRI_TYPE(FILTER_ENACT_1P_REMARK))
-+        {
-+            pAction->actEnable[FILTER_ENACT_1P_REMARK] = TRUE;
-+            pAction->filterPriority = aclAct.pridx;
-+        }
-+        else if(aclAct.priact == FILTER_ENACT_PRI_TYPE(FILTER_ENACT_DSCP_REMARK))
-+        {
-+            pAction->actEnable[FILTER_ENACT_DSCP_REMARK] = TRUE;
-+            pAction->filterPriority = aclAct.pridx;
-+        }
-+        else if(aclAct.priact == FILTER_ENACT_PRI_TYPE(FILTER_ENACT_POLICING_3))
-+        {
-+            pAction->actEnable[FILTER_ENACT_POLICING_3] = TRUE;
-+            pAction->filterPolicingIdx[3]  = aclAct.pridx;
-+        }
-+    }
-+
-+    if(tmp & FILTER_ENACT_SVLAN_MASK)
-+    {
-+        if(aclAct.sact == FILTER_ENACT_SVLAN_TYPE(FILTER_ENACT_SVLAN_INGRESS))
-+        {
-+            if((retVal = rtl8367c_getAsicSvlanMemberConfiguration(aclAct.svidx_sact, &svlan_cfg)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pAction->actEnable[FILTER_ENACT_SVLAN_INGRESS] = TRUE;
-+            pAction->filterSvlanIdx = aclAct.svidx_sact;
-+            pAction->filterSvlanVid = svlan_cfg.vs_svid;
-+        }
-+        else if(aclAct.sact == FILTER_ENACT_SVLAN_TYPE(FILTER_ENACT_SVLAN_EGRESS))
-+        {
-+            if((retVal = rtl8367c_getAsicSvlanMemberConfiguration(aclAct.svidx_sact, &svlan_cfg)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pAction->actEnable[FILTER_ENACT_SVLAN_EGRESS] = TRUE;
-+            pAction->filterSvlanIdx = aclAct.svidx_sact;
-+            pAction->filterSvlanVid = svlan_cfg.vs_svid;
-+        }
-+        else if(aclAct.sact == FILTER_ENACT_SVLAN_TYPE(FILTER_ENACT_SVLAN_CVID))
-+            pAction->actEnable[FILTER_ENACT_SVLAN_CVID] = TRUE;
-+        else if(aclAct.sact == FILTER_ENACT_SVLAN_TYPE(FILTER_ENACT_POLICING_2))
-+        {
-+            pAction->actEnable[FILTER_ENACT_POLICING_2] = TRUE;
-+            pAction->filterPolicingIdx[2]  = aclAct.svidx_sact;
-+        }
-+    }
-+
-+
-+    if(tmp & FILTER_ENACT_CVLAN_MASK)
-+    {
-+        if(FILTER_ENACT_CACTEXT_TAGONLY == aclAct.cact_ext ||
-+            FILTER_ENACT_CACTEXT_BOTHVLANTAG == aclAct.cact_ext )
-+        {
-+            if(FILTER_CTAGFMT_UNTAG == aclAct.tag_fmt)
-+            {
-+                pAction->actEnable[FILTER_ENACT_EGRESSCTAG_UNTAG] = TRUE;
-+            }
-+            else if(FILTER_CTAGFMT_TAG == aclAct.tag_fmt)
-+            {
-+                pAction->actEnable[FILTER_ENACT_EGRESSCTAG_TAG] = TRUE;
-+            }
-+            else if(FILTER_CTAGFMT_KEEP == aclAct.tag_fmt)
-+            {
-+                pAction->actEnable[FILTER_ENACT_EGRESSCTAG_KEEP] = TRUE;
-+            }
-+             else if(FILTER_CTAGFMT_KEEP1PRMK== aclAct.tag_fmt)
-+            {
-+                pAction->actEnable[FILTER_ENACT_EGRESSCTAG_KEEPAND1PRMK] = TRUE;
-+            }
-+
-+        }
-+
-+        if(FILTER_ENACT_CACTEXT_VLANONLY == aclAct.cact_ext ||
-+            FILTER_ENACT_CACTEXT_BOTHVLANTAG == aclAct.cact_ext )
-+        {
-+            if(aclAct.cact == FILTER_ENACT_CVLAN_TYPE(FILTER_ENACT_CVLAN_INGRESS))
-+            {
-+                if((retVal = rtl8367c_getAsicVlanMemberConfig(aclAct.cvidx_cact, &vlanMC)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                pAction->actEnable[FILTER_ENACT_CVLAN_INGRESS] = TRUE;
-+                pAction->filterCvlanIdx  = aclAct.cvidx_cact;
-+                pAction->filterCvlanVid  = vlanMC.evid;
-+            }
-+            else if(aclAct.cact == FILTER_ENACT_CVLAN_TYPE(FILTER_ENACT_CVLAN_EGRESS))
-+            {
-+                if((retVal = rtl8367c_getAsicVlanMemberConfig(aclAct.cvidx_cact, &vlanMC)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                pAction->actEnable[FILTER_ENACT_CVLAN_EGRESS] = TRUE;
-+                pAction->filterCvlanIdx  = aclAct.cvidx_cact;
-+                pAction->filterCvlanVid  = vlanMC.evid;
-+            }
-+            else if(aclAct.cact == FILTER_ENACT_CVLAN_TYPE(FILTER_ENACT_CVLAN_SVID))
-+            {
-+                pAction->actEnable[FILTER_ENACT_CVLAN_SVID] = TRUE;
-+            }
-+            else if(aclAct.cact == FILTER_ENACT_CVLAN_TYPE(FILTER_ENACT_POLICING_1))
-+            {
-+                pAction->actEnable[FILTER_ENACT_POLICING_1] = TRUE;
-+                pAction->filterPolicingIdx[1]  = aclAct.cvidx_cact;
-+            }
-+        }
-+    }
-+
-+    if(tmp & FILTER_ENACT_INTGPIO_MASK)
-+    {
-+        if(TRUE == aclAct.aclint)
-+        {
-+            pAction->actEnable[FILTER_ENACT_INTERRUPT] = TRUE;
-+        }
-+
-+        if(TRUE == aclAct.gpio_en)
-+        {
-+            pAction->actEnable[FILTER_ENACT_GPO] = TRUE;
-+            pAction->filterPin = aclAct.gpio_pin;
-+        }
-+    }
-+
-+    /* Get field type of RAW data */
-+    if ((retVal = rtl8367c_getAsicAclTemplate(aclRule.data_bits.type, &type))!= RT_ERR_OK)
-+        return retVal;
-+
-+    for(i = 0; i < RTL8367C_ACLRULEFIELDNO; i++)
-+    {
-+        pFilter_cfg->fieldRawType[i] = type.field[i];
-+    }/* end of for(i...) */
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_unmatchAction_set
-+ * Description:
-+ *      Set action to packets when no ACL configuration match
-+ * Input:
-+ *      port    - Port id.
-+ *      action  - Action.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port id.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This function sets action of packets when no ACL configruation matches.
-+ */
-+rtk_api_ret_t rtk_filter_igrAcl_unmatchAction_set(rtk_port_t port, rtk_filter_unmatch_action_t action)
-+{
-+    rtk_api_ret_t ret;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(action >= FILTER_UNMATCH_END)
-+        return RT_ERR_INPUT;
-+
-+    if((ret = rtl8367c_setAsicAclUnmatchedPermit(rtk_switch_port_L2P_get(port), action)) != RT_ERR_OK)
-+       return ret;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_unmatchAction_get
-+ * Description:
-+ *      Get action to packets when no ACL configuration match
-+ * Input:
-+ *      port    - Port id.
-+ * Output:
-+ *      pAction - Action.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port id.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This function gets action of packets when no ACL configruation matches.
-+ */
-+rtk_api_ret_t rtk_filter_igrAcl_unmatchAction_get(rtk_port_t port, rtk_filter_unmatch_action_t* pAction)
-+{
-+    rtk_api_ret_t ret;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pAction)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* Check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if((ret = rtl8367c_getAsicAclUnmatchedPermit(rtk_switch_port_L2P_get(port), pAction)) != RT_ERR_OK)
-+       return ret;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_state_set
-+ * Description:
-+ *      Set state of ingress ACL.
-+ * Input:
-+ *      port    - Port id.
-+ *      state   - Ingress ACL state.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port id.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This function gets action of packets when no ACL configruation matches.
-+ */
-+rtk_api_ret_t rtk_filter_igrAcl_state_set(rtk_port_t port, rtk_filter_state_t state)
-+{
-+    rtk_api_ret_t ret;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(state >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if((ret = rtl8367c_setAsicAcl(rtk_switch_port_L2P_get(port), state)) != RT_ERR_OK)
-+       return ret;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_state_get
-+ * Description:
-+ *      Get state of ingress ACL.
-+ * Input:
-+ *      port    - Port id.
-+ * Output:
-+ *      pState  - Ingress ACL state.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port id.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This function gets action of packets when no ACL configruation matches.
-+ */
-+rtk_api_ret_t rtk_filter_igrAcl_state_get(rtk_port_t port, rtk_filter_state_t* pState)
-+{
-+    rtk_api_ret_t ret;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pState)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* Check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if((ret = rtl8367c_getAsicAcl(rtk_switch_port_L2P_get(port), pState)) != RT_ERR_OK)
-+       return ret;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtk_filter_igrAcl_template_set
-+ * Description:
-+ *      Set template of ingress ACL.
-+ * Input:
-+ *      template - Ingress ACL template
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Invalid input parameters.
-+ * Note:
-+ *      This function set ACL template.
-+ */
-+rtk_api_ret_t rtk_filter_igrAcl_template_set(rtk_filter_template_t *aclTemplate)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 idxField;
-+    rtl8367c_acltemplate_t aclType;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(aclTemplate->index >= RTK_MAX_NUM_OF_FILTER_TYPE)
-+        return RT_ERR_INPUT;
-+
-+    for(idxField = 0; idxField < RTK_MAX_NUM_OF_FILTER_FIELD; idxField++)
-+    {
-+        if(aclTemplate->fieldType[idxField] < FILTER_FIELD_RAW_DMAC_15_0 ||
-+            (aclTemplate->fieldType[idxField] > FILTER_FIELD_RAW_CTAG && aclTemplate->fieldType[idxField] < FILTER_FIELD_RAW_IPV4_SIP_15_0 ) ||
-+            (aclTemplate->fieldType[idxField] > FILTER_FIELD_RAW_IPV4_DIP_31_16 && aclTemplate->fieldType[idxField] < FILTER_FIELD_RAW_IPV6_SIP_15_0 ) ||
-+            (aclTemplate->fieldType[idxField] > FILTER_FIELD_RAW_IPV6_DIP_31_16 && aclTemplate->fieldType[idxField] < FILTER_FIELD_RAW_VIDRANGE ) ||
-+            (aclTemplate->fieldType[idxField] > FILTER_FIELD_RAW_FIELD_VALID && aclTemplate->fieldType[idxField] < FILTER_FIELD_RAW_FIELD_SELECT00 ) ||
-+            aclTemplate->fieldType[idxField] >= FILTER_FIELD_RAW_END)
-+        {
-+            return RT_ERR_INPUT;
-+        }
-+    }
-+
-+    for(idxField = 0; idxField < RTK_MAX_NUM_OF_FILTER_FIELD; idxField++)
-+    {
-+        aclType.field[idxField] = aclTemplate->fieldType[idxField];
-+    }
-+
-+    if((retVal = rtl8367c_setAsicAclTemplate(aclTemplate->index, &aclType)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_template_get
-+ * Description:
-+ *      Get template of ingress ACL.
-+ * Input:
-+ *      template - Ingress ACL template
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This function gets template of ACL.
-+ */
-+rtk_api_ret_t rtk_filter_igrAcl_template_get(rtk_filter_template_t *aclTemplate)
-+{
-+    rtk_api_ret_t ret;
-+    rtk_uint32 idxField;
-+    rtl8367c_acltemplate_t aclType;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == aclTemplate)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(aclTemplate->index >= RTK_MAX_NUM_OF_FILTER_TYPE)
-+        return RT_ERR_INPUT;
-+
-+   if((ret = rtl8367c_getAsicAclTemplate(aclTemplate->index, &aclType)) != RT_ERR_OK)
-+       return ret;
-+
-+    for(idxField = 0; idxField < RTK_MAX_NUM_OF_FILTER_FIELD; idxField ++)
-+    {
-+        aclTemplate->fieldType[idxField] = aclType.field[idxField];
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_field_sel_set
-+ * Description:
-+ *      Set user defined field selectors in HSB
-+ * Input:
-+ *      index       - index of field selector 0-15
-+ *      format      - Format of field selector
-+ *      offset      - Retrieving data offset
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      System support 16 user defined field selctors.
-+ *      Each selector can be enabled or disable.
-+ *      User can defined retrieving 16-bits in many predefiend
-+ *      standard l2/l3/l4 payload.
-+ */
-+rtk_api_ret_t rtk_filter_igrAcl_field_sel_set(rtk_uint32 index, rtk_field_sel_t format, rtk_uint32 offset)
-+{
-+    rtk_api_ret_t ret;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(index >= RTL8367C_FIELDSEL_FORMAT_NUMBER)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(format >= FORMAT_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(offset > RTL8367C_FIELDSEL_MAX_OFFSET)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if((ret = rtl8367c_setAsicFieldSelector(index, (rtk_uint32)format, offset)) != RT_ERR_OK)
-+       return ret;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_field_sel_get
-+ * Description:
-+ *      Get user defined field selectors in HSB
-+ * Input:
-+ *      index       - index of field selector 0-15
-+ * Output:
-+ *      pFormat     - Format of field selector
-+ *      pOffset     - Retrieving data offset
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      None.
-+ */
-+rtk_api_ret_t rtk_filter_igrAcl_field_sel_get(rtk_uint32 index, rtk_field_sel_t *pFormat, rtk_uint32 *pOffset)
-+{
-+    rtk_api_ret_t ret;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pFormat || NULL == pOffset)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(index >= RTL8367C_FIELDSEL_FORMAT_NUMBER)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if((ret = rtl8367c_getAsicFieldSelector(index, pFormat, pOffset)) != RT_ERR_OK)
-+       return ret;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_iprange_set
-+ * Description:
-+ *      Set IP Range check
-+ * Input:
-+ *      index       - index of IP Range 0-15
-+ *      type        - IP Range check type, 0:Delete a entry, 1: IPv4_SIP, 2: IPv4_DIP, 3:IPv6_SIP, 4:IPv6_DIP
-+ *      upperIp     - The upper bound of IP range
-+ *      lowerIp     - The lower Bound of IP range
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE    - The parameter is out of range
-+ *      RT_ERR_INPUT           - Input error
-+ * Note:
-+ *      upperIp must be larger or equal than lowerIp.
-+ */
-+rtk_api_ret_t rtk_filter_iprange_set(rtk_uint32 index, rtk_filter_iprange_t type, ipaddr_t upperIp, ipaddr_t lowerIp)
-+{
-+    rtk_api_ret_t ret;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(index > RTL8367C_ACLRANGEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(type >= IPRANGE_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(lowerIp > upperIp)
-+        return RT_ERR_INPUT;
-+
-+    if((ret = rtl8367c_setAsicAclIpRange(index, type, upperIp, lowerIp)) != RT_ERR_OK)
-+       return ret;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_iprange_get
-+ * Description:
-+ *      Set IP Range check
-+ * Input:
-+ *      index       - index of IP Range 0-15
-+ * Output:
-+ *      pType        - IP Range check type, 0:Delete a entry, 1: IPv4_SIP, 2: IPv4_DIP, 3:IPv6_SIP, 4:IPv6_DIP
-+ *      pUpperIp     - The upper bound of IP range
-+ *      pLowerIp     - The lower Bound of IP range
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE    - The parameter is out of range
-+ * Note:
-+ *      None.
-+ */
-+rtk_api_ret_t rtk_filter_iprange_get(rtk_uint32 index, rtk_filter_iprange_t *pType, ipaddr_t *pUpperIp, ipaddr_t *pLowerIp)
-+{
-+    rtk_api_ret_t ret;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if((NULL == pType) || (NULL == pUpperIp) || (NULL == pLowerIp))
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(index > RTL8367C_ACLRANGEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if((ret = rtl8367c_getAsicAclIpRange(index, pType, pUpperIp, pLowerIp)) != RT_ERR_OK)
-+       return ret;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_vidrange_set
-+ * Description:
-+ *      Set VID Range check
-+ * Input:
-+ *      index       - index of VID Range 0-15
-+ *      type        - IP Range check type, 0:Delete a entry, 1: CVID, 2: SVID
-+ *      upperVid    - The upper bound of VID range
-+ *      lowerVid    - The lower Bound of VID range
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE    - The parameter is out of range
-+ *      RT_ERR_INPUT           - Input error
-+ * Note:
-+ *      upperVid must be larger or equal than lowerVid.
-+ */
-+rtk_api_ret_t rtk_filter_vidrange_set(rtk_uint32 index, rtk_filter_vidrange_t type, rtk_uint32 upperVid, rtk_uint32 lowerVid)
-+{
-+    rtk_api_ret_t ret;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(index > RTL8367C_ACLRANGEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(type >= VIDRANGE_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(lowerVid > upperVid)
-+        return RT_ERR_INPUT;
-+
-+    if( (upperVid > RTL8367C_VIDMAX) || (lowerVid > RTL8367C_VIDMAX))
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if((ret = rtl8367c_setAsicAclVidRange(index, type, upperVid, lowerVid)) != RT_ERR_OK)
-+       return ret;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_vidrange_get
-+ * Description:
-+ *      Get VID Range check
-+ * Input:
-+ *      index       - index of VID Range 0-15
-+ * Output:
-+ *      pType        - IP Range check type, 0:Unused, 1: CVID, 2: SVID
-+ *      pUpperVid    - The upper bound of VID range
-+ *      pLowerVid    - The lower Bound of VID range
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE    - The parameter is out of range
-+ * Note:
-+ *      None.
-+ */
-+rtk_api_ret_t rtk_filter_vidrange_get(rtk_uint32 index, rtk_filter_vidrange_t *pType, rtk_uint32 *pUpperVid, rtk_uint32 *pLowerVid)
-+{
-+    rtk_api_ret_t ret;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if((NULL == pType) || (NULL == pUpperVid) || (NULL == pLowerVid))
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(index > RTL8367C_ACLRANGEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if((ret = rtl8367c_getAsicAclVidRange(index, pType, pUpperVid, pLowerVid)) != RT_ERR_OK)
-+       return ret;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_portrange_set
-+ * Description:
-+ *      Set Port Range check
-+ * Input:
-+ *      index       - index of Port Range 0-15
-+ *      type        - IP Range check type, 0:Delete a entry, 1: Source Port, 2: Destnation Port
-+ *      upperPort   - The upper bound of Port range
-+ *      lowerPort   - The lower Bound of Port range
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE    - The parameter is out of range
-+ *      RT_ERR_INPUT           - Input error
-+ * Note:
-+ *      upperPort must be larger or equal than lowerPort.
-+ */
-+rtk_api_ret_t rtk_filter_portrange_set(rtk_uint32 index, rtk_filter_portrange_t type, rtk_uint32 upperPort, rtk_uint32 lowerPort)
-+{
-+    rtk_api_ret_t ret;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(index > RTL8367C_ACLRANGEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(type >= PORTRANGE_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(lowerPort > upperPort)
-+        return RT_ERR_INPUT;
-+
-+    if(upperPort > RTL8367C_ACL_PORTRANGEMAX)
-+        return RT_ERR_INPUT;
-+
-+    if(lowerPort > RTL8367C_ACL_PORTRANGEMAX)
-+        return RT_ERR_INPUT;
-+
-+    if((ret = rtl8367c_setAsicAclPortRange(index, type, upperPort, lowerPort)) != RT_ERR_OK)
-+       return ret;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_portrange_get
-+ * Description:
-+ *      Set Port Range check
-+ * Input:
-+ *      index       - index of Port Range 0-15
-+ * Output:
-+ *      pType       - IP Range check type, 0:Delete a entry, 1: Source Port, 2: Destnation Port
-+ *      pUpperPort  - The upper bound of Port range
-+ *      pLowerPort  - The lower Bound of Port range
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE    - The parameter is out of range
-+ *      RT_ERR_INPUT           - Input error
-+ * Note:
-+ *      None.
-+ */
-+rtk_api_ret_t rtk_filter_portrange_get(rtk_uint32 index, rtk_filter_portrange_t *pType, rtk_uint32 *pUpperPort, rtk_uint32 *pLowerPort)
-+{
-+    rtk_api_ret_t ret;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if((NULL == pType) || (NULL == pUpperPort) || (NULL == pLowerPort))
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(index > RTL8367C_ACLRANGEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if((ret = rtl8367c_getAsicAclPortRange(index, pType, pUpperPort, pLowerPort)) != RT_ERR_OK)
-+       return ret;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_filter_igrAclPolarity_set
-+ * Description:
-+ *      Set ACL Goip control palarity
-+ * Input:
-+ *      polarity - 1: High, 0: Low
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      none
-+ */
-+rtk_api_ret_t rtk_filter_igrAclPolarity_set(rtk_uint32 polarity)
-+{
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(polarity > 1)
-+        return RT_ERR_OUT_OF_RANGE;
-+    return rtl8367c_setAsicAclGpioPolarity(polarity);
-+}
-+/* Function Name:
-+ *      rtk_filter_igrAclPolarity_get
-+ * Description:
-+ *      Get ACL Goip control palarity
-+ * Input:
-+ *      pPolarity - 1: High, 0: Low
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      none
-+ */
-+rtk_api_ret_t rtk_filter_igrAclPolarity_get(rtk_uint32* pPolarity)
-+{
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pPolarity)
-+        return RT_ERR_NULL_POINTER;
-+
-+    return rtl8367c_getAsicAclGpioPolarity(pPolarity);
-+}
-+
-+
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/cpu.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/cpu.c
-new file mode 100644
-index 0000000000..d1cd95b37a
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/cpu.c
-@@ -0,0 +1,537 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in CPU module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <cpu.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_cputag.h>
-+
-+/* Function Name:
-+ *      rtk_cpu_enable_set
-+ * Description:
-+ *      Set CPU port function enable/disable.
-+ * Input:
-+ *      enable - CPU port function enable
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can set CPU port function enable/disable.
-+ */
-+rtk_api_ret_t rtk_cpu_enable_set(rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_setAsicCputagEnable(enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (DISABLED == enable)
-+    {
-+        if ((retVal = rtl8367c_setAsicCputagPortmask(0)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_cpu_enable_get
-+ * Description:
-+ *      Get CPU port and its setting.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnable - CPU port function enable
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_L2_NO_CPU_PORT   - CPU port is not exist
-+ * Note:
-+ *      The API can get CPU port function enable/disable.
-+ */
-+rtk_api_ret_t rtk_cpu_enable_get(rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicCputagEnable(pEnable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_cpu_tagPort_set
-+ * Description:
-+ *      Set CPU port and CPU tag insert mode.
-+ * Input:
-+ *      port - Port id.
-+ *      mode - CPU tag insert for packets egress from CPU port.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can set CPU port and inserting proprietary CPU tag mode (Length/Type 0x8899)
-+ *      to the frame that transmitting to CPU port.
-+ *      The inset cpu tag mode is as following:
-+ *      - CPU_INSERT_TO_ALL
-+ *      - CPU_INSERT_TO_TRAPPING
-+ *      - CPU_INSERT_TO_NONE
-+ */
-+rtk_api_ret_t rtk_cpu_tagPort_set(rtk_port_t port, rtk_cpu_insert_t mode)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (mode >= CPU_INSERT_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicCputagPortmask(1<<rtk_switch_port_L2P_get(port))) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicCputagTrapPort(rtk_switch_port_L2P_get(port))) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicCputagInsertMode(mode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_cpu_tagPort_get
-+ * Description:
-+ *      Get CPU port and CPU tag insert mode.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pPort - Port id.
-+ *      pMode - CPU tag insert for packets egress from CPU port, 0:all insert 1:Only for trapped packets 2:no insert.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_L2_NO_CPU_PORT   - CPU port is not exist
-+ * Note:
-+ *      The API can get configured CPU port and its setting.
-+ *      The inset cpu tag mode is as following:
-+ *      - CPU_INSERT_TO_ALL
-+ *      - CPU_INSERT_TO_TRAPPING
-+ *      - CPU_INSERT_TO_NONE
-+ */
-+rtk_api_ret_t rtk_cpu_tagPort_get(rtk_port_t *pPort, rtk_cpu_insert_t *pMode)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmsk, port;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pPort)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(NULL == pMode)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicCputagPortmask(&pmsk)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicCputagTrapPort(&port)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pPort = rtk_switch_port_P2L_get(port);
-+
-+    if ((retVal = rtl8367c_getAsicCputagInsertMode(pMode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_cpu_awarePort_set
-+ * Description:
-+ *      Set CPU aware port mask.
-+ * Input:
-+ *      portmask - Port mask.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK      - Invalid port mask.
-+ * Note:
-+ *      The API can set configured CPU aware port mask.
-+ */
-+rtk_api_ret_t rtk_cpu_awarePort_set(rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 phyMbrPmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Valid port mask */
-+    if(NULL == pPortmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* Check port mask valid */
-+    RTK_CHK_PORTMASK_VALID(pPortmask);
-+
-+    if(rtk_switch_portmask_L2P_get(pPortmask, &phyMbrPmask) != RT_ERR_OK)
-+        return RT_ERR_FAILED;
-+
-+    if ((retVal = rtl8367c_setAsicCputagPortmask(phyMbrPmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_cpu_awarePort_get
-+ * Description:
-+ *      Get CPU aware port mask.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pPortmask - Port mask.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ * Note:
-+ *      The API can get configured CPU aware port mask.
-+ */
-+rtk_api_ret_t rtk_cpu_awarePort_get(rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmsk;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pPortmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicCputagPortmask(&pmsk)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(rtk_switch_portmask_P2L_get(pmsk, pPortmask) != RT_ERR_OK)
-+        return RT_ERR_FAILED;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_cpu_tagPosition_set
-+ * Description:
-+ *      Set CPU tag position.
-+ * Input:
-+ *      position - CPU tag position.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT      - Invalid input.
-+ * Note:
-+ *      The API can set CPU tag position.
-+ */
-+rtk_api_ret_t rtk_cpu_tagPosition_set(rtk_cpu_position_t position)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (position >= CPU_POS_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicCputagPosition(position)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_cpu_tagPosition_get
-+ * Description:
-+ *      Get CPU tag position.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pPosition - CPU tag position.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT      - Invalid input.
-+ * Note:
-+ *      The API can get CPU tag position.
-+ */
-+rtk_api_ret_t rtk_cpu_tagPosition_get(rtk_cpu_position_t *pPosition)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pPosition)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicCputagPosition(pPosition)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_cpu_tagLength_set
-+ * Description:
-+ *      Set CPU tag length.
-+ * Input:
-+ *      length - CPU tag length.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT      - Invalid input.
-+ * Note:
-+ *      The API can set CPU tag length.
-+ */
-+rtk_api_ret_t rtk_cpu_tagLength_set(rtk_cpu_tag_length_t length)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (length >= CPU_LEN_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicCputagMode(length)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_cpu_tagLength_get
-+ * Description:
-+ *      Get CPU tag length.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pLength - CPU tag length.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT      - Invalid input.
-+ * Note:
-+ *      The API can get CPU tag length.
-+ */
-+rtk_api_ret_t rtk_cpu_tagLength_get(rtk_cpu_tag_length_t *pLength)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pLength)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicCputagMode(pLength)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_cpu_priRemap_set
-+ * Description:
-+ *      Configure CPU priorities mapping to internal absolute priority.
-+ * Input:
-+ *      int_pri     - internal priority value.
-+ *      new_pri    - new internal priority value.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_VLAN_PRIORITY    - Invalid 1p priority.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      Priority of CPU tag assignment for internal asic priority, and it is used for queue usage and packet scheduling.
-+ */
-+rtk_api_ret_t rtk_cpu_priRemap_set(rtk_pri_t int_pri, rtk_pri_t new_pri)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (new_pri > RTL8367C_PRIMAX || int_pri > RTL8367C_PRIMAX)
-+        return  RT_ERR_VLAN_PRIORITY;
-+
-+    if ((retVal = rtl8367c_setAsicCputagPriorityRemapping(int_pri, new_pri)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_cpu_priRemap_get
-+ * Description:
-+ *      Configure CPU priorities mapping to internal absolute priority.
-+ * Input:
-+ *      int_pri     - internal priority value.
-+ * Output:
-+ *      pNew_pri    - new internal priority value.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_VLAN_PRIORITY    - Invalid 1p priority.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      Priority of CPU tag assignment for internal asic priority, and it is used for queue usage and packet scheduling.
-+ */
-+rtk_api_ret_t rtk_cpu_priRemap_get(rtk_pri_t int_pri, rtk_pri_t *pNew_pri)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pNew_pri)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (int_pri > RTL8367C_PRIMAX)
-+        return  RT_ERR_QOS_INT_PRIORITY;
-+
-+    if ((retVal = rtl8367c_getAsicCputagPriorityRemapping(int_pri, pNew_pri)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_cpu_acceptLength_set
-+ * Description:
-+ *      Set CPU accept  length.
-+ * Input:
-+ *      length - CPU tag length.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT      - Invalid input.
-+ * Note:
-+ *      The API can set CPU accept length.
-+ */
-+rtk_api_ret_t rtk_cpu_acceptLength_set(rtk_cpu_rx_length_t length)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (length >= CPU_RX_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicCputagRxMinLength(length)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_cpu_acceptLength_get
-+ * Description:
-+ *      Get CPU accept length.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pLength - CPU tag length.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT      - Invalid input.
-+ * Note:
-+ *      The API can get CPU accept length.
-+ */
-+rtk_api_ret_t rtk_cpu_acceptLength_get(rtk_cpu_rx_length_t *pLength)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pLength)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicCputagRxMinLength(pLength)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/dot1x.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/dot1x.c
-new file mode 100644
-index 0000000000..c9b146a6d8
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/dot1x.c
-@@ -0,0 +1,843 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 75783 $
-+ * $Date: 2017-02-13 14:54:53 +0800 (週一, 13 二月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in 1X module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <dot1x.h>
-+#include <string.h>
-+#include <vlan.h>
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_dot1x.h>
-+#include <rtl8367c_asicdrv_rma.h>
-+#include <rtl8367c_asicdrv_lut.h>
-+#include <rtl8367c_asicdrv_vlan.h>
-+
-+/* Function Name:
-+ *      rtk_dot1x_unauthPacketOper_set
-+ * Description:
-+ *      Set 802.1x unauth action configuration.
-+ * Input:
-+ *      port            - Port id.
-+ *      unauth_action   - 802.1X unauth action.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      This API can set 802.1x unauth action configuration.
-+ *      The unauth action is as following:
-+ *      - DOT1X_ACTION_DROP
-+ *      - DOT1X_ACTION_TRAP2CPU
-+ *      - DOT1X_ACTION_GUESTVLAN
-+ */
-+rtk_api_ret_t rtk_dot1x_unauthPacketOper_set(rtk_port_t port, rtk_dot1x_unauth_action_t unauth_action)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (unauth_action >= DOT1X_ACTION_END)
-+        return RT_ERR_DOT1X_PROC;
-+
-+    if ((retVal = rtl8367c_setAsic1xProcConfig(rtk_switch_port_L2P_get(port), unauth_action)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_unauthPacketOper_get
-+ * Description:
-+ *      Get 802.1x unauth action configuration.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pUnauth_action - 802.1X unauth action.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API can get 802.1x unauth action configuration.
-+ *      The unauth action is as following:
-+ *      - DOT1X_ACTION_DROP
-+ *      - DOT1X_ACTION_TRAP2CPU
-+ *      - DOT1X_ACTION_GUESTVLAN
-+ */
-+rtk_api_ret_t rtk_dot1x_unauthPacketOper_get(rtk_port_t port, rtk_dot1x_unauth_action_t *pUnauth_action)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pUnauth_action)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsic1xProcConfig(rtk_switch_port_L2P_get(port), pUnauth_action)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_eapolFrame2CpuEnable_set
-+ * Description:
-+ *      Set 802.1x EAPOL packet trap to CPU configuration
-+ * Input:
-+ *      enable - The status of 802.1x EAPOL packet.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      To support 802.1x authentication functionality, EAPOL frame (ether type = 0x888E) has to
-+ *      be trapped to CPU.
-+ *      The status of EAPOL frame trap to CPU is as following:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+rtk_api_ret_t rtk_dot1x_eapolFrame2CpuEnable_set(rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_rma_t rmacfg;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_getAsicRma(3, &rmacfg)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (ENABLED == enable)
-+        rmacfg.operation = RMAOP_TRAP_TO_CPU;
-+    else if (DISABLED == enable)
-+        rmacfg.operation = RMAOP_FORWARD;
-+
-+    if ((retVal = rtl8367c_setAsicRma(3, &rmacfg)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_eapolFrame2CpuEnable_get
-+ * Description:
-+ *      Get 802.1x EAPOL packet trap to CPU configuration
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnable - The status of 802.1x EAPOL packet.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      To support 802.1x authentication functionality, EAPOL frame (ether type = 0x888E) has to
-+ *      be trapped to CPU.
-+ *      The status of EAPOL frame trap to CPU is as following:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+rtk_api_ret_t rtk_dot1x_eapolFrame2CpuEnable_get(rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_rma_t rmacfg;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicRma(3, &rmacfg)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (RMAOP_TRAP_TO_CPU == rmacfg.operation)
-+        *pEnable = ENABLED;
-+    else
-+        *pEnable = DISABLED;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_portBasedEnable_set
-+ * Description:
-+ *      Set 802.1x port-based enable configuration
-+ * Input:
-+ *      port - Port id.
-+ *      enable - The status of 802.1x port.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_ENABLE               - Invalid enable input.
-+ *      RT_ERR_DOT1X_PORTBASEDPNEN  - 802.1X port-based enable error
-+ * Note:
-+ *      The API can update the port-based port enable register content. If a port is 802.1x
-+ *      port based network access control "enabled", it should be authenticated so packets
-+ *      from that port won't be dropped or trapped to CPU.
-+ *      The status of 802.1x port-based network access control is as following:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+rtk_api_ret_t rtk_dot1x_portBasedEnable_set(rtk_port_t port, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_setAsic1xPBEnConfig(rtk_switch_port_L2P_get(port),enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_portBasedEnable_get
-+ * Description:
-+ *      Get 802.1x port-based enable configuration
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - The status of 802.1x port.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get the 802.1x port-based port status.
-+ */
-+rtk_api_ret_t rtk_dot1x_portBasedEnable_get(rtk_port_t port, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsic1xPBEnConfig(rtk_switch_port_L2P_get(port), pEnable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_portBasedAuthStatus_set
-+ * Description:
-+ *      Set 802.1x port-based auth. port configuration
-+ * Input:
-+ *      port - Port id.
-+ *      port_auth - The status of 802.1x port.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *     RT_ERR_DOT1X_PORTBASEDAUTH   - 802.1X port-based auth error
-+ * Note:
-+ *      The authenticated status of 802.1x port-based network access control is as following:
-+ *      - UNAUTH
-+ *      - AUTH
-+ */
-+rtk_api_ret_t rtk_dot1x_portBasedAuthStatus_set(rtk_port_t port, rtk_dot1x_auth_status_t port_auth)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+     if (port_auth >= AUTH_STATUS_END)
-+        return RT_ERR_DOT1X_PORTBASEDAUTH;
-+
-+    if ((retVal = rtl8367c_setAsic1xPBAuthConfig(rtk_switch_port_L2P_get(port), port_auth)) != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_portBasedAuthStatus_get
-+ * Description:
-+ *      Get 802.1x port-based auth. port configuration
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pPort_auth - The status of 802.1x port.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get 802.1x port-based port auth.information.
-+ */
-+rtk_api_ret_t rtk_dot1x_portBasedAuthStatus_get(rtk_port_t port, rtk_dot1x_auth_status_t *pPort_auth)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pPort_auth)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_getAsic1xPBAuthConfig(rtk_switch_port_L2P_get(port), pPort_auth)) != RT_ERR_OK)
-+        return retVal;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_portBasedDirection_set
-+ * Description:
-+ *      Set 802.1x port-based operational direction configuration
-+ * Input:
-+ *      port            - Port id.
-+ *      port_direction  - Operation direction
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_DOT1X_PORTBASEDOPDIR - 802.1X port-based operation direction error
-+ * Note:
-+ *      The operate controlled direction of 802.1x port-based network access control is as following:
-+ *      - BOTH
-+ *      - IN
-+ */
-+rtk_api_ret_t rtk_dot1x_portBasedDirection_set(rtk_port_t port, rtk_dot1x_direction_t port_direction)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (port_direction >= DIRECTION_END)
-+        return RT_ERR_DOT1X_PORTBASEDOPDIR;
-+
-+    if ((retVal = rtl8367c_setAsic1xPBOpdirConfig(rtk_switch_port_L2P_get(port), port_direction)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_portBasedDirection_get
-+ * Description:
-+ *      Get 802.1X port-based operational direction configuration
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pPort_direction - Operation direction
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get 802.1x port-based operational direction information.
-+ */
-+rtk_api_ret_t rtk_dot1x_portBasedDirection_get(rtk_port_t port, rtk_dot1x_direction_t *pPort_direction)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pPort_direction)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_getAsic1xPBOpdirConfig(rtk_switch_port_L2P_get(port), pPort_direction)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_macBasedEnable_set
-+ * Description:
-+ *      Set 802.1x mac-based port enable configuration
-+ * Input:
-+ *      port - Port id.
-+ *      enable - The status of 802.1x port.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_ENABLE               - Invalid enable input.
-+ *      RT_ERR_DOT1X_MACBASEDPNEN   - 802.1X mac-based enable error
-+ * Note:
-+ *      If a port is 802.1x MAC based network access control "enabled", the incoming packets should
-+ *       be authenticated so packets from that port won't be dropped or trapped to CPU.
-+ *      The status of 802.1x MAC-based network access control is as following:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+rtk_api_ret_t rtk_dot1x_macBasedEnable_set(rtk_port_t port, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_setAsic1xMBEnConfig(rtk_switch_port_L2P_get(port),enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_macBasedEnable_get
-+ * Description:
-+ *      Get 802.1x mac-based port enable configuration
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - The status of 802.1x port.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      If a port is 802.1x MAC based network access control "enabled", the incoming packets should
-+ *      be authenticated so packets from that port wont be dropped or trapped to CPU.
-+ *      The status of 802.1x MAC-based network access control is as following:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+rtk_api_ret_t rtk_dot1x_macBasedEnable_get(rtk_port_t port, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_getAsic1xMBEnConfig(rtk_switch_port_L2P_get(port), pEnable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_macBasedAuthMac_add
-+ * Description:
-+ *      Add an authenticated MAC to ASIC
-+ * Input:
-+ *      port        - Port id.
-+ *      pAuth_mac   - The authenticated MAC.
-+ *      fid         - filtering database.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_ENABLE               - Invalid enable input.
-+ *      RT_ERR_DOT1X_MACBASEDPNEN   - 802.1X mac-based enable error
-+ * Note:
-+ *      The API can add a 802.1x authenticated MAC address to port. If the MAC does not exist in LUT,
-+ *      user can't add this MAC to auth status.
-+ */
-+rtk_api_ret_t rtk_dot1x_macBasedAuthMac_add(rtk_port_t port, rtk_mac_t *pAuth_mac, rtk_fid_t fid)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 method;
-+    rtl8367c_luttb l2Table;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* must be unicast address */
-+    if ((pAuth_mac == NULL) || (pAuth_mac->octet[0] & 0x1))
-+        return RT_ERR_MAC;
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (fid > RTL8367C_FIDMAX)
-+        return RT_ERR_L2_FID;
-+
-+    memset(&l2Table, 0, sizeof(rtl8367c_luttb));
-+
-+    /* fill key (MAC,FID) to get L2 entry */
-+    memcpy(l2Table.mac.octet, pAuth_mac->octet, ETHER_ADDR_LEN);
-+    l2Table.fid = fid;
-+    method = LUTREADMETHOD_MAC;
-+    retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table);
-+    if ( RT_ERR_OK == retVal)
-+    {
-+        if (l2Table.spa != rtk_switch_port_L2P_get(port))
-+            return RT_ERR_DOT1X_MAC_PORT_MISMATCH;
-+
-+        memcpy(l2Table.mac.octet, pAuth_mac->octet, ETHER_ADDR_LEN);
-+        l2Table.fid = fid;
-+        l2Table.efid = 0;
-+        l2Table.auth = 1;
-+        retVal = rtl8367c_setAsicL2LookupTb(&l2Table);
-+        return retVal;
-+    }
-+    else
-+        return retVal;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_macBasedAuthMac_del
-+ * Description:
-+ *      Delete an authenticated MAC to ASIC
-+ * Input:
-+ *      port - Port id.
-+ *      pAuth_mac - The authenticated MAC.
-+ *      fid - filtering database.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_MAC          - Invalid MAC address.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can delete a 802.1x authenticated MAC address to port. It only change the auth status of
-+ *      the MAC and won't delete it from LUT.
-+ */
-+rtk_api_ret_t rtk_dot1x_macBasedAuthMac_del(rtk_port_t port, rtk_mac_t *pAuth_mac, rtk_fid_t fid)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 method;
-+    rtl8367c_luttb l2Table;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* must be unicast address */
-+    if ((pAuth_mac == NULL) || (pAuth_mac->octet[0] & 0x1))
-+        return RT_ERR_MAC;
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (fid > RTL8367C_FIDMAX)
-+        return RT_ERR_L2_FID;
-+
-+    memset(&l2Table, 0, sizeof(rtl8367c_luttb));
-+
-+    /* fill key (MAC,FID) to get L2 entry */
-+    memcpy(l2Table.mac.octet, pAuth_mac->octet, ETHER_ADDR_LEN);
-+    l2Table.fid = fid;
-+    method = LUTREADMETHOD_MAC;
-+    retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table);
-+    if (RT_ERR_OK == retVal)
-+    {
-+        if (l2Table.spa != rtk_switch_port_L2P_get(port))
-+            return RT_ERR_DOT1X_MAC_PORT_MISMATCH;
-+
-+        memcpy(l2Table.mac.octet, pAuth_mac->octet, ETHER_ADDR_LEN);
-+        l2Table.fid = fid;
-+        l2Table.auth = 0;
-+        retVal = rtl8367c_setAsicL2LookupTb(&l2Table);
-+        return retVal;
-+    }
-+    else
-+        return retVal;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_macBasedDirection_set
-+ * Description:
-+ *      Set 802.1x mac-based operational direction configuration
-+ * Input:
-+ *      mac_direction - Operation direction
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_INPUT                - Invalid input parameter.
-+ *      RT_ERR_DOT1X_MACBASEDOPDIR  - 802.1X mac-based operation direction error
-+ * Note:
-+ *      The operate controlled direction of 802.1x mac-based network access control is as following:
-+ *      - BOTH
-+ *      - IN
-+ */
-+rtk_api_ret_t rtk_dot1x_macBasedDirection_set(rtk_dot1x_direction_t mac_direction)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (mac_direction >= DIRECTION_END)
-+        return RT_ERR_DOT1X_MACBASEDOPDIR;
-+
-+    if ((retVal = rtl8367c_setAsic1xMBOpdirConfig(mac_direction)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_macBasedDirection_get
-+ * Description:
-+ *      Get 802.1x mac-based operational direction configuration
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pMac_direction - Operation direction
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get 802.1x mac-based operational direction information.
-+ */
-+rtk_api_ret_t rtk_dot1x_macBasedDirection_get(rtk_dot1x_direction_t *pMac_direction)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pMac_direction)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsic1xMBOpdirConfig(pMac_direction)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      Set 802.1x guest VLAN configuration
-+ * Description:
-+ *      Set 802.1x mac-based operational direction configuration
-+ * Input:
-+ *      vid - 802.1x guest VLAN ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      The operate controlled 802.1x guest VLAN
-+ */
-+rtk_api_ret_t rtk_dot1x_guestVlan_set(rtk_vlan_t vid)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 index;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* vid must be 0~4095 */
-+    if (vid > RTL8367C_VIDMAX)
-+        return RT_ERR_VLAN_VID;
-+
-+    if((retVal = rtk_vlan_checkAndCreateMbr(vid, &index)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsic1xGuestVidx(index)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_guestVlan_get
-+ * Description:
-+ *      Get 802.1x guest VLAN configuration
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pVid - 802.1x guest VLAN ID
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get 802.1x guest VLAN information.
-+ */
-+rtk_api_ret_t rtk_dot1x_guestVlan_get(rtk_vlan_t *pVid)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 gvidx;
-+    rtl8367c_vlanconfiguser vlanMC;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pVid)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsic1xGuestVidx(&gvidx)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicVlanMemberConfig(gvidx, &vlanMC)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pVid = vlanMC.evid;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_guestVlan2Auth_set
-+ * Description:
-+ *      Set 802.1x guest VLAN to auth host configuration
-+ * Input:
-+ *      enable - The status of guest VLAN to auth host.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      The operational direction of 802.1x guest VLAN to auth host control is as following:
-+ *      - ENABLED
-+ *      - DISABLED
-+ */
-+rtk_api_ret_t rtk_dot1x_guestVlan2Auth_set(rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_setAsic1xGVOpdir(enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_dot1x_guestVlan2Auth_get
-+ * Description:
-+ *      Get 802.1x guest VLAN to auth host configuration
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnable - The status of guest VLAN to auth host.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get 802.1x guest VLAN to auth host information.
-+ */
-+rtk_api_ret_t rtk_dot1x_guestVlan2Auth_get(rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsic1xGVOpdir(pEnable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/eee.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/eee.c
-new file mode 100644
-index 0000000000..cd14c2ce13
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/eee.c
-@@ -0,0 +1,162 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 48156 $
-+ * $Date: 2014-05-29 16:39:06 +0800 (週四, 29 五月 2014) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in EEE module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <eee.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_eee.h>
-+#include <rtl8367c_asicdrv_phy.h>
-+
-+/* Function Name:
-+ *      rtk_eee_init
-+ * Description:
-+ *      EEE function initialization.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API is used to initialize EEE status.
-+ */
-+rtk_api_ret_t rtk_eee_init(void)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if((retVal = rtl8367c_setAsicRegBit(0x0018, 10, 1)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicRegBit(0x0018, 11, 1)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_eee_portEnable_set
-+ * Description:
-+ *      Set enable status of EEE function.
-+ * Input:
-+ *      port - port id.
-+ *      enable - enable EEE status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_ID - Invalid port number.
-+ *      RT_ERR_ENABLE - Invalid enable input.
-+ * Note:
-+ *      This API can set EEE function to the specific port.
-+ *      The configuration of the port is as following:
-+ *      - DISABLE
-+ *      - ENABLE
-+ */
-+rtk_api_ret_t rtk_eee_portEnable_set(rtk_port_t port, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      regData;
-+    rtk_uint32    phy_port;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port is UTP port */
-+    RTK_CHK_PORT_IS_UTP(port);
-+
-+    if (enable>=RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    phy_port = rtk_switch_port_L2P_get(port);
-+
-+    if ((retVal = rtl8367c_setAsicEee100M(phy_port,enable))!=RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_setAsicEeeGiga(phy_port,enable))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicPHYReg(phy_port, RTL8367C_PHY_PAGE_ADDRESS, 0))!=RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_getAsicPHYReg(phy_port, 0, &regData))!=RT_ERR_OK)
-+        return retVal;
-+    regData |= 0x0200;
-+    if ((retVal = rtl8367c_setAsicPHYReg(phy_port, 0, regData))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_eee_portEnable_get
-+ * Description:
-+ *      Get enable status of EEE function
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - Back pressure status.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_ID - Invalid port number.
-+ * Note:
-+ *      This API can get EEE function to the specific port.
-+ *      The configuration of the port is as following:
-+ *      - DISABLE
-+ *      - ENABLE
-+ */
-+
-+rtk_api_ret_t rtk_eee_portEnable_get(rtk_port_t port, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 regData1, regData2;
-+    rtk_uint32    phy_port;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port is UTP port */
-+    RTK_CHK_PORT_IS_UTP(port);
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    phy_port = rtk_switch_port_L2P_get(port);
-+
-+    if ((retVal = rtl8367c_getAsicEee100M(phy_port,&regData1))!=RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_getAsicEeeGiga(phy_port,&regData2))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if (regData1==1&&regData2==1)
-+        *pEnable = ENABLED;
-+    else
-+        *pEnable = DISABLED;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/i2c.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/i2c.c
-new file mode 100644
-index 0000000000..17a5f3785b
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/i2c.c
-@@ -0,0 +1,436 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 63932 $
-+ * $Date: 2015-12-08 14:06:29 +0800 (周二, 08 �二月 2015) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in i2c module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <port.h>
-+#include <string.h>
-+#include <rtl8367c_reg.h>
-+
-+#include <rtl8367c_asicdrv_i2c.h>
-+#include <rtk_switch.h>
-+#include <rtl8367c_asicdrv.h>
-+#include <rtk_types.h>
-+#include <i2c.h>
-+
-+
-+static rtk_I2C_16bit_mode_t rtk_i2c_mode = I2C_LSB_16BIT_MODE;
-+
-+
-+/* Function Name:
-+ *      rtk_i2c_init
-+ * Description:
-+ *      I2C smart function initialization.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ * Note:
-+ *      This API is used to initialize EEE status.
-+ *      need used GPIO pins
-+ *      OpenDrain and clock
-+ */
-+rtk_api_ret_t rtk_i2c_init(void)
-+{
-+    rtk_uint32 retVal;
-+  switch_chip_t ChipID;
-+  /* probe switch */
-+  if((retVal = rtk_switch_probe(&ChipID)) != RT_ERR_OK)
-+      return retVal;
-+
-+  if( ChipID == CHIP_RTL8370B )
-+  {
-+   /*set GPIO8, GPIO9, OpenDrain as I2C, clock = 252KHZ   */
-+      if((retVal = rtl8367c_setAsicReg(RTL8367C_REG_M_I2C_SYS_CTL, 0x5c3f)) != RT_ERR_OK)
-+        return retVal;
-+  }
-+  else
-+      return RT_ERR_FAILED;
-+  return  RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_i2c_mode_set
-+ * Description:
-+ *      Set I2C data byte-order.
-+ * Input:
-+ *      i2cmode - byte-order mode
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      This API can set I2c traffic's byte-order .
-+ */
-+rtk_api_ret_t rtk_i2c_mode_set( rtk_I2C_16bit_mode_t i2cmode )
-+{
-+    if(i2cmode >= I2C_Mode_END)
-+    {
-+        return RT_ERR_INPUT;
-+    }
-+    else if(i2cmode == I2C_70B_LSB_16BIT_MODE)
-+    {
-+        rtk_i2c_mode = I2C_70B_LSB_16BIT_MODE;
-+
-+        return RT_ERR_OK;
-+    }
-+    else if( i2cmode == I2C_LSB_16BIT_MODE)
-+    {
-+        rtk_i2c_mode = I2C_LSB_16BIT_MODE;
-+        return RT_ERR_OK;
-+    }
-+    else
-+        return RT_ERR_FAILED;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_i2c_mode_get
-+ * Description:
-+ *      Get i2c traffic byte-order setting.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pI2cMode - i2c byte-order
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_NULL_POINTER     - input parameter is null pointer
-+ * Note:
-+ *      The API can get i2c traffic byte-order setting.
-+ */
-+rtk_api_ret_t rtk_i2c_mode_get( rtk_I2C_16bit_mode_t * pI2cMode)
-+{
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+    if(NULL == pI2cMode)
-+        return RT_ERR_NULL_POINTER;
-+    if(rtk_i2c_mode == I2C_70B_LSB_16BIT_MODE)
-+        *pI2cMode = 1;
-+    else if ((rtk_i2c_mode == I2C_LSB_16BIT_MODE))
-+        *pI2cMode = 0;
-+    else
-+        return RT_ERR_FAILED;
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_i2c_gpioPinGroup_set
-+ * Description:
-+ *      Set i2c SDA & SCL used GPIO pins group.
-+ * Input:
-+ *      pins_group - GPIO pins group
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      The API can set i2c used gpio pins group.
-+ *      There are three group pins could be used
-+ */
-+rtk_api_ret_t rtk_i2c_gpioPinGroup_set( rtk_I2C_gpio_pin_t pins_group )
-+{
-+    rtk_uint32 retVal;
-+
-+
-+    if( ( pins_group > I2C_GPIO_PIN_END )|| ( pins_group < I2C_GPIO_PIN_8_9) )
-+        return RT_ERR_INPUT;
-+
-+    if( (retVal = rtl8367c_setAsicI2CGpioPinGroup(pins_group) ) != RT_ERR_OK )
-+        return retVal ;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_i2c_gpioPinGroup_get
-+ * Description:
-+ *      Get i2c SDA & SCL used GPIO pins group.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pPins_group - GPIO pins group
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_NULL_POINTER     - input parameter is null pointer
-+ * Note:
-+ *      The API can get i2c used gpio pins group.
-+ *      There are three group pins could be used
-+ */
-+rtk_api_ret_t rtk_i2c_gpioPinGroup_get( rtk_I2C_gpio_pin_t * pPins_group )
-+{
-+    rtk_uint32 retVal;
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pPins_group)
-+        return RT_ERR_NULL_POINTER;
-+    if( (retVal = rtl8367c_getAsicI2CGpioPinGroup(pPins_group) ) != RT_ERR_OK )
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_i2c_data_read
-+ * Description:
-+ *      read i2c slave device register.
-+ * Input:
-+ *      deviceAddr   -   access Slave device address
-+ *      slaveRegAddr -   access Slave register address
-+ * Output:
-+ *      pRegData     -   read data
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_NULL_POINTER     - input parameter is null pointer
-+ * Note:
-+ *      The API can access i2c slave and read i2c slave device register.
-+ */
-+rtk_api_ret_t rtk_i2c_data_read(rtk_uint8 deviceAddr, rtk_uint32 slaveRegAddr, rtk_uint32 *pRegData)
-+{
-+     rtk_uint32 retVal, counter=0;
-+     rtk_uint8 controlByte_W, controlByte_R;
-+     rtk_uint8 slaveRegAddr_L, slaveRegAddr_H = 0x0, temp;
-+     rtk_uint8 regData_L, regData_H;
-+
-+   /* control byte :deviceAddress + W,  deviceAddress + R   */
-+    controlByte_W = (rtk_uint8)(deviceAddr << 1) ;
-+    controlByte_R = (rtk_uint8)(controlByte_W | 0x1);
-+
-+    slaveRegAddr_L = (rtk_uint8) (slaveRegAddr & 0x00FF) ;
-+    slaveRegAddr_H = (rtk_uint8) (slaveRegAddr >>8) ;
-+
-+    if( rtk_i2c_mode == I2C_70B_LSB_16BIT_MODE)
-+    {
-+        temp = slaveRegAddr_L ;
-+        slaveRegAddr_L = slaveRegAddr_H;
-+        slaveRegAddr_H = temp;
-+    }
-+
-+
-+  /*check bus state: idle*/
-+  for(counter = 3000; counter>0; counter--)
-+  {
-+    if ( (retVal = rtl8367c_setAsicI2C_checkBusIdle() ) == RT_ERR_OK)
-+         break;
-+  }
-+  if( counter ==0 )
-+      return retVal; /*i2c is busy*/
-+
-+   /*tx Start cmd*/
-+   if( (retVal = rtl8367c_setAsicI2CStartCmd() ) != RT_ERR_OK )
-+       return retVal ;
-+
-+
-+  /*tx control _W*/
-+   if( (retVal = rtl8367c_setAsicI2CTxOneCharCmd(controlByte_W))!= RT_ERR_OK )
-+      return retVal ;
-+
-+
-+  /*check if RX ack from slave*/
-+   if( (retVal = rtl8367c_setAsicI2CcheckRxAck()) != RT_ERR_OK )
-+        return retVal;
-+
-+    /* tx slave buffer address low 8 bits */
-+   if( (retVal = rtl8367c_setAsicI2CTxOneCharCmd(slaveRegAddr_L))!= RT_ERR_OK )
-+         return retVal  ;
-+
-+   /*check if RX ack from slave*/
-+   if( (retVal = rtl8367c_setAsicI2CcheckRxAck()) != RT_ERR_OK )
-+        return retVal;
-+
-+
-+
-+        /* tx slave buffer address high 8 bits */
-+   if( (retVal = rtl8367c_setAsicI2CTxOneCharCmd(slaveRegAddr_H))!= RT_ERR_OK )
-+         return retVal  ;
-+
-+
-+   /*check if RX ack from slave*/
-+   if( (retVal = rtl8367c_setAsicI2CcheckRxAck()) != RT_ERR_OK )
-+        return retVal;
-+
-+
-+   /*tx Start cmd*/
-+   if( (retVal = rtl8367c_setAsicI2CStartCmd() ) != RT_ERR_OK )
-+       return retVal ;
-+
-+      /*tx control _R*/
-+   if( (retVal = rtl8367c_setAsicI2CTxOneCharCmd(controlByte_R))!= RT_ERR_OK )
-+       return retVal ;
-+
-+
-+  /*check if RX ack from slave*/
-+   if( (retVal = rtl8367c_setAsicI2CcheckRxAck()) != RT_ERR_OK )
-+        return retVal;
-+
-+
-+    /* rx low 8bit data*/
-+   if( ( retVal = rtl8367c_setAsicI2CRxOneCharCmd( &regData_L) ) != RT_ERR_OK )
-+        return retVal;
-+
-+
-+
-+    /* tx ack to slave, keep receive */
-+    if( (retVal = rtl8367c_setAsicI2CTxAckCmd()) != RT_ERR_OK )
-+        return retVal;
-+
-+     /* rx high 8bit data*/
-+    if( ( retVal = rtl8367c_setAsicI2CRxOneCharCmd( &regData_H) ) != RT_ERR_OK )
-+        return retVal;
-+
-+
-+
-+    /* tx Noack to slave, Stop receive */
-+     if( (retVal = rtl8367c_setAsicI2CTxNoAckCmd()) != RT_ERR_OK )
-+        return retVal;
-+
-+
-+    /*tx Stop cmd */
-+    if( (retVal = rtl8367c_setAsicI2CStopCmd()) != RT_ERR_OK )
-+        return retVal;
-+
-+    *pRegData = (regData_H << 8) | regData_L;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_i2c_data_write
-+ * Description:
-+ *      write data to i2c slave device register
-+ * Input:
-+ *      deviceAddr   -   access Slave device address
-+ *      slaveRegAddr -   access Slave register address
-+ *      regData      -   data to set
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ * Note:
-+ *      The API can access i2c slave and setting i2c slave device register.
-+ */
-+rtk_api_ret_t rtk_i2c_data_write(rtk_uint8 deviceAddr, rtk_uint32 slaveRegAddr, rtk_uint32 regData)
-+{
-+     rtk_uint32 retVal,counter;
-+     rtk_uint8 controlByte_W;
-+     rtk_uint8 slaveRegAddr_L, slaveRegAddr_H = 0x0, temp;
-+     rtk_uint8 regData_L, regData_H;
-+
-+  /* control byte :deviceAddress + W    */
-+    controlByte_W = (rtk_uint8)(deviceAddr<< 1) ;
-+
-+    slaveRegAddr_L = (rtk_uint8) (slaveRegAddr & 0x00FF) ;
-+    slaveRegAddr_H = (rtk_uint8) (slaveRegAddr >>8) ;
-+
-+    regData_H   = (rtk_uint8) (regData>> 8);
-+    regData_L   = (rtk_uint8) (regData & 0x00FF);
-+
-+    if( rtk_i2c_mode == I2C_70B_LSB_16BIT_MODE)
-+    {
-+        temp = slaveRegAddr_L ;
-+        slaveRegAddr_L = slaveRegAddr_H;
-+        slaveRegAddr_H = temp;
-+    }
-+
-+
-+  /*check bus state: idle*/
-+  for(counter = 3000; counter>0; counter--)
-+  {
-+    if ( (retVal = rtl8367c_setAsicI2C_checkBusIdle() ) == RT_ERR_OK)
-+        break;
-+  }
-+
-+  if( counter ==0 )
-+      return retVal; /*i2c is busy*/
-+
-+
-+   /*tx Start cmd*/
-+   if( (retVal = rtl8367c_setAsicI2CStartCmd() ) != RT_ERR_OK )
-+       return retVal ;
-+
-+
-+  /*tx control _W*/
-+   if( (retVal = rtl8367c_setAsicI2CTxOneCharCmd(controlByte_W))!= RT_ERR_OK )
-+      return retVal ;
-+
-+
-+  /*check if RX ack from slave*/
-+   if( (retVal = rtl8367c_setAsicI2CcheckRxAck()) != RT_ERR_OK )
-+        return retVal;
-+
-+
-+    /* tx slave buffer address low 8 bits */
-+   if( (retVal = rtl8367c_setAsicI2CTxOneCharCmd(slaveRegAddr_L))!= RT_ERR_OK )
-+        return retVal;
-+
-+
-+   /*check if RX ack from slave*/
-+   if( (retVal = rtl8367c_setAsicI2CcheckRxAck()) != RT_ERR_OK )
-+        return retVal;
-+
-+
-+   /* tx slave buffer address high 8 bits */
-+   if( (retVal = rtl8367c_setAsicI2CTxOneCharCmd(slaveRegAddr_H))!= RT_ERR_OK )
-+        return retVal;
-+
-+
-+   /*check if RX ack from slave*/
-+   if( (retVal = rtl8367c_setAsicI2CcheckRxAck()) != RT_ERR_OK )
-+        return retVal;
-+
-+
-+     /*tx Datavlue LSB*/
-+   if( (retVal = rtl8367c_setAsicI2CTxOneCharCmd(regData_L))!= RT_ERR_OK )
-+        return retVal;
-+
-+
-+   /*check if RX ack from slave*/
-+   if( (retVal = rtl8367c_setAsicI2CcheckRxAck()) != RT_ERR_OK )
-+        return retVal;
-+
-+
-+   /*tx Datavlue MSB*/
-+   if( (retVal = rtl8367c_setAsicI2CTxOneCharCmd(regData_H))!= RT_ERR_OK )
-+        return retVal;
-+
-+
-+   /*check if RX ack from slave*/
-+   if( (retVal = rtl8367c_setAsicI2CcheckRxAck()) != RT_ERR_OK )
-+        return retVal;
-+
-+
-+    /*tx Stop cmd */
-+    if( (retVal = rtl8367c_setAsicI2CStopCmd()) != RT_ERR_OK )
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/igmp.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/igmp.c
-new file mode 100644
-index 0000000000..170cbdaaf0
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/igmp.c
-@@ -0,0 +1,1555 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in IGMP module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <igmp.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_igmp.h>
-+#include <rtl8367c_asicdrv_lut.h>
-+
-+
-+/* Function Name:
-+ *      rtk_igmp_init
-+ * Description:
-+ *      This API enables H/W IGMP and set a default initial configuration.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API enables H/W IGMP and set a default initial configuration.
-+ */
-+rtk_api_ret_t rtk_igmp_init(void)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_port_t port;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((retVal = rtl8367c_setAsicLutIpMulticastLookup(ENABLED))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicLutIpLookupMethod(1))!=RT_ERR_OK)
-+        return retVal;
-+
-+    RTK_SCAN_ALL_PHY_PORTMASK(port)
-+    {
-+        if ((retVal = rtl8367c_setAsicIGMPv1Opeartion(port, PROTOCOL_OP_ASIC))!=RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicIGMPv2Opeartion(port, PROTOCOL_OP_ASIC))!=RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicIGMPv3Opeartion(port, PROTOCOL_OP_FLOOD))!=RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicMLDv1Opeartion(port, PROTOCOL_OP_ASIC))!=RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicMLDv2Opeartion(port, PROTOCOL_OP_FLOOD))!=RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    if ((retVal = rtl8367c_setAsicIGMPAllowDynamicRouterPort(rtk_switch_phyPortMask_get()))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPFastLeaveEn(ENABLED))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPReportLeaveFlood(1))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicIgmp(ENABLED))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_state_set
-+ * Description:
-+ *      This API set H/W IGMP state.
-+ * Input:
-+ *      enabled     - H/W IGMP state
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error parameter
-+ * Note:
-+ *      This API set H/W IGMP state.
-+ */
-+rtk_api_ret_t rtk_igmp_state_set(rtk_enable_t enabled)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (enabled >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicIgmp(enabled))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_state_get
-+ * Description:
-+ *      This API get H/W IGMP state.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pEnabled        - H/W IGMP state
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error parameter
-+ * Note:
-+ *      This API set current H/W IGMP state.
-+ */
-+rtk_api_ret_t rtk_igmp_state_get(rtk_enable_t *pEnabled)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(pEnabled == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIgmp(pEnabled))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_static_router_port_set
-+ * Description:
-+ *      Configure static router port
-+ * Input:
-+ *      pPortmask    - Static Port mask
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_MASK       - Error parameter
-+ * Note:
-+ *      This API set static router port
-+ */
-+rtk_api_ret_t rtk_igmp_static_router_port_set(rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Valid port mask */
-+    if(pPortmask == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    RTK_CHK_PORTMASK_VALID(pPortmask);
-+
-+    if ((retVal = rtk_switch_portmask_L2P_get(pPortmask, &pmask))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPStaticRouterPort(pmask))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_static_router_port_get
-+ * Description:
-+ *      Get static router port
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pPortmask       - Static port mask
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_MASK       - Error parameter
-+ * Note:
-+ *      This API get static router port
-+ */
-+rtk_api_ret_t rtk_igmp_static_router_port_get(rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(pPortmask == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPStaticRouterPort(&pmask))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtk_switch_portmask_P2L_get(pmask, pPortmask))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_protocol_set
-+ * Description:
-+ *      set IGMP/MLD protocol action
-+ * Input:
-+ *      port        - Port ID
-+ *      protocol    - IGMP/MLD protocol
-+ *      action      - Per-port and per-protocol IGMP action seeting
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_MASK       - Error parameter
-+ * Note:
-+ *      This API set IGMP/MLD protocol action
-+ */
-+rtk_api_ret_t rtk_igmp_protocol_set(rtk_port_t port, rtk_igmp_protocol_t protocol, rtk_igmp_action_t action)
-+{
-+    rtk_uint32      operation;
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(protocol >= PROTOCOL_END)
-+        return RT_ERR_INPUT;
-+
-+    if(action >= IGMP_ACTION_END)
-+        return RT_ERR_INPUT;
-+
-+    switch(action)
-+    {
-+        case IGMP_ACTION_FORWARD:
-+            operation = PROTOCOL_OP_FLOOD;
-+            break;
-+        case IGMP_ACTION_TRAP2CPU:
-+            operation = PROTOCOL_OP_TRAP;
-+            break;
-+        case IGMP_ACTION_DROP:
-+            operation = PROTOCOL_OP_DROP;
-+            break;
-+        case IGMP_ACTION_ASIC:
-+            operation = PROTOCOL_OP_ASIC;
-+            break;
-+        default:
-+            return RT_ERR_INPUT;
-+    }
-+
-+    switch(protocol)
-+    {
-+        case PROTOCOL_IGMPv1:
-+            if ((retVal = rtl8367c_setAsicIGMPv1Opeartion(rtk_switch_port_L2P_get(port), operation))!=RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case PROTOCOL_IGMPv2:
-+            if ((retVal = rtl8367c_setAsicIGMPv2Opeartion(rtk_switch_port_L2P_get(port), operation))!=RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case PROTOCOL_IGMPv3:
-+            if ((retVal = rtl8367c_setAsicIGMPv3Opeartion(rtk_switch_port_L2P_get(port), operation))!=RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case PROTOCOL_MLDv1:
-+            if ((retVal = rtl8367c_setAsicMLDv1Opeartion(rtk_switch_port_L2P_get(port), operation))!=RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case PROTOCOL_MLDv2:
-+            if ((retVal = rtl8367c_setAsicMLDv2Opeartion(rtk_switch_port_L2P_get(port), operation))!=RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        default:
-+            return RT_ERR_INPUT;
-+
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_protocol_get
-+ * Description:
-+ *      set IGMP/MLD protocol action
-+ * Input:
-+ *      port        - Port ID
-+ *      protocol    - IGMP/MLD protocol
-+ *      action      - Per-port and per-protocol IGMP action seeting
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_MASK       - Error parameter
-+ * Note:
-+ *      This API set IGMP/MLD protocol action
-+ */
-+rtk_api_ret_t rtk_igmp_protocol_get(rtk_port_t port, rtk_igmp_protocol_t protocol, rtk_igmp_action_t *pAction)
-+{
-+    rtk_uint32      operation;
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(protocol >= PROTOCOL_END)
-+        return RT_ERR_INPUT;
-+
-+    if(pAction == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    switch(protocol)
-+    {
-+        case PROTOCOL_IGMPv1:
-+            if ((retVal = rtl8367c_getAsicIGMPv1Opeartion(rtk_switch_port_L2P_get(port), &operation))!=RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case PROTOCOL_IGMPv2:
-+            if ((retVal = rtl8367c_getAsicIGMPv2Opeartion(rtk_switch_port_L2P_get(port), &operation))!=RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case PROTOCOL_IGMPv3:
-+            if ((retVal = rtl8367c_getAsicIGMPv3Opeartion(rtk_switch_port_L2P_get(port), &operation))!=RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case PROTOCOL_MLDv1:
-+            if ((retVal = rtl8367c_getAsicMLDv1Opeartion(rtk_switch_port_L2P_get(port), &operation))!=RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case PROTOCOL_MLDv2:
-+            if ((retVal = rtl8367c_getAsicMLDv2Opeartion(rtk_switch_port_L2P_get(port), &operation))!=RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        default:
-+            return RT_ERR_INPUT;
-+
-+    }
-+
-+    switch(operation)
-+    {
-+        case PROTOCOL_OP_FLOOD:
-+            *pAction = IGMP_ACTION_FORWARD;
-+            break;
-+        case PROTOCOL_OP_TRAP:
-+            *pAction = IGMP_ACTION_TRAP2CPU;
-+            break;
-+        case PROTOCOL_OP_DROP:
-+            *pAction = IGMP_ACTION_DROP;
-+            break;
-+        case PROTOCOL_OP_ASIC:
-+            *pAction = IGMP_ACTION_ASIC;
-+            break;
-+        default:
-+            return RT_ERR_FAILED;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_fastLeave_set
-+ * Description:
-+ *      set IGMP/MLD FastLeave state
-+ * Input:
-+ *      state       - ENABLED: Enable FastLeave, DISABLED: disable FastLeave
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API set IGMP/MLD FastLeave state
-+ */
-+rtk_api_ret_t rtk_igmp_fastLeave_set(rtk_enable_t state)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(state >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPFastLeaveEn((rtk_uint32)state))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_fastLeave_get
-+ * Description:
-+ *      get IGMP/MLD FastLeave state
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pState      - ENABLED: Enable FastLeave, DISABLED: disable FastLeave
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_NULL_POINTER    - NULL pointer
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API get IGMP/MLD FastLeave state
-+ */
-+rtk_api_ret_t rtk_igmp_fastLeave_get(rtk_enable_t *pState)
-+{
-+    rtk_uint32      fast_leave;
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(pState == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPFastLeaveEn(&fast_leave))!=RT_ERR_OK)
-+        return retVal;
-+
-+    *pState = ((fast_leave == 1) ? ENABLED : DISABLED);
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_maxGroup_set
-+ * Description:
-+ *      Set per port multicast group learning limit.
-+ * Input:
-+ *      port        - Port ID
-+ *      group       - The number of multicast group learning limit.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_PORT_ID         - Error Port ID
-+ *      RT_ERR_OUT_OF_RANGE    - parameter out of range
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API set per port multicast group learning limit.
-+ */
-+rtk_api_ret_t rtk_igmp_maxGroup_set(rtk_port_t port, rtk_uint32 group)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(group > RTL8367C_IGMP_MAX_GOUP)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPPortMAXGroup(rtk_switch_port_L2P_get(port), group))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_maxGroup_get
-+ * Description:
-+ *      Get per port multicast group learning limit.
-+ * Input:
-+ *      port        - Port ID
-+ * Output:
-+ *      pGroup      - The number of multicast group learning limit.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_PORT_ID         - Error Port ID
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API get per port multicast group learning limit.
-+ */
-+rtk_api_ret_t rtk_igmp_maxGroup_get(rtk_port_t port, rtk_uint32 *pGroup)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(pGroup == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPPortMAXGroup(rtk_switch_port_L2P_get(port), pGroup))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_currentGroup_get
-+ * Description:
-+ *      Get per port multicast group learning count.
-+ * Input:
-+ *      port        - Port ID
-+ * Output:
-+ *      pGroup      - The number of multicast group learning count.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_PORT_ID         - Error Port ID
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API get per port multicast group learning count.
-+ */
-+rtk_api_ret_t rtk_igmp_currentGroup_get(rtk_port_t port, rtk_uint32 *pGroup)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(pGroup == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPPortCurrentGroup(rtk_switch_port_L2P_get(port), pGroup))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_tableFullAction_set
-+ * Description:
-+ *      set IGMP/MLD Table Full Action
-+ * Input:
-+ *      action      - Table Full Action
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+rtk_api_ret_t rtk_igmp_tableFullAction_set(rtk_igmp_tableFullAction_t action)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(action >= IGMP_TABLE_FULL_OP_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPTableFullOP((rtk_uint32)action))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_tableFullAction_get
-+ * Description:
-+ *      get IGMP/MLD Table Full Action
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pAction     - Table Full Action
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+rtk_api_ret_t rtk_igmp_tableFullAction_get(rtk_igmp_tableFullAction_t *pAction)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pAction)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPTableFullOP((rtk_uint32 *)pAction))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_checksumErrorAction_set
-+ * Description:
-+ *      set IGMP/MLD Checksum Error Action
-+ * Input:
-+ *      action      - Checksum error Action
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+rtk_api_ret_t rtk_igmp_checksumErrorAction_set(rtk_igmp_checksumErrorAction_t action)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(action >= IGMP_CRC_ERR_OP_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPCRCErrOP((rtk_uint32)action))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_igmp_checksumErrorAction_get
-+ * Description:
-+ *      get IGMP/MLD Checksum Error Action
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pAction     - Checksum error Action
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+rtk_api_ret_t rtk_igmp_checksumErrorAction_get(rtk_igmp_checksumErrorAction_t *pAction)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pAction)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPCRCErrOP((rtk_uint32 *)pAction))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_leaveTimer_set
-+ * Description:
-+ *      set IGMP/MLD Leave timer
-+ * Input:
-+ *      timer       - Leave timer
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+rtk_api_ret_t rtk_igmp_leaveTimer_set(rtk_uint32 timer)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(timer > RTL8367C_MAX_LEAVE_TIMER)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPLeaveTimer(timer))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_leaveTimer_get
-+ * Description:
-+ *      get IGMP/MLD Leave timer
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pTimer      - Leave Timer.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+rtk_api_ret_t rtk_igmp_leaveTimer_get(rtk_uint32 *pTimer)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pTimer)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPLeaveTimer(pTimer))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_queryInterval_set
-+ * Description:
-+ *      set IGMP/MLD Query Interval
-+ * Input:
-+ *      interval     - Query Interval
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+rtk_api_ret_t rtk_igmp_queryInterval_set(rtk_uint32 interval)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(interval > RTL8367C_MAX_QUERY_INT)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPQueryInterval(interval))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_queryInterval_get
-+ * Description:
-+ *      get IGMP/MLD Query Interval
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pInterval   - Query Interval
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+rtk_api_ret_t rtk_igmp_queryInterval_get(rtk_uint32 *pInterval)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pInterval)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPQueryInterval(pInterval))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_robustness_set
-+ * Description:
-+ *      set IGMP/MLD Robustness value
-+ * Input:
-+ *      robustness     - Robustness value
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+rtk_api_ret_t rtk_igmp_robustness_set(rtk_uint32 robustness)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(robustness > RTL8367C_MAX_ROB_VAR)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPRobVar(robustness))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_robustness_get
-+ * Description:
-+ *      get IGMP/MLD Robustness value
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pRobustness     - Robustness value.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+rtk_api_ret_t rtk_igmp_robustness_get(rtk_uint32 *pRobustness)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pRobustness)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPRobVar(pRobustness))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_dynamicRouterRortAllow_set
-+ * Description:
-+ *      Configure dynamic router port allow option
-+ * Input:
-+ *      pPortmask    - Dynamic Port allow mask
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_MASK       - Error parameter
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_igmp_dynamicRouterPortAllow_set(rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pPortmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    RTK_CHK_PORTMASK_VALID(pPortmask);
-+
-+    if ((retVal = rtk_switch_portmask_L2P_get(pPortmask, &pmask))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPAllowDynamicRouterPort(pmask))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_dynamicRouterRortAllow_get
-+ * Description:
-+ *      Get dynamic router port allow option
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pPortmask    - Dynamic Port allow mask
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_MASK       - Error parameter
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_igmp_dynamicRouterPortAllow_get(rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pPortmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPAllowDynamicRouterPort(&pmask))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtk_switch_portmask_P2L_get(pmask, pPortmask))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_dynamicRouterPort_get
-+ * Description:
-+ *      Get dynamic router port
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pDynamicRouterPort    - Dynamic Router Port
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_MASK       - Error parameter
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_igmp_dynamicRouterPort_get(rtk_igmp_dynamicRouterPort_t *pDynamicRouterPort)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32 port;
-+    rtk_uint32 timer;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pDynamicRouterPort)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPdynamicRouterPort1(&port, &timer))!= RT_ERR_OK)
-+        return retVal;
-+
-+    if (port == RTL8367C_ROUTER_PORT_INVALID)
-+    {
-+        pDynamicRouterPort->dynamicRouterPort0Valid = DISABLED;
-+        pDynamicRouterPort->dynamicRouterPort0      = 0;
-+        pDynamicRouterPort->dynamicRouterPort0Timer = 0;
-+    }
-+    else
-+    {
-+        pDynamicRouterPort->dynamicRouterPort0Valid = ENABLED;
-+        pDynamicRouterPort->dynamicRouterPort0      = rtk_switch_port_P2L_get(port);
-+        pDynamicRouterPort->dynamicRouterPort0Timer = timer;
-+    }
-+
-+    if ((retVal = rtl8367c_getAsicIGMPdynamicRouterPort2(&port, &timer))!= RT_ERR_OK)
-+        return retVal;
-+
-+    if (port == RTL8367C_ROUTER_PORT_INVALID)
-+    {
-+        pDynamicRouterPort->dynamicRouterPort1Valid = DISABLED;
-+        pDynamicRouterPort->dynamicRouterPort1      = 0;
-+        pDynamicRouterPort->dynamicRouterPort1Timer = 0;
-+    }
-+    else
-+    {
-+        pDynamicRouterPort->dynamicRouterPort1Valid = ENABLED;
-+        pDynamicRouterPort->dynamicRouterPort1      = rtk_switch_port_P2L_get(port);
-+        pDynamicRouterPort->dynamicRouterPort1Timer = timer;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_suppressionEnable_set
-+ * Description:
-+ *      Configure IGMPv1/v2 & MLDv1 Report/Leave/Done suppression
-+ * Input:
-+ *      reportSuppression   - Report suppression
-+ *      leaveSuppression    - Leave suppression
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_igmp_suppressionEnable_set(rtk_enable_t reportSuppression, rtk_enable_t leaveSuppression)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(reportSuppression >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if(leaveSuppression >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPSuppression((rtk_uint32)reportSuppression, (rtk_uint32)leaveSuppression))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_suppressionEnable_get
-+ * Description:
-+ *      Get IGMPv1/v2 & MLDv1 Report/Leave/Done suppression
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pReportSuppression  - Report suppression
-+ *      pLeaveSuppression   - Leave suppression
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_igmp_suppressionEnable_get(rtk_enable_t *pReportSuppression, rtk_enable_t *pLeaveSuppression)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pReportSuppression)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(NULL == pLeaveSuppression)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPSuppression((rtk_uint32 *)pReportSuppression, (rtk_uint32 *)pLeaveSuppression))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_portRxPktEnable_set
-+ * Description:
-+ *      Configure IGMP/MLD RX Packet configuration
-+ * Input:
-+ *      port       - Port ID
-+ *      pRxCfg     - RX Packet Configuration
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_igmp_portRxPktEnable_set(rtk_port_t port, rtk_igmp_rxPktEnable_t *pRxCfg)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pRxCfg)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(pRxCfg->rxQuery >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if(pRxCfg->rxReport >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if(pRxCfg->rxLeave >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if(pRxCfg->rxMRP >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if(pRxCfg->rxMcast >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPQueryRX(rtk_switch_port_L2P_get(port), (rtk_uint32)pRxCfg->rxQuery))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPReportRX(rtk_switch_port_L2P_get(port), (rtk_uint32)pRxCfg->rxReport))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPLeaveRX(rtk_switch_port_L2P_get(port), (rtk_uint32)pRxCfg->rxLeave))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPMRPRX(rtk_switch_port_L2P_get(port), (rtk_uint32)pRxCfg->rxMRP))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPMcDataRX(rtk_switch_port_L2P_get(port), (rtk_uint32)pRxCfg->rxMcast))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_portRxPktEnable_get
-+ * Description:
-+ *      Get IGMP/MLD RX Packet configuration
-+ * Input:
-+ *      port       - Port ID
-+ *      pRxCfg     - RX Packet Configuration
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_igmp_portRxPktEnable_get(rtk_port_t port, rtk_igmp_rxPktEnable_t *pRxCfg)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pRxCfg)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPQueryRX(rtk_switch_port_L2P_get(port), (rtk_uint32 *)&(pRxCfg->rxQuery)))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPReportRX(rtk_switch_port_L2P_get(port), (rtk_uint32 *)&(pRxCfg->rxReport)))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPLeaveRX(rtk_switch_port_L2P_get(port), (rtk_uint32 *)&(pRxCfg->rxLeave)))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPMRPRX(rtk_switch_port_L2P_get(port), (rtk_uint32 *)&(pRxCfg->rxMRP)))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPMcDataRX(rtk_switch_port_L2P_get(port), (rtk_uint32 *)&(pRxCfg->rxMcast)))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_groupInfo_get
-+ * Description:
-+ *      Get IGMP/MLD Group database
-+ * Input:
-+ *      indes       - Index (0~255)
-+ * Output:
-+ *      pGroup      - Group database information.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_igmp_groupInfo_get(rtk_uint32 index, rtk_igmp_groupInfo_t *pGroup)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      valid;
-+    rtl8367c_igmpgroup  grp;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check index */
-+    if(index > RTL8367C_IGMP_MAX_GOUP)
-+        return RT_ERR_INPUT;
-+
-+    if(NULL == pGroup)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPGroup(index, &valid, &grp))!=RT_ERR_OK)
-+        return retVal;
-+
-+    memset(pGroup, 0x00, sizeof(rtk_igmp_groupInfo_t));
-+    pGroup->valid = valid;
-+    pGroup->reportSuppFlag = grp.report_supp_flag;
-+
-+    if(grp.p0_timer != 0)
-+    {
-+        RTK_PORTMASK_PORT_SET((pGroup->member), rtk_switch_port_P2L_get(0));
-+        pGroup->timer[rtk_switch_port_P2L_get(0)] = grp.p0_timer;
-+    }
-+
-+    if(grp.p1_timer != 0)
-+    {
-+        RTK_PORTMASK_PORT_SET((pGroup->member), rtk_switch_port_P2L_get(1));
-+        pGroup->timer[rtk_switch_port_P2L_get(1)] = grp.p1_timer;
-+    }
-+
-+    if(grp.p2_timer != 0)
-+    {
-+        RTK_PORTMASK_PORT_SET((pGroup->member), rtk_switch_port_P2L_get(2));
-+        pGroup->timer[rtk_switch_port_P2L_get(2)] = grp.p2_timer;
-+    }
-+
-+    if(grp.p3_timer != 0)
-+    {
-+        RTK_PORTMASK_PORT_SET((pGroup->member), rtk_switch_port_P2L_get(3));
-+        pGroup->timer[rtk_switch_port_P2L_get(3)] = grp.p3_timer;
-+    }
-+
-+    if(grp.p4_timer != 0)
-+    {
-+        RTK_PORTMASK_PORT_SET((pGroup->member), rtk_switch_port_P2L_get(4));
-+        pGroup->timer[rtk_switch_port_P2L_get(4)] = grp.p4_timer;
-+    }
-+
-+    if(grp.p5_timer != 0)
-+    {
-+        RTK_PORTMASK_PORT_SET((pGroup->member), rtk_switch_port_P2L_get(5));
-+        pGroup->timer[rtk_switch_port_P2L_get(5)] = grp.p5_timer;
-+    }
-+
-+    if(grp.p6_timer != 0)
-+    {
-+        RTK_PORTMASK_PORT_SET((pGroup->member), rtk_switch_port_P2L_get(6));
-+        pGroup->timer[rtk_switch_port_P2L_get(6)] = grp.p6_timer;
-+    }
-+
-+    if(grp.p7_timer != 0)
-+    {
-+        RTK_PORTMASK_PORT_SET((pGroup->member), rtk_switch_port_P2L_get(7));
-+        pGroup->timer[rtk_switch_port_P2L_get(7)] = grp.p7_timer;
-+    }
-+
-+    if(grp.p8_timer != 0)
-+    {
-+        RTK_PORTMASK_PORT_SET((pGroup->member), rtk_switch_port_P2L_get(8));
-+        pGroup->timer[rtk_switch_port_P2L_get(8)] = grp.p8_timer;
-+    }
-+
-+    if(grp.p9_timer != 0)
-+    {
-+        RTK_PORTMASK_PORT_SET((pGroup->member), rtk_switch_port_P2L_get(9));
-+        pGroup->timer[rtk_switch_port_P2L_get(9)] = grp.p9_timer;
-+    }
-+
-+    if(grp.p10_timer != 0)
-+    {
-+        RTK_PORTMASK_PORT_SET((pGroup->member), rtk_switch_port_P2L_get(10));
-+        pGroup->timer[rtk_switch_port_P2L_get(10)] = grp.p10_timer;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_ReportLeaveFwdAction_set
-+ * Description:
-+ *      Set Report Leave packet forwarding action
-+ * Input:
-+ *      action      - Action
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_igmp_ReportLeaveFwdAction_set(rtk_igmp_ReportLeaveFwdAct_t action)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      regData;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    switch(action)
-+    {
-+        case IGMP_REPORT_LEAVE_TO_ROUTER:
-+            regData = 1;
-+            break;
-+        case IGMP_REPORT_LEAVE_TO_ALLPORT:
-+            regData = 2;
-+            break;
-+        case IGMP_REPORT_LEAVE_TO_ROUTER_PORT_ADV:
-+            regData = 3;
-+            break;
-+        default:
-+            return RT_ERR_INPUT;
-+    }
-+
-+    if ((retVal = rtl8367c_setAsicIGMPReportLeaveFlood(regData))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_ReportLeaveFwdAction_get
-+ * Description:
-+ *      Get Report Leave packet forwarding action
-+ * Input:
-+ *      action      - Action
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_NULL_POINTER    - Null Pointer
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_igmp_ReportLeaveFwdAction_get(rtk_igmp_ReportLeaveFwdAct_t *pAction)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      regData;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pAction)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPReportLeaveFlood(&regData))!=RT_ERR_OK)
-+        return retVal;
-+
-+    switch(regData)
-+    {
-+        case 1:
-+            *pAction = IGMP_REPORT_LEAVE_TO_ROUTER;
-+            break;
-+        case 2:
-+            *pAction = IGMP_REPORT_LEAVE_TO_ALLPORT;
-+            break;
-+        case 3:
-+            *pAction = IGMP_REPORT_LEAVE_TO_ROUTER_PORT_ADV;
-+            break;
-+        default:
-+            return RT_ERR_FAILED;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_dropLeaveZeroEnable_set
-+ * Description:
-+ *      Set the function of droppping Leave packet with group IP = 0.0.0.0
-+ * Input:
-+ *      enabled      - Action 1: drop, 0:pass
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_igmp_dropLeaveZeroEnable_set(rtk_enable_t enabled)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(enabled >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPDropLeaveZero(enabled))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_dropLeaveZeroEnable_get
-+ * Description:
-+ *      Get the function of droppping Leave packet with group IP = 0.0.0.0
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnabled.   - Action 1: drop, 0:pass
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_NULL_POINTER    - Null Pointer
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_igmp_dropLeaveZeroEnable_get(rtk_enable_t *pEnabled)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pEnabled)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPDropLeaveZero((rtk_uint32 *)pEnabled))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_bypassGroupRange_set
-+ * Description:
-+ *      Set Bypass group
-+ * Input:
-+ *      group       - bypassed group
-+ *      enabled     - enabled 1: Bypassed, 0: not bypass
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_igmp_bypassGroupRange_set(rtk_igmp_bypassGroup_t group, rtk_enable_t enabled)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(group >= IGMP_BYPASS_GROUP_END)
-+        return RT_ERR_INPUT;
-+
-+    if(enabled >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicIGMPBypassGroup(group, enabled))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_igmp_bypassGroupRange_get
-+ * Description:
-+ *      get Bypass group
-+ * Input:
-+ *      group       - bypassed group
-+ * Output:
-+ *      pEnable     - enabled 1: Bypassed, 0: not bypass
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_NULL_POINTER    - Null Pointer
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_igmp_bypassGroupRange_get(rtk_igmp_bypassGroup_t group, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(group >= IGMP_BYPASS_GROUP_END)
-+        return RT_ERR_INPUT;
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicIGMPBypassGroup(group, pEnable))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/acl.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/acl.h
-new file mode 100644
-index 0000000000..6308da8d42
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/acl.h
-@@ -0,0 +1,990 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes ACL module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_ACL_H__
-+#define __RTK_API_ACL_H__
-+
-+/*
-+ * Data Type Declaration
-+ */
-+#define RTK_FILTER_RAW_FIELD_NUMBER                8
-+
-+#define ACL_DEFAULT_ABILITY                         0
-+#define ACL_DEFAULT_UNMATCH_PERMIT                  1
-+
-+#define ACL_RULE_FREE                               0
-+#define ACL_RULE_INAVAILABLE                        1
-+#define ACL_RULE_CARETAG_MASK                       0x1F
-+#define FILTER_POLICING_MAX                         4
-+#define FILTER_LOGGING_MAX                          8
-+#define FILTER_PATTERN_MAX                          4
-+
-+#define FILTER_ENACT_CVLAN_MASK         0x01
-+#define FILTER_ENACT_SVLAN_MASK         0x02
-+#define FILTER_ENACT_PRIORITY_MASK      0x04
-+#define FILTER_ENACT_POLICING_MASK      0x08
-+#define FILTER_ENACT_FWD_MASK           0x10
-+#define FILTER_ENACT_INTGPIO_MASK       0x20
-+#define FILTER_ENACT_INIT_MASK          0x3F
-+
-+typedef enum rtk_filter_act_cactext_e
-+{
-+    FILTER_ENACT_CACTEXT_VLANONLY=0,
-+    FILTER_ENACT_CACTEXT_BOTHVLANTAG,
-+    FILTER_ENACT_CACTEXT_TAGONLY,
-+    FILTER_ENACT_CACTEXT_END,
-+
-+
-+}rtk_filter_act_cactext_t;
-+
-+typedef enum rtk_filter_act_ctagfmt_e
-+{
-+    FILTER_CTAGFMT_UNTAG=0,
-+    FILTER_CTAGFMT_TAG,
-+    FILTER_CTAGFMT_KEEP,
-+    FILTER_CTAGFMT_KEEP1PRMK,
-+
-+
-+}rtk_filter_act_ctag_t;
-+
-+
-+
-+
-+
-+#define RTK_MAX_NUM_OF_FILTER_TYPE                  5
-+#define RTK_MAX_NUM_OF_FILTER_FIELD                 8
-+
-+#define RTK_DOT_1AS_TIMESTAMP_UNIT_IN_WORD_LENGTH   3UL
-+#define RTK_IPV6_ADDR_WORD_LENGTH                   4UL
-+
-+#define FILTER_ENACT_CVLAN_TYPE(type)   (type - FILTER_ENACT_CVLAN_INGRESS)
-+#define FILTER_ENACT_SVLAN_TYPE(type)   (type - FILTER_ENACT_SVLAN_INGRESS)
-+#define FILTER_ENACT_FWD_TYPE(type)     (type - FILTER_ENACT_ADD_DSTPORT)
-+#define FILTER_ENACT_PRI_TYPE(type)     (type - FILTER_ENACT_PRIORITY)
-+
-+#define RTK_FILTER_FIELD_USED_MAX                   8
-+#define RTK_FILTER_FIELD_INDEX(template, index)     ((template << 4) + index)
-+
-+
-+typedef enum rtk_filter_act_enable_e
-+{
-+    /* CVLAN */
-+    FILTER_ENACT_CVLAN_INGRESS = 0,
-+    FILTER_ENACT_CVLAN_EGRESS,
-+    FILTER_ENACT_CVLAN_SVID,
-+    FILTER_ENACT_POLICING_1,
-+
-+    /* SVLAN */
-+    FILTER_ENACT_SVLAN_INGRESS,
-+    FILTER_ENACT_SVLAN_EGRESS,
-+    FILTER_ENACT_SVLAN_CVID,
-+    FILTER_ENACT_POLICING_2,
-+
-+    /* Policing and Logging */
-+    FILTER_ENACT_POLICING_0,
-+
-+    /* Forward */
-+    FILTER_ENACT_COPY_CPU,
-+    FILTER_ENACT_DROP,
-+    FILTER_ENACT_ADD_DSTPORT,
-+    FILTER_ENACT_REDIRECT,
-+    FILTER_ENACT_MIRROR,
-+    FILTER_ENACT_TRAP_CPU,
-+    FILTER_ENACT_ISOLATION,
-+
-+    /* QoS */
-+    FILTER_ENACT_PRIORITY,
-+    FILTER_ENACT_DSCP_REMARK,
-+    FILTER_ENACT_1P_REMARK,
-+    FILTER_ENACT_POLICING_3,
-+
-+    /* Interrutp and GPO */
-+    FILTER_ENACT_INTERRUPT,
-+    FILTER_ENACT_GPO,
-+
-+    /*VLAN tag*/
-+    FILTER_ENACT_EGRESSCTAG_UNTAG,
-+    FILTER_ENACT_EGRESSCTAG_TAG,
-+    FILTER_ENACT_EGRESSCTAG_KEEP,
-+    FILTER_ENACT_EGRESSCTAG_KEEPAND1PRMK,
-+
-+    FILTER_ENACT_END,
-+} rtk_filter_act_enable_t;
-+
-+
-+typedef struct
-+{
-+    rtk_filter_act_enable_t actEnable[FILTER_ENACT_END];
-+
-+    /* CVLAN acton */
-+    rtk_uint32      filterCvlanVid;
-+    rtk_uint32      filterCvlanIdx;
-+    /* SVLAN action */
-+    rtk_uint32      filterSvlanVid;
-+    rtk_uint32      filterSvlanIdx;
-+
-+    /* Policing action */
-+    rtk_uint32      filterPolicingIdx[FILTER_POLICING_MAX];
-+
-+    /* Forwarding action */
-+    rtk_portmask_t  filterPortmask;
-+
-+    /* QOS action */
-+    rtk_uint32      filterPriority;
-+
-+    /*GPO*/
-+    rtk_uint32      filterPin;
-+
-+} rtk_filter_action_t;
-+
-+typedef struct rtk_filter_flag_s
-+{
-+    rtk_uint32 value;
-+    rtk_uint32 mask;
-+} rtk_filter_flag_t;
-+
-+typedef enum rtk_filter_care_tag_index_e
-+{
-+    CARE_TAG_CTAG = 0,
-+    CARE_TAG_STAG,
-+    CARE_TAG_PPPOE,
-+    CARE_TAG_IPV4,
-+    CARE_TAG_IPV6,
-+    CARE_TAG_TCP,
-+    CARE_TAG_UDP,
-+    CARE_TAG_ARP,
-+    CARE_TAG_RSV1,
-+    CARE_TAG_RSV2,
-+    CARE_TAG_ICMP,
-+    CARE_TAG_IGMP,
-+    CARE_TAG_LLC,
-+    CARE_TAG_RSV3,
-+    CARE_TAG_HTTP,
-+    CARE_TAG_RSV4,
-+    CARE_TAG_RSV5,
-+    CARE_TAG_DHCP,
-+    CARE_TAG_DHCPV6,
-+    CARE_TAG_SNMP,
-+    CARE_TAG_OAM,
-+    CARE_TAG_END,
-+} rtk_filter_care_tag_index_t;
-+
-+typedef struct rtk_filter_care_tag_s
-+{
-+    rtk_filter_flag_t tagType[CARE_TAG_END];
-+} rtk_filter_care_tag_t;
-+
-+typedef struct rtk_filter_field rtk_filter_field_t;
-+
-+typedef struct
-+{
-+    rtk_uint32 value[RTK_DOT_1AS_TIMESTAMP_UNIT_IN_WORD_LENGTH];
-+} rtk_filter_dot1as_timestamp_t;
-+
-+typedef enum rtk_filter_field_data_type_e
-+{
-+    FILTER_FIELD_DATA_MASK = 0,
-+    FILTER_FIELD_DATA_RANGE,
-+    FILTER_FIELD_DATA_END ,
-+} rtk_filter_field_data_type_t;
-+
-+typedef struct rtk_filter_ip_s
-+{
-+    rtk_uint32 dataType;
-+    rtk_uint32 rangeStart;
-+    rtk_uint32 rangeEnd;
-+    rtk_uint32 value;
-+    rtk_uint32 mask;
-+} rtk_filter_ip_t;
-+
-+typedef struct rtk_filter_mac_s
-+{
-+    rtk_uint32 dataType;
-+    rtk_mac_t value;
-+    rtk_mac_t mask;
-+    rtk_mac_t rangeStart;
-+    rtk_mac_t rangeEnd;
-+} rtk_filter_mac_t;
-+
-+typedef rtk_uint32 rtk_filter_op_t;
-+
-+typedef struct rtk_filter_value_s
-+{
-+    rtk_uint32 dataType;
-+    rtk_uint32 value;
-+    rtk_uint32 mask;
-+    rtk_uint32 rangeStart;
-+    rtk_uint32 rangeEnd;
-+
-+} rtk_filter_value_t;
-+
-+typedef struct rtk_filter_activeport_s
-+{
-+    rtk_portmask_t value;
-+    rtk_portmask_t mask;
-+
-+} rtk_filter_activeport_t;
-+
-+
-+
-+typedef struct rtk_filter_tag_s
-+{
-+    rtk_filter_value_t pri;
-+    rtk_filter_flag_t cfi;
-+    rtk_filter_value_t vid;
-+} rtk_filter_tag_t;
-+
-+typedef struct rtk_filter_ipFlag_s
-+{
-+    rtk_filter_flag_t xf;
-+    rtk_filter_flag_t mf;
-+    rtk_filter_flag_t df;
-+} rtk_filter_ipFlag_t;
-+
-+typedef struct
-+{
-+    rtk_uint32 addr[RTK_IPV6_ADDR_WORD_LENGTH];
-+} rtk_filter_ip6_addr_t;
-+
-+typedef struct
-+{
-+    rtk_uint32 dataType;
-+    rtk_filter_ip6_addr_t value;
-+    rtk_filter_ip6_addr_t mask;
-+    rtk_filter_ip6_addr_t rangeStart;
-+    rtk_filter_ip6_addr_t rangeEnd;
-+} rtk_filter_ip6_t;
-+
-+typedef rtk_uint32 rtk_filter_number_t;
-+
-+typedef struct rtk_filter_pattern_s
-+{
-+    rtk_uint32 value[FILTER_PATTERN_MAX];
-+    rtk_uint32 mask[FILTER_PATTERN_MAX];
-+} rtk_filter_pattern_t;
-+
-+typedef struct rtk_filter_tcpFlag_s
-+{
-+    rtk_filter_flag_t urg;
-+    rtk_filter_flag_t ack;
-+    rtk_filter_flag_t psh;
-+    rtk_filter_flag_t rst;
-+    rtk_filter_flag_t syn;
-+    rtk_filter_flag_t fin;
-+    rtk_filter_flag_t ns;
-+    rtk_filter_flag_t cwr;
-+    rtk_filter_flag_t ece;
-+} rtk_filter_tcpFlag_t;
-+
-+typedef rtk_uint32 rtk_filter_field_raw_t;
-+
-+typedef enum rtk_filter_field_temple_input_e
-+{
-+    FILTER_FIELD_TEMPLE_INPUT_TYPE = 0,
-+    FILTER_FIELD_TEMPLE_INPUT_INDEX,
-+    FILTER_FIELD_TEMPLE_INPUT_MAX ,
-+} rtk_filter_field_temple_input_t;
-+
-+struct rtk_filter_field
-+{
-+    rtk_uint32 fieldType;
-+
-+    union
-+    {
-+        /* L2 struct */
-+        rtk_filter_mac_t       dmac;
-+        rtk_filter_mac_t       smac;
-+        rtk_filter_value_t     etherType;
-+        rtk_filter_tag_t       ctag;
-+        rtk_filter_tag_t       relayCtag;
-+        rtk_filter_tag_t       stag;
-+        rtk_filter_tag_t       l2tag;
-+        rtk_filter_dot1as_timestamp_t dot1asTimeStamp;
-+        rtk_filter_mac_t       mac;
-+
-+        /* L3 struct */
-+        rtk_filter_ip_t      sip;
-+        rtk_filter_ip_t      dip;
-+        rtk_filter_ip_t      ip;
-+        rtk_filter_value_t   protocol;
-+        rtk_filter_value_t   ipTos;
-+        rtk_filter_ipFlag_t  ipFlag;
-+        rtk_filter_value_t   ipOffset;
-+        rtk_filter_ip6_t     sipv6;
-+        rtk_filter_ip6_t     dipv6;
-+        rtk_filter_ip6_t     ipv6;
-+        rtk_filter_value_t   ipv6TrafficClass;
-+        rtk_filter_value_t   ipv6NextHeader;
-+        rtk_filter_value_t   flowLabel;
-+
-+        /* L4 struct */
-+        rtk_filter_value_t   tcpSrcPort;
-+        rtk_filter_value_t   tcpDstPort;
-+        rtk_filter_tcpFlag_t tcpFlag;
-+        rtk_filter_value_t   tcpSeqNumber;
-+        rtk_filter_value_t   tcpAckNumber;
-+        rtk_filter_value_t   udpSrcPort;
-+        rtk_filter_value_t   udpDstPort;
-+        rtk_filter_value_t   icmpCode;
-+        rtk_filter_value_t   icmpType;
-+        rtk_filter_value_t   igmpType;
-+
-+        /* pattern match */
-+        rtk_filter_pattern_t pattern;
-+
-+        rtk_filter_value_t   inData;
-+
-+    } filter_pattern_union;
-+
-+    rtk_uint32 fieldTemplateNo;
-+    rtk_uint32 fieldTemplateIdx[RTK_FILTER_FIELD_USED_MAX];
-+
-+    struct rtk_filter_field *next;
-+};
-+
-+typedef enum rtk_filter_field_type_e
-+{
-+    FILTER_FIELD_DMAC = 0,
-+    FILTER_FIELD_SMAC,
-+    FILTER_FIELD_ETHERTYPE,
-+    FILTER_FIELD_CTAG,
-+    FILTER_FIELD_STAG,
-+
-+    FILTER_FIELD_IPV4_SIP,
-+    FILTER_FIELD_IPV4_DIP,
-+    FILTER_FIELD_IPV4_TOS,
-+    FILTER_FIELD_IPV4_PROTOCOL,
-+    FILTER_FIELD_IPV4_FLAG,
-+    FILTER_FIELD_IPV4_OFFSET,
-+    FILTER_FIELD_IPV6_SIPV6,
-+    FILTER_FIELD_IPV6_DIPV6,
-+    FILTER_FIELD_IPV6_TRAFFIC_CLASS,
-+    FILTER_FIELD_IPV6_NEXT_HEADER,
-+
-+    FILTER_FIELD_TCP_SPORT,
-+    FILTER_FIELD_TCP_DPORT,
-+    FILTER_FIELD_TCP_FLAG,
-+    FILTER_FIELD_UDP_SPORT,
-+    FILTER_FIELD_UDP_DPORT,
-+    FILTER_FIELD_ICMP_CODE,
-+    FILTER_FIELD_ICMP_TYPE,
-+    FILTER_FIELD_IGMP_TYPE,
-+
-+    FILTER_FIELD_VID_RANGE,
-+    FILTER_FIELD_IP_RANGE,
-+    FILTER_FIELD_PORT_RANGE,
-+
-+    FILTER_FIELD_USER_DEFINED00,
-+    FILTER_FIELD_USER_DEFINED01,
-+    FILTER_FIELD_USER_DEFINED02,
-+    FILTER_FIELD_USER_DEFINED03,
-+    FILTER_FIELD_USER_DEFINED04,
-+    FILTER_FIELD_USER_DEFINED05,
-+    FILTER_FIELD_USER_DEFINED06,
-+    FILTER_FIELD_USER_DEFINED07,
-+    FILTER_FIELD_USER_DEFINED08,
-+    FILTER_FIELD_USER_DEFINED09,
-+    FILTER_FIELD_USER_DEFINED10,
-+    FILTER_FIELD_USER_DEFINED11,
-+    FILTER_FIELD_USER_DEFINED12,
-+    FILTER_FIELD_USER_DEFINED13,
-+    FILTER_FIELD_USER_DEFINED14,
-+    FILTER_FIELD_USER_DEFINED15,
-+
-+    FILTER_FIELD_PATTERN_MATCH,
-+
-+    FILTER_FIELD_END,
-+} rtk_filter_field_type_t;
-+
-+
-+typedef enum rtk_filter_field_type_raw_e
-+{
-+    FILTER_FIELD_RAW_UNUSED = 0,
-+    FILTER_FIELD_RAW_DMAC_15_0,
-+    FILTER_FIELD_RAW_DMAC_31_16,
-+    FILTER_FIELD_RAW_DMAC_47_32,
-+    FILTER_FIELD_RAW_SMAC_15_0,
-+    FILTER_FIELD_RAW_SMAC_31_16,
-+    FILTER_FIELD_RAW_SMAC_47_32,
-+    FILTER_FIELD_RAW_ETHERTYPE,
-+    FILTER_FIELD_RAW_STAG,
-+    FILTER_FIELD_RAW_CTAG,
-+
-+    FILTER_FIELD_RAW_IPV4_SIP_15_0 = 0x10,
-+    FILTER_FIELD_RAW_IPV4_SIP_31_16,
-+    FILTER_FIELD_RAW_IPV4_DIP_15_0,
-+    FILTER_FIELD_RAW_IPV4_DIP_31_16,
-+
-+
-+    FILTER_FIELD_RAW_IPV6_SIP_15_0 = 0x20,
-+    FILTER_FIELD_RAW_IPV6_SIP_31_16,
-+    FILTER_FIELD_RAW_IPV6_DIP_15_0 = 0x28,
-+    FILTER_FIELD_RAW_IPV6_DIP_31_16,
-+
-+    FILTER_FIELD_RAW_VIDRANGE = 0x30,
-+    FILTER_FIELD_RAW_IPRANGE,
-+    FILTER_FIELD_RAW_PORTRANGE,
-+    FILTER_FIELD_RAW_FIELD_VALID,
-+
-+    FILTER_FIELD_RAW_FIELD_SELECT00 = 0x40,
-+    FILTER_FIELD_RAW_FIELD_SELECT01,
-+    FILTER_FIELD_RAW_FIELD_SELECT02,
-+    FILTER_FIELD_RAW_FIELD_SELECT03,
-+    FILTER_FIELD_RAW_FIELD_SELECT04,
-+    FILTER_FIELD_RAW_FIELD_SELECT05,
-+    FILTER_FIELD_RAW_FIELD_SELECT06,
-+    FILTER_FIELD_RAW_FIELD_SELECT07,
-+    FILTER_FIELD_RAW_FIELD_SELECT08,
-+    FILTER_FIELD_RAW_FIELD_SELECT09,
-+    FILTER_FIELD_RAW_FIELD_SELECT10,
-+    FILTER_FIELD_RAW_FIELD_SELECT11,
-+    FILTER_FIELD_RAW_FIELD_SELECT12,
-+    FILTER_FIELD_RAW_FIELD_SELECT13,
-+    FILTER_FIELD_RAW_FIELD_SELECT14,
-+    FILTER_FIELD_RAW_FIELD_SELECT15,
-+
-+    FILTER_FIELD_RAW_END,
-+} rtk_filter_field_type_raw_t;
-+
-+typedef enum rtk_filter_flag_care_type_e
-+{
-+    FILTER_FLAG_CARE_DONT_CARE = 0,
-+    FILTER_FLAG_CARE_1,
-+    FILTER_FLAG_CARE_0,
-+    FILTER_FLAG_END
-+} rtk_filter_flag_care_type_t;
-+
-+typedef rtk_uint32  rtk_filter_id_t;    /* filter id type */
-+
-+typedef enum rtk_filter_invert_e
-+{
-+    FILTER_INVERT_DISABLE = 0,
-+    FILTER_INVERT_ENABLE,
-+    FILTER_INVERT_END,
-+} rtk_filter_invert_t;
-+
-+typedef rtk_uint32 rtk_filter_state_t;
-+
-+typedef rtk_uint32 rtk_filter_unmatch_action_t;
-+
-+typedef enum rtk_filter_unmatch_action_e
-+{
-+    FILTER_UNMATCH_DROP = 0,
-+    FILTER_UNMATCH_PERMIT,
-+    FILTER_UNMATCH_END,
-+} rtk_filter_unmatch_action_type_t;
-+
-+typedef struct
-+{
-+    rtk_filter_field_t      *fieldHead;
-+    rtk_filter_care_tag_t   careTag;
-+    rtk_filter_activeport_t activeport;
-+
-+    rtk_filter_invert_t     invert;
-+} rtk_filter_cfg_t;
-+
-+typedef struct
-+{
-+    rtk_filter_field_raw_t      dataFieldRaw[RTK_FILTER_RAW_FIELD_NUMBER];
-+    rtk_filter_field_raw_t      careFieldRaw[RTK_FILTER_RAW_FIELD_NUMBER];
-+    rtk_filter_field_type_raw_t fieldRawType[RTK_FILTER_RAW_FIELD_NUMBER];
-+    rtk_filter_care_tag_t       careTag;
-+    rtk_filter_activeport_t     activeport;
-+
-+    rtk_filter_invert_t         invert;
-+    rtk_enable_t                valid;
-+} rtk_filter_cfg_raw_t;
-+
-+typedef struct
-+{
-+    rtk_uint32 index;
-+    rtk_filter_field_type_raw_t fieldType[RTK_FILTER_RAW_FIELD_NUMBER];
-+} rtk_filter_template_t;
-+
-+typedef enum rtk_field_sel_e
-+{
-+    FORMAT_DEFAULT = 0,
-+    FORMAT_RAW,
-+    FORMAT_LLC,
-+    FORMAT_IPV4,
-+    FORMAT_ARP,
-+    FORMAT_IPV6,
-+    FORMAT_IPPAYLOAD,
-+    FORMAT_L4PAYLOAD,
-+    FORMAT_END
-+}rtk_field_sel_t;
-+
-+typedef enum rtk_filter_iprange_e
-+{
-+    IPRANGE_UNUSED = 0,
-+    IPRANGE_IPV4_SIP,
-+    IPRANGE_IPV4_DIP,
-+    IPRANGE_IPV6_SIP,
-+    IPRANGE_IPV6_DIP,
-+    IPRANGE_END
-+}rtk_filter_iprange_t;
-+
-+typedef enum rtk_filter_vidrange_e
-+{
-+    VIDRANGE_UNUSED = 0,
-+    VIDRANGE_CVID,
-+    VIDRANGE_SVID,
-+    VIDRANGE_END
-+}rtk_filter_vidrange_t;
-+
-+typedef enum rtk_filter_portrange_e
-+{
-+    PORTRANGE_UNUSED = 0,
-+    PORTRANGE_SPORT,
-+    PORTRANGE_DPORT,
-+    PORTRANGE_END
-+}rtk_filter_portrange_t;
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_init
-+ * Description:
-+ *      ACL initialization function
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NULL_POINTER - Pointer pFilter_field or pFilter_cfg point to NULL.
-+ * Note:
-+ *      This function enable and intialize ACL function
-+ */
-+extern rtk_api_ret_t rtk_filter_igrAcl_init(void);
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_field_add
-+ * Description:
-+ *      Add comparison rule to an ACL configuration
-+ * Input:
-+ *      pFilter_cfg     - The ACL configuration that this function will add comparison rule
-+ *      pFilter_field   - The comparison rule that will be added.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_NULL_POINTER     - Pointer pFilter_field or pFilter_cfg point to NULL.
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ * Note:
-+ *      This function add a comparison rule (*pFilter_field) to an ACL configuration (*pFilter_cfg).
-+ *      Pointer pFilter_cfg points to an ACL configuration structure, this structure keeps multiple ACL
-+ *      comparison rules by means of linked list. Pointer pFilter_field will be added to linked
-+ *      list keeped by structure that pFilter_cfg points to.
-+ */
-+extern rtk_api_ret_t rtk_filter_igrAcl_field_add(rtk_filter_cfg_t *pFilter_cfg, rtk_filter_field_t *pFilter_field);
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_cfg_add
-+ * Description:
-+ *      Add an ACL configuration to ASIC
-+ * Input:
-+ *      filter_id       - Start index of ACL configuration.
-+ *      pFilter_cfg     - The ACL configuration that this function will add comparison rule
-+ *      pFilter_action  - Action(s) of ACL configuration.
-+ * Output:
-+ *      ruleNum - number of rules written in acl table
-+ * Return:
-+ *      RT_ERR_OK                               - OK
-+ *      RT_ERR_FAILED                           - Failed
-+ *      RT_ERR_SMI                              - SMI access error
-+ *      RT_ERR_NULL_POINTER                     - Pointer pFilter_field or pFilter_cfg point to NULL.
-+ *      RT_ERR_INPUT                            - Invalid input parameters.
-+ *      RT_ERR_ENTRY_INDEX                      - Invalid filter_id .
-+ *      RT_ERR_NULL_POINTER                     - Pointer pFilter_action or pFilter_cfg point to NULL.
-+ *      RT_ERR_FILTER_INACL_ACT_NOT_SUPPORT     - Action is not supported in this chip.
-+ *      RT_ERR_FILTER_INACL_RULE_NOT_SUPPORT    - Rule is not supported.
-+ * Note:
-+ *      This function store pFilter_cfg, pFilter_action into ASIC. The starting
-+ *      index(es) is filter_id.
-+ */
-+extern rtk_api_ret_t rtk_filter_igrAcl_cfg_add(rtk_filter_id_t filter_id, rtk_filter_cfg_t *pFilter_cfg, rtk_filter_action_t *pAction, rtk_filter_number_t *ruleNum);
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_cfg_del
-+ * Description:
-+ *      Delete an ACL configuration from ASIC
-+ * Input:
-+ *      filter_id   - Start index of ACL configuration.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_ENTRYIDX  - Invalid filter_id.
-+ * Note:
-+ *      This function delete a group of ACL rules starting from filter_id.
-+ */
-+extern rtk_api_ret_t rtk_filter_igrAcl_cfg_del(rtk_filter_id_t filter_id);
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_cfg_delAll
-+ * Description:
-+ *      Delete all ACL entries from ASIC
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      This function delete all ACL configuration from ASIC.
-+ */
-+extern rtk_api_ret_t rtk_filter_igrAcl_cfg_delAll(void);
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_cfg_get
-+ * Description:
-+ *      Get one ingress acl configuration from ASIC.
-+ * Input:
-+ *      filter_id       - Start index of ACL configuration.
-+ * Output:
-+ *      pFilter_cfg     - buffer pointer of ingress acl data
-+ *      pFilter_action  - buffer pointer of ingress acl action
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_NULL_POINTER     - Pointer pFilter_action or pFilter_cfg point to NULL.
-+ *      RT_ERR_FILTER_ENTRYIDX  - Invalid entry index.
-+ * Note:
-+ *      This function delete all ACL configuration from ASIC.
-+ */
-+extern rtk_api_ret_t rtk_filter_igrAcl_cfg_get(rtk_filter_id_t filter_id, rtk_filter_cfg_raw_t *pFilter_cfg, rtk_filter_action_t *pAction);
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_unmatchAction_set
-+ * Description:
-+ *      Set action to packets when no ACL configuration match
-+ * Input:
-+ *      port    - Port id.
-+ *      action  - Action.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port id.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This function sets action of packets when no ACL configruation matches.
-+ */
-+extern rtk_api_ret_t rtk_filter_igrAcl_unmatchAction_set(rtk_port_t port, rtk_filter_unmatch_action_t action);
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_unmatchAction_get
-+ * Description:
-+ *      Get action to packets when no ACL configuration match
-+ * Input:
-+ *      port    - Port id.
-+ * Output:
-+ *      pAction - Action.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port id.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This function gets action of packets when no ACL configruation matches.
-+ */
-+extern rtk_api_ret_t rtk_filter_igrAcl_unmatchAction_get(rtk_port_t port, rtk_filter_unmatch_action_t* action);
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_state_set
-+ * Description:
-+ *      Set state of ingress ACL.
-+ * Input:
-+ *      port    - Port id.
-+ *      state   - Ingress ACL state.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port id.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This function gets action of packets when no ACL configruation matches.
-+ */
-+extern rtk_api_ret_t rtk_filter_igrAcl_state_set(rtk_port_t port, rtk_filter_state_t state);
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_state_get
-+ * Description:
-+ *      Get state of ingress ACL.
-+ * Input:
-+ *      port    - Port id.
-+ * Output:
-+ *      pState  - Ingress ACL state.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port id.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This function gets action of packets when no ACL configruation matches.
-+ */
-+extern rtk_api_ret_t rtk_filter_igrAcl_state_get(rtk_port_t port, rtk_filter_state_t* state);
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_template_set
-+ * Description:
-+ *      Set template of ingress ACL.
-+ * Input:
-+ *      template - Ingress ACL template
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Invalid input parameters.
-+ * Note:
-+ *      This function set ACL template.
-+ */
-+extern rtk_api_ret_t rtk_filter_igrAcl_template_set(rtk_filter_template_t *aclTemplate);
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_template_get
-+ * Description:
-+ *      Get template of ingress ACL.
-+ * Input:
-+ *      template - Ingress ACL template
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This function gets template of ACL.
-+ */
-+extern rtk_api_ret_t rtk_filter_igrAcl_template_get(rtk_filter_template_t *aclTemplate);
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_field_sel_set
-+ * Description:
-+ *      Set user defined field selectors in HSB
-+ * Input:
-+ *      index       - index of field selector 0-15
-+ *      format      - Format of field selector
-+ *      offset      - Retrieving data offset
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      System support 16 user defined field selctors.
-+ *      Each selector can be enabled or disable.
-+ *      User can defined retrieving 16-bits in many predefiend
-+ *      standard l2/l3/l4 payload.
-+ */
-+extern rtk_api_ret_t rtk_filter_igrAcl_field_sel_set(rtk_uint32 index, rtk_field_sel_t format, rtk_uint32 offset);
-+
-+/* Function Name:
-+ *      rtk_filter_igrAcl_field_sel_get
-+ * Description:
-+ *      Get user defined field selectors in HSB
-+ * Input:
-+ *      index       - index of field selector 0-15
-+ * Output:
-+ *      pFormat     - Format of field selector
-+ *      pOffset     - Retrieving data offset
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      None.
-+ */
-+extern rtk_api_ret_t rtk_filter_igrAcl_field_sel_get(rtk_uint32 index, rtk_field_sel_t *pFormat, rtk_uint32 *pOffset);
-+
-+/* Function Name:
-+ *      rtk_filter_iprange_set
-+ * Description:
-+ *      Set IP Range check
-+ * Input:
-+ *      index       - index of IP Range 0-15
-+ *      type        - IP Range check type, 0:Delete a entry, 1: IPv4_SIP, 2: IPv4_DIP, 3:IPv6_SIP, 4:IPv6_DIP
-+ *      upperIp     - The upper bound of IP range
-+ *      lowerIp     - The lower Bound of IP range
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE    - The parameter is out of range
-+ *      RT_ERR_INPUT           - Input error
-+ * Note:
-+ *      upperIp must be larger or equal than lowerIp.
-+ */
-+extern rtk_api_ret_t rtk_filter_iprange_set(rtk_uint32 index, rtk_filter_iprange_t type, ipaddr_t upperIp, ipaddr_t lowerIp);
-+
-+/* Function Name:
-+ *      rtk_filter_iprange_get
-+ * Description:
-+ *      Set IP Range check
-+ * Input:
-+ *      index       - index of IP Range 0-15
-+ * Output:
-+ *      pType        - IP Range check type, 0:Delete a entry, 1: IPv4_SIP, 2: IPv4_DIP, 3:IPv6_SIP, 4:IPv6_DIP
-+ *      pUpperIp     - The upper bound of IP range
-+ *      pLowerIp     - The lower Bound of IP range
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE    - The parameter is out of range
-+ * Note:
-+ *      upperIp must be larger or equal than lowerIp.
-+ */
-+extern rtk_api_ret_t rtk_filter_iprange_get(rtk_uint32 index, rtk_filter_iprange_t *pType, ipaddr_t *pUpperIp, ipaddr_t *pLowerIp);
-+
-+/* Function Name:
-+ *      rtk_filter_vidrange_set
-+ * Description:
-+ *      Set VID Range check
-+ * Input:
-+ *      index       - index of VID Range 0-15
-+ *      type        - IP Range check type, 0:Delete a entry, 1: CVID, 2: SVID
-+ *      upperVid    - The upper bound of VID range
-+ *      lowerVid    - The lower Bound of VID range
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE    - The parameter is out of range
-+ *      RT_ERR_INPUT           - Input error
-+ * Note:
-+ *      upperVid must be larger or equal than lowerVid.
-+ */
-+extern rtk_api_ret_t rtk_filter_vidrange_set(rtk_uint32 index, rtk_filter_vidrange_t type, rtk_uint32 upperVid, rtk_uint32 lowerVid);
-+
-+/* Function Name:
-+ *      rtk_filter_vidrange_get
-+ * Description:
-+ *      Get VID Range check
-+ * Input:
-+ *      index       - index of VID Range 0-15
-+ * Output:
-+ *      pType        - IP Range check type, 0:Unused, 1: CVID, 2: SVID
-+ *      pUpperVid    - The upper bound of VID range
-+ *      pLowerVid    - The lower Bound of VID range
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE    - The parameter is out of range
-+ * Note:
-+ *      None.
-+ */
-+extern rtk_api_ret_t rtk_filter_vidrange_get(rtk_uint32 index, rtk_filter_vidrange_t *pType, rtk_uint32 *pUpperVid, rtk_uint32 *pLowerVid);
-+
-+/* Function Name:
-+ *      rtk_filter_portrange_set
-+ * Description:
-+ *      Set Port Range check
-+ * Input:
-+ *      index       - index of Port Range 0-15
-+ *      type        - IP Range check type, 0:Delete a entry, 1: Source Port, 2: Destnation Port
-+ *      upperPort   - The upper bound of Port range
-+ *      lowerPort   - The lower Bound of Port range
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE    - The parameter is out of range
-+ *      RT_ERR_INPUT           - Input error
-+ * Note:
-+ *      upperPort must be larger or equal than lowerPort.
-+ */
-+extern rtk_api_ret_t rtk_filter_portrange_set(rtk_uint32 index, rtk_filter_portrange_t type, rtk_uint32 upperPort, rtk_uint32 lowerPort);
-+
-+/* Function Name:
-+ *      rtk_filter_portrange_get
-+ * Description:
-+ *      Set Port Range check
-+ * Input:
-+ *      index       - index of Port Range 0-15
-+ * Output:
-+ *      pType       - IP Range check type, 0:Delete a entry, 1: Source Port, 2: Destnation Port
-+ *      pUpperPort  - The upper bound of Port range
-+ *      pLowerPort  - The lower Bound of Port range
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE    - The parameter is out of range
-+ *      RT_ERR_INPUT           - Input error
-+ * Note:
-+ *      None.
-+ */
-+extern rtk_api_ret_t rtk_filter_portrange_get(rtk_uint32 index, rtk_filter_portrange_t *pType, rtk_uint32 *pUpperPort, rtk_uint32 *pLowerPort);
-+
-+/* Function Name:
-+ *      rtk_filter_igrAclPolarity_set
-+ * Description:
-+ *      Set ACL Goip control palarity
-+ * Input:
-+ *      polarity - 1: High, 0: Low
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      none
-+ */
-+extern rtk_api_ret_t rtk_filter_igrAclPolarity_set(rtk_uint32 polarity);
-+
-+/* Function Name:
-+ *      rtk_filter_igrAclPolarity_get
-+ * Description:
-+ *      Get ACL Goip control palarity
-+ * Input:
-+ *      pPolarity - 1: High, 0: Low
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      none
-+ */
-+extern rtk_api_ret_t rtk_filter_igrAclPolarity_get(rtk_uint32* pPolarity);
-+
-+
-+#endif /* __RTK_API_ACL_H__ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/cpu.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/cpu.h
-new file mode 100644
-index 0000000000..5544aca7b2
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/cpu.h
-@@ -0,0 +1,327 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes CPU module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_CPU_H__
-+#define __RTK_API_CPU_H__
-+
-+
-+/*
-+ * Data Type Declaration
-+ */
-+typedef enum rtk_cpu_insert_e
-+{
-+    CPU_INSERT_TO_ALL = 0,
-+    CPU_INSERT_TO_TRAPPING,
-+    CPU_INSERT_TO_NONE,
-+    CPU_INSERT_END
-+}rtk_cpu_insert_t;
-+
-+typedef enum rtk_cpu_position_e
-+{
-+    CPU_POS_AFTER_SA = 0,
-+    CPU_POS_BEFORE_CRC,
-+    CPU_POS_END
-+}rtk_cpu_position_t;
-+
-+typedef enum rtk_cpu_tag_length_e
-+{
-+    CPU_LEN_8BYTES = 0,
-+    CPU_LEN_4BYTES,
-+    CPU_LEN_END
-+}rtk_cpu_tag_length_t;
-+
-+
-+typedef enum rtk_cpu_rx_length_e
-+{
-+    CPU_RX_72BYTES = 0,
-+    CPU_RX_64BYTES,
-+    CPU_RX_END
-+}rtk_cpu_rx_length_t;
-+
-+
-+/* Function Name:
-+ *      rtk_cpu_enable_set
-+ * Description:
-+ *      Set CPU port function enable/disable.
-+ * Input:
-+ *      enable - CPU port function enable
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can set CPU port function enable/disable.
-+ */
-+extern rtk_api_ret_t rtk_cpu_enable_set(rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_cpu_enable_get
-+ * Description:
-+ *      Get CPU port and its setting.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnable - CPU port function enable
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_L2_NO_CPU_PORT   - CPU port is not exist
-+ * Note:
-+ *      The API can get CPU port function enable/disable.
-+ */
-+extern rtk_api_ret_t rtk_cpu_enable_get(rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_cpu_tagPort_set
-+ * Description:
-+ *      Set CPU port and CPU tag insert mode.
-+ * Input:
-+ *      port - Port id.
-+ *      mode - CPU tag insert for packets egress from CPU port.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can set CPU port and inserting proprietary CPU tag mode (Length/Type 0x8899)
-+ *      to the frame that transmitting to CPU port.
-+ *      The inset cpu tag mode is as following:
-+ *      - CPU_INSERT_TO_ALL
-+ *      - CPU_INSERT_TO_TRAPPING
-+ *      - CPU_INSERT_TO_NONE
-+ */
-+extern rtk_api_ret_t rtk_cpu_tagPort_set(rtk_port_t port, rtk_cpu_insert_t mode);
-+
-+/* Function Name:
-+ *      rtk_cpu_tagPort_get
-+ * Description:
-+ *      Get CPU port and CPU tag insert mode.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pPort - Port id.
-+ *      pMode - CPU tag insert for packets egress from CPU port, 0:all insert 1:Only for trapped packets 2:no insert.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_L2_NO_CPU_PORT   - CPU port is not exist
-+ * Note:
-+ *      The API can get configured CPU port and its setting.
-+ *      The inset cpu tag mode is as following:
-+ *      - CPU_INSERT_TO_ALL
-+ *      - CPU_INSERT_TO_TRAPPING
-+ *      - CPU_INSERT_TO_NONE
-+ */
-+extern rtk_api_ret_t rtk_cpu_tagPort_get(rtk_port_t *pPort, rtk_cpu_insert_t *pMode);
-+
-+/* Function Name:
-+ *      rtk_cpu_awarePort_set
-+ * Description:
-+ *      Set CPU aware port mask.
-+ * Input:
-+ *      portmask - Port mask.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK      - Invalid port mask.
-+ * Note:
-+ *      The API can set configured CPU aware port mask.
-+ */
-+extern rtk_api_ret_t rtk_cpu_awarePort_set(rtk_portmask_t *pPortmask);
-+
-+
-+/* Function Name:
-+ *      rtk_cpu_awarePort_get
-+ * Description:
-+ *      Get CPU aware port mask.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pPortmask - Port mask.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ * Note:
-+ *      The API can get configured CPU aware port mask.
-+ */
-+extern rtk_api_ret_t rtk_cpu_awarePort_get(rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_cpu_tagPosition_set
-+ * Description:
-+ *      Set CPU tag position.
-+ * Input:
-+ *      position - CPU tag position.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT      - Invalid input.
-+ * Note:
-+ *      The API can set CPU tag position.
-+ */
-+extern rtk_api_ret_t rtk_cpu_tagPosition_set(rtk_cpu_position_t position);
-+
-+/* Function Name:
-+ *      rtk_cpu_tagPosition_get
-+ * Description:
-+ *      Get CPU tag position.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pPosition - CPU tag position.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT      - Invalid input.
-+ * Note:
-+ *      The API can get CPU tag position.
-+ */
-+extern rtk_api_ret_t rtk_cpu_tagPosition_get(rtk_cpu_position_t *pPosition);
-+
-+/* Function Name:
-+ *      rtk_cpu_tagLength_set
-+ * Description:
-+ *      Set CPU tag length.
-+ * Input:
-+ *      length - CPU tag length.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT      - Invalid input.
-+ * Note:
-+ *      The API can set CPU tag length.
-+ */
-+extern rtk_api_ret_t rtk_cpu_tagLength_set(rtk_cpu_tag_length_t length);
-+
-+/* Function Name:
-+ *      rtk_cpu_tagLength_get
-+ * Description:
-+ *      Get CPU tag length.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pLength - CPU tag length.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT      - Invalid input.
-+ * Note:
-+ *      The API can get CPU tag length.
-+ */
-+extern rtk_api_ret_t rtk_cpu_tagLength_get(rtk_cpu_tag_length_t *pLength);
-+
-+/* Function Name:
-+ *      rtk_cpu_acceptLength_set
-+ * Description:
-+ *      Set CPU accept  length.
-+ * Input:
-+ *      length - CPU tag length.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT      - Invalid input.
-+ * Note:
-+ *      The API can set CPU accept length.
-+ */
-+extern rtk_api_ret_t rtk_cpu_acceptLength_set(rtk_cpu_rx_length_t length);
-+
-+/* Function Name:
-+ *      rtk_cpu_acceptLength_get
-+ * Description:
-+ *      Get CPU accept length.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pLength - CPU tag length.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT      - Invalid input.
-+ * Note:
-+ *      The API can get CPU accept length.
-+ */
-+extern rtk_api_ret_t rtk_cpu_acceptLength_get(rtk_cpu_rx_length_t *pLength);
-+
-+/* Function Name:
-+ *      rtk_cpu_priRemap_set
-+ * Description:
-+ *      Configure CPU priorities mapping to internal absolute priority.
-+ * Input:
-+ *      int_pri     - internal priority value.
-+ *      new_pri    - new internal priority value.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_VLAN_PRIORITY    - Invalid 1p priority.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      Priority of CPU tag assignment for internal asic priority, and it is used for queue usage and packet scheduling.
-+ */
-+extern rtk_api_ret_t rtk_cpu_priRemap_set(rtk_pri_t int_pri, rtk_pri_t new_pri);
-+
-+/* Function Name:
-+ *      rtk_cpu_priRemap_get
-+ * Description:
-+ *      Configure CPU priorities mapping to internal absolute priority.
-+ * Input:
-+ *      int_pri     - internal priority value.
-+ * Output:
-+ *      pNew_pri    - new internal priority value.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_VLAN_PRIORITY    - Invalid 1p priority.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      Priority of CPU tag assignment for internal asic priority, and it is used for queue usage and packet scheduling.
-+ */
-+extern rtk_api_ret_t rtk_cpu_priRemap_get(rtk_pri_t int_pri, rtk_pri_t *pNew_pri);
-+
-+
-+#endif /* __RTK_API_CPU_H__ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/dot1x.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/dot1x.h
-new file mode 100644
-index 0000000000..ef0a05a04b
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/dot1x.h
-@@ -0,0 +1,470 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes 1X module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_DOT1X_H__
-+#define __RTK_API_DOT1X_H__
-+
-+
-+/* Type of port-based dot1x auth/unauth*/
-+typedef enum rtk_dot1x_auth_status_e
-+{
-+    UNAUTH = 0,
-+    AUTH,
-+    AUTH_STATUS_END
-+} rtk_dot1x_auth_status_t;
-+
-+typedef enum rtk_dot1x_direction_e
-+{
-+    DIR_BOTH = 0,
-+    DIR_IN,
-+    DIRECTION_END
-+} rtk_dot1x_direction_t;
-+
-+/* unauth pkt action */
-+typedef enum rtk_dot1x_unauth_action_e
-+{
-+    DOT1X_ACTION_DROP = 0,
-+    DOT1X_ACTION_TRAP2CPU,
-+    DOT1X_ACTION_GUESTVLAN,
-+    DOT1X_ACTION_END
-+} rtk_dot1x_unauth_action_t;
-+
-+/* Function Name:
-+ *      rtk_dot1x_unauthPacketOper_set
-+ * Description:
-+ *      Set 802.1x unauth action configuration.
-+ * Input:
-+ *      port            - Port id.
-+ *      unauth_action   - 802.1X unauth action.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      This API can set 802.1x unauth action configuration.
-+ *      The unauth action is as following:
-+ *      - DOT1X_ACTION_DROP
-+ *      - DOT1X_ACTION_TRAP2CPU
-+ *      - DOT1X_ACTION_GUESTVLAN
-+ */
-+extern rtk_api_ret_t rtk_dot1x_unauthPacketOper_set(rtk_port_t port, rtk_dot1x_unauth_action_t unauth_action);
-+
-+/* Function Name:
-+ *      rtk_dot1x_unauthPacketOper_get
-+ * Description:
-+ *      Get 802.1x unauth action configuration.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pUnauth_action - 802.1X unauth action.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API can get 802.1x unauth action configuration.
-+ *      The unauth action is as following:
-+ *      - DOT1X_ACTION_DROP
-+ *      - DOT1X_ACTION_TRAP2CPU
-+ *      - DOT1X_ACTION_GUESTVLAN
-+ */
-+extern rtk_api_ret_t rtk_dot1x_unauthPacketOper_get(rtk_port_t port, rtk_dot1x_unauth_action_t *pUnauth_action);
-+
-+/* Function Name:
-+ *      rtk_dot1x_eapolFrame2CpuEnable_set
-+ * Description:
-+ *      Set 802.1x EAPOL packet trap to CPU configuration
-+ * Input:
-+ *      enable - The status of 802.1x EAPOL packet.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      To support 802.1x authentication functionality, EAPOL frame (ether type = 0x888E) has to
-+ *      be trapped to CPU.
-+ *      The status of EAPOL frame trap to CPU is as following:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+extern rtk_api_ret_t rtk_dot1x_eapolFrame2CpuEnable_set(rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_dot1x_eapolFrame2CpuEnable_get
-+ * Description:
-+ *      Get 802.1x EAPOL packet trap to CPU configuration
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnable - The status of 802.1x EAPOL packet.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      To support 802.1x authentication functionality, EAPOL frame (ether type = 0x888E) has to
-+ *      be trapped to CPU.
-+ *      The status of EAPOL frame trap to CPU is as following:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+extern rtk_api_ret_t rtk_dot1x_eapolFrame2CpuEnable_get(rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_dot1x_portBasedEnable_set
-+ * Description:
-+ *      Set 802.1x port-based enable configuration
-+ * Input:
-+ *      port - Port id.
-+ *      enable - The status of 802.1x port.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_ENABLE               - Invalid enable input.
-+ *      RT_ERR_DOT1X_PORTBASEDPNEN  - 802.1X port-based enable error
-+ * Note:
-+ *      The API can update the port-based port enable register content. If a port is 802.1x
-+ *      port based network access control "enabled", it should be authenticated so packets
-+ *      from that port won't be dropped or trapped to CPU.
-+ *      The status of 802.1x port-based network access control is as following:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+extern rtk_api_ret_t rtk_dot1x_portBasedEnable_set(rtk_port_t port, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_dot1x_portBasedEnable_get
-+ * Description:
-+ *      Get 802.1x port-based enable configuration
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - The status of 802.1x port.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get the 802.1x port-based port status.
-+ */
-+extern rtk_api_ret_t rtk_dot1x_portBasedEnable_get(rtk_port_t port, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_dot1x_portBasedAuthStatus_set
-+ * Description:
-+ *      Set 802.1x port-based auth. port configuration
-+ * Input:
-+ *      port - Port id.
-+ *      port_auth - The status of 802.1x port.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *     RT_ERR_DOT1X_PORTBASEDAUTH   - 802.1X port-based auth error
-+ * Note:
-+ *      The authenticated status of 802.1x port-based network access control is as following:
-+ *      - UNAUTH
-+ *      - AUTH
-+ */
-+extern rtk_api_ret_t rtk_dot1x_portBasedAuthStatus_set(rtk_port_t port, rtk_dot1x_auth_status_t port_auth);
-+
-+/* Function Name:
-+ *      rtk_dot1x_portBasedAuthStatus_get
-+ * Description:
-+ *      Get 802.1x port-based auth. port configuration
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pPort_auth - The status of 802.1x port.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get 802.1x port-based port auth.information.
-+ */
-+extern rtk_api_ret_t rtk_dot1x_portBasedAuthStatus_get(rtk_port_t port, rtk_dot1x_auth_status_t *pPort_auth);
-+
-+/* Function Name:
-+ *      rtk_dot1x_portBasedDirection_set
-+ * Description:
-+ *      Set 802.1x port-based operational direction configuration
-+ * Input:
-+ *      port            - Port id.
-+ *      port_direction  - Operation direction
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_DOT1X_PORTBASEDOPDIR - 802.1X port-based operation direction error
-+ * Note:
-+ *      The operate controlled direction of 802.1x port-based network access control is as following:
-+ *      - BOTH
-+ *      - IN
-+ */
-+extern rtk_api_ret_t rtk_dot1x_portBasedDirection_set(rtk_port_t port, rtk_dot1x_direction_t port_direction);
-+
-+/* Function Name:
-+ *      rtk_dot1x_portBasedDirection_get
-+ * Description:
-+ *      Get 802.1X port-based operational direction configuration
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pPort_direction - Operation direction
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get 802.1x port-based operational direction information.
-+ */
-+extern rtk_api_ret_t rtk_dot1x_portBasedDirection_get(rtk_port_t port, rtk_dot1x_direction_t *pPort_direction);
-+
-+/* Function Name:
-+ *      rtk_dot1x_macBasedEnable_set
-+ * Description:
-+ *      Set 802.1x mac-based port enable configuration
-+ * Input:
-+ *      port - Port id.
-+ *      enable - The status of 802.1x port.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_ENABLE               - Invalid enable input.
-+ *      RT_ERR_DOT1X_MACBASEDPNEN   - 802.1X mac-based enable error
-+ * Note:
-+ *      If a port is 802.1x MAC based network access control "enabled", the incoming packets should
-+ *       be authenticated so packets from that port won't be dropped or trapped to CPU.
-+ *      The status of 802.1x MAC-based network access control is as following:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+extern rtk_api_ret_t rtk_dot1x_macBasedEnable_set(rtk_port_t port, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_dot1x_macBasedEnable_get
-+ * Description:
-+ *      Get 802.1x mac-based port enable configuration
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - The status of 802.1x port.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      If a port is 802.1x MAC based network access control "enabled", the incoming packets should
-+ *      be authenticated so packets from that port wont be dropped or trapped to CPU.
-+ *      The status of 802.1x MAC-based network access control is as following:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+extern rtk_api_ret_t rtk_dot1x_macBasedEnable_get(rtk_port_t port, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_dot1x_macBasedAuthMac_add
-+ * Description:
-+ *      Add an authenticated MAC to ASIC
-+ * Input:
-+ *      port        - Port id.
-+ *      pAuth_mac   - The authenticated MAC.
-+ *      fid         - filtering database.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_ENABLE               - Invalid enable input.
-+ *      RT_ERR_DOT1X_MACBASEDPNEN   - 802.1X mac-based enable error
-+ * Note:
-+ *      The API can add a 802.1x authenticated MAC address to port. If the MAC does not exist in LUT,
-+ *      user can't add this MAC to auth status.
-+ */
-+extern rtk_api_ret_t rtk_dot1x_macBasedAuthMac_add(rtk_port_t port, rtk_mac_t *pAuth_mac, rtk_fid_t fid);
-+
-+/* Function Name:
-+ *      rtk_dot1x_macBasedAuthMac_del
-+ * Description:
-+ *      Delete an authenticated MAC to ASIC
-+ * Input:
-+ *      port - Port id.
-+ *      pAuth_mac - The authenticated MAC.
-+ *      fid - filtering database.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_MAC          - Invalid MAC address.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can delete a 802.1x authenticated MAC address to port. It only change the auth status of
-+ *      the MAC and won't delete it from LUT.
-+ */
-+extern rtk_api_ret_t rtk_dot1x_macBasedAuthMac_del(rtk_port_t port, rtk_mac_t *pAuth_mac, rtk_fid_t fid);
-+
-+/* Function Name:
-+ *      rtk_dot1x_macBasedDirection_set
-+ * Description:
-+ *      Set 802.1x mac-based operational direction configuration
-+ * Input:
-+ *      mac_direction - Operation direction
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_INPUT                - Invalid input parameter.
-+ *      RT_ERR_DOT1X_MACBASEDOPDIR  - 802.1X mac-based operation direction error
-+ * Note:
-+ *      The operate controlled direction of 802.1x mac-based network access control is as following:
-+ *      - BOTH
-+ *      - IN
-+ */
-+extern rtk_api_ret_t rtk_dot1x_macBasedDirection_set(rtk_dot1x_direction_t mac_direction);
-+
-+/* Function Name:
-+ *      rtk_dot1x_macBasedDirection_get
-+ * Description:
-+ *      Get 802.1x mac-based operational direction configuration
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pMac_direction - Operation direction
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get 802.1x mac-based operational direction information.
-+ */
-+extern rtk_api_ret_t rtk_dot1x_macBasedDirection_get(rtk_dot1x_direction_t *pMac_direction);
-+
-+/* Function Name:
-+ *      Set 802.1x guest VLAN configuration
-+ * Description:
-+ *      Set 802.1x mac-based operational direction configuration
-+ * Input:
-+ *      vid - 802.1x guest VLAN ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      The operate controlled 802.1x guest VLAN
-+ */
-+extern rtk_api_ret_t rtk_dot1x_guestVlan_set(rtk_vlan_t vid);
-+
-+/* Function Name:
-+ *      rtk_dot1x_guestVlan_get
-+ * Description:
-+ *      Get 802.1x guest VLAN configuration
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pVid - 802.1x guest VLAN ID
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get 802.1x guest VLAN information.
-+ */
-+extern rtk_api_ret_t rtk_dot1x_guestVlan_get(rtk_vlan_t *pVid);
-+
-+/* Function Name:
-+ *      rtk_dot1x_guestVlan2Auth_set
-+ * Description:
-+ *      Set 802.1x guest VLAN to auth host configuration
-+ * Input:
-+ *      enable - The status of guest VLAN to auth host.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      The operational direction of 802.1x guest VLAN to auth host control is as following:
-+ *      - ENABLED
-+ *      - DISABLED
-+ */
-+extern rtk_api_ret_t rtk_dot1x_guestVlan2Auth_set(rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_dot1x_guestVlan2Auth_get
-+ * Description:
-+ *      Get 802.1x guest VLAN to auth host configuration
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnable - The status of guest VLAN to auth host.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get 802.1x guest VLAN to auth host information.
-+ */
-+extern rtk_api_ret_t rtk_dot1x_guestVlan2Auth_get(rtk_enable_t *pEnable);
-+
-+
-+#endif /* __RTK_API_DOT1X_H__ */
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/eee.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/eee.h
-new file mode 100644
-index 0000000000..b670998c8c
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/eee.h
-@@ -0,0 +1,82 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes EEE module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_EEE_H__
-+#define __RTK_API_EEE_H__
-+
-+/* Function Name:
-+ *      rtk_eee_init
-+ * Description:
-+ *      EEE function initialization.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API is used to initialize EEE status.
-+ */
-+extern rtk_api_ret_t rtk_eee_init(void);
-+
-+/* Function Name:
-+ *      rtk_eee_portEnable_set
-+ * Description:
-+ *      Set enable status of EEE function.
-+ * Input:
-+ *      port - port id.
-+ *      enable - enable EEE status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_ID - Invalid port number.
-+ *      RT_ERR_ENABLE - Invalid enable input.
-+ * Note:
-+ *      This API can set EEE function to the specific port.
-+ *      The configuration of the port is as following:
-+ *      - DISABLE
-+ *      - ENABLE
-+ */
-+extern rtk_api_ret_t rtk_eee_portEnable_set(rtk_port_t port, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_eee_portEnable_get
-+ * Description:
-+ *      Get port admin configuration of the specific port.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - Back pressure status.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_ID - Invalid port number.
-+ * Note:
-+ *      This API can set EEE function to the specific port.
-+ *      The configuration of the port is as following:
-+ *      - DISABLE
-+ *      - ENABLE
-+ */
-+extern rtk_api_ret_t rtk_eee_portEnable_get(rtk_port_t port, rtk_enable_t *pEnable);
-+
-+
-+#endif /* __RTK_API_EEE_H__ */
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/i2c.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/i2c.h
-new file mode 100644
-index 0000000000..2c7f0756ae
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/i2c.h
-@@ -0,0 +1,168 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes I2C module high-layer API defination
-+ *
-+ */
-+
-+
-+#ifndef __RTK_API_I2C_H__
-+#define __RTK_API_I2C_H__
-+#include <rtk_types.h>
-+
-+#define I2C_GPIO_MAX_GROUP (3)
-+
-+typedef enum rtk_I2C_16bit_mode_e{
-+    I2C_LSB_16BIT_MODE = 0,
-+    I2C_70B_LSB_16BIT_MODE,
-+    I2C_Mode_END
-+}rtk_I2C_16bit_mode_t;
-+
-+
-+typedef enum rtk_I2C_gpio_pin_e{
-+    I2C_GPIO_PIN_8_9 = 0,
-+    I2C_GPIO_PIN_15_16 ,
-+    I2C_GPIO_PIN_35_36 ,
-+    I2C_GPIO_PIN_END
-+}rtk_I2C_gpio_pin_t;
-+
-+
-+/* Function Name:
-+ *      rtk_i2c_data_read
-+ * Description:
-+ *      read i2c slave device register.
-+ * Input:
-+ *      deviceAddr   -   access Slave device address
-+ *      slaveRegAddr -   access Slave register address
-+ * Output:
-+ *      pRegData     -   read data
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_NULL_POINTER     - input parameter is null pointer
-+ * Note:
-+ *      The API can access i2c slave and read i2c slave device register.
-+ */
-+extern rtk_api_ret_t rtk_i2c_data_read(rtk_uint8 deviceAddr, rtk_uint32 slaveRegAddr, rtk_uint32 *pRegData);
-+
-+/* Function Name:
-+ *      rtk_i2c_data_write
-+ * Description:
-+ *      write data to i2c slave device register
-+ * Input:
-+ *      deviceAddr   -   access Slave device address
-+ *      slaveRegAddr -   access Slave register address
-+ *      regData      -   data to set
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ * Note:
-+ *      The API can access i2c slave and setting i2c slave device register.
-+ */
-+extern rtk_api_ret_t rtk_i2c_data_write(rtk_uint8 deviceAddr, rtk_uint32 slaveRegAddr, rtk_uint32 regData);
-+
-+
-+/* Function Name:
-+ *      rtk_i2c_init
-+ * Description:
-+ *      I2C smart function initialization.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ * Note:
-+ *      This API is used to initialize EEE status.
-+ *      need used GPIO pins
-+ *      OpenDrain and clock
-+ */
-+extern rtk_api_ret_t rtk_i2c_init(void);
-+
-+/* Function Name:
-+ *      rtk_i2c_mode_set
-+ * Description:
-+ *      Set I2C data byte-order.
-+ * Input:
-+ *      i2cmode - byte-order mode
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      This API can set I2c traffic's byte-order .
-+ */
-+extern rtk_api_ret_t rtk_i2c_mode_set( rtk_I2C_16bit_mode_t i2cmode);
-+
-+/* Function Name:
-+ *      rtk_i2c_mode_get
-+ * Description:
-+ *      Get i2c traffic byte-order setting.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pI2cMode - i2c byte-order
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_NULL_POINTER     - input parameter is null pointer
-+ * Note:
-+ *      The API can get i2c traffic byte-order setting.
-+ */
-+extern rtk_api_ret_t rtk_i2c_mode_get( rtk_I2C_16bit_mode_t * pI2cMode);
-+
-+
-+/* Function Name:
-+ *      rtk_i2c_gpioPinGroup_set
-+ * Description:
-+ *      Set i2c SDA & SCL used GPIO pins group.
-+ * Input:
-+ *      pins_group - GPIO pins group
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      The API can set i2c used gpio pins group.
-+ *      There are three group pins could be used
-+ */
-+extern rtk_api_ret_t rtk_i2c_gpioPinGroup_set( rtk_I2C_gpio_pin_t pins_group);
-+
-+/* Function Name:
-+ *      rtk_i2c_gpioPinGroup_get
-+ * Description:
-+ *      Get i2c SDA & SCL used GPIO pins group.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pPins_group - GPIO pins group
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_NULL_POINTER     - input parameter is null pointer
-+ * Note:
-+ *      The API can get i2c used gpio pins group.
-+ *      There are three group pins could be used
-+ */
-+extern rtk_api_ret_t rtk_i2c_gpioPinGroup_get(rtk_I2C_gpio_pin_t * pPins_group);
-+
-+
-+
-+
-+
-+
-+
-+#endif
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/igmp.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/igmp.h
-new file mode 100644
-index 0000000000..f088b0ccdd
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/igmp.h
-@@ -0,0 +1,769 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes IGMP module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_IGMP_H__
-+#define __RTK_API_IGMP_H__
-+
-+/*
-+ * Data Type Declaration
-+ */
-+typedef enum rtk_igmp_type_e
-+{
-+    IGMP_IPV4 = 0,
-+    IGMP_PPPOE_IPV4,
-+    IGMP_MLD,
-+    IGMP_PPPOE_MLD,
-+    IGMP_TYPE_END
-+} rtk_igmp_type_t;
-+
-+typedef enum rtk_trap_igmp_action_e
-+{
-+    IGMP_ACTION_FORWARD = 0,
-+    IGMP_ACTION_TRAP2CPU,
-+    IGMP_ACTION_DROP,
-+    IGMP_ACTION_ASIC,
-+    IGMP_ACTION_END
-+} rtk_igmp_action_t;
-+
-+typedef enum rtk_igmp_protocol_e
-+{
-+    PROTOCOL_IGMPv1 = 0,
-+    PROTOCOL_IGMPv2,
-+    PROTOCOL_IGMPv3,
-+    PROTOCOL_MLDv1,
-+    PROTOCOL_MLDv2,
-+    PROTOCOL_END
-+} rtk_igmp_protocol_t;
-+
-+typedef enum rtk_igmp_tableFullAction_e
-+{
-+    IGMP_TABLE_FULL_FORWARD = 0,
-+    IGMP_TABLE_FULL_DROP,
-+    IGMP_TABLE_FULL_TRAP,
-+    IGMP_TABLE_FULL_OP_END
-+}rtk_igmp_tableFullAction_t;
-+
-+typedef enum rtk_igmp_checksumErrorAction_e
-+{
-+    IGMP_CRC_ERR_DROP = 0,
-+    IGMP_CRC_ERR_TRAP,
-+    IGMP_CRC_ERR_FORWARD,
-+    IGMP_CRC_ERR_OP_END
-+}rtk_igmp_checksumErrorAction_t;
-+
-+typedef enum rtk_igmp_bypassGroup_e
-+{
-+    IGMP_BYPASS_224_0_0_X = 0,
-+    IGMP_BYPASS_224_0_1_X,
-+    IGMP_BYPASS_239_255_255_X,
-+    IGMP_BYPASS_IPV6_00XX,
-+    IGMP_BYPASS_GROUP_END
-+}rtk_igmp_bypassGroup_t;
-+
-+
-+typedef struct rtk_igmp_dynamicRouterPort_s
-+{
-+    rtk_enable_t    dynamicRouterPort0Valid;
-+    rtk_port_t      dynamicRouterPort0;
-+    rtk_uint32      dynamicRouterPort0Timer;
-+    rtk_enable_t    dynamicRouterPort1Valid;
-+    rtk_port_t      dynamicRouterPort1;
-+    rtk_uint32      dynamicRouterPort1Timer;
-+
-+}rtk_igmp_dynamicRouterPort_t;
-+
-+typedef struct rtk_igmp_rxPktEnable_s
-+{
-+    rtk_enable_t rxQuery;
-+    rtk_enable_t rxReport;
-+    rtk_enable_t rxLeave;
-+    rtk_enable_t rxMRP;
-+    rtk_enable_t rxMcast;
-+}rtk_igmp_rxPktEnable_t;
-+
-+typedef struct rtk_igmp_groupInfo_s
-+{
-+    rtk_enable_t    valid;
-+    rtk_portmask_t  member;
-+    rtk_uint32      timer[RTK_PORT_MAX];
-+    rtk_uint32      reportSuppFlag;
-+}rtk_igmp_groupInfo_t;
-+
-+typedef enum rtk_igmp_ReportLeaveFwdAct_e
-+{
-+    IGMP_REPORT_LEAVE_TO_ROUTER = 0,
-+    IGMP_REPORT_LEAVE_TO_ALLPORT,
-+    IGMP_REPORT_LEAVE_TO_ROUTER_PORT_ADV,
-+    IGMP_REPORT_LEAVE_ACT_END
-+}rtk_igmp_ReportLeaveFwdAct_t;
-+
-+/* Function Name:
-+ *      rtk_igmp_init
-+ * Description:
-+ *      This API enables H/W IGMP and set a default initial configuration.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API enables H/W IGMP and set a default initial configuration.
-+ */
-+extern rtk_api_ret_t rtk_igmp_init(void);
-+
-+/* Function Name:
-+ *      rtk_igmp_state_set
-+ * Description:
-+ *      This API set H/W IGMP state.
-+ * Input:
-+ *      enabled     - H/W IGMP state
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error parameter
-+ * Note:
-+ *      This API set H/W IGMP state.
-+ */
-+extern rtk_api_ret_t rtk_igmp_state_set(rtk_enable_t enabled);
-+
-+/* Function Name:
-+ *      rtk_igmp_state_get
-+ * Description:
-+ *      This API get H/W IGMP state.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pEnabled        - H/W IGMP state
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error parameter
-+ * Note:
-+ *      This API set current H/W IGMP state.
-+ */
-+extern rtk_api_ret_t rtk_igmp_state_get(rtk_enable_t *pEnabled);
-+
-+/* Function Name:
-+ *      rtk_igmp_static_router_port_set
-+ * Description:
-+ *      Configure static router port
-+ * Input:
-+ *      pPortmask    - Static Port mask
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_MASK       - Error parameter
-+ * Note:
-+ *      This API set static router port
-+ */
-+extern rtk_api_ret_t rtk_igmp_static_router_port_set(rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_igmp_static_router_port_get
-+ * Description:
-+ *      Get static router port
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pPortmask       - Static port mask
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_MASK       - Error parameter
-+ * Note:
-+ *      This API get static router port
-+ */
-+extern rtk_api_ret_t rtk_igmp_static_router_port_get(rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_igmp_protocol_set
-+ * Description:
-+ *      set IGMP/MLD protocol action
-+ * Input:
-+ *      port        - Port ID
-+ *      protocol    - IGMP/MLD protocol
-+ *      action      - Per-port and per-protocol IGMP action seeting
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_MASK       - Error parameter
-+ * Note:
-+ *      This API set IGMP/MLD protocol action
-+ */
-+extern rtk_api_ret_t rtk_igmp_protocol_set(rtk_port_t port, rtk_igmp_protocol_t protocol, rtk_igmp_action_t action);
-+
-+/* Function Name:
-+ *      rtk_igmp_protocol_get
-+ * Description:
-+ *      set IGMP/MLD protocol action
-+ * Input:
-+ *      port        - Port ID
-+ *      protocol    - IGMP/MLD protocol
-+ *      action      - Per-port and per-protocol IGMP action seeting
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_MASK       - Error parameter
-+ * Note:
-+ *      This API set IGMP/MLD protocol action
-+ */
-+extern rtk_api_ret_t rtk_igmp_protocol_get(rtk_port_t port, rtk_igmp_protocol_t protocol, rtk_igmp_action_t *pAction);
-+
-+/* Function Name:
-+ *      rtk_igmp_fastLeave_set
-+ * Description:
-+ *      set IGMP/MLD FastLeave state
-+ * Input:
-+ *      state       - ENABLED: Enable FastLeave, DISABLED: disable FastLeave
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API set IGMP/MLD FastLeave state
-+ */
-+extern rtk_api_ret_t rtk_igmp_fastLeave_set(rtk_enable_t state);
-+
-+/* Function Name:
-+ *      rtk_igmp_fastLeave_get
-+ * Description:
-+ *      get IGMP/MLD FastLeave state
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pState      - ENABLED: Enable FastLeave, DISABLED: disable FastLeave
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_NULL_POINTER    - NULL pointer
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API get IGMP/MLD FastLeave state
-+ */
-+extern rtk_api_ret_t rtk_igmp_fastLeave_get(rtk_enable_t *pState);
-+
-+/* Function Name:
-+ *      rtk_igmp_maxGroup_set
-+ * Description:
-+ *      Set per port multicast group learning limit.
-+ * Input:
-+ *      port        - Port ID
-+ *      group       - The number of multicast group learning limit.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_PORT_ID         - Error Port ID
-+ *      RT_ERR_OUT_OF_RANGE    - parameter out of range
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API set per port multicast group learning limit.
-+ */
-+extern rtk_api_ret_t rtk_igmp_maxGroup_set(rtk_port_t port, rtk_uint32 group);
-+
-+/* Function Name:
-+ *      rtk_igmp_maxGroup_get
-+ * Description:
-+ *      Get per port multicast group learning limit.
-+ * Input:
-+ *      port        - Port ID
-+ * Output:
-+ *      pGroup      - The number of multicast group learning limit.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_PORT_ID         - Error Port ID
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API get per port multicast group learning limit.
-+ */
-+extern rtk_api_ret_t rtk_igmp_maxGroup_get(rtk_port_t port, rtk_uint32 *pGroup);
-+
-+/* Function Name:
-+ *      rtk_igmp_currentGroup_get
-+ * Description:
-+ *      Get per port multicast group learning count.
-+ * Input:
-+ *      port        - Port ID
-+ * Output:
-+ *      pGroup      - The number of multicast group learning count.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_PORT_ID         - Error Port ID
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API get per port multicast group learning count.
-+ */
-+extern rtk_api_ret_t rtk_igmp_currentGroup_get(rtk_port_t port, rtk_uint32 *pGroup);
-+
-+/* Function Name:
-+ *      rtk_igmp_tableFullAction_set
-+ * Description:
-+ *      set IGMP/MLD Table Full Action
-+ * Input:
-+ *      action      - Table Full Action
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+extern rtk_api_ret_t rtk_igmp_tableFullAction_set(rtk_igmp_tableFullAction_t action);
-+
-+/* Function Name:
-+ *      rtk_igmp_tableFullAction_get
-+ * Description:
-+ *      get IGMP/MLD Table Full Action
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pAction     - Table Full Action
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+extern rtk_api_ret_t rtk_igmp_tableFullAction_get(rtk_igmp_tableFullAction_t *pAction);
-+
-+/* Function Name:
-+ *      rtk_igmp_checksumErrorAction_set
-+ * Description:
-+ *      set IGMP/MLD Checksum Error Action
-+ * Input:
-+ *      action      - Checksum error Action
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+extern rtk_api_ret_t rtk_igmp_checksumErrorAction_set(rtk_igmp_checksumErrorAction_t action);
-+
-+/* Function Name:
-+ *      rtk_igmp_checksumErrorAction_get
-+ * Description:
-+ *      get IGMP/MLD Checksum Error Action
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pAction     - Checksum error Action
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+extern rtk_api_ret_t rtk_igmp_checksumErrorAction_get(rtk_igmp_checksumErrorAction_t *pAction);
-+
-+/* Function Name:
-+ *      rtk_igmp_leaveTimer_set
-+ * Description:
-+ *      set IGMP/MLD Leave timer
-+ * Input:
-+ *      timer       - Leave timer
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+extern rtk_api_ret_t rtk_igmp_leaveTimer_set(rtk_uint32 timer);
-+
-+/* Function Name:
-+ *      rtk_igmp_leaveTimer_get
-+ * Description:
-+ *      get IGMP/MLD Leave timer
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pTimer      - Leave Timer.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+extern rtk_api_ret_t rtk_igmp_leaveTimer_get(rtk_uint32 *pTimer);
-+
-+/* Function Name:
-+ *      rtk_igmp_queryInterval_set
-+ * Description:
-+ *      set IGMP/MLD Query Interval
-+ * Input:
-+ *      interval     - Query Interval
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+extern rtk_api_ret_t rtk_igmp_queryInterval_set(rtk_uint32 interval);
-+
-+/* Function Name:
-+ *      rtk_igmp_queryInterval_get
-+ * Description:
-+ *      get IGMP/MLD Query Interval
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pInterval   - Query Interval
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+extern rtk_api_ret_t rtk_igmp_queryInterval_get(rtk_uint32 *pInterval);
-+
-+/* Function Name:
-+ *      rtk_igmp_robustness_set
-+ * Description:
-+ *      set IGMP/MLD Robustness value
-+ * Input:
-+ *      robustness     - Robustness value
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+extern rtk_api_ret_t rtk_igmp_robustness_set(rtk_uint32 robustness);
-+
-+/* Function Name:
-+ *      rtk_igmp_robustness_get
-+ * Description:
-+ *      get IGMP/MLD Robustness value
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pRobustness     - Robustness value.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ */
-+extern rtk_api_ret_t rtk_igmp_robustness_get(rtk_uint32 *pRobustness);
-+
-+/* Function Name:
-+ *      rtk_igmp_dynamicRouterRortAllow_set
-+ * Description:
-+ *      Configure dynamic router port allow option
-+ * Input:
-+ *      pPortmask    - Dynamic Port allow mask
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_MASK       - Error parameter
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_igmp_dynamicRouterPortAllow_set(rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_igmp_dynamicRouterRortAllow_get
-+ * Description:
-+ *      Get dynamic router port allow option
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pPortmask    - Dynamic Port allow mask
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_MASK       - Error parameter
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_igmp_dynamicRouterPortAllow_get(rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_igmp_dynamicRouterPort_get
-+ * Description:
-+ *      Get dynamic router port
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pDynamicRouterPort    - Dynamic Router Port
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_PORT_MASK       - Error parameter
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_igmp_dynamicRouterPort_get(rtk_igmp_dynamicRouterPort_t *pDynamicRouterPort);
-+
-+/* Function Name:
-+ *      rtk_igmp_suppressionEnable_set
-+ * Description:
-+ *      Configure IGMPv1/v2 & MLDv1 Report/Leave/Done suppression
-+ * Input:
-+ *      reportSuppression   - Report suppression
-+ *      leaveSuppression    - Leave suppression
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_igmp_suppressionEnable_set(rtk_enable_t reportSuppression, rtk_enable_t leaveSuppression);
-+
-+/* Function Name:
-+ *      rtk_igmp_suppressionEnable_get
-+ * Description:
-+ *      Get IGMPv1/v2 & MLDv1 Report/Leave/Done suppression
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pReportSuppression  - Report suppression
-+ *      pLeaveSuppression   - Leave suppression
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_igmp_suppressionEnable_get(rtk_enable_t *pReportSuppression, rtk_enable_t *pLeaveSuppression);
-+
-+/* Function Name:
-+ *      rtk_igmp_portRxPktEnable_set
-+ * Description:
-+ *      Configure IGMP/MLD RX Packet configuration
-+ * Input:
-+ *      port       - Port ID
-+ *      pRxCfg     - RX Packet Configuration
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_igmp_portRxPktEnable_set(rtk_port_t port, rtk_igmp_rxPktEnable_t *pRxCfg);
-+
-+/* Function Name:
-+ *      rtk_igmp_portRxPktEnable_get
-+ * Description:
-+ *      Get IGMP/MLD RX Packet configuration
-+ * Input:
-+ *      port       - Port ID
-+ *      pRxCfg     - RX Packet Configuration
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_igmp_portRxPktEnable_get(rtk_port_t port, rtk_igmp_rxPktEnable_t *pRxCfg);
-+
-+/* Function Name:
-+ *      rtk_igmp_groupInfo_get
-+ * Description:
-+ *      Get IGMP/MLD Group database
-+ * Input:
-+ *      indes       - Index (0~255)
-+ * Output:
-+ *      pGroup      - Group database information.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_igmp_groupInfo_get(rtk_uint32 index, rtk_igmp_groupInfo_t *pGroup);
-+
-+/* Function Name:
-+ *      rtk_igmp_ReportLeaveFwdAction_set
-+ * Description:
-+ *      Set Report Leave packet forwarding action
-+ * Input:
-+ *      action      - Action
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_igmp_ReportLeaveFwdAction_set(rtk_igmp_ReportLeaveFwdAct_t action);
-+
-+/* Function Name:
-+ *      rtk_igmp_ReportLeaveFwdAction_get
-+ * Description:
-+ *      Get Report Leave packet forwarding action
-+ * Input:
-+ *      action      - Action
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_NULL_POINTER    - Null Pointer
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_igmp_ReportLeaveFwdAction_get(rtk_igmp_ReportLeaveFwdAct_t *pAction);
-+
-+/* Function Name:
-+ *      rtk_igmp_dropLeaveZeroEnable_set
-+ * Description:
-+ *      Set the function of droppping Leave packet with group IP = 0.0.0.0
-+ * Input:
-+ *      enabled      - Action 1: drop, 0:pass
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_igmp_dropLeaveZeroEnable_set(rtk_enable_t enabled);
-+
-+/* Function Name:
-+ *      rtk_igmp_dropLeaveZeroEnable_get
-+ * Description:
-+ *      Get the function of droppping Leave packet with group IP = 0.0.0.0
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnabled.   - Action 1: drop, 0:pass
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_NULL_POINTER    - Null Pointer
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_igmp_dropLeaveZeroEnable_get(rtk_enable_t *pEnabled);
-+
-+/* Function Name:
-+ *      rtk_igmp_bypassGroupRange_set
-+ * Description:
-+ *      Set Bypass group
-+ * Input:
-+ *      group       - bypassed group
-+ *      enabled     - enabled 1: Bypassed, 0: not bypass
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_igmp_bypassGroupRange_set(rtk_igmp_bypassGroup_t group, rtk_enable_t enabled);
-+
-+/* Function Name:
-+ *      rtk_igmp_bypassGroupRange_get
-+ * Description:
-+ *      get Bypass group
-+ * Input:
-+ *      group       - bypassed group
-+ * Output:
-+ *      pEnable     - enabled 1: Bypassed, 0: not bypass
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error Input
-+ *      RT_ERR_NULL_POINTER    - Null Pointer
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_igmp_bypassGroupRange_get(rtk_igmp_bypassGroup_t group, rtk_enable_t *pEnable);
-+
-+#endif /* __RTK_API_IGMP_H__ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/interrupt.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/interrupt.h
-new file mode 100644
-index 0000000000..f2689ebc70
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/interrupt.h
-@@ -0,0 +1,254 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes Interrupt module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_INTERRUPT_H__
-+#define __RTK_API_INTERRUPT_H__
-+
-+
-+/*
-+ * Data Type Declaration
-+ */
-+#define RTK_MAX_NUM_OF_INTERRUPT_TYPE               1
-+
-+
-+typedef struct  rtk_int_status_s
-+{
-+    rtk_uint16 value[RTK_MAX_NUM_OF_INTERRUPT_TYPE];
-+} rtk_int_status_t;
-+
-+typedef struct rtk_int_info_s
-+{
-+    rtk_portmask_t  portMask;
-+    rtk_uint32      meterMask;
-+    rtk_uint32      systemLearnOver;
-+}rtk_int_info_t;
-+
-+typedef enum rtk_int_type_e
-+{
-+    INT_TYPE_LINK_STATUS = 0,
-+    INT_TYPE_METER_EXCEED,
-+    INT_TYPE_LEARN_LIMIT,
-+    INT_TYPE_LINK_SPEED,
-+    INT_TYPE_CONGEST,
-+    INT_TYPE_GREEN_FEATURE,
-+    INT_TYPE_LOOP_DETECT,
-+    INT_TYPE_8051,
-+    INT_TYPE_CABLE_DIAG,
-+    INT_TYPE_ACL,
-+    INT_TYPE_RESERVED, /* Unused */
-+    INT_TYPE_SLIENT,
-+    INT_TYPE_END
-+}rtk_int_type_t;
-+
-+typedef enum rtk_int_advType_e
-+{
-+    ADV_L2_LEARN_PORT_MASK = 0,
-+    ADV_SPEED_CHANGE_PORT_MASK,
-+    ADV_SPECIAL_CONGESTION_PORT_MASK,
-+    ADV_PORT_LINKDOWN_PORT_MASK,
-+    ADV_PORT_LINKUP_PORT_MASK,
-+    ADV_METER_EXCEED_MASK,
-+    ADV_RLDP_LOOPED,
-+    ADV_RLDP_RELEASED,
-+    ADV_END,
-+} rtk_int_advType_t;
-+
-+typedef enum rtk_int_polarity_e
-+{
-+    INT_POLAR_HIGH = 0,
-+    INT_POLAR_LOW,
-+    INT_POLAR_END
-+} rtk_int_polarity_t;
-+
-+/* Function Name:
-+ *      rtk_int_polarity_set
-+ * Description:
-+ *      Set interrupt polarity configuration.
-+ * Input:
-+ *      type - Interruptpolarity type.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can set interrupt polarity configuration.
-+ */
-+extern rtk_api_ret_t rtk_int_polarity_set(rtk_int_polarity_t type);
-+
-+/* Function Name:
-+ *      rtk_int_polarity_get
-+ * Description:
-+ *      Get interrupt polarity configuration.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pType - Interruptpolarity type.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      The API can get interrupt polarity configuration.
-+ */
-+extern rtk_api_ret_t rtk_int_polarity_get(rtk_int_polarity_t *pType);
-+
-+/* Function Name:
-+ *      rtk_int_control_set
-+ * Description:
-+ *      Set interrupt trigger status configuration.
-+ * Input:
-+ *      type - Interrupt type.
-+ *      enable - Interrupt status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      The API can set interrupt status configuration.
-+ *      The interrupt trigger status is shown in the following:
-+ *      - INT_TYPE_LINK_STATUS
-+ *      - INT_TYPE_METER_EXCEED
-+ *      - INT_TYPE_LEARN_LIMIT
-+ *      - INT_TYPE_LINK_SPEED
-+ *      - INT_TYPE_CONGEST
-+ *      - INT_TYPE_GREEN_FEATURE
-+ *      - INT_TYPE_LOOP_DETECT
-+ *      - INT_TYPE_8051,
-+ *      - INT_TYPE_CABLE_DIAG,
-+ *      - INT_TYPE_ACL,
-+ *      - INT_TYPE_SLIENT
-+ */
-+extern rtk_api_ret_t rtk_int_control_set(rtk_int_type_t type, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_int_control_get
-+ * Description:
-+ *      Get interrupt trigger status configuration.
-+ * Input:
-+ *      type - Interrupt type.
-+ * Output:
-+ *      pEnable - Interrupt status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get interrupt status configuration.
-+ *      The interrupt trigger status is shown in the following:
-+ *      - INT_TYPE_LINK_STATUS
-+ *      - INT_TYPE_METER_EXCEED
-+ *      - INT_TYPE_LEARN_LIMIT
-+ *      - INT_TYPE_LINK_SPEED
-+ *      - INT_TYPE_CONGEST
-+ *      - INT_TYPE_GREEN_FEATURE
-+ *      - INT_TYPE_LOOP_DETECT
-+ *      - INT_TYPE_8051,
-+ *      - INT_TYPE_CABLE_DIAG,
-+ *      - INT_TYPE_ACL,
-+ *      - INT_TYPE_SLIENT
-+ */
-+extern rtk_api_ret_t rtk_int_control_get(rtk_int_type_t type, rtk_enable_t* pEnable);
-+
-+/* Function Name:
-+ *      rtk_int_status_set
-+ * Description:
-+ *      Set interrupt trigger status to clean.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pStatusMask - Interrupt status bit mask.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT - Invalid input parameters.
-+ * Note:
-+ *      The API can clean interrupt trigger status when interrupt happened.
-+ *      The interrupt trigger status is shown in the following:
-+ *      - INT_TYPE_LINK_STATUS    (value[0] (Bit0))
-+ *      - INT_TYPE_METER_EXCEED   (value[0] (Bit1))
-+ *      - INT_TYPE_LEARN_LIMIT    (value[0] (Bit2))
-+ *      - INT_TYPE_LINK_SPEED     (value[0] (Bit3))
-+ *      - INT_TYPE_CONGEST        (value[0] (Bit4))
-+ *      - INT_TYPE_GREEN_FEATURE  (value[0] (Bit5))
-+ *      - INT_TYPE_LOOP_DETECT    (value[0] (Bit6))
-+ *      - INT_TYPE_8051           (value[0] (Bit7))
-+ *      - INT_TYPE_CABLE_DIAG     (value[0] (Bit8))
-+ *      - INT_TYPE_ACL            (value[0] (Bit9))
-+ *      - INT_TYPE_SLIENT         (value[0] (Bit11))
-+ *      The status will be cleared after execute this API.
-+ */
-+extern rtk_api_ret_t rtk_int_status_set(rtk_int_status_t *pStatusMask);
-+
-+/* Function Name:
-+ *      rtk_int_status_get
-+ * Description:
-+ *      Get interrupt trigger status.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pStatusMask - Interrupt status bit mask.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get interrupt trigger status when interrupt happened.
-+ *      The interrupt trigger status is shown in the following:
-+ *      - INT_TYPE_LINK_STATUS    (value[0] (Bit0))
-+ *      - INT_TYPE_METER_EXCEED   (value[0] (Bit1))
-+ *      - INT_TYPE_LEARN_LIMIT    (value[0] (Bit2))
-+ *      - INT_TYPE_LINK_SPEED     (value[0] (Bit3))
-+ *      - INT_TYPE_CONGEST        (value[0] (Bit4))
-+ *      - INT_TYPE_GREEN_FEATURE  (value[0] (Bit5))
-+ *      - INT_TYPE_LOOP_DETECT    (value[0] (Bit6))
-+ *      - INT_TYPE_8051           (value[0] (Bit7))
-+ *      - INT_TYPE_CABLE_DIAG     (value[0] (Bit8))
-+ *      - INT_TYPE_ACL            (value[0] (Bit9))
-+ *      - INT_TYPE_SLIENT         (value[0] (Bit11))
-+ *
-+ */
-+extern rtk_api_ret_t rtk_int_status_get(rtk_int_status_t* pStatusMask);
-+
-+/* Function Name:
-+ *      rtk_int_advanceInfo_get
-+ * Description:
-+ *      Get interrupt advanced information.
-+ * Input:
-+ *      adv_type - Advanced interrupt type.
-+ * Output:
-+ *      info - Information per type.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can get advanced information when interrupt happened.
-+ *      The status will be cleared after execute this API.
-+ */
-+extern rtk_api_ret_t rtk_int_advanceInfo_get(rtk_int_advType_t adv_type, rtk_int_info_t* info);
-+
-+
-+#endif /* __RTK_API_INTERRUPT_H__ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/l2.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/l2.h
-new file mode 100644
-index 0000000000..e0ccdbe3d7
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/l2.h
-@@ -0,0 +1,1181 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes L2 module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_L2_H__
-+#define __RTK_API_L2_H__
-+
-+
-+/*
-+ * Data Type Declaration
-+ */
-+#define RTK_MAX_NUM_OF_LEARN_LIMIT                  (rtk_switch_maxLutAddrNumber_get())
-+
-+#define RTK_MAC_ADDR_LEN                            6
-+#define RTK_MAX_LUT_ADDRESS                         (RTK_MAX_NUM_OF_LEARN_LIMIT)
-+#define RTK_MAX_LUT_ADDR_ID                         (RTK_MAX_LUT_ADDRESS - 1)
-+
-+typedef rtk_uint32 rtk_l2_age_time_t;
-+
-+typedef enum rtk_l2_flood_type_e
-+{
-+    FLOOD_UNKNOWNDA = 0,
-+    FLOOD_UNKNOWNMC,
-+    FLOOD_BC,
-+    FLOOD_END
-+} rtk_l2_flood_type_t;
-+
-+typedef rtk_uint32 rtk_l2_flushItem_t;
-+
-+typedef enum rtk_l2_flushType_e
-+{
-+    FLUSH_TYPE_BY_PORT = 0,       /* physical port       */
-+    FLUSH_TYPE_BY_PORT_VID,       /* physical port + VID */
-+    FLUSH_TYPE_BY_PORT_FID,       /* physical port + FID */
-+    FLUSH_TYPE_END
-+} rtk_l2_flushType_t;
-+
-+typedef struct rtk_l2_flushCfg_s
-+{
-+    rtk_enable_t    flushByVid;
-+    rtk_vlan_t      vid;
-+    rtk_enable_t    flushByFid;
-+    rtk_uint32      fid;
-+    rtk_enable_t    flushByPort;
-+    rtk_port_t      port;
-+    rtk_enable_t    flushByMac;
-+    rtk_mac_t       ucastAddr;
-+    rtk_enable_t    flushStaticAddr;
-+    rtk_enable_t    flushAddrOnAllPorts; /* this is used when flushByVid */
-+} rtk_l2_flushCfg_t;
-+
-+typedef enum rtk_l2_read_method_e{
-+
-+    READMETHOD_MAC = 0,
-+    READMETHOD_ADDRESS,
-+    READMETHOD_NEXT_ADDRESS,
-+    READMETHOD_NEXT_L2UC,
-+    READMETHOD_NEXT_L2MC,
-+    READMETHOD_NEXT_L3MC,
-+    READMETHOD_NEXT_L2L3MC,
-+    READMETHOD_NEXT_L2UCSPA,
-+    READMETHOD_END
-+}rtk_l2_read_method_t;
-+
-+/* l2 limit learning count action */
-+typedef enum rtk_l2_limitLearnCntAction_e
-+{
-+    LIMIT_LEARN_CNT_ACTION_DROP = 0,
-+    LIMIT_LEARN_CNT_ACTION_FORWARD,
-+    LIMIT_LEARN_CNT_ACTION_TO_CPU,
-+    LIMIT_LEARN_CNT_ACTION_END
-+} rtk_l2_limitLearnCntAction_t;
-+
-+typedef enum rtk_l2_ipmc_lookup_type_e
-+{
-+    LOOKUP_MAC = 0,
-+    LOOKUP_IP,
-+    LOOKUP_IP_VID,
-+    LOOKUP_END
-+} rtk_l2_ipmc_lookup_type_t;
-+
-+/* l2 address table - unicast data structure */
-+typedef struct rtk_l2_ucastAddr_s
-+{
-+    rtk_mac_t       mac;
-+    rtk_uint32      ivl;
-+    rtk_uint32      cvid;
-+    rtk_uint32      fid;
-+    rtk_uint32      efid;
-+    rtk_uint32      port;
-+    rtk_uint32      sa_block;
-+    rtk_uint32      da_block;
-+    rtk_uint32      auth;
-+    rtk_uint32      is_static;
-+    rtk_uint32      priority;
-+    rtk_uint32      sa_pri_en;
-+    rtk_uint32      fwd_pri_en;
-+    rtk_uint32      address;
-+}rtk_l2_ucastAddr_t;
-+
-+/* l2 address table - multicast data structure */
-+typedef struct rtk_l2_mcastAddr_s
-+{
-+    rtk_uint32      vid;
-+    rtk_mac_t       mac;
-+    rtk_uint32      fid;
-+    rtk_portmask_t  portmask;
-+    rtk_uint32      ivl;
-+    rtk_uint32      priority;
-+    rtk_uint32      fwd_pri_en;
-+    rtk_uint32      igmp_asic;
-+    rtk_uint32      igmp_index;
-+    rtk_uint32      address;
-+}rtk_l2_mcastAddr_t;
-+
-+/* l2 address table - ip multicast data structure */
-+typedef struct rtk_l2_ipMcastAddr_s
-+{
-+    ipaddr_t        dip;
-+    ipaddr_t        sip;
-+    rtk_portmask_t  portmask;
-+    rtk_uint32      priority;
-+    rtk_uint32      fwd_pri_en;
-+    rtk_uint32      igmp_asic;
-+    rtk_uint32      igmp_index;
-+    rtk_uint32      address;
-+}rtk_l2_ipMcastAddr_t;
-+
-+/* l2 address table - ip VID multicast data structure */
-+typedef struct rtk_l2_ipVidMcastAddr_s
-+{
-+    ipaddr_t        dip;
-+    ipaddr_t        sip;
-+    rtk_uint32      vid;
-+    rtk_portmask_t  portmask;
-+    rtk_uint32      address;
-+}rtk_l2_ipVidMcastAddr_t;
-+
-+typedef struct rtk_l2_addr_table_s
-+{
-+    rtk_uint32  index;
-+    ipaddr_t    sip;
-+    ipaddr_t    dip;
-+    rtk_mac_t   mac;
-+    rtk_uint32  sa_block;
-+    rtk_uint32  auth;
-+    rtk_portmask_t  portmask;
-+    rtk_uint32  age;
-+    rtk_uint32  ivl;
-+    rtk_uint32  cvid;
-+    rtk_uint32  fid;
-+    rtk_uint32  is_ipmul;
-+    rtk_uint32  is_static;
-+    rtk_uint32  is_ipvidmul;
-+    rtk_uint32  l3_vid;
-+}rtk_l2_addr_table_t;
-+
-+typedef enum rtk_l2_clearStatus_e
-+{
-+    L2_CLEAR_STATE_FINISH = 0,
-+    L2_CLEAR_STATE_BUSY,
-+    L2_CLEAR_STATE_END
-+}rtk_l2_clearStatus_t;
-+
-+/* Function Name:
-+ *      rtk_l2_init
-+ * Description:
-+ *      Initialize l2 module of the specified device.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK          - OK
-+ *      RT_ERR_FAILED      - Failed
-+ *      RT_ERR_SMI         - SMI access error
-+ * Note:
-+ *      Initialize l2 module before calling any l2 APIs.
-+ */
-+extern rtk_api_ret_t rtk_l2_init(void);
-+
-+/* Function Name:
-+ *      rtk_l2_addr_add
-+ * Description:
-+ *      Add LUT unicast entry.
-+ * Input:
-+ *      pMac - 6 bytes unicast(I/G bit is 0) mac address to be written into LUT.
-+ *      pL2_data - Unicast entry parameter
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_MAC              - Invalid MAC address.
-+ *      RT_ERR_L2_FID           - Invalid FID .
-+ *      RT_ERR_L2_INDEXTBL_FULL - hashed index is full of entries.
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ * Note:
-+ *      If the unicast mac address already existed in LUT, it will udpate the status of the entry.
-+ *      Otherwise, it will find an empty or asic auto learned entry to write. If all the entries
-+ *      with the same hash value can't be replaced, ASIC will return a RT_ERR_L2_INDEXTBL_FULL error.
-+ */
-+extern rtk_api_ret_t rtk_l2_addr_add(rtk_mac_t *pMac, rtk_l2_ucastAddr_t *pL2_data);
-+
-+/* Function Name:
-+ *      rtk_l2_addr_get
-+ * Description:
-+ *      Get LUT unicast entry.
-+ * Input:
-+ *      pMac    - 6 bytes unicast(I/G bit is 0) mac address to be written into LUT.
-+ * Output:
-+ *      pL2_data - Unicast entry parameter
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_MAC                  - Invalid MAC address.
-+ *      RT_ERR_L2_FID               - Invalid FID .
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      If the unicast mac address existed in LUT, it will return the port and fid where
-+ *      the mac is learned. Otherwise, it will return a RT_ERR_L2_ENTRY_NOTFOUND error.
-+ */
-+extern rtk_api_ret_t rtk_l2_addr_get(rtk_mac_t *pMac, rtk_l2_ucastAddr_t *pL2_data);
-+
-+/* Function Name:
-+ *      rtk_l2_addr_next_get
-+ * Description:
-+ *      Get Next LUT unicast entry.
-+ * Input:
-+ *      read_method     - The reading method.
-+ *      port            - The port number if the read_metohd is READMETHOD_NEXT_L2UCSPA
-+ *      pAddress        - The Address ID
-+ * Output:
-+ *      pL2_data - Unicast entry parameter
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_MAC                  - Invalid MAC address.
-+ *      RT_ERR_L2_FID               - Invalid FID .
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      Get the next unicast entry after the current entry pointed by pAddress.
-+ *      The address of next entry is returned by pAddress. User can use (address + 1)
-+ *      as pAddress to call this API again for dumping all entries is LUT.
-+ */
-+extern rtk_api_ret_t rtk_l2_addr_next_get(rtk_l2_read_method_t read_method, rtk_port_t port, rtk_uint32 *pAddress, rtk_l2_ucastAddr_t *pL2_data);
-+
-+/* Function Name:
-+ *      rtk_l2_addr_del
-+ * Description:
-+ *      Delete LUT unicast entry.
-+ * Input:
-+ *      pMac - 6 bytes unicast(I/G bit is 0) mac address to be written into LUT.
-+ *      fid - Filtering database
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_MAC                  - Invalid MAC address.
-+ *      RT_ERR_L2_FID               - Invalid FID .
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      If the mac has existed in the LUT, it will be deleted. Otherwise, it will return RT_ERR_L2_ENTRY_NOTFOUND.
-+ */
-+extern rtk_api_ret_t rtk_l2_addr_del(rtk_mac_t *pMac, rtk_l2_ucastAddr_t *pL2_data);
-+
-+/* Function Name:
-+ *      rtk_l2_mcastAddr_add
-+ * Description:
-+ *      Add LUT multicast entry.
-+ * Input:
-+ *      pMcastAddr  - L2 multicast entry structure
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_MAC              - Invalid MAC address.
-+ *      RT_ERR_L2_FID           - Invalid FID .
-+ *      RT_ERR_L2_VID           - Invalid VID .
-+ *      RT_ERR_L2_INDEXTBL_FULL - hashed index is full of entries.
-+ *      RT_ERR_PORT_MASK        - Invalid portmask.
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ * Note:
-+ *      If the multicast mac address already existed in the LUT, it will udpate the
-+ *      port mask of the entry. Otherwise, it will find an empty or asic auto learned
-+ *      entry to write. If all the entries with the same hash value can't be replaced,
-+ *      ASIC will return a RT_ERR_L2_INDEXTBL_FULL error.
-+ */
-+extern rtk_api_ret_t rtk_l2_mcastAddr_add(rtk_l2_mcastAddr_t *pMcastAddr);
-+
-+/* Function Name:
-+ *      rtk_l2_mcastAddr_get
-+ * Description:
-+ *      Get LUT multicast entry.
-+ * Input:
-+ *      pMcastAddr  - L2 multicast entry structure
-+ * Output:
-+ *      pMcastAddr  - L2 multicast entry structure
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_MAC                  - Invalid MAC address.
-+ *      RT_ERR_L2_FID               - Invalid FID .
-+ *      RT_ERR_L2_VID               - Invalid VID .
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      If the multicast mac address existed in the LUT, it will return the port where
-+ *      the mac is learned. Otherwise, it will return a RT_ERR_L2_ENTRY_NOTFOUND error.
-+ */
-+extern rtk_api_ret_t rtk_l2_mcastAddr_get(rtk_l2_mcastAddr_t *pMcastAddr);
-+
-+/* Function Name:
-+ *      rtk_l2_mcastAddr_next_get
-+ * Description:
-+ *      Get Next L2 Multicast entry.
-+ * Input:
-+ *      pAddress        - The Address ID
-+ * Output:
-+ *      pMcastAddr  - L2 multicast entry structure
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      Get the next L2 multicast entry after the current entry pointed by pAddress.
-+ *      The address of next entry is returned by pAddress. User can use (address + 1)
-+ *      as pAddress to call this API again for dumping all multicast entries is LUT.
-+ */
-+extern rtk_api_ret_t rtk_l2_mcastAddr_next_get(rtk_uint32 *pAddress, rtk_l2_mcastAddr_t *pMcastAddr);
-+
-+/* Function Name:
-+ *      rtk_l2_mcastAddr_del
-+ * Description:
-+ *      Delete LUT multicast entry.
-+ * Input:
-+ *      pMcastAddr  - L2 multicast entry structure
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_MAC                  - Invalid MAC address.
-+ *      RT_ERR_L2_FID               - Invalid FID .
-+ *      RT_ERR_L2_VID               - Invalid VID .
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      If the mac has existed in the LUT, it will be deleted. Otherwise, it will return RT_ERR_L2_ENTRY_NOTFOUND.
-+ */
-+extern rtk_api_ret_t rtk_l2_mcastAddr_del(rtk_l2_mcastAddr_t *pMcastAddr);
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastAddr_add
-+ * Description:
-+ *      Add Lut IP multicast entry
-+ * Input:
-+ *      pIpMcastAddr    - IP Multicast entry
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_L2_INDEXTBL_FULL - hashed index is full of entries.
-+ *      RT_ERR_PORT_MASK        - Invalid portmask.
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ * Note:
-+ *      System supports L2 entry with IP multicast DIP/SIP to forward IP multicasting frame as user
-+ *      desired. If this function is enabled, then system will be looked up L2 IP multicast entry to
-+ *      forward IP multicast frame directly without flooding.
-+ */
-+extern rtk_api_ret_t rtk_l2_ipMcastAddr_add(rtk_l2_ipMcastAddr_t *pIpMcastAddr);
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastAddr_get
-+ * Description:
-+ *      Get LUT IP multicast entry.
-+ * Input:
-+ *      pIpMcastAddr    - IP Multicast entry
-+ * Output:
-+ *      pIpMcastAddr    - IP Multicast entry
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      The API can get Lut table of IP multicast entry.
-+ */
-+extern rtk_api_ret_t rtk_l2_ipMcastAddr_get(rtk_l2_ipMcastAddr_t *pIpMcastAddr);
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastAddr_next_get
-+ * Description:
-+ *      Get Next IP Multicast entry.
-+ * Input:
-+ *      pAddress        - The Address ID
-+ * Output:
-+ *      pIpMcastAddr    - IP Multicast entry
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      Get the next IP multicast entry after the current entry pointed by pAddress.
-+ *      The address of next entry is returned by pAddress. User can use (address + 1)
-+ *      as pAddress to call this API again for dumping all IP multicast entries is LUT.
-+ */
-+extern rtk_api_ret_t rtk_l2_ipMcastAddr_next_get(rtk_uint32 *pAddress, rtk_l2_ipMcastAddr_t *pIpMcastAddr);
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastAddr_del
-+ * Description:
-+ *      Delete a ip multicast address entry from the specified device.
-+ * Input:
-+ *      pIpMcastAddr    - IP Multicast entry
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      The API can delete a IP multicast address entry from the specified device.
-+ */
-+extern rtk_api_ret_t rtk_l2_ipMcastAddr_del(rtk_l2_ipMcastAddr_t *pIpMcastAddr);
-+
-+/* Function Name:
-+ *      rtk_l2_ipVidMcastAddr_add
-+ * Description:
-+ *      Add Lut IP multicast+VID entry
-+ * Input:
-+ *      pIpVidMcastAddr - IP & VID multicast Entry
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_L2_INDEXTBL_FULL - hashed index is full of entries.
-+ *      RT_ERR_PORT_MASK        - Invalid portmask.
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_l2_ipVidMcastAddr_add(rtk_l2_ipVidMcastAddr_t *pIpVidMcastAddr);
-+
-+/* Function Name:
-+ *      rtk_l2_ipVidMcastAddr_get
-+ * Description:
-+ *      Get LUT IP multicast+VID entry.
-+ * Input:
-+ *      pIpVidMcastAddr - IP & VID multicast Entry
-+ * Output:
-+ *      pIpVidMcastAddr - IP & VID multicast Entry
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_l2_ipVidMcastAddr_get(rtk_l2_ipVidMcastAddr_t *pIpVidMcastAddr);
-+
-+/* Function Name:
-+ *      rtk_l2_ipVidMcastAddr_next_get
-+ * Description:
-+ *      Get Next IP Multicast+VID entry.
-+ * Input:
-+ *      pAddress        - The Address ID
-+ * Output:
-+ *      pIpVidMcastAddr - IP & VID multicast Entry
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      Get the next IP multicast entry after the current entry pointed by pAddress.
-+ *      The address of next entry is returned by pAddress. User can use (address + 1)
-+ *      as pAddress to call this API again for dumping all IP multicast entries is LUT.
-+ */
-+extern rtk_api_ret_t rtk_l2_ipVidMcastAddr_next_get(rtk_uint32 *pAddress, rtk_l2_ipVidMcastAddr_t *pIpVidMcastAddr);
-+
-+/* Function Name:
-+ *      rtk_l2_ipVidMcastAddr_del
-+ * Description:
-+ *      Delete a ip multicast+VID address entry from the specified device.
-+ * Input:
-+ *      pIpVidMcastAddr - IP & VID multicast Entry
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_l2_ipVidMcastAddr_del(rtk_l2_ipVidMcastAddr_t *pIpVidMcastAddr);
-+
-+/* Function Name:
-+ *      rtk_l2_ucastAddr_flush
-+ * Description:
-+ *      Flush L2 mac address by type in the specified device (both dynamic and static).
-+ * Input:
-+ *      pConfig - flush configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_VLAN_VID     - Invalid VID parameter.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      flushByVid          - 1: Flush by VID, 0: Don't flush by VID
-+ *      vid                 - VID (0 ~ 4095)
-+ *      flushByFid          - 1: Flush by FID, 0: Don't flush by FID
-+ *      fid                 - FID (0 ~ 15)
-+ *      flushByPort         - 1: Flush by Port, 0: Don't flush by Port
-+ *      port                - Port ID
-+ *      flushByMac          - Not Supported
-+ *      ucastAddr           - Not Supported
-+ *      flushStaticAddr     - 1: Flush both Static and Dynamic entries, 0: Flush only Dynamic entries
-+ *      flushAddrOnAllPorts - 1: Flush VID-matched entries at all ports, 0: Flush VID-matched entries per port.
-+ */
-+extern rtk_api_ret_t rtk_l2_ucastAddr_flush(rtk_l2_flushCfg_t *pConfig);
-+
-+/* Function Name:
-+ *      rtk_l2_table_clear
-+ * Description:
-+ *      Flush all static & dynamic entries in LUT.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_l2_table_clear(void);
-+
-+/* Function Name:
-+ *      rtk_l2_table_clearStatus_get
-+ * Description:
-+ *      Get table clear status
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pStatus - Clear status, 1:Busy, 0:finish
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_l2_table_clearStatus_get(rtk_l2_clearStatus_t *pStatus);
-+
-+/* Function Name:
-+ *      rtk_l2_flushLinkDownPortAddrEnable_set
-+ * Description:
-+ *      Set HW flush linkdown port mac configuration of the specified device.
-+ * Input:
-+ *      port - Port id.
-+ *      enable - link down flush status
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      The status of flush linkdown port address is as following:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+extern rtk_api_ret_t rtk_l2_flushLinkDownPortAddrEnable_set(rtk_port_t port, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_l2_flushLinkDownPortAddrEnable_get
-+ * Description:
-+ *      Get HW flush linkdown port mac configuration of the specified device.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - link down flush status
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The status of flush linkdown port address is as following:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+extern rtk_api_ret_t rtk_l2_flushLinkDownPortAddrEnable_get(rtk_port_t port, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_l2_agingEnable_set
-+ * Description:
-+ *      Set L2 LUT aging status per port setting.
-+ * Input:
-+ *      port    - Port id.
-+ *      enable  - Aging status
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      This API can be used to set L2 LUT aging status per port.
-+ */
-+extern rtk_api_ret_t rtk_l2_agingEnable_set(rtk_port_t port, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_l2_agingEnable_get
-+ * Description:
-+ *      Get L2 LUT aging status per port setting.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - Aging status
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API can be used to get L2 LUT aging function per port.
-+ */
-+extern rtk_api_ret_t rtk_l2_agingEnable_get(rtk_port_t port, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_l2_limitLearningCnt_set
-+ * Description:
-+ *      Set per-Port auto learning limit number
-+ * Input:
-+ *      port    - Port id.
-+ *      mac_cnt - Auto learning entries limit number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_LIMITED_L2ENTRY_NUM  - Invalid auto learning limit number
-+ * Note:
-+ *      The API can set per-port ASIC auto learning limit number from 0(disable learning)
-+ *      to 8k.
-+ */
-+extern rtk_api_ret_t rtk_l2_limitLearningCnt_set(rtk_port_t port, rtk_mac_cnt_t mac_cnt);
-+
-+/* Function Name:
-+ *      rtk_l2_limitLearningCnt_get
-+ * Description:
-+ *      Get per-Port auto learning limit number
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pMac_cnt - Auto learning entries limit number
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get per-port ASIC auto learning limit number.
-+ */
-+extern rtk_api_ret_t rtk_l2_limitLearningCnt_get(rtk_port_t port, rtk_mac_cnt_t *pMac_cnt);
-+
-+/* Function Name:
-+ *      rtk_l2_limitSystemLearningCnt_set
-+ * Description:
-+ *      Set System auto learning limit number
-+ * Input:
-+ *      mac_cnt - Auto learning entries limit number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_LIMITED_L2ENTRY_NUM  - Invalid auto learning limit number
-+ * Note:
-+ *      The API can set system ASIC auto learning limit number from 0(disable learning)
-+ *      to 2112.
-+ */
-+extern rtk_api_ret_t rtk_l2_limitSystemLearningCnt_set(rtk_mac_cnt_t mac_cnt);
-+
-+/* Function Name:
-+ *      rtk_l2_limitSystemLearningCnt_get
-+ * Description:
-+ *      Get System auto learning limit number
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pMac_cnt - Auto learning entries limit number
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get system ASIC auto learning limit number.
-+ */
-+extern rtk_api_ret_t rtk_l2_limitSystemLearningCnt_get(rtk_mac_cnt_t *pMac_cnt);
-+
-+/* Function Name:
-+ *      rtk_l2_limitLearningCntAction_set
-+ * Description:
-+ *      Configure auto learn over limit number action.
-+ * Input:
-+ *      port - Port id.
-+ *      action - Auto learning entries limit number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_NOT_ALLOWED  - Invalid learn over action
-+ * Note:
-+ *      The API can set SA unknown packet action while auto learn limit number is over
-+ *      The action symbol as following:
-+ *      - LIMIT_LEARN_CNT_ACTION_DROP,
-+ *      - LIMIT_LEARN_CNT_ACTION_FORWARD,
-+ *      - LIMIT_LEARN_CNT_ACTION_TO_CPU,
-+ */
-+extern rtk_api_ret_t rtk_l2_limitLearningCntAction_set(rtk_port_t port, rtk_l2_limitLearnCntAction_t action);
-+
-+/* Function Name:
-+ *      rtk_l2_limitLearningCntAction_get
-+ * Description:
-+ *      Get auto learn over limit number action.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pAction - Learn over action
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get SA unknown packet action while auto learn limit number is over
-+ *      The action symbol as following:
-+ *      - LIMIT_LEARN_CNT_ACTION_DROP,
-+ *      - LIMIT_LEARN_CNT_ACTION_FORWARD,
-+ *      - LIMIT_LEARN_CNT_ACTION_TO_CPU,
-+ */
-+extern rtk_api_ret_t rtk_l2_limitLearningCntAction_get(rtk_port_t port, rtk_l2_limitLearnCntAction_t *pAction);
-+
-+/* Function Name:
-+ *      rtk_l2_limitSystemLearningCntAction_set
-+ * Description:
-+ *      Configure system auto learn over limit number action.
-+ * Input:
-+ *      port - Port id.
-+ *      action - Auto learning entries limit number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_NOT_ALLOWED  - Invalid learn over action
-+ * Note:
-+ *      The API can set SA unknown packet action while auto learn limit number is over
-+ *      The action symbol as following:
-+ *      - LIMIT_LEARN_CNT_ACTION_DROP,
-+ *      - LIMIT_LEARN_CNT_ACTION_FORWARD,
-+ *      - LIMIT_LEARN_CNT_ACTION_TO_CPU,
-+ */
-+extern rtk_api_ret_t rtk_l2_limitSystemLearningCntAction_set(rtk_l2_limitLearnCntAction_t action);
-+
-+/* Function Name:
-+ *      rtk_l2_limitSystemLearningCntAction_get
-+ * Description:
-+ *      Get system auto learn over limit number action.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pAction - Learn over action
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get SA unknown packet action while auto learn limit number is over
-+ *      The action symbol as following:
-+ *      - LIMIT_LEARN_CNT_ACTION_DROP,
-+ *      - LIMIT_LEARN_CNT_ACTION_FORWARD,
-+ *      - LIMIT_LEARN_CNT_ACTION_TO_CPU,
-+ */
-+extern rtk_api_ret_t rtk_l2_limitSystemLearningCntAction_get(rtk_l2_limitLearnCntAction_t *pAction);
-+
-+/* Function Name:
-+ *      rtk_l2_limitSystemLearningCntPortMask_set
-+ * Description:
-+ *      Configure system auto learn portmask
-+ * Input:
-+ *      pPortmask - Port Mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid port mask.
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_l2_limitSystemLearningCntPortMask_set(rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_l2_limitSystemLearningCntPortMask_get
-+ * Description:
-+ *      get system auto learn portmask
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pPortmask - Port Mask
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NULL_POINTER - Null pointer.
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_l2_limitSystemLearningCntPortMask_get(rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_l2_learningCnt_get
-+ * Description:
-+ *      Get per-Port current auto learning number
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pMac_cnt - ASIC auto learning entries number
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get per-port ASIC auto learning number
-+ */
-+extern rtk_api_ret_t rtk_l2_learningCnt_get(rtk_port_t port, rtk_mac_cnt_t *pMac_cnt);
-+
-+/* Function Name:
-+ *      rtk_l2_floodPortMask_set
-+ * Description:
-+ *      Set flooding portmask
-+ * Input:
-+ *      type - flooding type.
-+ *      pFlood_portmask - flooding porkmask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid portmask.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can set the flooding mask.
-+ *      The flooding type is as following:
-+ *      - FLOOD_UNKNOWNDA
-+ *      - FLOOD_UNKNOWNMC
-+ *      - FLOOD_BC
-+ */
-+extern rtk_api_ret_t rtk_l2_floodPortMask_set(rtk_l2_flood_type_t floood_type, rtk_portmask_t *pFlood_portmask);
-+
-+/* Function Name:
-+ *      rtk_l2_floodPortMask_get
-+ * Description:
-+ *      Get flooding portmask
-+ * Input:
-+ *      type - flooding type.
-+ * Output:
-+ *      pFlood_portmask - flooding porkmask
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API can get the flooding mask.
-+ *      The flooding type is as following:
-+ *      - FLOOD_UNKNOWNDA
-+ *      - FLOOD_UNKNOWNMC
-+ *      - FLOOD_BC
-+ */
-+extern rtk_api_ret_t rtk_l2_floodPortMask_get(rtk_l2_flood_type_t floood_type, rtk_portmask_t *pFlood_portmask);
-+
-+/* Function Name:
-+ *      rtk_l2_localPktPermit_set
-+ * Description:
-+ *      Set permittion of frames if source port and destination port are the same.
-+ * Input:
-+ *      port - Port id.
-+ *      permit - permittion status
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_ENABLE       - Invalid permit value.
-+ * Note:
-+ *      This API is setted to permit frame if its source port is equal to destination port.
-+ */
-+extern rtk_api_ret_t rtk_l2_localPktPermit_set(rtk_port_t port, rtk_enable_t permit);
-+
-+/* Function Name:
-+ *      rtk_l2_localPktPermit_get
-+ * Description:
-+ *      Get permittion of frames if source port and destination port are the same.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pPermit - permittion status
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API is to get permittion status for frames if its source port is equal to destination port.
-+ */
-+extern rtk_api_ret_t rtk_l2_localPktPermit_get(rtk_port_t port, rtk_enable_t *pPermit);
-+
-+/* Function Name:
-+ *      rtk_l2_aging_set
-+ * Description:
-+ *      Set LUT agging out speed
-+ * Input:
-+ *      aging_time - Agging out time.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ * Note:
-+ *      The API can set LUT agging out period for each entry and the range is from 14s to 800s.
-+ */
-+extern rtk_api_ret_t rtk_l2_aging_set(rtk_l2_age_time_t aging_time);
-+
-+/* Function Name:
-+ *      rtk_l2_aging_get
-+ * Description:
-+ *      Get LUT agging out time
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnable - Aging status
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get LUT agging out period for each entry.
-+ */
-+extern rtk_api_ret_t rtk_l2_aging_get(rtk_l2_age_time_t *pAging_time);
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastAddrLookup_set
-+ * Description:
-+ *      Set Lut IP multicast lookup function
-+ * Input:
-+ *      type - Lookup type for IPMC packet.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK          - OK
-+ *      RT_ERR_FAILED      - Failed
-+ *      RT_ERR_SMI         - SMI access error
-+ * Note:
-+ *      This API can work with rtk_l2_ipMcastAddrLookupException_add.
-+ *      If users set the lookup type to DIP, the group in exception table
-+ *      will be lookup by DIP+SIP
-+ *      If users set the lookup type to DIP+SIP, the group in exception table
-+ *      will be lookup by only DIP
-+ */
-+extern rtk_api_ret_t rtk_l2_ipMcastAddrLookup_set(rtk_l2_ipmc_lookup_type_t type);
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastAddrLookup_get
-+ * Description:
-+ *      Get Lut IP multicast lookup function
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pType - Lookup type for IPMC packet.
-+ * Return:
-+ *      RT_ERR_OK          - OK
-+ *      RT_ERR_FAILED      - Failed
-+ *      RT_ERR_SMI         - SMI access error
-+ * Note:
-+ *      None.
-+ */
-+extern rtk_api_ret_t rtk_l2_ipMcastAddrLookup_get(rtk_l2_ipmc_lookup_type_t *pType);
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastForwardRouterPort_set
-+ * Description:
-+ *      Set IPMC packet forward to rounter port also or not
-+ * Input:
-+ *      enabled - 1: Inlcude router port, 0, exclude router port
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK          - OK
-+ *      RT_ERR_FAILED      - Failed
-+ *      RT_ERR_SMI         - SMI access error
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_l2_ipMcastForwardRouterPort_set(rtk_enable_t enabled);
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastForwardRouterPort_get
-+ * Description:
-+ *      Get IPMC packet forward to rounter port also or not
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pEnabled    - 1: Inlcude router port, 0, exclude router port
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_NULL_POINTER - Null pointer
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_l2_ipMcastForwardRouterPort_get(rtk_enable_t *pEnabled);
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastGroupEntry_add
-+ * Description:
-+ *      Add an IP Multicast entry to group table
-+ * Input:
-+ *      ip_addr     - IP address
-+ *      vid         - VLAN ID
-+ *      pPortmask   - portmask
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK          - OK
-+ *      RT_ERR_FAILED      - Failed
-+ *      RT_ERR_SMI         - SMI access error
-+ *      RT_ERR_TBL_FULL    - Table Full
-+ * Note:
-+ *      Add an entry to IP Multicast Group table.
-+ */
-+extern rtk_api_ret_t rtk_l2_ipMcastGroupEntry_add(ipaddr_t ip_addr, rtk_uint32 vid, rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastGroupEntry_del
-+ * Description:
-+ *      Delete an entry from IP Multicast group table
-+ * Input:
-+ *      ip_addr     - IP address
-+ *      vid         - VLAN ID
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK          - OK
-+ *      RT_ERR_FAILED      - Failed
-+ *      RT_ERR_SMI         - SMI access error
-+ *      RT_ERR_TBL_FULL    - Table Full
-+ * Note:
-+ *      Delete an entry from IP Multicast group table.
-+ */
-+extern rtk_api_ret_t rtk_l2_ipMcastGroupEntry_del(ipaddr_t ip_addr, rtk_uint32 vid);
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastGroupEntry_get
-+ * Description:
-+ *      get an entry from IP Multicast group table
-+ * Input:
-+ *      ip_addr     - IP address
-+ *      vid         - VLAN ID
-+ * Output:
-+ *      pPortmask   - member port mask
-+ * Return:
-+ *      RT_ERR_OK          - OK
-+ *      RT_ERR_FAILED      - Failed
-+ *      RT_ERR_SMI         - SMI access error
-+ *      RT_ERR_TBL_FULL    - Table Full
-+ * Note:
-+ *      Delete an entry from IP Multicast group table.
-+ */
-+extern rtk_api_ret_t rtk_l2_ipMcastGroupEntry_get(ipaddr_t ip_addr, rtk_uint32 vid, rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_l2_entry_get
-+ * Description:
-+ *      Get LUT unicast entry.
-+ * Input:
-+ *      pL2_entry - Index field in the structure.
-+ * Output:
-+ *      pL2_entry - other fields such as MAC, port, age...
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_L2_EMPTY_ENTRY   - Empty LUT entry.
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ * Note:
-+ *      This API is used to get address by index from 0~2111.
-+ */
-+extern rtk_api_ret_t rtk_l2_entry_get(rtk_l2_addr_table_t *pL2_entry);
-+
-+
-+#endif /* __RTK_API_L2_H__ */
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/leaky.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/leaky.h
-new file mode 100644
-index 0000000000..13ef60df83
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/leaky.h
-@@ -0,0 +1,371 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes Leaky module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_LEAKY_H__
-+#define __RTK_API_LEAKY_H__
-+
-+
-+typedef enum rtk_leaky_type_e
-+{
-+    LEAKY_BRG_GROUP = 0,
-+    LEAKY_FD_PAUSE,
-+    LEAKY_SP_MCAST,
-+    LEAKY_1X_PAE,
-+    LEAKY_UNDEF_BRG_04,
-+    LEAKY_UNDEF_BRG_05,
-+    LEAKY_UNDEF_BRG_06,
-+    LEAKY_UNDEF_BRG_07,
-+    LEAKY_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+    LEAKY_UNDEF_BRG_09,
-+    LEAKY_UNDEF_BRG_0A,
-+    LEAKY_UNDEF_BRG_0B,
-+    LEAKY_UNDEF_BRG_0C,
-+    LEAKY_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+    LEAKY_8021AB,
-+    LEAKY_UNDEF_BRG_0F,
-+    LEAKY_BRG_MNGEMENT,
-+    LEAKY_UNDEFINED_11,
-+    LEAKY_UNDEFINED_12,
-+    LEAKY_UNDEFINED_13,
-+    LEAKY_UNDEFINED_14,
-+    LEAKY_UNDEFINED_15,
-+    LEAKY_UNDEFINED_16,
-+    LEAKY_UNDEFINED_17,
-+    LEAKY_UNDEFINED_18,
-+    LEAKY_UNDEFINED_19,
-+    LEAKY_UNDEFINED_1A,
-+    LEAKY_UNDEFINED_1B,
-+    LEAKY_UNDEFINED_1C,
-+    LEAKY_UNDEFINED_1D,
-+    LEAKY_UNDEFINED_1E,
-+    LEAKY_UNDEFINED_1F,
-+    LEAKY_GMRP,
-+    LEAKY_GVRP,
-+    LEAKY_UNDEF_GARP_22,
-+    LEAKY_UNDEF_GARP_23,
-+    LEAKY_UNDEF_GARP_24,
-+    LEAKY_UNDEF_GARP_25,
-+    LEAKY_UNDEF_GARP_26,
-+    LEAKY_UNDEF_GARP_27,
-+    LEAKY_UNDEF_GARP_28,
-+    LEAKY_UNDEF_GARP_29,
-+    LEAKY_UNDEF_GARP_2A,
-+    LEAKY_UNDEF_GARP_2B,
-+    LEAKY_UNDEF_GARP_2C,
-+    LEAKY_UNDEF_GARP_2D,
-+    LEAKY_UNDEF_GARP_2E,
-+    LEAKY_UNDEF_GARP_2F,
-+    LEAKY_IGMP,
-+    LEAKY_IPMULTICAST,
-+    LEAKY_CDP,
-+    LEAKY_CSSTP,
-+    LEAKY_LLDP,
-+    LEAKY_END,
-+}rtk_leaky_type_t;
-+
-+/* Function Name:
-+ *      rtk_leaky_vlan_set
-+ * Description:
-+ *      Set VLAN leaky.
-+ * Input:
-+ *      type - Packet type for VLAN leaky.
-+ *      enable - Leaky status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_ENABLE       - Invalid enable input
-+ * Note:
-+ *      This API can set VLAN leaky for RMA ,IGMP/MLD, CDP, CSSTP, and LLDP packets.
-+ *      The leaky frame types are as following:
-+ *      - LEAKY_BRG_GROUP,
-+ *      - LEAKY_FD_PAUSE,
-+ *      - LEAKY_SP_MCAST,
-+ *      - LEAKY_1X_PAE,
-+ *      - LEAKY_UNDEF_BRG_04,
-+ *      - LEAKY_UNDEF_BRG_05,
-+ *      - LEAKY_UNDEF_BRG_06,
-+ *      - LEAKY_UNDEF_BRG_07,
-+ *      - LEAKY_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - LEAKY_UNDEF_BRG_09,
-+ *      - LEAKY_UNDEF_BRG_0A,
-+ *      - LEAKY_UNDEF_BRG_0B,
-+ *      - LEAKY_UNDEF_BRG_0C,
-+ *      - LEAKY_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - LEAKY_8021AB,
-+ *      - LEAKY_UNDEF_BRG_0F,
-+ *      - LEAKY_BRG_MNGEMENT,
-+ *      - LEAKY_UNDEFINED_11,
-+ *      - LEAKY_UNDEFINED_12,
-+ *      - LEAKY_UNDEFINED_13,
-+ *      - LEAKY_UNDEFINED_14,
-+ *      - LEAKY_UNDEFINED_15,
-+ *      - LEAKY_UNDEFINED_16,
-+ *      - LEAKY_UNDEFINED_17,
-+ *      - LEAKY_UNDEFINED_18,
-+ *      - LEAKY_UNDEFINED_19,
-+ *      - LEAKY_UNDEFINED_1A,
-+ *      - LEAKY_UNDEFINED_1B,
-+ *      - LEAKY_UNDEFINED_1C,
-+ *      - LEAKY_UNDEFINED_1D,
-+ *      - LEAKY_UNDEFINED_1E,
-+ *      - LEAKY_UNDEFINED_1F,
-+ *      - LEAKY_GMRP,
-+ *      - LEAKY_GVRP,
-+ *      - LEAKY_UNDEF_GARP_22,
-+ *      - LEAKY_UNDEF_GARP_23,
-+ *      - LEAKY_UNDEF_GARP_24,
-+ *      - LEAKY_UNDEF_GARP_25,
-+ *      - LEAKY_UNDEF_GARP_26,
-+ *      - LEAKY_UNDEF_GARP_27,
-+ *      - LEAKY_UNDEF_GARP_28,
-+ *      - LEAKY_UNDEF_GARP_29,
-+ *      - LEAKY_UNDEF_GARP_2A,
-+ *      - LEAKY_UNDEF_GARP_2B,
-+ *      - LEAKY_UNDEF_GARP_2C,
-+ *      - LEAKY_UNDEF_GARP_2D,
-+ *      - LEAKY_UNDEF_GARP_2E,
-+ *      - LEAKY_UNDEF_GARP_2F,
-+ *      - LEAKY_IGMP,
-+ *      - LEAKY_IPMULTICAST.
-+ *      - LEAKY_CDP,
-+ *      - LEAKY_CSSTP,
-+ *      - LEAKY_LLDP.
-+ */
-+extern rtk_api_ret_t rtk_leaky_vlan_set(rtk_leaky_type_t type, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_leaky_vlan_get
-+ * Description:
-+ *      Get VLAN leaky.
-+ * Input:
-+ *      type - Packet type for VLAN leaky.
-+ * Output:
-+ *      pEnable - Leaky status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can get VLAN leaky status for RMA ,IGMP/MLD, CDP, CSSTP, and LLDP  packets.
-+ *      The leaky frame types are as following:
-+ *      - LEAKY_BRG_GROUP,
-+ *      - LEAKY_FD_PAUSE,
-+ *      - LEAKY_SP_MCAST,
-+ *      - LEAKY_1X_PAE,
-+ *      - LEAKY_UNDEF_BRG_04,
-+ *      - LEAKY_UNDEF_BRG_05,
-+ *      - LEAKY_UNDEF_BRG_06,
-+ *      - LEAKY_UNDEF_BRG_07,
-+ *      - LEAKY_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - LEAKY_UNDEF_BRG_09,
-+ *      - LEAKY_UNDEF_BRG_0A,
-+ *      - LEAKY_UNDEF_BRG_0B,
-+ *      - LEAKY_UNDEF_BRG_0C,
-+ *      - LEAKY_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - LEAKY_8021AB,
-+ *      - LEAKY_UNDEF_BRG_0F,
-+ *      - LEAKY_BRG_MNGEMENT,
-+ *      - LEAKY_UNDEFINED_11,
-+ *      - LEAKY_UNDEFINED_12,
-+ *      - LEAKY_UNDEFINED_13,
-+ *      - LEAKY_UNDEFINED_14,
-+ *      - LEAKY_UNDEFINED_15,
-+ *      - LEAKY_UNDEFINED_16,
-+ *      - LEAKY_UNDEFINED_17,
-+ *      - LEAKY_UNDEFINED_18,
-+ *      - LEAKY_UNDEFINED_19,
-+ *      - LEAKY_UNDEFINED_1A,
-+ *      - LEAKY_UNDEFINED_1B,
-+ *      - LEAKY_UNDEFINED_1C,
-+ *      - LEAKY_UNDEFINED_1D,
-+ *      - LEAKY_UNDEFINED_1E,
-+ *      - LEAKY_UNDEFINED_1F,
-+ *      - LEAKY_GMRP,
-+ *      - LEAKY_GVRP,
-+ *      - LEAKY_UNDEF_GARP_22,
-+ *      - LEAKY_UNDEF_GARP_23,
-+ *      - LEAKY_UNDEF_GARP_24,
-+ *      - LEAKY_UNDEF_GARP_25,
-+ *      - LEAKY_UNDEF_GARP_26,
-+ *      - LEAKY_UNDEF_GARP_27,
-+ *      - LEAKY_UNDEF_GARP_28,
-+ *      - LEAKY_UNDEF_GARP_29,
-+ *      - LEAKY_UNDEF_GARP_2A,
-+ *      - LEAKY_UNDEF_GARP_2B,
-+ *      - LEAKY_UNDEF_GARP_2C,
-+ *      - LEAKY_UNDEF_GARP_2D,
-+ *      - LEAKY_UNDEF_GARP_2E,
-+ *      - LEAKY_UNDEF_GARP_2F,
-+ *      - LEAKY_IGMP,
-+ *      - LEAKY_IPMULTICAST.
-+ *      - LEAKY_CDP,
-+ *      - LEAKY_CSSTP,
-+ *      - LEAKY_LLDP.
-+ */
-+extern rtk_api_ret_t rtk_leaky_vlan_get(rtk_leaky_type_t type, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_leaky_portIsolation_set
-+ * Description:
-+ *      Set port isolation leaky.
-+ * Input:
-+ *      type - Packet type for port isolation leaky.
-+ *      enable - Leaky status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_ENABLE       - Invalid enable input
-+ * Note:
-+ *      This API can set port isolation leaky for RMA ,IGMP/MLD, CDP, CSSTP, and LLDP  packets.
-+ *      The leaky frame types are as following:
-+ *      - LEAKY_BRG_GROUP,
-+ *      - LEAKY_FD_PAUSE,
-+ *      - LEAKY_SP_MCAST,
-+ *      - LEAKY_1X_PAE,
-+ *      - LEAKY_UNDEF_BRG_04,
-+ *      - LEAKY_UNDEF_BRG_05,
-+ *      - LEAKY_UNDEF_BRG_06,
-+ *      - LEAKY_UNDEF_BRG_07,
-+ *      - LEAKY_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - LEAKY_UNDEF_BRG_09,
-+ *      - LEAKY_UNDEF_BRG_0A,
-+ *      - LEAKY_UNDEF_BRG_0B,
-+ *      - LEAKY_UNDEF_BRG_0C,
-+ *      - LEAKY_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - LEAKY_8021AB,
-+ *      - LEAKY_UNDEF_BRG_0F,
-+ *      - LEAKY_BRG_MNGEMENT,
-+ *      - LEAKY_UNDEFINED_11,
-+ *      - LEAKY_UNDEFINED_12,
-+ *      - LEAKY_UNDEFINED_13,
-+ *      - LEAKY_UNDEFINED_14,
-+ *      - LEAKY_UNDEFINED_15,
-+ *      - LEAKY_UNDEFINED_16,
-+ *      - LEAKY_UNDEFINED_17,
-+ *      - LEAKY_UNDEFINED_18,
-+ *      - LEAKY_UNDEFINED_19,
-+ *      - LEAKY_UNDEFINED_1A,
-+ *      - LEAKY_UNDEFINED_1B,
-+ *      - LEAKY_UNDEFINED_1C,
-+ *      - LEAKY_UNDEFINED_1D,
-+ *      - LEAKY_UNDEFINED_1E,
-+ *      - LEAKY_UNDEFINED_1F,
-+ *      - LEAKY_GMRP,
-+ *      - LEAKY_GVRP,
-+ *      - LEAKY_UNDEF_GARP_22,
-+ *      - LEAKY_UNDEF_GARP_23,
-+ *      - LEAKY_UNDEF_GARP_24,
-+ *      - LEAKY_UNDEF_GARP_25,
-+ *      - LEAKY_UNDEF_GARP_26,
-+ *      - LEAKY_UNDEF_GARP_27,
-+ *      - LEAKY_UNDEF_GARP_28,
-+ *      - LEAKY_UNDEF_GARP_29,
-+ *      - LEAKY_UNDEF_GARP_2A,
-+ *      - LEAKY_UNDEF_GARP_2B,
-+ *      - LEAKY_UNDEF_GARP_2C,
-+ *      - LEAKY_UNDEF_GARP_2D,
-+ *      - LEAKY_UNDEF_GARP_2E,
-+ *      - LEAKY_UNDEF_GARP_2F,
-+ *      - LEAKY_IGMP,
-+ *      - LEAKY_IPMULTICAST.
-+ *      - LEAKY_CDP,
-+ *      - LEAKY_CSSTP,
-+ *      - LEAKY_LLDP.
-+ */
-+extern rtk_api_ret_t rtk_leaky_portIsolation_set(rtk_leaky_type_t type, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_leaky_portIsolation_get
-+ * Description:
-+ *      Get port isolation leaky.
-+ * Input:
-+ *      type - Packet type for port isolation leaky.
-+ * Output:
-+ *      pEnable - Leaky status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can get port isolation leaky status for RMA ,IGMP/MLD, CDP, CSSTP, and LLDP  packets.
-+ *      The leaky frame types are as following:
-+ *      - LEAKY_BRG_GROUP,
-+ *      - LEAKY_FD_PAUSE,
-+ *      - LEAKY_SP_MCAST,
-+ *      - LEAKY_1X_PAE,
-+ *      - LEAKY_UNDEF_BRG_04,
-+ *      - LEAKY_UNDEF_BRG_05,
-+ *      - LEAKY_UNDEF_BRG_06,
-+ *      - LEAKY_UNDEF_BRG_07,
-+ *      - LEAKY_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - LEAKY_UNDEF_BRG_09,
-+ *      - LEAKY_UNDEF_BRG_0A,
-+ *      - LEAKY_UNDEF_BRG_0B,
-+ *      - LEAKY_UNDEF_BRG_0C,
-+ *      - LEAKY_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - LEAKY_8021AB,
-+ *      - LEAKY_UNDEF_BRG_0F,
-+ *      - LEAKY_BRG_MNGEMENT,
-+ *      - LEAKY_UNDEFINED_11,
-+ *      - LEAKY_UNDEFINED_12,
-+ *      - LEAKY_UNDEFINED_13,
-+ *      - LEAKY_UNDEFINED_14,
-+ *      - LEAKY_UNDEFINED_15,
-+ *      - LEAKY_UNDEFINED_16,
-+ *      - LEAKY_UNDEFINED_17,
-+ *      - LEAKY_UNDEFINED_18,
-+ *      - LEAKY_UNDEFINED_19,
-+ *      - LEAKY_UNDEFINED_1A,
-+ *      - LEAKY_UNDEFINED_1B,
-+ *      - LEAKY_UNDEFINED_1C,
-+ *      - LEAKY_UNDEFINED_1D,
-+ *      - LEAKY_UNDEFINED_1E,
-+ *      - LEAKY_UNDEFINED_1F,
-+ *      - LEAKY_GMRP,
-+ *      - LEAKY_GVRP,
-+ *      - LEAKY_UNDEF_GARP_22,
-+ *      - LEAKY_UNDEF_GARP_23,
-+ *      - LEAKY_UNDEF_GARP_24,
-+ *      - LEAKY_UNDEF_GARP_25,
-+ *      - LEAKY_UNDEF_GARP_26,
-+ *      - LEAKY_UNDEF_GARP_27,
-+ *      - LEAKY_UNDEF_GARP_28,
-+ *      - LEAKY_UNDEF_GARP_29,
-+ *      - LEAKY_UNDEF_GARP_2A,
-+ *      - LEAKY_UNDEF_GARP_2B,
-+ *      - LEAKY_UNDEF_GARP_2C,
-+ *      - LEAKY_UNDEF_GARP_2D,
-+ *      - LEAKY_UNDEF_GARP_2E,
-+ *      - LEAKY_UNDEF_GARP_2F,
-+ *      - LEAKY_IGMP,
-+ *      - LEAKY_IPMULTICAST.
-+ *      - LEAKY_CDP,
-+ *      - LEAKY_CSSTP,
-+ *      - LEAKY_LLDP.
-+ */
-+extern rtk_api_ret_t rtk_leaky_portIsolation_get(rtk_leaky_type_t type, rtk_enable_t *pEnable);
-+
-+#endif /* __RTK_API_LEAKY_H__ */
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/led.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/led.h
-new file mode 100644
-index 0000000000..71acc7c92c
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/led.h
-@@ -0,0 +1,481 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes LED module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_LED_H__
-+#define __RTK_API_LED_H__
-+
-+typedef enum rtk_led_operation_e
-+{
-+    LED_OP_SCAN=0,
-+    LED_OP_PARALLEL,
-+    LED_OP_SERIAL,
-+    LED_OP_END,
-+}rtk_led_operation_t;
-+
-+
-+typedef enum rtk_led_active_e
-+{
-+    LED_ACTIVE_HIGH=0,
-+    LED_ACTIVE_LOW,
-+    LED_ACTIVE_END,
-+}rtk_led_active_t;
-+
-+typedef enum rtk_led_config_e
-+{
-+    LED_CONFIG_LEDOFF=0,
-+    LED_CONFIG_DUPCOL,
-+    LED_CONFIG_LINK_ACT,
-+    LED_CONFIG_SPD1000,
-+    LED_CONFIG_SPD100,
-+    LED_CONFIG_SPD10,
-+    LED_CONFIG_SPD1000ACT,
-+    LED_CONFIG_SPD100ACT,
-+    LED_CONFIG_SPD10ACT,
-+    LED_CONFIG_SPD10010ACT,
-+    LED_CONFIG_LOOPDETECT,
-+    LED_CONFIG_EEE,
-+    LED_CONFIG_LINKRX,
-+    LED_CONFIG_LINKTX,
-+    LED_CONFIG_MASTER,
-+    LED_CONFIG_ACT,
-+    LED_CONFIG_END,
-+}rtk_led_congig_t;
-+
-+typedef struct rtk_led_ability_s
-+{
-+    rtk_enable_t link_10m;
-+    rtk_enable_t link_100m;
-+    rtk_enable_t link_500m;
-+    rtk_enable_t link_1000m;
-+    rtk_enable_t act_rx;
-+    rtk_enable_t act_tx;
-+}rtk_led_ability_t;
-+
-+typedef enum rtk_led_blink_rate_e
-+{
-+    LED_BLINKRATE_32MS=0,
-+    LED_BLINKRATE_64MS,
-+    LED_BLINKRATE_128MS,
-+    LED_BLINKRATE_256MS,
-+    LED_BLINKRATE_512MS,
-+    LED_BLINKRATE_1024MS,
-+    LED_BLINKRATE_48MS,
-+    LED_BLINKRATE_96MS,
-+    LED_BLINKRATE_END,
-+}rtk_led_blink_rate_t;
-+
-+typedef enum rtk_led_group_e
-+{
-+    LED_GROUP_0 = 0,
-+    LED_GROUP_1,
-+    LED_GROUP_2,
-+    LED_GROUP_END
-+}rtk_led_group_t;
-+
-+
-+typedef enum rtk_led_force_mode_e
-+{
-+    LED_FORCE_NORMAL=0,
-+    LED_FORCE_BLINK,
-+    LED_FORCE_OFF,
-+    LED_FORCE_ON,
-+    LED_FORCE_END
-+}rtk_led_force_mode_t;
-+
-+typedef enum rtk_led_serialOutput_e
-+{
-+    SERIAL_LED_NONE = 0,
-+    SERIAL_LED_0,
-+    SERIAL_LED_0_1,
-+    SERIAL_LED_0_2,
-+    SERIAL_LED_END,
-+}rtk_led_serialOutput_t;
-+
-+
-+/* Function Name:
-+ *      rtk_led_enable_set
-+ * Description:
-+ *      Set Led enable congiuration
-+ * Input:
-+ *      group       - LED group id.
-+ *      pPortmask    - LED enable port mask.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can be used to enable LED per port per group.
-+ */
-+extern rtk_api_ret_t rtk_led_enable_set(rtk_led_group_t group, rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_led_enable_get
-+ * Description:
-+ *      Get Led enable congiuration
-+ * Input:
-+ *      group - LED group id.
-+ * Output:
-+ *      pPortmask - LED enable port mask.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can be used to get LED enable status.
-+ */
-+extern rtk_api_ret_t rtk_led_enable_get(rtk_led_group_t group, rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_led_operation_set
-+ * Description:
-+ *      Set Led operation mode
-+ * Input:
-+ *      mode - LED operation mode.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can set Led operation mode.
-+ *      The modes that can be set are as following:
-+ *      - LED_OP_SCAN,
-+ *      - LED_OP_PARALLEL,
-+ *      - LED_OP_SERIAL,
-+ */
-+extern rtk_api_ret_t rtk_led_operation_set(rtk_led_operation_t mode);
-+
-+/* Function Name:
-+ *      rtk_led_operation_get
-+ * Description:
-+ *      Get Led operation mode
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pMode - Support LED operation mode.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get Led operation mode.
-+ *      The modes that can be set are as following:
-+ *      - LED_OP_SCAN,
-+ *      - LED_OP_PARALLEL,
-+ *      - LED_OP_SERIAL,
-+ */
-+extern rtk_api_ret_t rtk_led_operation_get(rtk_led_operation_t *pMode);
-+
-+/* Function Name:
-+ *      rtk_led_modeForce_set
-+ * Description:
-+ *      Set Led group to congiuration force mode
-+ * Input:
-+ *      port    - port ID
-+ *      group   - Support LED group id.
-+ *      mode    - Support LED force mode.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Error Port ID
-+ * Note:
-+ *      The API can force to one force mode.
-+ *      The force modes that can be set are as following:
-+ *      - LED_FORCE_NORMAL,
-+ *      - LED_FORCE_BLINK,
-+ *      - LED_FORCE_OFF,
-+ *      - LED_FORCE_ON.
-+ */
-+extern rtk_api_ret_t rtk_led_modeForce_set(rtk_port_t port, rtk_led_group_t group, rtk_led_force_mode_t mode);
-+
-+/* Function Name:
-+ *      rtk_led_modeForce_get
-+ * Description:
-+ *      Get Led group to congiuration force mode
-+ * Input:
-+ *      port  - port ID
-+ *      group - Support LED group id.
-+ *      pMode - Support LED force mode.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Error Port ID
-+ * Note:
-+ *      The API can get forced Led group mode.
-+ *      The force modes that can be set are as following:
-+ *      - LED_FORCE_NORMAL,
-+ *      - LED_FORCE_BLINK,
-+ *      - LED_FORCE_OFF,
-+ *      - LED_FORCE_ON.
-+ */
-+extern rtk_api_ret_t rtk_led_modeForce_get(rtk_port_t port, rtk_led_group_t group, rtk_led_force_mode_t *pMode);
-+
-+/* Function Name:
-+ *      rtk_led_blinkRate_set
-+ * Description:
-+ *      Set LED blinking rate
-+ * Input:
-+ *      blinkRate - blinking rate.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      ASIC support 6 types of LED blinking rates at 43ms, 84ms, 120ms, 170ms, 340ms and 670ms.
-+ */
-+extern rtk_api_ret_t rtk_led_blinkRate_set(rtk_led_blink_rate_t blinkRate);
-+
-+/* Function Name:
-+ *      rtk_led_blinkRate_get
-+ * Description:
-+ *      Get LED blinking rate at mode 0 to mode 3
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pBlinkRate - blinking rate.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      There are  6 types of LED blinking rates at 43ms, 84ms, 120ms, 170ms, 340ms and 670ms.
-+ */
-+extern rtk_api_ret_t rtk_led_blinkRate_get(rtk_led_blink_rate_t *pBlinkRate);
-+
-+/* Function Name:
-+ *      rtk_led_groupConfig_set
-+ * Description:
-+ *      Set per group Led to congiuration mode
-+ * Input:
-+ *      group   - LED group.
-+ *      config  - LED configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can set LED indicated information configuration for each LED group with 1 to 1 led mapping to each port.
-+ *      - Definition  LED Statuses      Description
-+ *      - 0000        LED_Off           LED pin Tri-State.
-+ *      - 0001        Dup/Col           Collision, Full duplex Indicator.
-+ *      - 0010        Link/Act          Link, Activity Indicator.
-+ *      - 0011        Spd1000           1000Mb/s Speed Indicator.
-+ *      - 0100        Spd100            100Mb/s Speed Indicator.
-+ *      - 0101        Spd10             10Mb/s Speed Indicator.
-+ *      - 0110        Spd1000/Act       1000Mb/s Speed/Activity Indicator.
-+ *      - 0111        Spd100/Act        100Mb/s Speed/Activity Indicator.
-+ *      - 1000        Spd10/Act         10Mb/s Speed/Activity Indicator.
-+ *      - 1001        Spd100 (10)/Act   10/100Mb/s Speed/Activity Indicator.
-+ *      - 1010        LoopDetect        LoopDetect Indicator.
-+ *      - 1011        EEE               EEE Indicator.
-+ *      - 1100        Link/Rx           Link, Activity Indicator.
-+ *      - 1101        Link/Tx           Link, Activity Indicator.
-+ *      - 1110        Master            Link on Master Indicator.
-+ *      - 1111        Act               Activity Indicator. Low for link established.
-+ */
-+extern rtk_api_ret_t rtk_led_groupConfig_set(rtk_led_group_t group, rtk_led_congig_t config);
-+
-+/* Function Name:
-+ *      rtk_led_groupConfig_get
-+ * Description:
-+ *      Get Led group congiuration mode
-+ * Input:
-+ *      group - LED group.
-+ * Output:
-+ *      pConfig - LED configuration.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *       The API can get LED indicated information configuration for each LED group.
-+ */
-+extern rtk_api_ret_t rtk_led_groupConfig_get(rtk_led_group_t group, rtk_led_congig_t *pConfig);
-+
-+/* Function Name:
-+ *      rtk_led_groupAbility_set
-+ * Description:
-+ *      Configure per group Led ability
-+ * Input:
-+ *      group    - LED group.
-+ *      pAbility - LED ability
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      None.
-+ */
-+
-+extern rtk_api_ret_t rtk_led_groupAbility_set(rtk_led_group_t group, rtk_led_ability_t *pAbility);
-+
-+/* Function Name:
-+ *      rtk_led_groupAbility_get
-+ * Description:
-+ *      Get per group Led ability
-+ * Input:
-+ *      group    - LED group.
-+ *      pAbility - LED ability
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      None.
-+ */
-+
-+extern rtk_api_ret_t rtk_led_groupAbility_get(rtk_led_group_t group, rtk_led_ability_t *pAbility);
-+
-+/* Function Name:
-+ *      rtk_led_serialMode_set
-+ * Description:
-+ *      Set Led serial mode active congiuration
-+ * Input:
-+ *      active - LED group.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can set LED serial mode active congiuration.
-+ */
-+extern rtk_api_ret_t rtk_led_serialMode_set(rtk_led_active_t active);
-+
-+/* Function Name:
-+ *      rtk_led_serialMode_get
-+ * Description:
-+ *      Get Led group congiuration mode
-+ * Input:
-+ *      group - LED group.
-+ * Output:
-+ *      pConfig - LED configuration.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *       The API can get LED serial mode active configuration.
-+ */
-+extern rtk_api_ret_t rtk_led_serialMode_get(rtk_led_active_t *pActive);
-+
-+/* Function Name:
-+ *      rtk_led_OutputEnable_set
-+ * Description:
-+ *      This API set LED I/O state.
-+ * Input:
-+ *      enabled     - LED I/O state
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error parameter
-+ * Note:
-+ *      This API set LED I/O state.
-+ */
-+extern rtk_api_ret_t rtk_led_OutputEnable_set(rtk_enable_t state);
-+
-+
-+/* Function Name:
-+ *      rtk_led_OutputEnable_get
-+ * Description:
-+ *      This API get LED I/O state.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pEnabled        - LED I/O state
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error parameter
-+ * Note:
-+ *      This API set current LED I/O  state.
-+ */
-+extern rtk_api_ret_t rtk_led_OutputEnable_get(rtk_enable_t *pState);
-+
-+/* Function Name:
-+ *      rtk_led_serialModePortmask_set
-+ * Description:
-+ *      This API configure Serial LED output Group and portmask
-+ * Input:
-+ *      output          - output group
-+ *      pPortmask       - output portmask
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error parameter
-+ * Note:
-+ *      None.
-+ */
-+extern rtk_api_ret_t rtk_led_serialModePortmask_set(rtk_led_serialOutput_t output, rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_led_serialModePortmask_get
-+ * Description:
-+ *      This API get Serial LED output Group and portmask
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pOutput         - output group
-+ *      pPortmask       - output portmask
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error parameter
-+ * Note:
-+ *      None.
-+ */
-+extern rtk_api_ret_t rtk_led_serialModePortmask_get(rtk_led_serialOutput_t *pOutput, rtk_portmask_t *pPortmask);
-+
-+#endif /* __RTK_API_LED_H__ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/mirror.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/mirror.h
-new file mode 100644
-index 0000000000..1e984b7d80
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/mirror.h
-@@ -0,0 +1,272 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes Mirror module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_MIRROR_H__
-+#define __RTK_API_MIRROR_H__
-+
-+typedef enum rtk_mirror_keep_e
-+{
-+    MIRROR_FOLLOW_VLAN = 0,
-+    MIRROR_KEEP_ORIGINAL,
-+    MIRROR_KEEP_END
-+}rtk_mirror_keep_t;
-+
-+
-+/* Function Name:
-+ *      rtk_mirror_portBased_set
-+ * Description:
-+ *      Set port mirror function.
-+ * Input:
-+ *      mirroring_port          - Monitor port.
-+ *      pMirrored_rx_portmask   - Rx mirror port mask.
-+ *      pMirrored_tx_portmask   - Tx mirror port mask.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_PORT_MASK    - Invalid portmask.
-+ * Note:
-+ *      The API is to set mirror function of source port and mirror port.
-+ *      The mirror port can only be set to one port and the TX and RX mirror ports
-+ *      should be identical.
-+ */
-+extern rtk_api_ret_t rtk_mirror_portBased_set(rtk_port_t mirroring_port, rtk_portmask_t *pMirrored_rx_portmask, rtk_portmask_t *pMirrored_tx_portmask);
-+
-+/* Function Name:
-+ *      rtk_mirror_portBased_get
-+ * Description:
-+ *      Get port mirror function.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pMirroring_port         - Monitor port.
-+ *      pMirrored_rx_portmask   - Rx mirror port mask.
-+ *      pMirrored_tx_portmask   - Tx mirror port mask.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API is to get mirror function of source port and mirror port.
-+ */
-+extern rtk_api_ret_t rtk_mirror_portBased_get(rtk_port_t* pMirroring_port, rtk_portmask_t *pMirrored_rx_portmask, rtk_portmask_t *pMirrored_tx_portmask);
-+
-+/* Function Name:
-+ *      rtk_mirror_portIso_set
-+ * Description:
-+ *      Set mirror port isolation.
-+ * Input:
-+ *      enable |Mirror isolation status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENABLE       - Invalid enable input
-+ * Note:
-+ *      The API is to set mirror isolation function that prevent normal forwarding packets to miror port.
-+ */
-+extern rtk_api_ret_t rtk_mirror_portIso_set(rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_mirror_portIso_get
-+ * Description:
-+ *      Get mirror port isolation.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnable |Mirror isolation status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API is to get mirror isolation status.
-+ */
-+extern rtk_api_ret_t rtk_mirror_portIso_get(rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_mirror_vlanLeaky_set
-+ * Description:
-+ *      Set mirror VLAN leaky.
-+ * Input:
-+ *      txenable -TX leaky enable.
-+ *      rxenable - RX leaky enable.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENABLE       - Invalid enable input
-+ * Note:
-+ *      The API is to set mirror VLAN leaky function forwarding packets to miror port.
-+ */
-+extern rtk_api_ret_t rtk_mirror_vlanLeaky_set(rtk_enable_t txenable, rtk_enable_t rxenable);
-+
-+
-+/* Function Name:
-+ *      rtk_mirror_vlanLeaky_get
-+ * Description:
-+ *      Get mirror VLAN leaky.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pTxenable - TX leaky enable.
-+ *      pRxenable - RX leaky enable.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API is to get mirror VLAN leaky status.
-+ */
-+extern rtk_api_ret_t rtk_mirror_vlanLeaky_get(rtk_enable_t *pTxenable, rtk_enable_t *pRxenable);
-+
-+/* Function Name:
-+ *      rtk_mirror_isolationLeaky_set
-+ * Description:
-+ *      Set mirror Isolation leaky.
-+ * Input:
-+ *      txenable -TX leaky enable.
-+ *      rxenable - RX leaky enable.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENABLE       - Invalid enable input
-+ * Note:
-+ *      The API is to set mirror VLAN leaky function forwarding packets to miror port.
-+ */
-+extern rtk_api_ret_t rtk_mirror_isolationLeaky_set(rtk_enable_t txenable, rtk_enable_t rxenable);
-+
-+/* Function Name:
-+ *      rtk_mirror_isolationLeaky_get
-+ * Description:
-+ *      Get mirror isolation leaky.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pTxenable - TX leaky enable.
-+ *      pRxenable - RX leaky enable.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API is to get mirror isolation leaky status.
-+ */
-+extern rtk_api_ret_t rtk_mirror_isolationLeaky_get(rtk_enable_t *pTxenable, rtk_enable_t *pRxenable);
-+
-+/* Function Name:
-+ *      rtk_mirror_keep_set
-+ * Description:
-+ *      Set mirror packet format keep.
-+ * Input:
-+ *      mode - -mirror keep mode.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENABLE       - Invalid enable input
-+ * Note:
-+ *      The API is to set  -mirror keep mode.
-+ *      The mirror keep mode is as following:
-+ *      - MIRROR_FOLLOW_VLAN
-+ *      - MIRROR_KEEP_ORIGINAL
-+ *      - MIRROR_KEEP_END
-+ */
-+extern rtk_api_ret_t rtk_mirror_keep_set(rtk_mirror_keep_t mode);
-+
-+
-+/* Function Name:
-+ *      rtk_mirror_keep_get
-+ * Description:
-+ *      Get mirror packet format keep.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pMode -mirror keep mode.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API is to get mirror keep mode.
-+  *      The mirror keep mode is as following:
-+ *      - MIRROR_FOLLOW_VLAN
-+ *      - MIRROR_KEEP_ORIGINAL
-+ *      - MIRROR_KEEP_END
-+ */
-+extern rtk_api_ret_t rtk_mirror_keep_get(rtk_mirror_keep_t *pMode);
-+
-+/* Function Name:
-+ *      rtk_mirror_override_set
-+ * Description:
-+ *      Set port mirror override function.
-+ * Input:
-+ *      rxMirror        - 1: output mirrored packet, 0: output normal forward packet
-+ *      txMirror        - 1: output mirrored packet, 0: output normal forward packet
-+ *      aclMirror       - 1: output mirrored packet, 0: output normal forward packet
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      The API is to set mirror override function.
-+ *      This function control the output format when a port output
-+ *      normal forward & mirrored packet at the same time.
-+ */
-+extern rtk_api_ret_t rtk_mirror_override_set(rtk_enable_t rxMirror, rtk_enable_t txMirror, rtk_enable_t aclMirror);
-+
-+/* Function Name:
-+ *      rtk_mirror_override_get
-+ * Description:
-+ *      Get port mirror override function.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pRxMirror       - 1: output mirrored packet, 0: output normal forward packet
-+ *      pTxMirror       - 1: output mirrored packet, 0: output normal forward packet
-+ *      pAclMirror      - 1: output mirrored packet, 0: output normal forward packet
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NULL_POINTER - Null Pointer
-+ * Note:
-+ *      The API is to Get mirror override function.
-+ *      This function control the output format when a port output
-+ *      normal forward & mirrored packet at the same time.
-+ */
-+extern rtk_api_ret_t rtk_mirror_override_get(rtk_enable_t *pRxMirror, rtk_enable_t *pTxMirror, rtk_enable_t *pAclMirror);
-+
-+#endif /* __RTK_API_MIRROR_H__ */
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/oam.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/oam.h
-new file mode 100644
-index 0000000000..1fc14bd62f
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/oam.h
-@@ -0,0 +1,188 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes the following modules and sub-modules
-+ *           (1) OAM (802.3ah) configuration
-+ *
-+ */
-+
-+#ifndef __RTK_OAM_H__
-+#define __RTK_OAM_H__
-+
-+/*
-+ * Symbol Definition
-+ */
-+
-+
-+/*
-+ * Data Declaration
-+ */
-+
-+
-+/*
-+ * Macro Declaration
-+ */
-+
-+typedef enum rtk_oam_parser_act_e
-+{
-+    OAM_PARSER_ACTION_FORWARD = 0,
-+    OAM_PARSER_ACTION_LOOPBACK,
-+    OAM_PARSER_ACTION_DISCARD,
-+    OAM_PARSER_ACTION_END,
-+
-+} rtk_oam_parser_act_t;
-+
-+typedef enum rtk_oam_multiplexer_act_e
-+{
-+    OAM_MULTIPLEXER_ACTION_FORWARD = 0,
-+    OAM_MULTIPLEXER_ACTION_DISCARD,
-+    OAM_MULTIPLEXER_ACTION_CPUONLY,
-+    OAM_MULTIPLEXER_ACTION_END,
-+
-+} rtk_oam_multiplexer_act_t;
-+
-+
-+/*
-+ * Function Declaration
-+ */
-+
-+/* Function Name:
-+ *      rtk_oam_init
-+ * Description:
-+ *      Initialize oam module.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ * Note:
-+ *      Must initialize oam module before calling any oam APIs.
-+ */
-+extern rtk_api_ret_t rtk_oam_init(void);
-+
-+/* Function Name:
-+ *      rtk_oam_state_set
-+ * Description:
-+ *      This API set OAM state.
-+ * Input:
-+ *      enabled     -OAMstate
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error parameter
-+ * Note:
-+ *      This API set OAM state.
-+ */
-+extern rtk_api_ret_t rtk_oam_state_set(rtk_enable_t enabled);
-+
-+/* Function Name:
-+ *      rtk_oam_state_get
-+ * Description:
-+ *      This API get OAM state.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pEnabled        - H/W IGMP state
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error parameter
-+ * Note:
-+ *      This API set current OAM state.
-+ */
-+extern rtk_api_ret_t rtk_oam_state_get(rtk_enable_t *pEnabled);
-+
-+
-+/* Module Name : OAM */
-+
-+/* Function Name:
-+ *      rtk_oam_parserAction_set
-+ * Description:
-+ *      Set OAM parser action
-+ * Input:
-+ *      port    - port id
-+ *      action  - parser action
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID      - invalid port id
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_oam_parserAction_set(rtk_port_t port, rtk_oam_parser_act_t action);
-+
-+/* Function Name:
-+ *      rtk_oam_parserAction_set
-+ * Description:
-+ *      Get OAM parser action
-+ * Input:
-+ *      port    - port id
-+ * Output:
-+ *      pAction  - parser action
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID      - invalid port id
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_oam_parserAction_get(rtk_port_t port, rtk_oam_parser_act_t *pAction);
-+
-+
-+/* Function Name:
-+ *      rtk_oam_multiplexerAction_set
-+ * Description:
-+ *      Set OAM multiplexer action
-+ * Input:
-+ *      port    - port id
-+ *      action  - parser action
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID      - invalid port id
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_oam_multiplexerAction_set(rtk_port_t port, rtk_oam_multiplexer_act_t action);
-+
-+/* Function Name:
-+ *      rtk_oam_multiplexerAction_set
-+ * Description:
-+ *      Get OAM multiplexer action
-+ * Input:
-+ *      port    - port id
-+ * Output:
-+ *      pAction  - parser action
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID      - invalid port id
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_oam_multiplexerAction_get(rtk_port_t port, rtk_oam_multiplexer_act_t *pAction);
-+
-+
-+#endif /* __RTK_OAM_H__ */
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/port.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/port.h
-new file mode 100644
-index 0000000000..fcac1bcb84
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/port.h
-@@ -0,0 +1,959 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes port module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_PORT_H__
-+#define __RTK_API_PORT_H__
-+
-+/*
-+ * Data Type Declaration
-+ */
-+
-+#define PHY_CONTROL_REG                             0
-+#define PHY_STATUS_REG                              1
-+#define PHY_AN_ADVERTISEMENT_REG                    4
-+#define PHY_AN_LINKPARTNER_REG                      5
-+#define PHY_1000_BASET_CONTROL_REG                  9
-+#define PHY_1000_BASET_STATUS_REG                   10
-+#define PHY_RESOLVED_REG                            26
-+
-+#define RTK_EFID_MAX                                0x7
-+
-+#define RTK_FIBER_FORCE_1000M                       3
-+#define RTK_FIBER_FORCE_100M                        5
-+#define RTK_FIBER_FORCE_100M1000M                   7
-+
-+#define RTK_INDRECT_ACCESS_CRTL                     0x1f00
-+#define RTK_INDRECT_ACCESS_STATUS                   0x1f01
-+#define RTK_INDRECT_ACCESS_ADDRESS                  0x1f02
-+#define RTK_INDRECT_ACCESS_WRITE_DATA               0x1f03
-+#define RTK_INDRECT_ACCESS_READ_DATA                0x1f04
-+#define RTK_INDRECT_ACCESS_DELAY                    0x1f80
-+#define RTK_INDRECT_ACCESS_BURST                    0x1f81
-+#define RTK_RW_MASK                                 0x2
-+#define RTK_CMD_MASK                                0x1
-+#define RTK_PHY_BUSY_OFFSET                         2
-+
-+
-+typedef enum rtk_mode_ext_e
-+{
-+    MODE_EXT_DISABLE = 0,
-+    MODE_EXT_RGMII,
-+    MODE_EXT_MII_MAC,
-+    MODE_EXT_MII_PHY,
-+    MODE_EXT_TMII_MAC,
-+    MODE_EXT_TMII_PHY,
-+    MODE_EXT_GMII,
-+    MODE_EXT_RMII_MAC,
-+    MODE_EXT_RMII_PHY,
-+    MODE_EXT_SGMII,
-+    MODE_EXT_HSGMII,
-+    MODE_EXT_1000X_100FX,
-+    MODE_EXT_1000X,
-+    MODE_EXT_100FX,
-+    MODE_EXT_RGMII_2,
-+    MODE_EXT_MII_MAC_2,
-+    MODE_EXT_MII_PHY_2,
-+    MODE_EXT_TMII_MAC_2,
-+    MODE_EXT_TMII_PHY_2,
-+    MODE_EXT_RMII_MAC_2,
-+    MODE_EXT_RMII_PHY_2,
-+    MODE_EXT_END
-+} rtk_mode_ext_t;
-+
-+typedef enum rtk_port_duplex_e
-+{
-+    PORT_HALF_DUPLEX = 0,
-+    PORT_FULL_DUPLEX,
-+    PORT_DUPLEX_END
-+} rtk_port_duplex_t;
-+
-+typedef enum rtk_port_linkStatus_e
-+{
-+    PORT_LINKDOWN = 0,
-+    PORT_LINKUP,
-+    PORT_LINKSTATUS_END
-+} rtk_port_linkStatus_t;
-+
-+typedef struct  rtk_port_mac_ability_s
-+{
-+    rtk_uint32 forcemode;
-+    rtk_uint32 speed;
-+    rtk_uint32 duplex;
-+    rtk_uint32 link;
-+    rtk_uint32 nway;
-+    rtk_uint32 txpause;
-+    rtk_uint32 rxpause;
-+}rtk_port_mac_ability_t;
-+
-+typedef struct rtk_port_phy_ability_s
-+{
-+    rtk_uint32    AutoNegotiation;  /*PHY register 0.12 setting for auto-negotiation process*/
-+    rtk_uint32    Half_10;          /*PHY register 4.5 setting for 10BASE-TX half duplex capable*/
-+    rtk_uint32    Full_10;          /*PHY register 4.6 setting for 10BASE-TX full duplex capable*/
-+    rtk_uint32    Half_100;         /*PHY register 4.7 setting for 100BASE-TX half duplex capable*/
-+    rtk_uint32    Full_100;         /*PHY register 4.8 setting for 100BASE-TX full duplex capable*/
-+    rtk_uint32    Full_1000;        /*PHY register 9.9 setting for 1000BASE-T full duplex capable*/
-+    rtk_uint32    FC;               /*PHY register 4.10 setting for flow control capability*/
-+    rtk_uint32    AsyFC;            /*PHY register 4.11 setting for  asymmetric flow control capability*/
-+} rtk_port_phy_ability_t;
-+
-+typedef rtk_uint32  rtk_port_phy_data_t;     /* phy page  */
-+
-+typedef enum rtk_port_phy_mdix_mode_e
-+{
-+    PHY_AUTO_CROSSOVER_MODE= 0,
-+    PHY_FORCE_MDI_MODE,
-+    PHY_FORCE_MDIX_MODE,
-+    PHY_FORCE_MODE_END
-+} rtk_port_phy_mdix_mode_t;
-+
-+typedef enum rtk_port_phy_mdix_status_e
-+{
-+    PHY_STATUS_AUTO_MDI_MODE= 0,
-+    PHY_STATUS_AUTO_MDIX_MODE,
-+    PHY_STATUS_FORCE_MDI_MODE,
-+    PHY_STATUS_FORCE_MDIX_MODE,
-+    PHY_STATUS_FORCE_MODE_END
-+} rtk_port_phy_mdix_status_t;
-+
-+typedef rtk_uint32  rtk_port_phy_page_t;     /* phy page  */
-+
-+typedef enum rtk_port_phy_reg_e
-+{
-+    PHY_REG_CONTROL             = 0,
-+    PHY_REG_STATUS,
-+    PHY_REG_IDENTIFIER_1,
-+    PHY_REG_IDENTIFIER_2,
-+    PHY_REG_AN_ADVERTISEMENT,
-+    PHY_REG_AN_LINKPARTNER,
-+    PHY_REG_1000_BASET_CONTROL  = 9,
-+    PHY_REG_1000_BASET_STATUS,
-+    PHY_REG_END                 = 32
-+} rtk_port_phy_reg_t;
-+
-+typedef enum rtk_port_phy_test_mode_e
-+{
-+    PHY_TEST_MODE_NORMAL= 0,
-+    PHY_TEST_MODE_1,
-+    PHY_TEST_MODE_2,
-+    PHY_TEST_MODE_3,
-+    PHY_TEST_MODE_4,
-+    PHY_TEST_MODE_END
-+} rtk_port_phy_test_mode_t;
-+
-+typedef enum rtk_port_speed_e
-+{
-+    PORT_SPEED_10M = 0,
-+    PORT_SPEED_100M,
-+    PORT_SPEED_1000M,
-+    PORT_SPEED_500M,
-+    PORT_SPEED_2500M,
-+    PORT_SPEED_END
-+} rtk_port_speed_t;
-+
-+typedef enum rtk_port_media_e
-+{
-+    PORT_MEDIA_COPPER = 0,
-+    PORT_MEDIA_FIBER,
-+    PORT_MEDIA_END
-+}rtk_port_media_t;
-+
-+typedef struct rtk_rtctResult_s
-+{
-+    rtk_port_speed_t    linkType;
-+    union
-+    {
-+        struct fe_result_s
-+        {
-+            rtk_uint32      isRxShort;
-+            rtk_uint32      isTxShort;
-+            rtk_uint32      isRxOpen;
-+            rtk_uint32      isTxOpen;
-+            rtk_uint32      isRxMismatch;
-+            rtk_uint32      isTxMismatch;
-+            rtk_uint32      isRxLinedriver;
-+            rtk_uint32      isTxLinedriver;
-+            rtk_uint32      rxLen;
-+            rtk_uint32      txLen;
-+        } fe_result;
-+
-+        struct ge_result_s
-+        {
-+            rtk_uint32      channelAShort;
-+            rtk_uint32      channelBShort;
-+            rtk_uint32      channelCShort;
-+            rtk_uint32      channelDShort;
-+
-+            rtk_uint32      channelAOpen;
-+            rtk_uint32      channelBOpen;
-+            rtk_uint32      channelCOpen;
-+            rtk_uint32      channelDOpen;
-+
-+            rtk_uint32      channelAMismatch;
-+            rtk_uint32      channelBMismatch;
-+            rtk_uint32      channelCMismatch;
-+            rtk_uint32      channelDMismatch;
-+
-+            rtk_uint32      channelALinedriver;
-+            rtk_uint32      channelBLinedriver;
-+            rtk_uint32      channelCLinedriver;
-+            rtk_uint32      channelDLinedriver;
-+
-+            rtk_uint32      channelALen;
-+            rtk_uint32      channelBLen;
-+            rtk_uint32      channelCLen;
-+            rtk_uint32      channelDLen;
-+        } ge_result;
-+    }result;
-+} rtk_rtctResult_t;
-+
-+/* Function Name:
-+ *      rtk_port_phyAutoNegoAbility_set
-+ * Description:
-+ *      Set ethernet PHY auto-negotiation desired ability.
-+ * Input:
-+ *      port        - port id.
-+ *      pAbility    - Ability structure
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_PHY_REG_ID       - Invalid PHY address
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      If Full_1000 bit is set to 1, the AutoNegotiation will be automatic set to 1. While both AutoNegotiation and Full_1000 are set to 0, the PHY speed and duplex selection will
-+ *      be set as following 100F > 100H > 10F > 10H priority sequence.
-+ */
-+extern rtk_api_ret_t rtk_port_phyAutoNegoAbility_set(rtk_port_t port, rtk_port_phy_ability_t *pAbility);
-+
-+/* Function Name:
-+ *      rtk_port_phyAutoNegoAbility_get
-+ * Description:
-+ *      Get PHY ability through PHY registers.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pAbility - Ability structure
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_PHY_REG_ID       - Invalid PHY address
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      Get the capablity of specified PHY.
-+ */
-+extern rtk_api_ret_t rtk_port_phyAutoNegoAbility_get(rtk_port_t port, rtk_port_phy_ability_t *pAbility);
-+
-+/* Function Name:
-+ *      rtk_port_phyForceModeAbility_set
-+ * Description:
-+ *      Set the port speed/duplex mode/pause/asy_pause in the PHY force mode.
-+ * Input:
-+ *      port        - port id.
-+ *      pAbility    - Ability structure
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_PHY_REG_ID       - Invalid PHY address
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      While both AutoNegotiation and Full_1000 are set to 0, the PHY speed and duplex selection will
-+ *      be set as following 100F > 100H > 10F > 10H priority sequence.
-+ */
-+extern rtk_api_ret_t rtk_port_phyForceModeAbility_set(rtk_port_t port, rtk_port_phy_ability_t *pAbility);
-+
-+/* Function Name:
-+ *      rtk_port_phyForceModeAbility_get
-+ * Description:
-+ *      Get PHY ability through PHY registers.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pAbility - Ability structure
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_PHY_REG_ID       - Invalid PHY address
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      Get the capablity of specified PHY.
-+ */
-+extern rtk_api_ret_t rtk_port_phyForceModeAbility_get(rtk_port_t port, rtk_port_phy_ability_t *pAbility);
-+
-+/* Function Name:
-+ *      rtk_port_phyStatus_get
-+ * Description:
-+ *      Get ethernet PHY linking status
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      linkStatus  - PHY link status
-+ *      speed       - PHY link speed
-+ *      duplex      - PHY duplex mode
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_PHY_REG_ID       - Invalid PHY address
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      API will return auto negotiation status of phy.
-+ */
-+extern rtk_api_ret_t rtk_port_phyStatus_get(rtk_port_t port, rtk_port_linkStatus_t *pLinkStatus, rtk_port_speed_t *pSpeed, rtk_port_duplex_t *pDuplex);
-+
-+/* Function Name:
-+ *      rtk_port_macForceLink_set
-+ * Description:
-+ *      Set port force linking configuration.
-+ * Input:
-+ *      port            - port id.
-+ *      pPortability    - port ability configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API can set Port/MAC force mode properties.
-+ */
-+extern rtk_api_ret_t rtk_port_macForceLink_set(rtk_port_t port, rtk_port_mac_ability_t *pPortability);
-+
-+/* Function Name:
-+ *      rtk_port_macForceLink_get
-+ * Description:
-+ *      Get port force linking configuration.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pPortability - port ability configuration
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can get Port/MAC force mode properties.
-+ */
-+extern rtk_api_ret_t rtk_port_macForceLink_get(rtk_port_t port, rtk_port_mac_ability_t *pPortability);
-+
-+/* Function Name:
-+ *      rtk_port_macForceLinkExt_set
-+ * Description:
-+ *      Set external interface force linking configuration.
-+ * Input:
-+ *      port            - external port ID
-+ *      mode            - external interface mode
-+ *      pPortability    - port ability configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can set external interface force mode properties.
-+ *      The external interface can be set to:
-+ *      - MODE_EXT_DISABLE,
-+ *      - MODE_EXT_RGMII,
-+ *      - MODE_EXT_MII_MAC,
-+ *      - MODE_EXT_MII_PHY,
-+ *      - MODE_EXT_TMII_MAC,
-+ *      - MODE_EXT_TMII_PHY,
-+ *      - MODE_EXT_GMII,
-+ *      - MODE_EXT_RMII_MAC,
-+ *      - MODE_EXT_RMII_PHY,
-+ *      - MODE_EXT_SGMII,
-+ *      - MODE_EXT_HSGMII,
-+ *      - MODE_EXT_1000X_100FX,
-+ *      - MODE_EXT_1000X,
-+ *      - MODE_EXT_100FX,
-+ */
-+extern rtk_api_ret_t rtk_port_macForceLinkExt_set(rtk_port_t port, rtk_mode_ext_t mode, rtk_port_mac_ability_t *pPortability);
-+
-+/* Function Name:
-+ *      rtk_port_macForceLinkExt_get
-+ * Description:
-+ *      Set external interface force linking configuration.
-+ * Input:
-+ *      port            - external port ID
-+ * Output:
-+ *      pMode           - external interface mode
-+ *      pPortability    - port ability configuration
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can get external interface force mode properties.
-+ */
-+extern rtk_api_ret_t rtk_port_macForceLinkExt_get(rtk_port_t port, rtk_mode_ext_t *pMode, rtk_port_mac_ability_t *pPortability);
-+
-+/* Function Name:
-+ *      rtk_port_macStatus_get
-+ * Description:
-+ *      Get port link status.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pPortstatus - port ability configuration
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API can get Port/PHY properties.
-+ */
-+extern rtk_api_ret_t rtk_port_macStatus_get(rtk_port_t port, rtk_port_mac_ability_t *pPortstatus);
-+
-+/* Function Name:
-+ *      rtk_port_macLocalLoopbackEnable_set
-+ * Description:
-+ *      Set Port Local Loopback. (Redirect TX to RX.)
-+ * Input:
-+ *      port    - Port id.
-+ *      enable  - Loopback state, 0:disable, 1:enable
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API can enable/disable Local loopback in MAC.
-+ *      For UTP port, This API will also enable the digital
-+ *      loopback bit in PHY register for sync of speed between
-+ *      PHY and MAC. For EXT port, users need to force the
-+ *      link state by themself.
-+ */
-+extern rtk_api_ret_t rtk_port_macLocalLoopbackEnable_set(rtk_port_t port, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_port_macLocalLoopbackEnable_get
-+ * Description:
-+ *      Get Port Local Loopback. (Redirect TX to RX.)
-+ * Input:
-+ *      port    - Port id.
-+ * Output:
-+ *      pEnable  - Loopback state, 0:disable, 1:enable
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      None.
-+ */
-+extern rtk_api_ret_t rtk_port_macLocalLoopbackEnable_get(rtk_port_t port, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_port_phyReg_set
-+ * Description:
-+ *      Set PHY register data of the specific port.
-+ * Input:
-+ *      port    - port id.
-+ *      reg     - Register id
-+ *      regData - Register data
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_PHY_REG_ID       - Invalid PHY address
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      This API can set PHY register data of the specific port.
-+ */
-+extern rtk_api_ret_t rtk_port_phyReg_set(rtk_port_t port, rtk_port_phy_reg_t reg, rtk_port_phy_data_t value);
-+
-+/* Function Name:
-+ *      rtk_port_phyReg_get
-+ * Description:
-+ *      Get PHY register data of the specific port.
-+ * Input:
-+ *      port    - Port id.
-+ *      reg     - Register id
-+ * Output:
-+ *      pData   - Register data
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_PHY_REG_ID       - Invalid PHY address
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      This API can get PHY register data of the specific port.
-+ */
-+extern rtk_api_ret_t rtk_port_phyReg_get(rtk_port_t port, rtk_port_phy_reg_t reg, rtk_port_phy_data_t *pData);
-+
-+/* Function Name:
-+ *      rtk_port_backpressureEnable_set
-+ * Description:
-+ *      Set the half duplex backpressure enable status of the specific port.
-+ * Input:
-+ *      port    - port id.
-+ *      enable  - Back pressure status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      This API can set the half duplex backpressure enable status of the specific port.
-+ *      The half duplex backpressure enable status of the port is as following:
-+ *      - DISABLE
-+ *      - ENABLE
-+ */
-+extern rtk_api_ret_t rtk_port_backpressureEnable_set(rtk_port_t port, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_port_backpressureEnable_get
-+ * Description:
-+ *      Get the half duplex backpressure enable status of the specific port.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - Back pressure status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API can get the half duplex backpressure enable status of the specific port.
-+ *      The half duplex backpressure enable status of the port is as following:
-+ *      - DISABLE
-+ *      - ENABLE
-+ */
-+extern rtk_api_ret_t rtk_port_backpressureEnable_get(rtk_port_t port, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_port_adminEnable_set
-+ * Description:
-+ *      Set port admin configuration of the specific port.
-+ * Input:
-+ *      port    - port id.
-+ *      enable  - Back pressure status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      This API can set port admin configuration of the specific port.
-+ *      The port admin configuration of the port is as following:
-+ *      - DISABLE
-+ *      - ENABLE
-+ */
-+extern rtk_api_ret_t rtk_port_adminEnable_set(rtk_port_t port, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_port_adminEnable_get
-+ * Description:
-+ *      Get port admin configurationof the specific port.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - Back pressure status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API can get port admin configuration of the specific port.
-+ *      The port admin configuration of the port is as following:
-+ *      - DISABLE
-+ *      - ENABLE
-+ */
-+extern rtk_api_ret_t rtk_port_adminEnable_get(rtk_port_t port, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_port_isolation_set
-+ * Description:
-+ *      Set permitted port isolation portmask
-+ * Input:
-+ *      port         - port id.
-+ *      pPortmask    - Permit port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_PORT_MASK    - Invalid portmask.
-+ * Note:
-+ *      This API set the port mask that a port can trasmit packet to of each port
-+ *      A port can only transmit packet to ports included in permitted portmask
-+ */
-+extern rtk_api_ret_t rtk_port_isolation_set(rtk_port_t port, rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_port_isolation_get
-+ * Description:
-+ *      Get permitted port isolation portmask
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pPortmask - Permit port mask
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API get the port mask that a port can trasmit packet to of each port
-+ *      A port can only transmit packet to ports included in permitted portmask
-+ */
-+extern rtk_api_ret_t rtk_port_isolation_get(rtk_port_t port, rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_port_rgmiiDelayExt_set
-+ * Description:
-+ *      Set RGMII interface delay value for TX and RX.
-+ * Input:
-+ *      txDelay - TX delay value, 1 for delay 2ns and 0 for no-delay
-+ *      rxDelay - RX delay value, 0~7 for delay setup.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can set external interface 2 RGMII delay.
-+ *      In TX delay, there are 2 selection: no-delay and 2ns delay.
-+ *      In RX dekay, there are 8 steps for delay tunning. 0 for no-delay, and 7 for maximum delay.
-+ */
-+extern rtk_api_ret_t rtk_port_rgmiiDelayExt_set(rtk_port_t port, rtk_data_t txDelay, rtk_data_t rxDelay);
-+
-+/* Function Name:
-+ *      rtk_port_rgmiiDelayExt_get
-+ * Description:
-+ *      Get RGMII interface delay value for TX and RX.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pTxDelay - TX delay value
-+ *      pRxDelay - RX delay value
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can set external interface 2 RGMII delay.
-+ *      In TX delay, there are 2 selection: no-delay and 2ns delay.
-+ *      In RX dekay, there are 8 steps for delay tunning. 0 for n0-delay, and 7 for maximum delay.
-+ */
-+extern rtk_api_ret_t rtk_port_rgmiiDelayExt_get(rtk_port_t port, rtk_data_t *pTxDelay, rtk_data_t *pRxDelay);
-+
-+/* Function Name:
-+ *      rtk_port_phyEnableAll_set
-+ * Description:
-+ *      Set all PHY enable status.
-+ * Input:
-+ *      enable - PHY Enable State.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      This API can set all PHY status.
-+ *      The configuration of all PHY is as following:
-+ *      - DISABLE
-+ *      - ENABLE
-+ */
-+extern rtk_api_ret_t rtk_port_phyEnableAll_set(rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_port_phyEnableAll_get
-+ * Description:
-+ *      Get all PHY enable status.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnable - PHY Enable State.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      This API can set all PHY status.
-+ *      The configuration of all PHY is as following:
-+ *      - DISABLE
-+ *      - ENABLE
-+ */
-+extern rtk_api_ret_t rtk_port_phyEnableAll_get(rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_port_efid_set
-+ * Description:
-+ *      Set port-based enhanced filtering database
-+ * Input:
-+ *      port - Port id.
-+ *      efid - Specified enhanced filtering database.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_L2_FID - Invalid fid.
-+ *      RT_ERR_INPUT - Invalid input parameter.
-+ *      RT_ERR_PORT_ID - Invalid port ID.
-+ * Note:
-+ *      The API can set port-based enhanced filtering database.
-+ */
-+extern rtk_api_ret_t rtk_port_efid_set(rtk_port_t port, rtk_data_t efid);
-+
-+/* Function Name:
-+ *      rtk_port_efid_get
-+ * Description:
-+ *      Get port-based enhanced filtering database
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEfid - Specified enhanced filtering database.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT - Invalid input parameters.
-+ *      RT_ERR_PORT_ID - Invalid port ID.
-+ * Note:
-+ *      The API can get port-based enhanced filtering database status.
-+ */
-+extern rtk_api_ret_t rtk_port_efid_get(rtk_port_t port, rtk_data_t *pEfid);
-+
-+/* Function Name:
-+ *      rtk_port_phyComboPortMedia_set
-+ * Description:
-+ *      Set Combo port media type
-+ * Input:
-+ *      port    - Port id. (Should be Port 4)
-+ *      media   - Media (COPPER or FIBER)
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_PORT_ID          - Invalid port ID.
-+ * Note:
-+ *      The API can Set Combo port media type.
-+ */
-+extern rtk_api_ret_t rtk_port_phyComboPortMedia_set(rtk_port_t port, rtk_port_media_t media);
-+
-+/* Function Name:
-+ *      rtk_port_phyComboPortMedia_get
-+ * Description:
-+ *      Get Combo port media type
-+ * Input:
-+ *      port    - Port id. (Should be Port 4)
-+ * Output:
-+ *      pMedia  - Media (COPPER or FIBER)
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_PORT_ID          - Invalid port ID.
-+ * Note:
-+ *      The API can Set Combo port media type.
-+ */
-+extern rtk_api_ret_t rtk_port_phyComboPortMedia_get(rtk_port_t port, rtk_port_media_t *pMedia);
-+
-+/* Function Name:
-+ *      rtk_port_rtctEnable_set
-+ * Description:
-+ *      Enable RTCT test
-+ * Input:
-+ *      pPortmask    - Port mask of RTCT enabled port
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_MASK        - Invalid port mask.
-+ * Note:
-+ *      The API can enable RTCT Test
-+ */
-+extern rtk_api_ret_t rtk_port_rtctEnable_set(rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_port_rtctDisable_set
-+ * Description:
-+ *      Disable RTCT test
-+ * Input:
-+ *      pPortmask    - Port mask of RTCT disabled port
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_MASK        - Invalid port mask.
-+ * Note:
-+ *      The API can disable RTCT Test
-+ */
-+rtk_api_ret_t rtk_port_rtctDisable_set(rtk_portmask_t *pPortmask);
-+
-+
-+/* Function Name:
-+ *      rtk_port_rtctResult_get
-+ * Description:
-+ *      Get the result of RTCT test
-+ * Input:
-+ *      port        - Port ID
-+ * Output:
-+ *      pRtctResult - The result of RTCT result
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port ID.
-+ *      RT_ERR_PHY_RTCT_NOT_FINISH  - Testing does not finish.
-+ * Note:
-+ *      The API can get RTCT test result.
-+ *      RTCT test may takes 4.8 seconds to finish its test at most.
-+ *      Thus, if this API return RT_ERR_PHY_RTCT_NOT_FINISH or
-+ *      other error code, the result can not be referenced and
-+ *      user should call this API again until this API returns
-+ *      a RT_ERR_OK.
-+ *      The result is stored at pRtctResult->ge_result
-+ *      pRtctResult->linkType is unused.
-+ *      The unit of channel length is 2.5cm. Ex. 300 means 300 * 2.5 = 750cm = 7.5M
-+ */
-+extern rtk_api_ret_t rtk_port_rtctResult_get(rtk_port_t port, rtk_rtctResult_t *pRtctResult);
-+
-+/* Function Name:
-+ *      rtk_port_sds_reset
-+ * Description:
-+ *      Reset Serdes
-+ * Input:
-+ *      port        - Port ID
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port ID.
-+ * Note:
-+ *      The API can reset Serdes
-+ */
-+extern rtk_api_ret_t rtk_port_sds_reset(rtk_port_t port);
-+
-+/* Function Name:
-+ *      rtk_port_sgmiiLinkStatus_get
-+ * Description:
-+ *      Get SGMII status
-+ * Input:
-+ *      port        - Port ID
-+ * Output:
-+ *      pSignalDetect   - Signal detect
-+ *      pSync           - Sync
-+ *      pLink           - Link
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port ID.
-+ * Note:
-+ *      The API can reset Serdes
-+ */
-+extern rtk_api_ret_t rtk_port_sgmiiLinkStatus_get(rtk_port_t port, rtk_data_t *pSignalDetect, rtk_data_t *pSync, rtk_port_linkStatus_t *pLink);
-+
-+/* Function Name:
-+ *      rtk_port_sgmiiNway_set
-+ * Description:
-+ *      Configure SGMII/HSGMII port Nway state
-+ * Input:
-+ *      port        - Port ID
-+ *      state       - Nway state
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port ID.
-+ * Note:
-+ *      The API configure SGMII/HSGMII port Nway state
-+ */
-+extern rtk_api_ret_t rtk_port_sgmiiNway_set(rtk_port_t port, rtk_enable_t state);
-+
-+/* Function Name:
-+ *      rtk_port_sgmiiNway_get
-+ * Description:
-+ *      Get SGMII/HSGMII port Nway state
-+ * Input:
-+ *      port        - Port ID
-+ * Output:
-+ *      pState      - Nway state
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port ID.
-+ * Note:
-+ *      The API can get SGMII/HSGMII port Nway state
-+ */
-+extern rtk_api_ret_t rtk_port_sgmiiNway_get(rtk_port_t port, rtk_enable_t *pState);
-+
-+#endif /* __RTK_API_PORT_H__ */
-+
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/ptp.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/ptp.h
-new file mode 100644
-index 0000000000..6c4aca5a58
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/ptp.h
-@@ -0,0 +1,511 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes time module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_PTP_H__
-+#define __RTK_API_PTP_H__
-+
-+/*
-+ * Symbol Definition
-+ */
-+#define RTK_MAX_NUM_OF_NANO_SECOND                     0x3B9AC9FF
-+#define RTK_PTP_INTR_MASK                                          0xFF
-+#define RTK_MAX_NUM_OF_TPID                                    0xFFFF
-+
-+/* Message Type */
-+typedef enum rtk_ptp_msgType_e
-+{
-+    PTP_MSG_TYPE_TX_SYNC = 0,
-+    PTP_MSG_TYPE_TX_DELAY_REQ,
-+    PTP_MSG_TYPE_TX_PDELAY_REQ,
-+    PTP_MSG_TYPE_TX_PDELAY_RESP,
-+    PTP_MSG_TYPE_RX_SYNC,
-+    PTP_MSG_TYPE_RX_DELAY_REQ,
-+    PTP_MSG_TYPE_RX_PDELAY_REQ,
-+    PTP_MSG_TYPE_RX_PDELAY_RESP,
-+    PTP_MSG_TYPE_END
-+} rtk_ptp_msgType_t;
-+
-+typedef enum rtk_ptp_intType_e
-+{
-+    PTP_INT_TYPE_TX_SYNC = 0,
-+    PTP_INT_TYPE_TX_DELAY_REQ,
-+    PTP_INT_TYPE_TX_PDELAY_REQ,
-+    PTP_INT_TYPE_TX_PDELAY_RESP,
-+    PTP_INT_TYPE_RX_SYNC,
-+    PTP_INT_TYPE_RX_DELAY_REQ,
-+    PTP_INT_TYPE_RX_PDELAY_REQ,
-+    PTP_INT_TYPE_RX_PDELAY_RESP,
-+    PTP_INT_TYPE_ALL,
-+    PTP_INT_TYPE_END
-+}rtk_ptp_intType_t;
-+
-+typedef enum rtk_ptp_sys_adjust_e
-+{
-+    SYS_ADJUST_PLUS = 0,
-+    SYS_ADJUST_MINUS,
-+    SYS_ADJUST_END
-+} rtk_ptp_sys_adjust_t;
-+
-+
-+/* Reference Time */
-+typedef struct rtk_ptp_timeStamp_s
-+{
-+    rtk_uint32 sec;
-+    rtk_uint32 nsec;
-+} rtk_ptp_timeStamp_t;
-+
-+typedef struct rtk_ptp_info_s
-+{
-+    rtk_uint32 sequenceId;
-+    rtk_ptp_timeStamp_t   timeStamp;
-+} rtk_ptp_info_t;
-+
-+typedef rtk_uint32 rtk_ptp_tpid_t;
-+
-+typedef rtk_uint32  rtk_ptp_intStatus_t;     /* interrupt status mask  */
-+
-+/*
-+ * Data Declaration
-+ */
-+
-+/*
-+ * Function Declaration
-+ */
-+/* Function Name:
-+ *      rtk_time_init
-+ * Description:
-+ *      PTP function initialization.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API is used to initialize EEE status.
-+ */
-+extern rtk_api_ret_t rtk_ptp_init(void);
-+
-+/* Function Name:
-+ *      rtk_ptp_mac_set
-+ * Description:
-+ *      Configure PTP mac address.
-+ * Input:
-+ *      mac - mac address to parser PTP packets.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_ptp_mac_set(rtk_mac_t mac);
-+
-+/* Function Name:
-+ *      rtk_ptp_mac_get
-+ * Description:
-+ *      Get PTP mac address.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pMac - mac address to parser PTP packets.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_ptp_mac_get(rtk_mac_t *pMac);
-+
-+/* Function Name:
-+ *      rtk_ptp_tpid_set
-+ * Description:
-+ *      Configure PTP accepted outer & inner tag TPID.
-+ * Input:
-+ *      outerId - Ether type of S-tag frame parsing in PTP ports.
-+ *      innerId - Ether type of C-tag frame parsing in PTP ports.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_ptp_tpid_set(rtk_ptp_tpid_t outerId, rtk_ptp_tpid_t innerId);
-+
-+/* Function Name:
-+ *      rtk_ptp_tpid_get
-+ * Description:
-+ *      Get PTP accepted outer & inner tag TPID.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pOuterId - Ether type of S-tag frame parsing in PTP ports.
-+ *      pInnerId - Ether type of C-tag frame parsing in PTP ports.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_ptp_tpid_get(rtk_ptp_tpid_t *pOuterId, rtk_ptp_tpid_t *pInnerId);
-+
-+/* Function Name:
-+ *      rtk_ptp_refTime_set
-+ * Description:
-+ *      Set the reference time of the specified device.
-+ * Input:
-+ *      timeStamp - reference timestamp value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT    - invalid input parameter
-+ * Applicable:
-+ *      8390, 8380
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_ptp_refTime_set(rtk_ptp_timeStamp_t timeStamp);
-+
-+/* Function Name:
-+ *      rtk_ptp_refTime_get
-+ * Description:
-+ *      Get the reference time of the specified device.
-+ * Input:
-+ * Output:
-+ *      pTimeStamp - pointer buffer of the reference time
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_UNIT_ID      - invalid unit id
-+ *      RT_ERR_NOT_INIT     - The module is not initial
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Applicable:
-+ *      8390, 8380
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_ptp_refTime_get(rtk_ptp_timeStamp_t *pTimeStamp);
-+
-+/* Function Name:
-+ *      rtk_ptp_refTimeAdjust_set
-+ * Description:
-+ *      Adjust the reference time.
-+ * Input:
-+ *      unit      - unit id
-+ *      sign      - significant
-+ *      timeStamp - reference timestamp value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_UNIT_ID  - invalid unit id
-+ *      RT_ERR_NOT_INIT - The module is not initial
-+ *      RT_ERR_INPUT    - invalid input parameter
-+ * Note:
-+ *      sign=0 for positive adjustment, sign=1 for negative adjustment.
-+ */
-+extern rtk_api_ret_t rtk_ptp_refTimeAdjust_set(rtk_ptp_sys_adjust_t sign, rtk_ptp_timeStamp_t timeStamp);
-+
-+/* Function Name:
-+ *      rtk_ptp_refTimeEnable_set
-+ * Description:
-+ *      Set the enable state of reference time of the specified device.
-+ * Input:
-+ *      enable - status
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT    - invalid input parameter
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_ptp_refTimeEnable_set(rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_ptp_refTimeEnable_get
-+ * Description:
-+ *      Get the enable state of reference time of the specified device.
-+ * Input:
-+ * Output:
-+ *      pEnable - status
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_UNIT_ID      - invalid unit id
-+ *      RT_ERR_NOT_INIT     - The module is not initial
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Applicable:
-+ *      8390, 8380
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_ptp_refTimeEnable_get(rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_ptp_portEnable_set
-+ * Description:
-+ *      Set PTP status of the specified port.
-+ * Input:
-+ *      port   - port id
-+ *      enable - status
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT     - invalid port id
-+ *      RT_ERR_INPUT    - invalid input parameter
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_ptp_portEnable_set(rtk_port_t port, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_ptp_portEnable_get
-+ * Description:
-+ *      Get PTP status of the specified port.
-+ * Input:
-+ *      port    - port id
-+ * Output:
-+ *      pEnable - status
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT         - invalid port id
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_ptp_portEnable_get(rtk_port_t port, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_ptp_portTimestamp_get
-+ * Description:
-+ *      Get PTP timstamp according to the PTP identifier on the dedicated port from the specified device.
-+ * Input:
-+ *      unit       - unit id
-+ *      port       - port id
-+ *      type       - PTP message type
-+ * Output:
-+ *      pInfo      - pointer buffer of sequence ID and timestamp
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID      - invalid port id
-+ *      RT_ERR_INPUT        - invalid input parameter
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Applicable:
-+ *      8390, 8380
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_ptp_portTimestamp_get( rtk_port_t port, rtk_ptp_msgType_t type, rtk_ptp_info_t *pInfo);
-+
-+/* Function Name:
-+ *      rtk_ptp_intControl_set
-+ * Description:
-+ *      Set PTP interrupt trigger status configuration.
-+ * Input:
-+ *      type - Interrupt type.
-+ *      enable - Interrupt status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      The API can set PTP interrupt status configuration.
-+ *      The interrupt trigger status is shown in the following:
-+ *          PTP_INT_TYPE_TX_SYNC = 0,
-+ *          PTP_INT_TYPE_TX_DELAY_REQ,
-+ *          PTP_INT_TYPE_TX_PDELAY_REQ,
-+ *          PTP_INT_TYPE_TX_PDELAY_RESP,
-+ *          PTP_INT_TYPE_RX_SYNC,
-+ *          PTP_INT_TYPE_RX_DELAY_REQ,
-+ *          PTP_INT_TYPE_RX_PDELAY_REQ,
-+ *          PTP_INT_TYPE_RX_PDELAY_RESP,
-+ *          PTP_INT_TYPE_ALL,
-+ */
-+extern rtk_api_ret_t rtk_ptp_intControl_set(rtk_ptp_intType_t type, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_ptp_intControl_get
-+ * Description:
-+ *      Get PTP interrupt trigger status configuration.
-+ * Input:
-+ *      type - Interrupt type.
-+ * Output:
-+ *      pEnable - Interrupt status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get interrupt status configuration.
-+ *      The interrupt trigger status is shown in the following:
-+ *          PTP_INT_TYPE_TX_SYNC = 0,
-+ *          PTP_INT_TYPE_TX_DELAY_REQ,
-+ *          PTP_INT_TYPE_TX_PDELAY_REQ,
-+ *          PTP_INT_TYPE_TX_PDELAY_RESP,
-+ *          PTP_INT_TYPE_RX_SYNC,
-+ *          PTP_INT_TYPE_RX_DELAY_REQ,
-+ *          PTP_INT_TYPE_RX_PDELAY_REQ,
-+ *          PTP_INT_TYPE_RX_PDELAY_RESP,
-+ */
-+extern rtk_api_ret_t rtk_ptp_intControl_get(rtk_ptp_intType_t type, rtk_enable_t *pEnable);
-+
-+
-+/* Function Name:
-+ *      rtk_ptp_intStatus_get
-+ * Description:
-+ *      Get PTP port interrupt trigger status.
-+ * Input:
-+ *      port           - physical port
-+ * Output:
-+ *      pStatusMask - Interrupt status bit mask.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get interrupt trigger status when interrupt happened.
-+ *      The interrupt trigger status is shown in the following:
-+ *      - PORT 0  INT    (value[0] (Bit0))
-+ *      - PORT 1  INT    (value[0] (Bit1))
-+ *      - PORT 2  INT    (value[0] (Bit2))
-+ *      - PORT 3  INT    (value[0] (Bit3))
-+ *      - PORT 4  INT   (value[0] (Bit4))
-+
-+ *
-+ */
-+extern rtk_api_ret_t rtk_ptp_intStatus_get(rtk_ptp_intStatus_t *pStatusMask);
-+
-+/* Function Name:
-+ *      rtk_ptp_portIntStatus_set
-+ * Description:
-+ *      Set PTP port interrupt trigger status to clean.
-+ * Input:
-+ *      port           - physical port
-+ *      statusMask - Interrupt status bit mask.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT - Invalid input parameters.
-+ * Note:
-+ *      The API can clean interrupt trigger status when interrupt happened.
-+ *      The interrupt trigger status is shown in the following:
-+ *      - PTP_INT_TYPE_TX_SYNC              (value[0] (Bit0))
-+ *      - PTP_INT_TYPE_TX_DELAY_REQ      (value[0] (Bit1))
-+ *      - PTP_INT_TYPE_TX_PDELAY_REQ    (value[0] (Bit2))
-+ *      - PTP_INT_TYPE_TX_PDELAY_RESP   (value[0] (Bit3))
-+ *      - PTP_INT_TYPE_RX_SYNC              (value[0] (Bit4))
-+ *      - PTP_INT_TYPE_RX_DELAY_REQ      (value[0] (Bit5))
-+ *      - PTP_INT_TYPE_RX_PDELAY_REQ    (value[0] (Bit6))
-+ *      - PTP_INT_TYPE_RX_PDELAY_RESP   (value[0] (Bit7))
-+ *      The status will be cleared after execute this API.
-+ */
-+extern rtk_api_ret_t rtk_ptp_portIntStatus_set(rtk_port_t port, rtk_ptp_intStatus_t statusMask);
-+
-+/* Function Name:
-+ *      rtk_ptp_portIntStatus_get
-+ * Description:
-+ *      Get PTP port interrupt trigger status.
-+ * Input:
-+ *      port           - physical port
-+ * Output:
-+ *      pStatusMask - Interrupt status bit mask.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get interrupt trigger status when interrupt happened.
-+ *      The interrupt trigger status is shown in the following:
-+ *      - PTP_INT_TYPE_TX_SYNC              (value[0] (Bit0))
-+ *      - PTP_INT_TYPE_TX_DELAY_REQ      (value[0] (Bit1))
-+ *      - PTP_INT_TYPE_TX_PDELAY_REQ    (value[0] (Bit2))
-+ *      - PTP_INT_TYPE_TX_PDELAY_RESP   (value[0] (Bit3))
-+ *      - PTP_INT_TYPE_RX_SYNC              (value[0] (Bit4))
-+ *      - PTP_INT_TYPE_RX_DELAY_REQ      (value[0] (Bit5))
-+ *      - PTP_INT_TYPE_RX_PDELAY_REQ    (value[0] (Bit6))
-+ *      - PTP_INT_TYPE_RX_PDELAY_RESP   (value[0] (Bit7))
-+ *
-+ */
-+extern rtk_api_ret_t rtk_ptp_portIntStatus_get(rtk_port_t port, rtk_ptp_intStatus_t *pStatusMask);
-+
-+/* Function Name:
-+ *      rtk_ptp_portPtpTrap_set
-+ * Description:
-+ *      Set PTP packet trap of the specified port.
-+ * Input:
-+ *      port   - port id
-+ *      enable - status
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT     - invalid port id
-+ *      RT_ERR_INPUT    - invalid input parameter
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_ptp_portTrap_set(rtk_port_t port, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_ptp_portPtpEnable_get
-+ * Description:
-+ *      Get PTP packet trap of the specified port.
-+ * Input:
-+ *      port    - port id
-+ * Output:
-+ *      pEnable - status
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT         - invalid port id
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_ptp_portTrap_get(rtk_port_t port, rtk_enable_t *pEnable);
-+
-+#endif /* __RTK_API_PTP_H__ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/qos.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/qos.h
-new file mode 100644
-index 0000000000..4be417486f
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/qos.h
-@@ -0,0 +1,781 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes QoS module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_QOS_H__
-+#define __RTK_API_QOS_H__
-+
-+/*
-+ * Data Type Declaration
-+ */
-+#define QOS_DEFAULT_TICK_PERIOD                     (19-1)
-+#define QOS_DEFAULT_BYTE_PER_TOKEN                  34
-+#define QOS_DEFAULT_LK_THRESHOLD                    (34*3) /* Why use 0x400? */
-+
-+
-+#define QOS_DEFAULT_INGRESS_BANDWIDTH               0x3FFF /* 0x3FFF => unlimit */
-+#define QOS_DEFAULT_EGRESS_BANDWIDTH                0x3D08 /*( 0x3D08 + 1) * 64Kbps => 1Gbps*/
-+#define QOS_DEFAULT_PREIFP                          1
-+#define QOS_DEFAULT_PACKET_USED_PAGES_FC            0x60
-+#define QOS_DEFAULT_PACKET_USED_FC_EN               0
-+#define QOS_DEFAULT_QUEUE_BASED_FC_EN               1
-+
-+#define QOS_DEFAULT_PRIORITY_SELECT_PORT            8
-+#define QOS_DEFAULT_PRIORITY_SELECT_1Q              0
-+#define QOS_DEFAULT_PRIORITY_SELECT_ACL             0
-+#define QOS_DEFAULT_PRIORITY_SELECT_DSCP            0
-+
-+#define QOS_DEFAULT_DSCP_MAPPING_PRIORITY           0
-+
-+#define QOS_DEFAULT_1Q_REMARKING_ABILITY            0
-+#define QOS_DEFAULT_DSCP_REMARKING_ABILITY          0
-+#define QOS_DEFAULT_QUEUE_GAP                       20
-+#define QOS_DEFAULT_QUEUE_NO_MAX                    6
-+#define QOS_DEFAULT_AVERAGE_PACKET_RATE             0x3FFF
-+#define QOS_DEFAULT_BURST_SIZE_IN_APR               0x3F
-+#define QOS_DEFAULT_PEAK_PACKET_RATE                2
-+#define QOS_DEFAULT_SCHEDULER_ABILITY_APR           1     /*disable*/
-+#define QOS_DEFAULT_SCHEDULER_ABILITY_PPR           1    /*disable*/
-+#define QOS_DEFAULT_SCHEDULER_ABILITY_WFQ           1    /*disable*/
-+
-+#define QOS_WEIGHT_MAX                              127
-+
-+#define RTK_MAX_NUM_OF_PRIORITY                     8
-+#define RTK_MAX_NUM_OF_QUEUE                        8
-+
-+#define RTK_PRIMAX                                             7
-+#define RTK_QIDMAX                                             7
-+#define RTK_DSCPMAX                                         63
-+
-+
-+/* enum Priority Selection Index */
-+typedef enum rtk_qos_priDecTbl_e
-+{
-+    PRIDECTBL_IDX0 = 0,
-+    PRIDECTBL_IDX1,
-+    PRIDECTBL_END,
-+}rtk_qos_priDecTbl_t;
-+
-+
-+/* Types of 802.1p remarking source */
-+typedef enum rtk_qos_1pRmkSrc_e
-+{
-+    DOT1P_RMK_SRC_USER_PRI,
-+    DOT1P_RMK_SRC_TAG_PRI,
-+    DOT1P_RMK_SRC_END
-+} rtk_qos_1pRmkSrc_t;
-+
-+
-+/* Types of DSCP remarking source */
-+typedef enum rtk_qos_dscpRmkSrc_e
-+{
-+    DSCP_RMK_SRC_INT_PRI,
-+    DSCP_RMK_SRC_DSCP,
-+    DSCP_RMK_SRC_USER_PRI,
-+    DSCP_RMK_SRC_END
-+} rtk_qos_dscpRmkSrc_t;
-+
-+
-+
-+
-+typedef struct rtk_priority_select_s
-+{
-+    rtk_uint32 port_pri;
-+    rtk_uint32 dot1q_pri;
-+    rtk_uint32 acl_pri;
-+    rtk_uint32 dscp_pri;
-+    rtk_uint32 cvlan_pri;
-+    rtk_uint32 svlan_pri;
-+    rtk_uint32 dmac_pri;
-+    rtk_uint32 smac_pri;
-+} rtk_priority_select_t;
-+
-+typedef struct rtk_qos_pri2queue_s
-+{
-+    rtk_uint32 pri2queue[RTK_MAX_NUM_OF_PRIORITY];
-+} rtk_qos_pri2queue_t;
-+
-+typedef struct rtk_qos_queue_weights_s
-+{
-+    rtk_uint32 weights[RTK_MAX_NUM_OF_QUEUE];
-+} rtk_qos_queue_weights_t;
-+
-+typedef enum rtk_qos_scheduling_type_e
-+{
-+    WFQ = 0,        /* Weighted-Fair-Queue */
-+    WRR,            /* Weighted-Round-Robin */
-+    SCHEDULING_TYPE_END
-+} rtk_qos_scheduling_type_t;
-+
-+typedef rtk_uint32  rtk_queue_num_t;    /* queue number*/
-+
-+/* Function Name:
-+ *      rtk_qos_init
-+ * Description:
-+ *      Configure Qos default settings with queue number assigment to each port.
-+ * Input:
-+ *      queueNum - Queue number of each port.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_QUEUE_NUM    - Invalid queue number.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API will initialize related Qos setting with queue number assigment.
-+ *      The queue number is from 1 to 8.
-+ */
-+extern rtk_api_ret_t rtk_qos_init(rtk_queue_num_t queueNum);
-+
-+/* Function Name:
-+ *      rtk_qos_priSel_set
-+ * Description:
-+ *      Configure the priority order among different priority mechanism.
-+ * Input:
-+ *      index - Priority decision table index (0~1)
-+ *      pPriDec - Priority assign for port, dscp, 802.1p, cvlan, svlan, acl based priority decision.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_QOS_SEL_PRI_SOURCE   - Invalid priority decision source parameter.
-+ * Note:
-+ *      ASIC will follow user priority setting of mechanisms to select mapped queue priority for receiving frame.
-+ *      If two priority mechanisms are the same, the ASIC will chose the highest priority from mechanisms to
-+ *      assign queue priority to receiving frame.
-+ *      The priority sources are:
-+ *      - PRIDEC_PORT
-+ *      - PRIDEC_ACL
-+ *      - PRIDEC_DSCP
-+ *      - PRIDEC_1Q
-+ *      - PRIDEC_1AD
-+ *      - PRIDEC_CVLAN
-+ *      - PRIDEC_DA
-+ *      - PRIDEC_SA
-+ */
-+extern rtk_api_ret_t rtk_qos_priSel_set(rtk_qos_priDecTbl_t index, rtk_priority_select_t *pPriDec);
-+
-+
-+/* Function Name:
-+ *      rtk_qos_priSel_get
-+ * Description:
-+ *      Get the priority order configuration among different priority mechanism.
-+ * Input:
-+ *      index - Priority decision table index (0~1)
-+ * Output:
-+ *      pPriDec - Priority assign for port, dscp, 802.1p, cvlan, svlan, acl based priority decision .
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      ASIC will follow user priority setting of mechanisms to select mapped queue priority for receiving frame.
-+ *      If two priority mechanisms are the same, the ASIC will chose the highest priority from mechanisms to
-+ *      assign queue priority to receiving frame.
-+ *      The priority sources are:
-+ *      - PRIDEC_PORT,
-+ *      - PRIDEC_ACL,
-+ *      - PRIDEC_DSCP,
-+ *      - PRIDEC_1Q,
-+ *      - PRIDEC_1AD,
-+ *      - PRIDEC_CVLAN,
-+ *      - PRIDEC_DA,
-+ *      - PRIDEC_SA,
-+ */
-+extern rtk_api_ret_t rtk_qos_priSel_get(rtk_qos_priDecTbl_t index, rtk_priority_select_t *pPriDec);
-+
-+/* Function Name:
-+ *      rtk_qos_1pPriRemap_set
-+ * Description:
-+ *      Configure 1Q priorities mapping to internal absolute priority.
-+ * Input:
-+ *      dot1p_pri   - 802.1p priority value.
-+ *      int_pri     - internal priority value.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_VLAN_PRIORITY    - Invalid 1p priority.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      Priority of 802.1Q assignment for internal asic priority, and it is used for queue usage and packet scheduling.
-+ */
-+extern rtk_api_ret_t rtk_qos_1pPriRemap_set(rtk_pri_t dot1p_pri, rtk_pri_t int_pri);
-+
-+/* Function Name:
-+ *      rtk_qos_1pPriRemap_get
-+ * Description:
-+ *      Get 1Q priorities mapping to internal absolute priority.
-+ * Input:
-+ *      dot1p_pri - 802.1p priority value .
-+ * Output:
-+ *      pInt_pri - internal priority value.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_VLAN_PRIORITY    - Invalid priority.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      Priority of 802.1Q assigment for internal asic priority, and it is uesed for queue usage and packet scheduling.
-+ */
-+extern rtk_api_ret_t rtk_qos_1pPriRemap_get(rtk_pri_t dot1p_pri, rtk_pri_t *pInt_pri);
-+
-+
-+/* Function Name:
-+ *      rtk_qos_1pRemarkSrcSel_set
-+ * Description:
-+ *      Set remarking source of 802.1p remarking.
-+ * Input:
-+ *      type      - remarking source
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT         - The module is not initial
-+ *      RT_ERR_PORT_ID  - invalid port id
-+ *      RT_ERR_INPUT            - invalid input parameter
-+
-+ * Note:
-+ *      The API can configure 802.1p remark functionality to map original 802.1p value or internal
-+ *      priority to TX DSCP value.
-+ */
-+extern rtk_api_ret_t rtk_qos_1pRemarkSrcSel_set(rtk_qos_1pRmkSrc_t type);
-+
-+/* Function Name:
-+ *      rtk_qos_1pRemarkSrcSel_get
-+ * Description:
-+ *      Get remarking source of 802.1p remarking.
-+ * Input:
-+ *      none
-+ * Output:
-+ *      pType      - remarking source
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT         - The module is not initial
-+ *      RT_ERR_PORT_ID          - invalid port id
-+ *      RT_ERR_INPUT            - invalid input parameter
-+ *      RT_ERR_NULL_POINTER     - input parameter may be null pointer
-+
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_qos_1pRemarkSrcSel_get(rtk_qos_1pRmkSrc_t *pType);
-+
-+/* Function Name:
-+ *      rtk_qos_dscpPriRemap_set
-+ * Description:
-+ *      Map dscp value to internal priority.
-+ * Input:
-+ *      dscp    - Dscp value of receiving frame
-+ *      int_pri - internal priority value .
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_QOS_DSCP_VALUE   - Invalid DSCP value.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      The Differentiated Service Code Point is a selector for router's per-hop behaviors. As a selector, there is no implication that a numerically
-+ *      greater DSCP implies a better network service. As can be seen, the DSCP totally overlaps the old precedence field of TOS. So if values of
-+ *      DSCP are carefully chosen then backward compatibility can be achieved.
-+ */
-+extern rtk_api_ret_t rtk_qos_dscpPriRemap_set(rtk_dscp_t dscp, rtk_pri_t int_pri);
-+
-+/* Function Name:
-+ *      rtk_qos_dscpPriRemap_get
-+ * Description:
-+ *      Get dscp value to internal priority.
-+ * Input:
-+ *      dscp - Dscp value of receiving frame
-+ * Output:
-+ *      pInt_pri - internal priority value.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_DSCP_VALUE   - Invalid DSCP value.
-+ * Note:
-+ *      The Differentiated Service Code Point is a selector for router's per-hop behaviors. As a selector, there is no implication that a numerically
-+ *      greater DSCP implies a better network service. As can be seen, the DSCP totally overlaps the old precedence field of TOS. So if values of
-+ *      DSCP are carefully chosen then backward compatibility can be achieved.
-+ */
-+extern rtk_api_ret_t rtk_qos_dscpPriRemap_get(rtk_dscp_t dscp, rtk_pri_t *pInt_pri);
-+
-+/* Function Name:
-+ *      rtk_qos_portPri_set
-+ * Description:
-+ *      Configure priority usage to each port.
-+ * Input:
-+ *      port - Port id.
-+ *      int_pri - internal priority value.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_QOS_SEL_PORT_PRI - Invalid port priority.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      The API can set priority of port assignments for queue usage and packet scheduling.
-+ */
-+extern rtk_api_ret_t rtk_qos_portPri_set(rtk_port_t port, rtk_pri_t int_pri) ;
-+
-+/* Function Name:
-+ *      rtk_qos_portPri_get
-+ * Description:
-+ *      Get priority usage to each port.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pInt_pri - internal priority value.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get priority of port assignments for queue usage and packet scheduling.
-+ */
-+extern rtk_api_ret_t rtk_qos_portPri_get(rtk_port_t port, rtk_pri_t *pInt_pri) ;
-+
-+/* Function Name:
-+ *      rtk_qos_queueNum_set
-+ * Description:
-+ *      Set output queue number for each port.
-+ * Input:
-+ *      port    - Port id.
-+ *      index   - Mapping queue number (1~8)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_QUEUE_NUM    - Invalid queue number.
-+ * Note:
-+ *      The API can set the output queue number of the specified port. The queue number is from 1 to 8.
-+ */
-+extern rtk_api_ret_t rtk_qos_queueNum_set(rtk_port_t port, rtk_queue_num_t queue_num);
-+
-+/* Function Name:
-+ *      rtk_qos_queueNum_get
-+ * Description:
-+ *      Get output queue number.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pQueue_num - Mapping queue number
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API will return the output queue number of the specified port. The queue number is from 1 to 8.
-+ */
-+extern rtk_api_ret_t rtk_qos_queueNum_get(rtk_port_t port, rtk_queue_num_t *pQueue_num);
-+
-+/* Function Name:
-+ *      rtk_qos_priMap_set
-+ * Description:
-+ *      Set output queue number for each port.
-+ * Input:
-+ *      queue_num   - Queue number usage.
-+ *      pPri2qid    - Priority mapping to queue ID.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_QUEUE_NUM        - Invalid queue number.
-+ *      RT_ERR_QUEUE_ID         - Invalid queue id.
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      ASIC supports priority mapping to queue with different queue number from 1 to 8.
-+ *      For different queue numbers usage, ASIC supports different internal available queue IDs.
-+ */
-+extern rtk_api_ret_t rtk_qos_priMap_set(rtk_queue_num_t queue_num, rtk_qos_pri2queue_t *pPri2qid);
-+
-+
-+/* Function Name:
-+ *      rtk_qos_priMap_get
-+ * Description:
-+ *      Get priority to queue ID mapping table parameters.
-+ * Input:
-+ *      queue_num - Queue number usage.
-+ * Output:
-+ *      pPri2qid - Priority mapping to queue ID.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_QUEUE_NUM    - Invalid queue number.
-+ * Note:
-+ *      The API can return the mapping queue id of the specified priority and queue number.
-+ *      The queue number is from 1 to 8.
-+ */
-+extern rtk_api_ret_t rtk_qos_priMap_get(rtk_queue_num_t queue_num, rtk_qos_pri2queue_t *pPri2qid);
-+
-+/* Function Name:
-+ *      rtk_qos_schedulingQueue_set
-+ * Description:
-+ *      Set weight and type of queues in dedicated port.
-+ * Input:
-+ *      port        - Port id.
-+ *      pQweights   - The array of weights for WRR/WFQ queue (0 for STRICT_PRIORITY queue).
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_QOS_QUEUE_WEIGHT - Invalid queue weight.
-+ * Note:
-+ *      The API can set weight and type, strict priority or weight fair queue (WFQ) for
-+ *      dedicated port for using queues. If queue id is not included in queue usage,
-+ *      then its type and weight setting in dummy for setting. There are priorities
-+ *      as queue id in strict queues. It means strict queue id 5 carrying higher priority
-+ *      than strict queue id 4. The WFQ queue weight is from 1 to 128, and weight 0 is
-+ *      for strict priority queue type.
-+ */
-+extern rtk_api_ret_t rtk_qos_schedulingQueue_set(rtk_port_t port, rtk_qos_queue_weights_t *pQweights);
-+
-+/* Function Name:
-+ *      rtk_qos_schedulingQueue_get
-+ * Description:
-+ *      Get weight and type of queues in dedicated port.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pQweights - The array of weights for WRR/WFQ queue (0 for STRICT_PRIORITY queue).
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get weight and type, strict priority or weight fair queue (WFQ) for dedicated port for using queues.
-+ *      The WFQ queue weight is from 1 to 128, and weight 0 is for strict priority queue type.
-+ */
-+extern rtk_api_ret_t rtk_qos_schedulingQueue_get(rtk_port_t port, rtk_qos_queue_weights_t *pQweights);
-+
-+/* Function Name:
-+ *      rtk_qos_1pRemarkEnable_set
-+ * Description:
-+ *      Set 1p Remarking state
-+ * Input:
-+ *      port        - Port id.
-+ *      enable      - State of per-port 1p Remarking
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_ENABLE       - Invalid enable parameter.
-+ * Note:
-+ *      The API can enable or disable 802.1p remarking ability for whole system.
-+ *      The status of 802.1p remark:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+extern rtk_api_ret_t rtk_qos_1pRemarkEnable_set(rtk_port_t port, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_qos_1pRemarkEnable_get
-+ * Description:
-+ *      Get 802.1p remarking ability.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - Status of 802.1p remark.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get 802.1p remarking ability.
-+ *      The status of 802.1p remark:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+extern rtk_api_ret_t rtk_qos_1pRemarkEnable_get(rtk_port_t port, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_qos_1pRemark_set
-+ * Description:
-+ *      Set 802.1p remarking parameter.
-+ * Input:
-+ *      int_pri     - Internal priority value.
-+ *      dot1p_pri   - 802.1p priority value.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_VLAN_PRIORITY    - Invalid 1p priority.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      The API can set 802.1p parameters source priority and new priority.
-+ */
-+extern rtk_api_ret_t rtk_qos_1pRemark_set(rtk_pri_t int_pri, rtk_pri_t dot1p_pri);
-+
-+/* Function Name:
-+ *      rtk_qos_1pRemark_get
-+ * Description:
-+ *      Get 802.1p remarking parameter.
-+ * Input:
-+ *      int_pri - Internal priority value.
-+ * Output:
-+ *      pDot1p_pri - 802.1p priority value.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      The API can get 802.1p remarking parameters. It would return new priority of ingress priority.
-+ */
-+extern rtk_api_ret_t rtk_qos_1pRemark_get(rtk_pri_t int_pri, rtk_pri_t *pDot1p_pri);
-+
-+/* Function Name:
-+ *      rtk_qos_dscpRemarkEnable_set
-+ * Description:
-+ *      Set DSCP remarking ability.
-+ * Input:
-+ *      port    - Port id.
-+ *      enable  - status of DSCP remark.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ *      RT_ERR_ENABLE           - Invalid enable parameter.
-+ * Note:
-+ *      The API can enable or disable DSCP remarking ability for whole system.
-+ *      The status of DSCP remark:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+extern rtk_api_ret_t rtk_qos_dscpRemarkEnable_set(rtk_port_t port, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_qos_dscpRemarkEnable_get
-+ * Description:
-+ *      Get DSCP remarking ability.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - status of DSCP remarking.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get DSCP remarking ability.
-+ *      The status of DSCP remark:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+extern rtk_api_ret_t rtk_qos_dscpRemarkEnable_get(rtk_port_t port, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_qos_dscpRemark_set
-+ * Description:
-+ *      Set DSCP remarking parameter.
-+ * Input:
-+ *      int_pri - Internal priority value.
-+ *      dscp    - DSCP value.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ *      RT_ERR_QOS_DSCP_VALUE   - Invalid DSCP value.
-+ * Note:
-+ *      The API can set DSCP value and mapping priority.
-+ */
-+extern rtk_api_ret_t rtk_qos_dscpRemark_set(rtk_pri_t int_pri, rtk_dscp_t dscp);
-+
-+/* Function Name:
-+ *      rtk_qos_dscpRemark_get
-+ * Description:
-+ *      Get DSCP remarking parameter.
-+ * Input:
-+ *      int_pri - Internal priority value.
-+ * Output:
-+ *      Dscp - DSCP value.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      The API can get DSCP parameters. It would return DSCP value for mapping priority.
-+ */
-+extern rtk_api_ret_t rtk_qos_dscpRemark_get(rtk_pri_t int_pri, rtk_dscp_t *pDscp);
-+
-+/* Function Name:
-+ *      rtk_qos_dscpRemarkSrcSel_set
-+ * Description:
-+ *      Set remarking source of DSCP remarking.
-+ * Input:
-+ *      type      - remarking source
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT         - The module is not initial
-+ *      RT_ERR_PORT_ID  - invalid port id
-+ *      RT_ERR_INPUT            - invalid input parameter
-+
-+ * Note:
-+ *      The API can configure DSCP remark functionality to map original DSCP value or internal
-+ *      priority to TX DSCP value.
-+ */
-+extern rtk_api_ret_t rtk_qos_dscpRemarkSrcSel_set(rtk_qos_dscpRmkSrc_t type);
-+
-+
-+/* Function Name:
-+ *      rtk_qos_dcpRemarkSrcSel_get
-+ * Description:
-+ *      Get remarking source of DSCP remarking.
-+ * Input:
-+ *      none
-+ * Output:
-+ *      pType      - remarking source
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT         - The module is not initial
-+ *      RT_ERR_PORT_ID          - invalid port id
-+ *      RT_ERR_INPUT            - invalid input parameter
-+ *      RT_ERR_NULL_POINTER     - input parameter may be null pointer
-+
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_qos_dscpRemarkSrcSel_get(rtk_qos_dscpRmkSrc_t *pType);
-+
-+
-+/* Function Name:
-+ *      rtk_qos_dscpRemark2Dscp_set
-+ * Description:
-+ *      Set DSCP to remarked DSCP mapping.
-+ * Input:
-+ *      dscp    - DSCP value
-+ *      rmkDscp - remarked DSCP value
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_QOS_DSCP_VALUE   - Invalid dscp value
-+ * Note:
-+ *      dscp parameter can be DSCP value or internal priority according to configuration of API
-+ *      dal_apollomp_qos_dscpRemarkSrcSel_set(), because DSCP remark functionality can map original DSCP
-+ *      value or internal priority to TX DSCP value.
-+ */
-+extern rtk_api_ret_t rtk_qos_dscpRemark2Dscp_set(rtk_dscp_t dscp, rtk_dscp_t rmkDscp);
-+
-+/* Function Name:
-+ *      rtk_qos_dscpRemark2Dscp_get
-+ * Description:
-+ *      Get DSCP to remarked DSCP mapping.
-+ * Input:
-+ *      dscp    - DSCP value
-+ * Output:
-+ *      pDscp   - remarked DSCP value
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_QOS_DSCP_VALUE   - Invalid dscp value
-+ *      RT_ERR_NULL_POINTER     - NULL pointer
-+ * Note:
-+ *      None.
-+ */
-+extern rtk_api_ret_t rtk_qos_dscpRemark2Dscp_get(rtk_dscp_t dscp, rtk_dscp_t *pDscp);
-+
-+/* Function Name:
-+ *      rtk_qos_portPriSelIndex_set
-+ * Description:
-+ *      Configure priority decision index to each port.
-+ * Input:
-+ *      port - Port id.
-+ *      index - priority decision index.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_ENTRY_INDEX - Invalid entry index.
-+ * Note:
-+ *      The API can set priority of port assignments for queue usage and packet scheduling.
-+ */
-+extern rtk_api_ret_t rtk_qos_portPriSelIndex_set(rtk_port_t port, rtk_qos_priDecTbl_t index);
-+
-+/* Function Name:
-+ *      rtk_qos_portPriSelIndex_get
-+ * Description:
-+ *      Get priority decision index from each port.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pIndex - priority decision index.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get priority of port assignments for queue usage and packet scheduling.
-+ */
-+extern rtk_api_ret_t rtk_qos_portPriSelIndex_get(rtk_port_t port, rtk_qos_priDecTbl_t *pIndex);
-+
-+#endif /* __RTK_API_QOS_H__ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rate.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rate.h
-new file mode 100644
-index 0000000000..231ed01bb0
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rate.h
-@@ -0,0 +1,305 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes rate module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_RATE_H__
-+#define __RTK_API_RATE_H__
-+
-+/*
-+ * Include Files
-+ */
-+//#include <rtk_types.h>
-+
-+/*
-+ * Data Type Declaration
-+ */
-+#define RTK_MAX_METER_ID            (rtk_switch_maxMeterId_get())
-+#define RTK_METER_NUM               (RTK_MAX_METER_ID + 1)
-+
-+typedef enum rtk_meter_type_e{
-+    METER_TYPE_KBPS = 0,    /* Kbps */
-+    METER_TYPE_PPS,         /* Packet per second */
-+    METER_TYPE_END
-+}rtk_meter_type_t;
-+
-+
-+/*
-+ * Function Declaration
-+ */
-+
-+ /* Rate */
-+/* Function Name:
-+ *      rtk_rate_shareMeter_set
-+ * Description:
-+ *      Set meter configuration
-+ * Input:
-+ *      index       - shared meter index
-+ *      type        - shared meter type
-+ *      rate        - rate of share meter
-+ *      ifg_include - include IFG or not, ENABLE:include DISABLE:exclude
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ *      RT_ERR_RATE             - Invalid rate
-+ *      RT_ERR_INPUT            - Invalid input parameters
-+ * Note:
-+ *      The API can set shared meter rate and ifg include for each meter.
-+ *      The rate unit is 1 kbps and the range is from 8k to 1048568k if type is METER_TYPE_KBPS and
-+ *      the granularity of rate is 8 kbps.
-+ *      The rate unit is packets per second and the range is 1 ~ 0x1FFF if type is METER_TYPE_PPS.
-+ *      The ifg_include parameter is used
-+ *      for rate calculation with/without inter-frame-gap and preamble.
-+ */
-+rtk_api_ret_t rtk_rate_shareMeter_set(rtk_meter_id_t index, rtk_meter_type_t type, rtk_rate_t rate, rtk_enable_t ifg_include);
-+
-+/* Function Name:
-+ *      rtk_rate_shareMeter_get
-+ * Description:
-+ *      Get meter configuration
-+ * Input:
-+ *      index        - shared meter index
-+ * Output:
-+ *      pType        - Meter Type
-+ *      pRate        - pointer of rate of share meter
-+ *      pIfg_include - include IFG or not, ENABLE:include DISABLE:exclude
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_rate_shareMeter_get(rtk_meter_id_t index, rtk_meter_type_t *pType, rtk_rate_t *pRate, rtk_enable_t *pIfg_include);
-+
-+/* Function Name:
-+ *      rtk_rate_shareMeterBucket_set
-+ * Description:
-+ *      Set meter Bucket Size
-+ * Input:
-+ *      index        - shared meter index
-+ *      bucket_size  - Bucket Size
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_INPUT            - Error Input
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *      The API can set shared meter bucket size.
-+ */
-+extern rtk_api_ret_t rtk_rate_shareMeterBucket_set(rtk_meter_id_t index, rtk_uint32 bucket_size);
-+
-+/* Function Name:
-+ *      rtk_rate_shareMeterBucket_get
-+ * Description:
-+ *      Get meter Bucket Size
-+ * Input:
-+ *      index        - shared meter index
-+ * Output:
-+ *      pBucket_size - Bucket Size
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *      The API can get shared meter bucket size.
-+ */
-+extern rtk_api_ret_t rtk_rate_shareMeterBucket_get(rtk_meter_id_t index, rtk_uint32 *pBucket_size);
-+
-+/* Function Name:
-+ *      rtk_rate_igrBandwidthCtrlRate_set
-+ * Description:
-+ *      Set port ingress bandwidth control
-+ * Input:
-+ *      port        - Port id
-+ *      rate        - Rate of share meter
-+ *      ifg_include - include IFG or not, ENABLE:include DISABLE:exclude
-+ *      fc_enable   - enable flow control or not, ENABLE:use flow control DISABLE:drop
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_ENABLE       - Invalid IFG parameter.
-+ *      RT_ERR_INBW_RATE    - Invalid ingress rate parameter.
-+ * Note:
-+ *      The rate unit is 1 kbps and the range is from 8k to 1048568k. The granularity of rate is 8 kbps.
-+ *      The ifg_include parameter is used for rate calculation with/without inter-frame-gap and preamble.
-+ */
-+extern rtk_api_ret_t rtk_rate_igrBandwidthCtrlRate_set( rtk_port_t port, rtk_rate_t rate,  rtk_enable_t ifg_include, rtk_enable_t fc_enable);
-+
-+/* Function Name:
-+ *      rtk_rate_igrBandwidthCtrlRate_get
-+ * Description:
-+ *      Get port ingress bandwidth control
-+ * Input:
-+ *      port - Port id
-+ * Output:
-+ *      pRate           - Rate of share meter
-+ *      pIfg_include    - Rate's calculation including IFG, ENABLE:include DISABLE:exclude
-+ *      pFc_enable      - enable flow control or not, ENABLE:use flow control DISABLE:drop
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *     The rate unit is 1 kbps and the range is from 8k to 1048568k. The granularity of rate is 8 kbps.
-+ *     The ifg_include parameter is used for rate calculation with/without inter-frame-gap and preamble.
-+ */
-+extern rtk_api_ret_t rtk_rate_igrBandwidthCtrlRate_get(rtk_port_t port, rtk_rate_t *pRate, rtk_enable_t *pIfg_include, rtk_enable_t *pFc_enable);
-+
-+/* Function Name:
-+ *      rtk_rate_egrBandwidthCtrlRate_set
-+ * Description:
-+ *      Set port egress bandwidth control
-+ * Input:
-+ *      port        - Port id
-+ *      rate        - Rate of egress bandwidth
-+ *      ifg_include - include IFG or not, ENABLE:include DISABLE:exclude
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_QOS_EBW_RATE - Invalid egress bandwidth/rate
-+ * Note:
-+ *     The rate unit is 1 kbps and the range is from 8k to 1048568k. The granularity of rate is 8 kbps.
-+ *     The ifg_include parameter is used for rate calculation with/without inter-frame-gap and preamble.
-+ */
-+extern rtk_api_ret_t rtk_rate_egrBandwidthCtrlRate_set(rtk_port_t port, rtk_rate_t rate,  rtk_enable_t ifg_includ);
-+
-+/* Function Name:
-+ *      rtk_rate_egrBandwidthCtrlRate_get
-+ * Description:
-+ *      Get port egress bandwidth control
-+ * Input:
-+ *      port - Port id
-+ * Output:
-+ *      pRate           - Rate of egress bandwidth
-+ *      pIfg_include    - Rate's calculation including IFG, ENABLE:include DISABLE:exclude
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *     The rate unit is 1 kbps and the range is from 8k to 1048568k. The granularity of rate is 8 kbps.
-+ *     The ifg_include parameter is used for rate calculation with/without inter-frame-gap and preamble.
-+ */
-+extern rtk_api_ret_t rtk_rate_egrBandwidthCtrlRate_get(rtk_port_t port, rtk_rate_t *pRate, rtk_enable_t *pIfg_include);
-+
-+/* Function Name:
-+ *      rtk_rate_egrQueueBwCtrlEnable_set
-+ * Description:
-+ *      Set enable status of egress bandwidth control on specified queue.
-+ * Input:
-+ *      port   - port id
-+ *      queue  - queue id
-+ *      enable - enable status of egress queue bandwidth control
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID          - invalid port id
-+ *      RT_ERR_QUEUE_ID         - invalid queue id
-+ *      RT_ERR_INPUT            - invalid input parameter
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_rate_egrQueueBwCtrlEnable_set(rtk_port_t port, rtk_qid_t queue, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_rate_egrQueueBwCtrlRate_get
-+ * Description:
-+ *      Get rate of egress bandwidth control on specified queue.
-+ * Input:
-+ *      port  - port id
-+ *      queue - queue id
-+ *      pIndex - shared meter index
-+ * Output:
-+ *      pRate - pointer to rate of egress queue bandwidth control
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID          - invalid port id
-+ *      RT_ERR_QUEUE_ID         - invalid queue id
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter id
-+ * Note:
-+ *    None.
-+ */
-+extern rtk_api_ret_t rtk_rate_egrQueueBwCtrlEnable_get(rtk_port_t port, rtk_qid_t queue, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_rate_egrQueueBwCtrlRate_set
-+ * Description:
-+ *      Set rate of egress bandwidth control on specified queue.
-+ * Input:
-+ *      port  - port id
-+ *      queue - queue id
-+ *      index - shared meter index
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID          - invalid port id
-+ *      RT_ERR_QUEUE_ID         - invalid queue id
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter id
-+ * Note:
-+ *    The actual rate control is set in shared meters.
-+ *    The unit of granularity is 8Kbps.
-+ */
-+extern rtk_api_ret_t rtk_rate_egrQueueBwCtrlRate_set(rtk_port_t port, rtk_qid_t queue, rtk_meter_id_t index);
-+
-+/* Function Name:
-+ *      rtk_rate_egrQueueBwCtrlRate_get
-+ * Description:
-+ *      Get rate of egress bandwidth control on specified queue.
-+ * Input:
-+ *      port  - port id
-+ *      queue - queue id
-+ *      pIndex - shared meter index
-+ * Output:
-+ *      pRate - pointer to rate of egress queue bandwidth control
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID          - invalid port id
-+ *      RT_ERR_QUEUE_ID         - invalid queue id
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter id
-+ * Note:
-+ *    The actual rate control is set in shared meters.
-+ *    The unit of granularity is 8Kbps.
-+ */
-+extern rtk_api_ret_t rtk_rate_egrQueueBwCtrlRate_get(rtk_port_t port, rtk_qid_t queue, rtk_meter_id_t *pIndex);
-+
-+#endif /* __RTK_API_RATE_H__ */
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rldp.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rldp.h
-new file mode 100644
-index 0000000000..111de0c093
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rldp.h
-@@ -0,0 +1,264 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : Declaration of RLDP and RLPP API
-+ *
-+ * Feature : The file have include the following module and sub-modules
-+ *           1) RLDP and RLPP configuration and status
-+ *
-+ */
-+
-+
-+#ifndef __RTK_RLDP_H__
-+#define __RTK_RLDP_H__
-+
-+
-+/*
-+ * Include Files
-+ */
-+
-+
-+/*
-+ * Symbol Definition
-+ */
-+typedef enum rtk_rldp_trigger_e
-+{
-+    RTK_RLDP_TRIGGER_SAMOVING = 0,
-+    RTK_RLDP_TRIGGER_PERIOD,
-+    RTK_RLDP_TRIGGER_END
-+} rtk_rldp_trigger_t;
-+
-+typedef enum rtk_rldp_cmpType_e
-+{
-+    RTK_RLDP_CMPTYPE_MAGIC = 0,     /* Compare the RLDP with magic only */
-+    RTK_RLDP_CMPTYPE_MAGIC_ID,      /* Compare the RLDP with both magic + ID */
-+    RTK_RLDP_CMPTYPE_END
-+} rtk_rldp_cmpType_t;
-+
-+typedef enum rtk_rldp_loopStatus_e
-+{
-+    RTK_RLDP_LOOPSTS_NONE = 0,
-+    RTK_RLDP_LOOPSTS_LOOPING,
-+    RTK_RLDP_LOOPSTS_END
-+} rtk_rldp_loopStatus_t;
-+
-+typedef enum rtk_rlpp_trapType_e
-+{
-+    RTK_RLPP_TRAPTYPE_NONE = 0,
-+    RTK_RLPP_TRAPTYPE_CPU,
-+    RTK_RLPP_TRAPTYPE_END
-+} rtk_rlpp_trapType_t;
-+
-+typedef struct rtk_rldp_config_s
-+{
-+    rtk_enable_t        rldp_enable;
-+    rtk_rldp_trigger_t trigger_mode;
-+    rtk_mac_t           magic;
-+    rtk_rldp_cmpType_t  compare_type;
-+    rtk_uint32              interval_check; /* Checking interval for check state */
-+    rtk_uint32              num_check;      /* Checking number for check state */
-+    rtk_uint32              interval_loop;  /* Checking interval for loop state */
-+    rtk_uint32              num_loop;       /* Checking number for loop state */
-+} rtk_rldp_config_t;
-+
-+typedef struct rtk_rldp_portConfig_s
-+{
-+    rtk_enable_t        tx_enable;
-+} rtk_rldp_portConfig_t;
-+
-+typedef struct rtk_rldp_status_s
-+{
-+    rtk_mac_t           id;
-+} rtk_rldp_status_t;
-+
-+typedef struct rtk_rldp_portStatus_s
-+{
-+    rtk_rldp_loopStatus_t   loop_status;
-+    rtk_rldp_loopStatus_t   loop_enter;
-+    rtk_rldp_loopStatus_t   loop_leave;
-+} rtk_rldp_portStatus_t;
-+
-+/*
-+ * Data Declaration
-+ */
-+
-+
-+/*
-+ * Macro Declaration
-+ */
-+
-+#define RTK_RLDP_INTERVAL_MAX  0xffff
-+#define RTK_RLDP_NUM_MAX       0xff
-+
-+
-+/*
-+ * Function Declaration
-+ */
-+
-+/* Module Name : RLDP */
-+
-+
-+/* Function Name:
-+ *      rtk_rldp_config_set
-+ * Description:
-+ *      Set RLDP module configuration
-+ * Input:
-+ *      pConfig - configuration structure of RLDP
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT
-+ *      RT_ERR_NULL_POINTER
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_rldp_config_set(rtk_rldp_config_t *pConfig);
-+
-+
-+/* Function Name:
-+ *      rtk_rldp_config_get
-+ * Description:
-+ *      Get RLDP module configuration
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pConfig - configuration structure of RLDP
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT
-+ *      RT_ERR_NULL_POINTER
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_rldp_config_get(rtk_rldp_config_t *pConfig);
-+
-+
-+/* Function Name:
-+ *      rtk_rldp_portConfig_set
-+ * Description:
-+ *      Set per port RLDP module configuration
-+ * Input:
-+ *      port   - port number to be configured
-+ *      pPortConfig - per port configuration structure of RLDP
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT
-+ *      RT_ERR_NULL_POINTER
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_rldp_portConfig_set(rtk_port_t port, rtk_rldp_portConfig_t *pPortConfig);
-+
-+
-+/* Function Name:
-+ *      rtk_rldp_portConfig_get
-+ * Description:
-+ *      Get per port RLDP module configuration
-+ * Input:
-+ *      port    - port number to be get
-+ * Output:
-+ *      pPortConfig - per port configuration structure of RLDP
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT
-+ *      RT_ERR_NULL_POINTER
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_rldp_portConfig_get(rtk_port_t port, rtk_rldp_portConfig_t *pPortConfig);
-+
-+
-+/* Function Name:
-+ *      rtk_rldp_status_get
-+ * Description:
-+ *      Get RLDP module status
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pStatus - status structure of RLDP
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NULL_POINTER
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_rldp_status_get(rtk_rldp_status_t *pStatus);
-+
-+
-+/* Function Name:
-+ *      rtk_rldp_portStatus_get
-+ * Description:
-+ *      Get RLDP module status
-+ * Input:
-+ *      port    - port number to be get
-+ * Output:
-+ *      pPortStatus - per port status structure of RLDP
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT
-+ *      RT_ERR_NULL_POINTER
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_rldp_portStatus_get(rtk_port_t port, rtk_rldp_portStatus_t *pPortStatus);
-+
-+
-+/* Function Name:
-+ *      rtk_rldp_portStatus_clear
-+ * Description:
-+ *      Clear RLDP module status
-+ * Input:
-+ *      port    - port number to be clear
-+ *      pPortStatus - per port status structure of RLDP
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT
-+ *      RT_ERR_NULL_POINTER
-+ * Note:
-+ *      Clear operation effect loop_enter and loop_leave only, other field in
-+ *      the structure are don't care
-+ */
-+extern rtk_api_ret_t rtk_rldp_portStatus_set(rtk_port_t port, rtk_rldp_portStatus_t *pPortStatus);
-+
-+
-+/* Function Name:
-+ *      rtk_rldp_portLoopPair_get
-+ * Description:
-+ *      Get RLDP port loop pairs
-+ * Input:
-+ *      port    - port number to be get
-+ * Output:
-+ *      pPortmask - per port related loop ports
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT
-+ *      RT_ERR_NULL_POINTER
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_rldp_portLoopPair_get(rtk_port_t port, rtk_portmask_t *pPortmask);
-+
-+#endif /* __RTK_RLDP_H__ */
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtk_error.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtk_error.h
-new file mode 100644
-index 0000000000..dc9c0bed35
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtk_error.h
-@@ -0,0 +1,229 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : Definition the error number in the SDK.
-+ * Feature : error definition
-+ *
-+ */
-+
-+#ifndef __COMMON_RT_ERROR_H__
-+#define __COMMON_RT_ERROR_H__
-+
-+/*
-+ * Include Files
-+ */
-+
-+/*
-+ * Data Type Declaration
-+ */
-+typedef enum rt_error_code_e
-+{
-+    RT_ERR_FAILED = -1,                             /* General Error                                                                    */
-+
-+    /* 0x0000xxxx for common error code */
-+    RT_ERR_OK = 0,                                  /* 0x00000000, OK                                                                   */
-+    RT_ERR_INPUT,                                   /* 0x00000001, invalid input parameter                                              */
-+    RT_ERR_UNIT_ID,                                 /* 0x00000002, invalid unit id                                                      */
-+    RT_ERR_PORT_ID,                                 /* 0x00000003, invalid port id                                                      */
-+    RT_ERR_PORT_MASK,                               /* 0x00000004, invalid port mask                                                    */
-+    RT_ERR_PORT_LINKDOWN,                           /* 0x00000005, link down port status                                                */
-+    RT_ERR_ENTRY_INDEX,                             /* 0x00000006, invalid entry index                                                  */
-+    RT_ERR_NULL_POINTER,                            /* 0x00000007, input parameter is null pointer                                      */
-+    RT_ERR_QUEUE_ID,                                /* 0x00000008, invalid queue id                                                     */
-+    RT_ERR_QUEUE_NUM,                               /* 0x00000009, invalid queue number                                                 */
-+    RT_ERR_BUSYWAIT_TIMEOUT,                        /* 0x0000000a, busy watting time out                                                */
-+    RT_ERR_MAC,                                     /* 0x0000000b, invalid mac address                                                  */
-+    RT_ERR_OUT_OF_RANGE,                            /* 0x0000000c, input parameter out of range                                         */
-+    RT_ERR_CHIP_NOT_SUPPORTED,                      /* 0x0000000d, functions not supported by this chip model                           */
-+    RT_ERR_SMI,                                     /* 0x0000000e, SMI error                                                            */
-+    RT_ERR_NOT_INIT,                                /* 0x0000000f, The module is not initial                                            */
-+    RT_ERR_CHIP_NOT_FOUND,                          /* 0x00000010, The chip can not found                                               */
-+    RT_ERR_NOT_ALLOWED,                             /* 0x00000011, actions not allowed by the function                                  */
-+    RT_ERR_DRIVER_NOT_FOUND,                        /* 0x00000012, The driver can not found                                             */
-+    RT_ERR_SEM_LOCK_FAILED,                         /* 0x00000013, Failed to lock semaphore                                             */
-+    RT_ERR_SEM_UNLOCK_FAILED,                       /* 0x00000014, Failed to unlock semaphore                                           */
-+    RT_ERR_ENABLE,                                  /* 0x00000015, invalid enable parameter                                             */
-+    RT_ERR_TBL_FULL,                                /* 0x00000016, input table full                                                     */
-+
-+    /* 0x0001xxxx for vlan */
-+    RT_ERR_VLAN_VID = 0x00010000,                   /* 0x00010000, invalid vid                                                          */
-+    RT_ERR_VLAN_PRIORITY,                           /* 0x00010001, invalid 1p priority                                                  */
-+    RT_ERR_VLAN_EMPTY_ENTRY,                        /* 0x00010002, emtpy entry of vlan table                                            */
-+    RT_ERR_VLAN_ACCEPT_FRAME_TYPE,                  /* 0x00010003, invalid accept frame type                                            */
-+    RT_ERR_VLAN_EXIST,                              /* 0x00010004, vlan is exist                                                        */
-+    RT_ERR_VLAN_ENTRY_NOT_FOUND,                    /* 0x00010005, specified vlan entry not found                                       */
-+    RT_ERR_VLAN_PORT_MBR_EXIST,                     /* 0x00010006, member port exist in the specified vlan                              */
-+    RT_ERR_VLAN_PROTO_AND_PORT,                     /* 0x00010008, invalid protocol and port based vlan                              */
-+
-+    /* 0x0002xxxx for svlan */
-+    RT_ERR_SVLAN_ENTRY_INDEX = 0x00020000,          /* 0x00020000, invalid svid entry no                                                */
-+    RT_ERR_SVLAN_ETHER_TYPE,                        /* 0x00020001, invalid SVLAN ether type                                             */
-+    RT_ERR_SVLAN_TABLE_FULL,                        /* 0x00020002, no empty entry in SVLAN table                                        */
-+    RT_ERR_SVLAN_ENTRY_NOT_FOUND,                   /* 0x00020003, specified svlan entry not found                                      */
-+    RT_ERR_SVLAN_EXIST,                             /* 0x00020004, SVLAN entry is exist                                                 */
-+    RT_ERR_SVLAN_VID,                               /* 0x00020005, invalid svid                                                         */
-+
-+    /* 0x0003xxxx for MSTP */
-+    RT_ERR_MSTI = 0x00030000,                       /* 0x00030000, invalid msti                                                         */
-+    RT_ERR_MSTP_STATE,                              /* 0x00030001, invalid spanning tree status                                         */
-+    RT_ERR_MSTI_EXIST,                              /* 0x00030002, MSTI exist                                                           */
-+    RT_ERR_MSTI_NOT_EXIST,                          /* 0x00030003, MSTI not exist                                                       */
-+
-+    /* 0x0004xxxx for BUCKET */
-+    RT_ERR_TIMESLOT = 0x00040000,                   /* 0x00040000, invalid time slot                                                    */
-+    RT_ERR_TOKEN,                                   /* 0x00040001, invalid token amount                                                 */
-+    RT_ERR_RATE,                                    /* 0x00040002, invalid rate                                                         */
-+    RT_ERR_TICK,                                    /* 0x00040003, invalid tick                                                 */
-+
-+    /* 0x0005xxxx for RMA */
-+    RT_ERR_RMA_ADDR = 0x00050000,                   /* 0x00050000, invalid rma mac address                                              */
-+    RT_ERR_RMA_ACTION,                              /* 0x00050001, invalid rma action                                                   */
-+
-+    /* 0x0006xxxx for L2 */
-+    RT_ERR_L2_HASH_KEY = 0x00060000,                /* 0x00060000, invalid L2 Hash key                                                  */
-+    RT_ERR_L2_HASH_INDEX,                           /* 0x00060001, invalid L2 Hash index                                                */
-+    RT_ERR_L2_CAM_INDEX,                            /* 0x00060002, invalid L2 CAM index                                                 */
-+    RT_ERR_L2_ENRTYSEL,                             /* 0x00060003, invalid EntrySel                                                     */
-+    RT_ERR_L2_INDEXTABLE_INDEX,                     /* 0x00060004, invalid L2 index table(=portMask table) index                        */
-+    RT_ERR_LIMITED_L2ENTRY_NUM,                     /* 0x00060005, invalid limited L2 entry number                                      */
-+    RT_ERR_L2_AGGREG_PORT,                          /* 0x00060006, this aggregated port is not the lowest physical
-+                                                                   port of its aggregation group                                        */
-+    RT_ERR_L2_FID,                                  /* 0x00060007, invalid fid                                                          */
-+    RT_ERR_L2_VID,                                 /* 0x00060008, invalid cvid                                                         */
-+    RT_ERR_L2_NO_EMPTY_ENTRY,                       /* 0x00060009, no empty entry in L2 table                                           */
-+    RT_ERR_L2_ENTRY_NOTFOUND,                       /* 0x0006000a, specified entry not found                                            */
-+    RT_ERR_L2_INDEXTBL_FULL,                        /* 0x0006000b, the L2 index table is full                                           */
-+    RT_ERR_L2_INVALID_FLOWTYPE,                     /* 0x0006000c, invalid L2 flow type                                                 */
-+    RT_ERR_L2_L2UNI_PARAM,                          /* 0x0006000d, invalid L2 unicast parameter                                         */
-+    RT_ERR_L2_L2MULTI_PARAM,                        /* 0x0006000e, invalid L2 multicast parameter                                       */
-+    RT_ERR_L2_IPMULTI_PARAM,                        /* 0x0006000f, invalid L2 ip multicast parameter                                    */
-+    RT_ERR_L2_PARTIAL_HASH_KEY,                     /* 0x00060010, invalid L2 partial Hash key                                          */
-+    RT_ERR_L2_EMPTY_ENTRY,                          /* 0x00060011, the entry is empty(invalid)                                          */
-+    RT_ERR_L2_FLUSH_TYPE,                           /* 0x00060012, the flush type is invalid                                            */
-+    RT_ERR_L2_NO_CPU_PORT,                          /* 0x00060013, CPU port not exist                                                   */
-+
-+    /* 0x0007xxxx for FILTER (PIE) */
-+    RT_ERR_FILTER_BLOCKNUM = 0x00070000,            /* 0x00070000, invalid block number                                                 */
-+    RT_ERR_FILTER_ENTRYIDX,                         /* 0x00070001, invalid entry index                                                  */
-+    RT_ERR_FILTER_CUTLINE,                          /* 0x00070002, invalid cutline value                                                */
-+    RT_ERR_FILTER_FLOWTBLBLOCK,                     /* 0x00070003, block belongs to flow table                                          */
-+    RT_ERR_FILTER_INACLBLOCK,                       /* 0x00070004, block belongs to ingress ACL                                         */
-+    RT_ERR_FILTER_ACTION,                           /* 0x00070005, action doesn't consist to entry type                                 */
-+    RT_ERR_FILTER_INACL_RULENUM,                    /* 0x00070006, invalid ACL rulenum                                                  */
-+    RT_ERR_FILTER_INACL_TYPE,                       /* 0x00070007, entry type isn't an ingress ACL rule                                 */
-+    RT_ERR_FILTER_INACL_EXIST,                      /* 0x00070008, ACL entry is already exit                                            */
-+    RT_ERR_FILTER_INACL_EMPTY,                      /* 0x00070009, ACL entry is empty                                                   */
-+    RT_ERR_FILTER_FLOWTBL_TYPE,                     /* 0x0007000a, entry type isn't an flow table rule                                  */
-+    RT_ERR_FILTER_FLOWTBL_RULENUM,                  /* 0x0007000b, invalid flow table rulenum                                           */
-+    RT_ERR_FILTER_FLOWTBL_EMPTY,                    /* 0x0007000c, flow table entry is empty                                            */
-+    RT_ERR_FILTER_FLOWTBL_EXIST,                    /* 0x0007000d, flow table entry is already exist                                    */
-+    RT_ERR_FILTER_METER_ID,                         /* 0x0007000e, invalid metering id                                                  */
-+    RT_ERR_FILTER_LOG_ID,                           /* 0x0007000f, invalid log id                                                       */
-+    RT_ERR_FILTER_INACL_NONE_BEGIN_IDX,             /* 0x00070010, entry index is not starting index of a group of rules                */
-+    RT_ERR_FILTER_INACL_ACT_NOT_SUPPORT,            /* 0x00070011, action not support                                                    */
-+    RT_ERR_FILTER_INACL_RULE_NOT_SUPPORT,           /* 0x00070012, rule not support                                                   */
-+
-+    /* 0x0008xxxx for ACL Rate Limit */
-+    RT_ERR_ACLRL_HTHR = 0x00080000,                 /* 0x00080000, invalid high threshold                                               */
-+    RT_ERR_ACLRL_TIMESLOT,                          /* 0x00080001, invalid time slot                                                    */
-+    RT_ERR_ACLRL_TOKEN,                             /* 0x00080002, invalid token amount                                                 */
-+    RT_ERR_ACLRL_RATE,                              /* 0x00080003, invalid rate                                                         */
-+
-+    /* 0x0009xxxx for Link aggregation */
-+    RT_ERR_LA_CPUPORT = 0x00090000,                 /* 0x00090000, CPU port can not be aggregated port                                  */
-+    RT_ERR_LA_TRUNK_ID,                             /* 0x00090001, invalid trunk id                                                     */
-+    RT_ERR_LA_PORTMASK,                             /* 0x00090002, invalid port mask                                                    */
-+    RT_ERR_LA_HASHMASK,                             /* 0x00090003, invalid hash mask                                                    */
-+    RT_ERR_LA_DUMB,                                 /* 0x00090004, this API should be used in 802.1ad dumb mode                         */
-+    RT_ERR_LA_PORTNUM_DUMB,                         /* 0x00090005, it can only aggregate at most four ports when 802.1ad dumb mode      */
-+    RT_ERR_LA_PORTNUM_NORMAL,                       /* 0x00090006, it can only aggregate at most eight ports when 802.1ad normal mode   */
-+    RT_ERR_LA_MEMBER_OVERLAP,                       /* 0x00090007, the specified port mask is overlapped with other group               */
-+    RT_ERR_LA_NOT_MEMBER_PORT,                      /* 0x00090008, the port is not a member port of the trunk                           */
-+    RT_ERR_LA_TRUNK_NOT_EXIST,                      /* 0x00090009, the trunk doesn't exist                                              */
-+
-+
-+    /* 0x000axxxx for storm filter */
-+    RT_ERR_SFC_TICK_PERIOD = 0x000a0000,            /* 0x000a0000, invalid SFC tick period                                              */
-+    RT_ERR_SFC_UNKNOWN_GROUP,                       /* 0x000a0001, Unknown Storm filter group                                           */
-+
-+    /* 0x000bxxxx for pattern match */
-+    RT_ERR_PM_MASK = 0x000b0000,                    /* 0x000b0000, invalid pattern length. Pattern length should be 8                   */
-+    RT_ERR_PM_LENGTH,                               /* 0x000b0001, invalid pattern match mask, first byte must care                     */
-+    RT_ERR_PM_MODE,                                 /* 0x000b0002, invalid pattern match mode                                           */
-+
-+    /* 0x000cxxxx for input bandwidth control */
-+    RT_ERR_INBW_TICK_PERIOD = 0x000c0000,           /* 0x000c0000, invalid tick period for input bandwidth control                      */
-+    RT_ERR_INBW_TOKEN_AMOUNT,                       /* 0x000c0001, invalid amount of token for input bandwidth control                  */
-+    RT_ERR_INBW_FCON_VALUE,                         /* 0x000c0002, invalid flow control ON threshold value for input bandwidth control  */
-+    RT_ERR_INBW_FCOFF_VALUE,                        /* 0x000c0003, invalid flow control OFF threshold value for input bandwidth control */
-+    RT_ERR_INBW_FC_ALLOWANCE,                       /* 0x000c0004, invalid allowance of incomming packet for input bandwidth control    */
-+    RT_ERR_INBW_RATE,                               /* 0x000c0005, invalid input bandwidth                                              */
-+
-+    /* 0x000dxxxx for QoS */
-+    RT_ERR_QOS_1P_PRIORITY = 0x000d0000,            /* 0x000d0000, invalid 802.1P priority                                              */
-+    RT_ERR_QOS_DSCP_VALUE,                          /* 0x000d0001, invalid DSCP value                                                   */
-+    RT_ERR_QOS_INT_PRIORITY,                        /* 0x000d0002, invalid internal priority                                            */
-+    RT_ERR_QOS_SEL_DSCP_PRI,                        /* 0x000d0003, invalid DSCP selection priority                                      */
-+    RT_ERR_QOS_SEL_PORT_PRI,                        /* 0x000d0004, invalid port selection priority                                      */
-+    RT_ERR_QOS_SEL_IN_ACL_PRI,                      /* 0x000d0005, invalid ingress ACL selection priority                               */
-+    RT_ERR_QOS_SEL_CLASS_PRI,                       /* 0x000d0006, invalid classifier selection priority                                */
-+    RT_ERR_QOS_EBW_RATE,                            /* 0x000d0007, invalid egress bandwidth rate                                        */
-+    RT_ERR_QOS_SCHE_TYPE,                           /* 0x000d0008, invalid QoS scheduling type                                          */
-+    RT_ERR_QOS_QUEUE_WEIGHT,                        /* 0x000d0009, invalid Queue weight                                                 */
-+    RT_ERR_QOS_SEL_PRI_SOURCE,                      /* 0x000d000a, invalid selection of priority source                                                 */
-+
-+    /* 0x000exxxx for port ability */
-+    RT_ERR_PHY_PAGE_ID = 0x000e0000,                /* 0x000e0000, invalid PHY page id                                                  */
-+    RT_ERR_PHY_REG_ID,                              /* 0x000e0001, invalid PHY reg id                                                   */
-+    RT_ERR_PHY_DATAMASK,                            /* 0x000e0002, invalid PHY data mask                                                */
-+    RT_ERR_PHY_AUTO_NEGO_MODE,                      /* 0x000e0003, invalid PHY auto-negotiation mode*/
-+    RT_ERR_PHY_SPEED,                               /* 0x000e0004, invalid PHY speed setting                                            */
-+    RT_ERR_PHY_DUPLEX,                              /* 0x000e0005, invalid PHY duplex setting                                           */
-+    RT_ERR_PHY_FORCE_ABILITY,                       /* 0x000e0006, invalid PHY force mode ability parameter                             */
-+    RT_ERR_PHY_FORCE_1000,                          /* 0x000e0007, invalid PHY force mode 1G speed setting                              */
-+    RT_ERR_PHY_TXRX,                                /* 0x000e0008, invalid PHY tx/rx                                                    */
-+    RT_ERR_PHY_ID,                                  /* 0x000e0009, invalid PHY id                                                       */
-+    RT_ERR_PHY_RTCT_NOT_FINISH,                     /* 0x000e000a, PHY RTCT in progress                                                 */
-+
-+    /* 0x000fxxxx for mirror */
-+    RT_ERR_MIRROR_DIRECTION = 0x000f0000,           /* 0x000f0000, invalid error mirror direction                                       */
-+    RT_ERR_MIRROR_SESSION_FULL,                     /* 0x000f0001, mirroring session is full                                            */
-+    RT_ERR_MIRROR_SESSION_NOEXIST,                  /* 0x000f0002, mirroring session not exist                                          */
-+    RT_ERR_MIRROR_PORT_EXIST,                       /* 0x000f0003, mirroring port already exists                                        */
-+    RT_ERR_MIRROR_PORT_NOT_EXIST,                   /* 0x000f0004, mirroring port does not exists                                       */
-+    RT_ERR_MIRROR_PORT_FULL,                        /* 0x000f0005, Exceeds maximum number of supported mirroring port                   */
-+
-+    /* 0x0010xxxx for stat */
-+    RT_ERR_STAT_INVALID_GLOBAL_CNTR = 0x00100000,   /* 0x00100000, Invalid Global Counter                                               */
-+    RT_ERR_STAT_INVALID_PORT_CNTR,                  /* 0x00100001, Invalid Port Counter                                                 */
-+    RT_ERR_STAT_GLOBAL_CNTR_FAIL,                   /* 0x00100002, Could not retrieve/reset Global Counter                              */
-+    RT_ERR_STAT_PORT_CNTR_FAIL,                     /* 0x00100003, Could not retrieve/reset Port Counter                                */
-+    RT_ERR_STAT_INVALID_CNTR,                       /* 0x00100004, Invalid Counter                                                      */
-+    RT_ERR_STAT_CNTR_FAIL,                          /* 0x00100005, Could not retrieve/reset Counter                                     */
-+
-+    /* 0x0011xxxx for dot1x */
-+    RT_ERR_DOT1X_INVALID_DIRECTION = 0x00110000,    /* 0x00110000, Invalid Authentication Direction                                     */
-+    RT_ERR_DOT1X_PORTBASEDPNEN,                     /* 0x00110001, Port-based enable port error                                         */
-+    RT_ERR_DOT1X_PORTBASEDAUTH,                     /* 0x00110002, Port-based auth port error                                           */
-+    RT_ERR_DOT1X_PORTBASEDOPDIR,                    /* 0x00110003, Port-based opdir error                                               */
-+    RT_ERR_DOT1X_MACBASEDPNEN,                      /* 0x00110004, MAC-based enable port error                                          */
-+    RT_ERR_DOT1X_MACBASEDOPDIR,                     /* 0x00110005, MAC-based opdir error                                                */
-+    RT_ERR_DOT1X_PROC,                              /* 0x00110006, unauthorized behavior error                                          */
-+    RT_ERR_DOT1X_GVLANIDX,                          /* 0x00110007, guest vlan index error                                               */
-+    RT_ERR_DOT1X_GVLANTALK,                         /* 0x00110008, guest vlan OPDIR error                                               */
-+    RT_ERR_DOT1X_MAC_PORT_MISMATCH,                 /* 0x00110009, Auth MAC and port mismatch eror                                      */
-+
-+    RT_ERR_END                                       /* The symbol is the latest symbol                                                  */
-+} rt_error_code_t;
-+
-+
-+#endif /* __COMMON_RT_ERROR_H__ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtk_hal.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtk_hal.h
-new file mode 100644
-index 0000000000..6ddb23f2ed
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtk_hal.h
-@@ -0,0 +1,44 @@
-+#ifndef __RTK_HAL_H__
-+#define __RTK_HAL_H__
-+#include "ra_ioctl.h"
-+
-+#define RTK_SW_VID_RANGE        16
-+void rtk_hal_switch_init(void);
-+void rtk_hal_dump_mib(void);
-+void rtk_hal_dump_full_mib(void);
-+int rtk_hal_dump_vlan(void);
-+void rtk_hal_clear_vlan(void);
-+int rtk_hal_set_vlan(struct ra_switch_ioctl_data *data);
-+int rtk_hal_set_ingress_rate(struct ra_switch_ioctl_data *data);
-+int rtk_hal_set_egress_rate(struct ra_switch_ioctl_data *data);
-+void rtk_hal_dump_table(void);
-+void rtk_hal_clear_table(void);
-+void rtk_hal_get_phy_status(struct ra_switch_ioctl_data *data);
-+void rtk_hal_set_port_mirror(struct ra_switch_ioctl_data *data);
-+void rtk_hal_read_reg(struct ra_switch_ioctl_data *data);
-+void rtk_hal_write_reg(struct ra_switch_ioctl_data *data);
-+void rtk_hal_qos_en(struct ra_switch_ioctl_data *data);
-+void rtk_hal_qos_set_table2type(struct ra_switch_ioctl_data *data);
-+void rtk_hal_qos_get_table2type(struct ra_switch_ioctl_data *data);
-+void rtk_hal_qos_set_port2table(struct ra_switch_ioctl_data *data);
-+void rtk_hal_qos_get_port2table(struct ra_switch_ioctl_data *data);
-+void rtk_hal_qos_set_port2pri(struct ra_switch_ioctl_data *data);
-+void rtk_hal_qos_get_port2pri(struct ra_switch_ioctl_data *data);
-+void rtk_hal_qos_set_dscp2pri(struct ra_switch_ioctl_data *data);
-+void rtk_hal_qos_get_dscp2pri(struct ra_switch_ioctl_data *data);
-+void rtk_hal_qos_set_pri2queue(struct ra_switch_ioctl_data *data);
-+void rtk_hal_qos_get_pri2queue(struct ra_switch_ioctl_data *data);
-+void rtk_hal_qos_set_queue_weight(struct ra_switch_ioctl_data *data);
-+void rtk_hal_qos_get_queue_weight(struct ra_switch_ioctl_data *data);
-+void rtk_hal_enable_igmpsnoop(struct ra_switch_ioctl_data *data);
-+void rtk_hal_disable_igmpsnoop(void);
-+void rtk_hal_set_phy_test_mode(struct ra_switch_ioctl_data *data);
-+void rtk_hal_get_phy_reg(struct ra_switch_ioctl_data *data);
-+void rtk_hal_set_phy_reg(struct ra_switch_ioctl_data *data);
-+void rtk_hal_vlan_tag(struct ra_switch_ioctl_data *data);
-+void rtk_hal_vlan_portpvid_set(rtk_port_t port, rtk_vlan_t pvid, rtk_pri_t priority);
-+void rtk_hal_add_table(struct ra_switch_ioctl_data *data);
-+void rtk_hal_del_table(struct ra_switch_ioctl_data *data);
-+void rtk_hal_vlan_mode(struct ra_switch_ioctl_data *data);
-+void rtk_hal_set_port_trunk(struct ra_switch_ioctl_data *data);
-+#endif
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtk_switch.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtk_switch.h
-new file mode 100644
-index 0000000000..b0ca13682c
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtk_switch.h
-@@ -0,0 +1,737 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76336 $
-+ * $Date: 2017-03-09 10:41:21 +0800 (週四, 09 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API
-+ * Feature : Here is a list of all functions and variables in this module.
-+ *
-+ */
-+
-+#ifndef __RTK_SWITCH_H__
-+#define __RTK_SWITCH_H__
-+
-+#include <rtk_types.h>
-+
-+#define UNDEFINE_PHY_PORT   (0xFF)
-+#define RTK_SWITCH_PORT_NUM (32)
-+
-+#define MAXPKTLEN_CFG_ID_MAX (1)
-+
-+#define RTK_SWITCH_MAX_PKTLEN (0x3FFF)
-+
-+typedef enum init_state_e
-+{
-+    INIT_NOT_COMPLETED = 0,
-+    INIT_COMPLETED,
-+    INIT_STATE_END
-+} init_state_t;
-+
-+typedef enum switch_chip_e
-+{
-+    CHIP_RTL8367C = 0,
-+    CHIP_RTL8370B,
-+    CHIP_RTL8364B,
-+    CHIP_RTL8363SC_VB,
-+    CHIP_END
-+}switch_chip_t;
-+
-+typedef enum port_type_e
-+{
-+    UTP_PORT = 0,
-+    EXT_PORT,
-+    UNKNOWN_PORT = 0xFF,
-+    PORT_TYPE_END
-+}port_type_t;
-+
-+typedef struct rtk_switch_halCtrl_s
-+{
-+    switch_chip_t   switch_type;
-+    rtk_uint32      l2p_port[RTK_SWITCH_PORT_NUM];
-+    rtk_uint32      p2l_port[RTK_SWITCH_PORT_NUM];
-+    port_type_t     log_port_type[RTK_SWITCH_PORT_NUM];
-+    rtk_uint32      ptp_port[RTK_SWITCH_PORT_NUM];
-+    rtk_uint32      valid_portmask;
-+    rtk_uint32      valid_utp_portmask;
-+    rtk_uint32      valid_ext_portmask;
-+    rtk_uint32      valid_cpu_portmask;
-+    rtk_uint32      min_phy_port;
-+    rtk_uint32      max_phy_port;
-+    rtk_uint32      phy_portmask;
-+    rtk_uint32      combo_logical_port;
-+    rtk_uint32      hsg_logical_port;
-+    rtk_uint32      sg_logical_portmask;
-+    rtk_uint32      max_meter_id;
-+    rtk_uint32      max_lut_addr_num;
-+    rtk_uint32      trunk_group_mask;
-+
-+}rtk_switch_halCtrl_t;
-+
-+typedef enum rtk_switch_maxPktLen_linkSpeed_e {
-+     MAXPKTLEN_LINK_SPEED_FE = 0,
-+     MAXPKTLEN_LINK_SPEED_GE,
-+     MAXPKTLEN_LINK_SPEED_END,
-+} rtk_switch_maxPktLen_linkSpeed_t;
-+
-+
-+/* UTIL MACRO */
-+#define RTK_CHK_INIT_STATE()                                \
-+    do                                                      \
-+    {                                                       \
-+        if(rtk_switch_initialState_get() != INIT_COMPLETED) \
-+        {                                                   \
-+            return RT_ERR_NOT_INIT;                         \
-+        }                                                   \
-+    }while(0)
-+
-+#define RTK_CHK_PORT_VALID(__port__)                            \
-+    do                                                          \
-+    {                                                           \
-+        if(rtk_switch_logicalPortCheck(__port__) != RT_ERR_OK)  \
-+        {                                                       \
-+            return RT_ERR_PORT_ID;                              \
-+        }                                                       \
-+    }while(0)
-+
-+#define RTK_CHK_PORT_IS_UTP(__port__)                           \
-+    do                                                          \
-+    {                                                           \
-+        if(rtk_switch_isUtpPort(__port__) != RT_ERR_OK)         \
-+        {                                                       \
-+            return RT_ERR_PORT_ID;                              \
-+        }                                                       \
-+    }while(0)
-+
-+#define RTK_CHK_PORT_IS_EXT(__port__)                           \
-+    do                                                          \
-+    {                                                           \
-+        if(rtk_switch_isExtPort(__port__) != RT_ERR_OK)         \
-+        {                                                       \
-+            return RT_ERR_PORT_ID;                              \
-+        }                                                       \
-+    }while(0)
-+
-+#define RTK_CHK_PORT_IS_COMBO(__port__)                         \
-+    do                                                          \
-+    {                                                           \
-+        if(rtk_switch_isComboPort(__port__) != RT_ERR_OK)       \
-+        {                                                       \
-+            return RT_ERR_PORT_ID;                              \
-+        }                                                       \
-+    }while(0)
-+
-+#define RTK_CHK_PORT_IS_PTP(__port__)                           \
-+    do                                                          \
-+    {                                                           \
-+        if(rtk_switch_isPtpPort(__port__) != RT_ERR_OK)         \
-+        {                                                       \
-+            return RT_ERR_PORT_ID;                              \
-+        }                                                       \
-+    }while(0)
-+
-+#define RTK_CHK_PORTMASK_VALID(__portmask__)                        \
-+    do                                                              \
-+    {                                                               \
-+        if(rtk_switch_isPortMaskValid(__portmask__) != RT_ERR_OK)   \
-+        {                                                           \
-+            return RT_ERR_PORT_MASK;                                \
-+        }                                                           \
-+    }while(0)
-+
-+#define RTK_CHK_PORTMASK_VALID_ONLY_UTP(__portmask__)               \
-+    do                                                              \
-+    {                                                               \
-+        if(rtk_switch_isPortMaskUtp(__portmask__) != RT_ERR_OK)     \
-+        {                                                           \
-+            return RT_ERR_PORT_MASK;                                \
-+        }                                                           \
-+    }while(0)
-+
-+#define RTK_CHK_PORTMASK_VALID_ONLY_EXT(__portmask__)               \
-+    do                                                              \
-+    {                                                               \
-+        if(rtk_switch_isPortMaskExt(__portmask__) != RT_ERR_OK)     \
-+        {                                                           \
-+            return RT_ERR_PORT_MASK;                                \
-+        }                                                           \
-+    }while(0)
-+
-+#define RTK_CHK_TRUNK_GROUP_VALID(__grpId__)                        \
-+    do                                                              \
-+    {                                                               \
-+        if(rtk_switch_isValidTrunkGrpId(__grpId__) != RT_ERR_OK)    \
-+        {                                                           \
-+            return RT_ERR_LA_TRUNK_ID;                              \
-+        }                                                           \
-+    }while(0)
-+
-+#define RTK_PORTMASK_IS_PORT_SET(__portmask__, __port__)    (((__portmask__).bits[0] & (0x00000001 << __port__)) ? 1 : 0)
-+#define RTK_PORTMASK_IS_EMPTY(__portmask__)                 (((__portmask__).bits[0] == 0) ? 1 : 0)
-+#define RTK_PORTMASK_CLEAR(__portmask__)                    ((__portmask__).bits[0] = 0)
-+#define RTK_PORTMASK_PORT_SET(__portmask__, __port__)       ((__portmask__).bits[0] |= (0x00000001 << __port__))
-+#define RTK_PORTMASK_PORT_CLEAR(__portmask__, __port__)     ((__portmask__).bits[0] &= ~(0x00000001 << __port__))
-+#define RTK_PORTMASK_ALLPORT_SET(__portmask__)              (rtk_switch_logPortMask_get(&__portmask__))
-+#define RTK_PORTMASK_SCAN(__portmask__, __port__)           for(__port__ = 0; __port__ < RTK_SWITCH_PORT_NUM; __port__++)  if(RTK_PORTMASK_IS_PORT_SET(__portmask__, __port__))
-+#define RTK_PORTMASK_COMPARE(__portmask_A__, __portmask_B__)    ((__portmask_A__).bits[0] - (__portmask_B__).bits[0])
-+
-+#define RTK_SCAN_ALL_PHY_PORTMASK(__port__)                 for(__port__ = 0; __port__ < RTK_SWITCH_PORT_NUM; __port__++)  if( (rtk_switch_phyPortMask_get() & (0x00000001 << __port__)))
-+#define RTK_SCAN_ALL_LOG_PORT(__port__)                     for(__port__ = 0; __port__ < RTK_SWITCH_PORT_NUM; __port__++)  if( rtk_switch_logicalPortCheck(__port__) == RT_ERR_OK)
-+#define RTK_SCAN_ALL_LOG_PORTMASK(__portmask__)             for((__portmask__).bits[0] = 0; (__portmask__).bits[0] < 0x7FFFF; (__portmask__).bits[0]++)  if( rtk_switch_isPortMaskValid(&__portmask__) == RT_ERR_OK)
-+
-+/* Port mask defination */
-+#define RTK_PHY_PORTMASK_ALL                                (rtk_switch_phyPortMask_get())
-+
-+/* Port defination*/
-+#define RTK_MAX_LOGICAL_PORT_ID                             (rtk_switch_maxLogicalPort_get())
-+
-+/* Function Name:
-+ *      rtk_switch_probe
-+ * Description:
-+ *      Probe switch
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Switch probed
-+ *      RT_ERR_FAILED   - Switch Unprobed.
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_switch_probe(switch_chip_t *pSwitchChip);
-+
-+/* Function Name:
-+ *      rtk_switch_initialState_set
-+ * Description:
-+ *      Set initial status
-+ * Input:
-+ *      state   - Initial state;
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Initialized
-+ *      RT_ERR_FAILED   - Uninitialized
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_switch_initialState_set(init_state_t state);
-+
-+/* Function Name:
-+ *      rtk_switch_initialState_get
-+ * Description:
-+ *      Get initial status
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      INIT_COMPLETED     - Initialized
-+ *      INIT_NOT_COMPLETED - Uninitialized
-+ * Note:
-+ *
-+ */
-+extern init_state_t rtk_switch_initialState_get(void);
-+
-+/* Function Name:
-+ *      rtk_switch_logicalPortCheck
-+ * Description:
-+ *      Check logical port ID.
-+ * Input:
-+ *      logicalPort     - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Port ID is correct
-+ *      RT_ERR_FAILED   - Port ID is not correct
-+ *      RT_ERR_NOT_INIT - Not Initialize
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_switch_logicalPortCheck(rtk_port_t logicalPort);
-+
-+/* Function Name:
-+ *      rtk_switch_isUtpPort
-+ * Description:
-+ *      Check is logical port a UTP port
-+ * Input:
-+ *      logicalPort     - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Port ID is a UTP port
-+ *      RT_ERR_FAILED   - Port ID is not a UTP port
-+ *      RT_ERR_NOT_INIT - Not Initialize
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_switch_isUtpPort(rtk_port_t logicalPort);
-+
-+/* Function Name:
-+ *      rtk_switch_isExtPort
-+ * Description:
-+ *      Check is logical port a Extension port
-+ * Input:
-+ *      logicalPort     - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Port ID is a EXT port
-+ *      RT_ERR_FAILED   - Port ID is not a EXT port
-+ *      RT_ERR_NOT_INIT - Not Initialize
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_switch_isExtPort(rtk_port_t logicalPort);
-+
-+/* Function Name:
-+ *      rtk_switch_isHsgPort
-+ * Description:
-+ *      Check is logical port a HSG port
-+ * Input:
-+ *      logicalPort     - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Port ID is a HSG port
-+ *      RT_ERR_FAILED   - Port ID is not a HSG port
-+ *      RT_ERR_NOT_INIT - Not Initialize
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_switch_isHsgPort(rtk_port_t logicalPort);
-+
-+/* Function Name:
-+ *      rtk_switch_isSgmiiPort
-+ * Description:
-+ *      Check is logical port a SGMII port
-+ * Input:
-+ *      logicalPort     - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Port ID is a SGMII port
-+ *      RT_ERR_FAILED   - Port ID is not a SGMII port
-+ *      RT_ERR_NOT_INIT - Not Initialize
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_switch_isSgmiiPort(rtk_port_t logicalPort);
-+
-+/* Function Name:
-+ *      rtk_switch_isCPUPort
-+ * Description:
-+ *      Check is logical port a CPU port
-+ * Input:
-+ *      logicalPort     - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Port ID is a CPU port
-+ *      RT_ERR_FAILED   - Port ID is not a CPU port
-+ *      RT_ERR_NOT_INIT - Not Initialize
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_switch_isCPUPort(rtk_port_t logicalPort);
-+
-+/* Function Name:
-+ *      rtk_switch_isComboPort
-+ * Description:
-+ *      Check is logical port a Combo port
-+ * Input:
-+ *      logicalPort     - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Port ID is a combo port
-+ *      RT_ERR_FAILED   - Port ID is not a combo port
-+ *      RT_ERR_NOT_INIT - Not Initialize
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_switch_isComboPort(rtk_port_t logicalPort);
-+
-+/* Function Name:
-+ *      rtk_switch_ComboPort_get
-+ * Description:
-+ *      Get Combo port ID
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      Port ID of combo port
-+ * Note:
-+ *
-+ */
-+extern rtk_uint32 rtk_switch_ComboPort_get(void);
-+
-+/* Function Name:
-+ *      rtk_switch_isPtpPort
-+ * Description:
-+ *      Check is logical port a PTP port
-+ * Input:
-+ *      logicalPort     - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Port ID is a PTP port
-+ *      RT_ERR_FAILED   - Port ID is not a PTP port
-+ *      RT_ERR_NOT_INIT - Not Initialize
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_switch_isPtpPort(rtk_port_t logicalPort);
-+
-+/* Function Name:
-+ *      rtk_switch_port_L2P_get
-+ * Description:
-+ *      Get physical port ID
-+ * Input:
-+ *      logicalPort       - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      Physical port ID
-+ * Note:
-+ *
-+ */
-+extern rtk_uint32 rtk_switch_port_L2P_get(rtk_port_t logicalPort);
-+
-+/* Function Name:
-+ *      rtk_switch_port_P2L_get
-+ * Description:
-+ *      Get logical port ID
-+ * Input:
-+ *      physicalPort       - physical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      logical port ID
-+ * Note:
-+ *
-+ */
-+extern rtk_port_t rtk_switch_port_P2L_get(rtk_uint32 physicalPort);
-+
-+/* Function Name:
-+ *      rtk_switch_isPortMaskValid
-+ * Description:
-+ *      Check portmask is valid or not
-+ * Input:
-+ *      pPmask       - logical port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - port mask is valid
-+ *      RT_ERR_FAILED       - port mask is not valid
-+ *      RT_ERR_NOT_INIT     - Not Initialize
-+ *      RT_ERR_NULL_POINTER - Null pointer
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_switch_isPortMaskValid(rtk_portmask_t *pPmask);
-+
-+/* Function Name:
-+ *      rtk_switch_isPortMaskUtp
-+ * Description:
-+ *      Check all ports in portmask are only UTP port
-+ * Input:
-+ *      pPmask       - logical port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Only UTP port in port mask
-+ *      RT_ERR_FAILED       - Not only UTP port in port mask
-+ *      RT_ERR_NOT_INIT     - Not Initialize
-+ *      RT_ERR_NULL_POINTER - Null pointer
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_switch_isPortMaskUtp(rtk_portmask_t *pPmask);
-+
-+/* Function Name:
-+ *      rtk_switch_isPortMaskExt
-+ * Description:
-+ *      Check all ports in portmask are only EXT port
-+ * Input:
-+ *      pPmask       - logical port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Only EXT port in port mask
-+ *      RT_ERR_FAILED       - Not only EXT port in port mask
-+ *      RT_ERR_NOT_INIT     - Not Initialize
-+ *      RT_ERR_NULL_POINTER - Null pointer
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_switch_isPortMaskExt(rtk_portmask_t *pPmask);
-+
-+/* Function Name:
-+ *      rtk_switch_portmask_L2P_get
-+ * Description:
-+ *      Get physicl portmask from logical portmask
-+ * Input:
-+ *      pLogicalPmask       - logical port mask
-+ * Output:
-+ *      pPhysicalPortmask   - physical port mask
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_NOT_INIT     - Not Initialize
-+ *      RT_ERR_NULL_POINTER - Null pointer
-+ *      RT_ERR_PORT_MASK    - Error port mask
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_switch_portmask_L2P_get(rtk_portmask_t *pLogicalPmask, rtk_uint32 *pPhysicalPortmask);
-+
-+/* Function Name:
-+ *      rtk_switch_portmask_P2L_get
-+ * Description:
-+ *      Get logical portmask from physical portmask
-+ * Input:
-+ *      physicalPortmask    - physical port mask
-+ * Output:
-+ *      pLogicalPmask       - logical port mask
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_NOT_INIT     - Not Initialize
-+ *      RT_ERR_NULL_POINTER - Null pointer
-+ *      RT_ERR_PORT_MASK    - Error port mask
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_switch_portmask_P2L_get(rtk_uint32 physicalPortmask, rtk_portmask_t *pLogicalPmask);
-+
-+/* Function Name:
-+ *      rtk_switch_phyPortMask_get
-+ * Description:
-+ *      Get physical portmask
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      0x00                - Not Initialize
-+ *      Other value         - Physical port mask
-+ * Note:
-+ *
-+ */
-+rtk_uint32 rtk_switch_phyPortMask_get(void);
-+
-+/* Function Name:
-+ *      rtk_switch_logPortMask_get
-+ * Description:
-+ *      Get Logical portmask
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_NOT_INIT     - Not Initialize
-+ *      RT_ERR_NULL_POINTER - Null pointer
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_switch_logPortMask_get(rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_switch_init
-+ * Description:
-+ *      Set chip to default configuration enviroment
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      The API can set chip registers to default configuration for different release chip model.
-+ */
-+extern rtk_api_ret_t rtk_switch_init(void);
-+
-+/* Function Name:
-+ *      rtk_switch_portMaxPktLen_set
-+ * Description:
-+ *      Set Max packet length
-+ * Input:
-+ *      port    - Port ID
-+ *      speed   - Speed
-+ *      cfgId   - Configuration ID
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Error Input
-+ * Note:
-+ */
-+extern rtk_api_ret_t rtk_switch_portMaxPktLen_set(rtk_port_t port, rtk_switch_maxPktLen_linkSpeed_t speed, rtk_uint32 cfgId);
-+
-+/* Function Name:
-+ *      rtk_switch_portMaxPktLen_get
-+ * Description:
-+ *      Get Max packet length
-+ * Input:
-+ *      port    - Port ID
-+ *      speed   - Speed
-+ * Output:
-+ *      pCfgId  - Configuration ID
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Error Input
-+ * Note:
-+ */
-+extern rtk_api_ret_t rtk_switch_portMaxPktLen_get(rtk_port_t port, rtk_switch_maxPktLen_linkSpeed_t speed, rtk_uint32 *pCfgId);
-+
-+/* Function Name:
-+ *      rtk_switch_maxPktLenCfg_set
-+ * Description:
-+ *      Set Max packet length configuration
-+ * Input:
-+ *      cfgId   - Configuration ID
-+ *      pktLen  - Max packet length
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Error Input
-+ * Note:
-+ */
-+extern rtk_api_ret_t rtk_switch_maxPktLenCfg_set(rtk_uint32 cfgId, rtk_uint32 pktLen);
-+
-+/* Function Name:
-+ *      rtk_switch_maxPktLenCfg_get
-+ * Description:
-+ *      Get Max packet length configuration
-+ * Input:
-+ *      cfgId   - Configuration ID
-+ *      pPktLen - Max packet length
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Error Input
-+ * Note:
-+ */
-+extern rtk_api_ret_t rtk_switch_maxPktLenCfg_get(rtk_uint32 cfgId, rtk_uint32 *pPktLen);
-+
-+/* Function Name:
-+ *      rtk_switch_greenEthernet_set
-+ * Description:
-+ *      Set all Ports Green Ethernet state.
-+ * Input:
-+ *      enable - Green Ethernet state.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - OK
-+ *      RT_ERR_FAILED   - Failed
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_ENABLE   - Invalid enable input.
-+ * Note:
-+ *      This API can set all Ports Green Ethernet state.
-+ *      The configuration is as following:
-+ *      - DISABLE
-+ *      - ENABLE
-+ */
-+extern rtk_api_ret_t rtk_switch_greenEthernet_set(rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_switch_greenEthernet_get
-+ * Description:
-+ *      Get all Ports Green Ethernet state.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnable - Green Ethernet state.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API can get Green Ethernet state.
-+ */
-+extern rtk_api_ret_t rtk_switch_greenEthernet_get(rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_switch_maxLogicalPort_get
-+ * Description:
-+ *      Get Max logical port ID
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      Max logical port
-+ * Note:
-+ *      This API can get max logical port
-+ */
-+extern rtk_port_t rtk_switch_maxLogicalPort_get(void);
-+
-+/* Function Name:
-+ *      rtk_switch_maxMeterId_get
-+ * Description:
-+ *      Get Max Meter ID
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      0x00                - Not Initialize
-+ *      Other value         - Max Meter ID
-+ * Note:
-+ *
-+ */
-+extern rtk_uint32 rtk_switch_maxMeterId_get(void);
-+
-+/* Function Name:
-+ *      rtk_switch_maxLutAddrNumber_get
-+ * Description:
-+ *      Get Max LUT Address number
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      0x00                - Not Initialize
-+ *      Other value         - Max LUT Address number
-+ * Note:
-+ *
-+ */
-+extern rtk_uint32 rtk_switch_maxLutAddrNumber_get(void);
-+
-+/* Function Name:
-+ *      rtk_switch_isValidTrunkGrpId
-+ * Description:
-+ *      Check if trunk group is valid or not
-+ * Input:
-+ *      grpId       - Group ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Trunk Group ID is valid
-+ *      RT_ERR_LA_TRUNK_ID  - Trunk Group ID is not valid
-+ * Note:
-+ *
-+ */
-+rtk_uint32 rtk_switch_isValidTrunkGrpId(rtk_uint32 grpId);
-+
-+#endif
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtk_types.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtk_types.h
-new file mode 100644
-index 0000000000..589ecb7811
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtk_types.h
-@@ -0,0 +1,155 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level type enum definition.
-+ * Feature :
-+ *
-+ */
-+
-+#ifndef _RTL8367C_TYPES_H_
-+#define _RTL8367C_TYPES_H_
-+
-+//#include <stdio.h>
-+
-+typedef unsigned long long      rtk_uint64;
-+typedef long long               rtk_int64;
-+typedef unsigned int            rtk_uint32;
-+typedef int                     rtk_int32;
-+typedef unsigned short          rtk_uint16;
-+typedef short                   rtk_int16;
-+typedef unsigned char           rtk_uint8;
-+typedef char                    rtk_int8;
-+
-+#define CONST_T     const
-+
-+#define RTK_TOTAL_NUM_OF_WORD_FOR_1BIT_PORT_LIST    1
-+
-+#define RTK_MAX_NUM_OF_PORT                         8
-+#define RTK_PORT_ID_MAX                             (RTK_MAX_NUM_OF_PORT-1)
-+#define RTK_PHY_ID_MAX                              (RTK_MAX_NUM_OF_PORT-4)
-+#define RTK_MAX_PORT_MASK                           0xFF
-+
-+#define RTK_WHOLE_SYSTEM                            0xFF
-+
-+typedef struct rtk_portmask_s
-+{
-+    rtk_uint32  bits[RTK_TOTAL_NUM_OF_WORD_FOR_1BIT_PORT_LIST];
-+} rtk_portmask_t;
-+
-+typedef enum rtk_enable_e
-+{
-+    DISABLED = 0,
-+    ENABLED,
-+    RTK_ENABLE_END
-+} rtk_enable_t;
-+
-+#ifndef ETHER_ADDR_LEN
-+#define ETHER_ADDR_LEN      6
-+#endif
-+
-+/* ethernet address type */
-+typedef struct  rtk_mac_s
-+{
-+    rtk_uint8 octet[ETHER_ADDR_LEN];
-+} rtk_mac_t;
-+
-+typedef rtk_uint32  rtk_pri_t;      /* priority vlaue */
-+typedef rtk_uint32  rtk_qid_t;      /* queue id type */
-+typedef rtk_uint32  rtk_data_t;
-+typedef rtk_uint32  rtk_dscp_t;     /* dscp vlaue */
-+typedef rtk_uint32  rtk_fid_t;      /* filter id type */
-+typedef rtk_uint32  rtk_vlan_t;     /* vlan id type */
-+typedef rtk_uint32  rtk_mac_cnt_t;  /* MAC count type  */
-+typedef rtk_uint32  rtk_meter_id_t; /* meter id type  */
-+typedef rtk_uint32  rtk_rate_t;     /* rate type  */
-+
-+typedef enum rtk_port_e
-+{
-+    UTP_PORT0 = 0,
-+    UTP_PORT1,
-+    UTP_PORT2,
-+    UTP_PORT3,
-+    UTP_PORT4,
-+    UTP_PORT5,
-+    UTP_PORT6,
-+    UTP_PORT7,
-+
-+    EXT_PORT0 = 16,
-+    EXT_PORT1,
-+    EXT_PORT2,
-+
-+    UNDEFINE_PORT = 30,
-+    RTK_PORT_MAX = 31
-+} rtk_port_t;
-+
-+
-+#ifndef _RTL_TYPES_H
-+
-+#if 0
-+typedef unsigned long long      uint64;
-+typedef long long               int64;
-+typedef unsigned int            uint32;
-+typedef int                     int32;
-+typedef unsigned short          uint16;
-+typedef short                   int16;
-+typedef unsigned char           uint8;
-+typedef char                    int8;
-+#endif
-+
-+typedef rtk_uint32                  ipaddr_t;
-+typedef rtk_uint32                  memaddr;
-+
-+#ifndef ETHER_ADDR_LEN
-+#define ETHER_ADDR_LEN      6
-+#endif
-+
-+typedef struct ether_addr_s {
-+    rtk_uint8 octet[ETHER_ADDR_LEN];
-+} ether_addr_t;
-+
-+#ifdef __KERNEL__
-+#define rtlglue_printf printk
-+#else
-+#define rtlglue_printf printf
-+#endif
-+#define PRINT           rtlglue_printf
-+#endif /*_RTL_TYPES_H*/
-+
-+/* type abstraction */
-+#ifdef EMBEDDED_SUPPORT
-+
-+typedef rtk_int16                   rtk_api_ret_t;
-+typedef rtk_int16                   ret_t;
-+typedef rtk_uint32                  rtk_u_long;
-+
-+#else
-+
-+typedef rtk_int32                   rtk_api_ret_t;
-+typedef rtk_int32                   ret_t;
-+typedef rtk_uint64                  rtk_u_long_t;
-+
-+#endif
-+
-+#ifndef NULL
-+#define NULL 0
-+#endif
-+
-+#ifndef TRUE
-+#define TRUE 1
-+#endif
-+
-+#ifndef FALSE
-+#define FALSE 0
-+#endif
-+
-+#define CONST           const
-+#endif /* _RTL8367C_TYPES_H_ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv.h
-new file mode 100644
-index 0000000000..55cb41b067
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv.h
-@@ -0,0 +1,129 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature :
-+ *
-+ */
-+
-+
-+#ifndef _RTL8367C_ASICDRV_H_
-+#define _RTL8367C_ASICDRV_H_
-+
-+#include <rtk_types.h>
-+#include <rtk_error.h>
-+#include <rtl8367c_reg.h>
-+#include <rtl8367c_base.h>
-+
-+#define RTL8367C_REGBITLENGTH               16
-+#define RTL8367C_REGDATAMAX                 0xFFFF
-+
-+#define RTL8367C_VIDMAX                     0xFFF
-+#define RTL8367C_EVIDMAX                    0x1FFF
-+#define RTL8367C_CVIDXNO                    32
-+#define RTL8367C_CVIDXMAX                   (RTL8367C_CVIDXNO-1)
-+
-+#define RTL8367C_PRIMAX                     7
-+#define RTL8367C_DSCPMAX                    63
-+
-+#define RTL8367C_PORTNO                     11
-+#define RTL8367C_PORTIDMAX                  (RTL8367C_PORTNO-1)
-+#define RTL8367C_PMSKMAX                    ((1<<(RTL8367C_PORTNO))-1)
-+#define RTL8367C_PORTMASK                   0x7FF
-+
-+#define RTL8367C_PHYNO                      5
-+#define RTL8367C_PHYIDMAX                  (RTL8367C_PHYNO-1)
-+
-+#define RTL8367C_SVIDXNO                    64
-+#define RTL8367C_SVIDXMAX                   (RTL8367C_SVIDXNO-1)
-+#define RTL8367C_MSTIMAX                    15
-+
-+#define RTL8367C_METERNO                    64
-+#define RTL8367C_METERMAX                   (RTL8367C_METERNO-1)
-+#define RTL8367C_METERBUCKETSIZEMAX         0xFFFF
-+
-+#define RTL8367C_QUEUENO                    8
-+#define RTL8367C_QIDMAX                     (RTL8367C_QUEUENO-1)
-+
-+#define RTL8367C_PHY_BUSY_CHECK_COUNTER     1000
-+
-+#define RTL8367C_QOS_GRANULARTY_MAX         0x7FFFF
-+#define RTL8367C_QOS_GRANULARTY_LSB_MASK    0xFFFF
-+#define RTL8367C_QOS_GRANULARTY_LSB_OFFSET  0
-+#define RTL8367C_QOS_GRANULARTY_MSB_MASK    0x70000
-+#define RTL8367C_QOS_GRANULARTY_MSB_OFFSET  16
-+
-+#define RTL8367C_QOS_GRANULARTY_UNIT_KBPS   8
-+
-+#define RTL8367C_QOS_RATE_INPUT_MAX         (0x1FFFF * 8)
-+#define RTL8367C_QOS_RATE_INPUT_MAX_HSG     (0x7FFFF * 8)
-+#define RTL8367C_QOS_RATE_INPUT_MIN         8
-+#define RTL8367C_QOS_PPS_INPUT_MAX          (0x7FFFF)
-+#define RTL8367C_QOS_PPS_INPUT_MIN          1
-+
-+#define RTL8367C_QUEUE_MASK                 0xFF
-+
-+#define RTL8367C_EFIDMAX                    0x7
-+#define RTL8367C_FIDMAX                     0xF
-+
-+#define RTL8367C_EAV_SECONDMAX                  0xFFFFFFFF
-+#define RTL8367C_EAV_NANOSECONDMAX          0x3B9AC9FF
-+
-+
-+/* the above macro is generated by genDotH */
-+#define RTL8367C_VALID_REG_NO               3869
-+
-+/*=======================================================================
-+ *  Enum
-+ *========================================================================*/
-+enum RTL8367C_TABLE_ACCESS_OP
-+{
-+    TB_OP_READ = 0,
-+    TB_OP_WRITE
-+};
-+
-+enum RTL8367C_TABLE_ACCESS_TARGET
-+{
-+    TB_TARGET_ACLRULE = 1,
-+    TB_TARGET_ACLACT,
-+    TB_TARGET_CVLAN,
-+    TB_TARGET_L2,
-+    TB_TARGET_IGMP_GROUP
-+};
-+
-+#define RTL8367C_TABLE_ACCESS_REG_DATA(op, target)    ((op << 3) | target)
-+
-+/*=======================================================================
-+ *  Structures
-+ *========================================================================*/
-+
-+
-+#ifdef __cplusplus
-+extern "C" {
-+#endif
-+extern ret_t rtl8367c_setAsicRegBit(rtk_uint32 reg, rtk_uint32 bit, rtk_uint32 value);
-+extern ret_t rtl8367c_getAsicRegBit(rtk_uint32 reg, rtk_uint32 bit, rtk_uint32 *pValue);
-+
-+extern ret_t rtl8367c_setAsicRegBits(rtk_uint32 reg, rtk_uint32 bits, rtk_uint32 value);
-+extern ret_t rtl8367c_getAsicRegBits(rtk_uint32 reg, rtk_uint32 bits, rtk_uint32 *pValue);
-+
-+extern ret_t rtl8367c_setAsicReg(rtk_uint32 reg, rtk_uint32 value);
-+extern ret_t rtl8367c_getAsicReg(rtk_uint32 reg, rtk_uint32 *pValue);
-+
-+#ifdef __cplusplus
-+}
-+#endif
-+
-+
-+
-+#endif /*#ifndef _RTL8367C_ASICDRV_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_acl.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_acl.h
-new file mode 100644
-index 0000000000..8ae69ac332
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_acl.h
-@@ -0,0 +1,231 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : ACL related function drivers
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_ACL_H_
-+#define _RTL8367C_ASICDRV_ACL_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+#define RTL8367C_ACLRULENO                  96
-+
-+#define RTL8367C_ACLRULEMAX                 (RTL8367C_ACLRULENO-1)
-+#define RTL8367C_ACLRULEFIELDNO             8
-+#define RTL8367C_ACLTEMPLATENO              5
-+#define RTL8367C_ACLTYPEMAX                 (RTL8367C_ACLTEMPLATENO-1)
-+
-+#define RTL8367C_ACLRULETBLEN               9
-+#define RTL8367C_ACLACTTBLEN                4
-+#define RTL8367C_ACLRULETBADDR(type, rule)  ((type << 6) | rule)
-+#define RTL8367C_ACLRULETBADDR2(type, rule) ((type << 5) | (rule + 64))
-+
-+#define ACL_ACT_CVLAN_ENABLE_MASK           0x1
-+#define ACL_ACT_SVLAN_ENABLE_MASK           0x2
-+#define ACL_ACT_PRIORITY_ENABLE_MASK        0x4
-+#define ACL_ACT_POLICING_ENABLE_MASK        0x8
-+#define ACL_ACT_FWD_ENABLE_MASK             0x10
-+#define ACL_ACT_INTGPIO_ENABLE_MASK         0x20
-+
-+#define RTL8367C_ACLRULETAGBITS             5
-+
-+#define RTL8367C_ACLRANGENO                 16
-+
-+#define RTL8367C_ACLRANGEMAX                (RTL8367C_ACLRANGENO-1)
-+
-+#define RTL8367C_ACL_PORTRANGEMAX           (0xFFFF)
-+#define RTL8367C_ACL_ACT_TABLE_LEN          (4)
-+
-+enum ACLTCAMTYPES
-+{
-+    CAREBITS= 0,
-+    DATABITS
-+};
-+
-+typedef enum aclFwdAct
-+{
-+    RTL8367C_ACL_FWD_MIRROR = 0,
-+    RTL8367C_ACL_FWD_REDIRECT,
-+    RTL8367C_ACL_FWD_MIRRORFUNTION,
-+    RTL8367C_ACL_FWD_TRAP,
-+} rtl8367c_aclFwd_t;
-+
-+enum ACLFIELDTYPES
-+{
-+    ACL_UNUSED,
-+    ACL_DMAC0,
-+    ACL_DMAC1,
-+    ACL_DMAC2,
-+    ACL_SMAC0,
-+    ACL_SMAC1,
-+    ACL_SMAC2,
-+    ACL_ETHERTYPE,
-+    ACL_STAG,
-+    ACL_CTAG,
-+    ACL_IP4SIP0 = 0x10,
-+    ACL_IP4SIP1,
-+    ACL_IP4DIP0,
-+    ACL_IP4DIP1,
-+    ACL_IP6SIP0WITHIPV4 = 0x20,
-+    ACL_IP6SIP1WITHIPV4,
-+    ACL_IP6DIP0WITHIPV4 = 0x28,
-+    ACL_IP6DIP1WITHIPV4,
-+    ACL_VIDRANGE = 0x30,
-+    ACL_IPRANGE,
-+    ACL_PORTRANGE,
-+    ACL_FIELD_VALID,
-+    ACL_FIELD_SELECT00 = 0x40,
-+    ACL_FIELD_SELECT01,
-+    ACL_FIELD_SELECT02,
-+    ACL_FIELD_SELECT03,
-+    ACL_FIELD_SELECT04,
-+    ACL_FIELD_SELECT05,
-+    ACL_FIELD_SELECT06,
-+    ACL_FIELD_SELECT07,
-+    ACL_FIELD_SELECT08,
-+    ACL_FIELD_SELECT09,
-+    ACL_FIELD_SELECT10,
-+    ACL_FIELD_SELECT11,
-+    ACL_FIELD_SELECT12,
-+    ACL_FIELD_SELECT13,
-+    ACL_FIELD_SELECT14,
-+    ACL_FIELD_SELECT15,
-+    ACL_TCPSPORT = 0x80,
-+    ACL_TCPDPORT,
-+    ACL_TCPFLAG,
-+    ACL_UDPSPORT,
-+    ACL_UDPDPORT,
-+    ACL_ICMPCODETYPE,
-+    ACL_IGMPTYPE,
-+    ACL_SPORT,
-+    ACL_DPORT,
-+    ACL_IP4TOSPROTO,
-+    ACL_IP4FLAGOFF,
-+    ACL_TCNH,
-+    ACL_CPUTAG,
-+    ACL_L2PAYLOAD,
-+    ACL_IP6SIP0,
-+    ACL_IP6SIP1,
-+    ACL_IP6SIP2,
-+    ACL_IP6SIP3,
-+    ACL_IP6SIP4,
-+    ACL_IP6SIP5,
-+    ACL_IP6SIP6,
-+    ACL_IP6SIP7,
-+    ACL_IP6DIP0,
-+    ACL_IP6DIP1,
-+    ACL_IP6DIP2,
-+    ACL_IP6DIP3,
-+    ACL_IP6DIP4,
-+    ACL_IP6DIP5,
-+    ACL_IP6DIP6,
-+    ACL_IP6DIP7,
-+    ACL_TYPE_END
-+};
-+
-+struct acl_rule_smi_st{
-+    rtk_uint16 rule_info;
-+    rtk_uint16 field[RTL8367C_ACLRULEFIELDNO];
-+};
-+
-+struct acl_rule_smi_ext_st{
-+    rtk_uint16 rule_info;
-+};
-+
-+typedef struct ACLRULESMI{
-+    struct acl_rule_smi_st  care_bits;
-+    rtk_uint16      valid:1;
-+    struct acl_rule_smi_st  data_bits;
-+
-+    struct acl_rule_smi_ext_st care_bits_ext;
-+    struct acl_rule_smi_ext_st data_bits_ext;
-+}rtl8367c_aclrulesmi;
-+
-+struct acl_rule_st{
-+    rtk_uint16 active_portmsk:11;
-+    rtk_uint16 type:3;
-+    rtk_uint16 tag_exist:5;
-+    rtk_uint16 field[RTL8367C_ACLRULEFIELDNO];
-+};
-+
-+typedef struct ACLRULE{
-+    struct acl_rule_st  data_bits;
-+    rtk_uint16      valid:1;
-+    struct acl_rule_st  care_bits;
-+}rtl8367c_aclrule;
-+
-+
-+typedef struct rtl8367c_acltemplate_s{
-+    rtk_uint8 field[8];
-+}rtl8367c_acltemplate_t;
-+
-+
-+typedef struct acl_act_s{
-+    rtk_uint16 cvidx_cact:7;
-+    rtk_uint16 cact:2;
-+    rtk_uint16 svidx_sact:7;
-+    rtk_uint16 sact:2;
-+
-+
-+    rtk_uint16 aclmeteridx:7;
-+    rtk_uint16 fwdpmask:11;
-+    rtk_uint16 fwdact:2;
-+
-+    rtk_uint16 pridx:7;
-+    rtk_uint16 priact:2;
-+    rtk_uint16 gpio_pin:4;
-+    rtk_uint16 gpio_en:1;
-+    rtk_uint16 aclint:1;
-+
-+    rtk_uint16 cact_ext:2;
-+    rtk_uint16 fwdact_ext:1;
-+    rtk_uint16 tag_fmt:2;
-+}rtl8367c_acl_act_t;
-+
-+typedef struct acl_rule_union_s
-+{
-+    rtl8367c_aclrule aclRule;
-+    rtl8367c_acl_act_t aclAct;
-+    rtk_uint32 aclActCtrl;
-+    rtk_uint32 aclNot;
-+}rtl8367c_acl_rule_union_t;
-+
-+
-+extern ret_t rtl8367c_setAsicAcl(rtk_uint32 port, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicAcl(rtk_uint32 port, rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicAclUnmatchedPermit(rtk_uint32 port, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicAclUnmatchedPermit(rtk_uint32 port, rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicAclRule(rtk_uint32 index, rtl8367c_aclrule *pAclRule);
-+extern ret_t rtl8367c_getAsicAclRule(rtk_uint32 index, rtl8367c_aclrule *pAclRule);
-+extern ret_t rtl8367c_setAsicAclNot(rtk_uint32 index, rtk_uint32 not);
-+extern ret_t rtl8367c_getAsicAclNot(rtk_uint32 index, rtk_uint32* pNot);
-+extern ret_t rtl8367c_setAsicAclTemplate(rtk_uint32 index, rtl8367c_acltemplate_t* pAclType);
-+extern ret_t rtl8367c_getAsicAclTemplate(rtk_uint32 index, rtl8367c_acltemplate_t *pAclType);
-+extern ret_t rtl8367c_setAsicAclAct(rtk_uint32 index, rtl8367c_acl_act_t* pAclAct);
-+extern ret_t rtl8367c_getAsicAclAct(rtk_uint32 index, rtl8367c_acl_act_t *pAclAct);
-+extern ret_t rtl8367c_setAsicAclActCtrl(rtk_uint32 index, rtk_uint32 aclActCtrl);
-+extern ret_t rtl8367c_getAsicAclActCtrl(rtk_uint32 index, rtk_uint32 *aclActCtrl);
-+extern ret_t rtl8367c_setAsicAclPortRange(rtk_uint32 index, rtk_uint32 type, rtk_uint32 upperPort, rtk_uint32 lowerPort);
-+extern ret_t rtl8367c_getAsicAclPortRange(rtk_uint32 index, rtk_uint32* pType, rtk_uint32* pUpperPort, rtk_uint32* pLowerPort);
-+extern ret_t rtl8367c_setAsicAclVidRange(rtk_uint32 index, rtk_uint32 type, rtk_uint32 upperVid, rtk_uint32 lowerVid);
-+extern ret_t rtl8367c_getAsicAclVidRange(rtk_uint32 index, rtk_uint32* pType, rtk_uint32* pUpperVid, rtk_uint32* pLowerVid);
-+extern ret_t rtl8367c_setAsicAclIpRange(rtk_uint32 index, rtk_uint32 type, ipaddr_t upperIp, ipaddr_t lowerIp);
-+extern ret_t rtl8367c_getAsicAclIpRange(rtk_uint32 index, rtk_uint32* pType, ipaddr_t* pUpperIp, ipaddr_t* pLowerIp);
-+extern ret_t rtl8367c_setAsicAclGpioPolarity(rtk_uint32 polarity);
-+extern ret_t rtl8367c_getAsicAclGpioPolarity(rtk_uint32* pPolarity);
-+
-+#endif /*_RTL8367C_ASICDRV_ACL_H_*/
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_cputag.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_cputag.h
-new file mode 100644
-index 0000000000..f7a460145e
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_cputag.h
-@@ -0,0 +1,49 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Proprietary CPU-tag related function drivers
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_CPUTAG_H_
-+#define _RTL8367C_ASICDRV_CPUTAG_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+enum CPUTAG_INSERT_MODE
-+{
-+    CPUTAG_INSERT_TO_ALL = 0,
-+    CPUTAG_INSERT_TO_TRAPPING,
-+    CPUTAG_INSERT_TO_NO,
-+    CPUTAG_INSERT_END
-+};
-+
-+extern ret_t rtl8367c_setAsicCputagEnable(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicCputagEnable(rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsicCputagTrapPort(rtk_uint32 port);
-+extern ret_t rtl8367c_getAsicCputagTrapPort(rtk_uint32 *pPort);
-+extern ret_t rtl8367c_setAsicCputagPortmask(rtk_uint32 portmask);
-+extern ret_t rtl8367c_getAsicCputagPortmask(rtk_uint32 *pPmsk);
-+extern ret_t rtl8367c_setAsicCputagInsertMode(rtk_uint32 mode);
-+extern ret_t rtl8367c_getAsicCputagInsertMode(rtk_uint32 *pMode);
-+extern ret_t rtl8367c_setAsicCputagPriorityRemapping(rtk_uint32 srcPri, rtk_uint32 newPri);
-+extern ret_t rtl8367c_getAsicCputagPriorityRemapping(rtk_uint32 srcPri, rtk_uint32 *pNewPri);
-+extern ret_t rtl8367c_setAsicCputagPosition(rtk_uint32 postion);
-+extern ret_t rtl8367c_getAsicCputagPosition(rtk_uint32* pPostion);
-+extern ret_t rtl8367c_setAsicCputagMode(rtk_uint32 mode);
-+extern ret_t rtl8367c_getAsicCputagMode(rtk_uint32 *pMode);
-+extern ret_t rtl8367c_setAsicCputagRxMinLength(rtk_uint32 mode);
-+extern ret_t rtl8367c_getAsicCputagRxMinLength(rtk_uint32 *pMode);
-+
-+#endif /*#ifndef _RTL8367C_ASICDRV_CPUTAG_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_dot1x.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_dot1x.h
-new file mode 100644
-index 0000000000..7639ae782b
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_dot1x.h
-@@ -0,0 +1,52 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : 802.1X related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_DOT1X_H_
-+#define _RTL8367C_ASICDRV_DOT1X_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+enum DOT1X_UNAUTH_BEHAV
-+{
-+    DOT1X_UNAUTH_DROP = 0,
-+    DOT1X_UNAUTH_TRAP,
-+    DOT1X_UNAUTH_GVLAN,
-+    DOT1X_UNAUTH_END
-+};
-+
-+extern ret_t rtl8367c_setAsic1xPBEnConfig(rtk_uint32 port, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsic1xPBEnConfig(rtk_uint32 port, rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsic1xPBAuthConfig(rtk_uint32 port, rtk_uint32 auth);
-+extern ret_t rtl8367c_getAsic1xPBAuthConfig(rtk_uint32 port, rtk_uint32 *pAuth);
-+extern ret_t rtl8367c_setAsic1xPBOpdirConfig(rtk_uint32 port, rtk_uint32 opdir);
-+extern ret_t rtl8367c_getAsic1xPBOpdirConfig(rtk_uint32 port, rtk_uint32 *pOpdir);
-+extern ret_t rtl8367c_setAsic1xMBEnConfig(rtk_uint32 port, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsic1xMBEnConfig(rtk_uint32 port, rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsic1xMBOpdirConfig(rtk_uint32 opdir);
-+extern ret_t rtl8367c_getAsic1xMBOpdirConfig(rtk_uint32 *pOpdir);
-+extern ret_t rtl8367c_setAsic1xProcConfig(rtk_uint32 port, rtk_uint32 proc);
-+extern ret_t rtl8367c_getAsic1xProcConfig(rtk_uint32 port, rtk_uint32 *pProc);
-+extern ret_t rtl8367c_setAsic1xGuestVidx(rtk_uint32 index);
-+extern ret_t rtl8367c_getAsic1xGuestVidx(rtk_uint32 *pIndex);
-+extern ret_t rtl8367c_setAsic1xGVOpdir(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsic1xGVOpdir(rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsic1xTrapPriority(rtk_uint32 priority);
-+extern ret_t rtl8367c_getAsic1xTrapPriority(rtk_uint32 *pPriority);
-+
-+
-+#endif /*_RTL8367C_ASICDRV_DOT1X_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_eav.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_eav.h
-new file mode 100644
-index 0000000000..b633f66fb0
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_eav.h
-@@ -0,0 +1,109 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Ethernet AV related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_EAV_H_
-+#define _RTL8367C_ASICDRV_EAV_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+typedef enum RTL8367C_PTP_TIME_CMD_E
-+{
-+    PTP_TIME_READ = 0,
-+    PTP_TIME_WRITE,
-+    PTP_TIME_INC,
-+    PTP_TIME_DEC,
-+    PTP_TIME_CMD_END
-+}RTL8367C_PTP_TIME_CMD;
-+
-+typedef enum RTL8367C_PTP_TIME_ADJ_E
-+{
-+    PTP_TIME_ADJ_INC = 0,
-+    PTP_TIME_ADJ_DEC,
-+    PTP_TIME_ADJ_END
-+}RTL8367C_PTP_TIME_ADJ;
-+
-+typedef enum RTL8367C_PTP_TIME_CTRL_E
-+{
-+    PTP_TIME_CTRL_STOP = 0,
-+    PTP_TIME_CTRL_START,
-+    PTP_TIME_CTRL_END
-+}RTL8367C_PTP_TIME_CTRL;
-+
-+typedef enum RTL8367C_PTP_INTR_IMRS_E
-+{
-+    PTP_IMRS_TX_SYNC,
-+    PTP_IMRS_TX_DELAY_REQ,
-+    PTP_IMRS_TX_PDELAY_REQ,
-+    PTP_IMRS_TX_PDELAY_RESP,
-+    PTP_IMRS_RX_SYNC,
-+    PTP_IMRS_RX_DELAY_REQ,
-+    PTP_IMRS_RX_PDELAY_REQ,
-+    PTP_IMRS_RX_PDELAY_RESP,
-+    PTP_IMRS_END,
-+}RTL8367C_PTP_INTR_IMRS;
-+
-+
-+typedef enum RTL8367C_PTP_PKT_TYPE_E
-+{
-+    PTP_PKT_TYPE_TX_SYNC,
-+    PTP_PKT_TYPE_TX_DELAY_REQ,
-+    PTP_PKT_TYPE_TX_PDELAY_REQ,
-+    PTP_PKT_TYPE_TX_PDELAY_RESP,
-+    PTP_PKT_TYPE_RX_SYNC,
-+    PTP_PKT_TYPE_RX_DELAY_REQ,
-+    PTP_PKT_TYPE_RX_PDELAY_REQ,
-+    PTP_PKT_TYPE_RX_PDELAY_RESP,
-+    PTP_PKT_TYPE_END,
-+}RTL8367C_PTP_PKT_TYPE;
-+
-+typedef struct  rtl8367c_ptp_time_stamp_s{
-+    rtk_uint32 sequence_id;
-+    rtk_uint32 second;
-+    rtk_uint32 nano_second;
-+}rtl8367c_ptp_time_stamp_t;
-+
-+#define RTL8367C_PTP_INTR_MASK        0xFF
-+
-+#define RTL8367C_PTP_PORT_MASK        0x3FF
-+
-+extern ret_t rtl8367c_setAsicEavMacAddress(ether_addr_t mac);
-+extern ret_t rtl8367c_getAsicEavMacAddress(ether_addr_t *pMac);
-+extern ret_t rtl8367c_setAsicEavTpid(rtk_uint32 outerTag, rtk_uint32 innerTag);
-+extern ret_t rtl8367c_getAsicEavTpid(rtk_uint32* pOuterTag, rtk_uint32* pInnerTag);
-+extern ret_t rtl8367c_setAsicEavSysTime(rtk_uint32 second, rtk_uint32 nanoSecond);
-+extern ret_t rtl8367c_getAsicEavSysTime(rtk_uint32* pSecond, rtk_uint32* pNanoSecond);
-+extern ret_t rtl8367c_setAsicEavSysTimeAdjust(rtk_uint32 type, rtk_uint32 second, rtk_uint32 nanoSecond);
-+extern ret_t rtl8367c_setAsicEavSysTimeCtrl(rtk_uint32 control);
-+extern ret_t rtl8367c_getAsicEavSysTimeCtrl(rtk_uint32* pControl);
-+extern ret_t rtl8367c_setAsicEavInterruptMask(rtk_uint32 imr);
-+extern ret_t rtl8367c_getAsicEavInterruptMask(rtk_uint32* pImr);
-+extern ret_t rtl8367c_getAsicEavInterruptStatus(rtk_uint32* pIms);
-+extern ret_t rtl8367c_setAsicEavPortInterruptStatus(rtk_uint32 port, rtk_uint32 ims);
-+extern ret_t rtl8367c_getAsicEavPortInterruptStatus(rtk_uint32 port, rtk_uint32* pIms);
-+extern ret_t rtl8367c_setAsicEavPortEnable(rtk_uint32 port, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicEavPortEnable(rtk_uint32 port, rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_getAsicEavPortTimeStamp(rtk_uint32 port, rtk_uint32 type, rtl8367c_ptp_time_stamp_t* timeStamp);
-+
-+extern ret_t rtl8367c_setAsicEavTrap(rtk_uint32 port, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicEavTrap(rtk_uint32 port, rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsicEavEnable(rtk_uint32 port, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicEavEnable(rtk_uint32 port, rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsicEavPriRemapping(rtk_uint32 srcpriority, rtk_uint32 priority);
-+extern ret_t rtl8367c_getAsicEavPriRemapping(rtk_uint32 srcpriority, rtk_uint32 *pPriority);
-+
-+#endif /*#ifndef _RTL8367C_ASICDRV_EAV_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_eee.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_eee.h
-new file mode 100644
-index 0000000000..6bedce62b0
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_eee.h
-@@ -0,0 +1,31 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 48989 $
-+ * $Date: 2014-07-01 15:45:24 +0800 (¶g¤G, 01 ¤C¤ë 2014) $
-+ *
-+ * Purpose : RTL8370 switch high-level API for RTL8367C
-+ * Feature :
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_EEE_H_
-+#define _RTL8367C_ASICDRV_EEE_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+#define EEE_OCP_PHY_ADDR    (0xA5D0)
-+
-+extern ret_t rtl8367c_setAsicEee100M(rtk_uint32 port, rtk_uint32 enable);
-+extern ret_t rtl8367c_getAsicEee100M(rtk_uint32 port, rtk_uint32 *enable);
-+extern ret_t rtl8367c_setAsicEeeGiga(rtk_uint32 port, rtk_uint32 enable);
-+extern ret_t rtl8367c_getAsicEeeGiga(rtk_uint32 port, rtk_uint32 *enable);
-+
-+
-+#endif /*_RTL8367C_ASICDRV_EEE_H_*/
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_fc.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_fc.h
-new file mode 100644
-index 0000000000..ce67cdebac
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_fc.h
-@@ -0,0 +1,99 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Flow control related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_FC_H_
-+#define _RTL8367C_ASICDRV_FC_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+#define RTL8367C_PAGE_NUMBER    0x600
-+
-+
-+enum FLOW_CONTROL_TYPE
-+{
-+    FC_EGRESS = 0,
-+    FC_INGRESS,
-+};
-+
-+enum FC_JUMBO_SIZE
-+{
-+    FC_JUMBO_SIZE_3K = 0,
-+    FC_JUMBO_SIZE_4K,
-+    FC_JUMBO_SIZE_6K,
-+    FC_JUMBO_SIZE_9K,
-+    FC_JUMBO_SIZE_END,
-+
-+};
-+
-+
-+extern ret_t rtl8367c_setAsicFlowControlSelect(rtk_uint32 select);
-+extern ret_t rtl8367c_getAsicFlowControlSelect(rtk_uint32 *pSelect);
-+extern ret_t rtl8367c_setAsicFlowControlJumboMode(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicFlowControlJumboMode(rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicFlowControlJumboModeSize(rtk_uint32 size);
-+extern ret_t rtl8367c_getAsicFlowControlJumboModeSize(rtk_uint32* pSize);
-+extern ret_t rtl8367c_setAsicFlowControlQueueEgressEnable(rtk_uint32 port, rtk_uint32 qid, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicFlowControlQueueEgressEnable(rtk_uint32 port, rtk_uint32 qid, rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicFlowControlDropAll(rtk_uint32 dropall);
-+extern ret_t rtl8367c_getAsicFlowControlDropAll(rtk_uint32* pDropall);
-+extern ret_t rtl8367c_setAsicFlowControlPauseAllThreshold(rtk_uint32 threshold);
-+extern ret_t rtl8367c_getAsicFlowControlPauseAllThreshold(rtk_uint32 *pThreshold);
-+extern ret_t rtl8367c_setAsicFlowControlSystemThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold);
-+extern ret_t rtl8367c_getAsicFlowControlSystemThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold);
-+extern ret_t rtl8367c_setAsicFlowControlSharedThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold);
-+extern ret_t rtl8367c_getAsicFlowControlSharedThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold);
-+extern ret_t rtl8367c_setAsicFlowControlPortThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold);
-+extern ret_t rtl8367c_getAsicFlowControlPortThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold);
-+extern ret_t rtl8367c_setAsicFlowControlPortPrivateThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold);
-+extern ret_t rtl8367c_getAsicFlowControlPortPrivateThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold);
-+extern ret_t rtl8367c_setAsicFlowControlSystemDropThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold);
-+extern ret_t rtl8367c_getAsicFlowControlSystemDropThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold);
-+extern ret_t rtl8367c_setAsicFlowControlSharedDropThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold);
-+extern ret_t rtl8367c_getAsicFlowControlSharedDropThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold);
-+extern ret_t rtl8367c_setAsicFlowControlPortDropThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold);
-+extern ret_t rtl8367c_getAsicFlowControlPortDropThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold);
-+extern ret_t rtl8367c_setAsicFlowControlPortPrivateDropThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold);
-+extern ret_t rtl8367c_getAsicFlowControlPortPrivateDropThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold);
-+extern ret_t rtl8367c_setAsicFlowControlSystemJumboThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold);
-+extern ret_t rtl8367c_getAsicFlowControlSystemJumboThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold);
-+extern ret_t rtl8367c_setAsicFlowControlSharedJumboThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold);
-+extern ret_t rtl8367c_getAsicFlowControlSharedJumboThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold);
-+extern ret_t rtl8367c_setAsicFlowControlPortJumboThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold);
-+extern ret_t rtl8367c_getAsicFlowControlPortJumboThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold);
-+extern ret_t rtl8367c_setAsicFlowControlPortPrivateJumboThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold);
-+extern ret_t rtl8367c_getAsicFlowControlPortPrivateJumboThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold);
-+
-+extern ret_t rtl8367c_setAsicEgressFlowControlPortDropGap(rtk_uint32 gap);
-+extern ret_t rtl8367c_getAsicEgressFlowControlPortDropGap(rtk_uint32 *pGap);
-+extern ret_t rtl8367c_setAsicEgressFlowControlQueueDropGap(rtk_uint32 gap);
-+extern ret_t rtl8367c_getAsicEgressFlowControlQueueDropGap(rtk_uint32 *pGap);
-+extern ret_t rtl8367c_setAsicEgressFlowControlPortDropThreshold(rtk_uint32 port, rtk_uint32 threshold);
-+extern ret_t rtl8367c_getAsicEgressFlowControlPortDropThreshold(rtk_uint32 port, rtk_uint32 *pThreshold);
-+extern ret_t rtl8367c_setAsicEgressFlowControlQueueDropThreshold(rtk_uint32 qid, rtk_uint32 threshold);
-+extern ret_t rtl8367c_getAsicEgressFlowControlQueueDropThreshold(rtk_uint32 qid, rtk_uint32 *pThreshold);
-+extern ret_t rtl8367c_getAsicEgressQueueEmptyPortMask(rtk_uint32 *pPortmask);
-+extern ret_t rtl8367c_getAsicTotalPage(rtk_uint32 *pPageCount);
-+extern ret_t rtl8367c_getAsicPulbicPage(rtk_uint32 *pPageCount);
-+extern ret_t rtl8367c_getAsicMaxTotalPage(rtk_uint32 *pPageCount);
-+extern ret_t rtl8367c_getAsicMaxPulbicPage(rtk_uint32 *pPageCount);
-+extern ret_t rtl8367c_getAsicPortPage(rtk_uint32 port, rtk_uint32 *pPageCount);
-+extern ret_t rtl8367c_getAsicPortPageMax(rtk_uint32 port, rtk_uint32 *pPageCount);
-+extern ret_t rtl8367c_setAsicFlowControlEgressPortIndep(rtk_uint32 port, rtk_uint32 enable);
-+extern ret_t rtl8367c_getAsicFlowControlEgressPortIndep(rtk_uint32 port, rtk_uint32 *pEnable);
-+
-+#endif /*_RTL8367C_ASICDRV_FC_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_green.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_green.h
-new file mode 100644
-index 0000000000..38fd085d06
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_green.h
-@@ -0,0 +1,36 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Green ethernet related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_GREEN_H_
-+#define _RTL8367C_ASICDRV_GREEN_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_phy.h>
-+
-+#define PHY_POWERSAVING_REG                         24
-+
-+extern ret_t rtl8367c_setAsicGreenTrafficType(rtk_uint32 priority, rtk_uint32 traffictype);
-+extern ret_t rtl8367c_getAsicGreenTrafficType(rtk_uint32 priority, rtk_uint32* pTraffictype);
-+extern ret_t rtl8367c_getAsicGreenPortPage(rtk_uint32 port, rtk_uint32* pPage);
-+extern ret_t rtl8367c_getAsicGreenHighPriorityTraffic(rtk_uint32 port, rtk_uint32* pIndicator);
-+extern ret_t rtl8367c_setAsicGreenHighPriorityTraffic(rtk_uint32 port);
-+extern ret_t rtl8367c_setAsicGreenEthernet(rtk_uint32 port, rtk_uint32 green);
-+extern ret_t rtl8367c_getAsicGreenEthernet(rtk_uint32 port, rtk_uint32* green);
-+extern ret_t rtl8367c_setAsicPowerSaving(rtk_uint32 phy, rtk_uint32 enable);
-+extern ret_t rtl8367c_getAsicPowerSaving(rtk_uint32 phy, rtk_uint32* enable);
-+#endif /*#ifndef _RTL8367C_ASICDRV_GREEN_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_hsb.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_hsb.h
-new file mode 100644
-index 0000000000..f4f9bb377b
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_hsb.h
-@@ -0,0 +1,43 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Field selector related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV__HSB_H_
-+#define _RTL8367C_ASICDRV__HSB_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+#define RTL8367C_FIELDSEL_FORMAT_NUMBER      (16)
-+#define RTL8367C_FIELDSEL_MAX_OFFSET         (255)
-+
-+enum FIELDSEL_FORMAT_FORMAT
-+{
-+    FIELDSEL_FORMAT_DEFAULT = 0,
-+    FIELDSEL_FORMAT_RAW,
-+    FIELDSEL_FORMAT_LLC,
-+    FIELDSEL_FORMAT_IPV4,
-+    FIELDSEL_FORMAT_ARP,
-+    FIELDSEL_FORMAT_IPV6,
-+    FIELDSEL_FORMAT_IPPAYLOAD,
-+    FIELDSEL_FORMAT_L4PAYLOAD,
-+    FIELDSEL_FORMAT_END
-+};
-+
-+extern ret_t rtl8367c_setAsicFieldSelector(rtk_uint32 index, rtk_uint32 format, rtk_uint32 offset);
-+extern ret_t rtl8367c_getAsicFieldSelector(rtk_uint32 index, rtk_uint32* pFormat, rtk_uint32* pOffset);
-+
-+#endif /*_RTL8367C_ASICDRV__HSB_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_i2c.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_i2c.h
-new file mode 100644
-index 0000000000..d5b095a0e5
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_i2c.h
-@@ -0,0 +1,47 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 38651 $
-+ * $Date: 2016-02-27 14:32:56 +0800 (©P¤T, 17 ¥|¤ë 2016) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : I2C related functions
-+ *
-+ */
-+
-+
-+#ifndef _RTL8367C_ASICDRV_I2C_H_
-+#define _RTL8367C_ASICDRV_I2C_H_
-+#include <rtk_types.h>
-+#include <rtl8367c_asicdrv.h>
-+
-+
-+#define TIMEROUT_FOR_MICROSEMI (0x400)
-+
-+#define GPIO_INPUT 1
-+#define GPIO_OUTPUT 2
-+
-+extern ret_t rtl8367c_setAsicI2C_checkBusIdle(void);
-+extern ret_t rtl8367c_setAsicI2CStartCmd(void);
-+extern ret_t rtl8367c_setAsicI2CStopCmd(void);
-+extern ret_t rtl8367c_setAsicI2CTxOneCharCmd(rtk_uint8 oneChar);
-+extern ret_t rtl8367c_setAsicI2CcheckRxAck(void);
-+extern ret_t rtl8367c_setAsicI2CRxOneCharCmd(rtk_uint8 *pValue);
-+extern ret_t rtl8367c_setAsicI2CTxAckCmd(void);
-+extern ret_t rtl8367c_setAsicI2CTxNoAckCmd(void);
-+extern ret_t rtl8367c_setAsicI2CSoftRSTseqCmd(void);
-+extern ret_t rtl8367c_setAsicI2CGpioPinGroup(rtk_uint32 pinGroup_ID);
-+extern ret_t rtl8367c_getAsicI2CGpioPinGroup(rtk_uint32 * pPinGroup_ID);
-+
-+
-+
-+
-+
-+#endif /*#ifndef _RTL8367C_ASICDRV_I2C_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_igmp.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_igmp.h
-new file mode 100644
-index 0000000000..b879b6b520
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_igmp.h
-@@ -0,0 +1,169 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : IGMP related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_IGMP_H_
-+#define _RTL8367C_ASICDRV_IGMP_H_
-+
-+/****************************************************************/
-+/* Header File inclusion                                        */
-+/****************************************************************/
-+#include <rtl8367c_asicdrv.h>
-+
-+#define RTL8367C_MAX_LEAVE_TIMER        (7)
-+#define RTL8367C_MAX_QUERY_INT          (0xFFFF)
-+#define RTL8367C_MAX_ROB_VAR            (7)
-+
-+#define RTL8367C_IGMP_GOUP_NO           (256)
-+#define RTL8367C_IGMP_MAX_GOUP          (0xFF)
-+#define RTL8367C_IGMP_GRP_BLEN          (3)
-+#define RTL8367C_ROUTER_PORT_INVALID    (0xF)
-+
-+enum RTL8367C_IGMPTABLE_FULL_OP
-+{
-+    TABLE_FULL_FORWARD = 0,
-+    TABLE_FULL_DROP,
-+    TABLE_FULL_TRAP,
-+    TABLE_FULL_OP_END
-+};
-+
-+enum RTL8367C_CRC_ERR_OP
-+{
-+    CRC_ERR_DROP = 0,
-+    CRC_ERR_TRAP,
-+    CRC_ERR_FORWARD,
-+    CRC_ERR_OP_END
-+};
-+
-+enum RTL8367C_IGMP_MLD_PROTOCOL_OP
-+{
-+    PROTOCOL_OP_ASIC = 0,
-+    PROTOCOL_OP_FLOOD,
-+    PROTOCOL_OP_TRAP,
-+    PROTOCOL_OP_DROP,
-+    PROTOCOL_OP_END
-+};
-+
-+enum RTL8367C_IGMP_MLD_BYPASS_GROUP
-+{
-+    BYPASS_224_0_0_X = 0,
-+    BYPASS_224_0_1_X,
-+    BYPASS_239_255_255_X,
-+    BYPASS_IPV6_00XX,
-+    BYPASS_GROUP_END
-+};
-+
-+typedef struct
-+{
-+    rtk_uint32 p0_timer;
-+    rtk_uint32 p1_timer;
-+    rtk_uint32 p2_timer;
-+    rtk_uint32 p3_timer;
-+    rtk_uint32 p4_timer;
-+    rtk_uint32 p5_timer;
-+    rtk_uint32 p6_timer;
-+    rtk_uint32 p7_timer;
-+    rtk_uint32 p8_timer;
-+    rtk_uint32 p9_timer;
-+    rtk_uint32 p10_timer;
-+    rtk_uint32 report_supp_flag;
-+
-+}rtl8367c_igmpgroup;
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * This program is the proprietary software of Realtek Semiconductor
-+ * Corporation and/or its licensors, and only be used, duplicated,
-+ * modified or distributed under the authorized license from Realtek.
-+ *
-+ * ANY USE OF THE SOFTWARE OTHER THAN AS AUTHORIZED UNDER
-+ * THIS LICENSE OR COPYRIGHT LAW IS PROHIBITED.
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : IGMP related functions
-+ *
-+ */
-+#include <rtl8367c_asicdrv_igmp.h>
-+
-+ret_t rtl8367c_setAsicIgmp(rtk_uint32 enabled);
-+ret_t rtl8367c_getAsicIgmp(rtk_uint32 *pEnabled);
-+ret_t rtl8367c_setAsicIpMulticastVlanLeaky(rtk_uint32 port, rtk_uint32 enabled );
-+ret_t rtl8367c_getAsicIpMulticastVlanLeaky(rtk_uint32 port, rtk_uint32 *pEnabled );
-+ret_t rtl8367c_setAsicIGMPTableFullOP(rtk_uint32 operation);
-+ret_t rtl8367c_getAsicIGMPTableFullOP(rtk_uint32 *pOperation);
-+ret_t rtl8367c_setAsicIGMPCRCErrOP(rtk_uint32 operation);
-+ret_t rtl8367c_getAsicIGMPCRCErrOP(rtk_uint32 *pOperation);
-+ret_t rtl8367c_setAsicIGMPFastLeaveEn(rtk_uint32 enabled);
-+ret_t rtl8367c_getAsicIGMPFastLeaveEn(rtk_uint32 *pEnabled);
-+ret_t rtl8367c_setAsicIGMPLeaveTimer(rtk_uint32 leave_timer);
-+ret_t rtl8367c_getAsicIGMPLeaveTimer(rtk_uint32 *pLeave_timer);
-+ret_t rtl8367c_setAsicIGMPQueryInterval(rtk_uint32 interval);
-+ret_t rtl8367c_getAsicIGMPQueryInterval(rtk_uint32 *pInterval);
-+ret_t rtl8367c_setAsicIGMPRobVar(rtk_uint32 rob_var);
-+ret_t rtl8367c_getAsicIGMPRobVar(rtk_uint32 *pRob_var);
-+ret_t rtl8367c_setAsicIGMPStaticRouterPort(rtk_uint32 pmsk);
-+ret_t rtl8367c_getAsicIGMPStaticRouterPort(rtk_uint32 *pMsk);
-+ret_t rtl8367c_setAsicIGMPAllowDynamicRouterPort(rtk_uint32 pmsk);
-+ret_t rtl8367c_getAsicIGMPAllowDynamicRouterPort(rtk_uint32 *pPmsk);
-+ret_t rtl8367c_getAsicIGMPdynamicRouterPort1(rtk_uint32 *pPort, rtk_uint32 *pTimer);
-+ret_t rtl8367c_getAsicIGMPdynamicRouterPort2(rtk_uint32 *pPort, rtk_uint32 *pTimer);
-+ret_t rtl8367c_setAsicIGMPSuppression(rtk_uint32 report_supp_enabled, rtk_uint32 leave_supp_enabled);
-+ret_t rtl8367c_getAsicIGMPSuppression(rtk_uint32 *pReport_supp_enabled, rtk_uint32 *pLeave_supp_enabled);
-+ret_t rtl8367c_setAsicIGMPQueryRX(rtk_uint32 port, rtk_uint32 allow_query);
-+ret_t rtl8367c_getAsicIGMPQueryRX(rtk_uint32 port, rtk_uint32 *pAllow_query);
-+ret_t rtl8367c_setAsicIGMPReportRX(rtk_uint32 port, rtk_uint32 allow_report);
-+ret_t rtl8367c_getAsicIGMPReportRX(rtk_uint32 port, rtk_uint32 *pAllow_report);
-+ret_t rtl8367c_setAsicIGMPLeaveRX(rtk_uint32 port, rtk_uint32 allow_leave);
-+ret_t rtl8367c_getAsicIGMPLeaveRX(rtk_uint32 port, rtk_uint32 *pAllow_leave);
-+ret_t rtl8367c_setAsicIGMPMRPRX(rtk_uint32 port, rtk_uint32 allow_mrp);
-+ret_t rtl8367c_getAsicIGMPMRPRX(rtk_uint32 port, rtk_uint32 *pAllow_mrp);
-+ret_t rtl8367c_setAsicIGMPMcDataRX(rtk_uint32 port, rtk_uint32 allow_mcdata);
-+ret_t rtl8367c_getAsicIGMPMcDataRX(rtk_uint32 port, rtk_uint32 *pAllow_mcdata);
-+ret_t rtl8367c_setAsicIGMPv1Opeartion(rtk_uint32 port, rtk_uint32 igmpv1_op);
-+ret_t rtl8367c_getAsicIGMPv1Opeartion(rtk_uint32 port, rtk_uint32 *pIgmpv1_op);
-+ret_t rtl8367c_setAsicIGMPv2Opeartion(rtk_uint32 port, rtk_uint32 igmpv2_op);
-+ret_t rtl8367c_getAsicIGMPv2Opeartion(rtk_uint32 port, rtk_uint32 *pIgmpv2_op);
-+ret_t rtl8367c_setAsicIGMPv3Opeartion(rtk_uint32 port, rtk_uint32 igmpv3_op);
-+ret_t rtl8367c_getAsicIGMPv3Opeartion(rtk_uint32 port, rtk_uint32 *pIgmpv3_op);
-+ret_t rtl8367c_setAsicMLDv1Opeartion(rtk_uint32 port, rtk_uint32 mldv1_op);
-+ret_t rtl8367c_getAsicMLDv1Opeartion(rtk_uint32 port, rtk_uint32 *pMldv1_op);
-+ret_t rtl8367c_setAsicMLDv2Opeartion(rtk_uint32 port, rtk_uint32 mldv2_op);
-+ret_t rtl8367c_getAsicMLDv2Opeartion(rtk_uint32 port, rtk_uint32 *pMldv2_op);
-+ret_t rtl8367c_setAsicIGMPPortMAXGroup(rtk_uint32 port, rtk_uint32 max_group);
-+ret_t rtl8367c_getAsicIGMPPortMAXGroup(rtk_uint32 port, rtk_uint32 *pMax_group);
-+ret_t rtl8367c_getAsicIGMPPortCurrentGroup(rtk_uint32 port, rtk_uint32 *pCurrent_group);
-+ret_t rtl8367c_getAsicIGMPGroup(rtk_uint32 idx, rtk_uint32 *pValid, rtl8367c_igmpgroup *pGrp);
-+ret_t rtl8367c_setAsicIpMulticastPortIsoLeaky(rtk_uint32 port, rtk_uint32 enabled);
-+ret_t rtl8367c_getAsicIpMulticastPortIsoLeaky(rtk_uint32 port, rtk_uint32 *pEnabled);
-+ret_t rtl8367c_setAsicIGMPReportLeaveFlood(rtk_uint32 flood);
-+ret_t rtl8367c_getAsicIGMPReportLeaveFlood(rtk_uint32 *pFlood);
-+ret_t rtl8367c_setAsicIGMPDropLeaveZero(rtk_uint32 drop);
-+ret_t rtl8367c_getAsicIGMPDropLeaveZero(rtk_uint32 *pDrop);
-+ret_t rtl8367c_setAsicIGMPBypassStormCTRL(rtk_uint32 bypass);
-+ret_t rtl8367c_getAsicIGMPBypassStormCTRL(rtk_uint32 *pBypass);
-+ret_t rtl8367c_setAsicIGMPIsoLeaky(rtk_uint32 leaky);
-+ret_t rtl8367c_getAsicIGMPIsoLeaky(rtk_uint32 *pLeaky);
-+ret_t rtl8367c_setAsicIGMPVLANLeaky(rtk_uint32 leaky);
-+ret_t rtl8367c_getAsicIGMPVLANLeaky(rtk_uint32 *pLeaky);
-+ret_t rtl8367c_setAsicIGMPBypassGroup(rtk_uint32 bypassType, rtk_uint32 enabled);
-+ret_t rtl8367c_getAsicIGMPBypassGroup(rtk_uint32 bypassType, rtk_uint32 *pEnabled);
-+
-+#endif /*#ifndef _RTL8367C_ASICDRV_IGMP_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_inbwctrl.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_inbwctrl.h
-new file mode 100644
-index 0000000000..10f3545322
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_inbwctrl.h
-@@ -0,0 +1,30 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Ingress bandwidth control related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_INBWCTRL_H_
-+#define _RTL8367C_ASICDRV_INBWCTRL_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+extern ret_t rtl8367c_setAsicPortIngressBandwidth(rtk_uint32 port, rtk_uint32 bandwidth, rtk_uint32 preifg, rtk_uint32 enableFC);
-+extern ret_t rtl8367c_getAsicPortIngressBandwidth(rtk_uint32 port, rtk_uint32* pBandwidth, rtk_uint32* pPreifg, rtk_uint32* pEnableFC );
-+extern ret_t rtl8367c_setAsicPortIngressBandwidthBypass(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicPortIngressBandwidthBypass(rtk_uint32* pEnabled);
-+
-+
-+#endif /*_RTL8367C_ASICDRV_INBWCTRL_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_interrupt.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_interrupt.h
-new file mode 100644
-index 0000000000..8b78014ab0
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_interrupt.h
-@@ -0,0 +1,66 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Interrupt related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_INTERRUPT_H_
-+#define _RTL8367C_ASICDRV_INTERRUPT_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+typedef enum RTL8367C_INTR_IMRS_E
-+{
-+    IMRS_LINK_CHANGE,
-+    IMRS_METER_EXCEED,
-+    IMRS_L2_LEARN,
-+    IMRS_SPEED_CHANGE,
-+    IMRS_SPECIAL_CONGESTION,
-+    IMRS_GREEN_FEATURE,
-+    IMRS_LOOP_DETECTION,
-+    IMRS_8051,
-+    IMRS_CABLE_DIAG,
-+    IMRS_ACL,
-+    IMRS_RESERVED, /* Unused */
-+    IMRS_SLIENT,
-+    IMRS_END,
-+}RTL8367C_INTR_IMRS;
-+
-+typedef enum RTL8367C_INTR_INDICATOR_E
-+{
-+    INTRST_L2_LEARN = 0,
-+    INTRST_SPEED_CHANGE,
-+    INTRST_SPECIAL_CONGESTION,
-+    INTRST_PORT_LINKDOWN,
-+    INTRST_PORT_LINKUP,
-+    INTRST_METER0_15,
-+    INTRST_METER16_31,
-+    INTRST_RLDP_LOOPED,
-+    INTRST_RLDP_RELEASED,
-+    INTRST_SYS_LEARN,
-+    INTRST_END,
-+}RTL8367C_INTR_INDICATOR;
-+
-+extern ret_t rtl8367c_setAsicInterruptPolarity(rtk_uint32 polarity);
-+extern ret_t rtl8367c_getAsicInterruptPolarity(rtk_uint32* pPolarity);
-+extern ret_t rtl8367c_setAsicInterruptMask(rtk_uint32 imr);
-+extern ret_t rtl8367c_getAsicInterruptMask(rtk_uint32* pImr);
-+extern ret_t rtl8367c_setAsicInterruptStatus(rtk_uint32 ims);
-+extern ret_t rtl8367c_getAsicInterruptStatus(rtk_uint32* pIms);
-+extern ret_t rtl8367c_setAsicInterruptRelatedStatus(rtk_uint32 type, rtk_uint32 status);
-+extern ret_t rtl8367c_getAsicInterruptRelatedStatus(rtk_uint32 type, rtk_uint32* pStatus);
-+
-+
-+#endif /*#ifndef _RTL8367C_ASICDRV_INTERRUPT_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_led.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_led.h
-new file mode 100644
-index 0000000000..a7f8e20643
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_led.h
-@@ -0,0 +1,138 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : LED related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_LED_H_
-+#define _RTL8367C_ASICDRV_LED_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+#define RTL8367C_LEDGROUPNO                 3
-+#define RTL8367C_LEDGROUPMASK               0x7
-+#define RTL8367C_LED_FORCE_MODE_BASE        RTL8367C_REG_CPU_FORCE_LED0_CFG0
-+#define RTL8367C_LED_FORCE_CTRL             RTL8367C_REG_CPU_FORCE_LED_CFG
-+
-+enum RTL8367C_LEDOP{
-+
-+    LEDOP_SCAN0=0,
-+    LEDOP_SCAN1,
-+    LEDOP_PARALLEL,
-+    LEDOP_SERIAL,
-+    LEDOP_END,
-+};
-+
-+enum RTL8367C_LEDSERACT{
-+
-+    LEDSERACT_HIGH=0,
-+    LEDSERACT_LOW,
-+    LEDSERACT_MAX,
-+};
-+
-+enum RTL8367C_LEDSER{
-+
-+    LEDSER_16G=0,
-+    LEDSER_8G,
-+    LEDSER_MAX,
-+};
-+
-+enum RTL8367C_LEDCONF{
-+
-+    LEDCONF_LEDOFF=0,
-+    LEDCONF_DUPCOL,
-+    LEDCONF_LINK_ACT,
-+    LEDCONF_SPD1000,
-+    LEDCONF_SPD100,
-+    LEDCONF_SPD10,
-+    LEDCONF_SPD1000ACT,
-+    LEDCONF_SPD100ACT,
-+    LEDCONF_SPD10ACT,
-+    LEDCONF_SPD10010ACT,
-+    LEDCONF_LOOPDETECT,
-+    LEDCONF_EEE,
-+    LEDCONF_LINKRX,
-+    LEDCONF_LINKTX,
-+    LEDCONF_MASTER,
-+    LEDCONF_ACT,
-+    LEDCONF_END
-+};
-+
-+enum RTL8367C_LEDBLINKRATE{
-+
-+    LEDBLINKRATE_32MS=0,
-+    LEDBLINKRATE_64MS,
-+    LEDBLINKRATE_128MS,
-+    LEDBLINKRATE_256MS,
-+    LEDBLINKRATE_512MS,
-+    LEDBLINKRATE_1024MS,
-+    LEDBLINKRATE_48MS,
-+    LEDBLINKRATE_96MS,
-+    LEDBLINKRATE_END,
-+};
-+
-+enum RTL8367C_LEDFORCEMODE{
-+
-+    LEDFORCEMODE_NORMAL=0,
-+    LEDFORCEMODE_BLINK,
-+    LEDFORCEMODE_OFF,
-+    LEDFORCEMODE_ON,
-+    LEDFORCEMODE_END,
-+};
-+
-+enum RTL8367C_LEDFORCERATE{
-+
-+    LEDFORCERATE_512MS=0,
-+    LEDFORCERATE_1024MS,
-+    LEDFORCERATE_2048MS,
-+    LEDFORCERATE_NORMAL,
-+    LEDFORCERATE_END,
-+
-+};
-+
-+enum RTL8367C_LEDMODE
-+{
-+    RTL8367C_LED_MODE_0 = 0,
-+    RTL8367C_LED_MODE_1,
-+    RTL8367C_LED_MODE_2,
-+    RTL8367C_LED_MODE_3,
-+    RTL8367C_LED_MODE_END
-+};
-+
-+extern ret_t rtl8367c_setAsicLedIndicateInfoConfig(rtk_uint32 ledno, rtk_uint32 config);
-+extern ret_t rtl8367c_getAsicLedIndicateInfoConfig(rtk_uint32 ledno, rtk_uint32* pConfig);
-+extern ret_t rtl8367c_setAsicForceLed(rtk_uint32 port, rtk_uint32 group, rtk_uint32 mode);
-+extern ret_t rtl8367c_getAsicForceLed(rtk_uint32 port, rtk_uint32 group, rtk_uint32* pMode);
-+extern ret_t rtl8367c_setAsicForceGroupLed(rtk_uint32 groupmask, rtk_uint32 mode);
-+extern ret_t rtl8367c_getAsicForceGroupLed(rtk_uint32* groupmask, rtk_uint32* pMode);
-+extern ret_t rtl8367c_setAsicLedBlinkRate(rtk_uint32 blinkRate);
-+extern ret_t rtl8367c_getAsicLedBlinkRate(rtk_uint32* pBlinkRate);
-+extern ret_t rtl8367c_setAsicLedForceBlinkRate(rtk_uint32 blinkRate);
-+extern ret_t rtl8367c_getAsicLedForceBlinkRate(rtk_uint32* pBlinkRate);
-+extern ret_t rtl8367c_setAsicLedGroupMode(rtk_uint32 mode);
-+extern ret_t rtl8367c_getAsicLedGroupMode(rtk_uint32* pMode);
-+extern ret_t rtl8367c_setAsicLedGroupEnable(rtk_uint32 group, rtk_uint32 portmask);
-+extern ret_t rtl8367c_getAsicLedGroupEnable(rtk_uint32 group, rtk_uint32 *portmask);
-+extern ret_t rtl8367c_setAsicLedOperationMode(rtk_uint32 mode);
-+extern ret_t rtl8367c_getAsicLedOperationMode(rtk_uint32 *mode);
-+extern ret_t rtl8367c_setAsicLedSerialModeConfig(rtk_uint32 active, rtk_uint32 serimode);
-+extern ret_t rtl8367c_getAsicLedSerialModeConfig(rtk_uint32 *active, rtk_uint32 *serimode);
-+extern ret_t rtl8367c_setAsicLedOutputEnable(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicLedOutputEnable(rtk_uint32 *ptr_enabled);
-+extern ret_t rtl8367c_setAsicLedSerialOutput(rtk_uint32 output, rtk_uint32 pmask);
-+extern ret_t rtl8367c_getAsicLedSerialOutput(rtk_uint32 *pOutput, rtk_uint32 *pPmask);
-+
-+
-+#endif /*#ifndef _RTL8367C_ASICDRV_LED_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_lut.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_lut.h
-new file mode 100644
-index 0000000000..c94ea07601
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_lut.h
-@@ -0,0 +1,159 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : LUT related functions
-+ *
-+ */
-+
-+
-+#ifndef _RTL8367C_ASICDRV_LUT_H_
-+#define _RTL8367C_ASICDRV_LUT_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+#define RTL8367C_LUT_AGETIMERMAX        (7)
-+#define RTL8367C_LUT_AGESPEEDMAX        (3)
-+#define RTL8367C_LUT_LEARNLIMITMAX      (0x1040)
-+#define RTL8367C_LUT_ADDRMAX            (0x103F)
-+#define RTL8367C_LUT_IPMCGRP_TABLE_MAX  (0x3F)
-+#define RTL8367C_LUT_ENTRY_SIZE         (6)
-+#define RTL8367C_LUT_BUSY_CHECK_NO      (10)
-+
-+#define RTL8367C_LUT_TABLE_SIZE         (6)
-+
-+enum RTL8367C_LUTHASHMETHOD{
-+
-+    LUTHASHMETHOD_SVL=0,
-+    LUTHASHMETHOD_IVL,
-+    LUTHASHMETHOD_END,
-+};
-+
-+
-+enum RTL8367C_LRNOVERACT{
-+
-+    LRNOVERACT_FORWARD=0,
-+    LRNOVERACT_DROP,
-+    LRNOVERACT_TRAP,
-+    LRNOVERACT_END,
-+};
-+
-+enum RTL8367C_LUTREADMETHOD{
-+
-+    LUTREADMETHOD_MAC =0,
-+    LUTREADMETHOD_ADDRESS,
-+    LUTREADMETHOD_NEXT_ADDRESS,
-+    LUTREADMETHOD_NEXT_L2UC,
-+    LUTREADMETHOD_NEXT_L2MC,
-+    LUTREADMETHOD_NEXT_L3MC,
-+    LUTREADMETHOD_NEXT_L2L3MC,
-+    LUTREADMETHOD_NEXT_L2UCSPA,
-+};
-+
-+enum RTL8367C_FLUSHMODE
-+{
-+    FLUSHMDOE_PORT = 0,
-+    FLUSHMDOE_VID,
-+    FLUSHMDOE_FID,
-+    FLUSHMDOE_END,
-+};
-+
-+enum RTL8367C_FLUSHTYPE
-+{
-+    FLUSHTYPE_DYNAMIC = 0,
-+    FLUSHTYPE_BOTH,
-+    FLUSHTYPE_END,
-+};
-+
-+
-+typedef struct LUTTABLE{
-+
-+    ipaddr_t sip;
-+    ipaddr_t dip;
-+    ether_addr_t mac;
-+    rtk_uint16 ivl_svl:1;
-+    rtk_uint16 cvid_fid:12;
-+    rtk_uint16 fid:4;
-+    rtk_uint16 efid:3;
-+
-+    rtk_uint16 nosalearn:1;
-+    rtk_uint16 da_block:1;
-+    rtk_uint16 sa_block:1;
-+    rtk_uint16 auth:1;
-+    rtk_uint16 lut_pri:3;
-+    rtk_uint16 sa_en:1;
-+    rtk_uint16 fwd_en:1;
-+    rtk_uint16 mbr:11;
-+    rtk_uint16 spa:4;
-+    rtk_uint16 age:3;
-+    rtk_uint16 l3lookup:1;
-+    rtk_uint16 igmp_asic:1;
-+    rtk_uint16 igmpidx:8;
-+
-+    rtk_uint16 lookup_hit:1;
-+    rtk_uint16 lookup_busy:1;
-+    rtk_uint16 address:13;
-+
-+    rtk_uint16 l3vidlookup:1;
-+    rtk_uint16 l3_vid:12;
-+
-+    rtk_uint16 wait_time;
-+
-+}rtl8367c_luttb;
-+
-+extern ret_t rtl8367c_setAsicLutIpMulticastLookup(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicLutIpMulticastLookup(rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicLutIpMulticastVidLookup(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicLutIpMulticastVidLookup(rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicLutAgeTimerSpeed(rtk_uint32 timer, rtk_uint32 speed);
-+extern ret_t rtl8367c_getAsicLutAgeTimerSpeed(rtk_uint32* pTimer, rtk_uint32* pSpeed);
-+extern ret_t rtl8367c_setAsicLutCamTbUsage(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicLutCamTbUsage(rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_getAsicLutCamType(rtk_uint32* pType);
-+extern ret_t rtl8367c_setAsicLutLearnLimitNo(rtk_uint32 port, rtk_uint32 number);
-+extern ret_t rtl8367c_getAsicLutLearnLimitNo(rtk_uint32 port, rtk_uint32* pNumber);
-+extern ret_t rtl8367c_setAsicSystemLutLearnLimitNo(rtk_uint32 number);
-+extern ret_t rtl8367c_getAsicSystemLutLearnLimitNo(rtk_uint32 *pNumber);
-+extern ret_t rtl8367c_setAsicLutLearnOverAct(rtk_uint32 action);
-+extern ret_t rtl8367c_getAsicLutLearnOverAct(rtk_uint32* pAction);
-+extern ret_t rtl8367c_setAsicSystemLutLearnOverAct(rtk_uint32 action);
-+extern ret_t rtl8367c_getAsicSystemLutLearnOverAct(rtk_uint32 *pAction);
-+extern ret_t rtl8367c_setAsicSystemLutLearnPortMask(rtk_uint32 portmask);
-+extern ret_t rtl8367c_getAsicSystemLutLearnPortMask(rtk_uint32 *pPortmask);
-+extern ret_t rtl8367c_setAsicL2LookupTb(rtl8367c_luttb *pL2Table);
-+extern ret_t rtl8367c_getAsicL2LookupTb(rtk_uint32 method, rtl8367c_luttb *pL2Table);
-+extern ret_t rtl8367c_getAsicLutLearnNo(rtk_uint32 port, rtk_uint32* pNumber);
-+extern ret_t rtl8367c_setAsicLutIpLookupMethod(rtk_uint32 type);
-+extern ret_t rtl8367c_getAsicLutIpLookupMethod(rtk_uint32* pType);
-+extern ret_t rtl8367c_setAsicLutForceFlush(rtk_uint32 portmask);
-+extern ret_t rtl8367c_getAsicLutForceFlushStatus(rtk_uint32 *pPortmask);
-+extern ret_t rtl8367c_setAsicLutFlushMode(rtk_uint32 mode);
-+extern ret_t rtl8367c_getAsicLutFlushMode(rtk_uint32* pMode);
-+extern ret_t rtl8367c_setAsicLutFlushType(rtk_uint32 type);
-+extern ret_t rtl8367c_getAsicLutFlushType(rtk_uint32* pType);
-+extern ret_t rtl8367c_setAsicLutFlushVid(rtk_uint32 vid);
-+extern ret_t rtl8367c_getAsicLutFlushVid(rtk_uint32* pVid);
-+extern ret_t rtl8367c_setAsicLutFlushFid(rtk_uint32 fid);
-+extern ret_t rtl8367c_getAsicLutFlushFid(rtk_uint32* pFid);
-+extern ret_t rtl8367c_setAsicLutDisableAging(rtk_uint32 port, rtk_uint32 disabled);
-+extern ret_t rtl8367c_getAsicLutDisableAging(rtk_uint32 port, rtk_uint32 *pDisabled);
-+extern ret_t rtl8367c_setAsicLutIPMCGroup(rtk_uint32 index, ipaddr_t group_addr, rtk_uint32 vid, rtk_uint32 pmask, rtk_uint32 valid);
-+extern ret_t rtl8367c_getAsicLutIPMCGroup(rtk_uint32 index, ipaddr_t *pGroup_addr, rtk_uint32 *pVid, rtk_uint32 *pPmask, rtk_uint32 *pValid);
-+extern ret_t rtl8367c_setAsicLutLinkDownForceAging(rtk_uint32 enable);
-+extern ret_t rtl8367c_getAsicLutLinkDownForceAging(rtk_uint32 *pEnable);
-+extern ret_t rtl8367c_setAsicLutFlushAll(void);
-+extern ret_t rtl8367c_getAsicLutFlushAllStatus(rtk_uint32 *pBusyStatus);
-+extern ret_t rtl8367c_setAsicLutIpmcFwdRouterPort(rtk_uint32 enable);
-+extern ret_t rtl8367c_getAsicLutIpmcFwdRouterPort(rtk_uint32 *pEnable);
-+
-+#endif /*_RTL8367C_ASICDRV_LUT_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_meter.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_meter.h
-new file mode 100644
-index 0000000000..ba761a94f8
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_meter.h
-@@ -0,0 +1,34 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Shared meter related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_METER_H_
-+#define _RTL8367C_ASICDRV_METER_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+
-+extern ret_t rtl8367c_setAsicShareMeter(rtk_uint32 index, rtk_uint32 rate, rtk_uint32 ifg);
-+extern ret_t rtl8367c_getAsicShareMeter(rtk_uint32 index, rtk_uint32 *pRate, rtk_uint32 *pIfg);
-+extern ret_t rtl8367c_setAsicShareMeterBucketSize(rtk_uint32 index, rtk_uint32 lbThreshold);
-+extern ret_t rtl8367c_getAsicShareMeterBucketSize(rtk_uint32 index, rtk_uint32 *pLbThreshold);
-+extern ret_t rtl8367c_setAsicShareMeterType(rtk_uint32 index, rtk_uint32 type);
-+extern ret_t rtl8367c_getAsicShareMeterType(rtk_uint32 index, rtk_uint32 *pType);
-+extern ret_t rtl8367c_setAsicMeterExceedStatus(rtk_uint32 index);
-+extern ret_t rtl8367c_getAsicMeterExceedStatus(rtk_uint32 index, rtk_uint32* pStatus);
-+
-+#endif /*_RTL8367C_ASICDRV_FC_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_mib.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_mib.h
-new file mode 100644
-index 0000000000..ca46e0f470
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_mib.h
-@@ -0,0 +1,133 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : MIB related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_MIB_H_
-+#define _RTL8367C_ASICDRV_MIB_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+#define RTL8367C_MIB_PORT_OFFSET                (0x7C)
-+#define RTL8367C_MIB_LEARNENTRYDISCARD_OFFSET   (0x420)
-+
-+#define RTL8367C_MAX_LOG_CNT_NUM                (32)
-+#define RTL8367C_MIB_MAX_LOG_CNT_IDX            (RTL8367C_MAX_LOG_CNT_NUM - 1)
-+#define RTL8367C_MIB_LOG_CNT_OFFSET             (0x3E0)
-+#define RTL8367C_MIB_MAX_LOG_MODE_IDX           (16-1)
-+
-+typedef enum RTL8367C_MIBCOUNTER_E{
-+
-+    /* RX */
-+    ifInOctets = 0,
-+
-+    dot3StatsFCSErrors,
-+    dot3StatsSymbolErrors,
-+    dot3InPauseFrames,
-+    dot3ControlInUnknownOpcodes,
-+
-+    etherStatsFragments,
-+    etherStatsJabbers,
-+    ifInUcastPkts,
-+    etherStatsDropEvents,
-+
-+    ifInMulticastPkts,
-+    ifInBroadcastPkts,
-+    inMldChecksumError,
-+    inIgmpChecksumError,
-+    inMldSpecificQuery,
-+    inMldGeneralQuery,
-+    inIgmpSpecificQuery,
-+    inIgmpGeneralQuery,
-+    inMldLeaves,
-+    inIgmpLeaves,
-+
-+    /* TX/RX */
-+    etherStatsOctets,
-+
-+    etherStatsUnderSizePkts,
-+    etherOversizeStats,
-+    etherStatsPkts64Octets,
-+    etherStatsPkts65to127Octets,
-+    etherStatsPkts128to255Octets,
-+    etherStatsPkts256to511Octets,
-+    etherStatsPkts512to1023Octets,
-+    etherStatsPkts1024to1518Octets,
-+
-+    /* TX */
-+    ifOutOctets,
-+
-+    dot3StatsSingleCollisionFrames,
-+    dot3StatMultipleCollisionFrames,
-+    dot3sDeferredTransmissions,
-+    dot3StatsLateCollisions,
-+    etherStatsCollisions,
-+    dot3StatsExcessiveCollisions,
-+    dot3OutPauseFrames,
-+    ifOutDiscards,
-+
-+    /* ALE */
-+    dot1dTpPortInDiscards,
-+    ifOutUcastPkts,
-+    ifOutMulticastPkts,
-+    ifOutBroadcastPkts,
-+    outOampduPkts,
-+    inOampduPkts,
-+
-+    inIgmpJoinsSuccess,
-+    inIgmpJoinsFail,
-+    inMldJoinsSuccess,
-+    inMldJoinsFail,
-+    inReportSuppressionDrop,
-+    inLeaveSuppressionDrop,
-+    outIgmpReports,
-+    outIgmpLeaves,
-+    outIgmpGeneralQuery,
-+    outIgmpSpecificQuery,
-+    outMldReports,
-+    outMldLeaves,
-+    outMldGeneralQuery,
-+    outMldSpecificQuery,
-+    inKnownMulticastPkts,
-+
-+    /*Device only */
-+    dot1dTpLearnedEntryDiscards,
-+    RTL8367C_MIBS_NUMBER,
-+
-+}RTL8367C_MIBCOUNTER;
-+
-+
-+extern ret_t rtl8367c_setAsicMIBsCounterReset(rtk_uint32 greset, rtk_uint32 qmreset, rtk_uint32 pmask);
-+extern ret_t rtl8367c_getAsicMIBsCounter(rtk_uint32 port,RTL8367C_MIBCOUNTER mibIdx, rtk_uint64* pCounter);
-+extern ret_t rtl8367c_getAsicMIBsLogCounter(rtk_uint32 index, rtk_uint32 *pCounter);
-+extern ret_t rtl8367c_getAsicMIBsControl(rtk_uint32* pMask);
-+
-+extern ret_t rtl8367c_setAsicMIBsResetValue(rtk_uint32 value);
-+extern ret_t rtl8367c_getAsicMIBsResetValue(rtk_uint32* value);
-+
-+extern ret_t rtl8367c_setAsicMIBsUsageMode(rtk_uint32 mode);
-+extern ret_t rtl8367c_getAsicMIBsUsageMode(rtk_uint32* pMode);
-+extern ret_t rtl8367c_setAsicMIBsTimer(rtk_uint32 timer);
-+extern ret_t rtl8367c_getAsicMIBsTimer(rtk_uint32* pTimer);
-+extern ret_t rtl8367c_setAsicMIBsLoggingMode(rtk_uint32 index, rtk_uint32 mode);
-+extern ret_t rtl8367c_getAsicMIBsLoggingMode(rtk_uint32 index, rtk_uint32* pMode);
-+extern ret_t rtl8367c_setAsicMIBsLoggingType(rtk_uint32 index, rtk_uint32 type);
-+extern ret_t rtl8367c_getAsicMIBsLoggingType(rtk_uint32 index, rtk_uint32* pType);
-+extern ret_t rtl8367c_setAsicMIBsResetLoggingCounter(rtk_uint32 index);
-+extern ret_t rtl8367c_setAsicMIBsLength(rtk_uint32 txLengthMode, rtk_uint32 rxLengthMode);
-+extern ret_t rtl8367c_getAsicMIBsLength(rtk_uint32 *pTxLengthMode, rtk_uint32 *pRxLengthMode);
-+
-+#endif /*#ifndef _RTL8367C_ASICDRV_MIB_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_mirror.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_mirror.h
-new file mode 100644
-index 0000000000..23b788d7a6
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_mirror.h
-@@ -0,0 +1,49 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Port mirror related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_MIRROR_H_
-+#define _RTL8367C_ASICDRV_MIRROR_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+extern ret_t rtl8367c_setAsicPortMirror(rtk_uint32 source, rtk_uint32 monitor);
-+extern ret_t rtl8367c_getAsicPortMirror(rtk_uint32 *pSource, rtk_uint32 *pMonitor);
-+extern ret_t rtl8367c_setAsicPortMirrorRxFunction(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicPortMirrorRxFunction(rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicPortMirrorTxFunction(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicPortMirrorTxFunction(rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicPortMirrorIsolation(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicPortMirrorIsolation(rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicPortMirrorPriority(rtk_uint32 priority);
-+extern ret_t rtl8367c_getAsicPortMirrorPriority(rtk_uint32* pPriority);
-+extern ret_t rtl8367c_setAsicPortMirrorMask(rtk_uint32 SourcePortmask);
-+extern ret_t rtl8367c_getAsicPortMirrorMask(rtk_uint32 *pSourcePortmask);
-+extern ret_t rtl8367c_setAsicPortMirrorVlanRxLeaky(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicPortMirrorVlanRxLeaky(rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicPortMirrorVlanTxLeaky(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicPortMirrorVlanTxLeaky(rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicPortMirrorIsolationRxLeaky(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicPortMirrorIsolationRxLeaky(rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicPortMirrorIsolationTxLeaky(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicPortMirrorIsolationTxLeaky(rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicPortMirrorRealKeep(rtk_uint32 mode);
-+extern ret_t rtl8367c_getAsicPortMirrorRealKeep(rtk_uint32* pMode);
-+extern ret_t rtl8367c_setAsicPortMirrorOverride(rtk_uint32 rxMirror, rtk_uint32 txMirror, rtk_uint32 aclMirror);
-+extern ret_t rtl8367c_getAsicPortMirrorOverride(rtk_uint32 *pRxMirror, rtk_uint32 *pTxMirror, rtk_uint32 *pAclMirror);
-+
-+#endif /*#ifndef _RTL8367C_ASICDRV_MIRROR_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_misc.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_misc.h
-new file mode 100644
-index 0000000000..c666a7b58b
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_misc.h
-@@ -0,0 +1,34 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Miscellaneous functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_MISC_H_
-+#define _RTL8367C_ASICDRV_MISC_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+extern ret_t rtl8367c_setAsicMacAddress(ether_addr_t mac);
-+extern ret_t rtl8367c_getAsicMacAddress(ether_addr_t *pMac);
-+extern ret_t rtl8367c_getAsicDebugInfo(rtk_uint32 port, rtk_uint32 *pDebugifo);
-+extern ret_t rtl8367c_setAsicPortJamMode(rtk_uint32 mode);
-+extern ret_t rtl8367c_getAsicPortJamMode(rtk_uint32* pMode);
-+extern ret_t rtl8367c_setAsicMaxLengthCfg(rtk_uint32 cfgId, rtk_uint32 maxLength);
-+extern ret_t rtl8367c_getAsicMaxLengthCfg(rtk_uint32 cfgId, rtk_uint32 *pMaxLength);
-+extern ret_t rtl8367c_setAsicMaxLength(rtk_uint32 port, rtk_uint32 type, rtk_uint32 cfgId);
-+extern ret_t rtl8367c_getAsicMaxLength(rtk_uint32 port, rtk_uint32 type, rtk_uint32 *pCfgId);
-+
-+#endif /*_RTL8367C_ASICDRV_MISC_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_oam.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_oam.h
-new file mode 100644
-index 0000000000..c09dc76988
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_oam.h
-@@ -0,0 +1,47 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 42321 $
-+ * $Date: 2013-08-26 13:51:29 +0800 (¶g¤@, 26 ¤K¤ë 2013) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : OAM related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_OAM_H_
-+#define _RTL8367C_ASICDRV_OAM_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+enum OAMPARACT
-+{
-+    OAM_PARFWD = 0,
-+    OAM_PARLB,
-+    OAM_PARDISCARD,
-+    OAM_PARFWDCPU
-+};
-+
-+enum OAMMULACT
-+{
-+    OAM_MULFWD = 0,
-+    OAM_MULDISCARD,
-+    OAM_MULCPU
-+};
-+
-+extern ret_t rtl8367c_setAsicOamParser(rtk_uint32 port, rtk_uint32 parser);
-+extern ret_t rtl8367c_getAsicOamParser(rtk_uint32 port, rtk_uint32* pParser);
-+extern ret_t rtl8367c_setAsicOamMultiplexer(rtk_uint32 port, rtk_uint32 multiplexer);
-+extern ret_t rtl8367c_getAsicOamMultiplexer(rtk_uint32 port, rtk_uint32* pMultiplexer);
-+extern ret_t rtl8367c_setAsicOamCpuPri(rtk_uint32 priority);
-+extern ret_t rtl8367c_getAsicOamCpuPri(rtk_uint32 *pPriority);
-+extern ret_t rtl8367c_setAsicOamEnable(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicOamEnable(rtk_uint32 *pEnabled);
-+#endif /*_RTL8367C_ASICDRV_OAM_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_phy.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_phy.h
-new file mode 100644
-index 0000000000..e993d6edf7
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_phy.h
-@@ -0,0 +1,43 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : PHY related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_PHY_H_
-+#define _RTL8367C_ASICDRV_PHY_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+#define RTL8367C_PHY_REGNOMAX           0x1F
-+#define RTL8367C_PHY_EXTERNALMAX        0x7
-+
-+#define RTL8367C_PHY_BASE               0x2000
-+#define RTL8367C_PHY_EXT_BASE           0xA000
-+
-+#define RTL8367C_PHY_OFFSET             5
-+#define RTL8367C_PHY_EXT_OFFSET         9
-+
-+#define RTL8367C_PHY_PAGE_ADDRESS       31
-+
-+
-+extern ret_t rtl8367c_setAsicPHYReg(rtk_uint32 phyNo, rtk_uint32 phyAddr, rtk_uint32 regData );
-+extern ret_t rtl8367c_getAsicPHYReg(rtk_uint32 phyNo, rtk_uint32 phyAddr, rtk_uint32* pRegData );
-+extern ret_t rtl8367c_setAsicPHYOCPReg(rtk_uint32 phyNo, rtk_uint32 ocpAddr, rtk_uint32 ocpData );
-+extern ret_t rtl8367c_getAsicPHYOCPReg(rtk_uint32 phyNo, rtk_uint32 ocpAddr, rtk_uint32 *pRegData );
-+extern ret_t rtl8367c_setAsicSdsReg(rtk_uint32 sdsId, rtk_uint32 sdsReg, rtk_uint32 sdsPage,  rtk_uint32 value);
-+extern ret_t rtl8367c_getAsicSdsReg(rtk_uint32 sdsId, rtk_uint32 sdsReg, rtk_uint32 sdsPage, rtk_uint32 *value);
-+
-+#endif /*#ifndef _RTL8367C_ASICDRV_PHY_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_port.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_port.h
-new file mode 100644
-index 0000000000..ad99d8560b
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_port.h
-@@ -0,0 +1,237 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76333 $
-+ * $Date: 2017-03-09 09:33:15 +0800 (¶g¥|, 09 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Port security related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_PORTSECURITY_H_
-+#define _RTL8367C_ASICDRV_PORTSECURITY_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_unknownMulticast.h>
-+#include <rtl8367c_asicdrv_phy.h>
-+
-+/****************************************************************/
-+/* Type Definition                                              */
-+/****************************************************************/
-+
-+#define RTL8367C_MAC7       7
-+#define RTL8367C_EXTNO       3
-+
-+#define RTL8367C_RTCT_PAGE          (11)
-+#define RTL8367C_RTCT_RESULT_A_REG  (27)
-+#define RTL8367C_RTCT_RESULT_B_REG  (28)
-+#define RTL8367C_RTCT_RESULT_C_REG  (29)
-+#define RTL8367C_RTCT_RESULT_D_REG  (30)
-+#define RTL8367C_RTCT_STATUS_REG    (26)
-+
-+enum L2_SECURITY_BEHAVE
-+{
-+    L2_BEHAVE_FLOODING = 0,
-+    L2_BEHAVE_DROP,
-+    L2_BEHAVE_TRAP,
-+    L2_BEHAVE_END
-+};
-+
-+enum L2_UNDA_BEHAVE
-+{
-+    L2_UNDA_BEHAVE_FLOODING_PMASK = 0,
-+    L2_UNDA_BEHAVE_DROP,
-+    L2_UNDA_BEHAVE_TRAP,
-+    L2_UNDA_BEHAVE_FLOODING,
-+    L2_UNDA_BEHAVE_END
-+};
-+
-+enum L2_SECURITY_SA_BEHAVE
-+{
-+    L2_BEHAVE_SA_FLOODING = 0,
-+    L2_BEHAVE_SA_DROP,
-+    L2_BEHAVE_SA_TRAP,
-+    L2_BEHAVE_SA_COPY28051,
-+    L2_BEHAVE_SA_END
-+};
-+
-+/* enum for port current link speed */
-+enum SPEEDMODE
-+{
-+    SPD_10M = 0,
-+    SPD_100M,
-+    SPD_1000M,
-+    SPD_2500M
-+};
-+
-+/* enum for mac link mode */
-+enum LINKMODE
-+{
-+    MAC_NORMAL = 0,
-+    MAC_FORCE,
-+};
-+
-+/* enum for port current link duplex mode */
-+enum DUPLEXMODE
-+{
-+    HALF_DUPLEX = 0,
-+    FULL_DUPLEX
-+};
-+
-+/* enum for port current MST mode */
-+enum MSTMODE
-+{
-+    SLAVE_MODE= 0,
-+    MASTER_MODE
-+};
-+
-+
-+enum EXTMODE
-+{
-+    EXT_DISABLE = 0,
-+    EXT_RGMII,
-+    EXT_MII_MAC,
-+    EXT_MII_PHY,
-+    EXT_TMII_MAC,
-+    EXT_TMII_PHY,
-+    EXT_GMII,
-+    EXT_RMII_MAC,
-+    EXT_RMII_PHY,
-+    EXT_SGMII,
-+    EXT_HSGMII,
-+    EXT_1000X_100FX,
-+    EXT_1000X,
-+    EXT_100FX,
-+    EXT_RGMII_2,
-+    EXT_MII_MAC_2,
-+    EXT_MII_PHY_2,
-+    EXT_TMII_MAC_2,
-+    EXT_TMII_PHY_2,
-+    EXT_RMII_MAC_2,
-+    EXT_RMII_PHY_2,
-+    EXT_END
-+};
-+
-+enum DOSTYPE
-+{
-+    DOS_DAEQSA = 0,
-+    DOS_LANDATTACKS,
-+    DOS_BLATATTACKS,
-+    DOS_SYNFINSCAN,
-+    DOS_XMASCAN,
-+    DOS_NULLSCAN,
-+    DOS_SYN1024,
-+    DOS_TCPSHORTHDR,
-+    DOS_TCPFRAGERROR,
-+    DOS_ICMPFRAGMENT,
-+    DOS_END,
-+
-+};
-+
-+typedef struct  rtl8367c_port_ability_s{
-+    rtk_uint16 forcemode;
-+    rtk_uint16 mstfault;
-+    rtk_uint16 mstmode;
-+    rtk_uint16 nway;
-+    rtk_uint16 txpause;
-+    rtk_uint16 rxpause;
-+    rtk_uint16 link;
-+    rtk_uint16 duplex;
-+    rtk_uint16 speed;
-+}rtl8367c_port_ability_t;
-+
-+typedef struct  rtl8367c_port_status_s{
-+
-+    rtk_uint16 lpi1000;
-+    rtk_uint16 lpi100;
-+    rtk_uint16 mstfault;
-+    rtk_uint16 mstmode;
-+    rtk_uint16 nway;
-+    rtk_uint16 txpause;
-+    rtk_uint16 rxpause;
-+    rtk_uint16 link;
-+    rtk_uint16 duplex;
-+    rtk_uint16 speed;
-+
-+}rtl8367c_port_status_t;
-+
-+typedef struct rtct_result_s
-+{
-+    rtk_uint32      channelAShort;
-+    rtk_uint32      channelBShort;
-+    rtk_uint32      channelCShort;
-+    rtk_uint32      channelDShort;
-+
-+    rtk_uint32      channelAOpen;
-+    rtk_uint32      channelBOpen;
-+    rtk_uint32      channelCOpen;
-+    rtk_uint32      channelDOpen;
-+
-+    rtk_uint32      channelAMismatch;
-+    rtk_uint32      channelBMismatch;
-+    rtk_uint32      channelCMismatch;
-+    rtk_uint32      channelDMismatch;
-+
-+    rtk_uint32      channelALinedriver;
-+    rtk_uint32      channelBLinedriver;
-+    rtk_uint32      channelCLinedriver;
-+    rtk_uint32      channelDLinedriver;
-+
-+    rtk_uint32      channelALen;
-+    rtk_uint32      channelBLen;
-+    rtk_uint32      channelCLen;
-+    rtk_uint32      channelDLen;
-+} rtl8367c_port_rtct_result_t;
-+
-+
-+/****************************************************************/
-+/* Driver Proto Type Definition                                 */
-+/****************************************************************/
-+extern ret_t rtl8367c_setAsicPortUnknownDaBehavior(rtk_uint32 port, rtk_uint32 behavior);
-+extern ret_t rtl8367c_getAsicPortUnknownDaBehavior(rtk_uint32 port, rtk_uint32 *pBehavior);
-+extern ret_t rtl8367c_setAsicPortUnknownSaBehavior(rtk_uint32 behavior);
-+extern ret_t rtl8367c_getAsicPortUnknownSaBehavior(rtk_uint32 *pBehavior);
-+extern ret_t rtl8367c_setAsicPortUnmatchedSaBehavior(rtk_uint32 behavior);
-+extern ret_t rtl8367c_getAsicPortUnmatchedSaBehavior(rtk_uint32 *pBehavior);
-+extern ret_t rtl8367c_setAsicPortUnmatchedSaMoving(rtk_uint32 port, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicPortUnmatchedSaMoving(rtk_uint32 port, rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsicPortUnknownDaFloodingPortmask(rtk_uint32 portmask);
-+extern ret_t rtl8367c_getAsicPortUnknownDaFloodingPortmask(rtk_uint32 *pPortmask);
-+extern ret_t rtl8367c_setAsicPortUnknownMulticastFloodingPortmask(rtk_uint32 portmask);
-+extern ret_t rtl8367c_getAsicPortUnknownMulticastFloodingPortmask(rtk_uint32 *pPortmask);
-+extern ret_t rtl8367c_setAsicPortBcastFloodingPortmask(rtk_uint32 portmask);
-+extern ret_t rtl8367c_getAsicPortBcastFloodingPortmask(rtk_uint32 *pPortmask);
-+extern ret_t rtl8367c_setAsicPortBlockSpa(rtk_uint32 port, rtk_uint32 block);
-+extern ret_t rtl8367c_getAsicPortBlockSpa(rtk_uint32 port, rtk_uint32 *pBlock);
-+extern ret_t rtl8367c_setAsicPortForceLink(rtk_uint32 port, rtl8367c_port_ability_t *pPortAbility);
-+extern ret_t rtl8367c_getAsicPortForceLink(rtk_uint32 port, rtl8367c_port_ability_t *pPortAbility);
-+extern ret_t rtl8367c_getAsicPortStatus(rtk_uint32 port, rtl8367c_port_status_t *pPortStatus);
-+extern ret_t rtl8367c_setAsicPortForceLinkExt(rtk_uint32 id, rtl8367c_port_ability_t *pPortAbility);
-+extern ret_t rtl8367c_getAsicPortForceLinkExt(rtk_uint32 id, rtl8367c_port_ability_t *pPortAbility);
-+extern ret_t rtl8367c_setAsicPortExtMode(rtk_uint32 id, rtk_uint32 mode);
-+extern ret_t rtl8367c_getAsicPortExtMode(rtk_uint32 id, rtk_uint32 *pMode);
-+extern ret_t rtl8367c_setAsicPortDos(rtk_uint32 type, rtk_uint32 drop);
-+extern ret_t rtl8367c_getAsicPortDos(rtk_uint32 type, rtk_uint32* pDrop);
-+extern ret_t rtl8367c_setAsicPortEnableAll(rtk_uint32 enable);
-+extern ret_t rtl8367c_getAsicPortEnableAll(rtk_uint32 *pEnable);
-+extern ret_t rtl8367c_setAsicPortSmallIpg(rtk_uint32 port, rtk_uint32 enable);
-+extern ret_t rtl8367c_getAsicPortSmallIpg(rtk_uint32 port, rtk_uint32* pEnable);
-+extern ret_t rtl8367c_setAsicPortLoopback(rtk_uint32 port, rtk_uint32 enable);
-+extern ret_t rtl8367c_getAsicPortLoopback(rtk_uint32 port, rtk_uint32 *pEnable);
-+extern ret_t rtl8367c_setAsicPortRTCTEnable(rtk_uint32 portmask);
-+extern ret_t rtl8367c_setAsicPortRTCTDisable(rtk_uint32 portmask);
-+extern ret_t rtl8367c_getAsicPortRTCTResult(rtk_uint32 port, rtl8367c_port_rtct_result_t *pResult);
-+extern ret_t rtl8367c_sdsReset(rtk_uint32 id);
-+extern ret_t rtl8367c_getSdsLinkStatus(rtk_uint32 ext_id, rtk_uint32 *pSignalDetect, rtk_uint32 *pSync, rtk_uint32 *pLink);
-+extern ret_t rtl8367c_setSgmiiNway(rtk_uint32 ext_id, rtk_uint32 state);
-+extern ret_t rtl8367c_getSgmiiNway(rtk_uint32 ext_id, rtk_uint32 *pState);
-+
-+#endif /*_RTL8367C_ASICDRV_PORTSECURITY_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_portIsolation.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_portIsolation.h
-new file mode 100644
-index 0000000000..e23d88e81f
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_portIsolation.h
-@@ -0,0 +1,28 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Port isolation related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_PORTISOLATION_H_
-+#define _RTL8367C_ASICDRV_PORTISOLATION_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+extern ret_t rtl8367c_setAsicPortIsolationPermittedPortmask(rtk_uint32 port, rtk_uint32 permitPortmask);
-+extern ret_t rtl8367c_getAsicPortIsolationPermittedPortmask(rtk_uint32 port, rtk_uint32 *pPermitPortmask);
-+extern ret_t rtl8367c_setAsicPortIsolationEfid(rtk_uint32 port, rtk_uint32 efid);
-+extern ret_t rtl8367c_getAsicPortIsolationEfid(rtk_uint32 port, rtk_uint32 *pEfid);
-+
-+#endif /*_RTL8367C_ASICDRV_PORTISOLATION_H_*/
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_qos.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_qos.h
-new file mode 100644
-index 0000000000..26042bfa13
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_qos.h
-@@ -0,0 +1,96 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Qos related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_QOS_H_
-+#define _RTL8367C_ASICDRV_QOS_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+#define RTL8367C_DECISIONPRIMAX    0xFF
-+
-+/* enum Priority Selection Types */
-+enum PRIDECISION
-+{
-+    PRIDEC_PORT = 0,
-+    PRIDEC_ACL,
-+    PRIDEC_DSCP,
-+    PRIDEC_1Q,
-+    PRIDEC_1AD,
-+    PRIDEC_CVLAN,
-+    PRIDEC_DA,
-+    PRIDEC_SA,
-+    PRIDEC_END,
-+};
-+
-+/* enum Priority Selection Index */
-+enum RTL8367C_PRIDEC_TABLE
-+{
-+    PRIDEC_IDX0 = 0,
-+    PRIDEC_IDX1,
-+    PRIDEC_IDX_END,
-+};
-+
-+enum RTL8367C_DOT1P_PRISEL
-+{
-+    DOT1P_PRISEL_USER =  0,
-+    DOT1P_PRISEL_TAG,
-+    DOT1P_PRISEL_END
-+};
-+
-+enum RTL8367C_DSCP_PRISEL
-+{
-+    DSCP_PRISEL_INTERNAL =  0,
-+    DSCP_PRISEL_DSCP,
-+    DSCP_PRISEL_USER ,
-+    DSCP_PRISEL_END
-+};
-+
-+
-+extern ret_t rtl8367c_setAsicRemarkingDot1pAbility(rtk_uint32 port, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicRemarkingDot1pAbility(rtk_uint32 port, rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicRemarkingDot1pParameter(rtk_uint32 priority, rtk_uint32 newPriority );
-+extern ret_t rtl8367c_getAsicRemarkingDot1pParameter(rtk_uint32 priority, rtk_uint32 *pNewPriority );
-+extern  ret_t rtl8367c_setAsicRemarkingDot1pSrc(rtk_uint32 type);
-+extern  ret_t rtl8367c_getAsicRemarkingDot1pSrc(rtk_uint32 *pType);
-+extern ret_t rtl8367c_setAsicRemarkingDscpAbility(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicRemarkingDscpAbility(rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicRemarkingDscpParameter(rtk_uint32 priority, rtk_uint32 newDscp );
-+extern ret_t rtl8367c_getAsicRemarkingDscpParameter(rtk_uint32 priority, rtk_uint32* pNewDscp );
-+
-+extern ret_t rtl8367c_setAsicPriorityDot1qRemapping(rtk_uint32 srcpriority, rtk_uint32 priority );
-+extern ret_t rtl8367c_getAsicPriorityDot1qRemapping(rtk_uint32 srcpriority, rtk_uint32 *pPriority );
-+extern ret_t rtl8367c_setAsicPriorityDscpBased(rtk_uint32 dscp, rtk_uint32 priority );
-+extern ret_t rtl8367c_getAsicPriorityDscpBased(rtk_uint32 dscp, rtk_uint32 *pPriority );
-+extern ret_t rtl8367c_setAsicPriorityPortBased(rtk_uint32 port, rtk_uint32 priority );
-+extern ret_t rtl8367c_getAsicPriorityPortBased(rtk_uint32 port, rtk_uint32 *pPriority );
-+extern ret_t rtl8367c_setAsicPriorityDecision(rtk_uint32 index, rtk_uint32 prisrc, rtk_uint32 decisionPri);
-+extern ret_t rtl8367c_getAsicPriorityDecision(rtk_uint32 index, rtk_uint32 prisrc, rtk_uint32* pDecisionPri);
-+extern ret_t rtl8367c_setAsicPriorityToQIDMappingTable(rtk_uint32 qnum, rtk_uint32 priority, rtk_uint32 qid );
-+extern ret_t rtl8367c_getAsicPriorityToQIDMappingTable(rtk_uint32 qnum, rtk_uint32 priority, rtk_uint32* pQid);
-+extern ret_t rtl8367c_setAsicOutputQueueMappingIndex(rtk_uint32 port, rtk_uint32 qnum );
-+extern ret_t rtl8367c_getAsicOutputQueueMappingIndex(rtk_uint32 port, rtk_uint32 *pQnum );
-+
-+extern ret_t rtl8367c_setAsicRemarkingDscpSrc(rtk_uint32 type);
-+extern ret_t rtl8367c_getAsicRemarkingDscpSrc(rtk_uint32 *pType);
-+extern ret_t rtl8367c_setAsicRemarkingDscp2Dscp(rtk_uint32 dscp, rtk_uint32 rmkDscp);
-+extern ret_t rtl8367c_getAsicRemarkingDscp2Dscp(rtk_uint32 dscp, rtk_uint32 *pRmkDscp);
-+
-+extern ret_t rtl8367c_setAsicPortPriorityDecisionIndex(rtk_uint32 port, rtk_uint32 index );
-+extern ret_t rtl8367c_getAsicPortPriorityDecisionIndex(rtk_uint32 port, rtk_uint32 *pIndex );
-+
-+#endif /*#ifndef _RTL8367C_ASICDRV_QOS_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_rldp.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_rldp.h
-new file mode 100644
-index 0000000000..cde970b638
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_rldp.h
-@@ -0,0 +1,60 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 42321 $
-+ * $Date: 2013-08-26 13:51:29 +0800 (¶g¤@, 26 ¤K¤ë 2013) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : RLDP related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_RLDP_H_
-+#define _RTL8367C_ASICDRV_RLDP_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <string.h>
-+
-+extern ret_t rtl8367c_setAsicRldp(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicRldp(rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsicRldpEnable8051(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicRldpEnable8051(rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsicRldpCompareRandomNumber(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicRldpCompareRandomNumber(rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsicRldpIndicatorSource(rtk_uint32 src);
-+extern ret_t rtl8367c_getAsicRldpIndicatorSource(rtk_uint32 *pSrc);
-+extern ret_t rtl8367c_setAsicRldpCheckingStatePara(rtk_uint32 retryCount, rtk_uint32 retryPeriod);
-+extern ret_t rtl8367c_getAsicRldpCheckingStatePara(rtk_uint32 *pRetryCount, rtk_uint32 *pRetryPeriod);
-+extern ret_t rtl8367c_setAsicRldpLoopStatePara(rtk_uint32 retryCount, rtk_uint32 retryPeriod);
-+extern ret_t rtl8367c_getAsicRldpLoopStatePara(rtk_uint32 *pRetryCount, rtk_uint32 *pRetryPeriod);
-+extern ret_t rtl8367c_setAsicRldpTxPortmask(rtk_uint32 portmask);
-+extern ret_t rtl8367c_getAsicRldpTxPortmask(rtk_uint32 *pPortmask);
-+extern ret_t rtl8367c_setAsicRldpMagicNum(ether_addr_t seed);
-+extern ret_t rtl8367c_getAsicRldpMagicNum(ether_addr_t *pSeed);
-+extern ret_t rtl8367c_getAsicRldpLoopedPortmask(rtk_uint32 *pPortmask);
-+extern ret_t rtl8367c_setAsicRldp8051Portmask(rtk_uint32 portmask);
-+extern ret_t rtl8367c_getAsicRldp8051Portmask(rtk_uint32 *pPortmask);
-+
-+
-+extern ret_t rtl8367c_getAsicRldpRandomNumber(ether_addr_t *pRandNumber);
-+extern ret_t rtl8367c_getAsicRldpLoopedPortPair(rtk_uint32 port, rtk_uint32 *pLoopedPair);
-+extern ret_t rtl8367c_setAsicRlppTrap8051(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicRlppTrap8051(rtk_uint32 *pEnabled);
-+
-+extern ret_t rtl8367c_setAsicRldpLeaveLoopedPortmask(rtk_uint32 portmask);
-+extern ret_t rtl8367c_getAsicRldpLeaveLoopedPortmask(rtk_uint32 *pPortmask);
-+
-+extern ret_t rtl8367c_setAsicRldpEnterLoopedPortmask(rtk_uint32 portmask);
-+extern ret_t rtl8367c_getAsicRldpEnterLoopedPortmask(rtk_uint32 *pPortmask);
-+
-+extern ret_t rtl8367c_setAsicRldpTriggerMode(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicRldpTriggerMode(rtk_uint32 *pEnabled);
-+
-+#endif /*_RTL8367C_ASICDRV_RLDP_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_rma.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_rma.h
-new file mode 100644
-index 0000000000..10c707544f
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_rma.h
-@@ -0,0 +1,57 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 64716 $
-+ * $Date: 2015-12-31 16:31:55 +0800 (¶g¥|, 31 ¤Q¤G¤ë 2015) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : RMA related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_RMA_H_
-+#define _RTL8367C_ASICDRV_RMA_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+#define RTL8367C_RMAMAX                     0x2F
-+
-+enum RTL8367C_RMAOP
-+{
-+    RMAOP_FORWARD = 0,
-+    RMAOP_TRAP_TO_CPU,
-+    RMAOP_DROP,
-+    RMAOP_FORWARD_EXCLUDE_CPU,
-+    RMAOP_END
-+};
-+
-+
-+typedef struct  rtl8367c_rma_s{
-+
-+    rtk_uint16 operation;
-+    rtk_uint16 discard_storm_filter;
-+    rtk_uint16 trap_priority;
-+    rtk_uint16 keep_format;
-+    rtk_uint16 vlan_leaky;
-+    rtk_uint16 portiso_leaky;
-+
-+}rtl8367c_rma_t;
-+
-+
-+extern ret_t rtl8367c_setAsicRma(rtk_uint32 index, rtl8367c_rma_t* pRmacfg);
-+extern ret_t rtl8367c_getAsicRma(rtk_uint32 index, rtl8367c_rma_t* pRmacfg);
-+extern ret_t rtl8367c_setAsicRmaCdp(rtl8367c_rma_t* pRmacfg);
-+extern ret_t rtl8367c_getAsicRmaCdp(rtl8367c_rma_t* pRmacfg);
-+extern ret_t rtl8367c_setAsicRmaCsstp(rtl8367c_rma_t* pRmacfg);
-+extern ret_t rtl8367c_getAsicRmaCsstp(rtl8367c_rma_t* pRmacfg);
-+extern ret_t rtl8367c_setAsicRmaLldp(rtk_uint32 enabled, rtl8367c_rma_t* pRmacfg);
-+extern ret_t rtl8367c_getAsicRmaLldp(rtk_uint32 *pEnabled, rtl8367c_rma_t* pRmacfg);
-+
-+#endif /*#ifndef _RTL8367C_ASICDRV_RMA_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_scheduling.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_scheduling.h
-new file mode 100644
-index 0000000000..919a4ca692
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_scheduling.h
-@@ -0,0 +1,58 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Packet Scheduling related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_SCHEDULING_H_
-+#define _RTL8367C_ASICDRV_SCHEDULING_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+#define RTL8367C_QWEIGHTMAX    0x7F
-+#define RTL8367C_PORT_QUEUE_METER_INDEX_MAX    7
-+
-+/* enum for queue type */
-+enum QUEUETYPE
-+{
-+    QTYPE_STRICT = 0,
-+    QTYPE_WFQ,
-+};
-+extern ret_t rtl8367c_setAsicLeakyBucketParameter(rtk_uint32 tick, rtk_uint32 token);
-+extern ret_t rtl8367c_getAsicLeakyBucketParameter(rtk_uint32 *tick, rtk_uint32 *token);
-+extern ret_t rtl8367c_setAsicAprMeter(rtk_uint32 port, rtk_uint32 qid, rtk_uint32 apridx);
-+extern ret_t rtl8367c_getAsicAprMeter(rtk_uint32 port, rtk_uint32 qid, rtk_uint32 *apridx);
-+extern ret_t rtl8367c_setAsicPprMeter(rtk_uint32 port, rtk_uint32 qid, rtk_uint32 ppridx);
-+extern ret_t rtl8367c_getAsicPprMeter(rtk_uint32 port, rtk_uint32 qid, rtk_uint32 *ppridx);
-+extern ret_t rtl8367c_setAsicAprEnable(rtk_uint32 port, rtk_uint32 aprEnable);
-+extern ret_t rtl8367c_getAsicAprEnable(rtk_uint32 port, rtk_uint32 *aprEnable);
-+extern ret_t rtl8367c_setAsicPprEnable(rtk_uint32 port, rtk_uint32 pprEnable);
-+extern ret_t rtl8367c_getAsicPprEnable(rtk_uint32 port, rtk_uint32 *pprEnable);
-+
-+extern ret_t rtl8367c_setAsicWFQWeight(rtk_uint32, rtk_uint32 queueid, rtk_uint32 weight );
-+extern ret_t rtl8367c_getAsicWFQWeight(rtk_uint32, rtk_uint32 queueid, rtk_uint32 *weight );
-+extern ret_t rtl8367c_setAsicWFQBurstSize(rtk_uint32 burstsize);
-+extern ret_t rtl8367c_getAsicWFQBurstSize(rtk_uint32 *burstsize);
-+
-+extern ret_t rtl8367c_setAsicQueueType(rtk_uint32 port, rtk_uint32 qid, rtk_uint32 queueType);
-+extern ret_t rtl8367c_getAsicQueueType(rtk_uint32 port, rtk_uint32 qid, rtk_uint32 *queueType);
-+extern ret_t rtl8367c_setAsicQueueRate(rtk_uint32 port, rtk_uint32 qid, rtk_uint32 ppridx, rtk_uint32 apridx );
-+extern ret_t rtl8367c_getAsicQueueRate(rtk_uint32 port, rtk_uint32 qid, rtk_uint32* ppridx, rtk_uint32* apridx );
-+extern ret_t rtl8367c_setAsicPortEgressRate(rtk_uint32 port, rtk_uint32 rate);
-+extern ret_t rtl8367c_getAsicPortEgressRate(rtk_uint32 port, rtk_uint32 *rate);
-+extern ret_t rtl8367c_setAsicPortEgressRateIfg(rtk_uint32 ifg);
-+extern ret_t rtl8367c_getAsicPortEgressRateIfg(rtk_uint32 *ifg);
-+
-+#endif /*_RTL8367C_ASICDRV_SCHEDULING_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_storm.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_storm.h
-new file mode 100644
-index 0000000000..3865b5225a
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_storm.h
-@@ -0,0 +1,61 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Storm control filtering related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_STORM_H_
-+#define _RTL8367C_ASICDRV_STORM_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+extern ret_t rtl8367c_setAsicStormFilterBroadcastEnable(rtk_uint32 port, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicStormFilterBroadcastEnable(rtk_uint32 port, rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsicStormFilterBroadcastMeter(rtk_uint32 port, rtk_uint32 meter);
-+extern ret_t rtl8367c_getAsicStormFilterBroadcastMeter(rtk_uint32 port, rtk_uint32 *pMeter);
-+extern ret_t rtl8367c_setAsicStormFilterMulticastEnable(rtk_uint32 port, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicStormFilterMulticastEnable(rtk_uint32 port, rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsicStormFilterMulticastMeter(rtk_uint32 port, rtk_uint32 meter);
-+extern ret_t rtl8367c_getAsicStormFilterMulticastMeter(rtk_uint32 port, rtk_uint32 *pMeter);
-+extern ret_t rtl8367c_setAsicStormFilterUnknownMulticastEnable(rtk_uint32 port, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicStormFilterUnknownMulticastEnable(rtk_uint32 port, rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsicStormFilterUnknownMulticastMeter(rtk_uint32 port, rtk_uint32 meter);
-+extern ret_t rtl8367c_getAsicStormFilterUnknownMulticastMeter(rtk_uint32 port, rtk_uint32 *pMeter);
-+extern ret_t rtl8367c_setAsicStormFilterUnknownUnicastEnable(rtk_uint32 port, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicStormFilterUnknownUnicastEnable(rtk_uint32 port, rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsicStormFilterUnknownUnicastMeter(rtk_uint32 port, rtk_uint32 meter);
-+extern ret_t rtl8367c_getAsicStormFilterUnknownUnicastMeter(rtk_uint32 port, rtk_uint32 *pMeter);
-+extern ret_t rtl8367c_setAsicStormFilterExtBroadcastMeter(rtk_uint32 meter);
-+extern ret_t rtl8367c_getAsicStormFilterExtBroadcastMeter(rtk_uint32 *pMeter);
-+extern ret_t rtl8367c_setAsicStormFilterExtMulticastMeter(rtk_uint32 meter);
-+extern ret_t rtl8367c_getAsicStormFilterExtMulticastMeter(rtk_uint32 *pMeter);
-+extern ret_t rtl8367c_setAsicStormFilterExtUnknownMulticastMeter(rtk_uint32 meter);
-+extern ret_t rtl8367c_getAsicStormFilterExtUnknownMulticastMeter(rtk_uint32 *pMeter);
-+extern ret_t rtl8367c_setAsicStormFilterExtUnknownUnicastMeter(rtk_uint32 meter);
-+extern ret_t rtl8367c_getAsicStormFilterExtUnknownUnicastMeter(rtk_uint32 *pMeter);
-+extern ret_t rtl8367c_setAsicStormFilterExtBroadcastEnable(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicStormFilterExtBroadcastEnable(rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsicStormFilterExtMulticastEnable(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicStormFilterExtMulticastEnable(rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsicStormFilterExtUnknownMulticastEnable(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicStormFilterExtUnknownMulticastEnable(rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsicStormFilterExtUnknownUnicastEnable(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicStormFilterExtUnknownUnicastEnable(rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_setAsicStormFilterExtEnablePortMask(rtk_uint32 portmask);
-+extern ret_t rtl8367c_getAsicStormFilterExtEnablePortMask(rtk_uint32 *pPortmask);
-+
-+
-+#endif /*_RTL8367C_ASICDRV_STORM_H_*/
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_svlan.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_svlan.h
-new file mode 100644
-index 0000000000..5a6a4a8329
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_svlan.h
-@@ -0,0 +1,132 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : SVLAN related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_SVLAN_H_
-+#define _RTL8367C_ASICDRV_SVLAN_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+#define RTL8367C_C2SIDXNO               128
-+#define RTL8367C_C2SIDXMAX              (RTL8367C_C2SIDXNO-1)
-+#define RTL8367C_MC2SIDXNO              32
-+#define RTL8367C_MC2SIDXMAX             (RTL8367C_MC2SIDXNO-1)
-+#define RTL8367C_SP2CIDXNO              128
-+#define RTL8367C_SP2CMAX                (RTL8367C_SP2CIDXNO-1)
-+
-+#define RTL8367C_SVLAN_MEMCONF_LEN      4
-+#define RTL8367C_SVLAN_MC2S_LEN         5
-+#define RTL8367C_SVLAN_SP2C_LEN         2
-+
-+enum RTL8367C_SPRISEL
-+{
-+    SPRISEL_INTERNALPRI =  0,
-+    SPRISEL_CTAGPRI,
-+    SPRISEL_VSPRI,
-+    SPRISEL_PBPRI,
-+    SPRISEL_END
-+};
-+
-+enum RTL8367C_SUNACCEPT
-+{
-+    SUNACCEPT_DROP =  0,
-+    SUNACCEPT_TRAP,
-+    SUNACCEPT_SVLAN,
-+    SUNACCEPT_END
-+};
-+
-+enum RTL8367C_SVLAN_MC2S_MODE
-+{
-+    SVLAN_MC2S_MODE_MAC =  0,
-+    SVLAN_MC2S_MODE_IP,
-+    SVLAN_MC2S_MODE_END
-+};
-+
-+
-+typedef struct  rtl8367c_svlan_memconf_s{
-+
-+    rtk_uint16 vs_member:11;
-+    rtk_uint16 vs_untag:11;
-+
-+    rtk_uint16 vs_fid_msti:4;
-+    rtk_uint16 vs_priority:3;
-+    rtk_uint16 vs_force_fid:1;
-+    rtk_uint16 reserved:8;
-+
-+    rtk_uint16 vs_svid:12;
-+    rtk_uint16 vs_efiden:1;
-+    rtk_uint16 vs_efid:3;
-+
-+
-+}rtl8367c_svlan_memconf_t;
-+
-+
-+typedef struct  rtl8367c_svlan_mc2s_s{
-+
-+    rtk_uint16 valid:1;
-+    rtk_uint16 format:1;
-+    rtk_uint16 svidx:6;
-+    rtk_uint32 sdata;
-+    rtk_uint32 smask;
-+}rtl8367c_svlan_mc2s_t;
-+
-+
-+typedef struct  rtl8367c_svlan_s2c_s{
-+
-+    rtk_uint16 valid:1;
-+    rtk_uint16 svidx:6;
-+    rtk_uint16 dstport:4;
-+    rtk_uint32 vid:12;
-+}rtl8367c_svlan_s2c_t;
-+
-+extern ret_t rtl8367c_setAsicSvlanIngressUntag(rtk_uint32 mode);
-+extern ret_t rtl8367c_getAsicSvlanIngressUntag(rtk_uint32* pMode);
-+extern ret_t rtl8367c_setAsicSvlanIngressUnmatch(rtk_uint32 mode);
-+extern ret_t rtl8367c_getAsicSvlanIngressUnmatch(rtk_uint32* pMode);
-+extern ret_t rtl8367c_setAsicSvlanTrapPriority(rtk_uint32 priority);
-+extern ret_t rtl8367c_getAsicSvlanTrapPriority(rtk_uint32* pPriority);
-+extern ret_t rtl8367c_setAsicSvlanDefaultVlan(rtk_uint32 port, rtk_uint32 index);
-+extern ret_t rtl8367c_getAsicSvlanDefaultVlan(rtk_uint32 port, rtk_uint32* pIndex);
-+
-+extern ret_t rtl8367c_setAsicSvlanMemberConfiguration(rtk_uint32 index,rtl8367c_svlan_memconf_t* pSvlanMemCfg);
-+extern ret_t rtl8367c_getAsicSvlanMemberConfiguration(rtk_uint32 index,rtl8367c_svlan_memconf_t* pSvlanMemCfg);
-+
-+extern ret_t rtl8367c_setAsicSvlanPrioritySel(rtk_uint32 priSel);
-+extern ret_t rtl8367c_getAsicSvlanPrioritySel(rtk_uint32* pPriSel);
-+extern ret_t rtl8367c_setAsicSvlanTpid(rtk_uint32 protocolType);
-+extern ret_t rtl8367c_getAsicSvlanTpid(rtk_uint32* pProtocolType);
-+extern ret_t rtl8367c_setAsicSvlanUplinkPortMask(rtk_uint32 portMask);
-+extern ret_t rtl8367c_getAsicSvlanUplinkPortMask(rtk_uint32* pPortmask);
-+extern ret_t rtl8367c_setAsicSvlanEgressUnassign(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicSvlanEgressUnassign(rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicSvlanC2SConf(rtk_uint32 index, rtk_uint32 evid, rtk_uint32 portmask, rtk_uint32 svidx);
-+extern ret_t rtl8367c_getAsicSvlanC2SConf(rtk_uint32 index, rtk_uint32* pEvid, rtk_uint32* pPortmask, rtk_uint32* pSvidx);
-+extern ret_t rtl8367c_setAsicSvlanMC2SConf(rtk_uint32 index,rtl8367c_svlan_mc2s_t* pSvlanMc2sCfg);
-+extern ret_t rtl8367c_getAsicSvlanMC2SConf(rtk_uint32 index,rtl8367c_svlan_mc2s_t* pSvlanMc2sCfg);
-+extern ret_t rtl8367c_setAsicSvlanSP2CConf(rtk_uint32 index,rtl8367c_svlan_s2c_t* pSvlanSp2cCfg);
-+extern ret_t rtl8367c_getAsicSvlanSP2CConf(rtk_uint32 index,rtl8367c_svlan_s2c_t* pSvlanSp2cCfg);
-+extern ret_t rtl8367c_setAsicSvlanDmacCvidSel(rtk_uint32 port, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicSvlanDmacCvidSel(rtk_uint32 port, rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicSvlanUntagVlan(rtk_uint32 index);
-+extern ret_t rtl8367c_getAsicSvlanUntagVlan(rtk_uint32* pIndex);
-+extern ret_t rtl8367c_setAsicSvlanUnmatchVlan(rtk_uint32 index);
-+extern ret_t rtl8367c_getAsicSvlanUnmatchVlan(rtk_uint32* pIndex);
-+extern ret_t rtl8367c_setAsicSvlanLookupType(rtk_uint32 type);
-+extern ret_t rtl8367c_getAsicSvlanLookupType(rtk_uint32* pType);
-+
-+
-+#endif /*#ifndef _RTL8367C_ASICDRV_SVLAN_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_trunking.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_trunking.h
-new file mode 100644
-index 0000000000..2e3a682819
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_trunking.h
-@@ -0,0 +1,48 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Port trunking related functions
-+ *
-+ */
-+
-+
-+#ifndef _RTL8367C_ASICDRV_TRUNKING_H_
-+#define _RTL8367C_ASICDRV_TRUNKING_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+#define RTL8367C_MAX_TRUNK_GID              (2)
-+#define RTL8367C_TRUNKING_PORTNO            (4)
-+#define RTL8367C_TRUNKING1_PORTN0           (2)
-+#define RTL8367C_TRUNKING_HASHVALUE_MAX     (15)
-+
-+extern ret_t rtl8367c_setAsicTrunkingGroup(rtk_uint32 group, rtk_uint32 portmask);
-+extern ret_t rtl8367c_getAsicTrunkingGroup(rtk_uint32 group, rtk_uint32* pPortmask);
-+extern ret_t rtl8367c_setAsicTrunkingFlood(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicTrunkingFlood(rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicTrunkingHashSelect(rtk_uint32 hashsel);
-+extern ret_t rtl8367c_getAsicTrunkingHashSelect(rtk_uint32* pHashsel);
-+
-+extern ret_t rtl8367c_getAsicQeueuEmptyStatus(rtk_uint32* pPortmask);
-+
-+extern ret_t rtl8367c_setAsicTrunkingMode(rtk_uint32 mode);
-+extern ret_t rtl8367c_getAsicTrunkingMode(rtk_uint32* pMode);
-+extern ret_t rtl8367c_setAsicTrunkingFc(rtk_uint32 group, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicTrunkingFc(rtk_uint32 group, rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicTrunkingHashTable(rtk_uint32 hashval, rtk_uint32 portId);
-+extern ret_t rtl8367c_getAsicTrunkingHashTable(rtk_uint32 hashval, rtk_uint32* pPortId);
-+extern ret_t rtl8367c_setAsicTrunkingHashTable1(rtk_uint32 hashval, rtk_uint32 portId);
-+extern ret_t rtl8367c_getAsicTrunkingHashTable1(rtk_uint32 hashval, rtk_uint32* pPortId);
-+
-+#endif /*_RTL8367C_ASICDRV_TRUNKING_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_unknownMulticast.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_unknownMulticast.h
-new file mode 100644
-index 0000000000..d142d25cff
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_unknownMulticast.h
-@@ -0,0 +1,59 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Unkown multicast related functions
-+ *
-+ */
-+
-+#ifndef _RTL8367C_ASICDRV_UNKNOWNMULTICAST_H_
-+#define _RTL8367C_ASICDRV_UNKNOWNMULTICAST_H_
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+enum L2_UNKOWN_MULTICAST_BEHAVE
-+{
-+    L2_UNKOWN_MULTICAST_FLOODING = 0,
-+    L2_UNKOWN_MULTICAST_DROP,
-+    L2_UNKOWN_MULTICAST_TRAP,
-+    L2_UNKOWN_MULTICAST_DROP_EXCLUDE_RMA,
-+    L2_UNKOWN_MULTICAST_END
-+};
-+
-+enum L3_UNKOWN_MULTICAST_BEHAVE
-+{
-+    L3_UNKOWN_MULTICAST_FLOODING = 0,
-+    L3_UNKOWN_MULTICAST_DROP,
-+    L3_UNKOWN_MULTICAST_TRAP,
-+    L3_UNKOWN_MULTICAST_ROUTER,
-+    L3_UNKOWN_MULTICAST_END
-+};
-+
-+enum MULTICASTTYPE{
-+    MULTICAST_TYPE_IPV4 = 0,
-+    MULTICAST_TYPE_IPV6,
-+    MULTICAST_TYPE_L2,
-+    MULTICAST_TYPE_END
-+};
-+
-+extern ret_t rtl8367c_setAsicUnknownL2MulticastBehavior(rtk_uint32 port, rtk_uint32 behave);
-+extern ret_t rtl8367c_getAsicUnknownL2MulticastBehavior(rtk_uint32 port, rtk_uint32 *pBehave);
-+extern ret_t rtl8367c_setAsicUnknownIPv4MulticastBehavior(rtk_uint32 port, rtk_uint32 behave);
-+extern ret_t rtl8367c_getAsicUnknownIPv4MulticastBehavior(rtk_uint32 port, rtk_uint32 *pBehave);
-+extern ret_t rtl8367c_setAsicUnknownIPv6MulticastBehavior(rtk_uint32 port, rtk_uint32 behave);
-+extern ret_t rtl8367c_getAsicUnknownIPv6MulticastBehavior(rtk_uint32 port, rtk_uint32 *pBehave);
-+extern ret_t rtl8367c_setAsicUnknownMulticastTrapPriority(rtk_uint32 priority);
-+extern ret_t rtl8367c_getAsicUnknownMulticastTrapPriority(rtk_uint32 *pPriority);
-+
-+#endif /*_RTL8367C_ASICDRV_UNKNOWNMULTICAST_H_*/
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_vlan.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_vlan.h
-new file mode 100644
-index 0000000000..61848650b5
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_vlan.h
-@@ -0,0 +1,157 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : VLAN related functions
-+ *
-+ */
-+
-+
-+#ifndef _RTL8367C_ASICDRV_VLAN_H_
-+#define _RTL8367C_ASICDRV_VLAN_H_
-+
-+/****************************************************************/
-+/* Header File inclusion                                        */
-+/****************************************************************/
-+#include <rtl8367c_asicdrv.h>
-+
-+/****************************************************************/
-+/* Constant Definition                                          */
-+/****************************************************************/
-+#define RTL8367C_PROTOVLAN_GIDX_MAX 3
-+#define RTL8367C_PROTOVLAN_GROUPNO  4
-+
-+#define RTL8367C_VLAN_BUSY_CHECK_NO     (10)
-+
-+#define RTL8367C_VLAN_MBRCFG_LEN    (4)
-+#define RTL8367C_VLAN_4KTABLE_LEN   (3)
-+
-+/****************************************************************/
-+/* Type Definition                                              */
-+/****************************************************************/
-+typedef struct  VLANCONFIGUSER
-+{
-+    rtk_uint16  evid;
-+    rtk_uint16  mbr;
-+    rtk_uint16  fid_msti;
-+    rtk_uint16  envlanpol;
-+    rtk_uint16  meteridx;
-+    rtk_uint16  vbpen;
-+    rtk_uint16  vbpri;
-+}rtl8367c_vlanconfiguser;
-+
-+typedef struct  USER_VLANTABLE{
-+
-+    rtk_uint16  vid;
-+    rtk_uint16  mbr;
-+    rtk_uint16  untag;
-+    rtk_uint16  fid_msti;
-+    rtk_uint16  envlanpol;
-+    rtk_uint16  meteridx;
-+    rtk_uint16  vbpen;
-+    rtk_uint16  vbpri;
-+    rtk_uint16  ivl_svl;
-+
-+}rtl8367c_user_vlan4kentry;
-+
-+typedef enum
-+{
-+    FRAME_TYPE_BOTH = 0,
-+    FRAME_TYPE_TAGGED_ONLY,
-+    FRAME_TYPE_UNTAGGED_ONLY,
-+    FRAME_TYPE_MAX_BOUND
-+} rtl8367c_accframetype;
-+
-+typedef enum
-+{
-+    EG_TAG_MODE_ORI = 0,
-+    EG_TAG_MODE_KEEP,
-+    EG_TAG_MODE_PRI_TAG,
-+    EG_TAG_MODE_REAL_KEEP,
-+    EG_TAG_MODE_END
-+} rtl8367c_egtagmode;
-+
-+typedef enum
-+{
-+    PPVLAN_FRAME_TYPE_ETHERNET = 0,
-+    PPVLAN_FRAME_TYPE_LLC,
-+    PPVLAN_FRAME_TYPE_RFC1042,
-+    PPVLAN_FRAME_TYPE_END
-+} rtl8367c_provlan_frametype;
-+
-+enum RTL8367C_STPST
-+{
-+    STPST_DISABLED = 0,
-+    STPST_BLOCKING,
-+    STPST_LEARNING,
-+    STPST_FORWARDING
-+};
-+
-+enum RTL8367C_RESVIDACT
-+{
-+    RES_VID_ACT_UNTAG = 0,
-+    RES_VID_ACT_TAG,
-+    RES_VID_ACT_END
-+};
-+
-+typedef struct
-+{
-+    rtl8367c_provlan_frametype  frameType;
-+    rtk_uint32                      etherType;
-+} rtl8367c_protocolgdatacfg;
-+
-+typedef struct
-+{
-+    rtk_uint32 valid;
-+    rtk_uint32 vlan_idx;
-+    rtk_uint32 priority;
-+} rtl8367c_protocolvlancfg;
-+
-+extern ret_t rtl8367c_setAsicVlanMemberConfig(rtk_uint32 index, rtl8367c_vlanconfiguser *pVlanCg);
-+extern ret_t rtl8367c_getAsicVlanMemberConfig(rtk_uint32 index, rtl8367c_vlanconfiguser *pVlanCg);
-+extern ret_t rtl8367c_setAsicVlan4kEntry(rtl8367c_user_vlan4kentry *pVlan4kEntry );
-+extern ret_t rtl8367c_getAsicVlan4kEntry(rtl8367c_user_vlan4kentry *pVlan4kEntry );
-+extern ret_t rtl8367c_setAsicVlanAccpetFrameType(rtk_uint32 port, rtl8367c_accframetype frameType);
-+extern ret_t rtl8367c_getAsicVlanAccpetFrameType(rtk_uint32 port, rtl8367c_accframetype *pFrameType);
-+extern ret_t rtl8367c_setAsicVlanIngressFilter(rtk_uint32 port, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicVlanIngressFilter(rtk_uint32 port, rtk_uint32 *pEnable);
-+extern ret_t rtl8367c_setAsicVlanEgressTagMode(rtk_uint32 port, rtl8367c_egtagmode tagMode);
-+extern ret_t rtl8367c_getAsicVlanEgressTagMode(rtk_uint32 port, rtl8367c_egtagmode *pTagMode);
-+extern ret_t rtl8367c_setAsicVlanPortBasedVID(rtk_uint32 port, rtk_uint32 index, rtk_uint32 pri);
-+extern ret_t rtl8367c_getAsicVlanPortBasedVID(rtk_uint32 port, rtk_uint32 *pIndex, rtk_uint32 *pPri);
-+extern ret_t rtl8367c_setAsicVlanProtocolBasedGroupData(rtk_uint32 index, rtl8367c_protocolgdatacfg *pPbCfg);
-+extern ret_t rtl8367c_getAsicVlanProtocolBasedGroupData(rtk_uint32 index, rtl8367c_protocolgdatacfg *pPbCfg);
-+extern ret_t rtl8367c_setAsicVlanPortAndProtocolBased(rtk_uint32 port, rtk_uint32 index, rtl8367c_protocolvlancfg *pPpbCfg);
-+extern ret_t rtl8367c_getAsicVlanPortAndProtocolBased(rtk_uint32 port, rtk_uint32 index, rtl8367c_protocolvlancfg *pPpbCfg);
-+extern ret_t rtl8367c_setAsicVlanFilter(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicVlanFilter(rtk_uint32* pEnabled);
-+
-+extern ret_t rtl8367c_setAsicPortBasedFid(rtk_uint32 port, rtk_uint32 fid);
-+extern ret_t rtl8367c_getAsicPortBasedFid(rtk_uint32 port, rtk_uint32* pFid);
-+extern ret_t rtl8367c_setAsicPortBasedFidEn(rtk_uint32 port, rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicPortBasedFidEn(rtk_uint32 port, rtk_uint32* pEnabled);
-+extern ret_t rtl8367c_setAsicSpanningTreeStatus(rtk_uint32 port, rtk_uint32 msti, rtk_uint32 state);
-+extern ret_t rtl8367c_getAsicSpanningTreeStatus(rtk_uint32 port, rtk_uint32 msti, rtk_uint32* pState);
-+extern ret_t rtl8367c_setAsicVlanUntagDscpPriorityEn(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getAsicVlanUntagDscpPriorityEn(rtk_uint32* enabled);
-+extern ret_t rtl8367c_setAsicVlanTransparent(rtk_uint32 port, rtk_uint32 portmask);
-+extern ret_t rtl8367c_getAsicVlanTransparent(rtk_uint32 port, rtk_uint32 *pPortmask);
-+extern ret_t rtl8367c_setAsicVlanEgressKeep(rtk_uint32 port, rtk_uint32 portmask);
-+extern ret_t rtl8367c_getAsicVlanEgressKeep(rtk_uint32 port, rtk_uint32* pPortmask);
-+extern ret_t rtl8367c_setReservedVidAction(rtk_uint32 vid0Action, rtk_uint32 vid4095Action);
-+extern ret_t rtl8367c_getReservedVidAction(rtk_uint32 *pVid0Action, rtk_uint32 *pVid4095Action);
-+extern ret_t rtl8367c_setRealKeepRemarkEn(rtk_uint32 enabled);
-+extern ret_t rtl8367c_getRealKeepRemarkEn(rtk_uint32 *pEnabled);
-+extern ret_t rtl8367c_resetVlan(void);
-+
-+#endif /*#ifndef _RTL8367C_ASICDRV_VLAN_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_base.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_base.h
-new file mode 100644
-index 0000000000..676ca8ed74
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_base.h
-@@ -0,0 +1,596 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Regsiter MACRO related definition
-+ *
-+ */
-+
-+#ifndef _RTL8367C_BASE_H_
-+#define _RTL8367C_BASE_H_
-+
-+#include <rtl8367c_reg.h>
-+
-+/* (16'h0000) port_reg */
-+
-+#define    RTL8367C_PORT_SPECIAL_CONGEST_MODE_TIMER_BASE        RTL8367C_REG_PKTGEN_PORT0_TIMER
-+#define    RTL8367C_PORT_SPECIAL_CONGEST_MODE_TIMER_REG(port)    (RTL8367C_PORT_SPECIAL_CONGEST_MODE_TIMER_BASE + (port << 5))
-+
-+#define    RTL8367C_PORT_MISC_CFG_BASE                            RTL8367C_REG_PORT0_MISC_CFG
-+#define    RTL8367C_PORT_MISC_CFG_REG(port)                        (RTL8367C_PORT_MISC_CFG_BASE + (port << 5))
-+#define    RTL8367C_1QREMARK_ENABLE_OFFSET                         RTL8367C_PORT0_MISC_CFG_DOT1Q_REMARK_ENABLE_OFFSET
-+#define    RTL8367C_1QREMARK_ENABLE_MASK                        RTL8367C_PORT0_MISC_CFG_DOT1Q_REMARK_ENABLE_MASK
-+
-+#define    RTL8367C_INGRESSBW_PORT_IFG_MASK                        RTL8367C_PORT0_MISC_CFG_INGRESSBW_IFG_MASK
-+#define    RTL8367C_VLAN_EGRESS_MDOE_MASK                        RTL8367C_PORT0_MISC_CFG_VLAN_EGRESS_MODE_MASK
-+#define    RTL8367C_SPECIALCONGEST_SUSTAIN_TIMER_MASK            RTL8367C_PORT0_MISC_CFG_CONGESTION_SUSTAIN_TIME_MASK
-+
-+#define    RTL8367C_INGRESSBW_PORT_RATE_LSB_BASE                RTL8367C_REG_INGRESSBW_PORT0_RATE_CTRL0
-+#define    RTL8367C_INGRESSBW_PORT_RATE_LSB_REG(port)            (RTL8367C_INGRESSBW_PORT_RATE_LSB_BASE + (port << 5))
-+
-+#define    RTL8367C_PORT_SMALL_IPG_REG(port)                    (RTL8367C_REG_PORT0_MISC_CFG + (port*0x20))
-+
-+#define    RTL8367C_PORT_EEE_CFG_BASE                           RTL8367C_REG_PORT0_EEECFG
-+#define    RTL8367C_PORT_EEE_CFG_REG(port)                      (RTL8367C_REG_PORT0_EEECFG + (port << 5))
-+#define    RTL8367C_PORT_EEE_100M_OFFSET                        RTL8367C_PORT0_EEECFG_EEE_100M_OFFSET
-+#define    RTL8367C_PORT_EEE_100M_MASK                          RTL8367C_PORT0_EEECFG_EEE_100M_MASK
-+#define    RTL8367C_PORT_EEE_GIGA_OFFSET                        RTL8367C_PORT0_EEECFG_EEE_GIGA_500M_OFFSET
-+#define    RTL8367C_PORT_EEE_GIGA_MASK                          RTL8367C_PORT0_EEECFG_EEE_GIGA_500M_MASK
-+
-+
-+/* (16'h0200) outq_reg */
-+
-+#define    RTL8367C_FLOWCTRL_QUEUE_DROP_ON_BASE                    RTL8367C_REG_FLOWCTRL_QUEUE0_DROP_ON
-+#define    RTL8367C_FLOWCTRL_QUEUE_DROP_ON_REG(queue)            (RTL8367C_FLOWCTRL_QUEUE_DROP_ON_BASE + queue)
-+#define    RTL8367C_FLOWCTRL_QUEUE_DROP_ON_MASK                    RTL8367C_FLOWCTRL_QUEUE0_DROP_ON_MASK
-+
-+#define    RTL8367C_FLOWCTRL_PORT_DROP_ON_BASE                    RTL8367C_REG_FLOWCTRL_PORT0_DROP_ON
-+#define    RTL8367C_FLOWCTRL_PORT_DROP_ON_REG(PORT)                (RTL8367C_FLOWCTRL_PORT_DROP_ON_BASE + PORT)
-+#define    RTL8367C_FLOWCTRL_PORT_DROP_ON_MASK                    RTL8367C_FLOWCTRL_PORT0_DROP_ON_MASK
-+
-+#define    RTL8367C_FLOWCTRL_PORT_GAP_REG                        RTL8367C_REG_FLOWCTRL_PORT_GAP
-+#define    RTL8367C_FLOWCTRL_QUEUE_GAP_REG                        RTL8367C_REG_FLOWCTRL_QUEUE_GAP
-+#define    RTL8367C_FLOWCTRL_PORT_QEMPTY_REG                    RTL8367C_REG_PORT_QEMPTY
-+
-+/* (16'h0300) sch_reg */
-+
-+#define    RTL8367C_SCHEDULE_WFQ_BURST_SIZE_REG                    RTL8367C_REG_SCHEDULE_WFQ_BURST_SIZE
-+
-+#define    RTL8367C_SCHEDULE_QUEUE_TYPE_BASE                    RTL8367C_REG_SCHEDULE_QUEUE_TYPE_CTRL0
-+#define    RTL8367C_SCHEDULE_QUEUE_TYPE_REG(port)                (RTL8367C_SCHEDULE_QUEUE_TYPE_BASE + (port >> 1))
-+#define    RTL8367C_SCHEDULE_QUEUE_TYPE_OFFSET(port, queue)        (((port & 0x1) << 3) + queue)
-+#define    RTL8367C_SCHEDULE_QUEUE_TYPE_MASK(port, queue)         RTL8367C_SCHEDULE_QUEUE_TYPE_OFFSET(port, queue)
-+
-+#define    RTL8367C_SCHEDULE_PORT_QUEUE_WFQ_WEIGHT_BASE            RTL8367C_REG_SCHEDULE_PORT0_QUEUE0_WFQ_WEIGHT
-+#define    RTL8367C_SCHEDULE_PORT_QUEUE_WFQ_WEIGHT_REG(port, queue)    (RTL8367C_SCHEDULE_PORT_QUEUE_WFQ_WEIGHT_BASE + (port << 3) + queue)
-+
-+#define    RTL8367C_SCHEDULE_APR_CTRL_REG                       RTL8367C_REG_SCHEDULE_APR_CTRL0
-+#define    RTL8367C_SCHEDULE_APR_CTRL_OFFSET(port)                (port)
-+#define    RTL8367C_SCHEDULE_APR_CTRL_MASK(port)                (1 << RTL8367C_SCHEDULE_APR_CTRL_OFFSET(port))
-+
-+#define    RTL8367C_SCHEDULE_PORT_APR_METER_BASE                RTL8367C_REG_SCHEDULE_PORT0_APR_METER_CTRL0
-+#define    RTL8367C_SCHEDULE_PORT_APR_METER_REG(port, queue)    (RTL8367C_SCHEDULE_PORT_APR_METER_BASE + (port << 2) + (queue / 5))
-+#define    RTL8367C_SCHEDULE_PORT_APR_METER_OFFSET(queue)        (3 * (queue % 5))
-+#define    RTL8367C_SCHEDULE_PORT_APR_METER_MASK(queue)            (RTL8367C_SCHEDULE_PORT0_APR_METER_CTRL0_QUEUE0_APR_METER_MASK << RTL8367C_SCHEDULE_PORT_APR_METER_OFFSET(queue))
-+
-+#define    RTL8367C_PORT_EGRESSBW_LSB_BASE                        RTL8367C_REG_PORT0_EGRESSBW_CTRL0
-+#define    RTL8367C_PORT_EGRESSBW_LSB_REG(port)                    (RTL8367C_PORT_EGRESSBW_LSB_BASE + (port << 1))
-+
-+#define    RTL8367C_PORT_EGRESSBW_MSB_BASE                        RTL8367C_REG_PORT0_EGRESSBW_CTRL1
-+#define    RTL8367C_PORT_EGRESSBW_MSB_REG(port)                    (RTL8367C_PORT_EGRESSBW_MSB_BASE + (port << 1))
-+
-+/* (16'h0500) table_reg */
-+
-+#define    RTL8367C_TABLE_ACCESS_CTRL_REG                        RTL8367C_REG_TABLE_ACCESS_CTRL
-+
-+#define    RTL8367C_TABLE_ACCESS_ADDR_REG                        RTL8367C_REG_TABLE_ACCESS_ADDR
-+
-+#define    RTL8367C_TABLE_ACCESS_STATUS_REG                        RTL8367C_REG_TABLE_LUT_ADDR
-+
-+#define    RTL8367C_TABLE_ACCESS_WRDATA_BASE                    RTL8367C_REG_TABLE_WRITE_DATA0
-+#define    RTL8367C_TABLE_ACCESS_WRDATA_REG(index)                (RTL8367C_TABLE_ACCESS_WRDATA_BASE + index)
-+
-+#define    RTL8367C_TABLE_ACCESS_RDDATA_BASE                    RTL8367C_REG_TABLE_READ_DATA0
-+#define    RTL8367C_TABLE_ACCESS_RDDATA_REG(index)                (RTL8367C_TABLE_ACCESS_RDDATA_BASE + index)
-+
-+
-+
-+/* (16'h0600) acl_reg */
-+
-+#define    RTL8367C_ACL_RULE_TEMPLATE_CTRL_BASE                    RTL8367C_REG_ACL_RULE_TEMPLATE0_CTRL0
-+#define    RTL8367C_ACL_RULE_TEMPLATE_CTRL_REG(template)        (RTL8367C_ACL_RULE_TEMPLATE_CTRL_BASE + template * 0x4)
-+#define    RTL8367C_ACL_TEMPLATE_FIELD_OFFSET(field)            ((field & 0x01) <<3)
-+#define    RTL8367C_ACL_TEMPLATE_FIELD_MASK(field)                (0x3F << RTL8367C_ACL_TEMPLATE_FIELD_OFFSET(field))
-+
-+#define    RTL8367C_ACL_ACTION_CTRL_BASE                        RTL8367C_REG_ACL_ACTION_CTRL0
-+#define    RTL8367C_ACL_ACTION_CTRL_REG(rule)                   (RTL8367C_ACL_ACTION_CTRL_BASE + (rule >> 1))
-+#define    RTL8367C_ACL_ACTION_CTRL2_BASE                        RTL8367C_REG_ACL_ACTION_CTRL32
-+#define    RTL8367C_ACL_ACTION_CTRL2_REG(rule)                  (RTL8367C_ACL_ACTION_CTRL2_BASE + ((rule-64) >> 1))
-+
-+#define    RTL8367C_ACL_OP_NOT_OFFSET(rule)                        (6 + ((rule & 0x1) << 3))
-+#define    RTL8367C_ACL_OP_NOT_MASK(rule)                        (1 << RTL8367C_ACL_OP_NOT_OFFSET(rule))
-+#define    RTL8367C_ACL_OP_ACTION_OFFSET(rule)                    ((rule & 0x1) << 3)
-+#define    RTL8367C_ACL_OP_ACTION_MASK(rule)                    (0x3F << RTL8367C_ACL_OP_ACTION_OFFSET(rule))
-+
-+#define    RTL8367C_ACL_ENABLE_REG                                RTL8367C_REG_ACL_ENABLE
-+#define    RTL8367C_ACL_UNMATCH_PERMIT_REG                        RTL8367C_REG_ACL_UNMATCH_PERMIT
-+
-+/* (16'h0700) cvlan_reg */
-+
-+#define    RTL8367C_VLAN_PVID_CTRL_BASE                            RTL8367C_REG_VLAN_PVID_CTRL0
-+#define    RTL8367C_VLAN_PVID_CTRL_REG(port)                    (RTL8367C_VLAN_PVID_CTRL_BASE + (port >> 1))
-+#define    RTL8367C_PORT_VIDX_OFFSET(port)                        ((port &1)<<3)
-+#define    RTL8367C_PORT_VIDX_MASK(port)                        (RTL8367C_PORT0_VIDX_MASK << RTL8367C_PORT_VIDX_OFFSET(port))
-+
-+#define    RTL8367C_VLAN_PPB_VALID_BASE                            RTL8367C_REG_VLAN_PPB0_VALID
-+#define    RTL8367C_VLAN_PPB_VALID_REG(item)                    (RTL8367C_VLAN_PPB_VALID_BASE + (item << 3))
-+
-+#define    RTL8367C_VLAN_PPB_CTRL_BASE                            RTL8367C_REG_VLAN_PPB0_CTRL0
-+#define    RTL8367C_VLAN_PPB_CTRL_REG(item, port)               (RTL8367C_VLAN_PPB_CTRL_BASE + (item << 3) + (port / 3) )
-+#define    RTL8367C_VLAN_PPB_CTRL_OFFSET(port)                    ((port % 3) * 5)
-+#define    RTL8367C_VLAN_PPB_CTRL_MASK(port)                    (RTL8367C_VLAN_PPB0_CTRL0_PORT0_INDEX_MASK << RTL8367C_VLAN_PPB_CTRL_OFFSET(port))
-+
-+#define    RTL8367C_VLAN_PPB_FRAMETYPE_BASE                    RTL8367C_REG_VLAN_PPB0_CTRL2
-+#define    RTL8367C_VLAN_PPB_FRAMETYPE_REG(item)               (RTL8367C_VLAN_PPB_FRAMETYPE_BASE + (item << 3))
-+#define    RTL8367C_VLAN_PPB_FRAMETYPE_MASK                    RTL8367C_VLAN_PPB0_CTRL2_FRAME_TYPE_MASK
-+
-+#define    RTL8367C_VLAN_PPB_ETHERTYPR_BASE                        RTL8367C_REG_VLAN_PPB0_CTRL3
-+#define    RTL8367C_VLAN_PPB_ETHERTYPR_REG(item)                (RTL8367C_VLAN_PPB_ETHERTYPR_BASE + (item << 3))
-+
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION_BASE                RTL8367C_REG_VLAN_MEMBER_CONFIGURATION0_CTRL0
-+
-+
-+#define    RTL8367C_VLAN_CTRL_REG                                RTL8367C_REG_VLAN_CTRL
-+
-+#define    RTL8367C_VLAN_INGRESS_REG                            RTL8367C_REG_VLAN_INGRESS
-+
-+#define    RTL8367C_VLAN_ACCEPT_FRAME_TYPE_BASE                    RTL8367C_REG_VLAN_ACCEPT_FRAME_TYPE_CTRL0
-+#define    RTL8367C_VLAN_ACCEPT_FRAME_TYPE_REG(port)            (RTL8367C_VLAN_ACCEPT_FRAME_TYPE_BASE + (port >> 3))
-+#define    RTL8367C_VLAN_ACCEPT_FRAME_TYPE_MASK(port)           (RTL8367C_PORT0_FRAME_TYPE_MASK << ((port & 0x7) << 1))
-+
-+#define    RTL8367C_PORT_EFID_BASE                                RTL8367C_REG_PORT_EFID_CTRL0
-+#define    RTL8367C_PORT_EFID_REG(port)                            (RTL8367C_PORT_EFID_BASE + (port >> 2))
-+#define    RTL8367C_PORT_EFID_OFFSET(port)                         ((port & 0x3) << 2)
-+#define    RTL8367C_PORT_EFID_MASK(port)                        (RTL8367C_PORT0_EFID_MASK << RTL8367C_PORT_EFID_OFFSET(port))
-+
-+#define    RTL8367C_PORT_PBFIDEN_REG                            RTL8367C_REG_PORT_PBFIDEN
-+
-+#define    RTL8367C_PORT_PBFID_BASE                             RTL8367C_REG_PORT0_PBFID
-+#define    RTL8367C_PORT_PBFID_REG(port)                        (RTL8367C_PORT_PBFID_BASE + port)
-+
-+/* (16'h0800) dpm_reg */
-+
-+#define    RTL8367C_RMA_CTRL_BASE                                RTL8367C_REG_RMA_CTRL00
-+
-+
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_BASE                RTL8367C_REG_VLAN_PORTBASED_PRIORITY_CTRL0
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_REG(port)            (RTL8367C_VLAN_PORTBASED_PRIORITY_BASE + (port >> 2))
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_OFFSET(port)        ((port & 0x3) << 2)
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_MASK(port)            (0x7 << RTL8367C_VLAN_PORTBASED_PRIORITY_OFFSET(port))
-+
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM_BASE                    RTL8367C_REG_VLAN_PPB_PRIORITY_ITEM0_CTRL0
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM_REG(port, item)        (RTL8367C_VLAN_PPB_PRIORITY_ITEM_BASE + (item << 2)+ (port>>2))
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM_OFFSET(port)            ((port & 0x3) <<2)
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM_MASK(port)            (RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL0_PORT0_PRIORITY_MASK << RTL8367C_VLAN_PPB_PRIORITY_ITEM_OFFSET(port))
-+
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_BASE                RTL8367C_REG_QOS_1Q_PRIORITY_REMAPPING_CTRL0
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_REG(pri)            (RTL8367C_QOS_1Q_PRIORITY_REMAPPING_BASE + (pri >> 2))
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_OFFSET(pri)        ((pri & 0x3) << 2)
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_MASK(pri)            (0x7 << RTL8367C_QOS_1Q_PRIORITY_REMAPPING_OFFSET(pri))
-+
-+#define    RTL8367C_QOS_DSCP_TO_PRIORITY_BASE                    RTL8367C_REG_QOS_DSCP_TO_PRIORITY_CTRL0
-+#define    RTL8367C_QOS_DSCP_TO_PRIORITY_REG(dscp)                (RTL8367C_QOS_DSCP_TO_PRIORITY_BASE + (dscp >> 2))
-+#define    RTL8367C_QOS_DSCP_TO_PRIORITY_OFFSET(dscp)            ((dscp & 0x3) << 2)
-+#define    RTL8367C_QOS_DSCP_TO_PRIORITY_MASK(dscp)                (0x7 << RTL8367C_QOS_DSCP_TO_PRIORITY_OFFSET(dscp))
-+
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_BASE                    RTL8367C_REG_QOS_PORTBASED_PRIORITY_CTRL0
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_REG(port)            (RTL8367C_QOS_PORTBASED_PRIORITY_BASE + (port >> 2))
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_OFFSET(port)            ((port & 0x3) << 2)
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_MASK(port)            (0x7 << RTL8367C_QOS_PORTBASED_PRIORITY_OFFSET(port))
-+
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_BASE            RTL8367C_REG_QOS_INTERNAL_PRIORITY_DECISION_CTRL0
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_REG(src)        (RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_BASE + (src >> 1))
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_OFFSET(src)  ((src & 1) << 3)
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_MASK(src)    (RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_CTRL0_QOS_PORT_WEIGHT_MASK << RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_OFFSET(src))
-+
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_BASE            RTL8367C_REG_QOS_INTERNAL_PRIORITY_DECISION2_CTRL0
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_REG(src)        (RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_BASE + (src >> 1))
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_OFFSET(src)  ((src & 1) << 3)
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_MASK(src)    (RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_CTRL0_QOS_PORT_WEIGHT_MASK << RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_OFFSET(src))
-+
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_IDX_CTRL            RTL8367C_REG_QOS_INTERNAL_PRIORITY_DECISION_IDX
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_IDX(port)  (1 << port)
-+
-+#define    RTL8367C_QOS_PRIPORITY_REMAPPING_IN_CPU_BASE            RTL8367C_REG_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL0
-+#define    RTL8367C_QOS_PRIPORITY_REMAPPING_IN_CPU_REG(pri)        (RTL8367C_QOS_PRIPORITY_REMAPPING_IN_CPU_BASE + (pri >> 2))
-+#define    RTL8367C_QOS_PRIPORITY_REMAPPING_IN_CPU_OFFSET(pri)  ((pri & 0x3) << 2)
-+#define    RTL8367C_QOS_PRIPORITY_REMAPPING_IN_CPU_MASK(pri)    (RTL8367C_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL0_PRIORITY0_MASK << RTL8367C_QOS_PRIPORITY_REMAPPING_IN_CPU_OFFSET(pri))
-+
-+#define    RTL8367C_QOS_TRAP_PRIORITY_CTRL0_REG                RTL8367C_REG_QOS_TRAP_PRIORITY0
-+
-+#define    RTL8367C_QOS_TRAP_PRIORITY_CTRL1_REG                RTL8367C_REG_QOS_TRAP_PRIORITY1
-+
-+#define    RTL8367C_QOS_DSCP_TO_DSCP_BASE                             RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL0
-+#define    RTL8367C_QOS_DSCP_TO_DSCP_REG(dscp)                     (RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL0 + (dscp >> 1))
-+#define    RTL8367C_QOS_DSCP_TO_DSCP_OFFSET(dscp)                ((dscp & 0x1) << 8)
-+#define    RTL8367C_QOS_DSCP_TO_DSCP_MASK(dscp)                   (0x3F << RTL8367C_QOS_DSCP_TO_DSCP_OFFSET(dscp))
-+
-+#define    RTL8367C_UNUCAST_FLOADING_PMSK_REG                    RTL8367C_REG_UNDA_FLOODING_PMSK
-+
-+#define    RTL8367C_UNMCAST_FLOADING_PMSK_REG                    RTL8367C_REG_UNMCAST_FLOADING_PMSK
-+
-+#define    RTL8367C_BCAST_FLOADING_PMSK_REG                        RTL8367C_REG_BCAST_FLOADING_PMSK
-+
-+#define    RTL8367C_PORT_ISOLATION_PORT_MASK_BASE                RTL8367C_REG_PORT_ISOLATION_PORT0_MASK
-+#define    RTL8367C_PORT_ISOLATION_PORT_MASK_REG(port)            (RTL8367C_PORT_ISOLATION_PORT_MASK_BASE + port)
-+
-+#define    RTL8367C_FORCE_CTRL_REG                                RTL8367C_REG_FORCE_CTRL
-+
-+#define    RTL8367C_SOURCE_PORT_BLOCK_REG                        RTL8367C_REG_SOURCE_PORT_PERMIT
-+
-+#define    RTL8367C_IPMCAST_VLAN_LEAKY_REG                        RTL8367C_REG_IPMCAST_VLAN_LEAKY
-+
-+#define    RTL8367C_IPMCAST_PORTISO_LEAKY_REG                    RTL8367C_REG_IPMCAST_PORTISO_LEAKY
-+
-+#define    RTL8367C_PORT_SECURIT_CTRL_REG                        RTL8367C_REG_PORT_SECURITY_CTRL
-+
-+#define    RTL8367C_UNKNOWN_IPV4_MULTICAST_BASE                    RTL8367C_REG_UNKNOWN_IPV4_MULTICAST_CTRL0
-+#define    RTL8367C_UNKNOWN_IPV4_MULTICAST_REG(port)            (RTL8367C_UNKNOWN_IPV4_MULTICAST_BASE + (port >> 3))
-+#define    RTL8367C_UNKNOWN_IPV4_MULTICAST_OFFSET(port)            ((port & 0x7) << 1)
-+#define    RTL8367C_UNKNOWN_IPV4_MULTICAST_MASK(port)            (RTL8367C_PORT0_UNKNOWN_IP4_MCAST_MASK << RTL8367C_UNKNOWN_IPV4_MULTICAST_OFFSET(port))
-+
-+#define    RTL8367C_UNKNOWN_IPV6_MULTICAST_BASE                    RTL8367C_REG_UNKNOWN_IPV6_MULTICAST_CTRL0
-+#define    RTL8367C_UNKNOWN_IPV6_MULTICAST_REG(port)            (RTL8367C_UNKNOWN_IPV6_MULTICAST_BASE + (port >> 3))
-+#define    RTL8367C_UNKNOWN_IPV6_MULTICAST_OFFSET(port)            ((port & 0x7) << 1)
-+#define    RTL8367C_UNKNOWN_IPV6_MULTICAST_MASK(port)            (RTL8367C_PORT0_UNKNOWN_IP4_MCAST_MASK << RTL8367C_UNKNOWN_IPV6_MULTICAST_OFFSET(port))
-+
-+#define    RTL8367C_UNKNOWN_L2_MULTICAST_BASE                    RTL8367C_REG_UNKNOWN_L2_MULTICAST_CTRL0
-+#define    RTL8367C_UNKNOWN_L2_MULTICAST_REG(port)                (RTL8367C_UNKNOWN_L2_MULTICAST_BASE + (port >> 3))
-+#define    RTL8367C_UNKNOWN_L2_MULTICAST_OFFSET(port)            ((port & 0x7) << 1)
-+#define    RTL8367C_UNKNOWN_L2_MULTICAST_MASK(port)                (RTL8367C_PORT0_UNKNOWN_L2_MCAST_MASK << RTL8367C_UNKNOWN_L2_MULTICAST_OFFSET(port))
-+
-+#define    RTL8367C_PORT_TRUNK_CTRL_REG                            RTL8367C_REG_PORT_TRUNK_CTRL
-+#define    RTL8367C_PORT_TRUNK_HASH_MASK                           0x007F
-+
-+#define    RTL8367C_PORT_TRUNK_GROUP_MASK_REG    RTL8367C_REG_PORT_TRUNK_GROUP_MASK
-+#define    RTL8367C_PORT_TRUNK_GROUP_MASK_OFFSET(group)    (group << 2)
-+#define    RTL8367C_PORT_TRUNK_GROUP_MASK_MASK(group)    (RTL8367C_PORT_TRUNK_GROUP0_MASK_MASK << RTL8367C_PORT_TRUNK_GROUP_MASK_OFFSET(group))
-+
-+#define    RTL8367C_PORT_TRUNK_FLOWCTRL_REG                        RTL8367C_REG_PORT_TRUNK_FLOWCTRL
-+
-+#define    RTL8367C_QOS_PORT_QUEUE_NUMBER_BASE                    RTL8367C_REG_QOS_PORT_QUEUE_NUMBER_CTRL0
-+#define    RTL8367C_QOS_PORT_QUEUE_NUMBER_REG(port)                (RTL8367C_QOS_PORT_QUEUE_NUMBER_BASE + (port >> 2))
-+#define    RTL8367C_QOS_PORT_QUEUE_NUMBER_OFFSET(port)            ((port & 0x3) << 2)
-+#define    RTL8367C_QOS_PORT_QUEUE_NUMBER_MASK(port)            (0x7 << RTL8367C_QOS_PORT_QUEUE_NUMBER_OFFSET(port))
-+
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_BASE                    RTL8367C_REG_QOS_1Q_PRIORITY_TO_QID_CTRL0
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_REG(index, pri)        (RTL8367C_QOS_1Q_PRIORITY_TO_QID_BASE + (index << 1) + (pri >> 2))
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_OFFSET(pri)            ((pri & 0x3) << 2)
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_MASK(pri)            (RTL8367C_QOS_1Q_PRIORITY_TO_QID_CTRL0_PRIORITY0_TO_QID_MASK << RTL8367C_QOS_1Q_PRIORITY_TO_QID_OFFSET(pri))
-+
-+#define    RTL8367C_DEBUG_INFO_BASE                                RTL8367C_REG_PORT_DEBUG_INFO_CTRL0
-+#define    RTL8367C_DEBUG_INFO_REG(port)                        (RTL8367C_DEBUG_INFO_BASE + (port >>1))
-+#define    RTL8367C_DEBUG_INFO_OFFSET(port)                        ((port&1)<<3)
-+#define    RTL8367C_DEBUG_INFO_MASK(port)                        (RTL8367C_PORT0_DEBUG_INFO_MASK << RTL8367C_DEBUG_INFO_OFFSET(port))
-+
-+/* (16'h0a00) l2_reg */
-+
-+#define    RTL8367C_VLAN_MSTI_BASE                                RTL8367C_REG_VLAN_MSTI0_CTRL0
-+#define    RTL8367C_VLAN_MSTI_REG(tree, port)                    (RTL8367C_VLAN_MSTI_BASE + (tree << 1) + (port >> 3))
-+#define    RTL8367C_VLAN_MSTI_OFFSET(port)                        ((port & 0x7) << 1)
-+#define    RTL8367C_VLAN_MSTI_MASK(port)                        (RTL8367C_VLAN_MSTI0_CTRL0_PORT0_STATE_MASK << RTL8367C_VLAN_MSTI_OFFSET(port))
-+
-+#define    RTL8367C_LUT_PORT_LEARN_LIMITNO_BASE                    RTL8367C_REG_LUT_PORT0_LEARN_LIMITNO
-+#define    RTL8367C_LUT_PORT_LEARN_LIMITNO_REG(port)            (RTL8367C_LUT_PORT_LEARN_LIMITNO_BASE + port)
-+
-+#define    RTL8367C_LUT_CFG_REG                                    RTL8367C_REG_LUT_CFG
-+
-+#define    RTL8367C_LUT_AGEOUT_CTRL_REG                            RTL8367C_REG_LUT_AGEOUT_CTRL
-+
-+#define    RTL8367C_FORCE_FLUSH_REG                                RTL8367C_REG_FORCE_FLUSH
-+
-+#define    RTL8367C_STORM_BCAST_REG                                RTL8367C_REG_STORM_BCAST
-+
-+#define    RTL8367C_STORM_MCAST_REG                                RTL8367C_REG_STORM_MCAST
-+
-+#define    RTL8367C_STORM_UNKNOWN_UCAST_REG                        RTL8367C_REG_STORM_UNKOWN_UCAST
-+
-+#define    RTL8367C_STORM_UNKNOWN_MCAST_REG                        RTL8367C_REG_STORM_UNKOWN_MCAST
-+
-+#define    RTL8367C_STORM_BCAST_METER_CTRL_BASE                    RTL8367C_REG_STORM_BCAST_METER_CTRL0
-+#define    RTL8367C_STORM_BCAST_METER_CTRL_REG(port)            (RTL8367C_STORM_BCAST_METER_CTRL_BASE + (port >> 1))
-+#define    RTL8367C_STORM_BCAST_METER_CTRL_OFFSET(port)            ((port & 0x1) << 3)
-+#define    RTL8367C_STORM_BCAST_METER_CTRL_MASK(port)            (0xFF << RTL8367C_STORM_BCAST_METER_CTRL_OFFSET(port))
-+
-+#define    RTL8367C_STORM_MCAST_METER_CTRL_BASE                    RTL8367C_REG_STORM_MCAST_METER_CTRL0
-+#define    RTL8367C_STORM_MCAST_METER_CTRL_REG(port)            (RTL8367C_STORM_MCAST_METER_CTRL_BASE + (port >> 1))
-+#define    RTL8367C_STORM_MCAST_METER_CTRL_OFFSET(port)            ((port & 0x1) << 3)
-+#define    RTL8367C_STORM_MCAST_METER_CTRL_MASK(port)            (0xFF << RTL8367C_STORM_MCAST_METER_CTRL_OFFSET(port))
-+
-+#define    RTL8367C_STORM_UNDA_METER_CTRL_BASE                    RTL8367C_REG_STORM_UNDA_METER_CTRL0
-+#define    RTL8367C_STORM_UNDA_METER_CTRL_REG(port)                (RTL8367C_STORM_UNDA_METER_CTRL_BASE + (port >> 1))
-+#define    RTL8367C_STORM_UNDA_METER_CTRL_OFFSET(port)            ((port & 0x1) << 3)
-+#define    RTL8367C_STORM_UNDA_METER_CTRL_MASK(port)            (0xFF << RTL8367C_STORM_UNDA_METER_CTRL_OFFSET(port))
-+
-+#define    RTL8367C_STORM_UNMC_METER_CTRL_BASE                    RTL8367C_REG_STORM_UNMC_METER_CTRL0
-+#define    RTL8367C_STORM_UNMC_METER_CTRL_REG(port)                (RTL8367C_STORM_UNMC_METER_CTRL_BASE + (port >> 1))
-+#define    RTL8367C_STORM_UNMC_METER_CTRL_OFFSET(port)            ((port & 0x1) << 3)
-+#define    RTL8367C_STORM_UNMC_METER_CTRL_MASK(port)            (0xFF << RTL8367C_STORM_UNMC_METER_CTRL_OFFSET(port))
-+
-+#define    RTL8367C_OAM_PARSER_OFFSET(port)                        (port*2)
-+#define    RTL8367C_OAM_PARSER_MASK(port)                        (RTL8367C_PORT0_PARACT_MASK << RTL8367C_OAM_PARSER_OFFSET(port))
-+
-+#define    RTL8367C_OAM_MULTIPLEXER_OFFSET(port)                (port*2)
-+#define    RTL8367C_OAM_MULTIPLEXER_MASK(port)                    (RTL8367C_PORT0_PARACT_MASK << RTL8367C_OAM_MULTIPLEXER_OFFSET(port))
-+
-+#define    RTL8367C_OAM_CTRL_REG                                RTL8367C_REG_OAM_CTRL
-+
-+#define    RTL8367C_DOT1X_PORT_ENABLE_REG                        RTL8367C_REG_DOT1X_PORT_ENABLE
-+
-+#define    RTL8367C_DOT1X_MAC_ENABLE_REG                        RTL8367C_REG_DOT1X_MAC_ENABLE
-+
-+#define    RTL8367C_DOT1X_PORT_AUTH_REG                            RTL8367C_REG_DOT1X_PORT_AUTH
-+
-+#define    RTL8367C_DOT1X_PORT_OPDIR_REG                        RTL8367C_REG_DOT1X_PORT_OPDIR
-+
-+#define    RTL8367C_DOT1X_UNAUTH_ACT_BASE                        RTL8367C_REG_DOT1X_UNAUTH_ACT_W0
-+#define    RTL8367C_DOT1X_UNAUTH_ACT_OFFSET(port)                ((port & 0x7) << 1)
-+#define    RTL8367C_DOT1X_UNAUTH_ACT_MASK(port)                    (RTL8367C_DOT1X_PORT0_UNAUTHBH_MASK << RTL8367C_DOT1X_UNAUTH_ACT_OFFSET(port))
-+
-+#define    RTL8367C_DOT1X_CFG_REG                                RTL8367C_REG_DOT1X_CFG
-+
-+#define    RTL8367C_REG_L2_LRN_CNT_BASE                            RTL8367C_REG_L2_LRN_CNT_CTRL0
-+#define    RTL8367C_REG_L2_LRN_CNT_REG(port)                    (RTL8367C_REG_L2_LRN_CNT_BASE + port)
-+
-+/* (16'h0b00) mltvlan_reg */
-+
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY_BASE_REG(index)        (RTL8367C_REG_SVLAN_MCAST2S_ENTRY0_CTRL0 + index*5)
-+
-+/* (16'h0c00) svlan_reg */
-+
-+#define    RTL8367C_SVLAN_MEMBERCFG_BASE_REG(index)                (RTL8367C_REG_SVLAN_MEMBERCFG0_CTRL1 + index*3)
-+#define    RTL8367C_SVLAN_C2SCFG_BASE_REG(index)                  (RTL8367C_REG_SVLAN_C2SCFG0_CTRL0+ index*3)
-+#define    RTL8367C_SVLAN_CFG_REG                                RTL8367C_REG_SVLAN_CFG
-+
-+/* (16'h0f00) hsactrl_reg */
-+
-+#define    RTL8367C_SVLAN_S2C_ENTRY_BASE_REG(index)                (RTL8367C_REG_SVLAN_SP2C_ENTRY0_CTRL0 + index*2)
-+
-+/* (16'h1000) mib_reg */
-+
-+#define    RTL8367C_MIB_COUNTER_BASE_REG                        RTL8367C_REG_MIB_COUNTER0
-+
-+#define    RTL8367C_MIB_ADDRESS_REG                                RTL8367C_REG_MIB_ADDRESS
-+
-+#define    RTL8367C_MIB_CTRL_REG                                RTL8367C_REG_MIB_CTRL0
-+#define    RTL8367C_MIB_PORT07_MASK                                (0xFF<<RTL8367C_PORT0_RESET_OFFSET)
-+
-+/* (16'h1100) intrpt_reg */
-+
-+#define    RTL8367C_INTR_CTRL_REG                                RTL8367C_REG_INTR_CTRL
-+
-+#define    RTL8367C_INTR_IMR_REG                                RTL8367C_REG_INTR_IMR
-+
-+#define    RTL8367C_INTR_IMS_REG                                RTL8367C_REG_INTR_IMS
-+
-+#define    RTL8367C_INTR_INDICATOR_BASED                        RTL8367C_REG_LEARN_OVER_INDICATOR
-+#define    RTL8367C_LEARN_OVER_INDICATOR_REG                    RTL8367C_REG_LEARN_OVER_INDICATOR
-+
-+#define    RTL8367C_SPEED_CHANGE_INDICATOR_REG                    RTL8367C_REG_SPEED_CHANGE_INDICATOR
-+
-+#define    RTL8367C_PORT_LINKDOWN_INDICATOR_REG                    RTL8367C_REG_PORT_LINKDOWN_INDICATOR
-+
-+#define    RTL8367C_PORT_LINKUP_INDICATOR_REG                    RTL8367C_REG_PORT_LINKUP_INDICATOR
-+
-+#define    RTL8367C_REG_METER_EXCEED_INDICATOR_BASE                RTL8367C_REG_METER_EXCEED_INDICATOR0
-+#define    RTL8367C_REG_METER_EXCEED_INDICATOR_REG(meter)        (RTL8367C_REG_METER_EXCEED_INDICATOR_BASE + (meter >> 4))
-+#define    RTL8367C_REG_METER_EXCEED_INDICATOR_OFFSET(meter)    (meter & 0xF)
-+
-+/* (16'h1200) swcore_reg */
-+
-+#define    RTL8367C_VS_TPID_REG                                    RTL8367C_REG_VS_TPID
-+
-+#define    RTL8367C_SWITCH_MAC_BASE                                RTL8367C_REG_SWITCH_MAC0
-+
-+#define    RTL8367C_REMARKING_CTRL_REG                            RTL8367C_REG_SWITCH_CTRL0
-+
-+#define    RTL8367C_QOS_DSCP_REMARK_BASE                        RTL8367C_REG_QOS_DSCP_REMARK_CTRL0
-+#define    RTL8367C_QOS_DSCP_REMARK_REG(pri)                    (RTL8367C_QOS_DSCP_REMARK_BASE + (pri >> 1))
-+#define    RTL8367C_QOS_DSCP_REMARK_OFFSET(pri)                    (((pri) & 0x1) << 3)
-+#define    RTL8367C_QOS_DSCP_REMARK_MASK(pri)                    (0x3F << RTL8367C_QOS_DSCP_REMARK_OFFSET(pri))
-+
-+#define    RTL8367C_QOS_1Q_REMARK_BASE                            RTL8367C_REG_QOS_1Q_REMARK_CTRL0
-+#define    RTL8367C_QOS_1Q_REMARK_REG(pri)                        (RTL8367C_QOS_1Q_REMARK_BASE + (pri >> 2))
-+#define    RTL8367C_QOS_1Q_REMARK_OFFSET(pri)                    ((pri & 0x3) << 2)
-+#define    RTL8367C_QOS_1Q_REMARK_MASK(pri)                        (0x7 << RTL8367C_QOS_1Q_REMARK_OFFSET(pri))
-+
-+#define    RTL8367C_PTKGEN_PAYLOAD_CTRL0_REG                    RTL8367C_REG_PTKGEN_PAYLOAD_CTRL0
-+
-+#define    RTL8367C_PTKGEN_PAYLOAD_CTRL1_REG                    RTL8367C_REG_PTKGEN_PAYLOAD_CTRL1
-+
-+#define    RTL8367C_SVLAN_UPLINK_PORTMASK_REG                    RTL8367C_REG_SVLAN_UPLINK_PORTMASK
-+
-+#define    RTL8367C_CPU_PORT_MASK_REG                            RTL8367C_REG_CPU_PORT_MASK
-+
-+#define    RTL8367C_CPU_CTRL_REG                                RTL8367C_REG_CPU_CTRL
-+
-+#define    RTL8367C_MIRROR_CTRL_REG                                RTL8367C_REG_MIRROR_CTRL
-+
-+
-+#define    RTL8367C_FLOWCRTL_EGRESS_QUEUE_ENABLE_BASE            RTL8367C_REG_FLOWCRTL_EGRESS_QUEUE_ENABLE_CTRL0
-+#define    RTL8367C_FLOWCRTL_EGRESS_QUEUE_ENABLE_REG(port)        (RTL8367C_FLOWCRTL_EGRESS_QUEUE_ENABLE_BASE + (port >> 1))
-+#define    RTL8367C_FLOWCRTL_EGRESS_QUEUE_ENABLE_REG_OFFSET(port)    ((port & 0x1) << 3)
-+#define    RTL8367C_FLOWCRTL_EGRESS_QUEUE_ENABLE_REG_MASK(port)    (RTL8367C_PORT0_QUEUE_MASK_MASK << RTL8367C_FLOWCRTL_EGRESS_QUEUE_ENABLE_REG_OFFSET(port))
-+
-+
-+#define    RTL8367C_FLOWCTRL_PORT_PAGE_COUNTER_BASE                RTL8367C_REG_FLOWCTRL_PORT0_PAGE_COUNTER
-+#define    RTL8367C_FLOWCTRL_PORT_PAGE_COUNTER_REG(port)        (RTL8367C_FLOWCTRL_PORT_PAGE_COUNTER_BASE + port)
-+#define    RTL8367C_FLOWCTRL_PORT_PAGE_COUNTER_MASK                RTL8367C_FLOWCTRL_PORT0_PAGE_COUNTER_MASK
-+
-+#define    RTL8367C_FLOWCTRL_PORT_PAGE_MAX_BASE                    RTL8367C_REG_FLOWCTRL_PORT0_PAGE_MAX
-+#define    RTL8367C_FLOWCTRL_PORT_PAGE_MAX_REG(port)            (RTL8367C_FLOWCTRL_PORT_PAGE_MAX_BASE + port)
-+#define    RTL8367C_FLOWCTRL_PORT_PAGE_MAX_MASK                    RTL8367C_FLOWCTRL_PORT0_PAGE_MAX_MASK
-+
-+#define    RTL8367C_FIELD_SELECTOR_REG(index)                    (RTL8367C_REG_FIELD_SELECTOR0 + index)
-+#define    RTL8367C_FIELD_SELECTOR_ENABLE_OFFSET                 RTL8367C_FIELD_SELECTOR0_ENABLE_OFFSET
-+#define    RTL8367C_FIELD_SELECTOR_ENABLE_MASK                    RTL8367C_FIELD_SELECTOR0_ENABLE_MASK
-+#define    RTL8367C_FIELD_SELECTOR_FORMAT_OFFSET                RTL8367C_FIELD_SELECTOR0_FORMAT_OFFSET
-+#define    RTL8367C_FIELD_SELECTOR_FORMAT_MASK                    RTL8367C_FIELD_SELECTOR0_FORMAT_MASK
-+#define    RTL8367C_FIELD_SELECTOR_OFFSET_OFFSET                  RTL8367C_FIELD_SELECTOR0_OFFSET_OFFSET
-+#define    RTL8367C_FIELD_SELECTOR_OFFSET_MASK                    RTL8367C_FIELD_SELECTOR0_OFFSET_MASK
-+
-+/* (16'h1300) chip_reg*/
-+
-+/* (16'h1400) mtrpool_reg */
-+#define    RTL8367C_METER_RATE_BASE                                RTL8367C_REG_METER0_RATE_CTRL0
-+#define    RTL8367C_METER_RATE_REG(meter)                        ((meter << 1) + RTL8367C_METER_RATE_BASE)
-+
-+#define    RTL8367C_METER_BUCKET_SIZE_BASE                        RTL8367C_REG_METER0_BUCKET_SIZE
-+#define    RTL8367C_METER_BUCKET_SIZE_REG(meter)                (RTL8367C_METER_BUCKET_SIZE_BASE + meter)
-+
-+#define    RTL8367C_LEAKY_BUCKET_TICK_REG                        RTL8367C_REG_METER_CTRL0
-+#define    RTL8367C_LEAKY_BUCKET_TICK_OFFSET                    RTL8367C_METER_TICK_OFFSET
-+#define    RTL8367C_LEAKY_BUCKET_TICK_MASK                        RTL8367C_METER_TICK_MASK
-+
-+#define    RTL8367C_LEAKY_BUCKET_TOKEN_REG                        RTL8367C_REG_METER_CTRL1
-+#define    RTL8367C_LEAKY_BUCKET_TOKEN_OFFSET                    RTL8367C_METER_CTRL1_OFFSET
-+#define    RTL8367C_LEAKY_BUCKET_TOKEN_MASK                        RTL8367C_METER_CTRL1_MASK
-+
-+#define    RTL8367C_METER_OVERRATE_INDICATOR_BASE                RTL8367C_REG_METER_OVERRATE_INDICATOR0
-+#define    RTL8367C_METER_OVERRATE_INDICATOR_REG(meter)            (RTL8367C_METER_OVERRATE_INDICATOR_BASE + (meter >> 4))
-+#define    RTL8367C_METER_EXCEED_OFFSET(meter)                    (meter & 0xF)
-+#define    RTL8367C_METER_EXCEED_MASK(meter)                    (1 << RTL8367C_METER_EXCEED_OFFSET(meter))
-+
-+#define    RTL8367C_METER_IFG_CTRL_BASE                            RTL8367C_REG_METER_IFG_CTRL0
-+#define    RTL8367C_METER_IFG_CTRL_REG(meter)                    (RTL8367C_METER_IFG_CTRL_BASE + (meter >> 4))
-+#define    RTL8367C_METER_IFG_OFFSET(meter)                        (meter & 0xF)
-+#define    RTL8367C_METER_IFG_MASK(meter)                        (1 << RTL8367C_METER_IFG_OFFSET(meter))
-+
-+#define    RTL8367C_FLOWCTRL_CTRL_REG                            RTL8367C_REG_FLOWCTRL_CTRL0
-+
-+/* (16'h1800)8051_RLDP_EEE_reg */
-+#define    RTL8367C_EEELLDP_CTRL0_REG                            RTL8367C_REG_EEELLDP_CTRL0
-+
-+#define    RTL8367C_EEELLDP_CTRL1_REG                            RTL8367C_REG_EEELLDP_CTRL1
-+
-+#define    RTL8367C_EEELLDP_PMSK_REG                            RTL8367C_REG_EEELLDP_PMSK
-+
-+#define    RTL8367C_EEELLDP_TX_FRAMEU_REG_BASE                    RTL8367C_REG_EEELLDP_FRAMEU00
-+
-+#define    RTL8367C_EEELLDP_TX_CAP_FRAMEL_REG_BASE                RTL8367C_REG_EEELLDP_CAP_FRAMEL00
-+
-+#define    RTL8367C_EEELLDP_RX_VALUE_PORT_BASE                    RTL8367C_REG_EEELLDP_RX_VALUE_P00_00
-+#define    RTL8367C_EEELLDP_RX_VALUE_PORT_REG(port)                (RTL8367C_EEELLDP_RX_VALUE_PORT_BASE + (port * 9))
-+
-+#define    RTL8367C_RLDP_CTRL0_REG                                RTL8367C_REG_RLDP_CTRL0
-+#define    RTL8367C_RLDP_MODE_OFFSET    14
-+
-+#define    RTL8367C_RLDP_RETRY_COUNT_REG                        RTL8367C_REG_RLDP_CTRL1
-+
-+#define    RTL8367C_RLDP_RETRY_PERIOD_LOOPSTATE_REG                RTL8367C_REG_RLDP_CTRL2
-+
-+#define    RTL8367C_RLDP_RETRY_PERIOD_CHKSTATE_REG                RTL8367C_REG_RLDP_CTRL3
-+
-+#define    RTL8367C_RLDP_TX_PMSK_REG                            RTL8367C_REG_RLDP_CTRL4
-+
-+#define    RTL8367C_RLDP_RAND_NUM_REG_BASE                        RTL8367C_REG_RLDP_RAND_NUM0
-+
-+#define    RTL8367C_RLDP_MAGIC_NUM_REG_BASE                        RTL8367C_REG_RLDP_MAGIC_NUM0
-+
-+#define    RTL8367C_RLDP_LOOP_PMSK_REG                            RTL8367C_REG_RLDP_LOOPSTATUS_INDICATOR
-+
-+#define    RTL8367C_RLDP_LOOP_PORT_BASE                            RTL8367C_REG_RLDP_LOOP_PORT_REG0
-+#define    RTL8367C_RLDP_LOOP_PORT_REG(port)                    (RTL8367C_RLDP_LOOP_PORT_BASE + (port >> 1))
-+#define    RTL8367C_RLDP_LOOP_PORT_OFFSET(port)                    ((port & 0x1) << 3)
-+#define    RTL8367C_RLDP_LOOP_PORT_MASK(port)                    (RTL8367C_RLDP_LOOP_PORT_00_MASK << RTL8367C_RLDP_LOOP_PORT_OFFSET(port))
-+
-+#define    RTL8367C_PAGEMETER_PORT_BASE                            RTL8367C_REG_PAGEMETER_PORT0_CTRL0
-+#define    RTL8367C_PAGEMETER_PORT_REG(port)                    (RTL8367C_PAGEMETER_PORT_BASE + 0x20*port)
-+
-+#define    RTL8367C_HIGHPRI_INDICATOR_REG                        RTL8367C_REG_HIGHPRI_INDICATOR
-+#define    RTL8367C_PORT_INDICATOR_OFFSET(port)                    (port)
-+#define    RTL8367C_PORT_INDICATOR_MASK(port)                    (RTL8367C_PORT0_INDICATOR_MASK << RTL8367C_PORT_INDICATOR_OFFSET(port))
-+
-+#define    RTL8367C_HIGHPRI_CFG_REG                                RTL8367C_REG_HIGHPRI_CFG
-+
-+#define    RTL8367C_EAV_PRIORITY_REMAPPING_BASE                    RTL8367C_REG_EAV_CTRL1
-+#define    RTL8367C_EAV_PRIORITY_REMAPPING_REG(pri)                (RTL8367C_EAV_PRIORITY_REMAPPING_BASE + (pri >> 2))
-+#define    RTL8367C_EAV_PRIORITY_REMAPPING_OFFSET(pri)            ((pri & 0x3) * RTL8367C_REMAP_EAV_PRI1_REGEN_OFFSET)
-+#define    RTL8367C_EAV_PRIORITY_REMAPPING_MASK(pri)            (RTL8367C_REMAP_EAV_PRI0_REGEN_MASK << RTL8367C_EAV_PRIORITY_REMAPPING_OFFSET(pri))
-+
-+#define    RTL8367C_EEEP_CFG_BASE                                RTL8367C_REG_PORT0_EEECFG
-+#define    RTL8367C_EEEP_CFG_REG(port)                            (RTL8367C_EEEP_CFG_BASE + (port*0x20))
-+
-+#define    RTL8367C_PKG_CFG_BASE                                RTL8367C_REG_PKTGEN_PORT0_CTRL
-+#define    RTL8367C_PKG_CFG_REG(port)                            (RTL8367C_PKG_CFG_BASE + (port*0x20))
-+
-+#define    RTL8367C_PKG_DA_BASE                                    RTL8367C_REG_PKTGEN_PORT0_DA0
-+#define    RTL8367C_PKG_DA_REG(port)                            (RTL8367C_PKG_DA_BASE + (port*0x20))
-+
-+#define    RTL8367C_PKG_SA_BASE                                    RTL8367C_REG_PKTGEN_PORT0_SA0
-+#define    RTL8367C_PKG_SA_REG(port)                            (RTL8367C_PKG_SA_BASE + (port*0x20))
-+
-+#define    RTL8367C_PKG_NUM_BASE                                RTL8367C_REG_PKTGEN_PORT0_COUNTER0
-+#define    RTL8367C_PKG_NUM_REG(port)                            (RTL8367C_PKG_NUM_BASE + (port*0x20))
-+
-+#define    RTL8367C_PKG_LENGTH_BASE                                RTL8367C_REG_PKTGEN_PORT0_TX_LENGTH
-+#define    RTL8367C_PKG_LENGTH_REG(port)                        (RTL8367C_PKG_LENGTH_BASE + (port*0x20))
-+
-+/* (16'h1c00)IGMP_MLD_reg */
-+#define    RTL8367C_IGMP_GROUP_USAGE_BASE                       RTL8367C_REG_IGMP_GROUP_USAGE_LIST0
-+#define    RTL8367C_IGMP_GROUP_USAGE_REG(idx)                   (RTL8367C_IGMP_GROUP_USAGE_BASE + (idx / 16))
-+
-+#define    RTL8367C_FALLBACK_BASE                               RTL8367C_REG_FALLBACK_PORT0_CFG0
-+#define    RTL8367C_FALLBACK_PORT_CFG_REG(port)                 (RTL8367C_FALLBACK_BASE + (port * 4))
-+#define    RTL8367C_FALLBACK_PORT_MON_CNT_REG(port)             (RTL8367C_FALLBACK_BASE + 1 + (port * 4))
-+#define    RTL8367C_FALLBACK_PORT_ERR_CNT_REG(port)             (RTL8367C_FALLBACK_BASE + 3 + (port * 4))
-+
-+
-+/* (16'h6400)timer_1588 */
-+#define    RTL8367C_EAV_CFG_BASE                                              RTL8367C_REG_P0_EAV_CFG
-+#define    RTL8367C_EAV_PORT_CFG_REG(port)                              (RTL8367C_EAV_CFG_BASE + (port *0x10))
-+#define    RTL8367C_EAV_CFG_PTP_PHY_EN_EN_OFFSET                 RTL8367C_P0_EAV_CFG_PTP_PHY_EN_EN_OFFSET
-+#define    RTL8367C_EAV_CFG_RX_PDELAY_RESP_OFFSET                RTL8367C_P0_EAV_CFG_RX_PDELAY_RESP_OFFSET
-+#define    RTL8367C_EAV_CFG_RX_PDELAY_REQ_OFFSET                 RTL8367C_P0_EAV_CFG_RX_PDELAY_REQ_OFFSET
-+#define    RTL8367C_EAV_CFG_RX_DELAY_REQ_OFFSET                   RTL8367C_P0_EAV_CFG_RX_DELAY_REQ_OFFSET
-+#define    RTL8367C_EAV_CFG_RX_SYNC_OFFSET                            RTL8367C_P0_EAV_CFG_RX_SYNC_OFFSET
-+#define    RTL8367C_EAV_CFG_TX_PDELAY_RESP_OFFSET                RTL8367C_P0_EAV_CFG_TX_PDELAY_RESP_OFFSET
-+#define    RTL8367C_EAV_CFG_TX_PDELAY_REQ_OFFSET                 RTL8367C_P0_EAV_CFG_TX_PDELAY_REQ_OFFSET
-+#define    RTL8367C_EAV_CFG_TX_DELAY_REQ_OFFSET                   RTL8367C_P0_EAV_CFG_TX_DELAY_REQ_OFFSET
-+#define    RTL8367C_EAV_CFG_TX_SYNC_OFFSET                            RTL8367C_P0_EAV_CFG_TX_SYNC_OFFSET
-+
-+#define    RTL8367C_REG_TX_SYNC_SEQ_ID_BASE                       RTL8367C_REG_P0_TX_SYNC_SEQ_ID
-+#define    RTL8367C_REG_TX_SYNC_SEQ_ID(port)                        (RTL8367C_REG_TX_SYNC_SEQ_ID_BASE + (port *0x10))
-+#define    RTL8367C_REG_SEQ_ID(port, type)                              (RTL8367C_REG_TX_SYNC_SEQ_ID_BASE + type + (port *0x10))
-+
-+#define    RTL8367C_REG_TX_DELAY_REQ_SEQ_ID_BASE              RTL8367C_REG_P0_TX_DELAY_REQ_SEQ_ID
-+#define    RTL8367C_REG_TX_PDELAY_REQ_SEQ_ID_BASE          RTL8367C_REG_P0_TX_PDELAY_REQ_SEQ_ID
-+#define    RTL8367C_REG_TX_PDELAY_RESP_SEQ_ID_BASE        RTL8367C_REG_P0_TX_PDELAY_RESP_SEQ_ID
-+#define    RTL8367C_REG_RX_SYNC_SEQ_ID_BASE                        RTL8367C_REG_P0_RX_SYNC_SEQ_ID
-+#define    RTL8367C_REG_RX_DELAY_REQ_SEQ_ID_BASE            RTL8367C_REG_P0_RX_DELAY_REQ_SEQ_ID
-+#define    RTL8367C_REG_RX_PDELAY_REQ_SEQ_ID_BASE        RTL8367C_REG_P0_RX_PDELAY_REQ_SEQ_ID
-+#define    RTL8367C_REG_RX_PDELAY_RESP_SEQ_ID_BASE        RTL8367C_REG_P0_RX_PDELAY_RESP_SEQ_ID
-+
-+#define    RTL8367C_REG_PORT_NSEC_L_BASE                            RTL8367C_REG_P0_PORT_NSEC_15_0
-+#define    RTL8367C_REG_PORT_NSEC_L(port)                            (RTL8367C_REG_PORT_NSEC_L_BASE + (port *0x10))
-+#define    RTL8367C_REG_PORT_NSEC_H_BASE                            RTL8367C_REG_P0_PORT_NSEC_26_16
-+#define    RTL8367C_REG_PORT_NSEC_H(port)                            (RTL8367C_REG_PORT_NSEC_H_BASE + (port *0x10))
-+#define    RTL8367C_PORT_NSEC_H_OFFSET                                RTL8367C_P0_PORT_NSEC_26_16_OFFSET
-+#define    RTL8367C_PORT_NSEC_H_MASK                                   RTL8367C_P0_PORT_NSEC_26_16_MASK
-+
-+#define    RTL8367C_REG_PORT_SEC_L_BASE                                RTL8367C_REG_P0_PORT_SEC_15_0
-+#define    RTL8367C_REG_PORT_SEC_L(port)                            (RTL8367C_REG_PORT_SEC_L_BASE + (port *0x10))
-+#define    RTL8367C_REG_PORT_SEC_H_BASE                            RTL8367C_REG_P0_PORT_SEC_31_16
-+#define    RTL8367C_REG_PORT_SEC_H(port)                            (RTL8367C_REG_PORT_SEC_H_BASE + (port *0x10))
-+
-+#endif /*#ifndef _RTL8367C_BASE_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_reg.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_reg.h
-new file mode 100644
-index 0000000000..eb4f48b83e
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_reg.h
-@@ -0,0 +1,22819 @@
-+#ifndef _RTL8367C_REG_H_
-+#define _RTL8367C_REG_H_
-+
-+/************************************************************
-+auto-generated register address and field data
-+*************************************************************/
-+
-+/* (16'h0000)port_reg */
-+
-+#define    RTL8367C_REG_PORT0_CGST_HALF_CFG    0x0000
-+#define    RTL8367C_PORT0_CGST_HALF_CFG_CONGESTION_TIME_OFFSET    4
-+#define    RTL8367C_PORT0_CGST_HALF_CFG_CONGESTION_TIME_MASK    0xF0
-+#define    RTL8367C_PORT0_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT0_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT0_CTRL    0x0001
-+#define    RTL8367C_PKTGEN_PORT0_CTRL_STATUS_OFFSET    15
-+#define    RTL8367C_PKTGEN_PORT0_CTRL_STATUS_MASK    0x8000
-+#define    RTL8367C_PKTGEN_PORT0_CTRL_PKTGEN_STS_OFFSET    13
-+#define    RTL8367C_PKTGEN_PORT0_CTRL_PKTGEN_STS_MASK    0x2000
-+#define    RTL8367C_PKTGEN_PORT0_CTRL_CRC_NO_ERROR_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT0_CTRL_CRC_NO_ERROR_MASK    0x10
-+#define    RTL8367C_PKTGEN_PORT0_CTRL_CMD_START_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT0_CTRL_CMD_START_MASK    0x1
-+
-+#define    RTL8367C_REG_TX_ERR_CNT_PORT0    0x0002
-+#define    RTL8367C_TX_ERR_CNT_PORT0_OFFSET    0
-+#define    RTL8367C_TX_ERR_CNT_PORT0_MASK    0x7
-+
-+#define    RTL8367C_REG_PKTGEN_PORT0_DA0    0x0003
-+
-+#define    RTL8367C_REG_PKTGEN_PORT0_DA1    0x0004
-+
-+#define    RTL8367C_REG_PKTGEN_PORT0_DA2    0x0005
-+
-+#define    RTL8367C_REG_PKTGEN_PORT0_SA0    0x0006
-+
-+#define    RTL8367C_REG_PKTGEN_PORT0_SA1    0x0007
-+
-+#define    RTL8367C_REG_PKTGEN_PORT0_SA2    0x0008
-+
-+#define    RTL8367C_REG_PKTGEN_PORT0_COUNTER0    0x0009
-+
-+#define    RTL8367C_REG_PKTGEN_PORT0_COUNTER1    0x000a
-+#define    RTL8367C_PKTGEN_PORT0_COUNTER1_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT0_COUNTER1_MASK    0xFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT0_TX_LENGTH    0x000b
-+#define    RTL8367C_PKTGEN_PORT0_TX_LENGTH_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT0_TX_LENGTH_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT0_TIMER    0x000d
-+#define    RTL8367C_PKTGEN_PORT0_TIMER_TIMER_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT0_TIMER_TIMER_MASK    0xF0
-+#define    RTL8367C_PKTGEN_PORT0_TIMER_RX_DMA_ERR_FLAG_OFFSET    3
-+#define    RTL8367C_PKTGEN_PORT0_TIMER_RX_DMA_ERR_FLAG_MASK    0x8
-+
-+#define    RTL8367C_REG_PORT0_MISC_CFG    0x000e
-+#define    RTL8367C_PORT0_MISC_CFG_SMALL_TAG_IPG_OFFSET    15
-+#define    RTL8367C_PORT0_MISC_CFG_SMALL_TAG_IPG_MASK    0x8000
-+#define    RTL8367C_PORT0_MISC_CFG_TX_ITFSP_MODE_OFFSET    14
-+#define    RTL8367C_PORT0_MISC_CFG_TX_ITFSP_MODE_MASK    0x4000
-+#define    RTL8367C_PORT0_MISC_CFG_FLOWCTRL_INDEP_OFFSET    13
-+#define    RTL8367C_PORT0_MISC_CFG_FLOWCTRL_INDEP_MASK    0x2000
-+#define    RTL8367C_PORT0_MISC_CFG_DOT1Q_REMARK_ENABLE_OFFSET    12
-+#define    RTL8367C_PORT0_MISC_CFG_DOT1Q_REMARK_ENABLE_MASK    0x1000
-+#define    RTL8367C_PORT0_MISC_CFG_INGRESSBW_FLOWCTRL_OFFSET    11
-+#define    RTL8367C_PORT0_MISC_CFG_INGRESSBW_FLOWCTRL_MASK    0x800
-+#define    RTL8367C_PORT0_MISC_CFG_INGRESSBW_IFG_OFFSET    10
-+#define    RTL8367C_PORT0_MISC_CFG_INGRESSBW_IFG_MASK    0x400
-+#define    RTL8367C_PORT0_MISC_CFG_RX_SPC_OFFSET    9
-+#define    RTL8367C_PORT0_MISC_CFG_RX_SPC_MASK    0x200
-+#define    RTL8367C_PORT0_MISC_CFG_CRC_SKIP_OFFSET    8
-+#define    RTL8367C_PORT0_MISC_CFG_CRC_SKIP_MASK    0x100
-+#define    RTL8367C_PORT0_MISC_CFG_PKTGEN_TX_FIRST_OFFSET    7
-+#define    RTL8367C_PORT0_MISC_CFG_PKTGEN_TX_FIRST_MASK    0x80
-+#define    RTL8367C_PORT0_MISC_CFG_MAC_LOOPBACK_OFFSET    6
-+#define    RTL8367C_PORT0_MISC_CFG_MAC_LOOPBACK_MASK    0x40
-+#define    RTL8367C_PORT0_MISC_CFG_VLAN_EGRESS_MODE_OFFSET    4
-+#define    RTL8367C_PORT0_MISC_CFG_VLAN_EGRESS_MODE_MASK    0x30
-+#define    RTL8367C_PORT0_MISC_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT0_MISC_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT0_RATE_CTRL0    0x000f
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT0_RATE_CTRL1    0x0010
-+#define    RTL8367C_INGRESSBW_PORT0_RATE_CTRL1_DUMMY_OFFSET    3
-+#define    RTL8367C_INGRESSBW_PORT0_RATE_CTRL1_DUMMY_MASK    0xFFF8
-+#define    RTL8367C_INGRESSBW_PORT0_RATE_CTRL1_INGRESSBW_RATE16_OFFSET    0
-+#define    RTL8367C_INGRESSBW_PORT0_RATE_CTRL1_INGRESSBW_RATE16_MASK    0x7
-+
-+#define    RTL8367C_REG_PORT0_FORCE_RATE0    0x0011
-+
-+#define    RTL8367C_REG_PORT0_FORCE_RATE1    0x0012
-+
-+#define    RTL8367C_REG_PORT0_CURENT_RATE0    0x0013
-+
-+#define    RTL8367C_REG_PORT0_CURENT_RATE1    0x0014
-+
-+#define    RTL8367C_REG_PORT0_PAGE_COUNTER    0x0015
-+#define    RTL8367C_PORT0_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_PORT0_PAGE_COUNTER_MASK    0x7F
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT0_CTRL0    0x0016
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT0_CTRL1    0x0017
-+
-+#define    RTL8367C_REG_PORT0_EEECFG    0x0018
-+#define    RTL8367C_PORT0_EEECFG_EEEP_ENABLE_TX_OFFSET    14
-+#define    RTL8367C_PORT0_EEECFG_EEEP_ENABLE_TX_MASK    0x4000
-+#define    RTL8367C_PORT0_EEECFG_EEEP_ENABLE_RX_OFFSET    13
-+#define    RTL8367C_PORT0_EEECFG_EEEP_ENABLE_RX_MASK    0x2000
-+#define    RTL8367C_PORT0_EEECFG_EEE_FORCE_OFFSET    12
-+#define    RTL8367C_PORT0_EEECFG_EEE_FORCE_MASK    0x1000
-+#define    RTL8367C_PORT0_EEECFG_EEE_100M_OFFSET    11
-+#define    RTL8367C_PORT0_EEECFG_EEE_100M_MASK    0x800
-+#define    RTL8367C_PORT0_EEECFG_EEE_GIGA_500M_OFFSET    10
-+#define    RTL8367C_PORT0_EEECFG_EEE_GIGA_500M_MASK    0x400
-+#define    RTL8367C_PORT0_EEECFG_EEE_TX_OFFSET    9
-+#define    RTL8367C_PORT0_EEECFG_EEE_TX_MASK    0x200
-+#define    RTL8367C_PORT0_EEECFG_EEE_RX_OFFSET    8
-+#define    RTL8367C_PORT0_EEECFG_EEE_RX_MASK    0x100
-+#define    RTL8367C_PORT0_EEECFG_EEE_DSP_RX_OFFSET    6
-+#define    RTL8367C_PORT0_EEECFG_EEE_DSP_RX_MASK    0x40
-+#define    RTL8367C_PORT0_EEECFG_EEE_LPI_OFFSET    5
-+#define    RTL8367C_PORT0_EEECFG_EEE_LPI_MASK    0x20
-+#define    RTL8367C_PORT0_EEECFG_EEE_TX_LPI_OFFSET    4
-+#define    RTL8367C_PORT0_EEECFG_EEE_TX_LPI_MASK    0x10
-+#define    RTL8367C_PORT0_EEECFG_EEE_RX_LPI_OFFSET    3
-+#define    RTL8367C_PORT0_EEECFG_EEE_RX_LPI_MASK    0x8
-+#define    RTL8367C_PORT0_EEECFG_EEE_PAUSE_INDICATOR_OFFSET    2
-+#define    RTL8367C_PORT0_EEECFG_EEE_PAUSE_INDICATOR_MASK    0x4
-+#define    RTL8367C_PORT0_EEECFG_EEE_WAKE_REQ_OFFSET    1
-+#define    RTL8367C_PORT0_EEECFG_EEE_WAKE_REQ_MASK    0x2
-+#define    RTL8367C_PORT0_EEECFG_EEE_SLEEP_REQ_OFFSET    0
-+#define    RTL8367C_PORT0_EEECFG_EEE_SLEEP_REQ_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT0_EEETXMTR    0x0019
-+
-+#define    RTL8367C_REG_PORT0_EEERXMTR    0x001a
-+
-+#define    RTL8367C_REG_PORT0_EEEPTXMTR    0x001b
-+
-+#define    RTL8367C_REG_PORT0_EEEPRXMTR    0x001c
-+
-+#define    RTL8367C_REG_PTP_PORT0_CFG1    0x001e
-+#define    RTL8367C_PTP_PORT0_CFG1_OFFSET    7
-+#define    RTL8367C_PTP_PORT0_CFG1_MASK    0xFF
-+
-+#define    RTL8367C_REG_P0_MSIC1    0x001f
-+#define    RTL8367C_P0_MSIC1_OFFSET    0
-+#define    RTL8367C_P0_MSIC1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT1_CGST_HALF_CFG    0x0020
-+#define    RTL8367C_PORT1_CGST_HALF_CFG_CONGESTION_TIME_OFFSET    4
-+#define    RTL8367C_PORT1_CGST_HALF_CFG_CONGESTION_TIME_MASK    0xF0
-+#define    RTL8367C_PORT1_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT1_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT1_CTRL    0x0021
-+#define    RTL8367C_PKTGEN_PORT1_CTRL_STATUS_OFFSET    15
-+#define    RTL8367C_PKTGEN_PORT1_CTRL_STATUS_MASK    0x8000
-+#define    RTL8367C_PKTGEN_PORT1_CTRL_PKTGEN_STS_OFFSET    13
-+#define    RTL8367C_PKTGEN_PORT1_CTRL_PKTGEN_STS_MASK    0x2000
-+#define    RTL8367C_PKTGEN_PORT1_CTRL_CRC_NO_ERROR_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT1_CTRL_CRC_NO_ERROR_MASK    0x10
-+#define    RTL8367C_PKTGEN_PORT1_CTRL_CMD_START_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT1_CTRL_CMD_START_MASK    0x1
-+
-+#define    RTL8367C_REG_TX_ERR_CNT_PORT1    0x0022
-+#define    RTL8367C_TX_ERR_CNT_PORT1_OFFSET    0
-+#define    RTL8367C_TX_ERR_CNT_PORT1_MASK    0x7
-+
-+#define    RTL8367C_REG_PKTGEN_PORT1_DA0    0x0023
-+
-+#define    RTL8367C_REG_PKTGEN_PORT1_DA1    0x0024
-+
-+#define    RTL8367C_REG_PKTGEN_PORT1_DA2    0x0025
-+
-+#define    RTL8367C_REG_PKTGEN_PORT1_SA0    0x0026
-+
-+#define    RTL8367C_REG_PKTGEN_PORT1_SA1    0x0027
-+
-+#define    RTL8367C_REG_PKTGEN_PORT1_SA2    0x0028
-+
-+#define    RTL8367C_REG_PKTGEN_PORT1_COUNTER0    0x0029
-+
-+#define    RTL8367C_REG_PKTGEN_PORT1_COUNTER1    0x002a
-+#define    RTL8367C_PKTGEN_PORT1_COUNTER1_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT1_COUNTER1_MASK    0xFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT1_TX_LENGTH    0x002b
-+#define    RTL8367C_PKTGEN_PORT1_TX_LENGTH_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT1_TX_LENGTH_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT1_TIMER    0x002d
-+#define    RTL8367C_PKTGEN_PORT1_TIMER_TIMER_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT1_TIMER_TIMER_MASK    0xF0
-+#define    RTL8367C_PKTGEN_PORT1_TIMER_RX_DMA_ERR_FLAG_OFFSET    3
-+#define    RTL8367C_PKTGEN_PORT1_TIMER_RX_DMA_ERR_FLAG_MASK    0x8
-+
-+#define    RTL8367C_REG_PORT1_MISC_CFG    0x002e
-+#define    RTL8367C_PORT1_MISC_CFG_SMALL_TAG_IPG_OFFSET    15
-+#define    RTL8367C_PORT1_MISC_CFG_SMALL_TAG_IPG_MASK    0x8000
-+#define    RTL8367C_PORT1_MISC_CFG_TX_ITFSP_MODE_OFFSET    14
-+#define    RTL8367C_PORT1_MISC_CFG_TX_ITFSP_MODE_MASK    0x4000
-+#define    RTL8367C_PORT1_MISC_CFG_FLOWCTRL_INDEP_OFFSET    13
-+#define    RTL8367C_PORT1_MISC_CFG_FLOWCTRL_INDEP_MASK    0x2000
-+#define    RTL8367C_PORT1_MISC_CFG_DOT1Q_REMARK_ENABLE_OFFSET    12
-+#define    RTL8367C_PORT1_MISC_CFG_DOT1Q_REMARK_ENABLE_MASK    0x1000
-+#define    RTL8367C_PORT1_MISC_CFG_INGRESSBW_FLOWCTRL_OFFSET    11
-+#define    RTL8367C_PORT1_MISC_CFG_INGRESSBW_FLOWCTRL_MASK    0x800
-+#define    RTL8367C_PORT1_MISC_CFG_INGRESSBW_IFG_OFFSET    10
-+#define    RTL8367C_PORT1_MISC_CFG_INGRESSBW_IFG_MASK    0x400
-+#define    RTL8367C_PORT1_MISC_CFG_RX_SPC_OFFSET    9
-+#define    RTL8367C_PORT1_MISC_CFG_RX_SPC_MASK    0x200
-+#define    RTL8367C_PORT1_MISC_CFG_CRC_SKIP_OFFSET    8
-+#define    RTL8367C_PORT1_MISC_CFG_CRC_SKIP_MASK    0x100
-+#define    RTL8367C_PORT1_MISC_CFG_PKTGEN_TX_FIRST_OFFSET    7
-+#define    RTL8367C_PORT1_MISC_CFG_PKTGEN_TX_FIRST_MASK    0x80
-+#define    RTL8367C_PORT1_MISC_CFG_MAC_LOOPBACK_OFFSET    6
-+#define    RTL8367C_PORT1_MISC_CFG_MAC_LOOPBACK_MASK    0x40
-+#define    RTL8367C_PORT1_MISC_CFG_VLAN_EGRESS_MODE_OFFSET    4
-+#define    RTL8367C_PORT1_MISC_CFG_VLAN_EGRESS_MODE_MASK    0x30
-+#define    RTL8367C_PORT1_MISC_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT1_MISC_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT1_RATE_CTRL0    0x002f
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT1_RATE_CTRL1    0x0030
-+#define    RTL8367C_INGRESSBW_PORT1_RATE_CTRL1_DUMMY_OFFSET    3
-+#define    RTL8367C_INGRESSBW_PORT1_RATE_CTRL1_DUMMY_MASK    0xFFF8
-+#define    RTL8367C_INGRESSBW_PORT1_RATE_CTRL1_INGRESSBW_RATE16_OFFSET    0
-+#define    RTL8367C_INGRESSBW_PORT1_RATE_CTRL1_INGRESSBW_RATE16_MASK    0x7
-+
-+#define    RTL8367C_REG_PORT1_FORCE_RATE0    0x0031
-+
-+#define    RTL8367C_REG_PORT1_FORCE_RATE1    0x0032
-+
-+#define    RTL8367C_REG_PORT1_CURENT_RATE0    0x0033
-+
-+#define    RTL8367C_REG_PORT1_CURENT_RATE1    0x0034
-+
-+#define    RTL8367C_REG_PORT1_PAGE_COUNTER    0x0035
-+#define    RTL8367C_PORT1_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_PORT1_PAGE_COUNTER_MASK    0x7F
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT1_CTRL0    0x0036
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT1_CTRL1    0x0037
-+
-+#define    RTL8367C_REG_PORT1_EEECFG    0x0038
-+#define    RTL8367C_PORT1_EEECFG_EEEP_ENABLE_TX_OFFSET    14
-+#define    RTL8367C_PORT1_EEECFG_EEEP_ENABLE_TX_MASK    0x4000
-+#define    RTL8367C_PORT1_EEECFG_EEEP_ENABLE_RX_OFFSET    13
-+#define    RTL8367C_PORT1_EEECFG_EEEP_ENABLE_RX_MASK    0x2000
-+#define    RTL8367C_PORT1_EEECFG_EEE_FORCE_OFFSET    12
-+#define    RTL8367C_PORT1_EEECFG_EEE_FORCE_MASK    0x1000
-+#define    RTL8367C_PORT1_EEECFG_EEE_100M_OFFSET    11
-+#define    RTL8367C_PORT1_EEECFG_EEE_100M_MASK    0x800
-+#define    RTL8367C_PORT1_EEECFG_EEE_GIGA_500M_OFFSET    10
-+#define    RTL8367C_PORT1_EEECFG_EEE_GIGA_500M_MASK    0x400
-+#define    RTL8367C_PORT1_EEECFG_EEE_TX_OFFSET    9
-+#define    RTL8367C_PORT1_EEECFG_EEE_TX_MASK    0x200
-+#define    RTL8367C_PORT1_EEECFG_EEE_RX_OFFSET    8
-+#define    RTL8367C_PORT1_EEECFG_EEE_RX_MASK    0x100
-+#define    RTL8367C_PORT1_EEECFG_EEE_DSP_RX_OFFSET    6
-+#define    RTL8367C_PORT1_EEECFG_EEE_DSP_RX_MASK    0x40
-+#define    RTL8367C_PORT1_EEECFG_EEE_LPI_OFFSET    5
-+#define    RTL8367C_PORT1_EEECFG_EEE_LPI_MASK    0x20
-+#define    RTL8367C_PORT1_EEECFG_EEE_TX_LPI_OFFSET    4
-+#define    RTL8367C_PORT1_EEECFG_EEE_TX_LPI_MASK    0x10
-+#define    RTL8367C_PORT1_EEECFG_EEE_RX_LPI_OFFSET    3
-+#define    RTL8367C_PORT1_EEECFG_EEE_RX_LPI_MASK    0x8
-+#define    RTL8367C_PORT1_EEECFG_EEE_PAUSE_INDICATOR_OFFSET    2
-+#define    RTL8367C_PORT1_EEECFG_EEE_PAUSE_INDICATOR_MASK    0x4
-+#define    RTL8367C_PORT1_EEECFG_EEE_WAKE_REQ_OFFSET    1
-+#define    RTL8367C_PORT1_EEECFG_EEE_WAKE_REQ_MASK    0x2
-+#define    RTL8367C_PORT1_EEECFG_EEE_SLEEP_REQ_OFFSET    0
-+#define    RTL8367C_PORT1_EEECFG_EEE_SLEEP_REQ_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT1_EEETXMTR    0x0039
-+
-+#define    RTL8367C_REG_PORT1_EEERXMTR    0x003a
-+
-+#define    RTL8367C_REG_PORT1_EEEPTXMTR    0x003b
-+
-+#define    RTL8367C_REG_PORT1_EEEPRXMTR    0x003c
-+
-+#define    RTL8367C_REG_PTP_PORT1_CFG1    0x003e
-+#define    RTL8367C_PTP_PORT1_CFG1_OFFSET    7
-+#define    RTL8367C_PTP_PORT1_CFG1_MASK    0xFF
-+
-+#define    RTL8367C_REG_P1_MSIC1    0x003f
-+#define    RTL8367C_P1_MSIC1_OFFSET    0
-+#define    RTL8367C_P1_MSIC1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT2_CGST_HALF_CFG    0x0040
-+#define    RTL8367C_PORT2_CGST_HALF_CFG_CONGESTION_TIME_OFFSET    4
-+#define    RTL8367C_PORT2_CGST_HALF_CFG_CONGESTION_TIME_MASK    0xF0
-+#define    RTL8367C_PORT2_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT2_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT2_CTRL    0x0041
-+#define    RTL8367C_PKTGEN_PORT2_CTRL_STATUS_OFFSET    15
-+#define    RTL8367C_PKTGEN_PORT2_CTRL_STATUS_MASK    0x8000
-+#define    RTL8367C_PKTGEN_PORT2_CTRL_PKTGEN_STS_OFFSET    13
-+#define    RTL8367C_PKTGEN_PORT2_CTRL_PKTGEN_STS_MASK    0x2000
-+#define    RTL8367C_PKTGEN_PORT2_CTRL_CRC_NO_ERROR_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT2_CTRL_CRC_NO_ERROR_MASK    0x10
-+#define    RTL8367C_PKTGEN_PORT2_CTRL_CMD_START_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT2_CTRL_CMD_START_MASK    0x1
-+
-+#define    RTL8367C_REG_TX_ERR_CNT_PORT2    0x0042
-+#define    RTL8367C_TX_ERR_CNT_PORT2_OFFSET    0
-+#define    RTL8367C_TX_ERR_CNT_PORT2_MASK    0x7
-+
-+#define    RTL8367C_REG_PKTGEN_PORT2_DA0    0x0043
-+
-+#define    RTL8367C_REG_PKTGEN_PORT2_DA1    0x0044
-+
-+#define    RTL8367C_REG_PKTGEN_PORT2_DA2    0x0045
-+
-+#define    RTL8367C_REG_PKTGEN_PORT2_SA0    0x0046
-+
-+#define    RTL8367C_REG_PKTGEN_PORT2_SA1    0x0047
-+
-+#define    RTL8367C_REG_PKTGEN_PORT2_SA2    0x0048
-+
-+#define    RTL8367C_REG_PKTGEN_PORT2_COUNTER0    0x0049
-+
-+#define    RTL8367C_REG_PKTGEN_PORT2_COUNTER1    0x004a
-+#define    RTL8367C_PKTGEN_PORT2_COUNTER1_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT2_COUNTER1_MASK    0xFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT2_TX_LENGTH    0x004b
-+#define    RTL8367C_PKTGEN_PORT2_TX_LENGTH_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT2_TX_LENGTH_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT2_TIMER    0x004d
-+#define    RTL8367C_PKTGEN_PORT2_TIMER_TIMER_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT2_TIMER_TIMER_MASK    0xF0
-+#define    RTL8367C_PKTGEN_PORT2_TIMER_RX_DMA_ERR_FLAG_OFFSET    3
-+#define    RTL8367C_PKTGEN_PORT2_TIMER_RX_DMA_ERR_FLAG_MASK    0x8
-+
-+#define    RTL8367C_REG_PORT2_MISC_CFG    0x004e
-+#define    RTL8367C_PORT2_MISC_CFG_SMALL_TAG_IPG_OFFSET    15
-+#define    RTL8367C_PORT2_MISC_CFG_SMALL_TAG_IPG_MASK    0x8000
-+#define    RTL8367C_PORT2_MISC_CFG_TX_ITFSP_MODE_OFFSET    14
-+#define    RTL8367C_PORT2_MISC_CFG_TX_ITFSP_MODE_MASK    0x4000
-+#define    RTL8367C_PORT2_MISC_CFG_FLOWCTRL_INDEP_OFFSET    13
-+#define    RTL8367C_PORT2_MISC_CFG_FLOWCTRL_INDEP_MASK    0x2000
-+#define    RTL8367C_PORT2_MISC_CFG_DOT1Q_REMARK_ENABLE_OFFSET    12
-+#define    RTL8367C_PORT2_MISC_CFG_DOT1Q_REMARK_ENABLE_MASK    0x1000
-+#define    RTL8367C_PORT2_MISC_CFG_INGRESSBW_FLOWCTRL_OFFSET    11
-+#define    RTL8367C_PORT2_MISC_CFG_INGRESSBW_FLOWCTRL_MASK    0x800
-+#define    RTL8367C_PORT2_MISC_CFG_INGRESSBW_IFG_OFFSET    10
-+#define    RTL8367C_PORT2_MISC_CFG_INGRESSBW_IFG_MASK    0x400
-+#define    RTL8367C_PORT2_MISC_CFG_RX_SPC_OFFSET    9
-+#define    RTL8367C_PORT2_MISC_CFG_RX_SPC_MASK    0x200
-+#define    RTL8367C_PORT2_MISC_CFG_CRC_SKIP_OFFSET    8
-+#define    RTL8367C_PORT2_MISC_CFG_CRC_SKIP_MASK    0x100
-+#define    RTL8367C_PORT2_MISC_CFG_PKTGEN_TX_FIRST_OFFSET    7
-+#define    RTL8367C_PORT2_MISC_CFG_PKTGEN_TX_FIRST_MASK    0x80
-+#define    RTL8367C_PORT2_MISC_CFG_MAC_LOOPBACK_OFFSET    6
-+#define    RTL8367C_PORT2_MISC_CFG_MAC_LOOPBACK_MASK    0x40
-+#define    RTL8367C_PORT2_MISC_CFG_VLAN_EGRESS_MODE_OFFSET    4
-+#define    RTL8367C_PORT2_MISC_CFG_VLAN_EGRESS_MODE_MASK    0x30
-+#define    RTL8367C_PORT2_MISC_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT2_MISC_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT2_RATE_CTRL0    0x004f
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT2_RATE_CTRL1    0x0050
-+#define    RTL8367C_INGRESSBW_PORT2_RATE_CTRL1_DUMMY_OFFSET    3
-+#define    RTL8367C_INGRESSBW_PORT2_RATE_CTRL1_DUMMY_MASK    0xFFF8
-+#define    RTL8367C_INGRESSBW_PORT2_RATE_CTRL1_INGRESSBW_RATE16_OFFSET    0
-+#define    RTL8367C_INGRESSBW_PORT2_RATE_CTRL1_INGRESSBW_RATE16_MASK    0x7
-+
-+#define    RTL8367C_REG_PORT2_FORCE_RATE0    0x0051
-+
-+#define    RTL8367C_REG_PORT2_FORCE_RATE1    0x0052
-+
-+#define    RTL8367C_REG_PORT2_CURENT_RATE0    0x0053
-+
-+#define    RTL8367C_REG_PORT2_CURENT_RATE1    0x0054
-+
-+#define    RTL8367C_REG_PORT2_PAGE_COUNTER    0x0055
-+#define    RTL8367C_PORT2_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_PORT2_PAGE_COUNTER_MASK    0x7F
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT2_CTRL0    0x0056
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT2_CTRL1    0x0057
-+
-+#define    RTL8367C_REG_PORT2_EEECFG    0x0058
-+#define    RTL8367C_PORT2_EEECFG_EEEP_ENABLE_TX_OFFSET    14
-+#define    RTL8367C_PORT2_EEECFG_EEEP_ENABLE_TX_MASK    0x4000
-+#define    RTL8367C_PORT2_EEECFG_EEEP_ENABLE_RX_OFFSET    13
-+#define    RTL8367C_PORT2_EEECFG_EEEP_ENABLE_RX_MASK    0x2000
-+#define    RTL8367C_PORT2_EEECFG_EEE_FORCE_OFFSET    12
-+#define    RTL8367C_PORT2_EEECFG_EEE_FORCE_MASK    0x1000
-+#define    RTL8367C_PORT2_EEECFG_EEE_100M_OFFSET    11
-+#define    RTL8367C_PORT2_EEECFG_EEE_100M_MASK    0x800
-+#define    RTL8367C_PORT2_EEECFG_EEE_GIGA_500M_OFFSET    10
-+#define    RTL8367C_PORT2_EEECFG_EEE_GIGA_500M_MASK    0x400
-+#define    RTL8367C_PORT2_EEECFG_EEE_TX_OFFSET    9
-+#define    RTL8367C_PORT2_EEECFG_EEE_TX_MASK    0x200
-+#define    RTL8367C_PORT2_EEECFG_EEE_RX_OFFSET    8
-+#define    RTL8367C_PORT2_EEECFG_EEE_RX_MASK    0x100
-+#define    RTL8367C_PORT2_EEECFG_EEE_DSP_RX_OFFSET    6
-+#define    RTL8367C_PORT2_EEECFG_EEE_DSP_RX_MASK    0x40
-+#define    RTL8367C_PORT2_EEECFG_EEE_LPI_OFFSET    5
-+#define    RTL8367C_PORT2_EEECFG_EEE_LPI_MASK    0x20
-+#define    RTL8367C_PORT2_EEECFG_EEE_TX_LPI_OFFSET    4
-+#define    RTL8367C_PORT2_EEECFG_EEE_TX_LPI_MASK    0x10
-+#define    RTL8367C_PORT2_EEECFG_EEE_RX_LPI_OFFSET    3
-+#define    RTL8367C_PORT2_EEECFG_EEE_RX_LPI_MASK    0x8
-+#define    RTL8367C_PORT2_EEECFG_EEE_PAUSE_INDICATOR_OFFSET    2
-+#define    RTL8367C_PORT2_EEECFG_EEE_PAUSE_INDICATOR_MASK    0x4
-+#define    RTL8367C_PORT2_EEECFG_EEE_WAKE_REQ_OFFSET    1
-+#define    RTL8367C_PORT2_EEECFG_EEE_WAKE_REQ_MASK    0x2
-+#define    RTL8367C_PORT2_EEECFG_EEE_SLEEP_REQ_OFFSET    0
-+#define    RTL8367C_PORT2_EEECFG_EEE_SLEEP_REQ_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT2_EEETXMTR    0x0059
-+
-+#define    RTL8367C_REG_PORT2_EEERXMTR    0x005a
-+
-+#define    RTL8367C_REG_PORT2_EEEPTXMTR    0x005b
-+
-+#define    RTL8367C_REG_PORT2_EEEPRXMTR    0x005c
-+
-+#define    RTL8367C_REG_PTP_PORT2_CFG1    0x005e
-+#define    RTL8367C_PTP_PORT2_CFG1_OFFSET    7
-+#define    RTL8367C_PTP_PORT2_CFG1_MASK    0xFF
-+
-+#define    RTL8367C_REG_P2_MSIC1    0x005f
-+#define    RTL8367C_P2_MSIC1_OFFSET    0
-+#define    RTL8367C_P2_MSIC1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT3_CGST_HALF_CFG    0x0060
-+#define    RTL8367C_PORT3_CGST_HALF_CFG_CONGESTION_TIME_OFFSET    4
-+#define    RTL8367C_PORT3_CGST_HALF_CFG_CONGESTION_TIME_MASK    0xF0
-+#define    RTL8367C_PORT3_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT3_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT3_CTRL    0x0061
-+#define    RTL8367C_PKTGEN_PORT3_CTRL_STATUS_OFFSET    15
-+#define    RTL8367C_PKTGEN_PORT3_CTRL_STATUS_MASK    0x8000
-+#define    RTL8367C_PKTGEN_PORT3_CTRL_PKTGEN_STS_OFFSET    13
-+#define    RTL8367C_PKTGEN_PORT3_CTRL_PKTGEN_STS_MASK    0x2000
-+#define    RTL8367C_PKTGEN_PORT3_CTRL_CRC_NO_ERROR_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT3_CTRL_CRC_NO_ERROR_MASK    0x10
-+#define    RTL8367C_PKTGEN_PORT3_CTRL_CMD_START_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT3_CTRL_CMD_START_MASK    0x1
-+
-+#define    RTL8367C_REG_TX_ERR_CNT_PORT3    0x0062
-+#define    RTL8367C_TX_ERR_CNT_PORT3_OFFSET    0
-+#define    RTL8367C_TX_ERR_CNT_PORT3_MASK    0x7
-+
-+#define    RTL8367C_REG_PKTGEN_PORT3_DA0    0x0063
-+
-+#define    RTL8367C_REG_PKTGEN_PORT3_DA1    0x0064
-+
-+#define    RTL8367C_REG_PKTGEN_PORT3_DA2    0x0065
-+
-+#define    RTL8367C_REG_PKTGEN_PORT3_SA0    0x0066
-+
-+#define    RTL8367C_REG_PKTGEN_PORT3_SA1    0x0067
-+
-+#define    RTL8367C_REG_PKTGEN_PORT3_SA2    0x0068
-+
-+#define    RTL8367C_REG_PKTGEN_PORT3_COUNTER0    0x0069
-+
-+#define    RTL8367C_REG_PKTGEN_PORT3_COUNTER1    0x006a
-+#define    RTL8367C_PKTGEN_PORT3_COUNTER1_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT3_COUNTER1_MASK    0xFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT3_TX_LENGTH    0x006b
-+#define    RTL8367C_PKTGEN_PORT3_TX_LENGTH_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT3_TX_LENGTH_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT3_TIMER    0x006d
-+#define    RTL8367C_PKTGEN_PORT3_TIMER_TIMER_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT3_TIMER_TIMER_MASK    0xF0
-+#define    RTL8367C_PKTGEN_PORT3_TIMER_RX_DMA_ERR_FLAG_OFFSET    3
-+#define    RTL8367C_PKTGEN_PORT3_TIMER_RX_DMA_ERR_FLAG_MASK    0x8
-+
-+#define    RTL8367C_REG_PORT3_MISC_CFG    0x006e
-+#define    RTL8367C_PORT3_MISC_CFG_SMALL_TAG_IPG_OFFSET    15
-+#define    RTL8367C_PORT3_MISC_CFG_SMALL_TAG_IPG_MASK    0x8000
-+#define    RTL8367C_PORT3_MISC_CFG_TX_ITFSP_MODE_OFFSET    14
-+#define    RTL8367C_PORT3_MISC_CFG_TX_ITFSP_MODE_MASK    0x4000
-+#define    RTL8367C_PORT3_MISC_CFG_FLOWCTRL_INDEP_OFFSET    13
-+#define    RTL8367C_PORT3_MISC_CFG_FLOWCTRL_INDEP_MASK    0x2000
-+#define    RTL8367C_PORT3_MISC_CFG_DOT1Q_REMARK_ENABLE_OFFSET    12
-+#define    RTL8367C_PORT3_MISC_CFG_DOT1Q_REMARK_ENABLE_MASK    0x1000
-+#define    RTL8367C_PORT3_MISC_CFG_INGRESSBW_FLOWCTRL_OFFSET    11
-+#define    RTL8367C_PORT3_MISC_CFG_INGRESSBW_FLOWCTRL_MASK    0x800
-+#define    RTL8367C_PORT3_MISC_CFG_INGRESSBW_IFG_OFFSET    10
-+#define    RTL8367C_PORT3_MISC_CFG_INGRESSBW_IFG_MASK    0x400
-+#define    RTL8367C_PORT3_MISC_CFG_RX_SPC_OFFSET    9
-+#define    RTL8367C_PORT3_MISC_CFG_RX_SPC_MASK    0x200
-+#define    RTL8367C_PORT3_MISC_CFG_CRC_SKIP_OFFSET    8
-+#define    RTL8367C_PORT3_MISC_CFG_CRC_SKIP_MASK    0x100
-+#define    RTL8367C_PORT3_MISC_CFG_PKTGEN_TX_FIRST_OFFSET    7
-+#define    RTL8367C_PORT3_MISC_CFG_PKTGEN_TX_FIRST_MASK    0x80
-+#define    RTL8367C_PORT3_MISC_CFG_MAC_LOOPBACK_OFFSET    6
-+#define    RTL8367C_PORT3_MISC_CFG_MAC_LOOPBACK_MASK    0x40
-+#define    RTL8367C_PORT3_MISC_CFG_VLAN_EGRESS_MODE_OFFSET    4
-+#define    RTL8367C_PORT3_MISC_CFG_VLAN_EGRESS_MODE_MASK    0x30
-+#define    RTL8367C_PORT3_MISC_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT3_MISC_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT3_RATE_CTRL0    0x006f
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT3_RATE_CTRL1    0x0070
-+#define    RTL8367C_INGRESSBW_PORT3_RATE_CTRL1_DUMMY_OFFSET    3
-+#define    RTL8367C_INGRESSBW_PORT3_RATE_CTRL1_DUMMY_MASK    0xFFF8
-+#define    RTL8367C_INGRESSBW_PORT3_RATE_CTRL1_INGRESSBW_RATE16_OFFSET    0
-+#define    RTL8367C_INGRESSBW_PORT3_RATE_CTRL1_INGRESSBW_RATE16_MASK    0x7
-+
-+#define    RTL8367C_REG_PORT3_FORCE_RATE0    0x0071
-+
-+#define    RTL8367C_REG_PORT3_FORCE_RATE1    0x0072
-+
-+#define    RTL8367C_REG_PORT3_CURENT_RATE0    0x0073
-+
-+#define    RTL8367C_REG_PORT3_CURENT_RATE1    0x0074
-+
-+#define    RTL8367C_REG_PORT3_PAGE_COUNTER    0x0075
-+#define    RTL8367C_PORT3_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_PORT3_PAGE_COUNTER_MASK    0x7F
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT3_CTRL0    0x0076
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT3_CTRL1    0x0077
-+
-+#define    RTL8367C_REG_PORT3_EEECFG    0x0078
-+#define    RTL8367C_PORT3_EEECFG_EEEP_ENABLE_TX_OFFSET    14
-+#define    RTL8367C_PORT3_EEECFG_EEEP_ENABLE_TX_MASK    0x4000
-+#define    RTL8367C_PORT3_EEECFG_EEEP_ENABLE_RX_OFFSET    13
-+#define    RTL8367C_PORT3_EEECFG_EEEP_ENABLE_RX_MASK    0x2000
-+#define    RTL8367C_PORT3_EEECFG_EEE_FORCE_OFFSET    12
-+#define    RTL8367C_PORT3_EEECFG_EEE_FORCE_MASK    0x1000
-+#define    RTL8367C_PORT3_EEECFG_EEE_100M_OFFSET    11
-+#define    RTL8367C_PORT3_EEECFG_EEE_100M_MASK    0x800
-+#define    RTL8367C_PORT3_EEECFG_EEE_GIGA_500M_OFFSET    10
-+#define    RTL8367C_PORT3_EEECFG_EEE_GIGA_500M_MASK    0x400
-+#define    RTL8367C_PORT3_EEECFG_EEE_TX_OFFSET    9
-+#define    RTL8367C_PORT3_EEECFG_EEE_TX_MASK    0x200
-+#define    RTL8367C_PORT3_EEECFG_EEE_RX_OFFSET    8
-+#define    RTL8367C_PORT3_EEECFG_EEE_RX_MASK    0x100
-+#define    RTL8367C_PORT3_EEECFG_EEE_DSP_RX_OFFSET    6
-+#define    RTL8367C_PORT3_EEECFG_EEE_DSP_RX_MASK    0x40
-+#define    RTL8367C_PORT3_EEECFG_EEE_LPI_OFFSET    5
-+#define    RTL8367C_PORT3_EEECFG_EEE_LPI_MASK    0x20
-+#define    RTL8367C_PORT3_EEECFG_EEE_TX_LPI_OFFSET    4
-+#define    RTL8367C_PORT3_EEECFG_EEE_TX_LPI_MASK    0x10
-+#define    RTL8367C_PORT3_EEECFG_EEE_RX_LPI_OFFSET    3
-+#define    RTL8367C_PORT3_EEECFG_EEE_RX_LPI_MASK    0x8
-+#define    RTL8367C_PORT3_EEECFG_EEE_PAUSE_INDICATOR_OFFSET    2
-+#define    RTL8367C_PORT3_EEECFG_EEE_PAUSE_INDICATOR_MASK    0x4
-+#define    RTL8367C_PORT3_EEECFG_EEE_WAKE_REQ_OFFSET    1
-+#define    RTL8367C_PORT3_EEECFG_EEE_WAKE_REQ_MASK    0x2
-+#define    RTL8367C_PORT3_EEECFG_EEE_SLEEP_REQ_OFFSET    0
-+#define    RTL8367C_PORT3_EEECFG_EEE_SLEEP_REQ_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT3_EEETXMTR    0x0079
-+
-+#define    RTL8367C_REG_PORT3_EEERXMTR    0x007a
-+
-+#define    RTL8367C_REG_PORT3_EEEPTXMTR    0x007b
-+
-+#define    RTL8367C_REG_PORT3_EEEPRXMTR    0x007c
-+
-+#define    RTL8367C_REG_PTP_PORT3_CFG1    0x007e
-+#define    RTL8367C_PTP_PORT3_CFG1_OFFSET    7
-+#define    RTL8367C_PTP_PORT3_CFG1_MASK    0xFF
-+
-+#define    RTL8367C_REG_P3_MSIC1    0x007f
-+#define    RTL8367C_P3_MSIC1_OFFSET    0
-+#define    RTL8367C_P3_MSIC1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT4_CGST_HALF_CFG    0x0080
-+#define    RTL8367C_PORT4_CGST_HALF_CFG_CONGESTION_TIME_OFFSET    4
-+#define    RTL8367C_PORT4_CGST_HALF_CFG_CONGESTION_TIME_MASK    0xF0
-+#define    RTL8367C_PORT4_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT4_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT4_CTRL    0x0081
-+#define    RTL8367C_PKTGEN_PORT4_CTRL_STATUS_OFFSET    15
-+#define    RTL8367C_PKTGEN_PORT4_CTRL_STATUS_MASK    0x8000
-+#define    RTL8367C_PKTGEN_PORT4_CTRL_PKTGEN_STS_OFFSET    13
-+#define    RTL8367C_PKTGEN_PORT4_CTRL_PKTGEN_STS_MASK    0x2000
-+#define    RTL8367C_PKTGEN_PORT4_CTRL_CRC_NO_ERROR_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT4_CTRL_CRC_NO_ERROR_MASK    0x10
-+#define    RTL8367C_PKTGEN_PORT4_CTRL_CMD_START_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT4_CTRL_CMD_START_MASK    0x1
-+
-+#define    RTL8367C_REG_TX_ERR_CNT_PORT4    0x0082
-+#define    RTL8367C_TX_ERR_CNT_PORT4_OFFSET    0
-+#define    RTL8367C_TX_ERR_CNT_PORT4_MASK    0x7
-+
-+#define    RTL8367C_REG_PKTGEN_PORT4_DA0    0x0083
-+
-+#define    RTL8367C_REG_PKTGEN_PORT4_DA1    0x0084
-+
-+#define    RTL8367C_REG_PKTGEN_PORT4_DA2    0x0085
-+
-+#define    RTL8367C_REG_PKTGEN_PORT4_SA0    0x0086
-+
-+#define    RTL8367C_REG_PKTGEN_PORT4_SA1    0x0087
-+
-+#define    RTL8367C_REG_PKTGEN_PORT4_SA2    0x0088
-+
-+#define    RTL8367C_REG_PKTGEN_PORT4_COUNTER0    0x0089
-+
-+#define    RTL8367C_REG_PKTGEN_PORT4_COUNTER1    0x008a
-+#define    RTL8367C_PKTGEN_PORT4_COUNTER1_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT4_COUNTER1_MASK    0xFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT4_TX_LENGTH    0x008b
-+#define    RTL8367C_PKTGEN_PORT4_TX_LENGTH_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT4_TX_LENGTH_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT4_TIMER    0x008d
-+#define    RTL8367C_PKTGEN_PORT4_TIMER_TIMER_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT4_TIMER_TIMER_MASK    0xF0
-+#define    RTL8367C_PKTGEN_PORT4_TIMER_RX_DMA_ERR_FLAG_OFFSET    3
-+#define    RTL8367C_PKTGEN_PORT4_TIMER_RX_DMA_ERR_FLAG_MASK    0x8
-+
-+#define    RTL8367C_REG_PORT4_MISC_CFG    0x008e
-+#define    RTL8367C_PORT4_MISC_CFG_SMALL_TAG_IPG_OFFSET    15
-+#define    RTL8367C_PORT4_MISC_CFG_SMALL_TAG_IPG_MASK    0x8000
-+#define    RTL8367C_PORT4_MISC_CFG_TX_ITFSP_MODE_OFFSET    14
-+#define    RTL8367C_PORT4_MISC_CFG_TX_ITFSP_MODE_MASK    0x4000
-+#define    RTL8367C_PORT4_MISC_CFG_FLOWCTRL_INDEP_OFFSET    13
-+#define    RTL8367C_PORT4_MISC_CFG_FLOWCTRL_INDEP_MASK    0x2000
-+#define    RTL8367C_PORT4_MISC_CFG_DOT1Q_REMARK_ENABLE_OFFSET    12
-+#define    RTL8367C_PORT4_MISC_CFG_DOT1Q_REMARK_ENABLE_MASK    0x1000
-+#define    RTL8367C_PORT4_MISC_CFG_INGRESSBW_FLOWCTRL_OFFSET    11
-+#define    RTL8367C_PORT4_MISC_CFG_INGRESSBW_FLOWCTRL_MASK    0x800
-+#define    RTL8367C_PORT4_MISC_CFG_INGRESSBW_IFG_OFFSET    10
-+#define    RTL8367C_PORT4_MISC_CFG_INGRESSBW_IFG_MASK    0x400
-+#define    RTL8367C_PORT4_MISC_CFG_RX_SPC_OFFSET    9
-+#define    RTL8367C_PORT4_MISC_CFG_RX_SPC_MASK    0x200
-+#define    RTL8367C_PORT4_MISC_CFG_CRC_SKIP_OFFSET    8
-+#define    RTL8367C_PORT4_MISC_CFG_CRC_SKIP_MASK    0x100
-+#define    RTL8367C_PORT4_MISC_CFG_PKTGEN_TX_FIRST_OFFSET    7
-+#define    RTL8367C_PORT4_MISC_CFG_PKTGEN_TX_FIRST_MASK    0x80
-+#define    RTL8367C_PORT4_MISC_CFG_MAC_LOOPBACK_OFFSET    6
-+#define    RTL8367C_PORT4_MISC_CFG_MAC_LOOPBACK_MASK    0x40
-+#define    RTL8367C_PORT4_MISC_CFG_VLAN_EGRESS_MODE_OFFSET    4
-+#define    RTL8367C_PORT4_MISC_CFG_VLAN_EGRESS_MODE_MASK    0x30
-+#define    RTL8367C_PORT4_MISC_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT4_MISC_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT4_RATE_CTRL0    0x008f
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT4_RATE_CTRL1    0x0090
-+#define    RTL8367C_INGRESSBW_PORT4_RATE_CTRL1_DUMMY_OFFSET    3
-+#define    RTL8367C_INGRESSBW_PORT4_RATE_CTRL1_DUMMY_MASK    0xFFF8
-+#define    RTL8367C_INGRESSBW_PORT4_RATE_CTRL1_INGRESSBW_RATE16_OFFSET    0
-+#define    RTL8367C_INGRESSBW_PORT4_RATE_CTRL1_INGRESSBW_RATE16_MASK    0x7
-+
-+#define    RTL8367C_REG_PORT4_FORCE_RATE0    0x0091
-+
-+#define    RTL8367C_REG_PORT4_FORCE_RATE1    0x0092
-+
-+#define    RTL8367C_REG_PORT4_CURENT_RATE0    0x0093
-+
-+#define    RTL8367C_REG_PORT4_CURENT_RATE1    0x0094
-+
-+#define    RTL8367C_REG_PORT4_PAGE_COUNTER    0x0095
-+#define    RTL8367C_PORT4_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_PORT4_PAGE_COUNTER_MASK    0x7F
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT4_CTRL0    0x0096
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT4_CTRL1    0x0097
-+
-+#define    RTL8367C_REG_PORT4_EEECFG    0x0098
-+#define    RTL8367C_PORT4_EEECFG_EEEP_ENABLE_TX_OFFSET    14
-+#define    RTL8367C_PORT4_EEECFG_EEEP_ENABLE_TX_MASK    0x4000
-+#define    RTL8367C_PORT4_EEECFG_EEEP_ENABLE_RX_OFFSET    13
-+#define    RTL8367C_PORT4_EEECFG_EEEP_ENABLE_RX_MASK    0x2000
-+#define    RTL8367C_PORT4_EEECFG_EEE_FORCE_OFFSET    12
-+#define    RTL8367C_PORT4_EEECFG_EEE_FORCE_MASK    0x1000
-+#define    RTL8367C_PORT4_EEECFG_EEE_100M_OFFSET    11
-+#define    RTL8367C_PORT4_EEECFG_EEE_100M_MASK    0x800
-+#define    RTL8367C_PORT4_EEECFG_EEE_GIGA_500M_OFFSET    10
-+#define    RTL8367C_PORT4_EEECFG_EEE_GIGA_500M_MASK    0x400
-+#define    RTL8367C_PORT4_EEECFG_EEE_TX_OFFSET    9
-+#define    RTL8367C_PORT4_EEECFG_EEE_TX_MASK    0x200
-+#define    RTL8367C_PORT4_EEECFG_EEE_RX_OFFSET    8
-+#define    RTL8367C_PORT4_EEECFG_EEE_RX_MASK    0x100
-+#define    RTL8367C_PORT4_EEECFG_EEE_DSP_RX_OFFSET    6
-+#define    RTL8367C_PORT4_EEECFG_EEE_DSP_RX_MASK    0x40
-+#define    RTL8367C_PORT4_EEECFG_EEE_LPI_OFFSET    5
-+#define    RTL8367C_PORT4_EEECFG_EEE_LPI_MASK    0x20
-+#define    RTL8367C_PORT4_EEECFG_EEE_TX_LPI_OFFSET    4
-+#define    RTL8367C_PORT4_EEECFG_EEE_TX_LPI_MASK    0x10
-+#define    RTL8367C_PORT4_EEECFG_EEE_RX_LPI_OFFSET    3
-+#define    RTL8367C_PORT4_EEECFG_EEE_RX_LPI_MASK    0x8
-+#define    RTL8367C_PORT4_EEECFG_EEE_PAUSE_INDICATOR_OFFSET    2
-+#define    RTL8367C_PORT4_EEECFG_EEE_PAUSE_INDICATOR_MASK    0x4
-+#define    RTL8367C_PORT4_EEECFG_EEE_WAKE_REQ_OFFSET    1
-+#define    RTL8367C_PORT4_EEECFG_EEE_WAKE_REQ_MASK    0x2
-+#define    RTL8367C_PORT4_EEECFG_EEE_SLEEP_REQ_OFFSET    0
-+#define    RTL8367C_PORT4_EEECFG_EEE_SLEEP_REQ_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT4_EEETXMTR    0x0099
-+
-+#define    RTL8367C_REG_PORT4_EEERXMTR    0x009a
-+
-+#define    RTL8367C_REG_PORT4_EEEPTXMTR    0x009b
-+
-+#define    RTL8367C_REG_PORT4_EEEPRXMTR    0x009c
-+
-+#define    RTL8367C_REG_PTP_PORT4_CFG1    0x009e
-+#define    RTL8367C_PTP_PORT4_CFG1_OFFSET    7
-+#define    RTL8367C_PTP_PORT4_CFG1_MASK    0xFF
-+
-+#define    RTL8367C_REG_P4_MSIC1    0x009f
-+#define    RTL8367C_P4_MSIC1_OFFSET    0
-+#define    RTL8367C_P4_MSIC1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT5_CGST_HALF_CFG    0x00a0
-+#define    RTL8367C_PORT5_CGST_HALF_CFG_CONGESTION_TIME_OFFSET    4
-+#define    RTL8367C_PORT5_CGST_HALF_CFG_CONGESTION_TIME_MASK    0xF0
-+#define    RTL8367C_PORT5_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT5_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT5_CTRL    0x00a1
-+#define    RTL8367C_PKTGEN_PORT5_CTRL_STATUS_OFFSET    15
-+#define    RTL8367C_PKTGEN_PORT5_CTRL_STATUS_MASK    0x8000
-+#define    RTL8367C_PKTGEN_PORT5_CTRL_PKTGEN_STS_OFFSET    13
-+#define    RTL8367C_PKTGEN_PORT5_CTRL_PKTGEN_STS_MASK    0x2000
-+#define    RTL8367C_PKTGEN_PORT5_CTRL_CRC_NO_ERROR_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT5_CTRL_CRC_NO_ERROR_MASK    0x10
-+#define    RTL8367C_PKTGEN_PORT5_CTRL_CMD_START_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT5_CTRL_CMD_START_MASK    0x1
-+
-+#define    RTL8367C_REG_TX_ERR_CNT_PORT5    0x00a2
-+#define    RTL8367C_TX_ERR_CNT_PORT5_OFFSET    0
-+#define    RTL8367C_TX_ERR_CNT_PORT5_MASK    0x7
-+
-+#define    RTL8367C_REG_PKTGEN_PORT5_DA0    0x00a3
-+
-+#define    RTL8367C_REG_PKTGEN_PORT5_DA1    0x00a4
-+
-+#define    RTL8367C_REG_PKTGEN_PORT5_DA2    0x00a5
-+
-+#define    RTL8367C_REG_PKTGEN_PORT5_SA0    0x00a6
-+
-+#define    RTL8367C_REG_PKTGEN_PORT5_SA1    0x00a7
-+
-+#define    RTL8367C_REG_PKTGEN_PORT5_SA2    0x00a8
-+
-+#define    RTL8367C_REG_PKTGEN_PORT5_COUNTER0    0x00a9
-+
-+#define    RTL8367C_REG_PKTGEN_PORT5_COUNTER1    0x00aa
-+#define    RTL8367C_PKTGEN_PORT5_COUNTER1_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT5_COUNTER1_MASK    0xFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT5_TX_LENGTH    0x00ab
-+#define    RTL8367C_PKTGEN_PORT5_TX_LENGTH_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT5_TX_LENGTH_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT5_TIMER    0x00ad
-+#define    RTL8367C_PKTGEN_PORT5_TIMER_TIMER_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT5_TIMER_TIMER_MASK    0xF0
-+#define    RTL8367C_PKTGEN_PORT5_TIMER_RX_DMA_ERR_FLAG_OFFSET    3
-+#define    RTL8367C_PKTGEN_PORT5_TIMER_RX_DMA_ERR_FLAG_MASK    0x8
-+
-+#define    RTL8367C_REG_PORT5_MISC_CFG    0x00ae
-+#define    RTL8367C_PORT5_MISC_CFG_SMALL_TAG_IPG_OFFSET    15
-+#define    RTL8367C_PORT5_MISC_CFG_SMALL_TAG_IPG_MASK    0x8000
-+#define    RTL8367C_PORT5_MISC_CFG_TX_ITFSP_MODE_OFFSET    14
-+#define    RTL8367C_PORT5_MISC_CFG_TX_ITFSP_MODE_MASK    0x4000
-+#define    RTL8367C_PORT5_MISC_CFG_FLOWCTRL_INDEP_OFFSET    13
-+#define    RTL8367C_PORT5_MISC_CFG_FLOWCTRL_INDEP_MASK    0x2000
-+#define    RTL8367C_PORT5_MISC_CFG_DOT1Q_REMARK_ENABLE_OFFSET    12
-+#define    RTL8367C_PORT5_MISC_CFG_DOT1Q_REMARK_ENABLE_MASK    0x1000
-+#define    RTL8367C_PORT5_MISC_CFG_INGRESSBW_FLOWCTRL_OFFSET    11
-+#define    RTL8367C_PORT5_MISC_CFG_INGRESSBW_FLOWCTRL_MASK    0x800
-+#define    RTL8367C_PORT5_MISC_CFG_INGRESSBW_IFG_OFFSET    10
-+#define    RTL8367C_PORT5_MISC_CFG_INGRESSBW_IFG_MASK    0x400
-+#define    RTL8367C_PORT5_MISC_CFG_RX_SPC_OFFSET    9
-+#define    RTL8367C_PORT5_MISC_CFG_RX_SPC_MASK    0x200
-+#define    RTL8367C_PORT5_MISC_CFG_CRC_SKIP_OFFSET    8
-+#define    RTL8367C_PORT5_MISC_CFG_CRC_SKIP_MASK    0x100
-+#define    RTL8367C_PORT5_MISC_CFG_PKTGEN_TX_FIRST_OFFSET    7
-+#define    RTL8367C_PORT5_MISC_CFG_PKTGEN_TX_FIRST_MASK    0x80
-+#define    RTL8367C_PORT5_MISC_CFG_MAC_LOOPBACK_OFFSET    6
-+#define    RTL8367C_PORT5_MISC_CFG_MAC_LOOPBACK_MASK    0x40
-+#define    RTL8367C_PORT5_MISC_CFG_VLAN_EGRESS_MODE_OFFSET    4
-+#define    RTL8367C_PORT5_MISC_CFG_VLAN_EGRESS_MODE_MASK    0x30
-+#define    RTL8367C_PORT5_MISC_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT5_MISC_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT5_RATE_CTRL0    0x00af
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT5_RATE_CTRL1    0x00b0
-+#define    RTL8367C_INGRESSBW_PORT5_RATE_CTRL1_DUMMY_OFFSET    3
-+#define    RTL8367C_INGRESSBW_PORT5_RATE_CTRL1_DUMMY_MASK    0xFFF8
-+#define    RTL8367C_INGRESSBW_PORT5_RATE_CTRL1_INGRESSBW_RATE16_OFFSET    0
-+#define    RTL8367C_INGRESSBW_PORT5_RATE_CTRL1_INGRESSBW_RATE16_MASK    0x7
-+
-+#define    RTL8367C_REG_PORT5_FORCE_RATE0    0x00b1
-+
-+#define    RTL8367C_REG_PORT5_FORCE_RATE1    0x00b2
-+
-+#define    RTL8367C_REG_PORT5_CURENT_RATE0    0x00b3
-+
-+#define    RTL8367C_REG_PORT5_CURENT_RATE1    0x00b4
-+
-+#define    RTL8367C_REG_PORT5_PAGE_COUNTER    0x00b5
-+#define    RTL8367C_PORT5_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_PORT5_PAGE_COUNTER_MASK    0x7F
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT5_CTRL0    0x00b6
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT5_CTRL1    0x00b7
-+
-+#define    RTL8367C_REG_PORT5_EEECFG    0x00b8
-+#define    RTL8367C_PORT5_EEECFG_EEEP_ENABLE_TX_OFFSET    14
-+#define    RTL8367C_PORT5_EEECFG_EEEP_ENABLE_TX_MASK    0x4000
-+#define    RTL8367C_PORT5_EEECFG_EEEP_ENABLE_RX_OFFSET    13
-+#define    RTL8367C_PORT5_EEECFG_EEEP_ENABLE_RX_MASK    0x2000
-+#define    RTL8367C_PORT5_EEECFG_EEE_FORCE_OFFSET    12
-+#define    RTL8367C_PORT5_EEECFG_EEE_FORCE_MASK    0x1000
-+#define    RTL8367C_PORT5_EEECFG_EEE_100M_OFFSET    11
-+#define    RTL8367C_PORT5_EEECFG_EEE_100M_MASK    0x800
-+#define    RTL8367C_PORT5_EEECFG_EEE_GIGA_500M_OFFSET    10
-+#define    RTL8367C_PORT5_EEECFG_EEE_GIGA_500M_MASK    0x400
-+#define    RTL8367C_PORT5_EEECFG_EEE_TX_OFFSET    9
-+#define    RTL8367C_PORT5_EEECFG_EEE_TX_MASK    0x200
-+#define    RTL8367C_PORT5_EEECFG_EEE_RX_OFFSET    8
-+#define    RTL8367C_PORT5_EEECFG_EEE_RX_MASK    0x100
-+#define    RTL8367C_PORT5_EEECFG_EEE_DSP_RX_OFFSET    6
-+#define    RTL8367C_PORT5_EEECFG_EEE_DSP_RX_MASK    0x40
-+#define    RTL8367C_PORT5_EEECFG_EEE_LPI_OFFSET    5
-+#define    RTL8367C_PORT5_EEECFG_EEE_LPI_MASK    0x20
-+#define    RTL8367C_PORT5_EEECFG_EEE_TX_LPI_OFFSET    4
-+#define    RTL8367C_PORT5_EEECFG_EEE_TX_LPI_MASK    0x10
-+#define    RTL8367C_PORT5_EEECFG_EEE_RX_LPI_OFFSET    3
-+#define    RTL8367C_PORT5_EEECFG_EEE_RX_LPI_MASK    0x8
-+#define    RTL8367C_PORT5_EEECFG_EEE_PAUSE_INDICATOR_OFFSET    2
-+#define    RTL8367C_PORT5_EEECFG_EEE_PAUSE_INDICATOR_MASK    0x4
-+#define    RTL8367C_PORT5_EEECFG_EEE_WAKE_REQ_OFFSET    1
-+#define    RTL8367C_PORT5_EEECFG_EEE_WAKE_REQ_MASK    0x2
-+#define    RTL8367C_PORT5_EEECFG_EEE_SLEEP_REQ_OFFSET    0
-+#define    RTL8367C_PORT5_EEECFG_EEE_SLEEP_REQ_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT5_EEETXMTR    0x00b9
-+
-+#define    RTL8367C_REG_PORT5_EEERXMTR    0x00ba
-+
-+#define    RTL8367C_REG_PORT5_EEEPTXMTR    0x00bb
-+
-+#define    RTL8367C_REG_PORT5_EEEPRXMTR    0x00bc
-+
-+#define    RTL8367C_REG_PTP_PORT5_CFG1    0x00be
-+#define    RTL8367C_PTP_PORT5_CFG1_OFFSET    7
-+#define    RTL8367C_PTP_PORT5_CFG1_MASK    0xFF
-+
-+#define    RTL8367C_REG_P5_MSIC1    0x00bf
-+#define    RTL8367C_P5_MSIC1_OFFSET    0
-+#define    RTL8367C_P5_MSIC1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT6_CGST_HALF_CFG    0x00c0
-+#define    RTL8367C_PORT6_CGST_HALF_CFG_CONGESTION_TIME_OFFSET    4
-+#define    RTL8367C_PORT6_CGST_HALF_CFG_CONGESTION_TIME_MASK    0xF0
-+#define    RTL8367C_PORT6_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT6_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT6_CTRL    0x00c1
-+#define    RTL8367C_PKTGEN_PORT6_CTRL_STATUS_OFFSET    15
-+#define    RTL8367C_PKTGEN_PORT6_CTRL_STATUS_MASK    0x8000
-+#define    RTL8367C_PKTGEN_PORT6_CTRL_PKTGEN_STS_OFFSET    13
-+#define    RTL8367C_PKTGEN_PORT6_CTRL_PKTGEN_STS_MASK    0x2000
-+#define    RTL8367C_PKTGEN_PORT6_CTRL_CRC_NO_ERROR_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT6_CTRL_CRC_NO_ERROR_MASK    0x10
-+#define    RTL8367C_PKTGEN_PORT6_CTRL_CMD_START_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT6_CTRL_CMD_START_MASK    0x1
-+
-+#define    RTL8367C_REG_TX_ERR_CNT_PORT6    0x00c2
-+#define    RTL8367C_TX_ERR_CNT_PORT6_OFFSET    0
-+#define    RTL8367C_TX_ERR_CNT_PORT6_MASK    0x7
-+
-+#define    RTL8367C_REG_PKTGEN_PORT6_DA0    0x00c3
-+
-+#define    RTL8367C_REG_PKTGEN_PORT6_DA1    0x00c4
-+
-+#define    RTL8367C_REG_PKTGEN_PORT6_DA2    0x00c5
-+
-+#define    RTL8367C_REG_PKTGEN_PORT6_SA0    0x00c6
-+
-+#define    RTL8367C_REG_PKTGEN_PORT6_SA1    0x00c7
-+
-+#define    RTL8367C_REG_PKTGEN_PORT6_SA2    0x00c8
-+
-+#define    RTL8367C_REG_PKTGEN_PORT6_COUNTER0    0x00c9
-+
-+#define    RTL8367C_REG_PKTGEN_PORT6_COUNTER1    0x00ca
-+#define    RTL8367C_PKTGEN_PORT6_COUNTER1_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT6_COUNTER1_MASK    0xFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT6_TX_LENGTH    0x00cb
-+#define    RTL8367C_PKTGEN_PORT6_TX_LENGTH_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT6_TX_LENGTH_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT6_TIMER    0x00cd
-+#define    RTL8367C_PKTGEN_PORT6_TIMER_TIMER_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT6_TIMER_TIMER_MASK    0xF0
-+#define    RTL8367C_PKTGEN_PORT6_TIMER_RX_DMA_ERR_FLAG_OFFSET    3
-+#define    RTL8367C_PKTGEN_PORT6_TIMER_RX_DMA_ERR_FLAG_MASK    0x8
-+
-+#define    RTL8367C_REG_PORT6_MISC_CFG    0x00ce
-+#define    RTL8367C_PORT6_MISC_CFG_SMALL_TAG_IPG_OFFSET    15
-+#define    RTL8367C_PORT6_MISC_CFG_SMALL_TAG_IPG_MASK    0x8000
-+#define    RTL8367C_PORT6_MISC_CFG_TX_ITFSP_MODE_OFFSET    14
-+#define    RTL8367C_PORT6_MISC_CFG_TX_ITFSP_MODE_MASK    0x4000
-+#define    RTL8367C_PORT6_MISC_CFG_FLOWCTRL_INDEP_OFFSET    13
-+#define    RTL8367C_PORT6_MISC_CFG_FLOWCTRL_INDEP_MASK    0x2000
-+#define    RTL8367C_PORT6_MISC_CFG_DOT1Q_REMARK_ENABLE_OFFSET    12
-+#define    RTL8367C_PORT6_MISC_CFG_DOT1Q_REMARK_ENABLE_MASK    0x1000
-+#define    RTL8367C_PORT6_MISC_CFG_INGRESSBW_FLOWCTRL_OFFSET    11
-+#define    RTL8367C_PORT6_MISC_CFG_INGRESSBW_FLOWCTRL_MASK    0x800
-+#define    RTL8367C_PORT6_MISC_CFG_INGRESSBW_IFG_OFFSET    10
-+#define    RTL8367C_PORT6_MISC_CFG_INGRESSBW_IFG_MASK    0x400
-+#define    RTL8367C_PORT6_MISC_CFG_RX_SPC_OFFSET    9
-+#define    RTL8367C_PORT6_MISC_CFG_RX_SPC_MASK    0x200
-+#define    RTL8367C_PORT6_MISC_CFG_CRC_SKIP_OFFSET    8
-+#define    RTL8367C_PORT6_MISC_CFG_CRC_SKIP_MASK    0x100
-+#define    RTL8367C_PORT6_MISC_CFG_PKTGEN_TX_FIRST_OFFSET    7
-+#define    RTL8367C_PORT6_MISC_CFG_PKTGEN_TX_FIRST_MASK    0x80
-+#define    RTL8367C_PORT6_MISC_CFG_MAC_LOOPBACK_OFFSET    6
-+#define    RTL8367C_PORT6_MISC_CFG_MAC_LOOPBACK_MASK    0x40
-+#define    RTL8367C_PORT6_MISC_CFG_VLAN_EGRESS_MODE_OFFSET    4
-+#define    RTL8367C_PORT6_MISC_CFG_VLAN_EGRESS_MODE_MASK    0x30
-+#define    RTL8367C_PORT6_MISC_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT6_MISC_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT6_RATE_CTRL0    0x00cf
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT6_RATE_CTRL1    0x00d0
-+#define    RTL8367C_INGRESSBW_PORT6_RATE_CTRL1_DUMMY_OFFSET    3
-+#define    RTL8367C_INGRESSBW_PORT6_RATE_CTRL1_DUMMY_MASK    0xFFF8
-+#define    RTL8367C_INGRESSBW_PORT6_RATE_CTRL1_INGRESSBW_RATE16_OFFSET    0
-+#define    RTL8367C_INGRESSBW_PORT6_RATE_CTRL1_INGRESSBW_RATE16_MASK    0x7
-+
-+#define    RTL8367C_REG_PORT6_FORCE_RATE0    0x00d1
-+
-+#define    RTL8367C_REG_PORT6_FORCE_RATE1    0x00d2
-+
-+#define    RTL8367C_REG_PORT6_CURENT_RATE0    0x00d3
-+
-+#define    RTL8367C_REG_PORT6_CURENT_RATE1    0x00d4
-+
-+#define    RTL8367C_REG_PORT6_PAGE_COUNTER    0x00d5
-+#define    RTL8367C_PORT6_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_PORT6_PAGE_COUNTER_MASK    0x7F
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT6_CTRL0    0x00d6
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT6_CTRL1    0x00d7
-+
-+#define    RTL8367C_REG_PORT6_EEECFG    0x00d8
-+#define    RTL8367C_PORT6_EEECFG_EEEP_ENABLE_TX_OFFSET    14
-+#define    RTL8367C_PORT6_EEECFG_EEEP_ENABLE_TX_MASK    0x4000
-+#define    RTL8367C_PORT6_EEECFG_EEEP_ENABLE_RX_OFFSET    13
-+#define    RTL8367C_PORT6_EEECFG_EEEP_ENABLE_RX_MASK    0x2000
-+#define    RTL8367C_PORT6_EEECFG_EEE_FORCE_OFFSET    12
-+#define    RTL8367C_PORT6_EEECFG_EEE_FORCE_MASK    0x1000
-+#define    RTL8367C_PORT6_EEECFG_EEE_100M_OFFSET    11
-+#define    RTL8367C_PORT6_EEECFG_EEE_100M_MASK    0x800
-+#define    RTL8367C_PORT6_EEECFG_EEE_GIGA_500M_OFFSET    10
-+#define    RTL8367C_PORT6_EEECFG_EEE_GIGA_500M_MASK    0x400
-+#define    RTL8367C_PORT6_EEECFG_EEE_TX_OFFSET    9
-+#define    RTL8367C_PORT6_EEECFG_EEE_TX_MASK    0x200
-+#define    RTL8367C_PORT6_EEECFG_EEE_RX_OFFSET    8
-+#define    RTL8367C_PORT6_EEECFG_EEE_RX_MASK    0x100
-+#define    RTL8367C_PORT6_EEECFG_EEE_DSP_RX_OFFSET    6
-+#define    RTL8367C_PORT6_EEECFG_EEE_DSP_RX_MASK    0x40
-+#define    RTL8367C_PORT6_EEECFG_EEE_LPI_OFFSET    5
-+#define    RTL8367C_PORT6_EEECFG_EEE_LPI_MASK    0x20
-+#define    RTL8367C_PORT6_EEECFG_EEE_TX_LPI_OFFSET    4
-+#define    RTL8367C_PORT6_EEECFG_EEE_TX_LPI_MASK    0x10
-+#define    RTL8367C_PORT6_EEECFG_EEE_RX_LPI_OFFSET    3
-+#define    RTL8367C_PORT6_EEECFG_EEE_RX_LPI_MASK    0x8
-+#define    RTL8367C_PORT6_EEECFG_EEE_PAUSE_INDICATOR_OFFSET    2
-+#define    RTL8367C_PORT6_EEECFG_EEE_PAUSE_INDICATOR_MASK    0x4
-+#define    RTL8367C_PORT6_EEECFG_EEE_WAKE_REQ_OFFSET    1
-+#define    RTL8367C_PORT6_EEECFG_EEE_WAKE_REQ_MASK    0x2
-+#define    RTL8367C_PORT6_EEECFG_EEE_SLEEP_REQ_OFFSET    0
-+#define    RTL8367C_PORT6_EEECFG_EEE_SLEEP_REQ_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT6_EEETXMTR    0x00d9
-+
-+#define    RTL8367C_REG_PORT6_EEERXMTR    0x00da
-+
-+#define    RTL8367C_REG_PORT6_EEEPTXMTR    0x00db
-+
-+#define    RTL8367C_REG_PORT6_EEEPRXMTR    0x00dc
-+
-+#define    RTL8367C_REG_PTP_PORT6_CFG1    0x00de
-+#define    RTL8367C_PTP_PORT6_CFG1_OFFSET    7
-+#define    RTL8367C_PTP_PORT6_CFG1_MASK    0xFF
-+
-+#define    RTL8367C_REG_P6_MSIC1    0x00df
-+#define    RTL8367C_P6_MSIC1_OFFSET    0
-+#define    RTL8367C_P6_MSIC1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT7_CGST_HALF_CFG    0x00e0
-+#define    RTL8367C_PORT7_CGST_HALF_CFG_CONGESTION_TIME_OFFSET    4
-+#define    RTL8367C_PORT7_CGST_HALF_CFG_CONGESTION_TIME_MASK    0xF0
-+#define    RTL8367C_PORT7_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT7_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT7_CTRL    0x00e1
-+#define    RTL8367C_PKTGEN_PORT7_CTRL_STATUS_OFFSET    15
-+#define    RTL8367C_PKTGEN_PORT7_CTRL_STATUS_MASK    0x8000
-+#define    RTL8367C_PKTGEN_PORT7_CTRL_PKTGEN_STS_OFFSET    13
-+#define    RTL8367C_PKTGEN_PORT7_CTRL_PKTGEN_STS_MASK    0x2000
-+#define    RTL8367C_PKTGEN_PORT7_CTRL_CRC_NO_ERROR_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT7_CTRL_CRC_NO_ERROR_MASK    0x10
-+#define    RTL8367C_PKTGEN_PORT7_CTRL_CMD_START_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT7_CTRL_CMD_START_MASK    0x1
-+
-+#define    RTL8367C_REG_TX_ERR_CNT_PORT7    0x00e2
-+#define    RTL8367C_TX_ERR_CNT_PORT7_OFFSET    0
-+#define    RTL8367C_TX_ERR_CNT_PORT7_MASK    0x7
-+
-+#define    RTL8367C_REG_PKTGEN_PORT7_DA0    0x00e3
-+
-+#define    RTL8367C_REG_PKTGEN_PORT7_DA1    0x00e4
-+
-+#define    RTL8367C_REG_PKTGEN_PORT7_DA2    0x00e5
-+
-+#define    RTL8367C_REG_PKTGEN_PORT7_SA0    0x00e6
-+
-+#define    RTL8367C_REG_PKTGEN_PORT7_SA1    0x00e7
-+
-+#define    RTL8367C_REG_PKTGEN_PORT7_SA2    0x00e8
-+
-+#define    RTL8367C_REG_PKTGEN_PORT7_COUNTER0    0x00e9
-+
-+#define    RTL8367C_REG_PKTGEN_PORT7_COUNTER1    0x00ea
-+#define    RTL8367C_PKTGEN_PORT7_COUNTER1_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT7_COUNTER1_MASK    0xFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT7_TX_LENGTH    0x00eb
-+#define    RTL8367C_PKTGEN_PORT7_TX_LENGTH_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT7_TX_LENGTH_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT7_TIMER    0x00ed
-+#define    RTL8367C_PKTGEN_PORT7_TIMER_TIMER_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT7_TIMER_TIMER_MASK    0xF0
-+#define    RTL8367C_PKTGEN_PORT7_TIMER_RX_DMA_ERR_FLAG_OFFSET    3
-+#define    RTL8367C_PKTGEN_PORT7_TIMER_RX_DMA_ERR_FLAG_MASK    0x8
-+
-+#define    RTL8367C_REG_PORT7_MISC_CFG    0x00ee
-+#define    RTL8367C_PORT7_MISC_CFG_SMALL_TAG_IPG_OFFSET    15
-+#define    RTL8367C_PORT7_MISC_CFG_SMALL_TAG_IPG_MASK    0x8000
-+#define    RTL8367C_PORT7_MISC_CFG_TX_ITFSP_MODE_OFFSET    14
-+#define    RTL8367C_PORT7_MISC_CFG_TX_ITFSP_MODE_MASK    0x4000
-+#define    RTL8367C_PORT7_MISC_CFG_FLOWCTRL_INDEP_OFFSET    13
-+#define    RTL8367C_PORT7_MISC_CFG_FLOWCTRL_INDEP_MASK    0x2000
-+#define    RTL8367C_PORT7_MISC_CFG_DOT1Q_REMARK_ENABLE_OFFSET    12
-+#define    RTL8367C_PORT7_MISC_CFG_DOT1Q_REMARK_ENABLE_MASK    0x1000
-+#define    RTL8367C_PORT7_MISC_CFG_INGRESSBW_FLOWCTRL_OFFSET    11
-+#define    RTL8367C_PORT7_MISC_CFG_INGRESSBW_FLOWCTRL_MASK    0x800
-+#define    RTL8367C_PORT7_MISC_CFG_INGRESSBW_IFG_OFFSET    10
-+#define    RTL8367C_PORT7_MISC_CFG_INGRESSBW_IFG_MASK    0x400
-+#define    RTL8367C_PORT7_MISC_CFG_RX_SPC_OFFSET    9
-+#define    RTL8367C_PORT7_MISC_CFG_RX_SPC_MASK    0x200
-+#define    RTL8367C_PORT7_MISC_CFG_CRC_SKIP_OFFSET    8
-+#define    RTL8367C_PORT7_MISC_CFG_CRC_SKIP_MASK    0x100
-+#define    RTL8367C_PORT7_MISC_CFG_PKTGEN_TX_FIRST_OFFSET    7
-+#define    RTL8367C_PORT7_MISC_CFG_PKTGEN_TX_FIRST_MASK    0x80
-+#define    RTL8367C_PORT7_MISC_CFG_MAC_LOOPBACK_OFFSET    6
-+#define    RTL8367C_PORT7_MISC_CFG_MAC_LOOPBACK_MASK    0x40
-+#define    RTL8367C_PORT7_MISC_CFG_VLAN_EGRESS_MODE_OFFSET    4
-+#define    RTL8367C_PORT7_MISC_CFG_VLAN_EGRESS_MODE_MASK    0x30
-+#define    RTL8367C_PORT7_MISC_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT7_MISC_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT7_RATE_CTRL0    0x00ef
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT7_RATE_CTRL1    0x00f0
-+#define    RTL8367C_INGRESSBW_PORT7_RATE_CTRL1_DUMMY_OFFSET    3
-+#define    RTL8367C_INGRESSBW_PORT7_RATE_CTRL1_DUMMY_MASK    0xFFF8
-+#define    RTL8367C_INGRESSBW_PORT7_RATE_CTRL1_INGRESSBW_RATE16_OFFSET    0
-+#define    RTL8367C_INGRESSBW_PORT7_RATE_CTRL1_INGRESSBW_RATE16_MASK    0x7
-+
-+#define    RTL8367C_REG_PORT7_FORCE_RATE0    0x00f1
-+
-+#define    RTL8367C_REG_PORT7_FORCE_RATE1    0x00f2
-+
-+#define    RTL8367C_REG_PORT7_CURENT_RATE0    0x00f3
-+
-+#define    RTL8367C_REG_PORT7_CURENT_RATE1    0x00f4
-+
-+#define    RTL8367C_REG_PORT7_PAGE_COUNTER    0x00f5
-+#define    RTL8367C_PORT7_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_PORT7_PAGE_COUNTER_MASK    0x7F
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT7_CTRL0    0x00f6
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT7_CTRL1    0x00f7
-+
-+#define    RTL8367C_REG_PORT7_EEECFG    0x00f8
-+#define    RTL8367C_PORT7_EEECFG_EEEP_ENABLE_TX_OFFSET    14
-+#define    RTL8367C_PORT7_EEECFG_EEEP_ENABLE_TX_MASK    0x4000
-+#define    RTL8367C_PORT7_EEECFG_EEEP_ENABLE_RX_OFFSET    13
-+#define    RTL8367C_PORT7_EEECFG_EEEP_ENABLE_RX_MASK    0x2000
-+#define    RTL8367C_PORT7_EEECFG_EEE_FORCE_OFFSET    12
-+#define    RTL8367C_PORT7_EEECFG_EEE_FORCE_MASK    0x1000
-+#define    RTL8367C_PORT7_EEECFG_EEE_100M_OFFSET    11
-+#define    RTL8367C_PORT7_EEECFG_EEE_100M_MASK    0x800
-+#define    RTL8367C_PORT7_EEECFG_EEE_GIGA_500M_OFFSET    10
-+#define    RTL8367C_PORT7_EEECFG_EEE_GIGA_500M_MASK    0x400
-+#define    RTL8367C_PORT7_EEECFG_EEE_TX_OFFSET    9
-+#define    RTL8367C_PORT7_EEECFG_EEE_TX_MASK    0x200
-+#define    RTL8367C_PORT7_EEECFG_EEE_RX_OFFSET    8
-+#define    RTL8367C_PORT7_EEECFG_EEE_RX_MASK    0x100
-+#define    RTL8367C_PORT7_EEECFG_EEE_DSP_RX_OFFSET    6
-+#define    RTL8367C_PORT7_EEECFG_EEE_DSP_RX_MASK    0x40
-+#define    RTL8367C_PORT7_EEECFG_EEE_LPI_OFFSET    5
-+#define    RTL8367C_PORT7_EEECFG_EEE_LPI_MASK    0x20
-+#define    RTL8367C_PORT7_EEECFG_EEE_TX_LPI_OFFSET    4
-+#define    RTL8367C_PORT7_EEECFG_EEE_TX_LPI_MASK    0x10
-+#define    RTL8367C_PORT7_EEECFG_EEE_RX_LPI_OFFSET    3
-+#define    RTL8367C_PORT7_EEECFG_EEE_RX_LPI_MASK    0x8
-+#define    RTL8367C_PORT7_EEECFG_EEE_PAUSE_INDICATOR_OFFSET    2
-+#define    RTL8367C_PORT7_EEECFG_EEE_PAUSE_INDICATOR_MASK    0x4
-+#define    RTL8367C_PORT7_EEECFG_EEE_WAKE_REQ_OFFSET    1
-+#define    RTL8367C_PORT7_EEECFG_EEE_WAKE_REQ_MASK    0x2
-+#define    RTL8367C_PORT7_EEECFG_EEE_SLEEP_REQ_OFFSET    0
-+#define    RTL8367C_PORT7_EEECFG_EEE_SLEEP_REQ_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT7_EEETXMTR    0x00f9
-+
-+#define    RTL8367C_REG_PORT7_EEERXMTR    0x00fa
-+
-+#define    RTL8367C_REG_PORT7_EEEPTXMTR    0x00fb
-+
-+#define    RTL8367C_REG_PORT7_EEEPRXMTR    0x00fc
-+
-+#define    RTL8367C_REG_PTP_PORT7_CFG1    0x00fe
-+#define    RTL8367C_PTP_PORT7_CFG1_OFFSET    7
-+#define    RTL8367C_PTP_PORT7_CFG1_MASK    0xFF
-+
-+#define    RTL8367C_REG_P7_MSIC1    0x00ff
-+#define    RTL8367C_P7_MSIC1_OFFSET    0
-+#define    RTL8367C_P7_MSIC1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT8_CGST_HALF_CFG    0x0100
-+#define    RTL8367C_PORT8_CGST_HALF_CFG_CONGESTION_TIME_OFFSET    4
-+#define    RTL8367C_PORT8_CGST_HALF_CFG_CONGESTION_TIME_MASK    0xF0
-+#define    RTL8367C_PORT8_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT8_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT8_CTRL    0x0101
-+#define    RTL8367C_PKTGEN_PORT8_CTRL_STATUS_OFFSET    15
-+#define    RTL8367C_PKTGEN_PORT8_CTRL_STATUS_MASK    0x8000
-+#define    RTL8367C_PKTGEN_PORT8_CTRL_PKTGEN_STS_OFFSET    13
-+#define    RTL8367C_PKTGEN_PORT8_CTRL_PKTGEN_STS_MASK    0x2000
-+#define    RTL8367C_PKTGEN_PORT8_CTRL_CRC_NO_ERROR_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT8_CTRL_CRC_NO_ERROR_MASK    0x10
-+#define    RTL8367C_PKTGEN_PORT8_CTRL_CMD_START_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT8_CTRL_CMD_START_MASK    0x1
-+
-+#define    RTL8367C_REG_TX_ERR_CNT_PORT8    0x0102
-+#define    RTL8367C_TX_ERR_CNT_PORT8_OFFSET    0
-+#define    RTL8367C_TX_ERR_CNT_PORT8_MASK    0x7
-+
-+#define    RTL8367C_REG_PKTGEN_PORT8_DA0    0x0103
-+
-+#define    RTL8367C_REG_PKTGEN_PORT8_DA1    0x0104
-+
-+#define    RTL8367C_REG_PKTGEN_PORT8_DA2    0x0105
-+
-+#define    RTL8367C_REG_PKTGEN_PORT8_SA0    0x0106
-+
-+#define    RTL8367C_REG_PKTGEN_PORT8_SA1    0x0107
-+
-+#define    RTL8367C_REG_PKTGEN_PORT8_SA2    0x0108
-+
-+#define    RTL8367C_REG_PKTGEN_PORT8_COUNTER0    0x0109
-+
-+#define    RTL8367C_REG_PKTGEN_PORT8_COUNTER1    0x010a
-+#define    RTL8367C_PKTGEN_PORT8_COUNTER1_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT8_COUNTER1_MASK    0xFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT8_TX_LENGTH    0x010b
-+#define    RTL8367C_PKTGEN_PORT8_TX_LENGTH_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT8_TX_LENGTH_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT8_TIMER    0x010d
-+#define    RTL8367C_PKTGEN_PORT8_TIMER_TIMER_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT8_TIMER_TIMER_MASK    0xF0
-+#define    RTL8367C_PKTGEN_PORT8_TIMER_RX_DMA_ERR_FLAG_OFFSET    3
-+#define    RTL8367C_PKTGEN_PORT8_TIMER_RX_DMA_ERR_FLAG_MASK    0x8
-+
-+#define    RTL8367C_REG_PORT8_MISC_CFG    0x010e
-+#define    RTL8367C_PORT8_MISC_CFG_SMALL_TAG_IPG_OFFSET    15
-+#define    RTL8367C_PORT8_MISC_CFG_SMALL_TAG_IPG_MASK    0x8000
-+#define    RTL8367C_PORT8_MISC_CFG_TX_ITFSP_MODE_OFFSET    14
-+#define    RTL8367C_PORT8_MISC_CFG_TX_ITFSP_MODE_MASK    0x4000
-+#define    RTL8367C_PORT8_MISC_CFG_FLOWCTRL_INDEP_OFFSET    13
-+#define    RTL8367C_PORT8_MISC_CFG_FLOWCTRL_INDEP_MASK    0x2000
-+#define    RTL8367C_PORT8_MISC_CFG_DOT1Q_REMARK_ENABLE_OFFSET    12
-+#define    RTL8367C_PORT8_MISC_CFG_DOT1Q_REMARK_ENABLE_MASK    0x1000
-+#define    RTL8367C_PORT8_MISC_CFG_INGRESSBW_FLOWCTRL_OFFSET    11
-+#define    RTL8367C_PORT8_MISC_CFG_INGRESSBW_FLOWCTRL_MASK    0x800
-+#define    RTL8367C_PORT8_MISC_CFG_INGRESSBW_IFG_OFFSET    10
-+#define    RTL8367C_PORT8_MISC_CFG_INGRESSBW_IFG_MASK    0x400
-+#define    RTL8367C_PORT8_MISC_CFG_RX_SPC_OFFSET    9
-+#define    RTL8367C_PORT8_MISC_CFG_RX_SPC_MASK    0x200
-+#define    RTL8367C_PORT8_MISC_CFG_CRC_SKIP_OFFSET    8
-+#define    RTL8367C_PORT8_MISC_CFG_CRC_SKIP_MASK    0x100
-+#define    RTL8367C_PORT8_MISC_CFG_PKTGEN_TX_FIRST_OFFSET    7
-+#define    RTL8367C_PORT8_MISC_CFG_PKTGEN_TX_FIRST_MASK    0x80
-+#define    RTL8367C_PORT8_MISC_CFG_MAC_LOOPBACK_OFFSET    6
-+#define    RTL8367C_PORT8_MISC_CFG_MAC_LOOPBACK_MASK    0x40
-+#define    RTL8367C_PORT8_MISC_CFG_VLAN_EGRESS_MODE_OFFSET    4
-+#define    RTL8367C_PORT8_MISC_CFG_VLAN_EGRESS_MODE_MASK    0x30
-+#define    RTL8367C_PORT8_MISC_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT8_MISC_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT8_RATE_CTRL0    0x010f
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT8_RATE_CTRL1    0x0110
-+#define    RTL8367C_INGRESSBW_PORT8_RATE_CTRL1_DUMMY_OFFSET    3
-+#define    RTL8367C_INGRESSBW_PORT8_RATE_CTRL1_DUMMY_MASK    0xFFF8
-+#define    RTL8367C_INGRESSBW_PORT8_RATE_CTRL1_INGRESSBW_RATE16_OFFSET    0
-+#define    RTL8367C_INGRESSBW_PORT8_RATE_CTRL1_INGRESSBW_RATE16_MASK    0x7
-+
-+#define    RTL8367C_REG_PORT8_FORCE_RATE0    0x0111
-+
-+#define    RTL8367C_REG_PORT8_FORCE_RATE1    0x0112
-+
-+#define    RTL8367C_REG_PORT8_CURENT_RATE0    0x0113
-+
-+#define    RTL8367C_REG_PORT8_CURENT_RATE1    0x0114
-+
-+#define    RTL8367C_REG_PORT8_PAGE_COUNTER    0x0115
-+#define    RTL8367C_PORT8_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_PORT8_PAGE_COUNTER_MASK    0x7F
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT8_CTRL0    0x0116
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT8_CTRL1    0x0117
-+
-+#define    RTL8367C_REG_PORT8_EEECFG    0x0118
-+#define    RTL8367C_PORT8_EEECFG_EEEP_ENABLE_TX_OFFSET    14
-+#define    RTL8367C_PORT8_EEECFG_EEEP_ENABLE_TX_MASK    0x4000
-+#define    RTL8367C_PORT8_EEECFG_EEEP_ENABLE_RX_OFFSET    13
-+#define    RTL8367C_PORT8_EEECFG_EEEP_ENABLE_RX_MASK    0x2000
-+#define    RTL8367C_PORT8_EEECFG_EEE_FORCE_OFFSET    12
-+#define    RTL8367C_PORT8_EEECFG_EEE_FORCE_MASK    0x1000
-+#define    RTL8367C_PORT8_EEECFG_EEE_100M_OFFSET    11
-+#define    RTL8367C_PORT8_EEECFG_EEE_100M_MASK    0x800
-+#define    RTL8367C_PORT8_EEECFG_EEE_GIGA_500M_OFFSET    10
-+#define    RTL8367C_PORT8_EEECFG_EEE_GIGA_500M_MASK    0x400
-+#define    RTL8367C_PORT8_EEECFG_EEE_TX_OFFSET    9
-+#define    RTL8367C_PORT8_EEECFG_EEE_TX_MASK    0x200
-+#define    RTL8367C_PORT8_EEECFG_EEE_RX_OFFSET    8
-+#define    RTL8367C_PORT8_EEECFG_EEE_RX_MASK    0x100
-+#define    RTL8367C_PORT8_EEECFG_EEE_DSP_RX_OFFSET    6
-+#define    RTL8367C_PORT8_EEECFG_EEE_DSP_RX_MASK    0x40
-+#define    RTL8367C_PORT8_EEECFG_EEE_LPI_OFFSET    5
-+#define    RTL8367C_PORT8_EEECFG_EEE_LPI_MASK    0x20
-+#define    RTL8367C_PORT8_EEECFG_EEE_TX_LPI_OFFSET    4
-+#define    RTL8367C_PORT8_EEECFG_EEE_TX_LPI_MASK    0x10
-+#define    RTL8367C_PORT8_EEECFG_EEE_RX_LPI_OFFSET    3
-+#define    RTL8367C_PORT8_EEECFG_EEE_RX_LPI_MASK    0x8
-+#define    RTL8367C_PORT8_EEECFG_EEE_PAUSE_INDICATOR_OFFSET    2
-+#define    RTL8367C_PORT8_EEECFG_EEE_PAUSE_INDICATOR_MASK    0x4
-+#define    RTL8367C_PORT8_EEECFG_EEE_WAKE_REQ_OFFSET    1
-+#define    RTL8367C_PORT8_EEECFG_EEE_WAKE_REQ_MASK    0x2
-+#define    RTL8367C_PORT8_EEECFG_EEE_SLEEP_REQ_OFFSET    0
-+#define    RTL8367C_PORT8_EEECFG_EEE_SLEEP_REQ_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT8_EEETXMTR    0x0119
-+
-+#define    RTL8367C_REG_PORT8_EEERXMTR    0x011a
-+
-+#define    RTL8367C_REG_PORT8_EEEPTXMTR    0x011b
-+
-+#define    RTL8367C_REG_PORT8_EEEPRXMTR    0x011c
-+
-+#define    RTL8367C_REG_PTP_PORT8_CFG1    0x011e
-+#define    RTL8367C_PTP_PORT8_CFG1_OFFSET    7
-+#define    RTL8367C_PTP_PORT8_CFG1_MASK    0xFF
-+
-+#define    RTL8367C_REG_P8_MSIC1    0x011f
-+#define    RTL8367C_P8_MSIC1_OFFSET    0
-+#define    RTL8367C_P8_MSIC1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT9_CGST_HALF_CFG    0x0120
-+#define    RTL8367C_PORT9_CGST_HALF_CFG_CONGESTION_TIME_OFFSET    4
-+#define    RTL8367C_PORT9_CGST_HALF_CFG_CONGESTION_TIME_MASK    0xF0
-+#define    RTL8367C_PORT9_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT9_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT9_CTRL    0x0121
-+#define    RTL8367C_PKTGEN_PORT9_CTRL_STATUS_OFFSET    15
-+#define    RTL8367C_PKTGEN_PORT9_CTRL_STATUS_MASK    0x8000
-+#define    RTL8367C_PKTGEN_PORT9_CTRL_PKTGEN_STS_OFFSET    13
-+#define    RTL8367C_PKTGEN_PORT9_CTRL_PKTGEN_STS_MASK    0x2000
-+#define    RTL8367C_PKTGEN_PORT9_CTRL_CRC_NO_ERROR_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT9_CTRL_CRC_NO_ERROR_MASK    0x10
-+#define    RTL8367C_PKTGEN_PORT9_CTRL_CMD_START_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT9_CTRL_CMD_START_MASK    0x1
-+
-+#define    RTL8367C_REG_TX_ERR_CNT_PORT9    0x0122
-+#define    RTL8367C_TX_ERR_CNT_PORT9_OFFSET    0
-+#define    RTL8367C_TX_ERR_CNT_PORT9_MASK    0x7
-+
-+#define    RTL8367C_REG_PKTGEN_PORT9_DA0    0x0123
-+
-+#define    RTL8367C_REG_PKTGEN_PORT9_DA1    0x0124
-+
-+#define    RTL8367C_REG_PKTGEN_PORT9_DA2    0x0125
-+
-+#define    RTL8367C_REG_PKTGEN_PORT9_SA0    0x0126
-+
-+#define    RTL8367C_REG_PKTGEN_PORT9_SA1    0x0127
-+
-+#define    RTL8367C_REG_PKTGEN_PORT9_SA2    0x0128
-+
-+#define    RTL8367C_REG_PKTGEN_PORT9_COUNTER0    0x0129
-+
-+#define    RTL8367C_REG_PKTGEN_PORT9_COUNTER1    0x012a
-+#define    RTL8367C_PKTGEN_PORT9_COUNTER1_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT9_COUNTER1_MASK    0xFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT9_TX_LENGTH    0x012b
-+#define    RTL8367C_PKTGEN_PORT9_TX_LENGTH_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT9_TX_LENGTH_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT9_TIMER    0x012d
-+#define    RTL8367C_PKTGEN_PORT9_TIMER_TIMER_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT9_TIMER_TIMER_MASK    0xF0
-+#define    RTL8367C_PKTGEN_PORT9_TIMER_RX_DMA_ERR_FLAG_OFFSET    3
-+#define    RTL8367C_PKTGEN_PORT9_TIMER_RX_DMA_ERR_FLAG_MASK    0x8
-+
-+#define    RTL8367C_REG_PORT9_MISC_CFG    0x012e
-+#define    RTL8367C_PORT9_MISC_CFG_SMALL_TAG_IPG_OFFSET    15
-+#define    RTL8367C_PORT9_MISC_CFG_SMALL_TAG_IPG_MASK    0x8000
-+#define    RTL8367C_PORT9_MISC_CFG_TX_ITFSP_MODE_OFFSET    14
-+#define    RTL8367C_PORT9_MISC_CFG_TX_ITFSP_MODE_MASK    0x4000
-+#define    RTL8367C_PORT9_MISC_CFG_FLOWCTRL_INDEP_OFFSET    13
-+#define    RTL8367C_PORT9_MISC_CFG_FLOWCTRL_INDEP_MASK    0x2000
-+#define    RTL8367C_PORT9_MISC_CFG_DOT1Q_REMARK_ENABLE_OFFSET    12
-+#define    RTL8367C_PORT9_MISC_CFG_DOT1Q_REMARK_ENABLE_MASK    0x1000
-+#define    RTL8367C_PORT9_MISC_CFG_INGRESSBW_FLOWCTRL_OFFSET    11
-+#define    RTL8367C_PORT9_MISC_CFG_INGRESSBW_FLOWCTRL_MASK    0x800
-+#define    RTL8367C_PORT9_MISC_CFG_INGRESSBW_IFG_OFFSET    10
-+#define    RTL8367C_PORT9_MISC_CFG_INGRESSBW_IFG_MASK    0x400
-+#define    RTL8367C_PORT9_MISC_CFG_RX_SPC_OFFSET    9
-+#define    RTL8367C_PORT9_MISC_CFG_RX_SPC_MASK    0x200
-+#define    RTL8367C_PORT9_MISC_CFG_CRC_SKIP_OFFSET    8
-+#define    RTL8367C_PORT9_MISC_CFG_CRC_SKIP_MASK    0x100
-+#define    RTL8367C_PORT9_MISC_CFG_PKTGEN_TX_FIRST_OFFSET    7
-+#define    RTL8367C_PORT9_MISC_CFG_PKTGEN_TX_FIRST_MASK    0x80
-+#define    RTL8367C_PORT9_MISC_CFG_MAC_LOOPBACK_OFFSET    6
-+#define    RTL8367C_PORT9_MISC_CFG_MAC_LOOPBACK_MASK    0x40
-+#define    RTL8367C_PORT9_MISC_CFG_VLAN_EGRESS_MODE_OFFSET    4
-+#define    RTL8367C_PORT9_MISC_CFG_VLAN_EGRESS_MODE_MASK    0x30
-+#define    RTL8367C_PORT9_MISC_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT9_MISC_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT9_RATE_CTRL0    0x012f
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT9_RATE_CTRL1    0x0130
-+#define    RTL8367C_INGRESSBW_PORT9_RATE_CTRL1_DUMMY_OFFSET    3
-+#define    RTL8367C_INGRESSBW_PORT9_RATE_CTRL1_DUMMY_MASK    0xFFF8
-+#define    RTL8367C_INGRESSBW_PORT9_RATE_CTRL1_INGRESSBW_RATE16_OFFSET    0
-+#define    RTL8367C_INGRESSBW_PORT9_RATE_CTRL1_INGRESSBW_RATE16_MASK    0x7
-+
-+#define    RTL8367C_REG_PORT9_FORCE_RATE0    0x0131
-+
-+#define    RTL8367C_REG_PORT9_FORCE_RATE1    0x0132
-+
-+#define    RTL8367C_REG_PORT9_CURENT_RATE0    0x0133
-+
-+#define    RTL8367C_REG_PORT9_CURENT_RATE1    0x0134
-+
-+#define    RTL8367C_REG_PORT9_PAGE_COUNTER    0x0135
-+#define    RTL8367C_PORT9_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_PORT9_PAGE_COUNTER_MASK    0x7F
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT9_CTRL0    0x0136
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT9_CTRL1    0x0137
-+
-+#define    RTL8367C_REG_PORT9_EEECFG    0x0138
-+#define    RTL8367C_PORT9_EEECFG_EEEP_ENABLE_TX_OFFSET    14
-+#define    RTL8367C_PORT9_EEECFG_EEEP_ENABLE_TX_MASK    0x4000
-+#define    RTL8367C_PORT9_EEECFG_EEEP_ENABLE_RX_OFFSET    13
-+#define    RTL8367C_PORT9_EEECFG_EEEP_ENABLE_RX_MASK    0x2000
-+#define    RTL8367C_PORT9_EEECFG_EEE_FORCE_OFFSET    12
-+#define    RTL8367C_PORT9_EEECFG_EEE_FORCE_MASK    0x1000
-+#define    RTL8367C_PORT9_EEECFG_EEE_100M_OFFSET    11
-+#define    RTL8367C_PORT9_EEECFG_EEE_100M_MASK    0x800
-+#define    RTL8367C_PORT9_EEECFG_EEE_GIGA_500M_OFFSET    10
-+#define    RTL8367C_PORT9_EEECFG_EEE_GIGA_500M_MASK    0x400
-+#define    RTL8367C_PORT9_EEECFG_EEE_TX_OFFSET    9
-+#define    RTL8367C_PORT9_EEECFG_EEE_TX_MASK    0x200
-+#define    RTL8367C_PORT9_EEECFG_EEE_RX_OFFSET    8
-+#define    RTL8367C_PORT9_EEECFG_EEE_RX_MASK    0x100
-+#define    RTL8367C_PORT9_EEECFG_EEE_DSP_RX_OFFSET    6
-+#define    RTL8367C_PORT9_EEECFG_EEE_DSP_RX_MASK    0x40
-+#define    RTL8367C_PORT9_EEECFG_EEE_LPI_OFFSET    5
-+#define    RTL8367C_PORT9_EEECFG_EEE_LPI_MASK    0x20
-+#define    RTL8367C_PORT9_EEECFG_EEE_TX_LPI_OFFSET    4
-+#define    RTL8367C_PORT9_EEECFG_EEE_TX_LPI_MASK    0x10
-+#define    RTL8367C_PORT9_EEECFG_EEE_RX_LPI_OFFSET    3
-+#define    RTL8367C_PORT9_EEECFG_EEE_RX_LPI_MASK    0x8
-+#define    RTL8367C_PORT9_EEECFG_EEE_PAUSE_INDICATOR_OFFSET    2
-+#define    RTL8367C_PORT9_EEECFG_EEE_PAUSE_INDICATOR_MASK    0x4
-+#define    RTL8367C_PORT9_EEECFG_EEE_WAKE_REQ_OFFSET    1
-+#define    RTL8367C_PORT9_EEECFG_EEE_WAKE_REQ_MASK    0x2
-+#define    RTL8367C_PORT9_EEECFG_EEE_SLEEP_REQ_OFFSET    0
-+#define    RTL8367C_PORT9_EEECFG_EEE_SLEEP_REQ_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT9_EEETXMTR    0x0139
-+
-+#define    RTL8367C_REG_PORT9_EEERXMTR    0x013a
-+
-+#define    RTL8367C_REG_PORT9_EEEPTXMTR    0x013b
-+
-+#define    RTL8367C_REG_PORT9_EEEPRXMTR    0x013c
-+
-+#define    RTL8367C_REG_PTP_PORT9_CFG1    0x013e
-+#define    RTL8367C_PTP_PORT9_CFG1_OFFSET    7
-+#define    RTL8367C_PTP_PORT9_CFG1_MASK    0xFF
-+
-+#define    RTL8367C_REG_P9_MSIC1    0x013f
-+#define    RTL8367C_P9_MSIC1_OFFSET    0
-+#define    RTL8367C_P9_MSIC1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT10_CGST_HALF_CFG    0x0140
-+#define    RTL8367C_PORT10_CGST_HALF_CFG_CONGESTION_TIME_OFFSET    4
-+#define    RTL8367C_PORT10_CGST_HALF_CFG_CONGESTION_TIME_MASK    0xF0
-+#define    RTL8367C_PORT10_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT10_CGST_HALF_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT10_CTRL    0x0141
-+#define    RTL8367C_PKTGEN_PORT10_CTRL_STATUS_OFFSET    15
-+#define    RTL8367C_PKTGEN_PORT10_CTRL_STATUS_MASK    0x8000
-+#define    RTL8367C_PKTGEN_PORT10_CTRL_PKTGEN_STS_OFFSET    13
-+#define    RTL8367C_PKTGEN_PORT10_CTRL_PKTGEN_STS_MASK    0x2000
-+#define    RTL8367C_PKTGEN_PORT10_CTRL_CRC_NO_ERROR_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT10_CTRL_CRC_NO_ERROR_MASK    0x10
-+#define    RTL8367C_PKTGEN_PORT10_CTRL_CMD_START_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT10_CTRL_CMD_START_MASK    0x1
-+
-+#define    RTL8367C_REG_TX_ERR_CNT_PORT10    0x0142
-+#define    RTL8367C_TX_ERR_CNT_PORT10_OFFSET    0
-+#define    RTL8367C_TX_ERR_CNT_PORT10_MASK    0x7
-+
-+#define    RTL8367C_REG_PKTGEN_PORT10_DA0    0x0143
-+
-+#define    RTL8367C_REG_PKTGEN_PORT10_DA1    0x0144
-+
-+#define    RTL8367C_REG_PKTGEN_PORT10_DA2    0x0145
-+
-+#define    RTL8367C_REG_PKTGEN_PORT10_SA0    0x0146
-+
-+#define    RTL8367C_REG_PKTGEN_PORT10_SA1    0x0147
-+
-+#define    RTL8367C_REG_PKTGEN_PORT10_SA2    0x0148
-+
-+#define    RTL8367C_REG_PKTGEN_PORT10_COUNTER0    0x0149
-+
-+#define    RTL8367C_REG_PKTGEN_PORT10_COUNTER1    0x014a
-+#define    RTL8367C_PKTGEN_PORT10_COUNTER1_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT10_COUNTER1_MASK    0xFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT10_TX_LENGTH    0x014b
-+#define    RTL8367C_PKTGEN_PORT10_TX_LENGTH_OFFSET    0
-+#define    RTL8367C_PKTGEN_PORT10_TX_LENGTH_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_PKTGEN_PORT10_TIMER    0x014d
-+#define    RTL8367C_PKTGEN_PORT10_TIMER_TIMER_OFFSET    4
-+#define    RTL8367C_PKTGEN_PORT10_TIMER_TIMER_MASK    0xF0
-+#define    RTL8367C_PKTGEN_PORT10_TIMER_RX_DMA_ERR_FLAG_OFFSET    3
-+#define    RTL8367C_PKTGEN_PORT10_TIMER_RX_DMA_ERR_FLAG_MASK    0x8
-+
-+#define    RTL8367C_REG_PORT10_MISC_CFG    0x014e
-+#define    RTL8367C_PORT10_MISC_CFG_SMALL_TAG_IPG_OFFSET    15
-+#define    RTL8367C_PORT10_MISC_CFG_SMALL_TAG_IPG_MASK    0x8000
-+#define    RTL8367C_PORT10_MISC_CFG_TX_ITFSP_MODE_OFFSET    14
-+#define    RTL8367C_PORT10_MISC_CFG_TX_ITFSP_MODE_MASK    0x4000
-+#define    RTL8367C_PORT10_MISC_CFG_FLOWCTRL_INDEP_OFFSET    13
-+#define    RTL8367C_PORT10_MISC_CFG_FLOWCTRL_INDEP_MASK    0x2000
-+#define    RTL8367C_PORT10_MISC_CFG_DOT1Q_REMARK_ENABLE_OFFSET    12
-+#define    RTL8367C_PORT10_MISC_CFG_DOT1Q_REMARK_ENABLE_MASK    0x1000
-+#define    RTL8367C_PORT10_MISC_CFG_INGRESSBW_FLOWCTRL_OFFSET    11
-+#define    RTL8367C_PORT10_MISC_CFG_INGRESSBW_FLOWCTRL_MASK    0x800
-+#define    RTL8367C_PORT10_MISC_CFG_INGRESSBW_IFG_OFFSET    10
-+#define    RTL8367C_PORT10_MISC_CFG_INGRESSBW_IFG_MASK    0x400
-+#define    RTL8367C_PORT10_MISC_CFG_RX_SPC_OFFSET    9
-+#define    RTL8367C_PORT10_MISC_CFG_RX_SPC_MASK    0x200
-+#define    RTL8367C_PORT10_MISC_CFG_CRC_SKIP_OFFSET    8
-+#define    RTL8367C_PORT10_MISC_CFG_CRC_SKIP_MASK    0x100
-+#define    RTL8367C_PORT10_MISC_CFG_PKTGEN_TX_FIRST_OFFSET    7
-+#define    RTL8367C_PORT10_MISC_CFG_PKTGEN_TX_FIRST_MASK    0x80
-+#define    RTL8367C_PORT10_MISC_CFG_MAC_LOOPBACK_OFFSET    6
-+#define    RTL8367C_PORT10_MISC_CFG_MAC_LOOPBACK_MASK    0x40
-+#define    RTL8367C_PORT10_MISC_CFG_VLAN_EGRESS_MODE_OFFSET    4
-+#define    RTL8367C_PORT10_MISC_CFG_VLAN_EGRESS_MODE_MASK    0x30
-+#define    RTL8367C_PORT10_MISC_CFG_CONGESTION_SUSTAIN_TIME_OFFSET    0
-+#define    RTL8367C_PORT10_MISC_CFG_CONGESTION_SUSTAIN_TIME_MASK    0xF
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT10_RATE_CTRL0    0x014f
-+
-+#define    RTL8367C_REG_INGRESSBW_PORT10_RATE_CTRL1    0x0150
-+#define    RTL8367C_INGRESSBW_PORT10_RATE_CTRL1_DUMMY_OFFSET    3
-+#define    RTL8367C_INGRESSBW_PORT10_RATE_CTRL1_DUMMY_MASK    0xFFF8
-+#define    RTL8367C_INGRESSBW_PORT10_RATE_CTRL1_INGRESSBW_RATE16_OFFSET    0
-+#define    RTL8367C_INGRESSBW_PORT10_RATE_CTRL1_INGRESSBW_RATE16_MASK    0x7
-+
-+#define    RTL8367C_REG_PORT10_FORCE_RATE0    0x0151
-+
-+#define    RTL8367C_REG_PORT10_FORCE_RATE1    0x0152
-+
-+#define    RTL8367C_REG_PORT10_CURENT_RATE0    0x0153
-+
-+#define    RTL8367C_REG_PORT10_CURENT_RATE1    0x0154
-+
-+#define    RTL8367C_REG_PORT10_PAGE_COUNTER    0x0155
-+#define    RTL8367C_PORT10_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_PORT10_PAGE_COUNTER_MASK    0x7F
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT10_CTRL0    0x0156
-+
-+#define    RTL8367C_REG_PAGEMETER_PORT10_CTRL1    0x0157
-+
-+#define    RTL8367C_REG_PORT10_EEECFG    0x0158
-+#define    RTL8367C_PORT10_EEECFG_EEEP_ENABLE_TX_OFFSET    14
-+#define    RTL8367C_PORT10_EEECFG_EEEP_ENABLE_TX_MASK    0x4000
-+#define    RTL8367C_PORT10_EEECFG_EEEP_ENABLE_RX_OFFSET    13
-+#define    RTL8367C_PORT10_EEECFG_EEEP_ENABLE_RX_MASK    0x2000
-+#define    RTL8367C_PORT10_EEECFG_EEE_FORCE_OFFSET    12
-+#define    RTL8367C_PORT10_EEECFG_EEE_FORCE_MASK    0x1000
-+#define    RTL8367C_PORT10_EEECFG_EEE_100M_OFFSET    11
-+#define    RTL8367C_PORT10_EEECFG_EEE_100M_MASK    0x800
-+#define    RTL8367C_PORT10_EEECFG_EEE_GIGA_500M_OFFSET    10
-+#define    RTL8367C_PORT10_EEECFG_EEE_GIGA_500M_MASK    0x400
-+#define    RTL8367C_PORT10_EEECFG_EEE_TX_OFFSET    9
-+#define    RTL8367C_PORT10_EEECFG_EEE_TX_MASK    0x200
-+#define    RTL8367C_PORT10_EEECFG_EEE_RX_OFFSET    8
-+#define    RTL8367C_PORT10_EEECFG_EEE_RX_MASK    0x100
-+#define    RTL8367C_PORT10_EEECFG_EEE_DSP_RX_OFFSET    6
-+#define    RTL8367C_PORT10_EEECFG_EEE_DSP_RX_MASK    0x40
-+#define    RTL8367C_PORT10_EEECFG_EEE_LPI_OFFSET    5
-+#define    RTL8367C_PORT10_EEECFG_EEE_LPI_MASK    0x20
-+#define    RTL8367C_PORT10_EEECFG_EEE_TX_LPI_OFFSET    4
-+#define    RTL8367C_PORT10_EEECFG_EEE_TX_LPI_MASK    0x10
-+#define    RTL8367C_PORT10_EEECFG_EEE_RX_LPI_OFFSET    3
-+#define    RTL8367C_PORT10_EEECFG_EEE_RX_LPI_MASK    0x8
-+#define    RTL8367C_PORT10_EEECFG_EEE_PAUSE_INDICATOR_OFFSET    2
-+#define    RTL8367C_PORT10_EEECFG_EEE_PAUSE_INDICATOR_MASK    0x4
-+#define    RTL8367C_PORT10_EEECFG_EEE_WAKE_REQ_OFFSET    1
-+#define    RTL8367C_PORT10_EEECFG_EEE_WAKE_REQ_MASK    0x2
-+#define    RTL8367C_PORT10_EEECFG_EEE_SLEEP_REQ_OFFSET    0
-+#define    RTL8367C_PORT10_EEECFG_EEE_SLEEP_REQ_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT10_EEETXMTR    0x0159
-+
-+#define    RTL8367C_REG_PORT10_EEERXMTR    0x015a
-+
-+#define    RTL8367C_REG_PORT10_EEEPTXMTR    0x015b
-+
-+#define    RTL8367C_REG_PORT10_EEEPRXMTR    0x015c
-+
-+#define    RTL8367C_REG_PTP_PORT10_CFG1    0x015e
-+#define    RTL8367C_PTP_PORT10_CFG1_OFFSET    7
-+#define    RTL8367C_PTP_PORT10_CFG1_MASK    0xFF
-+
-+#define    RTL8367C_REG_P10_MSIC1    0x015f
-+#define    RTL8367C_P10_MSIC1_OFFSET    0
-+#define    RTL8367C_P10_MSIC1_MASK    0x1
-+
-+/* (16'h0200)outq_reg */
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE0_DROP_ON    0x0200
-+#define    RTL8367C_FLOWCTRL_QUEUE0_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE0_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE1_DROP_ON    0x0201
-+#define    RTL8367C_FLOWCTRL_QUEUE1_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE1_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE2_DROP_ON    0x0202
-+#define    RTL8367C_FLOWCTRL_QUEUE2_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE2_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE3_DROP_ON    0x0203
-+#define    RTL8367C_FLOWCTRL_QUEUE3_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE3_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE4_DROP_ON    0x0204
-+#define    RTL8367C_FLOWCTRL_QUEUE4_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE4_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE5_DROP_ON    0x0205
-+#define    RTL8367C_FLOWCTRL_QUEUE5_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE5_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE6_DROP_ON    0x0206
-+#define    RTL8367C_FLOWCTRL_QUEUE6_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE6_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE7_DROP_ON    0x0207
-+#define    RTL8367C_FLOWCTRL_QUEUE7_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE7_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT0_DROP_ON    0x0208
-+#define    RTL8367C_FLOWCTRL_PORT0_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT0_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT1_DROP_ON    0x0209
-+#define    RTL8367C_FLOWCTRL_PORT1_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT1_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT2_DROP_ON    0x020a
-+#define    RTL8367C_FLOWCTRL_PORT2_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT2_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT3_DROP_ON    0x020b
-+#define    RTL8367C_FLOWCTRL_PORT3_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT3_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT4_DROP_ON    0x020c
-+#define    RTL8367C_FLOWCTRL_PORT4_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT4_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT5_DROP_ON    0x020d
-+#define    RTL8367C_FLOWCTRL_PORT5_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT5_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT6_DROP_ON    0x020e
-+#define    RTL8367C_FLOWCTRL_PORT6_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT6_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT7_DROP_ON    0x020f
-+#define    RTL8367C_FLOWCTRL_PORT7_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT7_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT8_DROP_ON    0x0210
-+#define    RTL8367C_FLOWCTRL_PORT8_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT8_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT9_DROP_ON    0x0211
-+#define    RTL8367C_FLOWCTRL_PORT9_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT9_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT10_DROP_ON    0x0212
-+#define    RTL8367C_FLOWCTRL_PORT10_DROP_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT10_DROP_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT_GAP    0x0218
-+#define    RTL8367C_FLOWCTRL_PORT_GAP_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT_GAP_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE_GAP    0x0219
-+#define    RTL8367C_FLOWCTRL_QUEUE_GAP_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE_GAP_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_QEMPTY    0x022d
-+#define    RTL8367C_PORT_QEMPTY_OFFSET    0
-+#define    RTL8367C_PORT_QEMPTY_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_DEBUG_CTRL0    0x022e
-+#define    RTL8367C_FLOWCTRL_DEBUG_CTRL0_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_DEBUG_CTRL0_MASK    0xF
-+
-+#define    RTL8367C_REG_FLOWCTRL_DEBUG_CTRL1    0x022f
-+#define    RTL8367C_TOTAL_OFFSET    9
-+#define    RTL8367C_TOTAL_MASK    0x200
-+#define    RTL8367C_PORT_MAX_OFFSET    8
-+#define    RTL8367C_PORT_MAX_MASK    0x100
-+#define    RTL8367C_QMAX_MASK_OFFSET    0
-+#define    RTL8367C_QMAX_MASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE0_PAGE_COUNT    0x0230
-+#define    RTL8367C_FLOWCTRL_QUEUE0_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE0_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE1_PAGE_COUNT    0x0231
-+#define    RTL8367C_FLOWCTRL_QUEUE1_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE1_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE2_PAGE_COUNT    0x0232
-+#define    RTL8367C_FLOWCTRL_QUEUE2_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE2_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE3_PAGE_COUNT    0x0233
-+#define    RTL8367C_FLOWCTRL_QUEUE3_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE3_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE4_PAGE_COUNT    0x0234
-+#define    RTL8367C_FLOWCTRL_QUEUE4_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE4_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE5_PAGE_COUNT    0x0235
-+#define    RTL8367C_FLOWCTRL_QUEUE5_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE5_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE6_PAGE_COUNT    0x0236
-+#define    RTL8367C_FLOWCTRL_QUEUE6_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE6_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE7_PAGE_COUNT    0x0237
-+#define    RTL8367C_FLOWCTRL_QUEUE7_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE7_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT_PAGE_COUNT    0x0238
-+#define    RTL8367C_FLOWCTRL_PORT_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE0_MAX_PAGE_COUNT    0x0239
-+#define    RTL8367C_FLOWCTRL_QUEUE0_MAX_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE0_MAX_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE1_MAX_PAGE_COUNT    0x023a
-+#define    RTL8367C_FLOWCTRL_QUEUE1_MAX_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE1_MAX_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE2_MAX_PAGE_COUNT    0x023b
-+#define    RTL8367C_FLOWCTRL_QUEUE2_MAX_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE2_MAX_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE3_MAX_PAGE_COUNT    0x023c
-+#define    RTL8367C_FLOWCTRL_QUEUE3_MAX_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE3_MAX_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE4_MAX_PAGE_COUNT    0x023d
-+#define    RTL8367C_FLOWCTRL_QUEUE4_MAX_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE4_MAX_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE5_MAX_PAGE_COUNT    0x023e
-+#define    RTL8367C_FLOWCTRL_QUEUE5_MAX_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE5_MAX_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE6_MAX_PAGE_COUNT    0x023f
-+#define    RTL8367C_FLOWCTRL_QUEUE6_MAX_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE6_MAX_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_QUEUE7_MAX_PAGE_COUNT    0x0240
-+#define    RTL8367C_FLOWCTRL_QUEUE7_MAX_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_QUEUE7_MAX_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT_MAX_PAGE_COUNT    0x0241
-+#define    RTL8367C_FLOWCTRL_PORT_MAX_PAGE_COUNT_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT_MAX_PAGE_COUNT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_TOTAL_PACKET_COUNT    0x0243
-+
-+#define    RTL8367C_REG_HIGH_QUEUE_MASK0    0x0244
-+#define    RTL8367C_PORT1_HIGH_QUEUE_MASK_OFFSET    8
-+#define    RTL8367C_PORT1_HIGH_QUEUE_MASK_MASK    0xFF00
-+#define    RTL8367C_PORT0_HIGH_QUEUE_MASK_OFFSET    0
-+#define    RTL8367C_PORT0_HIGH_QUEUE_MASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_HIGH_QUEUE_MASK1    0x0245
-+#define    RTL8367C_PORT3_HIGH_QUEUE_MASK_OFFSET    8
-+#define    RTL8367C_PORT3_HIGH_QUEUE_MASK_MASK    0xFF00
-+#define    RTL8367C_PORT2_HIGH_QUEUE_MASK_OFFSET    0
-+#define    RTL8367C_PORT2_HIGH_QUEUE_MASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_HIGH_QUEUE_MASK2    0x0246
-+#define    RTL8367C_PORT5_HIGH_QUEUE_MASK_OFFSET    8
-+#define    RTL8367C_PORT5_HIGH_QUEUE_MASK_MASK    0xFF00
-+#define    RTL8367C_PORT4_HIGH_QUEUE_MASK_OFFSET    0
-+#define    RTL8367C_PORT4_HIGH_QUEUE_MASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_HIGH_QUEUE_MASK3    0x0247
-+#define    RTL8367C_PORT7_HIGH_QUEUE_MASK_OFFSET    8
-+#define    RTL8367C_PORT7_HIGH_QUEUE_MASK_MASK    0xFF00
-+#define    RTL8367C_PORT6_HIGH_QUEUE_MASK_OFFSET    0
-+#define    RTL8367C_PORT6_HIGH_QUEUE_MASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_HIGH_QUEUE_MASK4    0x0248
-+#define    RTL8367C_PORT9_HIGH_QUEUE_MASK_OFFSET    8
-+#define    RTL8367C_PORT9_HIGH_QUEUE_MASK_MASK    0xFF00
-+#define    RTL8367C_PORT8_HIGH_QUEUE_MASK_OFFSET    0
-+#define    RTL8367C_PORT8_HIGH_QUEUE_MASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_HIGH_QUEUE_MASK5    0x0249
-+#define    RTL8367C_HIGH_QUEUE_MASK5_OFFSET    0
-+#define    RTL8367C_HIGH_QUEUE_MASK5_MASK    0xFF
-+
-+#define    RTL8367C_REG_LOW_QUEUE_TH    0x024c
-+#define    RTL8367C_LOW_QUEUE_TH_OFFSET    0
-+#define    RTL8367C_LOW_QUEUE_TH_MASK    0x7FF
-+
-+#define    RTL8367C_REG_TH_TX_PREFET    0x0250
-+#define    RTL8367C_TH_TX_PREFET_OFFSET    0
-+#define    RTL8367C_TH_TX_PREFET_MASK    0xFF
-+
-+#define    RTL8367C_REG_DUMMY_0251    0x0251
-+
-+#define    RTL8367C_REG_DUMMY_0252    0x0252
-+
-+#define    RTL8367C_REG_DUMMY_0253    0x0253
-+
-+#define    RTL8367C_REG_DUMMY_0254    0x0254
-+
-+#define    RTL8367C_REG_DUMMY_0255    0x0255
-+
-+#define    RTL8367C_REG_DUMMY_0256    0x0256
-+
-+#define    RTL8367C_REG_DUMMY_0257    0x0257
-+
-+#define    RTL8367C_REG_DUMMY_0258    0x0258
-+
-+#define    RTL8367C_REG_DUMMY_0259    0x0259
-+
-+#define    RTL8367C_REG_DUMMY_025A    0x025A
-+
-+#define    RTL8367C_REG_DUMMY_025B    0x025B
-+
-+#define    RTL8367C_REG_DUMMY_025C    0x025C
-+
-+#define    RTL8367C_REG_Q_TXPKT_CNT_CTL    0x025d
-+#define    RTL8367C_QUEUE_PKT_CNT_CLR_OFFSET    4
-+#define    RTL8367C_QUEUE_PKT_CNT_CLR_MASK    0x10
-+#define    RTL8367C_PORT_ID_QUEUE_PKT_CNT_OFFSET    0
-+#define    RTL8367C_PORT_ID_QUEUE_PKT_CNT_MASK    0xF
-+
-+#define    RTL8367C_REG_Q0_TXPKT_CNT_L    0x025e
-+
-+#define    RTL8367C_REG_Q0_TXPKT_CNT_H    0x025f
-+
-+#define    RTL8367C_REG_Q1_TXPKT_CNT_L    0x0260
-+
-+#define    RTL8367C_REG_Q1_TXPKT_CNT_H    0x0261
-+
-+#define    RTL8367C_REG_Q2_TXPKT_CNT_L    0x0262
-+
-+#define    RTL8367C_REG_Q2_TXPKT_CNT_H    0x0263
-+
-+#define    RTL8367C_REG_Q3_TXPKT_CNT_L    0x0264
-+
-+#define    RTL8367C_REG_Q3_TXPKT_CNT_H    0x0265
-+
-+#define    RTL8367C_REG_Q4_TXPKT_CNT_L    0x0266
-+
-+#define    RTL8367C_REG_Q4_TXPKT_CNT_H    0x0267
-+
-+#define    RTL8367C_REG_Q5_TXPKT_CNT_L    0x0268
-+
-+#define    RTL8367C_REG_Q5_TXPKT_CNT_H    0x0269
-+
-+#define    RTL8367C_REG_Q6_TXPKT_CNT_L    0x026a
-+
-+#define    RTL8367C_REG_Q6_TXPKT_CNT_H    0x026b
-+
-+#define    RTL8367C_REG_Q7_TXPKT_CNT_L    0x026c
-+
-+#define    RTL8367C_REG_Q7_TXPKT_CNT_H    0x026d
-+
-+/* (16'h0300)sch_reg */
-+
-+#define    RTL8367C_REG_SCHEDULE_WFQ_CTRL    0x0300
-+#define    RTL8367C_SCHEDULE_WFQ_CTRL_OFFSET    0
-+#define    RTL8367C_SCHEDULE_WFQ_CTRL_MASK    0x1
-+
-+#define    RTL8367C_REG_SCHEDULE_WFQ_BURST_SIZE    0x0301
-+
-+#define    RTL8367C_REG_SCHEDULE_QUEUE_TYPE_CTRL0    0x0302
-+#define    RTL8367C_PORT1_QUEUE7_TYPE_OFFSET    15
-+#define    RTL8367C_PORT1_QUEUE7_TYPE_MASK    0x8000
-+#define    RTL8367C_PORT1_QUEUE6_TYPE_OFFSET    14
-+#define    RTL8367C_PORT1_QUEUE6_TYPE_MASK    0x4000
-+#define    RTL8367C_PORT1_QUEUE5_TYPE_OFFSET    13
-+#define    RTL8367C_PORT1_QUEUE5_TYPE_MASK    0x2000
-+#define    RTL8367C_PORT1_QUEUE4_TYPE_OFFSET    12
-+#define    RTL8367C_PORT1_QUEUE4_TYPE_MASK    0x1000
-+#define    RTL8367C_PORT1_QUEUE3_TYPE_OFFSET    11
-+#define    RTL8367C_PORT1_QUEUE3_TYPE_MASK    0x800
-+#define    RTL8367C_PORT1_QUEUE2_TYPE_OFFSET    10
-+#define    RTL8367C_PORT1_QUEUE2_TYPE_MASK    0x400
-+#define    RTL8367C_PORT1_QUEUE1_TYPE_OFFSET    9
-+#define    RTL8367C_PORT1_QUEUE1_TYPE_MASK    0x200
-+#define    RTL8367C_PORT1_QUEUE0_TYPE_OFFSET    8
-+#define    RTL8367C_PORT1_QUEUE0_TYPE_MASK    0x100
-+#define    RTL8367C_PORT0_QUEUE7_TYPE_OFFSET    7
-+#define    RTL8367C_PORT0_QUEUE7_TYPE_MASK    0x80
-+#define    RTL8367C_PORT0_QUEUE6_TYPE_OFFSET    6
-+#define    RTL8367C_PORT0_QUEUE6_TYPE_MASK    0x40
-+#define    RTL8367C_PORT0_QUEUE5_TYPE_OFFSET    5
-+#define    RTL8367C_PORT0_QUEUE5_TYPE_MASK    0x20
-+#define    RTL8367C_PORT0_QUEUE4_TYPE_OFFSET    4
-+#define    RTL8367C_PORT0_QUEUE4_TYPE_MASK    0x10
-+#define    RTL8367C_PORT0_QUEUE3_TYPE_OFFSET    3
-+#define    RTL8367C_PORT0_QUEUE3_TYPE_MASK    0x8
-+#define    RTL8367C_PORT0_QUEUE2_TYPE_OFFSET    2
-+#define    RTL8367C_PORT0_QUEUE2_TYPE_MASK    0x4
-+#define    RTL8367C_PORT0_QUEUE1_TYPE_OFFSET    1
-+#define    RTL8367C_PORT0_QUEUE1_TYPE_MASK    0x2
-+#define    RTL8367C_PORT0_QUEUE0_TYPE_OFFSET    0
-+#define    RTL8367C_PORT0_QUEUE0_TYPE_MASK    0x1
-+
-+#define    RTL8367C_REG_SCHEDULE_QUEUE_TYPE_CTRL1    0x0303
-+#define    RTL8367C_PORT3_QUEUE7_TYPE_OFFSET    15
-+#define    RTL8367C_PORT3_QUEUE7_TYPE_MASK    0x8000
-+#define    RTL8367C_PORT3_QUEUE6_TYPE_OFFSET    14
-+#define    RTL8367C_PORT3_QUEUE6_TYPE_MASK    0x4000
-+#define    RTL8367C_PORT3_QUEUE5_TYPE_OFFSET    13
-+#define    RTL8367C_PORT3_QUEUE5_TYPE_MASK    0x2000
-+#define    RTL8367C_PORT3_QUEUE4_TYPE_OFFSET    12
-+#define    RTL8367C_PORT3_QUEUE4_TYPE_MASK    0x1000
-+#define    RTL8367C_PORT3_QUEUE3_TYPE_OFFSET    11
-+#define    RTL8367C_PORT3_QUEUE3_TYPE_MASK    0x800
-+#define    RTL8367C_PORT3_QUEUE2_TYPE_OFFSET    10
-+#define    RTL8367C_PORT3_QUEUE2_TYPE_MASK    0x400
-+#define    RTL8367C_PORT3_QUEUE1_TYPE_OFFSET    9
-+#define    RTL8367C_PORT3_QUEUE1_TYPE_MASK    0x200
-+#define    RTL8367C_PORT3_QUEUE0_TYPE_OFFSET    8
-+#define    RTL8367C_PORT3_QUEUE0_TYPE_MASK    0x100
-+#define    RTL8367C_PORT2_QUEUE7_TYPE_OFFSET    7
-+#define    RTL8367C_PORT2_QUEUE7_TYPE_MASK    0x80
-+#define    RTL8367C_PORT2_QUEUE6_TYPE_OFFSET    6
-+#define    RTL8367C_PORT2_QUEUE6_TYPE_MASK    0x40
-+#define    RTL8367C_PORT2_QUEUE5_TYPE_OFFSET    5
-+#define    RTL8367C_PORT2_QUEUE5_TYPE_MASK    0x20
-+#define    RTL8367C_PORT2_QUEUE4_TYPE_OFFSET    4
-+#define    RTL8367C_PORT2_QUEUE4_TYPE_MASK    0x10
-+#define    RTL8367C_PORT2_QUEUE3_TYPE_OFFSET    3
-+#define    RTL8367C_PORT2_QUEUE3_TYPE_MASK    0x8
-+#define    RTL8367C_PORT2_QUEUE2_TYPE_OFFSET    2
-+#define    RTL8367C_PORT2_QUEUE2_TYPE_MASK    0x4
-+#define    RTL8367C_PORT2_QUEUE1_TYPE_OFFSET    1
-+#define    RTL8367C_PORT2_QUEUE1_TYPE_MASK    0x2
-+#define    RTL8367C_PORT2_QUEUE0_TYPE_OFFSET    0
-+#define    RTL8367C_PORT2_QUEUE0_TYPE_MASK    0x1
-+
-+#define    RTL8367C_REG_SCHEDULE_QUEUE_TYPE_CTRL2    0x0304
-+#define    RTL8367C_PORT5_QUEUE7_TYPE_OFFSET    15
-+#define    RTL8367C_PORT5_QUEUE7_TYPE_MASK    0x8000
-+#define    RTL8367C_PORT5_QUEUE6_TYPE_OFFSET    14
-+#define    RTL8367C_PORT5_QUEUE6_TYPE_MASK    0x4000
-+#define    RTL8367C_PORT5_QUEUE5_TYPE_OFFSET    13
-+#define    RTL8367C_PORT5_QUEUE5_TYPE_MASK    0x2000
-+#define    RTL8367C_PORT5_QUEUE4_TYPE_OFFSET    12
-+#define    RTL8367C_PORT5_QUEUE4_TYPE_MASK    0x1000
-+#define    RTL8367C_PORT5_QUEUE3_TYPE_OFFSET    11
-+#define    RTL8367C_PORT5_QUEUE3_TYPE_MASK    0x800
-+#define    RTL8367C_PORT5_QUEUE2_TYPE_OFFSET    10
-+#define    RTL8367C_PORT5_QUEUE2_TYPE_MASK    0x400
-+#define    RTL8367C_PORT5_QUEUE1_TYPE_OFFSET    9
-+#define    RTL8367C_PORT5_QUEUE1_TYPE_MASK    0x200
-+#define    RTL8367C_PORT5_QUEUE0_TYPE_OFFSET    8
-+#define    RTL8367C_PORT5_QUEUE0_TYPE_MASK    0x100
-+#define    RTL8367C_PORT4_QUEUE7_TYPE_OFFSET    7
-+#define    RTL8367C_PORT4_QUEUE7_TYPE_MASK    0x80
-+#define    RTL8367C_PORT4_QUEUE6_TYPE_OFFSET    6
-+#define    RTL8367C_PORT4_QUEUE6_TYPE_MASK    0x40
-+#define    RTL8367C_PORT4_QUEUE5_TYPE_OFFSET    5
-+#define    RTL8367C_PORT4_QUEUE5_TYPE_MASK    0x20
-+#define    RTL8367C_PORT4_QUEUE4_TYPE_OFFSET    4
-+#define    RTL8367C_PORT4_QUEUE4_TYPE_MASK    0x10
-+#define    RTL8367C_PORT4_QUEUE3_TYPE_OFFSET    3
-+#define    RTL8367C_PORT4_QUEUE3_TYPE_MASK    0x8
-+#define    RTL8367C_PORT4_QUEUE2_TYPE_OFFSET    2
-+#define    RTL8367C_PORT4_QUEUE2_TYPE_MASK    0x4
-+#define    RTL8367C_PORT4_QUEUE1_TYPE_OFFSET    1
-+#define    RTL8367C_PORT4_QUEUE1_TYPE_MASK    0x2
-+#define    RTL8367C_PORT4_QUEUE0_TYPE_OFFSET    0
-+#define    RTL8367C_PORT4_QUEUE0_TYPE_MASK    0x1
-+
-+#define    RTL8367C_REG_SCHEDULE_QUEUE_TYPE_CTRL3    0x0305
-+#define    RTL8367C_PORT7_QUEUE7_TYPE_OFFSET    15
-+#define    RTL8367C_PORT7_QUEUE7_TYPE_MASK    0x8000
-+#define    RTL8367C_PORT7_QUEUE6_TYPE_OFFSET    14
-+#define    RTL8367C_PORT7_QUEUE6_TYPE_MASK    0x4000
-+#define    RTL8367C_PORT7_QUEUE5_TYPE_OFFSET    13
-+#define    RTL8367C_PORT7_QUEUE5_TYPE_MASK    0x2000
-+#define    RTL8367C_PORT7_QUEUE4_TYPE_OFFSET    12
-+#define    RTL8367C_PORT7_QUEUE4_TYPE_MASK    0x1000
-+#define    RTL8367C_PORT7_QUEUE3_TYPE_OFFSET    11
-+#define    RTL8367C_PORT7_QUEUE3_TYPE_MASK    0x800
-+#define    RTL8367C_PORT7_QUEUE2_TYPE_OFFSET    10
-+#define    RTL8367C_PORT7_QUEUE2_TYPE_MASK    0x400
-+#define    RTL8367C_PORT7_QUEUE1_TYPE_OFFSET    9
-+#define    RTL8367C_PORT7_QUEUE1_TYPE_MASK    0x200
-+#define    RTL8367C_PORT7_QUEUE0_TYPE_OFFSET    8
-+#define    RTL8367C_PORT7_QUEUE0_TYPE_MASK    0x100
-+#define    RTL8367C_PORT6_QUEUE7_TYPE_OFFSET    7
-+#define    RTL8367C_PORT6_QUEUE7_TYPE_MASK    0x80
-+#define    RTL8367C_PORT6_QUEUE6_TYPE_OFFSET    6
-+#define    RTL8367C_PORT6_QUEUE6_TYPE_MASK    0x40
-+#define    RTL8367C_PORT6_QUEUE5_TYPE_OFFSET    5
-+#define    RTL8367C_PORT6_QUEUE5_TYPE_MASK    0x20
-+#define    RTL8367C_PORT6_QUEUE4_TYPE_OFFSET    4
-+#define    RTL8367C_PORT6_QUEUE4_TYPE_MASK    0x10
-+#define    RTL8367C_PORT6_QUEUE3_TYPE_OFFSET    3
-+#define    RTL8367C_PORT6_QUEUE3_TYPE_MASK    0x8
-+#define    RTL8367C_PORT6_QUEUE2_TYPE_OFFSET    2
-+#define    RTL8367C_PORT6_QUEUE2_TYPE_MASK    0x4
-+#define    RTL8367C_PORT6_QUEUE1_TYPE_OFFSET    1
-+#define    RTL8367C_PORT6_QUEUE1_TYPE_MASK    0x2
-+#define    RTL8367C_SCHEDULE_QUEUE_TYPE_CTRL3_PORT6_QUEUE0_TYPE_OFFSET    0
-+#define    RTL8367C_SCHEDULE_QUEUE_TYPE_CTRL3_PORT6_QUEUE0_TYPE_MASK    0x1
-+
-+#define    RTL8367C_REG_SCHEDULE_QUEUE_TYPE_CTRL4    0x0306
-+#define    RTL8367C_PORT9_QUEUE7_TYPE_OFFSET    15
-+#define    RTL8367C_PORT9_QUEUE7_TYPE_MASK    0x8000
-+#define    RTL8367C_PORT9_QUEUE6_TYPE_OFFSET    14
-+#define    RTL8367C_PORT9_QUEUE6_TYPE_MASK    0x4000
-+#define    RTL8367C_PORT9_QUEUE5_TYPE_OFFSET    13
-+#define    RTL8367C_PORT9_QUEUE5_TYPE_MASK    0x2000
-+#define    RTL8367C_PORT9_QUEUE4_TYPE_OFFSET    12
-+#define    RTL8367C_PORT9_QUEUE4_TYPE_MASK    0x1000
-+#define    RTL8367C_PORT9_QUEUE3_TYPE_OFFSET    11
-+#define    RTL8367C_PORT9_QUEUE3_TYPE_MASK    0x800
-+#define    RTL8367C_PORT9_QUEUE2_TYPE_OFFSET    10
-+#define    RTL8367C_PORT9_QUEUE2_TYPE_MASK    0x400
-+#define    RTL8367C_PORT9_QUEUE1_TYPE_OFFSET    9
-+#define    RTL8367C_PORT9_QUEUE1_TYPE_MASK    0x200
-+#define    RTL8367C_PORT9_QUEUE0_TYPE_OFFSET    8
-+#define    RTL8367C_PORT9_QUEUE0_TYPE_MASK    0x100
-+#define    RTL8367C_PORT8_QUEUE7_TYPE_OFFSET    7
-+#define    RTL8367C_PORT8_QUEUE7_TYPE_MASK    0x80
-+#define    RTL8367C_PORT8_QUEUE6_TYPE_OFFSET    6
-+#define    RTL8367C_PORT8_QUEUE6_TYPE_MASK    0x40
-+#define    RTL8367C_PORT8_QUEUE5_TYPE_OFFSET    5
-+#define    RTL8367C_PORT8_QUEUE5_TYPE_MASK    0x20
-+#define    RTL8367C_PORT8_QUEUE4_TYPE_OFFSET    4
-+#define    RTL8367C_PORT8_QUEUE4_TYPE_MASK    0x10
-+#define    RTL8367C_PORT8_QUEUE3_TYPE_OFFSET    3
-+#define    RTL8367C_PORT8_QUEUE3_TYPE_MASK    0x8
-+#define    RTL8367C_PORT8_QUEUE2_TYPE_OFFSET    2
-+#define    RTL8367C_PORT8_QUEUE2_TYPE_MASK    0x4
-+#define    RTL8367C_PORT8_QUEUE1_TYPE_OFFSET    1
-+#define    RTL8367C_PORT8_QUEUE1_TYPE_MASK    0x2
-+#define    RTL8367C_SCHEDULE_QUEUE_TYPE_CTRL4_PORT6_QUEUE0_TYPE_OFFSET    0
-+#define    RTL8367C_SCHEDULE_QUEUE_TYPE_CTRL4_PORT6_QUEUE0_TYPE_MASK    0x1
-+
-+#define    RTL8367C_REG_SCHEDULE_QUEUE_TYPE_CTRL5    0x0307
-+#define    RTL8367C_PORT10_QUEUE7_TYPE_OFFSET    7
-+#define    RTL8367C_PORT10_QUEUE7_TYPE_MASK    0x80
-+#define    RTL8367C_PORT10_QUEUE6_TYPE_OFFSET    6
-+#define    RTL8367C_PORT10_QUEUE6_TYPE_MASK    0x40
-+#define    RTL8367C_PORT10_QUEUE5_TYPE_OFFSET    5
-+#define    RTL8367C_PORT10_QUEUE5_TYPE_MASK    0x20
-+#define    RTL8367C_PORT10_QUEUE4_TYPE_OFFSET    4
-+#define    RTL8367C_PORT10_QUEUE4_TYPE_MASK    0x10
-+#define    RTL8367C_PORT10_QUEUE3_TYPE_OFFSET    3
-+#define    RTL8367C_PORT10_QUEUE3_TYPE_MASK    0x8
-+#define    RTL8367C_PORT10_QUEUE2_TYPE_OFFSET    2
-+#define    RTL8367C_PORT10_QUEUE2_TYPE_MASK    0x4
-+#define    RTL8367C_PORT10_QUEUE1_TYPE_OFFSET    1
-+#define    RTL8367C_PORT10_QUEUE1_TYPE_MASK    0x2
-+#define    RTL8367C_PORT10_QUEUE0_TYPE_OFFSET    0
-+#define    RTL8367C_PORT10_QUEUE0_TYPE_MASK    0x1
-+
-+#define    RTL8367C_REG_SCHEDULE_APR_CTRL0    0x030a
-+#define    RTL8367C_PORT10_APR_ENABLE_OFFSET    10
-+#define    RTL8367C_PORT10_APR_ENABLE_MASK    0x400
-+#define    RTL8367C_PORT9_APR_ENABLE_OFFSET    9
-+#define    RTL8367C_PORT9_APR_ENABLE_MASK    0x200
-+#define    RTL8367C_PORT8_APR_ENABLE_OFFSET    8
-+#define    RTL8367C_PORT8_APR_ENABLE_MASK    0x100
-+#define    RTL8367C_PORT7_APR_ENABLE_OFFSET    7
-+#define    RTL8367C_PORT7_APR_ENABLE_MASK    0x80
-+#define    RTL8367C_PORT6_APR_ENABLE_OFFSET    6
-+#define    RTL8367C_PORT6_APR_ENABLE_MASK    0x40
-+#define    RTL8367C_PORT5_APR_ENABLE_OFFSET    5
-+#define    RTL8367C_PORT5_APR_ENABLE_MASK    0x20
-+#define    RTL8367C_PORT4_APR_ENABLE_OFFSET    4
-+#define    RTL8367C_PORT4_APR_ENABLE_MASK    0x10
-+#define    RTL8367C_PORT3_APR_ENABLE_OFFSET    3
-+#define    RTL8367C_PORT3_APR_ENABLE_MASK    0x8
-+#define    RTL8367C_PORT2_APR_ENABLE_OFFSET    2
-+#define    RTL8367C_PORT2_APR_ENABLE_MASK    0x4
-+#define    RTL8367C_PORT1_APR_ENABLE_OFFSET    1
-+#define    RTL8367C_PORT1_APR_ENABLE_MASK    0x2
-+#define    RTL8367C_PORT0_APR_ENABLE_OFFSET    0
-+#define    RTL8367C_PORT0_APR_ENABLE_MASK    0x1
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT0_QUEUE0_WFQ_WEIGHT    0x030c
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT0_QUEUE1_WFQ_WEIGHT    0x030d
-+#define    RTL8367C_SCHEDULE_PORT0_QUEUE1_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT0_QUEUE1_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT0_QUEUE2_WFQ_WEIGHT    0x030e
-+#define    RTL8367C_SCHEDULE_PORT0_QUEUE2_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT0_QUEUE2_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT0_QUEUE3_WFQ_WEIGHT    0x030f
-+#define    RTL8367C_SCHEDULE_PORT0_QUEUE3_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT0_QUEUE3_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT0_QUEUE4_WFQ_WEIGHT    0x0310
-+#define    RTL8367C_SCHEDULE_PORT0_QUEUE4_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT0_QUEUE4_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT0_QUEUE5_WFQ_WEIGHT    0x0311
-+#define    RTL8367C_SCHEDULE_PORT0_QUEUE5_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT0_QUEUE5_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT0_QUEUE6_WFQ_WEIGHT    0x0312
-+#define    RTL8367C_SCHEDULE_PORT0_QUEUE6_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT0_QUEUE6_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT0_QUEUE7_WFQ_WEIGHT    0x0313
-+#define    RTL8367C_SCHEDULE_PORT0_QUEUE7_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT0_QUEUE7_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT1_QUEUE0_WFQ_WEIGHT    0x0314
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT1_QUEUE1_WFQ_WEIGHT    0x0315
-+#define    RTL8367C_SCHEDULE_PORT1_QUEUE1_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT1_QUEUE1_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT1_QUEUE2_WFQ_WEIGHT    0x0316
-+#define    RTL8367C_SCHEDULE_PORT1_QUEUE2_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT1_QUEUE2_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT1_QUEUE3_WFQ_WEIGHT    0x0317
-+#define    RTL8367C_SCHEDULE_PORT1_QUEUE3_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT1_QUEUE3_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT1_QUEUE4_WFQ_WEIGHT    0x0318
-+#define    RTL8367C_SCHEDULE_PORT1_QUEUE4_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT1_QUEUE4_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT1_QUEUE5_WFQ_WEIGHT    0x0319
-+#define    RTL8367C_SCHEDULE_PORT1_QUEUE5_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT1_QUEUE5_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT1_QUEUE6_WFQ_WEIGHT    0x031a
-+#define    RTL8367C_SCHEDULE_PORT1_QUEUE6_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT1_QUEUE6_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT1_QUEUE7_WFQ_WEIGHT    0x031b
-+#define    RTL8367C_SCHEDULE_PORT1_QUEUE7_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT1_QUEUE7_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT2_QUEUE0_WFQ_WEIGHT    0x031c
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT2_QUEUE1_WFQ_WEIGHT    0x031d
-+#define    RTL8367C_SCHEDULE_PORT2_QUEUE1_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT2_QUEUE1_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT2_QUEUE2_WFQ_WEIGHT    0x031e
-+#define    RTL8367C_SCHEDULE_PORT2_QUEUE2_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT2_QUEUE2_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT2_QUEUE3_WFQ_WEIGHT    0x031f
-+#define    RTL8367C_SCHEDULE_PORT2_QUEUE3_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT2_QUEUE3_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT2_QUEUE4_WFQ_WEIGHT    0x0320
-+#define    RTL8367C_SCHEDULE_PORT2_QUEUE4_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT2_QUEUE4_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT2_QUEUE5_WFQ_WEIGHT    0x0321
-+#define    RTL8367C_SCHEDULE_PORT2_QUEUE5_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT2_QUEUE5_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT2_QUEUE6_WFQ_WEIGHT    0x0322
-+#define    RTL8367C_SCHEDULE_PORT2_QUEUE6_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT2_QUEUE6_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT2_QUEUE7_WFQ_WEIGHT    0x0323
-+#define    RTL8367C_SCHEDULE_PORT2_QUEUE7_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT2_QUEUE7_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT3_QUEUE0_WFQ_WEIGHT    0x0324
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT3_QUEUE1_WFQ_WEIGHT    0x0325
-+#define    RTL8367C_SCHEDULE_PORT3_QUEUE1_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT3_QUEUE1_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT3_QUEUE2_WFQ_WEIGHT    0x0326
-+#define    RTL8367C_SCHEDULE_PORT3_QUEUE2_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT3_QUEUE2_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT3_QUEUE3_WFQ_WEIGHT    0x0327
-+#define    RTL8367C_SCHEDULE_PORT3_QUEUE3_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT3_QUEUE3_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT3_QUEUE4_WFQ_WEIGHT    0x0328
-+#define    RTL8367C_SCHEDULE_PORT3_QUEUE4_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT3_QUEUE4_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT3_QUEUE5_WFQ_WEIGHT    0x0329
-+#define    RTL8367C_SCHEDULE_PORT3_QUEUE5_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT3_QUEUE5_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT3_QUEUE6_WFQ_WEIGHT    0x032a
-+#define    RTL8367C_SCHEDULE_PORT3_QUEUE6_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT3_QUEUE6_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT3_QUEUE7_WFQ_WEIGHT    0x032b
-+#define    RTL8367C_SCHEDULE_PORT3_QUEUE7_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT3_QUEUE7_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT4_QUEUE0_WFQ_WEIGHT    0x032c
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT4_QUEUE1_WFQ_WEIGHT    0x032d
-+#define    RTL8367C_SCHEDULE_PORT4_QUEUE1_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT4_QUEUE1_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT4_QUEUE2_WFQ_WEIGHT    0x032e
-+#define    RTL8367C_SCHEDULE_PORT4_QUEUE2_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT4_QUEUE2_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT4_QUEUE3_WFQ_WEIGHT    0x032f
-+#define    RTL8367C_SCHEDULE_PORT4_QUEUE3_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT4_QUEUE3_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT4_QUEUE4_WFQ_WEIGHT    0x0330
-+#define    RTL8367C_SCHEDULE_PORT4_QUEUE4_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT4_QUEUE4_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT4_QUEUE5_WFQ_WEIGHT    0x0331
-+#define    RTL8367C_SCHEDULE_PORT4_QUEUE5_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT4_QUEUE5_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT4_QUEUE6_WFQ_WEIGHT    0x0332
-+#define    RTL8367C_SCHEDULE_PORT4_QUEUE6_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT4_QUEUE6_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT4_QUEUE7_WFQ_WEIGHT    0x0333
-+#define    RTL8367C_SCHEDULE_PORT4_QUEUE7_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT4_QUEUE7_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT5_QUEUE0_WFQ_WEIGHT    0x0334
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT5_QUEUE1_WFQ_WEIGHT    0x0335
-+#define    RTL8367C_SCHEDULE_PORT5_QUEUE1_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT5_QUEUE1_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT5_QUEUE2_WFQ_WEIGHT    0x0336
-+#define    RTL8367C_SCHEDULE_PORT5_QUEUE2_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT5_QUEUE2_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT5_QUEUE3_WFQ_WEIGHT    0x0337
-+#define    RTL8367C_SCHEDULE_PORT5_QUEUE3_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT5_QUEUE3_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT5_QUEUE4_WFQ_WEIGHT    0x0338
-+#define    RTL8367C_SCHEDULE_PORT5_QUEUE4_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT5_QUEUE4_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT5_QUEUE5_WFQ_WEIGHT    0x0339
-+#define    RTL8367C_SCHEDULE_PORT5_QUEUE5_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT5_QUEUE5_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT5_QUEUE6_WFQ_WEIGHT    0x033a
-+#define    RTL8367C_SCHEDULE_PORT5_QUEUE6_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT5_QUEUE6_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT5_QUEUE7_WFQ_WEIGHT    0x033b
-+#define    RTL8367C_SCHEDULE_PORT5_QUEUE7_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT5_QUEUE7_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT6_QUEUE0_WFQ_WEIGHT    0x033c
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT6_QUEUE1_WFQ_WEIGHT    0x033d
-+#define    RTL8367C_SCHEDULE_PORT6_QUEUE1_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT6_QUEUE1_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT6_QUEUE2_WFQ_WEIGHT    0x033e
-+#define    RTL8367C_SCHEDULE_PORT6_QUEUE2_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT6_QUEUE2_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT6_QUEUE3_WFQ_WEIGHT    0x033f
-+#define    RTL8367C_SCHEDULE_PORT6_QUEUE3_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT6_QUEUE3_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT6_QUEUE4_WFQ_WEIGHT    0x0340
-+#define    RTL8367C_SCHEDULE_PORT6_QUEUE4_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT6_QUEUE4_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT6_QUEUE5_WFQ_WEIGHT    0x0341
-+#define    RTL8367C_SCHEDULE_PORT6_QUEUE5_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT6_QUEUE5_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT6_QUEUE6_WFQ_WEIGHT    0x0342
-+#define    RTL8367C_SCHEDULE_PORT6_QUEUE6_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT6_QUEUE6_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT6_QUEUE7_WFQ_WEIGHT    0x0343
-+#define    RTL8367C_SCHEDULE_PORT6_QUEUE7_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT6_QUEUE7_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT7_QUEUE0_WFQ_WEIGHT    0x0344
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT7_QUEUE1_WFQ_WEIGHT    0x0345
-+#define    RTL8367C_SCHEDULE_PORT7_QUEUE1_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT7_QUEUE1_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT7_QUEUE2_WFQ_WEIGHT    0x0346
-+#define    RTL8367C_SCHEDULE_PORT7_QUEUE2_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT7_QUEUE2_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT7_QUEUE3_WFQ_WEIGHT    0x0347
-+#define    RTL8367C_SCHEDULE_PORT7_QUEUE3_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT7_QUEUE3_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT7_QUEUE4_WFQ_WEIGHT    0x0348
-+#define    RTL8367C_SCHEDULE_PORT7_QUEUE4_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT7_QUEUE4_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT7_QUEUE5_WFQ_WEIGHT    0x0349
-+#define    RTL8367C_SCHEDULE_PORT7_QUEUE5_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT7_QUEUE5_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT7_QUEUE6_WFQ_WEIGHT    0x034a
-+#define    RTL8367C_SCHEDULE_PORT7_QUEUE6_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT7_QUEUE6_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT7_QUEUE7_WFQ_WEIGHT    0x034b
-+#define    RTL8367C_SCHEDULE_PORT7_QUEUE7_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT7_QUEUE7_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT8_QUEUE0_WFQ_WEIGHT    0x034c
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT8_QUEUE1_WFQ_WEIGHT    0x034d
-+#define    RTL8367C_SCHEDULE_PORT8_QUEUE1_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT8_QUEUE1_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT8_QUEUE2_WFQ_WEIGHT    0x034e
-+#define    RTL8367C_SCHEDULE_PORT8_QUEUE2_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT8_QUEUE2_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT8_QUEUE3_WFQ_WEIGHT    0x034f
-+#define    RTL8367C_SCHEDULE_PORT8_QUEUE3_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT8_QUEUE3_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT8_QUEUE4_WFQ_WEIGHT    0x0350
-+#define    RTL8367C_SCHEDULE_PORT8_QUEUE4_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT8_QUEUE4_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT8_QUEUE5_WFQ_WEIGHT    0x0351
-+#define    RTL8367C_SCHEDULE_PORT8_QUEUE5_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT8_QUEUE5_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT8_QUEUE6_WFQ_WEIGHT    0x0352
-+#define    RTL8367C_SCHEDULE_PORT8_QUEUE6_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT8_QUEUE6_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT8_QUEUE7_WFQ_WEIGHT    0x0353
-+#define    RTL8367C_SCHEDULE_PORT8_QUEUE7_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT8_QUEUE7_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT9_QUEUE0_WFQ_WEIGHT    0x0354
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT9_QUEUE1_WFQ_WEIGHT    0x0355
-+#define    RTL8367C_SCHEDULE_PORT9_QUEUE1_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT9_QUEUE1_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT9_QUEUE2_WFQ_WEIGHT    0x0356
-+#define    RTL8367C_SCHEDULE_PORT9_QUEUE2_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT9_QUEUE2_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT9_QUEUE3_WFQ_WEIGHT    0x0357
-+#define    RTL8367C_SCHEDULE_PORT9_QUEUE3_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT9_QUEUE3_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT9_QUEUE4_WFQ_WEIGHT    0x0358
-+#define    RTL8367C_SCHEDULE_PORT9_QUEUE4_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT9_QUEUE4_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT9_QUEUE5_WFQ_WEIGHT    0x0359
-+#define    RTL8367C_SCHEDULE_PORT9_QUEUE5_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT9_QUEUE5_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT9_QUEUE6_WFQ_WEIGHT    0x035a
-+#define    RTL8367C_SCHEDULE_PORT9_QUEUE6_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT9_QUEUE6_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT9_QUEUE7_WFQ_WEIGHT    0x035b
-+#define    RTL8367C_SCHEDULE_PORT9_QUEUE7_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT9_QUEUE7_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT10_QUEUE0_WFQ_WEIGHT    0x035c
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT10_QUEUE1_WFQ_WEIGHT    0x035d
-+#define    RTL8367C_SCHEDULE_PORT10_QUEUE1_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT10_QUEUE1_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT10_QUEUE2_WFQ_WEIGHT    0x035e
-+#define    RTL8367C_SCHEDULE_PORT10_QUEUE2_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT10_QUEUE2_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT10_QUEUE3_WFQ_WEIGHT    0x035f
-+#define    RTL8367C_SCHEDULE_PORT10_QUEUE3_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT10_QUEUE3_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT10_QUEUE4_WFQ_WEIGHT    0x0360
-+#define    RTL8367C_SCHEDULE_PORT10_QUEUE4_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT10_QUEUE4_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT10_QUEUE5_WFQ_WEIGHT    0x0361
-+#define    RTL8367C_SCHEDULE_PORT10_QUEUE5_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT10_QUEUE5_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT10_QUEUE6_WFQ_WEIGHT    0x0362
-+#define    RTL8367C_SCHEDULE_PORT10_QUEUE6_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT10_QUEUE6_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT10_QUEUE7_WFQ_WEIGHT    0x0363
-+#define    RTL8367C_SCHEDULE_PORT10_QUEUE7_WFQ_WEIGHT_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT10_QUEUE7_WFQ_WEIGHT_MASK    0x7F
-+
-+#define    RTL8367C_REG_PORT0_EGRESSBW_CTRL0    0x038c
-+
-+#define    RTL8367C_REG_PORT0_EGRESSBW_CTRL1    0x038d
-+#define    RTL8367C_PORT0_EGRESSBW_CTRL1_OFFSET    0
-+#define    RTL8367C_PORT0_EGRESSBW_CTRL1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT1_EGRESSBW_CTRL0    0x038e
-+
-+#define    RTL8367C_REG_PORT1_EGRESSBW_CTRL1    0x038f
-+#define    RTL8367C_PORT1_EGRESSBW_CTRL1_OFFSET    0
-+#define    RTL8367C_PORT1_EGRESSBW_CTRL1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT2_EGRESSBW_CTRL0    0x0390
-+
-+#define    RTL8367C_REG_PORT2_EGRESSBW_CTRL1    0x0391
-+#define    RTL8367C_PORT2_EGRESSBW_CTRL1_OFFSET    0
-+#define    RTL8367C_PORT2_EGRESSBW_CTRL1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT3_EGRESSBW_CTRL0    0x0392
-+
-+#define    RTL8367C_REG_PORT3_EGRESSBW_CTRL1    0x0393
-+#define    RTL8367C_PORT3_EGRESSBW_CTRL1_OFFSET    0
-+#define    RTL8367C_PORT3_EGRESSBW_CTRL1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT4_EGRESSBW_CTRL0    0x0394
-+
-+#define    RTL8367C_REG_PORT4_EGRESSBW_CTRL1    0x0395
-+#define    RTL8367C_PORT4_EGRESSBW_CTRL1_OFFSET    0
-+#define    RTL8367C_PORT4_EGRESSBW_CTRL1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT5_EGRESSBW_CTRL0    0x0396
-+
-+#define    RTL8367C_REG_PORT5_EGRESSBW_CTRL1    0x0397
-+#define    RTL8367C_PORT5_EGRESSBW_CTRL1_OFFSET    0
-+#define    RTL8367C_PORT5_EGRESSBW_CTRL1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT6_EGRESSBW_CTRL0    0x0398
-+
-+#define    RTL8367C_REG_PORT6_EGRESSBW_CTRL1    0x0399
-+#define    RTL8367C_PORT6_EGRESSBW_CTRL1_OFFSET    0
-+#define    RTL8367C_PORT6_EGRESSBW_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_PORT7_EGRESSBW_CTRL0    0x039a
-+
-+#define    RTL8367C_REG_PORT7_EGRESSBW_CTRL1    0x039b
-+#define    RTL8367C_PORT7_EGRESSBW_CTRL1_OFFSET    0
-+#define    RTL8367C_PORT7_EGRESSBW_CTRL1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT8_EGRESSBW_CTRL0    0x039c
-+
-+#define    RTL8367C_REG_PORT8_EGRESSBW_CTRL1    0x039d
-+#define    RTL8367C_PORT8_EGRESSBW_CTRL1_OFFSET    0
-+#define    RTL8367C_PORT8_EGRESSBW_CTRL1_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT9_EGRESSBW_CTRL0    0x039e
-+
-+#define    RTL8367C_REG_PORT9_EGRESSBW_CTRL1    0x039f
-+#define    RTL8367C_PORT9_EGRESSBW_CTRL1_OFFSET    0
-+#define    RTL8367C_PORT9_EGRESSBW_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_PORT10_EGRESSBW_CTRL0    0x03a0
-+
-+#define    RTL8367C_REG_PORT10_EGRESSBW_CTRL1    0x03a1
-+#define    RTL8367C_PORT10_EGRESSBW_CTRL1_OFFSET    0
-+#define    RTL8367C_PORT10_EGRESSBW_CTRL1_MASK    0x1
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT0_APR_METER_CTRL0    0x03ac
-+#define    RTL8367C_SCHEDULE_PORT0_APR_METER_CTRL0_QUEUE4_APR_METER_OFFSET    12
-+#define    RTL8367C_SCHEDULE_PORT0_APR_METER_CTRL0_QUEUE4_APR_METER_MASK    0x7000
-+#define    RTL8367C_SCHEDULE_PORT0_APR_METER_CTRL0_QUEUE3_APR_METER_OFFSET    9
-+#define    RTL8367C_SCHEDULE_PORT0_APR_METER_CTRL0_QUEUE3_APR_METER_MASK    0xE00
-+#define    RTL8367C_SCHEDULE_PORT0_APR_METER_CTRL0_QUEUE2_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT0_APR_METER_CTRL0_QUEUE2_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT0_APR_METER_CTRL0_QUEUE1_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT0_APR_METER_CTRL0_QUEUE1_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT0_APR_METER_CTRL0_QUEUE0_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT0_APR_METER_CTRL0_QUEUE0_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT0_APR_METER_CTRL1    0x03ad
-+#define    RTL8367C_SCHEDULE_PORT0_APR_METER_CTRL1_QUEUE7_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT0_APR_METER_CTRL1_QUEUE7_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT0_APR_METER_CTRL1_QUEUE6_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT0_APR_METER_CTRL1_QUEUE6_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT0_APR_METER_CTRL1_QUEUE5_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT0_APR_METER_CTRL1_QUEUE5_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT1_APR_METER_CTRL0    0x03b0
-+#define    RTL8367C_SCHEDULE_PORT1_APR_METER_CTRL0_QUEUE4_APR_METER_OFFSET    12
-+#define    RTL8367C_SCHEDULE_PORT1_APR_METER_CTRL0_QUEUE4_APR_METER_MASK    0x7000
-+#define    RTL8367C_SCHEDULE_PORT1_APR_METER_CTRL0_QUEUE3_APR_METER_OFFSET    9
-+#define    RTL8367C_SCHEDULE_PORT1_APR_METER_CTRL0_QUEUE3_APR_METER_MASK    0xE00
-+#define    RTL8367C_SCHEDULE_PORT1_APR_METER_CTRL0_QUEUE2_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT1_APR_METER_CTRL0_QUEUE2_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT1_APR_METER_CTRL0_QUEUE1_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT1_APR_METER_CTRL0_QUEUE1_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT1_APR_METER_CTRL0_QUEUE0_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT1_APR_METER_CTRL0_QUEUE0_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT1_APR_METER_CTRL1    0x03b1
-+#define    RTL8367C_SCHEDULE_PORT1_APR_METER_CTRL1_QUEUE7_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT1_APR_METER_CTRL1_QUEUE7_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT1_APR_METER_CTRL1_QUEUE6_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT1_APR_METER_CTRL1_QUEUE6_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT1_APR_METER_CTRL1_QUEUE5_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT1_APR_METER_CTRL1_QUEUE5_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT2_APR_METER_CTRL0    0x03b4
-+#define    RTL8367C_SCHEDULE_PORT2_APR_METER_CTRL0_QUEUE4_APR_METER_OFFSET    12
-+#define    RTL8367C_SCHEDULE_PORT2_APR_METER_CTRL0_QUEUE4_APR_METER_MASK    0x7000
-+#define    RTL8367C_SCHEDULE_PORT2_APR_METER_CTRL0_QUEUE3_APR_METER_OFFSET    9
-+#define    RTL8367C_SCHEDULE_PORT2_APR_METER_CTRL0_QUEUE3_APR_METER_MASK    0xE00
-+#define    RTL8367C_SCHEDULE_PORT2_APR_METER_CTRL0_QUEUE2_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT2_APR_METER_CTRL0_QUEUE2_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT2_APR_METER_CTRL0_QUEUE1_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT2_APR_METER_CTRL0_QUEUE1_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT2_APR_METER_CTRL0_QUEUE0_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT2_APR_METER_CTRL0_QUEUE0_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT2_APR_METER_CTRL1    0x03b5
-+#define    RTL8367C_SCHEDULE_PORT2_APR_METER_CTRL1_QUEUE7_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT2_APR_METER_CTRL1_QUEUE7_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT2_APR_METER_CTRL1_QUEUE6_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT2_APR_METER_CTRL1_QUEUE6_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT2_APR_METER_CTRL1_QUEUE5_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT2_APR_METER_CTRL1_QUEUE5_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT3_APR_METER_CTRL0    0x03b8
-+#define    RTL8367C_SCHEDULE_PORT3_APR_METER_CTRL0_QUEUE4_APR_METER_OFFSET    12
-+#define    RTL8367C_SCHEDULE_PORT3_APR_METER_CTRL0_QUEUE4_APR_METER_MASK    0x7000
-+#define    RTL8367C_SCHEDULE_PORT3_APR_METER_CTRL0_QUEUE3_APR_METER_OFFSET    9
-+#define    RTL8367C_SCHEDULE_PORT3_APR_METER_CTRL0_QUEUE3_APR_METER_MASK    0xE00
-+#define    RTL8367C_SCHEDULE_PORT3_APR_METER_CTRL0_QUEUE2_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT3_APR_METER_CTRL0_QUEUE2_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT3_APR_METER_CTRL0_QUEUE1_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT3_APR_METER_CTRL0_QUEUE1_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT3_APR_METER_CTRL0_QUEUE0_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT3_APR_METER_CTRL0_QUEUE0_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT3_APR_METER_CTRL1    0x03b9
-+#define    RTL8367C_SCHEDULE_PORT3_APR_METER_CTRL1_QUEUE7_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT3_APR_METER_CTRL1_QUEUE7_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT3_APR_METER_CTRL1_QUEUE6_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT3_APR_METER_CTRL1_QUEUE6_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT3_APR_METER_CTRL1_QUEUE5_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT3_APR_METER_CTRL1_QUEUE5_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT4_APR_METER_CTRL0    0x03bc
-+#define    RTL8367C_SCHEDULE_PORT4_APR_METER_CTRL0_QUEUE4_APR_METER_OFFSET    12
-+#define    RTL8367C_SCHEDULE_PORT4_APR_METER_CTRL0_QUEUE4_APR_METER_MASK    0x7000
-+#define    RTL8367C_SCHEDULE_PORT4_APR_METER_CTRL0_QUEUE3_APR_METER_OFFSET    9
-+#define    RTL8367C_SCHEDULE_PORT4_APR_METER_CTRL0_QUEUE3_APR_METER_MASK    0xE00
-+#define    RTL8367C_SCHEDULE_PORT4_APR_METER_CTRL0_QUEUE2_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT4_APR_METER_CTRL0_QUEUE2_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT4_APR_METER_CTRL0_QUEUE1_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT4_APR_METER_CTRL0_QUEUE1_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT4_APR_METER_CTRL0_QUEUE0_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT4_APR_METER_CTRL0_QUEUE0_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT4_APR_METER_CTRL1    0x03bd
-+#define    RTL8367C_SCHEDULE_PORT4_APR_METER_CTRL1_QUEUE7_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT4_APR_METER_CTRL1_QUEUE7_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT4_APR_METER_CTRL1_QUEUE6_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT4_APR_METER_CTRL1_QUEUE6_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT4_APR_METER_CTRL1_QUEUE5_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT4_APR_METER_CTRL1_QUEUE5_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT5_APR_METER_CTRL0    0x03c0
-+#define    RTL8367C_SCHEDULE_PORT5_APR_METER_CTRL0_QUEUE4_APR_METER_OFFSET    12
-+#define    RTL8367C_SCHEDULE_PORT5_APR_METER_CTRL0_QUEUE4_APR_METER_MASK    0x7000
-+#define    RTL8367C_SCHEDULE_PORT5_APR_METER_CTRL0_QUEUE3_APR_METER_OFFSET    9
-+#define    RTL8367C_SCHEDULE_PORT5_APR_METER_CTRL0_QUEUE3_APR_METER_MASK    0xE00
-+#define    RTL8367C_SCHEDULE_PORT5_APR_METER_CTRL0_QUEUE2_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT5_APR_METER_CTRL0_QUEUE2_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT5_APR_METER_CTRL0_QUEUE1_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT5_APR_METER_CTRL0_QUEUE1_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT5_APR_METER_CTRL0_QUEUE0_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT5_APR_METER_CTRL0_QUEUE0_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT5_APR_METER_CTRL1    0x03c1
-+#define    RTL8367C_SCHEDULE_PORT5_APR_METER_CTRL1_QUEUE7_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT5_APR_METER_CTRL1_QUEUE7_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT5_APR_METER_CTRL1_QUEUE6_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT5_APR_METER_CTRL1_QUEUE6_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT5_APR_METER_CTRL1_QUEUE5_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT5_APR_METER_CTRL1_QUEUE5_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT6_APR_METER_CTRL0    0x03c4
-+#define    RTL8367C_SCHEDULE_PORT6_APR_METER_CTRL0_QUEUE4_APR_METER_OFFSET    12
-+#define    RTL8367C_SCHEDULE_PORT6_APR_METER_CTRL0_QUEUE4_APR_METER_MASK    0x7000
-+#define    RTL8367C_SCHEDULE_PORT6_APR_METER_CTRL0_QUEUE3_APR_METER_OFFSET    9
-+#define    RTL8367C_SCHEDULE_PORT6_APR_METER_CTRL0_QUEUE3_APR_METER_MASK    0xE00
-+#define    RTL8367C_SCHEDULE_PORT6_APR_METER_CTRL0_QUEUE2_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT6_APR_METER_CTRL0_QUEUE2_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT6_APR_METER_CTRL0_QUEUE1_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT6_APR_METER_CTRL0_QUEUE1_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT6_APR_METER_CTRL0_QUEUE0_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT6_APR_METER_CTRL0_QUEUE0_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT6_APR_METER_CTRL1    0x03c5
-+#define    RTL8367C_SCHEDULE_PORT6_APR_METER_CTRL1_QUEUE7_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT6_APR_METER_CTRL1_QUEUE7_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT6_APR_METER_CTRL1_QUEUE6_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT6_APR_METER_CTRL1_QUEUE6_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT6_APR_METER_CTRL1_QUEUE5_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT6_APR_METER_CTRL1_QUEUE5_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT7_APR_METER_CTRL0    0x03c8
-+#define    RTL8367C_SCHEDULE_PORT7_APR_METER_CTRL0_QUEUE4_APR_METER_OFFSET    12
-+#define    RTL8367C_SCHEDULE_PORT7_APR_METER_CTRL0_QUEUE4_APR_METER_MASK    0x7000
-+#define    RTL8367C_SCHEDULE_PORT7_APR_METER_CTRL0_QUEUE3_APR_METER_OFFSET    9
-+#define    RTL8367C_SCHEDULE_PORT7_APR_METER_CTRL0_QUEUE3_APR_METER_MASK    0xE00
-+#define    RTL8367C_SCHEDULE_PORT7_APR_METER_CTRL0_QUEUE2_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT7_APR_METER_CTRL0_QUEUE2_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT7_APR_METER_CTRL0_QUEUE1_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT7_APR_METER_CTRL0_QUEUE1_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT7_APR_METER_CTRL0_QUEUE0_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT7_APR_METER_CTRL0_QUEUE0_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT7_APR_METER_CTRL1    0x03c9
-+#define    RTL8367C_SCHEDULE_PORT7_APR_METER_CTRL1_QUEUE7_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT7_APR_METER_CTRL1_QUEUE7_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT7_APR_METER_CTRL1_QUEUE6_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT7_APR_METER_CTRL1_QUEUE6_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT7_APR_METER_CTRL1_QUEUE5_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT7_APR_METER_CTRL1_QUEUE5_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT8_APR_METER_CTRL0    0x03ca
-+#define    RTL8367C_SCHEDULE_PORT8_APR_METER_CTRL0_QUEUE4_APR_METER_OFFSET    12
-+#define    RTL8367C_SCHEDULE_PORT8_APR_METER_CTRL0_QUEUE4_APR_METER_MASK    0x7000
-+#define    RTL8367C_SCHEDULE_PORT8_APR_METER_CTRL0_QUEUE3_APR_METER_OFFSET    9
-+#define    RTL8367C_SCHEDULE_PORT8_APR_METER_CTRL0_QUEUE3_APR_METER_MASK    0xE00
-+#define    RTL8367C_SCHEDULE_PORT8_APR_METER_CTRL0_QUEUE2_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT8_APR_METER_CTRL0_QUEUE2_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT8_APR_METER_CTRL0_QUEUE1_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT8_APR_METER_CTRL0_QUEUE1_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT8_APR_METER_CTRL0_QUEUE0_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT8_APR_METER_CTRL0_QUEUE0_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT8_APR_METER_CTRL1    0x03cb
-+#define    RTL8367C_SCHEDULE_PORT8_APR_METER_CTRL1_QUEUE7_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT8_APR_METER_CTRL1_QUEUE7_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT8_APR_METER_CTRL1_QUEUE6_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT8_APR_METER_CTRL1_QUEUE6_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT8_APR_METER_CTRL1_QUEUE5_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT8_APR_METER_CTRL1_QUEUE5_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT9_APR_METER_CTRL0    0x03cc
-+#define    RTL8367C_SCHEDULE_PORT9_APR_METER_CTRL0_QUEUE4_APR_METER_OFFSET    12
-+#define    RTL8367C_SCHEDULE_PORT9_APR_METER_CTRL0_QUEUE4_APR_METER_MASK    0x7000
-+#define    RTL8367C_SCHEDULE_PORT9_APR_METER_CTRL0_QUEUE3_APR_METER_OFFSET    9
-+#define    RTL8367C_SCHEDULE_PORT9_APR_METER_CTRL0_QUEUE3_APR_METER_MASK    0xE00
-+#define    RTL8367C_SCHEDULE_PORT9_APR_METER_CTRL0_QUEUE2_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT9_APR_METER_CTRL0_QUEUE2_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT9_APR_METER_CTRL0_QUEUE1_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT9_APR_METER_CTRL0_QUEUE1_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT9_APR_METER_CTRL0_QUEUE0_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT9_APR_METER_CTRL0_QUEUE0_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT9_APR_METER_CTRL1    0x03cd
-+#define    RTL8367C_SCHEDULE_PORT9_APR_METER_CTRL1_QUEUE7_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT9_APR_METER_CTRL1_QUEUE7_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT9_APR_METER_CTRL1_QUEUE6_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT9_APR_METER_CTRL1_QUEUE6_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT9_APR_METER_CTRL1_QUEUE5_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT9_APR_METER_CTRL1_QUEUE5_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT10_APR_METER_CTRL0    0x03ce
-+#define    RTL8367C_SCHEDULE_PORT10_APR_METER_CTRL0_QUEUE4_APR_METER_OFFSET    12
-+#define    RTL8367C_SCHEDULE_PORT10_APR_METER_CTRL0_QUEUE4_APR_METER_MASK    0x7000
-+#define    RTL8367C_SCHEDULE_PORT10_APR_METER_CTRL0_QUEUE3_APR_METER_OFFSET    9
-+#define    RTL8367C_SCHEDULE_PORT10_APR_METER_CTRL0_QUEUE3_APR_METER_MASK    0xE00
-+#define    RTL8367C_SCHEDULE_PORT10_APR_METER_CTRL0_QUEUE2_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT10_APR_METER_CTRL0_QUEUE2_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT10_APR_METER_CTRL0_QUEUE1_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT10_APR_METER_CTRL0_QUEUE1_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT10_APR_METER_CTRL0_QUEUE0_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT10_APR_METER_CTRL0_QUEUE0_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_SCHEDULE_PORT10_APR_METER_CTRL1    0x03cf
-+#define    RTL8367C_SCHEDULE_PORT10_APR_METER_CTRL1_QUEUE7_APR_METER_OFFSET    6
-+#define    RTL8367C_SCHEDULE_PORT10_APR_METER_CTRL1_QUEUE7_APR_METER_MASK    0x1C0
-+#define    RTL8367C_SCHEDULE_PORT10_APR_METER_CTRL1_QUEUE6_APR_METER_OFFSET    3
-+#define    RTL8367C_SCHEDULE_PORT10_APR_METER_CTRL1_QUEUE6_APR_METER_MASK    0x38
-+#define    RTL8367C_SCHEDULE_PORT10_APR_METER_CTRL1_QUEUE5_APR_METER_OFFSET    0
-+#define    RTL8367C_SCHEDULE_PORT10_APR_METER_CTRL1_QUEUE5_APR_METER_MASK    0x7
-+
-+#define    RTL8367C_REG_LINE_RATE_1G_L    0x03ec
-+
-+#define    RTL8367C_REG_LINE_RATE_1G_H    0x03ed
-+#define    RTL8367C_LINE_RATE_1G_H_OFFSET    0
-+#define    RTL8367C_LINE_RATE_1G_H_MASK    0x1
-+
-+#define    RTL8367C_REG_LINE_RATE_100_L    0x03ee
-+
-+#define    RTL8367C_REG_LINE_RATE_100_H    0x03ef
-+#define    RTL8367C_LINE_RATE_100_H_OFFSET    0
-+#define    RTL8367C_LINE_RATE_100_H_MASK    0x1
-+
-+#define    RTL8367C_REG_LINE_RATE_10_L    0x03f0
-+
-+#define    RTL8367C_REG_LINE_RATE_10_H    0x03f1
-+#define    RTL8367C_LINE_RATE_10_H_OFFSET    0
-+#define    RTL8367C_LINE_RATE_10_H_MASK    0x1
-+
-+#define    RTL8367C_REG_DUMMY_03f2    0x03f2
-+
-+#define    RTL8367C_REG_DUMMY_03f3    0x03f3
-+
-+#define    RTL8367C_REG_DUMMY_03f4    0x03f4
-+
-+#define    RTL8367C_REG_DUMMY_03f5    0x03f5
-+
-+#define    RTL8367C_REG_DUMMY_03f6    0x03f6
-+
-+#define    RTL8367C_REG_BYPASS_LINE_RATE    0x03f7
-+#define    RTL8367C_BYPASS_PORT10_CONSTRAINT_OFFSET    5
-+#define    RTL8367C_BYPASS_PORT10_CONSTRAINT_MASK    0x20
-+#define    RTL8367C_BYPASS_PORT9_CONSTRAINT_OFFSET    4
-+#define    RTL8367C_BYPASS_PORT9_CONSTRAINT_MASK    0x10
-+#define    RTL8367C_BYPASS_PORT8_CONSTRAINT_OFFSET    3
-+#define    RTL8367C_BYPASS_PORT8_CONSTRAINT_MASK    0x8
-+#define    RTL8367C_BYPASS_PORT7_CONSTRAINT_OFFSET    2
-+#define    RTL8367C_BYPASS_PORT7_CONSTRAINT_MASK    0x4
-+#define    RTL8367C_BYPASS_PORT6_CONSTRAINT_OFFSET    1
-+#define    RTL8367C_BYPASS_PORT6_CONSTRAINT_MASK    0x2
-+#define    RTL8367C_BYPASS_PORT5_CONSTRAINT_OFFSET    0
-+#define    RTL8367C_BYPASS_PORT5_CONSTRAINT_MASK    0x1
-+
-+#define    RTL8367C_REG_LINE_RATE_500_H    0x03f8
-+#define    RTL8367C_LINE_RATE_500_H_OFFSET    0
-+#define    RTL8367C_LINE_RATE_500_H_MASK    0x7
-+
-+#define    RTL8367C_REG_LINE_RATE_500_L    0x03f9
-+
-+#define    RTL8367C_REG_LINE_RATE_HSG_H    0x03fa
-+#define    RTL8367C_LINE_RATE_HSG_H_OFFSET    0
-+#define    RTL8367C_LINE_RATE_HSG_H_MASK    0x7
-+
-+#define    RTL8367C_REG_LINE_RATE_HSG_L    0x03fb
-+
-+/* (16'h0500)table_reg */
-+
-+#define    RTL8367C_REG_TABLE_ACCESS_CTRL    0x0500
-+#define    RTL8367C_TABLE_ACCESS_CTRL_SPA_OFFSET    8
-+#define    RTL8367C_TABLE_ACCESS_CTRL_SPA_MASK    0xF00
-+#define    RTL8367C_ACCESS_METHOD_OFFSET    4
-+#define    RTL8367C_ACCESS_METHOD_MASK    0x70
-+#define    RTL8367C_COMMAND_TYPE_OFFSET    3
-+#define    RTL8367C_COMMAND_TYPE_MASK    0x8
-+#define    RTL8367C_TABLE_TYPE_OFFSET    0
-+#define    RTL8367C_TABLE_TYPE_MASK    0x7
-+
-+#define    RTL8367C_REG_TABLE_ACCESS_ADDR    0x0501
-+#define    RTL8367C_TABLE_ACCESS_ADDR_OFFSET    0
-+#define    RTL8367C_TABLE_ACCESS_ADDR_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_TABLE_LUT_ADDR    0x0502
-+#define    RTL8367C_ADDRESS2_OFFSET    14
-+#define    RTL8367C_ADDRESS2_MASK    0x4000
-+#define    RTL8367C_TABLE_LUT_ADDR_BUSY_FLAG_OFFSET    13
-+#define    RTL8367C_TABLE_LUT_ADDR_BUSY_FLAG_MASK    0x2000
-+#define    RTL8367C_HIT_STATUS_OFFSET    12
-+#define    RTL8367C_HIT_STATUS_MASK    0x1000
-+#define    RTL8367C_TABLE_LUT_ADDR_TYPE_OFFSET    11
-+#define    RTL8367C_TABLE_LUT_ADDR_TYPE_MASK    0x800
-+#define    RTL8367C_TABLE_LUT_ADDR_ADDRESS_OFFSET    0
-+#define    RTL8367C_TABLE_LUT_ADDR_ADDRESS_MASK    0x7FF
-+
-+#define    RTL8367C_REG_HSA_HSB_LATCH    0x0503
-+#define    RTL8367C_LATCH_ALWAYS_OFFSET    15
-+#define    RTL8367C_LATCH_ALWAYS_MASK    0x8000
-+#define    RTL8367C_LATCH_FIRST_OFFSET    14
-+#define    RTL8367C_LATCH_FIRST_MASK    0x4000
-+#define    RTL8367C_SPA_EN_OFFSET    13
-+#define    RTL8367C_SPA_EN_MASK    0x2000
-+#define    RTL8367C_FORWARD_EN_OFFSET    12
-+#define    RTL8367C_FORWARD_EN_MASK    0x1000
-+#define    RTL8367C_REASON_EN_OFFSET    11
-+#define    RTL8367C_REASON_EN_MASK    0x800
-+#define    RTL8367C_HSA_HSB_LATCH_SPA_OFFSET    8
-+#define    RTL8367C_HSA_HSB_LATCH_SPA_MASK    0x700
-+#define    RTL8367C_FORWARD_OFFSET    6
-+#define    RTL8367C_FORWARD_MASK    0xC0
-+#define    RTL8367C_REASON_OFFSET    0
-+#define    RTL8367C_REASON_MASK    0x3F
-+
-+#define    RTL8367C_REG_HSA_HSB_LATCH2    0x0504
-+#define    RTL8367C_HSA_HSB_LATCH2_Reserved_OFFSET    1
-+#define    RTL8367C_HSA_HSB_LATCH2_Reserved_MASK    0xFFFE
-+#define    RTL8367C_SPA2_OFFSET    0
-+#define    RTL8367C_SPA2_MASK    0x1
-+
-+#define    RTL8367C_REG_TABLE_WRITE_DATA0    0x0510
-+
-+#define    RTL8367C_REG_TABLE_WRITE_DATA1    0x0511
-+
-+#define    RTL8367C_REG_TABLE_WRITE_DATA2    0x0512
-+
-+#define    RTL8367C_REG_TABLE_WRITE_DATA3    0x0513
-+
-+#define    RTL8367C_REG_TABLE_WRITE_DATA4    0x0514
-+
-+#define    RTL8367C_REG_TABLE_WRITE_DATA5    0x0515
-+
-+#define    RTL8367C_REG_TABLE_WRITE_DATA6    0x0516
-+
-+#define    RTL8367C_REG_TABLE_WRITE_DATA7    0x0517
-+
-+#define    RTL8367C_REG_TABLE_WRITE_DATA8    0x0518
-+
-+#define    RTL8367C_REG_TABLE_WRITE_DATA9    0x0519
-+#define    RTL8367C_TABLE_WRITE_DATA9_OFFSET    0
-+#define    RTL8367C_TABLE_WRITE_DATA9_MASK    0xF
-+
-+#define    RTL8367C_REG_TABLE_READ_DATA0    0x0520
-+
-+#define    RTL8367C_REG_TABLE_READ_DATA1    0x0521
-+
-+#define    RTL8367C_REG_TABLE_READ_DATA2    0x0522
-+
-+#define    RTL8367C_REG_TABLE_READ_DATA3    0x0523
-+
-+#define    RTL8367C_REG_TABLE_READ_DATA4    0x0524
-+
-+#define    RTL8367C_REG_TABLE_READ_DATA5    0x0525
-+
-+#define    RTL8367C_REG_TABLE_READ_DATA6    0x0526
-+
-+#define    RTL8367C_REG_TABLE_READ_DATA7    0x0527
-+
-+#define    RTL8367C_REG_TABLE_READ_DATA8    0x0528
-+
-+#define    RTL8367C_REG_TABLE_READ_DATA9    0x0529
-+#define    RTL8367C_TABLE_READ_DATA9_OFFSET    0
-+#define    RTL8367C_TABLE_READ_DATA9_MASK    0xF
-+
-+#define    RTL8367C_REG_TBL_DUMMY00    0x0550
-+
-+#define    RTL8367C_REG_TBL_DUMMY01    0x0551
-+
-+/* (16'h0600)acl_reg */
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE0_CTRL0    0x0600
-+#define    RTL8367C_ACL_RULE_TEMPLATE0_CTRL0_FIELD1_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE0_CTRL0_FIELD1_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE0_CTRL0_FIELD0_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE0_CTRL0_FIELD0_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE0_CTRL1    0x0601
-+#define    RTL8367C_ACL_RULE_TEMPLATE0_CTRL1_FIELD3_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE0_CTRL1_FIELD3_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE0_CTRL1_FIELD2_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE0_CTRL1_FIELD2_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE0_CTRL2    0x0602
-+#define    RTL8367C_ACL_RULE_TEMPLATE0_CTRL2_FIELD5_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE0_CTRL2_FIELD5_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE0_CTRL2_FIELD4_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE0_CTRL2_FIELD4_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE0_CTRL3    0x0603
-+#define    RTL8367C_ACL_RULE_TEMPLATE0_CTRL3_FIELD7_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE0_CTRL3_FIELD7_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE0_CTRL3_FIELD6_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE0_CTRL3_FIELD6_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE1_CTRL0    0x0604
-+#define    RTL8367C_ACL_RULE_TEMPLATE1_CTRL0_FIELD1_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE1_CTRL0_FIELD1_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE1_CTRL0_FIELD0_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE1_CTRL0_FIELD0_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE1_CTRL1    0x0605
-+#define    RTL8367C_ACL_RULE_TEMPLATE1_CTRL1_FIELD3_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE1_CTRL1_FIELD3_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE1_CTRL1_FIELD2_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE1_CTRL1_FIELD2_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE1_CTRL2    0x0606
-+#define    RTL8367C_ACL_RULE_TEMPLATE1_CTRL2_FIELD5_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE1_CTRL2_FIELD5_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE1_CTRL2_FIELD4_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE1_CTRL2_FIELD4_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE1_CTRL3    0x0607
-+#define    RTL8367C_ACL_RULE_TEMPLATE1_CTRL3_FIELD7_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE1_CTRL3_FIELD7_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE1_CTRL3_FIELD6_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE1_CTRL3_FIELD6_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE2_CTRL0    0x0608
-+#define    RTL8367C_ACL_RULE_TEMPLATE2_CTRL0_FIELD1_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE2_CTRL0_FIELD1_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE2_CTRL0_FIELD0_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE2_CTRL0_FIELD0_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE2_CTRL1    0x0609
-+#define    RTL8367C_ACL_RULE_TEMPLATE2_CTRL1_FIELD3_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE2_CTRL1_FIELD3_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE2_CTRL1_FIELD2_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE2_CTRL1_FIELD2_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE2_CTRL2    0x060a
-+#define    RTL8367C_ACL_RULE_TEMPLATE2_CTRL2_FIELD5_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE2_CTRL2_FIELD5_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE2_CTRL2_FIELD4_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE2_CTRL2_FIELD4_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE2_CTRL3    0x060b
-+#define    RTL8367C_ACL_RULE_TEMPLATE2_CTRL3_FIELD7_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE2_CTRL3_FIELD7_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE2_CTRL3_FIELD6_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE2_CTRL3_FIELD6_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE3_CTRL0    0x060c
-+#define    RTL8367C_ACL_RULE_TEMPLATE3_CTRL0_FIELD1_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE3_CTRL0_FIELD1_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE3_CTRL0_FIELD0_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE3_CTRL0_FIELD0_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE3_CTRL1    0x060d
-+#define    RTL8367C_ACL_RULE_TEMPLATE3_CTRL1_FIELD3_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE3_CTRL1_FIELD3_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE3_CTRL1_FIELD2_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE3_CTRL1_FIELD2_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE3_CTRL2    0x060e
-+#define    RTL8367C_ACL_RULE_TEMPLATE3_CTRL2_FIELD5_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE3_CTRL2_FIELD5_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE3_CTRL2_FIELD4_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE3_CTRL2_FIELD4_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE3_CTRL3    0x060f
-+#define    RTL8367C_ACL_RULE_TEMPLATE3_CTRL3_FIELD7_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE3_CTRL3_FIELD7_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE3_CTRL3_FIELD6_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE3_CTRL3_FIELD6_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE4_CTRL0    0x0610
-+#define    RTL8367C_ACL_RULE_TEMPLATE4_CTRL0_FIELD1_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE4_CTRL0_FIELD1_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE4_CTRL0_FIELD0_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE4_CTRL0_FIELD0_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE4_CTRL1    0x0611
-+#define    RTL8367C_ACL_RULE_TEMPLATE4_CTRL1_FIELD3_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE4_CTRL1_FIELD3_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE4_CTRL1_FIELD2_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE4_CTRL1_FIELD2_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE4_CTRL2    0x0612
-+#define    RTL8367C_ACL_RULE_TEMPLATE4_CTRL2_FIELD5_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE4_CTRL2_FIELD5_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE4_CTRL2_FIELD4_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE4_CTRL2_FIELD4_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_RULE_TEMPLATE4_CTRL3    0x0613
-+#define    RTL8367C_ACL_RULE_TEMPLATE4_CTRL3_FIELD7_OFFSET    8
-+#define    RTL8367C_ACL_RULE_TEMPLATE4_CTRL3_FIELD7_MASK    0x7F00
-+#define    RTL8367C_ACL_RULE_TEMPLATE4_CTRL3_FIELD6_OFFSET    0
-+#define    RTL8367C_ACL_RULE_TEMPLATE4_CTRL3_FIELD6_MASK    0x7F
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL0    0x0614
-+#define    RTL8367C_OP1_NOT_OFFSET    14
-+#define    RTL8367C_OP1_NOT_MASK    0x4000
-+#define    RTL8367C_ACT1_GPIO_OFFSET    13
-+#define    RTL8367C_ACT1_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT1_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT1_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT1_POLICING_OFFSET    11
-+#define    RTL8367C_ACT1_POLICING_MASK    0x800
-+#define    RTL8367C_ACT1_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT1_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT1_SVID_OFFSET    9
-+#define    RTL8367C_ACT1_SVID_MASK    0x200
-+#define    RTL8367C_ACT1_CVID_OFFSET    8
-+#define    RTL8367C_ACT1_CVID_MASK    0x100
-+#define    RTL8367C_OP0_NOT_OFFSET    6
-+#define    RTL8367C_OP0_NOT_MASK    0x40
-+#define    RTL8367C_ACT0_GPIO_OFFSET    5
-+#define    RTL8367C_ACT0_GPIO_MASK    0x20
-+#define    RTL8367C_ACT0_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT0_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT0_POLICING_OFFSET    3
-+#define    RTL8367C_ACT0_POLICING_MASK    0x8
-+#define    RTL8367C_ACT0_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT0_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT0_SVID_OFFSET    1
-+#define    RTL8367C_ACT0_SVID_MASK    0x2
-+#define    RTL8367C_ACT0_CVID_OFFSET    0
-+#define    RTL8367C_ACT0_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL1    0x0615
-+#define    RTL8367C_OP3_NOT_OFFSET    14
-+#define    RTL8367C_OP3_NOT_MASK    0x4000
-+#define    RTL8367C_ACT3_GPIO_OFFSET    13
-+#define    RTL8367C_ACT3_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT3_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT3_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT3_POLICING_OFFSET    11
-+#define    RTL8367C_ACT3_POLICING_MASK    0x800
-+#define    RTL8367C_ACT3_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT3_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT3_SVID_OFFSET    9
-+#define    RTL8367C_ACT3_SVID_MASK    0x200
-+#define    RTL8367C_ACT3_CVID_OFFSET    8
-+#define    RTL8367C_ACT3_CVID_MASK    0x100
-+#define    RTL8367C_OP2_NOT_OFFSET    6
-+#define    RTL8367C_OP2_NOT_MASK    0x40
-+#define    RTL8367C_ACT2_GPIO_OFFSET    5
-+#define    RTL8367C_ACT2_GPIO_MASK    0x20
-+#define    RTL8367C_ACT2_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT2_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT2_POLICING_OFFSET    3
-+#define    RTL8367C_ACT2_POLICING_MASK    0x8
-+#define    RTL8367C_ACT2_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT2_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT2_SVID_OFFSET    1
-+#define    RTL8367C_ACT2_SVID_MASK    0x2
-+#define    RTL8367C_ACT2_CVID_OFFSET    0
-+#define    RTL8367C_ACT2_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL2    0x0616
-+#define    RTL8367C_OP5_NOT_OFFSET    14
-+#define    RTL8367C_OP5_NOT_MASK    0x4000
-+#define    RTL8367C_ACT5_GPIO_OFFSET    13
-+#define    RTL8367C_ACT5_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT5_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT5_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT5_POLICING_OFFSET    11
-+#define    RTL8367C_ACT5_POLICING_MASK    0x800
-+#define    RTL8367C_ACT5_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT5_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT5_SVID_OFFSET    9
-+#define    RTL8367C_ACT5_SVID_MASK    0x200
-+#define    RTL8367C_ACT5_CVID_OFFSET    8
-+#define    RTL8367C_ACT5_CVID_MASK    0x100
-+#define    RTL8367C_OP4_NOT_OFFSET    6
-+#define    RTL8367C_OP4_NOT_MASK    0x40
-+#define    RTL8367C_ACT4_GPIO_OFFSET    5
-+#define    RTL8367C_ACT4_GPIO_MASK    0x20
-+#define    RTL8367C_ACT4_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT4_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT4_POLICING_OFFSET    3
-+#define    RTL8367C_ACT4_POLICING_MASK    0x8
-+#define    RTL8367C_ACT4_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT4_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT4_SVID_OFFSET    1
-+#define    RTL8367C_ACT4_SVID_MASK    0x2
-+#define    RTL8367C_ACT4_CVID_OFFSET    0
-+#define    RTL8367C_ACT4_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL3    0x0617
-+#define    RTL8367C_OP7_NOT_OFFSET    14
-+#define    RTL8367C_OP7_NOT_MASK    0x4000
-+#define    RTL8367C_ACT7_GPIO_OFFSET    13
-+#define    RTL8367C_ACT7_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT7_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT7_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT7_POLICING_OFFSET    11
-+#define    RTL8367C_ACT7_POLICING_MASK    0x800
-+#define    RTL8367C_ACT7_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT7_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT7_SVID_OFFSET    9
-+#define    RTL8367C_ACT7_SVID_MASK    0x200
-+#define    RTL8367C_ACT7_CVID_OFFSET    8
-+#define    RTL8367C_ACT7_CVID_MASK    0x100
-+#define    RTL8367C_OP6_NOT_OFFSET    6
-+#define    RTL8367C_OP6_NOT_MASK    0x40
-+#define    RTL8367C_ACT6_GPIO_OFFSET    5
-+#define    RTL8367C_ACT6_GPIO_MASK    0x20
-+#define    RTL8367C_ACT6_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT6_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT6_POLICING_OFFSET    3
-+#define    RTL8367C_ACT6_POLICING_MASK    0x8
-+#define    RTL8367C_ACT6_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT6_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT6_SVID_OFFSET    1
-+#define    RTL8367C_ACT6_SVID_MASK    0x2
-+#define    RTL8367C_ACT6_CVID_OFFSET    0
-+#define    RTL8367C_ACT6_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL4    0x0618
-+#define    RTL8367C_OP9_NOT_OFFSET    14
-+#define    RTL8367C_OP9_NOT_MASK    0x4000
-+#define    RTL8367C_ACT9_GPIO_OFFSET    13
-+#define    RTL8367C_ACT9_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT9_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT9_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT9_POLICING_OFFSET    11
-+#define    RTL8367C_ACT9_POLICING_MASK    0x800
-+#define    RTL8367C_ACT9_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT9_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT9_SVID_OFFSET    9
-+#define    RTL8367C_ACT9_SVID_MASK    0x200
-+#define    RTL8367C_ACT9_CVID_OFFSET    8
-+#define    RTL8367C_ACT9_CVID_MASK    0x100
-+#define    RTL8367C_OP8_NOT_OFFSET    6
-+#define    RTL8367C_OP8_NOT_MASK    0x40
-+#define    RTL8367C_ACT8_GPIO_OFFSET    5
-+#define    RTL8367C_ACT8_GPIO_MASK    0x20
-+#define    RTL8367C_ACT8_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT8_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT8_POLICING_OFFSET    3
-+#define    RTL8367C_ACT8_POLICING_MASK    0x8
-+#define    RTL8367C_ACT8_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT8_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT8_SVID_OFFSET    1
-+#define    RTL8367C_ACT8_SVID_MASK    0x2
-+#define    RTL8367C_ACT8_CVID_OFFSET    0
-+#define    RTL8367C_ACT8_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL5    0x0619
-+#define    RTL8367C_OP11_NOT_OFFSET    14
-+#define    RTL8367C_OP11_NOT_MASK    0x4000
-+#define    RTL8367C_ACT11_GPIO_OFFSET    13
-+#define    RTL8367C_ACT11_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT11_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT11_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT11_POLICING_OFFSET    11
-+#define    RTL8367C_ACT11_POLICING_MASK    0x800
-+#define    RTL8367C_ACT11_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT11_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT11_SVID_OFFSET    9
-+#define    RTL8367C_ACT11_SVID_MASK    0x200
-+#define    RTL8367C_ACT11_CVID_OFFSET    8
-+#define    RTL8367C_ACT11_CVID_MASK    0x100
-+#define    RTL8367C_OP10_NOT_OFFSET    6
-+#define    RTL8367C_OP10_NOT_MASK    0x40
-+#define    RTL8367C_ACT10_GPIO_OFFSET    5
-+#define    RTL8367C_ACT10_GPIO_MASK    0x20
-+#define    RTL8367C_ACT10_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT10_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT10_POLICING_OFFSET    3
-+#define    RTL8367C_ACT10_POLICING_MASK    0x8
-+#define    RTL8367C_ACT10_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT10_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT10_SVID_OFFSET    1
-+#define    RTL8367C_ACT10_SVID_MASK    0x2
-+#define    RTL8367C_ACT10_CVID_OFFSET    0
-+#define    RTL8367C_ACT10_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL6    0x061a
-+#define    RTL8367C_OP13_NOT_OFFSET    14
-+#define    RTL8367C_OP13_NOT_MASK    0x4000
-+#define    RTL8367C_ACT13_GPIO_OFFSET    13
-+#define    RTL8367C_ACT13_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT13_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT13_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT13_POLICING_OFFSET    11
-+#define    RTL8367C_ACT13_POLICING_MASK    0x800
-+#define    RTL8367C_ACT13_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT13_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT13_SVID_OFFSET    9
-+#define    RTL8367C_ACT13_SVID_MASK    0x200
-+#define    RTL8367C_ACT13_CVID_OFFSET    8
-+#define    RTL8367C_ACT13_CVID_MASK    0x100
-+#define    RTL8367C_OP12_NOT_OFFSET    6
-+#define    RTL8367C_OP12_NOT_MASK    0x40
-+#define    RTL8367C_ACT12_GPIO_OFFSET    5
-+#define    RTL8367C_ACT12_GPIO_MASK    0x20
-+#define    RTL8367C_ACT12_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT12_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT12_POLICING_OFFSET    3
-+#define    RTL8367C_ACT12_POLICING_MASK    0x8
-+#define    RTL8367C_ACT12_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT12_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT12_SVID_OFFSET    1
-+#define    RTL8367C_ACT12_SVID_MASK    0x2
-+#define    RTL8367C_ACT12_CVID_OFFSET    0
-+#define    RTL8367C_ACT12_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL7    0x061b
-+#define    RTL8367C_OP15_NOT_OFFSET    14
-+#define    RTL8367C_OP15_NOT_MASK    0x4000
-+#define    RTL8367C_ACT15_GPIO_OFFSET    13
-+#define    RTL8367C_ACT15_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT15_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT15_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT15_POLICING_OFFSET    11
-+#define    RTL8367C_ACT15_POLICING_MASK    0x800
-+#define    RTL8367C_ACT15_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT15_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT15_SVID_OFFSET    9
-+#define    RTL8367C_ACT15_SVID_MASK    0x200
-+#define    RTL8367C_ACT15_CVID_OFFSET    8
-+#define    RTL8367C_ACT15_CVID_MASK    0x100
-+#define    RTL8367C_OP14_NOT_OFFSET    6
-+#define    RTL8367C_OP14_NOT_MASK    0x40
-+#define    RTL8367C_ACT14_GPIO_OFFSET    5
-+#define    RTL8367C_ACT14_GPIO_MASK    0x20
-+#define    RTL8367C_ACT14_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT14_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT14_POLICING_OFFSET    3
-+#define    RTL8367C_ACT14_POLICING_MASK    0x8
-+#define    RTL8367C_ACT14_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT14_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT14_SVID_OFFSET    1
-+#define    RTL8367C_ACT14_SVID_MASK    0x2
-+#define    RTL8367C_ACT14_CVID_OFFSET    0
-+#define    RTL8367C_ACT14_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL8    0x061c
-+#define    RTL8367C_OP17_NOT_OFFSET    14
-+#define    RTL8367C_OP17_NOT_MASK    0x4000
-+#define    RTL8367C_ACT17_GPIO_OFFSET    13
-+#define    RTL8367C_ACT17_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT17_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT17_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT17_POLICING_OFFSET    11
-+#define    RTL8367C_ACT17_POLICING_MASK    0x800
-+#define    RTL8367C_ACT17_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT17_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT17_SVID_OFFSET    9
-+#define    RTL8367C_ACT17_SVID_MASK    0x200
-+#define    RTL8367C_ACT17_CVID_OFFSET    8
-+#define    RTL8367C_ACT17_CVID_MASK    0x100
-+#define    RTL8367C_OP16_NOT_OFFSET    6
-+#define    RTL8367C_OP16_NOT_MASK    0x40
-+#define    RTL8367C_ACT16_GPIO_OFFSET    5
-+#define    RTL8367C_ACT16_GPIO_MASK    0x20
-+#define    RTL8367C_ACT16_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT16_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT16_POLICING_OFFSET    3
-+#define    RTL8367C_ACT16_POLICING_MASK    0x8
-+#define    RTL8367C_ACT16_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT16_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT16_SVID_OFFSET    1
-+#define    RTL8367C_ACT16_SVID_MASK    0x2
-+#define    RTL8367C_ACT16_CVID_OFFSET    0
-+#define    RTL8367C_ACT16_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL9    0x061d
-+#define    RTL8367C_OP19_NOT_OFFSET    14
-+#define    RTL8367C_OP19_NOT_MASK    0x4000
-+#define    RTL8367C_ACT19_GPIO_OFFSET    13
-+#define    RTL8367C_ACT19_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT19_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT19_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT19_POLICING_OFFSET    11
-+#define    RTL8367C_ACT19_POLICING_MASK    0x800
-+#define    RTL8367C_ACT19_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT19_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT19_SVID_OFFSET    9
-+#define    RTL8367C_ACT19_SVID_MASK    0x200
-+#define    RTL8367C_ACT19_CVID_OFFSET    8
-+#define    RTL8367C_ACT19_CVID_MASK    0x100
-+#define    RTL8367C_OP18_NOT_OFFSET    6
-+#define    RTL8367C_OP18_NOT_MASK    0x40
-+#define    RTL8367C_ACT18_GPIO_OFFSET    5
-+#define    RTL8367C_ACT18_GPIO_MASK    0x20
-+#define    RTL8367C_ACT18_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT18_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT18_POLICING_OFFSET    3
-+#define    RTL8367C_ACT18_POLICING_MASK    0x8
-+#define    RTL8367C_ACT18_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT18_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT18_SVID_OFFSET    1
-+#define    RTL8367C_ACT18_SVID_MASK    0x2
-+#define    RTL8367C_ACT18_CVID_OFFSET    0
-+#define    RTL8367C_ACT18_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL10    0x061e
-+#define    RTL8367C_OP21_NOT_OFFSET    14
-+#define    RTL8367C_OP21_NOT_MASK    0x4000
-+#define    RTL8367C_ACT21_GPIO_OFFSET    13
-+#define    RTL8367C_ACT21_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT21_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT21_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT21_POLICING_OFFSET    11
-+#define    RTL8367C_ACT21_POLICING_MASK    0x800
-+#define    RTL8367C_ACT21_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT21_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT21_SVID_OFFSET    9
-+#define    RTL8367C_ACT21_SVID_MASK    0x200
-+#define    RTL8367C_ACT21_CVID_OFFSET    8
-+#define    RTL8367C_ACT21_CVID_MASK    0x100
-+#define    RTL8367C_OP20_NOT_OFFSET    6
-+#define    RTL8367C_OP20_NOT_MASK    0x40
-+#define    RTL8367C_ACT20_GPIO_OFFSET    5
-+#define    RTL8367C_ACT20_GPIO_MASK    0x20
-+#define    RTL8367C_ACT20_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT20_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT20_POLICING_OFFSET    3
-+#define    RTL8367C_ACT20_POLICING_MASK    0x8
-+#define    RTL8367C_ACT20_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT20_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT20_SVID_OFFSET    1
-+#define    RTL8367C_ACT20_SVID_MASK    0x2
-+#define    RTL8367C_ACT20_CVID_OFFSET    0
-+#define    RTL8367C_ACT20_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL11    0x061f
-+#define    RTL8367C_OP23_NOT_OFFSET    14
-+#define    RTL8367C_OP23_NOT_MASK    0x4000
-+#define    RTL8367C_ACT23_GPIO_OFFSET    13
-+#define    RTL8367C_ACT23_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT23_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT23_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT23_POLICING_OFFSET    11
-+#define    RTL8367C_ACT23_POLICING_MASK    0x800
-+#define    RTL8367C_ACT23_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT23_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT23_SVID_OFFSET    9
-+#define    RTL8367C_ACT23_SVID_MASK    0x200
-+#define    RTL8367C_ACT23_CVID_OFFSET    8
-+#define    RTL8367C_ACT23_CVID_MASK    0x100
-+#define    RTL8367C_OP22_NOT_OFFSET    6
-+#define    RTL8367C_OP22_NOT_MASK    0x40
-+#define    RTL8367C_ACT22_GPIO_OFFSET    5
-+#define    RTL8367C_ACT22_GPIO_MASK    0x20
-+#define    RTL8367C_ACT22_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT22_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT22_POLICING_OFFSET    3
-+#define    RTL8367C_ACT22_POLICING_MASK    0x8
-+#define    RTL8367C_ACT22_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT22_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT22_SVID_OFFSET    1
-+#define    RTL8367C_ACT22_SVID_MASK    0x2
-+#define    RTL8367C_ACT22_CVID_OFFSET    0
-+#define    RTL8367C_ACT22_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL12    0x0620
-+#define    RTL8367C_OP25_NOT_OFFSET    14
-+#define    RTL8367C_OP25_NOT_MASK    0x4000
-+#define    RTL8367C_ACT25_GPIO_OFFSET    13
-+#define    RTL8367C_ACT25_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT25_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT25_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT25_POLICING_OFFSET    11
-+#define    RTL8367C_ACT25_POLICING_MASK    0x800
-+#define    RTL8367C_ACT25_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT25_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT25_SVID_OFFSET    9
-+#define    RTL8367C_ACT25_SVID_MASK    0x200
-+#define    RTL8367C_ACT25_CVID_OFFSET    8
-+#define    RTL8367C_ACT25_CVID_MASK    0x100
-+#define    RTL8367C_OP24_NOT_OFFSET    6
-+#define    RTL8367C_OP24_NOT_MASK    0x40
-+#define    RTL8367C_ACT24_GPIO_OFFSET    5
-+#define    RTL8367C_ACT24_GPIO_MASK    0x20
-+#define    RTL8367C_ACT24_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT24_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT24_POLICING_OFFSET    3
-+#define    RTL8367C_ACT24_POLICING_MASK    0x8
-+#define    RTL8367C_ACT24_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT24_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT24_SVID_OFFSET    1
-+#define    RTL8367C_ACT24_SVID_MASK    0x2
-+#define    RTL8367C_ACT24_CVID_OFFSET    0
-+#define    RTL8367C_ACT24_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL13    0x0621
-+#define    RTL8367C_OP27_NOT_OFFSET    14
-+#define    RTL8367C_OP27_NOT_MASK    0x4000
-+#define    RTL8367C_ACT27_GPIO_OFFSET    13
-+#define    RTL8367C_ACT27_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT27_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT27_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT27_POLICING_OFFSET    11
-+#define    RTL8367C_ACT27_POLICING_MASK    0x800
-+#define    RTL8367C_ACT27_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT27_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT27_SVID_OFFSET    9
-+#define    RTL8367C_ACT27_SVID_MASK    0x200
-+#define    RTL8367C_ACT27_CVID_OFFSET    8
-+#define    RTL8367C_ACT27_CVID_MASK    0x100
-+#define    RTL8367C_OP26_NOT_OFFSET    6
-+#define    RTL8367C_OP26_NOT_MASK    0x40
-+#define    RTL8367C_ACT26_GPIO_OFFSET    5
-+#define    RTL8367C_ACT26_GPIO_MASK    0x20
-+#define    RTL8367C_ACT26_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT26_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT26_POLICING_OFFSET    3
-+#define    RTL8367C_ACT26_POLICING_MASK    0x8
-+#define    RTL8367C_ACT26_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT26_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT26_SVID_OFFSET    1
-+#define    RTL8367C_ACT26_SVID_MASK    0x2
-+#define    RTL8367C_ACT26_CVID_OFFSET    0
-+#define    RTL8367C_ACT26_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL14    0x0622
-+#define    RTL8367C_OP29_NOT_OFFSET    14
-+#define    RTL8367C_OP29_NOT_MASK    0x4000
-+#define    RTL8367C_ACT29_GPIO_OFFSET    13
-+#define    RTL8367C_ACT29_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT29_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT29_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT29_POLICING_OFFSET    11
-+#define    RTL8367C_ACT29_POLICING_MASK    0x800
-+#define    RTL8367C_ACT29_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT29_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT29_SVID_OFFSET    9
-+#define    RTL8367C_ACT29_SVID_MASK    0x200
-+#define    RTL8367C_ACT29_CVID_OFFSET    8
-+#define    RTL8367C_ACT29_CVID_MASK    0x100
-+#define    RTL8367C_OP28_NOT_OFFSET    6
-+#define    RTL8367C_OP28_NOT_MASK    0x40
-+#define    RTL8367C_ACT28_GPIO_OFFSET    5
-+#define    RTL8367C_ACT28_GPIO_MASK    0x20
-+#define    RTL8367C_ACT28_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT28_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT28_POLICING_OFFSET    3
-+#define    RTL8367C_ACT28_POLICING_MASK    0x8
-+#define    RTL8367C_ACT28_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT28_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT28_SVID_OFFSET    1
-+#define    RTL8367C_ACT28_SVID_MASK    0x2
-+#define    RTL8367C_ACT28_CVID_OFFSET    0
-+#define    RTL8367C_ACT28_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL15    0x0623
-+#define    RTL8367C_OP31_NOT_OFFSET    14
-+#define    RTL8367C_OP31_NOT_MASK    0x4000
-+#define    RTL8367C_ACT31_GPIO_OFFSET    13
-+#define    RTL8367C_ACT31_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT31_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT31_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT31_POLICING_OFFSET    11
-+#define    RTL8367C_ACT31_POLICING_MASK    0x800
-+#define    RTL8367C_ACT31_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT31_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT31_SVID_OFFSET    9
-+#define    RTL8367C_ACT31_SVID_MASK    0x200
-+#define    RTL8367C_ACT31_CVID_OFFSET    8
-+#define    RTL8367C_ACT31_CVID_MASK    0x100
-+#define    RTL8367C_OP30_NOT_OFFSET    6
-+#define    RTL8367C_OP30_NOT_MASK    0x40
-+#define    RTL8367C_ACT30_GPIO_OFFSET    5
-+#define    RTL8367C_ACT30_GPIO_MASK    0x20
-+#define    RTL8367C_ACT30_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT30_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT30_POLICING_OFFSET    3
-+#define    RTL8367C_ACT30_POLICING_MASK    0x8
-+#define    RTL8367C_ACT30_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT30_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT30_SVID_OFFSET    1
-+#define    RTL8367C_ACT30_SVID_MASK    0x2
-+#define    RTL8367C_ACT30_CVID_OFFSET    0
-+#define    RTL8367C_ACT30_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL16    0x0624
-+#define    RTL8367C_OP33_NOT_OFFSET    14
-+#define    RTL8367C_OP33_NOT_MASK    0x4000
-+#define    RTL8367C_ACT33_GPIO_OFFSET    13
-+#define    RTL8367C_ACT33_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT33_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT33_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT33_POLICING_OFFSET    11
-+#define    RTL8367C_ACT33_POLICING_MASK    0x800
-+#define    RTL8367C_ACT33_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT33_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT33_SVID_OFFSET    9
-+#define    RTL8367C_ACT33_SVID_MASK    0x200
-+#define    RTL8367C_ACT33_CVID_OFFSET    8
-+#define    RTL8367C_ACT33_CVID_MASK    0x100
-+#define    RTL8367C_OP32_NOT_OFFSET    6
-+#define    RTL8367C_OP32_NOT_MASK    0x40
-+#define    RTL8367C_ACT32_GPIO_OFFSET    5
-+#define    RTL8367C_ACT32_GPIO_MASK    0x20
-+#define    RTL8367C_ACT32_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT32_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT32_POLICING_OFFSET    3
-+#define    RTL8367C_ACT32_POLICING_MASK    0x8
-+#define    RTL8367C_ACT32_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT32_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT32_SVID_OFFSET    1
-+#define    RTL8367C_ACT32_SVID_MASK    0x2
-+#define    RTL8367C_ACT32_CVID_OFFSET    0
-+#define    RTL8367C_ACT32_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL17    0x0625
-+#define    RTL8367C_OP35_NOT_OFFSET    14
-+#define    RTL8367C_OP35_NOT_MASK    0x4000
-+#define    RTL8367C_ACT35_GPIO_OFFSET    13
-+#define    RTL8367C_ACT35_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT35_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT35_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT35_POLICING_OFFSET    11
-+#define    RTL8367C_ACT35_POLICING_MASK    0x800
-+#define    RTL8367C_ACT35_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT35_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT35_SVID_OFFSET    9
-+#define    RTL8367C_ACT35_SVID_MASK    0x200
-+#define    RTL8367C_ACT35_CVID_OFFSET    8
-+#define    RTL8367C_ACT35_CVID_MASK    0x100
-+#define    RTL8367C_OP34_NOT_OFFSET    6
-+#define    RTL8367C_OP34_NOT_MASK    0x40
-+#define    RTL8367C_ACT34_GPIO_OFFSET    5
-+#define    RTL8367C_ACT34_GPIO_MASK    0x20
-+#define    RTL8367C_ACT34_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT34_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT34_POLICING_OFFSET    3
-+#define    RTL8367C_ACT34_POLICING_MASK    0x8
-+#define    RTL8367C_ACT34_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT34_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT34_SVID_OFFSET    1
-+#define    RTL8367C_ACT34_SVID_MASK    0x2
-+#define    RTL8367C_ACT34_CVID_OFFSET    0
-+#define    RTL8367C_ACT34_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL18    0x0626
-+#define    RTL8367C_OP37_NOT_OFFSET    14
-+#define    RTL8367C_OP37_NOT_MASK    0x4000
-+#define    RTL8367C_ACT37_GPIO_OFFSET    13
-+#define    RTL8367C_ACT37_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT37_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT37_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT37_POLICING_OFFSET    11
-+#define    RTL8367C_ACT37_POLICING_MASK    0x800
-+#define    RTL8367C_ACT37_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT37_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT37_SVID_OFFSET    9
-+#define    RTL8367C_ACT37_SVID_MASK    0x200
-+#define    RTL8367C_ACT37_CVID_OFFSET    8
-+#define    RTL8367C_ACT37_CVID_MASK    0x100
-+#define    RTL8367C_OP36_NOT_OFFSET    6
-+#define    RTL8367C_OP36_NOT_MASK    0x40
-+#define    RTL8367C_ACT36_GPIO_OFFSET    5
-+#define    RTL8367C_ACT36_GPIO_MASK    0x20
-+#define    RTL8367C_ACT36_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT36_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT36_POLICING_OFFSET    3
-+#define    RTL8367C_ACT36_POLICING_MASK    0x8
-+#define    RTL8367C_ACT36_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT36_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT36_SVID_OFFSET    1
-+#define    RTL8367C_ACT36_SVID_MASK    0x2
-+#define    RTL8367C_ACT36_CVID_OFFSET    0
-+#define    RTL8367C_ACT36_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL19    0x0627
-+#define    RTL8367C_OP39_NOT_OFFSET    14
-+#define    RTL8367C_OP39_NOT_MASK    0x4000
-+#define    RTL8367C_ACT39_GPIO_OFFSET    13
-+#define    RTL8367C_ACT39_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT39_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT39_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT39_POLICING_OFFSET    11
-+#define    RTL8367C_ACT39_POLICING_MASK    0x800
-+#define    RTL8367C_ACT39_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT39_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT39_SVID_OFFSET    9
-+#define    RTL8367C_ACT39_SVID_MASK    0x200
-+#define    RTL8367C_ACT39_CVID_OFFSET    8
-+#define    RTL8367C_ACT39_CVID_MASK    0x100
-+#define    RTL8367C_OP38_NOT_OFFSET    6
-+#define    RTL8367C_OP38_NOT_MASK    0x40
-+#define    RTL8367C_ACT38_GPIO_OFFSET    5
-+#define    RTL8367C_ACT38_GPIO_MASK    0x20
-+#define    RTL8367C_ACT38_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT38_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT38_POLICING_OFFSET    3
-+#define    RTL8367C_ACT38_POLICING_MASK    0x8
-+#define    RTL8367C_ACT38_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT38_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT38_SVID_OFFSET    1
-+#define    RTL8367C_ACT38_SVID_MASK    0x2
-+#define    RTL8367C_ACT38_CVID_OFFSET    0
-+#define    RTL8367C_ACT38_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL20    0x0628
-+#define    RTL8367C_OP41_NOT_OFFSET    14
-+#define    RTL8367C_OP41_NOT_MASK    0x4000
-+#define    RTL8367C_ACT41_GPIO_OFFSET    13
-+#define    RTL8367C_ACT41_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT41_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT41_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT41_POLICING_OFFSET    11
-+#define    RTL8367C_ACT41_POLICING_MASK    0x800
-+#define    RTL8367C_ACT41_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT41_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT41_SVID_OFFSET    9
-+#define    RTL8367C_ACT41_SVID_MASK    0x200
-+#define    RTL8367C_ACT41_CVID_OFFSET    8
-+#define    RTL8367C_ACT41_CVID_MASK    0x100
-+#define    RTL8367C_OP40_NOT_OFFSET    6
-+#define    RTL8367C_OP40_NOT_MASK    0x40
-+#define    RTL8367C_ACT40_GPIO_OFFSET    5
-+#define    RTL8367C_ACT40_GPIO_MASK    0x20
-+#define    RTL8367C_ACT40_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT40_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT40_POLICING_OFFSET    3
-+#define    RTL8367C_ACT40_POLICING_MASK    0x8
-+#define    RTL8367C_ACT40_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT40_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT40_SVID_OFFSET    1
-+#define    RTL8367C_ACT40_SVID_MASK    0x2
-+#define    RTL8367C_ACT40_CVID_OFFSET    0
-+#define    RTL8367C_ACT40_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL21    0x0629
-+#define    RTL8367C_OP43_NOT_OFFSET    14
-+#define    RTL8367C_OP43_NOT_MASK    0x4000
-+#define    RTL8367C_ACT43_GPIO_OFFSET    13
-+#define    RTL8367C_ACT43_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT43_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT43_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT43_POLICING_OFFSET    11
-+#define    RTL8367C_ACT43_POLICING_MASK    0x800
-+#define    RTL8367C_ACT43_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT43_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT43_SVID_OFFSET    9
-+#define    RTL8367C_ACT43_SVID_MASK    0x200
-+#define    RTL8367C_ACT43_CVID_OFFSET    8
-+#define    RTL8367C_ACT43_CVID_MASK    0x100
-+#define    RTL8367C_OP42_NOT_OFFSET    6
-+#define    RTL8367C_OP42_NOT_MASK    0x40
-+#define    RTL8367C_ACT42_GPIO_OFFSET    5
-+#define    RTL8367C_ACT42_GPIO_MASK    0x20
-+#define    RTL8367C_ACT42_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT42_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT42_POLICING_OFFSET    3
-+#define    RTL8367C_ACT42_POLICING_MASK    0x8
-+#define    RTL8367C_ACT42_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT42_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT42_SVID_OFFSET    1
-+#define    RTL8367C_ACT42_SVID_MASK    0x2
-+#define    RTL8367C_ACT42_CVID_OFFSET    0
-+#define    RTL8367C_ACT42_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL22    0x062a
-+#define    RTL8367C_OP45_NOT_OFFSET    14
-+#define    RTL8367C_OP45_NOT_MASK    0x4000
-+#define    RTL8367C_ACT45_GPIO_OFFSET    13
-+#define    RTL8367C_ACT45_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT45_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT45_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT45_POLICING_OFFSET    11
-+#define    RTL8367C_ACT45_POLICING_MASK    0x800
-+#define    RTL8367C_ACT45_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT45_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT45_SVID_OFFSET    9
-+#define    RTL8367C_ACT45_SVID_MASK    0x200
-+#define    RTL8367C_ACT45_CVID_OFFSET    8
-+#define    RTL8367C_ACT45_CVID_MASK    0x100
-+#define    RTL8367C_OP44_NOT_OFFSET    6
-+#define    RTL8367C_OP44_NOT_MASK    0x40
-+#define    RTL8367C_ACT44_GPIO_OFFSET    5
-+#define    RTL8367C_ACT44_GPIO_MASK    0x20
-+#define    RTL8367C_ACT44_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT44_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT44_POLICING_OFFSET    3
-+#define    RTL8367C_ACT44_POLICING_MASK    0x8
-+#define    RTL8367C_ACT44_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT44_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT44_SVID_OFFSET    1
-+#define    RTL8367C_ACT44_SVID_MASK    0x2
-+#define    RTL8367C_ACT44_CVID_OFFSET    0
-+#define    RTL8367C_ACT44_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL23    0x062b
-+#define    RTL8367C_OP47_NOT_OFFSET    14
-+#define    RTL8367C_OP47_NOT_MASK    0x4000
-+#define    RTL8367C_ACT47_GPIO_OFFSET    13
-+#define    RTL8367C_ACT47_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT47_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT47_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT47_POLICING_OFFSET    11
-+#define    RTL8367C_ACT47_POLICING_MASK    0x800
-+#define    RTL8367C_ACT47_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT47_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT47_SVID_OFFSET    9
-+#define    RTL8367C_ACT47_SVID_MASK    0x200
-+#define    RTL8367C_ACT47_CVID_OFFSET    8
-+#define    RTL8367C_ACT47_CVID_MASK    0x100
-+#define    RTL8367C_OP46_NOT_OFFSET    6
-+#define    RTL8367C_OP46_NOT_MASK    0x40
-+#define    RTL8367C_ACT46_GPIO_OFFSET    5
-+#define    RTL8367C_ACT46_GPIO_MASK    0x20
-+#define    RTL8367C_ACT46_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT46_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT46_POLICING_OFFSET    3
-+#define    RTL8367C_ACT46_POLICING_MASK    0x8
-+#define    RTL8367C_ACT46_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT46_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT46_SVID_OFFSET    1
-+#define    RTL8367C_ACT46_SVID_MASK    0x2
-+#define    RTL8367C_ACT46_CVID_OFFSET    0
-+#define    RTL8367C_ACT46_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL24    0x062c
-+#define    RTL8367C_OP49_NOT_OFFSET    14
-+#define    RTL8367C_OP49_NOT_MASK    0x4000
-+#define    RTL8367C_ACT49_GPIO_OFFSET    13
-+#define    RTL8367C_ACT49_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT49_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT49_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT49_POLICING_OFFSET    11
-+#define    RTL8367C_ACT49_POLICING_MASK    0x800
-+#define    RTL8367C_ACT49_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT49_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT49_SVID_OFFSET    9
-+#define    RTL8367C_ACT49_SVID_MASK    0x200
-+#define    RTL8367C_ACT49_CVID_OFFSET    8
-+#define    RTL8367C_ACT49_CVID_MASK    0x100
-+#define    RTL8367C_OP48_NOT_OFFSET    6
-+#define    RTL8367C_OP48_NOT_MASK    0x40
-+#define    RTL8367C_ACT48_GPIO_OFFSET    5
-+#define    RTL8367C_ACT48_GPIO_MASK    0x20
-+#define    RTL8367C_ACT48_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT48_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT48_POLICING_OFFSET    3
-+#define    RTL8367C_ACT48_POLICING_MASK    0x8
-+#define    RTL8367C_ACT48_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT48_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT48_SVID_OFFSET    1
-+#define    RTL8367C_ACT48_SVID_MASK    0x2
-+#define    RTL8367C_ACT48_CVID_OFFSET    0
-+#define    RTL8367C_ACT48_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL25    0x062d
-+#define    RTL8367C_OP51_NOT_OFFSET    14
-+#define    RTL8367C_OP51_NOT_MASK    0x4000
-+#define    RTL8367C_ACT51_GPIO_OFFSET    13
-+#define    RTL8367C_ACT51_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT51_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT51_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT51_POLICING_OFFSET    11
-+#define    RTL8367C_ACT51_POLICING_MASK    0x800
-+#define    RTL8367C_ACT51_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT51_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT51_SVID_OFFSET    9
-+#define    RTL8367C_ACT51_SVID_MASK    0x200
-+#define    RTL8367C_ACT51_CVID_OFFSET    8
-+#define    RTL8367C_ACT51_CVID_MASK    0x100
-+#define    RTL8367C_OP50_NOT_OFFSET    6
-+#define    RTL8367C_OP50_NOT_MASK    0x40
-+#define    RTL8367C_ACT50_GPIO_OFFSET    5
-+#define    RTL8367C_ACT50_GPIO_MASK    0x20
-+#define    RTL8367C_ACT50_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT50_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT50_POLICING_OFFSET    3
-+#define    RTL8367C_ACT50_POLICING_MASK    0x8
-+#define    RTL8367C_ACT50_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT50_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT50_SVID_OFFSET    1
-+#define    RTL8367C_ACT50_SVID_MASK    0x2
-+#define    RTL8367C_ACT50_CVID_OFFSET    0
-+#define    RTL8367C_ACT50_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL26    0x062e
-+#define    RTL8367C_OP53_NOT_OFFSET    14
-+#define    RTL8367C_OP53_NOT_MASK    0x4000
-+#define    RTL8367C_ACT53_GPIO_OFFSET    13
-+#define    RTL8367C_ACT53_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT53_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT53_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT53_POLICING_OFFSET    11
-+#define    RTL8367C_ACT53_POLICING_MASK    0x800
-+#define    RTL8367C_ACT53_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT53_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT53_SVID_OFFSET    9
-+#define    RTL8367C_ACT53_SVID_MASK    0x200
-+#define    RTL8367C_ACT53_CVID_OFFSET    8
-+#define    RTL8367C_ACT53_CVID_MASK    0x100
-+#define    RTL8367C_OP52_NOT_OFFSET    6
-+#define    RTL8367C_OP52_NOT_MASK    0x40
-+#define    RTL8367C_ACT52_GPIO_OFFSET    5
-+#define    RTL8367C_ACT52_GPIO_MASK    0x20
-+#define    RTL8367C_ACT52_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT52_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT52_POLICING_OFFSET    3
-+#define    RTL8367C_ACT52_POLICING_MASK    0x8
-+#define    RTL8367C_ACT52_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT52_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT52_SVID_OFFSET    1
-+#define    RTL8367C_ACT52_SVID_MASK    0x2
-+#define    RTL8367C_ACT52_CVID_OFFSET    0
-+#define    RTL8367C_ACT52_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL27    0x062f
-+#define    RTL8367C_OP55_NOT_OFFSET    14
-+#define    RTL8367C_OP55_NOT_MASK    0x4000
-+#define    RTL8367C_ACT55_GPIO_OFFSET    13
-+#define    RTL8367C_ACT55_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT55_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT55_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT55_POLICING_OFFSET    11
-+#define    RTL8367C_ACT55_POLICING_MASK    0x800
-+#define    RTL8367C_ACT55_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT55_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT55_SVID_OFFSET    9
-+#define    RTL8367C_ACT55_SVID_MASK    0x200
-+#define    RTL8367C_ACT55_CVID_OFFSET    8
-+#define    RTL8367C_ACT55_CVID_MASK    0x100
-+#define    RTL8367C_OP54_NOT_OFFSET    6
-+#define    RTL8367C_OP54_NOT_MASK    0x40
-+#define    RTL8367C_ACT54_GPIO_OFFSET    5
-+#define    RTL8367C_ACT54_GPIO_MASK    0x20
-+#define    RTL8367C_ACT54_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT54_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT54_POLICING_OFFSET    3
-+#define    RTL8367C_ACT54_POLICING_MASK    0x8
-+#define    RTL8367C_ACT54_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT54_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT54_SVID_OFFSET    1
-+#define    RTL8367C_ACT54_SVID_MASK    0x2
-+#define    RTL8367C_ACT54_CVID_OFFSET    0
-+#define    RTL8367C_ACT54_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL28    0x0630
-+#define    RTL8367C_OP57_NOT_OFFSET    14
-+#define    RTL8367C_OP57_NOT_MASK    0x4000
-+#define    RTL8367C_ACT57_GPIO_OFFSET    13
-+#define    RTL8367C_ACT57_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT57_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT57_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT57_POLICING_OFFSET    11
-+#define    RTL8367C_ACT57_POLICING_MASK    0x800
-+#define    RTL8367C_ACT57_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT57_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT57_SVID_OFFSET    9
-+#define    RTL8367C_ACT57_SVID_MASK    0x200
-+#define    RTL8367C_ACT57_CVID_OFFSET    8
-+#define    RTL8367C_ACT57_CVID_MASK    0x100
-+#define    RTL8367C_OP56_NOT_OFFSET    6
-+#define    RTL8367C_OP56_NOT_MASK    0x40
-+#define    RTL8367C_ACT56_GPIO_OFFSET    5
-+#define    RTL8367C_ACT56_GPIO_MASK    0x20
-+#define    RTL8367C_ACT56_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT56_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT56_POLICING_OFFSET    3
-+#define    RTL8367C_ACT56_POLICING_MASK    0x8
-+#define    RTL8367C_ACT56_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT56_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT56_SVID_OFFSET    1
-+#define    RTL8367C_ACT56_SVID_MASK    0x2
-+#define    RTL8367C_ACT56_CVID_OFFSET    0
-+#define    RTL8367C_ACT56_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL29    0x0631
-+#define    RTL8367C_OP59_NOT_OFFSET    14
-+#define    RTL8367C_OP59_NOT_MASK    0x4000
-+#define    RTL8367C_ACT59_GPIO_OFFSET    13
-+#define    RTL8367C_ACT59_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT59_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT59_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT59_POLICING_OFFSET    11
-+#define    RTL8367C_ACT59_POLICING_MASK    0x800
-+#define    RTL8367C_ACT59_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT59_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT59_SVID_OFFSET    9
-+#define    RTL8367C_ACT59_SVID_MASK    0x200
-+#define    RTL8367C_ACT59_CVID_OFFSET    8
-+#define    RTL8367C_ACT59_CVID_MASK    0x100
-+#define    RTL8367C_OP58_NOT_OFFSET    6
-+#define    RTL8367C_OP58_NOT_MASK    0x40
-+#define    RTL8367C_ACT58_GPIO_OFFSET    5
-+#define    RTL8367C_ACT58_GPIO_MASK    0x20
-+#define    RTL8367C_ACT58_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT58_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT58_POLICING_OFFSET    3
-+#define    RTL8367C_ACT58_POLICING_MASK    0x8
-+#define    RTL8367C_ACT58_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT58_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT58_SVID_OFFSET    1
-+#define    RTL8367C_ACT58_SVID_MASK    0x2
-+#define    RTL8367C_ACT58_CVID_OFFSET    0
-+#define    RTL8367C_ACT58_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL30    0x0632
-+#define    RTL8367C_OP61_NOT_OFFSET    14
-+#define    RTL8367C_OP61_NOT_MASK    0x4000
-+#define    RTL8367C_ACT61_GPIO_OFFSET    13
-+#define    RTL8367C_ACT61_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT61_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT61_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT61_POLICING_OFFSET    11
-+#define    RTL8367C_ACT61_POLICING_MASK    0x800
-+#define    RTL8367C_ACT61_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT61_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT61_SVID_OFFSET    9
-+#define    RTL8367C_ACT61_SVID_MASK    0x200
-+#define    RTL8367C_ACT61_CVID_OFFSET    8
-+#define    RTL8367C_ACT61_CVID_MASK    0x100
-+#define    RTL8367C_OP60_NOT_OFFSET    6
-+#define    RTL8367C_OP60_NOT_MASK    0x40
-+#define    RTL8367C_ACT60_GPIO_OFFSET    5
-+#define    RTL8367C_ACT60_GPIO_MASK    0x20
-+#define    RTL8367C_ACT60_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT60_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT60_POLICING_OFFSET    3
-+#define    RTL8367C_ACT60_POLICING_MASK    0x8
-+#define    RTL8367C_ACT60_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT60_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT60_SVID_OFFSET    1
-+#define    RTL8367C_ACT60_SVID_MASK    0x2
-+#define    RTL8367C_ACT60_CVID_OFFSET    0
-+#define    RTL8367C_ACT60_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL31    0x0633
-+#define    RTL8367C_OP63_NOT_OFFSET    14
-+#define    RTL8367C_OP63_NOT_MASK    0x4000
-+#define    RTL8367C_ACT63_GPIO_OFFSET    13
-+#define    RTL8367C_ACT63_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT63_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT63_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT63_POLICING_OFFSET    11
-+#define    RTL8367C_ACT63_POLICING_MASK    0x800
-+#define    RTL8367C_ACT63_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT63_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT63_SVID_OFFSET    9
-+#define    RTL8367C_ACT63_SVID_MASK    0x200
-+#define    RTL8367C_ACT63_CVID_OFFSET    8
-+#define    RTL8367C_ACT63_CVID_MASK    0x100
-+#define    RTL8367C_OP62_NOT_OFFSET    6
-+#define    RTL8367C_OP62_NOT_MASK    0x40
-+#define    RTL8367C_ACT62_GPIO_OFFSET    5
-+#define    RTL8367C_ACT62_GPIO_MASK    0x20
-+#define    RTL8367C_ACT62_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT62_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT62_POLICING_OFFSET    3
-+#define    RTL8367C_ACT62_POLICING_MASK    0x8
-+#define    RTL8367C_ACT62_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT62_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT62_SVID_OFFSET    1
-+#define    RTL8367C_ACT62_SVID_MASK    0x2
-+#define    RTL8367C_ACT62_CVID_OFFSET    0
-+#define    RTL8367C_ACT62_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY0_CTRL0    0x0635
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY0_CTRL1    0x0636
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY0_CTRL2    0x0637
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY0_CTRL2_OFFSET    0
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY0_CTRL2_MASK    0x3
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY1_CTRL0    0x0638
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY1_CTRL1    0x0639
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY1_CTRL2    0x063a
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY1_CTRL2_OFFSET    0
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY1_CTRL2_MASK    0x3
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY2_CTRL0    0x063b
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY2_CTRL1    0x063c
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY2_CTRL2    0x063d
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY2_CTRL2_OFFSET    0
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY2_CTRL2_MASK    0x3
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY3_CTRL0    0x063e
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY3_CTRL1    0x063f
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY3_CTRL2    0x0640
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY3_CTRL2_OFFSET    0
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY3_CTRL2_MASK    0x3
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY4_CTRL0    0x0641
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY4_CTRL1    0x0642
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY4_CTRL2    0x0643
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY4_CTRL2_OFFSET    0
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY4_CTRL2_MASK    0x3
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY5_CTRL0    0x0644
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY5_CTRL1    0x0645
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY5_CTRL2    0x0646
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY5_CTRL2_OFFSET    0
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY5_CTRL2_MASK    0x3
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY6_CTRL0    0x0647
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY6_CTRL1    0x0648
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY6_CTRL2    0x0649
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY6_CTRL2_OFFSET    0
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY6_CTRL2_MASK    0x3
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY7_CTRL0    0x064a
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY7_CTRL1    0x064b
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY7_CTRL2    0x064c
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY7_CTRL2_OFFSET    0
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY7_CTRL2_MASK    0x3
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY8_CTRL0    0x064d
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY8_CTRL1    0x064e
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY8_CTRL2    0x064f
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY8_CTRL2_OFFSET    0
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY8_CTRL2_MASK    0x3
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY9_CTRL0    0x0650
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY9_CTRL1    0x0651
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY9_CTRL2    0x0652
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY9_CTRL2_OFFSET    0
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY9_CTRL2_MASK    0x3
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY10_CTRL0    0x0653
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY10_CTRL1    0x0654
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY10_CTRL2    0x0655
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY10_CTRL2_OFFSET    0
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY10_CTRL2_MASK    0x3
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY11_CTRL0    0x0656
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY11_CTRL1    0x0657
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY11_CTRL2    0x0658
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY11_CTRL2_OFFSET    0
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY11_CTRL2_MASK    0x3
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY12_CTRL0    0x0659
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY12_CTRL1    0x065a
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY12_CTRL2    0x065b
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY12_CTRL2_OFFSET    0
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY12_CTRL2_MASK    0x3
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY13_CTRL0    0x065c
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY13_CTRL1    0x065d
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY13_CTRL2    0x065e
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY13_CTRL2_OFFSET    0
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY13_CTRL2_MASK    0x3
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY14_CTRL0    0x065f
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY14_CTRL1    0x0660
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY14_CTRL2    0x0661
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY14_CTRL2_OFFSET    0
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY14_CTRL2_MASK    0x3
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY15_CTRL0    0x0662
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY15_CTRL1    0x0663
-+
-+#define    RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY15_CTRL2    0x0664
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY15_CTRL2_OFFSET    0
-+#define    RTL8367C_ACL_SDPORT_RANGE_ENTRY15_CTRL2_MASK    0x3
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY0_CTRL0    0x0665
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY0_CTRL0_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY0_CTRL0_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY0_CTRL1    0x0666
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY0_CTRL1_CHECK0_TYPE_OFFSET    12
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY0_CTRL1_CHECK0_TYPE_MASK    0x3000
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY0_CTRL1_CHECK0_HIGH_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY0_CTRL1_CHECK0_HIGH_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY1_CTRL0    0x0667
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY1_CTRL0_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY1_CTRL0_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY1_CTRL1    0x0668
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY1_CTRL1_CHECK1_TYPE_OFFSET    12
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY1_CTRL1_CHECK1_TYPE_MASK    0x3000
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY1_CTRL1_CHECK1_HIGH_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY1_CTRL1_CHECK1_HIGH_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY2_CTRL0    0x0669
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY2_CTRL0_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY2_CTRL0_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY2_CTRL1    0x066a
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY2_CTRL1_CHECK2_TYPE_OFFSET    12
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY2_CTRL1_CHECK2_TYPE_MASK    0x3000
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY2_CTRL1_CHECK2_HIGH_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY2_CTRL1_CHECK2_HIGH_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY3_CTRL0    0x066b
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY3_CTRL0_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY3_CTRL0_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY3_CTRL1    0x066c
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY3_CTRL1_CHECK3_TYPE_OFFSET    12
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY3_CTRL1_CHECK3_TYPE_MASK    0x3000
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY3_CTRL1_CHECK3_HIGH_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY3_CTRL1_CHECK3_HIGH_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY4_CTRL0    0x066d
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY4_CTRL0_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY4_CTRL0_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY4_CTRL1    0x066e
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY4_CTRL1_CHECK4_TYPE_OFFSET    12
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY4_CTRL1_CHECK4_TYPE_MASK    0x3000
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY4_CTRL1_CHECK4_HIGH_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY4_CTRL1_CHECK4_HIGH_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY5_CTRL0    0x066f
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY5_CTRL0_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY5_CTRL0_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY5_CTRL1    0x0670
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY5_CTRL1_CHECK5_TYPE_OFFSET    12
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY5_CTRL1_CHECK5_TYPE_MASK    0x3000
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY5_CTRL1_CHECK5_HIGH_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY5_CTRL1_CHECK5_HIGH_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY6_CTRL0    0x0671
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY6_CTRL0_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY6_CTRL0_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY6_CTRL1    0x0672
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY6_CTRL1_CHECK6_TYPE_OFFSET    12
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY6_CTRL1_CHECK6_TYPE_MASK    0x3000
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY6_CTRL1_CHECK6_HIGH_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY6_CTRL1_CHECK6_HIGH_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY7_CTRL0    0x0673
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY7_CTRL0_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY7_CTRL0_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY7_CTRL1    0x0674
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY7_CTRL1_CHECK7_TYPE_OFFSET    12
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY7_CTRL1_CHECK7_TYPE_MASK    0x3000
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY7_CTRL1_CHECK7_HIGH_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY7_CTRL1_CHECK7_HIGH_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY8_CTRL0    0x0675
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY8_CTRL0_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY8_CTRL0_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY8_CTRL1    0x0676
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY8_CTRL1_CHECK8_TYPE_OFFSET    12
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY8_CTRL1_CHECK8_TYPE_MASK    0x3000
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY8_CTRL1_CHECK8_HIGH_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY8_CTRL1_CHECK8_HIGH_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY9_CTRL0    0x0677
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY9_CTRL0_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY9_CTRL0_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY9_CTRL1    0x0678
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY9_CTRL1_CHECK9_TYPE_OFFSET    12
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY9_CTRL1_CHECK9_TYPE_MASK    0x3000
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY9_CTRL1_CHECK9_HIGH_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY9_CTRL1_CHECK9_HIGH_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY10_CTRL0    0x0679
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY10_CTRL0_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY10_CTRL0_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY10_CTRL1    0x067a
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY10_CTRL1_CHECK10_TYPE_OFFSET    12
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY10_CTRL1_CHECK10_TYPE_MASK    0x3000
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY10_CTRL1_CHECK10_HIGH_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY10_CTRL1_CHECK10_HIGH_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY11_CTRL0    0x067b
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY11_CTRL0_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY11_CTRL0_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY11_CTRL1    0x067c
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY11_CTRL1_CHECK11_TYPE_OFFSET    12
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY11_CTRL1_CHECK11_TYPE_MASK    0x3000
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY11_CTRL1_CHECK11_HIGH_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY11_CTRL1_CHECK11_HIGH_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY12_CTRL0    0x067d
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY12_CTRL0_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY12_CTRL0_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY12_CTRL1    0x067e
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY12_CTRL1_CHECK12_TYPE_OFFSET    12
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY12_CTRL1_CHECK12_TYPE_MASK    0x3000
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY12_CTRL1_CHECK12_HIGH_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY12_CTRL1_CHECK12_HIGH_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY13_CTRL0    0x067f
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY13_CTRL0_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY13_CTRL0_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY13_CTRL1    0x0680
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY13_CTRL1_CHECK13_TYPE_OFFSET    12
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY13_CTRL1_CHECK13_TYPE_MASK    0x3000
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY13_CTRL1_CHECK13_HIGH_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY13_CTRL1_CHECK13_HIGH_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY14_CTRL0    0x0681
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY14_CTRL0_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY14_CTRL0_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY14_CTRL1    0x0682
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY14_CTRL1_CHECK14_TYPE_OFFSET    12
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY14_CTRL1_CHECK14_TYPE_MASK    0x3000
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY14_CTRL1_CHECK14_HIGH_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY14_CTRL1_CHECK14_HIGH_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY15_CTRL0    0x0683
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY15_CTRL0_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY15_CTRL0_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_VID_RANGE_ENTRY15_CTRL1    0x0684
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY15_CTRL1_CHECK15_TYPE_OFFSET    12
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY15_CTRL1_CHECK15_TYPE_MASK    0x3000
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY15_CTRL1_CHECK15_HIGH_OFFSET    0
-+#define    RTL8367C_ACL_VID_RANGE_ENTRY15_CTRL1_CHECK15_HIGH_MASK    0xFFF
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY0_CTRL0    0x0685
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY0_CTRL1    0x0686
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY0_CTRL2    0x0687
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY0_CTRL3    0x0688
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY0_CTRL4    0x0689
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY0_CTRL4_OFFSET    0
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY0_CTRL4_MASK    0x7
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY1_CTRL0    0x068a
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY1_CTRL1    0x068b
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY1_CTRL2    0x068c
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY1_CTRL3    0x068d
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY1_CTRL4    0x068e
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY1_CTRL4_OFFSET    0
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY1_CTRL4_MASK    0x7
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY2_CTRL0    0x068f
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY2_CTRL1    0x0690
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY2_CTRL2    0x0691
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY2_CTRL3    0x0692
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY2_CTRL4    0x0693
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY2_CTRL4_OFFSET    0
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY2_CTRL4_MASK    0x7
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY3_CTRL0    0x0694
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY3_CTRL1    0x0695
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY3_CTRL2    0x0696
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY3_CTRL3    0x0697
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY3_CTRL4    0x0698
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY3_CTRL4_OFFSET    0
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY3_CTRL4_MASK    0x7
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY4_CTRL0    0x0699
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY4_CTRL1    0x069a
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY4_CTRL2    0x069b
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY4_CTRL3    0x069c
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY4_CTRL4    0x069d
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY4_CTRL4_OFFSET    0
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY4_CTRL4_MASK    0x7
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY5_CTRL0    0x069e
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY5_CTRL1    0x069f
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY5_CTRL2    0x06a0
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY5_CTRL3    0x06a1
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY5_CTRL4    0x06a2
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY5_CTRL4_OFFSET    0
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY5_CTRL4_MASK    0x7
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY6_CTRL0    0x06a3
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY6_CTRL1    0x06a4
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY6_CTRL2    0x06a5
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY6_CTRL3    0x06a6
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY6_CTRL4    0x06a7
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY6_CTRL4_OFFSET    0
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY6_CTRL4_MASK    0x7
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY7_CTRL0    0x06a8
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY7_CTRL1    0x06a9
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY7_CTRL2    0x06aa
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY7_CTRL3    0x06ab
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY7_CTRL4    0x06ac
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY7_CTRL4_OFFSET    0
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY7_CTRL4_MASK    0x7
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY8_CTRL0    0x06ad
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY8_CTRL1    0x06ae
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY8_CTRL2    0x06af
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY8_CTRL3    0x06b0
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY8_CTRL4    0x06b1
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY8_CTRL4_OFFSET    0
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY8_CTRL4_MASK    0x7
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY9_CTRL0    0x06b2
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY9_CTRL1    0x06b3
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY9_CTRL2    0x06b4
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY9_CTRL3    0x06b5
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY9_CTRL4    0x06b6
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY9_CTRL4_OFFSET    0
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY9_CTRL4_MASK    0x7
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY10_CTRL0    0x06b7
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY10_CTRL1    0x06b8
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY10_CTRL2    0x06b9
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY10_CTRL3    0x06ba
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY10_CTRL4    0x06bb
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY10_CTRL4_OFFSET    0
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY10_CTRL4_MASK    0x7
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY11_CTRL0    0x06bc
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY11_CTRL1    0x06bd
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY11_CTRL2    0x06be
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY11_CTRL3    0x06bf
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY11_CTRL4    0x06c0
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY11_CTRL4_OFFSET    0
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY11_CTRL4_MASK    0x7
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY12_CTRL0    0x06c1
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY12_CTRL1    0x06c2
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY12_CTRL2    0x06c3
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY12_CTRL3    0x06c4
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY12_CTRL4    0x06c5
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY12_CTRL4_OFFSET    0
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY12_CTRL4_MASK    0x7
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY13_CTRL0    0x06c6
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY13_CTRL1    0x06c7
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY13_CTRL2    0x06c8
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY13_CTRL3    0x06c9
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY13_CTRL4    0x06ca
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY13_CTRL4_OFFSET    0
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY13_CTRL4_MASK    0x7
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY14_CTRL0    0x06cb
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY14_CTRL1    0x06cc
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY14_CTRL2    0x06cd
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY14_CTRL3    0x06ce
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY14_CTRL4    0x06cf
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY14_CTRL4_OFFSET    0
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY14_CTRL4_MASK    0x7
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY15_CTRL0    0x06d0
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY15_CTRL1    0x06d1
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY15_CTRL2    0x06d2
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY15_CTRL3    0x06d3
-+
-+#define    RTL8367C_REG_ACL_IP_RANGE_ENTRY15_CTRL4    0x06d4
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY15_CTRL4_OFFSET    0
-+#define    RTL8367C_ACL_IP_RANGE_ENTRY15_CTRL4_MASK    0x7
-+
-+#define    RTL8367C_REG_ACL_ENABLE    0x06d5
-+#define    RTL8367C_PORT10_ENABLE_OFFSET    10
-+#define    RTL8367C_PORT10_ENABLE_MASK    0x400
-+#define    RTL8367C_PORT9_ENABLE_OFFSET    9
-+#define    RTL8367C_PORT9_ENABLE_MASK    0x200
-+#define    RTL8367C_PORT8_ENABLE_OFFSET    8
-+#define    RTL8367C_PORT8_ENABLE_MASK    0x100
-+#define    RTL8367C_PORT7_ENABLE_OFFSET    7
-+#define    RTL8367C_PORT7_ENABLE_MASK    0x80
-+#define    RTL8367C_PORT6_ENABLE_OFFSET    6
-+#define    RTL8367C_PORT6_ENABLE_MASK    0x40
-+#define    RTL8367C_PORT5_ENABLE_OFFSET    5
-+#define    RTL8367C_PORT5_ENABLE_MASK    0x20
-+#define    RTL8367C_PORT4_ENABLE_OFFSET    4
-+#define    RTL8367C_PORT4_ENABLE_MASK    0x10
-+#define    RTL8367C_PORT3_ENABLE_OFFSET    3
-+#define    RTL8367C_PORT3_ENABLE_MASK    0x8
-+#define    RTL8367C_PORT2_ENABLE_OFFSET    2
-+#define    RTL8367C_PORT2_ENABLE_MASK    0x4
-+#define    RTL8367C_PORT1_ENABLE_OFFSET    1
-+#define    RTL8367C_PORT1_ENABLE_MASK    0x2
-+#define    RTL8367C_PORT0_ENABLE_OFFSET    0
-+#define    RTL8367C_PORT0_ENABLE_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_UNMATCH_PERMIT    0x06d6
-+#define    RTL8367C_PORT10_PERMIT_OFFSET    10
-+#define    RTL8367C_PORT10_PERMIT_MASK    0x400
-+#define    RTL8367C_PORT9_PERMIT_OFFSET    9
-+#define    RTL8367C_PORT9_PERMIT_MASK    0x200
-+#define    RTL8367C_PORT8_PERMIT_OFFSET    8
-+#define    RTL8367C_PORT8_PERMIT_MASK    0x100
-+#define    RTL8367C_PORT7_PERMIT_OFFSET    7
-+#define    RTL8367C_PORT7_PERMIT_MASK    0x80
-+#define    RTL8367C_PORT6_PERMIT_OFFSET    6
-+#define    RTL8367C_PORT6_PERMIT_MASK    0x40
-+#define    RTL8367C_PORT5_PERMIT_OFFSET    5
-+#define    RTL8367C_PORT5_PERMIT_MASK    0x20
-+#define    RTL8367C_PORT4_PERMIT_OFFSET    4
-+#define    RTL8367C_PORT4_PERMIT_MASK    0x10
-+#define    RTL8367C_PORT3_PERMIT_OFFSET    3
-+#define    RTL8367C_PORT3_PERMIT_MASK    0x8
-+#define    RTL8367C_PORT2_PERMIT_OFFSET    2
-+#define    RTL8367C_PORT2_PERMIT_MASK    0x4
-+#define    RTL8367C_PORT1_PERMIT_OFFSET    1
-+#define    RTL8367C_PORT1_PERMIT_MASK    0x2
-+#define    RTL8367C_PORT0_PERMIT_OFFSET    0
-+#define    RTL8367C_PORT0_PERMIT_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_GPIO_POLARITY    0x06d7
-+#define    RTL8367C_ACL_GPIO_POLARITY_OFFSET    0
-+#define    RTL8367C_ACL_GPIO_POLARITY_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_LOG_CNT_TYPE    0x06d8
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER15_TYPE_OFFSET    15
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER15_TYPE_MASK    0x8000
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER14_TYPE_OFFSET    14
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER14_TYPE_MASK    0x4000
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER13_TYPE_OFFSET    13
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER13_TYPE_MASK    0x2000
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER12_TYPE_OFFSET    12
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER12_TYPE_MASK    0x1000
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER11_TYPE_OFFSET    11
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER11_TYPE_MASK    0x800
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER10_TYPE_OFFSET    10
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER10_TYPE_MASK    0x400
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER9_TYPE_OFFSET    9
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER9_TYPE_MASK    0x200
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER8_TYPE_OFFSET    8
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER8_TYPE_MASK    0x100
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER7_TYPE_OFFSET    7
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER7_TYPE_MASK    0x80
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER6_TYPE_OFFSET    6
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER6_TYPE_MASK    0x40
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER5_TYPE_OFFSET    5
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER5_TYPE_MASK    0x20
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER4_TYPE_OFFSET    4
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER4_TYPE_MASK    0x10
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER3_TYPE_OFFSET    3
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER3_TYPE_MASK    0x8
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER2_TYPE_OFFSET    2
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER2_TYPE_MASK    0x4
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER1_TYPE_OFFSET    1
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER1_TYPE_MASK    0x2
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER0_TYPE_OFFSET    0
-+#define    RTL8367C_ACL_LOG_CNT_TYPE_COUNTER0_TYPE_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_RESET_CFG    0x06d9
-+#define    RTL8367C_ACL_RESET_CFG_OFFSET    0
-+#define    RTL8367C_ACL_RESET_CFG_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_DUMMY00    0x06E0
-+
-+#define    RTL8367C_REG_ACL_DUMMY01    0x06E1
-+
-+#define    RTL8367C_REG_ACL_DUMMY02    0x06E2
-+
-+#define    RTL8367C_REG_ACL_DUMMY03    0x06E3
-+
-+#define    RTL8367C_REG_ACL_DUMMY04    0x06E4
-+
-+#define    RTL8367C_REG_ACL_DUMMY05    0x06E5
-+
-+#define    RTL8367C_REG_ACL_DUMMY06    0x06E6
-+
-+#define    RTL8367C_REG_ACL_DUMMY07    0x06E7
-+
-+#define    RTL8367C_REG_ACL_REASON_01    0x06E8
-+#define    RTL8367C_ACL_ACT_1_OFFSET    8
-+#define    RTL8367C_ACL_ACT_1_MASK    0xFF00
-+#define    RTL8367C_ACL_ACT_0_OFFSET    0
-+#define    RTL8367C_ACL_ACT_0_MASK    0xFF
-+
-+#define    RTL8367C_REG_ACL_REASON_23    0x06E9
-+#define    RTL8367C_ACL_ACT_3_OFFSET    8
-+#define    RTL8367C_ACL_ACT_3_MASK    0xFF00
-+#define    RTL8367C_ACL_ACT_2_OFFSET    0
-+#define    RTL8367C_ACL_ACT_2_MASK    0xFF
-+
-+#define    RTL8367C_REG_ACL_REASON_45    0x06EA
-+#define    RTL8367C_ACL_ACT_5_OFFSET    8
-+#define    RTL8367C_ACL_ACT_5_MASK    0xFF00
-+#define    RTL8367C_ACL_ACT_4_OFFSET    0
-+#define    RTL8367C_ACL_ACT_4_MASK    0xFF
-+
-+#define    RTL8367C_REG_ACL_ACCESS_MODE    0x06EB
-+#define    RTL8367C_ACL_ACCESS_MODE_OFFSET    0
-+#define    RTL8367C_ACL_ACCESS_MODE_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL32    0x06F0
-+#define    RTL8367C_OP65_NOT_OFFSET    14
-+#define    RTL8367C_OP65_NOT_MASK    0x4000
-+#define    RTL8367C_ACT65_GPIO_OFFSET    13
-+#define    RTL8367C_ACT65_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT65_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT65_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT65_POLICING_OFFSET    11
-+#define    RTL8367C_ACT65_POLICING_MASK    0x800
-+#define    RTL8367C_ACT65_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT65_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT65_SVID_OFFSET    9
-+#define    RTL8367C_ACT65_SVID_MASK    0x200
-+#define    RTL8367C_ACT65_CVID_OFFSET    8
-+#define    RTL8367C_ACT65_CVID_MASK    0x100
-+#define    RTL8367C_OP64_NOT_OFFSET    6
-+#define    RTL8367C_OP64_NOT_MASK    0x40
-+#define    RTL8367C_ACT64_GPIO_OFFSET    5
-+#define    RTL8367C_ACT64_GPIO_MASK    0x20
-+#define    RTL8367C_ACT64_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT64_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT64_POLICING_OFFSET    3
-+#define    RTL8367C_ACT64_POLICING_MASK    0x8
-+#define    RTL8367C_ACT64_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT64_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT64_SVID_OFFSET    1
-+#define    RTL8367C_ACT64_SVID_MASK    0x2
-+#define    RTL8367C_ACT64_CVID_OFFSET    0
-+#define    RTL8367C_ACT64_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL33    0x06F1
-+#define    RTL8367C_OP67_NOT_OFFSET    14
-+#define    RTL8367C_OP67_NOT_MASK    0x4000
-+#define    RTL8367C_ACT67_GPIO_OFFSET    13
-+#define    RTL8367C_ACT67_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT67_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT67_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT67_POLICING_OFFSET    11
-+#define    RTL8367C_ACT67_POLICING_MASK    0x800
-+#define    RTL8367C_ACT67_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT67_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT67_SVID_OFFSET    9
-+#define    RTL8367C_ACT67_SVID_MASK    0x200
-+#define    RTL8367C_ACT67_CVID_OFFSET    8
-+#define    RTL8367C_ACT67_CVID_MASK    0x100
-+#define    RTL8367C_OP66_NOT_OFFSET    6
-+#define    RTL8367C_OP66_NOT_MASK    0x40
-+#define    RTL8367C_ACT66_GPIO_OFFSET    5
-+#define    RTL8367C_ACT66_GPIO_MASK    0x20
-+#define    RTL8367C_ACT66_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT66_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT66_POLICING_OFFSET    3
-+#define    RTL8367C_ACT66_POLICING_MASK    0x8
-+#define    RTL8367C_ACT66_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT66_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT66_SVID_OFFSET    1
-+#define    RTL8367C_ACT66_SVID_MASK    0x2
-+#define    RTL8367C_ACT66_CVID_OFFSET    0
-+#define    RTL8367C_ACT66_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL34    0x06F2
-+#define    RTL8367C_OP69_NOT_OFFSET    14
-+#define    RTL8367C_OP69_NOT_MASK    0x4000
-+#define    RTL8367C_ACT69_GPIO_OFFSET    13
-+#define    RTL8367C_ACT69_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT69_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT69_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT69_POLICING_OFFSET    11
-+#define    RTL8367C_ACT69_POLICING_MASK    0x800
-+#define    RTL8367C_ACT69_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT69_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT69_SVID_OFFSET    9
-+#define    RTL8367C_ACT69_SVID_MASK    0x200
-+#define    RTL8367C_ACT69_CVID_OFFSET    8
-+#define    RTL8367C_ACT69_CVID_MASK    0x100
-+#define    RTL8367C_OP68_NOT_OFFSET    6
-+#define    RTL8367C_OP68_NOT_MASK    0x40
-+#define    RTL8367C_ACT68_GPIO_OFFSET    5
-+#define    RTL8367C_ACT68_GPIO_MASK    0x20
-+#define    RTL8367C_ACT68_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT68_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT68_POLICING_OFFSET    3
-+#define    RTL8367C_ACT68_POLICING_MASK    0x8
-+#define    RTL8367C_ACT68_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT68_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT68_SVID_OFFSET    1
-+#define    RTL8367C_ACT68_SVID_MASK    0x2
-+#define    RTL8367C_ACT68_CVID_OFFSET    0
-+#define    RTL8367C_ACT68_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL35    0x06F3
-+#define    RTL8367C_OP71_NOT_OFFSET    14
-+#define    RTL8367C_OP71_NOT_MASK    0x4000
-+#define    RTL8367C_ACT71_GPIO_OFFSET    13
-+#define    RTL8367C_ACT71_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT71_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT71_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT71_POLICING_OFFSET    11
-+#define    RTL8367C_ACT71_POLICING_MASK    0x800
-+#define    RTL8367C_ACT71_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT71_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT71_SVID_OFFSET    9
-+#define    RTL8367C_ACT71_SVID_MASK    0x200
-+#define    RTL8367C_ACT71_CVID_OFFSET    8
-+#define    RTL8367C_ACT71_CVID_MASK    0x100
-+#define    RTL8367C_OP70_NOT_OFFSET    6
-+#define    RTL8367C_OP70_NOT_MASK    0x40
-+#define    RTL8367C_ACT70_GPIO_OFFSET    5
-+#define    RTL8367C_ACT70_GPIO_MASK    0x20
-+#define    RTL8367C_ACT70_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT70_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT70_POLICING_OFFSET    3
-+#define    RTL8367C_ACT70_POLICING_MASK    0x8
-+#define    RTL8367C_ACT70_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT70_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT70_SVID_OFFSET    1
-+#define    RTL8367C_ACT70_SVID_MASK    0x2
-+#define    RTL8367C_ACT70_CVID_OFFSET    0
-+#define    RTL8367C_ACT70_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL36    0x06F4
-+#define    RTL8367C_OP73_NOT_OFFSET    14
-+#define    RTL8367C_OP73_NOT_MASK    0x4000
-+#define    RTL8367C_ACT73_GPIO_OFFSET    13
-+#define    RTL8367C_ACT73_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT73_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT73_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT73_POLICING_OFFSET    11
-+#define    RTL8367C_ACT73_POLICING_MASK    0x800
-+#define    RTL8367C_ACT73_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT73_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT73_SVID_OFFSET    9
-+#define    RTL8367C_ACT73_SVID_MASK    0x200
-+#define    RTL8367C_ACT73_CVID_OFFSET    8
-+#define    RTL8367C_ACT73_CVID_MASK    0x100
-+#define    RTL8367C_OP72_NOT_OFFSET    6
-+#define    RTL8367C_OP72_NOT_MASK    0x40
-+#define    RTL8367C_ACT72_GPIO_OFFSET    5
-+#define    RTL8367C_ACT72_GPIO_MASK    0x20
-+#define    RTL8367C_ACT72_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT72_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT72_POLICING_OFFSET    3
-+#define    RTL8367C_ACT72_POLICING_MASK    0x8
-+#define    RTL8367C_ACT72_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT72_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT72_SVID_OFFSET    1
-+#define    RTL8367C_ACT72_SVID_MASK    0x2
-+#define    RTL8367C_ACT72_CVID_OFFSET    0
-+#define    RTL8367C_ACT72_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL37    0x06F5
-+#define    RTL8367C_OP75_NOT_OFFSET    14
-+#define    RTL8367C_OP75_NOT_MASK    0x4000
-+#define    RTL8367C_ACT75_GPIO_OFFSET    13
-+#define    RTL8367C_ACT75_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT75_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT75_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT75_POLICING_OFFSET    11
-+#define    RTL8367C_ACT75_POLICING_MASK    0x800
-+#define    RTL8367C_ACT75_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT75_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT75_SVID_OFFSET    9
-+#define    RTL8367C_ACT75_SVID_MASK    0x200
-+#define    RTL8367C_ACT75_CVID_OFFSET    8
-+#define    RTL8367C_ACT75_CVID_MASK    0x100
-+#define    RTL8367C_OP74_NOT_OFFSET    6
-+#define    RTL8367C_OP74_NOT_MASK    0x40
-+#define    RTL8367C_ACT74_GPIO_OFFSET    5
-+#define    RTL8367C_ACT74_GPIO_MASK    0x20
-+#define    RTL8367C_ACT74_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT74_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT74_POLICING_OFFSET    3
-+#define    RTL8367C_ACT74_POLICING_MASK    0x8
-+#define    RTL8367C_ACT74_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT74_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT74_SVID_OFFSET    1
-+#define    RTL8367C_ACT74_SVID_MASK    0x2
-+#define    RTL8367C_ACT74_CVID_OFFSET    0
-+#define    RTL8367C_ACT74_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL38    0x06F6
-+#define    RTL8367C_OP77_NOT_OFFSET    14
-+#define    RTL8367C_OP77_NOT_MASK    0x4000
-+#define    RTL8367C_ACT77_GPIO_OFFSET    13
-+#define    RTL8367C_ACT77_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT77_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT77_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT77_POLICING_OFFSET    11
-+#define    RTL8367C_ACT77_POLICING_MASK    0x800
-+#define    RTL8367C_ACT77_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT77_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT77_SVID_OFFSET    9
-+#define    RTL8367C_ACT77_SVID_MASK    0x200
-+#define    RTL8367C_ACT77_CVID_OFFSET    8
-+#define    RTL8367C_ACT77_CVID_MASK    0x100
-+#define    RTL8367C_OP76_NOT_OFFSET    6
-+#define    RTL8367C_OP76_NOT_MASK    0x40
-+#define    RTL8367C_ACT76_GPIO_OFFSET    5
-+#define    RTL8367C_ACT76_GPIO_MASK    0x20
-+#define    RTL8367C_ACT76_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT76_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT76_POLICING_OFFSET    3
-+#define    RTL8367C_ACT76_POLICING_MASK    0x8
-+#define    RTL8367C_ACT76_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT76_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT76_SVID_OFFSET    1
-+#define    RTL8367C_ACT76_SVID_MASK    0x2
-+#define    RTL8367C_ACT76_CVID_OFFSET    0
-+#define    RTL8367C_ACT76_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL39    0x06F7
-+#define    RTL8367C_OP79_NOT_OFFSET    14
-+#define    RTL8367C_OP79_NOT_MASK    0x4000
-+#define    RTL8367C_ACT79_GPIO_OFFSET    13
-+#define    RTL8367C_ACT79_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT79_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT79_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT79_POLICING_OFFSET    11
-+#define    RTL8367C_ACT79_POLICING_MASK    0x800
-+#define    RTL8367C_ACT79_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT79_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT79_SVID_OFFSET    9
-+#define    RTL8367C_ACT79_SVID_MASK    0x200
-+#define    RTL8367C_ACT79_CVID_OFFSET    8
-+#define    RTL8367C_ACT79_CVID_MASK    0x100
-+#define    RTL8367C_OP78_NOT_OFFSET    6
-+#define    RTL8367C_OP78_NOT_MASK    0x40
-+#define    RTL8367C_ACT78_GPIO_OFFSET    5
-+#define    RTL8367C_ACT78_GPIO_MASK    0x20
-+#define    RTL8367C_ACT78_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT78_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT78_POLICING_OFFSET    3
-+#define    RTL8367C_ACT78_POLICING_MASK    0x8
-+#define    RTL8367C_ACT78_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT78_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT78_SVID_OFFSET    1
-+#define    RTL8367C_ACT78_SVID_MASK    0x2
-+#define    RTL8367C_ACT78_CVID_OFFSET    0
-+#define    RTL8367C_ACT78_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL40    0x06F8
-+#define    RTL8367C_OP81_NOT_OFFSET    14
-+#define    RTL8367C_OP81_NOT_MASK    0x4000
-+#define    RTL8367C_ACT81_GPIO_OFFSET    13
-+#define    RTL8367C_ACT81_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT81_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT81_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT81_POLICING_OFFSET    11
-+#define    RTL8367C_ACT81_POLICING_MASK    0x800
-+#define    RTL8367C_ACT81_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT81_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT81_SVID_OFFSET    9
-+#define    RTL8367C_ACT81_SVID_MASK    0x200
-+#define    RTL8367C_ACT81_CVID_OFFSET    8
-+#define    RTL8367C_ACT81_CVID_MASK    0x100
-+#define    RTL8367C_OP80_NOT_OFFSET    6
-+#define    RTL8367C_OP80_NOT_MASK    0x40
-+#define    RTL8367C_ACT80_GPIO_OFFSET    5
-+#define    RTL8367C_ACT80_GPIO_MASK    0x20
-+#define    RTL8367C_ACT80_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT80_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT80_POLICING_OFFSET    3
-+#define    RTL8367C_ACT80_POLICING_MASK    0x8
-+#define    RTL8367C_ACT80_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT80_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT80_SVID_OFFSET    1
-+#define    RTL8367C_ACT80_SVID_MASK    0x2
-+#define    RTL8367C_ACT80_CVID_OFFSET    0
-+#define    RTL8367C_ACT80_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL41    0x06F9
-+#define    RTL8367C_OP83_NOT_OFFSET    14
-+#define    RTL8367C_OP83_NOT_MASK    0x4000
-+#define    RTL8367C_ACT83_GPIO_OFFSET    13
-+#define    RTL8367C_ACT83_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT83_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT83_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT83_POLICING_OFFSET    11
-+#define    RTL8367C_ACT83_POLICING_MASK    0x800
-+#define    RTL8367C_ACT83_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT83_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT83_SVID_OFFSET    9
-+#define    RTL8367C_ACT83_SVID_MASK    0x200
-+#define    RTL8367C_ACT83_CVID_OFFSET    8
-+#define    RTL8367C_ACT83_CVID_MASK    0x100
-+#define    RTL8367C_OP82_NOT_OFFSET    6
-+#define    RTL8367C_OP82_NOT_MASK    0x40
-+#define    RTL8367C_ACT82_GPIO_OFFSET    5
-+#define    RTL8367C_ACT82_GPIO_MASK    0x20
-+#define    RTL8367C_ACT82_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT82_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT82_POLICING_OFFSET    3
-+#define    RTL8367C_ACT82_POLICING_MASK    0x8
-+#define    RTL8367C_ACT82_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT82_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT82_SVID_OFFSET    1
-+#define    RTL8367C_ACT82_SVID_MASK    0x2
-+#define    RTL8367C_ACT82_CVID_OFFSET    0
-+#define    RTL8367C_ACT82_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL42    0x06FA
-+#define    RTL8367C_OP85_NOT_OFFSET    14
-+#define    RTL8367C_OP85_NOT_MASK    0x4000
-+#define    RTL8367C_ACT85_GPIO_OFFSET    13
-+#define    RTL8367C_ACT85_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT85_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT85_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT85_POLICING_OFFSET    11
-+#define    RTL8367C_ACT85_POLICING_MASK    0x800
-+#define    RTL8367C_ACT85_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT85_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT85_SVID_OFFSET    9
-+#define    RTL8367C_ACT85_SVID_MASK    0x200
-+#define    RTL8367C_ACT85_CVID_OFFSET    8
-+#define    RTL8367C_ACT85_CVID_MASK    0x100
-+#define    RTL8367C_OP84_NOT_OFFSET    6
-+#define    RTL8367C_OP84_NOT_MASK    0x40
-+#define    RTL8367C_ACT84_GPIO_OFFSET    5
-+#define    RTL8367C_ACT84_GPIO_MASK    0x20
-+#define    RTL8367C_ACT84_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT84_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT84_POLICING_OFFSET    3
-+#define    RTL8367C_ACT84_POLICING_MASK    0x8
-+#define    RTL8367C_ACT84_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT84_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT84_SVID_OFFSET    1
-+#define    RTL8367C_ACT84_SVID_MASK    0x2
-+#define    RTL8367C_ACT84_CVID_OFFSET    0
-+#define    RTL8367C_ACT84_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL43    0x06FB
-+#define    RTL8367C_OP87_NOT_OFFSET    14
-+#define    RTL8367C_OP87_NOT_MASK    0x4000
-+#define    RTL8367C_ACT87_GPIO_OFFSET    13
-+#define    RTL8367C_ACT87_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT87_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT87_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT87_POLICING_OFFSET    11
-+#define    RTL8367C_ACT87_POLICING_MASK    0x800
-+#define    RTL8367C_ACT87_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT87_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT87_SVID_OFFSET    9
-+#define    RTL8367C_ACT87_SVID_MASK    0x200
-+#define    RTL8367C_ACT87_CVID_OFFSET    8
-+#define    RTL8367C_ACT87_CVID_MASK    0x100
-+#define    RTL8367C_OP86_NOT_OFFSET    6
-+#define    RTL8367C_OP86_NOT_MASK    0x40
-+#define    RTL8367C_ACT86_GPIO_OFFSET    5
-+#define    RTL8367C_ACT86_GPIO_MASK    0x20
-+#define    RTL8367C_ACT86_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT86_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT86_POLICING_OFFSET    3
-+#define    RTL8367C_ACT86_POLICING_MASK    0x8
-+#define    RTL8367C_ACT86_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT86_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT86_SVID_OFFSET    1
-+#define    RTL8367C_ACT86_SVID_MASK    0x2
-+#define    RTL8367C_ACT86_CVID_OFFSET    0
-+#define    RTL8367C_ACT86_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL44    0x06FC
-+#define    RTL8367C_OP89_NOT_OFFSET    14
-+#define    RTL8367C_OP89_NOT_MASK    0x4000
-+#define    RTL8367C_ACT89_GPIO_OFFSET    13
-+#define    RTL8367C_ACT89_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT89_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT89_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT89_POLICING_OFFSET    11
-+#define    RTL8367C_ACT89_POLICING_MASK    0x800
-+#define    RTL8367C_ACT89_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT89_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT89_SVID_OFFSET    9
-+#define    RTL8367C_ACT89_SVID_MASK    0x200
-+#define    RTL8367C_ACT89_CVID_OFFSET    8
-+#define    RTL8367C_ACT89_CVID_MASK    0x100
-+#define    RTL8367C_OP88_NOT_OFFSET    6
-+#define    RTL8367C_OP88_NOT_MASK    0x40
-+#define    RTL8367C_ACT88_GPIO_OFFSET    5
-+#define    RTL8367C_ACT88_GPIO_MASK    0x20
-+#define    RTL8367C_ACT88_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT88_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT88_POLICING_OFFSET    3
-+#define    RTL8367C_ACT88_POLICING_MASK    0x8
-+#define    RTL8367C_ACT88_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT88_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT88_SVID_OFFSET    1
-+#define    RTL8367C_ACT88_SVID_MASK    0x2
-+#define    RTL8367C_ACT88_CVID_OFFSET    0
-+#define    RTL8367C_ACT88_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL45    0x06FD
-+#define    RTL8367C_OP91_NOT_OFFSET    14
-+#define    RTL8367C_OP91_NOT_MASK    0x4000
-+#define    RTL8367C_ACT91_GPIO_OFFSET    13
-+#define    RTL8367C_ACT91_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT91_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT91_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT91_POLICING_OFFSET    11
-+#define    RTL8367C_ACT91_POLICING_MASK    0x800
-+#define    RTL8367C_ACT91_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT91_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT91_SVID_OFFSET    9
-+#define    RTL8367C_ACT91_SVID_MASK    0x200
-+#define    RTL8367C_ACT91_CVID_OFFSET    8
-+#define    RTL8367C_ACT91_CVID_MASK    0x100
-+#define    RTL8367C_OP90_NOT_OFFSET    6
-+#define    RTL8367C_OP90_NOT_MASK    0x40
-+#define    RTL8367C_ACT90_GPIO_OFFSET    5
-+#define    RTL8367C_ACT90_GPIO_MASK    0x20
-+#define    RTL8367C_ACT90_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT90_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT90_POLICING_OFFSET    3
-+#define    RTL8367C_ACT90_POLICING_MASK    0x8
-+#define    RTL8367C_ACT90_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT90_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT90_SVID_OFFSET    1
-+#define    RTL8367C_ACT90_SVID_MASK    0x2
-+#define    RTL8367C_ACT90_CVID_OFFSET    0
-+#define    RTL8367C_ACT90_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL46    0x06FE
-+#define    RTL8367C_OP93_NOT_OFFSET    14
-+#define    RTL8367C_OP93_NOT_MASK    0x4000
-+#define    RTL8367C_ACT93_GPIO_OFFSET    13
-+#define    RTL8367C_ACT93_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT93_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT93_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT93_POLICING_OFFSET    11
-+#define    RTL8367C_ACT93_POLICING_MASK    0x800
-+#define    RTL8367C_ACT93_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT93_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT93_SVID_OFFSET    9
-+#define    RTL8367C_ACT93_SVID_MASK    0x200
-+#define    RTL8367C_ACT93_CVID_OFFSET    8
-+#define    RTL8367C_ACT93_CVID_MASK    0x100
-+#define    RTL8367C_OP92_NOT_OFFSET    6
-+#define    RTL8367C_OP92_NOT_MASK    0x40
-+#define    RTL8367C_ACT92_GPIO_OFFSET    5
-+#define    RTL8367C_ACT92_GPIO_MASK    0x20
-+#define    RTL8367C_ACT92_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT92_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT92_POLICING_OFFSET    3
-+#define    RTL8367C_ACT92_POLICING_MASK    0x8
-+#define    RTL8367C_ACT92_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT92_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT92_SVID_OFFSET    1
-+#define    RTL8367C_ACT92_SVID_MASK    0x2
-+#define    RTL8367C_ACT92_CVID_OFFSET    0
-+#define    RTL8367C_ACT92_CVID_MASK    0x1
-+
-+#define    RTL8367C_REG_ACL_ACTION_CTRL47    0x06FF
-+#define    RTL8367C_OP95_NOT_OFFSET    14
-+#define    RTL8367C_OP95_NOT_MASK    0x4000
-+#define    RTL8367C_ACT95_GPIO_OFFSET    13
-+#define    RTL8367C_ACT95_GPIO_MASK    0x2000
-+#define    RTL8367C_ACT95_FORWARD_OFFSET    12
-+#define    RTL8367C_ACT95_FORWARD_MASK    0x1000
-+#define    RTL8367C_ACT95_POLICING_OFFSET    11
-+#define    RTL8367C_ACT95_POLICING_MASK    0x800
-+#define    RTL8367C_ACT95_PRIORITY_OFFSET    10
-+#define    RTL8367C_ACT95_PRIORITY_MASK    0x400
-+#define    RTL8367C_ACT95_SVID_OFFSET    9
-+#define    RTL8367C_ACT95_SVID_MASK    0x200
-+#define    RTL8367C_ACT95_CVID_OFFSET    8
-+#define    RTL8367C_ACT95_CVID_MASK    0x100
-+#define    RTL8367C_OP94_NOT_OFFSET    6
-+#define    RTL8367C_OP94_NOT_MASK    0x40
-+#define    RTL8367C_ACT94_GPIO_OFFSET    5
-+#define    RTL8367C_ACT94_GPIO_MASK    0x20
-+#define    RTL8367C_ACT94_FORWARD_OFFSET    4
-+#define    RTL8367C_ACT94_FORWARD_MASK    0x10
-+#define    RTL8367C_ACT94_POLICING_OFFSET    3
-+#define    RTL8367C_ACT94_POLICING_MASK    0x8
-+#define    RTL8367C_ACT94_PRIORITY_OFFSET    2
-+#define    RTL8367C_ACT94_PRIORITY_MASK    0x4
-+#define    RTL8367C_ACT94_SVID_OFFSET    1
-+#define    RTL8367C_ACT94_SVID_MASK    0x2
-+#define    RTL8367C_ACT94_CVID_OFFSET    0
-+#define    RTL8367C_ACT94_CVID_MASK    0x1
-+
-+/* (16'h0700)cvlan_reg */
-+
-+#define    RTL8367C_REG_VLAN_PVID_CTRL0    0x0700
-+#define    RTL8367C_PORT1_VIDX_OFFSET    8
-+#define    RTL8367C_PORT1_VIDX_MASK    0x1F00
-+#define    RTL8367C_PORT0_VIDX_OFFSET    0
-+#define    RTL8367C_PORT0_VIDX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PVID_CTRL1    0x0701
-+#define    RTL8367C_PORT3_VIDX_OFFSET    8
-+#define    RTL8367C_PORT3_VIDX_MASK    0x1F00
-+#define    RTL8367C_PORT2_VIDX_OFFSET    0
-+#define    RTL8367C_PORT2_VIDX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PVID_CTRL2    0x0702
-+#define    RTL8367C_PORT5_VIDX_OFFSET    8
-+#define    RTL8367C_PORT5_VIDX_MASK    0x1F00
-+#define    RTL8367C_PORT4_VIDX_OFFSET    0
-+#define    RTL8367C_PORT4_VIDX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PVID_CTRL3    0x0703
-+#define    RTL8367C_PORT7_VIDX_OFFSET    8
-+#define    RTL8367C_PORT7_VIDX_MASK    0x1F00
-+#define    RTL8367C_PORT6_VIDX_OFFSET    0
-+#define    RTL8367C_PORT6_VIDX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PVID_CTRL4    0x0704
-+#define    RTL8367C_PORT9_VIDX_OFFSET    8
-+#define    RTL8367C_PORT9_VIDX_MASK    0x1F00
-+#define    RTL8367C_PORT8_VIDX_OFFSET    0
-+#define    RTL8367C_PORT8_VIDX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PVID_CTRL5    0x0705
-+#define    RTL8367C_VLAN_PVID_CTRL5_OFFSET    0
-+#define    RTL8367C_VLAN_PVID_CTRL5_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PPB0_VALID    0x0708
-+#define    RTL8367C_VLAN_PPB0_VALID_VALID_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_PPB0_VALID_VALID_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_PPB0_VALID_VALID_OFFSET    0
-+#define    RTL8367C_VLAN_PPB0_VALID_VALID_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_PPB0_CTRL0    0x0709
-+#define    RTL8367C_VLAN_PPB0_CTRL0_PORT2_INDEX_OFFSET    10
-+#define    RTL8367C_VLAN_PPB0_CTRL0_PORT2_INDEX_MASK    0x7C00
-+#define    RTL8367C_VLAN_PPB0_CTRL0_PORT1_INDEX_OFFSET    5
-+#define    RTL8367C_VLAN_PPB0_CTRL0_PORT1_INDEX_MASK    0x3E0
-+#define    RTL8367C_VLAN_PPB0_CTRL0_PORT0_INDEX_OFFSET    0
-+#define    RTL8367C_VLAN_PPB0_CTRL0_PORT0_INDEX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PPB0_CTRL1    0x070a
-+#define    RTL8367C_VLAN_PPB0_CTRL1_PORT5_INDEX_OFFSET    10
-+#define    RTL8367C_VLAN_PPB0_CTRL1_PORT5_INDEX_MASK    0x7C00
-+#define    RTL8367C_VLAN_PPB0_CTRL1_PORT4_INDEX_OFFSET    5
-+#define    RTL8367C_VLAN_PPB0_CTRL1_PORT4_INDEX_MASK    0x3E0
-+#define    RTL8367C_VLAN_PPB0_CTRL1_PORT3_INDEX_OFFSET    0
-+#define    RTL8367C_VLAN_PPB0_CTRL1_PORT3_INDEX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PPB0_CTRL2    0x070b
-+#define    RTL8367C_VLAN_PPB0_CTRL2_FRAME_TYPE_OFFSET    10
-+#define    RTL8367C_VLAN_PPB0_CTRL2_FRAME_TYPE_MASK    0xC00
-+#define    RTL8367C_VLAN_PPB0_CTRL2_PORT7_INDEX_OFFSET    5
-+#define    RTL8367C_VLAN_PPB0_CTRL2_PORT7_INDEX_MASK    0x3E0
-+#define    RTL8367C_VLAN_PPB0_CTRL2_PORT6_INDEX_OFFSET    0
-+#define    RTL8367C_VLAN_PPB0_CTRL2_PORT6_INDEX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PPB0_CTRL4    0x070c
-+#define    RTL8367C_VLAN_PPB0_CTRL4_PORT10_INDEX_OFFSET    10
-+#define    RTL8367C_VLAN_PPB0_CTRL4_PORT10_INDEX_MASK    0x7C00
-+#define    RTL8367C_VLAN_PPB0_CTRL4_PORT9_INDEX_OFFSET    5
-+#define    RTL8367C_VLAN_PPB0_CTRL4_PORT9_INDEX_MASK    0x3E0
-+#define    RTL8367C_VLAN_PPB0_CTRL4_PORT8_INDEX_OFFSET    0
-+#define    RTL8367C_VLAN_PPB0_CTRL4_PORT8_INDEX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PPB0_CTRL3    0x070f
-+
-+#define    RTL8367C_REG_VLAN_PPB1_VALID    0x0710
-+#define    RTL8367C_VLAN_PPB1_VALID_VALID_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_PPB1_VALID_VALID_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_PPB1_VALID_VALID_OFFSET    0
-+#define    RTL8367C_VLAN_PPB1_VALID_VALID_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_PPB1_CTRL0    0x0711
-+#define    RTL8367C_VLAN_PPB1_CTRL0_PORT2_INDEX_OFFSET    10
-+#define    RTL8367C_VLAN_PPB1_CTRL0_PORT2_INDEX_MASK    0x7C00
-+#define    RTL8367C_VLAN_PPB1_CTRL0_PORT1_INDEX_OFFSET    5
-+#define    RTL8367C_VLAN_PPB1_CTRL0_PORT1_INDEX_MASK    0x3E0
-+#define    RTL8367C_VLAN_PPB1_CTRL0_PORT0_INDEX_OFFSET    0
-+#define    RTL8367C_VLAN_PPB1_CTRL0_PORT0_INDEX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PPB1_CTRL1    0x0712
-+#define    RTL8367C_VLAN_PPB1_CTRL1_PORT5_INDEX_OFFSET    10
-+#define    RTL8367C_VLAN_PPB1_CTRL1_PORT5_INDEX_MASK    0x7C00
-+#define    RTL8367C_VLAN_PPB1_CTRL1_PORT4_INDEX_OFFSET    5
-+#define    RTL8367C_VLAN_PPB1_CTRL1_PORT4_INDEX_MASK    0x3E0
-+#define    RTL8367C_VLAN_PPB1_CTRL1_PORT3_INDEX_OFFSET    0
-+#define    RTL8367C_VLAN_PPB1_CTRL1_PORT3_INDEX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PPB1_CTRL2    0x0713
-+#define    RTL8367C_VLAN_PPB1_CTRL2_FRAME_TYPE_OFFSET    10
-+#define    RTL8367C_VLAN_PPB1_CTRL2_FRAME_TYPE_MASK    0xC00
-+#define    RTL8367C_VLAN_PPB1_CTRL2_PORT7_INDEX_OFFSET    5
-+#define    RTL8367C_VLAN_PPB1_CTRL2_PORT7_INDEX_MASK    0x3E0
-+#define    RTL8367C_VLAN_PPB1_CTRL2_PORT6_INDEX_OFFSET    0
-+#define    RTL8367C_VLAN_PPB1_CTRL2_PORT6_INDEX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PPB1_CTRL4    0x0714
-+#define    RTL8367C_VLAN_PPB1_CTRL4_PORT10_INDEX_OFFSET    10
-+#define    RTL8367C_VLAN_PPB1_CTRL4_PORT10_INDEX_MASK    0x7C00
-+#define    RTL8367C_VLAN_PPB1_CTRL4_PORT9_INDEX_OFFSET    5
-+#define    RTL8367C_VLAN_PPB1_CTRL4_PORT9_INDEX_MASK    0x3E0
-+#define    RTL8367C_VLAN_PPB1_CTRL4_PORT8_INDEX_OFFSET    0
-+#define    RTL8367C_VLAN_PPB1_CTRL4_PORT8_INDEX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PPB1_CTRL3    0x0717
-+
-+#define    RTL8367C_REG_VLAN_PPB2_VALID    0x0718
-+#define    RTL8367C_VLAN_PPB2_VALID_VALID_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_PPB2_VALID_VALID_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_PPB2_VALID_VALID_OFFSET    0
-+#define    RTL8367C_VLAN_PPB2_VALID_VALID_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_PPB2_CTRL0    0x0719
-+#define    RTL8367C_VLAN_PPB2_CTRL0_PORT2_INDEX_OFFSET    10
-+#define    RTL8367C_VLAN_PPB2_CTRL0_PORT2_INDEX_MASK    0x7C00
-+#define    RTL8367C_VLAN_PPB2_CTRL0_PORT1_INDEX_OFFSET    5
-+#define    RTL8367C_VLAN_PPB2_CTRL0_PORT1_INDEX_MASK    0x3E0
-+#define    RTL8367C_VLAN_PPB2_CTRL0_PORT0_INDEX_OFFSET    0
-+#define    RTL8367C_VLAN_PPB2_CTRL0_PORT0_INDEX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PPB2_CTRL1    0x071a
-+#define    RTL8367C_VLAN_PPB2_CTRL1_PORT5_INDEX_OFFSET    10
-+#define    RTL8367C_VLAN_PPB2_CTRL1_PORT5_INDEX_MASK    0x7C00
-+#define    RTL8367C_VLAN_PPB2_CTRL1_PORT4_INDEX_OFFSET    5
-+#define    RTL8367C_VLAN_PPB2_CTRL1_PORT4_INDEX_MASK    0x3E0
-+#define    RTL8367C_VLAN_PPB2_CTRL1_PORT3_INDEX_OFFSET    0
-+#define    RTL8367C_VLAN_PPB2_CTRL1_PORT3_INDEX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PPB2_CTRL2    0x071b
-+#define    RTL8367C_VLAN_PPB2_CTRL2_FRAME_TYPE_OFFSET    10
-+#define    RTL8367C_VLAN_PPB2_CTRL2_FRAME_TYPE_MASK    0xC00
-+#define    RTL8367C_VLAN_PPB2_CTRL2_PORT7_INDEX_OFFSET    5
-+#define    RTL8367C_VLAN_PPB2_CTRL2_PORT7_INDEX_MASK    0x3E0
-+#define    RTL8367C_VLAN_PPB2_CTRL2_PORT6_INDEX_OFFSET    0
-+#define    RTL8367C_VLAN_PPB2_CTRL2_PORT6_INDEX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PPB2_CTRL4    0x071c
-+#define    RTL8367C_VLAN_PPB2_CTRL4_PORT10_INDEX_OFFSET    10
-+#define    RTL8367C_VLAN_PPB2_CTRL4_PORT10_INDEX_MASK    0x7C00
-+#define    RTL8367C_VLAN_PPB2_CTRL4_PORT9_INDEX_OFFSET    5
-+#define    RTL8367C_VLAN_PPB2_CTRL4_PORT9_INDEX_MASK    0x3E0
-+#define    RTL8367C_VLAN_PPB2_CTRL4_PORT8_INDEX_OFFSET    0
-+#define    RTL8367C_VLAN_PPB2_CTRL4_PORT8_INDEX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PPB2_CTRL3    0x071f
-+
-+#define    RTL8367C_REG_VLAN_PPB3_VALID    0x0720
-+#define    RTL8367C_VLAN_PPB3_VALID_VALID_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_PPB3_VALID_VALID_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_PPB3_VALID_VALID_OFFSET    0
-+#define    RTL8367C_VLAN_PPB3_VALID_VALID_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_PPB3_CTRL0    0x0721
-+#define    RTL8367C_VLAN_PPB3_CTRL0_PORT2_INDEX_OFFSET    10
-+#define    RTL8367C_VLAN_PPB3_CTRL0_PORT2_INDEX_MASK    0x7C00
-+#define    RTL8367C_VLAN_PPB3_CTRL0_PORT1_INDEX_OFFSET    5
-+#define    RTL8367C_VLAN_PPB3_CTRL0_PORT1_INDEX_MASK    0x3E0
-+#define    RTL8367C_VLAN_PPB3_CTRL0_PORT0_INDEX_OFFSET    0
-+#define    RTL8367C_VLAN_PPB3_CTRL0_PORT0_INDEX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PPB3_CTRL1    0x0722
-+#define    RTL8367C_VLAN_PPB3_CTRL1_PORT5_INDEX_OFFSET    10
-+#define    RTL8367C_VLAN_PPB3_CTRL1_PORT5_INDEX_MASK    0x7C00
-+#define    RTL8367C_VLAN_PPB3_CTRL1_PORT4_INDEX_OFFSET    5
-+#define    RTL8367C_VLAN_PPB3_CTRL1_PORT4_INDEX_MASK    0x3E0
-+#define    RTL8367C_VLAN_PPB3_CTRL1_PORT3_INDEX_OFFSET    0
-+#define    RTL8367C_VLAN_PPB3_CTRL1_PORT3_INDEX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PPB3_CTRL2    0x0723
-+#define    RTL8367C_VLAN_PPB3_CTRL2_FRAME_TYPE_OFFSET    10
-+#define    RTL8367C_VLAN_PPB3_CTRL2_FRAME_TYPE_MASK    0xC00
-+#define    RTL8367C_VLAN_PPB3_CTRL2_PORT7_INDEX_OFFSET    5
-+#define    RTL8367C_VLAN_PPB3_CTRL2_PORT7_INDEX_MASK    0x3E0
-+#define    RTL8367C_VLAN_PPB3_CTRL2_PORT6_INDEX_OFFSET    0
-+#define    RTL8367C_VLAN_PPB3_CTRL2_PORT6_INDEX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PPB3_CTRL4    0x0724
-+#define    RTL8367C_VLAN_PPB3_CTRL4_PORT10_INDEX_OFFSET    10
-+#define    RTL8367C_VLAN_PPB3_CTRL4_PORT10_INDEX_MASK    0x7C00
-+#define    RTL8367C_VLAN_PPB3_CTRL4_PORT9_INDEX_OFFSET    5
-+#define    RTL8367C_VLAN_PPB3_CTRL4_PORT9_INDEX_MASK    0x3E0
-+#define    RTL8367C_VLAN_PPB3_CTRL4_PORT8_INDEX_OFFSET    0
-+#define    RTL8367C_VLAN_PPB3_CTRL4_PORT8_INDEX_MASK    0x1F
-+
-+#define    RTL8367C_REG_VLAN_PPB3_CTRL3    0x0727
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION0_CTRL0    0x0728
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION0_CTRL1    0x0729
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION0_CTRL2    0x072a
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION0_CTRL3    0x072b
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION0_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION1_CTRL0    0x072c
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION1_CTRL1    0x072d
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION1_CTRL2    0x072e
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION1_CTRL3    0x072f
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION1_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION2_CTRL0    0x0730
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION2_CTRL1    0x0731
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION2_CTRL2    0x0732
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION2_CTRL3    0x0733
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION2_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION3_CTRL0    0x0734
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION3_CTRL1    0x0735
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION3_CTRL2    0x0736
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION3_CTRL3    0x0737
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION3_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION4_CTRL0    0x0738
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION4_CTRL1    0x0739
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION4_CTRL2    0x073a
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION4_CTRL3    0x073b
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION4_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION5_CTRL0    0x073c
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION5_CTRL1    0x073d
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION5_CTRL2    0x073e
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION5_CTRL3    0x073f
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION5_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION6_CTRL0    0x0740
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION6_CTRL1    0x0741
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION6_CTRL2    0x0742
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION6_CTRL3    0x0743
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION6_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION7_CTRL0    0x0744
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION7_CTRL1    0x0745
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION7_CTRL2    0x0746
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION7_CTRL3    0x0747
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION7_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION8_CTRL0    0x0748
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION8_CTRL1    0x0749
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION8_CTRL2    0x074a
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION8_CTRL3    0x074b
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION8_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION9_CTRL0    0x074c
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION9_CTRL1    0x074d
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION9_CTRL2    0x074e
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION9_CTRL3    0x074f
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION9_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION10_CTRL0    0x0750
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION10_CTRL1    0x0751
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION10_CTRL2    0x0752
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION10_CTRL3    0x0753
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION10_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION11_CTRL0    0x0754
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION11_CTRL1    0x0755
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION11_CTRL2    0x0756
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION11_CTRL3    0x0757
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION11_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION12_CTRL0    0x0758
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION12_CTRL1    0x0759
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION12_CTRL2    0x075a
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION12_CTRL3    0x075b
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION12_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION13_CTRL0    0x075c
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION13_CTRL1    0x075d
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION13_CTRL2    0x075e
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION13_CTRL3    0x075f
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION13_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION14_CTRL0    0x0760
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION14_CTRL1    0x0761
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION14_CTRL2    0x0762
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION14_CTRL3    0x0763
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION14_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION15_CTRL0    0x0764
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION15_CTRL1    0x0765
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION15_CTRL2    0x0766
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION15_CTRL3    0x0767
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION15_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION16_CTRL0    0x0768
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION16_CTRL1    0x0769
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION16_CTRL2    0x076a
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION16_CTRL3    0x076b
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION16_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION17_CTRL0    0x076c
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION17_CTRL1    0x076d
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION17_CTRL2    0x076e
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION17_CTRL3    0x076f
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION17_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION18_CTRL0    0x0770
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION18_CTRL1    0x0771
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION18_CTRL2    0x0772
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION18_CTRL3    0x0773
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION18_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION19_CTRL0    0x0774
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION19_CTRL1    0x0775
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION19_CTRL2    0x0776
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION19_CTRL3    0x0777
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION19_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION20_CTRL0    0x0778
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION20_CTRL1    0x0779
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION20_CTRL2    0x077a
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION20_CTRL3    0x077b
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION20_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION21_CTRL0    0x077c
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION21_CTRL1    0x077d
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION21_CTRL2    0x077e
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION21_CTRL3    0x077f
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION21_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION22_CTRL0    0x0780
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION22_CTRL1    0x0781
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION22_CTRL2    0x0782
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION22_CTRL3    0x0783
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION22_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION23_CTRL0    0x0784
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION23_CTRL1    0x0785
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION23_CTRL2    0x0786
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION23_CTRL3    0x0787
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION23_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION24_CTRL0    0x0788
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION24_CTRL1    0x0789
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION24_CTRL2    0x078a
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION24_CTRL3    0x078b
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION24_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION25_CTRL0    0x078c
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION25_CTRL1    0x078d
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION25_CTRL2    0x078e
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION25_CTRL3    0x078f
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION25_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION26_CTRL0    0x0790
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION26_CTRL1    0x0791
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION26_CTRL2    0x0792
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION26_CTRL3    0x0793
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION26_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION27_CTRL0    0x0794
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION27_CTRL1    0x0795
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION27_CTRL2    0x0796
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION27_CTRL3    0x0797
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION27_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION28_CTRL0    0x0798
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION28_CTRL1    0x0799
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION28_CTRL2    0x079a
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION28_CTRL3    0x079b
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION28_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION29_CTRL0    0x079c
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION29_CTRL1    0x079d
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION29_CTRL2    0x079e
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION29_CTRL3    0x079f
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION29_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION30_CTRL0    0x07a0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION30_CTRL1    0x07a1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION30_CTRL2    0x07a2
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION30_CTRL3    0x07a3
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION30_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION31_CTRL0    0x07a4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL0_MBR_EXT_OFFSET    8
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL0_MBR_EXT_MASK    0x700
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL0_MBR_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL0_MBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION31_CTRL1    0x07a5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL1_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION31_CTRL2    0x07a6
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL2_METERIDX_EXT_OFFSET    10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL2_METERIDX_EXT_MASK    0x400
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL2_METERIDX_OFFSET    5
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL2_METERIDX_MASK    0x3E0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL2_ENVLANPOL_OFFSET    4
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL2_ENVLANPOL_MASK    0x10
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL2_VBPRI_OFFSET    1
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL2_VBPRI_MASK    0xE
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL2_VBPEN_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL2_VBPEN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_MEMBER_CONFIGURATION31_CTRL3    0x07a7
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_MEMBER_CONFIGURATION31_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_VLAN_CTRL    0x07a8
-+#define    RTL8367C_VLAN_CTRL_OFFSET    0
-+#define    RTL8367C_VLAN_CTRL_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_INGRESS    0x07a9
-+#define    RTL8367C_VLAN_INGRESS_OFFSET    0
-+#define    RTL8367C_VLAN_INGRESS_MASK    0x7FF
-+
-+#define    RTL8367C_REG_VLAN_ACCEPT_FRAME_TYPE_CTRL0    0x07aa
-+#define    RTL8367C_PORT7_FRAME_TYPE_OFFSET    14
-+#define    RTL8367C_PORT7_FRAME_TYPE_MASK    0xC000
-+#define    RTL8367C_PORT6_FRAME_TYPE_OFFSET    12
-+#define    RTL8367C_PORT6_FRAME_TYPE_MASK    0x3000
-+#define    RTL8367C_PORT5_FRAME_TYPE_OFFSET    10
-+#define    RTL8367C_PORT5_FRAME_TYPE_MASK    0xC00
-+#define    RTL8367C_PORT4_FRAME_TYPE_OFFSET    8
-+#define    RTL8367C_PORT4_FRAME_TYPE_MASK    0x300
-+#define    RTL8367C_PORT3_FRAME_TYPE_OFFSET    6
-+#define    RTL8367C_PORT3_FRAME_TYPE_MASK    0xC0
-+#define    RTL8367C_PORT2_FRAME_TYPE_OFFSET    4
-+#define    RTL8367C_PORT2_FRAME_TYPE_MASK    0x30
-+#define    RTL8367C_PORT1_FRAME_TYPE_OFFSET    2
-+#define    RTL8367C_PORT1_FRAME_TYPE_MASK    0xC
-+#define    RTL8367C_PORT0_FRAME_TYPE_OFFSET    0
-+#define    RTL8367C_PORT0_FRAME_TYPE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_ACCEPT_FRAME_TYPE_CTRL1    0x07ab
-+#define    RTL8367C_PORT10_FRAME_TYPE_OFFSET    4
-+#define    RTL8367C_PORT10_FRAME_TYPE_MASK    0x30
-+#define    RTL8367C_PORT9_FRAME_TYPE_OFFSET    2
-+#define    RTL8367C_PORT9_FRAME_TYPE_MASK    0xC
-+#define    RTL8367C_PORT8_FRAME_TYPE_OFFSET    0
-+#define    RTL8367C_PORT8_FRAME_TYPE_MASK    0x3
-+
-+#define    RTL8367C_REG_PORT_PBFIDEN    0x07ac
-+#define    RTL8367C_PORT_PBFIDEN_OFFSET    0
-+#define    RTL8367C_PORT_PBFIDEN_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT0_PBFID    0x07ad
-+#define    RTL8367C_PORT0_PBFID_OFFSET    0
-+#define    RTL8367C_PORT0_PBFID_MASK    0xF
-+
-+#define    RTL8367C_REG_PORT1_PBFID    0x07ae
-+#define    RTL8367C_PORT1_PBFID_OFFSET    0
-+#define    RTL8367C_PORT1_PBFID_MASK    0xF
-+
-+#define    RTL8367C_REG_PORT2_PBFID    0x07af
-+#define    RTL8367C_PORT2_PBFID_OFFSET    0
-+#define    RTL8367C_PORT2_PBFID_MASK    0xF
-+
-+#define    RTL8367C_REG_PORT3_PBFID    0x07b0
-+#define    RTL8367C_PORT3_PBFID_OFFSET    0
-+#define    RTL8367C_PORT3_PBFID_MASK    0xF
-+
-+#define    RTL8367C_REG_PORT4_PBFID    0x07b1
-+#define    RTL8367C_PORT4_PBFID_OFFSET    0
-+#define    RTL8367C_PORT4_PBFID_MASK    0xF
-+
-+#define    RTL8367C_REG_PORT5_PBFID    0x07b2
-+#define    RTL8367C_PORT5_PBFID_OFFSET    0
-+#define    RTL8367C_PORT5_PBFID_MASK    0xF
-+
-+#define    RTL8367C_REG_PORT6_PBFID    0x07b3
-+#define    RTL8367C_PORT6_PBFID_OFFSET    0
-+#define    RTL8367C_PORT6_PBFID_MASK    0xF
-+
-+#define    RTL8367C_REG_PORT7_PBFID    0x07b4
-+#define    RTL8367C_PORT7_PBFID_OFFSET    0
-+#define    RTL8367C_PORT7_PBFID_MASK    0xF
-+
-+#define    RTL8367C_REG_VLAN_EXT_CTRL    0x07b5
-+#define    RTL8367C_VLAN_1P_REMARK_BYPASS_REALKEEP_OFFSET    2
-+#define    RTL8367C_VLAN_1P_REMARK_BYPASS_REALKEEP_MASK    0x4
-+#define    RTL8367C_VLAN_VID4095_TYPE_OFFSET    1
-+#define    RTL8367C_VLAN_VID4095_TYPE_MASK    0x2
-+#define    RTL8367C_VLAN_VID0_TYPE_OFFSET    0
-+#define    RTL8367C_VLAN_VID0_TYPE_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_EXT_CTRL2    0x07b6
-+#define    RTL8367C_VLAN_EXT_CTRL2_OFFSET    0
-+#define    RTL8367C_VLAN_EXT_CTRL2_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT8_PBFID    0x07b7
-+#define    RTL8367C_PORT8_PBFID_OFFSET    0
-+#define    RTL8367C_PORT8_PBFID_MASK    0xF
-+
-+#define    RTL8367C_REG_PORT9_PBFID    0x07b8
-+#define    RTL8367C_PORT9_PBFID_OFFSET    0
-+#define    RTL8367C_PORT9_PBFID_MASK    0xF
-+
-+#define    RTL8367C_REG_PORT10_PBFID    0x07b9
-+#define    RTL8367C_PORT10_PBFID_OFFSET    0
-+#define    RTL8367C_PORT10_PBFID_MASK    0xF
-+
-+#define    RTL8367C_REG_CVLAN_DUMMY00    0x07E0
-+
-+#define    RTL8367C_REG_CVLAN_DUMMY01    0x07E1
-+
-+#define    RTL8367C_REG_CVLAN_DUMMY02    0x07E2
-+
-+#define    RTL8367C_REG_CVLAN_DUMMY03    0x07E3
-+
-+#define    RTL8367C_REG_CVLAN_DUMMY04    0x07E4
-+
-+#define    RTL8367C_REG_CVLAN_DUMMY05    0x07E5
-+
-+#define    RTL8367C_REG_CVLAN_DUMMY06    0x07E6
-+
-+#define    RTL8367C_REG_CVLAN_DUMMY07    0x07E7
-+
-+#define    RTL8367C_REG_CVLAN_DUMMY08    0x07E8
-+
-+#define    RTL8367C_REG_CVLAN_DUMMY09    0x07E9
-+
-+#define    RTL8367C_REG_CVLAN_DUMMY10    0x07EA
-+
-+#define    RTL8367C_REG_CVLAN_DUMMY11    0x07EB
-+
-+#define    RTL8367C_REG_CVLAN_DUMMY12    0x07EC
-+
-+#define    RTL8367C_REG_CVLAN_DUMMY13    0x07ED
-+
-+#define    RTL8367C_REG_CVLAN_DUMMY14    0x07EE
-+
-+#define    RTL8367C_REG_CVLAN_DUMMY15    0x07EF
-+
-+/* (16'h0800)dpm_reg */
-+
-+#define    RTL8367C_REG_RMA_CTRL00    0x0800
-+#define    RTL8367C_RMA_CTRL00_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL00_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL00_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL00_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_TRAP_PRIORITY_OFFSET    3
-+#define    RTL8367C_TRAP_PRIORITY_MASK    0x38
-+#define    RTL8367C_RMA_CTRL00_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL00_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL00_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL00_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL00_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL00_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL01    0x0801
-+#define    RTL8367C_RMA_CTRL01_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL01_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL01_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL01_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL01_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL01_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL01_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL01_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL01_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL01_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL02    0x0802
-+#define    RTL8367C_RMA_CTRL02_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL02_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL02_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL02_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL02_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL02_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL02_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL02_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL02_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL02_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL03    0x0803
-+#define    RTL8367C_RMA_CTRL03_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL03_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL03_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL03_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL03_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL03_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL03_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL03_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL03_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL03_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL04    0x0804
-+#define    RTL8367C_RMA_CTRL04_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL04_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL04_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL04_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL04_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL04_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL04_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL04_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL04_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL04_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL08    0x0808
-+#define    RTL8367C_RMA_CTRL08_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL08_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL08_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL08_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL08_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL08_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL08_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL08_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL08_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL08_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL0D    0x080d
-+#define    RTL8367C_RMA_CTRL0D_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL0D_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL0D_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL0D_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL0D_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL0D_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL0D_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL0D_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL0D_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL0D_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL0E    0x080e
-+#define    RTL8367C_RMA_CTRL0E_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL0E_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL0E_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL0E_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL0E_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL0E_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL0E_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL0E_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL0E_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL0E_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL10    0x0810
-+#define    RTL8367C_RMA_CTRL10_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL10_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL10_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL10_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL10_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL10_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL10_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL10_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL10_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL10_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL11    0x0811
-+#define    RTL8367C_RMA_CTRL11_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL11_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL11_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL11_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL11_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL11_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL11_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL11_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL11_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL11_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL12    0x0812
-+#define    RTL8367C_RMA_CTRL12_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL12_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL12_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL12_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL12_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL12_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL12_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL12_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL12_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL12_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL13    0x0813
-+#define    RTL8367C_RMA_CTRL13_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL13_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL13_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL13_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL13_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL13_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL13_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL13_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL13_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL13_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL18    0x0818
-+#define    RTL8367C_RMA_CTRL18_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL18_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL18_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL18_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL18_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL18_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL18_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL18_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL18_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL18_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL1A    0x081a
-+#define    RTL8367C_RMA_CTRL1A_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL1A_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL1A_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL1A_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL1A_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL1A_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL1A_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL1A_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL1A_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL1A_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL20    0x0820
-+#define    RTL8367C_RMA_CTRL20_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL20_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL20_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL20_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL20_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL20_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL20_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL20_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL20_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL20_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL21    0x0821
-+#define    RTL8367C_RMA_CTRL21_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL21_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL21_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL21_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL21_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL21_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL21_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL21_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL21_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL21_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL22    0x0822
-+#define    RTL8367C_RMA_CTRL22_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL22_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL22_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL22_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL22_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL22_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL22_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL22_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL22_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL22_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL_CDP    0x0830
-+#define    RTL8367C_RMA_CTRL_CDP_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL_CDP_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL_CDP_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL_CDP_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL_CDP_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL_CDP_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL_CDP_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL_CDP_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL_CDP_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL_CDP_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL_CSSTP    0x0831
-+#define    RTL8367C_RMA_CTRL_CSSTP_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL_CSSTP_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL_CSSTP_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL_CSSTP_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL_CSSTP_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL_CSSTP_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL_CSSTP_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL_CSSTP_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL_CSSTP_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL_CSSTP_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_CTRL_LLDP    0x0832
-+#define    RTL8367C_RMA_CTRL_LLDP_OPERATION_OFFSET    7
-+#define    RTL8367C_RMA_CTRL_LLDP_OPERATION_MASK    0x180
-+#define    RTL8367C_RMA_CTRL_LLDP_DISCARD_STORM_FILTER_OFFSET    6
-+#define    RTL8367C_RMA_CTRL_LLDP_DISCARD_STORM_FILTER_MASK    0x40
-+#define    RTL8367C_RMA_CTRL_LLDP_KEEP_FORMAT_OFFSET    2
-+#define    RTL8367C_RMA_CTRL_LLDP_KEEP_FORMAT_MASK    0x4
-+#define    RTL8367C_RMA_CTRL_LLDP_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_RMA_CTRL_LLDP_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_RMA_CTRL_LLDP_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_RMA_CTRL_LLDP_PORTISO_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_RMA_LLDP_EN    0x0833
-+#define    RTL8367C_RMA_LLDP_EN_OFFSET    0
-+#define    RTL8367C_RMA_LLDP_EN_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_PORTBASED_PRIORITY_CTRL0    0x0851
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL0_PORT3_PRIORITY_OFFSET    12
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL0_PORT3_PRIORITY_MASK    0x7000
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL0_PORT2_PRIORITY_OFFSET    8
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL0_PORT2_PRIORITY_MASK    0x700
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL0_PORT1_PRIORITY_OFFSET    4
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL0_PORT1_PRIORITY_MASK    0x70
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL0_PORT0_PRIORITY_OFFSET    0
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL0_PORT0_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_PORTBASED_PRIORITY_CTRL1    0x0852
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL1_PORT7_PRIORITY_OFFSET    12
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL1_PORT7_PRIORITY_MASK    0x7000
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL1_PORT6_PRIORITY_OFFSET    8
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL1_PORT6_PRIORITY_MASK    0x700
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL1_PORT5_PRIORITY_OFFSET    4
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL1_PORT5_PRIORITY_MASK    0x70
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL1_PORT4_PRIORITY_OFFSET    0
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL1_PORT4_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_PORTBASED_PRIORITY_CTRL2    0x0853
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL2_PORT10_PRIORITY_OFFSET    8
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL2_PORT10_PRIORITY_MASK    0x700
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL2_PORT9_PRIORITY_OFFSET    4
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL2_PORT9_PRIORITY_MASK    0x70
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL2_PORT8_PRIORITY_OFFSET    0
-+#define    RTL8367C_VLAN_PORTBASED_PRIORITY_CTRL2_PORT8_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_PPB_PRIORITY_ITEM0_CTRL0    0x0855
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL0_PORT3_PRIORITY_OFFSET    12
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL0_PORT3_PRIORITY_MASK    0x7000
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL0_PORT2_PRIORITY_OFFSET    8
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL0_PORT2_PRIORITY_MASK    0x700
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL0_PORT1_PRIORITY_OFFSET    4
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL0_PORT1_PRIORITY_MASK    0x70
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL0_PORT0_PRIORITY_OFFSET    0
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL0_PORT0_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_PPB_PRIORITY_ITEM0_CTRL1    0x0856
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL1_PORT7_PRIORITY_OFFSET    12
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL1_PORT7_PRIORITY_MASK    0x7000
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL1_PORT6_PRIORITY_OFFSET    8
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL1_PORT6_PRIORITY_MASK    0x700
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL1_PORT5_PRIORITY_OFFSET    4
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL1_PORT5_PRIORITY_MASK    0x70
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL1_PORT4_PRIORITY_OFFSET    0
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL1_PORT4_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_PPB_PRIORITY_ITEM0_CTRL2    0x0857
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL2_PORT10_PRIORITY_OFFSET    8
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL2_PORT10_PRIORITY_MASK    0x700
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL2_PORT9_PRIORITY_OFFSET    4
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL2_PORT9_PRIORITY_MASK    0x70
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL2_PORT8_PRIORITY_OFFSET    0
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM0_CTRL2_PORT8_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_PPB_PRIORITY_ITEM1_CTRL0    0x0859
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL0_PORT3_PRIORITY_OFFSET    12
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL0_PORT3_PRIORITY_MASK    0x7000
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL0_PORT2_PRIORITY_OFFSET    8
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL0_PORT2_PRIORITY_MASK    0x700
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL0_PORT1_PRIORITY_OFFSET    4
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL0_PORT1_PRIORITY_MASK    0x70
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL0_PORT0_PRIORITY_OFFSET    0
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL0_PORT0_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_PPB_PRIORITY_ITEM1_CTRL1    0x085a
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL1_PORT7_PRIORITY_OFFSET    12
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL1_PORT7_PRIORITY_MASK    0x7000
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL1_PORT6_PRIORITY_OFFSET    8
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL1_PORT6_PRIORITY_MASK    0x700
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL1_PORT5_PRIORITY_OFFSET    4
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL1_PORT5_PRIORITY_MASK    0x70
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL1_PORT4_PRIORITY_OFFSET    0
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL1_PORT4_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_PPB_PRIORITY_ITEM1_CTRL2    0x085b
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL2_PORT10_PRIORITY_OFFSET    8
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL2_PORT10_PRIORITY_MASK    0x700
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL2_PORT9_PRIORITY_OFFSET    4
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL2_PORT9_PRIORITY_MASK    0x70
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL2_PORT8_PRIORITY_OFFSET    0
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM1_CTRL2_PORT8_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_PPB_PRIORITY_ITEM2_CTRL0    0x085d
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL0_PORT3_PRIORITY_OFFSET    12
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL0_PORT3_PRIORITY_MASK    0x7000
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL0_PORT2_PRIORITY_OFFSET    8
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL0_PORT2_PRIORITY_MASK    0x700
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL0_PORT1_PRIORITY_OFFSET    4
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL0_PORT1_PRIORITY_MASK    0x70
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL0_PORT0_PRIORITY_OFFSET    0
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL0_PORT0_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_PPB_PRIORITY_ITEM2_CTRL1    0x085e
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL1_PORT7_PRIORITY_OFFSET    12
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL1_PORT7_PRIORITY_MASK    0x7000
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL1_PORT6_PRIORITY_OFFSET    8
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL1_PORT6_PRIORITY_MASK    0x700
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL1_PORT5_PRIORITY_OFFSET    4
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL1_PORT5_PRIORITY_MASK    0x70
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL1_PORT4_PRIORITY_OFFSET    0
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL1_PORT4_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_PPB_PRIORITY_ITEM2_CTRL2    0x085f
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL2_PORT10_PRIORITY_OFFSET    8
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL2_PORT10_PRIORITY_MASK    0x700
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL2_PORT9_PRIORITY_OFFSET    4
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL2_PORT9_PRIORITY_MASK    0x70
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL2_PORT8_PRIORITY_OFFSET    0
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM2_CTRL2_PORT8_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_PPB_PRIORITY_ITEM3_CTRL0    0x0861
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL0_PORT3_PRIORITY_OFFSET    12
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL0_PORT3_PRIORITY_MASK    0x7000
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL0_PORT2_PRIORITY_OFFSET    8
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL0_PORT2_PRIORITY_MASK    0x700
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL0_PORT1_PRIORITY_OFFSET    4
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL0_PORT1_PRIORITY_MASK    0x70
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL0_PORT0_PRIORITY_OFFSET    0
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL0_PORT0_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_PPB_PRIORITY_ITEM3_CTRL1    0x0862
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL1_PORT7_PRIORITY_OFFSET    12
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL1_PORT7_PRIORITY_MASK    0x7000
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL1_PORT6_PRIORITY_OFFSET    8
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL1_PORT6_PRIORITY_MASK    0x700
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL1_PORT5_PRIORITY_OFFSET    4
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL1_PORT5_PRIORITY_MASK    0x70
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL1_PORT4_PRIORITY_OFFSET    0
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL1_PORT4_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_PPB_PRIORITY_ITEM3_CTRL2    0x0863
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL2_PORT10_PRIORITY_OFFSET    8
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL2_PORT10_PRIORITY_MASK    0x700
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL2_PORT9_PRIORITY_OFFSET    4
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL2_PORT9_PRIORITY_MASK    0x70
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL2_PORT8_PRIORITY_OFFSET    0
-+#define    RTL8367C_VLAN_PPB_PRIORITY_ITEM3_CTRL2_PORT8_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_1Q_PRIORITY_REMAPPING_CTRL0    0x0865
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_CTRL0_PRIORITY3_OFFSET    12
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_CTRL0_PRIORITY3_MASK    0x7000
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_CTRL0_PRIORITY2_OFFSET    8
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_CTRL0_PRIORITY2_MASK    0x700
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_CTRL0_PRIORITY1_OFFSET    4
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_CTRL0_PRIORITY1_MASK    0x70
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_CTRL0_PRIORITY0_OFFSET    0
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_CTRL0_PRIORITY0_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_1Q_PRIORITY_REMAPPING_CTRL1    0x0866
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_CTRL1_PRIORITY7_OFFSET    12
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_CTRL1_PRIORITY7_MASK    0x7000
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_CTRL1_PRIORITY6_OFFSET    8
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_CTRL1_PRIORITY6_MASK    0x700
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_CTRL1_PRIORITY5_OFFSET    4
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_CTRL1_PRIORITY5_MASK    0x70
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_CTRL1_PRIORITY4_OFFSET    0
-+#define    RTL8367C_QOS_1Q_PRIORITY_REMAPPING_CTRL1_PRIORITY4_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_DSCP_TO_PRIORITY_CTRL0    0x0867
-+#define    RTL8367C_DSCP3_PRIORITY_OFFSET    12
-+#define    RTL8367C_DSCP3_PRIORITY_MASK    0x7000
-+#define    RTL8367C_DSCP2_PRIORITY_OFFSET    8
-+#define    RTL8367C_DSCP2_PRIORITY_MASK    0x700
-+#define    RTL8367C_DSCP1_PRIORITY_OFFSET    4
-+#define    RTL8367C_DSCP1_PRIORITY_MASK    0x70
-+#define    RTL8367C_DSCP0_PRIORITY_OFFSET    0
-+#define    RTL8367C_DSCP0_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_DSCP_TO_PRIORITY_CTRL1    0x0868
-+#define    RTL8367C_DSCP7_PRIORITY_OFFSET    12
-+#define    RTL8367C_DSCP7_PRIORITY_MASK    0x7000
-+#define    RTL8367C_DSCP6_PRIORITY_OFFSET    8
-+#define    RTL8367C_DSCP6_PRIORITY_MASK    0x700
-+#define    RTL8367C_DSCP5_PRIORITY_OFFSET    4
-+#define    RTL8367C_DSCP5_PRIORITY_MASK    0x70
-+#define    RTL8367C_DSCP4_PRIORITY_OFFSET    0
-+#define    RTL8367C_DSCP4_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_DSCP_TO_PRIORITY_CTRL2    0x0869
-+#define    RTL8367C_DSCP11_PRIORITY_OFFSET    12
-+#define    RTL8367C_DSCP11_PRIORITY_MASK    0x7000
-+#define    RTL8367C_DSCP10_PRIORITY_OFFSET    8
-+#define    RTL8367C_DSCP10_PRIORITY_MASK    0x700
-+#define    RTL8367C_DSCP9_PRIORITY_OFFSET    4
-+#define    RTL8367C_DSCP9_PRIORITY_MASK    0x70
-+#define    RTL8367C_DSCP8_PRIORITY_OFFSET    0
-+#define    RTL8367C_DSCP8_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_DSCP_TO_PRIORITY_CTRL3    0x086a
-+#define    RTL8367C_DSCP15_PRIORITY_OFFSET    12
-+#define    RTL8367C_DSCP15_PRIORITY_MASK    0x7000
-+#define    RTL8367C_DSCP14_PRIORITY_OFFSET    8
-+#define    RTL8367C_DSCP14_PRIORITY_MASK    0x700
-+#define    RTL8367C_DSCP13_PRIORITY_OFFSET    4
-+#define    RTL8367C_DSCP13_PRIORITY_MASK    0x70
-+#define    RTL8367C_DSCP12_PRIORITY_OFFSET    0
-+#define    RTL8367C_DSCP12_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_DSCP_TO_PRIORITY_CTRL4    0x086b
-+#define    RTL8367C_DSCP19_PRIORITY_OFFSET    12
-+#define    RTL8367C_DSCP19_PRIORITY_MASK    0x7000
-+#define    RTL8367C_DSCP18_PRIORITY_OFFSET    8
-+#define    RTL8367C_DSCP18_PRIORITY_MASK    0x700
-+#define    RTL8367C_DSCP17_PRIORITY_OFFSET    4
-+#define    RTL8367C_DSCP17_PRIORITY_MASK    0x70
-+#define    RTL8367C_DSCP16_PRIORITY_OFFSET    0
-+#define    RTL8367C_DSCP16_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_DSCP_TO_PRIORITY_CTRL5    0x086c
-+#define    RTL8367C_DSCP23_PRIORITY_OFFSET    12
-+#define    RTL8367C_DSCP23_PRIORITY_MASK    0x7000
-+#define    RTL8367C_DSCP22_PRIORITY_OFFSET    8
-+#define    RTL8367C_DSCP22_PRIORITY_MASK    0x700
-+#define    RTL8367C_DSCP21_PRIORITY_OFFSET    4
-+#define    RTL8367C_DSCP21_PRIORITY_MASK    0x70
-+#define    RTL8367C_DSCP20_PRIORITY_OFFSET    0
-+#define    RTL8367C_DSCP20_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_DSCP_TO_PRIORITY_CTRL6    0x086d
-+#define    RTL8367C_DSCP27_PRIORITY_OFFSET    12
-+#define    RTL8367C_DSCP27_PRIORITY_MASK    0x7000
-+#define    RTL8367C_DSCP26_PRIORITY_OFFSET    8
-+#define    RTL8367C_DSCP26_PRIORITY_MASK    0x700
-+#define    RTL8367C_DSCP25_PRIORITY_OFFSET    4
-+#define    RTL8367C_DSCP25_PRIORITY_MASK    0x70
-+#define    RTL8367C_DSCP24_PRIORITY_OFFSET    0
-+#define    RTL8367C_DSCP24_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_DSCP_TO_PRIORITY_CTRL7    0x086e
-+#define    RTL8367C_DSCP31_PRIORITY_OFFSET    12
-+#define    RTL8367C_DSCP31_PRIORITY_MASK    0x7000
-+#define    RTL8367C_DSCP30_PRIORITY_OFFSET    8
-+#define    RTL8367C_DSCP30_PRIORITY_MASK    0x700
-+#define    RTL8367C_DSCP29_PRIORITY_OFFSET    4
-+#define    RTL8367C_DSCP29_PRIORITY_MASK    0x70
-+#define    RTL8367C_DSCP28_PRIORITY_OFFSET    0
-+#define    RTL8367C_DSCP28_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_DSCP_TO_PRIORITY_CTRL8    0x086f
-+#define    RTL8367C_DSCP35_PRIORITY_OFFSET    12
-+#define    RTL8367C_DSCP35_PRIORITY_MASK    0x7000
-+#define    RTL8367C_DSCP34_PRIORITY_OFFSET    8
-+#define    RTL8367C_DSCP34_PRIORITY_MASK    0x700
-+#define    RTL8367C_DSCP33_PRIORITY_OFFSET    4
-+#define    RTL8367C_DSCP33_PRIORITY_MASK    0x70
-+#define    RTL8367C_DSCP32_PRIORITY_OFFSET    0
-+#define    RTL8367C_DSCP32_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_DSCP_TO_PRIORITY_CTRL9    0x0870
-+#define    RTL8367C_DSCP39_PRIORITY_OFFSET    12
-+#define    RTL8367C_DSCP39_PRIORITY_MASK    0x7000
-+#define    RTL8367C_DSCP38_PRIORITY_OFFSET    8
-+#define    RTL8367C_DSCP38_PRIORITY_MASK    0x700
-+#define    RTL8367C_DSCP37_PRIORITY_OFFSET    4
-+#define    RTL8367C_DSCP37_PRIORITY_MASK    0x70
-+#define    RTL8367C_DSCP36_PRIORITY_OFFSET    0
-+#define    RTL8367C_DSCP36_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_DSCP_TO_PRIORITY_CTRL10    0x0871
-+#define    RTL8367C_DSCP43_PRIORITY_OFFSET    12
-+#define    RTL8367C_DSCP43_PRIORITY_MASK    0x7000
-+#define    RTL8367C_DSCP42_PRIORITY_OFFSET    8
-+#define    RTL8367C_DSCP42_PRIORITY_MASK    0x700
-+#define    RTL8367C_DSCP41_PRIORITY_OFFSET    4
-+#define    RTL8367C_DSCP41_PRIORITY_MASK    0x70
-+#define    RTL8367C_DSCP40_PRIORITY_OFFSET    0
-+#define    RTL8367C_DSCP40_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_DSCP_TO_PRIORITY_CTRL11    0x0872
-+#define    RTL8367C_DSCP47_PRIORITY_OFFSET    12
-+#define    RTL8367C_DSCP47_PRIORITY_MASK    0x7000
-+#define    RTL8367C_DSCP46_PRIORITY_OFFSET    8
-+#define    RTL8367C_DSCP46_PRIORITY_MASK    0x700
-+#define    RTL8367C_DSCP45_PRIORITY_OFFSET    4
-+#define    RTL8367C_DSCP45_PRIORITY_MASK    0x70
-+#define    RTL8367C_DSCP44_PRIORITY_OFFSET    0
-+#define    RTL8367C_DSCP44_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_DSCP_TO_PRIORITY_CTRL12    0x0873
-+#define    RTL8367C_DSCP51_PRIORITY_OFFSET    12
-+#define    RTL8367C_DSCP51_PRIORITY_MASK    0x7000
-+#define    RTL8367C_DSCP50_PRIORITY_OFFSET    8
-+#define    RTL8367C_DSCP50_PRIORITY_MASK    0x700
-+#define    RTL8367C_DSCP49_PRIORITY_OFFSET    4
-+#define    RTL8367C_DSCP49_PRIORITY_MASK    0x70
-+#define    RTL8367C_DSCP48_PRIORITY_OFFSET    0
-+#define    RTL8367C_DSCP48_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_DSCP_TO_PRIORITY_CTRL13    0x0874
-+#define    RTL8367C_DSCP55_PRIORITY_OFFSET    12
-+#define    RTL8367C_DSCP55_PRIORITY_MASK    0x7000
-+#define    RTL8367C_DSCP54_PRIORITY_OFFSET    8
-+#define    RTL8367C_DSCP54_PRIORITY_MASK    0x700
-+#define    RTL8367C_DSCP53_PRIORITY_OFFSET    4
-+#define    RTL8367C_DSCP53_PRIORITY_MASK    0x70
-+#define    RTL8367C_DSCP52_PRIORITY_OFFSET    0
-+#define    RTL8367C_DSCP52_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_DSCP_TO_PRIORITY_CTRL14    0x0875
-+#define    RTL8367C_DSCP59_PRIORITY_OFFSET    12
-+#define    RTL8367C_DSCP59_PRIORITY_MASK    0x7000
-+#define    RTL8367C_DSCP58_PRIORITY_OFFSET    8
-+#define    RTL8367C_DSCP58_PRIORITY_MASK    0x700
-+#define    RTL8367C_DSCP57_PRIORITY_OFFSET    4
-+#define    RTL8367C_DSCP57_PRIORITY_MASK    0x70
-+#define    RTL8367C_DSCP56_PRIORITY_OFFSET    0
-+#define    RTL8367C_DSCP56_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_DSCP_TO_PRIORITY_CTRL15    0x0876
-+#define    RTL8367C_DSCP63_PRIORITY_OFFSET    12
-+#define    RTL8367C_DSCP63_PRIORITY_MASK    0x7000
-+#define    RTL8367C_DSCP62_PRIORITY_OFFSET    8
-+#define    RTL8367C_DSCP62_PRIORITY_MASK    0x700
-+#define    RTL8367C_DSCP61_PRIORITY_OFFSET    4
-+#define    RTL8367C_DSCP61_PRIORITY_MASK    0x70
-+#define    RTL8367C_DSCP60_PRIORITY_OFFSET    0
-+#define    RTL8367C_DSCP60_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_PORTBASED_PRIORITY_CTRL0    0x0877
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL0_PORT3_PRIORITY_OFFSET    12
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL0_PORT3_PRIORITY_MASK    0x7000
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL0_PORT2_PRIORITY_OFFSET    8
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL0_PORT2_PRIORITY_MASK    0x700
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL0_PORT1_PRIORITY_OFFSET    4
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL0_PORT1_PRIORITY_MASK    0x70
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL0_PORT0_PRIORITY_OFFSET    0
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL0_PORT0_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_PORTBASED_PRIORITY_CTRL1    0x0878
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL1_PORT7_PRIORITY_OFFSET    12
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL1_PORT7_PRIORITY_MASK    0x7000
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL1_PORT6_PRIORITY_OFFSET    8
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL1_PORT6_PRIORITY_MASK    0x700
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL1_PORT5_PRIORITY_OFFSET    4
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL1_PORT5_PRIORITY_MASK    0x70
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL1_PORT4_PRIORITY_OFFSET    0
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL1_PORT4_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_DUMMY0879    0x0879
-+#define    RTL8367C_DUMMY0879_OFFSET    0
-+#define    RTL8367C_DUMMY0879_MASK    0x1
-+
-+#define    RTL8367C_REG_QOS_PORTBASED_PRIORITY_CTRL2    0x087a
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL2_PORT10_PRIORITY_OFFSET    8
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL2_PORT10_PRIORITY_MASK    0x700
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL2_PORT9_PRIORITY_OFFSET    4
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL2_PORT9_PRIORITY_MASK    0x70
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL2_PORT8_PRIORITY_OFFSET    0
-+#define    RTL8367C_QOS_PORTBASED_PRIORITY_CTRL2_PORT8_PRIORITY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_INTERNAL_PRIORITY_DECISION_CTRL0    0x087b
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_CTRL0_QOS_ACL_WEIGHT_OFFSET    8
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_CTRL0_QOS_ACL_WEIGHT_MASK    0xFF00
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_CTRL0_QOS_PORT_WEIGHT_OFFSET    0
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_CTRL0_QOS_PORT_WEIGHT_MASK    0xFF
-+
-+#define    RTL8367C_REG_QOS_INTERNAL_PRIORITY_DECISION_CTRL1    0x087c
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_CTRL1_QOS_DOT1Q_WEIGHT_OFFSET    8
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_CTRL1_QOS_DOT1Q_WEIGHT_MASK    0xFF00
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_CTRL1_QOS_DSCP_WEIGHT_OFFSET    0
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_CTRL1_QOS_DSCP_WEIGHT_MASK    0xFF
-+
-+#define    RTL8367C_REG_QOS_INTERNAL_PRIORITY_DECISION_CTRL2    0x087d
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_CTRL2_QOS_CVLAN_WEIGHT_OFFSET    8
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_CTRL2_QOS_CVLAN_WEIGHT_MASK    0xFF00
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_CTRL2_QOS_SVLAN_WEIGHT_OFFSET    0
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_CTRL2_QOS_SVLAN_WEIGHT_MASK    0xFF
-+
-+#define    RTL8367C_REG_QOS_INTERNAL_PRIORITY_DECISION_CTRL3    0x087e
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_CTRL3_QOS_SA_WEIGHT_OFFSET    8
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_CTRL3_QOS_SA_WEIGHT_MASK    0xFF00
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_CTRL3_QOS_LUTFWD_WEIGHT_OFFSET    0
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_CTRL3_QOS_LUTFWD_WEIGHT_MASK    0xFF
-+
-+#define    RTL8367C_REG_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL0    0x087f
-+#define    RTL8367C_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL0_PRIORITY3_OFFSET    12
-+#define    RTL8367C_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL0_PRIORITY3_MASK    0x7000
-+#define    RTL8367C_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL0_PRIORITY2_OFFSET    8
-+#define    RTL8367C_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL0_PRIORITY2_MASK    0x700
-+#define    RTL8367C_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL0_PRIORITY1_OFFSET    4
-+#define    RTL8367C_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL0_PRIORITY1_MASK    0x70
-+#define    RTL8367C_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL0_PRIORITY0_OFFSET    0
-+#define    RTL8367C_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL0_PRIORITY0_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL1    0x0880
-+#define    RTL8367C_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL1_PRIORITY7_OFFSET    12
-+#define    RTL8367C_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL1_PRIORITY7_MASK    0x7000
-+#define    RTL8367C_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL1_PRIORITY6_OFFSET    8
-+#define    RTL8367C_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL1_PRIORITY6_MASK    0x700
-+#define    RTL8367C_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL1_PRIORITY5_OFFSET    4
-+#define    RTL8367C_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL1_PRIORITY5_MASK    0x70
-+#define    RTL8367C_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL1_PRIORITY4_OFFSET    0
-+#define    RTL8367C_QOS_PRIORITY_REMAPPING_IN_CPU_CTRL1_PRIORITY4_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_TRAP_PRIORITY0    0x0881
-+#define    RTL8367C_UNKNOWN_MC_PRIORTY_OFFSET    12
-+#define    RTL8367C_UNKNOWN_MC_PRIORTY_MASK    0x7000
-+#define    RTL8367C_SVLAN_PRIOIRTY_OFFSET    8
-+#define    RTL8367C_SVLAN_PRIOIRTY_MASK    0x700
-+#define    RTL8367C_OAM_PRIOIRTY_OFFSET    4
-+#define    RTL8367C_OAM_PRIOIRTY_MASK    0x70
-+#define    RTL8367C_DOT1X_PRIORTY_OFFSET    0
-+#define    RTL8367C_DOT1X_PRIORTY_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_TRAP_PRIORITY1    0x0882
-+#define    RTL8367C_DW8051_TRAP_PRI_OFFSET    4
-+#define    RTL8367C_DW8051_TRAP_PRI_MASK    0x70
-+#define    RTL8367C_EEELLDP_TRAP_PRI_OFFSET    0
-+#define    RTL8367C_EEELLDP_TRAP_PRI_MASK    0x7
-+
-+#define    RTL8367C_REG_MAX_LENGTH_CFG    0x0883
-+#define    RTL8367C_MAX_LENGTH_GIGA_OFFSET    8
-+#define    RTL8367C_MAX_LENGTH_GIGA_MASK    0xFF00
-+#define    RTL8367C_MAX_LENGTH_10_100M_OFFSET    0
-+#define    RTL8367C_MAX_LENGTH_10_100M_MASK    0xFF
-+
-+#define    RTL8367C_REG_MAX_LEN_RX_TX    0x0884
-+#define    RTL8367C_MAX_LEN_RX_TX_OFFSET    0
-+#define    RTL8367C_MAX_LEN_RX_TX_MASK    0x3
-+
-+#define    RTL8367C_REG_QOS_INTERNAL_PRIORITY_DECISION2_CTRL0    0x0885
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_CTRL0_QOS_ACL_WEIGHT_OFFSET    8
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_CTRL0_QOS_ACL_WEIGHT_MASK    0xFF00
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_CTRL0_QOS_PORT_WEIGHT_OFFSET    0
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_CTRL0_QOS_PORT_WEIGHT_MASK    0xFF
-+
-+#define    RTL8367C_REG_QOS_INTERNAL_PRIORITY_DECISION2_CTRL1    0x0886
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_CTRL1_QOS_DOT1Q_WEIGHT_OFFSET    8
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_CTRL1_QOS_DOT1Q_WEIGHT_MASK    0xFF00
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_CTRL1_QOS_DSCP_WEIGHT_OFFSET    0
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_CTRL1_QOS_DSCP_WEIGHT_MASK    0xFF
-+
-+#define    RTL8367C_REG_QOS_INTERNAL_PRIORITY_DECISION2_CTRL2    0x0887
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_CTRL2_QOS_CVLAN_WEIGHT_OFFSET    8
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_CTRL2_QOS_CVLAN_WEIGHT_MASK    0xFF00
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_CTRL2_QOS_SVLAN_WEIGHT_OFFSET    0
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_CTRL2_QOS_SVLAN_WEIGHT_MASK    0xFF
-+
-+#define    RTL8367C_REG_QOS_INTERNAL_PRIORITY_DECISION2_CTRL3    0x0888
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_CTRL3_QOS_SA_WEIGHT_OFFSET    8
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_CTRL3_QOS_SA_WEIGHT_MASK    0xFF00
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_CTRL3_QOS_LUTFWD_WEIGHT_OFFSET    0
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_CTRL3_QOS_LUTFWD_WEIGHT_MASK    0xFF
-+
-+#define    RTL8367C_REG_QOS_INTERNAL_PRIORITY_DECISION_IDX    0x0889
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_IDX_OFFSET    0
-+#define    RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_IDX_MASK    0x7FF
-+
-+#define    RTL8367C_REG_MAX_LENGTH_CFG_EXT    0x088a
-+#define    RTL8367C_MAX_LENGTH_GIGA_EXT_OFFSET    3
-+#define    RTL8367C_MAX_LENGTH_GIGA_EXT_MASK    0x38
-+#define    RTL8367C_MAX_LENGTH_10_100M_EXT_OFFSET    0
-+#define    RTL8367C_MAX_LENGTH_10_100M_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_MAX_LEN_RX_TX_CFG0    0x088c
-+#define    RTL8367C_MAX_LEN_RX_TX_CFG0_OFFSET    0
-+#define    RTL8367C_MAX_LEN_RX_TX_CFG0_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_MAX_LEN_RX_TX_CFG1    0x088d
-+#define    RTL8367C_MAX_LEN_RX_TX_CFG1_OFFSET    0
-+#define    RTL8367C_MAX_LEN_RX_TX_CFG1_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_UNDA_FLOODING_PMSK    0x0890
-+#define    RTL8367C_UNDA_FLOODING_PMSK_OFFSET    0
-+#define    RTL8367C_UNDA_FLOODING_PMSK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_UNMCAST_FLOADING_PMSK    0x0891
-+#define    RTL8367C_UNMCAST_FLOADING_PMSK_OFFSET    0
-+#define    RTL8367C_UNMCAST_FLOADING_PMSK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_BCAST_FLOADING_PMSK    0x0892
-+#define    RTL8367C_BCAST_FLOADING_PMSK_OFFSET    0
-+#define    RTL8367C_BCAST_FLOADING_PMSK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_TRUNK_HASH_MAPPING_CTRL2    0x08a0
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH7_OFFSET    14
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH7_MASK    0xC000
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH6_OFFSET    12
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH6_MASK    0x3000
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH5_OFFSET    10
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH5_MASK    0xC00
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH4_OFFSET    8
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH4_MASK    0x300
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH3_OFFSET    6
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH3_MASK    0xC0
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH2_OFFSET    4
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH2_MASK    0x30
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH1_OFFSET    2
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH1_MASK    0xC
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH0_OFFSET    0
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH0_MASK    0x3
-+
-+#define    RTL8367C_REG_PORT_TRUNK_HASH_MAPPING_CTRL3    0x08a1
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH15_OFFSET    14
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH15_MASK    0xC000
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH14_OFFSET    12
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH14_MASK    0x3000
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH13_OFFSET    10
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH13_MASK    0xC00
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH12_OFFSET    8
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH12_MASK    0x300
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH11_OFFSET    6
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH11_MASK    0xC0
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH10_OFFSET    4
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH10_MASK    0x30
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH9_OFFSET    2
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH9_MASK    0xC
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH8_OFFSET    0
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH8_MASK    0x3
-+
-+#define    RTL8367C_REG_PORT_ISOLATION_PORT0_MASK    0x08a2
-+#define    RTL8367C_PORT_ISOLATION_PORT0_MASK_OFFSET    0
-+#define    RTL8367C_PORT_ISOLATION_PORT0_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_ISOLATION_PORT1_MASK    0x08a3
-+#define    RTL8367C_PORT_ISOLATION_PORT1_MASK_OFFSET    0
-+#define    RTL8367C_PORT_ISOLATION_PORT1_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_ISOLATION_PORT2_MASK    0x08a4
-+#define    RTL8367C_PORT_ISOLATION_PORT2_MASK_OFFSET    0
-+#define    RTL8367C_PORT_ISOLATION_PORT2_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_ISOLATION_PORT3_MASK    0x08a5
-+#define    RTL8367C_PORT_ISOLATION_PORT3_MASK_OFFSET    0
-+#define    RTL8367C_PORT_ISOLATION_PORT3_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_ISOLATION_PORT4_MASK    0x08a6
-+#define    RTL8367C_PORT_ISOLATION_PORT4_MASK_OFFSET    0
-+#define    RTL8367C_PORT_ISOLATION_PORT4_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_ISOLATION_PORT5_MASK    0x08a7
-+#define    RTL8367C_PORT_ISOLATION_PORT5_MASK_OFFSET    0
-+#define    RTL8367C_PORT_ISOLATION_PORT5_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_ISOLATION_PORT6_MASK    0x08a8
-+#define    RTL8367C_PORT_ISOLATION_PORT6_MASK_OFFSET    0
-+#define    RTL8367C_PORT_ISOLATION_PORT6_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_ISOLATION_PORT7_MASK    0x08a9
-+#define    RTL8367C_PORT_ISOLATION_PORT7_MASK_OFFSET    0
-+#define    RTL8367C_PORT_ISOLATION_PORT7_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_ISOLATION_PORT8_MASK    0x08aa
-+#define    RTL8367C_PORT_ISOLATION_PORT8_MASK_OFFSET    0
-+#define    RTL8367C_PORT_ISOLATION_PORT8_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_ISOLATION_PORT9_MASK    0x08ab
-+#define    RTL8367C_PORT_ISOLATION_PORT9_MASK_OFFSET    0
-+#define    RTL8367C_PORT_ISOLATION_PORT9_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_ISOLATION_PORT10_MASK    0x08ac
-+#define    RTL8367C_PORT_ISOLATION_PORT10_MASK_OFFSET    0
-+#define    RTL8367C_PORT_ISOLATION_PORT10_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FORCE_CTRL    0x08b4
-+#define    RTL8367C_FORCE_CTRL_OFFSET    0
-+#define    RTL8367C_FORCE_CTRL_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FORCE_PORT0_MASK    0x08b5
-+#define    RTL8367C_FORCE_PORT0_MASK_OFFSET    0
-+#define    RTL8367C_FORCE_PORT0_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FORCE_PORT1_MASK    0x08b6
-+#define    RTL8367C_FORCE_PORT1_MASK_OFFSET    0
-+#define    RTL8367C_FORCE_PORT1_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FORCE_PORT2_MASK    0x08b7
-+#define    RTL8367C_FORCE_PORT2_MASK_OFFSET    0
-+#define    RTL8367C_FORCE_PORT2_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FORCE_PORT3_MASK    0x08b8
-+#define    RTL8367C_FORCE_PORT3_MASK_OFFSET    0
-+#define    RTL8367C_FORCE_PORT3_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FORCE_PORT4_MASK    0x08b9
-+#define    RTL8367C_FORCE_PORT4_MASK_OFFSET    0
-+#define    RTL8367C_FORCE_PORT4_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FORCE_PORT5_MASK    0x08ba
-+#define    RTL8367C_FORCE_PORT5_MASK_OFFSET    0
-+#define    RTL8367C_FORCE_PORT5_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FORCE_PORT6_MASK    0x08bb
-+#define    RTL8367C_FORCE_PORT6_MASK_OFFSET    0
-+#define    RTL8367C_FORCE_PORT6_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FORCE_PORT7_MASK    0x08bc
-+#define    RTL8367C_FORCE_PORT7_MASK_OFFSET    0
-+#define    RTL8367C_FORCE_PORT7_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FORCE_PORT8_MASK    0x08bd
-+#define    RTL8367C_FORCE_PORT8_MASK_OFFSET    0
-+#define    RTL8367C_FORCE_PORT8_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FORCE_PORT9_MASK    0x08be
-+#define    RTL8367C_FORCE_PORT9_MASK_OFFSET    0
-+#define    RTL8367C_FORCE_PORT9_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FORCE_PORT10_MASK    0x08bf
-+#define    RTL8367C_FORCE_PORT10_MASK_OFFSET    0
-+#define    RTL8367C_FORCE_PORT10_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_SOURCE_PORT_PERMIT    0x08c5
-+#define    RTL8367C_SOURCE_PORT_PERMIT_OFFSET    0
-+#define    RTL8367C_SOURCE_PORT_PERMIT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMCAST_VLAN_LEAKY    0x08c6
-+#define    RTL8367C_IPMCAST_VLAN_LEAKY_OFFSET    0
-+#define    RTL8367C_IPMCAST_VLAN_LEAKY_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMCAST_PORTISO_LEAKY    0x08c7
-+#define    RTL8367C_IPMCAST_PORTISO_LEAKY_OFFSET    0
-+#define    RTL8367C_IPMCAST_PORTISO_LEAKY_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_SECURITY_CTRL    0x08c8
-+#define    RTL8367C_UNKNOWN_UNICAST_DA_BEHAVE_OFFSET    6
-+#define    RTL8367C_UNKNOWN_UNICAST_DA_BEHAVE_MASK    0xC0
-+#define    RTL8367C_LUT_LEARN_OVER_ACT_OFFSET    4
-+#define    RTL8367C_LUT_LEARN_OVER_ACT_MASK    0x30
-+#define    RTL8367C_UNMATCHED_SA_BEHAVE_OFFSET    2
-+#define    RTL8367C_UNMATCHED_SA_BEHAVE_MASK    0xC
-+#define    RTL8367C_UNKNOWN_SA_BEHAVE_OFFSET    0
-+#define    RTL8367C_UNKNOWN_SA_BEHAVE_MASK    0x3
-+
-+#define    RTL8367C_REG_UNKNOWN_IPV4_MULTICAST_CTRL0    0x08c9
-+#define    RTL8367C_PORT7_UNKNOWN_IP4_MCAST_OFFSET    14
-+#define    RTL8367C_PORT7_UNKNOWN_IP4_MCAST_MASK    0xC000
-+#define    RTL8367C_PORT6_UNKNOWN_IP4_MCAST_OFFSET    12
-+#define    RTL8367C_PORT6_UNKNOWN_IP4_MCAST_MASK    0x3000
-+#define    RTL8367C_PORT5_UNKNOWN_IP4_MCAST_OFFSET    10
-+#define    RTL8367C_PORT5_UNKNOWN_IP4_MCAST_MASK    0xC00
-+#define    RTL8367C_PORT4_UNKNOWN_IP4_MCAST_OFFSET    8
-+#define    RTL8367C_PORT4_UNKNOWN_IP4_MCAST_MASK    0x300
-+#define    RTL8367C_PORT3_UNKNOWN_IP4_MCAST_OFFSET    6
-+#define    RTL8367C_PORT3_UNKNOWN_IP4_MCAST_MASK    0xC0
-+#define    RTL8367C_PORT2_UNKNOWN_IP4_MCAST_OFFSET    4
-+#define    RTL8367C_PORT2_UNKNOWN_IP4_MCAST_MASK    0x30
-+#define    RTL8367C_PORT1_UNKNOWN_IP4_MCAST_OFFSET    2
-+#define    RTL8367C_PORT1_UNKNOWN_IP4_MCAST_MASK    0xC
-+#define    RTL8367C_PORT0_UNKNOWN_IP4_MCAST_OFFSET    0
-+#define    RTL8367C_PORT0_UNKNOWN_IP4_MCAST_MASK    0x3
-+
-+#define    RTL8367C_REG_UNKNOWN_IPV4_MULTICAST_CTRL1    0x08ca
-+#define    RTL8367C_PORT10_UNKNOWN_IP4_MCAST_OFFSET    4
-+#define    RTL8367C_PORT10_UNKNOWN_IP4_MCAST_MASK    0x30
-+#define    RTL8367C_PORT9_UNKNOWN_IP4_MCAST_OFFSET    2
-+#define    RTL8367C_PORT9_UNKNOWN_IP4_MCAST_MASK    0xC
-+#define    RTL8367C_PORT8_UNKNOWN_IP4_MCAST_OFFSET    0
-+#define    RTL8367C_PORT8_UNKNOWN_IP4_MCAST_MASK    0x3
-+
-+#define    RTL8367C_REG_UNKNOWN_IPV6_MULTICAST_CTRL0    0x08cb
-+#define    RTL8367C_PORT7_UNKNOWN_IP6_MCAST_OFFSET    14
-+#define    RTL8367C_PORT7_UNKNOWN_IP6_MCAST_MASK    0xC000
-+#define    RTL8367C_PORT6_UNKNOWN_IP6_MCAST_OFFSET    12
-+#define    RTL8367C_PORT6_UNKNOWN_IP6_MCAST_MASK    0x3000
-+#define    RTL8367C_PORT5_UNKNOWN_IP6_MCAST_OFFSET    10
-+#define    RTL8367C_PORT5_UNKNOWN_IP6_MCAST_MASK    0xC00
-+#define    RTL8367C_PORT4_UNKNOWN_IP6_MCAST_OFFSET    8
-+#define    RTL8367C_PORT4_UNKNOWN_IP6_MCAST_MASK    0x300
-+#define    RTL8367C_PORT3_UNKNOWN_IP6_MCAST_OFFSET    6
-+#define    RTL8367C_PORT3_UNKNOWN_IP6_MCAST_MASK    0xC0
-+#define    RTL8367C_PORT2_UNKNOWN_IP6_MCAST_OFFSET    4
-+#define    RTL8367C_PORT2_UNKNOWN_IP6_MCAST_MASK    0x30
-+#define    RTL8367C_PORT1_UNKNOWN_IP6_MCAST_OFFSET    2
-+#define    RTL8367C_PORT1_UNKNOWN_IP6_MCAST_MASK    0xC
-+#define    RTL8367C_PORT0_UNKNOWN_IP6_MCAST_OFFSET    0
-+#define    RTL8367C_PORT0_UNKNOWN_IP6_MCAST_MASK    0x3
-+
-+#define    RTL8367C_REG_UNKNOWN_IPV6_MULTICAST_CTRL1    0x08cc
-+#define    RTL8367C_PORT10_UNKNOWN_IP6_MCAST_OFFSET    4
-+#define    RTL8367C_PORT10_UNKNOWN_IP6_MCAST_MASK    0x30
-+#define    RTL8367C_PORT9_UNKNOWN_IP6_MCAST_OFFSET    2
-+#define    RTL8367C_PORT9_UNKNOWN_IP6_MCAST_MASK    0xC
-+#define    RTL8367C_PORT8_UNKNOWN_IP6_MCAST_OFFSET    0
-+#define    RTL8367C_PORT8_UNKNOWN_IP6_MCAST_MASK    0x3
-+
-+#define    RTL8367C_REG_UNKNOWN_L2_MULTICAST_CTRL0    0x08cd
-+#define    RTL8367C_PORT7_UNKNOWN_L2_MCAST_OFFSET    14
-+#define    RTL8367C_PORT7_UNKNOWN_L2_MCAST_MASK    0xC000
-+#define    RTL8367C_PORT6_UNKNOWN_L2_MCAST_OFFSET    12
-+#define    RTL8367C_PORT6_UNKNOWN_L2_MCAST_MASK    0x3000
-+#define    RTL8367C_PORT5_UNKNOWN_L2_MCAST_OFFSET    10
-+#define    RTL8367C_PORT5_UNKNOWN_L2_MCAST_MASK    0xC00
-+#define    RTL8367C_PORT4_UNKNOWN_L2_MCAST_OFFSET    8
-+#define    RTL8367C_PORT4_UNKNOWN_L2_MCAST_MASK    0x300
-+#define    RTL8367C_PORT3_UNKNOWN_L2_MCAST_OFFSET    6
-+#define    RTL8367C_PORT3_UNKNOWN_L2_MCAST_MASK    0xC0
-+#define    RTL8367C_PORT2_UNKNOWN_L2_MCAST_OFFSET    4
-+#define    RTL8367C_PORT2_UNKNOWN_L2_MCAST_MASK    0x30
-+#define    RTL8367C_PORT1_UNKNOWN_L2_MCAST_OFFSET    2
-+#define    RTL8367C_PORT1_UNKNOWN_L2_MCAST_MASK    0xC
-+#define    RTL8367C_PORT0_UNKNOWN_L2_MCAST_OFFSET    0
-+#define    RTL8367C_PORT0_UNKNOWN_L2_MCAST_MASK    0x3
-+
-+#define    RTL8367C_REG_PORT_TRUNK_DROP_CTRL    0x08ce
-+#define    RTL8367C_PORT_TRUNK_DROP_CTRL_OFFSET    0
-+#define    RTL8367C_PORT_TRUNK_DROP_CTRL_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT_TRUNK_CTRL    0x08cf
-+#define    RTL8367C_PORT_TRUNK_DUMB_OFFSET    8
-+#define    RTL8367C_PORT_TRUNK_DUMB_MASK    0x100
-+#define    RTL8367C_PORT_TRUNK_FLOOD_OFFSET    7
-+#define    RTL8367C_PORT_TRUNK_FLOOD_MASK    0x80
-+#define    RTL8367C_DPORT_HASH_OFFSET    6
-+#define    RTL8367C_DPORT_HASH_MASK    0x40
-+#define    RTL8367C_SPORT_HASH_OFFSET    5
-+#define    RTL8367C_SPORT_HASH_MASK    0x20
-+#define    RTL8367C_DIP_HASH_OFFSET    4
-+#define    RTL8367C_DIP_HASH_MASK    0x10
-+#define    RTL8367C_SIP_HASH_OFFSET    3
-+#define    RTL8367C_SIP_HASH_MASK    0x8
-+#define    RTL8367C_DMAC_HASH_OFFSET    2
-+#define    RTL8367C_DMAC_HASH_MASK    0x4
-+#define    RTL8367C_SMAC_HASH_OFFSET    1
-+#define    RTL8367C_SMAC_HASH_MASK    0x2
-+#define    RTL8367C_SPA_HASH_OFFSET    0
-+#define    RTL8367C_SPA_HASH_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT_TRUNK_GROUP_MASK    0x08d0
-+#define    RTL8367C_PORT_TRUNK_GROUP2_MASK_OFFSET    8
-+#define    RTL8367C_PORT_TRUNK_GROUP2_MASK_MASK    0x300
-+#define    RTL8367C_PORT_TRUNK_GROUP1_MASK_OFFSET    4
-+#define    RTL8367C_PORT_TRUNK_GROUP1_MASK_MASK    0xF0
-+#define    RTL8367C_PORT_TRUNK_GROUP0_MASK_OFFSET    0
-+#define    RTL8367C_PORT_TRUNK_GROUP0_MASK_MASK    0xF
-+
-+#define    RTL8367C_REG_PORT_TRUNK_FLOWCTRL    0x08d1
-+#define    RTL8367C_EN_FLOWCTRL_TG2_OFFSET    2
-+#define    RTL8367C_EN_FLOWCTRL_TG2_MASK    0x4
-+#define    RTL8367C_EN_FLOWCTRL_TG1_OFFSET    1
-+#define    RTL8367C_EN_FLOWCTRL_TG1_MASK    0x2
-+#define    RTL8367C_EN_FLOWCTRL_TG0_OFFSET    0
-+#define    RTL8367C_EN_FLOWCTRL_TG0_MASK    0x1
-+
-+#define    RTL8367C_REG_PORT_TRUNK_HASH_MAPPING_CTRL0    0x08d2
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH7_OFFSET    14
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH7_MASK    0xC000
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH6_OFFSET    12
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH6_MASK    0x3000
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH5_OFFSET    10
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH5_MASK    0xC00
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH4_OFFSET    8
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH4_MASK    0x300
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH3_OFFSET    6
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH3_MASK    0xC0
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH2_OFFSET    4
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH2_MASK    0x30
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH1_OFFSET    2
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH1_MASK    0xC
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH0_OFFSET    0
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH0_MASK    0x3
-+
-+#define    RTL8367C_REG_PORT_TRUNK_HASH_MAPPING_CTRL1    0x08d3
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH15_OFFSET    14
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH15_MASK    0xC000
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH14_OFFSET    12
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH14_MASK    0x3000
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH13_OFFSET    10
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH13_MASK    0xC00
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH12_OFFSET    8
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH12_MASK    0x300
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH11_OFFSET    6
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH11_MASK    0xC0
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH10_OFFSET    4
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH10_MASK    0x30
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH9_OFFSET    2
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH9_MASK    0xC
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH8_OFFSET    0
-+#define    RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH8_MASK    0x3
-+
-+#define    RTL8367C_REG_DOS_CFG    0x08d4
-+#define    RTL8367C_DROP_ICMPFRAGMENT_OFFSET    9
-+#define    RTL8367C_DROP_ICMPFRAGMENT_MASK    0x200
-+#define    RTL8367C_DROP_TCPFRAGERROR_OFFSET    8
-+#define    RTL8367C_DROP_TCPFRAGERROR_MASK    0x100
-+#define    RTL8367C_DROP_TCPSHORTHDR_OFFSET    7
-+#define    RTL8367C_DROP_TCPSHORTHDR_MASK    0x80
-+#define    RTL8367C_DROP_SYN1024_OFFSET    6
-+#define    RTL8367C_DROP_SYN1024_MASK    0x40
-+#define    RTL8367C_DROP_NULLSCAN_OFFSET    5
-+#define    RTL8367C_DROP_NULLSCAN_MASK    0x20
-+#define    RTL8367C_DROP_XMASCAN_OFFSET    4
-+#define    RTL8367C_DROP_XMASCAN_MASK    0x10
-+#define    RTL8367C_DROP_SYNFINSCAN_OFFSET    3
-+#define    RTL8367C_DROP_SYNFINSCAN_MASK    0x8
-+#define    RTL8367C_DROP_BLATATTACKS_OFFSET    2
-+#define    RTL8367C_DROP_BLATATTACKS_MASK    0x4
-+#define    RTL8367C_DROP_LANDATTACKS_OFFSET    1
-+#define    RTL8367C_DROP_LANDATTACKS_MASK    0x2
-+#define    RTL8367C_DROP_DAEQSA_OFFSET    0
-+#define    RTL8367C_DROP_DAEQSA_MASK    0x1
-+
-+#define    RTL8367C_REG_UNKNOWN_L2_MULTICAST_CTRL1    0x08d5
-+#define    RTL8367C_PORT10_UNKNOWN_L2_MCAST_OFFSET    4
-+#define    RTL8367C_PORT10_UNKNOWN_L2_MCAST_MASK    0x30
-+#define    RTL8367C_PORT9_UNKNOWN_L2_MCAST_OFFSET    2
-+#define    RTL8367C_PORT9_UNKNOWN_L2_MCAST_MASK    0xC
-+#define    RTL8367C_PORT8_UNKNOWN_L2_MCAST_OFFSET    0
-+#define    RTL8367C_PORT8_UNKNOWN_L2_MCAST_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL4    0x08d6
-+#define    RTL8367C_PORT9_VLAN_KEEP_MASK_OFFSET    8
-+#define    RTL8367C_PORT9_VLAN_KEEP_MASK_MASK    0xFF00
-+#define    RTL8367C_PORT8_VLAN_KEEP_MASK_OFFSET    0
-+#define    RTL8367C_PORT8_VLAN_KEEP_MASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL5    0x08d7
-+#define    RTL8367C_VLAN_EGRESS_KEEP_CTRL5_OFFSET    0
-+#define    RTL8367C_VLAN_EGRESS_KEEP_CTRL5_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL0_EXT    0x08d8
-+#define    RTL8367C_PORT1_VLAN_KEEP_MASK_EXT_OFFSET    3
-+#define    RTL8367C_PORT1_VLAN_KEEP_MASK_EXT_MASK    0x38
-+#define    RTL8367C_PORT0_VLAN_KEEP_MASK_EXT_OFFSET    0
-+#define    RTL8367C_PORT0_VLAN_KEEP_MASK_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL1_EXT    0x08d9
-+#define    RTL8367C_PORT3_VLAN_KEEP_MASK_EXT_OFFSET    3
-+#define    RTL8367C_PORT3_VLAN_KEEP_MASK_EXT_MASK    0x38
-+#define    RTL8367C_PORT2_VLAN_KEEP_MASK_EXT_OFFSET    0
-+#define    RTL8367C_PORT2_VLAN_KEEP_MASK_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL2_EXT    0x08da
-+#define    RTL8367C_PORT5_VLAN_KEEP_MASK_EXT_OFFSET    3
-+#define    RTL8367C_PORT5_VLAN_KEEP_MASK_EXT_MASK    0x38
-+#define    RTL8367C_PORT4_VLAN_KEEP_MASK_EXT_OFFSET    0
-+#define    RTL8367C_PORT4_VLAN_KEEP_MASK_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL3_EXT    0x08db
-+#define    RTL8367C_PORT7_VLAN_KEEP_MASK_EXT_OFFSET    3
-+#define    RTL8367C_PORT7_VLAN_KEEP_MASK_EXT_MASK    0x38
-+#define    RTL8367C_PORT6_VLAN_KEEP_MASK_EXT_OFFSET    0
-+#define    RTL8367C_PORT6_VLAN_KEEP_MASK_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL4_EXT    0x08dc
-+#define    RTL8367C_PORT9_VLAN_KEEP_MASK_EXT_OFFSET    3
-+#define    RTL8367C_PORT9_VLAN_KEEP_MASK_EXT_MASK    0x38
-+#define    RTL8367C_PORT8_VLAN_KEEP_MASK_EXT_OFFSET    0
-+#define    RTL8367C_PORT8_VLAN_KEEP_MASK_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL5_EXT    0x08dd
-+#define    RTL8367C_VLAN_EGRESS_KEEP_CTRL5_EXT_OFFSET    0
-+#define    RTL8367C_VLAN_EGRESS_KEEP_CTRL5_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_TRANS_CTRL10    0x08de
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL10_OFFSET    0
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL10_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FPGA_VER_CEN    0x08e0
-+
-+#define    RTL8367C_REG_FPGA_TIME_CEN    0x08e1
-+
-+#define    RTL8367C_REG_FPGA_DATE_CEN    0x08e2
-+
-+#define    RTL8367C_REG_QOS_PORT_QUEUE_NUMBER_CTRL0    0x0900
-+#define    RTL8367C_PORT3_NUMBER_OFFSET    12
-+#define    RTL8367C_PORT3_NUMBER_MASK    0x7000
-+#define    RTL8367C_PORT2_NUMBER_OFFSET    8
-+#define    RTL8367C_PORT2_NUMBER_MASK    0x700
-+#define    RTL8367C_PORT1_NUMBER_OFFSET    4
-+#define    RTL8367C_PORT1_NUMBER_MASK    0x70
-+#define    RTL8367C_PORT0_NUMBER_OFFSET    0
-+#define    RTL8367C_PORT0_NUMBER_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_PORT_QUEUE_NUMBER_CTRL1    0x0901
-+#define    RTL8367C_PORT7_NUMBER_OFFSET    12
-+#define    RTL8367C_PORT7_NUMBER_MASK    0x7000
-+#define    RTL8367C_PORT6_NUMBER_OFFSET    8
-+#define    RTL8367C_PORT6_NUMBER_MASK    0x700
-+#define    RTL8367C_PORT5_NUMBER_OFFSET    4
-+#define    RTL8367C_PORT5_NUMBER_MASK    0x70
-+#define    RTL8367C_PORT4_NUMBER_OFFSET    0
-+#define    RTL8367C_PORT4_NUMBER_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_PORT_QUEUE_NUMBER_CTRL2    0x0902
-+#define    RTL8367C_PORT10_NUMBER_OFFSET    8
-+#define    RTL8367C_PORT10_NUMBER_MASK    0x700
-+#define    RTL8367C_PORT9_NUMBER_OFFSET    4
-+#define    RTL8367C_PORT9_NUMBER_MASK    0x70
-+#define    RTL8367C_PORT8_NUMBER_OFFSET    0
-+#define    RTL8367C_PORT8_NUMBER_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_1Q_PRIORITY_TO_QID_CTRL0    0x0904
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_CTRL0_PRIORITY3_TO_QID_OFFSET    12
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_CTRL0_PRIORITY3_TO_QID_MASK    0x7000
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_CTRL0_PRIORITY2_TO_QID_OFFSET    8
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_CTRL0_PRIORITY2_TO_QID_MASK    0x700
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_CTRL0_PRIORITY1_TO_QID_OFFSET    4
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_CTRL0_PRIORITY1_TO_QID_MASK    0x70
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_CTRL0_PRIORITY0_TO_QID_OFFSET    0
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_CTRL0_PRIORITY0_TO_QID_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_1Q_PRIORITY_TO_QID_CTRL1    0x0905
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_CTRL1_PRIORITY7_TO_QID_OFFSET    12
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_CTRL1_PRIORITY7_TO_QID_MASK    0x7000
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_CTRL1_PRIORITY6_TO_QID_OFFSET    8
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_CTRL1_PRIORITY6_TO_QID_MASK    0x700
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_CTRL1_PRIORITY5_TO_QID_OFFSET    4
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_CTRL1_PRIORITY5_TO_QID_MASK    0x70
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_CTRL1_PRIORITY4_TO_QID_OFFSET    0
-+#define    RTL8367C_QOS_1Q_PRIORITY_TO_QID_CTRL1_PRIORITY4_TO_QID_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_2Q_PRIORITY_TO_QID_CTRL0    0x0906
-+#define    RTL8367C_QOS_2Q_PRIORITY_TO_QID_CTRL0_PRIORITY3_TO_QID_OFFSET    12
-+#define    RTL8367C_QOS_2Q_PRIORITY_TO_QID_CTRL0_PRIORITY3_TO_QID_MASK    0x7000
-+#define    RTL8367C_QOS_2Q_PRIORITY_TO_QID_CTRL0_PRIORITY2_TO_QID_OFFSET    8
-+#define    RTL8367C_QOS_2Q_PRIORITY_TO_QID_CTRL0_PRIORITY2_TO_QID_MASK    0x700
-+#define    RTL8367C_QOS_2Q_PRIORITY_TO_QID_CTRL0_PRIORITY1_TO_QID_OFFSET    4
-+#define    RTL8367C_QOS_2Q_PRIORITY_TO_QID_CTRL0_PRIORITY1_TO_QID_MASK    0x70
-+#define    RTL8367C_QOS_2Q_PRIORITY_TO_QID_CTRL0_PRIORITY0_TO_QID_OFFSET    0
-+#define    RTL8367C_QOS_2Q_PRIORITY_TO_QID_CTRL0_PRIORITY0_TO_QID_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_2Q_PRIORITY_TO_QID_CTRL1    0x0907
-+#define    RTL8367C_QOS_2Q_PRIORITY_TO_QID_CTRL1_PRIORITY7_TO_QID_OFFSET    12
-+#define    RTL8367C_QOS_2Q_PRIORITY_TO_QID_CTRL1_PRIORITY7_TO_QID_MASK    0x7000
-+#define    RTL8367C_QOS_2Q_PRIORITY_TO_QID_CTRL1_PRIORITY6_TO_QID_OFFSET    8
-+#define    RTL8367C_QOS_2Q_PRIORITY_TO_QID_CTRL1_PRIORITY6_TO_QID_MASK    0x700
-+#define    RTL8367C_QOS_2Q_PRIORITY_TO_QID_CTRL1_PRIORITY5_TO_QID_OFFSET    4
-+#define    RTL8367C_QOS_2Q_PRIORITY_TO_QID_CTRL1_PRIORITY5_TO_QID_MASK    0x70
-+#define    RTL8367C_QOS_2Q_PRIORITY_TO_QID_CTRL1_PRIORITY4_TO_QID_OFFSET    0
-+#define    RTL8367C_QOS_2Q_PRIORITY_TO_QID_CTRL1_PRIORITY4_TO_QID_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_3Q_PRIORITY_TO_QID_CTRL0    0x0908
-+#define    RTL8367C_QOS_3Q_PRIORITY_TO_QID_CTRL0_PRIORITY3_TO_QID_OFFSET    12
-+#define    RTL8367C_QOS_3Q_PRIORITY_TO_QID_CTRL0_PRIORITY3_TO_QID_MASK    0x7000
-+#define    RTL8367C_QOS_3Q_PRIORITY_TO_QID_CTRL0_PRIORITY2_TO_QID_OFFSET    8
-+#define    RTL8367C_QOS_3Q_PRIORITY_TO_QID_CTRL0_PRIORITY2_TO_QID_MASK    0x700
-+#define    RTL8367C_QOS_3Q_PRIORITY_TO_QID_CTRL0_PRIORITY1_TO_QID_OFFSET    4
-+#define    RTL8367C_QOS_3Q_PRIORITY_TO_QID_CTRL0_PRIORITY1_TO_QID_MASK    0x70
-+#define    RTL8367C_QOS_3Q_PRIORITY_TO_QID_CTRL0_PRIORITY0_TO_QID_OFFSET    0
-+#define    RTL8367C_QOS_3Q_PRIORITY_TO_QID_CTRL0_PRIORITY0_TO_QID_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_3Q_PRIORITY_TO_QID_CTRL1    0x0909
-+#define    RTL8367C_QOS_3Q_PRIORITY_TO_QID_CTRL1_PRIORITY7_TO_QID_OFFSET    12
-+#define    RTL8367C_QOS_3Q_PRIORITY_TO_QID_CTRL1_PRIORITY7_TO_QID_MASK    0x7000
-+#define    RTL8367C_QOS_3Q_PRIORITY_TO_QID_CTRL1_PRIORITY6_TO_QID_OFFSET    8
-+#define    RTL8367C_QOS_3Q_PRIORITY_TO_QID_CTRL1_PRIORITY6_TO_QID_MASK    0x700
-+#define    RTL8367C_QOS_3Q_PRIORITY_TO_QID_CTRL1_PRIORITY5_TO_QID_OFFSET    4
-+#define    RTL8367C_QOS_3Q_PRIORITY_TO_QID_CTRL1_PRIORITY5_TO_QID_MASK    0x70
-+#define    RTL8367C_QOS_3Q_PRIORITY_TO_QID_CTRL1_PRIORITY4_TO_QID_OFFSET    0
-+#define    RTL8367C_QOS_3Q_PRIORITY_TO_QID_CTRL1_PRIORITY4_TO_QID_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_4Q_PRIORITY_TO_QID_CTRL0    0x090a
-+#define    RTL8367C_QOS_4Q_PRIORITY_TO_QID_CTRL0_PRIORITY3_TO_QID_OFFSET    12
-+#define    RTL8367C_QOS_4Q_PRIORITY_TO_QID_CTRL0_PRIORITY3_TO_QID_MASK    0x7000
-+#define    RTL8367C_QOS_4Q_PRIORITY_TO_QID_CTRL0_PRIORITY2_TO_QID_OFFSET    8
-+#define    RTL8367C_QOS_4Q_PRIORITY_TO_QID_CTRL0_PRIORITY2_TO_QID_MASK    0x700
-+#define    RTL8367C_QOS_4Q_PRIORITY_TO_QID_CTRL0_PRIORITY1_TO_QID_OFFSET    4
-+#define    RTL8367C_QOS_4Q_PRIORITY_TO_QID_CTRL0_PRIORITY1_TO_QID_MASK    0x70
-+#define    RTL8367C_QOS_4Q_PRIORITY_TO_QID_CTRL0_PRIORITY0_TO_QID_OFFSET    0
-+#define    RTL8367C_QOS_4Q_PRIORITY_TO_QID_CTRL0_PRIORITY0_TO_QID_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_4Q_PRIORITY_TO_QID_CTRL1    0x090b
-+#define    RTL8367C_QOS_4Q_PRIORITY_TO_QID_CTRL1_PRIORITY7_TO_QID_OFFSET    12
-+#define    RTL8367C_QOS_4Q_PRIORITY_TO_QID_CTRL1_PRIORITY7_TO_QID_MASK    0x7000
-+#define    RTL8367C_QOS_4Q_PRIORITY_TO_QID_CTRL1_PRIORITY6_TO_QID_OFFSET    8
-+#define    RTL8367C_QOS_4Q_PRIORITY_TO_QID_CTRL1_PRIORITY6_TO_QID_MASK    0x700
-+#define    RTL8367C_QOS_4Q_PRIORITY_TO_QID_CTRL1_PRIORITY5_TO_QID_OFFSET    4
-+#define    RTL8367C_QOS_4Q_PRIORITY_TO_QID_CTRL1_PRIORITY5_TO_QID_MASK    0x70
-+#define    RTL8367C_QOS_4Q_PRIORITY_TO_QID_CTRL1_PRIORITY4_TO_QID_OFFSET    0
-+#define    RTL8367C_QOS_4Q_PRIORITY_TO_QID_CTRL1_PRIORITY4_TO_QID_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_5Q_PRIORITY_TO_QID_CTRL0    0x090c
-+#define    RTL8367C_QOS_5Q_PRIORITY_TO_QID_CTRL0_PRIORITY3_TO_QID_OFFSET    12
-+#define    RTL8367C_QOS_5Q_PRIORITY_TO_QID_CTRL0_PRIORITY3_TO_QID_MASK    0x7000
-+#define    RTL8367C_QOS_5Q_PRIORITY_TO_QID_CTRL0_PRIORITY2_TO_QID_OFFSET    8
-+#define    RTL8367C_QOS_5Q_PRIORITY_TO_QID_CTRL0_PRIORITY2_TO_QID_MASK    0x700
-+#define    RTL8367C_QOS_5Q_PRIORITY_TO_QID_CTRL0_PRIORITY1_TO_QID_OFFSET    4
-+#define    RTL8367C_QOS_5Q_PRIORITY_TO_QID_CTRL0_PRIORITY1_TO_QID_MASK    0x70
-+#define    RTL8367C_QOS_5Q_PRIORITY_TO_QID_CTRL0_PRIORITY0_TO_QID_OFFSET    0
-+#define    RTL8367C_QOS_5Q_PRIORITY_TO_QID_CTRL0_PRIORITY0_TO_QID_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_5Q_PRIORITY_TO_QID_CTRL1    0x090d
-+#define    RTL8367C_QOS_5Q_PRIORITY_TO_QID_CTRL1_PRIORITY7_TO_QID_OFFSET    12
-+#define    RTL8367C_QOS_5Q_PRIORITY_TO_QID_CTRL1_PRIORITY7_TO_QID_MASK    0x7000
-+#define    RTL8367C_QOS_5Q_PRIORITY_TO_QID_CTRL1_PRIORITY6_TO_QID_OFFSET    8
-+#define    RTL8367C_QOS_5Q_PRIORITY_TO_QID_CTRL1_PRIORITY6_TO_QID_MASK    0x700
-+#define    RTL8367C_QOS_5Q_PRIORITY_TO_QID_CTRL1_PRIORITY5_TO_QID_OFFSET    4
-+#define    RTL8367C_QOS_5Q_PRIORITY_TO_QID_CTRL1_PRIORITY5_TO_QID_MASK    0x70
-+#define    RTL8367C_QOS_5Q_PRIORITY_TO_QID_CTRL1_PRIORITY4_TO_QID_OFFSET    0
-+#define    RTL8367C_QOS_5Q_PRIORITY_TO_QID_CTRL1_PRIORITY4_TO_QID_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_6Q_PRIORITY_TO_QID_CTRL0    0x090e
-+#define    RTL8367C_QOS_6Q_PRIORITY_TO_QID_CTRL0_PRIORITY3_TO_QID_OFFSET    12
-+#define    RTL8367C_QOS_6Q_PRIORITY_TO_QID_CTRL0_PRIORITY3_TO_QID_MASK    0x7000
-+#define    RTL8367C_QOS_6Q_PRIORITY_TO_QID_CTRL0_PRIORITY2_TO_QID_OFFSET    8
-+#define    RTL8367C_QOS_6Q_PRIORITY_TO_QID_CTRL0_PRIORITY2_TO_QID_MASK    0x700
-+#define    RTL8367C_QOS_6Q_PRIORITY_TO_QID_CTRL0_PRIORITY1_TO_QID_OFFSET    4
-+#define    RTL8367C_QOS_6Q_PRIORITY_TO_QID_CTRL0_PRIORITY1_TO_QID_MASK    0x70
-+#define    RTL8367C_QOS_6Q_PRIORITY_TO_QID_CTRL0_PRIORITY0_TO_QID_OFFSET    0
-+#define    RTL8367C_QOS_6Q_PRIORITY_TO_QID_CTRL0_PRIORITY0_TO_QID_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_6Q_PRIORITY_TO_QID_CTRL1    0x090f
-+#define    RTL8367C_QOS_6Q_PRIORITY_TO_QID_CTRL1_PRIORITY7_TO_QID_OFFSET    12
-+#define    RTL8367C_QOS_6Q_PRIORITY_TO_QID_CTRL1_PRIORITY7_TO_QID_MASK    0x7000
-+#define    RTL8367C_QOS_6Q_PRIORITY_TO_QID_CTRL1_PRIORITY6_TO_QID_OFFSET    8
-+#define    RTL8367C_QOS_6Q_PRIORITY_TO_QID_CTRL1_PRIORITY6_TO_QID_MASK    0x700
-+#define    RTL8367C_QOS_6Q_PRIORITY_TO_QID_CTRL1_PRIORITY5_TO_QID_OFFSET    4
-+#define    RTL8367C_QOS_6Q_PRIORITY_TO_QID_CTRL1_PRIORITY5_TO_QID_MASK    0x70
-+#define    RTL8367C_QOS_6Q_PRIORITY_TO_QID_CTRL1_PRIORITY4_TO_QID_OFFSET    0
-+#define    RTL8367C_QOS_6Q_PRIORITY_TO_QID_CTRL1_PRIORITY4_TO_QID_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_7Q_PRIORITY_TO_QID_CTRL0    0x0910
-+#define    RTL8367C_QOS_7Q_PRIORITY_TO_QID_CTRL0_PRIORITY3_TO_QID_OFFSET    12
-+#define    RTL8367C_QOS_7Q_PRIORITY_TO_QID_CTRL0_PRIORITY3_TO_QID_MASK    0x7000
-+#define    RTL8367C_QOS_7Q_PRIORITY_TO_QID_CTRL0_PRIORITY2_TO_QID_OFFSET    8
-+#define    RTL8367C_QOS_7Q_PRIORITY_TO_QID_CTRL0_PRIORITY2_TO_QID_MASK    0x700
-+#define    RTL8367C_QOS_7Q_PRIORITY_TO_QID_CTRL0_PRIORITY1_TO_QID_OFFSET    4
-+#define    RTL8367C_QOS_7Q_PRIORITY_TO_QID_CTRL0_PRIORITY1_TO_QID_MASK    0x70
-+#define    RTL8367C_QOS_7Q_PRIORITY_TO_QID_CTRL0_PRIORITY0_TO_QID_OFFSET    0
-+#define    RTL8367C_QOS_7Q_PRIORITY_TO_QID_CTRL0_PRIORITY0_TO_QID_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_7Q_PRIORITY_TO_QID_CTRL1    0x0911
-+#define    RTL8367C_QOS_7Q_PRIORITY_TO_QID_CTRL1_PRIORITY7_TO_QID_OFFSET    12
-+#define    RTL8367C_QOS_7Q_PRIORITY_TO_QID_CTRL1_PRIORITY7_TO_QID_MASK    0x7000
-+#define    RTL8367C_QOS_7Q_PRIORITY_TO_QID_CTRL1_PRIORITY6_TO_QID_OFFSET    8
-+#define    RTL8367C_QOS_7Q_PRIORITY_TO_QID_CTRL1_PRIORITY6_TO_QID_MASK    0x700
-+#define    RTL8367C_QOS_7Q_PRIORITY_TO_QID_CTRL1_PRIORITY5_TO_QID_OFFSET    4
-+#define    RTL8367C_QOS_7Q_PRIORITY_TO_QID_CTRL1_PRIORITY5_TO_QID_MASK    0x70
-+#define    RTL8367C_QOS_7Q_PRIORITY_TO_QID_CTRL1_PRIORITY4_TO_QID_OFFSET    0
-+#define    RTL8367C_QOS_7Q_PRIORITY_TO_QID_CTRL1_PRIORITY4_TO_QID_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_8Q_PRIORITY_TO_QID_CTRL0    0x0912
-+#define    RTL8367C_QOS_8Q_PRIORITY_TO_QID_CTRL0_PRIORITY3_TO_QID_OFFSET    12
-+#define    RTL8367C_QOS_8Q_PRIORITY_TO_QID_CTRL0_PRIORITY3_TO_QID_MASK    0x7000
-+#define    RTL8367C_QOS_8Q_PRIORITY_TO_QID_CTRL0_PRIORITY2_TO_QID_OFFSET    8
-+#define    RTL8367C_QOS_8Q_PRIORITY_TO_QID_CTRL0_PRIORITY2_TO_QID_MASK    0x700
-+#define    RTL8367C_QOS_8Q_PRIORITY_TO_QID_CTRL0_PRIORITY1_TO_QID_OFFSET    4
-+#define    RTL8367C_QOS_8Q_PRIORITY_TO_QID_CTRL0_PRIORITY1_TO_QID_MASK    0x70
-+#define    RTL8367C_QOS_8Q_PRIORITY_TO_QID_CTRL0_PRIORITY0_TO_QID_OFFSET    0
-+#define    RTL8367C_QOS_8Q_PRIORITY_TO_QID_CTRL0_PRIORITY0_TO_QID_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_8Q_PRIORITY_TO_QID_CTRL1    0x0913
-+#define    RTL8367C_QOS_8Q_PRIORITY_TO_QID_CTRL1_PRIORITY7_TO_QID_OFFSET    12
-+#define    RTL8367C_QOS_8Q_PRIORITY_TO_QID_CTRL1_PRIORITY7_TO_QID_MASK    0x7000
-+#define    RTL8367C_QOS_8Q_PRIORITY_TO_QID_CTRL1_PRIORITY6_TO_QID_OFFSET    8
-+#define    RTL8367C_QOS_8Q_PRIORITY_TO_QID_CTRL1_PRIORITY6_TO_QID_MASK    0x700
-+#define    RTL8367C_QOS_8Q_PRIORITY_TO_QID_CTRL1_PRIORITY5_TO_QID_OFFSET    4
-+#define    RTL8367C_QOS_8Q_PRIORITY_TO_QID_CTRL1_PRIORITY5_TO_QID_MASK    0x70
-+#define    RTL8367C_QOS_8Q_PRIORITY_TO_QID_CTRL1_PRIORITY4_TO_QID_OFFSET    0
-+#define    RTL8367C_QOS_8Q_PRIORITY_TO_QID_CTRL1_PRIORITY4_TO_QID_MASK    0x7
-+
-+#define    RTL8367C_REG_HIGHPRI_INDICATOR    0x0915
-+#define    RTL8367C_PORT10_INDICATOR_OFFSET    10
-+#define    RTL8367C_PORT10_INDICATOR_MASK    0x400
-+#define    RTL8367C_PORT9_INDICATOR_OFFSET    9
-+#define    RTL8367C_PORT9_INDICATOR_MASK    0x200
-+#define    RTL8367C_PORT8_INDICATOR_OFFSET    8
-+#define    RTL8367C_PORT8_INDICATOR_MASK    0x100
-+#define    RTL8367C_PORT7_INDICATOR_OFFSET    7
-+#define    RTL8367C_PORT7_INDICATOR_MASK    0x80
-+#define    RTL8367C_PORT6_INDICATOR_OFFSET    6
-+#define    RTL8367C_PORT6_INDICATOR_MASK    0x40
-+#define    RTL8367C_PORT5_INDICATOR_OFFSET    5
-+#define    RTL8367C_PORT5_INDICATOR_MASK    0x20
-+#define    RTL8367C_PORT4_INDICATOR_OFFSET    4
-+#define    RTL8367C_PORT4_INDICATOR_MASK    0x10
-+#define    RTL8367C_PORT3_INDICATOR_OFFSET    3
-+#define    RTL8367C_PORT3_INDICATOR_MASK    0x8
-+#define    RTL8367C_PORT2_INDICATOR_OFFSET    2
-+#define    RTL8367C_PORT2_INDICATOR_MASK    0x4
-+#define    RTL8367C_PORT1_INDICATOR_OFFSET    1
-+#define    RTL8367C_PORT1_INDICATOR_MASK    0x2
-+#define    RTL8367C_PORT0_INDICATOR_OFFSET    0
-+#define    RTL8367C_PORT0_INDICATOR_MASK    0x1
-+
-+#define    RTL8367C_REG_HIGHPRI_CFG    0x0916
-+#define    RTL8367C_HIGHPRI_CFG_OFFSET    0
-+#define    RTL8367C_HIGHPRI_CFG_MASK    0xFF
-+
-+#define    RTL8367C_REG_PORT_DEBUG_INFO_CTRL0    0x0917
-+#define    RTL8367C_PORT1_DEBUG_INFO_OFFSET    8
-+#define    RTL8367C_PORT1_DEBUG_INFO_MASK    0xFF00
-+#define    RTL8367C_PORT0_DEBUG_INFO_OFFSET    0
-+#define    RTL8367C_PORT0_DEBUG_INFO_MASK    0xFF
-+
-+#define    RTL8367C_REG_PORT_DEBUG_INFO_CTRL1    0x0918
-+#define    RTL8367C_PORT3_DEBUG_INFO_OFFSET    8
-+#define    RTL8367C_PORT3_DEBUG_INFO_MASK    0xFF00
-+#define    RTL8367C_PORT2_DEBUG_INFO_OFFSET    0
-+#define    RTL8367C_PORT2_DEBUG_INFO_MASK    0xFF
-+
-+#define    RTL8367C_REG_PORT_DEBUG_INFO_CTRL2    0x0919
-+#define    RTL8367C_PORT5_DEBUG_INFO_OFFSET    8
-+#define    RTL8367C_PORT5_DEBUG_INFO_MASK    0xFF00
-+#define    RTL8367C_PORT4_DEBUG_INFO_OFFSET    0
-+#define    RTL8367C_PORT4_DEBUG_INFO_MASK    0xFF
-+
-+#define    RTL8367C_REG_PORT_DEBUG_INFO_CTRL3    0x091a
-+#define    RTL8367C_PORT7_DEBUG_INFO_OFFSET    8
-+#define    RTL8367C_PORT7_DEBUG_INFO_MASK    0xFF00
-+#define    RTL8367C_PORT6_DEBUG_INFO_OFFSET    0
-+#define    RTL8367C_PORT6_DEBUG_INFO_MASK    0xFF
-+
-+#define    RTL8367C_REG_PORT_DEBUG_INFO_CTRL4    0x091b
-+#define    RTL8367C_PORT9_DEBUG_INFO_OFFSET    8
-+#define    RTL8367C_PORT9_DEBUG_INFO_MASK    0xFF00
-+#define    RTL8367C_PORT8_DEBUG_INFO_OFFSET    0
-+#define    RTL8367C_PORT8_DEBUG_INFO_MASK    0xFF
-+
-+#define    RTL8367C_REG_PORT_DEBUG_INFO_CTRL5    0x091c
-+#define    RTL8367C_PORT10_DEBUG_INFO_OFFSET    0
-+#define    RTL8367C_PORT10_DEBUG_INFO_MASK    0xFF
-+
-+#define    RTL8367C_REG_PORT_DEBUG_INFO_CTRL6    0x091d
-+#define    RTL8367C_PORT7_DEBUG_INDICATOR_OFFSET    14
-+#define    RTL8367C_PORT7_DEBUG_INDICATOR_MASK    0xC000
-+#define    RTL8367C_PORT6_DEBUG_INDICATOR_OFFSET    12
-+#define    RTL8367C_PORT6_DEBUG_INDICATOR_MASK    0x3000
-+#define    RTL8367C_PORT5_DEBUG_INDICATOR_OFFSET    10
-+#define    RTL8367C_PORT5_DEBUG_INDICATOR_MASK    0xC00
-+#define    RTL8367C_PORT4_DEBUG_INDICATOR_OFFSET    8
-+#define    RTL8367C_PORT4_DEBUG_INDICATOR_MASK    0x300
-+#define    RTL8367C_PORT3_DEBUG_INDICATOR_OFFSET    6
-+#define    RTL8367C_PORT3_DEBUG_INDICATOR_MASK    0xC0
-+#define    RTL8367C_PORT2_DEBUG_INDICATOR_OFFSET    4
-+#define    RTL8367C_PORT2_DEBUG_INDICATOR_MASK    0x30
-+#define    RTL8367C_PORT1_DEBUG_INDICATOR_OFFSET    2
-+#define    RTL8367C_PORT1_DEBUG_INDICATOR_MASK    0xC
-+#define    RTL8367C_PORT0_DEBUG_INDICATOR_OFFSET    0
-+#define    RTL8367C_PORT0_DEBUG_INDICATOR_MASK    0x3
-+
-+#define    RTL8367C_REG_PORT_DEBUG_INFO_CTRL7    0x091e
-+#define    RTL8367C_PORT10_DEBUG_INDICATOR_OFFSET    4
-+#define    RTL8367C_PORT10_DEBUG_INDICATOR_MASK    0x30
-+#define    RTL8367C_PORT9_DEBUG_INDICATOR_OFFSET    2
-+#define    RTL8367C_PORT9_DEBUG_INDICATOR_MASK    0xC
-+#define    RTL8367C_PORT8_DEBUG_INDICATOR_OFFSET    0
-+#define    RTL8367C_PORT8_DEBUG_INDICATOR_MASK    0x3
-+
-+#define    RTL8367C_REG_FLOWCRTL_EGRESS_QUEUE_ENABLE_CTRL0    0x0930
-+#define    RTL8367C_PORT1_QUEUE_MASK_OFFSET    8
-+#define    RTL8367C_PORT1_QUEUE_MASK_MASK    0xFF00
-+#define    RTL8367C_PORT0_QUEUE_MASK_OFFSET    0
-+#define    RTL8367C_PORT0_QUEUE_MASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_FLOWCRTL_EGRESS_QUEUE_ENABLE_CTRL1    0x0931
-+#define    RTL8367C_PORT3_QUEUE_MASK_OFFSET    8
-+#define    RTL8367C_PORT3_QUEUE_MASK_MASK    0xFF00
-+#define    RTL8367C_PORT2_QUEUE_MASK_OFFSET    0
-+#define    RTL8367C_PORT2_QUEUE_MASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_FLOWCRTL_EGRESS_QUEUE_ENABLE_CTRL2    0x0932
-+#define    RTL8367C_PORT5_QUEUE_MASK_OFFSET    8
-+#define    RTL8367C_PORT5_QUEUE_MASK_MASK    0xFF00
-+#define    RTL8367C_PORT4_QUEUE_MASK_OFFSET    0
-+#define    RTL8367C_PORT4_QUEUE_MASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_FLOWCRTL_EGRESS_QUEUE_ENABLE_CTRL3    0x0933
-+#define    RTL8367C_PORT7_QUEUE_MASK_OFFSET    8
-+#define    RTL8367C_PORT7_QUEUE_MASK_MASK    0xFF00
-+#define    RTL8367C_PORT6_QUEUE_MASK_OFFSET    0
-+#define    RTL8367C_PORT6_QUEUE_MASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_FLOWCRTL_EGRESS_QUEUE_ENABLE_CTRL4    0x0934
-+#define    RTL8367C_PORT9_QUEUE_MASK_OFFSET    8
-+#define    RTL8367C_PORT9_QUEUE_MASK_MASK    0xFF00
-+#define    RTL8367C_PORT8_QUEUE_MASK_OFFSET    0
-+#define    RTL8367C_PORT8_QUEUE_MASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_FLOWCRTL_EGRESS_QUEUE_ENABLE_CTRL5    0x0935
-+#define    RTL8367C_FLOWCRTL_EGRESS_QUEUE_ENABLE_CTRL5_OFFSET    0
-+#define    RTL8367C_FLOWCRTL_EGRESS_QUEUE_ENABLE_CTRL5_MASK    0xFF
-+
-+#define    RTL8367C_REG_FLOWCRTL_EGRESS_PORT_ENABLE    0x0938
-+#define    RTL8367C_FLOWCRTL_EGRESS_PORT_ENABLE_OFFSET    0
-+#define    RTL8367C_FLOWCRTL_EGRESS_PORT_ENABLE_MASK    0xFF
-+
-+#define    RTL8367C_REG_EAV_CTRL    0x0939
-+#define    RTL8367C_EAV_TRAP_CPU_OFFSET    1
-+#define    RTL8367C_EAV_TRAP_CPU_MASK    0x2
-+#define    RTL8367C_EAV_TRAP_8051_OFFSET    0
-+#define    RTL8367C_EAV_TRAP_8051_MASK    0x1
-+
-+#define    RTL8367C_REG_UNTAG_DSCP_PRI_CFG    0x093a
-+#define    RTL8367C_UNTAG_DSCP_PRI_CFG_OFFSET    0
-+#define    RTL8367C_UNTAG_DSCP_PRI_CFG_MASK    0x1
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL0    0x093b
-+#define    RTL8367C_PORT1_VLAN_KEEP_MASK_OFFSET    8
-+#define    RTL8367C_PORT1_VLAN_KEEP_MASK_MASK    0xFF00
-+#define    RTL8367C_PORT0_VLAN_KEEP_MASK_OFFSET    0
-+#define    RTL8367C_PORT0_VLAN_KEEP_MASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL1    0x093c
-+#define    RTL8367C_PORT3_VLAN_KEEP_MASK_OFFSET    8
-+#define    RTL8367C_PORT3_VLAN_KEEP_MASK_MASK    0xFF00
-+#define    RTL8367C_PORT2_VLAN_KEEP_MASK_OFFSET    0
-+#define    RTL8367C_PORT2_VLAN_KEEP_MASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL2    0x093d
-+#define    RTL8367C_PORT5_VLAN_KEEP_MASK_OFFSET    8
-+#define    RTL8367C_PORT5_VLAN_KEEP_MASK_MASK    0xFF00
-+#define    RTL8367C_PORT4_VLAN_KEEP_MASK_OFFSET    0
-+#define    RTL8367C_PORT4_VLAN_KEEP_MASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL3    0x093e
-+#define    RTL8367C_PORT7_VLAN_KEEP_MASK_OFFSET    8
-+#define    RTL8367C_PORT7_VLAN_KEEP_MASK_MASK    0xFF00
-+#define    RTL8367C_PORT6_VLAN_KEEP_MASK_OFFSET    0
-+#define    RTL8367C_PORT6_VLAN_KEEP_MASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_VLAN_TRANSPARENT_EN_CFG    0x093f
-+#define    RTL8367C_VLAN_TRANSPARENT_EN_CFG_OFFSET    0
-+#define    RTL8367C_VLAN_TRANSPARENT_EN_CFG_MASK    0x1
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY0_H    0x0940
-+#define    RTL8367C_IPMC_GROUP_ENTRY0_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY0_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY0_L    0x0941
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY1_H    0x0942
-+#define    RTL8367C_IPMC_GROUP_ENTRY1_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY1_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY1_L    0x0943
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY2_H    0x0944
-+#define    RTL8367C_IPMC_GROUP_ENTRY2_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY2_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY2_L    0x0945
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY3_H    0x0946
-+#define    RTL8367C_IPMC_GROUP_ENTRY3_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY3_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY3_L    0x0947
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY4_H    0x0948
-+#define    RTL8367C_IPMC_GROUP_ENTRY4_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY4_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY4_L    0x0949
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY5_H    0x094a
-+#define    RTL8367C_IPMC_GROUP_ENTRY5_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY5_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY5_L    0x094b
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY6_H    0x094c
-+#define    RTL8367C_IPMC_GROUP_ENTRY6_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY6_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY6_L    0x094d
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY7_H    0x094e
-+#define    RTL8367C_IPMC_GROUP_ENTRY7_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY7_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY7_L    0x094f
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY8_H    0x0950
-+#define    RTL8367C_IPMC_GROUP_ENTRY8_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY8_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY8_L    0x0951
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY9_H    0x0952
-+#define    RTL8367C_IPMC_GROUP_ENTRY9_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY9_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY9_L    0x0953
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY10_H    0x0954
-+#define    RTL8367C_IPMC_GROUP_ENTRY10_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY10_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY10_L    0x0955
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY11_H    0x0956
-+#define    RTL8367C_IPMC_GROUP_ENTRY11_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY11_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY11_L    0x0957
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY12_H    0x0958
-+#define    RTL8367C_IPMC_GROUP_ENTRY12_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY12_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY12_L    0x0959
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY13_H    0x095a
-+#define    RTL8367C_IPMC_GROUP_ENTRY13_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY13_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY13_L    0x095b
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY14_H    0x095c
-+#define    RTL8367C_IPMC_GROUP_ENTRY14_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY14_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY14_L    0x095d
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY15_H    0x095e
-+#define    RTL8367C_IPMC_GROUP_ENTRY15_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY15_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY15_L    0x095f
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY16_H    0x0960
-+#define    RTL8367C_IPMC_GROUP_ENTRY16_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY16_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY16_L    0x0961
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY17_H    0x0962
-+#define    RTL8367C_IPMC_GROUP_ENTRY17_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY17_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY17_L    0x0963
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY18_H    0x0964
-+#define    RTL8367C_IPMC_GROUP_ENTRY18_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY18_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY18_L    0x0965
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY19_H    0x0966
-+#define    RTL8367C_IPMC_GROUP_ENTRY19_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY19_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY19_L    0x0967
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY20_H    0x0968
-+#define    RTL8367C_IPMC_GROUP_ENTRY20_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY20_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY20_L    0x0969
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY21_H    0x096a
-+#define    RTL8367C_IPMC_GROUP_ENTRY21_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY21_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY21_L    0x096b
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY22_H    0x096c
-+#define    RTL8367C_IPMC_GROUP_ENTRY22_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY22_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY22_L    0x096d
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY23_H    0x096e
-+#define    RTL8367C_IPMC_GROUP_ENTRY23_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY23_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY23_L    0x096f
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY24_H    0x0970
-+#define    RTL8367C_IPMC_GROUP_ENTRY24_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY24_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY24_L    0x0971
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY25_H    0x0972
-+#define    RTL8367C_IPMC_GROUP_ENTRY25_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY25_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY25_L    0x0973
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY26_H    0x0974
-+#define    RTL8367C_IPMC_GROUP_ENTRY26_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY26_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY26_L    0x0975
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY27_H    0x0976
-+#define    RTL8367C_IPMC_GROUP_ENTRY27_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY27_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY27_L    0x0977
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY28_H    0x0978
-+#define    RTL8367C_IPMC_GROUP_ENTRY28_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY28_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY28_L    0x0979
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY29_H    0x097a
-+#define    RTL8367C_IPMC_GROUP_ENTRY29_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY29_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY29_L    0x097b
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY30_H    0x097c
-+#define    RTL8367C_IPMC_GROUP_ENTRY30_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY30_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY30_L    0x097d
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY31_H    0x097e
-+#define    RTL8367C_IPMC_GROUP_ENTRY31_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY31_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY31_L    0x097f
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY32_H    0x0980
-+#define    RTL8367C_IPMC_GROUP_ENTRY32_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY32_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY32_L    0x0981
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY33_H    0x0982
-+#define    RTL8367C_IPMC_GROUP_ENTRY33_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY33_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY33_L    0x0983
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY34_H    0x0984
-+#define    RTL8367C_IPMC_GROUP_ENTRY34_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY34_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY34_L    0x0985
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY35_H    0x0986
-+#define    RTL8367C_IPMC_GROUP_ENTRY35_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY35_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY35_L    0x0987
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY36_H    0x0988
-+#define    RTL8367C_IPMC_GROUP_ENTRY36_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY36_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY36_L    0x0989
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY37_H    0x098a
-+#define    RTL8367C_IPMC_GROUP_ENTRY37_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY37_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY37_L    0x098b
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY38_H    0x098c
-+#define    RTL8367C_IPMC_GROUP_ENTRY38_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY38_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY38_L    0x098d
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY39_H    0x098e
-+#define    RTL8367C_IPMC_GROUP_ENTRY39_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY39_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY39_L    0x098f
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY40_H    0x0990
-+#define    RTL8367C_IPMC_GROUP_ENTRY40_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY40_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY40_L    0x0991
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY41_H    0x0992
-+#define    RTL8367C_IPMC_GROUP_ENTRY41_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY41_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY41_L    0x0993
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY42_H    0x0994
-+#define    RTL8367C_IPMC_GROUP_ENTRY42_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY42_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY42_L    0x0995
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY43_H    0x0996
-+#define    RTL8367C_IPMC_GROUP_ENTRY43_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY43_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY43_L    0x0997
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY44_H    0x0998
-+#define    RTL8367C_IPMC_GROUP_ENTRY44_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY44_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY44_L    0x0999
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY45_H    0x099a
-+#define    RTL8367C_IPMC_GROUP_ENTRY45_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY45_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY45_L    0x099b
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY46_H    0x099c
-+#define    RTL8367C_IPMC_GROUP_ENTRY46_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY46_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY46_L    0x099d
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY47_H    0x099e
-+#define    RTL8367C_IPMC_GROUP_ENTRY47_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY47_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY47_L    0x099f
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY48_H    0x09a0
-+#define    RTL8367C_IPMC_GROUP_ENTRY48_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY48_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY48_L    0x09a1
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY49_H    0x09a2
-+#define    RTL8367C_IPMC_GROUP_ENTRY49_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY49_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY49_L    0x09a3
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY50_H    0x09a4
-+#define    RTL8367C_IPMC_GROUP_ENTRY50_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY50_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY50_L    0x09a5
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY51_H    0x09a6
-+#define    RTL8367C_IPMC_GROUP_ENTRY51_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY51_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY51_L    0x09a7
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY52_H    0x09a8
-+#define    RTL8367C_IPMC_GROUP_ENTRY52_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY52_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY52_L    0x09a9
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY53_H    0x09aa
-+#define    RTL8367C_IPMC_GROUP_ENTRY53_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY53_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY53_L    0x09ab
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY54_H    0x09ac
-+#define    RTL8367C_IPMC_GROUP_ENTRY54_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY54_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY54_L    0x09ad
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY55_H    0x09ae
-+#define    RTL8367C_IPMC_GROUP_ENTRY55_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY55_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY55_L    0x09af
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY56_H    0x09b0
-+#define    RTL8367C_IPMC_GROUP_ENTRY56_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY56_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY56_L    0x09b1
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY57_H    0x09b2
-+#define    RTL8367C_IPMC_GROUP_ENTRY57_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY57_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY57_L    0x09b3
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY58_H    0x09b4
-+#define    RTL8367C_IPMC_GROUP_ENTRY58_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY58_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY58_L    0x09b5
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY59_H    0x09b6
-+#define    RTL8367C_IPMC_GROUP_ENTRY59_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY59_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY59_L    0x09b7
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY60_H    0x09b8
-+#define    RTL8367C_IPMC_GROUP_ENTRY60_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY60_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY60_L    0x09b9
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY61_H    0x09ba
-+#define    RTL8367C_IPMC_GROUP_ENTRY61_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY61_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY61_L    0x09bb
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY62_H    0x09bc
-+#define    RTL8367C_IPMC_GROUP_ENTRY62_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY62_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY62_L    0x09bd
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY63_H    0x09be
-+#define    RTL8367C_IPMC_GROUP_ENTRY63_H_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_ENTRY63_H_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_ENTRY63_L    0x09bf
-+
-+#define    RTL8367C_REG_UNKNOWN_UNICAST_DA_PORT_BEHAVE    0x09C0
-+#define    RTL8367C_Port7_ACTION_OFFSET    14
-+#define    RTL8367C_Port7_ACTION_MASK    0xC000
-+#define    RTL8367C_Port6_ACTION_OFFSET    12
-+#define    RTL8367C_Port6_ACTION_MASK    0x3000
-+#define    RTL8367C_Port5_ACTION_OFFSET    10
-+#define    RTL8367C_Port5_ACTION_MASK    0xC00
-+#define    RTL8367C_Port4_ACTION_OFFSET    8
-+#define    RTL8367C_Port4_ACTION_MASK    0x300
-+#define    RTL8367C_Port3_ACTION_OFFSET    6
-+#define    RTL8367C_Port3_ACTION_MASK    0xC0
-+#define    RTL8367C_Port2_ACTION_OFFSET    4
-+#define    RTL8367C_Port2_ACTION_MASK    0x30
-+#define    RTL8367C_Port1_ACTION_OFFSET    2
-+#define    RTL8367C_Port1_ACTION_MASK    0xC
-+#define    RTL8367C_Port0_ACTION_OFFSET    0
-+#define    RTL8367C_Port0_ACTION_MASK    0x3
-+
-+#define    RTL8367C_REG_MIRROR_CTRL3    0x09C1
-+#define    RTL8367C_MIRROR_ACL_OVERRIDE_EN_OFFSET    2
-+#define    RTL8367C_MIRROR_ACL_OVERRIDE_EN_MASK    0x4
-+#define    RTL8367C_MIRROR_TX_OVERRIDE_EN_OFFSET    1
-+#define    RTL8367C_MIRROR_TX_OVERRIDE_EN_MASK    0x2
-+#define    RTL8367C_MIRROR_RX_OVERRIDE_EN_OFFSET    0
-+#define    RTL8367C_MIRROR_RX_OVERRIDE_EN_MASK    0x1
-+
-+#define    RTL8367C_REG_DPM_DUMMY02    0x09C2
-+
-+#define    RTL8367C_REG_DPM_DUMMY03    0x09C3
-+
-+#define    RTL8367C_REG_DPM_DUMMY04    0x09C4
-+
-+#define    RTL8367C_REG_DPM_DUMMY05    0x09C5
-+
-+#define    RTL8367C_REG_DPM_DUMMY06    0x09C6
-+
-+#define    RTL8367C_REG_DPM_DUMMY07    0x09C7
-+
-+#define    RTL8367C_REG_DPM_DUMMY08    0x09C8
-+
-+#define    RTL8367C_REG_DPM_DUMMY09    0x09C9
-+
-+#define    RTL8367C_REG_DPM_DUMMY10    0x09CA
-+
-+#define    RTL8367C_REG_DPM_DUMMY11    0x09CB
-+
-+#define    RTL8367C_REG_DPM_DUMMY12    0x09CC
-+
-+#define    RTL8367C_REG_DPM_DUMMY13    0x09CD
-+
-+#define    RTL8367C_REG_DPM_DUMMY14    0x09CE
-+
-+#define    RTL8367C_REG_DPM_DUMMY15    0x09CF
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_TRANS_CTRL0    0x09D0
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL0_OFFSET    0
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL0_MASK    0x7FF
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_TRANS_CTRL1    0x09D1
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL1_OFFSET    0
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL1_MASK    0x7FF
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_TRANS_CTRL2    0x09D2
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL2_OFFSET    0
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL2_MASK    0x7FF
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_TRANS_CTRL3    0x09D3
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL3_OFFSET    0
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL3_MASK    0x7FF
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_TRANS_CTRL4    0x09D4
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL4_OFFSET    0
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL4_MASK    0x7FF
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_TRANS_CTRL5    0x09D5
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL5_OFFSET    0
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL5_MASK    0x7FF
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_TRANS_CTRL6    0x09D6
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL6_OFFSET    0
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL6_MASK    0x7FF
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_TRANS_CTRL7    0x09D7
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL7_OFFSET    0
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL7_MASK    0x7FF
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_TRANS_CTRL8    0x09D8
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL8_OFFSET    0
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL8_MASK    0x7FF
-+
-+#define    RTL8367C_REG_VLAN_EGRESS_TRANS_CTRL9    0x09D9
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL9_OFFSET    0
-+#define    RTL8367C_VLAN_EGRESS_TRANS_CTRL9_MASK    0x7FF
-+
-+#define    RTL8367C_REG_MIRROR_CTRL2    0x09DA
-+#define    RTL8367C_MIRROR_REALKEEP_EN_OFFSET    4
-+#define    RTL8367C_MIRROR_REALKEEP_EN_MASK    0x10
-+#define    RTL8367C_MIRROR_RX_ISOLATION_LEAKY_OFFSET    3
-+#define    RTL8367C_MIRROR_RX_ISOLATION_LEAKY_MASK    0x8
-+#define    RTL8367C_MIRROR_TX_ISOLATION_LEAKY_OFFSET    2
-+#define    RTL8367C_MIRROR_TX_ISOLATION_LEAKY_MASK    0x4
-+#define    RTL8367C_MIRROR_RX_VLAN_LEAKY_OFFSET    1
-+#define    RTL8367C_MIRROR_RX_VLAN_LEAKY_MASK    0x2
-+#define    RTL8367C_MIRROR_TX_VLAN_LEAKY_OFFSET    0
-+#define    RTL8367C_MIRROR_TX_VLAN_LEAKY_MASK    0x1
-+
-+#define    RTL8367C_REG_OUTPUT_DROP_CFG    0x09DB
-+#define    RTL8367C_ENABLE_PMASK_EXT_OFFSET    13
-+#define    RTL8367C_ENABLE_PMASK_EXT_MASK    0xE000
-+#define    RTL8367C_ENABLE_BC_OFFSET    12
-+#define    RTL8367C_ENABLE_BC_MASK    0x1000
-+#define    RTL8367C_ENABLE_MC_OFFSET    11
-+#define    RTL8367C_ENABLE_MC_MASK    0x800
-+#define    RTL8367C_ENABLE_UC_OFFSET    10
-+#define    RTL8367C_ENABLE_UC_MASK    0x400
-+#define    RTL8367C_ENABLE_PMASK_OFFSET    0
-+#define    RTL8367C_ENABLE_PMASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_UNKNOWN_UNICAST_DA_PORT_BEHAVE_EXT    0x09DC
-+#define    RTL8367C_PORT10_ACTION_OFFSET    4
-+#define    RTL8367C_PORT10_ACTION_MASK    0x30
-+#define    RTL8367C_PORT9_ACTION_OFFSET    2
-+#define    RTL8367C_PORT9_ACTION_MASK    0xC
-+#define    RTL8367C_PORT8_ACTION_OFFSET    0
-+#define    RTL8367C_PORT8_ACTION_MASK    0x3
-+
-+#define    RTL8367C_REG_RMK_CFG_SEL_CTRL    0x09DF
-+#define    RTL8367C_RMK_1Q_CFG_SEL_OFFSET    2
-+#define    RTL8367C_RMK_1Q_CFG_SEL_MASK    0x4
-+#define    RTL8367C_RMK_DSCP_CFG_SEL_OFFSET    0
-+#define    RTL8367C_RMK_DSCP_CFG_SEL_MASK    0x3
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL0    0x09E0
-+#define    RTL8367C_DSCP1_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP1_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP0_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP0_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL1    0x09E1
-+#define    RTL8367C_DSCP3_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP3_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP2_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP2_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL2    0x09E2
-+#define    RTL8367C_DSCP5_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP5_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP4_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP4_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL3    0x09E3
-+#define    RTL8367C_DSCP7_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP7_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP6_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP6_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL4    0x09E4
-+#define    RTL8367C_DSCP9_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP9_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP8_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP8_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL5    0x09E5
-+#define    RTL8367C_DSCP11_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP11_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP10_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP10_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL6    0x09E6
-+#define    RTL8367C_DSCP13_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP13_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP12_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP12_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL7    0x09E7
-+#define    RTL8367C_DSCP15_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP15_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP14_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP14_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL8    0x09E8
-+#define    RTL8367C_DSCP17_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP17_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP16_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP16_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL9    0x09E9
-+#define    RTL8367C_DSCP19_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP19_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP18_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP18_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL10    0x09EA
-+#define    RTL8367C_DSCP21_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP21_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP20_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP20_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL11    0x09EB
-+#define    RTL8367C_DSCP23_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP23_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP22_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP22_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL12    0x09EC
-+#define    RTL8367C_DSCP25_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP25_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP24_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP24_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL13    0x09ED
-+#define    RTL8367C_DSCP27_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP27_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP26_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP26_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL14    0x09EE
-+#define    RTL8367C_DSCP29_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP29_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP28_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP28_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL15    0x09EF
-+#define    RTL8367C_DSCP31_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP31_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP30_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP30_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL16    0x09F0
-+#define    RTL8367C_DSCP33_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP33_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP32_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP32_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL17    0x09F1
-+#define    RTL8367C_DSCP35_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP35_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP34_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP34_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL18    0x09F2
-+#define    RTL8367C_DSCP37_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP37_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP36_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP36_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL19    0x09F3
-+#define    RTL8367C_DSCP39_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP39_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP38_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP38_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL20    0x09F4
-+#define    RTL8367C_DSCP41_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP41_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP40_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP40_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL21    0x09F5
-+#define    RTL8367C_DSCP43_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP43_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP42_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP42_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL22    0x09F6
-+#define    RTL8367C_DSCP45_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP45_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP44_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP44_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL23    0x09F7
-+#define    RTL8367C_DSCP47_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP47_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP46_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP46_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL24    0x09F8
-+#define    RTL8367C_DSCP49_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP49_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP48_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP48_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL25    0x09F9
-+#define    RTL8367C_DSCP51_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP51_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP50_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP50_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL26    0x09FA
-+#define    RTL8367C_DSCP53_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP53_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP52_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP52_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL27    0x09FB
-+#define    RTL8367C_DSCP55_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP55_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP54_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP54_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL28    0x09FC
-+#define    RTL8367C_DSCP57_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP57_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP56_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP56_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL29    0x09FD
-+#define    RTL8367C_DSCP59_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP59_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP58_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP58_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL30    0x09FE
-+#define    RTL8367C_DSCP61_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP61_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP60_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP60_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_DSCP_CTRL31    0x09FF
-+#define    RTL8367C_DSCP63_DSCP_OFFSET    8
-+#define    RTL8367C_DSCP63_DSCP_MASK    0x3F00
-+#define    RTL8367C_DSCP62_DSCP_OFFSET    0
-+#define    RTL8367C_DSCP62_DSCP_MASK    0x3F
-+
-+/* (16'h0a00)l2_reg */
-+
-+#define    RTL8367C_REG_VLAN_MSTI0_CTRL0    0x0a00
-+#define    RTL8367C_VLAN_MSTI0_CTRL0_PORT7_STATE_OFFSET    14
-+#define    RTL8367C_VLAN_MSTI0_CTRL0_PORT7_STATE_MASK    0xC000
-+#define    RTL8367C_VLAN_MSTI0_CTRL0_PORT6_STATE_OFFSET    12
-+#define    RTL8367C_VLAN_MSTI0_CTRL0_PORT6_STATE_MASK    0x3000
-+#define    RTL8367C_VLAN_MSTI0_CTRL0_PORT5_STATE_OFFSET    10
-+#define    RTL8367C_VLAN_MSTI0_CTRL0_PORT5_STATE_MASK    0xC00
-+#define    RTL8367C_VLAN_MSTI0_CTRL0_PORT4_STATE_OFFSET    8
-+#define    RTL8367C_VLAN_MSTI0_CTRL0_PORT4_STATE_MASK    0x300
-+#define    RTL8367C_VLAN_MSTI0_CTRL0_PORT3_STATE_OFFSET    6
-+#define    RTL8367C_VLAN_MSTI0_CTRL0_PORT3_STATE_MASK    0xC0
-+#define    RTL8367C_VLAN_MSTI0_CTRL0_PORT2_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI0_CTRL0_PORT2_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI0_CTRL0_PORT1_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI0_CTRL0_PORT1_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI0_CTRL0_PORT0_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI0_CTRL0_PORT0_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI0_CTRL1    0x0a01
-+#define    RTL8367C_VLAN_MSTI0_CTRL1_PORT10_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI0_CTRL1_PORT10_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI0_CTRL1_PORT9_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI0_CTRL1_PORT9_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI0_CTRL1_PORT8_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI0_CTRL1_PORT8_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI1_CTRL0    0x0a02
-+#define    RTL8367C_VLAN_MSTI1_CTRL0_PORT7_STATE_OFFSET    14
-+#define    RTL8367C_VLAN_MSTI1_CTRL0_PORT7_STATE_MASK    0xC000
-+#define    RTL8367C_VLAN_MSTI1_CTRL0_PORT6_STATE_OFFSET    12
-+#define    RTL8367C_VLAN_MSTI1_CTRL0_PORT6_STATE_MASK    0x3000
-+#define    RTL8367C_VLAN_MSTI1_CTRL0_PORT5_STATE_OFFSET    10
-+#define    RTL8367C_VLAN_MSTI1_CTRL0_PORT5_STATE_MASK    0xC00
-+#define    RTL8367C_VLAN_MSTI1_CTRL0_PORT4_STATE_OFFSET    8
-+#define    RTL8367C_VLAN_MSTI1_CTRL0_PORT4_STATE_MASK    0x300
-+#define    RTL8367C_VLAN_MSTI1_CTRL0_PORT3_STATE_OFFSET    6
-+#define    RTL8367C_VLAN_MSTI1_CTRL0_PORT3_STATE_MASK    0xC0
-+#define    RTL8367C_VLAN_MSTI1_CTRL0_PORT2_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI1_CTRL0_PORT2_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI1_CTRL0_PORT1_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI1_CTRL0_PORT1_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI1_CTRL0_PORT0_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI1_CTRL0_PORT0_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI1_CTRL1    0x0a03
-+#define    RTL8367C_VLAN_MSTI1_CTRL1_PORT10_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI1_CTRL1_PORT10_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI1_CTRL1_PORT9_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI1_CTRL1_PORT9_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI1_CTRL1_PORT8_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI1_CTRL1_PORT8_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI2_CTRL0    0x0a04
-+#define    RTL8367C_VLAN_MSTI2_CTRL0_PORT7_STATE_OFFSET    14
-+#define    RTL8367C_VLAN_MSTI2_CTRL0_PORT7_STATE_MASK    0xC000
-+#define    RTL8367C_VLAN_MSTI2_CTRL0_PORT6_STATE_OFFSET    12
-+#define    RTL8367C_VLAN_MSTI2_CTRL0_PORT6_STATE_MASK    0x3000
-+#define    RTL8367C_VLAN_MSTI2_CTRL0_PORT5_STATE_OFFSET    10
-+#define    RTL8367C_VLAN_MSTI2_CTRL0_PORT5_STATE_MASK    0xC00
-+#define    RTL8367C_VLAN_MSTI2_CTRL0_PORT4_STATE_OFFSET    8
-+#define    RTL8367C_VLAN_MSTI2_CTRL0_PORT4_STATE_MASK    0x300
-+#define    RTL8367C_VLAN_MSTI2_CTRL0_PORT3_STATE_OFFSET    6
-+#define    RTL8367C_VLAN_MSTI2_CTRL0_PORT3_STATE_MASK    0xC0
-+#define    RTL8367C_VLAN_MSTI2_CTRL0_PORT2_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI2_CTRL0_PORT2_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI2_CTRL0_PORT1_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI2_CTRL0_PORT1_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI2_CTRL0_PORT0_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI2_CTRL0_PORT0_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI2_CTRL1    0x0a05
-+#define    RTL8367C_VLAN_MSTI2_CTRL1_PORT10_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI2_CTRL1_PORT10_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI2_CTRL1_PORT9_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI2_CTRL1_PORT9_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI2_CTRL1_PORT8_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI2_CTRL1_PORT8_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI3_CTRL0    0x0a06
-+#define    RTL8367C_VLAN_MSTI3_CTRL0_PORT7_STATE_OFFSET    14
-+#define    RTL8367C_VLAN_MSTI3_CTRL0_PORT7_STATE_MASK    0xC000
-+#define    RTL8367C_VLAN_MSTI3_CTRL0_PORT6_STATE_OFFSET    12
-+#define    RTL8367C_VLAN_MSTI3_CTRL0_PORT6_STATE_MASK    0x3000
-+#define    RTL8367C_VLAN_MSTI3_CTRL0_PORT5_STATE_OFFSET    10
-+#define    RTL8367C_VLAN_MSTI3_CTRL0_PORT5_STATE_MASK    0xC00
-+#define    RTL8367C_VLAN_MSTI3_CTRL0_PORT4_STATE_OFFSET    8
-+#define    RTL8367C_VLAN_MSTI3_CTRL0_PORT4_STATE_MASK    0x300
-+#define    RTL8367C_VLAN_MSTI3_CTRL0_PORT3_STATE_OFFSET    6
-+#define    RTL8367C_VLAN_MSTI3_CTRL0_PORT3_STATE_MASK    0xC0
-+#define    RTL8367C_VLAN_MSTI3_CTRL0_PORT2_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI3_CTRL0_PORT2_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI3_CTRL0_PORT1_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI3_CTRL0_PORT1_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI3_CTRL0_PORT0_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI3_CTRL0_PORT0_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI3_CTRL1    0x0a07
-+#define    RTL8367C_VLAN_MSTI3_CTRL1_PORT10_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI3_CTRL1_PORT10_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI3_CTRL1_PORT9_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI3_CTRL1_PORT9_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI3_CTRL1_PORT8_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI3_CTRL1_PORT8_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI4_CTRL0    0x0a08
-+#define    RTL8367C_VLAN_MSTI4_CTRL0_PORT7_STATE_OFFSET    14
-+#define    RTL8367C_VLAN_MSTI4_CTRL0_PORT7_STATE_MASK    0xC000
-+#define    RTL8367C_VLAN_MSTI4_CTRL0_PORT6_STATE_OFFSET    12
-+#define    RTL8367C_VLAN_MSTI4_CTRL0_PORT6_STATE_MASK    0x3000
-+#define    RTL8367C_VLAN_MSTI4_CTRL0_PORT5_STATE_OFFSET    10
-+#define    RTL8367C_VLAN_MSTI4_CTRL0_PORT5_STATE_MASK    0xC00
-+#define    RTL8367C_VLAN_MSTI4_CTRL0_PORT4_STATE_OFFSET    8
-+#define    RTL8367C_VLAN_MSTI4_CTRL0_PORT4_STATE_MASK    0x300
-+#define    RTL8367C_VLAN_MSTI4_CTRL0_PORT3_STATE_OFFSET    6
-+#define    RTL8367C_VLAN_MSTI4_CTRL0_PORT3_STATE_MASK    0xC0
-+#define    RTL8367C_VLAN_MSTI4_CTRL0_PORT2_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI4_CTRL0_PORT2_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI4_CTRL0_PORT1_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI4_CTRL0_PORT1_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI4_CTRL0_PORT0_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI4_CTRL0_PORT0_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI4_CTRL1    0x0a09
-+#define    RTL8367C_VLAN_MSTI4_CTRL1_PORT10_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI4_CTRL1_PORT10_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI4_CTRL1_PORT9_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI4_CTRL1_PORT9_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI4_CTRL1_PORT8_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI4_CTRL1_PORT8_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI5_CTRL0    0x0a0a
-+#define    RTL8367C_VLAN_MSTI5_CTRL0_PORT7_STATE_OFFSET    14
-+#define    RTL8367C_VLAN_MSTI5_CTRL0_PORT7_STATE_MASK    0xC000
-+#define    RTL8367C_VLAN_MSTI5_CTRL0_PORT6_STATE_OFFSET    12
-+#define    RTL8367C_VLAN_MSTI5_CTRL0_PORT6_STATE_MASK    0x3000
-+#define    RTL8367C_VLAN_MSTI5_CTRL0_PORT5_STATE_OFFSET    10
-+#define    RTL8367C_VLAN_MSTI5_CTRL0_PORT5_STATE_MASK    0xC00
-+#define    RTL8367C_VLAN_MSTI5_CTRL0_PORT4_STATE_OFFSET    8
-+#define    RTL8367C_VLAN_MSTI5_CTRL0_PORT4_STATE_MASK    0x300
-+#define    RTL8367C_VLAN_MSTI5_CTRL0_PORT3_STATE_OFFSET    6
-+#define    RTL8367C_VLAN_MSTI5_CTRL0_PORT3_STATE_MASK    0xC0
-+#define    RTL8367C_VLAN_MSTI5_CTRL0_PORT2_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI5_CTRL0_PORT2_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI5_CTRL0_PORT1_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI5_CTRL0_PORT1_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI5_CTRL0_PORT0_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI5_CTRL0_PORT0_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI5_CTRL1    0x0a0b
-+#define    RTL8367C_VLAN_MSTI5_CTRL1_PORT10_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI5_CTRL1_PORT10_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI5_CTRL1_PORT9_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI5_CTRL1_PORT9_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI5_CTRL1_PORT8_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI5_CTRL1_PORT8_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI6_CTRL0    0x0a0c
-+#define    RTL8367C_VLAN_MSTI6_CTRL0_PORT7_STATE_OFFSET    14
-+#define    RTL8367C_VLAN_MSTI6_CTRL0_PORT7_STATE_MASK    0xC000
-+#define    RTL8367C_VLAN_MSTI6_CTRL0_PORT6_STATE_OFFSET    12
-+#define    RTL8367C_VLAN_MSTI6_CTRL0_PORT6_STATE_MASK    0x3000
-+#define    RTL8367C_VLAN_MSTI6_CTRL0_PORT5_STATE_OFFSET    10
-+#define    RTL8367C_VLAN_MSTI6_CTRL0_PORT5_STATE_MASK    0xC00
-+#define    RTL8367C_VLAN_MSTI6_CTRL0_PORT4_STATE_OFFSET    8
-+#define    RTL8367C_VLAN_MSTI6_CTRL0_PORT4_STATE_MASK    0x300
-+#define    RTL8367C_VLAN_MSTI6_CTRL0_PORT3_STATE_OFFSET    6
-+#define    RTL8367C_VLAN_MSTI6_CTRL0_PORT3_STATE_MASK    0xC0
-+#define    RTL8367C_VLAN_MSTI6_CTRL0_PORT2_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI6_CTRL0_PORT2_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI6_CTRL0_PORT1_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI6_CTRL0_PORT1_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI6_CTRL0_PORT0_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI6_CTRL0_PORT0_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI6_CTRL1    0x0a0d
-+#define    RTL8367C_VLAN_MSTI6_CTRL1_PORT10_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI6_CTRL1_PORT10_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI6_CTRL1_PORT9_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI6_CTRL1_PORT9_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI6_CTRL1_PORT8_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI6_CTRL1_PORT8_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI7_CTRL0    0x0a0e
-+#define    RTL8367C_VLAN_MSTI7_CTRL0_PORT7_STATE_OFFSET    14
-+#define    RTL8367C_VLAN_MSTI7_CTRL0_PORT7_STATE_MASK    0xC000
-+#define    RTL8367C_VLAN_MSTI7_CTRL0_PORT6_STATE_OFFSET    12
-+#define    RTL8367C_VLAN_MSTI7_CTRL0_PORT6_STATE_MASK    0x3000
-+#define    RTL8367C_VLAN_MSTI7_CTRL0_PORT5_STATE_OFFSET    10
-+#define    RTL8367C_VLAN_MSTI7_CTRL0_PORT5_STATE_MASK    0xC00
-+#define    RTL8367C_VLAN_MSTI7_CTRL0_PORT4_STATE_OFFSET    8
-+#define    RTL8367C_VLAN_MSTI7_CTRL0_PORT4_STATE_MASK    0x300
-+#define    RTL8367C_VLAN_MSTI7_CTRL0_PORT3_STATE_OFFSET    6
-+#define    RTL8367C_VLAN_MSTI7_CTRL0_PORT3_STATE_MASK    0xC0
-+#define    RTL8367C_VLAN_MSTI7_CTRL0_PORT2_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI7_CTRL0_PORT2_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI7_CTRL0_PORT1_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI7_CTRL0_PORT1_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI7_CTRL0_PORT0_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI7_CTRL0_PORT0_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI7_CTRL1    0x0a0f
-+#define    RTL8367C_VLAN_MSTI7_CTRL1_PORT10_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI7_CTRL1_PORT10_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI7_CTRL1_PORT9_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI7_CTRL1_PORT9_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI7_CTRL1_PORT8_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI7_CTRL1_PORT8_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI8_CTRL0    0x0a10
-+#define    RTL8367C_VLAN_MSTI8_CTRL0_PORT7_STATE_OFFSET    14
-+#define    RTL8367C_VLAN_MSTI8_CTRL0_PORT7_STATE_MASK    0xC000
-+#define    RTL8367C_VLAN_MSTI8_CTRL0_PORT6_STATE_OFFSET    12
-+#define    RTL8367C_VLAN_MSTI8_CTRL0_PORT6_STATE_MASK    0x3000
-+#define    RTL8367C_VLAN_MSTI8_CTRL0_PORT5_STATE_OFFSET    10
-+#define    RTL8367C_VLAN_MSTI8_CTRL0_PORT5_STATE_MASK    0xC00
-+#define    RTL8367C_VLAN_MSTI8_CTRL0_PORT4_STATE_OFFSET    8
-+#define    RTL8367C_VLAN_MSTI8_CTRL0_PORT4_STATE_MASK    0x300
-+#define    RTL8367C_VLAN_MSTI8_CTRL0_PORT3_STATE_OFFSET    6
-+#define    RTL8367C_VLAN_MSTI8_CTRL0_PORT3_STATE_MASK    0xC0
-+#define    RTL8367C_VLAN_MSTI8_CTRL0_PORT2_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI8_CTRL0_PORT2_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI8_CTRL0_PORT1_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI8_CTRL0_PORT1_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI8_CTRL0_PORT0_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI8_CTRL0_PORT0_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI8_CTRL1    0x0a11
-+#define    RTL8367C_VLAN_MSTI8_CTRL1_PORT10_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI8_CTRL1_PORT10_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI8_CTRL1_PORT9_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI8_CTRL1_PORT9_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI8_CTRL1_PORT8_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI8_CTRL1_PORT8_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI9_CTRL0    0x0a12
-+#define    RTL8367C_VLAN_MSTI9_CTRL0_PORT7_STATE_OFFSET    14
-+#define    RTL8367C_VLAN_MSTI9_CTRL0_PORT7_STATE_MASK    0xC000
-+#define    RTL8367C_VLAN_MSTI9_CTRL0_PORT6_STATE_OFFSET    12
-+#define    RTL8367C_VLAN_MSTI9_CTRL0_PORT6_STATE_MASK    0x3000
-+#define    RTL8367C_VLAN_MSTI9_CTRL0_PORT5_STATE_OFFSET    10
-+#define    RTL8367C_VLAN_MSTI9_CTRL0_PORT5_STATE_MASK    0xC00
-+#define    RTL8367C_VLAN_MSTI9_CTRL0_PORT4_STATE_OFFSET    8
-+#define    RTL8367C_VLAN_MSTI9_CTRL0_PORT4_STATE_MASK    0x300
-+#define    RTL8367C_VLAN_MSTI9_CTRL0_PORT3_STATE_OFFSET    6
-+#define    RTL8367C_VLAN_MSTI9_CTRL0_PORT3_STATE_MASK    0xC0
-+#define    RTL8367C_VLAN_MSTI9_CTRL0_PORT2_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI9_CTRL0_PORT2_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI9_CTRL0_PORT1_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI9_CTRL0_PORT1_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI9_CTRL0_PORT0_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI9_CTRL0_PORT0_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI9_CTRL1    0x0a13
-+#define    RTL8367C_VLAN_MSTI9_CTRL1_PORT10_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI9_CTRL1_PORT10_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI9_CTRL1_PORT9_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI9_CTRL1_PORT9_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI9_CTRL1_PORT8_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI9_CTRL1_PORT8_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI10_CTRL0    0x0a14
-+#define    RTL8367C_VLAN_MSTI10_CTRL0_PORT7_STATE_OFFSET    14
-+#define    RTL8367C_VLAN_MSTI10_CTRL0_PORT7_STATE_MASK    0xC000
-+#define    RTL8367C_VLAN_MSTI10_CTRL0_PORT6_STATE_OFFSET    12
-+#define    RTL8367C_VLAN_MSTI10_CTRL0_PORT6_STATE_MASK    0x3000
-+#define    RTL8367C_VLAN_MSTI10_CTRL0_PORT5_STATE_OFFSET    10
-+#define    RTL8367C_VLAN_MSTI10_CTRL0_PORT5_STATE_MASK    0xC00
-+#define    RTL8367C_VLAN_MSTI10_CTRL0_PORT4_STATE_OFFSET    8
-+#define    RTL8367C_VLAN_MSTI10_CTRL0_PORT4_STATE_MASK    0x300
-+#define    RTL8367C_VLAN_MSTI10_CTRL0_PORT3_STATE_OFFSET    6
-+#define    RTL8367C_VLAN_MSTI10_CTRL0_PORT3_STATE_MASK    0xC0
-+#define    RTL8367C_VLAN_MSTI10_CTRL0_PORT2_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI10_CTRL0_PORT2_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI10_CTRL0_PORT1_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI10_CTRL0_PORT1_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI10_CTRL0_PORT0_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI10_CTRL0_PORT0_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI10_CTRL1    0x0a15
-+#define    RTL8367C_VLAN_MSTI10_CTRL1_PORT10_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI10_CTRL1_PORT10_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI10_CTRL1_PORT9_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI10_CTRL1_PORT9_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI10_CTRL1_PORT8_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI10_CTRL1_PORT8_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI11_CTRL0    0x0a16
-+#define    RTL8367C_VLAN_MSTI11_CTRL0_PORT7_STATE_OFFSET    14
-+#define    RTL8367C_VLAN_MSTI11_CTRL0_PORT7_STATE_MASK    0xC000
-+#define    RTL8367C_VLAN_MSTI11_CTRL0_PORT6_STATE_OFFSET    12
-+#define    RTL8367C_VLAN_MSTI11_CTRL0_PORT6_STATE_MASK    0x3000
-+#define    RTL8367C_VLAN_MSTI11_CTRL0_PORT5_STATE_OFFSET    10
-+#define    RTL8367C_VLAN_MSTI11_CTRL0_PORT5_STATE_MASK    0xC00
-+#define    RTL8367C_VLAN_MSTI11_CTRL0_PORT4_STATE_OFFSET    8
-+#define    RTL8367C_VLAN_MSTI11_CTRL0_PORT4_STATE_MASK    0x300
-+#define    RTL8367C_VLAN_MSTI11_CTRL0_PORT3_STATE_OFFSET    6
-+#define    RTL8367C_VLAN_MSTI11_CTRL0_PORT3_STATE_MASK    0xC0
-+#define    RTL8367C_VLAN_MSTI11_CTRL0_PORT2_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI11_CTRL0_PORT2_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI11_CTRL0_PORT1_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI11_CTRL0_PORT1_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI11_CTRL0_PORT0_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI11_CTRL0_PORT0_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI11_CTRL1    0x0a17
-+#define    RTL8367C_VLAN_MSTI11_CTRL1_PORT10_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI11_CTRL1_PORT10_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI11_CTRL1_PORT9_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI11_CTRL1_PORT9_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI11_CTRL1_PORT8_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI11_CTRL1_PORT8_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI12_CTRL0    0x0a18
-+#define    RTL8367C_VLAN_MSTI12_CTRL0_PORT7_STATE_OFFSET    14
-+#define    RTL8367C_VLAN_MSTI12_CTRL0_PORT7_STATE_MASK    0xC000
-+#define    RTL8367C_VLAN_MSTI12_CTRL0_PORT6_STATE_OFFSET    12
-+#define    RTL8367C_VLAN_MSTI12_CTRL0_PORT6_STATE_MASK    0x3000
-+#define    RTL8367C_VLAN_MSTI12_CTRL0_PORT5_STATE_OFFSET    10
-+#define    RTL8367C_VLAN_MSTI12_CTRL0_PORT5_STATE_MASK    0xC00
-+#define    RTL8367C_VLAN_MSTI12_CTRL0_PORT4_STATE_OFFSET    8
-+#define    RTL8367C_VLAN_MSTI12_CTRL0_PORT4_STATE_MASK    0x300
-+#define    RTL8367C_VLAN_MSTI12_CTRL0_PORT3_STATE_OFFSET    6
-+#define    RTL8367C_VLAN_MSTI12_CTRL0_PORT3_STATE_MASK    0xC0
-+#define    RTL8367C_VLAN_MSTI12_CTRL0_PORT2_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI12_CTRL0_PORT2_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI12_CTRL0_PORT1_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI12_CTRL0_PORT1_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI12_CTRL0_PORT0_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI12_CTRL0_PORT0_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI12_CTRL1    0x0a19
-+#define    RTL8367C_VLAN_MSTI12_CTRL1_PORT10_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI12_CTRL1_PORT10_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI12_CTRL1_PORT9_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI12_CTRL1_PORT9_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI12_CTRL1_PORT8_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI12_CTRL1_PORT8_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI13_CTRL0    0x0a1a
-+#define    RTL8367C_VLAN_MSTI13_CTRL0_PORT7_STATE_OFFSET    14
-+#define    RTL8367C_VLAN_MSTI13_CTRL0_PORT7_STATE_MASK    0xC000
-+#define    RTL8367C_VLAN_MSTI13_CTRL0_PORT6_STATE_OFFSET    12
-+#define    RTL8367C_VLAN_MSTI13_CTRL0_PORT6_STATE_MASK    0x3000
-+#define    RTL8367C_VLAN_MSTI13_CTRL0_PORT5_STATE_OFFSET    10
-+#define    RTL8367C_VLAN_MSTI13_CTRL0_PORT5_STATE_MASK    0xC00
-+#define    RTL8367C_VLAN_MSTI13_CTRL0_PORT4_STATE_OFFSET    8
-+#define    RTL8367C_VLAN_MSTI13_CTRL0_PORT4_STATE_MASK    0x300
-+#define    RTL8367C_VLAN_MSTI13_CTRL0_PORT3_STATE_OFFSET    6
-+#define    RTL8367C_VLAN_MSTI13_CTRL0_PORT3_STATE_MASK    0xC0
-+#define    RTL8367C_VLAN_MSTI13_CTRL0_PORT2_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI13_CTRL0_PORT2_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI13_CTRL0_PORT1_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI13_CTRL0_PORT1_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI13_CTRL0_PORT0_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI13_CTRL0_PORT0_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI13_CTRL1    0x0a1b
-+#define    RTL8367C_VLAN_MSTI13_CTRL1_PORT10_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI13_CTRL1_PORT10_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI13_CTRL1_PORT9_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI13_CTRL1_PORT9_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI13_CTRL1_PORT8_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI13_CTRL1_PORT8_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI14_CTRL0    0x0a1c
-+#define    RTL8367C_VLAN_MSTI14_CTRL0_PORT7_STATE_OFFSET    14
-+#define    RTL8367C_VLAN_MSTI14_CTRL0_PORT7_STATE_MASK    0xC000
-+#define    RTL8367C_VLAN_MSTI14_CTRL0_PORT6_STATE_OFFSET    12
-+#define    RTL8367C_VLAN_MSTI14_CTRL0_PORT6_STATE_MASK    0x3000
-+#define    RTL8367C_VLAN_MSTI14_CTRL0_PORT5_STATE_OFFSET    10
-+#define    RTL8367C_VLAN_MSTI14_CTRL0_PORT5_STATE_MASK    0xC00
-+#define    RTL8367C_VLAN_MSTI14_CTRL0_PORT4_STATE_OFFSET    8
-+#define    RTL8367C_VLAN_MSTI14_CTRL0_PORT4_STATE_MASK    0x300
-+#define    RTL8367C_VLAN_MSTI14_CTRL0_PORT3_STATE_OFFSET    6
-+#define    RTL8367C_VLAN_MSTI14_CTRL0_PORT3_STATE_MASK    0xC0
-+#define    RTL8367C_VLAN_MSTI14_CTRL0_PORT2_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI14_CTRL0_PORT2_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI14_CTRL0_PORT1_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI14_CTRL0_PORT1_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI14_CTRL0_PORT0_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI14_CTRL0_PORT0_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI14_CTRL1    0x0a1d
-+#define    RTL8367C_VLAN_MSTI14_CTRL1_PORT10_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI14_CTRL1_PORT10_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI14_CTRL1_PORT9_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI14_CTRL1_PORT9_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI14_CTRL1_PORT8_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI14_CTRL1_PORT8_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI15_CTRL0    0x0a1e
-+#define    RTL8367C_VLAN_MSTI15_CTRL0_PORT7_STATE_OFFSET    14
-+#define    RTL8367C_VLAN_MSTI15_CTRL0_PORT7_STATE_MASK    0xC000
-+#define    RTL8367C_VLAN_MSTI15_CTRL0_PORT6_STATE_OFFSET    12
-+#define    RTL8367C_VLAN_MSTI15_CTRL0_PORT6_STATE_MASK    0x3000
-+#define    RTL8367C_VLAN_MSTI15_CTRL0_PORT5_STATE_OFFSET    10
-+#define    RTL8367C_VLAN_MSTI15_CTRL0_PORT5_STATE_MASK    0xC00
-+#define    RTL8367C_VLAN_MSTI15_CTRL0_PORT4_STATE_OFFSET    8
-+#define    RTL8367C_VLAN_MSTI15_CTRL0_PORT4_STATE_MASK    0x300
-+#define    RTL8367C_VLAN_MSTI15_CTRL0_PORT3_STATE_OFFSET    6
-+#define    RTL8367C_VLAN_MSTI15_CTRL0_PORT3_STATE_MASK    0xC0
-+#define    RTL8367C_VLAN_MSTI15_CTRL0_PORT2_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI15_CTRL0_PORT2_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI15_CTRL0_PORT1_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI15_CTRL0_PORT1_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI15_CTRL0_PORT0_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI15_CTRL0_PORT0_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_VLAN_MSTI15_CTRL1    0x0a1f
-+#define    RTL8367C_VLAN_MSTI15_CTRL1_PORT10_STATE_OFFSET    4
-+#define    RTL8367C_VLAN_MSTI15_CTRL1_PORT10_STATE_MASK    0x30
-+#define    RTL8367C_VLAN_MSTI15_CTRL1_PORT9_STATE_OFFSET    2
-+#define    RTL8367C_VLAN_MSTI15_CTRL1_PORT9_STATE_MASK    0xC
-+#define    RTL8367C_VLAN_MSTI15_CTRL1_PORT8_STATE_OFFSET    0
-+#define    RTL8367C_VLAN_MSTI15_CTRL1_PORT8_STATE_MASK    0x3
-+
-+#define    RTL8367C_REG_LUT_PORT0_LEARN_LIMITNO    0x0a20
-+#define    RTL8367C_LUT_PORT0_LEARN_LIMITNO_OFFSET    0
-+#define    RTL8367C_LUT_PORT0_LEARN_LIMITNO_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_LUT_PORT1_LEARN_LIMITNO    0x0a21
-+#define    RTL8367C_LUT_PORT1_LEARN_LIMITNO_OFFSET    0
-+#define    RTL8367C_LUT_PORT1_LEARN_LIMITNO_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_LUT_PORT2_LEARN_LIMITNO    0x0a22
-+#define    RTL8367C_LUT_PORT2_LEARN_LIMITNO_OFFSET    0
-+#define    RTL8367C_LUT_PORT2_LEARN_LIMITNO_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_LUT_PORT3_LEARN_LIMITNO    0x0a23
-+#define    RTL8367C_LUT_PORT3_LEARN_LIMITNO_OFFSET    0
-+#define    RTL8367C_LUT_PORT3_LEARN_LIMITNO_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_LUT_PORT4_LEARN_LIMITNO    0x0a24
-+#define    RTL8367C_LUT_PORT4_LEARN_LIMITNO_OFFSET    0
-+#define    RTL8367C_LUT_PORT4_LEARN_LIMITNO_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_LUT_PORT5_LEARN_LIMITNO    0x0a25
-+#define    RTL8367C_LUT_PORT5_LEARN_LIMITNO_OFFSET    0
-+#define    RTL8367C_LUT_PORT5_LEARN_LIMITNO_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_LUT_PORT6_LEARN_LIMITNO    0x0a26
-+#define    RTL8367C_LUT_PORT6_LEARN_LIMITNO_OFFSET    0
-+#define    RTL8367C_LUT_PORT6_LEARN_LIMITNO_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_LUT_PORT7_LEARN_LIMITNO    0x0a27
-+#define    RTL8367C_LUT_PORT7_LEARN_LIMITNO_OFFSET    0
-+#define    RTL8367C_LUT_PORT7_LEARN_LIMITNO_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_LUT_SYS_LEARN_LIMITNO    0x0a28
-+#define    RTL8367C_LUT_SYS_LEARN_LIMITNO_OFFSET    0
-+#define    RTL8367C_LUT_SYS_LEARN_LIMITNO_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_LUT_LRN_SYS_LMT_CTRL    0x0a29
-+#define    RTL8367C_LUT_SYSTEM_LEARN_PMASK1_OFFSET    12
-+#define    RTL8367C_LUT_SYSTEM_LEARN_PMASK1_MASK    0x7000
-+#define    RTL8367C_LUT_SYSTEM_LEARN_OVER_ACT_OFFSET    10
-+#define    RTL8367C_LUT_SYSTEM_LEARN_OVER_ACT_MASK    0xC00
-+#define    RTL8367C_LUT_SYSTEM_LEARN_PMASK_OFFSET    0
-+#define    RTL8367C_LUT_SYSTEM_LEARN_PMASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_LUT_PORT8_LEARN_LIMITNO    0x0a2a
-+#define    RTL8367C_LUT_PORT8_LEARN_LIMITNO_OFFSET    0
-+#define    RTL8367C_LUT_PORT8_LEARN_LIMITNO_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_LUT_PORT9_LEARN_LIMITNO    0x0a2b
-+#define    RTL8367C_LUT_PORT9_LEARN_LIMITNO_OFFSET    0
-+#define    RTL8367C_LUT_PORT9_LEARN_LIMITNO_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_LUT_PORT10_LEARN_LIMITNO    0x0a2c
-+#define    RTL8367C_LUT_PORT10_LEARN_LIMITNO_OFFSET    0
-+#define    RTL8367C_LUT_PORT10_LEARN_LIMITNO_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_LUT_CFG    0x0a30
-+#define    RTL8367C_AGE_SPEED_OFFSET    8
-+#define    RTL8367C_AGE_SPEED_MASK    0x300
-+#define    RTL8367C_BCAM_DISABLE_OFFSET    6
-+#define    RTL8367C_BCAM_DISABLE_MASK    0x40
-+#define    RTL8367C_LINKDOWN_AGEOUT_OFFSET    5
-+#define    RTL8367C_LINKDOWN_AGEOUT_MASK    0x20
-+#define    RTL8367C_LUT_IPMC_HASH_OFFSET    4
-+#define    RTL8367C_LUT_IPMC_HASH_MASK    0x10
-+#define    RTL8367C_LUT_IPMC_LOOKUP_OP_OFFSET    3
-+#define    RTL8367C_LUT_IPMC_LOOKUP_OP_MASK    0x8
-+#define    RTL8367C_AGE_TIMER_OFFSET    0
-+#define    RTL8367C_AGE_TIMER_MASK    0x7
-+
-+#define    RTL8367C_REG_LUT_AGEOUT_CTRL    0x0a31
-+#define    RTL8367C_LUT_AGEOUT_CTRL_OFFSET    0
-+#define    RTL8367C_LUT_AGEOUT_CTRL_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_EFID_CTRL0    0x0a32
-+#define    RTL8367C_PORT3_EFID_OFFSET    12
-+#define    RTL8367C_PORT3_EFID_MASK    0x7000
-+#define    RTL8367C_PORT2_EFID_OFFSET    8
-+#define    RTL8367C_PORT2_EFID_MASK    0x700
-+#define    RTL8367C_PORT1_EFID_OFFSET    4
-+#define    RTL8367C_PORT1_EFID_MASK    0x70
-+#define    RTL8367C_PORT0_EFID_OFFSET    0
-+#define    RTL8367C_PORT0_EFID_MASK    0x7
-+
-+#define    RTL8367C_REG_PORT_EFID_CTRL1    0x0a33
-+#define    RTL8367C_PORT7_EFID_OFFSET    12
-+#define    RTL8367C_PORT7_EFID_MASK    0x7000
-+#define    RTL8367C_PORT6_EFID_OFFSET    8
-+#define    RTL8367C_PORT6_EFID_MASK    0x700
-+#define    RTL8367C_PORT5_EFID_OFFSET    4
-+#define    RTL8367C_PORT5_EFID_MASK    0x70
-+#define    RTL8367C_PORT4_EFID_OFFSET    0
-+#define    RTL8367C_PORT4_EFID_MASK    0x7
-+
-+#define    RTL8367C_REG_PORT_EFID_CTRL2    0x0a34
-+#define    RTL8367C_PORT10_EFID_OFFSET    8
-+#define    RTL8367C_PORT10_EFID_MASK    0x700
-+#define    RTL8367C_PORT9_EFID_OFFSET    4
-+#define    RTL8367C_PORT9_EFID_MASK    0x70
-+#define    RTL8367C_PORT8_EFID_OFFSET    0
-+#define    RTL8367C_PORT8_EFID_MASK    0x7
-+
-+#define    RTL8367C_REG_FORCE_FLUSH1    0x0a35
-+#define    RTL8367C_BUSY_STATUS1_OFFSET    3
-+#define    RTL8367C_BUSY_STATUS1_MASK    0x38
-+#define    RTL8367C_PORTMASK1_OFFSET    0
-+#define    RTL8367C_PORTMASK1_MASK    0x7
-+
-+#define    RTL8367C_REG_FORCE_FLUSH    0x0a36
-+#define    RTL8367C_BUSY_STATUS_OFFSET    8
-+#define    RTL8367C_BUSY_STATUS_MASK    0xFF00
-+#define    RTL8367C_FORCE_FLUSH_PORTMASK_OFFSET    0
-+#define    RTL8367C_FORCE_FLUSH_PORTMASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_L2_FLUSH_CTRL1    0x0a37
-+#define    RTL8367C_LUT_FLUSH_FID_OFFSET    12
-+#define    RTL8367C_LUT_FLUSH_FID_MASK    0xF000
-+#define    RTL8367C_LUT_FLUSH_VID_OFFSET    0
-+#define    RTL8367C_LUT_FLUSH_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_L2_FLUSH_CTRL2    0x0a38
-+#define    RTL8367C_LUT_FLUSH_TYPE_OFFSET    2
-+#define    RTL8367C_LUT_FLUSH_TYPE_MASK    0x4
-+#define    RTL8367C_LUT_FLUSH_MODE_OFFSET    0
-+#define    RTL8367C_LUT_FLUSH_MODE_MASK    0x3
-+
-+#define    RTL8367C_REG_L2_FLUSH_CTRL3    0x0a39
-+#define    RTL8367C_L2_FLUSH_CTRL3_OFFSET    0
-+#define    RTL8367C_L2_FLUSH_CTRL3_MASK    0x1
-+
-+#define    RTL8367C_REG_LUT_CFG2    0x0a3a
-+#define    RTL8367C_LUT_IPMC_FWD_RPORT_OFFSET    1
-+#define    RTL8367C_LUT_IPMC_FWD_RPORT_MASK    0x2
-+#define    RTL8367C_LUT_IPMC_VID_HASH_OFFSET    0
-+#define    RTL8367C_LUT_IPMC_VID_HASH_MASK    0x1
-+
-+#define    RTL8367C_REG_FLUSH_STATUS    0x0a3f
-+#define    RTL8367C_FLUSH_STATUS_OFFSET    0
-+#define    RTL8367C_FLUSH_STATUS_MASK    0x1
-+
-+#define    RTL8367C_REG_STORM_BCAST    0x0a40
-+#define    RTL8367C_STORM_BCAST_OFFSET    0
-+#define    RTL8367C_STORM_BCAST_MASK    0x7FF
-+
-+#define    RTL8367C_REG_STORM_MCAST    0x0a41
-+#define    RTL8367C_STORM_MCAST_OFFSET    0
-+#define    RTL8367C_STORM_MCAST_MASK    0x7FF
-+
-+#define    RTL8367C_REG_STORM_UNKOWN_UCAST    0x0a42
-+#define    RTL8367C_STORM_UNKOWN_UCAST_OFFSET    0
-+#define    RTL8367C_STORM_UNKOWN_UCAST_MASK    0x7FF
-+
-+#define    RTL8367C_REG_STORM_UNKOWN_MCAST    0x0a43
-+#define    RTL8367C_STORM_UNKOWN_MCAST_OFFSET    0
-+#define    RTL8367C_STORM_UNKOWN_MCAST_MASK    0x7FF
-+
-+#define    RTL8367C_REG_STORM_BCAST_METER_CTRL0    0x0a44
-+#define    RTL8367C_STORM_BCAST_METER_CTRL0_PORT1_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_BCAST_METER_CTRL0_PORT1_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_BCAST_METER_CTRL0_PORT0_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_BCAST_METER_CTRL0_PORT0_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_BCAST_METER_CTRL1    0x0a45
-+#define    RTL8367C_STORM_BCAST_METER_CTRL1_PORT3_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_BCAST_METER_CTRL1_PORT3_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_BCAST_METER_CTRL1_PORT2_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_BCAST_METER_CTRL1_PORT2_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_BCAST_METER_CTRL2    0x0a46
-+#define    RTL8367C_STORM_BCAST_METER_CTRL2_PORT5_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_BCAST_METER_CTRL2_PORT5_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_BCAST_METER_CTRL2_PORT4_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_BCAST_METER_CTRL2_PORT4_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_BCAST_METER_CTRL3    0x0a47
-+#define    RTL8367C_STORM_BCAST_METER_CTRL3_PORT7_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_BCAST_METER_CTRL3_PORT7_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_BCAST_METER_CTRL3_PORT6_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_BCAST_METER_CTRL3_PORT6_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_BCAST_METER_CTRL4    0x0a48
-+#define    RTL8367C_STORM_BCAST_METER_CTRL4_PORT9_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_BCAST_METER_CTRL4_PORT9_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_BCAST_METER_CTRL4_PORT8_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_BCAST_METER_CTRL4_PORT8_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_BCAST_METER_CTRL5    0x0a49
-+#define    RTL8367C_STORM_BCAST_METER_CTRL5_OFFSET    0
-+#define    RTL8367C_STORM_BCAST_METER_CTRL5_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_MCAST_METER_CTRL0    0x0a4c
-+#define    RTL8367C_STORM_MCAST_METER_CTRL0_PORT1_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_MCAST_METER_CTRL0_PORT1_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_MCAST_METER_CTRL0_PORT0_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_MCAST_METER_CTRL0_PORT0_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_MCAST_METER_CTRL1    0x0a4d
-+#define    RTL8367C_STORM_MCAST_METER_CTRL1_PORT3_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_MCAST_METER_CTRL1_PORT3_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_MCAST_METER_CTRL1_PORT2_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_MCAST_METER_CTRL1_PORT2_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_MCAST_METER_CTRL2    0x0a4e
-+#define    RTL8367C_STORM_MCAST_METER_CTRL2_PORT5_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_MCAST_METER_CTRL2_PORT5_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_MCAST_METER_CTRL2_PORT4_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_MCAST_METER_CTRL2_PORT4_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_MCAST_METER_CTRL3    0x0a4f
-+#define    RTL8367C_STORM_MCAST_METER_CTRL3_PORT7_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_MCAST_METER_CTRL3_PORT7_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_MCAST_METER_CTRL3_PORT6_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_MCAST_METER_CTRL3_PORT6_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_MCAST_METER_CTRL4    0x0a50
-+#define    RTL8367C_STORM_MCAST_METER_CTRL4_PORT9_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_MCAST_METER_CTRL4_PORT9_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_MCAST_METER_CTRL4_PORT8_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_MCAST_METER_CTRL4_PORT8_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_MCAST_METER_CTRL5    0x0a51
-+#define    RTL8367C_STORM_MCAST_METER_CTRL5_OFFSET    0
-+#define    RTL8367C_STORM_MCAST_METER_CTRL5_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_UNDA_METER_CTRL0    0x0a54
-+#define    RTL8367C_STORM_UNDA_METER_CTRL0_PORT1_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_UNDA_METER_CTRL0_PORT1_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_UNDA_METER_CTRL0_PORT0_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_UNDA_METER_CTRL0_PORT0_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_UNDA_METER_CTRL1    0x0a55
-+#define    RTL8367C_STORM_UNDA_METER_CTRL1_PORT3_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_UNDA_METER_CTRL1_PORT3_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_UNDA_METER_CTRL1_PORT2_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_UNDA_METER_CTRL1_PORT2_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_UNDA_METER_CTRL2    0x0a56
-+#define    RTL8367C_STORM_UNDA_METER_CTRL2_PORT5_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_UNDA_METER_CTRL2_PORT5_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_UNDA_METER_CTRL2_PORT4_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_UNDA_METER_CTRL2_PORT4_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_UNDA_METER_CTRL3    0x0a57
-+#define    RTL8367C_STORM_UNDA_METER_CTRL3_PORT7_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_UNDA_METER_CTRL3_PORT7_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_UNDA_METER_CTRL3_PORT6_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_UNDA_METER_CTRL3_PORT6_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_UNDA_METER_CTRL4    0x0a58
-+#define    RTL8367C_STORM_UNDA_METER_CTRL4_PORT9_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_UNDA_METER_CTRL4_PORT9_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_UNDA_METER_CTRL4_PORT8_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_UNDA_METER_CTRL4_PORT8_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_UNDA_METER_CTRL5    0x0a59
-+#define    RTL8367C_STORM_UNDA_METER_CTRL5_OFFSET    0
-+#define    RTL8367C_STORM_UNDA_METER_CTRL5_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_UNMC_METER_CTRL0    0x0a5c
-+#define    RTL8367C_STORM_UNMC_METER_CTRL0_PORT1_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_UNMC_METER_CTRL0_PORT1_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_UNMC_METER_CTRL0_PORT0_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_UNMC_METER_CTRL0_PORT0_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_UNMC_METER_CTRL1    0x0a5d
-+#define    RTL8367C_STORM_UNMC_METER_CTRL1_PORT3_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_UNMC_METER_CTRL1_PORT3_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_UNMC_METER_CTRL1_PORT2_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_UNMC_METER_CTRL1_PORT2_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_UNMC_METER_CTRL2    0x0a5e
-+#define    RTL8367C_STORM_UNMC_METER_CTRL2_PORT5_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_UNMC_METER_CTRL2_PORT5_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_UNMC_METER_CTRL2_PORT4_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_UNMC_METER_CTRL2_PORT4_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_UNMC_METER_CTRL3    0x0a5f
-+#define    RTL8367C_STORM_UNMC_METER_CTRL3_PORT7_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_UNMC_METER_CTRL3_PORT7_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_UNMC_METER_CTRL3_PORT6_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_UNMC_METER_CTRL3_PORT6_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_EXT_CFG    0x0a60
-+#define    RTL8367C_STORM_EXT_EN_PORTMASK_EXT_OFFSET    14
-+#define    RTL8367C_STORM_EXT_EN_PORTMASK_EXT_MASK    0x4000
-+#define    RTL8367C_STORM_UNKNOWN_MCAST_EXT_EN_OFFSET    13
-+#define    RTL8367C_STORM_UNKNOWN_MCAST_EXT_EN_MASK    0x2000
-+#define    RTL8367C_STORM_UNKNOWN_UCAST_EXT_EN_OFFSET    12
-+#define    RTL8367C_STORM_UNKNOWN_UCAST_EXT_EN_MASK    0x1000
-+#define    RTL8367C_STORM_MCAST_EXT_EN_OFFSET    11
-+#define    RTL8367C_STORM_MCAST_EXT_EN_MASK    0x800
-+#define    RTL8367C_STORM_BCAST_EXT_EN_OFFSET    10
-+#define    RTL8367C_STORM_BCAST_EXT_EN_MASK    0x400
-+#define    RTL8367C_STORM_EXT_EN_PORTMASK_OFFSET    0
-+#define    RTL8367C_STORM_EXT_EN_PORTMASK_MASK    0x3FF
-+
-+#define    RTL8367C_REG_STORM_EXT_MTRIDX_CFG0    0x0a61
-+#define    RTL8367C_MC_STORM_EXT_METERIDX_OFFSET    8
-+#define    RTL8367C_MC_STORM_EXT_METERIDX_MASK    0x3F00
-+#define    RTL8367C_BC_STORM_EXT_METERIDX_OFFSET    0
-+#define    RTL8367C_BC_STORM_EXT_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_EXT_MTRIDX_CFG1    0x0a62
-+#define    RTL8367C_UNMC_STORM_EXT_METERIDX_OFFSET    8
-+#define    RTL8367C_UNMC_STORM_EXT_METERIDX_MASK    0x3F00
-+#define    RTL8367C_UNUC_STORM_EXT_METERIDX_OFFSET    0
-+#define    RTL8367C_UNUC_STORM_EXT_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_UNMC_METER_CTRL4    0x0a63
-+#define    RTL8367C_STORM_UNMC_METER_CTRL4_PORT9_METERIDX_OFFSET    8
-+#define    RTL8367C_STORM_UNMC_METER_CTRL4_PORT9_METERIDX_MASK    0x3F00
-+#define    RTL8367C_STORM_UNMC_METER_CTRL4_PORT8_METERIDX_OFFSET    0
-+#define    RTL8367C_STORM_UNMC_METER_CTRL4_PORT8_METERIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_STORM_UNMC_METER_CTRL5    0x0a64
-+#define    RTL8367C_STORM_UNMC_METER_CTRL5_OFFSET    0
-+#define    RTL8367C_STORM_UNMC_METER_CTRL5_MASK    0x3F
-+
-+#define    RTL8367C_REG_OAM_PARSER_CTRL0    0x0a70
-+#define    RTL8367C_PORT7_PARACT_OFFSET    14
-+#define    RTL8367C_PORT7_PARACT_MASK    0xC000
-+#define    RTL8367C_PORT6_PARACT_OFFSET    12
-+#define    RTL8367C_PORT6_PARACT_MASK    0x3000
-+#define    RTL8367C_PORT5_PARACT_OFFSET    10
-+#define    RTL8367C_PORT5_PARACT_MASK    0xC00
-+#define    RTL8367C_PORT4_PARACT_OFFSET    8
-+#define    RTL8367C_PORT4_PARACT_MASK    0x300
-+#define    RTL8367C_PORT3_PARACT_OFFSET    6
-+#define    RTL8367C_PORT3_PARACT_MASK    0xC0
-+#define    RTL8367C_PORT2_PARACT_OFFSET    4
-+#define    RTL8367C_PORT2_PARACT_MASK    0x30
-+#define    RTL8367C_PORT1_PARACT_OFFSET    2
-+#define    RTL8367C_PORT1_PARACT_MASK    0xC
-+#define    RTL8367C_PORT0_PARACT_OFFSET    0
-+#define    RTL8367C_PORT0_PARACT_MASK    0x3
-+
-+#define    RTL8367C_REG_OAM_PARSER_CTRL1    0x0a71
-+#define    RTL8367C_PORT10_PARACT_OFFSET    4
-+#define    RTL8367C_PORT10_PARACT_MASK    0x30
-+#define    RTL8367C_PORT9_PARACT_OFFSET    2
-+#define    RTL8367C_PORT9_PARACT_MASK    0xC
-+#define    RTL8367C_PORT8_PARACT_OFFSET    0
-+#define    RTL8367C_PORT8_PARACT_MASK    0x3
-+
-+#define    RTL8367C_REG_OAM_MULTIPLEXER_CTRL0    0x0a72
-+#define    RTL8367C_PORT7_MULACT_OFFSET    14
-+#define    RTL8367C_PORT7_MULACT_MASK    0xC000
-+#define    RTL8367C_PORT6_MULACT_OFFSET    12
-+#define    RTL8367C_PORT6_MULACT_MASK    0x3000
-+#define    RTL8367C_PORT5_MULACT_OFFSET    10
-+#define    RTL8367C_PORT5_MULACT_MASK    0xC00
-+#define    RTL8367C_PORT4_MULACT_OFFSET    8
-+#define    RTL8367C_PORT4_MULACT_MASK    0x300
-+#define    RTL8367C_PORT3_MULACT_OFFSET    6
-+#define    RTL8367C_PORT3_MULACT_MASK    0xC0
-+#define    RTL8367C_PORT2_MULACT_OFFSET    4
-+#define    RTL8367C_PORT2_MULACT_MASK    0x30
-+#define    RTL8367C_PORT1_MULACT_OFFSET    2
-+#define    RTL8367C_PORT1_MULACT_MASK    0xC
-+#define    RTL8367C_PORT0_MULACT_OFFSET    0
-+#define    RTL8367C_PORT0_MULACT_MASK    0x3
-+
-+#define    RTL8367C_REG_OAM_MULTIPLEXER_CTRL1    0x0a73
-+#define    RTL8367C_PORT10_MULACT_OFFSET    4
-+#define    RTL8367C_PORT10_MULACT_MASK    0x30
-+#define    RTL8367C_PORT9_MULACT_OFFSET    2
-+#define    RTL8367C_PORT9_MULACT_MASK    0xC
-+#define    RTL8367C_PORT8_MULACT_OFFSET    0
-+#define    RTL8367C_PORT8_MULACT_MASK    0x3
-+
-+#define    RTL8367C_REG_OAM_CTRL    0x0a74
-+#define    RTL8367C_OAM_CTRL_OFFSET    0
-+#define    RTL8367C_OAM_CTRL_MASK    0x1
-+
-+#define    RTL8367C_REG_DOT1X_PORT_ENABLE    0x0a80
-+#define    RTL8367C_DOT1X_PORT_ENABLE_OFFSET    0
-+#define    RTL8367C_DOT1X_PORT_ENABLE_MASK    0x7FF
-+
-+#define    RTL8367C_REG_DOT1X_MAC_ENABLE    0x0a81
-+#define    RTL8367C_DOT1X_MAC_ENABLE_OFFSET    0
-+#define    RTL8367C_DOT1X_MAC_ENABLE_MASK    0x7FF
-+
-+#define    RTL8367C_REG_DOT1X_PORT_AUTH    0x0a82
-+#define    RTL8367C_DOT1X_PORT_AUTH_OFFSET    0
-+#define    RTL8367C_DOT1X_PORT_AUTH_MASK    0x7FF
-+
-+#define    RTL8367C_REG_DOT1X_PORT_OPDIR    0x0a83
-+#define    RTL8367C_DOT1X_PORT_OPDIR_OFFSET    0
-+#define    RTL8367C_DOT1X_PORT_OPDIR_MASK    0x7FF
-+
-+#define    RTL8367C_REG_DOT1X_UNAUTH_ACT_W0    0x0a84
-+#define    RTL8367C_DOT1X_PORT7_UNAUTHBH_OFFSET    14
-+#define    RTL8367C_DOT1X_PORT7_UNAUTHBH_MASK    0xC000
-+#define    RTL8367C_DOT1X_PORT6_UNAUTHBH_OFFSET    12
-+#define    RTL8367C_DOT1X_PORT6_UNAUTHBH_MASK    0x3000
-+#define    RTL8367C_DOT1X_PORT5_UNAUTHBH_OFFSET    10
-+#define    RTL8367C_DOT1X_PORT5_UNAUTHBH_MASK    0xC00
-+#define    RTL8367C_DOT1X_PORT4_UNAUTHBH_OFFSET    8
-+#define    RTL8367C_DOT1X_PORT4_UNAUTHBH_MASK    0x300
-+#define    RTL8367C_DOT1X_PORT3_UNAUTHBH_OFFSET    6
-+#define    RTL8367C_DOT1X_PORT3_UNAUTHBH_MASK    0xC0
-+#define    RTL8367C_DOT1X_PORT2_UNAUTHBH_OFFSET    4
-+#define    RTL8367C_DOT1X_PORT2_UNAUTHBH_MASK    0x30
-+#define    RTL8367C_DOT1X_PORT1_UNAUTHBH_OFFSET    2
-+#define    RTL8367C_DOT1X_PORT1_UNAUTHBH_MASK    0xC
-+#define    RTL8367C_DOT1X_PORT0_UNAUTHBH_OFFSET    0
-+#define    RTL8367C_DOT1X_PORT0_UNAUTHBH_MASK    0x3
-+
-+#define    RTL8367C_REG_DOT1X_UNAUTH_ACT_W1    0x0a85
-+#define    RTL8367C_DOT1X_PORT10_UNAUTHBH_OFFSET    4
-+#define    RTL8367C_DOT1X_PORT10_UNAUTHBH_MASK    0x30
-+#define    RTL8367C_DOT1X_PORT9_UNAUTHBH_OFFSET    2
-+#define    RTL8367C_DOT1X_PORT9_UNAUTHBH_MASK    0xC
-+#define    RTL8367C_DOT1X_PORT8_UNAUTHBH_OFFSET    0
-+#define    RTL8367C_DOT1X_PORT8_UNAUTHBH_MASK    0x3
-+
-+#define    RTL8367C_REG_DOT1X_CFG    0x0a86
-+#define    RTL8367C_DOT1X_GVOPDIR_OFFSET    6
-+#define    RTL8367C_DOT1X_GVOPDIR_MASK    0x40
-+#define    RTL8367C_DOT1X_MAC_OPDIR_OFFSET    5
-+#define    RTL8367C_DOT1X_MAC_OPDIR_MASK    0x20
-+#define    RTL8367C_DOT1X_GVIDX_OFFSET    0
-+#define    RTL8367C_DOT1X_GVIDX_MASK    0x1F
-+
-+#define    RTL8367C_REG_L2_LRN_CNT_CTRL0    0x0a87
-+#define    RTL8367C_L2_LRN_CNT_CTRL0_OFFSET    0
-+#define    RTL8367C_L2_LRN_CNT_CTRL0_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_L2_LRN_CNT_CTRL1    0x0a88
-+#define    RTL8367C_L2_LRN_CNT_CTRL1_OFFSET    0
-+#define    RTL8367C_L2_LRN_CNT_CTRL1_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_L2_LRN_CNT_CTRL2    0x0a89
-+#define    RTL8367C_L2_LRN_CNT_CTRL2_OFFSET    0
-+#define    RTL8367C_L2_LRN_CNT_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_L2_LRN_CNT_CTRL3    0x0a8a
-+#define    RTL8367C_L2_LRN_CNT_CTRL3_OFFSET    0
-+#define    RTL8367C_L2_LRN_CNT_CTRL3_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_L2_LRN_CNT_CTRL4    0x0a8b
-+#define    RTL8367C_L2_LRN_CNT_CTRL4_OFFSET    0
-+#define    RTL8367C_L2_LRN_CNT_CTRL4_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_L2_LRN_CNT_CTRL5    0x0a8c
-+#define    RTL8367C_L2_LRN_CNT_CTRL5_OFFSET    0
-+#define    RTL8367C_L2_LRN_CNT_CTRL5_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_L2_LRN_CNT_CTRL6    0x0a8d
-+#define    RTL8367C_L2_LRN_CNT_CTRL6_OFFSET    0
-+#define    RTL8367C_L2_LRN_CNT_CTRL6_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_L2_LRN_CNT_CTRL7    0x0a8e
-+#define    RTL8367C_L2_LRN_CNT_CTRL7_OFFSET    0
-+#define    RTL8367C_L2_LRN_CNT_CTRL7_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_L2_LRN_CNT_CTRL8    0x0a8f
-+#define    RTL8367C_L2_LRN_CNT_CTRL8_OFFSET    0
-+#define    RTL8367C_L2_LRN_CNT_CTRL8_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_L2_LRN_CNT_CTRL9    0x0a90
-+#define    RTL8367C_L2_LRN_CNT_CTRL9_OFFSET    0
-+#define    RTL8367C_L2_LRN_CNT_CTRL9_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_L2_LRN_CNT_CTRL10    0x0a92
-+#define    RTL8367C_L2_LRN_CNT_CTRL10_OFFSET    0
-+#define    RTL8367C_L2_LRN_CNT_CTRL10_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_LUT_LRN_UNDER_STATUS    0x0a91
-+#define    RTL8367C_LUT_LRN_UNDER_STATUS_OFFSET    0
-+#define    RTL8367C_LUT_LRN_UNDER_STATUS_MASK    0x7FF
-+
-+#define    RTL8367C_REG_L2_SA_MOVING_FORBID    0x0aa0
-+#define    RTL8367C_L2_SA_MOVING_FORBID_OFFSET    0
-+#define    RTL8367C_L2_SA_MOVING_FORBID_MASK    0x7FF
-+
-+#define    RTL8367C_REG_DRPORT_LEARN_CTRL    0x0aa1
-+#define    RTL8367C_FORBID1_OFFSET    1
-+#define    RTL8367C_FORBID1_MASK    0x2
-+#define    RTL8367C_FORBID0_OFFSET    0
-+#define    RTL8367C_FORBID0_MASK    0x1
-+
-+#define    RTL8367C_REG_L2_DUMMY02    0x0aa2
-+
-+#define    RTL8367C_REG_L2_DUMMY03    0x0aa3
-+
-+#define    RTL8367C_REG_L2_DUMMY04    0x0aa4
-+
-+#define    RTL8367C_REG_L2_DUMMY05    0x0aa5
-+
-+#define    RTL8367C_REG_L2_DUMMY06    0x0aa6
-+
-+#define    RTL8367C_REG_L2_DUMMY07    0x0aa7
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_00    0x0AC0
-+#define    RTL8367C_IPMC_GROUP_PMSK_00_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_00_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_01    0x0AC1
-+#define    RTL8367C_IPMC_GROUP_PMSK_01_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_01_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_02    0x0AC2
-+#define    RTL8367C_IPMC_GROUP_PMSK_02_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_02_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_03    0x0AC3
-+#define    RTL8367C_IPMC_GROUP_PMSK_03_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_03_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_04    0x0AC4
-+#define    RTL8367C_IPMC_GROUP_PMSK_04_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_04_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_05    0x0AC5
-+#define    RTL8367C_IPMC_GROUP_PMSK_05_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_05_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_06    0x0AC6
-+#define    RTL8367C_IPMC_GROUP_PMSK_06_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_06_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_07    0x0AC7
-+#define    RTL8367C_IPMC_GROUP_PMSK_07_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_07_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_08    0x0AC8
-+#define    RTL8367C_IPMC_GROUP_PMSK_08_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_08_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_09    0x0AC9
-+#define    RTL8367C_IPMC_GROUP_PMSK_09_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_09_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_10    0x0ACA
-+#define    RTL8367C_IPMC_GROUP_PMSK_10_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_10_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_11    0x0ACB
-+#define    RTL8367C_IPMC_GROUP_PMSK_11_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_11_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_12    0x0ACC
-+#define    RTL8367C_IPMC_GROUP_PMSK_12_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_12_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_13    0x0ACD
-+#define    RTL8367C_IPMC_GROUP_PMSK_13_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_13_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_14    0x0ACE
-+#define    RTL8367C_IPMC_GROUP_PMSK_14_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_14_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_15    0x0ACF
-+#define    RTL8367C_IPMC_GROUP_PMSK_15_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_15_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_16    0x0AD0
-+#define    RTL8367C_IPMC_GROUP_PMSK_16_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_16_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_17    0x0AD1
-+#define    RTL8367C_IPMC_GROUP_PMSK_17_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_17_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_18    0x0AD2
-+#define    RTL8367C_IPMC_GROUP_PMSK_18_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_18_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_19    0x0AD3
-+#define    RTL8367C_IPMC_GROUP_PMSK_19_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_19_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_20    0x0AD4
-+#define    RTL8367C_IPMC_GROUP_PMSK_20_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_20_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_21    0x0AD5
-+#define    RTL8367C_IPMC_GROUP_PMSK_21_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_21_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_22    0x0AD6
-+#define    RTL8367C_IPMC_GROUP_PMSK_22_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_22_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_23    0x0AD7
-+#define    RTL8367C_IPMC_GROUP_PMSK_23_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_23_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_24    0x0AD8
-+#define    RTL8367C_IPMC_GROUP_PMSK_24_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_24_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_25    0x0AD9
-+#define    RTL8367C_IPMC_GROUP_PMSK_25_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_25_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_26    0x0ADA
-+#define    RTL8367C_IPMC_GROUP_PMSK_26_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_26_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_27    0x0ADB
-+#define    RTL8367C_IPMC_GROUP_PMSK_27_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_27_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_28    0x0ADC
-+#define    RTL8367C_IPMC_GROUP_PMSK_28_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_28_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_29    0x0ADD
-+#define    RTL8367C_IPMC_GROUP_PMSK_29_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_29_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_30    0x0ADE
-+#define    RTL8367C_IPMC_GROUP_PMSK_30_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_30_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_31    0x0ADF
-+#define    RTL8367C_IPMC_GROUP_PMSK_31_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_31_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_32    0x0AE0
-+#define    RTL8367C_IPMC_GROUP_PMSK_32_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_32_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_33    0x0AE1
-+#define    RTL8367C_IPMC_GROUP_PMSK_33_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_33_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_34    0x0AE2
-+#define    RTL8367C_IPMC_GROUP_PMSK_34_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_34_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_35    0x0AE3
-+#define    RTL8367C_IPMC_GROUP_PMSK_35_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_35_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_36    0x0AE4
-+#define    RTL8367C_IPMC_GROUP_PMSK_36_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_36_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_37    0x0AE5
-+#define    RTL8367C_IPMC_GROUP_PMSK_37_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_37_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_38    0x0AE6
-+#define    RTL8367C_IPMC_GROUP_PMSK_38_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_38_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_39    0x0AE7
-+#define    RTL8367C_IPMC_GROUP_PMSK_39_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_39_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_40    0x0AE8
-+#define    RTL8367C_IPMC_GROUP_PMSK_40_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_40_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_41    0x0AE9
-+#define    RTL8367C_IPMC_GROUP_PMSK_41_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_41_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_42    0x0AEA
-+#define    RTL8367C_IPMC_GROUP_PMSK_42_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_42_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_43    0x0AEB
-+#define    RTL8367C_IPMC_GROUP_PMSK_43_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_43_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_44    0x0AEC
-+#define    RTL8367C_IPMC_GROUP_PMSK_44_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_44_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_45    0x0AED
-+#define    RTL8367C_IPMC_GROUP_PMSK_45_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_45_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_46    0x0AEE
-+#define    RTL8367C_IPMC_GROUP_PMSK_46_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_46_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_47    0x0AEF
-+#define    RTL8367C_IPMC_GROUP_PMSK_47_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_47_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_48    0x0AF0
-+#define    RTL8367C_IPMC_GROUP_PMSK_48_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_48_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_49    0x0AF1
-+#define    RTL8367C_IPMC_GROUP_PMSK_49_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_49_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_50    0x0AF2
-+#define    RTL8367C_IPMC_GROUP_PMSK_50_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_50_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_51    0x0AF3
-+#define    RTL8367C_IPMC_GROUP_PMSK_51_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_51_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_52    0x0AF4
-+#define    RTL8367C_IPMC_GROUP_PMSK_52_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_52_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_53    0x0AF5
-+#define    RTL8367C_IPMC_GROUP_PMSK_53_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_53_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_54    0x0AF6
-+#define    RTL8367C_IPMC_GROUP_PMSK_54_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_54_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_55    0x0AF7
-+#define    RTL8367C_IPMC_GROUP_PMSK_55_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_55_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_56    0x0AF8
-+#define    RTL8367C_IPMC_GROUP_PMSK_56_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_56_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_57    0x0AF9
-+#define    RTL8367C_IPMC_GROUP_PMSK_57_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_57_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_58    0x0AFA
-+#define    RTL8367C_IPMC_GROUP_PMSK_58_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_58_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_59    0x0AFB
-+#define    RTL8367C_IPMC_GROUP_PMSK_59_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_59_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_60    0x0AFC
-+#define    RTL8367C_IPMC_GROUP_PMSK_60_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_60_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_61    0x0AFD
-+#define    RTL8367C_IPMC_GROUP_PMSK_61_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_61_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_62    0x0AFE
-+#define    RTL8367C_IPMC_GROUP_PMSK_62_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_62_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_PMSK_63    0x0AFF
-+#define    RTL8367C_IPMC_GROUP_PMSK_63_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_PMSK_63_MASK    0x7FF
-+
-+/* (16'h0b00)mltvlan_reg */
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY0_CTRL0    0x0b00
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY0_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY0_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY0_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY0_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY0_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY0_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY0_CTRL1    0x0b01
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY0_CTRL2    0x0b02
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY0_CTRL3    0x0b03
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY0_CTRL4    0x0b04
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY1_CTRL0    0x0b05
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY1_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY1_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY1_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY1_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY1_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY1_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY1_CTRL1    0x0b06
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY1_CTRL2    0x0b07
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY1_CTRL3    0x0b08
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY1_CTRL4    0x0b09
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY2_CTRL0    0x0b0a
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY2_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY2_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY2_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY2_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY2_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY2_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY2_CTRL1    0x0b0b
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY2_CTRL2    0x0b0c
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY2_CTRL3    0x0b0d
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY2_CTRL4    0x0b0e
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY3_CTRL0    0x0b0f
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY3_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY3_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY3_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY3_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY3_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY3_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY3_CTRL1    0x0b10
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY3_CTRL2    0x0b11
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY3_CTRL3    0x0b12
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY3_CTRL4    0x0b13
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY4_CTRL0    0x0b14
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY4_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY4_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY4_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY4_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY4_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY4_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY4_CTRL1    0x0b15
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY4_CTRL2    0x0b16
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY4_CTRL3    0x0b17
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY4_CTRL4    0x0b18
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY5_CTRL0    0x0b19
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY5_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY5_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY5_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY5_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY5_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY5_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY5_CTRL1    0x0b1a
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY5_CTRL2    0x0b1b
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY5_CTRL3    0x0b1c
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY5_CTRL4    0x0b1d
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY6_CTRL0    0x0b1e
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY6_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY6_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY6_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY6_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY6_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY6_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY6_CTRL1    0x0b1f
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY6_CTRL2    0x0b20
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY6_CTRL3    0x0b21
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY6_CTRL4    0x0b22
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY7_CTRL0    0x0b23
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY7_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY7_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY7_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY7_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY7_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY7_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY7_CTRL1    0x0b24
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY7_CTRL2    0x0b25
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY7_CTRL3    0x0b26
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY7_CTRL4    0x0b27
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY8_CTRL0    0x0b28
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY8_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY8_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY8_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY8_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY8_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY8_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY8_CTRL1    0x0b29
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY8_CTRL2    0x0b2a
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY8_CTRL3    0x0b2b
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY8_CTRL4    0x0b2c
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY9_CTRL0    0x0b2d
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY9_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY9_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY9_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY9_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY9_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY9_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY9_CTRL1    0x0b2e
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY9_CTRL2    0x0b2f
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY9_CTRL3    0x0b30
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY9_CTRL4    0x0b31
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY10_CTRL0    0x0b32
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY10_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY10_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY10_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY10_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY10_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY10_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY10_CTRL1    0x0b33
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY10_CTRL2    0x0b34
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY10_CTRL3    0x0b35
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY10_CTRL4    0x0b36
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY11_CTRL0    0x0b37
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY11_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY11_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY11_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY11_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY11_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY11_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY11_CTRL1    0x0b38
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY11_CTRL2    0x0b39
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY11_CTRL3    0x0b3a
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY11_CTRL4    0x0b3b
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY12_CTRL0    0x0b3c
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY12_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY12_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY12_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY12_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY12_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY12_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY12_CTRL1    0x0b3d
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY12_CTRL2    0x0b3e
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY12_CTRL3    0x0b3f
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY12_CTRL4    0x0b40
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY13_CTRL0    0x0b41
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY13_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY13_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY13_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY13_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY13_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY13_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY13_CTRL1    0x0b42
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY13_CTRL2    0x0b43
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY13_CTRL3    0x0b44
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY13_CTRL4    0x0b45
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY14_CTRL0    0x0b46
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY14_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY14_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY14_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY14_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY14_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY14_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY14_CTRL1    0x0b47
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY14_CTRL2    0x0b48
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY14_CTRL3    0x0b49
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY14_CTRL4    0x0b4a
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY15_CTRL0    0x0b4b
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY15_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY15_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY15_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY15_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY15_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY15_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY15_CTRL1    0x0b4c
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY15_CTRL2    0x0b4d
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY15_CTRL3    0x0b4e
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY15_CTRL4    0x0b4f
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY16_CTRL0    0x0b50
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY16_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY16_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY16_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY16_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY16_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY16_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY16_CTRL1    0x0b51
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY16_CTRL2    0x0b52
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY16_CTRL3    0x0b53
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY16_CTRL4    0x0b54
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY17_CTRL0    0x0b55
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY17_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY17_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY17_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY17_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY17_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY17_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY17_CTRL1    0x0b56
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY17_CTRL2    0x0b57
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY17_CTRL3    0x0b58
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY17_CTRL4    0x0b59
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY18_CTRL0    0x0b5a
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY18_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY18_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY18_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY18_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY18_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY18_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY18_CTRL1    0x0b5b
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY18_CTRL2    0x0b5c
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY18_CTRL3    0x0b5d
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY18_CTRL4    0x0b5e
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY19_CTRL0    0x0b5f
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY19_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY19_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY19_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY19_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY19_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY19_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY19_CTRL1    0x0b60
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY19_CTRL2    0x0b61
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY19_CTRL3    0x0b62
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY19_CTRL4    0x0b63
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY20_CTRL0    0x0b64
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY20_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY20_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY20_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY20_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY20_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY20_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY20_CTRL1    0x0b65
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY20_CTRL2    0x0b66
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY20_CTRL3    0x0b67
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY20_CTRL4    0x0b68
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY21_CTRL0    0x0b69
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY21_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY21_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY21_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY21_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY21_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY21_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY21_CTRL1    0x0b6a
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY21_CTRL2    0x0b6b
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY21_CTRL3    0x0b6c
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY21_CTRL4    0x0b6d
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY22_CTRL0    0x0b6e
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY22_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY22_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY22_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY22_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY22_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY22_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY22_CTRL1    0x0b6f
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY22_CTRL2    0x0b70
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY22_CTRL3    0x0b71
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY22_CTRL4    0x0b72
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY23_CTRL0    0x0b73
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY23_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY23_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY23_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY23_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY23_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY23_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY23_CTRL1    0x0b74
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY23_CTRL2    0x0b75
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY23_CTRL3    0x0b76
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY23_CTRL4    0x0b77
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY24_CTRL0    0x0b78
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY24_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY24_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY24_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY24_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY24_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY24_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY24_CTRL1    0x0b79
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY24_CTRL2    0x0b7a
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY24_CTRL3    0x0b7b
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY24_CTRL4    0x0b7c
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY25_CTRL0    0x0b7d
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY25_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY25_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY25_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY25_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY25_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY25_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY25_CTRL1    0x0b7e
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY25_CTRL2    0x0b7f
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY25_CTRL3    0x0b80
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY25_CTRL4    0x0b81
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY26_CTRL0    0x0b82
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY26_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY26_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY26_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY26_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY26_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY26_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY26_CTRL1    0x0b83
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY26_CTRL2    0x0b84
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY26_CTRL3    0x0b85
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY26_CTRL4    0x0b86
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY27_CTRL0    0x0b87
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY27_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY27_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY27_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY27_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY27_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY27_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY27_CTRL1    0x0b88
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY27_CTRL2    0x0b89
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY27_CTRL3    0x0b8a
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY27_CTRL4    0x0b8b
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY28_CTRL0    0x0b8c
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY28_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY28_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY28_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY28_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY28_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY28_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY28_CTRL1    0x0b8d
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY28_CTRL2    0x0b8e
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY28_CTRL3    0x0b8f
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY28_CTRL4    0x0b90
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY29_CTRL0    0x0b91
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY29_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY29_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY29_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY29_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY29_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY29_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY29_CTRL1    0x0b92
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY29_CTRL2    0x0b93
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY29_CTRL3    0x0b94
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY29_CTRL4    0x0b95
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY30_CTRL0    0x0b96
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY30_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY30_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY30_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY30_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY30_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY30_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY30_CTRL1    0x0b97
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY30_CTRL2    0x0b98
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY30_CTRL3    0x0b99
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY30_CTRL4    0x0b9a
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY31_CTRL0    0x0b9b
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY31_CTRL0_VALID_OFFSET    7
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY31_CTRL0_VALID_MASK    0x80
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY31_CTRL0_FORMAT_OFFSET    6
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY31_CTRL0_FORMAT_MASK    0x40
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY31_CTRL0_SVIDX_OFFSET    0
-+#define    RTL8367C_SVLAN_MCAST2S_ENTRY31_CTRL0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY31_CTRL1    0x0b9c
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY31_CTRL2    0x0b9d
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY31_CTRL3    0x0b9e
-+
-+#define    RTL8367C_REG_SVLAN_MCAST2S_ENTRY31_CTRL4    0x0b9f
-+
-+#define    RTL8367C_REG_MLTVLAN_DUMMY_0    0x0ba0
-+
-+#define    RTL8367C_REG_MLTVLAN_DUMMY_1    0x0ba1
-+
-+#define    RTL8367C_REG_MLTVLAN_DUMMY_2    0x0ba2
-+
-+#define    RTL8367C_REG_MLTVLAN_DUMMY_3    0x0ba3
-+
-+#define    RTL8367C_REG_MLTVLAN_DUMMY_4    0x0ba4
-+
-+#define    RTL8367C_REG_MLTVLAN_DUMMY_5    0x0ba5
-+
-+#define    RTL8367C_REG_MLTVLAN_DUMMY_6    0x0ba6
-+
-+#define    RTL8367C_REG_MLTVLAN_DUMMY_7    0x0ba7
-+
-+/* (16'h0c00)svlan_reg */
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG0_CTRL1    0x0c01
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG0_CTRL2    0x0c02
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG0_CTRL3    0x0c03
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG1_CTRL1    0x0c04
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG1_CTRL2    0x0c05
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG1_CTRL3    0x0c06
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG2_CTRL1    0x0c07
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG2_CTRL2    0x0c08
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG2_CTRL3    0x0c09
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG3_CTRL1    0x0c0a
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG3_CTRL2    0x0c0b
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG3_CTRL3    0x0c0c
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG4_CTRL1    0x0c0d
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG4_CTRL2    0x0c0e
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG4_CTRL3    0x0c0f
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG5_CTRL1    0x0c10
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG5_CTRL2    0x0c11
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG5_CTRL3    0x0c12
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG6_CTRL1    0x0c13
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG6_CTRL2    0x0c14
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG6_CTRL3    0x0c15
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG7_CTRL1    0x0c16
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG7_CTRL2    0x0c17
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG7_CTRL3    0x0c18
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG8_CTRL1    0x0c19
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG8_CTRL2    0x0c1a
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG8_CTRL3    0x0c1b
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG9_CTRL1    0x0c1c
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG9_CTRL2    0x0c1d
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG9_CTRL3    0x0c1e
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG10_CTRL1    0x0c1f
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG10_CTRL2    0x0c20
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG10_CTRL3    0x0c21
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG11_CTRL1    0x0c22
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG11_CTRL2    0x0c23
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG11_CTRL3    0x0c24
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG12_CTRL1    0x0c25
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG12_CTRL2    0x0c26
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG12_CTRL3    0x0c27
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG13_CTRL1    0x0c28
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG13_CTRL2    0x0c29
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG13_CTRL3    0x0c2a
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG14_CTRL1    0x0c2b
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG14_CTRL2    0x0c2c
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG14_CTRL3    0x0c2d
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG15_CTRL1    0x0c2e
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG15_CTRL2    0x0c2f
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG15_CTRL3    0x0c30
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG16_CTRL1    0x0c31
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG16_CTRL2    0x0c32
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG16_CTRL3    0x0c33
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG17_CTRL1    0x0c34
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG17_CTRL2    0x0c35
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG17_CTRL3    0x0c36
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG18_CTRL1    0x0c37
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG18_CTRL2    0x0c38
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG18_CTRL3    0x0c39
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG19_CTRL1    0x0c3a
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG19_CTRL2    0x0c3b
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG19_CTRL3    0x0c3c
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG20_CTRL1    0x0c3d
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG20_CTRL2    0x0c3e
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG20_CTRL3    0x0c3f
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG21_CTRL1    0x0c40
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG21_CTRL2    0x0c41
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG21_CTRL3    0x0c42
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG22_CTRL1    0x0c43
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG22_CTRL2    0x0c44
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG22_CTRL3    0x0c45
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG23_CTRL1    0x0c46
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG23_CTRL2    0x0c47
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG23_CTRL3    0x0c48
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG24_CTRL1    0x0c49
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG24_CTRL2    0x0c4a
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG24_CTRL3    0x0c4b
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG25_CTRL1    0x0c4c
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG25_CTRL2    0x0c4d
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG25_CTRL3    0x0c4e
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG26_CTRL1    0x0c4f
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG26_CTRL2    0x0c50
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG26_CTRL3    0x0c51
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG27_CTRL1    0x0c52
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG27_CTRL2    0x0c53
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG27_CTRL3    0x0c54
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG28_CTRL1    0x0c55
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG28_CTRL2    0x0c56
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG28_CTRL3    0x0c57
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG29_CTRL1    0x0c58
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG29_CTRL2    0x0c59
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG29_CTRL3    0x0c5a
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG30_CTRL1    0x0c5b
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG30_CTRL2    0x0c5c
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG30_CTRL3    0x0c5d
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG31_CTRL1    0x0c5e
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG31_CTRL2    0x0c5f
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG31_CTRL3    0x0c60
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG32_CTRL1    0x0c61
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG32_CTRL2    0x0c62
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG32_CTRL3    0x0c63
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG33_CTRL1    0x0c64
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG33_CTRL2    0x0c65
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG33_CTRL3    0x0c66
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG34_CTRL1    0x0c67
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG34_CTRL2    0x0c68
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG34_CTRL3    0x0c69
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG35_CTRL1    0x0c6a
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG35_CTRL2    0x0c6b
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG35_CTRL3    0x0c6c
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG36_CTRL1    0x0c6d
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG36_CTRL2    0x0c6e
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG36_CTRL3    0x0c6f
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG37_CTRL1    0x0c70
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG37_CTRL2    0x0c71
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG37_CTRL3    0x0c72
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG38_CTRL1    0x0c73
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG38_CTRL2    0x0c74
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG38_CTRL3    0x0c75
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG39_CTRL1    0x0c76
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG39_CTRL2    0x0c77
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG39_CTRL3    0x0c78
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG40_CTRL1    0x0c79
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG40_CTRL2    0x0c7a
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG40_CTRL3    0x0c7b
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG41_CTRL1    0x0c7c
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG41_CTRL2    0x0c7d
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG41_CTRL3    0x0c7e
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG42_CTRL1    0x0c7f
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG42_CTRL2    0x0c80
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG42_CTRL3    0x0c81
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG43_CTRL1    0x0c82
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG43_CTRL2    0x0c83
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG43_CTRL3    0x0c84
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG44_CTRL1    0x0c85
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG44_CTRL2    0x0c86
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG44_CTRL3    0x0c87
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG45_CTRL1    0x0c88
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG45_CTRL2    0x0c89
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG45_CTRL3    0x0c8a
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG46_CTRL1    0x0c8b
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG46_CTRL2    0x0c8c
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG46_CTRL3    0x0c8d
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG47_CTRL1    0x0c8e
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG47_CTRL2    0x0c8f
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG47_CTRL3    0x0c90
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG48_CTRL1    0x0c91
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG48_CTRL2    0x0c92
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG48_CTRL3    0x0c93
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG49_CTRL1    0x0c94
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG49_CTRL2    0x0c95
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG49_CTRL3    0x0c96
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG50_CTRL1    0x0c97
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG50_CTRL2    0x0c98
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG50_CTRL3    0x0c99
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG51_CTRL1    0x0c9a
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG51_CTRL2    0x0c9b
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG51_CTRL3    0x0c9c
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG52_CTRL1    0x0c9d
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG52_CTRL2    0x0c9e
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG52_CTRL3    0x0c9f
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG53_CTRL1    0x0ca0
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG53_CTRL2    0x0ca1
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG53_CTRL3    0x0ca2
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG54_CTRL1    0x0ca3
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG54_CTRL2    0x0ca4
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG54_CTRL3    0x0ca5
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG55_CTRL1    0x0ca6
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG55_CTRL2    0x0ca7
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG55_CTRL3    0x0ca8
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG56_CTRL1    0x0ca9
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG56_CTRL2    0x0caa
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG56_CTRL3    0x0cab
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG57_CTRL1    0x0cac
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG57_CTRL2    0x0cad
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG57_CTRL3    0x0cae
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG58_CTRL1    0x0caf
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG58_CTRL2    0x0cb0
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG58_CTRL3    0x0cb1
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG59_CTRL1    0x0cb2
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG59_CTRL2    0x0cb3
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG59_CTRL3    0x0cb4
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG60_CTRL1    0x0cb5
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG60_CTRL2    0x0cb6
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG60_CTRL3    0x0cb7
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG61_CTRL1    0x0cb8
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG61_CTRL2    0x0cb9
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG61_CTRL3    0x0cba
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG62_CTRL1    0x0cbb
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG62_CTRL2    0x0cbc
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG62_CTRL3    0x0cbd
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG63_CTRL1    0x0cbe
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL1_VS_UNTAGSET_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL1_VS_UNTAGSET_MASK    0xFF00
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL1_VS_SMBR_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL1_VS_SMBR_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG63_CTRL2    0x0cbf
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL2_VS_FIDEN_OFFSET    7
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL2_VS_FIDEN_MASK    0x80
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL2_VS_SPRI_OFFSET    4
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL2_VS_SPRI_MASK    0x70
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL2_VS_FID_MSTI_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL2_VS_FID_MSTI_MASK    0xF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG63_CTRL3    0x0cc0
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL3_VS_EFID_OFFSET    13
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL3_VS_EFID_MASK    0xE000
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL3_VS_EFIDEN_OFFSET    12
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL3_VS_EFIDEN_MASK    0x1000
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL3_VS_SVID_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL3_VS_SVID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG0_CTRL4    0x0cc1
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG0_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG1_CTRL4    0x0cc2
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG1_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG2_CTRL4    0x0cc3
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG2_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG3_CTRL4    0x0cc4
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG3_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG4_CTRL4    0x0cc5
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG4_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG5_CTRL4    0x0cc6
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG5_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG6_CTRL4    0x0cc7
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG6_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG7_CTRL4    0x0cc8
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG7_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG8_CTRL4    0x0cc9
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG8_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG9_CTRL4    0x0cca
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG9_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG10_CTRL4    0x0ccb
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG10_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG11_CTRL4    0x0ccc
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG11_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG12_CTRL4    0x0ccd
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG12_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG13_CTRL4    0x0cce
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG13_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG14_CTRL4    0x0ccf
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG14_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG15_CTRL4    0x0cd0
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG15_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG16_CTRL4    0x0cd1
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG16_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG17_CTRL4    0x0cd2
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG17_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG18_CTRL4    0x0cd3
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG18_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG19_CTRL4    0x0cd4
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG19_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG20_CTRL4    0x0cd5
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG20_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG21_CTRL4    0x0cd6
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG21_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG22_CTRL4    0x0cd7
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG22_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG23_CTRL4    0x0cd8
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG23_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG24_CTRL4    0x0cd9
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG24_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG25_CTRL4    0x0cda
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG25_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG26_CTRL4    0x0cdb
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG26_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG27_CTRL4    0x0cdc
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG27_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG28_CTRL4    0x0cdd
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG28_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG29_CTRL4    0x0cde
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG29_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG30_CTRL4    0x0cdf
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG30_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG31_CTRL4    0x0ce0
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG31_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG32_CTRL4    0x0ce1
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG32_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG33_CTRL4    0x0ce2
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG33_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG34_CTRL4    0x0ce3
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG34_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG35_CTRL4    0x0ce4
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG35_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG36_CTRL4    0x0ce5
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG36_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG37_CTRL4    0x0ce6
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG37_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG38_CTRL4    0x0ce7
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG38_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG39_CTRL4    0x0ce8
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG39_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG40_CTRL4    0x0ce9
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG40_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG41_CTRL4    0x0cea
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG41_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG42_CTRL4    0x0ceb
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG42_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG43_CTRL4    0x0cec
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG43_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG44_CTRL4    0x0ced
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG44_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG45_CTRL4    0x0cee
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG45_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG46_CTRL4    0x0cef
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG46_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG47_CTRL4    0x0cf0
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG47_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG48_CTRL4    0x0cf1
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG48_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG49_CTRL4    0x0cf2
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG49_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG50_CTRL4    0x0cf3
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG50_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG51_CTRL4    0x0cf4
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG51_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG52_CTRL4    0x0cf5
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG52_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG53_CTRL4    0x0cf6
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG53_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG54_CTRL4    0x0cf7
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG54_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG55_CTRL4    0x0cf8
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG55_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG56_CTRL4    0x0cf9
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG56_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG57_CTRL4    0x0cfa
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG57_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG58_CTRL4    0x0cfb
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG58_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG59_CTRL4    0x0cfc
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG59_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG60_CTRL4    0x0cfd
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG60_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG61_CTRL4    0x0cfe
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG61_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG62_CTRL4    0x0cff
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG62_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG0_CTRL0    0x0d00
-+#define    RTL8367C_SVLAN_C2SCFG0_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG0_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG0_CTRL1    0x0d01
-+#define    RTL8367C_SVLAN_C2SCFG0_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG0_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG0_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG0_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG0_CTRL2    0x0d02
-+#define    RTL8367C_SVLAN_C2SCFG0_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG0_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG1_CTRL0    0x0d03
-+#define    RTL8367C_SVLAN_C2SCFG1_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG1_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG1_CTRL1    0x0d04
-+#define    RTL8367C_SVLAN_C2SCFG1_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG1_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG1_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG1_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG1_CTRL2    0x0d05
-+#define    RTL8367C_SVLAN_C2SCFG1_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG1_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG2_CTRL0    0x0d06
-+#define    RTL8367C_SVLAN_C2SCFG2_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG2_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG2_CTRL1    0x0d07
-+#define    RTL8367C_SVLAN_C2SCFG2_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG2_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG2_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG2_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG2_CTRL2    0x0d08
-+#define    RTL8367C_SVLAN_C2SCFG2_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG2_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG3_CTRL0    0x0d09
-+#define    RTL8367C_SVLAN_C2SCFG3_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG3_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG3_CTRL1    0x0d0a
-+#define    RTL8367C_SVLAN_C2SCFG3_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG3_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG3_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG3_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG3_CTRL2    0x0d0b
-+#define    RTL8367C_SVLAN_C2SCFG3_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG3_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG4_CTRL0    0x0d0c
-+#define    RTL8367C_SVLAN_C2SCFG4_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG4_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG4_CTRL1    0x0d0d
-+#define    RTL8367C_SVLAN_C2SCFG4_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG4_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG4_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG4_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG4_CTRL2    0x0d0e
-+#define    RTL8367C_SVLAN_C2SCFG4_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG4_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG5_CTRL0    0x0d0f
-+#define    RTL8367C_SVLAN_C2SCFG5_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG5_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG5_CTRL1    0x0d10
-+#define    RTL8367C_SVLAN_C2SCFG5_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG5_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG5_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG5_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG5_CTRL2    0x0d11
-+#define    RTL8367C_SVLAN_C2SCFG5_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG5_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG6_CTRL0    0x0d12
-+#define    RTL8367C_SVLAN_C2SCFG6_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG6_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG6_CTRL1    0x0d13
-+#define    RTL8367C_SVLAN_C2SCFG6_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG6_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG6_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG6_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG6_CTRL2    0x0d14
-+#define    RTL8367C_SVLAN_C2SCFG6_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG6_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG7_CTRL0    0x0d15
-+#define    RTL8367C_SVLAN_C2SCFG7_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG7_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG7_CTRL1    0x0d16
-+#define    RTL8367C_SVLAN_C2SCFG7_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG7_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG7_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG7_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG7_CTRL2    0x0d17
-+#define    RTL8367C_SVLAN_C2SCFG7_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG7_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG8_CTRL0    0x0d18
-+#define    RTL8367C_SVLAN_C2SCFG8_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG8_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG8_CTRL1    0x0d19
-+#define    RTL8367C_SVLAN_C2SCFG8_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG8_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG8_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG8_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG8_CTRL2    0x0d1a
-+#define    RTL8367C_SVLAN_C2SCFG8_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG8_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG9_CTRL0    0x0d1b
-+#define    RTL8367C_SVLAN_C2SCFG9_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG9_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG9_CTRL1    0x0d1c
-+#define    RTL8367C_SVLAN_C2SCFG9_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG9_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG9_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG9_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG9_CTRL2    0x0d1d
-+#define    RTL8367C_SVLAN_C2SCFG9_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG9_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG10_CTRL0    0x0d1e
-+#define    RTL8367C_SVLAN_C2SCFG10_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG10_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG10_CTRL1    0x0d1f
-+#define    RTL8367C_SVLAN_C2SCFG10_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG10_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG10_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG10_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG10_CTRL2    0x0d20
-+#define    RTL8367C_SVLAN_C2SCFG10_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG10_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG11_CTRL0    0x0d21
-+#define    RTL8367C_SVLAN_C2SCFG11_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG11_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG11_CTRL1    0x0d22
-+#define    RTL8367C_SVLAN_C2SCFG11_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG11_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG11_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG11_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG11_CTRL2    0x0d23
-+#define    RTL8367C_SVLAN_C2SCFG11_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG11_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG12_CTRL0    0x0d24
-+#define    RTL8367C_SVLAN_C2SCFG12_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG12_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG12_CTRL1    0x0d25
-+#define    RTL8367C_SVLAN_C2SCFG12_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG12_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG12_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG12_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG12_CTRL2    0x0d26
-+#define    RTL8367C_SVLAN_C2SCFG12_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG12_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG13_CTRL0    0x0d27
-+#define    RTL8367C_SVLAN_C2SCFG13_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG13_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG13_CTRL1    0x0d28
-+#define    RTL8367C_SVLAN_C2SCFG13_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG13_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG13_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG13_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG13_CTRL2    0x0d29
-+#define    RTL8367C_SVLAN_C2SCFG13_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG13_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG14_CTRL0    0x0d2a
-+#define    RTL8367C_SVLAN_C2SCFG14_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG14_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG14_CTRL1    0x0d2b
-+#define    RTL8367C_SVLAN_C2SCFG14_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG14_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG14_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG14_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG14_CTRL2    0x0d2c
-+#define    RTL8367C_SVLAN_C2SCFG14_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG14_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG15_CTRL0    0x0d2d
-+#define    RTL8367C_SVLAN_C2SCFG15_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG15_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG15_CTRL1    0x0d2e
-+#define    RTL8367C_SVLAN_C2SCFG15_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG15_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG15_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG15_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG15_CTRL2    0x0d2f
-+#define    RTL8367C_SVLAN_C2SCFG15_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG15_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG16_CTRL0    0x0d30
-+#define    RTL8367C_SVLAN_C2SCFG16_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG16_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG16_CTRL1    0x0d31
-+#define    RTL8367C_SVLAN_C2SCFG16_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG16_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG16_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG16_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG16_CTRL2    0x0d32
-+#define    RTL8367C_SVLAN_C2SCFG16_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG16_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG17_CTRL0    0x0d33
-+#define    RTL8367C_SVLAN_C2SCFG17_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG17_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG17_CTRL1    0x0d34
-+#define    RTL8367C_SVLAN_C2SCFG17_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG17_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG17_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG17_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG17_CTRL2    0x0d35
-+#define    RTL8367C_SVLAN_C2SCFG17_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG17_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG18_CTRL0    0x0d36
-+#define    RTL8367C_SVLAN_C2SCFG18_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG18_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG18_CTRL1    0x0d37
-+#define    RTL8367C_SVLAN_C2SCFG18_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG18_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG18_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG18_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG18_CTRL2    0x0d38
-+#define    RTL8367C_SVLAN_C2SCFG18_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG18_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG19_CTRL0    0x0d39
-+#define    RTL8367C_SVLAN_C2SCFG19_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG19_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG19_CTRL1    0x0d3a
-+#define    RTL8367C_SVLAN_C2SCFG19_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG19_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG19_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG19_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG19_CTRL2    0x0d3b
-+#define    RTL8367C_SVLAN_C2SCFG19_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG19_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG20_CTRL0    0x0d3c
-+#define    RTL8367C_SVLAN_C2SCFG20_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG20_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG20_CTRL1    0x0d3d
-+#define    RTL8367C_SVLAN_C2SCFG20_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG20_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG20_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG20_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG20_CTRL2    0x0d3e
-+#define    RTL8367C_SVLAN_C2SCFG20_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG20_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG21_CTRL0    0x0d3f
-+#define    RTL8367C_SVLAN_C2SCFG21_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG21_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG21_CTRL1    0x0d40
-+#define    RTL8367C_SVLAN_C2SCFG21_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG21_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG21_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG21_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG21_CTRL2    0x0d41
-+#define    RTL8367C_SVLAN_C2SCFG21_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG21_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG22_CTRL0    0x0d42
-+#define    RTL8367C_SVLAN_C2SCFG22_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG22_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG22_CTRL1    0x0d43
-+#define    RTL8367C_SVLAN_C2SCFG22_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG22_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG22_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG22_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG22_CTRL2    0x0d44
-+#define    RTL8367C_SVLAN_C2SCFG22_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG22_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG23_CTRL0    0x0d45
-+#define    RTL8367C_SVLAN_C2SCFG23_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG23_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG23_CTRL1    0x0d46
-+#define    RTL8367C_SVLAN_C2SCFG23_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG23_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG23_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG23_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG23_CTRL2    0x0d47
-+#define    RTL8367C_SVLAN_C2SCFG23_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG23_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG24_CTRL0    0x0d48
-+#define    RTL8367C_SVLAN_C2SCFG24_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG24_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG24_CTRL1    0x0d49
-+#define    RTL8367C_SVLAN_C2SCFG24_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG24_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG24_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG24_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG24_CTRL2    0x0d4a
-+#define    RTL8367C_SVLAN_C2SCFG24_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG24_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG25_CTRL0    0x0d4b
-+#define    RTL8367C_SVLAN_C2SCFG25_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG25_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG25_CTRL1    0x0d4c
-+#define    RTL8367C_SVLAN_C2SCFG25_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG25_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG25_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG25_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG25_CTRL2    0x0d4d
-+#define    RTL8367C_SVLAN_C2SCFG25_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG25_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG26_CTRL0    0x0d4e
-+#define    RTL8367C_SVLAN_C2SCFG26_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG26_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG26_CTRL1    0x0d4f
-+#define    RTL8367C_SVLAN_C2SCFG26_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG26_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG26_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG26_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG26_CTRL2    0x0d50
-+#define    RTL8367C_SVLAN_C2SCFG26_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG26_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG27_CTRL0    0x0d51
-+#define    RTL8367C_SVLAN_C2SCFG27_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG27_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG27_CTRL1    0x0d52
-+#define    RTL8367C_SVLAN_C2SCFG27_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG27_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG27_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG27_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG27_CTRL2    0x0d53
-+#define    RTL8367C_SVLAN_C2SCFG27_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG27_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG28_CTRL0    0x0d54
-+#define    RTL8367C_SVLAN_C2SCFG28_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG28_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG28_CTRL1    0x0d55
-+#define    RTL8367C_SVLAN_C2SCFG28_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG28_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG28_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG28_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG28_CTRL2    0x0d56
-+#define    RTL8367C_SVLAN_C2SCFG28_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG28_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG29_CTRL0    0x0d57
-+#define    RTL8367C_SVLAN_C2SCFG29_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG29_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG29_CTRL1    0x0d58
-+#define    RTL8367C_SVLAN_C2SCFG29_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG29_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG29_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG29_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG29_CTRL2    0x0d59
-+#define    RTL8367C_SVLAN_C2SCFG29_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG29_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG30_CTRL0    0x0d5a
-+#define    RTL8367C_SVLAN_C2SCFG30_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG30_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG30_CTRL1    0x0d5b
-+#define    RTL8367C_SVLAN_C2SCFG30_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG30_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG30_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG30_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG30_CTRL2    0x0d5c
-+#define    RTL8367C_SVLAN_C2SCFG30_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG30_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG31_CTRL0    0x0d5d
-+#define    RTL8367C_SVLAN_C2SCFG31_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG31_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG31_CTRL1    0x0d5e
-+#define    RTL8367C_SVLAN_C2SCFG31_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG31_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG31_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG31_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG31_CTRL2    0x0d5f
-+#define    RTL8367C_SVLAN_C2SCFG31_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG31_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG32_CTRL0    0x0d60
-+#define    RTL8367C_SVLAN_C2SCFG32_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG32_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG32_CTRL1    0x0d61
-+#define    RTL8367C_SVLAN_C2SCFG32_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG32_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG32_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG32_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG32_CTRL2    0x0d62
-+#define    RTL8367C_SVLAN_C2SCFG32_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG32_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG33_CTRL0    0x0d63
-+#define    RTL8367C_SVLAN_C2SCFG33_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG33_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG33_CTRL1    0x0d64
-+#define    RTL8367C_SVLAN_C2SCFG33_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG33_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG33_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG33_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG33_CTRL2    0x0d65
-+#define    RTL8367C_SVLAN_C2SCFG33_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG33_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG34_CTRL0    0x0d66
-+#define    RTL8367C_SVLAN_C2SCFG34_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG34_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG34_CTRL1    0x0d67
-+#define    RTL8367C_SVLAN_C2SCFG34_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG34_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG34_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG34_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG34_CTRL2    0x0d68
-+#define    RTL8367C_SVLAN_C2SCFG34_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG34_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG35_CTRL0    0x0d69
-+#define    RTL8367C_SVLAN_C2SCFG35_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG35_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG35_CTRL1    0x0d6a
-+#define    RTL8367C_SVLAN_C2SCFG35_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG35_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG35_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG35_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG35_CTRL2    0x0d6b
-+#define    RTL8367C_SVLAN_C2SCFG35_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG35_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG36_CTRL0    0x0d6c
-+#define    RTL8367C_SVLAN_C2SCFG36_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG36_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG36_CTRL1    0x0d6d
-+#define    RTL8367C_SVLAN_C2SCFG36_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG36_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG36_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG36_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG36_CTRL2    0x0d6e
-+#define    RTL8367C_SVLAN_C2SCFG36_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG36_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG37_CTRL0    0x0d6f
-+#define    RTL8367C_SVLAN_C2SCFG37_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG37_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG37_CTRL1    0x0d70
-+#define    RTL8367C_SVLAN_C2SCFG37_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG37_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG37_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG37_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG37_CTRL2    0x0d71
-+#define    RTL8367C_SVLAN_C2SCFG37_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG37_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG38_CTRL0    0x0d72
-+#define    RTL8367C_SVLAN_C2SCFG38_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG38_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG38_CTRL1    0x0d73
-+#define    RTL8367C_SVLAN_C2SCFG38_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG38_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG38_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG38_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG38_CTRL2    0x0d74
-+#define    RTL8367C_SVLAN_C2SCFG38_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG38_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG39_CTRL0    0x0d75
-+#define    RTL8367C_SVLAN_C2SCFG39_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG39_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG39_CTRL1    0x0d76
-+#define    RTL8367C_SVLAN_C2SCFG39_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG39_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG39_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG39_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG39_CTRL2    0x0d77
-+#define    RTL8367C_SVLAN_C2SCFG39_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG39_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG40_CTRL0    0x0d78
-+#define    RTL8367C_SVLAN_C2SCFG40_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG40_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG40_CTRL1    0x0d79
-+#define    RTL8367C_SVLAN_C2SCFG40_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG40_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG40_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG40_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG40_CTRL2    0x0d7a
-+#define    RTL8367C_SVLAN_C2SCFG40_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG40_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG41_CTRL0    0x0d7b
-+#define    RTL8367C_SVLAN_C2SCFG41_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG41_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG41_CTRL1    0x0d7c
-+#define    RTL8367C_SVLAN_C2SCFG41_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG41_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG41_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG41_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG41_CTRL2    0x0d7d
-+#define    RTL8367C_SVLAN_C2SCFG41_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG41_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG42_CTRL0    0x0d7e
-+#define    RTL8367C_SVLAN_C2SCFG42_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG42_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG42_CTRL1    0x0d7f
-+#define    RTL8367C_SVLAN_C2SCFG42_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG42_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG42_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG42_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG42_CTRL2    0x0d80
-+#define    RTL8367C_SVLAN_C2SCFG42_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG42_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG43_CTRL0    0x0d81
-+#define    RTL8367C_SVLAN_C2SCFG43_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG43_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG43_CTRL1    0x0d82
-+#define    RTL8367C_SVLAN_C2SCFG43_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG43_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG43_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG43_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG43_CTRL2    0x0d83
-+#define    RTL8367C_SVLAN_C2SCFG43_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG43_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG44_CTRL0    0x0d84
-+#define    RTL8367C_SVLAN_C2SCFG44_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG44_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG44_CTRL1    0x0d85
-+#define    RTL8367C_SVLAN_C2SCFG44_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG44_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG44_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG44_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG44_CTRL2    0x0d86
-+#define    RTL8367C_SVLAN_C2SCFG44_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG44_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG45_CTRL0    0x0d87
-+#define    RTL8367C_SVLAN_C2SCFG45_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG45_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG45_CTRL1    0x0d88
-+#define    RTL8367C_SVLAN_C2SCFG45_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG45_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG45_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG45_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG45_CTRL2    0x0d89
-+#define    RTL8367C_SVLAN_C2SCFG45_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG45_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG46_CTRL0    0x0d8a
-+#define    RTL8367C_SVLAN_C2SCFG46_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG46_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG46_CTRL1    0x0d8b
-+#define    RTL8367C_SVLAN_C2SCFG46_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG46_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG46_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG46_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG46_CTRL2    0x0d8c
-+#define    RTL8367C_SVLAN_C2SCFG46_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG46_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG47_CTRL0    0x0d8d
-+#define    RTL8367C_SVLAN_C2SCFG47_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG47_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG47_CTRL1    0x0d8e
-+#define    RTL8367C_SVLAN_C2SCFG47_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG47_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG47_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG47_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG47_CTRL2    0x0d8f
-+#define    RTL8367C_SVLAN_C2SCFG47_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG47_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG48_CTRL0    0x0d90
-+#define    RTL8367C_SVLAN_C2SCFG48_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG48_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG48_CTRL1    0x0d91
-+#define    RTL8367C_SVLAN_C2SCFG48_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG48_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG48_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG48_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG48_CTRL2    0x0d92
-+#define    RTL8367C_SVLAN_C2SCFG48_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG48_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG49_CTRL0    0x0d93
-+#define    RTL8367C_SVLAN_C2SCFG49_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG49_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG49_CTRL1    0x0d94
-+#define    RTL8367C_SVLAN_C2SCFG49_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG49_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG49_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG49_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG49_CTRL2    0x0d95
-+#define    RTL8367C_SVLAN_C2SCFG49_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG49_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG50_CTRL0    0x0d96
-+#define    RTL8367C_SVLAN_C2SCFG50_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG50_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG50_CTRL1    0x0d97
-+#define    RTL8367C_SVLAN_C2SCFG50_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG50_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG50_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG50_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG50_CTRL2    0x0d98
-+#define    RTL8367C_SVLAN_C2SCFG50_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG50_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG51_CTRL0    0x0d99
-+#define    RTL8367C_SVLAN_C2SCFG51_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG51_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG51_CTRL1    0x0d9a
-+#define    RTL8367C_SVLAN_C2SCFG51_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG51_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG51_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG51_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG51_CTRL2    0x0d9b
-+#define    RTL8367C_SVLAN_C2SCFG51_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG51_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG52_CTRL0    0x0d9c
-+#define    RTL8367C_SVLAN_C2SCFG52_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG52_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG52_CTRL1    0x0d9d
-+#define    RTL8367C_SVLAN_C2SCFG52_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG52_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG52_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG52_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG52_CTRL2    0x0d9e
-+#define    RTL8367C_SVLAN_C2SCFG52_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG52_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG53_CTRL0    0x0d9f
-+#define    RTL8367C_SVLAN_C2SCFG53_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG53_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG53_CTRL1    0x0da0
-+#define    RTL8367C_SVLAN_C2SCFG53_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG53_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG53_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG53_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG53_CTRL2    0x0da1
-+#define    RTL8367C_SVLAN_C2SCFG53_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG53_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG54_CTRL0    0x0da2
-+#define    RTL8367C_SVLAN_C2SCFG54_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG54_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG54_CTRL1    0x0da3
-+#define    RTL8367C_SVLAN_C2SCFG54_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG54_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG54_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG54_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG54_CTRL2    0x0da4
-+#define    RTL8367C_SVLAN_C2SCFG54_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG54_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG55_CTRL0    0x0da5
-+#define    RTL8367C_SVLAN_C2SCFG55_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG55_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG55_CTRL1    0x0da6
-+#define    RTL8367C_SVLAN_C2SCFG55_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG55_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG55_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG55_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG55_CTRL2    0x0da7
-+#define    RTL8367C_SVLAN_C2SCFG55_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG55_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG56_CTRL0    0x0da8
-+#define    RTL8367C_SVLAN_C2SCFG56_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG56_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG56_CTRL1    0x0da9
-+#define    RTL8367C_SVLAN_C2SCFG56_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG56_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG56_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG56_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG56_CTRL2    0x0daa
-+#define    RTL8367C_SVLAN_C2SCFG56_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG56_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG57_CTRL0    0x0dab
-+#define    RTL8367C_SVLAN_C2SCFG57_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG57_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG57_CTRL1    0x0dac
-+#define    RTL8367C_SVLAN_C2SCFG57_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG57_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG57_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG57_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG57_CTRL2    0x0dad
-+#define    RTL8367C_SVLAN_C2SCFG57_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG57_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG58_CTRL0    0x0dae
-+#define    RTL8367C_SVLAN_C2SCFG58_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG58_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG58_CTRL1    0x0daf
-+#define    RTL8367C_SVLAN_C2SCFG58_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG58_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG58_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG58_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG58_CTRL2    0x0db0
-+#define    RTL8367C_SVLAN_C2SCFG58_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG58_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG59_CTRL0    0x0db1
-+#define    RTL8367C_SVLAN_C2SCFG59_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG59_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG59_CTRL1    0x0db2
-+#define    RTL8367C_SVLAN_C2SCFG59_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG59_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG59_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG59_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG59_CTRL2    0x0db3
-+#define    RTL8367C_SVLAN_C2SCFG59_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG59_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG60_CTRL0    0x0db4
-+#define    RTL8367C_SVLAN_C2SCFG60_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG60_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG60_CTRL1    0x0db5
-+#define    RTL8367C_SVLAN_C2SCFG60_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG60_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG60_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG60_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG60_CTRL2    0x0db6
-+#define    RTL8367C_SVLAN_C2SCFG60_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG60_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG61_CTRL0    0x0db7
-+#define    RTL8367C_SVLAN_C2SCFG61_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG61_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG61_CTRL1    0x0db8
-+#define    RTL8367C_SVLAN_C2SCFG61_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG61_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG61_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG61_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG61_CTRL2    0x0db9
-+#define    RTL8367C_SVLAN_C2SCFG61_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG61_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG62_CTRL0    0x0dba
-+#define    RTL8367C_SVLAN_C2SCFG62_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG62_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG62_CTRL1    0x0dbb
-+#define    RTL8367C_SVLAN_C2SCFG62_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG62_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG62_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG62_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG62_CTRL2    0x0dbc
-+#define    RTL8367C_SVLAN_C2SCFG62_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG62_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG63_CTRL0    0x0dbd
-+#define    RTL8367C_SVLAN_C2SCFG63_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG63_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG63_CTRL1    0x0dbe
-+#define    RTL8367C_SVLAN_C2SCFG63_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG63_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG63_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG63_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG63_CTRL2    0x0dbf
-+#define    RTL8367C_SVLAN_C2SCFG63_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG63_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG64_CTRL0    0x0dc0
-+#define    RTL8367C_SVLAN_C2SCFG64_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG64_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG64_CTRL1    0x0dc1
-+#define    RTL8367C_SVLAN_C2SCFG64_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG64_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG64_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG64_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG64_CTRL2    0x0dc2
-+#define    RTL8367C_SVLAN_C2SCFG64_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG64_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG65_CTRL0    0x0dc3
-+#define    RTL8367C_SVLAN_C2SCFG65_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG65_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG65_CTRL1    0x0dc4
-+#define    RTL8367C_SVLAN_C2SCFG65_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG65_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG65_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG65_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG65_CTRL2    0x0dc5
-+#define    RTL8367C_SVLAN_C2SCFG65_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG65_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG66_CTRL0    0x0dc6
-+#define    RTL8367C_SVLAN_C2SCFG66_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG66_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG66_CTRL1    0x0dc7
-+#define    RTL8367C_SVLAN_C2SCFG66_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG66_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG66_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG66_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG66_CTRL2    0x0dc8
-+#define    RTL8367C_SVLAN_C2SCFG66_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG66_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG67_CTRL0    0x0dc9
-+#define    RTL8367C_SVLAN_C2SCFG67_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG67_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG67_CTRL1    0x0dca
-+#define    RTL8367C_SVLAN_C2SCFG67_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG67_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG67_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG67_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG67_CTRL2    0x0dcb
-+#define    RTL8367C_SVLAN_C2SCFG67_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG67_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG68_CTRL0    0x0dcc
-+#define    RTL8367C_SVLAN_C2SCFG68_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG68_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG68_CTRL1    0x0dcd
-+#define    RTL8367C_SVLAN_C2SCFG68_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG68_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG68_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG68_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG68_CTRL2    0x0dce
-+#define    RTL8367C_SVLAN_C2SCFG68_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG68_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG69_CTRL0    0x0dcf
-+#define    RTL8367C_SVLAN_C2SCFG69_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG69_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG69_CTRL1    0x0dd0
-+#define    RTL8367C_SVLAN_C2SCFG69_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG69_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG69_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG69_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG69_CTRL2    0x0dd1
-+#define    RTL8367C_SVLAN_C2SCFG69_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG69_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG70_CTRL0    0x0dd2
-+#define    RTL8367C_SVLAN_C2SCFG70_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG70_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG70_CTRL1    0x0dd3
-+#define    RTL8367C_SVLAN_C2SCFG70_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG70_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG70_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG70_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG70_CTRL2    0x0dd4
-+#define    RTL8367C_SVLAN_C2SCFG70_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG70_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG71_CTRL0    0x0dd5
-+#define    RTL8367C_SVLAN_C2SCFG71_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG71_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG71_CTRL1    0x0dd6
-+#define    RTL8367C_SVLAN_C2SCFG71_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG71_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG71_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG71_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG71_CTRL2    0x0dd7
-+#define    RTL8367C_SVLAN_C2SCFG71_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG71_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG72_CTRL0    0x0dd8
-+#define    RTL8367C_SVLAN_C2SCFG72_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG72_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG72_CTRL1    0x0dd9
-+#define    RTL8367C_SVLAN_C2SCFG72_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG72_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG72_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG72_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG72_CTRL2    0x0dda
-+#define    RTL8367C_SVLAN_C2SCFG72_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG72_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG73_CTRL0    0x0ddb
-+#define    RTL8367C_SVLAN_C2SCFG73_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG73_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG73_CTRL1    0x0ddc
-+#define    RTL8367C_SVLAN_C2SCFG73_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG73_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG73_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG73_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG73_CTRL2    0x0ddd
-+#define    RTL8367C_SVLAN_C2SCFG73_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG73_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG74_CTRL0    0x0dde
-+#define    RTL8367C_SVLAN_C2SCFG74_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG74_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG74_CTRL1    0x0ddf
-+#define    RTL8367C_SVLAN_C2SCFG74_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG74_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG74_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG74_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG74_CTRL2    0x0de0
-+#define    RTL8367C_SVLAN_C2SCFG74_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG74_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG75_CTRL0    0x0de1
-+#define    RTL8367C_SVLAN_C2SCFG75_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG75_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG75_CTRL1    0x0de2
-+#define    RTL8367C_SVLAN_C2SCFG75_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG75_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG75_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG75_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG75_CTRL2    0x0de3
-+#define    RTL8367C_SVLAN_C2SCFG75_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG75_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG76_CTRL0    0x0de4
-+#define    RTL8367C_SVLAN_C2SCFG76_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG76_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG76_CTRL1    0x0de5
-+#define    RTL8367C_SVLAN_C2SCFG76_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG76_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG76_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG76_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG76_CTRL2    0x0de6
-+#define    RTL8367C_SVLAN_C2SCFG76_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG76_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG77_CTRL0    0x0de7
-+#define    RTL8367C_SVLAN_C2SCFG77_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG77_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG77_CTRL1    0x0de8
-+#define    RTL8367C_SVLAN_C2SCFG77_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG77_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG77_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG77_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG77_CTRL2    0x0de9
-+#define    RTL8367C_SVLAN_C2SCFG77_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG77_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG78_CTRL0    0x0dea
-+#define    RTL8367C_SVLAN_C2SCFG78_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG78_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG78_CTRL1    0x0deb
-+#define    RTL8367C_SVLAN_C2SCFG78_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG78_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG78_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG78_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG78_CTRL2    0x0dec
-+#define    RTL8367C_SVLAN_C2SCFG78_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG78_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG79_CTRL0    0x0ded
-+#define    RTL8367C_SVLAN_C2SCFG79_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG79_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG79_CTRL1    0x0dee
-+#define    RTL8367C_SVLAN_C2SCFG79_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG79_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG79_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG79_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG79_CTRL2    0x0def
-+#define    RTL8367C_SVLAN_C2SCFG79_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG79_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG80_CTRL0    0x0df0
-+#define    RTL8367C_SVLAN_C2SCFG80_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG80_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG80_CTRL1    0x0df1
-+#define    RTL8367C_SVLAN_C2SCFG80_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG80_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG80_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG80_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG80_CTRL2    0x0df2
-+#define    RTL8367C_SVLAN_C2SCFG80_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG80_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG81_CTRL0    0x0df3
-+#define    RTL8367C_SVLAN_C2SCFG81_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG81_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG81_CTRL1    0x0df4
-+#define    RTL8367C_SVLAN_C2SCFG81_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG81_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG81_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG81_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG81_CTRL2    0x0df5
-+#define    RTL8367C_SVLAN_C2SCFG81_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG81_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG82_CTRL0    0x0df6
-+#define    RTL8367C_SVLAN_C2SCFG82_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG82_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG82_CTRL1    0x0df7
-+#define    RTL8367C_SVLAN_C2SCFG82_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG82_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG82_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG82_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG82_CTRL2    0x0df8
-+#define    RTL8367C_SVLAN_C2SCFG82_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG82_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG83_CTRL0    0x0df9
-+#define    RTL8367C_SVLAN_C2SCFG83_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG83_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG83_CTRL1    0x0dfa
-+#define    RTL8367C_SVLAN_C2SCFG83_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG83_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG83_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG83_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG83_CTRL2    0x0dfb
-+#define    RTL8367C_SVLAN_C2SCFG83_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG83_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG84_CTRL0    0x0dfc
-+#define    RTL8367C_SVLAN_C2SCFG84_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG84_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG84_CTRL1    0x0dfd
-+#define    RTL8367C_SVLAN_C2SCFG84_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG84_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG84_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG84_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG84_CTRL2    0x0dfe
-+#define    RTL8367C_SVLAN_C2SCFG84_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG84_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG85_CTRL0    0x0dff
-+#define    RTL8367C_SVLAN_C2SCFG85_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG85_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG85_CTRL1    0x0e00
-+#define    RTL8367C_SVLAN_C2SCFG85_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG85_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG85_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG85_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG85_CTRL2    0x0e01
-+#define    RTL8367C_SVLAN_C2SCFG85_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG85_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG86_CTRL0    0x0e02
-+#define    RTL8367C_SVLAN_C2SCFG86_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG86_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG86_CTRL1    0x0e03
-+#define    RTL8367C_SVLAN_C2SCFG86_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG86_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG86_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG86_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG86_CTRL2    0x0e04
-+#define    RTL8367C_SVLAN_C2SCFG86_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG86_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG87_CTRL0    0x0e05
-+#define    RTL8367C_SVLAN_C2SCFG87_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG87_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG87_CTRL1    0x0e06
-+#define    RTL8367C_SVLAN_C2SCFG87_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG87_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG87_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG87_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG87_CTRL2    0x0e07
-+#define    RTL8367C_SVLAN_C2SCFG87_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG87_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG88_CTRL0    0x0e08
-+#define    RTL8367C_SVLAN_C2SCFG88_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG88_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG88_CTRL1    0x0e09
-+#define    RTL8367C_SVLAN_C2SCFG88_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG88_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG88_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG88_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG88_CTRL2    0x0e0a
-+#define    RTL8367C_SVLAN_C2SCFG88_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG88_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG89_CTRL0    0x0e0b
-+#define    RTL8367C_SVLAN_C2SCFG89_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG89_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG89_CTRL1    0x0e0c
-+#define    RTL8367C_SVLAN_C2SCFG89_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG89_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG89_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG89_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG89_CTRL2    0x0e0d
-+#define    RTL8367C_SVLAN_C2SCFG89_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG89_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG90_CTRL0    0x0e0e
-+#define    RTL8367C_SVLAN_C2SCFG90_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG90_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG90_CTRL1    0x0e0f
-+#define    RTL8367C_SVLAN_C2SCFG90_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG90_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG90_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG90_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG90_CTRL2    0x0e10
-+#define    RTL8367C_SVLAN_C2SCFG90_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG90_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG91_CTRL0    0x0e11
-+#define    RTL8367C_SVLAN_C2SCFG91_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG91_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG91_CTRL1    0x0e12
-+#define    RTL8367C_SVLAN_C2SCFG91_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG91_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG91_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG91_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG91_CTRL2    0x0e13
-+#define    RTL8367C_SVLAN_C2SCFG91_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG91_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG92_CTRL0    0x0e14
-+#define    RTL8367C_SVLAN_C2SCFG92_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG92_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG92_CTRL1    0x0e15
-+#define    RTL8367C_SVLAN_C2SCFG92_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG92_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG92_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG92_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG92_CTRL2    0x0e16
-+#define    RTL8367C_SVLAN_C2SCFG92_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG92_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG93_CTRL0    0x0e17
-+#define    RTL8367C_SVLAN_C2SCFG93_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG93_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG93_CTRL1    0x0e18
-+#define    RTL8367C_SVLAN_C2SCFG93_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG93_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG93_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG93_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG93_CTRL2    0x0e19
-+#define    RTL8367C_SVLAN_C2SCFG93_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG93_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG94_CTRL0    0x0e1a
-+#define    RTL8367C_SVLAN_C2SCFG94_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG94_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG94_CTRL1    0x0e1b
-+#define    RTL8367C_SVLAN_C2SCFG94_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG94_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG94_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG94_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG94_CTRL2    0x0e1c
-+#define    RTL8367C_SVLAN_C2SCFG94_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG94_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG95_CTRL0    0x0e1d
-+#define    RTL8367C_SVLAN_C2SCFG95_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG95_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG95_CTRL1    0x0e1e
-+#define    RTL8367C_SVLAN_C2SCFG95_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG95_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG95_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG95_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG95_CTRL2    0x0e1f
-+#define    RTL8367C_SVLAN_C2SCFG95_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG95_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG96_CTRL0    0x0e20
-+#define    RTL8367C_SVLAN_C2SCFG96_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG96_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG96_CTRL1    0x0e21
-+#define    RTL8367C_SVLAN_C2SCFG96_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG96_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG96_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG96_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG96_CTRL2    0x0e22
-+#define    RTL8367C_SVLAN_C2SCFG96_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG96_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG97_CTRL0    0x0e23
-+#define    RTL8367C_SVLAN_C2SCFG97_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG97_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG97_CTRL1    0x0e24
-+#define    RTL8367C_SVLAN_C2SCFG97_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG97_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG97_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG97_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG97_CTRL2    0x0e25
-+#define    RTL8367C_SVLAN_C2SCFG97_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG97_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG98_CTRL0    0x0e26
-+#define    RTL8367C_SVLAN_C2SCFG98_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG98_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG98_CTRL1    0x0e27
-+#define    RTL8367C_SVLAN_C2SCFG98_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG98_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG98_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG98_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG98_CTRL2    0x0e28
-+#define    RTL8367C_SVLAN_C2SCFG98_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG98_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG99_CTRL0    0x0e29
-+#define    RTL8367C_SVLAN_C2SCFG99_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG99_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG99_CTRL1    0x0e2a
-+#define    RTL8367C_SVLAN_C2SCFG99_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG99_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG99_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG99_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG99_CTRL2    0x0e2b
-+#define    RTL8367C_SVLAN_C2SCFG99_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG99_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG100_CTRL0    0x0e2c
-+#define    RTL8367C_SVLAN_C2SCFG100_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG100_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG100_CTRL1    0x0e2d
-+#define    RTL8367C_SVLAN_C2SCFG100_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG100_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG100_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG100_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG100_CTRL2    0x0e2e
-+#define    RTL8367C_SVLAN_C2SCFG100_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG100_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG101_CTRL0    0x0e2f
-+#define    RTL8367C_SVLAN_C2SCFG101_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG101_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG101_CTRL1    0x0e30
-+#define    RTL8367C_SVLAN_C2SCFG101_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG101_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG101_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG101_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG101_CTRL2    0x0e31
-+#define    RTL8367C_SVLAN_C2SCFG101_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG101_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG102_CTRL0    0x0e32
-+#define    RTL8367C_SVLAN_C2SCFG102_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG102_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG102_CTRL1    0x0e33
-+#define    RTL8367C_SVLAN_C2SCFG102_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG102_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG102_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG102_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG102_CTRL2    0x0e34
-+#define    RTL8367C_SVLAN_C2SCFG102_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG102_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG103_CTRL0    0x0e35
-+#define    RTL8367C_SVLAN_C2SCFG103_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG103_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG103_CTRL1    0x0e36
-+#define    RTL8367C_SVLAN_C2SCFG103_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG103_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG103_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG103_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG103_CTRL2    0x0e37
-+#define    RTL8367C_SVLAN_C2SCFG103_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG103_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG104_CTRL0    0x0e38
-+#define    RTL8367C_SVLAN_C2SCFG104_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG104_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG104_CTRL1    0x0e39
-+#define    RTL8367C_SVLAN_C2SCFG104_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG104_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG104_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG104_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG104_CTRL2    0x0e3a
-+#define    RTL8367C_SVLAN_C2SCFG104_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG104_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG105_CTRL0    0x0e3b
-+#define    RTL8367C_SVLAN_C2SCFG105_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG105_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG105_CTRL1    0x0e3c
-+#define    RTL8367C_SVLAN_C2SCFG105_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG105_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG105_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG105_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG105_CTRL2    0x0e3d
-+#define    RTL8367C_SVLAN_C2SCFG105_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG105_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG106_CTRL0    0x0e3e
-+#define    RTL8367C_SVLAN_C2SCFG106_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG106_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG106_CTRL1    0x0e3f
-+#define    RTL8367C_SVLAN_C2SCFG106_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG106_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG106_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG106_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG106_CTRL2    0x0e40
-+#define    RTL8367C_SVLAN_C2SCFG106_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG106_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG107_CTRL0    0x0e41
-+#define    RTL8367C_SVLAN_C2SCFG107_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG107_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG107_CTRL1    0x0e42
-+#define    RTL8367C_SVLAN_C2SCFG107_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG107_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG107_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG107_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG107_CTRL2    0x0e43
-+#define    RTL8367C_SVLAN_C2SCFG107_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG107_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG108_CTRL0    0x0e44
-+#define    RTL8367C_SVLAN_C2SCFG108_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG108_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG108_CTRL1    0x0e45
-+#define    RTL8367C_SVLAN_C2SCFG108_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG108_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG108_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG108_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG108_CTRL2    0x0e46
-+#define    RTL8367C_SVLAN_C2SCFG108_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG108_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG109_CTRL0    0x0e47
-+#define    RTL8367C_SVLAN_C2SCFG109_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG109_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG109_CTRL1    0x0e48
-+#define    RTL8367C_SVLAN_C2SCFG109_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG109_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG109_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG109_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG109_CTRL2    0x0e49
-+#define    RTL8367C_SVLAN_C2SCFG109_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG109_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG110_CTRL0    0x0e4a
-+#define    RTL8367C_SVLAN_C2SCFG110_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG110_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG110_CTRL1    0x0e4b
-+#define    RTL8367C_SVLAN_C2SCFG110_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG110_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG110_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG110_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG110_CTRL2    0x0e4c
-+#define    RTL8367C_SVLAN_C2SCFG110_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG110_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG111_CTRL0    0x0e4d
-+#define    RTL8367C_SVLAN_C2SCFG111_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG111_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG111_CTRL1    0x0e4e
-+#define    RTL8367C_SVLAN_C2SCFG111_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG111_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG111_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG111_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG111_CTRL2    0x0e4f
-+#define    RTL8367C_SVLAN_C2SCFG111_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG111_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG112_CTRL0    0x0e50
-+#define    RTL8367C_SVLAN_C2SCFG112_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG112_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG112_CTRL1    0x0e51
-+#define    RTL8367C_SVLAN_C2SCFG112_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG112_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG112_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG112_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG112_CTRL2    0x0e52
-+#define    RTL8367C_SVLAN_C2SCFG112_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG112_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG113_CTRL0    0x0e53
-+#define    RTL8367C_SVLAN_C2SCFG113_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG113_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG113_CTRL1    0x0e54
-+#define    RTL8367C_SVLAN_C2SCFG113_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG113_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG113_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG113_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG113_CTRL2    0x0e55
-+#define    RTL8367C_SVLAN_C2SCFG113_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG113_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG114_CTRL0    0x0e56
-+#define    RTL8367C_SVLAN_C2SCFG114_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG114_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG114_CTRL1    0x0e57
-+#define    RTL8367C_SVLAN_C2SCFG114_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG114_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG114_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG114_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG114_CTRL2    0x0e58
-+#define    RTL8367C_SVLAN_C2SCFG114_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG114_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG115_CTRL0    0x0e59
-+#define    RTL8367C_SVLAN_C2SCFG115_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG115_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG115_CTRL1    0x0e5a
-+#define    RTL8367C_SVLAN_C2SCFG115_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG115_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG115_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG115_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG115_CTRL2    0x0e5b
-+#define    RTL8367C_SVLAN_C2SCFG115_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG115_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG116_CTRL0    0x0e5c
-+#define    RTL8367C_SVLAN_C2SCFG116_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG116_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG116_CTRL1    0x0e5d
-+#define    RTL8367C_SVLAN_C2SCFG116_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG116_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG116_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG116_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG116_CTRL2    0x0e5e
-+#define    RTL8367C_SVLAN_C2SCFG116_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG116_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG117_CTRL0    0x0e5f
-+#define    RTL8367C_SVLAN_C2SCFG117_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG117_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG117_CTRL1    0x0e60
-+#define    RTL8367C_SVLAN_C2SCFG117_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG117_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG117_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG117_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG117_CTRL2    0x0e61
-+#define    RTL8367C_SVLAN_C2SCFG117_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG117_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG118_CTRL0    0x0e62
-+#define    RTL8367C_SVLAN_C2SCFG118_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG118_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG118_CTRL1    0x0e63
-+#define    RTL8367C_SVLAN_C2SCFG118_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG118_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG118_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG118_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG118_CTRL2    0x0e64
-+#define    RTL8367C_SVLAN_C2SCFG118_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG118_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG119_CTRL0    0x0e65
-+#define    RTL8367C_SVLAN_C2SCFG119_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG119_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG119_CTRL1    0x0e66
-+#define    RTL8367C_SVLAN_C2SCFG119_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG119_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG119_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG119_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG119_CTRL2    0x0e67
-+#define    RTL8367C_SVLAN_C2SCFG119_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG119_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG120_CTRL0    0x0e68
-+#define    RTL8367C_SVLAN_C2SCFG120_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG120_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG120_CTRL1    0x0e69
-+#define    RTL8367C_SVLAN_C2SCFG120_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG120_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG120_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG120_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG120_CTRL2    0x0e6a
-+#define    RTL8367C_SVLAN_C2SCFG120_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG120_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG121_CTRL0    0x0e6b
-+#define    RTL8367C_SVLAN_C2SCFG121_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG121_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG121_CTRL1    0x0e6c
-+#define    RTL8367C_SVLAN_C2SCFG121_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG121_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG121_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG121_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG121_CTRL2    0x0e6d
-+#define    RTL8367C_SVLAN_C2SCFG121_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG121_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG122_CTRL0    0x0e6e
-+#define    RTL8367C_SVLAN_C2SCFG122_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG122_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG122_CTRL1    0x0e6f
-+#define    RTL8367C_SVLAN_C2SCFG122_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG122_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG122_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG122_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG122_CTRL2    0x0e70
-+#define    RTL8367C_SVLAN_C2SCFG122_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG122_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG123_CTRL0    0x0e71
-+#define    RTL8367C_SVLAN_C2SCFG123_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG123_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG123_CTRL1    0x0e72
-+#define    RTL8367C_SVLAN_C2SCFG123_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG123_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG123_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG123_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG123_CTRL2    0x0e73
-+#define    RTL8367C_SVLAN_C2SCFG123_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG123_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG124_CTRL0    0x0e74
-+#define    RTL8367C_SVLAN_C2SCFG124_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG124_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG124_CTRL1    0x0e75
-+#define    RTL8367C_SVLAN_C2SCFG124_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG124_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG124_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG124_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG124_CTRL2    0x0e76
-+#define    RTL8367C_SVLAN_C2SCFG124_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG124_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG125_CTRL0    0x0e77
-+#define    RTL8367C_SVLAN_C2SCFG125_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG125_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG125_CTRL1    0x0e78
-+#define    RTL8367C_SVLAN_C2SCFG125_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG125_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG125_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG125_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG125_CTRL2    0x0e79
-+#define    RTL8367C_SVLAN_C2SCFG125_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG125_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG126_CTRL0    0x0e7a
-+#define    RTL8367C_SVLAN_C2SCFG126_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG126_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG126_CTRL1    0x0e7b
-+#define    RTL8367C_SVLAN_C2SCFG126_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG126_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG126_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG126_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG126_CTRL2    0x0e7c
-+#define    RTL8367C_SVLAN_C2SCFG126_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG126_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG127_CTRL0    0x0e7d
-+#define    RTL8367C_SVLAN_C2SCFG127_CTRL0_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG127_CTRL0_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG127_CTRL1    0x0e7e
-+#define    RTL8367C_SVLAN_C2SCFG127_CTRL1_C2SENPMSK_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_C2SCFG127_CTRL1_C2SENPMSK_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_C2SCFG127_CTRL1_C2SENPMSK_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG127_CTRL1_C2SENPMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_SVLAN_C2SCFG127_CTRL2    0x0e7f
-+#define    RTL8367C_SVLAN_C2SCFG127_CTRL2_OFFSET    0
-+#define    RTL8367C_SVLAN_C2SCFG127_CTRL2_MASK    0x1FFF
-+
-+#define    RTL8367C_REG_SVLAN_CFG    0x0e80
-+#define    RTL8367C_VS_PORT7_DMACVIDSEL_OFFSET    14
-+#define    RTL8367C_VS_PORT7_DMACVIDSEL_MASK    0x4000
-+#define    RTL8367C_VS_PORT6_DMACVIDSEL_OFFSET    13
-+#define    RTL8367C_VS_PORT6_DMACVIDSEL_MASK    0x2000
-+#define    RTL8367C_VS_PORT5_DMACVIDSEL_OFFSET    12
-+#define    RTL8367C_VS_PORT5_DMACVIDSEL_MASK    0x1000
-+#define    RTL8367C_VS_PORT4_DMACVIDSEL_OFFSET    11
-+#define    RTL8367C_VS_PORT4_DMACVIDSEL_MASK    0x800
-+#define    RTL8367C_VS_PORT3_DMACVIDSEL_OFFSET    10
-+#define    RTL8367C_VS_PORT3_DMACVIDSEL_MASK    0x400
-+#define    RTL8367C_VS_PORT2_DMACVIDSEL_OFFSET    9
-+#define    RTL8367C_VS_PORT2_DMACVIDSEL_MASK    0x200
-+#define    RTL8367C_VS_PORT1_DMACVIDSEL_OFFSET    8
-+#define    RTL8367C_VS_PORT1_DMACVIDSEL_MASK    0x100
-+#define    RTL8367C_VS_PORT0_DMACVIDSEL_OFFSET    7
-+#define    RTL8367C_VS_PORT0_DMACVIDSEL_MASK    0x80
-+#define    RTL8367C_VS_UIFSEG_OFFSET    6
-+#define    RTL8367C_VS_UIFSEG_MASK    0x40
-+#define    RTL8367C_VS_UNMAT_OFFSET    4
-+#define    RTL8367C_VS_UNMAT_MASK    0x30
-+#define    RTL8367C_VS_UNTAG_OFFSET    2
-+#define    RTL8367C_VS_UNTAG_MASK    0xC
-+#define    RTL8367C_VS_SPRISEL_OFFSET    0
-+#define    RTL8367C_VS_SPRISEL_MASK    0x3
-+
-+#define    RTL8367C_REG_SVLAN_PORTBASED_SVIDX_CTRL0    0x0e81
-+#define    RTL8367C_VS_PORT1_SVIDX_OFFSET    8
-+#define    RTL8367C_VS_PORT1_SVIDX_MASK    0x3F00
-+#define    RTL8367C_VS_PORT0_SVIDX_OFFSET    0
-+#define    RTL8367C_VS_PORT0_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_PORTBASED_SVIDX_CTRL1    0x0e82
-+#define    RTL8367C_VS_PORT3_SVIDX_OFFSET    8
-+#define    RTL8367C_VS_PORT3_SVIDX_MASK    0x3F00
-+#define    RTL8367C_VS_PORT2_SVIDX_OFFSET    0
-+#define    RTL8367C_VS_PORT2_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_PORTBASED_SVIDX_CTRL2    0x0e83
-+#define    RTL8367C_VS_PORT5_SVIDX_OFFSET    8
-+#define    RTL8367C_VS_PORT5_SVIDX_MASK    0x3F00
-+#define    RTL8367C_VS_PORT4_SVIDX_OFFSET    0
-+#define    RTL8367C_VS_PORT4_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_PORTBASED_SVIDX_CTRL3    0x0e84
-+#define    RTL8367C_VS_PORT7_SVIDX_OFFSET    8
-+#define    RTL8367C_VS_PORT7_SVIDX_MASK    0x3F00
-+#define    RTL8367C_VS_PORT6_SVIDX_OFFSET    0
-+#define    RTL8367C_VS_PORT6_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_UNTAG_UNMAT_CFG    0x0e85
-+#define    RTL8367C_VS_UNTAG_SVIDX_OFFSET    8
-+#define    RTL8367C_VS_UNTAG_SVIDX_MASK    0x3F00
-+#define    RTL8367C_VS_UNMAT_SVIDX_OFFSET    0
-+#define    RTL8367C_VS_UNMAT_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_LOOKUP_TYPE    0x0e86
-+#define    RTL8367C_SVLAN_LOOKUP_TYPE_OFFSET    0
-+#define    RTL8367C_SVLAN_LOOKUP_TYPE_MASK    0x1
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VALID_15_0    0x0e87
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VALID_31_16    0x0e88
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VALID_47_32    0x0e89
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VALID_63_48    0x0e8a
-+
-+#define    RTL8367C_REG_SVLAN_PORTBASED_SVIDX_CTRL4    0x0e8b
-+#define    RTL8367C_VS_PORT9_SVIDX_OFFSET    8
-+#define    RTL8367C_VS_PORT9_SVIDX_MASK    0x3F00
-+#define    RTL8367C_VS_PORT8_SVIDX_OFFSET    0
-+#define    RTL8367C_VS_PORT8_SVIDX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_PORTBASED_SVIDX_CTRL5    0x0e8c
-+#define    RTL8367C_SVLAN_PORTBASED_SVIDX_CTRL5_OFFSET    0
-+#define    RTL8367C_SVLAN_PORTBASED_SVIDX_CTRL5_MASK    0x3F
-+
-+#define    RTL8367C_REG_SVLAN_CFG_EXT    0x0e8d
-+#define    RTL8367C_VS_PORT10_DMACVIDSEL_OFFSET    2
-+#define    RTL8367C_VS_PORT10_DMACVIDSEL_MASK    0x4
-+#define    RTL8367C_VS_PORT9_DMACVIDSEL_OFFSET    1
-+#define    RTL8367C_VS_PORT9_DMACVIDSEL_MASK    0x2
-+#define    RTL8367C_VS_PORT8_DMACVIDSEL_OFFSET    0
-+#define    RTL8367C_VS_PORT8_DMACVIDSEL_MASK    0x1
-+
-+#define    RTL8367C_REG_SVLAN_MEMBERCFG63_CTRL4    0x0e8e
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL4_VS_UNTAGSET_EXT_OFFSET    8
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL4_VS_UNTAGSET_EXT_MASK    0x700
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL4_VS_SMBR_EXT_OFFSET    0
-+#define    RTL8367C_SVLAN_MEMBERCFG63_CTRL4_VS_SMBR_EXT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_0    0x0e90
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_1    0x0e91
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_2    0x0e92
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_3    0x0e93
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_4    0x0e94
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_5    0x0e95
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_6    0x0e96
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_7    0x0e97
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_8    0x0e98
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_9    0x0e99
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_10    0x0e9a
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_11    0x0e9b
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_12    0x0e9c
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_13    0x0e9d
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_14    0x0e9e
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_15    0x0e9f
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_16    0x0ea0
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_17    0x0ea1
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_18    0x0ea2
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_19    0x0ea3
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_20    0x0ea4
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_21    0x0ea5
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_22    0x0ea6
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_23    0x0ea7
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_24    0x0ea8
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_25    0x0ea9
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_26    0x0eaa
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_27    0x0eab
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_28    0x0eac
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_29    0x0ead
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_30    0x0eae
-+
-+#define    RTL8367C_REG_SVLAN_DUMMY_31    0x0eaf
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_00    0x0eb0
-+#define    RTL8367C_IPMC_GROUP_VID_00_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_00_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_01    0x0eb1
-+#define    RTL8367C_IPMC_GROUP_VID_01_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_01_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_02    0x0eb2
-+#define    RTL8367C_IPMC_GROUP_VID_02_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_02_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_03    0x0eb3
-+#define    RTL8367C_IPMC_GROUP_VID_03_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_03_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_04    0x0eb4
-+#define    RTL8367C_IPMC_GROUP_VID_04_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_04_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_05    0x0eb5
-+#define    RTL8367C_IPMC_GROUP_VID_05_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_05_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_06    0x0eb6
-+#define    RTL8367C_IPMC_GROUP_VID_06_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_06_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_07    0x0eb7
-+#define    RTL8367C_IPMC_GROUP_VID_07_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_07_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_08    0x0eb8
-+#define    RTL8367C_IPMC_GROUP_VID_08_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_08_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_09    0x0eb9
-+#define    RTL8367C_IPMC_GROUP_VID_09_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_09_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_10    0x0eba
-+#define    RTL8367C_IPMC_GROUP_VID_10_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_10_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_11    0x0ebb
-+#define    RTL8367C_IPMC_GROUP_VID_11_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_11_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_12    0x0ebc
-+#define    RTL8367C_IPMC_GROUP_VID_12_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_12_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_13    0x0ebd
-+#define    RTL8367C_IPMC_GROUP_VID_13_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_13_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_14    0x0ebe
-+#define    RTL8367C_IPMC_GROUP_VID_14_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_14_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_15    0x0ebf
-+#define    RTL8367C_IPMC_GROUP_VID_15_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_15_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_16    0x0ec0
-+#define    RTL8367C_IPMC_GROUP_VID_16_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_16_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_17    0x0ec1
-+#define    RTL8367C_IPMC_GROUP_VID_17_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_17_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_18    0x0ec2
-+#define    RTL8367C_IPMC_GROUP_VID_18_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_18_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_19    0x0ec3
-+#define    RTL8367C_IPMC_GROUP_VID_19_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_19_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_20    0x0ec4
-+#define    RTL8367C_IPMC_GROUP_VID_20_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_20_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_21    0x0ec5
-+#define    RTL8367C_IPMC_GROUP_VID_21_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_21_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_22    0x0ec6
-+#define    RTL8367C_IPMC_GROUP_VID_22_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_22_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_23    0x0ec7
-+#define    RTL8367C_IPMC_GROUP_VID_23_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_23_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_24    0x0ec8
-+#define    RTL8367C_IPMC_GROUP_VID_24_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_24_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_25    0x0ec9
-+#define    RTL8367C_IPMC_GROUP_VID_25_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_25_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_26    0x0eca
-+#define    RTL8367C_IPMC_GROUP_VID_26_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_26_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_27    0x0ecb
-+#define    RTL8367C_IPMC_GROUP_VID_27_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_27_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_28    0x0ecc
-+#define    RTL8367C_IPMC_GROUP_VID_28_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_28_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_29    0x0ecd
-+#define    RTL8367C_IPMC_GROUP_VID_29_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_29_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_30    0x0ece
-+#define    RTL8367C_IPMC_GROUP_VID_30_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_30_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_31    0x0ecf
-+#define    RTL8367C_IPMC_GROUP_VID_31_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_31_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_32    0x0ed0
-+#define    RTL8367C_IPMC_GROUP_VID_32_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_32_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_33    0x0ed1
-+#define    RTL8367C_IPMC_GROUP_VID_33_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_33_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_34    0x0ed2
-+#define    RTL8367C_IPMC_GROUP_VID_34_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_34_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_35    0x0ed3
-+#define    RTL8367C_IPMC_GROUP_VID_35_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_35_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_36    0x0ed4
-+#define    RTL8367C_IPMC_GROUP_VID_36_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_36_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_37    0x0ed5
-+#define    RTL8367C_IPMC_GROUP_VID_37_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_37_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_38    0x0ed6
-+#define    RTL8367C_IPMC_GROUP_VID_38_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_38_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_39    0x0ed7
-+#define    RTL8367C_IPMC_GROUP_VID_39_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_39_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_40    0x0ed8
-+#define    RTL8367C_IPMC_GROUP_VID_40_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_40_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_41    0x0ed9
-+#define    RTL8367C_IPMC_GROUP_VID_41_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_41_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_42    0x0eda
-+#define    RTL8367C_IPMC_GROUP_VID_42_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_42_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_43    0x0edb
-+#define    RTL8367C_IPMC_GROUP_VID_43_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_43_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_44    0x0edc
-+#define    RTL8367C_IPMC_GROUP_VID_44_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_44_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_45    0x0edd
-+#define    RTL8367C_IPMC_GROUP_VID_45_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_45_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_46    0x0ede
-+#define    RTL8367C_IPMC_GROUP_VID_46_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_46_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_47    0x0edf
-+#define    RTL8367C_IPMC_GROUP_VID_47_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_47_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_48    0x0ef0
-+#define    RTL8367C_IPMC_GROUP_VID_48_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_48_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_49    0x0ef1
-+#define    RTL8367C_IPMC_GROUP_VID_49_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_49_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_50    0x0ef2
-+#define    RTL8367C_IPMC_GROUP_VID_50_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_50_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_51    0x0ef3
-+#define    RTL8367C_IPMC_GROUP_VID_51_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_51_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_52    0x0ef4
-+#define    RTL8367C_IPMC_GROUP_VID_52_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_52_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_53    0x0ef5
-+#define    RTL8367C_IPMC_GROUP_VID_53_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_53_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_54    0x0ef6
-+#define    RTL8367C_IPMC_GROUP_VID_54_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_54_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_55    0x0ef7
-+#define    RTL8367C_IPMC_GROUP_VID_55_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_55_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_56    0x0ef8
-+#define    RTL8367C_IPMC_GROUP_VID_56_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_56_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_57    0x0ef9
-+#define    RTL8367C_IPMC_GROUP_VID_57_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_57_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_58    0x0efa
-+#define    RTL8367C_IPMC_GROUP_VID_58_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_58_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_59    0x0efb
-+#define    RTL8367C_IPMC_GROUP_VID_59_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_59_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_60    0x0efc
-+#define    RTL8367C_IPMC_GROUP_VID_60_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_60_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_61    0x0efd
-+#define    RTL8367C_IPMC_GROUP_VID_61_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_61_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_62    0x0efe
-+#define    RTL8367C_IPMC_GROUP_VID_62_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_62_MASK    0xFFF
-+
-+#define    RTL8367C_REG_IPMC_GROUP_VID_63    0x0eff
-+#define    RTL8367C_IPMC_GROUP_VID_63_OFFSET    0
-+#define    RTL8367C_IPMC_GROUP_VID_63_MASK    0xFFF
-+
-+/* (16'h0f00)hsactrl_reg */
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY0_CTRL0    0x0f00
-+#define    RTL8367C_SVLAN_SP2C_ENTRY0_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY0_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY0_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY0_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY0_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY0_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY0_CTRL1    0x0f01
-+#define    RTL8367C_SVLAN_SP2C_ENTRY0_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY0_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY0_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY0_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY1_CTRL0    0x0f02
-+#define    RTL8367C_SVLAN_SP2C_ENTRY1_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY1_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY1_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY1_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY1_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY1_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY1_CTRL1    0x0f03
-+#define    RTL8367C_SVLAN_SP2C_ENTRY1_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY1_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY1_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY1_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY2_CTRL0    0x0f04
-+#define    RTL8367C_SVLAN_SP2C_ENTRY2_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY2_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY2_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY2_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY2_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY2_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY2_CTRL1    0x0f05
-+#define    RTL8367C_SVLAN_SP2C_ENTRY2_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY2_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY2_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY2_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY3_CTRL0    0x0f06
-+#define    RTL8367C_SVLAN_SP2C_ENTRY3_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY3_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY3_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY3_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY3_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY3_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY3_CTRL1    0x0f07
-+#define    RTL8367C_SVLAN_SP2C_ENTRY3_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY3_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY3_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY3_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY4_CTRL0    0x0f08
-+#define    RTL8367C_SVLAN_SP2C_ENTRY4_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY4_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY4_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY4_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY4_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY4_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY4_CTRL1    0x0f09
-+#define    RTL8367C_SVLAN_SP2C_ENTRY4_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY4_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY4_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY4_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY5_CTRL0    0x0f0a
-+#define    RTL8367C_SVLAN_SP2C_ENTRY5_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY5_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY5_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY5_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY5_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY5_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY5_CTRL1    0x0f0b
-+#define    RTL8367C_SVLAN_SP2C_ENTRY5_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY5_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY5_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY5_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY6_CTRL0    0x0f0c
-+#define    RTL8367C_SVLAN_SP2C_ENTRY6_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY6_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY6_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY6_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY6_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY6_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY6_CTRL1    0x0f0d
-+#define    RTL8367C_SVLAN_SP2C_ENTRY6_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY6_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY6_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY6_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY7_CTRL0    0x0f0e
-+#define    RTL8367C_SVLAN_SP2C_ENTRY7_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY7_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY7_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY7_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY7_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY7_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY7_CTRL1    0x0f0f
-+#define    RTL8367C_SVLAN_SP2C_ENTRY7_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY7_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY7_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY7_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY8_CTRL0    0x0f10
-+#define    RTL8367C_SVLAN_SP2C_ENTRY8_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY8_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY8_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY8_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY8_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY8_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY8_CTRL1    0x0f11
-+#define    RTL8367C_SVLAN_SP2C_ENTRY8_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY8_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY8_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY8_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY9_CTRL0    0x0f12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY9_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY9_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY9_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY9_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY9_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY9_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY9_CTRL1    0x0f13
-+#define    RTL8367C_SVLAN_SP2C_ENTRY9_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY9_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY9_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY9_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY10_CTRL0    0x0f14
-+#define    RTL8367C_SVLAN_SP2C_ENTRY10_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY10_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY10_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY10_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY10_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY10_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY10_CTRL1    0x0f15
-+#define    RTL8367C_SVLAN_SP2C_ENTRY10_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY10_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY10_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY10_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY11_CTRL0    0x0f16
-+#define    RTL8367C_SVLAN_SP2C_ENTRY11_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY11_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY11_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY11_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY11_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY11_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY11_CTRL1    0x0f17
-+#define    RTL8367C_SVLAN_SP2C_ENTRY11_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY11_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY11_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY11_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY12_CTRL0    0x0f18
-+#define    RTL8367C_SVLAN_SP2C_ENTRY12_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY12_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY12_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY12_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY12_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY12_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY12_CTRL1    0x0f19
-+#define    RTL8367C_SVLAN_SP2C_ENTRY12_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY12_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY12_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY12_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY13_CTRL0    0x0f1a
-+#define    RTL8367C_SVLAN_SP2C_ENTRY13_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY13_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY13_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY13_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY13_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY13_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY13_CTRL1    0x0f1b
-+#define    RTL8367C_SVLAN_SP2C_ENTRY13_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY13_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY13_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY13_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY14_CTRL0    0x0f1c
-+#define    RTL8367C_SVLAN_SP2C_ENTRY14_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY14_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY14_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY14_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY14_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY14_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY14_CTRL1    0x0f1d
-+#define    RTL8367C_SVLAN_SP2C_ENTRY14_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY14_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY14_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY14_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY15_CTRL0    0x0f1e
-+#define    RTL8367C_SVLAN_SP2C_ENTRY15_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY15_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY15_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY15_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY15_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY15_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY15_CTRL1    0x0f1f
-+#define    RTL8367C_SVLAN_SP2C_ENTRY15_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY15_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY15_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY15_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY16_CTRL0    0x0f20
-+#define    RTL8367C_SVLAN_SP2C_ENTRY16_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY16_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY16_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY16_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY16_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY16_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY16_CTRL1    0x0f21
-+#define    RTL8367C_SVLAN_SP2C_ENTRY16_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY16_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY16_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY16_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY17_CTRL0    0x0f22
-+#define    RTL8367C_SVLAN_SP2C_ENTRY17_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY17_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY17_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY17_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY17_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY17_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY17_CTRL1    0x0f23
-+#define    RTL8367C_SVLAN_SP2C_ENTRY17_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY17_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY17_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY17_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY18_CTRL0    0x0f24
-+#define    RTL8367C_SVLAN_SP2C_ENTRY18_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY18_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY18_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY18_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY18_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY18_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY18_CTRL1    0x0f25
-+#define    RTL8367C_SVLAN_SP2C_ENTRY18_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY18_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY18_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY18_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY19_CTRL0    0x0f26
-+#define    RTL8367C_SVLAN_SP2C_ENTRY19_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY19_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY19_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY19_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY19_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY19_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY19_CTRL1    0x0f27
-+#define    RTL8367C_SVLAN_SP2C_ENTRY19_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY19_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY19_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY19_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY20_CTRL0    0x0f28
-+#define    RTL8367C_SVLAN_SP2C_ENTRY20_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY20_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY20_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY20_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY20_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY20_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY20_CTRL1    0x0f29
-+#define    RTL8367C_SVLAN_SP2C_ENTRY20_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY20_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY20_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY20_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY21_CTRL0    0x0f2a
-+#define    RTL8367C_SVLAN_SP2C_ENTRY21_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY21_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY21_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY21_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY21_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY21_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY21_CTRL1    0x0f2b
-+#define    RTL8367C_SVLAN_SP2C_ENTRY21_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY21_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY21_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY21_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY22_CTRL0    0x0f2c
-+#define    RTL8367C_SVLAN_SP2C_ENTRY22_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY22_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY22_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY22_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY22_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY22_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY22_CTRL1    0x0f2d
-+#define    RTL8367C_SVLAN_SP2C_ENTRY22_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY22_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY22_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY22_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY23_CTRL0    0x0f2e
-+#define    RTL8367C_SVLAN_SP2C_ENTRY23_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY23_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY23_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY23_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY23_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY23_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY23_CTRL1    0x0f2f
-+#define    RTL8367C_SVLAN_SP2C_ENTRY23_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY23_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY23_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY23_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY24_CTRL0    0x0f30
-+#define    RTL8367C_SVLAN_SP2C_ENTRY24_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY24_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY24_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY24_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY24_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY24_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY24_CTRL1    0x0f31
-+#define    RTL8367C_SVLAN_SP2C_ENTRY24_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY24_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY24_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY24_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY25_CTRL0    0x0f32
-+#define    RTL8367C_SVLAN_SP2C_ENTRY25_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY25_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY25_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY25_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY25_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY25_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY25_CTRL1    0x0f33
-+#define    RTL8367C_SVLAN_SP2C_ENTRY25_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY25_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY25_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY25_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY26_CTRL0    0x0f34
-+#define    RTL8367C_SVLAN_SP2C_ENTRY26_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY26_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY26_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY26_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY26_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY26_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY26_CTRL1    0x0f35
-+#define    RTL8367C_SVLAN_SP2C_ENTRY26_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY26_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY26_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY26_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY27_CTRL0    0x0f36
-+#define    RTL8367C_SVLAN_SP2C_ENTRY27_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY27_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY27_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY27_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY27_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY27_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY27_CTRL1    0x0f37
-+#define    RTL8367C_SVLAN_SP2C_ENTRY27_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY27_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY27_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY27_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY28_CTRL0    0x0f38
-+#define    RTL8367C_SVLAN_SP2C_ENTRY28_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY28_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY28_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY28_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY28_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY28_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY28_CTRL1    0x0f39
-+#define    RTL8367C_SVLAN_SP2C_ENTRY28_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY28_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY28_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY28_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY29_CTRL0    0x0f3a
-+#define    RTL8367C_SVLAN_SP2C_ENTRY29_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY29_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY29_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY29_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY29_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY29_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY29_CTRL1    0x0f3b
-+#define    RTL8367C_SVLAN_SP2C_ENTRY29_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY29_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY29_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY29_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY30_CTRL0    0x0f3c
-+#define    RTL8367C_SVLAN_SP2C_ENTRY30_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY30_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY30_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY30_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY30_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY30_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY30_CTRL1    0x0f3d
-+#define    RTL8367C_SVLAN_SP2C_ENTRY30_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY30_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY30_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY30_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY31_CTRL0    0x0f3e
-+#define    RTL8367C_SVLAN_SP2C_ENTRY31_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY31_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY31_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY31_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY31_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY31_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY31_CTRL1    0x0f3f
-+#define    RTL8367C_SVLAN_SP2C_ENTRY31_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY31_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY31_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY31_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY32_CTRL0    0x0f40
-+#define    RTL8367C_SVLAN_SP2C_ENTRY32_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY32_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY32_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY32_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY32_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY32_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY32_CTRL1    0x0f41
-+#define    RTL8367C_SVLAN_SP2C_ENTRY32_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY32_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY32_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY32_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY33_CTRL0    0x0f42
-+#define    RTL8367C_SVLAN_SP2C_ENTRY33_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY33_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY33_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY33_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY33_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY33_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY33_CTRL1    0x0f43
-+#define    RTL8367C_SVLAN_SP2C_ENTRY33_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY33_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY33_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY33_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY34_CTRL0    0x0f44
-+#define    RTL8367C_SVLAN_SP2C_ENTRY34_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY34_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY34_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY34_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY34_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY34_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY34_CTRL1    0x0f45
-+#define    RTL8367C_SVLAN_SP2C_ENTRY34_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY34_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY34_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY34_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY35_CTRL0    0x0f46
-+#define    RTL8367C_SVLAN_SP2C_ENTRY35_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY35_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY35_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY35_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY35_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY35_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY35_CTRL1    0x0f47
-+#define    RTL8367C_SVLAN_SP2C_ENTRY35_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY35_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY35_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY35_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY36_CTRL0    0x0f48
-+#define    RTL8367C_SVLAN_SP2C_ENTRY36_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY36_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY36_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY36_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY36_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY36_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY36_CTRL1    0x0f49
-+#define    RTL8367C_SVLAN_SP2C_ENTRY36_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY36_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY36_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY36_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY37_CTRL0    0x0f4a
-+#define    RTL8367C_SVLAN_SP2C_ENTRY37_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY37_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY37_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY37_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY37_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY37_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY37_CTRL1    0x0f4b
-+#define    RTL8367C_SVLAN_SP2C_ENTRY37_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY37_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY37_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY37_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY38_CTRL0    0x0f4c
-+#define    RTL8367C_SVLAN_SP2C_ENTRY38_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY38_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY38_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY38_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY38_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY38_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY38_CTRL1    0x0f4d
-+#define    RTL8367C_SVLAN_SP2C_ENTRY38_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY38_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY38_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY38_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY39_CTRL0    0x0f4e
-+#define    RTL8367C_SVLAN_SP2C_ENTRY39_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY39_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY39_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY39_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY39_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY39_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY39_CTRL1    0x0f4f
-+#define    RTL8367C_SVLAN_SP2C_ENTRY39_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY39_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY39_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY39_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY40_CTRL0    0x0f50
-+#define    RTL8367C_SVLAN_SP2C_ENTRY40_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY40_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY40_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY40_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY40_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY40_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY40_CTRL1    0x0f51
-+#define    RTL8367C_SVLAN_SP2C_ENTRY40_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY40_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY40_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY40_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY41_CTRL0    0x0f52
-+#define    RTL8367C_SVLAN_SP2C_ENTRY41_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY41_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY41_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY41_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY41_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY41_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY41_CTRL1    0x0f53
-+#define    RTL8367C_SVLAN_SP2C_ENTRY41_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY41_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY41_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY41_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY42_CTRL0    0x0f54
-+#define    RTL8367C_SVLAN_SP2C_ENTRY42_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY42_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY42_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY42_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY42_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY42_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY42_CTRL1    0x0f55
-+#define    RTL8367C_SVLAN_SP2C_ENTRY42_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY42_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY42_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY42_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY43_CTRL0    0x0f56
-+#define    RTL8367C_SVLAN_SP2C_ENTRY43_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY43_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY43_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY43_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY43_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY43_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY43_CTRL1    0x0f57
-+#define    RTL8367C_SVLAN_SP2C_ENTRY43_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY43_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY43_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY43_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY44_CTRL0    0x0f58
-+#define    RTL8367C_SVLAN_SP2C_ENTRY44_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY44_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY44_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY44_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY44_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY44_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY44_CTRL1    0x0f59
-+#define    RTL8367C_SVLAN_SP2C_ENTRY44_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY44_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY44_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY44_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY45_CTRL0    0x0f5a
-+#define    RTL8367C_SVLAN_SP2C_ENTRY45_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY45_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY45_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY45_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY45_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY45_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY45_CTRL1    0x0f5b
-+#define    RTL8367C_SVLAN_SP2C_ENTRY45_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY45_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY45_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY45_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY46_CTRL0    0x0f5c
-+#define    RTL8367C_SVLAN_SP2C_ENTRY46_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY46_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY46_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY46_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY46_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY46_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY46_CTRL1    0x0f5d
-+#define    RTL8367C_SVLAN_SP2C_ENTRY46_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY46_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY46_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY46_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY47_CTRL0    0x0f5e
-+#define    RTL8367C_SVLAN_SP2C_ENTRY47_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY47_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY47_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY47_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY47_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY47_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY47_CTRL1    0x0f5f
-+#define    RTL8367C_SVLAN_SP2C_ENTRY47_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY47_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY47_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY47_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY48_CTRL0    0x0f60
-+#define    RTL8367C_SVLAN_SP2C_ENTRY48_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY48_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY48_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY48_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY48_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY48_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY48_CTRL1    0x0f61
-+#define    RTL8367C_SVLAN_SP2C_ENTRY48_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY48_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY48_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY48_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY49_CTRL0    0x0f62
-+#define    RTL8367C_SVLAN_SP2C_ENTRY49_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY49_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY49_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY49_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY49_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY49_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY49_CTRL1    0x0f63
-+#define    RTL8367C_SVLAN_SP2C_ENTRY49_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY49_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY49_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY49_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY50_CTRL0    0x0f64
-+#define    RTL8367C_SVLAN_SP2C_ENTRY50_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY50_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY50_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY50_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY50_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY50_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY50_CTRL1    0x0f65
-+#define    RTL8367C_SVLAN_SP2C_ENTRY50_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY50_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY50_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY50_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY51_CTRL0    0x0f66
-+#define    RTL8367C_SVLAN_SP2C_ENTRY51_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY51_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY51_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY51_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY51_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY51_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY51_CTRL1    0x0f67
-+#define    RTL8367C_SVLAN_SP2C_ENTRY51_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY51_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY51_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY51_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY52_CTRL0    0x0f68
-+#define    RTL8367C_SVLAN_SP2C_ENTRY52_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY52_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY52_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY52_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY52_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY52_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY52_CTRL1    0x0f69
-+#define    RTL8367C_SVLAN_SP2C_ENTRY52_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY52_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY52_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY52_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY53_CTRL0    0x0f6a
-+#define    RTL8367C_SVLAN_SP2C_ENTRY53_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY53_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY53_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY53_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY53_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY53_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY53_CTRL1    0x0f6b
-+#define    RTL8367C_SVLAN_SP2C_ENTRY53_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY53_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY53_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY53_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY54_CTRL0    0x0f6c
-+#define    RTL8367C_SVLAN_SP2C_ENTRY54_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY54_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY54_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY54_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY54_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY54_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY54_CTRL1    0x0f6d
-+#define    RTL8367C_SVLAN_SP2C_ENTRY54_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY54_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY54_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY54_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY55_CTRL0    0x0f6e
-+#define    RTL8367C_SVLAN_SP2C_ENTRY55_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY55_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY55_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY55_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY55_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY55_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY55_CTRL1    0x0f6f
-+#define    RTL8367C_SVLAN_SP2C_ENTRY55_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY55_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY55_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY55_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY56_CTRL0    0x0f70
-+#define    RTL8367C_SVLAN_SP2C_ENTRY56_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY56_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY56_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY56_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY56_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY56_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY56_CTRL1    0x0f71
-+#define    RTL8367C_SVLAN_SP2C_ENTRY56_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY56_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY56_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY56_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY57_CTRL0    0x0f72
-+#define    RTL8367C_SVLAN_SP2C_ENTRY57_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY57_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY57_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY57_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY57_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY57_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY57_CTRL1    0x0f73
-+#define    RTL8367C_SVLAN_SP2C_ENTRY57_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY57_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY57_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY57_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY58_CTRL0    0x0f74
-+#define    RTL8367C_SVLAN_SP2C_ENTRY58_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY58_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY58_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY58_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY58_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY58_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY58_CTRL1    0x0f75
-+#define    RTL8367C_SVLAN_SP2C_ENTRY58_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY58_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY58_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY58_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY59_CTRL0    0x0f76
-+#define    RTL8367C_SVLAN_SP2C_ENTRY59_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY59_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY59_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY59_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY59_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY59_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY59_CTRL1    0x0f77
-+#define    RTL8367C_SVLAN_SP2C_ENTRY59_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY59_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY59_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY59_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY60_CTRL0    0x0f78
-+#define    RTL8367C_SVLAN_SP2C_ENTRY60_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY60_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY60_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY60_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY60_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY60_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY60_CTRL1    0x0f79
-+#define    RTL8367C_SVLAN_SP2C_ENTRY60_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY60_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY60_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY60_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY61_CTRL0    0x0f7a
-+#define    RTL8367C_SVLAN_SP2C_ENTRY61_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY61_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY61_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY61_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY61_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY61_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY61_CTRL1    0x0f7b
-+#define    RTL8367C_SVLAN_SP2C_ENTRY61_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY61_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY61_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY61_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY62_CTRL0    0x0f7c
-+#define    RTL8367C_SVLAN_SP2C_ENTRY62_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY62_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY62_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY62_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY62_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY62_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY62_CTRL1    0x0f7d
-+#define    RTL8367C_SVLAN_SP2C_ENTRY62_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY62_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY62_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY62_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY63_CTRL0    0x0f7e
-+#define    RTL8367C_SVLAN_SP2C_ENTRY63_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY63_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY63_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY63_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY63_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY63_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY63_CTRL1    0x0f7f
-+#define    RTL8367C_SVLAN_SP2C_ENTRY63_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY63_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY63_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY63_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY64_CTRL0    0x0f80
-+#define    RTL8367C_SVLAN_SP2C_ENTRY64_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY64_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY64_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY64_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY64_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY64_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY64_CTRL1    0x0f81
-+#define    RTL8367C_SVLAN_SP2C_ENTRY64_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY64_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY64_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY64_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY65_CTRL0    0x0f82
-+#define    RTL8367C_SVLAN_SP2C_ENTRY65_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY65_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY65_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY65_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY65_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY65_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY65_CTRL1    0x0f83
-+#define    RTL8367C_SVLAN_SP2C_ENTRY65_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY65_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY65_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY65_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY66_CTRL0    0x0f84
-+#define    RTL8367C_SVLAN_SP2C_ENTRY66_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY66_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY66_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY66_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY66_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY66_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY66_CTRL1    0x0f85
-+#define    RTL8367C_SVLAN_SP2C_ENTRY66_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY66_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY66_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY66_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY67_CTRL0    0x0f86
-+#define    RTL8367C_SVLAN_SP2C_ENTRY67_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY67_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY67_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY67_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY67_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY67_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY67_CTRL1    0x0f87
-+#define    RTL8367C_SVLAN_SP2C_ENTRY67_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY67_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY67_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY67_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY68_CTRL0    0x0f88
-+#define    RTL8367C_SVLAN_SP2C_ENTRY68_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY68_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY68_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY68_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY68_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY68_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY68_CTRL1    0x0f89
-+#define    RTL8367C_SVLAN_SP2C_ENTRY68_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY68_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY68_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY68_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY69_CTRL0    0x0f8a
-+#define    RTL8367C_SVLAN_SP2C_ENTRY69_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY69_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY69_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY69_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY69_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY69_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY69_CTRL1    0x0f8b
-+#define    RTL8367C_SVLAN_SP2C_ENTRY69_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY69_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY69_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY69_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY70_CTRL0    0x0f8c
-+#define    RTL8367C_SVLAN_SP2C_ENTRY70_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY70_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY70_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY70_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY70_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY70_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY70_CTRL1    0x0f8d
-+#define    RTL8367C_SVLAN_SP2C_ENTRY70_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY70_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY70_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY70_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY71_CTRL0    0x0f8e
-+#define    RTL8367C_SVLAN_SP2C_ENTRY71_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY71_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY71_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY71_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY71_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY71_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY71_CTRL1    0x0f8f
-+#define    RTL8367C_SVLAN_SP2C_ENTRY71_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY71_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY71_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY71_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY72_CTRL0    0x0f90
-+#define    RTL8367C_SVLAN_SP2C_ENTRY72_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY72_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY72_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY72_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY72_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY72_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY72_CTRL1    0x0f91
-+#define    RTL8367C_SVLAN_SP2C_ENTRY72_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY72_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY72_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY72_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY73_CTRL0    0x0f92
-+#define    RTL8367C_SVLAN_SP2C_ENTRY73_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY73_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY73_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY73_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY73_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY73_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY73_CTRL1    0x0f93
-+#define    RTL8367C_SVLAN_SP2C_ENTRY73_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY73_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY73_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY73_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY74_CTRL0    0x0f94
-+#define    RTL8367C_SVLAN_SP2C_ENTRY74_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY74_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY74_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY74_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY74_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY74_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY74_CTRL1    0x0f95
-+#define    RTL8367C_SVLAN_SP2C_ENTRY74_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY74_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY74_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY74_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY75_CTRL0    0x0f96
-+#define    RTL8367C_SVLAN_SP2C_ENTRY75_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY75_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY75_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY75_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY75_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY75_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY75_CTRL1    0x0f97
-+#define    RTL8367C_SVLAN_SP2C_ENTRY75_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY75_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY75_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY75_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY76_CTRL0    0x0f98
-+#define    RTL8367C_SVLAN_SP2C_ENTRY76_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY76_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY76_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY76_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY76_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY76_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY76_CTRL1    0x0f99
-+#define    RTL8367C_SVLAN_SP2C_ENTRY76_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY76_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY76_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY76_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY77_CTRL0    0x0f9a
-+#define    RTL8367C_SVLAN_SP2C_ENTRY77_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY77_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY77_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY77_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY77_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY77_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY77_CTRL1    0x0f9b
-+#define    RTL8367C_SVLAN_SP2C_ENTRY77_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY77_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY77_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY77_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY78_CTRL0    0x0f9c
-+#define    RTL8367C_SVLAN_SP2C_ENTRY78_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY78_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY78_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY78_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY78_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY78_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY78_CTRL1    0x0f9d
-+#define    RTL8367C_SVLAN_SP2C_ENTRY78_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY78_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY78_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY78_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY79_CTRL0    0x0f9e
-+#define    RTL8367C_SVLAN_SP2C_ENTRY79_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY79_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY79_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY79_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY79_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY79_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY79_CTRL1    0x0f9f
-+#define    RTL8367C_SVLAN_SP2C_ENTRY79_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY79_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY79_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY79_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY80_CTRL0    0x0fa0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY80_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY80_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY80_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY80_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY80_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY80_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY80_CTRL1    0x0fa1
-+#define    RTL8367C_SVLAN_SP2C_ENTRY80_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY80_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY80_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY80_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY81_CTRL0    0x0fa2
-+#define    RTL8367C_SVLAN_SP2C_ENTRY81_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY81_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY81_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY81_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY81_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY81_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY81_CTRL1    0x0fa3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY81_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY81_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY81_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY81_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY82_CTRL0    0x0fa4
-+#define    RTL8367C_SVLAN_SP2C_ENTRY82_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY82_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY82_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY82_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY82_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY82_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY82_CTRL1    0x0fa5
-+#define    RTL8367C_SVLAN_SP2C_ENTRY82_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY82_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY82_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY82_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY83_CTRL0    0x0fa6
-+#define    RTL8367C_SVLAN_SP2C_ENTRY83_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY83_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY83_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY83_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY83_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY83_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY83_CTRL1    0x0fa7
-+#define    RTL8367C_SVLAN_SP2C_ENTRY83_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY83_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY83_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY83_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY84_CTRL0    0x0fa8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY84_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY84_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY84_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY84_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY84_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY84_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY84_CTRL1    0x0fa9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY84_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY84_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY84_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY84_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY85_CTRL0    0x0faa
-+#define    RTL8367C_SVLAN_SP2C_ENTRY85_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY85_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY85_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY85_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY85_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY85_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY85_CTRL1    0x0fab
-+#define    RTL8367C_SVLAN_SP2C_ENTRY85_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY85_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY85_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY85_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY86_CTRL0    0x0fac
-+#define    RTL8367C_SVLAN_SP2C_ENTRY86_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY86_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY86_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY86_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY86_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY86_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY86_CTRL1    0x0fad
-+#define    RTL8367C_SVLAN_SP2C_ENTRY86_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY86_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY86_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY86_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY87_CTRL0    0x0fae
-+#define    RTL8367C_SVLAN_SP2C_ENTRY87_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY87_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY87_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY87_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY87_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY87_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY87_CTRL1    0x0faf
-+#define    RTL8367C_SVLAN_SP2C_ENTRY87_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY87_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY87_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY87_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY88_CTRL0    0x0fb0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY88_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY88_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY88_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY88_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY88_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY88_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY88_CTRL1    0x0fb1
-+#define    RTL8367C_SVLAN_SP2C_ENTRY88_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY88_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY88_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY88_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY89_CTRL0    0x0fb2
-+#define    RTL8367C_SVLAN_SP2C_ENTRY89_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY89_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY89_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY89_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY89_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY89_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY89_CTRL1    0x0fb3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY89_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY89_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY89_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY89_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY90_CTRL0    0x0fb4
-+#define    RTL8367C_SVLAN_SP2C_ENTRY90_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY90_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY90_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY90_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY90_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY90_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY90_CTRL1    0x0fb5
-+#define    RTL8367C_SVLAN_SP2C_ENTRY90_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY90_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY90_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY90_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY91_CTRL0    0x0fb6
-+#define    RTL8367C_SVLAN_SP2C_ENTRY91_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY91_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY91_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY91_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY91_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY91_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY91_CTRL1    0x0fb7
-+#define    RTL8367C_SVLAN_SP2C_ENTRY91_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY91_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY91_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY91_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY92_CTRL0    0x0fb8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY92_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY92_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY92_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY92_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY92_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY92_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY92_CTRL1    0x0fb9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY92_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY92_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY92_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY92_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY93_CTRL0    0x0fba
-+#define    RTL8367C_SVLAN_SP2C_ENTRY93_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY93_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY93_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY93_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY93_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY93_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY93_CTRL1    0x0fbb
-+#define    RTL8367C_SVLAN_SP2C_ENTRY93_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY93_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY93_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY93_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY94_CTRL0    0x0fbc
-+#define    RTL8367C_SVLAN_SP2C_ENTRY94_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY94_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY94_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY94_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY94_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY94_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY94_CTRL1    0x0fbd
-+#define    RTL8367C_SVLAN_SP2C_ENTRY94_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY94_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY94_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY94_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY95_CTRL0    0x0fbe
-+#define    RTL8367C_SVLAN_SP2C_ENTRY95_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY95_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY95_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY95_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY95_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY95_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY95_CTRL1    0x0fbf
-+#define    RTL8367C_SVLAN_SP2C_ENTRY95_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY95_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY95_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY95_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY96_CTRL0    0x0fc0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY96_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY96_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY96_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY96_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY96_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY96_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY96_CTRL1    0x0fc1
-+#define    RTL8367C_SVLAN_SP2C_ENTRY96_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY96_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY96_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY96_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY97_CTRL0    0x0fc2
-+#define    RTL8367C_SVLAN_SP2C_ENTRY97_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY97_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY97_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY97_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY97_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY97_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY97_CTRL1    0x0fc3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY97_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY97_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY97_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY97_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY98_CTRL0    0x0fc4
-+#define    RTL8367C_SVLAN_SP2C_ENTRY98_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY98_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY98_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY98_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY98_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY98_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY98_CTRL1    0x0fc5
-+#define    RTL8367C_SVLAN_SP2C_ENTRY98_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY98_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY98_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY98_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY99_CTRL0    0x0fc6
-+#define    RTL8367C_SVLAN_SP2C_ENTRY99_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY99_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY99_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY99_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY99_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY99_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY99_CTRL1    0x0fc7
-+#define    RTL8367C_SVLAN_SP2C_ENTRY99_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY99_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY99_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY99_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY100_CTRL0    0x0fc8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY100_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY100_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY100_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY100_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY100_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY100_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY100_CTRL1    0x0fc9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY100_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY100_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY100_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY100_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY101_CTRL0    0x0fca
-+#define    RTL8367C_SVLAN_SP2C_ENTRY101_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY101_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY101_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY101_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY101_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY101_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY101_CTRL1    0x0fcb
-+#define    RTL8367C_SVLAN_SP2C_ENTRY101_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY101_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY101_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY101_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY102_CTRL0    0x0fcc
-+#define    RTL8367C_SVLAN_SP2C_ENTRY102_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY102_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY102_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY102_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY102_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY102_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY102_CTRL1    0x0fcd
-+#define    RTL8367C_SVLAN_SP2C_ENTRY102_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY102_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY102_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY102_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY103_CTRL0    0x0fce
-+#define    RTL8367C_SVLAN_SP2C_ENTRY103_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY103_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY103_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY103_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY103_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY103_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY103_CTRL1    0x0fcf
-+#define    RTL8367C_SVLAN_SP2C_ENTRY103_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY103_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY103_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY103_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY104_CTRL0    0x0fd0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY104_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY104_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY104_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY104_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY104_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY104_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY104_CTRL1    0x0fd1
-+#define    RTL8367C_SVLAN_SP2C_ENTRY104_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY104_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY104_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY104_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY105_CTRL0    0x0fd2
-+#define    RTL8367C_SVLAN_SP2C_ENTRY105_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY105_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY105_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY105_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY105_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY105_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY105_CTRL1    0x0fd3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY105_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY105_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY105_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY105_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY106_CTRL0    0x0fd4
-+#define    RTL8367C_SVLAN_SP2C_ENTRY106_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY106_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY106_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY106_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY106_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY106_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY106_CTRL1    0x0fd5
-+#define    RTL8367C_SVLAN_SP2C_ENTRY106_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY106_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY106_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY106_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY107_CTRL0    0x0fd6
-+#define    RTL8367C_SVLAN_SP2C_ENTRY107_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY107_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY107_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY107_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY107_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY107_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY107_CTRL1    0x0fd7
-+#define    RTL8367C_SVLAN_SP2C_ENTRY107_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY107_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY107_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY107_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY108_CTRL0    0x0fd8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY108_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY108_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY108_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY108_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY108_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY108_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY108_CTRL1    0x0fd9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY108_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY108_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY108_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY108_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY109_CTRL0    0x0fda
-+#define    RTL8367C_SVLAN_SP2C_ENTRY109_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY109_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY109_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY109_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY109_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY109_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY109_CTRL1    0x0fdb
-+#define    RTL8367C_SVLAN_SP2C_ENTRY109_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY109_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY109_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY109_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY110_CTRL0    0x0fdc
-+#define    RTL8367C_SVLAN_SP2C_ENTRY110_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY110_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY110_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY110_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY110_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY110_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY110_CTRL1    0x0fdd
-+#define    RTL8367C_SVLAN_SP2C_ENTRY110_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY110_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY110_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY110_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY111_CTRL0    0x0fde
-+#define    RTL8367C_SVLAN_SP2C_ENTRY111_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY111_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY111_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY111_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY111_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY111_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY111_CTRL1    0x0fdf
-+#define    RTL8367C_SVLAN_SP2C_ENTRY111_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY111_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY111_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY111_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY112_CTRL0    0x0fe0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY112_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY112_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY112_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY112_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY112_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY112_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY112_CTRL1    0x0fe1
-+#define    RTL8367C_SVLAN_SP2C_ENTRY112_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY112_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY112_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY112_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY113_CTRL0    0x0fe2
-+#define    RTL8367C_SVLAN_SP2C_ENTRY113_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY113_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY113_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY113_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY113_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY113_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY113_CTRL1    0x0fe3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY113_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY113_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY113_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY113_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY114_CTRL0    0x0fe4
-+#define    RTL8367C_SVLAN_SP2C_ENTRY114_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY114_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY114_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY114_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY114_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY114_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY114_CTRL1    0x0fe5
-+#define    RTL8367C_SVLAN_SP2C_ENTRY114_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY114_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY114_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY114_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY115_CTRL0    0x0fe6
-+#define    RTL8367C_SVLAN_SP2C_ENTRY115_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY115_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY115_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY115_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY115_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY115_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY115_CTRL1    0x0fe7
-+#define    RTL8367C_SVLAN_SP2C_ENTRY115_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY115_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY115_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY115_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY116_CTRL0    0x0fe8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY116_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY116_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY116_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY116_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY116_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY116_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY116_CTRL1    0x0fe9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY116_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY116_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY116_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY116_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY117_CTRL0    0x0fea
-+#define    RTL8367C_SVLAN_SP2C_ENTRY117_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY117_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY117_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY117_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY117_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY117_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY117_CTRL1    0x0feb
-+#define    RTL8367C_SVLAN_SP2C_ENTRY117_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY117_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY117_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY117_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY118_CTRL0    0x0fec
-+#define    RTL8367C_SVLAN_SP2C_ENTRY118_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY118_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY118_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY118_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY118_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY118_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY118_CTRL1    0x0fed
-+#define    RTL8367C_SVLAN_SP2C_ENTRY118_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY118_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY118_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY118_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY119_CTRL0    0x0fee
-+#define    RTL8367C_SVLAN_SP2C_ENTRY119_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY119_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY119_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY119_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY119_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY119_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY119_CTRL1    0x0fef
-+#define    RTL8367C_SVLAN_SP2C_ENTRY119_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY119_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY119_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY119_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY120_CTRL0    0x0ff0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY120_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY120_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY120_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY120_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY120_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY120_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY120_CTRL1    0x0ff1
-+#define    RTL8367C_SVLAN_SP2C_ENTRY120_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY120_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY120_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY120_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY121_CTRL0    0x0ff2
-+#define    RTL8367C_SVLAN_SP2C_ENTRY121_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY121_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY121_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY121_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY121_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY121_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY121_CTRL1    0x0ff3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY121_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY121_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY121_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY121_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY122_CTRL0    0x0ff4
-+#define    RTL8367C_SVLAN_SP2C_ENTRY122_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY122_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY122_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY122_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY122_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY122_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY122_CTRL1    0x0ff5
-+#define    RTL8367C_SVLAN_SP2C_ENTRY122_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY122_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY122_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY122_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY123_CTRL0    0x0ff6
-+#define    RTL8367C_SVLAN_SP2C_ENTRY123_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY123_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY123_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY123_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY123_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY123_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY123_CTRL1    0x0ff7
-+#define    RTL8367C_SVLAN_SP2C_ENTRY123_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY123_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY123_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY123_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY124_CTRL0    0x0ff8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY124_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY124_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY124_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY124_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY124_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY124_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY124_CTRL1    0x0ff9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY124_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY124_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY124_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY124_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY125_CTRL0    0x0ffa
-+#define    RTL8367C_SVLAN_SP2C_ENTRY125_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY125_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY125_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY125_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY125_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY125_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY125_CTRL1    0x0ffb
-+#define    RTL8367C_SVLAN_SP2C_ENTRY125_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY125_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY125_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY125_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY126_CTRL0    0x0ffc
-+#define    RTL8367C_SVLAN_SP2C_ENTRY126_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY126_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY126_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY126_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY126_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY126_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY126_CTRL1    0x0ffd
-+#define    RTL8367C_SVLAN_SP2C_ENTRY126_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY126_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY126_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY126_CTRL1_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY127_CTRL0    0x0ffe
-+#define    RTL8367C_SVLAN_SP2C_ENTRY127_CTRL0_DST_PORT1_OFFSET    9
-+#define    RTL8367C_SVLAN_SP2C_ENTRY127_CTRL0_DST_PORT1_MASK    0x200
-+#define    RTL8367C_SVLAN_SP2C_ENTRY127_CTRL0_SVIDX_OFFSET    3
-+#define    RTL8367C_SVLAN_SP2C_ENTRY127_CTRL0_SVIDX_MASK    0x1F8
-+#define    RTL8367C_SVLAN_SP2C_ENTRY127_CTRL0_DST_PORT_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY127_CTRL0_DST_PORT_MASK    0x7
-+
-+#define    RTL8367C_REG_SVLAN_SP2C_ENTRY127_CTRL1    0x0fff
-+#define    RTL8367C_SVLAN_SP2C_ENTRY127_CTRL1_VALID_OFFSET    12
-+#define    RTL8367C_SVLAN_SP2C_ENTRY127_CTRL1_VALID_MASK    0x1000
-+#define    RTL8367C_SVLAN_SP2C_ENTRY127_CTRL1_VID_OFFSET    0
-+#define    RTL8367C_SVLAN_SP2C_ENTRY127_CTRL1_VID_MASK    0xFFF
-+
-+/* (16'h1000)mib_reg */
-+
-+#define    RTL8367C_REG_MIB_COUNTER0    0x1000
-+
-+#define    RTL8367C_REG_MIB_COUNTER1    0x1001
-+
-+#define    RTL8367C_REG_MIB_COUNTER2    0x1002
-+
-+#define    RTL8367C_REG_MIB_COUNTER3    0x1003
-+
-+#define    RTL8367C_REG_MIB_ADDRESS    0x1004
-+#define    RTL8367C_MIB_ADDRESS_OFFSET    0
-+#define    RTL8367C_MIB_ADDRESS_MASK    0x1FF
-+
-+#define    RTL8367C_REG_MIB_CTRL0    0x1005
-+#define    RTL8367C_PORT10_RESET_OFFSET    15
-+#define    RTL8367C_PORT10_RESET_MASK    0x8000
-+#define    RTL8367C_PORT9_RESET_OFFSET    14
-+#define    RTL8367C_PORT9_RESET_MASK    0x4000
-+#define    RTL8367C_PORT8_RESET_OFFSET    13
-+#define    RTL8367C_PORT8_RESET_MASK    0x2000
-+#define    RTL8367C_RESET_VALUE_OFFSET    12
-+#define    RTL8367C_RESET_VALUE_MASK    0x1000
-+#define    RTL8367C_GLOBAL_RESET_OFFSET    11
-+#define    RTL8367C_GLOBAL_RESET_MASK    0x800
-+#define    RTL8367C_QM_RESET_OFFSET    10
-+#define    RTL8367C_QM_RESET_MASK    0x400
-+#define    RTL8367C_PORT7_RESET_OFFSET    9
-+#define    RTL8367C_PORT7_RESET_MASK    0x200
-+#define    RTL8367C_PORT6_RESET_OFFSET    8
-+#define    RTL8367C_PORT6_RESET_MASK    0x100
-+#define    RTL8367C_PORT5_RESET_OFFSET    7
-+#define    RTL8367C_PORT5_RESET_MASK    0x80
-+#define    RTL8367C_PORT4_RESET_OFFSET    6
-+#define    RTL8367C_PORT4_RESET_MASK    0x40
-+#define    RTL8367C_PORT3_RESET_OFFSET    5
-+#define    RTL8367C_PORT3_RESET_MASK    0x20
-+#define    RTL8367C_PORT2_RESET_OFFSET    4
-+#define    RTL8367C_PORT2_RESET_MASK    0x10
-+#define    RTL8367C_PORT1_RESET_OFFSET    3
-+#define    RTL8367C_PORT1_RESET_MASK    0x8
-+#define    RTL8367C_PORT0_RESET_OFFSET    2
-+#define    RTL8367C_PORT0_RESET_MASK    0x4
-+#define    RTL8367C_RESET_FLAG_OFFSET    1
-+#define    RTL8367C_RESET_FLAG_MASK    0x2
-+#define    RTL8367C_MIB_CTRL0_BUSY_FLAG_OFFSET    0
-+#define    RTL8367C_MIB_CTRL0_BUSY_FLAG_MASK    0x1
-+
-+#define    RTL8367C_REG_MIB_CTRL1    0x1007
-+#define    RTL8367C_COUNTER15_RESET_OFFSET    15
-+#define    RTL8367C_COUNTER15_RESET_MASK    0x8000
-+#define    RTL8367C_COUNTER14_RESET_OFFSET    14
-+#define    RTL8367C_COUNTER14_RESET_MASK    0x4000
-+#define    RTL8367C_COUNTER13_RESET_OFFSET    13
-+#define    RTL8367C_COUNTER13_RESET_MASK    0x2000
-+#define    RTL8367C_COUNTER12_RESET_OFFSET    12
-+#define    RTL8367C_COUNTER12_RESET_MASK    0x1000
-+#define    RTL8367C_COUNTER11_RESET_OFFSET    11
-+#define    RTL8367C_COUNTER11_RESET_MASK    0x800
-+#define    RTL8367C_COUNTER10_RESET_OFFSET    10
-+#define    RTL8367C_COUNTER10_RESET_MASK    0x400
-+#define    RTL8367C_COUNTER9_RESET_OFFSET    9
-+#define    RTL8367C_COUNTER9_RESET_MASK    0x200
-+#define    RTL8367C_COUNTER8_RESET_OFFSET    8
-+#define    RTL8367C_COUNTER8_RESET_MASK    0x100
-+#define    RTL8367C_COUNTER7_RESET_OFFSET    7
-+#define    RTL8367C_COUNTER7_RESET_MASK    0x80
-+#define    RTL8367C_COUNTER6_RESET_OFFSET    6
-+#define    RTL8367C_COUNTER6_RESET_MASK    0x40
-+#define    RTL8367C_COUNTER5_RESET_OFFSET    5
-+#define    RTL8367C_COUNTER5_RESET_MASK    0x20
-+#define    RTL8367C_COUNTER4_RESET_OFFSET    4
-+#define    RTL8367C_COUNTER4_RESET_MASK    0x10
-+#define    RTL8367C_COUNTER3_RESET_OFFSET    3
-+#define    RTL8367C_COUNTER3_RESET_MASK    0x8
-+#define    RTL8367C_COUNTER2_RESET_OFFSET    2
-+#define    RTL8367C_COUNTER2_RESET_MASK    0x4
-+#define    RTL8367C_COUNTER1_RESET_OFFSET    1
-+#define    RTL8367C_COUNTER1_RESET_MASK    0x2
-+#define    RTL8367C_COUNTER0_RESET_OFFSET    0
-+#define    RTL8367C_COUNTER0_RESET_MASK    0x1
-+
-+#define    RTL8367C_REG_MIB_CTRL2    0x1008
-+#define    RTL8367C_COUNTER31_RESET_OFFSET    15
-+#define    RTL8367C_COUNTER31_RESET_MASK    0x8000
-+#define    RTL8367C_COUNTER30_RESET_OFFSET    14
-+#define    RTL8367C_COUNTER30_RESET_MASK    0x4000
-+#define    RTL8367C_COUNTER29_RESET_OFFSET    13
-+#define    RTL8367C_COUNTER29_RESET_MASK    0x2000
-+#define    RTL8367C_COUNTER28_RESET_OFFSET    12
-+#define    RTL8367C_COUNTER28_RESET_MASK    0x1000
-+#define    RTL8367C_COUNTER27_RESET_OFFSET    11
-+#define    RTL8367C_COUNTER27_RESET_MASK    0x800
-+#define    RTL8367C_COUNTER26_RESET_OFFSET    10
-+#define    RTL8367C_COUNTER26_RESET_MASK    0x400
-+#define    RTL8367C_COUNTER25_RESET_OFFSET    9
-+#define    RTL8367C_COUNTER25_RESET_MASK    0x200
-+#define    RTL8367C_COUNTER24_RESET_OFFSET    8
-+#define    RTL8367C_COUNTER24_RESET_MASK    0x100
-+#define    RTL8367C_COUNTER23_RESET_OFFSET    7
-+#define    RTL8367C_COUNTER23_RESET_MASK    0x80
-+#define    RTL8367C_COUNTER22_RESET_OFFSET    6
-+#define    RTL8367C_COUNTER22_RESET_MASK    0x40
-+#define    RTL8367C_COUNTER21_RESET_OFFSET    5
-+#define    RTL8367C_COUNTER21_RESET_MASK    0x20
-+#define    RTL8367C_COUNTER20_RESET_OFFSET    4
-+#define    RTL8367C_COUNTER20_RESET_MASK    0x10
-+#define    RTL8367C_COUNTER19_RESET_OFFSET    3
-+#define    RTL8367C_COUNTER19_RESET_MASK    0x8
-+#define    RTL8367C_COUNTER18_RESET_OFFSET    2
-+#define    RTL8367C_COUNTER18_RESET_MASK    0x4
-+#define    RTL8367C_COUNTER17_RESET_OFFSET    1
-+#define    RTL8367C_COUNTER17_RESET_MASK    0x2
-+#define    RTL8367C_COUNTER16_RESET_OFFSET    0
-+#define    RTL8367C_COUNTER16_RESET_MASK    0x1
-+
-+#define    RTL8367C_REG_MIB_CTRL3    0x1009
-+#define    RTL8367C_COUNTER15_MODE_OFFSET    15
-+#define    RTL8367C_COUNTER15_MODE_MASK    0x8000
-+#define    RTL8367C_COUNTER14_MODE_OFFSET    14
-+#define    RTL8367C_COUNTER14_MODE_MASK    0x4000
-+#define    RTL8367C_COUNTER13_MODE_OFFSET    13
-+#define    RTL8367C_COUNTER13_MODE_MASK    0x2000
-+#define    RTL8367C_COUNTER12_MODE_OFFSET    12
-+#define    RTL8367C_COUNTER12_MODE_MASK    0x1000
-+#define    RTL8367C_COUNTER11_MODE_OFFSET    11
-+#define    RTL8367C_COUNTER11_MODE_MASK    0x800
-+#define    RTL8367C_COUNTER10_MODE_OFFSET    10
-+#define    RTL8367C_COUNTER10_MODE_MASK    0x400
-+#define    RTL8367C_COUNTER9_MODE_OFFSET    9
-+#define    RTL8367C_COUNTER9_MODE_MASK    0x200
-+#define    RTL8367C_COUNTER8_MODE_OFFSET    8
-+#define    RTL8367C_COUNTER8_MODE_MASK    0x100
-+#define    RTL8367C_COUNTER7_MODE_OFFSET    7
-+#define    RTL8367C_COUNTER7_MODE_MASK    0x80
-+#define    RTL8367C_COUNTER6_MODE_OFFSET    6
-+#define    RTL8367C_COUNTER6_MODE_MASK    0x40
-+#define    RTL8367C_COUNTER5_MODE_OFFSET    5
-+#define    RTL8367C_COUNTER5_MODE_MASK    0x20
-+#define    RTL8367C_COUNTER4_MODE_OFFSET    4
-+#define    RTL8367C_COUNTER4_MODE_MASK    0x10
-+#define    RTL8367C_COUNTER3_MODE_OFFSET    3
-+#define    RTL8367C_COUNTER3_MODE_MASK    0x8
-+#define    RTL8367C_COUNTER2_MODE_OFFSET    2
-+#define    RTL8367C_COUNTER2_MODE_MASK    0x4
-+#define    RTL8367C_COUNTER1_MODE_OFFSET    1
-+#define    RTL8367C_COUNTER1_MODE_MASK    0x2
-+#define    RTL8367C_COUNTER0_MODE_OFFSET    0
-+#define    RTL8367C_COUNTER0_MODE_MASK    0x1
-+
-+#define    RTL8367C_REG_MIB_CTRL4    0x100a
-+#define    RTL8367C_MIB_USAGE_MODE_OFFSET    8
-+#define    RTL8367C_MIB_USAGE_MODE_MASK    0x100
-+#define    RTL8367C_MIB_TIMER_OFFSET    0
-+#define    RTL8367C_MIB_TIMER_MASK    0xFF
-+
-+#define    RTL8367C_REG_MIB_CTRL5    0x100b
-+#define    RTL8367C_MIB_CTRL5_COUNTER15_TYPE_OFFSET    15
-+#define    RTL8367C_MIB_CTRL5_COUNTER15_TYPE_MASK    0x8000
-+#define    RTL8367C_MIB_CTRL5_COUNTER14_TYPE_OFFSET    14
-+#define    RTL8367C_MIB_CTRL5_COUNTER14_TYPE_MASK    0x4000
-+#define    RTL8367C_MIB_CTRL5_COUNTER13_TYPE_OFFSET    13
-+#define    RTL8367C_MIB_CTRL5_COUNTER13_TYPE_MASK    0x2000
-+#define    RTL8367C_MIB_CTRL5_COUNTER12_TYPE_OFFSET    12
-+#define    RTL8367C_MIB_CTRL5_COUNTER12_TYPE_MASK    0x1000
-+#define    RTL8367C_MIB_CTRL5_COUNTER11_TYPE_OFFSET    11
-+#define    RTL8367C_MIB_CTRL5_COUNTER11_TYPE_MASK    0x800
-+#define    RTL8367C_MIB_CTRL5_COUNTER10_TYPE_OFFSET    10
-+#define    RTL8367C_MIB_CTRL5_COUNTER10_TYPE_MASK    0x400
-+#define    RTL8367C_MIB_CTRL5_COUNTER9_TYPE_OFFSET    9
-+#define    RTL8367C_MIB_CTRL5_COUNTER9_TYPE_MASK    0x200
-+#define    RTL8367C_MIB_CTRL5_COUNTER8_TYPE_OFFSET    8
-+#define    RTL8367C_MIB_CTRL5_COUNTER8_TYPE_MASK    0x100
-+#define    RTL8367C_MIB_CTRL5_COUNTER7_TYPE_OFFSET    7
-+#define    RTL8367C_MIB_CTRL5_COUNTER7_TYPE_MASK    0x80
-+#define    RTL8367C_MIB_CTRL5_COUNTER6_TYPE_OFFSET    6
-+#define    RTL8367C_MIB_CTRL5_COUNTER6_TYPE_MASK    0x40
-+#define    RTL8367C_MIB_CTRL5_COUNTER5_TYPE_OFFSET    5
-+#define    RTL8367C_MIB_CTRL5_COUNTER5_TYPE_MASK    0x20
-+#define    RTL8367C_MIB_CTRL5_COUNTER4_TYPE_OFFSET    4
-+#define    RTL8367C_MIB_CTRL5_COUNTER4_TYPE_MASK    0x10
-+#define    RTL8367C_MIB_CTRL5_COUNTER3_TYPE_OFFSET    3
-+#define    RTL8367C_MIB_CTRL5_COUNTER3_TYPE_MASK    0x8
-+#define    RTL8367C_MIB_CTRL5_COUNTER2_TYPE_OFFSET    2
-+#define    RTL8367C_MIB_CTRL5_COUNTER2_TYPE_MASK    0x4
-+#define    RTL8367C_MIB_CTRL5_COUNTER1_TYPE_OFFSET    1
-+#define    RTL8367C_MIB_CTRL5_COUNTER1_TYPE_MASK    0x2
-+#define    RTL8367C_MIB_CTRL5_COUNTER0_TYPE_OFFSET    0
-+#define    RTL8367C_MIB_CTRL5_COUNTER0_TYPE_MASK    0x1
-+
-+/* (16'h1100)intrpt_reg */
-+
-+#define    RTL8367C_REG_INTR_CTRL    0x1100
-+#define    RTL8367C_INTR_CTRL_OFFSET    0
-+#define    RTL8367C_INTR_CTRL_MASK    0x1
-+
-+#define    RTL8367C_REG_INTR_IMR    0x1101
-+#define    RTL8367C_INTR_IMR_SLIENT_START_2_OFFSET    12
-+#define    RTL8367C_INTR_IMR_SLIENT_START_2_MASK    0x1000
-+#define    RTL8367C_INTR_IMR_SLIENT_START_OFFSET    11
-+#define    RTL8367C_INTR_IMR_SLIENT_START_MASK    0x800
-+#define    RTL8367C_INTR_IMR_ACL_ACTION_OFFSET    9
-+#define    RTL8367C_INTR_IMR_ACL_ACTION_MASK    0x200
-+#define    RTL8367C_INTR_IMR_CABLE_DIAG_FIN_OFFSET    8
-+#define    RTL8367C_INTR_IMR_CABLE_DIAG_FIN_MASK    0x100
-+#define    RTL8367C_INTR_IMR_INTERRUPT_8051_OFFSET    7
-+#define    RTL8367C_INTR_IMR_INTERRUPT_8051_MASK    0x80
-+#define    RTL8367C_INTR_IMR_LOOP_DETECTION_OFFSET    6
-+#define    RTL8367C_INTR_IMR_LOOP_DETECTION_MASK    0x40
-+#define    RTL8367C_INTR_IMR_GREEN_TIMER_OFFSET    5
-+#define    RTL8367C_INTR_IMR_GREEN_TIMER_MASK    0x20
-+#define    RTL8367C_INTR_IMR_SPECIAL_CONGEST_OFFSET    4
-+#define    RTL8367C_INTR_IMR_SPECIAL_CONGEST_MASK    0x10
-+#define    RTL8367C_INTR_IMR_SPEED_CHANGE_OFFSET    3
-+#define    RTL8367C_INTR_IMR_SPEED_CHANGE_MASK    0x8
-+#define    RTL8367C_INTR_IMR_LEARN_OVER_OFFSET    2
-+#define    RTL8367C_INTR_IMR_LEARN_OVER_MASK    0x4
-+#define    RTL8367C_INTR_IMR_METER_EXCEEDED_OFFSET    1
-+#define    RTL8367C_INTR_IMR_METER_EXCEEDED_MASK    0x2
-+#define    RTL8367C_INTR_IMR_LINK_CHANGE_OFFSET    0
-+#define    RTL8367C_INTR_IMR_LINK_CHANGE_MASK    0x1
-+
-+#define    RTL8367C_REG_INTR_IMS    0x1102
-+#define    RTL8367C_INTR_IMS_SLIENT_START_2_OFFSET    12
-+#define    RTL8367C_INTR_IMS_SLIENT_START_2_MASK    0x1000
-+#define    RTL8367C_INTR_IMS_SLIENT_START_OFFSET    11
-+#define    RTL8367C_INTR_IMS_SLIENT_START_MASK    0x800
-+#define    RTL8367C_INTR_IMS_ACL_ACTION_OFFSET    9
-+#define    RTL8367C_INTR_IMS_ACL_ACTION_MASK    0x200
-+#define    RTL8367C_INTR_IMS_CABLE_DIAG_FIN_OFFSET    8
-+#define    RTL8367C_INTR_IMS_CABLE_DIAG_FIN_MASK    0x100
-+#define    RTL8367C_INTR_IMS_INTERRUPT_8051_OFFSET    7
-+#define    RTL8367C_INTR_IMS_INTERRUPT_8051_MASK    0x80
-+#define    RTL8367C_INTR_IMS_LOOP_DETECTION_OFFSET    6
-+#define    RTL8367C_INTR_IMS_LOOP_DETECTION_MASK    0x40
-+#define    RTL8367C_INTR_IMS_GREEN_TIMER_OFFSET    5
-+#define    RTL8367C_INTR_IMS_GREEN_TIMER_MASK    0x20
-+#define    RTL8367C_INTR_IMS_SPECIAL_CONGEST_OFFSET    4
-+#define    RTL8367C_INTR_IMS_SPECIAL_CONGEST_MASK    0x10
-+#define    RTL8367C_INTR_IMS_SPEED_CHANGE_OFFSET    3
-+#define    RTL8367C_INTR_IMS_SPEED_CHANGE_MASK    0x8
-+#define    RTL8367C_INTR_IMS_LEARN_OVER_OFFSET    2
-+#define    RTL8367C_INTR_IMS_LEARN_OVER_MASK    0x4
-+#define    RTL8367C_INTR_IMS_METER_EXCEEDED_OFFSET    1
-+#define    RTL8367C_INTR_IMS_METER_EXCEEDED_MASK    0x2
-+#define    RTL8367C_INTR_IMS_LINK_CHANGE_OFFSET    0
-+#define    RTL8367C_INTR_IMS_LINK_CHANGE_MASK    0x1
-+
-+#define    RTL8367C_REG_LEARN_OVER_INDICATOR    0x1103
-+#define    RTL8367C_LEARN_OVER_INDICATOR_OFFSET    0
-+#define    RTL8367C_LEARN_OVER_INDICATOR_MASK    0x7FF
-+
-+#define    RTL8367C_REG_SPEED_CHANGE_INDICATOR    0x1104
-+#define    RTL8367C_SPEED_CHANGE_INDICATOR_OFFSET    0
-+#define    RTL8367C_SPEED_CHANGE_INDICATOR_MASK    0x7FF
-+
-+#define    RTL8367C_REG_SPECIAL_CONGEST_INDICATOR    0x1105
-+#define    RTL8367C_SPECIAL_CONGEST_INDICATOR_OFFSET    0
-+#define    RTL8367C_SPECIAL_CONGEST_INDICATOR_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_LINKDOWN_INDICATOR    0x1106
-+#define    RTL8367C_PORT_LINKDOWN_INDICATOR_OFFSET    0
-+#define    RTL8367C_PORT_LINKDOWN_INDICATOR_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_LINKUP_INDICATOR    0x1107
-+#define    RTL8367C_PORT_LINKUP_INDICATOR_OFFSET    0
-+#define    RTL8367C_PORT_LINKUP_INDICATOR_MASK    0x7FF
-+
-+#define    RTL8367C_REG_SYSTEM_LEARN_OVER_INDICATOR    0x1108
-+#define    RTL8367C_SYSTEM_LEARN_OVER_INDICATOR_OFFSET    0
-+#define    RTL8367C_SYSTEM_LEARN_OVER_INDICATOR_MASK    0x1
-+
-+#define    RTL8367C_REG_INTR_IMR_8051    0x1118
-+#define    RTL8367C_INTR_IMR_8051_SLIENT_START_2_OFFSET    13
-+#define    RTL8367C_INTR_IMR_8051_SLIENT_START_2_MASK    0x2000
-+#define    RTL8367C_INTR_IMR_8051_SLIENT_START_OFFSET    12
-+#define    RTL8367C_INTR_IMR_8051_SLIENT_START_MASK    0x1000
-+#define    RTL8367C_INTR_IMR_8051_ACL_ACTION_OFFSET    10
-+#define    RTL8367C_INTR_IMR_8051_ACL_ACTION_MASK    0x400
-+#define    RTL8367C_INTR_IMR_8051_SAMOVING_8051_OFFSET    9
-+#define    RTL8367C_INTR_IMR_8051_SAMOVING_8051_MASK    0x200
-+#define    RTL8367C_INTR_IMR_8051_CABLE_DIAG_FIN_8051_OFFSET    8
-+#define    RTL8367C_INTR_IMR_8051_CABLE_DIAG_FIN_8051_MASK    0x100
-+#define    RTL8367C_INTR_IMR_8051_EEELLDP_8051_OFFSET    7
-+#define    RTL8367C_INTR_IMR_8051_EEELLDP_8051_MASK    0x80
-+#define    RTL8367C_INTR_IMR_8051_LOOP_DETECTION_8051_OFFSET    6
-+#define    RTL8367C_INTR_IMR_8051_LOOP_DETECTION_8051_MASK    0x40
-+#define    RTL8367C_INTR_IMR_8051_GREEN_TIMER_8051_OFFSET    5
-+#define    RTL8367C_INTR_IMR_8051_GREEN_TIMER_8051_MASK    0x20
-+#define    RTL8367C_INTR_IMR_8051_SPECIAL_CONGEST_8051_OFFSET    4
-+#define    RTL8367C_INTR_IMR_8051_SPECIAL_CONGEST_8051_MASK    0x10
-+#define    RTL8367C_INTR_IMR_8051_SPEED_CHANGE_8051_OFFSET    3
-+#define    RTL8367C_INTR_IMR_8051_SPEED_CHANGE_8051_MASK    0x8
-+#define    RTL8367C_INTR_IMR_8051_LEARN_OVER_8051_OFFSET    2
-+#define    RTL8367C_INTR_IMR_8051_LEARN_OVER_8051_MASK    0x4
-+#define    RTL8367C_INTR_IMR_8051_METER_EXCEEDED_8051_OFFSET    1
-+#define    RTL8367C_INTR_IMR_8051_METER_EXCEEDED_8051_MASK    0x2
-+#define    RTL8367C_INTR_IMR_8051_LINK_CHANGE_8051_OFFSET    0
-+#define    RTL8367C_INTR_IMR_8051_LINK_CHANGE_8051_MASK    0x1
-+
-+#define    RTL8367C_REG_INTR_IMS_8051    0x1119
-+#define    RTL8367C_INTR_IMS_8051_SLIENT_START_2_OFFSET    13
-+#define    RTL8367C_INTR_IMS_8051_SLIENT_START_2_MASK    0x2000
-+#define    RTL8367C_INTR_IMS_8051_SLIENT_START_OFFSET    12
-+#define    RTL8367C_INTR_IMS_8051_SLIENT_START_MASK    0x1000
-+#define    RTL8367C_INTR_IMS_8051_ACL_ACTION_OFFSET    10
-+#define    RTL8367C_INTR_IMS_8051_ACL_ACTION_MASK    0x400
-+#define    RTL8367C_INTR_IMS_8051_SAMOVING_8051_OFFSET    9
-+#define    RTL8367C_INTR_IMS_8051_SAMOVING_8051_MASK    0x200
-+#define    RTL8367C_INTR_IMS_8051_CABLE_DIAG_FIN_8051_OFFSET    8
-+#define    RTL8367C_INTR_IMS_8051_CABLE_DIAG_FIN_8051_MASK    0x100
-+#define    RTL8367C_INTR_IMS_8051_EEELLDP_8051_OFFSET    7
-+#define    RTL8367C_INTR_IMS_8051_EEELLDP_8051_MASK    0x80
-+#define    RTL8367C_INTR_IMS_8051_LOOP_DETECTION_8051_OFFSET    6
-+#define    RTL8367C_INTR_IMS_8051_LOOP_DETECTION_8051_MASK    0x40
-+#define    RTL8367C_INTR_IMS_8051_GREEN_TIMER_8051_OFFSET    5
-+#define    RTL8367C_INTR_IMS_8051_GREEN_TIMER_8051_MASK    0x20
-+#define    RTL8367C_INTR_IMS_8051_SPECIAL_CONGEST_8051_OFFSET    4
-+#define    RTL8367C_INTR_IMS_8051_SPECIAL_CONGEST_8051_MASK    0x10
-+#define    RTL8367C_INTR_IMS_8051_SPEED_CHANGE_8051_OFFSET    3
-+#define    RTL8367C_INTR_IMS_8051_SPEED_CHANGE_8051_MASK    0x8
-+#define    RTL8367C_INTR_IMS_8051_LEARN_OVER_8051_OFFSET    2
-+#define    RTL8367C_INTR_IMS_8051_LEARN_OVER_8051_MASK    0x4
-+#define    RTL8367C_INTR_IMS_8051_METER_EXCEEDED_8051_OFFSET    1
-+#define    RTL8367C_INTR_IMS_8051_METER_EXCEEDED_8051_MASK    0x2
-+#define    RTL8367C_INTR_IMS_8051_LINK_CHANGE_8051_OFFSET    0
-+#define    RTL8367C_INTR_IMS_8051_LINK_CHANGE_8051_MASK    0x1
-+
-+#define    RTL8367C_REG_DW8051_INT_CPU    0x111a
-+#define    RTL8367C_DW8051_INT_CPU_OFFSET    0
-+#define    RTL8367C_DW8051_INT_CPU_MASK    0x1
-+
-+#define    RTL8367C_REG_LEARN_OVER_INDICATOR_8051    0x1120
-+#define    RTL8367C_LEARN_OVER_INDICATOR_8051_OFFSET    0
-+#define    RTL8367C_LEARN_OVER_INDICATOR_8051_MASK    0x7FF
-+
-+#define    RTL8367C_REG_SPEED_CHANGE_INDICATOR_8051    0x1121
-+#define    RTL8367C_SPEED_CHANGE_INDICATOR_8051_OFFSET    0
-+#define    RTL8367C_SPEED_CHANGE_INDICATOR_8051_MASK    0x7FF
-+
-+#define    RTL8367C_REG_SPECIAL_CONGEST_INDICATOR_8051    0x1122
-+#define    RTL8367C_SPECIAL_CONGEST_INDICATOR_8051_OFFSET    0
-+#define    RTL8367C_SPECIAL_CONGEST_INDICATOR_8051_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_LINKDOWN_INDICATOR_8051    0x1123
-+#define    RTL8367C_PORT_LINKDOWN_INDICATOR_8051_OFFSET    0
-+#define    RTL8367C_PORT_LINKDOWN_INDICATOR_8051_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PORT_LINKUP_INDICATOR_8051    0x1124
-+#define    RTL8367C_PORT_LINKUP_INDICATOR_8051_OFFSET    0
-+#define    RTL8367C_PORT_LINKUP_INDICATOR_8051_MASK    0x7FF
-+
-+#define    RTL8367C_REG_DUMMY_1125    0x1125
-+
-+#define    RTL8367C_REG_DUMMY_1126    0x1126
-+
-+#define    RTL8367C_REG_DUMMY_1127    0x1127
-+
-+#define    RTL8367C_REG_DUMMY_1128    0x1128
-+
-+#define    RTL8367C_REG_DUMMY_1129    0x1129
-+
-+#define    RTL8367C_REG_INTR_IMS_BUFFER_RESET    0x112a
-+#define    RTL8367C_INTR_IMS_BUFFER_RESET_IMR_BUFF_RESET_OFFSET    1
-+#define    RTL8367C_INTR_IMS_BUFFER_RESET_IMR_BUFF_RESET_MASK    0x2
-+#define    RTL8367C_INTR_IMS_BUFFER_RESET_BUFFER_RESET_OFFSET    0
-+#define    RTL8367C_INTR_IMS_BUFFER_RESET_BUFFER_RESET_MASK    0x1
-+
-+#define    RTL8367C_REG_INTR_IMS_8051_BUFFER_RESET    0x112b
-+#define    RTL8367C_INTR_IMS_8051_BUFFER_RESET_IMR_BUFF_RESET_OFFSET    1
-+#define    RTL8367C_INTR_IMS_8051_BUFFER_RESET_IMR_BUFF_RESET_MASK    0x2
-+#define    RTL8367C_INTR_IMS_8051_BUFFER_RESET_BUFFER_RESET_OFFSET    0
-+#define    RTL8367C_INTR_IMS_8051_BUFFER_RESET_BUFFER_RESET_MASK    0x1
-+
-+#define    RTL8367C_REG_GPHY_INTRPT_8051    0x112c
-+#define    RTL8367C_IMS_GPHY_8051_H_OFFSET    13
-+#define    RTL8367C_IMS_GPHY_8051_H_MASK    0xE000
-+#define    RTL8367C_IMR_GPHY_8051_H_OFFSET    10
-+#define    RTL8367C_IMR_GPHY_8051_H_MASK    0x1C00
-+#define    RTL8367C_IMS_GPHY_8051_OFFSET    5
-+#define    RTL8367C_IMS_GPHY_8051_MASK    0x3E0
-+#define    RTL8367C_IMR_GPHY_8051_OFFSET    0
-+#define    RTL8367C_IMR_GPHY_8051_MASK    0x1F
-+
-+#define    RTL8367C_REG_GPHY_INTRPT    0x112d
-+#define    RTL8367C_IMS_GPHY_H_OFFSET    13
-+#define    RTL8367C_IMS_GPHY_H_MASK    0xE000
-+#define    RTL8367C_IMR_GPHY_H_OFFSET    10
-+#define    RTL8367C_IMR_GPHY_H_MASK    0x1C00
-+#define    RTL8367C_IMS_GPHY_OFFSET    5
-+#define    RTL8367C_IMS_GPHY_MASK    0x3E0
-+#define    RTL8367C_IMR_GPHY_OFFSET    0
-+#define    RTL8367C_IMR_GPHY_MASK    0x1F
-+
-+#define    RTL8367C_REG_THERMAL_INTRPT    0x112e
-+#define    RTL8367C_IMS_TM_HIGH_OFFSET    3
-+#define    RTL8367C_IMS_TM_HIGH_MASK    0x8
-+#define    RTL8367C_IMR_TM_HIGH_OFFSET    2
-+#define    RTL8367C_IMR_TM_HIGH_MASK    0x4
-+#define    RTL8367C_IMS_TM_LOW_OFFSET    1
-+#define    RTL8367C_IMS_TM_LOW_MASK    0x2
-+#define    RTL8367C_IMR_TM_LOW_OFFSET    0
-+#define    RTL8367C_IMR_TM_LOW_MASK    0x1
-+
-+#define    RTL8367C_REG_THERMAL_INTRPT_8051    0x112f
-+#define    RTL8367C_IMS_TM_HIGH_8051_OFFSET    3
-+#define    RTL8367C_IMS_TM_HIGH_8051_MASK    0x8
-+#define    RTL8367C_IMR_TM_HIGH_8051_OFFSET    2
-+#define    RTL8367C_IMR_TM_HIGH_8051_MASK    0x4
-+#define    RTL8367C_IMS_TM_LOW_8051_OFFSET    1
-+#define    RTL8367C_IMS_TM_LOW_8051_MASK    0x2
-+#define    RTL8367C_IMR_TM_LOW_8051_OFFSET    0
-+#define    RTL8367C_IMR_TM_LOW_8051_MASK    0x1
-+
-+#define    RTL8367C_REG_SDS_LINK_CHG_INT    0x1130
-+#define    RTL8367C_IMS_SDS_LINK_STS_C7_OFFSET    15
-+#define    RTL8367C_IMS_SDS_LINK_STS_C7_MASK    0x8000
-+#define    RTL8367C_IMS_SDS_LINK_STS_C6_OFFSET    14
-+#define    RTL8367C_IMS_SDS_LINK_STS_C6_MASK    0x4000
-+#define    RTL8367C_IMS_SDS_LINK_STS_C5_OFFSET    13
-+#define    RTL8367C_IMS_SDS_LINK_STS_C5_MASK    0x2000
-+#define    RTL8367C_IMS_SDS_LINK_STS_C4_OFFSET    12
-+#define    RTL8367C_IMS_SDS_LINK_STS_C4_MASK    0x1000
-+#define    RTL8367C_IMS_SDS_LINK_STS_C3_OFFSET    11
-+#define    RTL8367C_IMS_SDS_LINK_STS_C3_MASK    0x800
-+#define    RTL8367C_IMS_SDS_LINK_STS_C2_OFFSET    10
-+#define    RTL8367C_IMS_SDS_LINK_STS_C2_MASK    0x400
-+#define    RTL8367C_IMS_SDS_LINK_STS_C1_OFFSET    9
-+#define    RTL8367C_IMS_SDS_LINK_STS_C1_MASK    0x200
-+#define    RTL8367C_IMS_SDS_LINK_STS_C0_OFFSET    8
-+#define    RTL8367C_IMS_SDS_LINK_STS_C0_MASK    0x100
-+#define    RTL8367C_IMR_SDS_LINK_STS_C7_OFFSET    7
-+#define    RTL8367C_IMR_SDS_LINK_STS_C7_MASK    0x80
-+#define    RTL8367C_IMR_SDS_LINK_STS_C6_OFFSET    6
-+#define    RTL8367C_IMR_SDS_LINK_STS_C6_MASK    0x40
-+#define    RTL8367C_IMR_SDS_LINK_STS_C5_OFFSET    5
-+#define    RTL8367C_IMR_SDS_LINK_STS_C5_MASK    0x20
-+#define    RTL8367C_IMR_SDS_LINK_STS_C4_OFFSET    4
-+#define    RTL8367C_IMR_SDS_LINK_STS_C4_MASK    0x10
-+#define    RTL8367C_IMR_SDS_LINK_STS_C3_OFFSET    3
-+#define    RTL8367C_IMR_SDS_LINK_STS_C3_MASK    0x8
-+#define    RTL8367C_IMR_SDS_LINK_STS_C2_OFFSET    2
-+#define    RTL8367C_IMR_SDS_LINK_STS_C2_MASK    0x4
-+#define    RTL8367C_IMR_SDS_LINK_STS_C1_OFFSET    1
-+#define    RTL8367C_IMR_SDS_LINK_STS_C1_MASK    0x2
-+#define    RTL8367C_IMR_SDS_LINK_STS_C0_OFFSET    0
-+#define    RTL8367C_IMR_SDS_LINK_STS_C0_MASK    0x1
-+
-+#define    RTL8367C_REG_SDS_LINK_CHG_INT_8051    0x1131
-+#define    RTL8367C_IMS_SDS_LINK_STS_C7_8051_OFFSET    15
-+#define    RTL8367C_IMS_SDS_LINK_STS_C7_8051_MASK    0x8000
-+#define    RTL8367C_IMS_SDS_LINK_STS_C6_8051_OFFSET    14
-+#define    RTL8367C_IMS_SDS_LINK_STS_C6_8051_MASK    0x4000
-+#define    RTL8367C_IMS_SDS_LINK_STS_C5_8051_OFFSET    13
-+#define    RTL8367C_IMS_SDS_LINK_STS_C5_8051_MASK    0x2000
-+#define    RTL8367C_IMS_SDS_LINK_STS_C4_8051_OFFSET    12
-+#define    RTL8367C_IMS_SDS_LINK_STS_C4_8051_MASK    0x1000
-+#define    RTL8367C_IMS_SDS_LINK_STS_C3_8051_OFFSET    11
-+#define    RTL8367C_IMS_SDS_LINK_STS_C3_8051_MASK    0x800
-+#define    RTL8367C_IMS_SDS_LINK_STS_C2_8051_OFFSET    10
-+#define    RTL8367C_IMS_SDS_LINK_STS_C2_8051_MASK    0x400
-+#define    RTL8367C_IMS_SDS_LINK_STS_C1_8051_OFFSET    9
-+#define    RTL8367C_IMS_SDS_LINK_STS_C1_8051_MASK    0x200
-+#define    RTL8367C_IMS_SDS_LINK_STS_C0_8051_OFFSET    8
-+#define    RTL8367C_IMS_SDS_LINK_STS_C0_8051_MASK    0x100
-+#define    RTL8367C_IMR_SDS_LINK_STS_C7_8051_OFFSET    7
-+#define    RTL8367C_IMR_SDS_LINK_STS_C7_8051_MASK    0x80
-+#define    RTL8367C_IMR_SDS_LINK_STS_C6_8051_OFFSET    6
-+#define    RTL8367C_IMR_SDS_LINK_STS_C6_8051_MASK    0x40
-+#define    RTL8367C_IMR_SDS_LINK_STS_C5_8051_OFFSET    5
-+#define    RTL8367C_IMR_SDS_LINK_STS_C5_8051_MASK    0x20
-+#define    RTL8367C_IMR_SDS_LINK_STS_C4_8051_OFFSET    4
-+#define    RTL8367C_IMR_SDS_LINK_STS_C4_8051_MASK    0x10
-+#define    RTL8367C_IMR_SDS_LINK_STS_C3_8051_OFFSET    3
-+#define    RTL8367C_IMR_SDS_LINK_STS_C3_8051_MASK    0x8
-+#define    RTL8367C_IMR_SDS_LINK_STS_C2_8051_OFFSET    2
-+#define    RTL8367C_IMR_SDS_LINK_STS_C2_8051_MASK    0x4
-+#define    RTL8367C_IMR_SDS_LINK_STS_C1_8051_OFFSET    1
-+#define    RTL8367C_IMR_SDS_LINK_STS_C1_8051_MASK    0x2
-+#define    RTL8367C_IMR_SDS_LINK_STS_C0_8051_OFFSET    0
-+#define    RTL8367C_IMR_SDS_LINK_STS_C0_8051_MASK    0x1
-+
-+/* (16'h1200)swcore_reg */
-+
-+#define    RTL8367C_REG_MAX_LENGTH_LIMINT_IPG    0x1200
-+#define    RTL8367C_MAX_LENTH_CTRL_OFFSET    13
-+#define    RTL8367C_MAX_LENTH_CTRL_MASK    0x6000
-+#define    RTL8367C_PAGES_BEFORE_FCDROP_OFFSET    6
-+#define    RTL8367C_PAGES_BEFORE_FCDROP_MASK    0x1FC0
-+#define    RTL8367C_CHECK_MIN_IPG_RXDV_OFFSET    5
-+#define    RTL8367C_CHECK_MIN_IPG_RXDV_MASK    0x20
-+#define    RTL8367C_LIMIT_IPG_CFG_OFFSET    0
-+#define    RTL8367C_LIMIT_IPG_CFG_MASK    0x1F
-+
-+#define    RTL8367C_REG_IOL_RXDROP_CFG    0x1201
-+#define    RTL8367C_RX_IOL_MAX_LENGTH_CFG_OFFSET    13
-+#define    RTL8367C_RX_IOL_MAX_LENGTH_CFG_MASK    0x2000
-+#define    RTL8367C_RX_IOL_ERROR_LENGTH_CFG_OFFSET    12
-+#define    RTL8367C_RX_IOL_ERROR_LENGTH_CFG_MASK    0x1000
-+#define    RTL8367C_RX_NODROP_PAUSE_CFG_OFFSET    8
-+#define    RTL8367C_RX_NODROP_PAUSE_CFG_MASK    0x100
-+#define    RTL8367C_RX_DV_CNT_CFG_OFFSET    0
-+#define    RTL8367C_RX_DV_CNT_CFG_MASK    0x3F
-+
-+#define    RTL8367C_REG_VS_TPID    0x1202
-+
-+#define    RTL8367C_REG_INBW_BOUND    0x1203
-+#define    RTL8367C_LBOUND_OFFSET    4
-+#define    RTL8367C_LBOUND_MASK    0xF0
-+#define    RTL8367C_HBOUND_OFFSET    0
-+#define    RTL8367C_HBOUND_MASK    0xF
-+
-+#define    RTL8367C_REG_CFG_TX_ITFSP_OP    0x1204
-+#define    RTL8367C_MASK_OFFSET    1
-+#define    RTL8367C_MASK_MASK    0x2
-+#define    RTL8367C_OP_OFFSET    0
-+#define    RTL8367C_OP_MASK    0x1
-+
-+#define    RTL8367C_REG_INBW_BOUND2    0x1205
-+#define    RTL8367C_LBOUND2_H_OFFSET    9
-+#define    RTL8367C_LBOUND2_H_MASK    0x200
-+#define    RTL8367C_HBOUND2_H_OFFSET    8
-+#define    RTL8367C_HBOUND2_H_MASK    0x100
-+#define    RTL8367C_LBOUND2_OFFSET    4
-+#define    RTL8367C_LBOUND2_MASK    0xF0
-+#define    RTL8367C_HBOUND2_OFFSET    0
-+#define    RTL8367C_HBOUND2_MASK    0xF
-+
-+#define    RTL8367C_REG_CFG_48PASS1_DROP    0x1206
-+#define    RTL8367C_CFG_48PASS1_DROP_OFFSET    0
-+#define    RTL8367C_CFG_48PASS1_DROP_MASK    0x1
-+
-+#define    RTL8367C_REG_CFG_BACKPRESSURE    0x1207
-+#define    RTL8367C_LONGTXE_OFFSET    12
-+#define    RTL8367C_LONGTXE_MASK    0x1000
-+#define    RTL8367C_EN_BYPASS_ERROR_OFFSET    8
-+#define    RTL8367C_EN_BYPASS_ERROR_MASK    0x100
-+#define    RTL8367C_EN_BACKPRESSURE_OFFSET    4
-+#define    RTL8367C_EN_BACKPRESSURE_MASK    0x10
-+#define    RTL8367C_EN_48_PASS_1_OFFSET    0
-+#define    RTL8367C_EN_48_PASS_1_MASK    0x1
-+
-+#define    RTL8367C_REG_CFG_UNHIOL    0x1208
-+#define    RTL8367C_IOL_BACKOFF_OFFSET    12
-+#define    RTL8367C_IOL_BACKOFF_MASK    0x1000
-+#define    RTL8367C_BACKOFF_RANDOM_TIME_OFFSET    8
-+#define    RTL8367C_BACKOFF_RANDOM_TIME_MASK    0x100
-+#define    RTL8367C_DISABLE_BACK_OFF_OFFSET    4
-+#define    RTL8367C_DISABLE_BACK_OFF_MASK    0x10
-+#define    RTL8367C_IPG_COMPENSATION_OFFSET    0
-+#define    RTL8367C_IPG_COMPENSATION_MASK    0x1
-+
-+#define    RTL8367C_REG_SWITCH_MAC0    0x1209
-+
-+#define    RTL8367C_REG_SWITCH_MAC1    0x120a
-+
-+#define    RTL8367C_REG_SWITCH_MAC2    0x120b
-+
-+#define    RTL8367C_REG_SWITCH_CTRL0    0x120c
-+#define    RTL8367C_REMARKING_DSCP_ENABLE_OFFSET    8
-+#define    RTL8367C_REMARKING_DSCP_ENABLE_MASK    0x100
-+#define    RTL8367C_SHORT_IPG_OFFSET    4
-+#define    RTL8367C_SHORT_IPG_MASK    0x10
-+#define    RTL8367C_PAUSE_MAX128_OFFSET    0
-+#define    RTL8367C_PAUSE_MAX128_MASK    0x1
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_CTRL0    0x120d
-+#define    RTL8367C_INTPRI1_DSCP_OFFSET    8
-+#define    RTL8367C_INTPRI1_DSCP_MASK    0x3F00
-+#define    RTL8367C_INTPRI0_DSCP_OFFSET    0
-+#define    RTL8367C_INTPRI0_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_CTRL1    0x120e
-+#define    RTL8367C_INTPRI3_DSCP_OFFSET    8
-+#define    RTL8367C_INTPRI3_DSCP_MASK    0x3F00
-+#define    RTL8367C_INTPRI2_DSCP_OFFSET    0
-+#define    RTL8367C_INTPRI2_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_CTRL2    0x120f
-+#define    RTL8367C_INTPRI5_DSCP_OFFSET    8
-+#define    RTL8367C_INTPRI5_DSCP_MASK    0x3F00
-+#define    RTL8367C_INTPRI4_DSCP_OFFSET    0
-+#define    RTL8367C_INTPRI4_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_DSCP_REMARK_CTRL3    0x1210
-+#define    RTL8367C_INTPRI7_DSCP_OFFSET    8
-+#define    RTL8367C_INTPRI7_DSCP_MASK    0x3F00
-+#define    RTL8367C_INTPRI6_DSCP_OFFSET    0
-+#define    RTL8367C_INTPRI6_DSCP_MASK    0x3F
-+
-+#define    RTL8367C_REG_QOS_1Q_REMARK_CTRL0    0x1211
-+#define    RTL8367C_INTPRI3_PRI_OFFSET    12
-+#define    RTL8367C_INTPRI3_PRI_MASK    0x7000
-+#define    RTL8367C_INTPRI2_PRI_OFFSET    8
-+#define    RTL8367C_INTPRI2_PRI_MASK    0x700
-+#define    RTL8367C_INTPRI1_PRI_OFFSET    4
-+#define    RTL8367C_INTPRI1_PRI_MASK    0x70
-+#define    RTL8367C_INTPRI0_PRI_OFFSET    0
-+#define    RTL8367C_INTPRI0_PRI_MASK    0x7
-+
-+#define    RTL8367C_REG_QOS_1Q_REMARK_CTRL1    0x1212
-+#define    RTL8367C_INTPRI7_PRI_OFFSET    12
-+#define    RTL8367C_INTPRI7_PRI_MASK    0x7000
-+#define    RTL8367C_INTPRI6_PRI_OFFSET    8
-+#define    RTL8367C_INTPRI6_PRI_MASK    0x700
-+#define    RTL8367C_INTPRI5_PRI_OFFSET    4
-+#define    RTL8367C_INTPRI5_PRI_MASK    0x70
-+#define    RTL8367C_INTPRI4_PRI_OFFSET    0
-+#define    RTL8367C_INTPRI4_PRI_MASK    0x7
-+
-+#define    RTL8367C_REG_PKTGEN_COMMAND    0x1213
-+#define    RTL8367C_PKTGEN_STOP_OFFSET    8
-+#define    RTL8367C_PKTGEN_STOP_MASK    0x100
-+#define    RTL8367C_PKTGEN_START_OFFSET    4
-+#define    RTL8367C_PKTGEN_START_MASK    0x10
-+#define    RTL8367C_PKTGEN_BYPASS_FLOWCONTROL_OFFSET    0
-+#define    RTL8367C_PKTGEN_BYPASS_FLOWCONTROL_MASK    0x1
-+
-+#define    RTL8367C_REG_SW_DUMMY0    0x1214
-+#define    RTL8367C_SW_DUMMY0_DUMMY_OFFSET    4
-+#define    RTL8367C_SW_DUMMY0_DUMMY_MASK    0xFFF0
-+#define    RTL8367C_EEE_DEFER_TXLPI_OFFSET    3
-+#define    RTL8367C_EEE_DEFER_TXLPI_MASK    0x8
-+#define    RTL8367C_INGRESSBW_BYPASS_EN_OFFSET    2
-+#define    RTL8367C_INGRESSBW_BYPASS_EN_MASK    0x4
-+#define    RTL8367C_CFG_RX_MIN_OFFSET    0
-+#define    RTL8367C_CFG_RX_MIN_MASK    0x3
-+
-+#define    RTL8367C_REG_SW_DUMMY1    0x1215
-+
-+#define    RTL8367C_REG_PKTGEN_PAUSE_TIME    0x1216
-+
-+#define    RTL8367C_REG_SVLAN_UPLINK_PORTMASK    0x1218
-+#define    RTL8367C_SVLAN_UPLINK_PORTMASK_OFFSET    0
-+#define    RTL8367C_SVLAN_UPLINK_PORTMASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_CPU_PORT_MASK    0x1219
-+#define    RTL8367C_CPU_PORT_MASK_OFFSET    0
-+#define    RTL8367C_CPU_PORT_MASK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_CPU_CTRL    0x121a
-+#define    RTL8367C_CPU_TRAP_PORT_EXT_OFFSET    10
-+#define    RTL8367C_CPU_TRAP_PORT_EXT_MASK    0x400
-+#define    RTL8367C_CPU_TAG_FORMAT_OFFSET    9
-+#define    RTL8367C_CPU_TAG_FORMAT_MASK    0x200
-+#define    RTL8367C_IOL_16DROP_OFFSET    8
-+#define    RTL8367C_IOL_16DROP_MASK    0x100
-+#define    RTL8367C_CPU_TAG_RXBYTECOUNT_OFFSET    7
-+#define    RTL8367C_CPU_TAG_RXBYTECOUNT_MASK    0x80
-+#define    RTL8367C_CPU_TAG_POSITION_OFFSET    6
-+#define    RTL8367C_CPU_TAG_POSITION_MASK    0x40
-+#define    RTL8367C_CPU_TRAP_PORT_OFFSET    3
-+#define    RTL8367C_CPU_TRAP_PORT_MASK    0x38
-+#define    RTL8367C_CPU_INSERTMODE_OFFSET    1
-+#define    RTL8367C_CPU_INSERTMODE_MASK    0x6
-+#define    RTL8367C_CPU_EN_OFFSET    0
-+#define    RTL8367C_CPU_EN_MASK    0x1
-+
-+#define    RTL8367C_REG_MIRROR_CTRL    0x121c
-+#define    RTL8367C_MIRROR_CTRL_DUMMY_OFFSET    12
-+#define    RTL8367C_MIRROR_CTRL_DUMMY_MASK    0xF000
-+#define    RTL8367C_MIRROR_ISO_OFFSET    11
-+#define    RTL8367C_MIRROR_ISO_MASK    0x800
-+#define    RTL8367C_MIRROR_TX_OFFSET    10
-+#define    RTL8367C_MIRROR_TX_MASK    0x400
-+#define    RTL8367C_MIRROR_RX_OFFSET    9
-+#define    RTL8367C_MIRROR_RX_MASK    0x200
-+#define    RTL8367C_MIRROR_MONITOR_PORT_OFFSET    4
-+#define    RTL8367C_MIRROR_MONITOR_PORT_MASK    0xF0
-+#define    RTL8367C_MIRROR_SOURCE_PORT_OFFSET    0
-+#define    RTL8367C_MIRROR_SOURCE_PORT_MASK    0xF
-+
-+#define    RTL8367C_REG_FLOWCTRL_CTRL0    0x121d
-+#define    RTL8367C_FLOWCTRL_TYPE_OFFSET    15
-+#define    RTL8367C_FLOWCTRL_TYPE_MASK    0x8000
-+#define    RTL8367C_DROP_ALL_THRESHOLD_OFFSET    5
-+#define    RTL8367C_DROP_ALL_THRESHOLD_MASK    0x7FE0
-+#define    RTL8367C_DROP_ALL_THRESHOLD_MSB_OFFSET    4
-+#define    RTL8367C_DROP_ALL_THRESHOLD_MSB_MASK    0x10
-+#define    RTL8367C_ITFSP_REG_OFFSET    0
-+#define    RTL8367C_ITFSP_REG_MASK    0x7
-+
-+#define    RTL8367C_REG_FLOWCTRL_ALL_ON    0x121e
-+#define    RTL8367C_CFG_RLDPACT_OFFSET    12
-+#define    RTL8367C_CFG_RLDPACT_MASK    0x1000
-+#define    RTL8367C_FLOWCTRL_ALL_ON_THRESHOLD_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_ALL_ON_THRESHOLD_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_SYS_ON    0x121f
-+#define    RTL8367C_FLOWCTRL_SYS_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_SYS_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_SYS_OFF    0x1220
-+#define    RTL8367C_FLOWCTRL_SYS_OFF_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_SYS_OFF_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_SHARE_ON    0x1221
-+#define    RTL8367C_FLOWCTRL_SHARE_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_SHARE_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_SHARE_OFF    0x1222
-+#define    RTL8367C_FLOWCTRL_SHARE_OFF_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_SHARE_OFF_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_FCOFF_SYS_ON    0x1223
-+#define    RTL8367C_FLOWCTRL_FCOFF_SYS_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_FCOFF_SYS_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_FCOFF_SYS_OFF    0x1224
-+#define    RTL8367C_FLOWCTRL_FCOFF_SYS_OFF_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_FCOFF_SYS_OFF_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_FCOFF_SHARE_ON    0x1225
-+#define    RTL8367C_FLOWCTRL_FCOFF_SHARE_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_FCOFF_SHARE_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_FCOFF_SHARE_OFF    0x1226
-+#define    RTL8367C_FLOWCTRL_FCOFF_SHARE_OFF_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_FCOFF_SHARE_OFF_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT_ON    0x1227
-+#define    RTL8367C_FLOWCTRL_PORT_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT_OFF    0x1228
-+#define    RTL8367C_FLOWCTRL_PORT_OFF_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT_OFF_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT_PRIVATE_ON    0x1229
-+#define    RTL8367C_FLOWCTRL_PORT_PRIVATE_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT_PRIVATE_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT_PRIVATE_OFF    0x122a
-+#define    RTL8367C_FLOWCTRL_PORT_PRIVATE_OFF_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT_PRIVATE_OFF_MASK    0x7FF
-+
-+#define    RTL8367C_REG_RRCP_CTRL0    0x122b
-+#define    RTL8367C_COL_SEL_OFFSET    14
-+#define    RTL8367C_COL_SEL_MASK    0x4000
-+#define    RTL8367C_CRS_SEL_OFFSET    13
-+#define    RTL8367C_CRS_SEL_MASK    0x2000
-+#define    RTL8367C_RRCP_PBVLAN_EN_OFFSET    11
-+#define    RTL8367C_RRCP_PBVLAN_EN_MASK    0x800
-+#define    RTL8367C_RRCPV3_SECURITY_CRC_OFFSET    10
-+#define    RTL8367C_RRCPV3_SECURITY_CRC_MASK    0x400
-+#define    RTL8367C_RRCPV3_HANDLE_OFFSET    8
-+#define    RTL8367C_RRCPV3_HANDLE_MASK    0x300
-+#define    RTL8367C_RRCPV1_MALFORMED_ACT_OFFSET    5
-+#define    RTL8367C_RRCPV1_MALFORMED_ACT_MASK    0x60
-+#define    RTL8367C_RRCP_VLANLEAKY_OFFSET    4
-+#define    RTL8367C_RRCP_VLANLEAKY_MASK    0x10
-+#define    RTL8367C_RRCPV1_SECURITY_CRC_GET_OFFSET    3
-+#define    RTL8367C_RRCPV1_SECURITY_CRC_GET_MASK    0x8
-+#define    RTL8367C_RRCPV1_SECURITY_CRC_SET_OFFSET    2
-+#define    RTL8367C_RRCPV1_SECURITY_CRC_SET_MASK    0x4
-+#define    RTL8367C_RRCPV1_HANDLE_OFFSET    1
-+#define    RTL8367C_RRCPV1_HANDLE_MASK    0x2
-+#define    RTL8367C_RRCP_ENABLE_OFFSET    0
-+#define    RTL8367C_RRCP_ENABLE_MASK    0x1
-+
-+#define    RTL8367C_REG_RRCP_CTRL1    0x122c
-+#define    RTL8367C_RRCP_ADMIN_PMSK_OFFSET    8
-+#define    RTL8367C_RRCP_ADMIN_PMSK_MASK    0xFF00
-+#define    RTL8367C_RRCP_AUTH_PMSK_OFFSET    0
-+#define    RTL8367C_RRCP_AUTH_PMSK_MASK    0xFF
-+
-+#define    RTL8367C_REG_RRCP_CTRL2    0x122d
-+#define    RTL8367C_RRCPV1_HELLOFWD_TAG_OFFSET    9
-+#define    RTL8367C_RRCPV1_HELLOFWD_TAG_MASK    0x600
-+#define    RTL8367C_RRCP_FWD_TAG_OFFSET    7
-+#define    RTL8367C_RRCP_FWD_TAG_MASK    0x180
-+#define    RTL8367C_RRCPV1_REPLY_TAG_OFFSET    6
-+#define    RTL8367C_RRCPV1_REPLY_TAG_MASK    0x40
-+#define    RTL8367C_RRCPV1_HELLO_COUNT_OFFSET    3
-+#define    RTL8367C_RRCPV1_HELLO_COUNT_MASK    0x38
-+#define    RTL8367C_RRCPV1_HELLO_PEDIOD_OFFSET    0
-+#define    RTL8367C_RRCPV1_HELLO_PEDIOD_MASK    0x3
-+
-+#define    RTL8367C_REG_RRCP_CTRL3    0x122e
-+#define    RTL8367C_RRCP_TAG_PRIORITY_OFFSET    13
-+#define    RTL8367C_RRCP_TAG_PRIORITY_MASK    0xE000
-+#define    RTL8367C_RRCP_TAG_VID_OFFSET    0
-+#define    RTL8367C_RRCP_TAG_VID_MASK    0xFFF
-+
-+#define    RTL8367C_REG_FLOWCTRL_FCOFF_PORT_ON    0x122f
-+#define    RTL8367C_FLOWCTRL_FCOFF_PORT_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_FCOFF_PORT_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_FCOFF_PORT_OFF    0x1230
-+#define    RTL8367C_FLOWCTRL_FCOFF_PORT_OFF_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_FCOFF_PORT_OFF_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_FCOFF_PORT_PRIVATE_ON    0x1231
-+#define    RTL8367C_FLOWCTRL_FCOFF_PORT_PRIVATE_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_FCOFF_PORT_PRIVATE_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_FCOFF_PORT_PRIVATE_OFF    0x1232
-+#define    RTL8367C_FLOWCTRL_FCOFF_PORT_PRIVATE_OFF_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_FCOFF_PORT_PRIVATE_OFF_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_JUMBO_SYS_ON    0x1233
-+#define    RTL8367C_FLOWCTRL_JUMBO_SYS_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_JUMBO_SYS_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_JUMBO_SYS_OFF    0x1234
-+#define    RTL8367C_FLOWCTRL_JUMBO_SYS_OFF_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_JUMBO_SYS_OFF_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_JUMBO_SHARE_ON    0x1235
-+#define    RTL8367C_FLOWCTRL_JUMBO_SHARE_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_JUMBO_SHARE_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_JUMBO_SHARE_OFF    0x1236
-+#define    RTL8367C_FLOWCTRL_JUMBO_SHARE_OFF_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_JUMBO_SHARE_OFF_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_JUMBO_PORT_ON    0x1237
-+#define    RTL8367C_FLOWCTRL_JUMBO_PORT_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_JUMBO_PORT_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_JUMBO_PORT_OFF    0x1238
-+#define    RTL8367C_FLOWCTRL_JUMBO_PORT_OFF_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_JUMBO_PORT_OFF_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_JUMBO_PORT_PRIVATE_ON    0x1239
-+#define    RTL8367C_FLOWCTRL_JUMBO_PORT_PRIVATE_ON_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_JUMBO_PORT_PRIVATE_ON_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_JUMBO_PORT_PRIVATE_OFF    0x123a
-+#define    RTL8367C_FLOWCTRL_JUMBO_PORT_PRIVATE_OFF_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_JUMBO_PORT_PRIVATE_OFF_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_JUMBO_SIZE    0x123b
-+#define    RTL8367C_JUMBO_MODE_OFFSET    2
-+#define    RTL8367C_JUMBO_MODE_MASK    0x4
-+#define    RTL8367C_JUMBO_SIZE_OFFSET    0
-+#define    RTL8367C_JUMBO_SIZE_MASK    0x3
-+
-+#define    RTL8367C_REG_FLOWCTRL_TOTAL_PAGE_COUNTER    0x124c
-+#define    RTL8367C_FLOWCTRL_TOTAL_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_TOTAL_PAGE_COUNTER_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PUBLIC_PAGE_COUNTER    0x124d
-+#define    RTL8367C_FLOWCTRL_PUBLIC_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PUBLIC_PAGE_COUNTER_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_TOTAL_PAGE_MAX    0x124e
-+#define    RTL8367C_FLOWCTRL_TOTAL_PAGE_MAX_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_TOTAL_PAGE_MAX_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PUBLIC_PAGE_MAX    0x124f
-+#define    RTL8367C_FLOWCTRL_PUBLIC_PAGE_MAX_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PUBLIC_PAGE_MAX_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT0_PAGE_COUNTER    0x1250
-+#define    RTL8367C_FLOWCTRL_PORT0_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT0_PAGE_COUNTER_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT1_PAGE_COUNTER    0x1251
-+#define    RTL8367C_FLOWCTRL_PORT1_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT1_PAGE_COUNTER_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT2_PAGE_COUNTER    0x1252
-+#define    RTL8367C_FLOWCTRL_PORT2_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT2_PAGE_COUNTER_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT3_PAGE_COUNTER    0x1253
-+#define    RTL8367C_FLOWCTRL_PORT3_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT3_PAGE_COUNTER_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT4_PAGE_COUNTER    0x1254
-+#define    RTL8367C_FLOWCTRL_PORT4_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT4_PAGE_COUNTER_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT5_PAGE_COUNTER    0x1255
-+#define    RTL8367C_FLOWCTRL_PORT5_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT5_PAGE_COUNTER_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT6_PAGE_COUNTER    0x1256
-+#define    RTL8367C_FLOWCTRL_PORT6_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT6_PAGE_COUNTER_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT7_PAGE_COUNTER    0x1257
-+#define    RTL8367C_FLOWCTRL_PORT7_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT7_PAGE_COUNTER_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PUBLIC_FCOFF_PAGE_COUNTER    0x1258
-+#define    RTL8367C_FLOWCTRL_PUBLIC_FCOFF_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PUBLIC_FCOFF_PAGE_COUNTER_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PUBLIC_JUMBO_PAGE_COUNTER    0x1259
-+#define    RTL8367C_FLOWCTRL_PUBLIC_JUMBO_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PUBLIC_JUMBO_PAGE_COUNTER_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_MAX_PUBLIC_FCOFF_PAGE_COUNTER    0x125a
-+#define    RTL8367C_FLOWCTRL_MAX_PUBLIC_FCOFF_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_MAX_PUBLIC_FCOFF_PAGE_COUNTER_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_MAX_PUBLIC_JUMBO_PAGE_COUNTER    0x125b
-+#define    RTL8367C_FLOWCTRL_MAX_PUBLIC_JUMBO_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_MAX_PUBLIC_JUMBO_PAGE_COUNTER_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT0_PAGE_MAX    0x1260
-+#define    RTL8367C_FLOWCTRL_PORT0_PAGE_MAX_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT0_PAGE_MAX_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT1_PAGE_MAX    0x1261
-+#define    RTL8367C_FLOWCTRL_PORT1_PAGE_MAX_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT1_PAGE_MAX_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT2_PAGE_MAX    0x1262
-+#define    RTL8367C_FLOWCTRL_PORT2_PAGE_MAX_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT2_PAGE_MAX_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT3_PAGE_MAX    0x1263
-+#define    RTL8367C_FLOWCTRL_PORT3_PAGE_MAX_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT3_PAGE_MAX_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT4_PAGE_MAX    0x1264
-+#define    RTL8367C_FLOWCTRL_PORT4_PAGE_MAX_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT4_PAGE_MAX_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT5_PAGE_MAX    0x1265
-+#define    RTL8367C_FLOWCTRL_PORT5_PAGE_MAX_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT5_PAGE_MAX_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT6_PAGE_MAX    0x1266
-+#define    RTL8367C_FLOWCTRL_PORT6_PAGE_MAX_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT6_PAGE_MAX_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT7_PAGE_MAX    0x1267
-+#define    RTL8367C_FLOWCTRL_PORT7_PAGE_MAX_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT7_PAGE_MAX_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PAGE_COUNT_CLEAR    0x1268
-+#define    RTL8367C_DIS_SKIP_FP_OFFSET    1
-+#define    RTL8367C_DIS_SKIP_FP_MASK    0x2
-+#define    RTL8367C_PAGE_COUNT_CLEAR_OFFSET    0
-+#define    RTL8367C_PAGE_COUNT_CLEAR_MASK    0x1
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT8_PAGE_MAX    0x1269
-+#define    RTL8367C_FLOWCTRL_PORT8_PAGE_MAX_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT8_PAGE_MAX_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT9_PAGE_MAX    0x126a
-+#define    RTL8367C_FLOWCTRL_PORT9_PAGE_MAX_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT9_PAGE_MAX_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT10_PAGE_MAX    0x126b
-+#define    RTL8367C_FLOWCTRL_PORT10_PAGE_MAX_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT10_PAGE_MAX_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT8_PAGE_COUNTER    0x126c
-+#define    RTL8367C_FLOWCTRL_PORT8_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT8_PAGE_COUNTER_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT9_PAGE_COUNTER    0x126d
-+#define    RTL8367C_FLOWCTRL_PORT9_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT9_PAGE_COUNTER_MASK    0x7FF
-+
-+#define    RTL8367C_REG_FLOWCTRL_PORT10_PAGE_COUNTER    0x126e
-+#define    RTL8367C_FLOWCTRL_PORT10_PAGE_COUNTER_OFFSET    0
-+#define    RTL8367C_FLOWCTRL_PORT10_PAGE_COUNTER_MASK    0x7FF
-+
-+#define    RTL8367C_REG_RRCP_CTRL1_H    0x126f
-+#define    RTL8367C_RRCP_ADMIN_PMSK_P10_8_OFFSET    3
-+#define    RTL8367C_RRCP_ADMIN_PMSK_P10_8_MASK    0x38
-+#define    RTL8367C_RRCP_AUTH_PMSK_P10_8_OFFSET    0
-+#define    RTL8367C_RRCP_AUTH_PMSK_P10_8_MASK    0x7
-+
-+#define    RTL8367C_REG_EMA_CTRL0    0x1270
-+#define    RTL8367C_CFG_DVSE_VIAROM_OFFSET    13
-+#define    RTL8367C_CFG_DVSE_VIAROM_MASK    0x2000
-+#define    RTL8367C_CFG_DVSE_MIBRAM_OFFSET    12
-+#define    RTL8367C_CFG_DVSE_MIBRAM_MASK    0x1000
-+#define    RTL8367C_CFG_DVSE_IROM_OFFSET    11
-+#define    RTL8367C_CFG_DVSE_IROM_MASK    0x800
-+#define    RTL8367C_CFG_DVSE_ERAM_OFFSET    10
-+#define    RTL8367C_CFG_DVSE_ERAM_MASK    0x400
-+#define    RTL8367C_CFG_DVSE_IRAM_OFFSET    9
-+#define    RTL8367C_CFG_DVSE_IRAM_MASK    0x200
-+#define    RTL8367C_CFG_DVSE_NICRAM_OFFSET    8
-+#define    RTL8367C_CFG_DVSE_NICRAM_MASK    0x100
-+#define    RTL8367C_CFG_DVSE_CVLANRAM_OFFSET    7
-+#define    RTL8367C_CFG_DVSE_CVLANRAM_MASK    0x80
-+#define    RTL8367C_CFG_DVSE_ACTRAM_OFFSET    6
-+#define    RTL8367C_CFG_DVSE_ACTRAM_MASK    0x40
-+#define    RTL8367C_CFG_DVSE_INQRAM_OFFSET    5
-+#define    RTL8367C_CFG_DVSE_INQRAM_MASK    0x20
-+#define    RTL8367C_CFG_DVSE_HSARAM_OFFSET    4
-+#define    RTL8367C_CFG_DVSE_HSARAM_MASK    0x10
-+#define    RTL8367C_CFG_DVSE_OUTQRAM_OFFSET    3
-+#define    RTL8367C_CFG_DVSE_OUTQRAM_MASK    0x8
-+#define    RTL8367C_CFG_DVSE_HTRAM_OFFSET    2
-+#define    RTL8367C_CFG_DVSE_HTRAM_MASK    0x4
-+#define    RTL8367C_CFG_DVSE_PBRAM_OFFSET    1
-+#define    RTL8367C_CFG_DVSE_PBRAM_MASK    0x2
-+#define    RTL8367C_CFG_DVSE_L2RAM_OFFSET    0
-+#define    RTL8367C_CFG_DVSE_L2RAM_MASK    0x1
-+
-+#define    RTL8367C_REG_EMA_CTRL1    0x1271
-+#define    RTL8367C_CFG_DVS_OUTQRAM_OFFSET    12
-+#define    RTL8367C_CFG_DVS_OUTQRAM_MASK    0xF000
-+#define    RTL8367C_CFG_DVS_HTRAM_OFFSET    8
-+#define    RTL8367C_CFG_DVS_HTRAM_MASK    0x700
-+#define    RTL8367C_CFG_DVS_PBRAM_OFFSET    4
-+#define    RTL8367C_CFG_DVS_PBRAM_MASK    0xF0
-+#define    RTL8367C_CFG_DVS_L2RAM_OFFSET    0
-+#define    RTL8367C_CFG_DVS_L2RAM_MASK    0xF
-+
-+#define    RTL8367C_REG_EMA_CTRL2    0x1272
-+#define    RTL8367C_CFG_DVS_CVLANRAM_OFFSET    12
-+#define    RTL8367C_CFG_DVS_CVLANRAM_MASK    0xF000
-+#define    RTL8367C_CFG_DVS_ACTRAM_OFFSET    8
-+#define    RTL8367C_CFG_DVS_ACTRAM_MASK    0xF00
-+#define    RTL8367C_CFG_DVS_INQRAM_OFFSET    4
-+#define    RTL8367C_CFG_DVS_INQRAM_MASK    0xF0
-+#define    RTL8367C_CFG_DVS_HSARAM_OFFSET    0
-+#define    RTL8367C_CFG_DVS_HSARAM_MASK    0xF
-+
-+#define    RTL8367C_REG_EMA_CTRL3    0x1273
-+#define    RTL8367C_CFG_DVS_IROM_OFFSET    12
-+#define    RTL8367C_CFG_DVS_IROM_MASK    0xF000
-+#define    RTL8367C_CFG_DVS_ERAM_OFFSET    8
-+#define    RTL8367C_CFG_DVS_ERAM_MASK    0xF00
-+#define    RTL8367C_CFG_DVS_IRAM_OFFSET    4
-+#define    RTL8367C_CFG_DVS_IRAM_MASK    0xF0
-+#define    RTL8367C_CFG_DVS_NICRAM_OFFSET    0
-+#define    RTL8367C_CFG_DVS_NICRAM_MASK    0xF
-+
-+#define    RTL8367C_REG_EMA_CTRL4    0x1274
-+#define    RTL8367C_CFG_DVS_VIAROM_OFFSET    4
-+#define    RTL8367C_CFG_DVS_VIAROM_MASK    0xF0
-+#define    RTL8367C_CFG_DVS_MIBRAM_OFFSET    0
-+#define    RTL8367C_CFG_DVS_MIBRAM_MASK    0xF
-+
-+#define    RTL8367C_REG_DIAG_MODE    0x1275
-+#define    RTL8367C_DIAG_MODE_OFFSET    0
-+#define    RTL8367C_DIAG_MODE_MASK    0x1F
-+
-+#define    RTL8367C_REG_BIST_MODE    0x1276
-+
-+#define    RTL8367C_REG_STS_BIST_DONE    0x1277
-+
-+#define    RTL8367C_REG_STS_BIST_RLT0    0x1278
-+#define    RTL8367C_STS_BIST_RLT0_OFFSET    0
-+#define    RTL8367C_STS_BIST_RLT0_MASK    0x1
-+
-+#define    RTL8367C_REG_STS_BIST_RLT1    0x1279
-+
-+#define    RTL8367C_REG_STS_BIST_RLT2    0x127a
-+
-+#define    RTL8367C_REG_STS_BIST_RLT3    0x127b
-+#define    RTL8367C_STS_BIST_RLT3_OFFSET    0
-+#define    RTL8367C_STS_BIST_RLT3_MASK    0x3FF
-+
-+#define    RTL8367C_REG_STS_BIST_RLT4    0x127c
-+#define    RTL8367C_STS_BIST_RLT4_OFFSET    0
-+#define    RTL8367C_STS_BIST_RLT4_MASK    0x7
-+
-+#define    RTL8367C_REG_VIAROM_MISR    0x127d
-+
-+#define    RTL8367C_REG_DRF_BIST_MODE    0x1280
-+#define    RTL8367C_DRF_TCAMDEL_OFFSET    15
-+#define    RTL8367C_DRF_TCAMDEL_MASK    0x8000
-+#define    RTL8367C_CFG_DRF_BIST_MODE_OFFSET    0
-+#define    RTL8367C_CFG_DRF_BIST_MODE_MASK    0x7FFF
-+
-+#define    RTL8367C_REG_STS_DRF_BIST    0x1281
-+#define    RTL8367C_STS_DRF_BIST_OFFSET    0
-+#define    RTL8367C_STS_DRF_BIST_MASK    0x7FFF
-+
-+#define    RTL8367C_REG_STS_DRF_BIST_RLT0    0x1282
-+#define    RTL8367C_STS_DRF_BIST_RLT0_OFFSET    0
-+#define    RTL8367C_STS_DRF_BIST_RLT0_MASK    0x1
-+
-+#define    RTL8367C_REG_STS_DRF_BIST_RLT1    0x1283
-+
-+#define    RTL8367C_REG_STS_DRF_BIST_RLT2    0x1284
-+
-+#define    RTL8367C_REG_STS_DRF_BIST_RLT3    0x1285
-+#define    RTL8367C_STS_DRF_BIST_RLT3_OFFSET    0
-+#define    RTL8367C_STS_DRF_BIST_RLT3_MASK    0x3FF
-+
-+#define    RTL8367C_REG_STS_DRF_BIST_RLT4    0x1286
-+#define    RTL8367C_STS_DRF_BIST_RLT4_OFFSET    0
-+#define    RTL8367C_STS_DRF_BIST_RLT4_MASK    0x7FFF
-+
-+#define    RTL8367C_REG_RAM_DRF_CTRL    0x1289
-+#define    RTL8367C_RAM_DRF_CTRL_OFFSET    0
-+#define    RTL8367C_RAM_DRF_CTRL_MASK    0x1
-+
-+#define    RTL8367C_REG_MIB_RMON_LEN_CTRL    0x128a
-+#define    RTL8367C_RX_LENGTH_CTRL_OFFSET    1
-+#define    RTL8367C_RX_LENGTH_CTRL_MASK    0x2
-+#define    RTL8367C_TX_LENGTH_CTRL_OFFSET    0
-+#define    RTL8367C_TX_LENGTH_CTRL_MASK    0x1
-+
-+#define    RTL8367C_REG_COND0_BISR_OUT0    0x1290
-+
-+#define    RTL8367C_REG_COND0_BISR_OUT1    0x1291
-+
-+#define    RTL8367C_REG_COND0_BISR_OUT2    0x1292
-+
-+#define    RTL8367C_REG_COND0_BISR_OUT3    0x1293
-+
-+#define    RTL8367C_REG_COND0_BISR_OUT4    0x1294
-+#define    RTL8367C_COND0_BISR_OUT4_OFFSET    0
-+#define    RTL8367C_COND0_BISR_OUT4_MASK    0x3F
-+
-+#define    RTL8367C_REG_COND0_BISR_OUT5    0x1295
-+#define    RTL8367C_COND0_BISR_OUT5_OFFSET    0
-+#define    RTL8367C_COND0_BISR_OUT5_MASK    0x7
-+
-+#define    RTL8367C_REG_CHG_DUPLEX_CFG    0x1296
-+#define    RTL8367C_CHG_COL_CNT_PORT_OFFSET    13
-+#define    RTL8367C_CHG_COL_CNT_PORT_MASK    0xE000
-+#define    RTL8367C_CHG_COL_CNT_OFFSET    8
-+#define    RTL8367C_CHG_COL_CNT_MASK    0x1F00
-+#define    RTL8367C_CFG_CHG_DUP_EN_OFFSET    7
-+#define    RTL8367C_CFG_CHG_DUP_EN_MASK    0x80
-+#define    RTL8367C_CFG_CHG_DUP_THR_OFFSET    2
-+#define    RTL8367C_CFG_CHG_DUP_THR_MASK    0x7C
-+#define    RTL8367C_CFG_CHG_DUP_CONGEST_OFFSET    1
-+#define    RTL8367C_CFG_CHG_DUP_CONGEST_MASK    0x2
-+#define    RTL8367C_CFG_CHG_DUP_REF_OFFSET    0
-+#define    RTL8367C_CFG_CHG_DUP_REF_MASK    0x1
-+
-+#define    RTL8367C_REG_COND0_BIST_PASS    0x1297
-+#define    RTL8367C_COND0_DRF_BIST_NOFAIL_OFFSET    1
-+#define    RTL8367C_COND0_DRF_BIST_NOFAIL_MASK    0x2
-+#define    RTL8367C_COND0_BIST_NOFAIL_OFFSET    0
-+#define    RTL8367C_COND0_BIST_NOFAIL_MASK    0x1
-+
-+#define    RTL8367C_REG_COND1_BISR_OUT0    0x1298
-+
-+#define    RTL8367C_REG_COND1_BISR_OUT1    0x1299
-+
-+#define    RTL8367C_REG_COND1_BISR_OUT2    0x129a
-+
-+#define    RTL8367C_REG_COND1_BISR_OUT3    0x129b
-+
-+#define    RTL8367C_REG_COND1_BISR_OUT4    0x129c
-+#define    RTL8367C_COND1_BISR_OUT4_OFFSET    0
-+#define    RTL8367C_COND1_BISR_OUT4_MASK    0x3F
-+
-+#define    RTL8367C_REG_COND1_BISR_OUT5    0x129d
-+#define    RTL8367C_COND1_BISR_OUT5_OFFSET    0
-+#define    RTL8367C_COND1_BISR_OUT5_MASK    0x7
-+
-+#define    RTL8367C_REG_COND1_BIST_PASS    0x129f
-+#define    RTL8367C_COND1_DRF_BIST_NOFAIL_OFFSET    1
-+#define    RTL8367C_COND1_DRF_BIST_NOFAIL_MASK    0x2
-+#define    RTL8367C_COND1_BIST_NOFAIL_OFFSET    0
-+#define    RTL8367C_COND1_BIST_NOFAIL_MASK    0x1
-+
-+#define    RTL8367C_REG_EEE_TX_THR_Giga_500M    0x12a0
-+
-+#define    RTL8367C_REG_EEE_TX_THR_FE    0x12a1
-+
-+#define    RTL8367C_REG_EEE_MISC    0x12a3
-+#define    RTL8367C_EEE_REQ_SET1_OFFSET    13
-+#define    RTL8367C_EEE_REQ_SET1_MASK    0x2000
-+#define    RTL8367C_EEE_REQ_SET0_OFFSET    12
-+#define    RTL8367C_EEE_REQ_SET0_MASK    0x1000
-+#define    RTL8367C_EEE_WAKE_SET1_OFFSET    9
-+#define    RTL8367C_EEE_WAKE_SET1_MASK    0x200
-+#define    RTL8367C_EEE_Wake_SET0_OFFSET    8
-+#define    RTL8367C_EEE_Wake_SET0_MASK    0x100
-+#define    RTL8367C_EEE_TU_GIGA_500M_OFFSET    4
-+#define    RTL8367C_EEE_TU_GIGA_500M_MASK    0x30
-+#define    RTL8367C_EEE_TU_100M_OFFSET    2
-+#define    RTL8367C_EEE_TU_100M_MASK    0xC
-+
-+#define    RTL8367C_REG_EEE_GIGA_CTRL0    0x12a4
-+#define    RTL8367C_EEE_TW_GIGA_OFFSET    8
-+#define    RTL8367C_EEE_TW_GIGA_MASK    0xFF00
-+#define    RTL8367C_EEE_TR_GIGA_500M_OFFSET    0
-+#define    RTL8367C_EEE_TR_GIGA_500M_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEE_GIGA_CTRL1    0x12a5
-+#define    RTL8367C_EEE_TD_GIGA_500M_OFFSET    8
-+#define    RTL8367C_EEE_TD_GIGA_500M_MASK    0xFF00
-+#define    RTL8367C_EEE_TP_GIGA_OFFSET    0
-+#define    RTL8367C_EEE_TP_GIGA_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEE_100M_CTRL0    0x12a6
-+#define    RTL8367C_EEE_TW_100M_OFFSET    8
-+#define    RTL8367C_EEE_TW_100M_MASK    0xFF00
-+#define    RTL8367C_EEE_TR_100M_OFFSET    0
-+#define    RTL8367C_EEE_TR_100M_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEE_100M_CTRL1    0x12a7
-+#define    RTL8367C_EEE_TD_100M_OFFSET    8
-+#define    RTL8367C_EEE_TD_100M_MASK    0xFF00
-+#define    RTL8367C_EEE_TP_100M_OFFSET    0
-+#define    RTL8367C_EEE_TP_100M_MASK    0xFF
-+
-+#define    RTL8367C_REG_RX_FC_REG    0x12aa
-+#define    RTL8367C_EN_EEE_HALF_DUP_OFFSET    8
-+#define    RTL8367C_EN_EEE_HALF_DUP_MASK    0x100
-+#define    RTL8367C_RX_PGCNT_OFFSET    0
-+#define    RTL8367C_RX_PGCNT_MASK    0xFF
-+
-+#define    RTL8367C_REG_MAX_FIFO_SIZE    0x12af
-+#define    RTL8367C_MAX_FIFO_SIZE_OFFSET    0
-+#define    RTL8367C_MAX_FIFO_SIZE_MASK    0xF
-+
-+#define    RTL8367C_REG_EEEP_RX_RATE_GIGA    0x12b0
-+
-+#define    RTL8367C_REG_EEEP_RX_RATE_100M    0x12b1
-+
-+#define    RTL8367C_REG_DUMMY_REG_12_2    0x12b2
-+
-+#define    RTL8367C_REG_EEEP_TX_RATE_GIGA    0x12b3
-+
-+#define    RTL8367C_REG_EEEP_TX_RATE_100M    0x12b4
-+
-+#define    RTL8367C_REG_DUMMY_REG_12_3    0x12b5
-+
-+#define    RTL8367C_REG_EEEP_GIGA_CTRL0    0x12b6
-+#define    RTL8367C_EEEP_TR_GIGA_OFFSET    8
-+#define    RTL8367C_EEEP_TR_GIGA_MASK    0xFF00
-+#define    RTL8367C_EEEP_RW_GIGA_MST_OFFSET    0
-+#define    RTL8367C_EEEP_RW_GIGA_MST_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_GIGA_CTRL1    0x12b7
-+#define    RTL8367C_EEEP_TW_GIGA_OFFSET    8
-+#define    RTL8367C_EEEP_TW_GIGA_MASK    0xFF00
-+#define    RTL8367C_EEEP_TP_GIGA_OFFSET    0
-+#define    RTL8367C_EEEP_TP_GIGA_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_GIGA_CTRL2    0x12b8
-+#define    RTL8367C_EEEP_TXEN_GIGA_OFFSET    12
-+#define    RTL8367C_EEEP_TXEN_GIGA_MASK    0x1000
-+#define    RTL8367C_EEEP_TU_GIGA_OFFSET    8
-+#define    RTL8367C_EEEP_TU_GIGA_MASK    0x300
-+#define    RTL8367C_EEEP_TS_GIGA_OFFSET    0
-+#define    RTL8367C_EEEP_TS_GIGA_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_100M_CTRL0    0x12b9
-+#define    RTL8367C_EEEP_TR_100M_OFFSET    8
-+#define    RTL8367C_EEEP_TR_100M_MASK    0xFF00
-+#define    RTL8367C_EEEP_RW_100M_OFFSET    0
-+#define    RTL8367C_EEEP_RW_100M_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_100M_CTRL1    0x12ba
-+#define    RTL8367C_EEEP_TW_100M_OFFSET    8
-+#define    RTL8367C_EEEP_TW_100M_MASK    0xFF00
-+#define    RTL8367C_EEEP_TP_100M_OFFSET    0
-+#define    RTL8367C_EEEP_TP_100M_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_100M_CTRL2    0x12bb
-+#define    RTL8367C_EEEP_TXEN_100M_OFFSET    12
-+#define    RTL8367C_EEEP_TXEN_100M_MASK    0x1000
-+#define    RTL8367C_EEEP_TU_100M_OFFSET    8
-+#define    RTL8367C_EEEP_TU_100M_MASK    0x300
-+#define    RTL8367C_EEEP_TS_100M_OFFSET    0
-+#define    RTL8367C_EEEP_TS_100M_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_CTRL0    0x12bc
-+#define    RTL8367C_EEEP_CTRL0_DUMMY_OFFSET    8
-+#define    RTL8367C_EEEP_CTRL0_DUMMY_MASK    0xFF00
-+#define    RTL8367C_EEEP_SLEEP_STEP_OFFSET    0
-+#define    RTL8367C_EEEP_SLEEP_STEP_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_CTRL1    0x12bd
-+#define    RTL8367C_EEEP_TXR_GIGA_OFFSET    8
-+#define    RTL8367C_EEEP_TXR_GIGA_MASK    0xFF00
-+#define    RTL8367C_EEEP_TXR_100M_OFFSET    0
-+#define    RTL8367C_EEEP_TXR_100M_MASK    0xFF
-+
-+#define    RTL8367C_REG_BACK_PRESSURE_IPG    0x12be
-+#define    RTL8367C_BACK_PRESSURE_IPG_OFFSET    0
-+#define    RTL8367C_BACK_PRESSURE_IPG_MASK    0x3
-+
-+#define    RTL8367C_REG_TX_ESD_LEVEL    0x12bf
-+#define    RTL8367C_TX_ESD_LEVEL_MODE_OFFSET    8
-+#define    RTL8367C_TX_ESD_LEVEL_MODE_MASK    0x100
-+#define    RTL8367C_LEVEL_OFFSET    0
-+#define    RTL8367C_LEVEL_MASK    0xFF
-+
-+#define    RTL8367C_REG_RRCP_CTRL4    0x12e0
-+
-+#define    RTL8367C_REG_RRCP_CTRL5    0x12e1
-+
-+#define    RTL8367C_REG_RRCP_CTRL6    0x12e2
-+
-+#define    RTL8367C_REG_RRCP_CTRL7    0x12e3
-+
-+#define    RTL8367C_REG_RRCP_CTRL8    0x12e4
-+
-+#define    RTL8367C_REG_RRCP_CTRL9    0x12e5
-+
-+#define    RTL8367C_REG_RRCP_CTRL10    0x12e6
-+
-+#define    RTL8367C_REG_FIELD_SELECTOR0    0x12e7
-+#define    RTL8367C_FIELD_SELECTOR0_FORMAT_OFFSET    8
-+#define    RTL8367C_FIELD_SELECTOR0_FORMAT_MASK    0x700
-+#define    RTL8367C_FIELD_SELECTOR0_OFFSET_OFFSET    0
-+#define    RTL8367C_FIELD_SELECTOR0_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_FIELD_SELECTOR1    0x12e8
-+#define    RTL8367C_FIELD_SELECTOR1_FORMAT_OFFSET    8
-+#define    RTL8367C_FIELD_SELECTOR1_FORMAT_MASK    0x700
-+#define    RTL8367C_FIELD_SELECTOR1_OFFSET_OFFSET    0
-+#define    RTL8367C_FIELD_SELECTOR1_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_FIELD_SELECTOR2    0x12e9
-+#define    RTL8367C_FIELD_SELECTOR2_FORMAT_OFFSET    8
-+#define    RTL8367C_FIELD_SELECTOR2_FORMAT_MASK    0x700
-+#define    RTL8367C_FIELD_SELECTOR2_OFFSET_OFFSET    0
-+#define    RTL8367C_FIELD_SELECTOR2_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_FIELD_SELECTOR3    0x12ea
-+#define    RTL8367C_FIELD_SELECTOR3_FORMAT_OFFSET    8
-+#define    RTL8367C_FIELD_SELECTOR3_FORMAT_MASK    0x700
-+#define    RTL8367C_FIELD_SELECTOR3_OFFSET_OFFSET    0
-+#define    RTL8367C_FIELD_SELECTOR3_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_FIELD_SELECTOR4    0x12eb
-+#define    RTL8367C_FIELD_SELECTOR4_FORMAT_OFFSET    8
-+#define    RTL8367C_FIELD_SELECTOR4_FORMAT_MASK    0x700
-+#define    RTL8367C_FIELD_SELECTOR4_OFFSET_OFFSET    0
-+#define    RTL8367C_FIELD_SELECTOR4_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_FIELD_SELECTOR5    0x12ec
-+#define    RTL8367C_FIELD_SELECTOR5_FORMAT_OFFSET    8
-+#define    RTL8367C_FIELD_SELECTOR5_FORMAT_MASK    0x700
-+#define    RTL8367C_FIELD_SELECTOR5_OFFSET_OFFSET    0
-+#define    RTL8367C_FIELD_SELECTOR5_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_FIELD_SELECTOR6    0x12ed
-+#define    RTL8367C_FIELD_SELECTOR6_FORMAT_OFFSET    8
-+#define    RTL8367C_FIELD_SELECTOR6_FORMAT_MASK    0x700
-+#define    RTL8367C_FIELD_SELECTOR6_OFFSET_OFFSET    0
-+#define    RTL8367C_FIELD_SELECTOR6_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_FIELD_SELECTOR7    0x12ee
-+#define    RTL8367C_FIELD_SELECTOR7_FORMAT_OFFSET    8
-+#define    RTL8367C_FIELD_SELECTOR7_FORMAT_MASK    0x700
-+#define    RTL8367C_FIELD_SELECTOR7_OFFSET_OFFSET    0
-+#define    RTL8367C_FIELD_SELECTOR7_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_FIELD_SELECTOR8    0x12ef
-+#define    RTL8367C_FIELD_SELECTOR8_FORMAT_OFFSET    8
-+#define    RTL8367C_FIELD_SELECTOR8_FORMAT_MASK    0x700
-+#define    RTL8367C_FIELD_SELECTOR8_OFFSET_OFFSET    0
-+#define    RTL8367C_FIELD_SELECTOR8_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_FIELD_SELECTOR9    0x12f0
-+#define    RTL8367C_FIELD_SELECTOR9_FORMAT_OFFSET    8
-+#define    RTL8367C_FIELD_SELECTOR9_FORMAT_MASK    0x700
-+#define    RTL8367C_FIELD_SELECTOR9_OFFSET_OFFSET    0
-+#define    RTL8367C_FIELD_SELECTOR9_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_FIELD_SELECTOR10    0x12f1
-+#define    RTL8367C_FIELD_SELECTOR10_FORMAT_OFFSET    8
-+#define    RTL8367C_FIELD_SELECTOR10_FORMAT_MASK    0x700
-+#define    RTL8367C_FIELD_SELECTOR10_OFFSET_OFFSET    0
-+#define    RTL8367C_FIELD_SELECTOR10_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_FIELD_SELECTOR11    0x12f2
-+#define    RTL8367C_FIELD_SELECTOR11_FORMAT_OFFSET    8
-+#define    RTL8367C_FIELD_SELECTOR11_FORMAT_MASK    0x700
-+#define    RTL8367C_FIELD_SELECTOR11_OFFSET_OFFSET    0
-+#define    RTL8367C_FIELD_SELECTOR11_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_FIELD_SELECTOR12    0x12f3
-+#define    RTL8367C_FIELD_SELECTOR12_FORMAT_OFFSET    8
-+#define    RTL8367C_FIELD_SELECTOR12_FORMAT_MASK    0x700
-+#define    RTL8367C_FIELD_SELECTOR12_OFFSET_OFFSET    0
-+#define    RTL8367C_FIELD_SELECTOR12_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_FIELD_SELECTOR13    0x12f4
-+#define    RTL8367C_FIELD_SELECTOR13_FORMAT_OFFSET    8
-+#define    RTL8367C_FIELD_SELECTOR13_FORMAT_MASK    0x700
-+#define    RTL8367C_FIELD_SELECTOR13_OFFSET_OFFSET    0
-+#define    RTL8367C_FIELD_SELECTOR13_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_FIELD_SELECTOR14    0x12f5
-+#define    RTL8367C_FIELD_SELECTOR14_FORMAT_OFFSET    8
-+#define    RTL8367C_FIELD_SELECTOR14_FORMAT_MASK    0x700
-+#define    RTL8367C_FIELD_SELECTOR14_OFFSET_OFFSET    0
-+#define    RTL8367C_FIELD_SELECTOR14_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_FIELD_SELECTOR15    0x12f6
-+#define    RTL8367C_FIELD_SELECTOR15_FORMAT_OFFSET    8
-+#define    RTL8367C_FIELD_SELECTOR15_FORMAT_MASK    0x700
-+#define    RTL8367C_FIELD_SELECTOR15_OFFSET_OFFSET    0
-+#define    RTL8367C_FIELD_SELECTOR15_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_HWPKT_GEN_MISC_H    0x12f7
-+#define    RTL8367C_PKT_GEN_SUSPEND_P10_8_OFFSET    3
-+#define    RTL8367C_PKT_GEN_SUSPEND_P10_8_MASK    0x38
-+#define    RTL8367C_PKT_GEN_STATUS_P10_8_OFFSET    0
-+#define    RTL8367C_PKT_GEN_STATUS_P10_8_MASK    0x7
-+
-+#define    RTL8367C_REG_MIRROR_SRC_PMSK    0x12fb
-+#define    RTL8367C_MIRROR_SRC_PMSK_OFFSET    0
-+#define    RTL8367C_MIRROR_SRC_PMSK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_EEE_BURSTSIZE    0x12fc
-+
-+#define    RTL8367C_REG_EEE_IFG_CFG    0x12fd
-+#define    RTL8367C_EEE_IFG_CFG_OFFSET    0
-+#define    RTL8367C_EEE_IFG_CFG_MASK    0x1
-+
-+#define    RTL8367C_REG_FPGA_VER_MAC    0x12fe
-+
-+#define    RTL8367C_REG_HWPKT_GEN_MISC    0x12ff
-+#define    RTL8367C_PKT_GEN_SUSPEND_OFFSET    8
-+#define    RTL8367C_PKT_GEN_SUSPEND_MASK    0xFF00
-+#define    RTL8367C_PKT_GEN_STATUS_OFFSET    0
-+#define    RTL8367C_PKT_GEN_STATUS_MASK    0xFF
-+
-+/* (16'h1300)chip_reg */
-+
-+#define    RTL8367C_REG_CHIP_NUMBER    0x1300
-+
-+#define    RTL8367C_REG_CHIP_VER    0x1301
-+#define    RTL8367C_VERID_OFFSET    12
-+#define    RTL8367C_VERID_MASK    0xF000
-+#define    RTL8367C_MCID_OFFSET    8
-+#define    RTL8367C_MCID_MASK    0xF00
-+#define    RTL8367C_MODEL_ID_OFFSET    4
-+#define    RTL8367C_MODEL_ID_MASK    0xF0
-+#define    RTL8367C_AFE_VERSION_OFFSET    0
-+#define    RTL8367C_AFE_VERSION_MASK    0x1
-+
-+#define    RTL8367C_REG_CHIP_DEBUG0    0x1303
-+#define    RTL8367C_SEL33_EXT2_OFFSET    10
-+#define    RTL8367C_SEL33_EXT2_MASK    0x400
-+#define    RTL8367C_SEL33_EXT1_OFFSET    9
-+#define    RTL8367C_SEL33_EXT1_MASK    0x200
-+#define    RTL8367C_SEL33_EXT0_OFFSET    8
-+#define    RTL8367C_SEL33_EXT0_MASK    0x100
-+#define    RTL8367C_DRI_OTHER_OFFSET    7
-+#define    RTL8367C_DRI_OTHER_MASK    0x80
-+#define    RTL8367C_DRI_EXT1_RG_OFFSET    6
-+#define    RTL8367C_DRI_EXT1_RG_MASK    0x40
-+#define    RTL8367C_DRI_EXT0_RG_OFFSET    5
-+#define    RTL8367C_DRI_EXT0_RG_MASK    0x20
-+#define    RTL8367C_DRI_EXT1_OFFSET    4
-+#define    RTL8367C_DRI_EXT1_MASK    0x10
-+#define    RTL8367C_DRI_EXT0_OFFSET    3
-+#define    RTL8367C_DRI_EXT0_MASK    0x8
-+#define    RTL8367C_SLR_OTHER_OFFSET    2
-+#define    RTL8367C_SLR_OTHER_MASK    0x4
-+#define    RTL8367C_SLR_EXT1_OFFSET    1
-+#define    RTL8367C_SLR_EXT1_MASK    0x2
-+#define    RTL8367C_SLR_EXT0_OFFSET    0
-+#define    RTL8367C_SLR_EXT0_MASK    0x1
-+
-+#define    RTL8367C_REG_CHIP_DEBUG1    0x1304
-+#define    RTL8367C_RG1_DN_OFFSET    12
-+#define    RTL8367C_RG1_DN_MASK    0x7000
-+#define    RTL8367C_RG1_DP_OFFSET    8
-+#define    RTL8367C_RG1_DP_MASK    0x700
-+#define    RTL8367C_RG0_DN_OFFSET    4
-+#define    RTL8367C_RG0_DN_MASK    0x70
-+#define    RTL8367C_RG0_DP_OFFSET    0
-+#define    RTL8367C_RG0_DP_MASK    0x7
-+
-+#define    RTL8367C_REG_DIGITAL_INTERFACE_SELECT    0x1305
-+#define    RTL8367C_ORG_COL_OFFSET    15
-+#define    RTL8367C_ORG_COL_MASK    0x8000
-+#define    RTL8367C_ORG_CRS_OFFSET    14
-+#define    RTL8367C_ORG_CRS_MASK    0x4000
-+#define    RTL8367C_SKIP_MII_1_RXER_OFFSET    13
-+#define    RTL8367C_SKIP_MII_1_RXER_MASK    0x2000
-+#define    RTL8367C_SKIP_MII_0_RXER_OFFSET    12
-+#define    RTL8367C_SKIP_MII_0_RXER_MASK    0x1000
-+#define    RTL8367C_SELECT_GMII_1_OFFSET    4
-+#define    RTL8367C_SELECT_GMII_1_MASK    0xF0
-+#define    RTL8367C_SELECT_GMII_0_OFFSET    0
-+#define    RTL8367C_SELECT_GMII_0_MASK    0xF
-+
-+#define    RTL8367C_REG_EXT0_RGMXF    0x1306
-+#define    RTL8367C_EXT0_RGTX_INV_OFFSET    6
-+#define    RTL8367C_EXT0_RGTX_INV_MASK    0x40
-+#define    RTL8367C_EXT0_RGRX_INV_OFFSET    5
-+#define    RTL8367C_EXT0_RGRX_INV_MASK    0x20
-+#define    RTL8367C_EXT0_RGMXF_OFFSET    0
-+#define    RTL8367C_EXT0_RGMXF_MASK    0x1F
-+
-+#define    RTL8367C_REG_EXT1_RGMXF    0x1307
-+#define    RTL8367C_EXT1_RGTX_INV_OFFSET    6
-+#define    RTL8367C_EXT1_RGTX_INV_MASK    0x40
-+#define    RTL8367C_EXT1_RGRX_INV_OFFSET    5
-+#define    RTL8367C_EXT1_RGRX_INV_MASK    0x20
-+#define    RTL8367C_EXT1_RGMXF_OFFSET    0
-+#define    RTL8367C_EXT1_RGMXF_MASK    0x1F
-+
-+#define    RTL8367C_REG_BISR_CTRL    0x1308
-+#define    RTL8367C_BISR_CTRL_OFFSET    0
-+#define    RTL8367C_BISR_CTRL_MASK    0x7
-+
-+#define    RTL8367C_REG_SLF_IF    0x1309
-+#define    RTL8367C_LINK_DOWN_CLR_FIFO_OFFSET    7
-+#define    RTL8367C_LINK_DOWN_CLR_FIFO_MASK    0x80
-+#define    RTL8367C_LOOPBACK_OFFSET    6
-+#define    RTL8367C_LOOPBACK_MASK    0x40
-+#define    RTL8367C_WATER_LEVEL_OFFSET    4
-+#define    RTL8367C_WATER_LEVEL_MASK    0x30
-+#define    RTL8367C_SLF_IF_OFFSET    0
-+#define    RTL8367C_SLF_IF_MASK    0x3
-+
-+#define    RTL8367C_REG_I2C_CLOCK_DIV    0x130a
-+#define    RTL8367C_I2C_CLOCK_DIV_OFFSET    0
-+#define    RTL8367C_I2C_CLOCK_DIV_MASK    0x3FF
-+
-+#define    RTL8367C_REG_MDX_MDC_DIV    0x130b
-+#define    RTL8367C_MDX_MDC_DIV_OFFSET    0
-+#define    RTL8367C_MDX_MDC_DIV_MASK    0x3FF
-+
-+#define    RTL8367C_REG_MISCELLANEOUS_CONFIGURE0    0x130c
-+#define    RTL8367C_ADCCKI_FROM_PAD_OFFSET    14
-+#define    RTL8367C_ADCCKI_FROM_PAD_MASK    0x4000
-+#define    RTL8367C_ADCCKI_EN_OFFSET    13
-+#define    RTL8367C_ADCCKI_EN_MASK    0x2000
-+#define    RTL8367C_FLASH_ENABLE_OFFSET    12
-+#define    RTL8367C_FLASH_ENABLE_MASK    0x1000
-+#define    RTL8367C_EEE_ENABLE_OFFSET    11
-+#define    RTL8367C_EEE_ENABLE_MASK    0x800
-+#define    RTL8367C_NIC_ENABLE_OFFSET    10
-+#define    RTL8367C_NIC_ENABLE_MASK    0x400
-+#define    RTL8367C_FT_ENABLE_OFFSET    9
-+#define    RTL8367C_FT_ENABLE_MASK    0x200
-+#define    RTL8367C_OLT_ENABLE_OFFSET    8
-+#define    RTL8367C_OLT_ENABLE_MASK    0x100
-+#define    RTL8367C_RTCT_EN_OFFSET    7
-+#define    RTL8367C_RTCT_EN_MASK    0x80
-+#define    RTL8367C_PON_LIGHT_EN_OFFSET    6
-+#define    RTL8367C_PON_LIGHT_EN_MASK    0x40
-+#define    RTL8367C_DW8051_EN_OFFSET    5
-+#define    RTL8367C_DW8051_EN_MASK    0x20
-+#define    RTL8367C_AUTOLOAD_EN_OFFSET    4
-+#define    RTL8367C_AUTOLOAD_EN_MASK    0x10
-+#define    RTL8367C_NRESTORE_EN_OFFSET    3
-+#define    RTL8367C_NRESTORE_EN_MASK    0x8
-+#define    RTL8367C_DIS_PON_TABLE_INIT_OFFSET    2
-+#define    RTL8367C_DIS_PON_TABLE_INIT_MASK    0x4
-+#define    RTL8367C_DIS_PON_BIST_OFFSET    1
-+#define    RTL8367C_DIS_PON_BIST_MASK    0x2
-+#define    RTL8367C_EFUSE_EN_OFFSET    0
-+#define    RTL8367C_EFUSE_EN_MASK    0x1
-+
-+#define    RTL8367C_REG_MISCELLANEOUS_CONFIGURE1    0x130d
-+#define    RTL8367C_EEPROM_DEV_ADR_OFFSET    8
-+#define    RTL8367C_EEPROM_DEV_ADR_MASK    0x7F00
-+#define    RTL8367C_EEPROM_MSB_OFFSET    7
-+#define    RTL8367C_EEPROM_MSB_MASK    0x80
-+#define    RTL8367C_EEPROM_ADDRESS_16B_OFFSET    6
-+#define    RTL8367C_EEPROM_ADDRESS_16B_MASK    0x40
-+#define    RTL8367C_EEPROM_DWONLOAD_COMPLETE_OFFSET    3
-+#define    RTL8367C_EEPROM_DWONLOAD_COMPLETE_MASK    0x8
-+#define    RTL8367C_SPI_SLAVE_EN_OFFSET    2
-+#define    RTL8367C_SPI_SLAVE_EN_MASK    0x4
-+#define    RTL8367C_SMI_SEL_OFFSET    0
-+#define    RTL8367C_SMI_SEL_MASK    0x3
-+
-+#define    RTL8367C_REG_PHY_AD    0x130f
-+#define    RTL8367C_EN_PHY_MAX_POWER_OFFSET    14
-+#define    RTL8367C_EN_PHY_MAX_POWER_MASK    0x4000
-+#define    RTL8367C_EN_PHY_SEL_DEG_OFFSET    13
-+#define    RTL8367C_EN_PHY_SEL_DEG_MASK    0x2000
-+#define    RTL8367C_EXTPHY_AD_OFFSET    8
-+#define    RTL8367C_EXTPHY_AD_MASK    0x1F00
-+#define    RTL8367C_EN_PHY_LOW_POWER_MODE_OFFSET    7
-+#define    RTL8367C_EN_PHY_LOW_POWER_MODE_MASK    0x80
-+#define    RTL8367C_EN_PHY_GREEN_OFFSET    6
-+#define    RTL8367C_EN_PHY_GREEN_MASK    0x40
-+#define    RTL8367C_PDNPHY_OFFSET    5
-+#define    RTL8367C_PDNPHY_MASK    0x20
-+#define    RTL8367C_INTPHY_AD_OFFSET    0
-+#define    RTL8367C_INTPHY_AD_MASK    0x1F
-+
-+#define    RTL8367C_REG_DIGITAL_INTERFACE0_FORCE    0x1310
-+#define    RTL8367C_GMII_0_FORCE_OFFSET    12
-+#define    RTL8367C_GMII_0_FORCE_MASK    0x1000
-+#define    RTL8367C_RGMII_0_FORCE_OFFSET    0
-+#define    RTL8367C_RGMII_0_FORCE_MASK    0xFFF
-+
-+#define    RTL8367C_REG_DIGITAL_INTERFACE1_FORCE    0x1311
-+#define    RTL8367C_GMII_1_FORCE_OFFSET    12
-+#define    RTL8367C_GMII_1_FORCE_MASK    0x1000
-+#define    RTL8367C_RGMII_1_FORCE_OFFSET    0
-+#define    RTL8367C_RGMII_1_FORCE_MASK    0xFFF
-+
-+#define    RTL8367C_REG_MAC0_FORCE_SELECT    0x1312
-+#define    RTL8367C_EN_MAC0_FORCE_OFFSET    12
-+#define    RTL8367C_EN_MAC0_FORCE_MASK    0x1000
-+#define    RTL8367C_MAC0_FORCE_ABLTY_OFFSET    0
-+#define    RTL8367C_MAC0_FORCE_ABLTY_MASK    0xFFF
-+
-+#define    RTL8367C_REG_MAC1_FORCE_SELECT    0x1313
-+#define    RTL8367C_EN_MAC1_FORCE_OFFSET    12
-+#define    RTL8367C_EN_MAC1_FORCE_MASK    0x1000
-+#define    RTL8367C_MAC1_FORCE_ABLTY_OFFSET    0
-+#define    RTL8367C_MAC1_FORCE_ABLTY_MASK    0xFFF
-+
-+#define    RTL8367C_REG_MAC2_FORCE_SELECT    0x1314
-+#define    RTL8367C_EN_MAC2_FORCE_OFFSET    12
-+#define    RTL8367C_EN_MAC2_FORCE_MASK    0x1000
-+#define    RTL8367C_MAC2_FORCE_ABLTY_OFFSET    0
-+#define    RTL8367C_MAC2_FORCE_ABLTY_MASK    0xFFF
-+
-+#define    RTL8367C_REG_MAC3_FORCE_SELECT    0x1315
-+#define    RTL8367C_EN_MAC3_FORCE_OFFSET    12
-+#define    RTL8367C_EN_MAC3_FORCE_MASK    0x1000
-+#define    RTL8367C_MAC3_FORCE_ABLTY_OFFSET    0
-+#define    RTL8367C_MAC3_FORCE_ABLTY_MASK    0xFFF
-+
-+#define    RTL8367C_REG_MAC4_FORCE_SELECT    0x1316
-+#define    RTL8367C_EN_MAC4_FORCE_OFFSET    12
-+#define    RTL8367C_EN_MAC4_FORCE_MASK    0x1000
-+#define    RTL8367C_MAC4_FORCE_ABLTY_OFFSET    0
-+#define    RTL8367C_MAC4_FORCE_ABLTY_MASK    0xFFF
-+
-+#define    RTL8367C_REG_MAC5_FORCE_SELECT    0x1317
-+#define    RTL8367C_EN_MAC5_FORCE_OFFSET    12
-+#define    RTL8367C_EN_MAC5_FORCE_MASK    0x1000
-+#define    RTL8367C_MAC5_FORCE_ABLTY_OFFSET    0
-+#define    RTL8367C_MAC5_FORCE_ABLTY_MASK    0xFFF
-+
-+#define    RTL8367C_REG_MAC6_FORCE_SELECT    0x1318
-+#define    RTL8367C_EN_MAC6_FORCE_OFFSET    12
-+#define    RTL8367C_EN_MAC6_FORCE_MASK    0x1000
-+#define    RTL8367C_MAC6_FORCE_ABLTY_OFFSET    0
-+#define    RTL8367C_MAC6_FORCE_ABLTY_MASK    0xFFF
-+
-+#define    RTL8367C_REG_MAC7_FORCE_SELECT    0x1319
-+#define    RTL8367C_EN_MAC7_FORCE_OFFSET    12
-+#define    RTL8367C_EN_MAC7_FORCE_MASK    0x1000
-+#define    RTL8367C_MAC7_FORCE_ABLTY_OFFSET    0
-+#define    RTL8367C_MAC7_FORCE_ABLTY_MASK    0xFFF
-+
-+#define    RTL8367C_REG_M10_FORCE_SELECT    0x131c
-+#define    RTL8367C_EN_M10_FORCE_OFFSET    12
-+#define    RTL8367C_EN_M10_FORCE_MASK    0x1000
-+#define    RTL8367C_M10_FORCE_ABLTY_OFFSET    0
-+#define    RTL8367C_M10_FORCE_ABLTY_MASK    0xFFF
-+
-+#define    RTL8367C_REG_CHIP_RESET    0x1322
-+#define    RTL8367C_GPHY_RESET_OFFSET    6
-+#define    RTL8367C_GPHY_RESET_MASK    0x40
-+#define    RTL8367C_NIC_RST_OFFSET    5
-+#define    RTL8367C_NIC_RST_MASK    0x20
-+#define    RTL8367C_DW8051_RST_OFFSET    4
-+#define    RTL8367C_DW8051_RST_MASK    0x10
-+#define    RTL8367C_SDS_RST_OFFSET    3
-+#define    RTL8367C_SDS_RST_MASK    0x8
-+#define    RTL8367C_CONFIG_RST_OFFSET    2
-+#define    RTL8367C_CONFIG_RST_MASK    0x4
-+#define    RTL8367C_SW_RST_OFFSET    1
-+#define    RTL8367C_SW_RST_MASK    0x2
-+#define    RTL8367C_CHIP_RST_OFFSET    0
-+#define    RTL8367C_CHIP_RST_MASK    0x1
-+
-+#define    RTL8367C_REG_DIGITAL_DEBUG_0    0x1323
-+
-+#define    RTL8367C_REG_DIGITAL_DEBUG_1    0x1324
-+
-+#define    RTL8367C_REG_INTERNAL_PHY_MDC_DRIVER    0x1325
-+#define    RTL8367C_INTERNAL_PHY_MDC_DRIVER_OFFSET    0
-+#define    RTL8367C_INTERNAL_PHY_MDC_DRIVER_MASK    0x3FF
-+
-+#define    RTL8367C_REG_LINKDOWN_TIME_CTRL    0x1326
-+#define    RTL8367C_LINKDOWN_TIME_CFG_OFFSET    9
-+#define    RTL8367C_LINKDOWN_TIME_CFG_MASK    0x7E00
-+#define    RTL8367C_LINKDOWN_TIME_ENABLE_OFFSET    8
-+#define    RTL8367C_LINKDOWN_TIME_ENABLE_MASK    0x100
-+#define    RTL8367C_LINKDOWN_TIME_OFFSET    0
-+#define    RTL8367C_LINKDOWN_TIME_MASK    0xFF
-+
-+#define    RTL8367C_REG_PHYACK_TIMEOUT    0x1331
-+
-+#define    RTL8367C_REG_MDXACK_TIMEOUT    0x1333
-+
-+#define    RTL8367C_REG_DW8051_RDY    0x1336
-+#define    RTL8367C_VIAROM_WRITE_EN_OFFSET    9
-+#define    RTL8367C_VIAROM_WRITE_EN_MASK    0x200
-+#define    RTL8367C_SPIF_CK2_OFFSET    8
-+#define    RTL8367C_SPIF_CK2_MASK    0x100
-+#define    RTL8367C_RRCP_MDOE_OFFSET    7
-+#define    RTL8367C_RRCP_MDOE_MASK    0x80
-+#define    RTL8367C_DW8051_RATE_OFFSET    4
-+#define    RTL8367C_DW8051_RATE_MASK    0x70
-+#define    RTL8367C_IROM_MSB_OFFSET    2
-+#define    RTL8367C_IROM_MSB_MASK    0xC
-+#define    RTL8367C_ACS_IROM_ENABLE_OFFSET    1
-+#define    RTL8367C_ACS_IROM_ENABLE_MASK    0x2
-+#define    RTL8367C_DW8051_READY_OFFSET    0
-+#define    RTL8367C_DW8051_READY_MASK    0x1
-+
-+#define    RTL8367C_REG_BIST_CTRL    0x133c
-+#define    RTL8367C_DRF_BIST_DONE_ALL_OFFSET    5
-+#define    RTL8367C_DRF_BIST_DONE_ALL_MASK    0x20
-+#define    RTL8367C_DRF_BIST_PAUSE_ALL_OFFSET    4
-+#define    RTL8367C_DRF_BIST_PAUSE_ALL_MASK    0x10
-+#define    RTL8367C_BIST_DOAN_ALL_OFFSET    3
-+#define    RTL8367C_BIST_DOAN_ALL_MASK    0x8
-+#define    RTL8367C_BIST_PASS_OFFSET    0
-+#define    RTL8367C_BIST_PASS_MASK    0x7
-+
-+#define    RTL8367C_REG_DIAG_MODE2    0x133d
-+#define    RTL8367C_DIAG_MODE2_ACTRAM_OFFSET    1
-+#define    RTL8367C_DIAG_MODE2_ACTRAM_MASK    0x2
-+#define    RTL8367C_DIAG_MODE2_BCAM_ACTION_OFFSET    0
-+#define    RTL8367C_DIAG_MODE2_BCAM_ACTION_MASK    0x1
-+
-+#define    RTL8367C_REG_MDX_PHY_REG0    0x133e
-+#define    RTL8367C_PHY_BRD_MASK_OFFSET    4
-+#define    RTL8367C_PHY_BRD_MASK_MASK    0x1F0
-+#define    RTL8367C_MDX_INDACC_PAGE_OFFSET    0
-+#define    RTL8367C_MDX_INDACC_PAGE_MASK    0xF
-+
-+#define    RTL8367C_REG_MDX_PHY_REG1    0x133f
-+#define    RTL8367C_PHY_BRD_MODE_OFFSET    5
-+#define    RTL8367C_PHY_BRD_MODE_MASK    0x20
-+#define    RTL8367C_BRD_PHYAD_OFFSET    0
-+#define    RTL8367C_BRD_PHYAD_MASK    0x1F
-+
-+#define    RTL8367C_REG_DEBUG_SIGNAL_SELECT_SW    0x1340
-+
-+#define    RTL8367C_REG_DEBUG_SIGNAL_SELECT_B    0x1341
-+#define    RTL8367C_DEBUG_MX_OFFSET    9
-+#define    RTL8367C_DEBUG_MX_MASK    0xE00
-+#define    RTL8367C_DEBUG_SHIFT_MISC_OFFSET    6
-+#define    RTL8367C_DEBUG_SHIFT_MISC_MASK    0x1C0
-+#define    RTL8367C_DEBUG_SHIFT_SW_OFFSET    3
-+#define    RTL8367C_DEBUG_SHIFT_SW_MASK    0x38
-+#define    RTL8367C_DEBUG_SHIFT_GPHY_OFFSET    0
-+#define    RTL8367C_DEBUG_SHIFT_GPHY_MASK    0x7
-+
-+#define    RTL8367C_REG_DEBUG_SIGNAL_I    0x1343
-+
-+#define    RTL8367C_REG_DEBUG_SIGNAL_H    0x1344
-+
-+#define    RTL8367C_REG_DBGO_SEL_GPHY    0x1345
-+
-+#define    RTL8367C_REG_DBGO_SEL_MISC    0x1346
-+
-+#define    RTL8367C_REG_BYPASS_ABLTY_LOCK    0x1349
-+#define    RTL8367C_BYPASS_ABLTY_LOCK_OFFSET    0
-+#define    RTL8367C_BYPASS_ABLTY_LOCK_MASK    0xFF
-+
-+#define    RTL8367C_REG_BYPASS_ABLTY_LOCK_EXT    0x134a
-+#define    RTL8367C_BYPASS_P10_ABILIITY_LOCK_OFFSET    3
-+#define    RTL8367C_BYPASS_P10_ABILIITY_LOCK_MASK    0x8
-+#define    RTL8367C_BYPASS_EXT_ABILITY_LOCK_OFFSET    0
-+#define    RTL8367C_BYPASS_EXT_ABILITY_LOCK_MASK    0x7
-+
-+#define    RTL8367C_REG_ACL_GPIO    0x134f
-+#define    RTL8367C_ACL_GPIO_13_OFFSET    13
-+#define    RTL8367C_ACL_GPIO_13_MASK    0x2000
-+#define    RTL8367C_ACL_GPIO_12_OFFSET    12
-+#define    RTL8367C_ACL_GPIO_12_MASK    0x1000
-+#define    RTL8367C_ACL_GPIO_11_OFFSET    11
-+#define    RTL8367C_ACL_GPIO_11_MASK    0x800
-+#define    RTL8367C_ACL_GPIO_10_OFFSET    10
-+#define    RTL8367C_ACL_GPIO_10_MASK    0x400
-+#define    RTL8367C_ACL_GPIO_9_OFFSET    9
-+#define    RTL8367C_ACL_GPIO_9_MASK    0x200
-+#define    RTL8367C_ACL_GPIO_8_OFFSET    8
-+#define    RTL8367C_ACL_GPIO_8_MASK    0x100
-+#define    RTL8367C_ACL_GPIO_7_OFFSET    7
-+#define    RTL8367C_ACL_GPIO_7_MASK    0x80
-+#define    RTL8367C_ACL_GPIO_6_OFFSET    6
-+#define    RTL8367C_ACL_GPIO_6_MASK    0x40
-+#define    RTL8367C_ACL_GPIO_5_OFFSET    5
-+#define    RTL8367C_ACL_GPIO_5_MASK    0x20
-+#define    RTL8367C_ACL_GPIO_4_OFFSET    4
-+#define    RTL8367C_ACL_GPIO_4_MASK    0x10
-+#define    RTL8367C_ACL_GPIO_3_OFFSET    3
-+#define    RTL8367C_ACL_GPIO_3_MASK    0x8
-+#define    RTL8367C_ACL_GPIO_2_OFFSET    2
-+#define    RTL8367C_ACL_GPIO_2_MASK    0x4
-+#define    RTL8367C_ACL_GPIO_1_OFFSET    1
-+#define    RTL8367C_ACL_GPIO_1_MASK    0x2
-+#define    RTL8367C_ACL_GPIO_0_OFFSET    0
-+#define    RTL8367C_ACL_GPIO_0_MASK    0x1
-+
-+#define    RTL8367C_REG_EN_GPIO    0x1350
-+#define    RTL8367C_EN_GPIO_13_OFFSET    13
-+#define    RTL8367C_EN_GPIO_13_MASK    0x2000
-+#define    RTL8367C_EN_GPIO_12_OFFSET    12
-+#define    RTL8367C_EN_GPIO_12_MASK    0x1000
-+#define    RTL8367C_EN_GPIO_11_OFFSET    11
-+#define    RTL8367C_EN_GPIO_11_MASK    0x800
-+#define    RTL8367C_EN_GPIO_10_OFFSET    10
-+#define    RTL8367C_EN_GPIO_10_MASK    0x400
-+#define    RTL8367C_EN_GPIO_9_OFFSET    9
-+#define    RTL8367C_EN_GPIO_9_MASK    0x200
-+#define    RTL8367C_EN_GPIO_8_OFFSET    8
-+#define    RTL8367C_EN_GPIO_8_MASK    0x100
-+#define    RTL8367C_EN_GPIO_7_OFFSET    7
-+#define    RTL8367C_EN_GPIO_7_MASK    0x80
-+#define    RTL8367C_EN_GPIO_6_OFFSET    6
-+#define    RTL8367C_EN_GPIO_6_MASK    0x40
-+#define    RTL8367C_EN_GPIO_5_OFFSET    5
-+#define    RTL8367C_EN_GPIO_5_MASK    0x20
-+#define    RTL8367C_EN_GPIO_4_OFFSET    4
-+#define    RTL8367C_EN_GPIO_4_MASK    0x10
-+#define    RTL8367C_EN_GPIO_3_OFFSET    3
-+#define    RTL8367C_EN_GPIO_3_MASK    0x8
-+#define    RTL8367C_EN_GPIO_2_OFFSET    2
-+#define    RTL8367C_EN_GPIO_2_MASK    0x4
-+#define    RTL8367C_EN_GPIO_1_OFFSET    1
-+#define    RTL8367C_EN_GPIO_1_MASK    0x2
-+#define    RTL8367C_EN_GPIO_0_OFFSET    0
-+#define    RTL8367C_EN_GPIO_0_MASK    0x1
-+
-+#define    RTL8367C_REG_CFG_MULTI_PIN    0x1351
-+#define    RTL8367C_CFG_MULTI_PIN_OFFSET    0
-+#define    RTL8367C_CFG_MULTI_PIN_MASK    0x3
-+
-+#define    RTL8367C_REG_PORT0_STATUS    0x1352
-+#define    RTL8367C_PORT0_STATUS_EN_1000_LPI_OFFSET    11
-+#define    RTL8367C_PORT0_STATUS_EN_1000_LPI_MASK    0x800
-+#define    RTL8367C_PORT0_STATUS_EN_100_LPI_OFFSET    10
-+#define    RTL8367C_PORT0_STATUS_EN_100_LPI_MASK    0x400
-+#define    RTL8367C_PORT0_STATUS_NWAY_FAULT_OFFSET    9
-+#define    RTL8367C_PORT0_STATUS_NWAY_FAULT_MASK    0x200
-+#define    RTL8367C_PORT0_STATUS_LINK_ON_MASTER_OFFSET    8
-+#define    RTL8367C_PORT0_STATUS_LINK_ON_MASTER_MASK    0x100
-+#define    RTL8367C_PORT0_STATUS_NWAY_CAP_OFFSET    7
-+#define    RTL8367C_PORT0_STATUS_NWAY_CAP_MASK    0x80
-+#define    RTL8367C_PORT0_STATUS_TX_FLOWCTRL_CAP_OFFSET    6
-+#define    RTL8367C_PORT0_STATUS_TX_FLOWCTRL_CAP_MASK    0x40
-+#define    RTL8367C_PORT0_STATUS_RX_FLOWCTRL_CAP_OFFSET    5
-+#define    RTL8367C_PORT0_STATUS_RX_FLOWCTRL_CAP_MASK    0x20
-+#define    RTL8367C_PORT0_STATUS_LINK_STATE_OFFSET    4
-+#define    RTL8367C_PORT0_STATUS_LINK_STATE_MASK    0x10
-+#define    RTL8367C_PORT0_STATUS_FULL_DUPLUX_CAP_OFFSET    2
-+#define    RTL8367C_PORT0_STATUS_FULL_DUPLUX_CAP_MASK    0x4
-+#define    RTL8367C_PORT0_STATUS_LINK_SPEED_OFFSET    0
-+#define    RTL8367C_PORT0_STATUS_LINK_SPEED_MASK    0x3
-+
-+#define    RTL8367C_REG_PORT1_STATUS    0x1353
-+#define    RTL8367C_PORT1_STATUS_EN_1000_LPI_OFFSET    11
-+#define    RTL8367C_PORT1_STATUS_EN_1000_LPI_MASK    0x800
-+#define    RTL8367C_PORT1_STATUS_EN_100_LPI_OFFSET    10
-+#define    RTL8367C_PORT1_STATUS_EN_100_LPI_MASK    0x400
-+#define    RTL8367C_PORT1_STATUS_NWAY_FAULT_OFFSET    9
-+#define    RTL8367C_PORT1_STATUS_NWAY_FAULT_MASK    0x200
-+#define    RTL8367C_PORT1_STATUS_LINK_ON_MASTER_OFFSET    8
-+#define    RTL8367C_PORT1_STATUS_LINK_ON_MASTER_MASK    0x100
-+#define    RTL8367C_PORT1_STATUS_NWAY_CAP_OFFSET    7
-+#define    RTL8367C_PORT1_STATUS_NWAY_CAP_MASK    0x80
-+#define    RTL8367C_PORT1_STATUS_TX_FLOWCTRL_CAP_OFFSET    6
-+#define    RTL8367C_PORT1_STATUS_TX_FLOWCTRL_CAP_MASK    0x40
-+#define    RTL8367C_PORT1_STATUS_RX_FLOWCTRL_CAP_OFFSET    5
-+#define    RTL8367C_PORT1_STATUS_RX_FLOWCTRL_CAP_MASK    0x20
-+#define    RTL8367C_PORT1_STATUS_LINK_STATE_OFFSET    4
-+#define    RTL8367C_PORT1_STATUS_LINK_STATE_MASK    0x10
-+#define    RTL8367C_PORT1_STATUS_FULL_DUPLUX_CAP_OFFSET    2
-+#define    RTL8367C_PORT1_STATUS_FULL_DUPLUX_CAP_MASK    0x4
-+#define    RTL8367C_PORT1_STATUS_LINK_SPEED_OFFSET    0
-+#define    RTL8367C_PORT1_STATUS_LINK_SPEED_MASK    0x3
-+
-+#define    RTL8367C_REG_PORT2_STATUS    0x1354
-+#define    RTL8367C_PORT2_STATUS_EN_1000_LPI_OFFSET    11
-+#define    RTL8367C_PORT2_STATUS_EN_1000_LPI_MASK    0x800
-+#define    RTL8367C_PORT2_STATUS_EN_100_LPI_OFFSET    10
-+#define    RTL8367C_PORT2_STATUS_EN_100_LPI_MASK    0x400
-+#define    RTL8367C_PORT2_STATUS_NWAY_FAULT_OFFSET    9
-+#define    RTL8367C_PORT2_STATUS_NWAY_FAULT_MASK    0x200
-+#define    RTL8367C_PORT2_STATUS_LINK_ON_MASTER_OFFSET    8
-+#define    RTL8367C_PORT2_STATUS_LINK_ON_MASTER_MASK    0x100
-+#define    RTL8367C_PORT2_STATUS_NWAY_CAP_OFFSET    7
-+#define    RTL8367C_PORT2_STATUS_NWAY_CAP_MASK    0x80
-+#define    RTL8367C_PORT2_STATUS_TX_FLOWCTRL_CAP_OFFSET    6
-+#define    RTL8367C_PORT2_STATUS_TX_FLOWCTRL_CAP_MASK    0x40
-+#define    RTL8367C_PORT2_STATUS_RX_FLOWCTRL_CAP_OFFSET    5
-+#define    RTL8367C_PORT2_STATUS_RX_FLOWCTRL_CAP_MASK    0x20
-+#define    RTL8367C_PORT2_STATUS_LINK_STATE_OFFSET    4
-+#define    RTL8367C_PORT2_STATUS_LINK_STATE_MASK    0x10
-+#define    RTL8367C_PORT2_STATUS_FULL_DUPLUX_CAP_OFFSET    2
-+#define    RTL8367C_PORT2_STATUS_FULL_DUPLUX_CAP_MASK    0x4
-+#define    RTL8367C_PORT2_STATUS_LINK_SPEED_OFFSET    0
-+#define    RTL8367C_PORT2_STATUS_LINK_SPEED_MASK    0x3
-+
-+#define    RTL8367C_REG_PORT3_STATUS    0x1355
-+#define    RTL8367C_PORT3_STATUS_EN_1000_LPI_OFFSET    11
-+#define    RTL8367C_PORT3_STATUS_EN_1000_LPI_MASK    0x800
-+#define    RTL8367C_PORT3_STATUS_EN_100_LPI_OFFSET    10
-+#define    RTL8367C_PORT3_STATUS_EN_100_LPI_MASK    0x400
-+#define    RTL8367C_PORT3_STATUS_NWAY_FAULT_OFFSET    9
-+#define    RTL8367C_PORT3_STATUS_NWAY_FAULT_MASK    0x200
-+#define    RTL8367C_PORT3_STATUS_LINK_ON_MASTER_OFFSET    8
-+#define    RTL8367C_PORT3_STATUS_LINK_ON_MASTER_MASK    0x100
-+#define    RTL8367C_PORT3_STATUS_NWAY_CAP_OFFSET    7
-+#define    RTL8367C_PORT3_STATUS_NWAY_CAP_MASK    0x80
-+#define    RTL8367C_PORT3_STATUS_TX_FLOWCTRL_CAP_OFFSET    6
-+#define    RTL8367C_PORT3_STATUS_TX_FLOWCTRL_CAP_MASK    0x40
-+#define    RTL8367C_PORT3_STATUS_RX_FLOWCTRL_CAP_OFFSET    5
-+#define    RTL8367C_PORT3_STATUS_RX_FLOWCTRL_CAP_MASK    0x20
-+#define    RTL8367C_PORT3_STATUS_LINK_STATE_OFFSET    4
-+#define    RTL8367C_PORT3_STATUS_LINK_STATE_MASK    0x10
-+#define    RTL8367C_PORT3_STATUS_FULL_DUPLUX_CAP_OFFSET    2
-+#define    RTL8367C_PORT3_STATUS_FULL_DUPLUX_CAP_MASK    0x4
-+#define    RTL8367C_PORT3_STATUS_LINK_SPEED_OFFSET    0
-+#define    RTL8367C_PORT3_STATUS_LINK_SPEED_MASK    0x3
-+
-+#define    RTL8367C_REG_PORT4_STATUS    0x1356
-+#define    RTL8367C_PORT4_STATUS_EN_1000_LPI_OFFSET    11
-+#define    RTL8367C_PORT4_STATUS_EN_1000_LPI_MASK    0x800
-+#define    RTL8367C_PORT4_STATUS_EN_100_LPI_OFFSET    10
-+#define    RTL8367C_PORT4_STATUS_EN_100_LPI_MASK    0x400
-+#define    RTL8367C_PORT4_STATUS_NWAY_FAULT_OFFSET    9
-+#define    RTL8367C_PORT4_STATUS_NWAY_FAULT_MASK    0x200
-+#define    RTL8367C_PORT4_STATUS_LINK_ON_MASTER_OFFSET    8
-+#define    RTL8367C_PORT4_STATUS_LINK_ON_MASTER_MASK    0x100
-+#define    RTL8367C_PORT4_STATUS_NWAY_CAP_OFFSET    7
-+#define    RTL8367C_PORT4_STATUS_NWAY_CAP_MASK    0x80
-+#define    RTL8367C_PORT4_STATUS_TX_FLOWCTRL_CAP_OFFSET    6
-+#define    RTL8367C_PORT4_STATUS_TX_FLOWCTRL_CAP_MASK    0x40
-+#define    RTL8367C_PORT4_STATUS_RX_FLOWCTRL_CAP_OFFSET    5
-+#define    RTL8367C_PORT4_STATUS_RX_FLOWCTRL_CAP_MASK    0x20
-+#define    RTL8367C_PORT4_STATUS_LINK_STATE_OFFSET    4
-+#define    RTL8367C_PORT4_STATUS_LINK_STATE_MASK    0x10
-+#define    RTL8367C_PORT4_STATUS_FULL_DUPLUX_CAP_OFFSET    2
-+#define    RTL8367C_PORT4_STATUS_FULL_DUPLUX_CAP_MASK    0x4
-+#define    RTL8367C_PORT4_STATUS_LINK_SPEED_OFFSET    0
-+#define    RTL8367C_PORT4_STATUS_LINK_SPEED_MASK    0x3
-+
-+#define    RTL8367C_REG_PORT5_STATUS    0x1357
-+#define    RTL8367C_PORT5_STATUS_EN_1000_LPI_OFFSET    11
-+#define    RTL8367C_PORT5_STATUS_EN_1000_LPI_MASK    0x800
-+#define    RTL8367C_PORT5_STATUS_EN_100_LPI_OFFSET    10
-+#define    RTL8367C_PORT5_STATUS_EN_100_LPI_MASK    0x400
-+#define    RTL8367C_PORT5_STATUS_NWAY_FAULT_OFFSET    9
-+#define    RTL8367C_PORT5_STATUS_NWAY_FAULT_MASK    0x200
-+#define    RTL8367C_PORT5_STATUS_LINK_ON_MASTER_OFFSET    8
-+#define    RTL8367C_PORT5_STATUS_LINK_ON_MASTER_MASK    0x100
-+#define    RTL8367C_PORT5_STATUS_NWAY_CAP_OFFSET    7
-+#define    RTL8367C_PORT5_STATUS_NWAY_CAP_MASK    0x80
-+#define    RTL8367C_PORT5_STATUS_TX_FLOWCTRL_CAP_OFFSET    6
-+#define    RTL8367C_PORT5_STATUS_TX_FLOWCTRL_CAP_MASK    0x40
-+#define    RTL8367C_PORT5_STATUS_RX_FLOWCTRL_CAP_OFFSET    5
-+#define    RTL8367C_PORT5_STATUS_RX_FLOWCTRL_CAP_MASK    0x20
-+#define    RTL8367C_PORT5_STATUS_LINK_STATE_OFFSET    4
-+#define    RTL8367C_PORT5_STATUS_LINK_STATE_MASK    0x10
-+#define    RTL8367C_PORT5_STATUS_FULL_DUPLUX_CAP_OFFSET    2
-+#define    RTL8367C_PORT5_STATUS_FULL_DUPLUX_CAP_MASK    0x4
-+#define    RTL8367C_PORT5_STATUS_LINK_SPEED_OFFSET    0
-+#define    RTL8367C_PORT5_STATUS_LINK_SPEED_MASK    0x3
-+
-+#define    RTL8367C_REG_PORT6_STATUS    0x1358
-+#define    RTL8367C_PORT6_STATUS_EN_1000_LPI_OFFSET    11
-+#define    RTL8367C_PORT6_STATUS_EN_1000_LPI_MASK    0x800
-+#define    RTL8367C_PORT6_STATUS_EN_100_LPI_OFFSET    10
-+#define    RTL8367C_PORT6_STATUS_EN_100_LPI_MASK    0x400
-+#define    RTL8367C_PORT6_STATUS_NWAY_FAULT_OFFSET    9
-+#define    RTL8367C_PORT6_STATUS_NWAY_FAULT_MASK    0x200
-+#define    RTL8367C_PORT6_STATUS_LINK_ON_MASTER_OFFSET    8
-+#define    RTL8367C_PORT6_STATUS_LINK_ON_MASTER_MASK    0x100
-+#define    RTL8367C_PORT6_STATUS_NWAY_CAP_OFFSET    7
-+#define    RTL8367C_PORT6_STATUS_NWAY_CAP_MASK    0x80
-+#define    RTL8367C_PORT6_STATUS_TX_FLOWCTRL_CAP_OFFSET    6
-+#define    RTL8367C_PORT6_STATUS_TX_FLOWCTRL_CAP_MASK    0x40
-+#define    RTL8367C_PORT6_STATUS_RX_FLOWCTRL_CAP_OFFSET    5
-+#define    RTL8367C_PORT6_STATUS_RX_FLOWCTRL_CAP_MASK    0x20
-+#define    RTL8367C_PORT6_STATUS_LINK_STATE_OFFSET    4
-+#define    RTL8367C_PORT6_STATUS_LINK_STATE_MASK    0x10
-+#define    RTL8367C_PORT6_STATUS_FULL_DUPLUX_CAP_OFFSET    2
-+#define    RTL8367C_PORT6_STATUS_FULL_DUPLUX_CAP_MASK    0x4
-+#define    RTL8367C_PORT6_STATUS_LINK_SPEED_OFFSET    0
-+#define    RTL8367C_PORT6_STATUS_LINK_SPEED_MASK    0x3
-+
-+#define    RTL8367C_REG_PORT7_STATUS    0x1359
-+#define    RTL8367C_PORT7_STATUS_EN_1000_LPI_OFFSET    11
-+#define    RTL8367C_PORT7_STATUS_EN_1000_LPI_MASK    0x800
-+#define    RTL8367C_PORT7_STATUS_EN_100_LPI_OFFSET    10
-+#define    RTL8367C_PORT7_STATUS_EN_100_LPI_MASK    0x400
-+#define    RTL8367C_PORT7_STATUS_NWAY_FAULT_OFFSET    9
-+#define    RTL8367C_PORT7_STATUS_NWAY_FAULT_MASK    0x200
-+#define    RTL8367C_PORT7_STATUS_LINK_ON_MASTER_OFFSET    8
-+#define    RTL8367C_PORT7_STATUS_LINK_ON_MASTER_MASK    0x100
-+#define    RTL8367C_PORT7_STATUS_NWAY_CAP_OFFSET    7
-+#define    RTL8367C_PORT7_STATUS_NWAY_CAP_MASK    0x80
-+#define    RTL8367C_PORT7_STATUS_TX_FLOWCTRL_CAP_OFFSET    6
-+#define    RTL8367C_PORT7_STATUS_TX_FLOWCTRL_CAP_MASK    0x40
-+#define    RTL8367C_PORT7_STATUS_RX_FLOWCTRL_CAP_OFFSET    5
-+#define    RTL8367C_PORT7_STATUS_RX_FLOWCTRL_CAP_MASK    0x20
-+#define    RTL8367C_PORT7_STATUS_LINK_STATE_OFFSET    4
-+#define    RTL8367C_PORT7_STATUS_LINK_STATE_MASK    0x10
-+#define    RTL8367C_PORT7_STATUS_FULL_DUPLUX_CAP_OFFSET    2
-+#define    RTL8367C_PORT7_STATUS_FULL_DUPLUX_CAP_MASK    0x4
-+#define    RTL8367C_PORT7_STATUS_LINK_SPEED_OFFSET    0
-+#define    RTL8367C_PORT7_STATUS_LINK_SPEED_MASK    0x3
-+
-+#define    RTL8367C_REG_PORT8_STATUS    0x135a
-+#define    RTL8367C_PORT8_STATUS_EN_1000_LPI_OFFSET    11
-+#define    RTL8367C_PORT8_STATUS_EN_1000_LPI_MASK    0x800
-+#define    RTL8367C_PORT8_STATUS_EN_100_LPI_OFFSET    10
-+#define    RTL8367C_PORT8_STATUS_EN_100_LPI_MASK    0x400
-+#define    RTL8367C_PORT8_STATUS_NWAY_FAULT_OFFSET    9
-+#define    RTL8367C_PORT8_STATUS_NWAY_FAULT_MASK    0x200
-+#define    RTL8367C_PORT8_STATUS_LINK_ON_MASTER_OFFSET    8
-+#define    RTL8367C_PORT8_STATUS_LINK_ON_MASTER_MASK    0x100
-+#define    RTL8367C_PORT8_STATUS_NWAY_CAP_OFFSET    7
-+#define    RTL8367C_PORT8_STATUS_NWAY_CAP_MASK    0x80
-+#define    RTL8367C_PORT8_STATUS_TX_FLOWCTRL_CAP_OFFSET    6
-+#define    RTL8367C_PORT8_STATUS_TX_FLOWCTRL_CAP_MASK    0x40
-+#define    RTL8367C_PORT8_STATUS_RX_FLOWCTRL_CAP_OFFSET    5
-+#define    RTL8367C_PORT8_STATUS_RX_FLOWCTRL_CAP_MASK    0x20
-+#define    RTL8367C_PORT8_STATUS_LINK_STATE_OFFSET    4
-+#define    RTL8367C_PORT8_STATUS_LINK_STATE_MASK    0x10
-+#define    RTL8367C_PORT8_STATUS_FULL_DUPLUX_CAP_OFFSET    2
-+#define    RTL8367C_PORT8_STATUS_FULL_DUPLUX_CAP_MASK    0x4
-+#define    RTL8367C_PORT8_STATUS_LINK_SPEED_OFFSET    0
-+#define    RTL8367C_PORT8_STATUS_LINK_SPEED_MASK    0x3
-+
-+#define    RTL8367C_REG_PORT9_STATUS    0x135b
-+#define    RTL8367C_PORT9_STATUS_EN_1000_LPI_OFFSET    11
-+#define    RTL8367C_PORT9_STATUS_EN_1000_LPI_MASK    0x800
-+#define    RTL8367C_PORT9_STATUS_EN_100_LPI_OFFSET    10
-+#define    RTL8367C_PORT9_STATUS_EN_100_LPI_MASK    0x400
-+#define    RTL8367C_PORT9_STATUS_NWAY_FAULT_OFFSET    9
-+#define    RTL8367C_PORT9_STATUS_NWAY_FAULT_MASK    0x200
-+#define    RTL8367C_PORT9_STATUS_LINK_ON_MASTER_OFFSET    8
-+#define    RTL8367C_PORT9_STATUS_LINK_ON_MASTER_MASK    0x100
-+#define    RTL8367C_PORT9_STATUS_NWAY_CAP_OFFSET    7
-+#define    RTL8367C_PORT9_STATUS_NWAY_CAP_MASK    0x80
-+#define    RTL8367C_PORT9_STATUS_TX_FLOWCTRL_CAP_OFFSET    6
-+#define    RTL8367C_PORT9_STATUS_TX_FLOWCTRL_CAP_MASK    0x40
-+#define    RTL8367C_PORT9_STATUS_RX_FLOWCTRL_CAP_OFFSET    5
-+#define    RTL8367C_PORT9_STATUS_RX_FLOWCTRL_CAP_MASK    0x20
-+#define    RTL8367C_PORT9_STATUS_LINK_STATE_OFFSET    4
-+#define    RTL8367C_PORT9_STATUS_LINK_STATE_MASK    0x10
-+#define    RTL8367C_PORT9_STATUS_FULL_DUPLUX_CAP_OFFSET    2
-+#define    RTL8367C_PORT9_STATUS_FULL_DUPLUX_CAP_MASK    0x4
-+#define    RTL8367C_PORT9_STATUS_LINK_SPEED_OFFSET    0
-+#define    RTL8367C_PORT9_STATUS_LINK_SPEED_MASK    0x3
-+
-+#define    RTL8367C_REG_PORT10_STATUS    0x135c
-+#define    RTL8367C_PORT10_STATUS_EN_1000_LPI_OFFSET    11
-+#define    RTL8367C_PORT10_STATUS_EN_1000_LPI_MASK    0x800
-+#define    RTL8367C_PORT10_STATUS_EN_100_LPI_OFFSET    10
-+#define    RTL8367C_PORT10_STATUS_EN_100_LPI_MASK    0x400
-+#define    RTL8367C_PORT10_STATUS_NWAY_FAULT_OFFSET    9
-+#define    RTL8367C_PORT10_STATUS_NWAY_FAULT_MASK    0x200
-+#define    RTL8367C_PORT10_STATUS_LINK_ON_MASTER_OFFSET    8
-+#define    RTL8367C_PORT10_STATUS_LINK_ON_MASTER_MASK    0x100
-+#define    RTL8367C_PORT10_STATUS_NWAY_CAP_OFFSET    7
-+#define    RTL8367C_PORT10_STATUS_NWAY_CAP_MASK    0x80
-+#define    RTL8367C_PORT10_STATUS_TX_FLOWCTRL_CAP_OFFSET    6
-+#define    RTL8367C_PORT10_STATUS_TX_FLOWCTRL_CAP_MASK    0x40
-+#define    RTL8367C_PORT10_STATUS_RX_FLOWCTRL_CAP_OFFSET    5
-+#define    RTL8367C_PORT10_STATUS_RX_FLOWCTRL_CAP_MASK    0x20
-+#define    RTL8367C_PORT10_STATUS_LINK_STATE_OFFSET    4
-+#define    RTL8367C_PORT10_STATUS_LINK_STATE_MASK    0x10
-+#define    RTL8367C_PORT10_STATUS_FULL_DUPLUX_CAP_OFFSET    2
-+#define    RTL8367C_PORT10_STATUS_FULL_DUPLUX_CAP_MASK    0x4
-+#define    RTL8367C_PORT10_STATUS_LINK_SPEED_OFFSET    0
-+#define    RTL8367C_PORT10_STATUS_LINK_SPEED_MASK    0x3
-+
-+#define    RTL8367C_REG_UPS_CTRL0    0x1362
-+#define    RTL8367C_P3_REF_SD_BIT0_OFFSET    8
-+#define    RTL8367C_P3_REF_SD_BIT0_MASK    0xFF00
-+#define    RTL8367C_P2_REF_SD_OFFSET    0
-+#define    RTL8367C_P2_REF_SD_MASK    0xFF
-+
-+#define    RTL8367C_REG_UPS_CTRL1    0x1363
-+#define    RTL8367C_UPS_OUT_OFFSET    8
-+#define    RTL8367C_UPS_OUT_MASK    0xFF00
-+#define    RTL8367C_UPS_WRITE_PULSE_OFFSET    1
-+#define    RTL8367C_UPS_WRITE_PULSE_MASK    0x2
-+#define    RTL8367C_UPS_EN_OFFSET    0
-+#define    RTL8367C_UPS_EN_MASK    0x1
-+
-+#define    RTL8367C_REG_UPS_CTRL2    0x1364
-+#define    RTL8367C_IGNOE_MAC8_LINK_OFFSET    15
-+#define    RTL8367C_IGNOE_MAC8_LINK_MASK    0x8000
-+#define    RTL8367C_AGREE_SLEEP_OFFSET    14
-+#define    RTL8367C_AGREE_SLEEP_MASK    0x4000
-+#define    RTL8367C_WAIT_FOR_AGREEMENT_OFFSET    13
-+#define    RTL8367C_WAIT_FOR_AGREEMENT_MASK    0x2000
-+#define    RTL8367C_WAKE_UP_BY_LINK_OFFSET    12
-+#define    RTL8367C_WAKE_UP_BY_LINK_MASK    0x1000
-+#define    RTL8367C_WAKE_UP_BY_PHY_OFFSET    11
-+#define    RTL8367C_WAKE_UP_BY_PHY_MASK    0x800
-+#define    RTL8367C_SLOW_CLK_TGL_RATE_OFFSET    7
-+#define    RTL8367C_SLOW_CLK_TGL_RATE_MASK    0x780
-+#define    RTL8367C_PLL_G1_CTRL_EN_OFFSET    6
-+#define    RTL8367C_PLL_G1_CTRL_EN_MASK    0x40
-+#define    RTL8367C_PLL_G0_CTRL_EN_OFFSET    5
-+#define    RTL8367C_PLL_G0_CTRL_EN_MASK    0x20
-+#define    RTL8367C_SLOW_DOWN_PLL_EN_OFFSET    4
-+#define    RTL8367C_SLOW_DOWN_PLL_EN_MASK    0x10
-+#define    RTL8367C_SLOW_DOWN_CLK_EN_OFFSET    3
-+#define    RTL8367C_SLOW_DOWN_CLK_EN_MASK    0x8
-+#define    RTL8367C_GATING_CLK_SDS_EN_OFFSET    2
-+#define    RTL8367C_GATING_CLK_SDS_EN_MASK    0x4
-+#define    RTL8367C_GATING_CLK_CHIP_EN_OFFSET    1
-+#define    RTL8367C_GATING_CLK_CHIP_EN_MASK    0x2
-+#define    RTL8367C_GATING_SW_EN_OFFSET    0
-+#define    RTL8367C_GATING_SW_EN_MASK    0x1
-+
-+#define    RTL8367C_REG_GATING_CLK_1    0x1365
-+#define    RTL8367C_ALDPS_MODE_4_OFFSET    15
-+#define    RTL8367C_ALDPS_MODE_4_MASK    0x8000
-+#define    RTL8367C_ALDPS_MODE_3_OFFSET    14
-+#define    RTL8367C_ALDPS_MODE_3_MASK    0x4000
-+#define    RTL8367C_ALDPS_MODE_2_OFFSET    13
-+#define    RTL8367C_ALDPS_MODE_2_MASK    0x2000
-+#define    RTL8367C_ALDPS_MODE_1_OFFSET    12
-+#define    RTL8367C_ALDPS_MODE_1_MASK    0x1000
-+#define    RTL8367C_ALDPS_MODE_0_OFFSET    11
-+#define    RTL8367C_ALDPS_MODE_0_MASK    0x800
-+#define    RTL8367C_UPS_DBGO_OFFSET    10
-+#define    RTL8367C_UPS_DBGO_MASK    0x400
-+#define    RTL8367C_IFMX_AFF_NOT_FF_OUT_OFFSET    9
-+#define    RTL8367C_IFMX_AFF_NOT_FF_OUT_MASK    0x200
-+#define    RTL8367C_WATER_LEVEL_FD_OFFSET    6
-+#define    RTL8367C_WATER_LEVEL_FD_MASK    0x1C0
-+#define    RTL8367C_WATER_LEVEL_Y2X_OFFSET    3
-+#define    RTL8367C_WATER_LEVEL_Y2X_MASK    0x38
-+#define    RTL8367C_WATER_LEVEL_X2Y_2_OFFSET    2
-+#define    RTL8367C_WATER_LEVEL_X2Y_2_MASK    0x4
-+#define    RTL8367C_IGNOE_MAC10_LINK_OFFSET    1
-+#define    RTL8367C_IGNOE_MAC10_LINK_MASK    0x2
-+#define    RTL8367C_IGNOE_MAC9_LINK_OFFSET    0
-+#define    RTL8367C_IGNOE_MAC9_LINK_MASK    0x1
-+
-+#define    RTL8367C_REG_UPS_CTRL4    0x1366
-+#define    RTL8367C_PROB_EN_OFFSET    6
-+#define    RTL8367C_PROB_EN_MASK    0x40
-+#define    RTL8367C_PLL_DOWN_OFFSET    1
-+#define    RTL8367C_PLL_DOWN_MASK    0x2
-+#define    RTL8367C_XTAL_DOWN_OFFSET    0
-+#define    RTL8367C_XTAL_DOWN_MASK    0x1
-+
-+#define    RTL8367C_REG_UPS_CTRL5    0x1367
-+#define    RTL8367C_FRC_CPU_ACPT_OFFSET    3
-+#define    RTL8367C_FRC_CPU_ACPT_MASK    0x8
-+#define    RTL8367C_UPS_CPU_ACPT_OFFSET    2
-+#define    RTL8367C_UPS_CPU_ACPT_MASK    0x4
-+#define    RTL8367C_UPS_DBG_4_OFFSET    0
-+#define    RTL8367C_UPS_DBG_4_MASK    0x3
-+
-+#define    RTL8367C_REG_UPS_CTRL6    0x1368
-+#define    RTL8367C_UPS_CTRL6_OFFSET    0
-+#define    RTL8367C_UPS_CTRL6_MASK    0xF
-+
-+#define    RTL8367C_REG_EFUSE_CMD_70B    0x1369
-+
-+#define    RTL8367C_REG_EFUSE_CMD    0x1370
-+#define    RTL8367C_EFUSE_TIME_OUT_FLAG_OFFSET    3
-+#define    RTL8367C_EFUSE_TIME_OUT_FLAG_MASK    0x8
-+#define    RTL8367C_EFUSE_ACCESS_BUSY_OFFSET    2
-+#define    RTL8367C_EFUSE_ACCESS_BUSY_MASK    0x4
-+#define    RTL8367C_EFUSE_COMMAND_EN_OFFSET    1
-+#define    RTL8367C_EFUSE_COMMAND_EN_MASK    0x2
-+#define    RTL8367C_EFUSE_WR_OFFSET    0
-+#define    RTL8367C_EFUSE_WR_MASK    0x1
-+
-+#define    RTL8367C_REG_EFUSE_ADR    0x1371
-+#define    RTL8367C_DUMMY_15_10_OFFSET    8
-+#define    RTL8367C_DUMMY_15_10_MASK    0xFF00
-+#define    RTL8367C_EFUSE_ADDRESS_OFFSET    0
-+#define    RTL8367C_EFUSE_ADDRESS_MASK    0xFF
-+
-+#define    RTL8367C_REG_EFUSE_WDAT    0x1372
-+
-+#define    RTL8367C_REG_EFUSE_RDAT    0x1373
-+
-+#define    RTL8367C_REG_I2C_CTRL    0x1374
-+#define    RTL8367C_MDX_MST_FAIL_LAT_OFFSET    1
-+#define    RTL8367C_MDX_MST_FAIL_LAT_MASK    0x2
-+#define    RTL8367C_MDX_MST_FAIL_CLRPS_OFFSET    0
-+#define    RTL8367C_MDX_MST_FAIL_CLRPS_MASK    0x1
-+
-+#define    RTL8367C_REG_EEE_CFG    0x1375
-+#define    RTL8367C_CFG_BYPASS_GATELPTD_OFFSET    11
-+#define    RTL8367C_CFG_BYPASS_GATELPTD_MASK    0x800
-+#define    RTL8367C_EEE_ABT_ADDR2_OFFSET    6
-+#define    RTL8367C_EEE_ABT_ADDR2_MASK    0x7C0
-+#define    RTL8367C_EEE_ABT_ADDR1_OFFSET    1
-+#define    RTL8367C_EEE_ABT_ADDR1_MASK    0x3E
-+#define    RTL8367C_EEE_POLL_EN_OFFSET    0
-+#define    RTL8367C_EEE_POLL_EN_MASK    0x1
-+
-+#define    RTL8367C_REG_EEE_PAGE    0x1376
-+
-+#define    RTL8367C_REG_EEE_EXT_PAGE    0x1377
-+
-+#define    RTL8367C_REG_EEE_EN_SPD1000    0x1378
-+
-+#define    RTL8367C_REG_EEE_EN_SPD100    0x1379
-+
-+#define    RTL8367C_REG_EEE_LP_SPD1000    0x137a
-+
-+#define    RTL8367C_REG_EEE_LP_SPD100    0x137b
-+
-+#define    RTL8367C_REG_DW8051_PRO_REG0    0x13a0
-+
-+#define    RTL8367C_REG_DW8051_PRO_REG1    0x13a1
-+
-+#define    RTL8367C_REG_DW8051_PRO_REG2    0x13a2
-+
-+#define    RTL8367C_REG_DW8051_PRO_REG3    0x13a3
-+
-+#define    RTL8367C_REG_DW8051_PRO_REG4    0x13a4
-+
-+#define    RTL8367C_REG_DW8051_PRO_REG5    0x13a5
-+
-+#define    RTL8367C_REG_DW8051_PRO_REG6    0x13a6
-+
-+#define    RTL8367C_REG_DW8051_PRO_REG7    0x13a7
-+
-+#define    RTL8367C_REG_PROTECT_ID    0x13c0
-+
-+#define    RTL8367C_REG_CHIP_VER_INTL    0x13c1
-+#define    RTL8367C_CHIP_VER_INTL_OFFSET    0
-+#define    RTL8367C_CHIP_VER_INTL_MASK    0xF
-+
-+#define    RTL8367C_REG_MAGIC_ID    0x13c2
-+
-+#define    RTL8367C_REG_DIGITAL_INTERFACE_SELECT_1    0x13c3
-+#define    RTL8367C_SKIP_MII_2_RXER_OFFSET    4
-+#define    RTL8367C_SKIP_MII_2_RXER_MASK    0x10
-+#define    RTL8367C_SELECT_GMII_2_OFFSET    0
-+#define    RTL8367C_SELECT_GMII_2_MASK    0xF
-+
-+#define    RTL8367C_REG_DIGITAL_INTERFACE2_FORCE    0x13c4
-+#define    RTL8367C_GMII_2_FORCE_OFFSET    12
-+#define    RTL8367C_GMII_2_FORCE_MASK    0x1000
-+#define    RTL8367C_RGMII_2_FORCE_OFFSET    0
-+#define    RTL8367C_RGMII_2_FORCE_MASK    0xFFF
-+
-+#define    RTL8367C_REG_EXT2_RGMXF    0x13c5
-+#define    RTL8367C_EXT2_RGTX_INV_OFFSET    6
-+#define    RTL8367C_EXT2_RGTX_INV_MASK    0x40
-+#define    RTL8367C_EXT2_RGRX_INV_OFFSET    5
-+#define    RTL8367C_EXT2_RGRX_INV_MASK    0x20
-+#define    RTL8367C_EXT2_RGMXF_OFFSET    0
-+#define    RTL8367C_EXT2_RGMXF_MASK    0x1F
-+
-+#define    RTL8367C_REG_ROUTER_UPS_CFG    0x13c6
-+#define    RTL8367C_UPS_Status_OFFSET    1
-+#define    RTL8367C_UPS_Status_MASK    0x2
-+#define    RTL8367C_SoftStart_OFFSET    0
-+#define    RTL8367C_SoftStart_MASK    0x1
-+
-+#define    RTL8367C_REG_CTRL_GPIO    0x13c7
-+#define    RTL8367C_CTRL_GPIO_13_OFFSET    13
-+#define    RTL8367C_CTRL_GPIO_13_MASK    0x2000
-+#define    RTL8367C_CTRL_GPIO_12_OFFSET    12
-+#define    RTL8367C_CTRL_GPIO_12_MASK    0x1000
-+#define    RTL8367C_CTRL_GPIO_11_OFFSET    11
-+#define    RTL8367C_CTRL_GPIO_11_MASK    0x800
-+#define    RTL8367C_CTRL_GPIO_10_OFFSET    10
-+#define    RTL8367C_CTRL_GPIO_10_MASK    0x400
-+#define    RTL8367C_CTRL_GPIO_9_OFFSET    9
-+#define    RTL8367C_CTRL_GPIO_9_MASK    0x200
-+#define    RTL8367C_CTRL_GPIO_8_OFFSET    8
-+#define    RTL8367C_CTRL_GPIO_8_MASK    0x100
-+#define    RTL8367C_CTRL_GPIO_7_OFFSET    7
-+#define    RTL8367C_CTRL_GPIO_7_MASK    0x80
-+#define    RTL8367C_CTRL_GPIO_6_OFFSET    6
-+#define    RTL8367C_CTRL_GPIO_6_MASK    0x40
-+#define    RTL8367C_CTRL_GPIO_5_OFFSET    5
-+#define    RTL8367C_CTRL_GPIO_5_MASK    0x20
-+#define    RTL8367C_CTRL_GPIO_4_OFFSET    4
-+#define    RTL8367C_CTRL_GPIO_4_MASK    0x10
-+#define    RTL8367C_CTRL_GPIO_3_OFFSET    3
-+#define    RTL8367C_CTRL_GPIO_3_MASK    0x8
-+#define    RTL8367C_CTRL_GPIO_2_OFFSET    2
-+#define    RTL8367C_CTRL_GPIO_2_MASK    0x4
-+#define    RTL8367C_CTRL_GPIO_1_OFFSET    1
-+#define    RTL8367C_CTRL_GPIO_1_MASK    0x2
-+#define    RTL8367C_CTRL_GPIO_0_OFFSET    0
-+#define    RTL8367C_CTRL_GPIO_0_MASK    0x1
-+
-+#define    RTL8367C_REG_SEL_GPIO    0x13c8
-+#define    RTL8367C_SEL_GPIO_13_OFFSET    13
-+#define    RTL8367C_SEL_GPIO_13_MASK    0x2000
-+#define    RTL8367C_SEL_GPIO_12_OFFSET    12
-+#define    RTL8367C_SEL_GPIO_12_MASK    0x1000
-+#define    RTL8367C_SEL_GPIO_11_OFFSET    11
-+#define    RTL8367C_SEL_GPIO_11_MASK    0x800
-+#define    RTL8367C_SEL_GPIO_10_OFFSET    10
-+#define    RTL8367C_SEL_GPIO_10_MASK    0x400
-+#define    RTL8367C_SEL_GPIO_9_OFFSET    9
-+#define    RTL8367C_SEL_GPIO_9_MASK    0x200
-+#define    RTL8367C_SEL_GPIO_8_OFFSET    8
-+#define    RTL8367C_SEL_GPIO_8_MASK    0x100
-+#define    RTL8367C_SEL_GPIO_7_OFFSET    7
-+#define    RTL8367C_SEL_GPIO_7_MASK    0x80
-+#define    RTL8367C_SEL_GPIO_6_OFFSET    6
-+#define    RTL8367C_SEL_GPIO_6_MASK    0x40
-+#define    RTL8367C_SEL_GPIO_5_OFFSET    5
-+#define    RTL8367C_SEL_GPIO_5_MASK    0x20
-+#define    RTL8367C_SEL_GPIO_4_OFFSET    4
-+#define    RTL8367C_SEL_GPIO_4_MASK    0x10
-+#define    RTL8367C_SEL_GPIO_3_OFFSET    3
-+#define    RTL8367C_SEL_GPIO_3_MASK    0x8
-+#define    RTL8367C_SEL_GPIO_2_OFFSET    2
-+#define    RTL8367C_SEL_GPIO_2_MASK    0x4
-+#define    RTL8367C_SEL_GPIO_1_OFFSET    1
-+#define    RTL8367C_SEL_GPIO_1_MASK    0x2
-+#define    RTL8367C_SEL_GPIO_0_OFFSET    0
-+#define    RTL8367C_SEL_GPIO_0_MASK    0x1
-+
-+#define    RTL8367C_REG_STATUS_GPIO    0x13c9
-+#define    RTL8367C_STATUS_GPIO_OFFSET    0
-+#define    RTL8367C_STATUS_GPIO_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_SYNC_ETH_CFG    0x13e0
-+#define    RTL8367C_DUMMY2_OFFSET    9
-+#define    RTL8367C_DUMMY2_MASK    0xFE00
-+#define    RTL8367C_RFC2819_TYPE_OFFSET    8
-+#define    RTL8367C_RFC2819_TYPE_MASK    0x100
-+#define    RTL8367C_DUMMY1_OFFSET    7
-+#define    RTL8367C_DUMMY1_MASK    0x80
-+#define    RTL8367C_FIBER_SYNCE125_L_SEL_OFFSET    6
-+#define    RTL8367C_FIBER_SYNCE125_L_SEL_MASK    0x40
-+#define    RTL8367C_SYNC_ETH_EN_RTT2_OFFSET    5
-+#define    RTL8367C_SYNC_ETH_EN_RTT2_MASK    0x20
-+#define    RTL8367C_SYNC_ETH_EN_RTT1_OFFSET    4
-+#define    RTL8367C_SYNC_ETH_EN_RTT1_MASK    0x10
-+#define    RTL8367C_SYNC_ETH_SEL_DPLL_OFFSET    3
-+#define    RTL8367C_SYNC_ETH_SEL_DPLL_MASK    0x8
-+#define    RTL8367C_SYNC_ETH_SEL_PHYREF_OFFSET    2
-+#define    RTL8367C_SYNC_ETH_SEL_PHYREF_MASK    0x4
-+#define    RTL8367C_SYNC_ETH_SEL_XTAL_OFFSET    1
-+#define    RTL8367C_SYNC_ETH_SEL_XTAL_MASK    0x2
-+#define    RTL8367C_DUMMY0_OFFSET    0
-+#define    RTL8367C_DUMMY0_MASK    0x1
-+
-+#define    RTL8367C_REG_LED_DRI_CFG    0x13e1
-+#define    RTL8367C_LED_DRI_CFG_DUMMY_OFFSET    1
-+#define    RTL8367C_LED_DRI_CFG_DUMMY_MASK    0xFFFE
-+#define    RTL8367C_LED_DRIVING_OFFSET    0
-+#define    RTL8367C_LED_DRIVING_MASK    0x1
-+
-+#define    RTL8367C_REG_CHIP_DEBUG2    0x13e2
-+#define    RTL8367C_RG2_DN_OFFSET    6
-+#define    RTL8367C_RG2_DN_MASK    0x1C0
-+#define    RTL8367C_RG2_DP_OFFSET    3
-+#define    RTL8367C_RG2_DP_MASK    0x38
-+#define    RTL8367C_DRI_EXT2_RG_OFFSET    2
-+#define    RTL8367C_DRI_EXT2_RG_MASK    0x4
-+#define    RTL8367C_DRI_EXT2_OFFSET    1
-+#define    RTL8367C_DRI_EXT2_MASK    0x2
-+#define    RTL8367C_SLR_EXT2_OFFSET    0
-+#define    RTL8367C_SLR_EXT2_MASK    0x1
-+
-+#define    RTL8367C_REG_DIGITAL_DEBUG_2    0x13e3
-+
-+#define    RTL8367C_REG_FIBER_RTL_OUI_CFG0    0x13e4
-+#define    RTL8367C_FIBER_RTL_OUI_CFG0_OFFSET    0
-+#define    RTL8367C_FIBER_RTL_OUI_CFG0_MASK    0xFF
-+
-+#define    RTL8367C_REG_FIBER_RTL_OUI_CFG1    0x13e5
-+
-+#define    RTL8367C_REG_FIBER_CFG_0    0x13e6
-+#define    RTL8367C_REV_NUM_OFFSET    8
-+#define    RTL8367C_REV_NUM_MASK    0xF00
-+#define    RTL8367C_MODEL_NUM_OFFSET    0
-+#define    RTL8367C_MODEL_NUM_MASK    0x3F
-+
-+#define    RTL8367C_REG_FIBER_CFG_1    0x13e7
-+#define    RTL8367C_SDS_FRC_REG4_OFFSET    12
-+#define    RTL8367C_SDS_FRC_REG4_MASK    0x1000
-+#define    RTL8367C_SDS_FRC_REG4_FIB100_OFFSET    11
-+#define    RTL8367C_SDS_FRC_REG4_FIB100_MASK    0x800
-+#define    RTL8367C_SEL_MASK_ONL_OFFSET    5
-+#define    RTL8367C_SEL_MASK_ONL_MASK    0x20
-+#define    RTL8367C_DIS_QUALITY_IN_MASK_OFFSET    4
-+#define    RTL8367C_DIS_QUALITY_IN_MASK_MASK    0x10
-+#define    RTL8367C_SDS_FRC_MODE_OFFSET    3
-+#define    RTL8367C_SDS_FRC_MODE_MASK    0x8
-+#define    RTL8367C_SDS_MODE_OFFSET    0
-+#define    RTL8367C_SDS_MODE_MASK    0x7
-+
-+#define    RTL8367C_REG_FIBER_CFG_2    0x13e8
-+#define    RTL8367C_SEL_SDET_PS_OFFSET    12
-+#define    RTL8367C_SEL_SDET_PS_MASK    0xF000
-+#define    RTL8367C_UTP_DIS_RX_OFFSET    10
-+#define    RTL8367C_UTP_DIS_RX_MASK    0xC00
-+#define    RTL8367C_UTP_FRC_LD_OFFSET    8
-+#define    RTL8367C_UTP_FRC_LD_MASK    0x300
-+#define    RTL8367C_SDS_RX_DISABLE_OFFSET    6
-+#define    RTL8367C_SDS_RX_DISABLE_MASK    0xC0
-+#define    RTL8367C_SDS_TX_DISABLE_OFFSET    4
-+#define    RTL8367C_SDS_TX_DISABLE_MASK    0x30
-+#define    RTL8367C_FIBER_CFG_2_SDS_PWR_ISO_OFFSET    2
-+#define    RTL8367C_FIBER_CFG_2_SDS_PWR_ISO_MASK    0xC
-+#define    RTL8367C_SDS_FRC_LD_OFFSET    0
-+#define    RTL8367C_SDS_FRC_LD_MASK    0x3
-+
-+#define    RTL8367C_REG_FIBER_CFG_3    0x13e9
-+#define    RTL8367C_FIBER_CFG_3_OFFSET    0
-+#define    RTL8367C_FIBER_CFG_3_MASK    0xFFF
-+
-+#define    RTL8367C_REG_FIBER_CFG_4    0x13ea
-+
-+#define    RTL8367C_REG_UTP_FIB_DET    0x13eb
-+#define    RTL8367C_FORCE_SEL_FIBER_OFFSET    14
-+#define    RTL8367C_FORCE_SEL_FIBER_MASK    0xC000
-+#define    RTL8367C_FIB_FINAL_TIMER_OFFSET    12
-+#define    RTL8367C_FIB_FINAL_TIMER_MASK    0x3000
-+#define    RTL8367C_FIB_LINK_TIMER_OFFSET    10
-+#define    RTL8367C_FIB_LINK_TIMER_MASK    0xC00
-+#define    RTL8367C_FIB_SDET_TIMER_OFFSET    8
-+#define    RTL8367C_FIB_SDET_TIMER_MASK    0x300
-+#define    RTL8367C_UTP_LINK_TIMER_OFFSET    6
-+#define    RTL8367C_UTP_LINK_TIMER_MASK    0xC0
-+#define    RTL8367C_UTP_SDET_TIMER_OFFSET    4
-+#define    RTL8367C_UTP_SDET_TIMER_MASK    0x30
-+#define    RTL8367C_FORCE_AUTODET_OFFSET    3
-+#define    RTL8367C_FORCE_AUTODET_MASK    0x8
-+#define    RTL8367C_AUTODET_FSM_CLR_OFFSET    2
-+#define    RTL8367C_AUTODET_FSM_CLR_MASK    0x4
-+#define    RTL8367C_UTP_FIRST_OFFSET    1
-+#define    RTL8367C_UTP_FIRST_MASK    0x2
-+#define    RTL8367C_UTP_FIB_DISAUTODET_OFFSET    0
-+#define    RTL8367C_UTP_FIB_DISAUTODET_MASK    0x1
-+
-+#define    RTL8367C_REG_NRESTORE_MAGIC_NUM    0x13ec
-+#define    RTL8367C_NRESTORE_MAGIC_NUM_MASK    0xFFFF
-+#define    RTL8367C_EEPROM_PROGRAM_CYCLE_OFFSET    0
-+#define    RTL8367C_EEPROM_PROGRAM_CYCLE_MASK    0x3
-+
-+#define    RTL8367C_REG_MAC_ACTIVE    0x13ee
-+#define    RTL8367C_MAC_ACTIVE_H_OFFSET    9
-+#define    RTL8367C_MAC_ACTIVE_H_MASK    0xE00
-+#define    RTL8367C_FORCE_MAC_ACTIVE_OFFSET    8
-+#define    RTL8367C_FORCE_MAC_ACTIVE_MASK    0x100
-+#define    RTL8367C_MAC_ACTIVE_OFFSET    0
-+#define    RTL8367C_MAC_ACTIVE_MASK    0xFF
-+
-+#define    RTL8367C_REG_SERDES_RESULT    0x13ef
-+#define    RTL8367C_FIB100_DET_1_OFFSET    12
-+#define    RTL8367C_FIB100_DET_1_MASK    0x1000
-+#define    RTL8367C_FIB_ISO_1_OFFSET    11
-+#define    RTL8367C_FIB_ISO_1_MASK    0x800
-+#define    RTL8367C_SDS_ANFAULT_1_OFFSET    10
-+#define    RTL8367C_SDS_ANFAULT_1_MASK    0x400
-+#define    RTL8367C_SDS_INTB_1_OFFSET    9
-+#define    RTL8367C_SDS_INTB_1_MASK    0x200
-+#define    RTL8367C_SDS_LINK_OK_1_OFFSET    8
-+#define    RTL8367C_SDS_LINK_OK_1_MASK    0x100
-+#define    RTL8367C_FIB100_DET_OFFSET    4
-+#define    RTL8367C_FIB100_DET_MASK    0x10
-+#define    RTL8367C_FIB_ISO_OFFSET    3
-+#define    RTL8367C_FIB_ISO_MASK    0x8
-+#define    RTL8367C_SDS_ANFAULT_OFFSET    2
-+#define    RTL8367C_SDS_ANFAULT_MASK    0x4
-+#define    RTL8367C_SDS_INTB_OFFSET    1
-+#define    RTL8367C_SDS_INTB_MASK    0x2
-+#define    RTL8367C_SDS_LINK_OK_OFFSET    0
-+#define    RTL8367C_SDS_LINK_OK_MASK    0x1
-+
-+#define    RTL8367C_REG_CHIP_ECO    0x13f0
-+#define    RTL8367C_CFG_CHIP_ECO_OFFSET    1
-+#define    RTL8367C_CFG_CHIP_ECO_MASK    0xFFFE
-+#define    RTL8367C_CFG_CKOUTEN_OFFSET    0
-+#define    RTL8367C_CFG_CKOUTEN_MASK    0x1
-+
-+#define    RTL8367C_REG_WAKELPI_SLOT_PRD    0x13f1
-+#define    RTL8367C_WAKELPI_SLOT_PRD_OFFSET    0
-+#define    RTL8367C_WAKELPI_SLOT_PRD_MASK    0x1F
-+
-+#define    RTL8367C_REG_WAKELPI_SLOT_PG0    0x13f2
-+#define    RTL8367C_WAKELPI_SLOT_P1_OFFSET    8
-+#define    RTL8367C_WAKELPI_SLOT_P1_MASK    0x1F00
-+#define    RTL8367C_WAKELPI_SLOT_P0_OFFSET    0
-+#define    RTL8367C_WAKELPI_SLOT_P0_MASK    0x1F
-+
-+#define    RTL8367C_REG_WAKELPI_SLOT_PG1    0x13f3
-+#define    RTL8367C_WAKELPI_SLOT_P3_OFFSET    8
-+#define    RTL8367C_WAKELPI_SLOT_P3_MASK    0x1F00
-+#define    RTL8367C_WAKELPI_SLOT_P2_OFFSET    0
-+#define    RTL8367C_WAKELPI_SLOT_P2_MASK    0x1F
-+
-+#define    RTL8367C_REG_WAKELPI_SLOT_PG2    0x13f4
-+#define    RTL8367C_WAKELPI_SLOT_P5_OFFSET    8
-+#define    RTL8367C_WAKELPI_SLOT_P5_MASK    0x1F00
-+#define    RTL8367C_WAKELPI_SLOT_P4_OFFSET    0
-+#define    RTL8367C_WAKELPI_SLOT_P4_MASK    0x1F
-+
-+#define    RTL8367C_REG_WAKELPI_SLOT_PG3    0x13f5
-+#define    RTL8367C_WAKELPI_SLOT_P7_OFFSET    8
-+#define    RTL8367C_WAKELPI_SLOT_P7_MASK    0x1F00
-+#define    RTL8367C_WAKELPI_SLOT_P6_OFFSET    0
-+#define    RTL8367C_WAKELPI_SLOT_P6_MASK    0x1F
-+
-+#define    RTL8367C_REG_SYNC_FIFO_0    0x13f6
-+#define    RTL8367C_SYNC_FIFO_TX_OFFSET    8
-+#define    RTL8367C_SYNC_FIFO_TX_MASK    0x700
-+#define    RTL8367C_SYNC_FIFO_RX_OFFSET    0
-+#define    RTL8367C_SYNC_FIFO_RX_MASK    0xFF
-+
-+#define    RTL8367C_REG_SYNC_FIFO_1    0x13f7
-+#define    RTL8367C_SYNC_FIFO_RX_ERR_P10_8_OFFSET    11
-+#define    RTL8367C_SYNC_FIFO_RX_ERR_P10_8_MASK    0x3800
-+#define    RTL8367C_SYNC_FIFO_TX_ERR_OFFSET    8
-+#define    RTL8367C_SYNC_FIFO_TX_ERR_MASK    0x700
-+#define    RTL8367C_SYNC_FIFO_RX_ERR_OFFSET    0
-+#define    RTL8367C_SYNC_FIFO_RX_ERR_MASK    0xFF
-+
-+#define    RTL8367C_REG_RGM_EEE    0x13f8
-+#define    RTL8367C_EXT2_PAD_STOP_EN_OFFSET    14
-+#define    RTL8367C_EXT2_PAD_STOP_EN_MASK    0x4000
-+#define    RTL8367C_EXT1_PAD_STOP_EN_OFFSET    13
-+#define    RTL8367C_EXT1_PAD_STOP_EN_MASK    0x2000
-+#define    RTL8367C_EXT0_PAD_STOP_EN_OFFSET    12
-+#define    RTL8367C_EXT0_PAD_STOP_EN_MASK    0x1000
-+#define    RTL8367C_EXT2_CYCLE_PAD_OFFSET    8
-+#define    RTL8367C_EXT2_CYCLE_PAD_MASK    0xF00
-+#define    RTL8367C_EXT1_CYCLE_PAD_OFFSET    4
-+#define    RTL8367C_EXT1_CYCLE_PAD_MASK    0xF0
-+#define    RTL8367C_EXT0_CYCLE_PAD_OFFSET    0
-+#define    RTL8367C_EXT0_CYCLE_PAD_MASK    0xF
-+
-+#define    RTL8367C_REG_EXT_TXC_DLY    0x13f9
-+#define    RTL8367C_EXT1_GMII_TX_DELAY_OFFSET    12
-+#define    RTL8367C_EXT1_GMII_TX_DELAY_MASK    0x7000
-+#define    RTL8367C_EXT0_GMII_TX_DELAY_OFFSET    9
-+#define    RTL8367C_EXT0_GMII_TX_DELAY_MASK    0xE00
-+#define    RTL8367C_EXT2_RGMII_TX_DELAY_OFFSET    6
-+#define    RTL8367C_EXT2_RGMII_TX_DELAY_MASK    0x1C0
-+#define    RTL8367C_EXT1_RGMII_TX_DELAY_OFFSET    3
-+#define    RTL8367C_EXT1_RGMII_TX_DELAY_MASK    0x38
-+#define    RTL8367C_EXT0_RGMII_TX_DELAY_OFFSET    0
-+#define    RTL8367C_EXT0_RGMII_TX_DELAY_MASK    0x7
-+
-+#define    RTL8367C_REG_IO_MISC_CTRL    0x13fa
-+#define    RTL8367C_IO_BUZZER_EN_OFFSET    3
-+#define    RTL8367C_IO_BUZZER_EN_MASK    0x8
-+#define    RTL8367C_IO_INTRPT_EN_OFFSET    2
-+#define    RTL8367C_IO_INTRPT_EN_MASK    0x4
-+#define    RTL8367C_IO_NRESTORE_EN_OFFSET    1
-+#define    RTL8367C_IO_NRESTORE_EN_MASK    0x2
-+#define    RTL8367C_IO_UART_EN_OFFSET    0
-+#define    RTL8367C_IO_UART_EN_MASK    0x1
-+
-+#define    RTL8367C_REG_CHIP_DUMMY_NO    0x13fb
-+#define    RTL8367C_CHIP_DUMMY_NO_OFFSET    0
-+#define    RTL8367C_CHIP_DUMMY_NO_MASK    0xF
-+
-+#define    RTL8367C_REG_RC_CALIB_CFG    0x13fc
-+#define    RTL8367C_TRIG_BURN_EFUSE_OFFSET    9
-+#define    RTL8367C_TRIG_BURN_EFUSE_MASK    0x200
-+#define    RTL8367C_AMP_CALIB_FAIL_OFFSET    8
-+#define    RTL8367C_AMP_CALIB_FAIL_MASK    0x100
-+#define    RTL8367C_R_CALIB_FAIL_OFFSET    7
-+#define    RTL8367C_R_CALIB_FAIL_MASK    0x80
-+#define    RTL8367C_CFG_CALIB_MODE_OFFSET    6
-+#define    RTL8367C_CFG_CALIB_MODE_MASK    0x40
-+#define    RTL8367C_CENTER_PORT_SEL_OFFSET    3
-+#define    RTL8367C_CENTER_PORT_SEL_MASK    0x38
-+#define    RTL8367C_CALIB_FINISH_OFFSET    2
-+#define    RTL8367C_CALIB_FINISH_MASK    0x4
-+#define    RTL8367C_CFG_CALIB_OPTION_OFFSET    1
-+#define    RTL8367C_CFG_CALIB_OPTION_MASK    0x2
-+#define    RTL8367C_CFG_CALIB_EN_OFFSET    0
-+#define    RTL8367C_CFG_CALIB_EN_MASK    0x1
-+
-+#define    RTL8367C_REG_WAKELPI_SLOT_PG4    0x13fd
-+#define    RTL8367C_WAKELPI_SLOT_P9_OFFSET    8
-+#define    RTL8367C_WAKELPI_SLOT_P9_MASK    0x1F00
-+#define    RTL8367C_WAKELPI_SLOT_P8_OFFSET    0
-+#define    RTL8367C_WAKELPI_SLOT_P8_MASK    0x1F
-+
-+#define    RTL8367C_REG_WAKELPI_SLOT_PG5    0x13fe
-+#define    RTL8367C_WAKELPI_SLOT_PG5_OFFSET    0
-+#define    RTL8367C_WAKELPI_SLOT_PG5_MASK    0x1F
-+
-+/* (16'h1400)mtrpool_reg */
-+
-+#define    RTL8367C_REG_METER0_RATE_CTRL0    0x1400
-+
-+#define    RTL8367C_REG_METER0_RATE_CTRL1    0x1401
-+#define    RTL8367C_METER0_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER0_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER1_RATE_CTRL0    0x1402
-+
-+#define    RTL8367C_REG_METER1_RATE_CTRL1    0x1403
-+#define    RTL8367C_METER1_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER1_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER2_RATE_CTRL0    0x1404
-+
-+#define    RTL8367C_REG_METER2_RATE_CTRL1    0x1405
-+#define    RTL8367C_METER2_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER2_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER3_RATE_CTRL0    0x1406
-+
-+#define    RTL8367C_REG_METER3_RATE_CTRL1    0x1407
-+#define    RTL8367C_METER3_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER3_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER4_RATE_CTRL0    0x1408
-+
-+#define    RTL8367C_REG_METER4_RATE_CTRL1    0x1409
-+#define    RTL8367C_METER4_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER4_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER5_RATE_CTRL0    0x140a
-+
-+#define    RTL8367C_REG_METER5_RATE_CTRL1    0x140b
-+#define    RTL8367C_METER5_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER5_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER6_RATE_CTRL0    0x140c
-+
-+#define    RTL8367C_REG_METER6_RATE_CTRL1    0x140d
-+#define    RTL8367C_METER6_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER6_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER7_RATE_CTRL0    0x140e
-+
-+#define    RTL8367C_REG_METER7_RATE_CTRL1    0x140f
-+#define    RTL8367C_METER7_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER7_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER8_RATE_CTRL0    0x1410
-+
-+#define    RTL8367C_REG_METER8_RATE_CTRL1    0x1411
-+#define    RTL8367C_METER8_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER8_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER9_RATE_CTRL0    0x1412
-+
-+#define    RTL8367C_REG_METER9_RATE_CTRL1    0x1413
-+#define    RTL8367C_METER9_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER9_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER10_RATE_CTRL0    0x1414
-+
-+#define    RTL8367C_REG_METER10_RATE_CTRL1    0x1415
-+#define    RTL8367C_METER10_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER10_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER11_RATE_CTRL0    0x1416
-+
-+#define    RTL8367C_REG_METER11_RATE_CTRL1    0x1417
-+#define    RTL8367C_METER11_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER11_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER12_RATE_CTRL0    0x1418
-+
-+#define    RTL8367C_REG_METER12_RATE_CTRL1    0x1419
-+#define    RTL8367C_METER12_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER12_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER13_RATE_CTRL0    0x141a
-+
-+#define    RTL8367C_REG_METER13_RATE_CTRL1    0x141b
-+#define    RTL8367C_METER13_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER13_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER14_RATE_CTRL0    0x141c
-+
-+#define    RTL8367C_REG_METER14_RATE_CTRL1    0x141d
-+#define    RTL8367C_METER14_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER14_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER15_RATE_CTRL0    0x141e
-+
-+#define    RTL8367C_REG_METER15_RATE_CTRL1    0x141f
-+#define    RTL8367C_METER15_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER15_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER16_RATE_CTRL0    0x1420
-+
-+#define    RTL8367C_REG_METER16_RATE_CTRL1    0x1421
-+#define    RTL8367C_METER16_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER16_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER17_RATE_CTRL0    0x1422
-+
-+#define    RTL8367C_REG_METER17_RATE_CTRL1    0x1423
-+#define    RTL8367C_METER17_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER17_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER18_RATE_CTRL0    0x1424
-+
-+#define    RTL8367C_REG_METER18_RATE_CTRL1    0x1425
-+#define    RTL8367C_METER18_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER18_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER19_RATE_CTRL0    0x1426
-+
-+#define    RTL8367C_REG_METER19_RATE_CTRL1    0x1427
-+#define    RTL8367C_METER19_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER19_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER20_RATE_CTRL0    0x1428
-+
-+#define    RTL8367C_REG_METER20_RATE_CTRL1    0x1429
-+#define    RTL8367C_METER20_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER20_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER21_RATE_CTRL0    0x142a
-+
-+#define    RTL8367C_REG_METER21_RATE_CTRL1    0x142b
-+#define    RTL8367C_METER21_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER21_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER22_RATE_CTRL0    0x142c
-+
-+#define    RTL8367C_REG_METER22_RATE_CTRL1    0x142d
-+#define    RTL8367C_METER22_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER22_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER23_RATE_CTRL0    0x142e
-+
-+#define    RTL8367C_REG_METER23_RATE_CTRL1    0x142f
-+#define    RTL8367C_METER23_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER23_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER24_RATE_CTRL0    0x1430
-+
-+#define    RTL8367C_REG_METER24_RATE_CTRL1    0x1431
-+#define    RTL8367C_METER24_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER24_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER25_RATE_CTRL0    0x1432
-+
-+#define    RTL8367C_REG_METER25_RATE_CTRL1    0x1433
-+#define    RTL8367C_METER25_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER25_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER26_RATE_CTRL0    0x1434
-+
-+#define    RTL8367C_REG_METER26_RATE_CTRL1    0x1435
-+#define    RTL8367C_METER26_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER26_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER27_RATE_CTRL0    0x1436
-+
-+#define    RTL8367C_REG_METER27_RATE_CTRL1    0x1437
-+#define    RTL8367C_METER27_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER27_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER28_RATE_CTRL0    0x1438
-+
-+#define    RTL8367C_REG_METER28_RATE_CTRL1    0x1439
-+#define    RTL8367C_METER28_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER28_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER29_RATE_CTRL0    0x143a
-+
-+#define    RTL8367C_REG_METER29_RATE_CTRL1    0x143b
-+#define    RTL8367C_METER29_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER29_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER30_RATE_CTRL0    0x143c
-+
-+#define    RTL8367C_REG_METER30_RATE_CTRL1    0x143d
-+#define    RTL8367C_METER30_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER30_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER31_RATE_CTRL0    0x143e
-+
-+#define    RTL8367C_REG_METER31_RATE_CTRL1    0x143f
-+#define    RTL8367C_METER31_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER31_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER_MODE_SETTING0    0x1440
-+
-+#define    RTL8367C_REG_METER_MODE_SETTING1    0x1441
-+
-+#define    RTL8367C_REG_METER_MODE_TOKEN_CFG    0x1442
-+#define    RTL8367C_METER_MODE_TOKEN_CFG_OFFSET    0
-+#define    RTL8367C_METER_MODE_TOKEN_CFG_MASK    0x7FF
-+
-+#define    RTL8367C_REG_METER0_BUCKET_SIZE    0x1600
-+
-+#define    RTL8367C_REG_METER1_BUCKET_SIZE    0x1601
-+
-+#define    RTL8367C_REG_METER2_BUCKET_SIZE    0x1602
-+
-+#define    RTL8367C_REG_METER3_BUCKET_SIZE    0x1603
-+
-+#define    RTL8367C_REG_METER4_BUCKET_SIZE    0x1604
-+
-+#define    RTL8367C_REG_METER5_BUCKET_SIZE    0x1605
-+
-+#define    RTL8367C_REG_METER6_BUCKET_SIZE    0x1606
-+
-+#define    RTL8367C_REG_METER7_BUCKET_SIZE    0x1607
-+
-+#define    RTL8367C_REG_METER8_BUCKET_SIZE    0x1608
-+
-+#define    RTL8367C_REG_METER9_BUCKET_SIZE    0x1609
-+
-+#define    RTL8367C_REG_METER10_BUCKET_SIZE    0x160a
-+
-+#define    RTL8367C_REG_METER11_BUCKET_SIZE    0x160b
-+
-+#define    RTL8367C_REG_METER12_BUCKET_SIZE    0x160c
-+
-+#define    RTL8367C_REG_METER13_BUCKET_SIZE    0x160d
-+
-+#define    RTL8367C_REG_METER14_BUCKET_SIZE    0x160e
-+
-+#define    RTL8367C_REG_METER15_BUCKET_SIZE    0x160f
-+
-+#define    RTL8367C_REG_METER16_BUCKET_SIZE    0x1610
-+
-+#define    RTL8367C_REG_METER17_BUCKET_SIZE    0x1611
-+
-+#define    RTL8367C_REG_METER18_BUCKET_SIZE    0x1612
-+
-+#define    RTL8367C_REG_METER19_BUCKET_SIZE    0x1613
-+
-+#define    RTL8367C_REG_METER20_BUCKET_SIZE    0x1614
-+
-+#define    RTL8367C_REG_METER21_BUCKET_SIZE    0x1615
-+
-+#define    RTL8367C_REG_METER22_BUCKET_SIZE    0x1616
-+
-+#define    RTL8367C_REG_METER23_BUCKET_SIZE    0x1617
-+
-+#define    RTL8367C_REG_METER24_BUCKET_SIZE    0x1618
-+
-+#define    RTL8367C_REG_METER25_BUCKET_SIZE    0x1619
-+
-+#define    RTL8367C_REG_METER26_BUCKET_SIZE    0x161a
-+
-+#define    RTL8367C_REG_METER27_BUCKET_SIZE    0x161b
-+
-+#define    RTL8367C_REG_METER28_BUCKET_SIZE    0x161c
-+
-+#define    RTL8367C_REG_METER29_BUCKET_SIZE    0x161d
-+
-+#define    RTL8367C_REG_METER30_BUCKET_SIZE    0x161e
-+
-+#define    RTL8367C_REG_METER31_BUCKET_SIZE    0x161f
-+
-+#define    RTL8367C_REG_METER_CTRL0    0x1700
-+#define    RTL8367C_METER_OP_OFFSET    8
-+#define    RTL8367C_METER_OP_MASK    0x100
-+#define    RTL8367C_METER_TICK_OFFSET    0
-+#define    RTL8367C_METER_TICK_MASK    0xFF
-+
-+#define    RTL8367C_REG_METER_CTRL1    0x1701
-+#define    RTL8367C_METER_CTRL1_OFFSET    0
-+#define    RTL8367C_METER_CTRL1_MASK    0xFF
-+
-+#define    RTL8367C_REG_METER_OVERRATE_INDICATOR0    0x1702
-+
-+#define    RTL8367C_REG_METER_OVERRATE_INDICATOR1    0x1703
-+
-+#define    RTL8367C_REG_METER_OVERRATE_INDICATOR0_8051    0x1704
-+
-+#define    RTL8367C_REG_METER_OVERRATE_INDICATOR1_8051    0x1705
-+
-+#define    RTL8367C_REG_METER_IFG_CTRL0    0x1712
-+#define    RTL8367C_METER15_IFG_OFFSET    15
-+#define    RTL8367C_METER15_IFG_MASK    0x8000
-+#define    RTL8367C_METER14_IFG_OFFSET    14
-+#define    RTL8367C_METER14_IFG_MASK    0x4000
-+#define    RTL8367C_METER13_IFG_OFFSET    13
-+#define    RTL8367C_METER13_IFG_MASK    0x2000
-+#define    RTL8367C_METER12_IFG_OFFSET    12
-+#define    RTL8367C_METER12_IFG_MASK    0x1000
-+#define    RTL8367C_METER11_IFG_OFFSET    11
-+#define    RTL8367C_METER11_IFG_MASK    0x800
-+#define    RTL8367C_METER10_IFG_OFFSET    10
-+#define    RTL8367C_METER10_IFG_MASK    0x400
-+#define    RTL8367C_METER9_IFG_OFFSET    9
-+#define    RTL8367C_METER9_IFG_MASK    0x200
-+#define    RTL8367C_METER8_IFG_OFFSET    8
-+#define    RTL8367C_METER8_IFG_MASK    0x100
-+#define    RTL8367C_METER7_IFG_OFFSET    7
-+#define    RTL8367C_METER7_IFG_MASK    0x80
-+#define    RTL8367C_METER6_IFG_OFFSET    6
-+#define    RTL8367C_METER6_IFG_MASK    0x40
-+#define    RTL8367C_METER5_IFG_OFFSET    5
-+#define    RTL8367C_METER5_IFG_MASK    0x20
-+#define    RTL8367C_METER4_IFG_OFFSET    4
-+#define    RTL8367C_METER4_IFG_MASK    0x10
-+#define    RTL8367C_METER3_IFG_OFFSET    3
-+#define    RTL8367C_METER3_IFG_MASK    0x8
-+#define    RTL8367C_METER2_IFG_OFFSET    2
-+#define    RTL8367C_METER2_IFG_MASK    0x4
-+#define    RTL8367C_METER1_IFG_OFFSET    1
-+#define    RTL8367C_METER1_IFG_MASK    0x2
-+#define    RTL8367C_METER0_IFG_OFFSET    0
-+#define    RTL8367C_METER0_IFG_MASK    0x1
-+
-+#define    RTL8367C_REG_METER_IFG_CTRL1    0x1713
-+#define    RTL8367C_METER31_IFG_OFFSET    15
-+#define    RTL8367C_METER31_IFG_MASK    0x8000
-+#define    RTL8367C_METER30_IFG_OFFSET    14
-+#define    RTL8367C_METER30_IFG_MASK    0x4000
-+#define    RTL8367C_METER29_IFG_OFFSET    13
-+#define    RTL8367C_METER29_IFG_MASK    0x2000
-+#define    RTL8367C_METER28_IFG_OFFSET    12
-+#define    RTL8367C_METER28_IFG_MASK    0x1000
-+#define    RTL8367C_METER27_IFG_OFFSET    11
-+#define    RTL8367C_METER27_IFG_MASK    0x800
-+#define    RTL8367C_METER26_IFG_OFFSET    10
-+#define    RTL8367C_METER26_IFG_MASK    0x400
-+#define    RTL8367C_METER25_IFG_OFFSET    9
-+#define    RTL8367C_METER25_IFG_MASK    0x200
-+#define    RTL8367C_METER24_IFG_OFFSET    8
-+#define    RTL8367C_METER24_IFG_MASK    0x100
-+#define    RTL8367C_METER23_IFG_OFFSET    7
-+#define    RTL8367C_METER23_IFG_MASK    0x80
-+#define    RTL8367C_METER22_IFG_OFFSET    6
-+#define    RTL8367C_METER22_IFG_MASK    0x40
-+#define    RTL8367C_METER21_IFG_OFFSET    5
-+#define    RTL8367C_METER21_IFG_MASK    0x20
-+#define    RTL8367C_METER20_IFG_OFFSET    4
-+#define    RTL8367C_METER20_IFG_MASK    0x10
-+#define    RTL8367C_METER19_IFG_OFFSET    3
-+#define    RTL8367C_METER19_IFG_MASK    0x8
-+#define    RTL8367C_METER18_IFG_OFFSET    2
-+#define    RTL8367C_METER18_IFG_MASK    0x4
-+#define    RTL8367C_METER17_IFG_OFFSET    1
-+#define    RTL8367C_METER17_IFG_MASK    0x2
-+#define    RTL8367C_METER16_IFG_OFFSET    0
-+#define    RTL8367C_METER16_IFG_MASK    0x1
-+
-+#define    RTL8367C_REG_METER_CTRL2    0x1722
-+#define    RTL8367C_cfg_mtr_tick_8g_OFFSET    8
-+#define    RTL8367C_cfg_mtr_tick_8g_MASK    0xFF00
-+#define    RTL8367C_cfg_mtr_dec_cnt_8g_OFFSET    0
-+#define    RTL8367C_cfg_mtr_dec_cnt_8g_MASK    0xFF
-+
-+#define    RTL8367C_REG_DUMMY_1723    0x1723
-+
-+#define    RTL8367C_REG_DUMMY_1724    0x1724
-+
-+#define    RTL8367C_REG_DUMMY_1725    0x1725
-+
-+#define    RTL8367C_REG_DUMMY_1726    0x1726
-+
-+#define    RTL8367C_REG_DUMMY_1727    0x1727
-+
-+#define    RTL8367C_REG_DUMMY_1728    0x1728
-+
-+#define    RTL8367C_REG_DUMMY_1729    0x1729
-+
-+#define    RTL8367C_REG_DUMMY_172A    0x172a
-+
-+#define    RTL8367C_REG_DUMMY_172B    0x172b
-+
-+#define    RTL8367C_REG_DUMMY_172C    0x172c
-+
-+#define    RTL8367C_REG_DUMMY_172D    0x172d
-+
-+#define    RTL8367C_REG_DUMMY_172E    0x172e
-+
-+#define    RTL8367C_REG_DUMMY_172F    0x172f
-+
-+#define    RTL8367C_REG_DUMMY_1730    0x1730
-+
-+#define    RTL8367C_REG_DUMMY_1731    0x1731
-+
-+#define    RTL8367C_REG_METER32_RATE_CTRL0    0x1740
-+
-+#define    RTL8367C_REG_METER32_RATE_CTRL1    0x1741
-+#define    RTL8367C_METER32_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER32_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER33_RATE_CTRL0    0x1742
-+
-+#define    RTL8367C_REG_METER33_RATE_CTRL1    0x1743
-+#define    RTL8367C_METER33_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER33_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER34_RATE_CTRL0    0x1744
-+
-+#define    RTL8367C_REG_METER34_RATE_CTRL1    0x1745
-+#define    RTL8367C_METER34_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER34_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER35_RATE_CTRL0    0x1746
-+
-+#define    RTL8367C_REG_METER35_RATE_CTRL1    0x1747
-+#define    RTL8367C_METER35_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER35_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER36_RATE_CTRL0    0x1748
-+
-+#define    RTL8367C_REG_METER36_RATE_CTRL1    0x1749
-+#define    RTL8367C_METER36_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER36_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER37_RATE_CTRL0    0x174a
-+
-+#define    RTL8367C_REG_METER37_RATE_CTRL1    0x174b
-+#define    RTL8367C_METER37_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER37_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER38_RATE_CTRL0    0x174c
-+
-+#define    RTL8367C_REG_METER38_RATE_CTRL1    0x174d
-+#define    RTL8367C_METER38_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER38_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER39_RATE_CTRL0    0x174e
-+
-+#define    RTL8367C_REG_METER39_RATE_CTRL1    0x174f
-+#define    RTL8367C_METER39_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER39_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER40_RATE_CTRL0    0x1750
-+
-+#define    RTL8367C_REG_METER40_RATE_CTRL1    0x1751
-+#define    RTL8367C_METER40_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER40_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER41_RATE_CTRL0    0x1752
-+
-+#define    RTL8367C_REG_METER41_RATE_CTRL1    0x1753
-+#define    RTL8367C_METER41_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER41_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER42_RATE_CTRL0    0x1754
-+
-+#define    RTL8367C_REG_METER42_RATE_CTRL1    0x1755
-+#define    RTL8367C_METER42_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER42_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER43_RATE_CTRL0    0x1756
-+
-+#define    RTL8367C_REG_METER43_RATE_CTRL1    0x1757
-+#define    RTL8367C_METER43_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER43_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER44_RATE_CTRL0    0x1758
-+
-+#define    RTL8367C_REG_METER44_RATE_CTRL1    0x1759
-+#define    RTL8367C_METER44_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER44_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER45_RATE_CTRL0    0x175a
-+
-+#define    RTL8367C_REG_METER45_RATE_CTRL1    0x175b
-+#define    RTL8367C_METER45_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER45_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER46_RATE_CTRL0    0x175c
-+
-+#define    RTL8367C_REG_METER46_RATE_CTRL1    0x175d
-+#define    RTL8367C_METER46_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER46_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER47_RATE_CTRL0    0x175e
-+
-+#define    RTL8367C_REG_METER47_RATE_CTRL1    0x175f
-+#define    RTL8367C_METER47_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER47_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER48_RATE_CTRL0    0x1760
-+
-+#define    RTL8367C_REG_METER48_RATE_CTRL1    0x1761
-+#define    RTL8367C_METER48_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER48_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER49_RATE_CTRL0    0x1762
-+
-+#define    RTL8367C_REG_METER49_RATE_CTRL1    0x1763
-+#define    RTL8367C_METER49_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER49_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER50_RATE_CTRL0    0x1764
-+
-+#define    RTL8367C_REG_METER50_RATE_CTRL1    0x1765
-+#define    RTL8367C_METER50_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER50_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER51_RATE_CTRL0    0x1766
-+
-+#define    RTL8367C_REG_METER51_RATE_CTRL1    0x1767
-+#define    RTL8367C_METER51_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER51_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER52_RATE_CTRL0    0x1768
-+
-+#define    RTL8367C_REG_METER52_RATE_CTRL1    0x1769
-+#define    RTL8367C_METER52_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER52_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER53_RATE_CTRL0    0x176a
-+
-+#define    RTL8367C_REG_METER53_RATE_CTRL1    0x176b
-+#define    RTL8367C_METER53_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER53_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER54_RATE_CTRL0    0x176c
-+
-+#define    RTL8367C_REG_METER54_RATE_CTRL1    0x176d
-+#define    RTL8367C_METER54_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER54_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER55_RATE_CTRL0    0x176e
-+
-+#define    RTL8367C_REG_METER55_RATE_CTRL1    0x176f
-+#define    RTL8367C_METER55_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER55_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER56_RATE_CTRL0    0x1770
-+
-+#define    RTL8367C_REG_METER56_RATE_CTRL1    0x1771
-+#define    RTL8367C_METER56_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER56_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER57_RATE_CTRL0    0x1772
-+
-+#define    RTL8367C_REG_METER57_RATE_CTRL1    0x1773
-+#define    RTL8367C_METER57_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER57_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER58_RATE_CTRL0    0x1774
-+
-+#define    RTL8367C_REG_METER58_RATE_CTRL1    0x1775
-+#define    RTL8367C_METER58_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER58_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER59_RATE_CTRL0    0x1776
-+
-+#define    RTL8367C_REG_METER59_RATE_CTRL1    0x1777
-+#define    RTL8367C_METER59_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER59_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER60_RATE_CTRL0    0x1778
-+
-+#define    RTL8367C_REG_METER60_RATE_CTRL1    0x1779
-+#define    RTL8367C_METER60_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER60_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER61_RATE_CTRL0    0x177a
-+
-+#define    RTL8367C_REG_METER61_RATE_CTRL1    0x177b
-+#define    RTL8367C_METER61_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER61_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER62_RATE_CTRL0    0x177c
-+
-+#define    RTL8367C_REG_METER62_RATE_CTRL1    0x177d
-+#define    RTL8367C_METER62_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER62_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER63_RATE_CTRL0    0x177e
-+
-+#define    RTL8367C_REG_METER63_RATE_CTRL1    0x177f
-+#define    RTL8367C_METER63_RATE_CTRL1_OFFSET    0
-+#define    RTL8367C_METER63_RATE_CTRL1_MASK    0x7
-+
-+#define    RTL8367C_REG_METER_MODE_SETTING2    0x1780
-+
-+#define    RTL8367C_REG_METER_MODE_SETTING3    0x1781
-+
-+#define    RTL8367C_REG_METER32_BUCKET_SIZE    0x1790
-+
-+#define    RTL8367C_REG_METER33_BUCKET_SIZE    0x1791
-+
-+#define    RTL8367C_REG_METER34_BUCKET_SIZE    0x1792
-+
-+#define    RTL8367C_REG_METER35_BUCKET_SIZE    0x1793
-+
-+#define    RTL8367C_REG_METER36_BUCKET_SIZE    0x1794
-+
-+#define    RTL8367C_REG_METER37_BUCKET_SIZE    0x1795
-+
-+#define    RTL8367C_REG_METER38_BUCKET_SIZE    0x1796
-+
-+#define    RTL8367C_REG_METER39_BUCKET_SIZE    0x1797
-+
-+#define    RTL8367C_REG_METER40_BUCKET_SIZE    0x1798
-+
-+#define    RTL8367C_REG_METER41_BUCKET_SIZE    0x1799
-+
-+#define    RTL8367C_REG_METER42_BUCKET_SIZE    0x179a
-+
-+#define    RTL8367C_REG_METER43_BUCKET_SIZE    0x179b
-+
-+#define    RTL8367C_REG_METER44_BUCKET_SIZE    0x179c
-+
-+#define    RTL8367C_REG_METER45_BUCKET_SIZE    0x179d
-+
-+#define    RTL8367C_REG_METER46_BUCKET_SIZE    0x179e
-+
-+#define    RTL8367C_REG_METER47_BUCKET_SIZE    0x179f
-+
-+#define    RTL8367C_REG_METER48_BUCKET_SIZE    0x17a0
-+
-+#define    RTL8367C_REG_METER49_BUCKET_SIZE    0x17a1
-+
-+#define    RTL8367C_REG_METER50_BUCKET_SIZE    0x17a2
-+
-+#define    RTL8367C_REG_METER51_BUCKET_SIZE    0x17a3
-+
-+#define    RTL8367C_REG_METER52_BUCKET_SIZE    0x17a4
-+
-+#define    RTL8367C_REG_METER53_BUCKET_SIZE    0x17a5
-+
-+#define    RTL8367C_REG_METER54_BUCKET_SIZE    0x17a6
-+
-+#define    RTL8367C_REG_METER55_BUCKET_SIZE    0x17a7
-+
-+#define    RTL8367C_REG_METER56_BUCKET_SIZE    0x17a8
-+
-+#define    RTL8367C_REG_METER57_BUCKET_SIZE    0x17a9
-+
-+#define    RTL8367C_REG_METER58_BUCKET_SIZE    0x17aa
-+
-+#define    RTL8367C_REG_METER59_BUCKET_SIZE    0x17ab
-+
-+#define    RTL8367C_REG_METER60_BUCKET_SIZE    0x17ac
-+
-+#define    RTL8367C_REG_METER61_BUCKET_SIZE    0x17ad
-+
-+#define    RTL8367C_REG_METER62_BUCKET_SIZE    0x17ae
-+
-+#define    RTL8367C_REG_METER63_BUCKET_SIZE    0x17af
-+
-+#define    RTL8367C_REG_METER_OVERRATE_INDICATOR2    0x17b0
-+
-+#define    RTL8367C_REG_METER_OVERRATE_INDICATOR3    0x17b1
-+
-+#define    RTL8367C_REG_METER_OVERRATE_INDICATOR2_8051    0x17b2
-+
-+#define    RTL8367C_REG_METER_OVERRATE_INDICATOR3_8051    0x17b3
-+
-+#define    RTL8367C_REG_METER_IFG_CTRL2    0x17b4
-+#define    RTL8367C_METER47_IFG_OFFSET    15
-+#define    RTL8367C_METER47_IFG_MASK    0x8000
-+#define    RTL8367C_METER46_IFG_OFFSET    14
-+#define    RTL8367C_METER46_IFG_MASK    0x4000
-+#define    RTL8367C_METER45_IFG_OFFSET    13
-+#define    RTL8367C_METER45_IFG_MASK    0x2000
-+#define    RTL8367C_METER44_IFG_OFFSET    12
-+#define    RTL8367C_METER44_IFG_MASK    0x1000
-+#define    RTL8367C_METER43_IFG_OFFSET    11
-+#define    RTL8367C_METER43_IFG_MASK    0x800
-+#define    RTL8367C_METER42_IFG_OFFSET    10
-+#define    RTL8367C_METER42_IFG_MASK    0x400
-+#define    RTL8367C_METER41_IFG_OFFSET    9
-+#define    RTL8367C_METER41_IFG_MASK    0x200
-+#define    RTL8367C_METER40_IFG_OFFSET    8
-+#define    RTL8367C_METER40_IFG_MASK    0x100
-+#define    RTL8367C_METER39_IFG_OFFSET    7
-+#define    RTL8367C_METER39_IFG_MASK    0x80
-+#define    RTL8367C_METER38_IFG_OFFSET    6
-+#define    RTL8367C_METER38_IFG_MASK    0x40
-+#define    RTL8367C_METER37_IFG_OFFSET    5
-+#define    RTL8367C_METER37_IFG_MASK    0x20
-+#define    RTL8367C_METER36_IFG_OFFSET    4
-+#define    RTL8367C_METER36_IFG_MASK    0x10
-+#define    RTL8367C_METER35_IFG_OFFSET    3
-+#define    RTL8367C_METER35_IFG_MASK    0x8
-+#define    RTL8367C_METER34_IFG_OFFSET    2
-+#define    RTL8367C_METER34_IFG_MASK    0x4
-+#define    RTL8367C_METER33_IFG_OFFSET    1
-+#define    RTL8367C_METER33_IFG_MASK    0x2
-+#define    RTL8367C_METER32_IFG_OFFSET    0
-+#define    RTL8367C_METER32_IFG_MASK    0x1
-+
-+#define    RTL8367C_REG_METER_IFG_CTRL3    0x17b5
-+#define    RTL8367C_METER63_IFG_OFFSET    15
-+#define    RTL8367C_METER63_IFG_MASK    0x8000
-+#define    RTL8367C_METER62_IFG_OFFSET    14
-+#define    RTL8367C_METER62_IFG_MASK    0x4000
-+#define    RTL8367C_METER61_IFG_OFFSET    13
-+#define    RTL8367C_METER61_IFG_MASK    0x2000
-+#define    RTL8367C_METER60_IFG_OFFSET    12
-+#define    RTL8367C_METER60_IFG_MASK    0x1000
-+#define    RTL8367C_METER59_IFG_OFFSET    11
-+#define    RTL8367C_METER59_IFG_MASK    0x800
-+#define    RTL8367C_METER58_IFG_OFFSET    10
-+#define    RTL8367C_METER58_IFG_MASK    0x400
-+#define    RTL8367C_METER57_IFG_OFFSET    9
-+#define    RTL8367C_METER57_IFG_MASK    0x200
-+#define    RTL8367C_METER56_IFG_OFFSET    8
-+#define    RTL8367C_METER56_IFG_MASK    0x100
-+#define    RTL8367C_METER55_IFG_OFFSET    7
-+#define    RTL8367C_METER55_IFG_MASK    0x80
-+#define    RTL8367C_METER54_IFG_OFFSET    6
-+#define    RTL8367C_METER54_IFG_MASK    0x40
-+#define    RTL8367C_METER53_IFG_OFFSET    5
-+#define    RTL8367C_METER53_IFG_MASK    0x20
-+#define    RTL8367C_METER52_IFG_OFFSET    4
-+#define    RTL8367C_METER52_IFG_MASK    0x10
-+#define    RTL8367C_METER51_IFG_OFFSET    3
-+#define    RTL8367C_METER51_IFG_MASK    0x8
-+#define    RTL8367C_METER50_IFG_OFFSET    2
-+#define    RTL8367C_METER50_IFG_MASK    0x4
-+#define    RTL8367C_METER49_IFG_OFFSET    1
-+#define    RTL8367C_METER49_IFG_MASK    0x2
-+#define    RTL8367C_METER48_IFG_OFFSET    0
-+#define    RTL8367C_METER48_IFG_MASK    0x1
-+
-+#define    RTL8367C_REG_METER_MISC    0x17b6
-+#define    RTL8367C_METER_MISC_OFFSET    0
-+#define    RTL8367C_METER_MISC_MASK    0x1
-+
-+/* (16'h1800)8051_RLDP_EEE_reg */
-+
-+#define    RTL8367C_REG_EEELLDP_CTRL0    0x1820
-+#define    RTL8367C_EEELLDP_SUBTYPE_OFFSET    6
-+#define    RTL8367C_EEELLDP_SUBTYPE_MASK    0x3FC0
-+#define    RTL8367C_EEELLDP_TRAP_8051_OFFSET    2
-+#define    RTL8367C_EEELLDP_TRAP_8051_MASK    0x4
-+#define    RTL8367C_EEELLDP_TRAP_CPU_OFFSET    1
-+#define    RTL8367C_EEELLDP_TRAP_CPU_MASK    0x2
-+#define    RTL8367C_EEELLDP_ENABLE_OFFSET    0
-+#define    RTL8367C_EEELLDP_ENABLE_MASK    0x1
-+
-+#define    RTL8367C_REG_EEELLDP_PMSK    0x1822
-+#define    RTL8367C_EEELLDP_PMSK_OFFSET    0
-+#define    RTL8367C_EEELLDP_PMSK_MASK    0x7FF
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P00_08    0x1843
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P00_07    0x1844
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P00_06    0x1845
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P00_05    0x1846
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P00_04    0x1847
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P00_03    0x1848
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P00_02    0x1849
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P00_01    0x184a
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P00_00    0x184b
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P01_08    0x184c
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P01_07    0x184d
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P01_06    0x184e
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P01_05    0x184f
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P01_04    0x1850
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P01_03    0x1851
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P01_02    0x1852
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P01_01    0x1853
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P01_00    0x1854
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P02_08    0x1855
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P02_07    0x1856
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P02_06    0x1857
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P02_05    0x1858
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P02_04    0x1859
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P02_03    0x185a
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P02_02    0x185b
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P02_01    0x185c
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P02_00    0x185d
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P03_08    0x185e
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P03_07    0x185f
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P03_06    0x1860
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P03_05    0x1861
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P03_04    0x1862
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P03_03    0x1863
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P03_02    0x1864
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P03_01    0x1865
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P03_00    0x1866
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P04_08    0x1867
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P04_07    0x1868
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P04_06    0x1869
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P04_05    0x186a
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P04_04    0x186b
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P04_03    0x186c
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P04_02    0x186d
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P04_01    0x186e
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P04_00    0x186f
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P05_08    0x1870
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P05_07    0x1871
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P05_06    0x1872
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P05_05    0x1873
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P05_04    0x1874
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P05_03    0x1875
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P05_02    0x1876
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P05_01    0x1877
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P05_00    0x1878
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P06_08    0x1879
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P06_07    0x187a
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P06_06    0x187b
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P06_05    0x187c
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P06_04    0x187d
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P06_03    0x187e
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P06_02    0x187f
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P06_01    0x1880
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P06_00    0x1881
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P07_08    0x1882
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P07_07    0x1883
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P07_06    0x1884
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P07_05    0x1885
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P07_04    0x1886
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P07_03    0x1887
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P07_02    0x1888
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P07_01    0x1889
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P07_00    0x188a
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P08_08    0x188b
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P08_07    0x188c
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P08_06    0x188d
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P08_05    0x188e
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P08_04    0x188f
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P08_03    0x1890
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P08_02    0x1891
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P08_01    0x1892
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P08_00    0x1893
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P09_08    0x1894
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P09_07    0x1895
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P09_06    0x1896
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P09_05    0x1897
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P09_04    0x1898
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P09_03    0x1899
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P09_02    0x189a
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P09_01    0x189b
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P09_00    0x189c
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P10_08    0x189d
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P10_07    0x189e
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P10_06    0x189f
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P10_05    0x18a0
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P10_04    0x18a1
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P10_03    0x18a2
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P10_02    0x18a3
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P10_01    0x18a4
-+
-+#define    RTL8367C_REG_EEELLDP_RX_VALUE_P10_00    0x18a5
-+
-+#define    RTL8367C_REG_RLDP_CTRL0    0x18e0
-+#define    RTL8367C_RLDP_TRIGGER_MODE_OFFSET    14
-+#define    RTL8367C_RLDP_TRIGGER_MODE_MASK    0x4000
-+#define    RTL8367C_RLDP_8051_LOOP_PORTMSK_OFFSET    6
-+#define    RTL8367C_RLDP_8051_LOOP_PORTMSK_MASK    0x3FC0
-+#define    RTL8367C_RLPP_8051_TRAP_OFFSET    5
-+#define    RTL8367C_RLPP_8051_TRAP_MASK    0x20
-+#define    RTL8367C_RLDP_INDICATOR_SOURCE_OFFSET    4
-+#define    RTL8367C_RLDP_INDICATOR_SOURCE_MASK    0x10
-+#define    RTL8367C_RLDP_GEN_RANDOM_OFFSET    3
-+#define    RTL8367C_RLDP_GEN_RANDOM_MASK    0x8
-+#define    RTL8367C_RLDP_COMP_ID_OFFSET    2
-+#define    RTL8367C_RLDP_COMP_ID_MASK    0x4
-+#define    RTL8367C_RLDP_8051_ENABLE_OFFSET    1
-+#define    RTL8367C_RLDP_8051_ENABLE_MASK    0x2
-+#define    RTL8367C_RLDP_ENABLE_OFFSET    0
-+#define    RTL8367C_RLDP_ENABLE_MASK    0x1
-+
-+#define    RTL8367C_REG_RLDP_CTRL1    0x18e1
-+#define    RTL8367C_RLDP_RETRY_COUNT_LOOPSTATE_OFFSET    8
-+#define    RTL8367C_RLDP_RETRY_COUNT_LOOPSTATE_MASK    0xFF00
-+#define    RTL8367C_RLDP_RETRY_COUNT_CHKSTATE_OFFSET    0
-+#define    RTL8367C_RLDP_RETRY_COUNT_CHKSTATE_MASK    0xFF
-+
-+#define    RTL8367C_REG_RLDP_CTRL2    0x18e2
-+
-+#define    RTL8367C_REG_RLDP_CTRL3    0x18e3
-+
-+#define    RTL8367C_REG_RLDP_CTRL4    0x18e4
-+#define    RTL8367C_RLDP_CTRL4_OFFSET    0
-+#define    RTL8367C_RLDP_CTRL4_MASK    0x7FF
-+
-+#define    RTL8367C_REG_RLDP_RAND_NUM0    0x18e5
-+
-+#define    RTL8367C_REG_RLDP_RAND_NUM1    0x18e6
-+
-+#define    RTL8367C_REG_RLDP_RAND_NUM2    0x18e7
-+
-+#define    RTL8367C_REG_RLDP_MAGIC_NUM0    0x18e8
-+
-+#define    RTL8367C_REG_RLDP_MAGIC_NUM1    0x18e9
-+
-+#define    RTL8367C_REG_RLDP_MAGIC_NUM2    0x18ea
-+
-+#define    RTL8367C_REG_RLDP_LOOPED_INDICATOR    0x18eb
-+#define    RTL8367C_RLDP_LOOPED_INDICATOR_OFFSET    0
-+#define    RTL8367C_RLDP_LOOPED_INDICATOR_MASK    0x7FF
-+
-+#define    RTL8367C_REG_RLDP_LOOP_PORT_REG0    0x18ec
-+#define    RTL8367C_RLDP_LOOP_PORT_01_OFFSET    8
-+#define    RTL8367C_RLDP_LOOP_PORT_01_MASK    0xF00
-+#define    RTL8367C_RLDP_LOOP_PORT_00_OFFSET    0
-+#define    RTL8367C_RLDP_LOOP_PORT_00_MASK    0xF
-+
-+#define    RTL8367C_REG_RLDP_LOOP_PORT_REG1    0x18ed
-+#define    RTL8367C_RLDP_LOOP_PORT_03_OFFSET    8
-+#define    RTL8367C_RLDP_LOOP_PORT_03_MASK    0xF00
-+#define    RTL8367C_RLDP_LOOP_PORT_02_OFFSET    0
-+#define    RTL8367C_RLDP_LOOP_PORT_02_MASK    0xF
-+
-+#define    RTL8367C_REG_RLDP_LOOP_PORT_REG2    0x18ee
-+#define    RTL8367C_RLDP_LOOP_PORT_05_OFFSET    8
-+#define    RTL8367C_RLDP_LOOP_PORT_05_MASK    0xF00
-+#define    RTL8367C_RLDP_LOOP_PORT_04_OFFSET    0
-+#define    RTL8367C_RLDP_LOOP_PORT_04_MASK    0xF
-+
-+#define    RTL8367C_REG_RLDP_LOOP_PORT_REG3    0x18ef
-+#define    RTL8367C_RLDP_LOOP_PORT_07_OFFSET    8
-+#define    RTL8367C_RLDP_LOOP_PORT_07_MASK    0xF00
-+#define    RTL8367C_RLDP_LOOP_PORT_06_OFFSET    0
-+#define    RTL8367C_RLDP_LOOP_PORT_06_MASK    0xF
-+
-+#define    RTL8367C_REG_RLDP_RELEASED_INDICATOR    0x18f0
-+#define    RTL8367C_RLDP_RELEASED_INDICATOR_OFFSET    0
-+#define    RTL8367C_RLDP_RELEASED_INDICATOR_MASK    0x7FF
-+
-+#define    RTL8367C_REG_RLDP_LOOPSTATUS_INDICATOR    0x18f1
-+#define    RTL8367C_RLDP_LOOPSTATUS_INDICATOR_OFFSET    0
-+#define    RTL8367C_RLDP_LOOPSTATUS_INDICATOR_MASK    0x7FF
-+
-+#define    RTL8367C_REG_RLDP_LOOP_PORT_REG4    0x18f2
-+#define    RTL8367C_RLDP_LOOP_PORT_9_OFFSET    8
-+#define    RTL8367C_RLDP_LOOP_PORT_9_MASK    0xF00
-+#define    RTL8367C_RLDP_LOOP_PORT_8_OFFSET    0
-+#define    RTL8367C_RLDP_LOOP_PORT_8_MASK    0xF
-+
-+#define    RTL8367C_REG_RLDP_LOOP_PORT_REG5    0x18f3
-+#define    RTL8367C_RLDP_LOOP_PORT_REG5_OFFSET    0
-+#define    RTL8367C_RLDP_LOOP_PORT_REG5_MASK    0xF
-+
-+#define    RTL8367C_REG_RLDP_CTRL5    0x18f4
-+#define    RTL8367C_RLDP_CTRL5_OFFSET    0
-+#define    RTL8367C_RLDP_CTRL5_MASK    0x7
-+
-+/* (16'h1900)EEE_EEEP_reg */
-+
-+#define    RTL8367C_REG_EEE_500M_CTRL0    0x1900
-+#define    RTL8367C_EEE_500M_CTRL0_OFFSET    0
-+#define    RTL8367C_EEE_500M_CTRL0_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEE_RXIDLE_GIGA_CTRL    0x1901
-+#define    RTL8367C_EEE_RXIDLE_GIGA_EN_OFFSET    8
-+#define    RTL8367C_EEE_RXIDLE_GIGA_EN_MASK    0x100
-+#define    RTL8367C_EEE_RXIDLE_GIGA_OFFSET    0
-+#define    RTL8367C_EEE_RXIDLE_GIGA_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEE_RXIDLE_500M_CTRL    0x1902
-+#define    RTL8367C_EEE_RXIDLE_500M_EN_OFFSET    8
-+#define    RTL8367C_EEE_RXIDLE_500M_EN_MASK    0x100
-+#define    RTL8367C_EEE_RXIDLE_500M_OFFSET    0
-+#define    RTL8367C_EEE_RXIDLE_500M_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEE_DECISION_GIGA_500M    0x1903
-+#define    RTL8367C_EEE_DECISION_GIGA_OFFSET    8
-+#define    RTL8367C_EEE_DECISION_GIGA_MASK    0xFF00
-+#define    RTL8367C_EEE_DECISION_500M_OFFSET    0
-+#define    RTL8367C_EEE_DECISION_500M_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEE_DECISION_100M    0x1904
-+#define    RTL8367C_EEE_DECISION_100M_OFFSET    0
-+#define    RTL8367C_EEE_DECISION_100M_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_DEFER_TXLPI    0x1905
-+#define    RTL8367C_EEEP_DEFER_TXLPI_OFFSET    0
-+#define    RTL8367C_EEEP_DEFER_TXLPI_MASK    0x1
-+
-+#define    RTL8367C_REG_EEEP_EN    0x1906
-+#define    RTL8367C_EEEP_SLAVE_EN_OFFSET    3
-+#define    RTL8367C_EEEP_SLAVE_EN_MASK    0x8
-+#define    RTL8367C_EEEP_100M_OFFSET    2
-+#define    RTL8367C_EEEP_100M_MASK    0x4
-+#define    RTL8367C_EEEP_500M_OFFSET    1
-+#define    RTL8367C_EEEP_500M_MASK    0x2
-+#define    RTL8367C_EEEP_GIGA_OFFSET    0
-+#define    RTL8367C_EEEP_GIGA_MASK    0x1
-+
-+#define    RTL8367C_REG_EEEP_TI_GIGA_500M    0x1907
-+#define    RTL8367C_EEEP_TI_GIGA_OFFSET    8
-+#define    RTL8367C_EEEP_TI_GIGA_MASK    0xFF00
-+#define    RTL8367C_EEEP_TI_500M_OFFSET    0
-+#define    RTL8367C_EEEP_TI_500M_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_TI_100M    0x1908
-+#define    RTL8367C_EEEP_TI_100M_OFFSET    0
-+#define    RTL8367C_EEEP_TI_100M_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_CTRL2    0x1909
-+#define    RTL8367C_EEEP_CTRL2_OFFSET    0
-+#define    RTL8367C_EEEP_CTRL2_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_RX_RATE_500M    0x190b
-+
-+#define    RTL8367C_REG_EEEP_RW_GIGA_SLV    0x190c
-+#define    RTL8367C_EEEP_RW_GIGA_SLV_OFFSET    0
-+#define    RTL8367C_EEEP_RW_GIGA_SLV_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_TMR_GIGA    0x190d
-+#define    RTL8367C_RX_IDLE_EEEP_GIGA_OFFSET    8
-+#define    RTL8367C_RX_IDLE_EEEP_GIGA_MASK    0xFF00
-+#define    RTL8367C_RX_MIN_SLP_TMR_GIGA_OFFSET    0
-+#define    RTL8367C_RX_MIN_SLP_TMR_GIGA_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_TMR_500M    0x190e
-+#define    RTL8367C_RX_IDLE_EEEP_500M_OFFSET    8
-+#define    RTL8367C_RX_IDLE_EEEP_500M_MASK    0xFF00
-+#define    RTL8367C_RX_MIN_SLP_TMR_500M_OFFSET    0
-+#define    RTL8367C_RX_MIN_SLP_TMR_500M_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_TMR_100M    0x190f
-+#define    RTL8367C_RX_IDLE_EEEP_100M_OFFSET    8
-+#define    RTL8367C_RX_IDLE_EEEP_100M_MASK    0xFF00
-+#define    RTL8367C_RX_MIN_SLP_TMR_100M_OFFSET    0
-+#define    RTL8367C_RX_MIN_SLP_TMR_100M_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_RW_500M_MST_SLV    0x1910
-+#define    RTL8367C_EEEP_RW_500M_MST_OFFSET    8
-+#define    RTL8367C_EEEP_RW_500M_MST_MASK    0xFF00
-+#define    RTL8367C_EEEP_RW_500M_SLV_OFFSET    0
-+#define    RTL8367C_EEEP_RW_500M_SLV_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_500M_CTRL0    0x1911
-+#define    RTL8367C_EEEP_500M_CTRL0_OFFSET    0
-+#define    RTL8367C_EEEP_500M_CTRL0_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_500M_CTRL1    0x1912
-+#define    RTL8367C_EEEP_TW_500M_OFFSET    8
-+#define    RTL8367C_EEEP_TW_500M_MASK    0xFF00
-+#define    RTL8367C_EEEP_TP_500M_OFFSET    0
-+#define    RTL8367C_EEEP_TP_500M_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEEP_500M_CTRL2    0x1913
-+#define    RTL8367C_EEEP_TXEN_500M_OFFSET    12
-+#define    RTL8367C_EEEP_TXEN_500M_MASK    0x1000
-+#define    RTL8367C_EEEP_TU_500M_OFFSET    8
-+#define    RTL8367C_EEEP_TU_500M_MASK    0x300
-+#define    RTL8367C_EEEP_TS_500M_OFFSET    0
-+#define    RTL8367C_EEEP_TS_500M_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEE_NEW_CTRL0    0x1914
-+#define    RTL8367C_LINK_UP_DELAY_OFFSET    3
-+#define    RTL8367C_LINK_UP_DELAY_MASK    0x18
-+#define    RTL8367C_EEE_TXLPI_ORI_OFFSET    2
-+#define    RTL8367C_EEE_TXLPI_ORI_MASK    0x4
-+#define    RTL8367C_REALTX_SEL_OFFSET    1
-+#define    RTL8367C_REALTX_SEL_MASK    0x2
-+#define    RTL8367C_EN_FC_EFCT_OFFSET    0
-+#define    RTL8367C_EN_FC_EFCT_MASK    0x1
-+
-+#define    RTL8367C_REG_EEE_LONGIDLE_100M    0x1915
-+#define    RTL8367C_EEE_LONGIDLE_100M_OFFSET    0
-+#define    RTL8367C_EEE_LONGIDLE_100M_MASK    0x3FF
-+
-+#define    RTL8367C_REG_EEE_LONGIDLE_500M    0x1916
-+#define    RTL8367C_EEE_LONGIDLE_500M_OFFSET    0
-+#define    RTL8367C_EEE_LONGIDLE_500M_MASK    0x3FF
-+
-+#define    RTL8367C_REG_EEE_LONGIDLE_GIGA    0x1917
-+#define    RTL8367C_EEE_LONGIDLE_GIGA_OFFSET    0
-+#define    RTL8367C_EEE_LONGIDLE_GIGA_MASK    0x3FF
-+
-+#define    RTL8367C_REG_EEE_MINIPG_100M    0x1918
-+
-+#define    RTL8367C_REG_EEE_MINIPG_500M    0x1919
-+
-+#define    RTL8367C_REG_EEE_MINIPG_GIGA    0x191A
-+
-+#define    RTL8367C_REG_EEE_LONGIDLE_CTRL0    0x191B
-+#define    RTL8367C_TX_IDLEN_REQ_100M_OFFSET    10
-+#define    RTL8367C_TX_IDLEN_REQ_100M_MASK    0x400
-+#define    RTL8367C_TX_IDLEN_REQ_500M_OFFSET    9
-+#define    RTL8367C_TX_IDLEN_REQ_500M_MASK    0x200
-+#define    RTL8367C_TX_IDLEN_REQ_GIGA_OFFSET    8
-+#define    RTL8367C_TX_IDLEN_REQ_GIGA_MASK    0x100
-+#define    RTL8367C_EEE_LONGIDLE_CTRL0_TX_LPI_MINIPG_100M_OFFSET    0
-+#define    RTL8367C_EEE_LONGIDLE_CTRL0_TX_LPI_MINIPG_100M_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEE_LONGIDLE_CTRL1    0x191C
-+#define    RTL8367C_EEE_LONGIDLE_CTRL1_TX_LPI_MINIPG_GELITE_OFFSET    8
-+#define    RTL8367C_EEE_LONGIDLE_CTRL1_TX_LPI_MINIPG_GELITE_MASK    0xFF00
-+#define    RTL8367C_EEE_LONGIDLE_CTRL1_TX_LPI_MINIPG_GIGA_OFFSET    0
-+#define    RTL8367C_EEE_LONGIDLE_CTRL1_TX_LPI_MINIPG_GIGA_MASK    0xFF
-+
-+#define    RTL8367C_REG_EEE_TD_CTRL_H    0x191d
-+#define    RTL8367C_REF_RXLPI_OFFSET    8
-+#define    RTL8367C_REF_RXLPI_MASK    0x100
-+#define    RTL8367C_LOW_Q_TX_DELAY_GE_500M_H_OFFSET    4
-+#define    RTL8367C_LOW_Q_TX_DELAY_GE_500M_H_MASK    0xF0
-+#define    RTL8367C_LOW_Q_TX_DELAY_FE_H_OFFSET    0
-+#define    RTL8367C_LOW_Q_TX_DELAY_FE_H_MASK    0xF
-+
-+/* (16'h1a00)nic_reg */
-+
-+#define    RTL8367C_REG_NIC_RXRDRL    0x1a04
-+#define    RTL8367C_NIC_RXRDRL_OFFSET    0
-+#define    RTL8367C_NIC_RXRDRL_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_RXRDRH    0x1a05
-+#define    RTL8367C_NIC_RXRDRH_OFFSET    0
-+#define    RTL8367C_NIC_RXRDRH_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_TXASRL    0x1a08
-+#define    RTL8367C_NIC_TXASRL_OFFSET    0
-+#define    RTL8367C_NIC_TXASRL_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_TXASRH    0x1a09
-+#define    RTL8367C_NIC_TXASRH_OFFSET    0
-+#define    RTL8367C_NIC_TXASRH_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_RXCMDR    0x1a0c
-+#define    RTL8367C_NIC_RXCMDR_OFFSET    0
-+#define    RTL8367C_NIC_RXCMDR_MASK    0x1
-+
-+#define    RTL8367C_REG_NIC_TXCMDR    0x1a0d
-+#define    RTL8367C_NIC_TXCMDR_OFFSET    0
-+#define    RTL8367C_NIC_TXCMDR_MASK    0x1
-+
-+#define    RTL8367C_REG_NIC_IMS    0x1a0e
-+#define    RTL8367C_NIC_RXIS_OFFSET    7
-+#define    RTL8367C_NIC_RXIS_MASK    0x80
-+#define    RTL8367C_NIC_TXIS_OFFSET    6
-+#define    RTL8367C_NIC_TXIS_MASK    0x40
-+#define    RTL8367C_NIC_TXES_OFFSET    5
-+#define    RTL8367C_NIC_TXES_MASK    0x20
-+#define    RTL8367C_NIC_IMS_DMY_OFFSET    4
-+#define    RTL8367C_NIC_IMS_DMY_MASK    0x10
-+#define    RTL8367C_NIC_RXBUS_OFFSET    3
-+#define    RTL8367C_NIC_RXBUS_MASK    0x8
-+#define    RTL8367C_NIC_TXBOS_OFFSET    2
-+#define    RTL8367C_NIC_TXBOS_MASK    0x4
-+#define    RTL8367C_NIC_RXMIS_OFFSET    1
-+#define    RTL8367C_NIC_RXMIS_MASK    0x2
-+#define    RTL8367C_NIC_TXNLS_OFFSET    0
-+#define    RTL8367C_NIC_TXNLS_MASK    0x1
-+
-+#define    RTL8367C_REG_NIC_IMR    0x1a0f
-+#define    RTL8367C_NIC_RXIE_OFFSET    7
-+#define    RTL8367C_NIC_RXIE_MASK    0x80
-+#define    RTL8367C_NIC_TXIE_OFFSET    6
-+#define    RTL8367C_NIC_TXIE_MASK    0x40
-+#define    RTL8367C_NIC_TXEE_OFFSET    5
-+#define    RTL8367C_NIC_TXEE_MASK    0x20
-+#define    RTL8367C_NIC_IMR_DMY_OFFSET    4
-+#define    RTL8367C_NIC_IMR_DMY_MASK    0x10
-+#define    RTL8367C_NIC_RXBUE_OFFSET    3
-+#define    RTL8367C_NIC_RXBUE_MASK    0x8
-+#define    RTL8367C_NIC_TXBOE_OFFSET    2
-+#define    RTL8367C_NIC_TXBOE_MASK    0x4
-+#define    RTL8367C_NIC_RXMIE_OFFSET    1
-+#define    RTL8367C_NIC_RXMIE_MASK    0x2
-+#define    RTL8367C_NIC_TXNLE_OFFSET    0
-+#define    RTL8367C_NIC_TXNLE_MASK    0x1
-+
-+#define    RTL8367C_REG_NIC_RXCR0    0x1a14
-+#define    RTL8367C_NIC_HFPPE_OFFSET    7
-+#define    RTL8367C_NIC_HFPPE_MASK    0x80
-+#define    RTL8367C_NIC_HFMPE_OFFSET    6
-+#define    RTL8367C_NIC_HFMPE_MASK    0x40
-+#define    RTL8367C_NIC_RXBPE_OFFSET    5
-+#define    RTL8367C_NIC_RXBPE_MASK    0x20
-+#define    RTL8367C_NIC_RXMPE_OFFSET    4
-+#define    RTL8367C_NIC_RXMPE_MASK    0x10
-+#define    RTL8367C_NIC_RXPPS_OFFSET    2
-+#define    RTL8367C_NIC_RXPPS_MASK    0xC
-+#define    RTL8367C_NIC_RXAPE_OFFSET    1
-+#define    RTL8367C_NIC_RXAPE_MASK    0x2
-+#define    RTL8367C_NIC_ARPPE_OFFSET    0
-+#define    RTL8367C_NIC_ARPPE_MASK    0x1
-+
-+#define    RTL8367C_REG_NIC_RXCR1    0x1a15
-+#define    RTL8367C_NIC_RL4CEPE_OFFSET    4
-+#define    RTL8367C_NIC_RL4CEPE_MASK    0x10
-+#define    RTL8367C_NIC_RL3CEPE_OFFSET    3
-+#define    RTL8367C_NIC_RL3CEPE_MASK    0x8
-+#define    RTL8367C_NIC_RCRCEPE_OFFSET    2
-+#define    RTL8367C_NIC_RCRCEPE_MASK    0x4
-+#define    RTL8367C_NIC_RMCRC_OFFSET    1
-+#define    RTL8367C_NIC_RMCRC_MASK    0x2
-+#define    RTL8367C_NIC_RXENABLE_OFFSET    0
-+#define    RTL8367C_NIC_RXENABLE_MASK    0x1
-+
-+#define    RTL8367C_REG_NIC_TXCR    0x1a16
-+#define    RTL8367C_NIC_LBE_OFFSET    2
-+#define    RTL8367C_NIC_LBE_MASK    0x4
-+#define    RTL8367C_NIC_TXMFM_OFFSET    1
-+#define    RTL8367C_NIC_TXMFM_MASK    0x2
-+#define    RTL8367C_NIC_TXENABLE_OFFSET    0
-+#define    RTL8367C_NIC_TXENABLE_MASK    0x1
-+
-+#define    RTL8367C_REG_NIC_GCR    0x1a17
-+#define    RTL8367C_DUMMY_7_6_OFFSET    6
-+#define    RTL8367C_DUMMY_7_6_MASK    0xC0
-+#define    RTL8367C_NIC_RXMTU_OFFSET    4
-+#define    RTL8367C_NIC_RXMTU_MASK    0x30
-+#define    RTL8367C_NIC_GCR_DUMMY_0_OFFSET    0
-+#define    RTL8367C_NIC_GCR_DUMMY_0_MASK    0x1
-+
-+#define    RTL8367C_REG_NIC_MHR0    0x1a24
-+#define    RTL8367C_NIC_MHR0_OFFSET    0
-+#define    RTL8367C_NIC_MHR0_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_MHR1    0x1a25
-+#define    RTL8367C_NIC_MHR1_OFFSET    0
-+#define    RTL8367C_NIC_MHR1_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_MHR2    0x1a26
-+#define    RTL8367C_NIC_MHR2_OFFSET    0
-+#define    RTL8367C_NIC_MHR2_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_MHR3    0x1a27
-+#define    RTL8367C_NIC_MHR3_OFFSET    0
-+#define    RTL8367C_NIC_MHR3_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_MHR4    0x1a28
-+#define    RTL8367C_NIC_MHR4_OFFSET    0
-+#define    RTL8367C_NIC_MHR4_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_MHR5    0x1a29
-+#define    RTL8367C_NIC_MHR5_OFFSET    0
-+#define    RTL8367C_NIC_MHR5_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_MHR6    0x1a2a
-+#define    RTL8367C_NIC_MHR6_OFFSET    0
-+#define    RTL8367C_NIC_MHR6_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_MHR7    0x1a2b
-+#define    RTL8367C_NIC_MHR7_OFFSET    0
-+#define    RTL8367C_NIC_MHR7_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_PAHR0    0x1a2c
-+#define    RTL8367C_NIC_PAHR0_OFFSET    0
-+#define    RTL8367C_NIC_PAHR0_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_PAHR1    0x1a2d
-+#define    RTL8367C_NIC_PAHR1_OFFSET    0
-+#define    RTL8367C_NIC_PAHR1_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_PAHR2    0x1a2e
-+#define    RTL8367C_NIC_PAHR2_OFFSET    0
-+#define    RTL8367C_NIC_PAHR2_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_PAHR3    0x1a2f
-+#define    RTL8367C_NIC_PAHR3_OFFSET    0
-+#define    RTL8367C_NIC_PAHR3_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_PAHR4    0x1a30
-+#define    RTL8367C_NIC_PAHR4_OFFSET    0
-+#define    RTL8367C_NIC_PAHR4_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_PAHR5    0x1a31
-+#define    RTL8367C_NIC_PAHR5_OFFSET    0
-+#define    RTL8367C_NIC_PAHR5_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_PAHR6    0x1a32
-+#define    RTL8367C_NIC_PAHR6_OFFSET    0
-+#define    RTL8367C_NIC_PAHR6_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_PAHR7    0x1a33
-+#define    RTL8367C_NIC_PAHR7_OFFSET    0
-+#define    RTL8367C_NIC_PAHR7_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_TXSTOPRL    0x1a44
-+#define    RTL8367C_NIC_TXSTOPRL_OFFSET    0
-+#define    RTL8367C_NIC_TXSTOPRL_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_TXSTOPRH    0x1a45
-+#define    RTL8367C_NIC_TXSTOPRH_OFFSET    0
-+#define    RTL8367C_NIC_TXSTOPRH_MASK    0x3
-+
-+#define    RTL8367C_REG_NIC_RXSTOPRL    0x1a46
-+#define    RTL8367C_NIC_RXSTOPRL_OFFSET    0
-+#define    RTL8367C_NIC_RXSTOPRL_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_RXSTOPRH    0x1a47
-+#define    RTL8367C_NIC_RXSTOPRH_OFFSET    0
-+#define    RTL8367C_NIC_RXSTOPRH_MASK    0x3
-+
-+#define    RTL8367C_REG_NIC_RXFSTR    0x1a48
-+#define    RTL8367C_NIC_RXFSTR_OFFSET    0
-+#define    RTL8367C_NIC_RXFSTR_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_RXMBTRL    0x1a4c
-+#define    RTL8367C_NIC_RXMBTRL_OFFSET    0
-+#define    RTL8367C_NIC_RXMBTRL_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_RXMBTRH    0x1a4d
-+#define    RTL8367C_NIC_RXMBTRH_OFFSET    0
-+#define    RTL8367C_NIC_RXMBTRH_MASK    0x7F
-+
-+#define    RTL8367C_REG_NIC_RXMPTR    0x1a4e
-+#define    RTL8367C_NIC_RXMPTR_OFFSET    0
-+#define    RTL8367C_NIC_RXMPTR_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_T0TR    0x1a4f
-+#define    RTL8367C_NIC_T0TR_OFFSET    0
-+#define    RTL8367C_NIC_T0TR_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_CRXCPRL    0x1a50
-+#define    RTL8367C_NIC_CRXCPRL_OFFSET    0
-+#define    RTL8367C_NIC_CRXCPRL_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_CRXCPRH    0x1a51
-+#define    RTL8367C_NIC_CRXCPRH_OFFSET    0
-+#define    RTL8367C_NIC_CRXCPRH_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_CTXCPRL    0x1a52
-+#define    RTL8367C_NIC_CTXCPRL_OFFSET    0
-+#define    RTL8367C_NIC_CTXCPRL_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_CTXPCRH    0x1a53
-+#define    RTL8367C_NIC_CTXPCRH_OFFSET    0
-+#define    RTL8367C_NIC_CTXPCRH_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_SRXCURPKTRL    0x1a54
-+#define    RTL8367C_NIC_SRXCURPKTRL_OFFSET    0
-+#define    RTL8367C_NIC_SRXCURPKTRL_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_SRXCURPKTRH    0x1a55
-+#define    RTL8367C_NIC_SRXCURPKTRH_OFFSET    0
-+#define    RTL8367C_NIC_SRXCURPKTRH_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_STXCURPKTRL    0x1a56
-+#define    RTL8367C_NIC_STXCURPKTRL_OFFSET    0
-+#define    RTL8367C_NIC_STXCURPKTRL_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_STXCURPKTRH    0x1a57
-+#define    RTL8367C_NIC_STXCURPKTRH_OFFSET    0
-+#define    RTL8367C_NIC_STXCURPKTRH_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_STXPKTLENRL    0x1a58
-+#define    RTL8367C_NIC_STXPKTLENRL_OFFSET    0
-+#define    RTL8367C_NIC_STXPKTLENRL_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_STXPKTLENRH    0x1a59
-+#define    RTL8367C_NIC_STXPKTLENRH_OFFSET    0
-+#define    RTL8367C_NIC_STXPKTLENRH_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_STXCURUNITRL    0x1a5a
-+#define    RTL8367C_NIC_STXCURUNITRL_OFFSET    0
-+#define    RTL8367C_NIC_STXCURUNITRL_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_STXCURUNITRH    0x1a5b
-+#define    RTL8367C_NIC_STXCURUNITRH_OFFSET    0
-+#define    RTL8367C_NIC_STXCURUNITRH_MASK    0xFF
-+
-+#define    RTL8367C_REG_NIC_DROP_MODE    0x1a5c
-+#define    RTL8367C_NIC_RXDV_MODE_OFFSET    1
-+#define    RTL8367C_NIC_RXDV_MODE_MASK    0x2
-+#define    RTL8367C_NIC_DROP_MODE_OFFSET    0
-+#define    RTL8367C_NIC_DROP_MODE_MASK    0x1
-+
-+/* (16'h1b00)LED */
-+
-+#define    RTL8367C_REG_LED_SYS_CONFIG    0x1b00
-+#define    RTL8367C_LED_SYS_CONFIG_DUMMY_15_OFFSET    15
-+#define    RTL8367C_LED_SYS_CONFIG_DUMMY_15_MASK    0x8000
-+#define    RTL8367C_LED_SERIAL_OUT_MODE_OFFSET    14
-+#define    RTL8367C_LED_SERIAL_OUT_MODE_MASK    0x4000
-+#define    RTL8367C_LED_EEE_LPI_MODE_OFFSET    13
-+#define    RTL8367C_LED_EEE_LPI_MODE_MASK    0x2000
-+#define    RTL8367C_LED_EEE_LPI_EN_OFFSET    12
-+#define    RTL8367C_LED_EEE_LPI_EN_MASK    0x1000
-+#define    RTL8367C_LED_EEE_LPI_10_OFFSET    11
-+#define    RTL8367C_LED_EEE_LPI_10_MASK    0x800
-+#define    RTL8367C_LED_EEE_CAP_10_OFFSET    10
-+#define    RTL8367C_LED_EEE_CAP_10_MASK    0x400
-+#define    RTL8367C_LED_LPI_SEL_OFFSET    8
-+#define    RTL8367C_LED_LPI_SEL_MASK    0x300
-+#define    RTL8367C_SERI_LED_ACT_LOW_OFFSET    7
-+#define    RTL8367C_SERI_LED_ACT_LOW_MASK    0x80
-+#define    RTL8367C_LED_POWERON_2_OFFSET    6
-+#define    RTL8367C_LED_POWERON_2_MASK    0x40
-+#define    RTL8367C_LED_POWERON_1_OFFSET    5
-+#define    RTL8367C_LED_POWERON_1_MASK    0x20
-+#define    RTL8367C_LED_POWERON_0_OFFSET    4
-+#define    RTL8367C_LED_POWERON_0_MASK    0x10
-+#define    RTL8367C_LED_IO_DISABLE_OFFSET    3
-+#define    RTL8367C_LED_IO_DISABLE_MASK    0x8
-+#define    RTL8367C_DUMMY_2_2_OFFSET    2
-+#define    RTL8367C_DUMMY_2_2_MASK    0x4
-+#define    RTL8367C_LED_SELECT_OFFSET    0
-+#define    RTL8367C_LED_SELECT_MASK    0x3
-+
-+#define    RTL8367C_REG_LED_SYS_CONFIG2    0x1b01
-+#define    RTL8367C_LED_SYS_CONFIG2_DUMMY_OFFSET    2
-+#define    RTL8367C_LED_SYS_CONFIG2_DUMMY_MASK    0xFFFC
-+#define    RTL8367C_GATE_LPTD_BYPASS_OFFSET    1
-+#define    RTL8367C_GATE_LPTD_BYPASS_MASK    0x2
-+#define    RTL8367C_LED_SPD_MODE_OFFSET    0
-+#define    RTL8367C_LED_SPD_MODE_MASK    0x1
-+
-+#define    RTL8367C_REG_LED_MODE    0x1b02
-+#define    RTL8367C_DLINK_TIME_OFFSET    15
-+#define    RTL8367C_DLINK_TIME_MASK    0x8000
-+#define    RTL8367C_LED_BUZZ_DUTY_OFFSET    14
-+#define    RTL8367C_LED_BUZZ_DUTY_MASK    0x4000
-+#define    RTL8367C_BUZZER_RATE_OFFSET    12
-+#define    RTL8367C_BUZZER_RATE_MASK    0x3000
-+#define    RTL8367C_LOOP_DETECT_MODE_OFFSET    11
-+#define    RTL8367C_LOOP_DETECT_MODE_MASK    0x800
-+#define    RTL8367C_SEL_PWRON_TIME_OFFSET    9
-+#define    RTL8367C_SEL_PWRON_TIME_MASK    0x600
-+#define    RTL8367C_EN_DLINK_LED_OFFSET    8
-+#define    RTL8367C_EN_DLINK_LED_MASK    0x100
-+#define    RTL8367C_LOOP_DETECT_RATE_OFFSET    6
-+#define    RTL8367C_LOOP_DETECT_RATE_MASK    0xC0
-+#define    RTL8367C_FORCE_RATE_OFFSET    4
-+#define    RTL8367C_FORCE_RATE_MASK    0x30
-+#define    RTL8367C_SEL_LEDRATE_OFFSET    1
-+#define    RTL8367C_SEL_LEDRATE_MASK    0xE
-+#define    RTL8367C_SPEED_UP_OFFSET    0
-+#define    RTL8367C_SPEED_UP_MASK    0x1
-+
-+#define    RTL8367C_REG_LED_CONFIGURATION    0x1b03
-+#define    RTL8367C_LED_CONFIGURATION_DUMMY_OFFSET    15
-+#define    RTL8367C_LED_CONFIGURATION_DUMMY_MASK    0x8000
-+#define    RTL8367C_LED_CONFIG_SEL_OFFSET    14
-+#define    RTL8367C_LED_CONFIG_SEL_MASK    0x4000
-+#define    RTL8367C_DATA_LED_OFFSET    12
-+#define    RTL8367C_DATA_LED_MASK    0x3000
-+#define    RTL8367C_LED2_CFG_OFFSET    8
-+#define    RTL8367C_LED2_CFG_MASK    0xF00
-+#define    RTL8367C_LED1_CFG_OFFSET    4
-+#define    RTL8367C_LED1_CFG_MASK    0xF0
-+#define    RTL8367C_LED0_CFG_OFFSET    0
-+#define    RTL8367C_LED0_CFG_MASK    0xF
-+
-+#define    RTL8367C_REG_RTCT_RESULTS_CFG    0x1b04
-+#define    RTL8367C_RTCT_2PAIR_FTT_OFFSET    15
-+#define    RTL8367C_RTCT_2PAIR_FTT_MASK    0x8000
-+#define    RTL8367C_RTCT_2PAIR_MODE_OFFSET    14
-+#define    RTL8367C_RTCT_2PAIR_MODE_MASK    0x4000
-+#define    RTL8367C_BLINK_EN_OFFSET    13
-+#define    RTL8367C_BLINK_EN_MASK    0x2000
-+#define    RTL8367C_TIMEOUT_OFFSET    12
-+#define    RTL8367C_TIMEOUT_MASK    0x1000
-+#define    RTL8367C_EN_CD_SAME_SHORT_OFFSET    11
-+#define    RTL8367C_EN_CD_SAME_SHORT_MASK    0x800
-+#define    RTL8367C_EN_CD_SAME_OPEN_OFFSET    10
-+#define    RTL8367C_EN_CD_SAME_OPEN_MASK    0x400
-+#define    RTL8367C_EN_CD_SAME_LINEDRIVER_OFFSET    9
-+#define    RTL8367C_EN_CD_SAME_LINEDRIVER_MASK    0x200
-+#define    RTL8367C_EN_CD_SAME_MISMATCH_OFFSET    8
-+#define    RTL8367C_EN_CD_SAME_MISMATCH_MASK    0x100
-+#define    RTL8367C_EN_CD_SHORT_OFFSET    7
-+#define    RTL8367C_EN_CD_SHORT_MASK    0x80
-+#define    RTL8367C_EN_AB_SHORT_OFFSET    6
-+#define    RTL8367C_EN_AB_SHORT_MASK    0x40
-+#define    RTL8367C_EN_CD_OPEN_OFFSET    5
-+#define    RTL8367C_EN_CD_OPEN_MASK    0x20
-+#define    RTL8367C_EN_AB_OPEN_OFFSET    4
-+#define    RTL8367C_EN_AB_OPEN_MASK    0x10
-+#define    RTL8367C_EN_CD_MISMATCH_OFFSET    3
-+#define    RTL8367C_EN_CD_MISMATCH_MASK    0x8
-+#define    RTL8367C_EN_AB_MISMATCH_OFFSET    2
-+#define    RTL8367C_EN_AB_MISMATCH_MASK    0x4
-+#define    RTL8367C_EN_CD_LINEDRIVER_OFFSET    1
-+#define    RTL8367C_EN_CD_LINEDRIVER_MASK    0x2
-+#define    RTL8367C_EN_AB_LINEDRIVER_OFFSET    0
-+#define    RTL8367C_EN_AB_LINEDRIVER_MASK    0x1
-+
-+#define    RTL8367C_REG_RTCT_LED    0x1b05
-+#define    RTL8367C_DUMMY_1b05a_OFFSET    12
-+#define    RTL8367C_DUMMY_1b05a_MASK    0xF000
-+#define    RTL8367C_RTCT_LED2_OFFSET    8
-+#define    RTL8367C_RTCT_LED2_MASK    0xF00
-+#define    RTL8367C_RTCT_LED1_OFFSET    4
-+#define    RTL8367C_RTCT_LED1_MASK    0xF0
-+#define    RTL8367C_RTCT_LED0_OFFSET    0
-+#define    RTL8367C_RTCT_LED0_MASK    0xF
-+
-+#define    RTL8367C_REG_CPU_FORCE_LED_CFG    0x1b07
-+#define    RTL8367C_DUMMY_1b07a_OFFSET    8
-+#define    RTL8367C_DUMMY_1b07a_MASK    0xFF00
-+#define    RTL8367C_LED_FORCE_MODE_OFFSET    2
-+#define    RTL8367C_LED_FORCE_MODE_MASK    0xFC
-+#define    RTL8367C_FORCE_MODE_OFFSET    0
-+#define    RTL8367C_FORCE_MODE_MASK    0x3
-+
-+#define    RTL8367C_REG_CPU_FORCE_LED0_CFG0    0x1b08
-+#define    RTL8367C_PORT7_LED0_MODE_OFFSET    14
-+#define    RTL8367C_PORT7_LED0_MODE_MASK    0xC000
-+#define    RTL8367C_PORT6_LED0_MODE_OFFSET    12
-+#define    RTL8367C_PORT6_LED0_MODE_MASK    0x3000
-+#define    RTL8367C_PORT5_LED0_MODE_OFFSET    10
-+#define    RTL8367C_PORT5_LED0_MODE_MASK    0xC00
-+#define    RTL8367C_PORT4_LED0_MODE_OFFSET    8
-+#define    RTL8367C_PORT4_LED0_MODE_MASK    0x300
-+#define    RTL8367C_PORT3_LED0_MODE_OFFSET    6
-+#define    RTL8367C_PORT3_LED0_MODE_MASK    0xC0
-+#define    RTL8367C_PORT2_LED0_MODE_OFFSET    4
-+#define    RTL8367C_PORT2_LED0_MODE_MASK    0x30
-+#define    RTL8367C_PORT1_LED0_MODE_OFFSET    2
-+#define    RTL8367C_PORT1_LED0_MODE_MASK    0xC
-+#define    RTL8367C_PORT0_LED0_MODE_OFFSET    0
-+#define    RTL8367C_PORT0_LED0_MODE_MASK    0x3
-+
-+#define    RTL8367C_REG_CPU_FORCE_LED0_CFG1    0x1b09
-+#define    RTL8367C_DUMMY_1b09a_OFFSET    4
-+#define    RTL8367C_DUMMY_1b09a_MASK    0xFFF0
-+#define    RTL8367C_PORT9_LED0_MODE_OFFSET    2
-+#define    RTL8367C_PORT9_LED0_MODE_MASK    0xC
-+#define    RTL8367C_PORT8_LED0_MODE_OFFSET    0
-+#define    RTL8367C_PORT8_LED0_MODE_MASK    0x3
-+
-+#define    RTL8367C_REG_CPU_FORCE_LED1_CFG0    0x1b0a
-+#define    RTL8367C_PORT7_LED1_MODE_OFFSET    14
-+#define    RTL8367C_PORT7_LED1_MODE_MASK    0xC000
-+#define    RTL8367C_PORT6_LED1_MODE_OFFSET    12
-+#define    RTL8367C_PORT6_LED1_MODE_MASK    0x3000
-+#define    RTL8367C_PORT5_LED1_MODE_OFFSET    10
-+#define    RTL8367C_PORT5_LED1_MODE_MASK    0xC00
-+#define    RTL8367C_PORT4_LED1_MODE_OFFSET    8
-+#define    RTL8367C_PORT4_LED1_MODE_MASK    0x300
-+#define    RTL8367C_PORT3_LED1_MODE_OFFSET    6
-+#define    RTL8367C_PORT3_LED1_MODE_MASK    0xC0
-+#define    RTL8367C_PORT2_LED1_MODE_OFFSET    4
-+#define    RTL8367C_PORT2_LED1_MODE_MASK    0x30
-+#define    RTL8367C_PORT1_LED1_MODE_OFFSET    2
-+#define    RTL8367C_PORT1_LED1_MODE_MASK    0xC
-+#define    RTL8367C_PORT0_LED1_MODE_OFFSET    0
-+#define    RTL8367C_PORT0_LED1_MODE_MASK    0x3
-+
-+#define    RTL8367C_REG_CPU_FORCE_LED1_CFG1    0x1b0b
-+#define    RTL8367C_DUMMY_1b0ba_OFFSET    4
-+#define    RTL8367C_DUMMY_1b0ba_MASK    0xFFF0
-+#define    RTL8367C_PORT9_LED1_MODE_OFFSET    2
-+#define    RTL8367C_PORT9_LED1_MODE_MASK    0xC
-+#define    RTL8367C_PORT8_LED1_MODE_OFFSET    0
-+#define    RTL8367C_PORT8_LED1_MODE_MASK    0x3
-+
-+#define    RTL8367C_REG_CPU_FORCE_LED2_CFG0    0x1b0c
-+#define    RTL8367C_PORT7_LED2_MODE_OFFSET    14
-+#define    RTL8367C_PORT7_LED2_MODE_MASK    0xC000
-+#define    RTL8367C_PORT6_LED2_MODE_OFFSET    12
-+#define    RTL8367C_PORT6_LED2_MODE_MASK    0x3000
-+#define    RTL8367C_PORT5_LED2_MODE_OFFSET    10
-+#define    RTL8367C_PORT5_LED2_MODE_MASK    0xC00
-+#define    RTL8367C_PORT4_LED2_MODE_OFFSET    8
-+#define    RTL8367C_PORT4_LED2_MODE_MASK    0x300
-+#define    RTL8367C_PORT3_LED2_MODE_OFFSET    6
-+#define    RTL8367C_PORT3_LED2_MODE_MASK    0xC0
-+#define    RTL8367C_PORT2_LED2_MODE_OFFSET    4
-+#define    RTL8367C_PORT2_LED2_MODE_MASK    0x30
-+#define    RTL8367C_PORT1_LED2_MODE_OFFSET    2
-+#define    RTL8367C_PORT1_LED2_MODE_MASK    0xC
-+#define    RTL8367C_PORT0_LED2_MODE_OFFSET    0
-+#define    RTL8367C_PORT0_LED2_MODE_MASK    0x3
-+
-+#define    RTL8367C_REG_CPU_FORCE_LED2_CFG1    0x1b0d
-+#define    RTL8367C_DUMMY_1b0da_OFFSET    4
-+#define    RTL8367C_DUMMY_1b0da_MASK    0xFFF0
-+#define    RTL8367C_PORT9_LED2_MODE_OFFSET    2
-+#define    RTL8367C_PORT9_LED2_MODE_MASK    0xC
-+#define    RTL8367C_PORT8_LED2_MODE_OFFSET    0
-+#define    RTL8367C_PORT8_LED2_MODE_MASK    0x3
-+
-+#define    RTL8367C_REG_LED_ACTIVE_LOW_CFG0    0x1b0e
-+#define    RTL8367C_LED_ACTIVE_LOW_CFG0_DUMMY_15_OFFSET    15
-+#define    RTL8367C_LED_ACTIVE_LOW_CFG0_DUMMY_15_MASK    0x8000
-+#define    RTL8367C_PORT3_LED_ACTIVE_LOW_OFFSET    12
-+#define    RTL8367C_PORT3_LED_ACTIVE_LOW_MASK    0x7000
-+#define    RTL8367C_LED_ACTIVE_LOW_CFG0_DUMMY_11_OFFSET    11
-+#define    RTL8367C_LED_ACTIVE_LOW_CFG0_DUMMY_11_MASK    0x800
-+#define    RTL8367C_PORT2_LED_ACTIVE_LOW_OFFSET    8
-+#define    RTL8367C_PORT2_LED_ACTIVE_LOW_MASK    0x700
-+#define    RTL8367C_DUMMY_7_OFFSET    7
-+#define    RTL8367C_DUMMY_7_MASK    0x80
-+#define    RTL8367C_PORT1_LED_ACTIVE_LOW_OFFSET    4
-+#define    RTL8367C_PORT1_LED_ACTIVE_LOW_MASK    0x70
-+#define    RTL8367C_DUMMY_3_OFFSET    3
-+#define    RTL8367C_DUMMY_3_MASK    0x8
-+#define    RTL8367C_PORT0_LED_ACTIVE_LOW_OFFSET    0
-+#define    RTL8367C_PORT0_LED_ACTIVE_LOW_MASK    0x7
-+
-+#define    RTL8367C_REG_LED_ACTIVE_LOW_CFG1    0x1b0f
-+#define    RTL8367C_LED_ACTIVE_LOW_CFG1_DUMMY_15_OFFSET    15
-+#define    RTL8367C_LED_ACTIVE_LOW_CFG1_DUMMY_15_MASK    0x8000
-+#define    RTL8367C_PORT7_LED_ACTIVE_LOW_OFFSET    12
-+#define    RTL8367C_PORT7_LED_ACTIVE_LOW_MASK    0x7000
-+#define    RTL8367C_LED_ACTIVE_LOW_CFG1_DUMMY_11_OFFSET    11
-+#define    RTL8367C_LED_ACTIVE_LOW_CFG1_DUMMY_11_MASK    0x800
-+#define    RTL8367C_PORT6_LED_ACTIVE_LOW_OFFSET    8
-+#define    RTL8367C_PORT6_LED_ACTIVE_LOW_MASK    0x700
-+#define    RTL8367C_DUMMY_1b0f_b_OFFSET    7
-+#define    RTL8367C_DUMMY_1b0f_b_MASK    0x80
-+#define    RTL8367C_PORT5_LED_ACTIVE_LOW_OFFSET    4
-+#define    RTL8367C_PORT5_LED_ACTIVE_LOW_MASK    0x70
-+#define    RTL8367C_DUMMY_1b0f_a_OFFSET    3
-+#define    RTL8367C_DUMMY_1b0f_a_MASK    0x8
-+#define    RTL8367C_PORT4_LED_ACTIVE_LOW_OFFSET    0
-+#define    RTL8367C_PORT4_LED_ACTIVE_LOW_MASK    0x7
-+
-+#define    RTL8367C_REG_LED_ACTIVE_LOW_CFG2    0x1b10
-+#define    RTL8367C_DUMMY_1b10_b_OFFSET    7
-+#define    RTL8367C_DUMMY_1b10_b_MASK    0xFF80
-+#define    RTL8367C_PORT9_LED_ACTIVE_LOW_OFFSET    4
-+#define    RTL8367C_PORT9_LED_ACTIVE_LOW_MASK    0x70
-+#define    RTL8367C_DUMMY_1b10_a_OFFSET    3
-+#define    RTL8367C_DUMMY_1b10_a_MASK    0x8
-+#define    RTL8367C_PORT8_LED_ACTIVE_LOW_OFFSET    0
-+#define    RTL8367C_PORT8_LED_ACTIVE_LOW_MASK    0x7
-+
-+#define    RTL8367C_REG_SEL_RTCT_PARA    0x1b21
-+#define    RTL8367C_DO_RTCT_COMMAND_OFFSET    15
-+#define    RTL8367C_DO_RTCT_COMMAND_MASK    0x8000
-+#define    RTL8367C_SEL_RTCT_PARA_DUMMY_OFFSET    12
-+#define    RTL8367C_SEL_RTCT_PARA_DUMMY_MASK    0x7000
-+#define    RTL8367C_SEL_RTCT_RLSTLED_TIME_OFFSET    10
-+#define    RTL8367C_SEL_RTCT_RLSTLED_TIME_MASK    0xC00
-+#define    RTL8367C_SEL_RTCT_TEST_LED_TIME_OFFSET    8
-+#define    RTL8367C_SEL_RTCT_TEST_LED_TIME_MASK    0x300
-+#define    RTL8367C_EN_SCAN_RTCT_OFFSET    7
-+#define    RTL8367C_EN_SCAN_RTCT_MASK    0x80
-+#define    RTL8367C_EN_RTCT_TIMOUT_OFFSET    6
-+#define    RTL8367C_EN_RTCT_TIMOUT_MASK    0x40
-+#define    RTL8367C_EN_ALL_RTCT_OFFSET    5
-+#define    RTL8367C_EN_ALL_RTCT_MASK    0x20
-+#define    RTL8367C_SEL_RTCT_PLE_WID_OFFSET    0
-+#define    RTL8367C_SEL_RTCT_PLE_WID_MASK    0x1F
-+
-+#define    RTL8367C_REG_RTCT_ENABLE    0x1b22
-+#define    RTL8367C_RTCT_ENABLE_DUMMY_OFFSET    8
-+#define    RTL8367C_RTCT_ENABLE_DUMMY_MASK    0xFF00
-+#define    RTL8367C_RTCT_ENABLE_PORT_MASK_OFFSET    0
-+#define    RTL8367C_RTCT_ENABLE_PORT_MASK_MASK    0xFF
-+
-+#define    RTL8367C_REG_RTCT_TIMEOUT    0x1b23
-+
-+#define    RTL8367C_REG_PARA_LED_IO_EN1    0x1b24
-+#define    RTL8367C_LED1_PARA_P07_00_OFFSET    8
-+#define    RTL8367C_LED1_PARA_P07_00_MASK    0xFF00
-+#define    RTL8367C_LED0_PARA_P07_00_OFFSET    0
-+#define    RTL8367C_LED0_PARA_P07_00_MASK    0xFF
-+
-+#define    RTL8367C_REG_PARA_LED_IO_EN2    0x1b25
-+#define    RTL8367C_DUMMY_15_8_OFFSET    8
-+#define    RTL8367C_DUMMY_15_8_MASK    0xFF00
-+#define    RTL8367C_LED2_PARA_P07_00_OFFSET    0
-+#define    RTL8367C_LED2_PARA_P07_00_MASK    0xFF
-+
-+#define    RTL8367C_REG_SCAN0_LED_IO_EN1    0x1b26
-+#define    RTL8367C_SCAN0_LED_IO_EN1_DUMMY_OFFSET    3
-+#define    RTL8367C_SCAN0_LED_IO_EN1_DUMMY_MASK    0xFFF8
-+#define    RTL8367C_LED_LOOP_DET_BUZZER_EN_OFFSET    2
-+#define    RTL8367C_LED_LOOP_DET_BUZZER_EN_MASK    0x4
-+#define    RTL8367C_LED_SERI_DATA_EN_OFFSET    1
-+#define    RTL8367C_LED_SERI_DATA_EN_MASK    0x2
-+#define    RTL8367C_LED_SERI_CLK_EN_OFFSET    0
-+#define    RTL8367C_LED_SERI_CLK_EN_MASK    0x1
-+
-+#define    RTL8367C_REG_SCAN1_LED_IO_EN2    0x1b27
-+#define    RTL8367C_LED_SCAN1_BI_PORT_EN_OFFSET    8
-+#define    RTL8367C_LED_SCAN1_BI_PORT_EN_MASK    0xFF00
-+#define    RTL8367C_LED_SCAN1_BI_STA_EN_OFFSET    7
-+#define    RTL8367C_LED_SCAN1_BI_STA_EN_MASK    0x80
-+#define    RTL8367C_SCAN1_LED_IO_EN2_DUMMY_0_OFFSET    6
-+#define    RTL8367C_SCAN1_LED_IO_EN2_DUMMY_0_MASK    0x40
-+#define    RTL8367C_LED_SCAN1_SI_PORT_EN_OFFSET    2
-+#define    RTL8367C_LED_SCAN1_SI_PORT_EN_MASK    0x3C
-+#define    RTL8367C_LED_SCAN1_SI_STA_EN_OFFSET    0
-+#define    RTL8367C_LED_SCAN1_SI_STA_EN_MASK    0x3
-+
-+#define    RTL8367C_REG_LPI_LED_OPT1    0x1b28
-+#define    RTL8367C_LPI_TAG4_OFFSET    12
-+#define    RTL8367C_LPI_TAG4_MASK    0xF000
-+#define    RTL8367C_LPI_TAG3_OFFSET    8
-+#define    RTL8367C_LPI_TAG3_MASK    0xF00
-+#define    RTL8367C_LPI_TAG2_OFFSET    4
-+#define    RTL8367C_LPI_TAG2_MASK    0xF0
-+#define    RTL8367C_LPI_TAG1_OFFSET    0
-+#define    RTL8367C_LPI_TAG1_MASK    0xF
-+
-+#define    RTL8367C_REG_LPI_LED_OPT2    0x1b29
-+#define    RTL8367C_LPI_LED_OPT2_DUMMY_OFFSET    15
-+#define    RTL8367C_LPI_LED_OPT2_DUMMY_MASK    0x8000
-+#define    RTL8367C_LPI_LED2_WEAK_OFFSET    14
-+#define    RTL8367C_LPI_LED2_WEAK_MASK    0x4000
-+#define    RTL8367C_LPI_LED1_WEAK_OFFSET    13
-+#define    RTL8367C_LPI_LED1_WEAK_MASK    0x2000
-+#define    RTL8367C_LPI_LED0_WEAK_OFFSET    12
-+#define    RTL8367C_LPI_LED0_WEAK_MASK    0x1000
-+#define    RTL8367C_LPI_LED2_OFFSET    11
-+#define    RTL8367C_LPI_LED2_MASK    0x800
-+#define    RTL8367C_LPI_LED1_OFFSET    10
-+#define    RTL8367C_LPI_LED1_MASK    0x400
-+#define    RTL8367C_LPI_LED0_OFFSET    9
-+#define    RTL8367C_LPI_LED0_MASK    0x200
-+#define    RTL8367C_LPI_TAG8_OFFSET    8
-+#define    RTL8367C_LPI_TAG8_MASK    0x100
-+#define    RTL8367C_LPI_TAG7_OFFSET    6
-+#define    RTL8367C_LPI_TAG7_MASK    0xC0
-+#define    RTL8367C_LPI_TAG6_OFFSET    4
-+#define    RTL8367C_LPI_TAG6_MASK    0x30
-+#define    RTL8367C_LPI_TAG5_OFFSET    0
-+#define    RTL8367C_LPI_TAG5_MASK    0xF
-+
-+#define    RTL8367C_REG_LPI_LED_OPT3    0x1b2a
-+#define    RTL8367C_LPI_LED_OPT3_DUMMY_OFFSET    3
-+#define    RTL8367C_LPI_LED_OPT3_DUMMY_MASK    0xFFF8
-+#define    RTL8367C_RESTORE_LED_RATE_SEL_OFFSET    1
-+#define    RTL8367C_RESTORE_LED_RATE_SEL_MASK    0x6
-+#define    RTL8367C_RESTORE_LED_SEL_OFFSET    0
-+#define    RTL8367C_RESTORE_LED_SEL_MASK    0x1
-+
-+#define    RTL8367C_REG_P0_LED_MUX    0x1b2b
-+#define    RTL8367C_CFG_P0_LED2_MUX_OFFSET    10
-+#define    RTL8367C_CFG_P0_LED2_MUX_MASK    0x7C00
-+#define    RTL8367C_CFG_P0_LED1_MUX_OFFSET    5
-+#define    RTL8367C_CFG_P0_LED1_MUX_MASK    0x3E0
-+#define    RTL8367C_CFG_P0_LED0_MUX_OFFSET    0
-+#define    RTL8367C_CFG_P0_LED0_MUX_MASK    0x1F
-+
-+#define    RTL8367C_REG_P1_LED_MUX    0x1b2c
-+#define    RTL8367C_CFG_P1_LED2_MUX_OFFSET    10
-+#define    RTL8367C_CFG_P1_LED2_MUX_MASK    0x7C00
-+#define    RTL8367C_CFG_P1_LED1_MUX_OFFSET    5
-+#define    RTL8367C_CFG_P1_LED1_MUX_MASK    0x3E0
-+#define    RTL8367C_CFG_P1_LED0_MUX_OFFSET    0
-+#define    RTL8367C_CFG_P1_LED0_MUX_MASK    0x1F
-+
-+#define    RTL8367C_REG_P2_LED_MUX    0x1b2d
-+#define    RTL8367C_CFG_P2_LED2_MUX_OFFSET    10
-+#define    RTL8367C_CFG_P2_LED2_MUX_MASK    0x7C00
-+#define    RTL8367C_CFG_P2_LED1_MUX_OFFSET    5
-+#define    RTL8367C_CFG_P2_LED1_MUX_MASK    0x3E0
-+#define    RTL8367C_CFG_P2_LED0_MUX_OFFSET    0
-+#define    RTL8367C_CFG_P2_LED0_MUX_MASK    0x1F
-+
-+#define    RTL8367C_REG_P3_LED_MUX    0x1b2e
-+#define    RTL8367C_CFG_P3_LED2_MUX_OFFSET    10
-+#define    RTL8367C_CFG_P3_LED2_MUX_MASK    0x7C00
-+#define    RTL8367C_CFG_P3_LED1_MUX_OFFSET    5
-+#define    RTL8367C_CFG_P3_LED1_MUX_MASK    0x3E0
-+#define    RTL8367C_CFG_P3_LED0_MUX_OFFSET    0
-+#define    RTL8367C_CFG_P3_LED0_MUX_MASK    0x1F
-+
-+#define    RTL8367C_REG_P4_LED_MUX    0x1b2f
-+#define    RTL8367C_CFG_P4_LED2_MUX_OFFSET    10
-+#define    RTL8367C_CFG_P4_LED2_MUX_MASK    0x7C00
-+#define    RTL8367C_CFG_P4_LED1_MUX_OFFSET    5
-+#define    RTL8367C_CFG_P4_LED1_MUX_MASK    0x3E0
-+#define    RTL8367C_CFG_P4_LED0_MUX_OFFSET    0
-+#define    RTL8367C_CFG_P4_LED0_MUX_MASK    0x1F
-+
-+#define    RTL8367C_REG_LED0_DATA_CTRL    0x1b30
-+#define    RTL8367C_CFG_DATA_LED0_SEL_OFFSET    6
-+#define    RTL8367C_CFG_DATA_LED0_SEL_MASK    0x40
-+#define    RTL8367C_CFG_DATA_LED0_ACT_OFFSET    4
-+#define    RTL8367C_CFG_DATA_LED0_ACT_MASK    0x30
-+#define    RTL8367C_CFG_DATA_LED0_SPD_OFFSET    0
-+#define    RTL8367C_CFG_DATA_LED0_SPD_MASK    0xF
-+
-+#define    RTL8367C_REG_LED1_DATA_CTRL    0x1b31
-+#define    RTL8367C_CFG_DATA_LED1_SEL_OFFSET    6
-+#define    RTL8367C_CFG_DATA_LED1_SEL_MASK    0x40
-+#define    RTL8367C_CFG_DATA_LED1_ACT_OFFSET    4
-+#define    RTL8367C_CFG_DATA_LED1_ACT_MASK    0x30
-+#define    RTL8367C_CFG_DATA_LED1_SPD_OFFSET    0
-+#define    RTL8367C_CFG_DATA_LED1_SPD_MASK    0xF
-+
-+#define    RTL8367C_REG_LED2_DATA_CTRL    0x1b32
-+#define    RTL8367C_CFG_DATA_LED2_SEL_OFFSET    6
-+#define    RTL8367C_CFG_DATA_LED2_SEL_MASK    0x40
-+#define    RTL8367C_CFG_DATA_LED2_ACT_OFFSET    4
-+#define    RTL8367C_CFG_DATA_LED2_ACT_MASK    0x30
-+#define    RTL8367C_CFG_DATA_LED2_SPD_OFFSET    0
-+#define    RTL8367C_CFG_DATA_LED2_SPD_MASK    0xF
-+
-+#define    RTL8367C_REG_PARA_LED_IO_EN3    0x1b33
-+#define    RTL8367C_dummy_1b33a_OFFSET    6
-+#define    RTL8367C_dummy_1b33a_MASK    0xFFC0
-+#define    RTL8367C_LED2_PARA_P09_08_OFFSET    4
-+#define    RTL8367C_LED2_PARA_P09_08_MASK    0x30
-+#define    RTL8367C_LED1_PARA_P09_08_OFFSET    2
-+#define    RTL8367C_LED1_PARA_P09_08_MASK    0xC
-+#define    RTL8367C_LED0_PARA_P09_08_OFFSET    0
-+#define    RTL8367C_LED0_PARA_P09_08_MASK    0x3
-+
-+#define    RTL8367C_REG_SCAN1_LED_IO_EN3    0x1b34
-+#define    RTL8367C_dummy_1b34a_OFFSET    3
-+#define    RTL8367C_dummy_1b34a_MASK    0xFFF8
-+#define    RTL8367C_LED_SCAN1_BI_PORT9_8_EN_OFFSET    1
-+#define    RTL8367C_LED_SCAN1_BI_PORT9_8_EN_MASK    0x6
-+#define    RTL8367C_LED_SCAN1_SI_PORT9_8_EN_OFFSET    0
-+#define    RTL8367C_LED_SCAN1_SI_PORT9_8_EN_MASK    0x1
-+
-+#define    RTL8367C_REG_P5_LED_MUX    0x1b35
-+#define    RTL8367C_CFG_P5_LED2_MUX_OFFSET    10
-+#define    RTL8367C_CFG_P5_LED2_MUX_MASK    0x7C00
-+#define    RTL8367C_CFG_P5_LED1_MUX_OFFSET    5
-+#define    RTL8367C_CFG_P5_LED1_MUX_MASK    0x3E0
-+#define    RTL8367C_CFG_P5_LED0_MUX_OFFSET    0
-+#define    RTL8367C_CFG_P5_LED0_MUX_MASK    0x1F
-+
-+#define    RTL8367C_REG_P6_LED_MUX    0x1b36
-+#define    RTL8367C_CFG_P6_LED2_MUX_OFFSET    10
-+#define    RTL8367C_CFG_P6_LED2_MUX_MASK    0x7C00
-+#define    RTL8367C_CFG_P6_LED1_MUX_OFFSET    5
-+#define    RTL8367C_CFG_P6_LED1_MUX_MASK    0x3E0
-+#define    RTL8367C_CFG_P6_LED0_MUX_OFFSET    0
-+#define    RTL8367C_CFG_P6_LED0_MUX_MASK    0x1F
-+
-+#define    RTL8367C_REG_P7_LED_MUX    0x1b37
-+#define    RTL8367C_CFG_P7_LED2_MUX_OFFSET    10
-+#define    RTL8367C_CFG_P7_LED2_MUX_MASK    0x7C00
-+#define    RTL8367C_CFG_P7_LED1_MUX_OFFSET    5
-+#define    RTL8367C_CFG_P7_LED1_MUX_MASK    0x3E0
-+#define    RTL8367C_CFG_P7_LED0_MUX_OFFSET    0
-+#define    RTL8367C_CFG_P7_LED0_MUX_MASK    0x1F
-+
-+#define    RTL8367C_REG_P8_LED_MUX    0x1b38
-+#define    RTL8367C_CFG_P8_LED2_MUX_OFFSET    10
-+#define    RTL8367C_CFG_P8_LED2_MUX_MASK    0x7C00
-+#define    RTL8367C_CFG_P8_LED1_MUX_OFFSET    5
-+#define    RTL8367C_CFG_P8_LED1_MUX_MASK    0x3E0
-+#define    RTL8367C_CFG_P8_LED0_MUX_OFFSET    0
-+#define    RTL8367C_CFG_P8_LED0_MUX_MASK    0x1F
-+
-+#define    RTL8367C_REG_P9_LED_MUX    0x1b39
-+#define    RTL8367C_CFG_P9_LED2_MUX_OFFSET    10
-+#define    RTL8367C_CFG_P9_LED2_MUX_MASK    0x7C00
-+#define    RTL8367C_CFG_P9_LED1_MUX_OFFSET    5
-+#define    RTL8367C_CFG_P9_LED1_MUX_MASK    0x3E0
-+#define    RTL8367C_CFG_P9_LED0_MUX_OFFSET    0
-+#define    RTL8367C_CFG_P9_LED0_MUX_MASK    0x1F
-+
-+#define    RTL8367C_REG_SERIAL_LED_CTRL    0x1b3a
-+#define    RTL8367C_SERIAL_LED_SHIFT_SEQUENCE_OFFSET    13
-+#define    RTL8367C_SERIAL_LED_SHIFT_SEQUENCE_MASK    0x6000
-+#define    RTL8367C_SERIAL_LED_SHIFT_SEQUENCE_EN_OFFSET    12
-+#define    RTL8367C_SERIAL_LED_SHIFT_SEQUENCE_EN_MASK    0x1000
-+#define    RTL8367C_SERIAL_LED_GROUP_NUM_OFFSET    10
-+#define    RTL8367C_SERIAL_LED_GROUP_NUM_MASK    0xC00
-+#define    RTL8367C_SERIAL_LED_PORT_EN_OFFSET    0
-+#define    RTL8367C_SERIAL_LED_PORT_EN_MASK    0x3FF
-+
-+/* (16'h1c00)IGMP_EAV */
-+
-+#define    RTL8367C_REG_IGMP_MLD_CFG0    0x1c00
-+#define    RTL8367C_IGMP_MLD_PORTISO_LEAKY_OFFSET    15
-+#define    RTL8367C_IGMP_MLD_PORTISO_LEAKY_MASK    0x8000
-+#define    RTL8367C_IGMP_MLD_VLAN_LEAKY_OFFSET    14
-+#define    RTL8367C_IGMP_MLD_VLAN_LEAKY_MASK    0x4000
-+#define    RTL8367C_IGMP_MLD_DISCARD_STORM_FILTER_OFFSET    13
-+#define    RTL8367C_IGMP_MLD_DISCARD_STORM_FILTER_MASK    0x2000
-+#define    RTL8367C_REPORT_FORWARD_OFFSET    12
-+#define    RTL8367C_REPORT_FORWARD_MASK    0x1000
-+#define    RTL8367C_ROBURSTNESS_VAR_OFFSET    9
-+#define    RTL8367C_ROBURSTNESS_VAR_MASK    0xE00
-+#define    RTL8367C_LEAVE_SUPPRESSION_OFFSET    8
-+#define    RTL8367C_LEAVE_SUPPRESSION_MASK    0x100
-+#define    RTL8367C_REPORT_SUPPRESSION_OFFSET    7
-+#define    RTL8367C_REPORT_SUPPRESSION_MASK    0x80
-+#define    RTL8367C_LEAVE_TIMER_OFFSET    4
-+#define    RTL8367C_LEAVE_TIMER_MASK    0x70
-+#define    RTL8367C_FAST_LEAVE_EN_OFFSET    3
-+#define    RTL8367C_FAST_LEAVE_EN_MASK    0x8
-+#define    RTL8367C_CKS_ERR_OP_OFFSET    1
-+#define    RTL8367C_CKS_ERR_OP_MASK    0x6
-+#define    RTL8367C_IGMP_MLD_EN_OFFSET    0
-+#define    RTL8367C_IGMP_MLD_EN_MASK    0x1
-+
-+#define    RTL8367C_REG_IGMP_MLD_CFG1    0x1c01
-+#define    RTL8367C_DROP_LEAVE_ZERO_OFFSET    2
-+#define    RTL8367C_DROP_LEAVE_ZERO_MASK    0x4
-+#define    RTL8367C_TABLE_FULL_OP_OFFSET    0
-+#define    RTL8367C_TABLE_FULL_OP_MASK    0x3
-+
-+#define    RTL8367C_REG_IGMP_MLD_CFG2    0x1c02
-+
-+#define    RTL8367C_REG_IGMP_DYNAMIC_ROUTER_PORT    0x1c03
-+#define    RTL8367C_D_ROUTER_PORT_2_OFFSET    11
-+#define    RTL8367C_D_ROUTER_PORT_2_MASK    0x7800
-+#define    RTL8367C_D_ROUTER_PORT_TMR_2_OFFSET    8
-+#define    RTL8367C_D_ROUTER_PORT_TMR_2_MASK    0x700
-+#define    RTL8367C_D_ROUTER_PORT_1_OFFSET    3
-+#define    RTL8367C_D_ROUTER_PORT_1_MASK    0x78
-+#define    RTL8367C_D_ROUTER_PORT_TMR_1_OFFSET    0
-+#define    RTL8367C_D_ROUTER_PORT_TMR_1_MASK    0x7
-+
-+#define    RTL8367C_REG_IGMP_STATIC_ROUTER_PORT    0x1c04
-+#define    RTL8367C_IGMP_STATIC_ROUTER_PORT_OFFSET    0
-+#define    RTL8367C_IGMP_STATIC_ROUTER_PORT_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IGMP_PORT0_CONTROL    0x1c05
-+#define    RTL8367C_IGMP_PORT0_CONTROL_ALLOW_QUERY_OFFSET    14
-+#define    RTL8367C_IGMP_PORT0_CONTROL_ALLOW_QUERY_MASK    0x4000
-+#define    RTL8367C_IGMP_PORT0_CONTROL_ALLOW_REPORT_OFFSET    13
-+#define    RTL8367C_IGMP_PORT0_CONTROL_ALLOW_REPORT_MASK    0x2000
-+#define    RTL8367C_IGMP_PORT0_CONTROL_ALLOW_LEAVE_OFFSET    12
-+#define    RTL8367C_IGMP_PORT0_CONTROL_ALLOW_LEAVE_MASK    0x1000
-+#define    RTL8367C_IGMP_PORT0_CONTROL_ALLOW_MRP_OFFSET    11
-+#define    RTL8367C_IGMP_PORT0_CONTROL_ALLOW_MRP_MASK    0x800
-+#define    RTL8367C_IGMP_PORT0_CONTROL_ALLOW_MC_DATA_OFFSET    10
-+#define    RTL8367C_IGMP_PORT0_CONTROL_ALLOW_MC_DATA_MASK    0x400
-+#define    RTL8367C_IGMP_PORT0_CONTROL_MLDv2_OP_OFFSET    8
-+#define    RTL8367C_IGMP_PORT0_CONTROL_MLDv2_OP_MASK    0x300
-+#define    RTL8367C_IGMP_PORT0_CONTROL_MLDv1_OP_OFFSET    6
-+#define    RTL8367C_IGMP_PORT0_CONTROL_MLDv1_OP_MASK    0xC0
-+#define    RTL8367C_IGMP_PORT0_CONTROL_IGMPV3_OP_OFFSET    4
-+#define    RTL8367C_IGMP_PORT0_CONTROL_IGMPV3_OP_MASK    0x30
-+#define    RTL8367C_IGMP_PORT0_CONTROL_IGMPV2_OP_OFFSET    2
-+#define    RTL8367C_IGMP_PORT0_CONTROL_IGMPV2_OP_MASK    0xC
-+#define    RTL8367C_IGMP_PORT0_CONTROL_IGMPV1_OP_OFFSET    0
-+#define    RTL8367C_IGMP_PORT0_CONTROL_IGMPV1_OP_MASK    0x3
-+
-+#define    RTL8367C_REG_IGMP_PORT1_CONTROL    0x1c06
-+#define    RTL8367C_IGMP_PORT1_CONTROL_ALLOW_QUERY_OFFSET    14
-+#define    RTL8367C_IGMP_PORT1_CONTROL_ALLOW_QUERY_MASK    0x4000
-+#define    RTL8367C_IGMP_PORT1_CONTROL_ALLOW_REPORT_OFFSET    13
-+#define    RTL8367C_IGMP_PORT1_CONTROL_ALLOW_REPORT_MASK    0x2000
-+#define    RTL8367C_IGMP_PORT1_CONTROL_ALLOW_LEAVE_OFFSET    12
-+#define    RTL8367C_IGMP_PORT1_CONTROL_ALLOW_LEAVE_MASK    0x1000
-+#define    RTL8367C_IGMP_PORT1_CONTROL_ALLOW_MRP_OFFSET    11
-+#define    RTL8367C_IGMP_PORT1_CONTROL_ALLOW_MRP_MASK    0x800
-+#define    RTL8367C_IGMP_PORT1_CONTROL_ALLOW_MC_DATA_OFFSET    10
-+#define    RTL8367C_IGMP_PORT1_CONTROL_ALLOW_MC_DATA_MASK    0x400
-+#define    RTL8367C_IGMP_PORT1_CONTROL_MLDv2_OP_OFFSET    8
-+#define    RTL8367C_IGMP_PORT1_CONTROL_MLDv2_OP_MASK    0x300
-+#define    RTL8367C_IGMP_PORT1_CONTROL_MLDv1_OP_OFFSET    6
-+#define    RTL8367C_IGMP_PORT1_CONTROL_MLDv1_OP_MASK    0xC0
-+#define    RTL8367C_IGMP_PORT1_CONTROL_IGMPV3_OP_OFFSET    4
-+#define    RTL8367C_IGMP_PORT1_CONTROL_IGMPV3_OP_MASK    0x30
-+#define    RTL8367C_IGMP_PORT1_CONTROL_IGMPV2_OP_OFFSET    2
-+#define    RTL8367C_IGMP_PORT1_CONTROL_IGMPV2_OP_MASK    0xC
-+#define    RTL8367C_IGMP_PORT1_CONTROL_IGMPV1_OP_OFFSET    0
-+#define    RTL8367C_IGMP_PORT1_CONTROL_IGMPV1_OP_MASK    0x3
-+
-+#define    RTL8367C_REG_IGMP_PORT2_CONTROL    0x1c07
-+#define    RTL8367C_IGMP_PORT2_CONTROL_ALLOW_QUERY_OFFSET    14
-+#define    RTL8367C_IGMP_PORT2_CONTROL_ALLOW_QUERY_MASK    0x4000
-+#define    RTL8367C_IGMP_PORT2_CONTROL_ALLOW_REPORT_OFFSET    13
-+#define    RTL8367C_IGMP_PORT2_CONTROL_ALLOW_REPORT_MASK    0x2000
-+#define    RTL8367C_IGMP_PORT2_CONTROL_ALLOW_LEAVE_OFFSET    12
-+#define    RTL8367C_IGMP_PORT2_CONTROL_ALLOW_LEAVE_MASK    0x1000
-+#define    RTL8367C_IGMP_PORT2_CONTROL_ALLOW_MRP_OFFSET    11
-+#define    RTL8367C_IGMP_PORT2_CONTROL_ALLOW_MRP_MASK    0x800
-+#define    RTL8367C_IGMP_PORT2_CONTROL_ALLOW_MC_DATA_OFFSET    10
-+#define    RTL8367C_IGMP_PORT2_CONTROL_ALLOW_MC_DATA_MASK    0x400
-+#define    RTL8367C_IGMP_PORT2_CONTROL_MLDv2_OP_OFFSET    8
-+#define    RTL8367C_IGMP_PORT2_CONTROL_MLDv2_OP_MASK    0x300
-+#define    RTL8367C_IGMP_PORT2_CONTROL_MLDv1_OP_OFFSET    6
-+#define    RTL8367C_IGMP_PORT2_CONTROL_MLDv1_OP_MASK    0xC0
-+#define    RTL8367C_IGMP_PORT2_CONTROL_IGMPV3_OP_OFFSET    4
-+#define    RTL8367C_IGMP_PORT2_CONTROL_IGMPV3_OP_MASK    0x30
-+#define    RTL8367C_IGMP_PORT2_CONTROL_IGMPV2_OP_OFFSET    2
-+#define    RTL8367C_IGMP_PORT2_CONTROL_IGMPV2_OP_MASK    0xC
-+#define    RTL8367C_IGMP_PORT2_CONTROL_IGMPV1_OP_OFFSET    0
-+#define    RTL8367C_IGMP_PORT2_CONTROL_IGMPV1_OP_MASK    0x3
-+
-+#define    RTL8367C_REG_IGMP_PORT3_CONTROL    0x1c08
-+#define    RTL8367C_IGMP_PORT3_CONTROL_ALLOW_QUERY_OFFSET    14
-+#define    RTL8367C_IGMP_PORT3_CONTROL_ALLOW_QUERY_MASK    0x4000
-+#define    RTL8367C_IGMP_PORT3_CONTROL_ALLOW_REPORT_OFFSET    13
-+#define    RTL8367C_IGMP_PORT3_CONTROL_ALLOW_REPORT_MASK    0x2000
-+#define    RTL8367C_IGMP_PORT3_CONTROL_ALLOW_LEAVE_OFFSET    12
-+#define    RTL8367C_IGMP_PORT3_CONTROL_ALLOW_LEAVE_MASK    0x1000
-+#define    RTL8367C_IGMP_PORT3_CONTROL_ALLOW_MRP_OFFSET    11
-+#define    RTL8367C_IGMP_PORT3_CONTROL_ALLOW_MRP_MASK    0x800
-+#define    RTL8367C_IGMP_PORT3_CONTROL_ALLOW_MC_DATA_OFFSET    10
-+#define    RTL8367C_IGMP_PORT3_CONTROL_ALLOW_MC_DATA_MASK    0x400
-+#define    RTL8367C_IGMP_PORT3_CONTROL_MLDv2_OP_OFFSET    8
-+#define    RTL8367C_IGMP_PORT3_CONTROL_MLDv2_OP_MASK    0x300
-+#define    RTL8367C_IGMP_PORT3_CONTROL_MLDv1_OP_OFFSET    6
-+#define    RTL8367C_IGMP_PORT3_CONTROL_MLDv1_OP_MASK    0xC0
-+#define    RTL8367C_IGMP_PORT3_CONTROL_IGMPV3_OP_OFFSET    4
-+#define    RTL8367C_IGMP_PORT3_CONTROL_IGMPV3_OP_MASK    0x30
-+#define    RTL8367C_IGMP_PORT3_CONTROL_IGMPV2_OP_OFFSET    2
-+#define    RTL8367C_IGMP_PORT3_CONTROL_IGMPV2_OP_MASK    0xC
-+#define    RTL8367C_IGMP_PORT3_CONTROL_IGMPV1_OP_OFFSET    0
-+#define    RTL8367C_IGMP_PORT3_CONTROL_IGMPV1_OP_MASK    0x3
-+
-+#define    RTL8367C_REG_IGMP_PORT4_CONTROL    0x1c09
-+#define    RTL8367C_IGMP_PORT4_CONTROL_ALLOW_QUERY_OFFSET    14
-+#define    RTL8367C_IGMP_PORT4_CONTROL_ALLOW_QUERY_MASK    0x4000
-+#define    RTL8367C_IGMP_PORT4_CONTROL_ALLOW_REPORT_OFFSET    13
-+#define    RTL8367C_IGMP_PORT4_CONTROL_ALLOW_REPORT_MASK    0x2000
-+#define    RTL8367C_IGMP_PORT4_CONTROL_ALLOW_LEAVE_OFFSET    12
-+#define    RTL8367C_IGMP_PORT4_CONTROL_ALLOW_LEAVE_MASK    0x1000
-+#define    RTL8367C_IGMP_PORT4_CONTROL_ALLOW_MRP_OFFSET    11
-+#define    RTL8367C_IGMP_PORT4_CONTROL_ALLOW_MRP_MASK    0x800
-+#define    RTL8367C_IGMP_PORT4_CONTROL_ALLOW_MC_DATA_OFFSET    10
-+#define    RTL8367C_IGMP_PORT4_CONTROL_ALLOW_MC_DATA_MASK    0x400
-+#define    RTL8367C_IGMP_PORT4_CONTROL_MLDv2_OP_OFFSET    8
-+#define    RTL8367C_IGMP_PORT4_CONTROL_MLDv2_OP_MASK    0x300
-+#define    RTL8367C_IGMP_PORT4_CONTROL_MLDv1_OP_OFFSET    6
-+#define    RTL8367C_IGMP_PORT4_CONTROL_MLDv1_OP_MASK    0xC0
-+#define    RTL8367C_IGMP_PORT4_CONTROL_IGMPV3_OP_OFFSET    4
-+#define    RTL8367C_IGMP_PORT4_CONTROL_IGMPV3_OP_MASK    0x30
-+#define    RTL8367C_IGMP_PORT4_CONTROL_IGMPV2_OP_OFFSET    2
-+#define    RTL8367C_IGMP_PORT4_CONTROL_IGMPV2_OP_MASK    0xC
-+#define    RTL8367C_IGMP_PORT4_CONTROL_IGMPV1_OP_OFFSET    0
-+#define    RTL8367C_IGMP_PORT4_CONTROL_IGMPV1_OP_MASK    0x3
-+
-+#define    RTL8367C_REG_IGMP_PORT5_CONTROL    0x1c0a
-+#define    RTL8367C_IGMP_PORT5_CONTROL_ALLOW_QUERY_OFFSET    14
-+#define    RTL8367C_IGMP_PORT5_CONTROL_ALLOW_QUERY_MASK    0x4000
-+#define    RTL8367C_IGMP_PORT5_CONTROL_ALLOW_REPORT_OFFSET    13
-+#define    RTL8367C_IGMP_PORT5_CONTROL_ALLOW_REPORT_MASK    0x2000
-+#define    RTL8367C_IGMP_PORT5_CONTROL_ALLOW_LEAVE_OFFSET    12
-+#define    RTL8367C_IGMP_PORT5_CONTROL_ALLOW_LEAVE_MASK    0x1000
-+#define    RTL8367C_IGMP_PORT5_CONTROL_ALLOW_MRP_OFFSET    11
-+#define    RTL8367C_IGMP_PORT5_CONTROL_ALLOW_MRP_MASK    0x800
-+#define    RTL8367C_IGMP_PORT5_CONTROL_ALLOW_MC_DATA_OFFSET    10
-+#define    RTL8367C_IGMP_PORT5_CONTROL_ALLOW_MC_DATA_MASK    0x400
-+#define    RTL8367C_IGMP_PORT5_CONTROL_MLDv2_OP_OFFSET    8
-+#define    RTL8367C_IGMP_PORT5_CONTROL_MLDv2_OP_MASK    0x300
-+#define    RTL8367C_IGMP_PORT5_CONTROL_MLDv1_OP_OFFSET    6
-+#define    RTL8367C_IGMP_PORT5_CONTROL_MLDv1_OP_MASK    0xC0
-+#define    RTL8367C_IGMP_PORT5_CONTROL_IGMPV3_OP_OFFSET    4
-+#define    RTL8367C_IGMP_PORT5_CONTROL_IGMPV3_OP_MASK    0x30
-+#define    RTL8367C_IGMP_PORT5_CONTROL_IGMPV2_OP_OFFSET    2
-+#define    RTL8367C_IGMP_PORT5_CONTROL_IGMPV2_OP_MASK    0xC
-+#define    RTL8367C_IGMP_PORT5_CONTROL_IGMPV1_OP_OFFSET    0
-+#define    RTL8367C_IGMP_PORT5_CONTROL_IGMPV1_OP_MASK    0x3
-+
-+#define    RTL8367C_REG_IGMP_PORT6_CONTROL    0x1c0b
-+#define    RTL8367C_IGMP_PORT6_CONTROL_ALLOW_QUERY_OFFSET    14
-+#define    RTL8367C_IGMP_PORT6_CONTROL_ALLOW_QUERY_MASK    0x4000
-+#define    RTL8367C_IGMP_PORT6_CONTROL_ALLOW_REPORT_OFFSET    13
-+#define    RTL8367C_IGMP_PORT6_CONTROL_ALLOW_REPORT_MASK    0x2000
-+#define    RTL8367C_IGMP_PORT6_CONTROL_ALLOW_LEAVE_OFFSET    12
-+#define    RTL8367C_IGMP_PORT6_CONTROL_ALLOW_LEAVE_MASK    0x1000
-+#define    RTL8367C_IGMP_PORT6_CONTROL_ALLOW_MRP_OFFSET    11
-+#define    RTL8367C_IGMP_PORT6_CONTROL_ALLOW_MRP_MASK    0x800
-+#define    RTL8367C_IGMP_PORT6_CONTROL_ALLOW_MC_DATA_OFFSET    10
-+#define    RTL8367C_IGMP_PORT6_CONTROL_ALLOW_MC_DATA_MASK    0x400
-+#define    RTL8367C_IGMP_PORT6_CONTROL_MLDv2_OP_OFFSET    8
-+#define    RTL8367C_IGMP_PORT6_CONTROL_MLDv2_OP_MASK    0x300
-+#define    RTL8367C_IGMP_PORT6_CONTROL_MLDv1_OP_OFFSET    6
-+#define    RTL8367C_IGMP_PORT6_CONTROL_MLDv1_OP_MASK    0xC0
-+#define    RTL8367C_IGMP_PORT6_CONTROL_IGMPV3_OP_OFFSET    4
-+#define    RTL8367C_IGMP_PORT6_CONTROL_IGMPV3_OP_MASK    0x30
-+#define    RTL8367C_IGMP_PORT6_CONTROL_IGMPV2_OP_OFFSET    2
-+#define    RTL8367C_IGMP_PORT6_CONTROL_IGMPV2_OP_MASK    0xC
-+#define    RTL8367C_IGMP_PORT6_CONTROL_IGMPV1_OP_OFFSET    0
-+#define    RTL8367C_IGMP_PORT6_CONTROL_IGMPV1_OP_MASK    0x3
-+
-+#define    RTL8367C_REG_IGMP_PORT7_CONTROL    0x1c0c
-+#define    RTL8367C_IGMP_PORT7_CONTROL_ALLOW_QUERY_OFFSET    14
-+#define    RTL8367C_IGMP_PORT7_CONTROL_ALLOW_QUERY_MASK    0x4000
-+#define    RTL8367C_IGMP_PORT7_CONTROL_ALLOW_REPORT_OFFSET    13
-+#define    RTL8367C_IGMP_PORT7_CONTROL_ALLOW_REPORT_MASK    0x2000
-+#define    RTL8367C_IGMP_PORT7_CONTROL_ALLOW_LEAVE_OFFSET    12
-+#define    RTL8367C_IGMP_PORT7_CONTROL_ALLOW_LEAVE_MASK    0x1000
-+#define    RTL8367C_IGMP_PORT7_CONTROL_ALLOW_MRP_OFFSET    11
-+#define    RTL8367C_IGMP_PORT7_CONTROL_ALLOW_MRP_MASK    0x800
-+#define    RTL8367C_IGMP_PORT7_CONTROL_ALLOW_MC_DATA_OFFSET    10
-+#define    RTL8367C_IGMP_PORT7_CONTROL_ALLOW_MC_DATA_MASK    0x400
-+#define    RTL8367C_IGMP_PORT7_CONTROL_MLDv2_OP_OFFSET    8
-+#define    RTL8367C_IGMP_PORT7_CONTROL_MLDv2_OP_MASK    0x300
-+#define    RTL8367C_IGMP_PORT7_CONTROL_MLDv1_OP_OFFSET    6
-+#define    RTL8367C_IGMP_PORT7_CONTROL_MLDv1_OP_MASK    0xC0
-+#define    RTL8367C_IGMP_PORT7_CONTROL_IGMPV3_OP_OFFSET    4
-+#define    RTL8367C_IGMP_PORT7_CONTROL_IGMPV3_OP_MASK    0x30
-+#define    RTL8367C_IGMP_PORT7_CONTROL_IGMPV2_OP_OFFSET    2
-+#define    RTL8367C_IGMP_PORT7_CONTROL_IGMPV2_OP_MASK    0xC
-+#define    RTL8367C_IGMP_PORT7_CONTROL_IGMPV1_OP_OFFSET    0
-+#define    RTL8367C_IGMP_PORT7_CONTROL_IGMPV1_OP_MASK    0x3
-+
-+#define    RTL8367C_REG_IGMP_PORT01_MAX_GROUP    0x1c0d
-+#define    RTL8367C_PORT1_MAX_GROUP_OFFSET    8
-+#define    RTL8367C_PORT1_MAX_GROUP_MASK    0xFF00
-+#define    RTL8367C_PORT0_MAX_GROUP_OFFSET    0
-+#define    RTL8367C_PORT0_MAX_GROUP_MASK    0xFF
-+
-+#define    RTL8367C_REG_IGMP_PORT23_MAX_GROUP    0x1c0e
-+#define    RTL8367C_PORT3_MAX_GROUP_OFFSET    8
-+#define    RTL8367C_PORT3_MAX_GROUP_MASK    0xFF00
-+#define    RTL8367C_PORT2_MAX_GROUP_OFFSET    0
-+#define    RTL8367C_PORT2_MAX_GROUP_MASK    0xFF
-+
-+#define    RTL8367C_REG_IGMP_PORT45_MAX_GROUP    0x1c0f
-+#define    RTL8367C_PORT5_MAX_GROUP_OFFSET    8
-+#define    RTL8367C_PORT5_MAX_GROUP_MASK    0xFF00
-+#define    RTL8367C_PORT4_MAX_GROUP_OFFSET    0
-+#define    RTL8367C_PORT4_MAX_GROUP_MASK    0xFF
-+
-+#define    RTL8367C_REG_IGMP_PORT67_MAX_GROUP    0x1c10
-+#define    RTL8367C_PORT7_MAX_GROUP_OFFSET    8
-+#define    RTL8367C_PORT7_MAX_GROUP_MASK    0xFF00
-+#define    RTL8367C_PORT6_MAX_GROUP_OFFSET    0
-+#define    RTL8367C_PORT6_MAX_GROUP_MASK    0xFF
-+
-+#define    RTL8367C_REG_IGMP_PORT01_CURRENT_GROUP    0x1c11
-+#define    RTL8367C_PORT1_CURRENT_GROUP_OFFSET    8
-+#define    RTL8367C_PORT1_CURRENT_GROUP_MASK    0xFF00
-+#define    RTL8367C_PORT0_CURRENT_GROUP_OFFSET    0
-+#define    RTL8367C_PORT0_CURRENT_GROUP_MASK    0xFF
-+
-+#define    RTL8367C_REG_IGMP_PORT23_CURRENT_GROUP    0x1c12
-+#define    RTL8367C_PORT3_CURRENT_GROUP_OFFSET    8
-+#define    RTL8367C_PORT3_CURRENT_GROUP_MASK    0xFF00
-+#define    RTL8367C_PORT2_CURRENT_GROUP_OFFSET    0
-+#define    RTL8367C_PORT2_CURRENT_GROUP_MASK    0xFF
-+
-+#define    RTL8367C_REG_IGMP_PORT45_CURRENT_GROUP    0x1c13
-+#define    RTL8367C_PORT5_CURRENT_GROUP_OFFSET    8
-+#define    RTL8367C_PORT5_CURRENT_GROUP_MASK    0xFF00
-+#define    RTL8367C_PORT4_CURRENT_GROUP_OFFSET    0
-+#define    RTL8367C_PORT4_CURRENT_GROUP_MASK    0xFF
-+
-+#define    RTL8367C_REG_IGMP_PORT67_CURRENT_GROUP    0x1c14
-+#define    RTL8367C_PORT7_CURRENT_GROUP_OFFSET    8
-+#define    RTL8367C_PORT7_CURRENT_GROUP_MASK    0xFF00
-+#define    RTL8367C_PORT6_CURRENT_GROUP_OFFSET    0
-+#define    RTL8367C_PORT6_CURRENT_GROUP_MASK    0xFF
-+
-+#define    RTL8367C_REG_IGMP_MLD_CFG3    0x1c15
-+#define    RTL8367C_IGMP_MLD_IP6_BYPASS_OFFSET    5
-+#define    RTL8367C_IGMP_MLD_IP6_BYPASS_MASK    0x20
-+#define    RTL8367C_IGMP_MLD_IP4_BYPASS_239_255_255_OFFSET    4
-+#define    RTL8367C_IGMP_MLD_IP4_BYPASS_239_255_255_MASK    0x10
-+#define    RTL8367C_IGMP_MLD_IP4_BYPASS_224_0_1_OFFSET    3
-+#define    RTL8367C_IGMP_MLD_IP4_BYPASS_224_0_1_MASK    0x8
-+#define    RTL8367C_IGMP_MLD_IP4_BYPASS_224_0_0_OFFSET    2
-+#define    RTL8367C_IGMP_MLD_IP4_BYPASS_224_0_0_MASK    0x4
-+#define    RTL8367C_REPORT_LEAVE_FORWARD_OFFSET    0
-+#define    RTL8367C_REPORT_LEAVE_FORWARD_MASK    0x3
-+
-+#define    RTL8367C_REG_IGMP_MLD_CFG4    0x1c16
-+#define    RTL8367C_IGMP_MLD_CFG4_OFFSET    0
-+#define    RTL8367C_IGMP_MLD_CFG4_MASK    0x7FF
-+
-+#define    RTL8367C_REG_IGMP_GROUP_USAGE_LIST0    0x1c20
-+
-+#define    RTL8367C_REG_IGMP_GROUP_USAGE_LIST1    0x1c21
-+
-+#define    RTL8367C_REG_IGMP_GROUP_USAGE_LIST2    0x1c22
-+
-+#define    RTL8367C_REG_IGMP_GROUP_USAGE_LIST3    0x1c23
-+
-+#define    RTL8367C_REG_IGMP_GROUP_USAGE_LIST4    0x1c24
-+
-+#define    RTL8367C_REG_IGMP_GROUP_USAGE_LIST5    0x1c25
-+
-+#define    RTL8367C_REG_IGMP_GROUP_USAGE_LIST6    0x1c26
-+
-+#define    RTL8367C_REG_IGMP_GROUP_USAGE_LIST7    0x1c27
-+
-+#define    RTL8367C_REG_IGMP_GROUP_USAGE_LIST8    0x1c28
-+
-+#define    RTL8367C_REG_IGMP_GROUP_USAGE_LIST9    0x1c29
-+
-+#define    RTL8367C_REG_IGMP_GROUP_USAGE_LIST10    0x1c2a
-+
-+#define    RTL8367C_REG_IGMP_GROUP_USAGE_LIST11    0x1c2b
-+
-+#define    RTL8367C_REG_IGMP_GROUP_USAGE_LIST12    0x1c2c
-+
-+#define    RTL8367C_REG_IGMP_GROUP_USAGE_LIST13    0x1c2d
-+
-+#define    RTL8367C_REG_IGMP_GROUP_USAGE_LIST14    0x1c2e
-+
-+#define    RTL8367C_REG_IGMP_GROUP_USAGE_LIST15    0x1c2f
-+
-+#define    RTL8367C_REG_EAV_CTRL0    0x1c30
-+#define    RTL8367C_EAV_CTRL0_OFFSET    0
-+#define    RTL8367C_EAV_CTRL0_MASK    0xFF
-+
-+#define    RTL8367C_REG_EAV_CTRL1    0x1c31
-+#define    RTL8367C_REMAP_EAV_PRI3_REGEN_OFFSET    9
-+#define    RTL8367C_REMAP_EAV_PRI3_REGEN_MASK    0xE00
-+#define    RTL8367C_REMAP_EAV_PRI2_REGEN_OFFSET    6
-+#define    RTL8367C_REMAP_EAV_PRI2_REGEN_MASK    0x1C0
-+#define    RTL8367C_REMAP_EAV_PRI1_REGEN_OFFSET    3
-+#define    RTL8367C_REMAP_EAV_PRI1_REGEN_MASK    0x38
-+#define    RTL8367C_REMAP_EAV_PRI0_REGEN_OFFSET    0
-+#define    RTL8367C_REMAP_EAV_PRI0_REGEN_MASK    0x7
-+
-+#define    RTL8367C_REG_EAV_CTRL2    0x1c32
-+#define    RTL8367C_REMAP_EAV_PRI7_REGEN_OFFSET    9
-+#define    RTL8367C_REMAP_EAV_PRI7_REGEN_MASK    0xE00
-+#define    RTL8367C_REMAP_EAV_PRI6_REGEN_OFFSET    6
-+#define    RTL8367C_REMAP_EAV_PRI6_REGEN_MASK    0x1C0
-+#define    RTL8367C_REMAP_EAV_PRI5_REGEN_OFFSET    3
-+#define    RTL8367C_REMAP_EAV_PRI5_REGEN_MASK    0x38
-+#define    RTL8367C_REMAP_EAV_PRI4_REGEN_OFFSET    0
-+#define    RTL8367C_REMAP_EAV_PRI4_REGEN_MASK    0x7
-+
-+#define    RTL8367C_REG_SYS_TIME_FREQ    0x1c43
-+
-+#define    RTL8367C_REG_SYS_TIME_OFFSET_L    0x1c44
-+
-+#define    RTL8367C_REG_SYS_TIME_OFFSET_H    0x1c45
-+
-+#define    RTL8367C_REG_SYS_TIME_OFFSET_512NS_L    0x1c46
-+
-+#define    RTL8367C_REG_SYS_TIME_OFFSET_512NS_H    0x1c47
-+#define    RTL8367C_SYS_TIME_OFFSET_TUNE_OFFSET    5
-+#define    RTL8367C_SYS_TIME_OFFSET_TUNE_MASK    0x20
-+#define    RTL8367C_SYS_TIME_OFFSET_512NS_H_SYS_TIME_OFFSET_512NS_OFFSET    0
-+#define    RTL8367C_SYS_TIME_OFFSET_512NS_H_SYS_TIME_OFFSET_512NS_MASK    0x1F
-+
-+#define    RTL8367C_REG_SYS_TIME_SEC_TRANSIT    0x1c48
-+#define    RTL8367C_SYS_TIME_SEC_TRANSIT_OFFSET    0
-+#define    RTL8367C_SYS_TIME_SEC_TRANSIT_MASK    0x1
-+
-+#define    RTL8367C_REG_SYS_TIME_SEC_HIGH_L    0x1c49
-+
-+#define    RTL8367C_REG_SYS_TIME_SEC_HIGH_H    0x1c4a
-+
-+#define    RTL8367C_REG_SYS_TIME_512NS_L    0x1c4b
-+
-+#define    RTL8367C_REG_SYS_TIME_512NS_H    0x1c4c
-+#define    RTL8367C_SYS_TIME_512NS_H_OFFSET    0
-+#define    RTL8367C_SYS_TIME_512NS_H_MASK    0x1F
-+
-+#define    RTL8367C_REG_FALLBACK_CTRL    0x1c70
-+#define    RTL8367C_FALLBACK_PL_DEC_EN_OFFSET    15
-+#define    RTL8367C_FALLBACK_PL_DEC_EN_MASK    0x8000
-+#define    RTL8367C_FALLBACK_MONITOR_TIMEOUT_IGNORE_OFFSET    14
-+#define    RTL8367C_FALLBACK_MONITOR_TIMEOUT_IGNORE_MASK    0x4000
-+#define    RTL8367C_FALLBACK_ERROR_RATIO_THRESHOLD_OFFSET    11
-+#define    RTL8367C_FALLBACK_ERROR_RATIO_THRESHOLD_MASK    0x3800
-+#define    RTL8367C_FALLBACK_MONITORMAX_OFFSET    8
-+#define    RTL8367C_FALLBACK_MONITORMAX_MASK    0x700
-+#define    RTL8367C_FALLBACK_MONITOR_TIMEOUT_OFFSET    0
-+#define    RTL8367C_FALLBACK_MONITOR_TIMEOUT_MASK    0xFF
-+
-+#define    RTL8367C_REG_FALLBACK_PORT0_CFG0    0x1c71
-+#define    RTL8367C_FALLBACK_PORT0_CFG0_RESET_POWER_LEVEL_OFFSET    15
-+#define    RTL8367C_FALLBACK_PORT0_CFG0_RESET_POWER_LEVEL_MASK    0x8000
-+#define    RTL8367C_FALLBACK_PORT0_CFG0_ENABLE_OFFSET    14
-+#define    RTL8367C_FALLBACK_PORT0_CFG0_ENABLE_MASK    0x4000
-+
-+#define    RTL8367C_REG_FALLBACK_PORT0_CFG1    0x1c72
-+
-+#define    RTL8367C_REG_FALLBACK_PORT0_CFG2    0x1c73
-+#define    RTL8367C_FALLBACK_PORT0_CFG2_OFFSET    0
-+#define    RTL8367C_FALLBACK_PORT0_CFG2_MASK    0xFFF
-+
-+#define    RTL8367C_REG_FALLBACK_PORT0_CFG3    0x1c74
-+#define    RTL8367C_FALLBACK_PORT0_CFG3_OFFSET    0
-+#define    RTL8367C_FALLBACK_PORT0_CFG3_MASK    0xFF
-+
-+#define    RTL8367C_REG_FALLBACK_PORT1_CFG0    0x1c75
-+#define    RTL8367C_FALLBACK_PORT1_CFG0_RESET_POWER_LEVEL_OFFSET    15
-+#define    RTL8367C_FALLBACK_PORT1_CFG0_RESET_POWER_LEVEL_MASK    0x8000
-+#define    RTL8367C_FALLBACK_PORT1_CFG0_ENABLE_OFFSET    14
-+#define    RTL8367C_FALLBACK_PORT1_CFG0_ENABLE_MASK    0x4000
-+
-+#define    RTL8367C_REG_FALLBACK_PORT1_CFG1    0x1c76
-+
-+#define    RTL8367C_REG_FALLBACK_PORT1_CFG2    0x1c77
-+#define    RTL8367C_FALLBACK_PORT1_CFG2_OFFSET    0
-+#define    RTL8367C_FALLBACK_PORT1_CFG2_MASK    0xFFF
-+
-+#define    RTL8367C_REG_FALLBACK_PORT1_CFG3    0x1c78
-+#define    RTL8367C_FALLBACK_PORT1_CFG3_OFFSET    0
-+#define    RTL8367C_FALLBACK_PORT1_CFG3_MASK    0xFF
-+
-+#define    RTL8367C_REG_FALLBACK_PORT2_CFG0    0x1c79
-+#define    RTL8367C_FALLBACK_PORT2_CFG0_RESET_POWER_LEVEL_OFFSET    15
-+#define    RTL8367C_FALLBACK_PORT2_CFG0_RESET_POWER_LEVEL_MASK    0x8000
-+#define    RTL8367C_FALLBACK_PORT2_CFG0_ENABLE_OFFSET    14
-+#define    RTL8367C_FALLBACK_PORT2_CFG0_ENABLE_MASK    0x4000
-+
-+#define    RTL8367C_REG_FALLBACK_PORT2_CFG1    0x1c7a
-+
-+#define    RTL8367C_REG_FALLBACK_PORT2_CFG2    0x1c7b
-+#define    RTL8367C_FALLBACK_PORT2_CFG2_OFFSET    0
-+#define    RTL8367C_FALLBACK_PORT2_CFG2_MASK    0xFFF
-+
-+#define    RTL8367C_REG_FALLBACK_PORT2_CFG3    0x1c7c
-+#define    RTL8367C_FALLBACK_PORT2_CFG3_OFFSET    0
-+#define    RTL8367C_FALLBACK_PORT2_CFG3_MASK    0xFF
-+
-+#define    RTL8367C_REG_FALLBACK_PORT3_CFG0    0x1c7d
-+#define    RTL8367C_FALLBACK_PORT3_CFG0_RESET_POWER_LEVEL_OFFSET    15
-+#define    RTL8367C_FALLBACK_PORT3_CFG0_RESET_POWER_LEVEL_MASK    0x8000
-+#define    RTL8367C_FALLBACK_PORT3_CFG0_ENABLE_OFFSET    14
-+#define    RTL8367C_FALLBACK_PORT3_CFG0_ENABLE_MASK    0x4000
-+
-+#define    RTL8367C_REG_FALLBACK_PORT3_CFG1    0x1c7e
-+
-+#define    RTL8367C_REG_FALLBACK_PORT3_CFG2    0x1c7f
-+#define    RTL8367C_FALLBACK_PORT3_CFG2_OFFSET    0
-+#define    RTL8367C_FALLBACK_PORT3_CFG2_MASK    0xFFF
-+
-+#define    RTL8367C_REG_FALLBACK_PORT3_CFG3    0x1c80
-+#define    RTL8367C_FALLBACK_PORT3_CFG3_OFFSET    0
-+#define    RTL8367C_FALLBACK_PORT3_CFG3_MASK    0xFF
-+
-+#define    RTL8367C_REG_FALLBACK_PORT4_CFG0    0x1c81
-+#define    RTL8367C_FALLBACK_PORT4_CFG0_RESET_POWER_LEVEL_OFFSET    15
-+#define    RTL8367C_FALLBACK_PORT4_CFG0_RESET_POWER_LEVEL_MASK    0x8000
-+#define    RTL8367C_FALLBACK_PORT4_CFG0_ENABLE_OFFSET    14
-+#define    RTL8367C_FALLBACK_PORT4_CFG0_ENABLE_MASK    0x4000
-+
-+#define    RTL8367C_REG_FALLBACK_PORT4_CFG1    0x1c82
-+
-+#define    RTL8367C_REG_FALLBACK_PORT4_CFG2    0x1c83
-+#define    RTL8367C_FALLBACK_PORT4_CFG2_OFFSET    0
-+#define    RTL8367C_FALLBACK_PORT4_CFG2_MASK    0xFFF
-+
-+#define    RTL8367C_REG_FALLBACK_PORT4_CFG3    0x1c84
-+#define    RTL8367C_FALLBACK_PORT4_CFG3_OFFSET    0
-+#define    RTL8367C_FALLBACK_PORT4_CFG3_MASK    0xFF
-+
-+#define    RTL8367C_REG_FALLBACK_CTRL1    0x1c85
-+#define    RTL8367C_FALLBACK_VALIDFLOW_OFFSET    8
-+#define    RTL8367C_FALLBACK_VALIDFLOW_MASK    0xFF00
-+#define    RTL8367C_FALLBACK_STOP_TMR_OFFSET    0
-+#define    RTL8367C_FALLBACK_STOP_TMR_MASK    0x1
-+
-+#define    RTL8367C_REG_FALLBACK_CPL    0x1c86
-+#define    RTL8367C_PORT4_CPL_OFFSET    4
-+#define    RTL8367C_PORT4_CPL_MASK    0x10
-+#define    RTL8367C_PORT3_CPL_OFFSET    3
-+#define    RTL8367C_PORT3_CPL_MASK    0x8
-+#define    RTL8367C_PORT2_CPL_OFFSET    2
-+#define    RTL8367C_PORT2_CPL_MASK    0x4
-+#define    RTL8367C_PORT1_CPL_OFFSET    1
-+#define    RTL8367C_PORT1_CPL_MASK    0x2
-+#define    RTL8367C_PORT0_CPL_OFFSET    0
-+#define    RTL8367C_PORT0_CPL_MASK    0x1
-+
-+#define    RTL8367C_REG_FALLBACK_PHY_PAGE    0x1c87
-+#define    RTL8367C_FALLBACK_PHY_PAGE_OFFSET    0
-+#define    RTL8367C_FALLBACK_PHY_PAGE_MASK    0xFFF
-+
-+#define    RTL8367C_REG_FALLBACK_PHY_REG    0x1c88
-+#define    RTL8367C_FALLBACK_PHY_REG_OFFSET    0
-+#define    RTL8367C_FALLBACK_PHY_REG_MASK    0x1F
-+
-+#define    RTL8367C_REG_AFBK_INFO_X0    0x1c89
-+
-+#define    RTL8367C_REG_AFBK_INFO_X1    0x1c8a
-+
-+#define    RTL8367C_REG_AFBK_INFO_X2    0x1c8b
-+
-+#define    RTL8367C_REG_AFBK_INFO_X3    0x1c8c
-+
-+#define    RTL8367C_REG_AFBK_INFO_X4    0x1c8d
-+
-+#define    RTL8367C_REG_AFBK_INFO_X5    0x1c8e
-+
-+#define    RTL8367C_REG_AFBK_INFO_X6    0x1c8f
-+
-+#define    RTL8367C_REG_AFBK_INFO_X7    0x1c90
-+
-+#define    RTL8367C_REG_AFBK_INFO_X8    0x1c91
-+
-+#define    RTL8367C_REG_AFBK_INFO_X9    0x1c92
-+
-+#define    RTL8367C_REG_AFBK_INFO_X10    0x1c93
-+
-+#define    RTL8367C_REG_AFBK_INFO_X11    0x1c94
-+
-+#define    RTL8367C_REG_FALLBACK_PORT5_CFG0    0x1ca0
-+#define    RTL8367C_FALLBACK_PORT5_CFG0_RESET_POWER_LEVEL_OFFSET    15
-+#define    RTL8367C_FALLBACK_PORT5_CFG0_RESET_POWER_LEVEL_MASK    0x8000
-+#define    RTL8367C_FALLBACK_PORT5_CFG0_ENABLE_OFFSET    14
-+#define    RTL8367C_FALLBACK_PORT5_CFG0_ENABLE_MASK    0x4000
-+
-+#define    RTL8367C_REG_FALLBACK_PORT5_CFG1    0x1ca1
-+
-+#define    RTL8367C_REG_FALLBACK_PORT5_CFG2    0x1ca2
-+#define    RTL8367C_FALLBACK_PORT5_CFG2_OFFSET    0
-+#define    RTL8367C_FALLBACK_PORT5_CFG2_MASK    0xFFF
-+
-+#define    RTL8367C_REG_FALLBACK_PORT5_CFG3    0x1ca3
-+#define    RTL8367C_FALLBACK_PORT5_CFG3_OFFSET    0
-+#define    RTL8367C_FALLBACK_PORT5_CFG3_MASK    0xFF
-+
-+#define    RTL8367C_REG_FALLBACK_PORT6_CFG0    0x1ca4
-+#define    RTL8367C_FALLBACK_PORT6_CFG0_RESET_POWER_LEVEL_OFFSET    15
-+#define    RTL8367C_FALLBACK_PORT6_CFG0_RESET_POWER_LEVEL_MASK    0x8000
-+#define    RTL8367C_FALLBACK_PORT6_CFG0_ENABLE_OFFSET    14
-+#define    RTL8367C_FALLBACK_PORT6_CFG0_ENABLE_MASK    0x4000
-+
-+#define    RTL8367C_REG_FALLBACK_PORT6_CFG1    0x1ca5
-+
-+#define    RTL8367C_REG_FALLBACK_PORT6_CFG2    0x1ca6
-+#define    RTL8367C_FALLBACK_PORT6_CFG2_OFFSET    0
-+#define    RTL8367C_FALLBACK_PORT6_CFG2_MASK    0xFFF
-+
-+#define    RTL8367C_REG_FALLBACK_PORT6_CFG3    0x1ca7
-+#define    RTL8367C_FALLBACK_PORT6_CFG3_OFFSET    0
-+#define    RTL8367C_FALLBACK_PORT6_CFG3_MASK    0xFF
-+
-+#define    RTL8367C_REG_FALLBACK_PORT7_CFG0    0x1ca8
-+#define    RTL8367C_FALLBACK_PORT7_CFG0_RESET_POWER_LEVEL_OFFSET    15
-+#define    RTL8367C_FALLBACK_PORT7_CFG0_RESET_POWER_LEVEL_MASK    0x8000
-+#define    RTL8367C_FALLBACK_PORT7_CFG0_ENABLE_OFFSET    14
-+#define    RTL8367C_FALLBACK_PORT7_CFG0_ENABLE_MASK    0x4000
-+
-+#define    RTL8367C_REG_FALLBACK_PORT7_CFG1    0x1ca9
-+
-+#define    RTL8367C_REG_FALLBACK_PORT7_CFG2    0x1caa
-+#define    RTL8367C_FALLBACK_PORT7_CFG2_OFFSET    0
-+#define    RTL8367C_FALLBACK_PORT7_CFG2_MASK    0xFFF
-+
-+#define    RTL8367C_REG_FALLBACK_PORT7_CFG3    0x1cab
-+#define    RTL8367C_FALLBACK_PORT7_CFG3_OFFSET    0
-+#define    RTL8367C_FALLBACK_PORT7_CFG3_MASK    0xFF
-+
-+#define    RTL8367C_REG_IGMP_PORT8_CONTROL    0x1cb0
-+#define    RTL8367C_IGMP_PORT8_CONTROL_ALLOW_QUERY_OFFSET    14
-+#define    RTL8367C_IGMP_PORT8_CONTROL_ALLOW_QUERY_MASK    0x4000
-+#define    RTL8367C_IGMP_PORT8_CONTROL_ALLOW_REPORT_OFFSET    13
-+#define    RTL8367C_IGMP_PORT8_CONTROL_ALLOW_REPORT_MASK    0x2000
-+#define    RTL8367C_IGMP_PORT8_CONTROL_ALLOW_LEAVE_OFFSET    12
-+#define    RTL8367C_IGMP_PORT8_CONTROL_ALLOW_LEAVE_MASK    0x1000
-+#define    RTL8367C_IGMP_PORT8_CONTROL_ALLOW_MRP_OFFSET    11
-+#define    RTL8367C_IGMP_PORT8_CONTROL_ALLOW_MRP_MASK    0x800
-+#define    RTL8367C_IGMP_PORT8_CONTROL_ALLOW_MC_DATA_OFFSET    10
-+#define    RTL8367C_IGMP_PORT8_CONTROL_ALLOW_MC_DATA_MASK    0x400
-+#define    RTL8367C_IGMP_PORT8_CONTROL_MLDv2_OP_OFFSET    8
-+#define    RTL8367C_IGMP_PORT8_CONTROL_MLDv2_OP_MASK    0x300
-+#define    RTL8367C_IGMP_PORT8_CONTROL_MLDv1_OP_OFFSET    6
-+#define    RTL8367C_IGMP_PORT8_CONTROL_MLDv1_OP_MASK    0xC0
-+#define    RTL8367C_IGMP_PORT8_CONTROL_IGMPV3_OP_OFFSET    4
-+#define    RTL8367C_IGMP_PORT8_CONTROL_IGMPV3_OP_MASK    0x30
-+#define    RTL8367C_IGMP_PORT8_CONTROL_IGMPV2_OP_OFFSET    2
-+#define    RTL8367C_IGMP_PORT8_CONTROL_IGMPV2_OP_MASK    0xC
-+#define    RTL8367C_IGMP_PORT8_CONTROL_IGMPV1_OP_OFFSET    0
-+#define    RTL8367C_IGMP_PORT8_CONTROL_IGMPV1_OP_MASK    0x3
-+
-+#define    RTL8367C_REG_IGMP_PORT9_CONTROL    0x1cb1
-+#define    RTL8367C_IGMP_PORT9_CONTROL_ALLOW_QUERY_OFFSET    14
-+#define    RTL8367C_IGMP_PORT9_CONTROL_ALLOW_QUERY_MASK    0x4000
-+#define    RTL8367C_IGMP_PORT9_CONTROL_ALLOW_REPORT_OFFSET    13
-+#define    RTL8367C_IGMP_PORT9_CONTROL_ALLOW_REPORT_MASK    0x2000
-+#define    RTL8367C_IGMP_PORT9_CONTROL_ALLOW_LEAVE_OFFSET    12
-+#define    RTL8367C_IGMP_PORT9_CONTROL_ALLOW_LEAVE_MASK    0x1000
-+#define    RTL8367C_IGMP_PORT9_CONTROL_ALLOW_MRP_OFFSET    11
-+#define    RTL8367C_IGMP_PORT9_CONTROL_ALLOW_MRP_MASK    0x800
-+#define    RTL8367C_IGMP_PORT9_CONTROL_ALLOW_MC_DATA_OFFSET    10
-+#define    RTL8367C_IGMP_PORT9_CONTROL_ALLOW_MC_DATA_MASK    0x400
-+#define    RTL8367C_IGMP_PORT9_CONTROL_MLDv2_OP_OFFSET    8
-+#define    RTL8367C_IGMP_PORT9_CONTROL_MLDv2_OP_MASK    0x300
-+#define    RTL8367C_IGMP_PORT9_CONTROL_MLDv1_OP_OFFSET    6
-+#define    RTL8367C_IGMP_PORT9_CONTROL_MLDv1_OP_MASK    0xC0
-+#define    RTL8367C_IGMP_PORT9_CONTROL_IGMPV3_OP_OFFSET    4
-+#define    RTL8367C_IGMP_PORT9_CONTROL_IGMPV3_OP_MASK    0x30
-+#define    RTL8367C_IGMP_PORT9_CONTROL_IGMPV2_OP_OFFSET    2
-+#define    RTL8367C_IGMP_PORT9_CONTROL_IGMPV2_OP_MASK    0xC
-+#define    RTL8367C_IGMP_PORT9_CONTROL_IGMPV1_OP_OFFSET    0
-+#define    RTL8367C_IGMP_PORT9_CONTROL_IGMPV1_OP_MASK    0x3
-+
-+#define    RTL8367C_REG_IGMP_PORT10_CONTROL    0x1cb2
-+#define    RTL8367C_IGMP_PORT10_CONTROL_ALLOW_QUERY_OFFSET    14
-+#define    RTL8367C_IGMP_PORT10_CONTROL_ALLOW_QUERY_MASK    0x4000
-+#define    RTL8367C_IGMP_PORT10_CONTROL_ALLOW_REPORT_OFFSET    13
-+#define    RTL8367C_IGMP_PORT10_CONTROL_ALLOW_REPORT_MASK    0x2000
-+#define    RTL8367C_IGMP_PORT10_CONTROL_ALLOW_LEAVE_OFFSET    12
-+#define    RTL8367C_IGMP_PORT10_CONTROL_ALLOW_LEAVE_MASK    0x1000
-+#define    RTL8367C_IGMP_PORT10_CONTROL_ALLOW_MRP_OFFSET    11
-+#define    RTL8367C_IGMP_PORT10_CONTROL_ALLOW_MRP_MASK    0x800
-+#define    RTL8367C_IGMP_PORT10_CONTROL_ALLOW_MC_DATA_OFFSET    10
-+#define    RTL8367C_IGMP_PORT10_CONTROL_ALLOW_MC_DATA_MASK    0x400
-+#define    RTL8367C_IGMP_PORT10_CONTROL_MLDv2_OP_OFFSET    8
-+#define    RTL8367C_IGMP_PORT10_CONTROL_MLDv2_OP_MASK    0x300
-+#define    RTL8367C_IGMP_PORT10_CONTROL_MLDv1_OP_OFFSET    6
-+#define    RTL8367C_IGMP_PORT10_CONTROL_MLDv1_OP_MASK    0xC0
-+#define    RTL8367C_IGMP_PORT10_CONTROL_IGMPV3_OP_OFFSET    4
-+#define    RTL8367C_IGMP_PORT10_CONTROL_IGMPV3_OP_MASK    0x30
-+#define    RTL8367C_IGMP_PORT10_CONTROL_IGMPV2_OP_OFFSET    2
-+#define    RTL8367C_IGMP_PORT10_CONTROL_IGMPV2_OP_MASK    0xC
-+#define    RTL8367C_IGMP_PORT10_CONTROL_IGMPV1_OP_OFFSET    0
-+#define    RTL8367C_IGMP_PORT10_CONTROL_IGMPV1_OP_MASK    0x3
-+
-+#define    RTL8367C_REG_IGMP_PORT89_MAX_GROUP    0x1cb3
-+#define    RTL8367C_PORT9_MAX_GROUP_OFFSET    8
-+#define    RTL8367C_PORT9_MAX_GROUP_MASK    0xFF00
-+#define    RTL8367C_PORT8_MAX_GROUP_OFFSET    0
-+#define    RTL8367C_PORT8_MAX_GROUP_MASK    0xFF
-+
-+#define    RTL8367C_REG_IGMP_PORT10_MAX_GROUP    0x1cb4
-+#define    RTL8367C_IGMP_PORT10_MAX_GROUP_OFFSET    0
-+#define    RTL8367C_IGMP_PORT10_MAX_GROUP_MASK    0xFF
-+
-+#define    RTL8367C_REG_IGMP_PORT89_CURRENT_GROUP    0x1cb5
-+#define    RTL8367C_PORT9_CURRENT_GROUP_OFFSET    8
-+#define    RTL8367C_PORT9_CURRENT_GROUP_MASK    0xFF00
-+#define    RTL8367C_PORT8_CURRENT_GROUP_OFFSET    0
-+#define    RTL8367C_PORT8_CURRENT_GROUP_MASK    0xFF
-+
-+#define    RTL8367C_REG_IGMP_PORT10_CURRENT_GROUP    0x1cb6
-+#define    RTL8367C_IGMP_PORT10_CURRENT_GROUP_OFFSET    0
-+#define    RTL8367C_IGMP_PORT10_CURRENT_GROUP_MASK    0xFF
-+
-+#define    RTL8367C_REG_IGMP_L3_CHECKSUM_CHECK    0x1cb7
-+#define    RTL8367C_IGMP_L3_CHECKSUM_CHECK_OFFSET    0
-+#define    RTL8367C_IGMP_L3_CHECKSUM_CHECK_MASK    0x1
-+
-+/* (16'h1d00)chip_70b_reg */
-+
-+#define    RTL8367C_REG_PCSXF_CFG    0x1d00
-+#define    RTL8367C_PCSXF_CFG_Reserved_OFFSET    15
-+#define    RTL8367C_PCSXF_CFG_Reserved_MASK    0x8000
-+#define    RTL8367C_CFG_RST_RXFIFO_P7_5_OFFSET    12
-+#define    RTL8367C_CFG_RST_RXFIFO_P7_5_MASK    0x7000
-+#define    RTL8367C_CFG_PCSXF_OFFSET    8
-+#define    RTL8367C_CFG_PCSXF_MASK    0xF00
-+#define    RTL8367C_CFG_RST_RXFIFO_OFFSET    3
-+#define    RTL8367C_CFG_RST_RXFIFO_MASK    0xF8
-+#define    RTL8367C_CFG_COL2RXDV_OFFSET    2
-+#define    RTL8367C_CFG_COL2RXDV_MASK    0x4
-+#define    RTL8367C_CFG_PHY_SDET_OFFSET    0
-+#define    RTL8367C_CFG_PHY_SDET_MASK    0x3
-+
-+#define    RTL8367C_REG_PHYID_CFG0    0x1d01
-+#define    RTL8367C_CFG_PHY_BRD_MODE_P7_5_OFFSET    11
-+#define    RTL8367C_CFG_PHY_BRD_MODE_P7_5_MASK    0x3800
-+#define    RTL8367C_CFG_PHYAD_14C_OFFSET    10
-+#define    RTL8367C_CFG_PHYAD_14C_MASK    0x400
-+#define    RTL8367C_CFG_PHY_BRD_MODE_OFFSET    5
-+#define    RTL8367C_CFG_PHY_BRD_MODE_MASK    0x3E0
-+#define    RTL8367C_CFG_BRD_PHYAD_OFFSET    0
-+#define    RTL8367C_CFG_BRD_PHYAD_MASK    0x1F
-+
-+#define    RTL8367C_REG_PHYID_CFG1    0x1d02
-+#define    RTL8367C_CFG_MSK_MDI_OFFSET    5
-+#define    RTL8367C_CFG_MSK_MDI_MASK    0x1FE0
-+#define    RTL8367C_CFG_BASE_PHYAD_OFFSET    0
-+#define    RTL8367C_CFG_BASE_PHYAD_MASK    0x1F
-+
-+#define    RTL8367C_REG_PHY_POLL_CFG0    0x1d03
-+#define    RTL8367C_CFG_HOTCMD_PRD_EN_OFFSET    15
-+#define    RTL8367C_CFG_HOTCMD_PRD_EN_MASK    0x8000
-+#define    RTL8367C_CFG_HOTCMD_EN_OFFSET    12
-+#define    RTL8367C_CFG_HOTCMD_EN_MASK    0x7000
-+#define    RTL8367C_CFG_POLL_PERIOD_OFFSET    8
-+#define    RTL8367C_CFG_POLL_PERIOD_MASK    0xF00
-+#define    RTL8367C_CFG_PERI_CMDS_RD_OFFSET    4
-+#define    RTL8367C_CFG_PERI_CMDS_RD_MASK    0xF0
-+#define    RTL8367C_CFG_PERI_CMDS_WR_OFFSET    0
-+#define    RTL8367C_CFG_PERI_CMDS_WR_MASK    0xF
-+
-+#define    RTL8367C_REG_PHY_POLL_CFG1    0x1d04
-+
-+#define    RTL8367C_REG_PHY_POLL_CFG2    0x1d05
-+
-+#define    RTL8367C_REG_PHY_POLL_CFG3    0x1d06
-+
-+#define    RTL8367C_REG_PHY_POLL_CFG4    0x1d07
-+
-+#define    RTL8367C_REG_PHY_POLL_CFG5    0x1d08
-+
-+#define    RTL8367C_REG_PHY_POLL_CFG6    0x1d09
-+
-+#define    RTL8367C_REG_PHY_POLL_CFG7    0x1d0a
-+
-+#define    RTL8367C_REG_PHY_POLL_CFG8    0x1d0b
-+
-+#define    RTL8367C_REG_PHY_POLL_CFG9    0x1d0c
-+
-+#define    RTL8367C_REG_PHY_POLL_CFG10    0x1d0d
-+
-+#define    RTL8367C_REG_PHY_POLL_CFG11    0x1d0e
-+
-+#define    RTL8367C_REG_PHY_POLL_CFG12    0x1d0f
-+
-+#define    RTL8367C_REG_EFUSE_MISC    0x1d10
-+#define    RTL8367C_CFG_SA_SEL_OFFSET    5
-+#define    RTL8367C_CFG_SA_SEL_MASK    0x20
-+#define    RTL8367C_CFG_PHYAD00_OFFSET    0
-+#define    RTL8367C_CFG_PHYAD00_MASK    0x1F
-+
-+#define    RTL8367C_REG_SDS_MISC    0x1d11
-+#define    RTL8367C_CFG_SGMII_RXFC_OFFSET    14
-+#define    RTL8367C_CFG_SGMII_RXFC_MASK    0x4000
-+#define    RTL8367C_CFG_SGMII_TXFC_OFFSET    13
-+#define    RTL8367C_CFG_SGMII_TXFC_MASK    0x2000
-+#define    RTL8367C_INB_ARB_OFFSET    12
-+#define    RTL8367C_INB_ARB_MASK    0x1000
-+#define    RTL8367C_CFG_MAC8_SEL_HSGMII_OFFSET    11
-+#define    RTL8367C_CFG_MAC8_SEL_HSGMII_MASK    0x800
-+#define    RTL8367C_CFG_SGMII_FDUP_OFFSET    10
-+#define    RTL8367C_CFG_SGMII_FDUP_MASK    0x400
-+#define    RTL8367C_CFG_SGMII_LINK_OFFSET    9
-+#define    RTL8367C_CFG_SGMII_LINK_MASK    0x200
-+#define    RTL8367C_CFG_SGMII_SPD_OFFSET    7
-+#define    RTL8367C_CFG_SGMII_SPD_MASK    0x180
-+#define    RTL8367C_CFG_MAC8_SEL_SGMII_OFFSET    6
-+#define    RTL8367C_CFG_MAC8_SEL_SGMII_MASK    0x40
-+#define    RTL8367C_CFG_INB_SEL_OFFSET    3
-+#define    RTL8367C_CFG_INB_SEL_MASK    0x38
-+#define    RTL8367C_CFG_SDS_MODE_18C_OFFSET    0
-+#define    RTL8367C_CFG_SDS_MODE_18C_MASK    0x7
-+
-+#define    RTL8367C_REG_FIFO_CTRL    0x1d12
-+#define    RTL8367C_CFG_LINK_DOWN_CLR_FIFO_OFFSET    11
-+#define    RTL8367C_CFG_LINK_DOWN_CLR_FIFO_MASK    0x800
-+#define    RTL8367C_CFG_LPBK_OFFSET    10
-+#define    RTL8367C_CFG_LPBK_MASK    0x400
-+#define    RTL8367C_CFG_NOT_FF_OUT_OFFSET    9
-+#define    RTL8367C_CFG_NOT_FF_OUT_MASK    0x200
-+#define    RTL8367C_CFG_WATER_LEVEL_FD_OFFSET    6
-+#define    RTL8367C_CFG_WATER_LEVEL_FD_MASK    0x1C0
-+#define    RTL8367C_CFG_WATER_LEVEL_Y2X_OFFSET    3
-+#define    RTL8367C_CFG_WATER_LEVEL_Y2X_MASK    0x38
-+#define    RTL8367C_CFG_WATER_LEVEL_X2Y_OFFSET    0
-+#define    RTL8367C_CFG_WATER_LEVEL_X2Y_MASK    0x7
-+
-+#define    RTL8367C_REG_BCAM_SETTING    0x1d13
-+#define    RTL8367C_CFG_BCAM_MDS_OFFSET    3
-+#define    RTL8367C_CFG_BCAM_MDS_MASK    0x18
-+#define    RTL8367C_CFG_BCAM_RDS_OFFSET    0
-+#define    RTL8367C_CFG_BCAM_RDS_MASK    0x7
-+
-+#define    RTL8367C_REG_GPHY_ACS_MISC    0x1d14
-+#define    RTL8367C_CFG_SEL_GPHY_SMI_OFFSET    3
-+#define    RTL8367C_CFG_SEL_GPHY_SMI_MASK    0x8
-+#define    RTL8367C_CFG_BRD_PHYIDX_OFFSET    0
-+#define    RTL8367C_CFG_BRD_PHYIDX_MASK    0x7
-+
-+#define    RTL8367C_REG_GPHY_OCP_MSB_0    0x1d15
-+#define    RTL8367C_CFG_CPU_OCPADR_MSB_OFFSET    6
-+#define    RTL8367C_CFG_CPU_OCPADR_MSB_MASK    0xFC0
-+#define    RTL8367C_CFG_DW8051_OCPADR_MSB_OFFSET    0
-+#define    RTL8367C_CFG_DW8051_OCPADR_MSB_MASK    0x3F
-+
-+#define    RTL8367C_REG_GPHY_OCP_MSB_1    0x1d16
-+#define    RTL8367C_CFG_PATCH_OCPADR_MSB_OFFSET    6
-+#define    RTL8367C_CFG_PATCH_OCPADR_MSB_MASK    0xFC0
-+#define    RTL8367C_CFG_PHYSTS_OCPADR_MSB_OFFSET    0
-+#define    RTL8367C_CFG_PHYSTS_OCPADR_MSB_MASK    0x3F
-+
-+#define    RTL8367C_REG_GPHY_OCP_MSB_2    0x1d17
-+#define    RTL8367C_CFG_RRCP_OCPADR_MSB_OFFSET    6
-+#define    RTL8367C_CFG_RRCP_OCPADR_MSB_MASK    0xFC0
-+#define    RTL8367C_CFG_RTCT_OCPADR_MSB_OFFSET    0
-+#define    RTL8367C_CFG_RTCT_OCPADR_MSB_MASK    0x3F
-+
-+#define    RTL8367C_REG_GPHY_OCP_MSB_3    0x1d18
-+#define    RTL8367C_GPHY_OCP_MSB_3_OFFSET    0
-+#define    RTL8367C_GPHY_OCP_MSB_3_MASK    0x3F
-+
-+#define    RTL8367C_REG_GPIO_67C_I_X0    0x1d19
-+
-+#define    RTL8367C_REG_GPIO_67C_I_X1    0x1d1a
-+
-+#define    RTL8367C_REG_GPIO_67C_I_X2    0x1d1b
-+
-+#define    RTL8367C_REG_GPIO_67C_I_X3    0x1d1c
-+#define    RTL8367C_GPIO_67C_I_X3_OFFSET    0
-+#define    RTL8367C_GPIO_67C_I_X3_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_GPIO_67C_O_X0    0x1d1d
-+
-+#define    RTL8367C_REG_GPIO_67C_O_X1    0x1d1e
-+
-+#define    RTL8367C_REG_GPIO_67C_O_X2    0x1d1f
-+
-+#define    RTL8367C_REG_GPIO_67C_O_X3    0x1d20
-+#define    RTL8367C_GPIO_67C_O_X3_OFFSET    0
-+#define    RTL8367C_GPIO_67C_O_X3_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_GPIO_67C_OE_X0    0x1d21
-+
-+#define    RTL8367C_REG_GPIO_67C_OE_X1    0x1d22
-+
-+#define    RTL8367C_REG_GPIO_67C_OE_X2    0x1d23
-+
-+#define    RTL8367C_REG_GPIO_67C_OE_X3    0x1d24
-+#define    RTL8367C_GPIO_67C_OE_X3_OFFSET    0
-+#define    RTL8367C_GPIO_67C_OE_X3_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_GPIO_MODE_67C_X0    0x1d25
-+
-+#define    RTL8367C_REG_GPIO_MODE_67C_X1    0x1d26
-+
-+#define    RTL8367C_REG_GPIO_MODE_67C_X2    0x1d27
-+
-+#define    RTL8367C_REG_GPIO_MODE_67C_X3    0x1d28
-+#define    RTL8367C_GPIO_MODE_67C_X3_OFFSET    0
-+#define    RTL8367C_GPIO_MODE_67C_X3_MASK    0x3FFF
-+
-+#define    RTL8367C_REG_WGPHY_MISC_0    0x1d29
-+#define    RTL8367C_CFG_INIPHY_DISGIGA_P7_5_OFFSET    13
-+#define    RTL8367C_CFG_INIPHY_DISGIGA_P7_5_MASK    0xE000
-+#define    RTL8367C_CFG_INIPHY_PWRUP_OFFSET    5
-+#define    RTL8367C_CFG_INIPHY_PWRUP_MASK    0x1FE0
-+#define    RTL8367C_CFG_INIPHY_DISGIGA_OFFSET    0
-+#define    RTL8367C_CFG_INIPHY_DISGIGA_MASK    0x1F
-+
-+#define    RTL8367C_REG_WGPHY_MISC_1    0x1d2a
-+#define    RTL8367C_WGPHY_MISC_1_OFFSET    0
-+#define    RTL8367C_WGPHY_MISC_1_MASK    0xFF
-+
-+#define    RTL8367C_REG_WGPHY_MISC_2    0x1d2b
-+#define    RTL8367C_WGPHY_MISC_2_OFFSET    0
-+#define    RTL8367C_WGPHY_MISC_2_MASK    0x3FF
-+
-+#define    RTL8367C_REG_CFG_AFBK_GPHY_0    0x1d2c
-+#define    RTL8367C_CFG_AFBK_GPHY_0_OFFSET    0
-+#define    RTL8367C_CFG_AFBK_GPHY_0_MASK    0x1F
-+
-+#define    RTL8367C_REG_CFG_AFBK_GPHY_1    0x1d2d
-+#define    RTL8367C_CFG_AFBK_GPHY_1_OFFSET    0
-+#define    RTL8367C_CFG_AFBK_GPHY_1_MASK    0xFFF
-+
-+#define    RTL8367C_REG_EF_SLV_CTRL_0    0x1d2e
-+#define    RTL8367C_EF_SLV_BUSY_OFFSET    11
-+#define    RTL8367C_EF_SLV_BUSY_MASK    0x800
-+#define    RTL8367C_EF_SLV_ACK_OFFSET    10
-+#define    RTL8367C_EF_SLV_ACK_MASK    0x400
-+#define    RTL8367C_EF_SLV_A_OFFSET    2
-+#define    RTL8367C_EF_SLV_A_MASK    0x3FC
-+#define    RTL8367C_EF_SLV_WE_OFFSET    1
-+#define    RTL8367C_EF_SLV_WE_MASK    0x2
-+#define    RTL8367C_EF_SLV_CE_OFFSET    0
-+#define    RTL8367C_EF_SLV_CE_MASK    0x1
-+
-+#define    RTL8367C_REG_EF_SLV_CTRL_1    0x1d2f
-+
-+#define    RTL8367C_REG_EF_SLV_CTRL_2    0x1d30
-+
-+#define    RTL8367C_REG_EFUSE_MISC_1    0x1d31
-+#define    RTL8367C_EF_EN_EFUSE_OFFSET    10
-+#define    RTL8367C_EF_EN_EFUSE_MASK    0x400
-+#define    RTL8367C_EF_MODEL_ID_OFFSET    6
-+#define    RTL8367C_EF_MODEL_ID_MASK    0x3C0
-+#define    RTL8367C_EF_RSVD_OFFSET    2
-+#define    RTL8367C_EF_RSVD_MASK    0x3C
-+#define    RTL8367C_EF_SYS_CLK_OFFSET    0
-+#define    RTL8367C_EF_SYS_CLK_MASK    0x3
-+
-+#define    RTL8367C_REG_IO_MISC_FUNC    0x1d32
-+#define    RTL8367C_TST_MODE_OFFSET    3
-+#define    RTL8367C_TST_MODE_MASK    0x8
-+#define    RTL8367C_UART_EN_OFFSET    2
-+#define    RTL8367C_UART_EN_MASK    0x4
-+#define    RTL8367C_INT_EN_OFFSET    1
-+#define    RTL8367C_INT_EN_MASK    0x2
-+#define    RTL8367C_BUZ_EN_OFFSET    0
-+#define    RTL8367C_BUZ_EN_MASK    0x1
-+
-+#define    RTL8367C_REG_HTRAM_DVS    0x1d33
-+#define    RTL8367C_HTRAM_DVS_OFFSET    0
-+#define    RTL8367C_HTRAM_DVS_MASK    0x1
-+
-+#define    RTL8367C_REG_EF_SLV_CTRL_3    0x1d34
-+#define    RTL8367C_EF_SLV_CTRL_3_OFFSET    0
-+#define    RTL8367C_EF_SLV_CTRL_3_MASK    0x1
-+
-+#define    RTL8367C_REG_INBAND_EN14C    0x1d35
-+#define    RTL8367C_INBAND_EN14C_OFFSET    0
-+#define    RTL8367C_INBAND_EN14C_MASK    0x1
-+
-+#define    RTL8367C_REG_CFG_SWR_L    0x1d36
-+#define    RTL8367C_ANARG_RDY_SWR_L_OFFSET    14
-+#define    RTL8367C_ANARG_RDY_SWR_L_MASK    0x4000
-+#define    RTL8367C_ANARG_VALID_SWR_L_OFFSET    13
-+#define    RTL8367C_ANARG_VALID_SWR_L_MASK    0x2000
-+#define    RTL8367C_SAW_SWR_L_OFFSET    9
-+#define    RTL8367C_SAW_SWR_L_MASK    0x1E00
-+#define    RTL8367C_SAW_VALID_SWR_L_OFFSET    8
-+#define    RTL8367C_SAW_VALID_SWR_L_MASK    0x100
-+#define    RTL8367C_UPS_DBGO_L_OFFSET    0
-+#define    RTL8367C_UPS_DBGO_L_MASK    0xFF
-+
-+#define    RTL8367C_REG_BTCAM_CTRL    0x1d37
-+#define    RTL8367C_TCAM_RDS_OFFSET    2
-+#define    RTL8367C_TCAM_RDS_MASK    0x1C
-+#define    RTL8367C_TCAM_MDS_OFFSET    0
-+#define    RTL8367C_TCAM_MDS_MASK    0x3
-+
-+#define    RTL8367C_REG_PBRAM_BISR_CTRL    0x1d38
-+#define    RTL8367C_HAS_HLDRMP_MD_OFFSET    9
-+#define    RTL8367C_HAS_HLDRMP_MD_MASK    0x200
-+#define    RTL8367C_PB_HLDRMP_MD_OFFSET    8
-+#define    RTL8367C_PB_HLDRMP_MD_MASK    0x100
-+#define    RTL8367C_HAS_BISR_BIRSTN_OFFSET    7
-+#define    RTL8367C_HAS_BISR_BIRSTN_MASK    0x80
-+#define    RTL8367C_SEC_RUN_HSA_OFFSET    6
-+#define    RTL8367C_SEC_RUN_HSA_MASK    0x40
-+#define    RTL8367C_HAS_HLDRMP_VAL_OFFSET    5
-+#define    RTL8367C_HAS_HLDRMP_VAL_MASK    0x20
-+#define    RTL8367C_HAS_BISR_PWRSTN_OFFSET    4
-+#define    RTL8367C_HAS_BISR_PWRSTN_MASK    0x10
-+#define    RTL8367C_SEC_RUN_PB_OFFSET    3
-+#define    RTL8367C_SEC_RUN_PB_MASK    0x8
-+#define    RTL8367C_PB_HLDRMP_VAL_OFFSET    2
-+#define    RTL8367C_PB_HLDRMP_VAL_MASK    0x4
-+#define    RTL8367C_PB_BISR_BIRSTN_OFFSET    1
-+#define    RTL8367C_PB_BISR_BIRSTN_MASK    0x2
-+#define    RTL8367C_PB_BISR_PWRSTN_OFFSET    0
-+#define    RTL8367C_PB_BISR_PWRSTN_MASK    0x1
-+
-+#define    RTL8367C_REG_CVLANRAM_BISR_CTRL    0x1d39
-+#define    RTL8367C_SEC_RUN_CVLAN_OFFSET    4
-+#define    RTL8367C_SEC_RUN_CVLAN_MASK    0x10
-+#define    RTL8367C_CVALN_HLDRMP_MD_OFFSET    3
-+#define    RTL8367C_CVALN_HLDRMP_MD_MASK    0x8
-+#define    RTL8367C_CVALN_HLDRMP_VAL_OFFSET    2
-+#define    RTL8367C_CVALN_HLDRMP_VAL_MASK    0x4
-+#define    RTL8367C_CVLAN_BISR_BIRSTN_OFFSET    1
-+#define    RTL8367C_CVLAN_BISR_BIRSTN_MASK    0x2
-+#define    RTL8367C_CVLAN_BISR_PWRSTN_OFFSET    0
-+#define    RTL8367C_CVLAN_BISR_PWRSTN_MASK    0x1
-+
-+#define    RTL8367C_REG_CFG_1588_TIMER_EN_GPI    0x1d3a
-+#define    RTL8367C_CFG_1588_TIMER_EN_GPI_OFFSET    0
-+#define    RTL8367C_CFG_1588_TIMER_EN_GPI_MASK    0x1
-+
-+#define    RTL8367C_REG_MDIO_PRMB_SUPP    0x1d3b
-+#define    RTL8367C_FIB_HIPRI_OFFSET    14
-+#define    RTL8367C_FIB_HIPRI_MASK    0x4000
-+#define    RTL8367C_SMT_EN_OFFSET    13
-+#define    RTL8367C_SMT_EN_MASK    0x2000
-+#define    RTL8367C_P4_FB_CPL_OFFSET    12
-+#define    RTL8367C_P4_FB_CPL_MASK    0x1000
-+#define    RTL8367C_P3_FB_CPL_OFFSET    11
-+#define    RTL8367C_P3_FB_CPL_MASK    0x800
-+#define    RTL8367C_P2_FB_CPL_OFFSET    10
-+#define    RTL8367C_P2_FB_CPL_MASK    0x400
-+#define    RTL8367C_P1_FB_CPL_OFFSET    9
-+#define    RTL8367C_P1_FB_CPL_MASK    0x200
-+#define    RTL8367C_P0_FB_CPL_OFFSET    8
-+#define    RTL8367C_P0_FB_CPL_MASK    0x100
-+#define    RTL8367C_DBG_PKG_8367N_OFFSET    7
-+#define    RTL8367C_DBG_PKG_8367N_MASK    0x80
-+#define    RTL8367C_DBG_PKG_8367VB_OFFSET    6
-+#define    RTL8367C_DBG_PKG_8367VB_MASK    0x40
-+#define    RTL8367C_CFG_DEBUG_EN_OFFSET    5
-+#define    RTL8367C_CFG_DEBUG_EN_MASK    0x20
-+#define    RTL8367C_CFG_TMR_ACK_OFFSET    1
-+#define    RTL8367C_CFG_TMR_ACK_MASK    0x1E
-+#define    RTL8367C_CFG_PRMB_SUPP_OFFSET    0
-+#define    RTL8367C_CFG_PRMB_SUPP_MASK    0x1
-+
-+#define    RTL8367C_REG_BOND4READ    0x1d3c
-+#define    RTL8367C_BOND_BOID0_OFFSET    8
-+#define    RTL8367C_BOND_BOID0_MASK    0x100
-+#define    RTL8367C_BOND_SYSCLK_OFFSET    7
-+#define    RTL8367C_BOND_SYSCLK_MASK    0x80
-+#define    RTL8367C_BOND_PHYMODE_OFFSET    6
-+#define    RTL8367C_BOND_PHYMODE_MASK    0x40
-+#define    RTL8367C_BOND_DIS_PON_BIST_OFFSET    5
-+#define    RTL8367C_BOND_DIS_PON_BIST_MASK    0x20
-+#define    RTL8367C_BOND_DIS_TABLE_INIT_OFFSET    4
-+#define    RTL8367C_BOND_DIS_TABLE_INIT_MASK    0x10
-+#define    RTL8367C_BOND_BYP_AFE_PLL_OFFSET    3
-+#define    RTL8367C_BOND_BYP_AFE_PLL_MASK    0x8
-+#define    RTL8367C_BOND_BYP_AFE_POR_OFFSET    2
-+#define    RTL8367C_BOND_BYP_AFE_POR_MASK    0x4
-+#define    RTL8367C_BOND_BISR_COND_OFFSET    1
-+#define    RTL8367C_BOND_BISR_COND_MASK    0x2
-+#define    RTL8367C_BOND_EF_EN_OFFSET    0
-+#define    RTL8367C_BOND_EF_EN_MASK    0x1
-+
-+#define    RTL8367C_REG_REG_TO_ECO0    0x1d3d
-+
-+#define    RTL8367C_REG_REG_TO_ECO1    0x1d3e
-+
-+#define    RTL8367C_REG_REG_TO_ECO2    0x1d3f
-+
-+#define    RTL8367C_REG_REG_TO_ECO3    0x1d40
-+
-+#define    RTL8367C_REG_REG_TO_ECO4    0x1d41
-+
-+#define    RTL8367C_REG_PHYSTS_CTRL0    0x1d42
-+#define    RTL8367C_MACRX_DUPDET_EN_OFFSET    5
-+#define    RTL8367C_MACRX_DUPDET_EN_MASK    0x20
-+#define    RTL8367C_LNKUP_DLY_EN_OFFSET    4
-+#define    RTL8367C_LNKUP_DLY_EN_MASK    0x10
-+#define    RTL8367C_GE_100M_LNKUP_DLY_OFFSET    2
-+#define    RTL8367C_GE_100M_LNKUP_DLY_MASK    0xC
-+#define    RTL8367C_PHYSTS_10M_LNKUP_DLY_OFFSET    0
-+#define    RTL8367C_PHYSTS_10M_LNKUP_DLY_MASK    0x3
-+
-+#define    RTL8367C_REG_SSC_CTRL0_0    0x1d44
-+#define    RTL8367C_SSC_CTRL0_0_SSC_TYPE_OFFSET    13
-+#define    RTL8367C_SSC_CTRL0_0_SSC_TYPE_MASK    0x2000
-+#define    RTL8367C_SSC_CTRL0_0_PHASE_LIM_SEL_OFFSET    5
-+#define    RTL8367C_SSC_CTRL0_0_PHASE_LIM_SEL_MASK    0x1FE0
-+#define    RTL8367C_SSC_CTRL0_0_PHASE_LIM_EN_OFFSET    4
-+#define    RTL8367C_SSC_CTRL0_0_PHASE_LIM_EN_MASK    0x10
-+#define    RTL8367C_SSC_CTRL0_0_DLL_MODE_OFFSET    2
-+#define    RTL8367C_SSC_CTRL0_0_DLL_MODE_MASK    0xC
-+#define    RTL8367C_SSC_CTRL0_0_SSC_EN_OFFSET    1
-+#define    RTL8367C_SSC_CTRL0_0_SSC_EN_MASK    0x2
-+#define    RTL8367C_SSC_CTRL0_0_SSC_MODE_OFFSET    0
-+#define    RTL8367C_SSC_CTRL0_0_SSC_MODE_MASK    0x1
-+
-+#define    RTL8367C_REG_SSC_RDM_SEED    0x1d45
-+
-+#define    RTL8367C_REG_SSC_PN_POLY_SEL    0x1d46
-+
-+#define    RTL8367C_REG_SSC_CTRL0_3    0x1d47
-+#define    RTL8367C_SSC_CTRL0_3_PHSFT_CNT_OFFSET    8
-+#define    RTL8367C_SSC_CTRL0_3_PHSFT_CNT_MASK    0x7F00
-+#define    RTL8367C_SSC_CTRL0_3_PHSFT_A_OFFSET    7
-+#define    RTL8367C_SSC_CTRL0_3_PHSFT_A_MASK    0x80
-+#define    RTL8367C_SSC_CTRL0_3_PHSFT_B_OFFSET    6
-+#define    RTL8367C_SSC_CTRL0_3_PHSFT_B_MASK    0x40
-+#define    RTL8367C_SSC_CTRL0_3_PHSFT_UPDN_OFFSET    5
-+#define    RTL8367C_SSC_CTRL0_3_PHSFT_UPDN_MASK    0x20
-+#define    RTL8367C_SSC_CTRL0_3_PHSFT_PRD_OFFSET    4
-+#define    RTL8367C_SSC_CTRL0_3_PHSFT_PRD_MASK    0x10
-+#define    RTL8367C_SSC_CTRL0_3_PN_POLY_DEG_OFFSET    0
-+#define    RTL8367C_SSC_CTRL0_3_PN_POLY_DEG_MASK    0xF
-+
-+#define    RTL8367C_REG_SSC_CTRL0_4    0x1d48
-+#define    RTL8367C_SSC_CTRL0_4_SSC_UP1DN0_OFFSET    15
-+#define    RTL8367C_SSC_CTRL0_4_SSC_UP1DN0_MASK    0x8000
-+#define    RTL8367C_SSC_CTRL0_4_SSC_PERIOD_OFFSET    8
-+#define    RTL8367C_SSC_CTRL0_4_SSC_PERIOD_MASK    0x7F00
-+#define    RTL8367C_SSC_CTRL0_4_SSC_OFFSET_OFFSET    0
-+#define    RTL8367C_SSC_CTRL0_4_SSC_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_SSC_CTRL0_5    0x1d49
-+#define    RTL8367C_SSC_CTRL0_5_PH_OFS_TOG_OFFSET    15
-+#define    RTL8367C_SSC_CTRL0_5_PH_OFS_TOG_MASK    0x8000
-+#define    RTL8367C_SSC_CTRL0_5_PH_OFS_OFFSET    10
-+#define    RTL8367C_SSC_CTRL0_5_PH_OFS_MASK    0x7C00
-+#define    RTL8367C_SSC_CTRL0_5_SSC_STEP_OFFSET    4
-+#define    RTL8367C_SSC_CTRL0_5_SSC_STEP_MASK    0x3F0
-+#define    RTL8367C_SSC_CTRL0_5_SSC_TEST_MODE_OFFSET    2
-+#define    RTL8367C_SSC_CTRL0_5_SSC_TEST_MODE_MASK    0xC
-+#define    RTL8367C_SSC_CTRL0_5_SSC_PH_CFG_OFFSET    0
-+#define    RTL8367C_SSC_CTRL0_5_SSC_PH_CFG_MASK    0x3
-+
-+#define    RTL8367C_REG_SSC_STS0    0x1d4a
-+#define    RTL8367C_SSC_STS0_OFS_BUSY_OFFSET    13
-+#define    RTL8367C_SSC_STS0_OFS_BUSY_MASK    0x2000
-+#define    RTL8367C_SSC_STS0_OFS_TOTAL_R_OFFSET    8
-+#define    RTL8367C_SSC_STS0_OFS_TOTAL_R_MASK    0x1F00
-+#define    RTL8367C_SSC_STS0_CNT_GRY0_OFFSET    4
-+#define    RTL8367C_SSC_STS0_CNT_GRY0_MASK    0xF0
-+#define    RTL8367C_SSC_STS0_OFS_GRY0_OFFSET    0
-+#define    RTL8367C_SSC_STS0_OFS_GRY0_MASK    0xF
-+
-+#define    RTL8367C_REG_SSC_CTRL1_0    0x1d4b
-+#define    RTL8367C_SSC_CTRL1_0_SSC_TYPE_OFFSET    13
-+#define    RTL8367C_SSC_CTRL1_0_SSC_TYPE_MASK    0x2000
-+#define    RTL8367C_SSC_CTRL1_0_PHASE_LIM_SEL_OFFSET    5
-+#define    RTL8367C_SSC_CTRL1_0_PHASE_LIM_SEL_MASK    0x1FE0
-+#define    RTL8367C_SSC_CTRL1_0_PHASE_LIM_EN_OFFSET    4
-+#define    RTL8367C_SSC_CTRL1_0_PHASE_LIM_EN_MASK    0x10
-+#define    RTL8367C_SSC_CTRL1_0_DLL_MODE_OFFSET    2
-+#define    RTL8367C_SSC_CTRL1_0_DLL_MODE_MASK    0xC
-+#define    RTL8367C_SSC_CTRL1_0_SSC_EN_OFFSET    1
-+#define    RTL8367C_SSC_CTRL1_0_SSC_EN_MASK    0x2
-+#define    RTL8367C_SSC_CTRL1_0_SSC_MODE_OFFSET    0
-+#define    RTL8367C_SSC_CTRL1_0_SSC_MODE_MASK    0x1
-+
-+#define    RTL8367C_REG_SSC_RDM_SEED1    0x1d4c
-+
-+#define    RTL8367C_REG_SSC_PN_POLY_SEL1    0x1d4d
-+
-+#define    RTL8367C_REG_SSC_CTRL1_3    0x1d4e
-+#define    RTL8367C_SSC_CTRL1_3_PHSFT_CNT_OFFSET    8
-+#define    RTL8367C_SSC_CTRL1_3_PHSFT_CNT_MASK    0x7F00
-+#define    RTL8367C_SSC_CTRL1_3_PHSFT_A_OFFSET    7
-+#define    RTL8367C_SSC_CTRL1_3_PHSFT_A_MASK    0x80
-+#define    RTL8367C_SSC_CTRL1_3_PHSFT_B_OFFSET    6
-+#define    RTL8367C_SSC_CTRL1_3_PHSFT_B_MASK    0x40
-+#define    RTL8367C_SSC_CTRL1_3_PHSFT_UPDN_OFFSET    5
-+#define    RTL8367C_SSC_CTRL1_3_PHSFT_UPDN_MASK    0x20
-+#define    RTL8367C_SSC_CTRL1_3_PHSFT_PRD_OFFSET    4
-+#define    RTL8367C_SSC_CTRL1_3_PHSFT_PRD_MASK    0x10
-+#define    RTL8367C_SSC_CTRL1_3_PN_POLY_DEG_OFFSET    0
-+#define    RTL8367C_SSC_CTRL1_3_PN_POLY_DEG_MASK    0xF
-+
-+#define    RTL8367C_REG_SSC_CTRL1_4    0x1d4f
-+#define    RTL8367C_SSC_CTRL1_4_SSC_UP1DN0_OFFSET    15
-+#define    RTL8367C_SSC_CTRL1_4_SSC_UP1DN0_MASK    0x8000
-+#define    RTL8367C_SSC_CTRL1_4_SSC_PERIOD_OFFSET    8
-+#define    RTL8367C_SSC_CTRL1_4_SSC_PERIOD_MASK    0x7F00
-+#define    RTL8367C_SSC_CTRL1_4_SSC_OFFSET_OFFSET    0
-+#define    RTL8367C_SSC_CTRL1_4_SSC_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_SSC_CTRL1_5    0x1d50
-+#define    RTL8367C_SSC_CTRL1_5_PH_OFS_TOG_OFFSET    15
-+#define    RTL8367C_SSC_CTRL1_5_PH_OFS_TOG_MASK    0x8000
-+#define    RTL8367C_SSC_CTRL1_5_PH_OFS_OFFSET    10
-+#define    RTL8367C_SSC_CTRL1_5_PH_OFS_MASK    0x7C00
-+#define    RTL8367C_SSC_CTRL1_5_SSC_STEP_OFFSET    4
-+#define    RTL8367C_SSC_CTRL1_5_SSC_STEP_MASK    0x3F0
-+#define    RTL8367C_SSC_CTRL1_5_SSC_TEST_MODE_OFFSET    2
-+#define    RTL8367C_SSC_CTRL1_5_SSC_TEST_MODE_MASK    0xC
-+#define    RTL8367C_SSC_CTRL1_5_SSC_PH_CFG_OFFSET    0
-+#define    RTL8367C_SSC_CTRL1_5_SSC_PH_CFG_MASK    0x3
-+
-+#define    RTL8367C_REG_SSC_STS1    0x1d51
-+#define    RTL8367C_SSC_STS1_OFS_BUSY_OFFSET    13
-+#define    RTL8367C_SSC_STS1_OFS_BUSY_MASK    0x2000
-+#define    RTL8367C_SSC_STS1_OFS_TOTAL_R_OFFSET    8
-+#define    RTL8367C_SSC_STS1_OFS_TOTAL_R_MASK    0x1F00
-+#define    RTL8367C_SSC_STS1_CNT_GRY0_OFFSET    4
-+#define    RTL8367C_SSC_STS1_CNT_GRY0_MASK    0xF0
-+#define    RTL8367C_SSC_STS1_OFS_GRY0_OFFSET    0
-+#define    RTL8367C_SSC_STS1_OFS_GRY0_MASK    0xF
-+
-+#define    RTL8367C_REG_SSC_CTRL2_0    0x1d52
-+#define    RTL8367C_SSC_CTRL2_0_SSC_TYPE_OFFSET    13
-+#define    RTL8367C_SSC_CTRL2_0_SSC_TYPE_MASK    0x2000
-+#define    RTL8367C_SSC_CTRL2_0_PHASE_LIM_SEL_OFFSET    5
-+#define    RTL8367C_SSC_CTRL2_0_PHASE_LIM_SEL_MASK    0x1FE0
-+#define    RTL8367C_SSC_CTRL2_0_PHASE_LIM_EN_OFFSET    4
-+#define    RTL8367C_SSC_CTRL2_0_PHASE_LIM_EN_MASK    0x10
-+#define    RTL8367C_SSC_CTRL2_0_DLL_MODE_OFFSET    2
-+#define    RTL8367C_SSC_CTRL2_0_DLL_MODE_MASK    0xC
-+#define    RTL8367C_SSC_CTRL2_0_SSC_EN_OFFSET    1
-+#define    RTL8367C_SSC_CTRL2_0_SSC_EN_MASK    0x2
-+#define    RTL8367C_SSC_CTRL2_0_SSC_MODE_OFFSET    0
-+#define    RTL8367C_SSC_CTRL2_0_SSC_MODE_MASK    0x1
-+
-+#define    RTL8367C_REG_SSC_RDM_SEED2    0x1d53
-+
-+#define    RTL8367C_REG_SSC_PN_POLY_SEL2    0x1d54
-+
-+#define    RTL8367C_REG_SSC_CTRL2_3    0x1d55
-+#define    RTL8367C_SSC_CTRL2_3_PHSFT_CNT_OFFSET    8
-+#define    RTL8367C_SSC_CTRL2_3_PHSFT_CNT_MASK    0x7F00
-+#define    RTL8367C_SSC_CTRL2_3_PHSFT_A_OFFSET    7
-+#define    RTL8367C_SSC_CTRL2_3_PHSFT_A_MASK    0x80
-+#define    RTL8367C_SSC_CTRL2_3_PHSFT_B_OFFSET    6
-+#define    RTL8367C_SSC_CTRL2_3_PHSFT_B_MASK    0x40
-+#define    RTL8367C_SSC_CTRL2_3_PHSFT_UPDN_OFFSET    5
-+#define    RTL8367C_SSC_CTRL2_3_PHSFT_UPDN_MASK    0x20
-+#define    RTL8367C_SSC_CTRL2_3_PHSFT_PRD_OFFSET    4
-+#define    RTL8367C_SSC_CTRL2_3_PHSFT_PRD_MASK    0x10
-+#define    RTL8367C_SSC_CTRL2_3_PN_POLY_DEG_OFFSET    0
-+#define    RTL8367C_SSC_CTRL2_3_PN_POLY_DEG_MASK    0xF
-+
-+#define    RTL8367C_REG_SSC_CTRL2_4    0x1d56
-+#define    RTL8367C_SSC_CTRL2_4_SSC_UP1DN0_OFFSET    15
-+#define    RTL8367C_SSC_CTRL2_4_SSC_UP1DN0_MASK    0x8000
-+#define    RTL8367C_SSC_CTRL2_4_SSC_PERIOD_OFFSET    8
-+#define    RTL8367C_SSC_CTRL2_4_SSC_PERIOD_MASK    0x7F00
-+#define    RTL8367C_SSC_CTRL2_4_SSC_OFFSET_OFFSET    0
-+#define    RTL8367C_SSC_CTRL2_4_SSC_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_SSC_CTRL2_5    0x1d57
-+#define    RTL8367C_SSC_CTRL2_5_PH_OFS_TOG_OFFSET    15
-+#define    RTL8367C_SSC_CTRL2_5_PH_OFS_TOG_MASK    0x8000
-+#define    RTL8367C_SSC_CTRL2_5_PH_OFS_OFFSET    10
-+#define    RTL8367C_SSC_CTRL2_5_PH_OFS_MASK    0x7C00
-+#define    RTL8367C_SSC_CTRL2_5_SSC_STEP_OFFSET    4
-+#define    RTL8367C_SSC_CTRL2_5_SSC_STEP_MASK    0x3F0
-+#define    RTL8367C_SSC_CTRL2_5_SSC_TEST_MODE_OFFSET    2
-+#define    RTL8367C_SSC_CTRL2_5_SSC_TEST_MODE_MASK    0xC
-+#define    RTL8367C_SSC_CTRL2_5_SSC_PH_CFG_OFFSET    0
-+#define    RTL8367C_SSC_CTRL2_5_SSC_PH_CFG_MASK    0x3
-+
-+#define    RTL8367C_REG_SSC_STS2    0x1d58
-+#define    RTL8367C_SSC_STS2_OFS_BUSY_OFFSET    13
-+#define    RTL8367C_SSC_STS2_OFS_BUSY_MASK    0x2000
-+#define    RTL8367C_SSC_STS2_OFS_TOTAL_R_OFFSET    8
-+#define    RTL8367C_SSC_STS2_OFS_TOTAL_R_MASK    0x1F00
-+#define    RTL8367C_SSC_STS2_CNT_GRY0_OFFSET    4
-+#define    RTL8367C_SSC_STS2_CNT_GRY0_MASK    0xF0
-+#define    RTL8367C_SSC_STS2_OFS_GRY0_OFFSET    0
-+#define    RTL8367C_SSC_STS2_OFS_GRY0_MASK    0xF
-+
-+#define    RTL8367C_REG_SSC_CTRL3_0    0x1d59
-+#define    RTL8367C_SSC_CTRL3_0_SSC_TYPE_OFFSET    13
-+#define    RTL8367C_SSC_CTRL3_0_SSC_TYPE_MASK    0x2000
-+#define    RTL8367C_SSC_CTRL3_0_PHASE_LIM_SEL_OFFSET    5
-+#define    RTL8367C_SSC_CTRL3_0_PHASE_LIM_SEL_MASK    0x1FE0
-+#define    RTL8367C_SSC_CTRL3_0_PHASE_LIM_EN_OFFSET    4
-+#define    RTL8367C_SSC_CTRL3_0_PHASE_LIM_EN_MASK    0x10
-+#define    RTL8367C_SSC_CTRL3_0_DLL_MODE_OFFSET    2
-+#define    RTL8367C_SSC_CTRL3_0_DLL_MODE_MASK    0xC
-+#define    RTL8367C_SSC_CTRL3_0_SSC_EN_OFFSET    1
-+#define    RTL8367C_SSC_CTRL3_0_SSC_EN_MASK    0x2
-+#define    RTL8367C_SSC_CTRL3_0_SSC_MODE_OFFSET    0
-+#define    RTL8367C_SSC_CTRL3_0_SSC_MODE_MASK    0x1
-+
-+#define    RTL8367C_REG_SSC_RDM_SEED3    0x1d5a
-+
-+#define    RTL8367C_REG_SSC_PN_POLY_SEL3    0x1d5b
-+
-+#define    RTL8367C_REG_SSC_CTRL3_3    0x1d5c
-+#define    RTL8367C_SSC_CTRL3_3_PHSFT_CNT_OFFSET    8
-+#define    RTL8367C_SSC_CTRL3_3_PHSFT_CNT_MASK    0x7F00
-+#define    RTL8367C_SSC_CTRL3_3_PHSFT_A_OFFSET    7
-+#define    RTL8367C_SSC_CTRL3_3_PHSFT_A_MASK    0x80
-+#define    RTL8367C_SSC_CTRL3_3_PHSFT_B_OFFSET    6
-+#define    RTL8367C_SSC_CTRL3_3_PHSFT_B_MASK    0x40
-+#define    RTL8367C_SSC_CTRL3_3_PHSFT_UPDN_OFFSET    5
-+#define    RTL8367C_SSC_CTRL3_3_PHSFT_UPDN_MASK    0x20
-+#define    RTL8367C_SSC_CTRL3_3_PHSFT_PRD_OFFSET    4
-+#define    RTL8367C_SSC_CTRL3_3_PHSFT_PRD_MASK    0x10
-+#define    RTL8367C_SSC_CTRL3_3_PN_POLY_DEG_OFFSET    0
-+#define    RTL8367C_SSC_CTRL3_3_PN_POLY_DEG_MASK    0xF
-+
-+#define    RTL8367C_REG_SSC_CTRL3_4    0x1d5d
-+#define    RTL8367C_SSC_CTRL3_4_SSC_UP1DN0_OFFSET    15
-+#define    RTL8367C_SSC_CTRL3_4_SSC_UP1DN0_MASK    0x8000
-+#define    RTL8367C_SSC_CTRL3_4_SSC_PERIOD_OFFSET    8
-+#define    RTL8367C_SSC_CTRL3_4_SSC_PERIOD_MASK    0x7F00
-+#define    RTL8367C_SSC_CTRL3_4_SSC_OFFSET_OFFSET    0
-+#define    RTL8367C_SSC_CTRL3_4_SSC_OFFSET_MASK    0xFF
-+
-+#define    RTL8367C_REG_SSC_CTRL3_5    0x1d5e
-+#define    RTL8367C_SSC_CTRL3_5_PH_OFS_TOG_OFFSET    15
-+#define    RTL8367C_SSC_CTRL3_5_PH_OFS_TOG_MASK    0x8000
-+#define    RTL8367C_SSC_CTRL3_5_PH_OFS_OFFSET    10
-+#define    RTL8367C_SSC_CTRL3_5_PH_OFS_MASK    0x7C00
-+#define    RTL8367C_SSC_CTRL3_5_SSC_STEP_OFFSET    4
-+#define    RTL8367C_SSC_CTRL3_5_SSC_STEP_MASK    0x3F0
-+#define    RTL8367C_SSC_CTRL3_5_SSC_TEST_MODE_OFFSET    2
-+#define    RTL8367C_SSC_CTRL3_5_SSC_TEST_MODE_MASK    0xC
-+#define    RTL8367C_SSC_CTRL3_5_SSC_PH_CFG_OFFSET    0
-+#define    RTL8367C_SSC_CTRL3_5_SSC_PH_CFG_MASK    0x3
-+
-+#define    RTL8367C_REG_SSC_STS3    0x1d5f
-+#define    RTL8367C_SSC_STS3_OFS_BUSY_OFFSET    13
-+#define    RTL8367C_SSC_STS3_OFS_BUSY_MASK    0x2000
-+#define    RTL8367C_SSC_STS3_OFS_TOTAL_R_OFFSET    8
-+#define    RTL8367C_SSC_STS3_OFS_TOTAL_R_MASK    0x1F00
-+#define    RTL8367C_SSC_STS3_CNT_GRY0_OFFSET    4
-+#define    RTL8367C_SSC_STS3_CNT_GRY0_MASK    0xF0
-+#define    RTL8367C_SSC_STS3_OFS_GRY0_OFFSET    0
-+#define    RTL8367C_SSC_STS3_OFS_GRY0_MASK    0xF
-+
-+#define    RTL8367C_REG_PHY_POLL_CFG13    0x1d60
-+
-+#define    RTL8367C_REG_PHY_POLL_CFG14    0x1d61
-+
-+#define    RTL8367C_REG_FRC_SYS_CLK    0x1d62
-+#define    RTL8367C_SYSCLK_FRC_MD_OFFSET    1
-+#define    RTL8367C_SYSCLK_FRC_MD_MASK    0x2
-+#define    RTL8367C_SYSCLK_FRC_VAL_OFFSET    0
-+#define    RTL8367C_SYSCLK_FRC_VAL_MASK    0x1
-+
-+#define    RTL8367C_REG_AFE_SSC_CTRL    0x1d63
-+#define    RTL8367C_PH_RSTB_TXD1_OFFSET    9
-+#define    RTL8367C_PH_RSTB_TXD1_MASK    0x200
-+#define    RTL8367C_PH_RSTB_TXC1_OFFSET    8
-+#define    RTL8367C_PH_RSTB_TXC1_MASK    0x100
-+#define    RTL8367C_PH_RSTB_TXD0_OFFSET    7
-+#define    RTL8367C_PH_RSTB_TXD0_MASK    0x80
-+#define    RTL8367C_PH_RSTB_TXC0_OFFSET    6
-+#define    RTL8367C_PH_RSTB_TXC0_MASK    0x40
-+#define    RTL8367C_PH_RSTBSYS_OFFSET    5
-+#define    RTL8367C_PH_RSTBSYS_MASK    0x20
-+#define    RTL8367C_PH_RSTB8051_OFFSET    4
-+#define    RTL8367C_PH_RSTB8051_MASK    0x10
-+#define    RTL8367C_OREG_SSC_OFFSET    0
-+#define    RTL8367C_OREG_SSC_MASK    0xF
-+
-+#define    RTL8367C_REG_BUFF_RST_CTRL0    0x1d64
-+#define    RTL8367C_BUFFRST_TXESD_EN_OFFSET    13
-+#define    RTL8367C_BUFFRST_TXESD_EN_MASK    0x2000
-+#define    RTL8367C_BUFF_RST_TIME_LONG_OFFSET    8
-+#define    RTL8367C_BUFF_RST_TIME_LONG_MASK    0x1F00
-+#define    RTL8367C_BUFF_RST_TIME_SHORT_OFFSET    3
-+#define    RTL8367C_BUFF_RST_TIME_SHORT_MASK    0xF8
-+#define    RTL8367C_SW_BUFF_RST_OFFSET    2
-+#define    RTL8367C_SW_BUFF_RST_MASK    0x4
-+#define    RTL8367C_IMS_BUFF_RST_OFFSET    1
-+#define    RTL8367C_IMS_BUFF_RST_MASK    0x2
-+#define    RTL8367C_IMR_BUFF_RST_OFFSET    0
-+#define    RTL8367C_IMR_BUFF_RST_MASK    0x1
-+
-+#define    RTL8367C_REG_BUFF_RST_CTRL1    0x1d65
-+#define    RTL8367C_BUFFRST_SYSOVER_EN_OFFSET    10
-+#define    RTL8367C_BUFFRST_SYSOVER_EN_MASK    0x400
-+#define    RTL8367C_BUFFRST_SYSOVER_THR_OFFSET    0
-+#define    RTL8367C_BUFFRST_SYSOVER_THR_MASK    0x3FF
-+
-+#define    RTL8367C_REG_BUFF_RST_CTRL2    0x1d66
-+#define    RTL8367C_BUFFRST_QOVER_EN_OFFSET    10
-+#define    RTL8367C_BUFFRST_QOVER_EN_MASK    0x400
-+#define    RTL8367C_BUFFRST_QOVER_THR_OFFSET    0
-+#define    RTL8367C_BUFFRST_QOVER_THR_MASK    0x3FF
-+
-+#define    RTL8367C_REG_BUFF_RST_CTRL3    0x1d67
-+#define    RTL8367C_DSC_TIMER_OFFSET    11
-+#define    RTL8367C_DSC_TIMER_MASK    0x7800
-+#define    RTL8367C_BUFFRST_DSCOVER_THR_OFFSET    1
-+#define    RTL8367C_BUFFRST_DSCOVER_THR_MASK    0x7FE
-+#define    RTL8367C_BUFFRST_DSCOVER_EN_OFFSET    0
-+#define    RTL8367C_BUFFRST_DSCOVER_EN_MASK    0x1
-+
-+#define    RTL8367C_REG_BUFF_RST_CTRL4    0x1d68
-+#define    RTL8367C_INDSC_TIMER_OFFSET    11
-+#define    RTL8367C_INDSC_TIMER_MASK    0x7800
-+#define    RTL8367C_BUFFRST_INDSCOVER_THR_OFFSET    1
-+#define    RTL8367C_BUFFRST_INDSCOVER_THR_MASK    0x7FE
-+#define    RTL8367C_BUFFRST_INDSCOVER_EN_OFFSET    0
-+#define    RTL8367C_BUFFRST_INDSCOVER_EN_MASK    0x1
-+
-+#define    RTL8367C_REG_BUFF_RST_CTRL5    0x1d69
-+#define    RTL8367C_TX_ESD_MODE_OFFSET    8
-+#define    RTL8367C_TX_ESD_MODE_MASK    0x100
-+#define    RTL8367C_TX_ESD_LVL_OFFSET    0
-+#define    RTL8367C_TX_ESD_LVL_MASK    0xFF
-+
-+#define    RTL8367C_REG_TOP_CON0    0x1d70
-+#define    RTL8367C_TOP_CON0_SDS_PWR_ISO_1_OFFSET    15
-+#define    RTL8367C_TOP_CON0_SDS_PWR_ISO_1_MASK    0x8000
-+#define    RTL8367C_OCP_TIMEOUT_P7_5_OFFSET    12
-+#define    RTL8367C_OCP_TIMEOUT_P7_5_MASK    0x7000
-+#define    RTL8367C_FIB_EEE_AB_OFFSET    11
-+#define    RTL8367C_FIB_EEE_AB_MASK    0x800
-+#define    RTL8367C_ADCCKIEN_OFFSET    10
-+#define    RTL8367C_ADCCKIEN_MASK    0x400
-+#define    RTL8367C_OCP_TIMEOUT_OFFSET    5
-+#define    RTL8367C_OCP_TIMEOUT_MASK    0x3E0
-+#define    RTL8367C_TOP_CON0_SDS_PWR_ISO_OFFSET    4
-+#define    RTL8367C_TOP_CON0_SDS_PWR_ISO_MASK    0x10
-+#define    RTL8367C_RG2_TXC_SEL_OFFSET    3
-+#define    RTL8367C_RG2_TXC_SEL_MASK    0x8
-+#define    RTL8367C_RG1TXC_SEL_OFFSET    2
-+#define    RTL8367C_RG1TXC_SEL_MASK    0x4
-+#define    RTL8367C_SYNC_1588_EN_OFFSET    1
-+#define    RTL8367C_SYNC_1588_EN_MASK    0x2
-+#define    RTL8367C_LS_MODE_OFFSET    0
-+#define    RTL8367C_LS_MODE_MASK    0x1
-+
-+#define    RTL8367C_REG_TOP_CON1    0x1d71
-+#define    RTL8367C_TA_CHK_EN_OFFSET    2
-+#define    RTL8367C_TA_CHK_EN_MASK    0x4
-+#define    RTL8367C_SLV_EG_SEL_OFFSET    1
-+#define    RTL8367C_SLV_EG_SEL_MASK    0x2
-+#define    RTL8367C_IIC_OP_DRAIN_OFFSET    0
-+#define    RTL8367C_IIC_OP_DRAIN_MASK    0x1
-+
-+#define    RTL8367C_REG_SWR_FPWM    0x1d72
-+#define    RTL8367C_SWR_FPWM_OFFSET    0
-+#define    RTL8367C_SWR_FPWM_MASK    0x1
-+
-+#define    RTL8367C_REG_EEEP_CTRL_500M    0x1d73
-+
-+#define    RTL8367C_REG_SHORT_PRMB    0x1d74
-+#define    RTL8367C_SHORT_PRMB_OFFSET    0
-+#define    RTL8367C_SHORT_PRMB_MASK    0x1
-+
-+#define    RTL8367C_REG_INDSC_THR_CTRL    0x1d75
-+#define    RTL8367C_INDSC_THR_CTRL_OFFSET    0
-+#define    RTL8367C_INDSC_THR_CTRL_MASK    0x7FF
-+
-+#define    RTL8367C_REG_SET_PAD_CTRL_NEW    0x1d80
-+#define    RTL8367C_SET_PAD_CTRL_NEW_OFFSET    0
-+#define    RTL8367C_SET_PAD_CTRL_NEW_MASK    0x1
-+
-+#define    RTL8367C_REG_SET_PAD_DRI_0    0x1d81
-+
-+#define    RTL8367C_REG_SET_PAD_DRI_1    0x1d82
-+
-+#define    RTL8367C_REG_SET_PAD_DRI_2    0x1d83
-+
-+#define    RTL8367C_REG_SET_PAD_SLEW_0    0x1d84
-+
-+#define    RTL8367C_REG_SET_PAD_SLEW_1    0x1d85
-+
-+#define    RTL8367C_REG_SET_PAD_SLEW_2    0x1d86
-+
-+#define    RTL8367C_REG_SET_PAD_SMT_0    0x1d87
-+
-+#define    RTL8367C_REG_SET_PAD_SMT_1    0x1d88
-+
-+#define    RTL8367C_REG_SET_PAD_SMT_2    0x1d89
-+
-+#define    RTL8367C_REG_M_I2C_CTL_STA_REG    0x1d8a
-+#define    RTL8367C_TX_RX_DATA_OFFSET    8
-+#define    RTL8367C_TX_RX_DATA_MASK    0xFF00
-+#define    RTL8367C_DUMB_RW_ERR_OFFSET    7
-+#define    RTL8367C_DUMB_RW_ERR_MASK    0x80
-+#define    RTL8367C_SLV_ACK_FLAG_OFFSET    6
-+#define    RTL8367C_SLV_ACK_FLAG_MASK    0x40
-+#define    RTL8367C_M_I2C_BUS_IDLE_OFFSET    5
-+#define    RTL8367C_M_I2C_BUS_IDLE_MASK    0x20
-+#define    RTL8367C_I2C_CMD_TYPE_OFFSET    1
-+#define    RTL8367C_I2C_CMD_TYPE_MASK    0x1E
-+#define    RTL8367C_I2C_CMD_EXEC_OFFSET    0
-+#define    RTL8367C_I2C_CMD_EXEC_MASK    0x1
-+
-+#define    RTL8367C_REG_M_I2C_DUMB_RW_ADDR_0    0x1d8b
-+
-+#define    RTL8367C_REG_M_I2C_DUMB_RW_ADDR_1    0x1d8c
-+
-+#define    RTL8367C_REG_M_I2C_DUMB_RW_DATA_0    0x1d8d
-+
-+#define    RTL8367C_REG_M_I2C_DUMB_RW_DATA_1    0x1d8e
-+
-+#define    RTL8367C_REG_M_I2C_DUMB_RW_CTL    0x1d8f
-+#define    RTL8367C_DUMB_I2C_CTL_CODE_OFFSET    8
-+#define    RTL8367C_DUMB_I2C_CTL_CODE_MASK    0x7F00
-+#define    RTL8367C_DUMB_RW_I2C_FORMAT_OFFSET    4
-+#define    RTL8367C_DUMB_RW_I2C_FORMAT_MASK    0x10
-+#define    RTL8367C_DUMB_RW_DATA_MODE_OFFSET    2
-+#define    RTL8367C_DUMB_RW_DATA_MODE_MASK    0xC
-+#define    RTL8367C_DUMB_RW_ADDR_MODE_OFFSET    0
-+#define    RTL8367C_DUMB_RW_ADDR_MODE_MASK    0x3
-+
-+#define    RTL8367C_REG_M_I2C_SYS_CTL    0x1d90
-+#define    RTL8367C_M_I2C_SCL_IO_MUX_OFFSET    12
-+#define    RTL8367C_M_I2C_SCL_IO_MUX_MASK    0x3000
-+#define    RTL8367C_M_I2C_SDA_IO_MUX_OFFSET    10
-+#define    RTL8367C_M_I2C_SDA_IO_MUX_MASK    0xC00
-+#define    RTL8367C_M_I2C_SDA_OD_EN_OFFSET    9
-+#define    RTL8367C_M_I2C_SDA_OD_EN_MASK    0x200
-+#define    RTL8367C_M_I2C_SCL_OD_EN_OFFSET    8
-+#define    RTL8367C_M_I2C_SCL_OD_EN_MASK    0x100
-+#define    RTL8367C_M_I2C_SCL_F_DIV_OFFSET    0
-+#define    RTL8367C_M_I2C_SCL_F_DIV_MASK    0xFF
-+
-+#define    RTL8367C_REG_HT_PB_SRAM_CTRL    0x1da0
-+#define    RTL8367C_HTPB_RW_OFFSET    2
-+#define    RTL8367C_HTPB_RW_MASK    0x4
-+#define    RTL8367C_HTPB_SEL_OFFSET    1
-+#define    RTL8367C_HTPB_SEL_MASK    0x2
-+#define    RTL8367C_HTPB_CE_OFFSET    0
-+#define    RTL8367C_HTPB_CE_MASK    0x1
-+
-+#define    RTL8367C_REG_HT_PB_SRAM_ADDR    0x1da1
-+
-+#define    RTL8367C_REG_HT_PB_SRAM_DIN0    0x1da2
-+
-+#define    RTL8367C_REG_HT_PB_SRAM_DIN1    0x1da3
-+
-+#define    RTL8367C_REG_HT_PB_SRAM_DOUT0    0x1da4
-+
-+#define    RTL8367C_REG_HT_PB_SRAM_DOUT1    0x1da5
-+
-+#define    RTL8367C_REG_PHY_STAT_0    0x1db0
-+
-+#define    RTL8367C_REG_PHY_STAT_1    0x1db1
-+
-+#define    RTL8367C_REG_PHY_STAT_2    0x1db2
-+
-+#define    RTL8367C_REG_PHY_STAT_3    0x1db3
-+
-+#define    RTL8367C_REG_PHY_STAT_4    0x1db4
-+
-+#define    RTL8367C_REG_PHY_STAT_5    0x1db5
-+
-+#define    RTL8367C_REG_PHY_STAT_6    0x1db6
-+
-+#define    RTL8367C_REG_PHY_STAT_7    0x1db7
-+
-+#define    RTL8367C_REG_SDS_STAT_0    0x1db8
-+
-+#define    RTL8367C_REG_SDS_STAT_1    0x1db9
-+
-+#define    RTL8367C_REG_MAC_LINK_STAT_0    0x1dba
-+#define    RTL8367C_MAC_LINK_STAT_CUR_0_OFFSET    8
-+#define    RTL8367C_MAC_LINK_STAT_CUR_0_MASK    0xFF00
-+#define    RTL8367C_MAC_LINK_STAT_LATCH_0_OFFSET    0
-+#define    RTL8367C_MAC_LINK_STAT_LATCH_0_MASK    0xFF
-+
-+#define    RTL8367C_REG_MAC_LINK_STAT_1    0x1dbb
-+#define    RTL8367C_MAC_LINK_STAT_1_Reserved_OFFSET    6
-+#define    RTL8367C_MAC_LINK_STAT_1_Reserved_MASK    0xFFC0
-+#define    RTL8367C_MAC_LINK_STAT_CUR_1_OFFSET    3
-+#define    RTL8367C_MAC_LINK_STAT_CUR_1_MASK    0x38
-+#define    RTL8367C_MAC_LINK_STAT_LATCH_1_OFFSET    0
-+#define    RTL8367C_MAC_LINK_STAT_LATCH_1_MASK    0x7
-+
-+#define    RTL8367C_REG_MISC_CONTROL_1    0x1dc0
-+#define    RTL8367C_P7_FB_CPL_OFFSET    2
-+#define    RTL8367C_P7_FB_CPL_MASK    0x4
-+#define    RTL8367C_P6_FB_CPL_OFFSET    1
-+#define    RTL8367C_P6_FB_CPL_MASK    0x2
-+#define    RTL8367C_P5_FB_CPL_OFFSET    0
-+#define    RTL8367C_P5_FB_CPL_MASK    0x1
-+
-+#define    RTL8367C_REG_SDS_MISC_1    0x1dc1
-+#define    RTL8367C_CFG_SGMII_RXFC_1_OFFSET    14
-+#define    RTL8367C_CFG_SGMII_RXFC_1_MASK    0x4000
-+#define    RTL8367C_CFG_SGMII_TXFC_1_OFFSET    13
-+#define    RTL8367C_CFG_SGMII_TXFC_1_MASK    0x2000
-+#define    RTL8367C_CFG_MAC9_SEL_HSGMII_OFFSET    11
-+#define    RTL8367C_CFG_MAC9_SEL_HSGMII_MASK    0x800
-+#define    RTL8367C_CFG_SGMII_FDUP_1_OFFSET    10
-+#define    RTL8367C_CFG_SGMII_FDUP_1_MASK    0x400
-+#define    RTL8367C_CFG_SGMII_LINK_1_OFFSET    9
-+#define    RTL8367C_CFG_SGMII_LINK_1_MASK    0x200
-+#define    RTL8367C_CFG_SGMII_SPD_1_OFFSET    7
-+#define    RTL8367C_CFG_SGMII_SPD_1_MASK    0x180
-+#define    RTL8367C_CFG_MAC9_SEL_SGMII_OFFSET    6
-+#define    RTL8367C_CFG_MAC9_SEL_SGMII_MASK    0x40
-+#define    RTL8367C_CFG_SDS_MODE_14C_1_OFFSET    0
-+#define    RTL8367C_CFG_SDS_MODE_14C_1_MASK    0x7
-+
-+#define    RTL8367C_REG_FIBER_CFG_2_1    0x1dc2
-+#define    RTL8367C_SDS_RX_DISABLE_1_OFFSET    6
-+#define    RTL8367C_SDS_RX_DISABLE_1_MASK    0xC0
-+#define    RTL8367C_SDS_TX_DISABLE_1_OFFSET    4
-+#define    RTL8367C_SDS_TX_DISABLE_1_MASK    0x30
-+#define    RTL8367C_FIBER_CFG_2_1_SDS_PWR_ISO_1_OFFSET    2
-+#define    RTL8367C_FIBER_CFG_2_1_SDS_PWR_ISO_1_MASK    0xC
-+#define    RTL8367C_SDS_FRC_LD_1_OFFSET    0
-+#define    RTL8367C_SDS_FRC_LD_1_MASK    0x3
-+
-+#define    RTL8367C_REG_FIBER_CFG_1_1    0x1dc3
-+#define    RTL8367C_SDS_FRC_REG4_1_OFFSET    12
-+#define    RTL8367C_SDS_FRC_REG4_1_MASK    0x1000
-+#define    RTL8367C_SDS_FRC_REG4_FIB100_1_OFFSET    11
-+#define    RTL8367C_SDS_FRC_REG4_FIB100_1_MASK    0x800
-+#define    RTL8367C_SDS_FRC_MODE_1_OFFSET    3
-+#define    RTL8367C_SDS_FRC_MODE_1_MASK    0x8
-+#define    RTL8367C_SDS_MODE_1_OFFSET    0
-+#define    RTL8367C_SDS_MODE_1_MASK    0x7
-+
-+#define    RTL8367C_REG_PHYSTS_CTRL0_1    0x1dc4
-+#define    RTL8367C_LNKUP_DLY_EN_EXT2_OFFSET    9
-+#define    RTL8367C_LNKUP_DLY_EN_EXT2_MASK    0x200
-+#define    RTL8367C_GE_100M_LNKUP_DLY_EXT2_OFFSET    7
-+#define    RTL8367C_GE_100M_LNKUP_DLY_EXT2_MASK    0x180
-+#define    RTL8367C_PHYSTS_10M_LNKUP_DLY_EXT2_OFFSET    5
-+#define    RTL8367C_PHYSTS_10M_LNKUP_DLY_EXT2_MASK    0x60
-+#define    RTL8367C_LNKUP_DLY_EN_EXT1_OFFSET    4
-+#define    RTL8367C_LNKUP_DLY_EN_EXT1_MASK    0x10
-+#define    RTL8367C_GE_100M_LNKUP_DLY_EXT1_OFFSET    2
-+#define    RTL8367C_GE_100M_LNKUP_DLY_EXT1_MASK    0xC
-+#define    RTL8367C_PHYSTS_10M_LNKUP_DLY_EXT1_OFFSET    0
-+#define    RTL8367C_PHYSTS_10M_LNKUP_DLY_EXT1_MASK    0x3
-+
-+#define    RTL8367C_REG_FIBER_CFG_3_1    0x1dc5
-+#define    RTL8367C_FIBER_CFG_3_1_OFFSET    0
-+#define    RTL8367C_FIBER_CFG_3_1_MASK    0xFFF
-+
-+#define    RTL8367C_REG_FIBER_CFG_4_1    0x1dc6
-+
-+#define    RTL8367C_REG_BUFF_RST_CTRL2_2    0x1dc7
-+#define    RTL8367C_Cfg_buffrst_sysover_thr_1_OFFSET    3
-+#define    RTL8367C_Cfg_buffrst_sysover_thr_1_MASK    0x8
-+#define    RTL8367C_Cfg_buffrst_qover_thr_OFFSET    2
-+#define    RTL8367C_Cfg_buffrst_qover_thr_MASK    0x4
-+#define    RTL8367C_Cfg_buffrst_indscover_thr_1_OFFSET    1
-+#define    RTL8367C_Cfg_buffrst_indscover_thr_1_MASK    0x2
-+#define    RTL8367C_Cfg_buffrst_dscover_thr_1_OFFSET    0
-+#define    RTL8367C_Cfg_buffrst_dscover_thr_1_MASK    0x1
-+
-+#define    RTL8367C_REG_PHY_DEBUG_CNT_CTRL    0x1dc8
-+#define    RTL8367C_PHY_MIB_RST_7_OFFSET    15
-+#define    RTL8367C_PHY_MIB_RST_7_MASK    0x8000
-+#define    RTL8367C_PHY_MIB_RST_6_OFFSET    14
-+#define    RTL8367C_PHY_MIB_RST_6_MASK    0x4000
-+#define    RTL8367C_PHY_MIB_RST_5_OFFSET    13
-+#define    RTL8367C_PHY_MIB_RST_5_MASK    0x2000
-+#define    RTL8367C_PHY_MIB_RST_4_OFFSET    12
-+#define    RTL8367C_PHY_MIB_RST_4_MASK    0x1000
-+#define    RTL8367C_PHY_MIB_RST_3_OFFSET    11
-+#define    RTL8367C_PHY_MIB_RST_3_MASK    0x800
-+#define    RTL8367C_PHY_MIB_RST_2_OFFSET    10
-+#define    RTL8367C_PHY_MIB_RST_2_MASK    0x400
-+#define    RTL8367C_PHY_MIB_RST_1_OFFSET    9
-+#define    RTL8367C_PHY_MIB_RST_1_MASK    0x200
-+#define    RTL8367C_PHY_MIB_RST_0_OFFSET    8
-+#define    RTL8367C_PHY_MIB_RST_0_MASK    0x100
-+#define    RTL8367C_PHY_MIB_EN_7_OFFSET    7
-+#define    RTL8367C_PHY_MIB_EN_7_MASK    0x80
-+#define    RTL8367C_PHY_MIB_EN_6_OFFSET    6
-+#define    RTL8367C_PHY_MIB_EN_6_MASK    0x40
-+#define    RTL8367C_PHY_MIB_EN_5_OFFSET    5
-+#define    RTL8367C_PHY_MIB_EN_5_MASK    0x20
-+#define    RTL8367C_PHY_MIB_EN_4_OFFSET    4
-+#define    RTL8367C_PHY_MIB_EN_4_MASK    0x10
-+#define    RTL8367C_PHY_MIB_EN_3_OFFSET    3
-+#define    RTL8367C_PHY_MIB_EN_3_MASK    0x8
-+#define    RTL8367C_PHY_MIB_EN_2_OFFSET    2
-+#define    RTL8367C_PHY_MIB_EN_2_MASK    0x4
-+#define    RTL8367C_PHY_MIB_EN_1_OFFSET    1
-+#define    RTL8367C_PHY_MIB_EN_1_MASK    0x2
-+#define    RTL8367C_PHY_MIB_EN_0_OFFSET    0
-+#define    RTL8367C_PHY_MIB_EN_0_MASK    0x1
-+
-+#define    RTL8367C_REG_TXPKT_CNT_L_0    0x1dc9
-+
-+#define    RTL8367C_REG_TXPKT_CNT_H_0    0x1dca
-+
-+#define    RTL8367C_REG_RXPKT_CNT_L_0    0x1dcb
-+
-+#define    RTL8367C_REG_RXPKT_CNT_H_0    0x1dcc
-+
-+#define    RTL8367C_REG_TX_CRC_0    0x1dcd
-+
-+#define    RTL8367C_REG_RX_CRC_0    0x1dce
-+
-+#define    RTL8367C_REG_TXPKT_CNT_L_1    0x1dcf
-+
-+#define    RTL8367C_REG_TXPKT_CNT_H_1    0x1dd0
-+
-+#define    RTL8367C_REG_RXPKT_CNT_L_1    0x1dd1
-+
-+#define    RTL8367C_REG_RXPKT_CNT_H_1    0x1dd2
-+
-+#define    RTL8367C_REG_TX_CRC_1    0x1dd3
-+
-+#define    RTL8367C_REG_RX_CRC_1    0x1dd4
-+
-+#define    RTL8367C_REG_TXPKT_CNT_L_2    0x1dd5
-+
-+#define    RTL8367C_REG_TXPKT_CNT_H_2    0x1dd6
-+
-+#define    RTL8367C_REG_RXPKT_CNT_L_2    0x1dd7
-+
-+#define    RTL8367C_REG_RXPKT_CNT_H_2    0x1dd8
-+
-+#define    RTL8367C_REG_TX_CRC_2    0x1dd9
-+
-+#define    RTL8367C_REG_RX_CRC_2    0x1dda
-+
-+#define    RTL8367C_REG_TXPKT_CNT_L_3    0x1ddb
-+
-+#define    RTL8367C_REG_TXPKT_CNT_H_3    0x1ddc
-+
-+#define    RTL8367C_REG_RXPKT_CNT_L_3    0x1ddd
-+
-+#define    RTL8367C_REG_RXPKT_CNT_H_3    0x1dde
-+
-+#define    RTL8367C_REG_TX_CRC_3    0x1ddf
-+
-+#define    RTL8367C_REG_RX_CRC_3    0x1de0
-+
-+#define    RTL8367C_REG_TXPKT_CNT_L_4    0x1de1
-+
-+#define    RTL8367C_REG_TXPKT_CNT_H_4    0x1de2
-+
-+#define    RTL8367C_REG_RXPKT_CNT_L_4    0x1de3
-+
-+#define    RTL8367C_REG_RXPKT_CNT_H_4    0x1de4
-+
-+#define    RTL8367C_REG_TX_CRC_4    0x1de5
-+
-+#define    RTL8367C_REG_RX_CRC_4    0x1de6
-+
-+#define    RTL8367C_REG_TXPKT_CNT_L_5    0x1de7
-+
-+#define    RTL8367C_REG_TXPKT_CNT_H_5    0x1de8
-+
-+#define    RTL8367C_REG_RXPKT_CNT_L_5    0x1de9
-+
-+#define    RTL8367C_REG_RXPKT_CNT_H_5    0x1dea
-+
-+#define    RTL8367C_REG_TX_CRC_5    0x1deb
-+
-+#define    RTL8367C_REG_RX_CRC_5    0x1dec
-+
-+#define    RTL8367C_REG_TXPKT_CNT_L_6    0x1ded
-+
-+#define    RTL8367C_REG_TXPKT_CNT_H_6    0x1dee
-+
-+#define    RTL8367C_REG_RXPKT_CNT_L_6    0x1def
-+
-+#define    RTL8367C_REG_RXPKT_CNT_H_6    0x1df0
-+
-+#define    RTL8367C_REG_TX_CRC_6    0x1df1
-+
-+#define    RTL8367C_REG_RX_CRC_6    0x1df2
-+
-+#define    RTL8367C_REG_TXPKT_CNT_L_7    0x1df3
-+
-+#define    RTL8367C_REG_TXPKT_CNT_H_7    0x1df4
-+
-+#define    RTL8367C_REG_RXPKT_CNT_L_7    0x1df5
-+
-+#define    RTL8367C_REG_RXPKT_CNT_H_7    0x1df6
-+
-+#define    RTL8367C_REG_TX_CRC_7    0x1df7
-+
-+#define    RTL8367C_REG_RX_CRC_7    0x1df8
-+
-+#define    RTL8367C_REG_BOND_DBG_0    0x1df9
-+
-+#define    RTL8367C_REG_BOND_DBG_1    0x1dfa
-+
-+#define    RTL8367C_REG_STRP_DBG_0    0x1dfb
-+
-+#define    RTL8367C_REG_STRP_DBG_1    0x1dfc
-+
-+#define    RTL8367C_REG_STRP_DBG_2    0x1dfd
-+
-+/* (16'h1f00)patch_reg */
-+
-+#define    RTL8367C_REG_INDRECT_ACCESS_CTRL    0x1f00
-+#define    RTL8367C_RW_OFFSET    1
-+#define    RTL8367C_RW_MASK    0x2
-+#define    RTL8367C_CMD_OFFSET    0
-+#define    RTL8367C_CMD_MASK    0x1
-+
-+#define    RTL8367C_REG_INDRECT_ACCESS_STATUS    0x1f01
-+#define    RTL8367C_INDRECT_ACCESS_STATUS_OFFSET    2
-+#define    RTL8367C_INDRECT_ACCESS_STATUS_MASK    0x7
-+
-+#define    RTL8367C_REG_INDRECT_ACCESS_ADDRESS    0x1f02
-+
-+#define    RTL8367C_REG_INDRECT_ACCESS_WRITE_DATA    0x1f03
-+
-+#define    RTL8367C_REG_INDRECT_ACCESS_READ_DATA    0x1f04
-+
-+/* (16'h6200)fib_page */
-+
-+#define    RTL8367C_REG_FIB0_CFG00    0x6200
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_RST_OFFSET    15
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_RST_MASK    0x8000
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_LPK_OFFSET    14
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_LPK_MASK    0x4000
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_SPD_RD_0_OFFSET    13
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_SPD_RD_0_MASK    0x2000
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_ANEN_OFFSET    12
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_ANEN_MASK    0x1000
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_PDOWN_OFFSET    11
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_PDOWN_MASK    0x800
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_ISO_OFFSET    10
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_ISO_MASK    0x400
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_RESTART_OFFSET    9
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_RESTART_MASK    0x200
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_FULLDUP_OFFSET    8
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_FULLDUP_MASK    0x100
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_SPD_RD_1_OFFSET    6
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_SPD_RD_1_MASK    0x40
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_FRCTX_OFFSET    5
-+#define    RTL8367C_FIB0_CFG00_CFG_FIB_FRCTX_MASK    0x20
-+
-+#define    RTL8367C_REG_FIB0_CFG01    0x6201
-+#define    RTL8367C_FIB0_CFG01_CAPBILITY_OFFSET    6
-+#define    RTL8367C_FIB0_CFG01_CAPBILITY_MASK    0xFFC0
-+#define    RTL8367C_FIB0_CFG01_AN_COMPLETE_OFFSET    5
-+#define    RTL8367C_FIB0_CFG01_AN_COMPLETE_MASK    0x20
-+#define    RTL8367C_FIB0_CFG01_R_FAULT_OFFSET    4
-+#define    RTL8367C_FIB0_CFG01_R_FAULT_MASK    0x10
-+#define    RTL8367C_FIB0_CFG01_NWAY_ABILITY_OFFSET    3
-+#define    RTL8367C_FIB0_CFG01_NWAY_ABILITY_MASK    0x8
-+#define    RTL8367C_FIB0_CFG01_LINK_STATUS_OFFSET    2
-+#define    RTL8367C_FIB0_CFG01_LINK_STATUS_MASK    0x4
-+#define    RTL8367C_FIB0_CFG01_JABBER_DETECT_OFFSET    1
-+#define    RTL8367C_FIB0_CFG01_JABBER_DETECT_MASK    0x2
-+#define    RTL8367C_FIB0_CFG01_EXTENDED_CAPBILITY_OFFSET    0
-+#define    RTL8367C_FIB0_CFG01_EXTENDED_CAPBILITY_MASK    0x1
-+
-+#define    RTL8367C_REG_FIB0_CFG02    0x6202
-+
-+#define    RTL8367C_REG_FIB0_CFG03    0x6203
-+#define    RTL8367C_FIB0_CFG03_REALTEK_OUI5_0_OFFSET    10
-+#define    RTL8367C_FIB0_CFG03_REALTEK_OUI5_0_MASK    0xFC00
-+#define    RTL8367C_FIB0_CFG03_MODEL_NO_OFFSET    4
-+#define    RTL8367C_FIB0_CFG03_MODEL_NO_MASK    0x3F0
-+#define    RTL8367C_FIB0_CFG03_REVISION_NO_OFFSET    0
-+#define    RTL8367C_FIB0_CFG03_REVISION_NO_MASK    0xF
-+
-+#define    RTL8367C_REG_FIB0_CFG04    0x6204
-+
-+#define    RTL8367C_REG_FIB0_CFG05    0x6205
-+
-+#define    RTL8367C_REG_FIB0_CFG06    0x6206
-+#define    RTL8367C_FIB0_CFG06_FIB_NP_EN_OFFSET    2
-+#define    RTL8367C_FIB0_CFG06_FIB_NP_EN_MASK    0x4
-+#define    RTL8367C_FIB0_CFG06_RXPAGE_OFFSET    1
-+#define    RTL8367C_FIB0_CFG06_RXPAGE_MASK    0x2
-+
-+#define    RTL8367C_REG_FIB0_CFG07    0x6207
-+
-+#define    RTL8367C_REG_FIB0_CFG08    0x6208
-+
-+#define    RTL8367C_REG_FIB0_CFG09    0x6209
-+
-+#define    RTL8367C_REG_FIB0_CFG10    0x620a
-+
-+#define    RTL8367C_REG_FIB0_CFG11    0x620b
-+
-+#define    RTL8367C_REG_FIB0_CFG12    0x620c
-+
-+#define    RTL8367C_REG_FIB0_CFG13    0x620d
-+#define    RTL8367C_FIB0_CFG13_INDR_FUNC_OFFSET    14
-+#define    RTL8367C_FIB0_CFG13_INDR_FUNC_MASK    0xC000
-+#define    RTL8367C_FIB0_CFG13_DUMMY_OFFSET    5
-+#define    RTL8367C_FIB0_CFG13_DUMMY_MASK    0x3FE0
-+#define    RTL8367C_FIB0_CFG13_INDR_DEVAD_OFFSET    0
-+#define    RTL8367C_FIB0_CFG13_INDR_DEVAD_MASK    0x1F
-+
-+#define    RTL8367C_REG_FIB0_CFG14    0x620e
-+
-+#define    RTL8367C_REG_FIB0_CFG15    0x620f
-+
-+#define    RTL8367C_REG_FIB1_CFG00    0x6210
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_RST_OFFSET    15
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_RST_MASK    0x8000
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_LPK_OFFSET    14
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_LPK_MASK    0x4000
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_SPD_RD_0_OFFSET    13
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_SPD_RD_0_MASK    0x2000
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_ANEN_OFFSET    12
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_ANEN_MASK    0x1000
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_PDOWN_OFFSET    11
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_PDOWN_MASK    0x800
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_ISO_OFFSET    10
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_ISO_MASK    0x400
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_RESTART_OFFSET    9
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_RESTART_MASK    0x200
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_FULLDUP_OFFSET    8
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_FULLDUP_MASK    0x100
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_SPD_RD_1_OFFSET    6
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_SPD_RD_1_MASK    0x40
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_FRCTX_OFFSET    5
-+#define    RTL8367C_FIB1_CFG00_CFG_FIB_FRCTX_MASK    0x20
-+
-+#define    RTL8367C_REG_FIB1_CFG01    0x6211
-+#define    RTL8367C_FIB1_CFG01_CAPBILITY_OFFSET    6
-+#define    RTL8367C_FIB1_CFG01_CAPBILITY_MASK    0xFFC0
-+#define    RTL8367C_FIB1_CFG01_AN_COMPLETE_OFFSET    5
-+#define    RTL8367C_FIB1_CFG01_AN_COMPLETE_MASK    0x20
-+#define    RTL8367C_FIB1_CFG01_R_FAULT_OFFSET    4
-+#define    RTL8367C_FIB1_CFG01_R_FAULT_MASK    0x10
-+#define    RTL8367C_FIB1_CFG01_NWAY_ABILITY_OFFSET    3
-+#define    RTL8367C_FIB1_CFG01_NWAY_ABILITY_MASK    0x8
-+#define    RTL8367C_FIB1_CFG01_LINK_STATUS_OFFSET    2
-+#define    RTL8367C_FIB1_CFG01_LINK_STATUS_MASK    0x4
-+#define    RTL8367C_FIB1_CFG01_JABBER_DETECT_OFFSET    1
-+#define    RTL8367C_FIB1_CFG01_JABBER_DETECT_MASK    0x2
-+#define    RTL8367C_FIB1_CFG01_EXTENDED_CAPBILITY_OFFSET    0
-+#define    RTL8367C_FIB1_CFG01_EXTENDED_CAPBILITY_MASK    0x1
-+
-+#define    RTL8367C_REG_FIB1_CFG02    0x6212
-+
-+#define    RTL8367C_REG_FIB1_CFG03    0x6213
-+#define    RTL8367C_FIB1_CFG03_REALTEK_OUI5_0_OFFSET    10
-+#define    RTL8367C_FIB1_CFG03_REALTEK_OUI5_0_MASK    0xFC00
-+#define    RTL8367C_FIB1_CFG03_MODEL_NO_OFFSET    4
-+#define    RTL8367C_FIB1_CFG03_MODEL_NO_MASK    0x3F0
-+#define    RTL8367C_FIB1_CFG03_REVISION_NO_OFFSET    0
-+#define    RTL8367C_FIB1_CFG03_REVISION_NO_MASK    0xF
-+
-+#define    RTL8367C_REG_FIB1_CFG04    0x6214
-+
-+#define    RTL8367C_REG_FIB1_CFG05    0x6215
-+
-+#define    RTL8367C_REG_FIB1_CFG06    0x6216
-+#define    RTL8367C_FIB1_CFG06_FIB_NP_EN_OFFSET    2
-+#define    RTL8367C_FIB1_CFG06_FIB_NP_EN_MASK    0x4
-+#define    RTL8367C_FIB1_CFG06_RXPAGE_OFFSET    1
-+#define    RTL8367C_FIB1_CFG06_RXPAGE_MASK    0x2
-+
-+#define    RTL8367C_REG_FIB1_CFG07    0x6217
-+
-+#define    RTL8367C_REG_FIB1_CFG08    0x6218
-+
-+#define    RTL8367C_REG_FIB1_CFG09    0x6219
-+
-+#define    RTL8367C_REG_FIB1_CFG10    0x621a
-+
-+#define    RTL8367C_REG_FIB1_CFG11    0x621b
-+
-+#define    RTL8367C_REG_FIB1_CFG12    0x621c
-+
-+#define    RTL8367C_REG_FIB1_CFG13    0x621d
-+#define    RTL8367C_FIB1_CFG13_INDR_FUNC_OFFSET    14
-+#define    RTL8367C_FIB1_CFG13_INDR_FUNC_MASK    0xC000
-+#define    RTL8367C_FIB1_CFG13_DUMMY_OFFSET    5
-+#define    RTL8367C_FIB1_CFG13_DUMMY_MASK    0x3FE0
-+#define    RTL8367C_FIB1_CFG13_INDR_DEVAD_OFFSET    0
-+#define    RTL8367C_FIB1_CFG13_INDR_DEVAD_MASK    0x1F
-+
-+#define    RTL8367C_REG_FIB1_CFG14    0x621e
-+
-+#define    RTL8367C_REG_FIB1_CFG15    0x621f
-+
-+/* (16'h6400)timer_1588 */
-+
-+#define    RTL8367C_REG_PTP_TIME_NSEC_L_NSEC    0x6400
-+
-+#define    RTL8367C_REG_PTP_TIME_NSEC_H_NSEC    0x6401
-+#define    RTL8367C_PTP_TIME_NSEC_H_EXEC_OFFSET    15
-+#define    RTL8367C_PTP_TIME_NSEC_H_EXEC_MASK    0x8000
-+#define    RTL8367C_PTP_TIME_NSEC_H_CMD_OFFSET    12
-+#define    RTL8367C_PTP_TIME_NSEC_H_CMD_MASK    0x3000
-+#define    RTL8367C_PTP_TIME_NSEC_H_NSEC_OFFSET    0
-+#define    RTL8367C_PTP_TIME_NSEC_H_NSEC_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PTP_TIME_SEC_L_SEC    0x6402
-+
-+#define    RTL8367C_REG_PTP_TIME_SEC_H_SEC    0x6403
-+
-+#define    RTL8367C_REG_PTP_TIME_CFG    0x6404
-+#define    RTL8367C_CFG_TIMER_EN_FRC_OFFSET    2
-+#define    RTL8367C_CFG_TIMER_EN_FRC_MASK    0x4
-+#define    RTL8367C_CFG_TIMER_1588_EN_OFFSET    1
-+#define    RTL8367C_CFG_TIMER_1588_EN_MASK    0x2
-+#define    RTL8367C_CFG_CLK_SRC_OFFSET    0
-+#define    RTL8367C_CFG_CLK_SRC_MASK    0x1
-+
-+#define    RTL8367C_REG_OTAG_TPID    0x6405
-+
-+#define    RTL8367C_REG_ITAG_TPID    0x6406
-+
-+#define    RTL8367C_REG_MAC_ADDR_L    0x6407
-+
-+#define    RTL8367C_REG_MAC_ADDR_M    0x6408
-+
-+#define    RTL8367C_REG_MAC_ADDR_H    0x6409
-+
-+#define    RTL8367C_REG_PTP_TIME_NSEC_L_NSEC_RD    0x640a
-+
-+#define    RTL8367C_REG_PTP_TIME_NSEC_H_NSEC_RD    0x640b
-+#define    RTL8367C_PTP_TIME_NSEC_H_NSEC_RD_OFFSET    0
-+#define    RTL8367C_PTP_TIME_NSEC_H_NSEC_RD_MASK    0x7FF
-+
-+#define    RTL8367C_REG_PTP_TIME_SEC_L_SEC_RD    0x640c
-+
-+#define    RTL8367C_REG_PTP_TIME_SEC_H_SEC_RD    0x640d
-+
-+#define    RTL8367C_REG_PTP_TIME_CFG2    0x640e
-+#define    RTL8367C_CFG_EN_OFFLOAD_OFFSET    9
-+#define    RTL8367C_CFG_EN_OFFLOAD_MASK    0x200
-+#define    RTL8367C_CFG_SAVE_OFF_TS_OFFSET    8
-+#define    RTL8367C_CFG_SAVE_OFF_TS_MASK    0x100
-+#define    RTL8367C_CFG_IMR_OFFSET    0
-+#define    RTL8367C_CFG_IMR_MASK    0xFF
-+
-+#define    RTL8367C_REG_PTP_INTERRUPT_CFG    0x640f
-+#define    RTL8367C_P9_INTERRUPT_OFFSET    9
-+#define    RTL8367C_P9_INTERRUPT_MASK    0x200
-+#define    RTL8367C_P8_INTERRUPT_OFFSET    8
-+#define    RTL8367C_P8_INTERRUPT_MASK    0x100
-+#define    RTL8367C_P7_INTERRUPT_OFFSET    7
-+#define    RTL8367C_P7_INTERRUPT_MASK    0x80
-+#define    RTL8367C_P6_INTERRUPT_OFFSET    6
-+#define    RTL8367C_P6_INTERRUPT_MASK    0x40
-+#define    RTL8367C_P5_INTERRUPT_OFFSET    5
-+#define    RTL8367C_P5_INTERRUPT_MASK    0x20
-+#define    RTL8367C_P4_INTERRUPT_OFFSET    4
-+#define    RTL8367C_P4_INTERRUPT_MASK    0x10
-+#define    RTL8367C_P3_INTERRUPT_OFFSET    3
-+#define    RTL8367C_P3_INTERRUPT_MASK    0x8
-+#define    RTL8367C_P2_INTERRUPT_OFFSET    2
-+#define    RTL8367C_P2_INTERRUPT_MASK    0x4
-+#define    RTL8367C_P1_INTERRUPT_OFFSET    1
-+#define    RTL8367C_P1_INTERRUPT_MASK    0x2
-+#define    RTL8367C_P0_INTERRUPT_OFFSET    0
-+#define    RTL8367C_P0_INTERRUPT_MASK    0x1
-+
-+#define    RTL8367C_REG_P0_TX_SYNC_SEQ_ID    0x6410
-+
-+#define    RTL8367C_REG_P0_TX_DELAY_REQ_SEQ_ID    0x6411
-+
-+#define    RTL8367C_REG_P0_TX_PDELAY_REQ_SEQ_ID    0x6412
-+
-+#define    RTL8367C_REG_P0_TX_PDELAY_RESP_SEQ_ID    0x6413
-+
-+#define    RTL8367C_REG_P0_RX_SYNC_SEQ_ID    0x6414
-+
-+#define    RTL8367C_REG_P0_RX_DELAY_REQ_SEQ_ID    0x6415
-+
-+#define    RTL8367C_REG_P0_RX_PDELAY_REQ_SEQ_ID    0x6416
-+
-+#define    RTL8367C_REG_P0_RX_PDELAY_RESP_SEQ_ID    0x6417
-+
-+#define    RTL8367C_REG_P0_PORT_NSEC_15_0    0x6418
-+
-+#define    RTL8367C_REG_P0_PORT_NSEC_26_16    0x6419
-+#define    RTL8367C_P0_PORT_NSEC_26_16_OFFSET    0
-+#define    RTL8367C_P0_PORT_NSEC_26_16_MASK    0x7FF
-+
-+#define    RTL8367C_REG_P0_PORT_SEC_15_0    0x641a
-+
-+#define    RTL8367C_REG_P0_PORT_SEC_31_16    0x641b
-+
-+#define    RTL8367C_REG_P0_EAV_CFG    0x641c
-+#define    RTL8367C_P0_EAV_CFG_PTP_PHY_EN_EN_OFFSET    8
-+#define    RTL8367C_P0_EAV_CFG_PTP_PHY_EN_EN_MASK    0x100
-+#define    RTL8367C_P0_EAV_CFG_RX_PDELAY_RESP_OFFSET    7
-+#define    RTL8367C_P0_EAV_CFG_RX_PDELAY_RESP_MASK    0x80
-+#define    RTL8367C_P0_EAV_CFG_RX_PDELAY_REQ_OFFSET    6
-+#define    RTL8367C_P0_EAV_CFG_RX_PDELAY_REQ_MASK    0x40
-+#define    RTL8367C_P0_EAV_CFG_RX_DELAY_REQ_OFFSET    5
-+#define    RTL8367C_P0_EAV_CFG_RX_DELAY_REQ_MASK    0x20
-+#define    RTL8367C_P0_EAV_CFG_RX_SYNC_OFFSET    4
-+#define    RTL8367C_P0_EAV_CFG_RX_SYNC_MASK    0x10
-+#define    RTL8367C_P0_EAV_CFG_TX_PDELAY_RESP_OFFSET    3
-+#define    RTL8367C_P0_EAV_CFG_TX_PDELAY_RESP_MASK    0x8
-+#define    RTL8367C_P0_EAV_CFG_TX_PDELAY_REQ_OFFSET    2
-+#define    RTL8367C_P0_EAV_CFG_TX_PDELAY_REQ_MASK    0x4
-+#define    RTL8367C_P0_EAV_CFG_TX_DELAY_REQ_OFFSET    1
-+#define    RTL8367C_P0_EAV_CFG_TX_DELAY_REQ_MASK    0x2
-+#define    RTL8367C_P0_EAV_CFG_TX_SYNC_OFFSET    0
-+#define    RTL8367C_P0_EAV_CFG_TX_SYNC_MASK    0x1
-+
-+#define    RTL8367C_REG_P1_TX_SYNC_SEQ_ID    0x6420
-+
-+#define    RTL8367C_REG_P1_TX_DELAY_REQ_SEQ_ID    0x6421
-+
-+#define    RTL8367C_REG_P1_TX_PDELAY_REQ_SEQ_ID    0x6422
-+
-+#define    RTL8367C_REG_P1_TX_PDELAY_RESP_SEQ_ID    0x6423
-+
-+#define    RTL8367C_REG_P1_RX_SYNC_SEQ_ID    0x6424
-+
-+#define    RTL8367C_REG_P1_RX_DELAY_REQ_SEQ_ID    0x6425
-+
-+#define    RTL8367C_REG_P1_RX_PDELAY_REQ_SEQ_ID    0x6426
-+
-+#define    RTL8367C_REG_P1_RX_PDELAY_RESP_SEQ_ID    0x6427
-+
-+#define    RTL8367C_REG_P1_PORT_NSEC_15_0    0x6428
-+
-+#define    RTL8367C_REG_P1_PORT_NSEC_26_16    0x6429
-+#define    RTL8367C_P1_PORT_NSEC_26_16_OFFSET    0
-+#define    RTL8367C_P1_PORT_NSEC_26_16_MASK    0x7FF
-+
-+#define    RTL8367C_REG_P1_PORT_SEC_15_0    0x642a
-+
-+#define    RTL8367C_REG_P1_PORT_SEC_31_16    0x642b
-+
-+#define    RTL8367C_REG_P1_EAV_CFG    0x642c
-+#define    RTL8367C_P1_EAV_CFG_PTP_PHY_EN_EN_OFFSET    8
-+#define    RTL8367C_P1_EAV_CFG_PTP_PHY_EN_EN_MASK    0x100
-+#define    RTL8367C_P1_EAV_CFG_RX_PDELAY_RESP_OFFSET    7
-+#define    RTL8367C_P1_EAV_CFG_RX_PDELAY_RESP_MASK    0x80
-+#define    RTL8367C_P1_EAV_CFG_RX_PDELAY_REQ_OFFSET    6
-+#define    RTL8367C_P1_EAV_CFG_RX_PDELAY_REQ_MASK    0x40
-+#define    RTL8367C_P1_EAV_CFG_RX_DELAY_REQ_OFFSET    5
-+#define    RTL8367C_P1_EAV_CFG_RX_DELAY_REQ_MASK    0x20
-+#define    RTL8367C_P1_EAV_CFG_RX_SYNC_OFFSET    4
-+#define    RTL8367C_P1_EAV_CFG_RX_SYNC_MASK    0x10
-+#define    RTL8367C_P1_EAV_CFG_TX_PDELAY_RESP_OFFSET    3
-+#define    RTL8367C_P1_EAV_CFG_TX_PDELAY_RESP_MASK    0x8
-+#define    RTL8367C_P1_EAV_CFG_TX_PDELAY_REQ_OFFSET    2
-+#define    RTL8367C_P1_EAV_CFG_TX_PDELAY_REQ_MASK    0x4
-+#define    RTL8367C_P1_EAV_CFG_TX_DELAY_REQ_OFFSET    1
-+#define    RTL8367C_P1_EAV_CFG_TX_DELAY_REQ_MASK    0x2
-+#define    RTL8367C_P1_EAV_CFG_TX_SYNC_OFFSET    0
-+#define    RTL8367C_P1_EAV_CFG_TX_SYNC_MASK    0x1
-+
-+#define    RTL8367C_REG_P2_TX_SYNC_SEQ_ID    0x6430
-+
-+#define    RTL8367C_REG_P2_TX_DELAY_REQ_SEQ_ID    0x6431
-+
-+#define    RTL8367C_REG_P2_TX_PDELAY_REQ_SEQ_ID    0x6432
-+
-+#define    RTL8367C_REG_P2_TX_PDELAY_RESP_SEQ_ID    0x6433
-+
-+#define    RTL8367C_REG_P2_RX_SYNC_SEQ_ID    0x6434
-+
-+#define    RTL8367C_REG_P2_RX_DELAY_REQ_SEQ_ID    0x6435
-+
-+#define    RTL8367C_REG_P2_RX_PDELAY_REQ_SEQ_ID    0x6436
-+
-+#define    RTL8367C_REG_P2_RX_PDELAY_RESP_SEQ_ID    0x6437
-+
-+#define    RTL8367C_REG_P2_PORT_NSEC_15_0    0x6438
-+
-+#define    RTL8367C_REG_P2_PORT_NSEC_26_16    0x6439
-+#define    RTL8367C_P2_PORT_NSEC_26_16_OFFSET    0
-+#define    RTL8367C_P2_PORT_NSEC_26_16_MASK    0x7FF
-+
-+#define    RTL8367C_REG_P2_PORT_SEC_15_0    0x643a
-+
-+#define    RTL8367C_REG_P2_PORT_SEC_31_16    0x643b
-+
-+#define    RTL8367C_REG_P2_EAV_CFG    0x643c
-+#define    RTL8367C_P2_EAV_CFG_PTP_PHY_EN_EN_OFFSET    8
-+#define    RTL8367C_P2_EAV_CFG_PTP_PHY_EN_EN_MASK    0x100
-+#define    RTL8367C_P2_EAV_CFG_RX_PDELAY_RESP_OFFSET    7
-+#define    RTL8367C_P2_EAV_CFG_RX_PDELAY_RESP_MASK    0x80
-+#define    RTL8367C_P2_EAV_CFG_RX_PDELAY_REQ_OFFSET    6
-+#define    RTL8367C_P2_EAV_CFG_RX_PDELAY_REQ_MASK    0x40
-+#define    RTL8367C_P2_EAV_CFG_RX_DELAY_REQ_OFFSET    5
-+#define    RTL8367C_P2_EAV_CFG_RX_DELAY_REQ_MASK    0x20
-+#define    RTL8367C_P2_EAV_CFG_RX_SYNC_OFFSET    4
-+#define    RTL8367C_P2_EAV_CFG_RX_SYNC_MASK    0x10
-+#define    RTL8367C_P2_EAV_CFG_TX_PDELAY_RESP_OFFSET    3
-+#define    RTL8367C_P2_EAV_CFG_TX_PDELAY_RESP_MASK    0x8
-+#define    RTL8367C_P2_EAV_CFG_TX_PDELAY_REQ_OFFSET    2
-+#define    RTL8367C_P2_EAV_CFG_TX_PDELAY_REQ_MASK    0x4
-+#define    RTL8367C_P2_EAV_CFG_TX_DELAY_REQ_OFFSET    1
-+#define    RTL8367C_P2_EAV_CFG_TX_DELAY_REQ_MASK    0x2
-+#define    RTL8367C_P2_EAV_CFG_TX_SYNC_OFFSET    0
-+#define    RTL8367C_P2_EAV_CFG_TX_SYNC_MASK    0x1
-+
-+#define    RTL8367C_REG_P3_TX_SYNC_SEQ_ID    0x6440
-+
-+#define    RTL8367C_REG_P3_TX_DELAY_REQ_SEQ_ID    0x6441
-+
-+#define    RTL8367C_REG_P3_TX_PDELAY_REQ_SEQ_ID    0x6442
-+
-+#define    RTL8367C_REG_P3_TX_PDELAY_RESP_SEQ_ID    0x6443
-+
-+#define    RTL8367C_REG_P3_RX_SYNC_SEQ_ID    0x6444
-+
-+#define    RTL8367C_REG_P3_RX_DELAY_REQ_SEQ_ID    0x6445
-+
-+#define    RTL8367C_REG_P3_RX_PDELAY_REQ_SEQ_ID    0x6446
-+
-+#define    RTL8367C_REG_P3_RX_PDELAY_RESP_SEQ_ID    0x6447
-+
-+#define    RTL8367C_REG_P3_PORT_NSEC_15_0    0x6448
-+
-+#define    RTL8367C_REG_P3_PORT_NSEC_26_16    0x6449
-+#define    RTL8367C_P3_PORT_NSEC_26_16_OFFSET    0
-+#define    RTL8367C_P3_PORT_NSEC_26_16_MASK    0x7FF
-+
-+#define    RTL8367C_REG_P3_PORT_SEC_15_0    0x644a
-+
-+#define    RTL8367C_REG_P3_PORT_SEC_31_16    0x644b
-+
-+#define    RTL8367C_REG_P3_EAV_CFG    0x644c
-+#define    RTL8367C_P3_EAV_CFG_PTP_PHY_EN_EN_OFFSET    8
-+#define    RTL8367C_P3_EAV_CFG_PTP_PHY_EN_EN_MASK    0x100
-+#define    RTL8367C_P3_EAV_CFG_RX_PDELAY_RESP_OFFSET    7
-+#define    RTL8367C_P3_EAV_CFG_RX_PDELAY_RESP_MASK    0x80
-+#define    RTL8367C_P3_EAV_CFG_RX_PDELAY_REQ_OFFSET    6
-+#define    RTL8367C_P3_EAV_CFG_RX_PDELAY_REQ_MASK    0x40
-+#define    RTL8367C_P3_EAV_CFG_RX_DELAY_REQ_OFFSET    5
-+#define    RTL8367C_P3_EAV_CFG_RX_DELAY_REQ_MASK    0x20
-+#define    RTL8367C_P3_EAV_CFG_RX_SYNC_OFFSET    4
-+#define    RTL8367C_P3_EAV_CFG_RX_SYNC_MASK    0x10
-+#define    RTL8367C_P3_EAV_CFG_TX_PDELAY_RESP_OFFSET    3
-+#define    RTL8367C_P3_EAV_CFG_TX_PDELAY_RESP_MASK    0x8
-+#define    RTL8367C_P3_EAV_CFG_TX_PDELAY_REQ_OFFSET    2
-+#define    RTL8367C_P3_EAV_CFG_TX_PDELAY_REQ_MASK    0x4
-+#define    RTL8367C_P3_EAV_CFG_TX_DELAY_REQ_OFFSET    1
-+#define    RTL8367C_P3_EAV_CFG_TX_DELAY_REQ_MASK    0x2
-+#define    RTL8367C_P3_EAV_CFG_TX_SYNC_OFFSET    0
-+#define    RTL8367C_P3_EAV_CFG_TX_SYNC_MASK    0x1
-+
-+#define    RTL8367C_REG_P4_TX_SYNC_SEQ_ID    0x6450
-+
-+#define    RTL8367C_REG_P4_TX_DELAY_REQ_SEQ_ID    0x6451
-+
-+#define    RTL8367C_REG_P4_TX_PDELAY_REQ_SEQ_ID    0x6452
-+
-+#define    RTL8367C_REG_P4_TX_PDELAY_RESP_SEQ_ID    0x6453
-+
-+#define    RTL8367C_REG_P4_RX_SYNC_SEQ_ID    0x6454
-+
-+#define    RTL8367C_REG_P4_RX_DELAY_REQ_SEQ_ID    0x6455
-+
-+#define    RTL8367C_REG_P4_RX_PDELAY_REQ_SEQ_ID    0x6456
-+
-+#define    RTL8367C_REG_P4_RX_PDELAY_RESP_SEQ_ID    0x6457
-+
-+#define    RTL8367C_REG_P4_PORT_NSEC_15_0    0x6458
-+
-+#define    RTL8367C_REG_P4_PORT_NSEC_26_16    0x6459
-+#define    RTL8367C_P4_PORT_NSEC_26_16_OFFSET    0
-+#define    RTL8367C_P4_PORT_NSEC_26_16_MASK    0x7FF
-+
-+#define    RTL8367C_REG_P4_PORT_SEC_15_0    0x645a
-+
-+#define    RTL8367C_REG_P4_PORT_SEC_31_16    0x645b
-+
-+#define    RTL8367C_REG_P4_EAV_CFG    0x645c
-+#define    RTL8367C_P4_EAV_CFG_PTP_PHY_EN_EN_OFFSET    8
-+#define    RTL8367C_P4_EAV_CFG_PTP_PHY_EN_EN_MASK    0x100
-+#define    RTL8367C_P4_EAV_CFG_RX_PDELAY_RESP_OFFSET    7
-+#define    RTL8367C_P4_EAV_CFG_RX_PDELAY_RESP_MASK    0x80
-+#define    RTL8367C_P4_EAV_CFG_RX_PDELAY_REQ_OFFSET    6
-+#define    RTL8367C_P4_EAV_CFG_RX_PDELAY_REQ_MASK    0x40
-+#define    RTL8367C_P4_EAV_CFG_RX_DELAY_REQ_OFFSET    5
-+#define    RTL8367C_P4_EAV_CFG_RX_DELAY_REQ_MASK    0x20
-+#define    RTL8367C_P4_EAV_CFG_RX_SYNC_OFFSET    4
-+#define    RTL8367C_P4_EAV_CFG_RX_SYNC_MASK    0x10
-+#define    RTL8367C_P4_EAV_CFG_TX_PDELAY_RESP_OFFSET    3
-+#define    RTL8367C_P4_EAV_CFG_TX_PDELAY_RESP_MASK    0x8
-+#define    RTL8367C_P4_EAV_CFG_TX_PDELAY_REQ_OFFSET    2
-+#define    RTL8367C_P4_EAV_CFG_TX_PDELAY_REQ_MASK    0x4
-+#define    RTL8367C_P4_EAV_CFG_TX_DELAY_REQ_OFFSET    1
-+#define    RTL8367C_P4_EAV_CFG_TX_DELAY_REQ_MASK    0x2
-+#define    RTL8367C_P4_EAV_CFG_TX_SYNC_OFFSET    0
-+#define    RTL8367C_P4_EAV_CFG_TX_SYNC_MASK    0x1
-+
-+#define    RTL8367C_REG_P6_TX_SYNC_SEQ_ID    0x6460
-+
-+#define    RTL8367C_REG_P6_TX_DELAY_REQ_SEQ_ID    0x6461
-+
-+#define    RTL8367C_REG_P6_TX_PDELAY_REQ_SEQ_ID    0x6462
-+
-+#define    RTL8367C_REG_P6_TX_PDELAY_RESP_SEQ_ID    0x6463
-+
-+#define    RTL8367C_REG_P6_RX_SYNC_SEQ_ID    0x6464
-+
-+#define    RTL8367C_REG_P6_RX_DELAY_REQ_SEQ_ID    0x6465
-+
-+#define    RTL8367C_REG_P6_RX_PDELAY_REQ_SEQ_ID    0x6466
-+
-+#define    RTL8367C_REG_P6_RX_PDELAY_RESP_SEQ_ID    0x6467
-+
-+#define    RTL8367C_REG_P6_PORT_NSEC_15_0    0x6468
-+
-+#define    RTL8367C_REG_P6_PORT_NSEC_26_16    0x6469
-+#define    RTL8367C_P6_PORT_NSEC_26_16_OFFSET    0
-+#define    RTL8367C_P6_PORT_NSEC_26_16_MASK    0x7FF
-+
-+#define    RTL8367C_REG_P6_PORT_SEC_15_0    0x646a
-+
-+#define    RTL8367C_REG_P6_PORT_SEC_31_16    0x646b
-+
-+#define    RTL8367C_REG_P6_EAV_CFG    0x646c
-+#define    RTL8367C_P6_EAV_CFG_PTP_PHY_EN_EN_OFFSET    8
-+#define    RTL8367C_P6_EAV_CFG_PTP_PHY_EN_EN_MASK    0x100
-+#define    RTL8367C_P6_EAV_CFG_RX_PDELAY_RESP_OFFSET    7
-+#define    RTL8367C_P6_EAV_CFG_RX_PDELAY_RESP_MASK    0x80
-+#define    RTL8367C_P6_EAV_CFG_RX_PDELAY_REQ_OFFSET    6
-+#define    RTL8367C_P6_EAV_CFG_RX_PDELAY_REQ_MASK    0x40
-+#define    RTL8367C_P6_EAV_CFG_RX_DELAY_REQ_OFFSET    5
-+#define    RTL8367C_P6_EAV_CFG_RX_DELAY_REQ_MASK    0x20
-+#define    RTL8367C_P6_EAV_CFG_RX_SYNC_OFFSET    4
-+#define    RTL8367C_P6_EAV_CFG_RX_SYNC_MASK    0x10
-+#define    RTL8367C_P6_EAV_CFG_TX_PDELAY_RESP_OFFSET    3
-+#define    RTL8367C_P6_EAV_CFG_TX_PDELAY_RESP_MASK    0x8
-+#define    RTL8367C_P6_EAV_CFG_TX_PDELAY_REQ_OFFSET    2
-+#define    RTL8367C_P6_EAV_CFG_TX_PDELAY_REQ_MASK    0x4
-+#define    RTL8367C_P6_EAV_CFG_TX_DELAY_REQ_OFFSET    1
-+#define    RTL8367C_P6_EAV_CFG_TX_DELAY_REQ_MASK    0x2
-+#define    RTL8367C_P6_EAV_CFG_TX_SYNC_OFFSET    0
-+#define    RTL8367C_P6_EAV_CFG_TX_SYNC_MASK    0x1
-+
-+#define    RTL8367C_REG_P7_TX_SYNC_SEQ_ID    0x6470
-+
-+#define    RTL8367C_REG_P7_TX_DELAY_REQ_SEQ_ID    0x6471
-+
-+#define    RTL8367C_REG_P7_TX_PDELAY_REQ_SEQ_ID    0x6472
-+
-+#define    RTL8367C_REG_P7_TX_PDELAY_RESP_SEQ_ID    0x6473
-+
-+#define    RTL8367C_REG_P7_RX_SYNC_SEQ_ID    0x6474
-+
-+#define    RTL8367C_REG_P7_RX_DELAY_REQ_SEQ_ID    0x6475
-+
-+#define    RTL8367C_REG_P7_RX_PDELAY_REQ_SEQ_ID    0x6476
-+
-+#define    RTL8367C_REG_P7_RX_PDELAY_RESP_SEQ_ID    0x6477
-+
-+#define    RTL8367C_REG_P7_PORT_NSEC_15_0    0x6478
-+
-+#define    RTL8367C_REG_P7_PORT_NSEC_26_16    0x6479
-+#define    RTL8367C_P7_PORT_NSEC_26_16_OFFSET    0
-+#define    RTL8367C_P7_PORT_NSEC_26_16_MASK    0x7FF
-+
-+#define    RTL8367C_REG_P7_PORT_SEC_15_0    0x647a
-+
-+#define    RTL8367C_REG_P7_PORT_SEC_31_16    0x647b
-+
-+#define    RTL8367C_REG_P7_EAV_CFG    0x647c
-+#define    RTL8367C_P7_EAV_CFG_PTP_PHY_EN_EN_OFFSET    8
-+#define    RTL8367C_P7_EAV_CFG_PTP_PHY_EN_EN_MASK    0x100
-+#define    RTL8367C_P7_EAV_CFG_RX_PDELAY_RESP_OFFSET    7
-+#define    RTL8367C_P7_EAV_CFG_RX_PDELAY_RESP_MASK    0x80
-+#define    RTL8367C_P7_EAV_CFG_RX_PDELAY_REQ_OFFSET    6
-+#define    RTL8367C_P7_EAV_CFG_RX_PDELAY_REQ_MASK    0x40
-+#define    RTL8367C_P7_EAV_CFG_RX_DELAY_REQ_OFFSET    5
-+#define    RTL8367C_P7_EAV_CFG_RX_DELAY_REQ_MASK    0x20
-+#define    RTL8367C_P7_EAV_CFG_RX_SYNC_OFFSET    4
-+#define    RTL8367C_P7_EAV_CFG_RX_SYNC_MASK    0x10
-+#define    RTL8367C_P7_EAV_CFG_TX_PDELAY_RESP_OFFSET    3
-+#define    RTL8367C_P7_EAV_CFG_TX_PDELAY_RESP_MASK    0x8
-+#define    RTL8367C_P7_EAV_CFG_TX_PDELAY_REQ_OFFSET    2
-+#define    RTL8367C_P7_EAV_CFG_TX_PDELAY_REQ_MASK    0x4
-+#define    RTL8367C_P7_EAV_CFG_TX_DELAY_REQ_OFFSET    1
-+#define    RTL8367C_P7_EAV_CFG_TX_DELAY_REQ_MASK    0x2
-+#define    RTL8367C_P7_EAV_CFG_TX_SYNC_OFFSET    0
-+#define    RTL8367C_P7_EAV_CFG_TX_SYNC_MASK    0x1
-+
-+#define    RTL8367C_REG_P5_TX_SYNC_SEQ_ID    0x6480
-+
-+#define    RTL8367C_REG_P5_TX_DELAY_REQ_SEQ_ID    0x6481
-+
-+#define    RTL8367C_REG_P5_TX_PDELAY_REQ_SEQ_ID    0x6482
-+
-+#define    RTL8367C_REG_P5_TX_PDELAY_RESP_SEQ_ID    0x6483
-+
-+#define    RTL8367C_REG_P5_RX_SYNC_SEQ_ID    0x6484
-+
-+#define    RTL8367C_REG_P5_RX_DELAY_REQ_SEQ_ID    0x6485
-+
-+#define    RTL8367C_REG_P5_RX_PDELAY_REQ_SEQ_ID    0x6486
-+
-+#define    RTL8367C_REG_P5_RX_PDELAY_RESP_SEQ_ID    0x6487
-+
-+#define    RTL8367C_REG_P5_PORT_NSEC_15_0    0x6488
-+
-+#define    RTL8367C_REG_P5_PORT_NSEC_26_16    0x6489
-+#define    RTL8367C_P5_PORT_NSEC_26_16_OFFSET    0
-+#define    RTL8367C_P5_PORT_NSEC_26_16_MASK    0x7FF
-+
-+#define    RTL8367C_REG_P5_PORT_SEC_15_0    0x648a
-+
-+#define    RTL8367C_REG_P5_PORT_SEC_31_16    0x648b
-+
-+#define    RTL8367C_REG_P5_EAV_CFG    0x648c
-+#define    RTL8367C_P5_EAV_CFG_PTP_PHY_EN_EN_OFFSET    8
-+#define    RTL8367C_P5_EAV_CFG_PTP_PHY_EN_EN_MASK    0x100
-+#define    RTL8367C_P5_EAV_CFG_RX_PDELAY_RESP_OFFSET    7
-+#define    RTL8367C_P5_EAV_CFG_RX_PDELAY_RESP_MASK    0x80
-+#define    RTL8367C_P5_EAV_CFG_RX_PDELAY_REQ_OFFSET    6
-+#define    RTL8367C_P5_EAV_CFG_RX_PDELAY_REQ_MASK    0x40
-+#define    RTL8367C_P5_EAV_CFG_RX_DELAY_REQ_OFFSET    5
-+#define    RTL8367C_P5_EAV_CFG_RX_DELAY_REQ_MASK    0x20
-+#define    RTL8367C_P5_EAV_CFG_RX_SYNC_OFFSET    4
-+#define    RTL8367C_P5_EAV_CFG_RX_SYNC_MASK    0x10
-+#define    RTL8367C_P5_EAV_CFG_TX_PDELAY_RESP_OFFSET    3
-+#define    RTL8367C_P5_EAV_CFG_TX_PDELAY_RESP_MASK    0x8
-+#define    RTL8367C_P5_EAV_CFG_TX_PDELAY_REQ_OFFSET    2
-+#define    RTL8367C_P5_EAV_CFG_TX_PDELAY_REQ_MASK    0x4
-+#define    RTL8367C_P5_EAV_CFG_TX_DELAY_REQ_OFFSET    1
-+#define    RTL8367C_P5_EAV_CFG_TX_DELAY_REQ_MASK    0x2
-+#define    RTL8367C_P5_EAV_CFG_TX_SYNC_OFFSET    0
-+#define    RTL8367C_P5_EAV_CFG_TX_SYNC_MASK    0x1
-+
-+#define    RTL8367C_REG_P8_TX_SYNC_SEQ_ID    0x6490
-+
-+#define    RTL8367C_REG_P8_TX_DELAY_REQ_SEQ_ID    0x6491
-+
-+#define    RTL8367C_REG_P8_TX_PDELAY_REQ_SEQ_ID    0x6492
-+
-+#define    RTL8367C_REG_P8_TX_PDELAY_RESP_SEQ_ID    0x6493
-+
-+#define    RTL8367C_REG_P8_RX_SYNC_SEQ_ID    0x6494
-+
-+#define    RTL8367C_REG_P8_RX_DELAY_REQ_SEQ_ID    0x6495
-+
-+#define    RTL8367C_REG_P8_RX_PDELAY_REQ_SEQ_ID    0x6496
-+
-+#define    RTL8367C_REG_P8_RX_PDELAY_RESP_SEQ_ID    0x6497
-+
-+#define    RTL8367C_REG_P8_PORT_NSEC_15_0    0x6498
-+
-+#define    RTL8367C_REG_P8_PORT_NSEC_26_16    0x6499
-+#define    RTL8367C_P8_PORT_NSEC_26_16_OFFSET    0
-+#define    RTL8367C_P8_PORT_NSEC_26_16_MASK    0x7FF
-+
-+#define    RTL8367C_REG_P8_PORT_SEC_15_0    0x649a
-+
-+#define    RTL8367C_REG_P8_PORT_SEC_31_16    0x649b
-+
-+#define    RTL8367C_REG_P8_EAV_CFG    0x649c
-+#define    RTL8367C_P8_EAV_CFG_PTP_PHY_EN_EN_OFFSET    8
-+#define    RTL8367C_P8_EAV_CFG_PTP_PHY_EN_EN_MASK    0x100
-+#define    RTL8367C_P8_EAV_CFG_RX_PDELAY_RESP_OFFSET    7
-+#define    RTL8367C_P8_EAV_CFG_RX_PDELAY_RESP_MASK    0x80
-+#define    RTL8367C_P8_EAV_CFG_RX_PDELAY_REQ_OFFSET    6
-+#define    RTL8367C_P8_EAV_CFG_RX_PDELAY_REQ_MASK    0x40
-+#define    RTL8367C_P8_EAV_CFG_RX_DELAY_REQ_OFFSET    5
-+#define    RTL8367C_P8_EAV_CFG_RX_DELAY_REQ_MASK    0x20
-+#define    RTL8367C_P8_EAV_CFG_RX_SYNC_OFFSET    4
-+#define    RTL8367C_P8_EAV_CFG_RX_SYNC_MASK    0x10
-+#define    RTL8367C_P8_EAV_CFG_TX_PDELAY_RESP_OFFSET    3
-+#define    RTL8367C_P8_EAV_CFG_TX_PDELAY_RESP_MASK    0x8
-+#define    RTL8367C_P8_EAV_CFG_TX_PDELAY_REQ_OFFSET    2
-+#define    RTL8367C_P8_EAV_CFG_TX_PDELAY_REQ_MASK    0x4
-+#define    RTL8367C_P8_EAV_CFG_TX_DELAY_REQ_OFFSET    1
-+#define    RTL8367C_P8_EAV_CFG_TX_DELAY_REQ_MASK    0x2
-+#define    RTL8367C_P8_EAV_CFG_TX_SYNC_OFFSET    0
-+#define    RTL8367C_P8_EAV_CFG_TX_SYNC_MASK    0x1
-+
-+#define    RTL8367C_REG_P9_TX_SYNC_SEQ_ID    0x64a0
-+
-+#define    RTL8367C_REG_P9_TX_DELAY_REQ_SEQ_ID    0x64a1
-+
-+#define    RTL8367C_REG_P9_TX_PDELAY_REQ_SEQ_ID    0x64a2
-+
-+#define    RTL8367C_REG_P9_TX_PDELAY_RESP_SEQ_ID    0x64a3
-+
-+#define    RTL8367C_REG_P9_RX_SYNC_SEQ_ID    0x64a4
-+
-+#define    RTL8367C_REG_P9_RX_DELAY_REQ_SEQ_ID    0x64a5
-+
-+#define    RTL8367C_REG_P9_RX_PDELAY_REQ_SEQ_ID    0x64a6
-+
-+#define    RTL8367C_REG_P9_RX_PDELAY_RESP_SEQ_ID    0x64a7
-+
-+#define    RTL8367C_REG_P9_PORT_NSEC_15_0    0x64a8
-+
-+#define    RTL8367C_REG_P9_PORT_NSEC_26_16    0x64a9
-+#define    RTL8367C_P9_PORT_NSEC_26_16_OFFSET    0
-+#define    RTL8367C_P9_PORT_NSEC_26_16_MASK    0x7FF
-+
-+#define    RTL8367C_REG_P9_PORT_SEC_15_0    0x64aa
-+
-+#define    RTL8367C_REG_P9_PORT_SEC_31_16    0x64ab
-+
-+#define    RTL8367C_REG_P9_EAV_CFG    0x64ac
-+#define    RTL8367C_P9_EAV_CFG_PTP_PHY_EN_EN_OFFSET    8
-+#define    RTL8367C_P9_EAV_CFG_PTP_PHY_EN_EN_MASK    0x100
-+#define    RTL8367C_P9_EAV_CFG_RX_PDELAY_RESP_OFFSET    7
-+#define    RTL8367C_P9_EAV_CFG_RX_PDELAY_RESP_MASK    0x80
-+#define    RTL8367C_P9_EAV_CFG_RX_PDELAY_REQ_OFFSET    6
-+#define    RTL8367C_P9_EAV_CFG_RX_PDELAY_REQ_MASK    0x40
-+#define    RTL8367C_P9_EAV_CFG_RX_DELAY_REQ_OFFSET    5
-+#define    RTL8367C_P9_EAV_CFG_RX_DELAY_REQ_MASK    0x20
-+#define    RTL8367C_P9_EAV_CFG_RX_SYNC_OFFSET    4
-+#define    RTL8367C_P9_EAV_CFG_RX_SYNC_MASK    0x10
-+#define    RTL8367C_P9_EAV_CFG_TX_PDELAY_RESP_OFFSET    3
-+#define    RTL8367C_P9_EAV_CFG_TX_PDELAY_RESP_MASK    0x8
-+#define    RTL8367C_P9_EAV_CFG_TX_PDELAY_REQ_OFFSET    2
-+#define    RTL8367C_P9_EAV_CFG_TX_PDELAY_REQ_MASK    0x4
-+#define    RTL8367C_P9_EAV_CFG_TX_DELAY_REQ_OFFSET    1
-+#define    RTL8367C_P9_EAV_CFG_TX_DELAY_REQ_MASK    0x2
-+#define    RTL8367C_P9_EAV_CFG_TX_SYNC_OFFSET    0
-+#define    RTL8367C_P9_EAV_CFG_TX_SYNC_MASK    0x1
-+
-+/* (16'h6600)sds_indacs_reg */
-+
-+#define    RTL8367C_REG_SDS_INDACS_CMD    0x6600
-+#define    RTL8367C_SDS_CMD_BUSY_OFFSET    8
-+#define    RTL8367C_SDS_CMD_BUSY_MASK    0x100
-+#define    RTL8367C_SDS_CMD_OFFSET    7
-+#define    RTL8367C_SDS_CMD_MASK    0x80
-+#define    RTL8367C_SDS_RWOP_OFFSET    6
-+#define    RTL8367C_SDS_RWOP_MASK    0x40
-+#define    RTL8367C_SDS_INDEX_OFFSET    0
-+#define    RTL8367C_SDS_INDEX_MASK    0x3F
-+
-+#define    RTL8367C_REG_SDS_INDACS_ADR    0x6601
-+#define    RTL8367C_SDS_PAGE_OFFSET    5
-+#define    RTL8367C_SDS_PAGE_MASK    0x7E0
-+#define    RTL8367C_SDS_REGAD_OFFSET    0
-+#define    RTL8367C_SDS_REGAD_MASK    0x1F
-+
-+#define    RTL8367C_REG_SDS_INDACS_DATA    0x6602
-+
-+
-+#endif /*#ifndef _RTL8367C_REG_H_*/
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/smi.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/smi.h
-new file mode 100644
-index 0000000000..b77d760711
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/smi.h
-@@ -0,0 +1,54 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367C switch low-level function for access register
-+ * Feature : SMI related functions
-+ *
-+ */
-+
-+#ifndef __SMI_H__
-+#define __SMI_H__
-+
-+#include <rtk_types.h>
-+#include "rtk_error.h"
-+
-+#define MDC_MDIO_CTRL0_REG          31
-+#define MDC_MDIO_START_REG          29
-+#define MDC_MDIO_CTRL1_REG          21
-+#define MDC_MDIO_ADDRESS_REG        23
-+#define MDC_MDIO_DATA_WRITE_REG     24
-+#define MDC_MDIO_DATA_READ_REG      25
-+#define MDC_MDIO_PREAMBLE_LEN       32
-+
-+#define MDC_MDIO_START_OP          0xFFFF
-+#define MDC_MDIO_ADDR_OP           0x000E
-+#define MDC_MDIO_READ_OP           0x0001
-+#define MDC_MDIO_WRITE_OP          0x0003
-+
-+#define SPI_READ_OP                 0x3
-+#define SPI_WRITE_OP                0x2
-+#define SPI_READ_OP_LEN             0x8
-+#define SPI_WRITE_OP_LEN            0x8
-+#define SPI_REG_LEN                 16
-+#define SPI_DATA_LEN                16
-+
-+#define GPIO_DIR_IN                 1
-+#define GPIO_DIR_OUT                0
-+
-+#define ack_timer                   5
-+
-+#define DELAY                        10000
-+#define CLK_DURATION(clk)            { int i; for(i=0; i<clk; i++); }
-+
-+rtk_int32 smi_read(rtk_uint32 mAddrs, rtk_uint32 *rData);
-+rtk_int32 smi_write(rtk_uint32 mAddrs, rtk_uint32 rData);
-+
-+#endif /* __SMI_H__ */
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/stat.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/stat.h
-new file mode 100644
-index 0000000000..a7357633a1
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/stat.h
-@@ -0,0 +1,433 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes MIB module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_STAT_H__
-+#define __RTK_API_STAT_H__
-+
-+/*
-+ * Data Type Declaration
-+ */
-+typedef rtk_u_long_t rtk_stat_counter_t;
-+
-+/* global statistic counter structure */
-+typedef struct rtk_stat_global_cntr_s
-+{
-+    rtk_uint64 dot1dTpLearnedEntryDiscards;
-+}rtk_stat_global_cntr_t;
-+
-+typedef enum rtk_stat_global_type_e
-+{
-+    DOT1D_TP_LEARNED_ENTRY_DISCARDS_INDEX = 58,
-+    MIB_GLOBAL_CNTR_END
-+}rtk_stat_global_type_t;
-+
-+/* port statistic counter structure */
-+typedef struct rtk_stat_port_cntr_s
-+{
-+    rtk_uint64 ifInOctets;
-+    rtk_uint32 dot3StatsFCSErrors;
-+    rtk_uint32 dot3StatsSymbolErrors;
-+    rtk_uint32 dot3InPauseFrames;
-+    rtk_uint32 dot3ControlInUnknownOpcodes;
-+    rtk_uint32 etherStatsFragments;
-+    rtk_uint32 etherStatsJabbers;
-+    rtk_uint32 ifInUcastPkts;
-+    rtk_uint32 etherStatsDropEvents;
-+    rtk_uint64 etherStatsOctets;
-+    rtk_uint32 etherStatsUndersizePkts;
-+    rtk_uint32 etherStatsOversizePkts;
-+    rtk_uint32 etherStatsPkts64Octets;
-+    rtk_uint32 etherStatsPkts65to127Octets;
-+    rtk_uint32 etherStatsPkts128to255Octets;
-+    rtk_uint32 etherStatsPkts256to511Octets;
-+    rtk_uint32 etherStatsPkts512to1023Octets;
-+    rtk_uint32 etherStatsPkts1024toMaxOctets;
-+    rtk_uint32 etherStatsMcastPkts;
-+    rtk_uint32 etherStatsBcastPkts;
-+    rtk_uint64 ifOutOctets;
-+    rtk_uint32 dot3StatsSingleCollisionFrames;
-+    rtk_uint32 dot3StatsMultipleCollisionFrames;
-+    rtk_uint32 dot3StatsDeferredTransmissions;
-+    rtk_uint32 dot3StatsLateCollisions;
-+    rtk_uint32 etherStatsCollisions;
-+    rtk_uint32 dot3StatsExcessiveCollisions;
-+    rtk_uint32 dot3OutPauseFrames;
-+    rtk_uint32 dot1dBasePortDelayExceededDiscards;
-+    rtk_uint32 dot1dTpPortInDiscards;
-+    rtk_uint32 ifOutUcastPkts;
-+    rtk_uint32 ifOutMulticastPkts;
-+    rtk_uint32 ifOutBrocastPkts;
-+    rtk_uint32 outOampduPkts;
-+    rtk_uint32 inOampduPkts;
-+    rtk_uint32 pktgenPkts;
-+    rtk_uint32 inMldChecksumError;
-+    rtk_uint32 inIgmpChecksumError;
-+    rtk_uint32 inMldSpecificQuery;
-+    rtk_uint32 inMldGeneralQuery;
-+    rtk_uint32 inIgmpSpecificQuery;
-+    rtk_uint32 inIgmpGeneralQuery;
-+    rtk_uint32 inMldLeaves;
-+    rtk_uint32 inIgmpLeaves;
-+    rtk_uint32 inIgmpJoinsSuccess;
-+    rtk_uint32 inIgmpJoinsFail;
-+    rtk_uint32 inMldJoinsSuccess;
-+    rtk_uint32 inMldJoinsFail;
-+    rtk_uint32 inReportSuppressionDrop;
-+    rtk_uint32 inLeaveSuppressionDrop;
-+    rtk_uint32 outIgmpReports;
-+    rtk_uint32 outIgmpLeaves;
-+    rtk_uint32 outIgmpGeneralQuery;
-+    rtk_uint32 outIgmpSpecificQuery;
-+    rtk_uint32 outMldReports;
-+    rtk_uint32 outMldLeaves;
-+    rtk_uint32 outMldGeneralQuery;
-+    rtk_uint32 outMldSpecificQuery;
-+    rtk_uint32 inKnownMulticastPkts;
-+    rtk_uint32 ifInMulticastPkts;
-+    rtk_uint32 ifInBroadcastPkts;
-+    rtk_uint32 ifOutDiscards;
-+}rtk_stat_port_cntr_t;
-+
-+/* port statistic counter index */
-+typedef enum rtk_stat_port_type_e
-+{
-+    STAT_IfInOctets = 0,
-+    STAT_Dot3StatsFCSErrors,
-+    STAT_Dot3StatsSymbolErrors,
-+    STAT_Dot3InPauseFrames,
-+    STAT_Dot3ControlInUnknownOpcodes,
-+    STAT_EtherStatsFragments,
-+    STAT_EtherStatsJabbers,
-+    STAT_IfInUcastPkts,
-+    STAT_EtherStatsDropEvents,
-+    STAT_EtherStatsOctets,
-+    STAT_EtherStatsUnderSizePkts,
-+    STAT_EtherOversizeStats,
-+    STAT_EtherStatsPkts64Octets,
-+    STAT_EtherStatsPkts65to127Octets,
-+    STAT_EtherStatsPkts128to255Octets,
-+    STAT_EtherStatsPkts256to511Octets,
-+    STAT_EtherStatsPkts512to1023Octets,
-+    STAT_EtherStatsPkts1024to1518Octets,
-+    STAT_EtherStatsMulticastPkts,
-+    STAT_EtherStatsBroadcastPkts,
-+    STAT_IfOutOctets,
-+    STAT_Dot3StatsSingleCollisionFrames,
-+    STAT_Dot3StatsMultipleCollisionFrames,
-+    STAT_Dot3StatsDeferredTransmissions,
-+    STAT_Dot3StatsLateCollisions,
-+    STAT_EtherStatsCollisions,
-+    STAT_Dot3StatsExcessiveCollisions,
-+    STAT_Dot3OutPauseFrames,
-+    STAT_Dot1dBasePortDelayExceededDiscards,
-+    STAT_Dot1dTpPortInDiscards,
-+    STAT_IfOutUcastPkts,
-+    STAT_IfOutMulticastPkts,
-+    STAT_IfOutBroadcastPkts,
-+    STAT_OutOampduPkts,
-+    STAT_InOampduPkts,
-+    STAT_PktgenPkts,
-+    STAT_InMldChecksumError,
-+    STAT_InIgmpChecksumError,
-+    STAT_InMldSpecificQuery,
-+    STAT_InMldGeneralQuery,
-+    STAT_InIgmpSpecificQuery,
-+    STAT_InIgmpGeneralQuery,
-+    STAT_InMldLeaves,
-+    STAT_InIgmpInterfaceLeaves,
-+    STAT_InIgmpJoinsSuccess,
-+    STAT_InIgmpJoinsFail,
-+    STAT_InMldJoinsSuccess,
-+    STAT_InMldJoinsFail,
-+    STAT_InReportSuppressionDrop,
-+    STAT_InLeaveSuppressionDrop,
-+    STAT_OutIgmpReports,
-+    STAT_OutIgmpLeaves,
-+    STAT_OutIgmpGeneralQuery,
-+    STAT_OutIgmpSpecificQuery,
-+    STAT_OutMldReports,
-+    STAT_OutMldLeaves,
-+    STAT_OutMldGeneralQuery,
-+    STAT_OutMldSpecificQuery,
-+    STAT_InKnownMulticastPkts,
-+    STAT_IfInMulticastPkts,
-+    STAT_IfInBroadcastPkts,
-+    STAT_IfOutDiscards,
-+    STAT_PORT_CNTR_END
-+}rtk_stat_port_type_t;
-+
-+typedef enum rtk_logging_counter_mode_e
-+{
-+    LOGGING_MODE_32BIT = 0,
-+    LOGGING_MODE_64BIT,
-+    LOGGING_MODE_END
-+}rtk_logging_counter_mode_t;
-+
-+typedef enum rtk_logging_counter_type_e
-+{
-+    LOGGING_TYPE_PACKET = 0,
-+    LOGGING_TYPE_BYTE,
-+    LOGGING_TYPE_END
-+}rtk_logging_counter_type_t;
-+
-+typedef enum rtk_stat_lengthMode_e
-+{
-+    LENGTH_MODE_EXC_TAG = 0,
-+    LENGTH_MODE_INC_TAG,
-+    LENGTH_MODE_END
-+}rtk_stat_lengthMode_t;
-+
-+
-+
-+/* Function Name:
-+ *      rtk_stat_global_reset
-+ * Description:
-+ *      Reset global MIB counter.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      Reset MIB counter of ports. API will use global reset while port mask is all-ports.
-+ */
-+extern rtk_api_ret_t rtk_stat_global_reset(void);
-+
-+/* Function Name:
-+ *      rtk_stat_port_reset
-+ * Description:
-+ *      Reset per port MIB counter by port.
-+ * Input:
-+ *      port - port id.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_stat_port_reset(rtk_port_t port);
-+
-+/* Function Name:
-+ *      rtk_stat_queueManage_reset
-+ * Description:
-+ *      Reset queue manage MIB counter.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_stat_queueManage_reset(void);
-+
-+/* Function Name:
-+ *      rtk_stat_global_get
-+ * Description:
-+ *      Get global MIB counter
-+ * Input:
-+ *      cntr_idx - global counter index.
-+ * Output:
-+ *      pCntr - global counter value.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      Get global MIB counter by index definition.
-+ */
-+extern rtk_api_ret_t rtk_stat_global_get(rtk_stat_global_type_t cntr_idx, rtk_stat_counter_t *pCntr);
-+
-+/* Function Name:
-+ *      rtk_stat_global_getAll
-+ * Description:
-+ *      Get all global MIB counter
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pGlobal_cntrs - global counter structure.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      Get all global MIB counter by index definition.
-+ */
-+extern rtk_api_ret_t rtk_stat_global_getAll(rtk_stat_global_cntr_t *pGlobal_cntrs);
-+
-+/* Function Name:
-+ *      rtk_stat_port_get
-+ * Description:
-+ *      Get per port MIB counter by index
-+ * Input:
-+ *      port        - port id.
-+ *      cntr_idx    - port counter index.
-+ * Output:
-+ *      pCntr - MIB retrived counter.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      Get per port MIB counter by index definition.
-+ */
-+extern rtk_api_ret_t rtk_stat_port_get(rtk_port_t port, rtk_stat_port_type_t cntr_idx, rtk_stat_counter_t *pCntr);
-+
-+/* Function Name:
-+ *      rtk_stat_port_getAll
-+ * Description:
-+ *      Get all counters of one specified port in the specified device.
-+ * Input:
-+ *      port - port id.
-+ * Output:
-+ *      pPort_cntrs - buffer pointer of counter value.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      Get all MIB counters of one port.
-+ */
-+extern rtk_api_ret_t rtk_stat_port_getAll(rtk_port_t port, rtk_stat_port_cntr_t *pPort_cntrs);
-+
-+/* Function Name:
-+ *      rtk_stat_logging_counterCfg_set
-+ * Description:
-+ *      Set the type and mode of Logging Counter
-+ * Input:
-+ *      idx     - The index of Logging Counter. Should be even number only.(0,2,4,6,8.....30)
-+ *      mode    - 32 bits or 64 bits mode
-+ *      type    - Packet counter or byte counter
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_OUT_OF_RANGE - Out of range.
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      Set the type and mode of Logging Counter.
-+ */
-+extern rtk_api_ret_t rtk_stat_logging_counterCfg_set(rtk_uint32 idx, rtk_logging_counter_mode_t mode, rtk_logging_counter_type_t type);
-+
-+/* Function Name:
-+ *      rtk_stat_logging_counterCfg_get
-+ * Description:
-+ *      Get the type and mode of Logging Counter
-+ * Input:
-+ *      idx     - The index of Logging Counter. Should be even number only.(0,2,4,6,8.....30)
-+ * Output:
-+ *      pMode   - 32 bits or 64 bits mode
-+ *      pType   - Packet counter or byte counter
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_OUT_OF_RANGE - Out of range.
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_NULL_POINTER - NULL Pointer
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      Get the type and mode of Logging Counter.
-+ */
-+extern rtk_api_ret_t rtk_stat_logging_counterCfg_get(rtk_uint32 idx, rtk_logging_counter_mode_t *pMode, rtk_logging_counter_type_t *pType);
-+
-+/* Function Name:
-+ *      rtk_stat_logging_counter_reset
-+ * Description:
-+ *      Reset Logging Counter
-+ * Input:
-+ *      idx     - The index of Logging Counter. (0~31)
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_OUT_OF_RANGE - Out of range.
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      Reset Logging Counter.
-+ */
-+extern rtk_api_ret_t rtk_stat_logging_counter_reset(rtk_uint32 idx);
-+
-+/* Function Name:
-+ *      rtk_stat_logging_counter_get
-+ * Description:
-+ *      Get Logging Counter
-+ * Input:
-+ *      idx     - The index of Logging Counter. (0~31)
-+ * Output:
-+ *      pCnt    - Logging counter value
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_OUT_OF_RANGE - Out of range.
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      Get Logging Counter.
-+ */
-+extern rtk_api_ret_t rtk_stat_logging_counter_get(rtk_uint32 idx, rtk_uint32 *pCnt);
-+
-+/* Function Name:
-+ *      rtk_stat_lengthMode_set
-+ * Description:
-+ *      Set Legnth mode.
-+ * Input:
-+ *      txMode     - The length counting mode
-+ *      rxMode     - The length counting mode
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_INPUT        - Out of range.
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_stat_lengthMode_set(rtk_stat_lengthMode_t txMode, rtk_stat_lengthMode_t rxMode);
-+
-+/* Function Name:
-+ *      rtk_stat_lengthMode_get
-+ * Description:
-+ *      Get Legnth mode.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pTxMode       - The length counting mode
-+ *      pRxMode       - The length counting mode
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_INPUT        - Out of range.
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ */
-+extern rtk_api_ret_t rtk_stat_lengthMode_get(rtk_stat_lengthMode_t *pTxMode, rtk_stat_lengthMode_t *pRxMode);
-+
-+#endif /* __RTK_API_STAT_H__ */
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/storm.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/storm.h
-new file mode 100644
-index 0000000000..55a50d750f
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/storm.h
-@@ -0,0 +1,422 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes Storm module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_STORM_H__
-+#define __RTK_API_STORM_H__
-+
-+#define STORM_UNUC_INDEX                            28
-+#define STORM_UNMC_INDEX                            29
-+#define STORM_MC_INDEX                              30
-+#define STORM_BC_INDEX                              31
-+
-+typedef enum rtk_rate_storm_group_e
-+{
-+    STORM_GROUP_UNKNOWN_UNICAST = 0,
-+    STORM_GROUP_UNKNOWN_MULTICAST,
-+    STORM_GROUP_MULTICAST,
-+    STORM_GROUP_BROADCAST,
-+    STORM_GROUP_END
-+} rtk_rate_storm_group_t;
-+
-+typedef enum rtk_storm_bypass_e
-+{
-+    BYPASS_BRG_GROUP = 0,
-+    BYPASS_FD_PAUSE,
-+    BYPASS_SP_MCAST,
-+    BYPASS_1X_PAE,
-+    BYPASS_UNDEF_BRG_04,
-+    BYPASS_UNDEF_BRG_05,
-+    BYPASS_UNDEF_BRG_06,
-+    BYPASS_UNDEF_BRG_07,
-+    BYPASS_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+    BYPASS_UNDEF_BRG_09,
-+    BYPASS_UNDEF_BRG_0A,
-+    BYPASS_UNDEF_BRG_0B,
-+    BYPASS_UNDEF_BRG_0C,
-+    BYPASS_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+    BYPASS_8021AB,
-+    BYPASS_UNDEF_BRG_0F,
-+    BYPASS_BRG_MNGEMENT,
-+    BYPASS_UNDEFINED_11,
-+    BYPASS_UNDEFINED_12,
-+    BYPASS_UNDEFINED_13,
-+    BYPASS_UNDEFINED_14,
-+    BYPASS_UNDEFINED_15,
-+    BYPASS_UNDEFINED_16,
-+    BYPASS_UNDEFINED_17,
-+    BYPASS_UNDEFINED_18,
-+    BYPASS_UNDEFINED_19,
-+    BYPASS_UNDEFINED_1A,
-+    BYPASS_UNDEFINED_1B,
-+    BYPASS_UNDEFINED_1C,
-+    BYPASS_UNDEFINED_1D,
-+    BYPASS_UNDEFINED_1E,
-+    BYPASS_UNDEFINED_1F,
-+    BYPASS_GMRP,
-+    BYPASS_GVRP,
-+    BYPASS_UNDEF_GARP_22,
-+    BYPASS_UNDEF_GARP_23,
-+    BYPASS_UNDEF_GARP_24,
-+    BYPASS_UNDEF_GARP_25,
-+    BYPASS_UNDEF_GARP_26,
-+    BYPASS_UNDEF_GARP_27,
-+    BYPASS_UNDEF_GARP_28,
-+    BYPASS_UNDEF_GARP_29,
-+    BYPASS_UNDEF_GARP_2A,
-+    BYPASS_UNDEF_GARP_2B,
-+    BYPASS_UNDEF_GARP_2C,
-+    BYPASS_UNDEF_GARP_2D,
-+    BYPASS_UNDEF_GARP_2E,
-+    BYPASS_UNDEF_GARP_2F,
-+    BYPASS_IGMP,
-+    BYPASS_CDP,
-+    BYPASS_CSSTP,
-+    BYPASS_LLDP,
-+    BYPASS_END,
-+}rtk_storm_bypass_t;
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlMeterIdx_set
-+ * Description:
-+ *      Set the storm control meter index.
-+ * Input:
-+ *      port       - port id
-+ *      storm_type - storm group type
-+ *      index       - storm control meter index.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID - Invalid port id
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_rate_stormControlMeterIdx_set(rtk_port_t port, rtk_rate_storm_group_t stormType, rtk_uint32 index);
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlMeterIdx_get
-+ * Description:
-+ *      Get the storm control meter index.
-+ * Input:
-+ *      port       - port id
-+ *      storm_type - storm group type
-+ * Output:
-+ *      pIndex     - storm control meter index.
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID - Invalid port id
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_rate_stormControlMeterIdx_get(rtk_port_t port, rtk_rate_storm_group_t stormType, rtk_uint32 *pIndex);
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlPortEnable_set
-+ * Description:
-+ *      Set enable status of storm control on specified port.
-+ * Input:
-+ *      port       - port id
-+ *      stormType  - storm group type
-+ *      enable     - enable status of storm control
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT          - The module is not initial
-+ *      RT_ERR_PORT_ID           - invalid port id
-+ *      RT_ERR_INPUT             - invalid input parameter
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_rate_stormControlPortEnable_set(rtk_port_t port, rtk_rate_storm_group_t stormType, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlPortEnable_set
-+ * Description:
-+ *      Set enable status of storm control on specified port.
-+ * Input:
-+ *      port       - port id
-+ *      stormType  - storm group type
-+ * Output:
-+ *      pEnable     - enable status of storm control
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT          - The module is not initial
-+ *      RT_ERR_PORT_ID           - invalid port id
-+ *      RT_ERR_INPUT             - invalid input parameter
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_rate_stormControlPortEnable_get(rtk_port_t port, rtk_rate_storm_group_t stormType, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_storm_bypass_set
-+ * Description:
-+ *      Set bypass storm filter control configuration.
-+ * Input:
-+ *      type    - Bypass storm filter control type.
-+ *      enable  - Bypass status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_ENABLE       - Invalid IFG parameter
-+ * Note:
-+ *
-+ *      This API can set per-port bypass stomr filter control frame type including RMA and igmp.
-+ *      The bypass frame type is as following:
-+ *      - BYPASS_BRG_GROUP,
-+ *      - BYPASS_FD_PAUSE,
-+ *      - BYPASS_SP_MCAST,
-+ *      - BYPASS_1X_PAE,
-+ *      - BYPASS_UNDEF_BRG_04,
-+ *      - BYPASS_UNDEF_BRG_05,
-+ *      - BYPASS_UNDEF_BRG_06,
-+ *      - BYPASS_UNDEF_BRG_07,
-+ *      - BYPASS_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - BYPASS_UNDEF_BRG_09,
-+ *      - BYPASS_UNDEF_BRG_0A,
-+ *      - BYPASS_UNDEF_BRG_0B,
-+ *      - BYPASS_UNDEF_BRG_0C,
-+ *      - BYPASS_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - BYPASS_8021AB,
-+ *      - BYPASS_UNDEF_BRG_0F,
-+ *      - BYPASS_BRG_MNGEMENT,
-+ *      - BYPASS_UNDEFINED_11,
-+ *      - BYPASS_UNDEFINED_12,
-+ *      - BYPASS_UNDEFINED_13,
-+ *      - BYPASS_UNDEFINED_14,
-+ *      - BYPASS_UNDEFINED_15,
-+ *      - BYPASS_UNDEFINED_16,
-+ *      - BYPASS_UNDEFINED_17,
-+ *      - BYPASS_UNDEFINED_18,
-+ *      - BYPASS_UNDEFINED_19,
-+ *      - BYPASS_UNDEFINED_1A,
-+ *      - BYPASS_UNDEFINED_1B,
-+ *      - BYPASS_UNDEFINED_1C,
-+ *      - BYPASS_UNDEFINED_1D,
-+ *      - BYPASS_UNDEFINED_1E,
-+ *      - BYPASS_UNDEFINED_1F,
-+ *      - BYPASS_GMRP,
-+ *      - BYPASS_GVRP,
-+ *      - BYPASS_UNDEF_GARP_22,
-+ *      - BYPASS_UNDEF_GARP_23,
-+ *      - BYPASS_UNDEF_GARP_24,
-+ *      - BYPASS_UNDEF_GARP_25,
-+ *      - BYPASS_UNDEF_GARP_26,
-+ *      - BYPASS_UNDEF_GARP_27,
-+ *      - BYPASS_UNDEF_GARP_28,
-+ *      - BYPASS_UNDEF_GARP_29,
-+ *      - BYPASS_UNDEF_GARP_2A,
-+ *      - BYPASS_UNDEF_GARP_2B,
-+ *      - BYPASS_UNDEF_GARP_2C,
-+ *      - BYPASS_UNDEF_GARP_2D,
-+ *      - BYPASS_UNDEF_GARP_2E,
-+ *      - BYPASS_UNDEF_GARP_2F,
-+ *      - BYPASS_IGMP.
-+ */
-+extern rtk_api_ret_t rtk_storm_bypass_set(rtk_storm_bypass_t type, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_storm_bypass_get
-+ * Description:
-+ *      Get bypass storm filter control configuration.
-+ * Input:
-+ *      type - Bypass storm filter control type.
-+ * Output:
-+ *      pEnable - Bypass status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can get per-port bypass stomr filter control frame type including RMA and igmp.
-+ *      The bypass frame type is as following:
-+ *      - BYPASS_BRG_GROUP,
-+ *      - BYPASS_FD_PAUSE,
-+ *      - BYPASS_SP_MCAST,
-+ *      - BYPASS_1X_PAE,
-+ *      - BYPASS_UNDEF_BRG_04,
-+ *      - BYPASS_UNDEF_BRG_05,
-+ *      - BYPASS_UNDEF_BRG_06,
-+ *      - BYPASS_UNDEF_BRG_07,
-+ *      - BYPASS_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - BYPASS_UNDEF_BRG_09,
-+ *      - BYPASS_UNDEF_BRG_0A,
-+ *      - BYPASS_UNDEF_BRG_0B,
-+ *      - BYPASS_UNDEF_BRG_0C,
-+ *      - BYPASS_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - BYPASS_8021AB,
-+ *      - BYPASS_UNDEF_BRG_0F,
-+ *      - BYPASS_BRG_MNGEMENT,
-+ *      - BYPASS_UNDEFINED_11,
-+ *      - BYPASS_UNDEFINED_12,
-+ *      - BYPASS_UNDEFINED_13,
-+ *      - BYPASS_UNDEFINED_14,
-+ *      - BYPASS_UNDEFINED_15,
-+ *      - BYPASS_UNDEFINED_16,
-+ *      - BYPASS_UNDEFINED_17,
-+ *      - BYPASS_UNDEFINED_18,
-+ *      - BYPASS_UNDEFINED_19,
-+ *      - BYPASS_UNDEFINED_1A,
-+ *      - BYPASS_UNDEFINED_1B,
-+ *      - BYPASS_UNDEFINED_1C,
-+ *      - BYPASS_UNDEFINED_1D,
-+ *      - BYPASS_UNDEFINED_1E,
-+ *      - BYPASS_UNDEFINED_1F,
-+ *      - BYPASS_GMRP,
-+ *      - BYPASS_GVRP,
-+ *      - BYPASS_UNDEF_GARP_22,
-+ *      - BYPASS_UNDEF_GARP_23,
-+ *      - BYPASS_UNDEF_GARP_24,
-+ *      - BYPASS_UNDEF_GARP_25,
-+ *      - BYPASS_UNDEF_GARP_26,
-+ *      - BYPASS_UNDEF_GARP_27,
-+ *      - BYPASS_UNDEF_GARP_28,
-+ *      - BYPASS_UNDEF_GARP_29,
-+ *      - BYPASS_UNDEF_GARP_2A,
-+ *      - BYPASS_UNDEF_GARP_2B,
-+ *      - BYPASS_UNDEF_GARP_2C,
-+ *      - BYPASS_UNDEF_GARP_2D,
-+ *      - BYPASS_UNDEF_GARP_2E,
-+ *      - BYPASS_UNDEF_GARP_2F,
-+ *      - BYPASS_IGMP.
-+ */
-+extern rtk_api_ret_t rtk_storm_bypass_get(rtk_storm_bypass_t type, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlExtPortmask_set
-+ * Description:
-+ *      Set externsion storm control port mask
-+ * Input:
-+ *      pPortmask  - port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT          - The module is not initial
-+ *      RT_ERR_INPUT             - invalid input parameter
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_rate_stormControlExtPortmask_set(rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlExtPortmask_get
-+ * Description:
-+ *      Set externsion storm control port mask
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pPortmask  - port mask
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT          - The module is not initial
-+ *      RT_ERR_INPUT             - invalid input parameter
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_rate_stormControlExtPortmask_get(rtk_portmask_t *pPortmask);
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlExtEnable_set
-+ * Description:
-+ *      Set externsion storm control state
-+ * Input:
-+ *      stormType   - storm group type
-+ *      enable      - externsion storm control state
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT          - The module is not initial
-+ *      RT_ERR_INPUT             - invalid input parameter
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_rate_stormControlExtEnable_set(rtk_rate_storm_group_t stormType, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlExtEnable_get
-+ * Description:
-+ *      Get externsion storm control state
-+ * Input:
-+ *      stormType   - storm group type
-+ * Output:
-+ *      pEnable     - externsion storm control state
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT          - The module is not initial
-+ *      RT_ERR_INPUT             - invalid input parameter
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_rate_stormControlExtEnable_get(rtk_rate_storm_group_t stormType, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlExtMeterIdx_set
-+ * Description:
-+ *      Set externsion storm control meter index
-+ * Input:
-+ *      stormType   - storm group type
-+ *      index       - externsion storm control state
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT          - The module is not initial
-+ *      RT_ERR_INPUT             - invalid input parameter
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_rate_stormControlExtMeterIdx_set(rtk_rate_storm_group_t stormType, rtk_uint32 index);
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlExtMeterIdx_get
-+ * Description:
-+ *      Get externsion storm control meter index
-+ * Input:
-+ *      stormType   - storm group type
-+ *      pIndex      - externsion storm control state
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT          - The module is not initial
-+ *      RT_ERR_INPUT             - invalid input parameter
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_rate_stormControlExtMeterIdx_get(rtk_rate_storm_group_t stormType, rtk_uint32 *pIndex);
-+
-+
-+
-+#endif /* __RTK_API_STORM_H__ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/svlan.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/svlan.h
-new file mode 100644
-index 0000000000..bcdb02f41d
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/svlan.h
-@@ -0,0 +1,896 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes SVLAN module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_SVLAN_H__
-+#define __RTK_API_SVLAN_H__
-+
-+typedef rtk_uint32 rtk_svlan_index_t;
-+
-+typedef struct rtk_svlan_memberCfg_s{
-+    rtk_uint32 svid;
-+    rtk_portmask_t memberport;
-+    rtk_portmask_t untagport;
-+    rtk_uint32 fiden;
-+    rtk_uint32 fid;
-+    rtk_uint32 priority;
-+    rtk_uint32 efiden;
-+    rtk_uint32 efid;
-+}rtk_svlan_memberCfg_t;
-+
-+typedef enum rtk_svlan_pri_ref_e
-+{
-+    REF_INTERNAL_PRI = 0,
-+    REF_CTAG_PRI,
-+    REF_SVLAN_PRI,
-+    REF_PB_PRI,
-+    REF_PRI_END
-+} rtk_svlan_pri_ref_t;
-+
-+
-+typedef rtk_uint32 rtk_svlan_tpid_t;
-+
-+typedef enum rtk_svlan_untag_action_e
-+{
-+    UNTAG_DROP = 0,
-+    UNTAG_TRAP,
-+    UNTAG_ASSIGN,
-+    UNTAG_END
-+} rtk_svlan_untag_action_t;
-+
-+typedef enum rtk_svlan_unmatch_action_e
-+{
-+    UNMATCH_DROP = 0,
-+    UNMATCH_TRAP,
-+    UNMATCH_ASSIGN,
-+    UNMATCH_END
-+} rtk_svlan_unmatch_action_t;
-+
-+typedef enum rtk_svlan_unassign_action_e
-+{
-+    UNASSIGN_PBSVID = 0,
-+    UNASSIGN_TRAP,
-+    UNASSIGN_END
-+} rtk_svlan_unassign_action_t;
-+
-+
-+typedef enum rtk_svlan_lookupType_e
-+{
-+    SVLAN_LOOKUP_S64MBRCGF  = 0,
-+    SVLAN_LOOKUP_C4KVLAN,
-+    SVLAN_LOOKUP_END,
-+
-+} rtk_svlan_lookupType_t;
-+
-+/* Function Name:
-+ *      rtk_svlan_init
-+ * Description:
-+ *      Initialize SVLAN Configuration
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      Ether type of S-tag in 802.1ad is 0x88a8 and there are existed ether type 0x9100 and 0x9200 for Q-in-Q SLAN design.
-+ *      User can set mathced ether type as service provider supported protocol.
-+ */
-+extern rtk_api_ret_t rtk_svlan_init(void);
-+
-+/* Function Name:
-+ *      rtk_svlan_servicePort_add
-+ * Description:
-+ *      Add one service port in the specified device
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API is setting which port is connected to provider switch. All frames receiving from this port must
-+ *      contain accept SVID in S-tag field.
-+ */
-+extern rtk_api_ret_t rtk_svlan_servicePort_add(rtk_port_t port);
-+
-+/* Function Name:
-+ *      rtk_svlan_servicePort_get
-+ * Description:
-+ *      Get service ports in the specified device.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pSvlan_portmask - pointer buffer of svlan ports.
-+ * Return:
-+ *      RT_ERR_OK          - OK
-+ *      RT_ERR_FAILED      - Failed
-+ *      RT_ERR_SMI         - SMI access error
-+ * Note:
-+ *      This API is setting which port is connected to provider switch. All frames receiving from this port must
-+ *      contain accept SVID in S-tag field.
-+ */
-+extern rtk_api_ret_t rtk_svlan_servicePort_get(rtk_portmask_t *pSvlan_portmask);
-+
-+/* Function Name:
-+ *      rtk_svlan_servicePort_del
-+ * Description:
-+ *      Delete one service port in the specified device
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API is removing SVLAN service port in the specified device.
-+ */
-+extern rtk_api_ret_t rtk_svlan_servicePort_del(rtk_port_t port);
-+
-+/* Function Name:
-+ *      rtk_svlan_tpidEntry_set
-+ * Description:
-+ *      Configure accepted S-VLAN ether type.
-+ * Input:
-+ *      svlan_tag_id - Ether type of S-tag frame parsing in uplink ports.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      Ether type of S-tag in 802.1ad is 0x88a8 and there are existed ether type 0x9100 and 0x9200 for Q-in-Q SLAN design.
-+ *      User can set mathced ether type as service provider supported protocol.
-+ */
-+extern rtk_api_ret_t rtk_svlan_tpidEntry_set(rtk_uint32 svlan_tag_id);
-+
-+/* Function Name:
-+ *      rtk_svlan_tpidEntry_get
-+ * Description:
-+ *      Get accepted S-VLAN ether type setting.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pSvlan_tag_id -  Ether type of S-tag frame parsing in uplink ports.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      This API is setting which port is connected to provider switch. All frames receiving from this port must
-+ *      contain accept SVID in S-tag field.
-+ */
-+extern rtk_api_ret_t rtk_svlan_tpidEntry_get(rtk_uint32 *pSvlan_tag_id);
-+
-+/* Function Name:
-+ *      rtk_svlan_priorityRef_set
-+ * Description:
-+ *      Set S-VLAN upstream priority reference setting.
-+ * Input:
-+ *      ref - reference selection parameter.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      The API can set the upstream SVLAN tag priority reference source. The related priority
-+ *      sources are as following:
-+ *      - REF_INTERNAL_PRI,
-+ *      - REF_CTAG_PRI,
-+ *      - REF_SVLAN_PRI,
-+ *      - REF_PB_PRI.
-+ */
-+extern rtk_api_ret_t rtk_svlan_priorityRef_set(rtk_svlan_pri_ref_t ref);
-+
-+/* Function Name:
-+ *      rtk_svlan_priorityRef_get
-+ * Description:
-+ *      Get S-VLAN upstream priority reference setting.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pRef - reference selection parameter.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      The API can get the upstream SVLAN tag priority reference source. The related priority
-+ *      sources are as following:
-+ *      - REF_INTERNAL_PRI,
-+ *      - REF_CTAG_PRI,
-+ *      - REF_SVLAN_PRI,
-+ *      - REF_PB_PRI
-+ */
-+extern rtk_api_ret_t rtk_svlan_priorityRef_get(rtk_svlan_pri_ref_t *pRef);
-+
-+/* Function Name:
-+ *      rtk_svlan_memberPortEntry_set
-+ * Description:
-+ *      Configure system SVLAN member content
-+ * Input:
-+ *      svid - SVLAN id
-+ *      psvlan_cfg - SVLAN member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameter.
-+ *      RT_ERR_SVLAN_VID        - Invalid SVLAN VID parameter.
-+ *      RT_ERR_PORT_MASK        - Invalid portmask.
-+ *      RT_ERR_SVLAN_TABLE_FULL - SVLAN configuration is full.
-+ * Note:
-+ *      The API can set system 64 accepted s-tag frame format. Only 64 SVID S-tag frame will be accpeted
-+ *      to receiving from uplink ports. Other SVID S-tag frame or S-untagged frame will be droped by default setup.
-+ *      - rtk_svlan_memberCfg_t->svid is SVID of SVLAN member configuration.
-+ *      - rtk_svlan_memberCfg_t->memberport is member port mask of SVLAN member configuration.
-+ *      - rtk_svlan_memberCfg_t->fid is filtering database of SVLAN member configuration.
-+ *      - rtk_svlan_memberCfg_t->priority is priority of SVLAN member configuration.
-+ */
-+extern rtk_api_ret_t rtk_svlan_memberPortEntry_set(rtk_uint32 svid_idx, rtk_svlan_memberCfg_t *psvlan_cfg);
-+
-+/* Function Name:
-+ *      rtk_svlan_memberPortEntry_get
-+ * Description:
-+ *      Get SVLAN member Configure.
-+ * Input:
-+ *      svid - SVLAN id
-+ * Output:
-+ *      pSvlan_cfg - SVLAN member configuration
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can get system 64 accepted s-tag frame format. Only 64 SVID S-tag frame will be accpeted
-+ *      to receiving from uplink ports. Other SVID S-tag frame or S-untagged frame will be droped.
-+ */
-+extern rtk_api_ret_t rtk_svlan_memberPortEntry_get(rtk_uint32 svid_idx, rtk_svlan_memberCfg_t *pSvlan_cfg);
-+
-+/* Function Name:
-+ *      rtk_svlan_memberPortEntry_adv_set
-+ * Description:
-+ *      Configure system SVLAN member by index
-+ * Input:
-+ *      idx         - Index (0 ~ 63)
-+ *      psvlan_cfg  - SVLAN member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameter.
-+ *      RT_ERR_SVLAN_VID        - Invalid SVLAN VID parameter.
-+ *      RT_ERR_PORT_MASK        - Invalid portmask.
-+ *      RT_ERR_SVLAN_TABLE_FULL - SVLAN configuration is full.
-+ * Note:
-+ *      The API can set system 64 accepted s-tag frame format by index.
-+ *      - rtk_svlan_memberCfg_t->svid is SVID of SVLAN member configuration.
-+ *      - rtk_svlan_memberCfg_t->memberport is member port mask of SVLAN member configuration.
-+ *      - rtk_svlan_memberCfg_t->fid is filtering database of SVLAN member configuration.
-+ *      - rtk_svlan_memberCfg_t->priority is priority of SVLAN member configuration.
-+ */
-+extern rtk_api_ret_t rtk_svlan_memberPortEntry_adv_set(rtk_uint32 idx, rtk_svlan_memberCfg_t *pSvlan_cfg);
-+
-+/* Function Name:
-+ *      rtk_svlan_memberPortEntry_adv_get
-+ * Description:
-+ *      Get SVLAN member Configure by index.
-+ * Input:
-+ *      idx         - Index (0 ~ 63)
-+ * Output:
-+ *      pSvlan_cfg  - SVLAN member configuration
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can get system 64 accepted s-tag frame format. Only 64 SVID S-tag frame will be accpeted
-+ *      to receiving from uplink ports. Other SVID S-tag frame or S-untagged frame will be droped.
-+ */
-+extern rtk_api_ret_t rtk_svlan_memberPortEntry_adv_get(rtk_uint32 idx, rtk_svlan_memberCfg_t *pSvlan_cfg);
-+
-+/* Function Name:
-+ *      rtk_svlan_defaultSvlan_set
-+ * Description:
-+ *      Configure default egress SVLAN.
-+ * Input:
-+ *      port - Source port
-+ *      svid - SVLAN id
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_INPUT                    - Invalid input parameter.
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ * Note:
-+ *      The API can set port n S-tag format index while receiving frame from port n
-+ *      is transmit through uplink port with s-tag field
-+ */
-+extern rtk_api_ret_t rtk_svlan_defaultSvlan_set(rtk_port_t port, rtk_vlan_t svid);
-+
-+/* Function Name:
-+ *      rtk_svlan_defaultSvlan_get
-+ * Description:
-+ *      Get the configure default egress SVLAN.
-+ * Input:
-+ *      port - Source port
-+ * Output:
-+ *      pSvid - SVLAN VID
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get port n S-tag format index while receiving frame from port n
-+ *      is transmit through uplink port with s-tag field
-+ */
-+extern rtk_api_ret_t rtk_svlan_defaultSvlan_get(rtk_port_t port, rtk_vlan_t *pSvid);
-+
-+/* Function Name:
-+ *      rtk_svlan_c2s_add
-+ * Description:
-+ *      Configure SVLAN C2S table
-+ * Input:
-+ *      vid - VLAN ID
-+ *      src_port - Ingress Port
-+ *      svid - SVLAN VID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port ID.
-+ *      RT_ERR_SVLAN_VID    - Invalid SVLAN VID parameter.
-+ *      RT_ERR_VLAN_VID     - Invalid VID parameter.
-+ *      RT_ERR_OUT_OF_RANGE - input out of range.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can set system C2S configuration. ASIC will check upstream's VID and assign related
-+ *      SVID to mathed packet. There are 128 SVLAN C2S configurations.
-+ */
-+extern rtk_api_ret_t rtk_svlan_c2s_add(rtk_vlan_t vid, rtk_port_t src_port, rtk_vlan_t svid);
-+
-+/* Function Name:
-+ *      rtk_svlan_c2s_del
-+ * Description:
-+ *      Delete one C2S entry
-+ * Input:
-+ *      vid - VLAN ID
-+ *      src_port - Ingress Port
-+ *      svid - SVLAN VID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_VLAN_VID         - Invalid VID parameter.
-+ *      RT_ERR_PORT_ID          - Invalid port ID.
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ * Note:
-+ *      The API can delete system C2S configuration. There are 128 SVLAN C2S configurations.
-+ */
-+extern rtk_api_ret_t rtk_svlan_c2s_del(rtk_vlan_t vid, rtk_port_t src_port);
-+
-+/* Function Name:
-+ *      rtk_svlan_c2s_get
-+ * Description:
-+ *      Get configure SVLAN C2S table
-+ * Input:
-+ *      vid - VLAN ID
-+ *      src_port - Ingress Port
-+ * Output:
-+ *      pSvid - SVLAN ID
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port ID.
-+ *      RT_ERR_OUT_OF_RANGE - input out of range.
-+ * Note:
-+ *     The API can get system C2S configuration. There are 128 SVLAN C2S configurations.
-+ */
-+extern rtk_api_ret_t rtk_svlan_c2s_get(rtk_vlan_t vid, rtk_port_t src_port, rtk_vlan_t *pSvid);
-+
-+/* Function Name:
-+ *      rtk_svlan_untag_action_set
-+ * Description:
-+ *      Configure Action of downstream Un-Stag packet
-+ * Input:
-+ *      action  - Action for UnStag
-+ *      svid    - The SVID assigned to UnStag packet
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can configure action of downstream Un-Stag packet. A SVID assigned
-+ *      to the un-stag is also supported by this API. The parameter of svid is
-+ *      only referenced when the action is set to UNTAG_ASSIGN
-+ */
-+extern rtk_api_ret_t rtk_svlan_untag_action_set(rtk_svlan_untag_action_t action, rtk_vlan_t svid);
-+
-+/* Function Name:
-+ *      rtk_svlan_untag_action_get
-+ * Description:
-+ *      Get Action of downstream Un-Stag packet
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pAction  - Action for UnStag
-+ *      pSvid    - The SVID assigned to UnStag packet
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can Get action of downstream Un-Stag packet. A SVID assigned
-+ *      to the un-stag is also retrieved by this API. The parameter pSvid is
-+ *      only refernced when the action is UNTAG_ASSIGN
-+ */
-+extern rtk_api_ret_t rtk_svlan_untag_action_get(rtk_svlan_untag_action_t *pAction, rtk_vlan_t *pSvid);
-+
-+/* Function Name:
-+ *      rtk_svlan_unmatch_action_set
-+ * Description:
-+ *      Configure Action of downstream Unmatch packet
-+ * Input:
-+ *      action  - Action for Unmatch
-+ *      svid    - The SVID assigned to Unmatch packet
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can configure action of downstream Un-match packet. A SVID assigned
-+ *      to the un-match is also supported by this API. The parameter od svid is
-+ *      only refernced when the action is set to UNMATCH_ASSIGN
-+ */
-+extern rtk_api_ret_t rtk_svlan_unmatch_action_set(rtk_svlan_unmatch_action_t action, rtk_vlan_t svid);
-+
-+/* Function Name:
-+ *      rtk_svlan_unmatch_action_get
-+ * Description:
-+ *      Get Action of downstream Unmatch packet
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pAction  - Action for Unmatch
-+ *      pSvid    - The SVID assigned to Unmatch packet
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can Get action of downstream Un-match packet. A SVID assigned
-+ *      to the un-match is also retrieved by this API. The parameter pSvid is
-+ *      only refernced when the action is UNMATCH_ASSIGN
-+ */
-+extern rtk_api_ret_t rtk_svlan_unmatch_action_get(rtk_svlan_unmatch_action_t *pAction, rtk_vlan_t *pSvid);
-+
-+/* Function Name:
-+ *      rtk_svlan_dmac_vidsel_set
-+ * Description:
-+ *      Set DMAC CVID selection
-+ * Input:
-+ *      port    - Port
-+ *      enable  - state of DMAC CVID Selection
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      This API can set DMAC CVID Selection state
-+ */
-+extern rtk_api_ret_t rtk_svlan_dmac_vidsel_set(rtk_port_t port, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_svlan_dmac_vidsel_get
-+ * Description:
-+ *      Get DMAC CVID selection
-+ * Input:
-+ *      port    - Port
-+ * Output:
-+ *      pEnable - state of DMAC CVID Selection
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      This API can get DMAC CVID Selection state
-+ */
-+extern rtk_api_ret_t rtk_svlan_dmac_vidsel_get(rtk_port_t port, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_svlan_ipmc2s_add
-+ * Description:
-+ *      add ip multicast address to SVLAN
-+ * Input:
-+ *      svid    - SVLAN VID
-+ *      ipmc    - ip multicast address
-+ *      ipmcMsk - ip multicast mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can set IP mutlicast to SVID configuration. If upstream packet is IPv4 multicast
-+ *      packet and DIP is matched MC2S configuration, ASIC will assign egress SVID to the packet.
-+ *      There are 32 SVLAN multicast configurations for IP and L2 multicast.
-+ */
-+extern rtk_api_ret_t rtk_svlan_ipmc2s_add(ipaddr_t ipmc, ipaddr_t ipmcMsk, rtk_vlan_t svid);
-+
-+/* Function Name:
-+ *      rtk_svlan_ipmc2s_del
-+ * Description:
-+ *      delete ip multicast address to SVLAN
-+ * Input:
-+ *      ipmc    - ip multicast address
-+ *      ipmcMsk - ip multicast mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_SVLAN_VID        - Invalid SVLAN VID parameter.
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ * Note:
-+ *      The API can delete IP mutlicast to SVID configuration. There are 32 SVLAN multicast configurations for IP and L2 multicast.
-+ */
-+extern rtk_api_ret_t rtk_svlan_ipmc2s_del(ipaddr_t ipmc, ipaddr_t ipmcMsk);
-+
-+/* Function Name:
-+ *      rtk_svlan_ipmc2s_get
-+ * Description:
-+ *      Get ip multicast address to SVLAN
-+ * Input:
-+ *      ipmc    - ip multicast address
-+ *      ipmcMsk - ip multicast mask
-+ * Output:
-+ *      pSvid - SVLAN VID
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_OUT_OF_RANGE - input out of range.
-+ * Note:
-+ *      The API can get IP mutlicast to SVID configuration. There are 32 SVLAN multicast configurations for IP and L2 multicast.
-+ */
-+extern rtk_api_ret_t rtk_svlan_ipmc2s_get(ipaddr_t ipmc, ipaddr_t ipmcMsk, rtk_vlan_t *pSvid);
-+
-+/* Function Name:
-+ *      rtk_svlan_l2mc2s_add
-+ * Description:
-+ *      Add L2 multicast address to SVLAN
-+ * Input:
-+ *      mac     - L2 multicast address
-+ *      macMsk  - L2 multicast address mask
-+ *      svid    - SVLAN VID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can set L2 Mutlicast to SVID configuration. If upstream packet is L2 multicast
-+ *      packet and DMAC is matched, ASIC will assign egress SVID to the packet. There are 32
-+ *      SVLAN multicast configurations for IP and L2 multicast.
-+ */
-+extern rtk_api_ret_t rtk_svlan_l2mc2s_add(rtk_mac_t mac, rtk_mac_t macMsk, rtk_vlan_t svid);
-+
-+/* Function Name:
-+ *      rtk_svlan_l2mc2s_del
-+ * Description:
-+ *      delete L2 multicast address to SVLAN
-+ * Input:
-+ *      mac     - L2 multicast address
-+ *      macMsk  - L2 multicast address mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_SVLAN_VID        - Invalid SVLAN VID parameter.
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ * Note:
-+ *      The API can delete Mutlicast to SVID configuration. There are 32 SVLAN multicast configurations for IP and L2 multicast.
-+ */
-+extern rtk_api_ret_t rtk_svlan_l2mc2s_del(rtk_mac_t mac, rtk_mac_t macMsk);
-+
-+/* Function Name:
-+ *      rtk_svlan_l2mc2s_get
-+ * Description:
-+ *      Get L2 multicast address to SVLAN
-+ * Input:
-+ *      mac     - L2 multicast address
-+ *      macMsk  - L2 multicast address mask
-+ * Output:
-+ *      pSvid   - SVLAN VID
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ * Note:
-+ *      The API can get L2 mutlicast to SVID configuration. There are 32 SVLAN multicast configurations for IP and L2 multicast.
-+ */
-+extern rtk_api_ret_t rtk_svlan_l2mc2s_get(rtk_mac_t mac, rtk_mac_t macMsk, rtk_vlan_t *pSvid);
-+
-+/* Function Name:
-+ *      rtk_svlan_sp2c_add
-+ * Description:
-+ *      Add system SP2C configuration
-+ * Input:
-+ *      cvid        - VLAN ID
-+ *      dst_port    - Destination port of SVLAN to CVLAN configuration
-+ *      svid        - SVLAN VID
-+ *
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_SVLAN_VID    - Invalid SVLAN VID parameter.
-+ *      RT_ERR_VLAN_VID     - Invalid VID parameter.
-+ *      RT_ERR_OUT_OF_RANGE - input out of range.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can add SVID & Destination Port to CVLAN configuration. The downstream frames with assigned
-+ *      SVID will be add C-tag with assigned CVID if the output port is the assigned destination port.
-+ *      There are 128 SP2C configurations.
-+ */
-+extern rtk_api_ret_t rtk_svlan_sp2c_add(rtk_vlan_t svid, rtk_port_t dst_port, rtk_vlan_t cvid);
-+
-+/* Function Name:
-+ *      rtk_svlan_sp2c_get
-+ * Description:
-+ *      Get configure system SP2C content
-+ * Input:
-+ *      svid        - SVLAN VID
-+ *      dst_port    - Destination port of SVLAN to CVLAN configuration
-+ * Output:
-+ *      pCvid - VLAN ID
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_OUT_OF_RANGE - input out of range.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_SVLAN_VID    - Invalid SVLAN VID parameter.
-+ * Note:
-+ *     The API can get SVID & Destination Port to CVLAN configuration. There are 128 SP2C configurations.
-+ */
-+extern rtk_api_ret_t rtk_svlan_sp2c_get(rtk_vlan_t svid, rtk_port_t dst_port, rtk_vlan_t *pCvid);
-+
-+/* Function Name:
-+ *      rtk_svlan_sp2c_del
-+ * Description:
-+ *      Delete system SP2C configuration
-+ * Input:
-+ *      svid        - SVLAN VID
-+ *      dst_port    - Destination port of SVLAN to CVLAN configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_SVLAN_VID    - Invalid SVLAN VID parameter.
-+ *      RT_ERR_OUT_OF_RANGE - input out of range.
-+ * Note:
-+ *      The API can delete SVID & Destination Port to CVLAN configuration. There are 128 SP2C configurations.
-+ */
-+extern rtk_api_ret_t rtk_svlan_sp2c_del(rtk_vlan_t svid, rtk_port_t dst_port);
-+
-+
-+/* Function Name:
-+ *      rtk_svlan_lookupType_set
-+ * Description:
-+ *      Set lookup type of SVLAN
-+ * Input:
-+ *      type        - lookup type
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ * Note:
-+ *      none
-+ */
-+extern rtk_api_ret_t rtk_svlan_lookupType_set(rtk_svlan_lookupType_t type);
-+
-+/* Function Name:
-+ *      rtk_svlan_lookupType_get
-+ * Description:
-+ *      Get lookup type of SVLAN
-+ * Input:
-+ *      pType       - lookup type
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ * Note:
-+ *      none
-+ */
-+extern rtk_api_ret_t rtk_svlan_lookupType_get(rtk_svlan_lookupType_t *pType);
-+
-+/* Function Name:
-+ *      rtk_svlan_trapPri_set
-+ * Description:
-+ *      Set svlan trap priority
-+ * Input:
-+ *      priority - priority for trap packets
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_QOS_INT_PRIORITY
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_svlan_trapPri_set(rtk_pri_t priority);
-+
-+/* Function Name:
-+ *      rtk_svlan_trapPri_get
-+ * Description:
-+ *      Get svlan trap priority
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pPriority - priority for trap packets
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_svlan_trapPri_get(rtk_pri_t *pPriority);
-+
-+/* Function Name:
-+ *      rtk_svlan_unassign_action_set
-+ * Description:
-+ *      Configure Action of upstream without svid assign action
-+ * Input:
-+ *      action  - Action for Un-assign
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can configure action of upstream Un-assign svid packet. If action is not
-+ *      trap to CPU, the port-based SVID sure be assign as system need
-+ */
-+extern rtk_api_ret_t rtk_svlan_unassign_action_set(rtk_svlan_unassign_action_t action);
-+
-+/* Function Name:
-+ *      rtk_svlan_unassign_action_get
-+ * Description:
-+ *      Get action of upstream without svid assignment
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pAction  - Action for Un-assign
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ * Note:
-+ *      None
-+ */
-+extern rtk_api_ret_t rtk_svlan_unassign_action_get(rtk_svlan_unassign_action_t *pAction);
-+
-+
-+/* Function Name:
-+ *      rtk_svlan_checkAndCreateMbr
-+ * Description:
-+ *      Check and create Member configuration and return index
-+ * Input:
-+ *      vid  - VLAN id.
-+ * Output:
-+ *      pIndex  - Member configuration index
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_VLAN_VID     - Invalid VLAN ID.
-+ *      RT_ERR_TBL_FULL     - Member Configuration table full
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_svlan_checkAndCreateMbr(rtk_vlan_t vid, rtk_uint32 *pIndex);
-+
-+
-+#endif /* __RTK_API_SVLAN_H__ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/trap.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/trap.h
-new file mode 100644
-index 0000000000..0cdb64a77b
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/trap.h
-@@ -0,0 +1,757 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes Trap module high-layer API defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_TRAP_H__
-+#define __RTK_API_TRAP_H__
-+
-+
-+typedef enum rtk_trap_type_e
-+{
-+    TRAP_BRG_GROUP = 0,
-+    TRAP_FD_PAUSE,
-+    TRAP_SP_MCAST,
-+    TRAP_1X_PAE,
-+    TRAP_UNDEF_BRG_04,
-+    TRAP_UNDEF_BRG_05,
-+    TRAP_UNDEF_BRG_06,
-+    TRAP_UNDEF_BRG_07,
-+    TRAP_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+    TRAP_UNDEF_BRG_09,
-+    TRAP_UNDEF_BRG_0A,
-+    TRAP_UNDEF_BRG_0B,
-+    TRAP_UNDEF_BRG_0C,
-+    TRAP_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+    TRAP_8021AB,
-+    TRAP_UNDEF_BRG_0F,
-+    TRAP_BRG_MNGEMENT,
-+    TRAP_UNDEFINED_11,
-+    TRAP_UNDEFINED_12,
-+    TRAP_UNDEFINED_13,
-+    TRAP_UNDEFINED_14,
-+    TRAP_UNDEFINED_15,
-+    TRAP_UNDEFINED_16,
-+    TRAP_UNDEFINED_17,
-+    TRAP_UNDEFINED_18,
-+    TRAP_UNDEFINED_19,
-+    TRAP_UNDEFINED_1A,
-+    TRAP_UNDEFINED_1B,
-+    TRAP_UNDEFINED_1C,
-+    TRAP_UNDEFINED_1D,
-+    TRAP_UNDEFINED_1E,
-+    TRAP_UNDEFINED_1F,
-+    TRAP_GMRP,
-+    TRAP_GVRP,
-+    TRAP_UNDEF_GARP_22,
-+    TRAP_UNDEF_GARP_23,
-+    TRAP_UNDEF_GARP_24,
-+    TRAP_UNDEF_GARP_25,
-+    TRAP_UNDEF_GARP_26,
-+    TRAP_UNDEF_GARP_27,
-+    TRAP_UNDEF_GARP_28,
-+    TRAP_UNDEF_GARP_29,
-+    TRAP_UNDEF_GARP_2A,
-+    TRAP_UNDEF_GARP_2B,
-+    TRAP_UNDEF_GARP_2C,
-+    TRAP_UNDEF_GARP_2D,
-+    TRAP_UNDEF_GARP_2E,
-+    TRAP_UNDEF_GARP_2F,
-+    TRAP_CDP,
-+    TRAP_CSSTP,
-+    TRAP_LLDP,
-+    TRAP_END,
-+}rtk_trap_type_t;
-+
-+
-+typedef enum rtk_mcast_type_e
-+{
-+    MCAST_L2 = 0,
-+    MCAST_IPV4,
-+    MCAST_IPV6,
-+    MCAST_END
-+} rtk_mcast_type_t;
-+
-+typedef enum rtk_trap_mcast_action_e
-+{
-+    MCAST_ACTION_FORWARD = 0,
-+    MCAST_ACTION_DROP,
-+    MCAST_ACTION_TRAP2CPU,
-+    MCAST_ACTION_ROUTER_PORT,
-+    MCAST_ACTION_DROP_EX_RMA,
-+    MCAST_ACTION_END
-+} rtk_trap_mcast_action_t;
-+
-+typedef enum rtk_trap_rma_action_e
-+{
-+    RMA_ACTION_FORWARD = 0,
-+    RMA_ACTION_TRAP2CPU,
-+    RMA_ACTION_DROP,
-+    RMA_ACTION_FORWARD_EXCLUDE_CPU,
-+    RMA_ACTION_END
-+} rtk_trap_rma_action_t;
-+
-+typedef enum rtk_trap_ucast_action_e
-+{
-+    UCAST_ACTION_FORWARD_PMASK = 0,
-+    UCAST_ACTION_DROP,
-+    UCAST_ACTION_TRAP2CPU,
-+    UCAST_ACTION_FLOODING,
-+    UCAST_ACTION_END
-+} rtk_trap_ucast_action_t;
-+
-+typedef enum rtk_trap_ucast_type_e
-+{
-+    UCAST_UNKNOWNDA = 0,
-+    UCAST_UNKNOWNSA,
-+    UCAST_UNMATCHSA,
-+    UCAST_END
-+} rtk_trap_ucast_type_t;
-+
-+typedef enum rtk_trap_reason_type_e
-+{
-+    TRAP_REASON_RMA = 0,
-+    TRAP_REASON_OAM,
-+    TRAP_REASON_1XUNAUTH,
-+    TRAP_REASON_VLANSTACK,
-+    TRAP_REASON_UNKNOWNMC,
-+    TRAP_REASON_END,
-+} rtk_trap_reason_type_t;
-+
-+
-+/* Function Name:
-+ *      rtk_trap_unknownUnicastPktAction_set
-+ * Description:
-+ *      Set unknown unicast packet action configuration.
-+ * Input:
-+ *      port            - ingress port ID for unknown unicast packet
-+ *      ucast_action    - Unknown unicast action.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_NOT_ALLOWED         - Invalid action.
-+ *      RT_ERR_INPUT               - Invalid input parameters.
-+ * Note:
-+ *      This API can set unknown unicast packet action configuration.
-+ *      The unknown unicast action is as following:
-+ *          - UCAST_ACTION_FORWARD_PMASK
-+ *          - UCAST_ACTION_DROP
-+ *          - UCAST_ACTION_TRAP2CPU
-+ *          - UCAST_ACTION_FLOODING
-+ */
-+rtk_api_ret_t rtk_trap_unknownUnicastPktAction_set(rtk_port_t port, rtk_trap_ucast_action_t ucast_action);
-+
-+/* Function Name:
-+ *      rtk_trap_unknownUnicastPktAction_get
-+ * Description:
-+ *      Get unknown unicast packet action configuration.
-+ * Input:
-+ *      port            - ingress port ID for unknown unicast packet
-+ * Output:
-+ *      pUcast_action   - Unknown unicast action.
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_NOT_ALLOWED         - Invalid action.
-+ *      RT_ERR_INPUT               - Invalid input parameters.
-+ *      RT_ERR_NULL_POINTER        - Null pointer
-+ * Note:
-+ *      This API can get unknown unicast packet action configuration.
-+ *      The unknown unicast action is as following:
-+ *          - UCAST_ACTION_FORWARD_PMASK
-+ *          - UCAST_ACTION_DROP
-+ *          - UCAST_ACTION_TRAP2CPU
-+ *          - UCAST_ACTION_FLOODING
-+ */
-+rtk_api_ret_t rtk_trap_unknownUnicastPktAction_get(rtk_port_t port, rtk_trap_ucast_action_t *pUcast_action);
-+
-+/* Function Name:
-+ *      rtk_trap_unknownMacPktAction_set
-+ * Description:
-+ *      Set unknown source MAC packet action configuration.
-+ * Input:
-+ *      ucast_action    - Unknown source MAC action.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_NOT_ALLOWED         - Invalid action.
-+ *      RT_ERR_INPUT               - Invalid input parameters.
-+ * Note:
-+ *      This API can set unknown unicast packet action configuration.
-+ *      The unknown unicast action is as following:
-+ *          - UCAST_ACTION_FORWARD_PMASK
-+ *          - UCAST_ACTION_DROP
-+ *          - UCAST_ACTION_TRAP2CPU
-+ */
-+extern rtk_api_ret_t rtk_trap_unknownMacPktAction_set(rtk_trap_ucast_action_t ucast_action);
-+
-+/* Function Name:
-+ *      rtk_trap_unknownMacPktAction_get
-+ * Description:
-+ *      Get unknown source MAC packet action configuration.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pUcast_action   - Unknown source MAC action.
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_NULL_POINTER        - Null Pointer.
-+ *      RT_ERR_INPUT               - Invalid input parameters.
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_trap_unknownMacPktAction_get(rtk_trap_ucast_action_t *pUcast_action);
-+
-+/* Function Name:
-+ *      rtk_trap_unmatchMacPktAction_set
-+ * Description:
-+ *      Set unmatch source MAC packet action configuration.
-+ * Input:
-+ *      ucast_action    - Unknown source MAC action.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_NOT_ALLOWED         - Invalid action.
-+ *      RT_ERR_INPUT               - Invalid input parameters.
-+ * Note:
-+ *      This API can set unknown unicast packet action configuration.
-+ *      The unknown unicast action is as following:
-+ *          - UCAST_ACTION_FORWARD_PMASK
-+ *          - UCAST_ACTION_DROP
-+ *          - UCAST_ACTION_TRAP2CPU
-+ */
-+extern rtk_api_ret_t rtk_trap_unmatchMacPktAction_set(rtk_trap_ucast_action_t ucast_action);
-+
-+/* Function Name:
-+ *      rtk_trap_unmatchMacPktAction_get
-+ * Description:
-+ *      Get unmatch source MAC packet action configuration.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pUcast_action   - Unknown source MAC action.
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_NOT_ALLOWED         - Invalid action.
-+ *      RT_ERR_INPUT               - Invalid input parameters.
-+ * Note:
-+ *      This API can set unknown unicast packet action configuration.
-+ *      The unknown unicast action is as following:
-+ *          - UCAST_ACTION_FORWARD_PMASK
-+ *          - UCAST_ACTION_DROP
-+ *          - UCAST_ACTION_TRAP2CPU
-+ */
-+extern rtk_api_ret_t rtk_trap_unmatchMacPktAction_get(rtk_trap_ucast_action_t *pUcast_action);
-+
-+/* Function Name:
-+ *      rtk_trap_unmatchMacMoving_set
-+ * Description:
-+ *      Set unmatch source MAC packet moving state.
-+ * Input:
-+ *      port        - Port ID.
-+ *      enable      - ENABLED: allow SA moving, DISABLE: don't allow SA moving.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_NOT_ALLOWED         - Invalid action.
-+ *      RT_ERR_INPUT               - Invalid input parameters.
-+ * Note:
-+ */
-+extern rtk_api_ret_t rtk_trap_unmatchMacMoving_set(rtk_port_t port, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_trap_unmatchMacMoving_get
-+ * Description:
-+ *      Set unmatch source MAC packet moving state.
-+ * Input:
-+ *      port        - Port ID.
-+ * Output:
-+ *      pEnable     - ENABLED: allow SA moving, DISABLE: don't allow SA moving.
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_NOT_ALLOWED         - Invalid action.
-+ *      RT_ERR_INPUT               - Invalid input parameters.
-+ * Note:
-+ */
-+extern rtk_api_ret_t rtk_trap_unmatchMacMoving_get(rtk_port_t port, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_trap_unknownMcastPktAction_set
-+ * Description:
-+ *      Set behavior of unknown multicast
-+ * Input:
-+ *      port            - Port id.
-+ *      type            - unknown multicast packet type.
-+ *      mcast_action    - unknown multicast action.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_NOT_ALLOWED  - Invalid action.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      When receives an unknown multicast packet, switch may trap, drop or flood this packet
-+ *      (1) The unknown multicast packet type is as following:
-+ *          - MCAST_L2
-+ *          - MCAST_IPV4
-+ *          - MCAST_IPV6
-+ *      (2) The unknown multicast action is as following:
-+ *          - MCAST_ACTION_FORWARD
-+ *          - MCAST_ACTION_DROP
-+ *          - MCAST_ACTION_TRAP2CPU
-+ */
-+extern rtk_api_ret_t rtk_trap_unknownMcastPktAction_set(rtk_port_t port, rtk_mcast_type_t type, rtk_trap_mcast_action_t mcast_action);
-+
-+/* Function Name:
-+ *      rtk_trap_unknownMcastPktAction_get
-+ * Description:
-+ *      Get behavior of unknown multicast
-+ * Input:
-+ *      type - unknown multicast packet type.
-+ * Output:
-+ *      pMcast_action - unknown multicast action.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_NOT_ALLOWED      - Invalid operation.
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ * Note:
-+ *      When receives an unknown multicast packet, switch may trap, drop or flood this packet
-+ *      (1) The unknown multicast packet type is as following:
-+ *          - MCAST_L2
-+ *          - MCAST_IPV4
-+ *          - MCAST_IPV6
-+ *      (2) The unknown multicast action is as following:
-+ *          - MCAST_ACTION_FORWARD
-+ *          - MCAST_ACTION_DROP
-+ *          - MCAST_ACTION_TRAP2CPU
-+ */
-+extern rtk_api_ret_t rtk_trap_unknownMcastPktAction_get(rtk_port_t port, rtk_mcast_type_t type, rtk_trap_mcast_action_t *pMcast_action);
-+
-+/* Function Name:
-+ *      rtk_trap_lldpEnable_set
-+ * Description:
-+ *      Set LLDP enable.
-+ * Input:
-+ *      enabled - LLDP enable, 0: follow RMA, 1: use LLDP action.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_NOT_ALLOWED      - Invalid action.
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ * Note:
-+ *      - DMAC                                                 Assignment
-+ *      - 01:80:c2:00:00:0e ethertype = 0x88CC    LLDP
-+ *      - 01:80:c2:00:00:03 ethertype = 0x88CC
-+ *      - 01:80:c2:00:00:00 ethertype = 0x88CC
-+
-+ */
-+extern rtk_api_ret_t rtk_trap_lldpEnable_set(rtk_enable_t enabled);
-+
-+/* Function Name:
-+ *      rtk_trap_lldpEnable_get
-+ * Description:
-+ *      Get LLDP status.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnabled - LLDP enable, 0: follow RMA, 1: use LLDP action.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      LLDP is as following definition.
-+ *      - DMAC                                                 Assignment
-+ *      - 01:80:c2:00:00:0e ethertype = 0x88CC    LLDP
-+ *      - 01:80:c2:00:00:03 ethertype = 0x88CC
-+ *      - 01:80:c2:00:00:00 ethertype = 0x88CC
-+ */
-+extern rtk_api_ret_t rtk_trap_lldpEnable_get(rtk_enable_t *pEnabled);
-+
-+/* Function Name:
-+ *      rtk_trap_reasonTrapToCpuPriority_set
-+ * Description:
-+ *      Set priority value of a packet that trapped to CPU port according to specific reason.
-+ * Input:
-+ *      type     - reason that trap to CPU port.
-+ *      priority - internal priority that is going to be set for specific trap reason.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT - The module is not initial
-+ *      RT_ERR_INPUT    - Invalid input parameter
-+ * Note:
-+ *      Currently the trap reason that supported are listed as follows:
-+ *      - TRAP_REASON_RMA
-+ *      - TRAP_REASON_OAM
-+ *      - TRAP_REASON_1XUNAUTH
-+ *      - TRAP_REASON_VLANSTACK
-+ *      - TRAP_REASON_UNKNOWNMC
-+ */
-+extern rtk_api_ret_t rtk_trap_reasonTrapToCpuPriority_set(rtk_trap_reason_type_t type, rtk_pri_t priority);
-+
-+/* Function Name:
-+ *      rtk_trap_reasonTrapToCpuPriority_get
-+ * Description:
-+ *      Get priority value of a packet that trapped to CPU port according to specific reason.
-+ * Input:
-+ *      type      - reason that trap to CPU port.
-+ * Output:
-+ *      pPriority - configured internal priority for such reason.
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT     - The module is not initial
-+ *      RT_ERR_INPUT        - Invalid input parameter
-+ *      RT_ERR_NULL_POINTER - NULL pointer
-+ * Note:
-+ *      Currently the trap reason that supported are listed as follows:
-+ *      - TRAP_REASON_RMA
-+ *      - TRAP_REASON_OAM
-+ *      - TRAP_REASON_1XUNAUTH
-+ *      - TRAP_REASON_VLANSTACK
-+ *      - TRAP_REASON_UNKNOWNMC
-+ */
-+extern rtk_api_ret_t rtk_trap_reasonTrapToCpuPriority_get(rtk_trap_reason_type_t type, rtk_pri_t *pPriority);
-+
-+/* Function Name:
-+ *      rtk_trap_rmaAction_set
-+ * Description:
-+ *      Set Reserved multicast address action configuration.
-+ * Input:
-+ *      type    - rma type.
-+ *      rma_action - RMA action.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_ENABLE       - Invalid IFG parameter
-+ * Note:
-+ *
-+ *      There are 48 types of Reserved Multicast Address frame for application usage.
-+ *      (1)They are as following definition.
-+ *      - TRAP_BRG_GROUP,
-+ *      - TRAP_FD_PAUSE,
-+ *      - TRAP_SP_MCAST,
-+ *      - TRAP_1X_PAE,
-+ *      - TRAP_UNDEF_BRG_04,
-+ *      - TRAP_UNDEF_BRG_05,
-+ *      - TRAP_UNDEF_BRG_06,
-+ *      - TRAP_UNDEF_BRG_07,
-+ *      - TRAP_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - TRAP_UNDEF_BRG_09,
-+ *      - TRAP_UNDEF_BRG_0A,
-+ *      - TRAP_UNDEF_BRG_0B,
-+ *      - TRAP_UNDEF_BRG_0C,
-+ *      - TRAP_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - TRAP_8021AB,
-+ *      - TRAP_UNDEF_BRG_0F,
-+ *      - TRAP_BRG_MNGEMENT,
-+ *      - TRAP_UNDEFINED_11,
-+ *      - TRAP_UNDEFINED_12,
-+ *      - TRAP_UNDEFINED_13,
-+ *      - TRAP_UNDEFINED_14,
-+ *      - TRAP_UNDEFINED_15,
-+ *      - TRAP_UNDEFINED_16,
-+ *      - TRAP_UNDEFINED_17,
-+ *      - TRAP_UNDEFINED_18,
-+ *      - TRAP_UNDEFINED_19,
-+ *      - TRAP_UNDEFINED_1A,
-+ *      - TRAP_UNDEFINED_1B,
-+ *      - TRAP_UNDEFINED_1C,
-+ *      - TRAP_UNDEFINED_1D,
-+ *      - TRAP_UNDEFINED_1E,
-+ *      - TRAP_UNDEFINED_1F,
-+ *      - TRAP_GMRP,
-+ *      - TRAP_GVRP,
-+ *      - TRAP_UNDEF_GARP_22,
-+ *      - TRAP_UNDEF_GARP_23,
-+ *      - TRAP_UNDEF_GARP_24,
-+ *      - TRAP_UNDEF_GARP_25,
-+ *      - TRAP_UNDEF_GARP_26,
-+ *      - TRAP_UNDEF_GARP_27,
-+ *      - TRAP_UNDEF_GARP_28,
-+ *      - TRAP_UNDEF_GARP_29,
-+ *      - TRAP_UNDEF_GARP_2A,
-+ *      - TRAP_UNDEF_GARP_2B,
-+ *      - TRAP_UNDEF_GARP_2C,
-+ *      - TRAP_UNDEF_GARP_2D,
-+ *      - TRAP_UNDEF_GARP_2E,
-+ *      - TRAP_UNDEF_GARP_2F,
-+ *      - TRAP_CDP.
-+ *      - TRAP_CSSTP.
-+ *      - TRAP_LLDP.
-+ *      (2) The RMA action is as following:
-+ *      - RMA_ACTION_FORWARD
-+ *      - RMA_ACTION_TRAP2CPU
-+ *      - RMA_ACTION_DROP
-+ *      - RMA_ACTION_FORWARD_EXCLUDE_CPU
-+ */
-+extern rtk_api_ret_t rtk_trap_rmaAction_set(rtk_trap_type_t type, rtk_trap_rma_action_t rma_action);
-+
-+/* Function Name:
-+ *      rtk_trap_rmaAction_get
-+ * Description:
-+ *      Get Reserved multicast address action configuration.
-+ * Input:
-+ *      type - rma type.
-+ * Output:
-+ *      pRma_action - RMA action.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      There are 48 types of Reserved Multicast Address frame for application usage.
-+ *      (1)They are as following definition.
-+ *      - TRAP_BRG_GROUP,
-+ *      - TRAP_FD_PAUSE,
-+ *      - TRAP_SP_MCAST,
-+ *      - TRAP_1X_PAE,
-+ *      - TRAP_UNDEF_BRG_04,
-+ *      - TRAP_UNDEF_BRG_05,
-+ *      - TRAP_UNDEF_BRG_06,
-+ *      - TRAP_UNDEF_BRG_07,
-+ *      - TRAP_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - TRAP_UNDEF_BRG_09,
-+ *      - TRAP_UNDEF_BRG_0A,
-+ *      - TRAP_UNDEF_BRG_0B,
-+ *      - TRAP_UNDEF_BRG_0C,
-+ *      - TRAP_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - TRAP_8021AB,
-+ *      - TRAP_UNDEF_BRG_0F,
-+ *      - TRAP_BRG_MNGEMENT,
-+ *      - TRAP_UNDEFINED_11,
-+ *      - TRAP_UNDEFINED_12,
-+ *      - TRAP_UNDEFINED_13,
-+ *      - TRAP_UNDEFINED_14,
-+ *      - TRAP_UNDEFINED_15,
-+ *      - TRAP_UNDEFINED_16,
-+ *      - TRAP_UNDEFINED_17,
-+ *      - TRAP_UNDEFINED_18,
-+ *      - TRAP_UNDEFINED_19,
-+ *      - TRAP_UNDEFINED_1A,
-+ *      - TRAP_UNDEFINED_1B,
-+ *      - TRAP_UNDEFINED_1C,
-+ *      - TRAP_UNDEFINED_1D,
-+ *      - TRAP_UNDEFINED_1E,
-+ *      - TRAP_UNDEFINED_1F,
-+ *      - TRAP_GMRP,
-+ *      - TRAP_GVRP,
-+ *      - TRAP_UNDEF_GARP_22,
-+ *      - TRAP_UNDEF_GARP_23,
-+ *      - TRAP_UNDEF_GARP_24,
-+ *      - TRAP_UNDEF_GARP_25,
-+ *      - TRAP_UNDEF_GARP_26,
-+ *      - TRAP_UNDEF_GARP_27,
-+ *      - TRAP_UNDEF_GARP_28,
-+ *      - TRAP_UNDEF_GARP_29,
-+ *      - TRAP_UNDEF_GARP_2A,
-+ *      - TRAP_UNDEF_GARP_2B,
-+ *      - TRAP_UNDEF_GARP_2C,
-+ *      - TRAP_UNDEF_GARP_2D,
-+ *      - TRAP_UNDEF_GARP_2E,
-+ *      - TRAP_UNDEF_GARP_2F,
-+ *      - TRAP_CDP.
-+ *      - TRAP_CSSTP.
-+ *      - TRAP_LLDP.
-+ *      (2) The RMA action is as following:
-+ *      - RMA_ACTION_FORWARD
-+ *      - RMA_ACTION_TRAP2CPU
-+ *      - RMA_ACTION_DROP
-+ *      - RMA_ACTION_FORWARD_EXCLUDE_CPU
-+ */
-+extern rtk_api_ret_t rtk_trap_rmaAction_get(rtk_trap_type_t type, rtk_trap_rma_action_t *pRma_action);
-+
-+/* Function Name:
-+ *      rtk_trap_rmaKeepFormat_set
-+ * Description:
-+ *      Set Reserved multicast address keep format configuration.
-+ * Input:
-+ *      type    - rma type.
-+ *      enable - enable keep format.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_ENABLE       - Invalid IFG parameter
-+ * Note:
-+ *
-+ *      There are 48 types of Reserved Multicast Address frame for application usage.
-+ *      They are as following definition.
-+ *      - TRAP_BRG_GROUP,
-+ *      - TRAP_FD_PAUSE,
-+ *      - TRAP_SP_MCAST,
-+ *      - TRAP_1X_PAE,
-+ *      - TRAP_UNDEF_BRG_04,
-+ *      - TRAP_UNDEF_BRG_05,
-+ *      - TRAP_UNDEF_BRG_06,
-+ *      - TRAP_UNDEF_BRG_07,
-+ *      - TRAP_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - TRAP_UNDEF_BRG_09,
-+ *      - TRAP_UNDEF_BRG_0A,
-+ *      - TRAP_UNDEF_BRG_0B,
-+ *      - TRAP_UNDEF_BRG_0C,
-+ *      - TRAP_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - TRAP_8021AB,
-+ *      - TRAP_UNDEF_BRG_0F,
-+ *      - TRAP_BRG_MNGEMENT,
-+ *      - TRAP_UNDEFINED_11,
-+ *      - TRAP_UNDEFINED_12,
-+ *      - TRAP_UNDEFINED_13,
-+ *      - TRAP_UNDEFINED_14,
-+ *      - TRAP_UNDEFINED_15,
-+ *      - TRAP_UNDEFINED_16,
-+ *      - TRAP_UNDEFINED_17,
-+ *      - TRAP_UNDEFINED_18,
-+ *      - TRAP_UNDEFINED_19,
-+ *      - TRAP_UNDEFINED_1A,
-+ *      - TRAP_UNDEFINED_1B,
-+ *      - TRAP_UNDEFINED_1C,
-+ *      - TRAP_UNDEFINED_1D,
-+ *      - TRAP_UNDEFINED_1E,
-+ *      - TRAP_UNDEFINED_1F,
-+ *      - TRAP_GMRP,
-+ *      - TRAP_GVRP,
-+ *      - TRAP_UNDEF_GARP_22,
-+ *      - TRAP_UNDEF_GARP_23,
-+ *      - TRAP_UNDEF_GARP_24,
-+ *      - TRAP_UNDEF_GARP_25,
-+ *      - TRAP_UNDEF_GARP_26,
-+ *      - TRAP_UNDEF_GARP_27,
-+ *      - TRAP_UNDEF_GARP_28,
-+ *      - TRAP_UNDEF_GARP_29,
-+ *      - TRAP_UNDEF_GARP_2A,
-+ *      - TRAP_UNDEF_GARP_2B,
-+ *      - TRAP_UNDEF_GARP_2C,
-+ *      - TRAP_UNDEF_GARP_2D,
-+ *      - TRAP_UNDEF_GARP_2E,
-+ *      - TRAP_UNDEF_GARP_2F,
-+ *      - TRAP_CDP.
-+ *      - TRAP_CSSTP.
-+ *      - TRAP_LLDP.
-+ */
-+extern rtk_api_ret_t rtk_trap_rmaKeepFormat_set(rtk_trap_type_t type, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_trap_rmaKeepFormat_get
-+ * Description:
-+ *      Get Reserved multicast address action configuration.
-+ * Input:
-+ *      type - rma type.
-+ * Output:
-+ *      pEnable - keep format status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      There are 48 types of Reserved Multicast Address frame for application usage.
-+ *      They are as following definition.
-+ *      - TRAP_BRG_GROUP,
-+ *      - TRAP_FD_PAUSE,
-+ *      - TRAP_SP_MCAST,
-+ *      - TRAP_1X_PAE,
-+ *      - TRAP_UNDEF_BRG_04,
-+ *      - TRAP_UNDEF_BRG_05,
-+ *      - TRAP_UNDEF_BRG_06,
-+ *      - TRAP_UNDEF_BRG_07,
-+ *      - TRAP_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - TRAP_UNDEF_BRG_09,
-+ *      - TRAP_UNDEF_BRG_0A,
-+ *      - TRAP_UNDEF_BRG_0B,
-+ *      - TRAP_UNDEF_BRG_0C,
-+ *      - TRAP_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - TRAP_8021AB,
-+ *      - TRAP_UNDEF_BRG_0F,
-+ *      - TRAP_BRG_MNGEMENT,
-+ *      - TRAP_UNDEFINED_11,
-+ *      - TRAP_UNDEFINED_12,
-+ *      - TRAP_UNDEFINED_13,
-+ *      - TRAP_UNDEFINED_14,
-+ *      - TRAP_UNDEFINED_15,
-+ *      - TRAP_UNDEFINED_16,
-+ *      - TRAP_UNDEFINED_17,
-+ *      - TRAP_UNDEFINED_18,
-+ *      - TRAP_UNDEFINED_19,
-+ *      - TRAP_UNDEFINED_1A,
-+ *      - TRAP_UNDEFINED_1B,
-+ *      - TRAP_UNDEFINED_1C,
-+ *      - TRAP_UNDEFINED_1D,
-+ *      - TRAP_UNDEFINED_1E,
-+ *      - TRAP_UNDEFINED_1F,
-+ *      - TRAP_GMRP,
-+ *      - TRAP_GVRP,
-+ *      - TRAP_UNDEF_GARP_22,
-+ *      - TRAP_UNDEF_GARP_23,
-+ *      - TRAP_UNDEF_GARP_24,
-+ *      - TRAP_UNDEF_GARP_25,
-+ *      - TRAP_UNDEF_GARP_26,
-+ *      - TRAP_UNDEF_GARP_27,
-+ *      - TRAP_UNDEF_GARP_28,
-+ *      - TRAP_UNDEF_GARP_29,
-+ *      - TRAP_UNDEF_GARP_2A,
-+ *      - TRAP_UNDEF_GARP_2B,
-+ *      - TRAP_UNDEF_GARP_2C,
-+ *      - TRAP_UNDEF_GARP_2D,
-+ *      - TRAP_UNDEF_GARP_2E,
-+ *      - TRAP_UNDEF_GARP_2F,
-+ *      - TRAP_CDP.
-+ *      - TRAP_CSSTP.
-+ *      - TRAP_LLDP.
-+ */
-+extern rtk_api_ret_t rtk_trap_rmaKeepFormat_get(rtk_trap_type_t type, rtk_enable_t *pEnable);
-+
-+
-+#endif /* __RTK_API_TRAP_H__ */
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/trunk.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/trunk.h
-new file mode 100644
-index 0000000000..dff61769df
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/trunk.h
-@@ -0,0 +1,328 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes Trunk module high-layer TRUNK defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_TRUNK_H__
-+#define __RTK_API_TRUNK_H__
-+
-+/*
-+ * Data Type Declaration
-+ */
-+#define    RTK_TRUNK_DPORT_HASH_MASK     0x40
-+#define    RTK_TRUNK_SPORT_HASH_MASK     0x20
-+#define    RTK_TRUNK_DIP_HASH_MASK       0x10
-+#define    RTK_TRUNK_SIP_HASH_MASK       0x8
-+#define    RTK_TRUNK_DMAC_HASH_MASK      0x4
-+#define    RTK_TRUNK_SMAC_HASH_MASK      0x2
-+#define    RTK_TRUNK_SPA_HASH_MASK       0x1
-+
-+
-+#define RTK_MAX_NUM_OF_TRUNK_HASH_VAL               16
-+
-+typedef struct  rtk_trunk_hashVal2Port_s
-+{
-+    rtk_uint8 value[RTK_MAX_NUM_OF_TRUNK_HASH_VAL];
-+} rtk_trunk_hashVal2Port_t;
-+
-+typedef enum rtk_trunk_group_e
-+{
-+    TRUNK_GROUP0 = 0,
-+    TRUNK_GROUP1,
-+    TRUNK_GROUP2,
-+    TRUNK_GROUP3,
-+    TRUNK_GROUP_END
-+} rtk_trunk_group_t;
-+
-+typedef enum rtk_trunk_separateType_e
-+{
-+    SEPARATE_NONE = 0,
-+    SEPARATE_FLOOD,
-+    SEPARATE_END
-+
-+} rtk_trunk_separateType_t;
-+
-+typedef enum rtk_trunk_mode_e
-+{
-+    TRUNK_MODE_NORMAL = 0,
-+    TRUNK_MODE_DUMB,
-+    TRUNK_MODE_END
-+} rtk_trunk_mode_t;
-+
-+/* Function Name:
-+ *      rtk_trunk_port_set
-+ * Description:
-+ *      Set trunking group available port mask
-+ * Input:
-+ *      trk_gid                 - trunk group id
-+ *      pTrunk_member_portmask  - Logic trunking member port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_LA_TRUNK_ID  - Invalid trunking group
-+ *      RT_ERR_PORT_MASK    - Invalid portmask.
-+ * Note:
-+ *      The API can set port trunking group port mask. Each port trunking group has max 4 ports.
-+ *      If enabled port mask has less than 2 ports available setting, then this trunking group function is disabled.
-+ */
-+extern rtk_api_ret_t rtk_trunk_port_set(rtk_trunk_group_t trk_gid, rtk_portmask_t *pTrunk_member_portmask);
-+
-+/* Function Name:
-+ *      rtk_trunk_port_get
-+ * Description:
-+ *      Get trunking group available port mask
-+ * Input:
-+ *      trk_gid - trunk group id
-+ * Output:
-+ *      pTrunk_member_portmask - Logic trunking member port mask
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_LA_TRUNK_ID  - Invalid trunking group
-+ * Note:
-+ *      The API can get 2 port trunking group.
-+ */
-+extern rtk_api_ret_t rtk_trunk_port_get(rtk_trunk_group_t trk_gid, rtk_portmask_t *pTrunk_member_portmask);
-+
-+/* Function Name:
-+ *      rtk_trunk_distributionAlgorithm_set
-+ * Description:
-+ *      Set port trunking hash select sources
-+ * Input:
-+ *      trk_gid         - trunk group id
-+ *      algo_bitmask    - Bitmask of the distribution algorithm
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_LA_TRUNK_ID  - Invalid trunking group
-+ *      RT_ERR_LA_HASHMASK  - Hash algorithm selection error.
-+ *      RT_ERR_PORT_MASK    - Invalid portmask.
-+ * Note:
-+ *      The API can set port trunking hash algorithm sources.
-+ *      7 bits mask for link aggregation group0 hash parameter selection {DIP, SIP, DMAC, SMAC, SPA}
-+ *      - 0b0000001: SPA
-+ *      - 0b0000010: SMAC
-+ *      - 0b0000100: DMAC
-+ *      - 0b0001000: SIP
-+ *      - 0b0010000: DIP
-+ *      - 0b0100000: TCP/UDP Source Port
-+ *      - 0b1000000: TCP/UDP Destination Port
-+ *      Example:
-+ *      - 0b0000011: SMAC & SPA
-+ *      - Note that it could be an arbitrary combination or independent set
-+ */
-+extern rtk_api_ret_t rtk_trunk_distributionAlgorithm_set(rtk_trunk_group_t trk_gid, rtk_uint32 algo_bitmask);
-+
-+/* Function Name:
-+ *      rtk_trunk_distributionAlgorithm_get
-+ * Description:
-+ *      Get port trunking hash select sources
-+ * Input:
-+ *      trk_gid - trunk group id
-+ * Output:
-+ *      pAlgo_bitmask -  Bitmask of the distribution algorithm
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_LA_TRUNK_ID  - Invalid trunking group
-+ * Note:
-+ *      The API can get port trunking hash algorithm sources.
-+ */
-+extern rtk_api_ret_t rtk_trunk_distributionAlgorithm_get(rtk_trunk_group_t trk_gid, rtk_uint32 *pAlgo_bitmask);
-+
-+/* Function Name:
-+ *      rtk_trunk_trafficSeparate_set
-+ * Description:
-+ *      Set the traffic separation setting of a trunk group from the specified device.
-+ * Input:
-+ *      trk_gid      - trunk group id
-+ *      separateType     - traffic separation setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_UNIT_ID     - invalid unit id
-+ *      RT_ERR_LA_TRUNK_ID - invalid trunk ID
-+ *      RT_ERR_LA_HASHMASK - invalid hash mask
-+ * Note:
-+ *      SEPARATE_NONE: disable traffic separation
-+ *      SEPARATE_FLOOD: trunk MSB link up port is dedicated to TX flooding (L2 lookup miss) traffic
-+ */
-+extern rtk_api_ret_t rtk_trunk_trafficSeparate_set(rtk_trunk_group_t trk_gid, rtk_trunk_separateType_t separateType);
-+
-+/* Function Name:
-+ *      rtk_trunk_trafficSeparate_get
-+ * Description:
-+ *      Get the traffic separation setting of a trunk group from the specified device.
-+ * Input:
-+ *      trk_gid        - trunk group id
-+ * Output:
-+ *      pSeparateType   - pointer separated traffic type
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_UNIT_ID      - invalid unit id
-+ *      RT_ERR_LA_TRUNK_ID  - invalid trunk ID
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Note:
-+ *      SEPARATE_NONE: disable traffic separation
-+ *      SEPARATE_FLOOD: trunk MSB link up port is dedicated to TX flooding (L2 lookup miss) traffic
-+ */
-+extern rtk_api_ret_t rtk_trunk_trafficSeparate_get(rtk_trunk_group_t trk_gid, rtk_trunk_separateType_t *pSeparateType);
-+
-+
-+/* Function Name:
-+ *      rtk_trunk_mode_set
-+ * Description:
-+ *      Set the trunk mode to the specified device.
-+ * Input:
-+ *      mode - trunk mode
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT   - invalid input parameter
-+ * Note:
-+ *      The enum of the trunk mode as following
-+ *      - TRUNK_MODE_NORMAL
-+ *      - TRUNK_MODE_DUMB
-+ */
-+extern rtk_api_ret_t rtk_trunk_mode_set(rtk_trunk_mode_t mode);
-+
-+/* Function Name:
-+ *      rtk_trunk_mode_get
-+ * Description:
-+ *      Get the trunk mode from the specified device.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pMode - pointer buffer of trunk mode
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Note:
-+ *      The enum of the trunk mode as following
-+ *      - TRUNK_MODE_NORMAL
-+ *      - TRUNK_MODE_DUMB
-+ */
-+extern rtk_api_ret_t rtk_trunk_mode_get(rtk_trunk_mode_t *pMode);
-+
-+/* Function Name:
-+ *      rtk_trunk_trafficPause_set
-+ * Description:
-+ *      Set the traffic pause setting of a trunk group.
-+ * Input:
-+ *      trk_gid      - trunk group id
-+ *      enable       - traffic pause state
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_LA_TRUNK_ID - invalid trunk ID
-+ * Note:
-+ *      None.
-+ */
-+extern rtk_api_ret_t rtk_trunk_trafficPause_set(rtk_trunk_group_t trk_gid, rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_trunk_trafficPause_get
-+ * Description:
-+ *      Get the traffic pause setting of a trunk group.
-+ * Input:
-+ *      trk_gid        - trunk group id
-+ * Output:
-+ *      pEnable        - pointer of traffic pause state.
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_LA_TRUNK_ID  - invalid trunk ID
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Note:
-+ *      None.
-+ */
-+extern rtk_api_ret_t rtk_trunk_trafficPause_get(rtk_trunk_group_t trk_gid, rtk_enable_t *pEnable);
-+
-+/* Function Name:
-+ *      rtk_trunk_hashMappingTable_set
-+ * Description:
-+ *      Set hash value to port array in the trunk group id from the specified device.
-+ * Input:
-+ *      trk_gid          - trunk group id
-+ *      pHash2Port_array - ports associate with the hash value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_UNIT_ID            - invalid unit id
-+ *      RT_ERR_LA_TRUNK_ID        - invalid trunk ID
-+ *      RT_ERR_NULL_POINTER       - input parameter may be null pointer
-+ *      RT_ERR_LA_TRUNK_NOT_EXIST - the trunk doesn't exist
-+ *      RT_ERR_LA_NOT_MEMBER_PORT - the port is not a member port of the trunk
-+ *      RT_ERR_LA_CPUPORT         - CPU port can not be aggregated port
-+ * Note:
-+ *      Trunk group 0 & 1 shares the same hash mapping table.
-+ *      Trunk group 2 uses a independent table.
-+ */
-+extern rtk_api_ret_t rtk_trunk_hashMappingTable_set(rtk_trunk_group_t trk_gid, rtk_trunk_hashVal2Port_t *pHash2Port_array);
-+
-+/* Function Name:
-+ *      rtk_trunk_hashMappingTable_get
-+ * Description:
-+ *      Get hash value to port array in the trunk group id from the specified device.
-+ * Input:
-+ *      trk_gid          - trunk group id
-+ * Output:
-+ *      pHash2Port_array - pointer buffer of ports associate with the hash value
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_UNIT_ID      - invalid unit id
-+ *      RT_ERR_LA_TRUNK_ID  - invalid trunk ID
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Note:
-+ *      Trunk group 0 & 1 shares the same hash mapping table.
-+ *      Trunk group 2 uses a independent table.
-+ */
-+extern rtk_api_ret_t rtk_trunk_hashMappingTable_get(rtk_trunk_group_t trk_gid, rtk_trunk_hashVal2Port_t *pHash2Port_array);
-+
-+/* Function Name:
-+ *      rtk_trunk_portQueueEmpty_get
-+ * Description:
-+ *      Get the port mask which all queues are empty.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pEmpty_portmask   - pointer empty port mask
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Note:
-+ *      None.
-+ */
-+extern rtk_api_ret_t rtk_trunk_portQueueEmpty_get(rtk_portmask_t *pEmpty_portmask);
-+
-+#endif /* __RTK_API_TRUNK_H__ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/vlan.h b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/vlan.h
-new file mode 100644
-index 0000000000..8569fc0d40
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/vlan.h
-@@ -0,0 +1,892 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367/RTL8367C switch high-level API
-+ *
-+ * Feature : The file includes Trap module high-layer VLAN defination
-+ *
-+ */
-+
-+#ifndef __RTK_API_VLAN_H__
-+#define __RTK_API_VLAN_H__
-+
-+
-+/*
-+ * Data Type Declaration
-+ */
-+#define RTK_MAX_NUM_OF_PROTO_TYPE                   0xFFFF
-+#define RTK_MAX_NUM_OF_MSTI                         0xF
-+#define RTK_FID_MAX                                 0xF
-+
-+typedef struct  rtk_vlan_cfg_s
-+{
-+    rtk_portmask_t  mbr;
-+    rtk_portmask_t  untag;
-+    rtk_uint16      ivl_en;
-+    rtk_uint16      fid_msti;
-+    rtk_uint16      envlanpol;
-+    rtk_uint16      meteridx;
-+    rtk_uint16      vbpen;
-+    rtk_uint16      vbpri;
-+}rtk_vlan_cfg_t;
-+
-+typedef struct  rtk_vlan_mbrcfg_s
-+{
-+    rtk_uint16      evid;
-+    rtk_portmask_t  mbr;
-+    rtk_uint16      fid_msti;
-+    rtk_uint16      envlanpol;
-+    rtk_uint16      meteridx;
-+    rtk_uint16      vbpen;
-+    rtk_uint16      vbpri;
-+}rtk_vlan_mbrcfg_t;
-+
-+typedef rtk_uint32  rtk_stp_msti_id_t;     /* MSTI ID  */
-+
-+typedef enum rtk_stp_state_e
-+{
-+    STP_STATE_DISABLED = 0,
-+    STP_STATE_BLOCKING,
-+    STP_STATE_LEARNING,
-+    STP_STATE_FORWARDING,
-+    STP_STATE_END
-+} rtk_stp_state_t;
-+
-+typedef rtk_uint32  rtk_vlan_proto_type_t;     /* protocol and port based VLAN protocol type  */
-+
-+
-+typedef enum rtk_vlan_acceptFrameType_e
-+{
-+    ACCEPT_FRAME_TYPE_ALL = 0,             /* untagged, priority-tagged and tagged */
-+    ACCEPT_FRAME_TYPE_TAG_ONLY,         /* tagged */
-+    ACCEPT_FRAME_TYPE_UNTAG_ONLY,     /* untagged and priority-tagged */
-+    ACCEPT_FRAME_TYPE_END
-+} rtk_vlan_acceptFrameType_t;
-+
-+
-+/* frame type of protocol vlan - reference 802.1v standard */
-+typedef enum rtk_vlan_protoVlan_frameType_e
-+{
-+    FRAME_TYPE_ETHERNET = 0,
-+    FRAME_TYPE_LLCOTHER,
-+    FRAME_TYPE_RFC1042,
-+    FRAME_TYPE_END
-+} rtk_vlan_protoVlan_frameType_t;
-+
-+/* Protocol-and-port-based Vlan structure */
-+typedef struct rtk_vlan_protoAndPortInfo_s
-+{
-+    rtk_uint32                         proto_type;
-+    rtk_vlan_protoVlan_frameType_t frame_type;
-+    rtk_vlan_t                     cvid;
-+    rtk_pri_t                     cpri;
-+}rtk_vlan_protoAndPortInfo_t;
-+
-+/* tagged mode of VLAN - reference realtek private specification */
-+typedef enum rtk_vlan_tagMode_e
-+{
-+    VLAN_TAG_MODE_ORIGINAL = 0,
-+    VLAN_TAG_MODE_KEEP_FORMAT,
-+    VLAN_TAG_MODE_PRI,
-+    VLAN_TAG_MODE_REAL_KEEP_FORMAT,
-+    VLAN_TAG_MODE_END
-+} rtk_vlan_tagMode_t;
-+
-+typedef enum rtk_vlan_resVidAction_e
-+{
-+    RESVID_ACTION_UNTAG = 0,
-+    RESVID_ACTION_TAG,
-+    RESVID_ACTION_END
-+}
-+rtk_vlan_resVidAction_t;
-+
-+/* Function Name:
-+ *      rtk_vlan_init
-+ * Description:
-+ *      Initialize VLAN.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      VLAN is disabled by default. User has to call this API to enable VLAN before
-+ *      using it. And It will set a default VLAN(vid 1) including all ports and set
-+ *      all ports PVID to the default VLAN.
-+ */
-+extern rtk_api_ret_t rtk_vlan_init(void);
-+
-+/* Function Name:
-+ *      rtk_vlan_set
-+ * Description:
-+ *      Set a VLAN entry.
-+ * Input:
-+ *      vid - VLAN ID to configure.
-+ *      pVlanCfg - VLAN Configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ *      RT_ERR_L2_FID               - Invalid FID.
-+ *      RT_ERR_VLAN_PORT_MBR_EXIST  - Invalid member port mask.
-+ *      RT_ERR_VLAN_VID             - Invalid VID parameter.
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_vlan_set(rtk_vlan_t vid, rtk_vlan_cfg_t *pVlanCfg);
-+
-+/* Function Name:
-+ *      rtk_vlan_get
-+ * Description:
-+ *      Get a VLAN entry.
-+ * Input:
-+ *      vid - VLAN ID to configure.
-+ * Output:
-+ *      pVlanCfg - VLAN Configuration
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_VLAN_VID     - Invalid VID parameter.
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_vlan_get(rtk_vlan_t vid, rtk_vlan_cfg_t *pVlanCfg);
-+
-+/* Function Name:
-+ *      rtk_vlan_egrFilterEnable_set
-+ * Description:
-+ *      Set VLAN egress filter.
-+ * Input:
-+ *      egrFilter - Egress filtering
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENABLE       - Invalid input parameters.
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_vlan_egrFilterEnable_set(rtk_enable_t egrFilter);
-+
-+/* Function Name:
-+ *      rtk_vlan_egrFilterEnable_get
-+ * Description:
-+ *      Get VLAN egress filter.
-+ * Input:
-+ *      pEgrFilter - Egress filtering
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NULL_POINTER - NULL Pointer.
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_vlan_egrFilterEnable_get(rtk_enable_t *pEgrFilter);
-+
-+/* Function Name:
-+ *      rtk_vlan_mbrCfg_set
-+ * Description:
-+ *      Set a VLAN Member Configuration entry by index.
-+ * Input:
-+ *      idx     - Index of VLAN Member Configuration.
-+ *      pMbrcfg - VLAN member Configuration.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_VLAN_VID     - Invalid VID parameter.
-+ * Note:
-+ *     Set a VLAN Member Configuration entry by index.
-+ */
-+extern rtk_api_ret_t rtk_vlan_mbrCfg_set(rtk_uint32 idx, rtk_vlan_mbrcfg_t *pMbrcfg);
-+
-+/* Function Name:
-+ *      rtk_vlan_mbrCfg_get
-+ * Description:
-+ *      Get a VLAN Member Configuration entry by index.
-+ * Input:
-+ *      idx - Index of VLAN Member Configuration.
-+ * Output:
-+ *      pMbrcfg - VLAN member Configuration.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_VLAN_VID     - Invalid VID parameter.
-+ * Note:
-+ *     Get a VLAN Member Configuration entry by index.
-+ */
-+extern rtk_api_ret_t rtk_vlan_mbrCfg_get(rtk_uint32 idx, rtk_vlan_mbrcfg_t *pMbrcfg);
-+
-+/* Function Name:
-+ *     rtk_vlan_portPvid_set
-+ * Description:
-+ *      Set port to specified VLAN ID(PVID).
-+ * Input:
-+ *      port - Port id.
-+ *      pvid - Specified VLAN ID.
-+ *      priority - 802.1p priority for the PVID.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_VLAN_PRIORITY        - Invalid priority.
-+ *      RT_ERR_VLAN_ENTRY_NOT_FOUND - VLAN entry not found.
-+ *      RT_ERR_VLAN_VID             - Invalid VID parameter.
-+ * Note:
-+ *       The API is used for Port-based VLAN. The untagged frame received from the
-+ *       port will be classified to the specified VLAN and assigned to the specified priority.
-+ */
-+extern rtk_api_ret_t rtk_vlan_portPvid_set(rtk_port_t port, rtk_vlan_t pvid, rtk_pri_t priority);
-+
-+/* Function Name:
-+ *      rtk_vlan_portPvid_get
-+ * Description:
-+ *      Get VLAN ID(PVID) on specified port.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pPvid - Specified VLAN ID.
-+ *      pPriority - 802.1p priority for the PVID.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *     The API can get the PVID and 802.1p priority for the PVID of Port-based VLAN.
-+ */
-+extern rtk_api_ret_t rtk_vlan_portPvid_get(rtk_port_t port, rtk_vlan_t *pPvid, rtk_pri_t *pPriority);
-+
-+/* Function Name:
-+ *      rtk_vlan_portIgrFilterEnable_set
-+ * Description:
-+ *      Set VLAN ingress for each port.
-+ * Input:
-+ *      port - Port id.
-+ *      igr_filter - VLAN ingress function enable status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_ENABLE       - Invalid enable input
-+ * Note:
-+ *      The status of vlan ingress filter is as following:
-+ *      - DISABLED
-+ *      - ENABLED
-+ *      While VLAN function is enabled, ASIC will decide VLAN ID for each received frame and get belonged member
-+ *      ports from VLAN table. If received port is not belonged to VLAN member ports, ASIC will drop received frame if VLAN ingress function is enabled.
-+ */
-+extern rtk_api_ret_t rtk_vlan_portIgrFilterEnable_set(rtk_port_t port, rtk_enable_t igr_filter);
-+
-+/* Function Name:
-+ *      rtk_vlan_portIgrFilterEnable_get
-+ * Description:
-+ *      Get VLAN Ingress Filter
-+ * Input:
-+ *      port        - Port id.
-+ * Output:
-+ *      pIgr_filter - VLAN ingress function enable status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *     The API can Get the VLAN ingress filter status.
-+ *     The status of vlan ingress filter is as following:
-+ *     - DISABLED
-+ *     - ENABLED
-+ */
-+extern rtk_api_ret_t rtk_vlan_portIgrFilterEnable_get(rtk_port_t port, rtk_enable_t *pIgr_filter);
-+
-+/* Function Name:
-+ *      rtk_vlan_portAcceptFrameType_set
-+ * Description:
-+ *      Set VLAN accept_frame_type
-+ * Input:
-+ *      port                - Port id.
-+ *      accept_frame_type   - accept frame type
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_PORT_ID                  - Invalid port number.
-+ *      RT_ERR_VLAN_ACCEPT_FRAME_TYPE   - Invalid frame type.
-+ * Note:
-+ *      The API is used for checking 802.1Q tagged frames.
-+ *      The accept frame type as following:
-+ *      - ACCEPT_FRAME_TYPE_ALL
-+ *      - ACCEPT_FRAME_TYPE_TAG_ONLY
-+ *      - ACCEPT_FRAME_TYPE_UNTAG_ONLY
-+ */
-+extern rtk_api_ret_t rtk_vlan_portAcceptFrameType_set(rtk_port_t port, rtk_vlan_acceptFrameType_t accept_frame_type);
-+
-+/* Function Name:
-+ *      rtk_vlan_portAcceptFrameType_get
-+ * Description:
-+ *      Get VLAN accept_frame_type
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pAccept_frame_type - accept frame type
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *     The API can Get the VLAN ingress filter.
-+ *     The accept frame type as following:
-+ *     - ACCEPT_FRAME_TYPE_ALL
-+ *     - ACCEPT_FRAME_TYPE_TAG_ONLY
-+ *     - ACCEPT_FRAME_TYPE_UNTAG_ONLY
-+ */
-+extern rtk_api_ret_t rtk_vlan_portAcceptFrameType_get(rtk_port_t port, rtk_vlan_acceptFrameType_t *pAccept_frame_type);
-+
-+/* Function Name:
-+ *      rtk_vlan_tagMode_set
-+ * Description:
-+ *      Set CVLAN egress tag mode
-+ * Input:
-+ *      port        - Port id.
-+ *      tag_mode    - The egress tag mode.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      The API can set Egress tag mode. There are 4 mode for egress tag:
-+ *      - VLAN_TAG_MODE_ORIGINAL,
-+ *      - VLAN_TAG_MODE_KEEP_FORMAT,
-+ *      - VLAN_TAG_MODE_PRI.
-+ *      - VLAN_TAG_MODE_REAL_KEEP_FORMAT,
-+ */
-+extern rtk_api_ret_t rtk_vlan_tagMode_set(rtk_port_t port, rtk_vlan_tagMode_t tag_mode);
-+
-+/* Function Name:
-+ *      rtk_vlan_tagMode_get
-+ * Description:
-+ *      Get CVLAN egress tag mode
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pTag_mode - The egress tag mode.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get Egress tag mode. There are 4 mode for egress tag:
-+ *      - VLAN_TAG_MODE_ORIGINAL,
-+ *      - VLAN_TAG_MODE_KEEP_FORMAT,
-+ *      - VLAN_TAG_MODE_PRI.
-+ *      - VLAN_TAG_MODE_REAL_KEEP_FORMAT,
-+ */
-+extern rtk_api_ret_t rtk_vlan_tagMode_get(rtk_port_t port, rtk_vlan_tagMode_t *pTag_mode);
-+
-+/* Function Name:
-+ *      rtk_vlan_transparent_set
-+ * Description:
-+ *      Set VLAN transparent mode
-+ * Input:
-+ *      egr_port        - Egress Port id.
-+ *      pIgr_pmask      - Ingress Port Mask.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      None.
-+ */
-+extern rtk_api_ret_t rtk_vlan_transparent_set(rtk_port_t egr_port, rtk_portmask_t *pIgr_pmask);
-+
-+/* Function Name:
-+ *      rtk_vlan_transparent_get
-+ * Description:
-+ *      Get VLAN transparent mode
-+ * Input:
-+ *      egr_port        - Egress Port id.
-+ * Output:
-+ *      pIgr_pmask      - Ingress Port Mask
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      None.
-+ */
-+extern rtk_api_ret_t rtk_vlan_transparent_get(rtk_port_t egr_port, rtk_portmask_t *pIgr_pmask);
-+
-+/* Function Name:
-+ *      rtk_vlan_keep_set
-+ * Description:
-+ *      Set VLAN egress keep mode
-+ * Input:
-+ *      egr_port        - Egress Port id.
-+ *      pIgr_pmask      - Ingress Port Mask.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      None.
-+ */
-+extern rtk_api_ret_t rtk_vlan_keep_set(rtk_port_t egr_port, rtk_portmask_t *pIgr_pmask);
-+
-+/* Function Name:
-+ *      rtk_vlan_keep_get
-+ * Description:
-+ *      Get VLAN egress keep mode
-+ * Input:
-+ *      egr_port        - Egress Port id.
-+ * Output:
-+ *      pIgr_pmask      - Ingress Port Mask
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      None.
-+ */
-+extern rtk_api_ret_t rtk_vlan_keep_get(rtk_port_t egr_port, rtk_portmask_t *pIgr_pmask);
-+
-+/* Function Name:
-+ *      rtk_vlan_stg_set
-+ * Description:
-+ *      Set spanning tree group instance of the vlan to the specified device
-+ * Input:
-+ *      vid - Specified VLAN ID.
-+ *      stg - spanning tree group instance.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_MSTI         - Invalid msti parameter
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ *      RT_ERR_VLAN_VID     - Invalid VID parameter.
-+ * Note:
-+ *      The API can set spanning tree group instance of the vlan to the specified device.
-+ */
-+extern rtk_api_ret_t rtk_vlan_stg_set(rtk_vlan_t vid, rtk_stp_msti_id_t stg);
-+
-+/* Function Name:
-+ *      rtk_vlan_stg_get
-+ * Description:
-+ *      Get spanning tree group instance of the vlan to the specified device
-+ * Input:
-+ *      vid - Specified VLAN ID.
-+ * Output:
-+ *      pStg - spanning tree group instance.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_VLAN_VID     - Invalid VID parameter.
-+ * Note:
-+ *      The API can get spanning tree group instance of the vlan to the specified device.
-+ */
-+extern rtk_api_ret_t rtk_vlan_stg_get(rtk_vlan_t vid, rtk_stp_msti_id_t *pStg);
-+
-+/* Function Name:
-+ *      rtk_vlan_protoAndPortBasedVlan_add
-+ * Description:
-+ *      Add the protocol-and-port-based vlan to the specified port of device.
-+ * Input:
-+ *      port  - Port id.
-+ *      pInfo - Protocol and port based VLAN configuration information.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_VLAN_VID         - Invalid VID parameter.
-+ *      RT_ERR_VLAN_PRIORITY    - Invalid priority.
-+ *      RT_ERR_TBL_FULL         - Table is full.
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ * Note:
-+ *      The incoming packet which match the protocol-and-port-based vlan will use the configure vid for ingress pipeline
-+ *      The frame type is shown in the following:
-+ *      - FRAME_TYPE_ETHERNET
-+ *      - FRAME_TYPE_RFC1042
-+ *      - FRAME_TYPE_LLCOTHER
-+ */
-+extern rtk_api_ret_t rtk_vlan_protoAndPortBasedVlan_add(rtk_port_t port, rtk_vlan_protoAndPortInfo_t *pInfo);
-+
-+/* Function Name:
-+ *      rtk_vlan_protoAndPortBasedVlan_get
-+ * Description:
-+ *      Get the protocol-and-port-based vlan to the specified port of device.
-+ * Input:
-+ *      port - Port id.
-+ *      proto_type - protocol-and-port-based vlan protocol type.
-+ *      frame_type - protocol-and-port-based vlan frame type.
-+ * Output:
-+ *      pInfo - Protocol and port based VLAN configuration information.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ *      RT_ERR_TBL_FULL         - Table is full.
-+ * Note:
-+ *     The incoming packet which match the protocol-and-port-based vlan will use the configure vid for ingress pipeline
-+ *     The frame type is shown in the following:
-+ *      - FRAME_TYPE_ETHERNET
-+ *      - FRAME_TYPE_RFC1042
-+ *      - FRAME_TYPE_LLCOTHER
-+ */
-+extern rtk_api_ret_t rtk_vlan_protoAndPortBasedVlan_get(rtk_port_t port, rtk_vlan_proto_type_t proto_type, rtk_vlan_protoVlan_frameType_t frame_type, rtk_vlan_protoAndPortInfo_t *pInfo);
-+
-+/* Function Name:
-+ *      rtk_vlan_protoAndPortBasedVlan_del
-+ * Description:
-+ *      Delete the protocol-and-port-based vlan from the specified port of device.
-+ * Input:
-+ *      port        - Port id.
-+ *      proto_type  - protocol-and-port-based vlan protocol type.
-+ *      frame_type  - protocol-and-port-based vlan frame type.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ *      RT_ERR_TBL_FULL         - Table is full.
-+ * Note:
-+ *     The incoming packet which match the protocol-and-port-based vlan will use the configure vid for ingress pipeline
-+ *     The frame type is shown in the following:
-+ *      - FRAME_TYPE_ETHERNET
-+ *      - FRAME_TYPE_RFC1042
-+ *      - FRAME_TYPE_LLCOTHER
-+ */
-+extern rtk_api_ret_t rtk_vlan_protoAndPortBasedVlan_del(rtk_port_t port, rtk_vlan_proto_type_t proto_type, rtk_vlan_protoVlan_frameType_t frame_type);
-+
-+/* Function Name:
-+ *      rtk_vlan_protoAndPortBasedVlan_delAll
-+ * Description:
-+ *     Delete all protocol-and-port-based vlans from the specified port of device.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ * Note:
-+ *     The incoming packet which match the protocol-and-port-based vlan will use the configure vid for ingress pipeline
-+ *     Delete all flow table protocol-and-port-based vlan entries.
-+ */
-+extern rtk_api_ret_t rtk_vlan_protoAndPortBasedVlan_delAll(rtk_port_t port);
-+
-+/* Function Name:
-+ *      rtk_vlan_portFid_set
-+ * Description:
-+ *      Set port-based filtering database
-+ * Input:
-+ *      port - Port id.
-+ *      enable - ebable port-based FID
-+ *      fid - Specified filtering database.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_L2_FID - Invalid fid.
-+ *      RT_ERR_INPUT - Invalid input parameter.
-+ *      RT_ERR_PORT_ID - Invalid port ID.
-+ * Note:
-+ *      The API can set port-based filtering database. If the function is enabled, all input
-+ *      packets will be assigned to the port-based fid regardless vlan tag.
-+ */
-+extern rtk_api_ret_t rtk_vlan_portFid_set(rtk_port_t port, rtk_enable_t enable, rtk_fid_t fid);
-+
-+/* Function Name:
-+ *      rtk_vlan_portFid_get
-+ * Description:
-+ *      Get port-based filtering database
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - ebable port-based FID
-+ *      pFid - Specified filtering database.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT - Invalid input parameters.
-+ *      RT_ERR_PORT_ID - Invalid port ID.
-+ * Note:
-+ *      The API can get port-based filtering database status. If the function is enabled, all input
-+ *      packets will be assigned to the port-based fid regardless vlan tag.
-+ */
-+extern rtk_api_ret_t rtk_vlan_portFid_get(rtk_port_t port, rtk_enable_t *pEnable, rtk_fid_t *pFid);
-+
-+/* Function Name:
-+ *      rtk_vlan_UntagDscpPriorityEnable_set
-+ * Description:
-+ *      Set Untag DSCP priority assign
-+ * Input:
-+ *      enable - state of Untag DSCP priority assign
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_ENABLE          - Invalid input parameters.
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_vlan_UntagDscpPriorityEnable_set(rtk_enable_t enable);
-+
-+/* Function Name:
-+ *      rtk_vlan_UntagDscpPriorityEnable_get
-+ * Description:
-+ *      Get Untag DSCP priority assign
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnable - state of Untag DSCP priority assign
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_vlan_UntagDscpPriorityEnable_get(rtk_enable_t *pEnable);
-+
-+
-+/*Spanning Tree*/
-+/* Function Name:
-+ *      rtk_stp_mstpState_set
-+ * Description:
-+ *      Configure spanning tree state per each port.
-+ * Input:
-+ *      port - Port id
-+ *      msti - Multiple spanning tree instance.
-+ *      stp_state - Spanning tree state for msti
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_MSTI         - Invalid msti parameter.
-+ *      RT_ERR_MSTP_STATE   - Invalid STP state.
-+ * Note:
-+ *      System supports per-port multiple spanning tree state for each msti.
-+ *      There are four states supported by ASIC.
-+ *      - STP_STATE_DISABLED
-+ *      - STP_STATE_BLOCKING
-+ *      - STP_STATE_LEARNING
-+ *      - STP_STATE_FORWARDING
-+ */
-+extern rtk_api_ret_t rtk_stp_mstpState_set(rtk_stp_msti_id_t msti, rtk_port_t port, rtk_stp_state_t stp_state);
-+
-+/* Function Name:
-+ *      rtk_stp_mstpState_get
-+ * Description:
-+ *      Get spanning tree state per each port.
-+ * Input:
-+ *      port - Port id.
-+ *      msti - Multiple spanning tree instance.
-+ * Output:
-+ *      pStp_state - Spanning tree state for msti
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_MSTI         - Invalid msti parameter.
-+ * Note:
-+ *      System supports per-port multiple spanning tree state for each msti.
-+ *      There are four states supported by ASIC.
-+ *      - STP_STATE_DISABLED
-+ *      - STP_STATE_BLOCKING
-+ *      - STP_STATE_LEARNING
-+ *      - STP_STATE_FORWARDING
-+ */
-+extern rtk_api_ret_t rtk_stp_mstpState_get(rtk_stp_msti_id_t msti, rtk_port_t port, rtk_stp_state_t *pStp_state);
-+
-+/* Function Name:
-+ *      rtk_vlan_checkAndCreateMbr
-+ * Description:
-+ *      Check and create Member configuration and return index
-+ * Input:
-+ *      vid  - VLAN id.
-+ * Output:
-+ *      pIndex  - Member configuration index
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_VLAN_VID     - Invalid VLAN ID.
-+ *      RT_ERR_VLAN_ENTRY_NOT_FOUND - VLAN not found
-+ *      RT_ERR_TBL_FULL     - Member Configuration table full
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_vlan_checkAndCreateMbr(rtk_vlan_t vid, rtk_uint32 *pIndex);
-+
-+/* Function Name:
-+ *      rtk_vlan_reservedVidAction_set
-+ * Description:
-+ *      Set Action of VLAN ID = 0 & 4095 tagged packet
-+ * Input:
-+ *      action_vid0     - Action for VID 0.
-+ *      action_vid4095  - Action for VID 4095.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Error Input
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_vlan_reservedVidAction_set(rtk_vlan_resVidAction_t action_vid0, rtk_vlan_resVidAction_t action_vid4095);
-+
-+/* Function Name:
-+ *      rtk_vlan_reservedVidAction_get
-+ * Description:
-+ *      Get Action of VLAN ID = 0 & 4095 tagged packet
-+ * Input:
-+ *      pAction_vid0     - Action for VID 0.
-+ *      pAction_vid4095  - Action for VID 4095.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NULL_POINTER - NULL Pointer
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_vlan_reservedVidAction_get(rtk_vlan_resVidAction_t *pAction_vid0, rtk_vlan_resVidAction_t *pAction_vid4095);
-+
-+/* Function Name:
-+ *      rtk_vlan_realKeepRemarkEnable_set
-+ * Description:
-+ *      Set Real keep 1p remarking feature
-+ * Input:
-+ *      enabled     - State of 1p remarking at real keep packet
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Error Input
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_vlan_realKeepRemarkEnable_set(rtk_enable_t enabled);
-+
-+/* Function Name:
-+ *      rtk_vlan_realKeepRemarkEnable_get
-+ * Description:
-+ *      Get Real keep 1p remarking feature
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pEnabled     - State of 1p remarking at real keep packet
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Error Input
-+ * Note:
-+ *
-+ */
-+extern rtk_api_ret_t rtk_vlan_realKeepRemarkEnable_get(rtk_enable_t *pEnabled);
-+
-+/* Function Name:
-+ *      rtk_vlan_reset
-+ * Description:
-+ *      Reset VLAN
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pEnabled     - State of 1p remarking at real keep packet
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Error Input
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_vlan_reset(void);
-+
-+#endif /* __RTK_API_VLAN_H__ */
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/interrupt.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/interrupt.c
-new file mode 100644
-index 0000000000..165ee41721
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/interrupt.c
-@@ -0,0 +1,434 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in Interrupt module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <interrupt.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_interrupt.h>
-+
-+/* Function Name:
-+ *      rtk_int_polarity_set
-+ * Description:
-+ *      Set interrupt polarity configuration.
-+ * Input:
-+ *      type - Interruptpolarity type.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can set interrupt polarity configuration.
-+ */
-+rtk_api_ret_t rtk_int_polarity_set(rtk_int_polarity_t type)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(type >= INT_POLAR_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicInterruptPolarity(type)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_int_polarity_get
-+ * Description:
-+ *      Get interrupt polarity configuration.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pType - Interruptpolarity type.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      The API can get interrupt polarity configuration.
-+ */
-+rtk_api_ret_t rtk_int_polarity_get(rtk_int_polarity_t *pType)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pType)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicInterruptPolarity(pType)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_int_control_set
-+ * Description:
-+ *      Set interrupt trigger status configuration.
-+ * Input:
-+ *      type - Interrupt type.
-+ *      enable - Interrupt status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      The API can set interrupt status configuration.
-+ *      The interrupt trigger status is shown in the following:
-+ *      - INT_TYPE_LINK_STATUS
-+ *      - INT_TYPE_METER_EXCEED
-+ *      - INT_TYPE_LEARN_LIMIT
-+ *      - INT_TYPE_LINK_SPEED
-+ *      - INT_TYPE_CONGEST
-+ *      - INT_TYPE_GREEN_FEATURE
-+ *      - INT_TYPE_LOOP_DETECT
-+ *      - INT_TYPE_8051,
-+ *      - INT_TYPE_CABLE_DIAG,
-+ *      - INT_TYPE_ACL,
-+ *      - INT_TYPE_SLIENT
-+ */
-+rtk_api_ret_t rtk_int_control_set(rtk_int_type_t type, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 mask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type >= INT_TYPE_END)
-+        return RT_ERR_INPUT;
-+
-+    if (type == INT_TYPE_RESERVED)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_getAsicInterruptMask(&mask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (ENABLED == enable)
-+        mask = mask | (1<<type);
-+    else if (DISABLED == enable)
-+        mask = mask & ~(1<<type);
-+    else
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicInterruptMask(mask)) != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_int_control_get
-+ * Description:
-+ *      Get interrupt trigger status configuration.
-+ * Input:
-+ *      type - Interrupt type.
-+ * Output:
-+ *      pEnable - Interrupt status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get interrupt status configuration.
-+ *      The interrupt trigger status is shown in the following:
-+ *      - INT_TYPE_LINK_STATUS
-+ *      - INT_TYPE_METER_EXCEED
-+ *      - INT_TYPE_LEARN_LIMIT
-+ *      - INT_TYPE_LINK_SPEED
-+ *      - INT_TYPE_CONGEST
-+ *      - INT_TYPE_GREEN_FEATURE
-+ *      - INT_TYPE_LOOP_DETECT
-+ *      - INT_TYPE_8051,
-+ *      - INT_TYPE_CABLE_DIAG,
-+ *      - INT_TYPE_ACL,
-+ *      - INT_TYPE_UPS,
-+ *      - INT_TYPE_SLIENT
-+ */
-+rtk_api_ret_t rtk_int_control_get(rtk_int_type_t type, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 mask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicInterruptMask(&mask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (0 == (mask&(1<<type)))
-+        *pEnable=DISABLED;
-+    else
-+        *pEnable=ENABLED;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_int_status_set
-+ * Description:
-+ *      Set interrupt trigger status to clean.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pStatusMask - Interrupt status bit mask.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT - Invalid input parameters.
-+ * Note:
-+ *      The API can clean interrupt trigger status when interrupt happened.
-+ *      The interrupt trigger status is shown in the following:
-+ *      - INT_TYPE_LINK_STATUS    (value[0] (Bit0))
-+ *      - INT_TYPE_METER_EXCEED   (value[0] (Bit1))
-+ *      - INT_TYPE_LEARN_LIMIT    (value[0] (Bit2))
-+ *      - INT_TYPE_LINK_SPEED     (value[0] (Bit3))
-+ *      - INT_TYPE_CONGEST        (value[0] (Bit4))
-+ *      - INT_TYPE_GREEN_FEATURE  (value[0] (Bit5))
-+ *      - INT_TYPE_LOOP_DETECT    (value[0] (Bit6))
-+ *      - INT_TYPE_8051           (value[0] (Bit7))
-+ *      - INT_TYPE_CABLE_DIAG     (value[0] (Bit8))
-+ *      - INT_TYPE_ACL            (value[0] (Bit9))
-+ *      - INT_TYPE_SLIENT         (value[0] (Bit11))
-+ *      The status will be cleared after execute this API.
-+ */
-+rtk_api_ret_t rtk_int_status_set(rtk_int_status_t *pStatusMask)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pStatusMask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(pStatusMask->value[0] & (0x0001 << INT_TYPE_RESERVED))
-+        return RT_ERR_INPUT;
-+
-+    if(pStatusMask->value[0] >= (0x0001 << INT_TYPE_END))
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicInterruptStatus((rtk_uint32)pStatusMask->value[0]))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_int_status_get
-+ * Description:
-+ *      Get interrupt trigger status.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pStatusMask - Interrupt status bit mask.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get interrupt trigger status when interrupt happened.
-+ *      The interrupt trigger status is shown in the following:
-+ *      - INT_TYPE_LINK_STATUS    (value[0] (Bit0))
-+ *      - INT_TYPE_METER_EXCEED   (value[0] (Bit1))
-+ *      - INT_TYPE_LEARN_LIMIT    (value[0] (Bit2))
-+ *      - INT_TYPE_LINK_SPEED     (value[0] (Bit3))
-+ *      - INT_TYPE_CONGEST        (value[0] (Bit4))
-+ *      - INT_TYPE_GREEN_FEATURE  (value[0] (Bit5))
-+ *      - INT_TYPE_LOOP_DETECT    (value[0] (Bit6))
-+ *      - INT_TYPE_8051           (value[0] (Bit7))
-+ *      - INT_TYPE_CABLE_DIAG     (value[0] (Bit8))
-+ *      - INT_TYPE_ACL            (value[0] (Bit9))
-+ *      - INT_TYPE_SLIENT         (value[0] (Bit11))
-+ *
-+ */
-+rtk_api_ret_t rtk_int_status_get(rtk_int_status_t* pStatusMask)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32          ims_mask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pStatusMask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicInterruptStatus(&ims_mask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    pStatusMask->value[0] = (ims_mask & 0x00000FFF);
-+    return RT_ERR_OK;
-+}
-+
-+#define ADV_NOT_SUPPORT (0xFFFF)
-+static rtk_api_ret_t _rtk_int_Advidx_get(rtk_int_advType_t adv_type, rtk_uint32 *pAsic_idx)
-+{
-+    rtk_uint32 asic_idx[ADV_END] =
-+    {
-+        INTRST_L2_LEARN,
-+        INTRST_SPEED_CHANGE,
-+        INTRST_SPECIAL_CONGESTION,
-+        INTRST_PORT_LINKDOWN,
-+        INTRST_PORT_LINKUP,
-+        ADV_NOT_SUPPORT,
-+        INTRST_RLDP_LOOPED,
-+        INTRST_RLDP_RELEASED,
-+    };
-+
-+    if(adv_type >= ADV_END)
-+        return RT_ERR_INPUT;
-+
-+    if(asic_idx[adv_type] == ADV_NOT_SUPPORT)
-+        return RT_ERR_CHIP_NOT_SUPPORTED;
-+
-+    *pAsic_idx = asic_idx[adv_type];
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_int_advanceInfo_get
-+ * Description:
-+ *      Get interrupt advanced information.
-+ * Input:
-+ *      adv_type - Advanced interrupt type.
-+ * Output:
-+ *      info - Information per type.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can get advanced information when interrupt happened.
-+ *      The status will be cleared after execute this API.
-+ */
-+rtk_api_ret_t rtk_int_advanceInfo_get(rtk_int_advType_t adv_type, rtk_int_info_t *pInfo)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      data;
-+    rtk_uint32      intAdvType;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(adv_type >= ADV_END)
-+        return RT_ERR_INPUT;
-+
-+    if(NULL == pInfo)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(adv_type != ADV_METER_EXCEED_MASK)
-+    {
-+        if((retVal = _rtk_int_Advidx_get(adv_type, &intAdvType)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    switch(adv_type)
-+    {
-+        case ADV_L2_LEARN_PORT_MASK:
-+            /* Get physical portmask */
-+            if((retVal = rtl8367c_getAsicInterruptRelatedStatus(intAdvType, &data)) != RT_ERR_OK)
-+                return retVal;
-+
-+            /* Clear Advanced Info */
-+            if((retVal = rtl8367c_setAsicInterruptRelatedStatus(intAdvType, 0xFFFF)) != RT_ERR_OK)
-+                return retVal;
-+
-+            /* Translate to logical portmask */
-+            if((retVal = rtk_switch_portmask_P2L_get(data, &(pInfo->portMask))) != RT_ERR_OK)
-+                return retVal;
-+
-+            /* Get system learn */
-+            if((retVal = rtl8367c_getAsicInterruptRelatedStatus(INTRST_SYS_LEARN, &data)) != RT_ERR_OK)
-+                return retVal;
-+
-+            /* Clear system learn */
-+            if((retVal = rtl8367c_setAsicInterruptRelatedStatus(INTRST_SYS_LEARN, 0x0001)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pInfo->systemLearnOver = data;
-+            break;
-+        case ADV_SPEED_CHANGE_PORT_MASK:
-+        case ADV_SPECIAL_CONGESTION_PORT_MASK:
-+        case ADV_PORT_LINKDOWN_PORT_MASK:
-+        case ADV_PORT_LINKUP_PORT_MASK:
-+        case ADV_RLDP_LOOPED:
-+        case ADV_RLDP_RELEASED:
-+            /* Get physical portmask */
-+            if((retVal = rtl8367c_getAsicInterruptRelatedStatus(intAdvType, &data)) != RT_ERR_OK)
-+                return retVal;
-+
-+            /* Clear Advanced Info */
-+            if((retVal = rtl8367c_setAsicInterruptRelatedStatus(intAdvType, 0xFFFF)) != RT_ERR_OK)
-+                return retVal;
-+
-+            /* Translate to logical portmask */
-+            if((retVal = rtk_switch_portmask_P2L_get(data, &(pInfo->portMask))) != RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case ADV_METER_EXCEED_MASK:
-+            /* Get Meter Mask */
-+            if((retVal = rtl8367c_getAsicInterruptRelatedStatus(INTRST_METER0_15, &data)) != RT_ERR_OK)
-+                return retVal;
-+
-+            /* Clear Advanced Info */
-+            if((retVal = rtl8367c_setAsicInterruptRelatedStatus(INTRST_METER0_15, 0xFFFF)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pInfo->meterMask = data & 0xFFFF;
-+
-+            /* Get Meter Mask */
-+            if((retVal = rtl8367c_getAsicInterruptRelatedStatus(INTRST_METER16_31, &data)) != RT_ERR_OK)
-+                return retVal;
-+
-+            /* Clear Advanced Info */
-+            if((retVal = rtl8367c_setAsicInterruptRelatedStatus(INTRST_METER16_31, 0xFFFF)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pInfo->meterMask = pInfo->meterMask | ((data << 16) & 0xFFFF0000);
-+
-+            break;
-+        default:
-+            return RT_ERR_INPUT;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/l2.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/l2.c
-new file mode 100644
-index 0000000000..feff0b240b
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/l2.c
-@@ -0,0 +1,2911 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in L2 module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <l2.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_lut.h>
-+#include <rtl8367c_asicdrv_port.h>
-+
-+/* Function Name:
-+ *      rtk_l2_init
-+ * Description:
-+ *      Initialize l2 module of the specified device.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK          - OK
-+ *      RT_ERR_FAILED      - Failed
-+ *      RT_ERR_SMI         - SMI access error
-+ * Note:
-+ *      Initialize l2 module before calling any l2 APIs.
-+ */
-+rtk_api_ret_t rtk_l2_init(void)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 port;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((retVal = rtl8367c_setAsicLutIpMulticastLookup(DISABLED)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*Enable CAM Usage*/
-+    if ((retVal = rtl8367c_setAsicLutCamTbUsage(ENABLED)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicLutAgeTimerSpeed(6,2)) != RT_ERR_OK)
-+        return retVal;
-+
-+    RTK_SCAN_ALL_LOG_PORT(port)
-+    {
-+        if ((retVal = rtl8367c_setAsicLutLearnLimitNo(rtk_switch_port_L2P_get(port), rtk_switch_maxLutAddrNumber_get())) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_l2_addr_add
-+ * Description:
-+ *      Add LUT unicast entry.
-+ * Input:
-+ *      pMac - 6 bytes unicast(I/G bit is 0) mac address to be written into LUT.
-+ *      pL2_data - Unicast entry parameter
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_MAC              - Invalid MAC address.
-+ *      RT_ERR_L2_FID           - Invalid FID .
-+ *      RT_ERR_L2_INDEXTBL_FULL - hashed index is full of entries.
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ * Note:
-+ *      If the unicast mac address already existed in LUT, it will udpate the status of the entry.
-+ *      Otherwise, it will find an empty or asic auto learned entry to write. If all the entries
-+ *      with the same hash value can't be replaced, ASIC will return a RT_ERR_L2_INDEXTBL_FULL error.
-+ */
-+rtk_api_ret_t rtk_l2_addr_add(rtk_mac_t *pMac, rtk_l2_ucastAddr_t *pL2_data)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 method;
-+    rtl8367c_luttb l2Table;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* must be unicast address */
-+    if ((pMac == NULL) || (pMac->octet[0] & 0x1))
-+        return RT_ERR_MAC;
-+
-+    if(pL2_data == NULL)
-+        return RT_ERR_MAC;
-+
-+    RTK_CHK_PORT_VALID(pL2_data->port);
-+
-+    if (pL2_data->ivl >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if (pL2_data->cvid > RTL8367C_VIDMAX)
-+        return RT_ERR_L2_VID;
-+
-+    if (pL2_data->fid > RTL8367C_FIDMAX)
-+        return RT_ERR_L2_FID;
-+
-+    if (pL2_data->is_static>= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if (pL2_data->sa_block>= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if (pL2_data->da_block>= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if (pL2_data->auth>= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if (pL2_data->efid> RTL8367C_EFIDMAX)
-+        return RT_ERR_INPUT;
-+
-+    if (pL2_data->priority > RTL8367C_PRIMAX)
-+        return RT_ERR_INPUT;
-+
-+    if (pL2_data->sa_pri_en >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if (pL2_data->fwd_pri_en >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    memset(&l2Table, 0, sizeof(rtl8367c_luttb));
-+
-+    /* fill key (MAC,FID) to get L2 entry */
-+    memcpy(l2Table.mac.octet, pMac->octet, ETHER_ADDR_LEN);
-+    l2Table.ivl_svl     = pL2_data->ivl;
-+    l2Table.fid         = pL2_data->fid;
-+    l2Table.cvid_fid    = pL2_data->cvid;
-+    l2Table.efid        = pL2_data->efid;
-+    method = LUTREADMETHOD_MAC;
-+    retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table);
-+    if (RT_ERR_OK == retVal )
-+    {
-+        memcpy(l2Table.mac.octet, pMac->octet, ETHER_ADDR_LEN);
-+        l2Table.ivl_svl     = pL2_data->ivl;
-+        l2Table.cvid_fid    = pL2_data->cvid;
-+        l2Table.fid         = pL2_data->fid;
-+        l2Table.efid        = pL2_data->efid;
-+        l2Table.spa         = rtk_switch_port_L2P_get(pL2_data->port);
-+        l2Table.nosalearn   = pL2_data->is_static;
-+        l2Table.sa_block    = pL2_data->sa_block;
-+        l2Table.da_block    = pL2_data->da_block;
-+        l2Table.l3lookup    = 0;
-+        l2Table.auth        = pL2_data->auth;
-+        l2Table.age         = 6;
-+        l2Table.lut_pri     = pL2_data->priority;
-+        l2Table.sa_en       = pL2_data->sa_pri_en;
-+        l2Table.fwd_en      = pL2_data->fwd_pri_en;
-+        if((retVal = rtl8367c_setAsicL2LookupTb(&l2Table)) != RT_ERR_OK)
-+            return retVal;
-+
-+        pL2_data->address = l2Table.address;
-+        return RT_ERR_OK;
-+    }
-+    else if (RT_ERR_L2_ENTRY_NOTFOUND == retVal )
-+    {
-+        memset(&l2Table, 0, sizeof(rtl8367c_luttb));
-+        memcpy(l2Table.mac.octet, pMac->octet, ETHER_ADDR_LEN);
-+        l2Table.ivl_svl     = pL2_data->ivl;
-+        l2Table.cvid_fid    = pL2_data->cvid;
-+        l2Table.fid         = pL2_data->fid;
-+        l2Table.efid        = pL2_data->efid;
-+        l2Table.spa         = rtk_switch_port_L2P_get(pL2_data->port);
-+        l2Table.nosalearn   = pL2_data->is_static;
-+        l2Table.sa_block    = pL2_data->sa_block;
-+        l2Table.da_block    = pL2_data->da_block;
-+        l2Table.l3lookup    = 0;
-+        l2Table.auth        = pL2_data->auth;
-+        l2Table.age         = 6;
-+        l2Table.lut_pri     = pL2_data->priority;
-+        l2Table.sa_en       = pL2_data->sa_pri_en;
-+        l2Table.fwd_en      = pL2_data->fwd_pri_en;
-+
-+        if ((retVal = rtl8367c_setAsicL2LookupTb(&l2Table)) != RT_ERR_OK)
-+            return retVal;
-+
-+        pL2_data->address = l2Table.address;
-+
-+        method = LUTREADMETHOD_MAC;
-+        retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table);
-+        if (RT_ERR_L2_ENTRY_NOTFOUND == retVal )
-+            return RT_ERR_L2_INDEXTBL_FULL;
-+        else
-+            return retVal;
-+    }
-+    else
-+        return retVal;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_addr_get
-+ * Description:
-+ *      Get LUT unicast entry.
-+ * Input:
-+ *      pMac    - 6 bytes unicast(I/G bit is 0) mac address to be written into LUT.
-+ * Output:
-+ *      pL2_data - Unicast entry parameter
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_MAC                  - Invalid MAC address.
-+ *      RT_ERR_L2_FID               - Invalid FID .
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      If the unicast mac address existed in LUT, it will return the port and fid where
-+ *      the mac is learned. Otherwise, it will return a RT_ERR_L2_ENTRY_NOTFOUND error.
-+ */
-+rtk_api_ret_t rtk_l2_addr_get(rtk_mac_t *pMac, rtk_l2_ucastAddr_t *pL2_data)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 method;
-+    rtl8367c_luttb l2Table;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* must be unicast address */
-+    if ((pMac == NULL) || (pMac->octet[0] & 0x1))
-+        return RT_ERR_MAC;
-+
-+    if (pL2_data->fid > RTL8367C_FIDMAX || pL2_data->efid > RTL8367C_EFIDMAX)
-+        return RT_ERR_L2_FID;
-+
-+    memset(&l2Table, 0, sizeof(rtl8367c_luttb));
-+
-+    memcpy(l2Table.mac.octet, pMac->octet, ETHER_ADDR_LEN);
-+    l2Table.ivl_svl     = pL2_data->ivl;
-+    l2Table.cvid_fid    = pL2_data->cvid;
-+    l2Table.fid         = pL2_data->fid;
-+    l2Table.efid        = pL2_data->efid;
-+    method = LUTREADMETHOD_MAC;
-+
-+    if ((retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table)) != RT_ERR_OK)
-+        return retVal;
-+
-+    memcpy(pL2_data->mac.octet, pMac->octet,ETHER_ADDR_LEN);
-+    pL2_data->port      = rtk_switch_port_P2L_get(l2Table.spa);
-+    pL2_data->fid       = l2Table.fid;
-+    pL2_data->efid      = l2Table.efid;
-+    pL2_data->ivl       = l2Table.ivl_svl;
-+    pL2_data->cvid      = l2Table.cvid_fid;
-+    pL2_data->is_static = l2Table.nosalearn;
-+    pL2_data->auth      = l2Table.auth;
-+    pL2_data->sa_block  = l2Table.sa_block;
-+    pL2_data->da_block  = l2Table.da_block;
-+    pL2_data->priority  = l2Table.lut_pri;
-+    pL2_data->sa_pri_en = l2Table.sa_en;
-+    pL2_data->fwd_pri_en= l2Table.fwd_en;
-+    pL2_data->address   = l2Table.address;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_addr_next_get
-+ * Description:
-+ *      Get Next LUT unicast entry.
-+ * Input:
-+ *      read_method     - The reading method.
-+ *      port            - The port number if the read_metohd is READMETHOD_NEXT_L2UCSPA
-+ *      pAddress        - The Address ID
-+ * Output:
-+ *      pL2_data - Unicast entry parameter
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_MAC                  - Invalid MAC address.
-+ *      RT_ERR_L2_FID               - Invalid FID .
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      Get the next unicast entry after the current entry pointed by pAddress.
-+ *      The address of next entry is returned by pAddress. User can use (address + 1)
-+ *      as pAddress to call this API again for dumping all entries is LUT.
-+ */
-+rtk_api_ret_t rtk_l2_addr_next_get(rtk_l2_read_method_t read_method, rtk_port_t port, rtk_uint32 *pAddress, rtk_l2_ucastAddr_t *pL2_data)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      method;
-+    rtl8367c_luttb  l2Table;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Error Checking */
-+    if ((pL2_data == NULL) || (pAddress == NULL))
-+        return RT_ERR_MAC;
-+
-+    if(read_method == READMETHOD_NEXT_L2UC)
-+        method = LUTREADMETHOD_NEXT_L2UC;
-+    else if(read_method == READMETHOD_NEXT_L2UCSPA)
-+        method = LUTREADMETHOD_NEXT_L2UCSPA;
-+    else
-+        return RT_ERR_INPUT;
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(*pAddress > RTK_MAX_LUT_ADDR_ID )
-+        return RT_ERR_L2_L2UNI_PARAM;
-+
-+    memset(&l2Table, 0, sizeof(rtl8367c_luttb));
-+    l2Table.address = *pAddress;
-+
-+    if(read_method == READMETHOD_NEXT_L2UCSPA)
-+        l2Table.spa = rtk_switch_port_L2P_get(port);
-+
-+    if ((retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(l2Table.address < *pAddress)
-+        return RT_ERR_L2_ENTRY_NOTFOUND;
-+
-+    memcpy(pL2_data->mac.octet, l2Table.mac.octet, ETHER_ADDR_LEN);
-+    pL2_data->port      = rtk_switch_port_P2L_get(l2Table.spa);
-+    pL2_data->fid       = l2Table.fid;
-+    pL2_data->efid      = l2Table.efid;
-+    pL2_data->ivl       = l2Table.ivl_svl;
-+    pL2_data->cvid      = l2Table.cvid_fid;
-+    pL2_data->is_static = l2Table.nosalearn;
-+    pL2_data->auth      = l2Table.auth;
-+    pL2_data->sa_block  = l2Table.sa_block;
-+    pL2_data->da_block  = l2Table.da_block;
-+    pL2_data->priority  = l2Table.lut_pri;
-+    pL2_data->sa_pri_en = l2Table.sa_en;
-+    pL2_data->fwd_pri_en= l2Table.fwd_en;
-+    pL2_data->address   = l2Table.address;
-+
-+    *pAddress = l2Table.address;
-+
-+    return RT_ERR_OK;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_addr_del
-+ * Description:
-+ *      Delete LUT unicast entry.
-+ * Input:
-+ *      pMac - 6 bytes unicast(I/G bit is 0) mac address to be written into LUT.
-+ *      fid - Filtering database
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_MAC                  - Invalid MAC address.
-+ *      RT_ERR_L2_FID               - Invalid FID .
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      If the mac has existed in the LUT, it will be deleted. Otherwise, it will return RT_ERR_L2_ENTRY_NOTFOUND.
-+ */
-+rtk_api_ret_t rtk_l2_addr_del(rtk_mac_t *pMac, rtk_l2_ucastAddr_t *pL2_data)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 method;
-+    rtl8367c_luttb l2Table;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* must be unicast address */
-+    if ((pMac == NULL) || (pMac->octet[0] & 0x1))
-+        return RT_ERR_MAC;
-+
-+    if (pL2_data->fid > RTL8367C_FIDMAX || pL2_data->efid > RTL8367C_EFIDMAX)
-+        return RT_ERR_L2_FID;
-+
-+    memset(&l2Table, 0, sizeof(rtl8367c_luttb));
-+
-+    /* fill key (MAC,FID) to get L2 entry */
-+    memcpy(l2Table.mac.octet, pMac->octet, ETHER_ADDR_LEN);
-+    l2Table.ivl_svl     = pL2_data->ivl;
-+    l2Table.cvid_fid    = pL2_data->cvid;
-+    l2Table.fid         = pL2_data->fid;
-+    l2Table.efid        = pL2_data->efid;
-+    method = LUTREADMETHOD_MAC;
-+    retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table);
-+    if (RT_ERR_OK ==  retVal)
-+    {
-+        memcpy(l2Table.mac.octet, pMac->octet, ETHER_ADDR_LEN);
-+        l2Table.ivl_svl     = pL2_data->ivl;
-+        l2Table.cvid_fid    = pL2_data->cvid;
-+        l2Table.fid = pL2_data->fid;
-+        l2Table.efid = pL2_data->efid;
-+        l2Table.spa = 0;
-+        l2Table.nosalearn = 0;
-+        l2Table.sa_block = 0;
-+        l2Table.da_block = 0;
-+        l2Table.auth = 0;
-+        l2Table.age = 0;
-+        l2Table.lut_pri = 0;
-+        l2Table.sa_en = 0;
-+        l2Table.fwd_en = 0;
-+        if((retVal = rtl8367c_setAsicL2LookupTb(&l2Table)) != RT_ERR_OK)
-+            return retVal;
-+
-+        pL2_data->address = l2Table.address;
-+        return RT_ERR_OK;
-+    }
-+    else
-+        return retVal;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_mcastAddr_add
-+ * Description:
-+ *      Add LUT multicast entry.
-+ * Input:
-+ *      pMcastAddr  - L2 multicast entry structure
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_MAC              - Invalid MAC address.
-+ *      RT_ERR_L2_FID           - Invalid FID .
-+ *      RT_ERR_L2_VID           - Invalid VID .
-+ *      RT_ERR_L2_INDEXTBL_FULL - hashed index is full of entries.
-+ *      RT_ERR_PORT_MASK        - Invalid portmask.
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ * Note:
-+ *      If the multicast mac address already existed in the LUT, it will udpate the
-+ *      port mask of the entry. Otherwise, it will find an empty or asic auto learned
-+ *      entry to write. If all the entries with the same hash value can't be replaced,
-+ *      ASIC will return a RT_ERR_L2_INDEXTBL_FULL error.
-+ */
-+rtk_api_ret_t rtk_l2_mcastAddr_add(rtk_l2_mcastAddr_t *pMcastAddr)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      method;
-+    rtl8367c_luttb  l2Table;
-+    rtk_uint32      pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pMcastAddr)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* must be L2 multicast address */
-+    if( (pMcastAddr->mac.octet[0] & 0x01) != 0x01)
-+        return RT_ERR_MAC;
-+
-+    RTK_CHK_PORTMASK_VALID(&pMcastAddr->portmask);
-+
-+    if(pMcastAddr->ivl == 1)
-+    {
-+        if (pMcastAddr->vid > RTL8367C_VIDMAX)
-+            return RT_ERR_L2_VID;
-+    }
-+    else if(pMcastAddr->ivl == 0)
-+    {
-+        if (pMcastAddr->fid > RTL8367C_FIDMAX)
-+            return RT_ERR_L2_FID;
-+    }
-+    else
-+        return RT_ERR_INPUT;
-+
-+    if(pMcastAddr->fwd_pri_en >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if(pMcastAddr->priority > RTL8367C_PRIMAX)
-+        return RT_ERR_INPUT;
-+
-+    /* Get physical port mask */
-+    if ((retVal = rtk_switch_portmask_L2P_get(&pMcastAddr->portmask, &pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    memset(&l2Table, 0, sizeof(rtl8367c_luttb));
-+
-+    /* fill key (MAC,FID) to get L2 entry */
-+    memcpy(l2Table.mac.octet, pMcastAddr->mac.octet, ETHER_ADDR_LEN);
-+    l2Table.ivl_svl     = pMcastAddr->ivl;
-+
-+    if(pMcastAddr->ivl)
-+        l2Table.cvid_fid    = pMcastAddr->vid;
-+    else
-+        l2Table.cvid_fid    = pMcastAddr->fid;
-+
-+    method = LUTREADMETHOD_MAC;
-+    retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table);
-+    if (RT_ERR_OK == retVal)
-+    {
-+        memcpy(l2Table.mac.octet, pMcastAddr->mac.octet, ETHER_ADDR_LEN);
-+        l2Table.ivl_svl     = pMcastAddr->ivl;
-+
-+        if(pMcastAddr->ivl)
-+            l2Table.cvid_fid    = pMcastAddr->vid;
-+        else
-+            l2Table.cvid_fid    = pMcastAddr->fid;
-+
-+        l2Table.mbr         = pmask;
-+        l2Table.nosalearn   = 1;
-+        l2Table.l3lookup    = 0;
-+        l2Table.lut_pri     = pMcastAddr->priority;
-+        l2Table.fwd_en      = pMcastAddr->fwd_pri_en;
-+        if((retVal = rtl8367c_setAsicL2LookupTb(&l2Table)) != RT_ERR_OK)
-+            return retVal;
-+
-+        pMcastAddr->address = l2Table.address;
-+        return RT_ERR_OK;
-+    }
-+    else if (RT_ERR_L2_ENTRY_NOTFOUND == retVal)
-+    {
-+        memset(&l2Table, 0, sizeof(rtl8367c_luttb));
-+        memcpy(l2Table.mac.octet, pMcastAddr->mac.octet, ETHER_ADDR_LEN);
-+        l2Table.ivl_svl     = pMcastAddr->ivl;
-+        if(pMcastAddr->ivl)
-+            l2Table.cvid_fid    = pMcastAddr->vid;
-+        else
-+            l2Table.cvid_fid    = pMcastAddr->fid;
-+
-+        l2Table.mbr         = pmask;
-+        l2Table.nosalearn   = 1;
-+        l2Table.l3lookup    = 0;
-+        l2Table.lut_pri     = pMcastAddr->priority;
-+        l2Table.fwd_en      = pMcastAddr->fwd_pri_en;
-+        if ((retVal = rtl8367c_setAsicL2LookupTb(&l2Table)) != RT_ERR_OK)
-+            return retVal;
-+
-+        pMcastAddr->address = l2Table.address;
-+
-+        method = LUTREADMETHOD_MAC;
-+        retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table);
-+        if (RT_ERR_L2_ENTRY_NOTFOUND == retVal)
-+            return     RT_ERR_L2_INDEXTBL_FULL;
-+        else
-+            return retVal;
-+    }
-+    else
-+        return retVal;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_mcastAddr_get
-+ * Description:
-+ *      Get LUT multicast entry.
-+ * Input:
-+ *      pMcastAddr  - L2 multicast entry structure
-+ * Output:
-+ *      pMcastAddr  - L2 multicast entry structure
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_MAC                  - Invalid MAC address.
-+ *      RT_ERR_L2_FID               - Invalid FID .
-+ *      RT_ERR_L2_VID               - Invalid VID .
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      If the multicast mac address existed in the LUT, it will return the port where
-+ *      the mac is learned. Otherwise, it will return a RT_ERR_L2_ENTRY_NOTFOUND error.
-+ */
-+rtk_api_ret_t rtk_l2_mcastAddr_get(rtk_l2_mcastAddr_t *pMcastAddr)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 method;
-+    rtl8367c_luttb l2Table;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pMcastAddr)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* must be L2 multicast address */
-+    if( (pMcastAddr->mac.octet[0] & 0x01) != 0x01)
-+        return RT_ERR_MAC;
-+
-+    if(pMcastAddr->ivl == 1)
-+    {
-+        if (pMcastAddr->vid > RTL8367C_VIDMAX)
-+            return RT_ERR_L2_VID;
-+    }
-+    else if(pMcastAddr->ivl == 0)
-+    {
-+        if (pMcastAddr->fid > RTL8367C_FIDMAX)
-+            return RT_ERR_L2_FID;
-+    }
-+    else
-+        return RT_ERR_INPUT;
-+
-+    memset(&l2Table, 0, sizeof(rtl8367c_luttb));
-+    memcpy(l2Table.mac.octet, pMcastAddr->mac.octet, ETHER_ADDR_LEN);
-+    l2Table.ivl_svl     = pMcastAddr->ivl;
-+
-+    if(pMcastAddr->ivl)
-+        l2Table.cvid_fid    = pMcastAddr->vid;
-+    else
-+        l2Table.cvid_fid    = pMcastAddr->fid;
-+
-+    method = LUTREADMETHOD_MAC;
-+
-+    if ((retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table)) != RT_ERR_OK)
-+        return retVal;
-+
-+    pMcastAddr->priority    = l2Table.lut_pri;
-+    pMcastAddr->fwd_pri_en  = l2Table.fwd_en;
-+    pMcastAddr->igmp_asic   = l2Table.igmp_asic;
-+    pMcastAddr->igmp_index  = l2Table.igmpidx;
-+    pMcastAddr->address     = l2Table.address;
-+
-+    /* Get Logical port mask */
-+    if ((retVal = rtk_switch_portmask_P2L_get(l2Table.mbr, &pMcastAddr->portmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_mcastAddr_next_get
-+ * Description:
-+ *      Get Next L2 Multicast entry.
-+ * Input:
-+ *      pAddress        - The Address ID
-+ * Output:
-+ *      pMcastAddr  - L2 multicast entry structure
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      Get the next L2 multicast entry after the current entry pointed by pAddress.
-+ *      The address of next entry is returned by pAddress. User can use (address + 1)
-+ *      as pAddress to call this API again for dumping all multicast entries is LUT.
-+ */
-+rtk_api_ret_t rtk_l2_mcastAddr_next_get(rtk_uint32 *pAddress, rtk_l2_mcastAddr_t *pMcastAddr)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtl8367c_luttb  l2Table;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Error Checking */
-+    if ((pAddress == NULL) || (pMcastAddr == NULL))
-+        return RT_ERR_INPUT;
-+
-+    if(*pAddress > RTK_MAX_LUT_ADDR_ID )
-+        return RT_ERR_L2_L2UNI_PARAM;
-+
-+    memset(&l2Table, 0, sizeof(rtl8367c_luttb));
-+    l2Table.address = *pAddress;
-+
-+    if ((retVal = rtl8367c_getAsicL2LookupTb(LUTREADMETHOD_NEXT_L2MC, &l2Table)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(l2Table.address < *pAddress)
-+        return RT_ERR_L2_ENTRY_NOTFOUND;
-+
-+    memcpy(pMcastAddr->mac.octet, l2Table.mac.octet, ETHER_ADDR_LEN);
-+    pMcastAddr->ivl     = l2Table.ivl_svl;
-+
-+    if(pMcastAddr->ivl)
-+        pMcastAddr->vid = l2Table.cvid_fid;
-+    else
-+        pMcastAddr->fid = l2Table.cvid_fid;
-+
-+    pMcastAddr->priority    = l2Table.lut_pri;
-+    pMcastAddr->fwd_pri_en  = l2Table.fwd_en;
-+    pMcastAddr->igmp_asic   = l2Table.igmp_asic;
-+    pMcastAddr->igmp_index  = l2Table.igmpidx;
-+    pMcastAddr->address     = l2Table.address;
-+
-+    /* Get Logical port mask */
-+    if ((retVal = rtk_switch_portmask_P2L_get(l2Table.mbr, &pMcastAddr->portmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pAddress = l2Table.address;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_mcastAddr_del
-+ * Description:
-+ *      Delete LUT multicast entry.
-+ * Input:
-+ *      pMcastAddr  - L2 multicast entry structure
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_MAC                  - Invalid MAC address.
-+ *      RT_ERR_L2_FID               - Invalid FID .
-+ *      RT_ERR_L2_VID               - Invalid VID .
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      If the mac has existed in the LUT, it will be deleted. Otherwise, it will return RT_ERR_L2_ENTRY_NOTFOUND.
-+ */
-+rtk_api_ret_t rtk_l2_mcastAddr_del(rtk_l2_mcastAddr_t *pMcastAddr)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 method;
-+    rtl8367c_luttb l2Table;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pMcastAddr)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* must be L2 multicast address */
-+    if( (pMcastAddr->mac.octet[0] & 0x01) != 0x01)
-+        return RT_ERR_MAC;
-+
-+    if(pMcastAddr->ivl == 1)
-+    {
-+        if (pMcastAddr->vid > RTL8367C_VIDMAX)
-+            return RT_ERR_L2_VID;
-+    }
-+    else if(pMcastAddr->ivl == 0)
-+    {
-+        if (pMcastAddr->fid > RTL8367C_FIDMAX)
-+            return RT_ERR_L2_FID;
-+    }
-+    else
-+        return RT_ERR_INPUT;
-+
-+    memset(&l2Table, 0, sizeof(rtl8367c_luttb));
-+
-+    /* fill key (MAC,FID) to get L2 entry */
-+    memcpy(l2Table.mac.octet, pMcastAddr->mac.octet, ETHER_ADDR_LEN);
-+    l2Table.ivl_svl     = pMcastAddr->ivl;
-+
-+    if(pMcastAddr->ivl)
-+        l2Table.cvid_fid    = pMcastAddr->vid;
-+    else
-+        l2Table.cvid_fid    = pMcastAddr->fid;
-+
-+    method = LUTREADMETHOD_MAC;
-+    retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table);
-+    if (RT_ERR_OK == retVal)
-+    {
-+        memcpy(l2Table.mac.octet, pMcastAddr->mac.octet, ETHER_ADDR_LEN);
-+        l2Table.ivl_svl     = pMcastAddr->ivl;
-+
-+        if(pMcastAddr->ivl)
-+            l2Table.cvid_fid    = pMcastAddr->vid;
-+        else
-+            l2Table.cvid_fid    = pMcastAddr->fid;
-+
-+        l2Table.mbr         = 0;
-+        l2Table.nosalearn   = 0;
-+        l2Table.sa_block    = 0;
-+        l2Table.l3lookup    = 0;
-+        l2Table.lut_pri     = 0;
-+        l2Table.fwd_en      = 0;
-+        if((retVal = rtl8367c_setAsicL2LookupTb(&l2Table)) != RT_ERR_OK)
-+            return retVal;
-+
-+        pMcastAddr->address = l2Table.address;
-+        return RT_ERR_OK;
-+    }
-+    else
-+        return retVal;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastAddr_add
-+ * Description:
-+ *      Add Lut IP multicast entry
-+ * Input:
-+ *      pIpMcastAddr    - IP Multicast entry
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_L2_INDEXTBL_FULL - hashed index is full of entries.
-+ *      RT_ERR_PORT_MASK        - Invalid portmask.
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ * Note:
-+ *      System supports L2 entry with IP multicast DIP/SIP to forward IP multicasting frame as user
-+ *      desired. If this function is enabled, then system will be looked up L2 IP multicast entry to
-+ *      forward IP multicast frame directly without flooding.
-+ */
-+rtk_api_ret_t rtk_l2_ipMcastAddr_add(rtk_l2_ipMcastAddr_t *pIpMcastAddr)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 method;
-+    rtl8367c_luttb l2Table;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pIpMcastAddr)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* check port mask */
-+    RTK_CHK_PORTMASK_VALID(&pIpMcastAddr->portmask);
-+
-+    if( (pIpMcastAddr->dip & 0xF0000000) != 0xE0000000)
-+        return RT_ERR_INPUT;
-+
-+    if(pIpMcastAddr->fwd_pri_en >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if(pIpMcastAddr->priority > RTL8367C_PRIMAX)
-+        return RT_ERR_INPUT;
-+
-+    /* Get Physical port mask */
-+    if ((retVal = rtk_switch_portmask_L2P_get(&pIpMcastAddr->portmask, &pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    memset(&l2Table, 0x00, sizeof(rtl8367c_luttb));
-+    l2Table.sip = pIpMcastAddr->sip;
-+    l2Table.dip = pIpMcastAddr->dip;
-+    l2Table.l3lookup = 1;
-+    l2Table.l3vidlookup = 0;
-+    method = LUTREADMETHOD_MAC;
-+    retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table);
-+    if (RT_ERR_OK == retVal)
-+    {
-+        l2Table.sip = pIpMcastAddr->sip;
-+        l2Table.dip = pIpMcastAddr->dip;
-+        l2Table.mbr = pmask;
-+        l2Table.nosalearn = 1;
-+        l2Table.l3lookup = 1;
-+        l2Table.l3vidlookup = 0;
-+        l2Table.lut_pri = pIpMcastAddr->priority;
-+        l2Table.fwd_en  = pIpMcastAddr->fwd_pri_en;
-+        if((retVal = rtl8367c_setAsicL2LookupTb(&l2Table)) != RT_ERR_OK)
-+            return retVal;
-+
-+        pIpMcastAddr->address = l2Table.address;
-+        return RT_ERR_OK;
-+    }
-+    else if (RT_ERR_L2_ENTRY_NOTFOUND == retVal)
-+    {
-+        memset(&l2Table, 0, sizeof(rtl8367c_luttb));
-+        l2Table.sip = pIpMcastAddr->sip;
-+        l2Table.dip = pIpMcastAddr->dip;
-+        l2Table.mbr = pmask;
-+        l2Table.nosalearn = 1;
-+        l2Table.l3lookup = 1;
-+        l2Table.l3vidlookup = 0;
-+        l2Table.lut_pri = pIpMcastAddr->priority;
-+        l2Table.fwd_en  = pIpMcastAddr->fwd_pri_en;
-+        if ((retVal = rtl8367c_setAsicL2LookupTb(&l2Table)) != RT_ERR_OK)
-+            return retVal;
-+
-+        pIpMcastAddr->address = l2Table.address;
-+
-+        method = LUTREADMETHOD_MAC;
-+        retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table);
-+        if (RT_ERR_L2_ENTRY_NOTFOUND == retVal)
-+            return     RT_ERR_L2_INDEXTBL_FULL;
-+        else
-+            return retVal;
-+
-+    }
-+    else
-+        return retVal;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastAddr_get
-+ * Description:
-+ *      Get LUT IP multicast entry.
-+ * Input:
-+ *      pIpMcastAddr    - IP Multicast entry
-+ * Output:
-+ *      pIpMcastAddr    - IP Multicast entry
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      The API can get Lut table of IP multicast entry.
-+ */
-+rtk_api_ret_t rtk_l2_ipMcastAddr_get(rtk_l2_ipMcastAddr_t *pIpMcastAddr)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 method;
-+    rtl8367c_luttb l2Table;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pIpMcastAddr)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if( (pIpMcastAddr->dip & 0xF0000000) != 0xE0000000)
-+        return RT_ERR_INPUT;
-+
-+    memset(&l2Table, 0x00, sizeof(rtl8367c_luttb));
-+    l2Table.sip = pIpMcastAddr->sip;
-+    l2Table.dip = pIpMcastAddr->dip;
-+    l2Table.l3lookup = 1;
-+    l2Table.l3vidlookup = 0;
-+    method = LUTREADMETHOD_MAC;
-+    if ((retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Get Logical port mask */
-+    if ((retVal = rtk_switch_portmask_P2L_get(l2Table.mbr, &pIpMcastAddr->portmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    pIpMcastAddr->priority      = l2Table.lut_pri;
-+    pIpMcastAddr->fwd_pri_en    = l2Table.fwd_en;
-+    pIpMcastAddr->igmp_asic     = l2Table.igmp_asic;
-+    pIpMcastAddr->igmp_index    = l2Table.igmpidx;
-+    pIpMcastAddr->address       = l2Table.address;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastAddr_next_get
-+ * Description:
-+ *      Get Next IP Multicast entry.
-+ * Input:
-+ *      pAddress        - The Address ID
-+ * Output:
-+ *      pIpMcastAddr    - IP Multicast entry
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      Get the next IP multicast entry after the current entry pointed by pAddress.
-+ *      The address of next entry is returned by pAddress. User can use (address + 1)
-+ *      as pAddress to call this API again for dumping all IP multicast entries is LUT.
-+ */
-+rtk_api_ret_t rtk_l2_ipMcastAddr_next_get(rtk_uint32 *pAddress, rtk_l2_ipMcastAddr_t *pIpMcastAddr)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtl8367c_luttb  l2Table;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Error Checking */
-+    if ((pAddress == NULL) || (pIpMcastAddr == NULL) )
-+        return RT_ERR_INPUT;
-+
-+    if(*pAddress > RTK_MAX_LUT_ADDR_ID )
-+        return RT_ERR_L2_L2UNI_PARAM;
-+
-+    memset(&l2Table, 0, sizeof(rtl8367c_luttb));
-+    l2Table.address = *pAddress;
-+
-+    do
-+    {
-+        if ((retVal = rtl8367c_getAsicL2LookupTb(LUTREADMETHOD_NEXT_L3MC, &l2Table)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if(l2Table.address < *pAddress)
-+            return RT_ERR_L2_ENTRY_NOTFOUND;
-+
-+    }while(l2Table.l3vidlookup == 1);
-+
-+    pIpMcastAddr->sip = l2Table.sip;
-+    pIpMcastAddr->dip = l2Table.dip;
-+
-+    /* Get Logical port mask */
-+    if ((retVal = rtk_switch_portmask_P2L_get(l2Table.mbr, &pIpMcastAddr->portmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    pIpMcastAddr->priority      = l2Table.lut_pri;
-+    pIpMcastAddr->fwd_pri_en    = l2Table.fwd_en;
-+    pIpMcastAddr->igmp_asic     = l2Table.igmp_asic;
-+    pIpMcastAddr->igmp_index    = l2Table.igmpidx;
-+    pIpMcastAddr->address       = l2Table.address;
-+    *pAddress = l2Table.address;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastAddr_del
-+ * Description:
-+ *      Delete a ip multicast address entry from the specified device.
-+ * Input:
-+ *      pIpMcastAddr    - IP Multicast entry
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      The API can delete a IP multicast address entry from the specified device.
-+ */
-+rtk_api_ret_t rtk_l2_ipMcastAddr_del(rtk_l2_ipMcastAddr_t *pIpMcastAddr)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 method;
-+    rtl8367c_luttb l2Table;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Error Checking */
-+    if (pIpMcastAddr == NULL)
-+        return RT_ERR_INPUT;
-+
-+    if( (pIpMcastAddr->dip & 0xF0000000) != 0xE0000000)
-+        return RT_ERR_INPUT;
-+
-+    memset(&l2Table, 0x00, sizeof(rtl8367c_luttb));
-+    l2Table.sip = pIpMcastAddr->sip;
-+    l2Table.dip = pIpMcastAddr->dip;
-+    l2Table.l3lookup = 1;
-+    l2Table.l3vidlookup = 0;
-+    method = LUTREADMETHOD_MAC;
-+    retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table);
-+    if (RT_ERR_OK == retVal)
-+    {
-+        l2Table.sip = pIpMcastAddr->sip;
-+        l2Table.dip = pIpMcastAddr->dip;
-+        l2Table.mbr = 0;
-+        l2Table.nosalearn = 0;
-+        l2Table.l3lookup = 1;
-+        l2Table.l3vidlookup = 0;
-+        l2Table.lut_pri = 0;
-+        l2Table.fwd_en  = 0;
-+        if((retVal = rtl8367c_setAsicL2LookupTb(&l2Table)) != RT_ERR_OK)
-+            return retVal;
-+
-+        pIpMcastAddr->address = l2Table.address;
-+        return RT_ERR_OK;
-+    }
-+    else
-+        return retVal;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_ipVidMcastAddr_add
-+ * Description:
-+ *      Add Lut IP multicast+VID entry
-+ * Input:
-+ *      pIpVidMcastAddr - IP & VID multicast Entry
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_L2_INDEXTBL_FULL - hashed index is full of entries.
-+ *      RT_ERR_PORT_MASK        - Invalid portmask.
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_l2_ipVidMcastAddr_add(rtk_l2_ipVidMcastAddr_t *pIpVidMcastAddr)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 method;
-+    rtl8367c_luttb l2Table;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pIpVidMcastAddr)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* check port mask */
-+    RTK_CHK_PORTMASK_VALID(&pIpVidMcastAddr->portmask);
-+
-+    if (pIpVidMcastAddr->vid > RTL8367C_VIDMAX)
-+        return RT_ERR_L2_VID;
-+
-+    if( (pIpVidMcastAddr->dip & 0xF0000000) != 0xE0000000)
-+        return RT_ERR_INPUT;
-+
-+    /* Get Physical port mask */
-+    if ((retVal = rtk_switch_portmask_L2P_get(&pIpVidMcastAddr->portmask, &pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    memset(&l2Table, 0x00, sizeof(rtl8367c_luttb));
-+    l2Table.sip = pIpVidMcastAddr->sip;
-+    l2Table.dip = pIpVidMcastAddr->dip;
-+    l2Table.l3lookup = 1;
-+    l2Table.l3vidlookup = 1;
-+    l2Table.l3_vid = pIpVidMcastAddr->vid;
-+    method = LUTREADMETHOD_MAC;
-+    retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table);
-+    if (RT_ERR_OK == retVal)
-+    {
-+        l2Table.sip = pIpVidMcastAddr->sip;
-+        l2Table.dip = pIpVidMcastAddr->dip;
-+        l2Table.mbr = pmask;
-+        l2Table.nosalearn = 1;
-+        l2Table.l3lookup = 1;
-+        l2Table.l3vidlookup = 1;
-+        l2Table.l3_vid = pIpVidMcastAddr->vid;
-+        if((retVal = rtl8367c_setAsicL2LookupTb(&l2Table)) != RT_ERR_OK)
-+            return retVal;
-+
-+        pIpVidMcastAddr->address = l2Table.address;
-+        return RT_ERR_OK;
-+    }
-+    else if (RT_ERR_L2_ENTRY_NOTFOUND == retVal)
-+    {
-+        memset(&l2Table, 0, sizeof(rtl8367c_luttb));
-+        l2Table.sip = pIpVidMcastAddr->sip;
-+        l2Table.dip = pIpVidMcastAddr->dip;
-+        l2Table.mbr = pmask;
-+        l2Table.nosalearn = 1;
-+        l2Table.l3lookup = 1;
-+        l2Table.l3vidlookup = 1;
-+        l2Table.l3_vid = pIpVidMcastAddr->vid;
-+        if ((retVal = rtl8367c_setAsicL2LookupTb(&l2Table)) != RT_ERR_OK)
-+            return retVal;
-+
-+        pIpVidMcastAddr->address = l2Table.address;
-+
-+        method = LUTREADMETHOD_MAC;
-+        retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table);
-+        if (RT_ERR_L2_ENTRY_NOTFOUND == retVal)
-+            return     RT_ERR_L2_INDEXTBL_FULL;
-+        else
-+            return retVal;
-+
-+    }
-+    else
-+        return retVal;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_ipVidMcastAddr_get
-+ * Description:
-+ *      Get LUT IP multicast+VID entry.
-+ * Input:
-+ *      pIpVidMcastAddr - IP & VID multicast Entry
-+ * Output:
-+ *      pIpVidMcastAddr - IP & VID multicast Entry
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_l2_ipVidMcastAddr_get(rtk_l2_ipVidMcastAddr_t *pIpVidMcastAddr)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 method;
-+    rtl8367c_luttb l2Table;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pIpVidMcastAddr)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (pIpVidMcastAddr->vid > RTL8367C_VIDMAX)
-+        return RT_ERR_L2_VID;
-+
-+    if( (pIpVidMcastAddr->dip & 0xF0000000) != 0xE0000000)
-+        return RT_ERR_INPUT;
-+
-+    memset(&l2Table, 0x00, sizeof(rtl8367c_luttb));
-+    l2Table.sip = pIpVidMcastAddr->sip;
-+    l2Table.dip = pIpVidMcastAddr->dip;
-+    l2Table.l3lookup = 1;
-+    l2Table.l3vidlookup = 1;
-+    l2Table.l3_vid = pIpVidMcastAddr->vid;
-+    method = LUTREADMETHOD_MAC;
-+    if ((retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table)) != RT_ERR_OK)
-+        return retVal;
-+
-+    pIpVidMcastAddr->address = l2Table.address;
-+
-+     /* Get Logical port mask */
-+    if ((retVal = rtk_switch_portmask_P2L_get(l2Table.mbr, &pIpVidMcastAddr->portmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_ipVidMcastAddr_next_get
-+ * Description:
-+ *      Get Next IP Multicast+VID entry.
-+ * Input:
-+ *      pAddress        - The Address ID
-+ * Output:
-+ *      pIpVidMcastAddr - IP & VID multicast Entry
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *      Get the next IP multicast entry after the current entry pointed by pAddress.
-+ *      The address of next entry is returned by pAddress. User can use (address + 1)
-+ *      as pAddress to call this API again for dumping all IP multicast entries is LUT.
-+ */
-+rtk_api_ret_t rtk_l2_ipVidMcastAddr_next_get(rtk_uint32 *pAddress, rtk_l2_ipVidMcastAddr_t *pIpVidMcastAddr)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtl8367c_luttb  l2Table;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Error Checking */
-+    if ((pAddress == NULL) || (pIpVidMcastAddr == NULL))
-+        return RT_ERR_INPUT;
-+
-+    if(*pAddress > RTK_MAX_LUT_ADDR_ID )
-+        return RT_ERR_L2_L2UNI_PARAM;
-+
-+    memset(&l2Table, 0, sizeof(rtl8367c_luttb));
-+    l2Table.address = *pAddress;
-+
-+    do
-+    {
-+        if ((retVal = rtl8367c_getAsicL2LookupTb(LUTREADMETHOD_NEXT_L3MC, &l2Table)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if(l2Table.address < *pAddress)
-+            return RT_ERR_L2_ENTRY_NOTFOUND;
-+
-+    }while(l2Table.l3vidlookup == 0);
-+
-+    pIpVidMcastAddr->sip        = l2Table.sip;
-+    pIpVidMcastAddr->dip        = l2Table.dip;
-+    pIpVidMcastAddr->vid        = l2Table.l3_vid;
-+    pIpVidMcastAddr->address    = l2Table.address;
-+
-+    /* Get Logical port mask */
-+    if ((retVal = rtk_switch_portmask_P2L_get(l2Table.mbr, &pIpVidMcastAddr->portmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pAddress = l2Table.address;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_ipVidMcastAddr_del
-+ * Description:
-+ *      Delete a ip multicast+VID address entry from the specified device.
-+ * Input:
-+ *      pIpVidMcastAddr - IP & VID multicast Entry
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_L2_ENTRY_NOTFOUND    - No such LUT entry.
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_l2_ipVidMcastAddr_del(rtk_l2_ipVidMcastAddr_t *pIpVidMcastAddr)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 method;
-+    rtl8367c_luttb l2Table;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pIpVidMcastAddr)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (pIpVidMcastAddr->vid > RTL8367C_VIDMAX)
-+        return RT_ERR_L2_VID;
-+
-+    if( (pIpVidMcastAddr->dip & 0xF0000000) != 0xE0000000)
-+        return RT_ERR_INPUT;
-+
-+    memset(&l2Table, 0x00, sizeof(rtl8367c_luttb));
-+    l2Table.sip = pIpVidMcastAddr->sip;
-+    l2Table.dip = pIpVidMcastAddr->dip;
-+    l2Table.l3lookup = 1;
-+    l2Table.l3vidlookup = 1;
-+    l2Table.l3_vid = pIpVidMcastAddr->vid;
-+    method = LUTREADMETHOD_MAC;
-+    retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table);
-+    if (RT_ERR_OK == retVal)
-+    {
-+        l2Table.sip = pIpVidMcastAddr->sip;
-+        l2Table.dip = pIpVidMcastAddr->dip;
-+        l2Table.mbr= 0;
-+        l2Table.nosalearn = 0;
-+        l2Table.l3lookup = 1;
-+        l2Table.l3vidlookup = 1;
-+        l2Table.l3_vid = pIpVidMcastAddr->vid;
-+        if((retVal = rtl8367c_setAsicL2LookupTb(&l2Table)) != RT_ERR_OK)
-+            return retVal;
-+
-+        pIpVidMcastAddr->address = l2Table.address;
-+        return RT_ERR_OK;
-+    }
-+    else
-+        return retVal;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_ucastAddr_flush
-+ * Description:
-+ *      Flush L2 mac address by type in the specified device (both dynamic and static).
-+ * Input:
-+ *      pConfig - flush configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_VLAN_VID     - Invalid VID parameter.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      flushByVid          - 1: Flush by VID, 0: Don't flush by VID
-+ *      vid                 - VID (0 ~ 4095)
-+ *      flushByFid          - 1: Flush by FID, 0: Don't flush by FID
-+ *      fid                 - FID (0 ~ 15)
-+ *      flushByPort         - 1: Flush by Port, 0: Don't flush by Port
-+ *      port                - Port ID
-+ *      flushByMac          - Not Supported
-+ *      ucastAddr           - Not Supported
-+ *      flushStaticAddr     - 1: Flush both Static and Dynamic entries, 0: Flush only Dynamic entries
-+ *      flushAddrOnAllPorts - 1: Flush VID-matched entries at all ports, 0: Flush VID-matched entries per port.
-+ */
-+rtk_api_ret_t rtk_l2_ucastAddr_flush(rtk_l2_flushCfg_t *pConfig)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(pConfig == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(pConfig->flushByVid >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if(pConfig->flushByFid >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if(pConfig->flushByPort >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if(pConfig->flushByMac >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if(pConfig->flushStaticAddr >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if(pConfig->flushAddrOnAllPorts >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if(pConfig->vid > RTL8367C_VIDMAX)
-+        return RT_ERR_VLAN_VID;
-+
-+    if(pConfig->fid > RTL8367C_FIDMAX)
-+        return RT_ERR_INPUT;
-+
-+    /* check port valid */
-+    RTK_CHK_PORT_VALID(pConfig->port);
-+
-+    if(pConfig->flushByVid == ENABLED)
-+    {
-+        if ((retVal = rtl8367c_setAsicLutFlushMode(FLUSHMDOE_VID)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicLutFlushVid(pConfig->vid)) != RT_ERR_OK)
-+                return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicLutFlushType((pConfig->flushStaticAddr == ENABLED) ? FLUSHTYPE_BOTH : FLUSHTYPE_DYNAMIC)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if(pConfig->flushAddrOnAllPorts == ENABLED)
-+        {
-+            if ((retVal = rtl8367c_setAsicLutForceFlush(RTL8367C_PORTMASK)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+        else if(pConfig->flushByPort == ENABLED)
-+        {
-+            if ((retVal = rtl8367c_setAsicLutForceFlush(1 << rtk_switch_port_L2P_get(pConfig->port))) != RT_ERR_OK)
-+                return retVal;
-+        }
-+        else
-+            return RT_ERR_INPUT;
-+    }
-+    else if(pConfig->flushByFid == ENABLED)
-+    {
-+        if ((retVal = rtl8367c_setAsicLutFlushMode(FLUSHMDOE_FID)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicLutFlushFid(pConfig->fid)) != RT_ERR_OK)
-+                return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicLutFlushType((pConfig->flushStaticAddr == ENABLED) ? FLUSHTYPE_BOTH : FLUSHTYPE_DYNAMIC)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if(pConfig->flushAddrOnAllPorts == ENABLED)
-+        {
-+            if ((retVal = rtl8367c_setAsicLutForceFlush(RTL8367C_PORTMASK)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+        else if(pConfig->flushByPort == ENABLED)
-+        {
-+            if ((retVal = rtl8367c_setAsicLutForceFlush(1 << rtk_switch_port_L2P_get(pConfig->port))) != RT_ERR_OK)
-+                return retVal;
-+        }
-+        else
-+            return RT_ERR_INPUT;
-+    }
-+    else if(pConfig->flushByPort == ENABLED)
-+    {
-+        if ((retVal = rtl8367c_setAsicLutFlushType((pConfig->flushStaticAddr == ENABLED) ? FLUSHTYPE_BOTH : FLUSHTYPE_DYNAMIC)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicLutFlushMode(FLUSHMDOE_PORT)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicLutForceFlush(1 << rtk_switch_port_L2P_get(pConfig->port))) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if(pConfig->flushByMac == ENABLED)
-+    {
-+        /* Should use API "rtk_l2_addr_del" to remove a specified entry*/
-+        return RT_ERR_CHIP_NOT_SUPPORTED;
-+    }
-+    else
-+        return RT_ERR_INPUT;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_table_clear
-+ * Description:
-+ *      Flush all static & dynamic entries in LUT.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_l2_table_clear(void)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((retVal = rtl8367c_setAsicLutFlushAll()) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_table_clearStatus_get
-+ * Description:
-+ *      Get table clear status
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pStatus - Clear status, 1:Busy, 0:finish
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_l2_table_clearStatus_get(rtk_l2_clearStatus_t *pStatus)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pStatus)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicLutFlushAllStatus((rtk_uint32 *)pStatus)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_flushLinkDownPortAddrEnable_set
-+ * Description:
-+ *      Set HW flush linkdown port mac configuration of the specified device.
-+ * Input:
-+ *      port - Port id.
-+ *      enable - link down flush status
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      The status of flush linkdown port address is as following:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+rtk_api_ret_t rtk_l2_flushLinkDownPortAddrEnable_set(rtk_port_t port, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (port != RTK_WHOLE_SYSTEM)
-+        return RT_ERR_PORT_ID;
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_setAsicLutLinkDownForceAging(enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_flushLinkDownPortAddrEnable_get
-+ * Description:
-+ *      Get HW flush linkdown port mac configuration of the specified device.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - link down flush status
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The status of flush linkdown port address is as following:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+rtk_api_ret_t rtk_l2_flushLinkDownPortAddrEnable_get(rtk_port_t port, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (port != RTK_WHOLE_SYSTEM)
-+        return RT_ERR_PORT_ID;
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicLutLinkDownForceAging(pEnable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_agingEnable_set
-+ * Description:
-+ *      Set L2 LUT aging status per port setting.
-+ * Input:
-+ *      port    - Port id.
-+ *      enable  - Aging status
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      This API can be used to set L2 LUT aging status per port.
-+ */
-+rtk_api_ret_t rtk_l2_agingEnable_set(rtk_port_t port, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if(enable == 1)
-+        enable = 0;
-+    else
-+        enable = 1;
-+
-+    if ((retVal = rtl8367c_setAsicLutDisableAging(rtk_switch_port_L2P_get(port), enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_agingEnable_get
-+ * Description:
-+ *      Get L2 LUT aging status per port setting.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - Aging status
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API can be used to get L2 LUT aging function per port.
-+ */
-+rtk_api_ret_t rtk_l2_agingEnable_get(rtk_port_t port, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicLutDisableAging(rtk_switch_port_L2P_get(port), pEnable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(*pEnable == 1)
-+        *pEnable = 0;
-+    else
-+        *pEnable = 1;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_limitLearningCnt_set
-+ * Description:
-+ *      Set per-Port auto learning limit number
-+ * Input:
-+ *      port    - Port id.
-+ *      mac_cnt - Auto learning entries limit number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_LIMITED_L2ENTRY_NUM  - Invalid auto learning limit number
-+ * Note:
-+ *      The API can set per-port ASIC auto learning limit number from 0(disable learning)
-+ *      to 2112.
-+ */
-+rtk_api_ret_t rtk_l2_limitLearningCnt_set(rtk_port_t port, rtk_mac_cnt_t mac_cnt)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (mac_cnt > rtk_switch_maxLutAddrNumber_get())
-+        return RT_ERR_LIMITED_L2ENTRY_NUM;
-+
-+    if ((retVal = rtl8367c_setAsicLutLearnLimitNo(rtk_switch_port_L2P_get(port), mac_cnt)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_limitLearningCnt_get
-+ * Description:
-+ *      Get per-Port auto learning limit number
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pMac_cnt - Auto learning entries limit number
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get per-port ASIC auto learning limit number.
-+ */
-+rtk_api_ret_t rtk_l2_limitLearningCnt_get(rtk_port_t port, rtk_mac_cnt_t *pMac_cnt)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pMac_cnt)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicLutLearnLimitNo(rtk_switch_port_L2P_get(port), pMac_cnt)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_limitSystemLearningCnt_set
-+ * Description:
-+ *      Set System auto learning limit number
-+ * Input:
-+ *      mac_cnt - Auto learning entries limit number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_LIMITED_L2ENTRY_NUM  - Invalid auto learning limit number
-+ * Note:
-+ *      The API can set system ASIC auto learning limit number from 0(disable learning)
-+ *      to 2112.
-+ */
-+rtk_api_ret_t rtk_l2_limitSystemLearningCnt_set(rtk_mac_cnt_t mac_cnt)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (mac_cnt > rtk_switch_maxLutAddrNumber_get())
-+        return RT_ERR_LIMITED_L2ENTRY_NUM;
-+
-+    if ((retVal = rtl8367c_setAsicSystemLutLearnLimitNo(mac_cnt)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_limitSystemLearningCnt_get
-+ * Description:
-+ *      Get System auto learning limit number
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pMac_cnt - Auto learning entries limit number
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get system ASIC auto learning limit number.
-+ */
-+rtk_api_ret_t rtk_l2_limitSystemLearningCnt_get(rtk_mac_cnt_t *pMac_cnt)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pMac_cnt)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicSystemLutLearnLimitNo(pMac_cnt)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_limitLearningCntAction_set
-+ * Description:
-+ *      Configure auto learn over limit number action.
-+ * Input:
-+ *      port - Port id.
-+ *      action - Auto learning entries limit number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_NOT_ALLOWED  - Invalid learn over action
-+ * Note:
-+ *      The API can set SA unknown packet action while auto learn limit number is over
-+ *      The action symbol as following:
-+ *      - LIMIT_LEARN_CNT_ACTION_DROP,
-+ *      - LIMIT_LEARN_CNT_ACTION_FORWARD,
-+ *      - LIMIT_LEARN_CNT_ACTION_TO_CPU,
-+ */
-+rtk_api_ret_t rtk_l2_limitLearningCntAction_set(rtk_port_t port, rtk_l2_limitLearnCntAction_t action)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 data;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (port != RTK_WHOLE_SYSTEM)
-+        return RT_ERR_PORT_ID;
-+
-+    if ( LIMIT_LEARN_CNT_ACTION_DROP == action )
-+        data = 1;
-+    else if ( LIMIT_LEARN_CNT_ACTION_FORWARD == action )
-+        data = 0;
-+    else if ( LIMIT_LEARN_CNT_ACTION_TO_CPU == action )
-+        data = 2;
-+    else
-+        return RT_ERR_NOT_ALLOWED;
-+
-+    if ((retVal = rtl8367c_setAsicLutLearnOverAct(data)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_limitLearningCntAction_get
-+ * Description:
-+ *      Get auto learn over limit number action.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pAction - Learn over action
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get SA unknown packet action while auto learn limit number is over
-+ *      The action symbol as following:
-+ *      - LIMIT_LEARN_CNT_ACTION_DROP,
-+ *      - LIMIT_LEARN_CNT_ACTION_FORWARD,
-+ *      - LIMIT_LEARN_CNT_ACTION_TO_CPU,
-+ */
-+rtk_api_ret_t rtk_l2_limitLearningCntAction_get(rtk_port_t port, rtk_l2_limitLearnCntAction_t *pAction)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 action;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (port != RTK_WHOLE_SYSTEM)
-+        return RT_ERR_PORT_ID;
-+
-+    if(NULL == pAction)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicLutLearnOverAct(&action)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ( 1 == action )
-+        *pAction = LIMIT_LEARN_CNT_ACTION_DROP;
-+    else if ( 0 == action )
-+        *pAction = LIMIT_LEARN_CNT_ACTION_FORWARD;
-+    else if ( 2 == action )
-+        *pAction = LIMIT_LEARN_CNT_ACTION_TO_CPU;
-+    else
-+    *pAction = action;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_limitSystemLearningCntAction_set
-+ * Description:
-+ *      Configure system auto learn over limit number action.
-+ * Input:
-+ *      port - Port id.
-+ *      action - Auto learning entries limit number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_NOT_ALLOWED  - Invalid learn over action
-+ * Note:
-+ *      The API can set SA unknown packet action while auto learn limit number is over
-+ *      The action symbol as following:
-+ *      - LIMIT_LEARN_CNT_ACTION_DROP,
-+ *      - LIMIT_LEARN_CNT_ACTION_FORWARD,
-+ *      - LIMIT_LEARN_CNT_ACTION_TO_CPU,
-+ */
-+rtk_api_ret_t rtk_l2_limitSystemLearningCntAction_set(rtk_l2_limitLearnCntAction_t action)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 data;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ( LIMIT_LEARN_CNT_ACTION_DROP == action )
-+        data = 1;
-+    else if ( LIMIT_LEARN_CNT_ACTION_FORWARD == action )
-+        data = 0;
-+    else if ( LIMIT_LEARN_CNT_ACTION_TO_CPU == action )
-+        data = 2;
-+    else
-+        return RT_ERR_NOT_ALLOWED;
-+
-+    if ((retVal = rtl8367c_setAsicSystemLutLearnOverAct(data)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_limitSystemLearningCntAction_get
-+ * Description:
-+ *      Get system auto learn over limit number action.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pAction - Learn over action
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get SA unknown packet action while auto learn limit number is over
-+ *      The action symbol as following:
-+ *      - LIMIT_LEARN_CNT_ACTION_DROP,
-+ *      - LIMIT_LEARN_CNT_ACTION_FORWARD,
-+ *      - LIMIT_LEARN_CNT_ACTION_TO_CPU,
-+ */
-+rtk_api_ret_t rtk_l2_limitSystemLearningCntAction_get(rtk_l2_limitLearnCntAction_t *pAction)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 action;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pAction)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicSystemLutLearnOverAct(&action)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ( 1 == action )
-+        *pAction = LIMIT_LEARN_CNT_ACTION_DROP;
-+    else if ( 0 == action )
-+        *pAction = LIMIT_LEARN_CNT_ACTION_FORWARD;
-+    else if ( 2 == action )
-+        *pAction = LIMIT_LEARN_CNT_ACTION_TO_CPU;
-+    else
-+    *pAction = action;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_limitSystemLearningCntPortMask_set
-+ * Description:
-+ *      Configure system auto learn portmask
-+ * Input:
-+ *      pPortmask - Port Mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid port mask.
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_l2_limitSystemLearningCntPortMask_set(rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pPortmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* Check port mask */
-+    RTK_CHK_PORTMASK_VALID(pPortmask);
-+
-+    if ((retVal = rtk_switch_portmask_L2P_get(pPortmask, &pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicSystemLutLearnPortMask(pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_limitSystemLearningCntPortMask_get
-+ * Description:
-+ *      get system auto learn portmask
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pPortmask - Port Mask
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NULL_POINTER - Null pointer.
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_l2_limitSystemLearningCntPortMask_get(rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pPortmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicSystemLutLearnPortMask(&pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtk_switch_portmask_P2L_get(pmask, pPortmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_learningCnt_get
-+ * Description:
-+ *      Get per-Port current auto learning number
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pMac_cnt - ASIC auto learning entries number
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get per-port ASIC auto learning number
-+ */
-+rtk_api_ret_t rtk_l2_learningCnt_get(rtk_port_t port, rtk_mac_cnt_t *pMac_cnt)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pMac_cnt)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicLutLearnNo(rtk_switch_port_L2P_get(port), pMac_cnt)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_floodPortMask_set
-+ * Description:
-+ *      Set flooding portmask
-+ * Input:
-+ *      type - flooding type.
-+ *      pFlood_portmask - flooding porkmask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid portmask.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can set the flooding mask.
-+ *      The flooding type is as following:
-+ *      - FLOOD_UNKNOWNDA
-+ *      - FLOOD_UNKNOWNMC
-+ *      - FLOOD_BC
-+ */
-+rtk_api_ret_t rtk_l2_floodPortMask_set(rtk_l2_flood_type_t floood_type, rtk_portmask_t *pFlood_portmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (floood_type >= FLOOD_END)
-+        return RT_ERR_INPUT;
-+
-+    /* check port valid */
-+    RTK_CHK_PORTMASK_VALID(pFlood_portmask);
-+
-+    /* Get Physical port mask */
-+    if ((retVal = rtk_switch_portmask_L2P_get(pFlood_portmask, &pmask))!=RT_ERR_OK)
-+        return retVal;
-+
-+    switch (floood_type)
-+    {
-+        case FLOOD_UNKNOWNDA:
-+            if ((retVal = rtl8367c_setAsicPortUnknownDaFloodingPortmask(pmask)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case FLOOD_UNKNOWNMC:
-+            if ((retVal = rtl8367c_setAsicPortUnknownMulticastFloodingPortmask(pmask)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case FLOOD_BC:
-+            if ((retVal = rtl8367c_setAsicPortBcastFloodingPortmask(pmask)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        default:
-+            break;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtk_l2_floodPortMask_get
-+ * Description:
-+ *      Get flooding portmask
-+ * Input:
-+ *      type - flooding type.
-+ * Output:
-+ *      pFlood_portmask - flooding porkmask
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API can get the flooding mask.
-+ *      The flooding type is as following:
-+ *      - FLOOD_UNKNOWNDA
-+ *      - FLOOD_UNKNOWNMC
-+ *      - FLOOD_BC
-+ */
-+rtk_api_ret_t rtk_l2_floodPortMask_get(rtk_l2_flood_type_t floood_type, rtk_portmask_t *pFlood_portmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (floood_type >= FLOOD_END)
-+        return RT_ERR_INPUT;
-+
-+    if(NULL == pFlood_portmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    switch (floood_type)
-+    {
-+        case FLOOD_UNKNOWNDA:
-+            if ((retVal = rtl8367c_getAsicPortUnknownDaFloodingPortmask(&pmask)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case FLOOD_UNKNOWNMC:
-+            if ((retVal = rtl8367c_getAsicPortUnknownMulticastFloodingPortmask(&pmask)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case FLOOD_BC:
-+            if ((retVal = rtl8367c_getAsicPortBcastFloodingPortmask(&pmask)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        default:
-+            break;
-+    }
-+
-+    /* Get Logical port mask */
-+    if ((retVal = rtk_switch_portmask_P2L_get(pmask, pFlood_portmask))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_localPktPermit_set
-+ * Description:
-+ *      Set permittion of frames if source port and destination port are the same.
-+ * Input:
-+ *      port - Port id.
-+ *      permit - permittion status
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_ENABLE       - Invalid permit value.
-+ * Note:
-+ *      This API is setted to permit frame if its source port is equal to destination port.
-+ */
-+rtk_api_ret_t rtk_l2_localPktPermit_set(rtk_port_t port, rtk_enable_t permit)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (permit >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_setAsicPortBlockSpa(rtk_switch_port_L2P_get(port), permit)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_localPktPermit_get
-+ * Description:
-+ *      Get permittion of frames if source port and destination port are the same.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pPermit - permittion status
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API is to get permittion status for frames if its source port is equal to destination port.
-+ */
-+rtk_api_ret_t rtk_l2_localPktPermit_get(rtk_port_t port, rtk_enable_t *pPermit)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pPermit)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortBlockSpa(rtk_switch_port_L2P_get(port), pPermit)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_aging_set
-+ * Description:
-+ *      Set LUT agging out speed
-+ * Input:
-+ *      aging_time - Agging out time.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ * Note:
-+ *      The API can set LUT agging out period for each entry and the range is from 45s to 458s.
-+ */
-+rtk_api_ret_t rtk_l2_aging_set(rtk_l2_age_time_t aging_time)
-+{
-+    rtk_uint32 i;
-+    CONST_T rtk_uint32 agePara[10][3] = {
-+        {45, 0, 1}, {88, 0, 2}, {133, 0, 3}, {177, 0, 4}, {221, 0, 5}, {266, 0, 6}, {310, 0, 7},
-+        {354, 2, 6}, {413, 2, 7}, {458, 3, 7}};
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (aging_time>agePara[9][0])
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    for (i = 0; i<10; i++)
-+    {
-+        if (aging_time<=agePara[i][0])
-+        {
-+            return rtl8367c_setAsicLutAgeTimerSpeed(agePara[i][2], agePara[i][1]);
-+        }
-+    }
-+
-+    return RT_ERR_FAILED;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_aging_get
-+ * Description:
-+ *      Get LUT agging out time
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnable - Aging status
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get LUT agging out period for each entry.
-+ */
-+rtk_api_ret_t rtk_l2_aging_get(rtk_l2_age_time_t *pAging_time)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 i,time, speed;
-+    CONST_T rtk_uint32 agePara[10][3] = {
-+        {45, 0, 1}, {88, 0, 2}, {133, 0, 3}, {177, 0, 4}, {221, 0, 5}, {266, 0, 6}, {310, 0, 7},
-+        {354, 2, 6}, {413, 2, 7}, {458, 3, 7}};
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pAging_time)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicLutAgeTimerSpeed(&time, &speed)) != RT_ERR_OK)
-+        return retVal;
-+
-+    for (i = 0; i<10; i++)
-+    {
-+        if (time==agePara[i][2]&&speed==agePara[i][1])
-+        {
-+            *pAging_time = agePara[i][0];
-+            return RT_ERR_OK;
-+        }
-+    }
-+
-+    return RT_ERR_FAILED;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastAddrLookup_set
-+ * Description:
-+ *      Set Lut IP multicast lookup function
-+ * Input:
-+ *      type - Lookup type for IPMC packet.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK          - OK
-+ *      RT_ERR_FAILED      - Failed
-+ *      RT_ERR_SMI         - SMI access error
-+ * Note:
-+ *      LOOKUP_MAC      - Lookup by MAC address
-+ *      LOOKUP_IP       - Lookup by IP address
-+ *      LOOKUP_IP_VID   - Lookup by IP address & VLAN ID
-+ */
-+rtk_api_ret_t rtk_l2_ipMcastAddrLookup_set(rtk_l2_ipmc_lookup_type_t type)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(type == LOOKUP_MAC)
-+    {
-+        if((retVal = rtl8367c_setAsicLutIpMulticastLookup(DISABLED)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if(type == LOOKUP_IP)
-+    {
-+        if((retVal = rtl8367c_setAsicLutIpMulticastLookup(ENABLED)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicLutIpMulticastVidLookup(DISABLED))!=RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicLutIpLookupMethod(1))!=RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if(type == LOOKUP_IP_VID)
-+    {
-+        if((retVal = rtl8367c_setAsicLutIpMulticastLookup(ENABLED)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicLutIpMulticastVidLookup(ENABLED))!=RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicLutIpLookupMethod(1))!=RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+        return RT_ERR_INPUT;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastAddrLookup_get
-+ * Description:
-+ *      Get Lut IP multicast lookup function
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pType - Lookup type for IPMC packet.
-+ * Return:
-+ *      RT_ERR_OK          - OK
-+ *      RT_ERR_FAILED      - Failed
-+ *      RT_ERR_SMI         - SMI access error
-+ * Note:
-+ *      None.
-+ */
-+rtk_api_ret_t rtk_l2_ipMcastAddrLookup_get(rtk_l2_ipmc_lookup_type_t *pType)
-+{
-+    rtk_api_ret_t       retVal;
-+    rtk_uint32          enabled, vid_lookup;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pType)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if((retVal = rtl8367c_getAsicLutIpMulticastLookup(&enabled)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicLutIpMulticastVidLookup(&vid_lookup))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if(enabled == ENABLED)
-+    {
-+        if(vid_lookup == ENABLED)
-+            *pType = LOOKUP_IP_VID;
-+        else
-+            *pType = LOOKUP_IP;
-+    }
-+    else
-+        *pType = LOOKUP_MAC;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastForwardRouterPort_set
-+ * Description:
-+ *      Set IPMC packet forward to rounter port also or not
-+ * Input:
-+ *      enabled - 1: Inlcude router port, 0, exclude router port
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK          - OK
-+ *      RT_ERR_FAILED      - Failed
-+ *      RT_ERR_SMI         - SMI access error
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_l2_ipMcastForwardRouterPort_set(rtk_enable_t enabled)
-+{
-+    rtk_api_ret_t       retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (enabled >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if((retVal = rtl8367c_setAsicLutIpmcFwdRouterPort(enabled)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastForwardRouterPort_get
-+ * Description:
-+ *      Get IPMC packet forward to rounter port also or not
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pEnabled    - 1: Inlcude router port, 0, exclude router port
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_NULL_POINTER - Null pointer
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_l2_ipMcastForwardRouterPort_get(rtk_enable_t *pEnabled)
-+{
-+    rtk_api_ret_t       retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (NULL == pEnabled)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if((retVal = rtl8367c_getAsicLutIpmcFwdRouterPort(pEnabled)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastGroupEntry_add
-+ * Description:
-+ *      Add an IP Multicast entry to group table
-+ * Input:
-+ *      ip_addr     - IP address
-+ *      vid         - VLAN ID
-+ *      pPortmask   - portmask
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK          - OK
-+ *      RT_ERR_FAILED      - Failed
-+ *      RT_ERR_SMI         - SMI access error
-+ *      RT_ERR_TBL_FULL    - Table Full
-+ * Note:
-+ *      Add an entry to IP Multicast Group table.
-+ */
-+rtk_api_ret_t rtk_l2_ipMcastGroupEntry_add(ipaddr_t ip_addr, rtk_uint32 vid, rtk_portmask_t *pPortmask)
-+{
-+    rtk_uint32      empty_idx = 0xFFFF;
-+    rtk_int32       index;
-+    ipaddr_t        group_addr;
-+    rtk_uint32      group_vid;
-+    rtk_uint32      pmask;
-+    rtk_uint32      valid;
-+    rtk_uint32      physicalPortmask;
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (vid > RTL8367C_VIDMAX)
-+        return RT_ERR_L2_VID;
-+
-+    if(NULL == pPortmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if((ip_addr & 0xF0000000) != 0xE0000000)
-+        return RT_ERR_INPUT;
-+
-+    /* Get Physical port mask */
-+    if ((retVal = rtk_switch_portmask_L2P_get(pPortmask, &physicalPortmask))!=RT_ERR_OK)
-+        return retVal;
-+
-+    for(index = 0; index <= RTL8367C_LUT_IPMCGRP_TABLE_MAX; index++)
-+    {
-+        if ((retVal = rtl8367c_getAsicLutIPMCGroup((rtk_uint32)index, &group_addr, &group_vid, &pmask, &valid))!=RT_ERR_OK)
-+            return retVal;
-+
-+        if( (valid == ENABLED) && (group_addr == ip_addr) && (group_vid == vid) )
-+        {
-+            if(pmask != physicalPortmask)
-+            {
-+                pmask = physicalPortmask;
-+                if ((retVal = rtl8367c_setAsicLutIPMCGroup(index, ip_addr, vid, pmask, valid))!=RT_ERR_OK)
-+                    return retVal;
-+            }
-+
-+            return RT_ERR_OK;
-+        }
-+
-+        if( (valid == DISABLED) && (empty_idx == 0xFFFF) ) /* Unused */
-+            empty_idx = (rtk_uint32)index;
-+    }
-+
-+    if(empty_idx == 0xFFFF)
-+        return RT_ERR_TBL_FULL;
-+
-+    pmask = physicalPortmask;
-+    if ((retVal = rtl8367c_setAsicLutIPMCGroup(empty_idx, ip_addr, vid, pmask, ENABLED))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastGroupEntry_del
-+ * Description:
-+ *      Delete an entry from IP Multicast group table
-+ * Input:
-+ *      ip_addr     - IP address
-+ *      vid         - VLAN ID
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK          - OK
-+ *      RT_ERR_FAILED      - Failed
-+ *      RT_ERR_SMI         - SMI access error
-+ *      RT_ERR_TBL_FULL    - Table Full
-+ * Note:
-+ *      Delete an entry from IP Multicast group table.
-+ */
-+rtk_api_ret_t rtk_l2_ipMcastGroupEntry_del(ipaddr_t ip_addr, rtk_uint32 vid)
-+{
-+    rtk_int32       index;
-+    ipaddr_t        group_addr;
-+    rtk_uint32      group_vid;
-+    rtk_uint32      pmask;
-+    rtk_uint32      valid;
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (vid > RTL8367C_VIDMAX)
-+        return RT_ERR_L2_VID;
-+
-+    if((ip_addr & 0xF0000000) != 0xE0000000)
-+        return RT_ERR_INPUT;
-+
-+    for(index = 0; index <= RTL8367C_LUT_IPMCGRP_TABLE_MAX; index++)
-+    {
-+        if ((retVal = rtl8367c_getAsicLutIPMCGroup((rtk_uint32)index, &group_addr, &group_vid, &pmask, &valid))!=RT_ERR_OK)
-+            return retVal;
-+
-+        if( (valid == ENABLED) && (group_addr == ip_addr) && (group_vid == vid) )
-+        {
-+            group_addr = 0xE0000000;
-+            group_vid = 0;
-+            pmask = 0;
-+            if ((retVal = rtl8367c_setAsicLutIPMCGroup(index, group_addr, group_vid, pmask, DISABLED))!=RT_ERR_OK)
-+                return retVal;
-+
-+            return RT_ERR_OK;
-+        }
-+    }
-+
-+    return RT_ERR_FAILED;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_ipMcastGroupEntry_get
-+ * Description:
-+ *      get an entry from IP Multicast group table
-+ * Input:
-+ *      ip_addr     - IP address
-+ *      vid         - VLAN ID
-+ * Output:
-+ *      pPortmask   - member port mask
-+ * Return:
-+ *      RT_ERR_OK          - OK
-+ *      RT_ERR_FAILED      - Failed
-+ *      RT_ERR_SMI         - SMI access error
-+ *      RT_ERR_TBL_FULL    - Table Full
-+ * Note:
-+ *      Delete an entry from IP Multicast group table.
-+ */
-+rtk_api_ret_t rtk_l2_ipMcastGroupEntry_get(ipaddr_t ip_addr, rtk_uint32 vid, rtk_portmask_t *pPortmask)
-+{
-+    rtk_int32       index;
-+    ipaddr_t        group_addr;
-+    rtk_uint32      group_vid;
-+    rtk_uint32      valid;
-+    rtk_uint32      pmask;
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if((ip_addr & 0xF0000000) != 0xE0000000)
-+        return RT_ERR_INPUT;
-+
-+    if (vid > RTL8367C_VIDMAX)
-+        return RT_ERR_L2_VID;
-+
-+    if(NULL == pPortmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    for(index = 0; index <= RTL8367C_LUT_IPMCGRP_TABLE_MAX; index++)
-+    {
-+        if ((retVal = rtl8367c_getAsicLutIPMCGroup((rtk_uint32)index, &group_addr, &group_vid, &pmask, &valid))!=RT_ERR_OK)
-+            return retVal;
-+
-+        if( (valid == ENABLED) && (group_addr == ip_addr) && (group_vid == vid) )
-+        {
-+            if ((retVal = rtk_switch_portmask_P2L_get(pmask, pPortmask))!=RT_ERR_OK)
-+                return retVal;
-+
-+            return RT_ERR_OK;
-+        }
-+    }
-+
-+    return RT_ERR_FAILED;
-+}
-+
-+/* Function Name:
-+ *      rtk_l2_entry_get
-+ * Description:
-+ *      Get LUT unicast entry.
-+ * Input:
-+ *      pL2_entry - Index field in the structure.
-+ * Output:
-+ *      pL2_entry - other fields such as MAC, port, age...
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_L2_EMPTY_ENTRY   - Empty LUT entry.
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ * Note:
-+ *      This API is used to get address by index from 0~2111.
-+ */
-+rtk_api_ret_t rtk_l2_entry_get(rtk_l2_addr_table_t *pL2_entry)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 method;
-+    rtl8367c_luttb l2Table;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (pL2_entry->index >= rtk_switch_maxLutAddrNumber_get())
-+        return RT_ERR_INPUT;
-+
-+    memset(&l2Table, 0x00, sizeof(rtl8367c_luttb));
-+    l2Table.address= pL2_entry->index;
-+    method = LUTREADMETHOD_ADDRESS;
-+    if ((retVal = rtl8367c_getAsicL2LookupTb(method, &l2Table)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((pL2_entry->index>0x800)&&(l2Table.lookup_hit==0))
-+         return RT_ERR_L2_EMPTY_ENTRY;
-+
-+    if(l2Table.l3lookup)
-+    {
-+        if(l2Table.l3vidlookup)
-+        {
-+            memset(&pL2_entry->mac, 0, sizeof(rtk_mac_t));
-+            pL2_entry->is_ipmul  = l2Table.l3lookup;
-+            pL2_entry->sip       = l2Table.sip;
-+            pL2_entry->dip       = l2Table.dip;
-+            pL2_entry->is_static = l2Table.nosalearn;
-+
-+            /* Get Logical port mask */
-+            if ((retVal = rtk_switch_portmask_P2L_get(l2Table.mbr, &(pL2_entry->portmask)))!=RT_ERR_OK)
-+                return retVal;
-+
-+            pL2_entry->fid       = 0;
-+            pL2_entry->age       = 0;
-+            pL2_entry->auth      = 0;
-+            pL2_entry->sa_block  = 0;
-+            pL2_entry->is_ipvidmul = 1;
-+            pL2_entry->l3_vid      = l2Table.l3_vid;
-+        }
-+        else
-+        {
-+            memset(&pL2_entry->mac, 0, sizeof(rtk_mac_t));
-+            pL2_entry->is_ipmul  = l2Table.l3lookup;
-+            pL2_entry->sip       = l2Table.sip;
-+            pL2_entry->dip       = l2Table.dip;
-+            pL2_entry->is_static = l2Table.nosalearn;
-+
-+            /* Get Logical port mask */
-+            if ((retVal = rtk_switch_portmask_P2L_get(l2Table.mbr, &(pL2_entry->portmask)))!=RT_ERR_OK)
-+                return retVal;
-+
-+            pL2_entry->fid       = 0;
-+            pL2_entry->age       = 0;
-+            pL2_entry->auth      = 0;
-+            pL2_entry->sa_block  = 0;
-+            pL2_entry->is_ipvidmul = 0;
-+            pL2_entry->l3_vid      = 0;
-+        }
-+    }
-+    else if(l2Table.mac.octet[0]&0x01)
-+    {
-+        memset(&pL2_entry->sip, 0, sizeof(ipaddr_t));
-+        memset(&pL2_entry->dip, 0, sizeof(ipaddr_t));
-+        pL2_entry->mac.octet[0] = l2Table.mac.octet[0];
-+        pL2_entry->mac.octet[1] = l2Table.mac.octet[1];
-+        pL2_entry->mac.octet[2] = l2Table.mac.octet[2];
-+        pL2_entry->mac.octet[3] = l2Table.mac.octet[3];
-+        pL2_entry->mac.octet[4] = l2Table.mac.octet[4];
-+        pL2_entry->mac.octet[5] = l2Table.mac.octet[5];
-+        pL2_entry->is_ipmul  = l2Table.l3lookup;
-+        pL2_entry->is_static = l2Table.nosalearn;
-+
-+        /* Get Logical port mask */
-+        if ((retVal = rtk_switch_portmask_P2L_get(l2Table.mbr, &(pL2_entry->portmask)))!=RT_ERR_OK)
-+            return retVal;
-+
-+        pL2_entry->ivl       = l2Table.ivl_svl;
-+        if(l2Table.ivl_svl == 1) /* IVL */
-+        {
-+            pL2_entry->cvid      = l2Table.cvid_fid;
-+            pL2_entry->fid       = 0;
-+        }
-+        else /* SVL*/
-+        {
-+            pL2_entry->cvid      = 0;
-+            pL2_entry->fid       = l2Table.cvid_fid;
-+        }
-+        pL2_entry->auth      = l2Table.auth;
-+        pL2_entry->sa_block  = l2Table.sa_block;
-+        pL2_entry->age       = 0;
-+        pL2_entry->is_ipvidmul = 0;
-+        pL2_entry->l3_vid      = 0;
-+    }
-+    else if((l2Table.age != 0)||(l2Table.nosalearn == 1))
-+    {
-+        memset(&pL2_entry->sip, 0, sizeof(ipaddr_t));
-+        memset(&pL2_entry->dip, 0, sizeof(ipaddr_t));
-+        pL2_entry->mac.octet[0] = l2Table.mac.octet[0];
-+        pL2_entry->mac.octet[1] = l2Table.mac.octet[1];
-+        pL2_entry->mac.octet[2] = l2Table.mac.octet[2];
-+        pL2_entry->mac.octet[3] = l2Table.mac.octet[3];
-+        pL2_entry->mac.octet[4] = l2Table.mac.octet[4];
-+        pL2_entry->mac.octet[5] = l2Table.mac.octet[5];
-+        pL2_entry->is_ipmul  = l2Table.l3lookup;
-+        pL2_entry->is_static = l2Table.nosalearn;
-+
-+        /* Get Logical port mask */
-+        if ((retVal = rtk_switch_portmask_P2L_get(1<<(l2Table.spa), &(pL2_entry->portmask)))!=RT_ERR_OK)
-+            return retVal;
-+
-+        pL2_entry->ivl       = l2Table.ivl_svl;
-+        pL2_entry->cvid      = l2Table.cvid_fid;
-+        pL2_entry->fid       = l2Table.fid;
-+        pL2_entry->auth      = l2Table.auth;
-+        pL2_entry->sa_block  = l2Table.sa_block;
-+        pL2_entry->age       = l2Table.age;
-+        pL2_entry->is_ipvidmul = 0;
-+        pL2_entry->l3_vid      = 0;
-+    }
-+    else
-+       return RT_ERR_L2_EMPTY_ENTRY;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/leaky.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/leaky.c
-new file mode 100644
-index 0000000000..1b7d50a9e5
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/leaky.c
-@@ -0,0 +1,590 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in Leaky module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <leaky.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_portIsolation.h>
-+#include <rtl8367c_asicdrv_rma.h>
-+#include <rtl8367c_asicdrv_igmp.h>
-+
-+
-+/* Function Name:
-+ *      rtk_leaky_vlan_set
-+ * Description:
-+ *      Set VLAN leaky.
-+ * Input:
-+ *      type - Packet type for VLAN leaky.
-+ *      enable - Leaky status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_ENABLE       - Invalid enable input
-+ * Note:
-+ *      This API can set VLAN leaky for RMA ,IGMP/MLD, CDP, CSSTP, and LLDP packets.
-+ *      The leaky frame types are as following:
-+ *      - LEAKY_BRG_GROUP,
-+ *      - LEAKY_FD_PAUSE,
-+ *      - LEAKY_SP_MCAST,
-+ *      - LEAKY_1X_PAE,
-+ *      - LEAKY_UNDEF_BRG_04,
-+ *      - LEAKY_UNDEF_BRG_05,
-+ *      - LEAKY_UNDEF_BRG_06,
-+ *      - LEAKY_UNDEF_BRG_07,
-+ *      - LEAKY_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - LEAKY_UNDEF_BRG_09,
-+ *      - LEAKY_UNDEF_BRG_0A,
-+ *      - LEAKY_UNDEF_BRG_0B,
-+ *      - LEAKY_UNDEF_BRG_0C,
-+ *      - LEAKY_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - LEAKY_8021AB,
-+ *      - LEAKY_UNDEF_BRG_0F,
-+ *      - LEAKY_BRG_MNGEMENT,
-+ *      - LEAKY_UNDEFINED_11,
-+ *      - LEAKY_UNDEFINED_12,
-+ *      - LEAKY_UNDEFINED_13,
-+ *      - LEAKY_UNDEFINED_14,
-+ *      - LEAKY_UNDEFINED_15,
-+ *      - LEAKY_UNDEFINED_16,
-+ *      - LEAKY_UNDEFINED_17,
-+ *      - LEAKY_UNDEFINED_18,
-+ *      - LEAKY_UNDEFINED_19,
-+ *      - LEAKY_UNDEFINED_1A,
-+ *      - LEAKY_UNDEFINED_1B,
-+ *      - LEAKY_UNDEFINED_1C,
-+ *      - LEAKY_UNDEFINED_1D,
-+ *      - LEAKY_UNDEFINED_1E,
-+ *      - LEAKY_UNDEFINED_1F,
-+ *      - LEAKY_GMRP,
-+ *      - LEAKY_GVRP,
-+ *      - LEAKY_UNDEF_GARP_22,
-+ *      - LEAKY_UNDEF_GARP_23,
-+ *      - LEAKY_UNDEF_GARP_24,
-+ *      - LEAKY_UNDEF_GARP_25,
-+ *      - LEAKY_UNDEF_GARP_26,
-+ *      - LEAKY_UNDEF_GARP_27,
-+ *      - LEAKY_UNDEF_GARP_28,
-+ *      - LEAKY_UNDEF_GARP_29,
-+ *      - LEAKY_UNDEF_GARP_2A,
-+ *      - LEAKY_UNDEF_GARP_2B,
-+ *      - LEAKY_UNDEF_GARP_2C,
-+ *      - LEAKY_UNDEF_GARP_2D,
-+ *      - LEAKY_UNDEF_GARP_2E,
-+ *      - LEAKY_UNDEF_GARP_2F,
-+ *      - LEAKY_IGMP,
-+ *      - LEAKY_IPMULTICAST.
-+ *      - LEAKY_CDP,
-+ *      - LEAKY_CSSTP,
-+ *      - LEAKY_LLDP.
-+ */
-+rtk_api_ret_t rtk_leaky_vlan_set(rtk_leaky_type_t type, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 port;
-+    rtl8367c_rma_t rmacfg;
-+    rtk_uint32 tmp;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type >= LEAKY_END)
-+        return RT_ERR_INPUT;
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if (type >= 0 && type <= LEAKY_UNDEF_GARP_2F)
-+    {
-+        if ((retVal = rtl8367c_getAsicRma(type, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.vlan_leaky = enable;
-+
-+        if ((retVal = rtl8367c_setAsicRma(type, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (LEAKY_IPMULTICAST == type)
-+    {
-+        for (port = 0; port <= RTK_PORT_ID_MAX; port++)
-+        {
-+            if ((retVal = rtl8367c_setAsicIpMulticastVlanLeaky(port,enable)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+    }
-+    else if (LEAKY_IGMP == type)
-+    {
-+        if ((retVal = rtl8367c_setAsicIGMPVLANLeaky(enable)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (LEAKY_CDP == type)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCdp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.vlan_leaky = enable;
-+
-+        if ((retVal = rtl8367c_setAsicRmaCdp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (LEAKY_CSSTP == type)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCsstp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.vlan_leaky = enable;
-+
-+        if ((retVal = rtl8367c_setAsicRmaCsstp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (LEAKY_LLDP == type)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaLldp(&tmp,&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.vlan_leaky = enable;
-+
-+        if ((retVal = rtl8367c_setAsicRmaLldp(tmp, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_leaky_vlan_get
-+ * Description:
-+ *      Get VLAN leaky.
-+ * Input:
-+ *      type - Packet type for VLAN leaky.
-+ * Output:
-+ *      pEnable - Leaky status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can get VLAN leaky status for RMA ,IGMP/MLD, CDP, CSSTP, and LLDP  packets.
-+ *      The leaky frame types are as following:
-+ *      - LEAKY_BRG_GROUP,
-+ *      - LEAKY_FD_PAUSE,
-+ *      - LEAKY_SP_MCAST,
-+ *      - LEAKY_1X_PAE,
-+ *      - LEAKY_UNDEF_BRG_04,
-+ *      - LEAKY_UNDEF_BRG_05,
-+ *      - LEAKY_UNDEF_BRG_06,
-+ *      - LEAKY_UNDEF_BRG_07,
-+ *      - LEAKY_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - LEAKY_UNDEF_BRG_09,
-+ *      - LEAKY_UNDEF_BRG_0A,
-+ *      - LEAKY_UNDEF_BRG_0B,
-+ *      - LEAKY_UNDEF_BRG_0C,
-+ *      - LEAKY_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - LEAKY_8021AB,
-+ *      - LEAKY_UNDEF_BRG_0F,
-+ *      - LEAKY_BRG_MNGEMENT,
-+ *      - LEAKY_UNDEFINED_11,
-+ *      - LEAKY_UNDEFINED_12,
-+ *      - LEAKY_UNDEFINED_13,
-+ *      - LEAKY_UNDEFINED_14,
-+ *      - LEAKY_UNDEFINED_15,
-+ *      - LEAKY_UNDEFINED_16,
-+ *      - LEAKY_UNDEFINED_17,
-+ *      - LEAKY_UNDEFINED_18,
-+ *      - LEAKY_UNDEFINED_19,
-+ *      - LEAKY_UNDEFINED_1A,
-+ *      - LEAKY_UNDEFINED_1B,
-+ *      - LEAKY_UNDEFINED_1C,
-+ *      - LEAKY_UNDEFINED_1D,
-+ *      - LEAKY_UNDEFINED_1E,
-+ *      - LEAKY_UNDEFINED_1F,
-+ *      - LEAKY_GMRP,
-+ *      - LEAKY_GVRP,
-+ *      - LEAKY_UNDEF_GARP_22,
-+ *      - LEAKY_UNDEF_GARP_23,
-+ *      - LEAKY_UNDEF_GARP_24,
-+ *      - LEAKY_UNDEF_GARP_25,
-+ *      - LEAKY_UNDEF_GARP_26,
-+ *      - LEAKY_UNDEF_GARP_27,
-+ *      - LEAKY_UNDEF_GARP_28,
-+ *      - LEAKY_UNDEF_GARP_29,
-+ *      - LEAKY_UNDEF_GARP_2A,
-+ *      - LEAKY_UNDEF_GARP_2B,
-+ *      - LEAKY_UNDEF_GARP_2C,
-+ *      - LEAKY_UNDEF_GARP_2D,
-+ *      - LEAKY_UNDEF_GARP_2E,
-+ *      - LEAKY_UNDEF_GARP_2F,
-+ *      - LEAKY_IGMP,
-+ *      - LEAKY_IPMULTICAST.
-+ *      - LEAKY_CDP,
-+ *      - LEAKY_CSSTP,
-+ *      - LEAKY_LLDP.
-+ */
-+rtk_api_ret_t rtk_leaky_vlan_get(rtk_leaky_type_t type, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 port,tmp;
-+    rtl8367c_rma_t rmacfg;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type >= LEAKY_END)
-+        return RT_ERR_INPUT;
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (type >= 0 && type <= LEAKY_UNDEF_GARP_2F)
-+    {
-+        if ((retVal = rtl8367c_getAsicRma(type, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = rmacfg.vlan_leaky;
-+
-+    }
-+    else if (LEAKY_IPMULTICAST == type)
-+    {
-+        for (port = 0; port <= RTK_PORT_ID_MAX; port++)
-+        {
-+            if ((retVal = rtl8367c_getAsicIpMulticastVlanLeaky(port, &tmp)) != RT_ERR_OK)
-+                return retVal;
-+            if (port>0&&(tmp!=*pEnable))
-+                return RT_ERR_FAILED;
-+            *pEnable = tmp;
-+        }
-+    }
-+    else if (LEAKY_IGMP == type)
-+    {
-+        if ((retVal = rtl8367c_getAsicIGMPVLANLeaky(&tmp)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = tmp;
-+    }
-+    else if (LEAKY_CDP == type)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCdp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = rmacfg.vlan_leaky;
-+    }
-+    else if (LEAKY_CSSTP == type)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCsstp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = rmacfg.vlan_leaky;
-+    }
-+    else if (LEAKY_LLDP == type)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaLldp(&tmp, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = rmacfg.vlan_leaky;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_leaky_portIsolation_set
-+ * Description:
-+ *      Set port isolation leaky.
-+ * Input:
-+ *      type - Packet type for port isolation leaky.
-+ *      enable - Leaky status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_ENABLE       - Invalid enable input
-+ * Note:
-+ *      This API can set port isolation leaky for RMA ,IGMP/MLD, CDP, CSSTP, and LLDP  packets.
-+ *      The leaky frame types are as following:
-+ *      - LEAKY_BRG_GROUP,
-+ *      - LEAKY_FD_PAUSE,
-+ *      - LEAKY_SP_MCAST,
-+ *      - LEAKY_1X_PAE,
-+ *      - LEAKY_UNDEF_BRG_04,
-+ *      - LEAKY_UNDEF_BRG_05,
-+ *      - LEAKY_UNDEF_BRG_06,
-+ *      - LEAKY_UNDEF_BRG_07,
-+ *      - LEAKY_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - LEAKY_UNDEF_BRG_09,
-+ *      - LEAKY_UNDEF_BRG_0A,
-+ *      - LEAKY_UNDEF_BRG_0B,
-+ *      - LEAKY_UNDEF_BRG_0C,
-+ *      - LEAKY_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - LEAKY_8021AB,
-+ *      - LEAKY_UNDEF_BRG_0F,
-+ *      - LEAKY_BRG_MNGEMENT,
-+ *      - LEAKY_UNDEFINED_11,
-+ *      - LEAKY_UNDEFINED_12,
-+ *      - LEAKY_UNDEFINED_13,
-+ *      - LEAKY_UNDEFINED_14,
-+ *      - LEAKY_UNDEFINED_15,
-+ *      - LEAKY_UNDEFINED_16,
-+ *      - LEAKY_UNDEFINED_17,
-+ *      - LEAKY_UNDEFINED_18,
-+ *      - LEAKY_UNDEFINED_19,
-+ *      - LEAKY_UNDEFINED_1A,
-+ *      - LEAKY_UNDEFINED_1B,
-+ *      - LEAKY_UNDEFINED_1C,
-+ *      - LEAKY_UNDEFINED_1D,
-+ *      - LEAKY_UNDEFINED_1E,
-+ *      - LEAKY_UNDEFINED_1F,
-+ *      - LEAKY_GMRP,
-+ *      - LEAKY_GVRP,
-+ *      - LEAKY_UNDEF_GARP_22,
-+ *      - LEAKY_UNDEF_GARP_23,
-+ *      - LEAKY_UNDEF_GARP_24,
-+ *      - LEAKY_UNDEF_GARP_25,
-+ *      - LEAKY_UNDEF_GARP_26,
-+ *      - LEAKY_UNDEF_GARP_27,
-+ *      - LEAKY_UNDEF_GARP_28,
-+ *      - LEAKY_UNDEF_GARP_29,
-+ *      - LEAKY_UNDEF_GARP_2A,
-+ *      - LEAKY_UNDEF_GARP_2B,
-+ *      - LEAKY_UNDEF_GARP_2C,
-+ *      - LEAKY_UNDEF_GARP_2D,
-+ *      - LEAKY_UNDEF_GARP_2E,
-+ *      - LEAKY_UNDEF_GARP_2F,
-+ *      - LEAKY_IGMP,
-+ *      - LEAKY_IPMULTICAST.
-+ *      - LEAKY_CDP,
-+ *      - LEAKY_CSSTP,
-+ *      - LEAKY_LLDP.
-+ */
-+rtk_api_ret_t rtk_leaky_portIsolation_set(rtk_leaky_type_t type, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 port;
-+    rtl8367c_rma_t rmacfg;
-+    rtk_uint32 tmp;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type >= LEAKY_END)
-+        return RT_ERR_INPUT;
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if (type >= 0 && type <= LEAKY_UNDEF_GARP_2F)
-+    {
-+        if ((retVal = rtl8367c_getAsicRma(type, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.portiso_leaky = enable;
-+
-+        if ((retVal = rtl8367c_setAsicRma(type, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (LEAKY_IPMULTICAST == type)
-+    {
-+        for (port = 0; port < RTK_MAX_NUM_OF_PORT; port++)
-+        {
-+            if ((retVal = rtl8367c_setAsicIpMulticastPortIsoLeaky(port,enable)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+    }
-+    else if (LEAKY_IGMP == type)
-+    {
-+        if ((retVal = rtl8367c_setAsicIGMPIsoLeaky(enable)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (LEAKY_CDP == type)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCdp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.portiso_leaky = enable;
-+
-+        if ((retVal = rtl8367c_setAsicRmaCdp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (LEAKY_CSSTP == type)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCsstp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.portiso_leaky = enable;
-+
-+        if ((retVal = rtl8367c_setAsicRmaCsstp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (LEAKY_LLDP == type)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaLldp(&tmp, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.portiso_leaky = enable;
-+
-+        if ((retVal = rtl8367c_setAsicRmaLldp(tmp, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_leaky_portIsolation_get
-+ * Description:
-+ *      Get port isolation leaky.
-+ * Input:
-+ *      type - Packet type for port isolation leaky.
-+ * Output:
-+ *      pEnable - Leaky status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can get port isolation leaky status for RMA ,IGMP/MLD, CDP, CSSTP, and LLDP  packets.
-+ *      The leaky frame types are as following:
-+ *      - LEAKY_BRG_GROUP,
-+ *      - LEAKY_FD_PAUSE,
-+ *      - LEAKY_SP_MCAST,
-+ *      - LEAKY_1X_PAE,
-+ *      - LEAKY_UNDEF_BRG_04,
-+ *      - LEAKY_UNDEF_BRG_05,
-+ *      - LEAKY_UNDEF_BRG_06,
-+ *      - LEAKY_UNDEF_BRG_07,
-+ *      - LEAKY_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - LEAKY_UNDEF_BRG_09,
-+ *      - LEAKY_UNDEF_BRG_0A,
-+ *      - LEAKY_UNDEF_BRG_0B,
-+ *      - LEAKY_UNDEF_BRG_0C,
-+ *      - LEAKY_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - LEAKY_8021AB,
-+ *      - LEAKY_UNDEF_BRG_0F,
-+ *      - LEAKY_BRG_MNGEMENT,
-+ *      - LEAKY_UNDEFINED_11,
-+ *      - LEAKY_UNDEFINED_12,
-+ *      - LEAKY_UNDEFINED_13,
-+ *      - LEAKY_UNDEFINED_14,
-+ *      - LEAKY_UNDEFINED_15,
-+ *      - LEAKY_UNDEFINED_16,
-+ *      - LEAKY_UNDEFINED_17,
-+ *      - LEAKY_UNDEFINED_18,
-+ *      - LEAKY_UNDEFINED_19,
-+ *      - LEAKY_UNDEFINED_1A,
-+ *      - LEAKY_UNDEFINED_1B,
-+ *      - LEAKY_UNDEFINED_1C,
-+ *      - LEAKY_UNDEFINED_1D,
-+ *      - LEAKY_UNDEFINED_1E,
-+ *      - LEAKY_UNDEFINED_1F,
-+ *      - LEAKY_GMRP,
-+ *      - LEAKY_GVRP,
-+ *      - LEAKY_UNDEF_GARP_22,
-+ *      - LEAKY_UNDEF_GARP_23,
-+ *      - LEAKY_UNDEF_GARP_24,
-+ *      - LEAKY_UNDEF_GARP_25,
-+ *      - LEAKY_UNDEF_GARP_26,
-+ *      - LEAKY_UNDEF_GARP_27,
-+ *      - LEAKY_UNDEF_GARP_28,
-+ *      - LEAKY_UNDEF_GARP_29,
-+ *      - LEAKY_UNDEF_GARP_2A,
-+ *      - LEAKY_UNDEF_GARP_2B,
-+ *      - LEAKY_UNDEF_GARP_2C,
-+ *      - LEAKY_UNDEF_GARP_2D,
-+ *      - LEAKY_UNDEF_GARP_2E,
-+ *      - LEAKY_UNDEF_GARP_2F,
-+ *      - LEAKY_IGMP,
-+ *      - LEAKY_IPMULTICAST.
-+ *      - LEAKY_CDP,
-+ *      - LEAKY_CSSTP,
-+ *      - LEAKY_LLDP.
-+ */
-+rtk_api_ret_t rtk_leaky_portIsolation_get(rtk_leaky_type_t type, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 port, tmp;
-+    rtl8367c_rma_t rmacfg;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type >= LEAKY_END)
-+        return RT_ERR_INPUT;
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (type >= 0 && type <= LEAKY_UNDEF_GARP_2F)
-+    {
-+        if ((retVal = rtl8367c_getAsicRma(type, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = rmacfg.portiso_leaky;
-+
-+    }
-+    else if (LEAKY_IPMULTICAST == type)
-+    {
-+        for (port = 0; port < RTK_MAX_NUM_OF_PORT; port++)
-+        {
-+            if ((retVal = rtl8367c_getAsicIpMulticastPortIsoLeaky(port, &tmp)) != RT_ERR_OK)
-+                return retVal;
-+            if (port > 0 &&(tmp != *pEnable))
-+                return RT_ERR_FAILED;
-+            *pEnable = tmp;
-+        }
-+    }
-+    else if (LEAKY_IGMP == type)
-+    {
-+        if ((retVal = rtl8367c_getAsicIGMPIsoLeaky(&tmp)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = tmp;
-+    }
-+    else if (LEAKY_CDP == type)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCdp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = rmacfg.portiso_leaky;
-+    }
-+    else if (LEAKY_CSSTP == type)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCsstp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = rmacfg.portiso_leaky;
-+    }
-+    else if (LEAKY_LLDP == type)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaLldp(&tmp, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = rmacfg.portiso_leaky;
-+    }
-+
-+
-+    return RT_ERR_OK;
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/led.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/led.c
-new file mode 100644
-index 0000000000..c00c331d8a
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/led.c
-@@ -0,0 +1,792 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in LED module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <led.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_led.h>
-+
-+
-+/* Function Name:
-+ *      rtk_led_enable_set
-+ * Description:
-+ *      Set Led enable congiuration
-+ * Input:
-+ *      group       - LED group id.
-+ *      pPortmask   - LED enable port mask.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_MASK    - Error portmask
-+ * Note:
-+ *      The API can be used to enable LED per port per group.
-+ */
-+rtk_api_ret_t rtk_led_enable_set(rtk_led_group_t group, rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmask;
-+    rtk_port_t port;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (group >= LED_GROUP_END)
-+        return RT_ERR_INPUT;
-+
-+    RTK_CHK_PORTMASK_VALID(pPortmask);
-+
-+    RTK_PORTMASK_SCAN((*pPortmask), port)
-+    {
-+        if(rtk_switch_isCPUPort(port) == RT_ERR_OK)
-+            return RT_ERR_PORT_MASK;
-+    }
-+
-+    if((retVal = rtk_switch_portmask_L2P_get(pPortmask, &pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicLedGroupEnable(group, pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_led_enable_get
-+ * Description:
-+ *      Get Led enable congiuration
-+ * Input:
-+ *      group - LED group id.
-+ * Output:
-+ *      pPortmask - LED enable port mask.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can be used to get LED enable status.
-+ */
-+rtk_api_ret_t rtk_led_enable_get(rtk_led_group_t group, rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (group >= LED_GROUP_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_getAsicLedGroupEnable(group, &pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtk_switch_portmask_P2L_get(pmask, pPortmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_led_operation_set
-+ * Description:
-+ *      Set Led operation mode
-+ * Input:
-+ *      mode - LED operation mode.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can set Led operation mode.
-+ *      The modes that can be set are as following:
-+ *      - LED_OP_SCAN,
-+ *      - LED_OP_PARALLEL,
-+ *      - LED_OP_SERIAL,
-+ */
-+rtk_api_ret_t rtk_led_operation_set(rtk_led_operation_t mode)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ( mode >= LED_OP_END)
-+      return RT_ERR_INPUT;
-+
-+    switch (mode)
-+    {
-+        case LED_OP_PARALLEL:
-+            regData = LEDOP_PARALLEL;
-+            break;
-+        case LED_OP_SERIAL:
-+            regData = LEDOP_SERIAL;
-+            break;
-+        default:
-+            return RT_ERR_CHIP_NOT_SUPPORTED;
-+            break;
-+    }
-+
-+    if ((retVal = rtl8367c_setAsicLedOperationMode(regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_led_operation_get
-+ * Description:
-+ *      Get Led operation mode
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pMode - Support LED operation mode.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get Led operation mode.
-+ *      The modes that can be set are as following:
-+ *      - LED_OP_SCAN,
-+ *      - LED_OP_PARALLEL,
-+ *      - LED_OP_SERIAL,
-+ */
-+rtk_api_ret_t rtk_led_operation_get(rtk_led_operation_t *pMode)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pMode)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicLedOperationMode(&regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (regData == LEDOP_SERIAL)
-+        *pMode = LED_OP_SERIAL;
-+    else if (regData ==LEDOP_PARALLEL)
-+        *pMode = LED_OP_PARALLEL;
-+    else
-+       return RT_ERR_FAILED;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_led_modeForce_set
-+ * Description:
-+ *      Set Led group to congiuration force mode
-+ * Input:
-+ *      port    - port ID
-+ *      group   - Support LED group id.
-+ *      mode    - Support LED force mode.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Error Port ID
-+ * Note:
-+ *      The API can force to one force mode.
-+ *      The force modes that can be set are as following:
-+ *      - LED_FORCE_NORMAL,
-+ *      - LED_FORCE_BLINK,
-+ *      - LED_FORCE_OFF,
-+ *      - LED_FORCE_ON.
-+ */
-+rtk_api_ret_t rtk_led_modeForce_set(rtk_port_t port, rtk_led_group_t group, rtk_led_force_mode_t mode)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    /* No LED for CPU port */
-+    if(rtk_switch_isCPUPort(port) == RT_ERR_OK)
-+        return RT_ERR_PORT_ID;
-+
-+    if (group >= LED_GROUP_END)
-+        return RT_ERR_INPUT;
-+
-+    if (mode >= LED_FORCE_END)
-+        return RT_ERR_NOT_ALLOWED;
-+
-+    if ((retVal = rtl8367c_setAsicForceLed(rtk_switch_port_L2P_get(port), group, mode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_led_modeForce_get
-+ * Description:
-+ *      Get Led group to congiuration force mode
-+ * Input:
-+ *      port  - port ID
-+ *      group - Support LED group id.
-+ *      pMode - Support LED force mode.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Error Port ID
-+ * Note:
-+ *      The API can get forced Led group mode.
-+ *      The force modes that can be set are as following:
-+ *      - LED_FORCE_NORMAL,
-+ *      - LED_FORCE_BLINK,
-+ *      - LED_FORCE_OFF,
-+ *      - LED_FORCE_ON.
-+ */
-+rtk_api_ret_t rtk_led_modeForce_get(rtk_port_t port, rtk_led_group_t group, rtk_led_force_mode_t *pMode)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    /* No LED for CPU port */
-+    if(rtk_switch_isCPUPort(port) == RT_ERR_OK)
-+        return RT_ERR_PORT_ID;
-+
-+    if (group >= LED_GROUP_END)
-+        return RT_ERR_INPUT;
-+
-+    if (NULL == pMode)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicForceLed(rtk_switch_port_L2P_get(port), group, pMode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_led_blinkRate_set
-+ * Description:
-+ *      Set LED blinking rate
-+ * Input:
-+ *      blinkRate - blinking rate.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      ASIC support 6 types of LED blinking rates at 43ms, 84ms, 120ms, 170ms, 340ms and 670ms.
-+ */
-+rtk_api_ret_t rtk_led_blinkRate_set(rtk_led_blink_rate_t blinkRate)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (blinkRate >= LED_BLINKRATE_END)
-+        return RT_ERR_FAILED;
-+
-+    if ((retVal = rtl8367c_setAsicLedBlinkRate(blinkRate)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_led_blinkRate_get
-+ * Description:
-+ *      Get LED blinking rate at mode 0 to mode 3
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pBlinkRate - blinking rate.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      There are  6 types of LED blinking rates at 43ms, 84ms, 120ms, 170ms, 340ms and 670ms.
-+ */
-+rtk_api_ret_t rtk_led_blinkRate_get(rtk_led_blink_rate_t *pBlinkRate)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pBlinkRate)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicLedBlinkRate(pBlinkRate)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_led_groupConfig_set
-+ * Description:
-+ *      Set per group Led to congiuration mode
-+ * Input:
-+ *      group   - LED group.
-+ *      config  - LED configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can set LED indicated information configuration for each LED group with 1 to 1 led mapping to each port.
-+ *      - Definition  LED Statuses      Description
-+ *      - 0000        LED_Off           LED pin Tri-State.
-+ *      - 0001        Dup/Col           Collision, Full duplex Indicator.
-+ *      - 0010        Link/Act          Link, Activity Indicator.
-+ *      - 0011        Spd1000           1000Mb/s Speed Indicator.
-+ *      - 0100        Spd100            100Mb/s Speed Indicator.
-+ *      - 0101        Spd10             10Mb/s Speed Indicator.
-+ *      - 0110        Spd1000/Act       1000Mb/s Speed/Activity Indicator.
-+ *      - 0111        Spd100/Act        100Mb/s Speed/Activity Indicator.
-+ *      - 1000        Spd10/Act         10Mb/s Speed/Activity Indicator.
-+ *      - 1001        Spd100 (10)/Act   10/100Mb/s Speed/Activity Indicator.
-+ *      - 1010        LoopDetect        LoopDetect Indicator.
-+ *      - 1011        EEE               EEE Indicator.
-+ *      - 1100        Link/Rx           Link, Activity Indicator.
-+ *      - 1101        Link/Tx           Link, Activity Indicator.
-+ *      - 1110        Master            Link on Master Indicator.
-+ *      - 1111        Act               Activity Indicator. Low for link established.
-+ */
-+rtk_api_ret_t rtk_led_groupConfig_set(rtk_led_group_t group, rtk_led_congig_t config)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (LED_GROUP_END <= group)
-+        return RT_ERR_FAILED;
-+
-+    if (LED_CONFIG_END <= config)
-+        return RT_ERR_FAILED;
-+
-+    if ((retVal = rtl8367c_setAsicLedIndicateInfoConfig(group, config)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_led_groupConfig_get
-+ * Description:
-+ *      Get Led group congiuration mode
-+ * Input:
-+ *      group - LED group.
-+ * Output:
-+ *      pConfig - LED configuration.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *       The API can get LED indicated information configuration for each LED group.
-+ */
-+rtk_api_ret_t rtk_led_groupConfig_get(rtk_led_group_t group, rtk_led_congig_t *pConfig)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (LED_GROUP_END <= group)
-+        return RT_ERR_FAILED;
-+
-+    if(NULL == pConfig)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicLedIndicateInfoConfig(group, pConfig)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_led_groupAbility_set
-+ * Description:
-+ *      Configure per group Led ability
-+ * Input:
-+ *      group    - LED group.
-+ *      pAbility - LED ability
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      None.
-+ */
-+
-+rtk_api_ret_t rtk_led_groupAbility_set(rtk_led_group_t group, rtk_led_ability_t *pAbility)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (LED_GROUP_END <= group)
-+        return RT_ERR_FAILED;
-+
-+    if(pAbility == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if( (pAbility->link_10m >= RTK_ENABLE_END) || (pAbility->link_100m >= RTK_ENABLE_END)||
-+        (pAbility->link_500m >= RTK_ENABLE_END) || (pAbility->link_1000m >= RTK_ENABLE_END)||
-+        (pAbility->act_rx >= RTK_ENABLE_END) || (pAbility->act_tx >= RTK_ENABLE_END) )
-+    {
-+        return RT_ERR_INPUT;
-+    }
-+
-+    if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_LED0_DATA_CTRL + (rtk_uint32)group, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(pAbility->link_10m == ENABLED)
-+        regData |= 0x0001;
-+    else
-+        regData &= ~0x0001;
-+
-+    if(pAbility->link_100m == ENABLED)
-+        regData |= 0x0002;
-+    else
-+        regData &= ~0x0002;
-+
-+    if(pAbility->link_500m == ENABLED)
-+        regData |= 0x0004;
-+    else
-+        regData &= ~0x0004;
-+
-+    if(pAbility->link_1000m == ENABLED)
-+        regData |= 0x0008;
-+    else
-+        regData &= ~0x0008;
-+
-+    if(pAbility->act_rx == ENABLED)
-+        regData |= 0x0010;
-+    else
-+        regData &= ~0x0010;
-+
-+    if(pAbility->act_tx == ENABLED)
-+        regData |= 0x0020;
-+    else
-+        regData &= ~0x0020;
-+
-+    regData |= (0x0001 << 6);
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_LED0_DATA_CTRL + (rtk_uint32)group, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_led_groupAbility_get
-+ * Description:
-+ *      Get per group Led ability
-+ * Input:
-+ *      group    - LED group.
-+ *      pAbility - LED ability
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      None.
-+ */
-+
-+rtk_api_ret_t rtk_led_groupAbility_get(rtk_led_group_t group, rtk_led_ability_t *pAbility)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (LED_GROUP_END <= group)
-+        return RT_ERR_FAILED;
-+
-+    if(pAbility == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_LED0_DATA_CTRL + (rtk_uint32)group, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    pAbility->link_10m = (regData & 0x0001) ? ENABLED : DISABLED;
-+    pAbility->link_100m = (regData & 0x0002) ? ENABLED : DISABLED;
-+    pAbility->link_500m = (regData & 0x0004) ? ENABLED : DISABLED;
-+    pAbility->link_1000m = (regData & 0x0008) ? ENABLED : DISABLED;
-+    pAbility->act_rx = (regData & 0x0010) ? ENABLED : DISABLED;
-+    pAbility->act_tx = (regData & 0x0020) ? ENABLED : DISABLED;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_led_serialMode_set
-+ * Description:
-+ *      Set Led serial mode active congiuration
-+ * Input:
-+ *      active - LED group.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can set LED serial mode active congiuration.
-+ */
-+rtk_api_ret_t rtk_led_serialMode_set(rtk_led_active_t active)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ( active >= LED_ACTIVE_END)
-+        return RT_ERR_INPUT;
-+
-+     if ((retVal = rtl8367c_setAsicLedSerialModeConfig(active,1))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_led_serialMode_get
-+ * Description:
-+ *      Get Led group congiuration mode
-+ * Input:
-+ *      group - LED group.
-+ * Output:
-+ *      pConfig - LED configuration.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *       The API can get LED serial mode active configuration.
-+ */
-+rtk_api_ret_t rtk_led_serialMode_get(rtk_led_active_t *pActive)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pActive)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicLedSerialModeConfig(pActive,&regData))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_led_OutputEnable_set
-+ * Description:
-+ *      This API set LED I/O state.
-+ * Input:
-+ *      enabled     - LED I/O state
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error parameter
-+ * Note:
-+ *      This API set LED I/O state.
-+ */
-+rtk_api_ret_t rtk_led_OutputEnable_set(rtk_enable_t state)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (state >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicLedOutputEnable(state))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_led_OutputEnable_get
-+ * Description:
-+ *      This API get LED I/O state.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pEnabled        - LED I/O state
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error parameter
-+ * Note:
-+ *      This API set current LED I/O  state.
-+ */
-+rtk_api_ret_t rtk_led_OutputEnable_get(rtk_enable_t *pState)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(pState == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicLedOutputEnable(pState))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_led_serialModePortmask_set
-+ * Description:
-+ *      This API configure Serial LED output Group and portmask
-+ * Input:
-+ *      output          - output group
-+ *      pPortmask       - output portmask
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error parameter
-+ * Note:
-+ *      None.
-+ */
-+rtk_api_ret_t rtk_led_serialModePortmask_set(rtk_led_serialOutput_t output, rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(output >= SERIAL_LED_END)
-+        return RT_ERR_INPUT;
-+
-+    if(pPortmask == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtk_switch_portmask_L2P_get(pPortmask, &pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicLedSerialOutput((rtk_uint32)output, pmask))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_led_serialModePortmask_get
-+ * Description:
-+ *      This API get Serial LED output Group and portmask
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pOutput         - output group
-+ *      pPortmask       - output portmask
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error parameter
-+ * Note:
-+ *      None.
-+ */
-+rtk_api_ret_t rtk_led_serialModePortmask_get(rtk_led_serialOutput_t *pOutput, rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(pOutput == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(pPortmask == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicLedSerialOutput((rtk_uint32 *)pOutput, &pmask))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtk_switch_portmask_P2L_get(pmask, pPortmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/mirror.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/mirror.c
-new file mode 100644
-index 0000000000..1921d1a5af
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/mirror.c
-@@ -0,0 +1,548 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in Mirror module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <mirror.h>
-+#include <string.h>
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_mirror.h>
-+
-+/* Function Name:
-+ *      rtk_mirror_portBased_set
-+ * Description:
-+ *      Set port mirror function.
-+ * Input:
-+ *      mirroring_port          - Monitor port.
-+ *      pMirrored_rx_portmask   - Rx mirror port mask.
-+ *      pMirrored_tx_portmask   - Tx mirror port mask.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_PORT_MASK    - Invalid portmask.
-+ * Note:
-+ *      The API is to set mirror function of source port and mirror port.
-+ *      The mirror port can only be set to one port and the TX and RX mirror ports
-+ *      should be identical.
-+ */
-+rtk_api_ret_t rtk_mirror_portBased_set(rtk_port_t mirroring_port, rtk_portmask_t *pMirrored_rx_portmask, rtk_portmask_t *pMirrored_tx_portmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_enable_t mirRx, mirTx;
-+    rtk_uint32 i, pmask;
-+    rtk_port_t source_port;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port valid */
-+    RTK_CHK_PORT_VALID(mirroring_port);
-+
-+    if(NULL == pMirrored_rx_portmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(NULL == pMirrored_tx_portmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    RTK_CHK_PORTMASK_VALID(pMirrored_rx_portmask);
-+
-+    RTK_CHK_PORTMASK_VALID(pMirrored_tx_portmask);
-+
-+    /*Mirror Sorce Port Mask Check*/
-+    if (pMirrored_tx_portmask->bits[0]!=pMirrored_rx_portmask->bits[0]&&pMirrored_tx_portmask->bits[0]!=0&&pMirrored_rx_portmask->bits[0]!=0)
-+        return RT_ERR_PORT_MASK;
-+
-+     /*mirror port != source port*/
-+    if(RTK_PORTMASK_IS_PORT_SET((*pMirrored_tx_portmask), mirroring_port) || RTK_PORTMASK_IS_PORT_SET((*pMirrored_rx_portmask), mirroring_port))
-+        return RT_ERR_PORT_MASK;
-+
-+    source_port = rtk_switch_maxLogicalPort_get();
-+
-+    RTK_SCAN_ALL_LOG_PORT(i)
-+    {
-+        if (pMirrored_tx_portmask->bits[0]&(1<<i))
-+        {
-+            source_port = i;
-+            break;
-+        }
-+
-+        if (pMirrored_rx_portmask->bits[0]&(1<<i))
-+        {
-+            source_port = i;
-+            break;
-+        }
-+    }
-+
-+    if ((retVal = rtl8367c_setAsicPortMirror(rtk_switch_port_L2P_get(source_port), rtk_switch_port_L2P_get(mirroring_port))) != RT_ERR_OK)
-+        return retVal;
-+    if(pMirrored_rx_portmask->bits[0] != 0)
-+    {
-+        if ((retVal = rtk_switch_portmask_L2P_get(pMirrored_rx_portmask, &pmask)) != RT_ERR_OK)
-+            return retVal;
-+        if ((retVal = rtl8367c_setAsicPortMirrorMask(pmask)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        if ((retVal = rtk_switch_portmask_L2P_get(pMirrored_tx_portmask, &pmask)) != RT_ERR_OK)
-+            return retVal;
-+        if ((retVal = rtl8367c_setAsicPortMirrorMask(pmask)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+
-+    if (pMirrored_rx_portmask->bits[0])
-+        mirRx = ENABLED;
-+    else
-+        mirRx = DISABLED;
-+
-+    if ((retVal = rtl8367c_setAsicPortMirrorRxFunction(mirRx)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (pMirrored_tx_portmask->bits[0])
-+        mirTx = ENABLED;
-+    else
-+        mirTx = DISABLED;
-+
-+    if ((retVal = rtl8367c_setAsicPortMirrorTxFunction(mirTx)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_mirror_portBased_get
-+ * Description:
-+ *      Get port mirror function.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pMirroring_port         - Monitor port.
-+ *      pMirrored_rx_portmask   - Rx mirror port mask.
-+ *      pMirrored_tx_portmask   - Tx mirror port mask.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API is to get mirror function of source port and mirror port.
-+ */
-+rtk_api_ret_t rtk_mirror_portBased_get(rtk_port_t *pMirroring_port, rtk_portmask_t *pMirrored_rx_portmask, rtk_portmask_t *pMirrored_tx_portmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_port_t source_port;
-+    rtk_enable_t mirRx, mirTx;
-+    rtk_uint32 sport, mport, pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pMirrored_rx_portmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(NULL == pMirrored_tx_portmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(NULL == pMirroring_port)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortMirror(&sport, &mport)) != RT_ERR_OK)
-+        return retVal;
-+    source_port = rtk_switch_port_P2L_get(sport);
-+    *pMirroring_port = rtk_switch_port_P2L_get(mport);
-+
-+    if ((retVal = rtl8367c_getAsicPortMirrorRxFunction((rtk_uint32*)&mirRx)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicPortMirrorTxFunction((rtk_uint32*)&mirTx)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicPortMirrorMask(&pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (DISABLED == mirRx)
-+        pMirrored_rx_portmask->bits[0]=0;
-+    else
-+    {
-+        if ((retVal = rtk_switch_portmask_P2L_get(pmask, pMirrored_rx_portmask)) != RT_ERR_OK)
-+            return retVal;
-+        pMirrored_rx_portmask->bits[0] |= 1<<source_port;
-+    }
-+
-+     if (DISABLED == mirTx)
-+        pMirrored_tx_portmask->bits[0]=0;
-+    else
-+    {
-+        if ((retVal = rtk_switch_portmask_P2L_get(pmask, pMirrored_tx_portmask)) != RT_ERR_OK)
-+            return retVal;
-+        pMirrored_tx_portmask->bits[0] |= 1<<source_port;
-+    }
-+
-+    return RT_ERR_OK;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_mirror_portIso_set
-+ * Description:
-+ *      Set mirror port isolation.
-+ * Input:
-+ *      enable |Mirror isolation status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENABLE       - Invalid enable input
-+ * Note:
-+ *      The API is to set mirror isolation function that prevent normal forwarding packets to miror port.
-+ */
-+rtk_api_ret_t rtk_mirror_portIso_set(rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_setAsicPortMirrorIsolation(enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_mirror_portIso_get
-+ * Description:
-+ *      Get mirror port isolation.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnable |Mirror isolation status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API is to get mirror isolation status.
-+ */
-+rtk_api_ret_t rtk_mirror_portIso_get(rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortMirrorIsolation(pEnable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_mirror_vlanLeaky_set
-+ * Description:
-+ *      Set mirror VLAN leaky.
-+ * Input:
-+ *      txenable -TX leaky enable.
-+ *      rxenable - RX leaky enable.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENABLE       - Invalid enable input
-+ * Note:
-+ *      The API is to set mirror VLAN leaky function forwarding packets to miror port.
-+ */
-+rtk_api_ret_t rtk_mirror_vlanLeaky_set(rtk_enable_t txenable, rtk_enable_t rxenable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((txenable >= RTK_ENABLE_END) ||(rxenable >= RTK_ENABLE_END))
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_setAsicPortMirrorVlanTxLeaky(txenable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicPortMirrorVlanRxLeaky(rxenable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_mirror_vlanLeaky_get
-+ * Description:
-+ *      Get mirror VLAN leaky.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pTxenable - TX leaky enable.
-+ *      pRxenable - RX leaky enable.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API is to get mirror VLAN leaky status.
-+ */
-+rtk_api_ret_t rtk_mirror_vlanLeaky_get(rtk_enable_t *pTxenable, rtk_enable_t *pRxenable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if( (NULL == pTxenable) || (NULL == pRxenable) )
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortMirrorVlanTxLeaky(pTxenable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicPortMirrorVlanRxLeaky(pRxenable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_mirror_isolationLeaky_set
-+ * Description:
-+ *      Set mirror Isolation leaky.
-+ * Input:
-+ *      txenable -TX leaky enable.
-+ *      rxenable - RX leaky enable.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENABLE       - Invalid enable input
-+ * Note:
-+ *      The API is to set mirror VLAN leaky function forwarding packets to miror port.
-+ */
-+rtk_api_ret_t rtk_mirror_isolationLeaky_set(rtk_enable_t txenable, rtk_enable_t rxenable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((txenable >= RTK_ENABLE_END) ||(rxenable >= RTK_ENABLE_END))
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_setAsicPortMirrorIsolationTxLeaky(txenable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicPortMirrorIsolationRxLeaky(rxenable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_mirror_isolationLeaky_get
-+ * Description:
-+ *      Get mirror isolation leaky.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pTxenable - TX leaky enable.
-+ *      pRxenable - RX leaky enable.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API is to get mirror isolation leaky status.
-+ */
-+rtk_api_ret_t rtk_mirror_isolationLeaky_get(rtk_enable_t *pTxenable, rtk_enable_t *pRxenable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if( (NULL == pTxenable) || (NULL == pRxenable) )
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortMirrorIsolationTxLeaky(pTxenable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicPortMirrorIsolationRxLeaky(pRxenable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_mirror_keep_set
-+ * Description:
-+ *      Set mirror packet format keep.
-+ * Input:
-+ *      mode - -mirror keep mode.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENABLE       - Invalid enable input
-+ * Note:
-+ *      The API is to set  -mirror keep mode.
-+ *      The mirror keep mode is as following:
-+ *      - MIRROR_FOLLOW_VLAN
-+ *      - MIRROR_KEEP_ORIGINAL
-+ *      - MIRROR_KEEP_END
-+ */
-+rtk_api_ret_t rtk_mirror_keep_set(rtk_mirror_keep_t mode)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (mode >= MIRROR_KEEP_END)
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_setAsicPortMirrorRealKeep(mode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_mirror_keep_get
-+ * Description:
-+ *      Get mirror packet format keep.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pMode -mirror keep mode.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API is to get mirror keep mode.
-+  *      The mirror keep mode is as following:
-+ *      - MIRROR_FOLLOW_VLAN
-+ *      - MIRROR_KEEP_ORIGINAL
-+ *      - MIRROR_KEEP_END
-+ */
-+rtk_api_ret_t rtk_mirror_keep_get(rtk_mirror_keep_t *pMode)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pMode)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortMirrorRealKeep(pMode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_mirror_override_set
-+ * Description:
-+ *      Set port mirror override function.
-+ * Input:
-+ *      rxMirror        - 1: output mirrored packet, 0: output normal forward packet
-+ *      txMirror        - 1: output mirrored packet, 0: output normal forward packet
-+ *      aclMirror       - 1: output mirrored packet, 0: output normal forward packet
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      The API is to set mirror override function.
-+ *      This function control the output format when a port output
-+ *      normal forward & mirrored packet at the same time.
-+ */
-+rtk_api_ret_t rtk_mirror_override_set(rtk_enable_t rxMirror, rtk_enable_t txMirror, rtk_enable_t aclMirror)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    if( (rxMirror >= RTK_ENABLE_END) || (txMirror >= RTK_ENABLE_END) || (aclMirror >= RTK_ENABLE_END))
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_setAsicPortMirrorOverride((rtk_uint32)rxMirror, (rtk_uint32)txMirror, (rtk_uint32)aclMirror)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_mirror_override_get
-+ * Description:
-+ *      Get port mirror override function.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pRxMirror       - 1: output mirrored packet, 0: output normal forward packet
-+ *      pTxMirror       - 1: output mirrored packet, 0: output normal forward packet
-+ *      pAclMirror      - 1: output mirrored packet, 0: output normal forward packet
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NULL_POINTER - Null Pointer
-+ * Note:
-+ *      The API is to Get mirror override function.
-+ *      This function control the output format when a port output
-+ *      normal forward & mirrored packet at the same time.
-+ */
-+rtk_api_ret_t rtk_mirror_override_get(rtk_enable_t *pRxMirror, rtk_enable_t *pTxMirror, rtk_enable_t *pAclMirror)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    if( (pRxMirror == NULL) || (pTxMirror == NULL) || (pAclMirror == NULL))
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_getAsicPortMirrorOverride((rtk_uint32 *)pRxMirror, (rtk_uint32 *)pTxMirror, (rtk_uint32 *)pAclMirror)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/oam.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/oam.c
-new file mode 100644
-index 0000000000..dc1559ae3e
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/oam.c
-@@ -0,0 +1,245 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in OAM(802.3ah)  module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <oam.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_oam.h>
-+
-+
-+/* Module Name : OAM */
-+
-+/* Function Name:
-+ *      rtk_oam_init
-+ * Description:
-+ *      Initialize oam module.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ * Note:
-+ *      Must initialize oam module before calling any oam APIs.
-+ */
-+rtk_api_ret_t rtk_oam_init(void)
-+{
-+    return RT_ERR_OK;
-+} /* end of rtk_oam_init */
-+
-+
-+/* Function Name:
-+ *      rtk_oam_state_set
-+ * Description:
-+ *      This API set OAM state.
-+ * Input:
-+ *      enabled     -OAMstate
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error parameter
-+ * Note:
-+ *      This API set OAM state.
-+ */
-+rtk_api_ret_t rtk_oam_state_set(rtk_enable_t enabled)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (enabled >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicOamEnable(enabled))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_oam_state_get
-+ * Description:
-+ *      This API get OAM state.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pEnabled        - H/W IGMP state
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT           - Error parameter
-+ * Note:
-+ *      This API set current OAM state.
-+ */
-+rtk_api_ret_t rtk_oam_state_get(rtk_enable_t *pEnabled)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((retVal = rtl8367c_getAsicOamEnable(pEnabled))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+
-+/* Function Name:
-+ *      rtk_oam_parserAction_set
-+ * Description:
-+ *      Set OAM parser action
-+ * Input:
-+ *      port    - port id
-+ *      action  - parser action
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID      - invalid port id
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t  rtk_oam_parserAction_set(rtk_port_t port, rtk_oam_parser_act_t action)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (action >= OAM_PARSER_ACTION_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicOamParser(rtk_switch_port_L2P_get(port), action))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_oam_parserAction_set
-+ * Description:
-+ *      Get OAM parser action
-+ * Input:
-+ *      port    - port id
-+ * Output:
-+ *      pAction  - parser action
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID      - invalid port id
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t  rtk_oam_parserAction_get(rtk_port_t port, rtk_oam_parser_act_t *pAction)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_getAsicOamParser(rtk_switch_port_L2P_get(port), pAction))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_oam_multiplexerAction_set
-+ * Description:
-+ *      Set OAM multiplexer action
-+ * Input:
-+ *      port    - port id
-+ *      action  - parser action
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID      - invalid port id
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t  rtk_oam_multiplexerAction_set(rtk_port_t port, rtk_oam_multiplexer_act_t action)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (action >= OAM_MULTIPLEXER_ACTION_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicOamMultiplexer(rtk_switch_port_L2P_get(port), action))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_oam_parserAction_set
-+ * Description:
-+ *      Get OAM multiplexer action
-+ * Input:
-+ *      port    - port id
-+ * Output:
-+ *      pAction  - parser action
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID      - invalid port id
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t  rtk_oam_multiplexerAction_get(rtk_port_t port, rtk_oam_multiplexer_act_t *pAction)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_getAsicOamMultiplexer(rtk_switch_port_L2P_get(port), pAction))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/port.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/port.c
-new file mode 100644
-index 0000000000..9f99d1b3dc
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/port.c
-@@ -0,0 +1,2467 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in Port module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <port.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_port.h>
-+#include <rtl8367c_asicdrv_misc.h>
-+#include <rtl8367c_asicdrv_portIsolation.h>
-+
-+#define FIBER_INIT_SIZE 1507
-+CONST_T rtk_uint8 Fiber[FIBER_INIT_SIZE] = {
-+0x02,0x04,0x41,0xE4,0xF5,0xA8,0xD2,0xAF,
-+0x22,0x00,0x00,0x02,0x05,0x2D,0xE4,0x90,
-+0x06,0x2A,0xF0,0xFD,0x7C,0x01,0x7F,0x3F,
-+0x7E,0x1D,0x12,0x05,0xAF,0x7D,0x40,0x12,
-+0x02,0x5F,0xE4,0xFF,0xFE,0xFD,0x80,0x08,
-+0x12,0x05,0x9E,0x50,0x0C,0x12,0x05,0x8B,
-+0xFC,0x90,0x06,0x24,0x12,0x03,0x76,0x80,
-+0xEF,0xE4,0xF5,0xA8,0xD2,0xAF,0x7D,0x1F,
-+0xFC,0x7F,0x49,0x7E,0x13,0x12,0x05,0xAF,
-+0x12,0x05,0xD6,0x7D,0xD7,0x12,0x02,0x1E,
-+0x7D,0x80,0x12,0x01,0xCA,0x7D,0x94,0x7C,
-+0xF9,0x12,0x02,0x3B,0x7D,0x81,0x12,0x01,
-+0xCA,0x7D,0xA2,0x7C,0x31,0x12,0x02,0x3B,
-+0x7D,0x82,0x12,0x01,0xDF,0x7D,0x60,0x7C,
-+0x69,0x12,0x02,0x43,0x7D,0x83,0x12,0x01,
-+0xDF,0x7D,0x28,0x7C,0x97,0x12,0x02,0x43,
-+0x7D,0x84,0x12,0x01,0xF4,0x7D,0x85,0x7C,
-+0x9D,0x12,0x02,0x57,0x7D,0x23,0x12,0x01,
-+0xF4,0x7D,0x10,0x7C,0xD8,0x12,0x02,0x57,
-+0x7D,0x24,0x7C,0x04,0x12,0x02,0x28,0x7D,
-+0x00,0x12,0x02,0x1E,0x7D,0x2F,0x12,0x02,
-+0x09,0x7D,0x20,0x7C,0x0F,0x7F,0x02,0x7E,
-+0x66,0x12,0x05,0xAF,0x7D,0x01,0x12,0x02,
-+0x09,0x7D,0x04,0x7C,0x00,0x7F,0x01,0x7E,
-+0x66,0x12,0x05,0xAF,0x7D,0x80,0x7C,0x00,
-+0x7F,0x00,0x7E,0x66,0x12,0x05,0xAF,0x7F,
-+0x02,0x7E,0x66,0x12,0x02,0x4B,0x44,0x02,
-+0xFF,0x90,0x06,0x28,0xEE,0xF0,0xA3,0xEF,
-+0xF0,0x44,0x04,0xFF,0x90,0x06,0x28,0xEE,
-+0xF0,0xFC,0xA3,0xEF,0xF0,0xFD,0x7F,0x02,
-+0x7E,0x66,0x12,0x05,0xAF,0x7D,0x04,0x7C,
-+0x00,0x12,0x02,0x28,0x7D,0xB9,0x7C,0x15,
-+0x7F,0xEB,0x7E,0x13,0x12,0x05,0xAF,0x7D,
-+0x07,0x7C,0x00,0x7F,0xE7,0x7E,0x13,0x12,
-+0x05,0xAF,0x7D,0x40,0x7C,0x11,0x7F,0x00,
-+0x7E,0x62,0x12,0x05,0xAF,0x12,0x03,0x82,
-+0x7D,0x41,0x12,0x02,0x5F,0xE4,0xFF,0xFE,
-+0xFD,0x80,0x08,0x12,0x05,0x9E,0x50,0x0C,
-+0x12,0x05,0x8B,0xFC,0x90,0x06,0x24,0x12,
-+0x03,0x76,0x80,0xEF,0xC2,0x00,0xC2,0x01,
-+0xD2,0xA9,0xD2,0x8C,0x7F,0x01,0x7E,0x62,
-+0x12,0x02,0x4B,0x30,0xE2,0x05,0xE4,0xA3,
-+0xF0,0x80,0xF1,0x90,0x06,0x2A,0xE0,0x70,
-+0x12,0x12,0x01,0x89,0x90,0x06,0x2A,0x74,
-+0x01,0xF0,0xE4,0x90,0x06,0x2D,0xF0,0xA3,
-+0xF0,0x80,0xD9,0xC3,0x90,0x06,0x2E,0xE0,
-+0x94,0x64,0x90,0x06,0x2D,0xE0,0x94,0x00,
-+0x40,0xCA,0xE4,0xF0,0xA3,0xF0,0x12,0x01,
-+0x89,0x90,0x06,0x2A,0x74,0x01,0xF0,0x80,
-+0xBB,0x7D,0x04,0xFC,0x7F,0x02,0x7E,0x66,
-+0x12,0x05,0xAF,0x7D,0x00,0x7C,0x04,0x7F,
-+0x01,0x7E,0x66,0x12,0x05,0xAF,0x7D,0xC0,
-+0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,0x05,
-+0xAF,0xE4,0xFD,0xFC,0x7F,0x02,0x7E,0x66,
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-+0x01,0x7E,0x66,0x12,0x05,0xAF,0x7D,0xC0,
-+0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,0x05,
-+0xAF,0x22,0x7C,0x04,0x7F,0x01,0x7E,0x66,
-+0x12,0x05,0xAF,0x7D,0xC0,0x7C,0x00,0x7F,
-+0x00,0x7E,0x66,0x12,0x05,0xAF,0x22,0x7C,
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-+0x7D,0xC0,0x7C,0x00,0x7F,0x00,0x7E,0x66,
-+0x12,0x05,0xAF,0x22,0x7C,0x04,0x7F,0x01,
-+0x7E,0x66,0x12,0x05,0xAF,0x7D,0xC0,0x7C,
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-+0x05,0xAF,0x7D,0xC0,0x7C,0x00,0x7F,0x00,
-+0x7E,0x66,0x12,0x05,0xAF,0x22,0x7C,0x04,
-+0x7F,0x02,0x7E,0x66,0x12,0x05,0xAF,0x22,
-+0x7F,0x01,0x7E,0x66,0x12,0x05,0xAF,0x7D,
-+0xC0,0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,
-+0x05,0xAF,0x22,0x7F,0x02,0x7E,0x66,0x12,
-+0x05,0xAF,0x22,0x7F,0x02,0x7E,0x66,0x12,
-+0x05,0xAF,0x22,0x12,0x05,0x67,0x90,0x06,
-+0x28,0xEE,0xF0,0xA3,0xEF,0xF0,0x22,0x7F,
-+0x02,0x7E,0x66,0x12,0x05,0xAF,0x22,0x7C,
-+0x00,0x7F,0x36,0x7E,0x13,0x12,0x05,0xAF,
-+0x22,0xC5,0xF0,0xF8,0xA3,0xE0,0x28,0xF0,
-+0xC5,0xF0,0xF8,0xE5,0x82,0x15,0x82,0x70,
-+0x02,0x15,0x83,0xE0,0x38,0xF0,0x22,0x75,
-+0xF0,0x08,0x75,0x82,0x00,0xEF,0x2F,0xFF,
-+0xEE,0x33,0xFE,0xCD,0x33,0xCD,0xCC,0x33,
-+0xCC,0xC5,0x82,0x33,0xC5,0x82,0x9B,0xED,
-+0x9A,0xEC,0x99,0xE5,0x82,0x98,0x40,0x0C,
-+0xF5,0x82,0xEE,0x9B,0xFE,0xED,0x9A,0xFD,
-+0xEC,0x99,0xFC,0x0F,0xD5,0xF0,0xD6,0xE4,
-+0xCE,0xFB,0xE4,0xCD,0xFA,0xE4,0xCC,0xF9,
-+0xA8,0x82,0x22,0xB8,0x00,0xC1,0xB9,0x00,
-+0x59,0xBA,0x00,0x2D,0xEC,0x8B,0xF0,0x84,
-+0xCF,0xCE,0xCD,0xFC,0xE5,0xF0,0xCB,0xF9,
-+0x78,0x18,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,
-+0xED,0x33,0xFD,0xEC,0x33,0xFC,0xEB,0x33,
-+0xFB,0x10,0xD7,0x03,0x99,0x40,0x04,0xEB,
-+0x99,0xFB,0x0F,0xD8,0xE5,0xE4,0xF9,0xFA,
-+0x22,0x78,0x18,0xEF,0x2F,0xFF,0xEE,0x33,
-+0xFE,0xED,0x33,0xFD,0xEC,0x33,0xFC,0xC9,
-+0x33,0xC9,0x10,0xD7,0x05,0x9B,0xE9,0x9A,
-+0x40,0x07,0xEC,0x9B,0xFC,0xE9,0x9A,0xF9,
-+0x0F,0xD8,0xE0,0xE4,0xC9,0xFA,0xE4,0xCC,
-+0xFB,0x22,0x75,0xF0,0x10,0xEF,0x2F,0xFF,
-+0xEE,0x33,0xFE,0xED,0x33,0xFD,0xCC,0x33,
-+0xCC,0xC8,0x33,0xC8,0x10,0xD7,0x07,0x9B,
-+0xEC,0x9A,0xE8,0x99,0x40,0x0A,0xED,0x9B,
-+0xFD,0xEC,0x9A,0xFC,0xE8,0x99,0xF8,0x0F,
-+0xD5,0xF0,0xDA,0xE4,0xCD,0xFB,0xE4,0xCC,
-+0xFA,0xE4,0xC8,0xF9,0x22,0xEB,0x9F,0xF5,
-+0xF0,0xEA,0x9E,0x42,0xF0,0xE9,0x9D,0x42,
-+0xF0,0xE8,0x9C,0x45,0xF0,0x22,0xE0,0xFC,
-+0xA3,0xE0,0xFD,0xA3,0xE0,0xFE,0xA3,0xE0,
-+0xFF,0x22,0xE0,0xF8,0xA3,0xE0,0xF9,0xA3,
-+0xE0,0xFA,0xA3,0xE0,0xFB,0x22,0xEC,0xF0,
-+0xA3,0xED,0xF0,0xA3,0xEE,0xF0,0xA3,0xEF,
-+0xF0,0x22,0x12,0x03,0xF8,0x12,0x04,0x1A,
-+0x44,0x40,0x12,0x04,0x0F,0x7D,0x03,0x7C,
-+0x00,0x12,0x04,0x23,0x12,0x05,0xAF,0x12,
-+0x03,0xF8,0x12,0x04,0x1A,0x54,0xBF,0x12,
-+0x04,0x0F,0x7D,0x03,0x7C,0x00,0x12,0x03,
-+0xD0,0x7F,0x02,0x7E,0x66,0x12,0x05,0x67,
-+0xEF,0x54,0xFD,0x54,0xFE,0x12,0x04,0x33,
-+0x12,0x03,0xD0,0x7F,0x02,0x7E,0x66,0x12,
-+0x05,0x67,0xEF,0x44,0x02,0x44,0x01,0x12,
-+0x04,0x33,0x12,0x04,0x23,0x02,0x05,0xAF,
-+0x7F,0x01,0x7E,0x66,0x12,0x05,0xAF,0x7D,
-+0xC0,0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,
-+0x05,0xAF,0xE4,0xFD,0xFC,0x7F,0x01,0x7E,
-+0x66,0x12,0x05,0xAF,0x7D,0x80,0x7C,0x00,
-+0x7F,0x00,0x7E,0x66,0x12,0x05,0xAF,0x22,
-+0x7D,0x03,0x7C,0x00,0x7F,0x01,0x7E,0x66,
-+0x12,0x05,0xAF,0x7D,0x80,0x7C,0x00,0x7F,
-+0x00,0x7E,0x66,0x12,0x05,0xAF,0x22,0xFD,
-+0xAC,0x06,0x7F,0x02,0x7E,0x66,0x12,0x05,
-+0xAF,0x22,0x7F,0x02,0x7E,0x66,0x12,0x05,
-+0x67,0xEF,0x22,0x7F,0x01,0x7E,0x66,0x12,
-+0x05,0xAF,0x7D,0xC0,0x7C,0x00,0x7F,0x00,
-+0x7E,0x66,0x22,0xFD,0xAC,0x06,0x7F,0x02,
-+0x7E,0x66,0x12,0x05,0xAF,0xE4,0xFD,0xFC,
-+0x22,0x78,0x7F,0xE4,0xF6,0xD8,0xFD,0x75,
-+0x81,0x3C,0x02,0x04,0x88,0x02,0x00,0x0E,
-+0xE4,0x93,0xA3,0xF8,0xE4,0x93,0xA3,0x40,
-+0x03,0xF6,0x80,0x01,0xF2,0x08,0xDF,0xF4,
-+0x80,0x29,0xE4,0x93,0xA3,0xF8,0x54,0x07,
-+0x24,0x0C,0xC8,0xC3,0x33,0xC4,0x54,0x0F,
-+0x44,0x20,0xC8,0x83,0x40,0x04,0xF4,0x56,
-+0x80,0x01,0x46,0xF6,0xDF,0xE4,0x80,0x0B,
-+0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,
-+0x90,0x05,0xCB,0xE4,0x7E,0x01,0x93,0x60,
-+0xBC,0xA3,0xFF,0x54,0x3F,0x30,0xE5,0x09,
-+0x54,0x1F,0xFE,0xE4,0x93,0xA3,0x60,0x01,
-+0x0E,0xCF,0x54,0xC0,0x25,0xE0,0x60,0xA8,
-+0x40,0xB8,0xE4,0x93,0xA3,0xFA,0xE4,0x93,
-+0xA3,0xF8,0xE4,0x93,0xA3,0xC8,0xC5,0x82,
-+0xC8,0xCA,0xC5,0x83,0xCA,0xF0,0xA3,0xC8,
-+0xC5,0x82,0xC8,0xCA,0xC5,0x83,0xCA,0xDF,
-+0xE9,0xDE,0xE7,0x80,0xBE,0x75,0x0F,0x80,
-+0x75,0x0E,0x7E,0x75,0x0D,0xAA,0x75,0x0C,
-+0x83,0xE4,0xF5,0x10,0x75,0x0B,0xA0,0x75,
-+0x0A,0xAC,0x75,0x09,0xB9,0x75,0x08,0x03,
-+0x75,0x89,0x11,0x7B,0x60,0x7A,0x09,0xF9,
-+0xF8,0xAF,0x0B,0xAE,0x0A,0xAD,0x09,0xAC,
-+0x08,0x12,0x02,0xBB,0xAD,0x07,0xAC,0x06,
-+0xC3,0xE4,0x9D,0xFD,0xE4,0x9C,0xFC,0x78,
-+0x17,0xF6,0xAF,0x05,0xEF,0x08,0xF6,0x18,
-+0xE6,0xF5,0x8C,0x08,0xE6,0xF5,0x8A,0x74,
-+0x0D,0x2D,0xFD,0xE4,0x3C,0x18,0xF6,0xAF,
-+0x05,0xEF,0x08,0xF6,0x75,0x88,0x10,0x53,
-+0x8E,0xC7,0xD2,0xA9,0x22,0xC0,0xE0,0xC0,
-+0xF0,0xC0,0x83,0xC0,0x82,0xC0,0xD0,0x75,
-+0xD0,0x00,0xC0,0x00,0x78,0x17,0xE6,0xF5,
-+0x8C,0x78,0x18,0xE6,0xF5,0x8A,0x90,0x06,
-+0x2B,0xE4,0x75,0xF0,0x01,0x12,0x02,0x69,
-+0x90,0x06,0x2D,0xE4,0x75,0xF0,0x01,0x12,
-+0x02,0x69,0xD0,0x00,0xD0,0xD0,0xD0,0x82,
-+0xD0,0x83,0xD0,0xF0,0xD0,0xE0,0x32,0xC2,
-+0xAF,0xAD,0x07,0xAC,0x06,0x8C,0xA2,0x8D,
-+0xA3,0x75,0xA0,0x01,0x00,0x00,0x00,0x00,
-+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xAE,
-+0xA1,0xBE,0x00,0xF0,0xAE,0xA6,0xAF,0xA7,
-+0xD2,0xAF,0x22,0x90,0x06,0x24,0x12,0x03,
-+0x5E,0xEF,0x24,0x01,0xFF,0xE4,0x3E,0xFE,
-+0xE4,0x3D,0xFD,0xE4,0x3C,0x22,0xE4,0x7F,
-+0x20,0x7E,0x4E,0xFD,0xFC,0x90,0x06,0x24,
-+0x12,0x03,0x6A,0xC3,0x02,0x03,0x4D,0xC2,
-+0xAF,0xAB,0x07,0xAA,0x06,0x8A,0xA2,0x8B,
-+0xA3,0x8C,0xA4,0x8D,0xA5,0x75,0xA0,0x03,
-+0x00,0x00,0x00,0xAA,0xA1,0xBA,0x00,0xF8,
-+0xD2,0xAF,0x22,0x42,0x06,0x2D,0x00,0x00,
-+0x42,0x06,0x2B,0x00,0x00,0x00,0x12,0x05,
-+0xDF,0x12,0x04,0xCD,0x02,0x00,0x03,0xE4,
-+0xF5,0x8E,0x22};
-+
-+static rtk_api_ret_t _rtk_port_FiberModeAbility_set(rtk_port_t port, rtk_port_phy_ability_t *pAbility)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      regData;
-+
-+    /* Check Combo port or not */
-+    RTK_CHK_PORT_IS_COMBO(port);
-+
-+    /* Flow Control */
-+    if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_FIB0_CFG04, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (pAbility->AsyFC == 1)
-+        regData |= (0x0001 << 8);
-+    else
-+        regData &= ~(0x0001 << 8);
-+
-+    if (pAbility->FC == 1)
-+        regData |= (0x0001 << 7);
-+    else
-+        regData &= ~(0x0001 << 7);
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_FIB0_CFG04, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Speed ability */
-+    if( (pAbility->Full_1000 == 1) && (pAbility->Full_100 == 1) && (pAbility->AutoNegotiation == 1) )
-+    {
-+        if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_FRC_MODE_OFFSET, 0)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_MODE_MASK, 7)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_FIB0_CFG00, 0x1140)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if(pAbility->Full_1000 == 1)
-+    {
-+        if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_FRC_MODE_OFFSET, 1)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_MODE_MASK, 4)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if(pAbility->AutoNegotiation == 1)
-+        {
-+            if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_FIB0_CFG00, 0x1140)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+        else
-+        {
-+            if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_FIB0_CFG00, 0x0140)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+    }
-+    else if(pAbility->Full_100 == 1)
-+    {
-+        if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_FRC_MODE_OFFSET, 1)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_MODE_MASK, 5)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_FIB0_CFG00, 0x2100)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    /* Digital software reset */
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, 0x0003)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x0080)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_SDS_INDACS_DATA, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    regData |= (0x0001 << 6);
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, 0x0003)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+        return retVal;
-+
-+    regData &= ~(0x0001 << 6);
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, 0x0003)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* CDR reset */
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, 0x1401))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, 0x0000))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, 0x1403))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, 0x0000))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+static rtk_api_ret_t _rtk_port_FiberModeAbility_get(rtk_port_t port, rtk_port_phy_ability_t *pAbility)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      data, regData;
-+
-+    /* Check Combo port or not */
-+    RTK_CHK_PORT_IS_COMBO(port);
-+
-+    memset(pAbility, 0x00, sizeof(rtk_port_phy_ability_t));
-+
-+    /* Flow Control */
-+    if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_FRC_REG4_OFFSET, 1)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_FRC_REG4_FIB100_OFFSET, 0)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, 0x0044)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x0080)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_SDS_INDACS_DATA, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(regData & (0x0001 << 8))
-+        pAbility->AsyFC = 1;
-+
-+    if(regData & (0x0001 << 7))
-+        pAbility->FC = 1;
-+
-+    /* Speed ability */
-+    if ((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_FRC_MODE_OFFSET, &data)) != RT_ERR_OK)
-+            return retVal;
-+
-+    if(data == 0)
-+    {
-+        pAbility->AutoNegotiation = 1;
-+        pAbility->Full_1000 = 1;
-+        pAbility->Full_100 = 1;
-+    }
-+    else
-+    {
-+        if ((retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_MODE_MASK, &data)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if(data == 4)
-+        {
-+            pAbility->Full_1000 = 1;
-+
-+            if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_FIB0_CFG00, &data)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if(data & 0x1000)
-+                pAbility->AutoNegotiation = 1;
-+            else
-+                pAbility->AutoNegotiation = 0;
-+        }
-+        else if(data == 5)
-+            pAbility->Full_100 = 1;
-+        else
-+            return RT_ERR_FAILED;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_phyAutoNegoAbility_set
-+ * Description:
-+ *      Set ethernet PHY auto-negotiation desired ability.
-+ * Input:
-+ *      port        - port id.
-+ *      pAbility    - Ability structure
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_PHY_REG_ID       - Invalid PHY address
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      If Full_1000 bit is set to 1, the AutoNegotiation will be automatic set to 1. While both AutoNegotiation and Full_1000 are set to 0, the PHY speed and duplex selection will
-+ *      be set as following 100F > 100H > 10F > 10H priority sequence.
-+ */
-+rtk_api_ret_t rtk_port_phyAutoNegoAbility_set(rtk_port_t port, rtk_port_phy_ability_t *pAbility)
-+{
-+    rtk_api_ret_t       retVal;
-+    rtk_uint32          phyData;
-+    rtk_uint32          phyEnMsk0;
-+    rtk_uint32          phyEnMsk4;
-+    rtk_uint32          phyEnMsk9;
-+    rtk_port_media_t    media_type;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_IS_UTP(port);
-+
-+    if(NULL == pAbility)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (pAbility->Half_10 >= RTK_ENABLE_END || pAbility->Full_10 >= RTK_ENABLE_END ||
-+       pAbility->Half_100 >= RTK_ENABLE_END || pAbility->Full_100 >= RTK_ENABLE_END ||
-+       pAbility->Full_1000 >= RTK_ENABLE_END || pAbility->AutoNegotiation >= RTK_ENABLE_END ||
-+       pAbility->AsyFC >= RTK_ENABLE_END || pAbility->FC >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if (rtk_switch_isComboPort(port) == RT_ERR_OK)
-+    {
-+        if ((retVal = rtk_port_phyComboPortMedia_get(port, &media_type)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if(media_type == PORT_MEDIA_FIBER)
-+        {
-+            return _rtk_port_FiberModeAbility_set(port, pAbility);
-+        }
-+    }
-+
-+    /*for PHY auto mode setup*/
-+    pAbility->AutoNegotiation = 1;
-+
-+    phyEnMsk0 = 0;
-+    phyEnMsk4 = 0;
-+    phyEnMsk9 = 0;
-+
-+    if (1 == pAbility->Half_10)
-+    {
-+        /*10BASE-TX half duplex capable in reg 4.5*/
-+        phyEnMsk4 = phyEnMsk4 | (1 << 5);
-+
-+        /*Speed selection [1:0] */
-+        /* 11=Reserved*/
-+        /* 10= 1000Mpbs*/
-+        /* 01= 100Mpbs*/
-+        /* 00= 10Mpbs*/
-+        phyEnMsk0 = phyEnMsk0 & (~(1 << 6));
-+        phyEnMsk0 = phyEnMsk0 & (~(1 << 13));
-+    }
-+
-+    if (1 == pAbility->Full_10)
-+    {
-+        /*10BASE-TX full duplex capable in reg 4.6*/
-+        phyEnMsk4 = phyEnMsk4 | (1 << 6);
-+        /*Speed selection [1:0] */
-+        /* 11=Reserved*/
-+        /* 10= 1000Mpbs*/
-+        /* 01= 100Mpbs*/
-+        /* 00= 10Mpbs*/
-+        phyEnMsk0 = phyEnMsk0 & (~(1 << 6));
-+        phyEnMsk0 = phyEnMsk0 & (~(1 << 13));
-+
-+        /*Full duplex mode in reg 0.8*/
-+        phyEnMsk0 = phyEnMsk0 | (1 << 8);
-+
-+    }
-+
-+    if (1 == pAbility->Half_100)
-+    {
-+        /*100BASE-TX half duplex capable in reg 4.7*/
-+        phyEnMsk4 = phyEnMsk4 | (1 << 7);
-+        /*Speed selection [1:0] */
-+        /* 11=Reserved*/
-+        /* 10= 1000Mpbs*/
-+        /* 01= 100Mpbs*/
-+        /* 00= 10Mpbs*/
-+        phyEnMsk0 = phyEnMsk0 & (~(1 << 6));
-+        phyEnMsk0 = phyEnMsk0 | (1 << 13);
-+    }
-+
-+
-+    if (1 == pAbility->Full_100)
-+    {
-+        /*100BASE-TX full duplex capable in reg 4.8*/
-+        phyEnMsk4 = phyEnMsk4 | (1 << 8);
-+        /*Speed selection [1:0] */
-+        /* 11=Reserved*/
-+        /* 10= 1000Mpbs*/
-+        /* 01= 100Mpbs*/
-+        /* 00= 10Mpbs*/
-+        phyEnMsk0 = phyEnMsk0 & (~(1 << 6));
-+        phyEnMsk0 = phyEnMsk0 | (1 << 13);
-+        /*Full duplex mode in reg 0.8*/
-+        phyEnMsk0 = phyEnMsk0 | (1 << 8);
-+    }
-+
-+
-+    if (1 == pAbility->Full_1000)
-+    {
-+        /*1000 BASE-T FULL duplex capable setting in reg 9.9*/
-+        phyEnMsk9 = phyEnMsk9 | (1 << 9);
-+
-+        /*Speed selection [1:0] */
-+        /* 11=Reserved*/
-+        /* 10= 1000Mpbs*/
-+        /* 01= 100Mpbs*/
-+        /* 00= 10Mpbs*/
-+        phyEnMsk0 = phyEnMsk0 | (1 << 6);
-+        phyEnMsk0 = phyEnMsk0 & (~(1 << 13));
-+
-+
-+        /*Auto-Negotiation setting in reg 0.12*/
-+        phyEnMsk0 = phyEnMsk0 | (1 << 12);
-+
-+     }
-+
-+    if (1 == pAbility->AutoNegotiation)
-+    {
-+        /*Auto-Negotiation setting in reg 0.12*/
-+        phyEnMsk0 = phyEnMsk0 | (1 << 12);
-+    }
-+
-+    if (1 == pAbility->AsyFC)
-+    {
-+        /*Asymetric flow control in reg 4.11*/
-+        phyEnMsk4 = phyEnMsk4 | (1 << 11);
-+    }
-+    if (1 == pAbility->FC)
-+    {
-+        /*Flow control in reg 4.10*/
-+        phyEnMsk4 = phyEnMsk4 | (1 << 10);
-+    }
-+
-+    /*1000 BASE-T control register setting*/
-+    if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_1000_BASET_CONTROL_REG, &phyData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    phyData = (phyData & (~0x0200)) | phyEnMsk9 ;
-+
-+    if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_1000_BASET_CONTROL_REG, phyData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*Auto-Negotiation control register setting*/
-+    if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_AN_ADVERTISEMENT_REG, &phyData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    phyData = (phyData & (~0x0DE0)) | phyEnMsk4;
-+    if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_AN_ADVERTISEMENT_REG, phyData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*Control register setting and restart auto*/
-+    if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_CONTROL_REG, &phyData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    phyData = (phyData & (~0x3140)) | phyEnMsk0;
-+    /*If have auto-negotiation capable, then restart auto negotiation*/
-+    if (1 == pAbility->AutoNegotiation)
-+    {
-+        phyData = phyData | (1 << 9);
-+    }
-+
-+    if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_CONTROL_REG, phyData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_phyAutoNegoAbility_get
-+ * Description:
-+ *      Get PHY ability through PHY registers.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pAbility - Ability structure
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_PHY_REG_ID       - Invalid PHY address
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      Get the capablity of specified PHY.
-+ */
-+rtk_api_ret_t rtk_port_phyAutoNegoAbility_get(rtk_port_t port, rtk_port_phy_ability_t *pAbility)
-+{
-+    rtk_api_ret_t       retVal;
-+    rtk_uint32          phyData0;
-+    rtk_uint32          phyData4;
-+    rtk_uint32          phyData9;
-+    rtk_port_media_t    media_type;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_IS_UTP(port);
-+
-+    if(NULL == pAbility)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (rtk_switch_isComboPort(port) == RT_ERR_OK)
-+    {
-+        if ((retVal = rtk_port_phyComboPortMedia_get(port, &media_type)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if(media_type == PORT_MEDIA_FIBER)
-+        {
-+            return _rtk_port_FiberModeAbility_get(port, pAbility);
-+        }
-+    }
-+
-+    /*Control register setting and restart auto*/
-+    if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_CONTROL_REG, &phyData0)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*Auto-Negotiation control register setting*/
-+    if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_AN_ADVERTISEMENT_REG, &phyData4)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*1000 BASE-T control register setting*/
-+    if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_1000_BASET_CONTROL_REG, &phyData9)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (phyData9 & (1 << 9))
-+        pAbility->Full_1000 = 1;
-+    else
-+        pAbility->Full_1000 = 0;
-+
-+    if (phyData4 & (1 << 11))
-+        pAbility->AsyFC = 1;
-+    else
-+        pAbility->AsyFC = 0;
-+
-+    if (phyData4 & (1 << 10))
-+        pAbility->FC = 1;
-+    else
-+        pAbility->FC = 0;
-+
-+
-+    if (phyData4 & (1 << 8))
-+        pAbility->Full_100 = 1;
-+    else
-+        pAbility->Full_100 = 0;
-+
-+    if (phyData4 & (1 << 7))
-+        pAbility->Half_100 = 1;
-+    else
-+        pAbility->Half_100 = 0;
-+
-+    if (phyData4 & (1 << 6))
-+        pAbility->Full_10 = 1;
-+    else
-+        pAbility->Full_10 = 0;
-+
-+    if (phyData4 & (1 << 5))
-+        pAbility->Half_10 = 1;
-+    else
-+        pAbility->Half_10 = 0;
-+
-+
-+    if (phyData0 & (1 << 12))
-+        pAbility->AutoNegotiation = 1;
-+    else
-+        pAbility->AutoNegotiation = 0;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_phyForceModeAbility_set
-+ * Description:
-+ *      Set the port speed/duplex mode/pause/asy_pause in the PHY force mode.
-+ * Input:
-+ *      port        - port id.
-+ *      pAbility    - Ability structure
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_PHY_REG_ID       - Invalid PHY address
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      While both AutoNegotiation and Full_1000 are set to 0, the PHY speed and duplex selection will
-+ *      be set as following 100F > 100H > 10F > 10H priority sequence.
-+ *      This API can be used to configure combo port in fiber mode.
-+ *      The possible parameters in fiber mode are Full_1000 and Full 100.
-+ *      All the other fields in rtk_port_phy_ability_t will be ignored in fiber port.
-+ */
-+rtk_api_ret_t rtk_port_phyForceModeAbility_set(rtk_port_t port, rtk_port_phy_ability_t *pAbility)
-+{
-+     rtk_api_ret_t      retVal;
-+     rtk_uint32         phyData;
-+     rtk_uint32         phyEnMsk0;
-+     rtk_uint32         phyEnMsk4;
-+     rtk_uint32         phyEnMsk9;
-+     rtk_port_media_t   media_type;
-+
-+     /* Check initialization state */
-+     RTK_CHK_INIT_STATE();
-+
-+     /* Check Port Valid */
-+     RTK_CHK_PORT_IS_UTP(port);
-+
-+     if(NULL == pAbility)
-+        return RT_ERR_NULL_POINTER;
-+
-+     if (pAbility->Half_10 >= RTK_ENABLE_END || pAbility->Full_10 >= RTK_ENABLE_END ||
-+        pAbility->Half_100 >= RTK_ENABLE_END || pAbility->Full_100 >= RTK_ENABLE_END ||
-+        pAbility->Full_1000 >= RTK_ENABLE_END || pAbility->AutoNegotiation >= RTK_ENABLE_END ||
-+        pAbility->AsyFC >= RTK_ENABLE_END || pAbility->FC >= RTK_ENABLE_END)
-+         return RT_ERR_INPUT;
-+
-+     if (rtk_switch_isComboPort(port) == RT_ERR_OK)
-+     {
-+         if ((retVal = rtk_port_phyComboPortMedia_get(port, &media_type)) != RT_ERR_OK)
-+             return retVal;
-+
-+         if(media_type == PORT_MEDIA_FIBER)
-+         {
-+             return _rtk_port_FiberModeAbility_set(port, pAbility);
-+         }
-+     }
-+
-+     if (1 == pAbility->Full_1000)
-+         return RT_ERR_INPUT;
-+
-+     /*for PHY force mode setup*/
-+     pAbility->AutoNegotiation = 0;
-+
-+     phyEnMsk0 = 0;
-+     phyEnMsk4 = 0;
-+     phyEnMsk9 = 0;
-+
-+     if (1 == pAbility->Half_10)
-+     {
-+         /*10BASE-TX half duplex capable in reg 4.5*/
-+         phyEnMsk4 = phyEnMsk4 | (1 << 5);
-+
-+         /*Speed selection [1:0] */
-+         /* 11=Reserved*/
-+         /* 10= 1000Mpbs*/
-+         /* 01= 100Mpbs*/
-+         /* 00= 10Mpbs*/
-+         phyEnMsk0 = phyEnMsk0 & (~(1 << 6));
-+         phyEnMsk0 = phyEnMsk0 & (~(1 << 13));
-+     }
-+
-+     if (1 == pAbility->Full_10)
-+     {
-+         /*10BASE-TX full duplex capable in reg 4.6*/
-+         phyEnMsk4 = phyEnMsk4 | (1 << 6);
-+         /*Speed selection [1:0] */
-+         /* 11=Reserved*/
-+         /* 10= 1000Mpbs*/
-+         /* 01= 100Mpbs*/
-+         /* 00= 10Mpbs*/
-+         phyEnMsk0 = phyEnMsk0 & (~(1 << 6));
-+         phyEnMsk0 = phyEnMsk0 & (~(1 << 13));
-+
-+         /*Full duplex mode in reg 0.8*/
-+         phyEnMsk0 = phyEnMsk0 | (1 << 8);
-+
-+     }
-+
-+     if (1 == pAbility->Half_100)
-+     {
-+         /*100BASE-TX half duplex capable in reg 4.7*/
-+         phyEnMsk4 = phyEnMsk4 | (1 << 7);
-+         /*Speed selection [1:0] */
-+         /* 11=Reserved*/
-+         /* 10= 1000Mpbs*/
-+         /* 01= 100Mpbs*/
-+         /* 00= 10Mpbs*/
-+         phyEnMsk0 = phyEnMsk0 & (~(1 << 6));
-+         phyEnMsk0 = phyEnMsk0 | (1 << 13);
-+     }
-+
-+
-+     if (1 == pAbility->Full_100)
-+     {
-+         /*100BASE-TX full duplex capable in reg 4.8*/
-+         phyEnMsk4 = phyEnMsk4 | (1 << 8);
-+         /*Speed selection [1:0] */
-+         /* 11=Reserved*/
-+         /* 10= 1000Mpbs*/
-+         /* 01= 100Mpbs*/
-+         /* 00= 10Mpbs*/
-+         phyEnMsk0 = phyEnMsk0 & (~(1 << 6));
-+         phyEnMsk0 = phyEnMsk0 | (1 << 13);
-+         /*Full duplex mode in reg 0.8*/
-+         phyEnMsk0 = phyEnMsk0 | (1 << 8);
-+     }
-+
-+     if (1 == pAbility->AsyFC)
-+     {
-+         /*Asymetric flow control in reg 4.11*/
-+         phyEnMsk4 = phyEnMsk4 | (1 << 11);
-+     }
-+     if (1 == pAbility->FC)
-+     {
-+         /*Flow control in reg 4.10*/
-+         phyEnMsk4 = phyEnMsk4 | ((1 << 10));
-+     }
-+
-+     /*1000 BASE-T control register setting*/
-+     if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_1000_BASET_CONTROL_REG, &phyData)) != RT_ERR_OK)
-+         return retVal;
-+
-+     phyData = (phyData & (~0x0200)) | phyEnMsk9 ;
-+
-+     if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_1000_BASET_CONTROL_REG, phyData)) != RT_ERR_OK)
-+         return retVal;
-+
-+     /*Auto-Negotiation control register setting*/
-+     if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_AN_ADVERTISEMENT_REG, &phyData)) != RT_ERR_OK)
-+         return retVal;
-+
-+     phyData = (phyData & (~0x0DE0)) | phyEnMsk4;
-+     if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_AN_ADVERTISEMENT_REG, phyData)) != RT_ERR_OK)
-+         return retVal;
-+
-+     /*Control register setting and power off/on*/
-+     phyData = phyEnMsk0 & (~(1 << 12));
-+     phyData |= (1 << 11);   /* power down PHY, bit 11 should be set to 1 */
-+     if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_CONTROL_REG, phyData)) != RT_ERR_OK)
-+         return retVal;
-+
-+     phyData = phyData & (~(1 << 11));   /* power on PHY, bit 11 should be set to 0*/
-+     if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_CONTROL_REG, phyData)) != RT_ERR_OK)
-+         return retVal;
-+
-+     return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_phyForceModeAbility_get
-+ * Description:
-+ *      Get PHY ability through PHY registers.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pAbility - Ability structure
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_PHY_REG_ID       - Invalid PHY address
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      Get the capablity of specified PHY.
-+ */
-+rtk_api_ret_t rtk_port_phyForceModeAbility_get(rtk_port_t port, rtk_port_phy_ability_t *pAbility)
-+{
-+    rtk_api_ret_t       retVal;
-+    rtk_uint32          phyData0;
-+    rtk_uint32          phyData4;
-+    rtk_uint32          phyData9;
-+    rtk_port_media_t    media_type;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+     RTK_CHK_PORT_IS_UTP(port);
-+
-+     if(NULL == pAbility)
-+        return RT_ERR_NULL_POINTER;
-+
-+     if (rtk_switch_isComboPort(port) == RT_ERR_OK)
-+     {
-+         if ((retVal = rtk_port_phyComboPortMedia_get(port, &media_type)) != RT_ERR_OK)
-+             return retVal;
-+
-+         if(media_type == PORT_MEDIA_FIBER)
-+         {
-+             return _rtk_port_FiberModeAbility_get(port, pAbility);
-+         }
-+     }
-+
-+    /*Control register setting and restart auto*/
-+    if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_CONTROL_REG, &phyData0)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*Auto-Negotiation control register setting*/
-+    if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_AN_ADVERTISEMENT_REG, &phyData4)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*1000 BASE-T control register setting*/
-+    if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_1000_BASET_CONTROL_REG, &phyData9)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (phyData9 & (1 << 9))
-+        pAbility->Full_1000 = 1;
-+    else
-+        pAbility->Full_1000 = 0;
-+
-+    if (phyData4 & (1 << 11))
-+        pAbility->AsyFC = 1;
-+    else
-+        pAbility->AsyFC = 0;
-+
-+    if (phyData4 & ((1 << 10)))
-+        pAbility->FC = 1;
-+    else
-+        pAbility->FC = 0;
-+
-+
-+    if (phyData4 & (1 << 8))
-+        pAbility->Full_100 = 1;
-+    else
-+        pAbility->Full_100 = 0;
-+
-+    if (phyData4 & (1 << 7))
-+        pAbility->Half_100 = 1;
-+    else
-+        pAbility->Half_100 = 0;
-+
-+    if (phyData4 & (1 << 6))
-+        pAbility->Full_10 = 1;
-+    else
-+        pAbility->Full_10 = 0;
-+
-+    if (phyData4 & (1 << 5))
-+        pAbility->Half_10 = 1;
-+    else
-+        pAbility->Half_10 = 0;
-+
-+
-+    if (phyData0 & (1 << 12))
-+        pAbility->AutoNegotiation = 1;
-+    else
-+        pAbility->AutoNegotiation = 0;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_phyStatus_get
-+ * Description:
-+ *      Get ethernet PHY linking status
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      linkStatus  - PHY link status
-+ *      speed       - PHY link speed
-+ *      duplex      - PHY duplex mode
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_PHY_REG_ID       - Invalid PHY address
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      API will return auto negotiation status of phy.
-+ */
-+rtk_api_ret_t rtk_port_phyStatus_get(rtk_port_t port, rtk_port_linkStatus_t *pLinkStatus, rtk_port_speed_t *pSpeed, rtk_port_duplex_t *pDuplex)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 phyData;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_IS_UTP(port);
-+
-+    if( (NULL == pLinkStatus) || (NULL == pSpeed) || (NULL == pDuplex) )
-+        return RT_ERR_NULL_POINTER;
-+
-+    /*Get PHY resolved register*/
-+    if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_RESOLVED_REG, &phyData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*check link status*/
-+    if (phyData & (1<<2))
-+    {
-+        *pLinkStatus = 1;
-+
-+        /*check link speed*/
-+        *pSpeed = (phyData&0x0030) >> 4;
-+
-+        /*check link duplex*/
-+        *pDuplex = (phyData&0x0008) >> 3;
-+    }
-+    else
-+    {
-+        *pLinkStatus = 0;
-+        *pSpeed = 0;
-+        *pDuplex = 0;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_macForceLink_set
-+ * Description:
-+ *      Set port force linking configuration.
-+ * Input:
-+ *      port            - port id.
-+ *      pPortability    - port ability configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API can set Port/MAC force mode properties.
-+ */
-+rtk_api_ret_t rtk_port_macForceLink_set(rtk_port_t port, rtk_port_mac_ability_t *pPortability)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_port_ability_t ability;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_IS_UTP(port);
-+
-+    if(NULL == pPortability)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (pPortability->forcemode >1|| pPortability->speed > 2 || pPortability->duplex > 1 ||
-+       pPortability->link > 1 || pPortability->nway > 1 || pPortability->txpause > 1 || pPortability->rxpause > 1)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_getAsicPortForceLink(rtk_switch_port_L2P_get(port), &ability)) != RT_ERR_OK)
-+        return retVal;
-+
-+    ability.forcemode = pPortability->forcemode;
-+    ability.speed     = pPortability->speed;
-+    ability.duplex    = pPortability->duplex;
-+    ability.link      = pPortability->link;
-+    ability.nway      = pPortability->nway;
-+    ability.txpause   = pPortability->txpause;
-+    ability.rxpause   = pPortability->rxpause;
-+
-+    if ((retVal = rtl8367c_setAsicPortForceLink(rtk_switch_port_L2P_get(port), &ability)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_macForceLink_get
-+ * Description:
-+ *      Get port force linking configuration.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pPortability - port ability configuration
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can get Port/MAC force mode properties.
-+ */
-+rtk_api_ret_t rtk_port_macForceLink_get(rtk_port_t port, rtk_port_mac_ability_t *pPortability)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_port_ability_t ability;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_IS_UTP(port);
-+
-+    if(NULL == pPortability)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortForceLink(rtk_switch_port_L2P_get(port), &ability)) != RT_ERR_OK)
-+        return retVal;
-+
-+    pPortability->forcemode = ability.forcemode;
-+    pPortability->speed     = ability.speed;
-+    pPortability->duplex    = ability.duplex;
-+    pPortability->link      = ability.link;
-+    pPortability->nway      = ability.nway;
-+    pPortability->txpause   = ability.txpause;
-+    pPortability->rxpause   = ability.rxpause;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_macForceLinkExt_set
-+ * Description:
-+ *      Set external interface force linking configuration.
-+ * Input:
-+ *      port            - external port ID
-+ *      mode            - external interface mode
-+ *      pPortability    - port ability configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can set external interface force mode properties.
-+ *      The external interface can be set to:
-+ *      - MODE_EXT_DISABLE,
-+ *      - MODE_EXT_RGMII,
-+ *      - MODE_EXT_MII_MAC,
-+ *      - MODE_EXT_MII_PHY,
-+ *      - MODE_EXT_TMII_MAC,
-+ *      - MODE_EXT_TMII_PHY,
-+ *      - MODE_EXT_GMII,
-+ *      - MODE_EXT_RMII_MAC,
-+ *      - MODE_EXT_RMII_PHY,
-+ *      - MODE_EXT_SGMII,
-+ *      - MODE_EXT_HSGMII,
-+ *      - MODE_EXT_1000X_100FX,
-+ *      - MODE_EXT_1000X,
-+ *      - MODE_EXT_100FX,
-+ */
-+rtk_api_ret_t rtk_port_macForceLinkExt_set(rtk_port_t port, rtk_mode_ext_t mode, rtk_port_mac_ability_t *pPortability)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_port_ability_t ability;
-+    rtk_uint32 ext_id;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_IS_EXT(port);
-+
-+    if(NULL == pPortability)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (mode >=MODE_EXT_END)
-+        return RT_ERR_INPUT;
-+
-+    if(mode == MODE_EXT_HSGMII)
-+    {
-+        if (pPortability->forcemode > 1 || pPortability->speed != PORT_SPEED_2500M || pPortability->duplex != PORT_FULL_DUPLEX ||
-+           pPortability->link >= PORT_LINKSTATUS_END || pPortability->nway > 1 || pPortability->txpause > 1 || pPortability->rxpause > 1)
-+            return RT_ERR_INPUT;
-+
-+        if(rtk_switch_isHsgPort(port) != RT_ERR_OK)
-+            return RT_ERR_PORT_ID;
-+    }
-+    else
-+    {
-+        if (pPortability->forcemode > 1 || pPortability->speed > PORT_SPEED_1000M || pPortability->duplex >= PORT_DUPLEX_END ||
-+           pPortability->link >= PORT_LINKSTATUS_END || pPortability->nway > 1 || pPortability->txpause > 1 || pPortability->rxpause > 1)
-+            return RT_ERR_INPUT;
-+    }
-+
-+    ext_id = port - 15;
-+
-+    if(mode == MODE_EXT_DISABLE)
-+    {
-+        memset(&ability, 0x00, sizeof(rtl8367c_port_ability_t));
-+        if ((retVal = rtl8367c_setAsicPortForceLinkExt(ext_id, &ability)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicPortExtMode(ext_id, mode)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        if ((retVal = rtl8367c_setAsicPortExtMode(ext_id, mode)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_getAsicPortForceLinkExt(ext_id, &ability)) != RT_ERR_OK)
-+            return retVal;
-+
-+        ability.forcemode = pPortability->forcemode;
-+        ability.speed     = (mode == MODE_EXT_HSGMII) ? PORT_SPEED_1000M : pPortability->speed;
-+        ability.duplex    = pPortability->duplex;
-+        ability.link      = pPortability->link;
-+        ability.nway      = pPortability->nway;
-+        ability.txpause   = pPortability->txpause;
-+        ability.rxpause   = pPortability->rxpause;
-+
-+        if ((retVal = rtl8367c_setAsicPortForceLinkExt(ext_id, &ability)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_macForceLinkExt_get
-+ * Description:
-+ *      Set external interface force linking configuration.
-+ * Input:
-+ *      port            - external port ID
-+ * Output:
-+ *      pMode           - external interface mode
-+ *      pPortability    - port ability configuration
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can get external interface force mode properties.
-+ */
-+rtk_api_ret_t rtk_port_macForceLinkExt_get(rtk_port_t port, rtk_mode_ext_t *pMode, rtk_port_mac_ability_t *pPortability)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_port_ability_t ability;
-+    rtk_uint32 ext_id;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_IS_EXT(port);
-+
-+    if(NULL == pMode)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(NULL == pPortability)
-+        return RT_ERR_NULL_POINTER;
-+
-+    ext_id = port - 15;
-+
-+    if ((retVal = rtl8367c_getAsicPortExtMode(ext_id, (rtk_uint32 *)pMode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicPortForceLinkExt(ext_id, &ability)) != RT_ERR_OK)
-+        return retVal;
-+
-+    pPortability->forcemode = ability.forcemode;
-+    pPortability->speed     = (*pMode == MODE_EXT_HSGMII) ? PORT_SPEED_2500M : ability.speed;
-+    pPortability->duplex    = ability.duplex;
-+    pPortability->link      = ability.link;
-+    pPortability->nway      = ability.nway;
-+    pPortability->txpause   = ability.txpause;
-+    pPortability->rxpause   = ability.rxpause;
-+
-+    return RT_ERR_OK;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_port_macStatus_get
-+ * Description:
-+ *      Get port link status.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pPortstatus - port ability configuration
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API can get Port/PHY properties.
-+ */
-+rtk_api_ret_t rtk_port_macStatus_get(rtk_port_t port, rtk_port_mac_ability_t *pPortstatus)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_port_status_t status;
-+    rtk_uint32 hsgsel;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pPortstatus)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortStatus(rtk_switch_port_L2P_get(port), &status)) != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    pPortstatus->duplex    = status.duplex;
-+    pPortstatus->link      = status.link;
-+    pPortstatus->nway      = status.nway;
-+    pPortstatus->txpause   = status.txpause;
-+    pPortstatus->rxpause   = status.rxpause;
-+
-+    if( (retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_MAC8_SEL_HSGMII_OFFSET, &hsgsel)) != RT_ERR_OK)
-+            return retVal;
-+
-+    if( (rtk_switch_isHsgPort(port) == RT_ERR_OK) && (hsgsel == 1) )
-+        pPortstatus->speed = PORT_SPEED_2500M;
-+    else
-+        pPortstatus->speed = status.speed;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_macLocalLoopbackEnable_set
-+ * Description:
-+ *      Set Port Local Loopback. (Redirect TX to RX.)
-+ * Input:
-+ *      port    - Port id.
-+ *      enable  - Loopback state, 0:disable, 1:enable
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API can enable/disable Local loopback in MAC.
-+ *      For UTP port, This API will also enable the digital
-+ *      loopback bit in PHY register for sync of speed between
-+ *      PHY and MAC. For EXT port, users need to force the
-+ *      link state by themself.
-+ */
-+rtk_api_ret_t rtk_port_macLocalLoopbackEnable_set(rtk_port_t port, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      data;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(enable >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicPortLoopback(rtk_switch_port_L2P_get(port), enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(rtk_switch_isUtpPort(port) == RT_ERR_OK)
-+    {
-+        if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_CONTROL_REG, &data)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if(enable == ENABLED)
-+            data |= (0x0001 << 14);
-+        else
-+            data &= ~(0x0001 << 14);
-+
-+        if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_CONTROL_REG, data)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_macLocalLoopbackEnable_get
-+ * Description:
-+ *      Get Port Local Loopback. (Redirect TX to RX.)
-+ * Input:
-+ *      port    - Port id.
-+ * Output:
-+ *      pEnable  - Loopback state, 0:disable, 1:enable
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      None.
-+ */
-+rtk_api_ret_t rtk_port_macLocalLoopbackEnable_get(rtk_port_t port, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortLoopback(rtk_switch_port_L2P_get(port), pEnable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_phyReg_set
-+ * Description:
-+ *      Set PHY register data of the specific port.
-+ * Input:
-+ *      port    - port id.
-+ *      reg     - Register id
-+ *      regData - Register data
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_PHY_REG_ID       - Invalid PHY address
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      This API can set PHY register data of the specific port.
-+ */
-+rtk_api_ret_t rtk_port_phyReg_set(rtk_port_t port, rtk_port_phy_reg_t reg, rtk_port_phy_data_t regData)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_IS_UTP(port);
-+
-+    if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), reg, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_phyReg_get
-+ * Description:
-+ *      Get PHY register data of the specific port.
-+ * Input:
-+ *      port    - Port id.
-+ *      reg     - Register id
-+ * Output:
-+ *      pData   - Register data
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_PHY_REG_ID       - Invalid PHY address
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      This API can get PHY register data of the specific port.
-+ */
-+rtk_api_ret_t rtk_port_phyReg_get(rtk_port_t port, rtk_port_phy_reg_t reg, rtk_port_phy_data_t *pData)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_IS_UTP(port);
-+
-+    if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), reg, pData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_backpressureEnable_set
-+ * Description:
-+ *      Set the half duplex backpressure enable status of the specific port.
-+ * Input:
-+ *      port    - port id.
-+ *      enable  - Back pressure status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      This API can set the half duplex backpressure enable status of the specific port.
-+ *      The half duplex backpressure enable status of the port is as following:
-+ *      - DISABLE(Defer)
-+ *      - ENABLE (Backpressure)
-+ */
-+rtk_api_ret_t rtk_port_backpressureEnable_set(rtk_port_t port, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (port != RTK_WHOLE_SYSTEM)
-+        return RT_ERR_PORT_ID;
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicPortJamMode(!enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_backpressureEnable_get
-+ * Description:
-+ *      Get the half duplex backpressure enable status of the specific port.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - Back pressure status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API can get the half duplex backpressure enable status of the specific port.
-+ *      The half duplex backpressure enable status of the port is as following:
-+ *      - DISABLE(Defer)
-+ *      - ENABLE (Backpressure)
-+ */
-+rtk_api_ret_t rtk_port_backpressureEnable_get(rtk_port_t port, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (port != RTK_WHOLE_SYSTEM)
-+        return RT_ERR_PORT_ID;
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortJamMode(&regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pEnable = !regData;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_adminEnable_set
-+ * Description:
-+ *      Set port admin configuration of the specific port.
-+ * Input:
-+ *      port    - port id.
-+ *      enable  - Back pressure status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      This API can set port admin configuration of the specific port.
-+ *      The port admin configuration of the port is as following:
-+ *      - DISABLE
-+ *      - ENABLE
-+ */
-+rtk_api_ret_t rtk_port_adminEnable_set(rtk_port_t port, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32      data;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_IS_UTP(port);
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtk_port_phyReg_get(port, PHY_CONTROL_REG, &data)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (ENABLED == enable)
-+    {
-+        data &= 0xF7FF;
-+        data |= 0x0200;
-+    }
-+    else if (DISABLED == enable)
-+    {
-+        data |= 0x0800;
-+    }
-+
-+    if ((retVal = rtk_port_phyReg_set(port, PHY_CONTROL_REG, data)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_adminEnable_get
-+ * Description:
-+ *      Get port admin configurationof the specific port.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - Back pressure status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API can get port admin configuration of the specific port.
-+ *      The port admin configuration of the port is as following:
-+ *      - DISABLE
-+ *      - ENABLE
-+ */
-+rtk_api_ret_t rtk_port_adminEnable_get(rtk_port_t port, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32      data;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_IS_UTP(port);
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtk_port_phyReg_get(port, PHY_CONTROL_REG, &data)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ( (data & 0x0800) == 0x0800)
-+    {
-+        *pEnable = DISABLED;
-+    }
-+    else
-+    {
-+        *pEnable = ENABLED;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_isolation_set
-+ * Description:
-+ *      Set permitted port isolation portmask
-+ * Input:
-+ *      port         - port id.
-+ *      pPortmask    - Permit port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_PORT_MASK    - Invalid portmask.
-+ * Note:
-+ *      This API set the port mask that a port can trasmit packet to of each port
-+ *      A port can only transmit packet to ports included in permitted portmask
-+ */
-+rtk_api_ret_t rtk_port_isolation_set(rtk_port_t port, rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pPortmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* check port mask */
-+    RTK_CHK_PORTMASK_VALID(pPortmask);
-+
-+    if ((retVal = rtk_switch_portmask_L2P_get(pPortmask, &pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicPortIsolationPermittedPortmask(rtk_switch_port_L2P_get(port), pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_isolation_get
-+ * Description:
-+ *      Get permitted port isolation portmask
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pPortmask - Permit port mask
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API get the port mask that a port can trasmit packet to of each port
-+ *      A port can only transmit packet to ports included in permitted portmask
-+ */
-+rtk_api_ret_t rtk_port_isolation_get(rtk_port_t port, rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pPortmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortIsolationPermittedPortmask(rtk_switch_port_L2P_get(port), &pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtk_switch_portmask_P2L_get(pmask, pPortmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_rgmiiDelayExt_set
-+ * Description:
-+ *      Set RGMII interface delay value for TX and RX.
-+ * Input:
-+ *      txDelay - TX delay value, 1 for delay 2ns and 0 for no-delay
-+ *      rxDelay - RX delay value, 0~7 for delay setup.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can set external interface 2 RGMII delay.
-+ *      In TX delay, there are 2 selection: no-delay and 2ns delay.
-+ *      In RX dekay, there are 8 steps for delay tunning. 0 for no-delay, and 7 for maximum delay.
-+ */
-+rtk_api_ret_t rtk_port_rgmiiDelayExt_set(rtk_port_t port, rtk_data_t txDelay, rtk_data_t rxDelay)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 regAddr, regData;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_IS_EXT(port);
-+
-+    if ((txDelay > 1) || (rxDelay > 7))
-+        return RT_ERR_INPUT;
-+
-+    if(port == EXT_PORT0)
-+        regAddr = RTL8367C_REG_EXT1_RGMXF;
-+    else if(port == EXT_PORT1)
-+        regAddr = RTL8367C_REG_EXT2_RGMXF;
-+    else
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_getAsicReg(regAddr, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    regData = (regData & 0xFFF0) | ((txDelay << 3) & 0x0008) | (rxDelay & 0x0007);
-+
-+    if ((retVal = rtl8367c_setAsicReg(regAddr, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_rgmiiDelayExt_get
-+ * Description:
-+ *      Get RGMII interface delay value for TX and RX.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pTxDelay - TX delay value
-+ *      pRxDelay - RX delay value
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can set external interface 2 RGMII delay.
-+ *      In TX delay, there are 2 selection: no-delay and 2ns delay.
-+ *      In RX dekay, there are 8 steps for delay tunning. 0 for n0-delay, and 7 for maximum delay.
-+ */
-+rtk_api_ret_t rtk_port_rgmiiDelayExt_get(rtk_port_t port, rtk_data_t *pTxDelay, rtk_data_t *pRxDelay)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 regAddr, regData;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_IS_EXT(port);
-+
-+    if( (NULL == pTxDelay) || (NULL == pRxDelay) )
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(port == EXT_PORT0)
-+        regAddr = RTL8367C_REG_EXT1_RGMXF;
-+    else if(port == EXT_PORT1)
-+        regAddr = RTL8367C_REG_EXT2_RGMXF;
-+    else
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_getAsicReg(regAddr, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pTxDelay = (regData & 0x0008) >> 3;
-+    *pRxDelay = regData & 0x0007;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_phyEnableAll_set
-+ * Description:
-+ *      Set all PHY enable status.
-+ * Input:
-+ *      enable - PHY Enable State.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      This API can set all PHY status.
-+ *      The configuration of all PHY is as following:
-+ *      - DISABLE
-+ *      - ENABLE
-+ */
-+rtk_api_ret_t rtk_port_phyEnableAll_set(rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 data;
-+    rtk_uint32 port;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_setAsicPortEnableAll(enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    RTK_SCAN_ALL_LOG_PORT(port)
-+    {
-+        if(rtk_switch_isUtpPort(port) == RT_ERR_OK)
-+        {
-+            if ((retVal = rtk_port_phyReg_get(port, PHY_CONTROL_REG, &data)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if (ENABLED == enable)
-+            {
-+                data &= 0xF7FF;
-+                data |= 0x0200;
-+            }
-+            else
-+            {
-+                data |= 0x0800;
-+            }
-+
-+            if ((retVal = rtk_port_phyReg_set(port, PHY_CONTROL_REG, data)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_port_phyEnableAll_get
-+ * Description:
-+ *      Get all PHY enable status.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnable - PHY Enable State.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      This API can set all PHY status.
-+ *      The configuration of all PHY is as following:
-+ *      - DISABLE
-+ *      - ENABLE
-+ */
-+rtk_api_ret_t rtk_port_phyEnableAll_get(rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortEnableAll(pEnable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_efid_set
-+ * Description:
-+ *      Set port-based enhanced filtering database
-+ * Input:
-+ *      port - Port id.
-+ *      efid - Specified enhanced filtering database.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_L2_FID - Invalid fid.
-+ *      RT_ERR_INPUT - Invalid input parameter.
-+ *      RT_ERR_PORT_ID - Invalid port ID.
-+ * Note:
-+ *      The API can set port-based enhanced filtering database.
-+ */
-+rtk_api_ret_t rtk_port_efid_set(rtk_port_t port, rtk_data_t efid)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    /* efid must be 0~7 */
-+    if (efid > RTK_EFID_MAX)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicPortIsolationEfid(rtk_switch_port_L2P_get(port), efid))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_efid_get
-+ * Description:
-+ *      Get port-based enhanced filtering database
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEfid - Specified enhanced filtering database.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT - Invalid input parameters.
-+ *      RT_ERR_PORT_ID - Invalid port ID.
-+ * Note:
-+ *      The API can get port-based enhanced filtering database status.
-+ */
-+rtk_api_ret_t rtk_port_efid_get(rtk_port_t port, rtk_data_t *pEfid)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pEfid)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortIsolationEfid(rtk_switch_port_L2P_get(port), pEfid))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_phyComboPortMedia_set
-+ * Description:
-+ *      Set Combo port media type
-+ * Input:
-+ *      port    - Port id.
-+ *      media   - Media (COPPER or FIBER)
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_PORT_ID          - Invalid port ID.
-+ * Note:
-+ *      The API can Set Combo port media type.
-+ */
-+rtk_api_ret_t rtk_port_phyComboPortMedia_set(rtk_port_t port, rtk_port_media_t media)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint32 idx;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_IS_UTP(port);
-+
-+    /* Check Combo Port ID */
-+    RTK_CHK_PORT_IS_COMBO(port);
-+
-+    if (media >= PORT_MEDIA_END)
-+        return RT_ERR_INPUT;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicReg(0x1300, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0000)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(regData != 0x6367)
-+        return RT_ERR_CHIP_NOT_SUPPORTED;
-+
-+    if(media == PORT_MEDIA_FIBER)
-+    {
-+        /* software init */
-+        if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_CHIP_RESET, RTL8367C_DW8051_RST_OFFSET, 1)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_MISCELLANEOUS_CONFIGURE0, RTL8367C_DW8051_EN_OFFSET, 1)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_ACS_IROM_ENABLE_OFFSET, 1)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_IROM_MSB_OFFSET, 0)) != RT_ERR_OK)
-+            return retVal;
-+
-+        for(idx = 0; idx < FIBER_INIT_SIZE; idx++)
-+        {
-+            if ((retVal = rtl8367c_setAsicReg(0xE000 + idx, (rtk_uint32)Fiber[idx])) != RT_ERR_OK)
-+                return retVal;
-+        }
-+
-+        if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_IROM_MSB_OFFSET, 0)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_ACS_IROM_ENABLE_OFFSET, 0)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_CHIP_RESET, RTL8367C_DW8051_RST_OFFSET, 0)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_UTP_FIB_DET, RTL8367C_UTP_FIRST_OFFSET, 1))!=RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_DW8051_READY_OFFSET, 0)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_phyComboPortMedia_get
-+ * Description:
-+ *      Get Combo port media type
-+ * Input:
-+ *      port    - Port id.
-+ * Output:
-+ *      pMedia  - Media (COPPER or FIBER)
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_PORT_ID          - Invalid port ID.
-+ * Note:
-+ *      The API can Set Combo port media type.
-+ */
-+rtk_api_ret_t rtk_port_phyComboPortMedia_get(rtk_port_t port, rtk_port_media_t *pMedia)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      regData;
-+    rtk_uint32      data;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_IS_UTP(port);
-+
-+    /* Check Combo Port ID */
-+    RTK_CHK_PORT_IS_COMBO(port);
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicReg(0x1300, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0000)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(regData != 0x6367)
-+    {
-+        *pMedia = PORT_MEDIA_COPPER;
-+    }
-+    else
-+    {
-+        if ((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_UTP_FIB_DET, RTL8367C_UTP_FIRST_OFFSET, &data))!=RT_ERR_OK)
-+                return retVal;
-+
-+        if(data == 1)
-+            *pMedia = PORT_MEDIA_COPPER;
-+        else
-+            *pMedia = PORT_MEDIA_FIBER;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_rtctEnable_set
-+ * Description:
-+ *      Enable RTCT test
-+ * Input:
-+ *      pPortmask    - Port mask of RTCT enabled port
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_MASK        - Invalid port mask.
-+ * Note:
-+ *      The API can enable RTCT Test
-+ */
-+rtk_api_ret_t rtk_port_rtctEnable_set(rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Mask Valid */
-+    RTK_CHK_PORTMASK_VALID_ONLY_UTP(pPortmask);
-+
-+    if ((retVal = rtl8367c_setAsicPortRTCTEnable(pPortmask->bits[0]))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_rtctDisable_set
-+ * Description:
-+ *      Disable RTCT test
-+ * Input:
-+ *      pPortmask    - Port mask of RTCT disabled port
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_MASK        - Invalid port mask.
-+ * Note:
-+ *      The API can disable RTCT Test
-+ */
-+rtk_api_ret_t rtk_port_rtctDisable_set(rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Mask Valid */
-+    RTK_CHK_PORTMASK_VALID_ONLY_UTP(pPortmask);
-+
-+    if ((retVal = rtl8367c_setAsicPortRTCTDisable(pPortmask->bits[0]))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_port_rtctResult_get
-+ * Description:
-+ *      Get the result of RTCT test
-+ * Input:
-+ *      port        - Port ID
-+ * Output:
-+ *      pRtctResult - The result of RTCT result
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port ID.
-+ *      RT_ERR_PHY_RTCT_NOT_FINISH  - Testing does not finish.
-+ * Note:
-+ *      The API can get RTCT test result.
-+ *      RTCT test may takes 4.8 seconds to finish its test at most.
-+ *      Thus, if this API return RT_ERR_PHY_RTCT_NOT_FINISH or
-+ *      other error code, the result can not be referenced and
-+ *      user should call this API again until this API returns
-+ *      a RT_ERR_OK.
-+ *      The result is stored at pRtctResult->ge_result
-+ *      pRtctResult->linkType is unused.
-+ *      The unit of channel length is 2.5cm. Ex. 300 means 300 * 2.5 = 750cm = 7.5M
-+ */
-+rtk_api_ret_t rtk_port_rtctResult_get(rtk_port_t port, rtk_rtctResult_t *pRtctResult)
-+{
-+    rtk_api_ret_t               retVal;
-+    rtl8367c_port_rtct_result_t result;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_IS_UTP(port);
-+
-+    memset(pRtctResult, 0x00, sizeof(rtk_rtctResult_t));
-+    if ((retVal = rtl8367c_getAsicPortRTCTResult(port, &result))!=RT_ERR_OK)
-+        return retVal;
-+
-+    pRtctResult->result.ge_result.channelALen = result.channelALen;
-+    pRtctResult->result.ge_result.channelBLen = result.channelBLen;
-+    pRtctResult->result.ge_result.channelCLen = result.channelCLen;
-+    pRtctResult->result.ge_result.channelDLen = result.channelDLen;
-+
-+    pRtctResult->result.ge_result.channelALinedriver = result.channelALinedriver;
-+    pRtctResult->result.ge_result.channelBLinedriver = result.channelBLinedriver;
-+    pRtctResult->result.ge_result.channelCLinedriver = result.channelCLinedriver;
-+    pRtctResult->result.ge_result.channelDLinedriver = result.channelDLinedriver;
-+
-+    pRtctResult->result.ge_result.channelAMismatch = result.channelAMismatch;
-+    pRtctResult->result.ge_result.channelBMismatch = result.channelBMismatch;
-+    pRtctResult->result.ge_result.channelCMismatch = result.channelCMismatch;
-+    pRtctResult->result.ge_result.channelDMismatch = result.channelDMismatch;
-+
-+    pRtctResult->result.ge_result.channelAOpen = result.channelAOpen;
-+    pRtctResult->result.ge_result.channelBOpen = result.channelBOpen;
-+    pRtctResult->result.ge_result.channelCOpen = result.channelCOpen;
-+    pRtctResult->result.ge_result.channelDOpen = result.channelDOpen;
-+
-+    pRtctResult->result.ge_result.channelAShort = result.channelAShort;
-+    pRtctResult->result.ge_result.channelBShort = result.channelBShort;
-+    pRtctResult->result.ge_result.channelCShort = result.channelCShort;
-+    pRtctResult->result.ge_result.channelDShort = result.channelDShort;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_port_sds_reset
-+ * Description:
-+ *      Reset Serdes
-+ * Input:
-+ *      port        - Port ID
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port ID.
-+ * Note:
-+ *      The API can reset Serdes
-+ */
-+rtk_api_ret_t rtk_port_sds_reset(rtk_port_t port)
-+{
-+    rtk_uint32 ext_id;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    if(rtk_switch_isSgmiiPort(port) != RT_ERR_OK)
-+        return RT_ERR_PORT_ID;
-+
-+    ext_id = port - 15;
-+    return rtl8367c_sdsReset(ext_id);
-+}
-+
-+/* Function Name:
-+ *      rtk_port_sgmiiLinkStatus_get
-+ * Description:
-+ *      Get SGMII status
-+ * Input:
-+ *      port        - Port ID
-+ * Output:
-+ *      pSignalDetect   - Signal detect
-+ *      pSync           - Sync
-+ *      pLink           - Link
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port ID.
-+ * Note:
-+ *      The API can reset Serdes
-+ */
-+rtk_api_ret_t rtk_port_sgmiiLinkStatus_get(rtk_port_t port, rtk_data_t *pSignalDetect, rtk_data_t *pSync, rtk_port_linkStatus_t *pLink)
-+{
-+    rtk_uint32 ext_id;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    if(rtk_switch_isSgmiiPort(port) != RT_ERR_OK)
-+        return RT_ERR_PORT_ID;
-+
-+    if(NULL == pSignalDetect)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(NULL == pSync)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(NULL == pLink)
-+        return RT_ERR_NULL_POINTER;
-+
-+    ext_id = port - 15;
-+    return rtl8367c_getSdsLinkStatus(ext_id, (rtk_uint32 *)pSignalDetect, (rtk_uint32 *)pSync, (rtk_uint32 *)pLink);
-+}
-+
-+/* Function Name:
-+ *      rtk_port_sgmiiNway_set
-+ * Description:
-+ *      Configure SGMII/HSGMII port Nway state
-+ * Input:
-+ *      port        - Port ID
-+ *      state       - Nway state
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port ID.
-+ * Note:
-+ *      The API configure SGMII/HSGMII port Nway state
-+ */
-+rtk_api_ret_t rtk_port_sgmiiNway_set(rtk_port_t port, rtk_enable_t state)
-+{
-+    rtk_uint32 ext_id;
-+
-+     /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    if(rtk_switch_isSgmiiPort(port) != RT_ERR_OK)
-+        return RT_ERR_PORT_ID;
-+
-+    if(state >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    ext_id = port - 15;
-+    return rtl8367c_setSgmiiNway(ext_id, (rtk_uint32)state);
-+}
-+
-+/* Function Name:
-+ *      rtk_port_sgmiiNway_get
-+ * Description:
-+ *      Get SGMII/HSGMII port Nway state
-+ * Input:
-+ *      port        - Port ID
-+ * Output:
-+ *      pState      - Nway state
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port ID.
-+ * Note:
-+ *      The API can get SGMII/HSGMII port Nway state
-+ */
-+rtk_api_ret_t rtk_port_sgmiiNway_get(rtk_port_t port, rtk_enable_t *pState)
-+{
-+    rtk_uint32 ext_id;
-+
-+     /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    if(rtk_switch_isSgmiiPort(port) != RT_ERR_OK)
-+        return RT_ERR_PORT_ID;
-+
-+    if(NULL == pState)
-+        return RT_ERR_NULL_POINTER;
-+
-+    ext_id = port - 15;
-+    return rtl8367c_getSgmiiNway(ext_id, (rtk_uint32 *)pState);
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/ptp.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/ptp.c
-new file mode 100644
-index 0000000000..40962a0e69
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/ptp.c
-@@ -0,0 +1,759 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 39583 $
-+ * $Date: 2013-05-20 16:59:23 +0800 (星期一, 20 五月 2013) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in time module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <ptp.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_eav.h>
-+
-+/* Function Name:
-+ *      rtk_ptp_init
-+ * Description:
-+ *      PTP function initialization.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API is used to initialize PTP status.
-+ */
-+rtk_api_ret_t rtk_ptp_init(void)
-+{
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_ptp_mac_set
-+ * Description:
-+ *      Configure PTP mac address.
-+ * Input:
-+ *      mac - mac address to parser PTP packets.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_ptp_mac_set(rtk_mac_t mac)
-+{
-+    rtk_api_ret_t retVal;
-+    ether_addr_t sw_mac;
-+
-+    memcpy(sw_mac.octet, mac.octet, ETHER_ADDR_LEN);
-+
-+    if((retVal=rtl8367c_setAsicEavMacAddress(sw_mac))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_ptp_mac_get
-+ * Description:
-+ *      Get PTP mac address.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pMac - mac address to parser PTP packets.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_ptp_mac_get(rtk_mac_t *pMac)
-+{
-+    rtk_api_ret_t retVal;
-+    ether_addr_t sw_mac;
-+
-+    if((retVal=rtl8367c_getAsicEavMacAddress(&sw_mac))!=RT_ERR_OK)
-+        return retVal;
-+
-+    memcpy(pMac->octet, sw_mac.octet, ETHER_ADDR_LEN);
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_ptp_tpid_set
-+ * Description:
-+ *      Configure PTP accepted outer & inner tag TPID.
-+ * Input:
-+ *      outerId - Ether type of S-tag frame parsing in PTP ports.
-+ *      innerId - Ether type of C-tag frame parsing in PTP ports.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_ptp_tpid_set(rtk_ptp_tpid_t outerId, rtk_ptp_tpid_t innerId)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((outerId>RTK_MAX_NUM_OF_TPID) ||(innerId>RTK_MAX_NUM_OF_TPID))
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicEavTpid(outerId, innerId)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_ptp_tpid_get
-+ * Description:
-+ *      Get PTP accepted outer & inner tag TPID.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pOuterId - Ether type of S-tag frame parsing in PTP ports.
-+ *      pInnerId - Ether type of C-tag frame parsing in PTP ports.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_ptp_tpid_get(rtk_ptp_tpid_t *pOuterId, rtk_ptp_tpid_t *pInnerId)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((retVal = rtl8367c_getAsicEavTpid(pOuterId, pInnerId)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_ptp_refTime_set
-+ * Description:
-+ *      Set the reference time of the specified device.
-+ * Input:
-+ *      timeStamp - reference timestamp value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT    - invalid input parameter
-+ * Applicable:
-+ *      8390, 8380
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_ptp_refTime_set(rtk_ptp_timeStamp_t timeStamp)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (timeStamp.nsec > RTK_MAX_NUM_OF_NANO_SECOND)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicEavSysTime(timeStamp.sec, timeStamp.nsec))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_ptp_refTime_get
-+ * Description:
-+ *      Get the reference time of the specified device.
-+ * Input:
-+ * Output:
-+ *      pTimeStamp - pointer buffer of the reference time
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_UNIT_ID      - invalid unit id
-+ *      RT_ERR_NOT_INIT     - The module is not initial
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Applicable:
-+ *      8390, 8380
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_ptp_refTime_get(rtk_ptp_timeStamp_t *pTimeStamp)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((retVal = rtl8367c_getAsicEavSysTime(&pTimeStamp->sec, &pTimeStamp->nsec))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_ptp_refTimeAdjust_set
-+ * Description:
-+ *      Adjust the reference time.
-+ * Input:
-+ *      unit      - unit id
-+ *      sign      - significant
-+ *      timeStamp - reference timestamp value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_UNIT_ID  - invalid unit id
-+ *      RT_ERR_NOT_INIT - The module is not initial
-+ *      RT_ERR_INPUT    - invalid input parameter
-+ * Note:
-+ *      sign=0 for positive adjustment, sign=1 for negative adjustment.
-+ */
-+rtk_api_ret_t rtk_ptp_refTimeAdjust_set(rtk_ptp_sys_adjust_t sign, rtk_ptp_timeStamp_t timeStamp)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (timeStamp.nsec > RTK_MAX_NUM_OF_NANO_SECOND)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicEavSysTimeAdjust(sign, timeStamp.sec, timeStamp.nsec))!=RT_ERR_OK)
-+        return retVal;
-+
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_ptp_refTimeEnable_set
-+ * Description:
-+ *      Set the enable state of reference time of the specified device.
-+ * Input:
-+ *      enable - status
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT    - invalid input parameter
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_ptp_refTimeEnable_set(rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_setAsicEavSysTimeCtrl(enable))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_ptp_refTimeEnable_get
-+ * Description:
-+ *      Get the enable state of reference time of the specified device.
-+ * Input:
-+ * Output:
-+ *      pEnable - status
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_UNIT_ID      - invalid unit id
-+ *      RT_ERR_NOT_INIT     - The module is not initial
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Applicable:
-+ *      8390, 8380
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_ptp_refTimeEnable_get(rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((retVal = rtl8367c_getAsicEavSysTimeCtrl(pEnable))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_ptp_portEnable_set
-+ * Description:
-+ *      Set PTP status of the specified port.
-+ * Input:
-+ *      port   - port id
-+ *      enable - status
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT     - invalid port id
-+ *      RT_ERR_INPUT    - invalid input parameter
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_ptp_portEnable_set(rtk_port_t port, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port is PTP port */
-+    RTK_CHK_PORT_IS_PTP(port);
-+
-+    if (enable>=RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicEavPortEnable(rtk_switch_port_L2P_get(port), enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_ptp_portEnable_get
-+ * Description:
-+ *      Get PTP status of the specified port.
-+ * Input:
-+ *      port    - port id
-+ * Output:
-+ *      pEnable - status
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT         - invalid port id
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_ptp_portEnable_get(rtk_port_t port, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port is PTP port */
-+    RTK_CHK_PORT_IS_PTP(port);
-+
-+    if ((retVal = rtl8367c_getAsicEavPortEnable(rtk_switch_port_L2P_get(port), pEnable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_ptp_portTimestamp_get
-+ * Description:
-+ *      Get PTP timstamp according to the PTP identifier on the dedicated port from the specified device.
-+ * Input:
-+ *      unit       - unit id
-+ *      port       - port id
-+ *      type       - PTP message type
-+ * Output:
-+ *      pInfo      - pointer buffer of sequence ID and timestamp
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID      - invalid port id
-+ *      RT_ERR_INPUT        - invalid input parameter
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Applicable:
-+ *      8390, 8380
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_ptp_portTimestamp_get( rtk_port_t port, rtk_ptp_msgType_t type, rtk_ptp_info_t *pInfo)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_ptp_time_stamp_t time;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port is PTP port */
-+    RTK_CHK_PORT_IS_PTP(port);
-+
-+    if ((retVal = rtl8367c_getAsicEavPortTimeStamp(rtk_switch_port_L2P_get(port), type, &time)) != RT_ERR_OK)
-+        return retVal;
-+
-+    pInfo->sequenceId = time.sequence_id;
-+    pInfo->timeStamp.sec = time.second;
-+    pInfo->timeStamp.nsec = time.nano_second;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_ptp_intControl_set
-+ * Description:
-+ *      Set PTP interrupt trigger status configuration.
-+ * Input:
-+ *      type - Interrupt type.
-+ *      enable - Interrupt status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      The API can set PTP interrupt status configuration.
-+ *      The interrupt trigger status is shown in the following:
-+ *          PTP_INT_TYPE_TX_SYNC = 0,
-+ *          PTP_INT_TYPE_TX_DELAY_REQ,
-+ *          PTP_INT_TYPE_TX_PDELAY_REQ,
-+ *          PTP_INT_TYPE_TX_PDELAY_RESP,
-+ *          PTP_INT_TYPE_RX_SYNC,
-+ *          PTP_INT_TYPE_RX_DELAY_REQ,
-+ *          PTP_INT_TYPE_RX_PDELAY_REQ,
-+ *          PTP_INT_TYPE_RX_PDELAY_RESP,
-+ *          PTP_INT_TYPE_ALL,
-+ */
-+rtk_api_ret_t rtk_ptp_intControl_set(rtk_ptp_intType_t type, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 mask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type>=PTP_INT_TYPE_END)
-+        return RT_ERR_INPUT;
-+
-+    if (PTP_INT_TYPE_ALL!=type)
-+    {
-+        if ((retVal = rtl8367c_getAsicEavInterruptMask(&mask)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (ENABLED == enable)
-+            mask = mask | (1<<type);
-+        else if (DISABLED == enable)
-+            mask = mask & ~(1<<type);
-+        else
-+            return RT_ERR_INPUT;
-+
-+        if ((retVal = rtl8367c_setAsicEavInterruptMask(mask)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        if (ENABLED == enable)
-+            mask = RTK_PTP_INTR_MASK;
-+        else if (DISABLED == enable)
-+            mask = 0;
-+        else
-+            return RT_ERR_INPUT;
-+
-+        if ((retVal = rtl8367c_setAsicEavInterruptMask(mask)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_ptp_intControl_get
-+ * Description:
-+ *      Get PTP interrupt trigger status configuration.
-+ * Input:
-+ *      type - Interrupt type.
-+ * Output:
-+ *      pEnable - Interrupt status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get interrupt status configuration.
-+ *      The interrupt trigger status is shown in the following:
-+ *          PTP_INT_TYPE_TX_SYNC = 0,
-+ *          PTP_INT_TYPE_TX_DELAY_REQ,
-+ *          PTP_INT_TYPE_TX_PDELAY_REQ,
-+ *          PTP_INT_TYPE_TX_PDELAY_RESP,
-+ *          PTP_INT_TYPE_RX_SYNC,
-+ *          PTP_INT_TYPE_RX_DELAY_REQ,
-+ *          PTP_INT_TYPE_RX_PDELAY_REQ,
-+ *          PTP_INT_TYPE_RX_PDELAY_RESP,
-+ */
-+rtk_api_ret_t rtk_ptp_intControl_get(rtk_ptp_intType_t type, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 mask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type>=PTP_INT_TYPE_ALL)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_getAsicEavInterruptMask(&mask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (0 == (mask&(1<<type)))
-+        *pEnable=DISABLED;
-+    else
-+        *pEnable=ENABLED;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_ptp_intStatus_get
-+ * Description:
-+ *      Get PTP port interrupt trigger status.
-+ * Input:
-+ *      port           - physical port
-+ * Output:
-+ *      pStatusMask - Interrupt status bit mask.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get interrupt trigger status when interrupt happened.
-+ *      The interrupt trigger status is shown in the following:
-+ *      - PORT 0  INT    (value[0] (Bit0))
-+ *      - PORT 1  INT    (value[0] (Bit1))
-+ *      - PORT 2  INT    (value[0] (Bit2))
-+ *      - PORT 3  INT    (value[0] (Bit3))
-+ *      - PORT 4  INT   (value[0] (Bit4))
-+
-+ *
-+ */
-+rtk_api_ret_t rtk_ptp_intStatus_get(rtk_ptp_intStatus_t *pStatusMask)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pStatusMask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicEavInterruptStatus(pStatusMask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+
-+/* Function Name:
-+ *      rtk_ptp_portIntStatus_set
-+ * Description:
-+ *      Set PTP port interrupt trigger status to clean.
-+ * Input:
-+ *      port           - physical port
-+ *      statusMask - Interrupt status bit mask.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT - Invalid input parameters.
-+ * Note:
-+ *      The API can clean interrupt trigger status when interrupt happened.
-+ *      The interrupt trigger status is shown in the following:
-+ *      - PTP_INT_TYPE_TX_SYNC              (value[0] (Bit0))
-+ *      - PTP_INT_TYPE_TX_DELAY_REQ      (value[0] (Bit1))
-+ *      - PTP_INT_TYPE_TX_PDELAY_REQ    (value[0] (Bit2))
-+ *      - PTP_INT_TYPE_TX_PDELAY_RESP   (value[0] (Bit3))
-+ *      - PTP_INT_TYPE_RX_SYNC              (value[0] (Bit4))
-+ *      - PTP_INT_TYPE_RX_DELAY_REQ      (value[0] (Bit5))
-+ *      - PTP_INT_TYPE_RX_PDELAY_REQ    (value[0] (Bit6))
-+ *      - PTP_INT_TYPE_RX_PDELAY_RESP   (value[0] (Bit7))
-+ *      The status will be cleared after execute this API.
-+ */
-+rtk_api_ret_t rtk_ptp_portIntStatus_set(rtk_port_t port, rtk_ptp_intStatus_t statusMask)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port is PTP port */
-+    RTK_CHK_PORT_IS_PTP(port);
-+
-+    if ((retVal = rtl8367c_setAsicEavPortInterruptStatus(rtk_switch_port_L2P_get(port), statusMask))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_ptp_portIntStatus_get
-+ * Description:
-+ *      Get PTP port interrupt trigger status.
-+ * Input:
-+ *      port           - physical port
-+ * Output:
-+ *      pStatusMask - Interrupt status bit mask.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get interrupt trigger status when interrupt happened.
-+ *      The interrupt trigger status is shown in the following:
-+ *      - PTP_INT_TYPE_TX_SYNC              (value[0] (Bit0))
-+ *      - PTP_INT_TYPE_TX_DELAY_REQ      (value[0] (Bit1))
-+ *      - PTP_INT_TYPE_TX_PDELAY_REQ    (value[0] (Bit2))
-+ *      - PTP_INT_TYPE_TX_PDELAY_RESP   (value[0] (Bit3))
-+ *      - PTP_INT_TYPE_RX_SYNC              (value[0] (Bit4))
-+ *      - PTP_INT_TYPE_RX_DELAY_REQ      (value[0] (Bit5))
-+ *      - PTP_INT_TYPE_RX_PDELAY_REQ    (value[0] (Bit6))
-+ *      - PTP_INT_TYPE_RX_PDELAY_RESP   (value[0] (Bit7))
-+ *
-+ */
-+rtk_api_ret_t rtk_ptp_portIntStatus_get(rtk_port_t port, rtk_ptp_intStatus_t *pStatusMask)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port is PTP port */
-+    RTK_CHK_PORT_IS_PTP(port);
-+
-+    if(NULL == pStatusMask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicEavPortInterruptStatus(rtk_switch_port_L2P_get(port), pStatusMask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_ptp_portPtpTrap_set
-+ * Description:
-+ *      Set PTP packet trap of the specified port.
-+ * Input:
-+ *      port   - port id
-+ *      enable - status
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT     - invalid port id
-+ *      RT_ERR_INPUT    - invalid input parameter
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_ptp_portTrap_set(rtk_port_t port, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (enable>=RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicEavTrap(rtk_switch_port_L2P_get(port), enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_ptp_portPtpEnable_get
-+ * Description:
-+ *      Get PTP packet trap of the specified port.
-+ * Input:
-+ *      port    - port id
-+ * Output:
-+ *      pEnable - status
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT         - invalid port id
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_ptp_portTrap_get(rtk_port_t port, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_getAsicEavTrap(rtk_switch_port_L2P_get(port), pEnable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/qos.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/qos.c
-new file mode 100644
-index 0000000000..70067a3016
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/qos.c
-@@ -0,0 +1,1452 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in QoS module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <qos.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_qos.h>
-+#include <rtl8367c_asicdrv_fc.h>
-+#include <rtl8367c_asicdrv_scheduling.h>
-+
-+/* Function Name:
-+ *      rtk_qos_init
-+ * Description:
-+ *      Configure Qos default settings with queue number assigment to each port.
-+ * Input:
-+ *      queueNum - Queue number of each port.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_QUEUE_NUM    - Invalid queue number.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API will initialize related Qos setting with queue number assigment.
-+ *      The queue number is from 1 to 8.
-+ */
-+rtk_api_ret_t rtk_qos_init(rtk_queue_num_t queueNum)
-+{
-+    CONST_T rtk_uint16 g_prioritytToQid[8][8]= {
-+            {0, 0,0,0,0,0,0,0},
-+            {0, 0,0,0,7,7,7,7},
-+            {0, 0,0,0,1,1,7,7},
-+            {0, 0,1,1,2,2,7,7},
-+            {0, 0,1,1,2,3,7,7},
-+            {0, 0,1,2,3,4,7,7},
-+            {0, 0,1,2,3,4,5,7},
-+            {0,1,2,3,4,5,6,7}
-+    };
-+
-+    CONST_T rtk_uint32 g_priorityDecision[8] = {0x01, 0x80,0x04,0x02,0x20,0x40,0x10,0x08};
-+    CONST_T rtk_uint32 g_prioritytRemap[8] = {0,1,2,3,4,5,6,7};
-+
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 qmapidx;
-+    rtk_uint32 priority;
-+    rtk_uint32 priDec;
-+    rtk_uint32 port;
-+    rtk_uint32 dscp;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (queueNum <= 0 || queueNum > RTK_MAX_NUM_OF_QUEUE)
-+        return RT_ERR_QUEUE_NUM;
-+
-+    /*Set Output Queue Number*/
-+    if (RTK_MAX_NUM_OF_QUEUE == queueNum)
-+        qmapidx = 0;
-+    else
-+        qmapidx = queueNum;
-+
-+    RTK_SCAN_ALL_PHY_PORTMASK(port)
-+    {
-+        if ((retVal = rtl8367c_setAsicOutputQueueMappingIndex(port, qmapidx)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    /*Set Priority to Qid*/
-+    for (priority = 0; priority <= RTK_PRIMAX; priority++)
-+    {
-+        if ((retVal = rtl8367c_setAsicPriorityToQIDMappingTable(queueNum - 1, priority, g_prioritytToQid[queueNum - 1][priority])) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    /*Set Flow Control Type to Ingress Flow Control*/
-+    if ((retVal = rtl8367c_setAsicFlowControlSelect(FC_INGRESS)) != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    /*Priority Decision Order*/
-+    for (priDec = 0;priDec < PRIDEC_END;priDec++)
-+    {
-+        if ((retVal = rtl8367c_setAsicPriorityDecision(PRIDECTBL_IDX0, priDec, g_priorityDecision[priDec])) != RT_ERR_OK)
-+            return retVal;
-+        if ((retVal = rtl8367c_setAsicPriorityDecision(PRIDECTBL_IDX1, priDec, g_priorityDecision[priDec])) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    /*Set Port-based Priority to 0*/
-+    RTK_SCAN_ALL_PHY_PORTMASK(port)
-+    {
-+        if ((retVal = rtl8367c_setAsicPriorityPortBased(port, 0)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    /*Disable 1p Remarking*/
-+    RTK_SCAN_ALL_PHY_PORTMASK(port)
-+    {
-+        if ((retVal = rtl8367c_setAsicRemarkingDot1pAbility(port, DISABLED)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    /*Disable DSCP Remarking*/
-+    if ((retVal = rtl8367c_setAsicRemarkingDscpAbility(DISABLED)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*Set 1p & DSCP  Priority Remapping & Remarking*/
-+    for (priority = 0; priority <= RTL8367C_PRIMAX; priority++)
-+    {
-+        if ((retVal = rtl8367c_setAsicPriorityDot1qRemapping(priority, g_prioritytRemap[priority])) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicRemarkingDot1pParameter(priority, 0)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_setAsicRemarkingDscpParameter(priority, 0)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    /*Set DSCP Priority*/
-+    for (dscp = 0; dscp <= 63; dscp++)
-+    {
-+        if ((retVal = rtl8367c_setAsicPriorityDscpBased(dscp, 0)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    /* Finetune B/T value */
-+    if((retVal = rtl8367c_setAsicReg(0x1722, 0x1158)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_priSel_set
-+ * Description:
-+ *      Configure the priority order among different priority mechanism.
-+ * Input:
-+ *      index - Priority decision table index (0~1)
-+ *      pPriDec - Priority assign for port, dscp, 802.1p, cvlan, svlan, acl based priority decision.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_QOS_SEL_PRI_SOURCE   - Invalid priority decision source parameter.
-+ * Note:
-+ *      ASIC will follow user priority setting of mechanisms to select mapped queue priority for receiving frame.
-+ *      If two priority mechanisms are the same, the ASIC will chose the highest priority from mechanisms to
-+ *      assign queue priority to receiving frame.
-+ *      The priority sources are:
-+ *      - PRIDEC_PORT
-+ *      - PRIDEC_ACL
-+ *      - PRIDEC_DSCP
-+ *      - PRIDEC_1Q
-+ *      - PRIDEC_1AD
-+ *      - PRIDEC_CVLAN
-+ *      - PRIDEC_DA
-+ *      - PRIDEC_SA
-+ */
-+rtk_api_ret_t rtk_qos_priSel_set(rtk_qos_priDecTbl_t index, rtk_priority_select_t *pPriDec)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 port_pow;
-+    rtk_uint32 dot1q_pow;
-+    rtk_uint32 dscp_pow;
-+    rtk_uint32 acl_pow;
-+    rtk_uint32 svlan_pow;
-+    rtk_uint32 cvlan_pow;
-+    rtk_uint32 smac_pow;
-+    rtk_uint32 dmac_pow;
-+    rtk_uint32 i;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (index < 0 || index >= PRIDECTBL_END)
-+        return RT_ERR_ENTRY_INDEX;
-+
-+    if (pPriDec->port_pri >= 8 || pPriDec->dot1q_pri >= 8 || pPriDec->acl_pri >= 8 || pPriDec->dscp_pri >= 8 ||
-+       pPriDec->cvlan_pri >= 8 || pPriDec->svlan_pri >= 8 || pPriDec->dmac_pri >= 8 || pPriDec->smac_pri >= 8)
-+        return RT_ERR_QOS_SEL_PRI_SOURCE;
-+
-+    port_pow = 1;
-+    for (i = pPriDec->port_pri; i > 0; i--)
-+        port_pow = (port_pow)*2;
-+
-+    dot1q_pow = 1;
-+    for (i = pPriDec->dot1q_pri; i > 0; i--)
-+        dot1q_pow = (dot1q_pow)*2;
-+
-+    acl_pow = 1;
-+    for (i = pPriDec->acl_pri; i > 0; i--)
-+        acl_pow = (acl_pow)*2;
-+
-+    dscp_pow = 1;
-+    for (i = pPriDec->dscp_pri; i > 0; i--)
-+        dscp_pow = (dscp_pow)*2;
-+
-+    svlan_pow = 1;
-+    for (i = pPriDec->svlan_pri; i > 0; i--)
-+        svlan_pow = (svlan_pow)*2;
-+
-+    cvlan_pow = 1;
-+    for (i = pPriDec->cvlan_pri; i > 0; i--)
-+        cvlan_pow = (cvlan_pow)*2;
-+
-+    dmac_pow = 1;
-+    for (i = pPriDec->dmac_pri; i > 0; i--)
-+        dmac_pow = (dmac_pow)*2;
-+
-+    smac_pow = 1;
-+    for (i = pPriDec->smac_pri; i > 0; i--)
-+        smac_pow = (smac_pow)*2;
-+
-+    if ((retVal = rtl8367c_setAsicPriorityDecision(index, PRIDEC_PORT, port_pow)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicPriorityDecision(index, PRIDEC_ACL, acl_pow)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicPriorityDecision(index, PRIDEC_DSCP, dscp_pow)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicPriorityDecision(index, PRIDEC_1Q, dot1q_pow)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicPriorityDecision(index, PRIDEC_1AD, svlan_pow)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicPriorityDecision(index, PRIDEC_CVLAN, cvlan_pow)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicPriorityDecision(index, PRIDEC_DA, dmac_pow)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicPriorityDecision(index, PRIDEC_SA, smac_pow)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_priSel_get
-+ * Description:
-+ *      Get the priority order configuration among different priority mechanism.
-+ * Input:
-+ *      index - Priority decision table index (0~1)
-+ * Output:
-+ *      pPriDec - Priority assign for port, dscp, 802.1p, cvlan, svlan, acl based priority decision .
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      ASIC will follow user priority setting of mechanisms to select mapped queue priority for receiving frame.
-+ *      If two priority mechanisms are the same, the ASIC will chose the highest priority from mechanisms to
-+ *      assign queue priority to receiving frame.
-+ *      The priority sources are:
-+ *      - PRIDEC_PORT,
-+ *      - PRIDEC_ACL,
-+ *      - PRIDEC_DSCP,
-+ *      - PRIDEC_1Q,
-+ *      - PRIDEC_1AD,
-+ *      - PRIDEC_CVLAN,
-+ *      - PRIDEC_DA,
-+ *      - PRIDEC_SA,
-+ */
-+rtk_api_ret_t rtk_qos_priSel_get(rtk_qos_priDecTbl_t index, rtk_priority_select_t *pPriDec)
-+{
-+
-+    rtk_api_ret_t retVal;
-+    rtk_int32 i;
-+    rtk_uint32 port_pow;
-+    rtk_uint32 dot1q_pow;
-+    rtk_uint32 dscp_pow;
-+    rtk_uint32 acl_pow;
-+    rtk_uint32 svlan_pow;
-+    rtk_uint32 cvlan_pow;
-+    rtk_uint32 smac_pow;
-+    rtk_uint32 dmac_pow;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (index < 0 || index >= PRIDECTBL_END)
-+        return RT_ERR_ENTRY_INDEX;
-+
-+    if ((retVal = rtl8367c_getAsicPriorityDecision(index, PRIDEC_PORT, &port_pow)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicPriorityDecision(index, PRIDEC_ACL, &acl_pow)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicPriorityDecision(index, PRIDEC_DSCP, &dscp_pow)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicPriorityDecision(index, PRIDEC_1Q, &dot1q_pow)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicPriorityDecision(index, PRIDEC_1AD, &svlan_pow)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicPriorityDecision(index, PRIDEC_CVLAN, &cvlan_pow)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicPriorityDecision(index, PRIDEC_DA, &dmac_pow)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicPriorityDecision(index, PRIDEC_SA, &smac_pow)) != RT_ERR_OK)
-+        return retVal;
-+
-+    for (i = 31; i >= 0; i--)
-+    {
-+        if (port_pow & (1 << i))
-+        {
-+            pPriDec->port_pri = i;
-+            break;
-+        }
-+    }
-+
-+    for (i = 31; i >= 0; i--)
-+    {
-+        if (dot1q_pow & (1 << i))
-+        {
-+            pPriDec->dot1q_pri = i;
-+            break;
-+        }
-+    }
-+
-+    for (i = 31; i >= 0; i--)
-+    {
-+        if (acl_pow & (1 << i))
-+        {
-+            pPriDec->acl_pri = i;
-+            break;
-+        }
-+    }
-+
-+    for (i = 31; i >= 0; i--)
-+    {
-+        if (dscp_pow & (1 << i))
-+        {
-+            pPriDec->dscp_pri = i;
-+            break;
-+        }
-+    }
-+
-+    for (i = 31; i >= 0; i--)
-+    {
-+        if (svlan_pow & (1 << i))
-+        {
-+            pPriDec->svlan_pri = i;
-+            break;
-+        }
-+    }
-+
-+    for (i = 31;i  >= 0; i--)
-+    {
-+        if (cvlan_pow & (1 << i))
-+        {
-+            pPriDec->cvlan_pri = i;
-+            break;
-+        }
-+    }
-+
-+    for (i = 31; i >= 0; i--)
-+    {
-+        if (dmac_pow&(1<<i))
-+        {
-+            pPriDec->dmac_pri = i;
-+            break;
-+        }
-+    }
-+
-+    for (i = 31; i >= 0; i--)
-+    {
-+        if (smac_pow & (1 << i))
-+        {
-+            pPriDec->smac_pri = i;
-+            break;
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_1pPriRemap_set
-+ * Description:
-+ *      Configure 1Q priorities mapping to internal absolute priority.
-+ * Input:
-+ *      dot1p_pri   - 802.1p priority value.
-+ *      int_pri     - internal priority value.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_VLAN_PRIORITY    - Invalid 1p priority.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      Priority of 802.1Q assignment for internal asic priority, and it is used for queue usage and packet scheduling.
-+ */
-+rtk_api_ret_t rtk_qos_1pPriRemap_set(rtk_pri_t dot1p_pri, rtk_pri_t int_pri)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (dot1p_pri > RTL8367C_PRIMAX || int_pri > RTL8367C_PRIMAX)
-+        return  RT_ERR_VLAN_PRIORITY;
-+
-+    if ((retVal = rtl8367c_setAsicPriorityDot1qRemapping(dot1p_pri, int_pri)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_1pPriRemap_get
-+ * Description:
-+ *      Get 1Q priorities mapping to internal absolute priority.
-+ * Input:
-+ *      dot1p_pri - 802.1p priority value .
-+ * Output:
-+ *      pInt_pri - internal priority value.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_VLAN_PRIORITY    - Invalid priority.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      Priority of 802.1Q assigment for internal asic priority, and it is uesed for queue usage and packet scheduling.
-+ */
-+rtk_api_ret_t rtk_qos_1pPriRemap_get(rtk_pri_t dot1p_pri, rtk_pri_t *pInt_pri)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (dot1p_pri > RTL8367C_PRIMAX)
-+        return  RT_ERR_QOS_INT_PRIORITY;
-+
-+    if ((retVal = rtl8367c_getAsicPriorityDot1qRemapping(dot1p_pri, pInt_pri)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_dscpPriRemap_set
-+ * Description:
-+ *      Map dscp value to internal priority.
-+ * Input:
-+ *      dscp    - Dscp value of receiving frame
-+ *      int_pri - internal priority value .
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_QOS_DSCP_VALUE   - Invalid DSCP value.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      The Differentiated Service Code Point is a selector for router's per-hop behaviors. As a selector, there is no implication that a numerically
-+ *      greater DSCP implies a better network service. As can be seen, the DSCP totally overlaps the old precedence field of TOS. So if values of
-+ *      DSCP are carefully chosen then backward compatibility can be achieved.
-+ */
-+rtk_api_ret_t rtk_qos_dscpPriRemap_set(rtk_dscp_t dscp, rtk_pri_t int_pri)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (int_pri > RTL8367C_PRIMAX )
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    if (dscp > RTL8367C_DSCPMAX)
-+        return RT_ERR_QOS_DSCP_VALUE;
-+
-+    if ((retVal = rtl8367c_setAsicPriorityDscpBased(dscp, int_pri)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_dscpPriRemap_get
-+ * Description:
-+ *      Get dscp value to internal priority.
-+ * Input:
-+ *      dscp - Dscp value of receiving frame
-+ * Output:
-+ *      pInt_pri - internal priority value.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_DSCP_VALUE   - Invalid DSCP value.
-+ * Note:
-+ *      The Differentiated Service Code Point is a selector for router's per-hop behaviors. As a selector, there is no implication that a numerically
-+ *      greater DSCP implies a better network service. As can be seen, the DSCP totally overlaps the old precedence field of TOS. So if values of
-+ *      DSCP are carefully chosen then backward compatibility can be achieved.
-+ */
-+rtk_api_ret_t rtk_qos_dscpPriRemap_get(rtk_dscp_t dscp, rtk_pri_t *pInt_pri)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (dscp > RTL8367C_DSCPMAX)
-+        return RT_ERR_QOS_DSCP_VALUE;
-+
-+    if ((retVal = rtl8367c_getAsicPriorityDscpBased(dscp, pInt_pri)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_portPri_set
-+ * Description:
-+ *      Configure priority usage to each port.
-+ * Input:
-+ *      port - Port id.
-+ *      int_pri - internal priority value.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_QOS_SEL_PORT_PRI - Invalid port priority.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      The API can set priority of port assignments for queue usage and packet scheduling.
-+ */
-+rtk_api_ret_t rtk_qos_portPri_set(rtk_port_t port, rtk_pri_t int_pri)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (int_pri > RTL8367C_PRIMAX )
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    if ((retVal = rtl8367c_setAsicPriorityPortBased(rtk_switch_port_L2P_get(port), int_pri)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_portPri_get
-+ * Description:
-+ *      Get priority usage to each port.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pInt_pri - internal priority value.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get priority of port assignments for queue usage and packet scheduling.
-+ */
-+rtk_api_ret_t rtk_qos_portPri_get(rtk_port_t port, rtk_pri_t *pInt_pri)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_getAsicPriorityPortBased(rtk_switch_port_L2P_get(port), pInt_pri)) != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_queueNum_set
-+ * Description:
-+ *      Set output queue number for each port.
-+ * Input:
-+ *      port    - Port id.
-+ *      index   - Mapping queue number (1~8)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_QUEUE_NUM    - Invalid queue number.
-+ * Note:
-+ *      The API can set the output queue number of the specified port. The queue number is from 1 to 8.
-+ */
-+rtk_api_ret_t rtk_qos_queueNum_set(rtk_port_t port, rtk_queue_num_t queue_num)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((0 == queue_num) || (queue_num > RTK_MAX_NUM_OF_QUEUE))
-+        return RT_ERR_FAILED;
-+
-+    if (RTK_MAX_NUM_OF_QUEUE == queue_num)
-+        queue_num = 0;
-+
-+    if ((retVal = rtl8367c_setAsicOutputQueueMappingIndex(rtk_switch_port_L2P_get(port), queue_num)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_queueNum_get
-+ * Description:
-+ *      Get output queue number.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pQueue_num - Mapping queue number
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API will return the output queue number of the specified port. The queue number is from 1 to 8.
-+ */
-+rtk_api_ret_t rtk_qos_queueNum_get(rtk_port_t port, rtk_queue_num_t *pQueue_num)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 qidx;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_getAsicOutputQueueMappingIndex(rtk_switch_port_L2P_get(port), &qidx)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (0 == qidx)
-+        *pQueue_num = 8;
-+    else
-+        *pQueue_num = qidx;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_priMap_set
-+ * Description:
-+ *      Set output queue number for each port.
-+ * Input:
-+ *      queue_num   - Queue number usage.
-+ *      pPri2qid    - Priority mapping to queue ID.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_QUEUE_NUM        - Invalid queue number.
-+ *      RT_ERR_QUEUE_ID         - Invalid queue id.
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      ASIC supports priority mapping to queue with different queue number from 1 to 8.
-+ *      For different queue numbers usage, ASIC supports different internal available queue IDs.
-+ */
-+rtk_api_ret_t rtk_qos_priMap_set(rtk_queue_num_t queue_num, rtk_qos_pri2queue_t *pPri2qid)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pri;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((0 == queue_num) || (queue_num > RTK_MAX_NUM_OF_QUEUE))
-+        return RT_ERR_QUEUE_NUM;
-+
-+    for (pri = 0; pri <= RTK_PRIMAX; pri++)
-+    {
-+        if (pPri2qid->pri2queue[pri] > RTK_QIDMAX)
-+            return RT_ERR_QUEUE_ID;
-+
-+        if ((retVal = rtl8367c_setAsicPriorityToQIDMappingTable(queue_num - 1, pri, pPri2qid->pri2queue[pri])) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_priMap_get
-+ * Description:
-+ *      Get priority to queue ID mapping table parameters.
-+ * Input:
-+ *      queue_num - Queue number usage.
-+ * Output:
-+ *      pPri2qid - Priority mapping to queue ID.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_QUEUE_NUM    - Invalid queue number.
-+ * Note:
-+ *      The API can return the mapping queue id of the specified priority and queue number.
-+ *      The queue number is from 1 to 8.
-+ */
-+rtk_api_ret_t rtk_qos_priMap_get(rtk_queue_num_t queue_num, rtk_qos_pri2queue_t *pPri2qid)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pri;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((0 == queue_num) || (queue_num > RTK_MAX_NUM_OF_QUEUE))
-+        return RT_ERR_QUEUE_NUM;
-+
-+    for (pri = 0; pri <= RTK_PRIMAX; pri++)
-+    {
-+        if ((retVal = rtl8367c_getAsicPriorityToQIDMappingTable(queue_num-1, pri, &pPri2qid->pri2queue[pri])) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_schedulingQueue_set
-+ * Description:
-+ *      Set weight and type of queues in dedicated port.
-+ * Input:
-+ *      port        - Port id.
-+ *      pQweights   - The array of weights for WRR/WFQ queue (0 for STRICT_PRIORITY queue).
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_QOS_QUEUE_WEIGHT - Invalid queue weight.
-+ * Note:
-+ *      The API can set weight and type, strict priority or weight fair queue (WFQ) for
-+ *      dedicated port for using queues. If queue id is not included in queue usage,
-+ *      then its type and weight setting in dummy for setting. There are priorities
-+ *      as queue id in strict queues. It means strict queue id 5 carrying higher priority
-+ *      than strict queue id 4. The WFQ queue weight is from 1 to 127, and weight 0 is
-+ *      for strict priority queue type.
-+ */
-+rtk_api_ret_t rtk_qos_schedulingQueue_set(rtk_port_t port, rtk_qos_queue_weights_t *pQweights)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 qid;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    for (qid = 0; qid < RTL8367C_QUEUENO; qid ++)
-+    {
-+
-+        if (pQweights->weights[qid] > QOS_WEIGHT_MAX)
-+            return RT_ERR_QOS_QUEUE_WEIGHT;
-+
-+        if (0 == pQweights->weights[qid])
-+        {
-+            if ((retVal = rtl8367c_setAsicQueueType(rtk_switch_port_L2P_get(port), qid, QTYPE_STRICT)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+        else
-+        {
-+            if ((retVal = rtl8367c_setAsicQueueType(rtk_switch_port_L2P_get(port), qid, QTYPE_WFQ)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if ((retVal = rtl8367c_setAsicWFQWeight(rtk_switch_port_L2P_get(port),qid, pQweights->weights[qid])) != RT_ERR_OK)
-+                return retVal;
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_schedulingQueue_get
-+ * Description:
-+ *      Get weight and type of queues in dedicated port.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pQweights - The array of weights for WRR/WFQ queue (0 for STRICT_PRIORITY queue).
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get weight and type, strict priority or weight fair queue (WFQ) for dedicated port for using queues.
-+ *      The WFQ queue weight is from 1 to 127, and weight 0 is for strict priority queue type.
-+ */
-+rtk_api_ret_t rtk_qos_schedulingQueue_get(rtk_port_t port, rtk_qos_queue_weights_t *pQweights)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 qid,qtype,qweight;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    for (qid = 0; qid < RTL8367C_QUEUENO; qid++)
-+    {
-+        if ((retVal = rtl8367c_getAsicQueueType(rtk_switch_port_L2P_get(port), qid, &qtype)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (QTYPE_STRICT == qtype)
-+        {
-+            pQweights->weights[qid] = 0;
-+        }
-+        else if (QTYPE_WFQ == qtype)
-+        {
-+            if ((retVal = rtl8367c_getAsicWFQWeight(rtk_switch_port_L2P_get(port), qid, &qweight)) != RT_ERR_OK)
-+                return retVal;
-+            pQweights->weights[qid] = qweight;
-+        }
-+    }
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_1pRemarkEnable_set
-+ * Description:
-+ *      Set 1p Remarking state
-+ * Input:
-+ *      port        - Port id.
-+ *      enable      - State of per-port 1p Remarking
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_ENABLE       - Invalid enable parameter.
-+ * Note:
-+ *      The API can enable or disable 802.1p remarking ability for whole system.
-+ *      The status of 802.1p remark:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+rtk_api_ret_t rtk_qos_1pRemarkEnable_set(rtk_port_t port, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicRemarkingDot1pAbility(rtk_switch_port_L2P_get(port), enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_1pRemarkEnable_get
-+ * Description:
-+ *      Get 802.1p remarking ability.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - Status of 802.1p remark.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get 802.1p remarking ability.
-+ *      The status of 802.1p remark:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+rtk_api_ret_t rtk_qos_1pRemarkEnable_get(rtk_port_t port, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_getAsicRemarkingDot1pAbility(rtk_switch_port_L2P_get(port), pEnable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_1pRemark_set
-+ * Description:
-+ *      Set 802.1p remarking parameter.
-+ * Input:
-+ *      int_pri     - Internal priority value.
-+ *      dot1p_pri   - 802.1p priority value.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_VLAN_PRIORITY    - Invalid 1p priority.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      The API can set 802.1p parameters source priority and new priority.
-+ */
-+rtk_api_ret_t rtk_qos_1pRemark_set(rtk_pri_t int_pri, rtk_pri_t dot1p_pri)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (int_pri > RTL8367C_PRIMAX )
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    if (dot1p_pri > RTL8367C_PRIMAX)
-+        return RT_ERR_VLAN_PRIORITY;
-+
-+    if ((retVal = rtl8367c_setAsicRemarkingDot1pParameter(int_pri, dot1p_pri)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_1pRemark_get
-+ * Description:
-+ *      Get 802.1p remarking parameter.
-+ * Input:
-+ *      int_pri - Internal priority value.
-+ * Output:
-+ *      pDot1p_pri - 802.1p priority value.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      The API can get 802.1p remarking parameters. It would return new priority of ingress priority.
-+ */
-+rtk_api_ret_t rtk_qos_1pRemark_get(rtk_pri_t int_pri, rtk_pri_t *pDot1p_pri)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (int_pri > RTL8367C_PRIMAX )
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    if ((retVal = rtl8367c_getAsicRemarkingDot1pParameter(int_pri, pDot1p_pri)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_1pRemarkSrcSel_set
-+ * Description:
-+ *      Set remarking source of 802.1p remarking.
-+ * Input:
-+ *      type      - remarking source
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT         - The module is not initial
-+ *      RT_ERR_PORT_ID  - invalid port id
-+ *      RT_ERR_INPUT            - invalid input parameter
-+
-+ * Note:
-+ *      The API can configure 802.1p remark functionality to map original 802.1p value or internal
-+ *      priority to TX DSCP value.
-+ */
-+rtk_api_ret_t rtk_qos_1pRemarkSrcSel_set(rtk_qos_1pRmkSrc_t type)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type >= DOT1P_RMK_SRC_END )
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    if ((retVal = rtl8367c_setAsicRemarkingDot1pSrc(type)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_1pRemarkSrcSel_get
-+ * Description:
-+ *      Get remarking source of 802.1p remarking.
-+ * Input:
-+ *      none
-+ * Output:
-+ *      pType      - remarking source
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT         - The module is not initial
-+ *      RT_ERR_PORT_ID          - invalid port id
-+ *      RT_ERR_INPUT            - invalid input parameter
-+ *      RT_ERR_NULL_POINTER     - input parameter may be null pointer
-+
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_qos_1pRemarkSrcSel_get(rtk_qos_1pRmkSrc_t *pType)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((retVal = rtl8367c_getAsicRemarkingDot1pSrc(pType)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_qos_dscpRemarkEnable_set
-+ * Description:
-+ *      Set DSCP remarking ability.
-+ * Input:
-+ *      port    - Port id.
-+ *      enable  - status of DSCP remark.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ *      RT_ERR_ENABLE           - Invalid enable parameter.
-+ * Note:
-+ *      The API can enable or disable DSCP remarking ability for whole system.
-+ *      The status of DSCP remark:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+rtk_api_ret_t rtk_qos_dscpRemarkEnable_set(rtk_port_t port, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /*for whole system function, the port value should be 0xFF*/
-+    if (port != RTK_WHOLE_SYSTEM)
-+        return RT_ERR_PORT_ID;
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicRemarkingDscpAbility(enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_dscpRemarkEnable_get
-+ * Description:
-+ *      Get DSCP remarking ability.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - status of DSCP remarking.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get DSCP remarking ability.
-+ *      The status of DSCP remark:
-+ *      - DISABLED
-+ *      - ENABLED
-+ */
-+rtk_api_ret_t rtk_qos_dscpRemarkEnable_get(rtk_port_t port, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /*for whole system function, the port value should be 0xFF*/
-+    if (port != RTK_WHOLE_SYSTEM)
-+        return RT_ERR_PORT_ID;
-+
-+    if ((retVal = rtl8367c_getAsicRemarkingDscpAbility(pEnable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_dscpRemark_set
-+ * Description:
-+ *      Set DSCP remarking parameter.
-+ * Input:
-+ *      int_pri - Internal priority value.
-+ *      dscp    - DSCP value.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ *      RT_ERR_QOS_DSCP_VALUE   - Invalid DSCP value.
-+ * Note:
-+ *      The API can set DSCP value and mapping priority.
-+ */
-+rtk_api_ret_t rtk_qos_dscpRemark_set(rtk_pri_t int_pri, rtk_dscp_t dscp)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (int_pri > RTK_PRIMAX )
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    if (dscp > RTK_DSCPMAX)
-+        return RT_ERR_QOS_DSCP_VALUE;
-+
-+    if ((retVal = rtl8367c_setAsicRemarkingDscpParameter(int_pri, dscp)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_qos_dscpRemark_get
-+ * Description:
-+ *      Get DSCP remarking parameter.
-+ * Input:
-+ *      int_pri - Internal priority value.
-+ * Output:
-+ *      Dscp - DSCP value.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority.
-+ * Note:
-+ *      The API can get DSCP parameters. It would return DSCP value for mapping priority.
-+ */
-+rtk_api_ret_t rtk_qos_dscpRemark_get(rtk_pri_t int_pri, rtk_dscp_t *pDscp)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (int_pri > RTK_PRIMAX )
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    if ((retVal = rtl8367c_getAsicRemarkingDscpParameter(int_pri, pDscp)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_dscpRemarkSrcSel_set
-+ * Description:
-+ *      Set remarking source of DSCP remarking.
-+ * Input:
-+ *      type      - remarking source
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT         - The module is not initial
-+ *      RT_ERR_PORT_ID  - invalid port id
-+ *      RT_ERR_INPUT            - invalid input parameter
-+
-+ * Note:
-+ *      The API can configure DSCP remark functionality to map original DSCP value or internal
-+ *      priority to TX DSCP value.
-+ */
-+rtk_api_ret_t rtk_qos_dscpRemarkSrcSel_set(rtk_qos_dscpRmkSrc_t type)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type >= DSCP_RMK_SRC_END )
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    if ((retVal = rtl8367c_setAsicRemarkingDscpSrc(type)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_dcpRemarkSrcSel_get
-+ * Description:
-+ *      Get remarking source of DSCP remarking.
-+ * Input:
-+ *      none
-+ * Output:
-+ *      pType      - remarking source
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT         - The module is not initial
-+ *      RT_ERR_PORT_ID          - invalid port id
-+ *      RT_ERR_INPUT            - invalid input parameter
-+ *      RT_ERR_NULL_POINTER     - input parameter may be null pointer
-+
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_qos_dscpRemarkSrcSel_get(rtk_qos_dscpRmkSrc_t *pType)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((retVal = rtl8367c_getAsicRemarkingDscpSrc(pType)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_dscpRemark2Dscp_set
-+ * Description:
-+ *      Set DSCP to remarked DSCP mapping.
-+ * Input:
-+ *      dscp    - DSCP value
-+ *      rmkDscp - remarked DSCP value
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_QOS_DSCP_VALUE   - Invalid dscp value
-+ * Note:
-+ *      dscp parameter can be DSCP value or internal priority according to configuration of API
-+ *      dal_apollomp_qos_dscpRemarkSrcSel_set(), because DSCP remark functionality can map original DSCP
-+ *      value or internal priority to TX DSCP value.
-+ */
-+rtk_api_ret_t rtk_qos_dscpRemark2Dscp_set(rtk_dscp_t dscp, rtk_dscp_t rmkDscp)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((dscp > RTK_DSCPMAX) || (rmkDscp > RTK_DSCPMAX))
-+        return RT_ERR_QOS_DSCP_VALUE;
-+
-+    if ((retVal = rtl8367c_setAsicRemarkingDscp2Dscp(dscp, rmkDscp)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_dscpRemark2Dscp_get
-+ * Description:
-+ *      Get DSCP to remarked DSCP mapping.
-+ * Input:
-+ *      dscp    - DSCP value
-+ * Output:
-+ *      pDscp   - remarked DSCP value
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_QOS_DSCP_VALUE   - Invalid dscp value
-+ *      RT_ERR_NULL_POINTER     - NULL pointer
-+ * Note:
-+ *      None.
-+ */
-+rtk_api_ret_t rtk_qos_dscpRemark2Dscp_get(rtk_dscp_t dscp, rtk_dscp_t *pDscp)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (dscp > RTK_DSCPMAX)
-+        return RT_ERR_QOS_DSCP_VALUE;
-+
-+    if ((retVal = rtl8367c_getAsicRemarkingDscp2Dscp(dscp, pDscp)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_portPriSelIndex_set
-+ * Description:
-+ *      Configure priority decision index to each port.
-+ * Input:
-+ *      port - Port id.
-+ *      index - priority decision index.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_ENTRY_INDEX - Invalid entry index.
-+ * Note:
-+ *      The API can set priority of port assignments for queue usage and packet scheduling.
-+ */
-+rtk_api_ret_t rtk_qos_portPriSelIndex_set(rtk_port_t port, rtk_qos_priDecTbl_t index)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (index >= PRIDECTBL_END )
-+        return RT_ERR_ENTRY_INDEX;
-+
-+    if ((retVal = rtl8367c_setAsicPortPriorityDecisionIndex(rtk_switch_port_L2P_get(port), index)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_qos_portPriSelIndex_get
-+ * Description:
-+ *      Get priority decision index from each port.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pIndex - priority decision index.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get priority of port assignments for queue usage and packet scheduling.
-+ */
-+rtk_api_ret_t rtk_qos_portPriSelIndex_get(rtk_port_t port, rtk_qos_priDecTbl_t *pIndex)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_getAsicPortPriorityDecisionIndex(rtk_switch_port_L2P_get(port), pIndex)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rate.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rate.c
-new file mode 100644
-index 0000000000..a077e0c5cc
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rate.c
-@@ -0,0 +1,607 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in rate module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <rate.h>
-+#include <qos.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_meter.h>
-+#include <rtl8367c_asicdrv_inbwctrl.h>
-+#include <rtl8367c_asicdrv_scheduling.h>
-+
-+/* Function Name:
-+ *      rtk_rate_shareMeter_set
-+ * Description:
-+ *      Set meter configuration
-+ * Input:
-+ *      index       - shared meter index
-+ *      type        - shared meter type
-+ *      rate        - rate of share meter
-+ *      ifg_include - include IFG or not, ENABLE:include DISABLE:exclude
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ *      RT_ERR_RATE             - Invalid rate
-+ *      RT_ERR_INPUT            - Invalid input parameters
-+ * Note:
-+ *      The API can set shared meter rate and ifg include for each meter.
-+ *      The rate unit is 1 kbps and the range is from 8k to 1048568k if type is METER_TYPE_KBPS and
-+ *      the granularity of rate is 8 kbps.
-+ *      The rate unit is packets per second and the range is 1 ~ 0x1FFF if type is METER_TYPE_PPS.
-+ *      The ifg_include parameter is used
-+ *      for rate calculation with/without inter-frame-gap and preamble.
-+ */
-+rtk_api_ret_t rtk_rate_shareMeter_set(rtk_meter_id_t index, rtk_meter_type_t type, rtk_rate_t rate, rtk_enable_t ifg_include)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (index > RTK_MAX_METER_ID)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    if (type >= METER_TYPE_END)
-+        return RT_ERR_INPUT;
-+
-+    if (ifg_include >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    switch (type)
-+    {
-+        case METER_TYPE_KBPS:
-+            if (rate > RTL8367C_QOS_RATE_INPUT_MAX_HSG || rate < RTL8367C_QOS_RATE_INPUT_MIN)
-+                return RT_ERR_RATE ;
-+
-+            if ((retVal = rtl8367c_setAsicShareMeter(index, rate >> 3, ifg_include)) != RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case METER_TYPE_PPS:
-+            if (rate > RTL8367C_QOS_PPS_INPUT_MAX || rate < RTL8367C_QOS_PPS_INPUT_MIN)
-+                return RT_ERR_RATE ;
-+
-+            if ((retVal = rtl8367c_setAsicShareMeter(index, rate, ifg_include)) != RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        default:
-+            return RT_ERR_INPUT;
-+    }
-+
-+    /* Set Type */
-+    if ((retVal = rtl8367c_setAsicShareMeterType(index, (rtk_uint32)type)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_shareMeter_get
-+ * Description:
-+ *      Get meter configuration
-+ * Input:
-+ *      index        - shared meter index
-+ * Output:
-+ *      pType        - Meter Type
-+ *      pRate        - pointer of rate of share meter
-+ *      pIfg_include - include IFG or not, ENABLE:include DISABLE:exclude
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_rate_shareMeter_get(rtk_meter_id_t index, rtk_meter_type_t *pType, rtk_rate_t *pRate, rtk_enable_t *pIfg_include)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (index > RTK_MAX_METER_ID)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    if(NULL == pType)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(NULL == pRate)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(NULL == pIfg_include)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicShareMeter(index, &regData, pIfg_include)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicShareMeterType(index, (rtk_uint32 *)pType)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(*pType == METER_TYPE_KBPS)
-+        *pRate = regData<<3;
-+    else
-+        *pRate = regData;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_shareMeterBucket_set
-+ * Description:
-+ *      Set meter Bucket Size
-+ * Input:
-+ *      index        - shared meter index
-+ *      bucket_size  - Bucket Size
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_INPUT            - Error Input
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *      The API can set shared meter bucket size.
-+ */
-+rtk_api_ret_t rtk_rate_shareMeterBucket_set(rtk_meter_id_t index, rtk_uint32 bucket_size)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (index > RTK_MAX_METER_ID)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    if(bucket_size > RTL8367C_METERBUCKETSIZEMAX)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicShareMeterBucketSize(index, bucket_size)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_shareMeterBucket_get
-+ * Description:
-+ *      Get meter Bucket Size
-+ * Input:
-+ *      index        - shared meter index
-+ * Output:
-+ *      pBucket_size - Bucket Size
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *      The API can get shared meter bucket size.
-+ */
-+rtk_api_ret_t rtk_rate_shareMeterBucket_get(rtk_meter_id_t index, rtk_uint32 *pBucket_size)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (index > RTK_MAX_METER_ID)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    if(NULL == pBucket_size)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicShareMeterBucketSize(index, pBucket_size)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_igrBandwidthCtrlRate_set
-+ * Description:
-+ *      Set port ingress bandwidth control
-+ * Input:
-+ *      port        - Port id
-+ *      rate        - Rate of share meter
-+ *      ifg_include - include IFG or not, ENABLE:include DISABLE:exclude
-+ *      fc_enable   - enable flow control or not, ENABLE:use flow control DISABLE:drop
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_ENABLE       - Invalid IFG parameter.
-+ *      RT_ERR_INBW_RATE    - Invalid ingress rate parameter.
-+ * Note:
-+ *      The rate unit is 1 kbps and the range is from 8k to 1048568k. The granularity of rate is 8 kbps.
-+ *      The ifg_include parameter is used for rate calculation with/without inter-frame-gap and preamble.
-+ */
-+rtk_api_ret_t rtk_rate_igrBandwidthCtrlRate_set(rtk_port_t port, rtk_rate_t rate, rtk_enable_t ifg_include, rtk_enable_t fc_enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(ifg_include >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if(fc_enable >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if(rtk_switch_isHsgPort(port) == RT_ERR_OK)
-+    {
-+        if ((rate > RTL8367C_QOS_RATE_INPUT_MAX_HSG) || (rate < RTL8367C_QOS_RATE_INPUT_MIN))
-+            return RT_ERR_QOS_EBW_RATE ;
-+    }
-+    else
-+    {
-+        if ((rate > RTL8367C_QOS_RATE_INPUT_MAX) || (rate < RTL8367C_QOS_RATE_INPUT_MIN))
-+            return RT_ERR_QOS_EBW_RATE ;
-+    }
-+
-+    if ((retVal = rtl8367c_setAsicPortIngressBandwidth(rtk_switch_port_L2P_get(port), rate>>3, ifg_include,fc_enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_igrBandwidthCtrlRate_get
-+ * Description:
-+ *      Get port ingress bandwidth control
-+ * Input:
-+ *      port - Port id
-+ * Output:
-+ *      pRate           - Rate of share meter
-+ *      pIfg_include    - Rate's calculation including IFG, ENABLE:include DISABLE:exclude
-+ *      pFc_enable      - enable flow control or not, ENABLE:use flow control DISABLE:drop
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *     The rate unit is 1 kbps and the range is from 8k to 1048568k. The granularity of rate is 8 kbps.
-+ *     The ifg_include parameter is used for rate calculation with/without inter-frame-gap and preamble.
-+ */
-+rtk_api_ret_t rtk_rate_igrBandwidthCtrlRate_get(rtk_port_t port, rtk_rate_t *pRate, rtk_enable_t *pIfg_include, rtk_enable_t *pFc_enable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pIfg_include)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(NULL == pFc_enable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortIngressBandwidth(rtk_switch_port_L2P_get(port), &regData, pIfg_include, pFc_enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pRate = regData<<3;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_egrBandwidthCtrlRate_set
-+ * Description:
-+ *      Set port egress bandwidth control
-+ * Input:
-+ *      port        - Port id
-+ *      rate        - Rate of egress bandwidth
-+ *      ifg_include - include IFG or not, ENABLE:include DISABLE:exclude
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_QOS_EBW_RATE - Invalid egress bandwidth/rate
-+ * Note:
-+ *     The rate unit is 1 kbps and the range is from 8k to 1048568k. The granularity of rate is 8 kbps.
-+ *     The ifg_include parameter is used for rate calculation with/without inter-frame-gap and preamble.
-+ */
-+rtk_api_ret_t rtk_rate_egrBandwidthCtrlRate_set( rtk_port_t port, rtk_rate_t rate,  rtk_enable_t ifg_include)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(rtk_switch_isHsgPort(port) == RT_ERR_OK)
-+    {
-+        if ((rate > RTL8367C_QOS_RATE_INPUT_MAX_HSG) || (rate < RTL8367C_QOS_RATE_INPUT_MIN))
-+            return RT_ERR_QOS_EBW_RATE ;
-+    }
-+    else
-+    {
-+        if ((rate > RTL8367C_QOS_RATE_INPUT_MAX) || (rate < RTL8367C_QOS_RATE_INPUT_MIN))
-+            return RT_ERR_QOS_EBW_RATE ;
-+    }
-+
-+    if (ifg_include >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_setAsicPortEgressRate(rtk_switch_port_L2P_get(port), rate>>3)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicPortEgressRateIfg(ifg_include)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_egrBandwidthCtrlRate_get
-+ * Description:
-+ *      Get port egress bandwidth control
-+ * Input:
-+ *      port - Port id
-+ * Output:
-+ *      pRate           - Rate of egress bandwidth
-+ *      pIfg_include    - Rate's calculation including IFG, ENABLE:include DISABLE:exclude
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *     The rate unit is 1 kbps and the range is from 8k to 1048568k. The granularity of rate is 8 kbps.
-+ *     The ifg_include parameter is used for rate calculation with/without inter-frame-gap and preamble.
-+ */
-+rtk_api_ret_t rtk_rate_egrBandwidthCtrlRate_get(rtk_port_t port, rtk_rate_t *pRate, rtk_enable_t *pIfg_include)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pRate)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(NULL == pIfg_include)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortEgressRate(rtk_switch_port_L2P_get(port), &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pRate = regData << 3;
-+
-+    if ((retVal = rtl8367c_getAsicPortEgressRateIfg((rtk_uint32*)pIfg_include)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_rate_egrQueueBwCtrlEnable_get
-+ * Description:
-+ *      Get enable status of egress bandwidth control on specified queue.
-+ * Input:
-+ *      unit    - unit id
-+ *      port    - port id
-+ *      queue   - queue id
-+ * Output:
-+ *      pEnable - Pointer to enable status of egress queue bandwidth control
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID          - invalid port id
-+ *      RT_ERR_QUEUE_ID         - invalid queue id
-+ *      RT_ERR_NULL_POINTER     - input parameter may be null pointer
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_rate_egrQueueBwCtrlEnable_get(rtk_port_t port, rtk_qid_t queue, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    /*for whole port function, the queue value should be 0xFF*/
-+    if (queue != RTK_WHOLE_SYSTEM)
-+        return RT_ERR_QUEUE_ID;
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicAprEnable(rtk_switch_port_L2P_get(port),pEnable))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_egrQueueBwCtrlEnable_set
-+ * Description:
-+ *      Set enable status of egress bandwidth control on specified queue.
-+ * Input:
-+ *      port   - port id
-+ *      queue  - queue id
-+ *      enable - enable status of egress queue bandwidth control
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID          - invalid port id
-+ *      RT_ERR_QUEUE_ID         - invalid queue id
-+ *      RT_ERR_INPUT            - invalid input parameter
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_rate_egrQueueBwCtrlEnable_set(rtk_port_t port, rtk_qid_t queue, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    /*for whole port function, the queue value should be 0xFF*/
-+    if (queue != RTK_WHOLE_SYSTEM)
-+        return RT_ERR_QUEUE_ID;
-+
-+    if (enable>=RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicAprEnable(rtk_switch_port_L2P_get(port), enable))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_egrQueueBwCtrlRate_get
-+ * Description:
-+ *      Get rate of egress bandwidth control on specified queue.
-+ * Input:
-+ *      port  - port id
-+ *      queue - queue id
-+ *      pIndex - shared meter index
-+ * Output:
-+ *      pRate - pointer to rate of egress queue bandwidth control
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID          - invalid port id
-+ *      RT_ERR_QUEUE_ID         - invalid queue id
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter id
-+ * Note:
-+ *    The actual rate control is set in shared meters.
-+ *    The unit of granularity is 8Kbps.
-+ */
-+rtk_api_ret_t rtk_rate_egrQueueBwCtrlRate_get(rtk_port_t port, rtk_qid_t queue, rtk_meter_id_t *pIndex)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 offset_idx;
-+    rtk_uint32 phy_port;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (queue >= RTK_MAX_NUM_OF_QUEUE)
-+        return RT_ERR_QUEUE_ID;
-+
-+    if(NULL == pIndex)
-+        return RT_ERR_NULL_POINTER;
-+
-+    phy_port = rtk_switch_port_L2P_get(port);
-+    if ((retVal=rtl8367c_getAsicAprMeter(phy_port, queue,&offset_idx))!=RT_ERR_OK)
-+        return retVal;
-+
-+    *pIndex = offset_idx + ((phy_port%4)*8);
-+
-+     return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_rate_egrQueueBwCtrlRate_set
-+ * Description:
-+ *      Set rate of egress bandwidth control on specified queue.
-+ * Input:
-+ *      port  - port id
-+ *      queue - queue id
-+ *      index - shared meter index
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID          - invalid port id
-+ *      RT_ERR_QUEUE_ID         - invalid queue id
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter id
-+ * Note:
-+ *    The actual rate control is set in shared meters.
-+ *    The unit of granularity is 8Kbps.
-+ */
-+rtk_api_ret_t rtk_rate_egrQueueBwCtrlRate_set(rtk_port_t port, rtk_qid_t queue, rtk_meter_id_t index)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 offset_idx;
-+    rtk_uint32 phy_port;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (queue >= RTK_MAX_NUM_OF_QUEUE)
-+        return RT_ERR_QUEUE_ID;
-+
-+    if (index > RTK_MAX_METER_ID)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    phy_port = rtk_switch_port_L2P_get(port);
-+    if (index < ((phy_port%4)*8) ||  index > (7 + (phy_port%4)*8))
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    offset_idx = index - ((phy_port%4)*8);
-+
-+    if ((retVal=rtl8367c_setAsicAprMeter(phy_port,queue,offset_idx))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rldp.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rldp.c
-new file mode 100644
-index 0000000000..d3ca029751
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rldp.c
-@@ -0,0 +1,468 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
-+ *
-+ * Purpose : Declaration of RLDP and RLPP API
-+ *
-+ * Feature : The file have include the following module and sub-modules
-+ *           1) RLDP and RLPP configuration and status
-+ *
-+ */
-+
-+
-+/*
-+ * Include Files
-+ */
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+//#include <rtk_types.h>
-+#include <rldp.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_rldp.h>
-+
-+/*
-+ * Symbol Definition
-+ */
-+
-+
-+/*
-+ * Data Declaration
-+ */
-+
-+
-+/*
-+ * Macro Declaration
-+ */
-+
-+
-+/*
-+ * Function Declaration
-+ */
-+
-+/* Module Name : RLDP */
-+
-+/* Function Name:
-+ *      rtk_rldp_config_set
-+ * Description:
-+ *      Set RLDP module configuration
-+ * Input:
-+ *      pConfig - configuration structure of RLDP
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT
-+ *      RT_ERR_NULL_POINTER
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_rldp_config_set(rtk_rldp_config_t *pConfig)
-+{
-+    rtk_api_ret_t retVal;
-+    ether_addr_t magic;
-+    rtk_uint32 pmsk;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (pConfig->rldp_enable >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if (pConfig->trigger_mode >= RTK_RLDP_TRIGGER_END)
-+        return RT_ERR_INPUT;
-+
-+    if (pConfig->compare_type >= RTK_RLDP_CMPTYPE_END)
-+        return RT_ERR_INPUT;
-+
-+    if (pConfig->num_check >= RTK_RLDP_NUM_MAX)
-+        return RT_ERR_INPUT;
-+
-+    if (pConfig->interval_check >= RTK_RLDP_INTERVAL_MAX)
-+        return RT_ERR_INPUT;
-+
-+    if (pConfig->num_loop >= RTK_RLDP_NUM_MAX)
-+        return RT_ERR_INPUT;
-+
-+    if (pConfig->interval_loop >= RTK_RLDP_INTERVAL_MAX)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_getAsicRldpTxPortmask(&pmsk))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicRldpTxPortmask(0x00))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicRldpTxPortmask(pmsk))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicRldp(pConfig->rldp_enable))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicRldpTriggerMode(pConfig->trigger_mode))!=RT_ERR_OK)
-+        return retVal;
-+
-+    memcpy(&magic, &pConfig->magic, sizeof(ether_addr_t));
-+    if ((retVal = rtl8367c_setAsicRldpMagicNum(magic))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicRldpCompareRandomNumber(pConfig->compare_type))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicRldpCompareRandomNumber(pConfig->compare_type))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicRldpCheckingStatePara(pConfig->num_check, pConfig->interval_check))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicRldpLoopStatePara(pConfig->num_loop, pConfig->interval_loop))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_rldp_config_get
-+ * Description:
-+ *      Get RLDP module configuration
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pConfig - configuration structure of RLDP
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT
-+ *      RT_ERR_NULL_POINTER
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_rldp_config_get(rtk_rldp_config_t *pConfig)
-+{
-+    rtk_api_ret_t retVal;
-+    ether_addr_t magic;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((retVal = rtl8367c_getAsicRldp(&pConfig->rldp_enable))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicRldpTriggerMode(&pConfig->trigger_mode))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicRldpMagicNum(&magic))!=RT_ERR_OK)
-+        return retVal;
-+    memcpy(&pConfig->magic, &magic, sizeof(ether_addr_t));
-+
-+    if ((retVal = rtl8367c_getAsicRldpCompareRandomNumber(&pConfig->compare_type))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicRldpCompareRandomNumber(&pConfig->compare_type))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicRldpCheckingStatePara(&pConfig->num_check, &pConfig->interval_check))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicRldpLoopStatePara(&pConfig->num_loop, &pConfig->interval_loop))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_rldp_portConfig_set
-+ * Description:
-+ *      Set per port RLDP module configuration
-+ * Input:
-+ *      port   - port number to be configured
-+ *      pPortConfig - per port configuration structure of RLDP
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT
-+ *      RT_ERR_NULL_POINTER
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_rldp_portConfig_set(rtk_port_t port, rtk_rldp_portConfig_t *pPortConfig)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmsk;
-+    rtk_uint32 phy_port;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (pPortConfig->tx_enable>= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    phy_port = rtk_switch_port_L2P_get(port);
-+
-+    if ((retVal = rtl8367c_getAsicRldpTxPortmask(&pmsk))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if (pPortConfig->tx_enable)
-+    {
-+         pmsk |=(1<<phy_port);
-+    }
-+    else
-+    {
-+         pmsk &= ~(1<<phy_port);
-+    }
-+
-+    if ((retVal = rtl8367c_setAsicRldpTxPortmask(pmsk))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+
-+} /* end of rtk_rldp_portConfig_set */
-+
-+
-+/* Function Name:
-+ *      rtk_rldp_portConfig_get
-+ * Description:
-+ *      Get per port RLDP module configuration
-+ * Input:
-+ *      port    - port number to be get
-+ * Output:
-+ *      pPortConfig - per port configuration structure of RLDP
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT
-+ *      RT_ERR_NULL_POINTER
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_rldp_portConfig_get(rtk_port_t port, rtk_rldp_portConfig_t *pPortConfig)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmsk;
-+    rtk_portmask_t logicalPmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_getAsicRldpTxPortmask(&pmsk))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtk_switch_portmask_P2L_get(pmsk, &logicalPmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    if (logicalPmask.bits[0] & (1<<port))
-+    {
-+         pPortConfig->tx_enable = ENABLED;
-+    }
-+    else
-+    {
-+         pPortConfig->tx_enable = DISABLED;
-+    }
-+
-+    return RT_ERR_OK;
-+} /* end of rtk_rldp_portConfig_get */
-+
-+
-+/* Function Name:
-+ *      rtk_rldp_status_get
-+ * Description:
-+ *      Get RLDP module status
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pStatus - status structure of RLDP
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NULL_POINTER
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_rldp_status_get(rtk_rldp_status_t *pStatus)
-+{
-+    rtk_api_ret_t retVal;
-+    ether_addr_t seed;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((retVal = rtl8367c_getAsicRldpRandomNumber(&seed))!=RT_ERR_OK)
-+        return retVal;
-+    memcpy(&pStatus->id, &seed, sizeof(ether_addr_t));
-+
-+    return RT_ERR_OK;
-+} /* end of rtk_rldp_status_get */
-+
-+
-+/* Function Name:
-+ *      rtk_rldp_portStatus_get
-+ * Description:
-+ *      Get RLDP module status
-+ * Input:
-+ *      port    - port number to be get
-+ * Output:
-+ *      pPortStatus - per port status structure of RLDP
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT
-+ *      RT_ERR_NULL_POINTER
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_rldp_portStatus_get(rtk_port_t port, rtk_rldp_portStatus_t *pPortStatus)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmsk;
-+    rtk_portmask_t logicalPmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_getAsicRldpLoopedPortmask(&pmsk))!=RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtk_switch_portmask_P2L_get(pmsk, &logicalPmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (logicalPmask.bits[0] & (1<<port))
-+    {
-+         pPortStatus->loop_status = RTK_RLDP_LOOPSTS_LOOPING;
-+    }
-+    else
-+    {
-+         pPortStatus->loop_status  = RTK_RLDP_LOOPSTS_NONE;
-+    }
-+
-+    if ((retVal = rtl8367c_getAsicRldpEnterLoopedPortmask(&pmsk))!=RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtk_switch_portmask_P2L_get(pmsk, &logicalPmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (logicalPmask.bits[0] & (1<<port))
-+    {
-+         pPortStatus->loop_enter = RTK_RLDP_LOOPSTS_LOOPING;
-+    }
-+    else
-+    {
-+         pPortStatus->loop_enter  = RTK_RLDP_LOOPSTS_NONE;
-+    }
-+
-+    if ((retVal = rtl8367c_getAsicRldpLeaveLoopedPortmask(&pmsk))!=RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtk_switch_portmask_P2L_get(pmsk, &logicalPmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (logicalPmask.bits[0] & (1<<port))
-+    {
-+         pPortStatus->loop_leave = RTK_RLDP_LOOPSTS_LOOPING;
-+    }
-+    else
-+    {
-+         pPortStatus->loop_leave  = RTK_RLDP_LOOPSTS_NONE;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_rldp_portStatus_clear
-+ * Description:
-+ *      Clear RLDP module status
-+ * Input:
-+ *      port    - port number to be clear
-+ *      pPortStatus - per port status structure of RLDP
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT
-+ *      RT_ERR_NULL_POINTER
-+ * Note:
-+ *      Clear operation effect loop_enter and loop_leave only, other field in
-+ *      the structure are don't care. Loop status cab't be clean.
-+ */
-+rtk_api_ret_t rtk_rldp_portStatus_set(rtk_port_t port, rtk_rldp_portStatus_t *pPortStatus)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmsk;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    pmsk = (pPortStatus->loop_enter)<<rtk_switch_port_L2P_get(port);
-+    if ((retVal = rtl8367c_setAsicRldpEnterLoopedPortmask(pmsk))!=RT_ERR_OK)
-+        return retVal;
-+
-+    pmsk = (pPortStatus->loop_leave)<<rtk_switch_port_L2P_get(port);
-+    if ((retVal = rtl8367c_setAsicRldpLeaveLoopedPortmask(pmsk))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rldp_portLoopPair_get
-+ * Description:
-+ *      Get RLDP port loop pairs
-+ * Input:
-+ *      port    - port number to be get
-+ * Output:
-+ *      pPortmask - per port related loop ports
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT
-+ *      RT_ERR_NULL_POINTER
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_rldp_portLoopPair_get(rtk_port_t port, rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmsk;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_getAsicRldpLoopedPortPair(rtk_switch_port_L2P_get(port), &pmsk))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtk_switch_portmask_P2L_get(pmsk, pPortmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtk_hal.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtk_hal.c
-new file mode 100644
-index 0000000000..b9373492cb
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtk_hal.c
-@@ -0,0 +1,839 @@
-+#include <linux/kernel.h>
-+#include <linux/delay.h>
-+#include  "./include/rtk_switch.h"
-+#include  "./include/vlan.h"
-+#include  "./include/port.h"
-+#include  "./include/rate.h"
-+#include  "./include/rtk_hal.h"
-+#include  "./include/l2.h"
-+#include  "./include/stat.h"
-+#include  "./include/igmp.h"
-+#include  "./include/trap.h"
-+#include  "./include/leaky.h"
-+#include  "./include/mirror.h"
-+#include  "./include/rtl8367c_asicdrv_port.h"
-+#include  "./include/rtl8367c_asicdrv_mib.h"
-+#include  "./include/smi.h"
-+#include  "./include/qos.h"
-+#include  "./include/trunk.h"
-+
-+void rtk_hal_switch_init(void)
-+{
-+	if(rtk_switch_init() != 0)
-+        printk("rtk_switch_init failed\n");
-+	mdelay(500);
-+	/*vlan init */
-+	if (rtk_vlan_init() != 0)
-+        printk("rtk_vlan_init failed\n");
-+}
-+
-+void rtk_hal_dump_full_mib(void)
-+{
-+	rtk_port_t port;
-+	rtk_stat_counter_t Cntr;
-+	rtk_stat_port_type_t cntr_idx;
-+
-+	for (port = UTP_PORT0; port < (UTP_PORT0 + 5); port++) {
-+		printk("\nPort%d\n", port);
-+		for (cntr_idx = STAT_IfInOctets; cntr_idx < STAT_PORT_CNTR_END; cntr_idx ++) {
-+			rtk_stat_port_get(port, cntr_idx, &Cntr);
-+			printk("%8llu ", Cntr);
-+			if (((cntr_idx%10) == 9))
-+				printk("\n");
-+		}
-+	}
-+
-+	for (port = EXT_PORT0; port < (EXT_PORT0 + 2); port++) {
-+		printk("\nPort%d\n", port);
-+		for (cntr_idx = STAT_IfInOctets; cntr_idx < STAT_PORT_CNTR_END; cntr_idx ++) {
-+			rtk_stat_port_get(port, cntr_idx, &Cntr);
-+			printk("%8llu ", Cntr);
-+			if (((cntr_idx%10) == 9))
-+				printk("\n");
-+		}
-+	}
-+	rtk_stat_global_reset();
-+}
-+void rtk_dump_mib_type(rtk_stat_port_type_t cntr_idx)
-+{
-+	rtk_port_t port;
-+	rtk_stat_counter_t Cntr;
-+
-+	for (port = UTP_PORT0; port < (UTP_PORT0 + 5); port++) {
-+		rtk_stat_port_get(port, cntr_idx, &Cntr);
-+		printk("%8llu", Cntr);
-+	}
-+	for (port = EXT_PORT0; port < (EXT_PORT0 + 2); port++) {
-+		rtk_stat_port_get(port, cntr_idx, &Cntr);
-+		printk("%8llu", Cntr);
-+	}
-+	printk("\n");
-+}
-+
-+void rtk_hal_dump_mib(void)
-+{
-+
-+	printk("==================%8s%8s%8s%8s%8s%8s%8s\n", "Port0", "Port1",
-+	       "Port2", "Port3", "Port4", "Port16", "Port17");
-+	/* Get TX Unicast Pkts */
-+	printk("TX Unicast Pkts  :");
-+	rtk_dump_mib_type(STAT_IfOutUcastPkts);
-+	/* Get TX Multicast Pkts */
-+	printk("TX Multicast Pkts:");
-+	rtk_dump_mib_type(STAT_IfOutMulticastPkts);
-+	/* Get TX BroadCast Pkts */
-+	printk("TX BroadCast Pkts:");
-+	rtk_dump_mib_type(STAT_IfOutBroadcastPkts);
-+	/* Get TX Collisions */
-+	/* Get TX Puase Frames */
-+	printk("TX Pause Frames  :");
-+	rtk_dump_mib_type(STAT_Dot3OutPauseFrames);
-+	/* Get TX Drop Events */
-+	/* Get RX Unicast Pkts */
-+	printk("RX Unicast Pkts  :");
-+	rtk_dump_mib_type(STAT_IfInUcastPkts);
-+	/* Get RX Multicast Pkts */
-+	printk("RX Multicast Pkts:");
-+	rtk_dump_mib_type(STAT_IfInMulticastPkts);
-+	/* Get RX Broadcast Pkts */
-+	printk("RX Broadcast Pkts:");
-+	rtk_dump_mib_type(STAT_IfInBroadcastPkts);
-+	/* Get RX FCS Erros */
-+	printk("RX FCS Errors    :");
-+	rtk_dump_mib_type(STAT_Dot3StatsFCSErrors);
-+	/* Get RX Undersize Pkts */
-+	printk("RX Undersize Pkts:");
-+	rtk_dump_mib_type(STAT_EtherStatsUnderSizePkts);
-+	/* Get RX Discard Pkts */
-+	printk("RX Discard Pkts  :");
-+	rtk_dump_mib_type(STAT_Dot1dTpPortInDiscards);
-+	/* Get RX Fragments */
-+	printk("RX Fragments     :");
-+	rtk_dump_mib_type(STAT_EtherStatsFragments);
-+	/* Get RX Oversize Pkts */
-+	printk("RX Oversize Pkts :");
-+	rtk_dump_mib_type(STAT_EtherOversizeStats);
-+	/* Get RX Jabbers */
-+	printk("RX Jabbers       :");
-+	rtk_dump_mib_type(STAT_EtherStatsJabbers);
-+	/* Get RX Pause Frames */
-+	printk("RX Pause Frames  :");
-+	rtk_dump_mib_type(STAT_Dot3InPauseFrames);
-+	/* clear MIB */
-+	rtk_stat_global_reset();
-+}
-+EXPORT_SYMBOL(rtk_hal_dump_mib);
-+
-+int rtk_hal_dump_vlan(void)
-+{
-+	rtk_vlan_cfg_t vlan;
-+	int i;
-+
-+	printk("vid    portmap\n");
-+	for (i = 0; i < RTK_SW_VID_RANGE; i++) {
-+		rtk_vlan_get(i, &vlan);
-+		printk("%3d    ", i);
-+		printk("%c",
-+		       RTK_PORTMASK_IS_PORT_SET(vlan.mbr,
-+						UTP_PORT0) ? '1' : '-');
-+		printk("%c",
-+		       RTK_PORTMASK_IS_PORT_SET(vlan.mbr,
-+						UTP_PORT1) ? '1' : '-');
-+		printk("%c",
-+		       RTK_PORTMASK_IS_PORT_SET(vlan.mbr,
-+						UTP_PORT2) ? '1' : '-');
-+		printk("%c",
-+		       RTK_PORTMASK_IS_PORT_SET(vlan.mbr,
-+						UTP_PORT3) ? '1' : '-');
-+		printk("%c",
-+		       RTK_PORTMASK_IS_PORT_SET(vlan.mbr,
-+						UTP_PORT4) ? '1' : '-');
-+		printk("%c",
-+		       RTK_PORTMASK_IS_PORT_SET(vlan.mbr,
-+						EXT_PORT0) ? '1' : '-');
-+		printk("%c",
-+		       RTK_PORTMASK_IS_PORT_SET(vlan.mbr,
-+						EXT_PORT1) ? '1' : '-');
-+		printk("\n");
-+	}
-+	return 0;
-+}
-+
-+void rtk_hal_clear_vlan(void)
-+{
-+	rtk_api_ret_t ret;
-+
-+	ret =  rtk_vlan_reset();
-+    if (ret != RT_ERR_OK)
-+        printk("rtk_vlan_reset failed\n");
-+}
-+
-+int rtk_hal_set_vlan(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_vlan_cfg_t vlan;
-+	rtk_api_ret_t ret;
-+	int i;
-+
-+	/* clear vlan entry first */
-+	memset(&vlan, 0x00, sizeof(rtk_vlan_cfg_t));
-+	RTK_PORTMASK_CLEAR(vlan.mbr);
-+	RTK_PORTMASK_CLEAR(vlan.untag);
-+	rtk_vlan_set(data->vid, &vlan);
-+
-+	memset(&vlan, 0x00, sizeof(rtk_vlan_cfg_t));
-+	for (i = 0; i < 5; i++) {
-+		if (data->port_map & (1 << i)) {
-+			RTK_PORTMASK_PORT_SET(vlan.mbr, i);
-+			RTK_PORTMASK_PORT_SET(vlan.untag, i);
-+			rtk_vlan_portPvid_set(i, data->vid, 0);
-+		}
-+	}
-+	for (i = 0; i < 2; i++) {
-+		if (data->port_map & (1 << (i + 5))) {
-+			RTK_PORTMASK_PORT_SET(vlan.mbr, (i + EXT_PORT0));
-+			RTK_PORTMASK_PORT_SET(vlan.untag, (i + EXT_PORT0));
-+			rtk_vlan_portPvid_set((i + EXT_PORT0), data->vid, 0);
-+		}
-+	}
-+	vlan.ivl_en = 1;
-+	ret = rtk_vlan_set(data->vid, &vlan);
-+
-+	return 0;
-+}
-+
-+void rtk_hal_vlan_portpvid_set(rtk_port_t port, rtk_vlan_t pvid, rtk_pri_t priority)
-+{
-+	rtk_vlan_portPvid_set(port, pvid, priority);
-+}
-+
-+int rtk_hal_set_ingress_rate(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_api_ret_t ret;
-+
-+	if (data->on_off == 1)
-+		ret =
-+		    rtk_rate_igrBandwidthCtrlRate_set(data->port, data->bw, 0,
-+						      1);
-+	else
-+		ret =
-+		    rtk_rate_igrBandwidthCtrlRate_set(data->port, 1048568, 0,
-+						      1);
-+
-+	return ret;
-+}
-+
-+int rtk_hal_set_egress_rate(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_api_ret_t ret;
-+
-+	if (data->on_off == 1)
-+		ret =
-+		    rtk_rate_egrBandwidthCtrlRate_set(data->port, data->bw, 1);
-+	else
-+		ret = rtk_rate_egrBandwidthCtrlRate_set(data->port, 1048568, 1);
-+
-+	return ret;
-+}
-+
-+void rtk_hal_dump_table(void)
-+{
-+	rtk_uint32 i;
-+	rtk_uint32 address = 0;
-+	rtk_l2_ucastAddr_t l2_data;
-+	rtk_l2_ipMcastAddr_t ipMcastAddr;
-+
-+	printk("hash  port(0:17)   fid   vid  mac-address\n");
-+	while (1) {
-+		if (rtk_l2_addr_next_get(READMETHOD_NEXT_L2UC, UTP_PORT0, &address, &l2_data) != RT_ERR_OK) {
-+			break;
-+		} else {
-+			printk("%03x   ", l2_data.address);
-+			for (i = 0; i < 5; i++)
-+				if ( l2_data.port == i)
-+					printk("1");
-+				else
-+					printk("-");
-+			for (i = 16; i < 18; i++)
-+				if ( l2_data.port == i)
-+					printk("1");
-+				else
-+					printk("-");
-+
-+			printk("      %2d", l2_data.fid);
-+			printk("  %4d", l2_data.cvid);
-+			printk("  %02x%02x%02x%02x%02x%02x\n", l2_data.mac.octet[0],
-+			l2_data.mac.octet[1], l2_data.mac.octet[2], l2_data.mac.octet[3], 
-+			l2_data.mac.octet[4], l2_data.mac.octet[5]);
-+			address ++;
-+			}
-+	}
-+
-+	address = 0;
-+	while (1) {
-+        if (rtk_l2_ipMcastAddr_next_get(&address, &ipMcastAddr) != RT_ERR_OK) {
-+            break;
-+        } else {
-+            printk("%03x   ", ipMcastAddr.address);
-+            for (i = 0; i < 5; i++)
-+                printk("%c", RTK_PORTMASK_IS_PORT_SET(ipMcastAddr.portmask, i) ? '1' : '-');
-+            for (i = 16; i < 18; i++)
-+                printk("%c", RTK_PORTMASK_IS_PORT_SET(ipMcastAddr.portmask, i) ? '1' : '-');
-+			printk("                ");
-+			printk("01005E%06x\n", (ipMcastAddr.dip & 0xefffff));
-+            address ++;
-+            }
-+    }
-+}
-+
-+void rtk_hal_clear_table(void)
-+{
-+	rtk_api_ret_t ret;
-+
-+	ret = rtk_l2_table_clear();
-+	if (ret != RT_ERR_OK)
-+		printk("rtk_l2_table_clear failed\n");
-+}
-+
-+void rtk_hal_add_table(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_api_ret_t ret;
-+	rtk_l2_ucastAddr_t l2_entry;
-+	rtk_mac_t mac;
-+
-+	mac.octet[0] =data->mac[0];
-+	mac.octet[1] =data->mac[1];
-+	mac.octet[2] =data->mac[2];
-+	mac.octet[3] =data->mac[3];
-+	mac.octet[4] =data->mac[4];
-+	mac.octet[5] =data->mac[5];
-+
-+	memset(&l2_entry, 0x00, sizeof(rtk_l2_ucastAddr_t));
-+	l2_entry.port = data->port;
-+	l2_entry.ivl = 1;
-+	l2_entry.cvid = data->vid;
-+	l2_entry.fid = 0;
-+	l2_entry.efid = 0;
-+	l2_entry.is_static = 1;
-+	ret = rtk_l2_addr_add(&mac, &l2_entry);
-+	if (ret != RT_ERR_OK)
-+		printk("rtk_hal_add_table failed\n");
-+}
-+
-+void rtk_hal_del_table(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_api_ret_t ret;
-+	rtk_l2_ucastAddr_t l2_entry;
-+	rtk_mac_t mac;
-+
-+	mac.octet[0] =data->mac[0];
-+	mac.octet[1] =data->mac[1];
-+	mac.octet[2] =data->mac[2];
-+	mac.octet[3] =data->mac[3];
-+	mac.octet[4] =data->mac[4];
-+	mac.octet[5] =data->mac[5];
-+
-+	memset(&l2_entry, 0x00, sizeof(rtk_l2_ucastAddr_t));
-+	l2_entry.port = data->port;
-+	l2_entry.ivl = 1;
-+	l2_entry.cvid = data->vid;
-+	l2_entry.fid = 0;
-+	l2_entry.efid = 0;
-+	ret = rtk_l2_addr_del(&mac, &l2_entry);
-+	if (ret != RT_ERR_OK)
-+		printk("rtk_hal_add_table failed\n");
-+}
-+void rtk_hal_get_phy_status(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_port_linkStatus_t linkStatus;
-+	rtk_port_speed_t speed;
-+	rtk_port_duplex_t duplex;
-+
-+    rtk_port_phyStatus_get(data->port, &linkStatus, &speed, &duplex);
-+    printk("Port%d Status:\n", data->port);
-+	if (linkStatus == 1) {
-+        printk("Link Up");
-+        if (speed == 0)
-+			printk(" 10M");
-+		else if (speed == 1)
-+			printk(" 100M");
-+		else if (speed == 2)
-+            printk(" 1000M");
-+        if (duplex == 0)
-+			printk(" Half Duplex\n");
-+		else
-+			printk(" Full Duplex\n");
-+	} else
-+		printk("Link Down\n");
-+
-+}
-+
-+void rtk_hal_set_port_mirror(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_portmask_t rx_portmask;
-+	rtk_portmask_t tx_portmask;
-+	rtk_api_ret_t ret;
-+	int i;
-+
-+	rtk_mirror_portIso_set(ENABLED);
-+	RTK_PORTMASK_CLEAR(rx_portmask);
-+	RTK_PORTMASK_CLEAR(tx_portmask);
-+    for (i = 0; i < 5; i++)
-+		if (data->rx_port_map & (1 << i))
-+			RTK_PORTMASK_PORT_SET(rx_portmask, i);
-+	for (i = 0; i < 2; i++)
-+		if (data->rx_port_map & (1 << (i + 5)))
-+			RTK_PORTMASK_PORT_SET(rx_portmask, (i + EXT_PORT0));
-+
-+	RTK_PORTMASK_CLEAR(tx_portmask);
-+    for (i = 0; i < 5; i++)
-+        if (data->tx_port_map & (1 << i))
-+            RTK_PORTMASK_PORT_SET(tx_portmask, i);
-+    for (i = 0; i < 2; i++)
-+        if (data->tx_port_map & (1 << (i + 5)))
-+            RTK_PORTMASK_PORT_SET(tx_portmask, (i + EXT_PORT0));
-+
-+    ret = rtk_mirror_portBased_set(data->port, &rx_portmask, &tx_portmask);
-+	if (!ret)
-+		printk("rtk_mirror_portBased_set success\n");
-+}
-+
-+void rtk_hal_read_reg(struct ra_switch_ioctl_data *data)
-+{
-+	ret_t retVal;
-+
-+	retVal = smi_read(data->reg_addr, &data->reg_val);
-+	if(retVal != RT_ERR_OK)
-+		printk("switch reg read failed\n");
-+	else
-+		printk("reg0x%x = 0x%x\n", data->reg_addr, data->reg_val);
-+}
-+
-+void rtk_hal_write_reg(struct ra_switch_ioctl_data *data)
-+{
-+	ret_t retVal;
-+
-+    retVal = smi_write(data->reg_addr, data->reg_val);
-+    if(retVal != RT_ERR_OK)
-+        printk("switch reg write failed\n");
-+    else
-+        printk("write switch reg0x%x 0x%x success\n", data->reg_addr, data->reg_val);
-+}
-+
-+void rtk_hal_get_phy_reg(struct ra_switch_ioctl_data *data)
-+{
-+	ret_t retVal;
-+	rtk_port_phy_data_t Data;
-+
-+	retVal = rtk_port_phyReg_get(data->port, data->reg_addr, &Data);
-+	if (retVal == RT_ERR_OK)
-+		printk("Get: phy[%d].reg[%d] = 0x%04x\n", data->port, data->reg_addr, Data);
-+	else
-+		printk("read phy reg failed\n");
-+}
-+
-+void rtk_hal_set_phy_reg(struct ra_switch_ioctl_data *data)
-+{
-+	ret_t retVal;
-+
-+	retVal = rtk_port_phyReg_set(data->port, data->reg_addr, data->reg_val);
-+	if (retVal == RT_ERR_OK)
-+		printk("Set: phy[%d].reg[%d] = 0x%04x\n", data->port, data->reg_addr, data->reg_val);
-+	else
-+		printk("write phy reg failed\n");
-+}
-+void rtk_hal_qos_en(struct ra_switch_ioctl_data *data)
-+{
-+
-+	if (data->on_off == 1) {
-+		if (rtk_qos_init(8) != 0)
-+			printk("rtk_qos_init(8) failed\n");
-+	}
-+	else {
-+		if (rtk_qos_init(1) != 0)
-+            printk("rtk_qos_init(1) failed\n");
-+	}
-+}
-+
-+void rtk_hal_qos_set_table2type(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_api_ret_t ret;
-+	rtk_priority_select_t PriDec;
-+
-+	/* write all pri to 0 */
-+	PriDec.port_pri = 0;
-+    PriDec.dot1q_pri = 0;
-+    PriDec.acl_pri = 0;
-+    PriDec.cvlan_pri = 0;
-+    PriDec.svlan_pri = 0;
-+    PriDec.dscp_pri = 0;
-+    PriDec.dmac_pri = 0;
-+    PriDec.smac_pri = 0;
-+
-+	if (data->qos_type == 0)
-+		PriDec.port_pri = 1;
-+	else if (data->qos_type == 1)
-+		PriDec.dot1q_pri = 1;
-+	else if (data->qos_type == 2)
-+		PriDec.acl_pri = 1;
-+	else if (data->qos_type == 3)
-+		PriDec.dscp_pri = 1;
-+	else if (data->qos_type == 4)
-+		PriDec.cvlan_pri = 1;
-+	else if (data->qos_type == 5)
-+		PriDec.svlan_pri = 1;
-+	else if (data->qos_type == 6)
-+		PriDec.dmac_pri = 1;
-+	else if (data->qos_type == 7)
-+		PriDec.smac_pri = 1;
-+
-+	if (data->qos_table_idx == 0)
-+		ret = rtk_qos_priSel_set(PRIDECTBL_IDX0, &PriDec);
-+	else
-+		ret = rtk_qos_priSel_set(PRIDECTBL_IDX1, &PriDec);
-+
-+	if (ret != 0)
-+		printk("rtk_qos_priSel_set failed\n");
-+
-+}
-+
-+void rtk_hal_qos_get_table2type(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_api_ret_t ret;
-+	rtk_priority_select_t PriDec;
-+
-+	if (data->qos_table_idx == 0)
-+        ret = rtk_qos_priSel_get(PRIDECTBL_IDX0, &PriDec);
-+    else
-+        ret = rtk_qos_priSel_get(PRIDECTBL_IDX1, &PriDec);
-+
-+	if (ret != 0)
-+        printk("rtk_qos_priSel_set failed\n");
-+    else {
-+		printk("port_pri  = %d\n", PriDec.port_pri);
-+		printk("dot1q_pri = %d\n", PriDec.dot1q_pri);
-+		printk("acl_pri   = %d\n", PriDec.acl_pri);
-+		printk("dscp_pri  = %d\n", PriDec.dscp_pri);
-+		printk("cvlan_pri = %d\n", PriDec.cvlan_pri);
-+		printk("svlan_pri = %d\n", PriDec.svlan_pri);
-+		printk("dmac_pri  = %d\n", PriDec.dmac_pri);
-+		printk("smac_pri  = %d\n", PriDec.smac_pri);
-+	}
-+}
-+
-+void rtk_hal_qos_set_port2table(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_api_ret_t ret;
-+	
-+	ret = rtk_qos_portPriSelIndex_set(data->port, data->qos_table_idx);
-+	if (ret != 0)
-+		printk("rtk_qos_portPriSelIndex_set failed\n");
-+}
-+
-+void rtk_hal_qos_get_port2table(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_api_ret_t ret;
-+	rtk_qos_priDecTbl_t Index;
-+	
-+	ret = rtk_qos_portPriSelIndex_get(data->port, &Index);
-+	if (ret != 0)
-+		printk("rtk_qos_portPriSelIndex_set failed\n");
-+	else
-+		printk("port%d belongs to table%d\n", data->port, Index);
-+}
-+
-+void rtk_hal_qos_set_port2pri(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_api_ret_t ret;
-+
-+	ret = rtk_qos_portPri_set(data->port, data->qos_pri);
-+	if (ret != 0)
-+		printk("rtk_qos_portPri_set failed\n");
-+}
-+
-+void rtk_hal_qos_get_port2pri(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_api_ret_t ret;
-+	rtk_pri_t Int_pri;
-+
-+	ret = rtk_qos_portPri_get(data->port, &Int_pri);
-+	if (ret != 0)
-+		printk("rtk_qos_portPri_set failed\n");
-+	else
-+		printk("port%d priority = %d\n", data->port, Int_pri);
-+}
-+
-+void rtk_hal_qos_set_dscp2pri(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_api_ret_t ret;
-+
-+	ret = rtk_qos_dscpPriRemap_set(data->qos_dscp, data->qos_pri);
-+	if (ret != 0)
-+		printk("rtk_qos_dscpPriRemap_set failed\n");
-+}
-+
-+void rtk_hal_qos_get_dscp2pri(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_api_ret_t ret;
-+	rtk_pri_t Int_pri;
-+
-+	ret = rtk_qos_dscpPriRemap_get(data->qos_dscp, &Int_pri);
-+	if (ret != 0)
-+		printk("rtk_qos_dscpPriRemap_set failed\n");
-+	else
-+		printk("dscp%d priority is %d\n", data->qos_dscp, Int_pri);
-+}
-+
-+void rtk_hal_qos_set_pri2queue(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_api_ret_t ret;
-+	rtk_qos_pri2queue_t pri2qid;
-+
-+	ret = rtk_qos_priMap_get(8, &pri2qid);
-+	pri2qid.pri2queue[data->qos_queue_num] = data->qos_pri;
-+	ret = rtk_qos_priMap_set(8, &pri2qid);
-+	if (ret != 0)
-+		printk("rtk_qos_priMap_set failed\n");
-+}
-+
-+void rtk_hal_qos_get_pri2queue(struct ra_switch_ioctl_data *data)
-+{
-+	int i;
-+	rtk_api_ret_t ret;
-+	rtk_qos_pri2queue_t pri2qid;
-+
-+	ret = rtk_qos_priMap_get(8, &pri2qid);
-+	if (ret != 0)
-+		printk("rtk_qos_priMap_get failed\n");
-+	else {
-+		for (i = 0; i < 8; i++)
-+			printk("pri2qid.pri2queue[%d] = %d\n", i, pri2qid.pri2queue[i]);
-+	}
-+}
-+
-+void rtk_hal_qos_set_queue_weight(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_api_ret_t ret;
-+	rtk_qos_queue_weights_t qweights;
-+
-+	ret = rtk_qos_schedulingQueue_get(data->port, &qweights);
-+	qweights.weights[data->qos_queue_num] = data->qos_weight;
-+	ret = rtk_qos_schedulingQueue_set(data->port, &qweights);
-+	if (ret != 0)
-+		printk("rtk_qos_schedulingQueue_set failed\n");
-+}
-+
-+void rtk_hal_qos_get_queue_weight(struct ra_switch_ioctl_data *data)
-+{
-+	int i;
-+	rtk_api_ret_t ret;
-+	rtk_qos_queue_weights_t qweights;
-+
-+	ret = rtk_qos_schedulingQueue_get(data->port, &qweights);
-+	if (ret != 0)
-+		printk("rtk_qos_schedulingQueue_get failed\n");
-+	else {
-+		printk("=== Port%d queue weight ===\n", data->port);
-+		for (i = 0; i < 8; i++)
-+			printk("qweights.weights[%d] = %d\n",i ,qweights.weights[i]);
-+	}
-+}
-+
-+void rtk_hal_enable_igmpsnoop(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_api_ret_t ret;
-+	rtk_portmask_t pmask;
-+	
-+
-+	ret = rtk_igmp_init();
-+	if (data->on_off == 1) {
-+		RTK_PORTMASK_CLEAR(pmask);
-+		RTK_PORTMASK_PORT_SET(pmask, EXT_PORT0);
-+		ret |= rtk_igmp_static_router_port_set(&pmask);
-+		ret |= rtk_igmp_protocol_set(UTP_PORT4, PROTOCOL_IGMPv1, IGMP_ACTION_FORWARD);
-+		ret |= rtk_igmp_protocol_set(UTP_PORT4, PROTOCOL_IGMPv2, IGMP_ACTION_FORWARD);
-+		ret |= rtk_igmp_protocol_set(UTP_PORT4, PROTOCOL_MLDv1, IGMP_ACTION_FORWARD);
-+		ret |= rtk_igmp_protocol_set(EXT_PORT1, PROTOCOL_IGMPv1, IGMP_ACTION_FORWARD);
-+		ret |= rtk_igmp_protocol_set(EXT_PORT1, PROTOCOL_IGMPv2, IGMP_ACTION_FORWARD);
-+		ret |= rtk_igmp_protocol_set(EXT_PORT1, PROTOCOL_MLDv1, IGMP_ACTION_FORWARD);
-+		ret |= rtk_igmp_protocol_set(UTP_PORT0, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+		ret |= rtk_igmp_protocol_set(UTP_PORT1, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+		ret |= rtk_igmp_protocol_set(UTP_PORT2, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+		ret |= rtk_igmp_protocol_set(UTP_PORT3, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+		ret |= rtk_igmp_protocol_set(EXT_PORT0, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+
-+		ret |= rtk_leaky_vlan_set(LEAKY_IPMULTICAST, ENABLED);
-+		ret |= rtk_l2_ipMcastForwardRouterPort_set(DISABLED);
-+		/* drop unknown multicast packets*/
-+		/* ret |= rtk_trap_unknownMcastPktAction_set(UTP_PORT4, MCAST_IPV4, MCAST_ACTION_DROP);*/
-+	} else {
-+		RTK_PORTMASK_CLEAR(pmask);
-+        RTK_PORTMASK_PORT_SET(pmask, EXT_PORT0);
-+        RTK_PORTMASK_PORT_SET(pmask, EXT_PORT1);
-+		ret |= rtk_igmp_protocol_set(UTP_PORT0, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+		ret |= rtk_igmp_protocol_set(UTP_PORT1, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+		ret |= rtk_igmp_protocol_set(UTP_PORT2, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+		ret |= rtk_igmp_protocol_set(UTP_PORT3, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+		ret |= rtk_igmp_protocol_set(EXT_PORT0, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+
-+		ret |= rtk_igmp_static_router_port_set(&pmask);
-+	}
-+	if(ret != RT_ERR_OK)
-+		printk("enable switch igmpsnoop failed\n");
-+}
-+
-+void rtk_hal_disable_igmpsnoop(void)
-+{
-+	if (rtk_igmp_state_set(DISABLED) != RT_ERR_OK)
-+		printk("Disable IGMP SNOOPING failed\n");
-+}
-+
-+rtk_api_ret_t rtk_port_phyTestMode_set(rtk_port_t port, rtk_port_phy_test_mode_t mode)
-+{
-+    rtk_uint32          data, regData, i;
-+    rtk_api_ret_t       retVal;
-+
-+    RTK_CHK_PORT_IS_UTP(port);
-+
-+    if(mode >= PHY_TEST_MODE_END)
-+        return RT_ERR_INPUT;
-+
-+    if( (mode == PHY_TEST_MODE_2) || (mode == PHY_TEST_MODE_3) )
-+        return RT_ERR_INPUT;
-+
-+    if (PHY_TEST_MODE_NORMAL != mode)
-+    {
-+        /* Other port should be Normal mode */
-+        RTK_SCAN_ALL_LOG_PORT(i)
-+        {
-+            if(rtk_switch_isUtpPort(i) == RT_ERR_OK)
-+            {
-+                if(i != port)
-+                {
-+                    if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(i), 9, &data)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((data & 0xE000) != 0)
-+                        return RT_ERR_NOT_ALLOWED;
-+                }
-+            }
-+        }
-+    }
-+
-+    if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), 9, &data)) != RT_ERR_OK)
-+        return retVal;
-+
-+    data &= ~0xE000;
-+    data |= (mode << 13);
-+    if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), 9, data)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (PHY_TEST_MODE_4 == mode)
-+    {
-+        if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if((retVal = rtl8367c_getAsicReg(0x1300, &regData)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if( (regData == 0x0276) || (regData == 0x0597) )
-+        {
-+            if ((retVal = rtl8367c_setAsicPHYOCPReg(rtk_switch_port_L2P_get(port), 0xbcc2, 0xF4F4)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+
-+        if( (regData == 0x6367) )
-+        {
-+            if ((retVal = rtl8367c_setAsicPHYOCPReg(rtk_switch_port_L2P_get(port), 0xa436, 0x80c1)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if ((retVal = rtl8367c_setAsicPHYOCPReg(rtk_switch_port_L2P_get(port), 0xa438, 0xfe00)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+void rtk_hal_set_phy_test_mode(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_api_ret_t ret;
-+
-+    ret = rtk_port_phyTestMode_set(data->port, data->mode);
-+	if (ret != RT_ERR_OK)
-+		printk("rtk_port_phyTestMode_set failed\n");
-+	else
-+		printk("set port%d in test mode %d.\n", data->port, data->mode);
-+}
-+
-+void rtk_hal_set_port_trunk(struct ra_switch_ioctl_data *data)
-+{
-+
-+	rtk_api_ret_t ret;
-+	rtk_portmask_t member;
-+	int i;
-+
-+	RTK_PORTMASK_CLEAR(member);
-+	for (i = 0; i < 4; i++) {
-+		if (data->port_map & (1 << i))
-+			RTK_PORTMASK_PORT_SET(member, i);
-+    }
-+
-+	ret = rtk_trunk_port_set(TRUNK_GROUP0, &member);
-+	if (ret != RT_ERR_OK)
-+		printk("rtk_trunk_port_set failed\n");
-+
-+	ret = rtk_trunk_distributionAlgorithm_set(RTK_WHOLE_SYSTEM, 0x7F);
-+	if (ret != RT_ERR_OK)
-+		printk("rtk_trunk_distributionAlgorithm_set failed\n");
-+}
-+
-+void rtk_hal_vlan_tag(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_api_ret_t ret;
-+	rtk_vlan_cfg_t vlan;
-+
-+    ret = rtk_vlan_get(data->vid, &vlan);
-+	if (ret != RT_ERR_OK)
-+		printk("rtk_vlan_get failed\n");
-+	else {
-+		if (data->on_off == 0)
-+			RTK_PORTMASK_PORT_SET(vlan.untag, data->port);
-+		else
-+			RTK_PORTMASK_PORT_CLEAR(vlan.untag, data->port);
-+		
-+		ret = rtk_vlan_set(data->vid, &vlan);
-+		if (ret != RT_ERR_OK)
-+			printk("rtk_vlan_set failed\n");
-+	}
-+}
-+
-+void rtk_hal_vlan_mode(struct ra_switch_ioctl_data *data)
-+{
-+	rtk_vlan_cfg_t vlan1, vlan2;
-+	rtk_api_ret_t ret;
-+
-+	ret = rtk_vlan_get(1, &vlan1);
-+	if (ret != RT_ERR_OK)
-+		printk("rtk_vlan_get failed\n");
-+
-+	ret = rtk_vlan_get(2, &vlan2);
-+	if (ret != RT_ERR_OK)
-+		printk("rtk_vlan_get failed\n");
-+
-+	if (data->mode == 0) { //ivl
-+		vlan1.ivl_en = 1;
-+		vlan1.fid_msti = 0;
-+		rtk_vlan_set(1, &vlan1);
-+		vlan2.ivl_en = 1;
-+		vlan2.fid_msti = 0;
-+		rtk_vlan_set(2, &vlan2);
-+	} else if(data->mode == 1) {//svl
-+		vlan1.ivl_en = 0;
-+		vlan1.fid_msti = 0;
-+		rtk_vlan_set(1, &vlan1);
-+		vlan2.ivl_en = 0;
-+		vlan2.fid_msti = 1;
-+		rtk_vlan_set(2, &vlan2);
-+	} else
-+		printk("mode not supported\n");
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtk_switch.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtk_switch.c
-new file mode 100644
-index 0000000000..0bb0db0776
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtk_switch.c
-@@ -0,0 +1,1796 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76336 $
-+ * $Date: 2017-03-09 10:41:21 +0800 (週四, 09 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API
-+ * Feature : Here is a list of all functions and variables in this module.
-+ *
-+ */
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <string.h>
-+
-+#include <rate.h>
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_misc.h>
-+#include <rtl8367c_asicdrv_green.h>
-+#include <rtl8367c_asicdrv_lut.h>
-+#include <rtl8367c_asicdrv_rma.h>
-+#include <rtl8367c_asicdrv_mirror.h>
-+
-+#if defined(FORCE_PROBE_RTL8367C)
-+static init_state_t    init_state = INIT_COMPLETED;
-+#elif defined(FORCE_PROBE_RTL8370B)
-+static init_state_t    init_state = INIT_COMPLETED;
-+#elif defined(FORCE_PROBE_RTL8364B)
-+static init_state_t    init_state = INIT_COMPLETED;
-+#elif defined(FORCE_PROBE_RTL8363SC_VB)
-+static init_state_t    init_state = INIT_COMPLETED;
-+#else
-+static init_state_t    init_state = INIT_NOT_COMPLETED;
-+#endif
-+
-+#define AUTO_PROBE (!defined(FORCE_PROBE_RTL8367C) && !defined(FORCE_PROBE_RTL8370B) && !defined(FORCE_PROBE_RTL8364B) && !defined(FORCE_PROBE_RTL8363SC_VB))
-+
-+#if (AUTO_PROBE || defined(FORCE_PROBE_RTL8367C))
-+static rtk_switch_halCtrl_t rtl8367c_hal_Ctrl =
-+{
-+    /* Switch Chip */
-+    CHIP_RTL8367C,
-+
-+    /* Logical to Physical */
-+    {0, 1, 2, 3, 4, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-+     6, 7, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF },
-+
-+    /* Physical to Logical */
-+    {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UNDEFINE_PORT, EXT_PORT0, EXT_PORT1,
-+     UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT,
-+     UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT,
-+     UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT},
-+
-+    /* Port Type */
-+    {UTP_PORT, UTP_PORT, UTP_PORT, UTP_PORT, UTP_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT,
-+     UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT,
-+     EXT_PORT, EXT_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT,
-+     UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT},
-+
-+    /* PTP port */
-+    {1, 1, 1, 1, 1, 0, 0, 0,
-+     0, 0, 0, 0, 0, 0, 0, 0,
-+     0, 0, 0, 0, 0, 0, 0, 0,
-+     0, 0, 0, 0, 0, 0, 0, 0 },
-+
-+    /* Valid port mask */
-+    ( (0x1 << UTP_PORT0) | (0x1 << UTP_PORT1) | (0x1 << UTP_PORT2) | (0x1 << UTP_PORT3) | (0x1 << UTP_PORT4) | (0x1 << EXT_PORT0) | (0x1 << EXT_PORT1) ),
-+
-+    /* Valid UTP port mask */
-+    ( (0x1 << UTP_PORT0) | (0x1 << UTP_PORT1) | (0x1 << UTP_PORT2) | (0x1 << UTP_PORT3) | (0x1 << UTP_PORT4) ),
-+
-+    /* Valid EXT port mask */
-+    ( (0x1 << EXT_PORT0) | (0x1 << EXT_PORT1) ),
-+
-+    /* Valid CPU port mask */
-+    0x00,
-+
-+    /* Minimum physical port number */
-+    0,
-+
-+    /* Maxmum physical port number */
-+    7,
-+
-+    /* Physical port mask */
-+    0xDF,
-+
-+    /* Combo Logical port ID */
-+    4,
-+
-+    /* HSG Logical port ID */
-+    EXT_PORT0,
-+
-+    /* SGMII Logical portmask */
-+    (0x1 << EXT_PORT0),
-+
-+    /* Max Meter ID */
-+    31,
-+
-+    /* MAX LUT Address Number */
-+    2112,
-+
-+    /* Trunk Group Mask */
-+    0x03
-+};
-+#endif
-+
-+#if (AUTO_PROBE || defined(FORCE_PROBE_RTL8370B))
-+static rtk_switch_halCtrl_t rtl8370b_hal_Ctrl =
-+{
-+    /* Switch Chip */
-+    CHIP_RTL8370B,
-+
-+    /* Logical to Physical */
-+    {0, 1, 2, 3, 4, 5, 6, 7, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-+     8, 9, 10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF },
-+
-+    /* Physical to Logical */
-+    {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UTP_PORT5, UTP_PORT6, UTP_PORT7,
-+     EXT_PORT0, EXT_PORT1, EXT_PORT2, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT,
-+     UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT,
-+     UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT},
-+
-+    /* Port Type */
-+    {UTP_PORT, UTP_PORT, UTP_PORT, UTP_PORT, UTP_PORT, UTP_PORT, UTP_PORT, UTP_PORT,
-+     UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT,
-+     EXT_PORT, EXT_PORT, EXT_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT,
-+     UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT},
-+
-+    /* PTP port */
-+    {1, 1, 1, 1, 1, 1, 1, 1,
-+     0, 0, 0, 0, 0, 0, 0, 0,
-+     1, 1, 0, 0, 0, 0, 0, 0,
-+     0, 0, 0, 0, 0, 0, 0, 0 },
-+
-+    /* Valid port mask */
-+    ( (0x1 << UTP_PORT0) | (0x1 << UTP_PORT1) | (0x1 << UTP_PORT2) | (0x1 << UTP_PORT3) | (0x1 << UTP_PORT4) | (0x1 << UTP_PORT5) | (0x1 << UTP_PORT6) | (0x1 << UTP_PORT7) | (0x1 << EXT_PORT0) | (0x1 << EXT_PORT1) | (0x1 << EXT_PORT2) ),
-+
-+    /* Valid UTP port mask */
-+    ( (0x1 << UTP_PORT0) | (0x1 << UTP_PORT1) | (0x1 << UTP_PORT2) | (0x1 << UTP_PORT3) | (0x1 << UTP_PORT4) | (0x1 << UTP_PORT5) | (0x1 << UTP_PORT6) | (0x1 << UTP_PORT7) ),
-+
-+    /* Valid EXT port mask */
-+    ( (0x1 << EXT_PORT0) | (0x1 << EXT_PORT1) | (0x1 << EXT_PORT2) ),
-+
-+    /* Valid CPU port mask */
-+    (0x1 << EXT_PORT2),
-+
-+    /* Minimum physical port number */
-+    0,
-+
-+    /* Maxmum physical port number */
-+    10,
-+
-+    /* Physical port mask */
-+    0x7FF,
-+
-+    /* Combo Logical port ID */
-+    7,
-+
-+    /* HSG Logical port ID */
-+    EXT_PORT1,
-+
-+    /* SGMII Logical portmask */
-+    ( (0x1 << EXT_PORT0) | (0x1 << EXT_PORT1) ),
-+
-+    /* Max Meter ID */
-+    63,
-+
-+    /* MAX LUT Address Number 4096 + 64*/
-+    4160,
-+
-+    /* Trunk Group Mask */
-+    0x07
-+};
-+#endif
-+
-+#if (AUTO_PROBE || defined(FORCE_PROBE_RTL8364B))
-+static rtk_switch_halCtrl_t rtl8364b_hal_Ctrl =
-+{
-+    /* Switch Chip */
-+    CHIP_RTL8364B,
-+
-+    /* Logical to Physical */
-+    {0xFF, 1, 0xFF, 3, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-+     6, 7, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF },
-+
-+    /* Physical to Logical */
-+    {UNDEFINE_PORT, UTP_PORT1, UNDEFINE_PORT, UTP_PORT3, UNDEFINE_PORT, UNDEFINE_PORT, EXT_PORT0, EXT_PORT1,
-+     UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT,
-+     UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT,
-+     UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT},
-+
-+    /* Port Type */
-+    {UNKNOWN_PORT, UTP_PORT, UNKNOWN_PORT, UTP_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT,
-+     UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT,
-+     EXT_PORT, EXT_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT,
-+     UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT},
-+
-+    /* PTP port */
-+    {0, 0, 0, 0, 0, 0, 0, 0,
-+     0, 0, 0, 0, 0, 0, 0, 0,
-+     0, 0, 0, 0, 0, 0, 0, 0,
-+     0, 0, 0, 0, 0, 0, 0, 0 },
-+
-+    /* Valid port mask */
-+    ( (0x1 << UTP_PORT1) | (0x1 << UTP_PORT3) | (0x1 << EXT_PORT0) | (0x1 << EXT_PORT1) ),
-+
-+    /* Valid UTP port mask */
-+    ( (0x1 << UTP_PORT1) | (0x1 << UTP_PORT3) ),
-+
-+    /* Valid EXT port mask */
-+    ( (0x1 << EXT_PORT0) | (0x1 << EXT_PORT1) ),
-+
-+    /* Valid CPU port mask */
-+    0x00,
-+
-+    /* Minimum physical port number */
-+    0,
-+
-+    /* Maxmum physical port number */
-+    7,
-+
-+    /* Physical port mask */
-+    0xCA,
-+
-+    /* Combo Logical port ID */
-+    4,
-+
-+    /* HSG Logical port ID */
-+    EXT_PORT0,
-+
-+    /* SGMII Logical portmask */
-+    ( (0x1 << EXT_PORT0) | (0x1 << EXT_PORT1) ),
-+
-+    /* Max Meter ID */
-+    32,
-+
-+    /* MAX LUT Address Number */
-+    2112,
-+
-+    /* Trunk Group Mask */
-+    0x01
-+};
-+#endif
-+
-+#if (AUTO_PROBE || defined(FORCE_PROBE_RTL8363SC_VB))
-+static rtk_switch_halCtrl_t rtl8363sc_vb_hal_Ctrl =
-+{
-+    /* Switch Chip */
-+    CHIP_RTL8363SC_VB,
-+
-+    /* Logical to Physical */
-+    {0xFF, 0xFF, 1, 3, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-+     6, 7, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF },
-+
-+    /* Physical to Logical */
-+    {UNDEFINE_PORT, UTP_PORT2, UNDEFINE_PORT, UTP_PORT3, UNDEFINE_PORT, UNDEFINE_PORT, EXT_PORT0, EXT_PORT1,
-+     UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT,
-+     UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT,
-+     UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT, UNDEFINE_PORT},
-+
-+    /* Port Type */
-+    {UNKNOWN_PORT, UNKNOWN_PORT, UTP_PORT, UTP_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT,
-+     UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT,
-+     EXT_PORT, EXT_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT,
-+     UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT, UNKNOWN_PORT},
-+
-+    /* PTP port */
-+    {0, 0, 0, 0, 0, 0, 0, 0,
-+     0, 0, 0, 0, 0, 0, 0, 0,
-+     0, 0, 0, 0, 0, 0, 0, 0,
-+     0, 0, 0, 0, 0, 0, 0, 0 },
-+
-+    /* Valid port mask */
-+    ( (0x1 << UTP_PORT2) | (0x1 << UTP_PORT3) | (0x1 << EXT_PORT0) | (0x1 << EXT_PORT1) ),
-+
-+    /* Valid UTP port mask */
-+    ( (0x1 << UTP_PORT2) | (0x1 << UTP_PORT3) ),
-+
-+    /* Valid EXT port mask */
-+    ( (0x1 << EXT_PORT0) | (0x1 << EXT_PORT1) ),
-+
-+    /* Valid CPU port mask */
-+    0x00,
-+
-+    /* Minimum physical port number */
-+    0,
-+
-+    /* Maxmum physical port number */
-+    7,
-+
-+    /* Physical port mask */
-+    0xCA,
-+
-+    /* Combo Logical port ID */
-+    4,
-+
-+    /* HSG Logical port ID */
-+    EXT_PORT0,
-+
-+    /* SGMII Logical portmask */
-+    ( (0x1 << EXT_PORT0) | (0x1 << EXT_PORT1) ),
-+
-+    /* Max Meter ID */
-+    32,
-+
-+    /* MAX LUT Address Number */
-+    2112,
-+
-+    /* Trunk Group Mask */
-+    0x01
-+};
-+#endif
-+
-+#if defined(FORCE_PROBE_RTL8367C)
-+static rtk_switch_halCtrl_t *halCtrl = &rtl8367c_hal_Ctrl;
-+#elif defined(FORCE_PROBE_RTL8370B)
-+static rtk_switch_halCtrl_t *halCtrl = &rtl8370b_hal_Ctrl;
-+#elif defined(FORCE_PROBE_RTL8364B)
-+static rtk_switch_halCtrl_t *halCtrl = &rtl8364b_hal_Ctrl;
-+#elif defined(FORCE_PROBE_RTL8363SC_VB)
-+static rtk_switch_halCtrl_t *halCtrl = &rtl8363sc_vb_hal_Ctrl;
-+#else
-+static rtk_switch_halCtrl_t *halCtrl = NULL;
-+#endif
-+
-+static rtk_uint32 PatchChipData[210][2] =
-+{
-+        {0xa436, 0x8028}, {0xa438, 0x6800}, {0xb82e, 0x0001}, {0xa436, 0xb820}, {0xa438, 0x0090}, {0xa436, 0xa012}, {0xa438, 0x0000}, {0xa436, 0xa014}, {0xa438, 0x2c04}, {0xa438, 0x2c6c},
-+        {0xa438, 0x2c75}, {0xa438, 0x2c77}, {0xa438, 0x1414}, {0xa438, 0x1579}, {0xa438, 0x1536}, {0xa438, 0xc432}, {0xa438, 0x32c0}, {0xa438, 0x42d6}, {0xa438, 0x32b5}, {0xa438, 0x003e},
-+        {0xa438, 0x614c}, {0xa438, 0x1569}, {0xa438, 0xd705}, {0xa438, 0x318c}, {0xa438, 0x42d6}, {0xa438, 0xd702}, {0xa438, 0x31ef}, {0xa438, 0x42d6}, {0xa438, 0x629c}, {0xa438, 0x2c04},
-+        {0xa438, 0x653c}, {0xa438, 0x422a}, {0xa438, 0x5d83}, {0xa438, 0xd06a}, {0xa438, 0xd1b0}, {0xa438, 0x1536}, {0xa438, 0xc43a}, {0xa438, 0x32c0}, {0xa438, 0x42d6}, {0xa438, 0x32b5},
-+        {0xa438, 0x003e}, {0xa438, 0x314a}, {0xa438, 0x42fe}, {0xa438, 0x337b}, {0xa438, 0x02d6}, {0xa438, 0x3063}, {0xa438, 0x0c1b}, {0xa438, 0x22fe}, {0xa438, 0xc435}, {0xa438, 0xd0be},
-+        {0xa438, 0xd1f7}, {0xa438, 0xe0f0}, {0xa438, 0x1a40}, {0xa438, 0xa320}, {0xa438, 0xd702}, {0xa438, 0x154a}, {0xa438, 0xc434}, {0xa438, 0x32c0}, {0xa438, 0x42d6}, {0xa438, 0x32b5},
-+        {0xa438, 0x003e}, {0xa438, 0x60ec}, {0xa438, 0x1569}, {0xa438, 0xd705}, {0xa438, 0x619f}, {0xa438, 0xd702}, {0xa438, 0x414f}, {0xa438, 0x2c2e}, {0xa438, 0x610a}, {0xa438, 0xd705},
-+        {0xa438, 0x5e1f}, {0xa438, 0xc43f}, {0xa438, 0xc88b}, {0xa438, 0xd702}, {0xa438, 0x7fe0}, {0xa438, 0x22f3}, {0xa438, 0xd0a0}, {0xa438, 0xd1b2}, {0xa438, 0xd0c3}, {0xa438, 0xd1c3},
-+        {0xa438, 0x8d01}, {0xa438, 0x1536}, {0xa438, 0xc438}, {0xa438, 0xe0f0}, {0xa438, 0x1a80}, {0xa438, 0xd706}, {0xa438, 0x60c0}, {0xa438, 0xd710}, {0xa438, 0x409e}, {0xa438, 0xa804},
-+        {0xa438, 0xad01}, {0xa438, 0x8804}, {0xa438, 0xd702}, {0xa438, 0x32c0}, {0xa438, 0x42d6}, {0xa438, 0x32b5}, {0xa438, 0x003e}, {0xa438, 0x405b}, {0xa438, 0x1576}, {0xa438, 0x7c9c},
-+        {0xa438, 0x60ec}, {0xa438, 0x1569}, {0xa438, 0xd702}, {0xa438, 0x5d43}, {0xa438, 0x31ef}, {0xa438, 0x02fe}, {0xa438, 0x22d6}, {0xa438, 0x590a}, {0xa438, 0xd706}, {0xa438, 0x5c80},
-+        {0xa438, 0xd702}, {0xa438, 0x5c44}, {0xa438, 0x3063}, {0xa438, 0x02d6}, {0xa438, 0x5be2}, {0xa438, 0x22fb}, {0xa438, 0xa240}, {0xa438, 0xa104}, {0xa438, 0x8c03}, {0xa438, 0x8178},
-+        {0xa438, 0xd701}, {0xa438, 0x31ad}, {0xa438, 0x4917}, {0xa438, 0x8102}, {0xa438, 0x2917}, {0xa438, 0xc302}, {0xa438, 0x268a}, {0xa436, 0xA01A}, {0xa438, 0x0000}, {0xa436, 0xA006},
-+        {0xa438, 0x0fff}, {0xa436, 0xA004}, {0xa438, 0x0689}, {0xa436, 0xA002}, {0xa438, 0x0911}, {0xa436, 0xA000}, {0xa438, 0x7302}, {0xa436, 0xB820}, {0xa438, 0x0010}, {0xa436, 0x8412},
-+        {0xa438, 0xaf84}, {0xa438, 0x1eaf}, {0xa438, 0x8427}, {0xa438, 0xaf84}, {0xa438, 0x27af}, {0xa438, 0x8427}, {0xa438, 0x0251}, {0xa438, 0x6802}, {0xa438, 0x8427}, {0xa438, 0xaf04},
-+        {0xa438, 0x0af8}, {0xa438, 0xf9bf}, {0xa438, 0x5581}, {0xa438, 0x0255}, {0xa438, 0x27ef}, {0xa438, 0x310d}, {0xa438, 0x345b}, {0xa438, 0x0fa3}, {0xa438, 0x032a}, {0xa438, 0xe087},
-+        {0xa438, 0xffac}, {0xa438, 0x2040}, {0xa438, 0xbf56}, {0xa438, 0x7402}, {0xa438, 0x5527}, {0xa438, 0xef31}, {0xa438, 0xef20}, {0xa438, 0xe787}, {0xa438, 0xfee6}, {0xa438, 0x87fd},
-+        {0xa438, 0xd488}, {0xa438, 0x88bf}, {0xa438, 0x5674}, {0xa438, 0x0254}, {0xa438, 0xe3e0}, {0xa438, 0x87ff}, {0xa438, 0xf720}, {0xa438, 0xe487}, {0xa438, 0xffaf}, {0xa438, 0x847e},
-+        {0xa438, 0xe087}, {0xa438, 0xffad}, {0xa438, 0x2016}, {0xa438, 0xe387}, {0xa438, 0xfee2}, {0xa438, 0x87fd}, {0xa438, 0xef45}, {0xa438, 0xbf56}, {0xa438, 0x7402}, {0xa438, 0x54e3},
-+        {0xa438, 0xe087}, {0xa438, 0xfff6}, {0xa438, 0x20e4}, {0xa438, 0x87ff}, {0xa438, 0xfdfc}, {0xa438, 0x0400}, {0xa436, 0xb818}, {0xa438, 0x0407}, {0xa436, 0xb81a}, {0xa438, 0xfffd},
-+        {0xa436, 0xb81c}, {0xa438, 0xfffd}, {0xa436, 0xb81e}, {0xa438, 0xfffd}, {0xa436, 0xb832}, {0xa438, 0x0001}, {0xb820, 0x0000}, {0xb82e, 0x0000}, {0xa436, 0x8028}, {0xa438, 0x0000}
-+};
-+
-+static rtk_api_ret_t _rtk_switch_init_8367c(void)
-+{
-+    rtk_port_t port;
-+    rtk_uint32 retVal;
-+    rtk_uint32 regData;
-+    rtk_uint32 regValue;
-+
-+    if( (retVal = rtl8367c_setAsicReg(0x13c2, 0x0249)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if( (retVal = rtl8367c_getAsicReg(0x1301, &regValue)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if( (retVal = rtl8367c_setAsicReg(0x13c2, 0x0000)) != RT_ERR_OK)
-+        return retVal;
-+
-+    RTK_SCAN_ALL_LOG_PORT(port)
-+    {
-+         if(rtk_switch_isUtpPort(port) == RT_ERR_OK)
-+         {
-+             if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_PORT0_EEECFG + (0x20 * port), RTL8367C_PORT0_EEECFG_EEE_100M_OFFSET, 1)) != RT_ERR_OK)
-+                 return retVal;
-+
-+             if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_PORT0_EEECFG + (0x20 * port), RTL8367C_PORT0_EEECFG_EEE_GIGA_500M_OFFSET, 1)) != RT_ERR_OK)
-+                 return retVal;
-+
-+             if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_PORT0_EEECFG + (0x20 * port), RTL8367C_PORT0_EEECFG_EEE_TX_OFFSET, 1)) != RT_ERR_OK)
-+                 return retVal;
-+
-+             if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_PORT0_EEECFG + (0x20 * port), RTL8367C_PORT0_EEECFG_EEE_RX_OFFSET, 1)) != RT_ERR_OK)
-+                 return retVal;
-+
-+             if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xA428, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+             regData &= ~(0x0200);
-+             if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xA428, regData)) != RT_ERR_OK)
-+                 return retVal;
-+
-+             if((regValue & 0x00F0) == 0x00A0)
-+             {
-+                 if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xA5D0, &regData)) != RT_ERR_OK)
-+                     return retVal;
-+
-+                 regData |= 0x0006;
-+                 if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xA5D0, regData)) != RT_ERR_OK)
-+                     return retVal;
-+             }
-+         }
-+    }
-+
-+    if((retVal = rtl8367c_setAsicReg(RTL8367C_REG_UTP_FIB_DET, 0x15BB)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x1303, 0x06D6)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x1304, 0x0700)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13E2, 0x003F)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13F9, 0x0090)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x121e, 0x03CA)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x1233, 0x0352)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x1237, 0x00a0)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x123a, 0x0030)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x1239, 0x0084)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x0301, 0x1000)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x1349, 0x001F)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicRegBit(0x18e0, 0, 0)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicRegBit(0x122b, 14, 1)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicRegBits(0x1305, 0xC000, 3)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+static rtk_api_ret_t _rtk_switch_init_8370b(void)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData, tmp = 0;
-+    rtk_uint32 i, prf, counter;
-+    rtk_uint32 long_link[8] = {0x0210, 0x03e8, 0x0218, 0x03f0, 0x0220, 0x03f8, 0x0208, 0x03e0 };
-+
-+    if((retVal = rtl8367c_setAsicRegBits(0x1205, 0x0300, 3)) != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    for(i=0; i<8; i++)
-+    {
-+      if ((retVal = rtl8367c_getAsicPHYOCPReg(i, 0xa420, &regData)) != RT_ERR_OK)
-+          return retVal;
-+        tmp = regData & 0x7 ;
-+       if(tmp == 0x3)
-+       {
-+           prf = 1;
-+           if((retVal = rtl8367c_setAsicPHYOCPReg(i, 0xb83e, 0x6fa9)) != RT_ERR_OK)
-+              return retVal;
-+           if((retVal = rtl8367c_setAsicPHYOCPReg(i, 0xb840, 0xa9)) != RT_ERR_OK)
-+               return retVal;
-+           for(counter = 0; counter < 10000; counter++); //delay
-+
-+           if ((retVal = rtl8367c_getAsicPHYOCPReg(i, 0xb820, &regData)) != RT_ERR_OK)
-+               return retVal;
-+           tmp = regData | 0x10;
-+           if ((retVal = rtl8367c_setAsicPHYOCPReg(i, 0xb820, tmp)) != RT_ERR_OK)
-+               return retVal;
-+           for(counter = 0; counter < 10000; counter++); //delay
-+           counter = 0;
-+           do{
-+              counter = counter + 1;
-+              if ((retVal = rtl8367c_getAsicPHYOCPReg(i, 0xb800, &regData)) != RT_ERR_OK)
-+                   return retVal;
-+              tmp = regData & 0x40;
-+              if(tmp != 0)
-+                break;
-+           } while (counter < 20);   //Wait for patch ready = 1...
-+       }
-+   }
-+    if ((retVal = rtl8367c_getAsicReg(0x1d01, &regData)) != RT_ERR_OK)
-+        return retVal;
-+    tmp = regData;
-+    tmp = tmp | 0x3BE0; /*Broadcast port enable*/
-+    tmp = tmp & 0xFFE0; /*Phy_id = 0 */
-+    if((retVal = rtl8367c_setAsicReg(0x1d01, tmp)) != RT_ERR_OK)
-+        return retVal;
-+
-+    for(i=0;i < 210; i++)
-+    {
-+        if((retVal = rtl8367c_setAsicPHYOCPReg(0, PatchChipData[i][0], PatchChipData[i][1])) != RT_ERR_OK)
-+             return retVal;
-+    }
-+
-+   if((retVal = rtl8367c_setAsicReg(0x1d01, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    for(i=0; i < 8; i++)
-+    {
-+        if((retVal = rtl8367c_setAsicPHYOCPReg(i, 0xa4b4, long_link[i])) != RT_ERR_OK)
-+             return retVal;
-+    }
-+
-+  if (prf == 0x1)
-+     {
-+        for(i=0; i<8; i++)
-+        {
-+         if ((retVal = rtl8367c_getAsicPHYOCPReg(i, 0xb820, &regData)) != RT_ERR_OK)
-+             return retVal;
-+       tmp = regData & 0xFFEF;
-+       if ((retVal = rtl8367c_setAsicPHYOCPReg(i, 0xb820, tmp)) != RT_ERR_OK)
-+             return retVal;
-+
-+       for(counter = 0; counter < 10000; counter++); //delay
-+
-+       counter = 0;
-+       do{
-+            counter = counter + 1;
-+            if ((retVal = rtl8367c_getAsicPHYOCPReg(i, 0xb800, &regData)) != RT_ERR_OK)
-+              return retVal;
-+            tmp = regData & 0x40;
-+            if( tmp == 0 )
-+               break;
-+       } while (counter < 20);   //Wait for patch ready = 1...
-+      if ((retVal = rtl8367c_setAsicPHYOCPReg(i, 0xb83e, 0x6f48)) != RT_ERR_OK)
-+          return retVal;
-+      if ((retVal = rtl8367c_setAsicPHYOCPReg(i, 0xb840, 0xfa)) != RT_ERR_OK)
-+          return retVal;
-+          }
-+   }
-+
-+    /*Check phy link status*/
-+    for(i=0; i<8; i++)
-+    {
-+      if ((retVal = rtl8367c_getAsicPHYOCPReg(i, 0xa400, &regData)) != RT_ERR_OK)
-+          return retVal;
-+      tmp = regData & 0x800;
-+        if(tmp == 0x0)
-+            {
-+              tmp = regData | 0x200;
-+          if ((retVal = rtl8367c_setAsicPHYOCPReg(i, 0xa400, tmp)) != RT_ERR_OK)
-+             return retVal;
-+            }
-+    }
-+
-+  for(counter = 0; counter < 10000; counter++); //delay
-+
-+  return RT_ERR_OK;
-+}
-+
-+static rtk_api_ret_t _rtk_switch_init_8364b(void)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    /*enable EEE, include mac & phy*/
-+
-+    if ((retVal = rtl8367c_setAsicRegBits(0x38, 0x300, 3)) != RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_setAsicRegBits(0x78, 0x300, 3)) != RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_setAsicRegBits(0xd8, 0x300, 0)) != RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_setAsicRegBits(0xf8, 0x300, 0)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicPHYOCPReg(1, 0xa5d0, 6)) != RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_setAsicPHYOCPReg(3, 0xa5d0, 6)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*PAD para*/
-+
-+    /*EXT1 PAD Para*/
-+    if ((retVal = rtl8367c_getAsicReg(0x1303, &regData)) != RT_ERR_OK)
-+        return retVal;
-+    regData &= 0xFFFFFFFE;
-+    regData |= 0x250;
-+    if((retVal = rtl8367c_setAsicReg(0x1303, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicRegBits(0x1304, 0x7000, 0)) != RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_setAsicRegBits(0x1304, 0x700, 7)) != RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_setAsicRegBits(0x13f9, 0x38, 0)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*EXT2 PAD Para*/
-+    if ((retVal = rtl8367c_setAsicRegBit(0x1303, 10, 1)) != RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_setAsicRegBits(0x13E2, 0x1ff, 0x26)) != RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_setAsicRegBits(0x13f9, 0x1c0, 0)) != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    /*SDS PATCH*/
-+    /*SP_CFG_EN_LINK_FIB1G*/
-+    if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &regData)) != RT_ERR_OK)
-+        return retVal;
-+    regData |= 0x4;
-+    if((retVal = rtl8367c_setAsicSdsReg(0,4,0, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*FIB100 Down-speed*/
-+    if((retVal = rtl8367c_getAsicSdsReg(0, 1, 0, &regData)) != RT_ERR_OK)
-+        return retVal;
-+    regData |= 0x20;
-+    if((retVal = rtl8367c_setAsicSdsReg(0,1,0, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+static rtk_api_ret_t _rtk_switch_init_8363sc_vb(void)
-+{
-+
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    /*enable EEE, include mac & phy*/
-+
-+    if ((retVal = rtl8367c_setAsicRegBits(0x38, 0x300, 3)) != RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_setAsicRegBits(0x78, 0x300, 3)) != RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_setAsicRegBits(0xd8, 0x300, 0)) != RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_setAsicRegBits(0xf8, 0x300, 0)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicPHYOCPReg(1, 0xa5d0, 6)) != RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_setAsicPHYOCPReg(3, 0xa5d0, 6)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*PAD para*/
-+
-+    /*EXT1 PAD Para*/
-+    if ((retVal = rtl8367c_getAsicReg(0x1303, &regData)) != RT_ERR_OK)
-+        return retVal;
-+    regData &= 0xFFFFFFFE;
-+    regData |= 0x250;
-+    if((retVal = rtl8367c_setAsicReg(0x1303, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicRegBits(0x1304, 0x7000, 0)) != RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_setAsicRegBits(0x1304, 0x700, 7)) != RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_setAsicRegBits(0x13f9, 0x38, 0)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*EXT2 PAD Para*/
-+    if ((retVal = rtl8367c_setAsicRegBit(0x1303, 10, 1)) != RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_setAsicRegBits(0x13E2, 0x1ff, 0x26)) != RT_ERR_OK)
-+        return retVal;
-+    if ((retVal = rtl8367c_setAsicRegBits(0x13f9, 0x1c0, 0)) != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    /*SDS PATCH*/
-+    /*SP_CFG_EN_LINK_FIB1G*/
-+    if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &regData)) != RT_ERR_OK)
-+        return retVal;
-+    regData |= 0x4;
-+    if((retVal = rtl8367c_setAsicSdsReg(0,4,0, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*FIB100 Down-speed*/
-+    if((retVal = rtl8367c_getAsicSdsReg(0, 1, 0, &regData)) != RT_ERR_OK)
-+        return retVal;
-+    regData |= 0x20;
-+    if((retVal = rtl8367c_setAsicSdsReg(0,1,0, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_probe
-+ * Description:
-+ *      Probe switch
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Switch probed
-+ *      RT_ERR_FAILED   - Switch Unprobed.
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_switch_probe(switch_chip_t *pSwitchChip)
-+{
-+#if defined(FORCE_PROBE_RTL8367C)
-+
-+    *pSwitchChip = CHIP_RTL8367C;
-+    halCtrl = &rtl8367c_hal_Ctrl;
-+
-+#elif defined(FORCE_PROBE_RTL8370B)
-+
-+    *pSwitchChip = CHIP_RTL8370B;
-+    halCtrl = &rtl8370b_hal_Ctrl;
-+
-+#elif defined(FORCE_PROBE_RTL8364B)
-+
-+    *pSwitchChip = CHIP_RTL8364B;
-+    halCtrl = &rtl8364b_hal_Ctrl;
-+
-+#elif defined(FORCE_PROBE_RTL8363SC_VB)
-+
-+    *pSwitchChip = CHIP_RTL8363SC_VB;
-+    halCtrl = &rtl8363sc_vb_hal_Ctrl;
-+
-+#else
-+    rtk_uint32 retVal;
-+    rtk_uint32 data, regValue;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicReg(0x1300, &data)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicReg(0x1301, &regValue)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0000)) != RT_ERR_OK)
-+        return retVal;
-+
-+    switch (data)
-+    {
-+        case 0x0276:
-+        case 0x0597:
-+        case 0x6367:
-+            *pSwitchChip = CHIP_RTL8367C;
-+            halCtrl = &rtl8367c_hal_Ctrl;
-+            break;
-+        case 0x0652:
-+        case 0x6368:
-+            *pSwitchChip = CHIP_RTL8370B;
-+            halCtrl = &rtl8370b_hal_Ctrl;
-+            break;
-+        case 0x0801:
-+        case 0x6511:
-+            if( (regValue & 0x00F0) == 0x0080)
-+            {
-+                *pSwitchChip = CHIP_RTL8363SC_VB;
-+                halCtrl = &rtl8363sc_vb_hal_Ctrl;
-+            }
-+            else
-+            {
-+                *pSwitchChip = CHIP_RTL8364B;
-+                halCtrl = &rtl8364b_hal_Ctrl;
-+            }
-+            break;
-+        default:
-+            return RT_ERR_FAILED;
-+    }
-+#endif
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_initialState_set
-+ * Description:
-+ *      Set initial status
-+ * Input:
-+ *      state   - Initial state;
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Initialized
-+ *      RT_ERR_FAILED   - Uninitialized
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_switch_initialState_set(init_state_t state)
-+{
-+    if(state >= INIT_STATE_END)
-+        return RT_ERR_FAILED;
-+
-+    init_state = state;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_initialState_get
-+ * Description:
-+ *      Get initial status
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      INIT_COMPLETED     - Initialized
-+ *      INIT_NOT_COMPLETED - Uninitialized
-+ * Note:
-+ *
-+ */
-+init_state_t rtk_switch_initialState_get(void)
-+{
-+    return init_state;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_logicalPortCheck
-+ * Description:
-+ *      Check logical port ID.
-+ * Input:
-+ *      logicalPort     - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Port ID is correct
-+ *      RT_ERR_FAILED   - Port ID is not correct
-+ *      RT_ERR_NOT_INIT - Not Initialize
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_switch_logicalPortCheck(rtk_port_t logicalPort)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return RT_ERR_NOT_INIT;
-+
-+    if(logicalPort >= RTK_SWITCH_PORT_NUM)
-+        return RT_ERR_FAILED;
-+
-+    if(halCtrl->l2p_port[logicalPort] == 0xFF)
-+        return RT_ERR_FAILED;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_isUtpPort
-+ * Description:
-+ *      Check is logical port a UTP port
-+ * Input:
-+ *      logicalPort     - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Port ID is a UTP port
-+ *      RT_ERR_FAILED   - Port ID is not a UTP port
-+ *      RT_ERR_NOT_INIT - Not Initialize
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_switch_isUtpPort(rtk_port_t logicalPort)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return RT_ERR_NOT_INIT;
-+
-+    if(logicalPort >= RTK_SWITCH_PORT_NUM)
-+        return RT_ERR_FAILED;
-+
-+    if(halCtrl->log_port_type[logicalPort] == UTP_PORT)
-+        return RT_ERR_OK;
-+    else
-+        return RT_ERR_FAILED;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_isExtPort
-+ * Description:
-+ *      Check is logical port a Extension port
-+ * Input:
-+ *      logicalPort     - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Port ID is a EXT port
-+ *      RT_ERR_FAILED   - Port ID is not a EXT port
-+ *      RT_ERR_NOT_INIT - Not Initialize
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_switch_isExtPort(rtk_port_t logicalPort)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return RT_ERR_NOT_INIT;
-+
-+    if(logicalPort >= RTK_SWITCH_PORT_NUM)
-+        return RT_ERR_FAILED;
-+
-+    if(halCtrl->log_port_type[logicalPort] == EXT_PORT)
-+        return RT_ERR_OK;
-+    else
-+        return RT_ERR_FAILED;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_switch_isHsgPort
-+ * Description:
-+ *      Check is logical port a HSG port
-+ * Input:
-+ *      logicalPort     - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Port ID is a HSG port
-+ *      RT_ERR_FAILED   - Port ID is not a HSG port
-+ *      RT_ERR_NOT_INIT - Not Initialize
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_switch_isHsgPort(rtk_port_t logicalPort)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return RT_ERR_NOT_INIT;
-+
-+    if(logicalPort >= RTK_SWITCH_PORT_NUM)
-+        return RT_ERR_FAILED;
-+
-+    if(logicalPort == halCtrl->hsg_logical_port)
-+        return RT_ERR_OK;
-+    else
-+        return RT_ERR_FAILED;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_isSgmiiPort
-+ * Description:
-+ *      Check is logical port a SGMII port
-+ * Input:
-+ *      logicalPort     - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Port ID is a SGMII port
-+ *      RT_ERR_FAILED   - Port ID is not a SGMII port
-+ *      RT_ERR_NOT_INIT - Not Initialize
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_switch_isSgmiiPort(rtk_port_t logicalPort)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return RT_ERR_NOT_INIT;
-+
-+    if(logicalPort >= RTK_SWITCH_PORT_NUM)
-+        return RT_ERR_FAILED;
-+
-+    if( ((0x01 << logicalPort) & halCtrl->sg_logical_portmask) != 0)
-+        return RT_ERR_OK;
-+    else
-+        return RT_ERR_FAILED;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_isCPUPort
-+ * Description:
-+ *      Check is logical port a CPU port
-+ * Input:
-+ *      logicalPort     - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Port ID is a CPU port
-+ *      RT_ERR_FAILED   - Port ID is not a CPU port
-+ *      RT_ERR_NOT_INIT - Not Initialize
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_switch_isCPUPort(rtk_port_t logicalPort)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return RT_ERR_NOT_INIT;
-+
-+    if(logicalPort >= RTK_SWITCH_PORT_NUM)
-+        return RT_ERR_FAILED;
-+
-+    if( ((0x01 << logicalPort) & halCtrl->valid_cpu_portmask) != 0)
-+        return RT_ERR_OK;
-+    else
-+        return RT_ERR_FAILED;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_isComboPort
-+ * Description:
-+ *      Check is logical port a Combo port
-+ * Input:
-+ *      logicalPort     - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Port ID is a combo port
-+ *      RT_ERR_FAILED   - Port ID is not a combo port
-+ *      RT_ERR_NOT_INIT - Not Initialize
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_switch_isComboPort(rtk_port_t logicalPort)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return RT_ERR_NOT_INIT;
-+
-+    if(logicalPort >= RTK_SWITCH_PORT_NUM)
-+        return RT_ERR_FAILED;
-+
-+    if(halCtrl->combo_logical_port == logicalPort)
-+        return RT_ERR_OK;
-+    else
-+        return RT_ERR_FAILED;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_ComboPort_get
-+ * Description:
-+ *      Get Combo port ID
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      Port ID of combo port
-+ * Note:
-+ *
-+ */
-+rtk_uint32 rtk_switch_ComboPort_get(void)
-+{
-+    return halCtrl->combo_logical_port;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_isPtpPort
-+ * Description:
-+ *      Check is logical port a PTP port
-+ * Input:
-+ *      logicalPort     - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Port ID is a PTP port
-+ *      RT_ERR_FAILED   - Port ID is not a PTP port
-+ *      RT_ERR_NOT_INIT - Not Initialize
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_switch_isPtpPort(rtk_port_t logicalPort)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return RT_ERR_NOT_INIT;
-+
-+    if(logicalPort >= RTK_SWITCH_PORT_NUM)
-+        return RT_ERR_FAILED;
-+
-+    if(halCtrl->ptp_port[logicalPort] == 1)
-+        return RT_ERR_OK;
-+    else
-+        return RT_ERR_FAILED;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_port_L2P_get
-+ * Description:
-+ *      Get physical port ID
-+ * Input:
-+ *      logicalPort       - logical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      Physical port ID
-+ * Note:
-+ *
-+ */
-+rtk_uint32 rtk_switch_port_L2P_get(rtk_port_t logicalPort)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return UNDEFINE_PHY_PORT;
-+
-+    if(logicalPort >= RTK_SWITCH_PORT_NUM)
-+        return UNDEFINE_PHY_PORT;
-+
-+    return (halCtrl->l2p_port[logicalPort]);
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_port_P2L_get
-+ * Description:
-+ *      Get logical port ID
-+ * Input:
-+ *      physicalPort       - physical port ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      logical port ID
-+ * Note:
-+ *
-+ */
-+rtk_port_t rtk_switch_port_P2L_get(rtk_uint32 physicalPort)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return UNDEFINE_PORT;
-+
-+    if(physicalPort >= RTK_SWITCH_PORT_NUM)
-+        return UNDEFINE_PORT;
-+
-+    return (halCtrl->p2l_port[physicalPort]);
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_isPortMaskValid
-+ * Description:
-+ *      Check portmask is valid or not
-+ * Input:
-+ *      pPmask       - logical port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - port mask is valid
-+ *      RT_ERR_FAILED       - port mask is not valid
-+ *      RT_ERR_NOT_INIT     - Not Initialize
-+ *      RT_ERR_NULL_POINTER - Null pointer
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_switch_isPortMaskValid(rtk_portmask_t *pPmask)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return RT_ERR_NOT_INIT;
-+
-+    if(NULL == pPmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if( (pPmask->bits[0] | halCtrl->valid_portmask) != halCtrl->valid_portmask )
-+        return RT_ERR_FAILED;
-+    else
-+        return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_isPortMaskUtp
-+ * Description:
-+ *      Check all ports in portmask are only UTP port
-+ * Input:
-+ *      pPmask       - logical port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Only UTP port in port mask
-+ *      RT_ERR_FAILED       - Not only UTP port in port mask
-+ *      RT_ERR_NOT_INIT     - Not Initialize
-+ *      RT_ERR_NULL_POINTER - Null pointer
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_switch_isPortMaskUtp(rtk_portmask_t *pPmask)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return RT_ERR_NOT_INIT;
-+
-+    if(NULL == pPmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if( (pPmask->bits[0] | halCtrl->valid_utp_portmask) != halCtrl->valid_utp_portmask )
-+        return RT_ERR_FAILED;
-+    else
-+        return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_isPortMaskExt
-+ * Description:
-+ *      Check all ports in portmask are only EXT port
-+ * Input:
-+ *      pPmask       - logical port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Only EXT port in port mask
-+ *      RT_ERR_FAILED       - Not only EXT port in port mask
-+ *      RT_ERR_NOT_INIT     - Not Initialize
-+ *      RT_ERR_NULL_POINTER - Null pointer
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_switch_isPortMaskExt(rtk_portmask_t *pPmask)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return RT_ERR_NOT_INIT;
-+
-+    if(NULL == pPmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if( (pPmask->bits[0] | halCtrl->valid_ext_portmask) != halCtrl->valid_ext_portmask )
-+        return RT_ERR_FAILED;
-+    else
-+        return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_portmask_L2P_get
-+ * Description:
-+ *      Get physicl portmask from logical portmask
-+ * Input:
-+ *      pLogicalPmask       - logical port mask
-+ * Output:
-+ *      pPhysicalPortmask   - physical port mask
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_NOT_INIT     - Not Initialize
-+ *      RT_ERR_NULL_POINTER - Null pointer
-+ *      RT_ERR_PORT_MASK    - Error port mask
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_switch_portmask_L2P_get(rtk_portmask_t *pLogicalPmask, rtk_uint32 *pPhysicalPortmask)
-+{
-+    rtk_uint32 log_port, phy_port;
-+
-+    if(init_state != INIT_COMPLETED)
-+        return RT_ERR_NOT_INIT;
-+
-+    if(NULL == pLogicalPmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(NULL == pPhysicalPortmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(rtk_switch_isPortMaskValid(pLogicalPmask) != RT_ERR_OK)
-+        return RT_ERR_PORT_MASK;
-+
-+    /* reset physical port mask */
-+    *pPhysicalPortmask = 0;
-+
-+    RTK_PORTMASK_SCAN((*pLogicalPmask), log_port)
-+    {
-+        phy_port = rtk_switch_port_L2P_get((rtk_port_t)log_port);
-+        *pPhysicalPortmask |= (0x0001 << phy_port);
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_portmask_P2L_get
-+ * Description:
-+ *      Get logical portmask from physical portmask
-+ * Input:
-+ *      physicalPortmask    - physical port mask
-+ * Output:
-+ *      pLogicalPmask       - logical port mask
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_NOT_INIT     - Not Initialize
-+ *      RT_ERR_NULL_POINTER - Null pointer
-+ *      RT_ERR_PORT_MASK    - Error port mask
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_switch_portmask_P2L_get(rtk_uint32 physicalPortmask, rtk_portmask_t *pLogicalPmask)
-+{
-+    rtk_uint32 log_port, phy_port;
-+
-+    if(init_state != INIT_COMPLETED)
-+        return RT_ERR_NOT_INIT;
-+
-+    if(NULL == pLogicalPmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    RTK_PORTMASK_CLEAR(*pLogicalPmask);
-+
-+    for(phy_port = halCtrl->min_phy_port; phy_port <= halCtrl->max_phy_port; phy_port++)
-+    {
-+        if(physicalPortmask & (0x0001 << phy_port))
-+        {
-+            log_port = rtk_switch_port_P2L_get(phy_port);
-+            if(log_port != UNDEFINE_PORT)
-+            {
-+                RTK_PORTMASK_PORT_SET(*pLogicalPmask, log_port);
-+            }
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_phyPortMask_get
-+ * Description:
-+ *      Get physical portmask
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      0x00                - Not Initialize
-+ *      Other value         - Physical port mask
-+ * Note:
-+ *
-+ */
-+rtk_uint32 rtk_switch_phyPortMask_get(void)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return 0x00; /* No port in portmask */
-+
-+    return (halCtrl->phy_portmask);
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_logPortMask_get
-+ * Description:
-+ *      Get Logical portmask
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_NOT_INIT     - Not Initialize
-+ *      RT_ERR_NULL_POINTER - Null pointer
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_switch_logPortMask_get(rtk_portmask_t *pPortmask)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return RT_ERR_FAILED;
-+
-+    if(NULL == pPortmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    pPortmask->bits[0] = halCtrl->valid_portmask;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_init
-+ * Description:
-+ *      Set chip to default configuration enviroment
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      The API can set chip registers to default configuration for different release chip model.
-+ */
-+rtk_api_ret_t rtk_switch_init(void)
-+{
-+    rtk_uint32  retVal;
-+    rtl8367c_rma_t rmaCfg;
-+    switch_chip_t   switchChip;
-+
-+    /* probe switch */
-+    if((retVal = rtk_switch_probe(&switchChip)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Set initial state */
-+
-+    if((retVal = rtk_switch_initialState_set(INIT_COMPLETED)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Initial */
-+    switch(switchChip)
-+    {
-+        case CHIP_RTL8367C:
-+            if((retVal = _rtk_switch_init_8367c()) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case CHIP_RTL8370B:
-+            if((retVal = _rtk_switch_init_8370b()) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case CHIP_RTL8364B:
-+            if((retVal = _rtk_switch_init_8364b()) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case CHIP_RTL8363SC_VB:
-+            if((retVal = _rtk_switch_init_8363sc_vb()) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        default:
-+            return RT_ERR_CHIP_NOT_FOUND;
-+    }
-+
-+    /* Set Old max packet length to 16K */
-+    if((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_MAX_LENGTH_LIMINT_IPG, RTL8367C_MAX_LENTH_CTRL_MASK, 3)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_MAX_LEN_RX_TX, RTL8367C_MAX_LEN_RX_TX_MASK, 3)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* ACL Mode */
-+    if((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_ACL_ACCESS_MODE, RTL8367C_ACL_ACCESS_MODE_MASK, 1)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Max rate */
-+    if((retVal = rtk_rate_igrBandwidthCtrlRate_set(halCtrl->hsg_logical_port, RTL8367C_QOS_RATE_INPUT_MAX_HSG, DISABLED, ENABLED)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtk_rate_egrBandwidthCtrlRate_set(halCtrl->hsg_logical_port, RTL8367C_QOS_RATE_INPUT_MAX_HSG, ENABLED)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x03fa, 0x0007)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Change unknown DA to per port setting */
-+    if((retVal = rtl8367c_setAsicRegBits(RTL8367C_PORT_SECURIT_CTRL_REG, RTL8367C_UNKNOWN_UNICAST_DA_BEHAVE_MASK, 3)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* LUT lookup OP = 1 */
-+    if ((retVal = rtl8367c_setAsicLutIpLookupMethod(1))!=RT_ERR_OK)
-+        return retVal;
-+
-+    /* Set RMA */
-+    rmaCfg.portiso_leaky = 0;
-+    rmaCfg.vlan_leaky = 0;
-+    rmaCfg.keep_format = 0;
-+    rmaCfg.trap_priority = 0;
-+    rmaCfg.discard_storm_filter = 0;
-+    rmaCfg.operation = 0;
-+    if ((retVal = rtl8367c_setAsicRma(2, &rmaCfg))!=RT_ERR_OK)
-+        return retVal;
-+
-+    /* Enable TX Mirror isolation leaky */
-+    if ((retVal = rtl8367c_setAsicPortMirrorIsolationTxLeaky(ENABLED)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* INT EN */
-+    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_IO_MISC_FUNC, RTL8367C_INT_EN_OFFSET, 1)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_portMaxPktLen_set
-+ * Description:
-+ *      Set Max packet length
-+ * Input:
-+ *      port    - Port ID
-+ *      speed   - Speed
-+ *      cfgId   - Configuration ID
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Error Input
-+ * Note:
-+ */
-+rtk_api_ret_t rtk_switch_portMaxPktLen_set(rtk_port_t port, rtk_switch_maxPktLen_linkSpeed_t speed, rtk_uint32 cfgId)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(speed >= MAXPKTLEN_LINK_SPEED_END)
-+        return RT_ERR_INPUT;
-+
-+    if(cfgId > MAXPKTLEN_CFG_ID_MAX)
-+        return RT_ERR_INPUT;
-+
-+    if((retVal = rtl8367c_setAsicMaxLength(rtk_switch_port_L2P_get(port), (rtk_uint32)speed, cfgId)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_portMaxPktLen_get
-+ * Description:
-+ *      Get Max packet length
-+ * Input:
-+ *      port    - Port ID
-+ *      speed   - Speed
-+ * Output:
-+ *      pCfgId  - Configuration ID
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Error Input
-+ * Note:
-+ */
-+rtk_api_ret_t rtk_switch_portMaxPktLen_get(rtk_port_t port, rtk_switch_maxPktLen_linkSpeed_t speed, rtk_uint32 *pCfgId)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(speed >= MAXPKTLEN_LINK_SPEED_END)
-+        return RT_ERR_INPUT;
-+
-+    if(NULL == pCfgId)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if((retVal = rtl8367c_getAsicMaxLength(rtk_switch_port_L2P_get(port), (rtk_uint32)speed, pCfgId)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_maxPktLenCfg_set
-+ * Description:
-+ *      Set Max packet length configuration
-+ * Input:
-+ *      cfgId   - Configuration ID
-+ *      pktLen  - Max packet length
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Error Input
-+ * Note:
-+ */
-+rtk_api_ret_t rtk_switch_maxPktLenCfg_set(rtk_uint32 cfgId, rtk_uint32 pktLen)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(cfgId > MAXPKTLEN_CFG_ID_MAX)
-+        return RT_ERR_INPUT;
-+
-+    if(pktLen > RTK_SWITCH_MAX_PKTLEN)
-+        return RT_ERR_INPUT;
-+
-+    if((retVal = rtl8367c_setAsicMaxLengthCfg(cfgId, pktLen)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_maxPktLenCfg_get
-+ * Description:
-+ *      Get Max packet length configuration
-+ * Input:
-+ *      cfgId   - Configuration ID
-+ *      pPktLen - Max packet length
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Error Input
-+ * Note:
-+ */
-+rtk_api_ret_t rtk_switch_maxPktLenCfg_get(rtk_uint32 cfgId, rtk_uint32 *pPktLen)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(cfgId > MAXPKTLEN_CFG_ID_MAX)
-+        return RT_ERR_INPUT;
-+
-+    if(NULL == pPktLen)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if((retVal = rtl8367c_getAsicMaxLengthCfg(cfgId, pPktLen)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_greenEthernet_set
-+ * Description:
-+ *      Set all Ports Green Ethernet state.
-+ * Input:
-+ *      enable - Green Ethernet state.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - OK
-+ *      RT_ERR_FAILED   - Failed
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_ENABLE   - Invalid enable input.
-+ * Note:
-+ *      This API can set all Ports Green Ethernet state.
-+ *      The configuration is as following:
-+ *      - DISABLE
-+ *      - ENABLE
-+ */
-+rtk_api_ret_t rtk_switch_greenEthernet_set(rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 port;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    RTK_SCAN_ALL_LOG_PORT(port)
-+    {
-+        if(rtk_switch_isUtpPort(port) == RT_ERR_OK)
-+        {
-+            if ((retVal = rtl8367c_setAsicPowerSaving(rtk_switch_port_L2P_get(port),enable))!=RT_ERR_OK)
-+                return retVal;
-+
-+            if ((retVal = rtl8367c_setAsicGreenEthernet(rtk_switch_port_L2P_get(port), enable))!=RT_ERR_OK)
-+                return retVal;
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_greenEthernet_get
-+ * Description:
-+ *      Get all Ports Green Ethernet state.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnable - Green Ethernet state.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ * Note:
-+ *      This API can get Green Ethernet state.
-+ */
-+rtk_api_ret_t rtk_switch_greenEthernet_get(rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 port;
-+    rtk_uint32 state;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    RTK_SCAN_ALL_LOG_PORT(port)
-+    {
-+        if(rtk_switch_isUtpPort(port) == RT_ERR_OK)
-+        {
-+            if ((retVal = rtl8367c_getAsicPowerSaving(rtk_switch_port_L2P_get(port), &state))!=RT_ERR_OK)
-+                return retVal;
-+
-+            if(state == DISABLED)
-+            {
-+                *pEnable = DISABLED;
-+                return RT_ERR_OK;
-+            }
-+
-+            if ((retVal = rtl8367c_getAsicGreenEthernet(rtk_switch_port_L2P_get(port), &state))!=RT_ERR_OK)
-+                return retVal;
-+
-+            if(state == DISABLED)
-+            {
-+                *pEnable = DISABLED;
-+                return RT_ERR_OK;
-+            }
-+        }
-+    }
-+
-+    *pEnable = ENABLED;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_maxLogicalPort_get
-+ * Description:
-+ *      Get Max logical port ID
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      Max logical port
-+ * Note:
-+ *      This API can get max logical port
-+ */
-+rtk_port_t rtk_switch_maxLogicalPort_get(void)
-+{
-+    rtk_port_t port, maxLogicalPort = 0;
-+
-+    /* Check initialization state */
-+    if(rtk_switch_initialState_get() != INIT_COMPLETED)
-+    {
-+        return UNDEFINE_PORT;
-+    }
-+
-+    for(port = 0; port < RTK_SWITCH_PORT_NUM; port++)
-+    {
-+        if( (halCtrl->log_port_type[port] == UTP_PORT) || (halCtrl->log_port_type[port] == EXT_PORT) )
-+            maxLogicalPort = port;
-+    }
-+
-+    return maxLogicalPort;
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_maxMeterId_get
-+ * Description:
-+ *      Get Max Meter ID
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      0x00                - Not Initialize
-+ *      Other value         - Max Meter ID
-+ * Note:
-+ *
-+ */
-+rtk_uint32 rtk_switch_maxMeterId_get(void)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return 0x00;
-+
-+    return (halCtrl->max_meter_id);
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_maxLutAddrNumber_get
-+ * Description:
-+ *      Get Max LUT Address number
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      0x00                - Not Initialize
-+ *      Other value         - Max LUT Address number
-+ * Note:
-+ *
-+ */
-+rtk_uint32 rtk_switch_maxLutAddrNumber_get(void)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return 0x00;
-+
-+    return (halCtrl->max_lut_addr_num);
-+}
-+
-+/* Function Name:
-+ *      rtk_switch_isValidTrunkGrpId
-+ * Description:
-+ *      Check if trunk group is valid or not
-+ * Input:
-+ *      grpId       - Group ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Trunk Group ID is valid
-+ *      RT_ERR_LA_TRUNK_ID  - Trunk Group ID is not valid
-+ * Note:
-+ *
-+ */
-+rtk_uint32 rtk_switch_isValidTrunkGrpId(rtk_uint32 grpId)
-+{
-+    if(init_state != INIT_COMPLETED)
-+        return 0x00;
-+
-+    if( (halCtrl->trunk_group_mask & (0x01 << grpId) ) != 0)
-+        return RT_ERR_OK;
-+    else
-+        return RT_ERR_LA_TRUNK_ID;
-+
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv.c
-new file mode 100644
-index 0000000000..7858edcf53
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv.c
-@@ -0,0 +1,639 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature :
-+ *
-+ */
-+
-+#include <rtl8367c_asicdrv.h>
-+
-+#if defined(RTK_X86_ASICDRV)
-+#include <I2Clib.h>
-+#else
-+#include <smi.h>
-+#endif
-+
-+/*for driver verify testing only*/
-+#ifdef CONFIG_RTL8367C_ASICDRV_TEST
-+#define CLE_VIRTUAL_REG_SIZE        0x10000
-+rtk_uint16 CleVirtualReg[CLE_VIRTUAL_REG_SIZE];
-+#endif
-+
-+#if defined(CONFIG_RTL865X_CLE) || defined (RTK_X86_CLE)
-+rtk_uint32 cleDebuggingDisplay;
-+#endif
-+
-+#ifdef EMBEDDED_SUPPORT
-+extern void setReg(rtk_uint16, rtk_uint16);
-+extern rtk_uint16 getReg(rtk_uint16);
-+#endif
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicRegBit
-+ * Description:
-+ *      Set a bit value of a specified register
-+ * Input:
-+ *      reg     - register's address
-+ *      bit     - bit location
-+ *      value   - value to set. It can be value 0 or 1.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_INPUT    - Invalid input parameter
-+ * Note:
-+ *      Set a bit of a specified register to 1 or 0.
-+ */
-+ret_t rtl8367c_setAsicRegBit(rtk_uint32 reg, rtk_uint32 bit, rtk_uint32 value)
-+{
-+
-+#if defined(RTK_X86_ASICDRV)
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+
-+    if(bit >= RTL8367C_REGBITLENGTH)
-+        return RT_ERR_INPUT;
-+
-+    retVal = Access_Read(reg, 2, &regData);
-+    if(TRUE != retVal)
-+        return RT_ERR_SMI;
-+
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("R[0x%4.4x]=0x%4.4x\n", reg, regData);
-+
-+    if(value)
-+        regData = regData | (1 << bit);
-+    else
-+        regData = regData & (~(1 << bit));
-+
-+    retVal = Access_Write(reg,2, regData);
-+    if(TRUE != retVal)
-+        return RT_ERR_SMI;
-+
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("W[0x%4.4x]=0x%4.4x\n", reg, regData);
-+
-+
-+#elif defined(CONFIG_RTL8367C_ASICDRV_TEST)
-+
-+    if(bit >= RTL8367C_REGBITLENGTH)
-+        return RT_ERR_INPUT;
-+
-+    else if(reg >= CLE_VIRTUAL_REG_SIZE)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(value)
-+    {
-+        CleVirtualReg[reg] =  CleVirtualReg[reg] | (1 << bit);
-+    }
-+    else
-+    {
-+        CleVirtualReg[reg] =  CleVirtualReg[reg] & (~(1 << bit));
-+    }
-+
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("W[0x%4.4x]=0x%4.4x\n", reg, CleVirtualReg[reg]);
-+
-+#elif defined(EMBEDDED_SUPPORT)
-+    rtk_uint16 tmp;
-+
-+    if(reg > RTL8367C_REGDATAMAX || value > 1)
-+        return RT_ERR_INPUT;
-+
-+    tmp = getReg(reg);
-+    tmp &= (1 << bitIdx);
-+    tmp |= (value << bitIdx);
-+    setReg(reg, tmp);
-+
-+#else
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+
-+    if(bit >= RTL8367C_REGBITLENGTH)
-+        return RT_ERR_INPUT;
-+
-+    retVal = smi_read(reg, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return RT_ERR_SMI;
-+
-+  #ifdef CONFIG_RTL865X_CLE
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("R[0x%4.4x]=0x%4.4x\n", reg, regData);
-+  #endif
-+    if(value)
-+        regData = regData | (1 << bit);
-+    else
-+        regData = regData & (~(1 << bit));
-+
-+    retVal = smi_write(reg, regData);
-+    if(retVal != RT_ERR_OK)
-+        return RT_ERR_SMI;
-+
-+  #ifdef CONFIG_RTL865X_CLE
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("W[0x%4.4x]=0x%4.4x\n", reg, regData);
-+  #endif
-+
-+#endif
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRegBit
-+ * Description:
-+ *      Get a bit value of a specified register
-+ * Input:
-+ *      reg     - register's address
-+ *      bit     - bit location
-+ *      value   - value to get.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_INPUT    - Invalid input parameter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRegBit(rtk_uint32 reg, rtk_uint32 bit, rtk_uint32 *pValue)
-+{
-+
-+#if defined(RTK_X86_ASICDRV)
-+
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+
-+    if(bit >= RTL8367C_REGBITLENGTH)
-+        return RT_ERR_INPUT;
-+
-+    retVal = Access_Read(reg, 2, &regData);
-+    if(TRUE != retVal)
-+        return RT_ERR_SMI;
-+
-+    *pValue = (regData & (0x1 << bit)) >> bit;
-+
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("R[0x%4.4x]=0x%4.4x\n", reg, regData);
-+
-+#elif defined(CONFIG_RTL8367C_ASICDRV_TEST)
-+
-+    if(bit >= RTL8367C_REGBITLENGTH)
-+        return RT_ERR_INPUT;
-+
-+    if(reg >= CLE_VIRTUAL_REG_SIZE)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    *pValue = (CleVirtualReg[reg] & (0x1 << bit)) >> bit;
-+
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("R[0x%4.4x]=0x%4.4x\n", reg, CleVirtualReg[reg]);
-+
-+#elif defined(EMBEDDED_SUPPORT)
-+    rtk_uint16 tmp;
-+
-+    if(reg > RTL8367C_REGDATAMAX )
-+        return RT_ERR_INPUT;
-+
-+    tmp = getReg(reg);
-+    tmp = tmp >> bitIdx;
-+    tmp &= 1;
-+    *value = tmp;
-+#else
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+
-+    retVal = smi_read(reg, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return RT_ERR_SMI;
-+
-+  #ifdef CONFIG_RTL865X_CLE
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("R[0x%4.4x]=0x%4.4x\n", reg, regData);
-+  #endif
-+
-+    *pValue = (regData & (0x1 << bit)) >> bit;
-+
-+#endif
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicRegBits
-+ * Description:
-+ *      Set bits value of a specified register
-+ * Input:
-+ *      reg     - register's address
-+ *      bits    - bits mask for setting
-+ *      value   - bits value for setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_INPUT    - Invalid input parameter
-+ * Note:
-+ *      Set bits of a specified register to value. Both bits and value are be treated as bit-mask
-+ */
-+ret_t rtl8367c_setAsicRegBits(rtk_uint32 reg, rtk_uint32 bits, rtk_uint32 value)
-+{
-+
-+#if defined(RTK_X86_ASICDRV)
-+
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+    rtk_uint32 bitsShift;
-+    rtk_uint32 valueShifted;
-+
-+    if(bits >= (1 << RTL8367C_REGBITLENGTH) )
-+        return RT_ERR_INPUT;
-+
-+    bitsShift = 0;
-+    while(!(bits & (1 << bitsShift)))
-+    {
-+        bitsShift++;
-+        if(bitsShift >= RTL8367C_REGBITLENGTH)
-+            return RT_ERR_INPUT;
-+    }
-+
-+    valueShifted = value << bitsShift;
-+    if(valueShifted > RTL8367C_REGDATAMAX)
-+        return RT_ERR_INPUT;
-+
-+    retVal = Access_Read(reg, 2, &regData);
-+    if(TRUE != retVal)
-+        return RT_ERR_SMI;
-+
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("R[0x%4.4x]=0x%4.4x\n", reg, regData);
-+
-+    regData = regData & (~bits);
-+    regData = regData | (valueShifted & bits);
-+
-+    retVal = Access_Write(reg,2, regData);
-+    if(TRUE != retVal)
-+        return RT_ERR_SMI;
-+
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("W[0x%4.4x]=0x%4.4x\n", reg, regData);
-+
-+#elif defined(CONFIG_RTL8367C_ASICDRV_TEST)
-+    rtk_uint32 regData;
-+    rtk_uint32 bitsShift;
-+    rtk_uint32 valueShifted;
-+
-+    if(bits >= (1 << RTL8367C_REGBITLENGTH) )
-+        return RT_ERR_INPUT;
-+
-+    bitsShift = 0;
-+    while(!(bits & (1 << bitsShift)))
-+    {
-+        bitsShift++;
-+        if(bitsShift >= RTL8367C_REGBITLENGTH)
-+            return RT_ERR_INPUT;
-+    }
-+    valueShifted = value << bitsShift;
-+
-+    if(valueShifted > RTL8367C_REGDATAMAX)
-+        return RT_ERR_INPUT;
-+
-+    if(reg >= CLE_VIRTUAL_REG_SIZE)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    regData = CleVirtualReg[reg] & (~bits);
-+    regData = regData | (valueShifted & bits);
-+
-+    CleVirtualReg[reg] = regData;
-+
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("W[0x%4.4x]=0x%4.4x\n", reg, regData);
-+
-+#elif defined(EMBEDDED_SUPPORT)
-+    rtk_uint32 regData;
-+    rtk_uint32 bitsShift;
-+    rtk_uint32 valueShifted;
-+
-+    if(reg > RTL8367C_REGDATAMAX )
-+        return RT_ERR_INPUT;
-+
-+    if(bits >= (1 << RTL8367C_REGBITLENGTH) )
-+        return RT_ERR_INPUT;
-+
-+    bitsShift = 0;
-+    while(!(bits & (1 << bitsShift)))
-+    {
-+        bitsShift++;
-+        if(bitsShift >= RTL8367C_REGBITLENGTH)
-+            return RT_ERR_INPUT;
-+    }
-+
-+    valueShifted = value << bitsShift;
-+    if(valueShifted > RTL8367C_REGDATAMAX)
-+        return RT_ERR_INPUT;
-+
-+    regData = getReg(reg);
-+    regData = regData & (~bits);
-+    regData = regData | (valueShifted & bits);
-+
-+    setReg(reg, regData);
-+
-+#else
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+    rtk_uint32 bitsShift;
-+    rtk_uint32 valueShifted;
-+
-+    if(bits >= (1 << RTL8367C_REGBITLENGTH) )
-+        return RT_ERR_INPUT;
-+
-+    bitsShift = 0;
-+    while(!(bits & (1 << bitsShift)))
-+    {
-+        bitsShift++;
-+        if(bitsShift >= RTL8367C_REGBITLENGTH)
-+            return RT_ERR_INPUT;
-+    }
-+    valueShifted = value << bitsShift;
-+
-+    if(valueShifted > RTL8367C_REGDATAMAX)
-+        return RT_ERR_INPUT;
-+
-+    retVal = smi_read(reg, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return RT_ERR_SMI;
-+  #ifdef CONFIG_RTL865X_CLE
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("R[0x%4.4x]=0x%4.4x\n", reg, regData);
-+  #endif
-+
-+    regData = regData & (~bits);
-+    regData = regData | (valueShifted & bits);
-+
-+    retVal = smi_write(reg, regData);
-+    if(retVal != RT_ERR_OK)
-+        return RT_ERR_SMI;
-+  #ifdef CONFIG_RTL865X_CLE
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("W[0x%4.4x]=0x%4.4x\n", reg, regData);
-+  #endif
-+#endif
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRegBits
-+ * Description:
-+ *      Get bits value of a specified register
-+ * Input:
-+ *      reg     - register's address
-+ *      bits    - bits mask for setting
-+ *      value   - bits value for setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_INPUT    - Invalid input parameter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRegBits(rtk_uint32 reg, rtk_uint32 bits, rtk_uint32 *pValue)
-+{
-+
-+#if defined(RTK_X86_ASICDRV)
-+
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+    rtk_uint32 bitsShift;
-+
-+    if(bits >= (1 << RTL8367C_REGBITLENGTH) )
-+        return RT_ERR_INPUT;
-+
-+    bitsShift = 0;
-+    while(!(bits & (1 << bitsShift)))
-+    {
-+        bitsShift++;
-+        if(bitsShift >= RTL8367C_REGBITLENGTH)
-+            return RT_ERR_INPUT;
-+    }
-+
-+    retVal = Access_Read(reg, 2, &regData);
-+    if(TRUE != retVal)
-+        return RT_ERR_SMI;
-+
-+    *pValue = (regData & bits) >> bitsShift;
-+
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("R[0x%4.4x]=0x%4.4x\n", reg, regData);
-+
-+#elif defined(CONFIG_RTL8367C_ASICDRV_TEST)
-+    rtk_uint32 bitsShift;
-+
-+    if(bits >= (1 << RTL8367C_REGBITLENGTH) )
-+        return RT_ERR_INPUT;
-+
-+    bitsShift = 0;
-+    while(!(bits & (1 << bitsShift)))
-+    {
-+        bitsShift++;
-+        if(bitsShift >= RTL8367C_REGBITLENGTH)
-+            return RT_ERR_INPUT;
-+    }
-+
-+    if(reg >= CLE_VIRTUAL_REG_SIZE)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+     *pValue = (CleVirtualReg[reg] & bits) >> bitsShift;
-+
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("R[0x%4.4x]=0x%4.4x\n", reg, CleVirtualReg[reg]);
-+
-+#elif defined(EMBEDDED_SUPPORT)
-+    rtk_uint32 regData;
-+    rtk_uint32 bitsShift;
-+
-+    if(reg > RTL8367C_REGDATAMAX )
-+        return RT_ERR_INPUT;
-+
-+    if(bits >= (1UL << RTL8367C_REGBITLENGTH) )
-+        return RT_ERR_INPUT;
-+
-+    bitsShift = 0;
-+    while(!(bits & (1UL << bitsShift)))
-+    {
-+        bitsShift++;
-+        if(bitsShift >= RTL8367C_REGBITLENGTH)
-+            return RT_ERR_INPUT;
-+    }
-+
-+    regData = getReg(reg);
-+    *value = (regData & bits) >> bitsShift;
-+
-+#else
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+    rtk_uint32 bitsShift;
-+
-+    if(bits>= (1<<RTL8367C_REGBITLENGTH) )
-+        return RT_ERR_INPUT;
-+
-+    bitsShift = 0;
-+    while(!(bits & (1 << bitsShift)))
-+    {
-+        bitsShift++;
-+        if(bitsShift >= RTL8367C_REGBITLENGTH)
-+            return RT_ERR_INPUT;
-+    }
-+
-+    retVal = smi_read(reg, &regData);
-+    if(retVal != RT_ERR_OK) return RT_ERR_SMI;
-+
-+    *pValue = (regData & bits) >> bitsShift;
-+  #ifdef CONFIG_RTL865X_CLE
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("R[0x%4.4x]=0x%4.4x\n",reg, regData);
-+  #endif
-+
-+#endif
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicReg
-+ * Description:
-+ *      Set content of asic register
-+ * Input:
-+ *      reg     - register's address
-+ *      value   - Value setting to register
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      The value will be set to ASIC mapping address only and it is always return RT_ERR_OK while setting un-mapping address registers
-+ */
-+ret_t rtl8367c_setAsicReg(rtk_uint32 reg, rtk_uint32 value)
-+{
-+#if defined(RTK_X86_ASICDRV)/*RTK-CNSD2-NickWu-20061222: for x86 compile*/
-+
-+    ret_t retVal;
-+
-+    retVal = Access_Write(reg,2,value);
-+    if(TRUE != retVal) return RT_ERR_SMI;
-+
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("W[0x%4.4x]=0x%4.4x\n",reg,value);
-+
-+#elif defined(CONFIG_RTL8367C_ASICDRV_TEST)
-+
-+    /*MIBs emulating*/
-+    if(reg == RTL8367C_REG_MIB_ADDRESS)
-+    {
-+        CleVirtualReg[RTL8367C_MIB_COUNTER_BASE_REG] = 0x1;
-+        CleVirtualReg[RTL8367C_MIB_COUNTER_BASE_REG+1] = 0x2;
-+        CleVirtualReg[RTL8367C_MIB_COUNTER_BASE_REG+2] = 0x3;
-+        CleVirtualReg[RTL8367C_MIB_COUNTER_BASE_REG+3] = 0x4;
-+    }
-+
-+    if(reg >= CLE_VIRTUAL_REG_SIZE)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    CleVirtualReg[reg] = value;
-+
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("W[0x%4.4x]=0x%4.4x\n",reg,CleVirtualReg[reg]);
-+
-+#elif defined(EMBEDDED_SUPPORT)
-+    if(reg > RTL8367C_REGDATAMAX || value > RTL8367C_REGDATAMAX )
-+        return RT_ERR_INPUT;
-+
-+    setReg(reg, value);
-+
-+#else
-+    ret_t retVal;
-+
-+    retVal = smi_write(reg, value);
-+    if(retVal != RT_ERR_OK)
-+        return RT_ERR_SMI;
-+  #ifdef CONFIG_RTL865X_CLE
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("W[0x%4.4x]=0x%4.4x\n",reg,value);
-+  #endif
-+
-+#endif
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicReg
-+ * Description:
-+ *      Get content of asic register
-+ * Input:
-+ *      reg     - register's address
-+ *      value   - Value setting to register
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      Value 0x0000 will be returned for ASIC un-mapping address
-+ */
-+ret_t rtl8367c_getAsicReg(rtk_uint32 reg, rtk_uint32 *pValue)
-+{
-+
-+#if defined(RTK_X86_ASICDRV)
-+
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+
-+    retVal = Access_Read(reg, 2, &regData);
-+    if(TRUE != retVal)
-+        return RT_ERR_SMI;
-+
-+    *pValue = regData;
-+
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("R[0x%4.4x]=0x%4.4x\n", reg, regData);
-+
-+#elif defined(CONFIG_RTL8367C_ASICDRV_TEST)
-+    if(reg >= CLE_VIRTUAL_REG_SIZE)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    *pValue = CleVirtualReg[reg];
-+
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("R[0x%4.4x]=0x%4.4x\n", reg, CleVirtualReg[reg]);
-+
-+#elif defined(EMBEDDED_SUPPORT)
-+    if(reg > RTL8367C_REGDATAMAX  )
-+        return RT_ERR_INPUT;
-+
-+    *value = getReg(reg);
-+
-+#else
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+
-+    retVal = smi_read(reg, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return RT_ERR_SMI;
-+
-+    *pValue = regData;
-+  #ifdef CONFIG_RTL865X_CLE
-+    if(0x8367B == cleDebuggingDisplay)
-+        PRINT("R[0x%4.4x]=0x%4.4x\n", reg, regData);
-+  #endif
-+
-+#endif
-+
-+    return RT_ERR_OK;
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_acl.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_acl.c
-new file mode 100644
-index 0000000000..d9ccd97118
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_acl.c
-@@ -0,0 +1,1173 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : ACL related function drivers
-+ *
-+ */
-+#include <rtl8367c_asicdrv_acl.h>
-+
-+#include <string.h>
-+
-+#if defined(CONFIG_RTL8367C_ASICDRV_TEST)
-+rtl8367c_aclrulesmi Rtl8370sVirtualAclRuleTable[RTL8367C_ACLRULENO];
-+rtk_uint16 Rtl8370sVirtualAclActTable[RTL8367C_ACLRULENO][RTL8367C_ACL_ACT_TABLE_LEN];
-+#endif
-+
-+/*
-+    Exchange structure type define with MMI and SMI
-+*/
-+static void _rtl8367c_aclRuleStSmi2User( rtl8367c_aclrule *pAclUser, rtl8367c_aclrulesmi *pAclSmi)
-+{
-+    rtk_uint8 *care_ptr, *data_ptr;
-+    rtk_uint8 care_tmp, data_tmp;
-+    rtk_uint32 i;
-+
-+    pAclUser->data_bits.active_portmsk = (((pAclSmi->data_bits_ext.rule_info >> 1) & 0x0007) << 8) | ((pAclSmi->data_bits.rule_info >> 8) & 0x00FF);
-+    pAclUser->data_bits.type = (pAclSmi->data_bits.rule_info & 0x0007);
-+    pAclUser->data_bits.tag_exist = (pAclSmi->data_bits.rule_info & 0x00F8) >> 3;
-+
-+    care_ptr = (rtk_uint8*)&pAclSmi->care_bits;
-+    data_ptr = (rtk_uint8*)&pAclSmi->data_bits;
-+
-+    for ( i = 0; i < sizeof(struct acl_rule_smi_st); i++)
-+    {
-+        care_tmp = *(care_ptr + i) ^ (*(data_ptr + i));
-+        data_tmp = *(data_ptr + i);
-+
-+        *(care_ptr + i) = care_tmp;
-+        *(data_ptr + i) = data_tmp;
-+    }
-+
-+    care_ptr = (rtk_uint8*)&pAclSmi->care_bits_ext;
-+    data_ptr = (rtk_uint8*)&pAclSmi->data_bits_ext;
-+    care_tmp = (*care_ptr) ^ (*data_ptr);
-+    data_tmp = (*data_ptr);
-+    *care_ptr = care_tmp;
-+    *data_ptr = data_tmp;
-+
-+    for(i = 0; i < RTL8367C_ACLRULEFIELDNO; i++)
-+        pAclUser->data_bits.field[i] = pAclSmi->data_bits.field[i];
-+
-+    pAclUser->valid = pAclSmi->valid;
-+
-+    pAclUser->care_bits.active_portmsk = (((pAclSmi->care_bits_ext.rule_info >> 1) & 0x0007) << 8) | ((pAclSmi->care_bits.rule_info >> 8) & 0x00FF);
-+    pAclUser->care_bits.type = (pAclSmi->care_bits.rule_info & 0x0007);
-+    pAclUser->care_bits.tag_exist = (pAclSmi->care_bits.rule_info & 0x00F8) >> 3;
-+
-+    for(i = 0; i < RTL8367C_ACLRULEFIELDNO; i++)
-+        pAclUser->care_bits.field[i] = pAclSmi->care_bits.field[i];
-+}
-+
-+/*
-+    Exchange structure type define with MMI and SMI
-+*/
-+static void _rtl8367c_aclRuleStUser2Smi(rtl8367c_aclrule *pAclUser, rtl8367c_aclrulesmi *pAclSmi)
-+{
-+    rtk_uint8 *care_ptr, *data_ptr;
-+    rtk_uint8 care_tmp, data_tmp;
-+    rtk_uint32 i;
-+
-+    pAclSmi->data_bits_ext.rule_info = ((pAclUser->data_bits.active_portmsk >> 8) & 0x7) << 1;
-+    pAclSmi->data_bits.rule_info = ((pAclUser->data_bits.active_portmsk & 0xff) << 8) | ((pAclUser->data_bits.tag_exist & 0x1F) << 3) | (pAclUser->data_bits.type & 0x07);
-+
-+    for(i = 0;i < RTL8367C_ACLRULEFIELDNO; i++)
-+        pAclSmi->data_bits.field[i] = pAclUser->data_bits.field[i];
-+
-+    pAclSmi->valid = pAclUser->valid;
-+
-+    pAclSmi->care_bits_ext.rule_info = ((pAclUser->care_bits.active_portmsk >> 8) & 0x7) << 1;
-+    pAclSmi->care_bits.rule_info = ((pAclUser->care_bits.active_portmsk & 0xff) << 8) | ((pAclUser->care_bits.tag_exist & 0x1F) << 3) | (pAclUser->care_bits.type & 0x07);
-+
-+    for(i = 0; i < RTL8367C_ACLRULEFIELDNO; i++)
-+        pAclSmi->care_bits.field[i] = pAclUser->care_bits.field[i];
-+
-+    care_ptr = (rtk_uint8*)&pAclSmi->care_bits;
-+    data_ptr = (rtk_uint8*)&pAclSmi->data_bits;
-+
-+    for ( i = 0; i < sizeof(struct acl_rule_smi_st); i++)
-+    {
-+        care_tmp = *(care_ptr + i) & ~(*(data_ptr + i));
-+        data_tmp = *(care_ptr + i) & *(data_ptr + i);
-+
-+        *(care_ptr + i) = care_tmp;
-+        *(data_ptr + i) = data_tmp;
-+    }
-+
-+    care_ptr = (rtk_uint8*)&pAclSmi->care_bits_ext;
-+    data_ptr = (rtk_uint8*)&pAclSmi->data_bits_ext;
-+    care_tmp = *care_ptr & ~(*data_ptr);
-+    data_tmp = *care_ptr & *data_ptr;
-+
-+    *care_ptr = care_tmp;
-+    *data_ptr = data_tmp;
-+}
-+
-+/*
-+    Exchange structure type define with MMI and SMI
-+*/
-+static void _rtl8367c_aclActStSmi2User(rtl8367c_acl_act_t *pAclUser, rtk_uint16 *pAclSmi)
-+{
-+    pAclUser->cact = (pAclSmi[0] & 0x00C0) >> 6;
-+    pAclUser->cvidx_cact = (pAclSmi[0] & 0x003F) | (((pAclSmi[3] & 0x0008) >> 3) << 6);
-+
-+    pAclUser->sact = (pAclSmi[0] & 0xC000) >> 14;
-+    pAclUser->svidx_sact = ((pAclSmi[0] & 0x3F00) >> 8) | (((pAclSmi[3] & 0x0010) >> 4) << 6);
-+
-+    pAclUser->aclmeteridx = (pAclSmi[1] & 0x003F) | (((pAclSmi[3] & 0x0020) >> 5) << 6);
-+
-+    pAclUser->fwdact = (pAclSmi[1] & 0xC000) >> 14;
-+    pAclUser->fwdpmask = ((pAclSmi[1] & 0x3FC0) >> 6) | (((pAclSmi[3] & 0x01C0) >> 6) << 8);
-+
-+    pAclUser->priact = (pAclSmi[2] & 0x00C0) >> 6;
-+    pAclUser->pridx = (pAclSmi[2] & 0x003F) | (((pAclSmi[3] & 0x0200) >> 9) << 6);
-+
-+    pAclUser->aclint = (pAclSmi[2] & 0x2000) >> 13;
-+    pAclUser->gpio_en = (pAclSmi[2] & 0x1000) >> 12;
-+    pAclUser->gpio_pin = (pAclSmi[2] & 0x0F00) >> 8;
-+
-+    pAclUser->cact_ext = (pAclSmi[2] & 0xC000) >> 14;
-+    pAclUser->tag_fmt = (pAclSmi[3] & 0x0003);
-+    pAclUser->fwdact_ext = (pAclSmi[3] & 0x0004) >> 2;
-+}
-+
-+/*
-+    Exchange structure type define with MMI and SMI
-+*/
-+static void _rtl8367c_aclActStUser2Smi(rtl8367c_acl_act_t *pAclUser, rtk_uint16 *pAclSmi)
-+{
-+    pAclSmi[0] |= (pAclUser->cvidx_cact & 0x003F);
-+    pAclSmi[0] |= (pAclUser->cact & 0x0003) << 6;
-+    pAclSmi[0] |= (pAclUser->svidx_sact & 0x003F) << 8;
-+    pAclSmi[0] |= (pAclUser->sact & 0x0003) << 14;
-+
-+    pAclSmi[1] |= (pAclUser->aclmeteridx & 0x003F);
-+    pAclSmi[1] |= (pAclUser->fwdpmask & 0x00FF) << 6;
-+    pAclSmi[1] |= (pAclUser->fwdact & 0x0003) << 14;
-+
-+    pAclSmi[2] |= (pAclUser->pridx & 0x003F);
-+    pAclSmi[2] |= (pAclUser->priact & 0x0003) << 6;
-+    pAclSmi[2] |= (pAclUser->gpio_pin & 0x000F) << 8;
-+    pAclSmi[2] |= (pAclUser->gpio_en & 0x0001) << 12;
-+    pAclSmi[2] |= (pAclUser->aclint & 0x0001) << 13;
-+    pAclSmi[2] |= (pAclUser->cact_ext & 0x0003) << 14;
-+
-+    pAclSmi[3] |= (pAclUser->tag_fmt & 0x0003);
-+    pAclSmi[3] |= (pAclUser->fwdact_ext & 0x0001) << 2;
-+    pAclSmi[3] |= ((pAclUser->cvidx_cact & 0x0040) >> 6) << 3;
-+    pAclSmi[3] |= ((pAclUser->svidx_sact & 0x0040) >> 6) << 4;
-+    pAclSmi[3] |= ((pAclUser->aclmeteridx & 0x0040) >> 6) << 5;
-+    pAclSmi[3] |= ((pAclUser->fwdpmask & 0x0700) >> 8) << 6;
-+    pAclSmi[3] |= ((pAclUser->pridx & 0x0040) >> 6) << 9;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicAcl
-+ * Description:
-+ *      Set port acl function enable/disable
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicAcl(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_ACL_ENABLE_REG, port, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicAcl
-+ * Description:
-+ *      Get port acl function enable/disable
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicAcl(rtk_uint32 port, rtk_uint32* pEnabled)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_ACL_ENABLE_REG, port, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicAclUnmatchedPermit
-+ * Description:
-+ *      Set port acl function unmatched permit action
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicAclUnmatchedPermit(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_ACL_UNMATCH_PERMIT_REG, port, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicAclUnmatchedPermit
-+ * Description:
-+ *      Get port acl function unmatched permit action
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicAclUnmatchedPermit(rtk_uint32 port, rtk_uint32* pEnabled)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_ACL_UNMATCH_PERMIT_REG, port, pEnabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicAclRule
-+ * Description:
-+ *      Set acl rule content
-+ * Input:
-+ *      index   - ACL rule index (0-95) of 96 ACL rules
-+ *      pAclRule - ACL rule stucture for setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - Invalid ACL rule index (0-95)
-+ * Note:
-+ *      System supported 95 shared 289-bit ACL ingress rule. Index was available at range 0-95 only.
-+ *      If software want to modify ACL rule, the ACL function should be disable at first or unspecify
-+ *      acl action will be executed.
-+ *      One ACL rule structure has three parts setting:
-+ *      Bit 0-147       Data Bits of this Rule
-+ *      Bit 148     Valid Bit
-+ *      Bit 149-296 Care Bits of this Rule
-+ *      There are four kinds of field in Data Bits and Care Bits: Active Portmask, Type, Tag Exist, and 8 fields
-+ */
-+ret_t rtl8367c_setAsicAclRule(rtk_uint32 index, rtl8367c_aclrule* pAclRule)
-+{
-+    rtl8367c_aclrulesmi aclRuleSmi;
-+    rtk_uint16* tableAddr;
-+    rtk_uint32 regAddr;
-+    rtk_uint32  regData;
-+    rtk_uint32 i;
-+    ret_t retVal;
-+
-+    if(index > RTL8367C_ACLRULEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    memset(&aclRuleSmi, 0x00, sizeof(rtl8367c_aclrulesmi));
-+
-+    _rtl8367c_aclRuleStUser2Smi(pAclRule, &aclRuleSmi);
-+
-+    /* Write valid bit = 0 */
-+    regAddr = RTL8367C_TABLE_ACCESS_ADDR_REG;
-+    if(index >= 64)
-+        regData = RTL8367C_ACLRULETBADDR2(DATABITS, index);
-+    else
-+        regData = RTL8367C_ACLRULETBADDR(DATABITS, index);
-+    retVal = rtl8367c_setAsicReg(regAddr,regData);
-+    if(retVal !=RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_TABLE_ACCESS_WRDATA_REG(RTL8367C_ACLRULETBLEN), 0x1, 0);
-+    if(retVal !=RT_ERR_OK)
-+        return retVal;
-+
-+    regAddr = RTL8367C_TABLE_ACCESS_CTRL_REG;
-+    regData = RTL8367C_TABLE_ACCESS_REG_DATA(TB_OP_WRITE, TB_TARGET_ACLRULE);
-+    retVal = rtl8367c_setAsicReg(regAddr, regData);
-+    if(retVal !=RT_ERR_OK)
-+        return retVal;
-+
-+
-+
-+    /* Write ACS_ADR register */
-+    regAddr = RTL8367C_TABLE_ACCESS_ADDR_REG;
-+    if(index >= 64)
-+        regData = RTL8367C_ACLRULETBADDR2(CAREBITS, index);
-+    else
-+        regData = RTL8367C_ACLRULETBADDR(CAREBITS, index);
-+    retVal = rtl8367c_setAsicReg(regAddr, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Write Care Bits to ACS_DATA registers */
-+     tableAddr = (rtk_uint16*)&aclRuleSmi.care_bits;
-+     regAddr = RTL8367C_TABLE_ACCESS_WRDATA_BASE;
-+
-+    for(i = 0; i < RTL8367C_ACLRULETBLEN; i++)
-+    {
-+        regData = *tableAddr;
-+        retVal = rtl8367c_setAsicReg(regAddr, regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        regAddr++;
-+        tableAddr++;
-+    }
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_TABLE_ACCESS_WRDATA_REG(RTL8367C_ACLRULETBLEN), (0x0007 << 1), (aclRuleSmi.care_bits_ext.rule_info >> 1) & 0x0007);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Write ACS_CMD register */
-+    regAddr = RTL8367C_TABLE_ACCESS_CTRL_REG;
-+    regData = RTL8367C_TABLE_ACCESS_REG_DATA(TB_OP_WRITE, TB_TARGET_ACLRULE);
-+    retVal = rtl8367c_setAsicRegBits(regAddr, RTL8367C_TABLE_TYPE_MASK | RTL8367C_COMMAND_TYPE_MASK,regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+
-+
-+    /* Write ACS_ADR register for data bits */
-+    regAddr = RTL8367C_TABLE_ACCESS_ADDR_REG;
-+    if(index >= 64)
-+        regData = RTL8367C_ACLRULETBADDR2(DATABITS, index);
-+    else
-+        regData = RTL8367C_ACLRULETBADDR(DATABITS, index);
-+
-+    retVal = rtl8367c_setAsicReg(regAddr, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Write Data Bits to ACS_DATA registers */
-+     tableAddr = (rtk_uint16*)&aclRuleSmi.data_bits;
-+     regAddr = RTL8367C_TABLE_ACCESS_WRDATA_BASE;
-+
-+    for(i = 0; i < RTL8367C_ACLRULETBLEN; i++)
-+    {
-+        regData = *tableAddr;
-+        retVal = rtl8367c_setAsicReg(regAddr, regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        regAddr++;
-+        tableAddr++;
-+    }
-+
-+    retVal = rtl8367c_setAsicRegBit(RTL8367C_TABLE_ACCESS_WRDATA_REG(RTL8367C_ACLRULETBLEN), 0, aclRuleSmi.valid);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_TABLE_ACCESS_WRDATA_REG(RTL8367C_ACLRULETBLEN), (0x0007 << 1), (aclRuleSmi.data_bits_ext.rule_info >> 1) & 0x0007);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Write ACS_CMD register for care bits*/
-+    regAddr = RTL8367C_TABLE_ACCESS_CTRL_REG;
-+    regData = RTL8367C_TABLE_ACCESS_REG_DATA(TB_OP_WRITE, TB_TARGET_ACLRULE);
-+    retVal = rtl8367c_setAsicRegBits(regAddr, RTL8367C_TABLE_TYPE_MASK | RTL8367C_COMMAND_TYPE_MASK, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+#ifdef CONFIG_RTL8367C_ASICDRV_TEST
-+    memcpy(&Rtl8370sVirtualAclRuleTable[index], &aclRuleSmi, sizeof(rtl8367c_aclrulesmi));
-+#endif
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicAclRule
-+ * Description:
-+ *      Get acl rule content
-+ * Input:
-+ *      index   - ACL rule index (0-63) of 64 ACL rules
-+ *      pAclRule - ACL rule stucture for setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - Invalid ACL rule index (0-63)
-+  * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicAclRule(rtk_uint32 index, rtl8367c_aclrule *pAclRule)
-+{
-+    rtl8367c_aclrulesmi aclRuleSmi;
-+    rtk_uint32 regAddr, regData;
-+    ret_t retVal;
-+    rtk_uint16* tableAddr;
-+    rtk_uint32 i;
-+
-+    if(index > RTL8367C_ACLRULEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    memset(&aclRuleSmi, 0x00, sizeof(rtl8367c_aclrulesmi));
-+
-+    /* Write ACS_ADR register for data bits */
-+    regAddr = RTL8367C_TABLE_ACCESS_ADDR_REG;
-+    if(index >= 64)
-+        regData = RTL8367C_ACLRULETBADDR2(DATABITS, index);
-+    else
-+        regData = RTL8367C_ACLRULETBADDR(DATABITS, index);
-+
-+    retVal = rtl8367c_setAsicReg(regAddr, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    /* Write ACS_CMD register */
-+    regAddr = RTL8367C_TABLE_ACCESS_CTRL_REG;
-+    regData = RTL8367C_TABLE_ACCESS_REG_DATA(TB_OP_READ, TB_TARGET_ACLRULE);
-+    retVal = rtl8367c_setAsicRegBits(regAddr, RTL8367C_TABLE_TYPE_MASK | RTL8367C_COMMAND_TYPE_MASK, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Read Data Bits */
-+    regAddr = RTL8367C_TABLE_ACCESS_RDDATA_BASE;
-+    tableAddr = (rtk_uint16*)&aclRuleSmi.data_bits;
-+    for(i = 0; i < RTL8367C_ACLRULETBLEN; i++)
-+    {
-+        retVal = rtl8367c_getAsicReg(regAddr, &regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        *tableAddr = regData;
-+
-+        regAddr ++;
-+        tableAddr ++;
-+    }
-+
-+    /* Read Valid Bit */
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_TABLE_ACCESS_RDDATA_REG(RTL8367C_ACLRULETBLEN), 0, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+    aclRuleSmi.valid = regData & 0x1;
-+    /* Read active_portmsk_ext Bits */
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_TABLE_ACCESS_RDDATA_REG(RTL8367C_ACLRULETBLEN), 0x7<<1, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+    aclRuleSmi.data_bits_ext.rule_info = (regData % 0x0007) << 1;
-+
-+
-+    /* Write ACS_ADR register for carebits*/
-+    regAddr = RTL8367C_TABLE_ACCESS_ADDR_REG;
-+    if(index >= 64)
-+        regData = RTL8367C_ACLRULETBADDR2(CAREBITS, index);
-+    else
-+        regData = RTL8367C_ACLRULETBADDR(CAREBITS, index);
-+
-+    retVal = rtl8367c_setAsicReg(regAddr, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Write ACS_CMD register */
-+    regAddr = RTL8367C_TABLE_ACCESS_CTRL_REG;
-+    regData = RTL8367C_TABLE_ACCESS_REG_DATA(TB_OP_READ, TB_TARGET_ACLRULE);
-+    retVal = rtl8367c_setAsicRegBits(regAddr, RTL8367C_TABLE_TYPE_MASK | RTL8367C_COMMAND_TYPE_MASK, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Read Care Bits */
-+    regAddr = RTL8367C_TABLE_ACCESS_RDDATA_BASE;
-+    tableAddr = (rtk_uint16*)&aclRuleSmi.care_bits;
-+    for(i = 0; i < RTL8367C_ACLRULETBLEN; i++)
-+    {
-+        retVal = rtl8367c_getAsicReg(regAddr, &regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        *tableAddr = regData;
-+
-+        regAddr ++;
-+        tableAddr ++;
-+    }
-+    /* Read active_portmsk_ext care Bits */
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_TABLE_ACCESS_RDDATA_REG(RTL8367C_ACLRULETBLEN), 0x7<<1, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+    aclRuleSmi.care_bits_ext.rule_info = (regData & 0x0007) << 1;
-+
-+#ifdef CONFIG_RTL8367C_ASICDRV_TEST
-+    memcpy(&aclRuleSmi,&Rtl8370sVirtualAclRuleTable[index], sizeof(rtl8367c_aclrulesmi));
-+#endif
-+
-+     _rtl8367c_aclRuleStSmi2User(pAclRule, &aclRuleSmi);
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicAclNot
-+ * Description:
-+ *      Set rule comparison result inversion / no inversion
-+ * Input:
-+ *      index   - ACL rule index (0-95) of 96 ACL rules
-+ *      not     - 1: inverse, 0: don't inverse
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - Invalid ACL rule index (0-95)
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicAclNot(rtk_uint32 index, rtk_uint32 not)
-+{
-+    if(index > RTL8367C_ACLRULEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(index < 64)
-+        return rtl8367c_setAsicRegBit(RTL8367C_ACL_ACTION_CTRL_REG(index), RTL8367C_ACL_OP_NOT_OFFSET(index), not);
-+    else
-+        return rtl8367c_setAsicRegBit(RTL8367C_ACL_ACTION_CTRL2_REG(index), RTL8367C_ACL_OP_NOT_OFFSET(index), not);
-+
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicAcl
-+ * Description:
-+ *      Get rule comparison result inversion / no inversion
-+ * Input:
-+ *      index   - ACL rule index (0-95) of 95 ACL rules
-+ *      pNot    - 1: inverse, 0: don't inverse
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - Invalid ACL rule index (0-95)
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicAclNot(rtk_uint32 index, rtk_uint32* pNot)
-+{
-+    if(index > RTL8367C_ACLRULEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(index < 64)
-+        return rtl8367c_getAsicRegBit(RTL8367C_ACL_ACTION_CTRL_REG(index), RTL8367C_ACL_OP_NOT_OFFSET(index), pNot);
-+    else
-+        return rtl8367c_getAsicRegBit(RTL8367C_ACL_ACTION_CTRL2_REG(index), RTL8367C_ACL_OP_NOT_OFFSET(index), pNot);
-+
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicAclTemplate
-+ * Description:
-+ *      Set fields of a ACL Template
-+ * Input:
-+ *      index   - ACL template index(0~4)
-+ *      pAclType - ACL type stucture for setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - Invalid ACL template index(0~4)
-+ * Note:
-+ *      The API can set type field of the 5 ACL rule templates.
-+ *      Each type has 8 fields. One field means what data in one field of a ACL rule means
-+ *      8 fields of ACL rule 0~95 is descripted by one type in ACL group
-+ */
-+ret_t rtl8367c_setAsicAclTemplate(rtk_uint32 index, rtl8367c_acltemplate_t* pAclType)
-+{
-+    ret_t retVal;
-+    rtk_uint32 i;
-+    rtk_uint32 regAddr, regData;
-+
-+    if(index >= RTL8367C_ACLTEMPLATENO)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    regAddr = RTL8367C_ACL_RULE_TEMPLATE_CTRL_REG(index);
-+
-+    for(i = 0; i < (RTL8367C_ACLRULEFIELDNO/2); i++)
-+    {
-+        regData = pAclType->field[i*2+1];
-+        regData = regData << 8 | pAclType->field[i*2];
-+
-+        retVal = rtl8367c_setAsicReg(regAddr + i, regData);
-+
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicAclTemplate
-+ * Description:
-+ *      Get fields of a ACL Template
-+ * Input:
-+ *      index   - ACL template index(0~4)
-+ *      pAclType - ACL type stucture for setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - Invalid ACL template index(0~4)
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicAclTemplate(rtk_uint32 index, rtl8367c_acltemplate_t *pAclType)
-+{
-+    ret_t retVal;
-+    rtk_uint32 i;
-+    rtk_uint32 regData, regAddr;
-+
-+    if(index >= RTL8367C_ACLTEMPLATENO)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    regAddr = RTL8367C_ACL_RULE_TEMPLATE_CTRL_REG(index);
-+
-+    for(i = 0; i < (RTL8367C_ACLRULEFIELDNO/2); i++)
-+    {
-+        retVal = rtl8367c_getAsicReg(regAddr + i,&regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        pAclType->field[i*2] = regData & 0xFF;
-+        pAclType->field[i*2 + 1] = (regData >> 8) & 0xFF;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicAclAct
-+ * Description:
-+ *      Set ACL rule matched Action
-+ * Input:
-+ *      index   - ACL rule index (0-95) of 96 ACL rules
-+ *      pAclAct     - ACL action stucture for setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - Invalid ACL rule index (0-95)
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicAclAct(rtk_uint32 index, rtl8367c_acl_act_t* pAclAct)
-+{
-+    rtk_uint16 aclActSmi[RTL8367C_ACL_ACT_TABLE_LEN];
-+    ret_t retVal;
-+    rtk_uint32 regAddr, regData;
-+    rtk_uint16* tableAddr;
-+    rtk_uint32 i;
-+
-+    if(index > RTL8367C_ACLRULEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    memset(aclActSmi, 0x00, sizeof(rtk_uint16) * RTL8367C_ACL_ACT_TABLE_LEN);
-+     _rtl8367c_aclActStUser2Smi(pAclAct, aclActSmi);
-+
-+    /* Write ACS_ADR register for data bits */
-+    regAddr = RTL8367C_TABLE_ACCESS_ADDR_REG;
-+    regData = index;
-+    retVal = rtl8367c_setAsicReg(regAddr, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Write Data Bits to ACS_DATA registers */
-+     tableAddr = aclActSmi;
-+     regAddr = RTL8367C_TABLE_ACCESS_WRDATA_BASE;
-+
-+    for(i = 0; i < RTL8367C_ACLACTTBLEN; i++)
-+    {
-+        regData = *tableAddr;
-+        retVal = rtl8367c_setAsicReg(regAddr, regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        regAddr++;
-+        tableAddr++;
-+    }
-+
-+    /* Write ACS_CMD register for care bits*/
-+    regAddr = RTL8367C_TABLE_ACCESS_CTRL_REG;
-+    regData = RTL8367C_TABLE_ACCESS_REG_DATA(TB_OP_WRITE, TB_TARGET_ACLACT);
-+    retVal = rtl8367c_setAsicRegBits(regAddr, RTL8367C_TABLE_TYPE_MASK | RTL8367C_COMMAND_TYPE_MASK, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+#ifdef CONFIG_RTL8367C_ASICDRV_TEST
-+    memcpy(&Rtl8370sVirtualAclActTable[index][0], aclActSmi, sizeof(rtk_uint16) * RTL8367C_ACL_ACT_TABLE_LEN);
-+#endif
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicAclAct
-+ * Description:
-+ *      Get ACL rule matched Action
-+ * Input:
-+ *      index   - ACL rule index (0-95) of 96 ACL rules
-+ *      pAclAct     - ACL action stucture for setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - Invalid ACL rule index (0-95)
-+  * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicAclAct(rtk_uint32 index, rtl8367c_acl_act_t *pAclAct)
-+{
-+    rtk_uint16 aclActSmi[RTL8367C_ACL_ACT_TABLE_LEN];
-+    ret_t retVal;
-+    rtk_uint32 regAddr, regData;
-+    rtk_uint16 *tableAddr;
-+    rtk_uint32 i;
-+
-+    if(index > RTL8367C_ACLRULEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    memset(aclActSmi, 0x00, sizeof(rtk_uint16) * RTL8367C_ACL_ACT_TABLE_LEN);
-+
-+    /* Write ACS_ADR register for data bits */
-+    regAddr = RTL8367C_TABLE_ACCESS_ADDR_REG;
-+    regData = index;
-+    retVal = rtl8367c_setAsicReg(regAddr, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Write ACS_CMD register */
-+    regAddr = RTL8367C_TABLE_ACCESS_CTRL_REG;
-+    regData = RTL8367C_TABLE_ACCESS_REG_DATA(TB_OP_READ, TB_TARGET_ACLACT);
-+    retVal = rtl8367c_setAsicRegBits(regAddr, RTL8367C_TABLE_TYPE_MASK | RTL8367C_COMMAND_TYPE_MASK, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Read Data Bits */
-+    regAddr = RTL8367C_TABLE_ACCESS_RDDATA_BASE;
-+    tableAddr = aclActSmi;
-+    for(i = 0; i < RTL8367C_ACLACTTBLEN; i++)
-+    {
-+        retVal = rtl8367c_getAsicReg(regAddr, &regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        *tableAddr = regData;
-+
-+        regAddr ++;
-+        tableAddr ++;
-+    }
-+
-+#ifdef CONFIG_RTL8367C_ASICDRV_TEST
-+    memcpy(aclActSmi, &Rtl8370sVirtualAclActTable[index][0], sizeof(rtk_uint16) * RTL8367C_ACL_ACT_TABLE_LEN);
-+#endif
-+
-+     _rtl8367c_aclActStSmi2User(pAclAct, aclActSmi);
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicAclActCtrl
-+ * Description:
-+ *      Set ACL rule matched Action Control Bits
-+ * Input:
-+ *      index       - ACL rule index (0-95) of 96 ACL rules
-+ *      aclActCtrl  - 6 ACL Control Bits
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - Invalid ACL rule index (0-95)
-+ * Note:
-+ *      ACL Action Control Bits Indicate which actions will be take when a rule matches
-+ */
-+ret_t rtl8367c_setAsicAclActCtrl(rtk_uint32 index, rtk_uint32 aclActCtrl)
-+{
-+    ret_t retVal;
-+
-+    if(index > RTL8367C_ACLRULEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(index >= 64)
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_ACL_ACTION_CTRL2_REG(index), RTL8367C_ACL_OP_ACTION_MASK(index), aclActCtrl);
-+    else
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_ACL_ACTION_CTRL_REG(index), RTL8367C_ACL_OP_ACTION_MASK(index), aclActCtrl);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicAclActCtrl
-+ * Description:
-+ *      Get ACL rule matched Action Control Bits
-+ * Input:
-+ *      index       - ACL rule index (0-95) of 96 ACL rules
-+ *      pAclActCtrl     - 6 ACL Control Bits
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - Invalid ACL rule index (0-95)
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicAclActCtrl(rtk_uint32 index, rtk_uint32 *pAclActCtrl)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    if(index > RTL8367C_ACLRULEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(index >= 64)
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_ACL_ACTION_CTRL2_REG(index), RTL8367C_ACL_OP_ACTION_MASK(index), &regData);
-+    else
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_ACL_ACTION_CTRL_REG(index), RTL8367C_ACL_OP_ACTION_MASK(index), &regData);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *pAclActCtrl = regData;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicAclPortRange
-+ * Description:
-+ *      Set ACL TCP/UDP range check
-+ * Input:
-+ *      index       - TCP/UDP port range check table index
-+ *      type        - Range check type
-+ *      upperPort   - TCP/UDP port range upper bound
-+ *      lowerPort   - TCP/UDP port range lower bound
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - Invalid TCP/UDP port range check table index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicAclPortRange(rtk_uint32 index, rtk_uint32 type, rtk_uint32 upperPort, rtk_uint32 lowerPort)
-+{
-+    ret_t retVal;
-+
-+    if(index > RTL8367C_ACLRANGEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY0_CTRL2 + index*3, RTL8367C_ACL_SDPORT_RANGE_ENTRY0_CTRL2_MASK, type);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicReg(RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY0_CTRL1 + index*3, upperPort);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicReg(RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY0_CTRL0 + index*3, lowerPort);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicAclPortRange
-+ * Description:
-+ *      Get ACL TCP/UDP range check
-+ * Input:
-+ *      index       - TCP/UDP port range check table index
-+ *      pType       - Range check type
-+ *      pUpperPort  - TCP/UDP port range upper bound
-+ *      pLowerPort  - TCP/UDP port range lower bound
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - Invalid TCP/UDP port range check table index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicAclPortRange(rtk_uint32 index, rtk_uint32* pType, rtk_uint32* pUpperPort, rtk_uint32* pLowerPort)
-+{
-+    ret_t retVal;
-+
-+    if(index > RTL8367C_ACLRANGEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY0_CTRL2 + index*3, RTL8367C_ACL_SDPORT_RANGE_ENTRY0_CTRL2_MASK, pType);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY0_CTRL1 + index*3, pUpperPort);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_ACL_SDPORT_RANGE_ENTRY0_CTRL0 + index*3, pLowerPort);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicAclVidRange
-+ * Description:
-+ *      Set ACL VID range check
-+ * Input:
-+ *      index       - ACL VID range check index(0~15)
-+ *      type        - Range check type
-+ *      upperVid    - VID range upper bound
-+ *      lowerVid    - VID range lower bound
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - Invalid ACL  VID range check index(0~15)
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicAclVidRange(rtk_uint32 index, rtk_uint32 type, rtk_uint32 upperVid, rtk_uint32 lowerVid)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    if(index > RTL8367C_ACLRANGEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    regData = ((type << RTL8367C_ACL_VID_RANGE_ENTRY0_CTRL1_CHECK0_TYPE_OFFSET) & RTL8367C_ACL_VID_RANGE_ENTRY0_CTRL1_CHECK0_TYPE_MASK) |
-+                (upperVid & RTL8367C_ACL_VID_RANGE_ENTRY0_CTRL1_CHECK0_HIGH_MASK);
-+
-+    retVal = rtl8367c_setAsicReg(RTL8367C_REG_ACL_VID_RANGE_ENTRY0_CTRL1 + index*2, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicReg(RTL8367C_REG_ACL_VID_RANGE_ENTRY0_CTRL0 + index*2, lowerVid);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicAclVidRange
-+ * Description:
-+ *      Get ACL VID range check
-+ * Input:
-+ *      index       - ACL VID range check index(0~15)
-+ *      pType       - Range check type
-+ *      pUpperVid   - VID range upper bound
-+ *      pLowerVid   - VID range lower bound
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - Invalid ACL VID range check index(0~15)
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicAclVidRange(rtk_uint32 index, rtk_uint32* pType, rtk_uint32* pUpperVid, rtk_uint32* pLowerVid)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    if(index > RTL8367C_ACLRANGEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_ACL_VID_RANGE_ENTRY0_CTRL1 + index*2, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *pType = (regData & RTL8367C_ACL_VID_RANGE_ENTRY0_CTRL1_CHECK0_TYPE_MASK) >> RTL8367C_ACL_VID_RANGE_ENTRY0_CTRL1_CHECK0_TYPE_OFFSET;
-+    *pUpperVid = regData & RTL8367C_ACL_VID_RANGE_ENTRY0_CTRL1_CHECK0_HIGH_MASK;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_ACL_VID_RANGE_ENTRY0_CTRL0 + index*2, pLowerVid);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicAclIpRange
-+ * Description:
-+ *      Set ACL IP range check
-+ * Input:
-+ *      index       - ACL IP range check index(0~15)
-+ *      type        - Range check type
-+ *      upperIp     - IP range upper bound
-+ *      lowerIp     - IP range lower bound
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - Invalid ACL IP range check index(0~15)
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicAclIpRange(rtk_uint32 index, rtk_uint32 type, ipaddr_t upperIp, ipaddr_t lowerIp)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    ipaddr_t ipData;
-+
-+    if(index > RTL8367C_ACLRANGEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_ACL_IP_RANGE_ENTRY0_CTRL4 + index*5, RTL8367C_ACL_IP_RANGE_ENTRY0_CTRL4_MASK, type);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    ipData = upperIp;
-+
-+    regData = ipData & 0xFFFF;
-+    retVal = rtl8367c_setAsicReg(RTL8367C_REG_ACL_IP_RANGE_ENTRY0_CTRL2 + index*5, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    regData = (ipData>>16) & 0xFFFF;
-+    retVal = rtl8367c_setAsicReg(RTL8367C_REG_ACL_IP_RANGE_ENTRY0_CTRL3 + index*5, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    ipData = lowerIp;
-+
-+    regData = ipData & 0xFFFF;
-+    retVal = rtl8367c_setAsicReg(RTL8367C_REG_ACL_IP_RANGE_ENTRY0_CTRL0 + index*5, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    regData = (ipData>>16) & 0xFFFF;
-+    retVal = rtl8367c_setAsicReg(RTL8367C_REG_ACL_IP_RANGE_ENTRY0_CTRL1 + index*5, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicAclIpRange
-+ * Description:
-+ *      Get ACL IP range check
-+ * Input:
-+ *      index       - ACL IP range check index(0~15)
-+ *      pType       - Range check type
-+ *      pUpperIp    - IP range upper bound
-+ *      pLowerIp    - IP range lower bound
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - Invalid ACL IP range check index(0~15)
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicAclIpRange(rtk_uint32 index, rtk_uint32* pType, ipaddr_t* pUpperIp, ipaddr_t* pLowerIp)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    ipaddr_t ipData;
-+
-+    if(index > RTL8367C_ACLRANGEMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_ACL_IP_RANGE_ENTRY0_CTRL4 + index*5, RTL8367C_ACL_IP_RANGE_ENTRY0_CTRL4_MASK, pType);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_ACL_IP_RANGE_ENTRY0_CTRL2 + index*5, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+    ipData = regData;
-+
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_ACL_IP_RANGE_ENTRY0_CTRL3 + index*5, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    ipData = (regData <<16) | ipData;
-+    *pUpperIp = ipData;
-+
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_ACL_IP_RANGE_ENTRY0_CTRL0 + index*5, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+    ipData = regData;
-+
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_ACL_IP_RANGE_ENTRY0_CTRL1 + index*5, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    ipData = (regData << 16) | ipData;
-+    *pLowerIp = ipData;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicAclGpioPolarity
-+ * Description:
-+ *      Set ACL Goip control palarity
-+ * Input:
-+ *      polarity - 1: High, 0: Low
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      none
-+ */
-+ret_t rtl8367c_setAsicAclGpioPolarity(rtk_uint32 polarity)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_ACL_GPIO_POLARITY, RTL8367C_ACL_GPIO_POLARITY_OFFSET, polarity);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicAclGpioPolarity
-+ * Description:
-+ *      Get ACL Goip control palarity
-+ * Input:
-+ *      pPolarity - 1: High, 0: Low
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      none
-+ */
-+ret_t rtl8367c_getAsicAclGpioPolarity(rtk_uint32* pPolarity)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_ACL_GPIO_POLARITY, RTL8367C_ACL_GPIO_POLARITY_OFFSET, pPolarity);
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_cputag.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_cputag.c
-new file mode 100644
-index 0000000000..d22bf65eaa
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_cputag.c
-@@ -0,0 +1,369 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Proprietary CPU-tag related function drivers
-+ *
-+ */
-+#include <rtl8367c_asicdrv_cputag.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicCputagEnable
-+ * Description:
-+ *      Set cpu tag function enable/disable
-+ * Input:
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_ENABLE   - Invalid enable/disable input
-+ * Note:
-+ *      If CPU tag function is disabled, CPU tag will not be added to frame
-+ *      forwarded to CPU port, and all ports cannot parse CPU tag.
-+ */
-+ret_t rtl8367c_setAsicCputagEnable(rtk_uint32 enabled)
-+{
-+    if(enabled > 1)
-+        return RT_ERR_ENABLE;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_CPU_CTRL, RTL8367C_CPU_EN_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicCputagEnable
-+ * Description:
-+ *      Get cpu tag function enable/disable
-+ * Input:
-+ *      pEnabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicCputagEnable(rtk_uint32 *pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_CPU_CTRL, RTL8367C_CPU_EN_OFFSET, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicCputagTrapPort
-+ * Description:
-+ *      Set cpu tag trap port
-+ * Input:
-+ *      port - port number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *     API can set destination port of trapping frame
-+ */
-+ret_t rtl8367c_setAsicCputagTrapPort(rtk_uint32 port)
-+{
-+    ret_t retVal;
-+
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_CPU_CTRL, RTL8367C_CPU_TRAP_PORT_MASK, port & 7);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_CPU_CTRL, RTL8367C_CPU_TRAP_PORT_EXT_MASK, (port>>3) & 1);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicCputagTrapPort
-+ * Description:
-+ *      Get cpu tag trap port
-+ * Input:
-+ *      pPort - port number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *     None
-+ */
-+ret_t rtl8367c_getAsicCputagTrapPort(rtk_uint32 *pPort)
-+{
-+    ret_t retVal;
-+    rtk_uint32 tmpPort;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_CPU_CTRL, RTL8367C_CPU_TRAP_PORT_MASK, &tmpPort);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+    *pPort = tmpPort;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_CPU_CTRL, RTL8367C_CPU_TRAP_PORT_EXT_MASK, &tmpPort);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+    *pPort |= (tmpPort & 1) << 3;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicCputagPortmask
-+ * Description:
-+ *      Set ports that can parse CPU tag
-+ * Input:
-+ *      portmask - port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid portmask
-+ * Note:
-+ *     None
-+ */
-+ret_t rtl8367c_setAsicCputagPortmask(rtk_uint32 portmask)
-+{
-+    if(portmask > RTL8367C_PORTMASK)
-+        return RT_ERR_PORT_MASK;
-+
-+    return rtl8367c_setAsicReg(RTL8367C_CPU_PORT_MASK_REG, portmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicCputagPortmask
-+ * Description:
-+ *      Get ports that can parse CPU tag
-+ * Input:
-+ *      pPortmask - port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *     None
-+ */
-+ret_t rtl8367c_getAsicCputagPortmask(rtk_uint32 *pPortmask)
-+{
-+    return rtl8367c_getAsicReg(RTL8367C_CPU_PORT_MASK_REG, pPortmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicCputagInsertMode
-+ * Description:
-+ *      Set CPU-tag insert mode
-+ * Input:
-+ *      mode - 0: insert to all packets; 1: insert to trapped packets; 2: don't insert
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NOT_ALLOWED  - Actions not allowed by the function
-+ * Note:
-+ *     None
-+ */
-+ret_t rtl8367c_setAsicCputagInsertMode(rtk_uint32 mode)
-+{
-+    if(mode >= CPUTAG_INSERT_END)
-+        return RT_ERR_NOT_ALLOWED;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_CPU_CTRL, RTL8367C_CPU_INSERTMODE_MASK, mode);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicCputagInsertMode
-+ * Description:
-+ *      Get CPU-tag insert mode
-+ * Input:
-+ *      pMode - 0: insert to all packets; 1: insert to trapped packets; 2: don't insert
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *     None
-+ */
-+ret_t rtl8367c_getAsicCputagInsertMode(rtk_uint32 *pMode)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_CPU_CTRL, RTL8367C_CPU_INSERTMODE_MASK, pMode);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicCputagPriorityRemapping
-+ * Description:
-+ *      Set queue assignment of CPU port
-+ * Input:
-+ *      srcPri - internal priority (0~7)
-+ *      newPri - internal priority after remapping (0~7)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY     - Invalid priority
-+ * Note:
-+ *     None
-+ */
-+ret_t rtl8367c_setAsicCputagPriorityRemapping(rtk_uint32 srcPri, rtk_uint32 newPri)
-+{
-+    if((srcPri > RTL8367C_PRIMAX) || (newPri > RTL8367C_PRIMAX))
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_QOS_PRIPORITY_REMAPPING_IN_CPU_REG(srcPri), RTL8367C_QOS_PRIPORITY_REMAPPING_IN_CPU_MASK(srcPri), newPri);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicCputagPriorityRemapping
-+ * Description:
-+ *      Get queue assignment of CPU port
-+ * Input:
-+ *      srcPri - internal priority (0~7)
-+ *      pNewPri - internal priority after remapping (0~7)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY     - Invalid priority
-+ * Note:
-+ *     None
-+ */
-+ret_t rtl8367c_getAsicCputagPriorityRemapping(rtk_uint32 srcPri, rtk_uint32 *pNewPri)
-+{
-+    if(srcPri > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_QOS_PRIPORITY_REMAPPING_IN_CPU_REG(srcPri), RTL8367C_QOS_PRIPORITY_REMAPPING_IN_CPU_MASK(srcPri), pNewPri);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicCputagPosition
-+ * Description:
-+ *      Set cpu tag insert position
-+ * Input:
-+ *      postion - 1: After entire packet(before CRC field), 0: After MAC_SA (Default)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ * Note:
-+ *     None
-+ */
-+ret_t rtl8367c_setAsicCputagPosition(rtk_uint32 postion)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_CPU_CTRL, RTL8367C_CPU_TAG_POSITION_OFFSET, postion);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicCputagPosition
-+ * Description:
-+ *      Get cpu tag insert position
-+ * Input:
-+ *      pPostion - 1: After entire packet(before CRC field), 0: After MAC_SA (Default)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ * Note:
-+ *     None
-+ */
-+ret_t rtl8367c_getAsicCputagPosition(rtk_uint32* pPostion)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_CPU_CTRL, RTL8367C_CPU_TAG_POSITION_OFFSET, pPostion);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicCputagMode
-+ * Description:
-+ *      Set cpu tag mode
-+ * Input:
-+ *      mode - 1: 4bytes mode, 0: 8bytes mode
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_INPUT    - Invalid input parameters
-+ * Note:
-+ *      If CPU tag function is disabled, CPU tag will not be added to frame
-+ *      forwarded to CPU port, and all ports cannot parse CPU tag.
-+ */
-+ret_t rtl8367c_setAsicCputagMode(rtk_uint32 mode)
-+{
-+    if(mode > 1)
-+        return RT_ERR_INPUT;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_CPU_CTRL, RTL8367C_CPU_TAG_FORMAT_OFFSET, mode);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicCputagMode
-+ * Description:
-+ *      Get cpu tag mode
-+ * Input:
-+ *      pMode - 1: 4bytes mode, 0: 8bytes mode
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicCputagMode(rtk_uint32 *pMode)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_CPU_CTRL, RTL8367C_CPU_TAG_FORMAT_OFFSET, pMode);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicCputagRxMinLength
-+ * Description:
-+ *      Set cpu tag mode
-+ * Input:
-+ *      mode - 1: 64bytes, 0: 72bytes
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_INPUT    - Invalid input parameters
-+ * Note:
-+ *      If CPU tag function is disabled, CPU tag will not be added to frame
-+ *      forwarded to CPU port, and all ports cannot parse CPU tag.
-+ */
-+ret_t rtl8367c_setAsicCputagRxMinLength(rtk_uint32 mode)
-+{
-+    if(mode > 1)
-+        return RT_ERR_INPUT;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_CPU_CTRL, RTL8367C_CPU_TAG_RXBYTECOUNT_OFFSET, mode);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicCputagRxMinLength
-+ * Description:
-+ *      Get cpu tag mode
-+ * Input:
-+ *      pMode - 1: 64bytes, 0: 72bytes
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicCputagRxMinLength(rtk_uint32 *pMode)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_CPU_CTRL, RTL8367C_CPU_TAG_RXBYTECOUNT_OFFSET, pMode);
-+}
-+
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_dot1x.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_dot1x.c
-new file mode 100644
-index 0000000000..73153e177e
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_dot1x.c
-@@ -0,0 +1,415 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : 802.1X related functions
-+ *
-+ */
-+#include <rtl8367c_asicdrv_dot1x.h>
-+/* Function Name:
-+ *      rtl8367c_setAsic1xPBEnConfig
-+ * Description:
-+ *      Set 802.1x port-based port enable configuration
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsic1xPBEnConfig(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_DOT1X_PORT_ENABLE_REG, port, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsic1xPBEnConfig
-+ * Description:
-+ *      Get 802.1x port-based port enable configuration
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pEnabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsic1xPBEnConfig(rtk_uint32 port, rtk_uint32 *pEnabled)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_DOT1X_PORT_ENABLE_REG, port, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsic1xPBAuthConfig
-+ * Description:
-+ *      Set 802.1x port-based authorised port configuration
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      auth    - 1: authorised, 0: non-authorised
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsic1xPBAuthConfig(rtk_uint32 port, rtk_uint32 auth)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_DOT1X_PORT_AUTH_REG, port, auth);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsic1xPBAuthConfig
-+ * Description:
-+ *      Get 802.1x port-based authorised port configuration
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pAuth   - 1: authorised, 0: non-authorised
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsic1xPBAuthConfig(rtk_uint32 port, rtk_uint32 *pAuth)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_DOT1X_PORT_AUTH_REG, port, pAuth);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsic1xPBOpdirConfig
-+ * Description:
-+ *      Set 802.1x port-based operational direction
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      opdir   - Operation direction 1: IN, 0:BOTH
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsic1xPBOpdirConfig(rtk_uint32 port, rtk_uint32 opdir)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_DOT1X_PORT_OPDIR_REG, port, opdir);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsic1xPBOpdirConfig
-+ * Description:
-+ *      Get 802.1x port-based operational direction
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pOpdir  - Operation direction 1: IN, 0:BOTH
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsic1xPBOpdirConfig(rtk_uint32 port, rtk_uint32* pOpdir)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_DOT1X_PORT_OPDIR_REG, port, pOpdir);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsic1xMBEnConfig
-+ * Description:
-+ *      Set 802.1x mac-based port enable configuration
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsic1xMBEnConfig(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_DOT1X_MAC_ENABLE_REG, port, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsic1xMBEnConfig
-+ * Description:
-+ *      Get 802.1x mac-based port enable configuration
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pEnabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsic1xMBEnConfig(rtk_uint32 port, rtk_uint32 *pEnabled)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_DOT1X_MAC_ENABLE_REG, port, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsic1xMBOpdirConfig
-+ * Description:
-+ *      Set 802.1x mac-based operational direction
-+ * Input:
-+ *      opdir       - Operation direction 1: IN, 0:BOTH
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsic1xMBOpdirConfig(rtk_uint32 opdir)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_DOT1X_CFG_REG, RTL8367C_DOT1X_MAC_OPDIR_OFFSET, opdir);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsic1xMBOpdirConfig
-+ * Description:
-+ *      Get 802.1x mac-based operational direction
-+ * Input:
-+ *      pOpdir      - Operation direction 1: IN, 0:BOTH
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsic1xMBOpdirConfig(rtk_uint32 *pOpdir)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_DOT1X_CFG_REG, RTL8367C_DOT1X_MAC_OPDIR_OFFSET, pOpdir);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsic1xProcConfig
-+ * Description:
-+ *      Set 802.1x unauth. behavior configuration
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      proc    - 802.1x unauth. behavior configuration 0:drop 1:trap to CPU 2:Guest VLAN
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_DOT1X_PROC   - Unauthorized behavior error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsic1xProcConfig(rtk_uint32 port, rtk_uint32 proc)
-+{
-+
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if(proc >= DOT1X_UNAUTH_END)
-+        return RT_ERR_DOT1X_PROC;
-+
-+    if(port < 8)
-+    {
-+        return rtl8367c_setAsicRegBits(RTL8367C_DOT1X_UNAUTH_ACT_BASE, RTL8367C_DOT1X_UNAUTH_ACT_MASK(port),proc);
-+    }
-+    else
-+    {
-+        return rtl8367c_setAsicRegBits(RTL8367C_REG_DOT1X_UNAUTH_ACT_W1, RTL8367C_DOT1X_UNAUTH_ACT_MASK(port),proc);
-+    }
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsic1xProcConfig
-+ * Description:
-+ *      Get 802.1x unauth. behavior configuration
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pProc   - 802.1x unauth. behavior configuration 0:drop 1:trap to CPU 2:Guest VLAN
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsic1xProcConfig(rtk_uint32 port, rtk_uint32* pProc)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+    return rtl8367c_getAsicRegBits(RTL8367C_DOT1X_UNAUTH_ACT_BASE, RTL8367C_DOT1X_UNAUTH_ACT_MASK(port),pProc);
-+    else
-+        return rtl8367c_getAsicRegBits(RTL8367C_REG_DOT1X_UNAUTH_ACT_W1, RTL8367C_DOT1X_UNAUTH_ACT_MASK(port),pProc);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsic1xGuestVidx
-+ * Description:
-+ *      Set 802.1x guest vlan index
-+ * Input:
-+ *      index   - 802.1x guest vlan index (0~31)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_DOT1X_GVLANIDX   - Invalid cvid index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsic1xGuestVidx(rtk_uint32 index)
-+{
-+    if(index >= RTL8367C_CVIDXNO)
-+        return RT_ERR_DOT1X_GVLANIDX;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_DOT1X_CFG_REG, RTL8367C_DOT1X_GVIDX_MASK, index);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsic1xGuestVidx
-+ * Description:
-+ *      Get 802.1x guest vlan index
-+ * Input:
-+ *      pIndex  - 802.1x guest vlan index (0~31)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsic1xGuestVidx(rtk_uint32 *pIndex)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_DOT1X_CFG_REG, RTL8367C_DOT1X_GVIDX_MASK, pIndex);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsic1xGVOpdir
-+ * Description:
-+ *      Set 802.1x guest vlan talk to auth. DA
-+ * Input:
-+ *      enabled     - 0:disable 1:enable
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsic1xGVOpdir(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_DOT1X_CFG_REG, RTL8367C_DOT1X_GVOPDIR_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsic1xGVOpdir
-+ * Description:
-+ *      Get 802.1x guest vlan talk to auth. DA
-+ * Input:
-+ *      pEnabled        - 0:disable 1:enable
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsic1xGVOpdir(rtk_uint32 *pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_DOT1X_CFG_REG, RTL8367C_DOT1X_GVOPDIR_OFFSET, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsic1xTrapPriority
-+ * Description:
-+ *      Set 802.1x Trap priority
-+ * Input:
-+ *      priority    - priority (0~7)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsic1xTrapPriority(rtk_uint32 priority)
-+{
-+    if(priority > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_QOS_TRAP_PRIORITY0, RTL8367C_DOT1X_PRIORTY_MASK,priority);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsic1xTrapPriority
-+ * Description:
-+ *      Get 802.1x Trap priority
-+ * Input:
-+ *      pPriority   - priority (0~7)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsic1xTrapPriority(rtk_uint32 *pPriority)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_QOS_TRAP_PRIORITY0, RTL8367C_DOT1X_PRIORTY_MASK, pPriority);
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_eav.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_eav.c
-new file mode 100644
-index 0000000000..370b7c6f3a
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_eav.c
-@@ -0,0 +1,877 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Ethernet AV related functions
-+ *
-+ */
-+
-+#include <rtl8367c_asicdrv_eav.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicEavMacAddress
-+ * Description:
-+ *      Set PTP MAC address
-+ * Input:
-+ *      mac     - PTP mac
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK         - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicEavMacAddress(ether_addr_t mac)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint8 *accessPtr;
-+    rtk_uint32 i;
-+
-+    accessPtr =  (rtk_uint8*)&mac;
-+
-+    regData = *accessPtr;
-+    accessPtr ++;
-+    regData = (regData << 8) | *accessPtr;
-+    accessPtr ++;
-+    for(i = 0; i <=2; i++)
-+    {
-+        retVal = rtl8367c_setAsicReg(RTL8367C_REG_MAC_ADDR_H - i, regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        regData = *accessPtr;
-+        accessPtr ++;
-+        regData = (regData << 8) | *accessPtr;
-+        accessPtr ++;
-+    }
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicEavMacAddress
-+ * Description:
-+ *      Get PTP MAC address
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pMac     - PTP  mac
-+ * Return:
-+ *      RT_ERR_OK         - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicEavMacAddress(ether_addr_t *pMac)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint8 *accessPtr;
-+    rtk_uint32 i;
-+
-+    accessPtr = (rtk_uint8*)pMac;
-+
-+    for(i = 0; i <= 2; i++)
-+    {
-+        retVal = rtl8367c_getAsicReg(RTL8367C_REG_MAC_ADDR_H - i, &regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        *accessPtr = (regData & 0xFF00) >> 8;
-+        accessPtr ++;
-+        *accessPtr = regData & 0xFF;
-+        accessPtr ++;
-+    }
-+
-+    return retVal;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicEavTpid
-+ * Description:
-+ *      Set PTP parser tag TPID.
-+ * Input:
-+ *       outerTag - outter tag TPID
-+ *       innerTag  - inner tag TPID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *     None
-+ */
-+ret_t rtl8367c_setAsicEavTpid(rtk_uint32 outerTag, rtk_uint32 innerTag)
-+{
-+    ret_t retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(RTL8367C_REG_OTAG_TPID, outerTag)) != RT_ERR_OK)
-+        return retVal;
-+    if((retVal = rtl8367c_setAsicReg(RTL8367C_REG_ITAG_TPID, innerTag)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicEavTpid
-+ * Description:
-+ *      Get PTP parser tag TPID.
-+ * Input:
-+ *      None
-+ * Output:
-+ *       pOuterTag - outter tag TPID
-+ *       pInnerTag  - inner tag TPID
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicEavTpid(rtk_uint32* pOuterTag, rtk_uint32* pInnerTag)
-+{
-+    ret_t retVal;
-+
-+    if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_OTAG_TPID, pOuterTag)) != RT_ERR_OK)
-+        return retVal;
-+    if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_ITAG_TPID, pInnerTag)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicEavSysTime
-+ * Description:
-+ *      Set PTP system time
-+ * Input:
-+ *      second - seconds
-+ *      nanoSecond - nano seconds
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK     - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      The time granuality is 8 nano seconds.
-+ */
-+ret_t rtl8367c_setAsicEavSysTime(rtk_uint32 second, rtk_uint32 nanoSecond)
-+{
-+    ret_t retVal;
-+    rtk_uint32 sec_h, sec_l, nsec8_h, nsec8_l;
-+    rtk_uint32 nano_second_8;
-+    rtk_uint32 regData, busyFlag, count;
-+
-+    if(nanoSecond > RTL8367C_EAV_NANOSECONDMAX)
-+        return RT_ERR_INPUT;
-+
-+    regData = 0;
-+    sec_h = second >>16;
-+    sec_l = second & 0xFFFF;
-+    nano_second_8 = nanoSecond >> 3;
-+    nsec8_h = (nano_second_8 >>16) & RTL8367C_PTP_TIME_NSEC_H_NSEC_MASK;
-+    nsec8_l = nano_second_8 &0xFFFF;
-+
-+    if((retVal = rtl8367c_setAsicReg(RTL8367C_REG_PTP_TIME_SEC_H_SEC, sec_h)) != RT_ERR_OK)
-+        return retVal;
-+    if((retVal = rtl8367c_setAsicReg(RTL8367C_REG_PTP_TIME_SEC_L_SEC, sec_l)) != RT_ERR_OK)
-+        return retVal;
-+    if((retVal = rtl8367c_setAsicReg(RTL8367C_REG_PTP_TIME_NSEC_L_NSEC, nsec8_l)) != RT_ERR_OK)
-+        return retVal;
-+
-+    regData = nsec8_h | (PTP_TIME_WRITE<<RTL8367C_PTP_TIME_NSEC_H_CMD_OFFSET) | RTL8367C_PTP_TIME_NSEC_H_EXEC_MASK;
-+
-+    if((retVal = rtl8367c_setAsicReg(RTL8367C_REG_PTP_TIME_NSEC_H_NSEC, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    count = 0;
-+    do {
-+        if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_PTP_TIME_NSEC_H_NSEC, RTL8367C_PTP_TIME_NSEC_H_EXEC_OFFSET, &busyFlag)) != RT_ERR_OK)
-+            return retVal;
-+        count++;
-+    } while ((busyFlag != 0)&&(count<5));
-+
-+    if (busyFlag != 0)
-+        return RT_ERR_BUSYWAIT_TIMEOUT;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicEavSysTime
-+ * Description:
-+ *      Get PTP system time
-+ * Input:
-+ *      None
-+ * Output:
-+ *      second - seconds
-+ *      nanoSecond - nano seconds
-+ * Return:
-+ *      RT_ERR_OK     - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      The time granuality is 8 nano seconds.
-+ */
-+ret_t rtl8367c_getAsicEavSysTime(rtk_uint32* pSecond, rtk_uint32* pNanoSecond)
-+{
-+    ret_t retVal;
-+    rtk_uint32 sec_h, sec_l, nsec8_h, nsec8_l;
-+    rtk_uint32 nano_second_8;
-+    rtk_uint32 regData, busyFlag, count;
-+
-+    regData = 0;
-+    regData = (PTP_TIME_READ<<RTL8367C_PTP_TIME_NSEC_H_CMD_OFFSET) | RTL8367C_PTP_TIME_NSEC_H_EXEC_MASK;
-+
-+    if((retVal = rtl8367c_setAsicReg(RTL8367C_REG_PTP_TIME_NSEC_H_NSEC, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    count = 0;
-+    do {
-+        if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_PTP_TIME_NSEC_H_NSEC, RTL8367C_PTP_TIME_NSEC_H_EXEC_OFFSET, &busyFlag)) != RT_ERR_OK)
-+            return retVal;
-+        count++;
-+    } while ((busyFlag != 0)&&(count<5));
-+
-+    if (busyFlag != 0)
-+        return RT_ERR_BUSYWAIT_TIMEOUT;
-+
-+    if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_PTP_TIME_SEC_H_SEC_RD, &sec_h)) != RT_ERR_OK)
-+        return retVal;
-+    if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_PTP_TIME_SEC_L_SEC_RD, &sec_l)) != RT_ERR_OK)
-+        return retVal;
-+    if((retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_PTP_TIME_NSEC_H_NSEC_RD, RTL8367C_PTP_TIME_NSEC_H_NSEC_RD_MASK,&nsec8_h)) != RT_ERR_OK)
-+        return retVal;
-+    if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_PTP_TIME_NSEC_L_NSEC_RD, &nsec8_l)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pSecond = (sec_h<<16) | sec_l;
-+    nano_second_8 = (nsec8_h<<16) | nsec8_l;
-+    *pNanoSecond = nano_second_8<<3;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicEavSysTimeAdjust
-+ * Description:
-+ *      Set PTP system time adjust
-+ * Input:
-+ *      type - incresae or decrease
-+ *      second - seconds
-+ *      nanoSecond - nano seconds
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK     - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      Ethernet AV second offset of timer for tuning
-+ */
-+ret_t rtl8367c_setAsicEavSysTimeAdjust(rtk_uint32 type, rtk_uint32 second, rtk_uint32 nanoSecond)
-+{
-+    ret_t retVal;
-+    rtk_uint32 sec_h, sec_l, nsec8_h, nsec8_l;
-+    rtk_uint32 nano_second_8;
-+    rtk_uint32 regData, busyFlag, count;
-+
-+    if (type >= PTP_TIME_ADJ_END)
-+        return RT_ERR_INPUT;
-+    if(nanoSecond > RTL8367C_EAV_NANOSECONDMAX)
-+        return RT_ERR_INPUT;
-+
-+    regData = 0;
-+    sec_h = second >>16;
-+    sec_l = second & 0xFFFF;
-+    nano_second_8 = nanoSecond >> 3;
-+    nsec8_h = (nano_second_8 >>16) & RTL8367C_PTP_TIME_NSEC_H_NSEC_MASK;
-+    nsec8_l = nano_second_8 &0xFFFF;
-+
-+    if((retVal = rtl8367c_setAsicReg(RTL8367C_REG_PTP_TIME_SEC_H_SEC, sec_h)) != RT_ERR_OK)
-+        return retVal;
-+    if((retVal = rtl8367c_setAsicReg(RTL8367C_REG_PTP_TIME_SEC_L_SEC, sec_l)) != RT_ERR_OK)
-+        return retVal;
-+    if((retVal = rtl8367c_setAsicReg(RTL8367C_REG_PTP_TIME_NSEC_L_NSEC, nsec8_l)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (PTP_TIME_ADJ_INC == type)
-+        regData = nsec8_h | (PTP_TIME_INC<<RTL8367C_PTP_TIME_NSEC_H_CMD_OFFSET) | RTL8367C_PTP_TIME_NSEC_H_EXEC_MASK;
-+    else
-+        regData = nsec8_h | (PTP_TIME_DEC<<RTL8367C_PTP_TIME_NSEC_H_CMD_OFFSET) | RTL8367C_PTP_TIME_NSEC_H_EXEC_MASK;
-+
-+    if((retVal = rtl8367c_setAsicReg(RTL8367C_REG_PTP_TIME_NSEC_H_NSEC, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    count = 0;
-+    do {
-+        if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_PTP_TIME_NSEC_H_NSEC, RTL8367C_PTP_TIME_NSEC_H_EXEC_OFFSET, &busyFlag)) != RT_ERR_OK)
-+            return retVal;
-+        count++;
-+    } while ((busyFlag != 0)&&(count<5));
-+
-+    if (busyFlag != 0)
-+        return RT_ERR_BUSYWAIT_TIMEOUT;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicEavSysTimeCtrl
-+ * Description:
-+ *      Set PTP system time control
-+ * Input:
-+ *      command - start or stop
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK     - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicEavSysTimeCtrl(rtk_uint32 control)
-+{
-+    ret_t  retVal;
-+    rtk_uint32 regData;
-+
-+    if (control>=PTP_TIME_CTRL_END)
-+         return RT_ERR_INPUT;
-+
-+    regData = 0;
-+    if (PTP_TIME_CTRL_START == control)
-+            regData = RTL8367C_CFG_TIMER_EN_FRC_MASK | RTL8367C_CFG_TIMER_1588_EN_MASK;
-+    else
-+        regData = 0;
-+
-+    if((retVal = rtl8367c_setAsicReg(RTL8367C_REG_PTP_TIME_CFG, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicEavSysTimeCtrl
-+ * Description:
-+ *      Get PTP system time control
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pControl - start or stop
-+ * Return:
-+ *      RT_ERR_OK     - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicEavSysTimeCtrl(rtk_uint32* pControl)
-+{
-+    ret_t  retVal;
-+    rtk_uint32 regData;
-+    rtk_uint32 mask;
-+
-+    mask = RTL8367C_CFG_TIMER_EN_FRC_MASK | RTL8367C_CFG_TIMER_1588_EN_MASK;
-+
-+    if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_PTP_TIME_CFG, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if( (regData & mask) == mask)
-+        *pControl = PTP_TIME_CTRL_START;
-+    else if( (regData & mask) == 0)
-+        *pControl = PTP_TIME_CTRL_STOP;
-+    else
-+        return RT_ERR_NOT_ALLOWED;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicEavInterruptMask
-+ * Description:
-+ *      Set PTP interrupt enable mask
-+ * Input:
-+ *      imr     - Interrupt mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      [0]:TX_SYNC,
-+ *      [1]:TX_DELAY,
-+ *      [2]:TX_PDELAY_REQ,
-+ *      [3]:TX_PDELAY_RESP,
-+ *      [4]:RX_SYNC,
-+ *      [5]:RX_DELAY,
-+ *      [6]:RX_PDELAY_REQ,
-+ *      [7]:RX_PDELAY_RESP,
-+ */
-+ret_t rtl8367c_setAsicEavInterruptMask(rtk_uint32 imr)
-+{
-+    if ((imr&(RTL8367C_PTP_INTR_MASK<<8))>0)
-+         return RT_ERR_INPUT;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_PTP_TIME_CFG2, RTL8367C_PTP_INTR_MASK, imr);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicEavInterruptMask
-+ * Description:
-+ *      Get PTP interrupt enable mask
-+ * Input:
-+ *      pImr    - Interrupt mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      [0]:TX_SYNC,
-+ *      [1]:TX_DELAY,
-+ *      [2]:TX_PDELAY_REQ,
-+ *      [3]:TX_PDELAY_RESP,
-+ *      [4]:RX_SYNC,
-+ *      [5]:RX_DELAY,
-+ *      [6]:RX_PDELAY_REQ,
-+ *      [7]:RX_PDELAY_RESP,
-+ */
-+ret_t rtl8367c_getAsicEavInterruptMask(rtk_uint32* pImr)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_PTP_TIME_CFG2, RTL8367C_PTP_INTR_MASK, pImr);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicEavInterruptStatus
-+ * Description:
-+ *      Get PTP interrupt port status mask
-+ * Input:
-+ *      pIms    - Interrupt mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      [0]:p0 interrupt,
-+ *      [1]:p1 interrupt,
-+ *      [2]:p2 interrupt,
-+ *      [3]:p3 interrupt,
-+ *      [4]:p4 interrupt,
-+ */
-+ret_t rtl8367c_getAsicEavInterruptStatus(rtk_uint32* pIms)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_PTP_INTERRUPT_CFG, RTL8367C_PTP_PORT_MASK, pIms);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicInterruptMask
-+ * Description:
-+ *      Clear interrupt enable mask
-+ * Input:
-+ *      ims     - Interrupt status mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      This API can be used to clear ASIC interrupt status and register will be cleared by writting 1.
-+ *      [0]:TX_SYNC,
-+ *      [1]:TX_DELAY,
-+ *      [2]:TX_PDELAY_REQ,
-+ *      [3]:TX_PDELAY_RESP,
-+ *      [4]:RX_SYNC,
-+ *      [5]:RX_DELAY,
-+ *      [6]:RX_PDELAY_REQ,
-+ *      [7]:RX_PDELAY_RESP,
-+ */
-+ret_t rtl8367c_setAsicEavPortInterruptStatus(rtk_uint32 port, rtk_uint32 ims)
-+{
-+
-+    if(port > RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 5)
-+        return rtl8367c_setAsicRegBits(RTL8367C_EAV_PORT_CFG_REG(port), RTL8367C_PTP_INTR_MASK,ims);
-+    else if(port == 5)
-+        return rtl8367c_setAsicRegBits(RTL8367C_REG_P5_EAV_CFG, RTL8367C_PTP_INTR_MASK,ims);
-+    else if(port == 6)
-+        return rtl8367c_setAsicRegBits(RTL8367C_REG_P6_EAV_CFG, RTL8367C_PTP_INTR_MASK,ims);
-+    else if(port == 7)
-+        return rtl8367c_setAsicRegBits(RTL8367C_REG_P7_EAV_CFG, RTL8367C_PTP_INTR_MASK,ims);
-+    else if(port == 8)
-+        return rtl8367c_setAsicRegBits(RTL8367C_REG_P8_EAV_CFG, RTL8367C_PTP_INTR_MASK,ims);
-+    else if(port == 9)
-+        return rtl8367c_setAsicRegBits(RTL8367C_REG_P9_EAV_CFG, RTL8367C_PTP_INTR_MASK,ims);
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicInterruptStatus
-+ * Description:
-+ *      Get interrupt enable mask
-+ * Input:
-+ *      pIms    - Interrupt status mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      [0]:TX_SYNC,
-+ *      [1]:TX_DELAY,
-+ *      [2]:TX_PDELAY_REQ,
-+ *      [3]:TX_PDELAY_RESP,
-+ *      [4]:RX_SYNC,
-+ *      [5]:RX_DELAY,
-+ *      [6]:RX_PDELAY_REQ,
-+ *      [7]:RX_PDELAY_RESP,
-+ */
-+ret_t rtl8367c_getAsicEavPortInterruptStatus(rtk_uint32 port, rtk_uint32* pIms)
-+{
-+
-+    if(port > RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+    if(port < 5)
-+        return rtl8367c_getAsicRegBits(RTL8367C_EAV_PORT_CFG_REG(port), RTL8367C_PTP_INTR_MASK, pIms);
-+    else if(port == 5)
-+        return rtl8367c_getAsicRegBits(RTL8367C_REG_P5_EAV_CFG, RTL8367C_PTP_INTR_MASK, pIms);
-+    else if(port == 6)
-+        return rtl8367c_getAsicRegBits(RTL8367C_REG_P6_EAV_CFG, RTL8367C_PTP_INTR_MASK,pIms);
-+    else if(port == 7)
-+        return rtl8367c_getAsicRegBits(RTL8367C_REG_P7_EAV_CFG, RTL8367C_PTP_INTR_MASK,pIms);
-+    else if(port == 8)
-+        return rtl8367c_getAsicRegBits(RTL8367C_REG_P8_EAV_CFG, RTL8367C_PTP_INTR_MASK,pIms);
-+    else if(port == 9)
-+        return rtl8367c_getAsicRegBits(RTL8367C_REG_P9_EAV_CFG, RTL8367C_PTP_INTR_MASK,pIms);
-+
-+    return RT_ERR_OK;
-+
-+}
-+
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicEavPortEnable
-+ * Description:
-+ *      Set per-port EAV function enable/disable
-+ * Input:
-+ *      port         - Physical port number (0~9)
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK         - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      If EAV function is enabled, PTP event messgae packet will be attached PTP timestamp for trapping
-+ */
-+ret_t rtl8367c_setAsicEavPortEnable(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    if(port > RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 5)
-+        return rtl8367c_setAsicRegBit(RTL8367C_EAV_PORT_CFG_REG(port), RTL8367C_EAV_CFG_PTP_PHY_EN_EN_OFFSET, enabled);
-+    else if(port == 5)
-+        return rtl8367c_setAsicRegBit(RTL8367C_REG_P5_EAV_CFG, RTL8367C_EAV_CFG_PTP_PHY_EN_EN_OFFSET, enabled);
-+    else if(port == 6)
-+        return rtl8367c_setAsicRegBit(RTL8367C_REG_P6_EAV_CFG, RTL8367C_EAV_CFG_PTP_PHY_EN_EN_OFFSET, enabled);
-+    else if(port == 7)
-+        return rtl8367c_setAsicRegBit(RTL8367C_REG_P7_EAV_CFG, RTL8367C_EAV_CFG_PTP_PHY_EN_EN_OFFSET, enabled);
-+    else if(port == 8)
-+        return rtl8367c_setAsicRegBit(RTL8367C_REG_P8_EAV_CFG, RTL8367C_EAV_CFG_PTP_PHY_EN_EN_OFFSET, enabled);
-+    else if(port == 9)
-+        return rtl8367c_setAsicRegBit(RTL8367C_REG_P9_EAV_CFG, RTL8367C_EAV_CFG_PTP_PHY_EN_EN_OFFSET, enabled);
-+
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicEavPortEnable
-+ * Description:
-+ *      Get per-port EAV function enable/disable
-+ * Input:
-+ *      port         - Physical port number (0~9)
-+ *      pEnabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK         - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicEavPortEnable(rtk_uint32 port, rtk_uint32 *pEnabled)
-+{
-+    if(port > RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+
-+
-+    if(port < 5)
-+        return rtl8367c_getAsicRegBit(RTL8367C_EAV_PORT_CFG_REG(port), RTL8367C_EAV_CFG_PTP_PHY_EN_EN_OFFSET, pEnabled);
-+    else if(port == 5)
-+        return rtl8367c_getAsicRegBit(RTL8367C_REG_P5_EAV_CFG, RTL8367C_EAV_CFG_PTP_PHY_EN_EN_OFFSET, pEnabled);
-+    else if(port == 6)
-+        return rtl8367c_getAsicRegBit(RTL8367C_REG_P6_EAV_CFG, RTL8367C_EAV_CFG_PTP_PHY_EN_EN_OFFSET, pEnabled);
-+    else if(port == 7)
-+        return rtl8367c_getAsicRegBit(RTL8367C_REG_P7_EAV_CFG, RTL8367C_EAV_CFG_PTP_PHY_EN_EN_OFFSET, pEnabled);
-+    else if(port == 8)
-+        return rtl8367c_getAsicRegBit(RTL8367C_REG_P8_EAV_CFG, RTL8367C_EAV_CFG_PTP_PHY_EN_EN_OFFSET, pEnabled);
-+    else if(port == 9)
-+        return rtl8367c_getAsicRegBit(RTL8367C_REG_P9_EAV_CFG, RTL8367C_EAV_CFG_PTP_PHY_EN_EN_OFFSET, pEnabled);
-+
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicEavPortTimeStamp
-+ * Description:
-+ *      Get PTP port time stamp
-+ * Input:
-+ *      port         - Physical port number (0~9)
-+ *      type     -  PTP packet type
-+ * Output:
-+ *      timeStamp - seconds
-+ * Return:
-+ *      RT_ERR_OK     - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      The time granuality is 8 nano seconds.
-+ */
-+ret_t rtl8367c_getAsicEavPortTimeStamp(rtk_uint32 port, rtk_uint32 type, rtl8367c_ptp_time_stamp_t* timeStamp)
-+{
-+    ret_t retVal;
-+    rtk_uint32 sec_h, sec_l, nsec8_h, nsec8_l;
-+    rtk_uint32 nano_second_8;
-+
-+    if(port > 9)
-+        return RT_ERR_PORT_ID;
-+    if(type >= PTP_PKT_TYPE_END)
-+        return RT_ERR_INPUT;
-+
-+    if(port < 5){
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_SEQ_ID(port, type), &timeStamp->sequence_id))!=  RT_ERR_OK)
-+            return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_PORT_SEC_H(port) , &sec_h)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_PORT_SEC_L(port), &sec_l)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_PORT_NSEC_H(port) , RTL8367C_PORT_NSEC_H_MASK,&nsec8_h)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_PORT_NSEC_L(port) , &nsec8_l)) != RT_ERR_OK)
-+           return retVal;
-+    }else if(port == 5){
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P5_TX_SYNC_SEQ_ID+type, &timeStamp->sequence_id))!=  RT_ERR_OK)
-+            return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P5_PORT_SEC_31_16, &sec_h)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P5_PORT_SEC_15_0, &sec_l)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_P5_PORT_NSEC_26_16 , RTL8367C_PORT_NSEC_H_MASK,&nsec8_h)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P5_PORT_NSEC_15_0, &nsec8_l)) != RT_ERR_OK)
-+           return retVal;
-+    }else if(port == 6){
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P6_TX_SYNC_SEQ_ID+type, &timeStamp->sequence_id))!=  RT_ERR_OK)
-+            return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P6_PORT_SEC_31_16, &sec_h)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P6_PORT_SEC_15_0, &sec_l)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_P6_PORT_NSEC_26_16 , RTL8367C_PORT_NSEC_H_MASK,&nsec8_h)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P6_PORT_NSEC_15_0, &nsec8_l)) != RT_ERR_OK)
-+           return retVal;
-+    }else if(port == 7){
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P7_TX_SYNC_SEQ_ID+type, &timeStamp->sequence_id))!=  RT_ERR_OK)
-+            return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P7_PORT_SEC_31_16, &sec_h)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P7_PORT_SEC_15_0, &sec_l)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_P7_PORT_NSEC_26_16 , RTL8367C_PORT_NSEC_H_MASK,&nsec8_h)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P7_PORT_NSEC_15_0, &nsec8_l)) != RT_ERR_OK)
-+           return retVal;
-+    }else if(port == 8){
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P8_TX_SYNC_SEQ_ID+type, &timeStamp->sequence_id))!=  RT_ERR_OK)
-+            return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P8_PORT_SEC_31_16, &sec_h)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P8_PORT_SEC_15_0, &sec_l)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_P8_PORT_NSEC_26_16 , RTL8367C_PORT_NSEC_H_MASK,&nsec8_h)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P8_PORT_NSEC_15_0, &nsec8_l)) != RT_ERR_OK)
-+           return retVal;
-+    }else if(port == 9){
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P9_TX_SYNC_SEQ_ID+type, &timeStamp->sequence_id))!=  RT_ERR_OK)
-+            return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P9_PORT_SEC_31_16, &sec_h)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P9_PORT_SEC_15_0, &sec_l)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_P9_PORT_NSEC_26_16 , RTL8367C_PORT_NSEC_H_MASK,&nsec8_h)) != RT_ERR_OK)
-+           return retVal;
-+        if((retVal = rtl8367c_getAsicReg(RTL8367C_REG_P9_PORT_NSEC_15_0, &nsec8_l)) != RT_ERR_OK)
-+           return retVal;
-+    }
-+
-+    timeStamp->second = (sec_h<<16) | sec_l;
-+    nano_second_8 = (nsec8_h<<16) | nsec8_l;
-+    timeStamp->nano_second = nano_second_8<<3;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicEavTrap
-+ * Description:
-+ *      Set per-port PTP packet trap to CPU
-+ * Input:
-+ *      port         - Physical port number (0~5)
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK         - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      If EAV trap enabled, switch will trap PTP packet to CPU
-+ */
-+ret_t rtl8367c_setAsicEavTrap(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    if(port > RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_PTP_PORT0_CFG1 + (port * 0x20), RTL8367C_PTP_PORT0_CFG1_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicEavTimeSyncEn
-+ * Description:
-+ *      Get per-port EPTP packet trap to CPU
-+ * Input:
-+ *      port         - Physical port number (0~5)
-+ *      pEnabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK         - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicEavTrap(rtk_uint32 port, rtk_uint32 *pEnabled)
-+{
-+    if(port > RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_PTP_PORT0_CFG1 + (port * 0x20), RTL8367C_PTP_PORT0_CFG1_OFFSET, pEnabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicEavEnable
-+ * Description:
-+ *      Set per-port EAV function enable/disable
-+ * Input:
-+ *      port         - Physical port number (0~5)
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK         - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      If EAV function is enabled, PTP event messgae packet will be attached PTP timestamp for trapping
-+ */
-+ret_t rtl8367c_setAsicEavEnable(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    if(port > RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_EAV_CTRL0, port, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicEavEnable
-+ * Description:
-+ *      Get per-port EAV function enable/disable
-+ * Input:
-+ *      port         - Physical port number (0~5)
-+ *      pEnabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK         - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicEavEnable(rtk_uint32 port, rtk_uint32 *pEnabled)
-+{
-+    if(port > RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_EAV_CTRL0, port, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicEavPriRemapping
-+ * Description:
-+ *      Set non-EAV streaming priority remapping
-+ * Input:
-+ *      srcpriority - Priority value
-+ *      priority     - Absolute priority value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                     - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY      - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicEavPriRemapping(rtk_uint32 srcpriority, rtk_uint32 priority)
-+{
-+    if(srcpriority > RTL8367C_PRIMAX || priority > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_EAV_PRIORITY_REMAPPING_REG(srcpriority), RTL8367C_EAV_PRIORITY_REMAPPING_MASK(srcpriority),priority);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicEavPriRemapping
-+ * Description:
-+ *      Get non-EAV streaming priority remapping
-+ * Input:
-+ *      srcpriority - Priority value
-+ *      pPriority     - Absolute priority value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                     - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY      - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicEavPriRemapping(rtk_uint32 srcpriority, rtk_uint32 *pPriority)
-+{
-+    if(srcpriority > RTL8367C_PRIMAX )
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_EAV_PRIORITY_REMAPPING_REG(srcpriority), RTL8367C_EAV_PRIORITY_REMAPPING_MASK(srcpriority),pPriority);
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_eee.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_eee.c
-new file mode 100644
-index 0000000000..f4dda6a6ae
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_eee.c
-@@ -0,0 +1,141 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 48989 $
-+ * $Date: 2014-07-01 15:45:24 +0800 (週二, 01 七月 2014) $
-+ *
-+ * Purpose : RTL8370 switch high-level API for RTL8367C
-+ * Feature :
-+ *
-+ */
-+
-+#include <rtl8367c_asicdrv_eee.h>
-+#include <rtl8367c_asicdrv_phy.h>
-+
-+/*
-+@func ret_t | rtl8367c_setAsicEee100M | Set eee force mode function enable/disable.
-+@parm rtk_uint32 | port | The port number.
-+@parm rtk_uint32 | enabled | 1: enabled, 0: disabled.
-+@rvalue RT_ERR_OK | Success.
-+@rvalue RT_ERR_SMI | SMI access error.
-+@rvalue RT_ERR_INPUT | Invalid input parameter.
-+@comm
-+    This API set the 100M EEE enable function.
-+
-+*/
-+ret_t rtl8367c_setAsicEee100M(rtk_uint32 port, rtk_uint32 enable)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      regData;
-+
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if (enable > 1)
-+        return RT_ERR_INPUT;
-+
-+    if((retVal = rtl8367c_getAsicPHYOCPReg(port, EEE_OCP_PHY_ADDR, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(enable)
-+        regData |= (0x0001 << 1);
-+    else
-+        regData &= ~(0x0001 << 1);
-+
-+    if((retVal = rtl8367c_setAsicPHYOCPReg(port, EEE_OCP_PHY_ADDR, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/*
-+@func ret_t | rtl8367c_getAsicEee100M | Get 100M eee enable/disable.
-+@parm rtk_uint32 | port | The port number.
-+@parm rtk_uint32* | enabled | 1: enabled, 0: disabled.
-+@rvalue RT_ERR_OK | Success.
-+@rvalue RT_ERR_SMI | SMI access error.
-+@rvalue RT_ERR_INPUT | Invalid input parameter.
-+@comm
-+    This API get the 100M EEE function.
-+*/
-+ret_t rtl8367c_getAsicEee100M(rtk_uint32 port, rtk_uint32 *enable)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      regData;
-+
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if((retVal = rtl8367c_getAsicPHYOCPReg(port, EEE_OCP_PHY_ADDR, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *enable = (regData & (0x0001 << 1)) ? ENABLED : DISABLED;
-+    return RT_ERR_OK;
-+}
-+
-+/*
-+@func ret_t | rtl8367c_setAsicEeeGiga | Set eee force mode function enable/disable.
-+@parm rtk_uint32 | port | The port number.
-+@parm rtk_uint32 | enabled | 1: enabled, 0: disabled.
-+@rvalue RT_ERR_OK | Success.
-+@rvalue RT_ERR_SMI | SMI access error.
-+@rvalue RT_ERR_INPUT | Invalid input parameter.
-+@comm
-+    This API set the 100M EEE enable function.
-+
-+*/
-+ret_t rtl8367c_setAsicEeeGiga(rtk_uint32 port, rtk_uint32 enable)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      regData;
-+
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if (enable > 1)
-+        return RT_ERR_INPUT;
-+
-+    if((retVal = rtl8367c_getAsicPHYOCPReg(port, EEE_OCP_PHY_ADDR, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(enable)
-+        regData |= (0x0001 << 2);
-+    else
-+        regData &= ~(0x0001 << 2);
-+
-+    if((retVal = rtl8367c_setAsicPHYOCPReg(port, EEE_OCP_PHY_ADDR, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/*
-+@func ret_t | rtl8367c_getAsicEeeGiga | Get 100M eee enable/disable.
-+@parm rtk_uint32 | port | The port number.
-+@parm rtk_uint32* | enabled | 1: enabled, 0: disabled.
-+@rvalue RT_ERR_OK | Success.
-+@rvalue RT_ERR_SMI | SMI access error.
-+@rvalue RT_ERR_INPUT | Invalid input parameter.
-+@comm
-+    This API get the 100M EEE function.
-+*/
-+ret_t rtl8367c_getAsicEeeGiga(rtk_uint32 port, rtk_uint32 *enable)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      regData;
-+
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if((retVal = rtl8367c_getAsicPHYOCPReg(port, EEE_OCP_PHY_ADDR, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *enable = (regData & (0x0001 << 2)) ? ENABLED : DISABLED;
-+    return RT_ERR_OK;
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_fc.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_fc.c
-new file mode 100644
-index 0000000000..28f49b1ba7
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_fc.c
-@@ -0,0 +1,1354 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Flow control related functions
-+ *
-+ */
-+
-+#include <rtl8367c_asicdrv_fc.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlSelect
-+ * Description:
-+ *      Set system flow control type
-+ * Input:
-+ *      select      - System flow control type 1: Ingress flow control 0:Egress flow control
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlSelect(rtk_uint32 select)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_FLOWCTRL_CTRL0, RTL8367C_FLOWCTRL_TYPE_OFFSET, select);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlSelect
-+ * Description:
-+ *      Get system flow control type
-+ * Input:
-+ *      pSelect         - System flow control type 1: Ingress flow control 0:Egress flow control
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlSelect(rtk_uint32 *pSelect)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_FLOWCTRL_CTRL0, RTL8367C_FLOWCTRL_TYPE_OFFSET, pSelect);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlJumboMode
-+ * Description:
-+ *      Set Jumbo threhsold for flow control
-+ * Input:
-+ *      enabled         - Jumbo mode flow control 1: Enable 0:Disable
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlJumboMode(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_FLOWCTRL_JUMBO_SIZE, RTL8367C_JUMBO_MODE_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlJumboMode
-+ * Description:
-+ *      Get Jumbo threhsold for flow control
-+ * Input:
-+ *      pEnabled        - Jumbo mode flow control 1: Enable 0:Disable
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlJumboMode(rtk_uint32* pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_FLOWCTRL_JUMBO_SIZE, RTL8367C_JUMBO_MODE_OFFSET, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlJumboModeSize
-+ * Description:
-+ *      Set Jumbo size for Jumbo mode flow control
-+ * Input:
-+ *      size        - Jumbo size 0:3Kbytes 1:4Kbytes 2:6Kbytes 3:9Kbytes
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlJumboModeSize(rtk_uint32 size)
-+{
-+    if(size >= FC_JUMBO_SIZE_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_SIZE, RTL8367C_JUMBO_SIZE_MASK, size);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlJumboModeSize
-+ * Description:
-+ *      Get Jumbo size for Jumbo mode flow control
-+ * Input:
-+ *      pSize       - Jumbo size 0:3Kbytes 1:4Kbytes 2:6Kbytes 3:9Kbytes
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlJumboModeSize(rtk_uint32* pSize)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_SIZE, RTL8367C_JUMBO_SIZE_MASK, pSize);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlQueueEgressEnable
-+ * Description:
-+ *      Set flow control ability for each queue
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      qid     - Queue id
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ *      RT_ERR_QUEUE_ID - Invalid queue id
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlQueueEgressEnable(rtk_uint32 port, rtk_uint32 qid, rtk_uint32 enabled)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(qid > RTL8367C_QIDMAX)
-+        return RT_ERR_QUEUE_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_FLOWCRTL_EGRESS_QUEUE_ENABLE_REG(port), RTL8367C_FLOWCRTL_EGRESS_QUEUE_ENABLE_REG_OFFSET(port)+ qid, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlQueueEgressEnable
-+ * Description:
-+ *      Get flow control ability for each queue
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      qid     - Queue id
-+ *      pEnabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ *      RT_ERR_QUEUE_ID - Invalid queue id
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlQueueEgressEnable(rtk_uint32 port, rtk_uint32 qid, rtk_uint32* pEnabled)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(qid > RTL8367C_QIDMAX)
-+        return RT_ERR_QUEUE_ID;
-+
-+    return  rtl8367c_getAsicRegBit(RTL8367C_FLOWCRTL_EGRESS_QUEUE_ENABLE_REG(port), RTL8367C_FLOWCRTL_EGRESS_QUEUE_ENABLE_REG_OFFSET(port)+ qid, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlDropAll
-+ * Description:
-+ *      Set system-based drop parameters
-+ * Input:
-+ *      dropall     - Whole system drop threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlDropAll(rtk_uint32 dropall)
-+{
-+    if(dropall >= RTL8367C_PAGE_NUMBER)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_CTRL0, RTL8367C_DROP_ALL_THRESHOLD_MASK, dropall);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlDropAll
-+ * Description:
-+ *      Get system-based drop parameters
-+ * Input:
-+ *      pDropall    - Whole system drop threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlDropAll(rtk_uint32* pDropall)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_CTRL0, RTL8367C_DROP_ALL_THRESHOLD_MASK, pDropall);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlPauseAll
-+ * Description:
-+ *      Set system-based all ports enable flow control parameters
-+ * Input:
-+ *      threshold   - Whole system pause all threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlPauseAllThreshold(rtk_uint32 threshold)
-+{
-+    if(threshold >= RTL8367C_PAGE_NUMBER)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_ALL_ON, RTL8367C_FLOWCTRL_ALL_ON_THRESHOLD_MASK, threshold);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlPauseAllThreshold
-+ * Description:
-+ *      Get system-based all ports enable flow control parameters
-+ * Input:
-+ *      pThreshold  - Whole system pause all threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlPauseAllThreshold(rtk_uint32 *pThreshold)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_ALL_ON, RTL8367C_FLOWCTRL_ALL_ON_THRESHOLD_MASK, pThreshold);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlSystemThreshold
-+ * Description:
-+ *      Set system-based flow control parameters
-+ * Input:
-+ *      onThreshold     - Flow control turn ON threshold
-+ *      offThreshold    - Flow control turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlSystemThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold)
-+{
-+    ret_t retVal;
-+
-+    if((onThreshold >= RTL8367C_PAGE_NUMBER) || (offThreshold >= RTL8367C_PAGE_NUMBER))
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_SYS_OFF, RTL8367C_FLOWCTRL_SYS_OFF_MASK, offThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_SYS_ON, RTL8367C_FLOWCTRL_SYS_ON_MASK, onThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlSystemThreshold
-+ * Description:
-+ *      Get system-based flow control parameters
-+ * Input:
-+ *      pOnThreshold    - Flow control turn ON threshold
-+ *      pOffThreshold   - Flow control turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlSystemThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_SYS_OFF, RTL8367C_FLOWCTRL_SYS_OFF_MASK, pOffThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_SYS_ON, RTL8367C_FLOWCTRL_SYS_ON_MASK, pOnThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlSharedThreshold
-+ * Description:
-+ *      Set share-based flow control parameters
-+ * Input:
-+ *      onThreshold     - Flow control turn ON threshold
-+ *      offThreshold    - Flow control turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlSharedThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold)
-+{
-+    ret_t retVal;
-+
-+    if((onThreshold >= RTL8367C_PAGE_NUMBER) || (offThreshold >= RTL8367C_PAGE_NUMBER))
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_SHARE_OFF, RTL8367C_FLOWCTRL_SHARE_OFF_MASK, offThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_SHARE_ON, RTL8367C_FLOWCTRL_SHARE_ON_MASK, onThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlSharedThreshold
-+ * Description:
-+ *      Get share-based flow control parameters
-+ * Input:
-+ *      pOnThreshold    - Flow control turn ON threshold
-+ *      pOffThreshold   - Flow control turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlSharedThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_SHARE_OFF, RTL8367C_FLOWCTRL_SHARE_OFF_MASK, pOffThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_SHARE_ON, RTL8367C_FLOWCTRL_SHARE_ON_MASK, pOnThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlPortThreshold
-+ * Description:
-+ *      Set Port-based flow control parameters
-+ * Input:
-+ *      onThreshold     - Flow control turn ON threshold
-+ *      offThreshold    - Flow control turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlPortThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold)
-+{
-+    ret_t retVal;
-+
-+    if((onThreshold >= RTL8367C_PAGE_NUMBER) || (offThreshold >= RTL8367C_PAGE_NUMBER))
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_PORT_OFF, RTL8367C_FLOWCTRL_PORT_OFF_MASK, offThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_PORT_ON, RTL8367C_FLOWCTRL_PORT_ON_MASK, onThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlPortThreshold
-+ * Description:
-+ *      Get Port-based flow control parameters
-+ * Input:
-+ *      pOnThreshold    - Flow control turn ON threshold
-+ *      pOffThreshold   - Flow control turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlPortThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_PORT_OFF, RTL8367C_FLOWCTRL_PORT_OFF_MASK, pOffThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_PORT_ON, RTL8367C_FLOWCTRL_PORT_ON_MASK, pOnThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlPortPrivateThreshold
-+ * Description:
-+ *      Set Port-private-based flow control parameters
-+ * Input:
-+ *      onThreshold     - Flow control turn ON threshold
-+ *      offThreshold    - Flow control turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlPortPrivateThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold)
-+{
-+    ret_t retVal;
-+
-+    if((onThreshold >= RTL8367C_PAGE_NUMBER) || (offThreshold >= RTL8367C_PAGE_NUMBER))
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_PORT_PRIVATE_OFF, RTL8367C_FLOWCTRL_PORT_PRIVATE_OFF_MASK, offThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_PORT_PRIVATE_ON, RTL8367C_FLOWCTRL_PORT_PRIVATE_ON_MASK, onThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlPortPrivateThreshold
-+ * Description:
-+ *      Get Port-private-based flow control parameters
-+ * Input:
-+ *      pOnThreshold    - Flow control turn ON threshold
-+ *      pOffThreshold   - Flow control turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlPortPrivateThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_PORT_PRIVATE_OFF, RTL8367C_FLOWCTRL_PORT_PRIVATE_OFF_MASK, pOffThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_PORT_PRIVATE_ON, RTL8367C_FLOWCTRL_PORT_PRIVATE_ON_MASK, pOnThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlSystemDropThreshold
-+ * Description:
-+ *      Set system-based drop parameters
-+ * Input:
-+ *      onThreshold     - Drop turn ON threshold
-+ *      offThreshold    - Drop turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlSystemDropThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold)
-+{
-+    ret_t retVal;
-+
-+    if((onThreshold >= RTL8367C_PAGE_NUMBER) || (offThreshold >= RTL8367C_PAGE_NUMBER))
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_FCOFF_SYS_OFF, RTL8367C_FLOWCTRL_FCOFF_SYS_OFF_MASK, offThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_FCOFF_SYS_ON, RTL8367C_FLOWCTRL_FCOFF_SYS_ON_MASK, onThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlSystemDropThreshold
-+ * Description:
-+ *      Get system-based drop parameters
-+ * Input:
-+ *      pOnThreshold    - Drop turn ON threshold
-+ *      pOffThreshold   - Drop turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlSystemDropThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_FCOFF_SYS_OFF, RTL8367C_FLOWCTRL_FCOFF_SYS_OFF_MASK, pOffThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_FCOFF_SYS_ON, RTL8367C_FLOWCTRL_FCOFF_SYS_ON_MASK, pOnThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlSharedDropThreshold
-+ * Description:
-+ *      Set share-based fdrop parameters
-+ * Input:
-+ *      onThreshold     - Drop turn ON threshold
-+ *      offThreshold    - Drop turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlSharedDropThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold)
-+{
-+    ret_t retVal;
-+
-+    if((onThreshold >= RTL8367C_PAGE_NUMBER) || (offThreshold >= RTL8367C_PAGE_NUMBER))
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_FCOFF_SHARE_OFF, RTL8367C_FLOWCTRL_FCOFF_SHARE_OFF_MASK, offThreshold);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_FCOFF_SHARE_ON, RTL8367C_FLOWCTRL_FCOFF_SHARE_ON_MASK, onThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlSharedDropThreshold
-+ * Description:
-+ *      Get share-based fdrop parameters
-+ * Input:
-+ *      pOnThreshold    - Drop turn ON threshold
-+ *      pOffThreshold   - Drop turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlSharedDropThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_FCOFF_SHARE_OFF, RTL8367C_FLOWCTRL_FCOFF_SHARE_OFF_MASK, pOffThreshold);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_FCOFF_SHARE_ON, RTL8367C_FLOWCTRL_FCOFF_SHARE_ON_MASK, pOnThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlPortDropThreshold
-+ * Description:
-+ *      Set Port-based drop parameters
-+ * Input:
-+ *      onThreshold     - Drop turn ON threshold
-+ *      offThreshold    - Drop turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlPortDropThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold)
-+{
-+    ret_t retVal;
-+
-+    if((onThreshold >= RTL8367C_PAGE_NUMBER) || (offThreshold >= RTL8367C_PAGE_NUMBER))
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_FCOFF_PORT_OFF, RTL8367C_FLOWCTRL_FCOFF_PORT_OFF_MASK, offThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_FCOFF_PORT_ON, RTL8367C_FLOWCTRL_FCOFF_PORT_ON_MASK, onThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlPortDropThreshold
-+ * Description:
-+ *      Get Port-based drop parameters
-+ * Input:
-+ *      pOnThreshold    - Drop turn ON threshold
-+ *      pOffThreshold   - Drop turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlPortDropThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_FCOFF_PORT_OFF, RTL8367C_FLOWCTRL_FCOFF_PORT_OFF_MASK, pOffThreshold);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_FCOFF_PORT_ON, RTL8367C_FLOWCTRL_FCOFF_PORT_ON_MASK, pOnThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlPortPrivateDropThreshold
-+ * Description:
-+ *      Set Port-private-based drop parameters
-+ * Input:
-+ *      onThreshold     - Drop turn ON threshold
-+ *      offThreshold    - Drop turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlPortPrivateDropThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold)
-+{
-+    ret_t retVal;
-+
-+    if((onThreshold >= RTL8367C_PAGE_NUMBER) || (offThreshold >= RTL8367C_PAGE_NUMBER))
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_FCOFF_PORT_PRIVATE_OFF, RTL8367C_FLOWCTRL_FCOFF_PORT_PRIVATE_OFF_MASK, offThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_FCOFF_PORT_PRIVATE_ON, RTL8367C_FLOWCTRL_FCOFF_PORT_PRIVATE_ON_MASK, onThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlPortPrivateDropThreshold
-+ * Description:
-+ *      Get Port-private-based drop parameters
-+ * Input:
-+ *      pOnThreshold    - Drop turn ON threshold
-+ *      pOffThreshold   - Drop turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlPortPrivateDropThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_FCOFF_PORT_PRIVATE_OFF, RTL8367C_FLOWCTRL_FCOFF_PORT_PRIVATE_OFF_MASK, pOffThreshold);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_FCOFF_PORT_PRIVATE_ON, RTL8367C_FLOWCTRL_FCOFF_PORT_PRIVATE_ON_MASK, pOnThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlSystemJumboThreshold
-+ * Description:
-+ *      Set Jumbo system-based flow control parameters
-+ * Input:
-+ *      onThreshold     - Flow control turn ON threshold
-+ *      offThreshold    - Flow control turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlSystemJumboThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold)
-+{
-+    ret_t retVal;
-+
-+    if((onThreshold >= RTL8367C_PAGE_NUMBER) || (offThreshold >= RTL8367C_PAGE_NUMBER))
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_SYS_OFF, RTL8367C_FLOWCTRL_JUMBO_SYS_OFF_MASK, offThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_SYS_ON, RTL8367C_FLOWCTRL_JUMBO_SYS_ON_MASK, onThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlSystemJumboThreshold
-+ * Description:
-+ *      Get Jumbo system-based flow control parameters
-+ * Input:
-+ *      pOnThreshold    - Flow control turn ON threshold
-+ *      pOffThreshold   - Flow control turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlSystemJumboThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_SYS_OFF, RTL8367C_FLOWCTRL_JUMBO_SYS_OFF_MASK, pOffThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_SYS_ON, RTL8367C_FLOWCTRL_JUMBO_SYS_ON_MASK, pOnThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlSharedJumboThreshold
-+ * Description:
-+ *      Set Jumbo share-based flow control parameters
-+ * Input:
-+ *      onThreshold     - Flow control turn ON threshold
-+ *      offThreshold    - Flow control turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlSharedJumboThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold)
-+{
-+    ret_t retVal;
-+
-+    if((onThreshold >= RTL8367C_PAGE_NUMBER) || (offThreshold >= RTL8367C_PAGE_NUMBER))
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_SHARE_OFF, RTL8367C_FLOWCTRL_JUMBO_SHARE_OFF_MASK, offThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_SHARE_ON, RTL8367C_FLOWCTRL_JUMBO_SHARE_ON_MASK, onThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlSharedJumboThreshold
-+ * Description:
-+ *      Get Jumbo share-based flow control parameters
-+ * Input:
-+ *      pOnThreshold    - Flow control turn ON threshold
-+ *      pOffThreshold   - Flow control turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlSharedJumboThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_SHARE_OFF, RTL8367C_FLOWCTRL_JUMBO_SHARE_OFF_MASK, pOffThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_SHARE_ON, RTL8367C_FLOWCTRL_JUMBO_SHARE_ON_MASK, pOnThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlPortJumboThreshold
-+ * Description:
-+ *      Set Jumbo Port-based flow control parameters
-+ * Input:
-+ *      onThreshold     - Flow control turn ON threshold
-+ *      offThreshold    - Flow control turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlPortJumboThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold)
-+{
-+    ret_t retVal;
-+
-+    if((onThreshold >= RTL8367C_PAGE_NUMBER) || (offThreshold >= RTL8367C_PAGE_NUMBER))
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_PORT_OFF, RTL8367C_FLOWCTRL_JUMBO_PORT_OFF_MASK, offThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_PORT_ON, RTL8367C_FLOWCTRL_JUMBO_PORT_ON_MASK, onThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlPortJumboThreshold
-+ * Description:
-+ *      Get Jumbo Port-based flow control parameters
-+ * Input:
-+ *      pOnThreshold    - Flow control turn ON threshold
-+ *      pOffThreshold   - Flow control turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlPortJumboThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_PORT_OFF, RTL8367C_FLOWCTRL_JUMBO_PORT_OFF_MASK, pOffThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_PORT_ON, RTL8367C_FLOWCTRL_JUMBO_PORT_ON_MASK, pOnThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlPortPrivateJumboThreshold
-+ * Description:
-+ *      Set Jumbo Port-private-based flow control parameters
-+ * Input:
-+ *      onThreshold     - Flow control turn ON threshold
-+ *      offThreshold    - Flow control turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlPortPrivateJumboThreshold(rtk_uint32 onThreshold, rtk_uint32 offThreshold)
-+{
-+    ret_t retVal;
-+
-+    if((onThreshold >= RTL8367C_PAGE_NUMBER) || (offThreshold >= RTL8367C_PAGE_NUMBER))
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_PORT_PRIVATE_OFF, RTL8367C_FLOWCTRL_JUMBO_PORT_PRIVATE_OFF_MASK, offThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_PORT_PRIVATE_ON, RTL8367C_FLOWCTRL_JUMBO_PORT_PRIVATE_ON_MASK, onThreshold);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlPortPrivateJumboThreshold
-+ * Description:
-+ *      Get Jumbo Port-private-based flow control parameters
-+ * Input:
-+ *      pOnThreshold    - Flow control turn ON threshold
-+ *      pOffThreshold   - Flow control turn OFF threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlPortPrivateJumboThreshold(rtk_uint32 *pOnThreshold, rtk_uint32 *pOffThreshold)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_PORT_PRIVATE_OFF, RTL8367C_FLOWCTRL_JUMBO_PORT_PRIVATE_OFF_MASK, pOffThreshold);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_JUMBO_PORT_PRIVATE_ON, RTL8367C_FLOWCTRL_JUMBO_PORT_PRIVATE_ON_MASK, pOnThreshold);
-+
-+    return retVal;
-+}
-+
-+
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicEgressFlowControlQueueDropThreshold
-+ * Description:
-+ *      Set Queue-based egress flow control turn on or ingress flow control drop on threshold
-+ * Input:
-+ *      qid         - The queue id
-+ *      threshold   - Queue-based flown control/drop turn ON threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ *      RT_ERR_QUEUE_ID     - Invalid queue id
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicEgressFlowControlQueueDropThreshold(rtk_uint32 qid, rtk_uint32 threshold)
-+{
-+    if( threshold >= RTL8367C_PAGE_NUMBER)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(qid > RTL8367C_QIDMAX)
-+        return RT_ERR_QUEUE_ID;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_FLOWCTRL_QUEUE_DROP_ON_REG(qid), RTL8367C_FLOWCTRL_QUEUE_DROP_ON_MASK, threshold);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicEgressFlowControlQueueDropThreshold
-+ * Description:
-+ *      Get Queue-based egress flow control turn on or ingress flow control drop on threshold
-+ * Input:
-+ *      qid         - The queue id
-+ *      pThreshold  - Queue-based flown control/drop turn ON threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_QUEUE_ID     - Invalid queue id
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicEgressFlowControlQueueDropThreshold(rtk_uint32 qid, rtk_uint32 *pThreshold)
-+{
-+    if(qid > RTL8367C_QIDMAX)
-+      return RT_ERR_QUEUE_ID;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_FLOWCTRL_QUEUE_DROP_ON_REG(qid), RTL8367C_FLOWCTRL_QUEUE_DROP_ON_MASK, pThreshold);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicEgressFlowControlPortDropThreshold
-+ * Description:
-+ *      Set port-based egress flow control turn on or ingress flow control drop on threshold
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      threshold   - Queue-based flown control/drop turn ON threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicEgressFlowControlPortDropThreshold(rtk_uint32 port, rtk_uint32 threshold)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+      return RT_ERR_PORT_ID;
-+
-+    if(threshold >= RTL8367C_PAGE_NUMBER)
-+      return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_FLOWCTRL_PORT_DROP_ON_REG(port), RTL8367C_FLOWCTRL_PORT_DROP_ON_MASK, threshold);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicEgressFlowControlPortDropThreshold
-+ * Description:
-+ *      Set port-based egress flow control turn on or ingress flow control drop on threshold
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      pThreshold  - Queue-based flown control/drop turn ON threshold
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicEgressFlowControlPortDropThreshold(rtk_uint32 port, rtk_uint32 *pThreshold)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_FLOWCTRL_PORT_DROP_ON_REG(port), RTL8367C_FLOWCTRL_PORT_DROP_ON_MASK, pThreshold);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicEgressFlowControlPortDropGap
-+ * Description:
-+ *      Set port-based egress flow control turn off or ingress flow control drop off gap
-+ * Input:
-+ *      gap     - Flow control/drop turn OFF threshold = turn ON threshold - gap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicEgressFlowControlPortDropGap(rtk_uint32 gap)
-+{
-+    if(gap >= RTL8367C_PAGE_NUMBER)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_PORT_GAP, RTL8367C_FLOWCTRL_PORT_GAP_MASK, gap);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicEgressFlowControlPortDropGap
-+ * Description:
-+ *      Get port-based egress flow control turn off or ingress flow control drop off gap
-+ * Input:
-+ *      pGap    - Flow control/drop turn OFF threshold = turn ON threshold - gap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicEgressFlowControlPortDropGap(rtk_uint32 *pGap)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_PORT_GAP, RTL8367C_FLOWCTRL_PORT_GAP_MASK, pGap);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicEgressFlowControlQueueDropGap
-+ * Description:
-+ *      Set Queue-based egress flow control turn off or ingress flow control drop off gap
-+ * Input:
-+ *      gap     - Flow control/drop turn OFF threshold = turn ON threshold - gap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicEgressFlowControlQueueDropGap(rtk_uint32 gap)
-+{
-+    if(gap >= RTL8367C_PAGE_NUMBER)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_FLOWCTRL_QUEUE_GAP, RTL8367C_FLOWCTRL_QUEUE_GAP_MASK, gap);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicEgressFlowControlQueueDropGap
-+ * Description:
-+ *      Get Queue-based egress flow control turn off or ingress flow control drop off gap
-+ * Input:
-+ *      pGap    - Flow control/drop turn OFF threshold = turn ON threshold - gap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicEgressFlowControlQueueDropGap(rtk_uint32 *pGap)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_QUEUE_GAP, RTL8367C_FLOWCTRL_QUEUE_GAP_MASK, pGap);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicEgressQueueEmptyPortMask
-+ * Description:
-+ *      Get queue empty port mask
-+ * Input:
-+ *      pPortmask   -  Queue empty port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicEgressQueueEmptyPortMask(rtk_uint32 *pPortmask)
-+{
-+    return rtl8367c_getAsicReg(RTL8367C_REG_PORT_QEMPTY, pPortmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicTotalPage
-+ * Description:
-+ *      Get system total page usage number
-+ * Input:
-+ *      pPageCount  -  page usage number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicTotalPage(rtk_uint32 *pPageCount)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_TOTAL_PAGE_COUNTER, RTL8367C_FLOWCTRL_TOTAL_PAGE_COUNTER_MASK, pPageCount);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPulbicPage
-+ * Description:
-+ *      Get system public page usage number
-+ * Input:
-+ *      pPageCount  -  page usage number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPulbicPage(rtk_uint32 *pPageCount)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_PUBLIC_PAGE_COUNTER, RTL8367C_FLOWCTRL_PUBLIC_PAGE_COUNTER_MASK, pPageCount);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicMaxTotalPage
-+ * Description:
-+ *      Get system total page max usage number
-+ * Input:
-+ *      pPageCount  -  page usage number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicMaxTotalPage(rtk_uint32 *pPageCount)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_TOTAL_PAGE_MAX, RTL8367C_FLOWCTRL_TOTAL_PAGE_MAX_MASK, pPageCount);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPulbicPage
-+ * Description:
-+ *      Get system public page max usage number
-+ * Input:
-+ *      pPageCount  -  page usage number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicMaxPulbicPage(rtk_uint32 *pPageCount)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_PUBLIC_PAGE_MAX, RTL8367C_FLOWCTRL_PUBLIC_PAGE_MAX_MASK, pPageCount);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortPage
-+ * Description:
-+ *      Get per-port page usage number
-+ * Input:
-+ *      port        -  Physical port number (0~7)
-+ *      pPageCount  -  page usage number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortPage(rtk_uint32 port, rtk_uint32 *pPageCount)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+        return rtl8367c_getAsicRegBits(RTL8367C_FLOWCTRL_PORT_PAGE_COUNTER_REG(port), RTL8367C_FLOWCTRL_PORT_PAGE_COUNTER_MASK, pPageCount);
-+    else
-+        return rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_PORT8_PAGE_COUNTER+port - 8, RTL8367C_FLOWCTRL_PORT_PAGE_COUNTER_MASK, pPageCount);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortPage
-+ * Description:
-+ *      Get per-port page max usage number
-+ * Input:
-+ *      port        -  Physical port number (0~7)
-+ *      pPageCount  -  page usage number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortPageMax(rtk_uint32 port, rtk_uint32 *pPageCount)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+    if(port < 8)
-+        return rtl8367c_getAsicRegBits(RTL8367C_FLOWCTRL_PORT_PAGE_MAX_REG(port), RTL8367C_FLOWCTRL_PORT_PAGE_MAX_MASK, pPageCount);
-+    else
-+        return rtl8367c_getAsicRegBits(RTL8367C_REG_FLOWCTRL_PORT0_PAGE_MAX+port-8, RTL8367C_FLOWCTRL_PORT_PAGE_MAX_MASK, pPageCount);
-+
-+
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicFlowControlEgressPortIndep
-+ * Description:
-+ *      Set per-port egress flow control independent
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      enabled     - Egress port flow control usage 1:enable 0:disable.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicFlowControlEgressPortIndep(rtk_uint32 port, rtk_uint32 enable)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_PORT0_MISC_CFG + (port *0x20), RTL8367C_PORT0_MISC_CFG_FLOWCTRL_INDEP_OFFSET,enable);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicFlowControlEgressPortIndep
-+ * Description:
-+ *      Get per-port egress flow control independent
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      enabled     - Egress port flow control usage 1:enable 0:disable.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFlowControlEgressPortIndep(rtk_uint32 port, rtk_uint32 *pEnable)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_PORT0_MISC_CFG + (port *0x20),RTL8367C_PORT0_MISC_CFG_FLOWCTRL_INDEP_OFFSET,pEnable);
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_green.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_green.c
-new file mode 100644
-index 0000000000..a38623850b
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_green.c
-@@ -0,0 +1,445 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Green ethernet related functions
-+ *
-+ */
-+#include <rtl8367c_asicdrv_green.h>
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicGreenPortPage
-+ * Description:
-+ *      Get per-Port ingress page usage per second
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pPage   - page number of ingress packet occuping per second
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      Ingress traffic occuping page number per second for high layer green feature usage
-+ */
-+ret_t rtl8367c_getAsicGreenPortPage(rtk_uint32 port, rtk_uint32* pPage)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint32 pageMeter;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_PAGEMETER_PORT_REG(port), &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+   pageMeter = regData;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_PAGEMETER_PORT_REG(port) + 1, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pageMeter = pageMeter + (regData << 16);
-+
-+    *pPage = pageMeter;
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicGreenTrafficType
-+ * Description:
-+ *      Set traffic type for each priority
-+ * Input:
-+ *      priority    - internal priority (0~7)
-+ *      traffictype - high/low traffic type, 1:high priority traffic type, 0:low priority traffic type
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicGreenTrafficType(rtk_uint32 priority, rtk_uint32 traffictype)
-+{
-+
-+    if(priority > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_HIGHPRI_CFG, priority, (traffictype?1:0));
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicGreenTrafficType
-+ * Description:
-+ *      Get traffic type for each priority
-+ * Input:
-+ *      priority    - internal priority (0~7)
-+ *      pTraffictype - high/low traffic type, 1:high priority traffic type, 0:low priority traffic type
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicGreenTrafficType(rtk_uint32 priority, rtk_uint32* pTraffictype)
-+{
-+    if(priority > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_HIGHPRI_CFG, priority, pTraffictype);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicGreenHighPriorityTraffic
-+ * Description:
-+ *      Set indicator which ASIC had received high priority traffic
-+ * Input:
-+ *      port            - Physical port number (0~7)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicGreenHighPriorityTraffic(rtk_uint32 port)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_HIGHPRI_INDICATOR, port, 1);
-+}
-+
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicGreenHighPriorityTraffic
-+ * Description:
-+ *      Get indicator which ASIC had received high priority traffic or not
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      pIndicator  - Have received high priority traffic indicator. If 1 means ASCI had received high priority in 1second checking priod
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicGreenHighPriorityTraffic(rtk_uint32 port, rtk_uint32* pIndicator)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_HIGHPRI_INDICATOR, port, pIndicator);
-+}
-+
-+/*
-+@func rtk_int32 | rtl8367c_setAsicGreenEthernet | Set green ethernet function.
-+@parm rtk_uint32 | green | Green feature function usage 1:enable 0:disable.
-+@rvalue RT_ERR_OK | Success.
-+@rvalue RT_ERR_SMI | SMI access error.
-+@comm
-+    The API can set Green Ethernet function to reduce power consumption. While green feature is enabled, ASIC will automatic
-+ detect the cable length and then select different power mode for best performance with minimums power consumption. Link down
-+ ports will enter power savining mode in 10 seconds after the cable disconnected if power saving function is enabled.
-+*/
-+ret_t rtl8367c_setAsicGreenEthernet(rtk_uint32 port, rtk_uint32 green)
-+{
-+    ret_t retVal;
-+    rtk_uint32 checkCounter;
-+    rtk_uint32 regData;
-+    rtk_uint32 phy_status;
-+    rtk_uint32 patchData[6][2] = { {0x809A, 0x8911}, {0x80A3, 0x9233}, {0x80AC, 0xA444}, {0x809F, 0x6B20}, {0x80A8, 0x6B22}, {0x80B1, 0x6B23} };
-+    rtk_uint32 idx;
-+    rtk_uint32 data;
-+
-+    if (green > 1)
-+        return RT_ERR_INPUT;
-+
-+    /* 0xa420[2:0] */
-+    if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xA420, &regData)) != RT_ERR_OK)
-+        return retVal;
-+    phy_status = (regData & 0x0007);
-+
-+    if(phy_status == 3)
-+    {
-+        /* 0xb820[4] = 1 */
-+        if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xB820, &regData)) != RT_ERR_OK)
-+            return retVal;
-+
-+        regData |= (0x0001 << 4);
-+
-+        if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xB820, regData)) != RT_ERR_OK)
-+            return retVal;
-+
-+        /* wait 0xb800[6] = 1 */
-+        checkCounter = 100;
-+        while(checkCounter)
-+        {
-+            retVal = rtl8367c_getAsicPHYOCPReg(port, 0xB800, &regData);
-+            if( (retVal != RT_ERR_OK) || ((regData & 0x0040) != 0x0040) )
-+            {
-+                checkCounter --;
-+                if(0 == checkCounter)
-+                    return RT_ERR_BUSYWAIT_TIMEOUT;
-+            }
-+            else
-+                checkCounter = 0;
-+        }
-+    }
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicReg(0x1300, &data)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0000)) != RT_ERR_OK)
-+        return retVal;
-+
-+    switch (data)
-+    {
-+        case 0x0276:
-+        case 0x0597:
-+        case 0x6367:
-+            if(green)
-+            {
-+                for(idx = 0; idx < 6; idx++ )
-+                {
-+                    if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xA436, patchData[idx][0])) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xA438, patchData[idx][1])) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+            }
-+            break;
-+        default:
-+            break;;
-+    }
-+
-+
-+
-+    /* 0xa436 = 0x8011 */
-+    if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xA436, 0x8011)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* wr 0xa438[15] = 0: disable, 1: enable */
-+    if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xA438, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(green)
-+        regData |= 0x8000;
-+    else
-+        regData &= 0x7FFF;
-+
-+    if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xA438, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(phy_status == 3)
-+    {
-+        /* 0xb820[4] = 0  */
-+        if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xB820, &regData)) != RT_ERR_OK)
-+            return retVal;
-+
-+        regData &= ~(0x0001 << 4);
-+
-+        if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xB820, regData)) != RT_ERR_OK)
-+            return retVal;
-+
-+        /* wait 0xb800[6] = 0 */
-+        checkCounter = 100;
-+        while(checkCounter)
-+        {
-+            retVal = rtl8367c_getAsicPHYOCPReg(port, 0xB800, &regData);
-+            if( (retVal != RT_ERR_OK) || ((regData & 0x0040) != 0x0000) )
-+            {
-+                checkCounter --;
-+                if(0 == checkCounter)
-+                    return RT_ERR_BUSYWAIT_TIMEOUT;
-+            }
-+            else
-+                checkCounter = 0;
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/*
-+@func rtk_int32 | rtl8367c_getAsicGreenEthernet | Get green ethernet function.
-+@parm rtk_uint32 | *green | Green feature function usage 1:enable 0:disable.
-+@rvalue RT_ERR_OK | Success.
-+@rvalue RT_ERR_SMI | SMI access error.
-+@comm
-+    The API can set Green Ethernet function to reduce power consumption. While green feature is enabled, ASIC will automatic
-+ detect the cable length and then select different power mode for best performance with minimums power consumption. Link down
-+ ports will enter power savining mode in 10 seconds after the cable disconnected if power saving function is enabled.
-+*/
-+ret_t rtl8367c_getAsicGreenEthernet(rtk_uint32 port, rtk_uint32* green)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    /* 0xa436 = 0x8011 */
-+    if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xA436, 0x8011)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* wr 0xa438[15] = 0: disable, 1: enable */
-+    if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xA438, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(regData & 0x8000)
-+        *green = ENABLED;
-+    else
-+        *green = DISABLED;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/*
-+@func ret_t | rtl8367c_setAsicPowerSaving | Set power saving mode
-+@parm rtk_uint32 | phy | phy number
-+@parm rtk_uint32 | enable | enable power saving mode.
-+@rvalue RT_ERR_OK | Success.
-+@rvalue RT_ERR_SMI | SMI access error.
-+@rvalue RT_ERR_PORT_ID | Invalid port number.
-+@comm
-+    The API can set power saving mode per phy.
-+*/
-+ret_t rtl8367c_setAsicPowerSaving(rtk_uint32 phy, rtk_uint32 enable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 phyData;
-+    rtk_uint32 regData;
-+    rtk_uint32 phy_status;
-+    rtk_uint32 checkCounter;
-+
-+    if (enable > 1)
-+        return RT_ERR_INPUT;
-+
-+    /* 0xa420[2:0] */
-+    if((retVal = rtl8367c_getAsicPHYOCPReg(phy, 0xA420, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    phy_status = (regData & 0x0007);
-+
-+    if(phy_status == 3)
-+    {
-+        /* 0xb820[4] = 1 */
-+        if((retVal = rtl8367c_getAsicPHYOCPReg(phy, 0xB820, &regData)) != RT_ERR_OK)
-+            return retVal;
-+
-+        regData |= (0x0001 << 4);
-+
-+        if((retVal = rtl8367c_setAsicPHYOCPReg(phy, 0xB820, regData)) != RT_ERR_OK)
-+            return retVal;
-+
-+        /* wait 0xb800[6] = 1 */
-+        checkCounter = 100;
-+        while(checkCounter)
-+        {
-+            retVal = rtl8367c_getAsicPHYOCPReg(phy, 0xB800, &regData);
-+            if( (retVal != RT_ERR_OK) || ((regData & 0x0040) != 0x0040) )
-+            {
-+                checkCounter --;
-+                if(0 == checkCounter)
-+                {
-+                     return RT_ERR_BUSYWAIT_TIMEOUT;
-+                }
-+            }
-+            else
-+                checkCounter = 0;
-+        }
-+    }
-+
-+    if ((retVal = rtl8367c_getAsicPHYReg(phy,PHY_POWERSAVING_REG,&phyData))!=RT_ERR_OK)
-+        return retVal;
-+
-+    phyData = phyData & ~(0x0001 << 2);
-+    phyData = phyData | (enable << 2);
-+
-+    if ((retVal = rtl8367c_setAsicPHYReg(phy,PHY_POWERSAVING_REG,phyData))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if(phy_status == 3)
-+    {
-+        /* 0xb820[4] = 0  */
-+        if((retVal = rtl8367c_getAsicPHYOCPReg(phy, 0xB820, &regData)) != RT_ERR_OK)
-+            return retVal;
-+
-+        regData &= ~(0x0001 << 4);
-+
-+        if((retVal = rtl8367c_setAsicPHYOCPReg(phy, 0xB820, regData)) != RT_ERR_OK)
-+            return retVal;
-+
-+        /* wait 0xb800[6] = 0 */
-+        checkCounter = 100;
-+        while(checkCounter)
-+        {
-+            retVal = rtl8367c_getAsicPHYOCPReg(phy, 0xB800, &regData);
-+            if( (retVal != RT_ERR_OK) || ((regData & 0x0040) != 0x0000) )
-+            {
-+                checkCounter --;
-+                if(0 == checkCounter)
-+                {
-+                    return RT_ERR_BUSYWAIT_TIMEOUT;
-+                }
-+            }
-+            else
-+                checkCounter = 0;
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/*
-+@func ret_t | rtl8367c_getAsicPowerSaving | Get power saving mode
-+@parm rtk_uint32 | port | The port number
-+@parm rtk_uint32* | enable | enable power saving mode.
-+@rvalue RT_ERR_OK | Success.
-+@rvalue RT_ERR_SMI | SMI access error.
-+@rvalue RT_ERR_PORT_ID | Invalid port number.
-+@comm
-+    The API can get power saving mode per phy.
-+*/
-+ret_t rtl8367c_getAsicPowerSaving(rtk_uint32 phy, rtk_uint32* enable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 phyData;
-+
-+    if(NULL == enable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPHYReg(phy,PHY_POWERSAVING_REG,&phyData))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((phyData & 0x0004) > 0)
-+        *enable = 1;
-+    else
-+        *enable = 0;
-+
-+    return RT_ERR_OK;
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_hsb.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_hsb.c
-new file mode 100644
-index 0000000000..435368d51b
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_hsb.c
-@@ -0,0 +1,81 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Field selector related functions
-+ *
-+ */
-+#include <rtl8367c_asicdrv_hsb.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicFieldSelector
-+ * Description:
-+ *      Set user defined field selectors in HSB
-+ * Input:
-+ *      index       - index of field selector 0-15
-+ *      format      - Format of field selector
-+ *      offset      - Retrieving data offset
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      System support 16 user defined field selctors.
-+ *      Each selector can be enabled or disable. User can defined retrieving 16-bits in many predefiend
-+ *      standard l2/l3/l4 payload.
-+ */
-+ret_t rtl8367c_setAsicFieldSelector(rtk_uint32 index, rtk_uint32 format, rtk_uint32 offset)
-+{
-+    rtk_uint32 regData;
-+
-+    if(index > RTL8367C_FIELDSEL_FORMAT_NUMBER)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(format >= FIELDSEL_FORMAT_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    regData = (((format << RTL8367C_FIELD_SELECTOR_FORMAT_OFFSET) & RTL8367C_FIELD_SELECTOR_FORMAT_MASK ) |
-+               ((offset << RTL8367C_FIELD_SELECTOR_OFFSET_OFFSET) & RTL8367C_FIELD_SELECTOR_OFFSET_MASK ));
-+
-+    return rtl8367c_setAsicReg(RTL8367C_FIELD_SELECTOR_REG(index), regData);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicFieldSelector
-+ * Description:
-+ *      Get user defined field selectors in HSB
-+ * Input:
-+ *      index       - index of field selector 0-15
-+ *      pFormat     - Format of field selector
-+ *      pOffset     - Retrieving data offset
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicFieldSelector(rtk_uint32 index, rtk_uint32* pFormat, rtk_uint32* pOffset)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_FIELD_SELECTOR_REG(index), &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *pFormat    = ((regData & RTL8367C_FIELD_SELECTOR_FORMAT_MASK) >> RTL8367C_FIELD_SELECTOR_FORMAT_OFFSET);
-+    *pOffset    = ((regData & RTL8367C_FIELD_SELECTOR_OFFSET_MASK) >> RTL8367C_FIELD_SELECTOR_OFFSET_OFFSET);
-+
-+    return RT_ERR_OK;
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_i2c.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_i2c.c
-new file mode 100644
-index 0000000000..69f20a0188
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_i2c.c
-@@ -0,0 +1,474 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 38651 $
-+ * $Date: 2016-02-27 14:32:56 +0800 (周三, 17 四月 2016) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : I2C related functions
-+ *
-+ */
-+
-+
-+#include <rtl8367c_asicdrv_i2c.h>
-+#include <rtk_error.h>
-+#include <rtk_types.h>
-+
-+
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicI2C_checkBusIdle
-+ * Description:
-+ *      Check i2c bus status idle or not
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                - Success
-+ *      RT_ERR_BUSYWAIT_TIMEOUT  - i2c bus is busy
-+ * Note:
-+ *      This API can check i2c bus status.
-+ */
-+ret_t rtl8367c_setAsicI2C_checkBusIdle(void)
-+{
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+
-+    if ((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_M_I2C_CTL_STA_REG, RTL8367C_M_I2C_BUS_IDLE_OFFSET, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(regData == 0x0001)
-+        return RT_ERR_OK; /*i2c is idle*/
-+    else
-+        return RT_ERR_BUSYWAIT_TIMEOUT; /*i2c is busy*/
-+}
-+
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicI2CStartCmd
-+ * Description:
-+ *      Set I2C start command
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                - Success
-+ * Note:
-+ *      This API can set i2c start command ,start a i2c traffic  .
-+ */
-+ret_t rtl8367c_setAsicI2CStartCmd(void)
-+{
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+
-+    /* Bits [4-1] = 0b0000, Start Command; Bit [0] = 1, Trigger the Command */
-+    if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_M_I2C_CTL_STA_REG, &regData)) != RT_ERR_OK)
-+        return retVal;
-+    regData &= 0xFFE0;
-+    regData |= 0x0001;
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_M_I2C_CTL_STA_REG, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* wait for command finished */
-+    do{
-+       if ((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_M_I2C_CTL_STA_REG, RTL8367C_I2C_CMD_EXEC_OFFSET, &regData)) != RT_ERR_OK)
-+            return retVal;
-+    }while( regData != 0x0);
-+
-+    return RT_ERR_OK ;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicI2CStopCmd
-+ * Description:
-+ *      Set I2C stop command
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                - Success
-+ * Note:
-+ *      This API can set i2c stop command ,stop a i2c traffic.
-+ */
-+ret_t rtl8367c_setAsicI2CStopCmd(void)
-+{
-+
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+
-+    /* Bits [4-1] = 0b0001, Stop Command; Bit [0] = 1, Trigger the Command */
-+    if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_M_I2C_CTL_STA_REG, &regData)) != RT_ERR_OK)
-+        return retVal;
-+    regData &= 0xFFE0;
-+    regData |= 0x0003;
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_M_I2C_CTL_STA_REG, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    /* wait for command finished */
-+    do{
-+       if ((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_M_I2C_CTL_STA_REG, RTL8367C_I2C_CMD_EXEC_OFFSET, &regData)) != RT_ERR_OK)
-+            return retVal;
-+    }while( regData != 0x0);
-+
-+    return RT_ERR_OK ;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicI2CTxOneCharCmd
-+ * Description:
-+ *      Set I2C Tx a char command, with a 8-bit data
-+ * Input:
-+ *      oneChar - 8-bit data
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                - Success
-+ * Note:
-+ *      This API can set i2c Tx command and with a 8-bit data.
-+ */
-+ret_t rtl8367c_setAsicI2CTxOneCharCmd(rtk_uint8 oneChar)
-+{
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+
-+    /* Bits [4-1] = 0b0010, tx one char; Bit [0] = 1, Trigger the Command */
-+    if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_M_I2C_CTL_STA_REG, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    regData &= 0xFFE0;
-+    regData |= 0x0005;
-+    regData &= 0x00FF;
-+    regData |= (rtk_uint16) (oneChar << 8);
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_M_I2C_CTL_STA_REG, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+
-+   /* wait for command finished */
-+    do{
-+       if ((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_M_I2C_CTL_STA_REG, RTL8367C_I2C_CMD_EXEC_OFFSET, &regData)) != RT_ERR_OK)
-+            return retVal;
-+    }while( regData != 0x0);
-+
-+    return RT_ERR_OK ;
-+}
-+
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicI2CcheckRxAck
-+ * Description:
-+ *      Check if rx an Ack
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                - Success
-+ * Note:
-+ *      This API can check if rx an ack from i2c slave.
-+ */
-+ret_t rtl8367c_setAsicI2CcheckRxAck(void)
-+{
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+    rtk_uint32 count = 0;
-+
-+    do{
-+         count++;
-+         if ((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_M_I2C_CTL_STA_REG, RTL8367C_SLV_ACK_FLAG_OFFSET, &regData)) != RT_ERR_OK)
-+            return retVal;
-+    }while( (regData != 0x1) && (count < TIMEROUT_FOR_MICROSEMI) );
-+
-+    if(regData != 0x1)
-+        return RT_ERR_FAILED;
-+    else
-+        return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicI2CRxOneCharCmd
-+ * Description:
-+ *      Set I2C Rx command and get 8-bit data
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pValue - 8bit-data
-+ * Return:
-+ *      RT_ERR_OK                - Success
-+ * Note:
-+ *      This API can set I2C Rx command and get 8-bit data.
-+ */
-+ret_t rtl8367c_setAsicI2CRxOneCharCmd(rtk_uint8 *pValue)
-+{
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+
-+    /* Bits [4-1] = 0b0011, Rx one char; Bit [0] = 1, Trigger the Command */
-+    if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_M_I2C_CTL_STA_REG, &regData)) != RT_ERR_OK)
-+        return retVal;
-+    regData &= 0xFFE0;
-+    regData |= 0x0007;
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_M_I2C_CTL_STA_REG, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* wait for command finished */
-+     do{
-+        if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_M_I2C_CTL_STA_REG, &regData)) != RT_ERR_OK)
-+             return retVal;
-+     }while( (regData & 0x1) != 0x0);
-+
-+    *pValue = (rtk_uint8)(regData >> 8);
-+     return RT_ERR_OK ;
-+
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicI2CTxAckCmd
-+ * Description:
-+ *      Set I2C Tx ACK command
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                - Success
-+ * Note:
-+ *      This API can set I2C Tx ack command.
-+ */
-+ret_t rtl8367c_setAsicI2CTxAckCmd(void)
-+{
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+
-+    /* Bits [4-1] = 0b0100, tx ACK Command; Bit [0] = 1, Trigger the Command */
-+    if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_M_I2C_CTL_STA_REG, &regData)) != RT_ERR_OK)
-+        return retVal;
-+    regData &= 0xFFE0;
-+    regData |= 0x0009;
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_M_I2C_CTL_STA_REG, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+     /* wait for command finished */
-+    do{
-+       if ((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_M_I2C_CTL_STA_REG, RTL8367C_I2C_CMD_EXEC_OFFSET, &regData)) != RT_ERR_OK)
-+            return retVal;
-+    }while( regData != 0x0);
-+
-+    return RT_ERR_OK ;
-+
-+}
-+
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicI2CTxNoAckCmd
-+ * Description:
-+ *      Set I2C master Tx noACK command
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                - Success
-+ * Note:
-+ *      This API can set I2C master Tx noACK command.
-+ */
-+ret_t rtl8367c_setAsicI2CTxNoAckCmd(void)
-+{
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+
-+    /* Bits [4-1] = 0b0101, tx noACK Command; Bit [0] = 1, Trigger the Command */
-+    if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_M_I2C_CTL_STA_REG, &regData)) != RT_ERR_OK)
-+        return retVal;
-+    regData &= 0xFFE0;
-+    regData |= 0x000b;
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_M_I2C_CTL_STA_REG, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+     /* wait for command finished */
-+    do{
-+       if ((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_M_I2C_CTL_STA_REG, RTL8367C_I2C_CMD_EXEC_OFFSET, &regData)) != RT_ERR_OK)
-+            return retVal;
-+    }while( regData != 0x0);
-+
-+    return RT_ERR_OK ;
-+
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicI2CSoftRSTseqCmd
-+ * Description:
-+ *      set I2C master tx soft reset command
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                - Success
-+ * Note:
-+ *      This API can set I2C master tx soft reset command.
-+ */
-+ret_t rtl8367c_setAsicI2CSoftRSTseqCmd(void)
-+{
-+
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+
-+    /*Bits [4-1] = 0b0110, tx soft reset Command;  Bit [0] = 1, Trigger the Command */
-+    if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_M_I2C_CTL_STA_REG, &regData)) != RT_ERR_OK)
-+        return retVal;
-+    regData &= 0xFFE0;
-+    regData |= 0x000d;
-+
-+    if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_M_I2C_CTL_STA_REG, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    /* wait for command finished */
-+    do{
-+       if ((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_M_I2C_CTL_STA_REG, RTL8367C_I2C_CMD_EXEC_OFFSET, &regData)) != RT_ERR_OK)
-+            return retVal;
-+    }while( regData != 0x0);
-+
-+    return RT_ERR_OK ;
-+}
-+
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicI2CGpioPinGroup
-+ * Description:
-+ *      set I2C function used gpio pins
-+ * Input:
-+ *      pinGroup_ID - gpio pins group
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                - Success
-+ *      RT_ERR_INPUT             _ Invalid input parameter
-+ * Note:
-+ *      This API can set I2C function used gpio pins.
-+ *      There are three group gpio pins
-+ */
-+ret_t rtl8367c_setAsicI2CGpioPinGroup(rtk_uint32 pinGroup_ID)
-+{
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+
-+    if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_M_I2C_SYS_CTL, &regData)) != RT_ERR_OK)
-+         return retVal;
-+    if( pinGroup_ID==0 )
-+    {
-+        regData &= 0x0FFF;
-+        regData |= 0x5000;
-+
-+        if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_M_I2C_SYS_CTL, regData)) != RT_ERR_OK)
-+             return retVal;
-+    }
-+
-+    else if( pinGroup_ID==1 )
-+    {
-+        regData &= 0x0FFF;
-+        regData |= 0xA000;
-+
-+        if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_M_I2C_SYS_CTL, regData)) != RT_ERR_OK)
-+             return retVal;
-+    }
-+
-+    else if( pinGroup_ID==2 )
-+    {
-+        regData &= 0x0FFF;
-+        regData |= 0xF000;
-+
-+        if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_M_I2C_SYS_CTL, regData)) != RT_ERR_OK)
-+             return retVal;
-+    }
-+    else
-+        return RT_ERR_INPUT;
-+
-+    return RT_ERR_OK ;
-+
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicI2CGpioPinGroup
-+ * Description:
-+ *      set I2C function used gpio pins
-+ * Input:
-+ *      pinGroup_ID - gpio pins group
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                - Success
-+ *      RT_ERR_INPUT             _ Invalid input parameter
-+ * Note:
-+ *      This API can set I2C function used gpio pins.
-+ *      There are three group gpio pins
-+ */
-+ret_t rtl8367c_getAsicI2CGpioPinGroup(rtk_uint32 * pPinGroup_ID)
-+{
-+
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+    if( (retVal = rtl8367c_getAsicReg(RTL8367C_REG_M_I2C_SYS_CTL, &regData)) != RT_ERR_OK)
-+        return retVal;
-+    regData &= 0xF000 ;
-+    regData = (regData >> 12);
-+
-+    if( regData == 0x5 )
-+        *pPinGroup_ID = 0;
-+    else if(regData == 0xA)
-+        *pPinGroup_ID = 1;
-+    else if(regData == 0xF)
-+        *pPinGroup_ID = 2;
-+    else
-+       return RT_ERR_FAILED;
-+    return RT_ERR_OK ;
-+}
-+
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-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_igmp.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_igmp.c
-new file mode 100644
-index 0000000000..e0e734d61e
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_igmp.c
-@@ -0,0 +1,2109 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : IGMP related functions
-+ *
-+ */
-+#include <rtl8367c_asicdrv_igmp.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicIgmp
-+ * Description:
-+ *      Set IGMP/MLD state
-+ * Input:
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIgmp(rtk_uint32 enabled)
-+{
-+    ret_t retVal;
-+
-+    /* Enable/Disable H/W IGMP/MLD */
-+    retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_IGMP_MLD_EN_OFFSET, enabled);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicIgmp
-+ * Description:
-+ *      Get IGMP/MLD state
-+ * Input:
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIgmp(rtk_uint32 *ptr_enabled)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_IGMP_MLD_EN_OFFSET, ptr_enabled);
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicIpMulticastVlanLeaky
-+ * Description:
-+ *      Set IP multicast VLAN Leaky function
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      When enabling this function,
-+ *      if the lookup result(forwarding portmap) of IP Multicast packet is over VLAN boundary,
-+ *      the packet can be forwarded across VLAN
-+ */
-+ret_t rtl8367c_setAsicIpMulticastVlanLeaky(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    ret_t  retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_IPMCAST_VLAN_LEAKY, port, enabled);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicIpMulticastVlanLeaky
-+ * Description:
-+ *      Get IP multicast VLAN Leaky function
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIpMulticastVlanLeaky(rtk_uint32 port, rtk_uint32 *ptr_enabled)
-+{
-+    ret_t  retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_IPMCAST_VLAN_LEAKY, port, ptr_enabled);
-+
-+    return retVal;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPTableFullOP
-+ * Description:
-+ *      Set Table Full operation
-+ * Input:
-+ *      operation   - The operation should be taken when the IGMP table is full.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter is out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPTableFullOP(rtk_uint32 operation)
-+{
-+    ret_t  retVal;
-+
-+    if(operation >= TABLE_FULL_OP_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    /* Table full Operation */
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_MLD_CFG1, RTL8367C_TABLE_FULL_OP_MASK, operation);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPTableFullOP
-+ * Description:
-+ *      Get Table Full operation
-+ * Input:
-+ *      None
-+ * Output:
-+ *      poperation  - The operation should be taken when the IGMP table is full.
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPTableFullOP(rtk_uint32 *poperation)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    /* Table full Operation */
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_MLD_CFG1, RTL8367C_TABLE_FULL_OP_MASK, &value);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *poperation = value;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPCRCErrOP
-+ * Description:
-+ *      Set the operation when ASIC receive a Checksum error packet
-+ * Input:
-+ *      operation   -The operation when ASIC receive a Checksum error packet
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter is out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPCRCErrOP(rtk_uint32 operation)
-+{
-+    ret_t  retVal;
-+
-+    if(operation >= CRC_ERR_OP_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    /* CRC Error Operation */
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_CKS_ERR_OP_MASK, operation);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPCRCErrOP
-+ * Description:
-+ *      Get the operation when ASIC receive a Checksum error packet
-+ * Input:
-+ *      None
-+ * Output:
-+ *      poperation  - The operation of Checksum error packet
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPCRCErrOP(rtk_uint32 *poperation)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    /* CRC Error Operation */
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_CKS_ERR_OP_MASK, &value);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *poperation = value;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPFastLeaveEn
-+ * Description:
-+ *      Enable/Disable Fast Leave
-+ * Input:
-+ *      enabled - 1:enable Fast Leave; 0:disable Fast Leave
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPFastLeaveEn(rtk_uint32 enabled)
-+{
-+    ret_t  retVal;
-+
-+    /* Fast Leave */
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_FAST_LEAVE_EN_MASK, (enabled >= 1) ? 1 : 0);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPFastLeaveEn
-+ * Description:
-+ *      Get Fast Leave state
-+ * Input:
-+ *      None
-+ * Output:
-+ *      penabled        - 1:enable Fast Leave; 0:disable Fast Leave
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPFastLeaveEn(rtk_uint32 *penabled)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    /* Fast Leave */
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_FAST_LEAVE_EN_MASK, &value);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *penabled = value;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPLeaveTimer
-+ * Description:
-+ *      Set the Leave timer of IGMP/MLD
-+ * Input:
-+ *      leave_timer     - Leave timer
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter is out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPLeaveTimer(rtk_uint32 leave_timer)
-+{
-+    ret_t  retVal;
-+
-+    if(leave_timer > RTL8367C_MAX_LEAVE_TIMER)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    /* Leave timer */
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_LEAVE_TIMER_MASK, leave_timer);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPLeaveTimer
-+ * Description:
-+ *      Get the Leave timer of IGMP/MLD
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pleave_timer    - Leave timer
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPLeaveTimer(rtk_uint32 *pleave_timer)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    /* Leave timer */
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_LEAVE_TIMER_MASK, &value);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *pleave_timer = value;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPQueryInterval
-+ * Description:
-+ *      Set Query Interval of IGMP/MLD
-+ * Input:
-+ *      interval    - Query Interval
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter is out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPQueryInterval(rtk_uint32 interval)
-+{
-+    ret_t  retVal;
-+
-+    if(interval > RTL8367C_MAX_QUERY_INT)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    /* Query Interval */
-+    retVal = rtl8367c_setAsicReg(RTL8367C_REG_IGMP_MLD_CFG2, interval);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPQueryInterval
-+ * Description:
-+ *      Get Query Interval of IGMP/MLD
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pinterval       - Query Interval
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPQueryInterval(rtk_uint32 *pinterval)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    /* Query Interval */
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_IGMP_MLD_CFG2, &value);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *pinterval = value;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPRobVar
-+ * Description:
-+ *      Set Robustness Variable of IGMP/MLD
-+ * Input:
-+ *      rob_var     - Robustness Variable
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter is out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPRobVar(rtk_uint32 rob_var)
-+{
-+    ret_t  retVal;
-+
-+    if(rob_var > RTL8367C_MAX_ROB_VAR)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    /* Bourstness variable */
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_ROBURSTNESS_VAR_MASK, rob_var);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPRobVar
-+ * Description:
-+ *      Get Robustness Variable of IGMP/MLD
-+ * Input:
-+ *      none
-+ * Output:
-+ *      prob_var     - Robustness Variable
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPRobVar(rtk_uint32 *prob_var)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    /* Bourstness variable */
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_ROBURSTNESS_VAR_MASK, &value);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *prob_var = value;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPStaticRouterPort
-+ * Description:
-+ *      Set IGMP static router port mask
-+ * Input:
-+ *      pmsk    - Static portmask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid port mask
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPStaticRouterPort(rtk_uint32 pmsk)
-+{
-+    if(pmsk > RTL8367C_PORTMASK)
-+        return RT_ERR_PORT_MASK;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_STATIC_ROUTER_PORT, RTL8367C_IGMP_STATIC_ROUTER_PORT_MASK, pmsk);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPStaticRouterPort
-+ * Description:
-+ *      Get IGMP static router port mask
-+ * Input:
-+ *      pmsk    - Static portmask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPStaticRouterPort(rtk_uint32 *pmsk)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_STATIC_ROUTER_PORT, RTL8367C_IGMP_STATIC_ROUTER_PORT_MASK, pmsk);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPAllowDynamicRouterPort
-+ * Description:
-+ *      Set IGMP dynamic router port allow mask
-+ * Input:
-+ *      pmsk    - Allow dynamic router port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid port mask
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPAllowDynamicRouterPort(rtk_uint32 pmsk)
-+{
-+    return rtl8367c_setAsicReg(RTL8367C_REG_IGMP_MLD_CFG4, pmsk);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPAllowDynamicRouterPort
-+ * Description:
-+ *      Get IGMP dynamic router port allow mask
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pPmsk   - Allow dynamic router port mask
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid port mask
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPAllowDynamicRouterPort(rtk_uint32 *pPmsk)
-+{
-+    return rtl8367c_getAsicReg(RTL8367C_REG_IGMP_MLD_CFG4, pPmsk);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPdynamicRouterPort1
-+ * Description:
-+ *      Get 1st dynamic router port and timer
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      timer   - router port timer
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPdynamicRouterPort1(rtk_uint32 *port, rtk_uint32 *timer)
-+{
-+    ret_t   retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_DYNAMIC_ROUTER_PORT, RTL8367C_D_ROUTER_PORT_1_MASK, port);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_DYNAMIC_ROUTER_PORT, RTL8367C_D_ROUTER_PORT_TMR_1_MASK, timer);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPdynamicRouterPort2
-+ * Description:
-+ *      Get 2nd dynamic router port and timer
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      timer   - router port timer
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPdynamicRouterPort2(rtk_uint32 *port, rtk_uint32 *timer)
-+{
-+    ret_t   retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_DYNAMIC_ROUTER_PORT, RTL8367C_D_ROUTER_PORT_2_MASK, port);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_DYNAMIC_ROUTER_PORT, RTL8367C_D_ROUTER_PORT_TMR_2_MASK, timer);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPSuppression
-+ * Description:
-+ *      Set the suppression function
-+ * Input:
-+ *      report_supp_enabled     - Report suppression, 1:Enable, 0:disable
-+ *      leave_supp_enabled      - Leave suppression, 1:Enable, 0:disable
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPSuppression(rtk_uint32 report_supp_enabled, rtk_uint32 leave_supp_enabled)
-+{
-+    ret_t   retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_REPORT_SUPPRESSION_MASK, report_supp_enabled);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_LEAVE_SUPPRESSION_MASK, leave_supp_enabled);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPSuppression
-+ * Description:
-+ *      Get the suppression function
-+ * Input:
-+ *      report_supp_enabled     - Report suppression, 1:Enable, 0:disable
-+ *      leave_supp_enabled      - Leave suppression, 1:Enable, 0:disable
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPSuppression(rtk_uint32 *report_supp_enabled, rtk_uint32 *leave_supp_enabled)
-+{
-+    ret_t   retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_REPORT_SUPPRESSION_MASK, report_supp_enabled);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_LEAVE_SUPPRESSION_MASK, leave_supp_enabled);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPQueryRX
-+ * Description:
-+ *      Set port-based Query packet RX allowance
-+ * Input:
-+ *      port            - port number
-+ *      allow_query     - allowance of Query packet RX, 1:Allow, 0:Drop
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPQueryRX(rtk_uint32 port, rtk_uint32 allow_query)
-+{
-+    ret_t   retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    /* Allow Query */
-+    if (port < 8)
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_QUERY_MASK, allow_query);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_QUERY_MASK, allow_query);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPQueryRX
-+ * Description:
-+ *      Get port-based Query packet RX allowance
-+ * Input:
-+ *      port            - port number
-+ * Output:
-+ *      allow_query     - allowance of Query packet RX, 1:Allow, 0:Drop
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPQueryRX(rtk_uint32 port, rtk_uint32 *allow_query)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    /* Allow Query */
-+    if (port < 8)
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_QUERY_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_QUERY_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    *allow_query = value;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPReportRX
-+ * Description:
-+ *      Set port-based Report packet RX allowance
-+ * Input:
-+ *      port            - port number
-+ *      allow_report    - allowance of Report packet RX, 1:Allow, 0:Drop
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPReportRX(rtk_uint32 port, rtk_uint32 allow_report)
-+{
-+    ret_t   retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+    {
-+    /* Allow Report */
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_REPORT_MASK, allow_report);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_REPORT_MASK, allow_report);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPReportRX
-+ * Description:
-+ *      Get port-based Report packet RX allowance
-+ * Input:
-+ *      port            - port number
-+ * Output:
-+ *      allow_report    - allowance of Report packet RX, 1:Allow, 0:Drop
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPReportRX(rtk_uint32 port, rtk_uint32 *allow_report)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+    {
-+        /* Allow Report */
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_REPORT_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_REPORT_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    *allow_report = value;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPLeaveRX
-+ * Description:
-+ *      Set port-based Leave packet RX allowance
-+ * Input:
-+ *      port            - port number
-+ *      allow_leave     - allowance of Leave packet RX, 1:Allow, 0:Drop
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPLeaveRX(rtk_uint32 port, rtk_uint32 allow_leave)
-+{
-+    ret_t   retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+    {
-+        /* Allow Leave */
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_LEAVE_MASK, allow_leave);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_LEAVE_MASK, allow_leave);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPLeaveRX
-+ * Description:
-+ *      Get port-based Leave packet RX allowance
-+ * Input:
-+ *      port            - port number
-+ * Output:
-+ *      allow_leave     - allowance of Leave packet RX, 1:Allow, 0:Drop
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPLeaveRX(rtk_uint32 port, rtk_uint32 *allow_leave)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+    {
-+    /* Allow Leave */
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_LEAVE_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_LEAVE_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    *allow_leave = value;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPMRPRX
-+ * Description:
-+ *      Set port-based Multicast Routing Protocol packet RX allowance
-+ * Input:
-+ *      port            - port number
-+ *      allow_mrp       - allowance of Multicast Routing Protocol packet RX, 1:Allow, 0:Drop
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPMRPRX(rtk_uint32 port, rtk_uint32 allow_mrp)
-+{
-+    ret_t   retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+    {
-+    /* Allow Multicast Routing Protocol */
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_MRP_MASK, allow_mrp);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_MRP_MASK, allow_mrp);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPMRPRX
-+ * Description:
-+ *      Get port-based Multicast Routing Protocol packet RX allowance
-+ * Input:
-+ *      port            - port number
-+ * Output:
-+ *      allow_mrp       - allowance of Multicast Routing Protocol packet RX, 1:Allow, 0:Drop
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPMRPRX(rtk_uint32 port, rtk_uint32 *allow_mrp)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    /* Allow Multicast Routing Protocol */
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_MRP_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_MRP_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    *allow_mrp = value;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPMcDataRX
-+ * Description:
-+ *      Set port-based Multicast data packet RX allowance
-+ * Input:
-+ *      port            - port number
-+ *      allow_mcdata    - allowance of Multicast data packet RX, 1:Allow, 0:Drop
-+ * Output:
-+ *      none
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPMcDataRX(rtk_uint32 port, rtk_uint32 allow_mcdata)
-+{
-+    ret_t   retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    /* Allow Multicast Data */
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_MC_DATA_MASK, allow_mcdata);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_MC_DATA_MASK, allow_mcdata);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPMcDataRX
-+ * Description:
-+ *      Get port-based Multicast data packet RX allowance
-+ * Input:
-+ *      port            - port number
-+ * Output:
-+ *      allow_mcdata    - allowance of Multicast data packet RX, 1:Allow, 0:Drop
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPMcDataRX(rtk_uint32 port, rtk_uint32 *allow_mcdata)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    /* Allow Multicast data */
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_MC_DATA_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_ALLOW_MC_DATA_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    *allow_mcdata = value;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPv1Opeartion
-+ * Description:
-+ *      Set port-based IGMPv1 Control packet action
-+ * Input:
-+ *      port            - port number
-+ *      igmpv1_op       - IGMPv1 control packet action
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPv1Opeartion(rtk_uint32 port, rtk_uint32 igmpv1_op)
-+{
-+    ret_t   retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(igmpv1_op >= PROTOCOL_OP_END)
-+        return RT_ERR_INPUT;
-+
-+    /* IGMPv1 operation */
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_IGMPV1_OP_MASK, igmpv1_op);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_IGMPV1_OP_MASK, igmpv1_op);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPv1Opeartion
-+ * Description:
-+ *      Get port-based IGMPv1 Control packet action
-+ * Input:
-+ *      port            - port number
-+ * Output:
-+ *      igmpv1_op       - IGMPv1 control packet action
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPv1Opeartion(rtk_uint32 port, rtk_uint32 *igmpv1_op)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    /* IGMPv1 operation */
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_IGMPV1_OP_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_IGMPV1_OP_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    *igmpv1_op = value;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPv2Opeartion
-+ * Description:
-+ *      Set port-based IGMPv2 Control packet action
-+ * Input:
-+ *      port            - port number
-+ *      igmpv2_op       - IGMPv2 control packet action
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPv2Opeartion(rtk_uint32 port, rtk_uint32 igmpv2_op)
-+{
-+    ret_t   retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(igmpv2_op >= PROTOCOL_OP_END)
-+        return RT_ERR_INPUT;
-+
-+    /* IGMPv2 operation */
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_IGMPV2_OP_MASK, igmpv2_op);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_IGMPV2_OP_MASK, igmpv2_op);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPv2Opeartion
-+ * Description:
-+ *      Get port-based IGMPv2 Control packet action
-+ * Input:
-+ *      port            - port number
-+ * Output:
-+ *      igmpv2_op       - IGMPv2 control packet action
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPv2Opeartion(rtk_uint32 port, rtk_uint32 *igmpv2_op)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    /* IGMPv2 operation */
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_IGMPV2_OP_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_IGMPV2_OP_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    *igmpv2_op = value;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPv3Opeartion
-+ * Description:
-+ *      Set port-based IGMPv3 Control packet action
-+ * Input:
-+ *      port            - port number
-+ *      igmpv3_op       - IGMPv3 control packet action
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPv3Opeartion(rtk_uint32 port, rtk_uint32 igmpv3_op)
-+{
-+    ret_t   retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(igmpv3_op >= PROTOCOL_OP_END)
-+        return RT_ERR_INPUT;
-+
-+    /* IGMPv3 operation */
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_IGMPV3_OP_MASK, igmpv3_op);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_IGMPV3_OP_MASK, igmpv3_op);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPv3Opeartion
-+ * Description:
-+ *      Get port-based IGMPv3 Control packet action
-+ * Input:
-+ *      port            - port number
-+ * Output:
-+ *      igmpv3_op       - IGMPv3 control packet action
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPv3Opeartion(rtk_uint32 port, rtk_uint32 *igmpv3_op)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    /* IGMPv3 operation */
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_IGMPV3_OP_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_IGMPV3_OP_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    *igmpv3_op = value;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicMLDv1Opeartion
-+ * Description:
-+ *      Set port-based MLDv1 Control packet action
-+ * Input:
-+ *      port            - port number
-+ *      mldv1_op        - MLDv1 control packet action
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicMLDv1Opeartion(rtk_uint32 port, rtk_uint32 mldv1_op)
-+{
-+    ret_t   retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(mldv1_op >= PROTOCOL_OP_END)
-+        return RT_ERR_INPUT;
-+
-+    /* MLDv1 operation */
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_MLDv1_OP_MASK, mldv1_op);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_MLDv1_OP_MASK, mldv1_op);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicMLDv1Opeartion
-+ * Description:
-+ *      Get port-based MLDv1 Control packet action
-+ * Input:
-+ *      port            - port number
-+ * Output:
-+ *      mldv1_op        - MLDv1 control packet action
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicMLDv1Opeartion(rtk_uint32 port, rtk_uint32 *mldv1_op)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    /* MLDv1 operation */
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_MLDv1_OP_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_MLDv1_OP_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    *mldv1_op = value;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicMLDv2Opeartion
-+ * Description:
-+ *      Set port-based MLDv2 Control packet action
-+ * Input:
-+ *      port            - port number
-+ *      mldv2_op        - MLDv2 control packet action
-+ * Output:
-+ *      none
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicMLDv2Opeartion(rtk_uint32 port, rtk_uint32 mldv2_op)
-+{
-+    ret_t   retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(mldv2_op >= PROTOCOL_OP_END)
-+        return RT_ERR_INPUT;
-+
-+    /* MLDv2 operation */
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_MLDv2_OP_MASK, mldv2_op);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_MLDv2_OP_MASK, mldv2_op);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicMLDv2Opeartion
-+ * Description:
-+ *      Get port-based MLDv2 Control packet action
-+ * Input:
-+ *      port            - port number
-+ * Output:
-+ *      mldv2_op        - MLDv2 control packet action
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_PORT_ID  - Error PORT ID
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicMLDv2Opeartion(rtk_uint32 port, rtk_uint32 *mldv2_op)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    /* MLDv2 operation */
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT0_CONTROL + port, RTL8367C_IGMP_PORT0_CONTROL_MLDv2_OP_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT8_CONTROL + port - 8, RTL8367C_IGMP_PORT0_CONTROL_MLDv2_OP_MASK, &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    *mldv2_op = value;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPPortMAXGroup
-+ * Description:
-+ *      Set per-port Max group number
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      max_group   - max IGMP group
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPPortMAXGroup(rtk_uint32 port, rtk_uint32 max_group)
-+{
-+    ret_t retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(max_group > RTL8367C_IGMP_MAX_GOUP)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT01_MAX_GROUP + (port/2), RTL8367C_PORT0_MAX_GROUP_MASK << (RTL8367C_PORT1_MAX_GROUP_OFFSET * (port%2)), max_group);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_PORT89_MAX_GROUP + (port/2), RTL8367C_PORT0_MAX_GROUP_MASK << (RTL8367C_PORT1_MAX_GROUP_OFFSET * (port%2)), max_group);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPPortMAXGroup
-+ * Description:
-+ *      Get per-port Max group number
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      max_group   - max IGMP group
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPPortMAXGroup(rtk_uint32 port, rtk_uint32 *max_group)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT01_MAX_GROUP + (port/2), RTL8367C_PORT0_MAX_GROUP_MASK << (RTL8367C_PORT1_MAX_GROUP_OFFSET * (port%2)), &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT89_MAX_GROUP + (port/2), RTL8367C_PORT0_MAX_GROUP_MASK << (RTL8367C_PORT1_MAX_GROUP_OFFSET * (port%2)), &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    *max_group = value;
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPPortCurrentGroup
-+ * Description:
-+ *      Get per-port current group number
-+ * Input:
-+ *      port            - Physical port number (0~7)
-+ *      current_group   - current IGMP group
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPPortCurrentGroup(rtk_uint32 port, rtk_uint32 *current_group)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  value;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT01_CURRENT_GROUP + (port/2), RTL8367C_PORT0_CURRENT_GROUP_MASK << (RTL8367C_PORT1_CURRENT_GROUP_OFFSET * (port%2)), &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_PORT89_CURRENT_GROUP + ((port - 8)/2), RTL8367C_PORT0_CURRENT_GROUP_MASK << (RTL8367C_PORT1_CURRENT_GROUP_OFFSET * (port%2)), &value);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    *current_group = value;
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPGroup
-+ * Description:
-+ *      Get IGMP group
-+ * Input:
-+ *      idx     - Group index (0~255)
-+ *      valid   - valid bit
-+ *      grp     - IGMP group
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - Group index is out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPGroup(rtk_uint32 idx, rtk_uint32 *valid, rtl8367c_igmpgroup *grp)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  regAddr, regData;
-+    rtk_uint32  i;
-+    rtk_uint32  groupInfo = 0;
-+
-+    if(idx > RTL8367C_IGMP_MAX_GOUP)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    /* Write ACS_ADR register for data bits */
-+    regAddr = RTL8367C_TABLE_ACCESS_ADDR_REG;
-+    regData = idx;
-+    retVal = rtl8367c_setAsicReg(regAddr, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Write ACS_CMD register */
-+    regAddr = RTL8367C_TABLE_ACCESS_CTRL_REG;
-+    regData = RTL8367C_TABLE_ACCESS_REG_DATA(TB_OP_READ, TB_TARGET_IGMP_GROUP);
-+    retVal = rtl8367c_setAsicRegBits(regAddr, RTL8367C_TABLE_TYPE_MASK | RTL8367C_COMMAND_TYPE_MASK, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Read Data Bits */
-+    regAddr = RTL8367C_TABLE_ACCESS_RDDATA_BASE;
-+    for(i = 0 ;i <= 1; i++)
-+    {
-+        retVal = rtl8367c_getAsicReg(regAddr, &regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        groupInfo |= ((regData & 0xFFFF) << (i * 16));
-+        regAddr ++;
-+    }
-+
-+    grp->p0_timer = groupInfo & 0x00000007;
-+    grp->p1_timer = (groupInfo >> 3) & 0x00000007;
-+    grp->p2_timer = (groupInfo >> 6) & 0x00000007;
-+    grp->p3_timer = (groupInfo >> 9) & 0x00000007;
-+    grp->p4_timer = (groupInfo >> 12) & 0x00000007;
-+    grp->p5_timer = (groupInfo >> 15) & 0x00000007;
-+    grp->p6_timer = (groupInfo >> 18) & 0x00000007;
-+    grp->p7_timer = (groupInfo >> 21) & 0x00000007;
-+    grp->report_supp_flag = (groupInfo >> 24) & 0x00000001;
-+    grp->p8_timer = (groupInfo >> 25) & 0x00000007;
-+    grp->p9_timer = (groupInfo >> 28) & 0x00000007;
-+    grp->p10_timer = (groupInfo >> 31) & 0x00000001;
-+
-+    regAddr = RTL8367C_TABLE_ACCESS_RDDATA_BASE + 2;
-+    retVal = rtl8367c_getAsicReg(regAddr, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    grp->p10_timer |= (regData & 0x00000003) << 1;
-+
-+    /* Valid bit */
-+    retVal = rtl8367c_getAsicReg(RTL8367C_IGMP_GROUP_USAGE_REG(idx), &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *valid = ((regData & (0x0001 << (idx %16))) != 0) ? 1 : 0;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicIpMulticastPortIsoLeaky
-+ * Description:
-+ *      Set IP multicast Port Isolation leaky
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIpMulticastPortIsoLeaky(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    ret_t   retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_IPMCAST_PORTISO_LEAKY_REG, (0x0001 << port), enabled);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIpMulticastPortIsoLeaky
-+ * Description:
-+ *      Get IP multicast Port Isolation leaky
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIpMulticastPortIsoLeaky(rtk_uint32 port, rtk_uint32 *enabled)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  regData;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_IPMCAST_PORTISO_LEAKY_REG, (0x0001 << port), &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *enabled = regData;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPReportLeaveFlood
-+ * Description:
-+ *      Set IGMP/MLD Report/Leave flood
-+ * Input:
-+ *      flood   - 0: Reserved, 1: flooding to router ports, 2: flooding to all ports, 3: flooding to router port or to all ports if there is no router port
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPReportLeaveFlood(rtk_uint32 flood)
-+{
-+    ret_t   retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_IGMP_MLD_CFG3, RTL8367C_REPORT_LEAVE_FORWARD_MASK, flood);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPReportLeaveFlood
-+ * Description:
-+ *      Get IGMP/MLD Report/Leave flood
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pflood  - 0: Reserved, 1: flooding to router ports, 2: flooding to all ports, 3: flooding to router port or to all ports if there is no router port
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPReportLeaveFlood(rtk_uint32 *pFlood)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  regData;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_IGMP_MLD_CFG3, RTL8367C_REPORT_LEAVE_FORWARD_MASK, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *pFlood = regData;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPDropLeaveZero
-+ * Description:
-+ *      Set the function of droppping Leave packet with group IP = 0.0.0.0
-+ * Input:
-+ *      drop    - 1: Drop, 0:Bypass
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPDropLeaveZero(rtk_uint32 drop)
-+{
-+    ret_t   retVal;
-+
-+    retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_IGMP_MLD_CFG1, RTL8367C_DROP_LEAVE_ZERO_OFFSET, drop);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPDropLeaveZero
-+ * Description:
-+ *      Get the function of droppping Leave packet with group IP = 0.0.0.0
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pDrop    - 1: Drop, 0:Bypass
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPDropLeaveZero(rtk_uint32 *pDrop)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  regData;
-+
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_IGMP_MLD_CFG1, RTL8367C_DROP_LEAVE_ZERO_OFFSET, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *pDrop = regData;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPBypassStormCTRL
-+ * Description:
-+ *      Set the function of bypass strom control for IGMP/MLD packet
-+ * Input:
-+ *      bypass    - 1: Bypass, 0:not bypass
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPBypassStormCTRL(rtk_uint32 bypass)
-+{
-+    ret_t   retVal;
-+
-+    retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_IGMP_MLD_DISCARD_STORM_FILTER_OFFSET, bypass);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPBypassStormCTRL
-+ * Description:
-+ *      Set the function of bypass strom control for IGMP/MLD packet
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pBypass    - 1: Bypass, 0:not bypass
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPBypassStormCTRL(rtk_uint32 *pBypass)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  regData;
-+
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_IGMP_MLD_DISCARD_STORM_FILTER_OFFSET, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *pBypass = regData;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPIsoLeaky
-+ * Description:
-+ *      Set Port Isolation leaky for IGMP/MLD packet
-+ * Input:
-+ *      leaky    - 1: Leaky, 0:not leaky
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPIsoLeaky(rtk_uint32 leaky)
-+{
-+    ret_t   retVal;
-+
-+    retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_IGMP_MLD_PORTISO_LEAKY_OFFSET, leaky);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPIsoLeaky
-+ * Description:
-+ *      Get Port Isolation leaky for IGMP/MLD packet
-+ * Input:
-+ *      Noen
-+ * Output:
-+ *      pLeaky    - 1: Leaky, 0:not leaky
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPIsoLeaky(rtk_uint32 *pLeaky)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  regData;
-+
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_IGMP_MLD_PORTISO_LEAKY_OFFSET, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *pLeaky = regData;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPVLANLeaky
-+ * Description:
-+ *      Set VLAN leaky for IGMP/MLD packet
-+ * Input:
-+ *      leaky    - 1: Leaky, 0:not leaky
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPVLANLeaky(rtk_uint32 leaky)
-+{
-+    ret_t   retVal;
-+
-+    retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_IGMP_MLD_VLAN_LEAKY_OFFSET, leaky);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPVLANLeaky
-+ * Description:
-+ *      Get VLAN leaky for IGMP/MLD packet
-+ * Input:
-+ *      Noen
-+ * Output:
-+ *      pLeaky    - 1: Leaky, 0:not leaky
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPVLANLeaky(rtk_uint32 *pLeaky)
-+{
-+    ret_t   retVal;
-+    rtk_uint32  regData;
-+
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_IGMP_MLD_CFG0, RTL8367C_IGMP_MLD_VLAN_LEAKY_OFFSET, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *pLeaky = regData;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicIGMPBypassGroup
-+ * Description:
-+ *      Set IGMP/MLD Bypass group
-+ * Input:
-+ *      bypassType  - Bypass type
-+ *      enabled     - enabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicIGMPBypassGroup(rtk_uint32 bypassType, rtk_uint32 enabled)
-+{
-+    ret_t   retVal;
-+    rtk_uint32 offset;
-+
-+    switch(bypassType)
-+    {
-+        case BYPASS_224_0_0_X:
-+            offset = RTL8367C_IGMP_MLD_IP4_BYPASS_224_0_0_OFFSET;
-+            break;
-+        case BYPASS_224_0_1_X:
-+            offset = RTL8367C_IGMP_MLD_IP4_BYPASS_224_0_1_OFFSET;
-+            break;
-+        case BYPASS_239_255_255_X:
-+            offset = RTL8367C_IGMP_MLD_IP4_BYPASS_239_255_255_OFFSET;
-+            break;
-+        case BYPASS_IPV6_00XX:
-+            offset = RTL8367C_IGMP_MLD_IP6_BYPASS_OFFSET;
-+            break;
-+        default:
-+            return RT_ERR_INPUT;
-+    }
-+
-+    retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_IGMP_MLD_CFG3, offset, enabled);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicIGMPBypassGroup
-+ * Description:
-+ *      Get IGMP/MLD Bypass group
-+ * Input:
-+ *      bypassType  - Bypass type
-+ * Output:
-+ *      pEnabled    - enabled
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicIGMPBypassGroup(rtk_uint32 bypassType, rtk_uint32 *pEnabled)
-+{
-+    ret_t   retVal;
-+    rtk_uint32 offset;
-+
-+    switch(bypassType)
-+    {
-+        case BYPASS_224_0_0_X:
-+            offset = RTL8367C_IGMP_MLD_IP4_BYPASS_224_0_0_OFFSET;
-+            break;
-+        case BYPASS_224_0_1_X:
-+            offset = RTL8367C_IGMP_MLD_IP4_BYPASS_224_0_1_OFFSET;
-+            break;
-+        case BYPASS_239_255_255_X:
-+            offset = RTL8367C_IGMP_MLD_IP4_BYPASS_239_255_255_OFFSET;
-+            break;
-+        case BYPASS_IPV6_00XX:
-+            offset = RTL8367C_IGMP_MLD_IP6_BYPASS_OFFSET;
-+            break;
-+        default:
-+            return RT_ERR_INPUT;
-+    }
-+
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_IGMP_MLD_CFG3, offset, pEnabled);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_inbwctrl.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_inbwctrl.c
-new file mode 100644
-index 0000000000..abb36bec2d
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_inbwctrl.c
-@@ -0,0 +1,164 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Ingress bandwidth control related functions
-+ *
-+ */
-+#include <rtl8367c_asicdrv_inbwctrl.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicPortIngressBandwidth
-+ * Description:
-+ *      Set per-port total ingress bandwidth
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      bandwidth   - The total ingress bandwidth (unit: 8Kbps), 0x1FFFF:disable
-+ *      preifg      - Include preamble and IFG, 0:Exclude, 1:Include
-+ *      enableFC    - Action when input rate exceeds. 0: Drop   1: Flow Control
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortIngressBandwidth(rtk_uint32 port, rtk_uint32 bandwidth, rtk_uint32 preifg, rtk_uint32 enableFC)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint32 regAddr;
-+
-+    /* Invalid input parameter */
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if(bandwidth > RTL8367C_QOS_GRANULARTY_MAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    regAddr = RTL8367C_INGRESSBW_PORT_RATE_LSB_REG(port);
-+    regData = bandwidth & RTL8367C_QOS_GRANULARTY_LSB_MASK;
-+    retVal = rtl8367c_setAsicReg(regAddr, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    regAddr += 1;
-+    regData = (bandwidth & RTL8367C_QOS_GRANULARTY_MSB_MASK) >> RTL8367C_QOS_GRANULARTY_MSB_OFFSET;
-+    retVal = rtl8367c_setAsicRegBits(regAddr, RTL8367C_INGRESSBW_PORT0_RATE_CTRL1_INGRESSBW_RATE16_MASK, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    regAddr = RTL8367C_PORT_MISC_CFG_REG(port);
-+    retVal = rtl8367c_setAsicRegBit(regAddr, RTL8367C_PORT0_MISC_CFG_INGRESSBW_IFG_OFFSET, preifg);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    regAddr = RTL8367C_PORT_MISC_CFG_REG(port);
-+    retVal = rtl8367c_setAsicRegBit(regAddr, RTL8367C_PORT0_MISC_CFG_INGRESSBW_FLOWCTRL_OFFSET, enableFC);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortIngressBandwidth
-+ * Description:
-+ *      Get per-port total ingress bandwidth
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      pBandwidth  - The total ingress bandwidth (unit: 8Kbps), 0x1FFFF:disable
-+ *      pPreifg         - Include preamble and IFG, 0:Exclude, 1:Include
-+ *      pEnableFC   - Action when input rate exceeds. 0: Drop   1: Flow Control
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortIngressBandwidth(rtk_uint32 port, rtk_uint32* pBandwidth, rtk_uint32* pPreifg, rtk_uint32* pEnableFC)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint32 regAddr;
-+
-+    /* Invalid input parameter */
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    regAddr = RTL8367C_INGRESSBW_PORT_RATE_LSB_REG(port);
-+    retVal = rtl8367c_getAsicReg(regAddr, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *pBandwidth = regData;
-+
-+    regAddr += 1;
-+    retVal = rtl8367c_getAsicRegBits(regAddr, RTL8367C_INGRESSBW_PORT0_RATE_CTRL1_INGRESSBW_RATE16_MASK, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *pBandwidth |= (regData << RTL8367C_QOS_GRANULARTY_MSB_OFFSET);
-+
-+    regAddr = RTL8367C_PORT_MISC_CFG_REG(port);
-+    retVal = rtl8367c_getAsicRegBit(regAddr, RTL8367C_PORT0_MISC_CFG_INGRESSBW_IFG_OFFSET, pPreifg);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    regAddr = RTL8367C_PORT_MISC_CFG_REG(port);
-+    retVal = rtl8367c_getAsicRegBit(regAddr, RTL8367C_PORT0_MISC_CFG_INGRESSBW_FLOWCTRL_OFFSET, pEnableFC);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortIngressBandwidthBypass
-+ * Description:
-+ *      Set ingress bandwidth control bypasss 8899, RMA 01-80-C2-00-00-xx and IGMP
-+ * Input:
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortIngressBandwidthBypass(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_SW_DUMMY0, RTL8367C_INGRESSBW_BYPASS_EN_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortIngressBandwidthBypass
-+ * Description:
-+ *      Set ingress bandwidth control bypasss 8899, RMA 01-80-C2-00-00-xx and IGMP
-+ * Input:
-+ *      pEnabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortIngressBandwidthBypass(rtk_uint32* pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_SW_DUMMY0, RTL8367C_INGRESSBW_BYPASS_EN_OFFSET, pEnabled);
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_interrupt.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_interrupt.c
-new file mode 100644
-index 0000000000..fb6cbcdf1f
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_interrupt.c
-@@ -0,0 +1,205 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Interrupt related functions
-+ *
-+ */
-+#include <rtl8367c_asicdrv_interrupt.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicInterruptPolarity
-+ * Description:
-+ *      Set interrupt trigger polarity
-+ * Input:
-+ *      polarity    - 0:pull high 1: pull low
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicInterruptPolarity(rtk_uint32 polarity)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_INTR_CTRL, RTL8367C_INTR_CTRL_OFFSET, polarity);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicInterruptPolarity
-+ * Description:
-+ *      Get interrupt trigger polarity
-+ * Input:
-+ *      pPolarity   - 0:pull high 1: pull low
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicInterruptPolarity(rtk_uint32* pPolarity)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_INTR_CTRL, RTL8367C_INTR_CTRL_OFFSET, pPolarity);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicInterruptMask
-+ * Description:
-+ *      Set interrupt enable mask
-+ * Input:
-+ *      imr     - Interrupt mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicInterruptMask(rtk_uint32 imr)
-+{
-+    return rtl8367c_setAsicReg(RTL8367C_REG_INTR_IMR, imr);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicInterruptMask
-+ * Description:
-+ *      Get interrupt enable mask
-+ * Input:
-+ *      pImr    - Interrupt mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicInterruptMask(rtk_uint32* pImr)
-+{
-+    return rtl8367c_getAsicReg(RTL8367C_REG_INTR_IMR, pImr);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicInterruptMask
-+ * Description:
-+ *      Clear interrupt enable mask
-+ * Input:
-+ *      ims     - Interrupt status mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      This API can be used to clear ASIC interrupt status and register will be cleared by writting 1.
-+ *      [0]:Link change,
-+ *      [1]:Share meter exceed,
-+ *      [2]:Learn number overed,
-+ *      [3]:Speed Change,
-+ *      [4]:Tx special congestion
-+ *      [5]:1 second green feature
-+ *      [6]:loop detection
-+ *      [7]:interrupt from 8051
-+ *      [8]:Cable diagnostic finish
-+ *      [9]:ACL action interrupt trigger
-+ *      [11]: Silent Start
-+ */
-+ret_t rtl8367c_setAsicInterruptStatus(rtk_uint32 ims)
-+{
-+    return rtl8367c_setAsicReg(RTL8367C_REG_INTR_IMS, ims);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicInterruptStatus
-+ * Description:
-+ *      Get interrupt enable mask
-+ * Input:
-+ *      pIms    - Interrupt status mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicInterruptStatus(rtk_uint32* pIms)
-+{
-+    return rtl8367c_getAsicReg(RTL8367C_REG_INTR_IMS, pIms);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicInterruptRelatedStatus
-+ * Description:
-+ *      Clear interrupt status
-+ * Input:
-+ *      type    - per port Learn over, per-port speed change, per-port special congest, share meter exceed status
-+ *      status  - exceed status, write 1 to clear
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicInterruptRelatedStatus(rtk_uint32 type, rtk_uint32 status)
-+{
-+    CONST rtk_uint32 indicatorAddress[INTRST_END] = {RTL8367C_REG_LEARN_OVER_INDICATOR,
-+                                                    RTL8367C_REG_SPEED_CHANGE_INDICATOR,
-+                                                    RTL8367C_REG_SPECIAL_CONGEST_INDICATOR,
-+                                                    RTL8367C_REG_PORT_LINKDOWN_INDICATOR,
-+                                                    RTL8367C_REG_PORT_LINKUP_INDICATOR,
-+                                                    RTL8367C_REG_METER_OVERRATE_INDICATOR0,
-+                                                    RTL8367C_REG_METER_OVERRATE_INDICATOR1,
-+                                                    RTL8367C_REG_RLDP_LOOPED_INDICATOR,
-+                                                    RTL8367C_REG_RLDP_RELEASED_INDICATOR,
-+                                                    RTL8367C_REG_SYSTEM_LEARN_OVER_INDICATOR};
-+
-+    if(type >= INTRST_END )
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_setAsicReg(indicatorAddress[type], status);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicInterruptRelatedStatus
-+ * Description:
-+ *      Get interrupt status
-+ * Input:
-+ *      type    - per port Learn over, per-port speed change, per-port special congest, share meter exceed status
-+ *      pStatus     - exceed status, write 1 to clear
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicInterruptRelatedStatus(rtk_uint32 type, rtk_uint32* pStatus)
-+{
-+    CONST rtk_uint32 indicatorAddress[INTRST_END] = {RTL8367C_REG_LEARN_OVER_INDICATOR,
-+                                                    RTL8367C_REG_SPEED_CHANGE_INDICATOR,
-+                                                    RTL8367C_REG_SPECIAL_CONGEST_INDICATOR,
-+                                                    RTL8367C_REG_PORT_LINKDOWN_INDICATOR,
-+                                                    RTL8367C_REG_PORT_LINKUP_INDICATOR,
-+                                                    RTL8367C_REG_METER_OVERRATE_INDICATOR0,
-+                                                    RTL8367C_REG_METER_OVERRATE_INDICATOR1,
-+                                                    RTL8367C_REG_RLDP_LOOPED_INDICATOR,
-+                                                    RTL8367C_REG_RLDP_RELEASED_INDICATOR,
-+                                                    RTL8367C_REG_SYSTEM_LEARN_OVER_INDICATOR};
-+
-+    if(type >= INTRST_END )
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_getAsicReg(indicatorAddress[type], pStatus);
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_led.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_led.c
-new file mode 100644
-index 0000000000..1189028161
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_led.c
-@@ -0,0 +1,727 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : LED related functions
-+ *
-+ */
-+#include <rtl8367c_asicdrv_led.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicLedIndicateInfoConfig
-+ * Description:
-+ *      Set Leds indicated information mode
-+ * Input:
-+ *      ledno   - LED group number. There are 1 to 1 led mapping to each port in each led group
-+ *      config  - Support 16 types configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      The API can set LED indicated information configuration for each LED group with 1 to 1 led mapping to each port.
-+ *      Definition        LED Statuses            Description
-+ *      0000        LED_Off                LED pin Tri-State.
-+ *      0001        Dup/Col                Collision, Full duplex Indicator. Blinking every 43ms when collision happens. Low for full duplex, and high for half duplex mode.
-+ *      0010        Link/Act               Link, Activity Indicator. Low for link established. Link/Act Blinks every 43ms when the corresponding port is transmitting or receiving.
-+ *      0011        Spd1000                1000Mb/s Speed Indicator. Low for 1000Mb/s.
-+ *      0100        Spd100                 100Mb/s Speed Indicator. Low for 100Mb/s.
-+ *      0101        Spd10                  10Mb/s Speed Indicator. Low for 10Mb/s.
-+ *      0110        Spd1000/Act            1000Mb/s Speed/Activity Indicator. Low for 1000Mb/s. Blinks every 43ms when the corresponding port is transmitting or receiving.
-+ *      0111        Spd100/Act             100Mb/s Speed/Activity Indicator. Low for 100Mb/s. Blinks every 43ms when the corresponding port is transmitting or receiving.
-+ *      1000        Spd10/Act              10Mb/s Speed/Activity Indicator. Low for 10Mb/s. Blinks every 43ms when the corresponding port is transmitting or receiving.
-+ *      1001        Spd100 (10)/Act        10/100Mb/s Speed/Activity Indicator. Low for 10/100Mb/s. Blinks every 43ms when the corresponding port is transmitting or receiving.
-+ *      1010        Fiber                  Fiber link Indicator. Low for Fiber.
-+ *      1011        Fault                  Auto-negotiation     Fault Indicator. Low for Fault.
-+ *      1100        Link/Rx                Link, Activity Indicator. Low for link established. Link/Rx Blinks every 43ms when the corresponding port is transmitting.
-+ *      1101        Link/Tx                Link, Activity Indicator. Low for link established. Link/Tx Blinks every 43ms when the corresponding port is receiving.
-+ *      1110        Master                 Link on Master Indicator. Low for link Master established.
-+ *      1111        LED_Force              Force LED output, LED output value reference
-+ */
-+ret_t rtl8367c_setAsicLedIndicateInfoConfig(rtk_uint32 ledno, rtk_uint32 config)
-+{
-+    ret_t   retVal;
-+    CONST rtk_uint16 bits[RTL8367C_LEDGROUPNO] = {RTL8367C_LED0_CFG_MASK, RTL8367C_LED1_CFG_MASK, RTL8367C_LED2_CFG_MASK};
-+
-+    if(ledno >= RTL8367C_LEDGROUPNO)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(config >= LEDCONF_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_LED_CONFIGURATION, RTL8367C_LED_CONFIG_SEL_OFFSET, 0);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_LED_CONFIGURATION, bits[ledno], config);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLedIndicateInfoConfig
-+ * Description:
-+ *      Get Leds indicated information mode
-+ * Input:
-+ *      ledno   - LED group number. There are 1 to 1 led mapping to each port in each led group
-+ *      pConfig     - Support 16 types configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLedIndicateInfoConfig(rtk_uint32 ledno, rtk_uint32* pConfig)
-+{
-+    CONST rtk_uint16 bits[RTL8367C_LEDGROUPNO]= {RTL8367C_LED0_CFG_MASK, RTL8367C_LED1_CFG_MASK, RTL8367C_LED2_CFG_MASK};
-+
-+    if(ledno >= RTL8367C_LEDGROUPNO)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    /* Get register value */
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_LED_CONFIGURATION, bits[ledno], pConfig);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicLedGroupMode
-+ * Description:
-+ *      Set Led Group mode
-+ * Input:
-+ *      mode    - LED mode
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLedGroupMode(rtk_uint32 mode)
-+{
-+    ret_t retVal;
-+
-+    /* Invalid input parameter */
-+    if(mode >= RTL8367C_LED_MODE_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_LED_CONFIGURATION, RTL8367C_LED_CONFIG_SEL_OFFSET, 1);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_LED_CONFIGURATION, RTL8367C_DATA_LED_MASK, mode);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLedGroupMode
-+ * Description:
-+ *      Get Led Group mode
-+ * Input:
-+ *      pMode   - LED mode
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLedGroupMode(rtk_uint32* pMode)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_LED_CONFIGURATION, RTL8367C_LED_CONFIG_SEL_OFFSET, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    if(regData!=1)
-+        return RT_ERR_FAILED;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_LED_CONFIGURATION, RTL8367C_DATA_LED_MASK, pMode);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicForceLeds
-+ * Description:
-+ *      Set group LED mode
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      group   - LED group number
-+ *      mode    - LED mode
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicForceLed(rtk_uint32 port, rtk_uint32 group, rtk_uint32 mode)
-+{
-+    rtk_uint16 regAddr;
-+    ret_t retVal;
-+
-+    /* Invalid input parameter */
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(group >= RTL8367C_LEDGROUPNO)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(mode >= LEDFORCEMODE_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+    /* Set Related Registers */
-+    if(port < 8){
-+        regAddr = RTL8367C_LED_FORCE_MODE_BASE + (group << 1);
-+        if((retVal = rtl8367c_setAsicRegBits(regAddr, 0x3 << (port * 2), mode)) != RT_ERR_OK)
-+            return retVal;
-+    }else if(port >= 8){
-+        regAddr = RTL8367C_REG_CPU_FORCE_LED0_CFG1 + (group << 1);
-+        if((retVal = rtl8367c_setAsicRegBits(regAddr, 0x3 << ((port-8) * 2), mode)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicForceLed
-+ * Description:
-+ *      Get group LED mode
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      group   - LED group number
-+ *      pMode   - LED mode
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicForceLed(rtk_uint32 port, rtk_uint32 group, rtk_uint32* pMode)
-+{
-+    rtk_uint16 regAddr;
-+    ret_t retVal;
-+
-+    /* Invalid input parameter */
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(group >= RTL8367C_LEDGROUPNO)
-+        return RT_ERR_INPUT;
-+
-+    /* Get Related Registers */
-+    if(port < 8){
-+        regAddr = RTL8367C_LED_FORCE_MODE_BASE + (group << 1);
-+        if((retVal = rtl8367c_getAsicRegBits(regAddr, 0x3 << (port * 2), pMode)) != RT_ERR_OK)
-+            return retVal;
-+    }else if(port >= 8){
-+        regAddr = RTL8367C_REG_CPU_FORCE_LED0_CFG1 + (group << 1);
-+        if((retVal = rtl8367c_getAsicRegBits(regAddr, 0x3 << ((port-8) * 2), pMode)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicForceGroupLed
-+ * Description:
-+ *      Turn on/off Led of all ports
-+ * Input:
-+ *      group   - LED group number
-+ *      mode    - 0b00:normal mode, 0b01:force blink, 0b10:force off, 0b11:force on
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicForceGroupLed(rtk_uint32 groupmask, rtk_uint32 mode)
-+{
-+    ret_t retVal;
-+    rtk_uint32 i,bitmask;
-+    CONST rtk_uint16 bits[3]= {0x0004,0x0010,0x0040};
-+
-+    /* Invalid input parameter */
-+    if(groupmask > RTL8367C_LEDGROUPMASK)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(mode >= LEDFORCEMODE_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    bitmask = 0;
-+    for(i = 0; i <  RTL8367C_LEDGROUPNO; i++)
-+    {
-+        if(groupmask & (1 << i))
-+        {
-+            bitmask = bitmask | bits[i];
-+        }
-+
-+    }
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_LED_FORCE_CTRL, RTL8367C_LED_FORCE_MODE_MASK, bitmask);
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_LED_FORCE_CTRL, RTL8367C_FORCE_MODE_MASK, mode);
-+
-+    if(LEDFORCEMODE_NORMAL == mode)
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_LED_FORCE_CTRL, RTL8367C_LED_FORCE_MODE_MASK, 0);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicForceGroupLed
-+ * Description:
-+ *      Turn on/off Led of all ports
-+ * Input:
-+ *      group   - LED group number
-+ *      pMode   - 0b00:normal mode, 0b01:force blink, 0b10:force off, 0b11:force on
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicForceGroupLed(rtk_uint32* groupmask, rtk_uint32* pMode)
-+{
-+    ret_t retVal;
-+    rtk_uint32 i,regData;
-+    CONST rtk_uint16 bits[3] = {0x0004,0x0010,0x0040};
-+
-+    /* Get Related Registers */
-+    if((retVal = rtl8367c_getAsicRegBits(RTL8367C_LED_FORCE_CTRL, RTL8367C_LED_FORCE_MODE_MASK, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    for(i = 0; i< RTL8367C_LEDGROUPNO; i++)
-+    {
-+        if((regData & bits[i]) == bits[i])
-+        {
-+            *groupmask = *groupmask | (1 << i);
-+        }
-+    }
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_LED_FORCE_CTRL, RTL8367C_FORCE_MODE_MASK, pMode);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicLedBlinkRate
-+ * Description:
-+ *      Set led blinking rate at mode 0 to mode 3
-+ * Input:
-+ *      blinkRate   - Support 6 blink rates
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      LED blink rate can be at 43ms, 84ms, 120ms, 170ms, 340ms and 670ms
-+ */
-+ret_t rtl8367c_setAsicLedBlinkRate(rtk_uint32 blinkRate)
-+{
-+    if(blinkRate >= LEDBLINKRATE_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_LED_MODE, RTL8367C_SEL_LEDRATE_MASK, blinkRate);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLedBlinkRate
-+ * Description:
-+ *      Get led blinking rate at mode 0 to mode 3
-+ * Input:
-+ *      pBlinkRate  - Support 6 blink rates
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLedBlinkRate(rtk_uint32* pBlinkRate)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_LED_MODE, RTL8367C_SEL_LEDRATE_MASK, pBlinkRate);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicLedForceBlinkRate
-+ * Description:
-+ *      Set LEd blinking rate for force mode led
-+ * Input:
-+ *      blinkRate   - Support 6 blink rates
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLedForceBlinkRate(rtk_uint32 blinkRate)
-+{
-+    if(blinkRate >= LEDFORCERATE_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_LED_MODE, RTL8367C_FORCE_RATE_MASK, blinkRate);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLedForceBlinkRate
-+ * Description:
-+ *      Get LED blinking rate for force mode led
-+ * Input:
-+ *      pBlinkRate  - Support 6 blink rates
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLedForceBlinkRate(rtk_uint32* pBlinkRate)
-+{
-+     return rtl8367c_getAsicRegBits(RTL8367C_REG_LED_MODE, RTL8367C_FORCE_RATE_MASK, pBlinkRate);
-+}
-+
-+/*
-+@func ret_t | rtl8367c_setAsicLedGroupEnable | Turn on/off Led of all system ports
-+@parm rtk_uint32 | group | LED group id.
-+@parm rtk_uint32 | portmask | LED port mask.
-+@rvalue RT_ERR_OK | Success.
-+@rvalue RT_ERR_SMI | SMI access error.
-+@rvalue RT_ERR_PORT_ID | Invalid port number.
-+@rvalue RT_ERR_INPUT | Invalid input value.
-+@comm
-+    The API can turn on/off leds of dedicated port while indicated information configuration of LED group is set to force mode.
-+ */
-+ret_t rtl8367c_setAsicLedGroupEnable(rtk_uint32 group, rtk_uint32 portmask)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regAddr;
-+    rtk_uint32 regDataMask;
-+
-+    if ( group >= RTL8367C_LEDGROUPNO )
-+        return RT_ERR_INPUT;
-+
-+    regAddr = RTL8367C_REG_PARA_LED_IO_EN1 + group/2;
-+    regDataMask = 0xFF << ((group%2)*8);
-+    retVal = rtl8367c_setAsicRegBits(regAddr, regDataMask, portmask&0xff);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    regAddr = RTL8367C_REG_PARA_LED_IO_EN3;
-+    regDataMask = 0x3 << (group*2);
-+    retVal = rtl8367c_setAsicRegBits(regAddr, regDataMask, (portmask>>8)&0x7);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    return RT_ERR_OK;
-+}
-+
-+/*
-+@func ret_t | rtl8367c_getAsicLedGroupEnable | Get on/off status of Led of all system ports
-+@parm rtk_uint32 | group | LED group id.
-+@parm rtk_uint32 | *portmask | LED port mask.
-+@rvalue RT_ERR_OK | Success.
-+@rvalue RT_ERR_SMI | SMI access error.
-+@rvalue RT_ERR_PORT_ID | Invalid port number.
-+@rvalue RT_ERR_INPUT | Invalid input value.
-+@comm
-+    The API can turn on/off leds of dedicated port while indicated information configuration of LED group is set to force mode.
-+ */
-+ret_t rtl8367c_getAsicLedGroupEnable(rtk_uint32 group, rtk_uint32 *portmask)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regAddr;
-+    rtk_uint32 regDataMask,regData;
-+
-+    if ( group >= RTL8367C_LEDGROUPNO )
-+        return RT_ERR_INPUT;
-+
-+    regAddr = RTL8367C_REG_PARA_LED_IO_EN1 + group/2;
-+    regDataMask = 0xFF << ((group%2)*8);
-+    retVal = rtl8367c_getAsicRegBits(regAddr, regDataMask, portmask);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    regAddr = RTL8367C_REG_PARA_LED_IO_EN3;
-+    regDataMask = 0x3 << (group*2);
-+    retVal = rtl8367c_getAsicRegBits(regAddr, regDataMask, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *portmask = (regData << 8) | *portmask;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/*
-+@func ret_t | rtl8367c_setAsicLedOperationMode | Set LED operation mode
-+@parm rtk_uint32 | mode | LED mode. 1:scan mode 1, 2:parallel mode, 3:mdx mode (serial mode)
-+@rvalue RT_ERR_OK | Success.
-+@rvalue RT_ERR_SMI | SMI access error.
-+@rvalue RT_ERR_INPUT | Invalid input value.
-+@comm
-+    The API can turn on/off led serial mode and set signal to active high/low.
-+ */
-+ret_t rtl8367c_setAsicLedOperationMode(rtk_uint32 mode)
-+{
-+    ret_t retVal;
-+
-+    /* Invalid input parameter */
-+    if( mode >= LEDOP_END)
-+        return RT_ERR_INPUT;
-+
-+    switch(mode)
-+    {
-+        case LEDOP_PARALLEL:
-+            if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_LED_SYS_CONFIG, RTL8367C_LED_SELECT_OFFSET, 0))!=  RT_ERR_OK)
-+                return retVal;
-+            /*Disable serial CLK mode*/
-+            if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SCAN0_LED_IO_EN1,RTL8367C_LED_SERI_CLK_EN_OFFSET, 0))!=  RT_ERR_OK)
-+                return retVal;
-+            /*Disable serial DATA mode*/
-+            if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SCAN0_LED_IO_EN1,RTL8367C_LED_SERI_DATA_EN_OFFSET, 0))!=  RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case LEDOP_SERIAL:
-+            if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_LED_SYS_CONFIG, RTL8367C_LED_SELECT_OFFSET, 1))!=  RT_ERR_OK)
-+                return retVal;
-+            /*Enable serial CLK mode*/
-+            if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SCAN0_LED_IO_EN1,RTL8367C_LED_SERI_CLK_EN_OFFSET, 1))!=  RT_ERR_OK)
-+                return retVal;
-+            /*Enable serial DATA mode*/
-+            if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SCAN0_LED_IO_EN1,RTL8367C_LED_SERI_DATA_EN_OFFSET, 1))!=  RT_ERR_OK)
-+                return retVal;
-+            break;
-+        default:
-+            return RT_ERR_INPUT;
-+            break;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/*
-+@func ret_t | rtl8367c_getAsicLedOperationMode | Get LED OP mode setup
-+@parm rtk_uint32*| mode | LED mode. 1:scan mode 1, 2:parallel mode, 3:mdx mode (serial mode)
-+@rvalue RT_ERR_OK | Success.
-+@rvalue RT_ERR_SMI | SMI access error.
-+@rvalue RT_ERR_INPUT | Invalid input value.
-+@comm
-+    The API can get LED serial mode setup and get signal active high/low.
-+ */
-+ret_t rtl8367c_getAsicLedOperationMode(rtk_uint32 *mode)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_LED_SYS_CONFIG, RTL8367C_LED_SELECT_OFFSET, &regData))!=  RT_ERR_OK)
-+        return retVal;
-+
-+    if (regData == 1)
-+        *mode = LEDOP_SERIAL;
-+    else if (regData == 0)
-+        *mode = LEDOP_PARALLEL;
-+    else
-+        return RT_ERR_FAILED;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/*
-+@func ret_t | rtl8367c_setAsicLedSerialModeConfig | Set LED serial mode
-+@parm rtk_uint32 | active | Active High or Low.
-+@rvalue RT_ERR_OK | Success.
-+@rvalue RT_ERR_SMI | SMI access error.
-+@rvalue RT_ERR_INPUT | Invalid input value.
-+@comm
-+    The API can turn on/off led serial mode and set signal to active high/low.
-+ */
-+ret_t rtl8367c_setAsicLedSerialModeConfig(rtk_uint32 active, rtk_uint32 serimode)
-+{
-+    ret_t retVal;
-+
-+    /* Invalid input parameter */
-+    if( active >= LEDSERACT_MAX)
-+        return RT_ERR_INPUT;
-+    if( serimode >= LEDSER_MAX)
-+        return RT_ERR_INPUT;
-+
-+    /* Set Active High or Low */
-+    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_LED_SYS_CONFIG, RTL8367C_SERI_LED_ACT_LOW_OFFSET, active)) !=  RT_ERR_OK)
-+        return retVal;
-+
-+    /*set to 8G mode (not 16G mode)*/
-+    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_LED_MODE, RTL8367C_DLINK_TIME_OFFSET, serimode))!=  RT_ERR_OK)
-+        return retVal;
-+
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/*
-+@func ret_t | rtl8367c_getAsicLedSerialModeConfig | Get LED serial mode setup
-+@parm rtk_uint32*| active | Active High or Low.
-+@rvalue RT_ERR_OK | Success.
-+@rvalue RT_ERR_SMI | SMI access error.
-+@rvalue RT_ERR_INPUT | Invalid input value.
-+@comm
-+    The API can get LED serial mode setup and get signal active high/low.
-+ */
-+ret_t rtl8367c_getAsicLedSerialModeConfig(rtk_uint32 *active, rtk_uint32 *serimode)
-+{
-+    ret_t retVal;
-+
-+    if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_LED_SYS_CONFIG, RTL8367C_SERI_LED_ACT_LOW_OFFSET, active))!=  RT_ERR_OK)
-+        return retVal;
-+
-+    /*get to 8G mode (not 16G mode)*/
-+    if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_LED_MODE, RTL8367C_DLINK_TIME_OFFSET, serimode))!=  RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/*
-+@func ret_t | rtl8367c_setAsicLedOutputEnable | Set LED output enable
-+@parm rtk_uint32 | enabled | enable or disalbe.
-+@rvalue RT_ERR_OK | Success.
-+@rvalue RT_ERR_SMI | SMI access error.
-+@rvalue RT_ERR_INPUT | Invalid input value.
-+@comm
-+    The API can turn on/off LED output Enable
-+ */
-+ret_t rtl8367c_setAsicLedOutputEnable(rtk_uint32 enabled)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regdata;
-+
-+    if (enabled == 1)
-+        regdata = 0;
-+    else
-+        regdata = 1;
-+
-+    /* Enable/Disable H/W IGMP/MLD */
-+    retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_LED_SYS_CONFIG, RTL8367C_LED_IO_DISABLE_OFFSET, regdata);
-+
-+    return retVal;
-+}
-+
-+
-+/*
-+@func ret_t | rtl8367c_getAsicLedOutputEnable | Get LED serial mode setup
-+@parm rtk_uint32*| active | Active High or Low.
-+@rvalue RT_ERR_OK | Success.
-+@rvalue RT_ERR_SMI | SMI access error.
-+@rvalue RT_ERR_INPUT | Invalid input value.
-+@comm
-+    The API can get LED serial mode setup and get signal active high/low.
-+ */
-+ret_t rtl8367c_getAsicLedOutputEnable(rtk_uint32 *ptr_enabled)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regdata;
-+
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_LED_SYS_CONFIG, RTL8367C_LED_IO_DISABLE_OFFSET, &regdata);
-+    if (retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    if (regdata == 1)
-+        *ptr_enabled = 0;
-+    else
-+        *ptr_enabled = 1;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicLedSerialOutput
-+ * Description:
-+ *      Set serial LED output group and portmask.
-+ * Input:
-+ *      output      - Serial LED output group
-+ *      pmask       - Serial LED output portmask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLedSerialOutput(rtk_uint32 output, rtk_uint32 pmask)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_SERIAL_LED_CTRL, RTL8367C_SERIAL_LED_GROUP_NUM_MASK, output);
-+    if (retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_SERIAL_LED_CTRL, RTL8367C_SERIAL_LED_PORT_EN_MASK, pmask);
-+    if (retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicLedSerialOutput
-+ * Description:
-+ *      Get serial LED output group and portmask.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pOutput      - Serial LED output group
-+ *      pPmask       - Serial LED output portmask
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLedSerialOutput(rtk_uint32 *pOutput, rtk_uint32 *pPmask)
-+{
-+    ret_t retVal;
-+
-+    if(pOutput == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(pPmask == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_SERIAL_LED_CTRL, RTL8367C_SERIAL_LED_GROUP_NUM_MASK, pOutput);
-+    if (retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_SERIAL_LED_CTRL, RTL8367C_SERIAL_LED_PORT_EN_MASK, pPmask);
-+    if (retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_lut.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_lut.c
-new file mode 100644
-index 0000000000..343a6f159c
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_lut.c
-@@ -0,0 +1,1549 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : LUT related functions
-+ *
-+ */
-+
-+#include <rtl8367c_asicdrv_lut.h>
-+
-+#include <string.h>
-+
-+static void _rtl8367c_fdbStUser2Smi( rtl8367c_luttb *pLutSt, rtk_uint16 *pFdbSmi)
-+{
-+    /* L3 lookup */
-+    if(pLutSt->l3lookup)
-+    {
-+        if(pLutSt->l3vidlookup)
-+        {
-+            pFdbSmi[0] = (pLutSt->sip & 0x0000FFFF);
-+            pFdbSmi[1] = (pLutSt->sip & 0xFFFF0000) >> 16;
-+
-+            pFdbSmi[2] = (pLutSt->dip & 0x0000FFFF);
-+            pFdbSmi[3] = (pLutSt->dip & 0x0FFF0000) >> 16;
-+
-+            pFdbSmi[3] |= (pLutSt->l3lookup & 0x0001) << 12;
-+            pFdbSmi[3] |= (pLutSt->l3vidlookup & 0x0001) << 13;
-+            pFdbSmi[3] |= ((pLutSt->mbr & 0x0300) >> 8) << 14;
-+
-+            pFdbSmi[4] |= (pLutSt->mbr & 0x00FF);
-+            pFdbSmi[4] |= (pLutSt->l3_vid & 0x00FF) << 8;
-+
-+            pFdbSmi[5] |= ((pLutSt->l3_vid & 0x0F00) >> 8);
-+            pFdbSmi[5] |= (pLutSt->nosalearn & 0x0001) << 5;
-+            pFdbSmi[5] |= ((pLutSt->mbr & 0x0400) >> 10) << 7;
-+        }
-+        else
-+        {
-+            pFdbSmi[0] = (pLutSt->sip & 0x0000FFFF);
-+            pFdbSmi[1] = (pLutSt->sip & 0xFFFF0000) >> 16;
-+
-+            pFdbSmi[2] = (pLutSt->dip & 0x0000FFFF);
-+            pFdbSmi[3] = (pLutSt->dip & 0x0FFF0000) >> 16;
-+
-+            pFdbSmi[3] |= (pLutSt->l3lookup & 0x0001) << 12;
-+            pFdbSmi[3] |= (pLutSt->l3vidlookup & 0x0001) << 13;
-+            pFdbSmi[3] |= ((pLutSt->mbr & 0x0300) >> 8) << 14;
-+
-+            pFdbSmi[4] |= (pLutSt->mbr & 0x00FF);
-+            pFdbSmi[4] |= (pLutSt->igmpidx & 0x00FF) << 8;
-+
-+            pFdbSmi[5] |= (pLutSt->igmp_asic & 0x0001);
-+            pFdbSmi[5] |= (pLutSt->lut_pri & 0x0007) << 1;
-+            pFdbSmi[5] |= (pLutSt->fwd_en & 0x0001) << 4;
-+            pFdbSmi[5] |= (pLutSt->nosalearn & 0x0001) << 5;
-+            pFdbSmi[5] |= ((pLutSt->mbr & 0x0400) >> 10) << 7;
-+        }
-+    }
-+    else if(pLutSt->mac.octet[0] & 0x01) /*Multicast L2 Lookup*/
-+    {
-+        pFdbSmi[0] |= pLutSt->mac.octet[5];
-+        pFdbSmi[0] |= pLutSt->mac.octet[4] << 8;
-+
-+        pFdbSmi[1] |= pLutSt->mac.octet[3];
-+        pFdbSmi[1] |= pLutSt->mac.octet[2] << 8;
-+
-+        pFdbSmi[2] |= pLutSt->mac.octet[1];
-+        pFdbSmi[2] |= pLutSt->mac.octet[0] << 8;
-+
-+        pFdbSmi[3] |= pLutSt->cvid_fid;
-+        pFdbSmi[3] |= (pLutSt->l3lookup & 0x0001) << 12;
-+        pFdbSmi[3] |= (pLutSt->ivl_svl & 0x0001) << 13;
-+        pFdbSmi[3] |= ((pLutSt->mbr & 0x0300) >> 8) << 14;
-+
-+        pFdbSmi[4] |= (pLutSt->mbr & 0x00FF);
-+        pFdbSmi[4] |= (pLutSt->igmpidx & 0x00FF) << 8;
-+
-+        pFdbSmi[5] |= pLutSt->igmp_asic;
-+        pFdbSmi[5] |= (pLutSt->lut_pri & 0x0007) << 1;
-+        pFdbSmi[5] |= (pLutSt->fwd_en & 0x0001) << 4;
-+        pFdbSmi[5] |= (pLutSt->nosalearn & 0x0001) << 5;
-+        pFdbSmi[5] |= ((pLutSt->mbr & 0x0400) >> 10) << 7;
-+    }
-+    else /*Asic auto-learning*/
-+    {
-+        pFdbSmi[0] |= pLutSt->mac.octet[5];
-+        pFdbSmi[0] |= pLutSt->mac.octet[4] << 8;
-+
-+        pFdbSmi[1] |= pLutSt->mac.octet[3];
-+        pFdbSmi[1] |= pLutSt->mac.octet[2] << 8;
-+
-+        pFdbSmi[2] |= pLutSt->mac.octet[1];
-+        pFdbSmi[2] |= pLutSt->mac.octet[0] << 8;
-+
-+        pFdbSmi[3] |= pLutSt->cvid_fid;
-+        pFdbSmi[3] |= (pLutSt->l3lookup & 0x0001) << 12;
-+        pFdbSmi[3] |= (pLutSt->ivl_svl & 0x0001) << 13;
-+        pFdbSmi[3] |= ((pLutSt->spa & 0x0008) >> 3) << 15;
-+
-+        pFdbSmi[4] |= pLutSt->efid;
-+        pFdbSmi[4] |= (pLutSt->fid & 0x000F) << 3;
-+        pFdbSmi[4] |= (pLutSt->sa_en & 0x0001) << 7;
-+        pFdbSmi[4] |= (pLutSt->spa & 0x0007) << 8;
-+        pFdbSmi[4] |= (pLutSt->age & 0x0007) << 11;
-+        pFdbSmi[4] |= (pLutSt->auth & 0x0001) << 14;
-+        pFdbSmi[4] |= (pLutSt->sa_block & 0x0001) << 15;
-+
-+        pFdbSmi[5] |= pLutSt->da_block;
-+        pFdbSmi[5] |= (pLutSt->lut_pri & 0x0007) << 1;
-+        pFdbSmi[5] |= (pLutSt->fwd_en & 0x0001) << 4;
-+        pFdbSmi[5] |= (pLutSt->nosalearn & 0x0001) << 5;
-+    }
-+}
-+
-+
-+static void _rtl8367c_fdbStSmi2User( rtl8367c_luttb *pLutSt, rtk_uint16 *pFdbSmi)
-+{
-+    /*L3 lookup*/
-+    if(pFdbSmi[3] & 0x1000)
-+    {
-+        if(pFdbSmi[3] & 0x2000)
-+        {
-+            pLutSt->sip             = pFdbSmi[0] | (pFdbSmi[1] << 16);
-+            pLutSt->dip             = pFdbSmi[2] | ((pFdbSmi[3] & 0x0FFF) << 16);
-+
-+            pLutSt->mbr             = (pFdbSmi[4] & 0x00FF) | (((pFdbSmi[3] & 0xC000) >> 14) << 8) | (((pFdbSmi[5] & 0x0080) >> 7) << 10);
-+            pLutSt->l3_vid          = ((pFdbSmi[4] & 0xFF00) >> 8) | (pFdbSmi[5] & 0x000F);
-+
-+            pLutSt->l3lookup        = (pFdbSmi[3] & 0x1000) >> 12;
-+            pLutSt->l3vidlookup     = (pFdbSmi[3] & 0x2000) >> 13;
-+            pLutSt->nosalearn       = (pFdbSmi[5] & 0x0020) >> 5;
-+        }
-+        else
-+        {
-+            pLutSt->sip             = pFdbSmi[0] | (pFdbSmi[1] << 16);
-+            pLutSt->dip             = pFdbSmi[2] | ((pFdbSmi[3] & 0x0FFF) << 16);
-+
-+            pLutSt->lut_pri         = (pFdbSmi[5] & 0x000E) >> 1;
-+            pLutSt->fwd_en          = (pFdbSmi[5] & 0x0010) >> 4;
-+
-+            pLutSt->mbr             = (pFdbSmi[4] & 0x00FF) | (((pFdbSmi[3] & 0xC000) >> 14) << 8) | (((pFdbSmi[5] & 0x0080) >> 7) << 10);
-+            pLutSt->igmpidx         = (pFdbSmi[4] & 0xFF00) >> 8;
-+
-+            pLutSt->igmp_asic       = (pFdbSmi[5] & 0x0001);
-+            pLutSt->l3lookup        = (pFdbSmi[3] & 0x1000) >> 12;
-+            pLutSt->nosalearn       = (pFdbSmi[5] & 0x0020) >> 5;
-+        }
-+    }
-+    else if(pFdbSmi[2] & 0x0100) /*Multicast L2 Lookup*/
-+    {
-+        pLutSt->mac.octet[0]    = (pFdbSmi[2] & 0xFF00) >> 8;
-+        pLutSt->mac.octet[1]    = (pFdbSmi[2] & 0x00FF);
-+        pLutSt->mac.octet[2]    = (pFdbSmi[1] & 0xFF00) >> 8;
-+        pLutSt->mac.octet[3]    = (pFdbSmi[1] & 0x00FF);
-+        pLutSt->mac.octet[4]    = (pFdbSmi[0] & 0xFF00) >> 8;
-+        pLutSt->mac.octet[5]    = (pFdbSmi[0] & 0x00FF);
-+
-+        pLutSt->cvid_fid        = pFdbSmi[3] & 0x0FFF;
-+        pLutSt->lut_pri         = (pFdbSmi[5] & 0x000E) >> 1;
-+        pLutSt->fwd_en          = (pFdbSmi[5] & 0x0010) >> 4;
-+
-+        pLutSt->mbr             = (pFdbSmi[4] & 0x00FF) | (((pFdbSmi[3] & 0xC000) >> 14) << 8) | (((pFdbSmi[5] & 0x0080) >> 7) << 10);
-+        pLutSt->igmpidx         = (pFdbSmi[4] & 0xFF00) >> 8;
-+
-+        pLutSt->igmp_asic       = (pFdbSmi[5] & 0x0001);
-+        pLutSt->l3lookup        = (pFdbSmi[3] & 0x1000) >> 12;
-+        pLutSt->ivl_svl         = (pFdbSmi[3] & 0x2000) >> 13;
-+        pLutSt->nosalearn       = (pFdbSmi[5] & 0x0020) >> 5;
-+    }
-+    else /*Asic auto-learning*/
-+    {
-+        pLutSt->mac.octet[0]    = (pFdbSmi[2] & 0xFF00) >> 8;
-+        pLutSt->mac.octet[1]    = (pFdbSmi[2] & 0x00FF);
-+        pLutSt->mac.octet[2]    = (pFdbSmi[1] & 0xFF00) >> 8;
-+        pLutSt->mac.octet[3]    = (pFdbSmi[1] & 0x00FF);
-+        pLutSt->mac.octet[4]    = (pFdbSmi[0] & 0xFF00) >> 8;
-+        pLutSt->mac.octet[5]    = (pFdbSmi[0] & 0x00FF);
-+
-+        pLutSt->cvid_fid        = pFdbSmi[3] & 0x0FFF;
-+        pLutSt->lut_pri         = (pFdbSmi[5] & 0x000E) >> 1;
-+        pLutSt->fwd_en          = (pFdbSmi[5] & 0x0010) >> 4;
-+
-+        pLutSt->sa_en           = (pFdbSmi[4] & 0x0080) >> 7;
-+        pLutSt->auth            = (pFdbSmi[4] & 0x4000) >> 14;
-+        pLutSt->spa             = ((pFdbSmi[4] & 0x0700) >> 8) | (((pFdbSmi[3] & 0x8000) >> 15) << 3);
-+        pLutSt->age             = (pFdbSmi[4] & 0x3800) >> 11;
-+        pLutSt->fid             = (pFdbSmi[4] & 0x0078) >> 3;
-+        pLutSt->efid            = (pFdbSmi[4] & 0x0007);
-+        pLutSt->sa_block        = (pFdbSmi[4] & 0x8000) >> 15;
-+
-+        pLutSt->da_block        = (pFdbSmi[5] & 0x0001);
-+        pLutSt->l3lookup        = (pFdbSmi[3] & 0x1000) >> 12;
-+        pLutSt->ivl_svl         = (pFdbSmi[3] & 0x2000) >> 13;
-+        pLutSt->nosalearn       = (pFdbSmi[3] & 0x0020) >> 5;
-+    }
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicLutIpMulticastLookup
-+ * Description:
-+ *      Set Lut IP multicast lookup function
-+ * Input:
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLutIpMulticastLookup(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_LUT_CFG, RTL8367C_LUT_IPMC_HASH_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLutIpMulticastLookup
-+ * Description:
-+ *      Get Lut IP multicast lookup function
-+ * Input:
-+ *      pEnabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLutIpMulticastLookup(rtk_uint32* pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_LUT_CFG, RTL8367C_LUT_IPMC_HASH_OFFSET, pEnabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicLutIpMulticastLookup
-+ * Description:
-+ *      Set Lut IP multicast + VID lookup function
-+ * Input:
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLutIpMulticastVidLookup(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_LUT_CFG2, RTL8367C_LUT_IPMC_VID_HASH_OFFSET, enabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicLutIpMulticastVidLookup
-+ * Description:
-+ *      Get Lut IP multicast lookup function
-+ * Input:
-+ *      pEnabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLutIpMulticastVidLookup(rtk_uint32* pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_LUT_CFG2, RTL8367C_LUT_IPMC_VID_HASH_OFFSET, pEnabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicLutIpLookupMethod
-+ * Description:
-+ *      Set Lut IP lookup hash with DIP or {DIP,SIP} pair
-+ * Input:
-+ *      type - 1: When DIP can be found in IPMC_GROUP_TABLE, use DIP+SIP Hash, otherwise, use DIP+(SIP=0.0.0.0) Hash.
-+ *             0: When DIP can be found in IPMC_GROUP_TABLE, use DIP+(SIP=0.0.0.0) Hash, otherwise use DIP+SIP Hash.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLutIpLookupMethod(rtk_uint32 type)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_LUT_CFG, RTL8367C_LUT_IPMC_LOOKUP_OP_OFFSET, type);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLutIpLookupMethod
-+ * Description:
-+ *      Get Lut IP lookup hash with DIP or {DIP,SIP} pair
-+ * Input:
-+ *      pType - 1: When DIP can be found in IPMC_GROUP_TABLE, use DIP+SIP Hash, otherwise, use DIP+(SIP=0.0.0.0) Hash.
-+ *              0: When DIP can be found in IPMC_GROUP_TABLE, use DIP+(SIP=0.0.0.0) Hash, otherwise use DIP+SIP Hash.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLutIpLookupMethod(rtk_uint32* pType)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_LUT_CFG, RTL8367C_LUT_IPMC_LOOKUP_OP_OFFSET, pType);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicLutAgeTimerSpeed
-+ * Description:
-+ *      Set LUT agging out speed
-+ * Input:
-+ *      timer - Agging out timer 0:Has been aged out
-+ *      speed - Agging out speed 0-fastest 3-slowest
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLutAgeTimerSpeed(rtk_uint32 timer, rtk_uint32 speed)
-+{
-+    if(timer>RTL8367C_LUT_AGETIMERMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(speed >RTL8367C_LUT_AGESPEEDMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_LUT_CFG, RTL8367C_AGE_TIMER_MASK | RTL8367C_AGE_SPEED_MASK, (timer << RTL8367C_AGE_TIMER_OFFSET) | (speed << RTL8367C_AGE_SPEED_OFFSET));
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLutAgeTimerSpeed
-+ * Description:
-+ *      Get LUT agging out speed
-+ * Input:
-+ *      pTimer - Agging out timer 0:Has been aged out
-+ *      pSpeed - Agging out speed 0-fastest 3-slowest
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLutAgeTimerSpeed(rtk_uint32* pTimer, rtk_uint32* pSpeed)
-+{
-+    rtk_uint32 regData;
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_LUT_CFG, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *pTimer =  (regData & RTL8367C_AGE_TIMER_MASK) >> RTL8367C_AGE_TIMER_OFFSET;
-+
-+    *pSpeed =  (regData & RTL8367C_AGE_SPEED_MASK) >> RTL8367C_AGE_SPEED_OFFSET;
-+
-+    return RT_ERR_OK;
-+
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicLutCamTbUsage
-+ * Description:
-+ *      Configure Lut CAM table usage
-+ * Input:
-+ *      enabled - L2 CAM table usage 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLutCamTbUsage(rtk_uint32 enabled)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_LUT_CFG, RTL8367C_BCAM_DISABLE_OFFSET, enabled ? 0 : 1);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLutCamTbUsage
-+ * Description:
-+ *      Get Lut CAM table usage
-+ * Input:
-+ *      pEnabled - L2 CAM table usage 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLutCamTbUsage(rtk_uint32* pEnabled)
-+{
-+    ret_t       retVal;
-+    rtk_uint32  regData;
-+
-+    if ((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_LUT_CFG, RTL8367C_BCAM_DISABLE_OFFSET, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pEnabled = regData ? 0 : 1;
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicLutLearnLimitNo
-+ * Description:
-+ *      Set per-Port auto learning limit number
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      number  - ASIC auto learning entries limit number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number
-+ *      RT_ERR_LIMITED_L2ENTRY_NUM  - Invalid auto learning limit number
-+ * Note:
-+ *      None
-+ */
-+   /*ÐÞ¸Ä: RTL8367C_PORTIDMAX, RTL8367C_LUT_LEARNLIMITMAX, RTL8367C_LUT_PORT_LEARN_LIMITNO_REG*/
-+ret_t rtl8367c_setAsicLutLearnLimitNo(rtk_uint32 port, rtk_uint32 number)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(number > RTL8367C_LUT_LEARNLIMITMAX)
-+        return RT_ERR_LIMITED_L2ENTRY_NUM;
-+
-+    if(port < 8)
-+     return rtl8367c_setAsicReg(RTL8367C_LUT_PORT_LEARN_LIMITNO_REG(port), number);
-+    else
-+        return rtl8367c_setAsicReg(RTL8367C_REG_LUT_PORT8_LEARN_LIMITNO+port-8, number);
-+
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLutLearnLimitNo
-+ * Description:
-+ *      Get per-Port auto learning limit number
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pNumber     - ASIC auto learning entries limit number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+  /*ÐÞ¸Ä: RTL8367C_PORTIDMAX, RTL8367C_LUT_PORT_LEARN_LIMITNO_REG*/
-+ret_t rtl8367c_getAsicLutLearnLimitNo(rtk_uint32 port, rtk_uint32* pNumber)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+     return rtl8367c_getAsicReg(RTL8367C_LUT_PORT_LEARN_LIMITNO_REG(port), pNumber);
-+    else
-+        return rtl8367c_getAsicReg(RTL8367C_REG_LUT_PORT8_LEARN_LIMITNO+port-8, pNumber);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicSystemLutLearnLimitNo
-+ * Description:
-+ *      Set system auto learning limit number
-+ * Input:
-+ *      number  - ASIC auto learning entries limit number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number
-+ *      RT_ERR_LIMITED_L2ENTRY_NUM  - Invalid auto learning limit number
-+ * Note:
-+ *      None
-+ */
-+  /*ÐÞ¸Ä: RTL8367C_LUT_LEARNLIMITMAX*/
-+ret_t rtl8367c_setAsicSystemLutLearnLimitNo(rtk_uint32 number)
-+{
-+    if(number > RTL8367C_LUT_LEARNLIMITMAX)
-+        return RT_ERR_LIMITED_L2ENTRY_NUM;
-+
-+    return rtl8367c_setAsicReg(RTL8367C_REG_LUT_SYS_LEARN_LIMITNO, number);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicSystemLutLearnLimitNo
-+ * Description:
-+ *      Get system auto learning limit number
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pNumber     - ASIC auto learning entries limit number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSystemLutLearnLimitNo(rtk_uint32 *pNumber)
-+{
-+    if(NULL == pNumber)
-+        return RT_ERR_NULL_POINTER;
-+
-+    return rtl8367c_getAsicReg(RTL8367C_REG_LUT_SYS_LEARN_LIMITNO, pNumber);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicLutLearnOverAct
-+ * Description:
-+ *      Set auto learn over limit number action
-+ * Input:
-+ *      action  - Learn over action 0:normal, 1:drop 2:trap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NOT_ALLOWED  - Invalid learn over action
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLutLearnOverAct(rtk_uint32 action)
-+{
-+    if(action >= LRNOVERACT_END)
-+        return RT_ERR_NOT_ALLOWED;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_PORT_SECURITY_CTRL, RTL8367C_LUT_LEARN_OVER_ACT_MASK, action);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLutLearnOverAct
-+ * Description:
-+ *      Get auto learn over limit number action
-+ * Input:
-+ *      pAction     - Learn over action 0:normal, 1:drop 2:trap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLutLearnOverAct(rtk_uint32* pAction)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_PORT_SECURITY_CTRL, RTL8367C_LUT_LEARN_OVER_ACT_MASK, pAction);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicSystemLutLearnOverAct
-+ * Description:
-+ *      Set system auto learn over limit number action
-+ * Input:
-+ *      action  - Learn over action 0:normal, 1:drop, 2:trap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NOT_ALLOWED  - Invalid learn over action
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicSystemLutLearnOverAct(rtk_uint32 action)
-+{
-+    if(action >= LRNOVERACT_END)
-+        return RT_ERR_NOT_ALLOWED;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_LUT_LRN_SYS_LMT_CTRL, RTL8367C_LUT_SYSTEM_LEARN_OVER_ACT_MASK, action);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicSystemLutLearnOverAct
-+ * Description:
-+ *      Get system auto learn over limit number action
-+ * Input:
-+ *      pAction     - Learn over action 0:normal, 1:drop 2:trap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSystemLutLearnOverAct(rtk_uint32 *pAction)
-+{
-+    if(NULL == pAction)
-+        return RT_ERR_NULL_POINTER;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_LUT_LRN_SYS_LMT_CTRL, RTL8367C_LUT_SYSTEM_LEARN_OVER_ACT_MASK, pAction);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicSystemLutLearnPortMask
-+ * Description:
-+ *      Set system auto learn limit port mask
-+ * Input:
-+ *      portmask    - port mask of system learning limit
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Error port mask
-+ * Note:
-+ *      None
-+ */
-+  /*ÐÞ¸Ä: RTL8367C_LUT_SYSTEM_LEARN_PMASK_MASK*/
-+ret_t rtl8367c_setAsicSystemLutLearnPortMask(rtk_uint32 portmask)
-+{
-+    ret_t retVal;
-+
-+    if(portmask > RTL8367C_PORTMASK)
-+        return RT_ERR_PORT_MASK;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_LUT_LRN_SYS_LMT_CTRL, RTL8367C_LUT_SYSTEM_LEARN_PMASK_MASK, portmask & 0xff);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_LUT_LRN_SYS_LMT_CTRL, RTL8367C_LUT_SYSTEM_LEARN_PMASK1_MASK, (portmask>>8) & 0x7);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicSystemLutLearnPortMask
-+ * Description:
-+ *      Get system auto learn limit port mask
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pPortmask   - port mask of system learning limit
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NULL_POINTER - NULL pointer
-+ * Note:
-+ *      None
-+ */
-+ /*ÐÞ¸Ä: RTL8367C_LUT_SYSTEM_LEARN_PMASK_MASK*/
-+ret_t rtl8367c_getAsicSystemLutLearnPortMask(rtk_uint32 *pPortmask)
-+{
-+    rtk_uint32 tmpmask;
-+    ret_t retVal;
-+
-+    if(NULL == pPortmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_LUT_LRN_SYS_LMT_CTRL, RTL8367C_LUT_SYSTEM_LEARN_PMASK_MASK, &tmpmask);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+    *pPortmask = tmpmask & 0xff;
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_LUT_LRN_SYS_LMT_CTRL, RTL8367C_LUT_SYSTEM_LEARN_PMASK1_MASK, &tmpmask);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+    *pPortmask |= (tmpmask & 0x7) << 8;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicL2LookupTb
-+ * Description:
-+ *      Set filtering database entry
-+ * Input:
-+ *      pL2Table    - L2 table entry writing to 8K+64 filtering database
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicL2LookupTb(rtl8367c_luttb *pL2Table)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint16 *accessPtr;
-+    rtk_uint32 i;
-+    rtk_uint16 smil2Table[RTL8367C_LUT_TABLE_SIZE];
-+    rtk_uint32 tblCmd;
-+    rtk_uint32 busyCounter;
-+
-+    memset(smil2Table, 0x00, sizeof(rtk_uint16) * RTL8367C_LUT_TABLE_SIZE);
-+    _rtl8367c_fdbStUser2Smi(pL2Table, smil2Table);
-+
-+    if(pL2Table->wait_time == 0)
-+        busyCounter = RTL8367C_LUT_BUSY_CHECK_NO;
-+    else
-+        busyCounter = pL2Table->wait_time;
-+
-+    while(busyCounter)
-+    {
-+        retVal = rtl8367c_getAsicRegBit(RTL8367C_TABLE_ACCESS_STATUS_REG, RTL8367C_TABLE_LUT_ADDR_BUSY_FLAG_OFFSET,&regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        pL2Table->lookup_busy = regData;
-+        if(!regData)
-+            break;
-+
-+        busyCounter --;
-+        if(busyCounter == 0)
-+            return RT_ERR_BUSYWAIT_TIMEOUT;
-+    }
-+
-+    accessPtr = smil2Table;
-+    regData = *accessPtr;
-+    for(i = 0; i < RTL8367C_LUT_ENTRY_SIZE; i++)
-+    {
-+        retVal = rtl8367c_setAsicReg(RTL8367C_TABLE_ACCESS_WRDATA_BASE + i, regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        accessPtr ++;
-+        regData = *accessPtr;
-+
-+    }
-+
-+    tblCmd = (RTL8367C_TABLE_ACCESS_REG_DATA(TB_OP_WRITE,TB_TARGET_L2)) & (RTL8367C_TABLE_TYPE_MASK  | RTL8367C_COMMAND_TYPE_MASK);
-+    /* Write Command */
-+    retVal = rtl8367c_setAsicReg(RTL8367C_TABLE_ACCESS_CTRL_REG, tblCmd);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    if(pL2Table->wait_time == 0)
-+        busyCounter = RTL8367C_LUT_BUSY_CHECK_NO;
-+    else
-+        busyCounter = pL2Table->wait_time;
-+
-+    while(busyCounter)
-+    {
-+        retVal = rtl8367c_getAsicRegBit(RTL8367C_TABLE_ACCESS_STATUS_REG, RTL8367C_TABLE_LUT_ADDR_BUSY_FLAG_OFFSET,&regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        pL2Table->lookup_busy = regData;
-+        if(!regData)
-+            break;
-+
-+        busyCounter --;
-+        if(busyCounter == 0)
-+            return RT_ERR_BUSYWAIT_TIMEOUT;
-+    }
-+
-+    /*Read access status*/
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_TABLE_ACCESS_STATUS_REG, RTL8367C_HIT_STATUS_OFFSET, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pL2Table->lookup_hit = regData;
-+    if(!pL2Table->lookup_hit)
-+        return RT_ERR_FAILED;
-+
-+    /*Read access address*/
-+    /*
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_TABLE_ACCESS_STATUS_REG, RTL8367C_TABLE_LUT_ADDR_TYPE_MASK | RTL8367C_TABLE_LUT_ADDR_ADDRESS_MASK,&regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pL2Table->address = regData;*/
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_TABLE_ACCESS_STATUS_REG, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pL2Table->address = (regData & 0x7ff) | ((regData & 0x4000) >> 3) | ((regData & 0x800) << 1);
-+    pL2Table->lookup_busy = 0;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicL2LookupTb
-+ * Description:
-+ *      Get filtering database entry
-+ * Input:
-+ *      pL2Table    - L2 table entry writing to 2K+64 filtering database
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameter
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - LUT is busy at retrieving
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicL2LookupTb(rtk_uint32 method, rtl8367c_luttb *pL2Table)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint16* accessPtr;
-+    rtk_uint32 i;
-+    rtk_uint16 smil2Table[RTL8367C_LUT_TABLE_SIZE];
-+    rtk_uint32 busyCounter;
-+    rtk_uint32 tblCmd;
-+
-+    if(pL2Table->wait_time == 0)
-+        busyCounter = RTL8367C_LUT_BUSY_CHECK_NO;
-+    else
-+        busyCounter = pL2Table->wait_time;
-+
-+    while(busyCounter)
-+    {
-+        retVal = rtl8367c_getAsicRegBit(RTL8367C_TABLE_ACCESS_STATUS_REG, RTL8367C_TABLE_LUT_ADDR_BUSY_FLAG_OFFSET,&regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        pL2Table->lookup_busy = regData;
-+        if(!pL2Table->lookup_busy)
-+            break;
-+
-+        busyCounter --;
-+        if(busyCounter == 0)
-+            return RT_ERR_BUSYWAIT_TIMEOUT;
-+    }
-+
-+
-+    tblCmd = (method << RTL8367C_ACCESS_METHOD_OFFSET) & RTL8367C_ACCESS_METHOD_MASK;
-+
-+    switch(method)
-+    {
-+        case LUTREADMETHOD_ADDRESS:
-+        case LUTREADMETHOD_NEXT_ADDRESS:
-+        case LUTREADMETHOD_NEXT_L2UC:
-+        case LUTREADMETHOD_NEXT_L2MC:
-+        case LUTREADMETHOD_NEXT_L3MC:
-+        case LUTREADMETHOD_NEXT_L2L3MC:
-+            retVal = rtl8367c_setAsicReg(RTL8367C_TABLE_ACCESS_ADDR_REG, pL2Table->address);
-+            if(retVal != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case LUTREADMETHOD_MAC:
-+            memset(smil2Table, 0x00, sizeof(rtk_uint16) * RTL8367C_LUT_TABLE_SIZE);
-+            _rtl8367c_fdbStUser2Smi(pL2Table, smil2Table);
-+
-+            accessPtr = smil2Table;
-+            regData = *accessPtr;
-+            for(i=0; i<RTL8367C_LUT_ENTRY_SIZE; i++)
-+            {
-+                retVal = rtl8367c_setAsicReg(RTL8367C_TABLE_ACCESS_WRDATA_BASE + i, regData);
-+                if(retVal != RT_ERR_OK)
-+                    return retVal;
-+
-+                accessPtr ++;
-+                regData = *accessPtr;
-+
-+            }
-+            break;
-+        case LUTREADMETHOD_NEXT_L2UCSPA:
-+            retVal = rtl8367c_setAsicReg(RTL8367C_TABLE_ACCESS_ADDR_REG, pL2Table->address);
-+            if(retVal != RT_ERR_OK)
-+                return retVal;
-+
-+            tblCmd = tblCmd | ((pL2Table->spa << RTL8367C_TABLE_ACCESS_CTRL_SPA_OFFSET) & RTL8367C_TABLE_ACCESS_CTRL_SPA_MASK);
-+
-+            break;
-+        default:
-+            return RT_ERR_INPUT;
-+    }
-+
-+    tblCmd = tblCmd | ((RTL8367C_TABLE_ACCESS_REG_DATA(TB_OP_READ,TB_TARGET_L2)) & (RTL8367C_TABLE_TYPE_MASK  | RTL8367C_COMMAND_TYPE_MASK));
-+    /* Read Command */
-+    retVal = rtl8367c_setAsicReg(RTL8367C_TABLE_ACCESS_CTRL_REG, tblCmd);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    if(pL2Table->wait_time == 0)
-+        busyCounter = RTL8367C_LUT_BUSY_CHECK_NO;
-+    else
-+        busyCounter = pL2Table->wait_time;
-+
-+    while(busyCounter)
-+    {
-+        retVal = rtl8367c_getAsicRegBit(RTL8367C_TABLE_ACCESS_STATUS_REG, RTL8367C_TABLE_LUT_ADDR_BUSY_FLAG_OFFSET,&regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        pL2Table->lookup_busy = regData;
-+        if(!pL2Table->lookup_busy)
-+            break;
-+
-+        busyCounter --;
-+        if(busyCounter == 0)
-+            return RT_ERR_BUSYWAIT_TIMEOUT;
-+    }
-+
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_TABLE_ACCESS_STATUS_REG, RTL8367C_HIT_STATUS_OFFSET,&regData);
-+    if(retVal != RT_ERR_OK)
-+            return retVal;
-+    pL2Table->lookup_hit = regData;
-+    if(!pL2Table->lookup_hit)
-+        return RT_ERR_L2_ENTRY_NOTFOUND;
-+
-+    /*Read access address*/
-+    //retVal = rtl8367c_getAsicRegBits(RTL8367C_TABLE_ACCESS_STATUS_REG, RTL8367C_TABLE_LUT_ADDR_TYPE_MASK | RTL8367C_TABLE_LUT_ADDR_ADDRESS_MASK,&regData);
-+    retVal = rtl8367c_getAsicReg(RTL8367C_TABLE_ACCESS_STATUS_REG, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pL2Table->address = (regData & 0x7ff) | ((regData & 0x4000) >> 3) | ((regData & 0x800) << 1);
-+
-+    /*read L2 entry */
-+    memset(smil2Table, 0x00, sizeof(rtk_uint16) * RTL8367C_LUT_TABLE_SIZE);
-+
-+    accessPtr = smil2Table;
-+
-+    for(i = 0; i < RTL8367C_LUT_ENTRY_SIZE; i++)
-+    {
-+        retVal = rtl8367c_getAsicReg(RTL8367C_TABLE_ACCESS_RDDATA_BASE + i, &regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        *accessPtr = regData;
-+
-+        accessPtr ++;
-+    }
-+
-+    _rtl8367c_fdbStSmi2User(pL2Table, smil2Table);
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLutLearnNo
-+ * Description:
-+ *      Get per-Port auto learning number
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pNumber     - ASIC auto learning entries number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ /*ÐÞ¸ÄRTL8367C_PORTIDMAX, RTL8367C_REG_L2_LRN_CNT_REG, port10 reg is not contnious, wait for updating of base.h*/
-+ret_t rtl8367c_getAsicLutLearnNo(rtk_uint32 port, rtk_uint32* pNumber)
-+{
-+    ret_t retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 10)
-+    {
-+     retVal = rtl8367c_getAsicReg(RTL8367C_REG_L2_LRN_CNT_REG(port), pNumber);
-+        if (retVal != RT_ERR_OK)
-+         return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_getAsicReg(RTL8367C_REG_L2_LRN_CNT_CTRL10, pNumber);
-+        if (retVal != RT_ERR_OK)
-+         return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicLutFlushAll
-+ * Description:
-+ *      Flush all entries in LUT. Includes static & dynamic entries
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLutFlushAll(void)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_L2_FLUSH_CTRL3, RTL8367C_L2_FLUSH_CTRL3_OFFSET, 1);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicLutFlushAllStatus
-+ * Description:
-+ *      Get Flush all status, 1:Busy, 0 normal
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pBusyStatus - Busy state
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NULL_POINTER - Null pointer
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLutFlushAllStatus(rtk_uint32 *pBusyStatus)
-+{
-+    if(NULL == pBusyStatus)
-+        return RT_ERR_NULL_POINTER;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_L2_FLUSH_CTRL3, RTL8367C_L2_FLUSH_CTRL3_OFFSET, pBusyStatus);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicLutForceFlush
-+ * Description:
-+ *      Set per port force flush setting
-+ * Input:
-+ *      portmask    - portmask(0~0xFF)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid portmask
-+ * Note:
-+ *      None
-+ */
-+ /*port8~port10µÄÉèÖÃÔÚÁíÍâÒ»¸öregister, wait for updating of base.h, reg.h*/
-+ret_t rtl8367c_setAsicLutForceFlush(rtk_uint32 portmask)
-+{
-+    ret_t retVal;
-+
-+    if(portmask > RTL8367C_PORTMASK)
-+        return RT_ERR_PORT_MASK;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_FORCE_FLUSH_REG, RTL8367C_FORCE_FLUSH_PORTMASK_MASK, portmask & 0xff);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FORCE_FLUSH1, RTL8367C_PORTMASK1_MASK, (portmask >> 8) & 0x7);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLutForceFlushStatus
-+ * Description:
-+ *      Get per port force flush status
-+ * Input:
-+ *      pPortmask   - portmask(0~0xFF)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ /*port8~port10µÄÉèÖÃÔÚÁíÍâÒ»¸öregister, wait for updating of base.h, reg.h*/
-+ret_t rtl8367c_getAsicLutForceFlushStatus(rtk_uint32 *pPortmask)
-+{
-+    rtk_uint32 tmpMask;
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_FORCE_FLUSH_REG, RTL8367C_BUSY_STATUS_MASK,&tmpMask);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+    *pPortmask = tmpMask & 0xff;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FORCE_FLUSH1, RTL8367C_BUSY_STATUS1_MASK,&tmpMask);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+    *pPortmask |= (tmpMask & 7) << 8;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicLutFlushMode
-+ * Description:
-+ *      Set user force L2 pLutSt table flush mode
-+ * Input:
-+ *      mode    - 0:Port based 1: Port + VLAN based 2:Port + FID/MSTI based
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NOT_ALLOWED  - Actions not allowed by the function
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLutFlushMode(rtk_uint32 mode)
-+{
-+    if( mode >= FLUSHMDOE_END )
-+        return RT_ERR_NOT_ALLOWED;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_L2_FLUSH_CTRL2, RTL8367C_LUT_FLUSH_MODE_MASK, mode);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLutFlushMode
-+ * Description:
-+ *      Get user force L2 pLutSt table flush mode
-+ * Input:
-+ *      pMode   - 0:Port based 1: Port + VLAN based 2:Port + FID/MSTI based
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLutFlushMode(rtk_uint32* pMode)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_L2_FLUSH_CTRL2, RTL8367C_LUT_FLUSH_MODE_MASK, pMode);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicLutFlushType
-+ * Description:
-+ *      Get L2 LUT flush type
-+ * Input:
-+ *      type    - 0: dynamice unicast; 1: both dynamic and static unicast entry
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLutFlushType(rtk_uint32 type)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_L2_FLUSH_CTRL2, RTL8367C_LUT_FLUSH_TYPE_OFFSET,type);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLutFlushType
-+ * Description:
-+ *      Set L2 LUT flush type
-+ * Input:
-+ *      pType   - 0: dynamice unicast; 1: both dynamic and static unicast entry
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLutFlushType(rtk_uint32* pType)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_L2_FLUSH_CTRL2, RTL8367C_LUT_FLUSH_TYPE_OFFSET,pType);
-+}
-+
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicLutFlushVid
-+ * Description:
-+ *      Set VID of Port + VID pLutSt flush mode
-+ * Input:
-+ *      vid     - Vid (0~4095)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_VLAN_VID - Invalid VID parameter (0~4095)
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLutFlushVid(rtk_uint32 vid)
-+{
-+    if( vid > RTL8367C_VIDMAX )
-+        return RT_ERR_VLAN_VID;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_L2_FLUSH_CTRL1, RTL8367C_LUT_FLUSH_VID_MASK, vid);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLutFlushVid
-+ * Description:
-+ *      Get VID of Port + VID pLutSt flush mode
-+ * Input:
-+ *      pVid    - Vid (0~4095)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLutFlushVid(rtk_uint32* pVid)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_L2_FLUSH_CTRL1, RTL8367C_LUT_FLUSH_VID_MASK, pVid);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortFlusdFid
-+ * Description:
-+ *      Set FID of Port + FID pLutSt flush mode
-+ * Input:
-+ *      fid     - FID/MSTI for force flush
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_L2_FID   - Invalid FID (0~15)
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLutFlushFid(rtk_uint32 fid)
-+{
-+    if( fid > RTL8367C_FIDMAX )
-+        return RT_ERR_L2_FID;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_L2_FLUSH_CTRL1, RTL8367C_LUT_FLUSH_FID_MASK, fid);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLutFlushFid
-+ * Description:
-+ *      Get FID of Port + FID pLutSt flush mode
-+ * Input:
-+ *      pFid    - FID/MSTI for force flush
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLutFlushFid(rtk_uint32* pFid)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_L2_FLUSH_CTRL1, RTL8367C_LUT_FLUSH_FID_MASK, pFid);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicLutDisableAging
-+ * Description:
-+ *      Set L2 LUT aging per port setting
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      disabled    - 0: enable aging; 1: disabling aging
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ /*ÐÞ¸ÄRTL8367C_PORTIDMAX*/
-+ret_t rtl8367c_setAsicLutDisableAging(rtk_uint32 port, rtk_uint32 disabled)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_LUT_AGEOUT_CTRL_REG, port, disabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLutDisableAging
-+ * Description:
-+ *      Get L2 LUT aging per port setting
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pDisabled - 0: enable aging; 1: disabling aging
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ /*ÐÞ¸ÄRTL8367C_PORTIDMAX*/
-+ret_t rtl8367c_getAsicLutDisableAging(rtk_uint32 port, rtk_uint32 *pDisabled)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_LUT_AGEOUT_CTRL_REG, port, pDisabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicLutIPMCGroup
-+ * Description:
-+ *      Set IPMC Group Table
-+ * Input:
-+ *      index       - the entry index in table (0 ~ 63)
-+ *      group_addr  - the multicast group address (224.0.0.0 ~ 239.255.255.255)
-+ *      vid         - VLAN ID
-+ *      pmask       - portmask
-+ *      valid       - valid bit
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_INPUT    - Invalid parameter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLutIPMCGroup(rtk_uint32 index, ipaddr_t group_addr, rtk_uint32 vid, rtk_uint32 pmask, rtk_uint32 valid)
-+{
-+    rtk_uint32  regAddr, regData, bitoffset;
-+    ipaddr_t    ipData;
-+    ret_t       retVal;
-+
-+    if(index > RTL8367C_LUT_IPMCGRP_TABLE_MAX)
-+        return RT_ERR_INPUT;
-+
-+    if (vid > RTL8367C_VIDMAX)
-+        return RT_ERR_VLAN_VID;
-+
-+    ipData = group_addr;
-+
-+    if( (ipData & 0xF0000000) != 0xE0000000)    /* not in 224.0.0.0 ~ 239.255.255.255 */
-+        return RT_ERR_INPUT;
-+
-+    /* Group Address */
-+    regAddr = RTL8367C_REG_IPMC_GROUP_ENTRY0_H + (index * 2);
-+    regData = ((ipData & 0x0FFFFFFF) >> 16);
-+
-+    if( (retVal = rtl8367c_setAsicReg(regAddr, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    regAddr++;
-+    regData = (ipData & 0x0000FFFF);
-+
-+    if( (retVal = rtl8367c_setAsicReg(regAddr, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* VID */
-+    regAddr = RTL8367C_REG_IPMC_GROUP_VID_00 + index;
-+    regData = vid;
-+
-+    if( (retVal = rtl8367c_setAsicReg(regAddr, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* portmask */
-+    regAddr = RTL8367C_REG_IPMC_GROUP_PMSK_00 + index;
-+    regData = pmask;
-+
-+    if( (retVal = rtl8367c_setAsicReg(regAddr, regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* valid */
-+    regAddr = RTL8367C_REG_IPMC_GROUP_VALID_15_0 + (index / 16);
-+    bitoffset = index % 16;
-+    if( (retVal = rtl8367c_setAsicRegBit(regAddr, bitoffset, valid)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicLutIPMCGroup
-+ * Description:
-+ *      Set IPMC Group Table
-+ * Input:
-+ *      index       - the entry index in table (0 ~ 63)
-+ * Output:
-+ *      pGroup_addr - the multicast group address (224.0.0.0 ~ 239.255.255.255)
-+ *      pVid        - VLAN ID
-+ *      pPmask      - portmask
-+ *      pValid      - Valid bit
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_INPUT    - Invalid parameter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLutIPMCGroup(rtk_uint32 index, ipaddr_t *pGroup_addr, rtk_uint32 *pVid, rtk_uint32 *pPmask, rtk_uint32 *pValid)
-+{
-+    rtk_uint32      regAddr, regData, bitoffset;
-+    ipaddr_t    ipData;
-+    ret_t       retVal;
-+
-+    if(index > RTL8367C_LUT_IPMCGRP_TABLE_MAX)
-+        return RT_ERR_INPUT;
-+
-+    if (NULL == pGroup_addr)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (NULL == pVid)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (NULL == pPmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* Group address */
-+    regAddr = RTL8367C_REG_IPMC_GROUP_ENTRY0_H + (index * 2);
-+    if( (retVal = rtl8367c_getAsicReg(regAddr, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pGroup_addr = (((regData & 0x00000FFF) << 16) | 0xE0000000);
-+
-+    regAddr++;
-+    if( (retVal = rtl8367c_getAsicReg(regAddr, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    ipData = (*pGroup_addr | (regData & 0x0000FFFF));
-+    *pGroup_addr = ipData;
-+
-+    /* VID */
-+    regAddr = RTL8367C_REG_IPMC_GROUP_VID_00 + index;
-+    if( (retVal = rtl8367c_getAsicReg(regAddr, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pVid = regData;
-+
-+    /* portmask */
-+    regAddr = RTL8367C_REG_IPMC_GROUP_PMSK_00 + index;
-+    if( (retVal = rtl8367c_getAsicReg(regAddr, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pPmask = regData;
-+
-+    /* valid */
-+    regAddr = RTL8367C_REG_IPMC_GROUP_VALID_15_0 + (index / 16);
-+    bitoffset = index % 16;
-+    if( (retVal = rtl8367c_getAsicRegBit(regAddr, bitoffset, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pValid = regData;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicLutLinkDownForceAging
-+ * Description:
-+ *       Set LUT link down aging setting.
-+ * Input:
-+ *      enable      - link down aging setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_ENABLE    - Invalid parameter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLutLinkDownForceAging(rtk_uint32 enable)
-+{
-+    if(enable > 1)
-+        return RT_ERR_ENABLE;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_LUT_CFG, RTL8367C_LINKDOWN_AGEOUT_OFFSET, enable ? 0 : 1);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicLutLinkDownForceAging
-+ * Description:
-+ *       Get LUT link down aging setting.
-+ * Input:
-+ *      pEnable         - link down aging setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_ENABLE    - Invalid parameter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLutLinkDownForceAging(rtk_uint32 *pEnable)
-+{
-+    rtk_uint32  value;
-+    ret_t   retVal;
-+
-+    if ((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_LUT_CFG, RTL8367C_LINKDOWN_AGEOUT_OFFSET, &value)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pEnable = value ? 0 : 1;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicLutIpmcFwdRouterPort
-+ * Description:
-+ *       Set IPMC packet forward to rounter port also or not
-+ * Input:
-+ *      enable      - 1: Inlcude router port, 0, exclude router port
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_ENABLE     Invalid parameter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLutIpmcFwdRouterPort(rtk_uint32 enable)
-+{
-+    if(enable > 1)
-+        return RT_ERR_ENABLE;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_LUT_CFG2, RTL8367C_LUT_IPMC_FWD_RPORT_OFFSET, enable);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicLutIpmcFwdRouterPort
-+ * Description:
-+ *       Get IPMC packet forward to rounter port also or not
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnable         - 1: Inlcude router port, 0, exclude router port
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_NULL_POINTER     - Null pointer
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLutIpmcFwdRouterPort(rtk_uint32 *pEnable)
-+{
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_LUT_CFG2, RTL8367C_LUT_IPMC_FWD_RPORT_OFFSET, pEnable);
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_meter.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_meter.c
-new file mode 100644
-index 0000000000..5412591a82
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_meter.c
-@@ -0,0 +1,305 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Shared meter related functions
-+ *
-+ */
-+#include <rtl8367c_asicdrv_meter.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicShareMeter
-+ * Description:
-+ *      Set meter configuration
-+ * Input:
-+ *      index   - hared meter index (0-31)
-+ *      rate    - 17-bits rate of share meter, unit is 8Kpbs
-+ *      ifg     - Including IFG in rate calculation, 1:include 0:exclude
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicShareMeter(rtk_uint32 index, rtk_uint32 rate, rtk_uint32 ifg)
-+{
-+    ret_t retVal;
-+
-+    if(index > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    if(index < 32)
-+    {
-+    /*19-bits Rate*/
-+        retVal = rtl8367c_setAsicReg(RTL8367C_METER_RATE_REG(index), rate&0xFFFF);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        retVal = rtl8367c_setAsicReg(RTL8367C_METER_RATE_REG(index) + 1, (rate &0x70000) >> 16);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        retVal = rtl8367c_setAsicRegBit(RTL8367C_METER_IFG_CTRL_REG(index), RTL8367C_METER_IFG_OFFSET(index), ifg);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+    /*19-bits Rate*/
-+        retVal = rtl8367c_setAsicReg(RTL8367C_REG_METER32_RATE_CTRL0 + ((index-32) << 1), rate&0xFFFF);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        retVal = rtl8367c_setAsicReg(RTL8367C_REG_METER32_RATE_CTRL0 + ((index-32) << 1) + 1, (rate &0x70000) >> 16);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_METER_IFG_CTRL2 + ((index-32) >> 4), RTL8367C_METER_IFG_OFFSET(index), ifg);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicShareMeter
-+ * Description:
-+ *      Get meter configuration
-+ * Input:
-+ *      index   - hared meter index (0-31)
-+ *      pRate   - 17-bits rate of share meter, unit is 8Kpbs
-+ *      pIfg    - Including IFG in rate calculation, 1:include 0:exclude
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicShareMeter(rtk_uint32 index, rtk_uint32 *pRate, rtk_uint32 *pIfg)
-+{
-+    rtk_uint32 regData;
-+    rtk_uint32 regData2;
-+    ret_t retVal;
-+
-+    if(index > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    if(index < 32)
-+    {
-+    /*17-bits Rate*/
-+     retVal = rtl8367c_getAsicReg(RTL8367C_METER_RATE_REG(index), &regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+     retVal = rtl8367c_getAsicReg(RTL8367C_METER_RATE_REG(index) + 1, &regData2);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+    *pRate = ((regData2 << 16) & 0x70000) | regData;
-+    /*IFG*/
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_METER_IFG_CTRL_REG(index), RTL8367C_METER_IFG_OFFSET(index), pIfg);
-+
-+    return retVal;
-+    }
-+    else
-+    {
-+    /*17-bits Rate*/
-+     retVal = rtl8367c_getAsicReg(RTL8367C_REG_METER32_RATE_CTRL0 + ((index-32) << 1), &regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+     retVal = rtl8367c_getAsicReg(RTL8367C_REG_METER32_RATE_CTRL0 + ((index-32) << 1) + 1, &regData2);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+    *pRate = ((regData2 << 16) & 0x70000) | regData;
-+    /*IFG*/
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_METER_IFG_CTRL2 + ((index-32) >> 4), RTL8367C_METER_IFG_OFFSET(index), pIfg);
-+
-+    return retVal;
-+    }
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicShareMeterBucketSize
-+ * Description:
-+ *      Set meter related leaky bucket threshold
-+ * Input:
-+ *      index       - hared meter index (0-31)
-+ *      lbthreshold - Leaky bucket threshold of meter
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicShareMeterBucketSize(rtk_uint32 index, rtk_uint32 lbthreshold)
-+{
-+
-+    if(index > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    if(index < 32)
-+    return rtl8367c_setAsicReg(RTL8367C_METER_BUCKET_SIZE_REG(index), lbthreshold);
-+    else
-+       return rtl8367c_setAsicReg(RTL8367C_REG_METER32_BUCKET_SIZE + index - 32, lbthreshold);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicShareMeterBucketSize
-+ * Description:
-+ *      Get meter related leaky bucket threshold
-+ * Input:
-+ *      index       - hared meter index (0-31)
-+ *      pLbthreshold - Leaky bucket threshold of meter
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicShareMeterBucketSize(rtk_uint32 index, rtk_uint32 *pLbthreshold)
-+{
-+    if(index > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    if(index < 32)
-+    return rtl8367c_getAsicReg(RTL8367C_METER_BUCKET_SIZE_REG(index), pLbthreshold);
-+    else
-+       return rtl8367c_getAsicReg(RTL8367C_REG_METER32_BUCKET_SIZE + index - 32, pLbthreshold);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicShareMeterType
-+ * Description:
-+ *      Set meter Type
-+ * Input:
-+ *      index       - shared meter index (0-31)
-+ *      Type        - 0: kbps, 1: pps
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicShareMeterType(rtk_uint32 index, rtk_uint32 type)
-+{
-+    rtk_uint32 reg;
-+
-+    if(index > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    if(index < 32)
-+        reg = RTL8367C_REG_METER_MODE_SETTING0 + (index / 16);
-+    else
-+        reg = RTL8367C_REG_METER_MODE_SETTING2 + ((index - 32) / 16);
-+    return rtl8367c_setAsicRegBit(reg, index % 16, type);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicShareMeterType
-+ * Description:
-+ *      Get meter Type
-+ * Input:
-+ *      index       - shared meter index (0-31)
-+ * Output:
-+ *      pType       - 0: kbps, 1: pps
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicShareMeterType(rtk_uint32 index, rtk_uint32 *pType)
-+{
-+    rtk_uint32 reg;
-+
-+    if(index > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    if(NULL == pType)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(index < 32)
-+        reg = RTL8367C_REG_METER_MODE_SETTING0 + (index / 16);
-+    else
-+        reg = RTL8367C_REG_METER_MODE_SETTING2 + ((index - 32) / 16);
-+    return rtl8367c_getAsicRegBit(reg, index % 16, pType);
-+}
-+
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicMeterExceedStatus
-+ * Description:
-+ *      Clear shared meter status
-+ * Input:
-+ *      index       - hared meter index (0-31)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicMeterExceedStatus(rtk_uint32 index)
-+{
-+    if(index > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    if(index < 32)
-+        return rtl8367c_setAsicRegBit(RTL8367C_METER_OVERRATE_INDICATOR_REG(index), RTL8367C_METER_EXCEED_OFFSET(index), 1);
-+    else
-+        return rtl8367c_setAsicRegBit(RTL8367C_REG_METER_OVERRATE_INDICATOR2 + ((index - 32) >> 4), RTL8367C_METER_EXCEED_OFFSET(index), 1);
-+
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicMeterExceedStatus
-+ * Description:
-+ *      Get shared meter status
-+ * Input:
-+ *      index   - hared meter index (0-31)
-+ *      pStatus     - 0: rate doesn't exceed    1: rate exceeds
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *      If rate is over rate*8Kbps of a meter, the state bit of this meter is set to 1.
-+ */
-+ret_t rtl8367c_getAsicMeterExceedStatus(rtk_uint32 index, rtk_uint32* pStatus)
-+{
-+    if(index > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    if(index < 32)
-+        return rtl8367c_getAsicRegBit(RTL8367C_METER_OVERRATE_INDICATOR_REG(index), RTL8367C_METER_EXCEED_OFFSET(index), pStatus);
-+    else
-+        return rtl8367c_getAsicRegBit(RTL8367C_REG_METER_OVERRATE_INDICATOR2 + ((index - 32) >> 4), RTL8367C_METER_EXCEED_OFFSET(index), pStatus);
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_mib.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_mib.c
-new file mode 100644
-index 0000000000..c9aaa01d3e
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_mib.c
-@@ -0,0 +1,570 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : MIB related functions
-+ *
-+ */
-+
-+#include <rtl8367c_asicdrv_mib.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicMIBsCounterReset
-+ * Description:
-+ *      Reset global/queue manage or per-port MIB counter
-+ * Input:
-+ *      greset  - Global reset
-+ *      qmreset - Queue maganement reset
-+ *      portmask    - Port reset mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicMIBsCounterReset(rtk_uint32 greset, rtk_uint32 qmreset, rtk_uint32 portmask)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint32 regBits;
-+
-+    regBits = RTL8367C_GLOBAL_RESET_MASK |
-+                RTL8367C_QM_RESET_MASK |
-+                    RTL8367C_MIB_PORT07_MASK |
-+                    ((rtk_uint32)0x7 << 13);
-+    regData = ((greset << RTL8367C_GLOBAL_RESET_OFFSET) & RTL8367C_GLOBAL_RESET_MASK) |
-+                ((qmreset << RTL8367C_QM_RESET_OFFSET) & RTL8367C_QM_RESET_MASK) |
-+                (((portmask & 0xFF) << RTL8367C_PORT0_RESET_OFFSET) & RTL8367C_MIB_PORT07_MASK) |
-+                (((portmask >> 8)&0x7) << 13);
-+
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_MIB_CTRL0, regBits, (regData >> RTL8367C_PORT0_RESET_OFFSET));
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicMIBsCounter
-+ * Description:
-+ *      Get MIBs counter
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      mibIdx      - MIB counter index
-+ *      pCounter    - MIB retrived counter
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - MIB is busy at retrieving
-+ *      RT_ERR_STAT_CNTR_FAIL   - MIB is resetting
-+ * Note:
-+ *      Before MIBs counter retrieving, writting accessing address to ASIC at first and check the MIB
-+ *      control register status. If busy bit of MIB control is set, that means MIB counter have been
-+ *      waiting for preparing, then software must wait atfer this busy flag reset by ASIC. This driver
-+ *      did not recycle reading user desired counter. Software must use driver again to get MIB counter
-+ *      if return value is not RT_ERR_OK.
-+ */
-+ret_t rtl8367c_getAsicMIBsCounter(rtk_uint32 port, RTL8367C_MIBCOUNTER mibIdx, rtk_uint64* pCounter)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regAddr;
-+    rtk_uint32 regData;
-+    rtk_uint32 mibAddr;
-+    rtk_uint32 mibOff=0;
-+
-+    /* address offset to MIBs counter */
-+    CONST rtk_uint16 mibLength[RTL8367C_MIBS_NUMBER]= {
-+        4,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-+        4,2,2,2,2,2,2,2,2,
-+        4,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-+        2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2};
-+
-+    rtk_uint16 i;
-+    rtk_uint64 mibCounter;
-+
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(mibIdx >= RTL8367C_MIBS_NUMBER)
-+        return RT_ERR_STAT_INVALID_CNTR;
-+
-+    if(dot1dTpLearnedEntryDiscards == mibIdx)
-+    {
-+        mibAddr = RTL8367C_MIB_LEARNENTRYDISCARD_OFFSET;
-+    }
-+    else
-+    {
-+        i = 0;
-+        mibOff = RTL8367C_MIB_PORT_OFFSET * port;
-+
-+        if(port > 7)
-+            mibOff = mibOff + 68;
-+
-+        while(i < mibIdx)
-+        {
-+            mibOff += mibLength[i];
-+            i++;
-+        }
-+
-+        mibAddr = mibOff;
-+    }
-+
-+
-+    /*writing access counter address first*/
-+    /*This address is SRAM address, and SRAM address = MIB register address >> 2*/
-+    /*then ASIC will prepare 64bits counter wait for being retrived*/
-+    /*Write Mib related address to access control register*/
-+    retVal = rtl8367c_setAsicReg(RTL8367C_REG_MIB_ADDRESS, (mibAddr >> 2));
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+
-+
-+    /* polling busy flag */
-+    i = 100;
-+    while(i > 0)
-+    {
-+        /*read MIB control register*/
-+        retVal = rtl8367c_getAsicReg(RTL8367C_MIB_CTRL_REG,&regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        if((regData & RTL8367C_MIB_CTRL0_BUSY_FLAG_MASK) == 0)
-+        {
-+            break;
-+        }
-+
-+        i--;
-+    }
-+
-+    if(regData & RTL8367C_MIB_CTRL0_BUSY_FLAG_MASK)
-+        return RT_ERR_BUSYWAIT_TIMEOUT;
-+
-+    if(regData & RTL8367C_RESET_FLAG_MASK)
-+        return RT_ERR_STAT_CNTR_FAIL;
-+
-+    mibCounter = 0;
-+    i = mibLength[mibIdx];
-+    if(4 == i)
-+        regAddr = RTL8367C_MIB_COUNTER_BASE_REG + 3;
-+    else
-+        regAddr = RTL8367C_MIB_COUNTER_BASE_REG + ((mibOff + 1) % 4);
-+
-+    while(i)
-+    {
-+        retVal = rtl8367c_getAsicReg(regAddr, &regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        mibCounter = (mibCounter << 16) | (regData & 0xFFFF);
-+
-+        regAddr --;
-+        i --;
-+
-+    }
-+
-+    *pCounter = mibCounter;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicMIBsLogCounter
-+ * Description:
-+ *      Get MIBs Loggin counter
-+ * Input:
-+ *      index       - The index of 32 logging counter (0 ~ 31)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_ENTRY_INDEX      - Wrong index
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - MIB is busy at retrieving
-+ *      RT_ERR_STAT_CNTR_FAIL   - MIB is resetting
-+ * Note:
-+ *      This API get 32 logging counter
-+ */
-+ret_t rtl8367c_getAsicMIBsLogCounter(rtk_uint32 index, rtk_uint32 *pCounter)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regAddr;
-+    rtk_uint32 regData;
-+    rtk_uint32 mibAddr;
-+    rtk_uint16 i;
-+    rtk_uint64 mibCounter;
-+
-+    if(index > RTL8367C_MIB_MAX_LOG_CNT_IDX)
-+        return RT_ERR_ENTRY_INDEX;
-+
-+    mibAddr = RTL8367C_MIB_LOG_CNT_OFFSET + ((index / 2) * 4);
-+
-+    retVal = rtl8367c_setAsicReg(RTL8367C_REG_MIB_ADDRESS, (mibAddr >> 2));
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /*read MIB control register*/
-+    retVal = rtl8367c_getAsicReg(RTL8367C_MIB_CTRL_REG, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    if(regData & RTL8367C_MIB_CTRL0_BUSY_FLAG_MASK)
-+        return RT_ERR_BUSYWAIT_TIMEOUT;
-+
-+    if(regData & RTL8367C_RESET_FLAG_MASK)
-+        return RT_ERR_STAT_CNTR_FAIL;
-+
-+    mibCounter = 0;
-+    if((index % 2) == 1)
-+        regAddr = RTL8367C_MIB_COUNTER_BASE_REG + 3;
-+    else
-+        regAddr = RTL8367C_MIB_COUNTER_BASE_REG + 1;
-+
-+    for(i = 0; i <= 1; i++)
-+    {
-+        retVal = rtl8367c_getAsicReg(regAddr, &regData);
-+
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        mibCounter = (mibCounter << 16) | (regData & 0xFFFF);
-+
-+        regAddr --;
-+    }
-+
-+    *pCounter = mibCounter;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicMIBsControl
-+ * Description:
-+ *      Get MIB control register
-+ * Input:
-+ *      pMask       - MIB control status mask bit[0]-busy bit[1]
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ * Note:
-+ *      Software need to check this control register atfer doing port resetting or global resetting
-+ */
-+ret_t rtl8367c_getAsicMIBsControl(rtk_uint32* pMask)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_MIB_CTRL_REG, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *pMask = regData & (RTL8367C_MIB_CTRL0_BUSY_FLAG_MASK | RTL8367C_RESET_FLAG_MASK);
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicMIBsResetValue
-+ * Description:
-+ *      Reset all counter to 0 or 1
-+ * Input:
-+ *      value           - Reset to value 0 or 1
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicMIBsResetValue(rtk_uint32 value)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_MIB_CTRL0, RTL8367C_RESET_VALUE_OFFSET, value);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicMIBsResetValue
-+ * Description:
-+ *      Reset all counter to 0 or 1
-+ * Input:
-+ *      value           - Reset to value 0 or 1
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicMIBsResetValue(rtk_uint32* value)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_MIB_CTRL0, RTL8367C_RESET_VALUE_OFFSET, value);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicMIBsUsageMode
-+ * Description:
-+ *      MIB update mode
-+ * Input:
-+ *      mode            - 1: latch all MIBs by timer 0:normal free run counting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicMIBsUsageMode(rtk_uint32 mode)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_MIB_CTRL4, RTL8367C_MIB_USAGE_MODE_OFFSET, mode);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicMIBsUsageMode
-+ * Description:
-+ *      MIB update mode
-+ * Input:
-+ *      pMode           - 1: latch all MIBs by timer 0:normal free run counting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicMIBsUsageMode(rtk_uint32* pMode)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_MIB_CTRL4, RTL8367C_MIB_USAGE_MODE_OFFSET, pMode);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicMIBsTimer
-+ * Description:
-+ *      MIB latching timer
-+ * Input:
-+ *      timer           - latch timer, unit 1 second
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicMIBsTimer(rtk_uint32 timer)
-+{
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_MIB_CTRL4, RTL8367C_MIB_TIMER_MASK, timer);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicMIBsTimer
-+ * Description:
-+ *      MIB latching timer
-+ * Input:
-+ *      pTimer          - latch timer, unit 1 second
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicMIBsTimer(rtk_uint32* pTimer)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_MIB_CTRL4, RTL8367C_MIB_TIMER_MASK, pTimer);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicMIBsLoggingMode
-+ * Description:
-+ *      MIB logging counter mode
-+ * Input:
-+ *      index   - logging counter mode index (0~15)
-+ *      mode    - 0:32-bits mode 1:64-bits mode
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicMIBsLoggingMode(rtk_uint32 index, rtk_uint32 mode)
-+{
-+    if(index > RTL8367C_MIB_MAX_LOG_MODE_IDX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_MIB_CTRL3, index,mode);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicMIBsLoggingMode
-+ * Description:
-+ *      MIB logging counter mode
-+ * Input:
-+ *      index   - logging counter mode index (0~15)
-+ *      pMode   - 0:32-bits mode 1:64-bits mode
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicMIBsLoggingMode(rtk_uint32 index, rtk_uint32* pMode)
-+{
-+    if(index > RTL8367C_MIB_MAX_LOG_MODE_IDX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_MIB_CTRL3, index,pMode);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicMIBsLoggingType
-+ * Description:
-+ *      MIB logging counter type
-+ * Input:
-+ *      index   - logging counter mode index (0~15)
-+ *      type    - 0:Packet count 1:Byte count
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicMIBsLoggingType(rtk_uint32 index, rtk_uint32 type)
-+{
-+    if(index > RTL8367C_MIB_MAX_LOG_MODE_IDX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_MIB_CTRL5, index,type);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicMIBsLoggingType
-+ * Description:
-+ *      MIB logging counter type
-+ * Input:
-+ *      index   - logging counter mode index (0~15)
-+ *      pType   - 0:Packet count 1:Byte count
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicMIBsLoggingType(rtk_uint32 index, rtk_uint32* pType)
-+{
-+    if(index > RTL8367C_MIB_MAX_LOG_MODE_IDX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_MIB_CTRL5, index,pType);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicMIBsResetLoggingCounter
-+ * Description:
-+ *      MIB logging counter type
-+ * Input:
-+ *      index   - logging counter index (0~31)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicMIBsResetLoggingCounter(rtk_uint32 index)
-+{
-+    ret_t retVal;
-+
-+    if(index > RTL8367C_MIB_MAX_LOG_CNT_IDX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(index < 16)
-+        retVal = rtl8367c_setAsicReg(RTL8367C_REG_MIB_CTRL1, 1<<index);
-+    else
-+        retVal = rtl8367c_setAsicReg(RTL8367C_REG_MIB_CTRL2, 1<<(index-16));
-+
-+    return retVal;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicMIBsLength
-+ * Description:
-+ *      Set MIB length couting mode
-+ * Input:
-+ *      txLengthMode    - 0: tag length doesn't be counted. 1: tag length is counted.
-+ *      rxLengthMode    - 0: tag length doesn't be counted. 1: tag length is counted.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicMIBsLength(rtk_uint32 txLengthMode, rtk_uint32 rxLengthMode)
-+{
-+    ret_t retVal;
-+
-+    if( (retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_MIB_RMON_LEN_CTRL, RTL8367C_TX_LENGTH_CTRL_OFFSET, txLengthMode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if( (retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_MIB_RMON_LEN_CTRL, RTL8367C_RX_LENGTH_CTRL_OFFSET, rxLengthMode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicMIBsLength
-+ * Description:
-+ *      Set MIB length couting mode
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pTxLengthMode - 0: tag length doesn't be counted. 1: tag length is counted.
-+ *      pRxLengthMode - 0: tag length doesn't be counted. 1: tag length is counted.
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE     - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicMIBsLength(rtk_uint32 *pTxLengthMode, rtk_uint32 *pRxLengthMode)
-+{
-+    ret_t retVal;
-+
-+    if( (retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_MIB_RMON_LEN_CTRL, RTL8367C_TX_LENGTH_CTRL_OFFSET, pTxLengthMode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if( (retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_MIB_RMON_LEN_CTRL, RTL8367C_RX_LENGTH_CTRL_OFFSET, pRxLengthMode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_mirror.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_mirror.c
-new file mode 100644
-index 0000000000..de945ff676
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_mirror.c
-@@ -0,0 +1,472 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Port mirror related functions
-+ *
-+ */
-+#include <rtl8367c_asicdrv_mirror.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicPortMirror
-+ * Description:
-+ *      Set port mirror function
-+ * Input:
-+ *      source  - Source port
-+ *      monitor - Monitor (destination) port
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortMirror(rtk_uint32 source, rtk_uint32 monitor)
-+{
-+    ret_t retVal;
-+
-+    if((source > RTL8367C_PORTIDMAX) || (monitor > RTL8367C_PORTIDMAX))
-+        return RT_ERR_PORT_ID;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_MIRROR_CTRL_REG, RTL8367C_MIRROR_SOURCE_PORT_MASK, source);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_MIRROR_CTRL_REG, RTL8367C_MIRROR_MONITOR_PORT_MASK, monitor);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortMirror
-+ * Description:
-+ *      Get port mirror function
-+ * Input:
-+ *      pSource     - Source port
-+ *      pMonitor - Monitor (destination) port
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortMirror(rtk_uint32 *pSource, rtk_uint32 *pMonitor)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_MIRROR_CTRL_REG, RTL8367C_MIRROR_SOURCE_PORT_MASK, pSource);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_MIRROR_CTRL_REG, RTL8367C_MIRROR_MONITOR_PORT_MASK, pMonitor);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortMirrorRxFunction
-+ * Description:
-+ *      Set the mirror function on RX of the mirrored
-+ * Input:
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortMirrorRxFunction(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_MIRROR_CTRL_REG, RTL8367C_MIRROR_RX_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortMirrorRxFunction
-+ * Description:
-+ *      Get the mirror function on RX of the mirrored
-+ * Input:
-+ *      pEnabled    - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortMirrorRxFunction(rtk_uint32* pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_MIRROR_CTRL_REG, RTL8367C_MIRROR_RX_OFFSET, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortMirrorTxFunction
-+ * Description:
-+ *      Set the mirror function on TX of the mirrored
-+ * Input:
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortMirrorTxFunction(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_MIRROR_CTRL_REG, RTL8367C_MIRROR_TX_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortMirrorTxFunction
-+ * Description:
-+ *      Get the mirror function on TX of the mirrored
-+ * Input:
-+ *      pEnabled    - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortMirrorTxFunction(rtk_uint32* pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_MIRROR_CTRL_REG, RTL8367C_MIRROR_TX_OFFSET, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortMirrorIsolation
-+ * Description:
-+ *      Set the traffic isolation on monitor port
-+ * Input:
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortMirrorIsolation(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_MIRROR_CTRL_REG, RTL8367C_MIRROR_ISO_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortMirrorIsolation
-+ * Description:
-+ *      Get the traffic isolation on monitor port
-+ * Input:
-+ *      pEnabled    - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortMirrorIsolation(rtk_uint32* pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_MIRROR_CTRL_REG, RTL8367C_MIRROR_ISO_OFFSET, pEnabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicPortMirrorMask
-+ * Description:
-+ *      Set mirror source port mask
-+ * Input:
-+ *      SourcePortmask  - Source Portmask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_MASK- Port Mask Error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortMirrorMask(rtk_uint32 SourcePortmask)
-+{
-+    if( SourcePortmask > RTL8367C_PORTMASK)
-+        return RT_ERR_PORT_MASK;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_MIRROR_SRC_PMSK, RTL8367C_MIRROR_SRC_PMSK_MASK, SourcePortmask);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicPortMirrorMask
-+ * Description:
-+ *      Get mirror source port mask
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pSourcePortmask     - Source Portmask
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_MASK- Port Mask Error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortMirrorMask(rtk_uint32 *pSourcePortmask)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_MIRROR_SRC_PMSK, RTL8367C_MIRROR_SRC_PMSK_MASK, pSourcePortmask);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicPortMirrorVlanRxLeaky
-+ * Description:
-+ *      Set the mirror function of VLAN RX leaky
-+ * Input:
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortMirrorVlanRxLeaky(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_MIRROR_CTRL2, RTL8367C_MIRROR_RX_VLAN_LEAKY_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortMirrorVlanRxLeaky
-+ * Description:
-+ *      Get the mirror function of VLAN RX leaky
-+ * Input:
-+ *      pEnabled    - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortMirrorVlanRxLeaky(rtk_uint32* pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_MIRROR_CTRL2, RTL8367C_MIRROR_RX_VLAN_LEAKY_OFFSET, pEnabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicPortMirrorVlanTxLeaky
-+ * Description:
-+ *      Set the mirror function of VLAN TX leaky
-+ * Input:
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortMirrorVlanTxLeaky(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_MIRROR_CTRL2, RTL8367C_MIRROR_TX_VLAN_LEAKY_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortMirrorVlanTxLeaky
-+ * Description:
-+ *      Get the mirror function of VLAN TX leaky
-+ * Input:
-+ *      pEnabled    - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortMirrorVlanTxLeaky(rtk_uint32* pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_MIRROR_CTRL2, RTL8367C_MIRROR_TX_VLAN_LEAKY_OFFSET, pEnabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicPortMirrorIsolationRxLeaky
-+ * Description:
-+ *      Set the mirror function of  Isolation RX leaky
-+ * Input:
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortMirrorIsolationRxLeaky(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_MIRROR_CTRL2, RTL8367C_MIRROR_RX_ISOLATION_LEAKY_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortMirrorIsolationRxLeaky
-+ * Description:
-+ *      Get the mirror function of VLAN RX leaky
-+ * Input:
-+ *      pEnabled    - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortMirrorIsolationRxLeaky(rtk_uint32* pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_MIRROR_CTRL2, RTL8367C_MIRROR_RX_ISOLATION_LEAKY_OFFSET, pEnabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicPortMirrorIsolationTxLeaky
-+ * Description:
-+ *      Set the mirror function of Isolation TX leaky
-+ * Input:
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortMirrorIsolationTxLeaky(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_MIRROR_CTRL2, RTL8367C_MIRROR_TX_ISOLATION_LEAKY_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortMirrorIsolationTxLeaky
-+ * Description:
-+ *      Get the mirror function of VLAN TX leaky
-+ * Input:
-+ *      pEnabled    - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortMirrorIsolationTxLeaky(rtk_uint32* pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_MIRROR_CTRL2, RTL8367C_MIRROR_TX_ISOLATION_LEAKY_OFFSET, pEnabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicPortMirrorRealKeep
-+ * Description:
-+ *      Set the mirror function of keep format
-+ * Input:
-+ *      mode    - 1: keep original format, 0: follow VLAN config
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortMirrorRealKeep(rtk_uint32 mode)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_MIRROR_CTRL2, RTL8367C_MIRROR_REALKEEP_EN_OFFSET, mode);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortMirrorRealKeep
-+ * Description:
-+ *      Get the mirror function of keep format
-+ * Input:
-+ *      pMode   - 1: keep original format, 0: follow VLAN config
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortMirrorRealKeep(rtk_uint32* pMode)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_MIRROR_CTRL2, RTL8367C_MIRROR_REALKEEP_EN_OFFSET, pMode);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicPortMirrorOverride
-+ * Description:
-+ *      Set the mirror function of override
-+ * Input:
-+ *      rxMirror    - 1: output rx Mirror format, 0: output forward format
-+ *      txMirror    - 1: output tx Mirror format, 0: output forward format
-+ *      aclMirror   - 1: output ACL Mirror format, 0: output forward format
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortMirrorOverride(rtk_uint32 rxMirror, rtk_uint32 txMirror, rtk_uint32 aclMirror)
-+{
-+    ret_t retVal;
-+
-+    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_MIRROR_CTRL3, RTL8367C_MIRROR_RX_OVERRIDE_EN_OFFSET, rxMirror)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_MIRROR_CTRL3, RTL8367C_MIRROR_TX_OVERRIDE_EN_OFFSET, txMirror)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_MIRROR_CTRL3, RTL8367C_MIRROR_ACL_OVERRIDE_EN_OFFSET, aclMirror)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicPortMirrorOverride
-+ * Description:
-+ *      Get the mirror function of override
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pRxMirror   - 1: output rx Mirror format, 0: output forward format
-+ *      pTxMirror   - 1: output tx Mirror format, 0: output forward format
-+ *      pAclMirror  - 1: output ACL Mirror format, 0: output forward format
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortMirrorOverride(rtk_uint32 *pRxMirror, rtk_uint32 *pTxMirror, rtk_uint32 *pAclMirror)
-+{
-+    ret_t retVal;
-+
-+    if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_MIRROR_CTRL3, RTL8367C_MIRROR_RX_OVERRIDE_EN_OFFSET, pRxMirror)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_MIRROR_CTRL3, RTL8367C_MIRROR_TX_OVERRIDE_EN_OFFSET, pTxMirror)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_MIRROR_CTRL3, RTL8367C_MIRROR_ACL_OVERRIDE_EN_OFFSET, pAclMirror)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_misc.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_misc.c
-new file mode 100644
-index 0000000000..2189b151c3
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_misc.c
-@@ -0,0 +1,268 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Miscellaneous functions
-+ *
-+ */
-+
-+#include <rtl8367c_asicdrv_misc.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicMacAddress
-+ * Description:
-+ *      Set switch MAC address
-+ * Input:
-+ *      mac     - switch mac
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicMacAddress(ether_addr_t mac)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint8 *accessPtr;
-+    rtk_uint32 i;
-+
-+    accessPtr =  (rtk_uint8*)&mac;
-+
-+    regData = *accessPtr;
-+    accessPtr ++;
-+    regData = (regData << 8) | *accessPtr;
-+    accessPtr ++;
-+    for(i = 0; i <=2; i++)
-+    {
-+        retVal = rtl8367c_setAsicReg(RTL8367C_REG_SWITCH_MAC2 - i, regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        regData = *accessPtr;
-+        accessPtr ++;
-+        regData = (regData << 8) | *accessPtr;
-+        accessPtr ++;
-+    }
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicMacAddress
-+ * Description:
-+ *      Get switch MAC address
-+ * Input:
-+ *      pMac    - switch mac
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicMacAddress(ether_addr_t *pMac)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint8 *accessPtr;
-+    rtk_uint32 i;
-+
-+
-+    accessPtr = (rtk_uint8*)pMac;
-+
-+    for(i = 0; i <= 2; i++)
-+    {
-+        retVal = rtl8367c_getAsicReg(RTL8367C_REG_SWITCH_MAC2 - i, &regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        *accessPtr = (regData & 0xFF00) >> 8;
-+        accessPtr ++;
-+        *accessPtr = regData & 0xFF;
-+        accessPtr ++;
-+    }
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicDebugInfo
-+ * Description:
-+ *      Get per-port packet forward debugging information
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      pDebugifo   - per-port packet trap/drop/forward reason
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicDebugInfo(rtk_uint32 port, rtk_uint32 *pDebugifo)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_DEBUG_INFO_REG(port), RTL8367C_DEBUG_INFO_MASK(port), pDebugifo);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortJamMode
-+ * Description:
-+ *      Set half duplex flow control setting
-+ * Input:
-+ *      mode    - 0: Back-Pressure 1: DEFER
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortJamMode(rtk_uint32 mode)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_CFG_BACKPRESSURE, RTL8367C_LONGTXE_OFFSET,mode);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortJamMode
-+ * Description:
-+ *      Get half duplex flow control setting
-+ * Input:
-+ *      pMode   - 0: Back-Pressure 1: DEFER
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortJamMode(rtk_uint32* pMode)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_CFG_BACKPRESSURE, RTL8367C_LONGTXE_OFFSET, pMode);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicMaxLengthCfg
-+ * Description:
-+ *      Set Max packet length configuration
-+ * Input:
-+ *      cfgId       - Configuration ID
-+ *      maxLength   - Max Length
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicMaxLengthCfg(rtk_uint32 cfgId, rtk_uint32 maxLength)
-+{
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_MAX_LEN_RX_TX_CFG0 + cfgId, RTL8367C_MAX_LEN_RX_TX_CFG0_MASK, maxLength);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicMaxLengthCfg
-+ * Description:
-+ *      Get Max packet length configuration
-+ * Input:
-+ *      cfgId       - Configuration ID
-+ *      maxLength   - Max Length
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicMaxLengthCfg(rtk_uint32 cfgId, rtk_uint32 *pMaxLength)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_MAX_LEN_RX_TX_CFG0 + cfgId, RTL8367C_MAX_LEN_RX_TX_CFG0_MASK, pMaxLength);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicMaxLength
-+ * Description:
-+ *      Set Max packet length
-+ * Input:
-+ *      port        - port ID
-+ *      type        - 0: 10M/100M speed, 1: giga speed
-+ *      cfgId       - Configuration ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicMaxLength(rtk_uint32 port, rtk_uint32 type, rtk_uint32 cfgId)
-+{
-+    ret_t retVal;
-+
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_MAX_LENGTH_CFG, (type * 8) + port, cfgId);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_MAX_LENGTH_CFG_EXT, (type * 3) + port - 8, cfgId);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicMaxLength
-+ * Description:
-+ *      Get Max packet length
-+ * Input:
-+ *      port        - port ID
-+ *      type        - 0: 10M/100M speed, 1: giga speed
-+ *      cfgId       - Configuration ID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicMaxLength(rtk_uint32 port, rtk_uint32 type, rtk_uint32 *pCfgId)
-+{
-+    ret_t retVal;
-+
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_MAX_LENGTH_CFG, (type * 8) + port, pCfgId);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_MAX_LENGTH_CFG_EXT, (type * 3) + port - 8, pCfgId);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    return RT_ERR_OK;
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_oam.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_oam.c
-new file mode 100644
-index 0000000000..1556f4500d
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_oam.c
-@@ -0,0 +1,194 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 42321 $
-+ * $Date: 2013-08-26 13:51:29 +0800 (週一, 26 八月 2013) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : OAM related functions
-+ *
-+ */
-+
-+#include <rtl8367c_asicdrv_oam.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicOamParser
-+ * Description:
-+ *      Set OAM parser state
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      parser  - Per-Port OAM parser state
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_NOT_ALLOWED  - Invalid paser state
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicOamParser(rtk_uint32 port, rtk_uint32 parser)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if(parser > OAM_PARFWDCPU)
-+        return RT_ERR_NOT_ALLOWED;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_OAM_PARSER_CTRL0 + port/8, RTL8367C_OAM_PARSER_MASK(port % 8), parser);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicOamParser
-+ * Description:
-+ *      Get OAM parser state
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pParser     - Per-Port OAM parser state
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicOamParser(rtk_uint32 port, rtk_uint32* pParser)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_OAM_PARSER_CTRL0 + port/8, RTL8367C_OAM_PARSER_MASK(port%8), pParser);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicOamMultiplexer
-+ * Description:
-+ *      Set OAM multiplexer state
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      multiplexer - Per-Port OAM multiplexer state
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_NOT_ALLOWED  - Invalid multiplexer state
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicOamMultiplexer(rtk_uint32 port, rtk_uint32 multiplexer)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if(multiplexer > OAM_MULCPU)
-+        return RT_ERR_NOT_ALLOWED;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_OAM_MULTIPLEXER_CTRL0 + port/8, RTL8367C_OAM_MULTIPLEXER_MASK(port%8), multiplexer);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicOamMultiplexer
-+ * Description:
-+ *      Get OAM multiplexer state
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      pMultiplexer - Per-Port OAM multiplexer state
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicOamMultiplexer(rtk_uint32 port, rtk_uint32* pMultiplexer)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_OAM_MULTIPLEXER_CTRL0 + port/8, RTL8367C_OAM_MULTIPLEXER_MASK(port%8), pMultiplexer);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicOamCpuPri
-+ * Description:
-+ *      Set trap priority for OAM packet
-+ * Input:
-+ *      priority    - priority (0~7)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY     - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicOamCpuPri(rtk_uint32 priority)
-+{
-+    if(priority > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_QOS_TRAP_PRIORITY0, RTL8367C_OAM_PRIOIRTY_MASK, priority);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicOamCpuPri
-+ * Description:
-+ *      Get trap priority for OAM packet
-+ * Input:
-+ *      pPriority   - priority (0~7)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicOamCpuPri(rtk_uint32 *pPriority)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_QOS_TRAP_PRIORITY0, RTL8367C_OAM_PRIOIRTY_MASK, pPriority);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicOamEnable
-+ * Description:
-+ *      Set OAM function state
-+ * Input:
-+ *      enabled     - OAM function usage 1:enable, 0:disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicOamEnable(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_OAM_CTRL, RTL8367C_OAM_CTRL_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicOamEnable
-+ * Description:
-+ *      Get OAM function state
-+ * Input:
-+ *      pEnabled    - OAM function usage 1:enable, 0:disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicOamEnable(rtk_uint32 *pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_OAM_CTRL, RTL8367C_OAM_CTRL_OFFSET, pEnabled);
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_phy.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_phy.c
-new file mode 100644
-index 0000000000..fb4db113a9
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_phy.c
-@@ -0,0 +1,394 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : PHY related functions
-+ *
-+ */
-+#include <rtl8367c_asicdrv_phy.h>
-+
-+#if defined(MDC_MDIO_OPERATION)
-+/* Function Name:
-+ *      rtl8367c_setAsicPHYOCPReg
-+ * Description:
-+ *      Set PHY OCP registers
-+ * Input:
-+ *      phyNo   - Physical port number (0~7)
-+ *      ocpAddr - OCP address
-+ *      ocpData - Writing data
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PHY_REG_ID       - invalid PHY address
-+ *      RT_ERR_PHY_ID           - invalid PHY no
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPHYOCPReg(rtk_uint32 phyNo, rtk_uint32 ocpAddr, rtk_uint32 ocpData )
-+{
-+    ret_t retVal;
-+    rtk_uint32 regAddr;
-+    rtk_uint32 ocpAddrPrefix, ocpAddr9_6, ocpAddr5_1;
-+
-+    /* OCP prefix */
-+    ocpAddrPrefix = ((ocpAddr & 0xFC00) >> 10);
-+    if((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_GPHY_OCP_MSB_0, RTL8367C_CFG_CPU_OCPADR_MSB_MASK, ocpAddrPrefix)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*prepare access address*/
-+    ocpAddr9_6 = ((ocpAddr >> 6) & 0x000F);
-+    ocpAddr5_1 = ((ocpAddr >> 1) & 0x001F);
-+    regAddr = RTL8367C_PHY_BASE | (ocpAddr9_6 << 8) | (phyNo << RTL8367C_PHY_OFFSET) | ocpAddr5_1;
-+    if((retVal = rtl8367c_setAsicReg(regAddr, ocpData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicPHYOCPReg
-+ * Description:
-+ *      Get PHY OCP registers
-+ * Input:
-+ *      phyNo   - Physical port number (0~7)
-+ *      ocpAddr - PHY address
-+ *      pRegData - read data
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PHY_REG_ID       - invalid PHY address
-+ *      RT_ERR_PHY_ID           - invalid PHY no
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPHYOCPReg(rtk_uint32 phyNo, rtk_uint32 ocpAddr, rtk_uint32 *pRegData )
-+{
-+    ret_t retVal;
-+    rtk_uint32 regAddr;
-+    rtk_uint32 ocpAddrPrefix, ocpAddr9_6, ocpAddr5_1;
-+    /* OCP prefix */
-+    ocpAddrPrefix = ((ocpAddr & 0xFC00) >> 10);
-+    if((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_GPHY_OCP_MSB_0, RTL8367C_CFG_CPU_OCPADR_MSB_MASK, ocpAddrPrefix)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*prepare access address*/
-+    ocpAddr9_6 = ((ocpAddr >> 6) & 0x000F);
-+    ocpAddr5_1 = ((ocpAddr >> 1) & 0x001F);
-+    regAddr = RTL8367C_PHY_BASE | (ocpAddr9_6 << 8) | (phyNo << RTL8367C_PHY_OFFSET) | ocpAddr5_1;
-+    if((retVal = rtl8367c_getAsicReg(regAddr, pRegData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+#else
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicPHYOCPReg
-+ * Description:
-+ *      Set PHY OCP registers
-+ * Input:
-+ *      phyNo   - Physical port number (0~7)
-+ *      ocpAddr - OCP address
-+ *      ocpData - Writing data
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PHY_REG_ID       - invalid PHY address
-+ *      RT_ERR_PHY_ID           - invalid PHY no
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPHYOCPReg(rtk_uint32 phyNo, rtk_uint32 ocpAddr, rtk_uint32 ocpData )
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint32 busyFlag, checkCounter;
-+    rtk_uint32 ocpAddrPrefix, ocpAddr9_6, ocpAddr5_1;
-+
-+    /*Check internal phy access busy or not*/
-+    /*retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_INDRECT_ACCESS_STATUS, RTL8367C_INDRECT_ACCESS_STATUS_OFFSET,&busyFlag);*/
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_INDRECT_ACCESS_STATUS,&busyFlag);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    if(busyFlag)
-+        return RT_ERR_BUSYWAIT_TIMEOUT;
-+
-+    /* OCP prefix */
-+    ocpAddrPrefix = ((ocpAddr & 0xFC00) >> 10);
-+    if((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_GPHY_OCP_MSB_0, RTL8367C_CFG_CPU_OCPADR_MSB_MASK, ocpAddrPrefix)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*prepare access data*/
-+    retVal = rtl8367c_setAsicReg(RTL8367C_REG_INDRECT_ACCESS_WRITE_DATA, ocpData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /*prepare access address*/
-+    ocpAddr9_6 = ((ocpAddr >> 6) & 0x000F);
-+    ocpAddr5_1 = ((ocpAddr >> 1) & 0x001F);
-+    regData = RTL8367C_PHY_BASE | (ocpAddr9_6 << 8) | (phyNo << RTL8367C_PHY_OFFSET) | ocpAddr5_1;
-+    retVal = rtl8367c_setAsicReg(RTL8367C_REG_INDRECT_ACCESS_ADDRESS, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /*Set WRITE Command*/
-+    retVal = rtl8367c_setAsicReg(RTL8367C_REG_INDRECT_ACCESS_CTRL, RTL8367C_CMD_MASK | RTL8367C_RW_MASK);
-+
-+    checkCounter = 100;
-+    while(checkCounter)
-+    {
-+        retVal = rtl8367c_getAsicReg(RTL8367C_REG_INDRECT_ACCESS_STATUS,&busyFlag);
-+        if((retVal != RT_ERR_OK) || busyFlag)
-+        {
-+            checkCounter --;
-+            if(0 == checkCounter)
-+                return RT_ERR_BUSYWAIT_TIMEOUT;
-+        }
-+        else
-+        {
-+            checkCounter = 0;
-+        }
-+    }
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPHYOCPReg
-+ * Description:
-+ *      Get PHY OCP registers
-+ * Input:
-+ *      phyNo   - Physical port number (0~7)
-+ *      ocpAddr - PHY address
-+ *      pRegData - read data
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PHY_REG_ID       - invalid PHY address
-+ *      RT_ERR_PHY_ID           - invalid PHY no
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPHYOCPReg(rtk_uint32 phyNo, rtk_uint32 ocpAddr, rtk_uint32 *pRegData )
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint32 busyFlag,checkCounter;
-+    rtk_uint32 ocpAddrPrefix, ocpAddr9_6, ocpAddr5_1;
-+    /*Check internal phy access busy or not*/
-+    /*retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_INDRECT_ACCESS_STATUS, RTL8367C_INDRECT_ACCESS_STATUS_OFFSET,&busyFlag);*/
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_INDRECT_ACCESS_STATUS,&busyFlag);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    if(busyFlag)
-+        return RT_ERR_BUSYWAIT_TIMEOUT;
-+
-+    /* OCP prefix */
-+    ocpAddrPrefix = ((ocpAddr & 0xFC00) >> 10);
-+    if((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_GPHY_OCP_MSB_0, RTL8367C_CFG_CPU_OCPADR_MSB_MASK, ocpAddrPrefix)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*prepare access address*/
-+    ocpAddr9_6 = ((ocpAddr >> 6) & 0x000F);
-+    ocpAddr5_1 = ((ocpAddr >> 1) & 0x001F);
-+    regData = RTL8367C_PHY_BASE | (ocpAddr9_6 << 8) | (phyNo << RTL8367C_PHY_OFFSET) | ocpAddr5_1;
-+    retVal = rtl8367c_setAsicReg(RTL8367C_REG_INDRECT_ACCESS_ADDRESS, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /*Set READ Command*/
-+    retVal = rtl8367c_setAsicReg(RTL8367C_REG_INDRECT_ACCESS_CTRL, RTL8367C_CMD_MASK );
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    checkCounter = 100;
-+    while(checkCounter)
-+    {
-+        retVal = rtl8367c_getAsicReg(RTL8367C_REG_INDRECT_ACCESS_STATUS,&busyFlag);
-+        if((retVal != RT_ERR_OK) || busyFlag)
-+        {
-+            checkCounter --;
-+            if(0 == checkCounter)
-+                return RT_ERR_FAILED;
-+        }
-+        else
-+        {
-+            checkCounter = 0;
-+        }
-+    }
-+
-+    /*get PHY register*/
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_INDRECT_ACCESS_READ_DATA, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *pRegData = regData;
-+
-+    return RT_ERR_OK;
-+}
-+
-+#endif
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicPHYReg
-+ * Description:
-+ *      Set PHY registers
-+ * Input:
-+ *      phyNo   - Physical port number (0~7)
-+ *      phyAddr - PHY address (0~31)
-+ *      phyData - Writing data
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PHY_REG_ID       - invalid PHY address
-+ *      RT_ERR_PHY_ID           - invalid PHY no
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPHYReg(rtk_uint32 phyNo, rtk_uint32 phyAddr, rtk_uint32 phyData )
-+{
-+    rtk_uint32 ocp_addr;
-+
-+    if(phyAddr > RTL8367C_PHY_REGNOMAX)
-+        return RT_ERR_PHY_REG_ID;
-+
-+    ocp_addr = 0xa400 + phyAddr*2;
-+
-+    return rtl8367c_setAsicPHYOCPReg(phyNo, ocp_addr, phyData);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPHYReg
-+ * Description:
-+ *      Get PHY registers
-+ * Input:
-+ *      phyNo   - Physical port number (0~7)
-+ *      phyAddr - PHY address (0~31)
-+ *      pRegData - Writing data
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PHY_REG_ID       - invalid PHY address
-+ *      RT_ERR_PHY_ID           - invalid PHY no
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPHYReg(rtk_uint32 phyNo, rtk_uint32 phyAddr, rtk_uint32 *pRegData )
-+{
-+    rtk_uint32 ocp_addr;
-+
-+    if(phyAddr > RTL8367C_PHY_REGNOMAX)
-+        return RT_ERR_PHY_REG_ID;
-+
-+    ocp_addr = 0xa400 + phyAddr*2;
-+
-+    return rtl8367c_getAsicPHYOCPReg(phyNo, ocp_addr, pRegData);
-+}
-+
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicSdsReg
-+ * Description:
-+ *      Set Serdes registers
-+ * Input:
-+ *      sdsId   - sdsid (0~1)
-+ *      sdsReg - reg address (0~31)
-+ *      sdsPage - Writing data
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+
-+ * Note:
-+ *      None
-+ */
-+
-+ret_t rtl8367c_setAsicSdsReg(rtk_uint32 sdsId, rtk_uint32 sdsReg, rtk_uint32 sdsPage,  rtk_uint32 value)
-+{
-+    rtk_uint32 retVal;
-+
-+    if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, value)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, (sdsPage<<5) | sdsReg)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0|sdsId)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAiscSdsReg
-+ * Description:
-+ *      Get Serdes registers
-+ * Input:
-+ *      sdsId   - sdsid (0~1)
-+ *      sdsReg - reg address (0~31)
-+ *      sdsPage - Writing data
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSdsReg(rtk_uint32 sdsId, rtk_uint32 sdsReg, rtk_uint32 sdsPage, rtk_uint32 *value)
-+{
-+    rtk_uint32 retVal, busy;
-+
-+    if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, (sdsPage<<5) | sdsReg)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x0080|sdsId)) != RT_ERR_OK)
-+        return retVal;
-+
-+    while(1)
-+    {
-+        if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_SDS_INDACS_CMD, &busy))!=RT_ERR_OK)
-+            return retVal;
-+
-+        if ((busy & 0x100) == 0)
-+            break;
-+    }
-+
-+    if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_SDS_INDACS_DATA, value))!=RT_ERR_OK)
-+            return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_port.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_port.c
-new file mode 100644
-index 0000000000..78e80a0b20
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_port.c
-@@ -0,0 +1,5752 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76333 $
-+ * $Date: 2017-03-09 09:33:15 +0800 (週四, 09 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Port security related functions
-+ *
-+ */
-+
-+#include <rtl8367c_asicdrv_port.h>
-+
-+#include <string.h>
-+
-+
-+#define FIBER2_AUTO_INIT_SIZE 2038
-+rtk_uint8 Fiber2_Auto[FIBER2_AUTO_INIT_SIZE] = {
-+0x02,0x05,0x8F,0xE4,0xF5,0xA8,0xD2,0xAF,
-+0x22,0x00,0x00,0x02,0x07,0x2C,0xC5,0xF0,
-+0xF8,0xA3,0xE0,0x28,0xF0,0xC5,0xF0,0xF8,
-+0xE5,0x82,0x15,0x82,0x70,0x02,0x15,0x83,
-+0xE0,0x38,0xF0,0x22,0x75,0xF0,0x08,0x75,
-+0x82,0x00,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,
-+0xCD,0x33,0xCD,0xCC,0x33,0xCC,0xC5,0x82,
-+0x33,0xC5,0x82,0x9B,0xED,0x9A,0xEC,0x99,
-+0xE5,0x82,0x98,0x40,0x0C,0xF5,0x82,0xEE,
-+0x9B,0xFE,0xED,0x9A,0xFD,0xEC,0x99,0xFC,
-+0x0F,0xD5,0xF0,0xD6,0xE4,0xCE,0xFB,0xE4,
-+0xCD,0xFA,0xE4,0xCC,0xF9,0xA8,0x82,0x22,
-+0xB8,0x00,0xC1,0xB9,0x00,0x59,0xBA,0x00,
-+0x2D,0xEC,0x8B,0xF0,0x84,0xCF,0xCE,0xCD,
-+0xFC,0xE5,0xF0,0xCB,0xF9,0x78,0x18,0xEF,
-+0x2F,0xFF,0xEE,0x33,0xFE,0xED,0x33,0xFD,
-+0xEC,0x33,0xFC,0xEB,0x33,0xFB,0x10,0xD7,
-+0x03,0x99,0x40,0x04,0xEB,0x99,0xFB,0x0F,
-+0xD8,0xE5,0xE4,0xF9,0xFA,0x22,0x78,0x18,
-+0xEF,0x2F,0xFF,0xEE,0x33,0xFE,0xED,0x33,
-+0xFD,0xEC,0x33,0xFC,0xC9,0x33,0xC9,0x10,
-+0xD7,0x05,0x9B,0xE9,0x9A,0x40,0x07,0xEC,
-+0x9B,0xFC,0xE9,0x9A,0xF9,0x0F,0xD8,0xE0,
-+0xE4,0xC9,0xFA,0xE4,0xCC,0xFB,0x22,0x75,
-+0xF0,0x10,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,
-+0xED,0x33,0xFD,0xCC,0x33,0xCC,0xC8,0x33,
-+0xC8,0x10,0xD7,0x07,0x9B,0xEC,0x9A,0xE8,
-+0x99,0x40,0x0A,0xED,0x9B,0xFD,0xEC,0x9A,
-+0xFC,0xE8,0x99,0xF8,0x0F,0xD5,0xF0,0xDA,
-+0xE4,0xCD,0xFB,0xE4,0xCC,0xFA,0xE4,0xC8,
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-+0x02,0x07,0xAB,0xC2,0xAF,0xAB,0x07,0xAA,
-+0x06,0x8A,0xA2,0x8B,0xA3,0x8C,0xA4,0x8D,
-+0xA5,0x75,0xA0,0x03,0x00,0x00,0x00,0xAA,
-+0xA1,0xBA,0x00,0xF8,0xD2,0xAF,0x22,0x7F,
-+0x0C,0x7E,0x13,0x12,0x07,0x66,0xEF,0x44,
-+0x50,0xFD,0xAC,0x06,0x7F,0x0C,0x7E,0x13,
-+0x02,0x07,0xAB,0x12,0x07,0xC7,0x12,0x07,
-+0xF2,0x12,0x04,0x2B,0x02,0x00,0x03,0x42,
-+0x06,0x33,0x00,0x00,0x42,0x06,0x31,0x00,
-+0x00,0x00,0xE4,0xF5,0x8E,0x22,};
-+
-+#define FIBER2_1G_INIT_SIZE 2032
-+rtk_uint8 Fiber2_1G[FIBER2_1G_INIT_SIZE] = {
-+0x02,0x05,0x89,0xE4,0xF5,0xA8,0xD2,0xAF,
-+0x22,0x00,0x00,0x02,0x07,0x26,0xC5,0xF0,
-+0xF8,0xA3,0xE0,0x28,0xF0,0xC5,0xF0,0xF8,
-+0xE5,0x82,0x15,0x82,0x70,0x02,0x15,0x83,
-+0xE0,0x38,0xF0,0x22,0x75,0xF0,0x08,0x75,
-+0x82,0x00,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,
-+0xCD,0x33,0xCD,0xCC,0x33,0xCC,0xC5,0x82,
-+0x33,0xC5,0x82,0x9B,0xED,0x9A,0xEC,0x99,
-+0xE5,0x82,0x98,0x40,0x0C,0xF5,0x82,0xEE,
-+0x9B,0xFE,0xED,0x9A,0xFD,0xEC,0x99,0xFC,
-+0x0F,0xD5,0xF0,0xD6,0xE4,0xCE,0xFB,0xE4,
-+0xCD,0xFA,0xE4,0xCC,0xF9,0xA8,0x82,0x22,
-+0xB8,0x00,0xC1,0xB9,0x00,0x59,0xBA,0x00,
-+0x2D,0xEC,0x8B,0xF0,0x84,0xCF,0xCE,0xCD,
-+0xFC,0xE5,0xF0,0xCB,0xF9,0x78,0x18,0xEF,
-+0x2F,0xFF,0xEE,0x33,0xFE,0xED,0x33,0xFD,
-+0xEC,0x33,0xFC,0xEB,0x33,0xFB,0x10,0xD7,
-+0x03,0x99,0x40,0x04,0xEB,0x99,0xFB,0x0F,
-+0xD8,0xE5,0xE4,0xF9,0xFA,0x22,0x78,0x18,
-+0xEF,0x2F,0xFF,0xEE,0x33,0xFE,0xED,0x33,
-+0xFD,0xEC,0x33,0xFC,0xC9,0x33,0xC9,0x10,
-+0xD7,0x05,0x9B,0xE9,0x9A,0x40,0x07,0xEC,
-+0x9B,0xFC,0xE9,0x9A,0xF9,0x0F,0xD8,0xE0,
-+0xE4,0xC9,0xFA,0xE4,0xCC,0xFB,0x22,0x75,
-+0xF0,0x10,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,
-+0xED,0x33,0xFD,0xCC,0x33,0xCC,0xC8,0x33,
-+0xC8,0x10,0xD7,0x07,0x9B,0xEC,0x9A,0xE8,
-+0x99,0x40,0x0A,0xED,0x9B,0xFD,0xEC,0x9A,
-+0xFC,0xE8,0x99,0xF8,0x0F,0xD5,0xF0,0xDA,
-+0xE4,0xCD,0xFB,0xE4,0xCC,0xFA,0xE4,0xC8,
-+0xF9,0x22,0xEB,0x9F,0xF5,0xF0,0xEA,0x9E,
-+0x42,0xF0,0xE9,0x9D,0x42,0xF0,0xE8,0x9C,
-+0x45,0xF0,0x22,0xE0,0xFC,0xA3,0xE0,0xFD,
-+0xA3,0xE0,0xFE,0xA3,0xE0,0xFF,0x22,0xE0,
-+0xF8,0xA3,0xE0,0xF9,0xA3,0xE0,0xFA,0xA3,
-+0xE0,0xFB,0x22,0xEC,0xF0,0xA3,0xED,0xF0,
-+0xA3,0xEE,0xF0,0xA3,0xEF,0xF0,0x22,0x7D,
-+0xD7,0x7C,0x04,0x7F,0x02,0x7E,0x66,0x12,
-+0x07,0xA5,0x7D,0x80,0x7C,0x04,0x7F,0x01,
-+0x7E,0x66,0x12,0x07,0xA5,0x7D,0xC0,0x7C,
-+0x00,0x7F,0x00,0x7E,0x66,0x12,0x07,0xA5,
-+0x7D,0x94,0x7C,0xF9,0x7F,0x02,0x7E,0x66,
-+0x12,0x07,0xA5,0x7D,0x81,0x7C,0x04,0x7F,
-+0x01,0x7E,0x66,0x12,0x07,0xA5,0x7D,0xC0,
-+0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0xA2,0x7C,0x31,0x7F,0x02,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0x82,0x7C,0x04,
-+0x7F,0x01,0x7E,0x66,0x12,0x07,0xA5,0x7D,
-+0xC0,0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,
-+0x07,0xA5,0x7D,0x60,0x7C,0x69,0x7F,0x02,
-+0x7E,0x66,0x12,0x07,0xA5,0x7D,0x83,0x7C,
-+0x04,0x7F,0x01,0x7E,0x66,0x12,0x07,0xA5,
-+0x7D,0xC0,0x7C,0x00,0x7F,0x00,0x7E,0x66,
-+0x12,0x07,0xA5,0x7D,0x28,0x7C,0x97,0x7F,
-+0x02,0x7E,0x66,0x12,0x07,0xA5,0x7D,0x84,
-+0x7C,0x04,0x7F,0x01,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0xC0,0x7C,0x00,0x7F,0x00,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0x85,0x7C,0x9D,
-+0x7F,0x02,0x7E,0x66,0x12,0x07,0xA5,0x7D,
-+0x23,0x7C,0x04,0x7F,0x01,0x7E,0x66,0x12,
-+0x07,0xA5,0x7D,0xC0,0x7C,0x00,0x7F,0x00,
-+0x7E,0x66,0x12,0x07,0xA5,0x7D,0x10,0x7C,
-+0xD8,0x7F,0x02,0x7E,0x66,0x12,0x07,0xA5,
-+0x7D,0x24,0x7C,0x04,0x7F,0x01,0x7E,0x66,
-+0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,0x7F,
-+0x00,0x7E,0x66,0x12,0x07,0xA5,0x7D,0x00,
-+0x7C,0x04,0x7F,0x02,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0x2F,0x7C,0x00,0x7F,0x01,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,
-+0x7F,0x00,0x7E,0x66,0x02,0x07,0xA5,0x7D,
-+0x03,0x7C,0x00,0x7F,0x01,0x7E,0x66,0x12,
-+0x07,0xA5,0x7D,0x80,0x7C,0x00,0x7F,0x00,
-+0x7E,0x66,0x12,0x07,0xA5,0x7F,0x02,0x7E,
-+0x66,0x12,0x07,0x60,0xEF,0x44,0x40,0xFD,
-+0xAC,0x06,0x7F,0x02,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0x03,0x7C,0x00,0x7F,0x01,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,
-+0x7F,0x00,0x7E,0x66,0x12,0x07,0xA5,0x7D,
-+0x03,0x7C,0x00,0x7F,0x01,0x7E,0x66,0x12,
-+0x07,0xA5,0x7D,0x80,0x7C,0x00,0x7F,0x00,
-+0x7E,0x66,0x12,0x07,0xA5,0x7F,0x02,0x7E,
-+0x66,0x12,0x07,0x60,0xEF,0x54,0xBF,0xFD,
-+0xAC,0x06,0x7F,0x02,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0x03,0x7C,0x00,0x7F,0x01,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,
-+0x7F,0x00,0x7E,0x66,0x12,0x07,0xA5,0xE4,
-+0xFD,0xFC,0x7F,0x01,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0x80,0x7C,0x00,0x7F,0x00,0x7E,
-+0x66,0x12,0x07,0xA5,0x7F,0x02,0x7E,0x66,
-+0x12,0x07,0x60,0xEF,0x54,0xFD,0x54,0xFE,
-+0xFD,0xAC,0x06,0x7F,0x02,0x7E,0x66,0x12,
-+0x07,0xA5,0xE4,0xFD,0xFC,0x7F,0x01,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,
-+0x7F,0x00,0x7E,0x66,0x12,0x07,0xA5,0xE4,
-+0xFD,0xFC,0x7F,0x01,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0x80,0x7C,0x00,0x7F,0x00,0x7E,
-+0x66,0x12,0x07,0xA5,0x7F,0x02,0x7E,0x66,
-+0x12,0x07,0x60,0xEF,0x44,0x02,0x44,0x01,
-+0xFD,0xAC,0x06,0x7F,0x02,0x7E,0x66,0x12,
-+0x07,0xA5,0xE4,0xFD,0xFC,0x7F,0x01,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,
-+0x7F,0x00,0x7E,0x66,0x02,0x07,0xA5,0xE4,
-+0x90,0x06,0x2C,0xF0,0xFD,0x7C,0x01,0x7F,
-+0x3F,0x7E,0x1D,0x12,0x07,0xA5,0x7D,0x40,
-+0x7C,0x00,0x7F,0x36,0x7E,0x13,0x12,0x07,
-+0xA5,0xE4,0xFF,0xFE,0xFD,0x80,0x25,0xE4,
-+0x7F,0xFF,0x7E,0xFF,0xFD,0xFC,0x90,0x06,
-+0x24,0x12,0x01,0x0F,0xC3,0x12,0x00,0xF2,
-+0x50,0x1B,0x90,0x06,0x24,0x12,0x01,0x03,
-+0xEF,0x24,0x01,0xFF,0xE4,0x3E,0xFE,0xE4,
-+0x3D,0xFD,0xE4,0x3C,0xFC,0x90,0x06,0x24,
-+0x12,0x01,0x1B,0x80,0xD2,0xE4,0xF5,0xA8,
-+0xD2,0xAF,0x7D,0x1F,0xFC,0x7F,0x49,0x7E,
-+0x13,0x12,0x07,0xA5,0x12,0x07,0xD5,0x12,
-+0x01,0x27,0x12,0x06,0x9F,0x7D,0x41,0x7C,
-+0x00,0x7F,0x36,0x7E,0x13,0x12,0x07,0xA5,
-+0xE4,0xFF,0xFE,0xFD,0x80,0x26,0x7F,0xFF,
-+0x7E,0xFF,0x7D,0x05,0x7C,0x00,0x90,0x06,
-+0x24,0x12,0x01,0x0F,0xC3,0x12,0x00,0xF2,
-+0x50,0x1B,0x90,0x06,0x24,0x12,0x01,0x03,
-+0xEF,0x24,0x01,0xFF,0xE4,0x3E,0xFE,0xE4,
-+0x3D,0xFD,0xE4,0x3C,0xFC,0x90,0x06,0x24,
-+0x12,0x01,0x1B,0x80,0xD1,0xC2,0x00,0xC2,
-+0x01,0xD2,0xA9,0xD2,0x8C,0x7F,0x01,0x7E,
-+0x62,0x12,0x07,0x60,0xEF,0x30,0xE2,0x07,
-+0xE4,0x90,0x06,0x2C,0xF0,0x80,0xEE,0x90,
-+0x06,0x2C,0xE0,0x70,0x12,0x12,0x04,0xEA,
-+0x90,0x06,0x2C,0x74,0x01,0xF0,0xE4,0x90,
-+0x06,0x33,0xF0,0xA3,0xF0,0x80,0xD6,0xC3,
-+0x90,0x06,0x34,0xE0,0x94,0x62,0x90,0x06,
-+0x33,0xE0,0x94,0x00,0x40,0xC7,0xE4,0xF0,
-+0xA3,0xF0,0x12,0x04,0xEA,0x90,0x06,0x2C,
-+0x74,0x01,0xF0,0x80,0xB8,0x75,0x0F,0x80,
-+0x75,0x0E,0x7E,0x75,0x0D,0xAA,0x75,0x0C,
-+0x83,0xE4,0xF5,0x10,0x7F,0x36,0x7E,0x13,
-+0x12,0x07,0x60,0xEE,0xC4,0xF8,0x54,0xF0,
-+0xC8,0xEF,0xC4,0x54,0x0F,0x48,0x54,0x07,
-+0xFB,0x7A,0x00,0xEA,0x70,0x4A,0xEB,0x14,
-+0x60,0x1C,0x14,0x60,0x27,0x24,0xFE,0x60,
-+0x31,0x14,0x60,0x3C,0x24,0x05,0x70,0x38,
-+0x75,0x0B,0x00,0x75,0x0A,0xC2,0x75,0x09,
-+0xEB,0x75,0x08,0x0B,0x80,0x36,0x75,0x0B,
-+0x40,0x75,0x0A,0x59,0x75,0x09,0x73,0x75,
-+0x08,0x07,0x80,0x28,0x75,0x0B,0x00,0x75,
-+0x0A,0xE1,0x75,0x09,0xF5,0x75,0x08,0x05,
-+0x80,0x1A,0x75,0x0B,0xA0,0x75,0x0A,0xAC,
-+0x75,0x09,0xB9,0x75,0x08,0x03,0x80,0x0C,
-+0x75,0x0B,0x00,0x75,0x0A,0x62,0x75,0x09,
-+0x3D,0x75,0x08,0x01,0x75,0x89,0x11,0xE4,
-+0x7B,0x60,0x7A,0x09,0xF9,0xF8,0xAF,0x0B,
-+0xAE,0x0A,0xAD,0x09,0xAC,0x08,0x12,0x00,
-+0x60,0xAA,0x06,0xAB,0x07,0xC3,0xE4,0x9B,
-+0xFB,0xE4,0x9A,0xFA,0x78,0x17,0xF6,0xAF,
-+0x03,0xEF,0x08,0xF6,0x18,0xE6,0xF5,0x8C,
-+0x08,0xE6,0xF5,0x8A,0x74,0x0D,0x2B,0xFB,
-+0xE4,0x3A,0x18,0xF6,0xAF,0x03,0xEF,0x08,
-+0xF6,0x75,0x88,0x10,0x53,0x8E,0xC7,0xD2,
-+0xA9,0x22,0x7F,0x10,0x7E,0x13,0x12,0x07,
-+0x60,0x90,0x06,0x2D,0xEE,0xF0,0xA3,0xEF,
-+0xF0,0xEE,0x44,0x10,0xFE,0x90,0x06,0x2D,
-+0xF0,0xA3,0xEF,0xF0,0x54,0xEF,0xFF,0x90,
-+0x06,0x2D,0xEE,0xF0,0xFC,0xA3,0xEF,0xF0,
-+0xFD,0x7F,0x10,0x7E,0x13,0x12,0x07,0xA5,
-+0xE4,0xFF,0xFE,0x0F,0xBF,0x00,0x01,0x0E,
-+0xEF,0x64,0x64,0x4E,0x70,0xF5,0x7D,0x04,
-+0x7C,0x00,0x7F,0x02,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0x00,0x7C,0x04,0x7F,0x01,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,
-+0x7F,0x00,0x7E,0x66,0x12,0x07,0xA5,0xE4,
-+0xFD,0xFC,0x7F,0x02,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0x00,0x7C,0x04,0x7F,0x01,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,
-+0x7F,0x00,0x7E,0x66,0x12,0x07,0xA5,0x7F,
-+0x10,0x7E,0x13,0x12,0x07,0x60,0x90,0x06,
-+0x2D,0xEE,0xF0,0xA3,0xEF,0xF0,0xEE,0x54,
-+0xEF,0x90,0x06,0x2D,0xF0,0xFC,0xA3,0xEF,
-+0xF0,0xFD,0x7F,0x10,0x7E,0x13,0x02,0x07,
-+0xA5,0x78,0x7F,0xE4,0xF6,0xD8,0xFD,0x75,
-+0x81,0x3C,0x02,0x05,0xD0,0x02,0x03,0x2F,
-+0xE4,0x93,0xA3,0xF8,0xE4,0x93,0xA3,0x40,
-+0x03,0xF6,0x80,0x01,0xF2,0x08,0xDF,0xF4,
-+0x80,0x29,0xE4,0x93,0xA3,0xF8,0x54,0x07,
-+0x24,0x0C,0xC8,0xC3,0x33,0xC4,0x54,0x0F,
-+0x44,0x20,0xC8,0x83,0x40,0x04,0xF4,0x56,
-+0x80,0x01,0x46,0xF6,0xDF,0xE4,0x80,0x0B,
-+0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,
-+0x90,0x07,0xE1,0xE4,0x7E,0x01,0x93,0x60,
-+0xBC,0xA3,0xFF,0x54,0x3F,0x30,0xE5,0x09,
-+0x54,0x1F,0xFE,0xE4,0x93,0xA3,0x60,0x01,
-+0x0E,0xCF,0x54,0xC0,0x25,0xE0,0x60,0xA8,
-+0x40,0xB8,0xE4,0x93,0xA3,0xFA,0xE4,0x93,
-+0xA3,0xF8,0xE4,0x93,0xA3,0xC8,0xC5,0x82,
-+0xC8,0xCA,0xC5,0x83,0xCA,0xF0,0xA3,0xC8,
-+0xC5,0x82,0xC8,0xCA,0xC5,0x83,0xCA,0xDF,
-+0xE9,0xDE,0xE7,0x80,0xBE,0x7D,0x40,0x7C,
-+0x17,0x7F,0x11,0x7E,0x1D,0x12,0x07,0xA5,
-+0x7F,0x41,0x7E,0x1D,0x12,0x07,0x60,0xEF,
-+0x44,0x20,0x44,0x80,0xFD,0xAC,0x06,0x7F,
-+0x41,0x7E,0x1D,0x12,0x07,0xA5,0x7D,0xBB,
-+0x7C,0x15,0x7F,0xEB,0x7E,0x13,0x12,0x07,
-+0xA5,0x7D,0x07,0x7C,0x00,0x7F,0xE7,0x7E,
-+0x13,0x12,0x07,0xA5,0x7D,0x40,0x7C,0x11,
-+0x7F,0x00,0x7E,0x62,0x12,0x07,0xA5,0x02,
-+0x02,0x2F,0x7D,0xC0,0x7C,0x16,0x7F,0x11,
-+0x7E,0x1D,0x12,0x07,0xA5,0x7D,0xBB,0x7C,
-+0x15,0x7F,0xEB,0x7E,0x13,0x12,0x07,0xA5,
-+0x7D,0x0D,0x7C,0x00,0x7F,0xE7,0x7E,0x13,
-+0x12,0x07,0xA5,0x7F,0x41,0x7E,0x1D,0x12,
-+0x07,0x60,0xEF,0x44,0x20,0x44,0x80,0xFD,
-+0xAC,0x06,0x7F,0x41,0x7E,0x1D,0x12,0x07,
-+0xA5,0x7D,0x00,0x7C,0x21,0x7F,0x00,0x7E,
-+0x62,0x12,0x07,0xA5,0x02,0x02,0x2F,0x7D,
-+0x40,0x7C,0x17,0x7F,0x11,0x7E,0x1D,0x12,
-+0x07,0xA5,0x7D,0xBB,0x7C,0x15,0x7F,0xEB,
-+0x7E,0x13,0x12,0x07,0xA5,0x7D,0x0C,0x7C,
-+0x00,0x7F,0xE7,0x7E,0x13,0x12,0x07,0xA5,
-+0x7F,0x41,0x7E,0x1D,0x12,0x07,0x60,0xEF,
-+0x44,0x20,0x44,0x80,0xFD,0xAC,0x06,0x7F,
-+0x41,0x7E,0x1D,0x12,0x07,0xA5,0x7D,0x40,
-+0x7C,0x11,0x7F,0x00,0x7E,0x62,0x12,0x07,
-+0xA5,0x02,0x02,0x2F,0x7D,0x04,0x7C,0x00,
-+0x7F,0x01,0x7E,0x66,0x12,0x07,0xA5,0x7D,
-+0x80,0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,
-+0x07,0xA5,0x7F,0x02,0x7E,0x66,0x12,0x07,
-+0x60,0xEF,0x44,0x02,0x44,0x04,0xFD,0xAC,
-+0x06,0x7F,0x02,0x7E,0x66,0x12,0x07,0xA5,
-+0x7D,0x04,0x7C,0x00,0x7F,0x01,0x7E,0x66,
-+0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,0x7F,
-+0x00,0x7E,0x66,0x02,0x07,0xA5,0xC0,0xE0,
-+0xC0,0xF0,0xC0,0x83,0xC0,0x82,0xC0,0xD0,
-+0x75,0xD0,0x00,0xC0,0x00,0x78,0x17,0xE6,
-+0xF5,0x8C,0x78,0x18,0xE6,0xF5,0x8A,0x90,
-+0x06,0x31,0xE4,0x75,0xF0,0x01,0x12,0x00,
-+0x0E,0x90,0x06,0x33,0xE4,0x75,0xF0,0x01,
-+0x12,0x00,0x0E,0xD0,0x00,0xD0,0xD0,0xD0,
-+0x82,0xD0,0x83,0xD0,0xF0,0xD0,0xE0,0x32,
-+0xC2,0xAF,0xAD,0x07,0xAC,0x06,0x8C,0xA2,
-+0x8D,0xA3,0x75,0xA0,0x01,0x00,0x00,0x00,
-+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-+0xAE,0xA1,0xBE,0x00,0xF0,0xAE,0xA6,0xAF,
-+0xA7,0xD2,0xAF,0x22,0x7D,0x20,0x7C,0x0F,
-+0x7F,0x02,0x7E,0x66,0x12,0x07,0xA5,0x7D,
-+0x01,0x7C,0x00,0x7F,0x01,0x7E,0x66,0x12,
-+0x07,0xA5,0x7D,0xC0,0x7C,0x00,0x7F,0x00,
-+0x7E,0x66,0x02,0x07,0xA5,0xC2,0xAF,0xAB,
-+0x07,0xAA,0x06,0x8A,0xA2,0x8B,0xA3,0x8C,
-+0xA4,0x8D,0xA5,0x75,0xA0,0x03,0x00,0x00,
-+0x00,0xAA,0xA1,0xBA,0x00,0xF8,0xD2,0xAF,
-+0x22,0x7F,0x0C,0x7E,0x13,0x12,0x07,0x60,
-+0xEF,0x44,0x50,0xFD,0xAC,0x06,0x7F,0x0C,
-+0x7E,0x13,0x02,0x07,0xA5,0x12,0x07,0xC1,
-+0x12,0x07,0xEC,0x12,0x04,0x25,0x02,0x00,
-+0x03,0x42,0x06,0x33,0x00,0x00,0x42,0x06,
-+0x31,0x00,0x00,0x00,0xE4,0xF5,0x8E,0x22,};
-+
-+#define FIBER2_100M_INIT_SIZE 2032
-+rtk_uint8 Fiber2_100M[FIBER2_100M_INIT_SIZE] = {
-+0x02,0x05,0x89,0xE4,0xF5,0xA8,0xD2,0xAF,
-+0x22,0x00,0x00,0x02,0x07,0x26,0xC5,0xF0,
-+0xF8,0xA3,0xE0,0x28,0xF0,0xC5,0xF0,0xF8,
-+0xE5,0x82,0x15,0x82,0x70,0x02,0x15,0x83,
-+0xE0,0x38,0xF0,0x22,0x75,0xF0,0x08,0x75,
-+0x82,0x00,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,
-+0xCD,0x33,0xCD,0xCC,0x33,0xCC,0xC5,0x82,
-+0x33,0xC5,0x82,0x9B,0xED,0x9A,0xEC,0x99,
-+0xE5,0x82,0x98,0x40,0x0C,0xF5,0x82,0xEE,
-+0x9B,0xFE,0xED,0x9A,0xFD,0xEC,0x99,0xFC,
-+0x0F,0xD5,0xF0,0xD6,0xE4,0xCE,0xFB,0xE4,
-+0xCD,0xFA,0xE4,0xCC,0xF9,0xA8,0x82,0x22,
-+0xB8,0x00,0xC1,0xB9,0x00,0x59,0xBA,0x00,
-+0x2D,0xEC,0x8B,0xF0,0x84,0xCF,0xCE,0xCD,
-+0xFC,0xE5,0xF0,0xCB,0xF9,0x78,0x18,0xEF,
-+0x2F,0xFF,0xEE,0x33,0xFE,0xED,0x33,0xFD,
-+0xEC,0x33,0xFC,0xEB,0x33,0xFB,0x10,0xD7,
-+0x03,0x99,0x40,0x04,0xEB,0x99,0xFB,0x0F,
-+0xD8,0xE5,0xE4,0xF9,0xFA,0x22,0x78,0x18,
-+0xEF,0x2F,0xFF,0xEE,0x33,0xFE,0xED,0x33,
-+0xFD,0xEC,0x33,0xFC,0xC9,0x33,0xC9,0x10,
-+0xD7,0x05,0x9B,0xE9,0x9A,0x40,0x07,0xEC,
-+0x9B,0xFC,0xE9,0x9A,0xF9,0x0F,0xD8,0xE0,
-+0xE4,0xC9,0xFA,0xE4,0xCC,0xFB,0x22,0x75,
-+0xF0,0x10,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,
-+0xED,0x33,0xFD,0xCC,0x33,0xCC,0xC8,0x33,
-+0xC8,0x10,0xD7,0x07,0x9B,0xEC,0x9A,0xE8,
-+0x99,0x40,0x0A,0xED,0x9B,0xFD,0xEC,0x9A,
-+0xFC,0xE8,0x99,0xF8,0x0F,0xD5,0xF0,0xDA,
-+0xE4,0xCD,0xFB,0xE4,0xCC,0xFA,0xE4,0xC8,
-+0xF9,0x22,0xEB,0x9F,0xF5,0xF0,0xEA,0x9E,
-+0x42,0xF0,0xE9,0x9D,0x42,0xF0,0xE8,0x9C,
-+0x45,0xF0,0x22,0xE0,0xFC,0xA3,0xE0,0xFD,
-+0xA3,0xE0,0xFE,0xA3,0xE0,0xFF,0x22,0xE0,
-+0xF8,0xA3,0xE0,0xF9,0xA3,0xE0,0xFA,0xA3,
-+0xE0,0xFB,0x22,0xEC,0xF0,0xA3,0xED,0xF0,
-+0xA3,0xEE,0xF0,0xA3,0xEF,0xF0,0x22,0x7D,
-+0xD7,0x7C,0x04,0x7F,0x02,0x7E,0x66,0x12,
-+0x07,0xA5,0x7D,0x80,0x7C,0x04,0x7F,0x01,
-+0x7E,0x66,0x12,0x07,0xA5,0x7D,0xC0,0x7C,
-+0x00,0x7F,0x00,0x7E,0x66,0x12,0x07,0xA5,
-+0x7D,0x94,0x7C,0xF9,0x7F,0x02,0x7E,0x66,
-+0x12,0x07,0xA5,0x7D,0x81,0x7C,0x04,0x7F,
-+0x01,0x7E,0x66,0x12,0x07,0xA5,0x7D,0xC0,
-+0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0xA2,0x7C,0x31,0x7F,0x02,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0x82,0x7C,0x04,
-+0x7F,0x01,0x7E,0x66,0x12,0x07,0xA5,0x7D,
-+0xC0,0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,
-+0x07,0xA5,0x7D,0x60,0x7C,0x69,0x7F,0x02,
-+0x7E,0x66,0x12,0x07,0xA5,0x7D,0x83,0x7C,
-+0x04,0x7F,0x01,0x7E,0x66,0x12,0x07,0xA5,
-+0x7D,0xC0,0x7C,0x00,0x7F,0x00,0x7E,0x66,
-+0x12,0x07,0xA5,0x7D,0x28,0x7C,0x97,0x7F,
-+0x02,0x7E,0x66,0x12,0x07,0xA5,0x7D,0x84,
-+0x7C,0x04,0x7F,0x01,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0xC0,0x7C,0x00,0x7F,0x00,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0x85,0x7C,0x9D,
-+0x7F,0x02,0x7E,0x66,0x12,0x07,0xA5,0x7D,
-+0x23,0x7C,0x04,0x7F,0x01,0x7E,0x66,0x12,
-+0x07,0xA5,0x7D,0xC0,0x7C,0x00,0x7F,0x00,
-+0x7E,0x66,0x12,0x07,0xA5,0x7D,0x10,0x7C,
-+0xD8,0x7F,0x02,0x7E,0x66,0x12,0x07,0xA5,
-+0x7D,0x24,0x7C,0x04,0x7F,0x01,0x7E,0x66,
-+0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,0x7F,
-+0x00,0x7E,0x66,0x12,0x07,0xA5,0x7D,0x00,
-+0x7C,0x04,0x7F,0x02,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0x2F,0x7C,0x00,0x7F,0x01,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,
-+0x7F,0x00,0x7E,0x66,0x02,0x07,0xA5,0x7D,
-+0x03,0x7C,0x00,0x7F,0x01,0x7E,0x66,0x12,
-+0x07,0xA5,0x7D,0x80,0x7C,0x00,0x7F,0x00,
-+0x7E,0x66,0x12,0x07,0xA5,0x7F,0x02,0x7E,
-+0x66,0x12,0x07,0x60,0xEF,0x44,0x40,0xFD,
-+0xAC,0x06,0x7F,0x02,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0x03,0x7C,0x00,0x7F,0x01,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,
-+0x7F,0x00,0x7E,0x66,0x12,0x07,0xA5,0x7D,
-+0x03,0x7C,0x00,0x7F,0x01,0x7E,0x66,0x12,
-+0x07,0xA5,0x7D,0x80,0x7C,0x00,0x7F,0x00,
-+0x7E,0x66,0x12,0x07,0xA5,0x7F,0x02,0x7E,
-+0x66,0x12,0x07,0x60,0xEF,0x54,0xBF,0xFD,
-+0xAC,0x06,0x7F,0x02,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0x03,0x7C,0x00,0x7F,0x01,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,
-+0x7F,0x00,0x7E,0x66,0x12,0x07,0xA5,0xE4,
-+0xFD,0xFC,0x7F,0x01,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0x80,0x7C,0x00,0x7F,0x00,0x7E,
-+0x66,0x12,0x07,0xA5,0x7F,0x02,0x7E,0x66,
-+0x12,0x07,0x60,0xEF,0x54,0xFD,0x54,0xFE,
-+0xFD,0xAC,0x06,0x7F,0x02,0x7E,0x66,0x12,
-+0x07,0xA5,0xE4,0xFD,0xFC,0x7F,0x01,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,
-+0x7F,0x00,0x7E,0x66,0x12,0x07,0xA5,0xE4,
-+0xFD,0xFC,0x7F,0x01,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0x80,0x7C,0x00,0x7F,0x00,0x7E,
-+0x66,0x12,0x07,0xA5,0x7F,0x02,0x7E,0x66,
-+0x12,0x07,0x60,0xEF,0x44,0x02,0x44,0x01,
-+0xFD,0xAC,0x06,0x7F,0x02,0x7E,0x66,0x12,
-+0x07,0xA5,0xE4,0xFD,0xFC,0x7F,0x01,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,
-+0x7F,0x00,0x7E,0x66,0x02,0x07,0xA5,0xE4,
-+0x90,0x06,0x2C,0xF0,0xFD,0x7C,0x01,0x7F,
-+0x3F,0x7E,0x1D,0x12,0x07,0xA5,0x7D,0x40,
-+0x7C,0x00,0x7F,0x36,0x7E,0x13,0x12,0x07,
-+0xA5,0xE4,0xFF,0xFE,0xFD,0x80,0x25,0xE4,
-+0x7F,0xFF,0x7E,0xFF,0xFD,0xFC,0x90,0x06,
-+0x24,0x12,0x01,0x0F,0xC3,0x12,0x00,0xF2,
-+0x50,0x1B,0x90,0x06,0x24,0x12,0x01,0x03,
-+0xEF,0x24,0x01,0xFF,0xE4,0x3E,0xFE,0xE4,
-+0x3D,0xFD,0xE4,0x3C,0xFC,0x90,0x06,0x24,
-+0x12,0x01,0x1B,0x80,0xD2,0xE4,0xF5,0xA8,
-+0xD2,0xAF,0x7D,0x1F,0xFC,0x7F,0x49,0x7E,
-+0x13,0x12,0x07,0xA5,0x12,0x07,0xD5,0x12,
-+0x01,0x27,0x12,0x06,0x5A,0x7D,0x41,0x7C,
-+0x00,0x7F,0x36,0x7E,0x13,0x12,0x07,0xA5,
-+0xE4,0xFF,0xFE,0xFD,0x80,0x26,0x7F,0xFF,
-+0x7E,0xFF,0x7D,0x05,0x7C,0x00,0x90,0x06,
-+0x24,0x12,0x01,0x0F,0xC3,0x12,0x00,0xF2,
-+0x50,0x1B,0x90,0x06,0x24,0x12,0x01,0x03,
-+0xEF,0x24,0x01,0xFF,0xE4,0x3E,0xFE,0xE4,
-+0x3D,0xFD,0xE4,0x3C,0xFC,0x90,0x06,0x24,
-+0x12,0x01,0x1B,0x80,0xD1,0xC2,0x00,0xC2,
-+0x01,0xD2,0xA9,0xD2,0x8C,0x7F,0x01,0x7E,
-+0x62,0x12,0x07,0x60,0xEF,0x30,0xE2,0x07,
-+0xE4,0x90,0x06,0x2C,0xF0,0x80,0xEE,0x90,
-+0x06,0x2C,0xE0,0x70,0x12,0x12,0x04,0xEA,
-+0x90,0x06,0x2C,0x74,0x01,0xF0,0xE4,0x90,
-+0x06,0x33,0xF0,0xA3,0xF0,0x80,0xD6,0xC3,
-+0x90,0x06,0x34,0xE0,0x94,0x62,0x90,0x06,
-+0x33,0xE0,0x94,0x00,0x40,0xC7,0xE4,0xF0,
-+0xA3,0xF0,0x12,0x04,0xEA,0x90,0x06,0x2C,
-+0x74,0x01,0xF0,0x80,0xB8,0x75,0x0F,0x80,
-+0x75,0x0E,0x7E,0x75,0x0D,0xAA,0x75,0x0C,
-+0x83,0xE4,0xF5,0x10,0x7F,0x36,0x7E,0x13,
-+0x12,0x07,0x60,0xEE,0xC4,0xF8,0x54,0xF0,
-+0xC8,0xEF,0xC4,0x54,0x0F,0x48,0x54,0x07,
-+0xFB,0x7A,0x00,0xEA,0x70,0x4A,0xEB,0x14,
-+0x60,0x1C,0x14,0x60,0x27,0x24,0xFE,0x60,
-+0x31,0x14,0x60,0x3C,0x24,0x05,0x70,0x38,
-+0x75,0x0B,0x00,0x75,0x0A,0xC2,0x75,0x09,
-+0xEB,0x75,0x08,0x0B,0x80,0x36,0x75,0x0B,
-+0x40,0x75,0x0A,0x59,0x75,0x09,0x73,0x75,
-+0x08,0x07,0x80,0x28,0x75,0x0B,0x00,0x75,
-+0x0A,0xE1,0x75,0x09,0xF5,0x75,0x08,0x05,
-+0x80,0x1A,0x75,0x0B,0xA0,0x75,0x0A,0xAC,
-+0x75,0x09,0xB9,0x75,0x08,0x03,0x80,0x0C,
-+0x75,0x0B,0x00,0x75,0x0A,0x62,0x75,0x09,
-+0x3D,0x75,0x08,0x01,0x75,0x89,0x11,0xE4,
-+0x7B,0x60,0x7A,0x09,0xF9,0xF8,0xAF,0x0B,
-+0xAE,0x0A,0xAD,0x09,0xAC,0x08,0x12,0x00,
-+0x60,0xAA,0x06,0xAB,0x07,0xC3,0xE4,0x9B,
-+0xFB,0xE4,0x9A,0xFA,0x78,0x17,0xF6,0xAF,
-+0x03,0xEF,0x08,0xF6,0x18,0xE6,0xF5,0x8C,
-+0x08,0xE6,0xF5,0x8A,0x74,0x0D,0x2B,0xFB,
-+0xE4,0x3A,0x18,0xF6,0xAF,0x03,0xEF,0x08,
-+0xF6,0x75,0x88,0x10,0x53,0x8E,0xC7,0xD2,
-+0xA9,0x22,0x7F,0x10,0x7E,0x13,0x12,0x07,
-+0x60,0x90,0x06,0x2D,0xEE,0xF0,0xA3,0xEF,
-+0xF0,0xEE,0x44,0x10,0xFE,0x90,0x06,0x2D,
-+0xF0,0xA3,0xEF,0xF0,0x54,0xEF,0xFF,0x90,
-+0x06,0x2D,0xEE,0xF0,0xFC,0xA3,0xEF,0xF0,
-+0xFD,0x7F,0x10,0x7E,0x13,0x12,0x07,0xA5,
-+0xE4,0xFF,0xFE,0x0F,0xBF,0x00,0x01,0x0E,
-+0xEF,0x64,0x64,0x4E,0x70,0xF5,0x7D,0x04,
-+0x7C,0x00,0x7F,0x02,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0x00,0x7C,0x04,0x7F,0x01,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,
-+0x7F,0x00,0x7E,0x66,0x12,0x07,0xA5,0xE4,
-+0xFD,0xFC,0x7F,0x02,0x7E,0x66,0x12,0x07,
-+0xA5,0x7D,0x00,0x7C,0x04,0x7F,0x01,0x7E,
-+0x66,0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,
-+0x7F,0x00,0x7E,0x66,0x12,0x07,0xA5,0x7F,
-+0x10,0x7E,0x13,0x12,0x07,0x60,0x90,0x06,
-+0x2D,0xEE,0xF0,0xA3,0xEF,0xF0,0xEE,0x54,
-+0xEF,0x90,0x06,0x2D,0xF0,0xFC,0xA3,0xEF,
-+0xF0,0xFD,0x7F,0x10,0x7E,0x13,0x02,0x07,
-+0xA5,0x78,0x7F,0xE4,0xF6,0xD8,0xFD,0x75,
-+0x81,0x3C,0x02,0x05,0xD0,0x02,0x03,0x2F,
-+0xE4,0x93,0xA3,0xF8,0xE4,0x93,0xA3,0x40,
-+0x03,0xF6,0x80,0x01,0xF2,0x08,0xDF,0xF4,
-+0x80,0x29,0xE4,0x93,0xA3,0xF8,0x54,0x07,
-+0x24,0x0C,0xC8,0xC3,0x33,0xC4,0x54,0x0F,
-+0x44,0x20,0xC8,0x83,0x40,0x04,0xF4,0x56,
-+0x80,0x01,0x46,0xF6,0xDF,0xE4,0x80,0x0B,
-+0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,
-+0x90,0x07,0xE1,0xE4,0x7E,0x01,0x93,0x60,
-+0xBC,0xA3,0xFF,0x54,0x3F,0x30,0xE5,0x09,
-+0x54,0x1F,0xFE,0xE4,0x93,0xA3,0x60,0x01,
-+0x0E,0xCF,0x54,0xC0,0x25,0xE0,0x60,0xA8,
-+0x40,0xB8,0xE4,0x93,0xA3,0xFA,0xE4,0x93,
-+0xA3,0xF8,0xE4,0x93,0xA3,0xC8,0xC5,0x82,
-+0xC8,0xCA,0xC5,0x83,0xCA,0xF0,0xA3,0xC8,
-+0xC5,0x82,0xC8,0xCA,0xC5,0x83,0xCA,0xDF,
-+0xE9,0xDE,0xE7,0x80,0xBE,0x7D,0x40,0x7C,
-+0x17,0x7F,0x11,0x7E,0x1D,0x12,0x07,0xA5,
-+0x7F,0x41,0x7E,0x1D,0x12,0x07,0x60,0xEF,
-+0x44,0x20,0x44,0x80,0xFD,0xAC,0x06,0x7F,
-+0x41,0x7E,0x1D,0x12,0x07,0xA5,0x7D,0xBB,
-+0x7C,0x15,0x7F,0xEB,0x7E,0x13,0x12,0x07,
-+0xA5,0x7D,0x07,0x7C,0x00,0x7F,0xE7,0x7E,
-+0x13,0x12,0x07,0xA5,0x7D,0x40,0x7C,0x11,
-+0x7F,0x00,0x7E,0x62,0x12,0x07,0xA5,0x02,
-+0x02,0x2F,0x7D,0xC0,0x7C,0x16,0x7F,0x11,
-+0x7E,0x1D,0x12,0x07,0xA5,0x7D,0xBB,0x7C,
-+0x15,0x7F,0xEB,0x7E,0x13,0x12,0x07,0xA5,
-+0x7D,0x0D,0x7C,0x00,0x7F,0xE7,0x7E,0x13,
-+0x12,0x07,0xA5,0x7F,0x41,0x7E,0x1D,0x12,
-+0x07,0x60,0xEF,0x44,0x20,0x44,0x80,0xFD,
-+0xAC,0x06,0x7F,0x41,0x7E,0x1D,0x12,0x07,
-+0xA5,0x7D,0x00,0x7C,0x21,0x7F,0x00,0x7E,
-+0x62,0x12,0x07,0xA5,0x02,0x02,0x2F,0x7D,
-+0x40,0x7C,0x17,0x7F,0x11,0x7E,0x1D,0x12,
-+0x07,0xA5,0x7D,0xBB,0x7C,0x15,0x7F,0xEB,
-+0x7E,0x13,0x12,0x07,0xA5,0x7D,0x0C,0x7C,
-+0x00,0x7F,0xE7,0x7E,0x13,0x12,0x07,0xA5,
-+0x7F,0x41,0x7E,0x1D,0x12,0x07,0x60,0xEF,
-+0x44,0x20,0x44,0x80,0xFD,0xAC,0x06,0x7F,
-+0x41,0x7E,0x1D,0x12,0x07,0xA5,0x7D,0x40,
-+0x7C,0x11,0x7F,0x00,0x7E,0x62,0x12,0x07,
-+0xA5,0x02,0x02,0x2F,0x7D,0x04,0x7C,0x00,
-+0x7F,0x01,0x7E,0x66,0x12,0x07,0xA5,0x7D,
-+0x80,0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,
-+0x07,0xA5,0x7F,0x02,0x7E,0x66,0x12,0x07,
-+0x60,0xEF,0x44,0x02,0x44,0x04,0xFD,0xAC,
-+0x06,0x7F,0x02,0x7E,0x66,0x12,0x07,0xA5,
-+0x7D,0x04,0x7C,0x00,0x7F,0x01,0x7E,0x66,
-+0x12,0x07,0xA5,0x7D,0xC0,0x7C,0x00,0x7F,
-+0x00,0x7E,0x66,0x02,0x07,0xA5,0xC0,0xE0,
-+0xC0,0xF0,0xC0,0x83,0xC0,0x82,0xC0,0xD0,
-+0x75,0xD0,0x00,0xC0,0x00,0x78,0x17,0xE6,
-+0xF5,0x8C,0x78,0x18,0xE6,0xF5,0x8A,0x90,
-+0x06,0x31,0xE4,0x75,0xF0,0x01,0x12,0x00,
-+0x0E,0x90,0x06,0x33,0xE4,0x75,0xF0,0x01,
-+0x12,0x00,0x0E,0xD0,0x00,0xD0,0xD0,0xD0,
-+0x82,0xD0,0x83,0xD0,0xF0,0xD0,0xE0,0x32,
-+0xC2,0xAF,0xAD,0x07,0xAC,0x06,0x8C,0xA2,
-+0x8D,0xA3,0x75,0xA0,0x01,0x00,0x00,0x00,
-+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-+0xAE,0xA1,0xBE,0x00,0xF0,0xAE,0xA6,0xAF,
-+0xA7,0xD2,0xAF,0x22,0x7D,0x20,0x7C,0x0F,
-+0x7F,0x02,0x7E,0x66,0x12,0x07,0xA5,0x7D,
-+0x01,0x7C,0x00,0x7F,0x01,0x7E,0x66,0x12,
-+0x07,0xA5,0x7D,0xC0,0x7C,0x00,0x7F,0x00,
-+0x7E,0x66,0x02,0x07,0xA5,0xC2,0xAF,0xAB,
-+0x07,0xAA,0x06,0x8A,0xA2,0x8B,0xA3,0x8C,
-+0xA4,0x8D,0xA5,0x75,0xA0,0x03,0x00,0x00,
-+0x00,0xAA,0xA1,0xBA,0x00,0xF8,0xD2,0xAF,
-+0x22,0x7F,0x0C,0x7E,0x13,0x12,0x07,0x60,
-+0xEF,0x44,0x50,0xFD,0xAC,0x06,0x7F,0x0C,
-+0x7E,0x13,0x02,0x07,0xA5,0x12,0x07,0xC1,
-+0x12,0x07,0xEC,0x12,0x04,0x25,0x02,0x00,
-+0x03,0x42,0x06,0x33,0x00,0x00,0x42,0x06,
-+0x31,0x00,0x00,0x00,0xE4,0xF5,0x8E,0x22,};
-+
-+
-+#define SGMII_INIT_SIZE 1183
-+rtk_uint8 Sgmii_Init[SGMII_INIT_SIZE] = {
-+0x02,0x03,0x81,0xE4,0xF5,0xA8,0xD2,0xAF,
-+0x22,0x00,0x00,0x02,0x04,0x0D,0xC5,0xF0,
-+0xF8,0xA3,0xE0,0x28,0xF0,0xC5,0xF0,0xF8,
-+0xE5,0x82,0x15,0x82,0x70,0x02,0x15,0x83,
-+0xE0,0x38,0xF0,0x22,0x75,0xF0,0x08,0x75,
-+0x82,0x00,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,
-+0xCD,0x33,0xCD,0xCC,0x33,0xCC,0xC5,0x82,
-+0x33,0xC5,0x82,0x9B,0xED,0x9A,0xEC,0x99,
-+0xE5,0x82,0x98,0x40,0x0C,0xF5,0x82,0xEE,
-+0x9B,0xFE,0xED,0x9A,0xFD,0xEC,0x99,0xFC,
-+0x0F,0xD5,0xF0,0xD6,0xE4,0xCE,0xFB,0xE4,
-+0xCD,0xFA,0xE4,0xCC,0xF9,0xA8,0x82,0x22,
-+0xB8,0x00,0xC1,0xB9,0x00,0x59,0xBA,0x00,
-+0x2D,0xEC,0x8B,0xF0,0x84,0xCF,0xCE,0xCD,
-+0xFC,0xE5,0xF0,0xCB,0xF9,0x78,0x18,0xEF,
-+0x2F,0xFF,0xEE,0x33,0xFE,0xED,0x33,0xFD,
-+0xEC,0x33,0xFC,0xEB,0x33,0xFB,0x10,0xD7,
-+0x03,0x99,0x40,0x04,0xEB,0x99,0xFB,0x0F,
-+0xD8,0xE5,0xE4,0xF9,0xFA,0x22,0x78,0x18,
-+0xEF,0x2F,0xFF,0xEE,0x33,0xFE,0xED,0x33,
-+0xFD,0xEC,0x33,0xFC,0xC9,0x33,0xC9,0x10,
-+0xD7,0x05,0x9B,0xE9,0x9A,0x40,0x07,0xEC,
-+0x9B,0xFC,0xE9,0x9A,0xF9,0x0F,0xD8,0xE0,
-+0xE4,0xC9,0xFA,0xE4,0xCC,0xFB,0x22,0x75,
-+0xF0,0x10,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,
-+0xED,0x33,0xFD,0xCC,0x33,0xCC,0xC8,0x33,
-+0xC8,0x10,0xD7,0x07,0x9B,0xEC,0x9A,0xE8,
-+0x99,0x40,0x0A,0xED,0x9B,0xFD,0xEC,0x9A,
-+0xFC,0xE8,0x99,0xF8,0x0F,0xD5,0xF0,0xDA,
-+0xE4,0xCD,0xFB,0xE4,0xCC,0xFA,0xE4,0xC8,
-+0xF9,0x22,0xEB,0x9F,0xF5,0xF0,0xEA,0x9E,
-+0x42,0xF0,0xE9,0x9D,0x42,0xF0,0xE8,0x9C,
-+0x45,0xF0,0x22,0xE0,0xFC,0xA3,0xE0,0xFD,
-+0xA3,0xE0,0xFE,0xA3,0xE0,0xFF,0x22,0xE0,
-+0xF8,0xA3,0xE0,0xF9,0xA3,0xE0,0xFA,0xA3,
-+0xE0,0xFB,0x22,0xEC,0xF0,0xA3,0xED,0xF0,
-+0xA3,0xEE,0xF0,0xA3,0xEF,0xF0,0x22,0xE4,
-+0x90,0x06,0x2C,0xF0,0xFD,0x7C,0x01,0x7F,
-+0x3F,0x7E,0x1D,0x12,0x04,0x6B,0x7D,0x40,
-+0x7C,0x00,0x7F,0x36,0x7E,0x13,0x12,0x04,
-+0x6B,0xE4,0xFF,0xFE,0xFD,0x80,0x25,0xE4,
-+0x7F,0xFF,0x7E,0xFF,0xFD,0xFC,0x90,0x06,
-+0x24,0x12,0x01,0x0F,0xC3,0x12,0x00,0xF2,
-+0x50,0x1B,0x90,0x06,0x24,0x12,0x01,0x03,
-+0xEF,0x24,0x01,0xFF,0xE4,0x3E,0xFE,0xE4,
-+0x3D,0xFD,0xE4,0x3C,0xFC,0x90,0x06,0x24,
-+0x12,0x01,0x1B,0x80,0xD2,0xE4,0xF5,0xA8,
-+0xD2,0xAF,0x7D,0x1F,0xFC,0x7F,0x49,0x7E,
-+0x13,0x12,0x04,0x6B,0x12,0x04,0x92,0x7D,
-+0x41,0x7C,0x00,0x7F,0x36,0x7E,0x13,0x12,
-+0x04,0x6B,0xE4,0xFF,0xFE,0xFD,0x80,0x25,
-+0xE4,0x7F,0x20,0x7E,0x4E,0xFD,0xFC,0x90,
-+0x06,0x24,0x12,0x01,0x0F,0xC3,0x12,0x00,
-+0xF2,0x50,0x1B,0x90,0x06,0x24,0x12,0x01,
-+0x03,0xEF,0x24,0x01,0xFF,0xE4,0x3E,0xFE,
-+0xE4,0x3D,0xFD,0xE4,0x3C,0xFC,0x90,0x06,
-+0x24,0x12,0x01,0x1B,0x80,0xD2,0xC2,0x00,
-+0xC2,0x01,0xD2,0xA9,0xD2,0x8C,0x7F,0x01,
-+0x7E,0x62,0x12,0x04,0x47,0xEF,0x30,0xE2,
-+0x07,0xE4,0x90,0x06,0x2C,0xF0,0x80,0xEE,
-+0x90,0x06,0x2C,0xE0,0x70,0x12,0x12,0x02,
-+0xDB,0x90,0x06,0x2C,0x74,0x01,0xF0,0xE4,
-+0x90,0x06,0x2F,0xF0,0xA3,0xF0,0x80,0xD6,
-+0xC3,0x90,0x06,0x30,0xE0,0x94,0x62,0x90,
-+0x06,0x2F,0xE0,0x94,0x00,0x40,0xC7,0xE4,
-+0xF0,0xA3,0xF0,0x12,0x02,0xDB,0x90,0x06,
-+0x2C,0x74,0x01,0xF0,0x80,0xB8,0x75,0x0F,
-+0x80,0x75,0x0E,0x7E,0x75,0x0D,0xAA,0x75,
-+0x0C,0x83,0xE4,0xF5,0x10,0x7F,0x36,0x7E,
-+0x13,0x12,0x04,0x47,0xEE,0xC4,0xF8,0x54,
-+0xF0,0xC8,0xEF,0xC4,0x54,0x0F,0x48,0x54,
-+0x07,0xFB,0x7A,0x00,0xEA,0x70,0x4A,0xEB,
-+0x14,0x60,0x1C,0x14,0x60,0x27,0x24,0xFE,
-+0x60,0x31,0x14,0x60,0x3C,0x24,0x05,0x70,
-+0x38,0x75,0x0B,0x00,0x75,0x0A,0xC2,0x75,
-+0x09,0xEB,0x75,0x08,0x0B,0x80,0x36,0x75,
-+0x0B,0x40,0x75,0x0A,0x59,0x75,0x09,0x73,
-+0x75,0x08,0x07,0x80,0x28,0x75,0x0B,0x00,
-+0x75,0x0A,0xE1,0x75,0x09,0xF5,0x75,0x08,
-+0x05,0x80,0x1A,0x75,0x0B,0xA0,0x75,0x0A,
-+0xAC,0x75,0x09,0xB9,0x75,0x08,0x03,0x80,
-+0x0C,0x75,0x0B,0x00,0x75,0x0A,0x62,0x75,
-+0x09,0x3D,0x75,0x08,0x01,0x75,0x89,0x11,
-+0xE4,0x7B,0x60,0x7A,0x09,0xF9,0xF8,0xAF,
-+0x0B,0xAE,0x0A,0xAD,0x09,0xAC,0x08,0x12,
-+0x00,0x60,0xAA,0x06,0xAB,0x07,0xC3,0xE4,
-+0x9B,0xFB,0xE4,0x9A,0xFA,0x78,0x17,0xF6,
-+0xAF,0x03,0xEF,0x08,0xF6,0x18,0xE6,0xF5,
-+0x8C,0x08,0xE6,0xF5,0x8A,0x74,0x0D,0x2B,
-+0xFB,0xE4,0x3A,0x18,0xF6,0xAF,0x03,0xEF,
-+0x08,0xF6,0x75,0x88,0x10,0x53,0x8E,0xC7,
-+0xD2,0xA9,0x22,0x7D,0x02,0x7C,0x00,0x7F,
-+0x4A,0x7E,0x13,0x12,0x04,0x6B,0x7D,0x46,
-+0x7C,0x71,0x7F,0x02,0x7E,0x66,0x12,0x04,
-+0x6B,0x7D,0x03,0x7C,0x00,0x7F,0x01,0x7E,
-+0x66,0x12,0x04,0x6B,0x7D,0xC0,0x7C,0x00,
-+0x7F,0x00,0x7E,0x66,0x12,0x04,0x6B,0xE4,
-+0xFF,0xFE,0x0F,0xBF,0x00,0x01,0x0E,0xEF,
-+0x64,0x64,0x4E,0x70,0xF5,0x7D,0x04,0x7C,
-+0x00,0x7F,0x02,0x7E,0x66,0x12,0x04,0x6B,
-+0x7D,0x00,0x7C,0x04,0x7F,0x01,0x7E,0x66,
-+0x12,0x04,0x6B,0x7D,0xC0,0x7C,0x00,0x7F,
-+0x00,0x7E,0x66,0x12,0x04,0x6B,0xE4,0xFD,
-+0xFC,0x7F,0x02,0x7E,0x66,0x12,0x04,0x6B,
-+0x7D,0x00,0x7C,0x04,0x7F,0x01,0x7E,0x66,
-+0x12,0x04,0x6B,0x7D,0xC0,0x7C,0x00,0x7F,
-+0x00,0x7E,0x66,0x12,0x04,0x6B,0xE4,0xFD,
-+0xFC,0x7F,0x4A,0x7E,0x13,0x12,0x04,0x6B,
-+0x7D,0x06,0x7C,0x71,0x7F,0x02,0x7E,0x66,
-+0x12,0x04,0x6B,0x7D,0x03,0x7C,0x00,0x7F,
-+0x01,0x7E,0x66,0x12,0x04,0x6B,0x7D,0xC0,
-+0x7C,0x00,0x7F,0x00,0x7E,0x66,0x02,0x04,
-+0x6B,0x78,0x7F,0xE4,0xF6,0xD8,0xFD,0x75,
-+0x81,0x3C,0x02,0x03,0xC8,0x02,0x01,0x27,
-+0xE4,0x93,0xA3,0xF8,0xE4,0x93,0xA3,0x40,
-+0x03,0xF6,0x80,0x01,0xF2,0x08,0xDF,0xF4,
-+0x80,0x29,0xE4,0x93,0xA3,0xF8,0x54,0x07,
-+0x24,0x0C,0xC8,0xC3,0x33,0xC4,0x54,0x0F,
-+0x44,0x20,0xC8,0x83,0x40,0x04,0xF4,0x56,
-+0x80,0x01,0x46,0xF6,0xDF,0xE4,0x80,0x0B,
-+0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,
-+0x90,0x04,0x87,0xE4,0x7E,0x01,0x93,0x60,
-+0xBC,0xA3,0xFF,0x54,0x3F,0x30,0xE5,0x09,
-+0x54,0x1F,0xFE,0xE4,0x93,0xA3,0x60,0x01,
-+0x0E,0xCF,0x54,0xC0,0x25,0xE0,0x60,0xA8,
-+0x40,0xB8,0xE4,0x93,0xA3,0xFA,0xE4,0x93,
-+0xA3,0xF8,0xE4,0x93,0xA3,0xC8,0xC5,0x82,
-+0xC8,0xCA,0xC5,0x83,0xCA,0xF0,0xA3,0xC8,
-+0xC5,0x82,0xC8,0xCA,0xC5,0x83,0xCA,0xDF,
-+0xE9,0xDE,0xE7,0x80,0xBE,0xC0,0xE0,0xC0,
-+0xF0,0xC0,0x83,0xC0,0x82,0xC0,0xD0,0x75,
-+0xD0,0x00,0xC0,0x00,0x78,0x17,0xE6,0xF5,
-+0x8C,0x78,0x18,0xE6,0xF5,0x8A,0x90,0x06,
-+0x2D,0xE4,0x75,0xF0,0x01,0x12,0x00,0x0E,
-+0x90,0x06,0x2F,0xE4,0x75,0xF0,0x01,0x12,
-+0x00,0x0E,0xD0,0x00,0xD0,0xD0,0xD0,0x82,
-+0xD0,0x83,0xD0,0xF0,0xD0,0xE0,0x32,0xC2,
-+0xAF,0xAD,0x07,0xAC,0x06,0x8C,0xA2,0x8D,
-+0xA3,0x75,0xA0,0x01,0x00,0x00,0x00,0x00,
-+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xAE,
-+0xA1,0xBE,0x00,0xF0,0xAE,0xA6,0xAF,0xA7,
-+0xD2,0xAF,0x22,0xC2,0xAF,0xAB,0x07,0xAA,
-+0x06,0x8A,0xA2,0x8B,0xA3,0x8C,0xA4,0x8D,
-+0xA5,0x75,0xA0,0x03,0x00,0x00,0x00,0xAA,
-+0xA1,0xBA,0x00,0xF8,0xD2,0xAF,0x22,0x42,
-+0x06,0x2F,0x00,0x00,0x42,0x06,0x2D,0x00,
-+0x00,0x00,0x12,0x04,0x9B,0x12,0x02,0x16,
-+0x02,0x00,0x03,0xE4,0xF5,0x8E,0x22,};
-+
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicPortUnknownDaBehavior
-+ * Description:
-+ *      Set UNDA behavior
-+ * Input:
-+ *      port        - port ID
-+ *      behavior    - 0: flooding to unknwon DA portmask; 1: drop; 2:trap; 3: flooding
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NOT_ALLOWED  - Invalid behavior
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortUnknownDaBehavior(rtk_uint32 port, rtk_uint32 behavior)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if(behavior >= L2_UNDA_BEHAVE_END)
-+        return RT_ERR_NOT_ALLOWED;
-+
-+    if(port < 8)
-+        return rtl8367c_setAsicRegBits(RTL8367C_REG_UNKNOWN_UNICAST_DA_PORT_BEHAVE, RTL8367C_Port0_ACTION_MASK << (port * 2), behavior);
-+    else
-+        return rtl8367c_setAsicRegBits(RTL8367C_REG_UNKNOWN_UNICAST_DA_PORT_BEHAVE_EXT, RTL8367C_PORT8_ACTION_MASK << ((port-8) * 2), behavior);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortUnknownDaBehavior
-+ * Description:
-+ *      Get UNDA behavior
-+ * Input:
-+ *      port        - port ID
-+ * Output:
-+ *      pBehavior   - 0: flooding to unknwon DA portmask; 1: drop; 2:trap; 3: flooding
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortUnknownDaBehavior(rtk_uint32 port, rtk_uint32 *pBehavior)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+        return rtl8367c_getAsicRegBits(RTL8367C_REG_UNKNOWN_UNICAST_DA_PORT_BEHAVE, RTL8367C_Port0_ACTION_MASK << (port * 2), pBehavior);
-+    else
-+        return rtl8367c_getAsicRegBits(RTL8367C_REG_UNKNOWN_UNICAST_DA_PORT_BEHAVE_EXT, RTL8367C_PORT8_ACTION_MASK << ((port-8) * 2), pBehavior);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortUnknownSaBehavior
-+ * Description:
-+ *      Set UNSA behavior
-+ * Input:
-+ *      behavior    - 0: flooding; 1: drop; 2:trap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NOT_ALLOWED  - Invalid behavior
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortUnknownSaBehavior(rtk_uint32 behavior)
-+{
-+    if(behavior >= L2_BEHAVE_SA_END)
-+        return RT_ERR_NOT_ALLOWED;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_PORT_SECURIT_CTRL_REG, RTL8367C_UNKNOWN_SA_BEHAVE_MASK, behavior);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortUnknownSaBehavior
-+ * Description:
-+ *      Get UNSA behavior
-+ * Input:
-+ *      pBehavior   - 0: flooding; 1: drop; 2:trap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortUnknownSaBehavior(rtk_uint32 *pBehavior)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_PORT_SECURIT_CTRL_REG, RTL8367C_UNKNOWN_SA_BEHAVE_MASK, pBehavior);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortUnmatchedSaBehavior
-+ * Description:
-+ *      Set Unmatched SA behavior
-+ * Input:
-+ *      behavior    - 0: flooding; 1: drop; 2:trap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NOT_ALLOWED  - Invalid behavior
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortUnmatchedSaBehavior(rtk_uint32 behavior)
-+{
-+    if(behavior >= L2_BEHAVE_SA_END)
-+        return RT_ERR_NOT_ALLOWED;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_PORT_SECURIT_CTRL_REG, RTL8367C_UNMATCHED_SA_BEHAVE_MASK, behavior);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortUnmatchedSaBehavior
-+ * Description:
-+ *      Get Unmatched SA behavior
-+ * Input:
-+ *      pBehavior   - 0: flooding; 1: drop; 2:trap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortUnmatchedSaBehavior(rtk_uint32 *pBehavior)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_PORT_SECURIT_CTRL_REG, RTL8367C_UNMATCHED_SA_BEHAVE_MASK, pBehavior);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicPortUnmatchedSaMoving
-+ * Description:
-+ *      Set Unmatched SA moving state
-+ * Input:
-+ *      port        - Port ID
-+ *      enabled     - 0: can't move to new port; 1: can move to new port
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Error Port ID
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortUnmatchedSaMoving(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_L2_SA_MOVING_FORBID, port, (enabled == 1) ? 0 : 1);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicPortUnmatchedSaMoving
-+ * Description:
-+ *      Get Unmatched SA moving state
-+ * Input:
-+ *      port        - Port ID
-+ * Output:
-+ *      pEnabled    - 0: can't move to new port; 1: can move to new port
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Error Port ID
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortUnmatchedSaMoving(rtk_uint32 port, rtk_uint32 *pEnabled)
-+{
-+    rtk_uint32 data;
-+    ret_t retVal;
-+
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_L2_SA_MOVING_FORBID, port, &data)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pEnabled = (data == 1) ? 0 : 1;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicPortUnknownDaFloodingPortmask
-+ * Description:
-+ *      Set UNDA flooding portmask
-+ * Input:
-+ *      portmask    - portmask(0~0xFF)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid portmask
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortUnknownDaFloodingPortmask(rtk_uint32 portmask)
-+{
-+    if(portmask > RTL8367C_PORTMASK)
-+        return RT_ERR_PORT_MASK;
-+
-+    return rtl8367c_setAsicReg(RTL8367C_UNUCAST_FLOADING_PMSK_REG, portmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortUnknownDaFloodingPortmask
-+ * Description:
-+ *      Get UNDA flooding portmask
-+ * Input:
-+ *      pPortmask   - portmask(0~0xFF)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortUnknownDaFloodingPortmask(rtk_uint32 *pPortmask)
-+{
-+    return rtl8367c_getAsicReg(RTL8367C_UNUCAST_FLOADING_PMSK_REG, pPortmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortUnknownMulticastFloodingPortmask
-+ * Description:
-+ *      Set UNMC flooding portmask
-+ * Input:
-+ *      portmask    - portmask(0~0xFF)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid portmask
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortUnknownMulticastFloodingPortmask(rtk_uint32 portmask)
-+{
-+    if(portmask > RTL8367C_PORTMASK)
-+        return RT_ERR_PORT_MASK;
-+
-+    return rtl8367c_setAsicReg(RTL8367C_UNMCAST_FLOADING_PMSK_REG, portmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortUnknownMulticastFloodingPortmask
-+ * Description:
-+ *      Get UNMC flooding portmask
-+ * Input:
-+ *      pPortmask   - portmask(0~0xFF)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortUnknownMulticastFloodingPortmask(rtk_uint32 *pPortmask)
-+{
-+    return rtl8367c_getAsicReg(RTL8367C_UNMCAST_FLOADING_PMSK_REG, pPortmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortBcastFloodingPortmask
-+ * Description:
-+ *      Set Bcast flooding portmask
-+ * Input:
-+ *      portmask    - portmask(0~0xFF)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid portmask
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortBcastFloodingPortmask(rtk_uint32 portmask)
-+{
-+    if(portmask > RTL8367C_PORTMASK)
-+        return RT_ERR_PORT_MASK;
-+
-+    return rtl8367c_setAsicReg(RTL8367C_BCAST_FLOADING_PMSK_REG, portmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortBcastFloodingPortmask
-+ * Description:
-+ *      Get Bcast flooding portmask
-+ * Input:
-+ *      pPortmask   - portmask(0~0xFF)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortBcastFloodingPortmask(rtk_uint32 *pPortmask)
-+{
-+    return rtl8367c_getAsicReg(RTL8367C_BCAST_FLOADING_PMSK_REG, pPortmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortBlockSpa
-+ * Description:
-+ *      Set disabling blocking frame if source port and destination port are the same
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      permit  - 0: block; 1: permit
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortBlockSpa(rtk_uint32 port, rtk_uint32 permit)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_SOURCE_PORT_BLOCK_REG, port, permit);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortBlockSpa
-+ * Description:
-+ *      Get disabling blocking frame if source port and destination port are the same
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pPermit     - 0: block; 1: permit
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortBlockSpa(rtk_uint32 port, rtk_uint32* pPermit)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_SOURCE_PORT_BLOCK_REG, port, pPermit);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortDos
-+ * Description:
-+ *      Set DOS function
-+ * Input:
-+ *      type    - DOS type
-+ *      drop    - 0: permit; 1: drop
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - Invalid payload index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortDos(rtk_uint32 type, rtk_uint32 drop)
-+{
-+    if(type >= DOS_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_DOS_CFG, RTL8367C_DROP_DAEQSA_OFFSET + type, drop);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortDos
-+ * Description:
-+ *      Get DOS function
-+ * Input:
-+ *      type    - DOS type
-+ *      pDrop   - 0: permit; 1: drop
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - Invalid payload index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortDos(rtk_uint32 type, rtk_uint32* pDrop)
-+{
-+    if(type >= DOS_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_DOS_CFG, RTL8367C_DROP_DAEQSA_OFFSET + type,pDrop);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortForceLink
-+ * Description:
-+ *      Set port force linking configuration
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      pPortAbility - port ability configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortForceLink(rtk_uint32 port, rtl8367c_port_ability_t *pPortAbility)
-+{
-+    rtk_uint32 regData = 0;
-+
-+    /* Invalid input parameter */
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    regData |= pPortAbility->forcemode << 12;
-+    regData |= pPortAbility->mstfault << 9;
-+    regData |= pPortAbility->mstmode << 8;
-+    regData |= pPortAbility->nway << 7;
-+    regData |= pPortAbility->txpause << 6;
-+    regData |= pPortAbility->rxpause << 5;
-+    regData |= pPortAbility->link << 4;
-+    regData |= pPortAbility->duplex << 2;
-+    regData |= pPortAbility->speed;
-+
-+    return rtl8367c_setAsicReg(RTL8367C_REG_MAC0_FORCE_SELECT+port, regData);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortForceLink
-+ * Description:
-+ *      Get port force linking configuration
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      pPortAbility - port ability configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortForceLink(rtk_uint32 port, rtl8367c_port_ability_t *pPortAbility)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    /* Invalid input parameter */
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_MAC0_FORCE_SELECT + port, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pPortAbility->forcemode = (regData >> 12) & 0x0001;
-+    pPortAbility->mstfault  = (regData >> 9) & 0x0001;
-+    pPortAbility->mstmode   = (regData >> 8) & 0x0001;
-+    pPortAbility->nway      = (regData >> 7) & 0x0001;
-+    pPortAbility->txpause   = (regData >> 6) & 0x0001;
-+    pPortAbility->rxpause   = (regData >> 5) & 0x0001;
-+    pPortAbility->link      = (regData >> 4) & 0x0001;
-+    pPortAbility->duplex    = (regData >> 2) & 0x0001;
-+    pPortAbility->speed     = regData & 0x0003;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortStatus
-+ * Description:
-+ *      Get port link status
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      pPortAbility - port ability configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortStatus(rtk_uint32 port, rtl8367c_port_status_t *pPortStatus)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    /* Invalid input parameter */
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_PORT0_STATUS+port,&regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pPortStatus->lpi1000  = (regData >> 11) & 0x0001;
-+    pPortStatus->lpi100   = (regData >> 10) & 0x0001;
-+    pPortStatus->mstfault = (regData >> 9) & 0x0001;
-+    pPortStatus->mstmode  = (regData >> 8) & 0x0001;
-+    pPortStatus->nway     = (regData >> 7) & 0x0001;
-+    pPortStatus->txpause  = (regData >> 6) & 0x0001;
-+    pPortStatus->rxpause  = (regData >> 5) & 0x0001;
-+    pPortStatus->link     = (regData >> 4) & 0x0001;
-+    pPortStatus->duplex   = (regData >> 2) & 0x0001;
-+    pPortStatus->speed    = regData  & 0x0003;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortForceLinkExt
-+ * Description:
-+ *      Set external interface force linking configuration
-+ * Input:
-+ *      id          - external interface id (0~2)
-+ *      portAbility - port ability configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortForceLinkExt(rtk_uint32 id, rtl8367c_port_ability_t *pPortAbility)
-+{
-+    rtk_uint32 retVal, regValue, regValue2, type, sgmiibit, hisgmiibit;
-+    rtk_uint32 reg_data = 0;
-+    rtk_uint32 i = 0;
-+
-+    /* Invalid input parameter */
-+    if(id >= RTL8367C_EXTNO)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    reg_data |= pPortAbility->forcemode << 12;
-+    reg_data |= pPortAbility->mstfault << 9;
-+    reg_data |= pPortAbility->mstmode << 8;
-+    reg_data |= pPortAbility->nway << 7;
-+    reg_data |= pPortAbility->txpause << 6;
-+    reg_data |= pPortAbility->rxpause << 5;
-+    reg_data |= pPortAbility->link << 4;
-+    reg_data |= pPortAbility->duplex << 2;
-+    reg_data |= pPortAbility->speed;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
-+        return retVal;
-+    /*get chip ID */
-+    if((retVal = rtl8367c_getAsicReg(0x1300, &regValue)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0000)) != RT_ERR_OK)
-+        return retVal;
-+
-+    type = 0;
-+
-+    switch (regValue)
-+    {
-+        case 0x0276:
-+        case 0x0597:
-+        case 0x6367:
-+            type = 1;
-+            break;
-+        case 0x0652:
-+        case 0x6368:
-+            type = 2;
-+            break;
-+        case 0x0801:
-+        case 0x6511:
-+            type = 3;
-+            break;
-+        default:
-+            return RT_ERR_FAILED;
-+    }
-+
-+    if (1 == type)
-+    {
-+        if(1 == id)
-+        {
-+            if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_REG_TO_ECO4, &regValue)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((regValue & (0x0001 << 5)) && (regValue & (0x0001 << 7)))
-+            {
-+                return RT_ERR_OK;
-+            }
-+
-+            if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_FDUP_OFFSET, pPortAbility->duplex)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_SPD_MASK, pPortAbility->speed)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_LINK_OFFSET, pPortAbility->link)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_TXFC_OFFSET, pPortAbility->txpause)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_RXFC_OFFSET, pPortAbility->rxpause)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+
-+        if(0 == id || 1 == id)
-+            return rtl8367c_setAsicReg(RTL8367C_REG_DIGITAL_INTERFACE0_FORCE + id, reg_data);
-+        else
-+            return rtl8367c_setAsicReg(RTL8367C_REG_DIGITAL_INTERFACE2_FORCE, reg_data);
-+    }
-+    else if (2 == type)
-+    {
-+        if (1 == id)
-+        {
-+             if((retVal = rtl8367c_setAsicRegBit(0x1311, 2, pPortAbility->duplex)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBits(0x1311, 0x3, pPortAbility->speed)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(0x1311, 4, pPortAbility->link)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(0x1311, 6, pPortAbility->txpause)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(0x1311, 5, pPortAbility->rxpause)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(0x1311, 12, pPortAbility->forcemode)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if (pPortAbility->link == 1)
-+            {
-+                if((retVal = rtl8367c_setAsicRegBit(0x1311, 4, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if((retVal = rtl8367c_setAsicRegBit(0x1311, 4, 1)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else
-+            {
-+                if((retVal = rtl8367c_setAsicRegBits(0x1311, 0x3, 2)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+
-+
-+            if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_FDUP_OFFSET, pPortAbility->duplex)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_SPD_MASK, pPortAbility->speed)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_LINK_OFFSET, pPortAbility->link)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_TXFC_OFFSET, pPortAbility->txpause)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_RXFC_OFFSET, pPortAbility->rxpause)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+        else if (2 == id)
-+        {
-+            if((retVal = rtl8367c_setAsicRegBit(0x13c4, 2, pPortAbility->duplex)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBits(0x13c4, 0x3, pPortAbility->speed)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(0x13c4, 4, pPortAbility->link)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(0x13c4, 6, pPortAbility->txpause)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(0x13c4, 5, pPortAbility->rxpause)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(0x13c4, 12, pPortAbility->forcemode)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if (pPortAbility->link == 1)
-+            {
-+                if((retVal = rtl8367c_setAsicRegBit(0x13c4, 4, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if((retVal = rtl8367c_setAsicRegBit(0x13c4, 4, 1)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else
-+            {
-+                if((retVal = rtl8367c_setAsicRegBits(0x13c4, 0x3, 2)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+
-+            if((retVal = rtl8367c_setAsicRegBit(0x1dc1, RTL8367C_CFG_SGMII_FDUP_OFFSET, pPortAbility->duplex)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBits(0x1dc1, RTL8367C_CFG_SGMII_SPD_MASK, pPortAbility->speed)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(0x1dc1, RTL8367C_CFG_SGMII_LINK_OFFSET, pPortAbility->link)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(0x1dc1, RTL8367C_CFG_SGMII_TXFC_OFFSET, pPortAbility->txpause)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(0x1dc1, RTL8367C_CFG_SGMII_RXFC_OFFSET, pPortAbility->rxpause)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+
-+    }
-+    else if(3 == type)
-+    {
-+        if(1 == id)
-+        {
-+            if((retVal = rtl8367c_getAsicRegBit(0x1d11, 6, &sgmiibit)) != RT_ERR_OK)
-+                return retVal;
-+            if((retVal = rtl8367c_getAsicRegBit(0x1d11, 11, &hisgmiibit)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if ((sgmiibit == 1) || (hisgmiibit == 1))
-+            {
-+                /*for 1000x/100fx/1000x_100fx, param has to be set to serdes registers*/
-+                if((retVal = rtl8367c_getAsicReg(0x1d41, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*bit5: cfg_mac6_fib =1,  bit7: cfg_mac6_fib2=1*/
-+                if((regValue & 0xa0) == 0xa0)
-+                {
-+                     /* new_cfg_sds_mode */
-+                    if((retVal = rtl8367c_getAsicRegBits(0x1d95, 0x1f00, &regValue2)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                     /*1000X*/
-+                    if(regValue2 == 0x4)
-+                    {
-+#if 0
-+                        /* new_cfg_sds_mode:reset mode */
-+                        if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                            return retVal;
-+#endif
-+                        /* Enable new sds mode config */
-+                        if((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 1)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 4 0  bit 12  set 1,  bit15~13 = 4*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFF0FFF;
-+                        reg_data |= 0x9000;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,0, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 0 2  bit 6  set 1,  bit13 set to 0, bit12 nway_en*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 0, 2, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFFDFFF;
-+                        reg_data |= 0x40;
-+                        if(pPortAbility->forcemode)
-+                            reg_data &= 0xffffefff;
-+                        else
-+                            reg_data |= 0x1000;
-+
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,0,2, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 4 2  bit 8  rx pause,  bit7 tx pause*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 2, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        if (pPortAbility->txpause)
-+                            reg_data |= 0x80;
-+                        else
-+                            reg_data &= (~0x80);
-+
-+                        if (pPortAbility->rxpause)
-+                            reg_data |= 0x100;
-+                        else
-+                            reg_data &= (~0x100);
-+
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,2, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                         /* 0 4 0  bit 12  set 0*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFFEFFF;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,0, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /*new_cfg_sds_mode=1000x*/
-+                        if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x4)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                    }
-+                    else if(regValue2 == 0x5)
-+                    {
-+#if 0
-+                        /*100FX*/
-+                        if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                            return retVal;
-+#endif
-+                        /*cfg_sds_mode_sel_new=1  */
-+                        if((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 1)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 4 0  bit 12  set 1,  bit15~13 = 5*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFF0FFF;
-+                        reg_data |= 0xB000;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,0, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 0 2  bit 6  set 0,  bit13 set to 1, bit12 0*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 0, 2, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFFFFBF;
-+                        reg_data |= 0x2000;
-+                        reg_data &= 0xffffefff;
-+
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,0,2, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 4 2  bit 8  rx pause,  bit7 tx pause*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 2, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        if (pPortAbility->txpause)
-+                            reg_data |= 0x80;
-+                        else
-+                            reg_data &= (~0x80);
-+                        if (pPortAbility->rxpause)
-+                            reg_data |= 0x100;
-+                        else
-+                            reg_data &= (~0x100);
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,2, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                         /* 0 4 0  bit 12  set 0*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFFEFFF;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,0, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                       /* new_cfg_sds_mode=1000x */
-+                        if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x5)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                    }
-+                    else if(regValue2 == 0x7)
-+                    {
-+#if 0
-+                        /*100FX*/
-+                        if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                            return retVal;
-+#endif
-+                        if((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 1)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 4 0  bit 12  set 1,  bit15~13 = 4*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFF0FFF;
-+                        reg_data |= 0x9000;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,0, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 0 2  bit 6  set 1,  bit13 set to 0, bit12 nway_en*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 0, 2, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFFDFFF;
-+                        reg_data |= 0x40;
-+                        if(pPortAbility->forcemode)
-+                            reg_data &= 0xffffefff;
-+                        else
-+                            reg_data |= 0x1000;
-+
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,0,2, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 4 2  bit 8  rx pause,  bit7 tx pause*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 2, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        if (pPortAbility->txpause)
-+                            reg_data |= 0x80;
-+                        else
-+                            reg_data &= (~0x80);
-+                        if (pPortAbility->rxpause)
-+                            reg_data |= 0x100;
-+                        else
-+                            reg_data &=(~0x100);
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,2, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                         /* 0 4 0  bit 12  set 0*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFFEFFF;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,0, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 4 0  bit 12  set 1,  bit15~13 = 5*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFF0FFF;
-+                        reg_data |= 0xB000;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,0, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 0 2  bit 6  set 0,  bit13 set to 1, bit12 0*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 0, 2, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFFFFBF;
-+                        reg_data |= 0x2000;
-+                        reg_data &= 0xffffefff;
-+
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,0,2, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 4 2  bit 8  rx pause,  bit7 tx pause*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 2, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        if (pPortAbility->txpause)
-+                            reg_data |= 0x80;
-+                        else
-+                            reg_data &= 0xffffff7f;
-+                        if (pPortAbility->rxpause)
-+                            reg_data |= 0x100;
-+                        else
-+                            reg_data &= 0xfffffeff;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,2, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                         /* 0 4 0  bit 12  set 0*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFFEFFF;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,0, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        /*sds_mode:*/
-+                        if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x7)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                    }
-+
-+                    /*disable force ability   ---      */
-+                    if((retVal = rtl8367c_setAsicRegBit(0x137c, 12, 0)) != RT_ERR_OK)
-+                        return retVal;
-+                    return RT_ERR_OK;
-+
-+                }
-+
-+                /* new_cfg_sds_mode */
-+                if((retVal = rtl8367c_getAsicRegBits(0x1d95, 0x1f00, &regValue2)) != RT_ERR_OK)
-+                    return retVal;
-+                if(regValue2 == 0x2)
-+                {
-+#if 0
-+                    /*SGMII*/
-+                    if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                        return retVal;
-+#endif
-+                    if((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 1)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    for(i=0;i<0xfff; i++);
-+
-+                    /* 0 2 0  bit 8-9  nway*/
-+                    if((retVal = rtl8367c_getAsicSdsReg(0, 2, 0, &reg_data)) != RT_ERR_OK)
-+                        return retVal;
-+                    reg_data &= 0xfffffcff;
-+                    if (pPortAbility->nway)
-+                        reg_data &= 0xfffffcff;
-+                    else
-+                        reg_data |= 0x100;
-+                    if((retVal = rtl8367c_setAsicSdsReg(0,2,0, reg_data)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x2)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    for(i=0;i<0xfff; i++);
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_FDUP_OFFSET, pPortAbility->duplex)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_SPD_MASK, pPortAbility->speed)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_TXFC_OFFSET, pPortAbility->txpause)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_RXFC_OFFSET, pPortAbility->rxpause)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_LINK_OFFSET, pPortAbility->link)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    /*disable force ability   ---      */
-+                    if((retVal = rtl8367c_setAsicRegBit(0x137c, 12, 0)) != RT_ERR_OK)
-+                        return retVal;
-+                    return RT_ERR_OK;
-+                }
-+                else if(regValue2 == 0x12)
-+                {
-+#if 0
-+                    /*HiSGMII*/
-+                    if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                        return retVal;
-+#endif
-+                    if((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 1)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    for(i=0;i<0xfff; i++);
-+
-+                    /* 0 2 0  bit 8-9  nway*/
-+                    if((retVal = rtl8367c_getAsicSdsReg(0, 2, 0, &reg_data)) != RT_ERR_OK)
-+                        return retVal;
-+                    reg_data &= 0xfffffcff;
-+                    if (pPortAbility->nway)
-+                        reg_data &= 0xfffffcff;
-+                    else
-+                        reg_data |= 0x100;
-+                    if((retVal = rtl8367c_setAsicSdsReg(0,2,0, reg_data)) != RT_ERR_OK)
-+                        return retVal;
-+
-+
-+                    if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x12)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    for(i=0;i<0xfff; i++);
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(0x1d11, 11, 0x1)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_FDUP_OFFSET, pPortAbility->duplex)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_SPD_MASK, pPortAbility->speed)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_TXFC_OFFSET, pPortAbility->txpause)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_RXFC_OFFSET, pPortAbility->rxpause)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_LINK_OFFSET, pPortAbility->link)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    /*disable force ability   ---      */
-+                    if((retVal = rtl8367c_setAsicRegBit(0x137c, 12, 0)) != RT_ERR_OK)
-+                        return retVal;
-+                    return RT_ERR_OK;
-+
-+                }
-+            }
-+            else
-+            {
-+                if((retVal = rtl8367c_getAsicRegBits(0x1d3d, 10, &regValue2)) != RT_ERR_OK)
-+                    return retVal;
-+                if (regValue2 == 0)
-+                {
-+                    /*ext1_force_ablty*/
-+                    if((retVal = rtl8367c_setAsicRegBit(0x1311, 2, pPortAbility->duplex)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBits(0x1311, 0x3, pPortAbility->speed)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(0x1311, 4, pPortAbility->link)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(0x1311, 6, pPortAbility->txpause)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(0x1311, 5, pPortAbility->rxpause)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    /*force mode for ext1*/
-+                    if((retVal = rtl8367c_setAsicRegBit(0x1311, 12, pPortAbility->forcemode)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if (pPortAbility->link == 1)
-+                    {
-+                        if((retVal = rtl8367c_setAsicRegBit(0x1311, 4, 0)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        if((retVal = rtl8367c_setAsicRegBit(0x1311, 4, 1)) != RT_ERR_OK)
-+                            return retVal;
-+                    }
-+                    else
-+                    {
-+                        if((retVal = rtl8367c_setAsicRegBits(0x1311, 0x3, 2)) != RT_ERR_OK)
-+                            return retVal;
-+                    }
-+
-+                    /*disable force ability   ---      */
-+                    if((retVal = rtl8367c_setAsicRegBit(0x137c, 12, 0)) != RT_ERR_OK)
-+                        return retVal;
-+                    return RT_ERR_OK;
-+                }
-+            }
-+
-+
-+        }
-+        else if (2 == id)
-+        {
-+
-+            if((retVal = rtl8367c_getAsicRegBit(0x1d95, 0, &sgmiibit)) != RT_ERR_OK)
-+                    return retVal;
-+            if (sgmiibit == 1)
-+            {
-+                /*for 1000x/100fx/1000x_100fx, param has to bet set to serdes registers*/
-+                if((retVal = rtl8367c_getAsicReg(0x1d95, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+                /*cfg_mac7_sel_sgmii=1 & cfg_mac7_fib =1*/
-+                if((regValue & 0x3) == 0x3)
-+                {
-+                    if((retVal = rtl8367c_getAsicRegBits(0x1d95, 0x1f00, &regValue2)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if(regValue2 == 0x4)
-+                    {
-+                        /*1000X*/
-+#if 0
-+                        if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                            return retVal;
-+#endif
-+                        if((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 1)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 4 0  bit 12  set 1,  bit15~13 = 4*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFF0FFF;
-+                        reg_data |= 0x9000;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,0, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 0 2  bit 6  set 1,  bit13 set to 0, bit12 nway_en*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 0, 2, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFFDFFF;
-+                        reg_data |= 0x40;
-+                        if(pPortAbility->forcemode)
-+                            reg_data &= 0xffffefff;
-+                        else
-+                            reg_data |= 0x1000;
-+
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,0,2, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 4 2  bit 8  rx pause,  bit7 tx pause*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 2, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        if (pPortAbility->txpause)
-+                            reg_data |= 0x80;
-+                        else
-+                            reg_data &= 0xffffff7f;
-+                        if (pPortAbility->rxpause)
-+                            reg_data |= 0x100;
-+                        else
-+                            reg_data &= 0xfffffeff;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,2, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                         /* 0 4 0  bit 12  set 0*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFFEFFF;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,0, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x4)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                    }
-+                    else if(regValue2 == 0x5)
-+                    {
-+                        /*100FX*/
-+#if 0
-+                        if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                            return retVal;
-+#endif
-+                        if((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 1)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 4 0  bit 12  set 1,  bit15~13 = 5*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFF0FFF;
-+                        reg_data |= 0xB000;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,0, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 0 2  bit 6  set 0,  bit13 set to 1, bit12 0*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 0, 2, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFFFFBF;
-+                        reg_data |= 0x2000;
-+                        reg_data &= 0xffffefff;
-+
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,0,2, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 4 2  bit 8  rx pause,  bit7 tx pause*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 2, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        if (pPortAbility->txpause)
-+                            reg_data |= 0x80;
-+                        else
-+                            reg_data &= 0xffffff7f;
-+                        if (pPortAbility->rxpause)
-+                            reg_data |= 0x100;
-+                        else
-+                            reg_data &= 0xfffffeff;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,2, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                         /* 0 4 0  bit 12  set 0*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFFEFFF;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,0, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x5)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                    }
-+                    else if(regValue2 == 0x7)
-+                    {
-+                        /*100FX*/
-+#if 0
-+                        if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                            return retVal;
-+#endif
-+                        if((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 1)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 4 0  bit 12  set 1,  bit15~13 = 4*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFF0FFF;
-+                        reg_data |= 0x9000;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,0, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 0 2  bit 6  set 1,  bit13 set to 0, bit12 nway_en*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 0, 2, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFFDFFF;
-+                        reg_data |= 0x40;
-+                        if(pPortAbility->forcemode)
-+                            reg_data &= 0xffffefff;
-+                        else
-+                            reg_data |= 0x1000;
-+
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,0,2, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 4 2  bit 8  rx pause,  bit7 tx pause*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 2, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        if (pPortAbility->txpause)
-+                            reg_data |= 0x80;
-+                        else
-+                            reg_data &= 0xffffff7f;
-+                        if (pPortAbility->rxpause)
-+                            reg_data |= 0x100;
-+                        else
-+                            reg_data &= 0xfffffeff;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,2, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                         /* 0 4 0  bit 12  set 0*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFFEFFF;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,0, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 4 0  bit 12  set 1,  bit15~13 = 5*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFF0FFF;
-+                        reg_data |= 0xB000;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,0, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 0 2  bit 6  set 0,  bit13 set to 1, bit12 0*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 0, 2, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFFFFBF;
-+                        reg_data |= 0x2000;
-+                        reg_data &= 0xffffefff;
-+
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,0,2, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* 0 4 2  bit 8  rx pause,  bit7 tx pause*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 2, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        if (pPortAbility->txpause)
-+                            reg_data |= 0x80;
-+                        else
-+                            reg_data  &= 0xffffff7f;
-+                        if (pPortAbility->rxpause)
-+                            reg_data |= 0x100;
-+                        else
-+                            reg_data &= 0xfffffeff;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,2, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                         /* 0 4 0  bit 12  set 0*/
-+                        if((retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+                        reg_data &= 0xFFFFEFFF;
-+                        if((retVal = rtl8367c_setAsicSdsReg(0,4,0, reg_data)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x7)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                    }
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(0x137d, 12, 0)) != RT_ERR_OK)
-+                        return retVal;
-+                    return RT_ERR_OK;
-+
-+                }
-+                /* new_cfg_sds_mode */
-+                if((retVal = rtl8367c_getAsicRegBits(0x1d95, 0x1f00, &regValue2)) != RT_ERR_OK)
-+                        return retVal;
-+                if(regValue2 == 0x2)
-+                {
-+                    /*SGMII*/
-+#if 0
-+                    if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                        return retVal;
-+#endif
-+                    if((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 1)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    for(i=0;i<0xfff; i++);
-+
-+                    /* 0 2 0  bit 8-9  nway*/
-+                    if((retVal = rtl8367c_getAsicSdsReg(0, 2, 0, &reg_data)) != RT_ERR_OK)
-+                        return retVal;
-+                    reg_data &= 0xfffffcff;
-+                    if (pPortAbility->nway)
-+                        reg_data &= 0xfffffcff;
-+                    else
-+                        reg_data |= 0x100;
-+                    if((retVal = rtl8367c_setAsicSdsReg(0,2,0, reg_data)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x2)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    for(i=0;i<0xfff; i++);
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_FDUP_OFFSET, pPortAbility->duplex)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_SPD_MASK, pPortAbility->speed)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_TXFC_OFFSET, pPortAbility->txpause)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_RXFC_OFFSET, pPortAbility->rxpause)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_LINK_OFFSET, pPortAbility->link)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(0x137d, 12, 0)) != RT_ERR_OK)
-+                        return retVal;
-+                    return RT_ERR_OK;
-+                }
-+            }
-+            else
-+            {
-+
-+                /*ext2_force_ablty*/
-+                if((retVal = rtl8367c_setAsicRegBit(0x13c4, 2, pPortAbility->duplex)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if((retVal = rtl8367c_setAsicRegBits(0x13c4, 0x3, pPortAbility->speed)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if((retVal = rtl8367c_setAsicRegBit(0x13c4, 4, pPortAbility->link)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if((retVal = rtl8367c_setAsicRegBit(0x13c4, 6, pPortAbility->txpause)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if((retVal = rtl8367c_setAsicRegBit(0x13c4, 5, pPortAbility->rxpause)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*force mode for ext2*/
-+                if((retVal = rtl8367c_setAsicRegBit(0x13c4, 12, pPortAbility->forcemode)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if (pPortAbility->link == 1)
-+                {
-+                    if((retVal = rtl8367c_setAsicRegBit(0x13c4, 4, 0)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(0x13c4, 4, 1)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+                else
-+                {
-+                    if((retVal = rtl8367c_setAsicRegBits(0x13c4, 0x3, 2)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+
-+
-+                if((retVal = rtl8367c_getAsicRegBit(0x1d3d, 10, &reg_data)) != RT_ERR_OK)
-+                        return retVal;
-+                if(reg_data == 1)
-+                {
-+                if((retVal = rtl8367c_setAsicRegBit(0x1311, 2, pPortAbility->duplex)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBits(0x1311, 0x3, pPortAbility->speed)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(0x1311, 4, pPortAbility->link)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(0x1311, 6, pPortAbility->txpause)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if((retVal = rtl8367c_setAsicRegBit(0x1311, 5, pPortAbility->rxpause)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    /*force mode for ext1*/
-+                    if((retVal = rtl8367c_setAsicRegBit(0x1311, 12, pPortAbility->forcemode)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if (pPortAbility->link == 1)
-+                    {
-+                        if((retVal = rtl8367c_setAsicRegBit(0x1311, 4, 0)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        if((retVal = rtl8367c_setAsicRegBit(0x1311, 4, 1)) != RT_ERR_OK)
-+                            return retVal;
-+                    }
-+                    else
-+                    {
-+                        if((retVal = rtl8367c_setAsicRegBits(0x1311, 0x3, 2)) != RT_ERR_OK)
-+                            return retVal;
-+                    }
-+                }
-+
-+
-+            }
-+
-+            /*disable force ability   ---      */
-+            if((retVal = rtl8367c_setAsicRegBit(0x137d, 12, 0)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+#if 0
-+        if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_FDUP_OFFSET, pPortAbility->duplex)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_SPD_MASK, pPortAbility->speed)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_TXFC_OFFSET, pPortAbility->txpause)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_RXFC_OFFSET, pPortAbility->rxpause)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_LINK_OFFSET, pPortAbility->link)) != RT_ERR_OK)
-+            return retVal;
-+#endif
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortForceLinkExt
-+ * Description:
-+ *      Get external interface force linking configuration
-+ * Input:
-+ *      id          - external interface id (0~1)
-+ *      pPortAbility - port ability configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortForceLinkExt(rtk_uint32 id, rtl8367c_port_ability_t *pPortAbility)
-+{
-+    rtk_uint32  reg_data, regValue, type;
-+    rtk_uint32  sgmiiSel;
-+    rtk_uint32  hsgmiiSel;
-+    ret_t       retVal;
-+
-+    /* Invalid input parameter */
-+    if(id >= RTL8367C_EXTNO)
-+        return RT_ERR_OUT_OF_RANGE;
-+    /*cfg_magic_id  &  get chip_id*/
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicReg(0x1300, &regValue)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0000)) != RT_ERR_OK)
-+        return retVal;
-+
-+    type = 0;
-+
-+    switch (regValue)
-+    {
-+        case 0x0276:
-+        case 0x0597:
-+        case 0x6367:
-+            type = 1;
-+            break;
-+        case 0x0652:
-+        case 0x6368:
-+            type = 2;
-+            break;
-+        case 0x0801:
-+        case 0x6511:
-+            type = 3;
-+            break;
-+        default:
-+            return RT_ERR_FAILED;
-+    }
-+
-+    if (1 == type)
-+    {
-+        if(1 == id)
-+        {
-+            if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_MAC8_SEL_SGMII_OFFSET, &sgmiiSel)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_MAC8_SEL_HSGMII_OFFSET, &hsgmiiSel)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if( (sgmiiSel == 1) || (hsgmiiSel == 1) )
-+            {
-+                memset(pPortAbility, 0x00, sizeof(rtl8367c_port_ability_t));
-+                pPortAbility->forcemode = 1;
-+
-+                if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_FDUP_OFFSET, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                pPortAbility->duplex = reg_data;
-+
-+                if((retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_SPD_MASK, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                pPortAbility->speed = reg_data;
-+
-+                if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_LINK_OFFSET, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                pPortAbility->link = reg_data;
-+
-+                if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_TXFC_OFFSET, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                pPortAbility->txpause = reg_data;
-+
-+                if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_SGMII_RXFC_OFFSET, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                pPortAbility->rxpause = reg_data;
-+
-+                return RT_ERR_OK;
-+            }
-+        }
-+
-+        if(0 == id || 1 == id)
-+            retVal = rtl8367c_getAsicReg(RTL8367C_REG_DIGITAL_INTERFACE0_FORCE+id, &reg_data);
-+        else
-+            retVal = rtl8367c_getAsicReg(RTL8367C_REG_DIGITAL_INTERFACE2_FORCE, &reg_data);
-+
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        pPortAbility->forcemode = (reg_data >> 12) & 0x0001;
-+        pPortAbility->mstfault  = (reg_data >> 9) & 0x0001;
-+        pPortAbility->mstmode   = (reg_data >> 8) & 0x0001;
-+        pPortAbility->nway      = (reg_data >> 7) & 0x0001;
-+        pPortAbility->txpause   = (reg_data >> 6) & 0x0001;
-+        pPortAbility->rxpause   = (reg_data >> 5) & 0x0001;
-+        pPortAbility->link      = (reg_data >> 4) & 0x0001;
-+        pPortAbility->duplex    = (reg_data >> 2) & 0x0001;
-+        pPortAbility->speed     = reg_data & 0x0003;
-+    }
-+    else if (2 == type)
-+    {
-+        if (id == 1)
-+        {
-+            if ((retVal = rtl8367c_getAsicReg(0x1311, &reg_data))!=RT_ERR_OK)
-+                return retVal;
-+
-+            pPortAbility->forcemode = (reg_data >> 12) & 1;
-+            pPortAbility->duplex = (reg_data >> 2) & 1;
-+            pPortAbility->link = (reg_data >> 4) & 1;
-+            pPortAbility->speed = reg_data & 3;
-+            pPortAbility->rxpause = (reg_data >> 5) & 1;
-+            pPortAbility->txpause = (reg_data >> 6) & 1;
-+        }
-+        else if (2 == id)
-+        {
-+            if ((retVal = rtl8367c_getAsicReg(0x13c4, &reg_data))!=RT_ERR_OK)
-+                return retVal;
-+
-+            pPortAbility->forcemode = (reg_data >> 12) & 1;
-+            pPortAbility->duplex = (reg_data >> 2) & 1;
-+            pPortAbility->link = (reg_data >> 4) & 1;
-+            pPortAbility->speed = reg_data & 3;
-+            pPortAbility->rxpause = (reg_data >> 5) & 1;
-+            pPortAbility->txpause = (reg_data >> 6) & 1;
-+        }
-+    }
-+    else if (3 == type)
-+    {
-+        if (id == 1)
-+        {
-+            if ((retVal = rtl8367c_getAsicReg(0x1311, &reg_data))!=RT_ERR_OK)
-+                return retVal;
-+
-+            pPortAbility->forcemode = (reg_data >> 12) & 1;
-+            pPortAbility->duplex = (reg_data >> 2) & 1;
-+            pPortAbility->link = (reg_data >> 4) & 1;
-+            pPortAbility->speed = reg_data & 3;
-+            pPortAbility->rxpause = (reg_data >> 5) & 1;
-+            pPortAbility->txpause = (reg_data >> 6) & 1;
-+        }
-+        else if (2 == id)
-+        {
-+            if ((retVal = rtl8367c_getAsicReg(0x13c4, &reg_data))!=RT_ERR_OK)
-+                return retVal;
-+
-+            pPortAbility->forcemode = (reg_data >> 12) & 1;
-+            pPortAbility->duplex = (reg_data >> 2) & 1;
-+            pPortAbility->link = (reg_data >> 4) & 1;
-+            pPortAbility->speed = reg_data & 3;
-+            pPortAbility->rxpause = (reg_data >> 5) & 1;
-+            pPortAbility->txpause = (reg_data >> 6) & 1;
-+        }
-+    }
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortExtMode
-+ * Description:
-+ *      Set external interface mode configuration
-+ * Input:
-+ *      id      - external interface id (0~2)
-+ *      mode    - external interface mode
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortExtMode(rtk_uint32 id, rtk_uint32 mode)
-+{
-+    ret_t   retVal;
-+    rtk_uint32 i, regValue, type, option,reg_data;
-+    rtk_uint32 idx;
-+    rtk_uint32 redData[][2] =   { {0x04D7, 0x0480}, {0xF994, 0x0481}, {0x21A2, 0x0482}, {0x6960, 0x0483}, {0x9728, 0x0484}, {0x9D85, 0x0423}, {0xD810, 0x0424}, {0x83F2, 0x002E} };
-+    rtk_uint32 redDataSB[][2] = { {0x04D7, 0x0480}, {0xF994, 0x0481}, {0x31A2, 0x0482}, {0x6960, 0x0483}, {0x9728, 0x0484}, {0x9D85, 0x0423}, {0xD810, 0x0424}, {0x83F2, 0x002E} };
-+    rtk_uint32 redData1[][2] =  { {0x82F1, 0x0500}, {0xF195, 0x0501}, {0x31A2, 0x0502}, {0x796C, 0x0503}, {0x9728, 0x0504}, {0x9D85, 0x0423}, {0xD810, 0x0424}, {0x0F80, 0x0001}, {0x83F2, 0x002E} };
-+    rtk_uint32 redData5[][2] =  { {0x82F1, 0x0500}, {0xF195, 0x0501}, {0x31A2, 0x0502}, {0x796C, 0x0503}, {0x9728, 0x0504}, {0x9D85, 0x0423}, {0xD810, 0x0424}, {0x0F80, 0x0001}, {0x83F2, 0x002E} };
-+    rtk_uint32 redData6[][2] =  { {0x82F1, 0x0500}, {0xF195, 0x0501}, {0x31A2, 0x0502}, {0x796C, 0x0503}, {0x9728, 0x0504}, {0x9D85, 0x0423}, {0xD810, 0x0424}, {0x0F80, 0x0001}, {0x83F2, 0x002E} };
-+    rtk_uint32 redData8[][2] =  { {0x82F1, 0x0500}, {0xF995, 0x0501}, {0x31A2, 0x0502}, {0x796C, 0x0503}, {0x9728, 0x0504}, {0x9D85, 0x0423}, {0xD810, 0x0424}, {0x0F80, 0x0001}, {0x83F2, 0x002E} };
-+    rtk_uint32 redData9[][2] =  { {0x82F1, 0x0500}, {0xF995, 0x0501}, {0x31A2, 0x0502}, {0x796C, 0x0503}, {0x9728, 0x0504}, {0x9D85, 0x0423}, {0xD810, 0x0424}, {0x0F80, 0x0001}, {0x83F2, 0x002E} };
-+    rtk_uint32 redDataHB[][2] = { {0x82F0, 0x0500}, {0xF195, 0x0501}, {0x31A2, 0x0502}, {0x7960, 0x0503}, {0x9728, 0x0504}, {0x9D85, 0x0423}, {0xD810, 0x0424}, {0x0F80, 0x0001}, {0x83F2, 0x002E} };
-+
-+    if(id >= RTL8367C_EXTNO)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(mode >= EXT_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    /* magic number*/
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
-+        return retVal;
-+    /* Chip num */
-+    if((retVal = rtl8367c_getAsicReg(0x1300, &regValue)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0000)) != RT_ERR_OK)
-+        return retVal;
-+
-+    type = 0;
-+
-+    switch (regValue)
-+    {
-+        case 0x0276:
-+        case 0x0597:
-+        case 0x6367:
-+            type = 1;
-+            break;
-+        case 0x0652:
-+        case 0x6368:
-+            type = 2;
-+            break;
-+        case 0x0801:
-+        case 0x6511:
-+            type = 3;
-+            break;
-+        default:
-+            return RT_ERR_FAILED;
-+    }
-+
-+
-+    if (1==type)
-+    {
-+        if((mode == EXT_1000X_100FX) || (mode == EXT_1000X) || (mode == EXT_100FX))
-+        {
-+            if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_REG_TO_ECO4, 5, 1)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_REG_TO_ECO4, 7, 1)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_CHIP_RESET, RTL8367C_DW8051_RST_OFFSET, 1)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_MISCELLANEOUS_CONFIGURE0, RTL8367C_DW8051_EN_OFFSET, 1)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_ACS_IROM_ENABLE_OFFSET, 1)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_IROM_MSB_OFFSET, 0)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if(mode == EXT_1000X_100FX)
-+            {
-+                for(idx = 0; idx < FIBER2_AUTO_INIT_SIZE; idx++)
-+                {
-+                    if ((retVal = rtl8367c_setAsicReg(0xE000 + idx, (rtk_uint32)Fiber2_Auto[idx])) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+            }
-+
-+            if(mode == EXT_1000X)
-+            {
-+                for(idx = 0; idx < FIBER2_1G_INIT_SIZE; idx++)
-+                {
-+                    if ((retVal = rtl8367c_setAsicReg(0xE000 + idx, (rtk_uint32)Fiber2_1G[idx])) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+            }
-+
-+            if(mode == EXT_100FX)
-+            {
-+                for(idx = 0; idx < FIBER2_100M_INIT_SIZE; idx++)
-+                {
-+                    if ((retVal = rtl8367c_setAsicReg(0xE000 + idx, (rtk_uint32)Fiber2_100M[idx])) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+            }
-+
-+            if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_IROM_MSB_OFFSET, 0)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_ACS_IROM_ENABLE_OFFSET, 0)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_CHIP_RESET, RTL8367C_DW8051_RST_OFFSET, 0)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+
-+        if(mode == EXT_GMII)
-+        {
-+            if( (retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_EXT0_RGMXF, RTL8367C_EXT0_RGTX_INV_OFFSET, 1)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if( (retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_EXT1_RGMXF, RTL8367C_EXT1_RGTX_INV_OFFSET, 1)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if( (retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_EXT_TXC_DLY, RTL8367C_EXT1_GMII_TX_DELAY_MASK, 5)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if( (retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_EXT_TXC_DLY, RTL8367C_EXT0_GMII_TX_DELAY_MASK, 6)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+
-+        /* Serdes reset */
-+        if( (mode == EXT_TMII_MAC) || (mode == EXT_TMII_PHY) )
-+        {
-+            if( (retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_BYPASS_LINE_RATE, id, 1)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+        else
-+        {
-+            if( (retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_BYPASS_LINE_RATE, id, 0)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+
-+        if( (mode == EXT_SGMII) || (mode == EXT_HSGMII) )
-+        {
-+            if(id != 1)
-+                return RT_ERR_PORT_ID;
-+
-+            if((retVal = rtl8367c_setAsicReg(0x13C0, 0x0249)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicReg(0x13C1, &option)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicReg(0x13C0, 0x0000)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+
-+        if(mode == EXT_SGMII)
-+        {
-+            if(option == 0)
-+            {
-+                for(i = 0; i <= 7; i++)
-+                {
-+                    if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, redData[i][0])) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, redData[i][1])) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+            }
-+            else
-+            {
-+                for(i = 0; i <= 7; i++)
-+                {
-+                    if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, redDataSB[i][0])) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, redDataSB[i][1])) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+            }
-+        }
-+
-+        if(mode == EXT_HSGMII)
-+        {
-+            if(option == 0)
-+            {
-+                if( (retVal = rtl8367c_setAsicReg(0x13c2, 0x0249)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_getAsicReg(0x1301, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(0x13c2, 0x0000)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ( ((regValue & 0x00F0) >> 4) == 0x0001)
-+                {
-+                    for(i = 0; i <= 8; i++)
-+                    {
-+                        if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, redData1[i][0])) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, redData1[i][1])) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+                            return retVal;
-+                    }
-+                }
-+                else if ( ((regValue & 0x00F0) >> 4) == 0x0005)
-+                {
-+                    for(i = 0; i <= 8; i++)
-+                    {
-+                        if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, redData5[i][0])) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, redData5[i][1])) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+                            return retVal;
-+                    }
-+                }
-+                else if ( ((regValue & 0x00F0) >> 4) == 0x0006)
-+                {
-+                    for(i = 0; i <= 8; i++)
-+                    {
-+                        if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, redData6[i][0])) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, redData6[i][1])) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+                            return retVal;
-+                    }
-+                }
-+                else if ( ((regValue & 0x00F0) >> 4) == 0x0008)
-+                {
-+                    for(i = 0; i <= 8; i++)
-+                    {
-+                        if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, redData8[i][0])) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, redData8[i][1])) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+                            return retVal;
-+                    }
-+                }
-+                else if ( ((regValue & 0x00F0) >> 4) == 0x0009)
-+                {
-+                    for(i = 0; i <= 8; i++)
-+                    {
-+                        if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, redData9[i][0])) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, redData9[i][1])) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+                            return retVal;
-+                    }
-+                }
-+            }
-+            else
-+            {
-+                for(i = 0; i <= 8; i++)
-+                {
-+                    if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, redDataHB[i][0])) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, redDataHB[i][1])) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+            }
-+        }
-+
-+        /* Only one ext port should care SGMII setting */
-+        if(id == 1)
-+        {
-+
-+            if(mode == EXT_SGMII)
-+            {
-+                if( (retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_MAC8_SEL_SGMII_OFFSET, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_MAC8_SEL_HSGMII_OFFSET, 0)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else if(mode == EXT_HSGMII)
-+            {
-+                if( (retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_MAC8_SEL_SGMII_OFFSET, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_MAC8_SEL_HSGMII_OFFSET, 1)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else
-+            {
-+
-+                if((mode != EXT_1000X_100FX) && (mode != EXT_1000X) && (mode != EXT_100FX))
-+                {
-+                    if( (retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_MAC8_SEL_SGMII_OFFSET, 0)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    if( (retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_MAC8_SEL_HSGMII_OFFSET, 0)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+            }
-+        }
-+
-+        if(0 == id || 1 == id)
-+        {
-+            if((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_DIGITAL_INTERFACE_SELECT, RTL8367C_SELECT_GMII_0_MASK << (id * RTL8367C_SELECT_GMII_1_OFFSET), mode)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+        else
-+        {
-+            if((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_DIGITAL_INTERFACE_SELECT_1, RTL8367C_SELECT_GMII_2_MASK, mode)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+
-+        /* Serdes not reset */
-+        if( (mode == EXT_SGMII) || (mode == EXT_HSGMII) )
-+        {
-+            if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, 0x7106)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, 0x0003)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+
-+        if( (mode == EXT_SGMII) || (mode == EXT_HSGMII) )
-+        {
-+            if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_CHIP_RESET, RTL8367C_DW8051_RST_OFFSET, 1)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_MISCELLANEOUS_CONFIGURE0, RTL8367C_DW8051_EN_OFFSET, 1)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_ACS_IROM_ENABLE_OFFSET, 1)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_IROM_MSB_OFFSET, 0)) != RT_ERR_OK)
-+                return retVal;
-+
-+            for(idx = 0; idx < SGMII_INIT_SIZE; idx++)
-+            {
-+                if ((retVal = rtl8367c_setAsicReg(0xE000 + idx, (rtk_uint32)Sgmii_Init[idx])) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+
-+            if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_IROM_MSB_OFFSET, 0)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_ACS_IROM_ENABLE_OFFSET, 0)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_CHIP_RESET, RTL8367C_DW8051_RST_OFFSET, 0)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+    }
-+    else if (2 == type)
-+    {
-+        /* Serdes reset */
-+        if( (mode == EXT_TMII_MAC) || (mode == EXT_TMII_PHY) )
-+        {
-+            if( (retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_BYPASS_LINE_RATE, id+2, 1)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+        else
-+        {
-+            if( (retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_BYPASS_LINE_RATE, id+2, 0)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+
-+        /*set MAC mode*/
-+        if (id == 1)
-+        {
-+            if(mode == EXT_HSGMII)
-+                return RT_ERR_PORT_ID;
-+
-+            if (mode == EXT_SGMII)
-+            {
-+                /*cfg port8 with MII mac mode*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1305, 0xf0, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*enable port8 SGMII*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d92, 14, 1)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else if (mode == EXT_1000X || mode == EXT_100FX || mode == EXT_1000X_100FX)
-+            {
-+                /*cfg port8 with MII mac mode*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1305, 0xf0, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*disable port8 SGMII*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d92, 14, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*set fiber link up*/
-+                if((retVal = rtl8367c_setAsicRegBit(0x6210, 11, 0)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else
-+            {
-+                /*cfg port8 with MII mac mode*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1305, 0xf0, mode)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*disable port8 SGMII*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d92, 14, 0)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            /*disable SDS 1*/
-+            if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+        else if(id == 2)
-+        {
-+            if (mode == EXT_HSGMII)
-+            {
-+                if ((retVal = rtl8367c_setAsicReg(0x130, 7)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicReg(0x39f, 7)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicReg(0x3fa, 7)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else
-+            {
-+                if ((retVal = rtl8367c_setAsicReg(0x130, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicReg(0x39f, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicReg(0x3fa, 4)) != RT_ERR_OK)
-+                    return retVal;
-+
-+            }
-+
-+
-+            if (mode == EXT_SGMII)
-+            {
-+                /*cfg port9 with MII mac mode*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x13c3, 0xf, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*enable port9 SGMII*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d92, 6, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*disable port9 HSGMII*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d92, 7, 0)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else if (mode == EXT_HSGMII)
-+            {
-+                /*cfg port9 with MII mac mode*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x13c3, 0xf, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*disable port9 SGMII*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d92, 6, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*enable port9 HSGMII*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d92, 7, 1)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else if (mode == EXT_1000X || mode == EXT_100FX || mode == EXT_1000X_100FX)
-+            {
-+                /*cfg port9 with MII mac mode*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x13c3, 0xf, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*disable port9 SGMII*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d92, 6, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*disable port9 HSGMII*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d92, 7, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*set fiber link up*/
-+                if((retVal = rtl8367c_setAsicRegBit(0x6200, 11, 0)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else
-+            {
-+                /*cfg port9 with MII mac mode*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x13c3, 0xf, mode)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*disable port9 SGMII*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d92, 6, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*disable port9 HSGMII*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d92, 7, 0)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            /*disable SDS 0*/
-+            if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f, 0x1f)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+
-+        /*SET TO RGMII MODE*/
-+        if (mode == EXT_RGMII)
-+        {
-+            /*disable paral led pad*/
-+            if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_PARA_LED_IO_EN3, 0)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_PARA_LED_IO_EN1, 0)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_PARA_LED_IO_EN2, 0)) != RT_ERR_OK)
-+                return retVal;
-+
-+            /*set MAC8 mode*/
-+            if (id == 1)
-+            {
-+                /*1: RGMII1 bias work at 3.3V, 0: RGMII1 bias work at 2.5V*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1303, 9, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*drving 1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1303, 6, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*drving 1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1303, 4, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*show rate = 0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1303, 1, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*EXT1 RGMII TXC delay 2ns*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1307, 3, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_Ext1_rgtxc_dly = 0*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x13f9, 0x38, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*RXDLY = 0*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1307, 0x7, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_rg1_dn = 4*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1304, 0x7000, 4)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_rg1_dp = 4*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x13f9, 0x700, 4)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else if (id == 2)
-+            {
-+                /*1: RGMII1 bias work at 3.3V, 0: RGMII1 bias work at 2.5V*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1303, 10, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*drving 1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x13e2, 2, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*drving 1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x13e2, 1, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*show rate = 0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x13e2, 0, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*EXT1 RGMII TXC delay 2ns*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x13c5, 3, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_Ext1_rgtxc_dly = 0*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x13f9, 0x1c0, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*RXDLY = 0*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x13c5, 0x7, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_rg1_dn = 4*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x13e2, 0x1c0, 4)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_rg1_dp = 4*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x13e2, 0x38, 4)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+        }
-+        else if (mode == EXT_SGMII)
-+        {
-+            if (id == 1)
-+            {
-+                /*sds 1     reg 1    page 0x21     write value  0xec91*/
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, 0xec91)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, (0x21<<5) | 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*sds 1     reg 5    page 0x24     write value  0x5825*/
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, 0x5825)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, (0x24<<5) | 5)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f00, 2)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*?????????????????*/
-+
-+            }
-+            else if (id == 2)
-+            {
-+                /*sds 0     reg 0    page 0x28     write value  0x942c*/
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, 0x942c)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, (0x28<<5) | 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*sds 0     reg 0    page 0x24     write value  0x942c*/
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, 0x942c)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, (0x24<<5) | 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*sds 0     reg 5    page 0x21     write value  0x8dc3*/
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, 0x8dc3)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, (0x21<<5) | 5)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f, 2)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*?????????????????*/
-+            }
-+        }
-+        else if (mode == EXT_HSGMII)
-+        {
-+            if (id == 2)
-+            {
-+                /*sds 0     reg 0    page 0x28     write value  0x942c*/
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, 0x942c)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, (0x28<<5) | 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*sds 0     reg 0    page 0x24     write value  0x942c*/
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, 0x942c)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, (0x24<<5) | 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*sds 0     reg 5    page 0x21     write value  0x8dc3*/
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, 0x8dc3)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, (0x21<<5) | 5)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+
-+                /* optimizing HISGMII performance while RGMII used & */
-+                /*sds 0     reg 9     page 0x21     write value 0x3931*/
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, 0x3931)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, (0x21<<5)|9) ) != RT_ERR_OK)
-+                        return retVal;
-+
-+                if( (retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
-+                        return retVal;
-+
-+
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f, 0x12)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*?????????????????*/
-+            }
-+        }
-+        else if (mode == EXT_1000X)
-+        {
-+            if (id == 1)
-+            {
-+
-+                if( (retVal = rtl8367c_setAsicSdsReg(1, 1, 0x21, 0xec91)) != RT_ERR_OK)
-+                    return retVal;
-+                if( (retVal = rtl8367c_setAsicSdsReg(1, 5, 0x24, 0x5825)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f00, 4)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*patch speed change sds1 1000M*/
-+                if( (retVal = rtl8367c_getAsicSdsReg(1, 4, 0, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+                regValue &= 0xFFFF0FFF;
-+                regValue |= 0x9000;
-+                if( (retVal = rtl8367c_setAsicSdsReg(1, 4, 0, regValue)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_getAsicSdsReg(1, 0, 2, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+                regValue &= 0xFFFFdFFF;
-+                regValue |= 0x40;
-+                if( (retVal = rtl8367c_setAsicSdsReg(1, 0, 2, regValue)) != RT_ERR_OK)
-+                    return retVal;
-+
-+
-+                if( (retVal = rtl8367c_getAsicSdsReg(1, 4, 0, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+                regValue &= 0xFFFFEFFF;
-+                if( (retVal = rtl8367c_setAsicSdsReg(1, 4, 0, regValue)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f00, 4)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x6000, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+            }
-+            else if (id == 2)
-+            {
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 0, 0x28, 0x942c)) != RT_ERR_OK)
-+                    return retVal;
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 0, 0x24, 0x942c)) != RT_ERR_OK)
-+                    return retVal;
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 5, 0x21, 0x8dc3)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f, 4)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*patch speed change sds0 1000M*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f, 0x1f)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+                regValue &= 0xFFFF0FFF;
-+                regValue |= 0x9000;
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 4, 0, regValue)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_getAsicSdsReg(0, 0, 2, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+                regValue &= 0xFFFFDFFF;
-+                regValue |= 0x40;
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 0, 2, regValue)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+                regValue &= 0xFFFFEFFF;
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 4, 0, regValue)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f, 4)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0xe0, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+            }
-+        }
-+        else if (mode == EXT_100FX)
-+        {
-+            if (id == 1)
-+            {
-+                if( (retVal = rtl8367c_setAsicSdsReg(1, 1, 0x21, 0xec91)) != RT_ERR_OK)
-+                    return retVal;
-+                if( (retVal = rtl8367c_setAsicSdsReg(1, 5, 0x24, 0x5825)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f00, 5)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*patch speed change sds1 100M*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                    return retVal;
-+                if( (retVal = rtl8367c_getAsicSdsReg(1, 4, 0, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+                regValue &= 0xFFFF0FFF;
-+                regValue |= 0xb000;
-+                if( (retVal = rtl8367c_setAsicSdsReg(1, 4, 0, regValue)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_getAsicSdsReg(1, 0, 2, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+                regValue &= 0xFFFFFFBF;
-+                regValue |= 0x2000;
-+                if( (retVal = rtl8367c_setAsicSdsReg(1, 0, 2, regValue)) != RT_ERR_OK)
-+                    return retVal;
-+#if 0
-+                if( (retVal = rtl8367c_setAsicReg(0x6214, 0x1a0)) != RT_ERR_OK)
-+                    return retVal;
-+#endif
-+                if( (retVal = rtl8367c_getAsicSdsReg(1, 4, 0, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+                regValue &= 0xFFFFEFFF;
-+                if( (retVal = rtl8367c_setAsicSdsReg(1, 4, 0, regValue)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f00, 5)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x6000, 0)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else if (id == 2)
-+            {
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 0, 0x28, 0x942c)) != RT_ERR_OK)
-+                    return retVal;
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 0, 0x24, 0x942c)) != RT_ERR_OK)
-+                    return retVal;
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 5, 0x21, 0x8dc3)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f, 5)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*patch speed change sds0 100M*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f, 0x1f)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+                regValue &= 0xFFFF0FFF;
-+                regValue |= 0xb000;
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 4, 0, regValue)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_getAsicSdsReg(0, 0, 2, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+                regValue &= 0xFFFFFFBF;
-+                regValue |= 0x2000;
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 0, 2, regValue)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if( (retVal = rtl8367c_getAsicSdsReg(0, 4, 0, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+                regValue &= 0xFFFFEFFF;
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 4, 0, regValue)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f, 5)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0xe0, 0)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+        }
-+        else if (mode == EXT_1000X_100FX)
-+        {
-+            if (id == 1)
-+            {
-+                if( (retVal = rtl8367c_setAsicSdsReg(1, 1, 0x21, 0xec91)) != RT_ERR_OK)
-+                    return retVal;
-+                if( (retVal = rtl8367c_setAsicSdsReg(1, 5, 0x24, 0x5825)) != RT_ERR_OK)
-+                    return retVal;
-+                if( (retVal = rtl8367c_setAsicSdsReg(1, 13, 0, 0x4616)) != RT_ERR_OK)
-+                    return retVal;
-+                if( (retVal = rtl8367c_setAsicSdsReg(1, 1, 0, 0xf20)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f00, 7)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else if (id == 2)
-+            {
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 0, 0x28, 0x942c)) != RT_ERR_OK)
-+                    return retVal;
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 0, 0x24, 0x942c)) != RT_ERR_OK)
-+                    return retVal;
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 5, 0x21, 0x8dc3)) != RT_ERR_OK)
-+                    return retVal;
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 13, 0, 0x4616)) != RT_ERR_OK)
-+                    return retVal;
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 1, 0, 0xf20)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d92, 0x1f, 7)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+        }
-+
-+    }
-+    else if (3 == type)
-+    {
-+
-+        /*restore patch, by designer. patch Tx FIFO issue, when not HSGMII 2.5G mode
-+         #sds0, page 1, reg 1, bit4=0*/
-+        if( (retVal = rtl8367c_getAsicSdsReg(0, 1, 1, &regValue)) != RT_ERR_OK)
-+            return retVal;
-+        regValue &= 0xFFFFFFEF;
-+        if( (retVal = rtl8367c_setAsicSdsReg(0, 1, 1, regValue)) != RT_ERR_OK)
-+            return retVal;
-+
-+        /*set for mac 6*/
-+        if (1 == id)
-+        {
-+            /*force port6 linkdown*/
-+            if ((retVal = rtl8367c_setAsicReg(0x137c, 0x1000)) != RT_ERR_OK)
-+                    return retVal;
-+
-+            if ((retVal = rtl8367c_getAsicRegBit(0x1d9d, 6, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+            while(reg_data == 0)
-+            {
-+                if ((retVal = rtl8367c_getAsicRegBit(0x1d9d, 6, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+
-+            if (mode == EXT_SGMII)
-+            {
-+                /* disable mac6 mode_ext1  mode*/
-+                if ((retVal = rtl8367c_getAsicRegBit(0x1d3d, 10, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+                if(reg_data == 0)
-+                {
-+                    if ((retVal = rtl8367c_setAsicRegBits(0x1305, 0xf0, 0)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+                /*cfg_bypass_line_rate[1]=0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x3f7, 1, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+
-+
-+                /*bit5: cfg_mac6_fib=0    &   bit7: cfg_mac6_fib2=0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 5, 0)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 7, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac7_fib=0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d95, 1, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac7_sel_sgmii= 0: MAC7 is not SGMII mode*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d95, 0, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*#cfg_sgmii_link=0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d11, 9, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac6_sel_hsgmii=0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d11, 11, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+
-+                /*bit13: cfg_sds_mode_sel_new=1 :Enable new sds mode config method*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*  bit[12:8]: Only valid when cfg_sds_mode_sel_new=1
-+                    new_cfg_sds_mode=0x1F (reset mode) */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac6_sel_sgmii= 1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d11, 6, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /* bit[12:8]: Only valid when cfg_sds_mode_sel_new=1
-+                   new_cfg_sds_mode=0x12  */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x2)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /* MAC link source*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d95, 2, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+
-+            }
-+            else if (mode == EXT_HSGMII)
-+            {
-+
-+                /*restore patch, by designer. patch Tx FIFO issue, when  HSGMII 2.5G mode
-+                 #sds0, page 1, reg 1, bit4=1*/
-+                if( (retVal = rtl8367c_getAsicSdsReg(0, 1, 1, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+                regValue |= 0x10;
-+                if( (retVal = rtl8367c_setAsicSdsReg(0, 1, 1, regValue)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                 /* mode_ext1 = disable*/
-+                /* disable mac6 mode_ext1  mode*/
-+                if ((retVal = rtl8367c_getAsicRegBit(0x1d3d, 10, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+                if(reg_data == 0)
-+                {
-+                    if ((retVal = rtl8367c_setAsicRegBits(0x1305, 0xf0, 0)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+
-+                if ((retVal = rtl8367c_setAsicRegBit(0x3f7, 1, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*bit5: cfg_mac6_fib=0   &   bit7: cfg_mac6_fib2=0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 5, 0)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 7, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac7_fib=0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d95, 1, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac7_sel_sgmii= 0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d95, 0, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac6_sel_sgmii=0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d11, 9, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac6_sel_hsgmii=1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d11, 11, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac6_sel_sgmii= 0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d11, 6, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicReg(0xd0,7)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicReg(0x399, 7)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicReg(0x3fa, 7)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*bit13: cfg_sds_mode_sel_new=1 :Enable new sds mode config method*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 1)) != RT_ERR_OK)
-+                    return retVal;
-+                /* bit[12:8]: Only valid when cfg_sds_mode_sel_new=1
-+                   new_cfg_sds_mode=0x12  */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x12)) != RT_ERR_OK)
-+                    return retVal;
-+                /*
-+                1: MAC link = SGMII SerDes link
-+                0: MAC link = SGMII config link £¨cfg_sgmii_link£©
-+                */
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d95, 2, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+            }
-+            else if(mode == EXT_1000X)
-+            {
-+                /* 0 2 0  bit 8~9  set 0, force n-way*/
-+                if((retVal = rtl8367c_getAsicSdsReg(0, 2, 0, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+                reg_data &= 0xFFFFFCFF;
-+                if((retVal = rtl8367c_setAsicSdsReg(0,2,0, reg_data)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                /* disable mac6 mode_ext1  mode*/
-+                if ((retVal = rtl8367c_getAsicRegBit(0x1d3d, 10, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+                if(reg_data == 0)
-+                {
-+                    if ((retVal = rtl8367c_setAsicRegBits(0x1305, 0xf0, 0)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+
-+                if ((retVal = rtl8367c_setAsicRegBit(0x3f7, 1, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicReg(0x1d11, 0x1500)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*bit13: cfg_sds_mode_sel_new=1 :Enable new sds mode config method
-+                  bit[1:0]:cfg_mac7_fib= 0  &  cfg_mac7_sel_sgmii=0
-+                */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 1)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 3, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /* bit0 :UTP/Fiber auto detect function enable or not, cfg_dis_det=1:disable
-+                   bit3:Force UTP/Fiber auto detect function enable or not, cfg_force_auto-detect=1 */
-+                if ((retVal = rtl8367c_setAsicReg(0x13eb, 0x15bb)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*bit3:  Serdes force mode:cfg_sds_frc_mode=1
-+                  bit[2:0]: Serdes chip mode, cfg_sds_mode=3b'100 (force sds FIB1G mode) */
-+                if ((retVal = rtl8367c_setAsicReg(0x13e7, 0xc)) != RT_ERR_OK)
-+                    return retVal;
-+
-+
-+                /*bit5: cfg_mac6_fib=1 & bit7: cfg_mac6_fib2=1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 5, 1)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 7, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac6_sel_hsgmii=0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d11, 11, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac6_sel_sgmii= 1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d11, 6, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /* bit[12:8]: Only valid when cfg_sds_mode_sel_new=1
-+                   new_cfg_sds_mode=0x4  */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x4)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else if(mode == EXT_100FX)
-+            {
-+                /* 0 2 0  bit 8~9  set 0, force n-way*/
-+                if((retVal = rtl8367c_getAsicSdsReg(0, 2, 0, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+                reg_data &= 0xFFFFFCFF;
-+                if((retVal = rtl8367c_setAsicSdsReg(0,2,0, reg_data)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                /* disable mac6 mode_ext1  mode*/
-+                if ((retVal = rtl8367c_getAsicRegBit(0x1d3d, 10, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+                if(reg_data == 0)
-+                {
-+                    if ((retVal = rtl8367c_setAsicRegBits(0x1305, 0xf0, 0)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+
-+                if ((retVal = rtl8367c_setAsicRegBit(0x3f7, 1, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicReg(0x1d11, 0x1500)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*bit13: cfg_sds_mode_sel_new=1 :Enable new sds mode config method
-+                  bit[1:0]:cfg_mac7_fib= 0  &  cfg_mac7_sel_sgmii=0
-+                */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 1)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 3, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /* bit0 :UTP/Fiber auto detect function enable or not, cfg_dis_det=1:disable
-+                   bit3:Force UTP/Fiber auto detect function enable or not, cfg_force_auto-detect=1 */
-+                if ((retVal = rtl8367c_setAsicReg(0x13eb, 0x15bb)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*!!!!! cfg_sds_frc_mode=1 &  cfg_sds_mode=3b'101 (force sds fib100M mode)*/
-+                if ((retVal = rtl8367c_setAsicReg(0x13e7, 0xc)) != RT_ERR_OK)
-+                    return retVal;
-+
-+
-+                /*bit5: cfg_mac6_fib=1 & bit7: cfg_mac6_fib2=1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 5, 1)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 7, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac6_sel_hsgmii=0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d11, 11, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac6_sel_sgmii= 1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d11, 6, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*  bit[12:8]: Only valid when cfg_sds_mode_sel_new=1
-+                    new_cfg_sds_mode=0x5 */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x5)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else if(mode == EXT_1000X_100FX)
-+            {
-+                /* 0 2 0  bit 8~9  set 0, force n-way*/
-+                if((retVal = rtl8367c_getAsicSdsReg(0, 2, 0, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+                reg_data &= 0xFFFFFCFF;
-+                if((retVal = rtl8367c_setAsicSdsReg(0,2,0, reg_data)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                /* disable mac6 mode_ext1  mode*/
-+                if ((retVal = rtl8367c_getAsicRegBit(0x1d3d, 10, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+                if(reg_data == 0)
-+                {
-+                    if ((retVal = rtl8367c_setAsicRegBits(0x1305, 0xf0, 0)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+
-+                if ((retVal = rtl8367c_setAsicRegBit(0x3f7, 1, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicReg(0x1d11, 0x1500)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*bit13: cfg_sds_mode_sel_new=1 :Enable new sds mode config method
-+                  bit[1:0]:cfg_mac7_fib= 0  &  cfg_mac7_sel_sgmii=0
-+                */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 0)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 3, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /* bit0 :UTP/Fiber auto detect function enable or not, cfg_dis_det=1:disable
-+                   bit3:Force UTP/Fiber auto detect function enable or not, cfg_force_auto-detect=1 */
-+                if ((retVal = rtl8367c_setAsicReg(0x13eb, 0x15bb)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*!!!!!! cfg_sds_frc_mode=1 &  cfg_sds_mode=3'b111: Fib1G/Fib100M auto detect */
-+                if ((retVal = rtl8367c_setAsicReg(0x13e7, 0xc)) != RT_ERR_OK)
-+                    return retVal;
-+
-+
-+                /*bit5: cfg_mac6_fib=1 & bit7: cfg_mac6_fib2=1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 5, 1)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 7, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac6_sel_hsgmii=0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d11, 11, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac6_sel_sgmii= 1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d11, 6, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*  bit[12:8]: Only valid when cfg_sds_mode_sel_new=1
-+                    new_cfg_sds_mode=0x7 */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x7)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else if(mode < EXT_SGMII)
-+            {
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d3d, 10, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicRegBit(0x3f7, 1, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /* keep default setting, disable mac6 sel SerDes mode,*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d11, 11, 0)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d11, 6, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*bit5: cfg_mac6_fib=0       &        bit7: cfg_mac6_fib2=0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 5, 0)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 7, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if (mode < EXT_GMII)
-+                {
-+                    /* set mac6 mode*/
-+                    if ((retVal = rtl8367c_setAsicRegBits(0x1305, 0xf0, mode)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+                else if(mode == EXT_RMII_MAC)
-+                {
-+                    /*!!!!!!*/
-+                    if ((retVal = rtl8367c_setAsicRegBits(0x1305, 0xf0, 7)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+                else if(mode == EXT_RMII_PHY)
-+                {
-+                    if ((retVal = rtl8367c_setAsicRegBits(0x1305, 0xf0, 8)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+
-+                if ((mode == EXT_TMII_MAC) || (mode == EXT_TMII_PHY))
-+                {
-+                    if ((retVal = rtl8367c_setAsicRegBit(0x3f7, 1, 1)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+            }
-+
-+        }
-+        else if (2 == id)
-+        {
-+
-+            /*force port7 linkdown*/
-+            if ((retVal = rtl8367c_setAsicReg(0x137d, 0x1000)) != RT_ERR_OK)
-+                    return retVal;
-+
-+            if ((retVal = rtl8367c_getAsicRegBit(0x1d9d, 7, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+            while(reg_data == 0)
-+            {
-+                if ((retVal = rtl8367c_getAsicRegBit(0x1d9d, 7, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+
-+            if (mode == EXT_SGMII)
-+            {
-+                /*disable mac7 sel ext2 xMII mode*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x13c3, 0xf,0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*restore ext2 ability*/
-+                if ((retVal = rtl8367c_setAsicReg(0x13c4, 0)) != RT_ERR_OK)
-+                    return retVal;
-+                /*  disable mac7  mode_ext2  */
-+                if ((retVal = rtl8367c_setAsicRegBit(0x3f7, 2, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*bit5: cfg_mac6_fib=0 & bit7: cfg_mac6_fib2=0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 5, 0)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 7, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*
-+                   bit0:cfg_mac7_sel_sgmii=0,MAC7 is not SGMII mode
-+                   bit1:cfg_mac7_fib= 0  */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 3, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac6_sel_hsgmii=0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d11, 11, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac6_sel_sgmii= 1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d11, 6, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*Enable new sds mode config method, cfg_sds_mode_sel_new=1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*  bit[12:8]: Only valid when cfg_sds_mode_sel_new=1
-+                    new_cfg_sds_mode=0x1F (reset mode) */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac7_sel_sgmii= 1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d95, 0, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*  bit[12:8]: Only valid when cfg_sds_mode_sel_new=1
-+                    new_cfg_sds_mode=0x2 (SGMII mode)*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x2)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*select MAC link source when port6/7 be set sgmii mode £¨cfg_sgmii_link£©*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d95, 2, 0)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else if (mode == EXT_1000X)
-+            {
-+                /*  disable mac7 MII/TMM/RMII/GMII/RGMII mode, mode_ext2 = disable */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x13c3, 0xf, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*restore ext2 ability*/
-+                if ((retVal = rtl8367c_setAsicReg(0x13c4, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /* 0 2 0  bit 8~9  set 0, force n-way*/
-+                if((retVal = rtl8367c_getAsicSdsReg(0, 2, 0, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+                reg_data &= 0xFFFFFCFF;
-+                if((retVal = rtl8367c_setAsicSdsReg(0,2,0, reg_data)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                /*restore ext2 ability*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x3f7, 2, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*  keep default setting, disable mac6 sel serdes*/
-+                if ((retVal = rtl8367c_setAsicReg(0x1d11, 0x1500)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*Enable new sds mode config method, cfg_sds_mode_sel_new=1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*  bit[12:8]: Only valid when cfg_sds_mode_sel_new=1
-+                    new_cfg_sds_mode=0x1F (reset mode) */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*bit5: cfg_mac6_fib=0         &        bit7: cfg_mac6_fib2=0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 5, 0)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 7, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac7_sel_sgmii= 1 & cfg_mac7_fib=1*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 3, 3)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*new_cfg_sds_mode=0x4 (FIB1000 mode)*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x4)) != RT_ERR_OK)
-+                    return retVal;
-+
-+            }
-+            else if (mode == EXT_100FX)
-+            {
-+                /*  disable mac7 MII/TMM/RMII/GMII/RGMII mode, mode_ext2 = disable  */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x13c3, 0xf, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*restore ext2 ability*/
-+                if ((retVal = rtl8367c_setAsicReg(0x13c4, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /* 0 2 0  bit 8~9  set 0, force n-way*/
-+                if((retVal = rtl8367c_getAsicSdsReg(0, 2, 0, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+                reg_data &= 0xFFFFFCFF;
-+                if((retVal = rtl8367c_setAsicSdsReg(0,2,0, reg_data)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                /*restore ext2 ability*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x3f7, 2, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /* keep default setting, disable mac6 sel serdes*/
-+                if ((retVal = rtl8367c_setAsicReg(0x1d11, 0x1500)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*Enable new sds mode config method, cfg_sds_mode_sel_new=1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*  bit[12:8]: Only valid when cfg_sds_mode_sel_new=1
-+                    new_cfg_sds_mode=0x1F (reset mode) */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*bit5: cfg_mac6_fib=0       &       bit7: cfg_mac6_fib2=0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 5, 0)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 7, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac7_sel_sgmii= 1 & cfg_mac7_fib=1*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 3, 3)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*  bit[12:8]: Only valid when cfg_sds_mode_sel_new=1
-+                    new_cfg_sds_mode=0x5  */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x5)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else if (mode == EXT_1000X_100FX)
-+            {
-+                /*  disable mac7 MII/TMM/RMII/GMII/RGMII mode, mode_ext2 = disable  */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x13c3, 0xf, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*restore ext2 ability*/
-+                if ((retVal = rtl8367c_setAsicReg(0x13c4, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /* 0 2 0  bit 8~9  set 0, force n-way*/
-+                if((retVal = rtl8367c_getAsicSdsReg(0, 2, 0, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+                reg_data &= 0xFFFFFCFF;
-+                if((retVal = rtl8367c_setAsicSdsReg(0,2,0, reg_data)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                /*restore ext2 ability*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x3f7, 2, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /* keep default setting, disable mac6 sel serdes*/
-+                if ((retVal = rtl8367c_setAsicReg(0x1d11, 0x1500)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*Enable new sds mode config method, cfg_sds_mode_sel_new=1*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d95, 13, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*  bit[12:8]: Only valid when cfg_sds_mode_sel_new=1
-+                    new_cfg_sds_mode=0x1F (reset mode) */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x1f)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*bit5: cfg_mac6_fib=0    &    bit7: cfg_mac6_fib2=0*/
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 5, 0)) != RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d41, 7, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac7_sel_sgmii= 1 & cfg_mac7_fib=1*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 3, 3)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*  bit[12:8]: Only valid when cfg_sds_mode_sel_new=1
-+                    new_cfg_sds_mode=0x7  */
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 0x1f00, 0x7)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+            else if (mode < EXT_SGMII)
-+            {
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d3d, 10, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicRegBit(0x3f7, 2, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /* keep default setting, disable mac7 sel SerDes mode*/
-+                if ((retVal = rtl8367c_setAsicReg(0x1d95, 0x1f00)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac7_sel_sgmii= 0 & cfg_mac7_fib=0*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 3, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /* set port7 mode*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x13c3, 0xf, mode)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((mode == EXT_TMII_MAC) || (mode == EXT_TMII_PHY))
-+                {
-+                    if ((retVal = rtl8367c_setAsicRegBit(0x3f7, 2, 1)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+
-+            }
-+            else if ((mode < EXT_END) && (mode > EXT_100FX))
-+            {
-+                if ((retVal = rtl8367c_setAsicRegBits(0x13C3, 0xf, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicRegBit(0x3f7, 2, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                /*cfg_mac7_sel_sgmii= 0 & cfg_mac7_fib=0*/
-+                if ((retVal = rtl8367c_setAsicRegBits(0x1d95, 3, 0)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_setAsicRegBit(0x1d3d, 10, 1)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                if ((retVal = rtl8367c_getAsicRegBit(0x1d11, 11, &reg_data)) != RT_ERR_OK)
-+                    return retVal;
-+                if(reg_data == 0)
-+                {
-+                    if ((retVal = rtl8367c_setAsicRegBit(0x1d11, 6, 1)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+
-+                /* set port7 mode*/
-+                if (mode < EXT_RMII_MAC_2)
-+                {
-+                    if ((retVal = rtl8367c_setAsicRegBits(0x1305, 0xf0, (mode-13))) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+                else
-+                {
-+                    if ((retVal = rtl8367c_setAsicRegBits(0x1305, 0xf0, (mode-12))) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+
-+                if ((mode == EXT_TMII_MAC_2) || (mode == EXT_TMII_PHY_2))
-+                {
-+                    if ((retVal = rtl8367c_setAsicRegBit(0x3f7, 2, 1)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+            }
-+
-+        }
-+
-+    }
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortExtMode
-+ * Description:
-+ *      Get external interface mode configuration
-+ * Input:
-+ *      id      - external interface id (0~1)
-+ *      pMode   - external interface mode
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortExtMode(rtk_uint32 id, rtk_uint32 *pMode)
-+{
-+    ret_t   retVal;
-+    rtk_uint32 regData, regValue, type;
-+
-+    if(id >= RTL8367C_EXTNO)
-+        return RT_ERR_OUT_OF_RANGE;
-+    /*cfg_magic_id  &  get chip_id*/
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicReg(0x1300, &regValue)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0000)) != RT_ERR_OK)
-+        return retVal;
-+
-+    type = 0;
-+
-+    switch (regValue)
-+    {
-+        case 0x0276:
-+        case 0x0597:
-+        case 0x6367:
-+            type = 1;
-+            break;
-+        case 0x0652:
-+        case 0x6368:
-+            type = 2;
-+            break;
-+        case 0x0801:
-+        case 0x6511:
-+            type = 3;
-+            break;
-+        default:
-+            return RT_ERR_FAILED;
-+    }
-+
-+
-+    if (1 == type)
-+    {
-+
-+        if (1 == id)
-+        {
-+            if( (retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_MAC8_SEL_SGMII_OFFSET, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if(1 == regData)
-+            {
-+                *pMode = EXT_SGMII;
-+                return RT_ERR_OK;
-+            }
-+
-+            if( (retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_MAC8_SEL_HSGMII_OFFSET, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if(1 == regData)
-+            {
-+                *pMode = EXT_HSGMII;
-+                return RT_ERR_OK;
-+            }
-+        }
-+
-+        if(0 == id || 1 == id)
-+            return rtl8367c_getAsicRegBits(RTL8367C_REG_DIGITAL_INTERFACE_SELECT, RTL8367C_SELECT_GMII_0_MASK << (id * RTL8367C_SELECT_GMII_1_OFFSET), pMode);
-+        else
-+           return rtl8367c_getAsicRegBits(RTL8367C_REG_DIGITAL_INTERFACE_SELECT_1, RTL8367C_SELECT_GMII_2_MASK, pMode);
-+
-+    }
-+    else if (2 == type)
-+    {
-+        if (1 == id)
-+        {
-+            if ((retVal = rtl8367c_getAsicReg(0x1d92, &regData))!=RT_ERR_OK)
-+                return retVal;
-+
-+            if (regData & 0x4000)
-+            {
-+                *pMode = EXT_SGMII;
-+                return RT_ERR_OK;
-+            }
-+
-+            else if (((regData >> 8) & 0x1f) == 4)
-+            {
-+                *pMode = EXT_1000X;
-+                return RT_ERR_OK;
-+            }
-+            else if (((regData >> 8) & 0x1f) == 5)
-+            {
-+                *pMode = EXT_100FX;
-+                return RT_ERR_OK;
-+            }
-+            else if (((regData >> 8) & 0x1f) == 7)
-+            {
-+                *pMode = EXT_1000X_100FX;
-+                return RT_ERR_OK;
-+            }
-+
-+            return rtl8367c_getAsicRegBits(0x1305, 0xf0, pMode);
-+        }
-+        else if (2 == id)
-+        {
-+#if 0
-+            if ((retVal = rtl8367c_getAsicRegBit(0x1d92, 6, &regData))!=RT_ERR_OK)
-+                return retVal;
-+
-+            if (regData == 1)
-+            {
-+                *pMode = EXT_SGMII;
-+                return RT_ERR_OK;
-+            }
-+
-+            if ((retVal = rtl8367c_getAsicRegBit(0x1d92, 7, &regData))!=RT_ERR_OK)
-+                return retVal;
-+
-+            if (regData == 1)
-+            {
-+                *pMode = EXT_HSGMII;
-+                return RT_ERR_OK;
-+            }
-+#endif
-+            if ((retVal = rtl8367c_getAsicReg(0x1d92, &regData))!=RT_ERR_OK)
-+                return retVal;
-+
-+            if (regData & 0x40)
-+            {
-+                *pMode = EXT_SGMII;
-+                return RT_ERR_OK;
-+            }
-+            else if (regData & 0x80)
-+            {
-+                *pMode = EXT_HSGMII;
-+                return RT_ERR_OK;
-+            }
-+            else if ((regData & 0x1f) == 4)
-+            {
-+                *pMode = EXT_1000X;
-+                return RT_ERR_OK;
-+            }
-+            else if ((regData & 0x1f) == 5)
-+            {
-+                *pMode = EXT_100FX;
-+                return RT_ERR_OK;
-+            }
-+            else if ((regData & 0x1f) == 7)
-+            {
-+                *pMode = EXT_1000X_100FX;
-+                return RT_ERR_OK;
-+            }
-+
-+            return rtl8367c_getAsicRegBits(0x1305, 0xf, pMode);
-+        }
-+    }
-+    else if(3 == type)
-+    {
-+        if (1 == id)
-+        {
-+            /* SDS_CFG_NEW */
-+            if ((retVal = rtl8367c_getAsicReg(0x1d95, &regData))!=RT_ERR_OK)
-+                return retVal;
-+
-+            if ((retVal = rtl8367c_getAsicReg(0x1d41, &regValue))!=RT_ERR_OK)
-+                return retVal;
-+
-+            /* bit5: cfg_mac6_fib=1  &&  bit7: cfg_mac6_fib2 =1 */
-+            if((regValue & 0xa0)  == 0xa0 )
-+            {
-+                /* new_cfg_sds_mode */
-+                regData = regData >> 8;
-+                if((regData & 0x1f) == 4)
-+                {
-+                    *pMode = EXT_1000X;
-+                     return RT_ERR_OK;
-+                }
-+                else if((regData & 0x1f) == 5)
-+                {
-+                    *pMode = EXT_100FX;
-+                     return RT_ERR_OK;
-+                }
-+                else if((regData & 0x1f) == 7)
-+                {
-+                    *pMode = EXT_1000X_100FX;
-+                     return RT_ERR_OK;
-+                }
-+
-+            }
-+
-+
-+            if ((retVal = rtl8367c_getAsicReg(0x1d11, &regData))!=RT_ERR_OK)
-+                return retVal;
-+
-+            /* check cfg_mac6_sel_sgmii */
-+            if((regData >> 6) & 1)
-+            {
-+                *pMode = EXT_SGMII;
-+                return RT_ERR_OK;
-+            }
-+            else if((regData >> 11) & 1)
-+            {
-+                *pMode = EXT_HSGMII;
-+                return RT_ERR_OK;
-+            }
-+            else
-+            {
-+                /* check port6 MAC mode */
-+                if ((retVal = rtl8367c_getAsicRegBits(0x1305, 0xf0, &regData))!=RT_ERR_OK)
-+                    return retVal;
-+
-+                if(regData < 6)
-+                    *pMode = regData;
-+                else if(regData == 6)
-+                    *pMode = EXT_RMII_MAC;
-+                else if(regData == 7)
-+                    *pMode = EXT_RMII_PHY;
-+
-+                return RT_ERR_OK;
-+            }
-+        }
-+        else if (2 == id)
-+        {
-+            if ((retVal = rtl8367c_getAsicReg(0x1d95, &regData))!=RT_ERR_OK)
-+                return retVal;
-+
-+            /* bit0: cfg_mac7_sel_sgmii
-+               bit1: cfg_mac7_fib
-+               bit[12:8]: new_cfg_sds_mode*/
-+            if(((regData & 0x3) == 3) && (((regData >> 8) & 0x1f) == 0x4))
-+            {
-+                *pMode = EXT_1000X;
-+                    return RT_ERR_OK;
-+            }
-+            else if (((regData & 0x3) == 3) && (((regData >> 8) & 0x1f) == 0x5))
-+            {
-+                *pMode = EXT_100FX;
-+                    return RT_ERR_OK;
-+            }
-+            else if (((regData & 0x3) == 3) && (((regData >> 8) & 0x1f) == 0x7))
-+            {
-+                *pMode = EXT_1000X_100FX;
-+                    return RT_ERR_OK;
-+            }
-+            else if(regData & 1)
-+            {
-+                *pMode = EXT_SGMII;
-+                return RT_ERR_OK;
-+            }
-+            else
-+            {
-+            /* check port7 MAC mode */
-+                if ((retVal = rtl8367c_getAsicRegBits(0x13c3, 0xf, &regData))!=RT_ERR_OK)
-+                    return retVal;
-+
-+                *pMode = regData;
-+
-+                return RT_ERR_OK;
-+            }
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8370_setAsicPortEnableAll
-+ * Description:
-+ *      Set ALL ports enable.
-+ * Input:
-+ *      enable - enable all ports.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortEnableAll(rtk_uint32 enable)
-+{
-+    if(enable >= 2)
-+        return RT_ERR_INPUT;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_PHY_AD, RTL8367C_PDNPHY_OFFSET, !enable);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicPortEnableAll
-+ * Description:
-+ *      Set ALL ports enable.
-+ * Input:
-+ *      enable - enable all ports.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortEnableAll(rtk_uint32 *pEnable)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_PHY_AD, RTL8367C_PDNPHY_OFFSET, &regData);
-+    if(retVal !=  RT_ERR_OK)
-+        return retVal;
-+
-+    if (regData==0)
-+        *pEnable = 1;
-+    else
-+        *pEnable = 0;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortSmallIpg
-+ * Description:
-+ *      Set small ipg egress mode
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      enable  - 0: normal, 1: small
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortSmallIpg(rtk_uint32 port, rtk_uint32 enable)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_PORT_SMALL_IPG_REG(port), RTL8367C_PORT0_MISC_CFG_SMALL_TAG_IPG_OFFSET, enable);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicPortSmallIpg
-+ * Description:
-+ *      Get small ipg egress mode
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pEnable     - 0: normal, 1: small
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortSmallIpg(rtk_uint32 port, rtk_uint32* pEnable)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_PORT_SMALL_IPG_REG(port), RTL8367C_PORT0_MISC_CFG_SMALL_TAG_IPG_OFFSET, pEnable);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicPortLoopback
-+ * Description:
-+ *      Set MAC loopback
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      enable  - 0: Disable, 1: enable
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortLoopback(rtk_uint32 port, rtk_uint32 enable)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_PORT_MISC_CFG_REG(port), RTL8367C_PORT0_MISC_CFG_MAC_LOOPBACK_OFFSET, enable);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicPortLoopback
-+ * Description:
-+ *      Set MAC loopback
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ * Output:
-+ *      pEnable - 0: Disable, 1: enable
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortLoopback(rtk_uint32 port, rtk_uint32 *pEnable)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_PORT_MISC_CFG_REG(port), RTL8367C_PORT0_MISC_CFG_MAC_LOOPBACK_OFFSET, pEnable);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicPortRTCTEnable
-+ * Description:
-+ *      Set RTCT Enable echo response mode
-+ * Input:
-+ *      portmask    - Port mask of RTCT enabled (0-4)
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid port mask
-+ * Note:
-+ *      RTCT test takes 4.8 seconds at most.
-+ */
-+ret_t rtl8367c_setAsicPortRTCTEnable(rtk_uint32 portmask)
-+{
-+    ret_t       retVal;
-+    rtk_uint32  regData;
-+    rtk_uint32  port;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicReg(0x1300, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if( (regData == 0x0276) || (regData == 0x0597) )
-+        return RT_ERR_CHIP_NOT_SUPPORTED;
-+
-+    for(port = 0; port <= 10 ; port++)
-+    {
-+        if(portmask & (0x0001 << port))
-+        {
-+             if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa422, &regData)) != RT_ERR_OK)
-+                 return retVal;
-+
-+             regData &= 0x7FFF;
-+             if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa422, regData)) != RT_ERR_OK)
-+                 return retVal;
-+
-+             regData |= 0x00F2;/*RTCT set to  echo response mode*/
-+             if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa422, regData)) != RT_ERR_OK)
-+                 return retVal;
-+
-+             regData |= 0x0001;
-+             if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa422, regData)) != RT_ERR_OK)
-+                 return retVal;
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicPortRTCTDisable
-+ * Description:
-+ *      Set RTCT Disable
-+ * Input:
-+ *      portmask    - Port mask of RTCT enabled (0-4)
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid port mask
-+ * Note:
-+ *      RTCT test takes 4.8 seconds at most.
-+ */
-+ret_t rtl8367c_setAsicPortRTCTDisable(rtk_uint32 portmask)
-+{
-+    ret_t       retVal;
-+    rtk_uint32  regData;
-+    rtk_uint32  port;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicReg(0x1300, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if( (regData == 0x0276) || (regData == 0x0597) )
-+        return RT_ERR_CHIP_NOT_SUPPORTED;
-+
-+    for(port = 0; port <= 10 ; port++)
-+    {
-+        if(portmask & (0x0001 << port))
-+        {
-+             if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa422, &regData)) != RT_ERR_OK)
-+                 return retVal;
-+
-+             regData &= 0x7FFF;
-+             if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa422, regData)) != RT_ERR_OK)
-+                 return retVal;
-+
-+             regData |= 0x00F0;
-+             if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa422, regData)) != RT_ERR_OK)
-+                 return retVal;
-+
-+             regData &= ~0x0001;
-+             if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa422, regData)) != RT_ERR_OK)
-+                 return retVal;
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicPortRTCTResult
-+ * Description:
-+ *      Get RTCT result
-+ * Input:
-+ *      port    - Port ID of RTCT result
-+ * Output:
-+ *      pResult - The result of port ID
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_MASK            - Invalid port mask
-+ *      RT_ERR_PHY_RTCT_NOT_FINISH  - RTCT test doesn't finish.
-+ * Note:
-+ *      RTCT test takes 4.8 seconds at most.
-+ *      If this API returns RT_ERR_PHY_RTCT_NOT_FINISH,
-+ *      users should wait a whole then read it again.
-+ */
-+ret_t rtl8367c_getAsicPortRTCTResult(rtk_uint32 port, rtl8367c_port_rtct_result_t *pResult)
-+{
-+    ret_t       retVal;
-+    rtk_uint32  regData, finish = 1;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicReg(0x1300, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if( (regData == 0x6367) )
-+    {
-+        if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa422, &regData)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if((regData & 0x8000) == 0x8000)
-+        {
-+            /* Channel A */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x802a)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelAOpen       = (regData == 0x0048) ? 1 : 0;
-+            pResult->channelAShort      = (regData == 0x0050) ? 1 : 0;
-+            pResult->channelAMismatch   = ((regData == 0x0042) || (regData == 0x0044)) ? 1 : 0;
-+            pResult->channelALinedriver = (regData == 0x0041) ? 1 : 0;
-+
-+            /* Channel B */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x802e)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelBOpen       = (regData == 0x0048) ? 1 : 0;
-+            pResult->channelBShort      = (regData == 0x0050) ? 1 : 0;
-+            pResult->channelBMismatch   = ((regData == 0x0042) || (regData == 0x0044)) ? 1 : 0;
-+            pResult->channelBLinedriver = (regData == 0x0041) ? 1 : 0;
-+
-+            /* Channel C */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x8032)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelCOpen       = (regData == 0x0048) ? 1 : 0;
-+            pResult->channelCShort      = (regData == 0x0050) ? 1 : 0;
-+            pResult->channelCMismatch   = ((regData == 0x0042) || (regData == 0x0044)) ? 1 : 0;
-+            pResult->channelCLinedriver = (regData == 0x0041) ? 1 : 0;
-+
-+            /* Channel D */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x8036)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelDOpen       = (regData == 0x0048) ? 1 : 0;
-+            pResult->channelDShort      = (regData == 0x0050) ? 1 : 0;
-+            pResult->channelDMismatch   = ((regData == 0x0042) || (regData == 0x0044)) ? 1 : 0;
-+            pResult->channelDLinedriver = (regData == 0x0041) ? 1 : 0;
-+
-+            /* Channel A Length */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x802c)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelALen = (regData / 2);
-+
-+            /* Channel B Length */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x8030)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelBLen = (regData / 2);
-+
-+            /* Channel C Length */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x8034)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelCLen = (regData / 2);
-+
-+            /* Channel D Length */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x8038)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelDLen = (regData / 2);
-+        }
-+        else
-+            finish = 0;
-+    }
-+    else if(regData == 0x6368)
-+    {
-+        if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa422, &regData)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if((regData & 0x8000) == 0x8000)
-+        {
-+            /* Channel A */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x802b)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelAOpen       = (regData == 0x0048) ? 1 : 0;
-+            pResult->channelAShort      = (regData == 0x0050) ? 1 : 0;
-+            pResult->channelAMismatch   = ((regData == 0x0042) || (regData == 0x0044)) ? 1 : 0;
-+            pResult->channelALinedriver = (regData == 0x0041) ? 1 : 0;
-+
-+            /* Channel B */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x802f)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelBOpen       = (regData == 0x0048) ? 1 : 0;
-+            pResult->channelBShort      = (regData == 0x0050) ? 1 : 0;
-+            pResult->channelBMismatch   = ((regData == 0x0042) || (regData == 0x0044)) ? 1 : 0;
-+            pResult->channelBLinedriver = (regData == 0x0041) ? 1 : 0;
-+
-+            /* Channel C */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x8033)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelCOpen       = (regData == 0x0048) ? 1 : 0;
-+            pResult->channelCShort      = (regData == 0x0050) ? 1 : 0;
-+            pResult->channelCMismatch   = ((regData == 0x0042) || (regData == 0x0044)) ? 1 : 0;
-+            pResult->channelCLinedriver = (regData == 0x0041) ? 1 : 0;
-+
-+            /* Channel D */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x8037)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelDOpen       = (regData == 0x0048) ? 1 : 0;
-+            pResult->channelDShort      = (regData == 0x0050) ? 1 : 0;
-+            pResult->channelDMismatch   = ((regData == 0x0042) || (regData == 0x0044)) ? 1 : 0;
-+            pResult->channelDLinedriver = (regData == 0x0041) ? 1 : 0;
-+
-+            /* Channel A Length */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x802d)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelALen = (regData / 2);
-+
-+            /* Channel B Length */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x8031)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelBLen = (regData / 2);
-+
-+            /* Channel C Length */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x8035)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelCLen = (regData / 2);
-+
-+            /* Channel D Length */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x8039)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelDLen = (regData / 2);
-+        }
-+        else
-+            finish = 0;
-+
-+    }
-+    else if((regData == 0x6511) || (regData == 0x0801))
-+    {
-+        if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa422, &regData)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if((regData & 0x8000) == 0x8000)
-+        {
-+            /* Channel A */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x802a)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelAOpen       = (regData == 0x0048) ? 1 : 0;
-+            pResult->channelAShort      = (regData == 0x0050) ? 1 : 0;
-+            pResult->channelAMismatch   = ((regData == 0x0042) || (regData == 0x0044)) ? 1 : 0;
-+            pResult->channelALinedriver = (regData == 0x0041) ? 1 : 0;
-+
-+            /* Channel B */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x802e)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelBOpen       = (regData == 0x0048) ? 1 : 0;
-+            pResult->channelBShort      = (regData == 0x0050) ? 1 : 0;
-+            pResult->channelBMismatch   = ((regData == 0x0042) || (regData == 0x0044)) ? 1 : 0;
-+            pResult->channelBLinedriver = (regData == 0x0041) ? 1 : 0;
-+
-+            /* Channel C */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x8032)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelCOpen       = (regData == 0x0048) ? 1 : 0;
-+            pResult->channelCShort      = (regData == 0x0050) ? 1 : 0;
-+            pResult->channelCMismatch   = ((regData == 0x0042) || (regData == 0x0044)) ? 1 : 0;
-+            pResult->channelCLinedriver = (regData == 0x0041) ? 1 : 0;
-+
-+            /* Channel D */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x8036)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelDOpen       = (regData == 0x0048) ? 1 : 0;
-+            pResult->channelDShort      = (regData == 0x0050) ? 1 : 0;
-+            pResult->channelDMismatch   = ((regData == 0x0042) || (regData == 0x0044)) ? 1 : 0;
-+            pResult->channelDLinedriver = (regData == 0x0041) ? 1 : 0;
-+
-+            /* Channel A Length */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x802c)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelALen = (regData / 2);
-+
-+            /* Channel B Length */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x8030)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelBLen = (regData / 2);
-+
-+            /* Channel C Length */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x8034)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelCLen = (regData / 2);
-+
-+            /* Channel D Length */
-+            if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xa436, 0x8038)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xa438, &regData)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pResult->channelDLen = (regData / 2);
-+        }
-+        else
-+            finish = 0;
-+
-+    }
-+    else
-+        return RT_ERR_CHIP_NOT_SUPPORTED;
-+
-+    if(finish == 0)
-+        return RT_ERR_PHY_RTCT_NOT_FINISH;
-+    else
-+        return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_sdsReset
-+ * Description:
-+ *      Reset Serdes
-+ * Input:
-+ *      id  - EXT ID
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ * Note:
-+ *      None.
-+ */
-+ret_t rtl8367c_sdsReset(rtk_uint32 id)
-+{
-+    rtk_uint32 retVal, regValue, state, i, option, running = 0, retVal2;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicReg(0x1300, &regValue)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0000)) != RT_ERR_OK)
-+        return retVal;
-+
-+    switch (regValue)
-+    {
-+        case 0x0276:
-+        case 0x0597:
-+        case 0x6367:
-+            option = 0;
-+            break;
-+        case 0x0652:
-+        case 0x6368:
-+            option = 1;
-+            break;
-+        case 0x0801:
-+        case 0x6511:
-+            option = 2;
-+            break;
-+        default:
-+            return RT_ERR_FAILED;
-+    }
-+
-+    if(option == 0)
-+    {
-+        if (1 == id)
-+        {
-+            if ((retVal = rtl8367c_getAsicRegBit(0x130c, 5, &running))!=RT_ERR_OK)
-+                return retVal;
-+
-+            if(running == 1)
-+            {
-+                if ((retVal = rtl8367c_setAsicRegBit(0x130c, 5, 0))!=RT_ERR_OK)
-+                    return retVal;
-+            }
-+
-+            retVal = rtl8367c_setAsicReg(0x6601, 0x0000);
-+
-+            if(retVal == RT_ERR_OK)
-+                retVal = rtl8367c_setAsicReg(0x6602, 0x1401);
-+
-+            if(retVal == RT_ERR_OK)
-+                retVal = rtl8367c_setAsicReg(0x6600, 0x00C0);
-+
-+            if(retVal == RT_ERR_OK)
-+                retVal = rtl8367c_setAsicReg(0x6601, 0x0000);
-+
-+            if(retVal == RT_ERR_OK)
-+                retVal = rtl8367c_setAsicReg(0x6602, 0x1403);
-+
-+            if(retVal == RT_ERR_OK)
-+                retVal = rtl8367c_setAsicReg(0x6600, 0x00C0);
-+
-+            if(running == 1)
-+            {
-+                if ((retVal2 = rtl8367c_setAsicRegBit(0x130c, 5, 1))!=RT_ERR_OK)
-+                    return retVal2;
-+            }
-+
-+            if(retVal != RT_ERR_OK)
-+                return retVal;
-+        }
-+        else
-+            return RT_ERR_PORT_ID;
-+    }
-+    else if(option == 1)
-+    {
-+        if (1 == id)
-+        {
-+            if((retVal = rtl8367c_getAsicReg(0x1311, &state)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicReg(0x1311, 0x66)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicReg(0x1311, 0x1066)) != RT_ERR_OK)
-+                return retVal;
-+
-+            while(1)
-+            {
-+                if((retVal = rtl8367c_getAsicReg(0x1d9d, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+                if((regValue >> 8) & 1)
-+                    break;
-+            }
-+
-+            for (i=0; i<0xffff; i++);
-+
-+            if((retVal = rtl8367c_setAsicReg(0x133d, 0x2)) != RT_ERR_OK)
-+                return retVal;
-+
-+            for (i=0; i<0xffff; i++);
-+
-+            if((retVal = rtl8367c_setAsicReg(0x6601, 0x0)) != RT_ERR_OK)
-+                return retVal;
-+            if((retVal = rtl8367c_setAsicReg(0x6602, 0x1401)) != RT_ERR_OK)
-+                return retVal;
-+            if((retVal = rtl8367c_setAsicReg(0x6600, 0xc1)) != RT_ERR_OK)
-+                return retVal;
-+            if((retVal = rtl8367c_setAsicReg(0x6601, 0x0)) != RT_ERR_OK)
-+                return retVal;
-+            if((retVal = rtl8367c_setAsicReg(0x6602, 0x1403)) != RT_ERR_OK)
-+                return retVal;
-+            if((retVal = rtl8367c_setAsicReg(0x6600, 0xc1)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicReg(0x133d, 0x0)) != RT_ERR_OK)
-+                return retVal;
-+
-+            for (i=0; i<0xffff; i++);
-+
-+            if((retVal = rtl8367c_setAsicReg(0x1311, state)) != RT_ERR_OK)
-+                return retVal;
-+
-+
-+        }
-+        else if (2== id)
-+        {
-+            if((retVal = rtl8367c_getAsicReg(0x13c4, &state)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicReg(0x13c4, 0x66)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicReg(0x13c4, 0x1066)) != RT_ERR_OK)
-+                return retVal;
-+
-+            while(1)
-+            {
-+                if((retVal = rtl8367c_getAsicReg(0x1d9d, &regValue)) != RT_ERR_OK)
-+                    return retVal;
-+                if((regValue >> 9) & 1)
-+                    break;
-+            }
-+
-+            for (i=0; i<0xffff; i++);
-+
-+            if((retVal = rtl8367c_setAsicReg(0x133d, 0x2)) != RT_ERR_OK)
-+                return retVal;
-+
-+            for (i=0; i<0xffff; i++);
-+
-+            if((retVal = rtl8367c_setAsicReg(0x6601, 0x0)) != RT_ERR_OK)
-+                return retVal;
-+            if((retVal = rtl8367c_setAsicReg(0x6602, 0x1401)) != RT_ERR_OK)
-+                return retVal;
-+            if((retVal = rtl8367c_setAsicReg(0x6600, 0xc0)) != RT_ERR_OK)
-+                return retVal;
-+            if((retVal = rtl8367c_setAsicReg(0x6601, 0x0)) != RT_ERR_OK)
-+                return retVal;
-+            if((retVal = rtl8367c_setAsicReg(0x6602, 0x1403)) != RT_ERR_OK)
-+                return retVal;
-+            if((retVal = rtl8367c_setAsicReg(0x6600, 0xc0)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if((retVal = rtl8367c_setAsicReg(0x133d, 0x0)) != RT_ERR_OK)
-+                return retVal;
-+
-+            for (i=0; i<0xffff; i++);
-+
-+            if((retVal = rtl8367c_setAsicReg(0x13c4, state)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+        else
-+            return RT_ERR_PORT_ID;
-+    }
-+    else if(option == 2)
-+    {
-+        if ((retVal = rtl8367c_getAsicSdsReg(0, 3, 0, &regValue))!=RT_ERR_OK)
-+                  return retVal;
-+              regValue |= 0x40;
-+              if ((retVal = rtl8367c_setAsicSdsReg(0, 3, 0, regValue))!=RT_ERR_OK)
-+                  return retVal;
-+
-+              for (i=0; i<0xffff; i++);
-+
-+              regValue &= ~(0x40);
-+              if ((retVal = rtl8367c_setAsicSdsReg(0, 3, 0, regValue))!=RT_ERR_OK)
-+                  return retVal;
-+
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getSdsLinkStatus
-+ * Description:
-+ *      Get SGMII status
-+ * Input:
-+ *      id  - EXT ID
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ * Note:
-+ *      None.
-+ */
-+ret_t rtl8367c_getSdsLinkStatus(rtk_uint32 ext_id, rtk_uint32 *pSignalDetect, rtk_uint32 *pSync, rtk_uint32 *pLink)
-+{
-+    rtk_uint32 retVal, regValue, type, running = 0, retVal2;
-+
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicReg(0x1300, &regValue)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0000)) != RT_ERR_OK)
-+        return retVal;
-+
-+    switch (regValue)
-+    {
-+        case 0x0276:
-+        case 0x0597:
-+        case 0x6367:
-+            type = 0;
-+            break;
-+        case 0x0652:
-+        case 0x6368:
-+            type = 1;
-+            break;
-+        case 0x0801:
-+        case 0x6511:
-+            type = 2;
-+            break;
-+        default:
-+            return RT_ERR_FAILED;
-+    }
-+
-+    if(type == 0)
-+    {
-+        if (1 == ext_id)
-+        {
-+            if ((retVal = rtl8367c_getAsicRegBit(0x130c, 5, &running))!=RT_ERR_OK)
-+                return retVal;
-+
-+            if(running == 1)
-+            {
-+                if ((retVal = rtl8367c_setAsicRegBit(0x130c, 5, 0))!=RT_ERR_OK)
-+                    return retVal;
-+            }
-+
-+            retVal = rtl8367c_setAsicReg(0x6601, 0x003D);
-+
-+            if(retVal == RT_ERR_OK)
-+                retVal = rtl8367c_setAsicReg(0x6600, 0x0080);
-+
-+            if(retVal == RT_ERR_OK)
-+                retVal = rtl8367c_getAsicReg(0x6602, &regValue);
-+
-+            if(running == 1)
-+            {
-+                if ((retVal2 = rtl8367c_setAsicRegBit(0x130c, 5, 1))!=RT_ERR_OK)
-+                    return retVal2;
-+            }
-+
-+            if(retVal != RT_ERR_OK)
-+                return retVal;
-+
-+            *pSignalDetect = (regValue & 0x0100) ? 1 : 0;
-+            *pSync = (regValue & 0x0001) ? 1 : 0;
-+            *pLink = (regValue & 0x0010) ? 1 : 0;
-+        }
-+        else
-+            return RT_ERR_PORT_ID;
-+    }
-+    else if(type == 1)
-+    {
-+        if (1 == ext_id)
-+        {
-+            if ((retVal = rtl8367c_setAsicReg(0x6601, 0x003D))!=RT_ERR_OK)
-+                return retVal;
-+            if ((retVal = rtl8367c_setAsicReg(0x6600, 0x0081))!=RT_ERR_OK)
-+                return retVal;
-+            if ((retVal = rtl8367c_getAsicReg(0x6602, &regValue))!=RT_ERR_OK)
-+                return retVal;
-+
-+            *pSignalDetect = (regValue & 0x0100) ? 1 : 0;
-+            *pSync = (regValue & 0x0001) ? 1 : 0;
-+            *pLink = (regValue & 0x0010) ? 1 : 0;
-+        }
-+        else if (2 == ext_id)
-+        {
-+            if ((retVal = rtl8367c_setAsicReg(0x6601, 0x003D))!=RT_ERR_OK)
-+                return retVal;
-+            if ((retVal = rtl8367c_setAsicReg(0x6600, 0x0080))!=RT_ERR_OK)
-+                return retVal;
-+            if ((retVal = rtl8367c_getAsicReg(0x6602, &regValue))!=RT_ERR_OK)
-+                return retVal;
-+
-+            *pSignalDetect = (regValue & 0x0100) ? 1 : 0;
-+            *pSync = (regValue & 0x0001) ? 1 : 0;
-+            *pLink = (regValue & 0x0010) ? 1 : 0;
-+        }
-+        else
-+            return RT_ERR_PORT_ID;
-+    }
-+    else if(type == 2)
-+    {
-+        if((retVal = rtl8367c_getAsicSdsReg(0, 30, 1, &regValue)) != RT_ERR_OK)
-+            return retVal;
-+        if((retVal = rtl8367c_getAsicSdsReg(0, 30, 1, &regValue)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pSignalDetect = (regValue & 0x0100) ? 1 : 0;
-+        *pSync = (regValue & 0x0001) ? 1 : 0;
-+        *pLink = (regValue & 0x0010) ? 1 : 0;
-+
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setSgmiiNway
-+ * Description:
-+ *      Set SGMII Nway
-+ * Input:
-+ *      ext_id      - EXT ID
-+ *      state       - SGMII Nway state
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ * Note:
-+ *      None.
-+ */
-+ret_t rtl8367c_setSgmiiNway(rtk_uint32 ext_id, rtk_uint32 state)
-+{
-+    rtk_uint32 retVal, regValue, type, running = 0, retVal2;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicReg(0x1300, &regValue)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0000)) != RT_ERR_OK)
-+        return retVal;
-+
-+    switch (regValue)
-+    {
-+        case 0x0276:
-+        case 0x0597:
-+        case 0x6367:
-+            type = 0;
-+            break;
-+        case 0x0652:
-+        case 0x6368:
-+            type = 1;
-+            break;
-+        case 0x0801:
-+        case 0x6511:
-+            type = 2;
-+            break;
-+        default:
-+            return RT_ERR_FAILED;
-+    }
-+
-+    if(type == 0)
-+    {
-+        if (1 == ext_id)
-+        {
-+            if ((retVal = rtl8367c_getAsicRegBit(0x130c, 5, &running))!=RT_ERR_OK)
-+                return retVal;
-+
-+            if(running == 1)
-+            {
-+                if ((retVal = rtl8367c_setAsicRegBit(0x130c, 5, 0))!=RT_ERR_OK)
-+                    return retVal;
-+            }
-+
-+            retVal = rtl8367c_setAsicReg(0x6601, 0x0002);
-+
-+            if(retVal == RT_ERR_OK)
-+                retVal = rtl8367c_setAsicReg(0x6600, 0x0080);
-+
-+            if(retVal == RT_ERR_OK)
-+                retVal = rtl8367c_getAsicReg(0x6602, &regValue);
-+
-+            if(retVal == RT_ERR_OK)
-+            {
-+                if(state)
-+                      regValue |= 0x0200;
-+                else
-+                      regValue &= ~0x0200;
-+
-+                regValue |= 0x0100;
-+            }
-+
-+            if(retVal == RT_ERR_OK)
-+                retVal = rtl8367c_setAsicReg(0x6602, regValue);
-+
-+            if(retVal == RT_ERR_OK)
-+                retVal = rtl8367c_setAsicReg(0x6601, 0x0002);
-+
-+            if(retVal == RT_ERR_OK)
-+                retVal = rtl8367c_setAsicReg(0x6600, 0x00C0);
-+
-+            if(running == 1)
-+            {
-+                if ((retVal2 = rtl8367c_setAsicRegBit(0x130c, 5, 1))!=RT_ERR_OK)
-+                    return retVal2;
-+            }
-+
-+            if(retVal != RT_ERR_OK)
-+                return retVal;
-+        }
-+        else
-+            return RT_ERR_PORT_ID;
-+    }
-+    else if(type == 1)
-+    {
-+        if (1 == ext_id)
-+        {
-+            if ((retVal = rtl8367c_setAsicReg(0x6601, 0x0002))!=RT_ERR_OK)
-+                   return retVal;
-+            if ((retVal = rtl8367c_setAsicReg(0x6600, 0x0081))!=RT_ERR_OK)
-+                   return retVal;
-+            if ((retVal = rtl8367c_getAsicReg(0x6602, &regValue))!=RT_ERR_OK)
-+                   return retVal;
-+
-+            if(state)
-+                  regValue |= 0x0200;
-+            else
-+                  regValue &= ~0x0200;
-+
-+            regValue |= 0x0100;
-+
-+            if ((retVal = rtl8367c_setAsicReg(0x6602, regValue))!=RT_ERR_OK)
-+                   return retVal;
-+            if ((retVal = rtl8367c_setAsicReg(0x6601, 0x0002))!=RT_ERR_OK)
-+                   return retVal;
-+            if ((retVal = rtl8367c_setAsicReg(0x6600, 0x00C1))!=RT_ERR_OK)
-+                   return retVal;
-+        }
-+        else if (2 == ext_id)
-+        {
-+            if ((retVal = rtl8367c_setAsicReg(0x6601, 0x0002))!=RT_ERR_OK)
-+                return retVal;
-+            if ((retVal = rtl8367c_setAsicReg(0x6600, 0x0080))!=RT_ERR_OK)
-+                return retVal;
-+            if ((retVal = rtl8367c_getAsicReg(0x6602, &regValue))!=RT_ERR_OK)
-+                return retVal;
-+
-+            if(state)
-+                regValue |= 0x0200;
-+            else
-+                regValue &= ~0x0200;
-+
-+            regValue |= 0x0100;
-+
-+            if ((retVal = rtl8367c_setAsicReg(0x6602, regValue))!=RT_ERR_OK)
-+                return retVal;
-+            if ((retVal = rtl8367c_setAsicReg(0x6601, 0x0002))!=RT_ERR_OK)
-+                return retVal;
-+            if ((retVal = rtl8367c_setAsicReg(0x6600, 0x00C0))!=RT_ERR_OK)
-+                return retVal;
-+        }
-+        else
-+            return RT_ERR_PORT_ID;
-+    }
-+    else if(type == 2)
-+    {
-+        if ((retVal = rtl8367c_getAsicSdsReg(0, 2, 0, &regValue))!=RT_ERR_OK)
-+            return retVal;
-+
-+        if(state & 1)
-+            regValue &= ~0x100;
-+        else
-+            regValue |= 0x100;
-+
-+        if ((retVal = rtl8367c_setAsicSdsReg(0, 2, 0, regValue))!=RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getSgmiiNway
-+ * Description:
-+ *      Get SGMII Nway
-+ * Input:
-+ *      ext_id      - EXT ID
-+ *      state       - SGMII Nway state
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ * Note:
-+ *      None.
-+ */
-+ret_t rtl8367c_getSgmiiNway(rtk_uint32 ext_id, rtk_uint32 *pState)
-+{
-+    rtk_uint32 retVal, regValue, type, running = 0, retVal2;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicReg(0x1300, &regValue)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0000)) != RT_ERR_OK)
-+        return retVal;
-+
-+    switch (regValue)
-+    {
-+        case 0x0276:
-+        case 0x0597:
-+        case 0x6367:
-+            type = 0;
-+            break;
-+        case 0x0652:
-+        case 0x6368:
-+            type = 1;
-+            break;
-+        case 0x0801:
-+        case 0x6511:
-+            type = 2;
-+            break;
-+        default:
-+            return RT_ERR_FAILED;
-+    }
-+
-+    if(type == 0)
-+    {
-+        if (1 == ext_id)
-+        {
-+            if ((retVal = rtl8367c_getAsicRegBit(0x130c, 5, &running))!=RT_ERR_OK)
-+                return retVal;
-+
-+            if(running == 1)
-+            {
-+                if ((retVal = rtl8367c_setAsicRegBit(0x130c, 5, 0))!=RT_ERR_OK)
-+                    return retVal;
-+            }
-+
-+            retVal = rtl8367c_setAsicReg(0x6601, 0x0002);
-+
-+            if(retVal == RT_ERR_OK)
-+                retVal = rtl8367c_setAsicReg(0x6600, 0x0080);
-+
-+            if(retVal == RT_ERR_OK)
-+                retVal = rtl8367c_getAsicReg(0x6602, &regValue);
-+
-+            if(running == 1)
-+            {
-+                if ((retVal2 = rtl8367c_setAsicRegBit(0x130c, 5, 1))!=RT_ERR_OK)
-+                    return retVal2;
-+            }
-+
-+            if(retVal != RT_ERR_OK)
-+                return retVal;
-+
-+            if(regValue & 0x0200)
-+                *pState = 1;
-+            else
-+                *pState = 0;
-+        }
-+        else
-+            return RT_ERR_PORT_ID;
-+    }
-+    else if(type == 1)
-+    {
-+        if (1 == ext_id)
-+        {
-+                if ((retVal = rtl8367c_setAsicReg(0x6601, 0x0002))!=RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_setAsicReg(0x6600, 0x0081))!=RT_ERR_OK)
-+                    return retVal;
-+                if ((retVal = rtl8367c_getAsicReg(0x6602, &regValue))!=RT_ERR_OK)
-+                    return retVal;
-+
-+                if(regValue & 0x0200)
-+                    *pState = 1;
-+                else
-+                    *pState = 0;
-+        }
-+        else if (2 == ext_id)
-+        {
-+            if ((retVal = rtl8367c_setAsicReg(0x6601, 0x0002))!=RT_ERR_OK)
-+                return retVal;
-+            if ((retVal = rtl8367c_setAsicReg(0x6600, 0x0080))!=RT_ERR_OK)
-+                return retVal;
-+            if ((retVal = rtl8367c_getAsicReg(0x6602, &regValue))!=RT_ERR_OK)
-+                return retVal;
-+
-+            if(regValue & 0x0200)
-+                *pState = 1;
-+            else
-+                *pState = 0;
-+        }
-+        else
-+            return RT_ERR_PORT_ID;
-+    }
-+    else if(type == 2)
-+    {
-+        if ((retVal = rtl8367c_getAsicSdsReg(0, 2, 0, &regValue))!=RT_ERR_OK)
-+            return retVal;
-+
-+        if(regValue & 0x100)
-+            *pState = 0;
-+        else
-+            *pState = 1;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_portIsolation.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_portIsolation.c
-new file mode 100644
-index 0000000000..e0b9db4bfb
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_portIsolation.c
-@@ -0,0 +1,119 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Port isolation related functions
-+ *
-+ */
-+
-+#include <rtl8367c_asicdrv_portIsolation.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicPortIsolationPermittedPortmask
-+ * Description:
-+ *      Set permitted port isolation portmask
-+ * Input:
-+ *      port            - Physical port number (0~10)
-+ *      permitPortmask  - port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_PORT_MASK    - Invalid portmask
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortIsolationPermittedPortmask(rtk_uint32 port, rtk_uint32 permitPortmask)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if( permitPortmask > RTL8367C_PORTMASK)
-+        return RT_ERR_PORT_MASK;
-+
-+    return rtl8367c_setAsicReg(RTL8367C_PORT_ISOLATION_PORT_MASK_REG(port), permitPortmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortIsolationPermittedPortmask
-+ * Description:
-+ *      Get permitted port isolation portmask
-+ * Input:
-+ *      port                - Physical port number (0~10)
-+ *      pPermitPortmask     - port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortIsolationPermittedPortmask(rtk_uint32 port, rtk_uint32 *pPermitPortmask)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicReg(RTL8367C_PORT_ISOLATION_PORT_MASK_REG(port), pPermitPortmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortIsolationEfid
-+ * Description:
-+ *      Set port isolation EFID
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      efid    - EFID (0~7)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_OUT_OF_RANGE - Input parameter out of range
-+ * Note:
-+ *      EFID is used in individual learning in filtering database
-+ */
-+ret_t rtl8367c_setAsicPortIsolationEfid(rtk_uint32 port, rtk_uint32 efid)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if( efid > RTL8367C_EFIDMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_PORT_EFID_REG(port), RTL8367C_PORT_EFID_MASK(port), efid);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortIsolationEfid
-+ * Description:
-+ *      Get port isolation EFID
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      pEfid   - EFID (0~7)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortIsolationEfid(rtk_uint32 port, rtk_uint32 *pEfid)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_PORT_EFID_REG(port), RTL8367C_PORT_EFID_MASK(port), pEfid);
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_qos.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_qos.c
-new file mode 100644
-index 0000000000..89c3c3e02e
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_qos.c
-@@ -0,0 +1,778 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Qos related functions
-+ *
-+ */
-+
-+#include <rtl8367c_asicdrv_qos.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicPriorityDot1qRemapping
-+ * Description:
-+ *      Set 802.1Q absolutely priority
-+ * Input:
-+ *      srcpriority - Priority value
-+ *      priority     - Absolute priority value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                 - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY    - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPriorityDot1qRemapping(rtk_uint32 srcpriority, rtk_uint32 priority )
-+{
-+    if((srcpriority > RTL8367C_PRIMAX) || (priority > RTL8367C_PRIMAX))
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_QOS_1Q_PRIORITY_REMAPPING_REG(srcpriority), RTL8367C_QOS_1Q_PRIORITY_REMAPPING_MASK(srcpriority),priority);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPriorityDot1qRemapping
-+ * Description:
-+ *      Get 802.1Q absolutely priority
-+ * Input:
-+ *      srcpriority - Priority value
-+ *      pPriority     - Absolute priority value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK     - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPriorityDot1qRemapping(rtk_uint32 srcpriority, rtk_uint32 *pPriority )
-+{
-+    if(srcpriority > RTL8367C_PRIMAX )
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_QOS_1Q_PRIORITY_REMAPPING_REG(srcpriority), RTL8367C_QOS_1Q_PRIORITY_REMAPPING_MASK(srcpriority), pPriority);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPriorityPortBased
-+ * Description:
-+ *      Set port based priority
-+ * Input:
-+ *      port         - Physical port number (0~7)
-+ *      priority     - Priority value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                 - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number
-+ *      RT_ERR_QOS_INT_PRIORITY    - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPriorityPortBased(rtk_uint32 port, rtk_uint32 priority )
-+{
-+    ret_t retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(priority > RTL8367C_PRIMAX )
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_QOS_PORTBASED_PRIORITY_REG(port), RTL8367C_QOS_PORTBASED_PRIORITY_MASK(port), priority);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_QOS_PORTBASED_PRIORITY_CTRL2, 0x7 << ((port - 8) << 2), priority);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPriorityPortBased
-+ * Description:
-+ *      Get port based priority
-+ * Input:
-+ *      port         - Physical port number (0~7)
-+ *      pPriority     - Priority value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK         - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPriorityPortBased(rtk_uint32 port, rtk_uint32 *pPriority )
-+{
-+    ret_t retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_QOS_PORTBASED_PRIORITY_REG(port), RTL8367C_QOS_PORTBASED_PRIORITY_MASK(port), pPriority);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_QOS_PORTBASED_PRIORITY_CTRL2, 0x7 << ((port - 8) << 2), pPriority);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPriorityDscpBased
-+ * Description:
-+ *      Set DSCP-based priority
-+ * Input:
-+ *      dscp         - DSCP value
-+ *      priority     - Priority value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                 - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_DSCP_VALUE    - Invalid DSCP value
-+ *      RT_ERR_QOS_INT_PRIORITY    - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPriorityDscpBased(rtk_uint32 dscp, rtk_uint32 priority )
-+{
-+    if(priority > RTL8367C_PRIMAX )
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    if(dscp > RTL8367C_DSCPMAX)
-+        return RT_ERR_QOS_DSCP_VALUE;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_QOS_DSCP_TO_PRIORITY_REG(dscp), RTL8367C_QOS_DSCP_TO_PRIORITY_MASK(dscp), priority);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPriorityDscpBased
-+ * Description:
-+ *      Get DSCP-based priority
-+ * Input:
-+ *      dscp         - DSCP value
-+ *      pPriority     - Priority value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                 - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY    - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPriorityDscpBased(rtk_uint32 dscp, rtk_uint32 *pPriority )
-+{
-+    if(dscp > RTL8367C_DSCPMAX)
-+        return RT_ERR_QOS_DSCP_VALUE;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_QOS_DSCP_TO_PRIORITY_REG(dscp), RTL8367C_QOS_DSCP_TO_PRIORITY_MASK(dscp), pPriority);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPriorityDecision
-+ * Description:
-+ *      Set priority decision table
-+ * Input:
-+ *      prisrc         - Priority decision source
-+ *      decisionPri - Decision priority assignment
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                     - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY        - Invalid priority
-+ *      RT_ERR_QOS_SEL_PRI_SOURCE    - Invalid priority decision source parameter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPriorityDecision(rtk_uint32 index, rtk_uint32 prisrc, rtk_uint32 decisionPri)
-+{
-+    ret_t retVal;
-+
-+    if(index >= PRIDEC_IDX_END )
-+        return RT_ERR_ENTRY_INDEX;
-+
-+    if(prisrc >= PRIDEC_END )
-+        return RT_ERR_QOS_SEL_PRI_SOURCE;
-+
-+    if(decisionPri > RTL8367C_DECISIONPRIMAX )
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    switch(index)
-+    {
-+        case PRIDEC_IDX0:
-+            if((retVal = rtl8367c_setAsicRegBits(RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_REG(prisrc), RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_MASK(prisrc), decisionPri))!=  RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case PRIDEC_IDX1:
-+            if((retVal = rtl8367c_setAsicRegBits(RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_REG(prisrc), RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_MASK(prisrc), decisionPri))!=  RT_ERR_OK)
-+                return retVal;
-+            break;
-+        default:
-+            break;
-+    };
-+
-+    return RT_ERR_OK;
-+
-+
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicPriorityDecision
-+ * Description:
-+ *      Get priority decision table
-+ * Input:
-+ *      prisrc         - Priority decision source
-+ *      pDecisionPri - Decision priority assignment
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                     - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_QOS_SEL_PRI_SOURCE    - Invalid priority decision source parameter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPriorityDecision(rtk_uint32 index, rtk_uint32 prisrc, rtk_uint32* pDecisionPri)
-+{
-+    ret_t retVal;
-+
-+    if(index >= PRIDEC_IDX_END )
-+        return RT_ERR_ENTRY_INDEX;
-+
-+    if(prisrc >= PRIDEC_END )
-+        return RT_ERR_QOS_SEL_PRI_SOURCE;
-+
-+    switch(index)
-+    {
-+        case PRIDEC_IDX0:
-+            if((retVal = rtl8367c_getAsicRegBits(RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_REG(prisrc), RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_MASK(prisrc), pDecisionPri))!=  RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case PRIDEC_IDX1:
-+            if((retVal = rtl8367c_getAsicRegBits(RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_REG(prisrc), RTL8367C_QOS_INTERNAL_PRIORITY_DECISION2_MASK(prisrc), pDecisionPri))!=  RT_ERR_OK)
-+                return retVal;
-+            break;
-+        default:
-+            break;
-+    };
-+
-+    return RT_ERR_OK;
-+
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicPortPriorityDecisionIndex
-+ * Description:
-+ *      Set priority decision index for each port
-+ * Input:
-+ *      port     - Physical port number (0~7)
-+ *      index     - Table index
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK             - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_QUEUE_NUM      - Invalid queue number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortPriorityDecisionIndex(rtk_uint32 port, rtk_uint32 index )
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(index >= PRIDEC_IDX_END)
-+        return RT_ERR_ENTRY_INDEX;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_IDX_CTRL, port, index);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortPriorityDecisionIndex
-+ * Description:
-+ *      Get priority decision index  for each port
-+ * Input:
-+ *      port     - Physical port number (0~7)
-+ *      pIndex     - Table index
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK             - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortPriorityDecisionIndex(rtk_uint32 port, rtk_uint32 *pIndex )
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_QOS_INTERNAL_PRIORITY_DECISION_IDX_CTRL, port, pIndex);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicOutputQueueMappingIndex
-+ * Description:
-+ *      Set output queue number for each port
-+ * Input:
-+ *      port     - Physical port number (0~7)
-+ *      index     - Mapping table index
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK             - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_QUEUE_NUM      - Invalid queue number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicOutputQueueMappingIndex(rtk_uint32 port, rtk_uint32 index )
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(index >= RTL8367C_QUEUENO)
-+        return RT_ERR_QUEUE_NUM;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_QOS_PORT_QUEUE_NUMBER_REG(port), RTL8367C_QOS_PORT_QUEUE_NUMBER_MASK(port), index);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicOutputQueueMappingIndex
-+ * Description:
-+ *      Get output queue number for each port
-+ * Input:
-+ *      port     - Physical port number (0~7)
-+ *      pIndex     - Mapping table index
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK             - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicOutputQueueMappingIndex(rtk_uint32 port, rtk_uint32 *pIndex )
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_QOS_PORT_QUEUE_NUMBER_REG(port), RTL8367C_QOS_PORT_QUEUE_NUMBER_MASK(port), pIndex);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPriorityToQIDMappingTable
-+ * Description:
-+ *      Set priority to QID mapping table parameters
-+ * Input:
-+ *      index         - Mapping table index
-+ *      priority     - The priority value
-+ *      qid         - Queue id
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                 - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QUEUE_ID          - Invalid queue id
-+ *      RT_ERR_QUEUE_NUM          - Invalid queue number
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPriorityToQIDMappingTable(rtk_uint32 index, rtk_uint32 priority, rtk_uint32 qid )
-+{
-+    if(index >= RTL8367C_QUEUENO)
-+        return RT_ERR_QUEUE_NUM;
-+
-+    if(priority > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    if(qid > RTL8367C_QIDMAX)
-+        return RT_ERR_QUEUE_ID;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_QOS_1Q_PRIORITY_TO_QID_REG(index, priority), RTL8367C_QOS_1Q_PRIORITY_TO_QID_MASK(priority), qid);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPriorityToQIDMappingTable
-+ * Description:
-+ *      Get priority to QID mapping table parameters
-+ * Input:
-+ *      index         - Mapping table index
-+ *      priority     - The priority value
-+ *      pQid         - Queue id
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                 - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QUEUE_NUM          - Invalid queue number
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPriorityToQIDMappingTable(rtk_uint32 index, rtk_uint32 priority, rtk_uint32* pQid)
-+{
-+    if(index >= RTL8367C_QUEUENO)
-+        return RT_ERR_QUEUE_NUM;
-+
-+    if(priority > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_QOS_1Q_PRIORITY_TO_QID_REG(index, priority), RTL8367C_QOS_1Q_PRIORITY_TO_QID_MASK(priority), pQid);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicRemarkingDot1pAbility
-+ * Description:
-+ *      Set 802.1p remarking ability
-+ * Input:
-+ *      port     - Physical port number (0~7)
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK             - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRemarkingDot1pAbility(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_PORT_MISC_CFG_REG(port), RTL8367C_1QREMARK_ENABLE_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRemarkingDot1pAbility
-+ * Description:
-+ *      Get 802.1p remarking ability
-+ * Input:
-+ *      port     - Physical port number (0~7)
-+ *      pEnabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK     - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRemarkingDot1pAbility(rtk_uint32 port, rtk_uint32* pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_PORT_MISC_CFG_REG(port), RTL8367C_1QREMARK_ENABLE_OFFSET, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicRemarkingDot1pParameter
-+ * Description:
-+ *      Set 802.1p remarking parameter
-+ * Input:
-+ *      priority     - Priority value
-+ *      newPriority - New priority value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                 - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRemarkingDot1pParameter(rtk_uint32 priority, rtk_uint32 newPriority )
-+{
-+    if(priority > RTL8367C_PRIMAX || newPriority > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_QOS_1Q_REMARK_REG(priority), RTL8367C_QOS_1Q_REMARK_MASK(priority), newPriority);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRemarkingDot1pParameter
-+ * Description:
-+ *      Get 802.1p remarking parameter
-+ * Input:
-+ *      priority     - Priority value
-+ *      pNewPriority - New priority value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                 - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRemarkingDot1pParameter(rtk_uint32 priority, rtk_uint32 *pNewPriority )
-+{
-+    if(priority > RTL8367C_PRIMAX )
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_QOS_1Q_REMARK_REG(priority), RTL8367C_QOS_1Q_REMARK_MASK(priority), pNewPriority);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicRemarkingDot1pSrc
-+ * Description:
-+ *      Set remarking source of 802.1p remarking.
-+ * Input:
-+ *      type      - remarking source
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT         - The module is not initial
-+ *      RT_ERR_PORT_ID  - invalid port id
-+ *      RT_ERR_INPUT            - invalid input parameter
-+
-+ * Note:
-+ *      The API can configure 802.1p remark functionality to map original DSCP value or internal
-+ *      priority to TX DSCP value.
-+ */
-+ret_t rtl8367c_setAsicRemarkingDot1pSrc(rtk_uint32 type)
-+{
-+
-+    if(type >= DOT1P_PRISEL_END )
-+        return RT_ERR_QOS_SEL_PRI_SOURCE;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_RMK_CFG_SEL_CTRL, RTL8367C_RMK_1Q_CFG_SEL_OFFSET, type);
-+}
-+
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicRemarkingDot1pSrc
-+ * Description:
-+ *      Get remarking source of 802.1p remarking.
-+ * Output:
-+ *      pType      - remarking source
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT         - The module is not initial
-+ *      RT_ERR_PORT_ID          - invalid port id
-+ *      RT_ERR_INPUT            - invalid input parameter
-+ *      RT_ERR_NULL_POINTER     - input parameter may be null pointer
-+
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRemarkingDot1pSrc(rtk_uint32 *pType)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_RMK_CFG_SEL_CTRL, RTL8367C_RMK_1Q_CFG_SEL_OFFSET, pType);
-+}
-+
-+
-+
-+
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicRemarkingDscpAbility
-+ * Description:
-+ *      Set DSCP remarking ability
-+ * Input:
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK     - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRemarkingDscpAbility(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REMARKING_CTRL_REG, RTL8367C_REMARKING_DSCP_ENABLE_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRemarkingDscpAbility
-+ * Description:
-+ *      Get DSCP remarking ability
-+ * Input:
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK     - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRemarkingDscpAbility(rtk_uint32* pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REMARKING_CTRL_REG, RTL8367C_REMARKING_DSCP_ENABLE_OFFSET, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicRemarkingDscpParameter
-+ * Description:
-+ *      Set DSCP remarking parameter
-+ * Input:
-+ *      priority     - Priority value
-+ *      newDscp     - New DSCP value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                 - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_DSCP_VALUE    - Invalid DSCP value
-+ *      RT_ERR_QOS_INT_PRIORITY    - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRemarkingDscpParameter(rtk_uint32 priority, rtk_uint32 newDscp )
-+{
-+    if(priority > RTL8367C_PRIMAX )
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    if(newDscp > RTL8367C_DSCPMAX)
-+        return RT_ERR_QOS_DSCP_VALUE;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_QOS_DSCP_REMARK_REG(priority), RTL8367C_QOS_DSCP_REMARK_MASK(priority), newDscp);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRemarkingDscpParameter
-+ * Description:
-+ *      Get DSCP remarking parameter
-+ * Input:
-+ *      priority     - Priority value
-+ *      pNewDscp     - New DSCP value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                 - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY    - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRemarkingDscpParameter(rtk_uint32 priority, rtk_uint32* pNewDscp )
-+{
-+    if(priority > RTL8367C_PRIMAX )
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_QOS_DSCP_REMARK_REG(priority), RTL8367C_QOS_DSCP_REMARK_MASK(priority), pNewDscp);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicRemarkingDscpSrc
-+ * Description:
-+ *      Set remarking source of DSCP remarking.
-+ * Input:
-+ *      type      - remarking source
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT         - The module is not initial
-+ *      RT_ERR_PORT_ID  - invalid port id
-+ *      RT_ERR_INPUT            - invalid input parameter
-+
-+ * Note:
-+ *      The API can configure DSCP remark functionality to map original DSCP value or internal
-+ *      priority to TX DSCP value.
-+ */
-+ret_t rtl8367c_setAsicRemarkingDscpSrc(rtk_uint32 type)
-+{
-+
-+    if(type >= DSCP_PRISEL_END )
-+        return RT_ERR_QOS_SEL_PRI_SOURCE;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_RMK_CFG_SEL_CTRL, RTL8367C_RMK_DSCP_CFG_SEL_MASK, type);
-+}
-+
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicRemarkingDscpSrc
-+ * Description:
-+ *      Get remarking source of DSCP remarking.
-+ * Output:
-+ *      pType      - remarking source
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT         - The module is not initial
-+ *      RT_ERR_PORT_ID          - invalid port id
-+ *      RT_ERR_INPUT            - invalid input parameter
-+ *      RT_ERR_NULL_POINTER     - input parameter may be null pointer
-+
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRemarkingDscpSrc(rtk_uint32 *pType)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_RMK_CFG_SEL_CTRL, RTL8367C_RMK_DSCP_CFG_SEL_MASK, pType);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicRemarkingDscp2Dscp
-+ * Description:
-+ *      Set DSCP to remarked DSCP mapping.
-+ * Input:
-+ *      dscp    - DSCP value
-+ *      rmkDscp - remarked DSCP value
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_UNIT_ID          - Invalid unit id
-+ *      RT_ERR_QOS_DSCP_VALUE   - Invalid dscp value
-+ * Note:
-+ *      dscp parameter can be DSCP value or internal priority according to configuration of API
-+ *      dal_apollomp_qos_dscpRemarkSrcSel_set(), because DSCP remark functionality can map original DSCP
-+ *      value or internal priority to TX DSCP value.
-+ */
-+ret_t rtl8367c_setAsicRemarkingDscp2Dscp(rtk_uint32 dscp, rtk_uint32 rmkDscp)
-+{
-+    if((dscp > RTL8367C_DSCPMAX ) || (rmkDscp > RTL8367C_DSCPMAX))
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_QOS_DSCP_TO_DSCP_REG(dscp), RTL8367C_QOS_DSCP_TO_DSCP_MASK(dscp), rmkDscp);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicRemarkingDscp2Dscp
-+ * Description:
-+ *      Get DSCP to remarked DSCP mapping.
-+ * Input:
-+ *      dscp    - DSCP value
-+ * Output:
-+ *      pRmkDscp   - remarked DSCP value
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_QOS_DSCP_VALUE   - Invalid dscp value
-+ *      RT_ERR_NULL_POINTER     - NULL pointer
-+ * Note:
-+ *      None.
-+ */
-+ret_t rtl8367c_getAsicRemarkingDscp2Dscp(rtk_uint32 dscp, rtk_uint32 *pRmkDscp)
-+{
-+    if(dscp > RTL8367C_DSCPMAX)
-+        return RT_ERR_QOS_DSCP_VALUE;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_QOS_DSCP_TO_DSCP_REG(dscp), RTL8367C_QOS_DSCP_TO_DSCP_MASK(dscp), pRmkDscp);
-+
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_rldp.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_rldp.c
-new file mode 100644
-index 0000000000..0309689d39
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_rldp.c
-@@ -0,0 +1,674 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 42321 $
-+ * $Date: 2013-08-26 13:51:29 +0800 (週一, 26 八月 2013) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : RLDP related functions
-+ *
-+ */
-+
-+#include <rtl8367c_asicdrv_rldp.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicRldp
-+ * Description:
-+ *      Set RLDP function enable/disable
-+ * Input:
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRldp(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_RLDP_CTRL0, RTL8367C_RLDP_ENABLE_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRldp
-+ * Description:
-+ *      Get RLDP function enable/disable
-+ * Input:
-+ *      pEnabled    - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRldp(rtk_uint32 *pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_RLDP_CTRL0, RTL8367C_RLDP_ENABLE_OFFSET, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicRldpEnable8051
-+ * Description:
-+ *      Set RLDP function handled by ASIC or 8051
-+ * Input:
-+ *      enabled     - 1: enabled 8051, 0: disabled 8051 (RLDP is handled by ASIC)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRldpEnable8051(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_RLDP_CTRL0, RTL8367C_RLDP_8051_ENABLE_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicRldrtl8367c_getAsicRldpEnable8051pEnable8051
-+ * Description:
-+ *      Get RLDP function handled by ASIC or 8051
-+ * Input:
-+ *      pEnabled    - 1: enabled 8051, 0: disabled 8051 (RLDP is handled by ASIC)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRldpEnable8051(rtk_uint32 *pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_RLDP_CTRL0, RTL8367C_RLDP_8051_ENABLE_OFFSET, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicRldpCompareRandomNumber
-+ * Description:
-+ *      Set enable compare the random number field and seed field of RLDP frame
-+ * Input:
-+ *      enabled     - 1: enabled comparing random number, 0: disabled comparing random number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRldpCompareRandomNumber(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_RLDP_CTRL0, RTL8367C_RLDP_COMP_ID_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRldpCompareRandomNumber
-+ * Description:
-+ *      Get enable compare the random number field and seed field of RLDP frame
-+ * Input:
-+ *      pEnabled    - 1: enabled comparing random number, 0: disabled comparing random number
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRldpCompareRandomNumber(rtk_uint32 *pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_RLDP_CTRL0, RTL8367C_RLDP_COMP_ID_OFFSET, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicRldpIndicatorSource
-+ * Description:
-+ *      Set buzzer and LED source when detecting a loop
-+ * Input:
-+ *      src     - 0: ASIC, 1: 8051
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRldpIndicatorSource(rtk_uint32 src)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_RLDP_CTRL0, RTL8367C_RLDP_INDICATOR_SOURCE_OFFSET, src);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRldpIndicatorSource
-+ * Description:
-+ *      Get buzzer and LED source when detecting a loop
-+ * Input:
-+ *      pSrc    - 0: ASIC, 1: 8051
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRldpIndicatorSource(rtk_uint32 *pSrc)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_RLDP_CTRL0, RTL8367C_RLDP_INDICATOR_SOURCE_OFFSET, pSrc);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicRldpCheckingStatePara
-+ * Description:
-+ *      Set retry count and retry period of checking state
-+ * Input:
-+ *      retryCount  - 0~0xFF (times)
-+ *      retryPeriod - 0~0xFFFF (ms)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRldpCheckingStatePara(rtk_uint32 retryCount, rtk_uint32 retryPeriod)
-+{
-+    ret_t retVal;
-+
-+    if(retryCount > 0xFF)
-+        return RT_ERR_OUT_OF_RANGE;
-+    if(retryPeriod > RTL8367C_REGDATAMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_RLDP_RETRY_COUNT_REG, RTL8367C_RLDP_RETRY_COUNT_CHKSTATE_MASK, retryCount);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return rtl8367c_setAsicReg(RTL8367C_RLDP_RETRY_PERIOD_CHKSTATE_REG, retryPeriod);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRldpCheckingStatePara
-+ * Description:
-+ *      Get retry count and retry period of checking state
-+ * Input:
-+ *      pRetryCount     - 0~0xFF (times)
-+ *      pRetryPeriod    - 0~0xFFFF (ms)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRldpCheckingStatePara(rtk_uint32 *pRetryCount, rtk_uint32 *pRetryPeriod)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_RLDP_RETRY_COUNT_REG, RTL8367C_RLDP_RETRY_COUNT_CHKSTATE_MASK, pRetryCount);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return rtl8367c_getAsicReg(RTL8367C_RLDP_RETRY_PERIOD_CHKSTATE_REG, pRetryPeriod);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicRldpLoopStatePara
-+ * Description:
-+ *      Set retry count and retry period of loop state
-+ * Input:
-+ *      retryCount  - 0~0xFF (times)
-+ *      retryPeriod - 0~0xFFFF (ms)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRldpLoopStatePara(rtk_uint32 retryCount, rtk_uint32 retryPeriod)
-+{
-+    ret_t retVal;
-+
-+    if(retryCount > 0xFF)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(retryPeriod > RTL8367C_REGDATAMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_RLDP_RETRY_COUNT_REG, RTL8367C_RLDP_RETRY_COUNT_LOOPSTATE_MASK, retryCount);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return rtl8367c_setAsicReg(RTL8367C_RLDP_RETRY_PERIOD_LOOPSTATE_REG, retryPeriod);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRldpLoopStatePara
-+ * Description:
-+ *      Get retry count and retry period of loop state
-+ * Input:
-+ *      pRetryCount     - 0~0xFF (times)
-+ *      pRetryPeriod    - 0~0xFFFF (ms)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - input parameter out of range
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRldpLoopStatePara(rtk_uint32 *pRetryCount, rtk_uint32 *pRetryPeriod)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_RLDP_RETRY_COUNT_REG, RTL8367C_RLDP_RETRY_COUNT_LOOPSTATE_MASK, pRetryCount);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return rtl8367c_getAsicReg(RTL8367C_RLDP_RETRY_PERIOD_LOOPSTATE_REG, pRetryPeriod);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicRldpTxPortmask
-+ * Description:
-+ *      Set portmask that send/forward RLDP frame
-+ * Input:
-+ *      portmask    - 0~0xFF
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid portmask
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRldpTxPortmask(rtk_uint32 portmask)
-+{
-+    if(portmask > RTL8367C_PORTMASK)
-+        return RT_ERR_PORT_MASK;
-+
-+    return rtl8367c_setAsicReg(RTL8367C_RLDP_TX_PMSK_REG, portmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRldpTxPortmask
-+ * Description:
-+ *      Get portmask that send/forward RLDP frame
-+ * Input:
-+ *      pPortmask   - 0~0xFF
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRldpTxPortmask(rtk_uint32 *pPortmask)
-+{
-+    return rtl8367c_getAsicReg(RTL8367C_RLDP_TX_PMSK_REG, pPortmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicRldpMagicNum
-+ * Description:
-+ *      Set Random seed of RLDP
-+ * Input:
-+ *      seed    - MAC
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRldpMagicNum(ether_addr_t seed)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint16 *accessPtr;
-+    rtk_uint32 i;
-+
-+    accessPtr = (rtk_uint16*)&seed;
-+
-+    for (i = 0; i < 3; i++)
-+    {
-+        regData = *accessPtr;
-+        retVal = rtl8367c_setAsicReg(RTL8367C_RLDP_MAGIC_NUM_REG_BASE + i, regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        accessPtr++;
-+    }
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRldpMagicNum
-+ * Description:
-+ *      Get Random seed of RLDP
-+ * Input:
-+ *      pSeed   - MAC
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRldpMagicNum(ether_addr_t *pSeed)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint16 *accessPtr;
-+    rtk_uint32 i;
-+
-+    accessPtr = (rtk_uint16*)pSeed;
-+
-+    for(i = 0; i < 3; i++)
-+    {
-+        retVal = rtl8367c_getAsicReg(RTL8367C_RLDP_MAGIC_NUM_REG_BASE + i, &regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        *accessPtr = regData;
-+        accessPtr++;
-+    }
-+
-+    return retVal;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicRldpLoopedPortmask
-+ * Description:
-+ *      Get looped portmask
-+ * Input:
-+ *      pPortmask   - 0~0xFF
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRldpLoopedPortmask(rtk_uint32 *pPortmask)
-+{
-+    return rtl8367c_getAsicReg(RTL8367C_RLDP_LOOP_PMSK_REG, pPortmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRldpRandomNumber
-+ * Description:
-+ *      Get Random number of RLDP
-+ * Input:
-+ *      pRandNumber     - MAC
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRldpRandomNumber(ether_addr_t *pRandNumber)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_int16 accessPtr[3];
-+    rtk_uint32 i;
-+
-+    for(i = 0; i < 3; i++)
-+    {
-+        retVal = rtl8367c_getAsicReg(RTL8367C_RLDP_RAND_NUM_REG_BASE+ i, &regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        accessPtr[i] = regData;
-+    }
-+
-+    memcpy(pRandNumber, accessPtr, 6);
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRldpLoopedPortmask
-+ * Description:
-+ *      Get port number of looped pair
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      pLoopedPair     - port (0~7)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRldpLoopedPortPair(rtk_uint32 port, rtk_uint32 *pLoopedPair)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+        return rtl8367c_getAsicRegBits(RTL8367C_RLDP_LOOP_PORT_REG(port), RTL8367C_RLDP_LOOP_PORT_MASK(port), pLoopedPair);
-+    else
-+        return rtl8367c_getAsicRegBits(RTL8367C_REG_RLDP_LOOP_PORT_REG4 + ((port - 8) >> 1), RTL8367C_RLDP_LOOP_PORT_MASK(port), pLoopedPair);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicRlppTrap8051
-+ * Description:
-+ *      Set trap RLPP packet to 8051
-+ * Input:
-+ *      enabled     - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRlppTrap8051(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_RLDP_CTRL0, RTL8367C_RLPP_8051_TRAP_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRlppTrap8051
-+ * Description:
-+ *      Get trap RLPP packet to 8051
-+ * Input:
-+ *      pEnabled    - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRlppTrap8051(rtk_uint32 *pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_RLDP_CTRL0, RTL8367C_RLPP_8051_TRAP_OFFSET, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicRldpLeaveLoopedPortmask
-+ * Description:
-+ *      Clear leaved looped portmask
-+ * Input:
-+ *      portmask    - 0~0xFF
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRldpLeaveLoopedPortmask(rtk_uint32 portmask)
-+{
-+    return rtl8367c_setAsicReg(RTL8367C_REG_RLDP_RELEASED_INDICATOR, portmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRldpLeaveLoopedPortmask
-+ * Description:
-+ *      Get leaved looped portmask
-+ * Input:
-+ *      pPortmask   - 0~0xFF
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRldpLeaveLoopedPortmask(rtk_uint32 *pPortmask)
-+{
-+    return rtl8367c_getAsicReg(RTL8367C_REG_RLDP_RELEASED_INDICATOR, pPortmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicRldpEnterLoopedPortmask
-+ * Description:
-+ *      Clear enter loop portmask
-+ * Input:
-+ *      portmask    - 0~0xFF
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRldpEnterLoopedPortmask(rtk_uint32 portmask)
-+{
-+    return rtl8367c_setAsicReg(RTL8367C_REG_RLDP_LOOPED_INDICATOR, portmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRldpEnterLoopedPortmask
-+ * Description:
-+ *      Get enter loop portmask
-+ * Input:
-+ *      pPortmask   - 0~0xFF
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRldpEnterLoopedPortmask(rtk_uint32 *pPortmask)
-+{
-+    return rtl8367c_getAsicReg(RTL8367C_REG_RLDP_LOOPED_INDICATOR, pPortmask);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicRldpTriggerMode
-+ * Description:
-+ *      Set trigger RLDP mode
-+ * Input:
-+ *      mode    - 1: Periodically, 0: SA moving
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRldpTriggerMode(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_RLDP_CTRL0, RTL8367C_RLDP_TRIGGER_MODE_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRldpTriggerMode
-+ * Description:
-+ *      Get trigger RLDP mode
-+ * Input:
-+ *      pMode   - - 1: Periodically, 0: SA moving
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRldpTriggerMode(rtk_uint32 *pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_RLDP_CTRL0, RTL8367C_RLDP_TRIGGER_MODE_OFFSET, pEnabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicRldp8051Portmask
-+ * Description:
-+ *      Set 8051/CPU configured looped portmask
-+ * Input:
-+ *      portmask    - 0~0xFF
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid portmask
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRldp8051Portmask(rtk_uint32 portmask)
-+{
-+    ret_t retVal;
-+    if(portmask > RTL8367C_PORTMASK)
-+        return RT_ERR_PORT_MASK;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_RLDP_CTRL0_REG,RTL8367C_RLDP_8051_LOOP_PORTMSK_MASK,portmask & 0xff);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_RLDP_CTRL5,RTL8367C_RLDP_CTRL5_MASK,(portmask >> 8) & 7);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRldp8051Portmask
-+ * Description:
-+ *      Get 8051/CPU configured looped portmask
-+ * Input:
-+ *      pPortmask   - 0~0xFF
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRldp8051Portmask(rtk_uint32 *pPortmask)
-+{
-+    rtk_uint32 tmpPmsk;
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_RLDP_CTRL0_REG,RTL8367C_RLDP_8051_LOOP_PORTMSK_MASK,&tmpPmsk);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+    *pPortmask = tmpPmsk & 0xff;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_RLDP_CTRL5,RTL8367C_RLDP_CTRL5_MASK,&tmpPmsk);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+    *pPortmask |= (tmpPmsk & 7) <<8;
-+
-+    return RT_ERR_OK;
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_rma.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_rma.c
-new file mode 100644
-index 0000000000..f297defa78
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_rma.c
-@@ -0,0 +1,362 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 64716 $
-+ * $Date: 2015-12-31 16:31:55 +0800 (週四, 31 �二月 2015) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : RMA related functions
-+ *
-+ */
-+
-+#include <rtl8367c_asicdrv_rma.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicRma
-+ * Description:
-+ *      Set reserved multicast address for CPU trapping
-+ * Input:
-+ *      index     - reserved multicast LSB byte, 0x00~0x2F is available value
-+ *      pRmacfg     - type of RMA for trapping frame type setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK         - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_RMA_ADDR - Invalid RMA address index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRma(rtk_uint32 index, rtl8367c_rma_t* pRmacfg)
-+{
-+    rtk_uint32 regData = 0;
-+    ret_t retVal;
-+
-+    if(index > RTL8367C_RMAMAX)
-+        return RT_ERR_RMA_ADDR;
-+
-+    regData |= (pRmacfg->portiso_leaky & 0x0001);
-+    regData |= ((pRmacfg->vlan_leaky & 0x0001) << 1);
-+    regData |= ((pRmacfg->keep_format & 0x0001) << 2);
-+    regData |= ((pRmacfg->trap_priority & 0x0007) << 3);
-+    regData |= ((pRmacfg->discard_storm_filter & 0x0001) << 6);
-+    regData |= ((pRmacfg->operation & 0x0003) << 7);
-+
-+    if( (index >= 0x4 && index <= 0x7) || (index >= 0x9 && index <= 0x0C) || (0x0F == index))
-+        index = 0x04;
-+    else if((index >= 0x13 && index <= 0x17) || (0x19 == index) || (index >= 0x1B && index <= 0x1f))
-+        index = 0x13;
-+    else if(index >= 0x22 && index <= 0x2F)
-+        index = 0x22;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_RMA_CTRL00, RTL8367C_TRAP_PRIORITY_MASK, pRmacfg->trap_priority);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return rtl8367c_setAsicReg(RTL8367C_REG_RMA_CTRL00+index, regData);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRma
-+ * Description:
-+ *      Get reserved multicast address for CPU trapping
-+ * Input:
-+ *      index     - reserved multicast LSB byte, 0x00~0x2F is available value
-+ *      rmacfg     - type of RMA for trapping frame type setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK         - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_RMA_ADDR - Invalid RMA address index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRma(rtk_uint32 index, rtl8367c_rma_t* pRmacfg)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    if(index > RTL8367C_RMAMAX)
-+        return RT_ERR_RMA_ADDR;
-+
-+    if( (index >= 0x4 && index <= 0x7) || (index >= 0x9 && index <= 0x0C) || (0x0F == index))
-+        index = 0x04;
-+    else if((index >= 0x13 && index <= 0x17) || (0x19 == index) || (index >= 0x1B && index <= 0x1f))
-+        index = 0x13;
-+    else if(index >= 0x22 && index <= 0x2F)
-+        index = 0x22;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_RMA_CTRL00+index, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pRmacfg->operation = ((regData >> 7) & 0x0003);
-+    pRmacfg->discard_storm_filter = ((regData >> 6) & 0x0001);
-+    pRmacfg->trap_priority = ((regData >> 3) & 0x0007);
-+    pRmacfg->keep_format = ((regData >> 2) & 0x0001);
-+    pRmacfg->vlan_leaky = ((regData >> 1) & 0x0001);
-+    pRmacfg->portiso_leaky = (regData & 0x0001);
-+
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_RMA_CTRL00, RTL8367C_TRAP_PRIORITY_MASK, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pRmacfg->trap_priority = regData;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicRmaCdp
-+ * Description:
-+ *      Set CDP(Cisco Discovery Protocol) for CPU trapping
-+ * Input:
-+ *      pRmacfg     - type of RMA for trapping frame type setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK         - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_RMA_ADDR - Invalid RMA address index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRmaCdp(rtl8367c_rma_t* pRmacfg)
-+{
-+    rtk_uint32 regData = 0;
-+    ret_t retVal;
-+
-+    if(pRmacfg->operation >= RMAOP_END)
-+        return RT_ERR_RMA_ACTION;
-+
-+    if(pRmacfg->trap_priority > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    regData |= (pRmacfg->portiso_leaky & 0x0001);
-+    regData |= ((pRmacfg->vlan_leaky & 0x0001) << 1);
-+    regData |= ((pRmacfg->keep_format & 0x0001) << 2);
-+    regData |= ((pRmacfg->trap_priority & 0x0007) << 3);
-+    regData |= ((pRmacfg->discard_storm_filter & 0x0001) << 6);
-+    regData |= ((pRmacfg->operation & 0x0003) << 7);
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_RMA_CTRL00, RTL8367C_TRAP_PRIORITY_MASK, pRmacfg->trap_priority);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return rtl8367c_setAsicReg(RTL8367C_REG_RMA_CTRL_CDP, regData);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRmaCdp
-+ * Description:
-+ *      Get CDP(Cisco Discovery Protocol) for CPU trapping
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pRmacfg     - type of RMA for trapping frame type setting
-+ * Return:
-+ *      RT_ERR_OK         - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_RMA_ADDR - Invalid RMA address index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRmaCdp(rtl8367c_rma_t* pRmacfg)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_RMA_CTRL_CDP, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pRmacfg->operation = ((regData >> 7) & 0x0003);
-+    pRmacfg->discard_storm_filter = ((regData >> 6) & 0x0001);
-+    pRmacfg->trap_priority = ((regData >> 3) & 0x0007);
-+    pRmacfg->keep_format = ((regData >> 2) & 0x0001);
-+    pRmacfg->vlan_leaky = ((regData >> 1) & 0x0001);
-+    pRmacfg->portiso_leaky = (regData & 0x0001);
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_RMA_CTRL00, RTL8367C_TRAP_PRIORITY_MASK, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pRmacfg->trap_priority = regData;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicRmaCsstp
-+ * Description:
-+ *      Set CSSTP(Cisco Shared Spanning Tree Protocol) for CPU trapping
-+ * Input:
-+ *      pRmacfg     - type of RMA for trapping frame type setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK         - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_RMA_ADDR - Invalid RMA address index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRmaCsstp(rtl8367c_rma_t* pRmacfg)
-+{
-+    rtk_uint32 regData = 0;
-+    ret_t retVal;
-+
-+    if(pRmacfg->operation >= RMAOP_END)
-+        return RT_ERR_RMA_ACTION;
-+
-+    if(pRmacfg->trap_priority > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    regData |= (pRmacfg->portiso_leaky & 0x0001);
-+    regData |= ((pRmacfg->vlan_leaky & 0x0001) << 1);
-+    regData |= ((pRmacfg->keep_format & 0x0001) << 2);
-+    regData |= ((pRmacfg->trap_priority & 0x0007) << 3);
-+    regData |= ((pRmacfg->discard_storm_filter & 0x0001) << 6);
-+    regData |= ((pRmacfg->operation & 0x0003) << 7);
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_RMA_CTRL00, RTL8367C_TRAP_PRIORITY_MASK, pRmacfg->trap_priority);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return rtl8367c_setAsicReg(RTL8367C_REG_RMA_CTRL_CSSTP, regData);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRmaCsstp
-+ * Description:
-+ *      Get CSSTP(Cisco Shared Spanning Tree Protocol) for CPU trapping
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pRmacfg     - type of RMA for trapping frame type setting
-+ * Return:
-+ *      RT_ERR_OK         - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_RMA_ADDR - Invalid RMA address index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRmaCsstp(rtl8367c_rma_t* pRmacfg)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_RMA_CTRL_CSSTP, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pRmacfg->operation = ((regData >> 7) & 0x0003);
-+    pRmacfg->discard_storm_filter = ((regData >> 6) & 0x0001);
-+    pRmacfg->trap_priority = ((regData >> 3) & 0x0007);
-+    pRmacfg->keep_format = ((regData >> 2) & 0x0001);
-+    pRmacfg->vlan_leaky = ((regData >> 1) & 0x0001);
-+    pRmacfg->portiso_leaky = (regData & 0x0001);
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_RMA_CTRL00, RTL8367C_TRAP_PRIORITY_MASK, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pRmacfg->trap_priority = regData;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicRmaLldp
-+ * Description:
-+ *      Set LLDP for CPU trapping
-+ * Input:
-+ *      pRmacfg     - type of RMA for trapping frame type setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK         - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_RMA_ADDR - Invalid RMA address index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicRmaLldp(rtk_uint32 enabled, rtl8367c_rma_t* pRmacfg)
-+{
-+    rtk_uint32 regData = 0;
-+    ret_t retVal;
-+
-+    if(enabled > 1)
-+        return RT_ERR_ENABLE;
-+
-+    if(pRmacfg->operation >= RMAOP_END)
-+        return RT_ERR_RMA_ACTION;
-+
-+    if(pRmacfg->trap_priority > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_RMA_LLDP_EN, RTL8367C_RMA_LLDP_EN_OFFSET,enabled);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    regData |= (pRmacfg->portiso_leaky & 0x0001);
-+    regData |= ((pRmacfg->vlan_leaky & 0x0001) << 1);
-+    regData |= ((pRmacfg->keep_format & 0x0001) << 2);
-+    regData |= ((pRmacfg->trap_priority & 0x0007) << 3);
-+    regData |= ((pRmacfg->discard_storm_filter & 0x0001) << 6);
-+    regData |= ((pRmacfg->operation & 0x0003) << 7);
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_RMA_CTRL00, RTL8367C_TRAP_PRIORITY_MASK, pRmacfg->trap_priority);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return rtl8367c_setAsicReg(RTL8367C_REG_RMA_CTRL_LLDP, regData);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicRmaLldp
-+ * Description:
-+ *      Get LLDP for CPU trapping
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pRmacfg     - type of RMA for trapping frame type setting
-+ * Return:
-+ *      RT_ERR_OK         - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_RMA_ADDR - Invalid RMA address index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicRmaLldp(rtk_uint32 *pEnabled, rtl8367c_rma_t* pRmacfg)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_RMA_LLDP_EN, RTL8367C_RMA_LLDP_EN_OFFSET,pEnabled);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_REG_RMA_CTRL_LLDP, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pRmacfg->operation = ((regData >> 7) & 0x0003);
-+    pRmacfg->discard_storm_filter = ((regData >> 6) & 0x0001);
-+    pRmacfg->trap_priority = ((regData >> 3) & 0x0007);
-+    pRmacfg->keep_format = ((regData >> 2) & 0x0001);
-+    pRmacfg->vlan_leaky = ((regData >> 1) & 0x0001);
-+    pRmacfg->portiso_leaky = (regData & 0x0001);
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_RMA_CTRL00, RTL8367C_TRAP_PRIORITY_MASK, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pRmacfg->trap_priority = regData;
-+
-+    return RT_ERR_OK;
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_scheduling.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_scheduling.c
-new file mode 100644
-index 0000000000..8ebd6796dc
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_scheduling.c
-@@ -0,0 +1,525 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Packet Scheduling related functions
-+ *
-+ */
-+
-+#include <rtl8367c_asicdrv_scheduling.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicLeakyBucketParameter
-+ * Description:
-+ *      Set Leaky Bucket Paramters
-+ * Input:
-+ *      tick    - Tick is used for time slot size unit
-+ *      token   - Token is used for adding budget in each time slot
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_TICK     - Invalid TICK
-+ *      RT_ERR_TOKEN    - Invalid TOKEN
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicLeakyBucketParameter(rtk_uint32 tick, rtk_uint32 token)
-+{
-+    ret_t retVal;
-+
-+    if(tick > 0xFF)
-+        return RT_ERR_TICK;
-+
-+    if(token > 0xFF)
-+        return RT_ERR_TOKEN;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_LEAKY_BUCKET_TICK_REG, RTL8367C_LEAKY_BUCKET_TICK_MASK, tick);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_LEAKY_BUCKET_TOKEN_REG, RTL8367C_LEAKY_BUCKET_TOKEN_MASK, token);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicLeakyBucketParameter
-+ * Description:
-+ *      Get Leaky Bucket Paramters
-+ * Input:
-+ *      tick    - Tick is used for time slot size unit
-+ *      token   - Token is used for adding budget in each time slot
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicLeakyBucketParameter(rtk_uint32 *tick, rtk_uint32 *token)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_LEAKY_BUCKET_TICK_REG, RTL8367C_LEAKY_BUCKET_TICK_MASK, tick);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_LEAKY_BUCKET_TOKEN_REG, RTL8367C_LEAKY_BUCKET_TOKEN_MASK, token);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicAprMeter
-+ * Description:
-+ *      Set per-port per-queue APR shared meter index
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      qid     - Queue id
-+ *      apridx  - dedicated shared meter index for APR (0~7)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number
-+ *      RT_ERR_QUEUE_ID         - Invalid queue id
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicAprMeter(rtk_uint32 port, rtk_uint32 qid, rtk_uint32 apridx)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regAddr;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(qid > RTL8367C_QIDMAX)
-+        return RT_ERR_QUEUE_ID;
-+
-+    if(apridx > RTL8367C_PORT_QUEUE_METER_INDEX_MAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    if(port < 8)
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_SCHEDULE_PORT_APR_METER_REG(port, qid), RTL8367C_SCHEDULE_PORT_APR_METER_MASK(qid), apridx);
-+    else {
-+        regAddr = RTL8367C_REG_SCHEDULE_PORT8_APR_METER_CTRL0 + ((port-8) << 1) + (qid / 5);
-+        retVal = rtl8367c_setAsicRegBits(regAddr, RTL8367C_SCHEDULE_PORT_APR_METER_MASK(qid), apridx);
-+    }
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicAprMeter
-+ * Description:
-+ *      Get per-port per-queue APR shared meter index
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      qid     - Queue id
-+ *      apridx  - dedicated shared meter index for APR (0~7)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ *      RT_ERR_QUEUE_ID - Invalid queue id
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicAprMeter(rtk_uint32 port, rtk_uint32 qid, rtk_uint32 *apridx)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regAddr;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(qid > RTL8367C_QIDMAX)
-+        return RT_ERR_QUEUE_ID;
-+
-+    if(port < 8)
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_SCHEDULE_PORT_APR_METER_REG(port, qid), RTL8367C_SCHEDULE_PORT_APR_METER_MASK(qid), apridx);
-+    else {
-+        regAddr = RTL8367C_REG_SCHEDULE_PORT8_APR_METER_CTRL0 + ((port-8) << 1) + (qid / 5);
-+        retVal = rtl8367c_getAsicRegBits(regAddr, RTL8367C_SCHEDULE_PORT_APR_METER_MASK(qid), apridx);
-+    }
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicAprEnable
-+ * Description:
-+ *      Set per-port APR enable
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      aprEnable   - APR enable seting 1:enable 0:disable
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicAprEnable(rtk_uint32 port, rtk_uint32 aprEnable)
-+{
-+    ret_t retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    retVal = rtl8367c_setAsicRegBit(RTL8367C_SCHEDULE_APR_CTRL_REG, RTL8367C_SCHEDULE_APR_CTRL_OFFSET(port), aprEnable);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicAprEnable
-+ * Description:
-+ *      Get per-port APR enable
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      aprEnable   - APR enable seting 1:enable 0:disable
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicAprEnable(rtk_uint32 port, rtk_uint32 *aprEnable)
-+{
-+    ret_t retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_SCHEDULE_APR_CTRL_REG, RTL8367C_SCHEDULE_APR_CTRL_OFFSET(port), aprEnable);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicWFQWeight
-+ * Description:
-+ *      Set weight  of a queue
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      qid     - The queue ID wanted to set
-+ *      qWeight - The weight value wanted to set (valid:0~127)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number
-+ *      RT_ERR_QUEUE_ID         - Invalid queue id
-+ *      RT_ERR_QOS_QUEUE_WEIGHT - Invalid queue weight
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicWFQWeight(rtk_uint32 port, rtk_uint32 qid, rtk_uint32 qWeight)
-+{
-+    ret_t retVal;
-+
-+    /* Invalid input parameter */
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(qid > RTL8367C_QIDMAX)
-+        return RT_ERR_QUEUE_ID;
-+
-+    if(qWeight > RTL8367C_QWEIGHTMAX && qid > 0)
-+        return RT_ERR_QOS_QUEUE_WEIGHT;
-+
-+    retVal = rtl8367c_setAsicReg(RTL8367C_SCHEDULE_PORT_QUEUE_WFQ_WEIGHT_REG(port, qid), qWeight);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicWFQWeight
-+ * Description:
-+ *      Get weight  of a queue
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      qid     - The queue ID wanted to set
-+ *      qWeight - The weight value wanted to set (valid:0~127)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number
-+ *      RT_ERR_QUEUE_ID         - Invalid queue id
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicWFQWeight(rtk_uint32 port, rtk_uint32 qid, rtk_uint32 *qWeight)
-+{
-+    ret_t retVal;
-+
-+
-+    /* Invalid input parameter */
-+    if(port  > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(qid > RTL8367C_QIDMAX)
-+        return RT_ERR_QUEUE_ID;
-+
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_SCHEDULE_PORT_QUEUE_WFQ_WEIGHT_REG(port, qid), qWeight);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicWFQBurstSize
-+ * Description:
-+ *      Set WFQ leaky bucket burst size
-+ * Input:
-+ *      burstsize   - Leaky bucket burst size, unit byte
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicWFQBurstSize(rtk_uint32 burstsize)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_setAsicReg(RTL8367C_SCHEDULE_WFQ_BURST_SIZE_REG, burstsize);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicWFQBurstSize
-+ * Description:
-+ *      Get WFQ leaky bucket burst size
-+ * Input:
-+ *      burstsize   - Leaky bucket burst size, unit byte
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicWFQBurstSize(rtk_uint32 *burstsize)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_SCHEDULE_WFQ_BURST_SIZE_REG, burstsize);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicQueueType
-+ * Description:
-+ *      Set type of a queue
-+ * Input:
-+ *      port        - Physical port number (0~10)
-+ *      qid         - The queue ID wanted to set
-+ *      queueType   - The specified queue type. 0b0: Strict priority, 0b1: WFQ
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ *      RT_ERR_QUEUE_ID - Invalid queue id
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicQueueType(rtk_uint32 port, rtk_uint32 qid, rtk_uint32 queueType)
-+{
-+    ret_t retVal;
-+
-+    /* Invalid input parameter */
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(qid > RTL8367C_QIDMAX)
-+        return RT_ERR_QUEUE_ID;
-+
-+    /* Set Related Registers */
-+    retVal = rtl8367c_setAsicRegBit(RTL8367C_SCHEDULE_QUEUE_TYPE_REG(port), RTL8367C_SCHEDULE_QUEUE_TYPE_OFFSET(port, qid),queueType);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicQueueType
-+ * Description:
-+ *      Get type of a queue
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      qid         - The queue ID wanted to set
-+ *      queueType   - The specified queue type. 0b0: Strict priority, 0b1: WFQ
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ *      RT_ERR_QUEUE_ID - Invalid queue id
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicQueueType(rtk_uint32 port, rtk_uint32 qid, rtk_uint32 *queueType)
-+{
-+    ret_t retVal;
-+
-+    /* Invalid input parameter */
-+    if(port  > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(qid > RTL8367C_QIDMAX)
-+        return RT_ERR_QUEUE_ID;
-+
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_SCHEDULE_QUEUE_TYPE_REG(port), RTL8367C_SCHEDULE_QUEUE_TYPE_OFFSET(port, qid),queueType);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortEgressRate
-+ * Description:
-+ *      Set per-port egress rate
-+ * Input:
-+ *      port        - Physical port number (0~10)
-+ *      rate        - Egress rate
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_QOS_EBW_RATE - Invalid bandwidth/rate
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortEgressRate(rtk_uint32 port, rtk_uint32 rate)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regAddr, regData;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(rate > RTL8367C_QOS_GRANULARTY_MAX)
-+        return RT_ERR_QOS_EBW_RATE;
-+
-+    regAddr = RTL8367C_PORT_EGRESSBW_LSB_REG(port);
-+    regData = RTL8367C_QOS_GRANULARTY_LSB_MASK & rate;
-+
-+    retVal = rtl8367c_setAsicReg(regAddr, regData);
-+
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    regAddr = RTL8367C_PORT_EGRESSBW_MSB_REG(port);
-+    regData = (RTL8367C_QOS_GRANULARTY_MSB_MASK & rate) >> RTL8367C_QOS_GRANULARTY_MSB_OFFSET;
-+
-+    retVal = rtl8367c_setAsicRegBits(regAddr, RTL8367C_PORT6_EGRESSBW_CTRL1_MASK, regData);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortEgressRate
-+ * Description:
-+ *      Get per-port egress rate
-+ * Input:
-+ *      port        - Physical port number (0~10)
-+ *      rate        - Egress rate
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortEgressRate(rtk_uint32 port, rtk_uint32 *rate)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regAddr, regData,regData2;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    regAddr = RTL8367C_PORT_EGRESSBW_LSB_REG(port);
-+
-+    retVal = rtl8367c_getAsicReg(regAddr, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    regAddr = RTL8367C_PORT_EGRESSBW_MSB_REG(port);
-+    retVal = rtl8367c_getAsicRegBits(regAddr, RTL8367C_PORT6_EGRESSBW_CTRL1_MASK, &regData2);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *rate = regData | (regData2 << RTL8367C_QOS_GRANULARTY_MSB_OFFSET);
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortEgressRateIfg
-+ * Description:
-+ *      Set per-port egress rate calculate include/exclude IFG
-+ * Input:
-+ *      ifg     - 1:include IFG 0:exclude IFG
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortEgressRateIfg(rtk_uint32 ifg)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_SCHEDULE_WFQ_CTRL, RTL8367C_SCHEDULE_WFQ_CTRL_OFFSET, ifg);
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortEgressRateIfg
-+ * Description:
-+ *      Get per-port egress rate calculate include/exclude IFG
-+ * Input:
-+ *      ifg     - 1:include IFG 0:exclude IFG
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortEgressRateIfg(rtk_uint32 *ifg)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_SCHEDULE_WFQ_CTRL, RTL8367C_SCHEDULE_WFQ_CTRL_OFFSET, ifg);
-+
-+    return retVal;
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_storm.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_storm.c
-new file mode 100644
-index 0000000000..a29f64769d
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_storm.c
-@@ -0,0 +1,851 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Storm control filtering related functions
-+ *
-+ */
-+
-+#include <rtl8367c_asicdrv_storm.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicStormFilterBroadcastEnable
-+ * Description:
-+ *      Set per-port broadcast storm filter enable/disable
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicStormFilterBroadcastEnable(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_STORM_BCAST_REG, port, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicStormFilterBroadcastEnable
-+ * Description:
-+ *      Get per-port broadcast storm filter enable/disable
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pEnabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicStormFilterBroadcastEnable(rtk_uint32 port, rtk_uint32 *pEnabled)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_STORM_BCAST_REG, port, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicStormFilterBroadcastMeter
-+ * Description:
-+ *      Set per-port broadcast storm filter meter
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      meter   - meter index (0~31)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicStormFilterBroadcastMeter(rtk_uint32 port, rtk_uint32 meter)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if(meter > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_STORM_BCAST_METER_CTRL_REG(port), RTL8367C_STORM_BCAST_METER_CTRL_MASK(port), meter);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicStormFilterBroadcastMeter
-+ * Description:
-+ *      Get per-port broadcast storm filter meter
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pMeter  - meter index (0~31)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicStormFilterBroadcastMeter(rtk_uint32 port, rtk_uint32 *pMeter)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_STORM_BCAST_METER_CTRL_REG(port), RTL8367C_STORM_BCAST_METER_CTRL_MASK(port), pMeter);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicStormFilterMulticastEnable
-+ * Description:
-+ *      Set per-port multicast storm filter enable/disable
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicStormFilterMulticastEnable(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_STORM_MCAST_REG, port, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicStormFilterMulticastEnable
-+ * Description:
-+ *      Get per-port multicast storm filter enable/disable
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pEnabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicStormFilterMulticastEnable(rtk_uint32 port, rtk_uint32 *pEnabled)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_STORM_MCAST_REG, port, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicStormFilterMulticastMeter
-+ * Description:
-+ *      Set per-port multicast storm filter meter
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      meter   - meter index (0~31)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicStormFilterMulticastMeter(rtk_uint32 port, rtk_uint32 meter)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if(meter > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_STORM_MCAST_METER_CTRL_REG(port), RTL8367C_STORM_MCAST_METER_CTRL_MASK(port), meter);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicStormFilterMulticastMeter
-+ * Description:
-+ *      Get per-port multicast storm filter meter
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pMeter  - meter index (0~31)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicStormFilterMulticastMeter(rtk_uint32 port, rtk_uint32 *pMeter)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_STORM_MCAST_METER_CTRL_REG(port), RTL8367C_STORM_MCAST_METER_CTRL_MASK(port), pMeter);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicStormFilterUnknownMulticastEnable
-+ * Description:
-+ *      Set per-port unknown multicast storm filter enable/disable
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicStormFilterUnknownMulticastEnable(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_STORM_UNKNOWN_MCAST_REG, port, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicStormFilterUnknownMulticastEnable
-+ * Description:
-+ *      Get per-port unknown multicast storm filter enable/disable
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pEnabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicStormFilterUnknownMulticastEnable(rtk_uint32 port, rtk_uint32 *pEnabled)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_STORM_UNKNOWN_MCAST_REG, port, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicStormFilterUnknownMulticastMeter
-+ * Description:
-+ *      Set per-port unknown multicast storm filter meter
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      meter   - meter index (0~31)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicStormFilterUnknownMulticastMeter(rtk_uint32 port, rtk_uint32 meter)
-+{
-+    ret_t retVal;
-+
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if(meter > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_STORM_UNMC_METER_CTRL_REG(port), RTL8367C_STORM_UNMC_METER_CTRL_MASK(port), meter);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_STORM_UNMC_METER_CTRL4 + ((port - 8) >> 1), RTL8367C_STORM_UNMC_METER_CTRL_MASK(port), meter);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicStormFilterUnknownMulticastMeter
-+ * Description:
-+ *      Get per-port unknown multicast storm filter meter
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pMeter  - meter index (0~31)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicStormFilterUnknownMulticastMeter(rtk_uint32 port, rtk_uint32 *pMeter)
-+{
-+    ret_t retVal;
-+
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_STORM_UNMC_METER_CTRL_REG(port), RTL8367C_STORM_UNMC_METER_CTRL_MASK(port), pMeter);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_STORM_UNMC_METER_CTRL4 + ((port - 8) >> 1), RTL8367C_STORM_UNMC_METER_CTRL_MASK(port), pMeter);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicStormFilterUnknownUnicastEnable
-+ * Description:
-+ *      Set per-port unknown unicast storm filter enable/disable
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicStormFilterUnknownUnicastEnable(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_STORM_UNKNOWN_UCAST_REG, port, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicStormFilterUnknownUnicastEnable
-+ * Description:
-+ *      get per-port unknown unicast storm filter enable/disable
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pEnabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicStormFilterUnknownUnicastEnable(rtk_uint32 port, rtk_uint32 *pEnabled)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_STORM_UNKNOWN_UCAST_REG, port, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicStormFilterUnknownUnicastMeter
-+ * Description:
-+ *      Set per-port unknown unicast storm filter meter
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      meter   - meter index (0~31)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicStormFilterUnknownUnicastMeter(rtk_uint32 port, rtk_uint32 meter)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if(meter > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_STORM_UNDA_METER_CTRL_REG(port), RTL8367C_STORM_UNDA_METER_CTRL_MASK(port), meter);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicStormFilterUnknownUnicastMeter
-+ * Description:
-+ *      Get per-port unknown unicast storm filter meter
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pMeter  - meter index (0~31)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicStormFilterUnknownUnicastMeter(rtk_uint32 port, rtk_uint32 *pMeter)
-+{
-+    if(port >= RTL8367C_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_STORM_UNDA_METER_CTRL_REG(port), RTL8367C_STORM_UNDA_METER_CTRL_MASK(port), pMeter);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicStormFilterExtBroadcastMeter
-+ * Description:
-+ *      Set extension broadcast storm filter meter
-+ * Input:
-+ *      meter   - meter index (0~31)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicStormFilterExtBroadcastMeter(rtk_uint32 meter)
-+{
-+    if(meter > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_STORM_EXT_MTRIDX_CFG0, RTL8367C_BC_STORM_EXT_METERIDX_MASK, meter);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicStormFilterExtBroadcastMeter
-+ * Description:
-+ *      get extension broadcast storm filter meter
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pMeter  - meter index (0~31)
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_NULL_POINTER     - Invalid meter index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicStormFilterExtBroadcastMeter(rtk_uint32 *pMeter)
-+{
-+    if(NULL == pMeter)
-+        return RT_ERR_NULL_POINTER;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_STORM_EXT_MTRIDX_CFG0, RTL8367C_BC_STORM_EXT_METERIDX_MASK, pMeter);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicStormFilterExtMulticastMeter
-+ * Description:
-+ *      Set extension multicast storm filter meter
-+ * Input:
-+ *      meter   - meter index (0~31)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicStormFilterExtMulticastMeter(rtk_uint32 meter)
-+{
-+    if(meter > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_STORM_EXT_MTRIDX_CFG0, RTL8367C_MC_STORM_EXT_METERIDX_MASK, meter);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicStormFilterExtMulticastMeter
-+ * Description:
-+ *      get extension multicast storm filter meter
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pMeter  - meter index (0~31)
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_NULL_POINTER     - Invalid meter index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicStormFilterExtMulticastMeter(rtk_uint32 *pMeter)
-+{
-+    if(NULL == pMeter)
-+        return RT_ERR_NULL_POINTER;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_STORM_EXT_MTRIDX_CFG0, RTL8367C_MC_STORM_EXT_METERIDX_MASK, pMeter);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicStormFilterExtUnknownMulticastMeter
-+ * Description:
-+ *      Set extension unknown multicast storm filter meter
-+ * Input:
-+ *      meter   - meter index (0~31)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicStormFilterExtUnknownMulticastMeter(rtk_uint32 meter)
-+{
-+    if(meter > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_STORM_EXT_MTRIDX_CFG1, RTL8367C_UNMC_STORM_EXT_METERIDX_MASK, meter);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicStormFilterExtUnknownMulticastMeter
-+ * Description:
-+ *      get extension unknown multicast storm filter meter
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pMeter  - meter index (0~31)
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_NULL_POINTER     - Invalid meter index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicStormFilterExtUnknownMulticastMeter(rtk_uint32 *pMeter)
-+{
-+    if(NULL == pMeter)
-+        return RT_ERR_NULL_POINTER;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_STORM_EXT_MTRIDX_CFG1, RTL8367C_UNMC_STORM_EXT_METERIDX_MASK, pMeter);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicStormFilterExtUnknownUnicastMeter
-+ * Description:
-+ *      Set extension unknown unicast storm filter meter
-+ * Input:
-+ *      meter   - meter index (0~31)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicStormFilterExtUnknownUnicastMeter(rtk_uint32 meter)
-+{
-+    if(meter > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_STORM_EXT_MTRIDX_CFG1, RTL8367C_UNUC_STORM_EXT_METERIDX_MASK, meter);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicStormFilterExtUnknownUnicastMeter
-+ * Description:
-+ *      get extension unknown unicast storm filter meter
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pMeter  - meter index (0~31)
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_NULL_POINTER     - Invalid meter index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicStormFilterExtUnknownUnicastMeter(rtk_uint32 *pMeter)
-+{
-+    if(NULL == pMeter)
-+        return RT_ERR_NULL_POINTER;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_STORM_EXT_MTRIDX_CFG1, RTL8367C_UNUC_STORM_EXT_METERIDX_MASK, pMeter);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicStormFilterExtBroadcastEnable
-+ * Description:
-+ *      Set extension broadcast storm filter state
-+ * Input:
-+ *      enabled     - state
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicStormFilterExtBroadcastEnable(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_STORM_EXT_CFG, RTL8367C_STORM_BCAST_EXT_EN_OFFSET, enabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicStormFilterExtBroadcastEnable
-+ * Description:
-+ *      Get extension broadcast storm filter state
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnabled    - state
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_NULL_POINTER     - Null pointer
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicStormFilterExtBroadcastEnable(rtk_uint32 *pEnabled)
-+{
-+    if(NULL == pEnabled)
-+        return RT_ERR_NULL_POINTER;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_STORM_EXT_CFG, RTL8367C_STORM_BCAST_EXT_EN_OFFSET, pEnabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicStormFilterExtMulticastEnable
-+ * Description:
-+ *      Set extension multicast storm filter state
-+ * Input:
-+ *      enabled     - state
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicStormFilterExtMulticastEnable(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_STORM_EXT_CFG, RTL8367C_STORM_MCAST_EXT_EN_OFFSET, enabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicStormFilterExtMulticastEnable
-+ * Description:
-+ *      Get extension multicast storm filter state
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnabled    - state
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_NULL_POINTER     - Null pointer
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicStormFilterExtMulticastEnable(rtk_uint32 *pEnabled)
-+{
-+    if(NULL == pEnabled)
-+        return RT_ERR_NULL_POINTER;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_STORM_EXT_CFG, RTL8367C_STORM_MCAST_EXT_EN_OFFSET, pEnabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicStormFilterExtUnknownMulticastEnable
-+ * Description:
-+ *      Set extension unknown multicast storm filter state
-+ * Input:
-+ *      enabled     - state
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicStormFilterExtUnknownMulticastEnable(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_STORM_EXT_CFG, RTL8367C_STORM_UNKNOWN_MCAST_EXT_EN_OFFSET, enabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicStormFilterExtUnknownMulticastEnable
-+ * Description:
-+ *      Get extension unknown multicast storm filter state
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnabled    - state
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_NULL_POINTER     - Null pointer
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicStormFilterExtUnknownMulticastEnable(rtk_uint32 *pEnabled)
-+{
-+    if(NULL == pEnabled)
-+        return RT_ERR_NULL_POINTER;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_STORM_EXT_CFG, RTL8367C_STORM_UNKNOWN_MCAST_EXT_EN_OFFSET, pEnabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicStormFilterExtUnknownUnicastEnable
-+ * Description:
-+ *      Set extension unknown unicast storm filter state
-+ * Input:
-+ *      enabled     - state
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicStormFilterExtUnknownUnicastEnable(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_STORM_EXT_CFG, RTL8367C_STORM_UNKNOWN_UCAST_EXT_EN_OFFSET, enabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicStormFilterExtUnknownUnicastEnable
-+ * Description:
-+ *      Get extension unknown unicast storm filter state
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnabled    - state
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_NULL_POINTER     - Null pointer
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicStormFilterExtUnknownUnicastEnable(rtk_uint32 *pEnabled)
-+{
-+    if(NULL == pEnabled)
-+        return RT_ERR_NULL_POINTER;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_STORM_EXT_CFG, RTL8367C_STORM_UNKNOWN_UCAST_EXT_EN_OFFSET, pEnabled);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicStormFilterExtEnablePortMask
-+ * Description:
-+ *      Set extension storm filter port mask
-+ * Input:
-+ *      portmask    - port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicStormFilterExtEnablePortMask(rtk_uint32 portmask)
-+{
-+    ret_t retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_STORM_EXT_CFG, RTL8367C_STORM_EXT_EN_PORTMASK_MASK, portmask & 0x3FF);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_STORM_EXT_CFG, RTL8367C_STORM_EXT_EN_PORTMASK_EXT_MASK, (portmask >> 10)&1);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicStormFilterExtEnablePortMask
-+ * Description:
-+ *      Get extension storm filter port mask
-+ * Input:
-+ *      portmask    - port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_NULL_POINTER     - Null pointer
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicStormFilterExtEnablePortMask(rtk_uint32 *pPortmask)
-+{
-+    rtk_uint32 tmpPmsk;
-+    ret_t retVal;
-+
-+    if(NULL == pPortmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_STORM_EXT_CFG, RTL8367C_STORM_EXT_EN_PORTMASK_MASK, &tmpPmsk);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+    *pPortmask = tmpPmsk & 0x3ff;
-+
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_STORM_EXT_CFG, RTL8367C_STORM_EXT_EN_PORTMASK_EXT_MASK, &tmpPmsk);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+    *pPortmask |= (tmpPmsk & 1) << 10;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_svlan.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_svlan.c
-new file mode 100644
-index 0000000000..f19ceba5a9
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_svlan.c
-@@ -0,0 +1,1003 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : SVLAN related functions
-+ *
-+ */
-+#include <rtl8367c_asicdrv_svlan.h>
-+
-+#include <string.h>
-+
-+static void _rtl8367c_svlanConfStUser2Smi( rtl8367c_svlan_memconf_t *pUserSt, rtk_uint16 *pSmiSt)
-+{
-+    pSmiSt[0] |= (pUserSt->vs_member & 0x00FF);
-+    pSmiSt[0] |= (pUserSt->vs_untag & 0x00FF) << 8;
-+
-+    pSmiSt[1] |= (pUserSt->vs_fid_msti & 0x000F);
-+    pSmiSt[1] |= (pUserSt->vs_priority & 0x0007) << 4;
-+    pSmiSt[1] |= (pUserSt->vs_force_fid & 0x0001) << 7;
-+
-+    pSmiSt[2] |= (pUserSt->vs_svid & 0x0FFF);
-+    pSmiSt[2] |= (pUserSt->vs_efiden & 0x0001) << 12;
-+    pSmiSt[2] |= (pUserSt->vs_efid & 0x0007) << 13;
-+
-+    pSmiSt[3] |= ((pUserSt->vs_member & 0x0700) >> 8);
-+    pSmiSt[3] |= ((pUserSt->vs_untag & 0x0700) >> 8) << 3;
-+}
-+
-+static void _rtl8367c_svlanConfStSmi2User( rtl8367c_svlan_memconf_t *pUserSt, rtk_uint16 *pSmiSt)
-+{
-+
-+    pUserSt->vs_member = (pSmiSt[0] & 0x00FF) | ((pSmiSt[3] & 0x0007) << 8);
-+    pUserSt->vs_untag = ((pSmiSt[0] & 0xFF00) >> 8) | (((pSmiSt[3] & 0x0038) >> 3) << 8);
-+
-+    pUserSt->vs_fid_msti = (pSmiSt[1] & 0x000F);
-+    pUserSt->vs_priority = (pSmiSt[1] & 0x0070) >> 4;
-+    pUserSt->vs_force_fid = (pSmiSt[1] & 0x0080) >> 7;
-+
-+    pUserSt->vs_svid = (pSmiSt[2] & 0x0FFF);
-+    pUserSt->vs_efiden = (pSmiSt[2] & 0x1000) >> 12;
-+    pUserSt->vs_efid = (pSmiSt[2] & 0xE000) >> 13;
-+}
-+
-+static void _rtl8367c_svlanMc2sStUser2Smi(rtl8367c_svlan_mc2s_t *pUserSt, rtk_uint16 *pSmiSt)
-+{
-+    pSmiSt[0] |= (pUserSt->svidx & 0x003F);
-+    pSmiSt[0] |= (pUserSt->format & 0x0001) << 6;
-+    pSmiSt[0] |= (pUserSt->valid & 0x0001) << 7;
-+
-+    pSmiSt[1] = (rtk_uint16)(pUserSt->smask & 0x0000FFFF);
-+    pSmiSt[2] = (rtk_uint16)((pUserSt->smask & 0xFFFF0000) >> 16);
-+
-+    pSmiSt[3] = (rtk_uint16)(pUserSt->sdata & 0x0000FFFF);
-+    pSmiSt[4] = (rtk_uint16)((pUserSt->sdata & 0xFFFF0000) >> 16);
-+}
-+
-+static void _rtl8367c_svlanMc2sStSmi2User(rtl8367c_svlan_mc2s_t *pUserSt, rtk_uint16 *pSmiSt)
-+{
-+    pUserSt->svidx = (pSmiSt[0] & 0x003F);
-+    pUserSt->format = (pSmiSt[0] & 0x0040) >> 6;
-+    pUserSt->valid = (pSmiSt[0] & 0x0080) >> 7;
-+
-+    pUserSt->smask = pSmiSt[1] | (pSmiSt[2] << 16);
-+    pUserSt->sdata = pSmiSt[3] | (pSmiSt[4] << 16);
-+}
-+
-+static void _rtl8367c_svlanSp2cStUser2Smi(rtl8367c_svlan_s2c_t *pUserSt, rtk_uint16 *pSmiSt)
-+{
-+    pSmiSt[0] |= (pUserSt->dstport & 0x0007);
-+    pSmiSt[0] |= (pUserSt->svidx & 0x003F) << 3;
-+    pSmiSt[0] |= ((pUserSt->dstport & 0x0008) >> 3) << 9;
-+
-+    pSmiSt[1] |= (pUserSt->vid & 0x0FFF);
-+    pSmiSt[1] |= (pUserSt->valid & 0x0001) << 12;
-+}
-+
-+static void _rtl8367c_svlanSp2cStSmi2User(rtl8367c_svlan_s2c_t *pUserSt, rtk_uint16 *pSmiSt)
-+{
-+    pUserSt->dstport = (((pSmiSt[0] & 0x0200) >> 9) << 3) | (pSmiSt[0] & 0x0007);
-+    pUserSt->svidx   = (pSmiSt[0] & 0x01F8) >> 3;
-+    pUserSt->vid     = (pSmiSt[1] & 0x0FFF);
-+    pUserSt->valid   = (pSmiSt[1] & 0x1000) >> 12;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicSvlanUplinkPortMask
-+ * Description:
-+ *      Set uplink ports mask
-+ * Input:
-+ *      portMask    - Uplink port mask setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicSvlanUplinkPortMask(rtk_uint32 portMask)
-+{
-+    return rtl8367c_setAsicReg(RTL8367C_REG_SVLAN_UPLINK_PORTMASK, portMask);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicSvlanUplinkPortMask
-+ * Description:
-+ *      Get uplink ports mask
-+ * Input:
-+ *      pPortmask   - Uplink port mask setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSvlanUplinkPortMask(rtk_uint32* pPortmask)
-+{
-+    return rtl8367c_getAsicReg(RTL8367C_REG_SVLAN_UPLINK_PORTMASK, pPortmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicSvlanTpid
-+ * Description:
-+ *      Set accepted S-VLAN ether type. The default ether type of S-VLAN is 0x88a8
-+ * Input:
-+ *      protocolType    - Ether type of S-tag frame parsing in uplink ports
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      Ether type of S-tag in 802.1ad is 0x88a8 and there are existed ether type 0x9100 and 0x9200
-+ *      for Q-in-Q SLAN design. User can set mathced ether type as service provider supported protocol
-+ */
-+ret_t rtl8367c_setAsicSvlanTpid(rtk_uint32 protocolType)
-+{
-+    return rtl8367c_setAsicReg(RTL8367C_REG_VS_TPID, protocolType);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicReg
-+ * Description:
-+ *      Get accepted S-VLAN ether type. The default ether type of S-VLAN is 0x88a8
-+ * Input:
-+ *      pProtocolType   - Ether type of S-tag frame parsing in uplink ports
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSvlanTpid(rtk_uint32* pProtocolType)
-+{
-+    return rtl8367c_getAsicReg(RTL8367C_REG_VS_TPID, pProtocolType);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicSvlanPrioritySel
-+ * Description:
-+ *      Set SVLAN priority field setting
-+ * Input:
-+ *      priSel  - S-priority assignment method, 0:internal priority 1:C-tag priority 2:using Svlan member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_INPUT    - Invalid input parameter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicSvlanPrioritySel(rtk_uint32 priSel)
-+{
-+    if(priSel >= SPRISEL_END)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_SVLAN_CFG, RTL8367C_VS_SPRISEL_MASK, priSel);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicSvlanPrioritySel
-+ * Description:
-+ *      Get SVLAN priority field setting
-+ * Input:
-+ *      pPriSel     - S-priority assignment method, 0:internal priority 1:C-tag priority 2:using Svlan member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSvlanPrioritySel(rtk_uint32* pPriSel)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_SVLAN_CFG, RTL8367C_VS_SPRISEL_MASK, pPriSel);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicSvlanTrapPriority
-+ * Description:
-+ *      Set trap to CPU priority assignment
-+ * Input:
-+ *      priority    - Priority assignment
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicSvlanTrapPriority(rtk_uint32 priority)
-+{
-+    if(priority > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_QOS_TRAP_PRIORITY0, RTL8367C_SVLAN_PRIOIRTY_MASK, priority);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicSvlanTrapPriority
-+ * Description:
-+ *      Get trap to CPU priority assignment
-+ * Input:
-+ *      pPriority   - Priority assignment
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSvlanTrapPriority(rtk_uint32* pPriority)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_QOS_TRAP_PRIORITY0, RTL8367C_SVLAN_PRIOIRTY_MASK, pPriority);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicSvlanDefaultVlan
-+ * Description:
-+ *      Set default egress SVLAN
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      index   - index SVLAN member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number
-+ *      RT_ERR_SVLAN_ENTRY_INDEX    - Invalid SVLAN index parameter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicSvlanDefaultVlan(rtk_uint32 port, rtk_uint32 index)
-+{
-+    ret_t retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(index > RTL8367C_SVIDXMAX)
-+        return RT_ERR_SVLAN_ENTRY_INDEX;
-+
-+    if(port < 8){
-+        if(port & 1)
-+            retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_SVLAN_PORTBASED_SVIDX_CTRL0 + (port >> 1), RTL8367C_VS_PORT1_SVIDX_MASK,index);
-+        else
-+            retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_SVLAN_PORTBASED_SVIDX_CTRL0 + (port >> 1), RTL8367C_VS_PORT0_SVIDX_MASK,index);
-+    }else{
-+        switch(port){
-+            case 8:
-+                retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_SVLAN_PORTBASED_SVIDX_CTRL4, RTL8367C_VS_PORT8_SVIDX_MASK,index);
-+                break;
-+
-+            case 9:
-+                retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_SVLAN_PORTBASED_SVIDX_CTRL4, RTL8367C_VS_PORT9_SVIDX_MASK,index);
-+                break;
-+
-+            case 10:
-+                retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_SVLAN_PORTBASED_SVIDX_CTRL5, RTL8367C_SVLAN_PORTBASED_SVIDX_CTRL5_MASK,index);
-+                break;
-+        }
-+    }
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicSvlanDefaultVlan
-+ * Description:
-+ *      Get default egress SVLAN
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pIndex  - index SVLAN member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSvlanDefaultVlan(rtk_uint32 port, rtk_uint32* pIndex)
-+{
-+    ret_t retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8){
-+        if(port & 1)
-+            retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_SVLAN_PORTBASED_SVIDX_CTRL0 + (port >> 1), RTL8367C_VS_PORT1_SVIDX_MASK,pIndex);
-+        else
-+            retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_SVLAN_PORTBASED_SVIDX_CTRL0 + (port >> 1), RTL8367C_VS_PORT0_SVIDX_MASK,pIndex);
-+    }else{
-+        switch(port){
-+            case 8:
-+                retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_SVLAN_PORTBASED_SVIDX_CTRL4, RTL8367C_VS_PORT8_SVIDX_MASK,pIndex);
-+                break;
-+
-+            case 9:
-+                retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_SVLAN_PORTBASED_SVIDX_CTRL4, RTL8367C_VS_PORT9_SVIDX_MASK,pIndex);
-+                break;
-+
-+            case 10:
-+                retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_SVLAN_PORTBASED_SVIDX_CTRL5, RTL8367C_SVLAN_PORTBASED_SVIDX_CTRL5_MASK,pIndex);
-+                break;
-+        }
-+    }
-+
-+    return retVal;
-+
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicSvlanIngressUntag
-+ * Description:
-+ *      Set action received un-Stag frame from unplink port
-+ * Input:
-+ *      mode        - 0:Drop 1:Trap 2:Assign SVLAN
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicSvlanIngressUntag(rtk_uint32 mode)
-+{
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_SVLAN_CFG, RTL8367C_VS_UNTAG_MASK, mode);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicSvlanIngressUntag
-+ * Description:
-+ *      Get action received un-Stag frame from unplink port
-+ * Input:
-+ *      pMode       - 0:Drop 1:Trap 2:Assign SVLAN
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSvlanIngressUntag(rtk_uint32* pMode)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_SVLAN_CFG, RTL8367C_VS_UNTAG_MASK, pMode);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicSvlanIngressUnmatch
-+ * Description:
-+ *      Set action received unmatched Stag frame from unplink port
-+ * Input:
-+ *      mode        - 0:Drop 1:Trap 2:Assign SVLAN
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicSvlanIngressUnmatch(rtk_uint32 mode)
-+{
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_SVLAN_CFG, RTL8367C_VS_UNMAT_MASK, mode);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicSvlanIngressUnmatch
-+ * Description:
-+ *      Get action received unmatched Stag frame from unplink port
-+ * Input:
-+ *      pMode       - 0:Drop 1:Trap 2:Assign SVLAN
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSvlanIngressUnmatch(rtk_uint32* pMode)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_SVLAN_CFG, RTL8367C_VS_UNMAT_MASK, pMode);
-+
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicSvlanEgressUnassign
-+ * Description:
-+ *      Set unplink stream without egress SVID action
-+ * Input:
-+ *      enabled     - 1:Trap egress unassigned frames to CPU, 0: Use SVLAN setup in VS_CPSVIDX as egress SVID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicSvlanEgressUnassign(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_SVLAN_CFG, RTL8367C_VS_UIFSEG_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicSvlanEgressUnassign
-+ * Description:
-+ *      Get unplink stream without egress SVID action
-+ * Input:
-+ *      pEnabled    - 1:Trap egress unassigned frames to CPU, 0: Use SVLAN setup in VS_CPSVIDX as egress SVID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSvlanEgressUnassign(rtk_uint32* pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_SVLAN_CFG, RTL8367C_VS_UIFSEG_OFFSET, pEnabled);
-+}
-+
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicSvlanMemberConfiguration
-+ * Description:
-+ *      Set system 64 S-tag content
-+ * Input:
-+ *      index           - index of 64 s-tag configuration
-+ *      pSvlanMemCfg    - SVLAN member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_SVLAN_ENTRY_INDEX    - Invalid SVLAN index parameter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicSvlanMemberConfiguration(rtk_uint32 index, rtl8367c_svlan_memconf_t* pSvlanMemCfg)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regAddr, regData;
-+    rtk_uint16 *accessPtr;
-+    rtk_uint32 i;
-+    rtk_uint16 smiSvlanMemConf[RTL8367C_SVLAN_MEMCONF_LEN];
-+
-+    if(index > RTL8367C_SVIDXMAX)
-+        return RT_ERR_SVLAN_ENTRY_INDEX;
-+
-+    memset(smiSvlanMemConf, 0x00, sizeof(rtk_uint16) * RTL8367C_SVLAN_MEMCONF_LEN);
-+    _rtl8367c_svlanConfStUser2Smi(pSvlanMemCfg, smiSvlanMemConf);
-+
-+    accessPtr = smiSvlanMemConf;
-+
-+    regData = *accessPtr;
-+    for(i = 0; i < 3; i++)
-+    {
-+        retVal = rtl8367c_setAsicReg(RTL8367C_SVLAN_MEMBERCFG_BASE_REG(index) + i, regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        accessPtr ++;
-+        regData = *accessPtr;
-+    }
-+
-+    if(index < 63)
-+        regAddr = RTL8367C_REG_SVLAN_MEMBERCFG0_CTRL4+index;
-+    else if(index == 63)
-+        regAddr = RTL8367C_REG_SVLAN_MEMBERCFG63_CTRL4;
-+
-+    retVal = rtl8367c_setAsicReg(regAddr, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicSvlanMemberConfiguration
-+ * Description:
-+ *      Get system 64 S-tag content
-+ * Input:
-+ *      index           - index of 64 s-tag configuration
-+ *      pSvlanMemCfg    - SVLAN member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_SVLAN_ENTRY_INDEX    - Invalid SVLAN index parameter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSvlanMemberConfiguration(rtk_uint32 index,rtl8367c_svlan_memconf_t* pSvlanMemCfg)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regAddr,regData;
-+    rtk_uint16 *accessPtr;
-+    rtk_uint32 i;
-+    rtk_uint16 smiSvlanMemConf[RTL8367C_SVLAN_MEMCONF_LEN];
-+
-+    if(index > RTL8367C_SVIDXMAX)
-+        return RT_ERR_SVLAN_ENTRY_INDEX;
-+
-+    memset(smiSvlanMemConf, 0x00, sizeof(rtk_uint16) * RTL8367C_SVLAN_MEMCONF_LEN);
-+
-+    accessPtr = smiSvlanMemConf;
-+
-+    for(i = 0; i < 3; i++)
-+    {
-+        retVal = rtl8367c_getAsicReg(RTL8367C_SVLAN_MEMBERCFG_BASE_REG(index) + i, &regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        *accessPtr = regData;
-+
-+        accessPtr ++;
-+    }
-+
-+    if(index < 63)
-+        regAddr = RTL8367C_REG_SVLAN_MEMBERCFG0_CTRL4+index;
-+    else if(index == 63)
-+        regAddr = RTL8367C_REG_SVLAN_MEMBERCFG63_CTRL4;
-+
-+    retVal = rtl8367c_getAsicReg(regAddr, &regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    *accessPtr = regData;
-+
-+    _rtl8367c_svlanConfStSmi2User(pSvlanMemCfg, smiSvlanMemConf);
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicSvlanC2SConf
-+ * Description:
-+ *      Set SVLAN C2S table
-+ * Input:
-+ *      index   - index of 128 Svlan C2S configuration
-+ *      evid    - Enhanced VID
-+ *      portmask    - available c2s port mask
-+ *      svidx   - index of 64 Svlan member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENTRY_INDEX  - Invalid entry index
-+ * Note:
-+ *      ASIC will check upstream's VID and assign related SVID to mathed packet
-+ */
-+ret_t rtl8367c_setAsicSvlanC2SConf(rtk_uint32 index, rtk_uint32 evid, rtk_uint32 portmask, rtk_uint32 svidx)
-+{
-+    ret_t retVal;
-+
-+    if(index > RTL8367C_C2SIDXMAX)
-+        return RT_ERR_ENTRY_INDEX;
-+
-+    retVal = rtl8367c_setAsicReg(RTL8367C_SVLAN_C2SCFG_BASE_REG(index), svidx);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicReg(RTL8367C_SVLAN_C2SCFG_BASE_REG(index) + 1, portmask);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_setAsicReg(RTL8367C_SVLAN_C2SCFG_BASE_REG(index) + 2, evid);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicSvlanC2SConf
-+ * Description:
-+ *      Get SVLAN C2S table
-+ * Input:
-+ *      index   - index of 128 Svlan C2S configuration
-+ *      pEvid   - Enhanced VID
-+ *      pPortmask   - available c2s port mask
-+ *      pSvidx  - index of 64 Svlan member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENTRY_INDEX  - Invalid entry index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSvlanC2SConf(rtk_uint32 index, rtk_uint32* pEvid, rtk_uint32* pPortmask, rtk_uint32* pSvidx)
-+{
-+    ret_t retVal;
-+
-+    if(index > RTL8367C_C2SIDXMAX)
-+        return RT_ERR_ENTRY_INDEX;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_SVLAN_C2SCFG_BASE_REG(index), pSvidx);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_SVLAN_C2SCFG_BASE_REG(index) + 1, pPortmask);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    retVal = rtl8367c_getAsicReg(RTL8367C_SVLAN_C2SCFG_BASE_REG(index) + 2, pEvid);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicSvlanMC2SConf
-+ * Description:
-+ *      Set system MC2S content
-+ * Input:
-+ *      index           - index of 32 SVLAN 32 MC2S configuration
-+ *      pSvlanMc2sCfg   - SVLAN Multicast to SVLAN member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENTRY_INDEX  - Invalid entry index
-+ * Note:
-+ *      If upstream packet is L2 multicast or IPv4 multicast packet and DMAC/DIP is matched MC2S
-+ *      configuration, ASIC will assign egress SVID to the packet
-+ */
-+ret_t rtl8367c_setAsicSvlanMC2SConf(rtk_uint32 index,rtl8367c_svlan_mc2s_t* pSvlanMc2sCfg)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint16 *accessPtr;
-+    rtk_uint32 i;
-+    rtk_uint16 smiSvlanMC2S[RTL8367C_SVLAN_MC2S_LEN];
-+
-+    if(index > RTL8367C_MC2SIDXMAX)
-+        return RT_ERR_ENTRY_INDEX;
-+
-+    memset(smiSvlanMC2S, 0x00, sizeof(rtk_uint16) * RTL8367C_SVLAN_MC2S_LEN);
-+    _rtl8367c_svlanMc2sStUser2Smi(pSvlanMc2sCfg, smiSvlanMC2S);
-+
-+    accessPtr = smiSvlanMC2S;
-+
-+    regData = *accessPtr;
-+    for(i = 0; i < 5; i++)
-+    {
-+        retVal = rtl8367c_setAsicReg(RTL8367C_SVLAN_MCAST2S_ENTRY_BASE_REG(index) + i, regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        accessPtr ++;
-+        regData = *accessPtr;
-+    }
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicSvlanMC2SConf
-+ * Description:
-+ *      Get system MC2S content
-+ * Input:
-+ *      index           - index of 32 SVLAN 32 MC2S configuration
-+ *      pSvlanMc2sCfg   - SVLAN Multicast to SVLAN member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENTRY_INDEX  - Invalid entry index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSvlanMC2SConf(rtk_uint32 index, rtl8367c_svlan_mc2s_t* pSvlanMc2sCfg)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint16 *accessPtr;
-+    rtk_uint32 i;
-+    rtk_uint16 smiSvlanMC2S[RTL8367C_SVLAN_MC2S_LEN];
-+
-+    if(index > RTL8367C_MC2SIDXMAX)
-+        return RT_ERR_ENTRY_INDEX;
-+
-+    memset(smiSvlanMC2S, 0x00, sizeof(rtk_uint16) * RTL8367C_SVLAN_MC2S_LEN);
-+
-+    accessPtr = smiSvlanMC2S;
-+
-+    for(i = 0; i < 5; i++)
-+    {
-+        retVal = rtl8367c_getAsicReg(RTL8367C_SVLAN_MCAST2S_ENTRY_BASE_REG(index) + i, &regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        *accessPtr = regData;
-+        accessPtr ++;
-+    }
-+
-+
-+    _rtl8367c_svlanMc2sStSmi2User(pSvlanMc2sCfg, smiSvlanMC2S);
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicSvlanSP2CConf
-+ * Description:
-+ *      Set system 128 SP2C content
-+ * Input:
-+ *      index           - index of 128 SVLAN & Port to CVLAN configuration
-+ *      pSvlanSp2cCfg   - SVLAN & Port to CVLAN configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENTRY_INDEX  - Invalid entry index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicSvlanSP2CConf(rtk_uint32 index, rtl8367c_svlan_s2c_t* pSvlanSp2cCfg)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint16 *accessPtr;
-+    rtk_uint32 i;
-+    rtk_uint16 smiSvlanSP2C[RTL8367C_SVLAN_SP2C_LEN];
-+
-+    if(index > RTL8367C_SP2CMAX)
-+        return RT_ERR_ENTRY_INDEX;
-+
-+    memset(smiSvlanSP2C, 0x00, sizeof(rtk_uint16) * RTL8367C_SVLAN_SP2C_LEN);
-+    _rtl8367c_svlanSp2cStUser2Smi(pSvlanSp2cCfg,smiSvlanSP2C);
-+
-+    accessPtr = smiSvlanSP2C;
-+
-+    regData = *accessPtr;
-+    for(i = 0; i < 2; i++)
-+    {
-+        retVal = rtl8367c_setAsicReg(RTL8367C_SVLAN_S2C_ENTRY_BASE_REG(index) + i, regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        accessPtr ++;
-+        regData = *accessPtr;
-+    }
-+
-+    return retVal;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicSvlanSP2CConf
-+ * Description:
-+ *      Get system 128 SP2C content
-+ * Input:
-+ *      index           - index of 128 SVLAN & Port to CVLAN configuration
-+ *      pSvlanSp2cCfg   - SVLAN & Port to CVLAN configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENTRY_INDEX  - Invalid entry index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSvlanSP2CConf(rtk_uint32 index,rtl8367c_svlan_s2c_t* pSvlanSp2cCfg)
-+{
-+    ret_t retVal;
-+    rtk_uint32 regData;
-+    rtk_uint16 *accessPtr;
-+    rtk_uint32 i;
-+    rtk_uint16 smiSvlanSP2C[RTL8367C_SVLAN_SP2C_LEN];
-+
-+    if(index > RTL8367C_SP2CMAX)
-+        return RT_ERR_ENTRY_INDEX;
-+
-+    memset(smiSvlanSP2C, 0x00, sizeof(rtk_uint16) * RTL8367C_SVLAN_SP2C_LEN);
-+
-+    accessPtr = smiSvlanSP2C;
-+
-+    for(i = 0; i < 2; i++)
-+    {
-+        retVal = rtl8367c_getAsicReg(RTL8367C_SVLAN_S2C_ENTRY_BASE_REG(index) + i, &regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        *accessPtr = regData;
-+
-+        accessPtr ++;
-+    }
-+
-+    _rtl8367c_svlanSp2cStSmi2User(pSvlanSp2cCfg, smiSvlanSP2C);
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicSvlanDmacCvidSel
-+ * Description:
-+ *      Set downstream CVID decision by DMAC
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      enabled     - 0:disabled, 1:enabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicSvlanDmacCvidSel(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+        return rtl8367c_setAsicRegBit(RTL8367C_REG_SVLAN_CFG, RTL8367C_VS_PORT0_DMACVIDSEL_OFFSET + port, enabled);
-+    else
-+        return rtl8367c_setAsicRegBit(RTL8367C_REG_SVLAN_CFG_EXT, RTL8367C_VS_PORT8_DMACVIDSEL_OFFSET + (port-8), enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicSvlanDmacCvidSel
-+ * Description:
-+ *      Get downstream CVID decision by DMAC
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      pEnabled    - 0:disabled, 1:enabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSvlanDmacCvidSel(rtk_uint32 port, rtk_uint32* pEnabled)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+        return rtl8367c_getAsicRegBit(RTL8367C_REG_SVLAN_CFG, RTL8367C_VS_PORT0_DMACVIDSEL_OFFSET + port, pEnabled);
-+    else
-+        return rtl8367c_getAsicRegBit(RTL8367C_REG_SVLAN_CFG_EXT, RTL8367C_VS_PORT8_DMACVIDSEL_OFFSET + (port-8), pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicSvlanUntagVlan
-+ * Description:
-+ *      Set default ingress untag SVLAN
-+ * Input:
-+ *      index   - index SVLAN member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_SVLAN_ENTRY_INDEX    - Invalid SVLAN index parameter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicSvlanUntagVlan(rtk_uint32 index)
-+{
-+    if(index > RTL8367C_SVIDXMAX)
-+        return RT_ERR_SVLAN_ENTRY_INDEX;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_SVLAN_UNTAG_UNMAT_CFG, RTL8367C_VS_UNTAG_SVIDX_MASK, index);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicSvlanUntagVlan
-+ * Description:
-+ *      Get default ingress untag SVLAN
-+ * Input:
-+ *      pIndex  - index SVLAN member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSvlanUntagVlan(rtk_uint32* pIndex)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_SVLAN_UNTAG_UNMAT_CFG, RTL8367C_VS_UNTAG_SVIDX_MASK, pIndex);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicSvlanUnmatchVlan
-+ * Description:
-+ *      Set default ingress unmatch SVLAN
-+ * Input:
-+ *      index   - index SVLAN member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_SVLAN_ENTRY_INDEX    - Invalid SVLAN index parameter
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicSvlanUnmatchVlan(rtk_uint32 index)
-+{
-+    if(index > RTL8367C_SVIDXMAX)
-+        return RT_ERR_SVLAN_ENTRY_INDEX;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_SVLAN_UNTAG_UNMAT_CFG, RTL8367C_VS_UNMAT_SVIDX_MASK, index);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicSvlanUnmatchVlan
-+ * Description:
-+ *      Get default ingress unmatch SVLAN
-+ * Input:
-+ *      pIndex  - index SVLAN member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSvlanUnmatchVlan(rtk_uint32* pIndex)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_SVLAN_UNTAG_UNMAT_CFG, RTL8367C_VS_UNMAT_SVIDX_MASK, pIndex);
-+}
-+
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicSvlanLookupType
-+ * Description:
-+ *      Set svlan lookup table selection
-+ * Input:
-+ *      type    - lookup type
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicSvlanLookupType(rtk_uint32 type)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_SVLAN_LOOKUP_TYPE, RTL8367C_SVLAN_LOOKUP_TYPE_OFFSET, type);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicSvlanLookupType
-+ * Description:
-+ *      Get svlan lookup table selection
-+ * Input:
-+ *      pType   - lookup type
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSvlanLookupType(rtk_uint32* pType)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_SVLAN_LOOKUP_TYPE, RTL8367C_SVLAN_LOOKUP_TYPE_OFFSET, pType);
-+}
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_trunking.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_trunking.c
-new file mode 100644
-index 0000000000..26d4c29b83
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_trunking.c
-@@ -0,0 +1,356 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Port trunking related functions
-+ *
-+ */
-+
-+#include <rtl8367c_asicdrv_trunking.h>
-+/* Function Name:
-+ *      rtl8367c_setAsicTrunkingMode
-+ * Description:
-+ *      Set port trunking mode
-+ * Input:
-+ *      mode    - 1:dumb 0:user defined
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicTrunkingMode(rtk_uint32 mode)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_PORT_TRUNK_CTRL, RTL8367C_PORT_TRUNK_DUMB_OFFSET, mode);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicTrunkingMode
-+ * Description:
-+ *      Get port trunking mode
-+ * Input:
-+ *      pMode   - 1:dumb 0:user defined
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicTrunkingMode(rtk_uint32* pMode)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_PORT_TRUNK_CTRL, RTL8367C_PORT_TRUNK_DUMB_OFFSET, pMode);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicTrunkingFc
-+ * Description:
-+ *      Set port trunking flow control
-+ * Input:
-+ *      group       - Trunk Group ID
-+ *      enabled     - 0:disable, 1:enable
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicTrunkingFc(rtk_uint32 group, rtk_uint32 enabled)
-+{
-+    ret_t       retVal;
-+
-+    if(group > RTL8367C_MAX_TRUNK_GID)
-+        return RT_ERR_LA_TRUNK_ID;
-+
-+    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_PORT_TRUNK_DROP_CTRL, RTL8367C_PORT_TRUNK_DROP_CTRL_OFFSET, ENABLED)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_PORT_TRUNK_FLOWCTRL, (RTL8367C_EN_FLOWCTRL_TG0_OFFSET + group), enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicTrunkingFc
-+ * Description:
-+ *      Get port trunking flow control
-+ * Input:
-+ *      group       - Trunk Group ID
-+ *      pEnabled    - 0:disable, 1:enable
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicTrunkingFc(rtk_uint32 group, rtk_uint32* pEnabled)
-+{
-+    if(group > RTL8367C_MAX_TRUNK_GID)
-+        return RT_ERR_LA_TRUNK_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_PORT_TRUNK_FLOWCTRL, (RTL8367C_EN_FLOWCTRL_TG0_OFFSET + group), pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicTrunkingGroup
-+ * Description:
-+ *      Set trunking group available port mask
-+ * Input:
-+ *      group       - Trunk Group ID
-+ *      portmask    - Logic trunking enable port mask, max 4 ports
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicTrunkingGroup(rtk_uint32 group, rtk_uint32 portmask)
-+{
-+    if(group > RTL8367C_MAX_TRUNK_GID)
-+        return RT_ERR_LA_TRUNK_ID;
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_PORT_TRUNK_GROUP_MASK, RTL8367C_PORT_TRUNK_GROUP0_MASK_MASK << (group * 4), portmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicTrunkingGroup
-+ * Description:
-+ *      Get trunking group available port mask
-+ * Input:
-+ *      group       - Trunk Group ID
-+ * Output:
-+ *      pPortmask   - Logic trunking enable port mask, max 4 ports
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicTrunkingGroup(rtk_uint32 group, rtk_uint32* pPortmask)
-+{
-+    if(group > RTL8367C_MAX_TRUNK_GID)
-+        return RT_ERR_LA_TRUNK_ID;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_PORT_TRUNK_GROUP_MASK, RTL8367C_PORT_TRUNK_GROUP0_MASK_MASK << (group * 4), pPortmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicTrunkingFlood
-+ * Description:
-+ *      Set port trunking flood function
-+ * Input:
-+ *      enabled     - Port trunking flooding function 0:disable 1:enable
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicTrunkingFlood(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_PORT_TRUNK_CTRL, RTL8367C_PORT_TRUNK_FLOOD_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicTrunkingFlood
-+ * Description:
-+ *      Get port trunking flood function
-+ * Input:
-+ *      pEnabled    - Port trunking flooding function 0:disable 1:enable
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicTrunkingFlood(rtk_uint32* pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_PORT_TRUNK_CTRL, RTL8367C_PORT_TRUNK_FLOOD_OFFSET, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicTrunkingHashSelect
-+ * Description:
-+ *      Set port trunking hash select sources
-+ * Input:
-+ *      hashsel     - hash sources mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      7 bits mask for link aggregation group0 hash parameter selection {DIP, SIP, DMAC, SMAC, SPA}
-+ *      0b0000001: SPA
-+ *      0b0000010: SMAC
-+ *      0b0000100: DMAC
-+ *      0b0001000: SIP
-+ *      0b0010000: DIP
-+ *      0b0100000: TCP/UDP Source Port
-+ *      0b1000000: TCP/UDP Destination Port
-+ */
-+ret_t rtl8367c_setAsicTrunkingHashSelect(rtk_uint32 hashsel)
-+{
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_PORT_TRUNK_CTRL, RTL8367C_PORT_TRUNK_HASH_MASK, hashsel);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicTrunkingHashSelect
-+ * Description:
-+ *      Get port trunking hash select sources
-+ * Input:
-+ *      pHashsel    - hash sources mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicTrunkingHashSelect(rtk_uint32* pHashsel)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_PORT_TRUNK_CTRL, RTL8367C_PORT_TRUNK_HASH_MASK, pHashsel);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicQeueuEmptyStatus
-+ * Description:
-+ *      Get current output queue if empty status
-+ * Input:
-+ *      portmask    - queue empty port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicQeueuEmptyStatus(rtk_uint32* portmask)
-+{
-+    return rtl8367c_getAsicReg(RTL8367C_REG_PORT_QEMPTY, portmask);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicTrunkingHashTable
-+ * Description:
-+ *      Set port trunking hash value mapping table
-+ * Input:
-+ *      hashval     - hashing value 0-15
-+ *      portId      - trunking port id 0-3
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_OUT_OF_RANGE - Invalid hashing value (0-15)
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicTrunkingHashTable(rtk_uint32 hashval, rtk_uint32 portId)
-+{
-+    if(hashval > RTL8367C_TRUNKING_HASHVALUE_MAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(portId >= RTL8367C_TRUNKING_PORTNO)
-+        return RT_ERR_PORT_ID;
-+
-+    if(hashval >= 8)
-+        return rtl8367c_setAsicRegBits(RTL8367C_REG_PORT_TRUNK_HASH_MAPPING_CTRL1, RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH8_MASK<<((hashval-8)*2), portId);
-+    else
-+        return rtl8367c_setAsicRegBits(RTL8367C_REG_PORT_TRUNK_HASH_MAPPING_CTRL0, RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH0_MASK<<(hashval*2), portId);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicTrunkingHashTable
-+ * Description:
-+ *      Get port trunking hash value mapping table
-+ * Input:
-+ *      hashval     - hashing value 0-15
-+ *      pPortId         - trunking port id 0-3
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - Invalid hashing value (0-15)
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicTrunkingHashTable(rtk_uint32 hashval, rtk_uint32* pPortId)
-+{
-+    if(hashval > RTL8367C_TRUNKING_HASHVALUE_MAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(hashval >= 8)
-+        return rtl8367c_getAsicRegBits(RTL8367C_REG_PORT_TRUNK_HASH_MAPPING_CTRL1, RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL1_HASH8_MASK<<((hashval-8)*2), pPortId);
-+    else
-+        return rtl8367c_getAsicRegBits(RTL8367C_REG_PORT_TRUNK_HASH_MAPPING_CTRL0, RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL0_HASH0_MASK<<(hashval*2), pPortId);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicTrunkingHashTable1
-+ * Description:
-+ *      Set port trunking hash value mapping table
-+ * Input:
-+ *      hashval     - hashing value 0-15
-+ *      portId      - trunking port id 0-3
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_OUT_OF_RANGE - Invalid hashing value (0-15)
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicTrunkingHashTable1(rtk_uint32 hashval, rtk_uint32 portId)
-+{
-+    if(hashval > RTL8367C_TRUNKING_HASHVALUE_MAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(portId >= RTL8367C_TRUNKING1_PORTN0)
-+        return RT_ERR_PORT_ID;
-+
-+    if(hashval >= 8)
-+        return rtl8367c_setAsicRegBits(RTL8367C_REG_PORT_TRUNK_HASH_MAPPING_CTRL3, RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH8_MASK<<((hashval-8)*2), portId);
-+    else
-+        return rtl8367c_setAsicRegBits(RTL8367C_REG_PORT_TRUNK_HASH_MAPPING_CTRL2, RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH0_MASK<<(hashval*2), portId);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicTrunkingHashTable1
-+ * Description:
-+ *      Get port trunking hash value mapping table
-+ * Input:
-+ *      hashval     - hashing value 0-15
-+ *      pPortId         - trunking port id 0-3
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_OUT_OF_RANGE - Invalid hashing value (0-15)
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicTrunkingHashTable1(rtk_uint32 hashval, rtk_uint32* pPortId)
-+{
-+    if(hashval > RTL8367C_TRUNKING_HASHVALUE_MAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(hashval >= 8)
-+        return rtl8367c_getAsicRegBits(RTL8367C_REG_PORT_TRUNK_HASH_MAPPING_CTRL3, RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL3_HASH8_MASK<<((hashval-8)*2), pPortId);
-+    else
-+        return rtl8367c_getAsicRegBits(RTL8367C_REG_PORT_TRUNK_HASH_MAPPING_CTRL2, RTL8367C_PORT_TRUNK_HASH_MAPPING_CTRL2_HASH0_MASK<<(hashval*2), pPortId);
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_unknownMulticast.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_unknownMulticast.c
-new file mode 100644
-index 0000000000..fcebd1b7f7
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_unknownMulticast.c
-@@ -0,0 +1,238 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : Unkown multicast related functions
-+ *
-+ */
-+
-+#include <rtl8367c_asicdrv_unknownMulticast.h>
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicUnknownL2MulticastBehavior
-+ * Description:
-+ *      Set behavior of L2 multicast
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      behave  - 0: flooding, 1: drop, 2: trap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_NOT_ALLOWED  - Invalid operation
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicUnknownL2MulticastBehavior(rtk_uint32 port, rtk_uint32 behave)
-+{
-+    ret_t retVal;
-+
-+    if(port >  RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(behave >= L2_UNKOWN_MULTICAST_END)
-+        return RT_ERR_NOT_ALLOWED;
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_UNKNOWN_L2_MULTICAST_REG(port), RTL8367C_UNKNOWN_L2_MULTICAST_MASK(port), behave);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_UNKNOWN_L2_MULTICAST_CTRL1, 3 << ((port - 8) << 1), behave);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicUnknownL2MulticastBehavior
-+ * Description:
-+ *      Get behavior of L2 multicast
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pBehave     - 0: flooding, 1: drop, 2: trap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicUnknownL2MulticastBehavior(rtk_uint32 port, rtk_uint32 *pBehave)
-+{
-+    ret_t retVal;
-+
-+    if(port >  RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_UNKNOWN_L2_MULTICAST_REG(port), RTL8367C_UNKNOWN_L2_MULTICAST_MASK(port), pBehave);
-+        if (retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_UNKNOWN_L2_MULTICAST_CTRL1, 3 << ((port - 8) << 1), pBehave);
-+        if (retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicUnknownIPv4MulticastBehavior
-+ * Description:
-+ *      Set behavior of IPv4 multicast
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      behave  - 0: flooding, 1: drop, 2: trap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_NOT_ALLOWED  - Invalid operation
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicUnknownIPv4MulticastBehavior(rtk_uint32 port, rtk_uint32 behave)
-+{
-+    if(port >  RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(behave >= L3_UNKOWN_MULTICAST_END)
-+        return RT_ERR_NOT_ALLOWED;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_UNKNOWN_IPV4_MULTICAST_REG(port), RTL8367C_UNKNOWN_IPV4_MULTICAST_MASK(port), behave);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicUnknownIPv4MulticastBehavior
-+ * Description:
-+ *      Get behavior of IPv4 multicast
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pBehave     - 0: flooding, 1: drop, 2: trap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicUnknownIPv4MulticastBehavior(rtk_uint32 port, rtk_uint32 *pBehave)
-+{
-+    if(port >  RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_UNKNOWN_IPV4_MULTICAST_REG(port), RTL8367C_UNKNOWN_IPV4_MULTICAST_MASK(port), pBehave);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicUnknownIPv6MulticastBehavior
-+ * Description:
-+ *      Set behavior of IPv6 multicast
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      behave  - 0: flooding, 1: drop, 2: trap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_NOT_ALLOWED  - Invalid operation
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicUnknownIPv6MulticastBehavior(rtk_uint32 port, rtk_uint32 behave)
-+{
-+    if(port >  RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(behave >= L3_UNKOWN_MULTICAST_END)
-+        return RT_ERR_NOT_ALLOWED;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_UNKNOWN_IPV6_MULTICAST_REG(port), RTL8367C_UNKNOWN_IPV6_MULTICAST_MASK(port), behave);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicUnknownIPv6MulticastBehavior
-+ * Description:
-+ *      Get behavior of IPv6 multicast
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pBehave     - 0: flooding, 1: drop, 2: trap
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicUnknownIPv6MulticastBehavior(rtk_uint32 port, rtk_uint32 *pBehave)
-+{
-+    if(port >  RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_UNKNOWN_IPV6_MULTICAST_REG(port), RTL8367C_UNKNOWN_IPV6_MULTICAST_MASK(port), pBehave);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicUnknownMulticastTrapPriority
-+ * Description:
-+ *      Set trap priority of unknown multicast frame
-+ * Input:
-+ *      priority    - priority (0~7)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_QOS_INT_PRIORITY - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicUnknownMulticastTrapPriority(rtk_uint32 priority)
-+{
-+    if(priority > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_QOS_TRAP_PRIORITY_CTRL0_REG, RTL8367C_UNKNOWN_MC_PRIORTY_MASK, priority);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicUnknownMulticastTrapPriority
-+ * Description:
-+ *      Get trap priority of unknown multicast frame
-+ * Input:
-+ *      pPriority   - priority (0~7)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK   - Success
-+ *      RT_ERR_SMI  - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicUnknownMulticastTrapPriority(rtk_uint32 *pPriority)
-+{
-+    return rtl8367c_getAsicRegBits(RTL8367C_QOS_TRAP_PRIORITY_CTRL0_REG, RTL8367C_UNKNOWN_MC_PRIORTY_MASK, pPriority);
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_vlan.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_vlan.c
-new file mode 100644
-index 0000000000..1e283e7432
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/rtl8367c_asicdrv_vlan.c
-@@ -0,0 +1,1505 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTL8367C switch high-level API for RTL8367C
-+ * Feature : VLAN related functions
-+ *
-+ */
-+#include <rtl8367c_asicdrv_vlan.h>
-+
-+#include <string.h>
-+
-+#if defined(CONFIG_RTL8367C_ASICDRV_TEST)
-+rtl8367c_user_vlan4kentry Rtl8370sVirtualVlanTable[RTL8367C_VIDMAX + 1];
-+#endif
-+
-+static void _rtl8367c_VlanMCStUser2Smi(rtl8367c_vlanconfiguser *pVlanCg, rtk_uint16 *pSmiVlanCfg)
-+{
-+    pSmiVlanCfg[0] |= pVlanCg->mbr & 0x07FF;
-+
-+    pSmiVlanCfg[1] |= pVlanCg->fid_msti & 0x000F;
-+
-+    pSmiVlanCfg[2] |= pVlanCg->vbpen & 0x0001;
-+    pSmiVlanCfg[2] |= (pVlanCg->vbpri & 0x0007) << 1;
-+    pSmiVlanCfg[2] |= (pVlanCg->envlanpol & 0x0001) << 4;
-+    pSmiVlanCfg[2] |= (pVlanCg->meteridx & 0x003F) << 5;
-+
-+    pSmiVlanCfg[3] |= pVlanCg->evid & 0x1FFF;
-+}
-+
-+static void _rtl8367c_VlanMCStSmi2User(rtk_uint16 *pSmiVlanCfg, rtl8367c_vlanconfiguser *pVlanCg)
-+{
-+    pVlanCg->mbr            = pSmiVlanCfg[0] & 0x07FF;
-+    pVlanCg->fid_msti       = pSmiVlanCfg[1] & 0x000F;
-+    pVlanCg->meteridx       = (pSmiVlanCfg[2] >> 5) & 0x003F;
-+    pVlanCg->envlanpol      = (pSmiVlanCfg[2] >> 4) & 0x0001;
-+    pVlanCg->vbpri          = (pSmiVlanCfg[2] >> 1) & 0x0007;
-+    pVlanCg->vbpen          = pSmiVlanCfg[2] & 0x0001;
-+    pVlanCg->evid           = pSmiVlanCfg[3] & 0x1FFF;
-+}
-+
-+static void _rtl8367c_Vlan4kStUser2Smi(rtl8367c_user_vlan4kentry *pUserVlan4kEntry, rtk_uint16 *pSmiVlan4kEntry)
-+{
-+    pSmiVlan4kEntry[0] |= (pUserVlan4kEntry->mbr & 0x00FF);
-+    pSmiVlan4kEntry[0] |= (pUserVlan4kEntry->untag & 0x00FF) << 8;
-+
-+    pSmiVlan4kEntry[1] |= (pUserVlan4kEntry->fid_msti & 0x000F);
-+    pSmiVlan4kEntry[1] |= (pUserVlan4kEntry->vbpen & 0x0001) << 4;
-+    pSmiVlan4kEntry[1] |= (pUserVlan4kEntry->vbpri & 0x0007) << 5;
-+    pSmiVlan4kEntry[1] |= (pUserVlan4kEntry->envlanpol & 0x0001) << 8;
-+    pSmiVlan4kEntry[1] |= (pUserVlan4kEntry->meteridx & 0x001F) << 9;
-+    pSmiVlan4kEntry[1] |= (pUserVlan4kEntry->ivl_svl & 0x0001) << 14;
-+
-+    pSmiVlan4kEntry[2] |= ((pUserVlan4kEntry->mbr & 0x0700) >> 8);
-+    pSmiVlan4kEntry[2] |= ((pUserVlan4kEntry->untag & 0x0700) >> 8) << 3;
-+    pSmiVlan4kEntry[2] |= ((pUserVlan4kEntry->meteridx & 0x0020) >> 5) << 6;
-+}
-+
-+
-+static void _rtl8367c_Vlan4kStSmi2User(rtk_uint16 *pSmiVlan4kEntry, rtl8367c_user_vlan4kentry *pUserVlan4kEntry)
-+{
-+    pUserVlan4kEntry->mbr = (pSmiVlan4kEntry[0] & 0x00FF) | ((pSmiVlan4kEntry[2] & 0x0007) << 8);
-+    pUserVlan4kEntry->untag = ((pSmiVlan4kEntry[0] & 0xFF00) >> 8) | (((pSmiVlan4kEntry[2] & 0x0038) >> 3) << 8);
-+    pUserVlan4kEntry->fid_msti = pSmiVlan4kEntry[1] & 0x000F;
-+    pUserVlan4kEntry->vbpen = (pSmiVlan4kEntry[1] & 0x0010) >> 4;
-+    pUserVlan4kEntry->vbpri = (pSmiVlan4kEntry[1] & 0x00E0) >> 5;
-+    pUserVlan4kEntry->envlanpol = (pSmiVlan4kEntry[1] & 0x0100) >> 8;
-+    pUserVlan4kEntry->meteridx = ((pSmiVlan4kEntry[1] & 0x3E00) >> 9) | (((pSmiVlan4kEntry[2] & 0x0040) >> 6) << 5);
-+    pUserVlan4kEntry->ivl_svl = (pSmiVlan4kEntry[1] & 0x4000) >> 14;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicVlanMemberConfig
-+ * Description:
-+ *      Set 32 VLAN member configurations
-+ * Input:
-+ *      index       - VLAN member configuration index (0~31)
-+ *      pVlanCg - VLAN member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_INPUT                - Invalid input parameter
-+ *      RT_ERR_L2_FID               - Invalid FID
-+ *      RT_ERR_PORT_MASK            - Invalid portmask
-+ *      RT_ERR_FILTER_METER_ID      - Invalid meter
-+ *      RT_ERR_QOS_INT_PRIORITY     - Invalid priority
-+ *      RT_ERR_VLAN_ENTRY_NOT_FOUND - Invalid VLAN member configuration index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicVlanMemberConfig(rtk_uint32 index, rtl8367c_vlanconfiguser *pVlanCg)
-+{
-+    ret_t  retVal;
-+    rtk_uint32 regAddr;
-+    rtk_uint32 regData;
-+    rtk_uint16 *tableAddr;
-+    rtk_uint32 page_idx;
-+    rtk_uint16 smi_vlancfg[RTL8367C_VLAN_MBRCFG_LEN];
-+
-+    /* Error Checking  */
-+    if(index > RTL8367C_CVIDXMAX)
-+        return RT_ERR_VLAN_ENTRY_NOT_FOUND;
-+
-+    if(pVlanCg->evid > RTL8367C_EVIDMAX)
-+        return RT_ERR_INPUT;
-+
-+
-+    if(pVlanCg->mbr > RTL8367C_PORTMASK)
-+        return RT_ERR_PORT_MASK;
-+
-+    if(pVlanCg->fid_msti > RTL8367C_FIDMAX)
-+        return RT_ERR_L2_FID;
-+
-+    if(pVlanCg->meteridx > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    if(pVlanCg->vbpri > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    memset(smi_vlancfg, 0x00, sizeof(rtk_uint16) * RTL8367C_VLAN_MBRCFG_LEN);
-+    _rtl8367c_VlanMCStUser2Smi(pVlanCg, smi_vlancfg);
-+    tableAddr = smi_vlancfg;
-+
-+    for(page_idx = 0; page_idx < 4; page_idx++)  /* 4 pages per VLAN Member Config */
-+    {
-+        regAddr = RTL8367C_VLAN_MEMBER_CONFIGURATION_BASE + (index * 4) + page_idx;
-+        regData = *tableAddr;
-+
-+        retVal = rtl8367c_setAsicReg(regAddr, regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        tableAddr++;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicVlanMemberConfig
-+ * Description:
-+ *      Get 32 VLAN member configurations
-+ * Input:
-+ *      index       - VLAN member configuration index (0~31)
-+ *      pVlanCg - VLAN member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_INPUT                - Invalid input parameter
-+ *      RT_ERR_VLAN_ENTRY_NOT_FOUND - Invalid VLAN member configuration index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicVlanMemberConfig(rtk_uint32 index, rtl8367c_vlanconfiguser *pVlanCg)
-+{
-+    ret_t  retVal;
-+    rtk_uint32 page_idx;
-+    rtk_uint32 regAddr;
-+    rtk_uint32 regData;
-+    rtk_uint16 *tableAddr;
-+    rtk_uint16 smi_vlancfg[RTL8367C_VLAN_MBRCFG_LEN];
-+
-+    if(index > RTL8367C_CVIDXMAX)
-+        return RT_ERR_VLAN_ENTRY_NOT_FOUND;
-+
-+    memset(smi_vlancfg, 0x00, sizeof(rtk_uint16) * RTL8367C_VLAN_MBRCFG_LEN);
-+    tableAddr  = smi_vlancfg;
-+
-+    for(page_idx = 0; page_idx < 4; page_idx++)  /* 4 pages per VLAN Member Config */
-+    {
-+        regAddr = RTL8367C_VLAN_MEMBER_CONFIGURATION_BASE + (index * 4) + page_idx;
-+
-+        retVal = rtl8367c_getAsicReg(regAddr, &regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        *tableAddr = (rtk_uint16)regData;
-+        tableAddr++;
-+    }
-+
-+    _rtl8367c_VlanMCStSmi2User(smi_vlancfg, pVlanCg);
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicVlan4kEntry
-+ * Description:
-+ *      Set VID mapped entry to 4K VLAN table
-+ * Input:
-+ *      pVlan4kEntry - 4K VLAN configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_INPUT                - Invalid input parameter
-+ *      RT_ERR_L2_FID               - Invalid FID
-+ *      RT_ERR_VLAN_VID             - Invalid VID parameter (0~4095)
-+ *      RT_ERR_PORT_MASK            - Invalid portmask
-+ *      RT_ERR_FILTER_METER_ID      - Invalid meter
-+ *      RT_ERR_QOS_INT_PRIORITY     - Invalid priority
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicVlan4kEntry(rtl8367c_user_vlan4kentry *pVlan4kEntry )
-+{
-+    rtk_uint16              vlan_4k_entry[RTL8367C_VLAN_4KTABLE_LEN];
-+    rtk_uint32                  page_idx;
-+    rtk_uint16                  *tableAddr;
-+    ret_t                   retVal;
-+    rtk_uint32                  regData;
-+
-+    if(pVlan4kEntry->vid > RTL8367C_VIDMAX)
-+        return RT_ERR_VLAN_VID;
-+
-+    if(pVlan4kEntry->mbr > RTL8367C_PORTMASK)
-+        return RT_ERR_PORT_MASK;
-+
-+    if(pVlan4kEntry->untag > RTL8367C_PORTMASK)
-+        return RT_ERR_PORT_MASK;
-+
-+    if(pVlan4kEntry->fid_msti > RTL8367C_FIDMAX)
-+        return RT_ERR_L2_FID;
-+
-+    if(pVlan4kEntry->meteridx > RTL8367C_METERMAX)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    if(pVlan4kEntry->vbpri > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    memset(vlan_4k_entry, 0x00, sizeof(rtk_uint16) * RTL8367C_VLAN_4KTABLE_LEN);
-+    _rtl8367c_Vlan4kStUser2Smi(pVlan4kEntry, vlan_4k_entry);
-+
-+    /* Prepare Data */
-+    tableAddr = vlan_4k_entry;
-+    for(page_idx = 0; page_idx < RTL8367C_VLAN_4KTABLE_LEN; page_idx++)
-+    {
-+        regData = *tableAddr;
-+        retVal = rtl8367c_setAsicReg(RTL8367C_TABLE_ACCESS_WRDATA_BASE + page_idx, regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        tableAddr++;
-+    }
-+
-+    /* Write Address (VLAN_ID) */
-+    regData = pVlan4kEntry->vid;
-+    retVal = rtl8367c_setAsicReg(RTL8367C_TABLE_ACCESS_ADDR_REG, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Write Command */
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_TABLE_ACCESS_CTRL_REG, RTL8367C_TABLE_TYPE_MASK | RTL8367C_COMMAND_TYPE_MASK,RTL8367C_TABLE_ACCESS_REG_DATA(TB_OP_WRITE,TB_TARGET_CVLAN));
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+#if defined(CONFIG_RTL8367C_ASICDRV_TEST)
-+    memcpy(&Rtl8370sVirtualVlanTable[pVlan4kEntry->vid], pVlan4kEntry, sizeof(rtl8367c_user_vlan4kentry));
-+#endif
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicVlan4kEntry
-+ * Description:
-+ *      Get VID mapped entry to 4K VLAN table
-+ * Input:
-+ *      pVlan4kEntry - 4K VLAN configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - Success
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_VLAN_VID         - Invalid VID parameter (0~4095)
-+ *      RT_ERR_BUSYWAIT_TIMEOUT - LUT is busy at retrieving
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicVlan4kEntry(rtl8367c_user_vlan4kentry *pVlan4kEntry )
-+{
-+    rtk_uint16                  vlan_4k_entry[RTL8367C_VLAN_4KTABLE_LEN];
-+    rtk_uint32                  page_idx;
-+    rtk_uint16                  *tableAddr;
-+    ret_t                       retVal;
-+    rtk_uint32                  regData;
-+    rtk_uint32                  busyCounter;
-+
-+    if(pVlan4kEntry->vid > RTL8367C_VIDMAX)
-+        return RT_ERR_VLAN_VID;
-+
-+    /* Polling status */
-+    busyCounter = RTL8367C_VLAN_BUSY_CHECK_NO;
-+    while(busyCounter)
-+    {
-+        retVal = rtl8367c_getAsicRegBit(RTL8367C_TABLE_ACCESS_STATUS_REG, RTL8367C_TABLE_LUT_ADDR_BUSY_FLAG_OFFSET,&regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        if(regData == 0)
-+            break;
-+
-+        busyCounter --;
-+        if(busyCounter == 0)
-+            return RT_ERR_BUSYWAIT_TIMEOUT;
-+    }
-+
-+    /* Write Address (VLAN_ID) */
-+    regData = pVlan4kEntry->vid;
-+    retVal = rtl8367c_setAsicReg(RTL8367C_TABLE_ACCESS_ADDR_REG, regData);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Read Command */
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_TABLE_ACCESS_CTRL_REG, RTL8367C_TABLE_TYPE_MASK | RTL8367C_COMMAND_TYPE_MASK, RTL8367C_TABLE_ACCESS_REG_DATA(TB_OP_READ,TB_TARGET_CVLAN));
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Polling status */
-+    busyCounter = RTL8367C_VLAN_BUSY_CHECK_NO;
-+    while(busyCounter)
-+    {
-+        retVal = rtl8367c_getAsicRegBit(RTL8367C_TABLE_ACCESS_STATUS_REG, RTL8367C_TABLE_LUT_ADDR_BUSY_FLAG_OFFSET,&regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        if(regData == 0)
-+            break;
-+
-+        busyCounter --;
-+        if(busyCounter == 0)
-+            return RT_ERR_BUSYWAIT_TIMEOUT;
-+    }
-+
-+    /* Read VLAN data from register */
-+    tableAddr = vlan_4k_entry;
-+    for(page_idx = 0; page_idx < RTL8367C_VLAN_4KTABLE_LEN; page_idx++)
-+    {
-+        retVal = rtl8367c_getAsicReg(RTL8367C_TABLE_ACCESS_RDDATA_BASE + page_idx, &regData);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+
-+        *tableAddr = regData;
-+        tableAddr++;
-+    }
-+
-+    _rtl8367c_Vlan4kStSmi2User(vlan_4k_entry, pVlan4kEntry);
-+
-+#if defined(CONFIG_RTL8367C_ASICDRV_TEST)
-+    memcpy(pVlan4kEntry, &Rtl8370sVirtualVlanTable[pVlan4kEntry->vid], sizeof(rtl8367c_user_vlan4kentry));
-+#endif
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicVlanAccpetFrameType
-+ * Description:
-+ *      Set per-port acceptable frame type
-+ * Input:
-+ *      port        - Physical port number (0~10)
-+ *      frameType   - The acceptable frame type
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                       - Success
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_PORT_ID                  - Invalid port number
-+ *      RT_ERR_VLAN_ACCEPT_FRAME_TYPE   - Invalid frame type
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicVlanAccpetFrameType(rtk_uint32 port, rtl8367c_accframetype frameType)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(frameType >= FRAME_TYPE_MAX_BOUND)
-+        return RT_ERR_VLAN_ACCEPT_FRAME_TYPE;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_VLAN_ACCEPT_FRAME_TYPE_REG(port), RTL8367C_VLAN_ACCEPT_FRAME_TYPE_MASK(port), frameType);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicVlanAccpetFrameType
-+ * Description:
-+ *      Get per-port acceptable frame type
-+ * Input:
-+ *      port        - Physical port number (0~10)
-+ *      pFrameType  - The acceptable frame type
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                       - Success
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_PORT_ID                  - Invalid port number
-+ *      RT_ERR_VLAN_ACCEPT_FRAME_TYPE   - Invalid frame type
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicVlanAccpetFrameType(rtk_uint32 port, rtl8367c_accframetype *pFrameType)
-+{
-+    rtk_uint32 regData;
-+    ret_t  retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if((retVal = rtl8367c_getAsicRegBits(RTL8367C_VLAN_ACCEPT_FRAME_TYPE_REG(port), RTL8367C_VLAN_ACCEPT_FRAME_TYPE_MASK(port), &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pFrameType = (rtl8367c_accframetype)regData;
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicVlanIngressFilter
-+ * Description:
-+ *      Set VLAN Ingress Filter
-+ * Input:
-+ *      port        - Physical port number (0~10)
-+ *      enabled     - Enable or disable Ingress filter
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicVlanIngressFilter(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_VLAN_INGRESS_REG, port, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicVlanIngressFilter
-+ * Description:
-+ *      Get VLAN Ingress Filter
-+ * Input:
-+ *      port        - Physical port number (0~10)
-+ *      pEnable     - Enable or disable Ingress filter
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicVlanIngressFilter(rtk_uint32 port, rtk_uint32 *pEnable)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_VLAN_INGRESS_REG, port, pEnable);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicVlanEgressTagMode
-+ * Description:
-+ *      Set CVLAN egress tag mode
-+ * Input:
-+ *      port        - Physical port number (0~10)
-+ *      tagMode     - The egress tag mode. Including Original mode, Keep tag mode and Priority tag mode
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_INPUT    - Invalid input parameter
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicVlanEgressTagMode(rtk_uint32 port, rtl8367c_egtagmode tagMode)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(tagMode >= EG_TAG_MODE_END)
-+        return RT_ERR_INPUT;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_PORT_MISC_CFG_REG(port), RTL8367C_VLAN_EGRESS_MDOE_MASK, tagMode);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicVlanEgressTagMode
-+ * Description:
-+ *      Get CVLAN egress tag mode
-+ * Input:
-+ *      port        - Physical port number (0~10)
-+ *      pTagMode    - The egress tag mode. Including Original mode, Keep tag mode and Priority tag mode
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicVlanEgressTagMode(rtk_uint32 port, rtl8367c_egtagmode *pTagMode)
-+{
-+    rtk_uint32 regData;
-+    ret_t  retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if((retVal = rtl8367c_getAsicRegBits(RTL8367C_PORT_MISC_CFG_REG(port), RTL8367C_VLAN_EGRESS_MDOE_MASK, &regData)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pTagMode = (rtl8367c_egtagmode)regData;
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicVlanPortBasedVID
-+ * Description:
-+ *      Set port based VID which is indexed to 32 VLAN member configurations
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      index   - Index to VLAN member configuration
-+ *      pri     - 1Q Port based VLAN priority
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number
-+ *      RT_ERR_QOS_INT_PRIORITY     - Invalid priority
-+ *      RT_ERR_VLAN_ENTRY_NOT_FOUND - Invalid VLAN member configuration index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicVlanPortBasedVID(rtk_uint32 port, rtk_uint32 index, rtk_uint32 pri)
-+{
-+    rtk_uint32 regAddr, bit_mask;
-+    ret_t  retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(index > RTL8367C_CVIDXMAX)
-+        return RT_ERR_VLAN_ENTRY_NOT_FOUND;
-+
-+    if(pri > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    regAddr = RTL8367C_VLAN_PVID_CTRL_REG(port);
-+    bit_mask = RTL8367C_PORT_VIDX_MASK(port);
-+    retVal = rtl8367c_setAsicRegBits(regAddr, bit_mask, index);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    regAddr = RTL8367C_VLAN_PORTBASED_PRIORITY_REG(port);
-+    bit_mask = RTL8367C_VLAN_PORTBASED_PRIORITY_MASK(port);
-+    retVal = rtl8367c_setAsicRegBits(regAddr, bit_mask, pri);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicVlanPortBasedVID
-+ * Description:
-+ *      Get port based VID which is indexed to 32 VLAN member configurations
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      pIndex  - Index to VLAN member configuration
-+ *      pPri    - 1Q Port based VLAN priority
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicVlanPortBasedVID(rtk_uint32 port, rtk_uint32 *pIndex, rtk_uint32 *pPri)
-+{
-+    rtk_uint32 regAddr,bit_mask;
-+    ret_t  retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    regAddr = RTL8367C_VLAN_PVID_CTRL_REG(port);
-+    bit_mask = RTL8367C_PORT_VIDX_MASK(port);
-+    retVal = rtl8367c_getAsicRegBits(regAddr, bit_mask, pIndex);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    regAddr = RTL8367C_VLAN_PORTBASED_PRIORITY_REG(port);
-+    bit_mask = RTL8367C_VLAN_PORTBASED_PRIORITY_MASK(port);
-+    retVal = rtl8367c_getAsicRegBits(regAddr, bit_mask, pPri);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicVlanProtocolBasedGroupData
-+ * Description:
-+ *      Set protocol and port based group database
-+ * Input:
-+ *      index       - Index to VLAN member configuration
-+ *      pPbCfg  - Protocol and port based group database entry
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_INPUT                - Invalid input parameter
-+ *      RT_ERR_VLAN_PROTO_AND_PORT  - Invalid protocol base group database index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicVlanProtocolBasedGroupData(rtk_uint32 index, rtl8367c_protocolgdatacfg *pPbCfg)
-+{
-+    rtk_uint32  frameType;
-+    rtk_uint32  etherType;
-+    ret_t   retVal;
-+
-+    /* Error Checking */
-+    if(index > RTL8367C_PROTOVLAN_GIDX_MAX)
-+        return RT_ERR_VLAN_PROTO_AND_PORT;
-+
-+    if(pPbCfg->frameType >= PPVLAN_FRAME_TYPE_END )
-+        return RT_ERR_INPUT;
-+
-+    frameType = pPbCfg->frameType;
-+    etherType = pPbCfg->etherType;
-+
-+    /* Frame type */
-+    retVal = rtl8367c_setAsicRegBits(RTL8367C_VLAN_PPB_FRAMETYPE_REG(index), RTL8367C_VLAN_PPB_FRAMETYPE_MASK, frameType);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Ether type */
-+    retVal = rtl8367c_setAsicReg(RTL8367C_VLAN_PPB_ETHERTYPR_REG(index), etherType);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicVlanProtocolBasedGroupData
-+ * Description:
-+ *      Get protocol and port based group database
-+ * Input:
-+ *      index       - Index to VLAN member configuration
-+ *      pPbCfg  - Protocol and port based group database entry
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_INPUT                - Invalid input parameter
-+ *      RT_ERR_VLAN_PROTO_AND_PORT  - Invalid protocol base group database index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicVlanProtocolBasedGroupData(rtk_uint32 index, rtl8367c_protocolgdatacfg *pPbCfg)
-+{
-+    rtk_uint32  frameType;
-+    rtk_uint32  etherType;
-+    ret_t   retVal;
-+
-+    /* Error Checking */
-+    if(index > RTL8367C_PROTOVLAN_GIDX_MAX)
-+        return RT_ERR_VLAN_PROTO_AND_PORT;
-+
-+    /* Read Frame type */
-+    retVal = rtl8367c_getAsicRegBits(RTL8367C_VLAN_PPB_FRAMETYPE_REG(index), RTL8367C_VLAN_PPB_FRAMETYPE_MASK, &frameType);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Read Ether type */
-+    retVal = rtl8367c_getAsicReg(RTL8367C_VLAN_PPB_ETHERTYPR_REG(index), &etherType);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    pPbCfg->frameType = frameType;
-+    pPbCfg->etherType = etherType;
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicVlanPortAndProtocolBased
-+ * Description:
-+ *      Set protocol and port based VLAN configuration
-+ * Input:
-+ *      port        - Physical port number (0~10)
-+ *      index       - Index of protocol and port based database index
-+ *      pPpbCfg     - Protocol and port based VLAN configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_INPUT                - Invalid input parameter
-+ *      RT_ERR_PORT_ID              - Invalid port number
-+ *      RT_ERR_QOS_INT_PRIORITY     - Invalid priority
-+ *      RT_ERR_VLAN_PROTO_AND_PORT  - Invalid protocol base group database index
-+ *      RT_ERR_VLAN_ENTRY_NOT_FOUND - Invalid VLAN member configuration index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicVlanPortAndProtocolBased(rtk_uint32 port, rtk_uint32 index, rtl8367c_protocolvlancfg *pPpbCfg)
-+{
-+    rtk_uint32  reg_addr, bit_mask, bit_value;
-+    ret_t   retVal;
-+
-+    /* Error Checking */
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(index > RTL8367C_PROTOVLAN_GIDX_MAX)
-+        return RT_ERR_VLAN_PROTO_AND_PORT;
-+
-+    if( (pPpbCfg->valid != FALSE) && (pPpbCfg->valid != TRUE) )
-+        return RT_ERR_INPUT;
-+
-+    if(pPpbCfg->vlan_idx > RTL8367C_CVIDXMAX)
-+        return RT_ERR_VLAN_ENTRY_NOT_FOUND;
-+
-+    if(pPpbCfg->priority > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    /* Valid bit */
-+    reg_addr  = RTL8367C_VLAN_PPB_VALID_REG(index);
-+    bit_mask  = 0x0001 << port;
-+    bit_value = ((TRUE == pPpbCfg->valid) ? 0x1 : 0x0);
-+    retVal    = rtl8367c_setAsicRegBits(reg_addr, bit_mask, bit_value);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Calculate the actual register address for CVLAN index*/
-+    if(port < 8)
-+    {
-+        reg_addr = RTL8367C_VLAN_PPB_CTRL_REG(index, port);
-+        bit_mask = RTL8367C_VLAN_PPB_CTRL_MASK(port);
-+    }
-+    else if(port == 8)
-+    {
-+        reg_addr = RTL8367C_REG_VLAN_PPB0_CTRL4;
-+        bit_mask = RTL8367C_VLAN_PPB0_CTRL4_PORT8_INDEX_MASK;
-+    }
-+    else if(port == 9)
-+    {
-+        reg_addr = RTL8367C_REG_VLAN_PPB0_CTRL4;
-+        bit_mask = RTL8367C_VLAN_PPB0_CTRL4_PORT9_INDEX_MASK;
-+    }
-+    else if(port == 10)
-+    {
-+        reg_addr = RTL8367C_REG_VLAN_PPB0_CTRL4;
-+        bit_mask = RTL8367C_VLAN_PPB0_CTRL4_PORT10_INDEX_MASK;
-+    }
-+
-+    bit_value = pPpbCfg->vlan_idx;
-+    retVal  = rtl8367c_setAsicRegBits(reg_addr, bit_mask, bit_value);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    /* write priority */
-+    reg_addr  = RTL8367C_VLAN_PPB_PRIORITY_ITEM_REG(port, index);
-+    bit_mask  = RTL8367C_VLAN_PPB_PRIORITY_ITEM_MASK(port);
-+    bit_value = pPpbCfg->priority;
-+    retVal    = rtl8367c_setAsicRegBits(reg_addr, bit_mask, bit_value);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicVlanPortAndProtocolBased
-+ * Description:
-+ *      Get protocol and port based VLAN configuration
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      index       - Index of protocol and port based database index
-+ *      pPpbCfg     - Protocol and port based VLAN configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - Success
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_INPUT                - Invalid input parameter
-+ *      RT_ERR_PORT_ID              - Invalid port number
-+ *      RT_ERR_VLAN_PROTO_AND_PORT  - Invalid protocol base group database index
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicVlanPortAndProtocolBased(rtk_uint32 port, rtk_uint32 index, rtl8367c_protocolvlancfg *pPpbCfg)
-+{
-+    rtk_uint32  reg_addr, bit_mask, bit_value;
-+    ret_t   retVal;
-+
-+    /* Error Checking */
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(index > RTL8367C_PROTOVLAN_GIDX_MAX)
-+        return RT_ERR_VLAN_PROTO_AND_PORT;
-+
-+    if(pPpbCfg == NULL)
-+        return RT_ERR_INPUT;
-+
-+    /* Valid bit */
-+    reg_addr  = RTL8367C_VLAN_PPB_VALID_REG(index);
-+    bit_mask  = 0x0001 << port;
-+    retVal    = rtl8367c_getAsicRegBits(reg_addr, bit_mask, &bit_value);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pPpbCfg->valid = bit_value;
-+
-+    /* CVLAN index */
-+    if(port < 8)
-+    {
-+        reg_addr = RTL8367C_VLAN_PPB_CTRL_REG(index, port);
-+        bit_mask = RTL8367C_VLAN_PPB_CTRL_MASK(port);
-+    }
-+    else if(port == 8)
-+    {
-+        reg_addr = RTL8367C_REG_VLAN_PPB0_CTRL4;
-+        bit_mask = RTL8367C_VLAN_PPB0_CTRL4_PORT8_INDEX_MASK;
-+    }
-+    else if(port == 9)
-+    {
-+        reg_addr = RTL8367C_REG_VLAN_PPB0_CTRL4;
-+        bit_mask = RTL8367C_VLAN_PPB0_CTRL4_PORT9_INDEX_MASK;
-+    }
-+    else if(port == 10)
-+    {
-+        reg_addr = RTL8367C_REG_VLAN_PPB0_CTRL4;
-+        bit_mask = RTL8367C_VLAN_PPB0_CTRL4_PORT10_INDEX_MASK;
-+    }
-+
-+    retVal = rtl8367c_getAsicRegBits(reg_addr, bit_mask, &bit_value);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pPpbCfg->vlan_idx = bit_value;
-+
-+
-+    /* priority */
-+    reg_addr = RTL8367C_VLAN_PPB_PRIORITY_ITEM_REG(port,index);
-+    bit_mask = RTL8367C_VLAN_PPB_PRIORITY_ITEM_MASK(port);
-+    retVal = rtl8367c_getAsicRegBits(reg_addr, bit_mask, &bit_value);
-+    if(retVal != RT_ERR_OK)
-+        return retVal;
-+
-+    pPpbCfg->priority = bit_value;
-+    return RT_ERR_OK;
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicVlanFilter
-+ * Description:
-+ *      Set enable CVLAN filtering function
-+ * Input:
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicVlanFilter(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_VLAN_CTRL, RTL8367C_VLAN_CTRL_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicVlanFilter
-+ * Description:
-+ *      Get enable CVLAN filtering function
-+ * Input:
-+ *      pEnabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicVlanFilter(rtk_uint32* pEnabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_VLAN_CTRL, RTL8367C_VLAN_CTRL_OFFSET, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicVlanUntagDscpPriorityEn
-+ * Description:
-+ *      Set enable Dscp to untag 1Q priority
-+ * Input:
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicVlanUntagDscpPriorityEn(rtk_uint32 enabled)
-+{
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_UNTAG_DSCP_PRI_CFG, RTL8367C_UNTAG_DSCP_PRI_CFG_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicVlanUntagDscpPriorityEn
-+ * Description:
-+ *      Get enable Dscp to untag 1Q priority
-+ * Input:
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicVlanUntagDscpPriorityEn(rtk_uint32* enabled)
-+{
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_UNTAG_DSCP_PRI_CFG, RTL8367C_UNTAG_DSCP_PRI_CFG_OFFSET, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortBasedFid
-+ * Description:
-+ *      Set port based FID
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      fid     - Port based fid
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_L2_FID   - Invalid FID
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortBasedFid(rtk_uint32 port, rtk_uint32 fid)
-+{
-+    rtk_uint32  reg_addr;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(fid > RTL8367C_FIDMAX)
-+        return RT_ERR_L2_FID;
-+
-+    if(port < 8)
-+        return rtl8367c_setAsicReg(RTL8367C_PORT_PBFID_REG(port),fid);
-+    else {
-+        reg_addr = RTL8367C_REG_PORT8_PBFID + port-8;
-+        return rtl8367c_setAsicReg(reg_addr, fid);
-+    }
-+
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortBasedFid
-+ * Description:
-+ *      Get port based FID
-+ * Input:
-+ *      port    - Physical port number (0~7)
-+ *      pFid    - Port based fid
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortBasedFid(rtk_uint32 port, rtk_uint32* pFid)
-+{
-+    rtk_uint32  reg_addr;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8)
-+        return rtl8367c_getAsicReg(RTL8367C_PORT_PBFID_REG(port), pFid);
-+    else{
-+        reg_addr = RTL8367C_REG_PORT8_PBFID + port-8;
-+        return rtl8367c_getAsicReg(reg_addr, pFid);
-+    }
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicPortBasedFidEn
-+ * Description:
-+ *      Set port based FID selection enable
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      enabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicPortBasedFidEn(rtk_uint32 port, rtk_uint32 enabled)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_setAsicRegBit(RTL8367C_REG_PORT_PBFIDEN,port, enabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicPortBasedFidEn
-+ * Description:
-+ *      Get port based FID selection enable
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      pEnabled - 1: enabled, 0: disabled
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicPortBasedFidEn(rtk_uint32 port, rtk_uint32* pEnabled)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBit(RTL8367C_REG_PORT_PBFIDEN,port, pEnabled);
-+}
-+/* Function Name:
-+ *      rtl8367c_setAsicSpanningTreeStatus
-+ * Description:
-+ *      Set spanning tree state per each port
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      msti    - Multiple spanning tree instance
-+ *      state   - Spanning tree state for msti
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_MSTI         - Invalid msti parameter
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_MSTP_STATE   - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicSpanningTreeStatus(rtk_uint32 port, rtk_uint32 msti, rtk_uint32 state)
-+{
-+    rtk_uint32  reg_addr,bits_msk;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(msti > RTL8367C_MSTIMAX)
-+        return RT_ERR_MSTI;
-+
-+    if(state > STPST_FORWARDING)
-+        return RT_ERR_MSTP_STATE;
-+
-+    if(port < 8)
-+        return rtl8367c_setAsicRegBits(RTL8367C_VLAN_MSTI_REG(msti,port), RTL8367C_VLAN_MSTI_MASK(port),state);
-+    else{
-+        reg_addr = RTL8367C_VLAN_MSTI_REG(msti,port);
-+        switch(port){
-+            case 8: bits_msk = RTL8367C_VLAN_MSTI0_CTRL1_PORT8_STATE_MASK;break;
-+            case 9: bits_msk = RTL8367C_VLAN_MSTI0_CTRL1_PORT9_STATE_MASK;break;
-+            case 10: bits_msk = RTL8367C_VLAN_MSTI0_CTRL1_PORT10_STATE_MASK;break;
-+        }
-+        return rtl8367c_setAsicRegBits(reg_addr, bits_msk,state);
-+    }
-+}
-+/* Function Name:
-+ *      rtl8367c_getAsicSpanningTreeStatus
-+ * Description:
-+ *      Set spanning tree state per each port
-+ * Input:
-+ *      port    - Physical port number (0~10)
-+ *      msti    - Multiple spanning tree instance
-+ *      pState  - Spanning tree state for msti
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_MSTI         - Invalid msti parameter
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicSpanningTreeStatus(rtk_uint32 port, rtk_uint32 msti, rtk_uint32* pState)
-+{
-+    rtk_uint32  reg_addr,bits_msk;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(msti > RTL8367C_MSTIMAX)
-+        return RT_ERR_MSTI;
-+
-+    if(port < 8)
-+        return rtl8367c_getAsicRegBits(RTL8367C_VLAN_MSTI_REG(msti,port), RTL8367C_VLAN_MSTI_MASK(port), pState);
-+    else{
-+        reg_addr = RTL8367C_VLAN_MSTI_REG(msti,port);
-+        switch(port){
-+            case 8: bits_msk = RTL8367C_VLAN_MSTI0_CTRL1_PORT8_STATE_MASK;break;
-+            case 9: bits_msk = RTL8367C_VLAN_MSTI0_CTRL1_PORT9_STATE_MASK;break;
-+            case 10: bits_msk = RTL8367C_VLAN_MSTI0_CTRL1_PORT10_STATE_MASK;break;
-+        }
-+        return rtl8367c_getAsicRegBits(reg_addr, bits_msk, pState);
-+    }
-+
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicVlanTransparent
-+ * Description:
-+ *      Set VLAN transparent
-+ * Input:
-+ *      port        - Physical port number (0~10)
-+ *      portmask    - portmask(0~0xFF)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid portmask
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicVlanTransparent(rtk_uint32 port, rtk_uint32 portmask)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(portmask > RTL8367C_PORTMASK)
-+        return RT_ERR_PORT_MASK;
-+
-+    return rtl8367c_setAsicRegBits(RTL8367C_REG_VLAN_EGRESS_TRANS_CTRL0 + port, RTL8367C_VLAN_EGRESS_TRANS_CTRL0_MASK, portmask);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicVlanTransparent
-+ * Description:
-+ *      Get VLAN transparent
-+ * Input:
-+ *      port        - Physical port number (0~10)
-+ * Output:
-+ *      pPortmask   - Ingress port mask
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid portmask
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicVlanTransparent(rtk_uint32 port, rtk_uint32 *pPortmask)
-+{
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    return rtl8367c_getAsicRegBits(RTL8367C_REG_VLAN_EGRESS_TRANS_CTRL0 + port, RTL8367C_VLAN_EGRESS_TRANS_CTRL0_MASK, pPortmask);
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setAsicVlanEgressKeep
-+ * Description:
-+ *      Set per egress port VLAN keep mode
-+ * Input:
-+ *      port        - Physical port number (0~10)
-+ *      portmask    - portmask(0~0xFF)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_MASK    - Invalid portmask
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setAsicVlanEgressKeep(rtk_uint32 port, rtk_uint32 portmask)
-+{
-+    rtk_uint32 regAddr, bit_mask;
-+    ret_t  retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(portmask > RTL8367C_PORTMASK)
-+        return RT_ERR_PORT_MASK;
-+
-+    if(port < 8){
-+        retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL0 + (port>>1),RTL8367C_PORT0_VLAN_KEEP_MASK_MASK<<((port&1)*8),portmask & 0xff);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+        regAddr = RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL0_EXT + (port>>1);
-+        bit_mask = RTL8367C_PORT0_VLAN_KEEP_MASK_EXT_MASK;
-+        bit_mask <<= (port&1)*3;
-+        retVal = rtl8367c_setAsicRegBits(regAddr, bit_mask, (portmask>>8)&0x7);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else{
-+        switch(port){
-+            case 8:
-+                regAddr = RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL4;
-+                bit_mask = RTL8367C_PORT8_VLAN_KEEP_MASK_MASK;
-+                retVal = rtl8367c_setAsicRegBits(regAddr, bit_mask, portmask & 0xff);
-+                if(retVal != RT_ERR_OK)
-+                    return retVal;
-+                regAddr = RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL4_EXT;
-+                bit_mask = RTL8367C_PORT8_VLAN_KEEP_MASK_EXT_MASK;
-+                retVal = rtl8367c_setAsicRegBits(regAddr, bit_mask, (portmask>>8)&0x7);
-+                if(retVal != RT_ERR_OK)
-+                    return retVal;
-+                break;
-+
-+            case 9:
-+                regAddr = RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL4;
-+                bit_mask = RTL8367C_PORT9_VLAN_KEEP_MASK_MASK;
-+                retVal = rtl8367c_setAsicRegBits(regAddr, bit_mask, portmask & 0xff);
-+                if(retVal != RT_ERR_OK)
-+                    return retVal;
-+                regAddr = RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL4_EXT;
-+                bit_mask = RTL8367C_PORT9_VLAN_KEEP_MASK_EXT_MASK;
-+                retVal = rtl8367c_setAsicRegBits(regAddr, bit_mask, (portmask>>8)&0x7);
-+                if(retVal != RT_ERR_OK)
-+                    return retVal;
-+                break;
-+
-+            case 10:
-+                regAddr = RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL5;
-+                bit_mask = RTL8367C_VLAN_EGRESS_KEEP_CTRL5_MASK;
-+                retVal = rtl8367c_setAsicRegBits(regAddr, bit_mask, portmask & 0xff);
-+                if(retVal != RT_ERR_OK)
-+                    return retVal;
-+                regAddr = RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL5_EXT;
-+                bit_mask = RTL8367C_VLAN_EGRESS_KEEP_CTRL5_EXT_MASK;
-+                retVal = rtl8367c_setAsicRegBits(regAddr, bit_mask, (portmask>>8)&0x7);
-+                if(retVal != RT_ERR_OK)
-+                    return retVal;
-+                break;
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getAsicVlanEgressKeep
-+ * Description:
-+ *      Get per egress port VLAN keep mode
-+ * Input:
-+ *      port        - Physical port number (0~7)
-+ *      pPortmask   - portmask(0~0xFF)
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_PORT_ID  - Invalid port number
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getAsicVlanEgressKeep(rtk_uint32 port, rtk_uint32* pPortmask)
-+{
-+    rtk_uint32 regAddr, bit_mask, regval_l, regval_h;
-+    ret_t  retVal;
-+
-+    if(port > RTL8367C_PORTIDMAX)
-+        return RT_ERR_PORT_ID;
-+
-+    if(port < 8){
-+        retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL0 + (port>>1),RTL8367C_PORT0_VLAN_KEEP_MASK_MASK<<((port&1)*8),&regval_l);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+        regAddr = RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL0_EXT + (port>>1);
-+        bit_mask = RTL8367C_PORT0_VLAN_KEEP_MASK_EXT_MASK;
-+        bit_mask <<= (port&1)*3;
-+        retVal = rtl8367c_getAsicRegBits(regAddr, bit_mask, &regval_h);
-+        if(retVal != RT_ERR_OK)
-+            return retVal;
-+        *pPortmask = (regval_h << 8) | regval_l;
-+    }
-+    else{
-+        switch(port){
-+            case 8:
-+                regAddr = RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL4;
-+                bit_mask = RTL8367C_PORT8_VLAN_KEEP_MASK_MASK;
-+                retVal = rtl8367c_getAsicRegBits(regAddr, bit_mask, &regval_l);
-+                if(retVal != RT_ERR_OK)
-+                    return retVal;
-+                regAddr = RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL4_EXT;
-+                bit_mask = RTL8367C_PORT8_VLAN_KEEP_MASK_EXT_MASK;
-+                retVal = rtl8367c_getAsicRegBits(regAddr, bit_mask, &regval_h);
-+                if(retVal != RT_ERR_OK)
-+                    return retVal;
-+
-+                *pPortmask = (regval_h << 8) | regval_l;
-+                break;
-+
-+            case 9:
-+                regAddr = RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL4;
-+                bit_mask = RTL8367C_PORT9_VLAN_KEEP_MASK_MASK;
-+                retVal = rtl8367c_getAsicRegBits(regAddr, bit_mask, &regval_l);
-+                if(retVal != RT_ERR_OK)
-+                    return retVal;
-+                regAddr = RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL4_EXT;
-+                bit_mask = RTL8367C_PORT9_VLAN_KEEP_MASK_EXT_MASK;
-+                retVal = rtl8367c_getAsicRegBits(regAddr, bit_mask, &regval_h);
-+                if(retVal != RT_ERR_OK)
-+                    return retVal;
-+
-+                *pPortmask = (regval_h << 8) | regval_l;
-+                break;
-+
-+            case 10:
-+                regAddr = RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL5;
-+                bit_mask = RTL8367C_VLAN_EGRESS_KEEP_CTRL5_MASK;
-+                retVal = rtl8367c_getAsicRegBits(regAddr, bit_mask, &regval_l);
-+                if(retVal != RT_ERR_OK)
-+                    return retVal;
-+                regAddr = RTL8367C_REG_VLAN_EGRESS_KEEP_CTRL5_EXT;
-+                bit_mask = RTL8367C_VLAN_EGRESS_KEEP_CTRL5_EXT_MASK;
-+                retVal = rtl8367c_getAsicRegBits(regAddr, bit_mask, &regval_h);
-+                if(retVal != RT_ERR_OK)
-+                    return retVal;
-+
-+                *pPortmask = (regval_h << 8) | regval_l;
-+                break;
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setReservedVidAction
-+ * Description:
-+ *      Set reserved VID action
-+ * Input:
-+ *      vid0Action      - VID 0 action
-+ *      vid4095Action   - VID 4095 action
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_INPUT    - Error input
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setReservedVidAction(rtk_uint32 vid0Action, rtk_uint32 vid4095Action)
-+{
-+    ret_t   retVal;
-+
-+    if(vid0Action >= RES_VID_ACT_END)
-+        return RT_ERR_INPUT;
-+
-+    if(vid4095Action >= RES_VID_ACT_END)
-+        return RT_ERR_INPUT;
-+
-+    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_VLAN_EXT_CTRL, RTL8367C_VLAN_VID0_TYPE_OFFSET, vid0Action)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_VLAN_EXT_CTRL, RTL8367C_VLAN_VID4095_TYPE_OFFSET, vid4095Action)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getReservedVidAction
-+ * Description:
-+ *      Get reserved VID action
-+ * Input:
-+ *      pVid0Action     - VID 0 action
-+ *      pVid4095Action  - VID 4095 action
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - Success
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NULL_POINTER - Null pointer
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getReservedVidAction(rtk_uint32 *pVid0Action, rtk_uint32 *pVid4095Action)
-+{
-+    ret_t   retVal;
-+
-+    if(pVid0Action == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(pVid4095Action == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_VLAN_EXT_CTRL, RTL8367C_VLAN_VID0_TYPE_OFFSET, pVid0Action)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_VLAN_EXT_CTRL, RTL8367C_VLAN_VID4095_TYPE_OFFSET, pVid4095Action)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_setRealKeepRemarkEn
-+ * Description:
-+ *      Set Real Keep Remark
-+ * Input:
-+ *      enabled         - 0: 1P remarking is forbidden at real keep packet, 1: 1P remarking is enabled at real keep packet
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_INPUT    - Error input
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_setRealKeepRemarkEn(rtk_uint32 enabled)
-+{
-+    ret_t   retVal;
-+
-+    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_VLAN_EXT_CTRL, RTL8367C_VLAN_1P_REMARK_BYPASS_REALKEEP_OFFSET, enabled)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_getRealKeepRemarkEn
-+ * Description:
-+ *      Get Real Keep Remark
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnabled        - 0: 1P remarking is forbidden at real keep packet, 1: 1P remarking is enabled at real keep packet
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ *      RT_ERR_INPUT    - Error input
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_getRealKeepRemarkEn(rtk_uint32 *pEnabled)
-+{
-+    ret_t   retVal;
-+
-+    if((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_VLAN_EXT_CTRL, RTL8367C_VLAN_1P_REMARK_BYPASS_REALKEEP_OFFSET, pEnabled)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtl8367c_resetVlan
-+ * Description:
-+ *      Reset VLAN table
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK       - Success
-+ *      RT_ERR_SMI      - SMI access error
-+ * Note:
-+ *      None
-+ */
-+ret_t rtl8367c_resetVlan(void)
-+{
-+    ret_t   retVal;
-+
-+    if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_VLAN_EXT_CTRL2, RTL8367C_VLAN_EXT_CTRL2_OFFSET, 1)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/smi.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/smi.c
-new file mode 100644
-index 0000000000..c272cad48e
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/smi.c
-@@ -0,0 +1,444 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * Purpose : RTL8367C switch low-level function for access register
-+ * Feature : SMI related functions
-+ *
-+ */
-+
-+
-+#include <rtk_types.h>
-+#include <smi.h>
-+#include "rtk_error.h"
-+
-+
-+#if defined(MDC_MDIO_OPERATION)
-+/*******************************************************************************/
-+/*  MDC/MDIO porting                                                           */
-+/*******************************************************************************/
-+/* define the PHY ID currently used */
-+/* carlos */
-+#if 0
-+#define MDC_MDIO_PHY_ID     0  /* PHY ID 0 or 29 */
-+#else
-+#define MDC_MDIO_PHY_ID     29  /* PHY ID 0 or 29 */
-+#endif
-+
-+/* MDC/MDIO, redefine/implement the following Macro */ /*carlos*/
-+#if 0
-+#define MDC_MDIO_WRITE(preamableLength, phyID, regID, data)
-+#define MDC_MDIO_READ(preamableLength, phyID, regID, pData)
-+#else
-+#define u32      unsigned int
-+extern u32 mii_mgr_read(u32 phy_addr, u32 phy_register, u32 *read_data);
-+extern u32 mii_mgr_write(u32 phy_addr, u32 phy_register, u32 write_data);
-+
-+#define MDC_MDIO_WRITE(preamableLength, phyID, regID, data) mii_mgr_write(phyID, regID, data)
-+#define MDC_MDIO_READ(preamableLength, phyID, regID, pData) mii_mgr_read(phyID, regID, pData)
-+#endif
-+
-+
-+
-+
-+
-+#elif defined(SPI_OPERATION)
-+/*******************************************************************************/
-+/*  SPI porting                                                                */
-+/*******************************************************************************/
-+/* SPI, redefine/implement the following Macro */
-+#define SPI_WRITE(data, length)
-+#define SPI_READ(pData, length)
-+
-+
-+
-+
-+
-+#else
-+/*******************************************************************************/
-+/*  I2C porting                                                                */
-+/*******************************************************************************/
-+/* Define the GPIO ID for SCK & SDA */
-+rtk_uint32  smi_SCK = 1;    /* GPIO used for SMI Clock Generation */
-+rtk_uint32  smi_SDA = 2;    /* GPIO used for SMI Data signal */
-+
-+/* I2C, redefine/implement the following Macro */
-+#define GPIO_DIRECTION_SET(gpioID, direction)
-+#define GPIO_DATA_SET(gpioID, data)
-+#define GPIO_DATA_GET(gpioID, pData)
-+
-+
-+
-+
-+
-+#endif
-+
-+static void rtlglue_drvMutexLock(void)
-+{
-+    /* It is empty currently. Implement this function if Lock/Unlock function is needed */
-+    return;
-+}
-+
-+static void rtlglue_drvMutexUnlock(void)
-+{
-+    /* It is empty currently. Implement this function if Lock/Unlock function is needed */
-+    return;
-+}
-+
-+
-+
-+#if defined(MDC_MDIO_OPERATION) || defined(SPI_OPERATION)
-+    /* No local function in MDC/MDIO & SPI mode */
-+#else
-+static void _smi_start(void)
-+{
-+
-+    /* change GPIO pin to Output only */
-+    GPIO_DIRECTION_SET(smi_SCK, GPIO_DIR_OUT);
-+    GPIO_DIRECTION_SET(smi_SDA, GPIO_DIR_OUT);
-+
-+    /* Initial state: SCK: 0, SDA: 1 */
-+    GPIO_DATA_SET(smi_SCK, 0);
-+    GPIO_DATA_SET(smi_SDA, 1);
-+    CLK_DURATION(DELAY);
-+
-+    /* CLK 1: 0 -> 1, 1 -> 0 */
-+    GPIO_DATA_SET(smi_SCK, 1);
-+    CLK_DURATION(DELAY);
-+    GPIO_DATA_SET(smi_SCK, 0);
-+    CLK_DURATION(DELAY);
-+
-+    /* CLK 2: */
-+    GPIO_DATA_SET(smi_SCK, 1);
-+    CLK_DURATION(DELAY);
-+    GPIO_DATA_SET(smi_SDA, 0);
-+    CLK_DURATION(DELAY);
-+    GPIO_DATA_SET(smi_SCK, 0);
-+    CLK_DURATION(DELAY);
-+    GPIO_DATA_SET(smi_SDA, 1);
-+
-+}
-+
-+
-+
-+static void _smi_writeBit(rtk_uint16 signal, rtk_uint32 bitLen)
-+{
-+    for( ; bitLen > 0; bitLen--)
-+    {
-+        CLK_DURATION(DELAY);
-+
-+        /* prepare data */
-+        if ( signal & (1<<(bitLen-1)) )
-+        {
-+            GPIO_DATA_SET(smi_SDA, 1);
-+        }
-+        else
-+        {
-+            GPIO_DATA_SET(smi_SDA, 0);
-+        }
-+        CLK_DURATION(DELAY);
-+
-+        /* clocking */
-+        GPIO_DATA_SET(smi_SCK, 1);
-+        CLK_DURATION(DELAY);
-+        GPIO_DATA_SET(smi_SCK, 0);
-+    }
-+}
-+
-+
-+
-+static void _smi_readBit(rtk_uint32 bitLen, rtk_uint32 *rData)
-+{
-+    rtk_uint32 u = 0;
-+
-+    /* change GPIO pin to Input only */
-+    GPIO_DIRECTION_SET(smi_SDA, GPIO_DIR_IN);
-+
-+    for (*rData = 0; bitLen > 0; bitLen--)
-+    {
-+        CLK_DURATION(DELAY);
-+
-+        /* clocking */
-+        GPIO_DATA_SET(smi_SCK, 1);
-+        CLK_DURATION(DELAY);
-+        GPIO_DATA_GET(smi_SDA, &u);
-+        GPIO_DATA_SET(smi_SCK, 0);
-+
-+        *rData |= (u << (bitLen - 1));
-+    }
-+
-+    /* change GPIO pin to Output only */
-+    GPIO_DIRECTION_SET(smi_SDA, GPIO_DIR_OUT);
-+}
-+
-+
-+
-+static void _smi_stop(void)
-+{
-+
-+    CLK_DURATION(DELAY);
-+    GPIO_DATA_SET(smi_SDA, 0);
-+    GPIO_DATA_SET(smi_SCK, 1);
-+    CLK_DURATION(DELAY);
-+    GPIO_DATA_SET(smi_SDA, 1);
-+    CLK_DURATION(DELAY);
-+    GPIO_DATA_SET(smi_SCK, 1);
-+    CLK_DURATION(DELAY);
-+    GPIO_DATA_SET(smi_SCK, 0);
-+    CLK_DURATION(DELAY);
-+    GPIO_DATA_SET(smi_SCK, 1);
-+
-+    /* add a click */
-+    CLK_DURATION(DELAY);
-+    GPIO_DATA_SET(smi_SCK, 0);
-+    CLK_DURATION(DELAY);
-+    GPIO_DATA_SET(smi_SCK, 1);
-+
-+
-+    /* change GPIO pin to Input only */
-+    GPIO_DIRECTION_SET(smi_SDA, GPIO_DIR_IN);
-+    GPIO_DIRECTION_SET(smi_SCK, GPIO_DIR_IN);
-+}
-+
-+#endif /* End of #if defined(MDC_MDIO_OPERATION) || defined(SPI_OPERATION) */
-+
-+rtk_int32 smi_read(rtk_uint32 mAddrs, rtk_uint32 *rData)
-+{
-+#if (!defined(MDC_MDIO_OPERATION) && !defined(SPI_OPERATION))
-+    rtk_uint32 rawData=0, ACK;
-+    rtk_uint8  con;
-+    rtk_uint32 ret = RT_ERR_OK;
-+#endif
-+
-+    if(mAddrs > 0xFFFF)
-+        return RT_ERR_INPUT;
-+
-+    if(rData == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+#if defined(MDC_MDIO_OPERATION)
-+
-+    /* Lock */
-+    rtlglue_drvMutexLock();
-+
-+    /* Write address control code to register 31 */
-+    MDC_MDIO_WRITE(MDC_MDIO_PREAMBLE_LEN, MDC_MDIO_PHY_ID, MDC_MDIO_CTRL0_REG, MDC_MDIO_ADDR_OP);
-+
-+    /* Write address to register 23 */
-+    MDC_MDIO_WRITE(MDC_MDIO_PREAMBLE_LEN, MDC_MDIO_PHY_ID, MDC_MDIO_ADDRESS_REG, mAddrs);
-+
-+    /* Write read control code to register 21 */
-+    MDC_MDIO_WRITE(MDC_MDIO_PREAMBLE_LEN, MDC_MDIO_PHY_ID, MDC_MDIO_CTRL1_REG, MDC_MDIO_READ_OP);
-+
-+    /* Read data from register 25 */
-+    MDC_MDIO_READ(MDC_MDIO_PREAMBLE_LEN, MDC_MDIO_PHY_ID, MDC_MDIO_DATA_READ_REG, rData);
-+
-+    /* Unlock */
-+    rtlglue_drvMutexUnlock();
-+
-+    return RT_ERR_OK;
-+
-+#elif defined(SPI_OPERATION)
-+
-+    /* Lock */
-+    rtlglue_drvMutexLock();
-+
-+    /* Write 8 bits READ OP_CODE */
-+    SPI_WRITE(SPI_READ_OP, SPI_READ_OP_LEN);
-+
-+    /* Write 16 bits register address */
-+    SPI_WRITE(mAddrs, SPI_REG_LEN);
-+
-+    /* Read 16 bits data */
-+    SPI_READ(rData, SPI_DATA_LEN);
-+
-+    /* Unlock */
-+    rtlglue_drvMutexUnlock();
-+
-+    return RT_ERR_OK;
-+
-+#else
-+
-+    /*Disable CPU interrupt to ensure that the SMI operation is atomic.
-+      The API is based on RTL865X, rewrite the API if porting to other platform.*/
-+    rtlglue_drvMutexLock();
-+
-+    _smi_start();                                /* Start SMI */
-+
-+    _smi_writeBit(0x0b, 4);                     /* CTRL code: 4'b1011 for RTL8370 */
-+
-+    _smi_writeBit(0x4, 3);                        /* CTRL code: 3'b100 */
-+
-+    _smi_writeBit(0x1, 1);                        /* 1: issue READ command */
-+
-+    con = 0;
-+    do {
-+        con++;
-+        _smi_readBit(1, &ACK);                    /* ACK for issuing READ command*/
-+    } while ((ACK != 0) && (con < ack_timer));
-+
-+    if (ACK != 0) ret = RT_ERR_FAILED;
-+
-+    _smi_writeBit((mAddrs&0xff), 8);             /* Set reg_addr[7:0] */
-+
-+    con = 0;
-+    do {
-+        con++;
-+        _smi_readBit(1, &ACK);                    /* ACK for setting reg_addr[7:0] */
-+    } while ((ACK != 0) && (con < ack_timer));
-+
-+    if (ACK != 0) ret = RT_ERR_FAILED;
-+
-+    _smi_writeBit((mAddrs>>8), 8);                 /* Set reg_addr[15:8] */
-+
-+    con = 0;
-+    do {
-+        con++;
-+        _smi_readBit(1, &ACK);                    /* ACK by RTL8369 */
-+    } while ((ACK != 0) && (con < ack_timer));
-+    if (ACK != 0) ret = RT_ERR_FAILED;
-+
-+    _smi_readBit(8, &rawData);                    /* Read DATA [7:0] */
-+    *rData = rawData&0xff;
-+
-+    _smi_writeBit(0x00, 1);                        /* ACK by CPU */
-+
-+    _smi_readBit(8, &rawData);                    /* Read DATA [15: 8] */
-+
-+    _smi_writeBit(0x01, 1);                        /* ACK by CPU */
-+    *rData |= (rawData<<8);
-+
-+    _smi_stop();
-+
-+    rtlglue_drvMutexUnlock();/*enable CPU interrupt*/
-+
-+    return ret;
-+#endif /* end of #if defined(MDC_MDIO_OPERATION) */
-+}
-+
-+
-+
-+rtk_int32 smi_write(rtk_uint32 mAddrs, rtk_uint32 rData)
-+{
-+#if (!defined(MDC_MDIO_OPERATION) && !defined(SPI_OPERATION))
-+    rtk_int8 con;
-+    rtk_uint32 ACK;
-+    rtk_uint32 ret = RT_ERR_OK;
-+#endif
-+
-+    if(mAddrs > 0xFFFF)
-+        return RT_ERR_INPUT;
-+
-+    if(rData > 0xFFFF)
-+        return RT_ERR_INPUT;
-+
-+#if defined(MDC_MDIO_OPERATION)
-+
-+    /* Lock */
-+    rtlglue_drvMutexLock();
-+
-+    /* Write address control code to register 31 */
-+    MDC_MDIO_WRITE(MDC_MDIO_PREAMBLE_LEN, MDC_MDIO_PHY_ID, MDC_MDIO_CTRL0_REG, MDC_MDIO_ADDR_OP);
-+
-+    /* Write address to register 23 */
-+    MDC_MDIO_WRITE(MDC_MDIO_PREAMBLE_LEN, MDC_MDIO_PHY_ID, MDC_MDIO_ADDRESS_REG, mAddrs);
-+
-+    /* Write data to register 24 */
-+    MDC_MDIO_WRITE(MDC_MDIO_PREAMBLE_LEN, MDC_MDIO_PHY_ID, MDC_MDIO_DATA_WRITE_REG, rData);
-+
-+    /* Write data control code to register 21 */
-+    MDC_MDIO_WRITE(MDC_MDIO_PREAMBLE_LEN, MDC_MDIO_PHY_ID, MDC_MDIO_CTRL1_REG, MDC_MDIO_WRITE_OP);
-+
-+    /* Unlock */
-+    rtlglue_drvMutexUnlock();
-+
-+    return RT_ERR_OK;
-+
-+#elif defined(SPI_OPERATION)
-+
-+    /* Lock */
-+    rtlglue_drvMutexLock();
-+
-+    /* Write 8 bits WRITE OP_CODE */
-+    SPI_WRITE(SPI_WRITE_OP, SPI_WRITE_OP_LEN);
-+
-+    /* Write 16 bits register address */
-+    SPI_WRITE(mAddrs, SPI_REG_LEN);
-+
-+    /* Write 16 bits data */
-+    SPI_WRITE(rData, SPI_DATA_LEN);
-+
-+    /* Unlock */
-+    rtlglue_drvMutexUnlock();
-+
-+    return RT_ERR_OK;
-+#else
-+
-+    /*Disable CPU interrupt to ensure that the SMI operation is atomic.
-+      The API is based on RTL865X, rewrite the API if porting to other platform.*/
-+    rtlglue_drvMutexLock();
-+
-+    _smi_start();                                /* Start SMI */
-+
-+    _smi_writeBit(0x0b, 4);                     /* CTRL code: 4'b1011 for RTL8370*/
-+
-+    _smi_writeBit(0x4, 3);                        /* CTRL code: 3'b100 */
-+
-+    _smi_writeBit(0x0, 1);                        /* 0: issue WRITE command */
-+
-+    con = 0;
-+    do {
-+        con++;
-+        _smi_readBit(1, &ACK);                    /* ACK for issuing WRITE command*/
-+    } while ((ACK != 0) && (con < ack_timer));
-+    if (ACK != 0) ret = RT_ERR_FAILED;
-+
-+    _smi_writeBit((mAddrs&0xff), 8);             /* Set reg_addr[7:0] */
-+
-+    con = 0;
-+    do {
-+        con++;
-+        _smi_readBit(1, &ACK);                    /* ACK for setting reg_addr[7:0] */
-+    } while ((ACK != 0) && (con < ack_timer));
-+    if (ACK != 0) ret = RT_ERR_FAILED;
-+
-+    _smi_writeBit((mAddrs>>8), 8);                 /* Set reg_addr[15:8] */
-+
-+    con = 0;
-+    do {
-+        con++;
-+        _smi_readBit(1, &ACK);                    /* ACK for setting reg_addr[15:8] */
-+    } while ((ACK != 0) && (con < ack_timer));
-+    if (ACK != 0) ret = RT_ERR_FAILED;
-+
-+    _smi_writeBit(rData&0xff, 8);                /* Write Data [7:0] out */
-+
-+    con = 0;
-+    do {
-+        con++;
-+        _smi_readBit(1, &ACK);                    /* ACK for writting data [7:0] */
-+    } while ((ACK != 0) && (con < ack_timer));
-+    if (ACK != 0) ret = RT_ERR_FAILED;
-+
-+    _smi_writeBit(rData>>8, 8);                    /* Write Data [15:8] out */
-+
-+    con = 0;
-+    do {
-+        con++;
-+        _smi_readBit(1, &ACK);                        /* ACK for writting data [15:8] */
-+    } while ((ACK != 0) && (con < ack_timer));
-+    if (ACK != 0) ret = RT_ERR_FAILED;
-+
-+    _smi_stop();
-+
-+    rtlglue_drvMutexUnlock();/*enable CPU interrupt*/
-+
-+    return ret;
-+#endif /* end of #if defined(MDC_MDIO_OPERATION) */
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/stat.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/stat.c
-new file mode 100644
-index 0000000000..3a328b0ca4
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/stat.c
-@@ -0,0 +1,626 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in MIB module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <stat.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_mib.h>
-+
-+/* Function Name:
-+ *      rtk_stat_global_reset
-+ * Description:
-+ *      Reset global MIB counter.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      Reset MIB counter of ports. API will use global reset while port mask is all-ports.
-+ */
-+rtk_api_ret_t rtk_stat_global_reset(void)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((retVal = rtl8367c_setAsicMIBsCounterReset(TRUE,FALSE, 0)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_stat_port_reset
-+ * Description:
-+ *      Reset per port MIB counter by port.
-+ * Input:
-+ *      port - port id.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_stat_port_reset(rtk_port_t port)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_setAsicMIBsCounterReset(FALSE,FALSE,1 << rtk_switch_port_L2P_get(port))) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_stat_queueManage_reset
-+ * Description:
-+ *      Reset queue manage MIB counter.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_stat_queueManage_reset(void)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((retVal = rtl8367c_setAsicMIBsCounterReset(FALSE,TRUE,0)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_stat_global_get
-+ * Description:
-+ *      Get global MIB counter
-+ * Input:
-+ *      cntr_idx - global counter index.
-+ * Output:
-+ *      pCntr - global counter value.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      Get global MIB counter by index definition.
-+ */
-+rtk_api_ret_t rtk_stat_global_get(rtk_stat_global_type_t cntr_idx, rtk_stat_counter_t *pCntr)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pCntr)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (cntr_idx!=DOT1D_TP_LEARNED_ENTRY_DISCARDS_INDEX)
-+        return RT_ERR_STAT_INVALID_GLOBAL_CNTR;
-+
-+    if ((retVal = rtl8367c_getAsicMIBsCounter(0, cntr_idx, pCntr)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_stat_global_getAll
-+ * Description:
-+ *      Get all global MIB counter
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pGlobal_cntrs - global counter structure.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      Get all global MIB counter by index definition.
-+ */
-+rtk_api_ret_t rtk_stat_global_getAll(rtk_stat_global_cntr_t *pGlobal_cntrs)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pGlobal_cntrs)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicMIBsCounter(0,DOT1D_TP_LEARNED_ENTRY_DISCARDS_INDEX, &pGlobal_cntrs->dot1dTpLearnedEntryDiscards)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+#define MIB_NOT_SUPPORT     (0xFFFF)
-+static rtk_api_ret_t _get_asic_mib_idx(rtk_stat_port_type_t cnt_idx, RTL8367C_MIBCOUNTER *pMib_idx)
-+{
-+    RTL8367C_MIBCOUNTER mib_asic_idx[STAT_PORT_CNTR_END]=
-+    {
-+        ifInOctets,                     /* STAT_IfInOctets */
-+        dot3StatsFCSErrors,             /* STAT_Dot3StatsFCSErrors */
-+        dot3StatsSymbolErrors,          /* STAT_Dot3StatsSymbolErrors */
-+        dot3InPauseFrames,              /* STAT_Dot3InPauseFrames */
-+        dot3ControlInUnknownOpcodes,    /* STAT_Dot3ControlInUnknownOpcodes */
-+        etherStatsFragments,            /* STAT_EtherStatsFragments */
-+        etherStatsJabbers,              /* STAT_EtherStatsJabbers */
-+        ifInUcastPkts,                  /* STAT_IfInUcastPkts */
-+        etherStatsDropEvents,           /* STAT_EtherStatsDropEvents */
-+        etherStatsOctets,               /* STAT_EtherStatsOctets */
-+        etherStatsUnderSizePkts,        /* STAT_EtherStatsUnderSizePkts */
-+        etherOversizeStats,             /* STAT_EtherOversizeStats */
-+        etherStatsPkts64Octets,         /* STAT_EtherStatsPkts64Octets */
-+        etherStatsPkts65to127Octets,    /* STAT_EtherStatsPkts65to127Octets */
-+        etherStatsPkts128to255Octets,   /* STAT_EtherStatsPkts128to255Octets */
-+        etherStatsPkts256to511Octets,   /* STAT_EtherStatsPkts256to511Octets */
-+        etherStatsPkts512to1023Octets,  /* STAT_EtherStatsPkts512to1023Octets */
-+        etherStatsPkts1024to1518Octets, /* STAT_EtherStatsPkts1024to1518Octets */
-+        ifInMulticastPkts,              /* STAT_EtherStatsMulticastPkts */
-+        ifInBroadcastPkts,              /* STAT_EtherStatsBroadcastPkts */
-+        ifOutOctets,                    /* STAT_IfOutOctets */
-+        dot3StatsSingleCollisionFrames, /* STAT_Dot3StatsSingleCollisionFrames */
-+        dot3StatMultipleCollisionFrames,/* STAT_Dot3StatsMultipleCollisionFrames */
-+        dot3sDeferredTransmissions,     /* STAT_Dot3StatsDeferredTransmissions */
-+        dot3StatsLateCollisions,        /* STAT_Dot3StatsLateCollisions */
-+        etherStatsCollisions,           /* STAT_EtherStatsCollisions */
-+        dot3StatsExcessiveCollisions,   /* STAT_Dot3StatsExcessiveCollisions */
-+        dot3OutPauseFrames,             /* STAT_Dot3OutPauseFrames */
-+        MIB_NOT_SUPPORT,                /* STAT_Dot1dBasePortDelayExceededDiscards */
-+        dot1dTpPortInDiscards,          /* STAT_Dot1dTpPortInDiscards */
-+        ifOutUcastPkts,                 /* STAT_IfOutUcastPkts */
-+        ifOutMulticastPkts,             /* STAT_IfOutMulticastPkts */
-+        ifOutBroadcastPkts,             /* STAT_IfOutBroadcastPkts */
-+        outOampduPkts,                  /* STAT_OutOampduPkts */
-+        inOampduPkts,                   /* STAT_InOampduPkts */
-+        MIB_NOT_SUPPORT,                /* STAT_PktgenPkts */
-+        inMldChecksumError,             /* STAT_InMldChecksumError */
-+        inIgmpChecksumError,            /* STAT_InIgmpChecksumError */
-+        inMldSpecificQuery,             /* STAT_InMldSpecificQuery */
-+        inMldGeneralQuery,              /* STAT_InMldGeneralQuery */
-+        inIgmpSpecificQuery,            /* STAT_InIgmpSpecificQuery */
-+        inIgmpGeneralQuery,             /* STAT_InIgmpGeneralQuery */
-+        inMldLeaves,                    /* STAT_InMldLeaves */
-+        inIgmpLeaves,                   /* STAT_InIgmpInterfaceLeaves */
-+        inIgmpJoinsSuccess,             /* STAT_InIgmpJoinsSuccess */
-+        inIgmpJoinsFail,                /* STAT_InIgmpJoinsFail */
-+        inMldJoinsSuccess,              /* STAT_InMldJoinsSuccess */
-+        inMldJoinsFail,                 /* STAT_InMldJoinsFail */
-+        inReportSuppressionDrop,        /* STAT_InReportSuppressionDrop */
-+        inLeaveSuppressionDrop,         /* STAT_InLeaveSuppressionDrop */
-+        outIgmpReports,                 /* STAT_OutIgmpReports */
-+        outIgmpLeaves,                  /* STAT_OutIgmpLeaves */
-+        outIgmpGeneralQuery,            /* STAT_OutIgmpGeneralQuery */
-+        outIgmpSpecificQuery,           /* STAT_OutIgmpSpecificQuery */
-+        outMldReports,                  /* STAT_OutMldReports */
-+        outMldLeaves,                   /* STAT_OutMldLeaves */
-+        outMldGeneralQuery,             /* STAT_OutMldGeneralQuery */
-+        outMldSpecificQuery,            /* STAT_OutMldSpecificQuery */
-+        inKnownMulticastPkts,           /* STAT_InKnownMulticastPkts */
-+        ifInMulticastPkts,              /* STAT_IfInMulticastPkts */
-+        ifInBroadcastPkts,              /* STAT_IfInBroadcastPkts */
-+        ifOutDiscards                   /* STAT_IfOutDiscards */
-+    };
-+
-+    if(cnt_idx >= STAT_PORT_CNTR_END)
-+        return RT_ERR_STAT_INVALID_PORT_CNTR;
-+
-+    if(mib_asic_idx[cnt_idx] == MIB_NOT_SUPPORT)
-+        return RT_ERR_CHIP_NOT_SUPPORTED;
-+
-+    *pMib_idx = mib_asic_idx[cnt_idx];
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_stat_port_get
-+ * Description:
-+ *      Get per port MIB counter by index
-+ * Input:
-+ *      port        - port id.
-+ *      cntr_idx    - port counter index.
-+ * Output:
-+ *      pCntr - MIB retrived counter.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      Get per port MIB counter by index definition.
-+ */
-+rtk_api_ret_t rtk_stat_port_get(rtk_port_t port, rtk_stat_port_type_t cntr_idx, rtk_stat_counter_t *pCntr)
-+{
-+    rtk_api_ret_t       retVal;
-+    RTL8367C_MIBCOUNTER mib_idx;
-+    rtk_stat_counter_t  second_cnt;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pCntr)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* Check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (cntr_idx>=STAT_PORT_CNTR_END)
-+        return RT_ERR_STAT_INVALID_PORT_CNTR;
-+
-+    if((retVal = _get_asic_mib_idx(cntr_idx, &mib_idx)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(mib_idx == MIB_NOT_SUPPORT)
-+        return RT_ERR_CHIP_NOT_SUPPORTED;
-+
-+    if ((retVal = rtl8367c_getAsicMIBsCounter(rtk_switch_port_L2P_get(port), mib_idx, pCntr)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(cntr_idx == STAT_EtherStatsMulticastPkts)
-+    {
-+        if((retVal = _get_asic_mib_idx(STAT_IfOutMulticastPkts, &mib_idx)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if((retVal = rtl8367c_getAsicMIBsCounter(rtk_switch_port_L2P_get(port), mib_idx, &second_cnt)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pCntr += second_cnt;
-+    }
-+
-+    if(cntr_idx == STAT_EtherStatsBroadcastPkts)
-+    {
-+        if((retVal = _get_asic_mib_idx(STAT_IfOutBroadcastPkts, &mib_idx)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if((retVal = rtl8367c_getAsicMIBsCounter(rtk_switch_port_L2P_get(port), mib_idx, &second_cnt)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pCntr += second_cnt;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_stat_port_getAll
-+ * Description:
-+ *      Get all counters of one specified port in the specified device.
-+ * Input:
-+ *      port - port id.
-+ * Output:
-+ *      pPort_cntrs - buffer pointer of counter value.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      Get all MIB counters of one port.
-+ */
-+rtk_api_ret_t rtk_stat_port_getAll(rtk_port_t port, rtk_stat_port_cntr_t *pPort_cntrs)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 mibIndex;
-+    rtk_uint64 mibCounter;
-+    rtk_uint32 *accessPtr;
-+    /* address offset to MIBs counter */
-+    CONST_T rtk_uint16 mibLength[STAT_PORT_CNTR_END]= {
-+        2,1,1,1,1,1,1,1,1,
-+        2,1,1,1,1,1,1,1,1,1,1,
-+        2,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
-+        1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1};
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pPort_cntrs)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* Check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    accessPtr = (rtk_uint32*)pPort_cntrs;
-+    for (mibIndex=0;mibIndex<STAT_PORT_CNTR_END;mibIndex++)
-+    {
-+        if ((retVal = rtk_stat_port_get(port, mibIndex, &mibCounter)) != RT_ERR_OK)
-+        {
-+            if (retVal == RT_ERR_CHIP_NOT_SUPPORTED)
-+                mibCounter = 0;
-+            else
-+                return retVal;
-+        }
-+
-+        if (2 == mibLength[mibIndex])
-+            *(rtk_uint64*)accessPtr = mibCounter;
-+        else if (1 == mibLength[mibIndex])
-+            *accessPtr = mibCounter;
-+        else
-+            return RT_ERR_FAILED;
-+
-+        accessPtr+=mibLength[mibIndex];
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_stat_logging_counterCfg_set
-+ * Description:
-+ *      Set the type and mode of Logging Counter
-+ * Input:
-+ *      idx     - The index of Logging Counter. Should be even number only.(0,2,4,6,8.....30)
-+ *      mode    - 32 bits or 64 bits mode
-+ *      type    - Packet counter or byte counter
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_OUT_OF_RANGE - Out of range.
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      Set the type and mode of Logging Counter.
-+ */
-+rtk_api_ret_t rtk_stat_logging_counterCfg_set(rtk_uint32 idx, rtk_logging_counter_mode_t mode, rtk_logging_counter_type_t type)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(idx > RTL8367C_MIB_MAX_LOG_CNT_IDX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if((idx % 2) == 1)
-+        return RT_ERR_INPUT;
-+
-+    if(mode >= LOGGING_MODE_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(type >= LOGGING_TYPE_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if((retVal = rtl8367c_setAsicMIBsLoggingType((idx / 2), (rtk_uint32)type)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicMIBsLoggingMode((idx / 2), (rtk_uint32)mode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_stat_logging_counterCfg_get
-+ * Description:
-+ *      Get the type and mode of Logging Counter
-+ * Input:
-+ *      idx     - The index of Logging Counter. Should be even number only.(0,2,4,6,8.....30)
-+ * Output:
-+ *      pMode   - 32 bits or 64 bits mode
-+ *      pType   - Packet counter or byte counter
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_OUT_OF_RANGE - Out of range.
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_NULL_POINTER - NULL Pointer
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      Get the type and mode of Logging Counter.
-+ */
-+rtk_api_ret_t rtk_stat_logging_counterCfg_get(rtk_uint32 idx, rtk_logging_counter_mode_t *pMode, rtk_logging_counter_type_t *pType)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      type, mode;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(idx > RTL8367C_MIB_MAX_LOG_CNT_IDX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if((idx % 2) == 1)
-+        return RT_ERR_INPUT;
-+
-+    if(pMode == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(pType == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if((retVal = rtl8367c_getAsicMIBsLoggingType((idx / 2), &type)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicMIBsLoggingMode((idx / 2), &mode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pMode = (rtk_logging_counter_mode_t)mode;
-+    *pType = (rtk_logging_counter_type_t)type;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_stat_logging_counter_reset
-+ * Description:
-+ *      Reset Logging Counter
-+ * Input:
-+ *      idx     - The index of Logging Counter. (0~31)
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_OUT_OF_RANGE - Out of range.
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      Reset Logging Counter.
-+ */
-+rtk_api_ret_t rtk_stat_logging_counter_reset(rtk_uint32 idx)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(idx > RTL8367C_MIB_MAX_LOG_CNT_IDX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if((retVal = rtl8367c_setAsicMIBsResetLoggingCounter(idx)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_stat_logging_counter_get
-+ * Description:
-+ *      Get Logging Counter
-+ * Input:
-+ *      idx     - The index of Logging Counter. (0~31)
-+ * Output:
-+ *      pCnt    - Logging counter value
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_OUT_OF_RANGE - Out of range.
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      Get Logging Counter.
-+ */
-+rtk_api_ret_t rtk_stat_logging_counter_get(rtk_uint32 idx, rtk_uint32 *pCnt)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pCnt)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(idx > RTL8367C_MIB_MAX_LOG_CNT_IDX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if((retVal = rtl8367c_getAsicMIBsLogCounter(idx, pCnt)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_stat_lengthMode_set
-+ * Description:
-+ *      Set Legnth mode.
-+ * Input:
-+ *      txMode     - The length counting mode
-+ *      rxMode     - The length counting mode
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_INPUT        - Out of range.
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_stat_lengthMode_set(rtk_stat_lengthMode_t txMode, rtk_stat_lengthMode_t rxMode)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(txMode >= LENGTH_MODE_END)
-+        return RT_ERR_INPUT;
-+
-+    if(rxMode >= LENGTH_MODE_END)
-+        return RT_ERR_INPUT;
-+
-+    if((retVal = rtl8367c_setAsicMIBsLength((rtk_uint32)txMode, (rtk_uint32)rxMode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_stat_lengthMode_get
-+ * Description:
-+ *      Get Legnth mode.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pTxMode       - The length counting mode
-+ *      pRxMode       - The length counting mode
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_INPUT        - Out of range.
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ */
-+rtk_api_ret_t rtk_stat_lengthMode_get(rtk_stat_lengthMode_t *pTxMode, rtk_stat_lengthMode_t *pRxMode)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pTxMode)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(NULL == pRxMode)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if((retVal = rtl8367c_getAsicMIBsLength((rtk_uint32 *)pTxMode, (rtk_uint32 *)pRxMode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/storm.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/storm.c
-new file mode 100644
-index 0000000000..13cf4e3cb4
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/storm.c
-@@ -0,0 +1,816 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in Storm module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <storm.h>
-+#include <rate.h>
-+#include <string.h>
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_storm.h>
-+#include <rtl8367c_asicdrv_meter.h>
-+#include <rtl8367c_asicdrv_rma.h>
-+#include <rtl8367c_asicdrv_igmp.h>
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlMeterIdx_set
-+ * Description:
-+ *      Set the storm control meter index.
-+ * Input:
-+ *      port       - port id
-+ *      storm_type - storm group type
-+ *      index       - storm control meter index.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID - Invalid port id
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_rate_stormControlMeterIdx_set(rtk_port_t port, rtk_rate_storm_group_t stormType, rtk_uint32 index)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (stormType >= STORM_GROUP_END)
-+        return RT_ERR_SFC_UNKNOWN_GROUP;
-+
-+    if (index > RTK_MAX_METER_ID)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    switch (stormType)
-+    {
-+        case STORM_GROUP_UNKNOWN_UNICAST:
-+            if ((retVal = rtl8367c_setAsicStormFilterUnknownUnicastMeter(rtk_switch_port_L2P_get(port), index))!=RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_UNKNOWN_MULTICAST:
-+            if ((retVal = rtl8367c_setAsicStormFilterUnknownMulticastMeter(rtk_switch_port_L2P_get(port), index))!=RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_MULTICAST:
-+            if ((retVal = rtl8367c_setAsicStormFilterMulticastMeter(rtk_switch_port_L2P_get(port), index))!=RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_BROADCAST:
-+            if ((retVal = rtl8367c_setAsicStormFilterBroadcastMeter(rtk_switch_port_L2P_get(port), index))!=RT_ERR_OK)
-+                return retVal;
-+            break;
-+        default:
-+            break;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlMeterIdx_get
-+ * Description:
-+ *      Get the storm control meter index.
-+ * Input:
-+ *      port       - port id
-+ *      storm_type - storm group type
-+ * Output:
-+ *      pIndex     - storm control meter index.
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_PORT_ID - Invalid port id
-+ *      RT_ERR_FILTER_METER_ID  - Invalid meter
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_rate_stormControlMeterIdx_get(rtk_port_t port, rtk_rate_storm_group_t stormType, rtk_uint32 *pIndex)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (stormType >= STORM_GROUP_END)
-+        return RT_ERR_SFC_UNKNOWN_GROUP;
-+
-+    if (NULL == pIndex )
-+        return RT_ERR_NULL_POINTER;
-+
-+    switch (stormType)
-+    {
-+        case STORM_GROUP_UNKNOWN_UNICAST:
-+            if ((retVal = rtl8367c_getAsicStormFilterUnknownUnicastMeter(rtk_switch_port_L2P_get(port), pIndex))!=RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_UNKNOWN_MULTICAST:
-+            if ((retVal = rtl8367c_getAsicStormFilterUnknownMulticastMeter(rtk_switch_port_L2P_get(port), pIndex))!=RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_MULTICAST:
-+            if ((retVal = rtl8367c_getAsicStormFilterMulticastMeter(rtk_switch_port_L2P_get(port), pIndex))!=RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_BROADCAST:
-+            if ((retVal = rtl8367c_getAsicStormFilterBroadcastMeter(rtk_switch_port_L2P_get(port), pIndex))!=RT_ERR_OK)
-+                return retVal;
-+            break;
-+        default:
-+            break;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlPortEnable_set
-+ * Description:
-+ *      Set enable status of storm control on specified port.
-+ * Input:
-+ *      port       - port id
-+ *      stormType  - storm group type
-+ *      enable     - enable status of storm control
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT          - The module is not initial
-+ *      RT_ERR_PORT_ID           - invalid port id
-+ *      RT_ERR_INPUT             - invalid input parameter
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_rate_stormControlPortEnable_set(rtk_port_t port, rtk_rate_storm_group_t stormType, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (stormType >= STORM_GROUP_END)
-+        return RT_ERR_SFC_UNKNOWN_GROUP;
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    switch (stormType)
-+    {
-+        case STORM_GROUP_UNKNOWN_UNICAST:
-+            if ((retVal = rtl8367c_setAsicStormFilterUnknownUnicastEnable(rtk_switch_port_L2P_get(port), enable)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_UNKNOWN_MULTICAST:
-+            if ((retVal = rtl8367c_setAsicStormFilterUnknownMulticastEnable(rtk_switch_port_L2P_get(port), enable)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_MULTICAST:
-+            if ((retVal = rtl8367c_setAsicStormFilterMulticastEnable(rtk_switch_port_L2P_get(port), enable)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_BROADCAST:
-+            if ((retVal = rtl8367c_setAsicStormFilterBroadcastEnable(rtk_switch_port_L2P_get(port), enable)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        default:
-+            break;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlPortEnable_set
-+ * Description:
-+ *      Set enable status of storm control on specified port.
-+ * Input:
-+ *      port       - port id
-+ *      stormType  - storm group type
-+ * Output:
-+ *      pEnable     - enable status of storm control
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT          - The module is not initial
-+ *      RT_ERR_PORT_ID           - invalid port id
-+ *      RT_ERR_INPUT             - invalid input parameter
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_rate_stormControlPortEnable_get(rtk_port_t port, rtk_rate_storm_group_t stormType, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (stormType >= STORM_GROUP_END)
-+        return RT_ERR_SFC_UNKNOWN_GROUP;
-+
-+    if (NULL == pEnable)
-+        return RT_ERR_ENABLE;
-+
-+    switch (stormType)
-+    {
-+        case STORM_GROUP_UNKNOWN_UNICAST:
-+            if ((retVal = rtl8367c_getAsicStormFilterUnknownUnicastEnable(rtk_switch_port_L2P_get(port), pEnable)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_UNKNOWN_MULTICAST:
-+            if ((retVal = rtl8367c_getAsicStormFilterUnknownMulticastEnable(rtk_switch_port_L2P_get(port), pEnable)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_MULTICAST:
-+            if ((retVal = rtl8367c_getAsicStormFilterMulticastEnable(rtk_switch_port_L2P_get(port), pEnable)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_BROADCAST:
-+            if ((retVal = rtl8367c_getAsicStormFilterBroadcastEnable(rtk_switch_port_L2P_get(port), pEnable)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        default:
-+            break;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_storm_bypass_set
-+ * Description:
-+ *      Set bypass storm filter control configuration.
-+ * Input:
-+ *      type    - Bypass storm filter control type.
-+ *      enable  - Bypass status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_ENABLE       - Invalid IFG parameter
-+ * Note:
-+ *
-+ *      This API can set per-port bypass stomr filter control frame type including RMA and igmp.
-+ *      The bypass frame type is as following:
-+ *      - BYPASS_BRG_GROUP,
-+ *      - BYPASS_FD_PAUSE,
-+ *      - BYPASS_SP_MCAST,
-+ *      - BYPASS_1X_PAE,
-+ *      - BYPASS_UNDEF_BRG_04,
-+ *      - BYPASS_UNDEF_BRG_05,
-+ *      - BYPASS_UNDEF_BRG_06,
-+ *      - BYPASS_UNDEF_BRG_07,
-+ *      - BYPASS_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - BYPASS_UNDEF_BRG_09,
-+ *      - BYPASS_UNDEF_BRG_0A,
-+ *      - BYPASS_UNDEF_BRG_0B,
-+ *      - BYPASS_UNDEF_BRG_0C,
-+ *      - BYPASS_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - BYPASS_8021AB,
-+ *      - BYPASS_UNDEF_BRG_0F,
-+ *      - BYPASS_BRG_MNGEMENT,
-+ *      - BYPASS_UNDEFINED_11,
-+ *      - BYPASS_UNDEFINED_12,
-+ *      - BYPASS_UNDEFINED_13,
-+ *      - BYPASS_UNDEFINED_14,
-+ *      - BYPASS_UNDEFINED_15,
-+ *      - BYPASS_UNDEFINED_16,
-+ *      - BYPASS_UNDEFINED_17,
-+ *      - BYPASS_UNDEFINED_18,
-+ *      - BYPASS_UNDEFINED_19,
-+ *      - BYPASS_UNDEFINED_1A,
-+ *      - BYPASS_UNDEFINED_1B,
-+ *      - BYPASS_UNDEFINED_1C,
-+ *      - BYPASS_UNDEFINED_1D,
-+ *      - BYPASS_UNDEFINED_1E,
-+ *      - BYPASS_UNDEFINED_1F,
-+ *      - BYPASS_GMRP,
-+ *      - BYPASS_GVRP,
-+ *      - BYPASS_UNDEF_GARP_22,
-+ *      - BYPASS_UNDEF_GARP_23,
-+ *      - BYPASS_UNDEF_GARP_24,
-+ *      - BYPASS_UNDEF_GARP_25,
-+ *      - BYPASS_UNDEF_GARP_26,
-+ *      - BYPASS_UNDEF_GARP_27,
-+ *      - BYPASS_UNDEF_GARP_28,
-+ *      - BYPASS_UNDEF_GARP_29,
-+ *      - BYPASS_UNDEF_GARP_2A,
-+ *      - BYPASS_UNDEF_GARP_2B,
-+ *      - BYPASS_UNDEF_GARP_2C,
-+ *      - BYPASS_UNDEF_GARP_2D,
-+ *      - BYPASS_UNDEF_GARP_2E,
-+ *      - BYPASS_UNDEF_GARP_2F,
-+ *      - BYPASS_IGMP.
-+ *      - BYPASS_CDP.
-+ *      - BYPASS_CSSTP.
-+ *      - BYPASS_LLDP.
-+ */
-+rtk_api_ret_t rtk_storm_bypass_set(rtk_storm_bypass_t type, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_rma_t rmacfg;
-+    rtk_uint32 tmp;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type >= BYPASS_END)
-+        return RT_ERR_INPUT;
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if (type >= 0 && type <= BYPASS_UNDEF_GARP_2F)
-+    {
-+        if ((retVal = rtl8367c_getAsicRma(type, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.discard_storm_filter = enable;
-+
-+        if ((retVal = rtl8367c_setAsicRma(type, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if(type == BYPASS_IGMP)
-+    {
-+        if ((retVal = rtl8367c_setAsicIGMPBypassStormCTRL(enable)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (type == BYPASS_CDP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCdp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.discard_storm_filter = enable;
-+
-+        if ((retVal = rtl8367c_setAsicRmaCdp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (type  == BYPASS_CSSTP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCsstp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.discard_storm_filter = enable;
-+
-+        if ((retVal = rtl8367c_setAsicRmaCsstp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (type  == BYPASS_LLDP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaLldp(&tmp, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.discard_storm_filter = enable;
-+
-+        if ((retVal = rtl8367c_setAsicRmaLldp(tmp, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+        return RT_ERR_INPUT;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_storm_bypass_get
-+ * Description:
-+ *      Get bypass storm filter control configuration.
-+ * Input:
-+ *      type - Bypass storm filter control type.
-+ * Output:
-+ *      pEnable - Bypass status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API can get per-port bypass stomr filter control frame type including RMA and igmp.
-+ *      The bypass frame type is as following:
-+ *      - BYPASS_BRG_GROUP,
-+ *      - BYPASS_FD_PAUSE,
-+ *      - BYPASS_SP_MCAST,
-+ *      - BYPASS_1X_PAE,
-+ *      - BYPASS_UNDEF_BRG_04,
-+ *      - BYPASS_UNDEF_BRG_05,
-+ *      - BYPASS_UNDEF_BRG_06,
-+ *      - BYPASS_UNDEF_BRG_07,
-+ *      - BYPASS_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - BYPASS_UNDEF_BRG_09,
-+ *      - BYPASS_UNDEF_BRG_0A,
-+ *      - BYPASS_UNDEF_BRG_0B,
-+ *      - BYPASS_UNDEF_BRG_0C,
-+ *      - BYPASS_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - BYPASS_8021AB,
-+ *      - BYPASS_UNDEF_BRG_0F,
-+ *      - BYPASS_BRG_MNGEMENT,
-+ *      - BYPASS_UNDEFINED_11,
-+ *      - BYPASS_UNDEFINED_12,
-+ *      - BYPASS_UNDEFINED_13,
-+ *      - BYPASS_UNDEFINED_14,
-+ *      - BYPASS_UNDEFINED_15,
-+ *      - BYPASS_UNDEFINED_16,
-+ *      - BYPASS_UNDEFINED_17,
-+ *      - BYPASS_UNDEFINED_18,
-+ *      - BYPASS_UNDEFINED_19,
-+ *      - BYPASS_UNDEFINED_1A,
-+ *      - BYPASS_UNDEFINED_1B,
-+ *      - BYPASS_UNDEFINED_1C,
-+ *      - BYPASS_UNDEFINED_1D,
-+ *      - BYPASS_UNDEFINED_1E,
-+ *      - BYPASS_UNDEFINED_1F,
-+ *      - BYPASS_GMRP,
-+ *      - BYPASS_GVRP,
-+ *      - BYPASS_UNDEF_GARP_22,
-+ *      - BYPASS_UNDEF_GARP_23,
-+ *      - BYPASS_UNDEF_GARP_24,
-+ *      - BYPASS_UNDEF_GARP_25,
-+ *      - BYPASS_UNDEF_GARP_26,
-+ *      - BYPASS_UNDEF_GARP_27,
-+ *      - BYPASS_UNDEF_GARP_28,
-+ *      - BYPASS_UNDEF_GARP_29,
-+ *      - BYPASS_UNDEF_GARP_2A,
-+ *      - BYPASS_UNDEF_GARP_2B,
-+ *      - BYPASS_UNDEF_GARP_2C,
-+ *      - BYPASS_UNDEF_GARP_2D,
-+ *      - BYPASS_UNDEF_GARP_2E,
-+ *      - BYPASS_UNDEF_GARP_2F,
-+ *      - BYPASS_IGMP.
-+ *      - BYPASS_CDP.
-+ *      - BYPASS_CSSTP.
-+ *      - BYPASS_LLDP.
-+ */
-+rtk_api_ret_t rtk_storm_bypass_get(rtk_storm_bypass_t type, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_rma_t rmacfg;
-+    rtk_uint32 tmp;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type >= BYPASS_END)
-+        return RT_ERR_INPUT;
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (type >= 0 && type <= BYPASS_UNDEF_GARP_2F)
-+    {
-+        if ((retVal = rtl8367c_getAsicRma(type, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = rmacfg.discard_storm_filter;
-+    }
-+    else if(type == BYPASS_IGMP)
-+    {
-+        if ((retVal = rtl8367c_getAsicIGMPBypassStormCTRL(pEnable)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (type == BYPASS_CDP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCdp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = rmacfg.discard_storm_filter;
-+    }
-+    else if (type == BYPASS_CSSTP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCsstp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = rmacfg.discard_storm_filter;
-+    }
-+    else if (type == BYPASS_LLDP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaLldp(&tmp,&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = rmacfg.discard_storm_filter;
-+    }
-+    else
-+        return RT_ERR_INPUT;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlExtPortmask_set
-+ * Description:
-+ *      Set externsion storm control port mask
-+ * Input:
-+ *      pPortmask  - port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT          - The module is not initial
-+ *      RT_ERR_INPUT             - invalid input parameter
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_rate_stormControlExtPortmask_set(rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pPortmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtk_switch_portmask_L2P_get(pPortmask, &pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicStormFilterExtEnablePortMask(pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlExtPortmask_get
-+ * Description:
-+ *      Set externsion storm control port mask
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pPortmask  - port mask
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT          - The module is not initial
-+ *      RT_ERR_INPUT             - invalid input parameter
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_rate_stormControlExtPortmask_get(rtk_portmask_t *pPortmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pPortmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicStormFilterExtEnablePortMask(&pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtk_switch_portmask_P2L_get(pmask, pPortmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlExtEnable_set
-+ * Description:
-+ *      Set externsion storm control state
-+ * Input:
-+ *      stormType   - storm group type
-+ *      enable      - externsion storm control state
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT          - The module is not initial
-+ *      RT_ERR_INPUT             - invalid input parameter
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_rate_stormControlExtEnable_set(rtk_rate_storm_group_t stormType, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (stormType >= STORM_GROUP_END)
-+        return RT_ERR_SFC_UNKNOWN_GROUP;
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    switch (stormType)
-+    {
-+        case STORM_GROUP_UNKNOWN_UNICAST:
-+            if ((retVal = rtl8367c_setAsicStormFilterExtUnknownUnicastEnable(enable)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_UNKNOWN_MULTICAST:
-+            if ((retVal = rtl8367c_setAsicStormFilterExtUnknownMulticastEnable(enable)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_MULTICAST:
-+            if ((retVal = rtl8367c_setAsicStormFilterExtMulticastEnable(enable)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_BROADCAST:
-+            if ((retVal = rtl8367c_setAsicStormFilterExtBroadcastEnable(enable)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        default:
-+            break;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlExtEnable_get
-+ * Description:
-+ *      Get externsion storm control state
-+ * Input:
-+ *      stormType   - storm group type
-+ * Output:
-+ *      pEnable     - externsion storm control state
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT          - The module is not initial
-+ *      RT_ERR_INPUT             - invalid input parameter
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_rate_stormControlExtEnable_get(rtk_rate_storm_group_t stormType, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (stormType >= STORM_GROUP_END)
-+        return RT_ERR_SFC_UNKNOWN_GROUP;
-+
-+    if (NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    switch (stormType)
-+    {
-+        case STORM_GROUP_UNKNOWN_UNICAST:
-+            if ((retVal = rtl8367c_getAsicStormFilterExtUnknownUnicastEnable((rtk_uint32 *)pEnable)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_UNKNOWN_MULTICAST:
-+            if ((retVal = rtl8367c_getAsicStormFilterExtUnknownMulticastEnable((rtk_uint32 *)pEnable)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_MULTICAST:
-+            if ((retVal = rtl8367c_getAsicStormFilterExtMulticastEnable((rtk_uint32 *)pEnable)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_BROADCAST:
-+            if ((retVal = rtl8367c_getAsicStormFilterExtBroadcastEnable((rtk_uint32 *)pEnable)) != RT_ERR_OK)
-+                return retVal;
-+            break;
-+        default:
-+            break;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlExtMeterIdx_set
-+ * Description:
-+ *      Set externsion storm control meter index
-+ * Input:
-+ *      stormType   - storm group type
-+ *      index       - externsion storm control state
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT          - The module is not initial
-+ *      RT_ERR_INPUT             - invalid input parameter
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_rate_stormControlExtMeterIdx_set(rtk_rate_storm_group_t stormType, rtk_uint32 index)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (stormType >= STORM_GROUP_END)
-+        return RT_ERR_SFC_UNKNOWN_GROUP;
-+
-+    if (index > RTK_MAX_METER_ID)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    switch (stormType)
-+    {
-+        case STORM_GROUP_UNKNOWN_UNICAST:
-+            if ((retVal = rtl8367c_setAsicStormFilterExtUnknownUnicastMeter(index))!=RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_UNKNOWN_MULTICAST:
-+            if ((retVal = rtl8367c_setAsicStormFilterExtUnknownMulticastMeter(index))!=RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_MULTICAST:
-+            if ((retVal = rtl8367c_setAsicStormFilterExtMulticastMeter(index))!=RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_BROADCAST:
-+            if ((retVal = rtl8367c_setAsicStormFilterExtBroadcastMeter(index))!=RT_ERR_OK)
-+                return retVal;
-+            break;
-+        default:
-+            break;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_rate_stormControlExtMeterIdx_get
-+ * Description:
-+ *      Get externsion storm control meter index
-+ * Input:
-+ *      stormType   - storm group type
-+ *      pIndex      - externsion storm control state
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT          - The module is not initial
-+ *      RT_ERR_INPUT             - invalid input parameter
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_rate_stormControlExtMeterIdx_get(rtk_rate_storm_group_t stormType, rtk_uint32 *pIndex)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (stormType >= STORM_GROUP_END)
-+        return RT_ERR_SFC_UNKNOWN_GROUP;
-+
-+    if(NULL == pIndex)
-+        return RT_ERR_NULL_POINTER;
-+
-+    switch (stormType)
-+    {
-+        case STORM_GROUP_UNKNOWN_UNICAST:
-+            if ((retVal = rtl8367c_getAsicStormFilterExtUnknownUnicastMeter(pIndex))!=RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_UNKNOWN_MULTICAST:
-+            if ((retVal = rtl8367c_getAsicStormFilterExtUnknownMulticastMeter(pIndex))!=RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_MULTICAST:
-+            if ((retVal = rtl8367c_getAsicStormFilterExtMulticastMeter(pIndex))!=RT_ERR_OK)
-+                return retVal;
-+            break;
-+        case STORM_GROUP_BROADCAST:
-+            if ((retVal = rtl8367c_getAsicStormFilterExtBroadcastMeter(pIndex))!=RT_ERR_OK)
-+                return retVal;
-+            break;
-+        default:
-+            break;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/svlan.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/svlan.c
-new file mode 100644
-index 0000000000..bf4ef044d1
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/svlan.c
-@@ -0,0 +1,2415 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in SVLAN module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <svlan.h>
-+#include <vlan.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_svlan.h>
-+
-+rtk_uint8               svlan_mbrCfgUsage[RTL8367C_SVIDXNO];
-+rtk_uint16              svlan_mbrCfgVid[RTL8367C_SVIDXNO];
-+rtk_svlan_lookupType_t  svlan_lookupType;
-+/* Function Name:
-+ *      rtk_svlan_init
-+ * Description:
-+ *      Initialize SVLAN Configuration
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      Ether type of S-tag in 802.1ad is 0x88a8 and there are existed ether type 0x9100 and 0x9200 for Q-in-Q SLAN design.
-+ *      User can set mathced ether type as service provider supported protocol.
-+ */
-+rtk_api_ret_t rtk_svlan_init(void)
-+{
-+    rtk_uint32 i;
-+    rtk_api_ret_t retVal;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+    rtl8367c_svlan_s2c_t svlanSP2CConf;
-+    rtl8367c_svlan_mc2s_t svlanMC2SConf;
-+    rtk_uint32 svidx;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /*default use C-priority*/
-+    if ((retVal = rtl8367c_setAsicSvlanPrioritySel(SPRISEL_CTAGPRI)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*Drop SVLAN untag frame*/
-+    if ((retVal = rtl8367c_setAsicSvlanIngressUntag(UNTAG_DROP)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*Drop SVLAN unmatch frame*/
-+    if ((retVal = rtl8367c_setAsicSvlanIngressUnmatch(UNMATCH_DROP)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*Set TPID to 0x88a8*/
-+    if ((retVal = rtl8367c_setAsicSvlanTpid(0x88a8)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*Clean Uplink Port Mask to none*/
-+    if ((retVal = rtl8367c_setAsicSvlanUplinkPortMask(0)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /*Clean SVLAN Member Configuration*/
-+    for (i=0; i<= RTL8367C_SVIDXMAX; i++)
-+    {
-+        memset(&svlanMemConf, 0, sizeof(rtl8367c_svlan_memconf_t));
-+        if ((retVal = rtl8367c_setAsicSvlanMemberConfiguration(i, &svlanMemConf)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    /*Clean C2S Configuration*/
-+    for (i=0; i<= RTL8367C_C2SIDXMAX; i++)
-+    {
-+        if ((retVal = rtl8367c_setAsicSvlanC2SConf(i, 0,0,0)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    /*Clean SP2C Configuration*/
-+    for (i=0; i <= RTL8367C_SP2CMAX ; i++)
-+    {
-+        memset(&svlanSP2CConf, 0, sizeof(rtl8367c_svlan_s2c_t));
-+        if ((retVal = rtl8367c_setAsicSvlanSP2CConf(i, &svlanSP2CConf)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    /*Clean MC2S Configuration*/
-+    for (i=0 ; i<= RTL8367C_MC2SIDXMAX; i++)
-+    {
-+        memset(&svlanMC2SConf, 0, sizeof(rtl8367c_svlan_mc2s_t));
-+        if ((retVal = rtl8367c_setAsicSvlanMC2SConf(i, &svlanMC2SConf)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+
-+    if ((retVal = rtk_svlan_lookupType_set(SVLAN_LOOKUP_S64MBRCGF)) != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    for (svidx = 0; svidx <= RTL8367C_SVIDXMAX; svidx++)
-+    {
-+        svlan_mbrCfgUsage[svidx] = FALSE;
-+    }
-+
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_servicePort_add
-+ * Description:
-+ *      Add one service port in the specified device
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      This API is setting which port is connected to provider switch. All frames receiving from this port must
-+ *      contain accept SVID in S-tag field.
-+ */
-+rtk_api_ret_t rtk_svlan_servicePort_add(rtk_port_t port)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmsk;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_getAsicSvlanUplinkPortMask(&pmsk)) != RT_ERR_OK)
-+        return retVal;
-+
-+    pmsk = pmsk | (1<<rtk_switch_port_L2P_get(port));
-+
-+    if ((retVal = rtl8367c_setAsicSvlanUplinkPortMask(pmsk)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_servicePort_get
-+ * Description:
-+ *      Get service ports in the specified device.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pSvlan_portmask - pointer buffer of svlan ports.
-+ * Return:
-+ *      RT_ERR_OK          - OK
-+ *      RT_ERR_FAILED      - Failed
-+ *      RT_ERR_SMI         - SMI access error
-+ * Note:
-+ *      This API is setting which port is connected to provider switch. All frames receiving from this port must
-+ *      contain accept SVID in S-tag field.
-+ */
-+rtk_api_ret_t rtk_svlan_servicePort_get(rtk_portmask_t *pSvlan_portmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 phyMbrPmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pSvlan_portmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicSvlanUplinkPortMask(&phyMbrPmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(rtk_switch_portmask_P2L_get(phyMbrPmask, pSvlan_portmask) != RT_ERR_OK)
-+        return RT_ERR_FAILED;
-+
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_servicePort_del
-+ * Description:
-+ *      Delete one service port in the specified device
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      This API is removing SVLAN service port in the specified device.
-+ */
-+rtk_api_ret_t rtk_svlan_servicePort_del(rtk_port_t port)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmsk;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_getAsicSvlanUplinkPortMask(&pmsk)) != RT_ERR_OK)
-+        return retVal;
-+
-+    pmsk = pmsk & ~(1<<rtk_switch_port_L2P_get(port));
-+
-+    if ((retVal = rtl8367c_setAsicSvlanUplinkPortMask(pmsk)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_tpidEntry_set
-+ * Description:
-+ *      Configure accepted S-VLAN ether type.
-+ * Input:
-+ *      svlan_tag_id - Ether type of S-tag frame parsing in uplink ports.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      Ether type of S-tag in 802.1ad is 0x88a8 and there are existed ether type 0x9100 and 0x9200 for Q-in-Q SLAN design.
-+ *      User can set mathced ether type as service provider supported protocol.
-+ */
-+rtk_api_ret_t rtk_svlan_tpidEntry_set(rtk_svlan_tpid_t svlan_tag_id)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (svlan_tag_id>RTK_MAX_NUM_OF_PROTO_TYPE)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicSvlanTpid(svlan_tag_id)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_tpidEntry_get
-+ * Description:
-+ *      Get accepted S-VLAN ether type setting.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pSvlan_tag_id -  Ether type of S-tag frame parsing in uplink ports.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      This API is setting which port is connected to provider switch. All frames receiving from this port must
-+ *      contain accept SVID in S-tag field.
-+ */
-+rtk_api_ret_t rtk_svlan_tpidEntry_get(rtk_svlan_tpid_t *pSvlan_tag_id)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pSvlan_tag_id)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicSvlanTpid(pSvlan_tag_id)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_priorityRef_set
-+ * Description:
-+ *      Set S-VLAN upstream priority reference setting.
-+ * Input:
-+ *      ref - reference selection parameter.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ * Note:
-+ *      The API can set the upstream SVLAN tag priority reference source. The related priority
-+ *      sources are as following:
-+ *      - REF_INTERNAL_PRI,
-+ *      - REF_CTAG_PRI,
-+ *      - REF_SVLAN_PRI,
-+ *      - REF_PB_PRI.
-+ */
-+rtk_api_ret_t rtk_svlan_priorityRef_set(rtk_svlan_pri_ref_t ref)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (ref >= REF_PRI_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicSvlanPrioritySel(ref)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_priorityRef_get
-+ * Description:
-+ *      Get S-VLAN upstream priority reference setting.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pRef - reference selection parameter.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      The API can get the upstream SVLAN tag priority reference source. The related priority
-+ *      sources are as following:
-+ *      - REF_INTERNAL_PRI,
-+ *      - REF_CTAG_PRI,
-+ *      - REF_SVLAN_PRI,
-+ *      - REF_PB_PRI
-+ */
-+rtk_api_ret_t rtk_svlan_priorityRef_get(rtk_svlan_pri_ref_t *pRef)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pRef)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicSvlanPrioritySel(pRef)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_memberPortEntry_set
-+ * Description:
-+ *      Configure system SVLAN member content
-+ * Input:
-+ *      svid - SVLAN id
-+ *      psvlan_cfg - SVLAN member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameter.
-+ *      RT_ERR_SVLAN_VID        - Invalid SVLAN VID parameter.
-+ *      RT_ERR_PORT_MASK        - Invalid portmask.
-+ *      RT_ERR_SVLAN_TABLE_FULL - SVLAN configuration is full.
-+ * Note:
-+ *      The API can set system 64 accepted s-tag frame format. Only 64 SVID S-tag frame will be accpeted
-+ *      to receiving from uplink ports. Other SVID S-tag frame or S-untagged frame will be droped by default setup.
-+ *      - rtk_svlan_memberCfg_t->svid is SVID of SVLAN member configuration.
-+ *      - rtk_svlan_memberCfg_t->memberport is member port mask of SVLAN member configuration.
-+ *      - rtk_svlan_memberCfg_t->fid is filtering database of SVLAN member configuration.
-+ *      - rtk_svlan_memberCfg_t->priority is priority of SVLAN member configuration.
-+ */
-+rtk_api_ret_t rtk_svlan_memberPortEntry_set(rtk_vlan_t svid, rtk_svlan_memberCfg_t *pSvlan_cfg)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_int32 i;
-+    rtk_uint32 empty_idx;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+    rtk_uint32 phyMbrPmask;
-+    rtk_vlan_cfg_t vlanCfg;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pSvlan_cfg)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(svid > RTL8367C_VIDMAX)
-+        return RT_ERR_SVLAN_VID;
-+
-+    RTK_CHK_PORTMASK_VALID(&(pSvlan_cfg->memberport));
-+
-+    RTK_CHK_PORTMASK_VALID(&(pSvlan_cfg->untagport));
-+
-+    if (pSvlan_cfg->fiden > ENABLED)
-+        return RT_ERR_ENABLE;
-+
-+    if (pSvlan_cfg->fid > RTL8367C_FIDMAX)
-+        return RT_ERR_L2_FID;
-+
-+    if (pSvlan_cfg->priority > RTL8367C_PRIMAX)
-+        return RT_ERR_VLAN_PRIORITY;
-+
-+    if (pSvlan_cfg->efiden > ENABLED)
-+        return RT_ERR_ENABLE;
-+
-+    if (pSvlan_cfg->efid > RTL8367C_EFIDMAX)
-+        return RT_ERR_L2_FID;
-+
-+    if(SVLAN_LOOKUP_C4KVLAN == svlan_lookupType)
-+    {
-+        if ((retVal = rtk_vlan_get(svid, &vlanCfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        vlanCfg.mbr = pSvlan_cfg->memberport;
-+        vlanCfg.untag = pSvlan_cfg->untagport;
-+
-+        if ((retVal = rtk_vlan_set(svid, &vlanCfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        empty_idx = 0xFF;
-+
-+        for (i = 0; i<= RTL8367C_SVIDXMAX; i++)
-+        {
-+            if (svid == svlan_mbrCfgVid[i] && TRUE == svlan_mbrCfgUsage[i])
-+            {
-+                memset(&svlanMemConf, 0, sizeof(rtl8367c_svlan_memconf_t));
-+                svlanMemConf.vs_svid        = svid;
-+                svlanMemConf.vs_efiden      = pSvlan_cfg->efiden;
-+                svlanMemConf.vs_efid        = pSvlan_cfg->efid;
-+                svlanMemConf.vs_priority    = pSvlan_cfg->priority;
-+
-+                /*for create check*/
-+                if(0 == svlanMemConf.vs_efiden && 0 == svlanMemConf.vs_efid)
-+                    svlanMemConf.vs_efid = 1;
-+
-+                if ((retVal = rtl8367c_setAsicSvlanMemberConfiguration(i, &svlanMemConf)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                return RT_ERR_OK;
-+            }
-+            else if (FALSE == svlan_mbrCfgUsage[i] && 0xFF == empty_idx)
-+            {
-+                empty_idx = i;
-+            }
-+        }
-+
-+        if (empty_idx != 0xFF)
-+        {
-+            svlan_mbrCfgUsage[empty_idx] = TRUE;
-+            svlan_mbrCfgVid[empty_idx] = svid;
-+
-+            memset(&svlanMemConf, 0, sizeof(rtl8367c_svlan_memconf_t));
-+            svlanMemConf.vs_svid        = svid;
-+            svlanMemConf.vs_efiden      = pSvlan_cfg->efiden;
-+            svlanMemConf.vs_efid        = pSvlan_cfg->efid;
-+            svlanMemConf.vs_priority    = pSvlan_cfg->priority;
-+
-+            /*for create check*/
-+            if(0 == svlanMemConf.vs_efiden && 0 == svlanMemConf.vs_efid)
-+                svlanMemConf.vs_efid = 1;
-+
-+            if ((retVal = rtl8367c_setAsicSvlanMemberConfiguration(empty_idx, &svlanMemConf)) != RT_ERR_OK)
-+                return retVal;
-+
-+        }
-+
-+        return RT_ERR_OK;
-+    }
-+
-+
-+    empty_idx = 0xFF;
-+
-+    for (i = 0; i<= RTL8367C_SVIDXMAX; i++)
-+    {
-+        /*
-+        if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(i, &svlanMemConf)) != RT_ERR_OK)
-+            return retVal;
-+        */
-+        if (svid == svlan_mbrCfgVid[i] && TRUE == svlan_mbrCfgUsage[i])
-+        {
-+            svlanMemConf.vs_svid = svid;
-+
-+            if(rtk_switch_portmask_L2P_get(&(pSvlan_cfg->memberport), &phyMbrPmask) != RT_ERR_OK)
-+                return RT_ERR_FAILED;
-+
-+            svlanMemConf.vs_member = phyMbrPmask;
-+
-+            if(rtk_switch_portmask_L2P_get(&(pSvlan_cfg->untagport), &phyMbrPmask) != RT_ERR_OK)
-+                return RT_ERR_FAILED;
-+
-+            svlanMemConf.vs_untag = phyMbrPmask;
-+
-+            svlanMemConf.vs_force_fid   = pSvlan_cfg->fiden;
-+            svlanMemConf.vs_fid_msti    = pSvlan_cfg->fid;
-+            svlanMemConf.vs_priority    = pSvlan_cfg->priority;
-+            svlanMemConf.vs_efiden      = pSvlan_cfg->efiden;
-+            svlanMemConf.vs_efid        = pSvlan_cfg->efid;
-+
-+            /*all items are reset means deleting*/
-+            if( 0 == svlanMemConf.vs_member &&
-+                0 == svlanMemConf.vs_untag &&
-+                0 == svlanMemConf.vs_force_fid &&
-+                0 == svlanMemConf.vs_fid_msti &&
-+                0 == svlanMemConf.vs_priority &&
-+                0 == svlanMemConf.vs_efiden &&
-+                0 == svlanMemConf.vs_efid)
-+            {
-+                svlan_mbrCfgUsage[i] = FALSE;
-+                svlan_mbrCfgVid[i] = 0;
-+
-+                /* Clear SVID also */
-+                svlanMemConf.vs_svid = 0;
-+            }
-+            else
-+            {
-+                svlan_mbrCfgUsage[i] = TRUE;
-+                svlan_mbrCfgVid[i] = svlanMemConf.vs_svid;
-+
-+                if(0 == svlanMemConf.vs_svid)
-+                {
-+                    /*for create check*/
-+                    if(0 == svlanMemConf.vs_efiden && 0 == svlanMemConf.vs_efid)
-+                    {
-+                        svlanMemConf.vs_efid = 1;
-+                    }
-+                }
-+            }
-+
-+            if ((retVal = rtl8367c_setAsicSvlanMemberConfiguration(i, &svlanMemConf)) != RT_ERR_OK)
-+                return retVal;
-+
-+            return RT_ERR_OK;
-+        }
-+        else if (FALSE == svlan_mbrCfgUsage[i] && 0xFF == empty_idx)
-+        {
-+            empty_idx = i;
-+        }
-+    }
-+
-+    if (empty_idx != 0xFF)
-+    {
-+        memset(&svlanMemConf, 0, sizeof(rtl8367c_svlan_memconf_t));
-+        svlanMemConf.vs_svid = svid;
-+
-+        if(rtk_switch_portmask_L2P_get(&(pSvlan_cfg->memberport), &phyMbrPmask) != RT_ERR_OK)
-+            return RT_ERR_FAILED;
-+
-+        svlanMemConf.vs_member = phyMbrPmask;
-+
-+        if(rtk_switch_portmask_L2P_get(&(pSvlan_cfg->untagport), &phyMbrPmask) != RT_ERR_OK)
-+            return RT_ERR_FAILED;
-+
-+        svlanMemConf.vs_untag = phyMbrPmask;
-+
-+        svlanMemConf.vs_force_fid   = pSvlan_cfg->fiden;
-+        svlanMemConf.vs_fid_msti    = pSvlan_cfg->fid;
-+        svlanMemConf.vs_priority    = pSvlan_cfg->priority;
-+
-+        svlanMemConf.vs_efiden      = pSvlan_cfg->efiden;
-+        svlanMemConf.vs_efid        = pSvlan_cfg->efid;
-+
-+        /*change efid for empty svid 0*/
-+        if(0 == svlanMemConf.vs_svid)
-+        {   /*for create check*/
-+            if(0 == svlanMemConf.vs_efiden && 0 == svlanMemConf.vs_efid)
-+            {
-+                svlanMemConf.vs_efid = 1;
-+            }
-+        }
-+
-+        svlan_mbrCfgUsage[empty_idx] = TRUE;
-+        svlan_mbrCfgVid[empty_idx] = svlanMemConf.vs_svid;
-+
-+        if ((retVal = rtl8367c_setAsicSvlanMemberConfiguration(empty_idx, &svlanMemConf)) != RT_ERR_OK)
-+        {
-+            return retVal;
-+        }
-+
-+        return RT_ERR_OK;
-+    }
-+
-+    return RT_ERR_SVLAN_TABLE_FULL;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_memberPortEntry_get
-+ * Description:
-+ *      Get SVLAN member Configure.
-+ * Input:
-+ *      svid - SVLAN id
-+ * Output:
-+ *      pSvlan_cfg - SVLAN member configuration
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can get system 64 accepted s-tag frame format. Only 64 SVID S-tag frame will be accpeted
-+ *      to receiving from uplink ports. Other SVID S-tag frame or S-untagged frame will be droped.
-+ */
-+rtk_api_ret_t rtk_svlan_memberPortEntry_get(rtk_vlan_t svid, rtk_svlan_memberCfg_t *pSvlan_cfg)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 i;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pSvlan_cfg)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (svid > RTL8367C_VIDMAX)
-+        return RT_ERR_SVLAN_VID;
-+
-+
-+    for (i = 0; i<= RTL8367C_SVIDXMAX; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(i, &svlanMemConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (svid == svlanMemConf.vs_svid)
-+        {
-+            pSvlan_cfg->svid        = svlanMemConf.vs_svid;
-+
-+            if(rtk_switch_portmask_P2L_get(svlanMemConf.vs_member,&(pSvlan_cfg->memberport)) != RT_ERR_OK)
-+                return RT_ERR_FAILED;
-+
-+            if(rtk_switch_portmask_P2L_get(svlanMemConf.vs_untag,&(pSvlan_cfg->untagport)) != RT_ERR_OK)
-+                return RT_ERR_FAILED;
-+
-+            pSvlan_cfg->fiden       = svlanMemConf.vs_force_fid;
-+            pSvlan_cfg->fid         = svlanMemConf.vs_fid_msti;
-+            pSvlan_cfg->priority    = svlanMemConf.vs_priority;
-+            pSvlan_cfg->efiden      = svlanMemConf.vs_efiden;
-+            pSvlan_cfg->efid        = svlanMemConf.vs_efid;
-+
-+            return RT_ERR_OK;
-+        }
-+    }
-+
-+    return RT_ERR_SVLAN_ENTRY_NOT_FOUND;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_memberPortEntry_adv_set
-+ * Description:
-+ *      Configure system SVLAN member by index
-+ * Input:
-+ *      idx         - Index (0 ~ 63)
-+ *      psvlan_cfg  - SVLAN member configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameter.
-+ *      RT_ERR_SVLAN_VID        - Invalid SVLAN VID parameter.
-+ *      RT_ERR_PORT_MASK        - Invalid portmask.
-+ *      RT_ERR_SVLAN_TABLE_FULL - SVLAN configuration is full.
-+ * Note:
-+ *      The API can set system 64 accepted s-tag frame format by index.
-+ *      - rtk_svlan_memberCfg_t->svid is SVID of SVLAN member configuration.
-+ *      - rtk_svlan_memberCfg_t->memberport is member port mask of SVLAN member configuration.
-+ *      - rtk_svlan_memberCfg_t->fid is filtering database of SVLAN member configuration.
-+ *      - rtk_svlan_memberCfg_t->priority is priority of SVLAN member configuration.
-+ */
-+rtk_api_ret_t rtk_svlan_memberPortEntry_adv_set(rtk_uint32 idx, rtk_svlan_memberCfg_t *pSvlan_cfg)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+    rtk_uint32 phyMbrPmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pSvlan_cfg)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (idx > RTL8367C_SVIDXMAX)
-+        return RT_ERR_SVLAN_ENTRY_INDEX;
-+
-+    if (pSvlan_cfg->svid>RTL8367C_VIDMAX)
-+        return RT_ERR_SVLAN_VID;
-+
-+    RTK_CHK_PORTMASK_VALID(&(pSvlan_cfg->memberport));
-+
-+    RTK_CHK_PORTMASK_VALID(&(pSvlan_cfg->untagport));
-+
-+    if (pSvlan_cfg->fiden > ENABLED)
-+        return RT_ERR_ENABLE;
-+
-+    if (pSvlan_cfg->fid > RTL8367C_FIDMAX)
-+        return RT_ERR_L2_FID;
-+
-+    if (pSvlan_cfg->priority > RTL8367C_PRIMAX)
-+        return RT_ERR_VLAN_PRIORITY;
-+
-+    if (pSvlan_cfg->efiden > ENABLED)
-+        return RT_ERR_ENABLE;
-+
-+    if (pSvlan_cfg->efid > RTL8367C_EFIDMAX)
-+        return RT_ERR_L2_FID;
-+
-+    memset(&svlanMemConf, 0, sizeof(rtl8367c_svlan_memconf_t));
-+    svlanMemConf.vs_svid        = pSvlan_cfg->svid;
-+    if(rtk_switch_portmask_L2P_get(&(pSvlan_cfg->memberport), &phyMbrPmask) != RT_ERR_OK)
-+        return RT_ERR_FAILED;
-+
-+    svlanMemConf.vs_member = phyMbrPmask;
-+
-+    if(rtk_switch_portmask_L2P_get(&(pSvlan_cfg->untagport), &phyMbrPmask) != RT_ERR_OK)
-+        return RT_ERR_FAILED;
-+
-+    svlanMemConf.vs_untag = phyMbrPmask;
-+
-+
-+    svlanMemConf.vs_force_fid   = pSvlan_cfg->fiden;
-+    svlanMemConf.vs_fid_msti    = pSvlan_cfg->fid;
-+    svlanMemConf.vs_priority    = pSvlan_cfg->priority;
-+    svlanMemConf.vs_efiden      = pSvlan_cfg->efiden;
-+    svlanMemConf.vs_efid        = pSvlan_cfg->efid;
-+
-+    if(0 == svlanMemConf.vs_svid &&
-+        0 == svlanMemConf.vs_member &&
-+        0 == svlanMemConf.vs_untag &&
-+        0 == svlanMemConf.vs_force_fid &&
-+        0 == svlanMemConf.vs_fid_msti &&
-+        0 == svlanMemConf.vs_priority &&
-+        0 == svlanMemConf.vs_efiden &&
-+        0 == svlanMemConf.vs_efid)
-+    {
-+        svlan_mbrCfgUsage[idx] = FALSE;
-+        svlan_mbrCfgVid[idx] = 0;
-+    }
-+    else
-+    {
-+        svlan_mbrCfgUsage[idx] = TRUE;
-+        svlan_mbrCfgVid[idx] = svlanMemConf.vs_svid;
-+    }
-+
-+    if ((retVal = rtl8367c_setAsicSvlanMemberConfiguration(idx, &svlanMemConf)) != RT_ERR_OK)
-+        return retVal;
-+
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_memberPortEntry_adv_get
-+ * Description:
-+ *      Get SVLAN member Configure by index.
-+ * Input:
-+ *      idx         - Index (0 ~ 63)
-+ * Output:
-+ *      pSvlan_cfg  - SVLAN member configuration
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can get system 64 accepted s-tag frame format. Only 64 SVID S-tag frame will be accpeted
-+ *      to receiving from uplink ports. Other SVID S-tag frame or S-untagged frame will be droped.
-+ */
-+rtk_api_ret_t rtk_svlan_memberPortEntry_adv_get(rtk_uint32 idx, rtk_svlan_memberCfg_t *pSvlan_cfg)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pSvlan_cfg)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (idx > RTL8367C_SVIDXMAX)
-+        return RT_ERR_SVLAN_ENTRY_INDEX;
-+
-+    if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(idx, &svlanMemConf)) != RT_ERR_OK)
-+        return retVal;
-+
-+    pSvlan_cfg->svid        = svlanMemConf.vs_svid;
-+    if(rtk_switch_portmask_P2L_get(svlanMemConf.vs_member,&(pSvlan_cfg->memberport)) != RT_ERR_OK)
-+        return RT_ERR_FAILED;
-+
-+    if(rtk_switch_portmask_P2L_get(svlanMemConf.vs_untag,&(pSvlan_cfg->untagport)) != RT_ERR_OK)
-+        return RT_ERR_FAILED;
-+
-+    pSvlan_cfg->fiden       = svlanMemConf.vs_force_fid;
-+    pSvlan_cfg->fid         = svlanMemConf.vs_fid_msti;
-+    pSvlan_cfg->priority    = svlanMemConf.vs_priority;
-+    pSvlan_cfg->efiden      = svlanMemConf.vs_efiden;
-+    pSvlan_cfg->efid        = svlanMemConf.vs_efid;
-+
-+    return RT_ERR_OK;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_defaultSvlan_set
-+ * Description:
-+ *      Configure default egress SVLAN.
-+ * Input:
-+ *      port - Source port
-+ *      svid - SVLAN id
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_INPUT                    - Invalid input parameter.
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ * Note:
-+ *      The API can set port n S-tag format index while receiving frame from port n
-+ *      is transmit through uplink port with s-tag field
-+ */
-+rtk_api_ret_t rtk_svlan_defaultSvlan_set(rtk_port_t port, rtk_vlan_t svid)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 i;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    /* svid must be 0~4095 */
-+    if (svid > RTL8367C_VIDMAX)
-+        return RT_ERR_SVLAN_VID;
-+
-+    for (i = 0; i < RTL8367C_SVIDXNO; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(i, &svlanMemConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (svid == svlanMemConf.vs_svid)
-+        {
-+            if ((retVal = rtl8367c_setAsicSvlanDefaultVlan(rtk_switch_port_L2P_get(port), i)) != RT_ERR_OK)
-+                return retVal;
-+
-+            return RT_ERR_OK;
-+        }
-+    }
-+
-+    return RT_ERR_SVLAN_ENTRY_NOT_FOUND;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_defaultSvlan_get
-+ * Description:
-+ *      Get the configure default egress SVLAN.
-+ * Input:
-+ *      port - Source port
-+ * Output:
-+ *      pSvid - SVLAN VID
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can get port n S-tag format index while receiving frame from port n
-+ *      is transmit through uplink port with s-tag field
-+ */
-+rtk_api_ret_t rtk_svlan_defaultSvlan_get(rtk_port_t port, rtk_vlan_t *pSvid)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 idx;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pSvid)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_getAsicSvlanDefaultVlan(rtk_switch_port_L2P_get(port), &idx)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(idx, &svlanMemConf)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pSvid = svlanMemConf.vs_svid;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_c2s_add
-+ * Description:
-+ *      Configure SVLAN C2S table
-+ * Input:
-+ *      vid - VLAN ID
-+ *      src_port - Ingress Port
-+ *      svid - SVLAN VID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port ID.
-+ *      RT_ERR_SVLAN_VID    - Invalid SVLAN VID parameter.
-+ *      RT_ERR_VLAN_VID     - Invalid VID parameter.
-+ *      RT_ERR_OUT_OF_RANGE - input out of range.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can set system C2S configuration. ASIC will check upstream's VID and assign related
-+ *      SVID to mathed packet. There are 128 SVLAN C2S configurations.
-+ */
-+rtk_api_ret_t rtk_svlan_c2s_add(rtk_vlan_t vid, rtk_port_t src_port, rtk_vlan_t svid)
-+{
-+    rtk_api_ret_t retVal, i;
-+    rtk_uint32 empty_idx;
-+    rtk_uint32 evid, pmsk, svidx, c2s_svidx;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+    rtk_port_t phyPort;
-+    rtk_uint16 doneFlag;
-+
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+
-+    if (vid > RTL8367C_VIDMAX)
-+        return RT_ERR_VLAN_VID;
-+
-+    if (svid > RTL8367C_VIDMAX)
-+        return RT_ERR_SVLAN_VID;
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(src_port);
-+
-+    phyPort = rtk_switch_port_L2P_get(src_port);
-+
-+    empty_idx = 0xFFFF;
-+    svidx = 0xFFFF;
-+    doneFlag = FALSE;
-+
-+    for (i = 0; i<= RTL8367C_SVIDXMAX; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(i, &svlanMemConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (svid == svlanMemConf.vs_svid)
-+        {
-+            svidx = i;
-+            break;
-+        }
-+    }
-+
-+    if (0xFFFF == svidx)
-+        return RT_ERR_SVLAN_VID;
-+
-+    for (i=RTL8367C_C2SIDXMAX; i>=0; i--)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanC2SConf(i, &evid, &pmsk, &c2s_svidx)) != RT_ERR_OK)
-+                return retVal;
-+
-+        if (evid == vid)
-+        {
-+            /* Check Src_port */
-+            if(pmsk & (1 << phyPort))
-+            {
-+                /* Check SVIDX */
-+                if(c2s_svidx == svidx)
-+                {
-+                    /* All the same, do nothing */
-+                }
-+                else
-+                {
-+                    /* New svidx, remove src_port and find a new slot to add a new enrty */
-+                    pmsk = pmsk & ~(1 << phyPort);
-+                    if(pmsk == 0)
-+                        c2s_svidx = 0;
-+
-+                    if ((retVal = rtl8367c_setAsicSvlanC2SConf(i, vid, pmsk, c2s_svidx)) != RT_ERR_OK)
-+                        return retVal;
-+                }
-+            }
-+            else
-+            {
-+                if(c2s_svidx == svidx && doneFlag == FALSE)
-+                {
-+                    pmsk = pmsk | (1 << phyPort);
-+                    if ((retVal = rtl8367c_setAsicSvlanC2SConf(i, vid, pmsk, svidx)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    doneFlag = TRUE;
-+                }
-+            }
-+        }
-+        else if (evid==0&&pmsk==0)
-+        {
-+            empty_idx = i;
-+        }
-+    }
-+
-+    if (0xFFFF != empty_idx && doneFlag ==FALSE)
-+    {
-+       if ((retVal = rtl8367c_setAsicSvlanC2SConf(empty_idx, vid, (1<<phyPort), svidx)) != RT_ERR_OK)
-+           return retVal;
-+
-+       return RT_ERR_OK;
-+    }
-+    else if(doneFlag == TRUE)
-+    {
-+        return RT_ERR_OK;
-+    }
-+
-+    return RT_ERR_OUT_OF_RANGE;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_c2s_del
-+ * Description:
-+ *      Delete one C2S entry
-+ * Input:
-+ *      vid - VLAN ID
-+ *      src_port - Ingress Port
-+ *      svid - SVLAN VID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_VLAN_VID         - Invalid VID parameter.
-+ *      RT_ERR_PORT_ID          - Invalid port ID.
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ * Note:
-+ *      The API can delete system C2S configuration. There are 128 SVLAN C2S configurations.
-+ */
-+rtk_api_ret_t rtk_svlan_c2s_del(rtk_vlan_t vid, rtk_port_t src_port)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 i;
-+    rtk_uint32 evid, pmsk, svidx;
-+    rtk_port_t phyPort;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (vid > RTL8367C_EVIDMAX)
-+        return RT_ERR_VLAN_VID;
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(src_port);
-+    phyPort = rtk_switch_port_L2P_get(src_port);
-+
-+    for (i = 0; i <= RTL8367C_C2SIDXMAX; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanC2SConf(i, &evid, &pmsk, &svidx)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (evid == vid)
-+        {
-+            if(pmsk & (1 << phyPort))
-+            {
-+                pmsk = pmsk & ~(1 << phyPort);
-+                if(pmsk == 0)
-+                {
-+                    vid = 0;
-+                    svidx = 0;
-+                }
-+
-+                if ((retVal = rtl8367c_setAsicSvlanC2SConf(i, vid, pmsk, svidx)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                return RT_ERR_OK;
-+            }
-+        }
-+    }
-+
-+    return RT_ERR_OUT_OF_RANGE;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_c2s_get
-+ * Description:
-+ *      Get configure SVLAN C2S table
-+ * Input:
-+ *      vid - VLAN ID
-+ *      src_port - Ingress Port
-+ * Output:
-+ *      pSvid - SVLAN ID
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port ID.
-+ *      RT_ERR_OUT_OF_RANGE - input out of range.
-+ * Note:
-+ *     The API can get system C2S configuration. There are 128 SVLAN C2S configurations.
-+ */
-+rtk_api_ret_t rtk_svlan_c2s_get(rtk_vlan_t vid, rtk_port_t src_port, rtk_vlan_t *pSvid)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 i;
-+    rtk_uint32 evid, pmsk, svidx;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+    rtk_port_t phyPort;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pSvid)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (vid > RTL8367C_VIDMAX)
-+        return RT_ERR_VLAN_VID;
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(src_port);
-+    phyPort = rtk_switch_port_L2P_get(src_port);
-+
-+    for (i = 0; i <= RTL8367C_C2SIDXMAX; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanC2SConf(i, &evid, &pmsk, &svidx)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (evid == vid)
-+        {
-+            if(pmsk & (1 << phyPort))
-+            {
-+                if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(svidx, &svlanMemConf)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                *pSvid = svlanMemConf.vs_svid;
-+                return RT_ERR_OK;
-+            }
-+        }
-+    }
-+
-+    return RT_ERR_OUT_OF_RANGE;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_untag_action_set
-+ * Description:
-+ *      Configure Action of downstream UnStag packet
-+ * Input:
-+ *      action  - Action for UnStag
-+ *      svid    - The SVID assigned to UnStag packet
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can configure action of downstream Un-Stag packet. A SVID assigned
-+ *      to the un-stag is also supported by this API. The parameter of svid is
-+ *      only referenced when the action is set to UNTAG_ASSIGN
-+ */
-+rtk_api_ret_t rtk_svlan_untag_action_set(rtk_svlan_untag_action_t action, rtk_vlan_t svid)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      i;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (action >= UNTAG_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if(action == UNTAG_ASSIGN)
-+    {
-+        if (svid > RTL8367C_VIDMAX)
-+            return RT_ERR_SVLAN_VID;
-+    }
-+
-+    if ((retVal = rtl8367c_setAsicSvlanIngressUntag((rtk_uint32)action)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(action == UNTAG_ASSIGN)
-+    {
-+        for (i = 0; i < RTL8367C_SVIDXNO; i++)
-+        {
-+            if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(i, &svlanMemConf)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if (svid == svlanMemConf.vs_svid)
-+            {
-+                if ((retVal = rtl8367c_setAsicSvlanUntagVlan(i)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                return RT_ERR_OK;
-+            }
-+        }
-+
-+        return RT_ERR_SVLAN_ENTRY_NOT_FOUND;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_untag_action_get
-+ * Description:
-+ *      Get Action of downstream UnStag packet
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pAction  - Action for UnStag
-+ *      pSvid    - The SVID assigned to UnStag packet
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can Get action of downstream Un-Stag packet. A SVID assigned
-+ *      to the un-stag is also retrieved by this API. The parameter pSvid is
-+ *      only refernced when the action is UNTAG_ASSIGN
-+ */
-+rtk_api_ret_t rtk_svlan_untag_action_get(rtk_svlan_untag_action_t *pAction, rtk_vlan_t *pSvid)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      svidx;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pAction || NULL == pSvid)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicSvlanIngressUntag(pAction)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(*pAction == UNTAG_ASSIGN)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanUntagVlan(&svidx)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(svidx, &svlanMemConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pSvid = svlanMemConf.vs_svid;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_unmatch_action_set
-+ * Description:
-+ *      Configure Action of downstream Unmatch packet
-+ * Input:
-+ *      action  - Action for Unmatch
-+ *      svid    - The SVID assigned to Unmatch packet
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can configure action of downstream Un-match packet. A SVID assigned
-+ *      to the un-match is also supported by this API. The parameter od svid is
-+ *      only refernced when the action is set to UNMATCH_ASSIGN
-+ */
-+rtk_api_ret_t rtk_svlan_unmatch_action_set(rtk_svlan_unmatch_action_t action, rtk_vlan_t svid)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      i;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (action >= UNMATCH_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if (action == UNMATCH_ASSIGN)
-+    {
-+        if (svid > RTL8367C_VIDMAX)
-+            return RT_ERR_SVLAN_VID;
-+    }
-+
-+    if ((retVal = rtl8367c_setAsicSvlanIngressUnmatch((rtk_uint32)action)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(action == UNMATCH_ASSIGN)
-+    {
-+        for (i = 0; i < RTL8367C_SVIDXNO; i++)
-+        {
-+            if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(i, &svlanMemConf)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if (svid == svlanMemConf.vs_svid)
-+            {
-+                if ((retVal = rtl8367c_setAsicSvlanUnmatchVlan(i)) != RT_ERR_OK)
-+                    return retVal;
-+
-+                return RT_ERR_OK;
-+            }
-+        }
-+
-+        return RT_ERR_SVLAN_ENTRY_NOT_FOUND;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_unmatch_action_get
-+ * Description:
-+ *      Get Action of downstream Unmatch packet
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pAction  - Action for Unmatch
-+ *      pSvid    - The SVID assigned to Unmatch packet
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can Get action of downstream Un-match packet. A SVID assigned
-+ *      to the un-match is also retrieved by this API. The parameter pSvid is
-+ *      only refernced when the action is UNMATCH_ASSIGN
-+ */
-+rtk_api_ret_t rtk_svlan_unmatch_action_get(rtk_svlan_unmatch_action_t *pAction, rtk_vlan_t *pSvid)
-+{
-+    rtk_api_ret_t   retVal;
-+    rtk_uint32      svidx;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pAction || NULL == pSvid)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicSvlanIngressUnmatch(pAction)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if(*pAction == UNMATCH_ASSIGN)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanUnmatchVlan(&svidx)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(svidx, &svlanMemConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pSvid = svlanMemConf.vs_svid;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_unassign_action_set
-+ * Description:
-+ *      Configure Action of upstream without svid assign action
-+ * Input:
-+ *      action  - Action for Un-assign
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can configure action of upstream Un-assign svid packet. If action is not
-+ *      trap to CPU, the port-based SVID sure be assign as system need
-+ */
-+rtk_api_ret_t rtk_svlan_unassign_action_set(rtk_svlan_unassign_action_t action)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (action >= UNASSIGN_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicSvlanEgressUnassign((rtk_uint32)action);
-+
-+    return retVal;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_unassign_action_get
-+ * Description:
-+ *      Get action of upstream without svid assignment
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pAction  - Action for Un-assign
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_svlan_unassign_action_get(rtk_svlan_unassign_action_t *pAction)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pAction)
-+        return RT_ERR_NULL_POINTER;
-+
-+    retVal = rtl8367c_getAsicSvlanEgressUnassign(pAction);
-+
-+    return retVal;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_dmac_vidsel_set
-+ * Description:
-+ *      Set DMAC CVID selection
-+ * Input:
-+ *      port    - Port
-+ *      enable  - state of DMAC CVID Selection
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      This API can set DMAC CVID Selection state
-+ */
-+rtk_api_ret_t rtk_svlan_dmac_vidsel_set(rtk_port_t port, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_setAsicSvlanDmacCvidSel(rtk_switch_port_L2P_get(port), enable)) != RT_ERR_OK)
-+            return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_dmac_vidsel_get
-+ * Description:
-+ *      Get DMAC CVID selection
-+ * Input:
-+ *      port    - Port
-+ * Output:
-+ *      pEnable - state of DMAC CVID Selection
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      This API can get DMAC CVID Selection state
-+ */
-+rtk_api_ret_t rtk_svlan_dmac_vidsel_get(rtk_port_t port, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if ((retVal = rtl8367c_getAsicSvlanDmacCvidSel(rtk_switch_port_L2P_get(port), pEnable)) != RT_ERR_OK)
-+            return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_ipmc2s_add
-+ * Description:
-+ *      add ip multicast address to SVLAN
-+ * Input:
-+ *      svid    - SVLAN VID
-+ *      ipmc    - ip multicast address
-+ *      ipmcMsk - ip multicast mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can set IP mutlicast to SVID configuration. If upstream packet is IPv4 multicast
-+ *      packet and DIP is matched MC2S configuration, ASIC will assign egress SVID to the packet.
-+ *      There are 32 SVLAN multicast configurations for IP and L2 multicast.
-+ */
-+rtk_api_ret_t rtk_svlan_ipmc2s_add(ipaddr_t ipmc, ipaddr_t ipmcMsk,rtk_vlan_t svid)
-+{
-+    rtk_api_ret_t retVal, i;
-+    rtk_uint32 empty_idx;
-+    rtk_uint32 svidx;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+    rtl8367c_svlan_mc2s_t svlanMC2SConf;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (svid > RTL8367C_VIDMAX)
-+        return RT_ERR_SVLAN_VID;
-+
-+    if ((ipmc&0xF0000000)!=0xE0000000)
-+        return RT_ERR_INPUT;
-+
-+    svidx = 0xFFFF;
-+
-+    for (i = 0; i < RTL8367C_SVIDXNO; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(i, &svlanMemConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (svid == svlanMemConf.vs_svid)
-+        {
-+            svidx = i;
-+            break;
-+        }
-+    }
-+
-+    if (0xFFFF == svidx)
-+            return RT_ERR_SVLAN_ENTRY_NOT_FOUND;
-+
-+
-+    empty_idx = 0xFFFF;
-+
-+    for (i = RTL8367C_MC2SIDXMAX; i >= 0; i--)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanMC2SConf(i, &svlanMC2SConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (TRUE == svlanMC2SConf.valid)
-+        {
-+            if (svlanMC2SConf.format == SVLAN_MC2S_MODE_IP &&
-+                svlanMC2SConf.sdata==ipmc&&
-+                svlanMC2SConf.smask==ipmcMsk)
-+            {
-+                svlanMC2SConf.svidx = svidx;
-+                if ((retVal = rtl8367c_setAsicSvlanMC2SConf(i, &svlanMC2SConf)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+        }
-+        else
-+        {
-+            empty_idx = i;
-+        }
-+    }
-+
-+    if (empty_idx!=0xFFFF)
-+    {
-+        svlanMC2SConf.valid = TRUE;
-+        svlanMC2SConf.svidx = svidx;
-+        svlanMC2SConf.format = SVLAN_MC2S_MODE_IP;
-+        svlanMC2SConf.sdata = ipmc;
-+        svlanMC2SConf.smask = ipmcMsk;
-+        if ((retVal = rtl8367c_setAsicSvlanMC2SConf(empty_idx, &svlanMC2SConf)) != RT_ERR_OK)
-+            return retVal;
-+        return RT_ERR_OK;
-+    }
-+
-+    return RT_ERR_OUT_OF_RANGE;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_ipmc2s_del
-+ * Description:
-+ *      delete ip multicast address to SVLAN
-+ * Input:
-+ *      ipmc    - ip multicast address
-+ *      ipmcMsk - ip multicast mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_SVLAN_VID        - Invalid SVLAN VID parameter.
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ * Note:
-+ *      The API can delete IP mutlicast to SVID configuration. There are 32 SVLAN multicast configurations for IP and L2 multicast.
-+ */
-+rtk_api_ret_t rtk_svlan_ipmc2s_del(ipaddr_t ipmc, ipaddr_t ipmcMsk)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 i;
-+    rtl8367c_svlan_mc2s_t svlanMC2SConf;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((ipmc&0xF0000000)!=0xE0000000)
-+        return RT_ERR_INPUT;
-+
-+    for (i = 0; i <= RTL8367C_MC2SIDXMAX; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanMC2SConf(i, &svlanMC2SConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (TRUE == svlanMC2SConf.valid)
-+        {
-+            if (svlanMC2SConf.format == SVLAN_MC2S_MODE_IP &&
-+                svlanMC2SConf.sdata==ipmc&&
-+                svlanMC2SConf.smask==ipmcMsk)
-+            {
-+                memset(&svlanMC2SConf, 0, sizeof(rtl8367c_svlan_mc2s_t));
-+                if ((retVal = rtl8367c_setAsicSvlanMC2SConf(i, &svlanMC2SConf)) != RT_ERR_OK)
-+                    return retVal;
-+                return RT_ERR_OK;
-+            }
-+        }
-+    }
-+
-+    return RT_ERR_OUT_OF_RANGE;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_ipmc2s_get
-+ * Description:
-+ *      Get ip multicast address to SVLAN
-+ * Input:
-+ *      ipmc    - ip multicast address
-+ *      ipmcMsk - ip multicast mask
-+ * Output:
-+ *      pSvid - SVLAN VID
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_OUT_OF_RANGE - input out of range.
-+ * Note:
-+ *      The API can get IP mutlicast to SVID configuration. There are 32 SVLAN multicast configurations for IP and L2 multicast.
-+ */
-+rtk_api_ret_t rtk_svlan_ipmc2s_get(ipaddr_t ipmc, ipaddr_t ipmcMsk, rtk_vlan_t *pSvid)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 i;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+    rtl8367c_svlan_mc2s_t svlanMC2SConf;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pSvid)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((ipmc&0xF0000000)!=0xE0000000)
-+        return RT_ERR_INPUT;
-+
-+    for (i = 0; i <= RTL8367C_MC2SIDXMAX; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanMC2SConf(i, &svlanMC2SConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (TRUE == svlanMC2SConf.valid &&
-+            svlanMC2SConf.format == SVLAN_MC2S_MODE_IP &&
-+            svlanMC2SConf.sdata == ipmc &&
-+            svlanMC2SConf.smask == ipmcMsk)
-+        {
-+            if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(svlanMC2SConf.svidx, &svlanMemConf)) != RT_ERR_OK)
-+                return retVal;
-+            *pSvid = svlanMemConf.vs_svid;
-+            return RT_ERR_OK;
-+        }
-+    }
-+
-+    return RT_ERR_OUT_OF_RANGE;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_l2mc2s_add
-+ * Description:
-+ *      Add L2 multicast address to SVLAN
-+ * Input:
-+ *      mac     - L2 multicast address
-+ *      macMsk  - L2 multicast address mask
-+ *      svid    - SVLAN VID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_SVLAN_VID                - Invalid SVLAN VID parameter.
-+ *      RT_ERR_SVLAN_ENTRY_NOT_FOUND    - specified svlan entry not found.
-+ *      RT_ERR_OUT_OF_RANGE             - input out of range.
-+ *      RT_ERR_INPUT                    - Invalid input parameters.
-+ * Note:
-+ *      The API can set L2 Mutlicast to SVID configuration. If upstream packet is L2 multicast
-+ *      packet and DMAC is matched, ASIC will assign egress SVID to the packet. There are 32
-+ *      SVLAN multicast configurations for IP and L2 multicast.
-+ */
-+rtk_api_ret_t rtk_svlan_l2mc2s_add(rtk_mac_t mac, rtk_mac_t macMsk, rtk_vlan_t svid)
-+{
-+    rtk_api_ret_t retVal, i;
-+    rtk_uint32 empty_idx;
-+    rtk_uint32 svidx, l2add, l2Mask;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+    rtl8367c_svlan_mc2s_t svlanMC2SConf;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (svid > RTL8367C_VIDMAX)
-+        return RT_ERR_SVLAN_VID;
-+
-+    if (mac.octet[0]!= 1&&mac.octet[1]!=0)
-+        return RT_ERR_INPUT;
-+
-+    l2add = (mac.octet[2] << 24) | (mac.octet[3] << 16) | (mac.octet[4] << 8) | mac.octet[5];
-+    l2Mask = (macMsk.octet[2] << 24) | (macMsk.octet[3] << 16) | (macMsk.octet[4] << 8) | macMsk.octet[5];
-+
-+    svidx = 0xFFFF;
-+
-+    for (i = 0; i < RTL8367C_SVIDXNO; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(i, &svlanMemConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (svid == svlanMemConf.vs_svid)
-+        {
-+            svidx = i;
-+            break;
-+        }
-+    }
-+
-+    if (0xFFFF == svidx)
-+        return RT_ERR_SVLAN_ENTRY_NOT_FOUND;
-+
-+    empty_idx = 0xFFFF;
-+
-+    for (i = RTL8367C_MC2SIDXMAX; i >=0; i--)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanMC2SConf(i, &svlanMC2SConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (TRUE == svlanMC2SConf.valid)
-+        {
-+            if (svlanMC2SConf.format == SVLAN_MC2S_MODE_MAC &&
-+                svlanMC2SConf.sdata==l2add&&
-+                svlanMC2SConf.smask==l2Mask)
-+            {
-+                svlanMC2SConf.svidx = svidx;
-+                if ((retVal = rtl8367c_setAsicSvlanMC2SConf(i, &svlanMC2SConf)) != RT_ERR_OK)
-+                    return retVal;
-+            }
-+        }
-+        else
-+        {
-+            empty_idx = i;
-+        }
-+    }
-+
-+    if (empty_idx!=0xFFFF)
-+    {
-+        svlanMC2SConf.valid = TRUE;
-+        svlanMC2SConf.svidx = svidx;
-+        svlanMC2SConf.format = SVLAN_MC2S_MODE_MAC;
-+        svlanMC2SConf.sdata = l2add;
-+        svlanMC2SConf.smask = l2Mask;
-+
-+        if ((retVal = rtl8367c_setAsicSvlanMC2SConf(empty_idx, &svlanMC2SConf)) != RT_ERR_OK)
-+            return retVal;
-+        return RT_ERR_OK;
-+    }
-+
-+    return RT_ERR_OUT_OF_RANGE;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_l2mc2s_del
-+ * Description:
-+ *      delete L2 multicast address to SVLAN
-+ * Input:
-+ *      mac     - L2 multicast address
-+ *      macMsk  - L2 multicast address mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_SVLAN_VID        - Invalid SVLAN VID parameter.
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ * Note:
-+ *      The API can delete Mutlicast to SVID configuration. There are 32 SVLAN multicast configurations for IP and L2 multicast.
-+ */
-+rtk_api_ret_t rtk_svlan_l2mc2s_del(rtk_mac_t mac, rtk_mac_t macMsk)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 i;
-+    rtk_uint32 l2add, l2Mask;
-+    rtl8367c_svlan_mc2s_t svlanMC2SConf;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (mac.octet[0]!= 1&&mac.octet[1]!=0)
-+        return RT_ERR_INPUT;
-+
-+    l2add = (mac.octet[2] << 24) | (mac.octet[3] << 16) | (mac.octet[4] << 8) | mac.octet[5];
-+    l2Mask = (macMsk.octet[2] << 24) | (macMsk.octet[3] << 16) | (macMsk.octet[4] << 8) | macMsk.octet[5];
-+
-+    for (i = 0; i <= RTL8367C_MC2SIDXMAX; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanMC2SConf(i, &svlanMC2SConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (TRUE == svlanMC2SConf.valid)
-+        {
-+            if (svlanMC2SConf.format == SVLAN_MC2S_MODE_MAC &&
-+                svlanMC2SConf.sdata==l2add&&
-+                svlanMC2SConf.smask==l2Mask)
-+            {
-+                memset(&svlanMC2SConf, 0, sizeof(rtl8367c_svlan_mc2s_t));
-+                if ((retVal = rtl8367c_setAsicSvlanMC2SConf(i, &svlanMC2SConf)) != RT_ERR_OK)
-+                    return retVal;
-+                return RT_ERR_OK;
-+            }
-+        }
-+    }
-+
-+    return RT_ERR_OUT_OF_RANGE;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_l2mc2s_get
-+ * Description:
-+ *      Get L2 multicast address to SVLAN
-+ * Input:
-+ *      mac     - L2 multicast address
-+ *      macMsk  - L2 multicast address mask
-+ * Output:
-+ *      pSvid - SVLAN VID
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_INPUT            - Invalid input parameters.
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ * Note:
-+ *      The API can get L2 mutlicast to SVID configuration. There are 32 SVLAN multicast configurations for IP and L2 multicast.
-+ */
-+rtk_api_ret_t rtk_svlan_l2mc2s_get(rtk_mac_t mac, rtk_mac_t macMsk, rtk_vlan_t *pSvid)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 i;
-+    rtk_uint32 l2add,l2Mask;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+    rtl8367c_svlan_mc2s_t svlanMC2SConf;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pSvid)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (mac.octet[0]!= 1&&mac.octet[1]!=0)
-+        return RT_ERR_INPUT;
-+
-+    l2add = (mac.octet[2] << 24) | (mac.octet[3] << 16) | (mac.octet[4] << 8) | mac.octet[5];
-+    l2Mask = (macMsk.octet[2] << 24) | (macMsk.octet[3] << 16) | (macMsk.octet[4] << 8) | macMsk.octet[5];
-+
-+    for (i = 0; i <= RTL8367C_MC2SIDXMAX; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanMC2SConf(i, &svlanMC2SConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (TRUE == svlanMC2SConf.valid)
-+        {
-+            if (svlanMC2SConf.format == SVLAN_MC2S_MODE_MAC &&
-+                svlanMC2SConf.sdata==l2add&&
-+                svlanMC2SConf.smask==l2Mask)
-+            {
-+                if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(svlanMC2SConf.svidx, &svlanMemConf)) != RT_ERR_OK)
-+                    return retVal;
-+                *pSvid = svlanMemConf.vs_svid;
-+
-+                return RT_ERR_OK;
-+            }
-+        }
-+    }
-+
-+    return RT_ERR_OUT_OF_RANGE;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_sp2c_add
-+ * Description:
-+ *      Add system SP2C configuration
-+ * Input:
-+ *      cvid        - VLAN ID
-+ *      dst_port    - Destination port of SVLAN to CVLAN configuration
-+ *      svid        - SVLAN VID
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_SVLAN_VID    - Invalid SVLAN VID parameter.
-+ *      RT_ERR_VLAN_VID     - Invalid VID parameter.
-+ *      RT_ERR_OUT_OF_RANGE - input out of range.
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      The API can add SVID & Destination Port to CVLAN configuration. The downstream frames with assigned
-+ *      SVID will be add C-tag with assigned CVID if the output port is the assigned destination port.
-+ *      There are 128 SP2C configurations.
-+ */
-+rtk_api_ret_t rtk_svlan_sp2c_add(rtk_vlan_t svid, rtk_port_t dst_port, rtk_vlan_t cvid)
-+{
-+    rtk_api_ret_t retVal, i;
-+    rtk_uint32 empty_idx, svidx;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+    rtl8367c_svlan_s2c_t svlanSP2CConf;
-+    rtk_port_t port;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (svid > RTL8367C_VIDMAX)
-+        return RT_ERR_SVLAN_VID;
-+
-+    if (cvid > RTL8367C_VIDMAX)
-+        return RT_ERR_VLAN_VID;
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(dst_port);
-+    port = rtk_switch_port_L2P_get(dst_port);
-+
-+    svidx = 0xFFFF;
-+
-+    for (i = 0; i < RTL8367C_SVIDXNO; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(i, &svlanMemConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (svid == svlanMemConf.vs_svid)
-+        {
-+            svidx = i;
-+            break;
-+        }
-+    }
-+
-+    if (0xFFFF == svidx)
-+        return RT_ERR_SVLAN_ENTRY_NOT_FOUND;
-+
-+    empty_idx = 0xFFFF;
-+
-+    for (i=RTL8367C_SP2CMAX; i >=0 ; i--)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanSP2CConf(i, &svlanSP2CConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ( (svlanSP2CConf.svidx == svidx) && (svlanSP2CConf.dstport == port) && (svlanSP2CConf.valid == 1))
-+        {
-+            empty_idx = i;
-+            break;
-+        }
-+        else if (svlanSP2CConf.valid == 0)
-+        {
-+            empty_idx = i;
-+        }
-+    }
-+
-+    if (empty_idx!=0xFFFF)
-+    {
-+        svlanSP2CConf.valid     = 1;
-+        svlanSP2CConf.vid       = cvid;
-+        svlanSP2CConf.svidx     = svidx;
-+        svlanSP2CConf.dstport   = port;
-+
-+        if ((retVal = rtl8367c_setAsicSvlanSP2CConf(empty_idx, &svlanSP2CConf)) != RT_ERR_OK)
-+            return retVal;
-+        return RT_ERR_OK;
-+    }
-+
-+    return RT_ERR_OUT_OF_RANGE;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_sp2c_get
-+ * Description:
-+ *      Get configure system SP2C content
-+ * Input:
-+ *      svid        - SVLAN VID
-+ *      dst_port    - Destination port of SVLAN to CVLAN configuration
-+ * Output:
-+ *      pCvid - VLAN ID
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_OUT_OF_RANGE - input out of range.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_SVLAN_VID    - Invalid SVLAN VID parameter.
-+ * Note:
-+ *     The API can get SVID & Destination Port to CVLAN configuration. There are 128 SP2C configurations.
-+ */
-+rtk_api_ret_t rtk_svlan_sp2c_get(rtk_vlan_t svid, rtk_port_t dst_port, rtk_vlan_t *pCvid)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 i, svidx;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+    rtl8367c_svlan_s2c_t svlanSP2CConf;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pCvid)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (svid > RTL8367C_VIDMAX)
-+        return RT_ERR_SVLAN_VID;
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(dst_port);
-+    dst_port = rtk_switch_port_L2P_get(dst_port);
-+
-+    svidx = 0xFFFF;
-+
-+    for (i = 0; i < RTL8367C_SVIDXNO; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(i, &svlanMemConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (svid == svlanMemConf.vs_svid)
-+        {
-+            svidx = i;
-+            break;
-+        }
-+    }
-+
-+    if (0xFFFF == svidx)
-+        return RT_ERR_SVLAN_ENTRY_NOT_FOUND;
-+
-+    for (i = 0; i <= RTL8367C_SP2CMAX; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanSP2CConf(i, &svlanSP2CConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ( (svlanSP2CConf.svidx == svidx) && (svlanSP2CConf.dstport == dst_port) && (svlanSP2CConf.valid == 1) )
-+        {
-+            *pCvid = svlanSP2CConf.vid;
-+            return RT_ERR_OK;
-+        }
-+    }
-+
-+    return RT_ERR_OUT_OF_RANGE;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_sp2c_del
-+ * Description:
-+ *      Delete system SP2C configuration
-+ * Input:
-+ *      svid        - SVLAN VID
-+ *      dst_port    - Destination port of SVLAN to CVLAN configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_SVLAN_VID    - Invalid SVLAN VID parameter.
-+ *      RT_ERR_OUT_OF_RANGE - input out of range.
-+ * Note:
-+ *      The API can delete SVID & Destination Port to CVLAN configuration. There are 128 SP2C configurations.
-+ */
-+rtk_api_ret_t rtk_svlan_sp2c_del(rtk_vlan_t svid, rtk_port_t dst_port)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 i, svidx;
-+    rtl8367c_svlan_memconf_t svlanMemConf;
-+    rtl8367c_svlan_s2c_t svlanSP2CConf;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (svid > RTL8367C_VIDMAX)
-+        return RT_ERR_SVLAN_VID;
-+
-+    /* Check port Valid */
-+    RTK_CHK_PORT_VALID(dst_port);
-+    dst_port = rtk_switch_port_L2P_get(dst_port);
-+
-+    svidx = 0xFFFF;
-+
-+    for (i = 0; i < RTL8367C_SVIDXNO; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanMemberConfiguration(i, &svlanMemConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (svid == svlanMemConf.vs_svid)
-+        {
-+            svidx = i;
-+            break;
-+        }
-+    }
-+
-+    if (0xFFFF == svidx)
-+        return RT_ERR_SVLAN_ENTRY_NOT_FOUND;
-+
-+    for (i = 0; i <= RTL8367C_SP2CMAX; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicSvlanSP2CConf(i, &svlanSP2CConf)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ( (svlanSP2CConf.svidx == svidx) && (svlanSP2CConf.dstport == dst_port) && (svlanSP2CConf.valid == 1) )
-+        {
-+            svlanSP2CConf.valid     = 0;
-+            svlanSP2CConf.vid       = 0;
-+            svlanSP2CConf.svidx     = 0;
-+            svlanSP2CConf.dstport   = 0;
-+
-+            if ((retVal = rtl8367c_setAsicSvlanSP2CConf(i, &svlanSP2CConf)) != RT_ERR_OK)
-+                return retVal;
-+            return RT_ERR_OK;
-+        }
-+
-+    }
-+
-+    return RT_ERR_OUT_OF_RANGE;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_lookupType_set
-+ * Description:
-+ *      Set lookup type of SVLAN
-+ * Input:
-+ *      type        - lookup type
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ * Note:
-+ *      none
-+ */
-+rtk_api_ret_t rtk_svlan_lookupType_set(rtk_svlan_lookupType_t type)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type >= SVLAN_LOOKUP_END)
-+        return RT_ERR_CHIP_NOT_SUPPORTED;
-+
-+
-+    svlan_lookupType = type;
-+
-+    retVal = rtl8367c_setAsicSvlanLookupType((rtk_uint32)type);
-+
-+    return retVal;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_lookupType_get
-+ * Description:
-+ *      Get lookup type of SVLAN
-+ * Input:
-+ *      pType       - lookup type
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ * Note:
-+ *      none
-+ */
-+rtk_api_ret_t rtk_svlan_lookupType_get(rtk_svlan_lookupType_t *pType)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pType)
-+        return RT_ERR_NULL_POINTER;
-+
-+    retVal = rtl8367c_getAsicSvlanLookupType(pType);
-+
-+    svlan_lookupType = *pType;
-+
-+    return retVal;
-+}
-+
-+/* Function Name:
-+ *      rtk_svlan_trapPri_set
-+ * Description:
-+ *      Set svlan trap priority
-+ * Input:
-+ *      priority - priority for trap packets
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_QOS_INT_PRIORITY
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_svlan_trapPri_set(rtk_pri_t priority)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    RTK_CHK_INIT_STATE();
-+
-+    if(priority > RTL8367C_PRIMAX)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    retVal = rtl8367c_setAsicSvlanTrapPriority(priority);
-+
-+    return retVal;
-+}   /* end of rtk_svlan_trapPri_set */
-+
-+/* Function Name:
-+ *      rtk_svlan_trapPri_get
-+ * Description:
-+ *      Get svlan trap priority
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pPriority - priority for trap packets
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Note:
-+ *      None
-+ */
-+rtk_api_ret_t rtk_svlan_trapPri_get(rtk_pri_t *pPriority)
-+{
-+    rtk_api_ret_t   retVal;
-+
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pPriority)
-+        return RT_ERR_NULL_POINTER;
-+
-+    retVal = rtl8367c_getAsicSvlanTrapPriority(pPriority);
-+
-+    return retVal;
-+}   /* end of rtk_svlan_trapPri_get */
-+
-+
-+/* Function Name:
-+ *      rtk_svlan_checkAndCreateMbr
-+ * Description:
-+ *      Check and create Member configuration and return index
-+ * Input:
-+ *      vid  - VLAN id.
-+ * Output:
-+ *      pIndex  - Member configuration index
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_VLAN_VID     - Invalid VLAN ID.
-+ *      RT_ERR_TBL_FULL     - Member Configuration table full
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_svlan_checkAndCreateMbr(rtk_vlan_t vid, rtk_uint32 *pIndex)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 svidx;
-+    rtk_uint32 empty_idx = 0xFFFF;
-+    rtl8367c_svlan_memconf_t svlan_cfg;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* vid must be 0~4095 */
-+    if (vid > RTL8367C_VIDMAX)
-+        return RT_ERR_VLAN_VID;
-+
-+    /* Null pointer check */
-+    if(NULL == pIndex)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* Search exist entry */
-+    for (svidx = 0; svidx <= RTL8367C_SVIDXMAX; svidx++)
-+    {
-+        if(svlan_mbrCfgUsage[svidx] == TRUE)
-+        {
-+            if(svlan_mbrCfgVid[svidx] == vid)
-+            {
-+                /* Found! return index */
-+                *pIndex = svidx;
-+                return RT_ERR_OK;
-+            }
-+        }
-+        else if(empty_idx == 0xFFFF)
-+        {
-+            empty_idx = svidx;
-+        }
-+
-+    }
-+
-+    if(empty_idx == 0xFFFF)
-+    {
-+        /* No empty index */
-+        return RT_ERR_TBL_FULL;
-+    }
-+
-+    svlan_mbrCfgUsage[empty_idx] = TRUE;
-+    svlan_mbrCfgVid[empty_idx] = vid;
-+
-+    memset(&svlan_cfg, 0, sizeof(rtl8367c_svlan_memconf_t));
-+
-+    svlan_cfg.vs_svid = vid;
-+    /*for create check*/
-+    if(vid == 0)
-+    {
-+        svlan_cfg.vs_efid = 1;
-+    }
-+
-+    if((retVal = rtl8367c_setAsicSvlanMemberConfiguration(empty_idx, &svlan_cfg)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pIndex = empty_idx;
-+    return RT_ERR_OK;
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/trap.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/trap.c
-new file mode 100644
-index 0000000000..af9661058b
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/trap.c
-@@ -0,0 +1,1229 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in Trap module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <trap.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_port.h>
-+#include <rtl8367c_asicdrv_igmp.h>
-+#include <rtl8367c_asicdrv_rma.h>
-+#include <rtl8367c_asicdrv_eav.h>
-+#include <rtl8367c_asicdrv_oam.h>
-+#include <rtl8367c_asicdrv_svlan.h>
-+#include <rtl8367c_asicdrv_unknownMulticast.h>
-+#include <rtl8367c_asicdrv_dot1x.h>
-+
-+/* Function Name:
-+ *      rtk_trap_unknownUnicastPktAction_set
-+ * Description:
-+ *      Set unknown unicast packet action configuration.
-+ * Input:
-+ *      port            - ingress port ID for unknown unicast packet
-+ *      ucast_action    - Unknown unicast action.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_NOT_ALLOWED         - Invalid action.
-+ *      RT_ERR_INPUT               - Invalid input parameters.
-+ * Note:
-+ *      This API can set unknown unicast packet action configuration.
-+ *      The unknown unicast action is as following:
-+ *          - UCAST_ACTION_FORWARD_PMASK
-+ *          - UCAST_ACTION_DROP
-+ *          - UCAST_ACTION_TRAP2CPU
-+ *          - UCAST_ACTION_FLOODING
-+ */
-+rtk_api_ret_t rtk_trap_unknownUnicastPktAction_set(rtk_port_t port, rtk_trap_ucast_action_t ucast_action)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (ucast_action >= UCAST_ACTION_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicPortUnknownDaBehavior(rtk_switch_port_L2P_get(port), ucast_action)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trap_unknownUnicastPktAction_get
-+ * Description:
-+ *      Get unknown unicast packet action configuration.
-+ * Input:
-+ *      port            - ingress port ID for unknown unicast packet
-+ * Output:
-+ *      pUcast_action   - Unknown unicast action.
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_NOT_ALLOWED         - Invalid action.
-+ *      RT_ERR_INPUT               - Invalid input parameters.
-+ *      RT_ERR_NULL_POINTER        - Null pointer
-+ * Note:
-+ *      This API can get unknown unicast packet action configuration.
-+ *      The unknown unicast action is as following:
-+ *          - UCAST_ACTION_FORWARD_PMASK
-+ *          - UCAST_ACTION_DROP
-+ *          - UCAST_ACTION_TRAP2CPU
-+ *          - UCAST_ACTION_FLOODING
-+ */
-+rtk_api_ret_t rtk_trap_unknownUnicastPktAction_get(rtk_port_t port, rtk_trap_ucast_action_t *pUcast_action)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (NULL == pUcast_action)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortUnknownDaBehavior(rtk_switch_port_L2P_get(port), pUcast_action)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trap_unknownMacPktAction_set
-+ * Description:
-+ *      Set unknown source MAC packet action configuration.
-+ * Input:
-+ *      ucast_action    - Unknown source MAC action.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_NOT_ALLOWED         - Invalid action.
-+ *      RT_ERR_INPUT               - Invalid input parameters.
-+ * Note:
-+ *      This API can set unknown unicast packet action configuration.
-+ *      The unknown unicast action is as following:
-+ *          - UCAST_ACTION_FORWARD_PMASK
-+ *          - UCAST_ACTION_DROP
-+ *          - UCAST_ACTION_TRAP2CPU
-+ */
-+rtk_api_ret_t rtk_trap_unknownMacPktAction_set(rtk_trap_ucast_action_t ucast_action)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (ucast_action >= UCAST_ACTION_FLOODING)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicPortUnknownSaBehavior(ucast_action)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trap_unknownMacPktAction_get
-+ * Description:
-+ *      Get unknown source MAC packet action configuration.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pUcast_action   - Unknown source MAC action.
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_NULL_POINTER        - Null Pointer.
-+ *      RT_ERR_INPUT               - Invalid input parameters.
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_trap_unknownMacPktAction_get(rtk_trap_ucast_action_t *pUcast_action)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pUcast_action)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortUnknownSaBehavior(pUcast_action)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trap_unmatchMacPktAction_set
-+ * Description:
-+ *      Set unmatch source MAC packet action configuration.
-+ * Input:
-+ *      ucast_action    - Unknown source MAC action.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_NOT_ALLOWED         - Invalid action.
-+ *      RT_ERR_INPUT               - Invalid input parameters.
-+ * Note:
-+ *      This API can set unknown unicast packet action configuration.
-+ *      The unknown unicast action is as following:
-+ *          - UCAST_ACTION_FORWARD_PMASK
-+ *          - UCAST_ACTION_DROP
-+ *          - UCAST_ACTION_TRAP2CPU
-+ */
-+rtk_api_ret_t rtk_trap_unmatchMacPktAction_set(rtk_trap_ucast_action_t ucast_action)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (ucast_action >= UCAST_ACTION_FLOODING)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicPortUnmatchedSaBehavior(ucast_action)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trap_unmatchMacPktAction_get
-+ * Description:
-+ *      Get unmatch source MAC packet action configuration.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pUcast_action   - Unknown source MAC action.
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_NOT_ALLOWED         - Invalid action.
-+ *      RT_ERR_INPUT               - Invalid input parameters.
-+ * Note:
-+ *      This API can set unknown unicast packet action configuration.
-+ *      The unknown unicast action is as following:
-+ *          - UCAST_ACTION_FORWARD_PMASK
-+ *          - UCAST_ACTION_DROP
-+ *          - UCAST_ACTION_TRAP2CPU
-+ */
-+rtk_api_ret_t rtk_trap_unmatchMacPktAction_get(rtk_trap_ucast_action_t *pUcast_action)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pUcast_action)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortUnmatchedSaBehavior(pUcast_action)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trap_unmatchMacMoving_set
-+ * Description:
-+ *      Set unmatch source MAC packet moving state.
-+ * Input:
-+ *      port        - Port ID.
-+ *      enable      - ENABLED: allow SA moving, DISABLE: don't allow SA moving.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_NOT_ALLOWED         - Invalid action.
-+ *      RT_ERR_INPUT               - Invalid input parameters.
-+ * Note:
-+ */
-+rtk_api_ret_t rtk_trap_unmatchMacMoving_set(rtk_port_t port, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(enable >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicPortUnmatchedSaMoving(rtk_switch_port_L2P_get(port), enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trap_unmatchMacMoving_get
-+ * Description:
-+ *      Set unmatch source MAC packet moving state.
-+ * Input:
-+ *      port        - Port ID.
-+ * Output:
-+ *      pEnable     - ENABLED: allow SA moving, DISABLE: don't allow SA moving.
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_NOT_ALLOWED         - Invalid action.
-+ *      RT_ERR_INPUT               - Invalid input parameters.
-+ * Note:
-+ */
-+rtk_api_ret_t rtk_trap_unmatchMacMoving_get(rtk_port_t port, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* check port valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortUnmatchedSaMoving(rtk_switch_port_L2P_get(port), pEnable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trap_unknownMcastPktAction_set
-+ * Description:
-+ *      Set behavior of unknown multicast
-+ * Input:
-+ *      port            - Port id.
-+ *      type            - unknown multicast packet type.
-+ *      mcast_action    - unknown multicast action.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID         - Invalid port number.
-+ *      RT_ERR_NOT_ALLOWED     - Invalid action.
-+ *      RT_ERR_INPUT         - Invalid input parameters.
-+ * Note:
-+ *      When receives an unknown multicast packet, switch may trap, drop or flood this packet
-+ *      (1) The unknown multicast packet type is as following:
-+ *          - MCAST_L2
-+ *          - MCAST_IPV4
-+ *          - MCAST_IPV6
-+ *      (2) The unknown multicast action is as following:
-+ *          - MCAST_ACTION_FORWARD
-+ *          - MCAST_ACTION_DROP
-+ *          - MCAST_ACTION_TRAP2CPU
-+ */
-+rtk_api_ret_t rtk_trap_unknownMcastPktAction_set(rtk_port_t port, rtk_mcast_type_t type, rtk_trap_mcast_action_t mcast_action)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 rawAction;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (type >= MCAST_END)
-+        return RT_ERR_INPUT;
-+
-+    if (mcast_action >= MCAST_ACTION_END)
-+        return RT_ERR_INPUT;
-+
-+
-+    switch (type)
-+    {
-+        case MCAST_L2:
-+            if (MCAST_ACTION_ROUTER_PORT == mcast_action)
-+                return RT_ERR_INPUT;
-+            else if(MCAST_ACTION_DROP_EX_RMA == mcast_action)
-+                rawAction = L2_UNKOWN_MULTICAST_DROP_EXCLUDE_RMA;
-+            else
-+                rawAction = (rtk_uint32)mcast_action;
-+
-+            if ((retVal = rtl8367c_setAsicUnknownL2MulticastBehavior(rtk_switch_port_L2P_get(port), rawAction)) != RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case MCAST_IPV4:
-+            if (MCAST_ACTION_DROP_EX_RMA == mcast_action)
-+                return RT_ERR_INPUT;
-+            else
-+                rawAction = (rtk_uint32)mcast_action;
-+
-+            if ((retVal = rtl8367c_setAsicUnknownIPv4MulticastBehavior(rtk_switch_port_L2P_get(port), rawAction)) != RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case MCAST_IPV6:
-+            if (MCAST_ACTION_DROP_EX_RMA == mcast_action)
-+                return RT_ERR_INPUT;
-+            else
-+                rawAction = (rtk_uint32)mcast_action;
-+
-+            if ((retVal = rtl8367c_setAsicUnknownIPv6MulticastBehavior(rtk_switch_port_L2P_get(port), rawAction)) != RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        default:
-+            break;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trap_unknownMcastPktAction_get
-+ * Description:
-+ *      Get behavior of unknown multicast
-+ * Input:
-+ *      type - unknown multicast packet type.
-+ * Output:
-+ *      pMcast_action - unknown multicast action.
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_PORT_ID             - Invalid port number.
-+ *      RT_ERR_NOT_ALLOWED         - Invalid operation.
-+ *      RT_ERR_INPUT             - Invalid input parameters.
-+ * Note:
-+ *      When receives an unknown multicast packet, switch may trap, drop or flood this packet
-+ *      (1) The unknown multicast packet type is as following:
-+ *          - MCAST_L2
-+ *          - MCAST_IPV4
-+ *          - MCAST_IPV6
-+ *      (2) The unknown multicast action is as following:
-+ *          - MCAST_ACTION_FORWARD
-+ *          - MCAST_ACTION_DROP
-+ *          - MCAST_ACTION_TRAP2CPU
-+ */
-+rtk_api_ret_t rtk_trap_unknownMcastPktAction_get(rtk_port_t port, rtk_mcast_type_t type, rtk_trap_mcast_action_t *pMcast_action)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 rawAction;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (type >= MCAST_END)
-+        return RT_ERR_INPUT;
-+
-+    if(NULL == pMcast_action)
-+        return RT_ERR_NULL_POINTER;
-+
-+    switch (type)
-+    {
-+        case MCAST_L2:
-+            if ((retVal = rtl8367c_getAsicUnknownL2MulticastBehavior(rtk_switch_port_L2P_get(port), &rawAction)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if(L2_UNKOWN_MULTICAST_DROP_EXCLUDE_RMA == rawAction)
-+                *pMcast_action = MCAST_ACTION_DROP_EX_RMA;
-+            else
-+                *pMcast_action = (rtk_trap_mcast_action_t)rawAction;
-+
-+            break;
-+        case MCAST_IPV4:
-+            if ((retVal = rtl8367c_getAsicUnknownIPv4MulticastBehavior(rtk_switch_port_L2P_get(port), &rawAction)) != RT_ERR_OK)
-+                return retVal;
-+
-+            *pMcast_action = (rtk_trap_mcast_action_t)rawAction;
-+            break;
-+        case MCAST_IPV6:
-+            if ((retVal = rtl8367c_getAsicUnknownIPv6MulticastBehavior(rtk_switch_port_L2P_get(port), &rawAction)) != RT_ERR_OK)
-+                return retVal;
-+
-+            *pMcast_action = (rtk_trap_mcast_action_t)rawAction;
-+            break;
-+        default:
-+            break;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trap_lldpEnable_set
-+ * Description:
-+ *      Set LLDP enable.
-+ * Input:
-+ *      enabled - LLDP enable, 0: follow RMA, 1: use LLDP action.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                  - OK
-+ *      RT_ERR_FAILED              - Failed
-+ *      RT_ERR_SMI                 - SMI access error
-+ *      RT_ERR_NOT_ALLOWED         - Invalid action.
-+ *      RT_ERR_INPUT             - Invalid input parameters.
-+ * Note:
-+ *      - DMAC                                                 Assignment
-+ *      - 01:80:c2:00:00:0e ethertype = 0x88CC    LLDP
-+ *      - 01:80:c2:00:00:03 ethertype = 0x88CC
-+ *      - 01:80:c2:00:00:00 ethertype = 0x88CC
-+
-+ */
-+rtk_api_ret_t rtk_trap_lldpEnable_set(rtk_enable_t enabled)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_rma_t rmacfg;
-+    rtk_enable_t tmp;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (enabled >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_getAsicRmaLldp(&tmp, &rmacfg)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicRmaLldp(enabled, &rmacfg)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trap_lldpEnable_get
-+ * Description:
-+ *      Get LLDP status.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnabled - LLDP enable, 0: follow RMA, 1: use LLDP action.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT         - Invalid input parameters.
-+ * Note:
-+ *      LLDP is as following definition.
-+ *      - DMAC                                                 Assignment
-+ *      - 01:80:c2:00:00:0e ethertype = 0x88CC    LLDP
-+ *      - 01:80:c2:00:00:03 ethertype = 0x88CC
-+ *      - 01:80:c2:00:00:00 ethertype = 0x88CC
-+ */
-+rtk_api_ret_t rtk_trap_lldpEnable_get(rtk_enable_t *pEnabled)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_rma_t rmacfg;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pEnabled)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicRmaLldp(pEnabled, &rmacfg)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trap_reasonTrapToCpuPriority_set
-+ * Description:
-+ *      Set priority value of a packet that trapped to CPU port according to specific reason.
-+ * Input:
-+ *      type     - reason that trap to CPU port.
-+ *      priority - internal priority that is going to be set for specific trap reason.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT - The module is not initial
-+ *      RT_ERR_INPUT    - Invalid input parameter
-+ * Note:
-+ *      Currently the trap reason that supported are listed as follows:
-+ *      - TRAP_REASON_RMA
-+ *      - TRAP_REASON_OAM
-+ *      - TRAP_REASON_1XUNAUTH
-+ *      - TRAP_REASON_VLANSTACK
-+ *      - TRAP_REASON_UNKNOWNMC
-+ */
-+rtk_api_ret_t rtk_trap_reasonTrapToCpuPriority_set(rtk_trap_reason_type_t type, rtk_pri_t priority)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_rma_t rmacfg;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type >= TRAP_REASON_END)
-+        return RT_ERR_INPUT;
-+
-+    if (priority > RTL8367C_PRIMAX)
-+        return  RT_ERR_QOS_INT_PRIORITY;
-+
-+    switch (type)
-+    {
-+        case TRAP_REASON_RMA:
-+            if ((retVal = rtl8367c_getAsicRma(0, &rmacfg)) != RT_ERR_OK)
-+                return retVal;
-+            rmacfg.trap_priority= priority;
-+            if ((retVal = rtl8367c_setAsicRma(0, &rmacfg)) != RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case TRAP_REASON_OAM:
-+            if ((retVal = rtl8367c_setAsicOamCpuPri(priority)) != RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case TRAP_REASON_1XUNAUTH:
-+            if ((retVal = rtl8367c_setAsic1xTrapPriority(priority)) != RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case TRAP_REASON_VLANSTACK:
-+            if ((retVal = rtl8367c_setAsicSvlanTrapPriority(priority)) != RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case TRAP_REASON_UNKNOWNMC:
-+            if ((retVal = rtl8367c_setAsicUnknownMulticastTrapPriority(priority)) != RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        default:
-+            return RT_ERR_CHIP_NOT_SUPPORTED;
-+    }
-+
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+/* Function Name:
-+ *      rtk_trap_reasonTrapToCpuPriority_get
-+ * Description:
-+ *      Get priority value of a packet that trapped to CPU port according to specific reason.
-+ * Input:
-+ *      type      - reason that trap to CPU port.
-+ * Output:
-+ *      pPriority - configured internal priority for such reason.
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NOT_INIT     - The module is not initial
-+ *      RT_ERR_INPUT        - Invalid input parameter
-+ *      RT_ERR_NULL_POINTER - NULL pointer
-+ * Note:
-+ *      Currently the trap reason that supported are listed as follows:
-+ *      - TRAP_REASON_RMA
-+ *      - TRAP_REASON_OAM
-+ *      - TRAP_REASON_1XUNAUTH
-+ *      - TRAP_REASON_VLANSTACK
-+ *      - TRAP_REASON_UNKNOWNMC
-+ */
-+rtk_api_ret_t rtk_trap_reasonTrapToCpuPriority_get(rtk_trap_reason_type_t type, rtk_pri_t *pPriority)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_rma_t rmacfg;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type >= TRAP_REASON_END)
-+        return RT_ERR_INPUT;
-+
-+    if(NULL == pPriority)
-+        return RT_ERR_NULL_POINTER;
-+
-+    switch (type)
-+    {
-+        case TRAP_REASON_RMA:
-+            if ((retVal = rtl8367c_getAsicRma(0, &rmacfg)) != RT_ERR_OK)
-+                return retVal;
-+            *pPriority = rmacfg.trap_priority;
-+
-+            break;
-+        case TRAP_REASON_OAM:
-+            if ((retVal = rtl8367c_getAsicOamCpuPri(pPriority)) != RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case TRAP_REASON_1XUNAUTH:
-+            if ((retVal = rtl8367c_getAsic1xTrapPriority(pPriority)) != RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case TRAP_REASON_VLANSTACK:
-+            if ((retVal = rtl8367c_getAsicSvlanTrapPriority(pPriority)) != RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        case TRAP_REASON_UNKNOWNMC:
-+            if ((retVal = rtl8367c_getAsicUnknownMulticastTrapPriority(pPriority)) != RT_ERR_OK)
-+                return retVal;
-+
-+            break;
-+        default:
-+            return RT_ERR_CHIP_NOT_SUPPORTED;
-+
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+
-+/* Function Name:
-+ *      rtk_trap_rmaAction_set
-+ * Description:
-+ *      Set Reserved multicast address action configuration.
-+ * Input:
-+ *      type    - rma type.
-+ *      rma_action - RMA action.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *
-+ *      There are 48 types of Reserved Multicast Address frame for application usage.
-+ *      (1)They are as following definition.
-+ *      - TRAP_BRG_GROUP,
-+ *      - TRAP_FD_PAUSE,
-+ *      - TRAP_SP_MCAST,
-+ *      - TRAP_1X_PAE,
-+ *      - TRAP_UNDEF_BRG_04,
-+ *      - TRAP_UNDEF_BRG_05,
-+ *      - TRAP_UNDEF_BRG_06,
-+ *      - TRAP_UNDEF_BRG_07,
-+ *      - TRAP_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - TRAP_UNDEF_BRG_09,
-+ *      - TRAP_UNDEF_BRG_0A,
-+ *      - TRAP_UNDEF_BRG_0B,
-+ *      - TRAP_UNDEF_BRG_0C,
-+ *      - TRAP_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - TRAP_8021AB,
-+ *      - TRAP_UNDEF_BRG_0F,
-+ *      - TRAP_BRG_MNGEMENT,
-+ *      - TRAP_UNDEFINED_11,
-+ *      - TRAP_UNDEFINED_12,
-+ *      - TRAP_UNDEFINED_13,
-+ *      - TRAP_UNDEFINED_14,
-+ *      - TRAP_UNDEFINED_15,
-+ *      - TRAP_UNDEFINED_16,
-+ *      - TRAP_UNDEFINED_17,
-+ *      - TRAP_UNDEFINED_18,
-+ *      - TRAP_UNDEFINED_19,
-+ *      - TRAP_UNDEFINED_1A,
-+ *      - TRAP_UNDEFINED_1B,
-+ *      - TRAP_UNDEFINED_1C,
-+ *      - TRAP_UNDEFINED_1D,
-+ *      - TRAP_UNDEFINED_1E,
-+ *      - TRAP_UNDEFINED_1F,
-+ *      - TRAP_GMRP,
-+ *      - TRAP_GVRP,
-+ *      - TRAP_UNDEF_GARP_22,
-+ *      - TRAP_UNDEF_GARP_23,
-+ *      - TRAP_UNDEF_GARP_24,
-+ *      - TRAP_UNDEF_GARP_25,
-+ *      - TRAP_UNDEF_GARP_26,
-+ *      - TRAP_UNDEF_GARP_27,
-+ *      - TRAP_UNDEF_GARP_28,
-+ *      - TRAP_UNDEF_GARP_29,
-+ *      - TRAP_UNDEF_GARP_2A,
-+ *      - TRAP_UNDEF_GARP_2B,
-+ *      - TRAP_UNDEF_GARP_2C,
-+ *      - TRAP_UNDEF_GARP_2D,
-+ *      - TRAP_UNDEF_GARP_2E,
-+ *      - TRAP_UNDEF_GARP_2F,
-+ *      - TRAP_CDP.
-+ *      - TRAP_CSSTP.
-+ *      - TRAP_LLDP.
-+ *      (2) The RMA action is as following:
-+ *      - RMA_ACTION_FORWARD
-+ *      - RMA_ACTION_TRAP2CPU
-+ *      - RMA_ACTION_DROP
-+ *      - RMA_ACTION_FORWARD_EXCLUDE_CPU
-+ */
-+rtk_api_ret_t rtk_trap_rmaAction_set(rtk_trap_type_t type, rtk_trap_rma_action_t rma_action)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_rma_t rmacfg;
-+    rtk_uint32 tmp;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type >= TRAP_END)
-+        return RT_ERR_INPUT;
-+
-+    if (rma_action >= RMA_ACTION_END)
-+        return RT_ERR_RMA_ACTION;
-+
-+    if (type >= 0 && type <= TRAP_UNDEF_GARP_2F)
-+    {
-+        if ((retVal = rtl8367c_getAsicRma(type, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.operation = rma_action;
-+
-+        if ((retVal = rtl8367c_setAsicRma(type, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (type == TRAP_CDP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCdp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.operation = rma_action;
-+
-+        if ((retVal = rtl8367c_setAsicRmaCdp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (type  == TRAP_CSSTP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCsstp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.operation = rma_action;
-+
-+        if ((retVal = rtl8367c_setAsicRmaCsstp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (type  == TRAP_LLDP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaLldp(&tmp, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.operation = rma_action;
-+
-+        if ((retVal = rtl8367c_setAsicRmaLldp(tmp, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+        return RT_ERR_INPUT;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trap_rmaAction_get
-+ * Description:
-+ *      Get Reserved multicast address action configuration.
-+ * Input:
-+ *      type - rma type.
-+ * Output:
-+ *      pRma_action - RMA action.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      There are 48 types of Reserved Multicast Address frame for application usage.
-+ *      (1)They are as following definition.
-+ *      - TRAP_BRG_GROUP,
-+ *      - TRAP_FD_PAUSE,
-+ *      - TRAP_SP_MCAST,
-+ *      - TRAP_1X_PAE,
-+ *      - TRAP_UNDEF_BRG_04,
-+ *      - TRAP_UNDEF_BRG_05,
-+ *      - TRAP_UNDEF_BRG_06,
-+ *      - TRAP_UNDEF_BRG_07,
-+ *      - TRAP_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - TRAP_UNDEF_BRG_09,
-+ *      - TRAP_UNDEF_BRG_0A,
-+ *      - TRAP_UNDEF_BRG_0B,
-+ *      - TRAP_UNDEF_BRG_0C,
-+ *      - TRAP_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - TRAP_8021AB,
-+ *      - TRAP_UNDEF_BRG_0F,
-+ *      - TRAP_BRG_MNGEMENT,
-+ *      - TRAP_UNDEFINED_11,
-+ *      - TRAP_UNDEFINED_12,
-+ *      - TRAP_UNDEFINED_13,
-+ *      - TRAP_UNDEFINED_14,
-+ *      - TRAP_UNDEFINED_15,
-+ *      - TRAP_UNDEFINED_16,
-+ *      - TRAP_UNDEFINED_17,
-+ *      - TRAP_UNDEFINED_18,
-+ *      - TRAP_UNDEFINED_19,
-+ *      - TRAP_UNDEFINED_1A,
-+ *      - TRAP_UNDEFINED_1B,
-+ *      - TRAP_UNDEFINED_1C,
-+ *      - TRAP_UNDEFINED_1D,
-+ *      - TRAP_UNDEFINED_1E,
-+ *      - TRAP_UNDEFINED_1F,
-+ *      - TRAP_GMRP,
-+ *      - TRAP_GVRP,
-+ *      - TRAP_UNDEF_GARP_22,
-+ *      - TRAP_UNDEF_GARP_23,
-+ *      - TRAP_UNDEF_GARP_24,
-+ *      - TRAP_UNDEF_GARP_25,
-+ *      - TRAP_UNDEF_GARP_26,
-+ *      - TRAP_UNDEF_GARP_27,
-+ *      - TRAP_UNDEF_GARP_28,
-+ *      - TRAP_UNDEF_GARP_29,
-+ *      - TRAP_UNDEF_GARP_2A,
-+ *      - TRAP_UNDEF_GARP_2B,
-+ *      - TRAP_UNDEF_GARP_2C,
-+ *      - TRAP_UNDEF_GARP_2D,
-+ *      - TRAP_UNDEF_GARP_2E,
-+ *      - TRAP_UNDEF_GARP_2F,
-+ *      - TRAP_CDP.
-+ *      - TRAP_CSSTP.
-+ *      - TRAP_LLDP.
-+ *      (2) The RMA action is as following:
-+ *      - RMA_ACTION_FORWARD
-+ *      - RMA_ACTION_TRAP2CPU
-+ *      - RMA_ACTION_DROP
-+ *      - RMA_ACTION_FORWARD_EXCLUDE_CPU
-+ */
-+rtk_api_ret_t rtk_trap_rmaAction_get(rtk_trap_type_t type, rtk_trap_rma_action_t *pRma_action)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_rma_t rmacfg;
-+    rtk_uint32 tmp;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type >= TRAP_END)
-+        return RT_ERR_INPUT;
-+
-+    if(NULL == pRma_action)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (type >= 0 && type <= TRAP_UNDEF_GARP_2F)
-+    {
-+        if ((retVal = rtl8367c_getAsicRma(type, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pRma_action = rmacfg.operation;
-+    }
-+    else if (type == TRAP_CDP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCdp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pRma_action = rmacfg.operation;
-+    }
-+    else if (type == TRAP_CSSTP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCsstp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pRma_action = rmacfg.operation;
-+    }
-+    else if (type == TRAP_LLDP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaLldp(&tmp,&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pRma_action = rmacfg.operation;
-+    }
-+    else
-+        return RT_ERR_INPUT;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trap_rmaKeepFormat_set
-+ * Description:
-+ *      Set Reserved multicast address keep format configuration.
-+ * Input:
-+ *      type    - rma type.
-+ *      enable - enable keep format.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_ENABLE       - Invalid IFG parameter
-+ * Note:
-+ *
-+ *      There are 48 types of Reserved Multicast Address frame for application usage.
-+ *      They are as following definition.
-+ *      - TRAP_BRG_GROUP,
-+ *      - TRAP_FD_PAUSE,
-+ *      - TRAP_SP_MCAST,
-+ *      - TRAP_1X_PAE,
-+ *      - TRAP_UNDEF_BRG_04,
-+ *      - TRAP_UNDEF_BRG_05,
-+ *      - TRAP_UNDEF_BRG_06,
-+ *      - TRAP_UNDEF_BRG_07,
-+ *      - TRAP_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - TRAP_UNDEF_BRG_09,
-+ *      - TRAP_UNDEF_BRG_0A,
-+ *      - TRAP_UNDEF_BRG_0B,
-+ *      - TRAP_UNDEF_BRG_0C,
-+ *      - TRAP_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - TRAP_8021AB,
-+ *      - TRAP_UNDEF_BRG_0F,
-+ *      - TRAP_BRG_MNGEMENT,
-+ *      - TRAP_UNDEFINED_11,
-+ *      - TRAP_UNDEFINED_12,
-+ *      - TRAP_UNDEFINED_13,
-+ *      - TRAP_UNDEFINED_14,
-+ *      - TRAP_UNDEFINED_15,
-+ *      - TRAP_UNDEFINED_16,
-+ *      - TRAP_UNDEFINED_17,
-+ *      - TRAP_UNDEFINED_18,
-+ *      - TRAP_UNDEFINED_19,
-+ *      - TRAP_UNDEFINED_1A,
-+ *      - TRAP_UNDEFINED_1B,
-+ *      - TRAP_UNDEFINED_1C,
-+ *      - TRAP_UNDEFINED_1D,
-+ *      - TRAP_UNDEFINED_1E,
-+ *      - TRAP_UNDEFINED_1F,
-+ *      - TRAP_GMRP,
-+ *      - TRAP_GVRP,
-+ *      - TRAP_UNDEF_GARP_22,
-+ *      - TRAP_UNDEF_GARP_23,
-+ *      - TRAP_UNDEF_GARP_24,
-+ *      - TRAP_UNDEF_GARP_25,
-+ *      - TRAP_UNDEF_GARP_26,
-+ *      - TRAP_UNDEF_GARP_27,
-+ *      - TRAP_UNDEF_GARP_28,
-+ *      - TRAP_UNDEF_GARP_29,
-+ *      - TRAP_UNDEF_GARP_2A,
-+ *      - TRAP_UNDEF_GARP_2B,
-+ *      - TRAP_UNDEF_GARP_2C,
-+ *      - TRAP_UNDEF_GARP_2D,
-+ *      - TRAP_UNDEF_GARP_2E,
-+ *      - TRAP_UNDEF_GARP_2F,
-+ *      - TRAP_CDP.
-+ *      - TRAP_CSSTP.
-+ *      - TRAP_LLDP.
-+ */
-+rtk_api_ret_t rtk_trap_rmaKeepFormat_set(rtk_trap_type_t type, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_rma_t rmacfg;
-+    rtk_uint32 tmp;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type >= TRAP_END)
-+        return RT_ERR_INPUT;
-+
-+    if (enable >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if (type >= 0 && type <= TRAP_UNDEF_GARP_2F)
-+    {
-+        if ((retVal = rtl8367c_getAsicRma(type, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.keep_format = enable;
-+
-+        if ((retVal = rtl8367c_setAsicRma(type, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (type == TRAP_CDP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCdp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.keep_format = enable;
-+
-+        if ((retVal = rtl8367c_setAsicRmaCdp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (type  == TRAP_CSSTP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCsstp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.keep_format = enable;
-+
-+        if ((retVal = rtl8367c_setAsicRmaCsstp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else if (type  == TRAP_LLDP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaLldp(&tmp, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        rmacfg.keep_format = enable;
-+
-+        if ((retVal = rtl8367c_setAsicRmaLldp(tmp, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+        return RT_ERR_INPUT;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trap_rmaKeepFormat_get
-+ * Description:
-+ *      Get Reserved multicast address action configuration.
-+ * Input:
-+ *      type - rma type.
-+ * Output:
-+ *      pEnable - keep format status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ * Note:
-+ *      There are 48 types of Reserved Multicast Address frame for application usage.
-+ *      They are as following definition.
-+ *      - TRAP_BRG_GROUP,
-+ *      - TRAP_FD_PAUSE,
-+ *      - TRAP_SP_MCAST,
-+ *      - TRAP_1X_PAE,
-+ *      - TRAP_UNDEF_BRG_04,
-+ *      - TRAP_UNDEF_BRG_05,
-+ *      - TRAP_UNDEF_BRG_06,
-+ *      - TRAP_UNDEF_BRG_07,
-+ *      - TRAP_PROVIDER_BRIDGE_GROUP_ADDRESS,
-+ *      - TRAP_UNDEF_BRG_09,
-+ *      - TRAP_UNDEF_BRG_0A,
-+ *      - TRAP_UNDEF_BRG_0B,
-+ *      - TRAP_UNDEF_BRG_0C,
-+ *      - TRAP_PROVIDER_BRIDGE_GVRP_ADDRESS,
-+ *      - TRAP_8021AB,
-+ *      - TRAP_UNDEF_BRG_0F,
-+ *      - TRAP_BRG_MNGEMENT,
-+ *      - TRAP_UNDEFINED_11,
-+ *      - TRAP_UNDEFINED_12,
-+ *      - TRAP_UNDEFINED_13,
-+ *      - TRAP_UNDEFINED_14,
-+ *      - TRAP_UNDEFINED_15,
-+ *      - TRAP_UNDEFINED_16,
-+ *      - TRAP_UNDEFINED_17,
-+ *      - TRAP_UNDEFINED_18,
-+ *      - TRAP_UNDEFINED_19,
-+ *      - TRAP_UNDEFINED_1A,
-+ *      - TRAP_UNDEFINED_1B,
-+ *      - TRAP_UNDEFINED_1C,
-+ *      - TRAP_UNDEFINED_1D,
-+ *      - TRAP_UNDEFINED_1E,
-+ *      - TRAP_UNDEFINED_1F,
-+ *      - TRAP_GMRP,
-+ *      - TRAP_GVRP,
-+ *      - TRAP_UNDEF_GARP_22,
-+ *      - TRAP_UNDEF_GARP_23,
-+ *      - TRAP_UNDEF_GARP_24,
-+ *      - TRAP_UNDEF_GARP_25,
-+ *      - TRAP_UNDEF_GARP_26,
-+ *      - TRAP_UNDEF_GARP_27,
-+ *      - TRAP_UNDEF_GARP_28,
-+ *      - TRAP_UNDEF_GARP_29,
-+ *      - TRAP_UNDEF_GARP_2A,
-+ *      - TRAP_UNDEF_GARP_2B,
-+ *      - TRAP_UNDEF_GARP_2C,
-+ *      - TRAP_UNDEF_GARP_2D,
-+ *      - TRAP_UNDEF_GARP_2E,
-+ *      - TRAP_UNDEF_GARP_2F,
-+ *      - TRAP_CDP.
-+ *      - TRAP_CSSTP.
-+ *      - TRAP_LLDP.
-+ */
-+rtk_api_ret_t rtk_trap_rmaKeepFormat_get(rtk_trap_type_t type, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_rma_t rmacfg;
-+    rtk_uint32 tmp;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (type >= TRAP_END)
-+        return RT_ERR_INPUT;
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (type >= 0 && type <= TRAP_UNDEF_GARP_2F)
-+    {
-+        if ((retVal = rtl8367c_getAsicRma(type, &rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = rmacfg.keep_format;
-+    }
-+    else if (type == TRAP_CDP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCdp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = rmacfg.keep_format;
-+    }
-+    else if (type == TRAP_CSSTP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaCsstp(&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = rmacfg.keep_format;
-+    }
-+    else if (type == TRAP_LLDP)
-+    {
-+        if ((retVal = rtl8367c_getAsicRmaLldp(&tmp,&rmacfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        *pEnable = rmacfg.keep_format;
-+    }
-+    else
-+        return RT_ERR_INPUT;
-+
-+    return RT_ERR_OK;
-+}
-+
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/trunk.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/trunk.c
-new file mode 100644
-index 0000000000..8a88dc5ff0
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/trunk.c
-@@ -0,0 +1,605 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in Trunk module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <trunk.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_trunking.h>
-+
-+/* Function Name:
-+ *      rtk_trunk_port_set
-+ * Description:
-+ *      Set trunking group available port mask
-+ * Input:
-+ *      trk_gid                 - trunk group id
-+ *      pTrunk_member_portmask  - Logic trunking member port mask
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_LA_TRUNK_ID  - Invalid trunking group
-+ *      RT_ERR_PORT_MASK    - Invalid portmask.
-+ * Note:
-+ *      The API can set port trunking group port mask. Each port trunking group has max 4 ports.
-+ *      If enabled port mask has less than 2 ports available setting, then this trunking group function is disabled.
-+ */
-+rtk_api_ret_t rtk_trunk_port_set(rtk_trunk_group_t trk_gid, rtk_portmask_t *pTrunk_member_portmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmsk;
-+    rtk_uint32 regValue, type, tmp;
-+
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_getAsicReg(0x1300, &regValue)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0000)) != RT_ERR_OK)
-+        return retVal;
-+
-+    switch (regValue)
-+    {
-+        case 0x0276:
-+        case 0x0597:
-+        case 0x6367:
-+            type = 0;
-+            break;
-+        case 0x0652:
-+        case 0x6368:
-+            type = 1;
-+            break;
-+        case 0x0801:
-+        case 0x6511:
-+            type = 2;
-+            break;
-+        default:
-+            return RT_ERR_FAILED;
-+    }
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Trunk Group Valid */
-+    RTK_CHK_TRUNK_GROUP_VALID(trk_gid);
-+
-+    if(NULL == pTrunk_member_portmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    RTK_CHK_PORTMASK_VALID(pTrunk_member_portmask);
-+
-+    if((retVal = rtk_switch_portmask_L2P_get(pTrunk_member_portmask, &pmsk)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if((type == 0) || (type == 1))
-+    {
-+        if ((pmsk | RTL8367C_PORT_TRUNK_GROUP_MASK_MASK(trk_gid)) != (rtk_uint32)RTL8367C_PORT_TRUNK_GROUP_MASK_MASK(trk_gid))
-+            return RT_ERR_PORT_MASK;
-+
-+        pmsk = (pmsk & RTL8367C_PORT_TRUNK_GROUP_MASK_MASK(trk_gid)) >> RTL8367C_PORT_TRUNK_GROUP_MASK_OFFSET(trk_gid);
-+    }
-+    else if(type == 2)
-+    {
-+        tmp = 0;
-+
-+        if(pmsk & 0x2)
-+            tmp |= 1;
-+        if(pmsk & 0x8)
-+            tmp |=2;
-+        if(pmsk & 0x80)
-+            tmp |=8;
-+
-+        pmsk = tmp;
-+    }
-+
-+    if ((retVal = rtl8367c_setAsicTrunkingGroup(trk_gid, pmsk)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trunk_port_get
-+ * Description:
-+ *      Get trunking group available port mask
-+ * Input:
-+ *      trk_gid - trunk group id
-+ * Output:
-+ *      pTrunk_member_portmask - Logic trunking member port mask
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_LA_TRUNK_ID  - Invalid trunking group
-+ * Note:
-+ *      The API can get 2 port trunking group.
-+ */
-+rtk_api_ret_t rtk_trunk_port_get(rtk_trunk_group_t trk_gid, rtk_portmask_t *pTrunk_member_portmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmsk;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Trunk Group Valid */
-+    RTK_CHK_TRUNK_GROUP_VALID(trk_gid);
-+
-+    if ((retVal = rtl8367c_getAsicTrunkingGroup(trk_gid, &pmsk)) != RT_ERR_OK)
-+        return retVal;
-+
-+    pmsk = pmsk << RTL8367C_PORT_TRUNK_GROUP_MASK_OFFSET(trk_gid);
-+
-+    if((retVal = rtk_switch_portmask_P2L_get(pmsk, pTrunk_member_portmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trunk_distributionAlgorithm_set
-+ * Description:
-+ *      Set port trunking hash select sources
-+ * Input:
-+ *      trk_gid         - trunk group id
-+ *      algo_bitmask   - Bitmask of the distribution algorithm
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_LA_TRUNK_ID  - Invalid trunking group
-+ *      RT_ERR_LA_HASHMASK  - Hash algorithm selection error.
-+ *      RT_ERR_PORT_MASK    - Invalid portmask.
-+ * Note:
-+ *      The API can set port trunking hash algorithm sources.
-+ *      7 bits mask for link aggregation group0 hash parameter selection {DIP, SIP, DMAC, SMAC, SPA}
-+ *      - 0b0000001: SPA
-+ *      - 0b0000010: SMAC
-+ *      - 0b0000100: DMAC
-+ *      - 0b0001000: SIP
-+ *      - 0b0010000: DIP
-+ *      - 0b0100000: TCP/UDP Source Port
-+ *      - 0b1000000: TCP/UDP Destination Port
-+ *      Example:
-+ *      - 0b0000011: SMAC & SPA
-+ *      - Note that it could be an arbitrary combination or independent set
-+ */
-+rtk_api_ret_t rtk_trunk_distributionAlgorithm_set(rtk_trunk_group_t trk_gid, rtk_uint32 algo_bitmask)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (trk_gid != RTK_WHOLE_SYSTEM)
-+        return RT_ERR_LA_TRUNK_ID;
-+
-+    if (algo_bitmask >= 128)
-+        return RT_ERR_LA_HASHMASK;
-+
-+    if ((retVal = rtl8367c_setAsicTrunkingHashSelect(algo_bitmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trunk_distributionAlgorithm_get
-+ * Description:
-+ *      Get port trunking hash select sources
-+ * Input:
-+ *      trk_gid - trunk group id
-+ * Output:
-+ *      pAlgo_bitmask -  Bitmask of the distribution algorithm
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_LA_TRUNK_ID  - Invalid trunking group
-+ * Note:
-+ *      The API can get port trunking hash algorithm sources.
-+ */
-+rtk_api_ret_t rtk_trunk_distributionAlgorithm_get(rtk_trunk_group_t trk_gid, rtk_uint32 *pAlgo_bitmask)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (trk_gid != RTK_WHOLE_SYSTEM)
-+        return RT_ERR_LA_TRUNK_ID;
-+
-+    if(NULL == pAlgo_bitmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicTrunkingHashSelect((rtk_uint32 *)pAlgo_bitmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trunk_trafficSeparate_set
-+ * Description:
-+ *      Set the traffic separation setting of a trunk group from the specified device.
-+ * Input:
-+ *      trk_gid      - trunk group id
-+ *      separateType     - traffic separation setting
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_UNIT_ID     - invalid unit id
-+ *      RT_ERR_LA_TRUNK_ID - invalid trunk ID
-+ *      RT_ERR_LA_HASHMASK - invalid hash mask
-+ * Note:
-+ *      SEPARATE_NONE: disable traffic separation
-+ *      SEPARATE_FLOOD: trunk MSB link up port is dedicated to TX flooding (L2 lookup miss) traffic
-+ */
-+rtk_api_ret_t rtk_trunk_trafficSeparate_set(rtk_trunk_group_t trk_gid, rtk_trunk_separateType_t separateType)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 enabled;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (trk_gid != RTK_WHOLE_SYSTEM)
-+        return RT_ERR_LA_TRUNK_ID;
-+
-+    if(separateType >= SEPARATE_END)
-+        return RT_ERR_INPUT;
-+
-+    enabled = (separateType == SEPARATE_FLOOD) ? ENABLED : DISABLED;
-+    if ((retVal = rtl8367c_setAsicTrunkingFlood(enabled)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trunk_trafficSeparate_get
-+ * Description:
-+ *      Get the traffic separation setting of a trunk group from the specified device.
-+ * Input:
-+ *      trk_gid        - trunk group id
-+ * Output:
-+ *      pSeparateType   - pointer separated traffic type
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_UNIT_ID      - invalid unit id
-+ *      RT_ERR_LA_TRUNK_ID  - invalid trunk ID
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Note:
-+ *      SEPARATE_NONE: disable traffic separation
-+ *      SEPARATE_FLOOD: trunk MSB link up port is dedicated to TX flooding (L2 lookup miss) traffic
-+ */
-+rtk_api_ret_t rtk_trunk_trafficSeparate_get(rtk_trunk_group_t trk_gid, rtk_trunk_separateType_t *pSeparateType)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 enabled;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if (trk_gid != RTK_WHOLE_SYSTEM)
-+        return RT_ERR_LA_TRUNK_ID;
-+
-+    if(NULL == pSeparateType)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicTrunkingFlood(&enabled)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pSeparateType = (enabled == ENABLED) ? SEPARATE_FLOOD : SEPARATE_NONE;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trunk_mode_set
-+ * Description:
-+ *      Set the trunk mode to the specified device.
-+ * Input:
-+ *      mode - trunk mode
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_INPUT   - invalid input parameter
-+ * Note:
-+ *      The enum of the trunk mode as following
-+ *      - TRUNK_MODE_NORMAL
-+ *      - TRUNK_MODE_DUMB
-+ */
-+rtk_api_ret_t rtk_trunk_mode_set(rtk_trunk_mode_t mode)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(mode >= TRUNK_MODE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicTrunkingMode((rtk_uint32)mode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trunk_mode_get
-+ * Description:
-+ *      Get the trunk mode from the specified device.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pMode - pointer buffer of trunk mode
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Note:
-+ *      The enum of the trunk mode as following
-+ *      - TRUNK_MODE_NORMAL
-+ *      - TRUNK_MODE_DUMB
-+ */
-+rtk_api_ret_t rtk_trunk_mode_get(rtk_trunk_mode_t *pMode)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pMode)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicTrunkingMode((rtk_uint32 *)pMode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trunk_trafficPause_set
-+ * Description:
-+ *      Set the traffic pause setting of a trunk group.
-+ * Input:
-+ *      trk_gid      - trunk group id
-+ *      enable       - traffic pause state
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_LA_TRUNK_ID - invalid trunk ID
-+ * Note:
-+ *      None.
-+ */
-+rtk_api_ret_t rtk_trunk_trafficPause_set(rtk_trunk_group_t trk_gid, rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Trunk Group Valid */
-+    RTK_CHK_TRUNK_GROUP_VALID(trk_gid);
-+
-+    if(enable >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setAsicTrunkingFc((rtk_uint32)trk_gid, (rtk_uint32)enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trunk_trafficPause_get
-+ * Description:
-+ *      Get the traffic pause setting of a trunk group.
-+ * Input:
-+ *      trk_gid        - trunk group id
-+ * Output:
-+ *      pEnable        - pointer of traffic pause state.
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_LA_TRUNK_ID  - invalid trunk ID
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Note:
-+ *      None.
-+ */
-+rtk_api_ret_t rtk_trunk_trafficPause_get(rtk_trunk_group_t trk_gid, rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Trunk Group Valid */
-+    RTK_CHK_TRUNK_GROUP_VALID(trk_gid);
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicTrunkingFc((rtk_uint32)trk_gid, (rtk_uint32 *)pEnable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trunk_hashMappingTable_set
-+ * Description:
-+ *      Set hash value to port array in the trunk group id from the specified device.
-+ * Input:
-+ *      trk_gid          - trunk group id
-+ *      pHash2Port_array - ports associate with the hash value
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_UNIT_ID            - invalid unit id
-+ *      RT_ERR_LA_TRUNK_ID        - invalid trunk ID
-+ *      RT_ERR_NULL_POINTER       - input parameter may be null pointer
-+ *      RT_ERR_LA_TRUNK_NOT_EXIST - the trunk doesn't exist
-+ *      RT_ERR_LA_NOT_MEMBER_PORT - the port is not a member port of the trunk
-+ *      RT_ERR_LA_CPUPORT         - CPU port can not be aggregated port
-+ * Note:
-+ *      Trunk group 0 & 1 shares the same hash mapping table.
-+ *      Trunk group 2 uses a independent table.
-+ */
-+rtk_api_ret_t rtk_trunk_hashMappingTable_set(rtk_trunk_group_t trk_gid, rtk_trunk_hashVal2Port_t *pHash2Port_array)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 hashValue;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Trunk Group Valid */
-+    RTK_CHK_TRUNK_GROUP_VALID(trk_gid);
-+
-+    if(NULL == pHash2Port_array)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(trk_gid <= TRUNK_GROUP1)
-+    {
-+        for(hashValue = 0; hashValue < RTK_MAX_NUM_OF_TRUNK_HASH_VAL; hashValue++)
-+        {
-+            if ((retVal = rtl8367c_setAsicTrunkingHashTable(hashValue, pHash2Port_array->value[hashValue])) != RT_ERR_OK)
-+                return retVal;
-+        }
-+    }
-+    else
-+    {
-+        for(hashValue = 0; hashValue < RTK_MAX_NUM_OF_TRUNK_HASH_VAL; hashValue++)
-+        {
-+            if ((retVal = rtl8367c_setAsicTrunkingHashTable1(hashValue, pHash2Port_array->value[hashValue])) != RT_ERR_OK)
-+                return retVal;
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trunk_hashMappingTable_get
-+ * Description:
-+ *      Get hash value to port array in the trunk group id from the specified device.
-+ * Input:
-+ *      trk_gid          - trunk group id
-+ * Output:
-+ *      pHash2Port_array - pointer buffer of ports associate with the hash value
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_UNIT_ID      - invalid unit id
-+ *      RT_ERR_LA_TRUNK_ID  - invalid trunk ID
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Note:
-+ *      Trunk group 0 & 1 shares the same hash mapping table.
-+ *      Trunk group 2 uses a independent table.
-+ */
-+rtk_api_ret_t rtk_trunk_hashMappingTable_get(rtk_trunk_group_t trk_gid, rtk_trunk_hashVal2Port_t *pHash2Port_array)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 hashValue;
-+    rtk_uint32 hashPort;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Trunk Group Valid */
-+    RTK_CHK_TRUNK_GROUP_VALID(trk_gid);
-+
-+    if(NULL == pHash2Port_array)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(trk_gid <= TRUNK_GROUP1)
-+    {
-+        for(hashValue = 0; hashValue < RTK_MAX_NUM_OF_TRUNK_HASH_VAL; hashValue++)
-+        {
-+            if ((retVal = rtl8367c_getAsicTrunkingHashTable(hashValue, &hashPort)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pHash2Port_array->value[hashValue] = hashPort;
-+        }
-+    }
-+    else
-+    {
-+        for(hashValue = 0; hashValue < RTK_MAX_NUM_OF_TRUNK_HASH_VAL; hashValue++)
-+        {
-+            if ((retVal = rtl8367c_getAsicTrunkingHashTable1(hashValue, &hashPort)) != RT_ERR_OK)
-+                return retVal;
-+
-+            pHash2Port_array->value[hashValue] = hashPort;
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_trunk_portQueueEmpty_get
-+ * Description:
-+ *      Get the port mask which all queues are empty.
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pEmpty_portmask   - pointer empty port mask
-+ * Return:
-+ *      RT_ERR_OK
-+ *      RT_ERR_FAILED
-+ *      RT_ERR_NULL_POINTER - input parameter may be null pointer
-+ * Note:
-+ *      None.
-+ */
-+rtk_api_ret_t rtk_trunk_portQueueEmpty_get(rtk_portmask_t *pEmpty_portmask)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 pmask;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pEmpty_portmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicQeueuEmptyStatus(&pmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtk_switch_portmask_P2L_get(pmask, pEmpty_portmask)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/vlan.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/vlan.c
-new file mode 100644
-index 0000000000..f7480c4906
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/vlan.c
-@@ -0,0 +1,2124 @@
-+/*
-+ * Copyright (C) 2013 Realtek Semiconductor Corp.
-+ * All Rights Reserved.
-+ *
-+ * Unless you and Realtek execute a separate written software license
-+ * agreement governing use of this software, this software is licensed
-+ * to you under the terms of the GNU General Public License version 2,
-+ * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
-+ *
-+ * $Revision: 76306 $
-+ * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
-+ *
-+ * Purpose : RTK switch high-level API for RTL8367/RTL8367C
-+ * Feature : Here is a list of all functions and variables in VLAN module.
-+ *
-+ */
-+
-+#include <rtk_switch.h>
-+#include <rtk_error.h>
-+#include <vlan.h>
-+#include <rate.h>
-+#include <string.h>
-+
-+#include <rtl8367c_asicdrv.h>
-+#include <rtl8367c_asicdrv_vlan.h>
-+#include <rtl8367c_asicdrv_dot1x.h>
-+
-+typedef enum vlan_mbrCfgType_e
-+{
-+    MBRCFG_UNUSED = 0,
-+    MBRCFG_USED_BY_VLAN,
-+    MBRCFG_END
-+}vlan_mbrCfgType_t;
-+
-+static rtk_vlan_t           vlan_mbrCfgVid[RTL8367C_CVIDXNO];
-+static vlan_mbrCfgType_t    vlan_mbrCfgUsage[RTL8367C_CVIDXNO];
-+
-+/* Function Name:
-+ *      rtk_vlan_init
-+ * Description:
-+ *      Initialize VLAN.
-+ * Input:
-+ *      None
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ * Note:
-+ *      VLAN is disabled by default. User has to call this API to enable VLAN before
-+ *      using it. And It will set a default VLAN(vid 1) including all ports and set
-+ *      all ports PVID to the default VLAN.
-+ */
-+rtk_api_ret_t rtk_vlan_init(void)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 i;
-+    rtl8367c_user_vlan4kentry vlan4K;
-+    rtl8367c_vlanconfiguser vlanMC;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Clean Database */
-+    memset(vlan_mbrCfgVid, 0x00, sizeof(rtk_vlan_t) * RTL8367C_CVIDXNO);
-+    memset(vlan_mbrCfgUsage, 0x00, sizeof(vlan_mbrCfgType_t) * RTL8367C_CVIDXNO);
-+
-+    /* clean 32 VLAN member configuration */
-+    for (i = 0; i <= RTL8367C_CVIDXMAX; i++)
-+    {
-+        vlanMC.evid = 0;
-+        vlanMC.mbr = 0;
-+        vlanMC.fid_msti = 0;
-+        vlanMC.envlanpol = 0;
-+        vlanMC.meteridx = 0;
-+        vlanMC.vbpen = 0;
-+        vlanMC.vbpri = 0;
-+        if ((retVal = rtl8367c_setAsicVlanMemberConfig(i, &vlanMC)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    /* Set a default VLAN with vid 1 to 4K table for all ports */
-+    memset(&vlan4K, 0, sizeof(rtl8367c_user_vlan4kentry));
-+    vlan4K.vid = 1;
-+    vlan4K.mbr = RTK_PHY_PORTMASK_ALL;
-+    vlan4K.untag = RTK_PHY_PORTMASK_ALL;
-+    vlan4K.fid_msti = 0;
-+    if ((retVal = rtl8367c_setAsicVlan4kEntry(&vlan4K)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Also set the default VLAN to 32 member configuration index 0 */
-+    memset(&vlanMC, 0, sizeof(rtl8367c_vlanconfiguser));
-+    vlanMC.evid = 1;
-+    vlanMC.mbr = RTK_PHY_PORTMASK_ALL;
-+    vlanMC.fid_msti = 0;
-+    if ((retVal = rtl8367c_setAsicVlanMemberConfig(0, &vlanMC)) != RT_ERR_OK)
-+            return retVal;
-+
-+    /* Set all ports PVID to default VLAN and tag-mode to original */
-+    RTK_SCAN_ALL_PHY_PORTMASK(i)
-+    {
-+        if ((retVal = rtl8367c_setAsicVlanPortBasedVID(i, 0, 0)) != RT_ERR_OK)
-+            return retVal;
-+        if ((retVal = rtl8367c_setAsicVlanEgressTagMode(i, EG_TAG_MODE_ORI)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    /* Updata Databse */
-+    vlan_mbrCfgUsage[0] = MBRCFG_USED_BY_VLAN;
-+    vlan_mbrCfgVid[0] = 1;
-+
-+    /* Enable Ingress filter */
-+    RTK_SCAN_ALL_PHY_PORTMASK(i)
-+    {
-+        if ((retVal = rtl8367c_setAsicVlanIngressFilter(i, ENABLED)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    /* enable VLAN */
-+    if ((retVal = rtl8367c_setAsicVlanFilter(ENABLED)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_set
-+ * Description:
-+ *      Set a VLAN entry.
-+ * Input:
-+ *      vid - VLAN ID to configure.
-+ *      pVlanCfg - VLAN Configuration
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_INPUT                - Invalid input parameters.
-+ *      RT_ERR_L2_FID               - Invalid FID.
-+ *      RT_ERR_VLAN_PORT_MBR_EXIST  - Invalid member port mask.
-+ *      RT_ERR_VLAN_VID             - Invalid VID parameter.
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_vlan_set(rtk_vlan_t vid, rtk_vlan_cfg_t *pVlanCfg)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 phyMbrPmask;
-+    rtk_uint32 phyUntagPmask;
-+    rtl8367c_user_vlan4kentry vlan4K;
-+    rtl8367c_vlanconfiguser vlanMC;
-+    rtk_uint32 idx;
-+    rtk_uint32 empty_index = 0xffff;
-+    rtk_uint32 update_evid = 0;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* vid must be 0~8191 */
-+    if (vid > RTL8367C_EVIDMAX)
-+        return RT_ERR_VLAN_VID;
-+
-+    /* Null pointer check */
-+    if(NULL == pVlanCfg)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* Check port mask valid */
-+    RTK_CHK_PORTMASK_VALID(&(pVlanCfg->mbr));
-+
-+    if (vid <= RTL8367C_VIDMAX)
-+    {
-+        /* Check untag port mask valid */
-+        RTK_CHK_PORTMASK_VALID(&(pVlanCfg->untag));
-+    }
-+
-+    /* IVL_EN */
-+    if(pVlanCfg->ivl_en >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    /* fid must be 0~15 */
-+    if(pVlanCfg->fid_msti > RTL8367C_FIDMAX)
-+        return RT_ERR_L2_FID;
-+
-+    /* Policing */
-+    if(pVlanCfg->envlanpol >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    /* Meter ID */
-+    if(pVlanCfg->meteridx > RTK_MAX_METER_ID)
-+        return RT_ERR_INPUT;
-+
-+    /* VLAN based priority */
-+    if(pVlanCfg->vbpen >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    /* Priority */
-+    if(pVlanCfg->vbpri > RTL8367C_PRIMAX)
-+        return RT_ERR_INPUT;
-+
-+    /* Get physical port mask */
-+    if(rtk_switch_portmask_L2P_get(&(pVlanCfg->mbr), &phyMbrPmask) != RT_ERR_OK)
-+        return RT_ERR_FAILED;
-+
-+    if(rtk_switch_portmask_L2P_get(&(pVlanCfg->untag), &phyUntagPmask) != RT_ERR_OK)
-+        return RT_ERR_FAILED;
-+
-+    if (vid <= RTL8367C_VIDMAX)
-+    {
-+        /* update 4K table */
-+        memset(&vlan4K, 0, sizeof(rtl8367c_user_vlan4kentry));
-+        vlan4K.vid = vid;
-+
-+        vlan4K.mbr    = (phyMbrPmask & 0xFFFF);
-+        vlan4K.untag  = (phyUntagPmask & 0xFFFF);
-+
-+        vlan4K.ivl_svl      = pVlanCfg->ivl_en;
-+        vlan4K.fid_msti     = pVlanCfg->fid_msti;
-+        vlan4K.envlanpol    = pVlanCfg->envlanpol;
-+        vlan4K.meteridx     = pVlanCfg->meteridx;
-+        vlan4K.vbpen        = pVlanCfg->vbpen;
-+        vlan4K.vbpri        = pVlanCfg->vbpri;
-+
-+        if ((retVal = rtl8367c_setAsicVlan4kEntry(&vlan4K)) != RT_ERR_OK)
-+            return retVal;
-+
-+        /* Update Member configuration if exist */
-+        for (idx = 0; idx <= RTL8367C_CVIDXMAX; idx++)
-+        {
-+            if(vlan_mbrCfgUsage[idx] == MBRCFG_USED_BY_VLAN)
-+            {
-+                if(vlan_mbrCfgVid[idx] == vid)
-+                {
-+                    /* Found! Update */
-+                    if(phyMbrPmask == 0x00)
-+                    {
-+                        /* Member port = 0x00, delete this VLAN from Member Configuration */
-+                        memset(&vlanMC, 0x00, sizeof(rtl8367c_vlanconfiguser));
-+                        if ((retVal = rtl8367c_setAsicVlanMemberConfig(idx, &vlanMC)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* Clear Database */
-+                        vlan_mbrCfgUsage[idx] = MBRCFG_UNUSED;
-+                        vlan_mbrCfgVid[idx]   = 0;
-+                    }
-+                    else
-+                    {
-+                        /* Normal VLAN config, update to member configuration */
-+                        vlanMC.evid = vid;
-+                        vlanMC.mbr = vlan4K.mbr;
-+                        vlanMC.fid_msti = vlan4K.fid_msti;
-+                        vlanMC.meteridx = vlan4K.meteridx;
-+                        vlanMC.envlanpol= vlan4K.envlanpol;
-+                        vlanMC.vbpen = vlan4K.vbpen;
-+                        vlanMC.vbpri = vlan4K.vbpri;
-+                        if ((retVal = rtl8367c_setAsicVlanMemberConfig(idx, &vlanMC)) != RT_ERR_OK)
-+                            return retVal;
-+                    }
-+
-+                    break;
-+                }
-+            }
-+        }
-+    }
-+    else
-+    {
-+        /* vid > 4095 */
-+        for (idx = 0; idx <= RTL8367C_CVIDXMAX; idx++)
-+        {
-+            if(vlan_mbrCfgUsage[idx] == MBRCFG_USED_BY_VLAN)
-+            {
-+                if(vlan_mbrCfgVid[idx] == vid)
-+                {
-+                    /* Found! Update */
-+                    if(phyMbrPmask == 0x00)
-+                    {
-+                        /* Member port = 0x00, delete this VLAN from Member Configuration */
-+                        memset(&vlanMC, 0x00, sizeof(rtl8367c_vlanconfiguser));
-+                        if ((retVal = rtl8367c_setAsicVlanMemberConfig(idx, &vlanMC)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        /* Clear Database */
-+                        vlan_mbrCfgUsage[idx] = MBRCFG_UNUSED;
-+                        vlan_mbrCfgVid[idx]   = 0;
-+                    }
-+                    else
-+                    {
-+                        /* Normal VLAN config, update to member configuration */
-+                        vlanMC.evid = vid;
-+                        vlanMC.mbr = phyMbrPmask;
-+                        vlanMC.fid_msti = pVlanCfg->fid_msti;
-+                        vlanMC.meteridx = pVlanCfg->meteridx;
-+                        vlanMC.envlanpol= pVlanCfg->envlanpol;
-+                        vlanMC.vbpen = pVlanCfg->vbpen;
-+                        vlanMC.vbpri = pVlanCfg->vbpri;
-+                        if ((retVal = rtl8367c_setAsicVlanMemberConfig(idx, &vlanMC)) != RT_ERR_OK)
-+                            return retVal;
-+
-+                        break;
-+                    }
-+
-+                    update_evid = 1;
-+                }
-+            }
-+
-+            if(vlan_mbrCfgUsage[idx] == MBRCFG_UNUSED)
-+            {
-+                if(0xffff == empty_index)
-+                    empty_index = idx;
-+            }
-+        }
-+
-+        /* doesn't find out same EVID entry and there is empty index in member configuration */
-+        if( (phyMbrPmask != 0x00) && (update_evid == 0) && (empty_index != 0xFFFF) )
-+        {
-+            vlanMC.evid = vid;
-+            vlanMC.mbr = phyMbrPmask;
-+            vlanMC.fid_msti = pVlanCfg->fid_msti;
-+            vlanMC.meteridx = pVlanCfg->meteridx;
-+            vlanMC.envlanpol= pVlanCfg->envlanpol;
-+            vlanMC.vbpen = pVlanCfg->vbpen;
-+            vlanMC.vbpri = pVlanCfg->vbpri;
-+            if ((retVal = rtl8367c_setAsicVlanMemberConfig(empty_index, &vlanMC)) != RT_ERR_OK)
-+                return retVal;
-+
-+            vlan_mbrCfgUsage[empty_index] = MBRCFG_USED_BY_VLAN;
-+            vlan_mbrCfgVid[empty_index] = vid;
-+
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_get
-+ * Description:
-+ *      Get a VLAN entry.
-+ * Input:
-+ *      vid - VLAN ID to configure.
-+ * Output:
-+ *      pVlanCfg - VLAN Configuration
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_VLAN_VID     - Invalid VID parameter.
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_vlan_get(rtk_vlan_t vid, rtk_vlan_cfg_t *pVlanCfg)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 phyMbrPmask;
-+    rtk_uint32 phyUntagPmask;
-+    rtl8367c_user_vlan4kentry vlan4K;
-+    rtl8367c_vlanconfiguser vlanMC;
-+    rtk_uint32 idx;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* vid must be 0~8191 */
-+    if (vid > RTL8367C_EVIDMAX)
-+        return RT_ERR_VLAN_VID;
-+
-+    /* Null pointer check */
-+    if(NULL == pVlanCfg)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (vid <= RTL8367C_VIDMAX)
-+    {
-+        vlan4K.vid = vid;
-+
-+        if ((retVal = rtl8367c_getAsicVlan4kEntry(&vlan4K)) != RT_ERR_OK)
-+            return retVal;
-+
-+        phyMbrPmask   = vlan4K.mbr;
-+        phyUntagPmask = vlan4K.untag;
-+        if(rtk_switch_portmask_P2L_get(phyMbrPmask, &(pVlanCfg->mbr)) != RT_ERR_OK)
-+            return RT_ERR_FAILED;
-+
-+        if(rtk_switch_portmask_P2L_get(phyUntagPmask, &(pVlanCfg->untag)) != RT_ERR_OK)
-+            return RT_ERR_FAILED;
-+
-+        pVlanCfg->ivl_en    = vlan4K.ivl_svl;
-+        pVlanCfg->fid_msti  = vlan4K.fid_msti;
-+        pVlanCfg->envlanpol = vlan4K.envlanpol;
-+        pVlanCfg->meteridx  = vlan4K.meteridx;
-+        pVlanCfg->vbpen     = vlan4K.vbpen;
-+        pVlanCfg->vbpri     = vlan4K.vbpri;
-+    }
-+    else
-+    {
-+        for (idx = 0; idx <= RTL8367C_CVIDXMAX; idx++)
-+        {
-+            if(vlan_mbrCfgUsage[idx] == MBRCFG_USED_BY_VLAN)
-+            {
-+                if(vlan_mbrCfgVid[idx] == vid)
-+                {
-+                    if ((retVal = rtl8367c_getAsicVlanMemberConfig(idx, &vlanMC)) != RT_ERR_OK)
-+                        return retVal;
-+
-+                    phyMbrPmask   = vlanMC.mbr;
-+                    if(rtk_switch_portmask_P2L_get(phyMbrPmask, &(pVlanCfg->mbr)) != RT_ERR_OK)
-+                        return RT_ERR_FAILED;
-+
-+                    pVlanCfg->untag.bits[0] = 0;
-+                    pVlanCfg->ivl_en    = 0;
-+                    pVlanCfg->fid_msti  = vlanMC.fid_msti;
-+                    pVlanCfg->envlanpol = vlanMC.envlanpol;
-+                    pVlanCfg->meteridx  = vlanMC.meteridx;
-+                    pVlanCfg->vbpen     = vlanMC.vbpen;
-+                    pVlanCfg->vbpri     = vlanMC.vbpri;
-+                }
-+            }
-+        }
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_egrFilterEnable_set
-+ * Description:
-+ *      Set VLAN egress filter.
-+ * Input:
-+ *      egrFilter - Egress filtering
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_ENABLE       - Invalid input parameters.
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_vlan_egrFilterEnable_set(rtk_enable_t egrFilter)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(egrFilter >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    /* enable VLAN */
-+    if ((retVal = rtl8367c_setAsicVlanFilter((rtk_uint32)egrFilter)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_egrFilterEnable_get
-+ * Description:
-+ *      Get VLAN egress filter.
-+ * Input:
-+ *      pEgrFilter - Egress filtering
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NULL_POINTER - NULL Pointer.
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_vlan_egrFilterEnable_get(rtk_enable_t *pEgrFilter)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 state;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pEgrFilter)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* enable VLAN */
-+    if ((retVal = rtl8367c_getAsicVlanFilter(&state)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pEgrFilter = (rtk_enable_t)state;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_mbrCfg_set
-+ * Description:
-+ *      Set a VLAN Member Configuration entry by index.
-+ * Input:
-+ *      idx     - Index of VLAN Member Configuration.
-+ *      pMbrcfg - VLAN member Configuration.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_VLAN_VID     - Invalid VID parameter.
-+ * Note:
-+ *     Set a VLAN Member Configuration entry by index.
-+ */
-+rtk_api_ret_t rtk_vlan_mbrCfg_set(rtk_uint32 idx, rtk_vlan_mbrcfg_t *pMbrcfg)
-+{
-+    rtk_api_ret_t           retVal;
-+    rtk_uint32              phyMbrPmask;
-+    rtl8367c_vlanconfiguser mbrCfg;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Error check */
-+    if(pMbrcfg == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(idx > RTL8367C_CVIDXMAX)
-+        return RT_ERR_INPUT;
-+
-+    if(pMbrcfg->evid > RTL8367C_EVIDMAX)
-+        return RT_ERR_INPUT;
-+
-+    if(pMbrcfg->fid_msti > RTL8367C_FIDMAX)
-+        return RT_ERR_L2_FID;
-+
-+    if(pMbrcfg->envlanpol >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if(pMbrcfg->meteridx > RTK_MAX_METER_ID)
-+        return RT_ERR_FILTER_METER_ID;
-+
-+    if(pMbrcfg->vbpen >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if(pMbrcfg->vbpri > RTL8367C_PRIMAX)
-+        return RT_ERR_QOS_INT_PRIORITY;
-+
-+    /* Check port mask valid */
-+    RTK_CHK_PORTMASK_VALID(&(pMbrcfg->mbr));
-+
-+    mbrCfg.evid         = pMbrcfg->evid;
-+    mbrCfg.fid_msti     = pMbrcfg->fid_msti;
-+    mbrCfg.envlanpol    = pMbrcfg->envlanpol;
-+    mbrCfg.meteridx     = pMbrcfg->meteridx;
-+    mbrCfg.vbpen        = pMbrcfg->vbpen;
-+    mbrCfg.vbpri        = pMbrcfg->vbpri;
-+
-+    if(rtk_switch_portmask_L2P_get(&(pMbrcfg->mbr), &phyMbrPmask) != RT_ERR_OK)
-+        return RT_ERR_FAILED;
-+
-+    mbrCfg.mbr = phyMbrPmask;
-+
-+    if ((retVal = rtl8367c_setAsicVlanMemberConfig(idx, &mbrCfg)) != RT_ERR_OK)
-+        return retVal;
-+
-+    /* Update Database */
-+    if( (mbrCfg.evid == 0) && (mbrCfg.mbr == 0) )
-+    {
-+        vlan_mbrCfgUsage[idx] = MBRCFG_UNUSED;
-+        vlan_mbrCfgVid[idx] = 0;
-+    }
-+    else
-+    {
-+        vlan_mbrCfgUsage[idx] = MBRCFG_USED_BY_VLAN;
-+        vlan_mbrCfgVid[idx] = mbrCfg.evid;
-+    }
-+
-+    return RT_ERR_OK;
-+
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_mbrCfg_get
-+ * Description:
-+ *      Get a VLAN Member Configuration entry by index.
-+ * Input:
-+ *      idx - Index of VLAN Member Configuration.
-+ * Output:
-+ *      pMbrcfg - VLAN member Configuration.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_VLAN_VID     - Invalid VID parameter.
-+ * Note:
-+ *     Get a VLAN Member Configuration entry by index.
-+ */
-+rtk_api_ret_t rtk_vlan_mbrCfg_get(rtk_uint32 idx, rtk_vlan_mbrcfg_t *pMbrcfg)
-+{
-+    rtk_api_ret_t           retVal;
-+    rtk_uint32              phyMbrPmask;
-+    rtl8367c_vlanconfiguser mbrCfg;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Error check */
-+    if(pMbrcfg == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(idx > RTL8367C_CVIDXMAX)
-+        return RT_ERR_INPUT;
-+
-+    memset(&mbrCfg, 0x00, sizeof(rtl8367c_vlanconfiguser));
-+    if ((retVal = rtl8367c_getAsicVlanMemberConfig(idx, &mbrCfg)) != RT_ERR_OK)
-+        return retVal;
-+
-+    pMbrcfg->evid       = mbrCfg.evid;
-+    pMbrcfg->fid_msti   = mbrCfg.fid_msti;
-+    pMbrcfg->envlanpol  = mbrCfg.envlanpol;
-+    pMbrcfg->meteridx   = mbrCfg.meteridx;
-+    pMbrcfg->vbpen      = mbrCfg.vbpen;
-+    pMbrcfg->vbpri      = mbrCfg.vbpri;
-+
-+    phyMbrPmask = mbrCfg.mbr;
-+    if(rtk_switch_portmask_P2L_get(phyMbrPmask, &(pMbrcfg->mbr)) != RT_ERR_OK)
-+        return RT_ERR_FAILED;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *     rtk_vlan_portPvid_set
-+ * Description:
-+ *      Set port to specified VLAN ID(PVID).
-+ * Input:
-+ *      port - Port id.
-+ *      pvid - Specified VLAN ID.
-+ *      priority - 802.1p priority for the PVID.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                   - OK
-+ *      RT_ERR_FAILED               - Failed
-+ *      RT_ERR_SMI                  - SMI access error
-+ *      RT_ERR_PORT_ID              - Invalid port number.
-+ *      RT_ERR_VLAN_PRIORITY        - Invalid priority.
-+ *      RT_ERR_VLAN_ENTRY_NOT_FOUND - VLAN entry not found.
-+ *      RT_ERR_VLAN_VID             - Invalid VID parameter.
-+ * Note:
-+ *       The API is used for Port-based VLAN. The untagged frame received from the
-+ *       port will be classified to the specified VLAN and assigned to the specified priority.
-+ */
-+rtk_api_ret_t rtk_vlan_portPvid_set(rtk_port_t port, rtk_vlan_t pvid, rtk_pri_t priority)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 index;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    /* vid must be 0~8191 */
-+    if (pvid > RTL8367C_EVIDMAX)
-+        return RT_ERR_VLAN_VID;
-+
-+    /* priority must be 0~7 */
-+    if (priority > RTL8367C_PRIMAX)
-+        return RT_ERR_VLAN_PRIORITY;
-+
-+    if((retVal = rtk_vlan_checkAndCreateMbr(pvid, &index)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicVlanPortBasedVID(rtk_switch_port_L2P_get(port), index, priority)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_portPvid_get
-+ * Description:
-+ *      Get VLAN ID(PVID) on specified port.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pPvid - Specified VLAN ID.
-+ *      pPriority - 802.1p priority for the PVID.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *     The API can get the PVID and 802.1p priority for the PVID of Port-based VLAN.
-+ */
-+rtk_api_ret_t rtk_vlan_portPvid_get(rtk_port_t port, rtk_vlan_t *pPvid, rtk_pri_t *pPriority)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 index, pri;
-+    rtl8367c_vlanconfiguser mbrCfg;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pPvid)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(NULL == pPriority)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicVlanPortBasedVID(rtk_switch_port_L2P_get(port), &index, &pri)) != RT_ERR_OK)
-+        return retVal;
-+
-+    memset(&mbrCfg, 0x00, sizeof(rtl8367c_vlanconfiguser));
-+    if ((retVal = rtl8367c_getAsicVlanMemberConfig(index, &mbrCfg)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pPvid = mbrCfg.evid;
-+    *pPriority = pri;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_portIgrFilterEnable_set
-+ * Description:
-+ *      Set VLAN ingress for each port.
-+ * Input:
-+ *      port - Port id.
-+ *      igr_filter - VLAN ingress function enable status.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number
-+ *      RT_ERR_ENABLE       - Invalid enable input
-+ * Note:
-+ *      The status of vlan ingress filter is as following:
-+ *      - DISABLED
-+ *      - ENABLED
-+ *      While VLAN function is enabled, ASIC will decide VLAN ID for each received frame and get belonged member
-+ *      ports from VLAN table. If received port is not belonged to VLAN member ports, ASIC will drop received frame if VLAN ingress function is enabled.
-+ */
-+rtk_api_ret_t rtk_vlan_portIgrFilterEnable_set(rtk_port_t port, rtk_enable_t igr_filter)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (igr_filter >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_setAsicVlanIngressFilter(rtk_switch_port_L2P_get(port), igr_filter)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_portIgrFilterEnable_get
-+ * Description:
-+ *      Get VLAN Ingress Filter
-+ * Input:
-+ *      port        - Port id.
-+ * Output:
-+ *      pIgr_filter - VLAN ingress function enable status.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *     The API can Get the VLAN ingress filter status.
-+ *     The status of vlan ingress filter is as following:
-+ *     - DISABLED
-+ *     - ENABLED
-+ */
-+rtk_api_ret_t rtk_vlan_portIgrFilterEnable_get(rtk_port_t port, rtk_enable_t *pIgr_filter)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pIgr_filter)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicVlanIngressFilter(rtk_switch_port_L2P_get(port), pIgr_filter)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_portAcceptFrameType_set
-+ * Description:
-+ *      Set VLAN accept_frame_type
-+ * Input:
-+ *      port                - Port id.
-+ *      accept_frame_type   - accept frame type
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK                       - OK
-+ *      RT_ERR_FAILED                   - Failed
-+ *      RT_ERR_SMI                      - SMI access error
-+ *      RT_ERR_PORT_ID                  - Invalid port number.
-+ *      RT_ERR_VLAN_ACCEPT_FRAME_TYPE   - Invalid frame type.
-+ * Note:
-+ *      The API is used for checking 802.1Q tagged frames.
-+ *      The accept frame type as following:
-+ *      - ACCEPT_FRAME_TYPE_ALL
-+ *      - ACCEPT_FRAME_TYPE_TAG_ONLY
-+ *      - ACCEPT_FRAME_TYPE_UNTAG_ONLY
-+ */
-+rtk_api_ret_t rtk_vlan_portAcceptFrameType_set(rtk_port_t port, rtk_vlan_acceptFrameType_t accept_frame_type)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (accept_frame_type >= ACCEPT_FRAME_TYPE_END)
-+        return RT_ERR_VLAN_ACCEPT_FRAME_TYPE;
-+
-+    if ((retVal = rtl8367c_setAsicVlanAccpetFrameType(rtk_switch_port_L2P_get(port), (rtl8367c_accframetype)accept_frame_type)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_portAcceptFrameType_get
-+ * Description:
-+ *      Get VLAN accept_frame_type
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pAccept_frame_type - accept frame type
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *     The API can Get the VLAN ingress filter.
-+ *     The accept frame type as following:
-+ *     - ACCEPT_FRAME_TYPE_ALL
-+ *     - ACCEPT_FRAME_TYPE_TAG_ONLY
-+ *     - ACCEPT_FRAME_TYPE_UNTAG_ONLY
-+ */
-+rtk_api_ret_t rtk_vlan_portAcceptFrameType_get(rtk_port_t port, rtk_vlan_acceptFrameType_t *pAccept_frame_type)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_accframetype   acc_frm_type;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pAccept_frame_type)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicVlanAccpetFrameType(rtk_switch_port_L2P_get(port), &acc_frm_type)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pAccept_frame_type = (rtk_vlan_acceptFrameType_t)acc_frm_type;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_protoAndPortBasedVlan_add
-+ * Description:
-+ *      Add the protocol-and-port-based vlan to the specified port of device.
-+ * Input:
-+ *      port  - Port id.
-+ *      pInfo - Protocol and port based VLAN configuration information.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_VLAN_VID         - Invalid VID parameter.
-+ *      RT_ERR_VLAN_PRIORITY    - Invalid priority.
-+ *      RT_ERR_TBL_FULL         - Table is full.
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ * Note:
-+ *      The incoming packet which match the protocol-and-port-based vlan will use the configure vid for ingress pipeline
-+ *      The frame type is shown in the following:
-+ *      - FRAME_TYPE_ETHERNET
-+ *      - FRAME_TYPE_RFC1042
-+ *      - FRAME_TYPE_LLCOTHER
-+ */
-+rtk_api_ret_t rtk_vlan_protoAndPortBasedVlan_add(rtk_port_t port, rtk_vlan_protoAndPortInfo_t *pInfo)
-+{
-+    rtk_api_ret_t retVal, i;
-+    rtk_uint32 exist, empty, used, index;
-+    rtl8367c_protocolgdatacfg ppb_data_cfg;
-+    rtl8367c_protocolvlancfg ppb_vlan_cfg;
-+    rtl8367c_provlan_frametype tmp;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pInfo)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if (pInfo->proto_type > RTK_MAX_NUM_OF_PROTO_TYPE)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if (pInfo->frame_type >= FRAME_TYPE_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if (pInfo->cvid > RTL8367C_VIDMAX)
-+        return RT_ERR_VLAN_VID;
-+
-+    if (pInfo->cpri > RTL8367C_PRIMAX)
-+        return RT_ERR_VLAN_PRIORITY;
-+
-+    exist = 0xFF;
-+    empty = 0xFF;
-+    for (i = RTL8367C_PROTOVLAN_GIDX_MAX; i >= 0; i--)
-+    {
-+        if ((retVal = rtl8367c_getAsicVlanProtocolBasedGroupData(i, &ppb_data_cfg)) != RT_ERR_OK)
-+            return retVal;
-+        tmp = pInfo->frame_type;
-+        if (ppb_data_cfg.etherType == pInfo->proto_type && ppb_data_cfg.frameType == tmp)
-+        {
-+            /*Already exist*/
-+            exist = i;
-+            break;
-+        }
-+        else if (ppb_data_cfg.etherType == 0 && ppb_data_cfg.frameType == 0)
-+        {
-+            /*find empty index*/
-+            empty = i;
-+        }
-+    }
-+
-+    used = 0xFF;
-+    /*No empty and exist index*/
-+    if (0xFF == exist && 0xFF == empty)
-+        return RT_ERR_TBL_FULL;
-+    else if (exist<RTL8367C_PROTOVLAN_GROUPNO)
-+    {
-+       /*exist index*/
-+       used = exist;
-+    }
-+    else if (empty<RTL8367C_PROTOVLAN_GROUPNO)
-+    {
-+        /*No exist index, but have empty index*/
-+        ppb_data_cfg.frameType = pInfo->frame_type;
-+        ppb_data_cfg.etherType = pInfo->proto_type;
-+        if ((retVal = rtl8367c_setAsicVlanProtocolBasedGroupData(empty, &ppb_data_cfg)) != RT_ERR_OK)
-+            return retVal;
-+        used = empty;
-+    }
-+    else
-+        return RT_ERR_FAILED;
-+
-+    if((retVal = rtk_vlan_checkAndCreateMbr(pInfo->cvid, &index)) != RT_ERR_OK)
-+        return retVal;
-+
-+    ppb_vlan_cfg.vlan_idx = index;
-+    ppb_vlan_cfg.valid = TRUE;
-+    ppb_vlan_cfg.priority = pInfo->cpri;
-+    if ((retVal = rtl8367c_setAsicVlanPortAndProtocolBased(rtk_switch_port_L2P_get(port), used, &ppb_vlan_cfg)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_protoAndPortBasedVlan_get
-+ * Description:
-+ *      Get the protocol-and-port-based vlan to the specified port of device.
-+ * Input:
-+ *      port - Port id.
-+ *      proto_type - protocol-and-port-based vlan protocol type.
-+ *      frame_type - protocol-and-port-based vlan frame type.
-+ * Output:
-+ *      pInfo - Protocol and port based VLAN configuration information.
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ *      RT_ERR_TBL_FULL         - Table is full.
-+ * Note:
-+ *     The incoming packet which match the protocol-and-port-based vlan will use the configure vid for ingress pipeline
-+ *     The frame type is shown in the following:
-+ *      - FRAME_TYPE_ETHERNET
-+ *      - FRAME_TYPE_RFC1042
-+ *      - FRAME_TYPE_LLCOTHER
-+ */
-+rtk_api_ret_t rtk_vlan_protoAndPortBasedVlan_get(rtk_port_t port, rtk_vlan_proto_type_t proto_type, rtk_vlan_protoVlan_frameType_t frame_type, rtk_vlan_protoAndPortInfo_t *pInfo)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 i;
-+    rtk_uint32 ppb_idx;
-+    rtl8367c_protocolgdatacfg ppb_data_cfg;
-+    rtl8367c_protocolvlancfg ppb_vlan_cfg;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (proto_type > RTK_MAX_NUM_OF_PROTO_TYPE)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if (frame_type >= FRAME_TYPE_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+   ppb_idx = 0;
-+
-+    for (i = 0; i<= RTL8367C_PROTOVLAN_GIDX_MAX; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicVlanProtocolBasedGroupData(i, &ppb_data_cfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ( (ppb_data_cfg.frameType == (rtl8367c_provlan_frametype)frame_type) && (ppb_data_cfg.etherType == proto_type) )
-+        {
-+            ppb_idx = i;
-+            break;
-+        }
-+        else if (RTL8367C_PROTOVLAN_GIDX_MAX == i)
-+            return RT_ERR_TBL_FULL;
-+    }
-+
-+    if ((retVal = rtl8367c_getAsicVlanPortAndProtocolBased(rtk_switch_port_L2P_get(port), ppb_idx, &ppb_vlan_cfg)) != RT_ERR_OK)
-+        return retVal;
-+
-+    if (FALSE == ppb_vlan_cfg.valid)
-+        return RT_ERR_FAILED;
-+
-+    pInfo->frame_type = frame_type;
-+    pInfo->proto_type = proto_type;
-+    pInfo->cvid = vlan_mbrCfgVid[ppb_vlan_cfg.vlan_idx];
-+    pInfo->cpri = ppb_vlan_cfg.priority;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_protoAndPortBasedVlan_del
-+ * Description:
-+ *      Delete the protocol-and-port-based vlan from the specified port of device.
-+ * Input:
-+ *      port        - Port id.
-+ *      proto_type  - protocol-and-port-based vlan protocol type.
-+ *      frame_type  - protocol-and-port-based vlan frame type.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ *      RT_ERR_TBL_FULL         - Table is full.
-+ * Note:
-+ *     The incoming packet which match the protocol-and-port-based vlan will use the configure vid for ingress pipeline
-+ *     The frame type is shown in the following:
-+ *      - FRAME_TYPE_ETHERNET
-+ *      - FRAME_TYPE_RFC1042
-+ *      - FRAME_TYPE_LLCOTHER
-+ */
-+rtk_api_ret_t rtk_vlan_protoAndPortBasedVlan_del(rtk_port_t port, rtk_vlan_proto_type_t proto_type, rtk_vlan_protoVlan_frameType_t frame_type)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 i, bUsed;
-+    rtk_uint32 ppb_idx;
-+    rtl8367c_protocolgdatacfg ppb_data_cfg;
-+    rtl8367c_protocolvlancfg ppb_vlan_cfg;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (proto_type > RTK_MAX_NUM_OF_PROTO_TYPE)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+    if (frame_type >= FRAME_TYPE_END)
-+        return RT_ERR_OUT_OF_RANGE;
-+
-+   ppb_idx = 0;
-+
-+    for (i = 0; i<= RTL8367C_PROTOVLAN_GIDX_MAX; i++)
-+    {
-+        if ((retVal = rtl8367c_getAsicVlanProtocolBasedGroupData(i, &ppb_data_cfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if ( (ppb_data_cfg.frameType == (rtl8367c_provlan_frametype)frame_type) && (ppb_data_cfg.etherType == proto_type) )
-+        {
-+            ppb_idx = i;
-+            ppb_vlan_cfg.valid = FALSE;
-+            ppb_vlan_cfg.vlan_idx = 0;
-+            ppb_vlan_cfg.priority = 0;
-+            if ((retVal = rtl8367c_setAsicVlanPortAndProtocolBased(rtk_switch_port_L2P_get(port), ppb_idx, &ppb_vlan_cfg)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+    }
-+
-+    bUsed = FALSE;
-+    RTK_SCAN_ALL_PHY_PORTMASK(i)
-+    {
-+        if ((retVal = rtl8367c_getAsicVlanPortAndProtocolBased(i, ppb_idx, &ppb_vlan_cfg)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if (TRUE == ppb_vlan_cfg.valid)
-+        {
-+            bUsed = TRUE;
-+                break;
-+        }
-+    }
-+
-+    if (FALSE == bUsed) /*No Port use this PPB Index, Delete it*/
-+    {
-+        ppb_data_cfg.etherType=0;
-+        ppb_data_cfg.frameType=0;
-+        if ((retVal = rtl8367c_setAsicVlanProtocolBasedGroupData(ppb_idx, &ppb_data_cfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_protoAndPortBasedVlan_delAll
-+ * Description:
-+ *     Delete all protocol-and-port-based vlans from the specified port of device.
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK               - OK
-+ *      RT_ERR_FAILED           - Failed
-+ *      RT_ERR_SMI              - SMI access error
-+ *      RT_ERR_PORT_ID          - Invalid port number.
-+ *      RT_ERR_OUT_OF_RANGE     - input out of range.
-+ * Note:
-+ *     The incoming packet which match the protocol-and-port-based vlan will use the configure vid for ingress pipeline
-+ *     Delete all flow table protocol-and-port-based vlan entries.
-+ */
-+rtk_api_ret_t rtk_vlan_protoAndPortBasedVlan_delAll(rtk_port_t port)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32 i, j, bUsed[4];
-+    rtl8367c_protocolgdatacfg ppb_data_cfg;
-+    rtl8367c_protocolvlancfg ppb_vlan_cfg;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    for (i = 0; i<= RTL8367C_PROTOVLAN_GIDX_MAX; i++)
-+    {
-+        ppb_vlan_cfg.valid = FALSE;
-+        ppb_vlan_cfg.vlan_idx = 0;
-+        ppb_vlan_cfg.priority = 0;
-+        if ((retVal = rtl8367c_setAsicVlanPortAndProtocolBased(rtk_switch_port_L2P_get(port), i, &ppb_vlan_cfg)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    bUsed[0] = FALSE;
-+    bUsed[1] = FALSE;
-+    bUsed[2] = FALSE;
-+    bUsed[3] = FALSE;
-+    RTK_SCAN_ALL_PHY_PORTMASK(i)
-+    {
-+        for (j = 0; j <= RTL8367C_PROTOVLAN_GIDX_MAX; j++)
-+        {
-+            if ((retVal = rtl8367c_getAsicVlanPortAndProtocolBased(i,j, &ppb_vlan_cfg)) != RT_ERR_OK)
-+                return retVal;
-+
-+            if (TRUE == ppb_vlan_cfg.valid)
-+            {
-+                bUsed[j] = TRUE;
-+            }
-+        }
-+    }
-+
-+    for (i = 0; i<= RTL8367C_PROTOVLAN_GIDX_MAX; i++)
-+    {
-+        if (FALSE == bUsed[i]) /*No Port use this PPB Index, Delete it*/
-+        {
-+            ppb_data_cfg.etherType=0;
-+            ppb_data_cfg.frameType=0;
-+            if ((retVal = rtl8367c_setAsicVlanProtocolBasedGroupData(i, &ppb_data_cfg)) != RT_ERR_OK)
-+                return retVal;
-+        }
-+    }
-+
-+
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_tagMode_set
-+ * Description:
-+ *      Set CVLAN egress tag mode
-+ * Input:
-+ *      port        - Port id.
-+ *      tag_mode    - The egress tag mode.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ *      RT_ERR_ENABLE       - Invalid enable input.
-+ * Note:
-+ *      The API can set Egress tag mode. There are 4 mode for egress tag:
-+ *      - VLAN_TAG_MODE_ORIGINAL,
-+ *      - VLAN_TAG_MODE_KEEP_FORMAT,
-+ *      - VLAN_TAG_MODE_PRI.
-+ *      - VLAN_TAG_MODE_REAL_KEEP_FORMAT,
-+ */
-+rtk_api_ret_t rtk_vlan_tagMode_set(rtk_port_t port, rtk_vlan_tagMode_t tag_mode)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (tag_mode >= VLAN_TAG_MODE_END)
-+        return RT_ERR_PORT_ID;
-+
-+    if ((retVal = rtl8367c_setAsicVlanEgressTagMode(rtk_switch_port_L2P_get(port), tag_mode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_tagMode_get
-+ * Description:
-+ *      Get CVLAN egress tag mode
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pTag_mode - The egress tag mode.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      The API can get Egress tag mode. There are 4 mode for egress tag:
-+ *      - VLAN_TAG_MODE_ORIGINAL,
-+ *      - VLAN_TAG_MODE_KEEP_FORMAT,
-+ *      - VLAN_TAG_MODE_PRI.
-+ *      - VLAN_TAG_MODE_REAL_KEEP_FORMAT,
-+ */
-+rtk_api_ret_t rtk_vlan_tagMode_get(rtk_port_t port, rtk_vlan_tagMode_t *pTag_mode)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_egtagmode  mode;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pTag_mode)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicVlanEgressTagMode(rtk_switch_port_L2P_get(port), &mode)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pTag_mode = (rtk_vlan_tagMode_t)mode;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_transparent_set
-+ * Description:
-+ *      Set VLAN transparent mode
-+ * Input:
-+ *      egr_port        - Egress Port id.
-+ *      pIgr_pmask      - Ingress Port Mask.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      None.
-+ */
-+rtk_api_ret_t rtk_vlan_transparent_set(rtk_port_t egr_port, rtk_portmask_t *pIgr_pmask)
-+{
-+     rtk_api_ret_t retVal;
-+     rtk_uint32    pmask;
-+
-+     /* Check initialization state */
-+     RTK_CHK_INIT_STATE();
-+
-+     /* Check Port Valid */
-+     RTK_CHK_PORT_VALID(egr_port);
-+
-+     if(NULL == pIgr_pmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+     RTK_CHK_PORTMASK_VALID(pIgr_pmask);
-+
-+     if(rtk_switch_portmask_L2P_get(pIgr_pmask, &pmask) != RT_ERR_OK)
-+        return RT_ERR_FAILED;
-+
-+     if ((retVal = rtl8367c_setAsicVlanTransparent(rtk_switch_port_L2P_get(egr_port), pmask)) != RT_ERR_OK)
-+         return retVal;
-+
-+     return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_transparent_get
-+ * Description:
-+ *      Get VLAN transparent mode
-+ * Input:
-+ *      egr_port        - Egress Port id.
-+ * Output:
-+ *      pIgr_pmask      - Ingress Port Mask
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      None.
-+ */
-+rtk_api_ret_t rtk_vlan_transparent_get(rtk_port_t egr_port, rtk_portmask_t *pIgr_pmask)
-+{
-+     rtk_api_ret_t retVal;
-+     rtk_uint32    pmask;
-+
-+     /* Check initialization state */
-+     RTK_CHK_INIT_STATE();
-+
-+     /* Check Port Valid */
-+     RTK_CHK_PORT_VALID(egr_port);
-+
-+     if(NULL == pIgr_pmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+     if ((retVal = rtl8367c_getAsicVlanTransparent(rtk_switch_port_L2P_get(egr_port), &pmask)) != RT_ERR_OK)
-+         return retVal;
-+
-+     if(rtk_switch_portmask_P2L_get(pmask, pIgr_pmask) != RT_ERR_OK)
-+        return RT_ERR_FAILED;
-+
-+     return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_keep_set
-+ * Description:
-+ *      Set VLAN egress keep mode
-+ * Input:
-+ *      egr_port        - Egress Port id.
-+ *      pIgr_pmask      - Ingress Port Mask.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      None.
-+ */
-+rtk_api_ret_t rtk_vlan_keep_set(rtk_port_t egr_port, rtk_portmask_t *pIgr_pmask)
-+{
-+     rtk_api_ret_t retVal;
-+     rtk_uint32    pmask;
-+
-+     /* Check initialization state */
-+     RTK_CHK_INIT_STATE();
-+
-+     /* Check Port Valid */
-+     RTK_CHK_PORT_VALID(egr_port);
-+
-+     if(NULL == pIgr_pmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+     RTK_CHK_PORTMASK_VALID(pIgr_pmask);
-+
-+     if(rtk_switch_portmask_L2P_get(pIgr_pmask, &pmask) != RT_ERR_OK)
-+        return RT_ERR_FAILED;
-+
-+     if ((retVal = rtl8367c_setAsicVlanEgressKeep(rtk_switch_port_L2P_get(egr_port), pmask)) != RT_ERR_OK)
-+         return retVal;
-+
-+     return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_keep_get
-+ * Description:
-+ *      Get VLAN egress keep mode
-+ * Input:
-+ *      egr_port        - Egress Port id.
-+ * Output:
-+ *      pIgr_pmask      - Ingress Port Mask
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ * Note:
-+ *      None.
-+ */
-+rtk_api_ret_t rtk_vlan_keep_get(rtk_port_t egr_port, rtk_portmask_t *pIgr_pmask)
-+{
-+     rtk_api_ret_t retVal;
-+     rtk_uint32    pmask;
-+
-+     /* Check initialization state */
-+     RTK_CHK_INIT_STATE();
-+
-+     /* Check Port Valid */
-+     RTK_CHK_PORT_VALID(egr_port);
-+
-+     if(NULL == pIgr_pmask)
-+        return RT_ERR_NULL_POINTER;
-+
-+     if ((retVal = rtl8367c_getAsicVlanEgressKeep(rtk_switch_port_L2P_get(egr_port), &pmask)) != RT_ERR_OK)
-+         return retVal;
-+
-+     if(rtk_switch_portmask_P2L_get(pmask, pIgr_pmask) != RT_ERR_OK)
-+        return RT_ERR_FAILED;
-+
-+     return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_stg_set
-+ * Description:
-+ *      Set spanning tree group instance of the vlan to the specified device
-+ * Input:
-+ *      vid - Specified VLAN ID.
-+ *      stg - spanning tree group instance.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_MSTI         - Invalid msti parameter
-+ *      RT_ERR_INPUT        - Invalid input parameter.
-+ *      RT_ERR_VLAN_VID     - Invalid VID parameter.
-+ * Note:
-+ *      The API can set spanning tree group instance of the vlan to the specified device.
-+ */
-+rtk_api_ret_t rtk_vlan_stg_set(rtk_vlan_t vid, rtk_stp_msti_id_t stg)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_user_vlan4kentry vlan4K;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* vid must be 0~4095 */
-+    if (vid > RTL8367C_VIDMAX)
-+        return RT_ERR_VLAN_VID;
-+
-+    /* priority must be 0~15 */
-+    if (stg > RTL8367C_MSTIMAX)
-+        return RT_ERR_MSTI;
-+
-+    /* update 4K table */
-+    vlan4K.vid = vid;
-+    if ((retVal = rtl8367c_getAsicVlan4kEntry(&vlan4K)) != RT_ERR_OK)
-+        return retVal;
-+
-+    vlan4K.fid_msti= stg;
-+    if ((retVal = rtl8367c_setAsicVlan4kEntry(&vlan4K)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_stg_get
-+ * Description:
-+ *      Get spanning tree group instance of the vlan to the specified device
-+ * Input:
-+ *      vid - Specified VLAN ID.
-+ * Output:
-+ *      pStg - spanning tree group instance.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Invalid input parameters.
-+ *      RT_ERR_VLAN_VID     - Invalid VID parameter.
-+ * Note:
-+ *      The API can get spanning tree group instance of the vlan to the specified device.
-+ */
-+rtk_api_ret_t rtk_vlan_stg_get(rtk_vlan_t vid, rtk_stp_msti_id_t *pStg)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_user_vlan4kentry vlan4K;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* vid must be 0~4095 */
-+    if (vid > RTL8367C_VIDMAX)
-+        return RT_ERR_VLAN_VID;
-+
-+    if(NULL == pStg)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* update 4K table */
-+    vlan4K.vid = vid;
-+    if ((retVal = rtl8367c_getAsicVlan4kEntry(&vlan4K)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pStg = vlan4K.fid_msti;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_portFid_set
-+ * Description:
-+ *      Set port-based filtering database
-+ * Input:
-+ *      port - Port id.
-+ *      enable - ebable port-based FID
-+ *      fid - Specified filtering database.
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_L2_FID - Invalid fid.
-+ *      RT_ERR_INPUT - Invalid input parameter.
-+ *      RT_ERR_PORT_ID - Invalid port ID.
-+ * Note:
-+ *      The API can set port-based filtering database. If the function is enabled, all input
-+ *      packets will be assigned to the port-based fid regardless vlan tag.
-+ */
-+rtk_api_ret_t rtk_vlan_portFid_set(rtk_port_t port, rtk_enable_t enable, rtk_fid_t fid)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (enable>=RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    /* fid must be 0~4095 */
-+    if (fid > RTK_FID_MAX)
-+        return RT_ERR_L2_FID;
-+
-+    if ((retVal = rtl8367c_setAsicPortBasedFidEn(rtk_switch_port_L2P_get(port), enable))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_setAsicPortBasedFid(rtk_switch_port_L2P_get(port), fid))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_portFid_get
-+ * Description:
-+ *      Get port-based filtering database
-+ * Input:
-+ *      port - Port id.
-+ * Output:
-+ *      pEnable - ebable port-based FID
-+ *      pFid - Specified filtering database.
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_INPUT - Invalid input parameters.
-+ *      RT_ERR_PORT_ID - Invalid port ID.
-+ * Note:
-+ *      The API can get port-based filtering database status. If the function is enabled, all input
-+ *      packets will be assigned to the port-based fid regardless vlan tag.
-+ */
-+rtk_api_ret_t rtk_vlan_portFid_get(rtk_port_t port, rtk_enable_t *pEnable, rtk_fid_t *pFid)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(NULL == pFid)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicPortBasedFidEn(rtk_switch_port_L2P_get(port), pEnable))!=RT_ERR_OK)
-+        return retVal;
-+
-+    if ((retVal = rtl8367c_getAsicPortBasedFid(rtk_switch_port_L2P_get(port), pFid))!=RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_UntagDscpPriorityEnable_set
-+ * Description:
-+ *      Set Untag DSCP priority assign
-+ * Input:
-+ *      enable - state of Untag DSCP priority assign
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_ENABLE          - Invalid input parameters.
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_vlan_UntagDscpPriorityEnable_set(rtk_enable_t enable)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(enable >= RTK_ENABLE_END)
-+        return RT_ERR_ENABLE;
-+
-+    if ((retVal = rtl8367c_setAsicVlanUntagDscpPriorityEn((rtk_uint32)enable)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_UntagDscpPriorityEnable_get
-+ * Description:
-+ *      Get Untag DSCP priority assign
-+ * Input:
-+ *      None
-+ * Output:
-+ *      pEnable - state of Untag DSCP priority assign
-+ * Return:
-+ *      RT_ERR_OK              - OK
-+ *      RT_ERR_FAILED          - Failed
-+ *      RT_ERR_SMI             - SMI access error
-+ *      RT_ERR_NULL_POINTER    - Null pointer
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_vlan_UntagDscpPriorityEnable_get(rtk_enable_t *pEnable)
-+{
-+    rtk_api_ret_t retVal;
-+    rtk_uint32  value;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pEnable)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicVlanUntagDscpPriorityEn(&value)) != RT_ERR_OK)
-+        return retVal;
-+
-+    *pEnable = (rtk_enable_t)value;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_stp_mstpState_set
-+ * Description:
-+ *      Configure spanning tree state per each port.
-+ * Input:
-+ *      port - Port id
-+ *      msti - Multiple spanning tree instance.
-+ *      stp_state - Spanning tree state for msti
-+ * Output:
-+ *      None
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_MSTI         - Invalid msti parameter.
-+ *      RT_ERR_MSTP_STATE   - Invalid STP state.
-+ * Note:
-+ *      System supports per-port multiple spanning tree state for each msti.
-+ *      There are four states supported by ASIC.
-+ *      - STP_STATE_DISABLED
-+ *      - STP_STATE_BLOCKING
-+ *      - STP_STATE_LEARNING
-+ *      - STP_STATE_FORWARDING
-+ */
-+rtk_api_ret_t rtk_stp_mstpState_set(rtk_stp_msti_id_t msti, rtk_port_t port, rtk_stp_state_t stp_state)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (msti > RTK_MAX_NUM_OF_MSTI)
-+        return RT_ERR_MSTI;
-+
-+    if (stp_state >= STP_STATE_END)
-+        return RT_ERR_MSTP_STATE;
-+
-+    if ((retVal = rtl8367c_setAsicSpanningTreeStatus(rtk_switch_port_L2P_get(port), msti, stp_state)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_stp_mstpState_get
-+ * Description:
-+ *      Get spanning tree state per each port.
-+ * Input:
-+ *      port - Port id.
-+ *      msti - Multiple spanning tree instance.
-+ * Output:
-+ *      pStp_state - Spanning tree state for msti
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_PORT_ID      - Invalid port number.
-+ *      RT_ERR_MSTI         - Invalid msti parameter.
-+ * Note:
-+ *      System supports per-port multiple spanning tree state for each msti.
-+ *      There are four states supported by ASIC.
-+ *      - STP_STATE_DISABLED
-+ *      - STP_STATE_BLOCKING
-+ *      - STP_STATE_LEARNING
-+ *      - STP_STATE_FORWARDING
-+ */
-+rtk_api_ret_t rtk_stp_mstpState_get(rtk_stp_msti_id_t msti, rtk_port_t port, rtk_stp_state_t *pStp_state)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* Check Port Valid */
-+    RTK_CHK_PORT_VALID(port);
-+
-+    if (msti > RTK_MAX_NUM_OF_MSTI)
-+        return RT_ERR_MSTI;
-+
-+    if(NULL == pStp_state)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getAsicSpanningTreeStatus(rtk_switch_port_L2P_get(port), msti, pStp_state)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_checkAndCreateMbr
-+ * Description:
-+ *      Check and create Member configuration and return index
-+ * Input:
-+ *      vid  - VLAN id.
-+ * Output:
-+ *      pIndex  - Member configuration index
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_VLAN_VID     - Invalid VLAN ID.
-+ *      RT_ERR_VLAN_ENTRY_NOT_FOUND - VLAN not found
-+ *      RT_ERR_TBL_FULL     - Member Configuration table full
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_vlan_checkAndCreateMbr(rtk_vlan_t vid, rtk_uint32 *pIndex)
-+{
-+    rtk_api_ret_t retVal;
-+    rtl8367c_user_vlan4kentry vlan4K;
-+    rtl8367c_vlanconfiguser vlanMC;
-+    rtk_uint32 idx;
-+    rtk_uint32 empty_idx = 0xFFFF;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    /* vid must be 0~8191 */
-+    if (vid > RTL8367C_EVIDMAX)
-+        return RT_ERR_VLAN_VID;
-+
-+    /* Null pointer check */
-+    if(NULL == pIndex)
-+        return RT_ERR_NULL_POINTER;
-+
-+    /* Get 4K VLAN */
-+    if (vid <= RTL8367C_VIDMAX)
-+    {
-+        memset(&vlan4K, 0x00, sizeof(rtl8367c_user_vlan4kentry));
-+        vlan4K.vid = vid;
-+        if ((retVal = rtl8367c_getAsicVlan4kEntry(&vlan4K)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    /* Search exist entry */
-+    for (idx = 0; idx <= RTL8367C_CVIDXMAX; idx++)
-+    {
-+        if(vlan_mbrCfgUsage[idx] == MBRCFG_USED_BY_VLAN)
-+        {
-+            if(vlan_mbrCfgVid[idx] == vid)
-+            {
-+                /* Found! return index */
-+                *pIndex = idx;
-+                return RT_ERR_OK;
-+            }
-+        }
-+    }
-+
-+    /* Not found, Read H/W Member Configuration table to update database */
-+    for (idx = 0; idx <= RTL8367C_CVIDXMAX; idx++)
-+    {
-+        if ((retVal = rtl8367c_getAsicVlanMemberConfig(idx, &vlanMC)) != RT_ERR_OK)
-+            return retVal;
-+
-+        if( (vlanMC.evid == 0) && (vlanMC.mbr == 0x00))
-+        {
-+            vlan_mbrCfgUsage[idx]   = MBRCFG_UNUSED;
-+            vlan_mbrCfgVid[idx]     = 0;
-+        }
-+        else
-+        {
-+            vlan_mbrCfgUsage[idx]   = MBRCFG_USED_BY_VLAN;
-+            vlan_mbrCfgVid[idx]     = vlanMC.evid;
-+        }
-+    }
-+
-+    /* Search exist entry again */
-+    for (idx = 0; idx <= RTL8367C_CVIDXMAX; idx++)
-+    {
-+        if(vlan_mbrCfgUsage[idx] == MBRCFG_USED_BY_VLAN)
-+        {
-+            if(vlan_mbrCfgVid[idx] == vid)
-+            {
-+                /* Found! return index */
-+                *pIndex = idx;
-+                return RT_ERR_OK;
-+            }
-+        }
-+    }
-+
-+    /* try to look up an empty index */
-+    for (idx = 0; idx <= RTL8367C_CVIDXMAX; idx++)
-+    {
-+        if(vlan_mbrCfgUsage[idx] == MBRCFG_UNUSED)
-+        {
-+            empty_idx = idx;
-+            break;
-+        }
-+    }
-+
-+    if(empty_idx == 0xFFFF)
-+    {
-+        /* No empty index */
-+        return RT_ERR_TBL_FULL;
-+    }
-+
-+    if (vid > RTL8367C_VIDMAX)
-+    {
-+        /* > 4K, there is no 4K entry, create on member configuration directly */
-+        memset(&vlanMC, 0x00, sizeof(rtl8367c_vlanconfiguser));
-+        vlanMC.evid = vid;
-+        if ((retVal = rtl8367c_setAsicVlanMemberConfig(empty_idx, &vlanMC)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+    else
-+    {
-+        /* Copy from 4K table */
-+        vlanMC.evid = vid;
-+        vlanMC.mbr = vlan4K.mbr;
-+        vlanMC.fid_msti = vlan4K.fid_msti;
-+        vlanMC.meteridx= vlan4K.meteridx;
-+        vlanMC.envlanpol= vlan4K.envlanpol;
-+        vlanMC.vbpen = vlan4K.vbpen;
-+        vlanMC.vbpri = vlan4K.vbpri;
-+        if ((retVal = rtl8367c_setAsicVlanMemberConfig(empty_idx, &vlanMC)) != RT_ERR_OK)
-+            return retVal;
-+    }
-+
-+    /* Update Database */
-+    vlan_mbrCfgUsage[empty_idx] = MBRCFG_USED_BY_VLAN;
-+    vlan_mbrCfgVid[empty_idx] = vid;
-+
-+    *pIndex = empty_idx;
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_reservedVidAction_set
-+ * Description:
-+ *      Set Action of VLAN ID = 0 & 4095 tagged packet
-+ * Input:
-+ *      action_vid0     - Action for VID 0.
-+ *      action_vid4095  - Action for VID 4095.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Error Input
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_vlan_reservedVidAction_set(rtk_vlan_resVidAction_t action_vid0, rtk_vlan_resVidAction_t action_vid4095)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(action_vid0 >= RESVID_ACTION_END)
-+        return RT_ERR_INPUT;
-+
-+    if(action_vid4095 >= RESVID_ACTION_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setReservedVidAction((rtk_uint32)action_vid0, (rtk_uint32)action_vid4095)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_reservedVidAction_get
-+ * Description:
-+ *      Get Action of VLAN ID = 0 & 4095 tagged packet
-+ * Input:
-+ *      pAction_vid0     - Action for VID 0.
-+ *      pAction_vid4095  - Action for VID 4095.
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_NULL_POINTER - NULL Pointer
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_vlan_reservedVidAction_get(rtk_vlan_resVidAction_t *pAction_vid0, rtk_vlan_resVidAction_t *pAction_vid4095)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(pAction_vid0 == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if(pAction_vid4095 == NULL)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getReservedVidAction((rtk_uint32 *)pAction_vid0, (rtk_uint32 *)pAction_vid4095)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_realKeepRemarkEnable_set
-+ * Description:
-+ *      Set Real keep 1p remarking feature
-+ * Input:
-+ *      enabled     - State of 1p remarking at real keep packet
-+ * Output:
-+ *      None.
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Error Input
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_vlan_realKeepRemarkEnable_set(rtk_enable_t enabled)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(enabled >= RTK_ENABLE_END)
-+        return RT_ERR_INPUT;
-+
-+    if ((retVal = rtl8367c_setRealKeepRemarkEn((rtk_uint32)enabled)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_realKeepRemarkEnable_get
-+ * Description:
-+ *      Get Real keep 1p remarking feature
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pEnabled     - State of 1p remarking at real keep packet
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Error Input
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_vlan_realKeepRemarkEnable_get(rtk_enable_t *pEnabled)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if(NULL == pEnabled)
-+        return RT_ERR_NULL_POINTER;
-+
-+    if ((retVal = rtl8367c_getRealKeepRemarkEn((rtk_uint32 *)pEnabled)) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-+/* Function Name:
-+ *      rtk_vlan_reset
-+ * Description:
-+ *      Reset VLAN
-+ * Input:
-+ *      None.
-+ * Output:
-+ *      pEnabled     - State of 1p remarking at real keep packet
-+ * Return:
-+ *      RT_ERR_OK           - OK
-+ *      RT_ERR_FAILED       - Failed
-+ *      RT_ERR_SMI          - SMI access error
-+ *      RT_ERR_INPUT        - Error Input
-+ * Note:
-+ *
-+ */
-+rtk_api_ret_t rtk_vlan_reset(void)
-+{
-+    rtk_api_ret_t retVal;
-+
-+    /* Check initialization state */
-+    RTK_CHK_INIT_STATE();
-+
-+    if ((retVal = rtl8367c_resetVlan()) != RT_ERR_OK)
-+        return retVal;
-+
-+    return RT_ERR_OK;
-+}
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367s.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367s.c
-new file mode 100644
-index 0000000000..6a55631d52
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367s.c
-@@ -0,0 +1,580 @@
-+/*
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version 2
-+ * of the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/delay.h>
-+#include <linux/skbuff.h>
-+#include <linux/switch.h>
-+
-+//include from rtl8367c dir
-+#include  "./rtl8367c/include/rtk_switch.h"
-+#include  "./rtl8367c/include/vlan.h"
-+#include  "./rtl8367c/include/stat.h"
-+#include  "./rtl8367c/include/port.h"
-+
-+#define RTL8367C_SW_CPU_PORT    6
-+
-+ //RTL8367C_PHY_PORT_NUM + ext0 + ext1
-+#define RTL8367C_NUM_PORTS 7 
-+#define RTL8367C_NUM_VIDS  4096   
-+
-+struct rtl8367_priv {
-+	struct switch_dev	swdev;
-+	bool			global_vlan_enable;
-+};
-+
-+struct rtl8367_mib_counter {	
-+	const char *name;
-+};
-+
-+struct rtl8367_vlan_info {
-+	unsigned short	vid;
-+	unsigned int	untag;
-+	unsigned int	member;
-+	unsigned char		fid;
-+};
-+
-+struct rtl8367_priv  rtl8367_priv_data;
-+
-+unsigned int rtl8367c_port_id[RTL8367C_NUM_PORTS]={0,1,2,3,4,EXT_PORT1,EXT_PORT0};
-+
-+void (*rtl8367_switch_reset_func)(void)=NULL;
-+
-+static  struct rtl8367_mib_counter  rtl8367c_mib_counters[] = {
-+	{"ifInOctets"},
-+	{"dot3StatsFCSErrors"},
-+	{"dot3StatsSymbolErrors"},
-+	{"dot3InPauseFrames"},
-+	{"dot3ControlInUnknownOpcodes"},
-+	{"etherStatsFragments"},
-+	{"etherStatsJabbers"},
-+	{"ifInUcastPkts"},
-+	{"etherStatsDropEvents"},
-+	{"etherStatsOctets"},
-+	{"etherStatsUndersizePkts"},
-+	{"etherStatsOversizePkts"},
-+	{"etherStatsPkts64Octets"},
-+	{"etherStatsPkts65to127Octets"},
-+	{"etherStatsPkts128to255Octets"},
-+	{"etherStatsPkts256to511Octets"},
-+	{"etherStatsPkts512to1023Octets"},
-+	{"etherStatsPkts1024toMaxOctets"},
-+	{"etherStatsMcastPkts"}, 
-+	{"etherStatsBcastPkts"},
-+	{"ifOutOctets"},
-+	{"dot3StatsSingleCollisionFrames"},
-+	{"dot3StatsMultipleCollisionFrames"},
-+	{"dot3StatsDeferredTransmissions"},
-+	{"dot3StatsLateCollisions"}, 
-+	{"etherStatsCollisions"},
-+	{"dot3StatsExcessiveCollisions"},
-+	{"dot3OutPauseFrames"},
-+	{"dot1dBasePortDelayExceededDiscards"},
-+	{"dot1dTpPortInDiscards"},
-+	{"ifOutUcastPkts"},
-+	{"ifOutMulticastPkts"},
-+	{"ifOutBrocastPkts"},
-+	{"outOampduPkts"},
-+	{"inOampduPkts"},
-+	{"pktgenPkts"},
-+	{"inMldChecksumError"},
-+	{"inIgmpChecksumError"},
-+	{"inMldSpecificQuery"},
-+	{"inMldGeneralQuery"},
-+	{"inIgmpSpecificQuery"},
-+	{"inIgmpGeneralQuery"},
-+	{"inMldLeaves"},
-+	{"inIgmpLeaves"},
-+	{"inIgmpJoinsSuccess"},
-+	{"inIgmpJoinsFail"},
-+	{"inMldJoinsSuccess"},
-+	{"inMldJoinsFail"},
-+	{"inReportSuppressionDrop"},
-+	{"inLeaveSuppressionDrop"},
-+	{"outIgmpReports"},
-+	{"outIgmpLeaves"},
-+	{"outIgmpGeneralQuery"},
-+	{"outIgmpSpecificQuery"},
-+	{"outMldReports"},
-+	{"outMldLeaves"},
-+	{"outMldGeneralQuery"},
-+	{"outMldSpecificQuery"},
-+	{"inKnownMulticastPkts"},
-+	{"ifInMulticastPkts"},
-+	{"ifInBroadcastPkts"},
-+	{"ifOutDiscards"}
-+};
-+
-+/*rtl8367c  proprietary switch API wrapper */
-+static inline unsigned int rtl8367c_sw_to_phy_port(int port)
-+{
-+	return rtl8367c_port_id[port];
-+}
-+
-+static inline unsigned int rtl8367c_portmask_phy_to_sw(rtk_portmask_t phy_portmask)
-+{
-+	int i;
-+	for (i = 0; i < RTL8367C_NUM_PORTS; i++) {
-+		if(RTK_PORTMASK_IS_PORT_SET(phy_portmask,rtl8367c_sw_to_phy_port(i))) {
-+			RTK_PORTMASK_PORT_CLEAR(phy_portmask,rtl8367c_sw_to_phy_port(i));
-+			RTK_PORTMASK_PORT_SET(phy_portmask,i);
-+		}		
-+
-+	}
-+	return (unsigned int)phy_portmask.bits[0];
-+}
-+
-+static int rtl8367c_reset_mibs(void)
-+{
-+	return rtk_stat_global_reset();
-+}
-+
-+static int rtl8367c_reset_port_mibs(int port)
-+{
-+
-+	return rtk_stat_port_reset(rtl8367c_sw_to_phy_port(port));
-+}
-+
-+static int rtl8367c_get_mibs_num(void)
-+{
-+	return ARRAY_SIZE(rtl8367c_mib_counters);
-+}
-+
-+static const char *rtl8367c_get_mib_name(int idx)
-+{
-+	
-+	return rtl8367c_mib_counters[idx].name;
-+}
-+
-+static int rtl8367c_get_port_mib_counter(int idx, int port, unsigned long long *counter)
-+{
-+	return rtk_stat_port_get(rtl8367c_sw_to_phy_port(port), idx, counter);
-+}
-+
-+static int rtl8367c_is_vlan_valid(unsigned int vlan)
-+{
-+	unsigned max = RTL8367C_NUM_VIDS;	
-+
-+	if (vlan == 0 || vlan >= max)
-+		return 0;
-+
-+	return 1;
-+}
-+
-+static int rtl8367c_get_vlan( unsigned short vid, struct rtl8367_vlan_info *vlan)
-+{	
-+	rtk_vlan_cfg_t vlan_cfg;
-+
-+	memset(vlan, '\0', sizeof(struct rtl8367_vlan_info));
-+
-+	if (vid >= RTL8367C_NUM_VIDS)
-+		return -EINVAL;	
-+
-+	if(rtk_vlan_get(vid,&vlan_cfg))
-+       	return -EINVAL;		
-+	
-+	vlan->vid = vid;
-+	vlan->member = rtl8367c_portmask_phy_to_sw(vlan_cfg.mbr);	
-+	vlan->untag = rtl8367c_portmask_phy_to_sw(vlan_cfg.untag);	
-+	vlan->fid = vlan_cfg.fid_msti;
-+
-+	return 0;
-+}
-+
-+static int rtl8367c_set_vlan( unsigned short vid, u32 mbr, u32 untag, u8 fid)
-+{	
-+	rtk_vlan_cfg_t vlan_cfg;
-+	int i;
-+
-+	memset(&vlan_cfg, 0x00, sizeof(rtk_vlan_cfg_t));	
-+
-+	for (i = 0; i < RTL8367C_NUM_PORTS; i++) {
-+		if (mbr & (1 << i)) {
-+			RTK_PORTMASK_PORT_SET(vlan_cfg.mbr, rtl8367c_sw_to_phy_port(i));
-+			if(untag & (1 << i))
-+				RTK_PORTMASK_PORT_SET(vlan_cfg.untag, rtl8367c_sw_to_phy_port(i));			
-+		}
-+	}
-+	vlan_cfg.fid_msti=fid;
-+	vlan_cfg.ivl_en = 1;
-+	return rtk_vlan_set(vid, &vlan_cfg);
-+}
-+
-+
-+static int rtl8367c_get_pvid( int port, int *pvid)
-+{
-+	u32 prio=0;
-+	
-+	if (port >= RTL8367C_NUM_PORTS)
-+		return -EINVAL;		
-+
-+	return rtk_vlan_portPvid_get(rtl8367c_sw_to_phy_port(port),pvid,&prio);
-+}
-+
-+
-+static int rtl8367c_set_pvid( int port, int pvid)
-+{
-+	u32 prio=0;
-+	
-+	if (port >= RTL8367C_NUM_PORTS)
-+		return -EINVAL;		
-+
-+	return rtk_vlan_portPvid_set(rtl8367c_sw_to_phy_port(port),pvid,prio);
-+}
-+
-+static int rtl8367c_get_port_link(int port, int *link, int *speed, int *duplex)
-+{
-+	
-+	if(rtk_port_phyStatus_get(rtl8367c_sw_to_phy_port(port),(rtk_port_linkStatus_t *)link,
-+					(rtk_port_speed_t *)speed,(rtk_port_duplex_t *)duplex))
-+		return -EINVAL;
-+
-+	return 0;
-+}
-+
-+/*common rtl8367 swconfig entry API*/
-+
-+static int
-+rtl8367_sw_set_vlan_enable(struct switch_dev *dev,
-+			   const struct switch_attr *attr,
-+			   struct switch_val *val)
-+{
-+	struct rtl8367_priv *priv = container_of(dev, struct rtl8367_priv, swdev);	
-+
-+	priv->global_vlan_enable = val->value.i ;
-+
-+	return 0;
-+}
-+
-+static int
-+rtl8367_sw_get_vlan_enable(struct switch_dev *dev,
-+			   const struct switch_attr *attr,
-+			   struct switch_val *val)
-+{
-+	struct rtl8367_priv *priv = container_of(dev, struct rtl8367_priv, swdev);
-+
-+	val->value.i = priv->global_vlan_enable;
-+
-+	return 0;
-+}
-+
-+static int rtl8367_sw_reset_mibs(struct switch_dev *dev,
-+				  const struct switch_attr *attr,
-+				  struct switch_val *val)
-+{
-+	return rtl8367c_reset_mibs();
-+}
-+
-+
-+static int rtl8367_sw_reset_port_mibs(struct switch_dev *dev,
-+				       const struct switch_attr *attr,
-+				       struct switch_val *val)
-+{
-+	int port;
-+
-+	port = val->port_vlan;
-+	if (port >= RTL8367C_NUM_PORTS)
-+		return -EINVAL;
-+
-+	return rtl8367c_reset_port_mibs(port);
-+}
-+
-+static int rtl8367_sw_get_port_mib(struct switch_dev *dev,
-+			    const struct switch_attr *attr,
-+			    struct switch_val *val)
-+{	
-+	int i, len = 0;
-+	unsigned long long counter = 0;
-+	static char mib_buf[4096];
-+
-+	if (val->port_vlan >= RTL8367C_NUM_PORTS)
-+		return -EINVAL;
-+
-+	len += snprintf(mib_buf + len, sizeof(mib_buf) - len,
-+			"Port %d MIB counters\n",
-+			val->port_vlan);	
-+
-+	for (i = 0; i <rtl8367c_get_mibs_num(); ++i) {
-+		len += snprintf(mib_buf + len, sizeof(mib_buf) - len,
-+				"%-36s: ",rtl8367c_get_mib_name(i));
-+		if (!rtl8367c_get_port_mib_counter(i, val->port_vlan,
-+					       &counter))
-+			len += snprintf(mib_buf + len, sizeof(mib_buf) - len,
-+					"%llu\n", counter);
-+		else
-+			len += snprintf(mib_buf + len, sizeof(mib_buf) - len,
-+					"%s\n", "N/A");
-+	}
-+
-+	val->value.s = mib_buf;
-+	val->len = len;
-+	return 0;
-+}
-+
-+
-+static int rtl8367_sw_get_vlan_info(struct switch_dev *dev,
-+			     const struct switch_attr *attr,
-+			     struct switch_val *val)
-+{	
-+	int i;
-+	u32 len = 0;
-+	struct rtl8367_vlan_info vlan;
-+	static char vlan_buf[256];
-+	int err;
-+
-+	if (!rtl8367c_is_vlan_valid(val->port_vlan))
-+		return -EINVAL;
-+
-+	memset(vlan_buf, '\0', sizeof(vlan_buf));
-+
-+	err = rtl8367c_get_vlan(val->port_vlan, &vlan);
-+	if (err)
-+		return err;
-+
-+	len += snprintf(vlan_buf + len, sizeof(vlan_buf) - len,
-+			"VLAN %d: Ports: '", vlan.vid);
-+
-+	for (i = 0; i <RTL8367C_NUM_PORTS; i++) {
-+		if (!(vlan.member & (1 << i)))
-+			continue;
-+
-+		len += snprintf(vlan_buf + len, sizeof(vlan_buf) - len, "%d%s", i,
-+				(vlan.untag & (1 << i)) ? "" : "t");
-+	}
-+
-+	len += snprintf(vlan_buf + len, sizeof(vlan_buf) - len,
-+			"', members=%04x, untag=%04x, fid=%u",
-+			vlan.member, vlan.untag, vlan.fid);
-+
-+	val->value.s = vlan_buf;
-+	val->len = len;
-+
-+	return 0;
-+}
-+
-+
-+static int rtl8367_sw_get_vlan_ports(struct switch_dev *dev, struct switch_val *val)
-+{
-+	struct switch_port *port;
-+	struct rtl8367_vlan_info vlan;
-+	int i;	
-+	
-+	if (!rtl8367c_is_vlan_valid(val->port_vlan))
-+		return -EINVAL;
-+
-+	if(rtl8367c_get_vlan(val->port_vlan, &vlan))
-+		return -EINVAL;
-+
-+	port = &val->value.ports[0];
-+	val->len = 0;
-+	for (i = 0; i <RTL8367C_NUM_PORTS ; i++) {
-+		if (!(vlan.member & BIT(i)))
-+			continue;
-+
-+		port->id = i;
-+		port->flags = (vlan.untag & BIT(i)) ?
-+					0 : BIT(SWITCH_PORT_FLAG_TAGGED);
-+		val->len++;
-+		port++;
-+	}
-+	return 0;
-+}
-+
-+
-+static int rtl8367_sw_set_vlan_ports(struct switch_dev *dev, struct switch_val *val)
-+{
-+	struct switch_port *port;
-+	u32 member = 0;
-+	u32 untag = 0;
-+	u8 fid=0;
-+	int err;
-+	int i;	
-+	
-+	if (!rtl8367c_is_vlan_valid(val->port_vlan))
-+		return -EINVAL;
-+
-+	port = &val->value.ports[0];
-+	for (i = 0; i < val->len; i++, port++) {
-+		int pvid = 0;
-+		member |= BIT(port->id);
-+
-+		if (!(port->flags & BIT(SWITCH_PORT_FLAG_TAGGED)))
-+			untag |= BIT(port->id);
-+
-+		/*
-+		 * To ensure that we have a valid MC entry for this VLAN,
-+		 * initialize the port VLAN ID here.
-+		 */
-+		err = rtl8367c_get_pvid(port->id, &pvid);
-+		if (err < 0)
-+			return err;
-+		if (pvid == 0) {
-+			err = rtl8367c_set_pvid(port->id, val->port_vlan);
-+			if (err < 0)
-+				return err;
-+		}
-+	}
-+
-+	//pr_info("[%s] vid=%d , mem=%x,untag=%x,fid=%d \n",__func__,val->port_vlan,member,untag,fid);
-+
-+	return rtl8367c_set_vlan(val->port_vlan, member, untag, fid);	
-+
-+}
-+
-+
-+static int rtl8367_sw_get_port_pvid(struct switch_dev *dev, int port, int *val)
-+{
-+	return rtl8367c_get_pvid(port, val);
-+}
-+
-+
-+static int rtl8367_sw_set_port_pvid(struct switch_dev *dev, int port, int val)
-+{	
-+	return rtl8367c_set_pvid(port, val);
-+}
-+
-+
-+static int rtl8367_sw_reset_switch(struct switch_dev *dev)
-+{
-+	if(rtl8367_switch_reset_func)
-+		(*rtl8367_switch_reset_func)();
-+	else
-+		printk("rest switch is not supported\n");
-+
-+	return 0;
-+}
-+
-+static int rtl8367_sw_get_port_link(struct switch_dev *dev, int port,
-+				    struct switch_port_link *link)
-+{	
-+	int speed;
-+
-+	if (port >= RTL8367C_NUM_PORTS)
-+		return -EINVAL;
-+
-+	if(rtl8367c_get_port_link(port,(int *)&link->link,(int *)&speed,(int *)&link->duplex))
-+		return -EINVAL;		
-+
-+	if (!link->link)
-+		return 0;	
-+
-+	switch (speed) {
-+	case 0:
-+		link->speed = SWITCH_PORT_SPEED_10;
-+		break;
-+	case 1:
-+		link->speed = SWITCH_PORT_SPEED_100;
-+		break;
-+	case 2:
-+		link->speed = SWITCH_PORT_SPEED_1000;
-+		break;
-+	default:
-+		link->speed = SWITCH_PORT_SPEED_UNKNOWN;
-+		break;
-+	}
-+
-+	return 0;
-+}
-+
-+
-+static struct switch_attr rtl8367_globals[] = {
-+	{
-+		.type = SWITCH_TYPE_INT,
-+		.name = "enable_vlan",
-+		.description = "Enable VLAN mode",
-+		.set = rtl8367_sw_set_vlan_enable,
-+		.get = rtl8367_sw_get_vlan_enable,
-+		.max = 1,		
-+	}, {		
-+		.type = SWITCH_TYPE_NOVAL,
-+		.name = "reset_mibs",
-+		.description = "Reset all MIB counters",
-+		.set = rtl8367_sw_reset_mibs,
-+	}
-+};
-+
-+static struct switch_attr rtl8367_port[] = {
-+	{
-+		.type = SWITCH_TYPE_NOVAL,
-+		.name = "reset_mib",
-+		.description = "Reset single port MIB counters",
-+		.set = rtl8367_sw_reset_port_mibs,
-+	}, {
-+		.type = SWITCH_TYPE_STRING,
-+		.name = "mib",
-+		.description = "Get MIB counters for port",
-+		//.max = 33,
-+		.set = NULL,
-+		.get = rtl8367_sw_get_port_mib,
-+	},
-+};
-+
-+static struct switch_attr rtl8367_vlan[] = {
-+	{
-+		.type = SWITCH_TYPE_STRING,
-+		.name = "info",
-+		.description = "Get vlan information",
-+		.max = 1,
-+		.set = NULL,
-+		.get = rtl8367_sw_get_vlan_info,
-+	},
-+};
-+
-+static const struct switch_dev_ops rtl8367_sw_ops = {
-+	.attr_global = {
-+		.attr = rtl8367_globals,
-+		.n_attr = ARRAY_SIZE(rtl8367_globals),
-+	},
-+	.attr_port = {
-+		.attr = rtl8367_port,
-+		.n_attr = ARRAY_SIZE(rtl8367_port),
-+	},
-+	.attr_vlan = {
-+		.attr = rtl8367_vlan,
-+		.n_attr = ARRAY_SIZE(rtl8367_vlan),
-+	},
-+
-+	.get_vlan_ports = rtl8367_sw_get_vlan_ports,
-+	.set_vlan_ports = rtl8367_sw_set_vlan_ports,
-+	.get_port_pvid = rtl8367_sw_get_port_pvid,
-+	.set_port_pvid = rtl8367_sw_set_port_pvid,
-+	.reset_switch = rtl8367_sw_reset_switch,
-+	.get_port_link = rtl8367_sw_get_port_link,
-+};
-+
-+int rtl8367s_swconfig_init(void (*reset_func)(void))
-+{
-+	struct rtl8367_priv  *priv = &rtl8367_priv_data;
-+	struct switch_dev *dev=&priv->swdev;
-+	int err=0;
-+
-+	rtl8367_switch_reset_func = reset_func ;
-+	
-+	memset(priv, 0, sizeof(struct rtl8367_priv));	
-+	priv->global_vlan_enable =0;
-+
-+	dev->name = "RTL8367C";
-+	dev->cpu_port = RTL8367C_SW_CPU_PORT;
-+	dev->ports = RTL8367C_NUM_PORTS;
-+	dev->vlans = RTL8367C_NUM_VIDS;
-+	dev->ops = &rtl8367_sw_ops;
-+	dev->alias = "RTL8367C";		
-+	err = register_switch(dev, NULL);
-+
-+	pr_info("[%s]\n",__func__);
-+
-+	return err;
-+}
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367s_dbg.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367s_dbg.c
-new file mode 100644
-index 0000000000..039d73d876
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367s_dbg.c
-@@ -0,0 +1,648 @@
-+#include <linux/uaccess.h>
-+#include <linux/trace_seq.h>
-+#include <linux/seq_file.h>
-+#include <linux/proc_fs.h>
-+#include <linux/u64_stats_sync.h>
-+
-+#include  "./rtl8367c/include/rtk_switch.h"
-+#include  "./rtl8367c/include/port.h"
-+#include  "./rtl8367c/include/vlan.h"
-+#include  "./rtl8367c/include/rtl8367c_asicdrv_port.h"
-+#include  "./rtl8367c/include/stat.h"
-+#include  "./rtl8367c/include/l2.h"
-+#include  "./rtl8367c/include/smi.h"
-+#include  "./rtl8367c/include/mirror.h"
-+#include  "./rtl8367c/include/igmp.h"
-+#include  "./rtl8367c/include/leaky.h"
-+
-+static struct proc_dir_entry *proc_reg_dir;
-+static struct proc_dir_entry *proc_esw_cnt;
-+static struct proc_dir_entry *proc_vlan_cnt;
-+static struct proc_dir_entry *proc_mac_tbl;
-+static struct proc_dir_entry *proc_reg;
-+static struct proc_dir_entry *proc_phyreg;
-+static struct proc_dir_entry *proc_mirror;
-+static struct proc_dir_entry *proc_igmp;
-+
-+#define PROCREG_ESW_CNT         "esw_cnt"
-+#define PROCREG_VLAN            "vlan"
-+#define PROCREG_MAC_TBL            "mac_tbl"
-+#define PROCREG_REG            "reg"
-+#define PROCREG_PHYREG            "phyreg"
-+#define PROCREG_MIRROR            "mirror"
-+#define PROCREG_IGMP            "igmp"
-+#define PROCREG_DIR             "rtk_gsw"
-+
-+#define RTK_SW_VID_RANGE        16
-+
-+static void rtk_dump_mib_type(rtk_stat_port_type_t cntr_idx)
-+{
-+	rtk_port_t port;
-+	rtk_stat_counter_t Cntr;
-+
-+	for (port = UTP_PORT0; port < (UTP_PORT0 + 5); port++) {
-+		rtk_stat_port_get(port, cntr_idx, &Cntr);
-+		printk("%8llu", Cntr);
-+	}
-+
-+	for (port = EXT_PORT0; port < (EXT_PORT0 + 2); port++) {
-+		rtk_stat_port_get(port, cntr_idx, &Cntr);
-+		printk("%8llu", Cntr);
-+	}
-+	
-+	printk("\n");
-+}
-+static void rtk_hal_dump_mib(void)
-+{
-+
-+	printk("==================%8s%8s%8s%8s%8s%8s%8s\n", "Port0", "Port1",
-+	       "Port2", "Port3", "Port4", "Port16", "Port17");
-+	/* Get TX Unicast Pkts */
-+	printk("TX Unicast Pkts  :");
-+	rtk_dump_mib_type(STAT_IfOutUcastPkts);
-+	/* Get TX Multicast Pkts */
-+	printk("TX Multicast Pkts:");
-+	rtk_dump_mib_type(STAT_IfOutMulticastPkts);
-+	/* Get TX BroadCast Pkts */
-+	printk("TX BroadCast Pkts:");
-+	rtk_dump_mib_type(STAT_IfOutBroadcastPkts);
-+	/* Get TX Collisions */
-+	/* Get TX Puase Frames */
-+	printk("TX Pause Frames  :");
-+	rtk_dump_mib_type(STAT_Dot3OutPauseFrames);
-+	/* Get TX Drop Events */
-+	/* Get RX Unicast Pkts */
-+	printk("RX Unicast Pkts  :");
-+	rtk_dump_mib_type(STAT_IfInUcastPkts);
-+	/* Get RX Multicast Pkts */
-+	printk("RX Multicast Pkts:");
-+	rtk_dump_mib_type(STAT_IfInMulticastPkts);
-+	/* Get RX Broadcast Pkts */
-+	printk("RX Broadcast Pkts:");
-+	rtk_dump_mib_type(STAT_IfInBroadcastPkts);
-+	/* Get RX FCS Erros */
-+	printk("RX FCS Errors    :");
-+	rtk_dump_mib_type(STAT_Dot3StatsFCSErrors);
-+	/* Get RX Undersize Pkts */
-+	printk("RX Undersize Pkts:");
-+	rtk_dump_mib_type(STAT_EtherStatsUnderSizePkts);
-+	/* Get RX Discard Pkts */
-+	printk("RX Discard Pkts  :");
-+	rtk_dump_mib_type(STAT_Dot1dTpPortInDiscards);
-+	/* Get RX Fragments */
-+	printk("RX Fragments     :");
-+	rtk_dump_mib_type(STAT_EtherStatsFragments);
-+	/* Get RX Oversize Pkts */
-+	printk("RX Oversize Pkts :");
-+	rtk_dump_mib_type(STAT_EtherOversizeStats);
-+	/* Get RX Jabbers */
-+	printk("RX Jabbers       :");
-+	rtk_dump_mib_type(STAT_EtherStatsJabbers);
-+	/* Get RX Pause Frames */
-+	printk("RX Pause Frames  :");
-+	rtk_dump_mib_type(STAT_Dot3InPauseFrames);
-+	/* clear MIB */
-+	rtk_stat_global_reset();
-+	
-+}
-+
-+static int rtk_hal_dump_vlan(void)
-+{
-+	rtk_vlan_cfg_t vlan;
-+	int i;
-+
-+	printk("vid    portmap\n");
-+	for (i = 0; i < RTK_SW_VID_RANGE; i++) {
-+		rtk_vlan_get(i, &vlan);
-+		printk("%3d    ", i);
-+		printk("%c",
-+		       RTK_PORTMASK_IS_PORT_SET(vlan.mbr,
-+	                                UTP_PORT0) ? '1' : '-');
-+		printk("%c",
-+	       	RTK_PORTMASK_IS_PORT_SET(vlan.mbr,
-+	                                UTP_PORT1) ? '1' : '-');
-+		printk("%c",
-+		       RTK_PORTMASK_IS_PORT_SET(vlan.mbr,
-+	                                UTP_PORT2) ? '1' : '-');
-+		printk("%c",
-+		       RTK_PORTMASK_IS_PORT_SET(vlan.mbr,
-+	                                UTP_PORT3) ? '1' : '-');
-+		printk("%c",
-+	       	RTK_PORTMASK_IS_PORT_SET(vlan.mbr,
-+	                                UTP_PORT4) ? '1' : '-');
-+		printk("%c",
-+		       RTK_PORTMASK_IS_PORT_SET(vlan.mbr,
-+	                                EXT_PORT0) ? '1' : '-');
-+		printk("%c",
-+		       RTK_PORTMASK_IS_PORT_SET(vlan.mbr,
-+	                                EXT_PORT1) ? '1' : '-');
-+		printk("\n");
-+	}
-+	
-+	return 0;
-+}
-+
-+static void rtk_hal_dump_table(void)
-+{
-+	rtk_uint32 i;
-+	rtk_uint32 address = 0;
-+	rtk_l2_ucastAddr_t l2_data;
-+	rtk_l2_ipMcastAddr_t ipMcastAddr;
-+	rtk_l2_age_time_t age_timout;
-+
-+	rtk_l2_aging_get(&age_timout);
-+	printk("Mac table age timeout =%d\n",(unsigned int)age_timout);
-+
-+	printk("hash  port(0:17)   fid   vid  mac-address\n");
-+	while (1) {
-+		if (rtk_l2_addr_next_get(READMETHOD_NEXT_L2UC, UTP_PORT0, &address, &l2_data) != RT_ERR_OK) {
-+			break;
-+		} else {
-+			printk("%03x   ", l2_data.address);
-+			for (i = 0; i < 5; i++)
-+				if ( l2_data.port == i)
-+					printk("1");
-+				else
-+					printk("-");
-+			for (i = 16; i < 18; i++)
-+				if ( l2_data.port == i)
-+					printk("1");
-+				else
-+					printk("-");
-+
-+			printk("      %2d", l2_data.fid);
-+			printk("  %4d", l2_data.cvid);
-+			printk("  %02x%02x%02x%02x%02x%02x\n", l2_data.mac.octet[0],
-+			l2_data.mac.octet[1], l2_data.mac.octet[2], l2_data.mac.octet[3],
-+			l2_data.mac.octet[4], l2_data.mac.octet[5]);
-+			address ++;
-+			}
-+	}
-+
-+	address = 0;
-+	while (1) {
-+        if (rtk_l2_ipMcastAddr_next_get(&address, &ipMcastAddr) != RT_ERR_OK) {
-+            break;
-+        } else {
-+            printk("%03x   ", ipMcastAddr.address);
-+            for (i = 0; i < 5; i++)
-+                printk("%c", RTK_PORTMASK_IS_PORT_SET(ipMcastAddr.portmask, i) ? '1' : '-');
-+            for (i = 16; i < 18; i++)
-+                printk("%c", RTK_PORTMASK_IS_PORT_SET(ipMcastAddr.portmask, i) ? '1' : '-');
-+			printk("                ");
-+			printk("01005E%06x\n", (ipMcastAddr.dip & 0xefffff));
-+            address ++;
-+            }
-+    }
-+}
-+
-+static void rtk_hal_clear_table(void)
-+{
-+        rtk_api_ret_t ret;
-+
-+        ret = rtk_l2_table_clear();
-+        if (ret != RT_ERR_OK)
-+                printk("rtk_l2_table_clear failed\n");
-+}
-+
-+static void rtk_hal_read_reg(unsigned int reg_addr)
-+{
-+        ret_t retVal;
-+	 unsigned int reg_val;
-+
-+        retVal = smi_read(reg_addr, &reg_val);
-+
-+        if(retVal != RT_ERR_OK)
-+                printk("switch reg read failed\n");
-+        else
-+                printk("reg0x%x = 0x%x\n", reg_addr, reg_val);
-+}
-+
-+static void rtk_hal_write_reg(unsigned int reg_addr , unsigned int reg_val)
-+{
-+        ret_t retVal;
-+
-+    retVal = smi_write(reg_addr, reg_val);
-+
-+    if(retVal != RT_ERR_OK)
-+        printk("switch reg write failed\n");
-+    else
-+        printk("write switch reg0x%x 0x%x success\n", reg_addr, reg_val);
-+}
-+
-+static void rtk_hal_get_phy_reg(unsigned int port ,unsigned int reg_addr )
-+{
-+        ret_t retVal;
-+        rtk_port_phy_data_t Data;
-+
-+        retVal = rtk_port_phyReg_get(port, reg_addr, &Data);
-+        if (retVal == RT_ERR_OK)
-+                printk("Get: phy[%d].reg[%d] = 0x%04x\n", port, reg_addr, Data);
-+        else
-+                printk("read phy reg failed\n");
-+}
-+
-+static void rtk_hal_set_phy_reg(unsigned int port ,unsigned int reg_addr,unsigned int reg_val)
-+{
-+        ret_t retVal;
-+
-+        retVal = rtk_port_phyReg_set(port, reg_addr, reg_val);
-+        if (retVal == RT_ERR_OK)
-+                printk("Set: phy[%d].reg[%d] = 0x%04x\n", port, reg_addr, reg_val);
-+        else
-+                printk("write phy reg failed\n");
-+}
-+
-+static void rtk_hal_set_port_mirror(unsigned int port ,unsigned int rx_port_map,unsigned int tx_port_map)
-+{
-+        rtk_portmask_t rx_portmask;
-+        rtk_portmask_t tx_portmask;
-+        rtk_api_ret_t ret;
-+        int i;
-+
-+        rtk_mirror_portIso_set(ENABLED);
-+        RTK_PORTMASK_CLEAR(rx_portmask);
-+        RTK_PORTMASK_CLEAR(tx_portmask);
-+
-+	for (i = 0; i < 5; i++)
-+                if (rx_port_map & (1 << i))
-+                        RTK_PORTMASK_PORT_SET(rx_portmask, i);
-+
-+        for (i = 0; i < 2; i++)
-+                if (rx_port_map & (1 << (i + 5)))
-+                        RTK_PORTMASK_PORT_SET(rx_portmask, (i + EXT_PORT0));
-+
-+        RTK_PORTMASK_CLEAR(tx_portmask);
-+
-+	for (i = 0; i < 5; i++)
-+		if (tx_port_map & (1 << i))
-+		           RTK_PORTMASK_PORT_SET(tx_portmask, i);
-+
-+	for (i = 0; i < 2; i++)
-+		if (tx_port_map & (1 << (i + 5)))
-+			RTK_PORTMASK_PORT_SET(tx_portmask, (i + EXT_PORT0));
-+
-+	ret = rtk_mirror_portBased_set(port, &rx_portmask, &tx_portmask);
-+
-+        if (!ret)
-+                printk("rtk_mirror_portBased_set success\n");
-+
-+}
-+
-+static void rtk_hal_enable_igmpsnoop(int hw_on)
-+{
-+        rtk_api_ret_t ret;
-+        rtk_portmask_t pmask;
-+
-+        ret = rtk_igmp_init();
-+        if (hw_on == 1) {
-+                RTK_PORTMASK_CLEAR(pmask);
-+                RTK_PORTMASK_PORT_SET(pmask, EXT_PORT0);
-+                ret |= rtk_igmp_static_router_port_set(&pmask);
-+                ret |= rtk_igmp_protocol_set(UTP_PORT4, PROTOCOL_IGMPv1, IGMP_ACTION_FORWARD);
-+                ret |= rtk_igmp_protocol_set(UTP_PORT4, PROTOCOL_IGMPv2, IGMP_ACTION_FORWARD);
-+                ret |= rtk_igmp_protocol_set(UTP_PORT4, PROTOCOL_MLDv1, IGMP_ACTION_FORWARD);
-+                ret |= rtk_igmp_protocol_set(EXT_PORT1, PROTOCOL_IGMPv1, IGMP_ACTION_FORWARD);
-+                ret |= rtk_igmp_protocol_set(EXT_PORT1, PROTOCOL_IGMPv2, IGMP_ACTION_FORWARD);
-+                ret |= rtk_igmp_protocol_set(EXT_PORT1, PROTOCOL_MLDv1, IGMP_ACTION_FORWARD);
-+                ret |= rtk_igmp_protocol_set(UTP_PORT0, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+                ret |= rtk_igmp_protocol_set(UTP_PORT1, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+                ret |= rtk_igmp_protocol_set(UTP_PORT2, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+                ret |= rtk_igmp_protocol_set(UTP_PORT3, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+                ret |= rtk_igmp_protocol_set(EXT_PORT0, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+
-+                ret |= rtk_leaky_vlan_set(LEAKY_IPMULTICAST, ENABLED);
-+                ret |= rtk_l2_ipMcastForwardRouterPort_set(DISABLED);
-+                /* drop unknown multicast packets*/
-+                /* ret |= rtk_trap_unknownMcastPktAction_set(UTP_PORT4, MCAST_IPV4, MCAST_ACTION_DROP);*/
-+        } else {
-+		RTK_PORTMASK_CLEAR(pmask);
-+		RTK_PORTMASK_PORT_SET(pmask, EXT_PORT0);
-+		RTK_PORTMASK_PORT_SET(pmask, EXT_PORT1);
-+                ret |= rtk_igmp_protocol_set(UTP_PORT0, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+                ret |= rtk_igmp_protocol_set(UTP_PORT1, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+                ret |= rtk_igmp_protocol_set(UTP_PORT2, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+                ret |= rtk_igmp_protocol_set(UTP_PORT3, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+                ret |= rtk_igmp_protocol_set(EXT_PORT0, PROTOCOL_IGMPv3, IGMP_ACTION_ASIC);
-+
-+                ret |= rtk_igmp_static_router_port_set(&pmask);
-+        }
-+
-+        if(ret != RT_ERR_OK)
-+                printk("enable switch igmpsnoop failed\n");
-+
-+}
-+
-+static void rtk_hal_disable_igmpsnoop(void)
-+{
-+        if (rtk_igmp_state_set(DISABLED) != RT_ERR_OK)
-+                printk("Disable IGMP SNOOPING failed\n");
-+}
-+
-+static ssize_t mac_tbl_write(struct file *file,
-+                            const char __user *buffer, size_t count,
-+                            loff_t *data)
-+{
-+	rtk_hal_clear_table();
-+
-+        return count;
-+}
-+
-+
-+static ssize_t phyreg_ops(struct file *file,
-+                            const char __user *buffer, size_t count,
-+                            loff_t *data)
-+{
-+        char buf[64];
-+	 unsigned int port;
-+        unsigned int offset;
-+        unsigned int val;
-+
-+        memset(buf, 0, 64);
-+
-+        if (copy_from_user(buf, buffer, count))
-+                return -EFAULT;
-+
-+
-+        if(buf[0] == 'w') {
-+
-+                if(sscanf(buf, "w %d %x %x", &port,&offset,&val) == -1)
-+                        return -EFAULT;
-+                else
-+                        rtk_hal_set_phy_reg(port,offset,val);
-+
-+        } else {
-+
-+		if(sscanf(buf, "r %d %x",&port, &offset) == -1)
-+                        return -EFAULT;
-+                else
-+                        rtk_hal_get_phy_reg(port,offset);
-+        }
-+
-+        return count;
-+}
-+
-+static ssize_t reg_ops(struct file *file,
-+                            const char __user *buffer, size_t count,
-+                            loff_t *data)
-+{
-+        char buf[64];
-+        unsigned int offset;
-+        unsigned int val;
-+
-+        memset(buf, 0, 64);
-+
-+        if (copy_from_user(buf, buffer, count))
-+                return -EFAULT;
-+
-+
-+        if(buf[0] == 'w') {
-+
-+                if(sscanf(buf, "w %x %x", &offset,&val) == -1)
-+                        return -EFAULT;
-+                else
-+                        rtk_hal_write_reg(offset,val);
-+
-+        } else {
-+
-+                if(sscanf(buf, "r %x", &offset) == -1)
-+                        return -EFAULT;
-+                else
-+                        rtk_hal_read_reg(offset);
-+        }
-+
-+        return count;
-+}
-+
-+static ssize_t mirror_ops(struct file *file,
-+                            const char __user *buffer, size_t count,
-+                            loff_t *data)
-+{
-+        char buf[64];
-+	 unsigned int port;
-+        unsigned int tx_map,rx_map;
-+
-+        memset(buf, 0, 64);
-+
-+        if (copy_from_user(buf, buffer, count))
-+                return -EFAULT;
-+
-+	if(sscanf(buf, "%d %x %x", &port,&rx_map,&tx_map) == -1)
-+		return -EFAULT;
-+	else
-+		rtk_hal_set_port_mirror(port,rx_map,tx_map);
-+
-+        return count;
-+}
-+
-+
-+static ssize_t igmp_ops(struct file *file,
-+                            const char __user *buffer, size_t count,
-+                            loff_t *data)
-+{
-+        char buf[8];
-+        unsigned int ops;
-+
-+        if (copy_from_user(buf, buffer, count))
-+                return -EFAULT;
-+
-+	if(sscanf(buf, "%d", &ops) == -1)
-+		return -EFAULT;
-+
-+        if(ops == 0)
-+                rtk_hal_disable_igmpsnoop();
-+	else if (ops == 1)
-+		rtk_hal_enable_igmpsnoop(0);
-+	else //hw igmp
-+		rtk_hal_enable_igmpsnoop(1);
-+
-+        return count;
-+}
-+
-+
-+static int esw_cnt_read(struct seq_file *seq, void *v)
-+{
-+	rtk_hal_dump_mib();
-+	return 0;
-+}
-+
-+static int vlan_read(struct seq_file *seq, void *v)
-+{
-+	rtk_hal_dump_vlan();
-+	return 0;
-+}
-+
-+static int mac_tbl_read(struct seq_file *seq, void *v)
-+{
-+	rtk_hal_dump_table();
-+	return 0;
-+}
-+
-+static int reg_show(struct seq_file *seq, void *v)
-+{
-+	return 0;
-+}
-+
-+static int phyreg_show(struct seq_file *seq, void *v)
-+{
-+	return 0;
-+}
-+
-+static int mirror_show(struct seq_file *seq, void *v)
-+{
-+	return 0;
-+}
-+
-+static int igmp_show(struct seq_file *seq, void *v)
-+{
-+	return 0;
-+}
-+
-+static int switch_count_open(struct inode *inode, struct file *file)
-+{
-+	return single_open(file, esw_cnt_read, 0);
-+}
-+
-+static int switch_vlan_open(struct inode *inode, struct file *file)
-+{
-+	return single_open(file, vlan_read, 0);
-+}
-+
-+static int mac_tbl_open(struct inode *inode, struct file *file)
-+{
-+	return single_open(file, mac_tbl_read, 0);
-+}
-+
-+static int reg_open(struct inode *inode, struct file *file)
-+{
-+	return single_open(file, reg_show, 0);
-+}
-+
-+static int phyreg_open(struct inode *inode, struct file *file)
-+{
-+	return single_open(file, phyreg_show, 0);
-+}
-+
-+static int mirror_open(struct inode *inode, struct file *file)
-+{
-+	return single_open(file, mirror_show, 0);
-+}
-+
-+static int igmp_open(struct inode *inode, struct file *file)
-+{
-+	return single_open(file, igmp_show, 0);
-+}
-+
-+
-+static const struct proc_ops switch_count_fops = {
-+	.proc_open = switch_count_open,
-+	.proc_read = seq_read,
-+	.proc_lseek = seq_lseek,
-+	.proc_release = single_release
-+};
-+
-+static const struct proc_ops switch_vlan_fops = {
-+	.proc_open = switch_vlan_open,
-+	.proc_read = seq_read,
-+	.proc_lseek = seq_lseek,
-+	.proc_release = single_release
-+};
-+
-+static const struct proc_ops mac_tbl_fops = {
-+	.proc_open = mac_tbl_open,
-+	.proc_read = seq_read,
-+	.proc_lseek = seq_lseek,
-+	.proc_write = mac_tbl_write,
-+	.proc_release = single_release
-+};
-+
-+static const struct proc_ops reg_fops = {
-+	.proc_open = reg_open,
-+	.proc_read = seq_read,
-+	.proc_lseek = seq_lseek,
-+	.proc_write = reg_ops,
-+	.proc_release = single_release
-+};
-+
-+static const struct proc_ops phyreg_fops = {
-+	.proc_open = phyreg_open,
-+	.proc_read = seq_read,
-+	.proc_lseek = seq_lseek,
-+	.proc_write = phyreg_ops,
-+	.proc_release = single_release
-+};
-+
-+static const struct proc_ops mirror_fops = {
-+	.proc_open = mirror_open,
-+	.proc_read = seq_read,
-+	.proc_lseek = seq_lseek,
-+	.proc_write = mirror_ops,
-+	.proc_release = single_release
-+};
-+
-+static const struct proc_ops igmp_fops = {
-+	.proc_open = igmp_open,
-+	.proc_read = seq_read,
-+	.proc_lseek = seq_lseek,
-+	.proc_write = igmp_ops,
-+	.proc_release = single_release
-+};
-+
-+int gsw_debug_proc_init(void)
-+{
-+
-+	if (!proc_reg_dir)
-+		proc_reg_dir = proc_mkdir(PROCREG_DIR, NULL);
-+
-+	proc_esw_cnt =
-+	proc_create(PROCREG_ESW_CNT, 0, proc_reg_dir, &switch_count_fops);
-+
-+	if (!proc_esw_cnt)
-+		pr_err("!! FAIL to create %s PROC !!\n", PROCREG_ESW_CNT);
-+
-+	proc_vlan_cnt =
-+	proc_create(PROCREG_VLAN, 0, proc_reg_dir, &switch_vlan_fops);
-+
-+	if (!proc_vlan_cnt)
-+		pr_err("!! FAIL to create %s PROC !!\n", PROCREG_VLAN);
-+
-+	proc_mac_tbl =
-+	proc_create(PROCREG_MAC_TBL, 0, proc_reg_dir, &mac_tbl_fops);
-+
-+	if (!proc_mac_tbl)
-+		pr_err("!! FAIL to create %s PROC !!\n", PROCREG_MAC_TBL);
-+
-+	proc_reg =
-+	proc_create(PROCREG_REG, 0, proc_reg_dir, &reg_fops);
-+
-+	if (!proc_reg)
-+		pr_err("!! FAIL to create %s PROC !!\n", PROCREG_REG);
-+
-+	proc_phyreg =
-+	proc_create(PROCREG_PHYREG, 0, proc_reg_dir, &phyreg_fops);
-+
-+	if (!proc_phyreg)
-+		pr_err("!! FAIL to create %s PROC !!\n", PROCREG_PHYREG);
-+
-+	proc_mirror =
-+	proc_create(PROCREG_MIRROR, 0, proc_reg_dir, &mirror_fops);
-+
-+	if (!proc_mirror)
-+		pr_err("!! FAIL to create %s PROC !!\n", PROCREG_MIRROR);
-+
-+	proc_igmp =
-+	proc_create(PROCREG_IGMP, 0, proc_reg_dir, &igmp_fops);
-+
-+	if (!proc_igmp)
-+		pr_err("!! FAIL to create %s PROC !!\n", PROCREG_IGMP);
-+
-+	return 0;
-+}
-+
-+void gsw_debug_proc_exit(void)
-+{
-+	if (proc_esw_cnt)
-+		remove_proc_entry(PROCREG_ESW_CNT, proc_reg_dir);
-+}
-+
-+
-diff --git a/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367s_mdio.c b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367s_mdio.c
-new file mode 100644
-index 0000000000..ae958e8967
---- /dev/null
-+++ b/target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367s_mdio.c
-@@ -0,0 +1,312 @@
-+/*
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version 2
-+ * of the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ */
-+ 
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/delay.h>
-+#include <linux/of_mdio.h>
-+#include <linux/of_platform.h>
-+#include <linux/of_gpio.h>
-+
-+
-+#include  "./rtl8367c/include/rtk_switch.h"
-+#include  "./rtl8367c/include/port.h"
-+#include  "./rtl8367c/include/vlan.h"
-+#include  "./rtl8367c/include/rtl8367c_asicdrv_port.h"
-+
-+struct rtk_gsw {
-+ 	struct device           *dev;
-+ 	struct mii_bus          *bus;
-+	int reset_pin;
-+};
-+
-+static struct rtk_gsw *_gsw;
-+
-+extern int gsw_debug_proc_init(void);
-+extern void gsw_debug_proc_exit(void);
-+
-+#ifdef CONFIG_SWCONFIG
-+extern int rtl8367s_swconfig_init( void (*reset_func)(void) );
-+#endif
-+
-+/*mii_mgr_read/mii_mgr_write is the callback API for rtl8367 driver*/
-+unsigned int mii_mgr_read(unsigned int phy_addr,unsigned int phy_register,unsigned int *read_data)
-+{
-+	struct mii_bus *bus = _gsw->bus;
-+
-+	mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
-+
-+	*read_data = bus->read(bus, phy_addr, phy_register);
-+
-+	mutex_unlock(&bus->mdio_lock);
-+
-+	return 0;
-+}
-+
-+unsigned int mii_mgr_write(unsigned int phy_addr,unsigned int phy_register,unsigned int write_data)
-+{
-+	struct mii_bus *bus =  _gsw->bus;
-+
-+	mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
-+
-+	bus->write(bus, phy_addr, phy_register, write_data);
-+
-+	mutex_unlock(&bus->mdio_lock);
-+	
-+	return 0;
-+}
-+
-+static int rtl8367s_hw_reset(void)
-+{
-+	struct rtk_gsw *gsw = _gsw;
-+	int ret;
-+
-+	if (gsw->reset_pin < 0)
-+		return 0;
-+
-+	ret = devm_gpio_request(gsw->dev, gsw->reset_pin, "mediatek,reset-pin");
-+
-+	if (ret)
-+                printk("fail to devm_gpio_request\n");
-+
-+	gpio_direction_output(gsw->reset_pin, 0);
-+
-+	usleep_range(1000, 1100);
-+
-+	gpio_set_value(gsw->reset_pin, 1);
-+
-+	mdelay(500);
-+
-+	devm_gpio_free(gsw->dev, gsw->reset_pin);
-+
-+	return 0;
-+	
-+}
-+
-+static int rtl8367s_vlan_config(int want_at_p0)
-+{
-+	rtk_vlan_cfg_t vlan1, vlan2;
-+	
-+	/* Set LAN/WAN VLAN partition */
-+	memset(&vlan1, 0x00, sizeof(rtk_vlan_cfg_t));
-+
-+	RTK_PORTMASK_PORT_SET(vlan1.mbr, EXT_PORT0);
-+	RTK_PORTMASK_PORT_SET(vlan1.mbr, UTP_PORT1);
-+	RTK_PORTMASK_PORT_SET(vlan1.mbr, UTP_PORT2);
-+	RTK_PORTMASK_PORT_SET(vlan1.mbr, UTP_PORT3);
-+	RTK_PORTMASK_PORT_SET(vlan1.untag, EXT_PORT0);
-+	RTK_PORTMASK_PORT_SET(vlan1.untag, UTP_PORT1);
-+	RTK_PORTMASK_PORT_SET(vlan1.untag, UTP_PORT2);
-+	RTK_PORTMASK_PORT_SET(vlan1.untag, UTP_PORT3);
-+  
-+	 if (want_at_p0) {
-+		RTK_PORTMASK_PORT_SET(vlan1.mbr, UTP_PORT4);
-+		RTK_PORTMASK_PORT_SET(vlan1.untag, UTP_PORT4);
-+        } else {
-+		RTK_PORTMASK_PORT_SET(vlan1.mbr, UTP_PORT0);
-+		RTK_PORTMASK_PORT_SET(vlan1.untag, UTP_PORT0);
-+        }
-+
-+	vlan1.ivl_en = 1;
-+	
-+	rtk_vlan_set(1, &vlan1);
-+	
-+	memset(&vlan2, 0x00, sizeof(rtk_vlan_cfg_t));
-+	
-+	RTK_PORTMASK_PORT_SET(vlan2.mbr, EXT_PORT1);
-+	RTK_PORTMASK_PORT_SET(vlan2.untag, EXT_PORT1);
-+
-+	if (want_at_p0) {
-+		RTK_PORTMASK_PORT_SET(vlan2.mbr, UTP_PORT0);
-+		RTK_PORTMASK_PORT_SET(vlan2.untag, UTP_PORT0);
-+	} else {
-+		RTK_PORTMASK_PORT_SET(vlan2.mbr, UTP_PORT4);
-+		RTK_PORTMASK_PORT_SET(vlan2.untag, UTP_PORT4);
-+	}
-+
-+	vlan2.ivl_en = 1;
-+	rtk_vlan_set(2, &vlan2);
-+
-+	rtk_vlan_portPvid_set(EXT_PORT0, 1, 0);
-+	rtk_vlan_portPvid_set(UTP_PORT1, 1, 0);
-+	rtk_vlan_portPvid_set(UTP_PORT2, 1, 0);
-+	rtk_vlan_portPvid_set(UTP_PORT3, 1, 0);
-+	rtk_vlan_portPvid_set(EXT_PORT1, 2, 0);
-+
-+	if (want_at_p0) {
-+		rtk_vlan_portPvid_set(UTP_PORT0, 2, 0);
-+		rtk_vlan_portPvid_set(UTP_PORT4, 1, 0);
-+	} else {
-+		rtk_vlan_portPvid_set(UTP_PORT0, 1, 0);
-+		rtk_vlan_portPvid_set(UTP_PORT4, 2, 0);
-+	}
-+
-+	return 0;	
-+}
-+
-+static int rtl8367s_hw_init(void)
-+{
-+
-+	rtl8367s_hw_reset();
-+
-+	if(rtk_switch_init())
-+	        return -1;
-+
-+	mdelay(500);
-+
-+	if (rtk_vlan_reset())
-+	        return -1;
-+
-+	if (rtk_vlan_init())
-+	        return -1;
-+
-+	return 0;
-+}
-+
-+static void set_rtl8367s_sgmii(void)
-+{
-+	rtk_port_mac_ability_t mac_cfg;
-+	rtk_mode_ext_t mode;
-+
-+	mode = MODE_EXT_HSGMII;
-+	mac_cfg.forcemode = MAC_FORCE;
-+	mac_cfg.speed = PORT_SPEED_2500M;
-+	mac_cfg.duplex = PORT_FULL_DUPLEX;
-+	mac_cfg.link = PORT_LINKUP;
-+	mac_cfg.nway = DISABLED;
-+	mac_cfg.txpause = ENABLED;
-+	mac_cfg.rxpause = ENABLED;
-+	rtk_port_macForceLinkExt_set(EXT_PORT0, mode, &mac_cfg);
-+	rtk_port_sgmiiNway_set(EXT_PORT0, DISABLED);
-+	rtk_port_phyEnableAll_set(ENABLED);
-+
-+}
-+
-+static void set_rtl8367s_rgmii(void)
-+{
-+	rtk_port_mac_ability_t mac_cfg;
-+	rtk_mode_ext_t mode;
-+
-+	mode = MODE_EXT_RGMII;
-+	mac_cfg.forcemode = MAC_FORCE;
-+	mac_cfg.speed = PORT_SPEED_1000M;
-+	mac_cfg.duplex = PORT_FULL_DUPLEX;
-+	mac_cfg.link = PORT_LINKUP;
-+	mac_cfg.nway = DISABLED;
-+	mac_cfg.txpause = ENABLED;
-+	mac_cfg.rxpause = ENABLED;
-+	rtk_port_macForceLinkExt_set(EXT_PORT1, mode, &mac_cfg);
-+	rtk_port_rgmiiDelayExt_set(EXT_PORT1, 1, 3);
-+	rtk_port_phyEnableAll_set(ENABLED);
-+	
-+}
-+
-+void init_gsw(void)
-+{
-+	rtl8367s_hw_init();
-+	set_rtl8367s_sgmii();
-+	set_rtl8367s_rgmii();
-+}
-+
-+// bleow are platform driver
-+static const struct of_device_id rtk_gsw_match[] = {
-+	{ .compatible = "mediatek,rtk-gsw" },
-+	{},
-+};
-+
-+MODULE_DEVICE_TABLE(of, rtk_gsw_match);
-+
-+static int rtk_gsw_probe(struct platform_device *pdev)
-+{
-+	struct device_node *np = pdev->dev.of_node;
-+	struct device_node *mdio;
-+	struct mii_bus *mdio_bus;
-+	struct rtk_gsw *gsw;
-+	const char *pm;
-+
-+	mdio = of_parse_phandle(np, "mediatek,mdio", 0);
-+
-+	if (!mdio)
-+		return -EINVAL;
-+
-+	mdio_bus = of_mdio_find_bus(mdio);
-+
-+	if (!mdio_bus)
-+		return -EPROBE_DEFER;
-+
-+	gsw = devm_kzalloc(&pdev->dev, sizeof(struct rtk_gsw), GFP_KERNEL);
-+	
-+	if (!gsw)
-+		return -ENOMEM;	
-+
-+	gsw->dev = &pdev->dev;
-+
-+	gsw->bus = mdio_bus;
-+
-+	gsw->reset_pin = of_get_named_gpio(np, "mediatek,reset-pin", 0);
-+
-+	_gsw = gsw;
-+
-+	init_gsw();
-+
-+	//init default vlan or init swocnfig
-+	if(!of_property_read_string(pdev->dev.of_node,
-+						"mediatek,port_map", &pm)) {
-+
-+		if (!strcasecmp(pm, "wllll"))
-+			rtl8367s_vlan_config(1); 
-+		else
-+			rtl8367s_vlan_config(0);
-+		
-+		} else {
-+#ifdef CONFIG_SWCONFIG		
-+		rtl8367s_swconfig_init(&init_gsw);
-+#else
-+		rtl8367s_vlan_config(0);
-+#endif
-+	}
-+
-+	gsw_debug_proc_init();
-+
-+	platform_set_drvdata(pdev, gsw);
-+
-+	return 0;
-+	
-+}
-+
-+static int rtk_gsw_remove(struct platform_device *pdev)
-+{
-+	platform_set_drvdata(pdev, NULL);
-+	gsw_debug_proc_exit();
-+
-+	return 0;
-+}
-+
-+static struct platform_driver gsw_driver = {
-+	.probe = rtk_gsw_probe,
-+	.remove = rtk_gsw_remove,
-+	.driver = {
-+		.name = "rtk-gsw",
-+		.owner = THIS_MODULE,
-+		.of_match_table = rtk_gsw_match,
-+	},
-+};
-+
-+module_platform_driver(gsw_driver);
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Mark Lee <marklee0201@gmail.com>");
-+MODULE_DESCRIPTION("rtl8367c switch driver for MT7622");
-+
-diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-rfb1-ubi.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-rfb1-ubi.dts
-deleted file mode 100644
-index 8b58c1e12f..0000000000
---- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-rfb1-ubi.dts
-+++ /dev/null
-@@ -1,644 +0,0 @@
--/*
-- * Copyright (c) 2018 MediaTek Inc.
-- * Author: Ryder Lee <ryder.lee@mediatek.com>
-- *
-- * SPDX-License-Identifier: (GPL-2.0-only OR MIT)
-- */
--
--/dts-v1/;
--#include <dt-bindings/input/input.h>
--#include <dt-bindings/gpio/gpio.h>
--
--#include "mt7622.dtsi"
--#include "mt6380.dtsi"
--
--/ {
--	model = "MT7622_MT7531 RFB";
--	compatible = "mediatek,mt7622,ubi";
--
--	aliases {
--		serial0 = &uart0;
--	};
--
--	chosen {
--		stdout-path = "serial0:115200n8";
--		bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
--	};
--
--	cpus {
--		cpu@0 {
--			proc-supply = <&mt6380_vcpu_reg>;
--			sram-supply = <&mt6380_vm_reg>;
--		};
--
--		cpu@1 {
--			proc-supply = <&mt6380_vcpu_reg>;
--			sram-supply = <&mt6380_vm_reg>;
--		};
--	};
--
--	gpio-keys {
--		compatible = "gpio-keys";
--
--		factory {
--			label = "factory";
--			linux,code = <BTN_0>;
--			gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
--		};
--
--		wps {
--			label = "wps";
--			linux,code = <KEY_WPS_BUTTON>;
--			gpios = <&pio 102 GPIO_ACTIVE_HIGH>;
--		};
--	};
--
--	gsw: gsw@0 {
--		compatible = "mediatek,mt753x";
--		mediatek,ethsys = <&ethsys>;
--		#address-cells = <1>;
--		#size-cells = <0>;
--	};
--
--	leds {
--		compatible = "gpio-leds";
--
--		green {
--			label = "bpi-r64:pio:green";
--			gpios = <&pio 89 GPIO_ACTIVE_HIGH>;
--		};
--
--		red {
--			label = "bpi-r64:pio:red";
--			gpios = <&pio 88 GPIO_ACTIVE_HIGH>;
--		};
--	};
--
--	memory {
--		reg = <0 0x40000000 0 0x40000000>;
--	};
--
--	reg_1p8v: regulator-1p8v {
--		compatible = "regulator-fixed";
--		regulator-name = "fixed-1.8V";
--		regulator-min-microvolt = <1800000>;
--		regulator-max-microvolt = <1800000>;
--		regulator-always-on;
--	};
--
--	reg_3p3v: regulator-3p3v {
--		compatible = "regulator-fixed";
--		regulator-name = "fixed-3.3V";
--		regulator-min-microvolt = <3300000>;
--		regulator-max-microvolt = <3300000>;
--		regulator-boot-on;
--		regulator-always-on;
--	};
--
--	reg_5v: regulator-5v {
--		compatible = "regulator-fixed";
--		regulator-name = "fixed-5V";
--		regulator-min-microvolt = <5000000>;
--		regulator-max-microvolt = <5000000>;
--		regulator-boot-on;
--		regulator-always-on;
--	};
--};
--
--&bch {
--	status = "okay";
--};
--
--&btif {
--	status = "okay";
--};
--
--&cir {
--	pinctrl-names = "default";
--	pinctrl-0 = <&irrx_pins>;
--	status = "okay";
--};
--
--&eth {
--	status = "okay";
--	gmac0: mac@0 {
--		compatible = "mediatek,eth-mac";
--		reg = <0>;
--		phy-mode = "2500base-x";
--
--		fixed-link {
--			speed = <2500>;
--			full-duplex;
--			pause;
--		};
--	};
--
--	gmac1: mac@1 {
--		compatible = "mediatek,eth-mac";
--		reg = <1>;
--		phy-mode = "rgmii";
--
--		fixed-link {
--			speed = <1000>;
--			full-duplex;
--			pause;
--		};
--	};
--
--	mdio: mdio-bus {
--		#address-cells = <1>;
--		#size-cells = <0>;
--	};
--};
--
--&gsw {
--	mediatek,mdio = <&mdio>;
--	mediatek,portmap = "llllw";
--	mediatek,mdio_master_pinmux = <0>;
--	reset-gpios = <&pio 54 0>;
--	interrupt-parent = <&pio>;
--	interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
--	status = "okay";
--
--	port5: port@5 {
--		compatible = "mediatek,mt753x-port";
--		reg = <5>;
--		phy-mode = "rgmii";
--		fixed-link {
--			speed = <1000>;
--			full-duplex;
--		};
--	};
--
--	port6: port@6 {
--		compatible = "mediatek,mt753x-port";
--		reg = <6>;
--		phy-mode = "sgmii";
--		fixed-link {
--			speed = <2500>;
--			full-duplex;
--		};
--	};
--};
--
--&i2c1 {
--	pinctrl-names = "default";
--	pinctrl-0 = <&i2c1_pins>;
--	status = "okay";
--};
--
--&i2c2 {
--	pinctrl-names = "default";
--	pinctrl-0 = <&i2c2_pins>;
--	status = "okay";
--};
--
--&mmc0 {
--	pinctrl-names = "default", "state_uhs";
--	pinctrl-0 = <&emmc_pins_default>;
--	pinctrl-1 = <&emmc_pins_uhs>;
--	status = "okay";
--	bus-width = <8>;
--	max-frequency = <50000000>;
--	cap-mmc-highspeed;
--	mmc-hs200-1_8v;
--	vmmc-supply = <&reg_3p3v>;
--	vqmmc-supply = <&reg_1p8v>;
--	assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>;
--	assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
--	non-removable;
--};
--
--&mmc1 {
--	pinctrl-names = "default", "state_uhs";
--	pinctrl-0 = <&sd0_pins_default>;
--	pinctrl-1 = <&sd0_pins_uhs>;
--	status = "okay";
--	bus-width = <4>;
--	max-frequency = <50000000>;
--	cap-sd-highspeed;
--	r_smpl = <1>;
--	cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>;
--	vmmc-supply = <&reg_3p3v>;
--	vqmmc-supply = <&reg_3p3v>;
--	assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
--	assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
--};
--
--&nandc {
--	pinctrl-names = "default";
--	pinctrl-0 = <&parallel_nand_pins>;
--	status = "disabled";
--};
--
--&nor_flash {
--	pinctrl-names = "default";
--	pinctrl-0 = <&spi_nor_pins>;
--	status = "disabled";
--
--	flash@0 {
--		compatible = "jedec,spi-nor";
--		reg = <0>;
--	};
--};
--
--&pcie0 {
--	pinctrl-names = "default";
--	pinctrl-0 = <&pcie0_pins>;
--	status = "okay";
--};
--
--&pcie1 {
--	pinctrl-names = "default";
--	pinctrl-0 = <&pcie1_pins>;
--	status = "okay";
--};
--
--&pio {
--	/* Attention: GPIO 90 is used to switch between PCIe@1,0 and
--	 * SATA functions. i.e. output-high: PCIe, output-low: SATA
--	 */
--	asm_sel {
--		gpio-hog;
--		gpios = <90 GPIO_ACTIVE_HIGH>;
--		output-high;
--	};
--
--	/* eMMC is shared pin with parallel NAND */
--	emmc_pins_default: emmc-pins-default {
--		mux {
--			function = "emmc", "emmc_rst";
--			groups = "emmc";
--		};
--
--		/* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",
--		 * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4,
--		 * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
--		 */
--		conf-cmd-dat {
--			pins = "NDL0", "NDL1", "NDL2",
--			       "NDL3", "NDL4", "NDL5",
--			       "NDL6", "NDL7", "NRB";
--			input-enable;
--			bias-pull-up;
--		};
--
--		conf-clk {
--			pins = "NCLE";
--			bias-pull-down;
--		};
--	};
--
--	emmc_pins_uhs: emmc-pins-uhs {
--		mux {
--			function = "emmc";
--			groups = "emmc";
--		};
--
--		conf-cmd-dat {
--			pins = "NDL0", "NDL1", "NDL2",
--			       "NDL3", "NDL4", "NDL5",
--			       "NDL6", "NDL7", "NRB";
--			input-enable;
--			drive-strength = <4>;
--			bias-pull-up;
--		};
--
--		conf-clk {
--			pins = "NCLE";
--			drive-strength = <4>;
--			bias-pull-down;
--		};
--	};
--
--	eth_pins: eth-pins {
--		mux {
--			function = "eth";
--			groups = "mdc_mdio", "rgmii_via_gmac2";
--		};
--	};
--
--	i2c1_pins: i2c1-pins {
--		mux {
--			function = "i2c";
--			groups =  "i2c1_0";
--		};
--	};
--
--	i2c2_pins: i2c2-pins {
--		mux {
--			function = "i2c";
--			groups =  "i2c2_0";
--		};
--	};
--
--	i2s1_pins: i2s1-pins {
--		mux {
--			function = "i2s";
--			groups =  "i2s_out_mclk_bclk_ws",
--				  "i2s1_in_data",
--				  "i2s1_out_data";
--		};
--
--		conf {
--			pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK",
--			       "I2S_WS", "I2S_MCLK";
--			drive-strength = <12>;
--			bias-pull-down;
--		};
--	};
--
--	irrx_pins: irrx-pins {
--		mux {
--			function = "ir";
--			groups =  "ir_1_rx";
--		};
--	};
--
--	irtx_pins: irtx-pins {
--		mux {
--			function = "ir";
--			groups =  "ir_1_tx";
--		};
--	};
--
--	/* Parallel nand is shared pin with eMMC */
--	parallel_nand_pins: parallel-nand-pins {
--		mux {
--			function = "flash";
--			groups = "par_nand";
--		};
--	};
--
--	pcie0_pins: pcie0-pins {
--		mux {
--			function = "pcie";
--			groups = "pcie0_pad_perst",
--				 "pcie0_1_waken",
--				 "pcie0_1_clkreq";
--		};
--	};
--
--	pcie1_pins: pcie1-pins {
--		mux {
--			function = "pcie";
--			groups = "pcie1_pad_perst",
--				 "pcie1_0_waken",
--				 "pcie1_0_clkreq";
--		};
--	};
--
--	pmic_bus_pins: pmic-bus-pins {
--		mux {
--			function = "pmic";
--			groups = "pmic_bus";
--		};
--	};
--
--	pwm7_pins: pwm1-2-pins {
--		mux {
--			function = "pwm";
--			groups = "pwm_ch7_2";
--		};
--	};
--
--	wled_pins: wled-pins {
--		mux {
--			function = "led";
--			groups = "wled";
--		};
--	};
--
--	sd0_pins_default: sd0-pins-default {
--		mux {
--			function = "sd";
--			groups = "sd_0";
--		};
--
--		/* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN",
--		 *  "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1,
--		 *  DAT2, DAT3, CMD, CLK for SD respectively.
--		 */
--		conf-cmd-data {
--			pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
--			       "I2S2_IN","I2S4_OUT";
--			input-enable;
--			drive-strength = <8>;
--			bias-pull-up;
--		};
--		conf-clk {
--			pins = "I2S3_OUT";
--			drive-strength = <12>;
--			bias-pull-down;
--		};
--		conf-cd {
--			pins = "TXD3";
--			bias-pull-up;
--		};
--	};
--
--	sd0_pins_uhs: sd0-pins-uhs {
--		mux {
--			function = "sd";
--			groups = "sd_0";
--		};
--
--		conf-cmd-data {
--			pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
--			       "I2S2_IN","I2S4_OUT";
--			input-enable;
--			bias-pull-up;
--		};
--
--		conf-clk {
--			pins = "I2S3_OUT";
--			bias-pull-down;
--		};
--	};
--
--	/* Serial NAND is shared pin with SPI-NOR */
--	serial_nand_pins: serial-nand-pins {
--		mux {
--			function = "flash";
--			groups = "snfi";
--		};
--	};
--
--	spic0_pins: spic0-pins {
--		mux {
--			function = "spi";
--			groups = "spic0_0";
--		};
--	};
--
--	spic1_pins: spic1-pins {
--		mux {
--			function = "spi";
--			groups = "spic1_0";
--		};
--	};
--
--	/* SPI-NOR is shared pin with serial NAND */
--	spi_nor_pins: spi-nor-pins {
--		mux {
--			function = "flash";
--			groups = "spi_nor";
--		};
--	};
--
--	/* serial NAND is shared pin with SPI-NOR */
--	serial_nand_pins: serial-nand-pins {
--		mux {
--			function = "flash";
--			groups = "snfi";
--		};
--	};
--
--	uart0_pins: uart0-pins {
--		mux {
--			function = "uart";
--			groups = "uart0_0_tx_rx" ;
--		};
--	};
--
--	uart2_pins: uart2-pins {
--		mux {
--			function = "uart";
--			groups = "uart2_1_tx_rx" ;
--		};
--	};
--
--	watchdog_pins: watchdog-pins {
--		mux {
--			function = "watchdog";
--			groups = "watchdog";
--		};
--	};
--};
--
--&pwm {
--	pinctrl-names = "default";
--	pinctrl-0 = <&pwm7_pins>;
--	status = "okay";
--};
--
--&pwrap {
--	pinctrl-names = "default";
--	pinctrl-0 = <&pmic_bus_pins>;
--
--	status = "okay";
--};
--
--&sata {
--	status = "disable";
--};
--
--&sata_phy {
--	status = "disable";
--};
--
--&snfi {
--	pinctrl-names = "default";
--	pinctrl-0 = <&serial_nand_pins>;
--	status = "okay";
--
--	spi_nand@0 {
--		#address-cells = <1>;
--		#size-cells = <1>;
--		compatible = "spi-nand";
--		spi-max-frequency = <104000000>;
--		reg = <0>;
--
--		partitions {
--			compatible = "fixed-partitions";
--			#address-cells = <1>;
--			#size-cells = <1>;
--
--			partition@0 {
--				label = "Preloader";
--				reg = <0x00000 0x0080000>;
--				read-only;
--			};
--
--			partition@80000 {
--				label = "ATF";
--				reg = <0x80000 0x0040000>;
--			};
--
--			partition@c0000 {
--				label = "Bootloader";
--				reg = <0xc0000 0x0080000>;
--			};
--
--			partition@140000 {
--				label = "Config";
--				reg = <0x140000 0x0080000>;
--			};
--
--			factory: partition@1c0000 {
--				label = "Factory";
--				reg = <0x1c0000 0x0040000>;
--			};
--
--			partition@200000 {
--				label = "kernel";
--				reg = <0x200000 0x400000>;
--			};
--
--			partition@600000 {
--				label = "ubi";
--				reg = <0x600000 0x1C00000>;
--			};
--
--			partition@2200000 {
--				label = "User_data";
--				reg = <0x2200000 0x4000000>;
--			};
--		};
--	};
--};
--
--&spi0 {
--	pinctrl-names = "default";
--	pinctrl-0 = <&spic0_pins>;
--	status = "okay";
--};
--
--&spi1 {
--	pinctrl-names = "default";
--	pinctrl-0 = <&spic1_pins>;
--	status = "okay";
--};
--
--&ssusb {
--	vusb33-supply = <&reg_3p3v>;
--	vbus-supply = <&reg_5v>;
--	status = "okay";
--};
--
--&u3phy {
--	status = "okay";
--};
--
--&uart0 {
--	pinctrl-names = "default";
--	pinctrl-0 = <&uart0_pins>;
--	status = "okay";
--};
--
--&uart2 {
--	pinctrl-names = "default";
--	pinctrl-0 = <&uart2_pins>;
--	status = "okay";
--};
--
--&watchdog {
--	pinctrl-names = "default";
--	pinctrl-0 = <&watchdog_pins>;
--	status = "okay";
--};
--
--&wmac {
--	mediatek,mtd-eeprom = <&factory 0x0000>;
--	status = "okay";
--};
-diff --git a/target/linux/mediatek/image/Makefile b/target/linux/mediatek/image/Makefile
-index 45e83cece5..7aa7a7285c 100644
---- a/target/linux/mediatek/image/Makefile
-+++ b/target/linux/mediatek/image/Makefile
-@@ -23,7 +23,7 @@ define Device/Default
-   KERNEL = kernel-bin | lzma | \
- 	fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
-   KERNEL_INITRAMFS = kernel-bin | lzma | \
--	fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
-+	fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd
-   FILESYSTEMS := squashfs
-   DEVICE_DTS_DIR := $(DTS_DIR)
-   IMAGES := sysupgrade.bin
-diff --git a/target/linux/mediatek/image/gen_mt7622_emmc_img.sh b/target/linux/mediatek/image/gen_mt7622_emmc_img.sh
-deleted file mode 100755
-index d74068c7b1..0000000000
---- a/target/linux/mediatek/image/gen_mt7622_emmc_img.sh
-+++ /dev/null
-@@ -1,19 +0,0 @@
--#!/bin/sh
--
--OUTPUT_FILE=$1
--KERNEL_FILE=$2
--RECOVERY_FILE=$3
--ROOTFS_FILE=$4
--
--BS=512
--
--#RECOVERY_OFFSET= kernel size / BS = 20M / 512 (blocks)
--RECOVERY_OFFSET=40960
--
--#ROOTFS_OFFSET = RECOVERY_OFFSET + (RECOVERY_SIZE / BS)
--#	       = 40960 + (10M  / 512) (blocks)
--ROOTFS_OFFSET=61440
--dd bs="$BS" of="$OUTPUT_FILE" if="$KERNEL_FILE"
--dd bs="$BS" of="$OUTPUT_FILE" if="$RECOVERY_FILE" seek="$RECOVERY_OFFSET"
--dd bs="$BS" of="$OUTPUT_FILE" if="$ROOTFS_FILE" seek="$ROOTFS_OFFSET"
--dd if=/dev/zero of="$OUTPUT_FILE" bs=128k count=1 oflag=append conv=notrunc
-diff --git a/target/linux/mediatek/image/mt7622.mk b/target/linux/mediatek/image/mt7622.mk
-index bf706930e4..63eecc2eab 100644
---- a/target/linux/mediatek/image/mt7622.mk
-+++ b/target/linux/mediatek/image/mt7622.mk
-@@ -1,51 +1,162 @@
--KERNEL_LOADADDR := 0x44080000
-+DTS_DIR := $(DTS_DIR)/mediatek
- 
--define Device/bpi_bananapi-r64
--  DEVICE_VENDOR := Bpi
--  DEVICE_MODEL := Banana Pi R64
--  DEVICE_DTS := mt7622-bananapi-bpi-r64
--  DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
--  SUPPORTED_DEVICES := bananapi,bpi-r64
--  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
-+ifdef CONFIG_LINUX_5_4
-+  KERNEL_LOADADDR := 0x44080000
-+else
-+  KERNEL_LOADADDR := 0x44000000
-+endif
-+
-+define Image/Prepare
-+	# For UBI we want only one extra block
-+	rm -f $(KDIR)/ubi_mark
-+	echo -ne '\xde\xad\xc0\xde' > $(KDIR)/ubi_mark
-+endef
-+
-+define Build/buffalo-kernel-trx
-+	$(eval magic=$(word 1,$(1)))
-+	$(eval dummy=$(word 2,$(1)))
-+	$(eval kern_size=$(if $(KERNEL_SIZE),$(KERNEL_SIZE),0x400000))
-+
-+	$(if $(dummy),touch $(dummy))
-+	$(STAGING_DIR_HOST)/bin/otrx create $@.new \
-+		$(if $(magic),-M $(magic),) \
-+		-f $@ \
-+		$(if $(dummy),\
-+			-a 0x20000 \
-+			-b $$(( $(subst k, * 1024,$(kern_size)) )) \
-+			-f $(dummy),)
-+	mv $@.new $@
-+endef
-+
-+define Build/bl2
-+	cat $(STAGING_DIR_IMAGE)/mt7622-$1-bl2.img >> $@
-+endef
-+
-+define Build/bl31-uboot
-+	cat $(STAGING_DIR_IMAGE)/mt7622_$1-u-boot.fip >> $@
-+endef
-+
-+define Build/mt7622-gpt
-+	cp $@ $@.tmp 2>/dev/null || true
-+	ptgen -g -o $@.tmp -a 1 -l 1024 \
-+		$(if $(findstring sdmmc,$1), \
-+			-H \
-+			-t 0x83	-N bl2		-r	-p 512k@512k \
-+		) \
-+			-t 0xef	-N fip		-r	-p 1M@2M \
-+			-t 0x83	-N ubootenv	-r	-p 1M@4M \
-+				-N recovery	-r	-p 32M@6M \
-+		$(if $(findstring sdmmc,$1), \
-+			-t 0x2e -N production		-p 216M@40M \
-+		) \
-+		$(if $(findstring emmc,$1), \
-+			-t 0x2e -N production		-p 980M@40M \
-+		)
-+	cat $@.tmp >> $@
-+	rm $@.tmp
-+endef
-+
-+define Build/trx-nand
-+	# kernel: always use 4 MiB (-28 B or TRX header) to allow upgrades even
-+	#	  if it grows up between releases
-+	# root: UBI with one extra block containing UBI mark to trigger erasing
-+	#	rest of partition
-+	$(STAGING_DIR_HOST)/bin/otrx create $@.new \
-+		-M 0x32504844 \
-+		-f $(IMAGE_KERNEL) -a 0x20000 -b 0x400000 \
-+		-f $@ \
-+		-A $(KDIR)/ubi_mark -a 0x20000
-+	mv $@.new $@
- endef
--TARGET_DEVICES += bpi_bananapi-r64
- 
--define Device/bpi_bananapi-r64-rootdisk
--  DEVICE_VENDOR := Bpi
--  DEVICE_MODEL := Banana Pi R64 (rootdisk)
--  DEVICE_DTS := mt7622-bananapi-bpi-r64-rootdisk
--  DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
--  SUPPORTED_DEVICES := bananapi,bpi-r64
--  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
--  IMAGES := sysupgrade-emmc.bin.gz
--  IMAGE/sysupgrade-emmc.bin.gz := sysupgrade-emmc | gzip | append-metadata
-+define Device/buffalo_wsr-2533dhp2
-+  DEVICE_VENDOR := Buffalo
-+  DEVICE_MODEL := WSR-2533DHP2
-+  DEVICE_DTS := mt7622-buffalo-wsr-2533dhp2
-+  DEVICE_DTS_DIR := ../dts
-+  IMAGE_SIZE := 59392k
-+  KERNEL_SIZE := 4096k
-+  BLOCKSIZE := 128k
-+  PAGESIZE := 2048
-+  SUBPAGESIZE := 512
-+  UBINIZE_OPTS := -E 5
-+  BUFFALO_TAG_PLATFORM := MTK
-+  BUFFALO_TAG_VERSION := 9.99
-+  BUFFALO_TAG_MINOR := 9.99
-+  IMAGES += factory.bin factory-uboot.bin
-+  KERNEL_INITRAMFS := kernel-bin | lzma | \
-+	fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | \
-+	buffalo-kernel-trx
-+  IMAGE/factory.bin := append-ubi | trx-nand | \
-+	buffalo-enc WSR-2533DHP2 $$(BUFFALO_TAG_VERSION) -l | \
-+	buffalo-tag-dhp WSR-2533DHP2 JP JP | buffalo-enc-tag -l | buffalo-dhp-image
-+  IMAGE/factory-uboot.bin := append-ubi | trx-nand
-+  IMAGE/sysupgrade.bin := append-kernel | \
-+	buffalo-kernel-trx 0x32504844 $(KDIR)/tmp/$$(DEVICE_NAME).null | \
-+	sysupgrade-tar kernel=$$$$@ | append-metadata
-+  DEVICE_PACKAGES := swconfig
- endef
--TARGET_DEVICES += bpi_bananapi-r64-rootdisk
-+TARGET_DEVICES += buffalo_wsr-2533dhp2
- 
- define Device/elecom_wrc-2533gent
-   DEVICE_VENDOR := Elecom
-   DEVICE_MODEL := WRC-2533GENT
-   DEVICE_DTS := mt7622-elecom-wrc-2533gent
--  DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
--  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-mt7615e \
--	kmod-mt7615-firmware kmod-btmtkuart swconfig
-+  DEVICE_DTS_DIR := ../dts
-+  DEVICE_PACKAGES := kmod-btmtkuart kmod-usb3 swconfig
- endef
- TARGET_DEVICES += elecom_wrc-2533gent
- 
-+define Device/linksys_e8450
-+  DEVICE_VENDOR := Linksys
-+  DEVICE_MODEL := E8450
-+  DEVICE_ALT0_VENDOR := Belkin
-+  DEVICE_ALT0_MODEL := RT3200
-+  DEVICE_DTS := mt7622-linksys-e8450
-+  DEVICE_DTS_DIR := ../dts
-+  DEVICE_PACKAGES := kmod-mt7915e kmod-usb3
-+endef
-+TARGET_DEVICES += linksys_e8450
-+
-+define Device/linksys_e8450-ubi
-+  DEVICE_VENDOR := Linksys
-+  DEVICE_MODEL := E8450
-+  DEVICE_VARIANT := UBI
-+  DEVICE_ALT0_VENDOR := Belkin
-+  DEVICE_ALT0_MODEL := RT3200
-+  DEVICE_ALT0_VARIANT := UBI
-+  DEVICE_DTS := mt7622-linksys-e8450-ubi
-+  DEVICE_DTS_DIR := ../dts
-+  DEVICE_PACKAGES := kmod-mt7915e kmod-usb3
-+  UBINIZE_OPTS := -E 5
-+  BLOCKSIZE := 128k
-+  PAGESIZE := 2048
-+  UBOOTENV_IN_UBI := 1
-+  KERNEL_IN_UBI := 1
-+  KERNEL := kernel-bin | gzip
-+# recovery can also be used with stock firmware web-ui, hence the padding...
-+  KERNEL_INITRAMFS := kernel-bin | lzma | \
-+	fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 128k
-+  KERNEL_INITRAMFS_SUFFIX := -recovery.itb
-+  IMAGES := sysupgrade.itb
-+  IMAGE/sysupgrade.itb := append-kernel | fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | append-metadata
-+endef
-+TARGET_DEVICES += linksys_e8450-ubi
-+
- define Device/mediatek_mt7622-rfb1
-   DEVICE_VENDOR := MediaTek
-   DEVICE_MODEL := MTK7622 rfb1 AP
-   DEVICE_DTS := mt7622-rfb1
--  DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
--  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
-+  DEVICE_PACKAGES := kmod-ata-ahci-mtk kmod-btmtkuart kmod-usb3
- endef
- TARGET_DEVICES += mediatek_mt7622-rfb1
- 
--define Device/mediatek_mt7622-ubi
-+define Device/mediatek_mt7622-rfb1-ubi
-   DEVICE_VENDOR := MediaTek
--  DEVICE_MODEL := MTK7622 AP (UBI)
-+  DEVICE_MODEL := MTK7622 rfb1 AP (UBI)
-   DEVICE_DTS := mt7622-rfb1-ubi
--  DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
-+  DEVICE_DTS_DIR := ../dts
-+  DEVICE_PACKAGES := kmod-ata-ahci-mtk kmod-btmtkuart kmod-usb3
-   UBINIZE_OPTS := -E 5
-   BLOCKSIZE := 128k
-   PAGESIZE := 2048
-@@ -54,16 +165,16 @@ define Device/mediatek_mt7622-ubi
-   IMAGES += factory.bin
-   IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | \
-                 check-size $$$$(IMAGE_SIZE)
--  IMAGE/sysupgrade.bin := sysupgrade-tar
--  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
-+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
- endef
--TARGET_DEVICES += mediatek_mt7622-ubi
-+TARGET_DEVICES += mediatek_mt7622-rfb1-ubi
- 
- define Device/ubnt_unifi-6-lr
-   DEVICE_VENDOR := Ubiquiti
-   DEVICE_MODEL := UniFi 6 LR
-+  DEVICE_DTS_CONFIG := config@1
-   DEVICE_DTS := mt7622-ubnt-unifi-6-lr
--  DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
-+  DEVICE_DTS_DIR := ../dts
-   DEVICE_PACKAGES := kmod-mt7915e
- endef
- TARGET_DEVICES += ubnt_unifi-6-lr
-diff --git a/target/linux/mediatek/image/mt7623.mk b/target/linux/mediatek/image/mt7623.mk
-index 72758ddbaa..56f67c0e89 100644
---- a/target/linux/mediatek/image/mt7623.mk
-+++ b/target/linux/mediatek/image/mt7623.mk
-@@ -63,6 +63,7 @@ define Device/unielec_u7623-emmc
-   # When we use FIT images, U-Boot will populate the /memory node with the correct
-   # memory size discovered from the preloader, so we don't need separate builds.
-   DEVICE_DTS := mt7623a-unielec-u7623-02-emmc-512m
-+  DEVICE_DTS_DIR := ../dts
-   SUPPORTED_DEVICES := unielec,u7623-02-emmc-512m
-   UBOOT_ENVSIZE := 0x1000
-   UBOOT_OFFSET := 256k
-@@ -83,6 +84,7 @@ define Device/unielec_u7623-02-emmc-512m-legacy
-   DEVICE_MODEL := U7623-02
-   DEVICE_VARIANT := eMMC/512MiB RAM (legacy image)
-   DEVICE_DTS := mt7623a-unielec-u7623-02-emmc-512m
-+  DEVICE_DTS_DIR := ../dts
-   KERNEL_NAME := zImage
-   KERNEL := kernel-bin | append-dtb | uImage none
-   KERNEL_INITRAMFS := kernel-bin | append-dtb | uImage none
-diff --git a/target/linux/mediatek/mt7622/base-files/etc/board.d/01_leds b/target/linux/mediatek/mt7622/base-files/etc/board.d/01_leds
-new file mode 100755
-index 0000000000..65a81df8da
---- /dev/null
-+++ b/target/linux/mediatek/mt7622/base-files/etc/board.d/01_leds
-@@ -0,0 +1,17 @@
-+. /lib/functions/leds.sh
-+. /lib/functions/uci-defaults.sh
-+
-+board=$(board_name)
-+
-+board_config_update
-+
-+case $board in
-+linksys,e8450|\
-+linksys,e8450-ubi)
-+	ucidef_set_led_netdev "wan" "WAN" "inet:blue" "wan"
-+	;;
-+esac
-+
-+board_config_flush
-+
-+exit 0
-diff --git a/target/linux/mediatek/mt7622/base-files/etc/board.d/02_network b/target/linux/mediatek/mt7622/base-files/etc/board.d/02_network
-index 3a409c8ec9..f1daa2fae1 100755
---- a/target/linux/mediatek/mt7622/base-files/etc/board.d/02_network
-+++ b/target/linux/mediatek/mt7622/base-files/etc/board.d/02_network
-@@ -1,4 +1,3 @@
--#!/bin/sh
- 
- . /lib/functions.sh
- . /lib/functions/uci-defaults.sh
-@@ -9,13 +8,16 @@ mediatek_setup_interfaces()
- 	local board="$1"
- 
- 	case $board in
--	bananapi,bpi-r64-rootdisk|\
--	bananapi,bpi-r64)
--		ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3" wan
--		;;
-+	bananapi,bpi-r64|\
-+	linksys,e8450|\
-+	linksys,e8450-ubi|\
- 	mediatek,mt7622-rfb1)
- 		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" wan
- 		;;
-+	buffalo,wsr-2533dhp2)
-+		ucidef_add_switch "switch0" \
-+			"0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "6@eth0"
-+		;;
- 	ubnt,unifi-6-lr)
- 		ucidef_set_interfaces_lan "eth0"
- 		;;
-@@ -26,18 +28,9 @@ mediatek_setup_interfaces()
- 	esac
- }
- 
--mediatek_setup_macs()
--{
--	local board="$1"
--
--	case $board in
--	esac
--}
--
- board_config_update
- board=$(board_name)
- mediatek_setup_interfaces $board
--mediatek_setup_macs $board
- board_config_flush
- 
- exit 0
-diff --git a/target/linux/mediatek/mt7622/base-files/etc/init.d/bootcount b/target/linux/mediatek/mt7622/base-files/etc/init.d/bootcount
-new file mode 100755
-index 0000000000..bc4eeb6530
---- /dev/null
-+++ b/target/linux/mediatek/mt7622/base-files/etc/init.d/bootcount
-@@ -0,0 +1,11 @@
-+#!/bin/sh /etc/rc.common
-+
-+START=99
-+
-+boot() {
-+	case $(board_name) in
-+	linksys,e8450)
-+		mtd erase senv || true
-+		;;
-+	esac
-+}
-diff --git a/target/linux/mediatek/mt7622/base-files/etc/uci-defaults/09_fix_crc b/target/linux/mediatek/mt7622/base-files/etc/uci-defaults/09_fix_crc
-new file mode 100644
-index 0000000000..81cb6b18b7
---- /dev/null
-+++ b/target/linux/mediatek/mt7622/base-files/etc/uci-defaults/09_fix_crc
-@@ -0,0 +1,10 @@
-+. /lib/functions.sh
-+
-+kernel_size=$(sed -n 's/mtd[0-9]*: \([0-9a-f]*\).*"\(kernel\|linux\)".*/\1/p' /proc/mtd)
-+
-+case "$(board_name)" in
-+buffalo,wsr-2533dhp2)
-+	mtd -M 0x44485032 ${kernel_size:+-c 0x$kernel_size} fixtrx firmware && exit 0
-+	exit 1
-+	;;
-+esac
-diff --git a/target/linux/mediatek/mt7622/base-files/lib/preinit/79_move_config b/target/linux/mediatek/mt7622/base-files/lib/preinit/79_move_config
-deleted file mode 100644
-index 8a30b84497..0000000000
---- a/target/linux/mediatek/mt7622/base-files/lib/preinit/79_move_config
-+++ /dev/null
-@@ -1,18 +0,0 @@
--. /lib/upgrade/common.sh
--
--RECOVERY_PART=/dev/mmcblk0p6
--
--move_config() {
--	if [ -b $RECOVERY_PART ]; then
--		insmod nls_cp437
--		insmod nls_iso8859-1
--		insmod fat
--		insmod vfat
--		mkdir -p /recovery
--		mount -o rw,noatime $RECOVERY_PART /recovery
--		[ -f "/recovery/$BACKUP_FILE" ] && mv -f "/recovery/$BACKUP_FILE" /
--		umount /recovery
--	fi
--}
--
--boot_hook_add preinit_mount_root move_config
-diff --git a/target/linux/mediatek/mt7622/base-files/lib/upgrade/buffalo.sh b/target/linux/mediatek/mt7622/base-files/lib/upgrade/buffalo.sh
-new file mode 100644
-index 0000000000..844cc4ed95
---- /dev/null
-+++ b/target/linux/mediatek/mt7622/base-files/lib/upgrade/buffalo.sh
-@@ -0,0 +1,126 @@
-+# ======== dev note ========
-+# for following buffalo MT7622 devices:
-+#
-+# - WSR-2533DHP2 (trx magic: "DHP2")
-+# - WSR-2533DHP3 (trx magic: "DHP3")
-+# - WSR-3200AX4S (trx magic: "DHP3")
-+#
-+# sysupgrade-tar image:
-+#
-+# This is for normal upgrading for OpenWrt.
-+# use nand_do_upgrade with CI_KERNPART="firmware"
-+#
-+# - if the size of new kernel is not equal with the current kernel's
-+#   -> block upgrade and print a message about using TRX + UBI
-+#      formatted image
-+#   (should be flashed the new ubi contains rootfs + rootfs_data
-+#   with the offset (=new padded kernel's end) if this case? But
-+#   it maybe too hard for writing scripts...)
-+#
-+# TRX + UBI formatted image:
-+#
-+# This is for upgrading if the new kernel is larger than the
-+# current kernel.
-+#
-+# ex:
-+#   - stock firmware is installed in the flash and booted with
-+#     OpenWrt initramfs image
-+#   - kernel partition is increased from 4MiB in OpenWrt in the
-+#     future
-+#
-+# packing TRX + UBI formatted image by tar is needed for image validation
-+# with the metadata in the future?
-+# ====== dev note end ======
-+#
-+# The mtd partitions "firmware" and "Kernel2" on NAND flash are os-image
-+# partitions. These partitions are called as "Image1/Image2" in U-Boot
-+# on WSR-2533DHP2, and they are checked conditions when booting.
-+# "Image1" is always used for booting.
-+#
-+# == U-Boot Behaviors ==
-+# - "Image1"/"Image2" images are good, images are different or
-+#   "Image2" image is broken
-+#   -> writes os-image to "Image2" from "Image1"
-+#
-+# - "Image1" image is broken
-+#   -> writes os-image to "Image1" from "Image2"
-+#
-+# - "Image1"/"Image2" images are broken
-+#   -> fall to U-Boot command line
-+
-+buffalo_check_image() {
-+	local board="$1"
-+	local boardname="$(echo $board | tr ',' '_')"
-+	local magic="$2"
-+	local fw_image="$3"
-+
-+	# return error state if TRX + UBI formatted image specified
-+	# to notify about configurations
-+	if [ "$magic" = "44485032" -o "$magic" = "44485033" ]; then
-+		echo "Your configurations won't be saved if factory-uboot.bin image specified."
-+		echo "But if you want to upgrade, please execute sysupgrade with \"-F\" option."
-+		return 1
-+	fi
-+
-+	# check if valid tar file specifed
-+	if ! tar tf "$fw_image" &>/dev/null; then
-+		echo "Specified file is not a tar archive: $fw_image"
-+		return 1
-+	fi
-+
-+	local control_len=$( (tar xf $fw_image sysupgrade-$boardname/CONTROL -O | wc -c) 2> /dev/null)
-+
-+	# check if valid sysupgrade tar archive
-+	if [ "$control_len" = "0" ]; then
-+		echo "Invalid sysupgrade file: $fw_image"
-+		return 1
-+	fi
-+
-+	local kern_part_len=$(grep "\"linux\"" /proc/mtd | sed "s/mtd[0-9]*:[ \t]*\([^ \t]*\).*/\1/")
-+	[ -z "$kern_part_len" ] && {
-+		echo "Unable to get \"linux\" partition size"
-+		return 1
-+	}
-+	kern_part_len=$((0x$kern_part_len))
-+
-+	# this also checks if the sysupgrade image is for correct models
-+	local kern_bin_len=$( (tar xf $fw_image sysupgrade-${boardname}/kernel -O | wc -c) 2> /dev/null)
-+	if [ -z "$kern_bin_len" ]; then
-+		echo "Failed to get new kernel size, is valid sysupgrade image specified for the device?"
-+		return 1
-+	fi
-+
-+	# kernel binary has a trx header (len: 28 (0x1c))
-+	kern_bin_len=$((kern_bin_len - 28))
-+
-+	if [ "$kern_bin_len" != "$kern_part_len" ]; then
-+		echo -n "The length of new kernel is invalid for current "
-+		echo "\"linux\" partition, please use factory-uboot.bin image."
-+		echo "\"linux\" partition: $kern_part_len, new kernel: $kern_bin_len"
-+		return 1
-+	fi
-+}
-+
-+# for TRX + UBI formatted image
-+buffalo_upgrade_ubinized() {
-+	sync
-+	echo 3 > /proc/sys/vm/drop_caches
-+
-+	local mtdnum="$( find_mtd_index "ubi" )"
-+	# if no "ubi", don't return error for the purpose of recovery
-+	# ex: recovery after accidental erasing "firmware" partition
-+	if [ ! "$mtdnum" ]; then
-+		echo "cannot find ubi mtd partition \"ubi\", skip detachment"
-+	else
-+		ubidetach -m "$mtdnum"
-+	fi
-+
-+	# erase all data in "firmware"
-+	mtd erase "${PART_NAME}"
-+	# write TRX + UBI formatted image to "firmware"
-+	get_image "$1" | mtd $MTD_ARGS write - "${PART_NAME:-firmware}"
-+	if [ $? -ne 0 ]; then
-+		echo "Failed to write the specified image."
-+		exit 1
-+	fi
-+}
-diff --git a/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
-index 8144476943..2c1460650f 100755
---- a/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
-+++ b/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
-@@ -1,15 +1,51 @@
-+REQUIRE_IMAGE_METADATA=1
-+RAMFS_COPY_BIN='fw_printenv fw_setenv blockdev'
-+RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'
-+
- platform_do_upgrade() {
- 	local board=$(board_name)
-+	local file_type=$(identify $1)
- 
- 	case "$board" in
--	bananapi,bpi-r64-rootdisk)
--		#2097152=0x200000 is the offset in bytes from the start
--		#of eMMC and to the location of the kernel
--		get_image "$1" | dd of=/dev/mmcblk0 bs=2097152 seek=1 conv=fsync
-+	bananapi,bpi-r64)
-+		export_bootdevice
-+		export_partdevice rootdev 0
-+		local fitpart=$(get_partition_by_name $rootdev "production")
-+		[ "$fitpart" ] || return 1
-+		dd if=/dev/zero of=/dev/$fitpart bs=4096 count=1 2>/dev/null
-+		blockdev --rereadpt /dev/$rootdev
-+		get_image "$1" | dd of=/dev/$fitpart
-+		blockdev --rereadpt /dev/$rootdev
-+		local datapart=$(get_partition_by_name $rootdev "rootfs_data")
-+		[ "$datapart" ] || return 0
-+		dd if=/dev/zero of=/dev/$datapart bs=4096 count=1 2>/dev/null
-+		echo $datapart > /tmp/sysupgrade.datapart
-+		;;
-+	buffalo,wsr-2533dhp2)
-+		local magic="$(get_magic_long "$1")"
-+
-+		# use "mtd write" if the magic is "DHP2 (0x44485032)"
-+		# or "DHP3 (0x44485033)"
-+		if [ "$magic" = "44485032" -o "$magic" = "44485033" ]; then
-+			buffalo_upgrade_ubinized "$1"
-+		else
-+			CI_KERNPART="firmware"
-+			nand_do_upgrade "$1"
-+		fi
- 		;;
-+	linksys,e8450-ubi|\
- 	mediatek,mt7622,ubi)
-+		CI_KERNPART="fit"
- 		nand_do_upgrade "$1"
- 		;;
-+	linksys,e8450)
-+		if grep -q mtdparts=slave /proc/cmdline; then
-+			PART_NAME=firmware2
-+		else
-+			PART_NAME=firmware1
-+		fi
-+		default_do_upgrade "$1"
-+		;;
- 	*)
- 		default_do_upgrade "$1"
- 		;;
-@@ -25,6 +61,9 @@ platform_check_image() {
- 	[ "$#" -gt 1 ] && return 1
- 
- 	case "$board" in
-+	buffalo,wsr-2533dhp2)
-+		buffalo_check_image "$board" "$magic" "$1" || return 1
-+		;;
- 	*)
- 		[ "$magic" != "d00dfeed" ] && {
- 			echo "Invalid image type."
-@@ -37,18 +76,18 @@ platform_check_image() {
- 	return 0
- }
- 
--platform_copy_config_emmc() {
--	mkdir -p /recovery
--	mount -o rw,noatime /dev/mmcblk0p6 /recovery
--	cp -af "$UPGRADE_BACKUP" "/recovery/$BACKUP_FILE"
-+platform_copy_config_mmc() {
-+	[ -e "$UPGRADE_BACKUP" ] || return
-+	local datapart=$(cat /tmp/sysupgrade.datapart)
-+	[ "$datapart" ] || echo "no rootfs_data partition, cannot keep configuration." >&2
-+	dd if="$UPGRADE_BACKUP" of=/dev/$datapart
- 	sync
--	umount /recovery
- }
- 
- platform_copy_config() {
- 	case "$(board_name)" in
--	bananapi,bpi-r64-rootdisk)
--		platform_copy_config_emmc
-+	bananapi,bpi-r64)
-+		platform_copy_config_mmc
- 		;;
- 	esac
- }
-diff --git a/target/linux/mediatek/mt7622/config-5.4 b/target/linux/mediatek/mt7622/config-5.10
-similarity index 67%
-rename from target/linux/mediatek/mt7622/config-5.4
-rename to target/linux/mediatek/mt7622/config-5.10
-index 282cd0bab5..e6696bd50a 100644
---- a/target/linux/mediatek/mt7622/config-5.4
-+++ b/target/linux/mediatek/mt7622/config-5.10
-@@ -1,59 +1,6 @@
- CONFIG_64BIT=y
- CONFIG_AHCI_MTK=y
--CONFIG_ARCH_CLOCKSOURCE_DATA=y
- CONFIG_ARCH_DMA_ADDR_T_64BIT=y
--CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
--CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y
--CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
--CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
--CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y
--CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
--CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
--CONFIG_ARCH_HAS_FAST_MULTIPLIER=y
--CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
--CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
--CONFIG_ARCH_HAS_GIGANTIC_PAGE=y
--CONFIG_ARCH_HAS_KCOV=y
--CONFIG_ARCH_HAS_KEEPINITRD=y
--CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
--CONFIG_ARCH_HAS_PTE_DEVMAP=y
--CONFIG_ARCH_HAS_PTE_SPECIAL=y
--CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
--CONFIG_ARCH_HAS_SET_DIRECT_MAP=y
--CONFIG_ARCH_HAS_SET_MEMORY=y
--CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
--CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
--CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
--CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
--CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y
--CONFIG_ARCH_HAS_TICK_BROADCAST=y
--CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
--CONFIG_ARCH_INLINE_READ_LOCK=y
--CONFIG_ARCH_INLINE_READ_LOCK_BH=y
--CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y
--CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y
--CONFIG_ARCH_INLINE_READ_UNLOCK=y
--CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y
--CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y
--CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y
--CONFIG_ARCH_INLINE_SPIN_LOCK=y
--CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y
--CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y
--CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y
--CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y
--CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y
--CONFIG_ARCH_INLINE_SPIN_UNLOCK=y
--CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y
--CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y
--CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y
--CONFIG_ARCH_INLINE_WRITE_LOCK=y
--CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y
--CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y
--CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y
--CONFIG_ARCH_INLINE_WRITE_UNLOCK=y
--CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y
--CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y
--CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y
- CONFIG_ARCH_KEEP_MEMBLOCK=y
- CONFIG_ARCH_MEDIATEK=y
- CONFIG_ARCH_MMAP_RND_BITS=18
-@@ -65,25 +12,11 @@ CONFIG_ARCH_PROC_KCORE_TEXT=y
- CONFIG_ARCH_SELECT_MEMORY_MODEL=y
- CONFIG_ARCH_SPARSEMEM_DEFAULT=y
- CONFIG_ARCH_SPARSEMEM_ENABLE=y
--CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
--CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
--CONFIG_ARCH_SUPPORTS_INT128=y
--CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
--CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
--CONFIG_ARCH_SUPPORTS_UPROBES=y
-+CONFIG_ARCH_STACKWALK=y
- CONFIG_ARCH_SUSPEND_POSSIBLE=y
--CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
--CONFIG_ARCH_USE_MEMREMAP_PROT=y
--CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
--CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
--CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
--CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
--CONFIG_ARCH_WANT_FRAME_POINTERS=y
--CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
- CONFIG_ARM64=y
- CONFIG_ARM64_4K_PAGES=y
- # CONFIG_ARM64_CNP is not set
--CONFIG_ARM64_CONT_SHIFT=4
- # CONFIG_ARM64_ERRATUM_1165522 is not set
- # CONFIG_ARM64_ERRATUM_1286807 is not set
- # CONFIG_ARM64_ERRATUM_1418040 is not set
-@@ -94,7 +27,6 @@ CONFIG_ARM64_PAGE_SHIFT=12
- CONFIG_ARM64_PA_BITS=48
- CONFIG_ARM64_PA_BITS_48=y
- # CONFIG_ARM64_PTR_AUTH is not set
--CONFIG_ARM64_SSBD=y
- # CONFIG_ARM64_SVE is not set
- # CONFIG_ARM64_SW_TTBR0_PAN is not set
- CONFIG_ARM64_TAGGED_ADDR_ABI=y
-@@ -114,6 +46,7 @@ CONFIG_ARM_PMU=y
- CONFIG_ARM_PSCI_FW=y
- CONFIG_ATA=y
- CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
-+CONFIG_BLK_DEV_LOOP=y
- CONFIG_BLK_DEV_SD=y
- CONFIG_BLK_MQ_PCI=y
- CONFIG_BLK_PM=y
-@@ -122,10 +55,8 @@ CONFIG_BLOCK_COMPAT=y
- CONFIG_BSD_PROCESS_ACCT=y
- CONFIG_BSD_PROCESS_ACCT_V3=y
- # CONFIG_CAVIUM_TX2_ERRATUM_219 is not set
--CONFIG_CC_HAS_KASAN_GENERIC=y
- CONFIG_CLKDEV_LOOKUP=y
- CONFIG_CLKSRC_MMIO=y
--CONFIG_CLOCK_THERMAL=y
- CONFIG_CLONE_BACKWARDS=y
- CONFIG_COMMON_CLK=y
- CONFIG_COMMON_CLK_MEDIATEK=y
-@@ -184,6 +115,8 @@ CONFIG_CRYPTO_ACOMP2=y
- CONFIG_CRYPTO_AEAD=y
- CONFIG_CRYPTO_AEAD2=y
- CONFIG_CRYPTO_CMAC=y
-+CONFIG_CRYPTO_CRC32=y
-+CONFIG_CRYPTO_CRC32C=y
- CONFIG_CRYPTO_DEFLATE=y
- CONFIG_CRYPTO_DRBG=y
- CONFIG_CRYPTO_DRBG_HMAC=y
-@@ -207,6 +140,7 @@ CONFIG_CRYPTO_RNG=y
- CONFIG_CRYPTO_RNG2=y
- CONFIG_CRYPTO_RNG_DEFAULT=y
- CONFIG_CRYPTO_SHA256=y
-+CONFIG_CRYPTO_ZSTD=y
- CONFIG_DCACHE_WORD_ACCESS=y
- CONFIG_DEBUG_MISC=y
- CONFIG_DEVTMPFS=y
-@@ -220,19 +154,19 @@ CONFIG_DMA_ENGINE_RAID=y
- CONFIG_DMA_OF=y
- CONFIG_DMA_REMAP=y
- CONFIG_DMA_VIRTUAL_CHANNELS=y
--CONFIG_DRM_RCAR_WRITEBACK=y
- CONFIG_DTC=y
- CONFIG_DYNAMIC_DEBUG=y
- CONFIG_EDAC_SUPPORT=y
--CONFIG_EFI_EARLYCON=y
- CONFIG_EINT_MTK=y
-+CONFIG_EXT4_FS=y
-+CONFIG_F2FS_FS=y
-+CONFIG_FIT_PARTITION=y
- CONFIG_FIXED_PHY=y
- CONFIG_FIX_EARLYCON_MEM=y
- # CONFIG_FLATMEM_MANUAL is not set
--CONFIG_FONT_8x16=y
--CONFIG_FONT_AUTOSELECT=y
--CONFIG_FONT_SUPPORT=y
- CONFIG_FRAME_POINTER=y
-+CONFIG_FS_IOMAP=y
-+CONFIG_FS_MBCACHE=y
- # CONFIG_FUJITSU_ERRATUM_010001 is not set
- CONFIG_FW_LOADER_PAGED_BUF=y
- CONFIG_GENERIC_ALLOCATOR=y
-@@ -267,103 +201,20 @@ CONFIG_GLOB=y
- CONFIG_GPIOLIB=y
- CONFIG_GRO_CELLS=y
- CONFIG_HANDLE_DOMAIN_IRQ=y
--# CONFIG_HARDEN_BRANCH_PREDICTOR is not set
--# CONFIG_HARDEN_EL2_VECTORS is not set
- CONFIG_HARDIRQS_SW_RESEND=y
- CONFIG_HAS_DMA=y
- CONFIG_HAS_IOMEM=y
- CONFIG_HAS_IOPORT_MAP=y
--CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y
--CONFIG_HAVE_ARCH_AUDITSYSCALL=y
--CONFIG_HAVE_ARCH_BITREVERSE=y
--CONFIG_HAVE_ARCH_HUGE_VMAP=y
--CONFIG_HAVE_ARCH_JUMP_LABEL=y
--CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y
--CONFIG_HAVE_ARCH_KASAN=y
--CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y
--CONFIG_HAVE_ARCH_KGDB=y
--CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y
--CONFIG_HAVE_ARCH_PFN_VALID=y
--CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y
--CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
--CONFIG_HAVE_ARCH_STACKLEAK=y
--CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
--CONFIG_HAVE_ARCH_TRACEHOOK=y
--CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
--CONFIG_HAVE_ARCH_VMAP_STACK=y
--CONFIG_HAVE_ARM_SMCCC=y
--CONFIG_HAVE_ASM_MODVERSIONS=y
--CONFIG_HAVE_CLK=y
--CONFIG_HAVE_CLK_PREPARE=y
--CONFIG_HAVE_CMPXCHG_DOUBLE=y
--CONFIG_HAVE_CMPXCHG_LOCAL=y
--CONFIG_HAVE_CONTEXT_TRACKING=y
--CONFIG_HAVE_COPY_THREAD_TLS=y
--CONFIG_HAVE_C_RECORDMCOUNT=y
--CONFIG_HAVE_DEBUG_BUGVERBOSE=y
--CONFIG_HAVE_DEBUG_KMEMLEAK=y
--CONFIG_HAVE_DMA_CONTIGUOUS=y
--CONFIG_HAVE_DYNAMIC_FTRACE=y
--CONFIG_HAVE_EBPF_JIT=y
--CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
--CONFIG_HAVE_FAST_GUP=y
--CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
--CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y
--CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y
--CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
--CONFIG_HAVE_FUNCTION_TRACER=y
--CONFIG_HAVE_GENERIC_VDSO=y
--CONFIG_HAVE_HW_BREAKPOINT=y
--CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
--CONFIG_HAVE_MEMORY_PRESENT=y
--CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
--CONFIG_HAVE_NET_DSA=y
--CONFIG_HAVE_PATA_PLATFORM=y
--CONFIG_HAVE_PCI=y
--CONFIG_HAVE_PERF_EVENTS=y
--CONFIG_HAVE_PERF_REGS=y
--CONFIG_HAVE_PERF_USER_STACK_DUMP=y
--CONFIG_HAVE_RCU_TABLE_FREE=y
--CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
--CONFIG_HAVE_RSEQ=y
--CONFIG_HAVE_SCHED_AVG_IRQ=y
--CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
--CONFIG_HAVE_UID16=y
--CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
- CONFIG_HOLES_IN_ZONE=y
- # CONFIG_HW_RANDOM_MTK is not set
- CONFIG_HZ=250
- CONFIG_HZ_250=y
--CONFIG_I2C=y
--CONFIG_I2C_BOARDINFO=y
--CONFIG_I2C_CHARDEV=y
--CONFIG_I2C_MT65XX=y
- CONFIG_ICPLUS_PHY=y
- CONFIG_IIO=y
- CONFIG_IKCONFIG=y
- CONFIG_IKCONFIG_PROC=y
- CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
- CONFIG_INITRAMFS_SOURCE=""
--CONFIG_INLINE_READ_LOCK=y
--CONFIG_INLINE_READ_LOCK_BH=y
--CONFIG_INLINE_READ_LOCK_IRQ=y
--CONFIG_INLINE_READ_LOCK_IRQSAVE=y
--CONFIG_INLINE_READ_UNLOCK_BH=y
--CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y
--CONFIG_INLINE_SPIN_LOCK=y
--CONFIG_INLINE_SPIN_LOCK_BH=y
--CONFIG_INLINE_SPIN_LOCK_IRQ=y
--CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y
--CONFIG_INLINE_SPIN_TRYLOCK=y
--CONFIG_INLINE_SPIN_TRYLOCK_BH=y
--CONFIG_INLINE_SPIN_UNLOCK_BH=y
--CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y
--CONFIG_INLINE_WRITE_LOCK=y
--CONFIG_INLINE_WRITE_LOCK_BH=y
--CONFIG_INLINE_WRITE_LOCK_IRQ=y
--CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y
--CONFIG_INLINE_WRITE_UNLOCK_BH=y
--CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y
- CONFIG_IO_URING=y
- CONFIG_IRQCHIP=y
- CONFIG_IRQ_DOMAIN=y
-@@ -371,9 +222,10 @@ CONFIG_IRQ_DOMAIN_HIERARCHY=y
- CONFIG_IRQ_FORCED_THREADING=y
- CONFIG_IRQ_TIME_ACCOUNTING=y
- CONFIG_IRQ_WORK=y
-+CONFIG_JBD2=y
- CONFIG_JUMP_LABEL=y
--CONFIG_LEDS_UBNT_LEDBAR=y
- CONFIG_LIBFDT=y
-+CONFIG_LLD_VERSION=0
- CONFIG_LOCK_DEBUGGING_SUPPORT=y
- CONFIG_LOCK_SPIN_ON_OWNER=y
- CONFIG_LZO_COMPRESS=y
-@@ -381,21 +233,25 @@ CONFIG_LZO_DECOMPRESS=y
- CONFIG_MAGIC_SYSRQ=y
- CONFIG_MDIO_BUS=y
- CONFIG_MDIO_DEVICE=y
-+CONFIG_MDIO_DEVRES=y
- CONFIG_MEDIATEK_MT6577_AUXADC=y
- CONFIG_MEDIATEK_WATCHDOG=y
--CONFIG_MEDIA_SUPPORT=y
- CONFIG_MEMFD_CREATE=y
- CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7
- CONFIG_MFD_SYSCON=y
- CONFIG_MIGRATION=y
- CONFIG_MMC=y
-+CONFIG_MMC_BLOCK=y
-+CONFIG_MMC_CQHCI=y
- CONFIG_MMC_MTK=y
- CONFIG_MODULES_TREE_LOOKUP=y
- CONFIG_MODULES_USE_ELF_RELA=y
--CONFIG_MT753X_GSW=y
- CONFIG_MTD_NAND_CORE=y
-+CONFIG_MTD_NAND_ECC=y
- CONFIG_MTD_NAND_ECC_SW_HAMMING=y
- CONFIG_MTD_NAND_MTK=y
-+CONFIG_MTD_NAND_MTK_BMT=y
-+CONFIG_MTD_PARSER_TRX=y
- CONFIG_MTD_RAW_NAND=y
- CONFIG_MTD_SPI_NAND=y
- CONFIG_MTD_SPI_NOR=y
-@@ -423,7 +279,6 @@ CONFIG_NET_DSA=y
- CONFIG_NET_DSA_MT7530=y
- CONFIG_NET_DSA_TAG_MTK=y
- CONFIG_NET_FLOW_LIMIT=y
--CONFIG_NET_MEDIATEK_OFFLOAD=y
- CONFIG_NET_MEDIATEK_SOC=y
- CONFIG_NET_SWITCHDEV=y
- CONFIG_NET_VENDOR_MEDIATEK=y
-@@ -448,7 +303,6 @@ CONFIG_PARTITION_PERCPU=y
- CONFIG_PCI=y
- CONFIG_PCIEAER=y
- CONFIG_PCIEASPM=y
--# CONFIG_PCIEASPM_DEBUG is not set
- # CONFIG_PCIEASPM_DEFAULT is not set
- CONFIG_PCIEASPM_PERFORMANCE=y
- # CONFIG_PCIEASPM_POWERSAVE is not set
-@@ -461,6 +315,7 @@ CONFIG_PCI_DOMAINS=y
- CONFIG_PCI_DOMAINS_GENERIC=y
- CONFIG_PCI_MSI=y
- CONFIG_PCI_MSI_IRQ_DOMAIN=y
-+CONFIG_PERF_EVENTS=y
- CONFIG_PGTABLE_LEVELS=3
- CONFIG_PHYLIB=y
- CONFIG_PHYLINK=y
-@@ -478,7 +333,7 @@ CONFIG_PINCTRL_MT7622=y
- CONFIG_PINCTRL_MT8516=y
- CONFIG_PINCTRL_MTK=y
- CONFIG_PINCTRL_MTK_MOORE=y
--CONFIG_PLUGIN_HOSTCC="g++"
-+CONFIG_PINCTRL_MTK_V2=y
- CONFIG_PM=y
- CONFIG_PM_CLK=y
- CONFIG_PM_GENERIC_DOMAINS=y
-@@ -488,6 +343,20 @@ CONFIG_POWER_RESET=y
- CONFIG_POWER_RESET_SYSCON=y
- CONFIG_POWER_SUPPLY=y
- CONFIG_PRINTK_TIME=y
-+CONFIG_PSTORE=y
-+# CONFIG_PSTORE_842_COMPRESS is not set
-+# CONFIG_PSTORE_BLK is not set
-+CONFIG_PSTORE_COMPRESS=y
-+CONFIG_PSTORE_COMPRESS_DEFAULT="deflate"
-+CONFIG_PSTORE_CONSOLE=y
-+CONFIG_PSTORE_DEFLATE_COMPRESS=y
-+CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y
-+# CONFIG_PSTORE_LZ4HC_COMPRESS is not set
-+# CONFIG_PSTORE_LZ4_COMPRESS is not set
-+# CONFIG_PSTORE_LZO_COMPRESS is not set
-+CONFIG_PSTORE_PMSG=y
-+CONFIG_PSTORE_RAM=y
-+# CONFIG_PSTORE_ZSTD_COMPRESS is not set
- CONFIG_PWM=y
- CONFIG_PWM_MEDIATEK=y
- # CONFIG_PWM_MTK_DISP is not set
-@@ -500,7 +369,9 @@ CONFIG_RATIONAL=y
- CONFIG_RCU_NEED_SEGCBLIST=y
- CONFIG_RCU_STALL_COMMON=y
- CONFIG_REALTEK_PHY=y
--CONFIG_REFCOUNT_FULL=y
-+CONFIG_REED_SOLOMON=y
-+CONFIG_REED_SOLOMON_DEC8=y
-+CONFIG_REED_SOLOMON_ENC8=y
- CONFIG_REGMAP=y
- CONFIG_REGMAP_MMIO=y
- CONFIG_REGULATOR=y
-@@ -555,7 +426,6 @@ CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
- CONFIG_THERMAL_EMULATION=y
- CONFIG_THERMAL_GOV_BANG_BANG=y
- CONFIG_THERMAL_GOV_FAIR_SHARE=y
--CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
- CONFIG_THERMAL_GOV_STEP_WISE=y
- CONFIG_THERMAL_GOV_USER_SPACE=y
- CONFIG_THERMAL_OF=y
-@@ -587,6 +457,9 @@ CONFIG_WATCHDOG_PRETIMEOUT_GOV_PANIC=y
- CONFIG_WATCHDOG_PRETIMEOUT_GOV_SEL=m
- CONFIG_WATCHDOG_SYSFS=y
- CONFIG_XPS=y
-+CONFIG_XXHASH=y
- CONFIG_ZLIB_DEFLATE=y
- CONFIG_ZLIB_INFLATE=y
- CONFIG_ZONE_DMA32=y
-+CONFIG_ZSTD_COMPRESS=y
-+CONFIG_ZSTD_DECOMPRESS=y
-diff --git a/target/linux/mediatek/mt7622/target.mk b/target/linux/mediatek/mt7622/target.mk
-index cb5a6b48cd..f43a6c4bf4 100644
---- a/target/linux/mediatek/mt7622/target.mk
-+++ b/target/linux/mediatek/mt7622/target.mk
-@@ -2,8 +2,9 @@ ARCH:=aarch64
- SUBTARGET:=mt7622
- BOARDNAME:=MT7622
- CPU_TYPE:=cortex-a53
--DEFAULT_PACKAGES += kmod-mt7615e kmod-mt7615-firmware wpad-basic-wolfssl
-+DEFAULT_PACKAGES += kmod-mt7615e kmod-mt7615-firmware wpad-basic-wolfssl blockdev uboot-envtools
- KERNELNAME:=Image dtbs
-+KERNEL_PATCHVER:=5.10
- 
- define Target/Description
- 	Build firmware images for MediaTek MT7622 ARM based boards.
-diff --git a/target/linux/mediatek/mt7623/base-files/etc/board.d/02_network b/target/linux/mediatek/mt7623/base-files/etc/board.d/02_network
-old mode 100755
-new mode 100644
-index 391b1ddc07..2006248530
---- a/target/linux/mediatek/mt7623/base-files/etc/board.d/02_network
-+++ b/target/linux/mediatek/mt7623/base-files/etc/board.d/02_network
-@@ -1,4 +1,3 @@
--#!/bin/sh
- 
- . /lib/functions.sh
- . /lib/functions/uci-defaults.sh
-diff --git a/target/linux/mediatek/mt7623/config-5.4 b/target/linux/mediatek/mt7623/config-5.4
-index d079c78578..45ae7a4261 100644
---- a/target/linux/mediatek/mt7623/config-5.4
-+++ b/target/linux/mediatek/mt7623/config-5.4
-@@ -331,6 +331,7 @@ CONFIG_MODULES_USE_ELF_REL=y
- # CONFIG_MT753X_GSW is not set
- CONFIG_MTD_BLOCK2MTD=y
- CONFIG_MTD_CMDLINE_PARTS=y
-+# CONFIG_MTD_NAND_MTK_BMT is not set
- CONFIG_MTD_SPI_NOR=y
- CONFIG_MTD_SPLIT_FIRMWARE=y
- CONFIG_MTD_SPLIT_UIMAGE_FW=y
-diff --git a/target/linux/mediatek/mt7629/base-files/etc/board.d/02_network b/target/linux/mediatek/mt7629/base-files/etc/board.d/02_network
-old mode 100755
-new mode 100644
-index 24c66de788..c39417abbc
---- a/target/linux/mediatek/mt7629/base-files/etc/board.d/02_network
-+++ b/target/linux/mediatek/mt7629/base-files/etc/board.d/02_network
-@@ -1,4 +1,3 @@
--#!/bin/sh
- 
- . /lib/functions.sh
- . /lib/functions/uci-defaults.sh
-diff --git a/target/linux/mediatek/mt7629/config-5.4 b/target/linux/mediatek/mt7629/config-5.4
-index 46eac73240..1c7d54cd37 100644
---- a/target/linux/mediatek/mt7629/config-5.4
-+++ b/target/linux/mediatek/mt7629/config-5.4
-@@ -239,6 +239,7 @@ CONFIG_MT753X_GSW=y
- CONFIG_MTD_NAND_CORE=y
- CONFIG_MTD_NAND_ECC_SW_HAMMING=y
- CONFIG_MTD_NAND_MTK=y
-+# CONFIG_MTD_NAND_MTK_BMT is not set
- CONFIG_MTD_RAW_NAND=y
- CONFIG_MTD_SPI_NAND=y
- CONFIG_MTD_SPI_NOR=y
-diff --git a/target/linux/mediatek/patches-5.10/100-dts-update-mt7622-rfb1.patch b/target/linux/mediatek/patches-5.10/100-dts-update-mt7622-rfb1.patch
-new file mode 100644
-index 0000000000..f4e77cf69c
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/100-dts-update-mt7622-rfb1.patch
-@@ -0,0 +1,119 @@
-+--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
-++++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
-+@@ -1,7 +1,6 @@
-+ /*
-+- * Copyright (c) 2017 MediaTek Inc.
-+- * Author: Ming Huang <ming.huang@mediatek.com>
-+- *	   Sean Wang <sean.wang@mediatek.com>
-++ * Copyright (c) 2018 MediaTek Inc.
-++ * Author: Ryder Lee <ryder.lee@mediatek.com>
-+  *
-+  * SPDX-License-Identifier: (GPL-2.0 OR MIT)
-+  */
-+@@ -23,7 +22,7 @@
-+ 
-+ 	chosen {
-+ 		stdout-path = "serial0:115200n8";
-+-		bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512";
-++		bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
-+ 	};
-+ 
-+ 	cpus {
-+@@ -40,23 +39,22 @@
-+ 
-+ 	gpio-keys {
-+ 		compatible = "gpio-keys";
-+-		poll-interval = <100>;
-+ 
-+ 		factory {
-+ 			label = "factory";
-+ 			linux,code = <BTN_0>;
-+-			gpios = <&pio 0 0>;
-++			gpios = <&pio 0 GPIO_ACTIVE_LOW>;
-+ 		};
-+ 
-+ 		wps {
-+ 			label = "wps";
-+ 			linux,code = <KEY_WPS_BUTTON>;
-+-			gpios = <&pio 102 0>;
-++			gpios = <&pio 102 GPIO_ACTIVE_LOW>;
-+ 		};
-+ 	};
-+ 
-+ 	memory {
-+-		reg = <0 0x40000000 0 0x20000000>;
-++		reg = <0 0x40000000 0 0x40000000>;
-+ 	};
-+ 
-+ 	reg_1p8v: regulator-1p8v {
-+@@ -132,22 +130,22 @@
-+ 
-+ 				port@0 {
-+ 					reg = <0>;
-+-					label = "lan0";
-++					label = "lan1";
-+ 				};
-+ 
-+ 				port@1 {
-+ 					reg = <1>;
-+-					label = "lan1";
-++					label = "lan2";
-+ 				};
-+ 
-+ 				port@2 {
-+ 					reg = <2>;
-+-					label = "lan2";
-++					label = "lan3";
-+ 				};
-+ 
-+ 				port@3 {
-+ 					reg = <3>;
-+-					label = "lan3";
-++					label = "lan4";
-+ 				};
-+ 
-+ 				port@4 {
-+@@ -236,15 +234,28 @@
-+ 
-+ &pcie {
-+ 	pinctrl-names = "default";
-+-	pinctrl-0 = <&pcie0_pins>;
-++	pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>;
-+ 	status = "okay";
-+ 
-+ 	pcie@0,0 {
-+ 		status = "okay";
-+ 	};
-++
-++	pcie@1,0 {
-++		status = "okay";
-++	};
-+ };
-+ 
-+ &pio {
-++	/* Attention: GPIO 90 is used to switch between PCIe@1,0 and
-++	 * SATA functions. i.e. output-high: PCIe, output-low: SATA
-++	 */
-++	asm_sel {
-++		gpio-hog;
-++		gpios = <90 GPIO_ACTIVE_HIGH>;
-++		output-high;
-++	};
-++
-+ 	/* eMMC is shared pin with parallel NAND */
-+ 	emmc_pins_default: emmc-pins-default {
-+ 		mux {
-+@@ -511,11 +522,11 @@
-+ };
-+ 
-+ &sata {
-+-	status = "okay";
-++	status = "disabled";
-+ };
-+ 
-+ &sata_phy {
-+-	status = "okay";
-++	status = "disabled";
-+ };
-+ 
-+ &spi0 {
-diff --git a/target/linux/mediatek/patches-5.10/101-dts-update-mt7629-rfb.patch b/target/linux/mediatek/patches-5.10/101-dts-update-mt7629-rfb.patch
-new file mode 100644
-index 0000000000..8d3e283315
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/101-dts-update-mt7629-rfb.patch
-@@ -0,0 +1,37 @@
-+--- a/arch/arm/boot/dts/mt7629-rfb.dts
-++++ b/arch/arm/boot/dts/mt7629-rfb.dts
-+@@ -18,6 +18,7 @@
-+ 
-+ 	chosen {
-+ 		stdout-path = "serial0:115200n8";
-++		bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8";
-+ 	};
-+ 
-+ 	gpio-keys {
-+@@ -69,6 +70,7 @@
-+ 	gmac0: mac@0 {
-+ 		compatible = "mediatek,eth-mac";
-+ 		reg = <0>;
-++		mtd-mac-address = <&factory 0x2a>;
-+ 		phy-mode = "2500base-x";
-+ 		fixed-link {
-+ 			speed = <2500>;
-+@@ -80,6 +82,7 @@
-+ 	gmac1: mac@1 {
-+ 		compatible = "mediatek,eth-mac";
-+ 		reg = <1>;
-++		mtd-mac-address = <&factory 0x24>;
-+ 		phy-mode = "gmii";
-+ 		phy-handle = <&phy0>;
-+ 	};
-+@@ -133,8 +136,9 @@
-+ 			};
-+ 
-+ 			partition@b0000 {
-+-				label = "kernel";
-++				label = "firmware";
-+ 				reg = <0xb0000 0xb50000>;
-++				compatible = "denx,fit";
-+ 			};
-+ 		};
-+ 	};
-diff --git a/target/linux/mediatek/patches-5.10/105-dts-mt7622-enable-pstore.patch b/target/linux/mediatek/patches-5.10/105-dts-mt7622-enable-pstore.patch
-new file mode 100644
-index 0000000000..6ef56f8584
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/105-dts-mt7622-enable-pstore.patch
-@@ -0,0 +1,25 @@
-+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-+@@ -111,7 +111,7 @@
-+ 	};
-+ 
-+ 	psci {
-+-		compatible  = "arm,psci-0.2";
-++		compatible  = "arm,psci-1.0";
-+ 		method      = "smc";
-+ 	};
-+ 
-+@@ -127,6 +127,13 @@
-+ 		#size-cells = <2>;
-+ 		ranges;
-+ 
-++		/* 64 KiB reserved for ramoops/pstore */
-++		ramoops@0x42ff0000 {
-++			compatible = "ramoops";
-++			reg = <0 0x42ff0000 0 0x10000>;
-++			record-size = <0x1000>;
-++		};
-++
-+ 		/* 192 KiB reserved for ARM Trusted Firmware (BL31) */
-+ 		secmon_reserved: secmon@43000000 {
-+ 			reg = <0 0x43000000 0 0x30000>;
-diff --git a/target/linux/mediatek/patches-5.10/110-dts-fix-bpi2-console.patch b/target/linux/mediatek/patches-5.10/110-dts-fix-bpi2-console.patch
-new file mode 100644
-index 0000000000..c696e7d369
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/110-dts-fix-bpi2-console.patch
-@@ -0,0 +1,10 @@
-+--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
-++++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
-+@@ -19,6 +19,7 @@
-+ 
-+ 	chosen {
-+ 		stdout-path = "serial2:115200n8";
-++		bootargs = "console=ttyS2,115200n8";
-+ 	};
-+ 
-+ 	connector {
-diff --git a/target/linux/mediatek/patches-5.10/111-dts-fix-bpi64-console.patch b/target/linux/mediatek/patches-5.10/111-dts-fix-bpi64-console.patch
-new file mode 100644
-index 0000000000..07a2eae245
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/111-dts-fix-bpi64-console.patch
-@@ -0,0 +1,11 @@
-+--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-++++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-+@@ -22,7 +22,7 @@
-+ 
-+ 	chosen {
-+ 		stdout-path = "serial0:115200n8";
-+-		bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512";
-++		bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
-+ 	};
-+ 
-+ 	cpus {
-diff --git a/target/linux/mediatek/patches-5.10/112-dts-fix-bpi64-lan-names.patch b/target/linux/mediatek/patches-5.10/112-dts-fix-bpi64-lan-names.patch
-new file mode 100644
-index 0000000000..6ce85efde9
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/112-dts-fix-bpi64-lan-names.patch
-@@ -0,0 +1,37 @@
-+--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-++++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-+@@ -18,6 +18,7 @@
-+ 
-+ 	aliases {
-+ 		serial0 = &uart0;
-++		ethernet0 = &gmac0;
-+ 	};
-+ 
-+ 	chosen {
-+@@ -160,22 +161,22 @@
-+ 
-+ 				port@1 {
-+ 					reg = <1>;
-+-					label = "lan0";
-++					label = "lan1";
-+ 				};
-+ 
-+ 				port@2 {
-+ 					reg = <2>;
-+-					label = "lan1";
-++					label = "lan2";
-+ 				};
-+ 
-+ 				port@3 {
-+ 					reg = <3>;
-+-					label = "lan2";
-++					label = "lan3";
-+ 				};
-+ 
-+ 				port@4 {
-+ 					reg = <4>;
-+-					label = "lan3";
-++					label = "lan4";
-+ 				};
-+ 
-+ 				port@6 {
-diff --git a/target/linux/mediatek/patches-5.10/113-dts-fix-bpi64-leds-and-buttons.patch b/target/linux/mediatek/patches-5.10/113-dts-fix-bpi64-leds-and-buttons.patch
-new file mode 100644
-index 0000000000..f88dbc7195
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/113-dts-fix-bpi64-leds-and-buttons.patch
-@@ -0,0 +1,56 @@
-+--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-++++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-+@@ -19,6 +19,10 @@
-+ 	aliases {
-+ 		serial0 = &uart0;
-+ 		ethernet0 = &gmac0;
-++		led-boot = &led_system_green;
-++		led-failsafe = &led_system_blue;
-++		led-running = &led_system_green;
-++		led-upgrade = &led_system_blue;
-+ 	};
-+ 
-+ 	chosen {
-+@@ -42,8 +46,8 @@
-+ 		compatible = "gpio-keys";
-+ 
-+ 		factory {
-+-			label = "factory";
-+-			linux,code = <BTN_0>;
-++			label = "reset";
-++			linux,code = <KEY_RESTART>;
-+ 			gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
-+ 		};
-+ 
-+@@ -57,17 +61,25 @@
-+ 	leds {
-+ 		compatible = "gpio-leds";
-+ 
-+-		green {
-+-			label = "bpi-r64:pio:green";
-+-			gpios = <&pio 89 GPIO_ACTIVE_HIGH>;
-++		led_system_blue: blue {
-++			label = "bpi-r64:pio:blue";
-++			gpios = <&pio 85 GPIO_ACTIVE_HIGH>;
-+ 			default-state = "off";
-+ 		};
-+ 
-+-		red {
-+-			label = "bpi-r64:pio:red";
-+-			gpios = <&pio 88 GPIO_ACTIVE_HIGH>;
-++		led_system_green: green {
-++			label = "bpi-r64:pio:green";
-++			gpios = <&pio 89 GPIO_ACTIVE_HIGH>;
-+ 			default-state = "off";
-+ 		};
-++
-++/*
-++ *		red {
-++ *			label = "bpi-r64:pio:red";
-++ *			gpios = <&pio 88 GPIO_ACTIVE_HIGH>;
-++ *			default-state = "off";
-++ *		};
-++ */
-+ 	};
-+ 
-+ 	memory {
-diff --git a/target/linux/mediatek/patches-5.10/114-dts-bpi64-disable-rtc.patch b/target/linux/mediatek/patches-5.10/114-dts-bpi64-disable-rtc.patch
-new file mode 100644
-index 0000000000..261579bf37
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/114-dts-bpi64-disable-rtc.patch
-@@ -0,0 +1,21 @@
-+--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-++++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-+@@ -559,12 +559,16 @@
-+ 	status = "okay";
-+ };
-+ 
-++&rtc {
-++	status = "disabled";
-++};
-++
-+ &sata {
-+-	status = "disable";
-++	status = "disabled";
-+ };
-+ 
-+ &sata_phy {
-+-	status = "disable";
-++	status = "disabled";
-+ };
-+ 
-+ &spi0 {
-diff --git a/target/linux/mediatek/patches-5.10/130-dts-mt7629-add-snand-support.patch b/target/linux/mediatek/patches-5.10/130-dts-mt7629-add-snand-support.patch
-new file mode 100644
-index 0000000000..479694b400
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/130-dts-mt7629-add-snand-support.patch
-@@ -0,0 +1,97 @@
-+From c813fbe806257c574240770ef716fbee19f7dbfa Mon Sep 17 00:00:00 2001
-+From: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
-+Date: Thu, 6 Jun 2019 16:29:04 +0800
-+Subject: [PATCH] spi: spi-mem: Mediatek: Add SPI Nand support for MT7629
-+
-+Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
-+---
-+ arch/arm/boot/dts/mt7629-rfb.dts | 45 ++++++++++++++++++++++++++++++++
-+ arch/arm/boot/dts/mt7629.dtsi    | 22 ++++++++++++++++
-+ 3 files changed, 79 insertions(+)
-+
-+--- a/arch/arm/boot/dts/mt7629.dtsi
-++++ b/arch/arm/boot/dts/mt7629.dtsi
-+@@ -272,6 +272,28 @@
-+ 			status = "disabled";
-+ 		};
-+ 
-++		bch: ecc@1100e000 {
-++			compatible = "mediatek,mt7622-ecc";
-++			reg = <0x1100e000 0x1000>;
-++			interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_LOW>;
-++			clocks = <&pericfg CLK_PERI_NFIECC_PD>;
-++			clock-names = "nfiecc_clk";
-++			status = "disabled";
-++		};
-++
-++		snfi: spi@1100d000 {
-++			compatible = "mediatek,mt7629-snfi";
-++			reg = <0x1100d000 0x1000>;
-++			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
-++			clocks = <&pericfg CLK_PERI_NFI_PD>,
-++				 <&pericfg CLK_PERI_SNFI_PD>;
-++			clock-names = "nfi_clk", "spi_clk";
-++			ecc-engine = <&bch>;
-++			#address-cells = <1>;
-++			#size-cells = <0>;
-++			status = "disabled";
-++		};
-++
-+ 		spi: spi@1100a000 {
-+ 			compatible = "mediatek,mt7629-spi",
-+ 				     "mediatek,mt7622-spi";
-+--- a/arch/arm/boot/dts/mt7629-rfb.dts
-++++ b/arch/arm/boot/dts/mt7629-rfb.dts
-+@@ -249,6 +249,52 @@
-+ 	};
-+ };
-+ 
-++&bch {
-++	status = "okay";
-++};
-++
-++&snfi {
-++	pinctrl-names = "default";
-++	pinctrl-0 = <&serial_nand_pins>;
-++	status = "okay";
-++
-++	spi_nand@0 {
-++		#address-cells = <1>;
-++		#size-cells = <1>;
-++		compatible = "spi-nand";
-++		spi-max-frequency = <104000000>;
-++		reg = <0>;
-++
-++		partitions {
-++		compatible = "fixed-partitions";
-++		#address-cells = <1>;
-++		#size-cells = <1>;
-++
-++		partition@0 {
-++			label = "Bootloader";
-++			reg = <0x00000 0x0100000>;
-++			read-only;
-++		};
-++
-++		partition@100000 {
-++			label = "Config";
-++			reg = <0x100000 0x0040000>;
-++		};
-++
-++		partition@140000 {
-++			label = "factory";
-++			reg = <0x140000 0x0080000>;
-++		};
-++
-++		partition@1c0000 {
-++			label = "firmware";
-++			reg = <0x1c0000 0x1000000>;
-++		};
-++
-++		};
-++	};
-++};
-++
-+ &spi {
-+ 	pinctrl-names = "default";
-+ 	pinctrl-0 = <&spi_pins>;
-diff --git a/target/linux/mediatek/patches-5.10/131-dts-mt7622-add-snand-support.patch b/target/linux/mediatek/patches-5.10/131-dts-mt7622-add-snand-support.patch
-new file mode 100644
-index 0000000000..5f89d58b06
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/131-dts-mt7622-add-snand-support.patch
-@@ -0,0 +1,96 @@
-+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-+@@ -561,6 +561,19 @@
-+ 		status = "disabled";
-+ 	};
-+ 
-++	snfi: spi@1100d000 {
-++		compatible = "mediatek,mt7622-snfi";
-++		reg = <0 0x1100d000 0 0x1000>;
-++		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
-++		clocks = <&pericfg CLK_PERI_NFI_PD>,
-++			 <&pericfg CLK_PERI_SNFI_PD>;
-++		clock-names = "nfi_clk", "spi_clk";
-++		ecc-engine = <&bch>;
-++		#address-cells = <1>;
-++		#size-cells = <0>;
-++		status = "disabled";
-++	};
-++
-+ 	nor_flash: spi@11014000 {
-+ 		compatible = "mediatek,mt7622-nor",
-+ 			     "mediatek,mt8173-nor";
-+--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
-++++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
-+@@ -85,7 +85,7 @@
-+ };
-+ 
-+ &bch {
-+-	status = "disabled";
-++	status = "okay";
-+ };
-+ 
-+ &btif {
-+@@ -529,6 +529,62 @@
-+ 	status = "disabled";
-+ };
-+ 
-++&snfi {
-++	pinctrl-names = "default";
-++	pinctrl-0 = <&serial_nand_pins>;
-++	status = "okay";
-++
-++	spi_nand@0 {
-++		#address-cells = <1>;
-++		#size-cells = <1>;
-++		compatible = "spi-nand";
-++		spi-max-frequency = <104000000>;
-++		reg = <0>;
-++
-++		partitions {
-++			compatible = "fixed-partitions";
-++			#address-cells = <1>;
-++			#size-cells = <1>;
-++
-++			partition@0 {
-++				label = "Preloader";
-++				reg = <0x00000 0x0080000>;
-++				read-only;
-++			};
-++
-++			partition@80000 {
-++				label = "ATF";
-++				reg = <0x80000 0x0040000>;
-++			};
-++
-++			partition@c0000 {
-++				label = "Bootloader";
-++				reg = <0xc0000 0x0080000>;
-++			};
-++
-++			partition@140000 {
-++				label = "Config";
-++				reg = <0x140000 0x0080000>;
-++			};
-++
-++			partition@1c0000 {
-++				label = "Factory";
-++				reg = <0x1c0000 0x0100000>;
-++			};
-++
-++			partition@200000 {
-++				label = "firmware";
-++				reg = <0x2c0000 0x2000000>;
-++			};
-++
-++			partition@2200000 {
-++				label = "User_data";
-++				reg = <0x22c0000 0x4000000>;
-++			};
-++		};
-++	};
-++};
-++
-+ &spi0 {
-+ 	pinctrl-names = "default";
-+ 	pinctrl-0 = <&spic0_pins>;
-diff --git a/target/linux/mediatek/patches-5.10/140-dts-fix-wmac-support-for-mt7622-rfb1.patch b/target/linux/mediatek/patches-5.10/140-dts-fix-wmac-support-for-mt7622-rfb1.patch
-new file mode 100644
-index 0000000000..d6d471520f
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/140-dts-fix-wmac-support-for-mt7622-rfb1.patch
-@@ -0,0 +1,18 @@
-+--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
-++++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
-+@@ -567,7 +567,7 @@
-+ 				reg = <0x140000 0x0080000>;
-+ 			};
-+ 
-+-			partition@1c0000 {
-++			factory: partition@1c0000 {
-+ 				label = "Factory";
-+ 				reg = <0x1c0000 0x0100000>;
-+ 			};
-+@@ -626,5 +626,6 @@
-+ };
-+ 
-+ &wmac {
-++	mediatek,mtd-eeprom = <&factory 0x0000>;
-+ 	status = "okay";
-+ };
-diff --git a/target/linux/mediatek/patches-5.10/150-dts-mt7623-eip97-inside-secure-support.patch b/target/linux/mediatek/patches-5.10/150-dts-mt7623-eip97-inside-secure-support.patch
-new file mode 100644
-index 0000000000..38947a3a94
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/150-dts-mt7623-eip97-inside-secure-support.patch
-@@ -0,0 +1,23 @@
-+--- a/arch/arm/boot/dts/mt7623.dtsi
-++++ b/arch/arm/boot/dts/mt7623.dtsi
-+@@ -949,17 +949,14 @@
-+ 	};
-+ 
-+ 	crypto: crypto@1b240000 {
-+-		compatible = "mediatek,eip97-crypto";
-++		compatible = "inside-secure,safexcel-eip97";
-+ 		reg = <0 0x1b240000 0 0x20000>;
-+ 		interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>,
-+ 			     <GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>,
-+ 			     <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>,
-+-			     <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>,
-+-			     <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>;
-++			     <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
-++		interrupt-names = "ring0", "ring1", "ring2", "ring3";
-+ 		clocks = <&ethsys CLK_ETHSYS_CRYPTO>;
-+-		clock-names = "cryp";
-+-		power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
-+-		status = "disabled";
-+ 	};
-+ 
-+ 	bdpsys: syscon@1c000000 {
-diff --git a/target/linux/mediatek/patches-5.10/200-phy-phy-mtk-tphy-Add-hifsys-support.patch b/target/linux/mediatek/patches-5.10/200-phy-phy-mtk-tphy-Add-hifsys-support.patch
-new file mode 100644
-index 0000000000..bd24ddc0c0
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/200-phy-phy-mtk-tphy-Add-hifsys-support.patch
-@@ -0,0 +1,66 @@
-+From 28f9a5e2a3f5441ab5594669ed82da11e32277a9 Mon Sep 17 00:00:00 2001
-+From: Kristian Evensen <kristian.evensen@gmail.com>
-+Date: Mon, 30 Apr 2018 14:38:01 +0200
-+Subject: [PATCH] phy: phy-mtk-tphy: Add hifsys-support
-+
-+---
-+ drivers/phy/mediatek/phy-mtk-tphy.c | 20 ++++++++++++++++++++
-+ 1 file changed, 20 insertions(+)
-+
-+--- a/drivers/phy/mediatek/phy-mtk-tphy.c
-++++ b/drivers/phy/mediatek/phy-mtk-tphy.c
-+@@ -15,6 +15,8 @@
-+ #include <linux/of_device.h>
-+ #include <linux/phy/phy.h>
-+ #include <linux/platform_device.h>
-++#include <linux/mfd/syscon.h>
-++#include <linux/regmap.h>
-+ 
-+ /* version V1 sub-banks offset base address */
-+ /* banks shared by multiple phys */
-+@@ -267,6 +269,9 @@
-+ #define RG_CDR_BIRLTD0_GEN3_MSK		GENMASK(4, 0)
-+ #define RG_CDR_BIRLTD0_GEN3_VAL(x)	(0x1f & (x))
-+ 
-++#define HIF_SYSCFG1			0x14
-++#define HIF_SYSCFG1_PHY2_MASK		(0x3 << 20)
-++
-+ enum mtk_phy_version {
-+ 	MTK_PHY_V1 = 1,
-+ 	MTK_PHY_V2,
-+@@ -315,6 +320,7 @@ struct mtk_tphy {
-+ 	void __iomem *sif_base;	/* only shared sif */
-+ 	const struct mtk_phy_pdata *pdata;
-+ 	struct mtk_phy_instance **phys;
-++	struct regmap *hif;
-+ 	int nphys;
-+ 	int src_ref_clk; /* MHZ, reference clock for slew rate calibrate */
-+ 	int src_coef; /* coefficient for slew rate calibrate */
-+@@ -634,6 +640,10 @@ static void pcie_phy_instance_init(struc
-+ 	if (tphy->pdata->version != MTK_PHY_V1)
-+ 		return;
-+ 
-++	if (tphy->hif)
-++		regmap_update_bits(tphy->hif, HIF_SYSCFG1,
-++				   HIF_SYSCFG1_PHY2_MASK, 0);
-++
-+ 	tmp = readl(u3_banks->phya + U3P_U3_PHYA_DA_REG0);
-+ 	tmp &= ~(P3A_RG_XTAL_EXT_PE1H | P3A_RG_XTAL_EXT_PE2H);
-+ 	tmp |= P3A_RG_XTAL_EXT_PE1H_VAL(0x2) | P3A_RG_XTAL_EXT_PE2H_VAL(0x2);
-+@@ -1134,6 +1144,16 @@ static int mtk_tphy_probe(struct platfor
-+ 		&tphy->src_ref_clk);
-+ 	device_property_read_u32(dev, "mediatek,src-coef", &tphy->src_coef);
-+ 
-++	if (of_find_property(np, "mediatek,phy-switch", NULL)) {
-++		tphy->hif = syscon_regmap_lookup_by_phandle(np,
-++							    "mediatek,phy-switch");
-++		if (IS_ERR(tphy->hif)) {
-++			dev_err(&pdev->dev,
-++				"missing \"mediatek,phy-switch\" phandle\n");
-++			return PTR_ERR(tphy->hif);
-++		}
-++	}
-++
-+ 	port = 0;
-+ 	for_each_child_of_node(np, child_np) {
-+ 		struct mtk_phy_instance *instance;
-diff --git a/target/linux/mediatek/patches-5.10/300-mtd-mtk-ecc-move-mtk-ecc-header-file-to-include-mtd.patch b/target/linux/mediatek/patches-5.10/300-mtd-mtk-ecc-move-mtk-ecc-header-file-to-include-mtd.patch
-new file mode 100644
-index 0000000000..d9ab339fa8
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/300-mtd-mtk-ecc-move-mtk-ecc-header-file-to-include-mtd.patch
-@@ -0,0 +1,139 @@
-+From a2479dc254ebe31c84fbcfda73f35e2321576494 Mon Sep 17 00:00:00 2001
-+From: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
-+Date: Tue, 19 Mar 2019 13:57:38 +0800
-+Subject: [PATCH 1/6] mtd: mtk ecc: move mtk ecc header file to include/mtd
-+
-+Change-Id: I8dc1d30e21b40d68ef5efd9587012f82970156a5
-+Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
-+---
-+ drivers/mtd/nand/raw/mtk_ecc.c                        | 3 +--
-+ drivers/mtd/nand/raw/mtk_nand.c                       | 2 +-
-+ {drivers/mtd/nand/raw => include/linux/mtd}/mtk_ecc.h | 0
-+ 3 files changed, 2 insertions(+), 3 deletions(-)
-+ rename {drivers/mtd/nand/raw => include/linux/mtd}/mtk_ecc.h (100%)
-+
-+--- a/drivers/mtd/nand/raw/mtk_ecc.c
-++++ b/drivers/mtd/nand/raw/mtk_ecc.c
-+@@ -15,8 +15,7 @@
-+ #include <linux/of.h>
-+ #include <linux/of_platform.h>
-+ #include <linux/mutex.h>
-+-
-+-#include "mtk_ecc.h"
-++#include <linux/mtd/mtk_ecc.h>
-+ 
-+ #define ECC_IDLE_MASK		BIT(0)
-+ #define ECC_IRQ_EN		BIT(0)
-+--- a/drivers/mtd/nand/raw/mtk_nand.c
-++++ b/drivers/mtd/nand/raw/mtk_nand.c
-+@@ -17,7 +17,7 @@
-+ #include <linux/iopoll.h>
-+ #include <linux/of.h>
-+ #include <linux/of_device.h>
-+-#include "mtk_ecc.h"
-++#include <linux/mtd/mtk_ecc.h>
-+ 
-+ /* NAND controller register definition */
-+ #define NFI_CNFG		(0x00)
-+--- /dev/null
-++++ b/include/linux/mtd/mtk_ecc.h
-+@@ -0,0 +1,49 @@
-++/*
-++ * MTK SDG1 ECC controller
-++ *
-++ * Copyright (c) 2016 Mediatek
-++ * Authors:	Xiaolei Li		<xiaolei.li@mediatek.com>
-++ *		Jorge Ramirez-Ortiz	<jorge.ramirez-ortiz@linaro.org>
-++ * This program is free software; you can redistribute it and/or modify it
-++ * under the terms of the GNU General Public License version 2 as published
-++ * by the Free Software Foundation.
-++ */
-++
-++#ifndef __DRIVERS_MTD_NAND_MTK_ECC_H__
-++#define __DRIVERS_MTD_NAND_MTK_ECC_H__
-++
-++#include <linux/types.h>
-++
-++enum mtk_ecc_mode {ECC_DMA_MODE = 0, ECC_NFI_MODE = 1};
-++enum mtk_ecc_operation {ECC_ENCODE, ECC_DECODE};
-++
-++struct device_node;
-++struct mtk_ecc;
-++
-++struct mtk_ecc_stats {
-++	u32 corrected;
-++	u32 bitflips;
-++	u32 failed;
-++};
-++
-++struct mtk_ecc_config {
-++	enum mtk_ecc_operation op;
-++	enum mtk_ecc_mode mode;
-++	dma_addr_t addr;
-++	u32 strength;
-++	u32 sectors;
-++	u32 len;
-++};
-++
-++int mtk_ecc_encode(struct mtk_ecc *, struct mtk_ecc_config *, u8 *, u32);
-++void mtk_ecc_get_stats(struct mtk_ecc *, struct mtk_ecc_stats *, int);
-++int mtk_ecc_wait_done(struct mtk_ecc *, enum mtk_ecc_operation);
-++int mtk_ecc_enable(struct mtk_ecc *, struct mtk_ecc_config *);
-++void mtk_ecc_disable(struct mtk_ecc *);
-++void mtk_ecc_adjust_strength(struct mtk_ecc *ecc, u32 *p);
-++unsigned int mtk_ecc_get_parity_bits(struct mtk_ecc *ecc);
-++
-++struct mtk_ecc *of_mtk_ecc_get(struct device_node *);
-++void mtk_ecc_release(struct mtk_ecc *);
-++
-++#endif
-+--- a/drivers/mtd/nand/raw/mtk_ecc.h
-++++ /dev/null
-+@@ -1,47 +0,0 @@
-+-/* SPDX-License-Identifier: GPL-2.0 OR MIT */
-+-/*
-+- * MTK SDG1 ECC controller
-+- *
-+- * Copyright (c) 2016 Mediatek
-+- * Authors:	Xiaolei Li		<xiaolei.li@mediatek.com>
-+- *		Jorge Ramirez-Ortiz	<jorge.ramirez-ortiz@linaro.org>
-+- */
-+-
-+-#ifndef __DRIVERS_MTD_NAND_MTK_ECC_H__
-+-#define __DRIVERS_MTD_NAND_MTK_ECC_H__
-+-
-+-#include <linux/types.h>
-+-
-+-enum mtk_ecc_mode {ECC_DMA_MODE = 0, ECC_NFI_MODE = 1};
-+-enum mtk_ecc_operation {ECC_ENCODE, ECC_DECODE};
-+-
-+-struct device_node;
-+-struct mtk_ecc;
-+-
-+-struct mtk_ecc_stats {
-+-	u32 corrected;
-+-	u32 bitflips;
-+-	u32 failed;
-+-};
-+-
-+-struct mtk_ecc_config {
-+-	enum mtk_ecc_operation op;
-+-	enum mtk_ecc_mode mode;
-+-	dma_addr_t addr;
-+-	u32 strength;
-+-	u32 sectors;
-+-	u32 len;
-+-};
-+-
-+-int mtk_ecc_encode(struct mtk_ecc *, struct mtk_ecc_config *, u8 *, u32);
-+-void mtk_ecc_get_stats(struct mtk_ecc *, struct mtk_ecc_stats *, int);
-+-int mtk_ecc_wait_done(struct mtk_ecc *, enum mtk_ecc_operation);
-+-int mtk_ecc_enable(struct mtk_ecc *, struct mtk_ecc_config *);
-+-void mtk_ecc_disable(struct mtk_ecc *);
-+-void mtk_ecc_adjust_strength(struct mtk_ecc *ecc, u32 *p);
-+-unsigned int mtk_ecc_get_parity_bits(struct mtk_ecc *ecc);
-+-
-+-struct mtk_ecc *of_mtk_ecc_get(struct device_node *);
-+-void mtk_ecc_release(struct mtk_ecc *);
-+-
-+-#endif
-diff --git a/target/linux/mediatek/patches-5.10/310-mtd-spinand-disable-on-die-ECC.patch b/target/linux/mediatek/patches-5.10/310-mtd-spinand-disable-on-die-ECC.patch
-new file mode 100644
-index 0000000000..e608113865
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/310-mtd-spinand-disable-on-die-ECC.patch
-@@ -0,0 +1,31 @@
-+From b341f120cfc9ca1dfd48364b7f36ac2c1fbdea43 Mon Sep 17 00:00:00 2001
-+From: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
-+Date: Wed, 3 Apr 2019 16:30:01 +0800
-+Subject: [PATCH 3/6] mtd: spinand: disable on-die ECC
-+
-+Change-Id: I9745adaed5295202fabbe8ab8947885c57a5b847
-+Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
-+---
-+ drivers/mtd/nand/spi/core.c | 4 ++--
-+ 1 file changed, 2 insertions(+), 2 deletions(-)
-+
-+--- a/drivers/mtd/nand/spi/core.c
-++++ b/drivers/mtd/nand/spi/core.c
-+@@ -493,7 +493,7 @@ static int spinand_mtd_read(struct mtd_i
-+ 	int ret = 0;
-+ 
-+ 	if (ops->mode != MTD_OPS_RAW && spinand->eccinfo.ooblayout)
-+-		enable_ecc = true;
-++		enable_ecc = false;
-+ 
-+ 	mutex_lock(&spinand->lock);
-+ 
-+@@ -541,7 +541,7 @@ static int spinand_mtd_write(struct mtd_
-+ 	int ret = 0;
-+ 
-+ 	if (ops->mode != MTD_OPS_RAW && mtd->ooblayout)
-+-		enable_ecc = true;
-++		enable_ecc = false;
-+ 
-+ 	mutex_lock(&spinand->lock);
-+ 
-diff --git a/target/linux/mediatek/patches-5.10/320-spi-spi-mem-MediaTek-Add-SPI-NAND-Flash-interface-dr.patch b/target/linux/mediatek/patches-5.10/320-spi-spi-mem-MediaTek-Add-SPI-NAND-Flash-interface-dr.patch
-new file mode 100644
-index 0000000000..53e2aed51e
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/320-spi-spi-mem-MediaTek-Add-SPI-NAND-Flash-interface-dr.patch
-@@ -0,0 +1,1246 @@
-+From 1ecb38eabd90efe93957d0a822a167560c39308a Mon Sep 17 00:00:00 2001
-+From: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
-+Date: Wed, 20 Mar 2019 16:19:51 +0800
-+Subject: [PATCH 6/6] spi: spi-mem: MediaTek: Add SPI NAND Flash interface
-+ driver for MediaTek MT7622
-+
-+Change-Id: I3e78406bb9b46b0049d3988a5c71c7069e4f809c
-+Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
-+---
-+ drivers/spi/Kconfig        |    9 +
-+ drivers/spi/Makefile       |    1 +
-+ drivers/spi/spi-mtk-snfi.c | 1183 ++++++++++++++++++++++++++++++++++++
-+ 3 files changed, 1193 insertions(+)
-+ create mode 100644 drivers/spi/spi-mtk-snfi.c
-+
-+--- a/drivers/spi/Makefile
-++++ b/drivers/spi/Makefile
-+@@ -67,6 +67,7 @@ obj-$(CONFIG_SPI_MPC512x_PSC)		+= spi-mp
-+ obj-$(CONFIG_SPI_MPC52xx_PSC)		+= spi-mpc52xx-psc.o
-+ obj-$(CONFIG_SPI_MPC52xx)		+= spi-mpc52xx.o
-+ obj-$(CONFIG_SPI_MT65XX)                += spi-mt65xx.o
-++obj-$(CONFIG_SPI_MTK_SNFI)              += spi-mtk-snfi.o
-+ obj-$(CONFIG_SPI_MT7621)		+= spi-mt7621.o
-+ obj-$(CONFIG_SPI_MTK_NOR)		+= spi-mtk-nor.o
-+ obj-$(CONFIG_SPI_MXIC)			+= spi-mxic.o
-+--- a/drivers/spi/Kconfig
-++++ b/drivers/spi/Kconfig
-+@@ -495,6 +495,15 @@ config SPI_MT65XX
-+ 	  say Y or M here.If you are not sure, say N.
-+ 	  SPI drivers for Mediatek MT65XX and MT81XX series ARM SoCs.
-+ 
-++config SPI_MTK_SNFI
-++	tristate "MediaTek SPI NAND interface"
-++	select MTD_SPI_NAND
-++	help
-++	  This selects the SPI NAND FLASH interface(SNFI),
-++	  which could be found on MediaTek Soc.
-++	  Say Y or M here.If you are not sure, say N.
-++	  Note Parallel Nand and SPI NAND is alternative on MediaTek SoCs.
-++
-+ config SPI_MT7621
-+ 	tristate "MediaTek MT7621 SPI Controller"
-+ 	depends on RALINK || COMPILE_TEST
-+--- /dev/null
-++++ b/drivers/spi/spi-mtk-snfi.c
-+@@ -0,0 +1,1200 @@
-++// SPDX-License-Identifier: GPL-2.0
-++/*
-++ * Driver for MediaTek SPI Nand interface
-++ *
-++ * Copyright (C) 2018 MediaTek Inc.
-++ * Authors:	Xiangsheng Hou	<xiangsheng.hou@mediatek.com>
-++ *
-++ */
-++
-++#include <linux/clk.h>
-++#include <linux/delay.h>
-++#include <linux/dma-mapping.h>
-++#include <linux/interrupt.h>
-++#include <linux/iopoll.h>
-++#include <linux/mtd/mtd.h>
-++#include <linux/mtd/mtk_ecc.h>
-++#include <linux/mtd/spinand.h>
-++#include <linux/module.h>
-++#include <linux/of.h>
-++#include <linux/of_device.h>
-++#include <linux/platform_device.h>
-++#include <linux/spi/spi.h>
-++#include <linux/spi/spi-mem.h>
-++
-++/* NAND controller register definition */
-++/* NFI control */
-++#define NFI_CNFG		0x00
-++#define		CNFG_DMA		BIT(0)
-++#define		CNFG_READ_EN		BIT(1)
-++#define		CNFG_DMA_BURST_EN	BIT(2)
-++#define		CNFG_BYTE_RW		BIT(6)
-++#define		CNFG_HW_ECC_EN		BIT(8)
-++#define		CNFG_AUTO_FMT_EN	BIT(9)
-++#define		CNFG_OP_PROGRAM		(3UL << 12)
-++#define		CNFG_OP_CUST		(6UL << 12)
-++#define NFI_PAGEFMT		0x04
-++#define		PAGEFMT_512		0
-++#define		PAGEFMT_2K		1
-++#define		PAGEFMT_4K		2
-++#define		PAGEFMT_FDM_SHIFT	8
-++#define		PAGEFMT_FDM_ECC_SHIFT	12
-++#define NFI_CON			0x08
-++#define		CON_FIFO_FLUSH		BIT(0)
-++#define		CON_NFI_RST		BIT(1)
-++#define		CON_BRD			BIT(8)
-++#define		CON_BWR			BIT(9)
-++#define		CON_SEC_SHIFT		12
-++#define NFI_INTR_EN		0x10
-++#define		INTR_AHB_DONE_EN	BIT(6)
-++#define NFI_INTR_STA		0x14
-++#define NFI_CMD			0x20
-++#define NFI_STA			0x60
-++#define		STA_EMP_PAGE		BIT(12)
-++#define		NAND_FSM_MASK		(0x1f << 24)
-++#define		NFI_FSM_MASK		(0xf << 16)
-++#define NFI_ADDRCNTR		0x70
-++#define		CNTR_MASK		GENMASK(16, 12)
-++#define		ADDRCNTR_SEC_SHIFT	12
-++#define		ADDRCNTR_SEC(val) \
-++		(((val) & CNTR_MASK) >> ADDRCNTR_SEC_SHIFT)
-++#define NFI_STRADDR		0x80
-++#define NFI_BYTELEN		0x84
-++#define NFI_CSEL		0x90
-++#define NFI_FDML(x)		(0xa0 + (x) * sizeof(u32) * 2)
-++#define NFI_FDMM(x)		(0xa4 + (x) * sizeof(u32) * 2)
-++#define NFI_MASTER_STA		0x224
-++#define		MASTER_STA_MASK		0x0fff
-++/* NFI_SPI control */
-++#define SNFI_MAC_OUTL		0x504
-++#define SNFI_MAC_INL		0x508
-++#define SNFI_RD_CTL2		0x510
-++#define		RD_CMD_MASK		0x00ff
-++#define		RD_DUMMY_SHIFT		8
-++#define SNFI_RD_CTL3		0x514
-++#define		RD_ADDR_MASK		0xffff
-++#define SNFI_MISC_CTL		0x538
-++#define		RD_MODE_X2		BIT(16)
-++#define		RD_MODE_X4		(2UL << 16)
-++#define		RD_QDUAL_IO		(4UL << 16)
-++#define		RD_MODE_MASK		(7UL << 16)
-++#define		RD_CUSTOM_EN		BIT(6)
-++#define		WR_CUSTOM_EN		BIT(7)
-++#define		WR_X4_EN		BIT(20)
-++#define		SW_RST			BIT(28)
-++#define SNFI_MISC_CTL2		0x53c
-++#define		WR_LEN_SHIFT		16
-++#define SNFI_PG_CTL1		0x524
-++#define		WR_LOAD_CMD_SHIFT	8
-++#define SNFI_PG_CTL2		0x528
-++#define		WR_LOAD_ADDR_MASK	0xffff
-++#define SNFI_MAC_CTL		0x500
-++#define		MAC_WIP			BIT(0)
-++#define		MAC_WIP_READY		BIT(1)
-++#define		MAC_TRIG		BIT(2)
-++#define		MAC_EN			BIT(3)
-++#define		MAC_SIO_SEL		BIT(4)
-++#define SNFI_STA_CTL1		0x550
-++#define		SPI_STATE_IDLE		0xf
-++#define SNFI_CNFG		0x55c
-++#define		SNFI_MODE_EN		BIT(0)
-++#define SNFI_GPRAM_DATA		0x800
-++#define		SNFI_GPRAM_MAX_LEN	16
-++
-++/* Dummy command trigger NFI to spi mode */
-++#define NAND_CMD_DUMMYREAD	0x00
-++#define NAND_CMD_DUMMYPROG	0x80
-++
-++#define MTK_TIMEOUT		500000
-++#define MTK_RESET_TIMEOUT	1000000
-++#define MTK_SNFC_MIN_SPARE	16
-++#define KB(x)			((x) * 1024UL)
-++
-++/*
-++ * supported spare size of each IP.
-++ * order should be the same with the spare size bitfiled defination of
-++ * register NFI_PAGEFMT.
-++ */
-++static const u8 spare_size_mt7622[] = {
-++	16, 26, 27, 28
-++};
-++
-++struct mtk_snfi_caps {
-++	const u8 *spare_size;
-++	u8 num_spare_size;
-++	u32 nand_sec_size;
-++	u8 nand_fdm_size;
-++	u8 nand_fdm_ecc_size;
-++	u8 ecc_parity_bits;
-++	u8 pageformat_spare_shift;
-++	u8 bad_mark_swap;
-++};
-++
-++struct mtk_snfi_bad_mark_ctl {
-++	void (*bm_swap)(struct spi_mem *mem, u8 *buf, int raw);
-++	u32 sec;
-++	u32 pos;
-++};
-++
-++struct mtk_snfi_nand_chip {
-++	struct mtk_snfi_bad_mark_ctl bad_mark;
-++	u32 spare_per_sector;
-++};
-++
-++struct mtk_snfi_clk {
-++	struct clk *nfi_clk;
-++	struct clk *spi_clk;
-++};
-++
-++struct mtk_snfi {
-++	const struct mtk_snfi_caps *caps;
-++	struct mtk_snfi_nand_chip snfi_nand;
-++	struct mtk_snfi_clk clk;
-++	struct mtk_ecc_config ecc_cfg;
-++	struct mtk_ecc *ecc;
-++	struct completion done;
-++	struct device *dev;
-++
-++	void __iomem *regs;
-++
-++	u8 *buffer;
-++};
-++
-++static inline u8 *oob_ptr(struct spi_mem *mem, int i)
-++{
-++	struct spinand_device *spinand = spi_mem_get_drvdata(mem);
-++	struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master);
-++	struct mtk_snfi_nand_chip *snfi_nand = &snfi->snfi_nand;
-++	u8 *poi;
-++
-++	/* map the sector's FDM data to free oob:
-++	 * the beginning of the oob area stores the FDM data of bad mark
-++	 */
-++
-++	if (i < snfi_nand->bad_mark.sec)
-++		poi = spinand->oobbuf + (i + 1) * snfi->caps->nand_fdm_size;
-++	else if (i == snfi_nand->bad_mark.sec)
-++		poi = spinand->oobbuf;
-++	else
-++		poi = spinand->oobbuf + i * snfi->caps->nand_fdm_size;
-++
-++	return poi;
-++}
-++
-++static inline int mtk_data_len(struct spi_mem *mem)
-++{
-++	struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master);
-++	struct mtk_snfi_nand_chip *snfi_nand = &snfi->snfi_nand;
-++
-++	return snfi->caps->nand_sec_size + snfi_nand->spare_per_sector;
-++}
-++
-++static inline u8 *mtk_oob_ptr(struct spi_mem *mem,
-++			      const u8 *p, int i)
-++{
-++	struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master);
-++
-++	return (u8 *)p + i * mtk_data_len(mem) + snfi->caps->nand_sec_size;
-++}
-++
-++static void mtk_snfi_bad_mark_swap(struct spi_mem *mem,
-++				   u8 *buf, int raw)
-++{
-++	struct spinand_device *spinand = spi_mem_get_drvdata(mem);
-++	struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master);
-++	struct mtk_snfi_nand_chip *snfi_nand = &snfi->snfi_nand;
-++	u32 bad_pos = snfi_nand->bad_mark.pos;
-++
-++	if (raw)
-++		bad_pos += snfi_nand->bad_mark.sec * mtk_data_len(mem);
-++	else
-++		bad_pos += snfi_nand->bad_mark.sec * snfi->caps->nand_sec_size;
-++
-++	swap(spinand->oobbuf[0], buf[bad_pos]);
-++}
-++
-++static void mtk_snfi_set_bad_mark_ctl(struct mtk_snfi_bad_mark_ctl *bm_ctl,
-++				      struct spi_mem *mem)
-++{
-++	struct spinand_device *spinand = spi_mem_get_drvdata(mem);
-++	struct mtd_info *mtd = spinand_to_mtd(spinand);
-++
-++	bm_ctl->bm_swap = mtk_snfi_bad_mark_swap;
-++	bm_ctl->sec = mtd->writesize / mtk_data_len(mem);
-++	bm_ctl->pos = mtd->writesize % mtk_data_len(mem);
-++}
-++
-++static void mtk_snfi_mac_enable(struct mtk_snfi *snfi)
-++{
-++	u32 mac;
-++
-++	mac = readl(snfi->regs + SNFI_MAC_CTL);
-++	mac &= ~MAC_SIO_SEL;
-++	mac |= MAC_EN;
-++
-++	writel(mac, snfi->regs + SNFI_MAC_CTL);
-++}
-++
-++static int mtk_snfi_mac_trigger(struct mtk_snfi *snfi)
-++{
-++	u32 mac, reg;
-++	int ret = 0;
-++
-++	mac = readl(snfi->regs + SNFI_MAC_CTL);
-++	mac |= MAC_TRIG;
-++	writel(mac, snfi->regs + SNFI_MAC_CTL);
-++
-++	ret = readl_poll_timeout_atomic(snfi->regs + SNFI_MAC_CTL, reg,
-++					reg & MAC_WIP_READY, 10,
-++					MTK_TIMEOUT);
-++	if (ret < 0) {
-++		dev_err(snfi->dev, "polling wip ready for read timeout\n");
-++		return -EIO;
-++	}
-++
-++	ret = readl_poll_timeout_atomic(snfi->regs + SNFI_MAC_CTL, reg,
-++					!(reg & MAC_WIP), 10,
-++					MTK_TIMEOUT);
-++	if (ret < 0) {
-++		dev_err(snfi->dev, "polling flash update timeout\n");
-++		return -EIO;
-++	}
-++
-++	return ret;
-++}
-++
-++static void mtk_snfi_mac_leave(struct mtk_snfi *snfi)
-++{
-++	u32 mac;
-++
-++	mac = readl(snfi->regs + SNFI_MAC_CTL);
-++	mac &= ~(MAC_TRIG | MAC_EN | MAC_SIO_SEL);
-++	writel(mac, snfi->regs + SNFI_MAC_CTL);
-++}
-++
-++static int mtk_snfi_mac_op(struct mtk_snfi *snfi)
-++{
-++	int ret = 0;
-++
-++	mtk_snfi_mac_enable(snfi);
-++
-++	ret = mtk_snfi_mac_trigger(snfi);
-++	if (ret)
-++		return ret;
-++
-++	mtk_snfi_mac_leave(snfi);
-++
-++	return ret;
-++}
-++
-++static irqreturn_t mtk_snfi_irq(int irq, void *id)
-++{
-++	struct mtk_snfi *snfi = id;
-++	u16 sta, ien;
-++
-++	sta = readw(snfi->regs + NFI_INTR_STA);
-++	ien = readw(snfi->regs + NFI_INTR_EN);
-++
-++	if (!(sta & ien))
-++		return IRQ_NONE;
-++
-++	writew(~sta & ien, snfi->regs + NFI_INTR_EN);
-++	complete(&snfi->done);
-++
-++	return IRQ_HANDLED;
-++}
-++
-++static int mtk_snfi_enable_clk(struct device *dev, struct mtk_snfi_clk *clk)
-++{
-++	int ret;
-++
-++	ret = clk_prepare_enable(clk->nfi_clk);
-++	if (ret) {
-++		dev_err(dev, "failed to enable nfi clk\n");
-++		return ret;
-++	}
-++
-++	ret = clk_prepare_enable(clk->spi_clk);
-++	if (ret) {
-++		dev_err(dev, "failed to enable spi clk\n");
-++		clk_disable_unprepare(clk->nfi_clk);
-++		return ret;
-++	}
-++
-++	return 0;
-++}
-++
-++static void mtk_snfi_disable_clk(struct mtk_snfi_clk *clk)
-++{
-++	clk_disable_unprepare(clk->nfi_clk);
-++	clk_disable_unprepare(clk->spi_clk);
-++}
-++
-++static int mtk_snfi_reset(struct mtk_snfi *snfi)
-++{
-++	u32 val;
-++	int ret;
-++
-++	/* SW reset controller */
-++	val = readl(snfi->regs + SNFI_MISC_CTL) | SW_RST;
-++	writel(val, snfi->regs + SNFI_MISC_CTL);
-++
-++	ret = readw_poll_timeout(snfi->regs + SNFI_STA_CTL1, val,
-++				 !(val & SPI_STATE_IDLE), 50,
-++				 MTK_RESET_TIMEOUT);
-++	if (ret) {
-++		dev_warn(snfi->dev, "spi state active in reset [0x%x] = 0x%x\n",
-++			 SNFI_STA_CTL1, val);
-++		return ret;
-++	}
-++
-++	val = readl(snfi->regs + SNFI_MISC_CTL);
-++	val &= ~SW_RST;
-++	writel(val, snfi->regs + SNFI_MISC_CTL);
-++
-++	/* reset all registers and force the NFI master to terminate */
-++	writew(CON_FIFO_FLUSH | CON_NFI_RST, snfi->regs + NFI_CON);
-++	ret = readw_poll_timeout(snfi->regs + NFI_STA, val,
-++				 !(val & (NFI_FSM_MASK | NAND_FSM_MASK)), 50,
-++				 MTK_RESET_TIMEOUT);
-++	if (ret) {
-++		dev_warn(snfi->dev, "nfi active in reset [0x%x] = 0x%x\n",
-++			 NFI_STA, val);
-++		return ret;
-++	}
-++
-++	return 0;
-++}
-++
-++static int mtk_snfi_set_spare_per_sector(struct spinand_device *spinand,
-++					 const struct mtk_snfi_caps *caps,
-++					 u32 *sps)
-++{
-++	struct mtd_info *mtd = spinand_to_mtd(spinand);
-++	const u8 *spare = caps->spare_size;
-++	u32 sectors, i, closest_spare = 0;
-++
-++	sectors = mtd->writesize / caps->nand_sec_size;
-++	*sps = mtd->oobsize / sectors;
-++
-++	if (*sps < MTK_SNFC_MIN_SPARE)
-++		return -EINVAL;
-++
-++	for (i = 0; i < caps->num_spare_size; i++) {
-++		if (*sps >= spare[i] && spare[i] >= spare[closest_spare]) {
-++			closest_spare = i;
-++			if (*sps == spare[i])
-++				break;
-++		}
-++	}
-++
-++	*sps = spare[closest_spare];
-++
-++	return 0;
-++}
-++
-++static void mtk_snfi_read_fdm_data(struct spi_mem *mem,
-++				   u32 sectors)
-++{
-++	struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master);
-++	const struct mtk_snfi_caps *caps = snfi->caps;
-++	u32 vall, valm;
-++	int i, j;
-++	u8 *oobptr;
-++
-++	for (i = 0; i < sectors; i++) {
-++		oobptr = oob_ptr(mem, i);
-++		vall = readl(snfi->regs + NFI_FDML(i));
-++		valm = readl(snfi->regs + NFI_FDMM(i));
-++
-++		for (j = 0; j < caps->nand_fdm_size; j++)
-++			oobptr[j] = (j >= 4 ? valm : vall) >> ((j % 4) * 8);
-++	}
-++}
-++
-++static void mtk_snfi_write_fdm_data(struct spi_mem *mem,
-++				    u32 sectors)
-++{
-++	struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master);
-++	const struct mtk_snfi_caps *caps = snfi->caps;
-++	u32 vall, valm;
-++	int i, j;
-++	u8 *oobptr;
-++
-++	for (i = 0; i < sectors; i++) {
-++		oobptr = oob_ptr(mem, i);
-++		vall = 0;
-++		valm = 0;
-++		for (j = 0; j < 8; j++) {
-++			if (j < 4)
-++				vall |= (j < caps->nand_fdm_size ? oobptr[j] :
-++					 0xff) << (j * 8);
-++			else
-++				valm |= (j < caps->nand_fdm_size ? oobptr[j] :
-++					 0xff) << ((j - 4) * 8);
-++		}
-++		writel(vall, snfi->regs + NFI_FDML(i));
-++		writel(valm, snfi->regs + NFI_FDMM(i));
-++	}
-++}
-++
-++static int mtk_snfi_update_ecc_stats(struct spi_mem *mem,
-++				     u8 *buf, u32 sectors)
-++{
-++	struct spinand_device *spinand = spi_mem_get_drvdata(mem);
-++	struct mtd_info *mtd = spinand_to_mtd(spinand);
-++	struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master);
-++	struct mtk_ecc_stats stats;
-++	int rc, i;
-++
-++	rc = readl(snfi->regs + NFI_STA) & STA_EMP_PAGE;
-++	if (rc) {
-++		memset(buf, 0xff, sectors * snfi->caps->nand_sec_size);
-++		for (i = 0; i < sectors; i++)
-++			memset(spinand->oobbuf, 0xff,
-++			       snfi->caps->nand_fdm_size);
-++		return 0;
-++	}
-++
-++	mtk_ecc_get_stats(snfi->ecc, &stats, sectors);
-++	mtd->ecc_stats.corrected += stats.corrected;
-++	mtd->ecc_stats.failed += stats.failed;
-++
-++	return 0;
-++}
-++
-++static int mtk_snfi_hw_runtime_config(struct spi_mem *mem)
-++{
-++	struct spinand_device *spinand = spi_mem_get_drvdata(mem);
-++	struct mtd_info *mtd = spinand_to_mtd(spinand);
-++	struct nand_device *nand = mtd_to_nanddev(mtd);
-++	struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master);
-++	const struct mtk_snfi_caps *caps = snfi->caps;
-++	struct mtk_snfi_nand_chip *snfi_nand = &snfi->snfi_nand;
-++	u32 fmt, spare, i = 0;
-++	int ret;
-++
-++	ret = mtk_snfi_set_spare_per_sector(spinand, caps, &spare);
-++	if (ret)
-++		return ret;
-++
-++	/* calculate usable oob bytes for ecc parity data */
-++	snfi_nand->spare_per_sector = spare;
-++	spare -= caps->nand_fdm_size;
-++
-++	nand->memorg.oobsize = snfi_nand->spare_per_sector
-++		* (mtd->writesize / caps->nand_sec_size);
-++	mtd->oobsize = nanddev_per_page_oobsize(nand);
-++
-++	snfi->ecc_cfg.strength = (spare << 3) / caps->ecc_parity_bits;
-++	mtk_ecc_adjust_strength(snfi->ecc, &snfi->ecc_cfg.strength);
-++
-++	switch (mtd->writesize) {
-++	case 512:
-++		fmt = PAGEFMT_512;
-++		break;
-++	case KB(2):
-++		fmt = PAGEFMT_2K;
-++		break;
-++	case KB(4):
-++		fmt = PAGEFMT_4K;
-++		break;
-++	default:
-++		dev_err(snfi->dev, "invalid page len: %d\n", mtd->writesize);
-++		return -EINVAL;
-++	}
-++
-++	/* Setup PageFormat */
-++	while (caps->spare_size[i] != snfi_nand->spare_per_sector) {
-++		i++;
-++		if (i == (caps->num_spare_size - 1)) {
-++			dev_err(snfi->dev, "invalid spare size %d\n",
-++				snfi_nand->spare_per_sector);
-++			return -EINVAL;
-++		}
-++	}
-++
-++	fmt |= i << caps->pageformat_spare_shift;
-++	fmt |= caps->nand_fdm_size << PAGEFMT_FDM_SHIFT;
-++	fmt |= caps->nand_fdm_ecc_size << PAGEFMT_FDM_ECC_SHIFT;
-++	writel(fmt, snfi->regs + NFI_PAGEFMT);
-++
-++	snfi->ecc_cfg.len = caps->nand_sec_size + caps->nand_fdm_ecc_size;
-++
-++	mtk_snfi_set_bad_mark_ctl(&snfi_nand->bad_mark, mem);
-++
-++	return 0;
-++}
-++
-++static int mtk_snfi_read_from_cache(struct spi_mem *mem,
-++				    const struct spi_mem_op *op, int oob_on)
-++{
-++	struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master);
-++	struct spinand_device *spinand = spi_mem_get_drvdata(mem);
-++	struct mtd_info *mtd = spinand_to_mtd(spinand);
-++	u32 sectors = mtd->writesize / snfi->caps->nand_sec_size;
-++	struct mtk_snfi_nand_chip *snfi_nand = &snfi->snfi_nand;
-++	u32 reg, len, col_addr = 0;
-++	int dummy_cycle, ret;
-++	dma_addr_t dma_addr;
-++
-++	len = sectors * (snfi->caps->nand_sec_size
-++	      + snfi_nand->spare_per_sector);
-++
-++	dma_addr = dma_map_single(snfi->dev, snfi->buffer,
-++				  len, DMA_FROM_DEVICE);
-++	ret = dma_mapping_error(snfi->dev, dma_addr);
-++	if (ret) {
-++		dev_err(snfi->dev, "dma mapping error\n");
-++		return -EINVAL;
-++	}
-++
-++	/* set Read cache command and dummy cycle */
-++	dummy_cycle = (op->dummy.nbytes << 3) >> (ffs(op->dummy.buswidth) - 1);
-++	reg = ((op->cmd.opcode & RD_CMD_MASK) |
-++	       (dummy_cycle << RD_DUMMY_SHIFT));
-++	writel(reg, snfi->regs + SNFI_RD_CTL2);
-++
-++	writel((col_addr & RD_ADDR_MASK), snfi->regs + SNFI_RD_CTL3);
-++
-++	reg = readl(snfi->regs + SNFI_MISC_CTL);
-++	reg |= RD_CUSTOM_EN;
-++	reg &= ~(RD_MODE_MASK | WR_X4_EN);
-++
-++	/* set data and addr buswidth */
-++	if (op->data.buswidth == 4)
-++		reg |= RD_MODE_X4;
-++	else if (op->data.buswidth == 2)
-++		reg |= RD_MODE_X2;
-++
-++	if (op->addr.buswidth == 4 || op->addr.buswidth == 2)
-++		reg |= RD_QDUAL_IO;
-++	writel(reg, snfi->regs + SNFI_MISC_CTL);
-++
-++	writel(len, snfi->regs + SNFI_MISC_CTL2);
-++	writew(sectors << CON_SEC_SHIFT, snfi->regs + NFI_CON);
-++	reg = readw(snfi->regs + NFI_CNFG);
-++	reg |= CNFG_READ_EN | CNFG_DMA_BURST_EN | CNFG_DMA | CNFG_OP_CUST;
-++
-++	if (!oob_on) {
-++		reg |= CNFG_AUTO_FMT_EN | CNFG_HW_ECC_EN;
-++		writew(reg, snfi->regs + NFI_CNFG);
-++
-++		snfi->ecc_cfg.mode = ECC_NFI_MODE;
-++		snfi->ecc_cfg.sectors = sectors;
-++		snfi->ecc_cfg.op = ECC_DECODE;
-++		ret = mtk_ecc_enable(snfi->ecc, &snfi->ecc_cfg);
-++		if (ret) {
-++			dev_err(snfi->dev, "ecc enable failed\n");
-++			/* clear NFI_CNFG */
-++			reg &= ~(CNFG_READ_EN | CNFG_DMA_BURST_EN | CNFG_DMA |
-++				CNFG_AUTO_FMT_EN | CNFG_HW_ECC_EN);
-++			writew(reg, snfi->regs + NFI_CNFG);
-++			goto out;
-++		}
-++	} else {
-++		writew(reg, snfi->regs + NFI_CNFG);
-++	}
-++
-++	writel(lower_32_bits(dma_addr), snfi->regs + NFI_STRADDR);
-++	readw(snfi->regs + NFI_INTR_STA);
-++	writew(INTR_AHB_DONE_EN, snfi->regs + NFI_INTR_EN);
-++
-++	init_completion(&snfi->done);
-++
-++	/* set dummy command to trigger NFI enter SPI mode */
-++	writew(NAND_CMD_DUMMYREAD, snfi->regs + NFI_CMD);
-++	reg = readl(snfi->regs + NFI_CON) | CON_BRD;
-++	writew(reg, snfi->regs + NFI_CON);
-++
-++	ret = wait_for_completion_timeout(&snfi->done, msecs_to_jiffies(500));
-++	if (!ret) {
-++		dev_err(snfi->dev, "read ahb done timeout\n");
-++		writew(0, snfi->regs + NFI_INTR_EN);
-++		ret = -ETIMEDOUT;
-++		goto out;
-++	}
-++
-++	ret = readl_poll_timeout_atomic(snfi->regs + NFI_BYTELEN, reg,
-++					ADDRCNTR_SEC(reg) >= sectors, 10,
-++					MTK_TIMEOUT);
-++	if (ret < 0) {
-++		dev_err(snfi->dev, "polling read byte len timeout\n");
-++		ret = -EIO;
-++	} else {
-++		if (!oob_on) {
-++			ret = mtk_ecc_wait_done(snfi->ecc, ECC_DECODE);
-++			if (ret) {
-++				dev_warn(snfi->dev, "wait ecc done timeout\n");
-++			} else {
-++				mtk_snfi_update_ecc_stats(mem, snfi->buffer,
-++							  sectors);
-++				mtk_snfi_read_fdm_data(mem, sectors);
-++			}
-++		}
-++	}
-++
-++	if (oob_on)
-++		goto out;
-++
-++	mtk_ecc_disable(snfi->ecc);
-++out:
-++	dma_unmap_single(snfi->dev, dma_addr, len, DMA_FROM_DEVICE);
-++	writel(0, snfi->regs + NFI_CON);
-++	writel(0, snfi->regs + NFI_CNFG);
-++	reg = readl(snfi->regs + SNFI_MISC_CTL);
-++	reg &= ~RD_CUSTOM_EN;
-++	writel(reg, snfi->regs + SNFI_MISC_CTL);
-++
-++	return ret;
-++}
-++
-++static int mtk_snfi_write_to_cache(struct spi_mem *mem,
-++				   const struct spi_mem_op *op,
-++				   int oob_on)
-++{
-++	struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master);
-++	struct spinand_device *spinand = spi_mem_get_drvdata(mem);
-++	struct mtd_info *mtd = spinand_to_mtd(spinand);
-++	u32 sectors = mtd->writesize / snfi->caps->nand_sec_size;
-++	struct mtk_snfi_nand_chip *snfi_nand = &snfi->snfi_nand;
-++	u32 reg, len, col_addr = 0;
-++	dma_addr_t dma_addr;
-++	int ret;
-++
-++	len = sectors * (snfi->caps->nand_sec_size
-++	      + snfi_nand->spare_per_sector);
-++
-++	dma_addr = dma_map_single(snfi->dev, snfi->buffer, len,
-++				  DMA_TO_DEVICE);
-++	ret = dma_mapping_error(snfi->dev, dma_addr);
-++	if (ret) {
-++		dev_err(snfi->dev, "dma mapping error\n");
-++		return -EINVAL;
-++	}
-++
-++	/* set program load cmd and address */
-++	reg = (op->cmd.opcode << WR_LOAD_CMD_SHIFT);
-++	writel(reg, snfi->regs + SNFI_PG_CTL1);
-++	writel(col_addr & WR_LOAD_ADDR_MASK, snfi->regs + SNFI_PG_CTL2);
-++
-++	reg = readl(snfi->regs + SNFI_MISC_CTL);
-++	reg |= WR_CUSTOM_EN;
-++	reg &= ~(RD_MODE_MASK | WR_X4_EN);
-++
-++	if (op->data.buswidth == 4)
-++		reg |= WR_X4_EN;
-++	writel(reg, snfi->regs + SNFI_MISC_CTL);
-++
-++	writel(len << WR_LEN_SHIFT, snfi->regs + SNFI_MISC_CTL2);
-++	writew(sectors << CON_SEC_SHIFT, snfi->regs + NFI_CON);
-++
-++	reg = readw(snfi->regs + NFI_CNFG);
-++	reg &= ~(CNFG_READ_EN | CNFG_BYTE_RW);
-++	reg |= CNFG_DMA | CNFG_DMA_BURST_EN | CNFG_OP_PROGRAM;
-++
-++	if (!oob_on) {
-++		reg |= CNFG_AUTO_FMT_EN | CNFG_HW_ECC_EN;
-++		writew(reg, snfi->regs + NFI_CNFG);
-++
-++		snfi->ecc_cfg.mode = ECC_NFI_MODE;
-++		snfi->ecc_cfg.op = ECC_ENCODE;
-++		ret = mtk_ecc_enable(snfi->ecc, &snfi->ecc_cfg);
-++		if (ret) {
-++			dev_err(snfi->dev, "ecc enable failed\n");
-++			/* clear NFI_CNFG */
-++			reg &= ~(CNFG_DMA_BURST_EN | CNFG_DMA |
-++					CNFG_AUTO_FMT_EN | CNFG_HW_ECC_EN);
-++			writew(reg, snfi->regs + NFI_CNFG);
-++			dma_unmap_single(snfi->dev, dma_addr, len,
-++					 DMA_FROM_DEVICE);
-++			goto out;
-++		}
-++		/* write OOB into the FDM registers (OOB area in MTK NAND) */
-++		mtk_snfi_write_fdm_data(mem, sectors);
-++	} else {
-++		writew(reg, snfi->regs + NFI_CNFG);
-++	}
-++	writel(lower_32_bits(dma_addr), snfi->regs + NFI_STRADDR);
-++	readw(snfi->regs + NFI_INTR_STA);
-++	writew(INTR_AHB_DONE_EN, snfi->regs + NFI_INTR_EN);
-++
-++	init_completion(&snfi->done);
-++
-++	/* set dummy command to trigger NFI enter SPI mode */
-++	writew(NAND_CMD_DUMMYPROG, snfi->regs + NFI_CMD);
-++	reg = readl(snfi->regs + NFI_CON) | CON_BWR;
-++	writew(reg, snfi->regs + NFI_CON);
-++
-++	ret = wait_for_completion_timeout(&snfi->done, msecs_to_jiffies(500));
-++	if (!ret) {
-++		dev_err(snfi->dev, "custom program done timeout\n");
-++		writew(0, snfi->regs + NFI_INTR_EN);
-++		ret = -ETIMEDOUT;
-++		goto ecc_disable;
-++	}
-++
-++	ret = readl_poll_timeout_atomic(snfi->regs + NFI_ADDRCNTR, reg,
-++					ADDRCNTR_SEC(reg) >= sectors,
-++					10, MTK_TIMEOUT);
-++	if (ret)
-++		dev_err(snfi->dev, "hwecc write timeout\n");
-++
-++ecc_disable:
-++	mtk_ecc_disable(snfi->ecc);
-++
-++out:
-++	dma_unmap_single(snfi->dev, dma_addr, len, DMA_TO_DEVICE);
-++	writel(0, snfi->regs + NFI_CON);
-++	writel(0, snfi->regs + NFI_CNFG);
-++	reg = readl(snfi->regs + SNFI_MISC_CTL);
-++	reg &= ~WR_CUSTOM_EN;
-++	writel(reg, snfi->regs + SNFI_MISC_CTL);
-++
-++	return ret;
-++}
-++
-++static int mtk_snfi_read(struct spi_mem *mem,
-++			 const struct spi_mem_op *op)
-++{
-++	struct spinand_device *spinand = spi_mem_get_drvdata(mem);
-++	struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master);
-++	struct mtd_info *mtd = spinand_to_mtd(spinand);
-++	struct mtk_snfi_nand_chip *snfi_nand = &snfi->snfi_nand;
-++	u32 col_addr = op->addr.val;
-++	int i, ret, sectors, oob_on = false;
-++
-++	if (col_addr == mtd->writesize)
-++		oob_on = true;
-++
-++	ret = mtk_snfi_read_from_cache(mem, op, oob_on);
-++	if (ret) {
-++		dev_warn(snfi->dev, "read from cache fail\n");
-++		return ret;
-++	}
-++
-++	sectors = mtd->writesize / snfi->caps->nand_sec_size;
-++	for (i = 0; i < sectors; i++) {
-++		if (oob_on)
-++			memcpy(oob_ptr(mem, i),
-++			       mtk_oob_ptr(mem, snfi->buffer, i),
-++			       snfi->caps->nand_fdm_size);
-++
-++		if (i == snfi_nand->bad_mark.sec && snfi->caps->bad_mark_swap)
-++			snfi_nand->bad_mark.bm_swap(mem, snfi->buffer,
-++							oob_on);
-++	}
-++
-++	if (!oob_on)
-++		memcpy(spinand->databuf, snfi->buffer, mtd->writesize);
-++
-++	return ret;
-++}
-++
-++static int mtk_snfi_write(struct spi_mem *mem,
-++			  const struct spi_mem_op *op)
-++{
-++	struct spinand_device *spinand = spi_mem_get_drvdata(mem);
-++	struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master);
-++	struct mtd_info *mtd = spinand_to_mtd(spinand);
-++	struct mtk_snfi_nand_chip *snfi_nand = &snfi->snfi_nand;
-++	u32 ret, i, sectors, col_addr = op->addr.val;
-++	int oob_on = false;
-++
-++	if (col_addr == mtd->writesize)
-++		oob_on = true;
-++
-++	sectors = mtd->writesize / snfi->caps->nand_sec_size;
-++	memset(snfi->buffer, 0xff, mtd->writesize + mtd->oobsize);
-++
-++	if (!oob_on)
-++		memcpy(snfi->buffer, spinand->databuf, mtd->writesize);
-++
-++	for (i = 0; i < sectors; i++) {
-++		if (i == snfi_nand->bad_mark.sec && snfi->caps->bad_mark_swap)
-++			snfi_nand->bad_mark.bm_swap(mem, snfi->buffer, oob_on);
-++
-++		if (oob_on)
-++			memcpy(mtk_oob_ptr(mem, snfi->buffer, i),
-++			       oob_ptr(mem, i),
-++			       snfi->caps->nand_fdm_size);
-++	}
-++
-++	ret = mtk_snfi_write_to_cache(mem, op, oob_on);
-++	if (ret)
-++		dev_warn(snfi->dev, "write to cache fail\n");
-++
-++	return ret;
-++}
-++
-++static int mtk_snfi_command_exec(struct mtk_snfi *snfi,
-++				 const u8 *txbuf, u8 *rxbuf,
-++				 const u32 txlen, const u32 rxlen)
-++{
-++	u32 tmp, i, j, reg, m;
-++	u8 *p_tmp = (u8 *)(&tmp);
-++	int ret = 0;
-++
-++	/* Moving tx data to NFI_SPI GPRAM */
-++	for (i = 0, m = 0; i < txlen; ) {
-++		for (j = 0, tmp = 0; i < txlen && j < 4; i++, j++)
-++			p_tmp[j] = txbuf[i];
-++
-++		writel(tmp, snfi->regs + SNFI_GPRAM_DATA + m);
-++		m += 4;
-++	}
-++
-++	writel(txlen, snfi->regs + SNFI_MAC_OUTL);
-++	writel(rxlen, snfi->regs + SNFI_MAC_INL);
-++	ret = mtk_snfi_mac_op(snfi);
-++	if (ret)
-++		return ret;
-++
-++	/* For NULL input data, this loop will be skipped */
-++	if (rxlen)
-++		for (i = 0, m = 0; i < rxlen; ) {
-++			reg = readl(snfi->regs +
-++					    SNFI_GPRAM_DATA + m);
-++			for (j = 0; i < rxlen && j < 4; i++, j++, rxbuf++) {
-++				if (m == 0 && i == 0)
-++					j = i + txlen;
-++				*rxbuf = (reg >> (j * 8)) & 0xFF;
-++			}
-++			m += 4;
-++		}
-++
-++	return ret;
-++}
-++
-++/*
-++ * mtk_snfi_exec_op - to process command/data to send to the
-++ * SPI NAND by mtk controller
-++ */
-++static int mtk_snfi_exec_op(struct spi_mem *mem,
-++			    const struct spi_mem_op *op)
-++
-++{
-++	struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master);
-++	struct spinand_device *spinand = spi_mem_get_drvdata(mem);
-++	struct mtd_info *mtd = spinand_to_mtd(spinand);
-++	struct nand_device *nand = mtd_to_nanddev(mtd);
-++	const struct spi_mem_op *read_cache;
-++	const struct spi_mem_op *write_cache;
-++	const struct spi_mem_op *update_cache;
-++	u32 tmpbufsize, txlen = 0, rxlen = 0;
-++	u8 *txbuf, *rxbuf = NULL, *buf;
-++	int i, ret = 0;
-++	
-++	ret = mtk_snfi_reset(snfi);
-++	if (ret) {
-++		dev_warn(snfi->dev, "reset spi memory controller fail\n");
-++		return ret;
-++	}
-++
-++	/*if bbt initial, framework have detect nand information */
-++	if (nand->bbt.cache) {
-++		read_cache = spinand->op_templates.read_cache;
-++		write_cache = spinand->op_templates.write_cache;
-++		update_cache = spinand->op_templates.update_cache;
-++
-++		ret = mtk_snfi_hw_runtime_config(mem);
-++		if (ret)
-++			return ret;
-++
-++		/* For Read/Write with cache, Erase use framework flow */
-++		if (op->cmd.opcode == read_cache->cmd.opcode) {
-++			ret = mtk_snfi_read(mem, op);
-++			if (ret)
-++				dev_warn(snfi->dev, "snfi read fail\n");
-++			
-++			return ret;
-++		} else if ((op->cmd.opcode == write_cache->cmd.opcode)
-++			       	|| (op->cmd.opcode == update_cache->cmd.opcode)) {
-++			ret = mtk_snfi_write(mem, op);
-++			if (ret)
-++				dev_warn(snfi->dev, "snfi write fail\n");
-++			
-++			return ret;
-++		}
-++	}
-++
-++	tmpbufsize = sizeof(op->cmd.opcode) + op->addr.nbytes +
-++		     op->dummy.nbytes + op->data.nbytes;
-++
-++	txbuf = kzalloc(tmpbufsize, GFP_KERNEL);
-++	if (!txbuf)
-++		return -ENOMEM;
-++
-++	txbuf[txlen++] = op->cmd.opcode;
-++
-++	if (op->addr.nbytes)
-++		for (i = 0; i < op->addr.nbytes; i++)
-++			txbuf[txlen++] = op->addr.val >>
-++					(8 * (op->addr.nbytes - i - 1));
-++
-++	txlen += op->dummy.nbytes;
-++
-++	if (op->data.dir == SPI_MEM_DATA_OUT)
-++		for (i = 0; i < op->data.nbytes; i++) {
-++			buf = (u8 *)op->data.buf.out;
-++			txbuf[txlen++] = buf[i];
-++		}
-++
-++	if (op->data.dir == SPI_MEM_DATA_IN) {
-++		rxbuf = (u8 *)op->data.buf.in;
-++		rxlen += op->data.nbytes;
-++	}
-++
-++	ret = mtk_snfi_command_exec(snfi, txbuf, rxbuf, txlen, rxlen);
-++	kfree(txbuf);
-++
-++	return ret;
-++}
-++
-++static int mtk_snfi_init(struct mtk_snfi *snfi)
-++{
-++	int ret;
-++
-++	/* Reset the state machine and data FIFO */
-++	ret = mtk_snfi_reset(snfi);
-++	if (ret) {
-++		dev_warn(snfi->dev, "MTK reset controller fail\n");
-++		return ret;
-++	}
-++
-++	snfi->buffer = devm_kzalloc(snfi->dev, 4096 + 256, GFP_KERNEL);
-++	if (!snfi->buffer)
-++		return  -ENOMEM;
-++
-++	/* Clear interrupt, read clear. */
-++	readw(snfi->regs + NFI_INTR_STA);
-++	writew(0, snfi->regs + NFI_INTR_EN);
-++
-++	writel(0, snfi->regs + NFI_CON);
-++	writel(0, snfi->regs + NFI_CNFG);
-++
-++	/* Change to NFI_SPI mode. */
-++	writel(SNFI_MODE_EN, snfi->regs + SNFI_CNFG);
-++
-++	return 0;
-++}
-++
-++static int mtk_snfi_check_buswidth(u8 width)
-++{
-++	switch (width) {
-++	case 1:
-++	case 2:
-++	case 4:
-++		return 0;
-++
-++	default:
-++		break;
-++	}
-++
-++	return -ENOTSUPP;
-++}
-++
-++static bool mtk_snfi_supports_op(struct spi_mem *mem,
-++				 const struct spi_mem_op *op)
-++{
-++	int ret = 0;
-++
-++	/* For MTK Spi Nand controller, cmd buswidth just support 1 bit*/
-++	if (op->cmd.buswidth != 1)
-++		ret = -ENOTSUPP;
-++
-++	if (op->addr.nbytes)
-++		ret |= mtk_snfi_check_buswidth(op->addr.buswidth);
-++
-++	if (op->dummy.nbytes)
-++		ret |= mtk_snfi_check_buswidth(op->dummy.buswidth);
-++
-++	if (op->data.nbytes)
-++		ret |= mtk_snfi_check_buswidth(op->data.buswidth);
-++
-++	if (ret)
-++		return false;
-++
-++	return true;
-++}
-++
-++static const struct spi_controller_mem_ops mtk_snfi_ops = {
-++	.supports_op = mtk_snfi_supports_op,
-++	.exec_op = mtk_snfi_exec_op,
-++};
-++
-++static const struct mtk_snfi_caps snfi_mt7622 = {
-++	.spare_size = spare_size_mt7622,
-++	.num_spare_size = 4,
-++	.nand_sec_size = 512,
-++	.nand_fdm_size = 8,
-++	.nand_fdm_ecc_size = 1,
-++	.ecc_parity_bits = 13,
-++	.pageformat_spare_shift = 4,
-++	.bad_mark_swap = 0,
-++};
-++
-++static const struct mtk_snfi_caps snfi_mt7629 = {
-++	.spare_size = spare_size_mt7622,
-++	.num_spare_size = 4,
-++	.nand_sec_size = 512,
-++	.nand_fdm_size = 8,
-++	.nand_fdm_ecc_size = 1,
-++	.ecc_parity_bits = 13,
-++	.pageformat_spare_shift = 4,
-++	.bad_mark_swap = 1,
-++};
-++
-++static const struct of_device_id mtk_snfi_id_table[] = {
-++	{ .compatible = "mediatek,mt7622-snfi", .data = &snfi_mt7622, },
-++	{ .compatible = "mediatek,mt7629-snfi", .data = &snfi_mt7629, },
-++	{  /* sentinel */ }
-++};
-++
-++static int mtk_snfi_probe(struct platform_device *pdev)
-++{
-++	struct device *dev = &pdev->dev;
-++	struct device_node *np = dev->of_node;
-++	struct spi_controller *ctlr;
-++	struct mtk_snfi *snfi;
-++	struct resource *res;
-++	int ret = 0, irq;
-++
-++	ctlr = spi_alloc_master(&pdev->dev, sizeof(*snfi));
-++	if (!ctlr)
-++		return -ENOMEM;
-++
-++	snfi = spi_controller_get_devdata(ctlr);
-++	snfi->caps = of_device_get_match_data(dev);
-++	snfi->dev = dev;
-++
-++	snfi->ecc = of_mtk_ecc_get(np);
-++	if (IS_ERR_OR_NULL(snfi->ecc))
-++		goto err_put_master;
-++
-++	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-++	snfi->regs = devm_ioremap_resource(dev, res);
-++	if (IS_ERR(snfi->regs)) {
-++		ret = PTR_ERR(snfi->regs);
-++		goto release_ecc;
-++	}
-++
-++	/* find the clocks */
-++	snfi->clk.nfi_clk = devm_clk_get(dev, "nfi_clk");
-++	if (IS_ERR(snfi->clk.nfi_clk)) {
-++		dev_err(dev, "no nfi clk\n");
-++		ret = PTR_ERR(snfi->clk.nfi_clk);
-++		goto release_ecc;
-++	}
-++
-++	snfi->clk.spi_clk = devm_clk_get(dev, "spi_clk");
-++	if (IS_ERR(snfi->clk.spi_clk)) {
-++		dev_err(dev, "no spi clk\n");
-++		ret = PTR_ERR(snfi->clk.spi_clk);
-++		goto release_ecc;
-++	}
-++
-++	ret = mtk_snfi_enable_clk(dev, &snfi->clk);
-++	if (ret)
-++		goto release_ecc;
-++
-++	/* find the irq */
-++	irq = platform_get_irq(pdev, 0);
-++	if (irq < 0) {
-++		dev_err(dev, "no snfi irq resource\n");
-++		ret = -EINVAL;
-++		goto clk_disable;
-++	}
-++
-++	ret = devm_request_irq(dev, irq, mtk_snfi_irq, 0, "mtk-snfi", snfi);
-++	if (ret) {
-++		dev_err(dev, "failed to request snfi irq\n");
-++		goto clk_disable;
-++	}
-++
-++	ret = dma_set_mask(dev, DMA_BIT_MASK(32));
-++	if (ret) {
-++		dev_err(dev, "failed to set dma mask\n");
-++		goto clk_disable;
-++	}
-++
-++	ctlr->dev.of_node = np;
-++	ctlr->mem_ops = &mtk_snfi_ops;
-++
-++	platform_set_drvdata(pdev, snfi);
-++	ret = mtk_snfi_init(snfi);
-++	if (ret) {
-++		dev_err(dev, "failed to init snfi\n");
-++		goto clk_disable;
-++	}
-++
-++	ret = devm_spi_register_master(dev, ctlr);
-++	if (ret)
-++		goto clk_disable;
-++
-++	return 0;
-++
-++clk_disable:
-++	mtk_snfi_disable_clk(&snfi->clk);
-++
-++release_ecc:
-++	mtk_ecc_release(snfi->ecc);
-++
-++err_put_master:
-++	spi_master_put(ctlr);
-++
-++	dev_err(dev, "MediaTek SPI NAND interface probe failed %d\n", ret);
-++	return ret;
-++}
-++
-++static int mtk_snfi_remove(struct platform_device *pdev)
-++{
-++	struct mtk_snfi *snfi = platform_get_drvdata(pdev);
-++
-++	mtk_snfi_disable_clk(&snfi->clk);
-++
-++	return 0;
-++}
-++
-++static int mtk_snfi_suspend(struct platform_device *pdev, pm_message_t state)
-++{
-++	struct mtk_snfi *snfi = platform_get_drvdata(pdev);
-++
-++	mtk_snfi_disable_clk(&snfi->clk);
-++
-++	return 0;
-++}
-++
-++static int mtk_snfi_resume(struct platform_device *pdev)
-++{
-++	struct device *dev = &pdev->dev;
-++	struct mtk_snfi *snfi = dev_get_drvdata(dev);
-++	int ret;
-++
-++	ret = mtk_snfi_enable_clk(dev, &snfi->clk);
-++	if (ret)
-++		return ret;
-++
-++	ret = mtk_snfi_init(snfi);
-++	if (ret)
-++		dev_err(dev, "failed to init snfi controller\n");
-++
-++	return ret;
-++}
-++
-++static struct platform_driver mtk_snfi_driver = {
-++	.driver = {
-++		.name	= "mtk-snfi",
-++		.of_match_table = mtk_snfi_id_table,
-++	},
-++	.probe		= mtk_snfi_probe,
-++	.remove		= mtk_snfi_remove,
-++	.suspend	= mtk_snfi_suspend,
-++	.resume		= mtk_snfi_resume,
-++};
-++
-++module_platform_driver(mtk_snfi_driver);
-++
-++MODULE_LICENSE("GPL v2");
-++MODULE_AUTHOR("Xiangsheng Hou <xiangsheng.hou@mediatek.com>");
-++MODULE_DESCRIPTION("Mediatek SPI Memory Interface Driver");
-diff --git a/target/linux/mediatek/patches-5.10/330-mtk-bmt-support.patch b/target/linux/mediatek/patches-5.10/330-mtk-bmt-support.patch
-new file mode 100644
-index 0000000000..504c602c50
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/330-mtk-bmt-support.patch
-@@ -0,0 +1,855 @@
-+--- a/drivers/mtd/nand/Kconfig
-++++ b/drivers/mtd/nand/Kconfig
-+@@ -15,6 +15,10 @@ config MTD_NAND_ECC
-+        bool
-+        depends on MTD_NAND_CORE
-+ 
-++config MTD_NAND_MTK_BMT
-++	bool "Support MediaTek NAND Bad-block Management Table"
-++	default n
-++
-+ endmenu
-+ 
-+ endmenu
-+--- a/drivers/mtd/nand/Makefile
-++++ b/drivers/mtd/nand/Makefile
-+@@ -2,6 +2,7 @@
-+ 
-+ nandcore-objs := core.o bbt.o
-+ obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
-++obj-$(CONFIG_MTD_NAND_MTK_BMT)	+= mtk_bmt.o
-+ 
-+ obj-y	+= onenand/
-+ obj-y	+= raw/
-+--- /dev/null
-++++ b/drivers/mtd/nand/mtk_bmt.c
-+@@ -0,0 +1,781 @@
-++/*
-++ * Copyright (c) 2017 MediaTek Inc.
-++ * Author: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
-++ * Copyright (c) 2020 Felix Fietkau <nbd@nbd.name>
-++ *
-++ * This program is free software; you can redistribute it and/or modify
-++ * it under the terms of the GNU General Public License version 2 as
-++ * published by the Free Software Foundation.
-++ *
-++ * This program is distributed in the hope that it will be useful,
-++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-++ * GNU General Public License for more details.
-++ */
-++
-++#include <linux/slab.h>
-++#include <linux/gfp.h>
-++#include <linux/kernel.h>
-++#include <linux/of.h>
-++#include <linux/mtd/nand.h>
-++#include <linux/mtd/partitions.h>
-++#include <linux/mtd/mtk_bmt.h>
-++#include <linux/module.h>
-++#include <linux/debugfs.h>
-++
-++#define MAIN_SIGNATURE_OFFSET   0
-++#define OOB_SIGNATURE_OFFSET    1
-++#define BBPOOL_RATIO		2
-++
-++#define BBT_LOG(fmt, ...) pr_debug("[BBT][%s|%d] "fmt"\n", __func__, __LINE__, ##__VA_ARGS__)
-++
-++/* Maximum 8k blocks */
-++#define BB_TABLE_MAX	bmtd.table_size
-++#define BMT_TABLE_MAX	(BB_TABLE_MAX * BBPOOL_RATIO / 100)
-++#define BMT_TBL_DEF_VAL	0x0
-++
-++/*
-++ * Burner Bad Block Table
-++ * --------- Only support SLC Nand Chips!!!!!!!!!!! ----------
-++ */
-++
-++struct bbbt {
-++	char signature[3];
-++	/* This version is used to distinguish the legacy and new algorithm */
-++#define BBMT_VERSION		2
-++	unsigned char version;
-++	/* Below 2 tables will be written in SLC */
-++	u16 bb_tbl[];
-++};
-++
-++struct bbmt {
-++	u16 block;
-++#define NO_MAPPED		0
-++#define NORMAL_MAPPED	1
-++#define BMT_MAPPED		2
-++	u16 mapped;
-++};
-++
-++static struct bmt_desc {
-++	struct mtd_info *mtd;
-++
-++	int (*_read_oob) (struct mtd_info *mtd, loff_t from,
-++			  struct mtd_oob_ops *ops);
-++	int (*_write_oob) (struct mtd_info *mtd, loff_t to,
-++			   struct mtd_oob_ops *ops);
-++	const struct nand_ops *nand_ops;
-++
-++	struct bbbt *bbt;
-++
-++	struct dentry *debugfs_dir;
-++
-++	u32 table_size;
-++	u32 pg_size;
-++	u32 blk_size;
-++	u16 pg_shift;
-++	u16 blk_shift;
-++	/* bbt logical address */
-++	u16 pool_lba;
-++	/* bbt physical address */
-++	u16 pool_pba;
-++	/* Maximum count of bad blocks that the vendor guaranteed */
-++	u16 bb_max;
-++	/* Total blocks of the Nand Chip */
-++	u16 total_blks;
-++	/* The block(n) BMT is located at (bmt_tbl[n]) */
-++	u16 bmt_blk_idx;
-++	/* How many pages needs to store 'struct bbbt' */
-++	u32 bmt_pgs;
-++
-++	/* to compensate for driver level remapping */
-++	u8 oob_offset;
-++} bmtd = {0};
-++
-++static unsigned char *nand_bbt_buf;
-++static unsigned char *nand_data_buf;
-++
-++/* -------- Unit conversions -------- */
-++static inline u32 blk_pg(u16 block)
-++{
-++	return (u32)(block << (bmtd.blk_shift - bmtd.pg_shift));
-++}
-++
-++/* -------- Nand operations wrapper -------- */
-++static inline int
-++bbt_nand_read(u32 page, unsigned char *dat, int dat_len,
-++	      unsigned char *fdm, int fdm_len)
-++{
-++	struct mtd_oob_ops ops = {
-++		.mode = MTD_OPS_PLACE_OOB,
-++		.ooboffs = bmtd.oob_offset,
-++		.oobbuf = fdm,
-++		.ooblen = fdm_len,
-++		.datbuf = dat,
-++		.len = dat_len,
-++	};
-++
-++	return bmtd._read_oob(bmtd.mtd, page << bmtd.pg_shift, &ops);
-++}
-++
-++static inline int bbt_nand_erase(u16 block)
-++{
-++	struct nand_device *nand = mtd_to_nanddev(bmtd.mtd);
-++	loff_t addr = (loff_t)block << bmtd.blk_shift;
-++	struct nand_pos pos;
-++
-++	nanddev_offs_to_pos(nand, addr, &pos);
-++	return bmtd.nand_ops->erase(nand, &pos);
-++}
-++
-++/* -------- Bad Blocks Management -------- */
-++static inline struct bbmt *bmt_tbl(struct bbbt *bbbt)
-++{
-++	return (struct bbmt *)&bbbt->bb_tbl[bmtd.table_size];
-++}
-++
-++static int
-++read_bmt(u16 block, unsigned char *dat, unsigned char *fdm, int fdm_len)
-++{
-++	u32 len = bmtd.bmt_pgs << bmtd.pg_shift;
-++
-++	return bbt_nand_read(blk_pg(block), dat, len, fdm, fdm_len);
-++}
-++
-++static int write_bmt(u16 block, unsigned char *dat)
-++{
-++	struct mtd_oob_ops ops = {
-++		.mode = MTD_OPS_PLACE_OOB,
-++		.ooboffs = OOB_SIGNATURE_OFFSET + bmtd.oob_offset,
-++		.oobbuf = "bmt",
-++		.ooblen = 3,
-++		.datbuf = dat,
-++		.len = bmtd.bmt_pgs << bmtd.pg_shift,
-++	};
-++	loff_t addr = (loff_t)block << bmtd.blk_shift;
-++
-++	return bmtd._write_oob(bmtd.mtd, addr, &ops);
-++}
-++
-++static u16 find_valid_block(u16 block)
-++{
-++	u8 fdm[4];
-++	int ret;
-++	int loop = 0;
-++
-++retry:
-++	if (block >= bmtd.total_blks)
-++		return 0;
-++
-++	ret = bbt_nand_read(blk_pg(block), nand_data_buf, bmtd.pg_size,
-++			    fdm, sizeof(fdm));
-++	/* Read the 1st byte of FDM to judge whether it's a bad
-++	 * or not
-++	 */
-++	if (ret || fdm[0] != 0xff) {
-++		pr_info("nand: found bad block 0x%x\n", block);
-++		if (loop >= bmtd.bb_max) {
-++			pr_info("nand: FATAL ERR: too many bad blocks!!\n");
-++			return 0;
-++		}
-++
-++		loop++;
-++		block++;
-++		goto retry;
-++	}
-++
-++	return block;
-++}
-++
-++/* Find out all bad blocks, and fill in the mapping table */
-++static int scan_bad_blocks(struct bbbt *bbt)
-++{
-++	int i;
-++	u16 block = 0;
-++
-++	/* First time download, the block0 MUST NOT be a bad block,
-++	 * this is guaranteed by vendor
-++	 */
-++	bbt->bb_tbl[0] = 0;
-++
-++	/*
-++	 * Construct the mapping table of Normal data area(non-PMT/BMTPOOL)
-++	 * G - Good block; B - Bad block
-++	 *			---------------------------
-++	 * physical |G|G|B|G|B|B|G|G|G|G|B|G|B|
-++	 *			---------------------------
-++	 * What bb_tbl[i] looks like:
-++	 *   physical block(i):
-++	 *			 0 1 2 3 4 5 6 7 8 9 a b c
-++	 *   mapped block(bb_tbl[i]):
-++	 *			 0 1 3 6 7 8 9 b ......
-++	 * ATTENTION:
-++	 *		If new bad block ocurred(n), search bmt_tbl to find
-++	 *		a available block(x), and fill in the bb_tbl[n] = x;
-++	 */
-++	for (i = 1; i < bmtd.pool_lba; i++) {
-++		bbt->bb_tbl[i] = find_valid_block(bbt->bb_tbl[i - 1] + 1);
-++		BBT_LOG("bb_tbl[0x%x] = 0x%x", i, bbt->bb_tbl[i]);
-++		if (bbt->bb_tbl[i] == 0)
-++			return -1;
-++	}
-++
-++	/* Physical Block start Address of BMT pool */
-++	bmtd.pool_pba = bbt->bb_tbl[i - 1] + 1;
-++	if (bmtd.pool_pba >= bmtd.total_blks - 2) {
-++		pr_info("nand: FATAL ERR: Too many bad blocks!!\n");
-++		return -1;
-++	}
-++
-++	BBT_LOG("pool_pba=0x%x", bmtd.pool_pba);
-++	i = 0;
-++	block = bmtd.pool_pba;
-++	/*
-++	 * The bmt table is used for runtime bad block mapping
-++	 * G - Good block; B - Bad block
-++	 *			---------------------------
-++	 * physical |G|G|B|G|B|B|G|G|G|G|B|G|B|
-++	 *			---------------------------
-++	 *   block:	 0 1 2 3 4 5 6 7 8 9 a b c
-++	 * What bmt_tbl[i] looks like in initial state:
-++	 *   i:
-++	 *			 0 1 2 3 4 5 6 7
-++	 *   bmt_tbl[i].block:
-++	 *			 0 1 3 6 7 8 9 b
-++	 *   bmt_tbl[i].mapped:
-++	 *			 N N N N N N N B
-++	 *		N - Not mapped(Available)
-++	 *		M - Mapped
-++	 *		B - BMT
-++	 * ATTENTION:
-++	 *		BMT always in the last valid block in pool
-++	 */
-++	while ((block = find_valid_block(block)) != 0) {
-++		bmt_tbl(bbt)[i].block = block;
-++		bmt_tbl(bbt)[i].mapped = NO_MAPPED;
-++		BBT_LOG("bmt_tbl[%d].block = 0x%x", i, block);
-++		block++;
-++		i++;
-++	}
-++
-++	/* i - How many available blocks in pool, which is the length of bmt_tbl[]
-++	 * bmtd.bmt_blk_idx - bmt_tbl[bmtd.bmt_blk_idx].block => the BMT block
-++	 */
-++	bmtd.bmt_blk_idx = i - 1;
-++	bmt_tbl(bbt)[bmtd.bmt_blk_idx].mapped = BMT_MAPPED;
-++
-++	if (i < 1) {
-++		pr_info("nand: FATAL ERR: no space to store BMT!!\n");
-++		return -1;
-++	}
-++
-++	pr_info("[BBT] %d available blocks in BMT pool\n", i);
-++
-++	return 0;
-++}
-++
-++static bool is_valid_bmt(unsigned char *buf, unsigned char *fdm)
-++{
-++	struct bbbt *bbt = (struct bbbt *)buf;
-++	u8 *sig = (u8*)bbt->signature + MAIN_SIGNATURE_OFFSET;
-++
-++
-++	if (memcmp(bbt->signature + MAIN_SIGNATURE_OFFSET, "BMT", 3) == 0 &&
-++		memcmp(fdm + OOB_SIGNATURE_OFFSET, "bmt", 3) == 0) {
-++		if (bbt->version == BBMT_VERSION)
-++			return true;
-++	}
-++	BBT_LOG("[BBT] BMT Version not match,upgrage preloader and uboot please! sig=%02x%02x%02x, fdm=%02x%02x%02x",
-++		sig[0], sig[1], sig[2],
-++		fdm[1], fdm[2], fdm[3]);
-++	return false;
-++}
-++
-++static u16 get_bmt_index(struct bbmt *bmt)
-++{
-++	int i = 0;
-++
-++	while (bmt[i].block != BMT_TBL_DEF_VAL) {
-++		if (bmt[i].mapped == BMT_MAPPED)
-++			return i;
-++		i++;
-++	}
-++	return 0;
-++}
-++
-++static struct bbbt *scan_bmt(u16 block)
-++{
-++	u8 fdm[4];
-++
-++	if (block < bmtd.pool_lba)
-++		return NULL;
-++
-++	if (read_bmt(block, nand_bbt_buf, fdm, sizeof(fdm)))
-++		return scan_bmt(block - 1);
-++
-++	if (is_valid_bmt(nand_bbt_buf, fdm)) {
-++		bmtd.bmt_blk_idx = get_bmt_index(bmt_tbl((struct bbbt *)nand_bbt_buf));
-++		if (bmtd.bmt_blk_idx == 0) {
-++			pr_info("[BBT] FATAL ERR: bmt block index is wrong!\n");
-++			return NULL;
-++		}
-++		pr_info("[BBT] BMT.v2 is found at 0x%x\n", block);
-++		return (struct bbbt *)nand_bbt_buf;
-++	} else
-++		return scan_bmt(block - 1);
-++}
-++
-++/* Write the Burner Bad Block Table to Nand Flash
-++ * n - write BMT to bmt_tbl[n]
-++ */
-++static u16 upload_bmt(struct bbbt *bbt, int n)
-++{
-++	u16 block;
-++
-++retry:
-++	if (n < 0 || bmt_tbl(bbt)[n].mapped == NORMAL_MAPPED) {
-++		pr_info("nand: FATAL ERR: no space to store BMT!\n");
-++		return (u16)-1;
-++	}
-++
-++	block = bmt_tbl(bbt)[n].block;
-++	BBT_LOG("n = 0x%x, block = 0x%x", n, block);
-++	if (bbt_nand_erase(block)) {
-++		bmt_tbl(bbt)[n].block = 0;
-++		/* erase failed, try the previous block: bmt_tbl[n - 1].block */
-++		n--;
-++		goto retry;
-++	}
-++
-++	/* The signature offset is fixed set to 0,
-++	 * oob signature offset is fixed set to 1
-++	 */
-++	memcpy(bbt->signature + MAIN_SIGNATURE_OFFSET, "BMT", 3);
-++	bbt->version = BBMT_VERSION;
-++
-++	if (write_bmt(block, (unsigned char *)bbt)) {
-++		bmt_tbl(bbt)[n].block = 0;
-++
-++		/* write failed, try the previous block in bmt_tbl[n - 1] */
-++		n--;
-++		goto retry;
-++	}
-++
-++	/* Return the current index(n) of BMT pool (bmt_tbl[n]) */
-++	return n;
-++}
-++
-++static u16 find_valid_block_in_pool(struct bbbt *bbt)
-++{
-++	int i;
-++
-++	if (bmtd.bmt_blk_idx == 0)
-++		goto error;
-++
-++	for (i = 0; i < bmtd.bmt_blk_idx; i++) {
-++		if (bmt_tbl(bbt)[i].block != 0 && bmt_tbl(bbt)[i].mapped == NO_MAPPED) {
-++			bmt_tbl(bbt)[i].mapped = NORMAL_MAPPED;
-++			return bmt_tbl(bbt)[i].block;
-++		}
-++	}
-++
-++error:
-++	pr_info("nand: FATAL ERR: BMT pool is run out!\n");
-++	return 0;
-++}
-++
-++/* We met a bad block, mark it as bad and map it to a valid block in pool,
-++ * if it's a write failure, we need to write the data to mapped block
-++ */
-++static bool update_bmt(u16 block)
-++{
-++	u16 mapped_blk;
-++	struct bbbt *bbt;
-++
-++	bbt = bmtd.bbt;
-++	mapped_blk = find_valid_block_in_pool(bbt);
-++	if (mapped_blk == 0)
-++		return false;
-++
-++	/* Map new bad block to available block in pool */
-++	bbt->bb_tbl[block] = mapped_blk;
-++	bmtd.bmt_blk_idx = upload_bmt(bbt, bmtd.bmt_blk_idx);
-++
-++	return true;
-++}
-++
-++u16 get_mapping_block_index(int block)
-++{
-++	int mapping_block;
-++
-++	if (block < bmtd.pool_lba)
-++		mapping_block = bmtd.bbt->bb_tbl[block];
-++	else
-++		mapping_block = block;
-++	BBT_LOG("0x%x mapped to 0x%x", block, mapping_block);
-++
-++	return mapping_block;
-++}
-++
-++static int
-++mtk_bmt_read(struct mtd_info *mtd, loff_t from,
-++	     struct mtd_oob_ops *ops)
-++{
-++	struct mtd_oob_ops cur_ops = *ops;
-++	int retry_count = 0;
-++	loff_t cur_from;
-++	int ret;
-++
-++	ops->retlen = 0;
-++	ops->oobretlen = 0;
-++
-++	while (ops->retlen < ops->len || ops->oobretlen < ops->ooblen) {
-++		u32 offset = from & (bmtd.blk_size - 1);
-++		u32 block = from >> bmtd.blk_shift;
-++		u32 cur_block;
-++
-++		cur_block = get_mapping_block_index(block);
-++		cur_from = ((loff_t)cur_block << bmtd.blk_shift) + offset;
-++
-++		cur_ops.oobretlen = 0;
-++		cur_ops.retlen = 0;
-++		cur_ops.len = min_t(u32, mtd->erasesize - offset,
-++					 ops->len - ops->retlen);
-++		ret = bmtd._read_oob(mtd, cur_from, &cur_ops);
-++		if (ret < 0) {
-++			update_bmt(block);
-++			if (retry_count++ < 10)
-++				continue;
-++
-++			return ret;
-++		}
-++
-++		ops->retlen += cur_ops.retlen;
-++		ops->oobretlen += cur_ops.oobretlen;
-++
-++		cur_ops.ooboffs = 0;
-++		cur_ops.datbuf += cur_ops.retlen;
-++		cur_ops.oobbuf += cur_ops.oobretlen;
-++		cur_ops.ooblen -= cur_ops.oobretlen;
-++
-++		if (!cur_ops.len)
-++			cur_ops.len = mtd->erasesize - offset;
-++
-++		from += cur_ops.len;
-++		retry_count = 0;
-++	}
-++
-++	return 0;
-++}
-++
-++static int
-++mtk_bmt_write(struct mtd_info *mtd, loff_t to,
-++	      struct mtd_oob_ops *ops)
-++{
-++	struct mtd_oob_ops cur_ops = *ops;
-++	int retry_count = 0;
-++	loff_t cur_to;
-++	int ret;
-++
-++	ops->retlen = 0;
-++	ops->oobretlen = 0;
-++
-++	while (ops->retlen < ops->len || ops->oobretlen < ops->ooblen) {
-++		u32 offset = to & (bmtd.blk_size - 1);
-++		u32 block = to >> bmtd.blk_shift;
-++		u32 cur_block;
-++
-++		cur_block = get_mapping_block_index(block);
-++		cur_to = ((loff_t)cur_block << bmtd.blk_shift) + offset;
-++
-++		cur_ops.oobretlen = 0;
-++		cur_ops.retlen = 0;
-++		cur_ops.len = min_t(u32, bmtd.blk_size - offset,
-++					 ops->len - ops->retlen);
-++		ret = bmtd._write_oob(mtd, cur_to, &cur_ops);
-++		if (ret < 0) {
-++			update_bmt(block);
-++			if (retry_count++ < 10)
-++				continue;
-++
-++			return ret;
-++		}
-++
-++		ops->retlen += cur_ops.retlen;
-++		ops->oobretlen += cur_ops.oobretlen;
-++
-++		cur_ops.ooboffs = 0;
-++		cur_ops.datbuf += cur_ops.retlen;
-++		cur_ops.oobbuf += cur_ops.oobretlen;
-++		cur_ops.ooblen -= cur_ops.oobretlen;
-++
-++		if (!cur_ops.len)
-++			cur_ops.len = mtd->erasesize - offset;
-++
-++		to += cur_ops.len;
-++		retry_count = 0;
-++	}
-++
-++	return 0;
-++}
-++
-++
-++
-++static int
-++mtk_bmt_erase(struct nand_device *nand, const struct nand_pos *pos)
-++{
-++	struct nand_pos new_pos = *pos;
-++	int retry_count = 0;
-++	int ret;
-++
-++retry:
-++	new_pos.eraseblock = get_mapping_block_index(pos->eraseblock);
-++
-++	ret = bmtd.nand_ops->erase(nand, &new_pos);
-++	if (ret) {
-++		update_bmt(pos->eraseblock);
-++		if (retry_count++ < 10)
-++			goto retry;
-++	}
-++
-++	return ret;
-++}
-++
-++static bool
-++mtk_bmt_isbad(struct nand_device *nand, const struct nand_pos *pos)
-++{
-++	struct nand_pos new_pos = *pos;
-++	int retry_count = 0;
-++	bool ret;
-++
-++retry:
-++	new_pos.eraseblock = get_mapping_block_index(pos->eraseblock);
-++
-++	ret = bmtd.nand_ops->isbad(nand, &new_pos);
-++	if (ret) {
-++		update_bmt(pos->eraseblock);
-++		if (retry_count++ < 10)
-++			goto retry;
-++	}
-++
-++	return ret;
-++}
-++
-++static int
-++mtk_bmt_markbad(struct nand_device *nand, const struct nand_pos *pos)
-++{
-++	struct nand_pos new_pos = *pos;
-++
-++	new_pos.eraseblock = get_mapping_block_index(new_pos.eraseblock);
-++	update_bmt(pos->eraseblock);
-++
-++	return bmtd.nand_ops->markbad(nand, &new_pos);
-++}
-++
-++static void
-++mtk_bmt_replace_ops(struct mtd_info *mtd)
-++{
-++	static const struct nand_ops mtk_bmt_nand_ops = {
-++		.erase = mtk_bmt_erase,
-++		.isbad = mtk_bmt_isbad,
-++		.markbad = mtk_bmt_markbad,
-++	};
-++	struct nand_device *nand = mtd_to_nanddev(mtd);
-++
-++	bmtd.nand_ops = nand->ops;
-++	bmtd._read_oob = mtd->_read_oob;
-++	bmtd._write_oob = mtd->_write_oob;
-++
-++	mtd->_read_oob = mtk_bmt_read;
-++	mtd->_write_oob = mtk_bmt_write;
-++	nand->ops = &mtk_bmt_nand_ops;
-++}
-++
-++static int mtk_bmt_debug_mark_good(void *data, u64 val)
-++{
-++	u32 block = val >> bmtd.blk_shift;
-++
-++	bmtd.bbt->bb_tbl[block] = block;
-++	bmtd.bmt_blk_idx = upload_bmt(bmtd.bbt, bmtd.bmt_blk_idx);
-++
-++	return 0;
-++}
-++
-++static int mtk_bmt_debug_mark_bad(void *data, u64 val)
-++{
-++	u32 block = val >> bmtd.blk_shift;
-++
-++	update_bmt(block);
-++
-++	return 0;
-++}
-++
-++DEFINE_DEBUGFS_ATTRIBUTE(fops_mark_good, NULL, mtk_bmt_debug_mark_good, "%llu\n");
-++DEFINE_DEBUGFS_ATTRIBUTE(fops_mark_bad, NULL, mtk_bmt_debug_mark_bad, "%llu\n");
-++
-++static void
-++mtk_bmt_add_debugfs(void)
-++{
-++	struct dentry *dir;
-++
-++	dir = bmtd.debugfs_dir = debugfs_create_dir("mtk-bmt", NULL);
-++	if (!dir)
-++		return;
-++
-++	debugfs_create_file_unsafe("mark_good", S_IWUSR, dir, NULL, &fops_mark_good);
-++	debugfs_create_file_unsafe("mark_bad", S_IWUSR, dir, NULL, &fops_mark_bad);
-++}
-++
-++void mtk_bmt_detach(struct mtd_info *mtd)
-++{
-++	struct nand_device *nand = mtd_to_nanddev(mtd);
-++
-++	if (bmtd.mtd != mtd)
-++		return;
-++
-++	if (bmtd.debugfs_dir)
-++		debugfs_remove_recursive(bmtd.debugfs_dir);
-++	bmtd.debugfs_dir = NULL;
-++
-++	kfree(nand_bbt_buf);
-++	kfree(nand_data_buf);
-++
-++	mtd->_read_oob = bmtd._read_oob;
-++	mtd->_write_oob = bmtd._write_oob;
-++	mtd->size = bmtd.total_blks << bmtd.blk_shift;
-++	nand->ops = bmtd.nand_ops;
-++
-++	memset(&bmtd, 0, sizeof(bmtd));
-++}
-++
-++/* total_blocks - The total count of blocks that the Nand Chip has */
-++int mtk_bmt_attach(struct mtd_info *mtd)
-++{
-++	struct device_node *np;
-++	struct bbbt *bbt;
-++	u32 bufsz;
-++	u32 block;
-++	u16 total_blocks, pmt_block;
-++	int ret = 0;
-++	u32 bmt_pool_size, bmt_table_size;
-++
-++	if (bmtd.mtd)
-++		return -ENOSPC;
-++
-++	np = mtd_get_of_node(mtd);
-++	if (!np)
-++		return 0;
-++
-++	if (!of_property_read_bool(np, "mediatek,bmt-v2"))
-++		return 0;
-++
-++	if (of_property_read_u32(np, "mediatek,bmt-pool-size",
-++				 &bmt_pool_size) != 0)
-++		bmt_pool_size = 80;
-++
-++	if (of_property_read_u8(np, "mediatek,bmt-oob-offset",
-++				 &bmtd.oob_offset) != 0)
-++		bmtd.oob_offset = 8;
-++
-++	if (of_property_read_u32(np, "mediatek,bmt-table-size",
-++				 &bmt_table_size) != 0)
-++		bmt_table_size = 0x2000U;
-++
-++	bmtd.mtd = mtd;
-++	mtk_bmt_replace_ops(mtd);
-++
-++	bmtd.table_size = bmt_table_size;
-++	bmtd.blk_size = mtd->erasesize;
-++	bmtd.blk_shift = ffs(bmtd.blk_size) - 1;
-++	bmtd.pg_size = mtd->writesize;
-++	bmtd.pg_shift = ffs(bmtd.pg_size) - 1;
-++	total_blocks = mtd->size >> bmtd.blk_shift;
-++	pmt_block = total_blocks - bmt_pool_size - 2;
-++
-++	mtd->size = pmt_block << bmtd.blk_shift;
-++
-++	/*
-++	 *  ---------------------------------------
-++	 * | PMT(2blks) | BMT POOL(totalblks * 2%) |
-++	 *  ---------------------------------------
-++	 * ^            ^
-++	 * |            |
-++	 * pmt_block	pmt_block + 2blocks(pool_lba)
-++	 *
-++	 * ATTETION!!!!!!
-++	 *     The blocks ahead of the boundary block are stored in bb_tbl
-++	 *     and blocks behind are stored in bmt_tbl
-++	 */
-++
-++	bmtd.pool_lba = (u16)(pmt_block + 2);
-++	bmtd.total_blks = total_blocks;
-++	bmtd.bb_max = bmtd.total_blks * BBPOOL_RATIO / 100;
-++
-++	/* 3 buffers we need */
-++	bufsz = round_up(sizeof(struct bbbt) +
-++			 bmt_table_size * sizeof(struct bbmt), bmtd.pg_size);
-++	bmtd.bmt_pgs = bufsz >> bmtd.pg_shift;
-++
-++	nand_bbt_buf = kzalloc(bufsz, GFP_KERNEL);
-++	nand_data_buf = kzalloc(bmtd.pg_size, GFP_KERNEL);
-++
-++	if (!nand_bbt_buf || !nand_data_buf) {
-++		pr_info("nand: FATAL ERR: allocate buffer failed!\n");
-++		ret = -1;
-++		goto error;
-++	}
-++
-++	memset(nand_bbt_buf, 0xff, bufsz);
-++	memset(nand_data_buf, 0xff, bmtd.pg_size);
-++
-++	BBT_LOG("bbtbuf=0x%p(0x%x) dat=0x%p(0x%x)",
-++			nand_bbt_buf, bufsz, nand_data_buf, bmtd.pg_size);
-++	BBT_LOG("pool_lba=0x%x total_blks=0x%x bb_max=0x%x",
-++			bmtd.pool_lba, bmtd.total_blks, bmtd.bb_max);
-++
-++	/* Scanning start from the first page of the last block
-++	 * of whole flash
-++	 */
-++	bbt = scan_bmt(bmtd.total_blks - 1);
-++	if (!bbt) {
-++		/* BMT not found */
-++		if (bmtd.total_blks > BB_TABLE_MAX + BMT_TABLE_MAX) {
-++			pr_info("nand: FATAL: Too many blocks, can not support!\n");
-++			ret = -1;
-++			goto error;
-++		}
-++
-++		bbt = (struct bbbt *)nand_bbt_buf;
-++		memset(bmt_tbl(bbt), BMT_TBL_DEF_VAL, bmtd.table_size * sizeof(struct bbmt));
-++
-++		if (scan_bad_blocks(bbt)) {
-++			ret = -1;
-++			goto error;
-++		}
-++
-++		/* BMT always in the last valid block in pool */
-++		bmtd.bmt_blk_idx = upload_bmt(bbt, bmtd.bmt_blk_idx);
-++		block = bmt_tbl(bbt)[bmtd.bmt_blk_idx].block;
-++		pr_notice("[BBT] BMT.v2 is written into PBA:0x%x\n", block);
-++
-++		if (bmtd.bmt_blk_idx == 0)
-++			pr_info("nand: Warning: no available block in BMT pool!\n");
-++		else if (bmtd.bmt_blk_idx == (u16)-1) {
-++			ret = -1;
-++			goto error;
-++		}
-++	}
-++	mtk_bmt_add_debugfs();
-++
-++	bmtd.bbt = bbt;
-++	return 0;
-++
-++error:
-++	mtk_bmt_detach(mtd);
-++	return ret;
-++}
-++
-++
-++MODULE_LICENSE("GPL");
-++MODULE_AUTHOR("Xiangsheng Hou <xiangsheng.hou@mediatek.com>, Felix Fietkau <nbd@nbd.name>");
-++MODULE_DESCRIPTION("Bad Block mapping management v2 for MediaTek NAND Flash Driver");
-++
-+--- a/drivers/mtd/nand/spi/core.c
-++++ b/drivers/mtd/nand/spi/core.c
-+@@ -19,6 +19,7 @@
-+ #include <linux/string.h>
-+ #include <linux/spi/spi.h>
-+ #include <linux/spi/spi-mem.h>
-++#include <linux/mtd/mtk_bmt.h>
-+ 
-+ static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val)
-+ {
-+@@ -1139,6 +1140,8 @@ static int spinand_probe(struct spi_mem
-+ 	if (ret)
-+ 		return ret;
-+ 
-++	mtk_bmt_attach(mtd);
-++
-+ 	ret = mtd_device_register(mtd, NULL, 0);
-+ 	if (ret)
-+ 		goto err_spinand_cleanup;
-+@@ -1164,6 +1167,7 @@ static int spinand_remove(struct spi_mem
-+ 	if (ret)
-+ 		return ret;
-+ 
-++	mtk_bmt_detach(mtd);
-+ 	spinand_cleanup(spinand);
-+ 
-+ 	return 0;
-+--- /dev/null
-++++ b/include/linux/mtd/mtk_bmt.h
-+@@ -0,0 +1,18 @@
-++#ifndef __MTK_BMT_H
-++#define __MTK_BMT_H
-++
-++#ifdef CONFIG_MTD_NAND_MTK_BMT
-++int mtk_bmt_attach(struct mtd_info *mtd);
-++void mtk_bmt_detach(struct mtd_info *mtd);
-++#else
-++static inline int mtk_bmt_attach(struct mtd_info *mtd)
-++{
-++	return 0;
-++}
-++
-++static inline void mtk_bmt_detach(struct mtd_info *mtd)
-++{
-++}
-++#endif
-++
-++#endif
-diff --git a/target/linux/mediatek/patches-5.10/340-mtd-spinand-Add-support-for-the-Fidelix-FM35X1GA.patch b/target/linux/mediatek/patches-5.10/340-mtd-spinand-Add-support-for-the-Fidelix-FM35X1GA.patch
-new file mode 100644
-index 0000000000..69a9297e1f
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/340-mtd-spinand-Add-support-for-the-Fidelix-FM35X1GA.patch
-@@ -0,0 +1,122 @@
-+From ea0df4552efcdcc2806fe6eba0540b5f719d80b6 Mon Sep 17 00:00:00 2001
-+From: Davide Fioravanti <pantanastyle@gmail.com>
-+Date: Fri, 8 Jan 2021 15:35:24 +0100
-+Subject: [PATCH 1/1] mtd: spinand: Add support for the Fidelix FM35X1GA
-+
-+Datasheet: http://www.hobos.com.cn/upload/datasheet/DS35X1GAXXX_100_rev00.pdf
-+
-+Signed-off-by: Davide Fioravanti <pantanastyle@gmail.com>
-+---
-+ drivers/mtd/nand/spi/Makefile  |  2 +-
-+ drivers/mtd/nand/spi/core.c    |  1 +
-+ drivers/mtd/nand/spi/fidelix.c | 80 ++++++++++++++++++++++++++++++++++
-+ include/linux/mtd/spinand.h    |  1 +
-+ 4 files changed, 83 insertions(+), 1 deletion(-)
-+ create mode 100644 drivers/mtd/nand/spi/fidelix.c
-+
-+--- a/drivers/mtd/nand/spi/Makefile
-++++ b/drivers/mtd/nand/spi/Makefile
-+@@ -1,3 +1,3 @@
-+ # SPDX-License-Identifier: GPL-2.0
-+-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o
-++spinand-objs := core.o fidelix.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o
-+ obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
-+--- a/drivers/mtd/nand/spi/core.c
-++++ b/drivers/mtd/nand/spi/core.c
-+@@ -755,6 +755,7 @@ static const struct nand_ops spinand_ops
-+ };
-+ 
-+ static const struct spinand_manufacturer *spinand_manufacturers[] = {
-++	&fidelix_spinand_manufacturer,
-+ 	&gigadevice_spinand_manufacturer,
-+ 	&macronix_spinand_manufacturer,
-+ 	&micron_spinand_manufacturer,
-+--- /dev/null
-++++ b/drivers/mtd/nand/spi/fidelix.c
-+@@ -0,0 +1,76 @@
-++// SPDX-License-Identifier: GPL-2.0
-++/*
-++ * Copyright (c) 2020 Davide Fioravanti <pantanastyle@gmail.com>
-++ */
-++
-++#include <linux/device.h>
-++#include <linux/kernel.h>
-++#include <linux/mtd/spinand.h>
-++
-++#define SPINAND_MFR_FIDELIX		0xE5
-++#define FIDELIX_ECCSR_MASK		0x0F
-++
-++static SPINAND_OP_VARIANTS(read_cache_variants,
-++		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
-++		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
-++		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
-++
-++static SPINAND_OP_VARIANTS(write_cache_variants,
-++		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
-++		SPINAND_PROG_LOAD(true, 0, NULL, 0));
-++
-++static SPINAND_OP_VARIANTS(update_cache_variants,
-++		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
-++		SPINAND_PROG_LOAD(false, 0, NULL, 0));
-++
-++static int fm35x1ga_ooblayout_ecc(struct mtd_info *mtd, int section,
-++				  struct mtd_oob_region *region)
-++{
-++	if (section > 3)
-++		return -ERANGE;
-++
-++	region->offset = (16 * section) + 8;
-++	region->length = 8;
-++
-++	return 0;
-++}
-++
-++static int fm35x1ga_ooblayout_free(struct mtd_info *mtd, int section,
-++				   struct mtd_oob_region *region)
-++{
-++	if (section > 3)
-++		return -ERANGE;
-++
-++	region->offset = (16 * section) + 2;
-++	region->length = 6;
-++
-++	return 0;
-++}
-++
-++static const struct mtd_ooblayout_ops fm35x1ga_ooblayout = {
-++	.ecc = fm35x1ga_ooblayout_ecc,
-++	.free = fm35x1ga_ooblayout_free,
-++};
-++
-++static const struct spinand_info fidelix_spinand_table[] = {
-++	SPINAND_INFO("FM35X1GA",
-++		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x71),
-++		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
-++		     NAND_ECCREQ(4, 512),
-++		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-++					      &write_cache_variants,
-++					      &update_cache_variants),
-++		     SPINAND_HAS_QE_BIT,
-++		     SPINAND_ECCINFO(&fm35x1ga_ooblayout, NULL)),
-++};
-++
-++static const struct spinand_manufacturer_ops fidelix_spinand_manuf_ops = {
-++};
-++
-++const struct spinand_manufacturer fidelix_spinand_manufacturer = {
-++	.id = SPINAND_MFR_FIDELIX,
-++	.name = "Fidelix",
-++	.chips = fidelix_spinand_table,
-++	.nchips = ARRAY_SIZE(fidelix_spinand_table),
-++	.ops = &fidelix_spinand_manuf_ops,
-++};
-+--- a/include/linux/mtd/spinand.h
-++++ b/include/linux/mtd/spinand.h
-+@@ -238,6 +238,7 @@ struct spinand_manufacturer {
-+ };
-+ 
-+ /* SPI NAND manufacturers */
-++extern const struct spinand_manufacturer fidelix_spinand_manufacturer;
-+ extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
-+ extern const struct spinand_manufacturer macronix_spinand_manufacturer;
-+ extern const struct spinand_manufacturer micron_spinand_manufacturer;
-diff --git a/target/linux/mediatek/patches-5.10/350-mtd-parsers-trx-Allow-to-specify-trx-magic-in-DT.patch b/target/linux/mediatek/patches-5.10/350-mtd-parsers-trx-Allow-to-specify-trx-magic-in-DT.patch
-new file mode 100644
-index 0000000000..4db51a88ad
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/350-mtd-parsers-trx-Allow-to-specify-trx-magic-in-DT.patch
-@@ -0,0 +1,75 @@
-+From 0600e3d81628002a5cd80cf83ee454851b0063c0 Mon Sep 17 00:00:00 2001
-+From: Hauke Mehrtens <hauke@hauke-m.de>
-+Date: Sun, 7 Mar 2021 18:19:26 +0100
-+Subject: mtd: parsers: trx: Allow to specify trx-magic in DT
-+
-+Buffalo uses a different TRX magic for every device, to be able to use
-+this trx parser, make it possible to specify the TRX magic in device
-+tree. If no TRX magic is specified in device tree, the standard value
-+will be used. This value should only be specified if a vendor chooses to
-+use a non standard TRX magic.
-+
-+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-+---
-+ .../bindings/mtd/partitions/brcm,trx.txt      |  5 +++++
-+ drivers/mtd/parsers/parser_trx.c              | 21 ++++++++++++++++++-
-+ 2 files changed, 25 insertions(+), 1 deletion(-)
-+
-+--- a/Documentation/devicetree/bindings/mtd/partitions/brcm,trx.txt
-++++ b/Documentation/devicetree/bindings/mtd/partitions/brcm,trx.txt
-+@@ -28,6 +28,11 @@ detected by a software parsing TRX heade
-+ Required properties:
-+ - compatible : (required) must be "brcm,trx"
-+ 
-++Optional properties:
-++
-++- trx-magic: TRX magic, if it is different from the default magic
-++	     0x30524448 as a u32.
-++
-+ Example:
-+ 
-+ flash@0 {
-+--- a/drivers/mtd/parsers/parser_trx.c
-++++ b/drivers/mtd/parsers/parser_trx.c
-+@@ -74,6 +74,24 @@ out_default:
-+ 	return "rootfs";
-+ }
-+ 
-++static uint32_t parser_trx_get_magic(struct mtd_info *mtd)
-++{
-++	uint32_t trx_magic = TRX_MAGIC;
-++	struct device_node *np;
-++	int err;
-++
-++	np = mtd_get_of_node(mtd);
-++	if (!np)
-++		return trx_magic;
-++
-++	/* Get different magic from device tree if specified */
-++	err = of_property_read_u32(np, "trx-magic", &trx_magic);
-++	if (err != 0 && err != -EINVAL)
-++		pr_err("failed to parse \"trx-magic\" DT attribute, use default: %d\n", err);
-++
-++	return trx_magic;
-++}
-++
-+ static int parser_trx_parse(struct mtd_info *mtd,
-+ 			    const struct mtd_partition **pparts,
-+ 			    struct mtd_part_parser_data *data)
-+@@ -83,6 +101,7 @@ static int parser_trx_parse(struct mtd_i
-+ 	struct trx_header trx;
-+ 	size_t bytes_read;
-+ 	uint8_t curr_part = 0, i = 0;
-++	uint32_t trx_magic = parser_trx_get_magic(mtd);
-+ 	int err;
-+ 
-+ 	parts = kcalloc(TRX_PARSER_MAX_PARTS, sizeof(struct mtd_partition),
-+@@ -97,7 +116,7 @@ static int parser_trx_parse(struct mtd_i
-+ 		return err;
-+ 	}
-+ 
-+-	if (trx.magic != TRX_MAGIC) {
-++	if (trx.magic != trx_magic) {
-+ 		kfree(parts);
-+ 		return -ENOENT;
-+ 	}
-diff --git a/target/linux/mediatek/patches-5.10/351-mtd-parsers-Remove-dependency-to-BRCM-architectures.patch b/target/linux/mediatek/patches-5.10/351-mtd-parsers-Remove-dependency-to-BRCM-architectures.patch
-new file mode 100644
-index 0000000000..fa94c22304
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/351-mtd-parsers-Remove-dependency-to-BRCM-architectures.patch
-@@ -0,0 +1,23 @@
-+From 63f0cf88ab5461acb0911252f12bb94ee3bf05a2 Mon Sep 17 00:00:00 2001
-+From: Hauke Mehrtens <hauke@hauke-m.de>
-+Date: Sun, 7 Mar 2021 18:23:29 +0100
-+Subject: mtd: parsers: Remove dependency to BRCM architectures
-+
-+Buffalo uses the TRX partition format also on Mediatek SoCs.
-+
-+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-+---
-+ drivers/mtd/parsers/Kconfig | 2 +-
-+ 1 file changed, 1 insertion(+), 1 deletion(-)
-+
-+--- a/drivers/mtd/parsers/Kconfig
-++++ b/drivers/mtd/parsers/Kconfig
-+@@ -131,7 +131,7 @@ config MTD_AFS_PARTS
-+ 
-+ config MTD_PARSER_TRX
-+ 	tristate "Parser for TRX format partitions"
-+-	depends on MTD && (BCM47XX || ARCH_BCM_5301X || COMPILE_TEST)
-++	depends on MTD
-+ 	help
-+ 	  TRX is a firmware format used by Broadcom on their devices. It
-+ 	  may contain up to 3/4 partitions (depending on the version).
-diff --git a/target/linux/mediatek/patches-5.10/360-mtd-rawnand-mtk-Fix-WAITRDY-break-condition-and-time.patch b/target/linux/mediatek/patches-5.10/360-mtd-rawnand-mtk-Fix-WAITRDY-break-condition-and-time.patch
-new file mode 100644
-index 0000000000..340e80f67b
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/360-mtd-rawnand-mtk-Fix-WAITRDY-break-condition-and-time.patch
-@@ -0,0 +1,36 @@
-+From 4a4854761c9dedeedbf72c25d1317ab2e7600d4f Mon Sep 17 00:00:00 2001
-+From: Hauke Mehrtens <hauke@hauke-m.de>
-+Date: Mon, 8 Mar 2021 23:16:17 +0100
-+Subject: [PATCH] mtd: rawnand: mtk: Fix WAITRDY break condition and timeout
-+
-+This fixes NAND_OP_WAITRDY_INSTR operation in the driver. Without this
-+change the driver waits till the system is busy, but we should wait till
-+the busy flag is cleared. The readl_poll_timeout() function gets a break
-+condition, not a wait condition.
-+
-+In addition fix the timeout. The timeout_ms is given in ms, but the
-+readl_poll_timeout() function takes the timeout in us. Multiple the
-+given timeout by 1000 to convert it.
-+
-+Without this change, the driver does not work at all, it doesn't even
-+identify the NAND chip.
-+
-+Fixes: 5197360f9e09 ("mtd: rawnand: mtk: Convert the driver to exec_op()")
-+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-+---
-+ drivers/mtd/nand/raw/mtk_nand.c | 4 ++--
-+ 1 file changed, 2 insertions(+), 2 deletions(-)
-+
-+--- a/drivers/mtd/nand/raw/mtk_nand.c
-++++ b/drivers/mtd/nand/raw/mtk_nand.c
-+@@ -488,8 +488,8 @@ static int mtk_nfc_exec_instr(struct nan
-+ 		return 0;
-+ 	case NAND_OP_WAITRDY_INSTR:
-+ 		return readl_poll_timeout(nfc->regs + NFI_STA, status,
-+-					  status & STA_BUSY, 20,
-+-					  instr->ctx.waitrdy.timeout_ms);
-++					  !(status & STA_BUSY), 20,
-++					  instr->ctx.waitrdy.timeout_ms * 1000);
-+ 	default:
-+ 		break;
-+ 	}
-diff --git a/target/linux/mediatek/patches-5.10/400-crypto-add-eip97-inside-secure-support.patch b/target/linux/mediatek/patches-5.10/400-crypto-add-eip97-inside-secure-support.patch
-new file mode 100644
-index 0000000000..e0941a9550
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/400-crypto-add-eip97-inside-secure-support.patch
-@@ -0,0 +1,27 @@
-+--- a/drivers/crypto/inside-secure/safexcel.c
-++++ b/drivers/crypto/inside-secure/safexcel.c
-+@@ -600,6 +600,14 @@ static int safexcel_hw_init(struct safex
-+ 		val |= EIP197_MST_CTRL_TX_MAX_CMD(5);
-+ 		writel(val, EIP197_HIA_AIC(priv) + EIP197_HIA_MST_CTRL);
-+ 	}
-++	/*
-++	 * Set maximum number of TX commands to 2^4 = 16 for EIP97 HW2.1/HW2.3
-++	 */
-++	else {
-++		val = 0;
-++		val |= EIP97_MST_CTRL_TX_MAX_CMD(4);
-++		writel(val, EIP197_HIA_AIC(priv) + EIP197_HIA_MST_CTRL);
-++	}
-+ 
-+ 	/* Configure wr/rd cache values */
-+ 	writel(EIP197_MST_CTRL_RD_CACHE(RD_CACHE_4BITS) |
-+--- a/drivers/crypto/inside-secure/safexcel.h
-++++ b/drivers/crypto/inside-secure/safexcel.h
-+@@ -314,6 +314,7 @@
-+ #define EIP197_MST_CTRL_RD_CACHE(n)		(((n) & 0xf) << 0)
-+ #define EIP197_MST_CTRL_WD_CACHE(n)		(((n) & 0xf) << 4)
-+ #define EIP197_MST_CTRL_TX_MAX_CMD(n)		(((n) & 0xf) << 20)
-++#define EIP97_MST_CTRL_TX_MAX_CMD(n)		(((n) & 0xf) << 4)
-+ #define EIP197_MST_CTRL_BYTE_SWAP		BIT(24)
-+ #define EIP197_MST_CTRL_NO_BYTE_SWAP		BIT(25)
-+ #define EIP197_MST_CTRL_BYTE_SWAP_BITS          GENMASK(25, 24)
-diff --git a/target/linux/mediatek/patches-5.10/401-crypto-fix-eip97-cache-incoherent.patch b/target/linux/mediatek/patches-5.10/401-crypto-fix-eip97-cache-incoherent.patch
-new file mode 100644
-index 0000000000..be2bffb749
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/401-crypto-fix-eip97-cache-incoherent.patch
-@@ -0,0 +1,26 @@
-+--- a/drivers/crypto/inside-secure/safexcel.h
-++++ b/drivers/crypto/inside-secure/safexcel.h
-+@@ -736,6 +736,9 @@ enum safexcel_eip_version {
-+ /* Priority we use for advertising our algorithms */
-+ #define SAFEXCEL_CRA_PRIORITY		300
-+ 
-++/* System cache line size */
-++#define SYSTEM_CACHELINE_SIZE		64
-++
-+ /* SM3 digest result for zero length message */
-+ #define EIP197_SM3_ZEROM_HASH	"\x1A\xB2\x1D\x83\x55\xCF\xA1\x7F" \
-+ 				"\x8E\x61\x19\x48\x31\xE8\x1A\x8F" \
-+--- a/drivers/crypto/inside-secure/safexcel_hash.c
-++++ b/drivers/crypto/inside-secure/safexcel_hash.c
-+@@ -53,9 +53,9 @@ struct safexcel_ahash_req {
-+ 	u8 block_sz;    /* block size, only set once */
-+ 	u8 digest_sz;   /* output digest size, only set once */
-+ 	__le32 state[SHA3_512_BLOCK_SIZE /
-+-		     sizeof(__le32)] __aligned(sizeof(__le32));
-++		     sizeof(__le32)] __aligned(SYSTEM_CACHELINE_SIZE);
-+ 
-+-	u64 len;
-++	u64 len __aligned(SYSTEM_CACHELINE_SIZE);
-+ 	u64 processed;
-+ 
-+ 	u8 cache[HASH_CACHE_SIZE] __aligned(sizeof(u32));
-diff --git a/target/linux/mediatek/patches-5.10/410-bt-mtk-serial-fix.patch b/target/linux/mediatek/patches-5.10/410-bt-mtk-serial-fix.patch
-new file mode 100644
-index 0000000000..2e474dd5fe
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/410-bt-mtk-serial-fix.patch
-@@ -0,0 +1,33 @@
-+--- a/drivers/tty/serial/8250/8250.h
-++++ b/drivers/tty/serial/8250/8250.h
-+@@ -82,6 +82,7 @@ struct serial8250_config {
-+ #define UART_CAP_MINI	(1 << 17)	/* Mini UART on BCM283X family lacks:
-+ 					 * STOP PARITY EPAR SPAR WLEN5 WLEN6
-+ 					 */
-++#define UART_CAP_NMOD	(1 << 18)	/* UART doesn't do termios */
-+ 
-+ #define UART_BUG_QUOT	(1 << 0)	/* UART has buggy quot LSB */
-+ #define UART_BUG_TXEN	(1 << 1)	/* UART has buggy TX IIR status */
-+--- a/drivers/tty/serial/8250/8250_port.c
-++++ b/drivers/tty/serial/8250/8250_port.c
-+@@ -287,7 +287,7 @@ static const struct serial8250_config ua
-+ 		.tx_loadsz	= 16,
-+ 		.fcr		= UART_FCR_ENABLE_FIFO |
-+ 				  UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
-+-		.flags		= UART_CAP_FIFO,
-++		.flags		= UART_CAP_FIFO | UART_CAP_NMOD,
-+ 	},
-+ 	[PORT_NPCM] = {
-+ 		.name		= "Nuvoton 16550",
-+@@ -2687,6 +2687,11 @@ serial8250_do_set_termios(struct uart_po
-+ 	unsigned long flags;
-+ 	unsigned int baud, quot, frac = 0;
-+ 
-++	if (up->capabilities & UART_CAP_NMOD) {
-++		termios->c_cflag = 0;
-++		return;
-++	}
-++
-+ 	if (up->capabilities & UART_CAP_MINI) {
-+ 		termios->c_cflag &= ~(CSTOPB | PARENB | PARODD | CMSPAR);
-+ 		if ((termios->c_cflag & CSIZE) == CS5 ||
-diff --git a/target/linux/mediatek/patches-5.10/420-mtd-spi-nor-add-support-for-Winbond-W25Q512JV.patch b/target/linux/mediatek/patches-5.10/420-mtd-spi-nor-add-support-for-Winbond-W25Q512JV.patch
-new file mode 100644
-index 0000000000..f8527ba424
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/420-mtd-spi-nor-add-support-for-Winbond-W25Q512JV.patch
-@@ -0,0 +1,28 @@
-+From: David Bauer <mail@david-bauer.net>
-+To: linux-mtd@lists.infradead.org
-+Subject: [PATCH] mtd: spi-nor: add support for Winbond W25Q512JV
-+Date: Sat, 13 Feb 2021 16:10:47 +0100
-+
-+The Winbond W25Q512JV is a 512mb SPI-NOR chip. It supports 4K
-+sectors as well as block protection and Dual-/Quad-read.
-+
-+Tested on: Ubiquiti UniFi 6 LR
-+
-+Signed-off-by: David Bauer <mail@david-bauer.net>
-+---
-+ drivers/mtd/spi-nor/winbond.c | 4 ++++
-+ 1 file changed, 4 insertions(+)
-+
-+--- a/drivers/mtd/spi-nor/winbond.c
-++++ b/drivers/mtd/spi-nor/winbond.c
-+@@ -95,6 +95,10 @@ static const struct flash_info winbond_p
-+ 			     SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-+ 	{ "w25q256jw", INFO(0xef6019, 0, 64 * 1024, 512,
-+ 			     SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-++	{ "w25q512jv", INFO(0xef4020, 0, 64 * 1024, 1024,
-++			    SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ |
-++			    SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 |
-++			    SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP) },
-+ 	{ "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024,
-+ 			    SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) },
-+ };
-diff --git a/target/linux/mediatek/patches-5.10/500-gsw-rtl8367s-mt7622-support.patch b/target/linux/mediatek/patches-5.10/500-gsw-rtl8367s-mt7622-support.patch
-new file mode 100644
-index 0000000000..bdd482def3
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/500-gsw-rtl8367s-mt7622-support.patch
-@@ -0,0 +1,25 @@
-+--- a/drivers/net/phy/Kconfig
-++++ b/drivers/net/phy/Kconfig
-+@@ -334,6 +334,12 @@ config ROCKCHIP_PHY
-+ 	help
-+ 	  Currently supports the integrated Ethernet PHY.
-+ 
-++config RTL8367S_GSW
-++	tristate "rtl8367 Gigabit Switch support for mt7622"
-++	depends on NET_VENDOR_MEDIATEK
-++	help
-++	  This driver supports rtl8367s in mt7622
-++
-+ config SMSC_PHY
-+ 	tristate "SMSC PHYs"
-+ 	help
-+--- a/drivers/net/phy/Makefile
-++++ b/drivers/net/phy/Makefile
-+@@ -88,6 +88,7 @@ obj-$(CONFIG_QSEMI_PHY)		+= qsemi.o
-+ obj-$(CONFIG_REALTEK_PHY)	+= realtek.o
-+ obj-$(CONFIG_RENESAS_PHY)	+= uPD60620.o
-+ obj-$(CONFIG_ROCKCHIP_PHY)	+= rockchip.o
-++obj-$(CONFIG_RTL8367S_GSW)	+= rtk/
-+ obj-$(CONFIG_SMSC_PHY)		+= smsc.o
-+ obj-$(CONFIG_STE10XP)		+= ste10Xp.o
-+ obj-$(CONFIG_TERANETICS_PHY)	+= teranetics.o
-diff --git a/target/linux/mediatek/patches-5.10/600-dt-bindings-PCI-Mediatek-Update-PCIe-binding.patch b/target/linux/mediatek/patches-5.10/600-dt-bindings-PCI-Mediatek-Update-PCIe-binding.patch
-new file mode 100644
-index 0000000000..02e4c130ea
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/600-dt-bindings-PCI-Mediatek-Update-PCIe-binding.patch
-@@ -0,0 +1,415 @@
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-+Subject: [PATCH v2 1/4] dt-bindings: PCI: Mediatek: Update PCIe binding
-+Date: Thu, 28 May 2020 14:16:45 +0800
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-+
-+From: "chuanjia.liu" <Chuanjia.Liu@mediatek.com>
-+
-+There are two independent PCIe controllers in MT2712/MT7622 platform,
-+and each of them should contain an independent MSI domain.
-+
-+In current architecture, MSI domain will be inherited from the root
-+bridge, and all of the devices will share the same MSI domain.
-+Hence that, the PCIe devices will not work properly if the irq number
-+which required is more than 32.
-+
-+Split the PCIe node for MT2712/MT7622 platform to fix MSI issue and
-+comply with the hardware design.
-+
-+Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com>
-+---
-+ .../bindings/pci/mediatek-pcie-cfg.yaml       |  38 +++++
-+ .../devicetree/bindings/pci/mediatek-pcie.txt | 144 +++++++++++-------
-+ 2 files changed, 129 insertions(+), 53 deletions(-)
-+ create mode 100644 Documentation/devicetree/bindings/pci/mediatek-pcie-cfg.yaml
-+
-+--- /dev/null
-++++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-cfg.yaml
-+@@ -0,0 +1,38 @@
-++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
-++%YAML 1.2
-++---
-++$id: http://devicetree.org/schemas/pci/mediatek-pcie-cfg.yaml#
-++$schema: http://devicetree.org/meta-schemas/core.yaml#
-++
-++title: Mediatek PCIECFG controller
-++
-++maintainers:
-++  - Chuanjia Liu <chuanjia.liu@mediatek.com>
-++  - Jianjun Wang <jianjun.wang@mediatek.com>
-++
-++description: |
-++  The MediaTek PCIECFG controller controls some feature about
-++  LTSSM, ASPM and so on.
-++
-++properties:
-++  compatible:
-++      items:
-++        - enum:
-++            - mediatek,mt7622-pciecfg
-++            - mediatek,mt7629-pciecfg
-++        - const: syscon
-++
-++  reg:
-++    maxItems: 1
-++
-++required:
-++  - compatible
-++  - reg
-++
-++examples:
-++  - |
-++    pciecfg: pciecfg@1a140000 {
-++        compatible = "mediatek,mt7622-pciecfg", "syscon";
-++        reg = <0 0x1a140000 0 0x1000>;
-++    };
-++...
-+--- a/Documentation/devicetree/bindings/pci/mediatek-pcie.txt
-++++ b/Documentation/devicetree/bindings/pci/mediatek-pcie.txt
-+@@ -8,7 +8,7 @@ Required properties:
-+ 	"mediatek,mt7623-pcie"
-+ 	"mediatek,mt7629-pcie"
-+ - device_type: Must be "pci"
-+-- reg: Base addresses and lengths of the PCIe subsys and root ports.
-++- reg: Base addresses and lengths of the root ports.
-+ - reg-names: Names of the above areas to use during resource lookup.
-+ - #address-cells: Address representation for root ports (must be 3)
-+ - #size-cells: Size representation for root ports (must be 2)
-+@@ -19,10 +19,10 @@ Required properties:
-+    - sys_ckN :transaction layer and data link layer clock
-+   Required entries for MT2701/MT7623:
-+    - free_ck :for reference clock of PCIe subsys
-+-  Required entries for MT2712/MT7622:
-++  Required entries for MT2712/MT7622/MT7629:
-+    - ahb_ckN :AHB slave interface operating clock for CSR access and RC
-+ 	      initiated MMIO access
-+-  Required entries for MT7622:
-++  Required entries for MT7622/MT7629:
-+    - axi_ckN :application layer MMIO channel operating clock
-+    - aux_ckN :pe2_mac_bridge and pe2_mac_core operating clock when
-+ 	      pcie_mac_ck/pcie_pipe_ck is turned off
-+@@ -47,10 +47,13 @@ Required properties for MT7623/MT2701:
-+ - reset-names: Must be "pcie-rst0", "pcie-rst1", "pcie-rstN".. based on the
-+   number of root ports.
-+ 
-+-Required properties for MT2712/MT7622:
-++Required properties for MT2712/MT7622/MT7629:
-+ -interrupts: A list of interrupt outputs of the controller, must have one
-+ 	     entry for each PCIe port
-+ 
-++Required properties for MT7622/MT7629:
-++- mediatek,pcie-subsys: Should be a phandle of the pciecfg node.
-++
-+ In addition, the device tree node must have sub-nodes describing each
-+ PCIe port interface, having the following mandatory properties:
-+ 
-+@@ -143,56 +146,73 @@ Examples for MT7623:
-+ 
-+ Examples for MT2712:
-+ 
-+-	pcie: pcie@11700000 {
-++	pcie1: pcie@112ff000 {
-+ 		compatible = "mediatek,mt2712-pcie";
-+ 		device_type = "pci";
-+-		reg = <0 0x11700000 0 0x1000>,
-+-		      <0 0x112ff000 0 0x1000>;
-+-		reg-names = "port0", "port1";
-++		reg = <0 0x112ff000 0 0x1000>;
-++		reg-names = "port1";
-+ 		#address-cells = <3>;
-+ 		#size-cells = <2>;
-+-		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
-+-			     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
-+-		clocks = <&topckgen CLK_TOP_PE2_MAC_P0_SEL>,
-+-			 <&topckgen CLK_TOP_PE2_MAC_P1_SEL>,
-+-			 <&pericfg CLK_PERI_PCIE0>,
-++		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
-++		interrupt-names = "pcie_irq";
-++		clocks = <&topckgen CLK_TOP_PE2_MAC_P1_SEL>,
-+ 			 <&pericfg CLK_PERI_PCIE1>;
-+-		clock-names = "sys_ck0", "sys_ck1", "ahb_ck0", "ahb_ck1";
-+-		phys = <&pcie0_phy PHY_TYPE_PCIE>, <&pcie1_phy PHY_TYPE_PCIE>;
-+-		phy-names = "pcie-phy0", "pcie-phy1";
-++		clock-names = "sys_ck1", "ahb_ck1";
-++		phys = <&u3port1 PHY_TYPE_PCIE>;
-++		phy-names = "pcie-phy1";
-+ 		bus-range = <0x00 0xff>;
-+-		ranges = <0x82000000 0 0x20000000  0x0 0x20000000  0 0x10000000>;
-++		ranges = <0x82000000 0 0x11400000  0x0 0x11400000  0 0x300000>;
-++		status = "disabled";
-+ 
-+-		pcie0: pcie@0,0 {
-+-			reg = <0x0000 0 0 0 0>;
-++		slot1: pcie@1,0 {
-++			reg = <0x0800 0 0 0 0>;
-+ 			#address-cells = <3>;
-+ 			#size-cells = <2>;
-+ 			#interrupt-cells = <1>;
-+ 			ranges;
-+ 			interrupt-map-mask = <0 0 0 7>;
-+-			interrupt-map = <0 0 0 1 &pcie_intc0 0>,
-+-					<0 0 0 2 &pcie_intc0 1>,
-+-					<0 0 0 3 &pcie_intc0 2>,
-+-					<0 0 0 4 &pcie_intc0 3>;
-+-			pcie_intc0: interrupt-controller {
-++			interrupt-map = <0 0 0 1 &pcie_intc1 0>,
-++					<0 0 0 2 &pcie_intc1 1>,
-++					<0 0 0 3 &pcie_intc1 2>,
-++					<0 0 0 4 &pcie_intc1 3>;
-++			pcie_intc1: interrupt-controller {
-+ 				interrupt-controller;
-+ 				#address-cells = <0>;
-+ 				#interrupt-cells = <1>;
-+ 			};
-+ 		};
-++	};
-+ 
-+-		pcie1: pcie@1,0 {
-+-			reg = <0x0800 0 0 0 0>;
-++	pcie0: pcie@11700000 {
-++		compatible = "mediatek,mt2712-pcie";
-++		device_type = "pci";
-++		reg = <0 0x11700000 0 0x1000>;
-++		reg-names = "port0";
-++		#address-cells = <3>;
-++		#size-cells = <2>;
-++		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
-++		interrupt-names = "pcie_irq";
-++		clocks = <&topckgen CLK_TOP_PE2_MAC_P0_SEL>,
-++			 <&pericfg CLK_PERI_PCIE0>;
-++		clock-names = "sys_ck0", "ahb_ck0";
-++		phys = <&u3port0 PHY_TYPE_PCIE>;
-++		phy-names = "pcie-phy0";
-++		bus-range = <0x00 0xff>;
-++		ranges = <0x82000000 0 0x20000000  0x0 0x20000000  0 0x10000000>;
-++		status = "disabled";
-++
-++		slot0: pcie@0,0 {
-++			reg = <0x0000 0 0 0 0>;
-+ 			#address-cells = <3>;
-+ 			#size-cells = <2>;
-+ 			#interrupt-cells = <1>;
-+ 			ranges;
-+ 			interrupt-map-mask = <0 0 0 7>;
-+-			interrupt-map = <0 0 0 1 &pcie_intc1 0>,
-+-					<0 0 0 2 &pcie_intc1 1>,
-+-					<0 0 0 3 &pcie_intc1 2>,
-+-					<0 0 0 4 &pcie_intc1 3>;
-+-			pcie_intc1: interrupt-controller {
-++			interrupt-map = <0 0 0 1 &pcie_intc0 0>,
-++					<0 0 0 2 &pcie_intc0 1>,
-++					<0 0 0 3 &pcie_intc0 2>,
-++					<0 0 0 4 &pcie_intc0 3>;
-++			pcie_intc0: interrupt-controller {
-+ 				interrupt-controller;
-+ 				#address-cells = <0>;
-+ 				#interrupt-cells = <1>;
-+@@ -202,39 +222,31 @@ Examples for MT2712:
-+ 
-+ Examples for MT7622:
-+ 
-+-	pcie: pcie@1a140000 {
-++	pcie0: pcie@1a143000 {
-+ 		compatible = "mediatek,mt7622-pcie";
-+ 		device_type = "pci";
-+-		reg = <0 0x1a140000 0 0x1000>,
-+-		      <0 0x1a143000 0 0x1000>,
-+-		      <0 0x1a145000 0 0x1000>;
-+-		reg-names = "subsys", "port0", "port1";
-++		reg = <0 0x1a143000 0 0x1000>;
-++		reg-names = "port0";
-++		mediatek,pcie-cfg = <&pciecfg>;
-+ 		#address-cells = <3>;
-+ 		#size-cells = <2>;
-+-		interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>,
-+-			     <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
-++		interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>;
-++		interrupt-names = "pcie_irq";
-+ 		clocks = <&pciesys CLK_PCIE_P0_MAC_EN>,
-+-			 <&pciesys CLK_PCIE_P1_MAC_EN>,
-+ 			 <&pciesys CLK_PCIE_P0_AHB_EN>,
-+-			 <&pciesys CLK_PCIE_P1_AHB_EN>,
-+ 			 <&pciesys CLK_PCIE_P0_AUX_EN>,
-+-			 <&pciesys CLK_PCIE_P1_AUX_EN>,
-+ 			 <&pciesys CLK_PCIE_P0_AXI_EN>,
-+-			 <&pciesys CLK_PCIE_P1_AXI_EN>,
-+ 			 <&pciesys CLK_PCIE_P0_OBFF_EN>,
-+-			 <&pciesys CLK_PCIE_P1_OBFF_EN>,
-+-			 <&pciesys CLK_PCIE_P0_PIPE_EN>,
-+-			 <&pciesys CLK_PCIE_P1_PIPE_EN>;
-+-		clock-names = "sys_ck0", "sys_ck1", "ahb_ck0", "ahb_ck1",
-+-			      "aux_ck0", "aux_ck1", "axi_ck0", "axi_ck1",
-+-			      "obff_ck0", "obff_ck1", "pipe_ck0", "pipe_ck1";
-+-		phys = <&pcie0_phy PHY_TYPE_PCIE>, <&pcie1_phy PHY_TYPE_PCIE>;
-+-		phy-names = "pcie-phy0", "pcie-phy1";
-++			 <&pciesys CLK_PCIE_P0_PIPE_EN>;
-++		clock-names = "sys_ck0", "ahb_ck0", "aux_ck0",
-++			      "axi_ck0", "obff_ck0", "pipe_ck0";
-++
-+ 		power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>;
-+ 		bus-range = <0x00 0xff>;
-+-		ranges = <0x82000000 0 0x20000000  0x0 0x20000000  0 0x10000000>;
-++		ranges = <0x82000000 0 0x20000000  0 0x20000000  0 0x8000000>;
-++		status = "disabled";
-+ 
-+-		pcie0: pcie@0,0 {
-++		slot0: pcie@0,0 {
-+ 			reg = <0x0000 0 0 0 0>;
-+ 			#address-cells = <3>;
-+ 			#size-cells = <2>;
-+@@ -251,8 +263,34 @@ Examples for MT7622:
-+ 				#interrupt-cells = <1>;
-+ 			};
-+ 		};
-++	};
-++
-++	pcie1: pcie@1a145000 {
-++		compatible = "mediatek,mt7622-pcie";
-++		device_type = "pci";
-++		reg = <0 0x1a145000 0 0x1000>;
-++		reg-names = "port1";
-++		mediatek,pcie-cfg = <&pciecfg>;
-++		#address-cells = <3>;
-++		#size-cells = <2>;
-++		interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
-++		interrupt-names = "pcie_irq";
-++		clocks = <&pciesys CLK_PCIE_P1_MAC_EN>,
-++			 /* designer has connect RC1 with p0_ahb clock */
-++			 <&pciesys CLK_PCIE_P0_AHB_EN>,
-++			 <&pciesys CLK_PCIE_P1_AUX_EN>,
-++			 <&pciesys CLK_PCIE_P1_AXI_EN>,
-++			 <&pciesys CLK_PCIE_P1_OBFF_EN>,
-++			 <&pciesys CLK_PCIE_P1_PIPE_EN>;
-++		clock-names = "sys_ck1", "ahb_ck1", "aux_ck1",
-++			      "axi_ck1", "obff_ck1", "pipe_ck1";
-++
-++		power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>;
-++		bus-range = <0x00 0xff>;
-++		ranges = <0x82000000 0 0x28000000  0 0x28000000  0 0x8000000>;
-++		status = "disabled";
-+ 
-+-		pcie1: pcie@1,0 {
-++		slot1: pcie@1,0 {
-+ 			reg = <0x0800 0 0 0 0>;
-+ 			#address-cells = <3>;
-+ 			#size-cells = <2>;
-diff --git a/target/linux/mediatek/patches-5.10/601-PCI-mediatek-Use-regmap-to-get-shared-pcie-cfg-base.patch b/target/linux/mediatek/patches-5.10/601-PCI-mediatek-Use-regmap-to-get-shared-pcie-cfg-base.patch
-new file mode 100644
-index 0000000000..9c18565319
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/601-PCI-mediatek-Use-regmap-to-get-shared-pcie-cfg-base.patch
-@@ -0,0 +1,217 @@
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-+Subject: [PATCH v2 2/4] PCI: mediatek: Use regmap to get shared pcie-cfg base
-+Date: Thu, 28 May 2020 14:16:46 +0800
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-+
-+From: "chuanjia.liu" <Chuanjia.Liu@mediatek.com>
-+
-+Use regmap to get shared pcie-cfg base and change
-+the method to get pcie irq.
-+
-+Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com>
-+---
-+ drivers/pci/controller/pcie-mediatek.c | 25 ++++++++++++++++++-------
-+ 1 file changed, 18 insertions(+), 7 deletions(-)
-+
-+--- a/drivers/pci/controller/pcie-mediatek.c
-++++ b/drivers/pci/controller/pcie-mediatek.c
-+@@ -14,6 +14,7 @@
-+ #include <linux/irqchip/chained_irq.h>
-+ #include <linux/irqdomain.h>
-+ #include <linux/kernel.h>
-++#include <linux/mfd/syscon.h>
-+ #include <linux/msi.h>
-+ #include <linux/module.h>
-+ #include <linux/of_address.h>
-+@@ -23,6 +24,7 @@
-+ #include <linux/phy/phy.h>
-+ #include <linux/platform_device.h>
-+ #include <linux/pm_runtime.h>
-++#include <linux/regmap.h>
-+ #include <linux/reset.h>
-+ 
-+ #include "../pci.h"
-+@@ -205,6 +207,7 @@ struct mtk_pcie_port {
-+  * struct mtk_pcie - PCIe host information
-+  * @dev: pointer to PCIe device
-+  * @base: IO mapped register base
-++ * @cfg: IO mapped register map for PCIe config
-+  * @free_ck: free-run reference clock
-+  * @mem: non-prefetchable memory resource
-+  * @ports: pointer to PCIe port information
-+@@ -213,6 +216,7 @@ struct mtk_pcie_port {
-+ struct mtk_pcie {
-+ 	struct device *dev;
-+ 	void __iomem *base;
-++	struct regmap *cfg;
-+ 	struct clk *free_ck;
-+ 
-+ 	struct list_head ports;
-+@@ -648,7 +652,7 @@ static int mtk_pcie_setup_irq(struct mtk
-+ 		return err;
-+ 	}
-+ 
-+-	port->irq = platform_get_irq(pdev, port->slot);
-++	port->irq = platform_get_irq_byname(pdev, "pcie_irq");
-+ 	if (port->irq < 0)
-+ 		return port->irq;
-+ 
-+@@ -674,12 +678,11 @@ static int mtk_pcie_startup_port_v2(stru
-+ 	if (!mem)
-+ 		return -EINVAL;
-+ 
-+-	/* MT7622 platforms need to enable LTSSM and ASPM from PCIe subsys */
-+-	if (pcie->base) {
-+-		val = readl(pcie->base + PCIE_SYS_CFG_V2);
-+-		val |= PCIE_CSR_LTSSM_EN(port->slot) |
-+-		       PCIE_CSR_ASPM_L1_EN(port->slot);
-+-		writel(val, pcie->base + PCIE_SYS_CFG_V2);
-++	/* MT7622/MT7629 platforms need to enable LTSSM and ASPM. */
-++	if (pcie->cfg) {
-++		val = PCIE_CSR_LTSSM_EN(port->slot) |
-++		      PCIE_CSR_ASPM_L1_EN(port->slot);
-++		regmap_update_bits(pcie->cfg, PCIE_SYS_CFG_V2, val, val);
-+ 	}
-+ 
-+ 	/* Assert all reset signals */
-+@@ -983,6 +986,7 @@ static int mtk_pcie_subsys_powerup(struc
-+ 	struct device *dev = pcie->dev;
-+ 	struct platform_device *pdev = to_platform_device(dev);
-+ 	struct resource *regs;
-++	struct device_node *cfg_node;
-+ 	int err;
-+ 
-+ 	/* get shared registers, which are optional */
-+@@ -995,6 +999,13 @@ static int mtk_pcie_subsys_powerup(struc
-+ 		}
-+ 	}
-+ 
-++	cfg_node = of_parse_phandle(dev->of_node, "mediatek,pcie-cfg", 0);
-++	if (cfg_node) {
-++		pcie->cfg = syscon_node_to_regmap(cfg_node);
-++		if (IS_ERR(pcie->cfg))
-++			return PTR_ERR(pcie->cfg);
-++	}
-++
-+ 	pcie->free_ck = devm_clk_get(dev, "free_ck");
-+ 	if (IS_ERR(pcie->free_ck)) {
-+ 		if (PTR_ERR(pcie->free_ck) == -EPROBE_DEFER)
-diff --git a/target/linux/mediatek/patches-5.10/602-arm64-dts-mediatek-Split-PCIe-node-for-MT2712-MT7622.patch b/target/linux/mediatek/patches-5.10/602-arm64-dts-mediatek-Split-PCIe-node-for-MT2712-MT7622.patch
-new file mode 100644
-index 0000000000..f613e7c49e
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/602-arm64-dts-mediatek-Split-PCIe-node-for-MT2712-MT7622.patch
-@@ -0,0 +1,417 @@
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-+Subject: [PATCH v2 3/4] arm64: dts: mediatek: Split PCIe node for
-+ MT2712/MT7622
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-+Cc: devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com,
-+ srv_heupstream@mediatek.com, "chuanjia.liu" <Chuanjia.Liu@mediatek.com>,
-+ linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
-+ jianjun.wang@mediatek.com, linux-mediatek@lists.infradead.org,
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-+
-+From: "chuanjia.liu" <Chuanjia.Liu@mediatek.com>
-+
-+There are two independent PCIe controllers in MT2712/MT7622 platform,
-+and each of them should contain an independent MSI domain.
-+
-+In current architecture, MSI domain will be inherited from the root
-+bridge, and all of the devices will share the same MSI domain.
-+Hence that, the PCIe devices will not work properly if the irq number
-+which required is more than 32.
-+
-+Split the PCIe node for MT2712/MT7622 platform to fix MSI issue and
-+comply with the hardware design.
-+
-+Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com>
-+---
-+ arch/arm64/boot/dts/mediatek/mt2712e.dtsi     | 75 +++++++++++--------
-+ .../dts/mediatek/mt7622-bananapi-bpi-r64.dts  | 16 ++--
-+ arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts  |  6 +-
-+ arch/arm64/boot/dts/mediatek/mt7622.dtsi      | 68 +++++++++++------
-+ 4 files changed, 96 insertions(+), 69 deletions(-)
-+
-+--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
-++++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
-+@@ -915,60 +915,73 @@
-+ 		};
-+ 	};
-+ 
-+-	pcie: pcie@11700000 {
-++	pcie1: pcie@112ff000 {
-+ 		compatible = "mediatek,mt2712-pcie";
-+ 		device_type = "pci";
-+-		reg = <0 0x11700000 0 0x1000>,
-+-		      <0 0x112ff000 0 0x1000>;
-+-		reg-names = "port0", "port1";
-++		reg = <0 0x112ff000 0 0x1000>;
-++		reg-names = "port1";
-+ 		#address-cells = <3>;
-+ 		#size-cells = <2>;
-+-		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
-+-			     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
-+-		clocks = <&topckgen CLK_TOP_PE2_MAC_P0_SEL>,
-+-			 <&topckgen CLK_TOP_PE2_MAC_P1_SEL>,
-+-			 <&pericfg CLK_PERI_PCIE0>,
-++		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
-++		interrupt-names = "pcie_irq";
-++		clocks = <&topckgen CLK_TOP_PE2_MAC_P1_SEL>,
-+ 			 <&pericfg CLK_PERI_PCIE1>;
-+-		clock-names = "sys_ck0", "sys_ck1", "ahb_ck0", "ahb_ck1";
-+-		phys = <&u3port0 PHY_TYPE_PCIE>, <&u3port1 PHY_TYPE_PCIE>;
-+-		phy-names = "pcie-phy0", "pcie-phy1";
-++		clock-names = "sys_ck1", "ahb_ck1";
-++		phys = <&u3port1 PHY_TYPE_PCIE>;
-++		phy-names = "pcie-phy1";
-+ 		bus-range = <0x00 0xff>;
-+-		ranges = <0x82000000 0 0x20000000  0x0 0x20000000  0 0x10000000>;
-++		ranges = <0x82000000 0 0x11400000  0x0 0x11400000  0 0x300000>;
-++		status = "disabled";
-+ 
-+-		pcie0: pcie@0,0 {
-+-			device_type = "pci";
-+-			status = "disabled";
-+-			reg = <0x0000 0 0 0 0>;
-++		slot1: pcie@1,0 {
-++			reg = <0x0800 0 0 0 0>;
-+ 			#address-cells = <3>;
-+ 			#size-cells = <2>;
-+ 			#interrupt-cells = <1>;
-+ 			ranges;
-+ 			interrupt-map-mask = <0 0 0 7>;
-+-			interrupt-map = <0 0 0 1 &pcie_intc0 0>,
-+-					<0 0 0 2 &pcie_intc0 1>,
-+-					<0 0 0 3 &pcie_intc0 2>,
-+-					<0 0 0 4 &pcie_intc0 3>;
-+-			pcie_intc0: interrupt-controller {
-++			interrupt-map = <0 0 0 1 &pcie_intc1 0>,
-++					<0 0 0 2 &pcie_intc1 1>,
-++					<0 0 0 3 &pcie_intc1 2>,
-++					<0 0 0 4 &pcie_intc1 3>;
-++			pcie_intc1: interrupt-controller {
-+ 				interrupt-controller;
-+ 				#address-cells = <0>;
-+ 				#interrupt-cells = <1>;
-+ 			};
-+ 		};
-++	};
-+ 
-+-		pcie1: pcie@1,0 {
-+-			device_type = "pci";
-+-			status = "disabled";
-+-			reg = <0x0800 0 0 0 0>;
-++	pcie0: pcie@11700000 {
-++		compatible = "mediatek,mt2712-pcie";
-++		device_type = "pci";
-++		reg = <0 0x11700000 0 0x1000>;
-++		reg-names = "port0";
-++		#address-cells = <3>;
-++		#size-cells = <2>;
-++		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
-++		interrupt-names = "pcie_irq";
-++		clocks = <&topckgen CLK_TOP_PE2_MAC_P0_SEL>,
-++			 <&pericfg CLK_PERI_PCIE0>;
-++		clock-names = "sys_ck0", "ahb_ck0";
-++		phys = <&u3port0 PHY_TYPE_PCIE>;
-++		phy-names = "pcie-phy0";
-++		bus-range = <0x00 0xff>;
-++		ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x10000000>;
-++		status = "disabled";
-++
-++		slot0: pcie@0,0 {
-++			reg = <0x0000 0 0 0 0>;
-+ 			#address-cells = <3>;
-+ 			#size-cells = <2>;
-+ 			#interrupt-cells = <1>;
-+ 			ranges;
-+ 			interrupt-map-mask = <0 0 0 7>;
-+-			interrupt-map = <0 0 0 1 &pcie_intc1 0>,
-+-					<0 0 0 2 &pcie_intc1 1>,
-+-					<0 0 0 3 &pcie_intc1 2>,
-+-					<0 0 0 4 &pcie_intc1 3>;
-+-			pcie_intc1: interrupt-controller {
-++			interrupt-map = <0 0 0 1 &pcie_intc0 0>,
-++					<0 0 0 2 &pcie_intc0 1>,
-++					<0 0 0 3 &pcie_intc0 2>,
-++					<0 0 0 4 &pcie_intc0 3>;
-++			pcie_intc0: interrupt-controller {
-+ 				interrupt-controller;
-+ 				#address-cells = <0>;
-+ 				#interrupt-cells = <1>;
-+--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-++++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-+@@ -270,18 +270,16 @@
-+ 	};
-+ };
-+ 
-+-&pcie {
-++&pcie0 {
-+ 	pinctrl-names = "default";
-+-	pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>;
-++	pinctrl-0 = <&pcie0_pins>;
-+ 	status = "okay";
-++};
-+ 
-+-	pcie@0,0 {
-+-		status = "okay";
-+-	};
-+-
-+-	pcie@1,0 {
-+-		status = "okay";
-+-	};
-++&pcie1 {
-++	pinctrl-names = "default";
-++	pinctrl-0 = <&pcie1_pins>;
-++	status = "okay";
-+ };
-+ 
-+ &pio {
-+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-+@@ -801,45 +801,41 @@
-+ 		#reset-cells = <1>;
-+ 	};
-+ 
-+-	pcie: pcie@1a140000 {
-++	pciecfg: pciecfg@1a140000 {
-++		compatible = "mediatek,mt7622-pciecfg", "syscon";
-++		reg = <0 0x1a140000 0 0x1000>;
-++	};
-++
-++	pcie0: pcie@1a143000 {
-+ 		compatible = "mediatek,mt7622-pcie";
-+ 		device_type = "pci";
-+-		reg = <0 0x1a140000 0 0x1000>,
-+-		      <0 0x1a143000 0 0x1000>,
-+-		      <0 0x1a145000 0 0x1000>;
-+-		reg-names = "subsys", "port0", "port1";
-++		reg = <0 0x1a143000 0 0x1000>;
-++		reg-names = "port0";
-++		mediatek,pcie-cfg = <&pciecfg>;
-+ 		#address-cells = <3>;
-+ 		#size-cells = <2>;
-+-		interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>,
-+-			     <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
-++		interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>;
-++		interrupt-names = "pcie_irq";
-+ 		clocks = <&pciesys CLK_PCIE_P0_MAC_EN>,
-+-			 <&pciesys CLK_PCIE_P1_MAC_EN>,
-+-			 <&pciesys CLK_PCIE_P0_AHB_EN>,
-+ 			 <&pciesys CLK_PCIE_P0_AHB_EN>,
-+ 			 <&pciesys CLK_PCIE_P0_AUX_EN>,
-+-			 <&pciesys CLK_PCIE_P1_AUX_EN>,
-+ 			 <&pciesys CLK_PCIE_P0_AXI_EN>,
-+-			 <&pciesys CLK_PCIE_P1_AXI_EN>,
-+ 			 <&pciesys CLK_PCIE_P0_OBFF_EN>,
-+-			 <&pciesys CLK_PCIE_P1_OBFF_EN>,
-+-			 <&pciesys CLK_PCIE_P0_PIPE_EN>,
-+-			 <&pciesys CLK_PCIE_P1_PIPE_EN>;
-+-		clock-names = "sys_ck0", "sys_ck1", "ahb_ck0", "ahb_ck1",
-+-			      "aux_ck0", "aux_ck1", "axi_ck0", "axi_ck1",
-+-			      "obff_ck0", "obff_ck1", "pipe_ck0", "pipe_ck1";
-++			 <&pciesys CLK_PCIE_P0_PIPE_EN>;
-++		clock-names = "sys_ck0", "ahb_ck0", "aux_ck0",
-++			      "axi_ck0", "obff_ck0", "pipe_ck0";
-++
-+ 		power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>;
-+ 		bus-range = <0x00 0xff>;
-+-		ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x10000000>;
-++		ranges = <0x82000000 0 0x20000000  0x0 0x20000000  0 0x8000000>;
-+ 		status = "disabled";
-+ 
-+-		pcie0: pcie@0,0 {
-++		slot0: pcie@0,0 {
-+ 			reg = <0x0000 0 0 0 0>;
-+ 			#address-cells = <3>;
-+ 			#size-cells = <2>;
-+ 			#interrupt-cells = <1>;
-+ 			ranges;
-+-			status = "disabled";
-+-
-+ 			interrupt-map-mask = <0 0 0 7>;
-+ 			interrupt-map = <0 0 0 1 &pcie_intc0 0>,
-+ 					<0 0 0 2 &pcie_intc0 1>,
-+@@ -851,15 +847,39 @@
-+ 				#interrupt-cells = <1>;
-+ 			};
-+ 		};
-++	};
-+ 
-+-		pcie1: pcie@1,0 {
-++	pcie1: pcie@1a145000 {
-++		compatible = "mediatek,mt7622-pcie";
-++		device_type = "pci";
-++		reg = <0 0x1a145000 0 0x1000>;
-++		reg-names = "port1";
-++		mediatek,pcie-cfg = <&pciecfg>;
-++		#address-cells = <3>;
-++		#size-cells = <2>;
-++		interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
-++		interrupt-names = "pcie_irq";
-++		clocks = <&pciesys CLK_PCIE_P1_MAC_EN>,
-++			 /* designer has connect RC1 with p0_ahb clock */
-++			 <&pciesys CLK_PCIE_P0_AHB_EN>,
-++			 <&pciesys CLK_PCIE_P1_AUX_EN>,
-++			 <&pciesys CLK_PCIE_P1_AXI_EN>,
-++			 <&pciesys CLK_PCIE_P1_OBFF_EN>,
-++			 <&pciesys CLK_PCIE_P1_PIPE_EN>;
-++		clock-names = "sys_ck1", "ahb_ck1", "aux_ck1",
-++			      "axi_ck1", "obff_ck1", "pipe_ck1";
-++
-++		power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>;
-++		bus-range = <0x00 0xff>;
-++		ranges = <0x82000000 0 0x28000000  0x0 0x28000000  0 0x8000000>;
-++		status = "disabled";
-++
-++		slot1: pcie@1,0 {
-+ 			reg = <0x0800 0 0 0 0>;
-+ 			#address-cells = <3>;
-+ 			#size-cells = <2>;
-+ 			#interrupt-cells = <1>;
-+ 			ranges;
-+-			status = "disabled";
-+-
-+ 			interrupt-map-mask = <0 0 0 7>;
-+ 			interrupt-map = <0 0 0 1 &pcie_intc1 0>,
-+ 					<0 0 0 2 &pcie_intc1 1>,
-+--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
-++++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
-+@@ -232,18 +232,16 @@
-+ 	};
-+ };
-+ 
-+-&pcie {
-++&pcie0 {
-+ 	pinctrl-names = "default";
-+-	pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>;
-++	pinctrl-0 = <&pcie0_pins>;
-+ 	status = "okay";
-++};
-+ 
-+-	pcie@0,0 {
-+-		status = "okay";
-+-	};
-+-
-+-	pcie@1,0 {
-+-		status = "okay";
-+-	};
-++&pcie1 {
-++	pinctrl-names = "default";
-++	pinctrl-0 = <&pcie1_pins>;
-++	status = "okay";
-+ };
-+ 
-+ &pio {
-diff --git a/target/linux/mediatek/patches-5.10/603-ARM-dts-mediatek-Update-mt7629-PCIe-node.patch b/target/linux/mediatek/patches-5.10/603-ARM-dts-mediatek-Update-mt7629-PCIe-node.patch
-new file mode 100644
-index 0000000000..799cc31ab7
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/603-ARM-dts-mediatek-Update-mt7629-PCIe-node.patch
-@@ -0,0 +1,203 @@
-+From patchwork Thu May 28 06:16:48 2020
-+Content-Type: text/plain; charset="utf-8"
-+MIME-Version: 1.0
-+Content-Transfer-Encoding: 7bit
-+X-Patchwork-Submitter: Chuanjia Liu <chuanjia.liu@mediatek.com>
-+X-Patchwork-Id: 11574797
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-+From: <chuanjia.liu@mediatek.com>
-+To: <robh+dt@kernel.org>, <ryder.lee@mediatek.com>, <matthias.bgg@gmail.com>
-+Subject: [PATCH v2 4/4] ARM: dts: mediatek: Update mt7629 PCIe node
-+Date: Thu, 28 May 2020 14:16:48 +0800
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-+Cc: devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com,
-+ srv_heupstream@mediatek.com, "chuanjia.liu" <Chuanjia.Liu@mediatek.com>,
-+ linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
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-+
-+From: "chuanjia.liu" <Chuanjia.Liu@mediatek.com>
-+
-+Remove unused property and add pciecfg node.
-+
-+Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com>
-+---
-+ arch/arm/boot/dts/mt7629-rfb.dts |  3 ++-
-+ arch/arm/boot/dts/mt7629.dtsi    | 23 +++++++++++++----------
-+ 2 files changed, 15 insertions(+), 11 deletions(-)
-+
-+--- a/arch/arm/boot/dts/mt7629-rfb.dts
-++++ b/arch/arm/boot/dts/mt7629-rfb.dts
-+@@ -144,9 +144,10 @@
-+ 	};
-+ };
-+ 
-+-&pcie {
-++&pcie1 {
-+ 	pinctrl-names = "default";
-+ 	pinctrl-0 = <&pcie_pins>;
-++	status = "okay";
-+ };
-+ 
-+ &pciephy1 {
-+--- a/arch/arm/boot/dts/mt7629.dtsi
-++++ b/arch/arm/boot/dts/mt7629.dtsi
-+@@ -382,16 +382,21 @@
-+ 			#reset-cells = <1>;
-+ 		};
-+ 
-+-		pcie: pcie@1a140000 {
-++		pciecfg: pciecfg@1a140000 {
-++			compatible = "mediatek,mt7629-pciecfg", "syscon";
-++			reg = <0x1a140000 0x1000>;
-++		};
-++
-++		pcie1: pcie@1a145000 {
-+ 			compatible = "mediatek,mt7629-pcie";
-+ 			device_type = "pci";
-+-			reg = <0x1a140000 0x1000>,
-+-			      <0x1a145000 0x1000>;
-+-			reg-names = "subsys","port1";
-++			reg = <0x1a145000 0x1000>;
-++			reg-names = "port1";
-++			mediatek,pcie-cfg = <&pciecfg>;
-+ 			#address-cells = <3>;
-+ 			#size-cells = <2>;
-+-			interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_LOW>,
-+-				     <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
-++			interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
-++			interrupt-names = "pcie_irq";
-+ 			clocks = <&pciesys CLK_PCIE_P1_MAC_EN>,
-+ 				 <&pciesys CLK_PCIE_P0_AHB_EN>,
-+ 				 <&pciesys CLK_PCIE_P1_AUX_EN>,
-+@@ -412,21 +417,19 @@
-+ 			power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>;
-+ 			bus-range = <0x00 0xff>;
-+ 			ranges = <0x82000000 0 0x20000000 0x20000000 0 0x10000000>;
-++			status = "disabled";
-+ 
-+-			pcie1: pcie@1,0 {
-+-				device_type = "pci";
-++			slot1: pcie@1,0 {
-+ 				reg = <0x0800 0 0 0 0>;
-+ 				#address-cells = <3>;
-+ 				#size-cells = <2>;
-+ 				#interrupt-cells = <1>;
-+ 				ranges;
-+-				num-lanes = <1>;
-+ 				interrupt-map-mask = <0 0 0 7>;
-+ 				interrupt-map = <0 0 0 1 &pcie_intc1 0>,
-+ 						<0 0 0 2 &pcie_intc1 1>,
-+ 						<0 0 0 3 &pcie_intc1 2>,
-+ 						<0 0 0 4 &pcie_intc1 3>;
-+-
-+ 				pcie_intc1: interrupt-controller {
-+ 					interrupt-controller;
-+ 					#address-cells = <0>;
-diff --git a/target/linux/mediatek/patches-5.10/610-pcie-mediatek-fix-clearing-interrupt-status.patch b/target/linux/mediatek/patches-5.10/610-pcie-mediatek-fix-clearing-interrupt-status.patch
-new file mode 100644
-index 0000000000..7b74a8ac73
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/610-pcie-mediatek-fix-clearing-interrupt-status.patch
-@@ -0,0 +1,24 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Fri, 4 Sep 2020 18:33:27 +0200
-+Subject: [PATCH] pcie-mediatek: fix clearing interrupt status
-+
-+Clearing the status needs to happen after running the handler, otherwise
-+we will get an extra spurious interrupt after the cause has been cleared
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/drivers/pci/controller/pcie-mediatek.c
-++++ b/drivers/pci/controller/pcie-mediatek.c
-+@@ -613,10 +613,10 @@ static void mtk_pcie_intr_handler(struct
-+ 	if (status & INTX_MASK) {
-+ 		for_each_set_bit_from(bit, &status, PCI_NUM_INTX + INTX_SHIFT) {
-+ 			/* Clear the INTx */
-+-			writel(1 << bit, port->base + PCIE_INT_STATUS);
-+ 			virq = irq_find_mapping(port->irq_domain,
-+ 						bit - INTX_SHIFT);
-+ 			generic_handle_irq(virq);
-++			writel(1 << bit, port->base + PCIE_INT_STATUS);
-+ 		}
-+ 	}
-+ 
-diff --git a/target/linux/mediatek/patches-5.10/700-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch b/target/linux/mediatek/patches-5.10/700-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch
-new file mode 100644
-index 0000000000..e617d9ad66
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/700-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch
-@@ -0,0 +1,85 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Fri, 4 Sep 2020 18:36:06 +0200
-+Subject: [PATCH] net: ethernet: mtk_eth_soc: add support for coherent DMA
-+
-+It improves performance by eliminating the need for a cache flush on rx and tx
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-+@@ -364,7 +364,7 @@
-+ 		};
-+ 
-+ 		cci_control2: slave-if@5000 {
-+-			compatible = "arm,cci-400-ctrl-if";
-++			compatible = "arm,cci-400-ctrl-if", "syscon";
-+ 			interface-type = "ace";
-+ 			reg = <0x5000 0x1000>;
-+ 		};
-+@@ -976,6 +976,8 @@
-+ 		power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>;
-+ 		mediatek,ethsys = <&ethsys>;
-+ 		mediatek,sgmiisys = <&sgmiisys>;
-++		mediatek,cci-control = <&cci_control2>;
-++		dma-coherent;
-+ 		#address-cells = <1>;
-+ 		#size-cells = <0>;
-+ 		status = "disabled";
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+@@ -9,6 +9,7 @@
-+ #include <linux/of_device.h>
-+ #include <linux/of_mdio.h>
-+ #include <linux/of_net.h>
-++#include <linux/of_address.h>
-+ #include <linux/mfd/syscon.h>
-+ #include <linux/regmap.h>
-+ #include <linux/clk.h>
-+@@ -2482,6 +2483,13 @@ static int mtk_hw_init(struct mtk_eth *e
-+ 	if (ret)
-+ 		goto err_disable_pm;
-+ 
-++	if (of_dma_is_coherent(eth->dev->of_node)) {
-++		u32 mask = ETHSYS_DMA_AG_MAP_PDMA | ETHSYS_DMA_AG_MAP_QDMA |
-++			   ETHSYS_DMA_AG_MAP_PPE;
-++
-++		regmap_update_bits(eth->ethsys, ETHSYS_DMA_AG_MAP, mask, mask);
-++	}
-++
-+ 	if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
-+ 		ret = device_reset(eth->dev);
-+ 		if (ret) {
-+@@ -3061,6 +3069,16 @@ static int mtk_probe(struct platform_dev
-+ 		}
-+ 	}
-+ 
-++	if (of_dma_is_coherent(pdev->dev.of_node)) {
-++		struct regmap *cci;
-++
-++		cci = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
-++						      "mediatek,cci-control");
-++		/* enable CPU/bus coherency */
-++		if (!IS_ERR(cci))
-++			regmap_write(cci, 0, 3);
-++	}
-++
-+ 	if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) {
-+ 		eth->sgmii = devm_kzalloc(eth->dev, sizeof(*eth->sgmii),
-+ 					  GFP_KERNEL);
-+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-+@@ -437,6 +437,12 @@
-+ #define RSTCTRL_FE		BIT(6)
-+ #define RSTCTRL_PPE		BIT(31)
-+ 
-++/* ethernet dma channel agent map */
-++#define ETHSYS_DMA_AG_MAP	0x408
-++#define ETHSYS_DMA_AG_MAP_PDMA	BIT(0)
-++#define ETHSYS_DMA_AG_MAP_QDMA	BIT(1)
-++#define ETHSYS_DMA_AG_MAP_PPE	BIT(2)
-++
-+ /* SGMII subsystem config registers */
-+ /* Register to auto-negotiation restart */
-+ #define SGMSYS_PCS_CONTROL_1	0x0
-diff --git a/target/linux/mediatek/patches-5.10/710-pci-pcie-mediatek-add-support-for-coherent-DMA.patch b/target/linux/mediatek/patches-5.10/710-pci-pcie-mediatek-add-support-for-coherent-DMA.patch
-new file mode 100644
-index 0000000000..e3800bdf9d
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/710-pci-pcie-mediatek-add-support-for-coherent-DMA.patch
-@@ -0,0 +1,108 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Fri, 4 Sep 2020 18:42:42 +0200
-+Subject: [PATCH] pci: pcie-mediatek: add support for coherent DMA
-+
-+It improves performance by eliminating the need for a cache flush for DMA on
-+attached devices
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-+@@ -812,6 +812,8 @@
-+ 		reg = <0 0x1a143000 0 0x1000>;
-+ 		reg-names = "port0";
-+ 		mediatek,pcie-cfg = <&pciecfg>;
-++		mediatek,hifsys = <&hifsys>;
-++		mediatek,cci-control = <&cci_control2>;
-+ 		#address-cells = <3>;
-+ 		#size-cells = <2>;
-+ 		interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>;
-+@@ -829,6 +831,7 @@
-+ 		bus-range = <0x00 0xff>;
-+ 		ranges = <0x82000000 0 0x20000000  0x0 0x20000000  0 0x8000000>;
-+ 		status = "disabled";
-++		dma-coherent;
-+ 
-+ 		slot0: pcie@0,0 {
-+ 			reg = <0x0000 0 0 0 0>;
-+@@ -855,6 +858,8 @@
-+ 		reg = <0 0x1a145000 0 0x1000>;
-+ 		reg-names = "port1";
-+ 		mediatek,pcie-cfg = <&pciecfg>;
-++		mediatek,hifsys = <&hifsys>;
-++		mediatek,cci-control = <&cci_control2>;
-+ 		#address-cells = <3>;
-+ 		#size-cells = <2>;
-+ 		interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
-+@@ -873,6 +878,7 @@
-+ 		bus-range = <0x00 0xff>;
-+ 		ranges = <0x82000000 0 0x28000000  0x0 0x28000000  0 0x8000000>;
-+ 		status = "disabled";
-++		dma-coherent;
-+ 
-+ 		slot1: pcie@1,0 {
-+ 			reg = <0x0800 0 0 0 0>;
-+@@ -932,6 +938,11 @@
-+ 		};
-+ 	};
-+ 
-++	hifsys: syscon@1af00000 {
-++		compatible = "mediatek,mt7622-hifsys", "syscon";
-++		reg = <0 0x1af00000 0 0x70>;
-++	};
-++
-+ 	ethsys: syscon@1b000000 {
-+ 		compatible = "mediatek,mt7622-ethsys",
-+ 			     "syscon";
-+--- a/drivers/pci/controller/pcie-mediatek.c
-++++ b/drivers/pci/controller/pcie-mediatek.c
-+@@ -20,6 +20,7 @@
-+ #include <linux/of_address.h>
-+ #include <linux/of_pci.h>
-+ #include <linux/of_platform.h>
-++#include <linux/of_address.h>
-+ #include <linux/pci.h>
-+ #include <linux/phy/phy.h>
-+ #include <linux/platform_device.h>
-+@@ -139,6 +140,11 @@
-+ #define PCIE_LINK_STATUS_V2	0x804
-+ #define PCIE_PORT_LINKUP_V2	BIT(10)
-+ 
-++/* DMA channel mapping */
-++#define HIFSYS_DMA_AG_MAP	0x008
-++#define HIFSYS_DMA_AG_MAP_PCIE0	BIT(0)
-++#define HIFSYS_DMA_AG_MAP_PCIE1	BIT(1)
-++
-+ struct mtk_pcie_port;
-+ 
-+ /**
-+@@ -1040,6 +1046,27 @@ static int mtk_pcie_setup(struct mtk_pci
-+ 	struct mtk_pcie_port *port, *tmp;
-+ 	int err;
-+ 
-++	if (of_dma_is_coherent(node)) {
-++		struct regmap *con;
-++		u32 mask;
-++
-++		con = syscon_regmap_lookup_by_phandle(node,
-++						      "mediatek,cci-control");
-++		/* enable CPU/bus coherency */
-++		if (!IS_ERR(con))
-++			regmap_write(con, 0, 3);
-++
-++		con = syscon_regmap_lookup_by_phandle(node,
-++						      "mediatek,hifsys");
-++		if (IS_ERR(con)) {
-++			dev_err(dev, "missing hifsys node\n");
-++			return PTR_ERR(con);
-++		}
-++
-++		mask = HIFSYS_DMA_AG_MAP_PCIE0 | HIFSYS_DMA_AG_MAP_PCIE1;
-++		regmap_update_bits(con, HIFSYS_DMA_AG_MAP, mask, mask);
-++	}
-++
-+ 	for_each_available_child_of_node(node, child) {
-+ 		int slot;
-+ 
-diff --git a/target/linux/mediatek/patches-5.10/800-ubnt-ledbar-driver.patch b/target/linux/mediatek/patches-5.10/800-ubnt-ledbar-driver.patch
-new file mode 100644
-index 0000000000..013391e1d9
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/800-ubnt-ledbar-driver.patch
-@@ -0,0 +1,29 @@
-+--- a/drivers/leds/Kconfig
-++++ b/drivers/leds/Kconfig
-+@@ -928,6 +928,16 @@ config LEDS_ACER_A500
-+ 	  This option enables support for the Power Button LED of
-+ 	  Acer Iconia Tab A500.
-+ 
-++config LEDS_UBNT_LEDBAR
-++	tristate "LED support for Ubiquiti UniFi 6 LR"
-++	depends on LEDS_CLASS && I2C && OF
-++	help
-++	  This option enables support for the Ubiquiti LEDBAR
-++	  LED driver.
-++
-++	  To compile this driver as a module, choose M here: the module
-++	  will be called leds-ubnt-ledbar.
-++
-+ comment "LED Triggers"
-+ source "drivers/leds/trigger/Kconfig"
-+ 
-+--- a/drivers/leds/Makefile
-++++ b/drivers/leds/Makefile
-+@@ -93,6 +93,7 @@ obj-$(CONFIG_LEDS_TURRIS_OMNIA)		+= leds
-+ obj-$(CONFIG_LEDS_WM831X_STATUS)	+= leds-wm831x-status.o
-+ obj-$(CONFIG_LEDS_WM8350)		+= leds-wm8350.o
-+ obj-$(CONFIG_LEDS_WRAP)			+= leds-wrap.o
-++obj-$(CONFIG_LEDS_UBNT_LEDBAR)		+= leds-ubnt-ledbar.o
-+ 
-+ # LED SPI Drivers
-+ obj-$(CONFIG_LEDS_CR0014114)		+= leds-cr0014114.o
-diff --git a/target/linux/mediatek/patches-5.10/900-dts-mt7622-bpi-r64-aliases-for-dtoverlay.patch b/target/linux/mediatek/patches-5.10/900-dts-mt7622-bpi-r64-aliases-for-dtoverlay.patch
-new file mode 100644
-index 0000000000..4c6df93089
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.10/900-dts-mt7622-bpi-r64-aliases-for-dtoverlay.patch
-@@ -0,0 +1,80 @@
-+--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-++++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-+@@ -279,14 +279,14 @@
-+ &pcie1 {
-+ 	pinctrl-names = "default";
-+ 	pinctrl-0 = <&pcie1_pins>;
-+-	status = "okay";
-++	status = "disabled";
-+ };
-+ 
-+ &pio {
-+ 	/* Attention: GPIO 90 is used to switch between PCIe@1,0 and
-+ 	 * SATA functions. i.e. output-high: PCIe, output-low: SATA
-+ 	 */
-+-	asm_sel {
-++	asmsel: asm_sel {
-+ 		gpio-hog;
-+ 		gpios = <90 GPIO_ACTIVE_HIGH>;
-+ 		output-high;
-+--- /dev/null
-++++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64-sata.dts
-+@@ -0,0 +1,31 @@
-++/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
-++
-++#include <dt-bindings/gpio/gpio.h>
-++
-++/dts-v1/;
-++/plugin/;
-++
-++/ {
-++	compatible = "bananapi,bpi-r64", "mediatek,mt7622";
-++
-++	fragment@0 {
-++		target = <&asmsel>;
-++		__overlay__ {
-++			gpios = <90 GPIO_ACTIVE_LOW>;
-++		};
-++	};
-++
-++	fragment@1 {
-++		target = <&sata>;
-++		__overlay__ {
-++			status = "okay";
-++		};
-++	};
-++
-++	fragment@2 {
-++		target = <&sata_phy>;
-++		__overlay__ {
-++			status = "okay";
-++		};
-++	};
-++};
-+--- /dev/null
-++++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64-pcie1.dts
-+@@ -0,0 +1,24 @@
-++/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
-++
-++#include <dt-bindings/gpio/gpio.h>
-++
-++/dts-v1/;
-++/plugin/;
-++
-++/ {
-++	compatible = "bananapi,bpi-r64", "mediatek,mt7622";
-++
-++	fragment@0 {
-++		target = <&asmsel>;
-++		__overlay__ {
-++			gpios = <90 GPIO_ACTIVE_HIGH>;
-++		};
-++	};
-++
-++	fragment@1 {
-++		target = <&pcie1>;
-++		__overlay__ {
-++			status = "okay";
-++		};
-++	};
-++};
-diff --git a/target/linux/mediatek/patches-5.4/0227-arm-dts-Add-Unielec-U7623-DTS.patch b/target/linux/mediatek/patches-5.4/0227-arm-dts-Add-Unielec-U7623-DTS.patch
-deleted file mode 100644
-index 3cb1dab69f..0000000000
---- a/target/linux/mediatek/patches-5.4/0227-arm-dts-Add-Unielec-U7623-DTS.patch
-+++ /dev/null
-@@ -1,387 +0,0 @@
--From 004eb24e939b5b31f828333f37fb5cb2a877d6f2 Mon Sep 17 00:00:00 2001
--From: Kristian Evensen <kristian.evensen@gmail.com>
--Date: Sun, 17 Jun 2018 14:41:47 +0200
--Subject: [PATCH] arm: dts: Add Unielec U7623 DTS
--
-----
-- arch/arm/boot/dts/Makefile                         |   1 +
-- .../dts/mt7623a-unielec-u7623-02-emmc-512m.dts     |  18 +
-- .../boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi    | 366 +++++++++++++++++++++
-- 3 files changed, 385 insertions(+)
-- create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512m.dts
-- create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi
--
----- a/arch/arm/boot/dts/Makefile
--+++ b/arch/arm/boot/dts/Makefile
--@@ -1272,6 +1272,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
-- 	mt7623a-rfb-nand.dtb \
-- 	mt7623n-rfb-emmc.dtb \
-- 	mt7623n-bananapi-bpi-r2.dtb \
--+	mt7623a-unielec-u7623-02-emmc-512m.dtb \
-- 	mt7629-rfb.dtb \
-- 	mt8127-moose.dtb \
-- 	mt8135-evbp1.dtb
----- /dev/null
--+++ b/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512m.dts
--@@ -0,0 +1,18 @@
--+/*
--+ * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
--+ *
--+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
--+ */
--+
--+/dts-v1/;
--+#include "mt7623a-unielec-u7623-02-emmc.dtsi"
--+
--+/ {
--+	model = "UniElec U7623-02 eMMC (512M RAM)";
--+	compatible = "unielec,u7623-02-emmc-512m", "unielec,u7623-02-emmc", "mediatek,mt7623";
--+
--+	memory@80000000 {
--+		device_type = "memory";
--+		reg = <0 0x80000000 0 0x20000000>;
--+	};
--+};
----- /dev/null
--+++ b/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi
--@@ -0,0 +1,340 @@
--+/*
--+ * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
--+ *
--+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
--+ */
--+
--+#include <dt-bindings/input/input.h>
--+#include "mt7623.dtsi"
--+#include "mt6323.dtsi"
--+
--+/ {
--+	compatible = "unielec,u7623-02-emmc", "mediatek,mt7623";
--+
--+	aliases {
--+		serial2 = &uart2;
--+	};
--+
--+	chosen {
--+		bootargs = "root=/dev/mmcblk0p2 rootfstype=squashfs,f2fs console=ttyS0,115200 blkdevparts=mmcblk0:3M@6M(recovery),256M@9M(root)";
--+		stdout-path = "serial2:115200n8";
--+	};
--+
--+	cpus {
--+		cpu@0 {
--+			proc-supply = <&mt6323_vproc_reg>;
--+		};
--+
--+		cpu@1 {
--+			proc-supply = <&mt6323_vproc_reg>;
--+		};
--+
--+		cpu@2 {
--+			proc-supply = <&mt6323_vproc_reg>;
--+		};
--+
--+		cpu@3 {
--+			proc-supply = <&mt6323_vproc_reg>;
--+		};
--+	};
--+
--+	reg_1p8v: regulator-1p8v {
--+		compatible = "regulator-fixed";
--+		regulator-name = "fixed-1.8V";
--+		regulator-min-microvolt = <1800000>;
--+		regulator-max-microvolt = <1800000>;
--+		regulator-boot-on;
--+		regulator-always-on;
--+	};
--+
--+	reg_3p3v: regulator-3p3v {
--+		compatible = "regulator-fixed";
--+		regulator-name = "fixed-3.3V";
--+		regulator-min-microvolt = <3300000>;
--+		regulator-max-microvolt = <3300000>;
--+		regulator-boot-on;
--+		regulator-always-on;
--+	};
--+
--+	reg_5v: regulator-5v {
--+		compatible = "regulator-fixed";
--+		regulator-name = "fixed-5V";
--+		regulator-min-microvolt = <5000000>;
--+		regulator-max-microvolt = <5000000>;
--+		regulator-boot-on;
--+		regulator-always-on;
--+	};
--+
--+	gpio-keys {
--+		compatible = "gpio-keys";
--+		pinctrl-names = "default";
--+		pinctrl-0 = <&key_pins_a>;
--+
--+		factory {
--+			label = "factory";
--+			linux,code = <KEY_RESTART>;
--+			gpios = <&pio 256 GPIO_ACTIVE_LOW>;
--+		};
--+	};
--+
--+	leds {
--+		compatible = "gpio-leds";
--+		pinctrl-names = "default";
--+		pinctrl-0 = <&led_pins_unielec>;
--+
--+		led3 {
--+			label = "u7623-01:green:led3";
--+			gpios = <&pio 14 GPIO_ACTIVE_LOW>;
--+		};
--+
--+		led4 {
--+			label = "u7623-01:green:led4";
--+			gpios = <&pio 15 GPIO_ACTIVE_LOW>;
--+		};
--+	};
--+};
--+
--+&crypto {
--+	status = "okay";
--+};
--+
--+&eth {
--+	status = "okay";
--+
--+	gmac0: mac@0 {
--+		compatible = "mediatek,eth-mac";
--+		reg = <0>;
--+		phy-mode = "trgmii";
--+
--+		fixed-link {
--+			speed = <1000>;
--+			full-duplex;
--+			pause;
--+		};
--+	};
--+
--+	mdio: mdio-bus {
--+		#address-cells = <1>;
--+		#size-cells = <0>;
--+
--+		mt7530: switch@0 {
--+			compatible = "mediatek,mt7530";
--+		};
--+	};
--+};
--+
--+&mt7530 {
--+	compatible = "mediatek,mt7530";
--+	#address-cells = <1>;
--+	#size-cells = <0>;
--+	reg = <0>;
--+	pinctrl-names = "default";
--+	mediatek,mcm;
--+	resets = <&ethsys 2>;
--+	reset-names = "mcm";
--+	core-supply = <&mt6323_vpa_reg>;
--+	io-supply = <&mt6323_vemc3v3_reg>;
--+
--+	dsa,mii-bus = <&mdio>;
--+
--+	ports {
--+		#address-cells = <1>;
--+		#size-cells = <0>;
--+		reg = <0>;
--+
--+		port@0 {
--+			reg = <0>;
--+			label = "lan0";
--+			cpu = <&cpu_port0>;
--+		};
--+
--+		port@1 {
--+			reg = <1>;
--+			label = "lan1";
--+			cpu = <&cpu_port0>;
--+		};
--+
--+		port@2 {
--+			reg = <2>;
--+			label = "lan2";
--+			cpu = <&cpu_port0>;
--+		};
--+
--+		port@3 {
--+			reg = <3>;
--+			label = "lan3";
--+			cpu = <&cpu_port0>;
--+		};
--+
--+		port@4 {
--+			reg = <4>;
--+			label = "wan";
--+			cpu = <&cpu_port0>;
--+		};
--+
--+		cpu_port0: port@6 {
--+			reg = <6>;
--+			label = "cpu";
--+			ethernet = <&gmac0>;
--+			phy-mode = "trgmii";
--+
--+			fixed-link {
--+				speed = <1000>;
--+				full-duplex;
--+			};
--+		};
--+	};
--+};
--+
--+&mmc0 {
--+	pinctrl-names = "default", "state_uhs";
--+	pinctrl-0 = <&mmc0_pins_default>;
--+	pinctrl-1 = <&mmc0_pins_uhs>;
--+	status = "okay";
--+	bus-width = <8>;
--+	max-frequency = <50000000>;
--+	cap-mmc-highspeed;
--+	vmmc-supply = <&reg_3p3v>;
--+	vqmmc-supply = <&reg_1p8v>;
--+	non-removable;
--+};
--+
--+&pio {
--+	key_pins_a: keys-alt {
--+		pins-keys {
--+			pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
--+				 <MT7623_PIN_257_GPIO257_FUNC_GPIO257>;
--+			input-enable;
--+		};
--+	};
--+
--+	led_pins_unielec: leds-unielec {
--+		pins-leds {
--+			pinmux = <MT7623_PIN_14_GPIO14_FUNC_GPIO14>,
--+				 <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
--+		};
--+	};
--+
--+	mmc0_pins_default: mmc0default {
--+		pins_cmd_dat {
--+			pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
--+				 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
--+				 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
--+				 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
--+				 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
--+				 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
--+				 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
--+				 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
--+				 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
--+			input-enable;
--+			bias-pull-up;
--+		};
--+
--+		pins_clk {
--+			pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
--+			bias-pull-down;
--+		};
--+
--+		pins_rst {
--+			pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
--+			bias-pull-up;
--+		};
--+	};
--+
--+	mmc0_pins_uhs: mmc0 {
--+		pins_cmd_dat {
--+			pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
--+				 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
--+				 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
--+				 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
--+				 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
--+				 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
--+				 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
--+				 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
--+				 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
--+			input-enable;
--+			drive-strength = <MTK_DRIVE_2mA>;
--+			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
--+		};
--+
--+		pins_clk {
--+			pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
--+			drive-strength = <MTK_DRIVE_2mA>;
--+			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
--+		};
--+
--+		pins_rst {
--+			pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
--+			bias-pull-up;
--+		};
--+	};
--+
--+	pcie_default: pcie_pin_default {
--+		pins_cmd_dat {
--+			pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
--+				 <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
--+			bias-disable;
--+		};
--+	};
--+};
--+
--+&pwm {
--+	pinctrl-names = "default";
--+	pinctrl-0 = <&pwm_pins_a>;
--+	status = "okay";
--+};
--+
--+&pwrap {
--+	mt6323 {
--+		mt6323led: led {
--+			compatible = "mediatek,mt6323-led";
--+			#address-cells = <1>;
--+			#size-cells = <0>;
--+
--+			led@0 {
--+				reg = <0>;
--+				label = "led0";
--+			};
--+		};
--+	};
--+};
--+
--+&uart2 {
--+	pinctrl-names = "default";
--+	pinctrl-0 = <&uart2_pins_b>;
--+	status = "okay";
--+};
--+
--+&usb1 {
--+	vusb33-supply = <&reg_3p3v>;
--+	vbus-supply = <&reg_3p3v>;
--+	status = "okay";
--+};
--+
--+&u3phy1 {
--+	status = "okay";
--+};
--+
--+&u3phy2 {
--+	status = "okay";
--+	mediatek,phy-switch = <&hifsys>;
--+};
--+
--+&pcie {
--+	pinctrl-names = "default";
--+	pinctrl-0 = <&pcie_default>;
--+	status = "okay";
--+
--+	pcie@1,0 {
--+		status = "okay";
--+	};
--+
--+	pcie@2,0 {
--+		status = "okay";
--+	};
--+};
--+
--+&pcie1_phy {
--+	status = "okay";
--+};
--+
-diff --git a/target/linux/mediatek/patches-5.4/0310-mtk-bmt-support.patch b/target/linux/mediatek/patches-5.4/0310-mtk-bmt-support.patch
-new file mode 100644
-index 0000000000..2a23f8c3dc
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.4/0310-mtk-bmt-support.patch
-@@ -0,0 +1,837 @@
-+--- a/drivers/mtd/nand/Kconfig
-++++ b/drivers/mtd/nand/Kconfig
-+@@ -5,3 +5,7 @@ config MTD_NAND_CORE
-+ source "drivers/mtd/nand/onenand/Kconfig"
-+ source "drivers/mtd/nand/raw/Kconfig"
-+ source "drivers/mtd/nand/spi/Kconfig"
-++
-++config MTD_NAND_MTK_BMT
-++	bool "Support MediaTek NAND Bad-block Management Table"
-++	default n
-+--- a/drivers/mtd/nand/Makefile
-++++ b/drivers/mtd/nand/Makefile
-+@@ -2,6 +2,7 @@
-+ 
-+ nandcore-objs := core.o bbt.o
-+ obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
-++obj-$(CONFIG_MTD_NAND_MTK_BMT)	+= mtk_bmt.o
-+ 
-+ obj-y	+= onenand/
-+ obj-y	+= raw/
-+--- /dev/null
-++++ b/drivers/mtd/nand/mtk_bmt.c
-+@@ -0,0 +1,766 @@
-++/*
-++ * Copyright (c) 2017 MediaTek Inc.
-++ * Author: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
-++ * Copyright (c) 2020 Felix Fietkau <nbd@nbd.name>
-++ *
-++ * This program is free software; you can redistribute it and/or modify
-++ * it under the terms of the GNU General Public License version 2 as
-++ * published by the Free Software Foundation.
-++ *
-++ * This program is distributed in the hope that it will be useful,
-++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-++ * GNU General Public License for more details.
-++ */
-++
-++#include <linux/slab.h>
-++#include <linux/gfp.h>
-++#include <linux/kernel.h>
-++#include <linux/of.h>
-++#include <linux/mtd/nand.h>
-++#include <linux/mtd/partitions.h>
-++#include <linux/mtd/mtk_bmt.h>
-++#include <linux/module.h>
-++#include <linux/debugfs.h>
-++
-++#define MAIN_SIGNATURE_OFFSET   0
-++#define OOB_SIGNATURE_OFFSET    1
-++#define BBPOOL_RATIO		2
-++
-++#define BBT_LOG(fmt, ...) pr_debug("[BBT][%s|%d] "fmt"\n", __func__, __LINE__, ##__VA_ARGS__)
-++
-++/* Maximum 8k blocks */
-++#define BB_TABLE_MAX	0x2000U
-++#define BMT_TABLE_MAX	(BB_TABLE_MAX * BBPOOL_RATIO / 100)
-++#define BMT_TBL_DEF_VAL	0x0
-++
-++/*
-++ * Burner Bad Block Table
-++ * --------- Only support SLC Nand Chips!!!!!!!!!!! ----------
-++ */
-++
-++struct bbbt {
-++	char signature[3];
-++	/* This version is used to distinguish the legacy and new algorithm */
-++#define BBMT_VERSION		2
-++	unsigned char version;
-++	/* Below 2 tables will be written in SLC */
-++	u16 bb_tbl[BB_TABLE_MAX];
-++	struct bbmt {
-++		u16 block;
-++#define NO_MAPPED		0
-++#define NORMAL_MAPPED	1
-++#define BMT_MAPPED		2
-++		u16 mapped;
-++	} bmt_tbl[BMT_TABLE_MAX];
-++};
-++
-++static struct bmt_desc {
-++	struct mtd_info *mtd;
-++
-++	int (*_read_oob) (struct mtd_info *mtd, loff_t from,
-++			  struct mtd_oob_ops *ops);
-++	int (*_write_oob) (struct mtd_info *mtd, loff_t to,
-++			   struct mtd_oob_ops *ops);
-++	const struct nand_ops *nand_ops;
-++
-++	struct bbbt *bbt;
-++
-++	struct dentry *debugfs_dir;
-++
-++	u32 pg_size;
-++	u32 blk_size;
-++	u16 pg_shift;
-++	u16 blk_shift;
-++	/* bbt logical address */
-++	u16 pool_lba;
-++	/* bbt physical address */
-++	u16 pool_pba;
-++	/* Maximum count of bad blocks that the vendor guaranteed */
-++	u16 bb_max;
-++	/* Total blocks of the Nand Chip */
-++	u16 total_blks;
-++	/* The block(n) BMT is located at (bmt_tbl[n]) */
-++	u16 bmt_blk_idx;
-++	/* How many pages needs to store 'struct bbbt' */
-++	u32 bmt_pgs;
-++
-++	/* to compensate for driver level remapping */
-++	u8 oob_offset;
-++} bmtd = {0};
-++
-++static unsigned char *nand_bbt_buf;
-++static unsigned char *nand_data_buf;
-++
-++/* -------- Unit conversions -------- */
-++static inline u32 blk_pg(u16 block)
-++{
-++	return (u32)(block << (bmtd.blk_shift - bmtd.pg_shift));
-++}
-++
-++/* -------- Nand operations wrapper -------- */
-++static inline int
-++bbt_nand_read(u32 page, unsigned char *dat, int dat_len,
-++	      unsigned char *fdm, int fdm_len)
-++{
-++	struct mtd_oob_ops ops = {
-++		.mode = MTD_OPS_PLACE_OOB,
-++		.ooboffs = bmtd.oob_offset,
-++		.oobbuf = fdm,
-++		.ooblen = fdm_len,
-++		.datbuf = dat,
-++		.len = dat_len,
-++	};
-++
-++	return bmtd._read_oob(bmtd.mtd, page << bmtd.pg_shift, &ops);
-++}
-++
-++static inline int bbt_nand_erase(u16 block)
-++{
-++	struct nand_device *nand = mtd_to_nanddev(bmtd.mtd);
-++	loff_t addr = (loff_t)block << bmtd.blk_shift;
-++	struct nand_pos pos;
-++
-++	nanddev_offs_to_pos(nand, addr, &pos);
-++	return bmtd.nand_ops->erase(nand, &pos);
-++}
-++
-++/* -------- Bad Blocks Management -------- */
-++static int
-++read_bmt(u16 block, unsigned char *dat, unsigned char *fdm, int fdm_len)
-++{
-++	u32 len = bmtd.bmt_pgs << bmtd.pg_shift;
-++
-++	return bbt_nand_read(blk_pg(block), dat, len, fdm, fdm_len);
-++}
-++
-++static int write_bmt(u16 block, unsigned char *dat)
-++{
-++	struct mtd_oob_ops ops = {
-++		.mode = MTD_OPS_PLACE_OOB,
-++		.ooboffs = OOB_SIGNATURE_OFFSET + bmtd.oob_offset,
-++		.oobbuf = "bmt",
-++		.ooblen = 3,
-++		.datbuf = dat,
-++		.len = bmtd.bmt_pgs << bmtd.pg_shift,
-++	};
-++	loff_t addr = (loff_t)block << bmtd.blk_shift;
-++
-++	return bmtd._write_oob(bmtd.mtd, addr, &ops);
-++}
-++
-++static u16 find_valid_block(u16 block)
-++{
-++	u8 fdm[4];
-++	int ret;
-++	int loop = 0;
-++
-++retry:
-++	if (block >= bmtd.total_blks)
-++		return 0;
-++
-++	ret = bbt_nand_read(blk_pg(block), nand_data_buf, bmtd.pg_size,
-++			    fdm, sizeof(fdm));
-++	/* Read the 1st byte of FDM to judge whether it's a bad
-++	 * or not
-++	 */
-++	if (ret || fdm[0] != 0xff) {
-++		pr_info("nand: found bad block 0x%x\n", block);
-++		if (loop >= bmtd.bb_max) {
-++			pr_info("nand: FATAL ERR: too many bad blocks!!\n");
-++			return 0;
-++		}
-++
-++		loop++;
-++		block++;
-++		goto retry;
-++	}
-++
-++	return block;
-++}
-++
-++/* Find out all bad blocks, and fill in the mapping table */
-++static int scan_bad_blocks(struct bbbt *bbt)
-++{
-++	int i;
-++	u16 block = 0;
-++
-++	/* First time download, the block0 MUST NOT be a bad block,
-++	 * this is guaranteed by vendor
-++	 */
-++	bbt->bb_tbl[0] = 0;
-++
-++	/*
-++	 * Construct the mapping table of Normal data area(non-PMT/BMTPOOL)
-++	 * G - Good block; B - Bad block
-++	 *			---------------------------
-++	 * physical |G|G|B|G|B|B|G|G|G|G|B|G|B|
-++	 *			---------------------------
-++	 * What bb_tbl[i] looks like:
-++	 *   physical block(i):
-++	 *			 0 1 2 3 4 5 6 7 8 9 a b c
-++	 *   mapped block(bb_tbl[i]):
-++	 *			 0 1 3 6 7 8 9 b ......
-++	 * ATTENTION:
-++	 *		If new bad block ocurred(n), search bmt_tbl to find
-++	 *		a available block(x), and fill in the bb_tbl[n] = x;
-++	 */
-++	for (i = 1; i < bmtd.pool_lba; i++) {
-++		bbt->bb_tbl[i] = find_valid_block(bbt->bb_tbl[i - 1] + 1);
-++		BBT_LOG("bb_tbl[0x%x] = 0x%x", i, bbt->bb_tbl[i]);
-++		if (bbt->bb_tbl[i] == 0)
-++			return -1;
-++	}
-++
-++	/* Physical Block start Address of BMT pool */
-++	bmtd.pool_pba = bbt->bb_tbl[i - 1] + 1;
-++	if (bmtd.pool_pba >= bmtd.total_blks - 2) {
-++		pr_info("nand: FATAL ERR: Too many bad blocks!!\n");
-++		return -1;
-++	}
-++
-++	BBT_LOG("pool_pba=0x%x", bmtd.pool_pba);
-++	i = 0;
-++	block = bmtd.pool_pba;
-++	/*
-++	 * The bmt table is used for runtime bad block mapping
-++	 * G - Good block; B - Bad block
-++	 *			---------------------------
-++	 * physical |G|G|B|G|B|B|G|G|G|G|B|G|B|
-++	 *			---------------------------
-++	 *   block:	 0 1 2 3 4 5 6 7 8 9 a b c
-++	 * What bmt_tbl[i] looks like in initial state:
-++	 *   i:
-++	 *			 0 1 2 3 4 5 6 7
-++	 *   bmt_tbl[i].block:
-++	 *			 0 1 3 6 7 8 9 b
-++	 *   bmt_tbl[i].mapped:
-++	 *			 N N N N N N N B
-++	 *		N - Not mapped(Available)
-++	 *		M - Mapped
-++	 *		B - BMT
-++	 * ATTENTION:
-++	 *		BMT always in the last valid block in pool
-++	 */
-++	while ((block = find_valid_block(block)) != 0) {
-++		bbt->bmt_tbl[i].block = block;
-++		bbt->bmt_tbl[i].mapped = NO_MAPPED;
-++		BBT_LOG("bmt_tbl[%d].block = 0x%x", i, block);
-++		block++;
-++		i++;
-++	}
-++
-++	/* i - How many available blocks in pool, which is the length of bmt_tbl[]
-++	 * bmtd.bmt_blk_idx - bmt_tbl[bmtd.bmt_blk_idx].block => the BMT block
-++	 */
-++	bmtd.bmt_blk_idx = i - 1;
-++	bbt->bmt_tbl[bmtd.bmt_blk_idx].mapped = BMT_MAPPED;
-++
-++	if (i < 1) {
-++		pr_info("nand: FATAL ERR: no space to store BMT!!\n");
-++		return -1;
-++	}
-++
-++	pr_info("[BBT] %d available blocks in BMT pool\n", i);
-++
-++	return 0;
-++}
-++
-++static bool is_valid_bmt(unsigned char *buf, unsigned char *fdm)
-++{
-++	struct bbbt *bbt = (struct bbbt *)buf;
-++	u8 *sig = (u8*)bbt->signature + MAIN_SIGNATURE_OFFSET;
-++
-++
-++	if (memcmp(bbt->signature + MAIN_SIGNATURE_OFFSET, "BMT", 3) == 0 &&
-++		memcmp(fdm + OOB_SIGNATURE_OFFSET, "bmt", 3) == 0) {
-++		if (bbt->version == BBMT_VERSION)
-++			return true;
-++	}
-++	BBT_LOG("[BBT] BMT Version not match,upgrage preloader and uboot please! sig=%02x%02x%02x, fdm=%02x%02x%02x",
-++		sig[0], sig[1], sig[2],
-++		fdm[1], fdm[2], fdm[3]);
-++	return false;
-++}
-++
-++static u16 get_bmt_index(struct bbmt *bmt)
-++{
-++	int i = 0;
-++
-++	while (bmt[i].block != BMT_TBL_DEF_VAL) {
-++		if (bmt[i].mapped == BMT_MAPPED)
-++			return i;
-++		i++;
-++	}
-++	return 0;
-++}
-++
-++static struct bbbt *scan_bmt(u16 block)
-++{
-++	u8 fdm[4];
-++
-++	if (block < bmtd.pool_lba)
-++		return NULL;
-++
-++	if (read_bmt(block, nand_bbt_buf, fdm, sizeof(fdm)))
-++		return scan_bmt(block - 1);
-++
-++	if (is_valid_bmt(nand_bbt_buf, fdm)) {
-++		bmtd.bmt_blk_idx = get_bmt_index(((struct bbbt *)nand_bbt_buf)->bmt_tbl);
-++		if (bmtd.bmt_blk_idx == 0) {
-++			pr_info("[BBT] FATAL ERR: bmt block index is wrong!\n");
-++			return NULL;
-++		}
-++		pr_info("[BBT] BMT.v2 is found at 0x%x\n", block);
-++		return (struct bbbt *)nand_bbt_buf;
-++	} else
-++		return scan_bmt(block - 1);
-++}
-++
-++/* Write the Burner Bad Block Table to Nand Flash
-++ * n - write BMT to bmt_tbl[n]
-++ */
-++static u16 upload_bmt(struct bbbt *bbt, int n)
-++{
-++	u16 block;
-++
-++retry:
-++	if (n < 0 || bbt->bmt_tbl[n].mapped == NORMAL_MAPPED) {
-++		pr_info("nand: FATAL ERR: no space to store BMT!\n");
-++		return (u16)-1;
-++	}
-++
-++	block = bbt->bmt_tbl[n].block;
-++	BBT_LOG("n = 0x%x, block = 0x%x", n, block);
-++	if (bbt_nand_erase(block)) {
-++		bbt->bmt_tbl[n].block = 0;
-++		/* erase failed, try the previous block: bmt_tbl[n - 1].block */
-++		n--;
-++		goto retry;
-++	}
-++
-++	/* The signature offset is fixed set to 0,
-++	 * oob signature offset is fixed set to 1
-++	 */
-++	memcpy(bbt->signature + MAIN_SIGNATURE_OFFSET, "BMT", 3);
-++	bbt->version = BBMT_VERSION;
-++
-++	if (write_bmt(block, (unsigned char *)bbt)) {
-++		bbt->bmt_tbl[n].block = 0;
-++
-++		/* write failed, try the previous block in bmt_tbl[n - 1] */
-++		n--;
-++		goto retry;
-++	}
-++
-++	/* Return the current index(n) of BMT pool (bmt_tbl[n]) */
-++	return n;
-++}
-++
-++static u16 find_valid_block_in_pool(struct bbbt *bbt)
-++{
-++	int i;
-++
-++	if (bmtd.bmt_blk_idx == 0)
-++		goto error;
-++
-++	for (i = 0; i < bmtd.bmt_blk_idx; i++) {
-++		if (bbt->bmt_tbl[i].block != 0 && bbt->bmt_tbl[i].mapped == NO_MAPPED) {
-++			bbt->bmt_tbl[i].mapped = NORMAL_MAPPED;
-++			return bbt->bmt_tbl[i].block;
-++		}
-++	}
-++
-++error:
-++	pr_info("nand: FATAL ERR: BMT pool is run out!\n");
-++	return 0;
-++}
-++
-++/* We met a bad block, mark it as bad and map it to a valid block in pool,
-++ * if it's a write failure, we need to write the data to mapped block
-++ */
-++static bool update_bmt(u16 block)
-++{
-++	u16 mapped_blk;
-++	struct bbbt *bbt;
-++
-++	bbt = bmtd.bbt;
-++	mapped_blk = find_valid_block_in_pool(bbt);
-++	if (mapped_blk == 0)
-++		return false;
-++
-++	/* Map new bad block to available block in pool */
-++	bbt->bb_tbl[block] = mapped_blk;
-++	bmtd.bmt_blk_idx = upload_bmt(bbt, bmtd.bmt_blk_idx);
-++
-++	return true;
-++}
-++
-++u16 get_mapping_block_index(int block)
-++{
-++	int mapping_block;
-++
-++	if (block < bmtd.pool_lba)
-++		mapping_block = bmtd.bbt->bb_tbl[block];
-++	else
-++		mapping_block = block;
-++	BBT_LOG("0x%x mapped to 0x%x", block, mapping_block);
-++
-++	return mapping_block;
-++}
-++
-++static int
-++mtk_bmt_read(struct mtd_info *mtd, loff_t from,
-++	     struct mtd_oob_ops *ops)
-++{
-++	struct mtd_oob_ops cur_ops = *ops;
-++	int retry_count = 0;
-++	loff_t cur_from;
-++	int ret;
-++
-++	ops->retlen = 0;
-++	ops->oobretlen = 0;
-++
-++	while (ops->retlen < ops->len || ops->oobretlen < ops->ooblen) {
-++		u32 offset = from & (bmtd.blk_size - 1);
-++		u32 block = from >> bmtd.blk_shift;
-++		u32 cur_block;
-++
-++		cur_block = get_mapping_block_index(block);
-++		cur_from = ((loff_t)cur_block << bmtd.blk_shift) + offset;
-++
-++		cur_ops.oobretlen = 0;
-++		cur_ops.retlen = 0;
-++		cur_ops.len = min_t(u32, mtd->erasesize - offset,
-++					 ops->len - ops->retlen);
-++		ret = bmtd._read_oob(mtd, cur_from, &cur_ops);
-++		if (ret < 0) {
-++			update_bmt(block);
-++			if (retry_count++ < 10)
-++				continue;
-++
-++			return ret;
-++		}
-++
-++		ops->retlen += cur_ops.retlen;
-++		ops->oobretlen += cur_ops.oobretlen;
-++
-++		cur_ops.datbuf += cur_ops.retlen;
-++		cur_ops.oobbuf += cur_ops.oobretlen;
-++		cur_ops.ooblen -= cur_ops.oobretlen;
-++
-++		if (!cur_ops.len)
-++			cur_ops.len = mtd->erasesize - offset;
-++
-++		from += cur_ops.len;
-++		retry_count = 0;
-++	}
-++
-++	return 0;
-++}
-++
-++static int
-++mtk_bmt_write(struct mtd_info *mtd, loff_t to,
-++	      struct mtd_oob_ops *ops)
-++{
-++	struct mtd_oob_ops cur_ops = *ops;
-++	int retry_count = 0;
-++	loff_t cur_to;
-++	int ret;
-++
-++	ops->retlen = 0;
-++	ops->oobretlen = 0;
-++
-++	while (ops->retlen < ops->len || ops->oobretlen < ops->ooblen) {
-++		u32 offset = to & (bmtd.blk_size - 1);
-++		u32 block = to >> bmtd.blk_shift;
-++		u32 cur_block;
-++
-++		cur_block = get_mapping_block_index(block);
-++		cur_to = ((loff_t)cur_block << bmtd.blk_shift) + offset;
-++
-++		cur_ops.oobretlen = 0;
-++		cur_ops.retlen = 0;
-++		cur_ops.len = min_t(u32, bmtd.blk_size - offset,
-++					 ops->len - ops->retlen);
-++		ret = bmtd._write_oob(mtd, cur_to, &cur_ops);
-++		if (ret < 0) {
-++			update_bmt(block);
-++			if (retry_count++ < 10)
-++				continue;
-++
-++			return ret;
-++		}
-++
-++		ops->retlen += cur_ops.retlen;
-++		ops->oobretlen += cur_ops.oobretlen;
-++
-++		cur_ops.datbuf += cur_ops.retlen;
-++		cur_ops.oobbuf += cur_ops.oobretlen;
-++		cur_ops.ooblen -= cur_ops.oobretlen;
-++
-++		if (!cur_ops.len)
-++			cur_ops.len = mtd->erasesize - offset;
-++
-++		to += cur_ops.len;
-++		retry_count = 0;
-++	}
-++
-++	return 0;
-++}
-++
-++
-++
-++static int
-++mtk_bmt_erase(struct nand_device *nand, const struct nand_pos *pos)
-++{
-++	struct nand_pos new_pos = *pos;
-++	int retry_count = 0;
-++	int ret;
-++
-++retry:
-++	new_pos.eraseblock = get_mapping_block_index(pos->eraseblock);
-++
-++	ret = bmtd.nand_ops->erase(nand, &new_pos);
-++	if (ret) {
-++		update_bmt(pos->eraseblock);
-++		if (retry_count++ < 10)
-++			goto retry;
-++	}
-++
-++	return ret;
-++}
-++
-++static bool
-++mtk_bmt_isbad(struct nand_device *nand, const struct nand_pos *pos)
-++{
-++	struct nand_pos new_pos = *pos;
-++	int retry_count = 0;
-++	bool ret;
-++
-++retry:
-++	new_pos.eraseblock = get_mapping_block_index(pos->eraseblock);
-++
-++	ret = bmtd.nand_ops->isbad(nand, &new_pos);
-++	if (ret) {
-++		update_bmt(pos->eraseblock);
-++		if (retry_count++ < 10)
-++			goto retry;
-++	}
-++
-++	return ret;
-++}
-++
-++static int
-++mtk_bmt_markbad(struct nand_device *nand, const struct nand_pos *pos)
-++{
-++	struct nand_pos new_pos = *pos;
-++
-++	new_pos.eraseblock = get_mapping_block_index(new_pos.eraseblock);
-++	update_bmt(pos->eraseblock);
-++
-++	return bmtd.nand_ops->markbad(nand, &new_pos);
-++}
-++
-++static void
-++mtk_bmt_replace_ops(struct mtd_info *mtd)
-++{
-++	static const struct nand_ops mtk_bmt_nand_ops = {
-++		.erase = mtk_bmt_erase,
-++		.isbad = mtk_bmt_isbad,
-++		.markbad = mtk_bmt_markbad,
-++	};
-++	struct nand_device *nand = mtd_to_nanddev(mtd);
-++
-++	bmtd.nand_ops = nand->ops;
-++	bmtd._read_oob = mtd->_read_oob;
-++	bmtd._write_oob = mtd->_write_oob;
-++
-++	mtd->_read_oob = mtk_bmt_read;
-++	mtd->_write_oob = mtk_bmt_write;
-++	nand->ops = &mtk_bmt_nand_ops;
-++}
-++
-++static int mtk_bmt_debug_mark_good(void *data, u64 val)
-++{
-++	u32 block = val >> bmtd.blk_shift;
-++
-++	bmtd.bbt->bb_tbl[block] = block;
-++	bmtd.bmt_blk_idx = upload_bmt(bmtd.bbt, bmtd.bmt_blk_idx);
-++
-++	return 0;
-++}
-++
-++static int mtk_bmt_debug_mark_bad(void *data, u64 val)
-++{
-++	u32 block = val >> bmtd.blk_shift;
-++
-++	update_bmt(block);
-++
-++	return 0;
-++}
-++
-++DEFINE_DEBUGFS_ATTRIBUTE(fops_mark_good, NULL, mtk_bmt_debug_mark_good, "%llu\n");
-++DEFINE_DEBUGFS_ATTRIBUTE(fops_mark_bad, NULL, mtk_bmt_debug_mark_bad, "%llu\n");
-++
-++static void
-++mtk_bmt_add_debugfs(void)
-++{
-++	struct dentry *dir;
-++
-++	dir = bmtd.debugfs_dir = debugfs_create_dir("mtk-bmt", NULL);
-++	if (!dir)
-++		return;
-++
-++	debugfs_create_file_unsafe("mark_good", S_IWUSR, dir, NULL, &fops_mark_good);
-++	debugfs_create_file_unsafe("mark_bad", S_IWUSR, dir, NULL, &fops_mark_bad);
-++}
-++
-++void mtk_bmt_detach(struct mtd_info *mtd)
-++{
-++	struct nand_device *nand = mtd_to_nanddev(mtd);
-++
-++	if (bmtd.mtd != mtd)
-++		return;
-++
-++	if (bmtd.debugfs_dir)
-++		debugfs_remove_recursive(bmtd.debugfs_dir);
-++	bmtd.debugfs_dir = NULL;
-++
-++	kfree(nand_bbt_buf);
-++	kfree(nand_data_buf);
-++
-++	mtd->_read_oob = bmtd._read_oob;
-++	mtd->_write_oob = bmtd._write_oob;
-++	mtd->size = bmtd.total_blks << bmtd.blk_shift;
-++	nand->ops = bmtd.nand_ops;
-++
-++	memset(&bmtd, 0, sizeof(bmtd));
-++}
-++
-++/* total_blocks - The total count of blocks that the Nand Chip has */
-++int mtk_bmt_attach(struct mtd_info *mtd)
-++{
-++	struct device_node *np;
-++	struct bbbt *bbt;
-++	u32 bufsz;
-++	u32 block;
-++	u16 total_blocks, pmt_block;
-++	int ret = 0;
-++	u32 bmt_pool_size;
-++
-++	if (bmtd.mtd)
-++		return -ENOSPC;
-++
-++	np = mtd_get_of_node(mtd);
-++	if (!np)
-++		return 0;
-++
-++	if (!of_property_read_bool(np, "mediatek,bmt-v2"))
-++		return 0;
-++
-++	if (of_property_read_u32(np, "mediatek,bmt-pool-size",
-++				 &bmt_pool_size) != 0)
-++		bmt_pool_size = 80;
-++
-++	if (of_property_read_u8(np, "mediatek,bmt-oob-offset",
-++				 &bmtd.oob_offset) != 0)
-++		bmtd.oob_offset = 8;
-++
-++	bmtd.mtd = mtd;
-++	mtk_bmt_replace_ops(mtd);
-++
-++	bmtd.blk_size = mtd->erasesize;
-++	bmtd.blk_shift = ffs(bmtd.blk_size) - 1;
-++	bmtd.pg_size = mtd->writesize;
-++	bmtd.pg_shift = ffs(bmtd.pg_size) - 1;
-++	total_blocks = mtd->size >> bmtd.blk_shift;
-++	pmt_block = total_blocks - bmt_pool_size - 2;
-++
-++	mtd->size = pmt_block << bmtd.blk_shift;
-++
-++	/*
-++	 *  ---------------------------------------
-++	 * | PMT(2blks) | BMT POOL(totalblks * 2%) |
-++	 *  ---------------------------------------
-++	 * ^            ^
-++	 * |            |
-++	 * pmt_block	pmt_block + 2blocks(pool_lba)
-++	 *
-++	 * ATTETION!!!!!!
-++	 *     The blocks ahead of the boundary block are stored in bb_tbl
-++	 *     and blocks behind are stored in bmt_tbl
-++	 */
-++
-++	bmtd.pool_lba = (u16)(pmt_block + 2);
-++	bmtd.total_blks = total_blocks;
-++	bmtd.bb_max = bmtd.total_blks * BBPOOL_RATIO / 100;
-++
-++	/* 3 buffers we need */
-++	bufsz = round_up(sizeof(struct bbbt), bmtd.pg_size);
-++	bmtd.bmt_pgs = bufsz >> bmtd.pg_shift;
-++
-++	nand_bbt_buf = kzalloc(bufsz, GFP_KERNEL);
-++	nand_data_buf = kzalloc(bmtd.pg_size, GFP_KERNEL);
-++
-++	if (!nand_bbt_buf || !nand_data_buf) {
-++		pr_info("nand: FATAL ERR: allocate buffer failed!\n");
-++		ret = -1;
-++		goto error;
-++	}
-++
-++	memset(nand_bbt_buf, 0xff, bufsz);
-++	memset(nand_data_buf, 0xff, bmtd.pg_size);
-++
-++	BBT_LOG("bbtbuf=0x%p(0x%x) dat=0x%p(0x%x)",
-++			nand_bbt_buf, bufsz, nand_data_buf, bmtd.pg_size);
-++	BBT_LOG("pool_lba=0x%x total_blks=0x%x bb_max=0x%x",
-++			bmtd.pool_lba, bmtd.total_blks, bmtd.bb_max);
-++
-++	/* Scanning start from the first page of the last block
-++	 * of whole flash
-++	 */
-++	bbt = scan_bmt(bmtd.total_blks - 1);
-++	if (!bbt) {
-++		/* BMT not found */
-++		if (bmtd.total_blks > BB_TABLE_MAX + BMT_TABLE_MAX) {
-++			pr_info("nand: FATAL: Too many blocks, can not support!\n");
-++			ret = -1;
-++			goto error;
-++		}
-++
-++		bbt = (struct bbbt *)nand_bbt_buf;
-++		memset(bbt->bmt_tbl, BMT_TBL_DEF_VAL, sizeof(bbt->bmt_tbl));
-++
-++		if (scan_bad_blocks(bbt)) {
-++			ret = -1;
-++			goto error;
-++		}
-++
-++		/* BMT always in the last valid block in pool */
-++		bmtd.bmt_blk_idx = upload_bmt(bbt, bmtd.bmt_blk_idx);
-++		block = bbt->bmt_tbl[bmtd.bmt_blk_idx].block;
-++		pr_notice("[BBT] BMT.v2 is written into PBA:0x%x\n", block);
-++
-++		if (bmtd.bmt_blk_idx == 0)
-++			pr_info("nand: Warning: no available block in BMT pool!\n");
-++		else if (bmtd.bmt_blk_idx == (u16)-1) {
-++			ret = -1;
-++			goto error;
-++		}
-++	}
-++	mtk_bmt_add_debugfs();
-++
-++	bmtd.bbt = bbt;
-++	return 0;
-++
-++error:
-++	mtk_bmt_detach(mtd);
-++	return ret;
-++}
-++
-++
-++MODULE_LICENSE("GPL");
-++MODULE_AUTHOR("Xiangsheng Hou <xiangsheng.hou@mediatek.com>, Felix Fietkau <nbd@nbd.name>");
-++MODULE_DESCRIPTION("Bad Block mapping management v2 for MediaTek NAND Flash Driver");
-++
-+--- a/drivers/mtd/nand/spi/core.c
-++++ b/drivers/mtd/nand/spi/core.c
-+@@ -18,6 +18,7 @@
-+ #include <linux/slab.h>
-+ #include <linux/spi/spi.h>
-+ #include <linux/spi/spi-mem.h>
-++#include <linux/mtd/mtk_bmt.h>
-+ 
-+ static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val)
-+ {
-+@@ -1099,6 +1100,8 @@ static int spinand_probe(struct spi_mem
-+ 	if (ret)
-+ 		return ret;
-+ 
-++	mtk_bmt_attach(mtd);
-++
-+ 	ret = mtd_device_register(mtd, NULL, 0);
-+ 	if (ret)
-+ 		goto err_spinand_cleanup;
-+@@ -1124,6 +1127,7 @@ static int spinand_remove(struct spi_mem
-+ 	if (ret)
-+ 		return ret;
-+ 
-++	mtk_bmt_detach(mtd);
-+ 	spinand_cleanup(spinand);
-+ 
-+ 	return 0;
-+--- /dev/null
-++++ b/include/linux/mtd/mtk_bmt.h
-+@@ -0,0 +1,18 @@
-++#ifndef __MTK_BMT_H
-++#define __MTK_BMT_H
-++
-++#ifdef CONFIG_MTD_NAND_MTK_BMT
-++int mtk_bmt_attach(struct mtd_info *mtd);
-++void mtk_bmt_detach(struct mtd_info *mtd);
-++#else
-++static inline int mtk_bmt_attach(struct mtd_info *mtd)
-++{
-++	return 0;
-++}
-++
-++static inline void mtk_bmt_detach(struct mtd_info *mtd)
-++{
-++}
-++#endif
-++
-++#endif
-diff --git a/target/linux/mediatek/patches-5.4/0350-mtd-parsers-trx-Allow-to-specify-trx-magic-in-DT.patch b/target/linux/mediatek/patches-5.4/0350-mtd-parsers-trx-Allow-to-specify-trx-magic-in-DT.patch
-new file mode 100644
-index 0000000000..4db51a88ad
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.4/0350-mtd-parsers-trx-Allow-to-specify-trx-magic-in-DT.patch
-@@ -0,0 +1,75 @@
-+From 0600e3d81628002a5cd80cf83ee454851b0063c0 Mon Sep 17 00:00:00 2001
-+From: Hauke Mehrtens <hauke@hauke-m.de>
-+Date: Sun, 7 Mar 2021 18:19:26 +0100
-+Subject: mtd: parsers: trx: Allow to specify trx-magic in DT
-+
-+Buffalo uses a different TRX magic for every device, to be able to use
-+this trx parser, make it possible to specify the TRX magic in device
-+tree. If no TRX magic is specified in device tree, the standard value
-+will be used. This value should only be specified if a vendor chooses to
-+use a non standard TRX magic.
-+
-+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-+---
-+ .../bindings/mtd/partitions/brcm,trx.txt      |  5 +++++
-+ drivers/mtd/parsers/parser_trx.c              | 21 ++++++++++++++++++-
-+ 2 files changed, 25 insertions(+), 1 deletion(-)
-+
-+--- a/Documentation/devicetree/bindings/mtd/partitions/brcm,trx.txt
-++++ b/Documentation/devicetree/bindings/mtd/partitions/brcm,trx.txt
-+@@ -28,6 +28,11 @@ detected by a software parsing TRX heade
-+ Required properties:
-+ - compatible : (required) must be "brcm,trx"
-+ 
-++Optional properties:
-++
-++- trx-magic: TRX magic, if it is different from the default magic
-++	     0x30524448 as a u32.
-++
-+ Example:
-+ 
-+ flash@0 {
-+--- a/drivers/mtd/parsers/parser_trx.c
-++++ b/drivers/mtd/parsers/parser_trx.c
-+@@ -74,6 +74,24 @@ out_default:
-+ 	return "rootfs";
-+ }
-+ 
-++static uint32_t parser_trx_get_magic(struct mtd_info *mtd)
-++{
-++	uint32_t trx_magic = TRX_MAGIC;
-++	struct device_node *np;
-++	int err;
-++
-++	np = mtd_get_of_node(mtd);
-++	if (!np)
-++		return trx_magic;
-++
-++	/* Get different magic from device tree if specified */
-++	err = of_property_read_u32(np, "trx-magic", &trx_magic);
-++	if (err != 0 && err != -EINVAL)
-++		pr_err("failed to parse \"trx-magic\" DT attribute, use default: %d\n", err);
-++
-++	return trx_magic;
-++}
-++
-+ static int parser_trx_parse(struct mtd_info *mtd,
-+ 			    const struct mtd_partition **pparts,
-+ 			    struct mtd_part_parser_data *data)
-+@@ -83,6 +101,7 @@ static int parser_trx_parse(struct mtd_i
-+ 	struct trx_header trx;
-+ 	size_t bytes_read;
-+ 	uint8_t curr_part = 0, i = 0;
-++	uint32_t trx_magic = parser_trx_get_magic(mtd);
-+ 	int err;
-+ 
-+ 	parts = kcalloc(TRX_PARSER_MAX_PARTS, sizeof(struct mtd_partition),
-+@@ -97,7 +116,7 @@ static int parser_trx_parse(struct mtd_i
-+ 		return err;
-+ 	}
-+ 
-+-	if (trx.magic != TRX_MAGIC) {
-++	if (trx.magic != trx_magic) {
-+ 		kfree(parts);
-+ 		return -ENOENT;
-+ 	}
-diff --git a/target/linux/mediatek/patches-5.4/0351-mtd-parsers-Remove-dependency-to-BRCM-architectures.patch b/target/linux/mediatek/patches-5.4/0351-mtd-parsers-Remove-dependency-to-BRCM-architectures.patch
-new file mode 100644
-index 0000000000..fa94c22304
---- /dev/null
-+++ b/target/linux/mediatek/patches-5.4/0351-mtd-parsers-Remove-dependency-to-BRCM-architectures.patch
-@@ -0,0 +1,23 @@
-+From 63f0cf88ab5461acb0911252f12bb94ee3bf05a2 Mon Sep 17 00:00:00 2001
-+From: Hauke Mehrtens <hauke@hauke-m.de>
-+Date: Sun, 7 Mar 2021 18:23:29 +0100
-+Subject: mtd: parsers: Remove dependency to BRCM architectures
-+
-+Buffalo uses the TRX partition format also on Mediatek SoCs.
-+
-+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-+---
-+ drivers/mtd/parsers/Kconfig | 2 +-
-+ 1 file changed, 1 insertion(+), 1 deletion(-)
-+
-+--- a/drivers/mtd/parsers/Kconfig
-++++ b/drivers/mtd/parsers/Kconfig
-+@@ -131,7 +131,7 @@ config MTD_AFS_PARTS
-+ 
-+ config MTD_PARSER_TRX
-+ 	tristate "Parser for TRX format partitions"
-+-	depends on MTD && (BCM47XX || ARCH_BCM_5301X || COMPILE_TEST)
-++	depends on MTD
-+ 	help
-+ 	  TRX is a firmware format used by Broadcom on their devices. It
-+ 	  may contain up to 3/4 partitions (depending on the version).
--- 
-2.25.1
-
diff --git a/patches/backports/0005-sysupgrade-nand-allow-limiting-rootfs_data-by-settin.patch b/patches/backports/0005-sysupgrade-nand-allow-limiting-rootfs_data-by-settin.patch
deleted file mode 100644
index 0bdfc3078..000000000
--- a/patches/backports/0005-sysupgrade-nand-allow-limiting-rootfs_data-by-settin.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From 7ed003d57f1c5273fecddabcdc7bd6845c3854a0 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Sat, 20 Feb 2021 08:36:43 +0100
-Subject: [PATCH 05/27] sysupgrade-nand: allow limiting rootfs_data by setting
- env variable
-
-Check if firmware environment variable 'rootfs_data_max' exists and is
-set to a numerical value greater than 0. If so, limit rootfs_data
-volume to that size instead of using the maximum available size.
-
-This is useful on devices with lots of flash where users may want to
-have eg. a volume for persistent logs and statistics or for external
-applications/containers. Persistence on rootfs overlay is limited by
-the size of memory available during the sysugprade process as that
-data needs to be copied to RAM while the volume is being recreated
-during sysupgrade. Hence it is unsuitable for keeping larger amounts
-of data accross upgrade which makes additional volume(s) for
-application data desirable.
-
-Signed-off-by: Daniel Golle <daniel@makrotopia.org>
----
- package/base-files/files/lib/upgrade/nand.sh | 20 ++++++++++++++++----
- 1 file changed, 16 insertions(+), 4 deletions(-)
-
-diff --git a/package/base-files/files/lib/upgrade/nand.sh b/package/base-files/files/lib/upgrade/nand.sh
-index 5bc9ff83f9..e335d940ed 100644
---- a/package/base-files/files/lib/upgrade/nand.sh
-+++ b/package/base-files/files/lib/upgrade/nand.sh
-@@ -117,6 +117,9 @@ nand_restore_config() {
- nand_upgrade_prepare_ubi() {
- 	local rootfs_length="$1"
- 	local rootfs_type="$2"
-+	local rootfs_data_max="$(fw_printenv -n rootfs_data_max 2>/dev/null)"
-+	[ -n "$rootfs_data_max" ] && rootfs_data_max=$(printf %d "$rootfs_data_max")
-+
- 	local kernel_length="$3"
- 	local has_env="${4:-0}"
- 
-@@ -176,11 +179,11 @@ nand_upgrade_prepare_ubi() {
- 
- 	# update rootfs
- 	if [ -n "$rootfs_length" ]; then
--		local root_size_param
-+		local rootfs_size_param
- 		if [ "$rootfs_type" = "ubifs" ]; then
--			root_size_param="-m"
-+			rootfs_size_param="-m"
- 		else
--			root_size_param="-s $rootfs_length"
-+			rootfs_size_param="-s $rootfs_length"
- 		fi
- 		if ! ubimkvol /dev/$ubidev -N $CI_ROOTPART $rootfs_size_param; then
- 			echo "cannot create rootfs volume"
-@@ -190,7 +193,16 @@ nand_upgrade_prepare_ubi() {
- 
- 	# create rootfs_data for non-ubifs rootfs
- 	if [ "$rootfs_type" != "ubifs" ]; then
--		if ! ubimkvol /dev/$ubidev -N rootfs_data -m; then
-+		local availeb=$(cat /sys/devices/virtual/ubi/$ubidev/avail_eraseblocks)
-+		local ebsize=$(cat /sys/devices/virtual/ubi/$ubidev/eraseblock_size)
-+		local avail_size=$(( $availeb * $ebsize ))
-+		local rootfs_data_size_param="-m"
-+		if [ -n "$rootfs_data_max" ] &&
-+		   [ "$rootfs_data_max" != "0" ] &&
-+		   [ "$rootfs_data_max" -le "$avail_size" ]; then
-+			rootfs_data_size_param="-s $rootfs_data_max"
-+		fi
-+		if ! ubimkvol /dev/$ubidev -N rootfs_data $rootfs_data_size_param; then
- 			echo "cannot initialize rootfs_data volume"
- 			return 1
- 		fi
--- 
-2.25.1
-
diff --git a/patches/backports/0006-uboot-mediatek-add-support-for-linksys-e8450.patch b/patches/backports/0006-uboot-mediatek-add-support-for-linksys-e8450.patch
deleted file mode 100644
index 30a694799..000000000
--- a/patches/backports/0006-uboot-mediatek-add-support-for-linksys-e8450.patch
+++ /dev/null
@@ -1,1351 +0,0 @@
-From 3c6515c9db444da27192c1182fa1e9ab8ba6e2f6 Mon Sep 17 00:00:00 2001
-From: Daniel Golle <daniel@makrotopia.org>
-Date: Sat, 30 Jan 2021 13:58:16 +0000
-Subject: [PATCH 06/27] uboot-mediatek: add support for linksys e8450
-
-Build U-Boot for the Linksys E8450 in order to have support for UBI.
-The loader has a default environment with scripts handling the reset
-button as well as fall-back to recovery firmware. If the loader comes
-up without a valid environment found in UBI, it will automatically
-make sure UBI is formatted and create a new environment and proceed
-to load recovery firmware (either from UBI or via TFTP if recovery is
-corrupted or unavailable).
-
-If the button is held down during power-on, the yellow status LED
-turns on and the bootloader environment is reset to factory defaults.
-If the button is released at this point, the recovery firmware (if
-existing) is loaded from UBI and booted.
-If the button is continously held down even beyond the point that
-the yellow LED turned on, the loader will try to load the recovery
-firmware via TFTP from server 192.168.1.254, write it to UBI and
-boot.
-
-Signed-off-by: Daniel Golle <daniel@makrotopia.org>
----
- package/boot/uboot-mediatek/Makefile          |  35 +-
- .../002-nand-add-spi-nand-driver.patch        | 123 +----
- ...boot-add-dts-and-config-for-spi-nand.patch |  11 +-
- ...le-mtd-and-mtk_spi_nand-in-defconfig.patch |  17 -
- .../patches/005-update-bpir2-defconfig.patch  |  11 +-
- .../006-cmd-button-return-button-status.patch |  38 ++
- .../patches/007-env-readmem.patch             | 116 +++++
- .../patches/008-bootmenu-custom-title.patch   |  32 ++
- ...7622-generic-reset-button-ignore-env.patch |  35 ++
- .../patches/010-no-binman.patch               |   6 +-
- .../patches/010-update-u7623-defconfig.patch  |   2 -
- .../patches/020-add-linksys-e8450.patch       | 436 ++++++++++++++++++
- .../100-increase-CONFIG_SYS_BOOTM_LEN.patch   |  11 +
- 13 files changed, 713 insertions(+), 160 deletions(-)
- create mode 100644 package/boot/uboot-mediatek/patches/006-cmd-button-return-button-status.patch
- create mode 100644 package/boot/uboot-mediatek/patches/007-env-readmem.patch
- create mode 100644 package/boot/uboot-mediatek/patches/008-bootmenu-custom-title.patch
- create mode 100644 package/boot/uboot-mediatek/patches/009-mt7622-generic-reset-button-ignore-env.patch
- create mode 100644 package/boot/uboot-mediatek/patches/020-add-linksys-e8450.patch
- create mode 100644 package/boot/uboot-mediatek/patches/100-increase-CONFIG_SYS_BOOTM_LEN.patch
-
-diff --git a/package/boot/uboot-mediatek/Makefile b/package/boot/uboot-mediatek/Makefile
-index a4be43ae28..228cbe16ec 100644
---- a/package/boot/uboot-mediatek/Makefile
-+++ b/package/boot/uboot-mediatek/Makefile
-@@ -3,6 +3,7 @@ include $(INCLUDE_DIR)/kernel.mk
- 
- PKG_VERSION:=2020.10
- PKG_HASH:=0d481bbdc05c0ee74908ec2f56a6daa53166cc6a78a0e4fac2ac5d025770a622
-+PKG_BUILD_DEPENDS:=arm-trusted-firmware-tools/host
- 
- include $(INCLUDE_DIR)/u-boot.mk
- include $(INCLUDE_DIR)/package.mk
-@@ -20,6 +21,16 @@ define U-Boot/mt7622
-   UBOOT_CONFIG:=mt7622_rfb
- endef
- 
-+define U-Boot/mt7622_linksys_e8450
-+  NAME:=Linksys E8450
-+  BUILD_SUBTARGET:=mt7622
-+  UBOOT_CONFIG:=mt7622_linksys_e8450
-+  UBOOT_IMAGE:=u-boot.fip
-+  BL2_BOOTDEV:=snand
-+  BL2_DDRBLOB:=1
-+  DEPENDS:=+trusted-firmware-a-mt7622-snand-1ddr
-+endef
-+
- define U-Boot/mt7623a_unielec_u7623
-   NAME:=UniElec U7623 (mt7623)
-   BUILD_SUBTARGET:=mt7623
-@@ -39,15 +50,33 @@ define U-Boot/mt7629
-   UBOOT_CONFIG:=mt7629_rfb
- endef
- 
--UBOOT_TARGETS := mt7629 mt7622 mt7623n_bpir2 mt7623a_unielec_u7623
-+UBOOT_TARGETS := mt7629 mt7622 mt7622_linksys_e8450 mt7623n_bpir2 mt7623a_unielec_u7623
- 
--UBOOT_MAKE_FLAGS += $(UBOOT_IMAGE)
-+UBOOT_MAKE_FLAGS += $(UBOOT_IMAGE:.fip=.bin)
- 
- Build/Exports:=$(Host/Exports)
- 
-+define Build/fip-image
-+	$(STAGING_DIR_HOST)/bin/fiptool create \
-+		--soc-fw $(STAGING_DIR_IMAGE)/$(BUILD_SUBTARGET)-$(BL2_BOOTDEV)-$(BL2_DDRBLOB)ddr-bl31.bin \
-+		--nt-fw $(PKG_BUILD_DIR)/u-boot.bin \
-+		$(PKG_BUILD_DIR)/u-boot.fip
-+endef
-+
-+define Build/Compile
-+	$(call Build/Compile/U-Boot)
-+ifeq ($(UBOOT_IMAGE),u-boot.fip))
-+	$(call Build/fip-image)
-+endif
-+endef
-+
-+# don't stage files to bindir, let target/linux/mediatek/image/*.mk do that
-+define Package/u-boot/install
-+endef
-+
- define Build/InstallDev
- 	$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
--	$(INSTALL_BIN) $(PKG_BUILD_DIR)/$(UBOOT_IMAGE) $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-$(UBOOT_IMAGE)
-+	$(INSTALL_DATA) $(PKG_BUILD_DIR)/$(UBOOT_IMAGE) $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-$(UBOOT_IMAGE)
- endef
- 
- #$(eval $(call BuildPackage/U-Boot))
-diff --git a/package/boot/uboot-mediatek/patches/002-nand-add-spi-nand-driver.patch b/package/boot/uboot-mediatek/patches/002-nand-add-spi-nand-driver.patch
-index dc3ebaf7af..5d3e94ac86 100644
---- a/package/boot/uboot-mediatek/patches/002-nand-add-spi-nand-driver.patch
-+++ b/package/boot/uboot-mediatek/patches/002-nand-add-spi-nand-driver.patch
-@@ -85,11 +85,9 @@ Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
-  create mode 100644 drivers/mtd/nandx/include/internal/nandx_util.h
-  create mode 100644 drivers/mtd/nandx/include/uboot/nandx_os.h
- 
--diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
--index 5e7571cf3d..34a59b44b9 100644
- --- a/drivers/mtd/Kconfig
- +++ b/drivers/mtd/Kconfig
--@@ -101,6 +101,13 @@ config HBMC_AM654
-+@@ -108,6 +108,13 @@ config HBMC_AM654
-  	 This is the driver for HyperBus controller on TI's AM65x and
-  	 other SoCs
-  
-@@ -103,11 +101,9 @@ index 5e7571cf3d..34a59b44b9 100644
-  source "drivers/mtd/nand/Kconfig"
-  
-  source "drivers/mtd/spi/Kconfig"
--diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
--index 318788c5e2..1df1031b23 100644
- --- a/drivers/mtd/Makefile
- +++ b/drivers/mtd/Makefile
--@@ -41,3 +41,7 @@ obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPORT) += spi/
-+@@ -41,3 +41,7 @@ obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPOR
-  obj-$(CONFIG_SPL_UBI) += ubispl/
-  
-  endif
-@@ -115,8 +111,6 @@ index 318788c5e2..1df1031b23 100644
- +ifeq ($(CONFIG_MTK_SPI_NAND), y)
- +include $(srctree)/drivers/mtd/nandx/Nandx.mk
- +endif
--diff --git a/drivers/mtd/nand/raw/nand.c b/drivers/mtd/nand/raw/nand.c
--index 026419e4e6..4be0c7d8f3 100644
- --- a/drivers/mtd/nand/raw/nand.c
- +++ b/drivers/mtd/nand/raw/nand.c
- @@ -91,8 +91,10 @@ static void nand_init_chip(int i)
-@@ -130,9 +124,6 @@ index 026419e4e6..4be0c7d8f3 100644
-  
-  	nand_register(i, mtd);
-  }
--diff --git a/drivers/mtd/nandx/NOTICE b/drivers/mtd/nandx/NOTICE
--new file mode 100644
--index 0000000000..1a06ca3867
- --- /dev/null
- +++ b/drivers/mtd/nandx/NOTICE
- @@ -0,0 +1,52 @@
-@@ -189,9 +180,6 @@ index 0000000000..1a06ca3867
- +
- +####################################################################################################
- \ No newline at end of file
--diff --git a/drivers/mtd/nandx/Nandx.config b/drivers/mtd/nandx/Nandx.config
--new file mode 100644
--index 0000000000..35705ee28d
- --- /dev/null
- +++ b/drivers/mtd/nandx/Nandx.config
- @@ -0,0 +1,17 @@
-@@ -212,9 +200,6 @@ index 0000000000..35705ee28d
- +NANDX_NFI_BASE := y
- +NANDX_NFI_ECC := y
- +NANDX_NFI_SPI := y
--diff --git a/drivers/mtd/nandx/Nandx.mk b/drivers/mtd/nandx/Nandx.mk
--new file mode 100644
--index 0000000000..f5a6f2a628
- --- /dev/null
- +++ b/drivers/mtd/nandx/Nandx.mk
- @@ -0,0 +1,91 @@
-@@ -309,9 +294,6 @@ index 0000000000..f5a6f2a628
- +clean:
- +	rm -rf $(sim-obj) nandx
- +endif
--diff --git a/drivers/mtd/nandx/README b/drivers/mtd/nandx/README
--new file mode 100644
--index 0000000000..0feaeaeb88
- --- /dev/null
- +++ b/drivers/mtd/nandx/README
- @@ -0,0 +1,31 @@
-@@ -346,9 +328,6 @@ index 0000000000..0feaeaeb88
- +    Any block of above graph can be extended at your will, if you
- +want add new feature into this code, please make sure that your code
- +would follow the framework, and we will be appreciated about it.
--diff --git a/drivers/mtd/nandx/core/Nandx.mk b/drivers/mtd/nandx/core/Nandx.mk
--new file mode 100644
--index 0000000000..7a5661c044
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/Nandx.mk
- @@ -0,0 +1,38 @@
-@@ -390,9 +369,6 @@ index 0000000000..7a5661c044
- +nandx-header-$(NANDX_NFI_ECC) += nfi/nfiecc_regs.h
- +nandx-header-$(NANDX_NFI_SPI) += nfi/nfi_spi.h
- +nandx-header-$(NANDX_NFI_SPI) += nfi/nfi_spi_regs.h
--diff --git a/drivers/mtd/nandx/core/core_io.c b/drivers/mtd/nandx/core/core_io.c
--new file mode 100644
--index 0000000000..716eeed38d
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/core_io.c
- @@ -0,0 +1,735 @@
-@@ -1131,9 +1107,6 @@ index 0000000000..716eeed38d
- +	return ret;
- +}
- +#endif
--diff --git a/drivers/mtd/nandx/core/core_io.h b/drivers/mtd/nandx/core/core_io.h
--new file mode 100644
--index 0000000000..edcb60908a
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/core_io.h
- @@ -0,0 +1,39 @@
-@@ -1176,9 +1149,6 @@ index 0000000000..edcb60908a
- +};
- +
- +#endif /* __CORE_IO_H__ */
--diff --git a/drivers/mtd/nandx/core/nand/device_spi.c b/drivers/mtd/nandx/core/nand/device_spi.c
--new file mode 100644
--index 0000000000..db338c28c2
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nand/device_spi.c
- @@ -0,0 +1,200 @@
-@@ -1382,9 +1352,6 @@ index 0000000000..db338c28c2
- +	return &spi_nand[index].dev;
- +}
- +
--diff --git a/drivers/mtd/nandx/core/nand/device_spi.h b/drivers/mtd/nandx/core/nand/device_spi.h
--new file mode 100644
--index 0000000000..1676b61fc8
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nand/device_spi.h
- @@ -0,0 +1,132 @@
-@@ -1520,9 +1487,6 @@ index 0000000000..1676b61fc8
- +u8 spi_replace_tx_col_cycle(u8 mode);
- +
- +#endif /* __DEVICE_SPI_H__ */
--diff --git a/drivers/mtd/nandx/core/nand/nand_spi.c b/drivers/mtd/nandx/core/nand/nand_spi.c
--new file mode 100644
--index 0000000000..2ae03e1cf4
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nand/nand_spi.c
- @@ -0,0 +1,526 @@
-@@ -2052,9 +2016,6 @@ index 0000000000..2ae03e1cf4
- +	nand_base_exit(spi->parent);
- +	mem_free(spi);
- +}
--diff --git a/drivers/mtd/nandx/core/nand/nand_spi.h b/drivers/mtd/nandx/core/nand/nand_spi.h
--new file mode 100644
--index 0000000000..e55e4de6f7
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nand/nand_spi.h
- @@ -0,0 +1,35 @@
-@@ -2093,9 +2054,6 @@ index 0000000000..e55e4de6f7
- +}
- +
- +#endif /* __NAND_SPI_H__ */
--diff --git a/drivers/mtd/nandx/core/nand_base.c b/drivers/mtd/nandx/core/nand_base.c
--new file mode 100644
--index 0000000000..65998e5460
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nand_base.c
- @@ -0,0 +1,304 @@
-@@ -2403,9 +2361,6 @@ index 0000000000..65998e5460
- +	nfi_exit(base->nfi);
- +	mem_free(base);
- +}
--diff --git a/drivers/mtd/nandx/core/nand_base.h b/drivers/mtd/nandx/core/nand_base.h
--new file mode 100644
--index 0000000000..13217978e5
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nand_base.h
- @@ -0,0 +1,71 @@
-@@ -2480,9 +2435,6 @@ index 0000000000..13217978e5
- +int nand_detect_device(struct nand_base *nand);
- +
- +#endif /* __NAND_BASE_H__ */
--diff --git a/drivers/mtd/nandx/core/nand_chip.c b/drivers/mtd/nandx/core/nand_chip.c
--new file mode 100644
--index 0000000000..02adc6f52e
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nand_chip.c
- @@ -0,0 +1,272 @@
-@@ -2758,9 +2710,6 @@ index 0000000000..02adc6f52e
- +	nand_exit(chip->nand);
- +	mem_free(chip);
- +}
--diff --git a/drivers/mtd/nandx/core/nand_chip.h b/drivers/mtd/nandx/core/nand_chip.h
--new file mode 100644
--index 0000000000..3e9c8e6ca3
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nand_chip.h
- @@ -0,0 +1,103 @@
-@@ -2867,9 +2816,6 @@ index 0000000000..3e9c8e6ca3
- +struct nand_chip *nand_chip_init(struct nfi_resource *res);
- +void nand_chip_exit(struct nand_chip *chip);
- +#endif /* __NAND_CHIP_H__ */
--diff --git a/drivers/mtd/nandx/core/nand_device.c b/drivers/mtd/nandx/core/nand_device.c
--new file mode 100644
--index 0000000000..9f6764d1bc
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nand_device.c
- @@ -0,0 +1,285 @@
-@@ -3158,9 +3104,6 @@ index 0000000000..9f6764d1bc
- +	return 0;
- +}
- +
--diff --git a/drivers/mtd/nandx/core/nand_device.h b/drivers/mtd/nandx/core/nand_device.h
--new file mode 100644
--index 0000000000..e142cf529d
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nand_device.h
- @@ -0,0 +1,608 @@
-@@ -3772,9 +3715,6 @@ index 0000000000..e142cf529d
- +
- +struct nand_device *nand_get_device(int index);
- +#endif /* __NAND_DEVICE_H__ */
--diff --git a/drivers/mtd/nandx/core/nfi.h b/drivers/mtd/nandx/core/nfi.h
--new file mode 100644
--index 0000000000..ba84e73ccc
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nfi.h
- @@ -0,0 +1,51 @@
-@@ -3829,9 +3769,6 @@ index 0000000000..ba84e73ccc
- +void nfi_exit(struct nfi *nfi);
- +
- +#endif /* __NFI_H__ */
--diff --git a/drivers/mtd/nandx/core/nfi/nfi_base.c b/drivers/mtd/nandx/core/nfi/nfi_base.c
--new file mode 100644
--index 0000000000..d8679d7aa3
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nfi/nfi_base.c
- @@ -0,0 +1,1357 @@
-@@ -5192,9 +5129,6 @@ index 0000000000..d8679d7aa3
- +	nfi_extend_exit(nb);
- +}
- +
--diff --git a/drivers/mtd/nandx/core/nfi/nfi_base.h b/drivers/mtd/nandx/core/nfi/nfi_base.h
--new file mode 100644
--index 0000000000..ae894eaa31
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nfi/nfi_base.h
- @@ -0,0 +1,95 @@
-@@ -5293,9 +5227,6 @@ index 0000000000..ae894eaa31
- +void nfi_extend_exit(struct nfi_base *nb);
- +
- +#endif /* __NFI_BASE_H__ */
--diff --git a/drivers/mtd/nandx/core/nfi/nfi_regs.h b/drivers/mtd/nandx/core/nfi/nfi_regs.h
--new file mode 100644
--index 0000000000..ba4868acc8
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nfi/nfi_regs.h
- @@ -0,0 +1,114 @@
-@@ -5413,9 +5344,6 @@ index 0000000000..ba4868acc8
- +
- +#endif /* __NFI_REGS_H__ */
- +
--diff --git a/drivers/mtd/nandx/core/nfi/nfi_spi.c b/drivers/mtd/nandx/core/nfi/nfi_spi.c
--new file mode 100644
--index 0000000000..67cd0aaad9
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nfi/nfi_spi.c
- @@ -0,0 +1,689 @@
-@@ -6108,9 +6036,6 @@ index 0000000000..67cd0aaad9
- +	mem_free(nfi_spi);
- +}
- +
--diff --git a/drivers/mtd/nandx/core/nfi/nfi_spi.h b/drivers/mtd/nandx/core/nfi/nfi_spi.h
--new file mode 100644
--index 0000000000..a52255663a
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nfi/nfi_spi.h
- @@ -0,0 +1,44 @@
-@@ -6158,9 +6083,6 @@ index 0000000000..a52255663a
- +};
- +
- +#endif /* __NFI_SPI_H__ */
--diff --git a/drivers/mtd/nandx/core/nfi/nfi_spi_regs.h b/drivers/mtd/nandx/core/nfi/nfi_spi_regs.h
--new file mode 100644
--index 0000000000..77adf46782
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nfi/nfi_spi_regs.h
- @@ -0,0 +1,64 @@
-@@ -6228,9 +6150,6 @@ index 0000000000..77adf46782
- +#define SPI_GPRAM_ADDR          0x800
- +
- +#endif /* __NFI_SPI_REGS_H__ */
--diff --git a/drivers/mtd/nandx/core/nfi/nfiecc.c b/drivers/mtd/nandx/core/nfi/nfiecc.c
--new file mode 100644
--index 0000000000..14246fbc3e
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nfi/nfiecc.c
- @@ -0,0 +1,510 @@
-@@ -6744,9 +6663,6 @@ index 0000000000..14246fbc3e
- +	mem_free(ecc);
- +}
- +
--diff --git a/drivers/mtd/nandx/core/nfi/nfiecc.h b/drivers/mtd/nandx/core/nfi/nfiecc.h
--new file mode 100644
--index 0000000000..b02a5c3534
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nfi/nfiecc.h
- @@ -0,0 +1,90 @@
-@@ -6840,9 +6756,6 @@ index 0000000000..b02a5c3534
- +void nfiecc_exit(struct nfiecc *ecc);
- +
- +#endif /* __NFIECC_H__ */
--diff --git a/drivers/mtd/nandx/core/nfi/nfiecc_regs.h b/drivers/mtd/nandx/core/nfi/nfiecc_regs.h
--new file mode 100644
--index 0000000000..96564cf872
- --- /dev/null
- +++ b/drivers/mtd/nandx/core/nfi/nfiecc_regs.h
- @@ -0,0 +1,51 @@
-@@ -6897,9 +6810,6 @@ index 0000000000..96564cf872
- +#define NFIECC_DECEL(x)         (0x120 + (x) * 4)
- +
- +#endif /* __NFIECC_REGS_H__ */
--diff --git a/drivers/mtd/nandx/driver/Nandx.mk b/drivers/mtd/nandx/driver/Nandx.mk
--new file mode 100644
--index 0000000000..3fb93d37c5
- --- /dev/null
- +++ b/drivers/mtd/nandx/driver/Nandx.mk
- @@ -0,0 +1,18 @@
-@@ -6921,9 +6831,6 @@ index 0000000000..3fb93d37c5
- +nandx-$(NANDX_KERNEL_SUPPORT) += kernel/driver.c
- +nandx-$(NANDX_LK_SUPPORT) += lk/driver.c
- +nandx-$(NANDX_UBOOT_SUPPORT) += uboot/driver.c
--diff --git a/drivers/mtd/nandx/driver/bbt/bbt.c b/drivers/mtd/nandx/driver/bbt/bbt.c
--new file mode 100644
--index 0000000000..c9d4823e09
- --- /dev/null
- +++ b/drivers/mtd/nandx/driver/bbt/bbt.c
- @@ -0,0 +1,408 @@
-@@ -7335,9 +7242,6 @@ index 0000000000..c9d4823e09
- +
- +	return get_bbt_mark(g_bbt_manager.bbt, block) != BBT_BLOCK_GOOD;
- +}
--diff --git a/drivers/mtd/nandx/driver/uboot/driver.c b/drivers/mtd/nandx/driver/uboot/driver.c
--new file mode 100644
--index 0000000000..7bd3342452
- --- /dev/null
- +++ b/drivers/mtd/nandx/driver/uboot/driver.c
- @@ -0,0 +1,574 @@
-@@ -7915,9 +7819,6 @@ index 0000000000..7bd3342452
- +MODULE_LICENSE("GPL v2");
- +MODULE_DESCRIPTION("MTK Nand Flash Controller Driver");
- +MODULE_AUTHOR("MediaTek");
--diff --git a/drivers/mtd/nandx/include/Nandx.mk b/drivers/mtd/nandx/include/Nandx.mk
--new file mode 100644
--index 0000000000..667402790e
- --- /dev/null
- +++ b/drivers/mtd/nandx/include/Nandx.mk
- @@ -0,0 +1,16 @@
-@@ -7937,9 +7838,6 @@ index 0000000000..667402790e
- +nandx-header-$(NANDX_LK_SUPPORT) += lk/nandx_os.h
- +nandx-header-$(NANDX_KERNEL_SUPPORT) += kernel/nandx_os.h
- +nandx-header-$(NANDX_UBOOT_SUPPORT) += uboot/nandx_os.h
--diff --git a/drivers/mtd/nandx/include/internal/bbt.h b/drivers/mtd/nandx/include/internal/bbt.h
--new file mode 100644
--index 0000000000..4676def1f5
- --- /dev/null
- +++ b/drivers/mtd/nandx/include/internal/bbt.h
- @@ -0,0 +1,62 @@
-@@ -8005,9 +7903,6 @@ index 0000000000..4676def1f5
- +int bbt_is_bad(struct nandx_info *nand, off_t offset);
- +
- +#endif /*__BBT_H__*/
--diff --git a/drivers/mtd/nandx/include/internal/nandx_core.h b/drivers/mtd/nandx/include/internal/nandx_core.h
--new file mode 100644
--index 0000000000..09aff72224
- --- /dev/null
- +++ b/drivers/mtd/nandx/include/internal/nandx_core.h
- @@ -0,0 +1,250 @@
-@@ -8261,9 +8156,6 @@ index 0000000000..09aff72224
- +#endif
- +
- +#endif /* __NANDX_CORE_H__ */
--diff --git a/drivers/mtd/nandx/include/internal/nandx_errno.h b/drivers/mtd/nandx/include/internal/nandx_errno.h
--new file mode 100644
--index 0000000000..51fb299c03
- --- /dev/null
- +++ b/drivers/mtd/nandx/include/internal/nandx_errno.h
- @@ -0,0 +1,40 @@
-@@ -8307,9 +8199,6 @@ index 0000000000..51fb299c03
- +#endif
- +
- +#endif /* __NANDX_ERRNO_H__ */
--diff --git a/drivers/mtd/nandx/include/internal/nandx_util.h b/drivers/mtd/nandx/include/internal/nandx_util.h
--new file mode 100644
--index 0000000000..1990b000ee
- --- /dev/null
- +++ b/drivers/mtd/nandx/include/internal/nandx_util.h
- @@ -0,0 +1,221 @@
-@@ -8534,9 +8423,6 @@ index 0000000000..1990b000ee
- +}
- +
- +#endif /* __NANDX_UTIL_H__ */
--diff --git a/drivers/mtd/nandx/include/uboot/nandx_os.h b/drivers/mtd/nandx/include/uboot/nandx_os.h
--new file mode 100644
--index 0000000000..8ea53378bf
- --- /dev/null
- +++ b/drivers/mtd/nandx/include/uboot/nandx_os.h
- @@ -0,0 +1,78 @@
-@@ -8618,8 +8504,6 @@ index 0000000000..8ea53378bf
- +}
- +
- +#endif /* __NANDX_OS_H__ */
--diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h
--index dfd506ed24..6d0c956484 100644
- --- a/include/configs/mt7622.h
- +++ b/include/configs/mt7622.h
- @@ -11,6 +11,31 @@
-@@ -8654,6 +8538,3 @@ index dfd506ed24..6d0c956484 100644
-  #define CONFIG_SYS_MAXARGS		8
-  #define CONFIG_SYS_BOOTM_LEN		SZ_64M
-  #define CONFIG_SYS_CBSIZE		SZ_1K
---- 
--2.17.1
--
-diff --git a/package/boot/uboot-mediatek/patches/003-mt7622-uboot-add-dts-and-config-for-spi-nand.patch b/package/boot/uboot-mediatek/patches/003-mt7622-uboot-add-dts-and-config-for-spi-nand.patch
-index 2c021e1c80..7167a498ad 100644
---- a/package/boot/uboot-mediatek/patches/003-mt7622-uboot-add-dts-and-config-for-spi-nand.patch
-+++ b/package/boot/uboot-mediatek/patches/003-mt7622-uboot-add-dts-and-config-for-spi-nand.patch
-@@ -11,11 +11,9 @@ Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
-  arch/arm/dts/mt7622.dtsi    | 20 ++++++++++++++++++++
-  2 files changed, 26 insertions(+)
- 
--diff --git a/arch/arm/dts/mt7622-rfb.dts b/arch/arm/dts/mt7622-rfb.dts
--index f05c3fe14d..05502bddec 100644
- --- a/arch/arm/dts/mt7622-rfb.dts
- +++ b/arch/arm/dts/mt7622-rfb.dts
--@@ -143,6 +143,12 @@
-+@@ -174,6 +174,12 @@
-  	};
-  };
-  
-@@ -28,11 +26,9 @@ index f05c3fe14d..05502bddec 100644
-  &uart0 {
-  	pinctrl-names = "default";
-  	pinctrl-0 = <&uart0_pins>;
--diff --git a/arch/arm/dts/mt7622.dtsi b/arch/arm/dts/mt7622.dtsi
--index 1e8ec9b48b..63fdb63d4a 100644
- --- a/arch/arm/dts/mt7622.dtsi
- +++ b/arch/arm/dts/mt7622.dtsi
--@@ -52,6 +52,26 @@
-+@@ -53,6 +53,26 @@
-  		#size-cells = <0>;
-  	};
-  
-@@ -59,6 +55,3 @@ index 1e8ec9b48b..63fdb63d4a 100644
-  	timer {
-  		compatible = "arm,armv8-timer";
-  		interrupt-parent = <&gic>;
---- 
--2.17.1
--
-diff --git a/package/boot/uboot-mediatek/patches/004-configs-enable-mtd-and-mtk_spi_nand-in-defconfig.patch b/package/boot/uboot-mediatek/patches/004-configs-enable-mtd-and-mtk_spi_nand-in-defconfig.patch
-index cb564965c7..6999e5e235 100644
---- a/package/boot/uboot-mediatek/patches/004-configs-enable-mtd-and-mtk_spi_nand-in-defconfig.patch
-+++ b/package/boot/uboot-mediatek/patches/004-configs-enable-mtd-and-mtk_spi_nand-in-defconfig.patch
-@@ -10,8 +10,6 @@ Signed-off-by: Sam Shih <sam.shih@mediatek.com>
-  configs/mt7622_rfb_defconfig | 5 +++++
-  1 file changed, 5 insertions(+)
- 
--diff --git a/configs/mt7622_rfb_defconfig b/configs/mt7622_rfb_defconfig
--index 1ce6ebdfeb..816126267b 100644
- --- a/configs/mt7622_rfb_defconfig
- +++ b/configs/mt7622_rfb_defconfig
- @@ -13,6 +13,7 @@ CONFIG_DEFAULT_FDT_FILE="mt7622-rfb"
-@@ -22,18 +20,3 @@ index 1ce6ebdfeb..816126267b 100644
-  CONFIG_CMD_PCI=y
-  CONFIG_CMD_SF_TEST=y
-  CONFIG_CMD_PING=y
-- CONFIG_CMD_SMC=y
--@@ -25,6 +26,10 @@ CONFIG_CLK=y
-- CONFIG_DM_MMC=y
-- CONFIG_MMC_HS200_SUPPORT=y
-- CONFIG_MMC_MTK=y
--+CONFIG_MTD=y
--+CONFIG_DM_MTD=y
--+CONFIG_MTK_SPI_NAND=y
--+CONFIG_MTD_RAW_NAND=y
-- CONFIG_DM_SPI_FLASH=y
-- CONFIG_SPI_FLASH_EON=y
-- CONFIG_SPI_FLASH_GIGADEVICE=y
---- 
--2.17.1
--
-diff --git a/package/boot/uboot-mediatek/patches/005-update-bpir2-defconfig.patch b/package/boot/uboot-mediatek/patches/005-update-bpir2-defconfig.patch
-index cc7ed89280..b750dda6e8 100644
---- a/package/boot/uboot-mediatek/patches/005-update-bpir2-defconfig.patch
-+++ b/package/boot/uboot-mediatek/patches/005-update-bpir2-defconfig.patch
-@@ -1,10 +1,9 @@
--diff --git a/configs/mt7623n_bpir2_defconfig b/configs/mt7623n_bpir2_defconfig
--index 6b9fbd7e22..fb2a004803 100644
- --- a/configs/mt7623n_bpir2_defconfig
- +++ b/configs/mt7623n_bpir2_defconfig
--@@ -52,3 +52,13 @@ CONFIG_TIMER=y
-- CONFIG_WDT_MTK=y
-- CONFIG_LZMA=y
-+@@ -51,5 +51,15 @@ CONFIG_SYSRESET=y
-+ CONFIG_SYSRESET_WATCHDOG=y
-+ CONFIG_TIMER=y
-+ CONFIG_MTK_TIMER=y
- +CONFIG_CMD_BOOTZ=y
- +CONFIG_OF_LIBFDT_OVERLAY=y
- +#enables savenenv-command
-@@ -15,3 +14,5 @@ index 6b9fbd7e22..fb2a004803 100644
- +CONFIG_CMD_ASKENV=y
- +CONFIG_ENV_SIZE=0x2000
- +CONFIG_CMD_SETEXPR=y
-+ CONFIG_WDT_MTK=y
-+ CONFIG_LZMA=y
-diff --git a/package/boot/uboot-mediatek/patches/006-cmd-button-return-button-status.patch b/package/boot/uboot-mediatek/patches/006-cmd-button-return-button-status.patch
-new file mode 100644
-index 0000000000..a413688f1c
---- /dev/null
-+++ b/package/boot/uboot-mediatek/patches/006-cmd-button-return-button-status.patch
-@@ -0,0 +1,38 @@
-+From a6bfd71a96201127836d59736abcb54dc2d5e1a5 Mon Sep 17 00:00:00 2001
-+From: Heinrich Schuchardt <xypron.glpk@gmx.de>
-+Date: Mon, 14 Sep 2020 12:50:56 +0200
-+Subject: [PATCH] cmd/button: return button status
-+
-+To make the button command useful in a shell script it should return the
-+status of the button:
-+
-+* 0 (true) - pressed, on
-+* 1 (false) - not pressed, off
-+
-+The button command takes only one argument. Correct maxargs.
-+
-+Adjust the Python unit test.
-+
-+Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
-+Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
-+---
-+ cmd/button.c                 |  4 ++--
-+ test/py/tests/test_button.py | 34 ++++++++++++++++++++++++++--------
-+ 2 files changed, 28 insertions(+), 10 deletions(-)
-+
-+--- a/cmd/button.c
-++++ b/cmd/button.c
-+@@ -75,11 +75,11 @@ int do_button(struct cmd_tbl *cmdtp, int
-+ 
-+ 	ret = show_button_state(dev);
-+ 
-+-	return 0;
-++	return !ret;
-+ }
-+ 
-+ U_BOOT_CMD(
-+-	button, 4, 1, do_button,
-++	button, 2, 1, do_button,
-+ 	"manage buttons",
-+ 	"<button_label> \tGet button state\n"
-+ 	"button list\t\tShow a list of buttons"
-diff --git a/package/boot/uboot-mediatek/patches/007-env-readmem.patch b/package/boot/uboot-mediatek/patches/007-env-readmem.patch
-new file mode 100644
-index 0000000000..a8c88a2757
---- /dev/null
-+++ b/package/boot/uboot-mediatek/patches/007-env-readmem.patch
-@@ -0,0 +1,116 @@
-+--- a/cmd/Kconfig
-++++ b/cmd/Kconfig
-+@@ -571,6 +571,12 @@ config CMD_ENV_EXISTS
-+ 	  Check if a variable is defined in the environment for use in
-+ 	  shell scripting.
-+ 
-++config CMD_ENV_READMEM
-++	bool "env readmem"
-++	default y
-++	help
-++	  Store memory content into environment variable.
-++
-+ config CMD_ENV_CALLBACK
-+ 	bool "env callbacks - print callbacks and their associated variables"
-+ 	help
-+--- a/cmd/nvedit.c
-++++ b/cmd/nvedit.c
-+@@ -469,6 +469,60 @@ int do_env_ask(struct cmd_tbl *cmdtp, in
-+ }
-+ #endif
-+ 
-++#if defined(CONFIG_CMD_ENV_READMEM)
-++int do_env_readmem(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
-++{
-++	char varstr[CONFIG_SYS_CBSIZE];
-++	const void *buf;
-++	char *local_args[4];
-++	ulong addr, bytes = 6;
-++	int hexdump = 0;
-++
-++	/*
-++	 * Check the syntax:
-++	 *
-++	 * readmem [-b] name address [size]
-++	 */
-++	if (argc < 3)
-++		return CMD_RET_USAGE;
-++
-++	local_args[0] = argv[0];
-++
-++	if (!strncmp(argv[1], "-b", 3))
-++		hexdump = 1;
-++
-++	local_args[1] = argv[hexdump + 1];
-++	local_args[2] = varstr;
-++	local_args[3] = NULL;
-++
-++	addr = simple_strtoul(argv[hexdump + 2], NULL, 16);
-++
-++	if (!hexdump)
-++		bytes = simple_strtoul(argv[hexdump + 3], NULL, 16);
-++
-++	if (bytes < 1)
-++		return 1;
-++
-++	if ((hexdump * 3) * bytes >= CONFIG_SYS_CBSIZE)
-++		return 1;
-++
-++	buf = map_sysmem(addr, bytes);
-++	if (!buf)
-++		return 1;
-++
-++	if (hexdump) {
-++		sprintf(varstr, "%pM", buf);
-++	} else {
-++		memcpy(varstr, buf, bytes);
-++		varstr[bytes] = '\0';
-++	}
-++	unmap_sysmem(buf);
-++
-++	/* Continue calling setenv code */
-++	return _do_env_set(flag, 3, local_args, H_INTERACTIVE);
-++}
-++#endif
-++
-+ #if defined(CONFIG_CMD_ENV_CALLBACK)
-+ static int print_static_binding(const char *var_name, const char *callback_name,
-+ 				void *priv)
-+@@ -1373,6 +1427,9 @@ static struct cmd_tbl cmd_env_sub[] = {
-+ 	U_BOOT_CMD_MKENT(load, 1, 0, do_env_load, "", ""),
-+ #endif
-+ 	U_BOOT_CMD_MKENT(print, CONFIG_SYS_MAXARGS, 1, do_env_print, "", ""),
-++#if defined(CONFIG_CMD_ENV_READMEM)
-++	U_BOOT_CMD_MKENT(readmem, CONFIG_SYS_MAXARGS, 3, do_env_readmem, "", ""),
-++#endif
-+ #if defined(CONFIG_CMD_RUN)
-+ 	U_BOOT_CMD_MKENT(run, CONFIG_SYS_MAXARGS, 1, do_run, "", ""),
-+ #endif
-+@@ -1461,6 +1518,9 @@ static char env_help_text[] =
-+ #if defined(CONFIG_CMD_NVEDIT_EFI)
-+ 	"env print -e [-guid guid] [-n] [name ...] - print UEFI environment\n"
-+ #endif
-++#if defined(CONFIG_CMD_ENV_READMEM)
-++	"env readmem [-b] name address size - read variable from memory\n"
-++#endif
-+ #if defined(CONFIG_CMD_RUN)
-+ 	"env run var [...] - run commands in an environment variable\n"
-+ #endif
-+@@ -1570,6 +1630,17 @@ U_BOOT_CMD(
-+ );
-+ #endif
-+ 
-++#if defined(CONFIG_CMD_ENV_READMEM)
-++U_BOOT_CMD_COMPLETE(
-++	readmem,	CONFIG_SYS_MAXARGS,	3,	do_env_readmem,
-++	"get environment variable from memory address",
-++	"name [-b] address size\n"
-++	"    - store memory address to env variable\n"
-++	"      \"-b\": read binary ethaddr",
-++	var_complete
-++);
-++#endif
-++
-+ #if defined(CONFIG_CMD_RUN)
-+ U_BOOT_CMD_COMPLETE(
-+ 	run,	CONFIG_SYS_MAXARGS,	1,	do_run,
-diff --git a/package/boot/uboot-mediatek/patches/008-bootmenu-custom-title.patch b/package/boot/uboot-mediatek/patches/008-bootmenu-custom-title.patch
-new file mode 100644
-index 0000000000..32f26ece8e
---- /dev/null
-+++ b/package/boot/uboot-mediatek/patches/008-bootmenu-custom-title.patch
-@@ -0,0 +1,32 @@
-+--- a/cmd/bootmenu.c
-++++ b/cmd/bootmenu.c
-+@@ -38,6 +38,7 @@ struct bootmenu_data {
-+ 	int active;			/* active menu entry */
-+ 	int count;			/* total count of menu entries */
-+ 	struct bootmenu_entry *first;	/* first menu entry */
-++	char *mtitle;			/* custom menu title */
-+ };
-+ 
-+ enum bootmenu_key {
-+@@ -380,7 +381,12 @@ static void menu_display_statusline(stru
-+ 	printf(ANSI_CURSOR_POSITION, 1, 1);
-+ 	puts(ANSI_CLEAR_LINE);
-+ 	printf(ANSI_CURSOR_POSITION, 2, 1);
-+-	puts("  *** U-Boot Boot Menu ***");
-++
-++	if (menu->mtitle)
-++		puts(menu->mtitle);
-++	else
-++		puts("  *** U-Boot Boot Menu ***");
-++
-+ 	puts(ANSI_CLEAR_LINE_TO_END);
-+ 	printf(ANSI_CURSOR_POSITION, 3, 1);
-+ 	puts(ANSI_CLEAR_LINE);
-+@@ -434,6 +440,7 @@ static void bootmenu_show(int delay)
-+ 		return;
-+ 	}
-+ 
-++	bootmenu->mtitle = env_get("bootmenu_title");
-+ 	for (iter = bootmenu->first; iter; iter = iter->next) {
-+ 		if (!menu_item_add(menu, iter->key, iter))
-+ 			goto cleanup;
-diff --git a/package/boot/uboot-mediatek/patches/009-mt7622-generic-reset-button-ignore-env.patch b/package/boot/uboot-mediatek/patches/009-mt7622-generic-reset-button-ignore-env.patch
-new file mode 100644
-index 0000000000..037bbb89ea
---- /dev/null
-+++ b/package/boot/uboot-mediatek/patches/009-mt7622-generic-reset-button-ignore-env.patch
-@@ -0,0 +1,35 @@
-+--- a/board/mediatek/mt7622/mt7622_rfb.c
-++++ b/board/mediatek/mt7622/mt7622_rfb.c
-+@@ -6,9 +6,15 @@
-+ 
-+ #include <common.h>
-+ #include <config.h>
-++#include <dm.h>
-++#include <button.h>
-+ #include <env.h>
-+ #include <init.h>
-+ 
-++#ifndef CONFIG_RESET_BUTTON_LABEL
-++#define CONFIG_RESET_BUTTON_LABEL "reset"
-++#endif
-++
-+ DECLARE_GLOBAL_DATA_PTR;
-+ 
-+ int board_init(void)
-+@@ -19,7 +25,15 @@ int board_init(void)
-+ 
-+ int board_late_init(void)
-+ {
-+-	gd->env_valid = 1; //to load environment variable from persistent store
-++	struct udevice *dev;
-++	int ret;
-++
-++	ret = !!button_get_by_label(CONFIG_RESET_BUTTON_LABEL, &dev);
-++
-++	if (!ret)
-++		ret = !button_get_state(dev);
-++
-++	gd->env_valid = ret; //to load environment variable from persistent store
-+ 	env_relocate();
-+ 	return 0;
-+ }
-diff --git a/package/boot/uboot-mediatek/patches/010-no-binman.patch b/package/boot/uboot-mediatek/patches/010-no-binman.patch
-index a2680e56fd..7071a6c410 100644
---- a/package/boot/uboot-mediatek/patches/010-no-binman.patch
-+++ b/package/boot/uboot-mediatek/patches/010-no-binman.patch
-@@ -1,6 +1,6 @@
----- a/Makefile	2020-10-13 13:39:06.471438591 +0800
--+++ b/Makefile	2020-10-13 13:39:39.190798462 +0800
--@@ -1725,6 +1725,10 @@
-+--- a/Makefile
-++++ b/Makefile
-+@@ -1716,6 +1716,10 @@ u-boot-elf.lds: arch/u-boot-elf.lds prep
-  
-  ifeq ($(CONFIG_SPL),y)
-  spl/u-boot-spl-mtk.bin: spl/u-boot-spl
-diff --git a/package/boot/uboot-mediatek/patches/010-update-u7623-defconfig.patch b/package/boot/uboot-mediatek/patches/010-update-u7623-defconfig.patch
-index ec189f82dc..37d1b6a671 100644
---- a/package/boot/uboot-mediatek/patches/010-update-u7623-defconfig.patch
-+++ b/package/boot/uboot-mediatek/patches/010-update-u7623-defconfig.patch
-@@ -1,5 +1,3 @@
--diff --git a/configs/mt7623n_bpir2_defconfig b/configs/mt7623n_bpir2_defconfig
--index 6b9fbd7e22..fb2a004803 100644
- --- a/configs/mt7623a_unielec_u7623_02_defconfig
- +++ b/configs/mt7623a_unielec_u7623_02_defconfig
- @@ -52,3 +52,12 @@ CONFIG_TIMER=y
-diff --git a/package/boot/uboot-mediatek/patches/020-add-linksys-e8450.patch b/package/boot/uboot-mediatek/patches/020-add-linksys-e8450.patch
-new file mode 100644
-index 0000000000..5f84b28ba9
---- /dev/null
-+++ b/package/boot/uboot-mediatek/patches/020-add-linksys-e8450.patch
-@@ -0,0 +1,436 @@
-+--- /dev/null
-++++ b/configs/mt7622_linksys_e8450_defconfig
-+@@ -0,0 +1,130 @@
-++CONFIG_ARM=y
-++CONFIG_POSITION_INDEPENDENT=y
-++CONFIG_ARCH_MEDIATEK=y
-++CONFIG_SYS_TEXT_BASE=0x41e00000
-++CONFIG_SYS_MALLOC_F_LEN=0x4000
-++CONFIG_USE_DEFAULT_ENV_FILE=y
-++CONFIG_BOARD_LATE_INIT=y
-++CONFIG_BOOTP_SEND_HOSTNAME=y
-++CONFIG_DEFAULT_ENV_FILE="linksys_e8450_env"
-++CONFIG_NR_DRAM_BANKS=1
-++CONFIG_DEFAULT_DEVICE_TREE="mt7622-linksys-e8450"
-++CONFIG_SMBIOS_PRODUCT_NAME=""
-++CONFIG_AUTOBOOT_KEYED=y
-++CONFIG_BOOTDELAY=30
-++CONFIG_AUTOBOOT_MENU_SHOW=y
-++CONFIG_CFB_CONSOLE_ANSI=y
-++CONFIG_BUTTON=y
-++CONFIG_BUTTON_GPIO=y
-++CONFIG_CMD_ENV_FLAGS=y
-++CONFIG_FIT=y
-++CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-++CONFIG_LED=y
-++CONFIG_LED_BLINK=y
-++CONFIG_LED_GPIO=y
-++CONFIG_LOGLEVEL=7
-++CONFIG_LOG=y
-++CONFIG_DEFAULT_FDT_FILE="mt7622-linksys-e8450"
-++CONFIG_SYS_PROMPT="MT7622> "
-++CONFIG_CMD_BOOTMENU=y
-++CONFIG_CMD_BOOTP=y
-++CONFIG_CMD_BUTTON=y
-++CONFIG_CMD_CDP=y
-++CONFIG_CMD_DHCP=y
-++CONFIG_CMD_DNS=y
-++CONFIG_CMD_ECHO=y
-++CONFIG_CMD_ENV_READMEM=y
-++CONFIG_CMD_ERASEENV=y
-++CONFIG_CMD_EXT4=y
-++CONFIG_CMD_FAT=y
-++CONFIG_CMD_FS_GENERIC=y
-++CONFIG_CMD_FS_UUID=y
-++CONFIG_CMD_GPIO=y
-++CONFIG_CMD_GPT=y
-++CONFIG_CMD_HASH=y
-++CONFIG_CMD_ITEST=y
-++CONFIG_CMD_LED=y
-++CONFIG_CMD_LICENSE=y
-++CONFIG_CMD_LINK_LOCAL=y
-++CONFIG_CMD_MBR=y
-++CONFIG_CMD_MTD=y
-++CONFIG_CMD_MTDPART=y
-++CONFIG_CMD_NAND=y
-++CONFIG_CMD_PCI=y
-++CONFIG_CMD_SF_TEST=y
-++CONFIG_CMD_PING=y
-++CONFIG_CMD_PXE=y
-++CONFIG_CMD_SMC=y
-++CONFIG_CMD_TFTPBOOT=y
-++CONFIG_CMD_TFTPSRV=y
-++CONFIG_CMD_UBI=y
-++CONFIG_CMD_UBI_RENAME=y
-++CONFIG_CMD_UBIFS=y
-++CONFIG_CMD_ASKENV=y
-++CONFIG_CMD_PART=y
-++CONFIG_CMD_PSTORE=y
-++CONFIG_CMD_RARP=y
-++CONFIG_CMD_SETEXPR=y
-++CONFIG_CMD_SLEEP=y
-++CONFIG_CMD_SNTP=y
-++CONFIG_CMD_SOURCE=y
-++CONFIG_CMD_USB=y
-++CONFIG_CMD_UUID=y
-++CONFIG_DISPLAY_CPUINFO=y
-++CONFIG_DM_REGULATOR=y
-++CONFIG_DM_REGULATOR_FIXED=y
-++CONFIG_DM_REGULATOR_GPIO=y
-++CONFIG_DM_USB=y
-++CONFIG_HUSH_PARSER=y
-++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-++CONFIG_ENV_IS_IN_UBI=y
-++CONFIG_ENV_UBI_PART="ubi"
-++CONFIG_ENV_UBI_VOLUME="ubootenv"
-++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
-++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-++CONFIG_VERSION_VARIABLE=y
-++CONFIG_PARTITION_UUIDS=y
-++CONFIG_NETCONSOLE=y
-++CONFIG_REGMAP=y
-++CONFIG_SYSCON=y
-++CONFIG_CLK=y
-++CONFIG_DM_MTD=y
-++CONFIG_PHY_FIXED=y
-++CONFIG_DM_ETH=y
-++CONFIG_MEDIATEK_ETH=y
-++CONFIG_PCI=y
-++CONFIG_MTD=y
-++CONFIG_MTD_RAW_NAND=y
-++CONFIG_MTD_UBI_FASTMAP=y
-++CONFIG_DM_PCI=y
-++CONFIG_PCIE_MEDIATEK=y
-++CONFIG_PINCTRL=y
-++CONFIG_PINCONF=y
-++CONFIG_PINCTRL_MT7622=y
-++CONFIG_POWER_DOMAIN=y
-++CONFIG_PRE_CONSOLE_BUFFER=y
-++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
-++CONFIG_MTK_POWER_DOMAIN=y
-++CONFIG_RAM=y
-++CONFIG_DM_SERIAL=y
-++CONFIG_MTK_SERIAL=y
-++CONFIG_SPI=y
-++CONFIG_DM_SPI=y
-++CONFIG_MTK_SNFI_SPI=y
-++CONFIG_MTK_SPI_NAND=y
-++CONFIG_NAND_SUPPORT=y
-++CONFIG_SYSRESET_WATCHDOG=y
-++CONFIG_TIMER=y
-++CONFIG_MTK_TIMER=y
-++CONFIG_WDT_MTK=y
-++CONFIG_LZO=y
-++CONFIG_ZSTD=y
-++CONFIG_HEXDUMP=y
-++CONFIG_RANDOM_UUID=y
-++CONFIG_REGEX=y
-++CONFIG_USB=y
-++CONFIG_USB_HOST=y
-++CONFIG_USB_XHCI_HCD=y
-++CONFIG_USB_XHCI_MTK=y
-++CONFIG_USB_STORAGE=y
-+--- /dev/null
-++++ b/arch/arm/dts/mt7622-linksys-e8450.dts
-+@@ -0,0 +1,206 @@
-++// SPDX-License-Identifier: GPL-2.0
-++/*
-++ * Copyright (c) 2019 MediaTek Inc.
-++ * Author: Sam Shih <sam.shih@mediatek.com>
-++ */
-++
-++/dts-v1/;
-++#include "mt7622.dtsi"
-++#include "mt7622-u-boot.dtsi"
-++
-++/ {
-++	#address-cells = <1>;
-++	#size-cells = <1>;
-++	model = "mt7622-linksys-e8450";
-++	compatible = "mediatek,mt7622", "linksys,e8450";
-++	chosen {
-++		stdout-path = &uart0;
-++		tick-timer = &timer0;
-++	};
-++
-++	aliases {
-++		spi0 = &snfi;
-++	};
-++
-++	gpio-keys {
-++		compatible = "gpio-keys";
-++
-++		factory {
-++			label = "reset";
-++			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
-++		};
-++
-++		wps {
-++			label = "wps";
-++			gpios = <&gpio 102 GPIO_ACTIVE_LOW>;
-++		};
-++	};
-++
-++	gpio-leds {
-++		compatible = "gpio-leds";
-++
-++		led_power: power_blue {
-++			label = "power:blue";
-++			gpios = <&gpio 95 GPIO_ACTIVE_LOW>;
-++			default-state = "on";
-++		};
-++
-++		power_orange {
-++			label = "power:orange";
-++			gpios = <&gpio 96 GPIO_ACTIVE_LOW>;
-++			default-state = "off";
-++		};
-++
-++		inet_blue {
-++			label = "inet:blue";
-++			gpios = <&gpio 97 GPIO_ACTIVE_LOW>;
-++			default-state = "off";
-++		};
-++
-++		inet_orange {
-++			label = "inet:orange";
-++			gpios = <&gpio 98 GPIO_ACTIVE_LOW>;
-++			default-state = "off";
-++		};
-++	};
-++
-++	memory@40000000 {
-++		device_type = "memory";
-++		reg = <0x40000000 0x1F000000>;
-++	};
-++
-++	reg_1p8v: regulator-1p8v {
-++		compatible = "regulator-fixed";
-++		regulator-name = "fixed-1.8V";
-++		regulator-min-microvolt = <1800000>;
-++		regulator-max-microvolt = <1800000>;
-++		regulator-boot-on;
-++		regulator-always-on;
-++	};
-++
-++	reg_3p3v: regulator-3p3v {
-++		compatible = "regulator-fixed";
-++		regulator-name = "fixed-3.3V";
-++		regulator-min-microvolt = <3300000>;
-++		regulator-max-microvolt = <3300000>;
-++		regulator-boot-on;
-++		regulator-always-on;
-++	};
-++
-++	reg_5v: regulator-5v {
-++		compatible = "regulator-fixed";
-++		regulator-name = "fixed-5V";
-++		regulator-min-microvolt = <5000000>;
-++		regulator-max-microvolt = <5000000>;
-++		regulator-boot-on;
-++		regulator-always-on;
-++	};
-++};
-++
-++&pcie {
-++	pinctrl-names = "default";
-++	pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>;
-++	status = "okay";
-++
-++	pcie@0,0 {
-++		status = "okay";
-++	};
-++
-++	pcie@1,0 {
-++		status = "okay";
-++	};
-++};
-++
-++&pinctrl {
-++	pcie0_pins: pcie0-pins {
-++		mux {
-++			function = "pcie";
-++			groups = "pcie0_pad_perst",
-++				 "pcie0_1_waken",
-++				 "pcie0_1_clkreq";
-++		};
-++	};
-++
-++	pcie1_pins: pcie1-pins {
-++		mux {
-++			function = "pcie";
-++			groups = "pcie1_pad_perst",
-++				 "pcie1_0_waken",
-++				 "pcie1_0_clkreq";
-++		};
-++	};
-++
-++	snfi_pins: snfi-pins {
-++		mux {
-++			function = "flash";
-++			groups = "snfi";
-++		};
-++	};
-++
-++	uart0_pins: uart0 {
-++		mux {
-++			function = "uart";
-++			groups = "uart0_0_tx_rx" ;
-++		};
-++	};
-++
-++	watchdog_pins: watchdog-default {
-++		mux {
-++			function = "watchdog";
-++			groups = "watchdog";
-++		};
-++	};
-++};
-++
-++&snfi {
-++	pinctrl-names = "default";
-++	pinctrl-0 = <&snfi_pins>;
-++	status = "okay";
-++
-++	mediatek,bmt-v2;
-++
-++	spi-flash@0{
-++		compatible = "jedec,spi-nor";
-++		reg = <0>;
-++		u-boot,dm-pre-reloc;
-++	};
-++};
-++
-++&nandc {
-++	status = "okay";
-++};
-++
-++&uart0 {
-++	pinctrl-names = "default";
-++	pinctrl-0 = <&uart0_pins>;
-++	status = "okay";
-++};
-++
-++&watchdog {
-++	pinctrl-names = "default";
-++	pinctrl-0 = <&watchdog_pins>;
-++	status = "okay";
-++};
-++
-++&eth {
-++	status = "okay";
-++	mediatek,gmac-id = <0>;
-++	phy-mode = "sgmii";
-++	mediatek,switch = "mt7531";
-++	reset-gpios = <&gpio 54 GPIO_ACTIVE_HIGH>;
-++
-++	fixed-link {
-++		speed = <1000>;
-++		full-duplex;
-++	};
-++};
-++
-++&ssusb {
-++	vusb33-supply = <&reg_3p3v>;
-++	vbus-supply = <&reg_5v>;
-++	status = "okay";
-++};
-++
-++&u3phy {
-++	status = "okay";
-++};
-+--- a/arch/arm/dts/Makefile
-++++ b/arch/arm/dts/Makefile
-+@@ -963,6 +963,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
-+ 	mt7622-rfb.dtb \
-+ 	mt7623a-unielec-u7623-02-emmc.dtb \
-+ 	mt7622-bananapi-bpi-r64.dtb \
-++	mt7622-linksys-e8450.dtb \
-+ 	mt7623n-bananapi-bpi-r2.dtb \
-+ 	mt7629-rfb.dtb \
-+ 	mt8512-bm1-emmc.dtb \
-+--- a/drivers/mtd/nandx/core/nand/device_spi.c
-++++ b/drivers/mtd/nandx/core/nand/device_spi.c
-+@@ -150,6 +150,21 @@ static struct device_spi spi_nand[] = {
-+ 		&spi_extend_cmds, 0xff, 0xff
-+ 	},
-+ 	{
-++		NAND_DEVICE("FM35X1GA",
-++			    NAND_PACK_ID(0xe5, 0x71, 0, 0, 0, 0, 0, 0),
-++			    2, 0, 3, 3,
-++			    1, 1, 1, 1024, KB(128), KB(2), 64, 1,
-++			    &spi_cmds, &spi_addressing, &spi_status[0],
-++			    &spi_endurance, &spi_array_timing),
-++		{
-++			NAND_SPI_PROTECT(0xa0, 1, 2, 6),
-++			NAND_SPI_CONFIG(0xb0, 4, 6, 1),
-++			NAND_SPI_STATUS(0xc0, 4, 5),
-++			NAND_SPI_CHARACTER(0xff, 0xff, 0xff, 0xff)
-++		},
-++		&spi_extend_cmds, 0xff, 0xff
-++	},
-++	{
-+ 		NAND_DEVICE("NO-DEVICE",
-+ 			    NAND_PACK_ID(0, 0, 0, 0, 0, 0, 0, 0), 0, 0, 0, 0,
-+ 			    0, 0, 0, 0, 0, 0, 0, 1,
-+--- /dev/null
-++++ b/linksys_e8450_env
-+@@ -0,0 +1,57 @@
-++mtdparts=nand0:512k(bl2),1280k(fip),1024k(factory),256k(reserved),-(ubi)
-++ethaddr_factory=nand read 0x40080000 0x220000 0x20000 && env readmem -b ethaddr 0x4009fffa 0x6 ; setenv ethaddr_factory
-++ipaddr=192.168.1.1
-++serverip=192.168.1.254
-++loadaddr=0x4007ff28
-++bootcmd=run boot_ubi
-++bootdelay=0
-++bootfile=openwrt-mediatek-mt7622-linksys_e8450_ubi-initramfs-kernel.bin
-++bootfile_bl2=openwrt-mediatek-mt7622-linksys_e8450_ubi-preloader.bin
-++bootfile_fip=openwrt-mediatek-mt7622-linksys_e8450_ubi-bl31-uboot.fip
-++bootfile_upd=openwrt-mediatek-mt7622-linksys_e8450_ubi-squashfs-sysupgrade.fit
-++bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu
-++bootmenu_default=0
-++bootmenu_delay=0
-++bootmenu_title=      ( ( ( OpenWrt ) ) )
-++bootmenu_0=0. Initialize environment.=run _firstboot
-++bootmenu_0d=0. Run default boot command.=run boot_default
-++bootmenu_1=1. Boot recovery system from flash.=run boot_recovery ; run bootmenu_confirm_return
-++bootmenu_2=2. Boot production system from flash.=run boot_production ; run bootmenu_confirm_return
-++bootmenu_3=3. Boot system from TFTP.=run boot_tftp ; run bootmenu_confirm_return
-++bootmenu_4=4. Load recovery system then write to flash via TFTP.=setenv noboot 1 ; run boot_tftp_recovery ; setenv noboot ; run bootmenu_confirm_return
-++bootmenu_5=5. Load production system then write to flash via TFTP.=setenv noboot 1 ; run boot_tftp_production ; setenv noboot ; run bootmenu_confirm_return
-++bootmenu_6=6. Load BL31+U-Boot FIP then write to flash via TFTP.=run boot_tftp_write_fip ; run bootmenu_confirm_return
-++bootmenu_7=7. Load BL2 preloader then write to flash via TFTP.=run boot_tftp_write_preloader ; run bootmenu_confirm_return
-++bootmenu_8=8. Reboot.=reset
-++bootmenu_9=9. Reset all settings to factory defaults.=run reset_factory ; reset
-++boot_first=if button reset ; then run boot_tftp_forever ; fi ; setenv flag_recover 1 ; bootmenu
-++boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; run boot_tftp_forever
-++boot_production=led power:blue on ; run ubi_read_production && bootm $loadaddr
-++boot_production_or_recovery=run boot_production ; run boot_recovery
-++boot_recovery=led power:blue off ; led power:orange on ; run check_recovery
-++boot_serial_write_fip=loadx $loadaddr 115200 && run boot_write_fip
-++boot_serial_write_preloader=loadx $loadaddr 115200 && run boot_write_preloader
-++boot_tftp_forever=led inet:blue on ; while true ; do run boot_tftp_recovery ; led inet:blue off ; led inet:orange on ; sleep 1 ; done
-++boot_tftp_production=tftpboot $loadaddr $bootfile_upd && iminfo $loadaddr && ubi part ubi && run ubi_write_production ubi_prepare_rootfs ; if env exists noboot ; then else bootm $loadaddr ; fi
-++boot_tftp_recovery=tftpboot $loadaddr $bootfile && iminfo $loadaddr && ubi part ubi && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr ; fi
-++boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr
-++boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run boot_write_fip
-++boot_tftp_write_preloader=tftpboot $loadaddr $bootfile_bl2 && run boot_write_preloader
-++boot_ubi=ubi part ubi && run boot_production_or_recovery
-++boot_write_fip=nand erase 0x80000 0x140000 && nand write $loadaddr 0x80000 0x140000
-++boot_write_preloader=nand erase 0x0 0x80000 && nand write $loadaddr 0x0 0x20000 && nand write $loadaddr 0x20000 0x20000 && nand write $loadaddr 0x40000 0x20000 && nand write $loadaddr 0x60000 0x20000
-++check_recovery=run ubi_read_recovery ; if iminfo $loadaddr ; then bootm $loadaddr ; else ubi remove recovery ; fi
-++check_ubi=ubi part ubi || run ubi_format
-++reset_factory=ubi part ubi ; ubi write 0x0 ubootenv 0x0 ; ubi write 0x0 ubootenv2 0x0 ; ubi remove rootfs_data
-++ubi_format=ubi detach ; nand erase 0x300000 0x7D00000 && ubi part ubi ; reset
-++ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
-++ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
-++ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
-++ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
-++ubi_write_production=run ubi_remove_rootfs ; ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
-++ubi_write_recovery=run ubi_remove_rootfs ; ubi check recovery && ubi remove recovery; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
-++_create_env=ubi create ubootenv 0x100000 dynamic ; ubi create ubootenv2 0x100000 dynamic
-++_init_env=setenv _init_env ; if ubi check ubootenv && ubi check ubootenv2 ; then else run _create_env ; fi ; setenv _create_env ; saveenv || run ubi_format ; saveenv || run ubi_format
-++_firstboot=setenv _firstboot ; led power:orange on ; run _switch_to_menu ; run ethaddr_factory ; run check_ubi ; run _init_env ; run boot_first
-++_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
-++_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title       $ver"
-diff --git a/package/boot/uboot-mediatek/patches/100-increase-CONFIG_SYS_BOOTM_LEN.patch b/package/boot/uboot-mediatek/patches/100-increase-CONFIG_SYS_BOOTM_LEN.patch
-new file mode 100644
-index 0000000000..811e8489dd
---- /dev/null
-+++ b/package/boot/uboot-mediatek/patches/100-increase-CONFIG_SYS_BOOTM_LEN.patch
-@@ -0,0 +1,11 @@
-+--- a/include/configs/mt7622.h
-++++ b/include/configs/mt7622.h
-+@@ -37,7 +37,7 @@
-+ #endif
-+ 
-+ #define CONFIG_SYS_MAXARGS		8
-+-#define CONFIG_SYS_BOOTM_LEN		SZ_64M
-++#define CONFIG_SYS_BOOTM_LEN		SZ_128M
-+ #define CONFIG_SYS_CBSIZE		SZ_1K
-+ #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE +	\
-+ 					sizeof(CONFIG_SYS_PROMPT) + 16)
--- 
-2.25.1
-
diff --git a/patches/backports/0007-uboot-envtools-add-defaults-for-linksys-e8450-ubi.patch b/patches/backports/0007-uboot-envtools-add-defaults-for-linksys-e8450-ubi.patch
deleted file mode 100644
index 462d6890e..000000000
--- a/patches/backports/0007-uboot-envtools-add-defaults-for-linksys-e8450-ubi.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 1a9921bab861dd2c89337c3e4833c716a0474653 Mon Sep 17 00:00:00 2001
-From: Daniel Golle <daniel@makrotopia.org>
-Date: Fri, 12 Feb 2021 03:09:39 +0000
-Subject: [PATCH 07/27] uboot-envtools: add defaults for linksys-e8450-ubi
-
-Add U-Boot environment configuration for the Linksys E8450 (UBI) to
-allow access to the bootloader environment from OpenWrt via
-'fw_printenv' and 'fw_setenv'.
-
-Signed-off-by: Daniel Golle <daniel@makrotopia.org>
----
- package/boot/uboot-envtools/files/mediatek | 46 ++++++++++++++++++++++
- 1 file changed, 46 insertions(+)
- create mode 100644 package/boot/uboot-envtools/files/mediatek
-
-diff --git a/package/boot/uboot-envtools/files/mediatek b/package/boot/uboot-envtools/files/mediatek
-new file mode 100644
-index 0000000000..495a837274
---- /dev/null
-+++ b/package/boot/uboot-envtools/files/mediatek
-@@ -0,0 +1,46 @@
-+#
-+# Copyright (C) 2021 OpenWrt.org
-+#
-+
-+[ -e /etc/config/ubootenv ] && exit 0
-+
-+touch /etc/config/ubootenv
-+
-+. /lib/uboot-envtools.sh
-+. /lib/functions.sh
-+
-+board=$(board_name)
-+
-+case "$board" in
-+linksys,e8450-ubi)
-+	ubootenv_add_uci_config "/dev/ubi0_0" "0x0" "0x1f000" "0x1f000" "1"
-+	ubootenv_add_uci_config "/dev/ubi0_1" "0x0" "0x1f000" "0x1f000" "1"
-+	;;
-+bananapi,bpi-r64)
-+	. /lib/upgrade/common.sh
-+	export_bootdevice
-+	export_partdevice rootdev 0
-+	case "$rootdev" in
-+	mmc*)
-+		local envdev=/dev/$(get_partition_by_name $rootdev ubootenv)
-+		ubootenv_add_uci_config "$envdev" "0x0" "0x80000" "0x80000" "1"
-+		ubootenv_add_uci_config "$envdev" "0x80000" "0x80000" "0x80000" "1"
-+		;;
-+	*)
-+		ubootenv_add_uci_config "/dev/ubi0_0" "0x0" "0x1f000" "0x1f000" "1"
-+		ubootenv_add_uci_config "/dev/ubi0_1" "0x0" "0x1f000" "0x1f000" "1"
-+		;;
-+	esac
-+	;;
-+buffalo,wsr-2533dhp2)
-+	ubootenv_add_uci_config "/dev/mtd3" "0x0" "0x1000" "0x20000"
-+	;;
-+ubnt,unifi-6-lr-ubootmod)
-+	ubootenv_add_uci_config "/dev/mtd2" "0x0" "0x4000" "0x10000"
-+	;;
-+esac
-+
-+config_load ubootenv
-+config_foreach ubootenv_add_app_config ubootenv
-+
-+exit 0
--- 
-2.25.1
-
diff --git a/patches/backports/0008-realtek-update-to-latest-owrt-HEAD.patch b/patches/backports/0008-realtek-update-to-latest-owrt-HEAD.patch
deleted file mode 100644
index e9a00418a..000000000
--- a/patches/backports/0008-realtek-update-to-latest-owrt-HEAD.patch
+++ /dev/null
@@ -1,20597 +0,0 @@
-From 9baf9f77dbc5129bd0f8f655e9ccf9fab93cd7e6 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Sat, 4 Sep 2021 05:42:30 +0200
-Subject: [PATCH 01/88] realtek: update to latest owrt HEAD
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- .../realtek/base-files/etc/board.d/01_leds    |    1 -
- .../realtek/base-files/etc/board.d/02_network |   12 +-
- .../lib/preinit/05_set_preinit_iface_realtek  |   13 -
- .../lib/preinit/98_remove_preinit_realtek     |    6 -
- target/linux/realtek/config-5.4               |   31 +-
- .../realtek/dts/rtl8380_netgear_gigabit.dtsi  |   11 +-
- .../realtek/dts/rtl8380_zyxel_gs1900-10hp.dts |    4 +-
- .../realtek/dts/rtl8380_zyxel_gs1900-8.dts    |   12 -
- .../realtek/dts/rtl8380_zyxel_gs1900.dtsi     |    1 +
- .../dts/rtl8382_allnet_all-sg8208m.dts        |    1 +
- .../dts/rtl8382_d-link_dgs-1210-10p.dts       |    1 +
- .../realtek/dts/rtl8382_d-link_dgs-1210.dtsi  |    1 +
- .../dts/rtl8392_edgecore_ecs4100-12ph.dts     |  301 ++
- target/linux/realtek/dts/rtl839x.dtsi         |  197 ++
- .../include/asm/mach-rtl838x/mach-rtl83xx.h   |   30 +-
- .../files-5.4/drivers/gpio/gpio-rtl838x.c     |  119 +-
- .../files-5.4/drivers/net/dsa/rtl83xx/Kconfig |    2 +-
- .../drivers/net/dsa/rtl83xx/Makefile          |    2 +-
- .../drivers/net/dsa/rtl83xx/common.c          | 1065 +++++-
- .../drivers/net/dsa/rtl83xx/debugfs.c         |  392 +-
- .../files-5.4/drivers/net/dsa/rtl83xx/dsa.c   | 1363 +++++--
- .../drivers/net/dsa/rtl83xx/rtl838x.c         | 1749 ++++++++-
- .../drivers/net/dsa/rtl83xx/rtl838x.h         |  472 ---
- .../drivers/net/dsa/rtl83xx/rtl839x.c         | 1617 ++++++++-
- .../drivers/net/dsa/rtl83xx/rtl83xx.h         |   16 +-
- .../drivers/net/dsa/rtl83xx/rtl930x.c         | 2065 ++++++++++-
- .../drivers/net/dsa/rtl83xx/rtl931x.c         |  191 +-
- .../files-5.4/drivers/net/dsa/rtl83xx/tc.c    |  406 +++
- .../drivers/net/ethernet/rtl838x_eth.c        |  352 +-
- .../drivers/net/ethernet/rtl838x_eth.h        |    3 +-
- .../files-5.4/drivers/net/phy/rtl83xx-phy.c   | 1078 ++++--
- .../realtek/files-5.4/include/linux/rtl838x.h | 1072 ++++++
- .../realtek/files-5.4/net/dsa/tag_rtl83xx.c   |  119 +
- target/linux/realtek/image/Makefile           |   44 +-
- .../realtek/patches-5.4/100-dsa-lag.patch     | 3145 +++++++++++++++++
- .../realtek/patches-5.4/101-brflood-api.patch |  817 +++++
- ...0-gpio-Add-Realtek-Otto-GPIO-support.patch |  405 +++
- ...net-add-support-for-rtl838x-ethernet.patch |    2 +-
- ...nclude-linux-add-phy-ops-for-rtl838x.patch |    2 +-
- ...04-include-linux-add-phy-hsgmii-mode.patch |   19 +
- .../realtek/patches-5.4/706-sysled.patch      |  288 ++
- .../patches-5.4/707-dsa-trailer-hack.patch    |   44 +
- .../realtek/patches-5.4/707-reboot.patch      |    7 +
- .../patches-5.4/708-dsa-backports.patch       |  239 ++
- .../realtek/patches-5.4/710-adt7470.patch     |   20 +
- .../realtek/patches-5.4/711-ec4100.patch      |  150 +
- .../linux/realtek/patches-5.4/712-fixes.patch |   23 +
- 47 files changed, 16286 insertions(+), 1624 deletions(-)
- delete mode 100644 target/linux/realtek/base-files/lib/preinit/05_set_preinit_iface_realtek
- delete mode 100644 target/linux/realtek/base-files/lib/preinit/98_remove_preinit_realtek
- delete mode 100644 target/linux/realtek/dts/rtl8380_zyxel_gs1900-8.dts
- create mode 100644 target/linux/realtek/dts/rtl8392_edgecore_ecs4100-12ph.dts
- create mode 100644 target/linux/realtek/dts/rtl839x.dtsi
- delete mode 100644 target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl838x.h
- create mode 100644 target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/tc.c
- create mode 100644 target/linux/realtek/files-5.4/include/linux/rtl838x.h
- create mode 100644 target/linux/realtek/files-5.4/net/dsa/tag_rtl83xx.c
- create mode 100644 target/linux/realtek/patches-5.4/100-dsa-lag.patch
- create mode 100644 target/linux/realtek/patches-5.4/101-brflood-api.patch
- create mode 100644 target/linux/realtek/patches-5.4/500-gpio-Add-Realtek-Otto-GPIO-support.patch
- create mode 100644 target/linux/realtek/patches-5.4/704-include-linux-add-phy-hsgmii-mode.patch
- create mode 100644 target/linux/realtek/patches-5.4/706-sysled.patch
- create mode 100644 target/linux/realtek/patches-5.4/707-dsa-trailer-hack.patch
- create mode 100644 target/linux/realtek/patches-5.4/707-reboot.patch
- create mode 100644 target/linux/realtek/patches-5.4/708-dsa-backports.patch
- create mode 100644 target/linux/realtek/patches-5.4/710-adt7470.patch
- create mode 100644 target/linux/realtek/patches-5.4/711-ec4100.patch
- create mode 100644 target/linux/realtek/patches-5.4/712-fixes.patch
-
-diff --git a/target/linux/realtek/base-files/etc/board.d/01_leds b/target/linux/realtek/base-files/etc/board.d/01_leds
-index 699ab817dd..36ca01a696 100755
---- a/target/linux/realtek/base-files/etc/board.d/01_leds
-+++ b/target/linux/realtek/base-files/etc/board.d/01_leds
-@@ -1,5 +1,4 @@
- #!/bin/sh
--
- . /lib/functions/uci-defaults.sh
- 
- board=$(board_name)
-diff --git a/target/linux/realtek/base-files/etc/board.d/02_network b/target/linux/realtek/base-files/etc/board.d/02_network
-index 45ab84ee9e..7a53e2ca9e 100755
---- a/target/linux/realtek/base-files/etc/board.d/02_network
-+++ b/target/linux/realtek/base-files/etc/board.d/02_network
-@@ -19,12 +19,11 @@ board=$(board_name)
- board_config_update
- 
- lan_list=""
--for lan in /sys/class/net/lan*; do
--	lan_list="$lan_list $(basename $lan)"
-+for lan in $(ls -d /sys/class/net/lan* | cut -dn -f3 |sort -n); do
-+	lan_list="$lan_list lan$lan"
- done
- ucidef_set_bridge_device switch
- ucidef_set_interface_wan "$lan_list"
--ucidef_set_interface "lan" device "lan1:t" protocol "static" vlan 100
- 
- lan_mac=""
- wan_mac=""
-@@ -32,13 +31,11 @@ label_mac=""
- case $board in
- *)
- 	wan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr)
-+	lan_mac=$(macaddr_add $wan_mac 1)
- 	label_mac=$lan_mac
- 	;;
- esac
- 
--lan_mac=$(macaddr_setbit_la $wan_mac)
--
--ucidef_set_interface_macaddr "lan" $lan_mac
- ucidef_set_interface_macaddr "wan" $wan_mac
- ucidef_set_bridge_mac "$wan_mac"
- ucidef_set_network_device_mac eth0 $wan_mac
-@@ -49,6 +46,9 @@ done
- [ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
- 
- case $board in
-+edgecore,ecs4100-12ph)
-+	ucidef_set_poe 130 "lan1 lan2 lan3 lan4 lan5 lan6 lan7 lan8"
-+	;;
- netgear,gs110tpp-v1)
- 	ucidef_set_poe 130 "$lan_list"
- 	;;
-diff --git a/target/linux/realtek/base-files/lib/preinit/05_set_preinit_iface_realtek b/target/linux/realtek/base-files/lib/preinit/05_set_preinit_iface_realtek
-deleted file mode 100644
-index e2a7cf5a69..0000000000
---- a/target/linux/realtek/base-files/lib/preinit/05_set_preinit_iface_realtek
-+++ /dev/null
-@@ -1,13 +0,0 @@
--set_preinit_iface() {
--
--	# Create a switch on lan1 to configure the VLAN 1.
--	# Without configuring VLAN ID 1 RTL8380 - RTL9300 will not
--	# forward packets.
--	ip link add name switch type bridge vlan_filtering 1
--	ip link set dev lan1 master switch
--	ip link set lan1 up
--
--	pi_ifname=switch
--}
--
--boot_hook_add preinit_main set_preinit_iface
-diff --git a/target/linux/realtek/base-files/lib/preinit/98_remove_preinit_realtek b/target/linux/realtek/base-files/lib/preinit/98_remove_preinit_realtek
-deleted file mode 100644
-index dc5fdb059b..0000000000
---- a/target/linux/realtek/base-files/lib/preinit/98_remove_preinit_realtek
-+++ /dev/null
-@@ -1,6 +0,0 @@
--remove_switch() {
--	# delete switch created in 05_set_preinit_iface_realtek again
--	ip link del name switch
--}
--
--boot_hook_add preinit_main remove_switch
-diff --git a/target/linux/realtek/config-5.4 b/target/linux/realtek/config-5.4
-index 51025d5d89..cba448acb6 100644
---- a/target/linux/realtek/config-5.4
-+++ b/target/linux/realtek/config-5.4
-@@ -2,17 +2,18 @@ CONFIG_ARCH_32BIT_OFF_T=y
- CONFIG_ARCH_CLOCKSOURCE_DATA=y
- CONFIG_ARCH_HIBERNATION_POSSIBLE=y
- CONFIG_ARCH_MMAP_RND_BITS_MAX=15
-+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
- CONFIG_ARCH_SUSPEND_POSSIBLE=y
- CONFIG_BLK_DEV_RAM=y
- CONFIG_BLK_DEV_RAM_COUNT=16
- CONFIG_BLK_DEV_RAM_SIZE=4096
- CONFIG_CEVT_R4K=y
--CONFIG_CLONE_BACKWARDS=y
--CONFIG_COMPAT_32BIT_TIME=y
--CONFIG_HAVE_CLK=y
- CONFIG_CLKDEV_LOOKUP=y
-+CONFIG_CLKSRC_MMIO=y
-+CONFIG_CLONE_BACKWARDS=y
- CONFIG_COMMON_CLK=y
- CONFIG_COMMON_CLK_BOSTON=y
-+CONFIG_COMPAT_32BIT_TIME=y
- CONFIG_CONSOLE_LOGLEVEL_DEFAULT=15
- CONFIG_CPU_BIG_ENDIAN=y
- CONFIG_CPU_GENERIC_DUMP_TLB=y
-@@ -40,14 +41,11 @@ CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y
- CONFIG_DTC=y
- CONFIG_EARLY_PRINTK=y
- CONFIG_EARLY_PRINTK_8250=y
--CONFIG_EFI_EARLYCON=y
- CONFIG_ETHERNET_PACKET_MANGLE=y
- CONFIG_EXTRA_FIRMWARE="rtl838x_phy/rtl838x_8214fc.fw rtl838x_phy/rtl838x_8218b.fw rtl838x_phy/rtl838x_8380.fw"
- CONFIG_EXTRA_FIRMWARE_DIR="firmware"
- CONFIG_FIXED_PHY=y
--CONFIG_FONT_8x16=y
--CONFIG_FONT_AUTOSELECT=y
--CONFIG_FONT_SUPPORT=y
-+CONFIG_FORCE_MAX_ZONEORDER=13
- CONFIG_FW_LOADER_PAGED_BUF=y
- CONFIG_GENERIC_ATOMIC64=y
- CONFIG_GENERIC_CLOCKEVENTS=y
-@@ -74,7 +72,9 @@ CONFIG_GENERIC_TIME_VSYSCALL=y
- CONFIG_GPIOLIB=y
- CONFIG_GPIO_RTL8231=y
- CONFIG_GPIO_RTL838X=y
--CONFIG_REALTEK_SOC_PHY=y
-+CONFIG_GPIO_REALTEK_OTTO=y
-+CONFIG_GPIO_WATCHDOG=y
-+# CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set
- CONFIG_GRO_CELLS=y
- CONFIG_HANDLE_DOMAIN_IRQ=y
- CONFIG_HARDWARE_WATCHPOINTS=y
-@@ -89,6 +89,7 @@ CONFIG_HZ_PERIODIC=y
- CONFIG_I2C=y
- CONFIG_I2C_ALGOBIT=y
- CONFIG_I2C_BOARDINFO=y
-+CONFIG_I2C_CHARDEV=y
- CONFIG_I2C_GPIO=y
- CONFIG_INITRAMFS_SOURCE=""
- CONFIG_IRQCHIP=y
-@@ -107,6 +108,8 @@ CONFIG_MDIO_BUS=y
- CONFIG_MDIO_DEVICE=y
- CONFIG_MDIO_I2C=y
- CONFIG_MEMFD_CREATE=y
-+CONFIG_MFD_CORE=y
-+CONFIG_MFD_REALTEK_EIO=y
- CONFIG_MFD_SYSCON=y
- CONFIG_MIGRATION=y
- CONFIG_MIPS=y
-@@ -138,7 +141,7 @@ CONFIG_NEED_PER_CPU_KM=y
- CONFIG_NET_DEVLINK=y
- CONFIG_NET_DSA=y
- CONFIG_NET_DSA_RTL83XX=y
--CONFIG_NET_DSA_TAG_TRAILER=y
-+CONFIG_NET_DSA_TAG_RTL83XX=y
- CONFIG_NET_RTL838X=y
- CONFIG_NET_SWITCHDEV=y
- CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
-@@ -161,12 +164,17 @@ CONFIG_PINCTRL=y
- CONFIG_POWER_RESET=y
- CONFIG_POWER_RESET_SYSCON=y
- CONFIG_PSB6970_PHY=y
-+CONFIG_RATIONAL=y
- CONFIG_REALTEK_PHY=y
-+CONFIG_REALTEK_SOC_PHY=y
- CONFIG_REGMAP=y
-+CONFIG_REGMAP_I2C=y
- CONFIG_REGMAP_MMIO=y
- CONFIG_RESET_CONTROLLER=y
- CONFIG_RTL838X=y
- CONFIG_RTL9300_TIMER=y
-+CONFIG_SENSORS_GPIO_FAN=y
-+CONFIG_SENSORS_LM75=y
- CONFIG_SERIAL_MCTRL_GPIO=y
- CONFIG_SERIAL_OF_PLATFORM=y
- CONFIG_SFP=y
-@@ -175,7 +183,7 @@ CONFIG_SPI_MASTER=y
- CONFIG_SPI_MEM=y
- CONFIG_SPI_RTL838X=y
- CONFIG_SRCU=y
--CONFIG_SWAP_IO_SPACE=y
-+CONFIG_SWCONFIG=y
- CONFIG_SWPHY=y
- CONFIG_SYSCTL_EXCEPTION_TRACE=y
- CONFIG_SYS_HAS_CPU_MIPS32_R1=y
-@@ -187,8 +195,11 @@ CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
- CONFIG_SYS_SUPPORTS_MIPS16=y
- CONFIG_TARGET_ISA_REV=2
- CONFIG_TICK_CPU_ACCOUNTING=y
-+CONFIG_TIMER_OF=y
-+CONFIG_TIMER_PROBE=y
- CONFIG_TINY_SRCU=y
- CONFIG_USE_GENERIC_EARLY_PRINTK_8250=y
- CONFIG_USE_OF=y
-+CONFIG_WATCHDOG_CORE=y
- CONFIG_ZLIB_DEFLATE=y
- CONFIG_ZLIB_INFLATE=y
-diff --git a/target/linux/realtek/dts/rtl8380_netgear_gigabit.dtsi b/target/linux/realtek/dts/rtl8380_netgear_gigabit.dtsi
-index 0d34ca5dc2..2cda3c15a3 100644
---- a/target/linux/realtek/dts/rtl8380_netgear_gigabit.dtsi
-+++ b/target/linux/realtek/dts/rtl8380_netgear_gigabit.dtsi
-@@ -47,30 +47,31 @@
- 			#size-cells = <1>;
- 
- 			partition@0 {
--				label = "u-boot";
-+				label = "loader";
- 				reg = <0x0000000 0x00e0000>;
- 				read-only;
- 			};
- 
- 			partition@e0000 {
--				label = "u-boot-env";
-+				label = "bdinfo";
- 				reg = <0x00e0000 0x0010000>;
- 				read-only;
- 			};
- 
- 			partition@f0000 {
--				label = "u-boot-env2";
-+				label = "sysinfo";
- 				reg = <0x00f0000 0x0010000>;
-+				read-only;
- 			};
- 
- 			partition@100000 {
--				label = "jffs";
-+				label = "jffs2_cfg";
- 				reg = <0x0100000 0x0100000>;
- 				read-only;
- 			};
- 
- 			partition@200000 {
--				label = "jffs2";
-+				label = "jffs2_log";
- 				reg = <0x0200000 0x0100000>;
- 				read-only;
- 			};
-diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts
-index c16028788e..a590450055 100644
---- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts
-+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts
-@@ -17,7 +17,7 @@
- 	};
- 
- 	sfp0: sfp-p9 {
--		compatible = "sff,sfp";
-+		compatible = "_sff,sfp";
- 		i2c-bus = <&i2c0>;
- 		los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
- 		tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
-@@ -36,7 +36,7 @@
- 	};
- 
- 	sfp1: sfp-p10 {
--		compatible = "sff,sfp";
-+		compatible = "_sff,sfp";
- 		i2c-bus = <&i2c1>;
- 		los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
- 		tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
-diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8.dts
-deleted file mode 100644
-index e9c5efe603..0000000000
---- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8.dts
-+++ /dev/null
-@@ -1,12 +0,0 @@
--// SPDX-License-Identifier: GPL-2.0-or-later
--
--#include "rtl8380_zyxel_gs1900.dtsi"
--
--/ {
--	compatible = "zyxel,gs1900-8", "realtek,rtl838x-soc";
--	model = "ZyXEL GS1900-8 Switch";
--};
--
--&gpio1 {
--	/delete-node/ poe_enable;
--};
-diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
-index d61ac3b2b8..c4441ec30e 100644
---- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
-+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
-@@ -79,6 +79,7 @@
- 			partition@50000 {
- 				label = "u-boot-env2";
- 				reg = <0x50000 0x10000>;
-+				read-only;
- 			};
- 			partition@60000 {
- 				label = "jffs";
-diff --git a/target/linux/realtek/dts/rtl8382_allnet_all-sg8208m.dts b/target/linux/realtek/dts/rtl8382_allnet_all-sg8208m.dts
-index fdcc01fdac..681d699e8a 100644
---- a/target/linux/realtek/dts/rtl8382_allnet_all-sg8208m.dts
-+++ b/target/linux/realtek/dts/rtl8382_allnet_all-sg8208m.dts
-@@ -79,6 +79,7 @@
- 			partition@90000 {
- 				label = "u-boot-env2";
- 				reg = <0x90000 0x10000>;
-+				read-only;
- 			};
- 
- 			partition@a0000 {
-diff --git a/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p.dts b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p.dts
-index e2f5e7a4c0..a2ebdad11b 100644
---- a/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p.dts
-+++ b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p.dts
-@@ -77,6 +77,7 @@
- 			partition@c0000 {
- 				label = "u-boot-env2";
- 				reg = <0x000c0000 0x40000>;
-+				read-only;
- 			};
- 			partition@280000 {
- 				label = "firmware";
-diff --git a/target/linux/realtek/dts/rtl8382_d-link_dgs-1210.dtsi b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210.dtsi
-index a14738c8a9..e41c6f9f22 100644
---- a/target/linux/realtek/dts/rtl8382_d-link_dgs-1210.dtsi
-+++ b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210.dtsi
-@@ -61,6 +61,7 @@
- 			partition@c0000 {
- 				label = "u-boot-env2";
- 				reg = <0x000c0000 0x40000>;
-+				read-only;
- 			};
- 			partition@280000 {
- 				label = "firmware";
-diff --git a/target/linux/realtek/dts/rtl8392_edgecore_ecs4100-12ph.dts b/target/linux/realtek/dts/rtl8392_edgecore_ecs4100-12ph.dts
-new file mode 100644
-index 0000000000..7de5c5f053
---- /dev/null
-+++ b/target/linux/realtek/dts/rtl8392_edgecore_ecs4100-12ph.dts
-@@ -0,0 +1,301 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later
-+
-+#include "rtl839x.dtsi"
-+
-+#include <dt-bindings/input/input.h>
-+#include <dt-bindings/gpio/gpio.h>
-+
-+/ {
-+	compatible = "edgecore,ecs4100-12ph", "realtek,rtl838x-soc";
-+	model = "Edgecore ECS4100-12PH Switch";
-+
-+	aliases {
-+		led-boot = &led_sys;
-+		led-failsafe = &led_sys;
-+		led-running = &led_sys;
-+		led-upgrade = &led_sys;
-+	};
-+
-+	chosen {
-+		bootargs = "console=ttyS0,115200";
-+	};
-+
-+	memory@0 {
-+		device_type = "memory";
-+		reg = <0x0 0x10000000>;
-+	};
-+
-+	/* i2c of the left SFP cage: port 9 */
-+	i2c0: i2c-gpio-0 {
-+		compatible = "i2c-gpio";
-+		sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-+		scl-gpios = <&gpio1 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-+		i2c-gpio,delay-us = <2>;
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+	};
-+
-+	sfp0: sfp-p9 {
-+		compatible = "sff,sfp";
-+		i2c-bus = <&i2c0>;
-+		los-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
-+		mod-def0-gpio = <&gpio1 8 GPIO_ACTIVE_LOW>;
-+	};
-+
-+	i2c1: i2c-gpio-1 {
-+		compatible = "i2c-gpio";
-+		sda-gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-+		scl-gpios = <&gpio1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-+		i2c-gpio,delay-us = <2>;
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+	};
-+
-+	sfp1: sfp-p10 {
-+		compatible = "sff,sfp";
-+		i2c-bus = <&i2c1>;
-+		los-gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
-+		mod-def0-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
-+	};
-+
-+	i2c2: i2c-gpio-2 {
-+		compatible = "i2c-gpio";
-+		sda-gpios = <&gpio1 22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-+		scl-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-+		i2c-gpio,delay-us = <2>;
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+	};
-+
-+	sfp2: sfp-p11 {
-+		compatible = "sff,sfp";
-+		i2c-bus = <&i2c2>;
-+		los-gpio = <&gpio0 21 GPIO_ACTIVE_HIGH>;
-+		mod-def0-gpio = <&gpio1 24 GPIO_ACTIVE_LOW>;
-+	};
-+
-+	i2c3: i2c-gpio-3 {
-+		compatible = "i2c-gpio";
-+		sda-gpios = <&gpio1 11 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-+		scl-gpios = <&gpio1 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-+		i2c-gpio,delay-us = <2>;
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+	};
-+
-+	sfp3: sfp-p12 {
-+		compatible = "sff,sfp";
-+		i2c-bus = <&i2c3>;
-+		los-gpio = <&gpio0 22 GPIO_ACTIVE_HIGH>;
-+		mod-def0-gpio = <&gpio1 13 GPIO_ACTIVE_LOW>;
-+	};
-+
-+	i2c4: i2c-gpio-4 {
-+		compatible = "i2c-gpio";
-+		sda-gpios = <&gpio1 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-+		scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-+		i2c-gpio,delay-us = <2>;
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		adt7470@2f {
-+			compatible = "adi,adt7470";
-+			reg = <0x2f>;
-+		};
-+
-+		lm75b@48 {
-+			compatible = "nxp,lm75a";
-+			reg = <0x48>;
-+		};
-+
-+		eeprom@506 {
-+			compatible = "atmel,24c32";
-+			reg = <0x56>;
-+		};
-+	};
-+
-+	watchdog {
-+                compatible = "linux,wdt-gpio";
-+                gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
-+                hw_algo = "toggle";
-+                hw_margin_ms = <1200>;
-+        };
-+
-+	reboot@0 {
-+		compatible = "edgecore,reboot";
-+		gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
-+	};
-+
-+	 fan0: gpio-fan {
-+                #cooling-cells = <2>;
-+                compatible = "gpio-fan";
-+                gpio-fan,speed-map = <0 0 3000 1>;
-+                gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
-+                status = "okay";
-+        };
-+};
-+
-+&gpio1 {
-+	status = "okay";
-+};
-+
-+&gpio0 {
-+	poe_enable {
-+		gpio-hog;
-+		gpios = <16 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+	};
-+
-+	poe_reset {
-+		gpio-hog;
-+		gpios = <18 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+	};
-+};
-+
-+&spi0 {
-+	status = "okay";
-+
-+	flash@0 {
-+		compatible = "jedec,spi-nor";
-+		reg = <0>;
-+		spi-max-frequency = <10000000>;
-+
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			partition@0 {
-+				label = "u-boot";
-+				reg = <0x0 0x40000>;
-+				read-only;
-+			};
-+			partition@100000 {
-+				label = "u-boot-env";
-+				reg = <0x100000 0x100000>;
-+				read-only;
-+			};
-+			partition@200000 {
-+				label = "firmware";
-+				reg = <0x200000 0xdf0000>;
-+				compatible = "openwrt,uimage", "denx,uimage";
-+			};
-+			partition@ff0000 {
-+				label = "certificates";
-+				reg = <0xff0000 0x10000>;
-+			};
-+		};
-+	};
-+};
-+
-+&ethernet0 {
-+	mdio: mdio-bus {
-+		compatible = "realtek,rtl838x-mdio";
-+		regmap = <&ethernet0>;
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		INTERNAL_PHY(0)
-+		INTERNAL_PHY(1)
-+		INTERNAL_PHY(2)
-+		INTERNAL_PHY(3)
-+		INTERNAL_PHY(4)
-+		INTERNAL_PHY(5)
-+		INTERNAL_PHY(6)
-+		INTERNAL_PHY(7)
-+
-+		phy48: ethernet-phy@48 {
-+			reg = <48>;
-+			compatible = "ethernet-phy-ieee802.3-c22";
-+			sfp = <&sfp0>;
-+		};
-+
-+		phy49: ethernet-phy@49 {
-+			reg = <49>;
-+			compatible = "ethernet-phy-ieee802.3-c22";
-+			sfp = <&sfp1>;
-+		};
-+
-+		phy50: ethernet-phy@50 {
-+			reg = <50>;
-+			compatible = "ethernet-phy-ieee802.3-c22";
-+			sfp = <&sfp2>;
-+		};
-+
-+		phy51: ethernet-phy@51 {
-+			reg = <51>;
-+			compatible = "ethernet-phy-ieee802.3-c22";
-+			sfp = <&sfp3>;
-+		};
-+	};
-+};
-+
-+&switch0 {
-+	ext_io: ext-io@e4 {
-+		compatible = "realtek,rtl8390-eio", "syscon";
-+		reg = <0xe4 0x17c>;
-+
-+		led_sys: sys-led {
-+			active-low;
-+			label = "green:status";
-+			linux,default-trigger = "default-on";
-+		};
-+	};
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		SWITCH_PORT(0, 1, qsgmii)
-+		SWITCH_PORT(1, 2, qsgmii)
-+		SWITCH_PORT(2, 3, qsgmii)
-+		SWITCH_PORT(3, 4, qsgmii)
-+		SWITCH_PORT(4, 5, qsgmii)
-+		SWITCH_PORT(5, 6, qsgmii)
-+		SWITCH_PORT(6, 7, qsgmii)
-+		SWITCH_PORT(7, 8, qsgmii)
-+
-+		port@48 {
-+			reg = <48>;
-+			label = "lan9";
-+			phy-mode = "sgmii";
-+			phy-handle = <&phy48>;
-+			managed = "in-band-status";
-+		};
-+
-+		port@49 {
-+			reg = <49>;
-+			label = "lan10";
-+			phy-mode = "sgmii";
-+			phy-handle = <&phy49>;
-+			managed = "in-band-status";
-+		};
-+
-+		port@50 {
-+			reg = <50>;
-+			label = "lan11";
-+			phy-mode = "sgmii";
-+			phy-handle = <&phy50>;
-+			managed = "in-band-status";
-+		};
-+
-+		port@51 {
-+			reg = <51>;
-+			label = "lan12";
-+			phy-mode = "sgmii";
-+			phy-handle = <&phy51>;
-+			managed = "in-band-status";
-+		};
-+
-+		port@52 {
-+			ethernet = <&ethernet0>;
-+			reg = <52>;
-+			phy-mode = "qsgmii";
-+
-+			fixed-link {
-+				speed = <1000>;
-+				full-duplex;
-+			};
-+		};
-+	};
-+};
-diff --git a/target/linux/realtek/dts/rtl839x.dtsi b/target/linux/realtek/dts/rtl839x.dtsi
-new file mode 100644
-index 0000000000..9816b2a09b
---- /dev/null
-+++ b/target/linux/realtek/dts/rtl839x.dtsi
-@@ -0,0 +1,197 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+
-+/dts-v1/;
-+
-+#define STRINGIZE(s) #s
-+#define LAN_LABEL(p, s) STRINGIZE(p ## s)
-+#define SWITCH_PORT_LABEL(n) LAN_LABEL(lan, n)
-+
-+#define INTERNAL_PHY(n) \
-+	phy##n: ethernet-phy@##n { \
-+		reg = <##n>; \
-+		compatible = "ethernet-phy-ieee802.3-c22"; \
-+		phy-is-integrated; \
-+	};
-+
-+#define EXTERNAL_PHY(n) \
-+	phy##n: ethernet-phy@##n { \
-+		reg = <##n>; \
-+		compatible = "ethernet-phy-ieee802.3-c22"; \
-+	};
-+
-+#define EXTERNAL_SFP_PHY(n) \
-+	phy##n: ethernet-phy@##n { \
-+		compatible = "ethernet-phy-ieee802.3-c22"; \
-+		sfp; \
-+		media = "fibre"; \
-+		reg = <##n>; \
-+	};
-+
-+#define SWITCH_PORT(n, s, m) \
-+	port@##n { \
-+		reg = <##n>; \
-+		label = SWITCH_PORT_LABEL(s) ; \
-+		phy-handle = <&phy##n>; \
-+		phy-mode = #m ; \
-+	};
-+
-+#define SWITCH_SFP_PORT(n, s, m) \
-+	port@##n { \
-+		reg = <##n>; \
-+		label = SWITCH_PORT_LABEL(s) ; \
-+		phy-handle = <&phy##n>; \
-+		phy-mode = #m ; \
-+		fixed-link { \
-+			speed = <1000>; \
-+			full-duplex; \
-+		}; \
-+	};
-+
-+/ {
-+	#address-cells = <1>;
-+	#size-cells = <1>;
-+
-+	compatible = "realtek,rtl838x-soc";
-+
-+	cpus {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		frequency = <700000000>;
-+
-+		cpu@0 {
-+			compatible = "mips,mips34Kc";
-+			reg = <0>;
-+		};
-+	};
-+
-+	memory@0 {
-+		device_type = "memory";
-+		reg = <0x0 0x8000000>;
-+	};
-+	
-+	chosen {
-+		bootargs = "console=ttyS0,38400";
-+	};
-+
-+
-+	cpuintc: cpuintc {
-+		#address-cells = <0>;
-+		#interrupt-cells = <1>;
-+		interrupt-controller;
-+		compatible = "mti,cpu-interrupt-controller";
-+	};
-+
-+	intc: rtlintc {
-+		#address-cells = <0>;
-+		#interrupt-cells = <1>;
-+		interrupt-controller;
-+		compatible = "realtek,rt8380-intc";
-+		reg = <0xb8003000 0x20>;
-+	};
-+
-+	spi0: spi@b8001200 {
-+		status = "okay";
-+
-+		compatible = "realtek,rtl838x-nor";
-+		reg = <0xb8001200 0x100>;
-+
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+	};
-+
-+	uart0: uart@b8002000 {
-+		status = "okay";
-+
-+		compatible = "ns16550a";
-+		reg = <0xb8002000 0x100>;
-+
-+		clock-frequency = <200000000>;
-+
-+		interrupt-parent = <&intc>;
-+		interrupts = <31>;
-+
-+		reg-io-width = <1>;
-+		reg-shift = <2>;
-+		fifo-size = <1>;
-+		no-loopback-test;
-+	};
-+
-+	uart1: uart@b8002100 {
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&enable_uart1>;
-+
-+		status = "okay";
-+
-+		compatible = "ns16550a";
-+		reg = <0xb8002100 0x100>;
-+
-+		clock-frequency = <200000000>;
-+
-+		interrupt-parent = <&intc>;
-+		interrupts = <30>;
-+
-+		reg-io-width = <1>;
-+		reg-shift = <2>;
-+		fifo-size = <1>;
-+		no-loopback-test;
-+	};
-+
-+	gpio0: gpio-controller@b8003500 {
-+		compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
-+		reg = <0xb8003500 0x20>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		ngpios = <24>;
-+	};
-+
-+	gpio1: rtl8231-gpio {
-+		status = "disabled";
-+		compatible = "realtek,rtl8231-gpio";
-+		#gpio-cells = <2>;
-+		indirect-access-bus-id = <3>;
-+		gpio-controller;
-+	};
-+
-+	pinmux: pinmux@bb001000 {
-+		compatible = "pinctrl-single";
-+		reg = <0xbb000004 0x4>;
-+
-+		pinctrl-single,bit-per-mux;
-+		pinctrl-single,register-width = <32>;
-+		pinctrl-single,function-mask = <0x1>;
-+		#pinctrl-cells = <2>;
-+
-+		enable_uart1: pinmux_enable_uart1 {
-+			pinctrl-single,bits = <0x0 0x01 0x03>;
-+		};
-+	};
-+
-+	ethernet0: ethernet@bb00a300 {
-+		status = "okay";
-+
-+		compatible = "realtek,rtl838x-eth";
-+		reg = <0xbb00a300 0x100>;
-+		interrupt-parent = <&intc>;
-+		interrupts = <24>;
-+		#interrupt-cells = <1>;
-+		phy-mode = "internal";
-+
-+		fixed-link {
-+			speed = <1000>;
-+			full-duplex;
-+		};
-+	};
-+
-+	switch0: switch@bb000000 {
-+		status = "okay";
-+
-+		interrupt-parent = <&intc>;
-+		interrupts = <20>;
-+
-+		compatible = "realtek,rtl83xx-switch", "simple-bus";
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		ranges = <0x0 0xbb000000 0x10000>;
-+
-+	};
-+};
-diff --git a/target/linux/realtek/files-5.4/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h b/target/linux/realtek/files-5.4/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h
-index fc401e5481..fa45401182 100644
---- a/target/linux/realtek/files-5.4/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h
-+++ b/target/linux/realtek/files-5.4/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h
-@@ -214,6 +214,13 @@
- #define RTL838X_GPIO_PAB_IMR		(GPIO_CTRL_REG_BASE + 0x14)
- #define RTL838X_GPIO_PC_IMR		(GPIO_CTRL_REG_BASE + 0x18)
- 
-+#define RTL930X_GPIO_CTRL_REG_BASE	((volatile void *) 0xb8003300)
-+#define RTL930X_GPIO_PABCD_DIR		(RTL930X_GPIO_CTRL_REG_BASE + 0x8)
-+#define RTL930X_GPIO_PABCD_DAT		(RTL930X_GPIO_CTRL_REG_BASE + 0xc)
-+#define RTL930X_GPIO_PABCD_ISR		(RTL930X_GPIO_CTRL_REG_BASE + 0x10)
-+#define RTL930X_GPIO_PAB_IMR		(RTL930X_GPIO_CTRL_REG_BASE + 0x14)
-+#define RTL930X_GPIO_PCD_IMR		(RTL930X_GPIO_CTRL_REG_BASE + 0x18)
-+
- #define RTL838X_MODEL_NAME_INFO		(0x00D4)
- #define RTL839X_MODEL_NAME_INFO		(0x0FF0)
- #define RTL93XX_MODEL_NAME_INFO		(0x0004)
-@@ -313,8 +320,29 @@
- #define RTL839X_SMI_PORT_POLLING_CTRL	(0x03fc)
- #define RTL839X_PHYREG_ACCESS_CTRL	(0x03DC)
- #define RTL839X_PHYREG_CTRL		(0x03E0)
--#define RTL839X_PHYREG_PORT_CTRL(p)	(0x03E4 + ((p >> 5) << 2))
-+#define RTL839X_PHYREG_PORT_CTRL	(0x03E4)
- #define RTL839X_PHYREG_DATA_CTRL	(0x03F0)
-+#define RTL839X_PHYREG_MMD_CTRL		(0x3F4)
-+
-+#define RTL930X_SMI_GLB_CTRL		(0xCA00)
-+#define RTL930X_SMI_POLL_CTRL		(0xca90)
-+#define RTL930X_SMI_PORT0_15_POLLING_SEL (0xCA08)
-+#define RTL930X_SMI_PORT16_27_POLLING_SEL (0xCA0C)
-+#define RTL930X_SMI_PORT0_5_ADDR	(0xCB80)
-+#define RTL930X_SMI_ACCESS_PHY_CTRL_0	(0xCB70)
-+#define RTL930X_SMI_ACCESS_PHY_CTRL_1	(0xCB74)
-+#define RTL930X_SMI_ACCESS_PHY_CTRL_2	(0xCB78)
-+#define RTL930X_SMI_ACCESS_PHY_CTRL_3	(0xCB7C)
-+
-+#define RTL931X_SMI_GLB_CTRL1		(0x0CBC)
-+#define RTL931X_SMI_GLB_CTRL0		(0x0CC0)
-+#define RTL931X_SMI_PORT_POLLING_CTRL	(0x0CCC)
-+#define RTL931X_SMI_INDRT_ACCESS_CTRL_0	(0x0C00)
-+#define RTL931X_SMI_INDRT_ACCESS_CTRL_1	(0x0C04)
-+#define RTL931X_SMI_INDRT_ACCESS_CTRL_2	(0x0C08)
-+#define RTL931X_SMI_INDRT_ACCESS_CTRL_3	(0x0C10)
-+#define RTL931X_SMI_INDRT_ACCESS_BC_PHYID_CTRL (0x0C14)
-+#define RTL931X_SMI_INDRT_ACCESS_MMD_CTRL (0xC18)
- 
- #define RTL930X_SMI_GLB_CTRL		(0xCA00)
- #define RTL930X_SMI_POLL_CTRL		(0xca90)
-diff --git a/target/linux/realtek/files-5.4/drivers/gpio/gpio-rtl838x.c b/target/linux/realtek/files-5.4/drivers/gpio/gpio-rtl838x.c
-index 8207e4bb73..2009ebcce9 100644
---- a/target/linux/realtek/files-5.4/drivers/gpio/gpio-rtl838x.c
-+++ b/target/linux/realtek/files-5.4/drivers/gpio/gpio-rtl838x.c
-@@ -126,6 +126,16 @@ void rtl838x_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
- 	__asm__ volatile ("sync");
- }
- 
-+void rtl930x_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
-+{
-+	pr_debug("rtl838x_set: %d, value: %d\n", offset, value);
-+	/* Internal GPIO of the RTL9300 */
-+	if (value)
-+		rtl83xx_w32_mask(0, BIT(offset), RTL930X_GPIO_PABCD_DAT);
-+	else
-+		rtl83xx_w32_mask(BIT(offset), 0, RTL930X_GPIO_PABCD_DAT);
-+}
-+
- static int rtl838x_direction_input(struct gpio_chip *gc, unsigned int offset)
- {
- 	pr_debug("%s: %d\n", __func__, offset);
-@@ -139,12 +149,30 @@ static int rtl838x_direction_input(struct gpio_chip *gc, unsigned int offset)
- 	return -ENOTSUPP;
- }
- 
-+static int rtl930x_direction_input(struct gpio_chip *gc, unsigned int offset)
-+{
-+	pr_debug("%s: %d\n", __func__, offset);
-+
-+	rtl83xx_w32_mask(BIT(offset), 0, RTL930X_GPIO_PABCD_DIR);
-+	return 0;
-+}
-+
- static int rtl838x_direction_output(struct gpio_chip *gc, unsigned int offset, int value)
- {
- 	pr_debug("%s: %d\n", __func__, offset);
- 	if (offset < 32)
- 		rtl83xx_w32_mask(0, BIT(offset), RTL838X_GPIO_PABC_DIR);
--	rtl838x_gpio_set(gc, offset, value);
-+	rtl930x_gpio_set(gc, offset, value);
-+
-+	/* LED for PWR and SYS driver is direction output by default */
-+	return 0;
-+}
-+
-+static int rtl930x_direction_output(struct gpio_chip *gc, unsigned int offset, int value)
-+{
-+	pr_debug("%s: %d\n", __func__, offset);
-+	rtl83xx_w32_mask(0, BIT(offset), RTL930X_GPIO_PABCD_DIR);
-+	rtl930x_gpio_set(gc, offset, value);
- 
- 	/* LED for PWR and SYS driver is direction output by default */
- 	return 0;
-@@ -169,6 +197,16 @@ static int rtl838x_get_direction(struct gpio_chip *gc, unsigned int offset)
- 	return 0;
- }
- 
-+static int rtl930x_get_direction(struct gpio_chip *gc, unsigned int offset)
-+{
-+	u32 v = 0;
-+
-+	v = rtl83xx_r32(RTL930X_GPIO_PABCD_DIR);
-+	if (v & BIT(offset))
-+		return 0;
-+	return 1;
-+}
-+
- static int rtl838x_gpio_get(struct gpio_chip *gc, unsigned int offset)
- {
- 	u32 v;
-@@ -192,24 +230,14 @@ static int rtl838x_gpio_get(struct gpio_chip *gc, unsigned int offset)
- 		return 0;
- 	}
- 
--/* BUG:
--	bit = (offset - 64) % 32;
--	if (offset >= 64 && offset < 96) {
--		if (sw_r32(RTL838X_LED1_SW_P_EN_CTRL) & BIT(bit))
--			return 1;
--		return 0;
--	}
--	if (offset >= 96 && offset < 128) {
--		if (sw_r32(RTL838X_LED1_SW_P_EN_CTRL) & BIT(bit))
--			return 1;
--		return 0;
--	}
--	if (offset >= 128 && offset < 160) {
--		if (sw_r32(RTL838X_LED1_SW_P_EN_CTRL) & BIT(bit))
--			return 1;
--		return 0;
--	}
--	*/ 
-+	return 0;
-+}
-+
-+static int rtl930x_gpio_get(struct gpio_chip *gc, unsigned int offset)
-+{
-+	u32 v = rtl83xx_r32(RTL930X_GPIO_PABCD_DAT);
-+	if (v & BIT(offset))
-+		return 1;
- 	return 0;
- }
- 
-@@ -319,7 +347,7 @@ static int rtl838x_gpio_probe(struct platform_device *pdev)
- 	struct rtl838x_gpios *gpios;
- 	int err;
- 
--	pr_info("Probing RTL838X GPIOs\n");
-+	pr_info("Probing RTL838X GPIOs for %08x\n", soc_info.id);
- 
- 	if (!np) {
- 		dev_err(&pdev->dev, "No DT found\n");
-@@ -351,6 +379,9 @@ static int rtl838x_gpio_probe(struct platform_device *pdev)
- 	case 0x8393:
- 		pr_debug("Found RTL8393 GPIO\n");
- 		break;
-+	case 0x9302:
-+		pr_info("Found RTL9302 GPIO\n");
-+		break;
- 	default:
- 		pr_err("Unknown GPIO chip id (%04x)\n", gpios->id);
- 		return -ENODEV;
-@@ -363,6 +394,7 @@ static int rtl838x_gpio_probe(struct platform_device *pdev)
- 		gpios->led_sw_p_en_ctrl = rtl838x_led_sw_p_en_ctrl;
- 		gpios->ext_gpio_dir = rtl838x_ext_gpio_dir;
- 		gpios->ext_gpio_data = rtl838x_ext_gpio_data;
-+		gpios->irq = 31;
- 	}
- 
- 	if (soc_info.family == RTL8390_FAMILY_ID) {
-@@ -372,30 +404,46 @@ static int rtl838x_gpio_probe(struct platform_device *pdev)
- 		gpios->led_sw_p_en_ctrl = rtl839x_led_sw_p_en_ctrl;
- 		gpios->ext_gpio_dir = rtl839x_ext_gpio_dir;
- 		gpios->ext_gpio_data = rtl839x_ext_gpio_data;
-+		gpios->irq = 31;
-+	}
-+
-+	if (soc_info.family == RTL9300_FAMILY_ID) {
-+		gpios->irq = 13;
- 	}
- 
--	gpios->dev = dev;
--	gpios->gc.base = 0;
--	/* 0-31: internal
--	 * 32-63, LED control register
--	 * 64-95: PORT-LED 0
--	 * 96-127: PORT-LED 1
--	 * 128-159: PORT-LED 2
--	 */
--	gpios->gc.ngpio = 160;
- 	gpios->gc.label = "rtl838x";
- 	gpios->gc.parent = dev;
- 	gpios->gc.owner = THIS_MODULE;
- 	gpios->gc.can_sleep = true;
--	gpios->irq = 31;
-+	gpios->dev = dev;
-+	gpios->gc.base = 0;
- 
--	gpios->gc.direction_input = rtl838x_direction_input;
--	gpios->gc.direction_output = rtl838x_direction_output;
--	gpios->gc.set = rtl838x_gpio_set;
--	gpios->gc.get = rtl838x_gpio_get;
--	gpios->gc.get_direction = rtl838x_get_direction;
-+	if (soc_info.family != RTL9300_FAMILY_ID) {
-+		/* 0-31: internal
-+		* 32-63, LED control register
-+		* 64-95: PORT-LED 0
-+		* 96-127: PORT-LED 1
-+		* 128-159: PORT-LED 2
-+		*/
-+		gpios->gc.ngpio = 160;
-+
-+		gpios->gc.direction_input = rtl838x_direction_input;
-+		gpios->gc.direction_output = rtl838x_direction_output;
-+		gpios->gc.set = rtl838x_gpio_set;
-+		gpios->gc.get = rtl838x_gpio_get;
-+		gpios->gc.get_direction = rtl838x_get_direction;
-+	} else {
-+		gpios->gc.ngpio = 32;
-+
-+		gpios->gc.direction_input = rtl930x_direction_input;
-+		gpios->gc.direction_output = rtl930x_direction_output;
-+		gpios->gc.set = rtl930x_gpio_set;
-+		gpios->gc.get = rtl930x_gpio_get;
-+		gpios->gc.get_direction = rtl930x_get_direction;
-+	}
- 
- 	if (of_property_read_bool(np, "take-port-leds")) {
-+	pr_info("A1\n");
- 		if (of_property_read_u32(np, "leds-per-port", &gpios->leds_per_port))
- 			gpios->leds_per_port = 2;
- 		if (of_property_read_u32(np, "led-mode", &gpios->led_mode))
-@@ -408,6 +456,7 @@ static int rtl838x_gpio_probe(struct platform_device *pdev)
- 	}
- 
- 	err = devm_gpiochip_add_data(dev, &gpios->gc, gpios);
-+
- 	return err;
- }
- 
-diff --git a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/Kconfig b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/Kconfig
-index f293832eb5..05d12bace9 100644
---- a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/Kconfig
-+++ b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/Kconfig
-@@ -2,7 +2,7 @@
- config NET_DSA_RTL83XX
- 	tristate "Realtek RTL838x/RTL839x switch support"
- 	depends on RTL838X
--	select NET_DSA_TAG_TRAILER
-+	select NET_DSA_TAG_RTL83XX
- 	---help---
- 	  This driver adds support for Realtek RTL83xx series switching.
- 
-diff --git a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/Makefile b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/Makefile
-index 016184c3d9..8752c79700 100644
---- a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/Makefile
-+++ b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/Makefile
-@@ -1,3 +1,3 @@
- # SPDX-License-Identifier: GPL-2.0
- obj-$(CONFIG_NET_DSA_RTL83XX)	+= common.o dsa.o \
--	rtl838x.o rtl839x.o rtl930x.o rtl931x.o debugfs.o qos.o
-+	rtl838x.o rtl839x.o rtl930x.o rtl931x.o debugfs.o qos.o tc.o
-diff --git a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/common.c b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/common.c
-index 6940afa7f2..f16bdb998e 100644
---- a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/common.c
-+++ b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/common.c
-@@ -2,6 +2,11 @@
- 
- #include <linux/of_mdio.h>
- #include <linux/of_platform.h>
-+#include <net/arp.h>
-+#include <net/nexthop.h>
-+#include <net/neighbour.h>
-+#include <net/netevent.h>
-+#include <linux/inetdevice.h>
- 
- #include <asm/mach-rtl838x/mach-rtl83xx.h>
- #include "rtl83xx.h"
-@@ -18,27 +23,6 @@ extern const struct dsa_switch_ops rtl930x_switch_ops;
- 
- DEFINE_MUTEX(smi_lock);
- 
--// TODO: unused
--static void dump_fdb(struct rtl838x_switch_priv *priv)
--{
--	struct rtl838x_l2_entry e;
--	int i;
--
--	mutex_lock(&priv->reg_mutex);
--
--	for (i = 0; i < priv->fib_entries; i++) {
--		priv->r->read_l2_entry_using_hash(i >> 2, i & 0x3, &e);
--
--		if (!e.valid) /* Check for invalid entry */
--			continue;
--
--		pr_debug("-> port %02d: mac %pM, vid: %d, rvid: %d, MC: %d, %d\n",
--			e.port, &e.mac[0], e.vid, e.rvid, e.is_ip_mc, e.is_ipv6_mc);
--	}
--
--	mutex_unlock(&priv->reg_mutex);
--}
--
- int rtl83xx_port_get_stp_state(struct rtl838x_switch_priv *priv, int port)
- {
- 	u32 msti = 0;
-@@ -144,7 +128,6 @@ void rtl_table_read(struct table_reg *r, int idx)
- 
- 	cmd |= BIT(r->c_bit + 1) | (r->tbl << r->t_bit) | (idx & (BIT(r->t_bit) - 1));
- 	sw_w32(cmd, r->addr);
--	pr_debug("Writing %08x to %x for read\n", cmd, r->addr);
- 	do { } while (sw_r32(r->addr) & BIT(r->c_bit + 1));
- }
- 
-@@ -156,8 +139,6 @@ void rtl_table_write(struct table_reg *r, int idx)
- 	u32 cmd = r->rmode ? 0 : BIT(r->c_bit);
- 
- 	cmd |= BIT(r->c_bit + 1) | (r->tbl << r->t_bit) | (idx & (BIT(r->t_bit) - 1));
--	pr_debug("Writing %08x to %x for write, value %08x\n",
--		cmd, r->addr, sw_r32(0xb344));
- 	sw_w32(cmd, r->addr);
- 	do { } while (sw_r32(r->addr) & BIT(r->c_bit + 1));
- }
-@@ -202,23 +183,27 @@ u64 rtl838x_get_port_reg(int reg)
- /* Port register accessor functions for the RTL839x and RTL931X SoCs */
- void rtl839x_mask_port_reg_be(u64 clear, u64 set, int reg)
- {
--	sw_w32_mask((u32)(clear >> 32), (u32)(set >> 32), reg);
--	sw_w32_mask((u32)(clear & 0xffffffff), (u32)(set & 0xffffffff), reg + 4);
-+	u32 *setmask = (u32*)&set;
-+	u32 *clearmask = (u32*)&clear;
-+	
-+	sw_w32_mask(clearmask[0], setmask[0], reg);
-+	sw_w32_mask(clearmask[1], setmask[1], reg + 4);
- }
- 
- u64 rtl839x_get_port_reg_be(int reg)
- {
--	u64 v = sw_r32(reg);
--
--	v <<= 32;
--	v |= sw_r32(reg + 4);
-+	u64 v;
-+	u32 *get = (u32*)&v;
-+	get[0]=sw_r32(reg);
-+	get[1]=sw_r32(reg + 4);
- 	return v;
- }
- 
- void rtl839x_set_port_reg_be(u64 set, int reg)
- {
--	sw_w32(set >> 32, reg);
--	sw_w32(set & 0xffffffff, reg + 4);
-+	u32 *setmask = (u32*)&set;
-+	sw_w32(setmask[0], reg);
-+	sw_w32(setmask[1], reg + 4);
- }
- 
- void rtl839x_mask_port_reg_le(u64 clear, u64 set, int reg)
-@@ -326,8 +311,6 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
- 		if (of_property_read_u32(dn, "reg", &pn))
- 			continue;
- 
--		priv->ports[pn].dp = dsa_to_port(priv->ds, pn);
--
- 		// Check for the integrated SerDes of the RTL8380M first
- 		if (of_property_read_bool(dn, "phy-is-integrated")
- 			&& priv->id == 0x8380 && pn >= 24) {
-@@ -355,12 +338,10 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
- 		}
- 	}
- 
--	// TODO: Do this needs to come from the .dts, at least the SerDes number
-+	// TODO: Do this needs to come from the .dts
- 	if (priv->family_id == RTL9300_FAMILY_ID) {
- 		priv->ports[24].is2G5 = true;
- 		priv->ports[25].is2G5 = true;
--		priv->ports[24].sds_num = 1;
--		priv->ports[24].sds_num = 2;
- 	}
- 
- 	/* Disable MAC polling the PHY so that we can start configuration */
-@@ -370,27 +351,20 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
- 	if (priv->family_id == RTL8380_FAMILY_ID) {
- 		/* Enable SerDes NWAY and PHY control via SoC */
- 		sw_w32_mask(BIT(7), BIT(15), RTL838X_SMI_GLB_CTRL);
--	} else {
-+	} else if (priv->family_id == RTL8390_FAMILY_ID) {
- 		/* Disable PHY polling via SoC */
- 		sw_w32_mask(BIT(7), 0, RTL839X_SMI_GLB_CTRL);
- 	}
- 
--	/* Power on fibre ports and reset them if necessary */
-+	/* Power on fibre ports and reset them if necessary
-+	 * TODO: Put this in rtl83xx_phylink_mac_config ? see rtl93xx_phylink_mac_config
-+	 */
- 	if (priv->ports[24].phy == PHY_RTL838X_SDS) {
- 		pr_debug("Powering on fibre ports & reset\n");
- 		rtl8380_sds_power(24, 1);
- 		rtl8380_sds_power(26, 1);
- 	}
- 
--	// TODO: Only power on SerDes with external PHYs connected
--	if (priv->family_id == RTL9300_FAMILY_ID) {
--		pr_info("RTL9300 Powering on SerDes ports\n");
--		rtl9300_sds_power(24, 1);
--		rtl9300_sds_power(25, 1);
--		rtl9300_sds_power(26, 1);
--		rtl9300_sds_power(27, 1);
--	}
--
- 	pr_debug("%s done\n", __func__);
- 	return 0;
- }
-@@ -412,11 +386,15 @@ static int __init rtl83xx_get_l2aging(struct rtl838x_switch_priv *priv)
- }
- 
- /* Caller must hold priv->reg_mutex */
--int rtl83xx_lag_add(struct dsa_switch *ds, int group, int port)
-+int rtl83xx_lag_add(struct dsa_switch *ds, int group, int port,struct netdev_lag_upper_info *info)
- {
- 	struct rtl838x_switch_priv *priv = ds->priv;
- 	int i;
--
-+	u32 algomsk = 0;
-+	u32 algoidx = 0;
-+	if (info->tx_type != NETDEV_LAG_TX_TYPE_HASH) {
-+		return -EINVAL;
-+	}
- 	pr_info("%s: Adding port %d to LA-group %d\n", __func__, port, group);
- 	if (group >= priv->n_lags) {
- 		pr_err("Link Agrregation group too large.\n");
-@@ -429,18 +407,40 @@ int rtl83xx_lag_add(struct dsa_switch *ds, int group, int port)
- 	}
- 
- 	for (i = 0; i < priv->n_lags; i++) {
--		if (priv->lags_port_members[i] & BIT_ULL(i))
-+		if (priv->lags_port_members[i] & BIT_ULL(port))
- 			break;
- 	}
- 	if (i != priv->n_lags) {
- 		pr_err("%s: Port already member of LAG: %d\n", __func__, i);
- 		return -ENOSPC;
- 	}
--
-+	switch(info->hash_type) {
-+	case NETDEV_LAG_HASH_L2:
-+		algomsk |= TRUNK_DISTRIBUTION_ALGO_DMAC_BIT; //DMAC
-+		algomsk |= TRUNK_DISTRIBUTION_ALGO_SMAC_BIT; //DMAC
-+	break;
-+	case NETDEV_LAG_HASH_L23:
-+		algomsk |= TRUNK_DISTRIBUTION_ALGO_DMAC_BIT; //DMAC
-+		algomsk |= TRUNK_DISTRIBUTION_ALGO_SMAC_BIT; //DMAC
-+		algomsk |= TRUNK_DISTRIBUTION_ALGO_SIP_BIT; //source ip
-+		algomsk |= TRUNK_DISTRIBUTION_ALGO_DIP_BIT; //dest ip
-+		algoidx = 1;
-+	break;
-+	case NETDEV_LAG_HASH_L34:
-+		algomsk |= TRUNK_DISTRIBUTION_ALGO_SRC_L4PORT_BIT; //sport
-+		algomsk |= TRUNK_DISTRIBUTION_ALGO_DST_L4PORT_BIT; //dport
-+		algomsk |= TRUNK_DISTRIBUTION_ALGO_SIP_BIT; //source ip
-+		algomsk |= TRUNK_DISTRIBUTION_ALGO_DIP_BIT; //dest ip
-+		algoidx = 2;
-+	break;
-+	default:
-+		algomsk |= 0x7f;
-+	}
-+	priv->r->set_distribution_algorithm(group, algoidx, algomsk);
- 	priv->r->mask_port_reg_be(0, BIT_ULL(port), priv->r->trk_mbr_ctr(group));
- 	priv->lags_port_members[group] |= BIT_ULL(port);
- 
--	pr_info("lags_port_members %d now %016llx\n", group, priv->lags_port_members[group]);
-+	pr_debug("lags_port_members %d now %016llx\n", group, priv->lags_port_members[group]);
- 	return 0;
- }
- 
-@@ -450,7 +450,7 @@ int rtl83xx_lag_del(struct dsa_switch *ds, int group, int port)
- 	struct rtl838x_switch_priv *priv = ds->priv;
- 
- 	pr_info("%s: Removing port %d from LA-group %d\n", __func__, port, group);
--
-+	
- 	if (group >= priv->n_lags) {
- 		pr_err("Link Agrregation group too large.\n");
- 		return -EINVAL;
-@@ -463,11 +463,10 @@ int rtl83xx_lag_del(struct dsa_switch *ds, int group, int port)
- 
- 
- 	if (!(priv->lags_port_members[group] & BIT_ULL(port))) {
--		pr_err("%s: Port not member of LAG: %d\n", __func__, group
--		);
-+		pr_err("%s: Port not member of LAG: %d\n", __func__, group);
- 		return -ENOSPC;
- 	}
--
-+	// 0x7f algo mask all
- 	priv->r->mask_port_reg_be(BIT_ULL(port), 0, priv->r->trk_mbr_ctr(group));
- 	priv->lags_port_members[group] &= ~BIT_ULL(port);
- 
-@@ -475,6 +474,163 @@ int rtl83xx_lag_del(struct dsa_switch *ds, int group, int port)
- 	return 0;
- }
- 
-+/*
-+ * Allocate a 64 bit octet counter located in the LOG HW table
-+ */
-+static int rtl83xx_octet_cntr_alloc(struct rtl838x_switch_priv *priv)
-+{
-+	int idx;
-+
-+	mutex_lock(&priv->reg_mutex);
-+
-+	idx = find_first_zero_bit(priv->octet_cntr_use_bm, MAX_COUNTERS);
-+	if (idx >= priv->n_counters) {
-+		mutex_unlock(&priv->reg_mutex);
-+		return -1;
-+	}
-+
-+	set_bit(idx, priv->octet_cntr_use_bm);
-+	mutex_unlock(&priv->reg_mutex);
-+
-+	return idx;
-+}
-+
-+/*
-+ * Allocate a 32-bit packet counter
-+ * 2 32-bit packet counters share the location of a 64-bit octet counter
-+ * Initially there are no free packet counters and 2 new ones need to be freed
-+ * by allocating the corresponding octet counter
-+ */
-+int rtl83xx_packet_cntr_alloc(struct rtl838x_switch_priv *priv)
-+{
-+	int idx, j;
-+
-+	mutex_lock(&priv->reg_mutex);
-+
-+	/* Because initially no packet counters are free, the logic is reversed:
-+	 * a 0-bit means the counter is already allocated (for octets)
-+	 */
-+	idx = find_first_bit(priv->packet_cntr_use_bm, MAX_COUNTERS * 2);
-+	pr_info("%s got bit %d\n", __func__, idx);
-+	if (idx >= priv->n_counters * 2) {
-+		j = find_first_zero_bit(priv->octet_cntr_use_bm, MAX_COUNTERS);
-+		if (j >= priv->n_counters) {
-+			mutex_unlock(&priv->reg_mutex);
-+			return -1;
-+		}
-+		set_bit(j, priv->octet_cntr_use_bm);
-+		idx = j * 2;
-+		set_bit(j * 2 + 1, priv->packet_cntr_use_bm);
-+
-+	} else {
-+		clear_bit(idx, priv->packet_cntr_use_bm);
-+	}
-+
-+	mutex_unlock(&priv->reg_mutex);
-+
-+	return idx;
-+}
-+
-+
-+/*
-+ * Add an L2 nexthop entry for the L3 routing system / PIE forwarding in the SoC
-+ * Use VID and MAC in rtl838x_l2_entry to identify either a free slot in the L2 hash table
-+ * or mark an existing entry as a nexthop by setting it's nexthop bit
-+ * Called from the L3 layer
-+ * The index in the L2 hash table is filled into nh->l2_id;
-+ */
-+int rtl83xx_l2_nexthop_add(struct rtl838x_switch_priv *priv, struct rtl83xx_nexthop *nh)
-+{
-+	struct rtl838x_l2_entry e;
-+	u64 seed = priv->r->l2_hash_seed(nh->mac, nh->rvid);
-+	u32 key = priv->r->l2_hash_key(priv, seed);
-+	int i, idx = -1;
-+	u64 entry;
-+
-+	pr_debug("%s searching for %08llx vid %d with key %d, seed: %016llx\n",
-+		__func__, nh->mac, nh->rvid, key, seed);
-+
-+	e.type = L2_UNICAST;
-+	u64_to_ether_addr(nh->mac, &e.mac[0]);
-+	e.port = nh->port;
-+
-+	// Loop over all entries in the hash-bucket and over the second block on 93xx SoCs
-+	for (i = 0; i < priv->l2_bucket_size; i++) {
-+		entry = priv->r->read_l2_entry_using_hash(key, i, &e);
-+
-+		if (!e.valid || ((entry & 0x0fffffffffffffffULL) == seed)) {
-+			idx = i > 3 ? ((key >> 14) & 0xffff) | i >> 1
-+					: ((key << 2) | i) & 0xffff;
-+			break;
-+		}
-+	}
-+
-+	if (idx < 0) {
-+		pr_err("%s: No more L2 forwarding entries available\n", __func__);
-+		return -1;
-+	}
-+
-+	// Found an existing (e->valid is true) or empty entry, make it a nexthop entry
-+	nh->l2_id = idx;
-+	if (e.valid) {
-+		nh->port = e.port;
-+		nh->vid = e.vid;		// Save VID
-+		nh->rvid = e.rvid;
-+		nh->dev_id = e.stack_dev;
-+		// If the entry is already a valid next hop entry, don't change it
-+		if (e.next_hop)
-+			return 0;
-+	} else {
-+		e.valid = true;
-+		e.is_static = true;
-+		e.rvid = nh->rvid;
-+		e.is_ip_mc = false;
-+		e.is_ipv6_mc = false;
-+		e.block_da = false;
-+		e.block_sa = false;
-+		e.suspended = false;
-+		e.age = 0;			// With port-ignore
-+		e.port = priv->port_ignore;
-+		u64_to_ether_addr(nh->mac, &e.mac[0]);
-+	}
-+	e.next_hop = true;
-+	e.nh_route_id = nh->id;			// NH route ID takes place of VID
-+	e.nh_vlan_target = false;
-+
-+	priv->r->write_l2_entry_using_hash(idx >> 2, idx & 0x3, &e);
-+
-+	return 0;
-+}
-+
-+/*
-+ * Removes a Layer 2 next hop entry in the forwarding database
-+ * If it was static, the entire entry is removed, otherwise the nexthop bit is cleared
-+ * and we wait until the entry ages out
-+ */
-+int rtl83xx_l2_nexthop_rm(struct rtl838x_switch_priv *priv, struct rtl83xx_nexthop *nh)
-+{
-+	struct rtl838x_l2_entry e;
-+	u32 key = nh->l2_id >> 2;
-+	int i = nh->l2_id & 0x3;
-+	u64 entry = entry = priv->r->read_l2_entry_using_hash(key, i, &e);
-+
-+	pr_debug("%s: id %d, key %d, index %d\n", __func__, nh->l2_id, key, i);
-+	if (!e.valid) {
-+		dev_err(priv->dev, "unknown nexthop, id %x\n", nh->l2_id);
-+		return -1;
-+	}
-+
-+	if (e.is_static)
-+		e.valid = false;
-+	e.next_hop = false;
-+	e.vid = nh->vid;		// Restore VID
-+	e.rvid = nh->rvid;
-+
-+	priv->r->write_l2_entry_using_hash(key, i, &e);
-+
-+	return 0;
-+}
-+#if 0
- static int rtl83xx_handle_changeupper(struct rtl838x_switch_priv *priv,
- 				      struct net_device *ndev,
- 				      struct netdev_notifier_changeupper_info *info)
-@@ -524,6 +680,7 @@ out:
- 	mutex_unlock(&priv->reg_mutex);
- 	return 0;
- }
-+#endif
- 
- static int rtl83xx_netdevice_event(struct notifier_block *this,
- 				   unsigned long event, void *ptr)
-@@ -540,7 +697,7 @@ static int rtl83xx_netdevice_event(struct notifier_block *this,
- 	priv = container_of(this, struct rtl838x_switch_priv, nb);
- 	switch (event) {
- 	case NETDEV_CHANGEUPPER:
--		err = rtl83xx_handle_changeupper(priv, ndev, ptr);
-+//		err = rtl83xx_handle_changeupper(priv, ndev, ptr);
- 		break;
- 	}
- 
-@@ -550,6 +707,707 @@ static int rtl83xx_netdevice_event(struct notifier_block *this,
- 	return NOTIFY_DONE;
- }
- 
-+const static struct rhashtable_params route_ht_params = {
-+	.key_len     = sizeof(u32),
-+	.key_offset  = offsetof(struct rtl83xx_route, gw_ip),
-+	.head_offset = offsetof(struct rtl83xx_route, linkage),
-+};
-+
-+/*
-+ * Updates an L3 next hop entry in the ROUTING table
-+ */
-+static int rtl83xx_l3_nexthop_update(struct rtl838x_switch_priv *priv,  __be32 ip_addr, u64 mac)
-+{
-+	struct rtl83xx_route *r;
-+	struct rhlist_head *tmp, *list;
-+
-+	rcu_read_lock();
-+	list = rhltable_lookup(&priv->routes, &ip_addr, route_ht_params);
-+	if (!list) {
-+		rcu_read_unlock();
-+		return -ENOENT;
-+	}
-+
-+	rhl_for_each_entry_rcu(r, tmp, list, linkage) {
-+		pr_info("%s: Setting up fwding: ip %pI4, GW mac %016llx\n",
-+			__func__, &ip_addr, mac);
-+
-+		// Reads the ROUTING table entry associated with the route
-+		priv->r->route_read(r->id, r);
-+		pr_info("Route with id %d to %pI4 / %d\n", r->id, &r->dst_ip, r->prefix_len);
-+
-+		r->nh.mac = r->nh.gw = mac;
-+		r->nh.port = priv->port_ignore;
-+		r->nh.id = r->id;
-+
-+		// Do we need to explicitly add a DMAC entry with the route's nh index?
-+		if (priv->r->set_l3_egress_mac)
-+			priv->r->set_l3_egress_mac(r->id, mac);
-+
-+		// Update ROUTING table: map gateway-mac and switch-mac id to route id
-+		rtl83xx_l2_nexthop_add(priv, &r->nh);
-+
-+		r->attr.valid = true;
-+		r->attr.action = ROUTE_ACT_FORWARD;
-+		r->attr.type = 0;
-+		r->attr.hit = false; // Reset route-used indicator
-+
-+		// Add PIE entry with dst_ip and prefix_len
-+		r->pr.dip = r->dst_ip;
-+		r->pr.dip_m = inet_make_mask(r->prefix_len);
-+
-+		if (r->is_host_route) {
-+			int slot = priv->r->find_l3_slot(r, false);
-+
-+			pr_info("%s: Got slot for route: %d\n", __func__, slot);
-+			priv->r->host_route_write(slot, r);
-+		} else {
-+			priv->r->route_write(r->id, r);
-+			r->pr.fwd_sel = true;
-+			r->pr.fwd_data = r->nh.l2_id;
-+			r->pr.fwd_act = PIE_ACT_ROUTE_UC;
-+		}
-+
-+		if (priv->r->set_l3_nexthop)
-+			priv->r->set_l3_nexthop(r->nh.id, r->nh.l2_id, r->nh.if_id);
-+
-+		if (r->pr.id < 0) {
-+			r->pr.packet_cntr = rtl83xx_packet_cntr_alloc(priv);
-+			if (r->pr.packet_cntr >= 0) {
-+				pr_info("Using packet counter %d\n", r->pr.packet_cntr);
-+				r->pr.log_sel = true;
-+				r->pr.log_data = r->pr.packet_cntr;
-+			}
-+			priv->r->pie_rule_add(priv, &r->pr);
-+		} else {
-+			int pkts = priv->r->packet_cntr_read(r->pr.packet_cntr);
-+			pr_info("%s: total packets: %d\n", __func__, pkts);
-+
-+			priv->r->pie_rule_write(priv, r->pr.id, &r->pr);
-+		}
-+	}
-+	rcu_read_unlock();
-+	return 0;
-+}
-+
-+static int rtl83xx_port_ipv4_resolve(struct rtl838x_switch_priv *priv,
-+				     struct net_device *dev, __be32 ip_addr)
-+{
-+	struct neighbour *n = neigh_lookup(&arp_tbl, &ip_addr, dev);
-+	int err = 0;
-+	u64 mac;
-+
-+	if (!n) {
-+		n = neigh_create(&arp_tbl, &ip_addr, dev);
-+		if (IS_ERR(n))
-+			return PTR_ERR(n);
-+	}
-+
-+	/* If the neigh is already resolved, then go ahead and
-+	 * install the entry, otherwise start the ARP process to
-+	 * resolve the neigh.
-+	 */
-+	if (n->nud_state & NUD_VALID) {
-+		mac = ether_addr_to_u64(n->ha);
-+		pr_info("%s: resolved mac: %016llx\n", __func__, mac);
-+		rtl83xx_l3_nexthop_update(priv, ip_addr, mac);
-+	} else {
-+		pr_info("%s: need to wait\n", __func__);
-+		neigh_event_send(n, NULL);
-+	}
-+
-+	neigh_release(n);
-+	return err;
-+}
-+
-+/*
-+ * Is the lower network device a DSA slave network device of our RTL930X-switch?
-+ * Unfortunately we cannot just follow dev->dsa_prt as this is only set for the
-+ * DSA master device.
-+ */
-+int rtl83xx_port_is_under(const struct net_device * dev, struct rtl838x_switch_priv *priv)
-+{
-+	int i;
-+
-+// TODO: On 5.12:
-+// 	if(!dsa_slave_dev_check(dev)) {
-+//		netdev_info(dev, "%s: not a DSA device.\n", __func__);
-+//		return -EINVAL;
-+//	}
-+
-+	for (i = 0; i < priv->cpu_port; i++) {
-+		if (!priv->ports[i].dp)
-+			continue;
-+		pr_debug("dp-port: %08x, dev: %08x\n", (u32)(priv->ports[i].dp->slave), (u32)dev);
-+		if (priv->ports[i].dp->slave == dev)
-+			return i;
-+	}
-+	return -EINVAL;
-+}
-+
-+struct rtl83xx_walk_data {
-+	struct rtl838x_switch_priv *priv;
-+	int port;
-+};
-+
-+static int rtl83xx_port_lower_walk(struct net_device *lower, void *_data)
-+{
-+	struct rtl83xx_walk_data *data = _data;
-+	struct rtl838x_switch_priv *priv = data->priv;
-+	int ret = 0;
-+	int index;
-+
-+	index = rtl83xx_port_is_under(lower, priv);
-+	data->port = index;
-+	if (index >= 0) {
-+		pr_debug("Found DSA-port, index %d\n", index);
-+		ret = 1;
-+	}
-+
-+	return ret;
-+}
-+
-+int rtl83xx_port_dev_lower_find(struct net_device *dev, struct rtl838x_switch_priv *priv)
-+{
-+	struct rtl83xx_walk_data data;
-+
-+	data.priv = priv;
-+	data.port = 0;
-+
-+	netdev_walk_all_lower_dev(dev, rtl83xx_port_lower_walk, &data);
-+
-+	return data.port;
-+}
-+
-+static struct rtl83xx_route *rtl83xx_route_alloc(struct rtl838x_switch_priv *priv, u32 ip)
-+{
-+	struct rtl83xx_route *r;
-+	int idx = 0, err;
-+
-+	mutex_lock(&priv->reg_mutex);
-+
-+	idx = find_first_zero_bit(priv->route_use_bm, MAX_ROUTES);
-+	pr_info("%s id: %d, ip %pI4\n", __func__, idx, &ip);
-+
-+	r = kzalloc(sizeof(*r), GFP_KERNEL);
-+	if (!r) {
-+		mutex_unlock(&priv->reg_mutex);
-+		return r;
-+	}
-+
-+	r->id = idx;
-+	r->gw_ip = ip;
-+	r->pr.id = -1; // We still need to allocate a rule in HW
-+	r->is_host_route = false;
-+
-+	err = rhltable_insert(&priv->routes, &r->linkage, route_ht_params);
-+	if (err) {
-+		pr_err("Could not insert new rule\n");
-+		mutex_unlock(&priv->reg_mutex);
-+		goto out_free;
-+	}
-+
-+	set_bit(idx, priv->route_use_bm);
-+
-+	mutex_unlock(&priv->reg_mutex);
-+
-+	return r;
-+
-+out_free:
-+	kfree(r);
-+	return NULL;
-+}
-+
-+
-+static struct rtl83xx_route *rtl83xx_host_route_alloc(struct rtl838x_switch_priv *priv, u32 ip)
-+{
-+	struct rtl83xx_route *r;
-+	int idx = 0, err;
-+
-+	mutex_lock(&priv->reg_mutex);
-+
-+	idx = find_first_zero_bit(priv->host_route_use_bm, MAX_HOST_ROUTES);
-+	pr_info("%s id: %d, ip %pI4\n", __func__, idx, &ip);
-+
-+	r = kzalloc(sizeof(*r), GFP_KERNEL);
-+	if (!r) {
-+		mutex_unlock(&priv->reg_mutex);
-+		return r;
-+	}
-+
-+	/* We require a unique route ID irrespective of whether it is a prefix or host
-+	 * route (on RTL93xx) as we use this ID to associate a DMAC and next-hop entry */
-+	r->id = idx + MAX_ROUTES;
-+
-+	r->gw_ip = ip;
-+	r->pr.id = -1; // We still need to allocate a rule in HW
-+	r->is_host_route = true;
-+
-+	err = rhltable_insert(&priv->routes, &r->linkage, route_ht_params);
-+	if (err) {
-+		pr_err("Could not insert new rule\n");
-+		mutex_unlock(&priv->reg_mutex);
-+		goto out_free;
-+	}
-+
-+	set_bit(idx, priv->host_route_use_bm);
-+
-+	mutex_unlock(&priv->reg_mutex);
-+
-+	return r;
-+
-+out_free:
-+	kfree(r);
-+	return NULL;
-+}
-+
-+
-+
-+static void rtl83xx_route_rm(struct rtl838x_switch_priv *priv, struct rtl83xx_route *r)
-+{
-+	int id;
-+
-+	if (rhltable_remove(&priv->routes, &r->linkage, route_ht_params))
-+		dev_warn(priv->dev, "Could not remove route\n");
-+
-+	if (r->is_host_route) {
-+		id = priv->r->find_l3_slot(r, false);
-+		pr_info("%s: Got id for host route: %d\n", __func__, id);
-+		r->attr.valid = false;
-+		priv->r->host_route_write(id, r);
-+		clear_bit(r->id - MAX_ROUTES, priv->host_route_use_bm);
-+	} else {
-+		// If there is a HW representation of the route, delete it
-+		if (priv->r->route_lookup_hw) {
-+			id = priv->r->route_lookup_hw(r);
-+			pr_info("%s: Got id for prefix route: %d\n", __func__, id);
-+			r->attr.valid = false;
-+			priv->r->route_write(id, r);
-+		}
-+		clear_bit(r->id, priv->route_use_bm);
-+	}
-+
-+	kfree(r);
-+}
-+
-+static int rtl83xx_fib4_del(struct rtl838x_switch_priv *priv,
-+			    struct fib_entry_notifier_info *info)
-+{
-+	struct fib_nh *nh = fib_info_nh(info->fi, 0);
-+	struct rtl83xx_route *r = NULL;
-+	struct rhlist_head *tmp, *list;
-+
-+	pr_info("In %s, ip %pI4, len %d\n", __func__, &info->dst, info->dst_len);
-+	rcu_read_lock();
-+	list = rhltable_lookup(&priv->routes, &nh->fib_nh_gw4, route_ht_params);
-+	if (!list) {
-+		rcu_read_unlock();
-+		pr_err("%s: no such gateway: %pI4\n", __func__, &nh->fib_nh_gw4);
-+		return -ENOENT;
-+	}
-+	rhl_for_each_entry_rcu(r, tmp, list, linkage) {
-+		if (r->dst_ip == info->dst && r->prefix_len == info->dst_len) {
-+			pr_info("%s: found a route with id %d, nh-id %d\n",
-+				__func__, r->id, r->nh.id);
-+			break;
-+		}
-+	}
-+	rcu_read_unlock();
-+
-+	/* if there is no route has been found, this is NULL here */
-+	if (r) {
-+		rtl83xx_l2_nexthop_rm(priv, &r->nh);
-+		pr_info("%s: Releasing packet counter %d\n", __func__, r->pr.packet_cntr);
-+		set_bit(r->pr.packet_cntr, priv->packet_cntr_use_bm);
-+		priv->r->pie_rule_rm(priv, &r->pr);
-+		rtl83xx_route_rm(priv, r);
-+	}
-+
-+	nh->fib_nh_flags &= ~RTNH_F_OFFLOAD;
-+
-+	return 0;
-+}
-+
-+/*
-+ * On the RTL93xx, an L3 termination endpoint MAC address on which the router waits
-+ * for packets to be routed needs to be allocated.
-+ */
-+static int rtl83xx_alloc_router_mac(struct rtl838x_switch_priv *priv, u64 mac)
-+{
-+	int i, free_mac = -1;
-+	struct rtl93xx_rt_mac m;
-+
-+	mutex_lock(&priv->reg_mutex);
-+	for (i = 0; i < MAX_ROUTER_MACS; i++) {
-+		priv->r->get_l3_router_mac(i, &m);
-+		if (free_mac < 0 && !m.valid) {
-+			free_mac = i;
-+			continue;
-+		}
-+		if (m.valid && m.mac == mac) {
-+			free_mac = i;
-+			break;
-+		}
-+	}
-+
-+	if (free_mac < 0) {
-+		pr_err("No free router MACs, cannot offload\n");
-+		mutex_unlock(&priv->reg_mutex);
-+		return -1;
-+	}
-+
-+	m.valid = true;
-+	m.mac = mac;
-+	m.p_type = 0; // An individual port, not a trunk port
-+	m.p_id = 0x3f;			// Listen on any port
-+	m.p_id_mask = 0;
-+	m.vid = 0;			// Listen on any VLAN...
-+	m.vid_mask = 0; 		// ... so mask needs to be 0
-+	m.mac_mask = 0xffffffffffffULL;	// We want an exact match of the interface MAC
-+	m.action = L3_FORWARD;		// Route the packet
-+	priv->r->set_l3_router_mac(free_mac, &m);
-+
-+	mutex_unlock(&priv->reg_mutex);
-+
-+	return 0;
-+}
-+
-+static int rtl83xx_alloc_egress_intf(struct rtl838x_switch_priv *priv, u64 mac, int vlan)
-+{
-+	int i, free_mac = -1;
-+	struct rtl838x_l3_intf intf;
-+	u64 m;
-+
-+	mutex_lock(&priv->reg_mutex);
-+	for (i = 0; i < MAX_SMACS; i++) {
-+		m = priv->r->get_l3_egress_mac(L3_EGRESS_DMACS + i);
-+		if (free_mac < 0 && !m) {
-+			free_mac = i;
-+			continue;
-+		}
-+		if (m == mac) {
-+			mutex_unlock(&priv->reg_mutex);
-+			return i;
-+		}
-+	}
-+
-+	if (free_mac < 0) {
-+		pr_err("No free egress interface, cannot offload\n");
-+		return -1;
-+	}
-+
-+	// Set up default egress interface 1
-+	intf.vid = vlan;
-+	intf.smac_idx = free_mac;
-+	intf.ip4_mtu_id = 1;
-+	intf.ip6_mtu_id = 1;
-+	intf.ttl_scope = 1; // TTL
-+	intf.hl_scope = 1;  // Hop Limit
-+	intf.ip4_icmp_redirect = intf.ip6_icmp_redirect = 2;  // FORWARD
-+	intf.ip4_pbr_icmp_redirect = intf.ip6_pbr_icmp_redirect = 2; // FORWARD;
-+	priv->r->set_l3_egress_intf(free_mac, &intf);
-+
-+	priv->r->set_l3_egress_mac(L3_EGRESS_DMACS + free_mac, mac);
-+
-+	mutex_unlock(&priv->reg_mutex);
-+
-+	return free_mac;
-+}
-+
-+static int rtl83xx_fib4_add(struct rtl838x_switch_priv *priv,
-+			    struct fib_entry_notifier_info *info)
-+{
-+	struct fib_nh *nh = fib_info_nh(info->fi, 0);
-+	struct net_device *dev = fib_info_nh(info->fi, 0)->fib_nh_dev;
-+	int port;
-+	struct rtl83xx_route *r;
-+	bool to_localhost;
-+	int vlan = is_vlan_dev(dev) ? vlan_dev_vlan_id(dev) : 0;
-+
-+	pr_info("In %s, ip %pI4, len %d\n", __func__, &info->dst, info->dst_len);
-+	if (!info->dst) {
-+		pr_info("Not offloading default route for now\n");
-+		return 0;
-+	}
-+
-+	pr_info("GW: %pI4, interface name %s, mac %016llx, vlan %d\n", &nh->fib_nh_gw4, dev->name,
-+		ether_addr_to_u64(dev->dev_addr), vlan
-+	);
-+
-+	port = rtl83xx_port_dev_lower_find(dev, priv);
-+	if (port < 0)
-+		return -1;
-+
-+	// For now we only work with routes that have a gateway and are not ourself
-+//	if ((!nh->fib_nh_gw4) && (info->dst_len != 32))
-+//		return 0;
-+
-+	if ((info->dst & 0xff) == 0xff)
-+		return 0;
-+
-+	// Do not offload routes to 192.168.100.x
-+//	if ((info->dst & 0xffffff00) == 0xc0a86400)
-+//		return 0;
-+
-+	// Do not offload routes to 127.x.x.x
-+	if ((info->dst & 0xff000000) == 0x7f000000)
-+		return 0;
-+
-+	// Allocate route or host-route (entry if hardware supports this)
-+	if (info->dst_len == 32 && priv->r->host_route_write)
-+		r = rtl83xx_host_route_alloc(priv, nh->fib_nh_gw4);
-+	else
-+		r = rtl83xx_route_alloc(priv, nh->fib_nh_gw4);
-+
-+	if (!r) {
-+		pr_err("%s: No more free route entries\n", __func__);
-+		return -1;
-+	}
-+
-+	r->dst_ip = info->dst;
-+	r->prefix_len = info->dst_len;
-+	r->nh.rvid = vlan;
-+	to_localhost = !nh->fib_nh_gw4;
-+
-+	if (priv->r->set_l3_router_mac) {
-+		u64 mac = ether_addr_to_u64(dev->dev_addr);
-+
-+		pr_info("Local route and router mac %016llx\n", mac);
-+
-+		if (rtl83xx_alloc_router_mac(priv, mac))
-+			goto out_free_rt;
-+
-+		// vid = 0: Do not care about VID
-+		r->nh.if_id = rtl83xx_alloc_egress_intf(priv, mac, vlan);
-+		if (r->nh.if_id < 0)
-+			goto out_free_rmac;
-+
-+		if (to_localhost) {
-+			int slot;
-+
-+			r->nh.mac = mac;
-+			r->nh.port = priv->port_ignore;
-+			r->attr.valid = true;
-+			r->attr.action = ROUTE_ACT_TRAP2CPU;
-+			r->attr.type = 0;
-+
-+			slot = priv->r->find_l3_slot(r, false);
-+			pr_info("%s: Got slot for route: %d\n", __func__, slot);
-+			priv->r->host_route_write(slot, r);
-+		}
-+	}
-+
-+	// We need to resolve the mac address of the GW
-+	if (!to_localhost)
-+		rtl83xx_port_ipv4_resolve(priv, dev, nh->fib_nh_gw4);
-+
-+	nh->fib_nh_flags |= RTNH_F_OFFLOAD;
-+
-+	return 0;
-+
-+out_free_rmac:
-+out_free_rt:
-+	return 0;
-+}
-+
-+static int rtl83xx_fib6_add(struct rtl838x_switch_priv *priv,
-+			    struct fib6_entry_notifier_info *info)
-+{
-+	pr_info("In %s\n", __func__);
-+//	nh->fib_nh_flags |= RTNH_F_OFFLOAD;
-+	return 0;
-+}
-+
-+struct net_event_work {
-+	struct work_struct work;
-+	struct rtl838x_switch_priv *priv;
-+	u64 mac;
-+	u32 gw_addr;
-+};
-+
-+static void rtl83xx_net_event_work_do(struct work_struct *work)
-+{
-+	struct net_event_work *net_work =
-+		container_of(work, struct net_event_work, work);
-+	struct rtl838x_switch_priv *priv = net_work->priv;
-+
-+	rtl83xx_l3_nexthop_update(priv, net_work->gw_addr, net_work->mac);
-+}
-+
-+static int rtl83xx_netevent_event(struct notifier_block *this,
-+				 unsigned long event, void *ptr)
-+{
-+	struct rtl838x_switch_priv *priv;
-+	struct net_device *dev;
-+	struct neighbour *n = ptr;
-+	int err, port;
-+	struct net_event_work *net_work;
-+
-+	priv = container_of(this, struct rtl838x_switch_priv, ne_nb);
-+
-+	net_work = kzalloc(sizeof(*net_work), GFP_ATOMIC);
-+	if (!net_work)
-+		return NOTIFY_BAD;
-+
-+	INIT_WORK(&net_work->work, rtl83xx_net_event_work_do);
-+	net_work->priv = priv;
-+
-+	switch (event) {
-+	case NETEVENT_NEIGH_UPDATE:
-+		if (n->tbl != &arp_tbl)
-+			return NOTIFY_DONE;
-+		dev = n->dev;
-+		port = rtl83xx_port_dev_lower_find(dev, priv);
-+		if (port < 0 || !(n->nud_state & NUD_VALID)) {
-+			pr_debug("%s: Neigbour invalid, not updating\n", __func__);
-+			kfree(net_work);
-+			return NOTIFY_DONE;
-+		}
-+
-+		net_work->mac = ether_addr_to_u64(n->ha);
-+		net_work->gw_addr = *(__be32 *) n->primary_key;
-+
-+		pr_debug("%s: updating neighbour on port %d, mac %016llx\n",
-+			__func__, port, net_work->mac);
-+		schedule_work(&net_work->work);
-+		if (err)
-+			netdev_warn(dev, "failed to handle neigh update (err %d)\n", err);
-+		break;
-+	}
-+
-+	return NOTIFY_DONE;
-+}
-+
-+struct rtl83xx_fib_event_work {
-+	struct work_struct work;
-+	union {
-+		struct fib_entry_notifier_info fen_info;
-+		struct fib6_entry_notifier_info fen6_info;
-+		struct fib_rule_notifier_info fr_info;
-+	};
-+	struct rtl838x_switch_priv *priv;
-+	bool is_fib6;
-+	unsigned long event;
-+};
-+
-+static void rtl83xx_fib_event_work_do(struct work_struct *work)
-+{
-+	struct rtl83xx_fib_event_work *fib_work =
-+		container_of(work, struct rtl83xx_fib_event_work, work);
-+	struct rtl838x_switch_priv *priv = fib_work->priv;
-+	struct fib_rule *rule;
-+	int err;
-+
-+	/* Protect internal structures from changes */
-+	rtnl_lock();
-+	pr_debug("%s: doing work, event %ld\n", __func__, fib_work->event);
-+	switch (fib_work->event) {
-+	case FIB_EVENT_ENTRY_ADD:
-+	case FIB_EVENT_ENTRY_REPLACE:
-+	case FIB_EVENT_ENTRY_APPEND:
-+		if (fib_work->is_fib6) {
-+			err = rtl83xx_fib6_add(priv, &fib_work->fen6_info);
-+		} else {
-+			err = rtl83xx_fib4_add(priv, &fib_work->fen_info);
-+			fib_info_put(fib_work->fen_info.fi);
-+		}
-+		if (err)
-+			pr_err("%s: FIB4 failed\n", __func__);
-+		break;
-+	case FIB_EVENT_ENTRY_DEL:
-+		if (!fib_work->is_fib6) {
-+			rtl83xx_fib4_del(priv, &fib_work->fen_info);
-+			fib_info_put(fib_work->fen_info.fi);
-+		}
-+		break;
-+	case FIB_EVENT_RULE_ADD:
-+	case FIB_EVENT_RULE_DEL:
-+		if (!fib_work->is_fib6) {
-+			rule = fib_work->fr_info.rule;
-+			if (!fib4_rule_default(rule))
-+				pr_err("%s: FIB4 default rule failed\n", __func__);
-+			fib_rule_put(rule);
-+		}
-+		break;
-+	}
-+	rtnl_unlock();
-+	kfree(fib_work);
-+}
-+
-+/* Called with rcu_read_lock() */
-+static int rtl83xx_fib_event(struct notifier_block *this, unsigned long event, void *ptr)
-+{
-+	struct fib_notifier_info *info = ptr;
-+	struct rtl838x_switch_priv *priv;
-+	struct rtl83xx_fib_event_work *fib_work;
-+
-+	if ((info->family != AF_INET && info->family != AF_INET6 &&
-+	     info->family != RTNL_FAMILY_IPMR &&
-+	     info->family != RTNL_FAMILY_IP6MR))
-+		return NOTIFY_DONE;
-+
-+	priv = container_of(this, struct rtl838x_switch_priv, fib_nb);
-+
-+	fib_work = kzalloc(sizeof(*fib_work), GFP_ATOMIC);
-+	if (!fib_work)
-+		return NOTIFY_BAD;
-+
-+	INIT_WORK(&fib_work->work, rtl83xx_fib_event_work_do);
-+	fib_work->priv = priv;
-+	fib_work->event = event;
-+	fib_work->is_fib6 = false;
-+
-+	switch (event) {
-+	case FIB_EVENT_ENTRY_ADD:
-+	case FIB_EVENT_ENTRY_REPLACE:
-+	case FIB_EVENT_ENTRY_APPEND:
-+	case FIB_EVENT_ENTRY_DEL:
-+		pr_debug("%s: FIB_ENTRY ADD/DELL, event %ld\n", __func__, event);
-+		if (info->family == AF_INET) {
-+			struct fib_entry_notifier_info *fen_info = ptr;
-+
-+			if (fen_info->fi->fib_nh_is_v6) {
-+				NL_SET_ERR_MSG_MOD(info->extack,
-+					"IPv6 gateway with IPv4 route is not supported");
-+				kfree(fib_work);
-+				return notifier_from_errno(-EINVAL);
-+			}
-+
-+			memcpy(&fib_work->fen_info, ptr, sizeof(fib_work->fen_info));
-+			/* Take referece on fib_info to prevent it from being
-+			* freed while work is queued. Release it afterwards.
-+			*/
-+			fib_info_hold(fib_work->fen_info.fi);
-+
-+		} else if (info->family == AF_INET6) {
-+			struct fib6_entry_notifier_info *fen6_info;
-+
-+			fen6_info = container_of(info, struct fib6_entry_notifier_info, info);
-+			if (fen6_info->rt->nh) {
-+				NL_SET_ERR_MSG_MOD(info->extack,
-+				  "IPv6 route with nexthop objects is not supported");
-+				kfree(fib_work);
-+				return notifier_from_errno(-EINVAL);
-+			}
-+			pr_debug("%s: FIB_RULE ADD/DELL for IPv6\n", __func__);
-+			fib_work->is_fib6 = true;
-+			memcpy(&fib_work->fen6_info, fen6_info, sizeof(fib_work->fen6_info));
-+		}
-+		break;
-+
-+	case FIB_EVENT_RULE_ADD:
-+	case FIB_EVENT_RULE_DEL:
-+		pr_debug("%s: FIB_RULE ADD/DELL, event: %ld\n", __func__, event);
-+		memcpy(&fib_work->fr_info, ptr, sizeof(fib_work->fr_info));
-+		fib_rule_get(fib_work->fr_info.rule);
-+		break;
-+	}
-+
-+	schedule_work(&fib_work->work);
-+
-+	return NOTIFY_DONE;
-+}
-+
- static int __init rtl83xx_sw_probe(struct platform_device *pdev)
- {
- 	int err = 0, i;
-@@ -570,19 +1428,24 @@ static int __init rtl83xx_sw_probe(struct platform_device *pdev)
- 	if (!priv)
- 		return -ENOMEM;
- 
--	priv->ds = dsa_switch_alloc(dev, DSA_MAX_PORTS);
--
-+	priv->ds = devm_kzalloc(dev, sizeof(*priv->ds), GFP_KERNEL);
- 	if (!priv->ds)
- 		return -ENOMEM;
-+
-+	priv->ds->num_ports = DSA_MAX_PORTS;
- 	priv->ds->dev = dev;
- 	priv->ds->priv = priv;
- 	priv->ds->ops = &rtl83xx_switch_ops;
- 	priv->dev = dev;
- 
-+	mutex_init(&priv->reg_mutex);
-+
- 	priv->family_id = soc_info.family;
- 	priv->id = soc_info.id;
-+	pr_info("SOC ID %X, FAMILY ID %X\n", priv->id, priv->family_id);
- 	switch(soc_info.family) {
- 	case RTL8380_FAMILY_ID:
-+		rtl8380_get_version(priv);  // TODO: Make this a function pointer call
- 		priv->ds->ops = &rtl83xx_switch_ops;
- 		priv->cpu_port = RTL838X_CPU_PORT;
- 		priv->port_mask = 0x1f;
-@@ -591,10 +1454,14 @@ static int __init rtl83xx_sw_probe(struct platform_device *pdev)
- 		priv->r = &rtl838x_reg;
- 		priv->ds->num_ports = 29;
- 		priv->fib_entries = 8192;
--		rtl8380_get_version(priv);
- 		priv->n_lags = 8;
-+		priv->l2_bucket_size = 4;
-+		priv->n_pie_blocks = 12;
-+		priv->port_ignore = 0x1f;
-+		priv->n_counters = 128;
- 		break;
- 	case RTL8390_FAMILY_ID:
-+		rtl8390_get_version(priv);
- 		priv->ds->ops = &rtl83xx_switch_ops;
- 		priv->cpu_port = RTL839X_CPU_PORT;
- 		priv->port_mask = 0x3f;
-@@ -603,10 +1470,14 @@ static int __init rtl83xx_sw_probe(struct platform_device *pdev)
- 		priv->r = &rtl839x_reg;
- 		priv->ds->num_ports = 53;
- 		priv->fib_entries = 16384;
--		rtl8390_get_version(priv);
- 		priv->n_lags = 16;
-+		priv->l2_bucket_size = 4;
-+		priv->n_pie_blocks = 18;
-+		priv->port_ignore = 0x3f;
-+		priv->n_counters = 1024;
- 		break;
- 	case RTL9300_FAMILY_ID:
-+		priv->version = RTL8390_VERSION_A; // TODO: Understand RTL9300 versions
- 		priv->ds->ops = &rtl930x_switch_ops;
- 		priv->cpu_port = RTL930X_CPU_PORT;
- 		priv->port_mask = 0x1f;
-@@ -615,11 +1486,15 @@ static int __init rtl83xx_sw_probe(struct platform_device *pdev)
- 		priv->r = &rtl930x_reg;
- 		priv->ds->num_ports = 29;
- 		priv->fib_entries = 16384;
--		priv->version = RTL8390_VERSION_A;
- 		priv->n_lags = 16;
- 		sw_w32(1, RTL930X_ST_CTRL);
-+		priv->l2_bucket_size = 8;
-+		priv->n_pie_blocks = 16;
-+		priv->port_ignore = 0x3f;
-+		priv->n_counters = 2048;
- 		break;
- 	case RTL9310_FAMILY_ID:
-+		priv->version = RTL8390_VERSION_A; // TODO: Fix me
- 		priv->ds->ops = &rtl930x_switch_ops;
- 		priv->cpu_port = RTL931X_CPU_PORT;
- 		priv->port_mask = 0x3f;
-@@ -628,16 +1503,24 @@ static int __init rtl83xx_sw_probe(struct platform_device *pdev)
- 		priv->r = &rtl931x_reg;
- 		priv->ds->num_ports = 57;
- 		priv->fib_entries = 16384;
--		priv->version = RTL8390_VERSION_A;
- 		priv->n_lags = 16;
-+		priv->l2_bucket_size = 8;
-+		priv->n_pie_blocks = 32;
-+		priv->port_ignore = 0x3f;
-+		priv->n_counters = 0; // TODO: Figure out logs on RTL9310
- 		break;
- 	}
-+	memset(priv->mc_group_saves, -1, sizeof(priv->mc_group_saves));
-+	memset(priv->lag_primary, -1, sizeof(priv->lag_primary));
-+
-+	priv->ds->num_lag_ids = priv->n_lags;
-+
- 	pr_debug("Chip version %c\n", priv->version);
- 
- 	err = rtl83xx_mdio_probe(priv);
- 	if (err) {
- 		/* Probing fails the 1st time because of missing ethernet driver
--		 * initialization. Use this to disable traffic in case the bootloader left if on
-+		 * initialization. Use this to disable traffic in case the bootloader left it on
- 		 */
- 		return err;
- 	}
-@@ -647,6 +1530,9 @@ static int __init rtl83xx_sw_probe(struct platform_device *pdev)
- 		return err;
- 	}
- 
-+	for (i = 0; i <= priv->cpu_port; i++)
-+		priv->ports[i].dp = dsa_to_port(priv->ds, i);
-+
- 	/* Enable link and media change interrupts. Are the SERDES masks needed? */
- 	sw_w32_mask(0, 3, priv->r->isr_glb_src);
- 
-@@ -686,16 +1572,50 @@ static int __init rtl83xx_sw_probe(struct platform_device *pdev)
- 
- 	rtl83xx_setup_qos(priv);
- 
-+	priv->r->l3_setup(priv);
-+
- 	/* Clear all destination ports for mirror groups */
- 	for (i = 0; i < 4; i++)
- 		priv->mirror_group_ports[i] = -1;
- 
-+	/*
-+	 * Register netdevice event callback to catch changes in link aggregation groups
-+	 */
- 	priv->nb.notifier_call = rtl83xx_netdevice_event;
--		if (register_netdevice_notifier(&priv->nb)) {
--			priv->nb.notifier_call = NULL;
--			dev_err(dev, "Failed to register LAG netdev notifier\n");
-+	if (register_netdevice_notifier(&priv->nb)) {
-+		priv->nb.notifier_call = NULL;
-+		dev_err(dev, "Failed to register LAG netdev notifier\n");
-+		goto err_register_nb;
-+	}
-+
-+	// Initialize hash table for L3 routing
-+	rhltable_init(&priv->routes, &route_ht_params);
-+
-+	/*
-+	 * Register netevent notifier callback to catch notifications about neighboring
-+	 * changes to update nexthop entries for L3 routing.
-+	 */
-+	priv->ne_nb.notifier_call = rtl83xx_netevent_event;
-+	if (register_netevent_notifier(&priv->ne_nb)) {
-+		priv->ne_nb.notifier_call = NULL;
-+		dev_err(dev, "Failed to register netevent notifier\n");
-+		goto err_register_ne_nb;
- 	}
- 
-+	priv->fib_nb.notifier_call = rtl83xx_fib_event;
-+
-+	/*
-+	 * Register Forwarding Information Base notifier to offload routes where
-+	 * where possible
-+	 * Only FIBs pointing to our own netdevs are programmed into
-+	 * the device, so no need to pass a callback.
-+	 */
-+	// TODO 5.9: err = register_fib_notifier(&init_net, &priv->fib_nb, NULL, NULL);
-+	err = register_fib_notifier(&priv->fib_nb, NULL);
-+	if (err)
-+		goto err_register_fib_nb;
-+
-+	// TODO: put this into l2_setup()
- 	// Flood BPDUs to all ports including cpu-port
- 	if (soc_info.family != RTL9300_FAMILY_ID) { // TODO: Port this functionality
- 		bpdu_mask = soc_info.family == RTL8380_FAMILY_ID ? 0x1FFFFFFF : 0x1FFFFFFFFFFFFF;
-@@ -705,8 +1625,17 @@ static int __init rtl83xx_sw_probe(struct platform_device *pdev)
- 		sw_w32(7, priv->r->spcl_trap_eapol_ctrl);
- 
- 		rtl838x_dbgfs_init(priv);
-+	} else {
-+		rtl930x_dbgfs_init(priv);
- 	}
- 
-+	return 0;
-+
-+err_register_fib_nb:
-+	unregister_netevent_notifier(&priv->ne_nb);
-+err_register_ne_nb:
-+	unregister_netdevice_notifier(&priv->nb);
-+err_register_nb:
- 	return err;
- }
- 
-diff --git a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/debugfs.c b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/debugfs.c
-index 4f81408453..0425bae4ab 100644
---- a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/debugfs.c
-+++ b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/debugfs.c
-@@ -40,7 +40,10 @@
- #define RTL839X_MIR_RSPAN_TX_CTRL		(0x69b0)
- #define RTL839X_MIR_RSPAN_TX_TAG_RM_CTRL	(0x2550)
- #define RTL839X_MIR_RSPAN_TX_TAG_EN_CTRL	(0x2554)
--#define RTL839X_MIR_SAMPLE_RATE_CTRL                (0x2558)
-+
-+#define RTL838X_STAT_PRVTE_DROP_COUNTERS	(0x6A00)
-+#define RTL839X_STAT_PRVTE_DROP_COUNTERS	(0x3E00)
-+#define RTL930X_STAT_PRVTE_DROP_COUNTERS	(0xB5B8)
- 
- int rtl83xx_port_get_stp_state(struct rtl838x_switch_priv *priv, int port);
- void rtl83xx_port_stp_state_set(struct dsa_switch *ds, int port, u8 state);
-@@ -50,6 +53,58 @@ u32 rtl839x_get_egress_rate(struct rtl838x_switch_priv *priv, int port);
- int rtl838x_set_egress_rate(struct rtl838x_switch_priv *priv, int port, u32 rate);
- int rtl839x_set_egress_rate(struct rtl838x_switch_priv *priv, int port, u32 rate);
- 
-+
-+const char *rtl838x_drop_cntr[] = {
-+    "ALE_TX_GOOD_PKTS", "MAC_RX_DROP", "ACL_FWD_DROP", "HW_ATTACK_PREVENTION_DROP",
-+    "RMA_DROP", "VLAN_IGR_FLTR_DROP", "INNER_OUTER_CFI_EQUAL_1_DROP", "PORT_MOVE_DROP",
-+    "NEW_SA_DROP", "MAC_LIMIT_SYS_DROP", "MAC_LIMIT_VLAN_DROP", "MAC_LIMIT_PORT_DROP",
-+    "SWITCH_MAC_DROP", "ROUTING_EXCEPTION_DROP", "DA_LKMISS_DROP", "RSPAN_DROP",
-+    "ACL_LKMISS_DROP", "ACL_DROP", "INBW_DROP", "IGR_METER_DROP",
-+    "ACCEPT_FRAME_TYPE_DROP", "STP_IGR_DROP", "INVALID_SA_DROP", "SA_BLOCKING_DROP",
-+    "DA_BLOCKING_DROP", "L2_INVALID_DPM_DROP", "MCST_INVALID_DPM_DROP", "RX_FLOW_CONTROL_DROP",
-+    "STORM_SPPRS_DROP", "LALS_DROP", "VLAN_EGR_FILTER_DROP", "STP_EGR_DROP",
-+    "SRC_PORT_FILTER_DROP", "PORT_ISOLATION_DROP", "ACL_FLTR_DROP", "MIRROR_FLTR_DROP",
-+    "TX_MAX_DROP", "LINK_DOWN_DROP", "FLOW_CONTROL_DROP", "BRIDGE .1d discards"
-+};
-+
-+const char *rtl839x_drop_cntr[] = {
-+    "ALE_TX_GOOD_PKTS", "ERROR_PKTS", "EGR_ACL_DROP", "EGR_METER_DROP",
-+    "OAM", "CFM" "VLAN_IGR_FLTR", "VLAN_ERR",
-+    "INNER_OUTER_CFI_EQUAL_1", "VLAN_TAG_FORMAT", "SRC_PORT_SPENDING_TREE", "INBW",
-+    "RMA", "HW_ATTACK_PREVENTION", "PROTO_STORM", "MCAST_SA",
-+    "IGR_ACL_DROP", "IGR_METER_DROP", "DFLT_ACTION_FOR_MISS_ACL_AND_C2SC", "NEW_SA",
-+    "PORT_MOVE", "SA_BLOCKING", "ROUTING_EXCEPTION", "SRC_PORT_SPENDING_TREE_NON_FWDING",
-+    "MAC_LIMIT", "UNKNOW_STORM", "MISS_DROP", "CPU_MAC_DROP",
-+    "DA_BLOCKING", "SRC_PORT_FILTER_BEFORE_EGR_ACL", "VLAN_EGR_FILTER", "SPANNING_TRE",
-+    "PORT_ISOLATION", "OAM_EGRESS_DROP", "MIRROR_ISOLATION", "MAX_LEN_BEFORE_EGR_ACL",
-+    "SRC_PORT_FILTER_BEFORE_MIRROR", "MAX_LEN_BEFORE_MIRROR", "SPECIAL_CONGEST_BEFORE_MIRROR",
-+    "LINK_STATUS_BEFORE_MIRROR",
-+    "WRED_BEFORE_MIRROR", "MAX_LEN_AFTER_MIRROR", "SPECIAL_CONGEST_AFTER_MIRROR",
-+    "LINK_STATUS_AFTER_MIRROR",
-+    "WRED_AFTER_MIRROR"
-+};
-+
-+const char *rtl930x_drop_cntr[] = {
-+	"OAM_PARSER", "UC_RPF", "DEI_CFI", "MAC_IP_SUBNET_BASED_VLAN", "VLAN_IGR_FILTER",
-+	"L2_UC_MC", "IPV_IP6_MC_BRIDGE", "PTP", "USER_DEF_0_3", "RESERVED",
-+	"RESERVED1", "RESERVED2", "BPDU_RMA", "LACP", "LLDP",
-+	"EAPOL", "XX_RMA", "L3_IPUC_NON_IP", "IP4_IP6_HEADER_ERROR", "L3_BAD_IP",
-+	"L3_DIP_DMAC_MISMATCH", "IP4_IP_OPTION", "IP_UC_MC_ROUTING_LOOK_UP_MISS", "L3_DST_NULL_INTF",
-+	"L3_PBR_NULL_INTF",
-+	"HOST_NULL_INTF", "ROUTE_NULL_INTF", "BRIDGING_ACTION", "ROUTING_ACTION", "IPMC_RPF",
-+	"L2_NEXTHOP_AGE_OUT", "L3_UC_TTL_FAIL", "L3_MC_TTL_FAIL", "L3_UC_MTU_FAIL", "L3_MC_MTU_FAIL",
-+	"L3_UC_ICMP_REDIR", "IP6_MLD_OTHER_ACT", "ND", "IP_MC_RESERVED", "IP6_HBH",
-+	"INVALID_SA", "L2_HASH_FULL", "NEW_SA", "PORT_MOVE_FORBID", "STATIC_PORT_MOVING",
-+	"DYNMIC_PORT_MOVING", "L3_CRC", "MAC_LIMIT", "ATTACK_PREVENT", "ACL_FWD_ACTION",
-+	"OAMPDU", "OAM_MUX", "TRUNK_FILTER", "ACL_DROP", "IGR_BW",
-+	"ACL_METER", "VLAN_ACCEPT_FRAME_TYPE", "MSTP_SRC_DROP_DISABLED_BLOCKING", "SA_BLOCK", "DA_BLOCK",
-+	"STORM_CONTROL", "VLAN_EGR_FILTER", "MSTP_DESTINATION_DROP", "SRC_PORT_FILTER", "PORT_ISOLATION",
-+	"TX_MAX_FRAME_SIZE", "EGR_LINK_STATUS", "MAC_TX_DISABLE", "MAC_PAUSE_FRAME", "MAC_RX_DROP",
-+	"MIRROR_ISOLATE", "RX_FC", "EGR_QUEUE", "HSM_RUNOUT", "ROUTING_DISABLE", "INVALID_L2_NEXTHOP_ENTRY",
-+	"L3_MC_SRC_FLT", "CPUTAG_FLT", "FWD_PMSK_NULL", "IPUC_ROUTING_LOOKUP_MISS", "MY_DEV_DROP",
-+	"STACK_NONUC_BLOCKING_PMSK", "STACK_PORT_NOT_FOUND", "ACL_LOOPBACK_DROP", "IP6_ROUTING_EXT_HEADER"
-+};
-+
- static ssize_t rtl838x_common_read(char __user *buffer, size_t count,
- 					loff_t *ppos, unsigned int value)
- {
-@@ -134,6 +189,61 @@ static const struct file_operations stp_state_fops = {
- 	.write = stp_state_write,
- };
- 
-+static ssize_t drop_counter_read(struct file *filp, char __user *buffer, size_t count,
-+			     loff_t *ppos)
-+{
-+	struct rtl838x_switch_priv *priv = filp->private_data;
-+	int i;
-+	const char **d;
-+	u32 v;
-+	char *buf;
-+	int n = 0, len, offset;
-+	int num;
-+
-+	switch (priv->family_id) {
-+	case RTL8380_FAMILY_ID:
-+		d = rtl838x_drop_cntr;
-+		offset = RTL838X_STAT_PRVTE_DROP_COUNTERS;
-+		num = 40;
-+		break;
-+	case RTL8390_FAMILY_ID:
-+		d = rtl839x_drop_cntr;
-+		offset = RTL839X_STAT_PRVTE_DROP_COUNTERS;
-+		num = 45;
-+		break;
-+	case RTL9300_FAMILY_ID:
-+		d = rtl930x_drop_cntr;
-+		offset = RTL930X_STAT_PRVTE_DROP_COUNTERS;
-+		num = 85;
-+		break;
-+	}
-+
-+	buf = kmalloc(30 * num, GFP_KERNEL);
-+	if (!buf)
-+		return -ENOMEM;
-+
-+	for (i = 0; i < num; i++) {
-+		v = sw_r32(offset + (i << 2)) & 0xffff;
-+		n += sprintf(buf + n, "%s: %d\n", d[i], v);
-+	}
-+
-+	if (count < strlen(buf)) {
-+		kfree(buf);
-+		return -ENOSPC;
-+	}
-+
-+	len = simple_read_from_buffer(buffer, count, ppos, buf, strlen(buf));
-+	kfree(buf);
-+
-+	return len;
-+}
-+
-+static const struct file_operations drop_counter_fops = {
-+	.owner = THIS_MODULE,
-+	.open = simple_open,
-+	.read = drop_counter_read,
-+};
-+
- static ssize_t age_out_read(struct file *filp, char __user *buffer, size_t count,
- 			     loff_t *ppos)
- {
-@@ -213,11 +323,159 @@ static const struct file_operations port_egress_fops = {
- 	.write = port_egress_rate_write,
- };
- 
-+static ssize_t port_838x_bpdu_action_read(struct file *filp, char __user *buffer, size_t count,
-+				loff_t *ppos)
-+{
-+	struct rtl838x_port *p = filp->private_data;
-+	struct dsa_switch *ds = p->dp->ds;
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	u32 port = p->dp->index;
-+	u32 value = (sw_r32(priv->r->rma_bpdu_ctrl + ((port / priv->r->rma_bpdu_ctrl_div) << 2)) >> (((port % priv->r->rma_bpdu_ctrl_div) <<1) & 0x3) >> ((port % priv->r->rma_bpdu_ctrl_div) << 1)) & 0x3;
-+
-+	return rtl838x_common_read(buffer, count, ppos, (u32)value);
-+}
-+
-+static ssize_t port_838x_bpdu_action_write(struct file *filp, const char __user *buffer,
-+				size_t count, loff_t *ppos)
-+{
-+	struct rtl838x_port *p = filp->private_data;
-+	struct dsa_switch *ds = p->dp->ds;
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	u32 value;
-+	u32 port = p->dp->index;
-+	size_t res = rtl838x_common_write(buffer, count, ppos, &value);
-+	if (res < 0)
-+		return res;
-+
-+	sw_w32_mask(3 << ((port % priv->r->rma_bpdu_ctrl_div) << 1), (value & 0x3) << ((port % priv->r->rma_bpdu_ctrl_div) << 1), priv->r->rma_bpdu_ctrl + ((port / priv->r->rma_bpdu_ctrl_div) << 2));
-+	return res;
-+}
-+
-+static const struct file_operations port_838x_action_bpdu_fops = {
-+	.owner = THIS_MODULE,
-+	.open = simple_open,
-+	.read = port_838x_bpdu_action_read,
-+	.write = port_838x_bpdu_action_write,
-+};
-+
-+
-+static ssize_t port_838x_ptp_action_read(struct file *filp, char __user *buffer, size_t count,
-+				loff_t *ppos)
-+{
-+	struct rtl838x_port *p = filp->private_data;
-+	struct dsa_switch *ds = p->dp->ds;
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	u32 port = p->dp->index;
-+	u32 value = (sw_r32(priv->r->rma_ptp_ctrl + ((port / priv->r->rma_ptp_ctrl_div) << 2)) >> (((port % priv->r->rma_ptp_ctrl_div) <<1) & 0x3) >> ((port % priv->r->rma_ptp_ctrl_div) << 1)) & 0x3;
-+
-+	return rtl838x_common_read(buffer, count, ppos, (u32)value);
-+}
-+
-+static ssize_t port_838x_ptp_action_write(struct file *filp, const char __user *buffer,
-+				size_t count, loff_t *ppos)
-+{
-+	struct rtl838x_port *p = filp->private_data;
-+	struct dsa_switch *ds = p->dp->ds;
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	u32 value;
-+	u32 port = p->dp->index;
-+	size_t res = rtl838x_common_write(buffer, count, ppos, &value);
-+	if (res < 0)
-+		return res;
-+
-+	sw_w32_mask(3 << ((port % priv->r->rma_ptp_ctrl_div) << 1), (value & 0x3) << ((port % priv->r->rma_ptp_ctrl_div) << 1), priv->r->rma_ptp_ctrl + ((port / priv->r->rma_ptp_ctrl_div) << 2));
-+	return res;
-+}
-+
-+static const struct file_operations port_838x_action_ptp_fops = {
-+	.owner = THIS_MODULE,
-+	.open = simple_open,
-+	.read = port_838x_ptp_action_read,
-+	.write = port_838x_ptp_action_write,
-+};
-+
-+static ssize_t port_838x_lltp_action_read(struct file *filp, char __user *buffer, size_t count,
-+				loff_t *ppos)
-+{
-+	struct rtl838x_port *p = filp->private_data;
-+	struct dsa_switch *ds = p->dp->ds;
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	u32 port = p->dp->index;
-+	u32 value = (sw_r32(priv->r->rma_lltp_ctrl + ((port / priv->r->rma_lltp_ctrl_div) << 2)) >> (((port % priv->r->rma_lltp_ctrl_div) <<1) & 0x3) >> ((port % priv->r->rma_lltp_ctrl_div) << 1)) & 0x3;
-+
-+	return rtl838x_common_read(buffer, count, ppos, (u32)value);
-+}
-+
-+static ssize_t port_838x_lltp_action_write(struct file *filp, const char __user *buffer,
-+				size_t count, loff_t *ppos)
-+{
-+	struct rtl838x_port *p = filp->private_data;
-+	struct dsa_switch *ds = p->dp->ds;
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	u32 value;
-+	u32 port = p->dp->index;
-+	size_t res = rtl838x_common_write(buffer, count, ppos, &value);
-+	if (res < 0)
-+		return res;
-+
-+	sw_w32_mask(3 << ((port% priv->r->rma_lltp_ctrl_div) << 1), (value & 0x3) << ((port % priv->r->rma_lltp_ctrl_div) << 1), priv->r->rma_lltp_ctrl + ((port / priv->r->rma_lltp_ctrl_div) << 2));
-+	return res;
-+}
-+
-+static const struct file_operations port_838x_action_lltp_fops = {
-+	.owner = THIS_MODULE,
-+	.open = simple_open,
-+	.read = port_838x_lltp_action_read,
-+	.write = port_838x_lltp_action_write,
-+};
-+
-+
-+static ssize_t port_838x_eapol_action_read(struct file *filp, char __user *buffer, size_t count,
-+				loff_t *ppos)
-+{
-+	struct rtl838x_port *p = filp->private_data;
-+	struct dsa_switch *ds = p->dp->ds;
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	u32 port = p->dp->index;
-+	u32 value = (sw_r32(priv->r->rma_eapol_ctrl + ((port / priv->r->rma_eapol_ctrl_div) << 2)) >> (((port % priv->r->rma_eapol_ctrl_div) <<1) & 0x3) >> ((port % priv->r->rma_eapol_ctrl_div) << 1)) & 0x3;
-+
-+	return rtl838x_common_read(buffer, count, ppos, (u32)value);
-+}
-+
-+static ssize_t port_838x_eapol_action_write(struct file *filp, const char __user *buffer,
-+				size_t count, loff_t *ppos)
-+{
-+	struct rtl838x_port *p = filp->private_data;
-+	struct dsa_switch *ds = p->dp->ds;
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	u32 value;
-+	u32 port = p->dp->index;
-+	size_t res = rtl838x_common_write(buffer, count, ppos, &value);
-+	if (res < 0)
-+		return res;
-+
-+	sw_w32_mask(3 << ((port % priv->r->rma_eapol_ctrl_div) << 1), (value & 0x3) << ((port % priv->r->rma_eapol_ctrl_div) << 1), priv->r->rma_eapol_ctrl + ((port / priv->r->rma_eapol_ctrl_div) << 2));
-+	return res;
-+}
-+
-+static const struct file_operations port_838x_action_eapol_fops = {
-+	.owner = THIS_MODULE,
-+	.open = simple_open,
-+	.read = port_838x_eapol_action_read,
-+	.write = port_838x_eapol_action_write,
-+};
-+
-+
-+
- 
- static const struct debugfs_reg32 port_ctrl_regs[] = {
- 	{ .name = "port_isolation", .offset = RTL838X_PORT_ISO_CTRL(0), },
- 	{ .name = "mac_force_mode", .offset = RTL838X_MAC_FORCE_MODE_CTRL, },
- };
-+static const struct debugfs_reg32 port_ctrl_regs_839x[] = {
-+	{ .name = "port_isolation", .offset = RTL839X_PORT_ISO_CTRL(0), },
-+	{ .name = "mac_force_mode", .offset = RTL839X_MAC_FORCE_MODE_CTRL, },
-+};
- 
- void rtl838x_dbgfs_cleanup(struct rtl838x_switch_priv *priv)
- {
-@@ -234,33 +492,26 @@ static int rtl838x_dbgfs_port_init(struct dentry *parent, struct rtl838x_switch_
- 
- 	port_dir = debugfs_create_dir(priv->ports[port].dp->name, parent);
- 
--	if (priv->family_id == RTL8380_FAMILY_ID) {
--		debugfs_create_x32("storm_rate_uc", 0644, port_dir,
--				(u32 *)(RTL838X_SW_BASE + RTL838X_STORM_CTRL_PORT_UC(port)));
--
--		debugfs_create_x32("storm_rate_mc", 0644, port_dir,
--				(u32 *)(RTL838X_SW_BASE + RTL838X_STORM_CTRL_PORT_MC(port)));
-+	debugfs_create_x32("sflow_port_rate", 0644, port_dir,
-+			(u32 *)(RTL838X_SW_BASE + priv->r->sflow_port_rate_ctrl + (port << 2)));
-+	debugfs_create_x32("storm_rate_uc", 0644, port_dir,
-+			(u32 *)(RTL838X_SW_BASE + priv->r->storm_ctrl_port_uc + (port << priv->r->storm_ctrl_port_uc_shift)));
- 
--		debugfs_create_x32("storm_rate_bc", 0644, port_dir,
--				(u32 *)(RTL838X_SW_BASE + RTL838X_STORM_CTRL_PORT_BC(port)));
-+	debugfs_create_x32("storm_rate_mc", 0644, port_dir,
-+			(u32 *)(RTL838X_SW_BASE + priv->r->storm_ctrl_port_mc + (port << priv->r->storm_ctrl_port_mc_shift)));
- 
--		debugfs_create_x32("vlan_port_tag_sts_ctrl", 0644, port_dir,
--				(u32 *)(RTL838X_SW_BASE + RTL838X_VLAN_PORT_TAG_STS_CTRL 
--				+ (port << 2)));
--	} else {
--		debugfs_create_x32("storm_rate_uc", 0644, port_dir,
--				(u32 *)(RTL838X_SW_BASE + RTL839X_STORM_CTRL_PORT_UC_0(port)));
-+	debugfs_create_x32("storm_rate_bc", 0644, port_dir,
-+			(u32 *)(RTL838X_SW_BASE + priv->r->storm_ctrl_port_bc + (port << priv->r->storm_ctrl_port_bc_shift)));
- 
--		debugfs_create_x32("storm_rate_mc", 0644, port_dir,
--				(u32 *)(RTL838X_SW_BASE + RTL839X_STORM_CTRL_PORT_MC_0(port)));
-+	debugfs_create_x32("vlan_port_tag_sts_ctrl", 0644, port_dir,
-+			(u32 *)(RTL838X_SW_BASE + priv->r->vlan_port_tag_sts_ctrl + (port << 2)));
- 
--		debugfs_create_x32("storm_rate_bc", 0644, port_dir,
--				(u32 *)(RTL838X_SW_BASE + RTL839X_STORM_CTRL_PORT_BC_0(port)));
- 
--		debugfs_create_x32("vlan_port_tag_sts_ctrl", 0644, port_dir,
--				(u32 *)(RTL838X_SW_BASE + RTL839X_VLAN_PORT_TAG_STS_CTRL
--				+ (port << 2)));
--	}
-+	debugfs_create_file("action_bpdu", 0600, port_dir, &priv->ports[port],&port_838x_action_bpdu_fops);
-+	debugfs_create_file("action_ptp", 0600, port_dir, &priv->ports[port],&port_838x_action_ptp_fops);
-+	debugfs_create_file("action_lltp", 0600, port_dir, &priv->ports[port],&port_838x_action_lltp_fops);
-+	if (priv->r->rma_lltp_ctrl)
-+		debugfs_create_file("action_eapol", 0600, port_dir, &priv->ports[port],&port_838x_action_eapol_fops);
- 
- 	debugfs_create_u32("id", 0444, port_dir, (u32 *)&priv->ports[port].dp->index);
- 
-@@ -268,7 +519,11 @@ static int rtl838x_dbgfs_port_init(struct dentry *parent, struct rtl838x_switch_
- 	if (!port_ctrl_regset)
- 		return -ENOMEM;
- 
--	port_ctrl_regset->regs = port_ctrl_regs;
-+	if (priv->family_id == RTL8380_FAMILY_ID)
-+		port_ctrl_regset->regs = port_ctrl_regs;
-+	else
-+		port_ctrl_regset->regs = port_ctrl_regs_839x;
-+
- 	port_ctrl_regset->nregs = ARRAY_SIZE(port_ctrl_regs);
- 	port_ctrl_regset->base = (void *)(RTL838X_SW_BASE + (port << 2));
- 	debugfs_create_regset32("port_ctrl", 0400, port_dir, port_ctrl_regset);
-@@ -362,7 +617,7 @@ void rtl838x_dbgfs_init(struct rtl838x_switch_priv *priv)
- 	struct dentry *mirror_dir;
- 	struct debugfs_regset32 *port_ctrl_regset;
- 	int ret, i;
--	char lag_name[10];
-+	char lag_name[32];
- 	char mirror_name[10];
- 
- 	pr_info("%s called\n", __func__);
-@@ -392,7 +647,11 @@ void rtl838x_dbgfs_init(struct rtl838x_switch_priv *priv)
- 		goto err;
- 	}
- 
--	port_ctrl_regset->regs = port_ctrl_regs;
-+	if (priv->family_id == RTL8380_FAMILY_ID)
-+		port_ctrl_regset->regs = port_ctrl_regs;
-+	else
-+		port_ctrl_regset->regs = port_ctrl_regs_839x;
-+
- 	port_ctrl_regset->nregs = ARRAY_SIZE(port_ctrl_regs);
- 	port_ctrl_regset->base = (void *)(RTL838X_SW_BASE + (priv->cpu_port << 2));
- 	debugfs_create_regset32("port_ctrl", 0400, port_dir, port_ctrl_regset);
-@@ -401,14 +660,22 @@ void rtl838x_dbgfs_init(struct rtl838x_switch_priv *priv)
- 	/* Create entries for LAGs */
- 	for (i = 0; i < priv->n_lags; i++) {
- 		snprintf(lag_name, sizeof(lag_name), "lag.%02d", i);
--		if (priv->family_id == RTL8380_FAMILY_ID)
--			debugfs_create_x32(lag_name, 0644, rtl838x_dir,
--				(u32 *)(RTL838X_SW_BASE + priv->r->trk_mbr_ctr(i)));
--		else
--			debugfs_create_x64(lag_name, 0644, rtl838x_dir,
--				(u64 *)(RTL838X_SW_BASE + priv->r->trk_mbr_ctr(i)));
-+		debugfs_create_x64(lag_name, 0644, rtl838x_dir, (u64 *)(RTL838X_SW_BASE + priv->r->trk_mbr_ctr(i)));
-+	}
-+	if (priv->r->trk_hash_ctrl) {
-+	for (i = 0; i < 4; i++) { 
-+		snprintf(lag_name, sizeof(lag_name), "lag.hash_algo.%02d", i);
-+		debugfs_create_x64(lag_name, 0644, rtl838x_dir, (u64 *)(RTL838X_SW_BASE + priv->r->trk_hash_ctrl + (i << 2)));
-+	}
-+	}
-+	if (priv->r->trk_hash_idx_ctrl) {
-+	for (i = 0; i < priv->n_lags; i++) { 
-+		if (priv->family_id == RTL8390_FAMILY_ID) {
-+			snprintf(lag_name, sizeof(lag_name), "lag.hash_algo_idx.%02d", i);
-+			debugfs_create_x64(lag_name, 0644, rtl838x_dir, (u64 *)(RTL838X_SW_BASE + priv->r->trk_hash_idx_ctrl + ((i >> 4) << 2)));
-+		}
-+	}
- 	}
--
- 	/* Create directories for mirror groups */
- 	for (i = 0; i < 4; i++) {
- 		snprintf(mirror_name, sizeof(mirror_name), "mirror.%1d", i);
-@@ -452,25 +719,58 @@ void rtl838x_dbgfs_init(struct rtl838x_switch_priv *priv)
- 		}
- 	}
- 
--	if (priv->family_id == RTL8380_FAMILY_ID)
--		debugfs_create_x32("bpdu_flood_mask", 0644, rtl838x_dir,
--				(u32 *)(RTL838X_SW_BASE + priv->r->rma_bpdu_fld_pmask));
--	else
--		debugfs_create_x64("bpdu_flood_mask", 0644, rtl838x_dir,
--				(u64 *)(RTL838X_SW_BASE + priv->r->rma_bpdu_fld_pmask));
--
--	if (priv->family_id == RTL8380_FAMILY_ID)
--		debugfs_create_x32("vlan_ctrl", 0644, rtl838x_dir,
--				(u32 *)(RTL838X_SW_BASE + RTL838X_VLAN_CTRL));
--	else
--		debugfs_create_x32("vlan_ctrl", 0644, rtl838x_dir,
--				(u32 *)(RTL838X_SW_BASE + RTL839X_VLAN_CTRL));
-+	debugfs_create_x32("bpdu_flood_mask", 0644, rtl838x_dir,
-+			(u32 *)(RTL838X_SW_BASE + priv->r->rma_bpdu_fld_pmask));
-+	debugfs_create_x32("vlan_ctrl", 0644, rtl838x_dir,
-+			(u32 *)(RTL838X_SW_BASE + priv->r->vlan_ctrl));
-+	debugfs_create_x32("sflow_ctrl", 0644, rtl838x_dir,
-+			(u32 *)(RTL838X_SW_BASE + priv->r->sflow_ctrl));
-+	if (priv->r->spcl_trap_eapol_ctrl)
-+		debugfs_create_x32("trap_eapol", 0644, rtl838x_dir,
-+				(u32 *)(RTL838X_SW_BASE + priv->r->spcl_trap_eapol_ctrl));
-+	if (priv->r->spcl_trap_arp_ctrl)
-+		debugfs_create_x32("trap_arp", 0644, rtl838x_dir,
-+				(u32 *)(RTL838X_SW_BASE + priv->r->spcl_trap_arp_ctrl));
-+	if (priv->r->spcl_trap_igmp_ctrl)
-+		debugfs_create_x32("trap_igmp", 0644, rtl838x_dir,
-+				(u32 *)(RTL838X_SW_BASE + priv->r->spcl_trap_igmp_ctrl));
-+	if (priv->r->spcl_trap_ipv6_ctrl)
-+		debugfs_create_x32("trap_ipv6", 0644, rtl838x_dir,
-+				(u32 *)(RTL838X_SW_BASE + priv->r->spcl_trap_ipv6_ctrl));
-+	if (priv->r->spcl_trap_switch_mac_ctrl)
-+		debugfs_create_x32("trap_switch_mac", 0644, rtl838x_dir,
-+				(u32 *)(RTL838X_SW_BASE + priv->r->spcl_trap_switch_mac_ctrl));
-+	if (priv->r->spcl_trap_switch_ipv4_addr_ctrl)
-+		debugfs_create_x32("trap_switch_ipv4_addr", 0644, rtl838x_dir,
-+				(u32 *)(RTL838X_SW_BASE + priv->r->spcl_trap_switch_ipv4_addr_ctrl));
-+	if (priv->r->spcl_trap_crc_ctrl)
-+		debugfs_create_x32("trap_crc", 0644, rtl838x_dir,
-+				(u32 *)(RTL838X_SW_BASE + priv->r->spcl_trap_crc_ctrl));
-+	if (priv->r->spcl_trap_ctrl)
-+		debugfs_create_x32("trap", 0644, rtl838x_dir,
-+				(u32 *)(RTL838X_SW_BASE + priv->r->spcl_trap_ctrl));
- 
- 	ret = rtl838x_dbgfs_leds(rtl838x_dir, priv);
- 	if (ret)
- 		goto err;
- 
-+	debugfs_create_file("drop_counters", 0400, rtl838x_dir, priv, &drop_counter_fops);
-+
- 	return;
- err:
- 	rtl838x_dbgfs_cleanup(priv);
- }
-+
-+void rtl930x_dbgfs_init(struct rtl838x_switch_priv *priv)
-+{
-+	struct dentry *dbg_dir;
-+
-+	pr_info("%s called\n", __func__);
-+	dbg_dir = debugfs_lookup(RTL838X_DRIVER_NAME, NULL);
-+	if (!dbg_dir)
-+		dbg_dir = debugfs_create_dir(RTL838X_DRIVER_NAME, NULL);
-+
-+	priv->dbgfs_dir = dbg_dir;
-+
-+	debugfs_create_file("drop_counters", 0400, dbg_dir, priv, &drop_counter_fops);
-+}
-diff --git a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/dsa.c b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/dsa.c
-index 987b47dc8f..a17208b72b 100644
---- a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/dsa.c
-+++ b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/dsa.c
-@@ -1,4 +1,3 @@
--// SPDX-License-Identifier: GPL-2.0-only
- 
- #include <net/dsa.h>
- #include <linux/if_bridge.h>
-@@ -6,7 +5,8 @@
- #include <asm/mach-rtl838x/mach-rtl83xx.h>
- #include "rtl83xx.h"
- 
--
-+extern int rtl930x_read_sds_phy(int phy_addr, int page, int phy_reg);
-+extern int rtl930x_write_sds_phy(int phy_addr, int page, int phy_reg, u16 v);
- extern struct rtl83xx_soc_info soc_info;
- 
- 
-@@ -26,50 +26,6 @@ static void rtl83xx_init_stats(struct rtl838x_switch_priv *priv)
- 	mutex_unlock(&priv->reg_mutex);
- }
- 
--static void rtl83xx_write_cam(int idx, u32 *r)
--{
--	u32 cmd = BIT(16) /* Execute cmd */
--		| BIT(15) /* Read */
--		| BIT(13) /* Table type 0b01 */
--		| (idx & 0x3f);
--
--	sw_w32(r[0], RTL838X_TBL_ACCESS_L2_DATA(0));
--	sw_w32(r[1], RTL838X_TBL_ACCESS_L2_DATA(1));
--	sw_w32(r[2], RTL838X_TBL_ACCESS_L2_DATA(2));
--
--	sw_w32(cmd, RTL838X_TBL_ACCESS_L2_CTRL);
--	do { }  while (sw_r32(RTL838X_TBL_ACCESS_L2_CTRL) & BIT(16));
--}
--
--static u64 rtl83xx_hash_key(struct rtl838x_switch_priv *priv, u64 mac, u32 vid)
--{
--	switch (priv->family_id) {
--	case RTL8380_FAMILY_ID:
--		return rtl838x_hash(priv, mac << 12 | vid);
--	case RTL8390_FAMILY_ID:
--		return rtl839x_hash(priv, mac << 12 | vid);
--	case RTL9300_FAMILY_ID:
--		return rtl930x_hash(priv, ((u64)vid) << 48 | mac);
--	default:
--		pr_err("Hash not implemented\n");
--	}
--	return 0;
--}
--
--static void rtl83xx_write_hash(int idx, u32 *r)
--{
--	u32 cmd = BIT(16) /* Execute cmd */
--		| 0 << 15 /* Write */
--		| 0 << 13 /* Table type 0b00 */
--		| (idx & 0x1fff);
--
--	sw_w32(0, RTL838X_TBL_ACCESS_L2_DATA(0));
--	sw_w32(0, RTL838X_TBL_ACCESS_L2_DATA(1));
--	sw_w32(0, RTL838X_TBL_ACCESS_L2_DATA(2));
--	sw_w32(cmd, RTL838X_TBL_ACCESS_L2_CTRL);
--	do { }  while (sw_r32(RTL838X_TBL_ACCESS_L2_CTRL) & BIT(16));
--}
--
- static void rtl83xx_enable_phy_polling(struct rtl838x_switch_priv *priv)
- {
- 	int i;
-@@ -79,7 +35,7 @@ static void rtl83xx_enable_phy_polling(struct rtl838x_switch_priv *priv)
- 	/* Enable all ports with a PHY, including the SFP-ports */
- 	for (i = 0; i < priv->cpu_port; i++) {
- 		if (priv->ports[i].phy)
--			v |= BIT(i);
-+			v |= BIT_ULL(i);
- 	}
- 
- 	pr_debug("%s: %16llx\n", __func__, v);
-@@ -150,7 +106,48 @@ static enum dsa_tag_protocol rtl83xx_get_tag_protocol(struct dsa_switch *ds, int
- 	/* The switch does not tag the frames, instead internally the header
- 	 * structure for each packet is tagged accordingly.
- 	 */
--	return DSA_TAG_PROTO_TRAILER;
-+	return DSA_TAG_PROTO_RTL83XX;
-+}
-+
-+/*
-+ * Initialize all VLANS
-+ */
-+static void rtl83xx_vlan_setup(struct rtl838x_switch_priv *priv)
-+{
-+	struct rtl838x_vlan_info info;
-+	int i;
-+
-+	pr_debug("In %s\n", __func__);
-+
-+	priv->r->vlan_profile_setup(0);
-+	priv->r->vlan_profile_setup(1);
-+	pr_info("UNKNOWN_MC_PMASK: %016llx\n", priv->r->read_mcast_pmask(UNKNOWN_MC_PMASK));
-+	priv->r->vlan_profile_dump(0);
-+
-+	info.fid = 0;			// Default Forwarding ID / MSTI
-+	info.hash_uc_fid = false;	// Do not build the L2 lookup hash with FID, but VID
-+	info.hash_mc_fid = false;	// Do the same for Multicast packets
-+	info.profile_id = 0;		// Use default Vlan Profile 0
-+	info.tagged_ports = 0;		// Initially no port members
-+
-+	// Initialize all vlans 0-4095
-+	for (i = 0; i < MAX_VLANS; i ++)
-+		priv->r->vlan_set_tagged(i, &info);
-+
-+	// reset PVIDs; defaults to 1 on reset
-+	for (i = 0; i <= priv->ds->num_ports; i++)
-+		sw_w32(0, priv->r->vlan_port_pb + (i << 2));
-+
-+	// Set forwarding action based on inner VLAN tag
-+	for (i = 0; i < priv->cpu_port; i++)
-+		priv->r->vlan_fwd_on_inner(i, true);
-+}
-+
-+static void rtl83xx_setup_bpdu_traps(struct rtl838x_switch_priv *priv)
-+{
-+	int i;
-+	for (i = 0; i < priv->cpu_port; i++)
-+		priv->r->set_receive_management_action(i, BPDU, TRAP2CPU);
- }
- 
- static int rtl83xx_setup(struct dsa_switch *ds)
-@@ -174,7 +171,7 @@ static int rtl83xx_setup(struct dsa_switch *ds)
- 	 */
- 	for (i = 0; i < priv->cpu_port; i++) {
- 		if (priv->ports[i].phy) {
--			priv->r->set_port_reg_be(BIT_ULL(priv->cpu_port) | BIT(i),
-+			priv->r->set_port_reg_be(BIT_ULL(priv->cpu_port) | BIT_ULL(i),
- 					      priv->r->port_iso_ctrl(i));
- 			port_bitmap |= BIT_ULL(i);
- 		}
-@@ -188,12 +185,21 @@ static int rtl83xx_setup(struct dsa_switch *ds)
- 
- 	rtl83xx_init_stats(priv);
- 
-+	rtl83xx_vlan_setup(priv);
-+
-+	rtl83xx_setup_bpdu_traps(priv);
-+
- 	ds->configure_vlan_while_not_filtering = true;
- 
-+	priv->r->l2_learning_setup();
-+
- 	/* Enable MAC Polling PHY again */
- 	rtl83xx_enable_phy_polling(priv);
- 	pr_debug("Please wait until PHY is settled\n");
- 	msleep(1000);
-+
-+	priv->r->pie_init(priv);
-+
- 	return 0;
- }
- 
-@@ -203,7 +209,7 @@ static int rtl930x_setup(struct dsa_switch *ds)
- 	struct rtl838x_switch_priv *priv = ds->priv;
- 	u32 port_bitmap = BIT(priv->cpu_port);
- 
--	pr_info("%s called\n", __func__);
-+	pr_debug("%s called\n", __func__);
- 
- 	// Enable CSTI STP mode
- //	sw_w32(1, RTL930X_ST_CTRL);
-@@ -218,8 +224,8 @@ static int rtl930x_setup(struct dsa_switch *ds)
- 
- 	for (i = 0; i < priv->cpu_port; i++) {
- 		if (priv->ports[i].phy) {
--			priv->r->traffic_set(i, BIT(priv->cpu_port) | BIT(i));
--			port_bitmap |= 1ULL << i;
-+			priv->r->traffic_set(i, BIT_ULL(priv->cpu_port) | BIT_ULL(i));
-+			port_bitmap |= BIT_ULL(i);
- 		}
- 	}
- 	priv->r->traffic_set(priv->cpu_port, port_bitmap);
-@@ -228,10 +234,14 @@ static int rtl930x_setup(struct dsa_switch *ds)
- 
- 	// TODO: Initialize statistics
- 
-+	rtl83xx_vlan_setup(priv);
-+
- 	ds->configure_vlan_while_not_filtering = true;
- 
- 	rtl83xx_enable_phy_polling(priv);
- 
-+	priv->r->pie_init(priv);
-+
- 	return 0;
- }
- 
-@@ -242,7 +252,7 @@ static void rtl83xx_phylink_validate(struct dsa_switch *ds, int port,
- 	struct rtl838x_switch_priv *priv = ds->priv;
- 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
- 
--	pr_debug("In %s port %d", __func__, port);
-+	pr_debug("In %s port %d, state is %d", __func__, port, state->interface);
- 
- 	if (!phy_interface_mode_is_rgmii(state->interface) &&
- 	    state->interface != PHY_INTERFACE_MODE_NA &&
-@@ -279,6 +289,68 @@ static void rtl83xx_phylink_validate(struct dsa_switch *ds, int port,
- 	if (port >= 24 && port <= 27 && priv->family_id == RTL8380_FAMILY_ID)
- 		phylink_set(mask, 1000baseX_Full);
- 
-+	/* On the RTL839x family of SoCs, ports 48 to 51 are SFP ports */
-+	if (port >= 48 && port <= 51 && priv->family_id == RTL8390_FAMILY_ID)
-+		phylink_set(mask, 1000baseX_Full);
-+
-+	phylink_set(mask, 10baseT_Half);
-+	phylink_set(mask, 10baseT_Full);
-+	phylink_set(mask, 100baseT_Half);
-+	phylink_set(mask, 100baseT_Full);
-+
-+	bitmap_and(supported, supported, mask,
-+		   __ETHTOOL_LINK_MODE_MASK_NBITS);
-+	bitmap_and(state->advertising, state->advertising, mask,
-+		   __ETHTOOL_LINK_MODE_MASK_NBITS);
-+}
-+
-+static void rtl93xx_phylink_validate(struct dsa_switch *ds, int port,
-+				     unsigned long *supported,
-+				     struct phylink_link_state *state)
-+{
-+	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
-+
-+	pr_info("In %s port %d, state is %d (%s)", __func__, port, state->interface,
-+		phy_modes(state->interface));
-+
-+	if (!phy_interface_mode_is_rgmii(state->interface) &&
-+	    state->interface != PHY_INTERFACE_MODE_NA &&
-+	    state->interface != PHY_INTERFACE_MODE_1000BASEX &&
-+	    state->interface != PHY_INTERFACE_MODE_MII &&
-+	    state->interface != PHY_INTERFACE_MODE_REVMII &&
-+	    state->interface != PHY_INTERFACE_MODE_GMII &&
-+	    state->interface != PHY_INTERFACE_MODE_QSGMII &&
-+	    state->interface != PHY_INTERFACE_MODE_XGMII &&
-+	    state->interface != PHY_INTERFACE_MODE_HSGMII &&
-+	    state->interface != PHY_INTERFACE_MODE_10GKR &&
-+	    state->interface != PHY_INTERFACE_MODE_INTERNAL &&
-+	    state->interface != PHY_INTERFACE_MODE_SGMII) {
-+		bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
-+		dev_err(ds->dev,
-+			"Unsupported interface: %d for port %d\n",
-+			state->interface, port);
-+		return;
-+	}
-+
-+	/* Allow all the expected bits */
-+	phylink_set(mask, Autoneg);
-+	phylink_set_port_modes(mask);
-+	phylink_set(mask, Pause);
-+	phylink_set(mask, Asym_Pause);
-+
-+	/* With the exclusion of MII and Reverse MII, we support Gigabit,
-+	 * including Half duplex
-+	 */
-+	if (state->interface != PHY_INTERFACE_MODE_MII &&
-+	    state->interface != PHY_INTERFACE_MODE_REVMII) {
-+		phylink_set(mask, 1000baseT_Full);
-+		phylink_set(mask, 1000baseT_Half);
-+	}
-+
-+	/* On the RTL9300 family of SoCs, ports 26 to 27 may be SFP ports TODO: take out of .dts */
-+	if (port >= 26 && port <= 27)
-+		phylink_set(mask, 1000baseX_Full);
-+
- 	phylink_set(mask, 10baseT_Half);
- 	phylink_set(mask, 10baseT_Full);
- 	phylink_set(mask, 100baseT_Half);
-@@ -300,18 +372,11 @@ static int rtl83xx_phylink_mac_link_state(struct dsa_switch *ds, int port,
- 	if (port < 0 || port > priv->cpu_port)
- 		return -EINVAL;
- 
--	/*
--	 * On the RTL9300 for at least the RTL8226B PHY, the MAC-side link
--	 * state needs to be read twice in order to read a correct result.
--	 * This would not be necessary for ports connected e.g. to RTL8218D
--	 * PHYs.
--	 */
- 	state->link = 0;
- 	link = priv->r->get_port_reg_le(priv->r->mac_link_sts);
--	link = priv->r->get_port_reg_le(priv->r->mac_link_sts);
- 	if (link & BIT_ULL(port))
- 		state->link = 1;
--	pr_debug("%s: link state: %llx\n", __func__, link & BIT_ULL(port));
-+	pr_debug("%s: link state port %d: %llx\n", __func__, port, link & BIT_ULL(port));
- 
- 	state->duplex = 0;
- 	if (priv->r->get_port_reg_le(priv->r->mac_link_dup_sts) & BIT_ULL(port))
-@@ -330,7 +395,8 @@ static int rtl83xx_phylink_mac_link_state(struct dsa_switch *ds, int port,
- 		state->speed = SPEED_1000;
- 		break;
- 	case 3:
--		if (port == 24 || port == 26) /* Internal serdes */
-+		if (priv->family_id == RTL9300_FAMILY_ID
-+			&& (port == 24 || port == 26)) /* Internal serdes */
- 			state->speed = SPEED_2500;
- 		else
- 			state->speed = SPEED_100; /* Is in fact 500Mbit */
-@@ -344,6 +410,69 @@ static int rtl83xx_phylink_mac_link_state(struct dsa_switch *ds, int port,
- 	return 1;
- }
- 
-+static int rtl93xx_phylink_mac_link_state(struct dsa_switch *ds, int port,
-+					  struct phylink_link_state *state)
-+{
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	u64 speed;
-+	u64 link;
-+
-+	if (port < 0 || port > priv->cpu_port)
-+		return -EINVAL;
-+
-+	/*
-+	 * On the RTL9300 for at least the RTL8226B PHY, the MAC-side link
-+	 * state needs to be read twice in order to read a correct result.
-+	 * This would not be necessary for ports connected e.g. to RTL8218D
-+	 * PHYs.
-+	 */
-+	state->link = 0;
-+	link = priv->r->get_port_reg_le(priv->r->mac_link_sts);
-+	link = priv->r->get_port_reg_le(priv->r->mac_link_sts);
-+	if (link & BIT_ULL(port))
-+		state->link = 1;
-+	pr_info("%s: link state port %d: %llx, media %08x\n", __func__, port,
-+		link & BIT_ULL(port), sw_r32(RTL930X_MAC_LINK_MEDIA_STS));
-+
-+	state->duplex = 0;
-+	if (priv->r->get_port_reg_le(priv->r->mac_link_dup_sts) & BIT_ULL(port))
-+		state->duplex = 1;
-+
-+	speed = priv->r->get_port_reg_le(priv->r->mac_link_spd_sts(port));
-+	speed >>= (port % 8) << 2;
-+	switch (speed & 0xf) {
-+	case 0:
-+		state->speed = SPEED_10;
-+		break;
-+	case 1:
-+		state->speed = SPEED_100;
-+		break;
-+	case 2:
-+	case 7:
-+		state->speed = SPEED_1000;
-+		break;
-+	case 4:
-+		state->speed = SPEED_10000;
-+		break;
-+	case 5:
-+	case 8:
-+		state->speed = SPEED_2500;
-+		break;
-+	case 6:
-+		state->speed = SPEED_5000;
-+		break;
-+	default:
-+		pr_err("%s: unknown speed: %d\n", __func__, (u32)speed & 0xf);
-+	}
-+
-+	pr_info("%s: speed is: %d %d\n", __func__, (u32)speed & 0xf, state->speed);
-+	state->pause &= (MLO_PAUSE_RX | MLO_PAUSE_TX);
-+	if (priv->r->get_port_reg_le(priv->r->mac_rx_pause_sts) & BIT_ULL(port))
-+		state->pause |= MLO_PAUSE_RX;
-+	if (priv->r->get_port_reg_le(priv->r->mac_tx_pause_sts) & BIT_ULL(port))
-+		state->pause |= MLO_PAUSE_TX;
-+	return 1;
-+}
- 
- static void rtl83xx_config_interface(int port, phy_interface_t interface)
- {
-@@ -389,12 +518,10 @@ static void rtl83xx_phylink_mac_config(struct dsa_switch *ds, int port,
- 	struct rtl838x_switch_priv *priv = ds->priv;
- 	u32 reg;
- 	int speed_bit = priv->family_id == RTL8380_FAMILY_ID ? 4 : 3;
-+//	int force_fc = priv->family_id == RTL8380_FAMILY_ID ? RTL838X_MAC_FORCE_FC_EN : RTL839X_MAC_FORCE_FC_EN;
- 
--	pr_debug("%s port %d, mode %x\n", __func__, port, mode);
--
--	// BUG: Make this work on RTL93XX
--	if (priv->family_id >= RTL9300_FAMILY_ID)
--		return;
-+	pr_info("%s port %d, mode %x, phy-mode: %s, speed %d, link %d\n", __func__,
-+		port, mode, phy_modes(state->interface), state->speed, state->link);
- 
- 	if (port == priv->cpu_port) {
- 		/* Set Speed, duplex, flow control
-@@ -417,7 +544,7 @@ static void rtl83xx_phylink_mac_config(struct dsa_switch *ds, int port,
- 	if (priv->family_id == RTL8380_FAMILY_ID) {
- 		if (mode == MLO_AN_PHY || phylink_autoneg_inband(mode)) {
- 			pr_debug("PHY autonegotiates\n");
--			reg |= BIT(2);
-+			reg |= RTL830X_NWAY_EN;
- 			sw_w32(reg, priv->r->mac_force_mode_ctrl(port));
- 			rtl83xx_config_interface(port, state->interface);
- 			return;
-@@ -427,20 +554,46 @@ static void rtl83xx_phylink_mac_config(struct dsa_switch *ds, int port,
- 	if (mode != MLO_AN_FIXED)
- 		pr_debug("Fixed state.\n");
- 
--	if (priv->family_id == RTL8380_FAMILY_ID) {
--		/* Clear id_mode_dis bit, and the existing port mode, let
--		 * RGMII_MODE_EN bet set by mac_link_{up,down}
--		 */
--		reg &= ~(RX_PAUSE_EN | TX_PAUSE_EN);
--
-+	/* Clear id_mode_dis bit, and the existing port mode, let
-+	 * RGMII_MODE_EN bet set by mac_link_{up,down}
-+	 */
-+	switch(priv->family_id)
-+	{
-+	case RTL8380_FAMILY_ID:
-+		reg &= ~(RTL830X_RX_PAUSE_EN | RTL830X_TX_PAUSE_EN);
- 		if (state->pause & MLO_PAUSE_TXRX_MASK) {
- 			if (state->pause & MLO_PAUSE_TX)
--				reg |= TX_PAUSE_EN;
--			reg |= RX_PAUSE_EN;
-+				reg |= RTL830X_TX_PAUSE_EN;
-+			reg |= RTL830X_RX_PAUSE_EN;
- 		}
-+	break;
-+	case RTL8390_FAMILY_ID:
-+		reg &= ~(RTL839X_RX_PAUSE_EN | RTL839X_TX_PAUSE_EN);
-+		if (state->pause & MLO_PAUSE_TXRX_MASK) {
-+			if (state->pause & MLO_PAUSE_TX)
-+				reg |= RTL839X_TX_PAUSE_EN;
-+			reg |= RTL839X_RX_PAUSE_EN;
-+		}
-+	break;
-+	case RTL9300_FAMILY_ID:
-+		reg &= ~(RTL930X_RX_PAUSE_EN | RTL930X_TX_PAUSE_EN);
-+		if (state->pause & MLO_PAUSE_TXRX_MASK) {
-+			if (state->pause & MLO_PAUSE_TX)
-+				reg |= RTL930X_TX_PAUSE_EN;
-+			reg |= RTL930X_RX_PAUSE_EN;
-+		}
-+	break;
-+	case RTL9310_FAMILY_ID:
-+		reg &= ~(RTL931X_RX_PAUSE_EN | RTL931X_TX_PAUSE_EN);
-+		if (state->pause & MLO_PAUSE_TXRX_MASK) {
-+			if (state->pause & MLO_PAUSE_TX)
-+				reg |= RTL931X_TX_PAUSE_EN;
-+			reg |= RTL931X_RX_PAUSE_EN;
-+		}
-+	break;
- 	}
--
- 	reg &= ~(3 << speed_bit);
-+//	reg &= ~(1 << force_fc);
- 	switch (state->speed) {
- 	case SPEED_1000:
- 		reg |= 2 << speed_bit;
-@@ -448,29 +601,191 @@ static void rtl83xx_phylink_mac_config(struct dsa_switch *ds, int port,
- 	case SPEED_100:
- 		reg |= 1 << speed_bit;
- 		break;
-+	case SPEED_10:
-+		reg = 0;
-+		break;
-+	case SPEED_2500:
-+		reg = 5 << speed_bit;
-+		break;
-+	case SPEED_5000:
-+		reg = 6 << speed_bit;
-+		break;
-+	case SPEED_10000:
-+		reg = 4 << speed_bit;
-+	}
-+	switch(priv->family_id)
-+	{
-+	case RTL8380_FAMILY_ID:
-+		reg &= ~(RTL830X_DUPLEX_MODE | RTL830X_FORCE_LINK_EN);
-+	break;
-+	case RTL8390_FAMILY_ID:
-+		reg &= ~(RTL839X_DUPLEX_MODE | RTL839X_FORCE_LINK_EN);
-+	break;
-+	case RTL9300_FAMILY_ID:
-+		reg &= ~(RTL930X_DUPLEX_MODE | RTL930X_FORCE_LINK_EN);
-+	break;
-+	case RTL9310_FAMILY_ID:
-+		reg &= ~(RTL931X_DUPLEX_MODE | RTL931X_FORCE_LINK_EN);
-+	break;
-+	}
-+	if (priv->lagmembers & (1ULL << port)) {
-+		switch(priv->family_id)
-+		{
-+		case RTL8380_FAMILY_ID:
-+			reg |= (RTL830X_DUPLEX_MODE | RTL830X_FORCE_LINK_EN);
-+		break;
-+		case RTL8390_FAMILY_ID:
-+			reg |= (RTL839X_DUPLEX_MODE | RTL839X_FORCE_LINK_EN);
-+		break;
-+		case RTL9300_FAMILY_ID:
-+			reg |= (RTL930X_DUPLEX_MODE | RTL930X_FORCE_LINK_EN);
-+		break;
-+		case RTL9310_FAMILY_ID:
-+			reg |= (RTL931X_DUPLEX_MODE | RTL931X_FORCE_LINK_EN);
-+		break;
-+		}
- 	}
- 
--	if (priv->family_id == RTL8380_FAMILY_ID) {
--		reg &= ~(DUPLEX_FULL | FORCE_LINK_EN);
-+	switch(priv->family_id)
-+	{
-+	case RTL8380_FAMILY_ID:
-+		if (state->link)
-+			reg |= RTL830X_FORCE_LINK_EN;
-+		if (state->duplex == DUPLEX_FULL)
-+			reg |= RTL830X_DUPLEX_MODE;
-+	break;
-+	case RTL8390_FAMILY_ID:
-+		if (state->link)
-+			reg |= RTL839X_FORCE_LINK_EN;
-+		if (state->duplex == DUPLEX_FULL)
-+			reg |= RTL839X_DUPLEX_MODE;
-+	break;
-+	case RTL9300_FAMILY_ID:
-+		if (state->link)
-+			reg |= RTL930X_FORCE_LINK_EN;
-+		if (state->duplex == DUPLEX_FULL)
-+			reg |= RTL930X_DUPLEX_MODE;
-+	break;
-+	case RTL9310_FAMILY_ID:
- 		if (state->link)
--			reg |= FORCE_LINK_EN;
-+			reg |= RTL931X_FORCE_LINK_EN;
- 		if (state->duplex == DUPLEX_FULL)
--			reg |= DUPLX_MODE;
-+			reg |= RTL931X_DUPLEX_MODE;
-+	break;
- 	}
--
- 	// Disable AN
- 	if (priv->family_id == RTL8380_FAMILY_ID)
--		reg &= ~BIT(2);
-+		reg &= ~RTL830X_NWAY_EN;
-+	sw_w32(reg, priv->r->mac_force_mode_ctrl(port));
-+}
-+
-+static void rtl93xx_phylink_mac_config(struct dsa_switch *ds, int port,
-+					unsigned int mode,
-+					const struct phylink_link_state *state)
-+{
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	int sds_num, sds_mode;
-+	u32 reg, v;
-+	u32 *p1 = 0xb8003308, *p2 = 0xb800330c;
-+
-+	pr_info("%s port %d, mode %x, phy-mode: %s, speed %d, link %d\n", __func__,
-+		port, mode, phy_modes(state->interface), state->speed, state->link);
-+	pr_info("%s: %08x %08x\n", __func__, *p1, *p2);
-+	*p1 |= BIT(15);
-+	*p2 &= ~BIT(15);
-+
-+	// BUG: Make this work on RTL93XX
-+	if (priv->family_id >= RTL9310_FAMILY_ID)
-+		return;
-+
-+	// Nothing to be done for the CPU-port
-+	if (port == priv->cpu_port)
-+		return;
-+
-+	// On the RTL930X, ports 24 to 27 are using an internal SerDes
-+	if (port >=24 && port <= 27) {
-+		sds_num = port - 18; // Port 24 mapped to SerDes 6, 25 to 7 ...
-+		switch (state->interface) {
-+		case PHY_INTERFACE_MODE_HSGMII:
-+			sds_mode = 0x12;
-+			break;
-+		case PHY_INTERFACE_MODE_1000BASEX:
-+			sds_mode = 0x04;
-+			break;
-+		case PHY_INTERFACE_MODE_XGMII:
-+			sds_mode = 0x10;
-+			break;
-+		case PHY_INTERFACE_MODE_10GKR:
-+			sds_mode = 0x1b;
-+			break;
-+		case PHY_INTERFACE_MODE_USXGMII:
-+			sds_mode = 0x0d;
-+			break;
-+		default:
-+			pr_err("%s: unknown serdes mode: %s\n",
-+			       __func__, phy_modes(state->interface));
-+			return;
-+		}
-+		rtl9300_sds_rst(sds_num, sds_mode);
-+	}
-+
-+	reg = sw_r32(priv->r->mac_force_mode_ctrl(port));
-+	reg &= ~(0xf << 3);
-+	switch (state->speed) {
-+	case SPEED_10000:
-+		reg |= 4 << 3;
-+		break;
-+	case SPEED_2500:
-+		reg |= 5 << 3;
-+		break;
-+	case SPEED_5000:
-+		reg = 6 << 3;
-+		break;
-+	case SPEED_1000:
-+		pr_info("Setting PHY speed to 1000M\n");
-+		// BUG: SDS-num is hard-coded!
-+		v = rtl930x_read_sds_phy(8, 2, 0);
-+		v &= ~(BIT(6) | BIT(13));
-+		v |= BIT(6);
-+		rtl930x_write_sds_phy(8, 2, 0, v);
-+
-+		reg |= 2 << 3;
-+		break;
-+	default:
-+		reg |= 2 << 3;
-+		break;
-+	}
-+
-+	if (state->link)
-+		reg |= RTL930X_FORCE_LINK_EN;
-+
-+	if (state->duplex == DUPLEX_FULL)
-+			reg |= RTL930X_DUPLEX_MODE;
-+
-+	reg |= 1; // Force Link up
- 	sw_w32(reg, priv->r->mac_force_mode_ctrl(port));
- }
- 
- static void rtl83xx_phylink_mac_link_down(struct dsa_switch *ds, int port,
- 				     unsigned int mode,
- 				     phy_interface_t interface)
-+{
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	/* Stop TX/RX to port */
-+	pr_debug("%s: port %d down\n", __func__, port);
-+	sw_w32_mask(0x3, 0, priv->r->mac_port_ctrl(port));
-+}
-+
-+static void rtl93xx_phylink_mac_link_down(struct dsa_switch *ds, int port,
-+				     unsigned int mode,
-+				     phy_interface_t interface)
- {
- 	struct rtl838x_switch_priv *priv = ds->priv;
- 	/* Stop TX/RX to port */
- 	sw_w32_mask(0x3, 0, priv->r->mac_port_ctrl(port));
-+
-+	// No longer force link
-+	sw_w32_mask(3, 0, priv->r->mac_force_mode_ctrl(port));
- }
- 
- static void rtl83xx_phylink_mac_link_up(struct dsa_switch *ds, int port,
-@@ -479,6 +794,18 @@ static void rtl83xx_phylink_mac_link_up(struct dsa_switch *ds, int port,
- 				   struct phy_device *phydev)
- {
- 	struct rtl838x_switch_priv *priv = ds->priv;
-+
-+	/* Restart TX/RX to port */
-+	sw_w32_mask(0, 0x3, priv->r->mac_port_ctrl(port));
-+}
-+
-+static void rtl93xx_phylink_mac_link_up(struct dsa_switch *ds, int port,
-+				   unsigned int mode,
-+				   phy_interface_t interface,
-+				   struct phy_device *phydev)
-+{
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+
- 	/* Restart TX/RX to port */
- 	sw_w32_mask(0, 0x3, priv->r->mac_port_ctrl(port));
- }
-@@ -523,13 +850,40 @@ static int rtl83xx_get_sset_count(struct dsa_switch *ds, int port, int sset)
- 	return ARRAY_SIZE(rtl83xx_mib);
- }
- 
--static int rtl83xx_port_enable(struct dsa_switch *ds, int port,
--				struct phy_device *phydev)
-+static u64 rtl83xx_mc_group_del_port(struct rtl838x_switch_priv *priv, int mc_group, int port);
-+static u64 rtl83xx_mc_group_add_port(struct rtl838x_switch_priv *priv, int mc_group, int port);
-+
-+static void store_mcgroups(struct rtl838x_switch_priv *priv, int port)
- {
--	struct rtl838x_switch_priv *priv = ds->priv;
-+	int mc_group;
-+	for (mc_group = 0; mc_group < MAX_MC_GROUPS; mc_group++) {
-+		u64 portmask = priv->r->read_mcast_pmask(mc_group);
-+		if (portmask & BIT_ULL(port)) {
-+			priv->mc_group_saves[mc_group] = port;
-+			rtl83xx_mc_group_del_port(priv, mc_group, port);
-+		}
-+	}
-+}
-+static void load_mcgroups(struct rtl838x_switch_priv *priv, int port)
-+{
-+	int mc_group;
-+	for (mc_group = 0; mc_group < MAX_MC_GROUPS; mc_group++) {
-+		if (priv->mc_group_saves[mc_group] == port) {
-+			rtl83xx_mc_group_add_port(priv, mc_group, port);
-+			priv->mc_group_saves[mc_group] = -1;
-+		}
-+	}
-+}
-+
-+static int rtl83xx_port_enable(struct dsa_switch *ds, int port,
-+				struct phy_device *phydev)
-+{
-+	struct rtl838x_switch_priv *priv = ds->priv;
- 	u64 v;
- 
- 	pr_debug("%s: %x %d", __func__, (u32) priv, port);
-+
-+
- 	priv->ports[port].enable = true;
- 
- 	/* enable inner tagging on egress, do not keep any tags */
-@@ -541,20 +895,31 @@ static int rtl83xx_port_enable(struct dsa_switch *ds, int port,
- 	if (dsa_is_cpu_port(ds, port))
- 		return 0;
- 
-+
- 	/* add port to switch mask of CPU_PORT */
- 	priv->r->traffic_enable(priv->cpu_port, port);
--
-+	load_mcgroups(priv, port);
-+	
-+	if (priv->is_lagmember[port]) {
-+		pr_info("%s: %d is lag slave. ignore\n", __func__, port);
-+		return 0;
-+	}
- 	/* add all other ports in the same bridge to switch mask of port */
- 	v = priv->r->traffic_get(port);
- 	v |= priv->ports[port].pm;
- 	priv->r->traffic_set(port, v);
- 
--	sw_w32_mask(0, BIT(port), RTL930X_L2_PORT_SABLK_CTRL);
--	sw_w32_mask(0, BIT(port), RTL930X_L2_PORT_DABLK_CTRL);
-+
-+	// TODO: Figure out if this is necessary
-+	if (priv->family_id == RTL9300_FAMILY_ID) {
-+		sw_w32_mask(0, BIT(port), RTL930X_L2_PORT_SABLK_CTRL);
-+		sw_w32_mask(0, BIT(port), RTL930X_L2_PORT_DABLK_CTRL);
-+	}
- 
- 	return 0;
- }
- 
-+
- static void rtl83xx_port_disable(struct dsa_switch *ds, int port)
- {
- 	struct rtl838x_switch_priv *priv = ds->priv;
-@@ -568,6 +933,7 @@ static void rtl83xx_port_disable(struct dsa_switch *ds, int port)
- 	// BUG: This does not work on RTL931X
- 	/* remove port from switch mask of CPU_PORT */
- 	priv->r->traffic_disable(priv->cpu_port, port);
-+	store_mcgroups(priv, port);
- 
- 	/* remove all other ports in the same bridge from switch mask of port */
- 	v = priv->r->traffic_get(port);
-@@ -577,58 +943,57 @@ static void rtl83xx_port_disable(struct dsa_switch *ds, int port)
- 	priv->ports[port].enable = false;
- }
- 
-+static int rtl83xx_set_mac_eee(struct dsa_switch *ds, int port,
-+			       struct ethtool_eee *e)
-+{
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+
-+	pr_debug("%s: %d\n", __func__, port);
-+	if (e->eee_enabled && !priv->eee_enabled) {
-+		pr_info("Globally enabling EEE\n");
-+		priv->r->init_eee(priv, true);
-+	}
-+
-+	priv->r->port_eee_set(priv, port, e->eee_enabled);
-+
-+	if (e->eee_enabled)
-+		pr_info("Enabled EEE for port %d\n", port);
-+	else
-+		pr_info("Disabled EEE for port %d\n", port);
-+	return 0;
-+}
-+
- static int rtl83xx_get_mac_eee(struct dsa_switch *ds, int port,
- 			       struct ethtool_eee *e)
- {
- 	struct rtl838x_switch_priv *priv = ds->priv;
- 
--	pr_debug("%s: port %d", __func__, port);
-+	pr_debug("%s: %d\n", __func__, port);
- 	e->supported = SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full;
--	if (sw_r32(priv->r->mac_force_mode_ctrl(port)) & BIT(9))
--		e->advertised |= ADVERTISED_100baseT_Full;
- 
--	if (sw_r32(priv->r->mac_force_mode_ctrl(port)) & BIT(10))
--		e->advertised |= ADVERTISED_1000baseT_Full;
-+	priv->r->eee_port_ability(priv, e, port);
- 
- 	e->eee_enabled = priv->ports[port].eee_enabled;
--	pr_debug("enabled: %d, active %x\n", e->eee_enabled, e->advertised);
--
--	if (sw_r32(RTL838X_MAC_EEE_ABLTY) & BIT(port)) {
--		e->lp_advertised = ADVERTISED_100baseT_Full;
--		e->lp_advertised |= ADVERTISED_1000baseT_Full;
--	}
- 
- 	e->eee_active = !!(e->advertised & e->lp_advertised);
--	pr_debug("active: %d, lp %x\n", e->eee_active, e->lp_advertised);
- 
- 	return 0;
- }
- 
--static int rtl83xx_set_mac_eee(struct dsa_switch *ds, int port,
-+static int rtl93xx_get_mac_eee(struct dsa_switch *ds, int port,
- 			       struct ethtool_eee *e)
- {
- 	struct rtl838x_switch_priv *priv = ds->priv;
- 
--	pr_debug("%s: port %d", __func__, port);
--	if (e->eee_enabled) {
--		pr_debug("Globally enabling EEE\n");
--		sw_w32_mask(0x4, 0, RTL838X_SMI_GLB_CTRL);
--	}
--	if (e->eee_enabled) {
--		pr_debug("Enabling EEE for MAC %d\n", port);
--		sw_w32_mask(0, 3 << 9, priv->r->mac_force_mode_ctrl(port));
--		sw_w32_mask(0, BIT(port), RTL838X_EEE_PORT_TX_EN);
--		sw_w32_mask(0, BIT(port), RTL838X_EEE_PORT_RX_EN);
--		priv->ports[port].eee_enabled = true;
--		e->eee_enabled = true;
--	} else {
--		pr_debug("Disabling EEE for MAC %d\n", port);
--		sw_w32_mask(3 << 9, 0, priv->r->mac_force_mode_ctrl(port));
--		sw_w32_mask(BIT(port), 0, RTL838X_EEE_PORT_TX_EN);
--		sw_w32_mask(BIT(port), 0, RTL838X_EEE_PORT_RX_EN);
--		priv->ports[port].eee_enabled = false;
--		e->eee_enabled = false;
--	}
-+	e->supported = SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full
-+			| SUPPORTED_2500baseX_Full;
-+
-+	priv->r->eee_port_ability(priv, e, port);
-+
-+	e->eee_enabled = priv->ports[port].eee_enabled;
-+
-+	e->eee_active = !!(e->advertised & e->lp_advertised);
-+
- 	return 0;
- }
- 
-@@ -658,26 +1023,32 @@ static int rtl83xx_port_bridge_join(struct dsa_switch *ds, int port,
- 					struct net_device *bridge)
- {
- 	struct rtl838x_switch_priv *priv = ds->priv;
--	u64 port_bitmap = 1ULL << priv->cpu_port, v;
-+	u64 port_bitmap = BIT_ULL(priv->cpu_port), v;
- 	int i;
- 
- 	pr_debug("%s %x: %d %llx", __func__, (u32)priv, port, port_bitmap);
-+	if (priv->is_lagmember[port]) {
-+		pr_info("%s: %d is lag slave. ignore\n", __func__, port);
-+		return 0;
-+	}
-+
- 	mutex_lock(&priv->reg_mutex);
- 	for (i = 0; i < ds->num_ports; i++) {
- 		/* Add this port to the port matrix of the other ports in the
- 		 * same bridge. If the port is disabled, port matrix is kept
- 		 * and not being setup until the port becomes enabled.
- 		 */
--		if (dsa_is_user_port(ds, i) && i != port) {
-+		if (dsa_is_user_port(ds, i) && i != port && !priv->is_lagmember[i]) {
- 			if (dsa_to_port(ds, i)->bridge_dev != bridge)
- 				continue;
- 			if (priv->ports[i].enable)
- 				priv->r->traffic_enable(i, port);
- 
--			priv->ports[i].pm |= 1ULL << port;
--			port_bitmap |= 1ULL << i;
-+			priv->ports[i].pm |= BIT_ULL(port);
-+			port_bitmap |= BIT_ULL(i);
- 		}
- 	}
-+	load_mcgroups(priv, port);
- 
- 	/* Add all other ports to this port matrix. */
- 	if (priv->ports[port].enable) {
-@@ -696,7 +1067,7 @@ static void rtl83xx_port_bridge_leave(struct dsa_switch *ds, int port,
- 					struct net_device *bridge)
- {
- 	struct rtl838x_switch_priv *priv = ds->priv;
--	u64 port_bitmap = 1ULL << priv->cpu_port, v;
-+	u64 port_bitmap = BIT_ULL(priv->cpu_port), v;
- 	int i;
- 
- 	pr_debug("%s %x: %d", __func__, (u32)priv, port);
-@@ -711,13 +1082,14 @@ static void rtl83xx_port_bridge_leave(struct dsa_switch *ds, int port,
- 		if (dsa_is_user_port(ds, i) && i != port) {
- 			if (dsa_to_port(ds, i)->bridge_dev != bridge)
- 				continue;
--			if (priv->ports[i].enable)
-+			if (priv->ports[i].enable) {
- 				priv->r->traffic_disable(i, port);
--
--			priv->ports[i].pm |= 1ULL << port;
-+			}
-+			priv->ports[i].pm |= BIT_ULL(port);
- 			port_bitmap &= ~BIT_ULL(i);
- 		}
- 	}
-+	store_mcgroups(priv, port);
- 
- 	/* Add all other ports to this port matrix. */
- 	if (priv->ports[port].enable) {
-@@ -814,6 +1186,7 @@ void rtl930x_fast_age(struct dsa_switch *ds, int port)
- {
- 	struct rtl838x_switch_priv *priv = ds->priv;
- 
-+
- 	pr_debug("FAST AGE port %d\n", port);
- 	mutex_lock(&priv->reg_mutex);
- 	sw_w32(port << 11, RTL930X_L2_TBL_FLUSH_CTRL + 4);
-@@ -829,8 +1202,7 @@ static int rtl83xx_vlan_filtering(struct dsa_switch *ds, int port,
- 				  bool vlan_filtering)
- {
- 	struct rtl838x_switch_priv *priv = ds->priv;
--
--	pr_debug("%s: port %d\n", __func__, port);
-+	pr_debug("%s: port %d state %d\n", __func__, port, vlan_filtering);
- 	mutex_lock(&priv->reg_mutex);
- 
- 	if (vlan_filtering) {
-@@ -844,14 +1216,15 @@ static int rtl83xx_vlan_filtering(struct dsa_switch *ds, int port,
- 		 */
- 		if (port != priv->cpu_port)
- 			sw_w32_mask(0b10 << ((port % 16) << 1), 0b01 << ((port % 16) << 1),
--				    priv->r->vlan_port_igr_filter + ((port >> 5) << 2));
--		sw_w32_mask(0, BIT(port % 32), priv->r->vlan_port_egr_filter + ((port >> 4) << 2));
-+				    priv->r->vlan_port_igr_filter + ((port >> 4) << 2));
-+		sw_w32_mask(0, BIT(port % 32), priv->r->vlan_port_egr_filter + ((port >> 5) << 2));
-+		//sw_w32_mask(BIT(port % 32), 0, priv->r->vlan_port_egr_filter + ((port >> 5) << 2));  //BUG
- 	} else {
- 		/* Disable ingress and egress filtering */
- 		if (port != priv->cpu_port)
- 			sw_w32_mask(0b11 << ((port % 16) << 1), 0,
--				    priv->r->vlan_port_igr_filter + ((port >> 5) << 2));
--		sw_w32_mask(BIT(port % 32), 0, priv->r->vlan_port_egr_filter + ((port >> 4) << 2));
-+				    priv->r->vlan_port_igr_filter + ((port >> 4) << 2));
-+		sw_w32_mask(BIT(port % 32), 0, priv->r->vlan_port_egr_filter + ((port >> 5) << 2));
- 	}
- 
- 	/* Do we need to do something to the CPU-Port, too? */
-@@ -866,17 +1239,17 @@ static int rtl83xx_vlan_prepare(struct dsa_switch *ds, int port,
- 	struct rtl838x_vlan_info info;
- 	struct rtl838x_switch_priv *priv = ds->priv;
- 
--	pr_info("%s: port %d\n", __func__, port);
--
- 	mutex_lock(&priv->reg_mutex);
-+	priv->r->vlan_tables_read(0, &info);
- 
--	priv->r->vlan_profile_dump(1);
--	priv->r->vlan_tables_read(1, &info);
--
--	pr_info("Tagged ports %llx, untag %llx, prof %x, MC# %d, UC# %d, FID %x\n",
-+	pr_debug("VLAN 0: Tagged ports %llx, untag %llx, profile %d, MC# %d, UC# %d, FID %x\n",
- 		info.tagged_ports, info.untagged_ports, info.profile_id,
- 		info.hash_mc_fid, info.hash_uc_fid, info.fid);
- 
-+	priv->r->vlan_tables_read(1, &info);
-+	pr_debug("VLAN 1: Tagged ports %llx, untag %llx, profile %d, MC# %d, UC# %d, FID %x\n",
-+		info.tagged_ports, info.untagged_ports, info.profile_id,
-+		info.hash_mc_fid, info.hash_uc_fid, info.fid);
- 	priv->r->vlan_set_untagged(1, info.untagged_ports);
- 	pr_debug("SET: Untagged ports, VLAN %d: %llx\n", 1, info.untagged_ports);
- 
-@@ -894,7 +1267,7 @@ static void rtl83xx_vlan_add(struct dsa_switch *ds, int port,
- 	struct rtl838x_switch_priv *priv = ds->priv;
- 	int v;
- 
--	pr_info("%s port %d, vid_end %d, vid_end %d, flags %x\n", __func__,
-+	pr_debug("%s port %d, vid_end %d, vid_end %d, flags %x\n", __func__,
- 		port, vlan->vid_begin, vlan->vid_end, vlan->flags);
- 
- 	if (vlan->vid_begin > 4095 || vlan->vid_end > 4095) {
-@@ -916,9 +1289,6 @@ static void rtl83xx_vlan_add(struct dsa_switch *ds, int port,
- 	}
- 
- 	for (v = vlan->vid_begin; v <= vlan->vid_end; v++) {
--		if (!v)
--			continue;
--
- 		/* Get port memberships of this vlan */
- 		priv->r->vlan_tables_read(v, &info);
- 
-@@ -939,10 +1309,10 @@ static void rtl83xx_vlan_add(struct dsa_switch *ds, int port,
- 			info.untagged_ports |= BIT_ULL(port);
- 
- 		priv->r->vlan_set_untagged(v, info.untagged_ports);
--		pr_info("Untagged ports, VLAN %d: %llx\n", v, info.untagged_ports);
-+		pr_debug("Untagged ports, VLAN %d: %llx\n", v, info.untagged_ports);
- 
- 		priv->r->vlan_set_tagged(v, &info);
--		pr_info("Tagged ports, VLAN %d: %llx\n", v, info.tagged_ports);
-+		pr_debug("Tagged ports, VLAN %d: %llx\n", v, info.tagged_ports);
- 	}
- 
- 	mutex_unlock(&priv->reg_mutex);
-@@ -978,9 +1348,7 @@ static int rtl83xx_vlan_del(struct dsa_switch *ds, int port,
- 
- 		/* remove port from both tables */
- 		info.untagged_ports &= (~BIT_ULL(port));
--		/* always leave vid 1 */
--		if (v != 1)
--			info.tagged_ports &= (~BIT_ULL(port));
-+		info.tagged_ports &= (~BIT_ULL(port));
- 
- 		priv->r->vlan_set_untagged(v, info.untagged_ports);
- 		pr_debug("Untagged ports, VLAN %d: %llx\n", v, info.untagged_ports);
-@@ -993,59 +1361,140 @@ static int rtl83xx_vlan_del(struct dsa_switch *ds, int port,
- 	return 0;
- }
- 
--static int rtl83xx_port_fdb_add(struct dsa_switch *ds, int port,
--				const unsigned char *addr, u16 vid)
-+static void dump_l2_entry(struct rtl838x_l2_entry *e)
- {
--	struct rtl838x_switch_priv *priv = ds->priv;
--	u64 mac = ether_addr_to_u64(addr);
--	u32 key = rtl83xx_hash_key(priv, mac, vid);
--	struct rtl838x_l2_entry e;
--	u32 r[3];
-+	pr_info("MAC: %02x:%02x:%02x:%02x:%02x:%02x vid: %d, rvid: %d, port: %d, valid: %d\n",
-+		e->mac[0], e->mac[1], e->mac[2], e->mac[3], e->mac[4], e->mac[5],
-+		e->vid, e->rvid, e->port, e->valid);
-+
-+	if (e->type != L2_MULTICAST) {
-+		pr_info("Type: %d, is_static: %d, is_ip_mc: %d, is_ipv6_mc: %d, block_da: %d\n",
-+			e->type, e->is_static, e->is_ip_mc, e->is_ipv6_mc, e->block_da);
-+		pr_info("  block_sa: %d, susp: %d, nh: %d, age: %d, is_trunk: %d, trunk: %d\n",
-+		e->block_sa, e->suspended, e->next_hop, e->age, e->is_trunk, e->trunk);
-+	}
-+	if (e->type == L2_MULTICAST)
-+		pr_info("  L2_MULTICAST mc_portmask_index: %d\n", e->mc_portmask_index);
-+	if (e->is_ip_mc || e->is_ipv6_mc)
-+		pr_info("  mc_portmask_index: %d, mc_gip: %d, mc_sip: %d\n",
-+			e->mc_portmask_index, e->mc_gip, e->mc_sip);
-+	pr_info("  stack_dev: %d\n", e->stack_dev);
-+	if (e->next_hop)
-+		pr_info("  nh_route_id: %d\n", e->nh_route_id);
-+}
-+
-+static void rtl83xx_setup_l2_uc_entry(struct rtl838x_l2_entry *e, int port, int vid, u64 mac)
-+{
-+	e->is_ip_mc = e->is_ipv6_mc  = false;
-+	e->valid = true;
-+	e->age = 3;
-+	e->port = port,
-+	e->vid = vid;
-+	u64_to_ether_addr(mac, e->mac);
-+}
-+
-+static void rtl83xx_setup_l2_mc_entry(struct rtl838x_switch_priv *priv,
-+				      struct rtl838x_l2_entry *e, int vid, u64 mac, int mc_group)
-+{
-+	e->is_ip_mc = e->is_ipv6_mc  = false;
-+	e->valid = true;
-+	e->mc_portmask_index = mc_group;
-+	e->type = L2_MULTICAST;
-+	e->rvid = e->vid = vid;
-+	pr_debug("%s: vid: %d, rvid: %d\n", __func__, e->vid, e->rvid);
-+	u64_to_ether_addr(mac, e->mac);
-+}
-+
-+/*
-+ * Uses the seed to identify a hash bucket in the L2 using the derived hash key and then loops
-+ * over the entries in the bucket until either a matching entry is found or an empty slot
-+ * Returns the filled in rtl838x_l2_entry and the index in the bucket when an entry was found
-+ * when an empty slot was found and must exist is false, the index of the slot is returned
-+ * when no slots are available returns -1
-+ */
-+static int rtl83xx_find_l2_hash_entry(struct rtl838x_switch_priv *priv, u64 seed,
-+				     bool must_exist, struct rtl838x_l2_entry *e)
-+{
-+	int i, idx = -1;
-+	u32 key = priv->r->l2_hash_key(priv, seed);
- 	u64 entry;
--	int idx = -1, err = 0, i;
- 
--	mutex_lock(&priv->reg_mutex);
--	for (i = 0; i < 4; i++) {
--		entry = priv->r->read_l2_entry_using_hash(key, i, &e);
--		if (!e.valid) {
--			idx = (key << 2) | i;
--			break;
--		}
--		if ((entry & 0x0fffffffffffffffULL) == ((mac << 12) | vid)) {
--			idx = (key << 2) | i;
-+	pr_debug("%s: using key %x, for seed %016llx\n", __func__, key, seed);
-+	// Loop over all entries in the hash-bucket and over the second block on 93xx SoCs
-+	for (i = 0; i < priv->l2_bucket_size; i++) {
-+		entry = priv->r->read_l2_entry_using_hash(key, i, e);
-+		pr_debug("valid %d, mac %016llx\n", e->valid, ether_addr_to_u64(&e->mac[0]));
-+		if (must_exist && !e->valid)
-+			continue;
-+		if (!e->valid || ((entry & 0x0fffffffffffffffULL) == seed)) {
-+			idx = i > 3 ? ((key >> 14) & 0xffff) | i >> 1 : ((key << 2) | i) & 0xffff;
- 			break;
- 		}
- 	}
--	if (idx >= 0) {
--		r[0] = 3 << 17 | port << 12; // Aging and  port
--		r[0] |= vid;
--		r[1] = mac >> 16;
--		r[2] = (mac & 0xffff) << 12; /* rvid = 0 */
--		rtl83xx_write_hash(idx, r);
--		goto out;
--	}
- 
--	/* Hash buckets full, try CAM */
-+	return idx;
-+}
-+
-+/*
-+ * Uses the seed to identify an entry in the CAM by looping over all its entries
-+ * Returns the filled in rtl838x_l2_entry and the index in the CAM when an entry was found
-+ * when an empty slot was found the index of the slot is returned
-+ * when no slots are available returns -1
-+ */
-+static int rtl83xx_find_l2_cam_entry(struct rtl838x_switch_priv *priv, u64 seed,
-+				     bool must_exist, struct rtl838x_l2_entry *e)
-+{
-+	int i, idx = -1;
-+	u64 entry;
-+
- 	for (i = 0; i < 64; i++) {
--		entry = priv->r->read_cam(i, &e);
--		if (!e.valid) {
-+		entry = priv->r->read_cam(i, e);
-+		if (!must_exist && !e->valid) {
- 			if (idx < 0) /* First empty entry? */
- 				idx = i;
- 			break;
--		} else if ((entry & 0x0fffffffffffffffULL) == ((mac << 12) | vid)) {
-+		} else if ((entry & 0x0fffffffffffffffULL) == seed) {
- 			pr_debug("Found entry in CAM\n");
- 			idx = i;
- 			break;
- 		}
- 	}
-+	return idx;
-+}
-+
-+static int rtl83xx_port_fdb_add(struct dsa_switch *ds, int port,
-+				const unsigned char *addr, u16 vid)
-+{
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	u64 mac = ether_addr_to_u64(addr);
-+	struct rtl838x_l2_entry e;
-+	int err = 0, idx;
-+	u64 seed = priv->r->l2_hash_seed(mac, vid);
-+	pr_debug("%s: %d\n", __func__, port);
-+	if (priv->is_lagmember[port]) {
-+		pr_info("%s: %d is lag slave. ignore\n", __func__, port);
-+		return 0;
-+	}
-+	mutex_lock(&priv->reg_mutex);
-+
-+	idx = rtl83xx_find_l2_hash_entry(priv, seed, false, &e);
-+
-+	// Found an existing or empty entry
- 	if (idx >= 0) {
--		r[0] = 3 << 17 | port << 12; // Aging
--		r[0] |= vid;
--		r[1] = mac >> 16;
--		r[2] = (mac & 0xffff) << 12; /* rvid = 0 */
--		rtl83xx_write_cam(idx, r);
-+		rtl83xx_setup_l2_uc_entry(&e, port, vid, mac);
-+		priv->r->write_l2_entry_using_hash(idx >> 2, idx & 0x3, &e);
- 		goto out;
- 	}
-+
-+	// Hash buckets full, try CAM
-+	rtl83xx_find_l2_cam_entry(priv, seed, false, &e);
-+
-+	if (idx >= 0) {
-+		rtl83xx_setup_l2_uc_entry(&e, port, vid, mac);
-+		priv->r->write_cam(idx, &e);
-+		goto out;
-+	}
-+
- 	err = -ENOTSUPP;
- out:
- 	mutex_unlock(&priv->reg_mutex);
-@@ -1057,41 +1506,29 @@ static int rtl83xx_port_fdb_del(struct dsa_switch *ds, int port,
- {
- 	struct rtl838x_switch_priv *priv = ds->priv;
- 	u64 mac = ether_addr_to_u64(addr);
--	u32 key = rtl83xx_hash_key(priv, mac, vid);
- 	struct rtl838x_l2_entry e;
--	u32 r[3];
--	u64 entry;
--	int idx = -1, err = 0, i;
-+	int err = 0, idx;
-+	u64 seed = priv->r->l2_hash_seed(mac, vid);
- 
--	pr_debug("In %s, mac %llx, vid: %d, key: %x08x\n", __func__, mac, vid, key);
-+	pr_debug("In %s, mac %llx, vid: %d\n", __func__, mac, vid);
- 	mutex_lock(&priv->reg_mutex);
--	for (i = 0; i < 4; i++) {
--		entry = priv->r->read_l2_entry_using_hash(key, i, &e);
--		if (!e.valid)
--			continue;
--		if ((entry & 0x0fffffffffffffffULL) == ((mac << 12) | vid)) {
--			idx = (key << 2) | i;
--			break;
--		}
--	}
- 
-+	idx = rtl83xx_find_l2_hash_entry(priv, seed, true, &e);
-+
-+	pr_debug("Found entry index %d, key %d and bucket %d\n", idx, idx >> 2, idx & 3);
- 	if (idx >= 0) {
--		r[0] = r[1] = r[2] = 0;
--		rtl83xx_write_hash(idx, r);
-+		e.valid = false;
-+		dump_l2_entry(&e);
-+		priv->r->write_l2_entry_using_hash(idx >> 2, idx & 0x3, &e);
- 		goto out;
- 	}
- 
- 	/* Check CAM for spillover from hash buckets */
--	for (i = 0; i < 64; i++) {
--		entry = priv->r->read_cam(i, &e);
--		if ((entry & 0x0fffffffffffffffULL) == ((mac << 12) | vid)) {
--			idx = i;
--			break;
--		}
--	}
-+	rtl83xx_find_l2_cam_entry(priv, seed, true, &e);
-+
- 	if (idx >= 0) {
--		r[0] = r[1] = r[2] = 0;
--		rtl83xx_write_cam(idx, r);
-+		e.valid = false;
-+		priv->r->write_cam(idx, &e);
- 		goto out;
- 	}
- 	err = -ENOENT;
-@@ -1106,9 +1543,8 @@ static int rtl83xx_port_fdb_dump(struct dsa_switch *ds, int port,
- 	struct rtl838x_l2_entry e;
- 	struct rtl838x_switch_priv *priv = ds->priv;
- 	int i;
--	u32 fid;
--	u32 pkey;
--	u64 mac;
-+	u32 fid, pkey, key;
-+	u64 mac, seed;
- 
- 	mutex_lock(&priv->reg_mutex);
- 
-@@ -1118,14 +1554,26 @@ static int rtl83xx_port_fdb_dump(struct dsa_switch *ds, int port,
- 		if (!e.valid)
- 			continue;
- 
--		if (e.port == port) {
--			fid = (i & 0x3ff) | (e.rvid & ~0x3ff);
-+		if (e.port == port || e.port == RTL930X_PORT_IGNORE) {
-+			fid = ((i >> 2) & 0x3ff) | (e.rvid & ~0x3ff);
- 			mac = ether_addr_to_u64(&e.mac[0]);
--			pkey = rtl838x_hash(priv, mac << 12 | fid);
-+			pkey = priv->r->l2_hash_key(priv, priv->r->l2_hash_seed(mac, fid));
- 			fid = (pkey & 0x3ff) | (fid & ~0x3ff);
--			pr_debug("-> mac %016llx, fid: %d\n", mac, fid);
-+			pr_debug("-> index %d, key %x, bucket %d, dmac %016llx, fid: %x rvid: %x\n",
-+				i, i >> 2, i & 0x3, mac, fid, e.rvid);
-+			dump_l2_entry(&e);
-+			seed = priv->r->l2_hash_seed(mac, e.rvid);
-+			key = priv->r->l2_hash_key(priv, seed);
-+			pr_debug("seed: %016llx, key based on rvid: %08x\n", seed, key);
- 			cb(e.mac, e.vid, e.is_static, data);
- 		}
-+		if (e.type == L2_MULTICAST) {
-+			u64 portmask = priv->r->read_mcast_pmask(e.mc_portmask_index);
-+			if (portmask & BIT_ULL(port)) {
-+				dump_l2_entry(&e);
-+				pr_debug("  PM: %016llx\n", portmask);
-+			}
-+		}
- 	}
- 
- 	for (i = 0; i < 64; i++) {
-@@ -1138,21 +1586,210 @@ static int rtl83xx_port_fdb_dump(struct dsa_switch *ds, int port,
- 			cb(e.mac, e.vid, e.is_static, data);
- 	}
- 
-+	
- 	mutex_unlock(&priv->reg_mutex);
- 	return 0;
- }
- 
-+static int rtl83xx_port_mdb_prepare(struct dsa_switch *ds, int port,
-+					const struct switchdev_obj_port_mdb *mdb)
-+{
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+
-+	if (priv->id >= 0x9300)
-+		return -EOPNOTSUPP;
-+
-+	return 0;
-+}
-+
-+static int rtl83xx_mc_group_alloc(struct rtl838x_switch_priv *priv, int port)
-+{
-+	int mc_group = find_first_zero_bit(priv->mc_group_bm, MAX_MC_GROUPS - 1);
-+	u64 portmask;
-+
-+	if (mc_group >= MAX_MC_GROUPS - 1)
-+		return -1;
-+
-+	pr_debug("%s: %d\n", __func__, port);
-+	if (priv->is_lagmember[port]) {
-+		pr_info("%s: %d is lag slave. ignore\n", __func__, port);
-+		return 0;
-+	}
-+	pr_debug("Using MC group %d\n", mc_group);
-+	set_bit(mc_group, priv->mc_group_bm);
-+	mc_group++;  // We cannot use group 0, as this is used for lookup miss flooding
-+	portmask = BIT_ULL(port) | BIT_ULL(priv->cpu_port); 
-+	priv->r->write_mcast_pmask(mc_group, portmask);
-+
-+	return mc_group;
-+}
-+
-+static u64 rtl83xx_mc_group_add_port(struct rtl838x_switch_priv *priv, int mc_group, int port)
-+{
-+	u64 portmask = priv->r->read_mcast_pmask(mc_group);
-+
-+	pr_debug("%s: %d\n", __func__, port);
-+	if (priv->is_lagmember[port]) {
-+		pr_info("%s: %d is lag slave. ignore\n", __func__, port);
-+		return portmask;
-+	}
-+	portmask |= BIT_ULL(port);
-+	priv->r->write_mcast_pmask(mc_group, portmask);
-+
-+	return portmask;
-+}
-+
-+static u64 rtl83xx_mc_group_del_port(struct rtl838x_switch_priv *priv, int mc_group, int port)
-+{
-+	u64 portmask = priv->r->read_mcast_pmask(mc_group);
-+
-+	pr_debug("%s: %d\n", __func__, port);
-+	if (priv->is_lagmember[port]) {
-+		pr_info("%s: %d is lag slave. ignore\n", __func__, port);
-+		return portmask;
-+	}
-+	priv->r->write_mcast_pmask(mc_group, portmask);
-+	if (portmask == BIT_ULL(priv->cpu_port)) {
-+		portmask &= ~BIT_ULL(priv->cpu_port);
-+		priv->r->write_mcast_pmask(mc_group, portmask);
-+		clear_bit(mc_group, priv->mc_group_bm);
-+	}
-+
-+	return portmask;
-+}
-+
-+static void rtl83xx_port_mdb_add(struct dsa_switch *ds, int port,
-+			const struct switchdev_obj_port_mdb *mdb)
-+{
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	u64 mac = ether_addr_to_u64(mdb->addr);
-+	struct rtl838x_l2_entry e;
-+	int err = 0, idx;
-+	int vid = mdb->vid;
-+	u64 seed = priv->r->l2_hash_seed(mac, vid);
-+	int mc_group;
-+
-+	pr_debug("%s: %d\n", __func__, port);
-+	if (priv->is_lagmember[port]) {
-+		pr_info("%s: %d is lag slave. ignore\n", __func__, port);
-+		return;
-+	}
-+	pr_debug("In %s port %d, mac %llx, vid: %d\n", __func__, port, mac, vid);
-+	mutex_lock(&priv->reg_mutex);
-+
-+	idx = rtl83xx_find_l2_hash_entry(priv, seed, false, &e);
-+	
-+	// Found an existing or empty entry
-+	if (idx >= 0) {
-+		if (e.valid) {
-+			pr_debug("Found an existing entry %016llx, mc_group %d\n",
-+				ether_addr_to_u64(e.mac), e.mc_portmask_index);
-+			rtl83xx_mc_group_add_port(priv, e.mc_portmask_index, port);
-+		} else {
-+			pr_debug("New entry for seed %016llx\n", seed);
-+			mc_group = rtl83xx_mc_group_alloc(priv, port);
-+			if (mc_group < 0) {
-+				err = -ENOTSUPP;
-+				goto out;
-+			}
-+			rtl83xx_setup_l2_mc_entry(priv, &e, vid, mac, mc_group);
-+			priv->r->write_l2_entry_using_hash(idx >> 2, idx & 0x3, &e);
-+		}
-+		goto out;
-+	}
-+
-+	// Hash buckets full, try CAM
-+	rtl83xx_find_l2_cam_entry(priv, seed, false, &e);
-+
-+	if (idx >= 0) {
-+		if (e.valid) {
-+			pr_debug("Found existing CAM entry %016llx, mc_group %d\n",
-+				 ether_addr_to_u64(e.mac), e.mc_portmask_index);
-+			rtl83xx_mc_group_add_port(priv, e.mc_portmask_index, port);
-+		} else {
-+			pr_debug("New entry\n");
-+			mc_group = rtl83xx_mc_group_alloc(priv, port);
-+			if (mc_group < 0) {
-+				err = -ENOTSUPP;
-+				goto out;
-+			}
-+			rtl83xx_setup_l2_mc_entry(priv, &e, vid, mac, mc_group);
-+			priv->r->write_cam(idx, &e);
-+		}
-+		goto out;
-+	}
-+
-+	err = -ENOTSUPP;
-+out:
-+	mutex_unlock(&priv->reg_mutex);
-+	if (err)
-+		dev_err(ds->dev, "failed to add MDB entry\n");
-+}
-+
-+int rtl83xx_port_mdb_del(struct dsa_switch *ds, int port,
-+			const struct switchdev_obj_port_mdb *mdb)
-+{
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	u64 mac = ether_addr_to_u64(mdb->addr);
-+	struct rtl838x_l2_entry e;
-+	int err = 0, idx;
-+	int vid = mdb->vid;
-+	u64 seed = priv->r->l2_hash_seed(mac, vid);
-+	u64 portmask;
-+	pr_debug("%s: %d\n", __func__, port);
-+	if (priv->is_lagmember[port]) {
-+		pr_info("%s: %d is lag slave. ignore\n", __func__, port);
-+		return 0;
-+	}
-+
-+	pr_debug("In %s, port %d, mac %llx, vid: %d\n", __func__, port, mac, vid);
-+	mutex_lock(&priv->reg_mutex);
-+
-+	idx = rtl83xx_find_l2_hash_entry(priv, seed, true, &e);
-+
-+	pr_debug("Found entry index %d, key %d and bucket %d\n", idx, idx >> 2, idx & 3);
-+	if (idx >= 0) {
-+		portmask = rtl83xx_mc_group_del_port(priv, e.mc_portmask_index, port);
-+		if (!portmask) {
-+			e.valid = false;
-+			// dump_l2_entry(&e);
-+			priv->r->write_l2_entry_using_hash(idx >> 2, idx & 0x3, &e);
-+		}
-+		goto out;
-+	}
-+
-+	/* Check CAM for spillover from hash buckets */
-+	rtl83xx_find_l2_cam_entry(priv, seed, true, &e);
-+
-+	if (idx >= 0) {
-+		portmask = rtl83xx_mc_group_del_port(priv, e.mc_portmask_index, port);
-+		if (!portmask) {
-+			e.valid = false;
-+			// dump_l2_entry(&e);
-+			priv->r->write_cam(idx, &e);
-+		}
-+		goto out;
-+	}
-+	// TODO: Re-enable with a newer kernel: err = -ENOENT;
-+out:
-+	mutex_unlock(&priv->reg_mutex);
-+	return err;
-+}
-+
- static int rtl83xx_port_mirror_add(struct dsa_switch *ds, int port,
- 				   struct dsa_mall_mirror_tc_entry *mirror,
- 				   bool ingress)
- {
- 	/* We support 4 mirror groups, one destination port per group */
--	int group;
-+	int group, err = 0;
- 	struct rtl838x_switch_priv *priv = ds->priv;
--	int ctrl_reg, dpm_reg, spm_reg;	
--
-+	struct rtl838x_vlan_info info;
-+	int ctrl_reg, dpm_reg, spm_reg;
-+	int v;
- 	pr_debug("In %s\n", __func__);
- 
-+	mutex_lock(&priv->reg_mutex);
-+
- 	for (group = 0; group < 4; group++) {
- 		if (priv->mirror_group_ports[group] == mirror->to_local_port)
- 			break;
-@@ -1164,41 +1801,42 @@ static int rtl83xx_port_mirror_add(struct dsa_switch *ds, int port,
- 		}
- 	}
- 
--	if (group >= 4)
--		return -ENOSPC;
--
--	ctrl_reg = priv->r->mir_ctrl + group * 4;
--	dpm_reg = priv->r->mir_dpm + group * 4 * priv->port_width;
--	spm_reg = priv->r->mir_spm + group * 4 * priv->port_width;
-+	if (group >= 4) {
-+		err = -ENOSPC;
-+		goto out;
-+	}
- 
--	pr_debug("Using group %d\n", group);
--	mutex_lock(&priv->reg_mutex);
-+	ctrl_reg = priv->r->mir_ctrl + (group * 4);
-+	dpm_reg = priv->r->mir_dpm + ((group << 2) * priv->port_width);
-+	spm_reg = priv->r->mir_spm + ((group << 2) * priv->port_width);
-+	pr_debug("Using group %d local port %d, port %d\n", group, mirror->to_local_port, port);
-+	
- 
- 	if (priv->family_id == RTL8380_FAMILY_ID) {
- 		/* Enable mirroring to port across VLANs (bit 11) */
--		sw_w32(1 << 11 | (mirror->to_local_port << 4) | 1, ctrl_reg);
-+		sw_w32(1 << 11 | ( mirror->to_local_port << 4) | 1, ctrl_reg);
- 	} else {
- 		/* Enable mirroring to destination port */
--		sw_w32((mirror->to_local_port << 4) | 1, ctrl_reg);
-+		sw_w32(( mirror->to_local_port << 4) | 1, ctrl_reg);
- 	}
- 
- 	if (ingress && (priv->r->get_port_reg_be(spm_reg) & (1ULL << port))) {
--		mutex_unlock(&priv->reg_mutex);
--		return -EEXIST;
-+		err = -EEXIST;
-+		goto out;
- 	}
- 	if ((!ingress) && (priv->r->get_port_reg_be(dpm_reg) & (1ULL << port))) {
--		mutex_unlock(&priv->reg_mutex);
--		return -EEXIST;
-+		err = -EEXIST;
-+		goto out;
- 	}
--
- 	if (ingress)
- 		priv->r->mask_port_reg_be(0, 1ULL << port, spm_reg);
- 	else
- 		priv->r->mask_port_reg_be(0, 1ULL << port, dpm_reg);
- 
- 	priv->mirror_group_ports[group] = mirror->to_local_port;
-+	out:
- 	mutex_unlock(&priv->reg_mutex);
--	return 0;
-+	return err;
- }
- 
- static void rtl83xx_port_mirror_del(struct dsa_switch *ds, int port,
-@@ -1209,18 +1847,18 @@ static void rtl83xx_port_mirror_del(struct dsa_switch *ds, int port,
- 	int ctrl_reg, dpm_reg, spm_reg;
- 
- 	pr_debug("In %s\n", __func__);
-+	mutex_lock(&priv->reg_mutex);
- 	for (group = 0; group < 4; group++) {
- 		if (priv->mirror_group_ports[group] == mirror->to_local_port)
- 			break;
- 	}
- 	if (group >= 4)
--		return;
-+		goto out;
- 
- 	ctrl_reg = priv->r->mir_ctrl + group * 4;
--	dpm_reg = priv->r->mir_dpm + group * 4 * priv->port_width;
--	spm_reg = priv->r->mir_spm + group * 4 * priv->port_width;
-+	dpm_reg = priv->r->mir_dpm + (group << 2) * priv->port_width;
-+	spm_reg = priv->r->mir_spm + (group << 2) * priv->port_width;
- 
--	mutex_lock(&priv->reg_mutex);
- 	if (mirror->ingress) {
- 		/* Ingress, clear source port matrix */
- 		priv->r->mask_port_reg_be(1ULL << port, 0, spm_reg);
-@@ -1228,13 +1866,214 @@ static void rtl83xx_port_mirror_del(struct dsa_switch *ds, int port,
- 		/* Egress, clear destination port matrix */
- 		priv->r->mask_port_reg_be(1ULL << port, 0, dpm_reg);
- 	}
-+	
-+	if (!(priv->r->get_port_reg_be(dpm_reg) & (1ULL << port)) && !(priv->r->get_port_reg_be(spm_reg) & (1ULL << port))) {
- 
--	if (!(sw_r32(spm_reg) || sw_r32(dpm_reg))) {
- 		priv->mirror_group_ports[group] = -1;
- 		sw_w32(0, ctrl_reg);
- 	}
-+	out:
-+	mutex_unlock(&priv->reg_mutex);
-+}
-+
-+static bool rtl83xx_lag_can_offload(struct dsa_switch *ds,
-+				      struct net_device *lag,
-+				      struct netdev_lag_upper_info *info)
-+{
-+	struct dsa_port *dp;
-+	int id;
-+
-+	id = dsa_lag_id(ds->dst, lag);
-+	if (id < 0 || id >= ds->num_lag_ids)
-+		return false;
-+
-+	if (info->tx_type != NETDEV_LAG_TX_TYPE_HASH) {
-+		return false;
-+	}
-+	if (info->hash_type != NETDEV_LAG_HASH_L2 && info->hash_type != NETDEV_LAG_HASH_L23)
-+		return false;
-+
-+	return true;
-+}
-+
-+static void add_portmatrix(struct dsa_switch *ds,int port)
-+{
-+	int i;
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	u64 port_bitmap = BIT_ULL(priv->cpu_port), v;
-+
-+	for (i = 0; i < ds->num_ports; i++) {
-+		/* Add this port to the port matrix of the other ports in the
-+		 * same bridge. If the port is disabled, port matrix is kept
-+		 * and not being setup until the port becomes enabled.
-+		 */
-+		if (dsa_is_user_port(ds, i) && i != port && !priv->is_lagmember[i]) {
-+			if (priv->ports[i].enable) {
-+				priv->r->traffic_enable(i, port);
-+			}
-+			priv->ports[i].pm |= BIT_ULL(port);
-+			port_bitmap |= BIT_ULL(i);
-+		}
-+		if (priv->is_lagmember[i] || i == port) {
-+		
-+			priv->ports[i].pm &= ~BIT_ULL(i);
-+			port_bitmap &= ~BIT_ULL(i);
-+		
-+		}
-+	}
-+	load_mcgroups(priv, port);
-+	/* Add all other ports to this port matrix. */
-+	if (priv->ports[port].enable) {
-+		priv->r->traffic_enable(priv->cpu_port, port);
-+		v = priv->r->traffic_get(port);
-+		v |= port_bitmap;
-+		priv->r->traffic_set(port, v);
-+	}
-+	priv->ports[port].pm |= port_bitmap;
-+
-+
-+}
-+/* pointless? */
-+static int rtl83xx_port_lag_change(struct dsa_switch *ds, int port)
-+{
-+	struct dsa_port *dp;
-+	struct net_device *lag;
-+	unsigned int id;
-+	int num_tx, i,a;
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	u64 port_bitmap = BIT_ULL(priv->cpu_port), v;
-+	pr_debug("%s: %d\n", __func__, port);
-+	mutex_lock(&priv->reg_mutex);
- 
- 	mutex_unlock(&priv->reg_mutex);
-+	return 0;
-+}
-+
-+void rtl83xx_port_stp_state_set(struct dsa_switch *ds, int port, u8 state);
-+
-+static int rtl83xx_port_lag_join(struct dsa_switch *ds, int port,
-+				   struct net_device *lag,
-+				   struct netdev_lag_upper_info *info)
-+{
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	int i, err = 0;
-+
-+	if (!rtl83xx_lag_can_offload(ds, lag, info))
-+		return -EOPNOTSUPP;
-+
-+	mutex_lock(&priv->reg_mutex);
-+
-+	for (i = 0; i < priv->n_lags; i++) {
-+		if ((!priv->lag_devs[i]) || (priv->lag_devs[i] == lag))
-+			break;
-+	}
-+	if (port >= priv->cpu_port) {
-+		err = -EINVAL;
-+		goto out;
-+	}
-+	pr_info("port_lag_join: group %d, port %d\n",i, port); 
-+	if (!priv->lag_devs[i])
-+		priv->lag_devs[i] = lag;
-+
-+	if (priv->lag_primary[i]==-1) {
-+		priv->lag_primary[i]=port;
-+	} else
-+		priv->is_lagmember[port] = 1;
-+
-+	priv->lagmembers |= (1ULL << port);
-+
-+	pr_debug("lag_members = %llX\n", priv->lagmembers);
-+	err = rtl83xx_lag_add(priv->ds, i, port, info);
-+	if (err) {
-+		err = -EINVAL;
-+		goto out;
-+	}
-+
-+out:
-+	mutex_unlock(&priv->reg_mutex);
-+	return err;
-+
-+}
-+
-+static int rtl83xx_port_lag_leave(struct dsa_switch *ds, int port,
-+				    struct net_device *lag)
-+{
-+	int i, group = -1, err;
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	
-+	mutex_lock(&priv->reg_mutex);
-+	for (i=0;i<priv->n_lags;i++) {
-+		if (priv->lags_port_members[i] & BIT_ULL(port)) {
-+			group = i;
-+			break;
-+		}
-+	}
-+	
-+	if (group == -1) {
-+		pr_info("port_lag_leave: port %d is not a member\n", port); 
-+		err = -EINVAL;
-+		goto out;
-+	}
-+
-+	if (port >= priv->cpu_port) {
-+		err = -EINVAL;
-+		goto out;
-+	}
-+	pr_info("port_lag_del: group %d, port %d\n",group, port); 
-+	priv->lagmembers &=~ (1ULL << port);
-+	priv->lag_primary[i] = -1;
-+	priv->is_lagmember[port] = 0;
-+	pr_debug("lag_members = %llX\n", priv->lagmembers);
-+	err = rtl83xx_lag_del(priv->ds, group, port);
-+	if (err) {
-+		err = -EINVAL;
-+		goto out;
-+	}
-+	if (!priv->lags_port_members[i])
-+		priv->lag_devs[i] = NULL;
-+
-+out:
-+	mutex_unlock(&priv->reg_mutex);
-+	return 0;
-+}
-+static int rtl83xx_port_pre_bridge_flags(struct dsa_switch *ds, int port, unsigned long flags, struct netlink_ext_ack *extack)
-+{
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	unsigned long features = 0;
-+	pr_debug("%s: %d %lX\n", __func__, port, flags);
-+	if (priv->r->enable_learning)
-+		    features |= BR_LEARNING;
-+	if (priv->r->enable_flood)
-+		    features |= BR_FLOOD;
-+	if (priv->r->enable_mcast_flood)
-+		    features |= BR_MCAST_FLOOD;
-+	if (priv->r->enable_bcast_flood)
-+		    features |= BR_BCAST_FLOOD;
-+	if (flags & ~(features))
-+		return -EINVAL;
-+	
-+	return 0;
-+}
-+
-+static int rtl83xx_port_bridge_flags(struct dsa_switch *ds, int port, unsigned long flags, struct netlink_ext_ack *extack)
-+{
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+
-+	pr_debug("%s: %d %lX\n", __func__, port, flags);
-+	if (priv->r->enable_learning)
-+		priv->r->enable_learning(port, !!(flags & BR_LEARNING));
-+	    
-+	if (priv->r->enable_flood)
-+		priv->r->enable_flood(port, !!(flags & BR_FLOOD));
-+
-+	if (priv->r->enable_mcast_flood)
-+		priv->r->enable_mcast_flood(port, !!(flags & BR_MCAST_FLOOD));
-+
-+	if (priv->r->enable_bcast_flood)
-+		priv->r->enable_bcast_flood(port, !!(flags & BR_BCAST_FLOOD));
-+
-+	return 0;
-+	
- }
- 
- int dsa_phy_read(struct dsa_switch *ds, int phy_addr, int phy_reg)
-@@ -1243,6 +2082,8 @@ int dsa_phy_read(struct dsa_switch *ds, int phy_addr, int phy_reg)
- 	u32 offset = 0;
- 	struct rtl838x_switch_priv *priv = ds->priv;
- 
-+	pr_debug("%s: %X:%X\n", __func__, phy_addr, phy_reg);
-+	if (priv->family_id == RTL8380_FAMILY_ID) {
- 	if (phy_addr >= 24 && phy_addr <= 27
- 		&& priv->ports[24].phy == PHY_RTL838X_SDS) {
- 		if (phy_addr == 26)
-@@ -1250,7 +2091,7 @@ int dsa_phy_read(struct dsa_switch *ds, int phy_addr, int phy_reg)
- 		val = sw_r32(RTL838X_SDS4_FIB_REG0 + offset + (phy_reg << 2)) & 0xffff;
- 		return val;
- 	}
--
-+	}
- 	read_phy(phy_addr, 0, phy_reg, &val);
- 	return val;
- }
-@@ -1259,7 +2100,9 @@ int dsa_phy_write(struct dsa_switch *ds, int phy_addr, int phy_reg, u16 val)
- {
- 	u32 offset = 0;
- 	struct rtl838x_switch_priv *priv = ds->priv;
-+	pr_debug("%s: %X:%X\n", __func__, phy_addr, phy_reg);
- 
-+	if (priv->family_id == RTL8380_FAMILY_ID) {
- 	if (phy_addr >= 24 && phy_addr <= 27
- 	     && priv->ports[24].phy == PHY_RTL838X_SDS) {
- 		if (phy_addr == 26)
-@@ -1267,6 +2110,7 @@ int dsa_phy_write(struct dsa_switch *ds, int phy_addr, int phy_reg, u16 val)
- 		sw_w32(val, RTL838X_SDS4_FIB_REG0 + offset + (phy_reg << 2));
- 		return 0;
- 	}
-+	}
- 	return write_phy(phy_addr, 0, phy_reg, val);
- }
- 
-@@ -1283,6 +2127,7 @@ const struct dsa_switch_ops rtl83xx_switch_ops = {
- 	.phylink_mac_link_down	= rtl83xx_phylink_mac_link_down,
- 	.phylink_mac_link_up	= rtl83xx_phylink_mac_link_up,
- 
-+
- 	.get_strings		= rtl83xx_get_strings,
- 	.get_ethtool_stats	= rtl83xx_get_ethtool_stats,
- 	.get_sset_count		= rtl83xx_get_sset_count,
-@@ -1308,8 +2153,18 @@ const struct dsa_switch_ops rtl83xx_switch_ops = {
- 	.port_fdb_del		= rtl83xx_port_fdb_del,
- 	.port_fdb_dump		= rtl83xx_port_fdb_dump,
- 
-+	.port_mdb_prepare	= rtl83xx_port_mdb_prepare,
-+	.port_mdb_add		= rtl83xx_port_mdb_add,
-+	.port_mdb_del		= rtl83xx_port_mdb_del,
-+
- 	.port_mirror_add	= rtl83xx_port_mirror_add,
- 	.port_mirror_del	= rtl83xx_port_mirror_del,
-+
-+	.port_lag_change	= rtl83xx_port_lag_change,
-+	.port_lag_join		= rtl83xx_port_lag_join,
-+	.port_lag_leave		= rtl83xx_port_lag_leave,
-+	.port_pre_bridge_flags  = rtl83xx_port_pre_bridge_flags,
-+	.port_bridge_flags  = rtl83xx_port_bridge_flags,
- };
- 
- const struct dsa_switch_ops rtl930x_switch_ops = {
-@@ -1319,11 +2174,11 @@ const struct dsa_switch_ops rtl930x_switch_ops = {
- 	.phy_read		= dsa_phy_read,
- 	.phy_write		= dsa_phy_write,
- 
--	.phylink_validate	= rtl83xx_phylink_validate,
--	.phylink_mac_link_state	= rtl83xx_phylink_mac_link_state,
--	.phylink_mac_config	= rtl83xx_phylink_mac_config,
--	.phylink_mac_link_down	= rtl83xx_phylink_mac_link_down,
--	.phylink_mac_link_up	= rtl83xx_phylink_mac_link_up,
-+	.phylink_validate	= rtl93xx_phylink_validate,
-+	.phylink_mac_link_state	= rtl93xx_phylink_mac_link_state,
-+	.phylink_mac_config	= rtl93xx_phylink_mac_config,
-+	.phylink_mac_link_down	= rtl93xx_phylink_mac_link_down,
-+	.phylink_mac_link_up	= rtl93xx_phylink_mac_link_up,
- 
- 	.get_strings		= rtl83xx_get_strings,
- 	.get_ethtool_stats	= rtl83xx_get_ethtool_stats,
-@@ -1332,6 +2187,9 @@ const struct dsa_switch_ops rtl930x_switch_ops = {
- 	.port_enable		= rtl83xx_port_enable,
- 	.port_disable		= rtl83xx_port_disable,
- 
-+	.get_mac_eee		= rtl93xx_get_mac_eee,
-+	.set_mac_eee		= rtl83xx_set_mac_eee,
-+
- 	.set_ageing_time	= rtl83xx_set_l2aging,
- 	.port_bridge_join	= rtl83xx_port_bridge_join,
- 	.port_bridge_leave	= rtl83xx_port_bridge_leave,
-@@ -1346,4 +2204,15 @@ const struct dsa_switch_ops rtl930x_switch_ops = {
- 	.port_fdb_add		= rtl83xx_port_fdb_add,
- 	.port_fdb_del		= rtl83xx_port_fdb_del,
- 	.port_fdb_dump		= rtl83xx_port_fdb_dump,
-+
-+	.port_mdb_prepare	= rtl83xx_port_mdb_prepare,
-+	.port_mdb_add		= rtl83xx_port_mdb_add,
-+	.port_mdb_del		= rtl83xx_port_mdb_del,
-+
-+	.port_lag_change	= rtl83xx_port_lag_change,
-+	.port_lag_join		= rtl83xx_port_lag_join,
-+	.port_lag_leave		= rtl83xx_port_lag_leave,
-+	
-+	.port_pre_bridge_flags  = rtl83xx_port_pre_bridge_flags,
-+	.port_bridge_flags  = rtl83xx_port_bridge_flags,
- };
-diff --git a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl838x.c b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl838x.c
-index de9e83bb8d..72377fb79c 100644
---- a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl838x.c
-+++ b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl838x.c
-@@ -1,10 +1,102 @@
- // SPDX-License-Identifier: GPL-2.0-only
- 
- #include <asm/mach-rtl838x/mach-rtl83xx.h>
-+#include <net/nexthop.h>
-+
- #include "rtl83xx.h"
- 
- extern struct mutex smi_lock;
- 
-+// see_dal_maple_acl_log2PhyTmplteField and src/app/diag_v2/src/diag_acl.c
-+/* Definition of the RTL838X-specific template field IDs as used in the PIE */
-+enum template_field_id {
-+	TEMPLATE_FIELD_SPMMASK = 0,
-+	TEMPLATE_FIELD_SPM0 = 1,	// Source portmask ports 0-15
-+	TEMPLATE_FIELD_SPM1 = 2,	// Source portmask ports 16-28
-+	TEMPLATE_FIELD_RANGE_CHK = 3,
-+	TEMPLATE_FIELD_DMAC0 = 4,	// Destination MAC [15:0]
-+	TEMPLATE_FIELD_DMAC1 = 5,	// Destination MAC [31:16]
-+	TEMPLATE_FIELD_DMAC2 = 6,	// Destination MAC [47:32]
-+	TEMPLATE_FIELD_SMAC0 = 7,	// Source MAC [15:0]
-+	TEMPLATE_FIELD_SMAC1 = 8,	// Source MAC [31:16]
-+	TEMPLATE_FIELD_SMAC2 = 9,	// Source MAC [47:32]
-+	TEMPLATE_FIELD_ETHERTYPE = 10,	// Ethernet typ
-+	TEMPLATE_FIELD_OTAG = 11,	// Outer VLAN tag
-+	TEMPLATE_FIELD_ITAG = 12,	// Inner VLAN tag
-+	TEMPLATE_FIELD_SIP0 = 13,	// IPv4 or IPv6 source IP[15:0] or ARP/RARP
-+					// source protocol address in header
-+	TEMPLATE_FIELD_SIP1 = 14,	// IPv4 or IPv6 source IP[31:16] or ARP/RARP
-+	TEMPLATE_FIELD_DIP0 = 15,	// IPv4 or IPv6 destination IP[15:0]
-+	TEMPLATE_FIELD_DIP1 = 16,	// IPv4 or IPv6 destination IP[31:16]
-+	TEMPLATE_FIELD_IP_TOS_PROTO = 17, // IPv4 TOS/IPv6 traffic class and
-+					  // IPv4 proto/IPv6 next header fields
-+	TEMPLATE_FIELD_L34_HEADER = 18,	// packet with extra tag and IPv6 with auth, dest,
-+					// frag, route, hop-by-hop option header,
-+					// IGMP type, TCP flag
-+	TEMPLATE_FIELD_L4_SPORT = 19,	// TCP/UDP source port
-+	TEMPLATE_FIELD_L4_DPORT = 20,	// TCP/UDP destination port
-+	TEMPLATE_FIELD_ICMP_IGMP = 21,
-+	TEMPLATE_FIELD_IP_RANGE = 22,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_VALID = 23, // Field selector mask
-+	TEMPLATE_FIELD_FIELD_SELECTOR_0 = 24,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_1 = 25,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_2 = 26,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_3 = 27,
-+	TEMPLATE_FIELD_SIP2 = 28,	// IPv6 source IP[47:32]
-+	TEMPLATE_FIELD_SIP3 = 29,	// IPv6 source IP[63:48]
-+	TEMPLATE_FIELD_SIP4 = 30,	// IPv6 source IP[79:64]
-+	TEMPLATE_FIELD_SIP5 = 31,	// IPv6 source IP[95:80]
-+	TEMPLATE_FIELD_SIP6 = 32,	// IPv6 source IP[111:96]
-+	TEMPLATE_FIELD_SIP7 = 33,	// IPv6 source IP[127:112]
-+	TEMPLATE_FIELD_DIP2 = 34,	// IPv6 destination IP[47:32]
-+	TEMPLATE_FIELD_DIP3 = 35,	// IPv6 destination IP[63:48]
-+	TEMPLATE_FIELD_DIP4 = 36,	// IPv6 destination IP[79:64]
-+	TEMPLATE_FIELD_DIP5 = 37,	// IPv6 destination IP[95:80]
-+	TEMPLATE_FIELD_DIP6 = 38,	// IPv6 destination IP[111:96]
-+	TEMPLATE_FIELD_DIP7 = 39,	// IPv6 destination IP[127:112]
-+	TEMPLATE_FIELD_FWD_VID = 40,	// Forwarding VLAN-ID
-+	TEMPLATE_FIELD_FLOW_LABEL = 41,
-+};
-+
-+/*
-+ * The RTL838X SoCs use 5 fixed templates with definitions for which data fields are to
-+ * be copied from the Ethernet Frame header into the 12 User-definable fields of the Packet
-+ * Inspection Engine's buffer. The following defines the field contents for each of the fixed
-+ * templates. Additionally, 3 user-definable templates can be set up via the definitions
-+ * in RTL838X_ACL_TMPLTE_CTRL control registers.
-+ * TODO: See all src/app/diag_v2/src/diag_pie.c
-+ */
-+#define N_FIXED_TEMPLATES 5
-+static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS] =
-+{
-+	{
-+	  TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1, TEMPLATE_FIELD_OTAG,
-+	  TEMPLATE_FIELD_SMAC0, TEMPLATE_FIELD_SMAC1, TEMPLATE_FIELD_SMAC2,
-+	  TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2,
-+	  TEMPLATE_FIELD_ETHERTYPE, TEMPLATE_FIELD_ITAG, TEMPLATE_FIELD_RANGE_CHK
-+	}, {
-+	  TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_DIP0,
-+	  TEMPLATE_FIELD_DIP1,TEMPLATE_FIELD_IP_TOS_PROTO, TEMPLATE_FIELD_L4_SPORT,
-+	  TEMPLATE_FIELD_L4_DPORT, TEMPLATE_FIELD_ICMP_IGMP, TEMPLATE_FIELD_ITAG,
-+	  TEMPLATE_FIELD_RANGE_CHK, TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1
-+	}, {
-+	  TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2,
-+	  TEMPLATE_FIELD_ITAG, TEMPLATE_FIELD_ETHERTYPE, TEMPLATE_FIELD_IP_TOS_PROTO,
-+	  TEMPLATE_FIELD_L4_DPORT, TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_SIP0,
-+	  TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_DIP0, TEMPLATE_FIELD_DIP1
-+	}, {
-+	  TEMPLATE_FIELD_DIP0, TEMPLATE_FIELD_DIP1, TEMPLATE_FIELD_DIP2,
-+	  TEMPLATE_FIELD_DIP3, TEMPLATE_FIELD_DIP4, TEMPLATE_FIELD_DIP5,
-+	  TEMPLATE_FIELD_DIP6, TEMPLATE_FIELD_DIP7, TEMPLATE_FIELD_L4_DPORT,
-+	  TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_ICMP_IGMP, TEMPLATE_FIELD_IP_TOS_PROTO
-+	}, {
-+	  TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_SIP2,
-+	  TEMPLATE_FIELD_SIP3, TEMPLATE_FIELD_SIP4, TEMPLATE_FIELD_SIP5,
-+	  TEMPLATE_FIELD_SIP6, TEMPLATE_FIELD_SIP7, TEMPLATE_FIELD_ITAG,
-+	  TEMPLATE_FIELD_RANGE_CHK, TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1
-+	},
-+};
-+
- void rtl838x_print_matrix(void)
- {
- 	unsigned volatile int *ptr8;
-@@ -12,10 +104,10 @@ void rtl838x_print_matrix(void)
- 
- 	ptr8 = RTL838X_SW_BASE + RTL838X_PORT_ISO_CTRL(0);
- 	for (i = 0; i < 28; i += 8)
--		pr_info("> %8x %8x %8x %8x %8x %8x %8x %8x\n",
-+		pr_debug("> %8x %8x %8x %8x %8x %8x %8x %8x\n",
- 			ptr8[i + 0], ptr8[i + 1], ptr8[i + 2], ptr8[i + 3],
- 			ptr8[i + 4], ptr8[i + 5], ptr8[i + 6], ptr8[i + 7]);
--	pr_info("CPU_PORT> %8x\n", ptr8[28]);
-+	pr_debug("CPU_PORT> %8x\n", ptr8[28]);
- }
- 
- static inline int rtl838x_port_iso_ctrl(int p)
-@@ -42,56 +134,98 @@ static inline int rtl838x_tbl_access_data_0(int i)
- 
- static void rtl838x_vlan_tables_read(u32 vlan, struct rtl838x_vlan_info *info)
- {
--	u32 cmd, v;
-+	u32 v;
-+	// Read VLAN table (0) via register 0
-+	struct table_reg *r = rtl_table_get(RTL8380_TBL_0, 0);
-+
-+	rtl_table_read(r, vlan);
-+	info->tagged_ports = sw_r32(rtl_table_data(r, 0));
-+	v = sw_r32(rtl_table_data(r, 1));
-+	pr_debug("VLAN_READ %d: %016llx %08x\n", vlan, info->tagged_ports, v);
-+	rtl_table_release(r);
- 
--	cmd = BIT(15) /* Execute cmd */
--		| BIT(14) /* Read */
--		| 0 << 12 /* Table type 0b00 */
--		| (vlan & 0xfff);
--	rtl838x_exec_tbl0_cmd(cmd);
--	info->tagged_ports = sw_r32(RTL838X_TBL_ACCESS_DATA_0(0));
--	v = sw_r32(RTL838X_TBL_ACCESS_DATA_0(1));
- 	info->profile_id = v & 0x7;
- 	info->hash_mc_fid = !!(v & 0x8);
- 	info->hash_uc_fid = !!(v & 0x10);
- 	info->fid = (v >> 5) & 0x3f;
- 
--
--	cmd = BIT(15) /* Execute cmd */
--		| BIT(14) /* Read */
--		| 0 << 12 /* Table type 0b00 */
--		| (vlan & 0xfff);
--	rtl838x_exec_tbl1_cmd(cmd);
--	info->untagged_ports = sw_r32(RTL838X_TBL_ACCESS_DATA_1(0));
-+	// Read UNTAG table (0) via table register 1
-+	r = rtl_table_get(RTL8380_TBL_1, 0);
-+	rtl_table_read(r, vlan);
-+	info->untagged_ports = sw_r32(rtl_table_data(r, 0));
-+	rtl_table_release(r);
- }
- 
- static void rtl838x_vlan_set_tagged(u32 vlan, struct rtl838x_vlan_info *info)
- {
--	u32 cmd = BIT(15) /* Execute cmd */
--		| 0 << 14 /* Write */
--		| 0 << 12 /* Table type 0b00 */
--		| (vlan & 0xfff);
- 	u32 v;
-+	// Access VLAN table (0) via register 0
-+	struct table_reg *r = rtl_table_get(RTL8380_TBL_0, 0);
- 
--	sw_w32(info->tagged_ports, RTL838X_TBL_ACCESS_DATA_0(0));
-+	sw_w32(info->tagged_ports, rtl_table_data(r, 0));
- 
- 	v = info->profile_id;
- 	v |= info->hash_mc_fid ? 0x8 : 0;
- 	v |= info->hash_uc_fid ? 0x10 : 0;
- 	v |= ((u32)info->fid) << 5;
-+	sw_w32(v, rtl_table_data(r, 1));
- 
--	sw_w32(v, RTL838X_TBL_ACCESS_DATA_0(1));
--	rtl838x_exec_tbl0_cmd(cmd);
-+	rtl_table_write(r, vlan);
-+	rtl_table_release(r);
- }
- 
- static void rtl838x_vlan_set_untagged(u32 vlan, u64 portmask)
- {
--	u32 cmd = BIT(15) /* Execute cmd */
--		| 0 << 14 /* Write */
--		| 0 << 12 /* Table type 0b00 */
--		| (vlan & 0xfff);
--	sw_w32(portmask & 0x1fffffff, RTL838X_TBL_ACCESS_DATA_1(0));
--	rtl838x_exec_tbl1_cmd(cmd);
-+	// Access UNTAG table (0) via register 1
-+	struct table_reg *r = rtl_table_get(RTL8380_TBL_1, 0);
-+
-+	sw_w32(portmask & 0x1fffffff, rtl_table_data(r, 0));
-+	rtl_table_write(r, vlan);
-+	rtl_table_release(r);
-+}
-+
-+/* Sets the L2 forwarding to be based on either the inner VLAN tag or the outer
-+ */
-+static void rtl838x_vlan_fwd_on_inner(int port, bool is_set)
-+{
-+	if (is_set)
-+		sw_w32_mask(BIT(port), 0, RTL838X_VLAN_PORT_FWD);
-+	else
-+		sw_w32_mask(0, BIT(port), RTL838X_VLAN_PORT_FWD);
-+}
-+
-+static u64 rtl838x_l2_hash_seed(u64 mac, u32 vid)
-+{
-+	return mac << 12 | vid;
-+}
-+
-+/*
-+ * Applies the same hash algorithm as the one used currently by the ASIC to the seed
-+ * and returns a key into the L2 hash table
-+ */
-+static u32 rtl838x_l2_hash_key(struct rtl838x_switch_priv *priv, u64 seed)
-+{
-+	u32 h1, h2, h3, h;
-+
-+	if (sw_r32(priv->r->l2_ctrl_0) & 1) {
-+		h1 = (seed >> 11) & 0x7ff;
-+		h1 = ((h1 & 0x1f) << 6) | ((h1 >> 5) & 0x3f);
-+
-+		h2 = (seed >> 33) & 0x7ff;
-+		h2 = ((h2 & 0x3f) << 5) | ((h2 >> 6) & 0x1f);
-+
-+		h3 = (seed >> 44) & 0x7ff;
-+		h3 = ((h3 & 0x7f) << 4) | ((h3 >> 7) & 0xf);
-+
-+		h = h1 ^ h2 ^ h3 ^ ((seed >> 55) & 0x1ff);
-+		h ^= ((seed >> 22) & 0x7ff) ^ (seed & 0x7ff);
-+	} else {
-+		h = ((seed >> 55) & 0x1ff) ^ ((seed >> 44) & 0x7ff)
-+			^ ((seed >> 33) & 0x7ff) ^ ((seed >> 22) & 0x7ff)
-+			^ ((seed >> 11) & 0x7ff) ^ (seed & 0x7ff);
-+	}
-+
-+	return h;
- }
- 
- static inline int rtl838x_mac_force_mode_ctrl(int p)
-@@ -124,97 +258,300 @@ inline static int rtl838x_trk_mbr_ctr(int group)
- 	return RTL838X_TRK_MBR_CTR + (group << 2);
- }
- 
--static u64 rtl838x_read_l2_entry_using_hash(u32 hash, u32 position, struct rtl838x_l2_entry *e)
-+/*
-+ * Fills an L2 entry structure from the SoC registers
-+ */
-+static void rtl838x_fill_l2_entry(u32 r[], struct rtl838x_l2_entry *e)
-+{
-+	/* Table contains different entry types, we need to identify the right one:
-+	 * Check for MC entries, first
-+	 * In contrast to the RTL93xx SoCs, there is no valid bit, use heuristics to
-+	 * identify valid entries
-+	 */
-+	e->is_ip_mc = !!(r[0] & BIT(22));
-+	e->is_ipv6_mc = !!(r[0] & BIT(21));
-+	e->type = L2_INVALID;
-+
-+	pr_debug("%s: REGISTERS %08x %08x %08x\n", __func__, r[0], r[1], r[2]);
-+	if (!e->is_ip_mc && !e->is_ipv6_mc) {
-+		e->mac[0] = (r[1] >> 20);
-+		e->mac[1] = (r[1] >> 12);
-+		e->mac[2] = (r[1] >> 4);
-+		e->mac[3] = (r[1] & 0xf) << 4 | (r[2] >> 28);
-+		e->mac[4] = (r[2] >> 20);
-+		e->mac[5] = (r[2] >> 12);
-+
-+		e->rvid = r[2] & 0xfff;
-+		e->vid = r[0] & 0xfff;
-+
-+		/* Is it a unicast entry? check multicast bit */
-+		if (!(e->mac[0] & 1)) {
-+			e->is_static = !!((r[0] >> 19) & 1);
-+			e->port = (r[0] >> 12) & 0x1f;
-+			e->block_da = !!(r[1] & BIT(30));
-+			e->block_sa = !!(r[1] & BIT(31));
-+			e->suspended = !!(r[1] & BIT(29));
-+			e->next_hop = !!(r[1] & BIT(28));
-+			if (e->next_hop) {
-+				pr_info("Found next hop entry, need to read extra data\n");
-+				e->nh_vlan_target = !!(r[0] & BIT(9));
-+				e->nh_route_id = r[0] & 0x1ff;
-+				e->vid = e->rvid;
-+			}
-+			e->age = (r[0] >> 17) & 0x3;
-+			e->valid = true;
-+			
-+			/* A valid entry has one of mutli-cast, aging, sa/da-blocking,
-+			 * next-hop or static entry bit set */
-+			if (!(r[0] & 0x007c0000) && !(r[1] & 0xd0000000))
-+				e->valid = false;
-+			else
-+				e->type = L2_UNICAST;
-+		} else { // L2 multicast
-+			pr_debug("Got L2 MC entry: %08x %08x %08x\n", r[0], r[1], r[2]);
-+			e->valid = true;
-+			e->type = L2_MULTICAST;
-+			e->mc_portmask_index = (r[0] >> 12) & 0x1ff;
-+		}
-+	} else { // IPv4 and IPv6 multicast
-+		e->valid = true;
-+		e->mc_portmask_index = (r[0] >> 12) & 0x1ff;
-+		e->mc_gip = (r[1] << 20) | (r[2] >> 12);
-+		e->rvid = r[2] & 0xfff;
-+	}
-+	if (e->is_ip_mc)
-+		e->type = IP4_MULTICAST;
-+	if (e->is_ipv6_mc)
-+		e->type = IP6_MULTICAST;
-+}
-+
-+/*
-+ * Fills the 3 SoC table registers r[] with the information of in the rtl838x_l2_entry
-+ */
-+static void rtl838x_fill_l2_row(u32 r[], struct rtl838x_l2_entry *e)
-+{
-+	u64 mac = ether_addr_to_u64(e->mac);
-+
-+	if (!e->valid) {
-+		r[0] = r[1] = r[2] = 0;
-+		return;
-+	}
-+
-+	r[0] = e->is_ip_mc ? BIT(22) : 0;
-+	r[0] |= e->is_ipv6_mc ? BIT(21) : 0;
-+
-+	if (!e->is_ip_mc && !e->is_ipv6_mc) {
-+		r[1] = mac >> 20;
-+		r[2] = (mac & 0xfffff) << 12;
-+
-+		/* Is it a unicast entry? check multicast bit */
-+		if (!(e->mac[0] & 1)) {
-+			r[0] |= e->is_static ? BIT(19) : 0;
-+			r[0] |= (e->port & 0x3f) << 12;
-+			r[0] |= e->vid;
-+			r[1] |= e->block_da ? BIT(30) : 0;
-+			r[1] |= e->block_sa ? BIT(31) : 0;
-+			r[1] |= e->suspended ? BIT(29) : 0;
-+			r[2] |= e->rvid & 0xfff;
-+			if (e->next_hop) {
-+				r[1] |= BIT(28);
-+				r[0] |= e->nh_vlan_target ? BIT(9) : 0;
-+				r[0] |= e->nh_route_id & 0x1ff;
-+			}
-+			r[0] |= (e->age & 0x3) << 17;
-+		} else { // L2 Multicast
-+			r[0] |= (e->mc_portmask_index & 0x1ff) << 12;
-+			r[0] |= e->vid & 0xfff;
-+			r[2] |= e->rvid & 0xfff;
-+			pr_info("FILL MC: %08x %08x %08x\n", r[0], r[1], r[2]);
-+		}
-+	} else { // IPv4 and IPv6 multicast
-+		r[0] |= (e->mc_portmask_index & 0x1ff) << 12;
-+		r[1] = e->mc_gip >> 20;
-+		r[2] = e->mc_gip << 12;
-+		r[2] |= e->rvid;
-+	}
-+	pr_info("%s: REGISTERS %08x %08x %08x\n", __func__, r[0], r[1], r[2]);
-+}
-+
-+/*
-+ * Read an L2 UC or MC entry out of a hash bucket of the L2 forwarding table
-+ * hash is the id of the bucket and pos is the position of the entry in that bucket
-+ * The data read from the SoC is filled into rtl838x_l2_entry
-+ */
-+static u64 rtl838x_read_l2_entry_using_hash(u32 hash, u32 pos, struct rtl838x_l2_entry *e)
- {
- 	u64 entry;
- 	u32 r[3];
-+	struct table_reg *q = rtl_table_get(RTL8380_TBL_L2, 0); // Access L2 Table 0
-+	u32 idx = (0 << 14) | (hash << 2) | pos; // Search SRAM, with hash and at pos in bucket
-+	int i;
-+
-+	rtl_table_read(q, idx);
-+	for (i= 0; i < 3; i++)
-+		r[i] = sw_r32(rtl_table_data(q, i));
- 
--	/* Search in SRAM, with hash and at position in hash bucket (0-3) */
--	u32 idx = (0 << 14) | (hash << 2) | position;
--
--	u32 cmd = BIT(16) /* Execute cmd */
--		| BIT(15) /* Read */
--		| 0 << 13 /* Table type 0b00 */
--		| (idx & 0x1fff);
--
--	sw_w32(cmd, RTL838X_TBL_ACCESS_L2_CTRL);
--	do { }  while (sw_r32(RTL838X_TBL_ACCESS_L2_CTRL) & BIT(16));
--	r[0] = sw_r32(RTL838X_TBL_ACCESS_L2_DATA(0));
--	r[1] = sw_r32(RTL838X_TBL_ACCESS_L2_DATA(1));
--	r[2] = sw_r32(RTL838X_TBL_ACCESS_L2_DATA(2));
--
--	e->mac[0] = (r[1] >> 20);
--	e->mac[1] = (r[1] >> 12);
--	e->mac[2] = (r[1] >> 4);
--	e->mac[3] = (r[1] & 0xf) << 4 | (r[2] >> 28);
--	e->mac[4] = (r[2] >> 20);
--	e->mac[5] = (r[2] >> 12);
--	e->is_static = !!((r[0] >> 19) & 1);
--	e->vid = r[0] & 0xfff;
--	e->rvid = r[2] & 0xfff;
--	e->port = (r[0] >> 12) & 0x1f;
--
--	e->valid = true;
--	if (!(r[0] >> 17)) /* Check for invalid entry */
--		e->valid = false;
--
--	if (e->valid)
--		pr_debug("Found in Hash: R1 %x R2 %x R3 %x\n", r[0], r[1], r[2]);
--
--	entry = (((u64) r[1]) << 32) | (r[2] & 0xfffff000) | (r[0] & 0xfff);
-+	rtl_table_release(q);
-+
-+	rtl838x_fill_l2_entry(r, e);
-+	if (!e->valid)
-+		return 0;
-+
-+	entry = (((u64) r[1]) << 32) | (r[2]);  // mac and vid concatenated as hash seed
- 	return entry;
- }
- 
-+static void rtl838x_write_l2_entry_using_hash(u32 hash, u32 pos, struct rtl838x_l2_entry *e)
-+{
-+	u32 r[3];
-+	struct table_reg *q = rtl_table_get(RTL8380_TBL_L2, 0);
-+	int i;
-+
-+	u32 idx = (0 << 14) | (hash << 2) | pos; // Access SRAM, with hash and at pos in bucket
-+
-+	rtl838x_fill_l2_row(r, e);
-+
-+	for (i= 0; i < 3; i++)
-+		sw_w32(r[i], rtl_table_data(q, i));
-+
-+	rtl_table_write(q, idx);
-+	rtl_table_release(q);
-+}
-+
- static u64 rtl838x_read_cam(int idx, struct rtl838x_l2_entry *e)
- {
- 	u64 entry;
- 	u32 r[3];
-+	struct table_reg *q = rtl_table_get(RTL8380_TBL_L2, 1); // Access L2 Table 1
-+	int i;
-+
-+	rtl_table_read(q, idx);
-+	for (i= 0; i < 3; i++)
-+		r[i] = sw_r32(rtl_table_data(q, i));
- 
--	u32 cmd = BIT(16) /* Execute cmd */
--		| BIT(15) /* Read */
--		| BIT(13) /* Table type 0b01 */
--		| (idx & 0x3f);
--	sw_w32(cmd, RTL838X_TBL_ACCESS_L2_CTRL);
--	do { }  while (sw_r32(RTL838X_TBL_ACCESS_L2_CTRL) & BIT(16));
--	r[0] = sw_r32(RTL838X_TBL_ACCESS_L2_DATA(0));
--	r[1] = sw_r32(RTL838X_TBL_ACCESS_L2_DATA(1));
--	r[2] = sw_r32(RTL838X_TBL_ACCESS_L2_DATA(2));
--
--	e->mac[0] = (r[1] >> 20);
--	e->mac[1] = (r[1] >> 12);
--	e->mac[2] = (r[1] >> 4);
--	e->mac[3] = (r[1] & 0xf) << 4 | (r[2] >> 28);
--	e->mac[4] = (r[2] >> 20);
--	e->mac[5] = (r[2] >> 12);
--	e->is_static = !!((r[0] >> 19) & 1);
--	e->vid = r[0] & 0xfff;
--	e->rvid = r[2] & 0xfff;
--	e->port = (r[0] >> 12) & 0x1f;
--
--	e->valid = true;
--	if (!(r[0] >> 17)) /* Check for invalid entry */
--		e->valid = false;
--
--	if (e->valid)
--		pr_debug("Found in CAM: R1 %x R2 %x R3 %x\n", r[0], r[1], r[2]);
--
--	entry = (((u64) r[1]) << 32) | (r[2] & 0xfffff000) | (r[0] & 0xfff);
-+	rtl_table_release(q);
-+
-+	rtl838x_fill_l2_entry(r, e);
-+	if (!e->valid)
-+		return 0;
-+
-+	pr_debug("Found in CAM: R1 %x R2 %x R3 %x\n", r[0], r[1], r[2]);
-+
-+	// Return MAC with concatenated VID ac concatenated ID
-+	entry = (((u64) r[1]) << 32) | r[2];
- 	return entry;
- }
- 
--static inline int rtl838x_vlan_profile(int profile)
-+static void rtl838x_write_cam(int idx, struct rtl838x_l2_entry *e)
-+{
-+	u32 r[3];
-+	struct table_reg *q = rtl_table_get(RTL8380_TBL_L2, 1); // Access L2 Table 1
-+	int i;
-+
-+	rtl838x_fill_l2_row(r, e);
-+
-+	for (i= 0; i < 3; i++)
-+		sw_w32(r[i], rtl_table_data(q, i));
-+
-+	rtl_table_write(q, idx);
-+	rtl_table_release(q);
-+}
-+
-+
-+static u64 rtl838x_read_mcast_pmask(int idx)
-+{
-+	u32 portmask;
-+	// Read MC_PMSK (2) via register RTL8380_TBL_L2
-+	struct table_reg *q = rtl_table_get(RTL8380_TBL_L2, 2);
-+
-+	rtl_table_read(q, idx);
-+	portmask = sw_r32(rtl_table_data(q, 0));
-+	rtl_table_release(q);
-+
-+	return portmask;
-+}
-+
-+static void rtl838x_write_mcast_pmask(int idx, u64 portmask)
-+{
-+	// Access MC_PMSK (2) via register RTL8380_TBL_L2
-+	struct table_reg *q = rtl_table_get(RTL8380_TBL_L2, 2);
-+
-+	sw_w32(((u32)portmask) & 0x1fffffff, rtl_table_data(q, 0));
-+	rtl_table_write(q, idx);
-+	rtl_table_release(q);
-+}
-+
-+static void rtl838x_vlan_profile_setup(int profile)
- {
--	return RTL838X_VLAN_PROFILE(profile);
-+	u32 pmask_id = UNKNOWN_MC_PMASK;
-+	// Enable L2 Learning BIT 0, portmask UNKNOWN_MC_PMASK for unknown MC traffic flooding
-+	u32 p = 1 | pmask_id << 1 | pmask_id << 10 | pmask_id << 19;
-+
-+	sw_w32(p, RTL838X_VLAN_PROFILE(profile));
-+
-+	/* RTL8380 and RTL8390 use an index into the portmask table to set the
-+	 * unknown multicast portmask, setup a default at a safe location
-+	 * On RTL93XX, the portmask is directly set in the profile,
-+	 * see e.g. rtl9300_vlan_profile_setup
-+	 */
-+	rtl838x_write_mcast_pmask(UNKNOWN_MC_PMASK, 0x1fffffff);
- }
- 
--static inline int rtl838x_vlan_port_egr_filter(int port)
-+static void rtl838x_l2_learning_setup(void)
- {
--	return RTL838X_VLAN_PORT_EGR_FLTR;
-+	/* Set portmask for broadcast traffic and unknown unicast address flooding
-+	 * to the reserved entry in the portmask table used also for
-+	 * multicast flooding */
-+	sw_w32(UNKNOWN_MC_PMASK << 12 | UNKNOWN_MC_PMASK, RTL838X_L2_FLD_PMSK);
-+
-+	/* Enable learning constraint system-wide (bit 0), per-port (bit 1)
-+	 * and per vlan (bit 2) */
-+	sw_w32(0x7, RTL838X_L2_LRN_CONSTRT_EN);
-+
-+	// Limit learning to maximum: 16k entries, after that just flood (bits 0-1)
-+	sw_w32((0x3fff << 2) | 0, RTL838X_L2_LRN_CONSTRT);
-+
-+	// Do not trap ARP packets to CPU_PORT
-+	sw_w32(0, RTL838X_SPCL_TRAP_ARP_CTRL);
- }
- 
--static inline int rtl838x_vlan_port_igr_filter(int port)
-+static void rtl838x_enable_learning(int port, bool enable)
- {
--	return RTL838X_VLAN_PORT_IGR_FLTR(port);
-+	// Limit learning to maximum: 32k entries, after that just flood (bits 0-1)
-+	
-+	if (enable)  {
-+		// flood after 32k entries
-+		sw_w32((0x3fff << 2) | 0, RTL838X_L2_PORT_LRN_CONSTRT + (port << 2));
-+	} else { 
-+		// just forward
-+		sw_w32(0, RTL838X_L2_PORT_LRN_CONSTRT + (port << 2));
-+	}
-+
-+}
-+static void rtl838x_enable_flood(int port, bool enable)
-+{
-+	u32 flood_mask = sw_r32(RTL838X_L2_PORT_LRN_CONSTRT + (port << 2));
-+
-+	if (enable)  {
-+		// flood
-+		flood_mask &=~3;
-+		flood_mask |=0;
-+		sw_w32(flood_mask, RTL838X_L2_PORT_LRN_CONSTRT + (port << 2));
-+	} else {
-+		// drop (bit 1)
-+		flood_mask &=~3; 
-+		flood_mask |=1;
-+		sw_w32(flood_mask, RTL838X_L2_PORT_LRN_CONSTRT + (port << 2));
-+	}
-+
-+}
-+static void rtl838x_enable_mcast_flood(int port, bool enable)
-+{
-+
-+}
-+static void rtl838x_enable_bcast_flood(int port, bool enable)
-+{
-+
- }
- 
- static void rtl838x_stp_get(struct rtl838x_switch_priv *priv, u16 msti, u32 port_state[])
-@@ -263,6 +600,1056 @@ void rtl838x_traffic_disable(int source, int dest)
- 	rtl838x_mask_port_reg(BIT(dest), 0, rtl838x_port_iso_ctrl(source));
- }
- 
-+/*
-+ * Enables or disables the EEE/EEEP capability of a port
-+ */
-+static void rtl838x_port_eee_set(struct rtl838x_switch_priv *priv, int port, bool enable)
-+{
-+	u32 v;
-+
-+	// This works only for Ethernet ports, and on the RTL838X, ports from 24 are SFP
-+	if (port >= 24)
-+		return;
-+
-+	pr_debug("In %s: setting port %d to %d\n", __func__, port, enable);
-+	v = enable ? 0x3 : 0x0;
-+
-+	// Set EEE state for 100 (bit 9) & 1000MBit (bit 10)
-+	sw_w32_mask(0x3 << 9, v << 9, priv->r->mac_force_mode_ctrl(port));
-+
-+	// Set TX/RX EEE state
-+	if (enable) {
-+		sw_w32_mask(0, BIT(port), RTL838X_EEE_PORT_TX_EN);
-+		sw_w32_mask(0, BIT(port), RTL838X_EEE_PORT_RX_EN);
-+	} else {
-+		sw_w32_mask(BIT(port), 0, RTL838X_EEE_PORT_TX_EN);
-+		sw_w32_mask(BIT(port), 0, RTL838X_EEE_PORT_RX_EN);
-+	}
-+	priv->ports[port].eee_enabled = enable;
-+}
-+
-+
-+/*
-+ * Get EEE own capabilities and negotiation result
-+ */
-+static int rtl838x_eee_port_ability(struct rtl838x_switch_priv *priv,
-+				    struct ethtool_eee *e, int port)
-+{
-+	u64 link;
-+
-+	if (port >= 24)
-+		return 0;
-+
-+	link = rtl839x_get_port_reg_le(RTL838X_MAC_LINK_STS);
-+	if (!(link & BIT(port)))
-+		return 0;
-+
-+	if (sw_r32(rtl838x_mac_force_mode_ctrl(port)) & BIT(9))
-+		e->advertised |= ADVERTISED_100baseT_Full;
-+
-+	if (sw_r32(rtl838x_mac_force_mode_ctrl(port)) & BIT(10))
-+		e->advertised |= ADVERTISED_1000baseT_Full;
-+
-+	if (sw_r32(RTL838X_MAC_EEE_ABLTY) & BIT(port)) {
-+		e->lp_advertised = ADVERTISED_100baseT_Full;
-+		e->lp_advertised |= ADVERTISED_1000baseT_Full;
-+		return 1;
-+	}
-+
-+	return 0;
-+}
-+
-+static void rtl838x_init_eee(struct rtl838x_switch_priv *priv, bool enable)
-+{
-+	int i;
-+
-+	pr_info("Setting up EEE, state: %d\n", enable);
-+	sw_w32_mask(0x4, 0, RTL838X_SMI_GLB_CTRL);
-+
-+	/* Set timers for EEE */
-+	sw_w32(0x5001411, RTL838X_EEE_TX_TIMER_GIGA_CTRL);
-+	sw_w32(0x5001417, RTL838X_EEE_TX_TIMER_GELITE_CTRL);
-+
-+	// Enable EEE MAC support on ports
-+	for (i = 0; i < priv->cpu_port; i++) {
-+		if (priv->ports[i].phy)
-+			rtl838x_port_eee_set(priv, i, enable);
-+	}
-+	priv->eee_enabled = enable;
-+}
-+
-+static void rtl838x_pie_lookup_enable(struct rtl838x_switch_priv *priv, int index)
-+{
-+	int block = index / PIE_BLOCK_SIZE;
-+	u32 block_state = sw_r32(RTL838X_ACL_BLK_LOOKUP_CTRL);
-+
-+	// Make sure rule-lookup is enabled in the block
-+	if (!(block_state & BIT(block)))
-+		sw_w32(block_state | BIT(block), RTL838X_ACL_BLK_LOOKUP_CTRL);
-+}
-+
-+static void rtl838x_pie_rule_del(struct rtl838x_switch_priv *priv, int index_from, int index_to)
-+{
-+	int block_from = index_from / PIE_BLOCK_SIZE;
-+	int block_to = index_to / PIE_BLOCK_SIZE;
-+	u32 v = (index_from << 1)| (index_to << 12 ) | BIT(0);
-+	int block;
-+	u32 block_state;
-+
-+	pr_info("%s: from %d to %d\n", __func__, index_from, index_to);
-+	mutex_lock(&priv->reg_mutex);
-+
-+	// Remember currently active blocks
-+	block_state = sw_r32(RTL838X_ACL_BLK_LOOKUP_CTRL);
-+
-+	// Make sure rule-lookup is disabled in the relevant blocks
-+	for (block = block_from; block <= block_to; block++) {
-+		if (block_state & BIT(block))
-+			sw_w32(block_state & (~BIT(block)), RTL838X_ACL_BLK_LOOKUP_CTRL);
-+	}
-+
-+	// Write from-to and execute bit into control register
-+	sw_w32(v, RTL838X_ACL_CLR_CTRL);
-+
-+	// Wait until command has completed
-+	do {
-+	} while (sw_r32(RTL838X_ACL_CLR_CTRL) & BIT(0));
-+
-+	// Re-enable rule lookup
-+	for (block = block_from; block <= block_to; block++) {
-+		if (!(block_state & BIT(block)))
-+			sw_w32(block_state | BIT(block), RTL838X_ACL_BLK_LOOKUP_CTRL);
-+	}
-+
-+	mutex_unlock(&priv->reg_mutex);
-+}
-+
-+/*
-+ * Reads the intermediate representation of the templated match-fields of the
-+ * PIE rule in the pie_rule structure and fills in the raw data fields in the
-+ * raw register space r[].
-+ * The register space configuration size is identical for the RTL8380/90 and RTL9300,
-+ * however the RTL9310 has 2 more registers / fields and the physical field-ids
-+ * are specific to every platform.
-+ */
-+static void rtl838x_write_pie_templated(u32 r[], struct pie_rule *pr, enum template_field_id t[])
-+{
-+	int i;
-+	enum template_field_id field_type;
-+	u16 data, data_m;
-+
-+	for (i = 0; i < N_FIXED_FIELDS; i++) {
-+		field_type = t[i];
-+		data = data_m = 0;
-+
-+		switch (field_type) {
-+		case TEMPLATE_FIELD_SPM0:
-+			data = pr->spm;
-+			data_m = pr->spm_m;
-+			break;
-+		case TEMPLATE_FIELD_SPM1:
-+			data = pr->spm >> 16;
-+			data_m = pr->spm_m >> 16;
-+			break;
-+		case TEMPLATE_FIELD_OTAG:
-+			data = pr->otag;
-+			data_m = pr->otag_m;
-+			break;
-+		case TEMPLATE_FIELD_SMAC0:
-+			data = pr->smac[4];
-+			data = (data << 8) | pr->smac[5];
-+			data_m = pr->smac_m[4];
-+			data_m = (data_m << 8) | pr->smac_m[5];
-+			break;
-+		case TEMPLATE_FIELD_SMAC1:
-+			data = pr->smac[2];
-+			data = (data << 8) | pr->smac[3];
-+			data_m = pr->smac_m[2];
-+			data_m = (data_m << 8) | pr->smac_m[3];
-+			break;
-+		case TEMPLATE_FIELD_SMAC2:
-+			data = pr->smac[0];
-+			data = (data << 8) | pr->smac[1];
-+			data_m = pr->smac_m[0];
-+			data_m = (data_m << 8) | pr->smac_m[1];
-+			break;
-+		case TEMPLATE_FIELD_DMAC0:
-+			data = pr->dmac[4];
-+			data = (data << 8) | pr->dmac[5];
-+			data_m = pr->dmac_m[4];
-+			data_m = (data_m << 8) | pr->dmac_m[5];
-+			break;
-+		case TEMPLATE_FIELD_DMAC1:
-+			data = pr->dmac[2];
-+			data = (data << 8) | pr->dmac[3];
-+			data_m = pr->dmac_m[2];
-+			data_m = (data_m << 8) | pr->dmac_m[3];
-+			break;
-+		case TEMPLATE_FIELD_DMAC2:
-+			data = pr->dmac[0];
-+			data = (data << 8) | pr->dmac[1];
-+			data_m = pr->dmac_m[0];
-+			data_m = (data_m << 8) | pr->dmac_m[1];
-+			break;
-+		case TEMPLATE_FIELD_ETHERTYPE:
-+			data = pr->ethertype;
-+			data_m = pr->ethertype_m;
-+			break;
-+		case TEMPLATE_FIELD_ITAG:
-+			data = pr->itag;
-+			data_m = pr->itag_m;
-+			break;
-+		case TEMPLATE_FIELD_RANGE_CHK:
-+			data = pr->field_range_check;
-+			data_m = pr->field_range_check_m;
-+			break;
-+		case TEMPLATE_FIELD_SIP0:
-+			if (pr->is_ipv6) {
-+				data = pr->sip6.s6_addr16[7];
-+				data_m = pr->sip6_m.s6_addr16[7];
-+			} else {
-+				data = pr->sip;
-+				data_m = pr->sip_m;
-+			}
-+			break;
-+		case TEMPLATE_FIELD_SIP1:
-+			if (pr->is_ipv6) {
-+				data = pr->sip6.s6_addr16[6];
-+				data_m = pr->sip6_m.s6_addr16[6];
-+			} else {
-+				data = pr->sip >> 16;
-+				data_m = pr->sip_m >> 16;
-+			}
-+			break;
-+
-+		case TEMPLATE_FIELD_SIP2:
-+		case TEMPLATE_FIELD_SIP3:
-+		case TEMPLATE_FIELD_SIP4:
-+		case TEMPLATE_FIELD_SIP5:
-+		case TEMPLATE_FIELD_SIP6:
-+		case TEMPLATE_FIELD_SIP7:
-+			data = pr->sip6.s6_addr16[5 - (field_type - TEMPLATE_FIELD_SIP2)];
-+			data_m = pr->sip6_m.s6_addr16[5 - (field_type - TEMPLATE_FIELD_SIP2)];
-+			break;
-+
-+		case TEMPLATE_FIELD_DIP0:
-+			if (pr->is_ipv6) {
-+				data = pr->dip6.s6_addr16[7];
-+				data_m = pr->dip6_m.s6_addr16[7];
-+			} else {
-+				data = pr->dip;
-+				data_m = pr->dip_m;
-+			}
-+			break;
-+
-+		case TEMPLATE_FIELD_DIP1:
-+			if (pr->is_ipv6) {
-+				data = pr->dip6.s6_addr16[6];
-+				data_m = pr->dip6_m.s6_addr16[6];
-+			} else {
-+				data = pr->dip >> 16;
-+				data_m = pr->dip_m >> 16;
-+			}
-+			break;
-+
-+		case TEMPLATE_FIELD_DIP2:
-+		case TEMPLATE_FIELD_DIP3:
-+		case TEMPLATE_FIELD_DIP4:
-+		case TEMPLATE_FIELD_DIP5:
-+		case TEMPLATE_FIELD_DIP6:
-+		case TEMPLATE_FIELD_DIP7:
-+			data = pr->dip6.s6_addr16[5 - (field_type - TEMPLATE_FIELD_DIP2)];
-+			data_m = pr->dip6_m.s6_addr16[5 - (field_type - TEMPLATE_FIELD_DIP2)];
-+			break;
-+
-+		case TEMPLATE_FIELD_IP_TOS_PROTO:
-+			data = pr->tos_proto;
-+			data_m = pr->tos_proto_m;
-+			break;
-+		case TEMPLATE_FIELD_L4_SPORT:
-+			data = pr->sport;
-+			data_m = pr->sport_m;
-+			break;
-+		case TEMPLATE_FIELD_L4_DPORT:
-+			data = pr->dport;
-+			data_m = pr->dport_m;
-+			break;
-+		case TEMPLATE_FIELD_ICMP_IGMP:
-+			data = pr->icmp_igmp;
-+			data_m = pr->icmp_igmp_m;
-+			break;
-+		default:
-+			pr_info("%s: unknown field %d\n", __func__, field_type);
-+			continue;
-+		}
-+		if (!(i % 2)) {
-+			r[5 - i / 2] = data;
-+			r[12 - i / 2] = data_m;
-+		} else {
-+			r[5 - i / 2] |= ((u32)data) << 16;
-+			r[12 - i / 2] |= ((u32)data_m) << 16;
-+		}
-+	}
-+}
-+
-+/*
-+ * Creates the intermediate representation of the templated match-fields of the
-+ * PIE rule in the pie_rule structure by reading the raw data fields in the
-+ * raw register space r[].
-+ * The register space configuration size is identical for the RTL8380/90 and RTL9300,
-+ * however the RTL9310 has 2 more registers / fields and the physical field-ids
-+ */
-+static void rtl838x_read_pie_templated(u32 r[], struct pie_rule *pr, enum template_field_id t[])
-+{
-+	int i;
-+	enum template_field_id field_type;
-+	u16 data, data_m;
-+
-+	for (i = 0; i < N_FIXED_FIELDS; i++) {
-+		field_type = t[i];
-+		if (!(i % 2)) {
-+			data = r[5 - i / 2];
-+			data_m = r[12 - i / 2];
-+		} else {
-+			data = r[5 - i / 2] >> 16;
-+			data_m = r[12 - i / 2] >> 16;
-+		}
-+
-+		switch (field_type) {
-+		case TEMPLATE_FIELD_SPM0:
-+			pr->spm = (pr->spn << 16) | data;
-+			pr->spm_m = (pr->spn << 16) | data_m;
-+			break;
-+		case TEMPLATE_FIELD_SPM1:
-+			pr->spm = data;
-+			pr->spm_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_OTAG:
-+			pr->otag = data;
-+			pr->otag_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_SMAC0:
-+			pr->smac[4] = data >> 8;
-+			pr->smac[5] = data;
-+			pr->smac_m[4] = data >> 8;
-+			pr->smac_m[5] = data;
-+			break;
-+		case TEMPLATE_FIELD_SMAC1:
-+			pr->smac[2] = data >> 8;
-+			pr->smac[3] = data;
-+			pr->smac_m[2] = data >> 8;
-+			pr->smac_m[3] = data;
-+			break;
-+		case TEMPLATE_FIELD_SMAC2:
-+			pr->smac[0] = data >> 8;
-+			pr->smac[1] = data;
-+			pr->smac_m[0] = data >> 8;
-+			pr->smac_m[1] = data;
-+			break;
-+		case TEMPLATE_FIELD_DMAC0:
-+			pr->dmac[4] = data >> 8;
-+			pr->dmac[5] = data;
-+			pr->dmac_m[4] = data >> 8;
-+			pr->dmac_m[5] = data;
-+			break;
-+		case TEMPLATE_FIELD_DMAC1:
-+			pr->dmac[2] = data >> 8;
-+			pr->dmac[3] = data;
-+			pr->dmac_m[2] = data >> 8;
-+			pr->dmac_m[3] = data;
-+			break;
-+		case TEMPLATE_FIELD_DMAC2:
-+			pr->dmac[0] = data >> 8;
-+			pr->dmac[1] = data;
-+			pr->dmac_m[0] = data >> 8;
-+			pr->dmac_m[1] = data;
-+			break;
-+		case TEMPLATE_FIELD_ETHERTYPE:
-+			pr->ethertype = data;
-+			pr->ethertype_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_ITAG:
-+			pr->itag = data;
-+			pr->itag_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_RANGE_CHK:
-+			pr->field_range_check = data;
-+			pr->field_range_check_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_SIP0:
-+			pr->sip = data;
-+			pr->sip_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_SIP1:
-+			pr->sip = (pr->sip << 16) | data;
-+			pr->sip_m = (pr->sip << 16) | data_m;
-+			break;
-+		case TEMPLATE_FIELD_SIP2:
-+			pr->is_ipv6 = true;
-+			// Make use of limitiations on the position of the match values
-+			ipv6_addr_set(&pr->sip6, pr->sip, r[5 - i / 2],
-+				      r[4 - i / 2], r[3 - i / 2]);
-+			ipv6_addr_set(&pr->sip6_m, pr->sip_m, r[5 - i / 2],
-+				      r[4 - i / 2], r[3 - i / 2]);
-+		case TEMPLATE_FIELD_SIP3:
-+		case TEMPLATE_FIELD_SIP4:
-+		case TEMPLATE_FIELD_SIP5:
-+		case TEMPLATE_FIELD_SIP6:
-+		case TEMPLATE_FIELD_SIP7:
-+			break;
-+
-+		case TEMPLATE_FIELD_DIP0:
-+			pr->dip = data;
-+			pr->dip_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_DIP1:
-+			pr->dip = (pr->dip << 16) | data;
-+			pr->dip_m = (pr->dip << 16) | data_m;
-+			break;
-+		case TEMPLATE_FIELD_DIP2:
-+			pr->is_ipv6 = true;
-+			ipv6_addr_set(&pr->dip6, pr->dip, r[5 - i / 2],
-+				      r[4 - i / 2], r[3 - i / 2]);
-+			ipv6_addr_set(&pr->dip6_m, pr->dip_m, r[5 - i / 2],
-+				      r[4 - i / 2], r[3 - i / 2]);
-+		case TEMPLATE_FIELD_DIP3:
-+		case TEMPLATE_FIELD_DIP4:
-+		case TEMPLATE_FIELD_DIP5:
-+		case TEMPLATE_FIELD_DIP6:
-+		case TEMPLATE_FIELD_DIP7:
-+			break;
-+		case TEMPLATE_FIELD_IP_TOS_PROTO:
-+			pr->tos_proto = data;
-+			pr->tos_proto_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_L4_SPORT:
-+			pr->sport = data;
-+			pr->sport_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_L4_DPORT:
-+			pr->dport = data;
-+			pr->dport_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_ICMP_IGMP:
-+			pr->icmp_igmp = data;
-+			pr->icmp_igmp_m = data_m;
-+			break;
-+		default:
-+			pr_info("%s: unknown field %d\n", __func__, field_type);
-+		}
-+	}
-+}
-+
-+static void rtl838x_read_pie_fixed_fields(u32 r[], struct pie_rule *pr)
-+{
-+	pr->spmmask_fix = (r[6] >> 22) & 0x3;
-+	pr->spn = (r[6] >> 16) & 0x3f;
-+	pr->mgnt_vlan = (r[6] >> 15) & 1;
-+	pr->dmac_hit_sw = (r[6] >> 14) & 1;
-+	pr->not_first_frag = (r[6] >> 13) & 1;
-+	pr->frame_type_l4 = (r[6] >> 10) & 7;
-+	pr->frame_type = (r[6] >> 8) & 3;
-+	pr->otag_fmt = (r[6] >> 7) & 1;
-+	pr->itag_fmt = (r[6] >> 6) & 1;
-+	pr->otag_exist = (r[6] >> 5) & 1;
-+	pr->itag_exist = (r[6] >> 4) & 1;
-+	pr->frame_type_l2 = (r[6] >> 2) & 3;
-+	pr->tid = r[6] & 3;
-+
-+	pr->spmmask_fix_m = (r[13] >> 22) & 0x3;
-+	pr->spn_m = (r[13] >> 16) & 0x3f;
-+	pr->mgnt_vlan_m = (r[13] >> 15) & 1;
-+	pr->dmac_hit_sw_m = (r[13] >> 14) & 1;
-+	pr->not_first_frag_m = (r[13] >> 13) & 1;
-+	pr->frame_type_l4_m = (r[13] >> 10) & 7;
-+	pr->frame_type_m = (r[13] >> 8) & 3;
-+	pr->otag_fmt_m = (r[13] >> 7) & 1;
-+	pr->itag_fmt_m = (r[13] >> 6) & 1;
-+	pr->otag_exist_m = (r[13] >> 5) & 1;
-+	pr->itag_exist_m = (r[13] >> 4) & 1;
-+	pr->frame_type_l2_m = (r[13] >> 2) & 3;
-+	pr->tid_m = r[13] & 3;
-+
-+	pr->valid = r[14] & BIT(31);
-+	pr->cond_not = r[14] & BIT(30);
-+	pr->cond_and1 = r[14] & BIT(29);
-+	pr->cond_and2 = r[14] & BIT(28);
-+	pr->ivalid = r[14] & BIT(27);
-+
-+	pr->drop = (r[17] >> 14) & 3;
-+	pr->fwd_sel = r[17] & BIT(13);
-+	pr->ovid_sel = r[17] & BIT(12);
-+	pr->ivid_sel = r[17] & BIT(11);
-+	pr->flt_sel = r[17] & BIT(10);
-+	pr->log_sel = r[17] & BIT(9);
-+	pr->rmk_sel = r[17] & BIT(8);
-+	pr->meter_sel = r[17] & BIT(7);
-+	pr->tagst_sel = r[17] & BIT(6);
-+	pr->mir_sel = r[17] & BIT(5);
-+	pr->nopri_sel = r[17] & BIT(4);
-+	pr->cpupri_sel = r[17] & BIT(3);
-+	pr->otpid_sel = r[17] & BIT(2);
-+	pr->itpid_sel = r[17] & BIT(1);
-+	pr->shaper_sel = r[17] & BIT(0);
-+}
-+
-+static void rtl838x_write_pie_fixed_fields(u32 r[],  struct pie_rule *pr)
-+{
-+	r[6] = ((u32) (pr->spmmask_fix & 0x3)) << 22;
-+	r[6] |= ((u32) (pr->spn & 0x3f)) << 16;
-+	r[6] |= pr->mgnt_vlan ? BIT(15) : 0;
-+	r[6] |= pr->dmac_hit_sw ? BIT(14) : 0;
-+	r[6] |= pr->not_first_frag ? BIT(13) : 0;
-+	r[6] |= ((u32) (pr->frame_type_l4 & 0x7)) << 10;
-+	r[6] |= ((u32) (pr->frame_type & 0x3)) << 8;
-+	r[6] |= pr->otag_fmt ? BIT(7) : 0;
-+	r[6] |= pr->itag_fmt ? BIT(6) : 0;
-+	r[6] |= pr->otag_exist ? BIT(5) : 0;
-+	r[6] |= pr->itag_exist ? BIT(4) : 0;
-+	r[6] |= ((u32) (pr->frame_type_l2 & 0x3)) << 2;
-+	r[6] |= ((u32) (pr->tid & 0x3));
-+
-+	r[13] = ((u32) (pr->spmmask_fix_m & 0x3)) << 22;
-+	r[13] |= ((u32) (pr->spn_m & 0x3f)) << 16;
-+	r[13] |= pr->mgnt_vlan_m ? BIT(15) : 0;
-+	r[13] |= pr->dmac_hit_sw_m ? BIT(14) : 0;
-+	r[13] |= pr->not_first_frag_m ? BIT(13) : 0;
-+	r[13] |= ((u32) (pr->frame_type_l4_m & 0x7)) << 10;
-+	r[13] |= ((u32) (pr->frame_type_m & 0x3)) << 8;
-+	r[13] |= pr->otag_fmt_m ? BIT(7) : 0;
-+	r[13] |= pr->itag_fmt_m ? BIT(6) : 0;
-+	r[13] |= pr->otag_exist_m ? BIT(5) : 0;
-+	r[13] |= pr->itag_exist_m ? BIT(4) : 0;
-+	r[13] |= ((u32) (pr->frame_type_l2_m & 0x3)) << 2;
-+	r[13] |= ((u32) (pr->tid_m & 0x3));
-+
-+	r[14] = pr->valid ? BIT(31) : 0;
-+	r[14] |= pr->cond_not ? BIT(30) : 0;
-+	r[14] |= pr->cond_and1 ? BIT(29) : 0;
-+	r[14] |= pr->cond_and2 ? BIT(28) : 0;
-+	r[14] |= pr->ivalid ? BIT(27) : 0;
-+
-+	if (pr->drop)
-+		r[17] = 0x1 << 14;	// Standard drop action
-+	else
-+		r[17] = 0;
-+	r[17] |= pr->fwd_sel ? BIT(13) : 0;
-+	r[17] |= pr->ovid_sel ? BIT(12) : 0;
-+	r[17] |= pr->ivid_sel ? BIT(11) : 0;
-+	r[17] |= pr->flt_sel ? BIT(10) : 0;
-+	r[17] |= pr->log_sel ? BIT(9) : 0;
-+	r[17] |= pr->rmk_sel ? BIT(8) : 0;
-+	r[17] |= pr->meter_sel ? BIT(7) : 0;
-+	r[17] |= pr->tagst_sel ? BIT(6) : 0;
-+	r[17] |= pr->mir_sel ? BIT(5) : 0;
-+	r[17] |= pr->nopri_sel ? BIT(4) : 0;
-+	r[17] |= pr->cpupri_sel ? BIT(3) : 0;
-+	r[17] |= pr->otpid_sel ? BIT(2) : 0;
-+	r[17] |= pr->itpid_sel ? BIT(1) : 0;
-+	r[17] |= pr->shaper_sel ? BIT(0) : 0;
-+}
-+
-+static int rtl838x_write_pie_action(u32 r[],  struct pie_rule *pr)
-+{
-+	u16 *aif = (u16 *)&r[17];
-+	u16 data;
-+	int fields_used = 0;
-+
-+	aif--;
-+
-+	pr_info("%s, at %08x\n", __func__, (u32)aif);
-+	/* Multiple actions can be linked to a match of a PIE rule,
-+	 * they have different precedence depending on their type and this precedence
-+	 * defines which Action Information Field (0-4) in the IACL table stores
-+	 * the additional data of the action (like e.g. the port number a packet is
-+	 * forwarded to) */
-+	if (pr->drop)
-+		pr_info("%s: Action Drop: %d", __func__, pr->drop);
-+
-+	// TODO: count bits in selectors to limit to a maximum number of actions
-+	if (pr->fwd_sel) { // Forwarding action
-+		data = pr->fwd_act << 13;
-+		data |= pr->fwd_data;
-+		data |= pr->bypass_all ? BIT(12) : 0;
-+		data |= pr->bypass_ibc_sc ? BIT(11) : 0;
-+		data |= pr->bypass_igr_stp ? BIT(10) : 0;
-+		*aif-- = data;
-+		fields_used++;
-+	}
-+
-+	if (pr->ovid_sel) { // Outer VID action
-+		data = (pr->ovid_act & 0x3) << 12;
-+		data |= pr->ovid_data;
-+		*aif-- = data;
-+		fields_used++;
-+	}
-+
-+	if (pr->ivid_sel) { // Inner VID action
-+		data = (pr->ivid_act & 0x3) << 12;
-+		data |= pr->ivid_data;
-+		*aif-- = data;
-+		fields_used++;
-+	}
-+
-+	if (pr->flt_sel) { // Filter action
-+		*aif-- = pr->flt_data;
-+		fields_used++;
-+	}
-+		
-+	if (pr->log_sel) { // Log action
-+		if (fields_used >= 4)
-+			return -1;
-+		*aif-- = pr->log_data;
-+		fields_used++;
-+	}
-+		
-+	if (pr->rmk_sel) { // Remark action
-+		if (fields_used >= 4)
-+			return -1;
-+		*aif-- = pr->rmk_data;
-+		fields_used++;
-+	}
-+
-+	if (pr->meter_sel) { // Meter action
-+		if (fields_used >= 4)
-+			return -1;
-+		*aif-- = pr->meter_data;
-+		fields_used++;
-+	}
-+
-+	if (pr->tagst_sel) { // Egress Tag Status action
-+		if (fields_used >= 4)
-+			return -1;
-+		*aif-- = pr->tagst_data;
-+		fields_used++;
-+	}
-+
-+	if (pr->mir_sel) { // Mirror action
-+		if (fields_used >= 4)
-+			return -1;
-+		*aif-- = pr->mir_data;
-+		fields_used++;
-+	}
-+
-+	if (pr->nopri_sel) { // Normal Priority action
-+		if (fields_used >= 4)
-+			return -1;
-+		*aif-- = pr->nopri_data;
-+		fields_used++;
-+	}
-+
-+	if (pr->cpupri_sel) { // CPU Priority action
-+		if (fields_used >= 4)
-+			return -1;
-+		*aif-- = pr->nopri_data;
-+		fields_used++;
-+	}
-+
-+	if (pr->otpid_sel) { // OTPID action
-+		if (fields_used >= 4)
-+			return -1;
-+		*aif-- = pr->otpid_data;
-+		fields_used++;
-+	}
-+
-+	if (pr->itpid_sel) { // ITPID action
-+		if (fields_used >= 4)
-+			return -1;
-+		*aif-- = pr->itpid_data;
-+		fields_used++;
-+	}
-+
-+	if (pr->shaper_sel) { // Traffic shaper action
-+		if (fields_used >= 4)
-+			return -1;
-+		*aif-- = pr->shaper_data;
-+		fields_used++;
-+	}
-+
-+	return 0;
-+}
-+
-+static void rtl838x_read_pie_action(u32 r[],  struct pie_rule *pr)
-+{
-+	u16 *aif = (u16 *)&r[17];
-+
-+	aif--;
-+
-+	pr_info("%s, at %08x\n", __func__, (u32)aif);
-+	if (pr->drop)
-+		pr_info("%s: Action Drop: %d", __func__, pr->drop);
-+
-+	if (pr->fwd_sel){ // Forwarding action
-+		pr->fwd_act = *aif >> 13;
-+		pr->fwd_data = *aif--;
-+		pr->bypass_all = pr->fwd_data & BIT(12);
-+		pr->bypass_ibc_sc = pr->fwd_data & BIT(11);
-+		pr->bypass_igr_stp = pr->fwd_data & BIT(10);
-+		if (pr->bypass_all || pr->bypass_ibc_sc || pr->bypass_igr_stp)
-+			pr->bypass_sel = true;
-+	}
-+	if (pr->ovid_sel) // Outer VID action
-+		pr->ovid_data = *aif--;
-+	if (pr->ivid_sel) // Inner VID action
-+		pr->ivid_data = *aif--;
-+	if (pr->flt_sel) // Filter action
-+		pr->flt_data = *aif--;
-+	if (pr->log_sel) // Log action
-+		pr->log_data = *aif--;
-+	if (pr->rmk_sel) // Remark action
-+		pr->rmk_data = *aif--;
-+	if (pr->meter_sel) // Meter action
-+		pr->meter_data = *aif--;
-+	if (pr->tagst_sel) // Egress Tag Status action
-+		pr->tagst_data = *aif--;
-+	if (pr->mir_sel) // Mirror action
-+		pr->mir_data = *aif--;
-+	if (pr->nopri_sel) // Normal Priority action
-+		pr->nopri_data = *aif--;
-+	if (pr->cpupri_sel) // CPU Priority action
-+		pr->nopri_data = *aif--;
-+	if (pr->otpid_sel) // OTPID action
-+		pr->otpid_data = *aif--;
-+	if (pr->itpid_sel) // ITPID action
-+		pr->itpid_data = *aif--;
-+	if (pr->shaper_sel) // Traffic shaper action
-+		pr->shaper_data = *aif--;
-+}
-+
-+static void rtl838x_pie_rule_dump_raw(u32 r[])
-+{
-+	pr_info("Raw IACL table entry:\n");
-+	pr_info("Match  : %08x %08x %08x %08x %08x %08x\n", r[0], r[1], r[2], r[3], r[4], r[5]);
-+	pr_info("Fixed  : %08x\n", r[6]);
-+	pr_info("Match M: %08x %08x %08x %08x %08x %08x\n", r[7], r[8], r[9], r[10], r[11], r[12]);
-+	pr_info("Fixed M: %08x\n", r[13]);
-+	pr_info("AIF    : %08x %08x %08x\n", r[14], r[15], r[16]);
-+	pr_info("Sel    : %08x\n", r[17]);
-+}
-+
-+static void rtl838x_pie_rule_dump(struct  pie_rule *pr)
-+{
-+	pr_info("Drop: %d, fwd: %d, ovid: %d, ivid: %d, flt: %d, log: %d, rmk: %d, meter: %d tagst: %d, mir: %d, nopri: %d, cpupri: %d, otpid: %d, itpid: %d, shape: %d\n",
-+		pr->drop, pr->fwd_sel, pr->ovid_sel, pr->ivid_sel, pr->flt_sel, pr->log_sel, pr->rmk_sel, pr->log_sel, pr->tagst_sel, pr->mir_sel, pr->nopri_sel,
-+		pr->cpupri_sel, pr->otpid_sel, pr->itpid_sel, pr->shaper_sel);
-+	if (pr->fwd_sel)
-+		pr_info("FWD: %08x\n", pr->fwd_data);
-+	pr_info("TID: %x, %x\n", pr->tid, pr->tid_m);
-+}
-+
-+static int rtl838x_pie_rule_read(struct rtl838x_switch_priv *priv, int idx, struct  pie_rule *pr)
-+{
-+	// Read IACL table (1) via register 0
-+	struct table_reg *q = rtl_table_get(RTL8380_TBL_0, 1);
-+	u32 r[18];
-+	int i;
-+	int block = idx / PIE_BLOCK_SIZE;
-+	u32 t_select = sw_r32(RTL838X_ACL_BLK_TMPLTE_CTRL(block));
-+
-+	memset(pr, 0, sizeof(*pr));
-+	rtl_table_read(q, idx);
-+	for (i = 0; i < 18; i++)
-+		r[i] = sw_r32(rtl_table_data(q, i));
-+
-+	rtl_table_release(q);
-+
-+	rtl838x_read_pie_fixed_fields(r, pr);
-+	if (!pr->valid)
-+		return 0;
-+
-+	pr_info("%s: template_selectors %08x, tid: %d\n", __func__, t_select, pr->tid);
-+	rtl838x_pie_rule_dump_raw(r);
-+
-+	rtl838x_read_pie_templated(r, pr, fixed_templates[(t_select >> (pr->tid * 3)) & 0x7]);
-+
-+	rtl838x_read_pie_action(r, pr);
-+
-+	return 0;
-+}
-+
-+static int rtl838x_pie_rule_write(struct rtl838x_switch_priv *priv, int idx, struct pie_rule *pr)
-+{
-+	// Access IACL table (1) via register 0
-+	struct table_reg *q = rtl_table_get(RTL8380_TBL_0, 1);
-+	u32 r[18];
-+	int i, err = 0;
-+	int block = idx / PIE_BLOCK_SIZE;
-+	u32 t_select = sw_r32(RTL838X_ACL_BLK_TMPLTE_CTRL(block));
-+
-+	pr_info("%s: %d, t_select: %08x\n", __func__, idx, t_select);
-+
-+	for (i = 0; i < 18; i++)
-+		r[i] = 0;
-+
-+	if (!pr->valid)
-+		goto err_out;
-+
-+	rtl838x_write_pie_fixed_fields(r, pr);
-+
-+	pr_info("%s: template %d\n", __func__, (t_select >> (pr->tid * 3)) & 0x7);
-+	rtl838x_write_pie_templated(r, pr, fixed_templates[(t_select >> (pr->tid * 3)) & 0x7]);
-+
-+	if (rtl838x_write_pie_action(r, pr)) {
-+		pr_err("Rule actions too complex\n");
-+		goto err_out;
-+	}
-+
-+	rtl838x_pie_rule_dump_raw(r);
-+
-+	for (i = 0; i < 18; i++)
-+		sw_w32(r[i], rtl_table_data(q, i));
-+
-+err_out:
-+	rtl_table_write(q, idx);
-+	rtl_table_release(q);
-+
-+	return err;
-+}
-+
-+static bool rtl838x_pie_templ_has(int t, enum template_field_id field_type)
-+{
-+	int i;
-+	enum template_field_id ft;
-+
-+	for (i = 0; i < N_FIXED_FIELDS; i++) {
-+		ft = fixed_templates[t][i];
-+		if (field_type == ft)
-+			return true;
-+	}
-+
-+	return false;
-+}
-+
-+static int rtl838x_pie_verify_template(struct rtl838x_switch_priv *priv,
-+				       struct pie_rule *pr, int t, int block)
-+{
-+	int i;
-+
-+	if (!pr->is_ipv6 && pr->sip_m && !rtl838x_pie_templ_has(t, TEMPLATE_FIELD_SIP0))
-+		return -1;
-+
-+	if (!pr->is_ipv6 && pr->dip_m && !rtl838x_pie_templ_has(t, TEMPLATE_FIELD_DIP0))
-+		return -1;
-+
-+	if (pr->is_ipv6) {
-+		if ((pr->sip6_m.s6_addr32[0] || pr->sip6_m.s6_addr32[1]
-+			|| pr->sip6_m.s6_addr32[2] || pr->sip6_m.s6_addr32[3])
-+			&& !rtl838x_pie_templ_has(t, TEMPLATE_FIELD_SIP2))
-+			return -1;
-+		if ((pr->dip6_m.s6_addr32[0] || pr->dip6_m.s6_addr32[1]
-+			|| pr->dip6_m.s6_addr32[2] || pr->dip6_m.s6_addr32[3])
-+			&& !rtl838x_pie_templ_has(t, TEMPLATE_FIELD_DIP2))
-+			return -1;
-+	}
-+
-+	if (ether_addr_to_u64(pr->smac) && !rtl838x_pie_templ_has(t, TEMPLATE_FIELD_SMAC0))
-+		return -1;
-+
-+	if (ether_addr_to_u64(pr->dmac) && !rtl838x_pie_templ_has(t, TEMPLATE_FIELD_DMAC0))
-+		return -1;
-+
-+	// TODO: Check more
-+
-+	i = find_first_zero_bit(&priv->pie_use_bm[block * 4], PIE_BLOCK_SIZE);
-+
-+	if (i >= PIE_BLOCK_SIZE)
-+		return -1;
-+
-+	return i + PIE_BLOCK_SIZE * block;
-+}
-+
-+static int rtl838x_pie_rule_add(struct rtl838x_switch_priv *priv, struct pie_rule *pr)
-+{
-+	int idx, block, j, t;
-+
-+	pr_info("In %s\n", __func__);
-+
-+	mutex_lock(&priv->pie_mutex);
-+
-+	for (block = 0; block < priv->n_pie_blocks; block++) {
-+		for (j = 0; j < 3; j++) {
-+			t = (sw_r32(RTL838X_ACL_BLK_TMPLTE_CTRL(block)) >> (j * 3)) & 0x7;
-+			pr_info("Testing block %d, template %d, template id %d\n", block, j, t);
-+			idx = rtl838x_pie_verify_template(priv, pr, t, block);
-+			if (idx >= 0)
-+				break;
-+		}
-+		if (j < 3)
-+			break;
-+	}
-+
-+	if (block >= priv->n_pie_blocks) {
-+		mutex_unlock(&priv->pie_mutex);
-+		return -EOPNOTSUPP;
-+	}
-+
-+	pr_info("Using block: %d, index %d, template-id %d\n", block, idx, j);
-+	set_bit(idx, priv->pie_use_bm);
-+
-+	pr->valid = true;
-+	pr->tid = j;  // Mapped to template number
-+	pr->tid_m = 0x3;
-+	pr->id = idx;
-+
-+	rtl838x_pie_lookup_enable(priv, idx);
-+	rtl838x_pie_rule_write(priv, idx, pr);
-+
-+	mutex_unlock(&priv->pie_mutex);
-+	return 0;
-+}
-+
-+static void rtl838x_pie_rule_rm(struct rtl838x_switch_priv *priv, struct pie_rule *pr)
-+{
-+	int idx = pr->id;
-+
-+	rtl838x_pie_rule_del(priv, idx, idx);
-+	clear_bit(idx, priv->pie_use_bm);
-+}
-+
-+/*
-+ * Initializes the Packet Inspection Engine:
-+ * powers it up, enables default matching templates for all blocks
-+ * and clears all rules possibly installed by u-boot
-+ */
-+static void rtl838x_pie_init(struct rtl838x_switch_priv *priv)
-+{
-+	int i;
-+	u32 template_selectors;
-+
-+	mutex_init(&priv->pie_mutex);
-+
-+	// Enable ACL lookup on all ports, including CPU_PORT
-+	for (i = 0; i <= priv->cpu_port; i++)
-+		sw_w32(1, RTL838X_ACL_PORT_LOOKUP_CTRL(i));
-+
-+	// Power on all PIE blocks
-+	for (i = 0; i < priv->n_pie_blocks; i++)
-+		sw_w32_mask(0, BIT(i), RTL838X_ACL_BLK_PWR_CTRL);
-+
-+	// Include IPG in metering
-+	sw_w32(1, RTL838X_METER_GLB_CTRL);
-+
-+	// Delete all present rules
-+	rtl838x_pie_rule_del(priv, 0, priv->n_pie_blocks * PIE_BLOCK_SIZE - 1);
-+
-+	// Routing bypasses source port filter: disable write-protection, first
-+	sw_w32_mask(0, 3, RTL838X_INT_RW_CTRL);
-+	sw_w32_mask(0, 1, RTL838X_DMY_REG27);
-+	sw_w32_mask(3, 0, RTL838X_INT_RW_CTRL);
-+
-+	// Enable predefined templates 0, 1 and 2 for even blocks
-+	template_selectors = 0 | (1 << 3) | (2 << 6);
-+	for (i = 0; i < 6; i += 2)
-+		sw_w32(template_selectors, RTL838X_ACL_BLK_TMPLTE_CTRL(i));
-+
-+	// Enable predefined templates 0, 3 and 4 (IPv6 support) for odd blocks
-+	template_selectors = 0 | (3 << 3) | (4 << 6);
-+	for (i = 1; i < priv->n_pie_blocks; i += 2)
-+		sw_w32(template_selectors, RTL838X_ACL_BLK_TMPLTE_CTRL(i));
-+
-+	// Group each pair of physical blocks together to a logical block
-+	sw_w32(0b10101010101, RTL838X_ACL_BLK_GROUP_CTRL);
-+}
-+
-+static void rtl838x_route_read(int idx, struct rtl83xx_route *rt)
-+{
-+	// Read ROUTING table (2) via register RTL8380_TBL_1
-+	struct table_reg *r = rtl_table_get(RTL8380_TBL_1, 2);
-+
-+	pr_info("In %s, id %d\n", __func__, idx);
-+	rtl_table_read(r, idx);
-+
-+	// The table has a size of 2 registers
-+	rt->nh.gw = sw_r32(rtl_table_data(r, 0));
-+	rt->nh.gw <<= 32;
-+	rt->nh.gw |= sw_r32(rtl_table_data(r, 1));
-+
-+	rtl_table_release(r);
-+}
-+
-+static void rtl838x_route_write(int idx, struct rtl83xx_route *rt)
-+{
-+	// Access ROUTING table (2) via register RTL8380_TBL_1
-+	struct table_reg *r = rtl_table_get(RTL8380_TBL_1, 2);
-+
-+	pr_info("In %s, id %d, gw: %016llx\n", __func__, idx, rt->nh.gw);
-+	sw_w32(rt->nh.gw >> 32, rtl_table_data(r, 0));
-+	sw_w32(rt->nh.gw, rtl_table_data(r, 1));
-+	rtl_table_write(r, idx);
-+
-+	rtl_table_release(r);
-+}
-+
-+static int rtl838x_l3_setup(struct rtl838x_switch_priv *priv)
-+{
-+	// Nothing to be done
-+	return 0;
-+}
-+
-+static u32 rtl838x_packet_cntr_read(int counter)
-+{
-+	u32 v;
-+
-+	// Read LOG table (3) via register RTL8380_TBL_0
-+	struct table_reg *r = rtl_table_get(RTL8380_TBL_0, 3);
-+
-+	pr_info("In %s, id %d\n", __func__, counter);
-+	rtl_table_read(r, counter / 2);
-+
-+	pr_info("Registers: %08x %08x\n",
-+		sw_r32(rtl_table_data(r, 0)), sw_r32(rtl_table_data(r, 1)));
-+	// The table has a size of 2 registers
-+	if (counter % 2)
-+		v = sw_r32(rtl_table_data(r, 0));
-+	else
-+		v = sw_r32(rtl_table_data(r, 1));
-+
-+	rtl_table_release(r);
-+
-+	return v;
-+}
-+
-+static void rtl838x_packet_cntr_clear(int counter)
-+{
-+	// Access LOG table (3) via register RTL8380_TBL_0
-+	struct table_reg *r = rtl_table_get(RTL8380_TBL_0, 3);
-+
-+	pr_info("In %s, id %d\n", __func__, counter);
-+	// The table has a size of 2 registers
-+	if (counter % 2)
-+		sw_w32(0, rtl_table_data(r, 0));
-+	else
-+		sw_w32(0, rtl_table_data(r, 1));
-+
-+	rtl_table_write(r, counter / 2);
-+
-+	rtl_table_release(r);
-+}
-+
-+void rtl838x_set_distribution_algorithm(int group, int algoidx, u32 algomsk)
-+{
-+	algoidx&=1; // RTL838X does only support 2 concurrent algorithms
-+	sw_w32_mask(1 << (group % 8), algoidx << (group % 8), RTL838X_TRK_HASH_IDX_CTRL + ((group >> 3) << 2));
-+	sw_w32(algomsk, RTL838X_TRK_HASH_CTRL + (algoidx << 2));
-+}
-+
-+void rtl838x_set_receive_management_action(int port, rma_ctrl_t type, action_type_t action)
-+{
-+	switch(type) {
-+	case BPDU:
-+		sw_w32_mask(3 << ((port & 0xf) << 1), (action & 0x3) << ((port & 0xf) << 1), RTL838X_RMA_BPDU_CTRL + ((port >> 4) << 2));
-+	break;
-+	case PTP:
-+		sw_w32_mask(3 << ((port & 0xf) << 1), (action & 0x3) << ((port & 0xf) << 1), RTL838X_RMA_PTP_CTRL + ((port >> 4) << 2));
-+	break;
-+	case LLTP:
-+		sw_w32_mask(3 << ((port & 0xf) << 1), (action & 0x3) << ((port & 0xf) << 1), RTL838X_RMA_LLTP_CTRL + ((port >> 4) << 2));
-+	break;
-+	default:
-+	break;
-+	}
-+}
-+
- const struct rtl838x_reg rtl838x_reg = {
- 	.mask_port_reg_be = rtl838x_mask_port_reg,
- 	.set_port_reg_be = rtl838x_set_port_reg,
-@@ -295,6 +1682,8 @@ const struct rtl838x_reg rtl838x_reg = {
- 	.vlan_set_untagged = rtl838x_vlan_set_untagged,
- 	.mac_force_mode_ctrl = rtl838x_mac_force_mode_ctrl,
- 	.vlan_profile_dump = rtl838x_vlan_profile_dump,
-+	.vlan_profile_setup = rtl838x_vlan_profile_setup,
-+	.vlan_fwd_on_inner = rtl838x_vlan_fwd_on_inner,
- 	.stp_get = rtl838x_stp_get,
- 	.stp_set = rtl838x_stp_set,
- 	.mac_port_ctrl = rtl838x_mac_port_ctrl,
-@@ -309,14 +1698,58 @@ const struct rtl838x_reg rtl838x_reg = {
- 	.mac_rx_pause_sts = RTL838X_MAC_RX_PAUSE_STS,
- 	.mac_tx_pause_sts = RTL838X_MAC_TX_PAUSE_STS,
- 	.read_l2_entry_using_hash = rtl838x_read_l2_entry_using_hash,
-+	.write_l2_entry_using_hash = rtl838x_write_l2_entry_using_hash,
- 	.read_cam = rtl838x_read_cam,
-+	.write_cam = rtl838x_write_cam,
- 	.vlan_port_egr_filter = RTL838X_VLAN_PORT_EGR_FLTR,
--	.vlan_port_igr_filter = RTL838X_VLAN_PORT_IGR_FLTR(0),
-+	.vlan_port_igr_filter = RTL838X_VLAN_PORT_IGR_FLTR,
- 	.vlan_port_pb = RTL838X_VLAN_PORT_PB_VLAN,
- 	.vlan_port_tag_sts_ctrl = RTL838X_VLAN_PORT_TAG_STS_CTRL,
- 	.trk_mbr_ctr = rtl838x_trk_mbr_ctr,
- 	.rma_bpdu_fld_pmask = RTL838X_RMA_BPDU_FLD_PMSK,
-+	.init_eee = rtl838x_init_eee,
-+	.port_eee_set = rtl838x_port_eee_set,
-+	.eee_port_ability = rtl838x_eee_port_ability,
-+	.l2_hash_seed = rtl838x_l2_hash_seed, 
-+	.l2_hash_key = rtl838x_l2_hash_key,
-+	.read_mcast_pmask = rtl838x_read_mcast_pmask,
-+	.write_mcast_pmask = rtl838x_write_mcast_pmask,
-+	.pie_init = rtl838x_pie_init,
-+	.pie_rule_read = rtl838x_pie_rule_read,
-+	.pie_rule_write = rtl838x_pie_rule_write,
-+	.pie_rule_add = rtl838x_pie_rule_add,
-+	.pie_rule_rm = rtl838x_pie_rule_rm,
-+	.l2_learning_setup = rtl838x_l2_learning_setup,
-+	.route_read = rtl838x_route_read,
-+	.route_write = rtl838x_route_write,
-+	.l3_setup = rtl838x_l3_setup,
-+	.packet_cntr_read = rtl838x_packet_cntr_read,
-+	.packet_cntr_clear = rtl838x_packet_cntr_clear,
-+	.enable_learning = rtl838x_enable_learning,
-+	.enable_flood = rtl838x_enable_flood,
-+	.rma_bpdu_ctrl = RTL838X_RMA_BPDU_CTRL,
-+	.rma_ptp_ctrl = RTL838X_RMA_PTP_CTRL,
-+	.rma_lltp_ctrl = RTL838X_RMA_LLTP_CTRL,
-+	.rma_bpdu_ctrl_div = 16,
-+	.rma_ptp_ctrl_div = 16,
-+	.rma_lltp_ctrl_div = 16,
-+	.storm_ctrl_port_uc = RTL838X_STORM_CTRL_PORT_UC(0),
-+	.storm_ctrl_port_bc = RTL838X_STORM_CTRL_PORT_BC(0),
-+	.storm_ctrl_port_mc = RTL838X_STORM_CTRL_PORT_MC(0),
-+	.storm_ctrl_port_uc_shift = 2,
-+	.storm_ctrl_port_bc_shift = 2,
-+	.storm_ctrl_port_mc_shift = 2,
- 	.spcl_trap_eapol_ctrl = RTL838X_SPCL_TRAP_EAPOL_CTRL,
-+	.spcl_trap_arp_ctrl = RTL838X_SPCL_TRAP_ARP_CTRL,
-+	.spcl_trap_igmp_ctrl = RTL838X_SPCL_TRAP_IGMP_CTRL,
-+	.spcl_trap_ipv6_ctrl = RTL838X_SPCL_TRAP_IPV6_CTRL,
-+	.spcl_trap_switch_mac_ctrl = RTL838X_SPCL_TRAP_SWITCH_MAC_CTRL,
-+	.spcl_trap_ctrl = RTL838X_SPCL_TRAP_CTRL,
-+	.vlan_ctrl = RTL838X_VLAN_CTRL,
-+	.trk_hash_ctrl = RTL838X_TRK_HASH_CTRL,
-+	.trk_hash_idx_ctrl = RTL838X_TRK_HASH_IDX_CTRL,
-+	.set_distribution_algorithm = rtl838x_set_distribution_algorithm,
-+	.set_receive_management_action = rtl838x_set_receive_management_action,
- };
- 
- irqreturn_t rtl838x_switch_irq(int irq, void *dev_id)
-@@ -432,6 +1865,79 @@ timeout:
- 	return -ETIMEDOUT;
- }
- 
-+/*
-+ * Read an mmd register of a PHY
-+ */
-+int rtl838x_read_mmd_phy(u32 port, u32 addr, u32 reg, u32 *val)
-+{
-+	u32 v;
-+
-+	mutex_lock(&smi_lock);
-+
-+	if (rtl838x_smi_wait_op(10000))
-+		goto timeout;
-+
-+	sw_w32(1 << port, RTL838X_SMI_ACCESS_PHY_CTRL_0);
-+	mdelay(10);
-+
-+	sw_w32_mask(0xffff0000, port << 16, RTL838X_SMI_ACCESS_PHY_CTRL_2);
-+
-+	v = addr << 16 | reg;
-+	sw_w32(v, RTL838X_SMI_ACCESS_PHY_CTRL_3);
-+
-+	/* mmd-access | read | cmd-start */
-+	v = 1 << 1 | 0 << 2 | 1;
-+	sw_w32(v, RTL838X_SMI_ACCESS_PHY_CTRL_1);
-+
-+	if (rtl838x_smi_wait_op(10000))
-+		goto timeout;
-+
-+	*val = sw_r32(RTL838X_SMI_ACCESS_PHY_CTRL_2) & 0xffff;
-+
-+	mutex_unlock(&smi_lock);
-+	return 0;
-+
-+timeout:
-+	mutex_unlock(&smi_lock);
-+	return -ETIMEDOUT;
-+}
-+
-+/*
-+ * Write to an mmd register of a PHY
-+ */
-+int rtl838x_write_mmd_phy(u32 port, u32 addr, u32 reg, u32 val)
-+{
-+	u32 v;
-+
-+	pr_debug("MMD write: port %d, dev %d, reg %d, val %x\n", port, addr, reg, val);
-+	val &= 0xffff;
-+	mutex_lock(&smi_lock);
-+
-+	if (rtl838x_smi_wait_op(10000))
-+		goto timeout;
-+
-+	sw_w32(1 << port, RTL838X_SMI_ACCESS_PHY_CTRL_0);
-+	mdelay(10);
-+
-+	sw_w32_mask(0xffff0000, val << 16, RTL838X_SMI_ACCESS_PHY_CTRL_2);
-+
-+	sw_w32_mask(0x1f << 16, addr << 16, RTL838X_SMI_ACCESS_PHY_CTRL_3);
-+	sw_w32_mask(0xffff, reg, RTL838X_SMI_ACCESS_PHY_CTRL_3);
-+	/* mmd-access | write | cmd-start */
-+	v = 1 << 1 | 1 << 2 | 1;
-+	sw_w32(v, RTL838X_SMI_ACCESS_PHY_CTRL_1);
-+
-+	if (rtl838x_smi_wait_op(10000))
-+		goto timeout;
-+
-+	mutex_unlock(&smi_lock);
-+	return 0;
-+
-+timeout:
-+	mutex_unlock(&smi_lock);
-+	return -ETIMEDOUT;
-+}
-+
- void rtl8380_get_version(struct rtl838x_switch_priv *priv)
- {
- 	u32 rw_save, info_save;
-@@ -459,47 +1965,18 @@ void rtl8380_get_version(struct rtl838x_switch_priv *priv)
- 	}
- }
- 
--/*
-- * Applies the same hash algorithm as the one used currently by the ASIC
-- */
--u32 rtl838x_hash(struct rtl838x_switch_priv *priv, u64 seed)
--{
--	u32 h1, h2, h3, h;
--
--	if (sw_r32(priv->r->l2_ctrl_0) & 1) {
--		h1 = (seed >> 11) & 0x7ff;
--		h1 = ((h1 & 0x1f) << 6) | ((h1 >> 5) & 0x3f);
--
--		h2 = (seed >> 33) & 0x7ff;
--		h2 = ((h2 & 0x3f) << 5) | ((h2 >> 6) & 0x1f);
--
--		h3 = (seed >> 44) & 0x7ff;
--		h3 = ((h3 & 0x7f) << 4) | ((h3 >> 7) & 0xf);
--
--		h = h1 ^ h2 ^ h3 ^ ((seed >> 55) & 0x1ff);
--		h ^= ((seed >> 22) & 0x7ff) ^ (seed & 0x7ff);
--	} else {
--		h = ((seed >> 55) & 0x1ff) ^ ((seed >> 44) & 0x7ff)
--			^ ((seed >> 33) & 0x7ff) ^ ((seed >> 22) & 0x7ff)
--			^ ((seed >> 11) & 0x7ff) ^ (seed & 0x7ff);
--	}
--
--	return h;
--}
--
--void rtl838x_vlan_profile_dump(int index)
-+void rtl838x_vlan_profile_dump(int profile)
- {
--	u32 profile;
-+	u32 p;
- 
--	if (index < 0 || index > 7)
-+	if (profile < 0 || profile > 7)
- 		return;
- 
--	profile = sw_r32(RTL838X_VLAN_PROFILE(index));
-+	p = sw_r32(RTL838X_VLAN_PROFILE(profile));
- 
--	pr_info("VLAN %d: L2 learning: %d, L2 Unknown MultiCast Field %x, \
--		IPv4 Unknown MultiCast Field %x, IPv6 Unknown MultiCast Field: %x",
--		index, profile & 1, (profile >> 1) & 0x1ff, (profile >> 10) & 0x1ff,
--		(profile >> 19) & 0x1ff);
-+	pr_info("VLAN profile %d: L2 learning: %d, UNKN L2MC FLD PMSK %d, \
-+		UNKN IPMC FLD PMSK %d, UNKN IPv6MC FLD PMSK: %d",
-+		profile, p & 1, (p >> 1) & 0x1ff, (p >> 10) & 0x1ff, (p >> 19) & 0x1ff);
- }
- 
- void rtl8380_sds_rst(int mac)
-diff --git a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl838x.h b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl838x.h
-deleted file mode 100644
-index d5ca153a10..0000000000
---- a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl838x.h
-+++ /dev/null
-@@ -1,472 +0,0 @@
--/* SPDX-License-Identifier: GPL-2.0-only */
--
--#ifndef _RTL838X_H
--#define _RTL838X_H
--
--#include <net/dsa.h>
--
--/*
-- * Register definition
-- */
--#define RTL838X_MAC_PORT_CTRL(port)		(0xd560 + (((port) << 7)))
--#define RTL839X_MAC_PORT_CTRL(port)		(0x8004 + (((port) << 7)))
--#define RTL930X_MAC_PORT_CTRL(port)		(0x3260 + (((port) << 6)))
--#define RTL930X_MAC_L2_PORT_CTRL(port)		(0x3268 + (((port) << 6)))
--#define RTL931X_MAC_PORT_CTRL(port)		(0x6004 + (((port) << 7)))
--
--#define RTL838X_RST_GLB_CTRL_0			(0x003c)
--
--#define RTL838X_MAC_FORCE_MODE_CTRL		(0xa104)
--#define RTL839X_MAC_FORCE_MODE_CTRL		(0x02bc)
--#define RTL930X_MAC_FORCE_MODE_CTRL		(0xCA1C)
--#define RTL931X_MAC_FORCE_MODE_CTRL		(0x0DCC)
--
--#define RTL838X_DMY_REG31			(0x3b28)
--#define RTL838X_SDS_MODE_SEL			(0x0028)
--#define RTL838X_SDS_CFG_REG			(0x0034)
--#define RTL838X_INT_MODE_CTRL			(0x005c)
--#define RTL838X_CHIP_INFO			(0x00d8)
--#define RTL839X_CHIP_INFO			(0x0ff4)
--#define RTL838X_PORT_ISO_CTRL(port)		(0x4100 + ((port) << 2))
--#define RTL839X_PORT_ISO_CTRL(port)		(0x1400 + ((port) << 3))
--
--/* Packet statistics */
--#define RTL838X_STAT_PORT_STD_MIB		(0x1200)
--#define RTL839X_STAT_PORT_STD_MIB		(0xC000)
--#define RTL930X_STAT_PORT_MIB_CNTR		(0x0664)
--#define RTL838X_STAT_RST			(0x3100)
--#define RTL839X_STAT_RST			(0xF504)
--#define RTL930X_STAT_RST			(0x3240)
--#define RTL931X_STAT_RST			(0x7ef4)
--#define RTL838X_STAT_PORT_RST			(0x3104)
--#define RTL839X_STAT_PORT_RST			(0xF508)
--#define RTL930X_STAT_PORT_RST			(0x3244)
--#define RTL931X_STAT_PORT_RST			(0x7ef8)
--#define RTL838X_STAT_CTRL			(0x3108)
--#define RTL839X_STAT_CTRL			(0x04cc)
--#define RTL930X_STAT_CTRL			(0x3248)
--#define RTL931X_STAT_CTRL			(0x5720)
--
--/* Registers of the internal Serdes of the 8390 */
--#define RTL8390_SDS0_1_XSG0			(0xA000)
--#define RTL8390_SDS0_1_XSG1			(0xA100)
--#define RTL839X_SDS12_13_XSG0			(0xB800)
--#define RTL839X_SDS12_13_XSG1			(0xB900)
--#define RTL839X_SDS12_13_PWR0			(0xb880)
--#define RTL839X_SDS12_13_PWR1			(0xb980)
--
--/* Registers of the internal Serdes of the 8380 */
--#define RTL838X_SDS4_FIB_REG0			(0xF800)
--#define RTL838X_SDS4_REG28			(0xef80)
--#define RTL838X_SDS4_DUMMY0			(0xef8c)
--#define RTL838X_SDS5_EXT_REG6			(0xf18c)
--
--/* VLAN registers */
--#define RTL838X_VLAN_CTRL			(0x3A74)
--#define RTL838X_VLAN_PROFILE(idx)		(0x3A88 + ((idx) << 2))
--#define RTL838X_VLAN_PORT_EGR_FLTR		(0x3A84)
--#define RTL838X_VLAN_PORT_PB_VLAN		(0x3C00)
--#define RTL838X_VLAN_PORT_IGR_FLTR(port)	(0x3A7C + (((port >> 4) << 2)))
--#define RTL838X_VLAN_PORT_IGR_FLTR_0		(0x3A7C)
--#define RTL838X_VLAN_PORT_IGR_FLTR_1		(0x3A7C + 4)
--#define RTL838X_VLAN_PORT_TAG_STS_CTRL		(0xA530)
--
--#define RTL839X_VLAN_PROFILE(idx)		(0x25C0 + (((idx) << 3)))
--#define RTL839X_VLAN_CTRL			(0x26D4)
--#define RTL839X_VLAN_PORT_PB_VLAN		(0x26D8)
--#define RTL839X_VLAN_PORT_IGR_FLTR(port)	(0x27B4 + (((port >> 4) << 2)))
--#define RTL839X_VLAN_PORT_EGR_FLTR(port)	(0x27C4 + (((port >> 5) << 2)))
--#define RTL839X_VLAN_PORT_TAG_STS_CTRL		(0x6828)
--
--#define RTL930X_VLAN_PROFILE_SET(idx)		(0x9c60 + (((idx) * 20)))
--#define RTL930X_VLAN_CTRL			(0x82D4)
--#define RTL930X_VLAN_PORT_PB_VLAN		(0x82D8)
--#define RTL930X_VLAN_PORT_IGR_FLTR(port)	(0x83C0 + (((port >> 4) << 2)))
--#define RTL930X_VLAN_PORT_EGR_FLTR		(0x83C8)
--#define RTL930X_VLAN_PORT_TAG_STS_CTRL		(0xCE24)
--
--#define RTL931X_VLAN_PROFILE_SET(idx)		(0x9800 + (((idx) * 28)))
--#define RTL931X_VLAN_CTRL			(0x94E4)
--#define RTL931X_VLAN_PORT_IGR_FLTR(port)	(0x96B4 + (((port >> 4) << 2)))
--#define RTL931X_VLAN_PORT_EGR_FLTR(port)	(0x96C4 + (((port >> 5) << 2)))
--#define RTL931X_VLAN_PORT_TAG_CTRL		(0x4860)
--
--/* Table access registers */
--#define RTL838X_TBL_ACCESS_CTRL_0		(0x6914)
--#define RTL838X_TBL_ACCESS_DATA_0(idx)		(0x6918 + ((idx) << 2))
--#define RTL838X_TBL_ACCESS_CTRL_1		(0xA4C8)
--#define RTL838X_TBL_ACCESS_DATA_1(idx)		(0xA4CC + ((idx) << 2))
--
--#define RTL839X_TBL_ACCESS_CTRL_0		(0x1190)
--#define RTL839X_TBL_ACCESS_DATA_0(idx)		(0x1194 + ((idx) << 2))
--#define RTL839X_TBL_ACCESS_CTRL_1		(0x6b80)
--#define RTL839X_TBL_ACCESS_DATA_1(idx)		(0x6b84 + ((idx) << 2))
--#define RTL839X_TBL_ACCESS_CTRL_2		(0x611C)
--#define RTL839X_TBL_ACCESS_DATA_2(i)		(0x6120 + (((i) << 2)))
--
--#define RTL930X_TBL_ACCESS_CTRL_0		(0xB340)
--#define RTL930X_TBL_ACCESS_DATA_0(idx)		(0xB344 + ((idx) << 2))
--#define RTL930X_TBL_ACCESS_CTRL_1		(0xB3A0)
--#define RTL930X_TBL_ACCESS_DATA_1(idx)		(0xB3A4 + ((idx) << 2))
--#define RTL930X_TBL_ACCESS_CTRL_2		(0xCE04)
--#define RTL930X_TBL_ACCESS_DATA_2(i)		(0xCE08 + (((i) << 2)))
--
--#define RTL931X_TBL_ACCESS_CTRL_0		(0x8500)
--#define RTL931X_TBL_ACCESS_DATA_0(idx)		(0x8508 + ((idx) << 2))
--#define RTL931X_TBL_ACCESS_CTRL_1		(0x40C0)
--#define RTL931X_TBL_ACCESS_DATA_1(idx)		(0x40C4 + ((idx) << 2))
--#define RTL931X_TBL_ACCESS_CTRL_2		(0x8528)
--#define RTL931X_TBL_ACCESS_DATA_2(i)		(0x852C + (((i) << 2)))
--#define RTL931X_TBL_ACCESS_CTRL_3		(0x0200)
--#define RTL931X_TBL_ACCESS_DATA_3(i)		(0x0204 + (((i) << 2)))
--#define RTL931X_TBL_ACCESS_CTRL_4		(0x20DC)
--#define RTL931X_TBL_ACCESS_DATA_4(i)		(0x20E0 + (((i) << 2)))
--#define RTL931X_TBL_ACCESS_CTRL_5		(0x7E1C)
--#define RTL931X_TBL_ACCESS_DATA_5(i)		(0x7E20 + (((i) << 2)))
--
--/* MAC handling */
--#define RTL838X_MAC_LINK_STS			(0xa188)
--#define RTL839X_MAC_LINK_STS			(0x0390)
--#define RTL930X_MAC_LINK_STS			(0xCB10)
--#define RTL931X_MAC_LINK_STS			(0x0EC0)
--#define RTL838X_MAC_LINK_SPD_STS(p)		(0xa190 + (((p >> 4) << 2)))
--#define RTL839X_MAC_LINK_SPD_STS(p)		(0x03a0 + (((p >> 4) << 2)))
--#define RTL930X_MAC_LINK_SPD_STS(p)		(0xCB18 + (((p >> 3) << 2)))
--#define RTL931X_MAC_LINK_SPD_STS(p)		(0x0ED0 + (((p >> 3) << 2)))
--#define RTL838X_MAC_LINK_DUP_STS		(0xa19c)
--#define RTL839X_MAC_LINK_DUP_STS		(0x03b0)
--#define RTL930X_MAC_LINK_DUP_STS		(0xCB28)
--#define RTL931X_MAC_LINK_DUP_STS		(0x0EF0)
--#define RTL838X_MAC_TX_PAUSE_STS		(0xa1a0)
--#define RTL839X_MAC_TX_PAUSE_STS		(0x03b8)
--#define RTL930X_MAC_TX_PAUSE_STS		(0xCB2C)
--#define RTL931X_MAC_TX_PAUSE_STS		(0x0EF8)
--#define RTL838X_MAC_RX_PAUSE_STS		(0xa1a4)
--#define RTL839X_MAC_RX_PAUSE_STS		(0x03c0)
--#define RTL930X_MAC_RX_PAUSE_STS		(0xCB30)
--#define RTL931X_MAC_RX_PAUSE_STS		(0x0F00)
--
--/* MAC link state bits */
--#define FORCE_EN				(1 << 0)
--#define FORCE_LINK_EN				(1 << 1)
--#define NWAY_EN					(1 << 2)
--#define DUPLX_MODE				(1 << 3)
--#define TX_PAUSE_EN				(1 << 6)
--#define RX_PAUSE_EN				(1 << 7)
--
--/* EEE */
--#define RTL838X_MAC_EEE_ABLTY			(0xa1a8)
--#define RTL838X_EEE_PORT_TX_EN			(0x014c)
--#define RTL838X_EEE_PORT_RX_EN			(0x0150)
--#define RTL838X_EEE_CLK_STOP_CTRL		(0x0148)
--#define RTL838X_EEE_TX_TIMER_GIGA_CTRL		(0xaa04)
--#define RTL838X_EEE_TX_TIMER_GELITE_CTRL	(0xaa08)
--
--/* L2 functionality */
--#define RTL838X_L2_CTRL_0			(0x3200)
--#define RTL839X_L2_CTRL_0			(0x3800)
--#define RTL930X_L2_CTRL				(0x8FD8)
--#define RTL931X_L2_CTRL				(0xC800)
--#define RTL838X_L2_CTRL_1			(0x3204)
--#define RTL839X_L2_CTRL_1			(0x3804)
--#define RTL930X_L2_AGE_CTRL			(0x8FDC)
--#define RTL931X_L2_AGE_CTRL			(0xC804)
--#define RTL838X_L2_PORT_AGING_OUT		(0x3358)
--#define RTL839X_L2_PORT_AGING_OUT		(0x3b74)
--#define	RTL930X_L2_PORT_AGE_CTRL		(0x8FE0)
--#define	RTL931X_L2_PORT_AGE_CTRL		(0xc808)
--#define RTL838X_TBL_ACCESS_L2_CTRL		(0x6900)
--#define RTL839X_TBL_ACCESS_L2_CTRL		(0x1180)
--#define RTL930X_TBL_ACCESS_L2_CTRL		(0xB320)
--#define RTL930X_TBL_ACCESS_L2_METHOD_CTRL	(0xB324)
--#define RTL838X_TBL_ACCESS_L2_DATA(idx)		(0x6908 + ((idx) << 2))
--#define RTL839X_TBL_ACCESS_L2_DATA(idx)		(0x1184 + ((idx) << 2))
--#define RTL930X_TBL_ACCESS_L2_DATA(idx)		(0xab08 + ((idx) << 2))
--#define RTL838X_L2_TBL_FLUSH_CTRL		(0x3370)
--#define RTL839X_L2_TBL_FLUSH_CTRL		(0x3ba0)
--#define RTL930X_L2_TBL_FLUSH_CTRL		(0x9404)
--#define RTL931X_L2_TBL_FLUSH_CTRL		(0xCD9C)
--
--#define RTL838X_L2_PORT_NEW_SALRN(p)		(0x328c + (((p >> 4) << 2)))
--#define RTL839X_L2_PORT_NEW_SALRN(p)		(0x38F0 + (((p >> 4) << 2)))
--#define RTL930X_L2_PORT_SALRN(p)		(0x8FEC + (((p >> 4) << 2)))
--#define RTL931X_L2_PORT_NEW_SALRN(p)		(0xC820 + (((p >> 4) << 2)))
--#define RTL838X_L2_PORT_NEW_SA_FWD(p)		(0x3294 + (((p >> 4) << 2)))
--#define RTL839X_L2_PORT_NEW_SA_FWD(p)		(0x3900 + (((p >> 4) << 2)))
--#define RTL930X_L2_PORT_NEW_SA_FWD(p)		(0x8FF4 + (((p / 10) << 2)))
--#define RTL931X_L2_PORT_NEW_SA_FWD(p)		(0xC830 + (((p / 10) << 2)))
--
--#define RTL930X_ST_CTRL				(0x8798)
--
--#define RTL930X_L2_PORT_SABLK_CTRL		(0x905c)
--#define RTL930X_L2_PORT_DABLK_CTRL		(0x9060)
--
--#define RTL838X_RMA_BPDU_FLD_PMSK		(0x4348)
--#define RTL930X_RMA_BPDU_FLD_PMSK		(0x9F18)
--#define RTL931X_RMA_BPDU_FLD_PMSK		(0x8950)
--#define RTL839X_RMA_BPDU_FLD_PMSK		(0x125C)
--
--/* Port Mirroring */
--#define RTL838X_MIR_CTRL			(0x5D00)
--#define RTL838X_MIR_DPM_CTRL			(0x5D20)
--#define RTL838X_MIR_SPM_CTRL			(0x5D10)
--
--#define RTL839X_MIR_CTRL			(0x2500)
--#define RTL839X_MIR_DPM_CTRL			(0x2530)
--#define RTL839X_MIR_SPM_CTRL			(0x2510)
--
--#define RTL930X_MIR_CTRL			(0xA2A0)
--#define RTL930X_MIR_DPM_CTRL			(0xA2C0)
--#define RTL930X_MIR_SPM_CTRL			(0xA2B0)
--
--#define RTL931X_MIR_CTRL			(0xAF00)
--#define RTL931X_MIR_DPM_CTRL			(0xAF30)
--#define RTL931X_MIR_SPM_CTRL			(0xAF10)
--
--/* Storm/rate control and scheduling */
--#define RTL838X_STORM_CTRL			(0x4700)
--#define RTL839X_STORM_CTRL			(0x1800)
--#define RTL838X_STORM_CTRL_LB_CTRL(p)		(0x4884 + (((p) << 2)))
--#define RTL838X_STORM_CTRL_BURST_PPS_0		(0x4874)
--#define RTL838X_STORM_CTRL_BURST_PPS_1		(0x4878)
--#define RTL838X_STORM_CTRL_BURST_0		(0x487c)
--#define RTL838X_STORM_CTRL_BURST_1		(0x4880)
--#define RTL839X_STORM_CTRL_LB_TICK_TKN_CTRL_0	(0x1804)
--#define RTL839X_STORM_CTRL_LB_TICK_TKN_CTRL_1	(0x1808)
--#define RTL838X_SCHED_CTRL			(0xB980)
--#define RTL839X_SCHED_CTRL			(0x60F4)
--#define RTL838X_SCHED_LB_TICK_TKN_CTRL_0	(0xAD58)
--#define RTL838X_SCHED_LB_TICK_TKN_CTRL_1	(0xAD5C)
--#define RTL839X_SCHED_LB_TICK_TKN_CTRL_0	(0x1804)
--#define RTL839X_SCHED_LB_TICK_TKN_CTRL_1	(0x1808)
--#define RTL839X_STORM_CTRL_SPCL_LB_TICK_TKN_CTRL (0x2000)
--#define RTL839X_IGR_BWCTRL_LB_TICK_TKN_CTRL_0	(0x1604)
--#define RTL839X_IGR_BWCTRL_LB_TICK_TKN_CTRL_1	(0x1608)
--#define RTL839X_SCHED_LB_TICK_TKN_CTRL		(0x60F8)
--#define RTL839X_SCHED_LB_TICK_TKN_PPS_CTRL	(0x6200)
--#define RTL838X_SCHED_LB_THR			(0xB984)
--#define RTL839X_SCHED_LB_THR			(0x60FC)
--#define RTL838X_SCHED_P_EGR_RATE_CTRL(p)	(0xC008 + (((p) << 7)))
--#define RTL838X_SCHED_Q_EGR_RATE_CTRL(p, q)	(0xC00C + (p << 7) + (((q) << 2)))
--#define RTL838X_STORM_CTRL_PORT_BC_EXCEED	(0x470C)
--#define RTL838X_STORM_CTRL_PORT_MC_EXCEED	(0x4710)
--#define RTL838X_STORM_CTRL_PORT_UC_EXCEED	(0x4714)
--#define RTL839X_STORM_CTRL_PORT_BC_EXCEED(p)	(0x180c + (((p >> 5) << 2)))
--#define RTL839X_STORM_CTRL_PORT_MC_EXCEED(p)	(0x1814 + (((p >> 5) << 2)))
--#define RTL839X_STORM_CTRL_PORT_UC_EXCEED(p)	(0x181c + (((p >> 5) << 2)))
--#define RTL838X_STORM_CTRL_PORT_UC(p)		(0x4718 + (((p) << 2)))
--#define RTL838X_STORM_CTRL_PORT_MC(p)		(0x478c + (((p) << 2)))
--#define RTL838X_STORM_CTRL_PORT_BC(p)		(0x4800 + (((p) << 2)))
--#define RTL839X_STORM_CTRL_PORT_UC_0(p)		(0x185C + (((p) << 3)))
--#define RTL839X_STORM_CTRL_PORT_UC_1(p)		(0x1860 + (((p) << 3)))
--#define RTL839X_STORM_CTRL_PORT_MC_0(p)		(0x19FC + (((p) << 3)))
--#define RTL839X_STORM_CTRL_PORT_MC_1(p)		(0x1a00 + (((p) << 3)))
--#define RTL839X_STORM_CTRL_PORT_BC_0(p)		(0x1B9C + (((p) << 3)))
--#define RTL839X_STORM_CTRL_PORT_BC_1(p)		(0x1BA0 + (((p) << 3)))
--#define RTL839X_TBL_ACCESS_CTRL_2		(0x611C)
--#define RTL839X_TBL_ACCESS_DATA_2(i)		(0x6120 + (((i) << 2)))
--#define RTL839X_IGR_BWCTRL_PORT_CTRL_10G_0(p)	(0x1618 + (((p) << 3)))
--#define RTL839X_IGR_BWCTRL_PORT_CTRL_10G_1(p)	(0x161C + (((p) << 3)))
--#define RTL839X_IGR_BWCTRL_PORT_CTRL_0(p)	(0x1640 + (((p) << 3)))
--#define RTL839X_IGR_BWCTRL_PORT_CTRL_1(p)	(0x1644 + (((p) << 3)))
--#define RTL839X_IGR_BWCTRL_CTRL_LB_THR		(0x1614)
--
--/* Link aggregation (Trunking) */
--#define RTL839X_TRK_MBR_CTR			(0x2200)
--#define RTL838X_TRK_MBR_CTR			(0x3E00)
--#define RTL930X_TRK_MBR_CTRL			(0xA41C)
--#define RTL931X_TRK_MBR_CTRL			(0xB8D0)
--
--/* Attack prevention */
--#define RTL838X_ATK_PRVNT_PORT_EN		(0x5B00)
--#define RTL838X_ATK_PRVNT_CTRL			(0x5B04)
--#define RTL838X_ATK_PRVNT_ACT			(0x5B08)
--#define RTL838X_ATK_PRVNT_STS			(0x5B1C)
--
--/* 802.1X */
--#define RTL838X_SPCL_TRAP_EAPOL_CTRL		(0x6988)
--#define RTL839X_SPCL_TRAP_EAPOL_CTRL		(0x105C)
--
--/* QoS */
--#define RTL838X_QM_INTPRI2QID_CTRL		(0x5F00)
--#define RTL839X_QM_INTPRI2QID_CTRL(q)		(0x1110 + (q << 2))
--#define RTL839X_QM_PORT_QNUM(p)			(0x1130 + (((p / 10) << 2)))
--#define RTL838X_PRI_SEL_PORT_PRI(p)		(0x5FB8 + (((p / 10) << 2)))
--#define RTL839X_PRI_SEL_PORT_PRI(p)		(0x10A8 + (((p / 10) << 2)))
--#define RTL838X_QM_PKT2CPU_INTPRI_MAP		(0x5F10)
--#define RTL839X_QM_PKT2CPU_INTPRI_MAP		(0x1154)
--#define RTL838X_PRI_SEL_CTRL			(0x10E0)
--#define RTL839X_PRI_SEL_CTRL			(0x10E0)
--#define RTL838X_PRI_SEL_TBL_CTRL(i)		(0x5FD8 + (((i) << 2)))
--#define RTL839X_PRI_SEL_TBL_CTRL(i)		(0x10D0 + (((i) << 2)))
--#define RTL838X_QM_PKT2CPU_INTPRI_0		(0x5F04)
--#define RTL838X_QM_PKT2CPU_INTPRI_1		(0x5F08)
--#define RTL838X_QM_PKT2CPU_INTPRI_2		(0x5F0C)
--#define RTL839X_OAM_CTRL			(0x2100)
--#define RTL839X_OAM_PORT_ACT_CTRL(p)	 	(0x2104 + (((p) << 2)))
--#define RTL839X_RMK_PORT_DEI_TAG_CTRL(p)	(0x6A9C + (((p >> 5) << 2)))
--#define RTL839X_PRI_SEL_IPRI_REMAP		(0x1080)
--#define RTL838X_PRI_SEL_IPRI_REMAP		(0x5F8C)
--#define RTL839X_PRI_SEL_DEI2DP_REMAP		(0x10EC)
--#define RTL839X_PRI_SEL_DSCP2DP_REMAP_ADDR(i)	(0x10F0 + (((i >> 4) << 2)))
--#define RTL839X_RMK_DEI_CTRL			(0x6AA4)
--#define RTL839X_WRED_PORT_THR_CTRL(i)		(0x6084 + ((i) << 2))
--#define RTL839X_WRED_QUEUE_THR_CTRL(q, i) 	(0x6090 + ((q) * 12) + ((i) << 2))
--#define RTL838X_PRI_DSCP_INVLD_CTRL0		(0x5FE8)
--#define RTL838X_RMK_IPRI_CTRL			(0xA460)
--#define RTL838X_RMK_OPRI_CTRL			(0xA464)
--#define RTL838X_SCHED_P_TYPE_CTRL(p)		(0xC04C + (((p) << 7)))
--#define RTL838X_SCHED_LB_CTRL(p)		(0xC004 + (((p) << 7)))
--#define RTL838X_FC_P_EGR_DROP_CTRL(p)		(0x6B1C + (((p) << 2)))
--
--/* Debug features */
--#define RTL930X_STAT_PRVTE_DROP_COUNTER0	(0xB5B8)
--
--#define MAX_LAGS 16
--#define MAX_PRIOS 8
--
--enum phy_type {
--	PHY_NONE = 0,
--	PHY_RTL838X_SDS = 1,
--	PHY_RTL8218B_INT = 2,
--	PHY_RTL8218B_EXT = 3,
--	PHY_RTL8214FC = 4,
--	PHY_RTL839X_SDS = 5,
--};
--
--struct rtl838x_port {
--	bool enable;
--	u64 pm;
--	u16 pvid;
--	bool eee_enabled;
--	enum phy_type phy;
--	bool is10G;
--	bool is2G5;
--	u8 sds_num;
--	const struct dsa_port *dp;
--};
--
--struct rtl838x_vlan_info {
--	u64 untagged_ports;
--	u64 tagged_ports;
--	u8 profile_id;
--	bool hash_mc_fid;
--	bool hash_uc_fid;
--	u8 fid;
--};
--
--enum l2_entry_type {
--	L2_INVALID = 0,
--	L2_UNICAST = 1,
--	L2_MULTICAST = 2,
--	IP4_MULTICAST = 3,
--	IP6_MULTICAST = 4,
--};
--
--struct rtl838x_l2_entry {
--	u8 mac[6];
--	u16 vid;
--	u16 rvid;
--	u8 port;
--	bool valid;
--	enum l2_entry_type type;
--	bool is_static;
--	bool is_ip_mc;
--	bool is_ipv6_mc;
--	bool block_da;
--	bool block_sa;
--	bool suspended;
--	bool next_hop;
--	int age;
--	u8 trunk;
--	u8 stackDev;
--	u16 mc_portmask_index;
--};
--
--struct rtl838x_switch_priv;
--
--struct rtl838x_reg {
--	void (*mask_port_reg_be)(u64 clear, u64 set, int reg);
--	void (*set_port_reg_be)(u64 set, int reg);
--	u64 (*get_port_reg_be)(int reg);
--	void (*mask_port_reg_le)(u64 clear, u64 set, int reg);
--	void (*set_port_reg_le)(u64 set, int reg);
--	u64 (*get_port_reg_le)(int reg);
--	int stat_port_rst;
--	int stat_rst;
--	int stat_port_std_mib;
--	int (*port_iso_ctrl)(int p);
--	void (*traffic_enable)(int source, int dest);
--	void (*traffic_disable)(int source, int dest);
--	void (*traffic_set)(int source, u64 dest_matrix);
--	u64 (*traffic_get)(int source);
--	int l2_ctrl_0;
--	int l2_ctrl_1;
--	int l2_port_aging_out;
--	int smi_poll_ctrl;
--	int l2_tbl_flush_ctrl;
--	void (*exec_tbl0_cmd)(u32 cmd);
--	void (*exec_tbl1_cmd)(u32 cmd);
--	int (*tbl_access_data_0)(int i);
--	int isr_glb_src;
--	int isr_port_link_sts_chg;
--	int imr_port_link_sts_chg;
--	int imr_glb;
--	void (*vlan_tables_read)(u32 vlan, struct rtl838x_vlan_info *info);
--	void (*vlan_set_tagged)(u32 vlan, struct rtl838x_vlan_info *info);
--	void (*vlan_set_untagged)(u32 vlan, u64 portmask);
--	void (*vlan_profile_dump)(int index);
--	void (*stp_get)(struct rtl838x_switch_priv *priv, u16 msti, u32 port_state[]);
--	void (*stp_set)(struct rtl838x_switch_priv *priv, u16 msti, u32 port_state[]);
--	int  (*mac_force_mode_ctrl)(int port);
--	int  (*mac_port_ctrl)(int port);
--	int  (*l2_port_new_salrn)(int port);
--	int  (*l2_port_new_sa_fwd)(int port);
--	int mir_ctrl;
--	int mir_dpm;
--	int mir_spm;
--	int mac_link_sts;
--	int mac_link_dup_sts;
--	int  (*mac_link_spd_sts)(int port);
--	int mac_rx_pause_sts;
--	int mac_tx_pause_sts;
--	u64 (*read_l2_entry_using_hash)(u32 hash, u32 position, struct rtl838x_l2_entry *e);
--	u64 (*read_cam)(int idx, struct rtl838x_l2_entry *e);
--	int vlan_port_egr_filter;
--	int vlan_port_igr_filter;
--	int vlan_port_pb;
--	int vlan_port_tag_sts_ctrl;
--	int (*rtl838x_vlan_port_tag_sts_ctrl)(int port);
--	int (*trk_mbr_ctr)(int group);
--	int rma_bpdu_fld_pmask;
--	int spcl_trap_eapol_ctrl;
--};
--
--struct rtl838x_switch_priv {
--	/* Switch operation */
--	struct dsa_switch *ds;
--	struct device *dev;
--	u16 id;
--	u16 family_id;
--	char version;
--	struct rtl838x_port ports[57];
--	struct mutex reg_mutex;
--	int link_state_irq;
--	int mirror_group_ports[4];
--	struct mii_bus *mii_bus;
--	const struct rtl838x_reg *r;
--	u8 cpu_port;
--	u8 port_mask;
--	u8 port_width;
--	u64 irq_mask;
--	u32 fib_entries;
--	struct dentry *dbgfs_dir;
--	int n_lags;
--	u64 lags_port_members[MAX_LAGS];
--	struct net_device *lag_devs[MAX_LAGS];
--	struct notifier_block nb;
--};
--
--void rtl838x_dbgfs_init(struct rtl838x_switch_priv *priv);
--
--#endif /* _RTL838X_H */
-diff --git a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl839x.c b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl839x.c
-index 5106bd2e9d..bfc9e0e1fa 100644
---- a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl839x.c
-+++ b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl839x.c
-@@ -6,6 +6,104 @@
- extern struct mutex smi_lock;
- extern struct rtl83xx_soc_info soc_info;
- 
-+/* Definition of the RTL839X-specific template field IDs as used in the PIE */
-+enum template_field_id {
-+	TEMPLATE_FIELD_SPMMASK = 0,
-+	TEMPLATE_FIELD_SPM0 = 1,		// Source portmask ports 0-15
-+	TEMPLATE_FIELD_SPM1 = 2,		// Source portmask ports 16-31
-+	TEMPLATE_FIELD_SPM2 = 3,		// Source portmask ports 32-47
-+	TEMPLATE_FIELD_SPM3 = 4,		// Source portmask ports 48-56
-+	TEMPLATE_FIELD_DMAC0 = 5,		// Destination MAC [15:0]
-+	TEMPLATE_FIELD_DMAC1 = 6,		// Destination MAC [31:16]
-+	TEMPLATE_FIELD_DMAC2 = 7,		// Destination MAC [47:32]
-+	TEMPLATE_FIELD_SMAC0 = 8,		// Source MAC [15:0]
-+	TEMPLATE_FIELD_SMAC1 = 9,		// Source MAC [31:16]
-+	TEMPLATE_FIELD_SMAC2 = 10,		// Source MAC [47:32]
-+	TEMPLATE_FIELD_ETHERTYPE = 11,		// Ethernet frame type field
-+	// Field-ID 12 is not used
-+	TEMPLATE_FIELD_OTAG = 13,
-+	TEMPLATE_FIELD_ITAG = 14,
-+	TEMPLATE_FIELD_SIP0 = 15,
-+	TEMPLATE_FIELD_SIP1 = 16,
-+	TEMPLATE_FIELD_DIP0 = 17,
-+	TEMPLATE_FIELD_DIP1 = 18,
-+	TEMPLATE_FIELD_IP_TOS_PROTO = 19,
-+	TEMPLATE_FIELD_IP_FLAG = 20,
-+	TEMPLATE_FIELD_L4_SPORT = 21,
-+	TEMPLATE_FIELD_L4_DPORT = 22,
-+	TEMPLATE_FIELD_L34_HEADER = 23,
-+	TEMPLATE_FIELD_ICMP_IGMP = 24,
-+	TEMPLATE_FIELD_VID_RANG0 = 25,
-+	TEMPLATE_FIELD_VID_RANG1 = 26,
-+	TEMPLATE_FIELD_L4_PORT_RANG = 27,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_VALID = 28,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_0 = 29,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_1 = 30,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_2 = 31,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_3 = 32,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_4 = 33,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_5 = 34,
-+	TEMPLATE_FIELD_SIP2 = 35,
-+	TEMPLATE_FIELD_SIP3 = 36,
-+	TEMPLATE_FIELD_SIP4 = 37,
-+	TEMPLATE_FIELD_SIP5 = 38,
-+	TEMPLATE_FIELD_SIP6 = 39,
-+	TEMPLATE_FIELD_SIP7 = 40,
-+	TEMPLATE_FIELD_OLABEL = 41,
-+	TEMPLATE_FIELD_ILABEL = 42,
-+	TEMPLATE_FIELD_OILABEL = 43,
-+	TEMPLATE_FIELD_DPMMASK = 44,
-+	TEMPLATE_FIELD_DPM0 = 45,
-+	TEMPLATE_FIELD_DPM1 = 46,
-+	TEMPLATE_FIELD_DPM2 = 47,
-+	TEMPLATE_FIELD_DPM3 = 48,
-+	TEMPLATE_FIELD_L2DPM0 = 49,
-+	TEMPLATE_FIELD_L2DPM1 = 50,
-+	TEMPLATE_FIELD_L2DPM2 = 51,
-+	TEMPLATE_FIELD_L2DPM3 = 52,
-+	TEMPLATE_FIELD_IVLAN = 53,
-+	TEMPLATE_FIELD_OVLAN = 54,
-+	TEMPLATE_FIELD_FWD_VID = 55,
-+	TEMPLATE_FIELD_DIP2 = 56,
-+	TEMPLATE_FIELD_DIP3 = 57,
-+	TEMPLATE_FIELD_DIP4 = 58,
-+	TEMPLATE_FIELD_DIP5 = 59,
-+	TEMPLATE_FIELD_DIP6 = 60,
-+	TEMPLATE_FIELD_DIP7 = 61,
-+};
-+
-+// Number of fixed templates predefined in the SoC
-+#define N_FIXED_TEMPLATES 5
-+static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS] =
-+{
-+	{
-+	  TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1, TEMPLATE_FIELD_ITAG,
-+	  TEMPLATE_FIELD_SMAC0, TEMPLATE_FIELD_SMAC1, TEMPLATE_FIELD_SMAC2,
-+	  TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2,
-+	  TEMPLATE_FIELD_ETHERTYPE, TEMPLATE_FIELD_SPM2, TEMPLATE_FIELD_SPM3
-+	}, {
-+	  TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_DIP0,
-+	  TEMPLATE_FIELD_DIP1,TEMPLATE_FIELD_IP_TOS_PROTO, TEMPLATE_FIELD_L4_SPORT,
-+	  TEMPLATE_FIELD_L4_DPORT, TEMPLATE_FIELD_ICMP_IGMP, TEMPLATE_FIELD_SPM0,
-+	  TEMPLATE_FIELD_SPM1, TEMPLATE_FIELD_SPM2, TEMPLATE_FIELD_SPM3
-+	}, {
-+	  TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2,
-+	  TEMPLATE_FIELD_ITAG, TEMPLATE_FIELD_ETHERTYPE, TEMPLATE_FIELD_IP_TOS_PROTO,
-+	  TEMPLATE_FIELD_L4_DPORT, TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_SIP0,
-+	  TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_DIP0, TEMPLATE_FIELD_DIP1
-+	}, {
-+	  TEMPLATE_FIELD_DIP0, TEMPLATE_FIELD_DIP1, TEMPLATE_FIELD_DIP2,
-+	  TEMPLATE_FIELD_DIP3, TEMPLATE_FIELD_DIP4, TEMPLATE_FIELD_DIP5,
-+	  TEMPLATE_FIELD_DIP6, TEMPLATE_FIELD_DIP7, TEMPLATE_FIELD_L4_DPORT,
-+	  TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_ICMP_IGMP, TEMPLATE_FIELD_IP_TOS_PROTO
-+	}, {
-+	  TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_SIP2,
-+	  TEMPLATE_FIELD_SIP3, TEMPLATE_FIELD_SIP4, TEMPLATE_FIELD_SIP5,
-+	  TEMPLATE_FIELD_SIP6, TEMPLATE_FIELD_SIP7, TEMPLATE_FIELD_SPM0,
-+	  TEMPLATE_FIELD_SPM1, TEMPLATE_FIELD_SPM2, TEMPLATE_FIELD_SPM3
-+	},
-+};
-+
- void rtl839x_print_matrix(void)
- {
- 	volatile u64 *ptr9;
-@@ -48,68 +146,120 @@ static inline int rtl839x_tbl_access_data_0(int i)
- 
- static void rtl839x_vlan_tables_read(u32 vlan, struct rtl838x_vlan_info *info)
- {
--	u32 cmd;
--	u64 v;
--	u32 u, w;
--
--	cmd = 1 << 16 /* Execute cmd */
--		| 0 << 15 /* Read */
--		| 0 << 12 /* Table type 0b000 */
--		| (vlan & 0xfff);
--	rtl839x_exec_tbl0_cmd(cmd);
--
--	v = sw_r32(RTL839X_TBL_ACCESS_DATA_0(0));
--	v <<= 32;
--	u = sw_r32(RTL839X_TBL_ACCESS_DATA_0(1));
--	v |= u;
--	info->tagged_ports = v >> 11;
--
--	w = sw_r32(RTL839X_TBL_ACCESS_DATA_0(2));
--
--	info->profile_id = w >> 30 | ((u & 1) << 2);
--	info->hash_mc_fid = !!(u & 2);
--	info->hash_uc_fid = !!(u & 4);
--	info->fid = (u >> 3) & 0xff;
--
--	cmd = 1 << 15 /* Execute cmd */
--		| 0 << 14 /* Read */
--		| 0 << 12 /* Table type 0b00 */
--		| (vlan & 0xfff);
--	rtl839x_exec_tbl1_cmd(cmd);
--	v = sw_r32(RTL839X_TBL_ACCESS_DATA_1(0));
--	v <<= 32;
--	v |= sw_r32(RTL839X_TBL_ACCESS_DATA_1(1));
--	info->untagged_ports = v >> 11;
-+	u32 u, v, w;
-+	// Read VLAN table (0) via register 0
-+	struct table_reg *r = rtl_table_get(RTL8390_TBL_0, 0);
-+
-+	rtl_table_read(r, vlan);
-+	u = sw_r32(rtl_table_data(r, 0));
-+	v = sw_r32(rtl_table_data(r, 1));
-+	w = sw_r32(rtl_table_data(r, 2));
-+	rtl_table_release(r);
-+
-+	info->tagged_ports = u;
-+	info->tagged_ports = (info->tagged_ports << 21) | ((v >> 11) & 0x1fffff);
-+	info->profile_id = w >> 30 | ((v & 1) << 2);
-+	info->hash_mc_fid = !!(w & BIT(2));
-+	info->hash_uc_fid = !!(w & BIT(3));
-+	info->fid = (v >> 3) & 0xff;
-+
-+	// Read UNTAG table (0) via table register 1
-+	r = rtl_table_get(RTL8390_TBL_1, 0);
-+	rtl_table_read(r, vlan);
-+	u = sw_r32(rtl_table_data(r, 0));
-+	v = sw_r32(rtl_table_data(r, 1));
-+	rtl_table_release(r);
-+
-+	info->untagged_ports = u;
-+	info->untagged_ports = (info->untagged_ports << 21) | ((v >> 11) & 0x1fffff);
- }
- 
- static void rtl839x_vlan_set_tagged(u32 vlan, struct rtl838x_vlan_info *info)
- {
--	u32 cmd = BIT(16) /* Execute cmd */
--		| BIT(15) /* Write */
--		| 0 << 12 /* Table type 0b00 */
--		| (vlan & 0xfff);
--	u32 w;
--	u64 v = info->tagged_ports << 11;
-+	u32 u, v, w;
-+	// Access VLAN table (0) via register 0
-+	struct table_reg *r = rtl_table_get(RTL8390_TBL_0, 0);
- 
--	v |= info->profile_id >> 2;
--	v |= info->hash_mc_fid ? 2 : 0;
--	v |= info->hash_uc_fid ? 4 : 0;
-+	u = info->tagged_ports >> 21;
-+	v = info->tagged_ports << 11;
- 	v |= ((u32)info->fid) << 3;
--	rtl839x_set_port_reg_be(v, RTL838X_TBL_ACCESS_DATA_0(0));
-+	v |= info->hash_uc_fid ? BIT(2) : 0;
-+	v |= info->hash_mc_fid ? BIT(1) : 0;
-+	v |= (info->profile_id & 0x4) ? 1 : 0;
-+	w = ((u32)(info->profile_id & 3)) << 30;
-+
-+	sw_w32(u, rtl_table_data(r, 0));
-+	sw_w32(v, rtl_table_data(r, 1));
-+	sw_w32(w, rtl_table_data(r, 2));
- 
--	w = info->profile_id;
--	sw_w32(w << 30, RTL838X_TBL_ACCESS_DATA_0(2));
--	rtl839x_exec_tbl0_cmd(cmd);
-+	rtl_table_write(r, vlan);
-+	rtl_table_release(r);
- }
- 
- static void rtl839x_vlan_set_untagged(u32 vlan, u64 portmask)
- {
--	u32 cmd = BIT(16) /* Execute cmd */
--		| BIT(15) /* Write */
--		| 0 << 12 /* Table type 0b00 */
--		| (vlan & 0xfff);
--	rtl839x_set_port_reg_be(portmask << 11, RTL838X_TBL_ACCESS_DATA_1(0));
--	rtl839x_exec_tbl1_cmd(cmd);
-+	u32 u, v;
-+
-+	// Access UNTAG table (0) via table register 1
-+	struct table_reg *r = rtl_table_get(RTL8390_TBL_1, 0);
-+
-+	u = portmask >> 21;
-+	v = portmask << 11;
-+
-+	sw_w32(u, rtl_table_data(r, 0));
-+	sw_w32(v, rtl_table_data(r, 1));
-+	rtl_table_write(r, vlan);
-+
-+	rtl_table_release(r);
-+}
-+
-+/* Sets the L2 forwarding to be based on either the inner VLAN tag or the outer
-+ */
-+static void rtl839x_vlan_fwd_on_inner(int port, bool is_set)
-+{
-+	if (is_set)
-+		rtl839x_mask_port_reg_be(BIT_ULL(port), 0ULL, RTL839X_VLAN_PORT_FWD);
-+	else
-+		rtl839x_mask_port_reg_be(0ULL, BIT_ULL(port), RTL839X_VLAN_PORT_FWD);
-+}
-+
-+/*
-+ * Hash seed is vid (actually rvid) concatenated with the MAC address
-+ */
-+static u64 rtl839x_l2_hash_seed(u64 mac, u32 vid)
-+{
-+	u64 v = vid;
-+
-+	v <<= 48;
-+	v |= mac;
-+
-+	return v;
-+}
-+
-+/*
-+ * Applies the same hash algorithm as the one used currently by the ASIC to the seed
-+ * and returns a key into the L2 hash table
-+ */
-+static u32 rtl839x_l2_hash_key(struct rtl838x_switch_priv *priv, u64 seed)
-+{
-+	u32 h1, h2, h;
-+
-+	if (sw_r32(priv->r->l2_ctrl_0) & 1) {
-+		h1 = (u32) (((seed >> 60) & 0x3f) ^ ((seed >> 54) & 0x3f)
-+				^ ((seed >> 36) & 0x3f) ^ ((seed >> 30) & 0x3f)
-+				^ ((seed >> 12) & 0x3f) ^ ((seed >> 6) & 0x3f));
-+		h2 = (u32) (((seed >> 48) & 0x3f) ^ ((seed >> 42) & 0x3f)
-+				^ ((seed >> 24) & 0x3f) ^ ((seed >> 18) & 0x3f)
-+				^ (seed & 0x3f));
-+		h = (h1 << 6) | h2;
-+	} else {
-+		h = (seed >> 60)
-+			^ ((((seed >> 48) & 0x3f) << 6) | ((seed >> 54) & 0x3f))
-+			^ ((seed >> 36) & 0xfff) ^ ((seed >> 24) & 0xfff)
-+			^ ((seed >> 12) & 0xfff) ^ (seed & 0xfff);
-+	}
-+
-+	return h;
- }
- 
- static inline int rtl839x_mac_force_mode_ctrl(int p)
-@@ -147,10 +297,11 @@ static void rtl839x_fill_l2_entry(u32 r[], struct rtl838x_l2_entry *e)
- 	/* Table contains different entry types, we need to identify the right one:
- 	 * Check for MC entries, first
- 	 */
-+	// pr_info("READING L2: %08x %08x %08x\n", r[0], r[1], r[2]);
- 	e->is_ip_mc = !!(r[2] & BIT(31));
- 	e->is_ipv6_mc = !!(r[2] & BIT(30));
- 	e->type = L2_INVALID;
--	if (!e->is_ip_mc) {
-+	if (!e->is_ip_mc && !e->is_ipv6_mc) {
- 		e->mac[0] = (r[0] >> 12);
- 		e->mac[1] = (r[0] >> 4);
- 		e->mac[2] = ((r[1] >> 28) | (r[0] << 4));
-@@ -158,18 +309,23 @@ static void rtl839x_fill_l2_entry(u32 r[], struct rtl838x_l2_entry *e)
- 		e->mac[4] = (r[1] >> 12);
- 		e->mac[5] = (r[1] >> 4);
- 
-+		e->vid = (r[2] >> 4) & 0xfff;
-+		e->rvid = (r[0] >> 20) & 0xfff;
-+
- 		/* Is it a unicast entry? check multicast bit */
- 		if (!(e->mac[0] & 1)) {
- 			e->is_static = !!((r[2] >> 18) & 1);
--			e->vid = (r[2] >> 4) & 0xfff;
--			e->rvid = (r[0] >> 20) & 0xfff;
- 			e->port = (r[2] >> 24) & 0x3f;
- 			e->block_da = !!(r[2] & (1 << 19));
- 			e->block_sa = !!(r[2] & (1 << 20));
- 			e->suspended = !!(r[2] & (1 << 17));
- 			e->next_hop = !!(r[2] & (1 << 16));
--			if (e->next_hop)
-+			if (e->next_hop) {
- 				pr_info("Found next hop entry, need to read data\n");
-+				e->nh_vlan_target = !!(r[2] & BIT(15));
-+				e->nh_route_id = (r[2] >> 4) & 0x1ff;
-+				e->vid = e->rvid;
-+			}
- 			e->age = (r[2] >> 21) & 3;
- 			e->valid = true;
- 			if (!(r[2] & 0xc0fd0000)) /* Check for valid entry */
-@@ -179,8 +335,13 @@ static void rtl839x_fill_l2_entry(u32 r[], struct rtl838x_l2_entry *e)
- 		} else {
- 			e->valid = true;
- 			e->type = L2_MULTICAST;
--			e->mc_portmask_index = (r[2]>>6) & 0xfff;
-+			e->mc_portmask_index = (r[2] >> 6) & 0xfff;
-+			e->vid = e->rvid;
- 		}
-+	} else { // IPv4 and IPv6 multicast
-+		e->vid = e->rvid = (r[0] << 20) & 0xfff;
-+		e->mc_gip = r[1];
-+		e->mc_portmask_index = (r[2] >> 6) & 0xfff;
- 	}
- 	if (e->is_ip_mc) {
- 		e->valid = true;
-@@ -190,72 +351,180 @@ static void rtl839x_fill_l2_entry(u32 r[], struct rtl838x_l2_entry *e)
- 		e->valid = true;
- 		e->type = IP6_MULTICAST;
- 	}
-+	// pr_info("%s: vid %d, rvid: %d\n", __func__, e->vid, e->rvid);
- }
- 
--static u64 rtl839x_read_l2_entry_using_hash(u32 hash, u32 position, struct rtl838x_l2_entry *e)
-+/*
-+ * Fills the 3 SoC table registers r[] with the information in the rtl838x_l2_entry
-+ */
-+static void rtl839x_fill_l2_row(u32 r[], struct rtl838x_l2_entry *e)
- {
--	u64 entry;
--	u32 r[3];
-+	if (!e->valid) {
-+		r[0] = r[1] = r[2] = 0;
-+		return;
-+	}
-+
-+	pr_info("%s: vid %d, rvid, %d, nh_route_id %d\n", __func__,
-+		e->vid, e->rvid, e->nh_route_id);
-+	r[2] = e->is_ip_mc ? BIT(31) : 0;
-+	r[2] |= e->is_ipv6_mc ? BIT(30) : 0;
-+
-+	if (!e->is_ip_mc  && !e->is_ipv6_mc) {
-+		r[0] = ((u32)e->mac[0]) << 12;
-+		r[0] |= ((u32)e->mac[1]) << 4;
-+		r[0] |= ((u32)e->mac[2]) >> 4;
-+		r[1] = ((u32)e->mac[2]) << 28;
-+		r[1] |= ((u32)e->mac[3]) << 20;
-+		r[1] |= ((u32)e->mac[4]) << 12;
-+		r[1] |= ((u32)e->mac[5]) << 4;
-+
-+		if (!(e->mac[0] & 1)) { // Not multicast
-+			r[2] |= e->is_static ? BIT(18) : 0;
-+			r[0] |= ((u32)e->rvid) << 20;
-+			r[2] |= e->port << 24;
-+			r[2] |= e->block_da ? BIT(19) : 0;
-+			r[2] |= e->block_sa ? BIT(20) : 0;
-+			r[2] |= e->suspended ? BIT(17) : 0;
-+			r[2] |= ((u32)e->age) << 21;
-+			if (e->next_hop) {
-+				r[2] |= BIT(16);
-+				r[2] |= e->nh_vlan_target ? BIT(15) : 0;
-+				r[2] |= (e->nh_route_id & 0x7ff) << 4;
-+			} else {
-+				r[2] |= e->vid << 4;
-+			}
-+			pr_info("Write L2 NH: %08x %08x %08x\n", r[0], r[1], r[2]);
-+		} else {  // L2 Multicast
-+			r[0] |= ((u32)e->rvid) << 20;
-+			r[2] |= ((u32)e->mc_portmask_index) << 6;
-+		}
-+	} else { // IPv4 or IPv6 MC entry
-+		r[0] = ((u32)e->rvid) << 20;
-+		r[1] = e->mc_gip;
-+		r[2] |= ((u32)e->mc_portmask_index) << 6;
-+	}
-+}
- 
--	/* Search in SRAM, with hash and at position in hash bucket (0-3) */
--	u32 idx = (0 << 14) | (hash << 2) | position;
-+/*
-+ * Read an L2 UC or MC entry out of a hash bucket of the L2 forwarding table
-+ * hash is the id of the bucket and pos is the position of the entry in that bucket
-+ * The data read from the SoC is filled into rtl838x_l2_entry
-+ */
-+static u64 rtl839x_read_l2_entry_using_hash(u32 hash, u32 pos, struct rtl838x_l2_entry *e)
-+{
-+	u32 r[3];
-+	struct table_reg *q = rtl_table_get(RTL8390_TBL_L2, 0);
-+	u32 idx = (0 << 14) | (hash << 2) | pos; // Search SRAM, with hash and at pos in bucket
-+	int i;
- 
--	u32 cmd = 1 << 17 /* Execute cmd */
--		| 0 << 16 /* Read */
--		| 0 << 14 /* Table type 0b00 */
--		| (idx & 0x3fff);
-+	rtl_table_read(q, idx);
-+	for (i= 0; i < 3; i++)
-+		r[i] = sw_r32(rtl_table_data(q, i));
- 
--	sw_w32(cmd, RTL839X_TBL_ACCESS_L2_CTRL);
--	do { }  while (sw_r32(RTL839X_TBL_ACCESS_L2_CTRL) & (1 << 17));
--	r[0] = sw_r32(RTL839X_TBL_ACCESS_L2_DATA(0));
--	r[1] = sw_r32(RTL839X_TBL_ACCESS_L2_DATA(1));
--	r[2] = sw_r32(RTL839X_TBL_ACCESS_L2_DATA(2));
-+	rtl_table_release(q);
- 
- 	rtl839x_fill_l2_entry(r, e);
-+	if (!e->valid)
-+		return 0;
-+
-+	return rtl839x_l2_hash_seed(ether_addr_to_u64(&e->mac[0]), e->rvid);
-+}
-+
-+static void rtl839x_write_l2_entry_using_hash(u32 hash, u32 pos, struct rtl838x_l2_entry *e)
-+{
-+	u32 r[3];
-+	struct table_reg *q = rtl_table_get(RTL8390_TBL_L2, 0);
-+	int i;
-+
-+	u32 idx = (0 << 14) | (hash << 2) | pos; // Access SRAM, with hash and at pos in bucket
-+
-+	rtl839x_fill_l2_row(r, e);
-+
-+	for (i= 0; i < 3; i++)
-+		sw_w32(r[i], rtl_table_data(q, i));
- 
--	entry = (((u64) r[0]) << 12) | ((r[1] & 0xfffffff0) << 12) | ((r[2] >> 4) & 0xfff);
--	return entry;
-+	rtl_table_write(q, idx);
-+	rtl_table_release(q);
- }
- 
- static u64 rtl839x_read_cam(int idx, struct rtl838x_l2_entry *e)
- {
--	u64 entry;
- 	u32 r[3];
-+	struct table_reg *q = rtl_table_get(RTL8390_TBL_L2, 1); // Access L2 Table 1
-+	int i;
- 
--	u32 cmd = 1 << 17 /* Execute cmd */
--		| 0 << 16 /* Read */
--		| 1 << 14 /* Table type 0b01 */
--		| (idx & 0x3f);
--	sw_w32(cmd, RTL839X_TBL_ACCESS_L2_CTRL);
--	do { }  while (sw_r32(RTL839X_TBL_ACCESS_L2_CTRL) & (1 << 17));
--	r[0] = sw_r32(RTL839X_TBL_ACCESS_L2_DATA(0));
--	r[1] = sw_r32(RTL839X_TBL_ACCESS_L2_DATA(1));
--	r[2] = sw_r32(RTL839X_TBL_ACCESS_L2_DATA(2));
-+	rtl_table_read(q, idx);
-+	for (i= 0; i < 3; i++)
-+		r[i] = sw_r32(rtl_table_data(q, i));
- 
-+	rtl_table_release(q);
- 
- 	rtl839x_fill_l2_entry(r, e);
--	if (e->valid)
--		pr_info("Found in CAM: R1 %x R2 %x R3 %x\n", r[0], r[1], r[2]);
--	else
-+	if (!e->valid)
- 		return 0;
- 
--	entry = (((u64) r[0]) << 12) | ((r[1] & 0xfffffff0) << 12) | ((r[2] >> 4) & 0xfff);
--	return entry;
-+	pr_debug("Found in CAM: R1 %x R2 %x R3 %x\n", r[0], r[1], r[2]);
-+
-+	// Return MAC with concatenated VID ac concatenated ID
-+	return rtl839x_l2_hash_seed(ether_addr_to_u64(&e->mac[0]), e->rvid);
-+}
-+
-+static void rtl839x_write_cam(int idx, struct rtl838x_l2_entry *e)
-+{
-+	u32 r[3];
-+	struct table_reg *q = rtl_table_get(RTL8390_TBL_L2, 1); // Access L2 Table 1
-+	int i;
-+
-+	rtl839x_fill_l2_row(r, e);
-+
-+	for (i= 0; i < 3; i++)
-+		sw_w32(r[i], rtl_table_data(q, i));
-+
-+	rtl_table_write(q, idx);
-+	rtl_table_release(q);
- }
- 
--static inline int rtl839x_vlan_profile(int profile)
-+static u64 rtl839x_read_mcast_pmask(int idx)
- {
--	return RTL839X_VLAN_PROFILE(profile);
-+	u64 portmask;
-+	// Read MC_PMSK (2) via register RTL8390_TBL_L2
-+	struct table_reg *q = rtl_table_get(RTL8390_TBL_L2, 2);
-+
-+	rtl_table_read(q, idx);
-+	portmask = sw_r32(rtl_table_data(q, 0));
-+	portmask <<= 32;
-+	portmask |= sw_r32(rtl_table_data(q, 1));
-+	portmask >>= 11;  // LSB is bit 11 in data registers
-+	rtl_table_release(q);
-+
-+	return portmask;
- }
- 
--static inline int rtl839x_vlan_port_egr_filter(int port)
-+static void rtl839x_write_mcast_pmask(int idx, u64 portmask)
- {
--	return RTL839X_VLAN_PORT_EGR_FLTR(port);
-+	// Access MC_PMSK (2) via register RTL8380_TBL_L2
-+	struct table_reg *q = rtl_table_get(RTL8390_TBL_L2, 2);
-+
-+	portmask <<= 11; // LSB is bit 11 in data registers
-+	sw_w32((u32)(portmask >> 32), rtl_table_data(q, 0));
-+	sw_w32((u32)((portmask & 0xfffff800)), rtl_table_data(q, 1));
-+	rtl_table_write(q, idx);
-+	rtl_table_release(q);
- }
- 
--static inline int rtl839x_vlan_port_igr_filter(int port)
-+static void rtl839x_vlan_profile_setup(int profile)
- {
--	return RTL839X_VLAN_PORT_IGR_FLTR(port);
-+	u32 p[2];
-+	u32 pmask_id = UNKNOWN_MC_PMASK;
-+
-+	p[0] = pmask_id; // Use portmaks 0xfff for unknown IPv6 MC flooding
-+	// Enable L2 Learning BIT 0, portmask UNKNOWN_MC_PMASK for IP/L2-MC traffic flooding
-+	p[1] = 1 | pmask_id << 1 | pmask_id << 13;
-+
-+	sw_w32(p[0], RTL839X_VLAN_PROFILE(profile));
-+	sw_w32(p[1], RTL839X_VLAN_PROFILE(profile) + 4);
-+
-+	rtl839x_write_mcast_pmask(UNKNOWN_MC_PMASK, 0x001fffffffffffff);
- }
- 
- u64 rtl839x_traffic_get(int source)
-@@ -275,7 +544,59 @@ void rtl839x_traffic_enable(int source, int dest)
- 
- void rtl839x_traffic_disable(int source, int dest)
- {
--	rtl839x_mask_port_reg_be(BIT(dest), 0, rtl839x_port_iso_ctrl(source));
-+	rtl839x_mask_port_reg_be(BIT_ULL(dest), 0, rtl839x_port_iso_ctrl(source));
-+}
-+
-+static void rtl839x_l2_learning_setup(void)
-+{
-+	/* Set portmask for broadcast (offset bit 12) and unknown unicast (offset 0)
-+	 * address flooding to the reserved entry in the portmask table used
-+	 * also for multicast flooding */
-+	sw_w32(UNKNOWN_MC_PMASK << 12 | UNKNOWN_MC_PMASK, RTL839X_L2_FLD_PMSK);
-+
-+	// Limit learning to maximum: 32k entries, after that just flood (bits 0-1)
-+	sw_w32((0x7fff << 2) | 0, RTL839X_L2_LRN_CONSTRT);
-+
-+	// Do not trap ARP packets to CPU_PORT
-+	sw_w32(0, RTL839X_SPCL_TRAP_ARP_CTRL);
-+}
-+static void rtl839x_enable_learning(int port, bool enable)
-+{
-+	// Limit learning to maximum: 32k entries, after that just flood (bits 0-1)
-+	
-+	if (enable)  {
-+		// flood after 32k entries
-+		sw_w32((0x7fff << 2) | 0, RTL839X_L2_PORT_LRN_CONSTRT + (port << 2));
-+	} else { 
-+		// just forward
-+		sw_w32(0, RTL839X_L2_PORT_LRN_CONSTRT + (port << 2));
-+	}
-+
-+}
-+static void rtl839x_enable_flood(int port, bool enable)
-+{
-+	u32 flood_mask = sw_r32(RTL839X_L2_PORT_LRN_CONSTRT + (port << 2));
-+
-+	if (enable)  {
-+		// flood
-+		flood_mask &=~3;
-+		flood_mask |=0;
-+		sw_w32(flood_mask, RTL839X_L2_PORT_LRN_CONSTRT + (port << 2));
-+	} else {
-+		// drop (bit 1)
-+		flood_mask &=~3; 
-+		flood_mask |=1;
-+		sw_w32(flood_mask, RTL839X_L2_PORT_LRN_CONSTRT + (port << 2));
-+	}
-+
-+}
-+static void rtl839x_enable_mcast_flood(int port, bool enable)
-+{
-+
-+}
-+static void rtl839x_enable_bcast_flood(int port, bool enable)
-+{
-+
- }
- 
- irqreturn_t rtl839x_switch_irq(int irq, void *dev_id)
-@@ -290,10 +611,10 @@ irqreturn_t rtl839x_switch_irq(int irq, void *dev_id)
- 	rtl839x_set_port_reg_le(ports, RTL839X_ISR_PORT_LINK_STS_CHG);
- 	pr_debug("RTL8390 Link change: status: %x, ports %llx\n", status, ports);
- 
--	for (i = 0; i < 52; i++) {
--		if (ports & (1ULL << i)) {
-+	for (i = 0; i < RTL839X_CPU_PORT; i++) {
-+		if (ports & BIT_ULL(i)) {
- 			link = rtl839x_get_port_reg_le(RTL839X_MAC_LINK_STS);
--			if (link & (1ULL << i))
-+			if (link & BIT_ULL(i))
- 				dsa_port_phylink_mac_change(ds, i, true);
- 			else
- 				dsa_port_phylink_mac_change(ds, i, false);
-@@ -358,10 +679,9 @@ int rtl839x_write_phy(u32 port, u32 page, u32 reg, u32 val)
- 		return -ENOTSUPP;
- 
- 	mutex_lock(&smi_lock);
--	/* Clear both port registers */
--	sw_w32(0, RTL839X_PHYREG_PORT_CTRL(0));
--	sw_w32(0, RTL839X_PHYREG_PORT_CTRL(0) + 4);
--	sw_w32_mask(0, BIT(port), RTL839X_PHYREG_PORT_CTRL(port));
-+
-+	// Set PHY to access
-+	rtl839x_set_port_reg_le(BIT_ULL(port), RTL839X_PHYREG_PORT_CTRL);
- 
- 	sw_w32_mask(0xffff0000, val << 16, RTL839X_PHYREG_DATA_CTRL);
- 
-@@ -383,6 +703,68 @@ int rtl839x_write_phy(u32 port, u32 page, u32 reg, u32 val)
- 	return err;
- }
- 
-+/*
-+ * Read an mmd register of the PHY
-+ */
-+int rtl839x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val)
-+{
-+	int err = 0;
-+	u32 v;
-+
-+	mutex_lock(&smi_lock);
-+
-+	// Set PHY to access
-+	sw_w32_mask(0xffff << 16, port << 16, RTL839X_PHYREG_DATA_CTRL);
-+
-+	// Set MMD device number and register to write to
-+	sw_w32(devnum << 16 | (regnum & 0xffff), RTL839X_PHYREG_MMD_CTRL);
-+
-+	v = BIT(2) | BIT(0); // MMD-access | EXEC
-+	sw_w32(v, RTL839X_PHYREG_ACCESS_CTRL);
-+
-+	do {
-+		v = sw_r32(RTL839X_PHYREG_ACCESS_CTRL);
-+	} while (v & BIT(0));
-+	// There is no error-checking via BIT 1 of v, as it does not seem to be set correctly
-+	*val = (sw_r32(RTL839X_PHYREG_DATA_CTRL) & 0xffff);
-+	pr_debug("%s: port %d, regnum: %x, val: %x (err %d)\n", __func__, port, regnum, *val, err);
-+
-+	mutex_unlock(&smi_lock);
-+
-+	return err;
-+}
-+
-+/*
-+ * Write to an mmd register of the PHY
-+ */
-+int rtl839x_write_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 val)
-+{
-+	int err = 0;
-+	u32 v;
-+
-+	mutex_lock(&smi_lock);
-+
-+	// Set PHY to access
-+	rtl839x_set_port_reg_le(BIT_ULL(port), RTL839X_PHYREG_PORT_CTRL);
-+
-+	// Set data to write
-+	sw_w32_mask(0xffff << 16, val << 16, RTL839X_PHYREG_DATA_CTRL);
-+
-+	// Set MMD device number and register to write to
-+	sw_w32(devnum << 16 | (regnum & 0xffff), RTL839X_PHYREG_MMD_CTRL);
-+
-+	v = BIT(3) | BIT(2) | BIT(0); // WRITE | MMD-access | EXEC
-+	sw_w32(v, RTL839X_PHYREG_ACCESS_CTRL);
-+
-+	do {
-+		v = sw_r32(RTL839X_PHYREG_ACCESS_CTRL);
-+	} while (v & BIT(0));
-+
-+	pr_debug("%s: port %d, regnum: %x, val: %x (err %d)\n", __func__, port, regnum, val, err);
-+	mutex_unlock(&smi_lock);
-+	return err;
-+}
-+
- void rtl8390_get_version(struct rtl838x_switch_priv *priv)
- {
- 	u32 info;
-@@ -393,42 +775,21 @@ void rtl8390_get_version(struct rtl838x_switch_priv *priv)
- 	priv->version = RTL8390_VERSION_A;
- }
- 
--u32 rtl839x_hash(struct rtl838x_switch_priv *priv, u64 seed)
-+void rtl839x_vlan_profile_dump(int profile)
- {
--	u32 h1, h2, h;
-+	u32 p[2];
- 
--	if (sw_r32(priv->r->l2_ctrl_0) & 1) {
--		h1 = (u32) (((seed >> 60) & 0x3f) ^ ((seed >> 54) & 0x3f)
--				^ ((seed >> 36) & 0x3f) ^ ((seed >> 30) & 0x3f)
--				^ ((seed >> 12) & 0x3f) ^ ((seed >> 6) & 0x3f));
--		h2 = (u32) (((seed >> 48) & 0x3f) ^ ((seed >> 42) & 0x3f)
--				^ ((seed >> 24) & 0x3f) ^ ((seed >> 18) & 0x3f)
--				^ (seed & 0x3f));
--		h = (h1 << 6) | h2;
--	} else {
--		h = (seed >> 60)
--			^ ((((seed >> 48) & 0x3f) << 6) | ((seed >> 54) & 0x3f))
--			^ ((seed >> 36) & 0xfff) ^ ((seed >> 24) & 0xfff)
--			^ ((seed >> 12) & 0xfff) ^ (seed & 0xfff);
--	}
--
--	return h;
--}
--
--void rtl839x_vlan_profile_dump(int index)
--{
--	u32 profile, profile1;
--
--	if (index < 0 || index > 7)
-+	if (profile < 0 || profile > 7)
- 		return;
- 
--	profile1 = sw_r32(RTL839X_VLAN_PROFILE(index) + 4);
--	profile = sw_r32(RTL839X_VLAN_PROFILE(index));
-+	p[0] = sw_r32(RTL839X_VLAN_PROFILE(profile));
-+	p[1] = sw_r32(RTL839X_VLAN_PROFILE(profile) + 4);
- 
--	pr_debug("VLAN %d: L2 learning: %d, L2 Unknown MultiCast Field %x, \
--		IPv4 Unknown MultiCast Field %x, IPv6 Unknown MultiCast Field: %x",
--		index, profile & 1, (profile >> 1) & 0xfff, (profile >> 13) & 0xfff,
--		(profile1) & 0xfff);
-+	pr_info("VLAN profile %d: L2 learning: %d, UNKN L2MC FLD PMSK %d, \
-+		UNKN IPMC FLD PMSK %d, UNKN IPv6MC FLD PMSK: %d",
-+		profile, p[1] & 1, (p[1] >> 1) & 0xfff, (p[1] >> 13) & 0xfff,
-+		(p[0]) & 0xfff);
-+	pr_info("VLAN profile %d: raw %08x, %08x\n", profile, p[0], p[1]);
- }
- 
- static void rtl839x_stp_get(struct rtl838x_switch_priv *priv, u16 msti, u32 port_state[])
-@@ -456,6 +817,942 @@ static void rtl839x_stp_set(struct rtl838x_switch_priv *priv, u16 msti, u32 port
- 	priv->r->exec_tbl0_cmd(cmd);
- }
- 
-+/*
-+ * Enables or disables the EEE/EEEP capability of a port
-+ */
-+void rtl839x_port_eee_set(struct rtl838x_switch_priv *priv, int port, bool enable)
-+{
-+	u32 v;
-+
-+	// This works only for Ethernet ports, and on the RTL839X, ports above 47 are SFP
-+	if (port >= 48)
-+		return;
-+
-+	enable = true;
-+	pr_debug("In %s: setting port %d to %d\n", __func__, port, enable);
-+	v = enable ? 0xf : 0x0;
-+
-+	// Set EEE for 100, 500, 1000MBit and 10GBit
-+	sw_w32_mask(0xf << 8, v << 8, rtl839x_mac_force_mode_ctrl(port));
-+
-+	// Set TX/RX EEE state
-+	v = enable ? 0x3 : 0x0;
-+	sw_w32(v, RTL839X_EEE_CTRL(port));
-+
-+	priv->ports[port].eee_enabled = enable;
-+}
-+
-+/*
-+ * Get EEE own capabilities and negotiation result
-+ */
-+int rtl839x_eee_port_ability(struct rtl838x_switch_priv *priv, struct ethtool_eee *e, int port)
-+{
-+	u64 link, a;
-+
-+	if (port >= 48)
-+		return 0;
-+
-+	link = rtl839x_get_port_reg_le(RTL839X_MAC_LINK_STS);
-+	if (!(link & BIT_ULL(port)))
-+		return 0;
-+
-+	if (sw_r32(rtl839x_mac_force_mode_ctrl(port)) & BIT(8))
-+		e->advertised |= ADVERTISED_100baseT_Full;
-+
-+	if (sw_r32(rtl839x_mac_force_mode_ctrl(port)) & BIT(10))
-+		e->advertised |= ADVERTISED_1000baseT_Full;
-+
-+	a = rtl839x_get_port_reg_le(RTL839X_MAC_EEE_ABLTY);
-+	pr_info("Link partner: %016llx\n", a);
-+	if (rtl839x_get_port_reg_le(RTL839X_MAC_EEE_ABLTY) & BIT_ULL(port)) {
-+		e->lp_advertised = ADVERTISED_100baseT_Full;
-+		e->lp_advertised |= ADVERTISED_1000baseT_Full;
-+		return 1;
-+	}
-+
-+	return 0;
-+}
-+
-+static void rtl839x_init_eee(struct rtl838x_switch_priv *priv, bool enable)
-+{
-+	int i;
-+
-+	pr_info("Setting up EEE, state: %d\n", enable);
-+
-+	// Set wake timer for TX and pause timer both to 0x21
-+	sw_w32_mask(0xff << 20| 0xff, 0x21 << 20| 0x21, RTL839X_EEE_TX_TIMER_GELITE_CTRL);
-+	// Set pause wake timer for GIGA-EEE to 0x11
-+	sw_w32_mask(0xff << 20, 0x11 << 20, RTL839X_EEE_TX_TIMER_GIGA_CTRL);
-+	// Set pause wake timer for 10GBit ports to 0x11
-+	sw_w32_mask(0xff << 20, 0x11 << 20, RTL839X_EEE_TX_TIMER_10G_CTRL);
-+
-+	// Setup EEE on all ports
-+	for (i = 0; i < priv->cpu_port; i++) {
-+		if (priv->ports[i].phy)
-+			rtl839x_port_eee_set(priv, i, enable);
-+	}
-+	priv->eee_enabled = enable;
-+}
-+
-+static void rtl839x_pie_lookup_enable(struct rtl838x_switch_priv *priv, int index)
-+{
-+	int block = index / PIE_BLOCK_SIZE;
-+
-+	sw_w32_mask(0, BIT(block), RTL839X_ACL_BLK_LOOKUP_CTRL);
-+}
-+
-+/*
-+ * Delete a range of Packet Inspection Engine rules
-+ */
-+static int rtl839x_pie_rule_del(struct rtl838x_switch_priv *priv, int index_from, int index_to)
-+{
-+	u32 v = (index_from << 1)| (index_to << 13 ) | BIT(0);
-+
-+	pr_info("%s: from %d to %d\n", __func__, index_from, index_to);
-+	mutex_lock(&priv->reg_mutex);
-+
-+	// Write from-to and execute bit into control register
-+	sw_w32(v, RTL839X_ACL_CLR_CTRL);
-+
-+	// Wait until command has completed
-+	do {
-+	} while (sw_r32(RTL839X_ACL_CLR_CTRL) & BIT(0));
-+
-+	mutex_unlock(&priv->reg_mutex);
-+	return 0;
-+}
-+
-+/*
-+ * Reads the intermediate representation of the templated match-fields of the
-+ * PIE rule in the pie_rule structure and fills in the raw data fields in the
-+ * raw register space r[].
-+ * The register space configuration size is identical for the RTL8380/90 and RTL9300,
-+ * however the RTL9310 has 2 more registers / fields and the physical field-ids are different
-+ * on all SoCs
-+ * On the RTL8390 the template mask registers are not word-aligned!
-+ */
-+static void rtl839x_write_pie_templated(u32 r[], struct pie_rule *pr, enum template_field_id t[])
-+{
-+	int i;
-+	enum template_field_id field_type;
-+	u16 data, data_m;
-+
-+	for (i = 0; i < N_FIXED_FIELDS; i++) {
-+		field_type = t[i];
-+		data = data_m = 0;
-+
-+		switch (field_type) {
-+		case TEMPLATE_FIELD_SPM0:
-+			data = pr->spm;
-+			data_m = pr->spm_m;
-+			break;
-+		case TEMPLATE_FIELD_SPM1:
-+			data = pr->spm >> 16;
-+			data_m = pr->spm_m >> 16;
-+			break;
-+		case TEMPLATE_FIELD_SPM2:
-+			data = pr->spm >> 32;
-+			data_m = pr->spm_m >> 32;
-+			break;
-+		case TEMPLATE_FIELD_SPM3:
-+			data = pr->spm >> 48;
-+			data_m = pr->spm_m >> 48;
-+			break;
-+		case TEMPLATE_FIELD_OTAG:
-+			data = pr->otag;
-+			data_m = pr->otag_m;
-+			break;
-+		case TEMPLATE_FIELD_SMAC0:
-+			data = pr->smac[4];
-+			data = (data << 8) | pr->smac[5];
-+			data_m = pr->smac_m[4];
-+			data_m = (data_m << 8) | pr->smac_m[5];
-+			break;
-+		case TEMPLATE_FIELD_SMAC1:
-+			data = pr->smac[2];
-+			data = (data << 8) | pr->smac[3];
-+			data_m = pr->smac_m[2];
-+			data_m = (data_m << 8) | pr->smac_m[3];
-+			break;
-+		case TEMPLATE_FIELD_SMAC2:
-+			data = pr->smac[0];
-+			data = (data << 8) | pr->smac[1];
-+			data_m = pr->smac_m[0];
-+			data_m = (data_m << 8) | pr->smac_m[1];
-+			break;
-+		case TEMPLATE_FIELD_DMAC0:
-+			data = pr->dmac[4];
-+			data = (data << 8) | pr->dmac[5];
-+			data_m = pr->dmac_m[4];
-+			data_m = (data_m << 8) | pr->dmac_m[5];
-+			break;
-+		case TEMPLATE_FIELD_DMAC1:
-+			data = pr->dmac[2];
-+			data = (data << 8) | pr->dmac[3];
-+			data_m = pr->dmac_m[2];
-+			data_m = (data_m << 8) | pr->dmac_m[3];
-+			break;
-+		case TEMPLATE_FIELD_DMAC2:
-+			data = pr->dmac[0];
-+			data = (data << 8) | pr->dmac[1];
-+			data_m = pr->dmac_m[0];
-+			data_m = (data_m << 8) | pr->dmac_m[1];
-+			break;
-+		case TEMPLATE_FIELD_ETHERTYPE:
-+			data = pr->ethertype;
-+			data_m = pr->ethertype_m;
-+			break;
-+		case TEMPLATE_FIELD_ITAG:
-+			data = pr->itag;
-+			data_m = pr->itag_m;
-+			break;
-+		case TEMPLATE_FIELD_SIP0:
-+			if (pr->is_ipv6) {
-+				data = pr->sip6.s6_addr16[7];
-+				data_m = pr->sip6_m.s6_addr16[7];
-+			} else {
-+				data = pr->sip;
-+				data_m = pr->sip_m;
-+			}
-+			break;
-+		case TEMPLATE_FIELD_SIP1:
-+			if (pr->is_ipv6) {
-+				data = pr->sip6.s6_addr16[6];
-+				data_m = pr->sip6_m.s6_addr16[6];
-+			} else {
-+				data = pr->sip >> 16;
-+				data_m = pr->sip_m >> 16;
-+			}
-+			break;
-+
-+		case TEMPLATE_FIELD_SIP2:
-+		case TEMPLATE_FIELD_SIP3:
-+		case TEMPLATE_FIELD_SIP4:
-+		case TEMPLATE_FIELD_SIP5:
-+		case TEMPLATE_FIELD_SIP6:
-+		case TEMPLATE_FIELD_SIP7:
-+			data = pr->sip6.s6_addr16[5 - (field_type - TEMPLATE_FIELD_SIP2)];
-+			data_m = pr->sip6_m.s6_addr16[5 - (field_type - TEMPLATE_FIELD_SIP2)];
-+			break;
-+
-+		case TEMPLATE_FIELD_DIP0:
-+			if (pr->is_ipv6) {
-+				data = pr->dip6.s6_addr16[7];
-+				data_m = pr->dip6_m.s6_addr16[7];
-+			} else {
-+				data = pr->dip;
-+				data_m = pr->dip_m;
-+			}
-+			break;
-+
-+		case TEMPLATE_FIELD_DIP1:
-+			if (pr->is_ipv6) {
-+				data = pr->dip6.s6_addr16[6];
-+				data_m = pr->dip6_m.s6_addr16[6];
-+			} else {
-+				data = pr->dip >> 16;
-+				data_m = pr->dip_m >> 16;
-+			}
-+			break;
-+
-+		case TEMPLATE_FIELD_DIP2:
-+		case TEMPLATE_FIELD_DIP3:
-+		case TEMPLATE_FIELD_DIP4:
-+		case TEMPLATE_FIELD_DIP5:
-+		case TEMPLATE_FIELD_DIP6:
-+		case TEMPLATE_FIELD_DIP7:
-+			data = pr->dip6.s6_addr16[5 - (field_type - TEMPLATE_FIELD_DIP2)];
-+			data_m = pr->dip6_m.s6_addr16[5 - (field_type - TEMPLATE_FIELD_DIP2)];
-+			break;
-+
-+		case TEMPLATE_FIELD_IP_TOS_PROTO:
-+			data = pr->tos_proto;
-+			data_m = pr->tos_proto_m;
-+			break;
-+		case TEMPLATE_FIELD_L4_SPORT:
-+			data = pr->sport;
-+			data_m = pr->sport_m;
-+			break;
-+		case TEMPLATE_FIELD_L4_DPORT:
-+			data = pr->dport;
-+			data_m = pr->dport_m;
-+			break;
-+		case TEMPLATE_FIELD_ICMP_IGMP:
-+			data = pr->icmp_igmp;
-+			data_m = pr->icmp_igmp_m;
-+			break;
-+		default:
-+			pr_info("%s: unknown field %d\n", __func__, field_type);
-+		}
-+
-+		// On the RTL8390, the mask fields are not word aligned!
-+		if (!(i % 2)) {
-+			r[5 - i / 2] = data;
-+			r[12 - i / 2] |= ((u32)data_m << 8);
-+		} else {
-+			r[5 - i / 2] |= ((u32)data) << 16;
-+			r[12 - i / 2] |= ((u32)data_m) << 24;
-+			r[11 - i / 2] |= ((u32)data_m) >> 8;
-+		}
-+	}
-+}
-+
-+/*
-+ * Creates the intermediate representation of the templated match-fields of the
-+ * PIE rule in the pie_rule structure by reading the raw data fields in the
-+ * raw register space r[].
-+ * The register space configuration size is identical for the RTL8380/90 and RTL9300,
-+ * however the RTL9310 has 2 more registers / fields and the physical field-ids
-+ * On the RTL8390 the template mask registers are not word-aligned!
-+ */
-+void rtl839x_read_pie_templated(u32 r[], struct pie_rule *pr, enum template_field_id t[])
-+{
-+	int i;
-+	enum template_field_id field_type;
-+	u16 data, data_m;
-+
-+	for (i = 0; i < N_FIXED_FIELDS; i++) {
-+		field_type = t[i];
-+		if (!(i % 2)) {
-+			// BUG: fix me after verifying writing
-+			data = r[5 - i / 2];
-+			data_m = r[12 - i / 2];
-+		} else {
-+			data = r[5 - i / 2] >> 16;
-+			data_m = r[12 - i / 2] >> 16;
-+		}
-+
-+		switch (field_type) {
-+		case TEMPLATE_FIELD_SPM0:
-+			pr->spm = (pr->spn << 16) | data;
-+			pr->spm_m = (pr->spn << 16) | data_m;
-+			break;
-+		case TEMPLATE_FIELD_SPM1:
-+			pr->spm = data;
-+			pr->spm_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_OTAG:
-+			pr->otag = data;
-+			pr->otag_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_SMAC0:
-+			pr->smac[4] = data >> 8;
-+			pr->smac[5] = data;
-+			pr->smac_m[4] = data >> 8;
-+			pr->smac_m[5] = data;
-+			break;
-+		case TEMPLATE_FIELD_SMAC1:
-+			pr->smac[2] = data >> 8;
-+			pr->smac[3] = data;
-+			pr->smac_m[2] = data >> 8;
-+			pr->smac_m[3] = data;
-+			break;
-+		case TEMPLATE_FIELD_SMAC2:
-+			pr->smac[0] = data >> 8;
-+			pr->smac[1] = data;
-+			pr->smac_m[0] = data >> 8;
-+			pr->smac_m[1] = data;
-+			break;
-+		case TEMPLATE_FIELD_DMAC0:
-+			pr->dmac[4] = data >> 8;
-+			pr->dmac[5] = data;
-+			pr->dmac_m[4] = data >> 8;
-+			pr->dmac_m[5] = data;
-+			break;
-+		case TEMPLATE_FIELD_DMAC1:
-+			pr->dmac[2] = data >> 8;
-+			pr->dmac[3] = data;
-+			pr->dmac_m[2] = data >> 8;
-+			pr->dmac_m[3] = data;
-+			break;
-+		case TEMPLATE_FIELD_DMAC2:
-+			pr->dmac[0] = data >> 8;
-+			pr->dmac[1] = data;
-+			pr->dmac_m[0] = data >> 8;
-+			pr->dmac_m[1] = data;
-+			break;
-+		case TEMPLATE_FIELD_ETHERTYPE:
-+			pr->ethertype = data;
-+			pr->ethertype_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_ITAG:
-+			pr->itag = data;
-+			pr->itag_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_SIP0:
-+			pr->sip = data;
-+			pr->sip_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_SIP1:
-+			pr->sip = (pr->sip << 16) | data;
-+			pr->sip_m = (pr->sip << 16) | data_m;
-+			break;
-+		case TEMPLATE_FIELD_SIP2:
-+			pr->is_ipv6 = true;
-+			// Make use of limitiations on the position of the match values
-+			ipv6_addr_set(&pr->sip6, pr->sip, r[5 - i / 2],
-+				      r[4 - i / 2], r[3 - i / 2]);
-+			ipv6_addr_set(&pr->sip6_m, pr->sip_m, r[5 - i / 2],
-+				      r[4 - i / 2], r[3 - i / 2]);
-+		case TEMPLATE_FIELD_SIP3:
-+		case TEMPLATE_FIELD_SIP4:
-+		case TEMPLATE_FIELD_SIP5:
-+		case TEMPLATE_FIELD_SIP6:
-+		case TEMPLATE_FIELD_SIP7:
-+			break;
-+
-+		case TEMPLATE_FIELD_DIP0:
-+			pr->dip = data;
-+			pr->dip_m = data_m;
-+			break;
-+
-+		case TEMPLATE_FIELD_DIP1:
-+			pr->dip = (pr->dip << 16) | data;
-+			pr->dip_m = (pr->dip << 16) | data_m;
-+			break;
-+
-+		case TEMPLATE_FIELD_DIP2:
-+			pr->is_ipv6 = true;
-+			ipv6_addr_set(&pr->dip6, pr->dip, r[5 - i / 2],
-+				      r[4 - i / 2], r[3 - i / 2]);
-+			ipv6_addr_set(&pr->dip6_m, pr->dip_m, r[5 - i / 2],
-+				      r[4 - i / 2], r[3 - i / 2]);
-+		case TEMPLATE_FIELD_DIP3:
-+		case TEMPLATE_FIELD_DIP4:
-+		case TEMPLATE_FIELD_DIP5:
-+		case TEMPLATE_FIELD_DIP6:
-+		case TEMPLATE_FIELD_DIP7:
-+			break;
-+		case TEMPLATE_FIELD_IP_TOS_PROTO:
-+			pr->tos_proto = data;
-+			pr->tos_proto_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_L4_SPORT:
-+			pr->sport = data;
-+			pr->sport_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_L4_DPORT:
-+			pr->dport = data;
-+			pr->dport_m = data_m;
-+			break;
-+		case TEMPLATE_FIELD_ICMP_IGMP:
-+			pr->icmp_igmp = data;
-+			pr->icmp_igmp_m = data_m;
-+			break;
-+		default:
-+			pr_info("%s: unknown field %d\n", __func__, field_type);
-+		}
-+	}
-+}
-+
-+static void rtl839x_read_pie_fixed_fields(u32 r[], struct pie_rule *pr)
-+{
-+	pr->spmmask_fix = (r[6] >> 30) & 0x3;
-+	pr->spn = (r[6] >> 24) & 0x3f;
-+	pr->mgnt_vlan = (r[6] >> 23) & 1;
-+	pr->dmac_hit_sw = (r[6] >> 22) & 1;
-+	pr->not_first_frag = (r[6] >> 21) & 1;
-+	pr->frame_type_l4 = (r[6] >> 18) & 7;
-+	pr->frame_type = (r[6] >> 16) & 3;
-+	pr->otag_fmt = (r[6] >> 15) & 1;
-+	pr->itag_fmt = (r[6] >> 14) & 1;
-+	pr->otag_exist = (r[6] >> 13) & 1;
-+	pr->itag_exist = (r[6] >> 12) & 1;
-+	pr->frame_type_l2 = (r[6] >> 10) & 3;
-+	pr->tid = (r[6] >> 8) & 3;
-+
-+	pr->spmmask_fix_m = (r[12] >> 6) & 0x3;
-+	pr->spn_m = r[12]  & 0x3f;
-+	pr->mgnt_vlan_m = (r[13] >> 31) & 1;
-+	pr->dmac_hit_sw_m = (r[13] >> 30) & 1;
-+	pr->not_first_frag_m = (r[13] >> 29) & 1;
-+	pr->frame_type_l4_m = (r[13] >> 26) & 7;
-+	pr->frame_type_m = (r[13] >> 24) & 3;
-+	pr->otag_fmt_m = (r[13] >> 23) & 1;
-+	pr->itag_fmt_m = (r[13] >> 22) & 1;
-+	pr->otag_exist_m = (r[13] >> 21) & 1;
-+	pr->itag_exist_m = (r[13] >> 20) & 1;
-+	pr->frame_type_l2_m = (r[13] >> 18) & 3;
-+	pr->tid_m = (r[13] >> 16) & 3;
-+
-+	pr->valid = r[13] & BIT(15);
-+	pr->cond_not = r[13] & BIT(14);
-+	pr->cond_and1 = r[13] & BIT(13);
-+	pr->cond_and2 = r[13] & BIT(12);
-+}
-+
-+static void rtl839x_write_pie_fixed_fields(u32 r[],  struct pie_rule *pr)
-+{
-+	r[6] = ((u32) (pr->spmmask_fix & 0x3)) << 30;
-+	r[6] |= ((u32) (pr->spn & 0x3f)) << 24;
-+	r[6] |= pr->mgnt_vlan ? BIT(23) : 0;
-+	r[6] |= pr->dmac_hit_sw ? BIT(22) : 0;
-+	r[6] |= pr->not_first_frag ? BIT(21) : 0;
-+	r[6] |= ((u32) (pr->frame_type_l4 & 0x7)) << 18;
-+	r[6] |= ((u32) (pr->frame_type & 0x3)) << 16;
-+	r[6] |= pr->otag_fmt ? BIT(15) : 0;
-+	r[6] |= pr->itag_fmt ? BIT(14) : 0;
-+	r[6] |= pr->otag_exist ? BIT(13) : 0;
-+	r[6] |= pr->itag_exist ? BIT(12) : 0;
-+	r[6] |= ((u32) (pr->frame_type_l2 & 0x3)) << 10;
-+	r[6] |= ((u32) (pr->tid & 0x3)) << 8;
-+
-+	r[12] |= ((u32) (pr->spmmask_fix_m & 0x3)) << 6;
-+	r[12] |= (u32) (pr->spn_m & 0x3f);
-+	r[13] |= pr->mgnt_vlan_m ? BIT(31) : 0;
-+	r[13] |= pr->dmac_hit_sw_m ? BIT(30) : 0;
-+	r[13] |= pr->not_first_frag_m ? BIT(29) : 0;
-+	r[13] |= ((u32) (pr->frame_type_l4_m & 0x7)) << 26;
-+	r[13] |= ((u32) (pr->frame_type_m & 0x3)) << 24;
-+	r[13] |= pr->otag_fmt_m ? BIT(23) : 0;
-+	r[13] |= pr->itag_fmt_m ? BIT(22) : 0;
-+	r[13] |= pr->otag_exist_m ? BIT(21) : 0;
-+	r[13] |= pr->itag_exist_m ? BIT(20) : 0;
-+	r[13] |= ((u32) (pr->frame_type_l2_m & 0x3)) << 18;
-+	r[13] |= ((u32) (pr->tid_m & 0x3)) << 16;
-+
-+	r[13] |= pr->valid ? BIT(15) : 0;
-+	r[13] |= pr->cond_not ? BIT(14) : 0;
-+	r[13] |= pr->cond_and1 ? BIT(13) : 0;
-+	r[13] |= pr->cond_and2 ? BIT(12) : 0;
-+}
-+
-+static void rtl839x_write_pie_action(u32 r[],  struct pie_rule *pr)
-+{
-+	if (pr->drop) {
-+		r[13] |= 0x9;	// Set ACT_MASK_FWD & FWD_ACT = DROP
-+		r[13] |= BIT(3);
-+	} else {
-+		r[13] |= pr->fwd_sel ? BIT(3) : 0;
-+		r[13] |= pr->fwd_act;
-+	}
-+	r[13] |= pr->bypass_sel ? BIT(11) : 0;
-+	r[13] |= pr->mpls_sel ? BIT(10) : 0;
-+	r[13] |= pr->nopri_sel ? BIT(9) : 0;
-+	r[13] |= pr->ovid_sel ? BIT(8) : 0;
-+	r[13] |= pr->ivid_sel ? BIT(7) : 0;
-+	r[13] |= pr->meter_sel ? BIT(6) : 0;
-+	r[13] |= pr->mir_sel ? BIT(5) : 0;
-+	r[13] |= pr->log_sel ? BIT(4) : 0;
-+
-+	r[14] |= ((u32)(pr->fwd_data & 0x3fff)) << 18;
-+	r[14] |= pr->log_octets ? BIT(17) : 0;
-+	r[14] |= ((u32)(pr->log_data & 0x7ff)) << 4;
-+	r[14] |= (pr->mir_data & 0x3) << 3;
-+	r[14] |= ((u32)(pr->meter_data >> 7)) & 0x7;
-+	r[15] |= (u32)(pr->meter_data) << 26;
-+	r[15] |= ((u32)(pr->ivid_act) << 23) & 0x3;
-+	r[15] |= ((u32)(pr->ivid_data) << 9) & 0xfff;
-+	r[15] |= ((u32)(pr->ovid_act) << 6) & 0x3;
-+	r[15] |= ((u32)(pr->ovid_data) >> 4) & 0xff;
-+	r[16] |= ((u32)(pr->ovid_data) & 0xf) << 28;
-+	r[16] |= ((u32)(pr->nopri_data) & 0x7) << 20;
-+	r[16] |= ((u32)(pr->mpls_act) & 0x7) << 20;
-+	r[16] |= ((u32)(pr->mpls_lib_idx) & 0x7) << 20;
-+	r[16] |= pr->bypass_all ? BIT(9) : 0;
-+	r[16] |= pr->bypass_igr_stp ? BIT(8) : 0;
-+	r[16] |= pr->bypass_ibc_sc ? BIT(7) : 0;
-+}
-+
-+static void rtl839x_read_pie_action(u32 r[],  struct pie_rule *pr)
-+{
-+	if (r[13] & BIT(3)) { // ACT_MASK_FWD set, is it a drop?
-+		if ((r[14] & 0x7) == 1) {
-+			pr->drop = true;
-+		} else {
-+			pr->fwd_sel = true;
-+			pr->fwd_act = r[14] & 0x7;
-+		}
-+	}
-+
-+	pr->bypass_sel = r[13] & BIT(11);
-+	pr->mpls_sel = r[13] & BIT(10);
-+	pr->nopri_sel = r[13] & BIT(9);
-+	pr->ovid_sel = r[13] & BIT(8);
-+	pr->ivid_sel = r[13] & BIT(7);
-+	pr->meter_sel = r[13] & BIT(6);
-+	pr->mir_sel = r[13] & BIT(5);
-+	pr->log_sel = r[13] & BIT(4);
-+
-+	// TODO: Read in data fields
-+
-+	pr->bypass_all = r[16] & BIT(9);
-+	pr->bypass_igr_stp = r[16] & BIT(8);
-+	pr->bypass_ibc_sc = r[16] & BIT(7);
-+}
-+
-+void rtl839x_pie_rule_dump_raw(u32 r[])
-+{
-+	pr_info("Raw IACL table entry:\n");
-+	pr_info("Match  : %08x %08x %08x %08x %08x %08x\n", r[0], r[1], r[2], r[3], r[4], r[5]);
-+	pr_info("Fixed  : %06x\n", r[6] >> 8);
-+	pr_info("Match M: %08x %08x %08x %08x %08x %08x\n",
-+		(r[6] << 24) | (r[7] >> 8), (r[7] << 24) | (r[8] >> 8), (r[8] << 24) | (r[9] >> 8),
-+		(r[9] << 24) | (r[10] >> 8), (r[10] << 24) | (r[11] >> 8),
-+		(r[11] << 24) | (r[12] >> 8));
-+	pr_info("R[13]:   %08x\n", r[13]);
-+	pr_info("Fixed M: %06x\n", ((r[12] << 16) | (r[13] >> 16)) & 0xffffff);
-+	pr_info("Valid / not / and1 / and2 : %1x\n", (r[13] >> 12) & 0xf);
-+	pr_info("r 13-16: %08x %08x %08x %08x\n", r[13], r[14], r[15], r[16]);
-+}
-+
-+void rtl839x_pie_rule_dump(struct  pie_rule *pr)
-+{
-+	pr_info("Drop: %d, fwd: %d, ovid: %d, ivid: %d, flt: %d, log: %d, rmk: %d, meter: %d tagst: %d, mir: %d, nopri: %d, cpupri: %d, otpid: %d, itpid: %d, shape: %d\n",
-+		pr->drop, pr->fwd_sel, pr->ovid_sel, pr->ivid_sel, pr->flt_sel, pr->log_sel, pr->rmk_sel, pr->log_sel, pr->tagst_sel, pr->mir_sel, pr->nopri_sel,
-+		pr->cpupri_sel, pr->otpid_sel, pr->itpid_sel, pr->shaper_sel);
-+	if (pr->fwd_sel)
-+		pr_info("FWD: %08x\n", pr->fwd_data);
-+	pr_info("TID: %x, %x\n", pr->tid, pr->tid_m);
-+}
-+
-+static int rtl839x_pie_rule_read(struct rtl838x_switch_priv *priv, int idx, struct  pie_rule *pr)
-+{
-+	// Read IACL table (2) via register 0
-+	struct table_reg *q = rtl_table_get(RTL8380_TBL_0, 2);
-+	u32 r[17];
-+	int i;
-+	int block = idx / PIE_BLOCK_SIZE;
-+	u32 t_select = sw_r32(RTL839X_ACL_BLK_TMPLTE_CTRL(block));
-+
-+	memset(pr, 0, sizeof(*pr));
-+	rtl_table_read(q, idx);
-+	for (i = 0; i < 17; i++)
-+		r[i] = sw_r32(rtl_table_data(q, i));
-+
-+	rtl_table_release(q);
-+
-+	rtl839x_read_pie_fixed_fields(r, pr);
-+	if (!pr->valid)
-+		return 0;
-+
-+	pr_info("%s: template_selectors %08x, tid: %d\n", __func__, t_select, pr->tid);
-+	rtl839x_pie_rule_dump_raw(r);
-+
-+	rtl839x_read_pie_templated(r, pr, fixed_templates[(t_select >> (pr->tid * 3)) & 0x7]);
-+
-+	rtl839x_read_pie_action(r, pr);
-+
-+	return 0;
-+}
-+
-+static int rtl839x_pie_rule_write(struct rtl838x_switch_priv *priv, int idx, struct pie_rule *pr)
-+{
-+	// Access IACL table (2) via register 0
-+	struct table_reg *q = rtl_table_get(RTL8390_TBL_0, 2);
-+	u32 r[17];
-+	int i;
-+	int block = idx / PIE_BLOCK_SIZE;
-+	u32 t_select = sw_r32(RTL839X_ACL_BLK_TMPLTE_CTRL(block));
-+
-+	pr_info("%s: %d, t_select: %08x\n", __func__, idx, t_select);
-+
-+	for (i = 0; i < 17; i++)
-+		r[i] = 0;
-+
-+	if (!pr->valid) {
-+		rtl_table_write(q, idx);
-+		rtl_table_release(q);
-+		return 0;
-+	}
-+	rtl839x_write_pie_fixed_fields(r, pr);
-+
-+	pr_info("%s: template %d\n", __func__, (t_select >> (pr->tid * 3)) & 0x7);
-+	rtl839x_write_pie_templated(r, pr, fixed_templates[(t_select >> (pr->tid * 3)) & 0x7]);
-+
-+	rtl839x_write_pie_action(r, pr);
-+
-+	rtl839x_pie_rule_dump_raw(r);
-+
-+	for (i = 0; i < 17; i++)
-+		sw_w32(r[i], rtl_table_data(q, i));
-+
-+	rtl_table_write(q, idx);
-+	rtl_table_release(q);
-+
-+	return 0;
-+}
-+
-+static bool rtl839x_pie_templ_has(int t, enum template_field_id field_type)
-+{
-+	int i;
-+	enum template_field_id ft;
-+
-+	for (i = 0; i < N_FIXED_FIELDS; i++) {
-+		ft = fixed_templates[t][i];
-+		if (field_type == ft)
-+			return true;
-+	}
-+
-+	return false;
-+}
-+
-+static int rtl839x_pie_verify_template(struct rtl838x_switch_priv *priv,
-+				       struct pie_rule *pr, int t, int block)
-+{
-+	int i;
-+
-+	if (!pr->is_ipv6 && pr->sip_m && !rtl839x_pie_templ_has(t, TEMPLATE_FIELD_SIP0))
-+		return -1;
-+
-+	if (!pr->is_ipv6 && pr->dip_m && !rtl839x_pie_templ_has(t, TEMPLATE_FIELD_DIP0))
-+		return -1;
-+
-+	if (pr->is_ipv6) {
-+		if ((pr->sip6_m.s6_addr32[0] || pr->sip6_m.s6_addr32[1]
-+			|| pr->sip6_m.s6_addr32[2] || pr->sip6_m.s6_addr32[3])
-+			&& !rtl839x_pie_templ_has(t, TEMPLATE_FIELD_SIP2))
-+			return -1;
-+		if ((pr->dip6_m.s6_addr32[0] || pr->dip6_m.s6_addr32[1]
-+			|| pr->dip6_m.s6_addr32[2] || pr->dip6_m.s6_addr32[3])
-+			&& !rtl839x_pie_templ_has(t, TEMPLATE_FIELD_DIP2))
-+			return -1;
-+	}
-+
-+	if (ether_addr_to_u64(pr->smac) && !rtl839x_pie_templ_has(t, TEMPLATE_FIELD_SMAC0))
-+		return -1;
-+
-+	if (ether_addr_to_u64(pr->dmac) && !rtl839x_pie_templ_has(t, TEMPLATE_FIELD_DMAC0))
-+		return -1;
-+
-+	// TODO: Check more
-+
-+	i = find_first_zero_bit(&priv->pie_use_bm[block * 4], PIE_BLOCK_SIZE);
-+
-+	if (i >= PIE_BLOCK_SIZE)
-+		return -1;
-+
-+	return i + PIE_BLOCK_SIZE * block;
-+}
-+
-+static int rtl839x_pie_rule_add(struct rtl838x_switch_priv *priv, struct pie_rule *pr)
-+{
-+	int idx, block, j, t;
-+	int min_block = 0;
-+	int max_block = priv->n_pie_blocks / 2;
-+
-+	if (pr->is_egress) {
-+		min_block = max_block;
-+		max_block = priv->n_pie_blocks;
-+	}
-+
-+	mutex_lock(&priv->pie_mutex);
-+
-+	for (block = min_block; block < max_block; block++) {
-+		for (j = 0; j < 2; j++) {
-+			t = (sw_r32(RTL839X_ACL_BLK_TMPLTE_CTRL(block)) >> (j * 3)) & 0x7;
-+			idx = rtl839x_pie_verify_template(priv, pr, t, block);
-+			if (idx >= 0)
-+				break;
-+		}
-+		if (j < 2)
-+			break;
-+	}
-+
-+	if (block >= priv->n_pie_blocks) {
-+		mutex_unlock(&priv->pie_mutex);
-+		return -EOPNOTSUPP;
-+	}
-+
-+	set_bit(idx, priv->pie_use_bm);
-+
-+	pr->valid = true;
-+	pr->tid = j;  // Mapped to template number
-+	pr->tid_m = 0x3;
-+	pr->id = idx;
-+
-+	rtl839x_pie_lookup_enable(priv, idx);
-+	rtl839x_pie_rule_write(priv, idx, pr);
-+
-+	mutex_unlock(&priv->pie_mutex);
-+	return 0;
-+}
-+
-+static void rtl839x_pie_rule_rm(struct rtl838x_switch_priv *priv, struct pie_rule *pr)
-+{
-+	int idx = pr->id;
-+
-+	rtl839x_pie_rule_del(priv, idx, idx);
-+	clear_bit(idx, priv->pie_use_bm);
-+}
-+
-+static void rtl839x_pie_init(struct rtl838x_switch_priv *priv)
-+{
-+	int i;
-+	u32 template_selectors;
-+
-+	mutex_init(&priv->pie_mutex);
-+
-+	// Power on all PIE blocks
-+	for (i = 0; i < priv->n_pie_blocks; i++)
-+		sw_w32_mask(0, BIT(i), RTL839X_PS_ACL_PWR_CTRL);
-+
-+	// Set ingress and egress ACL blocks to 50/50: first Egress block is 9
-+	sw_w32_mask(0x1f, 9, RTL839X_ACL_CTRL);  // Writes 9 to cutline field
-+
-+	// Include IPG in metering
-+	sw_w32(1, RTL839X_METER_GLB_CTRL);
-+
-+	// Delete all present rules
-+	rtl839x_pie_rule_del(priv, 0, priv->n_pie_blocks * PIE_BLOCK_SIZE - 1);
-+
-+	// Enable predefined templates 0, 1 for blocks 0-2
-+	template_selectors = 0 | (1 << 3);
-+	for (i = 0; i < 3; i++)
-+		sw_w32(template_selectors, RTL839X_ACL_BLK_TMPLTE_CTRL(i));
-+
-+	// Enable predefined templates 2, 3 for blocks 3-5
-+	template_selectors = 2 | (3 << 3);
-+	for (i = 3; i < 6; i++)
-+		sw_w32(template_selectors, RTL839X_ACL_BLK_TMPLTE_CTRL(i));
-+
-+	// Enable predefined templates 1, 4 for blocks 6-8
-+	template_selectors = 2 | (3 << 3);
-+	for (i = 6; i < 9; i++)
-+		sw_w32(template_selectors, RTL839X_ACL_BLK_TMPLTE_CTRL(i));
-+
-+	// Enable predefined templates 0, 1 for blocks 9-11
-+	template_selectors = 0 | (1 << 3);
-+	for (i = 9; i < 12; i++)
-+		sw_w32(template_selectors, RTL839X_ACL_BLK_TMPLTE_CTRL(i));
-+
-+	// Enable predefined templates 2, 3 for blocks 12-14
-+	template_selectors = 2 | (3 << 3);
-+	for (i = 12; i < 15; i++)
-+		sw_w32(template_selectors, RTL839X_ACL_BLK_TMPLTE_CTRL(i));
-+
-+	// Enable predefined templates 1, 4 for blocks 15-17
-+	template_selectors = 2 | (3 << 3);
-+	for (i = 15; i < 18; i++)
-+		sw_w32(template_selectors, RTL839X_ACL_BLK_TMPLTE_CTRL(i));
-+}
-+
-+static void rtl839x_route_read(int idx, struct rtl83xx_route *rt)
-+{
-+	u64 v;
-+	// Read ROUTING table (2) via register RTL8390_TBL_1
-+	struct table_reg *r = rtl_table_get(RTL8390_TBL_1, 2);
-+
-+	pr_info("In %s\n", __func__);
-+	rtl_table_read(r, idx);
-+
-+	// The table has a size of 2 registers
-+	v = sw_r32(rtl_table_data(r, 0));
-+	v <<= 32;
-+	v |= sw_r32(rtl_table_data(r, 1));
-+	rt->switch_mac_id = (v >> 12) & 0xf;
-+	rt->nh.gw = v >> 16;
-+
-+	rtl_table_release(r);
-+}
-+
-+static void rtl839x_route_write(int idx, struct rtl83xx_route *rt)
-+{
-+	u32 v;
-+
-+	// Read ROUTING table (2) via register RTL8390_TBL_1
-+	struct table_reg *r = rtl_table_get(RTL8390_TBL_1, 2);
-+
-+	pr_info("In %s\n", __func__);
-+	sw_w32(rt->nh.gw >> 16, rtl_table_data(r, 0));
-+	v = rt->nh.gw << 16;
-+	v |= rt->switch_mac_id << 12;
-+	sw_w32(v, rtl_table_data(r, 1));
-+	rtl_table_write(r, idx);
-+
-+	rtl_table_release(r);
-+}
-+
-+/*
-+ * Configure the switch's own MAC addresses used when routing packets
-+ */
-+static void rtl839x_setup_port_macs(struct rtl838x_switch_priv *priv)
-+{
-+	int i;
-+	struct net_device *dev;
-+	u64 mac;
-+
-+	pr_info("%s: got port %08x\n", __func__, (u32)priv->ports[priv->cpu_port].dp);
-+	dev = priv->ports[priv->cpu_port].dp->slave;
-+	mac = ether_addr_to_u64(dev->dev_addr);
-+
-+	for (i = 0; i < 15; i++) {
-+		mac++;  // BUG: VRRP for testing
-+		sw_w32(mac >> 32, RTL839X_ROUTING_SA_CTRL + i * 8);
-+		sw_w32(mac, RTL839X_ROUTING_SA_CTRL + i * 8 + 4);
-+	}
-+}
-+
-+int rtl839x_l3_setup(struct rtl838x_switch_priv *priv)
-+{
-+	rtl839x_setup_port_macs(priv);
-+
-+	return 0;
-+}
-+
-+static u32 rtl839x_packet_cntr_read(int counter)
-+{
-+	u32 v;
-+
-+	// Read LOG table (4) via register RTL8390_TBL_0
-+	struct table_reg *r = rtl_table_get(RTL8390_TBL_0, 4);
-+
-+	pr_info("In %s, id %d\n", __func__, counter);
-+	rtl_table_read(r, counter / 2);
-+
-+	pr_info("Registers: %08x %08x\n",
-+		sw_r32(rtl_table_data(r, 0)), sw_r32(rtl_table_data(r, 1)));
-+	// The table has a size of 2 registers
-+	if (counter % 2)
-+		v = sw_r32(rtl_table_data(r, 0));
-+	else
-+		v = sw_r32(rtl_table_data(r, 1));
-+
-+	rtl_table_release(r);
-+
-+	return v;
-+}
-+
-+static void rtl839x_packet_cntr_clear(int counter)
-+{
-+	// Access LOG table (4) via register RTL8390_TBL_0
-+	struct table_reg *r = rtl_table_get(RTL8390_TBL_0, 4);
-+
-+	pr_info("In %s, id %d\n", __func__, counter);
-+	// The table has a size of 2 registers
-+	if (counter % 2)
-+		sw_w32(0, rtl_table_data(r, 0));
-+	else
-+		sw_w32(0, rtl_table_data(r, 1));
-+
-+	rtl_table_write(r, counter / 2);
-+
-+	rtl_table_release(r);
-+}
-+
-+void rtl839x_set_distribution_algorithm(int group, int algoidx, u32 algomsk)
-+{
-+	sw_w32_mask(3 << ((group & 0xf) << 1), algoidx << ((group & 0xf) << 1), RTL839X_TRK_HASH_IDX_CTRL + ((group >> 4) << 2));
-+	sw_w32(algomsk, RTL839X_TRK_HASH_CTRL + (algoidx << 2));
-+}
-+
-+void rtl839x_set_receive_management_action(int port, rma_ctrl_t type, action_type_t action)
-+{
-+	switch(type) {
-+	case BPDU:
-+		sw_w32_mask(3 << ((port & 0xf) << 1), (action & 0x3) << ((port & 0xf) << 1), RTL839X_RMA_BPDU_CTRL + ((port >> 4) << 2));
-+	break;
-+	case PTP:
-+		sw_w32_mask(3 << ((port & 0xf) << 1), (action & 0x3) << ((port & 0xf) << 1), RTL839X_RMA_PTP_CTRL + ((port >> 4) << 2));
-+	break;
-+	case LLTP:
-+		sw_w32_mask(3 << ((port & 0xf) << 1), (action & 0x3) << ((port & 0xf) << 1), RTL839X_RMA_LLTP_CTRL + ((port >> 4) << 2));
-+	break;
-+	default:
-+	break;
-+	}
-+}
-+
- const struct rtl838x_reg rtl839x_reg = {
- 	.mask_port_reg_be = rtl839x_mask_port_reg_be,
- 	.set_port_reg_be = rtl839x_set_port_reg_be,
-@@ -487,6 +1784,8 @@ const struct rtl838x_reg rtl839x_reg = {
- 	.vlan_set_tagged = rtl839x_vlan_set_tagged,
- 	.vlan_set_untagged = rtl839x_vlan_set_untagged,
- 	.vlan_profile_dump = rtl839x_vlan_profile_dump,
-+	.vlan_profile_setup = rtl839x_vlan_profile_setup,
-+	.vlan_fwd_on_inner = rtl839x_vlan_fwd_on_inner,
- 	.stp_get = rtl839x_stp_get,
- 	.stp_set = rtl839x_stp_set,
- 	.mac_force_mode_ctrl = rtl839x_mac_force_mode_ctrl,
-@@ -502,12 +1801,62 @@ const struct rtl838x_reg rtl839x_reg = {
- 	.mac_rx_pause_sts = RTL839X_MAC_RX_PAUSE_STS,
- 	.mac_tx_pause_sts = RTL839X_MAC_TX_PAUSE_STS,
- 	.read_l2_entry_using_hash = rtl839x_read_l2_entry_using_hash,
-+	.write_l2_entry_using_hash = rtl839x_write_l2_entry_using_hash,
- 	.read_cam = rtl839x_read_cam,
--	.vlan_port_egr_filter = RTL839X_VLAN_PORT_EGR_FLTR(0),
--	.vlan_port_igr_filter = RTL839X_VLAN_PORT_IGR_FLTR(0),
-+	.write_cam = rtl839x_write_cam,
-+	.vlan_port_egr_filter = RTL839X_VLAN_PORT_EGR_FLTR,
-+	.vlan_port_igr_filter = RTL839X_VLAN_PORT_IGR_FLTR,
- 	.vlan_port_pb = RTL839X_VLAN_PORT_PB_VLAN,
- 	.vlan_port_tag_sts_ctrl = RTL839X_VLAN_PORT_TAG_STS_CTRL,
- 	.trk_mbr_ctr = rtl839x_trk_mbr_ctr,
- 	.rma_bpdu_fld_pmask = RTL839X_RMA_BPDU_FLD_PMSK,
-+	.init_eee = rtl839x_init_eee,
-+	.port_eee_set = rtl839x_port_eee_set,
-+	.eee_port_ability = rtl839x_eee_port_ability,
-+	.l2_hash_seed = rtl839x_l2_hash_seed, 
-+	.l2_hash_key = rtl839x_l2_hash_key,
-+	.read_mcast_pmask = rtl839x_read_mcast_pmask,
-+	.write_mcast_pmask = rtl839x_write_mcast_pmask,
-+	.l2_learning_setup = rtl839x_l2_learning_setup,
-+	.pie_init = rtl839x_pie_init,
-+	.pie_rule_read = rtl839x_pie_rule_read,
-+	.pie_rule_write = rtl839x_pie_rule_write,
-+	.pie_rule_add = rtl839x_pie_rule_add,
-+	.pie_rule_rm = rtl839x_pie_rule_rm,
-+	.l2_learning_setup = rtl839x_l2_learning_setup,
-+	.route_read = rtl839x_route_read,
-+	.route_write = rtl839x_route_write,
-+	.l3_setup = rtl839x_l3_setup,
-+	.packet_cntr_read = rtl839x_packet_cntr_read,
-+	.packet_cntr_clear = rtl839x_packet_cntr_clear,
-+	.enable_learning = rtl839x_enable_learning,
-+	.enable_flood = rtl839x_enable_flood,
-+	.rma_bpdu_ctrl = RTL839X_RMA_BPDU_CTRL,
-+	.rma_ptp_ctrl = RTL839X_RMA_PTP_CTRL,
-+	.rma_lltp_ctrl = RTL839X_RMA_LLTP_CTRL,
-+	.rma_bpdu_ctrl_div = 16,
-+	.rma_ptp_ctrl_div = 16,
-+	.rma_lltp_ctrl_div = 16,
-+	.storm_ctrl_port_uc = RTL839X_STORM_CTRL_PORT_UC_0(0),
-+	.storm_ctrl_port_bc = RTL839X_STORM_CTRL_PORT_BC_0(0),
-+	.storm_ctrl_port_mc = RTL839X_STORM_CTRL_PORT_MC_0(0),
-+	.storm_ctrl_port_uc_shift = 3,
-+	.storm_ctrl_port_bc_shift = 3,
-+	.storm_ctrl_port_mc_shift = 3,
-+	.vlan_ctrl = RTL839X_VLAN_CTRL,
- 	.spcl_trap_eapol_ctrl = RTL839X_SPCL_TRAP_EAPOL_CTRL,
-+	.spcl_trap_arp_ctrl = RTL839X_SPCL_TRAP_ARP_CTRL,
-+	.spcl_trap_igmp_ctrl = RTL839X_SPCL_TRAP_IGMP_CTRL,
-+	.spcl_trap_ipv6_ctrl = RTL839X_SPCL_TRAP_IPV6_CTRL,
-+	.spcl_trap_switch_mac_ctrl = RTL839X_SPCL_TRAP_SWITCH_MAC_CTRL,
-+	.spcl_trap_switch_ipv4_addr_ctrl = RTL839X_SPCL_TRAP_SWITCH_IPV4_ADDR_CTRL,
-+	.spcl_trap_crc_ctrl = RTL839X_SPCL_TRAP_CRC_CTRL,
-+	.spcl_trap_ctrl = RTL839X_SPCL_TRAP_CTRL,
-+	.vlan_ctrl = RTL839X_VLAN_CTRL,
-+	.sflow_ctrl = RTL839X_SFLOW_CTRL,
-+	.sflow_port_rate_ctrl = RTL839X_SFLOW_PORT_RATE_CTRL,
-+	.trk_hash_ctrl = RTL839X_TRK_HASH_CTRL,
-+	.trk_hash_idx_ctrl = RTL839X_TRK_HASH_IDX_CTRL,
-+	.set_distribution_algorithm = rtl839x_set_distribution_algorithm,
-+	.set_receive_management_action = rtl839x_set_receive_management_action,
- };
-diff --git a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl83xx.h b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl83xx.h
-index fd0455a6cd..413ce1f538 100644
---- a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl83xx.h
-+++ b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl83xx.h
-@@ -4,7 +4,7 @@
- #define _NET_DSA_RTL83XX_H
- 
- #include <net/dsa.h>
--#include "rtl838x.h"
-+#include <linux/rtl838x.h>
- 
- 
- #define RTL8380_VERSION_A 'A'
-@@ -74,6 +74,15 @@ inline u32 rtl_table_data_r(struct table_reg *r, int i);
- inline void rtl_table_data_w(struct table_reg *r, u32 v, int i);
- 
- void __init rtl83xx_setup_qos(struct rtl838x_switch_priv *priv);
-+
-+int rtl83xx_l2_nexthop_rm(struct rtl838x_switch_priv *priv, struct rtl83xx_nexthop *nh);
-+struct rtl83xx_route *rtl83xx_route_find_gw(struct rtl838x_switch_priv *priv, __be32 ip);
-+struct rtl83xx_route *route_alloc(struct rtl838x_switch_priv *priv, u32 ip);
-+
-+int rtl83xx_packet_cntr_alloc(struct rtl838x_switch_priv *priv);
-+
-+int rtl83xx_port_is_under(const struct net_device * dev, struct rtl838x_switch_priv *priv);
-+
- int read_phy(u32 port, u32 page, u32 reg, u32 *val);
- int write_phy(u32 port, u32 page, u32 reg, u32 val);
- 
-@@ -114,10 +123,13 @@ u32 rtl930x_hash(struct rtl838x_switch_priv *priv, u64 seed);
- irqreturn_t rtl930x_switch_irq(int irq, void *dev_id);
- irqreturn_t rtl839x_switch_irq(int irq, void *dev_id);
- void rtl930x_vlan_profile_dump(int index);
--int rtl9300_sds_power(int mac, int val);
-+int rtl9300_sds_power(struct rtl838x_switch_priv *priv, int mac, bool power_on);
- void rtl9300_sds_rst(int sds_num, u32 mode);
- void rtl930x_print_matrix(void);
- 
-+int rtl83xx_lag_add(struct dsa_switch *ds, int group, int port, struct netdev_lag_upper_info *info);
-+int rtl83xx_lag_del(struct dsa_switch *ds, int group, int port);
-+
- /* RTL931x-specific */
- irqreturn_t rtl931x_switch_irq(int irq, void *dev_id);
- 
-diff --git a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl930x.c b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl930x.c
-index 59c283903b..b13f9eb8ed 100644
---- a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl930x.c
-+++ b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl930x.c
-@@ -1,11 +1,105 @@
- // SPDX-License-Identifier: GPL-2.0-only
- 
- #include <asm/mach-rtl838x/mach-rtl83xx.h>
-+#include <linux/inetdevice.h>
-+
- #include "rtl83xx.h"
- 
- extern struct mutex smi_lock;
- extern struct rtl83xx_soc_info soc_info;
- 
-+/* Definition of the RTL930X-specific template field IDs as used in the PIE */
-+enum template_field_id {
-+	TEMPLATE_FIELD_SPM0 = 0,		// Source portmask ports 0-15
-+	TEMPLATE_FIELD_SPM1 = 1,		// Source portmask ports 16-31
-+	TEMPLATE_FIELD_DMAC0 = 2,		// Destination MAC [15:0]
-+	TEMPLATE_FIELD_DMAC1 = 3,		// Destination MAC [31:16]
-+	TEMPLATE_FIELD_DMAC2 = 4,		// Destination MAC [47:32]
-+	TEMPLATE_FIELD_SMAC0 = 5,		// Source MAC [15:0]
-+	TEMPLATE_FIELD_SMAC1 = 6,		// Source MAC [31:16]
-+	TEMPLATE_FIELD_SMAC2 = 7,		// Source MAC [47:32]
-+	TEMPLATE_FIELD_ETHERTYPE = 8,		// Ethernet frame type field
-+	TEMPLATE_FIELD_OTAG = 9,
-+	TEMPLATE_FIELD_ITAG = 10,
-+	TEMPLATE_FIELD_SIP0 = 11,
-+	TEMPLATE_FIELD_SIP1 = 12,
-+	TEMPLATE_FIELD_DIP0 = 13,
-+	TEMPLATE_FIELD_DIP1 = 14,
-+	TEMPLATE_FIELD_IP_TOS_PROTO = 15,
-+	TEMPLATE_FIELD_L4_SPORT = 16,
-+	TEMPLATE_FIELD_L4_DPORT = 17,
-+	TEMPLATE_FIELD_L34_HEADER = 18,
-+	TEMPLATE_FIELD_TCP_INFO = 19,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_VALID = 20,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_0 = 21,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_1 = 22,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_2 = 23,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_3 = 24,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_4 = 25,
-+	TEMPLATE_FIELD_FIELD_SELECTOR_5 = 26,
-+	TEMPLATE_FIELD_SIP2 = 27,
-+	TEMPLATE_FIELD_SIP3 = 28,
-+	TEMPLATE_FIELD_SIP4 = 29,
-+	TEMPLATE_FIELD_SIP5 = 30,
-+	TEMPLATE_FIELD_SIP6 = 31,
-+	TEMPLATE_FIELD_SIP7 = 32,
-+	TEMPLATE_FIELD_DIP2 = 33,
-+	TEMPLATE_FIELD_DIP3 = 34,
-+	TEMPLATE_FIELD_DIP4 = 35,
-+	TEMPLATE_FIELD_DIP5 = 36,
-+	TEMPLATE_FIELD_DIP6 = 37,
-+	TEMPLATE_FIELD_DIP7 = 38,
-+	TEMPLATE_FIELD_PKT_INFO = 39,
-+	TEMPLATE_FIELD_FLOW_LABEL = 40,
-+	TEMPLATE_FIELD_DSAP_SSAP = 41,
-+	TEMPLATE_FIELD_SNAP_OUI = 42,
-+	TEMPLATE_FIELD_FWD_VID = 43,
-+	TEMPLATE_FIELD_RANGE_CHK = 44,
-+	TEMPLATE_FIELD_VLAN_GMSK = 45,		// VLAN Group Mask/IP range check
-+	TEMPLATE_FIELD_DLP = 46,
-+	TEMPLATE_FIELD_META_DATA = 47,
-+	TEMPLATE_FIELD_SRC_FWD_VID = 48,
-+	TEMPLATE_FIELD_SLP = 49,
-+};
-+
-+/* The meaning of TEMPLATE_FIELD_VLAN depends on phase and the configuration in
-+ * RTL930X_PIE_CTRL. We use always the same definition and map to the inner VLAN tag:
-+ */
-+#define TEMPLATE_FIELD_VLAN TEMPLATE_FIELD_ITAG
-+
-+// Number of fixed templates predefined in the RTL9300 SoC
-+#define N_FIXED_TEMPLATES 5
-+// RTL9300 specific predefined templates
-+static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS] =
-+{
-+	{
-+	  TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2,
-+	  TEMPLATE_FIELD_SMAC0, TEMPLATE_FIELD_SMAC1, TEMPLATE_FIELD_SMAC2,
-+	  TEMPLATE_FIELD_VLAN, TEMPLATE_FIELD_IP_TOS_PROTO, TEMPLATE_FIELD_DSAP_SSAP,
-+	  TEMPLATE_FIELD_ETHERTYPE, TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1
-+	}, {
-+	  TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_DIP0,
-+	  TEMPLATE_FIELD_DIP1, TEMPLATE_FIELD_IP_TOS_PROTO, TEMPLATE_FIELD_TCP_INFO,
-+	  TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_L4_DPORT, TEMPLATE_FIELD_VLAN,
-+	  TEMPLATE_FIELD_RANGE_CHK, TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1
-+	}, {
-+	  TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2,
-+	  TEMPLATE_FIELD_VLAN, TEMPLATE_FIELD_ETHERTYPE, TEMPLATE_FIELD_IP_TOS_PROTO,
-+	  TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_DIP0,
-+	  TEMPLATE_FIELD_DIP1, TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_L4_DPORT
-+	}, {
-+	  TEMPLATE_FIELD_DIP0, TEMPLATE_FIELD_DIP1, TEMPLATE_FIELD_DIP2,
-+	  TEMPLATE_FIELD_DIP3, TEMPLATE_FIELD_DIP4, TEMPLATE_FIELD_DIP5,
-+	  TEMPLATE_FIELD_DIP6, TEMPLATE_FIELD_DIP7, TEMPLATE_FIELD_IP_TOS_PROTO,
-+	  TEMPLATE_FIELD_TCP_INFO, TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_L4_DPORT
-+	}, {
-+	  TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_SIP2,
-+	  TEMPLATE_FIELD_SIP3, TEMPLATE_FIELD_SIP4, TEMPLATE_FIELD_SIP5,
-+	  TEMPLATE_FIELD_SIP6, TEMPLATE_FIELD_SIP7, TEMPLATE_FIELD_VLAN,
-+	  TEMPLATE_FIELD_RANGE_CHK, TEMPLATE_FIELD_SPM1, TEMPLATE_FIELD_SPM1
-+	},
-+};
-+
- void rtl930x_print_matrix(void)
- {
- 	int i;
-@@ -54,7 +148,7 @@ inline static int rtl930x_trk_mbr_ctr(int group)
- static void rtl930x_vlan_tables_read(u32 vlan, struct rtl838x_vlan_info *info)
- {
- 	u32 v, w;
--	// Read VLAN table (0) via register 0
-+	// Read VLAN table (1) via register 0
- 	struct table_reg *r = rtl_table_get(RTL9300_TBL_0, 1);
- 
- 	rtl_table_read(r, vlan);
-@@ -99,22 +193,28 @@ static void rtl930x_vlan_set_tagged(u32 vlan, struct rtl838x_vlan_info *info)
- 	rtl_table_release(r);
- }
- 
--void rtl930x_vlan_profile_dump(int index)
-+void rtl930x_vlan_profile_dump(int profile)
- {
--	u32 profile[5];
-+	u32 p[5];
- 
--	if (index < 0 || index > 7)
-+	if (profile < 0 || profile > 7)
- 		return;
- 
--	profile[0] = sw_r32(RTL930X_VLAN_PROFILE_SET(index));
--	profile[1] = sw_r32(RTL930X_VLAN_PROFILE_SET(index) + 4);
--	profile[2] = sw_r32(RTL930X_VLAN_PROFILE_SET(index) + 8) & 0x1FFFFFFF;
--	profile[3] = sw_r32(RTL930X_VLAN_PROFILE_SET(index) + 12) & 0x1FFFFFFF;
--	profile[4] = sw_r32(RTL930X_VLAN_PROFILE_SET(index) + 16) & 0x1FFFFFFF;
--
--	pr_debug("VLAN %d: L2 learning: %d, L2 Unknown MultiCast Field %x, \
--		IPv4 Unknown MultiCast Field %x, IPv6 Unknown MultiCast Field: %x",
--		index, profile[0] & (3 << 21), profile[2], profile[3], profile[4]);
-+	p[0] = sw_r32(RTL930X_VLAN_PROFILE_SET(profile));
-+	p[1] = sw_r32(RTL930X_VLAN_PROFILE_SET(profile) + 4);
-+	p[2] = sw_r32(RTL930X_VLAN_PROFILE_SET(profile) + 8) & 0x1FFFFFFF;
-+	p[3] = sw_r32(RTL930X_VLAN_PROFILE_SET(profile) + 12) & 0x1FFFFFFF;
-+	p[4] = sw_r32(RTL930X_VLAN_PROFILE_SET(profile) + 16) & 0x1FFFFFFF;
-+
-+	pr_info("VLAN %d: L2 learn: %d; Unknown MC PMasks: L2 %0x, IPv4 %0x, IPv6: %0x",
-+		profile, p[0] & (3 << 21), p[2], p[3], p[4]);
-+	pr_info("  Routing enabled: IPv4 UC %c, IPv6 UC %c, IPv4 MC %c, IPv6 MC %c\n",
-+		p[0] & BIT(17) ? 'y' : 'n', p[0] & BIT(16) ? 'y' : 'n',
-+		p[0] & BIT(13) ? 'y' : 'n', p[0] & BIT(12) ? 'y' : 'n');
-+	pr_info("  Bridge enabled: IPv4 MC %c, IPv6 MC %c,\n",
-+		p[0] & BIT(15) ? 'y' : 'n', p[0] & BIT(14) ? 'y' : 'n');
-+	pr_info("VLAN profile %d: raw %08x %08x %08x %08x %08x\n",
-+		profile, p[0], p[1], p[2], p[3], p[4]);
- }
- 
- static void rtl930x_vlan_set_untagged(u32 vlan, u64 portmask)
-@@ -126,6 +226,51 @@ static void rtl930x_vlan_set_untagged(u32 vlan, u64 portmask)
- 	rtl_table_release(r);
- }
- 
-+/* Sets the L2 forwarding to be based on either the inner VLAN tag or the outer
-+ */
-+static void rtl930x_vlan_fwd_on_inner(int port, bool is_set)
-+{
-+	// Always set all tag modes to fwd based on either inner or outer tag
-+	if (is_set)
-+		sw_w32_mask(0, 0xf, RTL930X_VLAN_PORT_FWD + (port << 2));
-+	else
-+		sw_w32_mask(0xf, 0, RTL930X_VLAN_PORT_FWD + (port << 2));
-+}
-+
-+static void rtl930x_vlan_profile_setup(int profile)
-+{
-+	u32 p[5];
-+
-+	pr_info("In %s\n", __func__);
-+	p[0] = sw_r32(RTL930X_VLAN_PROFILE_SET(profile));
-+	p[1] = sw_r32(RTL930X_VLAN_PROFILE_SET(profile) + 4);
-+
-+	// Enable routing of Ipv4/6 Unicast and IPv4/6 Multicast traffic
-+	p[0] |= BIT(17) | BIT(16) | BIT(13) | BIT(12);
-+	p[2] = 0x1fffffff; // L2 unknwon MC flooding portmask all ports, including the CPU-port
-+	p[3] = 0x1fffffff; // IPv4 unknwon MC flooding portmask
-+	p[4] = 0x1fffffff; // IPv6 unknwon MC flooding portmask
-+
-+	sw_w32(p[0], RTL930X_VLAN_PROFILE_SET(profile));
-+	sw_w32(p[1], RTL930X_VLAN_PROFILE_SET(profile) + 4);
-+	sw_w32(p[2], RTL930X_VLAN_PROFILE_SET(profile) + 8);
-+	sw_w32(p[3], RTL930X_VLAN_PROFILE_SET(profile) + 12);
-+	sw_w32(p[4], RTL930X_VLAN_PROFILE_SET(profile) + 16);
-+	pr_info("Leaving %s\n", __func__);
-+}
-+
-+static void rtl930x_l2_learning_setup(void)
-+{
-+	// Portmask for flooding broadcast traffic
-+	sw_w32(0x1fffffff, RTL930X_L2_BC_FLD_PMSK);
-+
-+	// Portmask for flooding unicast traffic with unknown destination
-+	sw_w32(0x1fffffff, RTL930X_L2_UNKN_UC_FLD_PMSK);
-+
-+	// Limit learning to maximum: 32k entries, after that just flood (bits 0-1)
-+	sw_w32((0x7fff << 2) | 0, RTL930X_L2_LRN_CONSTRT_CTRL);
-+}
-+
- static void rtl930x_stp_get(struct rtl838x_switch_priv *priv, u16 msti, u32 port_state[])
- {
- 	int i;
-@@ -168,12 +313,74 @@ static inline int rtl930x_mac_link_spd_sts(int p)
- 	return RTL930X_MAC_LINK_SPD_STS(p);
- }
- 
-+static u64 rtl930x_l2_hash_seed(u64 mac, u32 vid)
-+{
-+	u64 v = vid;
-+
-+	v <<= 48;
-+	v |= mac;
-+
-+	return v;
-+}
-+
-+/*
-+ * Calculate both the block 0 and the block 1 hash by applyingthe same hash
-+ * algorithm as the one used currently by the ASIC to the seed, and return
-+ * both hashes in the lower and higher word of the return value since only 12 bit of
-+ * the hash are significant
-+ */
-+static u32 rtl930x_l2_hash_key(struct rtl838x_switch_priv *priv, u64 seed)
-+{
-+	u32 k0, k1, h1, h2, h;
-+
-+	k0 = (u32) (((seed >> 55) & 0x1f) ^ ((seed >> 44) & 0x7ff)
-+		^ ((seed >> 33) & 0x7ff) ^ ((seed >> 22) & 0x7ff)
-+		^ ((seed >> 11) & 0x7ff) ^ (seed & 0x7ff));
-+
-+	h1 = (seed >> 11) & 0x7ff;
-+	h1 = ((h1 & 0x1f) << 6) | ((h1 >> 5) & 0x3f);
-+
-+	h2 = (seed >> 33) & 0x7ff;
-+	h2 = ((h2 & 0x3f) << 5)| ((h2 >> 6) & 0x3f);
-+
-+	k1 = (u32) (((seed << 55) & 0x1f) ^ ((seed >> 44) & 0x7ff) ^ h2
-+		    ^ ((seed >> 22) & 0x7ff) ^ h1
-+		    ^ (seed & 0x7ff));
-+
-+	// Algorithm choice for block 0
-+	if (sw_r32(RTL930X_L2_CTRL) & BIT(0))
-+		h = k1;
-+	else
-+		h = k0;
-+
-+	/* Algorithm choice for block 1
-+	 * Since k0 and k1 are < 2048, adding 2048 will offset the hash into the second
-+	 * half of hash-space
-+	 * 2048 is in fact the hash-table size 16384 divided by 4 hashes per bucket
-+	 * divided by 2 to divide the hash space in 2
-+	 */
-+	if (sw_r32(RTL930X_L2_CTRL) & BIT(1))
-+		h |= (k1 + 2048) << 16;
-+	else
-+		h |= (k0 + 2048) << 16;
-+
-+	return h;
-+}
-+
-+/*
-+ * Fills an L2 entry structure from the SoC registers
-+ */
- static void rtl930x_fill_l2_entry(u32 r[], struct rtl838x_l2_entry *e)
- {
-+	pr_debug("In %s valid?\n", __func__);
- 	e->valid = !!(r[2] & BIT(31));
- 	if (!e->valid)
- 		return;
- 
-+	pr_debug("In %s is valid\n", __func__);
-+	e->is_ip_mc = false;
-+	e->is_ipv6_mc = false;
-+
- 	// TODO: Is there not a function to copy directly MAC memory?
- 	e->mac[0] = (r[0] >> 24);
- 	e->mac[1] = (r[0] >> 16);
-@@ -182,61 +389,165 @@ static void rtl930x_fill_l2_entry(u32 r[], struct rtl838x_l2_entry *e)
- 	e->mac[4] = (r[1] >> 24);
- 	e->mac[5] = (r[1] >> 16);
- 
-+	e->next_hop = !!(r[2] & BIT(12));
-+	e->rvid = r[1] & 0xfff;
-+
- 	/* Is it a unicast entry? check multicast bit */
- 	if (!(e->mac[0] & 1)) {
- 		e->type = L2_UNICAST;
- 		e->is_static = !!(r[2] & BIT(14));
--		e->vid = r[2] & 0xfff;
--		e->rvid = r[1] & 0xfff;
- 		e->port = (r[2] >> 20) & 0x3ff;
- 		// Check for trunk port
- 		if (r[2] & BIT(30)) {
--			e->stackDev = (e->port >> 9) & 1;
-+			e->is_trunk = true;
-+			e->stack_dev = (e->port >> 9) & 1;
- 			e->trunk = e->port & 0x3f;
- 		} else {
--			e->stackDev = (e->port >> 6) & 0xf;
-+			e->is_trunk = false;
-+			e->stack_dev = (e->port >> 6) & 0xf;
- 			e->port = e->port & 0x3f;
- 		}
- 
- 		e->block_da = !!(r[2] & BIT(15));
- 		e->block_sa = !!(r[2] & BIT(16));
- 		e->suspended = !!(r[2] & BIT(13));
--		e->next_hop = !!(r[2] & BIT(12));
- 		e->age = (r[2] >> 17) & 3;
- 		e->valid = true;
--
-+		// the UC_VID field in hardware is used for the VID or for the route id
-+		if (e->next_hop) {
-+			e->nh_route_id = r[2] & 0x7ff;
-+			e->vid = 0;
-+		} else {
-+			e->vid = r[2] & 0xfff;
-+			e->nh_route_id = 0;
-+		}
- 	} else {
- 		e->valid = true;
- 		e->type = L2_MULTICAST;
--		e->mc_portmask_index = (r[2]>>6) & 0xfff;
-+		e->mc_portmask_index = (r[2] >> 16) & 0x3ff;
-+	}
-+}
-+
-+/*
-+ * Fills the 3 SoC table registers r[] with the information of in the rtl838x_l2_entry
-+ */
-+static void rtl930x_fill_l2_row(u32 r[], struct rtl838x_l2_entry *e)
-+{
-+	u32 port;
-+
-+	if (!e->valid) {
-+		r[0] = r[1] = r[2] = 0;
-+		return;
-+	}
-+
-+	r[2] = BIT(31);	// Set valid bit
-+
-+	r[0] = ((u32)e->mac[0]) << 24 | ((u32)e->mac[1]) << 16 
-+		| ((u32)e->mac[2]) << 8 | ((u32)e->mac[3]);
-+	r[1] = ((u32)e->mac[4]) << 24 | ((u32)e->mac[5]) << 16;
-+
-+	r[2] |= e->next_hop ? BIT(12) : 0;
-+
-+	if (e->type == L2_UNICAST) {
-+		r[2] |= e->is_static ? BIT(14) : 0;
-+		r[1] |= e->rvid & 0xfff;
-+		r[2] |= (e->port & 0x3ff) << 20;
-+		if (e->is_trunk) {
-+			r[2] |= BIT(30);
-+			port = e->stack_dev << 9 | (e->port & 0x3f);
-+		} else {
-+			port = (e->stack_dev & 0xf) << 6;
-+			port |= e->port & 0x3f;
-+		}
-+		r[2] |= port << 20;
-+		r[2] |= e->block_da ? BIT(15) : 0;
-+		r[2] |= e->block_sa ? BIT(17) : 0;
-+		r[2] |= e->suspended ? BIT(13) : 0;
-+		r[2] |= (e->age & 0x3) << 17;
-+		// the UC_VID field in hardware is used for the VID or for the route id
-+		if (e->next_hop)
-+			r[2] |= e->nh_route_id & 0x7ff;
-+		else
-+			r[2] |= e->vid & 0xfff;
-+	} else { // L2_MULTICAST
-+		r[2] |= (e->mc_portmask_index & 0x3ff) << 16;
-+		r[2] |= e->mc_mac_index & 0x7ff;
- 	}
- }
- 
--static u64 rtl930x_read_l2_entry_using_hash(u32 hash, u32 position, struct rtl838x_l2_entry *e)
-+/*
-+ * Read an L2 UC or MC entry out of a hash bucket of the L2 forwarding table
-+ * hash is the id of the bucket and pos is the position of the entry in that bucket
-+ * The data read from the SoC is filled into rtl838x_l2_entry
-+ */
-+static u64 rtl930x_read_l2_entry_using_hash(u32 hash, u32 pos, struct rtl838x_l2_entry *e)
- {
--	u64 entry;
- 	u32 r[3];
- 	struct table_reg *q = rtl_table_get(RTL9300_TBL_L2, 0);
--	u32 idx = (0 << 14) | (hash << 2) | position;
-+	u32 idx;
- 	int i;
-+	u64 mac;
-+	u64 seed;
-+
-+	pr_debug("%s: hash %08x, pos: %d\n", __func__, hash, pos);
-+
-+	/* On the RTL93xx, 2 different hash algorithms are used making it a total of
-+	 * 8 buckets that need to be searched, 4 for each hash-half
-+	 * Use second hash space when bucket is between 4 and 8 */
-+	if (pos >= 4) {
-+		pos -= 4;
-+		hash >>= 16;
-+	} else {
-+		hash &= 0xffff;
-+	}
-+
-+	idx = (0 << 14) | (hash << 2) | pos; // Search SRAM, with hash and at pos in bucket
-+	pr_debug("%s: NOW hash %08x, pos: %d\n", __func__, hash, pos);
- 
- 	rtl_table_read(q, idx);
--	for (i= 0; i < 3; i++)
-+	for (i = 0; i < 3; i++)
- 		r[i] = sw_r32(rtl_table_data(q, i));
- 
- 	rtl_table_release(q);
- 
- 	rtl930x_fill_l2_entry(r, e);
-+
-+	pr_debug("%s: valid: %d, nh: %d\n", __func__, e->valid, e->next_hop);
- 	if (!e->valid)
- 		return 0;
- 
--	entry = ((u64)r[0] << 32) | (r[1] & 0xffff0000) | e->vid;
--	return entry;
-+	mac = ((u64)e->mac[0]) << 40 | ((u64)e->mac[1]) << 32 | ((u64)e->mac[2]) << 24
-+		| ((u64)e->mac[3]) << 16 | ((u64)e->mac[4]) << 8 | ((u64)e->mac[5]);
-+
-+	seed = rtl930x_l2_hash_seed(mac, e->rvid);
-+	pr_debug("%s: mac %016llx, seed %016llx\n", __func__, mac, seed);
-+	// return vid with concatenated mac as unique id
-+	return seed;
-+}
-+
-+static void rtl930x_write_l2_entry_using_hash(u32 hash, u32 pos, struct rtl838x_l2_entry *e)
-+{
-+	u32 r[3];
-+	struct table_reg *q = rtl_table_get(RTL9300_TBL_L2, 0);
-+	u32 idx = (0 << 14) | (hash << 2) | pos; // Access SRAM, with hash and at pos in bucket
-+	int i;
-+
-+	pr_info("%s: hash %d, pos %d\n", __func__, hash, pos);
-+	pr_info("%s: index %d -> mac %02x:%02x:%02x:%02x:%02x:%02x\n", __func__, idx,
-+		e->mac[0], e->mac[1], e->mac[2], e->mac[3],e->mac[4],e->mac[5]);
-+
-+	rtl930x_fill_l2_row(r, e);
-+	pr_info("%s: %d: %08x %08x %08x\n", __func__, idx, r[0], r[1], r[2]);
-+
-+	for (i= 0; i < 3; i++)
-+		sw_w32(r[i], rtl_table_data(q, i));
-+
-+	rtl_table_write(q, idx);
-+	rtl_table_release(q);
- }
- 
- static u64 rtl930x_read_cam(int idx, struct rtl838x_l2_entry *e)
- {
--	u64 entry;
- 	u32 r[3];
- 	struct table_reg *q = rtl_table_get(RTL9300_TBL_L2, 1);
- 	int i;
-@@ -251,9 +562,68 @@ static u64 rtl930x_read_cam(int idx, struct rtl838x_l2_entry *e)
- 	if (!e->valid)
- 		return 0;
- 
--	entry = ((u64)r[0] << 32) | (r[1] & 0xffff0000) | e->vid;
-+	// return mac with concatenated vid as unique id
-+	return ((u64)r[0] << 28) | ((r[1] & 0xffff0000) >> 4) | e->vid;
-+}
-+
-+static void rtl930x_write_cam(int idx, struct rtl838x_l2_entry *e)
-+{
-+	u32 r[3];
-+	struct table_reg *q = rtl_table_get(RTL9300_TBL_L2, 1); // Access L2 Table 1
-+	int i;
-+
-+	rtl930x_fill_l2_row(r, e);
-+
-+	for (i= 0; i < 3; i++)
-+		sw_w32(r[i], rtl_table_data(q, i));
-+
-+	rtl_table_write(q, idx);
-+	rtl_table_release(q);
-+}
-+
-+static void dump_l2_entry(struct rtl838x_l2_entry *e)
-+{
-+	pr_info("MAC: %02x:%02x:%02x:%02x:%02x:%02x vid: %d, rvid: %d, port: %d, valid: %d\n",
-+		e->mac[0], e->mac[1], e->mac[2], e->mac[3], e->mac[4], e->mac[5],
-+		e->vid, e->rvid, e->port, e->valid);
-+	pr_info("Type: %d, is_static: %d, is_ip_mc: %d, is_ipv6_mc: %d, block_da: %d\n",
-+		e->type, e->is_static, e->is_ip_mc, e->is_ipv6_mc, e->block_da);
-+	pr_info("  block_sa: %d, suspended: %d, next_hop: %d, age: %d, is_trunk: %d, trunk: %d\n",
-+		e->block_sa, e->suspended, e->next_hop, e->age, e->is_trunk, e->trunk);
-+	if (e->is_ip_mc || e->is_ipv6_mc)
-+		pr_info("  mc_portmask_index: %d, mc_gip: %d, mc_sip: %d\n",
-+			e->mc_portmask_index, e->mc_gip, e->mc_sip);
-+	pr_info("  stac_dev: %d, nh_route_id: %d, port: %d, dev_id\n",
-+		e->stack_dev, e->nh_route_id, e->port);
-+}
-+
-+static u64 rtl930x_read_mcast_pmask(int idx)
-+{
-+	u32 portmask;
-+	// Read MC_PORTMASK (2) via register RTL9300_TBL_L2
-+	struct table_reg *q = rtl_table_get(RTL9300_TBL_L2, 2);
-+
-+	rtl_table_read(q, idx);
-+	portmask = sw_r32(rtl_table_data(q, 0));
-+	portmask >>= 3;
-+	rtl_table_release(q);
-+
-+	pr_debug("%s: Index idx %d has portmask %08x\n", __func__, idx, portmask);
-+	return portmask;
-+}
- 
--	return entry;
-+static void rtl930x_write_mcast_pmask(int idx, u64 portmask)
-+{
-+	u32 pm = portmask;
-+
-+	// Access MC_PORTMASK (2) via register RTL9300_TBL_L2
-+	struct table_reg *q = rtl_table_get(RTL9300_TBL_L2, 2);
-+
-+	pr_debug("%s: Index idx %d has portmask %08x\n", __func__, idx, pm);
-+	pm <<= 3;
-+	sw_w32(pm, rtl_table_data(q, 0));
-+	rtl_table_write(q, idx);
-+	rtl_table_release(q);
- }
- 
- u64 rtl930x_traffic_get(int source)
-@@ -329,7 +699,7 @@ irqreturn_t rtl930x_switch_irq(int irq, void *dev_id)
- 	sw_w32(ports, RTL930X_ISR_PORT_LINK_STS_CHG);
- 	pr_info("RTL9300 Link change: status: %x, ports %x\n", status, ports);
- 
--	rtl9300_dump_debug();
-+//	rtl9300_dump_debug();
- 
- 	for (i = 0; i < 28; i++) {
- 		if (ports & BIT(i)) {
-@@ -347,42 +717,6 @@ irqreturn_t rtl930x_switch_irq(int irq, void *dev_id)
- 	return IRQ_HANDLED;
- }
- 
--int rtl9300_sds_power(int mac, int val)
--{
--	int sds_num;
--	u32 mode;
--
--	// TODO: these numbers are hard-coded for the Zyxel XGS1210 12 Switch
--	pr_info("SerDes: %s %d\n", __func__, mac);
--	switch (mac) {
--	case 24:
--		sds_num = 6;
--		mode = 0x12; // HISGMII
--		break;
--	case 25:
--		sds_num = 7;
--		mode = 0x12; // HISGMII
--		break;
--	case 26:
--		sds_num = 8;
--		mode = 0x1b; // 10GR/1000BX auto
--		break;
--	case 27:
--		sds_num = 9;
--		mode = 0x1b; // 10GR/1000BX auto
--		break;
--	default:
--		return -1;
--	}
--	if (!val)
--		mode = 0x1f; // OFF
--
--	rtl9300_sds_rst(sds_num, mode);
--
--	return 0;
--}
--
--
- int rtl930x_write_phy(u32 port, u32 page, u32 reg, u32 val)
- {
- 	u32 v;
-@@ -418,7 +752,6 @@ int rtl930x_read_phy(u32 port, u32 page, u32 reg, u32 *val)
- 	u32 v;
- 	int err = 0;
- 
--//	pr_info("In %s\n", __func__);
- 	if (port > 63 || page > 4095 || reg > 31)
- 		return -ENOTSUPP;
- 
-@@ -445,7 +778,6 @@ int rtl930x_read_phy(u32 port, u32 page, u32 reg, u32 *val)
- 	return err;
- }
- 
--
- /*
-  * Write to an mmd register of the PHY
-  */
-@@ -465,12 +797,12 @@ int rtl930x_write_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 val)
- 	// Set MMD device number and register to write to
- 	sw_w32(devnum << 16 | (regnum & 0xffff), RTL930X_SMI_ACCESS_PHY_CTRL_3);
- 
--	v = BIT(2)| BIT(1)| BIT(0); // WRITE | MMD-access | EXEC
-+	v = BIT(2) | BIT(1) | BIT(0); // WRITE | MMD-access | EXEC
- 	sw_w32(v, RTL930X_SMI_ACCESS_PHY_CTRL_1);
- 
- 	do {
- 		v = sw_r32(RTL930X_SMI_ACCESS_PHY_CTRL_1);
--	} while ( v & BIT(0));
-+	} while (v & BIT(0));
- 
- 	pr_debug("%s: port %d, regnum: %x, val: %x (err %d)\n", __func__, port, regnum, val, err);
- 	mutex_unlock(&smi_lock);
-@@ -493,12 +825,12 @@ int rtl930x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val)
- 	// Set MMD device number and register to write to
- 	sw_w32(devnum << 16 | (regnum & 0xffff), RTL930X_SMI_ACCESS_PHY_CTRL_3);
- 
--	v = BIT(1)| BIT(0); // MMD-access | EXEC
-+	v = BIT(1) | BIT(0); // MMD-access | EXEC
- 	sw_w32(v, RTL930X_SMI_ACCESS_PHY_CTRL_1);
- 
- 	do {
- 		v = sw_r32(RTL930X_SMI_ACCESS_PHY_CTRL_1);
--	} while ( v & 0x1);
-+	} while (v & BIT(0));
- 	// There is no error-checking via BIT 25 of v, as it does not seem to be set correctly
- 	*val = (sw_r32(RTL930X_SMI_ACCESS_PHY_CTRL_2) & 0xffff);
- 	pr_debug("%s: port %d, regnum: %x, val: %x (err %d)\n", __func__, port, regnum, *val, err);
-@@ -508,7 +840,6 @@ int rtl930x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val)
- 	return err;
- }
- 
--
- /*
-  * Calculate both the block 0 and the block 1 hash, and return in
-  * lower and higher word of the return value since only 12 bit of
-@@ -552,6 +883,1539 @@ u32 rtl930x_hash(struct rtl838x_switch_priv *priv, u64 seed)
- 	return h;
- }
- 
-+/*
-+ * Enables or disables the EEE/EEEP capability of a port
-+ */
-+void rtl930x_port_eee_set(struct rtl838x_switch_priv *priv, int port, bool enable)
-+{
-+	u32 v;
-+
-+	// This works only for Ethernet ports, and on the RTL930X, ports from 26 are SFP
-+	if (port >= 26)
-+		return;
-+
-+	pr_debug("In %s: setting port %d to %d\n", __func__, port, enable);
-+	v = enable ? 0x3f : 0x0;
-+
-+	// Set EEE/EEEP state for 100, 500, 1000MBit and 2.5, 5 and 10GBit
-+	sw_w32_mask(0, v << 10, rtl930x_mac_force_mode_ctrl(port));
-+
-+	// Set TX/RX EEE state
-+	v = enable ? 0x3 : 0x0;
-+	sw_w32(v, RTL930X_EEE_CTRL(port));
-+
-+	priv->ports[port].eee_enabled = enable;
-+}
-+
-+/*
-+ * Get EEE own capabilities and negotiation result
-+ */
-+int rtl930x_eee_port_ability(struct rtl838x_switch_priv *priv, struct ethtool_eee *e, int port)
-+{
-+	u32 link, a;
-+
-+	if (port >= 26)
-+		return -ENOTSUPP;
-+
-+	pr_info("In %s, port %d\n", __func__, port);
-+	link = sw_r32(RTL930X_MAC_LINK_STS);
-+	link = sw_r32(RTL930X_MAC_LINK_STS);
-+	if (!(link & BIT(port)))
-+		return 0;
-+
-+	pr_info("Setting advertised\n");
-+	if (sw_r32(rtl930x_mac_force_mode_ctrl(port)) & BIT(10))
-+		e->advertised |= ADVERTISED_100baseT_Full;
-+
-+	if (sw_r32(rtl930x_mac_force_mode_ctrl(port)) & BIT(12))
-+		e->advertised |= ADVERTISED_1000baseT_Full;
-+
-+	if (priv->ports[port].is2G5 && sw_r32(rtl930x_mac_force_mode_ctrl(port)) & BIT(13)) {
-+		pr_info("ADVERTISING 2.5G EEE\n");
-+		e->advertised |= ADVERTISED_2500baseX_Full;
-+	}
-+
-+	if (priv->ports[port].is10G && sw_r32(rtl930x_mac_force_mode_ctrl(port)) & BIT(15))
-+		e->advertised |= ADVERTISED_10000baseT_Full;
-+
-+	a = sw_r32(RTL930X_MAC_EEE_ABLTY);
-+	a = sw_r32(RTL930X_MAC_EEE_ABLTY);
-+	pr_info("Link partner: %08x\n", a);
-+	if (a & BIT(port)) {
-+		e->lp_advertised = ADVERTISED_100baseT_Full;
-+		e->lp_advertised |= ADVERTISED_1000baseT_Full;
-+		if (priv->ports[port].is2G5)
-+			e->lp_advertised |= ADVERTISED_2500baseX_Full;
-+		if (priv->ports[port].is10G)
-+			e->lp_advertised |= ADVERTISED_10000baseT_Full;
-+	}
-+
-+	// Read 2x to clear latched state
-+	a = sw_r32(RTL930X_EEEP_PORT_CTRL(port));
-+	a = sw_r32(RTL930X_EEEP_PORT_CTRL(port));
-+	pr_info("%s RTL930X_EEEP_PORT_CTRL: %08x\n", __func__, a);
-+
-+	return 0;
-+}
-+
-+static void rtl930x_init_eee(struct rtl838x_switch_priv *priv, bool enable)
-+{
-+	int i;
-+
-+	pr_info("Setting up EEE, state: %d\n", enable);
-+
-+	// Setup EEE on all ports
-+	for (i = 0; i < priv->cpu_port; i++) {
-+		if (priv->ports[i].phy)
-+			rtl930x_port_eee_set(priv, i, enable);
-+	}
-+
-+	priv->eee_enabled = enable;
-+}
-+
-+#define HASH_PICK(val, lsb, len)   ((val & (((1 << len) - 1) << lsb)) >> lsb)
-+
-+static u32 rtl930x_l3_hash4(u32 ip, int algorithm, bool move_dip)
-+{
-+	u32 rows[4];
-+	u32 hash;
-+	u32 s0, s1, pH;
-+
-+	memset(rows, 0, sizeof(rows));
-+
-+	rows[0] = HASH_PICK(ip, 27, 5);
-+	rows[1] = HASH_PICK(ip, 18, 9);
-+	rows[2] = HASH_PICK(ip, 9, 9);
-+
-+	if (!move_dip)
-+		rows[3] = HASH_PICK(ip, 0, 9);
-+
-+	if (!algorithm) {
-+		hash = rows[0] ^ rows[1] ^ rows[2] ^ rows[3];
-+	} else {
-+		s0 = rows[0] + rows[1] + rows[2];
-+		s1 = (s0 & 0x1ff) + ((s0 & (0x1ff << 9)) >> 9);
-+		pH = (s1 & 0x1ff) + ((s1 & (0x1ff << 9)) >> 9);
-+		hash = pH ^ rows[3];
-+	}
-+	return hash;
-+}
-+
-+static u32 rtl930x_l3_hash6(struct in6_addr *ip6, int algorithm, bool move_dip)
-+{
-+	u32 rows[16];
-+	u32 hash;
-+	u32 s0, s1, pH;
-+
-+	rows[0] = (HASH_PICK(ip6->s6_addr[0], 6, 2) << 0);
-+	rows[1] = (HASH_PICK(ip6->s6_addr[0], 0, 6) << 3) | HASH_PICK(ip6->s6_addr[1], 5, 3);
-+	rows[2] = (HASH_PICK(ip6->s6_addr[1], 0, 5) << 4) | HASH_PICK(ip6->s6_addr[2], 4, 4);
-+	rows[3] = (HASH_PICK(ip6->s6_addr[2], 0, 4) << 5) | HASH_PICK(ip6->s6_addr[3], 3, 5);
-+	rows[4] = (HASH_PICK(ip6->s6_addr[3], 0, 3) << 6) | HASH_PICK(ip6->s6_addr[4], 2, 6);
-+	rows[5] = (HASH_PICK(ip6->s6_addr[4], 0, 2) << 7) | HASH_PICK(ip6->s6_addr[5], 1, 7);
-+	rows[6] = (HASH_PICK(ip6->s6_addr[5], 0, 1) << 8) | HASH_PICK(ip6->s6_addr[6], 0, 8);
-+	rows[7] = (HASH_PICK(ip6->s6_addr[7], 0, 8) << 1) | HASH_PICK(ip6->s6_addr[8], 7, 1);
-+	rows[8] = (HASH_PICK(ip6->s6_addr[8], 0, 7) << 2) | HASH_PICK(ip6->s6_addr[9], 6, 2);
-+	rows[9] = (HASH_PICK(ip6->s6_addr[9], 0, 6) << 3) | HASH_PICK(ip6->s6_addr[10], 5, 3);
-+	rows[10] = (HASH_PICK(ip6->s6_addr[10], 0, 5) << 4) | HASH_PICK(ip6->s6_addr[11], 4, 4);
-+	if (!algorithm) {
-+		rows[11] = (HASH_PICK(ip6->s6_addr[11], 0, 4) << 5)
-+				| (HASH_PICK(ip6->s6_addr[12], 3, 5) << 0);
-+		rows[12] = (HASH_PICK(ip6->s6_addr[12], 0, 3) << 6)
-+				| (HASH_PICK(ip6->s6_addr[13], 2, 6) << 0);
-+		rows[13] = (HASH_PICK(ip6->s6_addr[13], 0, 2) << 7)
-+				| (HASH_PICK(ip6->s6_addr[14], 1, 7) << 0);
-+		if (!move_dip) {
-+			rows[14] = (HASH_PICK(ip6->s6_addr[14], 0, 1) << 8)
-+					| (HASH_PICK(ip6->s6_addr[15], 0, 8) << 0);
-+		}
-+		hash = rows[0] ^ rows[1] ^ rows[2] ^ rows[3] ^ rows[4] ^ rows[5] ^ rows[6]
-+			^ rows[7] ^ rows[8] ^ rows[9] ^ rows[10] ^ rows[11] ^ rows[12]
-+			^ rows[13] ^ rows[14];
-+	} else {
-+		rows[11] = (HASH_PICK(ip6->s6_addr[11], 0, 4) << 5);
-+		rows[12] = (HASH_PICK(ip6->s6_addr[12], 3, 5) << 0);
-+		rows[13] = (HASH_PICK(ip6->s6_addr[12], 0, 3) << 6)
-+				| HASH_PICK(ip6->s6_addr[13], 2, 6);
-+		rows[14] = (HASH_PICK(ip6->s6_addr[13], 0, 2) << 7)
-+				| HASH_PICK(ip6->s6_addr[14], 1, 7);
-+		if (!move_dip) {
-+			rows[15] = (HASH_PICK(ip6->s6_addr[14], 0, 1) << 8)
-+					| (HASH_PICK(ip6->s6_addr[15], 0, 8) << 0);
-+		}
-+		s0 = rows[12] + rows[13] + rows[14];
-+		s1 = (s0 & 0x1ff) + ((s0 & (0x1ff << 9)) >> 9);
-+		pH = (s1 & 0x1ff) + ((s1 & (0x1ff << 9)) >> 9);
-+		hash = rows[0] ^ rows[1] ^ rows[2] ^ rows[3] ^ rows[4] ^ rows[5] ^ rows[6]
-+			^ rows[7] ^ rows[8] ^ rows[9] ^ rows[10] ^ rows[11] ^ pH ^ rows[15];
-+	}
-+	return hash;
-+}
-+
-+/*
-+ * Read a prefix route entry from the L3_PREFIX_ROUTE_IPUC table
-+ * We currently only support IPv4 and IPv6 unicast route
-+ */
-+static void rtl930x_route_read(int idx, struct rtl83xx_route *rt)
-+{
-+	u32 v, ip4_m;
-+	bool host_route, default_route;
-+	struct in6_addr ip6_m;
-+
-+	// Read L3_PREFIX_ROUTE_IPUC table (2) via register RTL9300_TBL_1
-+	struct table_reg *r = rtl_table_get(RTL9300_TBL_1, 2);
-+
-+	rtl_table_read(r, idx);
-+	// The table has a size of 11 registers
-+	rt->attr.valid = !!(sw_r32(rtl_table_data(r, 0)) & BIT(31));
-+	if (!rt->attr.valid)
-+		goto out;
-+
-+	rt->attr.type = (sw_r32(rtl_table_data(r, 0)) >> 29) & 0x3;
-+
-+	v = sw_r32(rtl_table_data(r, 10));
-+	host_route = !!(v & BIT(21));
-+	default_route = !!(v & BIT(20));
-+	rt->prefix_len = -1;
-+	pr_info("%s: host route %d, default_route %d\n", __func__, host_route, default_route);
-+
-+	switch (rt->attr.type) {
-+	case 0: // IPv4 Unicast route
-+		rt->dst_ip = sw_r32(rtl_table_data(r, 4));
-+		ip4_m = sw_r32(rtl_table_data(r, 9));
-+		pr_info("%s: Read ip4 mask: %08x\n", __func__, ip4_m);
-+		rt->prefix_len = host_route ? 32 : -1;
-+		rt->prefix_len = (rt->prefix_len < 0 && default_route) ? 0 : -1;
-+		if (rt->prefix_len < 0)
-+			rt->prefix_len = inet_mask_len(ip4_m);
-+		break;
-+	case 2: // IPv6 Unicast route
-+		ipv6_addr_set(&rt->dst_ip6,
-+			      sw_r32(rtl_table_data(r, 1)), sw_r32(rtl_table_data(r, 2)),
-+			      sw_r32(rtl_table_data(r, 3)), sw_r32(rtl_table_data(r, 4)));
-+		ipv6_addr_set(&ip6_m,
-+			      sw_r32(rtl_table_data(r, 6)), sw_r32(rtl_table_data(r, 7)),
-+			      sw_r32(rtl_table_data(r, 8)), sw_r32(rtl_table_data(r, 9)));
-+		rt->prefix_len = host_route ? 128 : 0;
-+		rt->prefix_len = (rt->prefix_len < 0 && default_route) ? 0 : -1;
-+		if (rt->prefix_len < 0)
-+			rt->prefix_len = find_last_bit((unsigned long int *)&ip6_m.s6_addr32,
-+							 128);
-+		break;
-+	case 1: // IPv4 Multicast route
-+	case 3: // IPv6 Multicast route
-+		pr_warn("%s: route type not supported\n", __func__);
-+		goto out;
-+	}
-+
-+	rt->attr.hit = !!(v & BIT(22));
-+	rt->attr.action = (v >> 18) & 3;
-+	rt->nh.id = (v >> 7) & 0x7ff;
-+	rt->attr.ttl_dec = !!(v & BIT(6));
-+	rt->attr.ttl_check = !!(v & BIT(5));
-+	rt->attr.dst_null = !!(v & BIT(4));
-+	rt->attr.qos_as = !!(v & BIT(3));
-+	rt->attr.qos_prio =  v & 0x7;
-+	pr_info("%s: index %d is valid: %d\n", __func__, idx, rt->attr.valid);
-+	pr_info("%s: next_hop: %d, hit: %d, action :%d, ttl_dec %d, ttl_check %d, dst_null %d\n",
-+		__func__, rt->nh.id, rt->attr.hit, rt->attr.action,
-+		rt->attr.ttl_dec, rt->attr.ttl_check, rt->attr.dst_null);
-+	pr_info("%s: GW: %pI4, prefix_len: %d\n", __func__, &rt->dst_ip, rt->prefix_len);
-+out:
-+	rtl_table_release(r);
-+}
-+
-+static void rtl930x_net6_mask(int prefix_len, struct in6_addr *ip6_m)
-+{
-+	int o, b;
-+	// Define network mask
-+	o = prefix_len >> 3;
-+	b = prefix_len & 0x7;
-+	memset(ip6_m->s6_addr, 0xff, o);
-+	ip6_m->s6_addr[o] |= b ? 0xff00 >> b : 0x00;
-+}
-+
-+/*
-+ * Read a host route entry from the table using its index
-+ * We currently only support IPv4 and IPv6 unicast route
-+ */
-+static void rtl930x_host_route_read(int idx, struct rtl83xx_route *rt)
-+{
-+	u32 v;
-+	// Read L3_HOST_ROUTE_IPUC table (1) via register RTL9300_TBL_1
-+	struct table_reg *r = rtl_table_get(RTL9300_TBL_1, 1);
-+
-+	idx = ((idx / 6) * 8) + (idx % 6);
-+
-+	pr_info("In %s, physical index %d\n", __func__, idx);
-+	rtl_table_read(r, idx);
-+	// The table has a size of 5 (for UC, 11 for MC) registers
-+	v = sw_r32(rtl_table_data(r, 0));
-+	rt->attr.valid = !!(v & BIT(31));
-+	if (!rt->attr.valid)
-+		goto out;
-+	rt->attr.type = (v >> 29) & 0x3;
-+	switch (rt->attr.type) {
-+	case 0: // IPv4 Unicast route
-+		rt->dst_ip = sw_r32(rtl_table_data(r, 4));
-+		break;
-+	case 2: // IPv6 Unicast route
-+		ipv6_addr_set(&rt->dst_ip6,
-+			      sw_r32(rtl_table_data(r, 3)), sw_r32(rtl_table_data(r, 2)),
-+			      sw_r32(rtl_table_data(r, 1)), sw_r32(rtl_table_data(r, 0)));
-+		break;
-+	case 1: // IPv4 Multicast route
-+	case 3: // IPv6 Multicast route
-+		pr_warn("%s: route type not supported\n", __func__);
-+		goto out;
-+	}
-+
-+	rt->attr.hit = !!(v & BIT(20));
-+	rt->attr.dst_null = !!(v & BIT(19));
-+	rt->attr.action = (v >> 17) & 3;
-+	rt->nh.id = (v >> 6) & 0x7ff;
-+	rt->attr.ttl_dec = !!(v & BIT(5));
-+	rt->attr.ttl_check = !!(v & BIT(4));
-+	rt->attr.qos_as = !!(v & BIT(3));
-+	rt->attr.qos_prio =  v & 0x7;
-+	pr_info("%s: index %d is valid: %d\n", __func__, idx, rt->attr.valid);
-+	pr_info("%s: next_hop: %d, hit: %d, action :%d, ttl_dec %d, ttl_check %d, dst_null %d\n",
-+		__func__, rt->nh.id, rt->attr.hit, rt->attr.action, rt->attr.ttl_dec, rt->attr.ttl_check,
-+		rt->attr.dst_null);
-+	pr_info("%s: Destination: %pI4\n", __func__, &rt->dst_ip);
-+
-+out:
-+	rtl_table_release(r);
-+}
-+
-+/*
-+ * Write a host route entry from the table using its index
-+ * We currently only support IPv4 and IPv6 unicast route
-+ */
-+static void rtl930x_host_route_write(int idx, struct rtl83xx_route *rt)
-+{
-+	u32 v;
-+	// Access L3_HOST_ROUTE_IPUC table (1) via register RTL9300_TBL_1
-+	struct table_reg *r = rtl_table_get(RTL9300_TBL_1, 1);
-+	// The table has a size of 5 (for UC, 11 for MC) registers
-+
-+	idx = ((idx / 6) * 8) + (idx % 6);
-+
-+	pr_info("%s: index %d is valid: %d\n", __func__, idx, rt->attr.valid);
-+	pr_info("%s: next_hop: %d, hit: %d, action :%d, ttl_dec %d, ttl_check %d, dst_null %d\n",
-+		__func__, rt->nh.id, rt->attr.hit, rt->attr.action, rt->attr.ttl_dec, rt->attr.ttl_check,
-+		rt->attr.dst_null);
-+	pr_info("%s: GW: %pI4, prefix_len: %d\n", __func__, &rt->dst_ip, rt->prefix_len);
-+
-+	v = BIT(31); // Entry is valid
-+	v |= (rt->attr.type & 0x3) << 29;
-+	v |= rt->attr.hit ? BIT(20) : 0;
-+	v |= rt->attr.dst_null ? BIT(19) : 0;
-+	v |= (rt->attr.action & 0x3) << 17;
-+	v |= (rt->nh.id & 0x7ff) << 6;
-+	v |= rt->attr.ttl_dec ? BIT(5) : 0;
-+	v |= rt->attr.ttl_check ? BIT(4) : 0;
-+	v |= rt->attr.qos_as ? BIT(3) : 0;
-+	v |= rt->attr.qos_prio & 0x7;
-+
-+	sw_w32(v, rtl_table_data(r, 0));
-+	switch (rt->attr.type) {
-+	case 0: // IPv4 Unicast route
-+		sw_w32(0, rtl_table_data(r, 1));
-+		sw_w32(0, rtl_table_data(r, 2));
-+		sw_w32(0, rtl_table_data(r, 3));
-+		sw_w32(rt->dst_ip, rtl_table_data(r, 4));
-+		break;
-+	case 2: // IPv6 Unicast route
-+		sw_w32(rt->dst_ip6.s6_addr32[0], rtl_table_data(r, 1));
-+		sw_w32(rt->dst_ip6.s6_addr32[1], rtl_table_data(r, 2));
-+		sw_w32(rt->dst_ip6.s6_addr32[2], rtl_table_data(r, 3));
-+		sw_w32(rt->dst_ip6.s6_addr32[3], rtl_table_data(r, 4));
-+		break;
-+	case 1: // IPv4 Multicast route
-+	case 3: // IPv6 Multicast route
-+		pr_warn("%s: route type not supported\n", __func__);
-+		goto out;
-+	}
-+
-+	rtl_table_write(r, idx);
-+	pr_info("%s: %08x %08x %08x %08x %08x\n", __func__,
-+		sw_r32(rtl_table_data(r, 0)), sw_r32(rtl_table_data(r, 1)),
-+		sw_r32(rtl_table_data(r, 2)), sw_r32(rtl_table_data(r, 3)),
-+		sw_r32(rtl_table_data(r, 4)));
-+
-+out:
-+	rtl_table_release(r);
-+}
-+
-+/*
-+ * Look up the index of a prefix route in the routing table CAM for unicast IPv4/6 routes
-+ * using hardware offload.
-+ */
-+static int rtl930x_route_lookup_hw(struct rtl83xx_route *rt)
-+{
-+	u32 ip4_m, v;
-+	struct in6_addr ip6_m;
-+	int i;
-+
-+	if (rt->attr.type == 1 || rt->attr.type == 3) // Hardware only supports UC routes
-+		return -1;
-+
-+	sw_w32_mask(0x3 << 19, rt->attr.type, RTL930X_L3_HW_LU_KEY_CTRL);
-+	if (rt->attr.type) { // IPv6
-+		rtl930x_net6_mask(rt->prefix_len, &ip6_m);
-+		for (i = 0; i < 4; i++)
-+			sw_w32(rt->dst_ip6.s6_addr32[0] & ip6_m.s6_addr32[0],
-+			       RTL930X_L3_HW_LU_KEY_IP_CTRL + (i << 2));
-+	} else { // IPv4
-+		ip4_m = inet_make_mask(rt->prefix_len);
-+		sw_w32(0, RTL930X_L3_HW_LU_KEY_IP_CTRL);
-+		sw_w32(0, RTL930X_L3_HW_LU_KEY_IP_CTRL + 4);
-+		sw_w32(0, RTL930X_L3_HW_LU_KEY_IP_CTRL + 8);
-+		v = rt->dst_ip & ip4_m;
-+		pr_info("%s: searching for %pI4\n", __func__, &v);
-+		sw_w32(v, RTL930X_L3_HW_LU_KEY_IP_CTRL + 12);
-+	}
-+
-+	// Execute CAM lookup in SoC
-+	sw_w32(BIT(15), RTL930X_L3_HW_LU_CTRL);
-+
-+	// Wait until execute bit clears and result is ready
-+	do {
-+		v = sw_r32(RTL930X_L3_HW_LU_CTRL);
-+	} while (v & BIT(15));
-+
-+	pr_info("%s: found: %d, index: %d\n", __func__, !!(v & BIT(14)), v & 0x1ff);
-+
-+	// Test if search successful (BIT 14 set)
-+	if (v & BIT(14))
-+		return v & 0x1ff;
-+
-+	return -1;
-+}
-+
-+static int rtl930x_find_l3_slot(struct rtl83xx_route *rt, bool must_exist)
-+{
-+	int t, s, slot_width, algorithm, addr, idx;
-+	u32 hash;
-+	struct rtl83xx_route route_entry;
-+
-+	// IPv6 entries take up 3 slots
-+	slot_width = (rt->attr.type == 0) || (rt->attr.type == 2) ? 1 : 3;
-+
-+	for (t = 0; t < 2; t++) {
-+		algorithm = (sw_r32(RTL930X_L3_HOST_TBL_CTRL) >> (2 + t)) & 0x1;
-+		hash = rtl930x_l3_hash4(rt->dst_ip, algorithm, false);
-+
-+		pr_debug("%s: table %d, algorithm %d, hash %04x\n", __func__, t, algorithm, hash);
-+
-+		for (s = 0; s < 6; s += slot_width) {
-+			addr = (t << 12) | ((hash & 0x1ff) << 3) | s;
-+			pr_debug("%s physical address %d\n", __func__, addr);
-+			idx = ((addr / 8) * 6) + (addr % 8);
-+			pr_debug("%s logical address %d\n", __func__, idx);
-+
-+			rtl930x_host_route_read(idx, &route_entry);
-+			pr_debug("%s route valid %d, route dest: %pI4, hit %d\n", __func__,
-+				rt->attr.valid, &rt->dst_ip, rt->attr.hit);
-+			if (!must_exist && rt->attr.valid)
-+				return idx;
-+			if (must_exist && route_entry.dst_ip == rt->dst_ip)
-+				return idx;
-+		}
-+	}
-+
-+	return -1;
-+}
-+
-+/*
-+ * Write a prefix route into the routing table CAM at position idx
-+ * Currently only IPv4 and IPv6 unicast routes are supported
-+ */
-+static void rtl930x_route_write(int idx, struct rtl83xx_route *rt)
-+{
-+	u32 v, ip4_m;
-+	struct in6_addr ip6_m;
-+	// Access L3_PREFIX_ROUTE_IPUC table (2) via register RTL9300_TBL_1
-+	// The table has a size of 11 registers (20 for MC)
-+	struct table_reg *r = rtl_table_get(RTL9300_TBL_1, 2);
-+
-+	pr_info("%s: index %d is valid: %d\n", __func__, idx, rt->attr.valid);
-+	pr_info("%s: nexthop: %d, hit: %d, action :%d, ttl_dec %d, ttl_check %d, dst_null %d\n",
-+		__func__, rt->nh.id, rt->attr.hit, rt->attr.action,
-+		rt->attr.ttl_dec, rt->attr.ttl_check, rt->attr.dst_null);
-+	pr_info("%s: GW: %pI4, prefix_len: %d\n", __func__, &rt->dst_ip, rt->prefix_len);
-+
-+	v = rt->attr.valid ? BIT(31) : 0;
-+	v |= (rt->attr.type & 0x3) << 29;
-+	sw_w32(v, rtl_table_data(r, 0));
-+
-+	v = rt->attr.hit ? BIT(22) : 0;
-+	v |= (rt->attr.action & 0x3) << 18;
-+	v |= (rt->nh.id & 0x7ff) << 7;
-+	v |= rt->attr.ttl_dec ? BIT(6) : 0;
-+	v |= rt->attr.ttl_check ? BIT(5) : 0;
-+	v |= rt->attr.dst_null ? BIT(6) : 0;
-+	v |= rt->attr.qos_as ? BIT(6) : 0;
-+	v |= rt->attr.qos_prio & 0x7;
-+	v |= rt->prefix_len == 0 ? BIT(20) : 0; // set default route bit
-+
-+	// set bit mask for entry type always to 0x3
-+	sw_w32(0x3 << 29, rtl_table_data(r, 5));
-+
-+	switch (rt->attr.type) {
-+	case 0: // IPv4 Unicast route
-+		sw_w32(0, rtl_table_data(r, 1));
-+		sw_w32(0, rtl_table_data(r, 2));
-+		sw_w32(0, rtl_table_data(r, 3));
-+		sw_w32(rt->dst_ip, rtl_table_data(r, 4));
-+
-+		v |= rt->prefix_len == 32 ? BIT(21) : 0; // set host-route bit
-+		ip4_m = inet_make_mask(rt->prefix_len);
-+		sw_w32(0, rtl_table_data(r, 6));
-+		sw_w32(0, rtl_table_data(r, 7));
-+		sw_w32(0, rtl_table_data(r, 8));
-+		sw_w32(ip4_m, rtl_table_data(r, 9));
-+		break;
-+	case 2: // IPv6 Unicast route
-+		sw_w32(rt->dst_ip6.s6_addr32[0], rtl_table_data(r, 1));
-+		sw_w32(rt->dst_ip6.s6_addr32[1], rtl_table_data(r, 2));
-+		sw_w32(rt->dst_ip6.s6_addr32[2], rtl_table_data(r, 3));
-+		sw_w32(rt->dst_ip6.s6_addr32[3], rtl_table_data(r, 4));
-+
-+		v |= rt->prefix_len == 128 ? BIT(21) : 0; // set host-route bit
-+
-+		rtl930x_net6_mask(rt->prefix_len, &ip6_m);
-+
-+		sw_w32(ip6_m.s6_addr32[0], rtl_table_data(r, 6));
-+		sw_w32(ip6_m.s6_addr32[1], rtl_table_data(r, 7));
-+		sw_w32(ip6_m.s6_addr32[2], rtl_table_data(r, 8));
-+		sw_w32(ip6_m.s6_addr32[3], rtl_table_data(r, 9));
-+		break;
-+	case 1: // IPv4 Multicast route
-+	case 3: // IPv6 Multicast route
-+		pr_warn("%s: route type not supported\n", __func__);
-+		rtl_table_release(r);
-+		return;
-+	}
-+	sw_w32(v, rtl_table_data(r, 10));
-+
-+	pr_info("%s: %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x\n", __func__,
-+		sw_r32(rtl_table_data(r, 0)), sw_r32(rtl_table_data(r, 1)), sw_r32(rtl_table_data(r, 2)),
-+		sw_r32(rtl_table_data(r, 3)), sw_r32(rtl_table_data(r, 4)), sw_r32(rtl_table_data(r, 5)),
-+		sw_r32(rtl_table_data(r, 6)), sw_r32(rtl_table_data(r, 7)), sw_r32(rtl_table_data(r, 8)),
-+		sw_r32(rtl_table_data(r, 9)), sw_r32(rtl_table_data(r, 10)));
-+
-+	rtl_table_write(r, idx);
-+	rtl_table_release(r);
-+}
-+
-+
-+/*
-+ * Get the destination MAC and L3 egress interface ID of a nexthop entry from
-+ * the SoC's L3_NEXTHOP table
-+ */
-+static void rtl930x_get_l3_nexthop(int idx, u16 *dmac_id, u16 *interface)
-+{
-+	u32 v;
-+	// Read L3_NEXTHOP table (3) via register RTL9300_TBL_1
-+	struct table_reg *r = rtl_table_get(RTL9300_TBL_1, 3);
-+
-+	rtl_table_read(r, idx);
-+	// The table has a size of 1 register
-+	v = sw_r32(rtl_table_data(r, 0));
-+	rtl_table_release(r);
-+
-+	*dmac_id = (v >> 7) & 0x7fff;
-+	*interface = v & 0x7f;
-+}
-+
-+static int rtl930x_l3_mtu_del(struct rtl838x_switch_priv *priv, int mtu)
-+{
-+	int i;
-+
-+	for (i = 0; i < MAX_INTF_MTUS; i++) {
-+		if (mtu == priv->intf_mtus[i])
-+			break;
-+	}
-+	if (i >= MAX_INTF_MTUS || !priv->intf_mtu_count[i]) {
-+		pr_err("%s: No MTU slot found for MTU: %d\n", __func__, mtu);
-+		return -EINVAL;
-+	}
-+
-+	priv->intf_mtu_count[i]--;
-+}
-+
-+static int rtl930x_l3_mtu_add(struct rtl838x_switch_priv *priv, int mtu)
-+{
-+	int i, free_mtu;
-+	int mtu_id;
-+
-+	// Try to find an existing mtu-value or a free slot
-+	free_mtu = MAX_INTF_MTUS;
-+	for (i = 0; i < MAX_INTF_MTUS && priv->intf_mtus[i] != mtu; i++) {
-+		if ((!priv->intf_mtu_count[i]) && (free_mtu == MAX_INTF_MTUS))
-+			free_mtu = i;
-+	}
-+	i = (i < MAX_INTF_MTUS) ? i : free_mtu;
-+	if (i < MAX_INTF_MTUS) {
-+		mtu_id = i;
-+	} else {
-+		pr_err("%s: No free MTU slot available!\n", __func__);
-+		return -EINVAL;
-+	}
-+
-+	priv->intf_mtus[i] = mtu;
-+	pr_info("Writing MTU %d to slot %d\n", priv->intf_mtus[i], i);
-+	// Set MTU-value of the slot TODO: distinguish between IPv4/IPv6 routes / slots
-+	sw_w32_mask(0xffff << ((i % 2) * 16), priv->intf_mtus[i] << ((i % 2) * 16),
-+		    RTL930X_L3_IP_MTU_CTRL(i));
-+	sw_w32_mask(0xffff << ((i % 2) * 16), priv->intf_mtus[i] << ((i % 2) * 16),
-+		    RTL930X_L3_IP6_MTU_CTRL(i));
-+
-+	priv->intf_mtu_count[i]++;
-+
-+	return mtu_id;
-+}
-+
-+/*
-+ * Creates an interface for a route by setting up the HW tables in the SoC
-+ */
-+static int rtl930x_l3_intf_add(struct rtl838x_switch_priv *priv, struct rtl838x_l3_intf *intf)
-+{
-+	int i, intf_id, mtu_id;
-+	// number of MTU-values < 16384
-+
-+	// Use the same IPv6 mtu as the ip4 mtu for this route if unset
-+	intf->ip6_mtu = intf->ip6_mtu ? intf->ip6_mtu : intf->ip4_mtu;
-+
-+	mtu_id = rtl930x_l3_mtu_add(priv, intf->ip4_mtu);
-+	pr_info("%s: added mtu %d with mtu-id %d\n", __func__, intf->ip4_mtu, mtu_id);
-+	if (mtu_id < 0)
-+		return -ENOSPC;
-+	intf->ip4_mtu_id = mtu_id;
-+	intf->ip6_mtu_id = mtu_id;
-+
-+	for (i = 0; i < MAX_INTERFACES; i++) {
-+		if (!priv->interfaces[i])
-+			break;
-+	}
-+	if (i >= MAX_INTERFACES) {
-+		pr_err("%s: cannot find free interface entry\n", __func__);
-+		return -EINVAL;
-+	}
-+	intf_id = i;
-+	priv->interfaces[i] = kzalloc(sizeof(struct rtl838x_l3_intf), GFP_KERNEL);
-+	if (!priv->interfaces[i]) {
-+		pr_err("%s: no memory to allocate new interface\n", __func__);
-+		return -ENOMEM;
-+	}
-+}
-+
-+/*
-+ * Set the destination MAC and L3 egress interface ID for a nexthop entry in the SoC's
-+ * L3_NEXTHOP table. The nexthop entry is identified by idx.
-+ * dmac_id is the reference to the L2 entry in the L2 forwarding table, special values are
-+ * 0x7ffe: TRAP2CPU
-+ * 0x7ffd: TRAP2MASTERCPU
-+ * 0x7fff: DMAC_ID_DROP
-+ */
-+static void rtl930x_set_l3_nexthop(int idx, u16 dmac_id, u16 interface)
-+{
-+	// Access L3_NEXTHOP table (3) via register RTL9300_TBL_1
-+	struct table_reg *r = rtl_table_get(RTL9300_TBL_1, 3);
-+
-+	pr_info("%s: Writing to L3_NEXTHOP table, index %d, dmac_id %d, interface %d\n",
-+		__func__, idx, dmac_id, interface);
-+	sw_w32(((dmac_id & 0x7fff) << 7) | (interface & 0x7f), rtl_table_data(r, 0));
-+
-+	pr_info("%s: %08x\n", __func__, sw_r32(rtl_table_data(r,0)));
-+	rtl_table_write(r, idx);
-+	rtl_table_release(r);
-+}
-+
-+static void rtl930x_pie_lookup_enable(struct rtl838x_switch_priv *priv, int index)
-+{
-+	int block = index / PIE_BLOCK_SIZE;
-+
-+	sw_w32_mask(0, BIT(block), RTL930X_PIE_BLK_LOOKUP_CTRL);
-+}
-+
-+/*
-+ * Reads the intermediate representation of the templated match-fields of the
-+ * PIE rule in the pie_rule structure and fills in the raw data fields in the
-+ * raw register space r[].
-+ * The register space configuration size is identical for the RTL8380/90 and RTL9300,
-+ * however the RTL9310 has 2 more registers / fields and the physical field-ids are different
-+ * on all SoCs
-+ * On the RTL9300 the mask fields are not word-aligend!
-+ */
-+static void rtl930x_write_pie_templated(u32 r[], struct pie_rule *pr, enum template_field_id t[])
-+{
-+	int i;
-+	enum template_field_id field_type;
-+	u16 data, data_m;
-+
-+	for (i = 0; i < N_FIXED_FIELDS; i++) {
-+		field_type = t[i];
-+		data = data_m = 0;
-+
-+		switch (field_type) {
-+		case TEMPLATE_FIELD_SPM0:
-+			data = pr->spm;
-+			data_m = pr->spm_m;
-+			break;
-+		case TEMPLATE_FIELD_SPM1:
-+			data = pr->spm >> 16;
-+			data_m = pr->spm_m >> 16;
-+			break;
-+		case TEMPLATE_FIELD_OTAG:
-+			data = pr->otag;
-+			data_m = pr->otag_m;
-+			break;
-+		case TEMPLATE_FIELD_SMAC0:
-+			data = pr->smac[4];
-+			data = (data << 8) | pr->smac[5];
-+			data_m = pr->smac_m[4];
-+			data_m = (data_m << 8) | pr->smac_m[5];
-+			break;
-+		case TEMPLATE_FIELD_SMAC1:
-+			data = pr->smac[2];
-+			data = (data << 8) | pr->smac[3];
-+			data_m = pr->smac_m[2];
-+			data_m = (data_m << 8) | pr->smac_m[3];
-+			break;
-+		case TEMPLATE_FIELD_SMAC2:
-+			data = pr->smac[0];
-+			data = (data << 8) | pr->smac[1];
-+			data_m = pr->smac_m[0];
-+			data_m = (data_m << 8) | pr->smac_m[1];
-+			break;
-+		case TEMPLATE_FIELD_DMAC0:
-+			data = pr->dmac[4];
-+			data = (data << 8) | pr->dmac[5];
-+			data_m = pr->dmac_m[4];
-+			data_m = (data_m << 8) | pr->dmac_m[5];
-+			break;
-+		case TEMPLATE_FIELD_DMAC1:
-+			data = pr->dmac[2];
-+			data = (data << 8) | pr->dmac[3];
-+			data_m = pr->dmac_m[2];
-+			data_m = (data_m << 8) | pr->dmac_m[3];
-+			break;
-+		case TEMPLATE_FIELD_DMAC2:
-+			data = pr->dmac[0];
-+			data = (data << 8) | pr->dmac[1];
-+			data_m = pr->dmac_m[0];
-+			data_m = (data_m << 8) | pr->dmac_m[1];
-+			break;
-+		case TEMPLATE_FIELD_ETHERTYPE:
-+			data = pr->ethertype;
-+			data_m = pr->ethertype_m;
-+			break;
-+		case TEMPLATE_FIELD_ITAG:
-+			data = pr->itag;
-+			data_m = pr->itag_m;
-+			break;
-+		case TEMPLATE_FIELD_SIP0:
-+			if (pr->is_ipv6) {
-+				data = pr->sip6.s6_addr16[7];
-+				data_m = pr->sip6_m.s6_addr16[7];
-+			} else {
-+				data = pr->sip;
-+				data_m = pr->sip_m;
-+			}
-+			break;
-+		case TEMPLATE_FIELD_SIP1:
-+			if (pr->is_ipv6) {
-+				data = pr->sip6.s6_addr16[6];
-+				data_m = pr->sip6_m.s6_addr16[6];
-+			} else {
-+				data = pr->sip >> 16;
-+				data_m = pr->sip_m >> 16;
-+			}
-+			break;
-+
-+		case TEMPLATE_FIELD_SIP2:
-+		case TEMPLATE_FIELD_SIP3:
-+		case TEMPLATE_FIELD_SIP4:
-+		case TEMPLATE_FIELD_SIP5:
-+		case TEMPLATE_FIELD_SIP6:
-+		case TEMPLATE_FIELD_SIP7:
-+			data = pr->sip6.s6_addr16[5 - (field_type - TEMPLATE_FIELD_SIP2)];
-+			data_m = pr->sip6_m.s6_addr16[5 - (field_type - TEMPLATE_FIELD_SIP2)];
-+			break;
-+
-+		case TEMPLATE_FIELD_DIP0:
-+			if (pr->is_ipv6) {
-+				data = pr->dip6.s6_addr16[7];
-+				data_m = pr->dip6_m.s6_addr16[7];
-+			} else {
-+				data = pr->dip;
-+				data_m = pr->dip_m;
-+			}
-+			break;
-+
-+		case TEMPLATE_FIELD_DIP1:
-+			if (pr->is_ipv6) {
-+				data = pr->dip6.s6_addr16[6];
-+				data_m = pr->dip6_m.s6_addr16[6];
-+			} else {
-+				data = pr->dip >> 16;
-+				data_m = pr->dip_m >> 16;
-+			}
-+			break;
-+
-+		case TEMPLATE_FIELD_DIP2:
-+		case TEMPLATE_FIELD_DIP3:
-+		case TEMPLATE_FIELD_DIP4:
-+		case TEMPLATE_FIELD_DIP5:
-+		case TEMPLATE_FIELD_DIP6:
-+		case TEMPLATE_FIELD_DIP7:
-+			data = pr->dip6.s6_addr16[5 - (field_type - TEMPLATE_FIELD_DIP2)];
-+			data_m = pr->dip6_m.s6_addr16[5 - (field_type - TEMPLATE_FIELD_DIP2)];
-+			break;
-+
-+		case TEMPLATE_FIELD_IP_TOS_PROTO:
-+			data = pr->tos_proto;
-+			data_m = pr->tos_proto_m;
-+			break;
-+		case TEMPLATE_FIELD_L4_SPORT:
-+			data = pr->sport;
-+			data_m = pr->sport_m;
-+			break;
-+		case TEMPLATE_FIELD_L4_DPORT:
-+			data = pr->dport;
-+			data_m = pr->dport_m;
-+			break;
-+		case TEMPLATE_FIELD_DSAP_SSAP:
-+			data = pr->dsap_ssap;
-+			data_m = pr->dsap_ssap_m;
-+			break;
-+		case TEMPLATE_FIELD_TCP_INFO:
-+			data = pr->tcp_info;
-+			data_m = pr->tcp_info_m;
-+			break;
-+		case TEMPLATE_FIELD_RANGE_CHK:
-+			pr_info("TEMPLATE_FIELD_RANGE_CHK: not configured\n");
-+			break;
-+		default:
-+			pr_info("%s: unknown field %d\n", __func__, field_type);
-+		}
-+
-+		// On the RTL9300, the mask fields are not word aligned!
-+		if (!(i % 2)) {
-+			r[5 - i / 2] = data;
-+			r[12 - i / 2] |= ((u32)data_m << 8);
-+		} else {
-+			r[5 - i / 2] |= ((u32)data) << 16;
-+			r[12 - i / 2] |= ((u32)data_m) << 24;
-+			r[11 - i / 2] |= ((u32)data_m) >> 8;
-+		}
-+	}
-+}
-+
-+static void rtl930x_read_pie_fixed_fields(u32 r[], struct pie_rule *pr)
-+{
-+	pr->stacking_port = r[6] & BIT(31);
-+	pr->spn = (r[6] >> 24) & 0x7f;
-+	pr->mgnt_vlan = r[6] & BIT(23);
-+	if (pr->phase == PHASE_IACL)
-+		pr->dmac_hit_sw = r[6] & BIT(22);
-+	else
-+		pr->content_too_deep = r[6] & BIT(22);
-+	pr->not_first_frag = r[6]  & BIT(21);
-+	pr->frame_type_l4 = (r[6] >> 18) & 7;
-+	pr->frame_type = (r[6] >> 16) & 3;
-+	pr->otag_fmt = (r[6] >> 15) & 1;
-+	pr->itag_fmt = (r[6] >> 14) & 1;
-+	pr->otag_exist = (r[6] >> 13) & 1;
-+	pr->itag_exist = (r[6] >> 12) & 1;
-+	pr->frame_type_l2 = (r[6] >> 10) & 3;
-+	pr->igr_normal_port = (r[6] >> 9) & 1;
-+	pr->tid = (r[6] >> 8) & 1;
-+
-+	pr->stacking_port_m = r[12] & BIT(7);
-+	pr->spn_m = r[12]  & 0x7f;
-+	pr->mgnt_vlan_m = r[13] & BIT(31);
-+	if (pr->phase == PHASE_IACL)
-+		pr->dmac_hit_sw_m = r[13] & BIT(30);
-+	else
-+		pr->content_too_deep_m = r[13] & BIT(30);
-+	pr->not_first_frag_m = r[13] & BIT(29);
-+	pr->frame_type_l4_m = (r[13] >> 26) & 7;
-+	pr->frame_type_m = (r[13] >> 24) & 3;
-+	pr->otag_fmt_m = r[13] & BIT(23);
-+	pr->itag_fmt_m = r[13] & BIT(22);
-+	pr->otag_exist_m = r[13] & BIT(21);
-+	pr->itag_exist_m = r[13] & BIT (20);
-+	pr->frame_type_l2_m = (r[13] >> 18) & 3;
-+	pr->igr_normal_port_m = r[13] & BIT(17);
-+	pr->tid_m = (r[13] >> 16) & 1;
-+
-+	pr->valid = r[13] & BIT(15);
-+	pr->cond_not = r[13] & BIT(14);
-+	pr->cond_and1 = r[13] & BIT(13);
-+	pr->cond_and2 = r[13] & BIT(12);
-+}
-+
-+static void rtl930x_write_pie_fixed_fields(u32 r[],  struct pie_rule *pr)
-+{
-+	r[6] = pr->stacking_port ? BIT(31) : 0;
-+	r[6] |= ((u32) (pr->spn & 0x7f)) << 24;
-+	r[6] |= pr->mgnt_vlan ? BIT(23) : 0;
-+	if (pr->phase == PHASE_IACL)
-+		r[6] |= pr->dmac_hit_sw ? BIT(22) : 0;
-+	else
-+		r[6] |= pr->content_too_deep ? BIT(22) : 0;
-+	r[6] |= pr->not_first_frag ? BIT(21) : 0;
-+	r[6] |= ((u32) (pr->frame_type_l4 & 0x7)) << 18;
-+	r[6] |= ((u32) (pr->frame_type & 0x3)) << 16;
-+	r[6] |= pr->otag_fmt ? BIT(15) : 0;
-+	r[6] |= pr->itag_fmt ? BIT(14) : 0;
-+	r[6] |= pr->otag_exist ? BIT(13) : 0;
-+	r[6] |= pr->itag_exist ? BIT(12) : 0;
-+	r[6] |= ((u32) (pr->frame_type_l2 & 0x3)) << 10;
-+	r[6] |= pr->igr_normal_port ? BIT(9) : 0;
-+	r[6] |= ((u32) (pr->tid & 0x1)) << 8;
-+
-+	r[12] |= pr->stacking_port_m ? BIT(7) : 0;
-+	r[12] |= (u32) (pr->spn_m & 0x7f);
-+	r[13] |= pr->mgnt_vlan_m ? BIT(31) : 0;
-+	if (pr->phase == PHASE_IACL)
-+		r[13] |= pr->dmac_hit_sw_m ? BIT(30) : 0;
-+	else
-+		r[13] |= pr->content_too_deep_m ? BIT(30) : 0;
-+	r[13] |= pr->not_first_frag_m ? BIT(29) : 0;
-+	r[13] |= ((u32) (pr->frame_type_l4_m & 0x7)) << 26;
-+	r[13] |= ((u32) (pr->frame_type_m & 0x3)) << 24;
-+	r[13] |= pr->otag_fmt_m ? BIT(23) : 0;
-+	r[13] |= pr->itag_fmt_m ? BIT(22) : 0;
-+	r[13] |= pr->otag_exist_m ? BIT(21) : 0;
-+	r[13] |= pr->itag_exist_m ? BIT(20) : 0;
-+	r[13] |= ((u32) (pr->frame_type_l2_m & 0x3)) << 18;
-+	r[13] |= pr->igr_normal_port_m ? BIT(17) : 0;
-+	r[13] |= ((u32) (pr->tid_m & 0x1)) << 16;
-+
-+	r[13] |= pr->valid ? BIT(15) : 0;
-+	r[13] |= pr->cond_not ? BIT(14) : 0;
-+	r[13] |= pr->cond_and1 ? BIT(13) : 0;
-+	r[13] |= pr->cond_and2 ? BIT(12) : 0;
-+}
-+
-+static void rtl930x_write_pie_action(u32 r[],  struct pie_rule *pr)
-+{
-+	// Either drop or forward
-+	if (pr->drop) {
-+		r[14] |= BIT(24) | BIT(25) | BIT(26); // Do Green, Yellow and Red drops
-+		// Actually DROP, not PERMIT in Green / Yellow / Red
-+		r[14] |= BIT(23) | BIT(22) | BIT(20);
-+	} else {
-+		r[14] |= pr->fwd_sel ? BIT(27) : 0;
-+		r[14] |= pr->fwd_act << 18;
-+		r[14] |= BIT(14); // We overwrite any drop
-+	}
-+	if (pr->phase == PHASE_VACL)
-+		r[14] |= pr->fwd_sa_lrn ? BIT(15) : 0;
-+	r[13] |= pr->bypass_sel ? BIT(5) : 0;
-+	r[13] |= pr->nopri_sel ? BIT(4) : 0;
-+	r[13] |= pr->tagst_sel ? BIT(3) : 0;
-+	r[13] |= pr->ovid_sel ? BIT(1) : 0;
-+	r[14] |= pr->ivid_sel ? BIT(31) : 0;
-+	r[14] |= pr->meter_sel ? BIT(30) : 0;
-+	r[14] |= pr->mir_sel ? BIT(29) : 0;
-+	r[14] |= pr->log_sel ? BIT(28) : 0;
-+
-+	r[14] |= ((u32)(pr->fwd_data & 0x3fff)) << 3;
-+	r[15] |= pr->log_octets ? BIT(31) : 0;
-+	r[15] |= (u32)(pr->meter_data) << 23;
-+
-+	r[15] |= ((u32)(pr->ivid_act) << 21) & 0x3;
-+	r[15] |= ((u32)(pr->ivid_data) << 9) & 0xfff;
-+	r[16] |= ((u32)(pr->ovid_act) << 30) & 0x3;
-+	r[16] |= ((u32)(pr->ovid_data) & 0xfff) << 16;
-+	r[16] |= (pr->mir_data & 0x3) << 6;
-+	r[17] |= ((u32)(pr->tagst_data) & 0xf) << 28;
-+	r[17] |= ((u32)(pr->nopri_data) & 0x7) << 25;
-+	r[17] |= pr->bypass_ibc_sc ? BIT(16) : 0;
-+}
-+
-+void rtl930x_pie_rule_dump_raw(u32 r[])
-+{
-+	pr_info("Raw IACL table entry:\n");
-+	pr_info("r 0 - 7: %08x %08x %08x %08x %08x %08x %08x %08x\n", 
-+		r[0], r[1], r[2], r[3], r[4], r[5], r[6], r[7]);
-+	pr_info("r 8 - 15: %08x %08x %08x %08x %08x %08x %08x %08x\n", 
-+		r[8], r[9], r[10], r[11], r[12], r[13], r[14], r[15]);
-+	pr_info("r 16 - 18: %08x %08x %08x\n", r[16], r[17], r[18]);
-+	pr_info("Match  : %08x %08x %08x %08x %08x %08x\n", r[0], r[1], r[2], r[3], r[4], r[5]);
-+	pr_info("Fixed  : %06x\n", r[6] >> 8);
-+	pr_info("Match M: %08x %08x %08x %08x %08x %08x\n",
-+		(r[6] << 24) | (r[7] >> 8), (r[7] << 24) | (r[8] >> 8), (r[8] << 24) | (r[9] >> 8),
-+		(r[9] << 24) | (r[10] >> 8), (r[10] << 24) | (r[11] >> 8),
-+		(r[11] << 24) | (r[12] >> 8));
-+	pr_info("R[13]:   %08x\n", r[13]);
-+	pr_info("Fixed M: %06x\n", ((r[12] << 16) | (r[13] >> 16)) & 0xffffff);
-+	pr_info("Valid / not / and1 / and2 : %1x\n", (r[13] >> 12) & 0xf);
-+	pr_info("r 13-16: %08x %08x %08x %08x\n", r[13], r[14], r[15], r[16]);
-+}
-+
-+static int rtl930x_pie_rule_write(struct rtl838x_switch_priv *priv, int idx, struct pie_rule *pr)
-+{
-+	// Access IACL table (2) via register 0
-+	struct table_reg *q = rtl_table_get(RTL9300_TBL_0, 2);
-+	u32 r[19];
-+	int i;
-+	int block = idx / PIE_BLOCK_SIZE;
-+	u32 t_select = sw_r32(RTL930X_PIE_BLK_TMPLTE_CTRL(block));
-+
-+	pr_info("%s: %d, t_select: %08x\n", __func__, idx, t_select);
-+
-+	for (i = 0; i < 19; i++)
-+		r[i] = 0;
-+
-+	if (!pr->valid) {
-+		rtl_table_write(q, idx);
-+		rtl_table_release(q);
-+		return 0;
-+	}
-+	rtl930x_write_pie_fixed_fields(r, pr);
-+
-+	pr_info("%s: template %d\n", __func__, (t_select >> (pr->tid * 4)) & 0xf);
-+	rtl930x_write_pie_templated(r, pr, fixed_templates[(t_select >> (pr->tid * 4)) & 0xf]);
-+
-+	rtl930x_write_pie_action(r, pr);
-+
-+	rtl930x_pie_rule_dump_raw(r);
-+
-+	for (i = 0; i < 19; i++)
-+		sw_w32(r[i], rtl_table_data(q, i));
-+
-+	rtl_table_write(q, idx);
-+	rtl_table_release(q);
-+
-+	return 0;
-+}
-+
-+static bool rtl930x_pie_templ_has(int t, enum template_field_id field_type)
-+{
-+	int i;
-+	enum template_field_id ft;
-+
-+	for (i = 0; i < N_FIXED_FIELDS; i++) {
-+		ft = fixed_templates[t][i];
-+		if (field_type == ft)
-+			return true;
-+	}
-+
-+	return false;
-+}
-+
-+/* 
-+ * Verify that the rule pr is compatible with a given template t in block block
-+ * Note that this function is SoC specific since the values of e.g. TEMPLATE_FIELD_SIP0
-+ * depend on the SoC
-+ */
-+static int rtl930x_pie_verify_template(struct rtl838x_switch_priv *priv,
-+				       struct pie_rule *pr, int t, int block)
-+{
-+	int i;
-+
-+	if (!pr->is_ipv6 && pr->sip_m && !rtl930x_pie_templ_has(t, TEMPLATE_FIELD_SIP0))
-+		return -1;
-+
-+	if (!pr->is_ipv6 && pr->dip_m && !rtl930x_pie_templ_has(t, TEMPLATE_FIELD_DIP0))
-+		return -1;
-+
-+	if (pr->is_ipv6) {
-+		if ((pr->sip6_m.s6_addr32[0] || pr->sip6_m.s6_addr32[1]
-+			|| pr->sip6_m.s6_addr32[2] || pr->sip6_m.s6_addr32[3])
-+			&& !rtl930x_pie_templ_has(t, TEMPLATE_FIELD_SIP2))
-+			return -1;
-+		if ((pr->dip6_m.s6_addr32[0] || pr->dip6_m.s6_addr32[1]
-+			|| pr->dip6_m.s6_addr32[2] || pr->dip6_m.s6_addr32[3])
-+			&& !rtl930x_pie_templ_has(t, TEMPLATE_FIELD_DIP2))
-+			return -1;
-+	}
-+
-+	if (ether_addr_to_u64(pr->smac) && !rtl930x_pie_templ_has(t, TEMPLATE_FIELD_SMAC0))
-+		return -1;
-+
-+	if (ether_addr_to_u64(pr->dmac) && !rtl930x_pie_templ_has(t, TEMPLATE_FIELD_DMAC0))
-+		return -1;
-+
-+	// TODO: Check more
-+
-+	i = find_first_zero_bit(&priv->pie_use_bm[block * 4], PIE_BLOCK_SIZE);
-+
-+	if (i >= PIE_BLOCK_SIZE)
-+		return -1;
-+
-+	return i + PIE_BLOCK_SIZE * block;
-+}
-+
-+static int rtl930x_pie_rule_add(struct rtl838x_switch_priv *priv, struct pie_rule *pr)
-+{
-+	int idx, block, j, t;
-+	int min_block = 0;
-+	int max_block = priv->n_pie_blocks / 2;
-+
-+	if (pr->is_egress) {
-+		min_block = max_block;
-+		max_block = priv->n_pie_blocks;
-+	}
-+	pr_info("In %s\n", __func__);
-+
-+	mutex_lock(&priv->pie_mutex);
-+
-+	for (block = min_block; block < max_block; block++) {
-+		for (j = 0; j < 2; j++) {
-+			t = (sw_r32(RTL930X_PIE_BLK_TMPLTE_CTRL(block)) >> (j * 4)) & 0xf;
-+			pr_info("Testing block %d, template %d, template id %d\n", block, j, t);
-+			pr_info("%s: %08x\n",
-+				__func__, sw_r32(RTL930X_PIE_BLK_TMPLTE_CTRL(block)));
-+			idx = rtl930x_pie_verify_template(priv, pr, t, block);
-+			if (idx >= 0)
-+				break;
-+		}
-+		if (j < 2)
-+			break;
-+	}
-+
-+	if (block >= priv->n_pie_blocks) {
-+		mutex_unlock(&priv->pie_mutex);
-+		return -EOPNOTSUPP;
-+	}
-+
-+	pr_info("Using block: %d, index %d, template-id %d\n", block, idx, j);
-+	set_bit(idx, priv->pie_use_bm);
-+
-+	pr->valid = true;
-+	pr->tid = j;  // Mapped to template number
-+	pr->tid_m = 0x1;
-+	pr->id = idx;
-+
-+	rtl930x_pie_lookup_enable(priv, idx);
-+	rtl930x_pie_rule_write(priv, idx, pr);
-+
-+	mutex_unlock(&priv->pie_mutex);
-+	return 0;
-+}
-+
-+/*
-+ * Delete a range of Packet Inspection Engine rules
-+ */
-+static int rtl930x_pie_rule_del(struct rtl838x_switch_priv *priv, int index_from, int index_to)
-+{
-+	u32 v = (index_from << 1)| (index_to << 12 ) | BIT(0);
-+
-+	pr_info("%s: from %d to %d\n", __func__, index_from, index_to);
-+	mutex_lock(&priv->reg_mutex);
-+
-+	// Write from-to and execute bit into control register
-+	sw_w32(v, RTL930X_PIE_CLR_CTRL);
-+
-+	// Wait until command has completed
-+	do {
-+	} while (sw_r32(RTL930X_PIE_CLR_CTRL) & BIT(0));
-+
-+	mutex_unlock(&priv->reg_mutex);
-+	return 0;
-+}
-+
-+static void rtl930x_pie_rule_rm(struct rtl838x_switch_priv *priv, struct pie_rule *pr)
-+{
-+	int idx = pr->id;
-+
-+	rtl930x_pie_rule_del(priv, idx, idx);
-+	clear_bit(idx, priv->pie_use_bm);
-+}
-+
-+static void rtl930x_pie_init(struct rtl838x_switch_priv *priv)
-+{
-+	int i;
-+	u32 template_selectors;
-+
-+	mutex_init(&priv->pie_mutex);
-+
-+	pr_info("%s\n", __func__);
-+	// Enable ACL lookup on all ports, including CPU_PORT
-+	for (i = 0; i <= priv->cpu_port; i++)
-+		sw_w32(1, RTL930X_ACL_PORT_LOOKUP_CTRL(i));
-+
-+	// Include IPG in metering
-+	sw_w32_mask(0, 1, RTL930X_METER_GLB_CTRL);
-+
-+	// Delete all present rules, block size is 128 on all SoC families
-+	rtl930x_pie_rule_del(priv, 0, priv->n_pie_blocks * 128 - 1);
-+
-+	// Assign blocks 0-7 to VACL phase (bit = 0), blocks 8-15 to IACL (bit = 1)
-+	sw_w32(0xff00, RTL930X_PIE_BLK_PHASE_CTRL);
-+	
-+	// Enable predefined templates 0, 1 for first quarter of all blocks
-+	template_selectors = 0 | (1 << 4);
-+	for (i = 0; i < priv->n_pie_blocks / 4; i++)
-+		sw_w32(template_selectors, RTL930X_PIE_BLK_TMPLTE_CTRL(i));
-+
-+	// Enable predefined templates 2, 3 for second quarter of all blocks
-+	template_selectors = 2 | (3 << 4);
-+	for (i = priv->n_pie_blocks / 4; i < priv->n_pie_blocks / 2; i++)
-+		sw_w32(template_selectors, RTL930X_PIE_BLK_TMPLTE_CTRL(i));
-+
-+	// Enable predefined templates 0, 1 for third half of all blocks
-+	template_selectors = 0 | (1 << 4);
-+	for (i = priv->n_pie_blocks / 2; i < priv->n_pie_blocks * 3 / 4; i++)
-+		sw_w32(template_selectors, RTL930X_PIE_BLK_TMPLTE_CTRL(i));
-+
-+	// Enable predefined templates 2, 3 for fourth quater of all blocks
-+	template_selectors = 2 | (3 << 4);
-+	for (i = priv->n_pie_blocks * 3 / 4; i < priv->n_pie_blocks; i++)
-+		sw_w32(template_selectors, RTL930X_PIE_BLK_TMPLTE_CTRL(i));
-+
-+}
-+
-+/*
-+ * Sets up an egress interface for L3 actions
-+ * Actions for ip4/6_icmp_redirect, ip4/6_pbr_icmp_redirect are:
-+ * 0: FORWARD, 1: DROP, 2: TRAP2CPU, 3: COPY2CPU, 4: TRAP2MASTERCPU 5: COPY2MASTERCPU
-+ * 6: HARDDROP
-+ * idx is the index in the HW interface table: idx < 0x80
-+ */
-+static void rtl930x_set_l3_egress_intf(int idx, struct rtl838x_l3_intf *intf)
-+{
-+	u32 u, v;
-+	// Read L3_EGR_INTF table (4) via register RTL9300_TBL_1
-+	struct table_reg *r = rtl_table_get(RTL9300_TBL_1, 4);
-+
-+	// The table has 2 registers
-+	u = (intf->vid & 0xfff) << 9;
-+	u |= (intf->smac_idx & 0x3f) << 3;
-+	u |= (intf->ip4_mtu_id & 0x7);
-+
-+	v = (intf->ip6_mtu_id & 0x7) << 28;
-+	v |= (intf->ttl_scope & 0xff) << 20;
-+	v |= (intf->hl_scope & 0xff) << 12;
-+	v |= (intf->ip4_icmp_redirect & 0x7) << 9;
-+	v |= (intf->ip6_icmp_redirect & 0x7)<< 6;
-+	v |= (intf->ip4_pbr_icmp_redirect & 0x7) << 3;
-+	v |= (intf->ip6_pbr_icmp_redirect & 0x7);
-+
-+	sw_w32(u, rtl_table_data(r, 0));
-+	sw_w32(v, rtl_table_data(r, 1));
-+
-+	pr_info("%s writing to index %d: %08x %08x\n", __func__, idx, u, v);
-+	rtl_table_write(r, idx & 0x7f);
-+	rtl_table_release(r);
-+}
-+
-+/*
-+ * Reads a MAC entry for L3 termination as entry point for routing
-+ * from the hardware table
-+ * idx is the index into the L3_ROUTER_MAC table
-+ */
-+static void rtl930x_get_l3_router_mac(u32 idx, struct rtl93xx_rt_mac *m)
-+{
-+	u32 v, w;
-+	// Read L3_ROUTER_MAC table (0) via register RTL9300_TBL_1
-+	struct table_reg *r = rtl_table_get(RTL9300_TBL_1, 0);
-+
-+	rtl_table_read(r, idx);
-+	// The table has a size of 7 registers, 64 entries
-+	v = sw_r32(rtl_table_data(r, 0));
-+	w = sw_r32(rtl_table_data(r, 3));
-+	m->valid = !!(v & BIT(20));
-+	if (!m->valid)
-+		goto out;
-+
-+	m->p_type = !!(v & BIT(19));
-+	m->p_id = (v >> 13) & 0x3f;  // trunk id of port
-+	m->vid = v & 0xfff;
-+	m->vid_mask = w & 0xfff;
-+	m->action = sw_r32(rtl_table_data(r, 6)) & 0x7;
-+	m->mac_mask = ((((u64)sw_r32(rtl_table_data(r, 5))) << 32) & 0xffffffffffffULL)
-+			| (sw_r32(rtl_table_data(r, 4)));
-+	m->mac = ((((u64)sw_r32(rtl_table_data(r, 1))) << 32) & 0xffffffffffffULL)
-+			| (sw_r32(rtl_table_data(r, 2)));
-+	// Bits L3_INTF and BMSK_L3_INTF are 0
-+
-+out:
-+	rtl_table_release(r);
-+}
-+
-+/*
-+ * Writes a MAC entry for L3 termination as entry point for routing
-+ * into the hardware table
-+ * idx is the index into the L3_ROUTER_MAC table
-+ */
-+static void rtl930x_set_l3_router_mac(u32 idx, struct rtl93xx_rt_mac *m)
-+{
-+	u32 v, w;
-+	// Read L3_ROUTER_MAC table (0) via register RTL9300_TBL_1
-+	struct table_reg *r = rtl_table_get(RTL9300_TBL_1, 0);
-+
-+	// The table has a size of 7 registers, 64 entries
-+	v = BIT(20); // mac entry valid, port type is 0: individual
-+	v |= (m->p_id & 0x3f) << 13;
-+	v |= (m->vid & 0xfff); // Set the interface_id to the vlan id
-+
-+	w = m->vid_mask;
-+	w |= (m->p_id_mask & 0x3f) << 13;
-+
-+	sw_w32(v, rtl_table_data(r, 0));
-+	sw_w32(w, rtl_table_data(r, 3));
-+
-+	// Set MAC address, L3_INTF (bit 12 in register 1) needs to be 0
-+	sw_w32((u32)(m->mac), rtl_table_data(r, 2));
-+	sw_w32(m->mac >> 32, rtl_table_data(r, 1));
-+
-+	// Set MAC address mask, BMSK_L3_INTF (bit 12 in register 5) needs to be 0
-+	sw_w32((u32)(m->mac_mask >> 32), rtl_table_data(r, 4));
-+	sw_w32((u32)m->mac_mask, rtl_table_data(r, 5));
-+
-+	sw_w32(m->action & 0x7, rtl_table_data(r, 6));
-+
-+	pr_info("%s writing index %d: %08x %08x %08x %08x %08x %08x %08x\n", __func__, idx,
-+		sw_r32(rtl_table_data(r, 0)), sw_r32(rtl_table_data(r, 1)), sw_r32(rtl_table_data(r, 2)),
-+		sw_r32(rtl_table_data(r, 3)), sw_r32(rtl_table_data(r, 4)), sw_r32(rtl_table_data(r, 5)),
-+		sw_r32(rtl_table_data(r, 6))
-+	);
-+	rtl_table_write(r, idx);
-+	rtl_table_release(r);
-+}
-+
-+/*
-+ * Get the Destination-MAC of an L3 egress interface or the Source MAC for routed packets
-+ * from the SoC's L3_EGR_INTF_MAC table
-+ * Indexes 0-2047 are DMACs, 2048+ are SMACs
-+ */
-+static u64 rtl930x_get_l3_egress_mac(u32 idx)
-+{
-+	u64 mac;
-+	// Read L3_EGR_INTF_MAC table (2) via register RTL9300_TBL_2
-+	struct table_reg *r = rtl_table_get(RTL9300_TBL_2, 2);
-+
-+	rtl_table_read(r, idx);
-+	// The table has a size of 2 registers
-+	mac = sw_r32(rtl_table_data(r, 0));
-+	mac <<= 32;
-+	mac |= sw_r32(rtl_table_data(r, 1));
-+	rtl_table_release(r);
-+
-+	return mac;
-+}
-+/*
-+ * Set the Destination-MAC of a route or the Source MAC of an L3 egress interface
-+ * in the SoC's L3_EGR_INTF_MAC table
-+ * Indexes 0-2047 are DMACs, 2048+ are SMACs
-+ */
-+static void rtl930x_set_l3_egress_mac(u32 idx, u64 mac)
-+{
-+	// Access L3_EGR_INTF_MAC table (2) via register RTL9300_TBL_2
-+	struct table_reg *r = rtl_table_get(RTL9300_TBL_2, 2);
-+
-+	// The table has a size of 2 registers
-+	sw_w32(mac >> 32, rtl_table_data(r, 0));
-+	sw_w32(mac, rtl_table_data(r, 1));
-+
-+	pr_debug("%s: setting index %d to %016llx\n", __func__, idx, mac);
-+	rtl_table_write(r, idx);
-+	rtl_table_release(r);
-+}
-+
-+/*
-+ * Configure L3 routing settings of the device:
-+ * - MTUs
-+ * - Egress interface
-+ * - The router's MAC address on which routed packets are expected
-+ * - MAC addresses used as source macs of routed packets
-+ */
-+int rtl930x_l3_setup(struct rtl838x_switch_priv *priv)
-+{
-+	int i;
-+
-+	// Setup MTU with id 0 for default interface
-+	for (i = 0; i < MAX_INTF_MTUS; i++)
-+		priv->intf_mtu_count[i] = priv->intf_mtus[i] = 0;
-+
-+	priv->intf_mtu_count[0] = 0; // Needs to stay forever
-+	priv->intf_mtus[0] = DEFAULT_MTU;
-+	sw_w32_mask(0xffff, DEFAULT_MTU, RTL930X_L3_IP_MTU_CTRL(0));
-+	sw_w32_mask(0xffff, DEFAULT_MTU, RTL930X_L3_IP6_MTU_CTRL(0));
-+	priv->intf_mtus[1] = DEFAULT_MTU;
-+	sw_w32_mask(0xffff0000, DEFAULT_MTU << 16, RTL930X_L3_IP_MTU_CTRL(0));
-+	sw_w32_mask(0xffff0000, DEFAULT_MTU << 16, RTL930X_L3_IP6_MTU_CTRL(0));
-+
-+	sw_w32_mask(0xffff, DEFAULT_MTU, RTL930X_L3_IP_MTU_CTRL(1));
-+	sw_w32_mask(0xffff, DEFAULT_MTU, RTL930X_L3_IP6_MTU_CTRL(1));
-+	sw_w32_mask(0xffff0000, DEFAULT_MTU << 16, RTL930X_L3_IP_MTU_CTRL(1));
-+	sw_w32_mask(0xffff0000, DEFAULT_MTU << 16, RTL930X_L3_IP6_MTU_CTRL(1));
-+
-+	// Clear all source port MACs
-+	for (i = 0; i < MAX_SMACS; i++)
-+		rtl930x_set_l3_egress_mac(L3_EGRESS_DMACS + i, 0ULL);
-+
-+	// Configure the default L3 hash algorithm
-+	sw_w32_mask(BIT(2), 0, RTL930X_L3_HOST_TBL_CTRL);  // Algorithm selection 0 = 0
-+	sw_w32_mask(0, BIT(3), RTL930X_L3_HOST_TBL_CTRL);  // Algorithm selection 1 = 1
-+
-+	pr_info("L3_IPUC_ROUTE_CTRL %08x, IPMC_ROUTE %08x, IP6UC_ROUTE %08x, IP6MC_ROUTE %08x\n",
-+		sw_r32(RTL930X_L3_IPUC_ROUTE_CTRL), sw_r32(RTL930X_L3_IPMC_ROUTE_CTRL),
-+		sw_r32(RTL930X_L3_IP6UC_ROUTE_CTRL), sw_r32(RTL930X_L3_IP6MC_ROUTE_CTRL));
-+	sw_w32_mask(0, 1, RTL930X_L3_IPUC_ROUTE_CTRL);
-+	sw_w32_mask(0, 1, RTL930X_L3_IP6UC_ROUTE_CTRL);
-+	sw_w32_mask(0, 1, RTL930X_L3_IPMC_ROUTE_CTRL);
-+	sw_w32_mask(0, 1, RTL930X_L3_IP6MC_ROUTE_CTRL);
-+
-+	sw_w32(0x00002001, RTL930X_L3_IPUC_ROUTE_CTRL);
-+	sw_w32(0x00014581, RTL930X_L3_IP6UC_ROUTE_CTRL);
-+	sw_w32(0x00000501, RTL930X_L3_IPMC_ROUTE_CTRL);
-+	sw_w32(0x00012881, RTL930X_L3_IP6MC_ROUTE_CTRL);
-+
-+	pr_info("L3_IPUC_ROUTE_CTRL %08x, IPMC_ROUTE %08x, IP6UC_ROUTE %08x, IP6MC_ROUTE %08x\n",
-+		sw_r32(RTL930X_L3_IPUC_ROUTE_CTRL), sw_r32(RTL930X_L3_IPMC_ROUTE_CTRL),
-+		sw_r32(RTL930X_L3_IP6UC_ROUTE_CTRL), sw_r32(RTL930X_L3_IP6MC_ROUTE_CTRL));
-+
-+	// Trap non-ip traffic to the CPU-port (e.g. ARP so we stay reachable)
-+	sw_w32_mask(0x3 << 8, 0x1 << 8, RTL930X_L3_IP_ROUTE_CTRL);
-+	pr_info("L3_IP_ROUTE_CTRL %08x\n", sw_r32(RTL930X_L3_IP_ROUTE_CTRL));
-+
-+	// PORT_ISO_RESTRICT_ROUTE_CTRL ?
-+
-+	// Do not use prefix route 0 because of HW limitations
-+	set_bit(0, priv->route_use_bm);
-+
-+	return 0;
-+}
-+
-+static u32 rtl930x_packet_cntr_read(int counter)
-+{
-+	u32 v;
-+
-+	// Read LOG table (3) via register RTL9300_TBL_0
-+	struct table_reg *r = rtl_table_get(RTL9300_TBL_0, 3);
-+
-+	pr_info("In %s, id %d\n", __func__, counter);
-+	rtl_table_read(r, counter / 2);
-+
-+	pr_info("Registers: %08x %08x\n",
-+		sw_r32(rtl_table_data(r, 0)), sw_r32(rtl_table_data(r, 1)));
-+	// The table has a size of 2 registers
-+	if (counter % 2)
-+		v = sw_r32(rtl_table_data(r, 0));
-+	else
-+		v = sw_r32(rtl_table_data(r, 1));
-+
-+	rtl_table_release(r);
-+
-+	return v;
-+}
-+
-+static void rtl930x_packet_cntr_clear(int counter)
-+{
-+	// Access LOG table (3) via register RTL9300_TBL_0
-+	struct table_reg *r = rtl_table_get(RTL9300_TBL_0, 3);
-+
-+	pr_info("In %s, id %d\n", __func__, counter);
-+	// The table has a size of 2 registers
-+	if (counter % 2)
-+		sw_w32(0, rtl_table_data(r, 0));
-+	else
-+		sw_w32(0, rtl_table_data(r, 1));
-+
-+	rtl_table_write(r, counter / 2);
-+
-+	rtl_table_release(r);
-+}
-+
-+void rtl930x_set_distribution_algorithm(int group, int algoidx, u32 algomsk)
-+{
-+	u32 l3shift = 0;
-+	u32 newmask = 0;
-+	/* unless we clarified how the algo index is configured, we set it to 0 */
-+	algoidx=0;
-+	if (algomsk & TRUNK_DISTRIBUTION_ALGO_SIP_BIT) {
-+		l3shift = 4;
-+		newmask |= TRUNK_DISTRIBUTION_ALGO_L3_SIP_BIT;
-+	}
-+	if (algomsk & TRUNK_DISTRIBUTION_ALGO_DIP_BIT) {
-+		l3shift = 4;
-+		newmask |= TRUNK_DISTRIBUTION_ALGO_L3_DIP_BIT;
-+	}
-+	if (algomsk & TRUNK_DISTRIBUTION_ALGO_SRC_L4PORT_BIT) {
-+		l3shift = 4;
-+		newmask |= TRUNK_DISTRIBUTION_ALGO_L3_SRC_L4PORT_BIT;
-+	}
-+	if (algomsk & TRUNK_DISTRIBUTION_ALGO_SRC_L4PORT_BIT) {
-+		l3shift = 4;
-+		newmask |= TRUNK_DISTRIBUTION_ALGO_L3_SRC_L4PORT_BIT;
-+	}
-+	if (l3shift == 4)
-+	{
-+		if (algomsk & TRUNK_DISTRIBUTION_ALGO_SMAC_BIT) {
-+			newmask |= TRUNK_DISTRIBUTION_ALGO_L3_SMAC_BIT;
-+		}
-+		if (algomsk & TRUNK_DISTRIBUTION_ALGO_DMAC_BIT) {
-+			newmask |= TRUNK_DISTRIBUTION_ALGO_L3_DMAC_BIT;
-+		}
-+	} else  {
-+		if (algomsk & TRUNK_DISTRIBUTION_ALGO_SMAC_BIT) {
-+			newmask |= TRUNK_DISTRIBUTION_ALGO_L2_SMAC_BIT;
-+		}
-+		if (algomsk & TRUNK_DISTRIBUTION_ALGO_DMAC_BIT) {
-+			newmask |= TRUNK_DISTRIBUTION_ALGO_L2_DMAC_BIT;
-+		}
-+	}
-+	sw_w32(newmask << l3shift, RTL930X_TRK_HASH_CTRL + (algoidx << 2));
-+}
-+
-+void rtl930x_set_receive_management_action(int port, rma_ctrl_t type, action_type_t action)
-+{
-+	u32 value = 0;
-+	
-+	switch(action) {
-+	case FORWARD:
-+	    value = 0;
-+	break;
-+	case DROP:
-+	    value = 1;
-+	break;
-+	case TRAP2CPU:
-+	    value = 2;
-+	break;
-+	case TRAP2MASTERCPU:
-+	    value = 3;
-+	break;
-+	case FLOODALL:
-+	    value = 4;
-+	break;
-+	}
-+	switch(type) {
-+	case BPDU:
-+		sw_w32_mask(7 << ((port % 10) * 3), value << ((port % 10) * 3), RTL930X_RMA_BPDU_CTRL + ((port / 10) << 2));
-+	break;
-+	case PTP:
-+		//udp
-+		sw_w32_mask(3 << 2, value << 2, RTL930X_RMA_PTP_CTRL + (port << 2));
-+		//eth2
-+		sw_w32_mask(3, value, RTL930X_RMA_PTP_CTRL + (port << 2));
-+	break;
-+	case PTP_UDP:
-+		sw_w32_mask(3 << 2, value << 2, RTL930X_RMA_PTP_CTRL + (port << 2));
-+	break;
-+	case PTP_ETH2:
-+		sw_w32_mask(3, value, RTL930X_RMA_PTP_CTRL + (port << 2));
-+	break;
-+	case LLTP:
-+		sw_w32_mask(7 << ((port % 10) * 3), value << ((port % 10) * 3), RTL930X_RMA_LLTP_CTRL + ((port / 10) << 2));
-+	break;
-+	case EAPOL:
-+		sw_w32_mask(7 << ((port % 10) * 3), value << ((port % 10) * 3), RTL930X_RMA_EAPOL_CTRL + ((port / 10) << 2));
-+	break;
-+	default:
-+	break;
-+	}
-+}
-+
- const struct rtl838x_reg rtl930x_reg = {
- 	.mask_port_reg_be = rtl838x_mask_port_reg,
- 	.set_port_reg_be = rtl838x_set_port_reg,
-@@ -582,6 +2446,8 @@ const struct rtl838x_reg rtl930x_reg = {
- 	.vlan_set_tagged = rtl930x_vlan_set_tagged,
- 	.vlan_set_untagged = rtl930x_vlan_set_untagged,
- 	.vlan_profile_dump = rtl930x_vlan_profile_dump,
-+	.vlan_profile_setup = rtl930x_vlan_profile_setup,
-+	.vlan_fwd_on_inner = rtl930x_vlan_fwd_on_inner,
- 	.stp_get = rtl930x_stp_get,
- 	.stp_set = rtl930x_stp_set,
- 	.mac_force_mode_ctrl = rtl930x_mac_force_mode_ctrl,
-@@ -597,11 +2463,62 @@ const struct rtl838x_reg rtl930x_reg = {
- 	.mac_rx_pause_sts = RTL930X_MAC_RX_PAUSE_STS,
- 	.mac_tx_pause_sts = RTL930X_MAC_TX_PAUSE_STS,
- 	.read_l2_entry_using_hash = rtl930x_read_l2_entry_using_hash,
-+	.write_l2_entry_using_hash = rtl930x_write_l2_entry_using_hash,
- 	.read_cam = rtl930x_read_cam,
-+	.write_cam = rtl930x_write_cam,
- 	.vlan_port_egr_filter = RTL930X_VLAN_PORT_EGR_FLTR,
--	.vlan_port_igr_filter = RTL930X_VLAN_PORT_IGR_FLTR(0),
-+	.vlan_port_igr_filter = RTL930X_VLAN_PORT_IGR_FLTR,
- 	.vlan_port_pb = RTL930X_VLAN_PORT_PB_VLAN,
- 	.vlan_port_tag_sts_ctrl = RTL930X_VLAN_PORT_TAG_STS_CTRL,
- 	.trk_mbr_ctr = rtl930x_trk_mbr_ctr,
- 	.rma_bpdu_fld_pmask = RTL930X_RMA_BPDU_FLD_PMSK,
-+	.init_eee = rtl930x_init_eee,
-+	.port_eee_set = rtl930x_port_eee_set,
-+	.eee_port_ability = rtl930x_eee_port_ability,
-+	.l2_hash_seed = rtl930x_l2_hash_seed,
-+	.l2_hash_key = rtl930x_l2_hash_key,
-+	.read_mcast_pmask = rtl930x_read_mcast_pmask,
-+	.write_mcast_pmask = rtl930x_write_mcast_pmask,
-+	.l2_learning_setup = rtl930x_l2_learning_setup,
-+	.pie_init = rtl930x_pie_init,
-+	.pie_rule_write = rtl930x_pie_rule_write,
-+	.pie_rule_add = rtl930x_pie_rule_add,
-+	.pie_rule_rm = rtl930x_pie_rule_rm,
-+	.l2_learning_setup = rtl930x_l2_learning_setup,
-+	.route_read = rtl930x_route_read,
-+	.route_write = rtl930x_route_write,
-+	.host_route_write = rtl930x_host_route_write,
-+	.l3_setup = rtl930x_l3_setup,
-+	.set_l3_nexthop = rtl930x_set_l3_nexthop,
-+	.get_l3_nexthop = rtl930x_get_l3_nexthop,
-+	.get_l3_egress_mac = rtl930x_get_l3_egress_mac,
-+	.set_l3_egress_mac = rtl930x_set_l3_egress_mac,
-+	.find_l3_slot = rtl930x_find_l3_slot,
-+	.route_lookup_hw = rtl930x_route_lookup_hw,
-+	.get_l3_router_mac = rtl930x_get_l3_router_mac,
-+	.set_l3_router_mac = rtl930x_set_l3_router_mac,
-+	.set_l3_egress_intf = rtl930x_set_l3_egress_intf,
-+	.packet_cntr_read = rtl930x_packet_cntr_read,
-+	.packet_cntr_clear = rtl930x_packet_cntr_clear,
-+	.rma_bpdu_ctrl = RTL930X_RMA_BPDU_CTRL,
-+	.rma_ptp_ctrl = RTL930X_RMA_PTP_CTRL,
-+	.rma_lltp_ctrl = RTL930X_RMA_LLTP_CTRL,
-+	.rma_eapol_ctrl = RTL930X_RMA_EAPOL_CTRL,
-+	.rma_bpdu_ctrl_div = 10,
-+	.rma_ptp_ctrl_div = 1,
-+	.rma_lltp_ctrl_div = 10,
-+	.rma_eapol_ctrl_div = 10,
-+	.storm_ctrl_port_uc = RTL930X_STORM_CTRL_PORT_UC_0(0),
-+	.storm_ctrl_port_bc = RTL930X_STORM_CTRL_PORT_BC_0(0),
-+	.storm_ctrl_port_mc = RTL930X_STORM_CTRL_PORT_MC_0(0),
-+	.storm_ctrl_port_uc_shift = 3,
-+	.storm_ctrl_port_bc_shift = 3,
-+	.storm_ctrl_port_mc_shift = 3,
-+	.vlan_ctrl = RTL930X_VLAN_CTRL,
-+	.sflow_ctrl = RTL930X_SFLOW_CTRL,
-+	.sflow_port_rate_ctrl = RTL930X_SFLOW_PORT_RATE_CTRL,
-+	.trk_hash_ctrl = RTL930X_TRK_HASH_CTRL,
-+//	.trk_hash_idx_ctrl = RTL930X_TRK_HASH_IDX_CTRL,
-+	.set_distribution_algorithm = rtl930x_set_distribution_algorithm,
-+	.set_receive_management_action = rtl930x_set_receive_management_action,
- };
-diff --git a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl931x.c b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl931x.c
-index a33941a0eb..9e0dee79a5 100644
---- a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl931x.c
-+++ b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl931x.c
-@@ -175,6 +175,7 @@ static u64 rtl931x_read_cam(int idx, struct rtl838x_l2_entry *e)
- 	// TODO: Implement
- 	return entry;
- }
-+
- irqreturn_t rtl931x_switch_irq(int irq, void *dev_id)
- {
- 	struct dsa_switch *ds = dev_id;
-@@ -199,7 +200,6 @@ irqreturn_t rtl931x_switch_irq(int irq, void *dev_id)
- 	return IRQ_HANDLED;
- }
- 
--
- int rtl931x_write_phy(u32 port, u32 page, u32 reg, u32 val)
- {
- 	u32 v;
-@@ -264,6 +264,73 @@ int rtl931x_read_phy(u32 port, u32 page, u32 reg, u32 *val)
- 	return 0;
- }
- 
-+/*
-+ * Read an mmd register of the PHY
-+ */
-+int rtl931x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val)
-+{
-+	int err = 0;
-+	u32 v;
-+	int type = 1; // TODO: For C45 PHYs need to set to 2
-+
-+	mutex_lock(&smi_lock);
-+
-+	// Set PHY to access via port-number
-+	sw_w32(port << 5, RTL931X_SMI_INDRT_ACCESS_BC_PHYID_CTRL);
-+
-+	// Set MMD device number and register to write to
-+	sw_w32(devnum << 16 | (regnum & 0xffff), RTL931X_SMI_INDRT_ACCESS_MMD_CTRL);
-+
-+	v = type << 2 | BIT(0); // MMD-access-type | EXEC
-+	sw_w32(v, RTL931X_SMI_INDRT_ACCESS_CTRL_0);
-+
-+	do {
-+		v = sw_r32(RTL931X_SMI_INDRT_ACCESS_CTRL_0);
-+	} while (v & BIT(0));
-+
-+	// There is no error-checking via BIT 1 of v, as it does not seem to be set correctly
-+
-+	*val = (sw_r32(RTL931X_SMI_INDRT_ACCESS_CTRL_3) & 0xffff);
-+
-+	pr_debug("%s: port %d, regnum: %x, val: %x (err %d)\n", __func__, port, regnum, *val, err);
-+
-+	mutex_unlock(&smi_lock);
-+
-+	return err;
-+}
-+
-+/*
-+ * Write to an mmd register of the PHY
-+ */
-+int rtl931x_write_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 val)
-+{
-+	int err = 0;
-+	u32 v;
-+	int type = 1; // TODO: For C45 PHYs need to set to 2
-+
-+	mutex_lock(&smi_lock);
-+
-+	// Set PHY to access via port-number
-+	sw_w32(port << 5, RTL931X_SMI_INDRT_ACCESS_BC_PHYID_CTRL);
-+
-+	// Set data to write
-+	sw_w32_mask(0xffff << 16, val << 16, RTL931X_SMI_INDRT_ACCESS_CTRL_3);
-+
-+	// Set MMD device number and register to write to
-+	sw_w32(devnum << 16 | (regnum & 0xffff), RTL931X_SMI_INDRT_ACCESS_MMD_CTRL);
-+
-+	v = BIT(4) | type << 2 | BIT(0); // WRITE | MMD-access-type | EXEC
-+	sw_w32(v, RTL931X_SMI_INDRT_ACCESS_CTRL_0);
-+
-+	do {
-+		v = sw_r32(RTL931X_SMI_INDRT_ACCESS_CTRL_0);
-+	} while (v & BIT(0));
-+
-+	pr_debug("%s: port %d, regnum: %x, val: %x (err %d)\n", __func__, port, regnum, val, err);
-+	mutex_unlock(&smi_lock);
-+	return err;
-+}
-+
- void rtl931x_print_matrix(void)
- {
- 	volatile u64 *ptr = RTL838X_SW_BASE + RTL839X_PORT_ISO_CTRL(0);
-@@ -275,6 +342,103 @@ void rtl931x_print_matrix(void)
- 	pr_info("CPU_PORT> %16llx\n", ptr[52]);
- }
- 
-+void rtl931x_set_distribution_algorithm(int group, int algoidx, u32 algomsk)
-+{
-+	u32 l3shift = 0;
-+	u32 newmask = 0;
-+	/* unless we clarified how the algo index is configured, we set it to 0 */
-+	algoidx=0;
-+	if (algomsk & TRUNK_DISTRIBUTION_ALGO_SIP_BIT) {
-+		l3shift = 4;
-+		newmask |= TRUNK_DISTRIBUTION_ALGO_L3_SIP_BIT;
-+	}
-+	if (algomsk & TRUNK_DISTRIBUTION_ALGO_DIP_BIT) {
-+		l3shift = 4;
-+		newmask |= TRUNK_DISTRIBUTION_ALGO_L3_DIP_BIT;
-+	}
-+	if (algomsk & TRUNK_DISTRIBUTION_ALGO_SRC_L4PORT_BIT) {
-+		l3shift = 4;
-+		newmask |= TRUNK_DISTRIBUTION_ALGO_L3_SRC_L4PORT_BIT;
-+	}
-+	if (algomsk & TRUNK_DISTRIBUTION_ALGO_SRC_L4PORT_BIT) {
-+		l3shift = 4;
-+		newmask |= TRUNK_DISTRIBUTION_ALGO_L3_SRC_L4PORT_BIT;
-+	}
-+	if (l3shift == 4)
-+	{
-+		if (algomsk & TRUNK_DISTRIBUTION_ALGO_SMAC_BIT) {
-+			newmask |= TRUNK_DISTRIBUTION_ALGO_L3_SMAC_BIT;
-+		}
-+		if (algomsk & TRUNK_DISTRIBUTION_ALGO_DMAC_BIT) {
-+			newmask |= TRUNK_DISTRIBUTION_ALGO_L3_DMAC_BIT;
-+		}
-+	} else  {
-+		if (algomsk & TRUNK_DISTRIBUTION_ALGO_SMAC_BIT) {
-+			newmask |= TRUNK_DISTRIBUTION_ALGO_L2_SMAC_BIT;
-+		}
-+		if (algomsk & TRUNK_DISTRIBUTION_ALGO_DMAC_BIT) {
-+			newmask |= TRUNK_DISTRIBUTION_ALGO_L2_DMAC_BIT;
-+		}
-+	}
-+	sw_w32(newmask << l3shift, RTL931X_TRK_HASH_CTRL + (algoidx << 2));
-+}
-+
-+void rtl931x_set_receive_management_action(int port, rma_ctrl_t type, action_type_t action)
-+{
-+	u32 value = 0;
-+	
-+	/* hack for value mapping */
-+	if (type == GRATARP && action == COPY2CPU)
-+		action = TRAP2MASTERCPU;
-+
-+	switch(action) {
-+	case FORWARD:
-+	    value = 0;
-+	break;
-+	case DROP:
-+	    value = 1;
-+	break;
-+	case TRAP2CPU:
-+	    value = 2;
-+	break;
-+	case TRAP2MASTERCPU:
-+	    value = 3;
-+	break;
-+	case FLOODALL:
-+	    value = 4;
-+	break;
-+	default:
-+	break;
-+	}
-+	
-+	switch(type) {
-+	case BPDU:
-+		sw_w32_mask(7 << ((port % 10) * 3), value << ((port % 10) * 3), RTL931X_RMA_BPDU_CTRL + ((port / 10) << 2));
-+	break;
-+	case PTP:
-+		//udp
-+		sw_w32_mask(3 << 2, value << 2, RTL931X_RMA_PTP_CTRL + (port << 2));
-+		//eth2
-+		sw_w32_mask(3, value, RTL931X_RMA_PTP_CTRL + (port << 2));
-+	break;
-+	case PTP_UDP:
-+		sw_w32_mask(3 << 2, value << 2, RTL931X_RMA_PTP_CTRL + (port << 2));
-+	break;
-+	case PTP_ETH2:
-+		sw_w32_mask(3, value, RTL931X_RMA_PTP_CTRL + (port << 2));
-+	break;
-+	case LLTP:
-+		sw_w32_mask(7 << ((port % 10) * 3), value << ((port % 10) * 3), RTL931X_RMA_LLTP_CTRL + ((port / 10) << 2));
-+	break;
-+	case EAPOL:
-+		sw_w32_mask(7 << ((port % 10) * 3), value << ((port % 10) * 3), RTL931X_RMA_EAPOL_CTRL + ((port / 10) << 2));
-+	break;
-+	case GRATARP:
-+		sw_w32_mask(3 << ((port & 0xf) << 1), value << ((port & 0xf) << 1), RTL931X_TRAP_ARP_GRAT_PORT_ACT + ((port >> 4) << 2));
-+	break;
-+	}
-+}
-+
- const struct rtl838x_reg rtl931x_reg = {
- 	.mask_port_reg_be = rtl839x_mask_port_reg_be,
- 	.set_port_reg_be = rtl839x_set_port_reg_be,
-@@ -317,10 +481,31 @@ const struct rtl838x_reg rtl931x_reg = {
- 	.mac_tx_pause_sts = RTL931X_MAC_TX_PAUSE_STS,
- 	.read_l2_entry_using_hash = rtl931x_read_l2_entry_using_hash,
- 	.read_cam = rtl931x_read_cam,
--	.vlan_port_egr_filter = RTL931X_VLAN_PORT_EGR_FLTR(0),
--	.vlan_port_igr_filter = RTL931X_VLAN_PORT_IGR_FLTR(0),
-+	.vlan_port_egr_filter = RTL931X_VLAN_PORT_EGR_FLTR,
-+	.vlan_port_igr_filter = RTL931X_VLAN_PORT_IGR_FLTR,
- //	.vlan_port_pb = does not exist
- 	.vlan_port_tag_sts_ctrl = RTL931X_VLAN_PORT_TAG_CTRL,
- 	.trk_mbr_ctr = rtl931x_trk_mbr_ctr,
-+	.rma_bpdu_ctrl = RTL931X_RMA_BPDU_CTRL,
-+	.rma_ptp_ctrl = RTL931X_RMA_PTP_CTRL,
-+	.rma_lltp_ctrl = RTL931X_RMA_LLTP_CTRL,
-+	.rma_eapol_ctrl = RTL931X_RMA_EAPOL_CTRL,
-+	.rma_bpdu_ctrl_div = 10,
-+	.rma_ptp_ctrl_div = 1,
-+	.rma_lltp_ctrl_div = 10,
-+	.rma_eapol_ctrl_div = 10,
-+	.storm_ctrl_port_uc = RTL931X_STORM_CTRL_PORT_UC_0(0),
-+	.storm_ctrl_port_bc = RTL931X_STORM_CTRL_PORT_BC_0(0),
-+	.storm_ctrl_port_mc = RTL931X_STORM_CTRL_PORT_MC_0(0),
-+	.storm_ctrl_port_uc_shift = 3,
-+	.storm_ctrl_port_bc_shift = 3,
-+	.storm_ctrl_port_mc_shift = 3,
-+	.vlan_ctrl = RTL931X_VLAN_CTRL,
-+	.sflow_ctrl = RTL931X_SFLOW_CTRL,
-+	.sflow_port_rate_ctrl = RTL931X_SFLOW_PORT_RATE_CTRL,
-+	.trk_hash_ctrl = RTL931X_TRK_HASH_CTRL,
-+//	.trk_hash_idx_ctrl = RTL931X_TRK_HASH_IDX_CTRL,
-+	.set_distribution_algorithm = rtl931x_set_distribution_algorithm,
-+	.set_receive_management_action = rtl931x_set_receive_management_action,
- };
- 
-diff --git a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/tc.c b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/tc.c
-new file mode 100644
-index 0000000000..eeba29231a
---- /dev/null
-+++ b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/tc.c
-@@ -0,0 +1,406 @@
-+// SPDX-License-Identifier: GPL-2.0-only
-+
-+#include <net/dsa.h>
-+#include <linux/delay.h>
-+#include <linux/netdevice.h>
-+#include <net/flow_offload.h>
-+
-+#include <asm/mach-rtl838x/mach-rtl83xx.h>
-+#include "rtl83xx.h"
-+
-+/*
-+ * Parse the flow rule for the matching conditions
-+ */
-+static int rtl83xx_parse_flow_rule(struct rtl838x_switch_priv *priv,
-+			      struct flow_rule *rule, struct rtl83xx_flow *flow)
-+{
-+	struct flow_dissector *dissector = rule->match.dissector;
-+
-+	pr_info("In %s\n", __func__);
-+	/* KEY_CONTROL and KEY_BASIC are needed for forming a meaningful key */
-+	if ((dissector->used_keys & BIT(FLOW_DISSECTOR_KEY_CONTROL)) == 0 ||
-+	    (dissector->used_keys & BIT(FLOW_DISSECTOR_KEY_BASIC)) == 0) {
-+		pr_info("Cannot form TC key: used_keys = 0x%x\n", dissector->used_keys);
-+		return -EOPNOTSUPP;
-+	}
-+
-+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
-+		struct flow_match_basic match;
-+
-+		pr_info("%s: BASIC\n", __func__);
-+		flow_rule_match_basic(rule, &match);
-+		if (match.key->n_proto == htons(ETH_P_ARP))
-+			flow->rule.frame_type = 0;
-+		if (match.key->n_proto == htons(ETH_P_IP))
-+			flow->rule.frame_type = 2;
-+		if (match.key->n_proto == htons(ETH_P_IPV6))
-+			flow->rule.frame_type = 3;
-+		if ((match.key->n_proto == htons(ETH_P_ARP)) || flow->rule.frame_type)
-+			flow->rule.frame_type_m = 3;
-+		if (flow->rule.frame_type >= 2) {
-+			if (match.key->ip_proto == IPPROTO_UDP)
-+				flow->rule.frame_type_l4 = 0;
-+			if (match.key->ip_proto == IPPROTO_TCP)
-+				flow->rule.frame_type_l4 = 1;
-+			if (match.key->ip_proto == IPPROTO_ICMP
-+				|| match.key->ip_proto ==IPPROTO_ICMPV6)
-+				flow->rule.frame_type_l4 = 2;
-+			if (match.key->ip_proto == IPPROTO_TCP)
-+				flow->rule.frame_type_l4 = 3;
-+			if ((match.key->ip_proto == IPPROTO_UDP) || flow->rule.frame_type_l4)
-+				flow->rule.frame_type_l4_m = 7;
-+		}
-+	}
-+
-+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
-+		struct flow_match_eth_addrs match;
-+
-+		pr_info("%s: ETH_ADDR\n", __func__);
-+		flow_rule_match_eth_addrs(rule, &match);
-+		ether_addr_copy(flow->rule.dmac, match.key->dst);
-+		ether_addr_copy(flow->rule.dmac_m, match.mask->dst);
-+		ether_addr_copy(flow->rule.smac, match.key->src);
-+		ether_addr_copy(flow->rule.smac_m, match.mask->src);
-+	}
-+
-+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
-+		struct flow_match_vlan match;
-+
-+		pr_info("%s: VLAN\n", __func__);
-+		flow_rule_match_vlan(rule, &match);
-+		flow->rule.itag = match.key->vlan_id;
-+		flow->rule.itag_m = match.mask->vlan_id;
-+		// TODO: What about match.key->vlan_priority ?
-+	}
-+
-+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_IPV4_ADDRS)) {
-+		struct flow_match_ipv4_addrs match;
-+
-+		pr_info("%s: IPV4\n", __func__);
-+		flow_rule_match_ipv4_addrs(rule, &match);
-+		flow->rule.is_ipv6 = false;
-+		flow->rule.dip = match.key->dst;
-+		flow->rule.dip_m = match.mask->dst;
-+		flow->rule.sip = match.key->src;
-+		flow->rule.sip_m = match.mask->src;
-+	} else if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_IPV6_ADDRS)) {
-+		struct flow_match_ipv6_addrs match;
-+
-+		pr_info("%s: IPV6\n", __func__);
-+		flow->rule.is_ipv6 = true;
-+		flow_rule_match_ipv6_addrs(rule, &match);
-+		flow->rule.dip6 = match.key->dst;
-+		flow->rule.dip6_m = match.mask->dst;
-+		flow->rule.sip6 = match.key->src;
-+		flow->rule.sip6_m = match.mask->src;
-+	}
-+
-+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
-+		struct flow_match_ports match;
-+
-+		pr_info("%s: PORTS\n", __func__);
-+		flow_rule_match_ports(rule, &match);
-+		flow->rule.dport = match.key->dst;
-+		flow->rule.dport_m = match.mask->dst;
-+		flow->rule.sport = match.key->src;
-+		flow->rule.sport_m = match.mask->src;
-+	}
-+
-+	// TODO: IPv6, ICMP
-+	return 0;
-+}
-+
-+static void rtl83xx_flow_bypass_all(struct rtl83xx_flow *flow)
-+{
-+	flow->rule.bypass_sel = true;
-+	flow->rule.bypass_all = true;
-+	flow->rule.bypass_igr_stp = true;
-+	flow->rule.bypass_ibc_sc = true;
-+}
-+
-+static int rtl83xx_parse_fwd(struct rtl838x_switch_priv *priv,
-+			     const struct flow_action_entry *act, struct rtl83xx_flow *flow)
-+{
-+	struct net_device *dev = act->dev;
-+	int port;
-+
-+	port = rtl83xx_port_is_under(dev, priv);
-+	if (port < 0) {
-+		netdev_info(dev, "%s: not a DSA device.\n", __func__);
-+		return -EINVAL;
-+	}
-+
-+	flow->rule.fwd_sel = true;
-+	flow->rule.fwd_data = port;
-+	pr_info("Using port index: %d\n", port);
-+	rtl83xx_flow_bypass_all(flow);
-+
-+	pr_info("%s: data: %04x\n", __func__, flow->rule.fwd_data);
-+	return 0;
-+}
-+
-+static int rtl83xx_add_flow(struct rtl838x_switch_priv *priv, struct flow_cls_offload *f,
-+			    struct rtl83xx_flow *flow)
-+{
-+	struct flow_rule *rule = flow_cls_offload_flow_rule(f);
-+	const struct flow_action_entry *act;
-+	int i, err;
-+
-+	pr_info("%s\n", __func__);
-+
-+	rtl83xx_parse_flow_rule(priv, rule, flow);
-+	
-+	flow_action_for_each(i, act, &rule->action) {
-+		switch (act->id) {
-+		case FLOW_ACTION_DROP:
-+			pr_info("%s: DROP\n", __func__);
-+			flow->rule.drop = true;
-+			rtl83xx_flow_bypass_all(flow);
-+			return 0;
-+
-+		case FLOW_ACTION_TRAP:
-+			pr_info("%s: TRAP\n", __func__);
-+			flow->rule.fwd_data = priv->cpu_port;
-+			flow->rule.fwd_act = PIE_ACT_REDIRECT_TO_PORT;
-+			rtl83xx_flow_bypass_all(flow);
-+			break;
-+
-+		case FLOW_ACTION_MANGLE:
-+			pr_info("%s: MANGLE\n", __func__);
-+			return -EOPNOTSUPP;
-+
-+		case FLOW_ACTION_ADD:
-+			pr_info("%s: ADD\n", __func__);
-+			return -EOPNOTSUPP;
-+
-+		case FLOW_ACTION_VLAN_PUSH:
-+			pr_info("%s: VLAN_PUSH\n", __func__);
-+//			TODO: act->vlan.proto
-+			flow->rule.ivid_act = PIE_ACT_VID_ASSIGN;
-+			flow->rule.ivid_sel = true;
-+			flow->rule.ivid_data = htons(act->vlan.vid);
-+			flow->rule.ovid_act = PIE_ACT_VID_ASSIGN;
-+			flow->rule.ovid_sel = true;
-+			flow->rule.ovid_data = htons(act->vlan.vid);
-+			flow->rule.fwd_mod_to_cpu = true;
-+			break;
-+
-+		case FLOW_ACTION_VLAN_POP:
-+			pr_info("%s: VLAN_POP\n", __func__);
-+			flow->rule.ivid_act = PIE_ACT_VID_ASSIGN;
-+			flow->rule.ivid_data = 0;
-+			flow->rule.ivid_sel = true;
-+			flow->rule.ovid_act = PIE_ACT_VID_ASSIGN;
-+			flow->rule.ovid_data = 0;
-+			flow->rule.ovid_sel = true;
-+			flow->rule.fwd_mod_to_cpu = true;
-+			break;
-+
-+		case FLOW_ACTION_CSUM:
-+			pr_info("%s: CSUM\n", __func__);
-+			return -EOPNOTSUPP;
-+
-+		case FLOW_ACTION_REDIRECT:
-+			pr_info("%s: REDIRECT\n", __func__);
-+			err = rtl83xx_parse_fwd(priv, act, flow);
-+			if (err)
-+				return err;
-+			flow->rule.fwd_act = PIE_ACT_REDIRECT_TO_PORT;
-+			break;
-+
-+		case FLOW_ACTION_MIRRED:
-+			pr_info("%s: MIRRED\n", __func__);
-+			err = rtl83xx_parse_fwd(priv, act, flow);
-+			if (err)
-+				return err;
-+			flow->rule.fwd_act = PIE_ACT_COPY_TO_PORT;
-+			break;
-+
-+		default:
-+			pr_info("%s: Flow action not supported: %d\n", __func__, act->id);
-+			return -EOPNOTSUPP;
-+		}
-+	}
-+
-+	return 0;
-+}
-+
-+static const struct rhashtable_params tc_ht_params = {
-+	.head_offset = offsetof(struct rtl83xx_flow, node),
-+	.key_offset = offsetof(struct rtl83xx_flow, cookie),
-+	.key_len = sizeof(((struct rtl83xx_flow *)0)->cookie),
-+	.automatic_shrinking = true,
-+};
-+
-+static int rtl83xx_configure_flower(struct rtl838x_switch_priv *priv,
-+				    struct flow_cls_offload *f)
-+{
-+	struct rtl83xx_flow *flow;
-+	int err = 0;
-+
-+	pr_info("In %s\n", __func__);
-+
-+	rcu_read_lock();
-+	pr_info("Cookie %08lx\n", f->cookie);
-+	flow = rhashtable_lookup(&priv->tc_ht, &f->cookie, tc_ht_params);
-+	if (flow) {
-+		pr_info("%s: Got flow\n", __func__);
-+		err = -EEXIST;
-+		goto rcu_unlock;
-+	}
-+
-+rcu_unlock:
-+	rcu_read_unlock();
-+	if (flow)
-+		goto out;
-+	pr_info("%s: New flow\n", __func__);
-+
-+	flow = kzalloc(sizeof(*flow), GFP_KERNEL);
-+	if (!flow) {
-+		err = -ENOMEM;
-+		goto out;
-+	}
-+
-+	flow->cookie = f->cookie;
-+	flow->priv = priv;
-+
-+	err = rhashtable_insert_fast(&priv->tc_ht, &flow->node, tc_ht_params);
-+	if (err) {
-+		pr_err("Could not insert add new rule\n");
-+		goto out_free;
-+	}
-+
-+	rtl83xx_add_flow(priv, f, flow); // TODO: check error
-+
-+	// Add log action to flow
-+	flow->rule.packet_cntr = rtl83xx_packet_cntr_alloc(priv);
-+	if (flow->rule.packet_cntr >= 0) {
-+		pr_info("Using packet counter %d\n", flow->rule.packet_cntr);
-+		flow->rule.log_sel = true;
-+		// BUG: Fix for other SoCs than 8380
-+		flow->rule.log_data = flow->rule.packet_cntr;
-+	}
-+
-+	return priv->r->pie_rule_add(priv, &flow->rule);
-+out_free:
-+	kfree(flow);
-+out:
-+	return err;
-+}
-+
-+static int rtl83xx_delete_flower(struct rtl838x_switch_priv *priv,
-+				 struct flow_cls_offload * cls_flower)
-+{
-+	struct rtl83xx_flow *flow;
-+
-+	pr_info("In %s\n", __func__);
-+	flow = rhashtable_lookup_fast(&priv->tc_ht, &cls_flower->cookie, tc_ht_params);
-+	if (!flow)
-+		return -EINVAL;
-+
-+	priv->r->pie_rule_rm(priv, &flow->rule);
-+
-+	// TODO: kfree
-+	// TODO: Unlink entry from hash-table, free rule-allocation
-+
-+	return 0;
-+}
-+
-+static int rtl83xx_stats_flower(struct rtl838x_switch_priv *priv,
-+				struct flow_cls_offload * cls_flower)
-+{
-+	struct rtl83xx_flow *flow;
-+	unsigned long lastused = 0;
-+	int total_packets, new_packets;
-+
-+	pr_info("In %s\n", __func__);
-+	
-+	flow = rhashtable_lookup_fast(&priv->tc_ht, &cls_flower->cookie, tc_ht_params);
-+	if (!flow)
-+		return -1;
-+
-+	if (flow->rule.packet_cntr >= 0) {
-+		total_packets = priv->r->packet_cntr_read(flow->rule.packet_cntr);
-+		pr_info("Total packets: %d\n", total_packets);
-+		new_packets = total_packets - flow->rule.last_packet_cnt;
-+		flow->rule.last_packet_cnt = total_packets;
-+	}
-+
-+	// TODO: We need a second PIE rule to count the bytes
-+	flow_stats_update(&cls_flower->stats, 100 * new_packets, new_packets, lastused);
-+	return 0;
-+}
-+
-+
-+static int rtl83xx_setup_tc_cls_flower(struct rtl838x_switch_priv *priv,
-+				       struct flow_cls_offload *cls_flower)
-+{
-+	pr_info("%s: %d\n", __func__, cls_flower->command);
-+	switch (cls_flower->command) {
-+	case FLOW_CLS_REPLACE:
-+		return rtl83xx_configure_flower(priv, cls_flower);
-+	case FLOW_CLS_DESTROY:
-+		return rtl83xx_delete_flower(priv, cls_flower);
-+	case FLOW_CLS_STATS:
-+		return rtl83xx_stats_flower(priv, cls_flower);
-+	default:
-+		return -EOPNOTSUPP;
-+	}
-+}
-+
-+
-+static int rtl83xx_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
-+				     void *cb_priv)
-+{
-+	struct rtl838x_switch_priv *priv = cb_priv;
-+
-+	pr_info("%s: %d\n", __func__, type);
-+	switch (type) {
-+	case TC_SETUP_CLSFLOWER:
-+		pr_info("%s: TC_SETUP_CLSFLOWER\n", __func__);
-+		return rtl83xx_setup_tc_cls_flower(priv, type_data);
-+	default:
-+		return -EOPNOTSUPP;
-+	}
-+}
-+
-+static LIST_HEAD(rtl83xx_block_cb_list);
-+
-+int rtl83xx_setup_tc(struct net_device *dev, enum tc_setup_type type, void *type_data)
-+{
-+	struct rtl838x_switch_priv *priv;
-+	struct flow_block_offload *f = type_data;
-+	static bool first_time = true;
-+	int err;
-+
-+	pr_info("%s: %d\n", __func__, type);
-+
-+	if(!netdev_uses_dsa(dev)) {
-+		pr_info("%s: no DSA\n", __func__);
-+		return 0;
-+	}
-+	priv = dev->dsa_ptr->ds->priv;
-+
-+	switch (type) {
-+	case TC_SETUP_BLOCK:
-+		pr_info("%s: setting up CB\n", __func__);
-+
-+		if (first_time) {
-+			pr_info("Initializing rhash\n");
-+			first_time = false;
-+			err = rhashtable_init(&priv->tc_ht, &tc_ht_params);
-+			if (err)
-+				pr_info("THAT DID NOT GO WELL\n");
-+		}
-+
-+		f->unlocked_driver_cb = true;
-+		return flow_block_cb_setup_simple(type_data,
-+						  &rtl83xx_block_cb_list,
-+						  rtl83xx_setup_tc_block_cb,
-+						  priv, priv, true);
-+	default:
-+		return -EOPNOTSUPP;
-+	}
-+
-+	return 0;
-+}
-diff --git a/target/linux/realtek/files-5.4/drivers/net/ethernet/rtl838x_eth.c b/target/linux/realtek/files-5.4/drivers/net/ethernet/rtl838x_eth.c
-index 2f678b7384..77438247ec 100644
---- a/target/linux/realtek/files-5.4/drivers/net/ethernet/rtl838x_eth.c
-+++ b/target/linux/realtek/files-5.4/drivers/net/ethernet/rtl838x_eth.c
-@@ -34,11 +34,11 @@ extern struct rtl83xx_soc_info soc_info;
-  * the memory used for the ring buffer.
-  */
- #define MAX_RXRINGS	32
--#define MAX_RXLEN	100
--#define MAX_ENTRIES	(200 * 8)
-+#define MAX_RXLEN	300
-+#define MAX_ENTRIES	(300 * 8)
- #define TXRINGS		2
- // BUG: TXRINGLEN can be 160
--#define TXRINGLEN	16
-+#define TXRINGLEN	160
- #define NOTIFY_EVENTS	10
- #define NOTIFY_BLOCKS	10
- #define TX_EN		0x8
-@@ -47,12 +47,18 @@ extern struct rtl83xx_soc_info soc_info;
- #define RX_EN_93XX	0x10
- #define TX_DO		0x2
- #define WRAP		0x2
-+#define MAX_PORTS	57
-+#define MAX_SMI_BUSSES	4
- 
- #define RING_BUFFER	1600
- 
- #define RTL838X_STORM_CTRL_PORT_BC_EXCEED	(0x470C)
- #define RTL838X_STORM_CTRL_PORT_MC_EXCEED	(0x4710)
- #define RTL838X_STORM_CTRL_PORT_UC_EXCEED	(0x4714)
-+
-+#define RTL839X_STORM_CTRL_PORT_BC_EXCEED	(0x180C)
-+#define RTL839X_STORM_CTRL_PORT_MC_EXCEED	(0x1814)
-+#define RTL839X_STORM_CTRL_PORT_UC_EXCEED	(0x181C)
- #define RTL838X_ATK_PRVNT_STS			(0x5B1C)
- 
- struct p_hdr {
-@@ -95,7 +101,7 @@ struct notify_b {
- 	u32			reserved2[8];
- };
- 
--void rtl838x_create_tx_header(struct p_hdr *h, int dest_port, int prio)
-+static void rtl838x_create_tx_header(struct p_hdr *h, int dest_port, int prio)
- {
- 	prio &= 0x7;
- 
-@@ -112,7 +118,7 @@ void rtl838x_create_tx_header(struct p_hdr *h, int dest_port, int prio)
- 	}
- }
- 
--void rtl839x_create_tx_header(struct p_hdr *h, int dest_port, int prio)
-+static void rtl839x_create_tx_header(struct p_hdr *h, int dest_port, int prio)
- {
- 	prio &= 0x7;
- 
-@@ -120,6 +126,7 @@ void rtl839x_create_tx_header(struct p_hdr *h, int dest_port, int prio)
- 		// cpu_tag[0] is reserved on the RTL83XX SoCs
- 		h->cpu_tag[1] = 0x0100;
- 		h->cpu_tag[2] = h->cpu_tag[3] = h->cpu_tag[4] = h->cpu_tag[5] = 0;
-+		// h->cpu_tag[1] |= BIT(1) | BIT(0); // Bypass filter 1/2
- 		if (dest_port >= 32) {
- 			dest_port -= 32;
- 			h->cpu_tag[2] = BIT(dest_port) >> 16;
-@@ -128,35 +135,49 @@ void rtl839x_create_tx_header(struct p_hdr *h, int dest_port, int prio)
- 			h->cpu_tag[4] = BIT(dest_port) >> 16;
- 			h->cpu_tag[5] = BIT(dest_port) & 0xffff;
- 		}
--		h->cpu_tag[6] |= BIT(21); // Enable destination port mask use
-+		h->cpu_tag[2] |= BIT(5); // Enable destination port mask use
- 		// Set internal priority and AS_PRIO
- 		if (prio >= 0)
- 			h->cpu_tag[1] |= prio | BIT(3);
- 	}
- }
- 
--void rtl930x_create_tx_header(struct p_hdr *h, int dest_port, int prio)
-+static void rtl930x_create_tx_header(struct p_hdr *h, int dest_port, int prio)
- {
- 	h->cpu_tag[0] = 0x8000;
--	h->cpu_tag[1] = 0;  // TODO: Fill port and prio
--	h->cpu_tag[2] = 0;
-+	h->cpu_tag[1] = h->cpu_tag[2] = 0;
-+	if (prio >= 0)
-+		h->cpu_tag[2] = BIT(13) | prio << 8; // Enable and set  Priority Queue
- 	h->cpu_tag[3] = 0;
- 	h->cpu_tag[4] = 0;
- 	h->cpu_tag[5] = 0;
--	h->cpu_tag[6] = 0;
--	h->cpu_tag[7] = 0xffff;
-+	h->cpu_tag[6] = BIT(dest_port) >> 16;
-+	h->cpu_tag[7] = BIT(dest_port) & 0xffff;
- }
- 
--void rtl931x_create_tx_header(struct p_hdr *h, int dest_port, int prio)
-+static void rtl931x_create_tx_header(struct p_hdr *h, int dest_port, int prio)
- {
- 	h->cpu_tag[0] = 0x8000;
--	h->cpu_tag[1] = 0;  // TODO: Fill port and prio
--	h->cpu_tag[2] = 0;
-+	h->cpu_tag[1] = h->cpu_tag[2] = 0;
-+	if (prio >= 0)
-+		h->cpu_tag[2] = BIT(13) | prio << 8; // Enable and set  Priority Queue
- 	h->cpu_tag[3] = 0;
--	h->cpu_tag[4] = 0;
--	h->cpu_tag[5] = 0;
--	h->cpu_tag[6] = 0;
--	h->cpu_tag[7] = 0xffff;
-+	h->cpu_tag[4] = h->cpu_tag[5] = h->cpu_tag[6] = h->cpu_tag[7] = 0;
-+	if (dest_port >= 32) {
-+		dest_port -= 32;
-+		h->cpu_tag[4] = BIT(dest_port) >> 16;
-+		h->cpu_tag[5] = BIT(dest_port) & 0xffff;
-+	} else {
-+		h->cpu_tag[6] = BIT(dest_port) >> 16;
-+		h->cpu_tag[7] = BIT(dest_port) & 0xffff;
-+	}
-+}
-+
-+static void rtl93xx_header_vlan_set(struct p_hdr *h, int vlan)
-+{
-+	h->cpu_tag[2] |= BIT(4); // Enable VLAN forwarding offload
-+	h->cpu_tag[2] |= (vlan >> 8) & 0xf;
-+	h->cpu_tag[3] |= (vlan & 0xff) << 8;
- }
- 
- struct rtl838x_rx_q {
-@@ -181,6 +202,9 @@ struct rtl838x_eth_priv {
- 	u32 lastEvent;
- 	u16 rxrings;
- 	u16 rxringlen;
-+	u8 smi_bus[MAX_PORTS];
-+	u8 smi_addr[MAX_PORTS];
-+	bool smi_bus_isc45[MAX_SMI_BUSSES];
- };
- 
- extern int rtl838x_phy_init(struct rtl838x_eth_priv *priv);
-@@ -234,57 +258,71 @@ struct dsa_tag {
- 	u16	port;
- 	u8	l2_offloaded;
- 	u8	prio;
-+	bool	crc_error;
- };
- 
- bool rtl838x_decode_tag(struct p_hdr *h, struct dsa_tag *t)
- {
- 	t->reason = h->cpu_tag[3] & 0xf;
--	if (t->reason != 15)
--	pr_debug("Reason: %d\n", t->reason);
- 	t->queue = (h->cpu_tag[0] & 0xe0) >> 5;
-+	t->port = h->cpu_tag[1] & 0x1f;
-+	t->crc_error = t->reason == 13;
-+
-+	pr_debug("Reason: %d\n", t->reason);
- 	if (t->reason != 4) // NIC_RX_REASON_SPECIAL_TRAP
- 		t->l2_offloaded = 1;
- 	else
- 		t->l2_offloaded = 0;
--	t->port = h->cpu_tag[1] & 0x1f;
- 
- 	return t->l2_offloaded;
- }
- 
- bool rtl839x_decode_tag(struct p_hdr *h, struct dsa_tag *t)
- {
--	t->reason = h->cpu_tag[4] & 0x1f;
--	if (t->reason != 31)
-+	t->reason = h->cpu_tag[5] & 0x1f;
-+	t->queue = (h->cpu_tag[3] & 0xe000) >> 13;
-+	t->port = h->cpu_tag[1] & 0x3f;
-+	t->crc_error = h->cpu_tag[3] & BIT(2);
-+
- 	pr_debug("Reason: %d\n", t->reason);
--		t->queue = (h->cpu_tag[3] & 0xe000) >> 13;
--	if ((t->reason != 7) && (t->reason != 8)) // NIC_RX_REASON_RMA_USR
--		t->l2_offloaded = 1;
--	else
-+	if ((t->reason >= 7 && t->reason <= 13) || // NIC_RX_REASON_RMA
-+	    (t->reason >= 23 && t->reason <= 25))  // NIC_RX_REASON_SPECIAL_TRAP
- 		t->l2_offloaded = 0;
--	
--	t->port = h->cpu_tag[1] & 0x3f;
-+	else
-+		t->l2_offloaded = 1;
- 
- 	return t->l2_offloaded;
- }
- 
--bool rtl931x_decode_tag(struct p_hdr *h, struct dsa_tag *t)
-+bool rtl930x_decode_tag(struct p_hdr *h, struct dsa_tag *t)
- {
- 	t->reason = h->cpu_tag[7] & 0x3f;
--	pr_debug("Reason %d\n", t->reason);
- 	t->queue =  (h->cpu_tag[2] >> 11) & 0x1f;
-+	t->port = (h->cpu_tag[0] >> 8) & 0x1f;
-+	t->crc_error = h->cpu_tag[1] & BIT(6);
-+
-+	pr_debug("Reason %d, port %d, queue %d\n", t->reason, t->port, t->queue);
- 	if (t->reason >= 19 && t->reason <= 27)
- 		t->l2_offloaded = 0;
- 	else
- 		t->l2_offloaded = 1;
--	t->port = (h->cpu_tag[0] >> 8) & 0x3f;
- 
- 	return t->l2_offloaded;
- }
- 
--bool rtl930x_decode_tag(struct p_hdr *h, struct dsa_tag *t)
-+bool rtl931x_decode_tag(struct p_hdr *h, struct dsa_tag *t)
- {
--	rtl931x_decode_tag(h, t);
--	t->port &= 0x1f;
-+	t->reason = h->cpu_tag[7] & 0x3f;
-+	t->queue =  (h->cpu_tag[2] >> 11) & 0x1f;
-+	t->port = (h->cpu_tag[0] >> 8) & 0x3f;
-+	t->crc_error = h->cpu_tag[1] & BIT(6);
-+
-+	pr_debug("Reason %d, port %d, queue %d\n", t->reason, t->port, t->queue);
-+	if (t->reason >= 19 && t->reason <= 27)
-+		t->l2_offloaded = 0;
-+	else
-+		t->l2_offloaded = 1;
-+
- 	return t->l2_offloaded;
- }
- 
-@@ -398,21 +436,48 @@ static irqreturn_t rtl83xx_net_irq(int irq, void *dev_id)
- 	bool triggered = false;
- 	u32 atk = sw_r32(RTL838X_ATK_PRVNT_STS);
- 	int i;
--	u32 storm_uc = sw_r32(RTL838X_STORM_CTRL_PORT_UC_EXCEED);
--	u32 storm_mc = sw_r32(RTL838X_STORM_CTRL_PORT_MC_EXCEED);
--	u32 storm_bc = sw_r32(RTL838X_STORM_CTRL_PORT_BC_EXCEED);
--
--	pr_debug("IRQ: %08x\n", status);
--	if (storm_uc || storm_mc || storm_bc) {
--		pr_warn("Storm control UC: %08x, MC: %08x, BC: %08x\n",
--			storm_uc, storm_mc, storm_bc);
--
--		sw_w32(storm_uc, RTL838X_STORM_CTRL_PORT_UC_EXCEED);
--		sw_w32(storm_mc, RTL838X_STORM_CTRL_PORT_MC_EXCEED);
--		sw_w32(storm_bc, RTL838X_STORM_CTRL_PORT_BC_EXCEED);
--
--		triggered = true;
-+#if 0
-+	/*
-+	 * this code is wrong in many points. first. the register has a per port offset. so this code here checks only the content of port 0
-+	 * second, the registers are different for each chipset. remove this code for now since it does not make any sense at all 
-+	 */
-+	u32 storm_uc = 0;
-+	u32 storm_mc = 0;
-+	u32 storm_bc = 0;
-+	if (priv->family_id == RTL8390_FAMILY_ID) {
-+		storm_uc = sw_r32(RTL839X_STORM_CTRL_PORT_UC_EXCEED);
-+		storm_mc = sw_r32(RTL839X_STORM_CTRL_PORT_MC_EXCEED);
-+		storm_bc = sw_r32(RTL839X_STORM_CTRL_PORT_BC_EXCEED);
-+		pr_debug("IRQ: %08x\n", status);
-+		if (storm_uc || storm_mc || storm_bc) {
-+			pr_warn("Storm control UC: %08x, MC: %08x, BC: %08x\n",
-+				storm_uc, storm_mc, storm_bc);
-+	
-+			sw_w32(storm_uc, RTL839X_STORM_CTRL_PORT_UC_EXCEED);
-+			sw_w32(storm_mc, RTL839X_STORM_CTRL_PORT_MC_EXCEED);
-+			sw_w32(storm_bc, RTL839X_STORM_CTRL_PORT_BC_EXCEED);
-+	
-+			triggered = true;
-+		}
- 	}
-+	if (priv->family_id == RTL8380_FAMILY_ID) {
-+		storm_uc = sw_r32(RTL838X_STORM_CTRL_PORT_UC_EXCEED);
-+		storm_mc = sw_r32(RTL838X_STORM_CTRL_PORT_MC_EXCEED);
-+		storm_bc = sw_r32(RTL838X_STORM_CTRL_PORT_BC_EXCEED);
-+		pr_debug("IRQ: %08x\n", status);
-+		if (storm_uc || storm_mc || storm_bc) {
-+			pr_warn("Storm control UC: %08x, MC: %08x, BC: %08x\n",
-+				storm_uc, storm_mc, storm_bc);
-+	
-+			sw_w32(storm_uc, RTL838X_STORM_CTRL_PORT_UC_EXCEED);
-+			sw_w32(storm_mc, RTL838X_STORM_CTRL_PORT_MC_EXCEED);
-+			sw_w32(storm_bc, RTL838X_STORM_CTRL_PORT_BC_EXCEED);
-+	
-+			triggered = true;
-+		}
-+	}
-+#endif
-+
- 
- 	if (atk) {
- 		pr_debug("Attack prevention triggered: %08x\n", atk);
-@@ -441,7 +506,7 @@ static irqreturn_t rtl83xx_net_irq(int irq, void *dev_id)
- 
- 	/* RX buffer overrun */
- 	if (status & 0x000ff) {
--		pr_info("RX buffer overrun: status %x, mask: %x\n",
-+		pr_debug("RX buffer overrun: status %x, mask: %x\n",
- 			 status, sw_r32(priv->r->dma_if_intr_msk));
- 		sw_w32(status, priv->r->dma_if_intr_sts);
- 		rtl838x_rb_cleanup(priv, status & 0xff);
-@@ -731,8 +796,9 @@ static void rtl838x_hw_en_rxtx(struct rtl838x_eth_priv *priv)
- 	 * | MEDIA_SEL
- 	 */
- 	sw_w32(0x6192F, priv->r->mac_force_mode_ctrl + priv->cpu_port * 4);
--	/* allow CRC errors on CPU-port */
--	sw_w32_mask(0, 0x8, priv->r->mac_port_ctrl(priv->cpu_port));
-+
-+	/* Enable CRC checks on CPU-port */
-+	sw_w32_mask(0, BIT(3), priv->r->mac_port_ctrl(priv->cpu_port));
- }
- 
- static void rtl839x_hw_en_rxtx(struct rtl838x_eth_priv *priv)
-@@ -746,8 +812,8 @@ static void rtl839x_hw_en_rxtx(struct rtl838x_eth_priv *priv)
- 	/* Enable DMA */
- 	sw_w32_mask(0, RX_EN | TX_EN, priv->r->dma_if_ctrl);
- 
--	/* Restart TX/RX to CPU port */
--	sw_w32_mask(0x0, 0x3, priv->r->mac_port_ctrl(priv->cpu_port));
-+	/* Restart TX/RX to CPU port, enable CRC checking */
-+	sw_w32_mask(0x0, 0x3 | BIT(3), priv->r->mac_port_ctrl(priv->cpu_port));
- 
- 	/* CPU port joins Lookup Miss Flooding Portmask */
- 	// TODO: The code below should also work for the RTL838x
-@@ -784,8 +850,8 @@ static void rtl93xx_hw_en_rxtx(struct rtl838x_eth_priv *priv)
- 	/* Enable DMA */
- 	sw_w32_mask(0, RX_EN_93XX | TX_EN_93XX, priv->r->dma_if_ctrl);
- 
--	/* Restart TX/RX to CPU port */
--	sw_w32_mask(0x0, 0x3, priv->r->mac_port_ctrl(priv->cpu_port));
-+	/* Restart TX/RX to CPU port, enable CRC checking */
-+	sw_w32_mask(0x0, 0x3 | BIT(4), priv->r->mac_port_ctrl(priv->cpu_port));
- 
- 	sw_w32_mask(0, BIT(priv->cpu_port), RTL930X_L2_UNKN_UC_FLD_PMSK);
- 	sw_w32(0x217, priv->r->mac_force_mode_ctrl + priv->cpu_port * 4);
-@@ -883,28 +949,30 @@ static int rtl838x_eth_open(struct net_device *ndev)
- 	switch (priv->family_id) {
- 	case RTL8380_FAMILY_ID:
- 		rtl838x_hw_en_rxtx(priv);
--		/* Trap IGMP traffic to CPU-Port */
-+		/* Trap IGMP/MLD traffic to CPU-Port */
- 		sw_w32(0x3, RTL838X_SPCL_TRAP_IGMP_CTRL);
- 		/* Flush learned FDB entries on link down of a port */
- 		sw_w32_mask(0, BIT(7), RTL838X_L2_CTRL_0);
- 		break;
-+
- 	case RTL8390_FAMILY_ID:
- 		rtl839x_hw_en_rxtx(priv);
-+		// Trap MLD and IGMP messages to CPU_PORT
- 		sw_w32(0x3, RTL839X_SPCL_TRAP_IGMP_CTRL);
- 		/* Flush learned FDB entries on link down of a port */
- 		sw_w32_mask(0, BIT(7), RTL839X_L2_CTRL_0);
- 		break;
-+
- 	case RTL9300_FAMILY_ID:
- 		rtl93xx_hw_en_rxtx(priv);
- 		/* Flush learned FDB entries on link down of a port */
- 		sw_w32_mask(0, BIT(7), RTL930X_L2_CTRL);
--		sw_w32_mask(BIT(28), 0, RTL930X_L2_PORT_SABLK_CTRL);
--		sw_w32_mask(BIT(28), 0, RTL930X_L2_PORT_DABLK_CTRL);
-+		// Trap MLD and IGMP messages to CPU_PORT
-+		sw_w32((0x2 << 3) | 0x2,  RTL930X_VLAN_APP_PKT_CTRL);
- 		break;
- 
- 	case RTL9310_FAMILY_ID:
- 		rtl93xx_hw_en_rxtx(priv);
--//		TODO: Add trapping of IGMP frames to CPU-port
- 		break;
- 	}
- 
-@@ -1111,19 +1179,22 @@ static int rtl838x_eth_tx(struct sk_buff *skb, struct net_device *dev)
- 	spin_lock_irqsave(&priv->lock, flags);
- 	len = skb->len;
- 
-+	pr_debug("SEND: %08x %08x %08x %08x %08x present %d, vp %04x vt %04x\n",
-+		*((u32 *)skb->data), *((u32 *)skb->data + 1), *((u32 *)skb->data + 2),
-+		*((u32 *)skb->data + 3), *((u32 *)skb->data + 4),
-+		skb->vlan_present, skb->vlan_proto, skb->vlan_tci
-+	);
- 	/* Check for DSA tagging at the end of the buffer */
- 	if (netdev_uses_dsa(dev) && skb->data[len-4] == 0x80 && skb->data[len-3] > 0
--			&& skb->data[len-3] < 28 &&  skb->data[len-2] == 0x10
-+			&& skb->data[len-3] < priv->cpu_port &&  skb->data[len-2] == 0x10
- 			&&  skb->data[len-1] == 0x00) {
--		/* Reuse tag space for CRC */
-+		/* Reuse tag space for CRC if possible */
- 		dest_port = skb->data[len-3];
-+		skb->data[len-4] = skb->data[len-3] = skb->data[len-2] = skb->data[len-1] = 0x00;
- 		len -= 4;
- 	}
--	if (len < ETH_ZLEN)
--		len = ETH_ZLEN;
- 
--	/* ASIC expects that packet includes CRC, so we extend by 4 bytes */
--	len += 4;
-+	len += 4; // Add space for CRC
- 
- 	if (skb_padto(skb, len)) {
- 		ret = NETDEV_TX_OK;
-@@ -1137,6 +1208,11 @@ static int rtl838x_eth_tx(struct sk_buff *skb, struct net_device *dev)
- 		h = &ring->tx_header[q][ring->c_tx[q]];
- 		h->size = len;
- 		h->len = len;
-+		// On RTL8380 SoCs, the packet length being sent needs adjustment
-+		if (priv->family_id == RTL8380_FAMILY_ID) {
-+			if (len < ETH_ZLEN - 4)
-+				h->len -= 4;
-+		}
- 
- 		priv->r->create_tx_header(h, dest_port, skb->priority >> 1);
- 
-@@ -1264,6 +1340,7 @@ static int rtl838x_hw_receive(struct net_device *dev, int r, int budget)
- 			/* Make sure data is visible */
- 			mb();
- 			memcpy(skb->data, (u8 *)KSEG1ADDR(data), len);
-+
- 			/* Overwrite CRC with cpu_tag */
- 			if (dsa) {
- 				priv->r->decode_tag(h, &tag);
-@@ -1280,6 +1357,12 @@ static int rtl838x_hw_receive(struct net_device *dev, int r, int budget)
- 					 tag.queue, len, tag.reason, tag.port);
- 
- 			skb->protocol = eth_type_trans(skb, dev);
-+			if (dev->features & NETIF_F_RXCSUM) {
-+				if (tag.crc_error)
-+					skb_checksum_none_assert(skb);
-+				else
-+					skb->ip_summed = CHECKSUM_UNNECESSARY;
-+			}
- 			dev->stats.rx_packets++;
- 			dev->stats.rx_bytes += len;
- 
-@@ -1596,7 +1679,7 @@ static int rtl930x_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
- 
- 	// TODO: These are hard-coded for the 2 Fibre Ports of the XGS1210
- 	if (mii_id >= 26 && mii_id <= 27)
--		return rtl930x_read_sds_phy(mii_id - 18, 0, regnum);
-+		return rtl930x_read_sds_phy(mii_id - 23, 0, regnum);
- 
- 	if (regnum & MII_ADDR_C45) {
- 		regnum &= ~MII_ADDR_C45;
-@@ -1719,52 +1802,54 @@ static int rtl930x_mdio_reset(struct mii_bus *bus)
- {
- 	int i;
- 	int pos;
-+	struct rtl838x_eth_priv *priv = bus->priv;
-+	u32 c45_mask = 0;
-+	u32 poll_sel[2];
-+	u32 poll_ctrl = 0;
- 
--	pr_info("RTL930X_SMI_PORT0_15_POLLING_SEL %08x 16-27: %08x\n",
--		sw_r32(RTL930X_SMI_PORT0_15_POLLING_SEL),
--		sw_r32(RTL930X_SMI_PORT16_27_POLLING_SEL));
--
--	pr_info("%s: Enable SMI polling on SMI bus 0, SMI1, SMI2, disable on SMI3\n", __func__);
--	sw_w32_mask(BIT(20) | BIT(21) | BIT(22), BIT(23), RTL930X_SMI_GLB_CTRL);
--
--	pr_info("RTL9300 Powering on SerDes ports\n");
--	rtl9300_sds_power(24, 1);
--	rtl9300_sds_power(25, 1);
--	rtl9300_sds_power(26, 1);
--	rtl9300_sds_power(27, 1);
--	mdelay(200);
--
--	// RTL930X_SMI_PORT0_15_POLLING_SEL 55550000 16-27: 00f9aaaa
--	// i.e SMI=0 for all ports
--	for (i = 0; i < 5; i++)
--		pr_info("port phy: %08x\n", sw_r32(RTL930X_SMI_PORT0_5_ADDR + i *4));
--
--	// 1-to-1 mapping of port to phy-address
--	for (i = 0; i < 24; i++) {
-+	// Mapping of port to phy-addresses on an SMI bus
-+	poll_sel[0] = poll_sel[1] = 0;
-+	for (i = 0; i < 28; i++) {
- 		pos = (i % 6) * 5;
--		sw_w32_mask(0x1f << pos, i << pos, RTL930X_SMI_PORT0_5_ADDR + (i / 6) * 4);
-+		sw_w32_mask(0x1f << pos, priv->smi_addr[i] << pos,
-+			    RTL930X_SMI_PORT0_5_ADDR + (i / 6) * 4);
-+
-+		pos = (i * 2) % 32;
-+		poll_sel[i / 16] |= priv->smi_bus[i] << pos;
-+		poll_ctrl |= BIT(20 + priv->smi_bus[i]);
- 	}
- 
--	// ports 24 and 25 have PHY addresses 8 and 9, ports 26/27 PHY 26/27
--	sw_w32(8 | 9 << 5 | 26 << 10 | 27 << 15, RTL930X_SMI_PORT0_5_ADDR + 4 * 4);
-+	// Configure which SMI bus is behind which port number
-+	sw_w32(poll_sel[0], RTL930X_SMI_PORT0_15_POLLING_SEL);
-+	sw_w32(poll_sel[1], RTL930X_SMI_PORT16_27_POLLING_SEL);
- 
--	// Ports 24 and 25 live on SMI bus 1 and 2
--	sw_w32_mask(0x3 << 16, 0x1 << 16, RTL930X_SMI_PORT16_27_POLLING_SEL);
--	sw_w32_mask(0x3 << 18, 0x2 << 18, RTL930X_SMI_PORT16_27_POLLING_SEL);
-+	// Enable polling on the respective SMI busses
-+	sw_w32_mask(0, poll_ctrl, RTL930X_SMI_GLB_CTRL);
- 
--	// SMI bus 1 and 2 speak Clause 45 TODO: Configure from .dts
--	sw_w32_mask(0, BIT(17) | BIT(18), RTL930X_SMI_GLB_CTRL);
-+	// Configure which SMI busses are polled in c45 based on a c45 PHY being on that bus
-+	for (i = 0; i < 4; i++)
-+		if (priv->smi_bus_isc45[i])
-+			c45_mask |= BIT(i + 16);
-+
-+	pr_info("c45_mask: %08x\n", c45_mask);
-+	sw_w32_mask(0, c45_mask, RTL930X_SMI_GLB_CTRL);
- 
- 	// Ports 24 and 25 are 2.5 Gig, set this type (1)
- 	sw_w32_mask(0x7 << 12, 1 << 12, RTL930X_SMI_MAC_TYPE_CTRL);
- 	sw_w32_mask(0x7 << 15, 1 << 15, RTL930X_SMI_MAC_TYPE_CTRL);
-+	// Ports 26 and 27 are 10 Gig SerDes, set this type (0)
-+	sw_w32_mask(0x7 << 18, 0, RTL930X_SMI_MAC_TYPE_CTRL);
-+	sw_w32_mask(0x7 << 21, 0, RTL930X_SMI_MAC_TYPE_CTRL);
-+
-+	// TODO: Set up RTL9300_SMI_10GPHY_POLLING_SEL_0_ADDR for Aquantia PHYs on 1250
- 
- 	return 0;
- }
- 
- static int rtl838x_mdio_init(struct rtl838x_eth_priv *priv)
- {
--	struct device_node *mii_np;
-+	struct device_node *mii_np, *dn;
-+	u32 pn;
- 	int ret;
- 
- 	pr_debug("%s called\n", __func__);
-@@ -1817,6 +1902,28 @@ static int rtl838x_mdio_init(struct rtl838x_eth_priv *priv)
- 	priv->mii_bus->priv = priv;
- 	priv->mii_bus->parent = &priv->pdev->dev;
- 
-+	for_each_node_by_name(dn, "ethernet-phy") {
-+		u32 smi_addr[2];
-+
-+		if (of_property_read_u32(dn, "reg", &pn))
-+			continue;
-+
-+		if (of_property_read_u32_array(dn, "rtl9300,smi-address", &smi_addr[0], 2)) {
-+			smi_addr[0] = 0;
-+			smi_addr[1] = pn;
-+		}
-+
-+		if (pn < MAX_PORTS) {
-+			priv->smi_bus[pn] = smi_addr[0];
-+			priv->smi_addr[pn] = smi_addr[1];
-+		} else {
-+			pr_err("%s: illegal port number %d\n", __func__, pn);
-+		}
-+
-+		if (of_device_is_compatible(dn, "ethernet-phy-ieee802.3-c45"))
-+			priv->smi_bus_isc45[smi_addr[0]] = true;
-+	}
-+
- 	snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%pOFn", mii_np);
- 	ret = of_mdiobus_register(priv->mii_bus, mii_np);
- 
-@@ -1837,6 +1944,40 @@ static int rtl838x_mdio_remove(struct rtl838x_eth_priv *priv)
- 	return 0;
- }
- 
-+static netdev_features_t rtl838x_fix_features(struct net_device *dev,
-+					  netdev_features_t features)
-+{
-+	return features;
-+}
-+
-+static int rtl83xx_set_features(struct net_device *dev, netdev_features_t features)
-+{
-+	struct rtl838x_eth_priv *priv = netdev_priv(dev);
-+
-+	if ((features ^ dev->features) & NETIF_F_RXCSUM) {
-+		if (!(features & NETIF_F_RXCSUM))
-+			sw_w32_mask(BIT(3), 0, priv->r->mac_port_ctrl(priv->cpu_port));
-+		else
-+			sw_w32_mask(0, BIT(4), priv->r->mac_port_ctrl(priv->cpu_port));
-+	}
-+
-+	return 0;
-+}
-+
-+static int rtl93xx_set_features(struct net_device *dev, netdev_features_t features)
-+{
-+	struct rtl838x_eth_priv *priv = netdev_priv(dev);
-+
-+	if ((features ^ dev->features) & NETIF_F_RXCSUM) {
-+		if (!(features & NETIF_F_RXCSUM))
-+			sw_w32_mask(BIT(4), 0, priv->r->mac_port_ctrl(priv->cpu_port));
-+		else
-+			sw_w32_mask(0, BIT(4), priv->r->mac_port_ctrl(priv->cpu_port));
-+	}
-+
-+	return 0;
-+}
-+
- static const struct net_device_ops rtl838x_eth_netdev_ops = {
- 	.ndo_open = rtl838x_eth_open,
- 	.ndo_stop = rtl838x_eth_stop,
-@@ -1846,6 +1987,9 @@ static const struct net_device_ops rtl838x_eth_netdev_ops = {
- 	.ndo_validate_addr = eth_validate_addr,
- 	.ndo_set_rx_mode = rtl838x_eth_set_multicast_list,
- 	.ndo_tx_timeout = rtl838x_eth_tx_timeout,
-+	.ndo_set_features = rtl83xx_set_features,
-+	.ndo_fix_features = rtl838x_fix_features,
-+	.ndo_setup_tc = rtl83xx_setup_tc,
- };
- 
- static const struct net_device_ops rtl839x_eth_netdev_ops = {
-@@ -1857,6 +2001,9 @@ static const struct net_device_ops rtl839x_eth_netdev_ops = {
- 	.ndo_validate_addr = eth_validate_addr,
- 	.ndo_set_rx_mode = rtl839x_eth_set_multicast_list,
- 	.ndo_tx_timeout = rtl838x_eth_tx_timeout,
-+	.ndo_set_features = rtl83xx_set_features,
-+	.ndo_fix_features = rtl838x_fix_features,
-+	.ndo_setup_tc = rtl83xx_setup_tc,
- };
- 
- static const struct net_device_ops rtl930x_eth_netdev_ops = {
-@@ -1868,6 +2015,9 @@ static const struct net_device_ops rtl930x_eth_netdev_ops = {
- 	.ndo_validate_addr = eth_validate_addr,
- 	.ndo_set_rx_mode = rtl930x_eth_set_multicast_list,
- 	.ndo_tx_timeout = rtl838x_eth_tx_timeout,
-+	.ndo_set_features = rtl93xx_set_features,
-+	.ndo_fix_features = rtl838x_fix_features,
-+	.ndo_setup_tc = rtl83xx_setup_tc,
- };
- 
- static const struct net_device_ops rtl931x_eth_netdev_ops = {
-@@ -1879,6 +2029,8 @@ static const struct net_device_ops rtl931x_eth_netdev_ops = {
- 	.ndo_validate_addr = eth_validate_addr,
- 	.ndo_set_rx_mode = rtl931x_eth_set_multicast_list,
- 	.ndo_tx_timeout = rtl838x_eth_tx_timeout,
-+	.ndo_set_features = rtl93xx_set_features,
-+	.ndo_fix_features = rtl838x_fix_features,
- };
- 
- static const struct phylink_mac_ops rtl838x_phylink_ops = {
-@@ -1901,11 +2053,11 @@ static int __init rtl838x_eth_probe(struct platform_device *pdev)
- 	struct device_node *dn = pdev->dev.of_node;
- 	struct rtl838x_eth_priv *priv;
- 	struct resource *res, *mem;
--	const void *mac;
- 	phy_interface_t phy_mode;
- 	struct phylink *phylink;
- 	int err = 0, i, rxrings, rxringlen;
- 	struct ring_b *ring;
-+	const void *mac;
- 
- 	pr_info("Probing RTL838X eth device pdev: %x, dev: %x\n",
- 		(u32)pdev, (u32)(&(pdev->dev)));
-@@ -1947,7 +2099,7 @@ static int __init rtl838x_eth_probe(struct platform_device *pdev)
- 		err = -ENXIO;
- 		goto err_free;
- 	}
--
-+	pr_info("Allocate %ld bytes for DMA\n", rxrings * rxringlen * RING_BUFFER + sizeof(struct ring_b) + sizeof(struct notify_b));
- 	/* Allocate buffer memory */
- 	priv->membase = dmam_alloc_coherent(&pdev->dev, rxrings * rxringlen * RING_BUFFER
- 				+ sizeof(struct ring_b) + sizeof(struct notify_b),
-@@ -1975,6 +2127,8 @@ static int __init rtl838x_eth_probe(struct platform_device *pdev)
- 	dev->ethtool_ops = &rtl838x_ethtool_ops;
- 	dev->min_mtu = ETH_ZLEN;
- 	dev->max_mtu = 1536;
-+	dev->features = NETIF_F_RXCSUM | NETIF_F_HW_CSUM;
-+	dev->hw_features = NETIF_F_RXCSUM;
- 
- 	priv->id = soc_info.id;
- 	priv->family_id = soc_info.family;
-diff --git a/target/linux/realtek/files-5.4/drivers/net/ethernet/rtl838x_eth.h b/target/linux/realtek/files-5.4/drivers/net/ethernet/rtl838x_eth.h
-index d7b4317cbb..d2691bfaf5 100644
---- a/target/linux/realtek/files-5.4/drivers/net/ethernet/rtl838x_eth.h
-+++ b/target/linux/realtek/files-5.4/drivers/net/ethernet/rtl838x_eth.h
-@@ -177,6 +177,7 @@
- #define RTL839X_RMA_CTRL_2			(0x1208)
- #define RTL839X_RMA_CTRL_3			(0x120C)
- 
-+#define RTL930X_VLAN_APP_PKT_CTRL		(0xA23C)
- #define RTL930X_RMA_CTRL_0			(0x9E60)
- #define RTL930X_RMA_CTRL_1			(0x9E64)
- #define RTL930X_RMA_CTRL_2			(0x9E68)
-@@ -423,6 +424,6 @@ int rtl930x_write_phy(u32 port, u32 page, u32 reg, u32 val);
- int rtl930x_read_phy(u32 port, u32 page, u32 reg, u32 *val);
- int rtl931x_write_phy(u32 port, u32 page, u32 reg, u32 val);
- int rtl931x_read_phy(u32 port, u32 page, u32 reg, u32 *val);
--void rtl9300_sds_power(int sds_num, int val);
-+int rtl83xx_setup_tc(struct net_device *dev, enum tc_setup_type type, void *type_data);
- 
- #endif /* _RTL838X_ETH_H */
-diff --git a/target/linux/realtek/files-5.4/drivers/net/phy/rtl83xx-phy.c b/target/linux/realtek/files-5.4/drivers/net/phy/rtl83xx-phy.c
-index 78953c6d17..2143fbe44f 100644
---- a/target/linux/realtek/files-5.4/drivers/net/phy/rtl83xx-phy.c
-+++ b/target/linux/realtek/files-5.4/drivers/net/phy/rtl83xx-phy.c
-@@ -14,16 +14,38 @@
- #include <asm/mach-rtl838x/mach-rtl83xx.h>
- #include "rtl83xx-phy.h"
- 
-+#define PHY_CTRL_REG	0
-+#define PHY_POWER_BIT	11
-+
-+#define PHY_PAGE_2	2
-+#define PHY_PAGE_4	4
-+#define PARK_PAGE	0x1f
-+
-+#define RTL9300_PHY_ID_MASK 0xf0ffffff
- 
- extern struct rtl83xx_soc_info soc_info;
- extern struct mutex smi_lock;
- 
-+/*
-+ * This lock protects the state of the SoC automatically polling the PHYs over the SMI
-+ * bus to detect e.g. link and media changes. For operations on the PHYs such as
-+ * patching or other configuration changes such as EEE, polling needs to be disabled
-+ * since otherwise these operations may fails or lead to unpredictable results.
-+ */
-+DEFINE_MUTEX(poll_lock);
-+
- static const struct firmware rtl838x_8380_fw;
- static const struct firmware rtl838x_8214fc_fw;
- static const struct firmware rtl838x_8218b_fw;
- 
-+int rtl838x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val);
-+int rtl838x_write_mmd_phy(u32 port, u32 devnum, u32 reg, u32 val);
-+int rtl839x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val);
-+int rtl839x_write_mmd_phy(u32 port, u32 devnum, u32 reg, u32 val);
- int rtl930x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val);
--int rtl930x_write_mmd_phy(u32 port, u32 addr, u32 reg, u32 val);
-+int rtl930x_write_mmd_phy(u32 port, u32 devnum, u32 reg, u32 val);
-+int rtl931x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val);
-+int rtl931x_write_mmd_phy(u32 port, u32 devnum, u32 reg, u32 val);
- 
- static int read_phy(u32 port, u32 page, u32 reg, u32 *val)
- {	switch (soc_info.family) {
-@@ -54,6 +76,93 @@ static int write_phy(u32 port, u32 page, u32 reg, u32 val)
- 	return -1;
- }
- 
-+static int read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val)
-+{
-+	switch (soc_info.family) {
-+	case RTL8380_FAMILY_ID:
-+		return rtl838x_read_mmd_phy(port, devnum, regnum, val);
-+	case RTL8390_FAMILY_ID:
-+		return rtl839x_read_mmd_phy(port, devnum, regnum, val);
-+	case RTL9300_FAMILY_ID:
-+		return rtl930x_read_mmd_phy(port, devnum, regnum, val);
-+	case RTL9310_FAMILY_ID:
-+		return rtl931x_read_mmd_phy(port, devnum, regnum, val);
-+	}
-+	return -1;
-+}
-+
-+int write_mmd_phy(u32 port, u32 devnum, u32 reg, u32 val)
-+{
-+	switch (soc_info.family) {
-+	case RTL8380_FAMILY_ID:
-+		return rtl838x_write_mmd_phy(port, devnum, reg, val);
-+	case RTL8390_FAMILY_ID:
-+		return rtl839x_write_mmd_phy(port, devnum, reg, val);
-+	case RTL9300_FAMILY_ID:
-+		return rtl930x_write_mmd_phy(port, devnum, reg, val);
-+	case RTL9310_FAMILY_ID:
-+		return rtl931x_write_mmd_phy(port, devnum, reg, val);
-+	}
-+	return -1;
-+}
-+
-+static u64 disable_polling(int port)
-+{
-+	u64 saved_state;
-+
-+	mutex_lock(&poll_lock);
-+
-+	switch (soc_info.family) {
-+	case RTL8380_FAMILY_ID:
-+		saved_state = sw_r32(RTL838X_SMI_POLL_CTRL);
-+		sw_w32_mask(BIT(port), 0, RTL838X_SMI_POLL_CTRL);
-+		break;
-+	case RTL8390_FAMILY_ID:
-+		saved_state = sw_r32(RTL839X_SMI_PORT_POLLING_CTRL + 4);
-+		saved_state <<= 32;
-+		saved_state |= sw_r32(RTL839X_SMI_PORT_POLLING_CTRL);
-+		sw_w32_mask(BIT(port % 32), 0,
-+			    RTL839X_SMI_PORT_POLLING_CTRL + ((port >> 5) << 2));
-+		break;
-+	case RTL9300_FAMILY_ID:
-+		saved_state = sw_r32(RTL930X_SMI_POLL_CTRL);
-+		sw_w32_mask(BIT(port), 0, RTL930X_SMI_POLL_CTRL);
-+		break;
-+	case RTL9310_FAMILY_ID:
-+		pr_warn("%s not implemented for RTL931X\n", __func__);
-+		break;
-+	}
-+
-+	mutex_unlock(&poll_lock);
-+
-+	return saved_state;
-+}
-+
-+static int resume_polling(u64 saved_state)
-+{
-+	mutex_lock(&poll_lock);
-+
-+	switch (soc_info.family) {
-+	case RTL8380_FAMILY_ID:
-+		sw_w32(saved_state, RTL838X_SMI_POLL_CTRL);
-+		break;
-+	case RTL8390_FAMILY_ID:
-+		sw_w32(saved_state >> 32, RTL839X_SMI_PORT_POLLING_CTRL + 4);
-+		sw_w32(saved_state, RTL839X_SMI_PORT_POLLING_CTRL);
-+		break;
-+	case RTL9300_FAMILY_ID:
-+		sw_w32(saved_state, RTL930X_SMI_POLL_CTRL);
-+		break;
-+	case RTL9310_FAMILY_ID:
-+		pr_warn("%s not implemented for RTL931X\n", __func__);
-+		break;
-+	}
-+
-+	mutex_unlock(&poll_lock);
-+
-+	return 0;
-+}
-+
- static void rtl8380_int_phy_on_off(int mac, bool on)
- {
- 	u32 val;
-@@ -94,18 +203,6 @@ static void rtl8380_phy_reset(int mac)
- 	write_phy(mac, 0, 0, val | BIT(15));
- }
- 
--static void rtl8380_sds_rst(int mac)
--{
--	u32 offset = (mac == 24) ? 0 : 0x100;
--
--	sw_w32_mask(1 << 11, 0, RTL8380_SDS4_FIB_REG0 + offset);
--	sw_w32_mask(0x3, 0, RTL838X_SDS4_REG28 + offset);
--	sw_w32_mask(0x3, 0x3, RTL838X_SDS4_REG28 + offset);
--	sw_w32_mask(0, 0x1 << 6, RTL838X_SDS4_DUMMY0 + offset);
--	sw_w32_mask(0x1 << 6, 0, RTL838X_SDS4_DUMMY0 + offset);
--	pr_info("SERDES reset: %d\n", mac);
--}
--
- /*
-  * Reset the SerDes by powering it off and set a new operations mode
-  * of the SerDes. 0x1f is off. Other modes are
-@@ -134,7 +231,7 @@ void rtl9300_sds_rst(int sds_num, u32 mode)
- 	sw_w32_mask(0x1f << lsb[sds_num], mode << lsb[sds_num], regs[sds_num]);
- 	mdelay(10);
- 
--	pr_info("SDS: 194:%08x 198:%08x 2a0:%08x 2a4:%08x\n",
-+	pr_info("SDS_MODE_SEL_0: %08x SDS_MODE_SEL_1: %08x SDS_MODE_SEL_2: %08x SDS_MODE_SEL_3: %08x\n",
- 		sw_r32(0x194), sw_r32(0x198), sw_r32(0x2a0), sw_r32(0x2a4));
- }
- 
-@@ -187,7 +284,7 @@ int rtl930x_read_sds_phy(int phy_addr, int page, int phy_reg)
- 	int i;
- 	u32 cmd = phy_addr << 2 | page << 7 | phy_reg << 13 | 1;
- 
--	pr_info("%s: phy_addr %d, phy_reg: %d\n", __func__, phy_addr, phy_reg);
-+	pr_debug("%s: phy_addr(SDS-ID) %d, phy_reg: %d\n", __func__, phy_addr, phy_reg);
- 	sw_w32(cmd, RTL930X_SDS_INDACS_CMD);
- 
- 	for (i = 0; i < 100; i++) {
-@@ -199,7 +296,7 @@ int rtl930x_read_sds_phy(int phy_addr, int page, int phy_reg)
- 	if (i >= 100)
- 		return -EIO;
- 
--	pr_info("%s: returning %04x\n", __func__, sw_r32(RTL930X_SDS_INDACS_DATA) & 0xffff);
-+	pr_debug("%s: returning %04x\n", __func__, sw_r32(RTL930X_SDS_INDACS_DATA) & 0xffff);
- 	return sw_r32(RTL930X_SDS_INDACS_DATA) & 0xffff;
- }
- 
-@@ -307,6 +404,7 @@ static int rtl8393_read_status(struct phy_device *phydev)
- 
- 	return err;
- }
-+
- static int rtl8226_read_page(struct phy_device *phydev)
- {
- 	return __phy_read(phydev, 0x1f);
-@@ -331,20 +429,20 @@ static int rtl8226_read_status(struct phy_device *phydev)
- 
- 	// Link status must be read twice
- 	for (i = 0; i < 2; i++) {
--		rtl930x_read_mmd_phy(port, MMD_VEND2, 0xA402, &val);
-+		read_mmd_phy(port, MMD_VEND2, 0xA402, &val);
- 	}
- 	phydev->link = val & BIT(2) ? 1 : 0;
- 	if (!phydev->link)
- 		goto out;
- 
- 	// Read duplex status
--	ret = rtl930x_read_mmd_phy(port, MMD_VEND2, 0xA434, &val);
-+	ret = read_mmd_phy(port, MMD_VEND2, 0xA434, &val);
- 	if (ret)
- 		goto out;
- 	phydev->duplex = !!(val & BIT(3));
- 
- 	// Read speed
--	ret = rtl930x_read_mmd_phy(port, MMD_VEND2, 0xA434, &val);
-+	ret = read_mmd_phy(port, MMD_VEND2, 0xA434, &val);
- 	switch (val & 0x0630) {
- 	case 0x0000:
- 		phydev->speed = SPEED_10;
-@@ -371,7 +469,7 @@ out:
- 	return ret;
- }
- 
--static int rtl8266_advertise_aneg(struct phy_device *phydev)
-+static int rtl8226_advertise_aneg(struct phy_device *phydev)
- {
- 	int ret = 0;
- 	u32 v;
-@@ -379,7 +477,7 @@ static int rtl8266_advertise_aneg(struct phy_device *phydev)
- 
- 	pr_info("In %s\n", __func__);
- 
--	ret = rtl930x_read_mmd_phy(port, MMD_AN, 16, &v);
-+	ret = read_mmd_phy(port, MMD_AN, 16, &v);
- 	if (ret)
- 		goto out;
- 
-@@ -388,31 +486,30 @@ static int rtl8266_advertise_aneg(struct phy_device *phydev)
- 	v |= BIT(7); // HD 100M
- 	v |= BIT(8); // FD 100M
- 
--	ret = rtl930x_write_mmd_phy(port, MMD_AN, 16, v);
-+	ret = write_mmd_phy(port, MMD_AN, 16, v);
- 
- 	// Allow 1GBit
--	ret = rtl930x_read_mmd_phy(port, MMD_VEND2, 0xA412, &v);
-+	ret = read_mmd_phy(port, MMD_VEND2, 0xA412, &v);
- 	if (ret)
- 		goto out;
- 	v |= BIT(9); // FD 1000M
- 
--	ret = rtl930x_write_mmd_phy(port, MMD_VEND2, 0xA412, v);
-+	ret = write_mmd_phy(port, MMD_VEND2, 0xA412, v);
- 	if (ret)
- 		goto out;
- 
- 	// Allow 2.5G
--	ret = rtl930x_read_mmd_phy(port, MMD_AN, 32, &v);
-+	ret = read_mmd_phy(port, MMD_AN, 32, &v);
- 	if (ret)
- 		goto out;
- 
- 	v |= BIT(7);
--	ret = rtl930x_write_mmd_phy(port, MMD_AN, 32, v);
-+	ret = write_mmd_phy(port, MMD_AN, 32, v);
- 
- out:
- 	return ret;
- }
- 
--
- static int rtl8226_config_aneg(struct phy_device *phydev)
- {
- 	int ret = 0;
-@@ -421,26 +518,26 @@ static int rtl8226_config_aneg(struct phy_device *phydev)
- 
- 	pr_info("In %s\n", __func__);
- 	if (phydev->autoneg == AUTONEG_ENABLE) {
--		ret = rtl8266_advertise_aneg(phydev);
-+		ret = rtl8226_advertise_aneg(phydev);
- 		if (ret)
- 			goto out;
- 		// AutoNegotiationEnable
--		ret = rtl930x_read_mmd_phy(port, MMD_AN, 0, &v);
-+		ret = read_mmd_phy(port, MMD_AN, 0, &v);
- 		if (ret)
- 			goto out;
- 
- 		v |= BIT(12); // Enable AN
--		ret = rtl930x_write_mmd_phy(port, MMD_AN, 0, v);
-+		ret = write_mmd_phy(port, MMD_AN, 0, v);
- 		if (ret)
- 			goto out;
- 
- 		// RestartAutoNegotiation
--		ret = rtl930x_read_mmd_phy(port, MMD_VEND2, 0xA400, &v);
-+		ret = read_mmd_phy(port, MMD_VEND2, 0xA400, &v);
- 		if (ret)
- 			goto out;
- 		v |= BIT(9);
- 
--		ret = rtl930x_write_mmd_phy(port, MMD_VEND2, 0xA400, v);
-+		ret = write_mmd_phy(port, MMD_VEND2, 0xA400, v);
- 	}
- 
- 	pr_info("%s: Ret is already: %d\n", __func__, ret);
-@@ -451,6 +548,68 @@ out:
- 	return ret;
- }
- 
-+static int rtl8226_get_eee(struct phy_device *phydev,
-+				     struct ethtool_eee *e)
-+{
-+	u32 val;
-+	int addr = phydev->mdio.addr;
-+
-+	pr_debug("In %s, port %d, was enabled: %d\n", __func__, addr, e->eee_enabled);
-+
-+	read_mmd_phy(addr, MMD_AN, 60, &val);
-+	if (e->eee_enabled) {
-+		e->eee_enabled = !!(val & BIT(1));
-+		if (!e->eee_enabled) {
-+			read_mmd_phy(addr, MMD_AN, 62, &val);
-+			e->eee_enabled = !!(val & BIT(0));
-+		}
-+	}
-+	pr_debug("%s: enabled: %d\n", __func__, e->eee_enabled);
-+
-+	return 0;
-+}
-+
-+static int rtl8226_set_eee(struct phy_device *phydev, struct ethtool_eee *e)
-+{
-+	int port = phydev->mdio.addr;
-+	u64 poll_state;
-+	bool an_enabled;
-+	u32 val;
-+
-+	pr_info("In %s, port %d, enabled %d\n", __func__, port, e->eee_enabled);
-+
-+	poll_state = disable_polling(port);
-+
-+	// Remember aneg state
-+	read_mmd_phy(port, MMD_AN, 0, &val);
-+	an_enabled = !!(val & BIT(12));
-+
-+	// Setup 100/1000MBit
-+	read_mmd_phy(port, MMD_AN, 60, &val);
-+	if (e->eee_enabled)
-+		val |= 0x6;
-+	else
-+		val &= 0x6;
-+	write_mmd_phy(port, MMD_AN, 60, val);
-+
-+	// Setup 2.5GBit
-+	read_mmd_phy(port, MMD_AN, 62, &val);
-+	if (e->eee_enabled)
-+		val |= 0x1;
-+	else
-+		val &= 0x1;
-+	write_mmd_phy(port, MMD_AN, 62, val);
-+
-+	// RestartAutoNegotiation
-+	read_mmd_phy(port, MMD_VEND2, 0xA400, &val);
-+	val |= BIT(9);
-+	write_mmd_phy(port, MMD_VEND2, 0xA400, val);
-+
-+	resume_polling(poll_state);
-+
-+	return 0;
-+}
-+
- static struct fw_header *rtl838x_request_fw(struct phy_device *phydev,
- 					    const struct firmware *fw,
- 					    const char *name)
-@@ -750,79 +909,6 @@ static int rtl8218b_ext_match_phy_device(struct phy_device *phydev)
- 		return phydev->phy_id == PHY_ID_RTL8218B_E;
- }
- 
--/*
-- * Read an mmd register of the PHY
-- */
--static int rtl83xx_read_mmd_phy(u32 port, u32 addr, u32 reg, u32 *val)
--{
--	u32 v;
--
--	mutex_lock(&smi_lock);
--
--	if (rtl838x_smi_wait_op(10000))
--		goto timeout;
--
--	sw_w32(1 << port, RTL838X_SMI_ACCESS_PHY_CTRL_0);
--	mdelay(10);
--
--	sw_w32_mask(0xffff0000, port << 16, RTL838X_SMI_ACCESS_PHY_CTRL_2);
--
--	v = addr << 16 | reg;
--	sw_w32(v, RTL838X_SMI_ACCESS_PHY_CTRL_3);
--
--	/* mmd-access | read | cmd-start */
--	v = 1 << 1 | 0 << 2 | 1;
--	sw_w32(v, RTL838X_SMI_ACCESS_PHY_CTRL_1);
--
--	if (rtl838x_smi_wait_op(10000))
--		goto timeout;
--
--	*val = sw_r32(RTL838X_SMI_ACCESS_PHY_CTRL_2) & 0xffff;
--
--	mutex_unlock(&smi_lock);
--	return 0;
--
--timeout:
--	mutex_unlock(&smi_lock);
--	return -ETIMEDOUT;
--}
--
--/*
-- * Write to an mmd register of the PHY
-- */
--static int rtl838x_write_mmd_phy(u32 port, u32 addr, u32 reg, u32 val)
--{
--	u32 v;
--
--	pr_debug("MMD write: port %d, dev %d, reg %d, val %x\n", port, addr, reg, val);
--	val &= 0xffff;
--	mutex_lock(&smi_lock);
--
--	if (rtl838x_smi_wait_op(10000))
--		goto timeout;
--
--	sw_w32(1 << port, RTL838X_SMI_ACCESS_PHY_CTRL_0);
--	mdelay(10);
--
--	sw_w32_mask(0xffff0000, val << 16, RTL838X_SMI_ACCESS_PHY_CTRL_2);
--
--	sw_w32_mask(0x1f << 16, addr << 16, RTL838X_SMI_ACCESS_PHY_CTRL_3);
--	sw_w32_mask(0xffff, reg, RTL838X_SMI_ACCESS_PHY_CTRL_3);
--	/* mmd-access | write | cmd-start */
--	v = 1 << 1 | 1 << 2 | 1;
--	sw_w32(v, RTL838X_SMI_ACCESS_PHY_CTRL_1);
--
--	if (rtl838x_smi_wait_op(10000))
--		goto timeout;
--
--	mutex_unlock(&smi_lock);
--	return 0;
--
--timeout:
--	mutex_unlock(&smi_lock);
--	return -ETIMEDOUT;
--}
--
- static int rtl8218b_read_mmd(struct phy_device *phydev,
- 				     int devnum, u16 regnum)
- {
-@@ -830,7 +916,7 @@ static int rtl8218b_read_mmd(struct phy_device *phydev,
- 	u32 val;
- 	int addr = phydev->mdio.addr;
- 
--	ret = rtl83xx_read_mmd_phy(addr, devnum, regnum, &val);
-+	ret = read_mmd_phy(addr, devnum, regnum, &val);
- 	if (ret)
- 		return ret;
- 	return val;
-@@ -850,8 +936,7 @@ static int rtl8226_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
- 	int err;
- 	u32 val;
- 
--	err = rtl930x_read_mmd_phy(port, devnum, regnum, &val);
--
-+	err = read_mmd_phy(port, devnum, regnum, &val);
- 	if (err)
- 		return err;
- 	return val;
-@@ -861,7 +946,7 @@ static int rtl8226_write_mmd(struct phy_device *phydev, int devnum, u16 regnum,
- {
- 	int port = phydev->mdio.addr; // the SoC translates port addresses to PHY addr
- 
--	return rtl930x_write_mmd_phy(port, devnum, regnum, val);
-+	return write_mmd_phy(port, devnum, regnum, val);
- }
- 
- static void rtl8380_rtl8214fc_media_set(int mac, bool set_fibre)
-@@ -957,90 +1042,85 @@ static int rtl8214fc_get_port(struct phy_device *phydev)
- 	return PORT_MII;
- }
- 
--static void rtl8218b_eee_set_u_boot(int port, bool enable)
-+void rtl8218d_reset(int port)
- {
--	u32 val;
--	bool an_enabled;
-+	u32 v, tmp;
- 
--	/* Set GPHY page to copper */
--	write_phy(port, 0, 30, 0x0001);
--	read_phy(port, 0, 0, &val);
--	an_enabled = val & (1 << 12);
-+	// Port must be a base port-id for the PHY-block
-+	if (port % 8)
-+		return;
- 
--	if (enable) {
--		/* 100/1000M EEE Capability */
--		write_phy(port, 0, 13, 0x0007);
--		write_phy(port, 0, 14, 0x003C);
--		write_phy(port, 0, 13, 0x4007);
--		write_phy(port, 0, 14, 0x0006);
-+	if (read_phy(port, 0, 30, &v))
-+		return;
- 
--		read_phy(port, 0x0A43, 25, &val);
--		val |= 1 << 4;
--		write_phy(port, 0x0A43, 25, val);
--	} else {
--		/* 100/1000M EEE Capability */
--		write_phy(port, 0, 13, 0x0007);
--		write_phy(port, 0, 14, 0x003C);
--		write_phy(port, 0, 13, 0x0007);
--		write_phy(port, 0, 14, 0x0000);
-+	write_phy(port, 0, 30, 8);
- 
--		read_phy(port, 0x0A43, 25, &val);
--		val &= ~(1 << 4);
--		write_phy(port, 0x0A43, 25, val);
--	}
-+	/* Reset SerDes 0 */
- 
--	/* Restart AN if enabled */
--	if (an_enabled) {
--		read_phy(port, 0, 0, &val);
--		val |= (1 << 12) | (1 << 9);
--		write_phy(port, 0, 0, val);
-+	/* Bit 0: SP_SDS_EN_TX, Bit 1: SP_SDS_EN_RX; */
-+	read_phy(port, 0x400, 0x10, &tmp);
-+	tmp &= ~0x3;
-+	write_phy(port, 0x400, 0x10, tmp);
-+
-+	read_phy(port, 0x400, 0x10, &tmp);
-+	tmp |= ~0x3;
-+	write_phy(port, 0x400, 0x10, tmp);
-+
-+	// Check for QSGMII SerDes 1 reset
-+	read_phy(port, 0x260, 18, &tmp);
-+	if ((tmp & 0xf0) == 0xd0) {
-+		read_phy(port, 0x500, 0x10, &tmp);
-+		tmp &= ~0x3;
-+		write_phy(port, 0x500, 0x10, tmp);
-+
-+		read_phy(port, 0x500, 0x10, &tmp);
-+		tmp |= ~0x3;
-+		write_phy(port, 0x500, 0x10, tmp);
- 	}
- 
--	/* GPHY page back to auto*/
--	write_phy(port, 0xa42, 29, 0);
-+	write_phy(port, 0, 30, v);
- }
- 
--// TODO: unused
--void rtl8380_rtl8218b_eee_set(int port, bool enable)
-+/*
-+ * Enable EEE on the RTL8218B PHYs
-+ * The method used is not the preferred way (which would be based on the MAC-EEE state,
-+ * but the only way that works since the kernel first enables EEE in the MAC
-+ * and then sets up the PHY. The MAC-based approach would require the oppsite.
-+ */
-+void rtl8218d_eee_set(int port, bool enable)
- {
- 	u32 val;
- 	bool an_enabled;
- 
- 	pr_debug("In %s %d, enable %d\n", __func__, port, enable);
- 	/* Set GPHY page to copper */
--	write_phy(port, 0xa42, 29, 0x0001);
-+	write_phy(port, 0xa42, 30, 0x0001);
- 
- 	read_phy(port, 0, 0, &val);
--	an_enabled = val & (1 << 12);
--
--	/* MAC based EEE */
--	read_phy(port, 0xa43, 25, &val);
--	val &= ~(1 << 5);
--	write_phy(port, 0xa43, 25, val);
-+	an_enabled = val & BIT(12);
- 
--	/* 100M / 1000M EEE */
--	if (enable)
--		rtl838x_write_mmd_phy(port, 7, 60, 0x6);
--	else
--		rtl838x_write_mmd_phy(port, 7, 60, 0);
-+	/* Enable 100M (bit 1) / 1000M (bit 2) EEE */
-+	read_mmd_phy(port, 7, 60, &val);
-+	val |= BIT(2) | BIT(1);
-+	write_mmd_phy(port, 7, 60, enable ? 0x6 : 0);
- 
- 	/* 500M EEE ability */
- 	read_phy(port, 0xa42, 20, &val);
- 	if (enable)
--		val |= 1 << 7;
-+		val |= BIT(7);
- 	else
--		val &= ~(1 << 7);
-+		val &= ~BIT(7);
- 	write_phy(port, 0xa42, 20, val);
- 
- 	/* Restart AN if enabled */
- 	if (an_enabled) {
- 		read_phy(port, 0, 0, &val);
--		val |= (1 << 12) | (1 << 9);
-+		val |= BIT(9);
- 		write_phy(port, 0, 0, val);
- 	}
- 
- 	/* GPHY page back to auto*/
--	write_phy(port, 0xa42, 29, 0);
-+	write_phy(port, 0xa42, 30, 0);
- }
- 
- static int rtl8218b_get_eee(struct phy_device *phydev,
-@@ -1049,16 +1129,21 @@ static int rtl8218b_get_eee(struct phy_device *phydev,
- 	u32 val;
- 	int addr = phydev->mdio.addr;
- 
--	pr_debug("In %s, port %d\n", __func__, addr);
-+	pr_debug("In %s, port %d, was enabled: %d\n", __func__, addr, e->eee_enabled);
- 
- 	/* Set GPHY page to copper */
- 	write_phy(addr, 0xa42, 29, 0x0001);
- 
--	rtl83xx_read_mmd_phy(addr, 7, 60, &val);
--	if (e->eee_enabled && (!!(val & (1 << 7))))
--		e->eee_enabled = !!(val & (1 << 7));
--	else
--		e->eee_enabled = 0;
-+	read_phy(addr, 7, 60, &val);
-+	if (e->eee_enabled) {
-+		// Verify vs MAC-based EEE
-+		e->eee_enabled = !!(val & BIT(7));
-+		if (!e->eee_enabled) {
-+			read_phy(addr, 0x0A43, 25, &val);
-+			e->eee_enabled = !!(val & BIT(4));
-+		}
-+	}
-+	pr_debug("%s: enabled: %d\n", __func__, e->eee_enabled);
- 
- 	/* GPHY page to auto */
- 	write_phy(addr, 0xa42, 29, 0x0000);
-@@ -1066,49 +1151,24 @@ static int rtl8218b_get_eee(struct phy_device *phydev,
- 	return 0;
- }
- 
--// TODO: unused
--void rtl8380_rtl8218b_green_set(int mac, bool enable)
--{
--	u32 val;
--
--	/* Set GPHY page to copper */
--	write_phy(mac, 0xa42, 29, 0x0001);
--
--	write_phy(mac, 0, 27, 0x8011);
--	read_phy(mac, 0, 28, &val);
--	if (enable) {
--		val |= 1 << 9;
--		write_phy(mac, 0, 27, 0x8011);
--		write_phy(mac, 0, 28, val);
--	} else {
--		val &= ~(1 << 9);
--		write_phy(mac, 0, 27, 0x8011);
--		write_phy(mac, 0, 28, val);
--	}
--
--	/* GPHY page to auto */
--	write_phy(mac, 0xa42, 29, 0x0000);
--}
--
--// TODO: unused
--int rtl8380_rtl8214fc_get_green(struct phy_device *phydev, struct ethtool_eee *e)
-+static int rtl8218d_get_eee(struct phy_device *phydev,
-+				     struct ethtool_eee *e)
- {
- 	u32 val;
- 	int addr = phydev->mdio.addr;
- 
--	pr_debug("In %s %d\n", __func__, addr);
-+	pr_debug("In %s, port %d, was enabled: %d\n", __func__, addr, e->eee_enabled);
-+
- 	/* Set GPHY page to copper */
--	write_phy(addr, 0xa42, 29, 0x0001);
-+	write_phy(addr, 0xa42, 30, 0x0001);
- 
--	write_phy(addr, 0, 27, 0x8011);
--	read_phy(addr, 0, 28, &val);
--	if (e->eee_enabled && (!!(val & (1 << 9))))
--		e->eee_enabled = !!(val & (1 << 9));
--	else
--		e->eee_enabled = 0;
-+	read_phy(addr, 7, 60, &val);
-+	if (e->eee_enabled)
-+		e->eee_enabled = !!(val & BIT(7));
-+	pr_debug("%s: enabled: %d\n", __func__, e->eee_enabled);
- 
- 	/* GPHY page to auto */
--	write_phy(addr, 0xa42, 29, 0x0000);
-+	write_phy(addr, 0xa42, 30, 0x0000);
- 
- 	return 0;
- }
-@@ -1116,20 +1176,56 @@ int rtl8380_rtl8214fc_get_green(struct phy_device *phydev, struct ethtool_eee *e
- static int rtl8214fc_set_eee(struct phy_device *phydev,
- 				     struct ethtool_eee *e)
- {
--	u32 pollMask;
--	int addr = phydev->mdio.addr;
-+	u32 poll_state;
-+	int port = phydev->mdio.addr;
-+	bool an_enabled;
-+	u32 val;
- 
--	pr_debug("In %s port %d, enabled %d\n", __func__, addr, e->eee_enabled);
-+	pr_debug("In %s port %d, enabled %d\n", __func__, port, e->eee_enabled);
- 
--	if (rtl8380_rtl8214fc_media_is_fibre(addr)) {
--		netdev_err(phydev->attached_dev, "Port %d configured for FIBRE", addr);
-+	if (rtl8380_rtl8214fc_media_is_fibre(port)) {
-+		netdev_err(phydev->attached_dev, "Port %d configured for FIBRE", port);
- 		return -ENOTSUPP;
- 	}
- 
--	pollMask = sw_r32(RTL838X_SMI_POLL_CTRL);
--	sw_w32(0, RTL838X_SMI_POLL_CTRL);
--	rtl8218b_eee_set_u_boot(addr, (bool) e->eee_enabled);
--	sw_w32(pollMask, RTL838X_SMI_POLL_CTRL);
-+	poll_state = disable_polling(port);
-+
-+	/* Set GPHY page to copper */
-+	write_phy(port, 0xa42, 29, 0x0001);
-+
-+	// Get auto-negotiation status
-+	read_phy(port, 0, 0, &val);
-+	an_enabled = val & BIT(12);
-+
-+	pr_info("%s: aneg: %d\n", __func__, an_enabled);
-+	read_phy(port, 0x0A43, 25, &val);
-+	val &= ~BIT(5);  // Use MAC-based EEE
-+	write_phy(port, 0x0A43, 25, val);
-+
-+	/* Enable 100M (bit 1) / 1000M (bit 2) EEE */
-+	write_phy(port, 7, 60, e->eee_enabled ? 0x6 : 0);
-+
-+	/* 500M EEE ability */
-+	read_phy(port, 0xa42, 20, &val);
-+	if (e->eee_enabled)
-+		val |= BIT(7);
-+	else
-+		val &= ~BIT(7);
-+	write_phy(port, 0xa42, 20, val);
-+
-+	/* Restart AN if enabled */
-+	if (an_enabled) {
-+		pr_info("%s: doing aneg\n", __func__);
-+		read_phy(port, 0, 0, &val);
-+		val |= BIT(9);
-+		write_phy(port, 0, 0, val);
-+	}
-+
-+	/* GPHY page back to auto*/
-+	write_phy(port, 0xa42, 29, 0);
-+
-+	resume_polling(poll_state);
-+
- 	return 0;
- }
- 
-@@ -1147,18 +1243,72 @@ static int rtl8214fc_get_eee(struct phy_device *phydev,
- 	return rtl8218b_get_eee(phydev, e);
- }
- 
--static int rtl8218b_set_eee(struct phy_device *phydev,
--				     struct ethtool_eee *e)
-+static int rtl8218b_set_eee(struct phy_device *phydev, struct ethtool_eee *e)
-+{
-+	int port = phydev->mdio.addr;
-+	u64 poll_state;
-+	u32 val;
-+	bool an_enabled;
-+
-+	pr_info("In %s, port %d, enabled %d\n", __func__, port, e->eee_enabled);
-+
-+	poll_state = disable_polling(port);
-+
-+	/* Set GPHY page to copper */
-+	write_phy(port, 0, 30, 0x0001);
-+	read_phy(port, 0, 0, &val);
-+	an_enabled = val & BIT(12);
-+
-+	if (e->eee_enabled) {
-+		/* 100/1000M EEE Capability */
-+		write_phy(port, 0, 13, 0x0007);
-+		write_phy(port, 0, 14, 0x003C);
-+		write_phy(port, 0, 13, 0x4007);
-+		write_phy(port, 0, 14, 0x0006);
-+
-+		read_phy(port, 0x0A43, 25, &val);
-+		val |= BIT(4);
-+		write_phy(port, 0x0A43, 25, val);
-+	} else {
-+		/* 100/1000M EEE Capability */
-+		write_phy(port, 0, 13, 0x0007);
-+		write_phy(port, 0, 14, 0x003C);
-+		write_phy(port, 0, 13, 0x0007);
-+		write_phy(port, 0, 14, 0x0000);
-+
-+		read_phy(port, 0x0A43, 25, &val);
-+		val &= ~BIT(4);
-+		write_phy(port, 0x0A43, 25, val);
-+	}
-+
-+	/* Restart AN if enabled */
-+	if (an_enabled) {
-+		read_phy(port, 0, 0, &val);
-+		val |= BIT(9);
-+		write_phy(port, 0, 0, val);
-+	}
-+
-+	/* GPHY page back to auto*/
-+	write_phy(port, 0xa42, 30, 0);
-+
-+	pr_info("%s done\n", __func__);
-+	resume_polling(poll_state);
-+
-+	return 0;
-+}
-+
-+static int rtl8218d_set_eee(struct phy_device *phydev, struct ethtool_eee *e)
- {
--	u32 pollMask;
- 	int addr = phydev->mdio.addr;
-+	u64 poll_state;
- 
--	pr_debug("In %s, port %d, enabled %d\n", __func__, addr, e->eee_enabled);
-+	pr_info("In %s, port %d, enabled %d\n", __func__, addr, e->eee_enabled);
- 
--	pollMask = sw_r32(RTL838X_SMI_POLL_CTRL);
--	sw_w32(0, RTL838X_SMI_POLL_CTRL);
--	rtl8218b_eee_set_u_boot(addr, (bool) e->eee_enabled);
--	sw_w32(pollMask, RTL838X_SMI_POLL_CTRL);
-+	poll_state = disable_polling(addr);
-+
-+	rtl8218d_eee_set(addr, (bool) e->eee_enabled);
-+
-+	resume_polling(poll_state);
- 
- 	return 0;
- }
-@@ -1490,14 +1640,441 @@ static int rtl8390_configure_serdes(struct phy_device *phydev)
- 	return 0;
- }
- 
-+void rtl9300_sds_field_w(int sds, u32 page, u32 reg, int end_bit, int start_bit, u32 v)
-+{
-+	int l = end_bit - start_bit - 1;
-+	u32 data = v;
-+
-+	if (l < 32) {
-+		u32 mask = BIT(l) - 1;
-+
-+		data = rtl930x_read_sds_phy(sds, page, reg);
-+		data &= ~(mask << start_bit);
-+		data |= (v & mask) << start_bit;
-+	}
-+
-+	rtl930x_write_sds_phy(sds, page, reg, data);
-+}
-+
-+
-+u32 rtl9300_sds_field_r(int sds, u32 page, u32 reg, int end_bit, int start_bit)
-+{
-+	int l = end_bit - start_bit - 1;
-+	u32 v = rtl930x_read_sds_phy(sds, page, reg);
-+
-+	if (l >= 32)
-+		return v;
-+
-+	return (v >> start_bit) & (BIT(l) - 1);
-+}
-+
-+/*
-+ * Force PHY modes on 10GBit Serdes
-+ */
-+void rtl9300_force_sds_mode(int sds, phy_interface_t phy_if)
-+{
-+	int sds_mode;
-+	bool lc_on;
-+	int i, lc_value;
-+	int lane_0 = (sds % 2) ? sds - 1 : sds;
-+	u32 v, cr_0, cr_1, cr_2;
-+	u32 m_bit, l_bit;
-+
-+	pr_info("%s: SDS: %d, mode %d\n", __func__, sds, phy_if);
-+	switch (phy_if) {
-+	case PHY_INTERFACE_MODE_SGMII:
-+		sds_mode = 0x2;
-+		lc_on = false;
-+		lc_value = 0x1;
-+		break;
-+
-+	case PHY_INTERFACE_MODE_HSGMII:
-+		sds_mode = 0x12;
-+		lc_value = 0x3;
-+		// Configure LC
-+		break;
-+
-+	case PHY_INTERFACE_MODE_1000BASEX:
-+		sds_mode = 0x04;
-+		lc_on = false;
-+		break;
-+
-+	case PHY_INTERFACE_MODE_2500BASEX:
-+		sds_mode = 0x16;
-+		lc_value = 0x3;
-+		// Configure LC
-+		break;
-+
-+	case PHY_INTERFACE_MODE_10GKR:
-+		sds_mode = 0x1a;
-+		lc_on = true;
-+		lc_value = 0x5;
-+		break;
-+
-+	case PHY_INTERFACE_MODE_NA:
-+		// This will disable SerDes
-+		break;
-+
-+	default:
-+		pr_err("%s: unknown serdes mode: %s\n",
-+		       __func__, phy_modes(phy_if));
-+		return;
-+	}
-+
-+	// Power down SerDes
-+	rtl9300_sds_field_w(sds, 0x0, 0, 7, 6, 0x3);
-+
-+	// Force mode enable
-+	rtl9300_sds_field_w(sds, 0x1f, 9, 6, 6, 0x1);
-+
-+	/* SerDes off */
-+	rtl9300_sds_field_w(sds, 0x1f, 9, 11, 7, 0x1f);
-+
-+	if (phy_if == PHY_INTERFACE_MODE_NA)
-+		return;
-+
-+	// Enable LC and ring
-+	rtl9300_sds_field_w(lane_0, 0x20, 18, 3, 0, 0xf);
-+
-+	if (sds == lane_0)
-+		rtl9300_sds_field_w(lane_0, 0x20, 18, 5, 4, 0x1);
-+	else
-+		rtl9300_sds_field_w(lane_0, 0x20, 18, 7, 6, 0x1);
-+
-+	rtl9300_sds_field_w(sds, 0x20, 0, 5, 4, 0x3);
-+
-+	if(lc_on)
-+		rtl9300_sds_field_w(lane_0, 0x20, 18, 11, 8, lc_value);
-+	else
-+		rtl9300_sds_field_w(lane_0, 0x20, 18, 15, 12, lc_value);
-+
-+	// Force analog LC & ring on
-+	rtl9300_sds_field_w(lane_0, 0x21, 11, 3, 0, 0xf);
-+
-+	v = lc_on ? 0x3 : 0x1;
-+
-+	if(sds == lane_0)
-+		rtl9300_sds_field_w(lane_0, 0x20, 18, 5, 4, v);
-+	else
-+		rtl9300_sds_field_w(lane_0, 0x20, 18, 7, 6, v);
-+
-+	// Force SerDes mode
-+	rtl9300_sds_field_w(sds, 0x1f, 9, 6, 6, 1);
-+	rtl9300_sds_field_w(sds, 0x1f, 9, 11, 7, sds_mode);
-+
-+	// Toggle LC or Ring
-+	for (i = 0; i < 20; i++) {
-+		mdelay(200);
-+
-+		rtl930x_write_sds_phy(lane_0, 0x1f, 2, 53);
-+
-+		m_bit = (lane_0 == sds) ? (4) : (5);
-+		l_bit = (lane_0 == sds) ? (4) : (5);
-+
-+		cr_0 = rtl9300_sds_field_r(lane_0, 0x1f, 20, m_bit, l_bit);
-+		mdelay(10);
-+		cr_1 = rtl9300_sds_field_r(lane_0, 0x1f, 20, m_bit, l_bit);
-+		mdelay(10);
-+		cr_2 = rtl9300_sds_field_r(lane_0, 0x1f, 20, m_bit, l_bit);
-+
-+		if(cr_0 && cr_1 && cr_2) {
-+			u32 t;
-+			if (phy_if != PHY_INTERFACE_MODE_10GKR)
-+				break;
-+
-+			t = rtl9300_sds_field_r(sds, 0x6, 0x1, 2, 2);
-+			rtl9300_sds_field_w(sds, 0x6, 0x1, 2, 2, 0x1);
-+
-+			// Reset FSM
-+			rtl9300_sds_field_w(sds, 0x6, 0x2, 12, 12, 0x1);
-+			mdelay(10);
-+			rtl9300_sds_field_w(sds, 0x6, 0x2, 12, 12, 0x0);
-+			mdelay(10);
-+
-+			// Need to read this twice
-+			v = rtl9300_sds_field_r(sds, 0x5, 0, 12, 12);
-+			v = rtl9300_sds_field_r(sds, 0x5, 0, 12, 12);
-+
-+			rtl9300_sds_field_w(sds, 0x6, 0x1, 2, 2, t);
-+
-+			// Reset FSM again
-+			rtl9300_sds_field_w(sds, 0x6, 0x2, 12, 12, 0x1);
-+			mdelay(10);
-+			rtl9300_sds_field_w(sds, 0x6, 0x2, 12, 12, 0x0);
-+			mdelay(10);
-+
-+			if (v == 1)
-+				break;
-+		}
-+
-+		m_bit = (phy_if == PHY_INTERFACE_MODE_10GKR) ? 3 : 1;
-+		l_bit = (phy_if == PHY_INTERFACE_MODE_10GKR) ? 2 : 0;
-+
-+		rtl9300_sds_field_w(lane_0, 0x21, 11, m_bit, l_bit, 0x2);
-+		mdelay(10);
-+		rtl9300_sds_field_w(lane_0, 0x21, 11, m_bit, l_bit, 0x3);
-+	}
-+
-+	/*release powndn*/
-+	rtl9300_sds_field_w(sds, 0x20, 0, 7, 6, 0);
-+
-+	/*sds rx rst*/
-+	rtl9300_sds_field_w(sds, 0x2e, 0x15, 4, 4, 0x1);
-+	mdelay(5);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x15, 4, 4, 0x0);
-+}
-+
-+#define RTL930X_MAC_FORCE_MODE_CTRL 0xCA1C
-+
-+void rtl9300_do_rx_calibration(int sds)
-+{
-+	int tap0_init_val	= 0x1f;	// Initial Decision Fed Equalizer 0 tap
-+	int vth_min		= 0x0;
-+
-+	pr_info("start_1.1.1 initial value for sds %d\n", sds);
-+	rtl930x_write_sds_phy(sds, 6,  0, 0);
-+
-+	// FGCAL
-+	rtl9300_sds_field_w(sds, 0x2e, 0x01, 14, 14, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x1c, 10, 5, 0x20);
-+	rtl9300_sds_field_w(sds, 0x2f, 0x02, 0, 0, 0x1);
-+
-+	// DCVS
-+	rtl9300_sds_field_w(sds, 0x2e, 0x1e, 14, 11, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x01, 15, 15, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x02, 11, 11, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x1c, 4, 0, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x1d, 15, 11, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x1d, 10, 6, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x1d, 5, 1, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x02, 10, 6, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x11, 4, 0, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2f, 0x00, 3, 0, 0xf);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x04, 6, 6, 0x1);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x04, 7, 7, 0x1);
-+
-+	// LEQ (Long Term Equivalent signal level)
-+	rtl9300_sds_field_w(sds, 0x2e, 0x16, 14, 8, 0x0);
-+
-+	// DFE (Decision Fed Equalizer)
-+	rtl9300_sds_field_w(sds, 0x2f, 0x03, 5, 0, tap0_init_val);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x09, 11, 6, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x09, 5, 0, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x0a, 5, 0, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2f, 0x01, 5, 0, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2f, 0x12, 5, 0, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x0a, 11, 6, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x06, 5, 0, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2f, 0x01, 5, 0, 0x0);
-+
-+	// Vth
-+	rtl9300_sds_field_w(sds, 0x2e, 0x13, 5, 3, 0x7);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x13, 2, 0, 0x7);
-+	rtl9300_sds_field_w(sds, 0x2f, 0x0b, 5, 3, vth_min);
-+
-+	pr_info("end_1.1.1 --\n");
-+
-+	pr_info("start_1.1.2 Load DFE init. value\n");
-+
-+	rtl9300_sds_field_w(sds, 0x2e, 0x0f, 13, 7, 0x7f);
-+
-+	pr_info("end_1.1.2\n");
-+
-+	pr_info("start_1.1.3 disable LEQ training,enable DFE clock\n");
-+
-+	rtl9300_sds_field_w(sds, 0x2e, 0x17, 7, 7, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x17, 6, 2, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x0c, 8, 8, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x0b, 4, 4, 0x1);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x12, 14, 14, 0x0);
-+	rtl9300_sds_field_w(sds, 0x2f, 0x02, 15, 15, 0x0);
-+
-+	pr_info("end_1.1.3 --\n");
-+
-+	pr_info("start_1.1.4 offset cali setting\n");
-+
-+	rtl9300_sds_field_w(sds, 0x2e, 0x0f, 15, 14, 0x3);
-+
-+	pr_info("end_1.1.4\n");
-+
-+	pr_info("start_1.1.5 LEQ and DFE setting\n");
-+
-+	// TODO: make this work for DAC cables of different lengths
-+	// For a 10GBit serdes wit Fibre, SDS 8 or 9
-+	rtl9300_sds_field_w(sds, 0x2e, 0x16, 3, 2, 0x2);
-+
-+	// No serdes, check for Aquantia PHYs
-+	rtl9300_sds_field_w(sds, 0x2e, 0x16, 3, 2, 0x2);
-+
-+	rtl9300_sds_field_w(sds, 0x2e, 0x0f, 6, 0, 0x5f);
-+	rtl9300_sds_field_w(sds, 0x2f, 0x05, 7, 2, 0x1f);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x19, 9, 5, 0x1f);
-+	rtl9300_sds_field_w(sds, 0x2f, 0x0b, 15, 9, 0x3c);
-+	rtl9300_sds_field_w(sds, 0x2e, 0x0b, 1, 0, 0x3);
-+
-+	pr_info("end_1.1.5\n");
-+}
-+
-+void rtl9300_sds_tx_config(int sds, phy_interface_t phy_if)
-+{
-+	// parameters: rtl9303_80G_txParam_s2
-+	int impedance = 0x8;
-+	int pre_amp = 0x2;
-+	int main_amp = 0x9;
-+	int post_amp = 0x2;
-+	int pre_en = 0x1;
-+	int post_en = 0x1;
-+	int page;
-+
-+	switch(phy_if) {
-+	case PHY_INTERFACE_MODE_1000BASEX:
-+		page = 0x25;
-+		break;
-+	case PHY_INTERFACE_MODE_HSGMII:
-+	case PHY_INTERFACE_MODE_2500BASEX:
-+		page = 0x29;
-+		break;
-+	case PHY_INTERFACE_MODE_10GKR:
-+		page = 0x2f;
-+		break;
-+	default:
-+		pr_err("%s: unsupported PHY mode\n", __func__);
-+		return;
-+	}
-+
-+	rtl9300_sds_field_w(sds, page, 0x1, 15, 11, pre_amp);
-+	rtl9300_sds_field_w(sds, page, 0x7, 0, 0, pre_en);
-+	rtl9300_sds_field_w(sds, page, 0x7, 8, 4, main_amp);
-+	rtl9300_sds_field_w(sds, page, 0x6, 4, 0, post_amp);
-+	rtl9300_sds_field_w(sds, page, 0x7, 3, 3, post_en);
-+	rtl9300_sds_field_w(sds, page, 0x18, 15, 12, impedance);
-+}
-+
-+/*
-+ * Wait for clock ready, this assumes the SerDes is in XGMII mode
-+ * timeout is in ms
-+ */
-+int rtl9300_sds_clock_wait(int timeout)
-+{
-+	u32 v;
-+	unsigned long start = jiffies;
-+
-+	do {
-+		rtl9300_sds_field_w(2, 0x1f, 0x2, 15, 0, 53);
-+		v = rtl9300_sds_field_r(2, 0x1f, 20, 5, 4);
-+		if (v == 3)
-+			return 0;
-+	} while (jiffies < start + (HZ / 1000) * timeout);
-+
-+	return 1;
-+}
-+
-+// dal_longan_sds_clk_routine
-+void rtl9300_sds_clock_config(void)
-+{
-+	// Power down SDS
-+	rtl9300_sds_field_w(2, 0x20, 0, 7, 6, 0x3);
-+	rtl9300_sds_field_w(3, 0x20, 0, 7, 6, 0x3);
-+
-+	// Wait for clock on first 10GBit SerDes, timeout 2million mico seconds
-+	if(!rtl9300_sds_clock_wait(2 * 1000)) {
-+		rtl9300_sds_field_w(2, 0x20, 0, 7, 6, 0);
-+		rtl9300_sds_field_w(3, 0x20, 0, 7, 6, 0);
-+		pr_err("%s: unable to configure SerDes clock\n", __func__);
-+		return;
-+	}
-+
-+	rtl9300_sds_field_w(2, 0x20, 0x2, 11, 10, 0x1);
-+	mdelay(10);
-+	rtl9300_sds_field_w(2, 0x20, 0x2, 11, 10, 0x0);
-+	mdelay(10);
-+	rtl9300_sds_field_w(10, 0x20, 2, 11, 10, 0x1);
-+	mdelay(10);
-+	rtl9300_sds_field_w(10, 0x20, 2, 11, 10, 0x0);
-+	mdelay(10);
-+	rtl9300_sds_field_w(2, 0x1f, 15, 5, 4, 0x1);
-+	mdelay(10);
-+	rtl9300_sds_field_w(2, 0x20, 0x2, 11, 10, 0x3);
-+	mdelay(10);
-+	rtl9300_sds_field_w(10, 0x20, 0x2, 11, 10, 0x3);
-+	mdelay(10);
-+
-+	/* Turn up the clock to 320MHz */
-+	rtl9300_sds_field_w(2, 0x2f, 23, 1, 0, 0x1);
-+	rtl9300_sds_field_w(2, 0x2f, 29, 11, 2, 0x190);
-+	rtl9300_sds_field_w(2, 0x2f, 30, 15, 6, 0x190);
-+	rtl9300_sds_field_w(2, 0x2f, 31, 15, 8, 0x30);
-+	rtl9300_sds_field_w(2, 0x2f, 29, 15, 14, 0x0);
-+	rtl9300_sds_field_w(2, 0x2f, 26, 8, 8,  0x0);
-+
-+	/* Toggle CMU */
-+	rtl9300_sds_field_w(2, 0x21, 11, 3, 3, 1);
-+	rtl9300_sds_field_w(2, 0x21, 11, 2, 2, 0);
-+	rtl9300_sds_field_w(2, 0x21, 11, 2, 2, 1);
-+	rtl9300_sds_field_w(2, 0x21, 11, 3, 3, 0);
-+
-+	mdelay(500);
-+
-+	/* Reset ICG */
-+	rtl9300_sds_field_w(2, 0x1f, 15, 5, 4, 0);
-+	mdelay(10);
-+	rtl9300_sds_field_w(2, 0x1f, 15, 5, 4, 1);
-+	mdelay(10);
-+
-+	/* Turn down clock to 257MHz */
-+	rtl9300_sds_field_w(2, 0x2f, 23, 1, 0, 0x0);
-+	rtl9300_sds_field_w(2, 0x2f, 29, 11, 2, 0x1b8);
-+	rtl9300_sds_field_w(2, 0x2f, 30, 15, 6, 0x1b8);
-+	rtl9300_sds_field_w(2, 0x2f, 31, 15, 8, 0x35);
-+	rtl9300_sds_field_w(2, 0x2f, 29, 15, 14, 0x1);
-+	rtl9300_sds_field_w(2, 0x2f, 26, 8, 8,  0x1);
-+
-+	/* Toggle CMU again */
-+	rtl9300_sds_field_w(2, 0x21, 11, 3, 3, 1);
-+	rtl9300_sds_field_w(2, 0x21, 11, 2, 2, 0);
-+	rtl9300_sds_field_w(2, 0x21, 11, 2, 2, 1);
-+	rtl9300_sds_field_w(2, 0x21, 11, 3, 3, 0);
-+	mdelay(500);
-+
-+	/* Reset ICG*/
-+	rtl9300_sds_field_w(2, 0x1f, 15, 5, 4, 0);
-+	mdelay(10);
-+
-+	/*toggle ber-notify*/
-+	rtl9300_sds_field_w(2, 0x20, 2, 13, 12, 0x1);
-+	mdelay(10);
-+	rtl9300_sds_field_w(2, 0x20, 2, 13, 12, 0x0);
-+	mdelay(10);
-+	rtl9300_sds_field_w(10, 0x20, 2, 13, 12, 0x1);
-+	mdelay(10);
-+	rtl9300_sds_field_w(10, 0x20, 2, 13, 12, 0x0);
-+	mdelay(10);
-+
-+	/* Power up SerDes again */
-+	rtl9300_sds_field_w(2, 0x20, 0, 7, 6, 0);
-+	rtl9300_sds_field_w(3, 0x20, 0, 7, 6, 0);
-+
-+	rtl8218d_reset(8);
-+	rtl8218d_reset(16);
-+
-+	/* SerDes RX reset */
-+	rtl9300_sds_field_w(2, 0x2e, 0x15, 4, 4, 0x1);
-+	mdelay(10);
-+	rtl9300_sds_field_w(2, 0x2e, 0x15, 4, 4, 0x0);
-+
-+	mdelay(10);
-+
-+	rtl9300_sds_field_w(3, 0x2e, 0x15, 4, 4, 0x1);
-+	mdelay(10);
-+	rtl9300_sds_field_w(3, 0x2e, 0x15, 4, 4, 0x0);
-+}
-+
- int rtl9300_configure_serdes(struct phy_device *phydev)
- {
- 	struct device *dev = &phydev->mdio.dev;
- 	int phy_addr = phydev->mdio.addr;
- 	int sds_num = 0;
--	int v;
--
--	phydev_info(phydev, "Configuring internal RTL9300 SERDES\n");
-+	u32 mode, v;
- 
- 	switch (phy_addr) {
- 	case 26:
-@@ -1511,6 +2088,48 @@ int rtl9300_configure_serdes(struct phy_device *phydev)
- 		return -EINVAL;
- 	}
- 
-+	// Maybe use dal_longan_sds_init
-+
-+	// ----> dal_longan_sds_mode_set
-+	phydev_info(phydev, "Configuring internal RTL9300 SERDES %d\n", sds_num);
-+
-+	pr_info("%s: enabling link as speed 1G, link down\n", __func__);
-+	mode = sw_r32(RTL930X_MAC_FORCE_MODE_CTRL + 4 * phy_addr);
-+	pr_info("%s, RTL930X_MAC_FORCE_MODE_CTRL : %08x\n", __func__, v);
-+	mode |= BIT(0);		// MAC enabled
-+	mode &= ~(7 << 3);
-+	mode |= 2 << 3;  	// Speed = 1G
-+	mode &= ~BIT(1);	// Link is down
-+	sw_w32(mode, RTL930X_MAC_FORCE_MODE_CTRL + 4 * phy_addr);
-+	mdelay(20);
-+
-+	rtl9300_sds_rst(sds_num, 0x04);
-+
-+	// Enable 1GBit PHY
-+	v = rtl930x_read_sds_phy(sds_num, PHY_PAGE_2, PHY_CTRL_REG);
-+	v |= BIT(PHY_POWER_BIT);
-+	rtl930x_write_sds_phy(sds_num, PHY_PAGE_2, PHY_CTRL_REG, v);
-+
-+	// Enable 10GBit PHY
-+	v = rtl930x_read_sds_phy(sds_num, PHY_PAGE_4, PHY_CTRL_REG);
-+	v |= BIT(PHY_POWER_BIT);
-+	rtl930x_write_sds_phy(sds_num, PHY_PAGE_4, PHY_CTRL_REG, v);
-+
-+	rtl9300_force_sds_mode(sds_num, PHY_INTERFACE_MODE_NA);
-+
-+	// Do RX calibration
-+	// Select rtl9300_rxCaliConf_serdes_myParam if SERDES
-+	// otherwise rtl9300_rxCaliConf_phy_myParam
-+	rtl9300_do_rx_calibration(sds_num);
-+
-+	rtl9300_sds_tx_config(sds_num, PHY_INTERFACE_MODE_1000BASEX);
-+
-+	rtl9300_force_sds_mode(sds_num, PHY_INTERFACE_MODE_1000BASEX);
-+
-+	 rtl9300_sds_clock_config();
-+
-+	// <----- dal_longan_sds_mode_set
-+
- 	/* Set default Medium to fibre */
- 	v = rtl930x_read_sds_phy(sds_num, 0x1f, 11);
- 	if (v < 0) {
-@@ -1521,8 +2140,9 @@ int rtl9300_configure_serdes(struct phy_device *phydev)
- 	rtl930x_write_sds_phy(sds_num, 0x1f, 11, v);
- 
- 	// TODO: this needs to be configurable via ethtool/.dts
--	pr_info("Setting 10G/1000BX auto fibre medium\n");
--	rtl9300_sds_rst(sds_num, 0x1b);
-+	pr_info("%s: setting 10G/1000BX auto fibre medium\n", __func__);
-+//	rtl9300_sds_rst(sds_num, 0x1b);
-+	// Set to 1000BX
- 
- 	// TODO: Apply patch set for fibre type
- 
-@@ -1624,7 +2244,7 @@ static int rtl8218d_phy_probe(struct phy_device *phydev)
- 	struct rtl838x_phy_priv *priv;
- 	int addr = phydev->mdio.addr;
- 
--	pr_info("%s: id: %d\n", __func__, addr);
-+	pr_debug("%s: id: %d\n", __func__, addr);
- 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- 	if (!priv)
- 		return -ENOMEM;
-@@ -1652,6 +2272,8 @@ static int rtl8226_phy_probe(struct phy_device *phydev)
- 
- 	priv->name = "RTL8226";
- 
-+	// TODO: configure PHY, in particular MDI pin swap
-+
- 	return 0;
- }
- 
-@@ -1791,7 +2413,10 @@ static struct phy_driver rtl83xx_phy_driver[] = {
- 		.suspend	= genphy_suspend,
- 		.resume		= genphy_resume,
- 		.set_loopback	= genphy_loopback,
--	},	{
-+		.set_eee	= rtl8218d_set_eee,
-+		.get_eee	= rtl8218d_get_eee,
-+	},
-+	{
- 		PHY_ID_MATCH_MODEL(PHY_ID_RTL8226),
- 		.name		= "REALTEK RTL8226",
- 		.features	= PHY_GBIT_FEATURES,
-@@ -1805,6 +2430,8 @@ static struct phy_driver rtl83xx_phy_driver[] = {
- 		.write_page	= rtl8226_write_page,
- 		.read_status	= rtl8226_read_status,
- 		.config_aneg	= rtl8226_config_aneg,
-+		.set_eee	= rtl8226_set_eee,
-+		.get_eee	= rtl8226_get_eee,
- 	},
- 	{
- 		PHY_ID_MATCH_MODEL(PHY_ID_RTL8218B_I),
-@@ -1853,6 +2480,7 @@ static struct phy_driver rtl83xx_phy_driver[] = {
- 	{
- 		PHY_ID_MATCH_MODEL(PHY_ID_RTL9300_I),
- 		.name		= "REALTEK RTL9300 SERDES",
-+		.phy_id_mask	= RTL9300_PHY_ID_MASK,
- 		.features	= PHY_GBIT_FIBRE_FEATURES,
- 		.probe		= rtl9300_serdes_probe,
- 		.suspend	= genphy_suspend,
-diff --git a/target/linux/realtek/files-5.4/include/linux/rtl838x.h b/target/linux/realtek/files-5.4/include/linux/rtl838x.h
-new file mode 100644
-index 0000000000..b5d9bfba12
---- /dev/null
-+++ b/target/linux/realtek/files-5.4/include/linux/rtl838x.h
-@@ -0,0 +1,1072 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#ifndef _RTL838X_H
-+#define _RTL838X_H
-+
-+#include <net/dsa.h>
-+#include <linux/rhashtable.h>
-+
-+/*
-+ * Register definition
-+ */
-+#define RTL838X_MAC_PORT_CTRL(port)		(0xd560 + (((port) << 7)))
-+#define RTL839X_MAC_PORT_CTRL(port)		(0x8004 + (((port) << 7)))
-+#define RTL930X_MAC_PORT_CTRL(port)		(0x3260 + (((port) << 6)))
-+#define RTL930X_MAC_L2_PORT_CTRL(port)		(0x3268 + (((port) << 6)))
-+#define RTL931X_MAC_PORT_CTRL(port)		(0x6004 + (((port) << 7)))
-+
-+#define RTL838X_RST_GLB_CTRL_0			(0x003c)
-+
-+#define RTL838X_MAC_FORCE_MODE_CTRL		(0xa104)
-+#define RTL839X_MAC_FORCE_MODE_CTRL		(0x02bc)
-+#define RTL930X_MAC_FORCE_MODE_CTRL		(0xCA1C)
-+#define RTL931X_MAC_FORCE_MODE_CTRL		(0x0DCC)
-+
-+#define RTL838X_DMY_REG31			(0x3b28)
-+#define RTL838X_SDS_MODE_SEL			(0x0028)
-+#define RTL838X_SDS_CFG_REG			(0x0034)
-+#define RTL838X_INT_MODE_CTRL			(0x005c)
-+#define RTL838X_CHIP_INFO			(0x00d8)
-+#define RTL839X_CHIP_INFO			(0x0ff4)
-+#define RTL838X_PORT_ISO_CTRL(port)		(0x4100 + ((port) << 2))
-+#define RTL839X_PORT_ISO_CTRL(port)		(0x1400 + ((port) << 3))
-+
-+/* Packet statistics */
-+#define RTL838X_STAT_PORT_STD_MIB		(0x1200)
-+#define RTL839X_STAT_PORT_STD_MIB		(0xC000)
-+#define RTL930X_STAT_PORT_MIB_CNTR		(0x0664)
-+#define RTL838X_STAT_RST			(0x3100)
-+#define RTL839X_STAT_RST			(0xF504)
-+#define RTL930X_STAT_RST			(0x3240)
-+#define RTL931X_STAT_RST			(0x7ef4)
-+#define RTL838X_STAT_PORT_RST			(0x3104)
-+#define RTL839X_STAT_PORT_RST			(0xF508)
-+#define RTL930X_STAT_PORT_RST			(0x3244)
-+#define RTL931X_STAT_PORT_RST			(0x7ef8)
-+#define RTL838X_STAT_CTRL			(0x3108)
-+#define RTL839X_STAT_CTRL			(0x04cc)
-+#define RTL930X_STAT_CTRL			(0x3248)
-+#define RTL931X_STAT_CTRL			(0x5720)
-+
-+/* Registers of the internal Serdes of the 8390 */
-+#define RTL8390_SDS0_1_XSG0			(0xA000)
-+#define RTL8390_SDS0_1_XSG1			(0xA100)
-+#define RTL839X_SDS12_13_XSG0			(0xB800)
-+#define RTL839X_SDS12_13_XSG1			(0xB900)
-+#define RTL839X_SDS12_13_PWR0			(0xb880)
-+#define RTL839X_SDS12_13_PWR1			(0xb980)
-+
-+/* Registers of the internal Serdes of the 8380 */
-+#define RTL838X_SDS4_FIB_REG0			(0xF800)
-+#define RTL838X_SDS4_REG28			(0xef80)
-+#define RTL838X_SDS4_DUMMY0			(0xef8c)
-+#define RTL838X_SDS5_EXT_REG6			(0xf18c)
-+
-+/* VLAN registers */
-+#define RTL838X_VLAN_CTRL			(0x3A74)
-+#define RTL838X_VLAN_PROFILE(idx)		(0x3A88 + ((idx) << 2))
-+#define RTL838X_VLAN_PORT_EGR_FLTR		(0x3A84)
-+#define RTL838X_VLAN_PORT_PB_VLAN		(0x3C00)
-+#define RTL838X_VLAN_PORT_IGR_FLTR		(0x3A7C)
-+#define RTL838X_VLAN_PORT_TAG_STS_CTRL		(0xA530)
-+
-+#define RTL839X_VLAN_PROFILE(idx)		(0x25C0 + (((idx) << 3)))
-+#define RTL839X_VLAN_CTRL			(0x26D4)
-+#define RTL839X_VLAN_PORT_PB_VLAN		(0x26D8)
-+#define RTL839X_VLAN_PORT_IGR_FLTR		(0x27B4)
-+#define RTL839X_VLAN_PORT_EGR_FLTR		(0x27C4)
-+#define RTL839X_VLAN_PORT_TAG_STS_CTRL		(0x6828)
-+
-+#define RTL930X_VLAN_PROFILE_SET(idx)		(0x9c60 + (((idx) * 20)))
-+#define RTL930X_VLAN_CTRL			(0x82D4)
-+#define RTL930X_VLAN_PORT_PB_VLAN		(0x82D8)
-+#define RTL930X_VLAN_PORT_IGR_FLTR		(0x83C0)
-+#define RTL930X_VLAN_PORT_EGR_FLTR		(0x83C8)
-+#define RTL930X_VLAN_PORT_TAG_STS_CTRL		(0xCE24)
-+
-+#define RTL931X_VLAN_PROFILE_SET(idx)		(0x9800 + (((idx) * 28)))
-+#define RTL931X_VLAN_CTRL			(0x94E4)
-+#define RTL931X_VLAN_PORT_IGR_FLTR		(0x96B4)
-+#define RTL931X_VLAN_PORT_EGR_FLTR		(0x96C4)
-+#define RTL931X_VLAN_PORT_TAG_CTRL		(0x4860)
-+
-+/* Table access registers */
-+#define RTL838X_TBL_ACCESS_CTRL_0		(0x6914)
-+#define RTL838X_TBL_ACCESS_DATA_0(idx)		(0x6918 + ((idx) << 2))
-+#define RTL838X_TBL_ACCESS_CTRL_1		(0xA4C8)
-+#define RTL838X_TBL_ACCESS_DATA_1(idx)		(0xA4CC + ((idx) << 2))
-+
-+#define RTL839X_TBL_ACCESS_CTRL_0		(0x1190)
-+#define RTL839X_TBL_ACCESS_DATA_0(idx)		(0x1194 + ((idx) << 2))
-+#define RTL839X_TBL_ACCESS_CTRL_1		(0x6b80)
-+#define RTL839X_TBL_ACCESS_DATA_1(idx)		(0x6b84 + ((idx) << 2))
-+#define RTL839X_TBL_ACCESS_CTRL_2		(0x611C)
-+#define RTL839X_TBL_ACCESS_DATA_2(i)		(0x6120 + (((i) << 2)))
-+
-+#define RTL930X_TBL_ACCESS_CTRL_0		(0xB340)
-+#define RTL930X_TBL_ACCESS_DATA_0(idx)		(0xB344 + ((idx) << 2))
-+#define RTL930X_TBL_ACCESS_CTRL_1		(0xB3A0)
-+#define RTL930X_TBL_ACCESS_DATA_1(idx)		(0xB3A4 + ((idx) << 2))
-+#define RTL930X_TBL_ACCESS_CTRL_2		(0xCE04)
-+#define RTL930X_TBL_ACCESS_DATA_2(i)		(0xCE08 + (((i) << 2)))
-+
-+#define RTL931X_TBL_ACCESS_CTRL_0		(0x8500)
-+#define RTL931X_TBL_ACCESS_DATA_0(idx)		(0x8508 + ((idx) << 2))
-+#define RTL931X_TBL_ACCESS_CTRL_1		(0x40C0)
-+#define RTL931X_TBL_ACCESS_DATA_1(idx)		(0x40C4 + ((idx) << 2))
-+#define RTL931X_TBL_ACCESS_CTRL_2		(0x8528)
-+#define RTL931X_TBL_ACCESS_DATA_2(i)		(0x852C + (((i) << 2)))
-+#define RTL931X_TBL_ACCESS_CTRL_3		(0x0200)
-+#define RTL931X_TBL_ACCESS_DATA_3(i)		(0x0204 + (((i) << 2)))
-+#define RTL931X_TBL_ACCESS_CTRL_4		(0x20DC)
-+#define RTL931X_TBL_ACCESS_DATA_4(i)		(0x20E0 + (((i) << 2)))
-+#define RTL931X_TBL_ACCESS_CTRL_5		(0x7E1C)
-+#define RTL931X_TBL_ACCESS_DATA_5(i)		(0x7E20 + (((i) << 2)))
-+
-+/* MAC handling */
-+#define RTL838X_MAC_LINK_STS			(0xa188)
-+#define RTL839X_MAC_LINK_STS			(0x0390)
-+#define RTL930X_MAC_LINK_STS			(0xCB10)
-+#define RTL931X_MAC_LINK_STS			(0x0EC0)
-+#define RTL838X_MAC_LINK_SPD_STS(p)		(0xa190 + (((p >> 4) << 2)))
-+#define RTL839X_MAC_LINK_SPD_STS(p)		(0x03a0 + (((p >> 4) << 2)))
-+#define RTL930X_MAC_LINK_SPD_STS(p)		(0xCB18 + (((p >> 3) << 2)))
-+#define RTL931X_MAC_LINK_SPD_STS(p)		(0x0ED0 + (((p >> 3) << 2)))
-+#define RTL838X_MAC_LINK_DUP_STS		(0xa19c)
-+#define RTL839X_MAC_LINK_DUP_STS		(0x03b0)
-+#define RTL930X_MAC_LINK_DUP_STS		(0xCB28)
-+#define RTL931X_MAC_LINK_DUP_STS		(0x0EF0)
-+#define RTL838X_MAC_TX_PAUSE_STS		(0xa1a0)
-+#define RTL839X_MAC_TX_PAUSE_STS		(0x03b8)
-+#define RTL930X_MAC_TX_PAUSE_STS		(0xCB2C)
-+#define RTL931X_MAC_TX_PAUSE_STS		(0x0EF8)
-+#define RTL838X_MAC_RX_PAUSE_STS		(0xa1a4)
-+#define RTL839X_MAC_RX_PAUSE_STS		(0x03c0)
-+#define RTL930X_MAC_RX_PAUSE_STS		(0xCB30)
-+#define RTL931X_MAC_RX_PAUSE_STS		(0x0F00)
-+#define RTL930X_MAC_LINK_MEDIA_STS		(0xCB14)
-+
-+
-+/* MAC link state bits */
-+#define RTL830X_FORCE_EN				(1 << 0)
-+#define RTL830X_FORCE_LINK_EN				(1 << 1)
-+#define RTL830X_NWAY_EN					(1 << 2)
-+#define RTL830X_DUPLEX_MODE				(1 << 3)
-+#define RTL830X_TX_PAUSE_EN				(1 << 6)
-+#define RTL830X_RX_PAUSE_EN				(1 << 7)
-+#define RTL830X_MAC_FORCE_FC_EN				(1 << 8)
-+
-+#define RTL839X_FORCE_EN				(1 << 0)
-+#define RTL839X_FORCE_LINK_EN				(1 << 1)
-+#define RTL839X_DUPLEX_MODE				(1 << 2)
-+#define RTL839X_TX_PAUSE_EN				(1 << 5)
-+#define RTL839X_RX_PAUSE_EN				(1 << 6)
-+#define RTL839X_MAC_FORCE_FC_EN				(1 << 7)
-+
-+#define RTL930X_FORCE_EN				(1 << 0)
-+#define RTL930X_FORCE_LINK_EN				(1 << 1)
-+#define RTL930X_DUPLEX_MODE				(1 << 2)
-+#define RTL930X_TX_PAUSE_EN				(1 << 7)
-+#define RTL930X_RX_PAUSE_EN				(1 << 8)
-+#define RTL930X_MAC_FORCE_FC_EN				(1 << 9)
-+
-+#define RTL931X_FORCE_EN				(1 << 0)
-+#define RTL931X_FORCE_LINK_EN				(1 << 1)
-+#define RTL931X_DUPLEX_MODE				(1 << 2)
-+#define RTL931X_MAC_FORCE_FC_EN				(1 << 4)
-+#define RTL931X_TX_PAUSE_EN				(1 << 16)
-+#define RTL931X_RX_PAUSE_EN				(1 << 17)
-+
-+/* EEE */
-+#define RTL838X_MAC_EEE_ABLTY			(0xa1a8)
-+#define RTL838X_EEE_PORT_TX_EN			(0x014c)
-+#define RTL838X_EEE_PORT_RX_EN			(0x0150)
-+#define RTL838X_EEE_CLK_STOP_CTRL		(0x0148)
-+#define RTL838X_EEE_TX_TIMER_GIGA_CTRL		(0xaa04)
-+#define RTL838X_EEE_TX_TIMER_GELITE_CTRL	(0xaa08)
-+
-+#define RTL839X_EEE_TX_TIMER_GELITE_CTRL	(0x042C)
-+#define RTL839X_EEE_TX_TIMER_GIGA_CTRL		(0x0430)
-+#define RTL839X_EEE_TX_TIMER_10G_CTRL		(0x0434)
-+#define RTL839X_EEE_CTRL(p)			(0x8008 + ((p) << 7))
-+#define RTL839X_MAC_EEE_ABLTY			(0x03C8)
-+
-+#define RTL930X_MAC_EEE_ABLTY			(0xCB34)
-+#define RTL930X_EEE_CTRL(p)			(0x3274 + ((p) << 6))
-+#define RTL930X_EEEP_PORT_CTRL(p)		(0x3278 + ((p) << 6))
-+
-+/* L2 functionality */
-+#define RTL838X_L2_CTRL_0			(0x3200)
-+#define RTL839X_L2_CTRL_0			(0x3800)
-+#define RTL930X_L2_CTRL				(0x8FD8)
-+#define RTL931X_L2_CTRL				(0xC800)
-+#define RTL838X_L2_CTRL_1			(0x3204)
-+#define RTL839X_L2_CTRL_1			(0x3804)
-+#define RTL930X_L2_AGE_CTRL			(0x8FDC)
-+#define RTL931X_L2_AGE_CTRL			(0xC804)
-+#define RTL838X_L2_PORT_AGING_OUT		(0x3358)
-+#define RTL839X_L2_PORT_AGING_OUT		(0x3b74)
-+#define	RTL930X_L2_PORT_AGE_CTRL		(0x8FE0)
-+#define	RTL931X_L2_PORT_AGE_CTRL		(0xc808)
-+#define RTL838X_TBL_ACCESS_L2_CTRL		(0x6900)
-+#define RTL839X_TBL_ACCESS_L2_CTRL		(0x1180)
-+#define RTL930X_TBL_ACCESS_L2_CTRL		(0xB320)
-+#define RTL930X_TBL_ACCESS_L2_METHOD_CTRL	(0xB324)
-+#define RTL838X_TBL_ACCESS_L2_DATA(idx)		(0x6908 + ((idx) << 2))
-+#define RTL839X_TBL_ACCESS_L2_DATA(idx)		(0x1184 + ((idx) << 2))
-+#define RTL930X_TBL_ACCESS_L2_DATA(idx)		(0xab08 + ((idx) << 2))
-+#define RTL838X_L2_TBL_FLUSH_CTRL		(0x3370)
-+#define RTL839X_L2_TBL_FLUSH_CTRL		(0x3ba0)
-+#define RTL930X_L2_TBL_FLUSH_CTRL		(0x9404)
-+#define RTL931X_L2_TBL_FLUSH_CTRL		(0xCD9C)
-+
-+#define RTL838X_L2_LRN_CONSTRT			(0x329C)
-+#define RTL838X_L2_PORT_LRN_CONSTRT		(0x32A0)
-+#define RTL839X_L2_LRN_CONSTRT			(0x3910)
-+#define RTL839X_L2_PORT_LRN_CONSTRT		(0x3914)
-+#define RTL930X_L2_LRN_CONSTRT_CTRL		(0x909c)
-+#define RTL838X_L2_FLD_PMSK			(0x3288)
-+#define RTL839X_L2_FLD_PMSK			(0x38EC)
-+#define RTL930X_L2_BC_FLD_PMSK			(0x9068)
-+#define RTL930X_L2_UNKN_UC_FLD_PMSK		(0x9064)
-+#define RTL838X_L2_LRN_CONSTRT_EN		(0x3368)
-+
-+#define RTL838X_L2_PORT_NEW_SALRN(p)		(0x328c + (((p >> 4) << 2)))
-+#define RTL839X_L2_PORT_NEW_SALRN(p)		(0x38F0 + (((p >> 4) << 2)))
-+#define RTL930X_L2_PORT_SALRN(p)		(0x8FEC + (((p >> 4) << 2)))
-+#define RTL931X_L2_PORT_NEW_SALRN(p)		(0xC820 + (((p >> 4) << 2)))
-+#define RTL838X_L2_PORT_NEW_SA_FWD(p)		(0x3294 + (((p >> 4) << 2)))
-+#define RTL839X_L2_PORT_NEW_SA_FWD(p)		(0x3900 + (((p >> 4) << 2)))
-+#define RTL930X_L2_PORT_NEW_SA_FWD(p)		(0x8FF4 + (((p / 10) << 2)))
-+#define RTL931X_L2_PORT_NEW_SA_FWD(p)		(0xC830 + (((p / 10) << 2)))
-+
-+#define RTL930X_ST_CTRL				(0x8798)
-+
-+#define RTL930X_L2_PORT_SABLK_CTRL		(0x905c)
-+#define RTL930X_L2_PORT_DABLK_CTRL		(0x9060)
-+
-+#define RTL838X_RMA_BPDU_FLD_PMSK		(0x4348)
-+#define RTL930X_RMA_BPDU_FLD_PMSK		(0x9F18)
-+#define RTL931X_RMA_BPDU_FLD_PMSK		(0x8950)
-+#define RTL839X_RMA_BPDU_FLD_PMSK		(0x125C)
-+
-+#define RTL838X_L2_PORT_LM_ACT(p)		(0x3208 + ((p) << 2))
-+#define RTL838X_VLAN_PORT_FWD			(0x3A78)
-+#define RTL839X_VLAN_PORT_FWD			(0x27AC)
-+#define RTL930X_VLAN_PORT_FWD			(0x834C)
-+#define RTL838X_VLAN_FID_CTRL			(0x3aa8)
-+
-+/* Port Mirroring */
-+#define RTL838X_MIR_CTRL			(0x5D00)
-+#define RTL838X_MIR_DPM_CTRL			(0x5D20)
-+#define RTL838X_MIR_SPM_CTRL			(0x5D10)
-+
-+#define RTL839X_MIR_CTRL			(0x2500)
-+#define RTL839X_MIR_DPM_CTRL			(0x2530)
-+#define RTL839X_MIR_SPM_CTRL			(0x2510)
-+#define RTL839X_MIR_SAMPLE_RATE_CTRL		(0x2558)
-+#define RTL839X_SFLOW_CTRL			(0x2400)
-+#define RTL839X_SFLOW_PORT_RATE_CTRL		(0x2404)
-+
-+#define RTL930X_MIR_CTRL			(0xA2A0)
-+#define RTL930X_MIR_DPM_CTRL			(0xA2C0)
-+#define RTL930X_MIR_SPM_CTRL			(0xA2B0)
-+#define RTL930X_MIR_SAMPLE_RATE_CTRL		(0xA2D0)
-+#define RTL930X_SFLOW_CTRL			(0xBEA0)
-+#define RTL930X_SFLOW_PORT_RATE_CTRL		(0xBEA4)
-+
-+#define RTL931X_MIR_CTRL			(0xAF00)
-+#define RTL931X_MIR_DPM_CTRL			(0xAF30)
-+#define RTL931X_MIR_SPM_CTRL			(0xAF10)
-+#define RTL931X_MIR_SAMPLE_RATE_CTRL		(0xAF50)
-+#define RTL931X_SFLOW_CTRL			(0x8400)
-+#define RTL931X_SFLOW_PORT_RATE_CTRL		(0x8404)
-+
-+#define RTL931X_MIR_RSPAN_VLAN_CTRL			(0x69A0)
-+#define RTL931X_MIR_RSPAN_TX_CTRL			(0x69B0)
-+#define RTL931X_MIR_RSPAN_RX_TAG_RM_CTRL		(0xAF5C)
-+#define RTL931X_MIR_RSPAN_RX_TAG_EN_CTRL		(0x2554)
-+
-+
-+
-+/* Storm/rate control and scheduling */
-+#define RTL838X_STORM_CTRL			(0x4700)
-+#define RTL839X_STORM_CTRL			(0x1800)
-+#define RTL838X_STORM_CTRL_LB_CTRL(p)		(0x4884 + (((p) << 2)))
-+#define RTL838X_STORM_CTRL_BURST_PPS_0		(0x4874)
-+#define RTL838X_STORM_CTRL_BURST_PPS_1		(0x4878)
-+#define RTL838X_STORM_CTRL_BURST_0		(0x487c)
-+#define RTL838X_STORM_CTRL_BURST_1		(0x4880)
-+#define RTL839X_STORM_CTRL_LB_TICK_TKN_CTRL_0	(0x1804)
-+#define RTL839X_STORM_CTRL_LB_TICK_TKN_CTRL_1	(0x1808)
-+#define RTL838X_SCHED_CTRL			(0xB980)
-+#define RTL839X_SCHED_CTRL			(0x60F4)
-+#define RTL838X_SCHED_LB_TICK_TKN_CTRL_0	(0xAD58)
-+#define RTL838X_SCHED_LB_TICK_TKN_CTRL_1	(0xAD5C)
-+#define RTL839X_SCHED_LB_TICK_TKN_CTRL_0	(0x1804)
-+#define RTL839X_SCHED_LB_TICK_TKN_CTRL_1	(0x1808)
-+#define RTL839X_STORM_CTRL_SPCL_LB_TICK_TKN_CTRL (0x2000)
-+#define RTL839X_IGR_BWCTRL_LB_TICK_TKN_CTRL_0	(0x1604)
-+#define RTL839X_IGR_BWCTRL_LB_TICK_TKN_CTRL_1	(0x1608)
-+#define RTL839X_SCHED_LB_TICK_TKN_CTRL		(0x60F8)
-+#define RTL839X_SCHED_LB_TICK_TKN_PPS_CTRL	(0x6200)
-+#define RTL838X_SCHED_LB_THR			(0xB984)
-+#define RTL839X_SCHED_LB_THR			(0x60FC)
-+#define RTL838X_SCHED_P_EGR_RATE_CTRL(p)	(0xC008 + (((p) << 7)))
-+#define RTL838X_SCHED_Q_EGR_RATE_CTRL(p, q)	(0xC00C + (p << 7) + (((q) << 2)))
-+#define RTL838X_STORM_CTRL_PORT_BC_EXCEED	(0x470C)
-+#define RTL838X_STORM_CTRL_PORT_MC_EXCEED	(0x4710)
-+#define RTL838X_STORM_CTRL_PORT_UC_EXCEED	(0x4714)
-+#define RTL839X_STORM_CTRL_PORT_BC_EXCEED(p)	(0x180c + (((p >> 5) << 2)))
-+#define RTL839X_STORM_CTRL_PORT_MC_EXCEED(p)	(0x1814 + (((p >> 5) << 2)))
-+#define RTL839X_STORM_CTRL_PORT_UC_EXCEED(p)	(0x181c + (((p >> 5) << 2)))
-+#define RTL838X_STORM_CTRL_PORT_UC(p)		(0x4718 + (((p) << 2)))
-+#define RTL838X_STORM_CTRL_PORT_MC(p)		(0x478c + (((p) << 2)))
-+#define RTL838X_STORM_CTRL_PORT_BC(p)		(0x4800 + (((p) << 2)))
-+
-+#define RTL839X_STORM_CTRL_PORT_UC_0(p)		(0x185C + (((p) << 3)))
-+#define RTL839X_STORM_CTRL_PORT_UC_1(p)		(0x1860 + (((p) << 3)))
-+#define RTL839X_STORM_CTRL_PORT_MC_0(p)		(0x19FC + (((p) << 3)))
-+#define RTL839X_STORM_CTRL_PORT_MC_1(p)		(0x1a00 + (((p) << 3)))
-+#define RTL839X_STORM_CTRL_PORT_BC_0(p)		(0x1B9C + (((p) << 3)))
-+#define RTL839X_STORM_CTRL_PORT_BC_1(p)		(0x1BA0 + (((p) << 3)))
-+
-+#define RTL930X_STORM_CTRL_PORT_UC_0(p)		(0x1A70 + (((p) << 3)))
-+#define RTL930X_STORM_CTRL_PORT_UC_1(p)		(0x1A74 + (((p) << 3)))
-+#define RTL930X_STORM_CTRL_PORT_MC_0(p)		(0x8B60 + (((p) << 3)))
-+#define RTL930X_STORM_CTRL_PORT_MC_1(p)		(0x8B64 + (((p) << 3)))
-+#define RTL930X_STORM_CTRL_PORT_BC_0(p)		(0x8C50 + (((p) << 3)))
-+#define RTL930X_STORM_CTRL_PORT_BC_1(p)		(0x8C54 + (((p) << 3)))
-+
-+#define RTL931X_STORM_CTRL_PORT_UC_0(p)		(0xB014 + (((p) << 3)))
-+#define RTL931X_STORM_CTRL_PORT_UC_1(p)		(0xB018 + (((p) << 3)))
-+#define RTL931X_STORM_CTRL_PORT_MC_0(p)		(0xB1EC + (((p) << 3)))
-+#define RTL931X_STORM_CTRL_PORT_MC_1(p)		(0xB1F0 + (((p) << 3)))
-+#define RTL931X_STORM_CTRL_PORT_BC_0(p)		(0xB3C4 + (((p) << 3)))
-+#define RTL931X_STORM_CTRL_PORT_BC_1(p)		(0xB3C4 + (((p) << 3)))
-+
-+#define RTL839X_TBL_ACCESS_CTRL_2		(0x611C)
-+#define RTL839X_TBL_ACCESS_DATA_2(i)		(0x6120 + (((i) << 2)))
-+#define RTL839X_IGR_BWCTRL_PORT_CTRL_10G_0(p)	(0x1618 + (((p) << 3)))
-+#define RTL839X_IGR_BWCTRL_PORT_CTRL_10G_1(p)	(0x161C + (((p) << 3)))
-+#define RTL839X_IGR_BWCTRL_PORT_CTRL_0(p)	(0x1640 + (((p) << 3)))
-+#define RTL839X_IGR_BWCTRL_PORT_CTRL_1(p)	(0x1644 + (((p) << 3)))
-+#define RTL839X_IGR_BWCTRL_CTRL_LB_THR		(0x1614)
-+
-+/* Link aggregation (Trunking) */
-+
-+#define TRUNK_DISTRIBUTION_ALGO_SPA_BIT         0x01
-+#define TRUNK_DISTRIBUTION_ALGO_SMAC_BIT        0x02
-+#define TRUNK_DISTRIBUTION_ALGO_DMAC_BIT        0x04
-+#define TRUNK_DISTRIBUTION_ALGO_SIP_BIT         0x08
-+#define TRUNK_DISTRIBUTION_ALGO_DIP_BIT         0x10
-+#define TRUNK_DISTRIBUTION_ALGO_SRC_L4PORT_BIT  0x20
-+#define TRUNK_DISTRIBUTION_ALGO_DST_L4PORT_BIT  0x40
-+#define TRUNK_DISTRIBUTION_ALGO_MASKALL         0x7F
-+
-+#define TRUNK_DISTRIBUTION_ALGO_L2_SPA_BIT         0x01
-+#define TRUNK_DISTRIBUTION_ALGO_L2_SMAC_BIT        0x02
-+#define TRUNK_DISTRIBUTION_ALGO_L2_DMAC_BIT        0x04
-+#define TRUNK_DISTRIBUTION_ALGO_L2_VLAN_BIT         0x08
-+#define TRUNK_DISTRIBUTION_ALGO_L2_MASKALL         0xF
-+
-+#define TRUNK_DISTRIBUTION_ALGO_L3_SPA_BIT         0x01
-+#define TRUNK_DISTRIBUTION_ALGO_L3_SMAC_BIT        0x02
-+#define TRUNK_DISTRIBUTION_ALGO_L3_DMAC_BIT        0x04
-+#define TRUNK_DISTRIBUTION_ALGO_L3_VLAN_BIT         0x08
-+#define TRUNK_DISTRIBUTION_ALGO_L3_SIP_BIT         0x10
-+#define TRUNK_DISTRIBUTION_ALGO_L3_DIP_BIT         0x20
-+#define TRUNK_DISTRIBUTION_ALGO_L3_SRC_L4PORT_BIT  0x40
-+#define TRUNK_DISTRIBUTION_ALGO_L3_DST_L4PORT_BIT  0x80
-+#define TRUNK_DISTRIBUTION_ALGO_L3_PROTO_BIT  0x100
-+#define TRUNK_DISTRIBUTION_ALGO_L3_FLOW_LABEL_BIT  0x200
-+#define TRUNK_DISTRIBUTION_ALGO_L3_MASKALL         0x3FF
-+
-+
-+#define RTL930X_TRK_MBR_CTRL			(0xA41C)
-+//#define RTL930X_TRK_HASH_IDX_CTRL 		()
-+#define RTL930X_TRK_HASH_CTRL			(0x9F80)
-+
-+
-+#define RTL931X_TRK_MBR_CTRL			(0xB8D0)
-+//#define RTL931X_TRK_HASH_IDX_CTRL 		(0x3E20)
-+#define RTL931X_TRK_HASH_CTRL			(0xBA70)
-+
-+#define RTL838X_TRK_MBR_CTR			(0x3E00)
-+#define RTL838X_TRK_HASH_IDX_CTRL 		(0x3E20)
-+#define RTL838X_TRK_HASH_CTRL			(0x3E24)
-+
-+#define RTL839X_TRK_MBR_CTR			(0x2200)
-+#define RTL839X_TRK_HASH_IDX_CTRL 		(0x2280)
-+#define RTL839X_TRK_HASH_CTRL			(0x2284)
-+
-+/* Attack prevention */
-+#define RTL838X_ATK_PRVNT_PORT_EN		(0x5B00)
-+#define RTL838X_ATK_PRVNT_CTRL			(0x5B04)
-+#define RTL838X_ATK_PRVNT_ACT			(0x5B08)
-+#define RTL838X_ATK_PRVNT_STS			(0x5B1C)
-+
-+/* 802.1X */
-+#define RTL838X_SPCL_TRAP_EAPOL_CTRL		(0x6988)
-+#define RTL838X_SPCL_TRAP_ARP_CTRL		(0x698C)
-+#define RTL838X_SPCL_TRAP_IGMP_CTRL		(0x6984)
-+#define RTL838X_SPCL_TRAP_IPV6_CTRL		(0x6994)
-+#define RTL838X_SPCL_TRAP_SWITCH_MAC_CTRL		(0x6998)
-+#define RTL838X_SPCL_TRAP_CTRL		(0x6980)
-+
-+#define RTL839X_SPCL_TRAP_CTRL			(0x1054)
-+#define RTL839X_SPCL_TRAP_EAPOL_CTRL		(0x105C)
-+#define RTL839X_SPCL_TRAP_ARP_CTRL		(0x1060)
-+#define RTL839X_SPCL_TRAP_IGMP_CTRL		(0x1058)
-+#define RTL839X_SPCL_TRAP_IPV6_CTRL		(0x1064)
-+#define RTL839X_SPCL_TRAP_SWITCH_MAC_CTRL		(0x1068)
-+#define RTL839X_SPCL_TRAP_SWITCH_IPV4_ADDR_CTRL		(0x106C)
-+#define RTL839X_SPCL_TRAP_CRC_CTRL		(0x1070)
-+
-+/* special port action controls */
-+/* 
-+    values:
-+	0 = FORWARD (default)
-+	1 = DROP
-+	2 = TRAP2CPU
-+	3 = FLOOD IN ALL PORT
-+	
-+	Register encoding.
-+	offset = CTRL + (port >> 4) << 2
-+	value/mask = 3 << ((port&0xF) << 1)
-+*/
-+
-+typedef enum {
-+	BPDU = 0,
-+	PTP,
-+	PTP_UDP,
-+	PTP_ETH2,
-+	LLTP,
-+	EAPOL,
-+	GRATARP,
-+} rma_ctrl_t;
-+
-+typedef enum {
-+	FORWARD = 0,
-+	DROP,
-+	TRAP2CPU,
-+	FLOODALL,
-+	TRAP2MASTERCPU,
-+	COPY2CPU,
-+} action_type_t;
-+
-+
-+#define RTL838X_RMA_BPDU_CTRL		(0x4330) 
-+#define RTL839X_RMA_BPDU_CTRL		(0x122C)
-+#define RTL930X_RMA_BPDU_CTRL		(0x9E7C)
-+#define RTL931X_RMA_BPDU_CTRL		(0x881C)
-+
-+#define RTL838X_RMA_PTP_CTRL		(0x4338) 
-+#define RTL839X_RMA_PTP_CTRL		(0x123C)
-+#define RTL930X_RMA_PTP_CTRL		(0x9E88)
-+#define RTL931X_RMA_PTP_CTRL		(0x8834)
-+
-+#define RTL838X_RMA_LLTP_CTRL		(0x4340) 
-+#define RTL839X_RMA_LLTP_CTRL		(0x124C)
-+#define RTL930X_RMA_LLTP_CTRL		(0x9EFC)
-+#define RTL931X_RMA_LLTP_CTRL		(0x8918)
-+
-+#define RTL930X_RMA_EAPOL_CTRL		(0x9F08)
-+#define RTL931X_RMA_EAPOL_CTRL		(0x8930)
-+#define RTL931X_TRAP_ARP_GRAT_PORT_ACT  (0x8C04)
-+
-+/* QoS */
-+#define RTL838X_QM_INTPRI2QID_CTRL		(0x5F00)
-+#define RTL839X_QM_INTPRI2QID_CTRL(q)		(0x1110 + (q << 2))
-+#define RTL839X_QM_PORT_QNUM(p)			(0x1130 + (((p / 10) << 2)))
-+#define RTL838X_PRI_SEL_PORT_PRI(p)		(0x5FB8 + (((p / 10) << 2)))
-+#define RTL839X_PRI_SEL_PORT_PRI(p)		(0x10A8 + (((p / 10) << 2)))
-+#define RTL838X_QM_PKT2CPU_INTPRI_MAP		(0x5F10)
-+#define RTL839X_QM_PKT2CPU_INTPRI_MAP		(0x1154)
-+#define RTL838X_PRI_SEL_CTRL			(0x10E0)
-+#define RTL839X_PRI_SEL_CTRL			(0x10E0)
-+#define RTL838X_PRI_SEL_TBL_CTRL(i)		(0x5FD8 + (((i) << 2)))
-+#define RTL839X_PRI_SEL_TBL_CTRL(i)		(0x10D0 + (((i) << 2)))
-+#define RTL838X_QM_PKT2CPU_INTPRI_0		(0x5F04)
-+#define RTL838X_QM_PKT2CPU_INTPRI_1		(0x5F08)
-+#define RTL838X_QM_PKT2CPU_INTPRI_2		(0x5F0C)
-+#define RTL839X_OAM_CTRL			(0x2100)
-+#define RTL839X_OAM_PORT_ACT_CTRL(p)	 	(0x2104 + (((p) << 2)))
-+#define RTL839X_RMK_PORT_DEI_TAG_CTRL(p)	(0x6A9C + (((p >> 5) << 2)))
-+#define RTL839X_PRI_SEL_IPRI_REMAP		(0x1080)
-+#define RTL838X_PRI_SEL_IPRI_REMAP		(0x5F8C)
-+#define RTL839X_PRI_SEL_DEI2DP_REMAP		(0x10EC)
-+#define RTL839X_PRI_SEL_DSCP2DP_REMAP_ADDR(i)	(0x10F0 + (((i >> 4) << 2)))
-+#define RTL839X_RMK_DEI_CTRL			(0x6AA4)
-+#define RTL839X_WRED_PORT_THR_CTRL(i)		(0x6084 + ((i) << 2))
-+#define RTL839X_WRED_QUEUE_THR_CTRL(q, i) 	(0x6090 + ((q) * 12) + ((i) << 2))
-+#define RTL838X_PRI_DSCP_INVLD_CTRL0		(0x5FE8)
-+#define RTL838X_RMK_IPRI_CTRL			(0xA460)
-+#define RTL838X_RMK_OPRI_CTRL			(0xA464)
-+#define RTL838X_SCHED_P_TYPE_CTRL(p)		(0xC04C + ((p) << 7))
-+#define RTL838X_SCHED_LB_CTRL(p)		(0xC004 + ((p) << 7))
-+#define RTL838X_FC_P_EGR_DROP_CTRL(p)		(0x6B1C + ((p) << 2))
-+
-+/* Debug features */
-+#define RTL930X_STAT_PRVTE_DROP_COUNTER0	(0xB5B8)
-+
-+/* Packet Inspection Engine */
-+#define RTL838X_METER_GLB_CTRL			(0x4B08)
-+#define RTL839X_METER_GLB_CTRL			(0x1300)
-+#define RTL930X_METER_GLB_CTRL			(0xa0a0)
-+#define RTL839X_ACL_CTRL			(0x1288)
-+#define RTL838X_ACL_BLK_LOOKUP_CTRL		(0x6100)
-+#define RTL839X_ACL_BLK_LOOKUP_CTRL		(0x1280)
-+#define RTL930X_PIE_BLK_LOOKUP_CTRL		(0xa5a0)
-+#define RTL838X_ACL_BLK_PWR_CTRL		(0x6104)
-+#define RTL839X_PS_ACL_PWR_CTRL			(0x049c)
-+#define RTL838X_ACL_BLK_TMPLTE_CTRL(block)	(0x6108 + ((block) << 2))
-+#define RTL839X_ACL_BLK_TMPLTE_CTRL(block)	(0x128c + ((block) << 2))
-+#define RTL930X_PIE_BLK_TMPLTE_CTRL(block)	(0xa624 + ((block) << 2))
-+#define RTL838X_ACL_BLK_GROUP_CTRL		(0x615C)
-+#define RTL839X_ACL_BLK_GROUP_CTRL		(0x12ec)
-+#define RTL838X_ACL_CLR_CTRL			(0x6168)
-+#define RTL839X_ACL_CLR_CTRL			(0x12fc)
-+#define RTL930X_PIE_CLR_CTRL			(0xa66c)
-+#define RTL838X_DMY_REG27			(0x3378)
-+#define RTL838X_ACL_PORT_LOOKUP_CTRL(p)		(0x616C + (((p) << 2)))
-+#define RTL930X_ACL_PORT_LOOKUP_CTRL(p)		(0xA784 + (((p) << 2)))
-+#define RTL930X_PIE_BLK_PHASE_CTRL		(0xA5A4)
-+
-+// PIE actions
-+#define PIE_ACT_COPY_TO_PORT	2
-+#define PIE_ACT_REDIRECT_TO_PORT 4
-+#define PIE_ACT_ROUTE_UC	6
-+#define PIE_ACT_VID_ASSIGN	0
-+
-+// L3 actions
-+#define L3_FORWARD		0
-+#define L3_DROP			1
-+#define L3_TRAP2CPU		2
-+#define L3_COPY2CPU		3
-+#define L3_TRAP2MASTERCPU	4
-+#define L3_COPY2MASTERCPU	5
-+#define L3_HARDDROP		6
-+
-+// Route actions
-+#define ROUTE_ACT_FORWARD	0
-+#define ROUTE_ACT_TRAP2CPU	1
-+#define ROUTE_ACT_COPY2CPU	2
-+#define ROUTE_ACT_DROP		3
-+
-+/* L3 Routing */
-+#define RTL839X_ROUTING_SA_CTRL 		0x6afc
-+#define RTL930X_L3_HOST_TBL_CTRL		(0xAB48)
-+#define RTL930X_L3_IPUC_ROUTE_CTRL		(0xAB4C)
-+#define RTL930X_L3_IP6UC_ROUTE_CTRL		(0xAB50)
-+#define RTL930X_L3_IPMC_ROUTE_CTRL		(0xAB54)
-+#define RTL930X_L3_IP6MC_ROUTE_CTRL		(0xAB58)
-+#define RTL930X_L3_IP_MTU_CTRL(i)		(0xAB5C + ((i >> 1) << 2))
-+#define RTL930X_L3_IP6_MTU_CTRL(i)		(0xAB6C + ((i >> 1) << 2))
-+#define RTL930X_L3_HW_LU_KEY_CTRL		(0xAC9C)
-+#define RTL930X_L3_HW_LU_KEY_IP_CTRL		(0xACA0)
-+#define RTL930X_L3_HW_LU_CTRL			(0xACC0)
-+#define RTL930X_L3_IP_ROUTE_CTRL		0xab44
-+
-+#define MAX_VLANS 4096
-+#define MAX_LAGS 16
-+#define MAX_PRIOS 8
-+#define RTL930X_PORT_IGNORE 0x3f
-+#define MAX_MC_GROUPS 512
-+#define UNKNOWN_MC_PMASK (MAX_MC_GROUPS - 1)
-+#define PIE_BLOCK_SIZE 128
-+#define MAX_PIE_ENTRIES (18 * PIE_BLOCK_SIZE)
-+#define N_FIXED_FIELDS 12
-+#define MAX_ROUTES 512
-+#define MAX_HOST_ROUTES 1536
-+#define MAX_COUNTERS 2048
-+#define MAX_INTF_MTUS 8
-+#define DEFAULT_MTU 1536
-+#define MAX_INTERFACES 100
-+#define MAX_ROUTER_MACS 64
-+#define L3_EGRESS_DMACS 2048
-+#define MAX_SMACS 64
-+
-+enum phy_type {
-+	PHY_NONE = 0,
-+	PHY_RTL838X_SDS = 1,
-+	PHY_RTL8218B_INT = 2,
-+	PHY_RTL8218B_EXT = 3,
-+	PHY_RTL8214FC = 4,
-+	PHY_RTL839X_SDS = 5,
-+};
-+
-+struct rtl838x_port {
-+	bool enable;
-+	u64 pm;
-+	u16 pvid;
-+	bool eee_enabled;
-+	enum phy_type phy;
-+	bool is10G;
-+	bool is2G5;
-+	const struct dsa_port *dp;
-+};
-+
-+struct rtl838x_vlan_info {
-+	u64 untagged_ports;
-+	u64 tagged_ports;
-+	u8 profile_id;
-+	bool hash_mc_fid;
-+	bool hash_uc_fid;
-+	u8 fid;
-+};
-+
-+enum l2_entry_type {
-+	L2_INVALID = 0,
-+	L2_UNICAST = 1,
-+	L2_MULTICAST = 2,
-+	IP4_MULTICAST = 3,
-+	IP6_MULTICAST = 4,
-+};
-+
-+struct rtl838x_l2_entry {
-+	u8 mac[6];
-+	u16 vid;
-+	u16 rvid;
-+	u8 port;
-+	bool valid;
-+	enum l2_entry_type type;
-+	bool is_static;
-+	bool is_ip_mc;
-+	bool is_ipv6_mc;
-+	bool block_da;
-+	bool block_sa;
-+	bool suspended;
-+	bool next_hop;
-+	int age;
-+	u8 trunk;
-+	bool is_trunk;
-+	u8 stack_dev;
-+	u16 mc_portmask_index;
-+	u32 mc_gip;
-+	u32 mc_sip;
-+	u16 mc_mac_index;
-+	u16 nh_route_id;
-+	bool nh_vlan_target;  // Only RTL83xx: VLAN used for next hop: 0: inner, 1: outer
-+};
-+
-+enum fwd_rule_action {
-+	FWD_RULE_ACTION_NONE = 0,
-+	FWD_RULE_ACTION_FWD = 1,
-+};
-+
-+enum pie_phase {
-+	PHASE_VACL = 0,
-+	PHASE_IACL = 1,
-+};
-+
-+/* Intermediate representation of a  Packet Inspection Engine Rule
-+ * as suggested by the Kernel's tc flower offload subsystem
-+ * Field meaning is universal across SoC families, but data content is specific
-+ * to SoC family (e.g. because of different port ranges) */
-+struct pie_rule {
-+	int id;
-+	enum pie_phase phase;	// Phase in which this template is applied
-+	int packet_cntr;	// ID of a packet counter assigned to this rule
-+	int octet_cntr;		// ID of a byte counter assigned to this rule
-+	u32 last_packet_cnt;
-+	u64 last_octet_cnt;
-+
-+	// The following are requirements for the pie template
-+	bool is_egress;
-+	bool is_ipv6;		// This is a rule with IPv6 fields
-+
-+	// Fixed fields that are always matched against on RTL8380
-+	u8 spmmask_fix;
-+	u8 spn;			// Source port number
-+	bool stacking_port;	// Source port is stacking port
-+	bool mgnt_vlan;		// Packet arrived on management VLAN
-+	bool dmac_hit_sw;	// The packet's destination MAC matches one of the device's
-+	bool content_too_deep;	// The content of the packet cannot be parsed: too many layers
-+	bool not_first_frag;	// Not the first IP frament
-+	u8 frame_type_l4;	// 0: UDP, 1: TCP, 2: ICMP/ICMPv6, 3: IGMP
-+	u8 frame_type;		// 0: ARP, 1: L2 only, 2: IPv4, 3: IPv6
-+	bool otag_fmt;		// 0: outer tag packet, 1: outer priority tag or untagged
-+	bool itag_fmt;		// 0: inner tag packet, 1: inner priority tag or untagged
-+	bool otag_exist;	// packet with outer tag
-+	bool itag_exist;	// packet with inner tag
-+	bool frame_type_l2;	// 0: Ethernet, 1: LLC_SNAP, 2: LLC_Other, 3: Reserved
-+	bool igr_normal_port;	// Ingress port is not cpu or stacking port
-+	u8 tid;			// The template ID defining the what the templated fields mean
-+
-+	// Masks for the fields that are always matched against on RTL8380
-+	u8 spmmask_fix_m;
-+	u8 spn_m;
-+	bool stacking_port_m;
-+	bool mgnt_vlan_m;
-+	bool dmac_hit_sw_m;
-+	bool content_too_deep_m;
-+	bool not_first_frag_m;
-+	u8 frame_type_l4_m;
-+	u8 frame_type_m;
-+	bool otag_fmt_m;
-+	bool itag_fmt_m;
-+	bool otag_exist_m;
-+	bool itag_exist_m;
-+	bool frame_type_l2_m;
-+	bool igr_normal_port_m;
-+	u8 tid_m;
-+
-+	// Logical operations between rules, special rules for rule numbers apply
-+	bool valid;
-+	bool cond_not;		// Matches when conditions not match
-+	bool cond_and1;		// And this rule 2n with the next rule 2n+1 in same block
-+	bool cond_and2;		// And this rule m in block 2n with rule m in block 2n+1
-+	bool ivalid;
-+
-+	// Actions to be performed
-+	bool drop;		// Drop the packet
-+	bool fwd_sel;		// Forward packet: to port, portmask, dest route, next rule, drop
-+	bool ovid_sel;		// So something to outer vlan-id: shift, re-assign
-+	bool ivid_sel;		// Do something to inner vlan-id: shift, re-assign
-+	bool flt_sel;		// Filter the packet when sending to certain ports
-+	bool log_sel;		// Log the packet in one of the LOG-table counters
-+	bool rmk_sel;		// Re-mark the packet, i.e. change the priority-tag
-+	bool meter_sel;		// Meter the packet, i.e. limit rate of this type of packet
-+	bool tagst_sel;		// Change the ergress tag
-+	bool mir_sel;		// Mirror the packet to a Link Aggregation Group
-+	bool nopri_sel;		// Change the normal priority
-+	bool cpupri_sel;	// Change the CPU priority
-+	bool otpid_sel;		// Change Outer Tag Protocol Identifier (802.1q)
-+	bool itpid_sel;		// Change Inner Tag Protocol Identifier (802.1q)
-+	bool shaper_sel;	// Apply traffic shaper
-+	bool mpls_sel;		// MPLS actions
-+	bool bypass_sel;	// Bypass actions
-+	bool fwd_sa_lrn;	// Learn the source address when forwarding
-+	bool fwd_mod_to_cpu;	// Forward the modified VLAN tag format to CPU-port
-+
-+	// Fields used in predefined templates 0-2 on RTL8380 / 90 / 9300
-+	u64 spm;		// Source Port Matrix
-+	u16 otag;		// Outer VLAN-ID
-+	u8 smac[ETH_ALEN];	// Source MAC address
-+	u8 dmac[ETH_ALEN];	// Destination MAC address
-+	u16 ethertype;		// Ethernet frame type field in ethernet header
-+	u16 itag;		// Inner VLAN-ID
-+	u16 field_range_check;
-+	u32 sip;		// Source IP
-+	struct in6_addr sip6;	// IPv6 Source IP
-+	u32 dip;		// Destination IP
-+	struct in6_addr dip6;	// IPv6 Destination IP
-+	u16 tos_proto;		// IPv4: TOS + Protocol fields, IPv6: Traffic class + next header
-+	u16 sport;		// TCP/UDP source port
-+	u16 dport;		// TCP/UDP destination port
-+	u16 icmp_igmp;
-+	u16 tcp_info;
-+	u16 dsap_ssap;		// Destination / Source Service Access Point bytes (802.3)
-+
-+	u64 spm_m;
-+	u16 otag_m;
-+	u8 smac_m[ETH_ALEN];
-+	u8 dmac_m[ETH_ALEN];
-+	u8 ethertype_m;
-+	u16 itag_m;
-+	u16 field_range_check_m;
-+	u32 sip_m;
-+	struct in6_addr sip6_m;	// IPv6 Source IP mask
-+	u32 dip_m;
-+	struct in6_addr dip6_m;	// IPv6 Destination IP mask
-+	u16 tos_proto_m;
-+	u16 sport_m;
-+	u16 dport_m;
-+	u16 icmp_igmp_m;
-+	u16 tcp_info_m;
-+	u16 dsap_ssap_m;
-+
-+	// Data associated with actions
-+	u8 fwd_act;		// Type of forwarding action
-+				// 0: permit, 1: drop, 2: copy to port id, 4: copy to portmask
-+				// 4: redirect to portid, 5: redirect to portmask
-+				// 6: route, 7: vlan leaky (only 8380)
-+	u16 fwd_data;		// Additional data for forwarding action, e.g. destination port
-+	u8 ovid_act;
-+	u16 ovid_data;		// Outer VLAN ID
-+	u8 ivid_act;
-+	u16 ivid_data;		// Inner VLAN ID
-+	u16 flt_data;		// Filtering data
-+	u16 log_data;		// ID of packet or octet counter in LOG table, on RTL93xx
-+				// unnecessary since PIE-Rule-ID == LOG-counter-ID
-+	bool log_octets;
-+	u8 mpls_act;		// MPLS action type
-+	u16 mpls_lib_idx;	// MPLS action data
-+
-+	u16 rmk_data;		// Data for remarking
-+	u16 meter_data;		// ID of meter for bandwidth control
-+	u16 tagst_data;
-+	u16 mir_data;
-+	u16 nopri_data;
-+	u16 cpupri_data;
-+	u16 otpid_data;
-+	u16 itpid_data;
-+	u16 shaper_data;
-+
-+	// Bypass actions, ignored on RTL8380
-+	bool bypass_all;	// Not clear
-+	bool bypass_igr_stp;	// Bypass Ingress STP state
-+	bool bypass_ibc_sc;	// Bypass Ingress Bandwidth Control and Storm Control
-+};
-+
-+struct rtl838x_l3_intf {
-+	u16 vid;
-+	u8 smac_idx;
-+	u8 ip4_mtu_id;
-+	u8 ip6_mtu_id;
-+	u16 ip4_mtu;
-+	u16 ip6_mtu;
-+	u8 ttl_scope;
-+	u8 hl_scope;
-+	u8 ip4_icmp_redirect;
-+	u8 ip6_icmp_redirect;
-+	u8 ip4_pbr_icmp_redirect;
-+	u8 ip6_pbr_icmp_redirect;
-+};
-+
-+/*
-+ * An entry in the RTL93XX SoC's ROUTER_MAC tables setting up a termination point
-+ * for the L3 routing system. Packets arriving and matching an entry in this table
-+ * will be considered for routing.
-+ * Mask fields state whether the corresponding data fields matter for matching
-+ */
-+struct rtl93xx_rt_mac {
-+	bool valid;	// Valid or not
-+	bool p_type;	// Individual (0) or trunk (1) port
-+	bool p_mask;	// Whether the port type is used
-+	u8 p_id;
-+	u8 p_id_mask;	// Mask for the port
-+	u8 action;	// Routing action performed: 0: FORWARD, 1: DROP, 2: TRAP2CPU
-+			//   3: COPY2CPU, 4: TRAP2MASTERCPU, 5: COPY2MASTERCPU, 6: HARDDROP
-+	u16 vid;
-+	u16 vid_mask;
-+	u64 mac;	// MAC address used as source MAC in the routed packet
-+	u64 mac_mask;
-+};
-+
-+struct rtl83xx_nexthop {
-+	u16 id;		// ID: L3_NEXT_HOP table-index or route-index set in L2_NEXT_HOP
-+	u32 dev_id;
-+	u16 port;
-+	u16 vid;	// VLAN-ID for L2 table entry (saved from L2-UC entry)
-+	u16 rvid;	// Relay VID/FID for the L2 table entry
-+	u64 mac;	// The MAC address of the entry in the L2_NEXT_HOP table
-+	u16 mac_id;
-+	u16 l2_id;	// Index of this next hop forwarding entry in L2 FIB table
-+	u64 gw;		// The gateway MAC address packets are forwarded to
-+	int if_id;	// Interface (into L3_EGR_INTF_IDX)
-+};
-+
-+struct rtl838x_switch_priv;
-+
-+struct rtl83xx_flow {
-+	unsigned long cookie;
-+	struct rhash_head node;
-+	struct rtl838x_switch_priv *priv;
-+	struct pie_rule rule;
-+	u32 flags;
-+};
-+
-+struct rtl93xx_route_attr {
-+	bool valid;
-+	bool hit;
-+	bool ttl_dec;
-+	bool ttl_check;
-+	bool dst_null;
-+	bool qos_as;
-+	u8 qos_prio;
-+	u8 type;
-+	u8 action;
-+};
-+
-+struct rtl83xx_route {
-+	u32 gw_ip;			// IP of the route's gateway
-+	u32 dst_ip;			// IP of the destination net
-+	struct in6_addr dst_ip6;
-+	int prefix_len;			// Network prefix len of the destination net
-+	bool is_host_route;
-+	int id;				// ID number of this route
-+	struct rhlist_head linkage;
-+	u16 switch_mac_id;		// Index into switch's own MACs, RTL839X only
-+	struct rtl83xx_nexthop nh;
-+	struct pie_rule pr;
-+	struct rtl93xx_route_attr attr;
-+};
-+
-+struct rtl838x_reg {
-+	void (*mask_port_reg_be)(u64 clear, u64 set, int reg);
-+	void (*set_port_reg_be)(u64 set, int reg);
-+	u64 (*get_port_reg_be)(int reg);
-+	void (*mask_port_reg_le)(u64 clear, u64 set, int reg);
-+	void (*set_port_reg_le)(u64 set, int reg);
-+	u64 (*get_port_reg_le)(int reg);
-+	int (*port_iso_ctrl)(int p);
-+	void (*traffic_enable)(int source, int dest);
-+	void (*traffic_disable)(int source, int dest);
-+	void (*traffic_set)(int source, u64 dest_matrix);
-+	u64 (*traffic_get)(int source);
-+	void (*exec_tbl0_cmd)(u32 cmd);
-+	void (*exec_tbl1_cmd)(u32 cmd);
-+	int (*tbl_access_data_0)(int i);
-+	void (*vlan_tables_read)(u32 vlan, struct rtl838x_vlan_info *info);
-+	void (*vlan_set_tagged)(u32 vlan, struct rtl838x_vlan_info *info);
-+	void (*vlan_set_untagged)(u32 vlan, u64 portmask);
-+	void (*vlan_profile_dump)(int index);
-+	void (*vlan_profile_setup)(int profile);
-+	void (*stp_get)(struct rtl838x_switch_priv *priv, u16 msti, u32 port_state[]);
-+	void (*stp_set)(struct rtl838x_switch_priv *priv, u16 msti, u32 port_state[]);
-+	int  (*mac_force_mode_ctrl)(int port);
-+	int  (*mac_port_ctrl)(int port);
-+	int  (*l2_port_new_salrn)(int port);
-+	int  (*l2_port_new_sa_fwd)(int port);
-+	int  (*mac_link_spd_sts)(int port);
-+	u64 (*read_l2_entry_using_hash)(u32 hash, u32 position, struct rtl838x_l2_entry *e);
-+	void (*write_l2_entry_using_hash)(u32 hash, u32 pos, struct rtl838x_l2_entry *e);
-+	u64 (*read_cam)(int idx, struct rtl838x_l2_entry *e);
-+	void (*write_cam)(int idx, struct rtl838x_l2_entry *e);
-+	int (*rtl838x_vlan_port_tag_sts_ctrl)(int port);
-+	int (*trk_mbr_ctr)(int group);
-+	void (*init_eee)(struct rtl838x_switch_priv *priv, bool enable);
-+	void (*port_eee_set)(struct rtl838x_switch_priv *priv, int port, bool enable);
-+	int (*eee_port_ability)(struct rtl838x_switch_priv *priv,
-+				struct ethtool_eee *e, int port);
-+	u64 (*l2_hash_seed)(u64 mac, u32 vid);
-+	u32 (*l2_hash_key)(struct rtl838x_switch_priv *priv, u64 seed);
-+	u64 (*read_mcast_pmask)(int idx);
-+	void (*write_mcast_pmask)(int idx, u64 portmask);
-+	void (*vlan_fwd_on_inner)(int port, bool is_set);
-+	void (*pie_init)(struct rtl838x_switch_priv *priv);
-+	int (*pie_rule_read)(struct rtl838x_switch_priv *priv, int idx, struct  pie_rule *pr);
-+	int (*pie_rule_write)(struct rtl838x_switch_priv *priv, int idx, struct pie_rule *pr);
-+	int (*pie_rule_add)(struct rtl838x_switch_priv *priv, struct pie_rule *rule);
-+	void (*pie_rule_rm)(struct rtl838x_switch_priv *priv, struct pie_rule *rule);
-+	void (*route_read)(int idx, struct rtl83xx_route *rt);
-+	void (*route_write)(int idx, struct rtl83xx_route *rt);
-+	void (*host_route_write)(int idx, struct rtl83xx_route *rt);
-+	int (*l3_setup)(struct rtl838x_switch_priv *priv);
-+	void (*set_l3_nexthop)(int idx, u16 dmac_id, u16 interface);
-+	void (*get_l3_nexthop)(int idx, u16 *dmac_id, u16 *interface);
-+	void (*l2_learning_setup)(void);
-+	u64 (*get_l3_egress_mac)(u32 idx);
-+	void (*set_l3_egress_mac)(u32 idx, u64 mac);
-+	int (*find_l3_slot)(struct rtl83xx_route *rt, bool must_exist);
-+	int (*route_lookup_hw)(struct rtl83xx_route *rt);
-+	void (*get_l3_router_mac)(u32 idx, struct rtl93xx_rt_mac *m);
-+	void (*set_l3_router_mac)(u32 idx, struct rtl93xx_rt_mac *m);
-+	void (*set_l3_egress_intf)(int idx, struct rtl838x_l3_intf *intf);
-+	u32 (*packet_cntr_read)(int counter);
-+	void (*packet_cntr_clear)(int counter);
-+	void (*enable_learning)(int port, bool enable);
-+	void (*enable_flood)(int port, bool enable);
-+	void (*enable_mcast_flood)(int port, bool enable);
-+	void (*enable_bcast_flood)(int port, bool enable);
-+	void (*set_distribution_algorithm)(int group, int algoidx, u32 algomask);
-+	void (*set_receive_management_action)(int port, rma_ctrl_t type, action_type_t action);
-+	u32 stat_port_rst;
-+	u32 stat_rst;
-+	u32 stat_port_std_mib;
-+	u32 l2_ctrl_0;
-+	u32 l2_ctrl_1;
-+	u32 l2_port_aging_out;
-+	u32 smi_poll_ctrl;
-+	u32 l2_tbl_flush_ctrl;
-+	u32 isr_glb_src;
-+	u32 isr_port_link_sts_chg;
-+	u32 imr_port_link_sts_chg;
-+	u32 imr_glb;
-+	u32 mir_ctrl;
-+	u32 mir_dpm;
-+	u32 mir_spm;
-+	u32 mac_link_sts;
-+	u32 mac_link_dup_sts;
-+	u32 mac_rx_pause_sts;
-+	u32 mac_tx_pause_sts;
-+	u32 vlan_port_egr_filter;
-+	u32 vlan_port_igr_filter;
-+	u32 vlan_port_pb;
-+	u32 vlan_port_tag_sts_ctrl;
-+	u32 rma_bpdu_fld_pmask;
-+	u32 rma_bpdu_ctrl;
-+    	u32 rma_ptp_ctrl;
-+	u32 rma_lltp_ctrl;
-+	u32 rma_eapol_ctrl;
-+	u32 rma_bpdu_ctrl_div;
-+	u32 rma_ptp_ctrl_div;
-+	u32 rma_lltp_ctrl_div;
-+	u32 rma_eapol_ctrl_div;
-+	u32 storm_ctrl_port_uc;
-+	u32 storm_ctrl_port_mc;
-+	u32 storm_ctrl_port_bc;
-+	u32 storm_ctrl_port_uc_shift;
-+	u32 storm_ctrl_port_mc_shift;
-+	u32 storm_ctrl_port_bc_shift;
-+	u32 vlan_ctrl;
-+	u32 spcl_trap_eapol_ctrl;
-+	u32 spcl_trap_arp_ctrl;
-+	u32 spcl_trap_igmp_ctrl;
-+	u32 spcl_trap_ipv6_ctrl;
-+	u32 spcl_trap_switch_mac_ctrl;
-+	u32 spcl_trap_switch_ipv4_addr_ctrl;
-+	u32 spcl_trap_crc_ctrl;
-+	u32 spcl_trap_ctrl;
-+	u32 sflow_ctrl;
-+	u32 sflow_port_rate_ctrl;
-+	u32 trk_hash_idx_ctrl;
-+	u32 trk_hash_ctrl;
-+};
-+
-+
-+
-+struct rtl838x_switch_priv {
-+	/* Switch operation */
-+	struct dsa_switch *ds;
-+	struct device *dev;
-+	u16 id;
-+	u16 family_id;
-+	int mc_group_saves[MAX_MC_GROUPS];
-+	char version;
-+	struct rtl838x_port ports[57];
-+	struct mutex reg_mutex;		// Mutex for individual register manipulations
-+	struct mutex pie_mutex;		// Mutex for Packe Inspection Engine
-+	int link_state_irq;
-+	int mirror_group_ports[4];
-+	struct mii_bus *mii_bus;
-+	const struct rtl838x_reg *r;
-+	u8 cpu_port;
-+	u8 port_mask;
-+	u8 port_width;
-+	u8 port_ignore;
-+	u64 irq_mask;
-+	u32 fib_entries;
-+	int l2_bucket_size;
-+	struct dentry *dbgfs_dir;
-+	int n_lags;
-+	u64 lags_port_members[MAX_LAGS];
-+	struct net_device *lag_devs[MAX_LAGS];
-+	u32 lag_primary[MAX_LAGS];
-+	u32 is_lagmember[57];
-+	u64 lagmembers;
-+	struct notifier_block nb;  // TODO: change to different name
-+	struct notifier_block ne_nb;
-+	struct notifier_block fib_nb;
-+	bool eee_enabled;
-+	unsigned long int mc_group_bm[MAX_MC_GROUPS >> 5];
-+	int n_pie_blocks;
-+	struct rhashtable tc_ht;
-+	unsigned long int pie_use_bm[MAX_PIE_ENTRIES >> 5];
-+	struct rhltable routes;
-+	unsigned long int route_use_bm[MAX_ROUTES >> 5];
-+	unsigned long int host_route_use_bm[MAX_HOST_ROUTES >> 5];
-+	int n_counters;
-+	unsigned long int octet_cntr_use_bm[MAX_COUNTERS >> 5];
-+	unsigned long int packet_cntr_use_bm[MAX_COUNTERS >> 4];
-+	struct rtl838x_l3_intf *interfaces[MAX_INTERFACES];
-+	u16 intf_mtus[MAX_INTF_MTUS];
-+	int intf_mtu_count[MAX_INTF_MTUS];
-+};
-+
-+void rtl838x_dbgfs_init(struct rtl838x_switch_priv *priv);
-+void rtl930x_dbgfs_init(struct rtl838x_switch_priv *priv);
-+
-+#endif /* _RTL838X_H */
-diff --git a/target/linux/realtek/files-5.4/net/dsa/tag_rtl83xx.c b/target/linux/realtek/files-5.4/net/dsa/tag_rtl83xx.c
-new file mode 100644
-index 0000000000..7c6d060210
---- /dev/null
-+++ b/target/linux/realtek/files-5.4/net/dsa/tag_rtl83xx.c
-@@ -0,0 +1,119 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * net/dsa/tag_trailer.c - Trailer tag format handling
-+ * Copyright (c) 2008-2009 Marvell Semiconductor
-+ */
-+
-+#include <linux/etherdevice.h>
-+#include <linux/list.h>
-+#include <linux/slab.h>
-+#include <linux/rtl838x.h>
-+
-+#include "dsa_priv.h"
-+
-+static struct sk_buff *trailer_xmit(struct sk_buff *skb, struct net_device *dev)
-+{
-+	struct dsa_port *dp = dsa_slave_to_port(dev);
-+	struct sk_buff *nskb;
-+	int padlen;
-+	u8 *trailer;
-+
-+	/*
-+	 * We have to make sure that the trailer ends up as the very
-+	 * last 4 bytes of the packet.  This means that we have to pad
-+	 * the packet to the minimum ethernet frame size, if necessary,
-+	 * before adding the trailer.
-+	 */
-+	padlen = 0;
-+	if (skb->len < 60)
-+		padlen = 60 - skb->len;
-+
-+	nskb = alloc_skb(NET_IP_ALIGN + skb->len + padlen + 4, GFP_ATOMIC);
-+	if (!nskb)
-+		return NULL;
-+	skb_reserve(nskb, NET_IP_ALIGN);
-+
-+	skb_reset_mac_header(nskb);
-+	skb_set_network_header(nskb, skb_network_header(skb) - skb->head);
-+	skb_set_transport_header(nskb, skb_transport_header(skb) - skb->head);
-+	skb_copy_and_csum_dev(skb, skb_put(nskb, skb->len));
-+	consume_skb(skb);
-+
-+	if (padlen) {
-+		skb_put_zero(nskb, padlen);
-+	}
-+
-+	trailer = skb_put(nskb, 4);
-+	trailer[0] = 0x80;
-+
-+	trailer[1] = dp->index;
-+	trailer[2] = 0x10;
-+	trailer[3] = 0x00;
-+
-+	return nskb;
-+}
-+
-+static struct sk_buff *trailer_rcv(struct sk_buff *skb, struct net_device *dev,
-+				   struct packet_type *pt)
-+{
-+	struct dsa_port *cpu_dp = dev->dsa_ptr;
-+	struct dsa_switch *ds = cpu_dp->ds;
-+	int i;
-+	struct rtl838x_switch_priv *priv = ds->priv;
-+	u8 *trailer;
-+	bool trunk = false;
-+	int source_port;
-+
-+	if (skb_linearize(skb))
-+		return NULL;
-+
-+	trailer = skb_tail_pointer(skb) - 4;
-+
-+//	pr_info("lag member %X:%X:%X:%X found\n", trailer[0], trailer[1], trailer[2],trailer[3]);
-+	if (trailer[0] != 0x80 || (trailer[1] & 0x80) != 0x00 ||
-+	    (trailer[2] & 0xef) != 0x00 || trailer[3] != 0x00)
-+		return NULL;
-+
-+	if (trailer[1] & 0x40) { // forward
-+		skb->offload_fwd_mark = 1;
-+		struct dsa_switch *ds = cpu_dp->ds;
-+		struct rtl838x_switch_priv *priv = ds->priv;
-+		skb->offload_fwd_mark = 1;
-+		if (priv->lagmembers & (1ULL << source_port)) {
-+			pr_info("lag member %d found\n", source_port);
-+			trunk = true;
-+		}
-+	}
-+	source_port = trailer[1] & 0x3f;
-+	
-+	if (trunk) {
-+
-+		/* The exact source port is not available in the tag,
-+		 * so we inject the frame directly on the upper
-+		 * team/bond.
-+		 */
-+		skb->dev = dsa_lag_dev(cpu_dp->dst, source_port);
-+	} else {
-+		skb->dev = dsa_master_find_slave(dev, 0, source_port);
-+	}
-+	if (!skb->dev)
-+		return NULL;
-+
-+	if (pskb_trim_rcsum(skb, skb->len - 4))
-+		return NULL;
-+
-+	return skb;
-+}
-+
-+static const struct dsa_device_ops trailer_netdev_ops = {
-+	.name	= "rtl83xx",
-+	.proto	= DSA_TAG_PROTO_RTL83XX,
-+	.xmit	= trailer_xmit,
-+	.rcv	= trailer_rcv,
-+	.overhead = 4,
-+};
-+
-+MODULE_LICENSE("GPL");
-+MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_RTL83XX);
-+
-+module_dsa_tag_driver(trailer_netdev_ops);
-diff --git a/target/linux/realtek/image/Makefile b/target/linux/realtek/image/Makefile
-index 18e5fedb9b..a4b2ea892c 100644
---- a/target/linux/realtek/image/Makefile
-+++ b/target/linux/realtek/image/Makefile
-@@ -6,8 +6,6 @@ include $(INCLUDE_DIR)/image.mk
- KERNEL_LOADADDR = 0x80000000
- KERNEL_ENTRY = 0x80000400
- 
--DEVICE_VARS += ZYXEL_VERS
--
- define Build/zyxel-vers
-        ( echo VERS;\
-        for hw in $(1); do\
-@@ -86,45 +84,47 @@ define Device/netgear_gs110tpp-v1
- endef
- TARGET_DEVICES += netgear_gs110tpp-v1
- 
--define Device/zyxel_gs1900
-+define Device/zyxel_gs1900-10hp
-   SOC := rtl8380
-   IMAGE_SIZE := 6976k
-   DEVICE_VENDOR := ZyXEL
--  UIMAGE_MAGIC := 0x83800000
--  KERNEL_INITRAMFS := kernel-bin | append-dtb | gzip | zyxel-vers $$$$(ZYXEL_VERS) | \
--	uImage gzip
--endef
--
--define Device/zyxel_gs1900-10hp
--  $(Device/zyxel_gs1900)
-   DEVICE_MODEL := GS1900-10HP
--  ZYXEL_VERS := AAZI
-+  UIMAGE_MAGIC := 0x83800000
-+  KERNEL_INITRAMFS := kernel-bin | append-dtb | gzip | zyxel-vers AAZI | uImage gzip
- endef
- TARGET_DEVICES += zyxel_gs1900-10hp
- 
--define Device/zyxel_gs1900-8
--  $(Device/zyxel_gs1900)
--  DEVICE_MODEL := GS1900-8
--  ZYXEL_VERS := AAHH
--endef
--TARGET_DEVICES += zyxel_gs1900-8
--
- define Device/zyxel_gs1900-8hp-v1
--  $(Device/zyxel_gs1900)
-+  SOC := rtl8380
-+  IMAGE_SIZE := 6976k
-+  DEVICE_VENDOR := ZyXEL
-   DEVICE_MODEL := GS1900-8HP
-   DEVICE_VARIANT := v1
--  ZYXEL_VERS := AAHI
-   DEVICE_PACKAGES += lua-rs232
-+  UIMAGE_MAGIC := 0x83800000
-+  KERNEL_INITRAMFS := kernel-bin | append-dtb | gzip | zyxel-vers AAHI | uImage gzip
- endef
- TARGET_DEVICES += zyxel_gs1900-8hp-v1
- 
- define Device/zyxel_gs1900-8hp-v2
--  $(Device/zyxel_gs1900)
-+  SOC := rtl8380
-+  IMAGE_SIZE := 6976k
-+  DEVICE_VENDOR := ZyXEL
-   DEVICE_MODEL := GS1900-8HP
-   DEVICE_VARIANT := v2
--  ZYXEL_VERS := AAHI
-   DEVICE_PACKAGES += lua-rs232
-+  UIMAGE_MAGIC := 0x83800000
-+  KERNEL_INITRAMFS := kernel-bin | append-dtb | gzip | zyxel-vers AAHI | uImage gzip
- endef
- TARGET_DEVICES += zyxel_gs1900-8hp-v2
- 
-+define Device/edgecore_ecs4100-12ph
-+  SOC := rtl8392
-+  IMAGE_SIZE := 14336k
-+  DEVICE_VENDOR := Edgecore
-+  DEVICE_MODEL := ECS4100-12PH
-+  DEVICE_PACKAGES += lua-rs232
-+endef
-+TARGET_DEVICES += edgecore_ecs4100-12ph
-+
- $(eval $(call BuildImage))
-diff --git a/target/linux/realtek/patches-5.4/100-dsa-lag.patch b/target/linux/realtek/patches-5.4/100-dsa-lag.patch
-new file mode 100644
-index 0000000000..5a28760ba9
---- /dev/null
-+++ b/target/linux/realtek/patches-5.4/100-dsa-lag.patch
-@@ -0,0 +1,3145 @@
-+Index: linux-5.4.158/drivers/net/bonding/bond_main.c
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/bonding/bond_main.c
-++++ linux-5.4.158/drivers/net/bonding/bond_main.c
-+@@ -1753,6 +1753,8 @@ int bond_enslave(struct net_device *bond
-+ 		goto err_unregister;
-+ 	}
-+ 
-++	bond_lower_state_changed(new_slave);
-++
-+ 	res = bond_sysfs_slave_add(new_slave);
-+ 	if (res) {
-+ 		slave_dbg(bond_dev, slave_dev, "Error %d calling bond_sysfs_slave_add\n", res);
-+Index: linux-5.4.158/drivers/net/dsa/b53/b53_common.c
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/b53/b53_common.c
-++++ linux-5.4.158/drivers/net/dsa/b53/b53_common.c
-+@@ -537,7 +537,7 @@ int b53_enable_port(struct dsa_switch *d
-+ 	if (!dsa_is_user_port(ds, port))
-+ 		return 0;
-+ 
-+-	cpu_port = ds->ports[port].cpu_dp->index;
-++	cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
-+ 
-+ 	b53_br_egress_floods(ds, port, true, true);
-+ 	b53_port_set_learning(dev, port, false);
-+@@ -1674,7 +1674,7 @@ EXPORT_SYMBOL(b53_fdb_dump);
-+ int b53_br_join(struct dsa_switch *ds, int port, struct net_device *br)
-+ {
-+ 	struct b53_device *dev = ds->priv;
-+-	s8 cpu_port = ds->ports[port].cpu_dp->index;
-++	s8 cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
-+ 	u16 pvlan, reg;
-+ 	unsigned int i;
-+ 
-+@@ -1722,7 +1722,7 @@ void b53_br_leave(struct dsa_switch *ds,
-+ {
-+ 	struct b53_device *dev = ds->priv;
-+ 	struct b53_vlan *vl = &dev->vlans[0];
-+-	s8 cpu_port = ds->ports[port].cpu_dp->index;
-++	s8 cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
-+ 	unsigned int i;
-+ 	u16 pvlan, reg, pvid;
-+ 
-+@@ -2395,10 +2395,13 @@ struct b53_device *b53_switch_alloc(stru
-+ 	struct dsa_switch *ds;
-+ 	struct b53_device *dev;
-+ 
-+-	ds = dsa_switch_alloc(base, DSA_MAX_PORTS);
-++	ds = devm_kzalloc(base, sizeof(*ds), GFP_KERNEL);
-+ 	if (!ds)
-+ 		return NULL;
-+ 
-++	ds->dev = base;
-++	ds->num_ports = DSA_MAX_PORTS;
-++
-+ 	dev = devm_kzalloc(base, sizeof(*dev), GFP_KERNEL);
-+ 	if (!dev)
-+ 		return NULL;
-+Index: linux-5.4.158/drivers/net/dsa/bcm_sf2.c
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/bcm_sf2.c
-++++ linux-5.4.158/drivers/net/dsa/bcm_sf2.c
-+@@ -670,7 +670,7 @@ static void bcm_sf2_sw_fixed_state(struc
-+ 		 * state machine and make it go in PHY_FORCING state instead.
-+ 		 */
-+ 		if (!status->link)
-+-			netif_carrier_off(ds->ports[port].slave);
-++			netif_carrier_off(dsa_to_port(ds, port)->slave);
-+ 		status->duplex = DUPLEX_FULL;
-+ 	} else {
-+ 		status->link = true;
-+@@ -736,7 +736,7 @@ static int bcm_sf2_sw_resume(struct dsa_
-+ static void bcm_sf2_sw_get_wol(struct dsa_switch *ds, int port,
-+ 			       struct ethtool_wolinfo *wol)
-+ {
-+-	struct net_device *p = ds->ports[port].cpu_dp->master;
-++	struct net_device *p = dsa_to_port(ds, port)->cpu_dp->master;
-+ 	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
-+ 	struct ethtool_wolinfo pwol = { };
-+ 
-+@@ -760,9 +760,9 @@ static void bcm_sf2_sw_get_wol(struct ds
-+ static int bcm_sf2_sw_set_wol(struct dsa_switch *ds, int port,
-+ 			      struct ethtool_wolinfo *wol)
-+ {
-+-	struct net_device *p = ds->ports[port].cpu_dp->master;
-++	struct net_device *p = dsa_to_port(ds, port)->cpu_dp->master;
-+ 	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
-+-	s8 cpu_port = ds->ports[port].cpu_dp->index;
-++	s8 cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
-+ 	struct ethtool_wolinfo pwol =  { };
-+ 
-+ 	if (p->ethtool_ops->get_wol)
-+Index: linux-5.4.158/drivers/net/dsa/bcm_sf2_cfp.c
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/bcm_sf2_cfp.c
-++++ linux-5.4.158/drivers/net/dsa/bcm_sf2_cfp.c
-+@@ -821,7 +821,7 @@ static int bcm_sf2_cfp_rule_insert(struc
-+ 				   struct ethtool_rx_flow_spec *fs)
-+ {
-+ 	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
-+-	s8 cpu_port = ds->ports[port].cpu_dp->index;
-++	s8 cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
-+ 	__u64 ring_cookie = fs->ring_cookie;
-+ 	unsigned int queue_num, port_num;
-+ 	int ret;
-+@@ -1046,7 +1046,7 @@ static int bcm_sf2_cfp_rule_get_all(stru
-+ int bcm_sf2_get_rxnfc(struct dsa_switch *ds, int port,
-+ 		      struct ethtool_rxnfc *nfc, u32 *rule_locs)
-+ {
-+-	struct net_device *p = ds->ports[port].cpu_dp->master;
-++	struct net_device *p = dsa_to_port(ds, port)->cpu_dp->master;
-+ 	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
-+ 	int ret = 0;
-+ 
-+@@ -1089,7 +1089,7 @@ int bcm_sf2_get_rxnfc(struct dsa_switch
-+ int bcm_sf2_set_rxnfc(struct dsa_switch *ds, int port,
-+ 		      struct ethtool_rxnfc *nfc)
-+ {
-+-	struct net_device *p = ds->ports[port].cpu_dp->master;
-++	struct net_device *p = dsa_to_port(ds, port)->cpu_dp->master;
-+ 	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
-+ 	int ret = 0;
-+ 
-+Index: linux-5.4.158/drivers/net/dsa/dsa_loop.c
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/dsa_loop.c
-++++ linux-5.4.158/drivers/net/dsa/dsa_loop.c
-+@@ -286,10 +286,13 @@ static int dsa_loop_drv_probe(struct mdi
-+ 	dev_info(&mdiodev->dev, "%s: 0x%0x\n",
-+ 		 pdata->name, pdata->enabled_ports);
-+ 
-+-	ds = dsa_switch_alloc(&mdiodev->dev, DSA_MAX_PORTS);
-++	ds = devm_kzalloc(&mdiodev->dev, sizeof(*ds), GFP_KERNEL);
-+ 	if (!ds)
-+ 		return -ENOMEM;
-+ 
-++	ds->dev = &mdiodev->dev;
-++	ds->num_ports = DSA_MAX_PORTS;
-++
-+ 	ps = devm_kzalloc(&mdiodev->dev, sizeof(*ps), GFP_KERNEL);
-+ 	if (!ps)
-+ 		return -ENOMEM;
-+Index: linux-5.4.158/drivers/net/dsa/lan9303-core.c
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/lan9303-core.c
-++++ linux-5.4.158/drivers/net/dsa/lan9303-core.c
-+@@ -1287,10 +1287,12 @@ static int lan9303_register_switch(struc
-+ {
-+ 	int base;
-+ 
-+-	chip->ds = dsa_switch_alloc(chip->dev, LAN9303_NUM_PORTS);
-++	chip->ds = devm_kzalloc(chip->dev, sizeof(*chip->ds), GFP_KERNEL);
-+ 	if (!chip->ds)
-+ 		return -ENOMEM;
-+ 
-++	chip->ds->dev = chip->dev;
-++	chip->ds->num_ports = LAN9303_NUM_PORTS;
-+ 	chip->ds->priv = chip;
-+ 	chip->ds->ops = &lan9303_switch_ops;
-+ 	base = chip->phy_addr_base;
-+Index: linux-5.4.158/drivers/net/dsa/lantiq_gswip.c
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/lantiq_gswip.c
-++++ linux-5.4.158/drivers/net/dsa/lantiq_gswip.c
-+@@ -2013,10 +2013,12 @@ static int gswip_probe(struct platform_d
-+ 	if (!priv->hw_info)
-+ 		return -EINVAL;
-+ 
-+-	priv->ds = dsa_switch_alloc(dev, priv->hw_info->max_ports);
-++	priv->ds = devm_kzalloc(dev, sizeof(*priv->ds), GFP_KERNEL);
-+ 	if (!priv->ds)
-+ 		return -ENOMEM;
-+ 
-++	priv->ds->dev = dev;
-++	priv->ds->num_ports = priv->hw_info->max_ports;
-+ 	priv->ds->priv = priv;
-+ 	priv->ds->ops = &gswip_switch_ops;
-+ 	priv->dev = dev;
-+Index: linux-5.4.158/drivers/net/dsa/microchip/ksz_common.c
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/microchip/ksz_common.c
-++++ linux-5.4.158/drivers/net/dsa/microchip/ksz_common.c
-+@@ -396,10 +396,13 @@ struct ksz_device *ksz_switch_alloc(stru
-+ 	struct dsa_switch *ds;
-+ 	struct ksz_device *swdev;
-+ 
-+-	ds = dsa_switch_alloc(base, DSA_MAX_PORTS);
-++	ds = devm_kzalloc(base, sizeof(*ds), GFP_KERNEL);
-+ 	if (!ds)
-+ 		return NULL;
-+ 
-++	ds->dev = base;
-++	ds->num_ports = DSA_MAX_PORTS;
-++
-+ 	swdev = devm_kzalloc(base, sizeof(*swdev), GFP_KERNEL);
-+ 	if (!swdev)
-+ 		return NULL;
-+Index: linux-5.4.158/drivers/net/dsa/mt7530.c
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/mt7530.c
-++++ linux-5.4.158/drivers/net/dsa/mt7530.c
-+@@ -786,7 +786,7 @@ mt7530_port_set_vlan_unaware(struct dsa_
-+ 
-+ 	for (i = 0; i < MT7530_NUM_PORTS; i++) {
-+ 		if (dsa_is_user_port(ds, i) &&
-+-		    dsa_port_is_vlan_filtering(&ds->ports[i])) {
-++		    dsa_port_is_vlan_filtering(dsa_to_port(ds, i))) {
-+ 			all_user_ports_removed = false;
-+ 			break;
-+ 		}
-+@@ -1217,7 +1217,7 @@ mt7530_setup(struct dsa_switch *ds)
-+ 	 * controller also is the container for two GMACs nodes representing
-+ 	 * as two netdev instances.
-+ 	 */
-+-	dn = ds->ports[MT7530_CPU_PORT].master->dev.of_node->parent;
-++	dn = dsa_to_port(ds, port)->master->dev.of_node->parent;
-+ 	ds->configure_vlan_while_not_filtering = true;
-+ 
-+ 	if (priv->id == ID_MT7530) {
-+@@ -1304,7 +1304,7 @@ mt7530_setup(struct dsa_switch *ds)
-+ 
-+ 	if (!dsa_is_unused_port(ds, 5)) {
-+ 		priv->p5_intf_sel = P5_INTF_SEL_GMAC5;
-+-		interface = of_get_phy_mode(ds->ports[5].dn);
-++		interface = of_get_phy_mode(dsa_to_port(ds, 5)->dn);
-+ 	} else {
-+ 		/* Scan the ethernet nodes. look for GMAC1, lookup used phy */
-+ 		for_each_child_of_node(dn, mac_np) {
-+@@ -1647,10 +1647,13 @@ mt7530_probe(struct mdio_device *mdiodev
-+ 	if (!priv)
-+ 		return -ENOMEM;
-+ 
-+-	priv->ds = dsa_switch_alloc(&mdiodev->dev, DSA_MAX_PORTS);
-++	priv->ds = devm_kzalloc(&mdiodev->dev, sizeof(*priv->ds), GFP_KERNEL);
-+ 	if (!priv->ds)
-+ 		return -ENOMEM;
-+ 
-++	priv->ds->dev = &mdiodev->dev;
-++	priv->ds->num_ports = DSA_MAX_PORTS;
-++
-+ 	/* Use medatek,mcm property to distinguish hardware type that would
-+ 	 * casues a little bit differences on power-on sequence.
-+ 	 */
-+Index: linux-5.4.158/drivers/net/dsa/mv88e6060.c
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/mv88e6060.c
-++++ linux-5.4.158/drivers/net/dsa/mv88e6060.c
-+@@ -270,10 +270,12 @@ static int mv88e6060_probe(struct mdio_d
-+ 
-+ 	dev_info(dev, "switch %s detected\n", name);
-+ 
-+-	ds = dsa_switch_alloc(dev, MV88E6060_PORTS);
-++	ds = devm_kzalloc(dev, sizeof(*ds), GFP_KERNEL);
-+ 	if (!ds)
-+ 		return -ENOMEM;
-+ 
-++	ds->dev = dev;
-++	ds->num_ports = MV88E6060_PORTS;
-+ 	ds->priv = priv;
-+ 	ds->dev = dev;
-+ 	ds->ops = &mv88e6060_switch_ops;
-+Index: linux-5.4.158/drivers/net/dsa/mv88e6xxx/chip.c
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/mv88e6xxx/chip.c
-++++ linux-5.4.158/drivers/net/dsa/mv88e6xxx/chip.c
-+@@ -1075,7 +1075,7 @@ static u16 mv88e6xxx_port_vlan(struct mv
-+ 	if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port))
-+ 		return mv88e6xxx_port_mask(chip);
-+ 
-+-	br = ds->ports[port].bridge_dev;
-++	br = dsa_to_port(ds, port)->bridge_dev;
-+ 	pvlan = 0;
-+ 
-+ 	/* Frames from user ports can egress any local DSA links and CPU ports,
-+@@ -1135,6 +1135,7 @@ static int mv88e6xxx_pri_setup(struct mv
-+ 
-+ static int mv88e6xxx_devmap_setup(struct mv88e6xxx_chip *chip)
-+ {
-++	struct dsa_switch *ds = chip->ds;
-+ 	int target, port;
-+ 	int err;
-+ 
-+@@ -1143,10 +1144,9 @@ static int mv88e6xxx_devmap_setup(struct
-+ 
-+ 	/* Initialize the routing port to the 32 possible target devices */
-+ 	for (target = 0; target < 32; target++) {
-+-		port = 0x1f;
-+-		if (target < DSA_MAX_SWITCHES)
-+-			if (chip->ds->rtable[target] != DSA_RTABLE_NONE)
-+-				port = chip->ds->rtable[target];
-++		port = dsa_routing_port(ds, target);
-++		if (port == ds->num_ports)
-++			port = 0x1f;
-+ 
-+ 		err = mv88e6xxx_g2_device_mapping_write(chip, target, port);
-+ 		if (err)
-+@@ -1250,14 +1250,30 @@ static int mv88e6xxx_mac_setup(struct mv
-+ 
-+ static int mv88e6xxx_pvt_map(struct mv88e6xxx_chip *chip, int dev, int port)
-+ {
-++	struct dsa_switch_tree *dst = chip->ds->dst;
-++	struct dsa_switch *ds;
-++	struct dsa_port *dp;
-+ 	u16 pvlan = 0;
-+ 
-+ 	if (!mv88e6xxx_has_pvt(chip))
-+ 		return -EOPNOTSUPP;
-+ 
-+ 	/* Skip the local source device, which uses in-chip port VLAN */
-+-	if (dev != chip->ds->index)
-++	if (dev != chip->ds->index) {
-+ 		pvlan = mv88e6xxx_port_vlan(chip, dev, port);
-++		ds = dsa_switch_find(dst->index, dev);
-++		dp = ds ? dsa_to_port(ds, port) : NULL;
-++		if (dp && dp->lag_dev) {
-++			/* As the PVT is used to limit flooding of
-++			 * FORWARD frames, which use the LAG ID as the
-++			 * source port, we must translate dev/port to
-++			 * the special "LAG device" in the PVT, using
-++			 * the LAG ID as the port number.
-++			 */
-++			dev = MV88E6XXX_G2_PVT_ADRR_DEV_TRUNK;
-++			port = dsa_lag_id(dst, dp->lag_dev);
-++		}
-++	}
-+ 
-+ 	return mv88e6xxx_g2_pvt_write(chip, dev, port, pvlan);
-+ }
-+@@ -1402,7 +1418,7 @@ static int mv88e6xxx_port_check_hw_vlan(
-+ 			if (dsa_is_dsa_port(ds, i) || dsa_is_cpu_port(ds, i))
-+ 				continue;
-+ 
-+-			if (!ds->ports[i].slave)
-++			if (!dsa_to_port(ds, i)->slave)
-+ 				continue;
-+ 
-+ 			if (vlan.member[i] ==
-+@@ -1410,7 +1426,7 @@ static int mv88e6xxx_port_check_hw_vlan(
-+ 				continue;
-+ 
-+ 			if (dsa_to_port(ds, i)->bridge_dev ==
-+-			    ds->ports[port].bridge_dev)
-++			    dsa_to_port(ds, port)->bridge_dev)
-+ 				break; /* same bridge, check next VLAN */
-+ 
-+ 			if (!dsa_to_port(ds, i)->bridge_dev)
-+@@ -2048,7 +2064,7 @@ static int mv88e6xxx_bridge_map(struct m
-+ 
-+ 	/* Remap the Port VLAN of each local bridge group member */
-+ 	for (port = 0; port < mv88e6xxx_num_ports(chip); ++port) {
-+-		if (chip->ds->ports[port].bridge_dev == br) {
-++		if (dsa_to_port(chip->ds, port)->bridge_dev == br) {
-+ 			err = mv88e6xxx_port_vlan_map(chip, port);
-+ 			if (err)
-+ 				return err;
-+@@ -2065,7 +2081,7 @@ static int mv88e6xxx_bridge_map(struct m
-+ 			break;
-+ 
-+ 		for (port = 0; port < ds->num_ports; ++port) {
-+-			if (ds->ports[port].bridge_dev == br) {
-++			if (dsa_to_port(ds, port)->bridge_dev == br) {
-+ 				err = mv88e6xxx_pvt_map(chip, dev, port);
-+ 				if (err)
-+ 					return err;
-+@@ -5022,6 +5038,271 @@ static int mv88e6xxx_port_egress_floods(
-+ 	return err;
-+ }
-+ 
-++static bool mv88e6xxx_lag_can_offload(struct dsa_switch *ds,
-++				      struct net_device *lag,
-++				      struct netdev_lag_upper_info *info)
-++{
-++	struct dsa_port *dp;
-++	int id, members = 0;
-++
-++	id = dsa_lag_id(ds->dst, lag);
-++	if (id < 0 || id >= ds->num_lag_ids)
-++		return false;
-++
-++	dsa_lag_foreach_port(dp, ds->dst, lag)
-++		/* Includes the port joining the LAG */
-++		members++;
-++
-++	if (members > 8)
-++		return false;
-++
-++	/* We could potentially relax this to include active
-++	 * backup in the future.
-++	 */
-++	if (info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
-++		return false;
-++
-++	/* Ideally we would also validate that the hash type matches
-++	 * the hardware. Alas, this is always set to unknown on team
-++	 * interfaces.
-++	 */
-++	return true;
-++}
-++
-++static int mv88e6xxx_lag_sync_map(struct dsa_switch *ds, struct net_device *lag)
-++{
-++	struct mv88e6xxx_chip *chip = ds->priv;
-++	struct dsa_port *dp;
-++	u16 map = 0;
-++	int id;
-++
-++	id = dsa_lag_id(ds->dst, lag);
-++
-++	/* Build the map of all ports to distribute flows destined for
-++	 * this LAG. This can be either a local user port, or a DSA
-++	 * port if the LAG port is on a remote chip.
-++	 */
-++	dsa_lag_foreach_port(dp, ds->dst, lag)
-++		map |= BIT(dsa_towards_port(ds, dp->ds->index, dp->index));
-++
-++	return mv88e6xxx_g2_trunk_mapping_write(chip, id, map);
-++}
-++
-++static const u8 mv88e6xxx_lag_mask_table[8][8] = {
-++	/* Row number corresponds to the number of active members in a
-++	 * LAG. Each column states which of the eight hash buckets are
-++	 * mapped to the column:th port in the LAG.
-++	 *
-++	 * Example: In a LAG with three active ports, the second port
-++	 * ([2][1]) would be selected for traffic mapped to buckets
-++	 * 3,4,5 (0x38).
-++	 */
-++	{ 0xff,    0,    0,    0,    0,    0,    0,    0 },
-++	{ 0x0f, 0xf0,    0,    0,    0,    0,    0,    0 },
-++	{ 0x07, 0x38, 0xc0,    0,    0,    0,    0,    0 },
-++	{ 0x03, 0x0c, 0x30, 0xc0,    0,    0,    0,    0 },
-++	{ 0x03, 0x0c, 0x30, 0x40, 0x80,    0,    0,    0 },
-++	{ 0x03, 0x0c, 0x10, 0x20, 0x40, 0x80,    0,    0 },
-++	{ 0x03, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,    0 },
-++	{ 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 },
-++};
-++
-++static void mv88e6xxx_lag_set_port_mask(u16 *mask, int port,
-++					int num_tx, int nth)
-++{
-++	u8 active = 0;
-++	int i;
-++
-++	num_tx = num_tx <= 8 ? num_tx : 8;
-++	if (nth < num_tx)
-++		active = mv88e6xxx_lag_mask_table[num_tx - 1][nth];
-++
-++	for (i = 0; i < 8; i++) {
-++		if (BIT(i) & active)
-++			mask[i] |= BIT(port);
-++	}
-++}
-++
-++static int mv88e6xxx_lag_sync_masks(struct dsa_switch *ds)
-++{
-++	struct mv88e6xxx_chip *chip = ds->priv;
-++	unsigned int id, num_tx;
-++	struct net_device *lag;
-++	struct dsa_port *dp;
-++	int i, err, nth;
-++	u16 mask[8];
-++	u16 ivec;
-++
-++	/* Assume no port is a member of any LAG. */
-++	ivec = BIT(mv88e6xxx_num_ports(chip)) - 1;
-++
-++	/* Disable all masks for ports that _are_ members of a LAG. */
-++	list_for_each_entry(dp, &ds->dst->ports, list) {
-++		if (!dp->lag_dev || dp->ds != ds)
-++			continue;
-++
-++		ivec &= ~BIT(dp->index);
-++	}
-++
-++	for (i = 0; i < 8; i++)
-++		mask[i] = ivec;
-++
-++	/* Enable the correct subset of masks for all LAG ports that
-++	 * are in the Tx set.
-++	 */
-++	dsa_lags_foreach_id(id, ds->dst) {
-++		lag = dsa_lag_dev(ds->dst, id);
-++		if (!lag)
-++			continue;
-++
-++		num_tx = 0;
-++		dsa_lag_foreach_port(dp, ds->dst, lag) {
-++			if (dp->lag_tx_enabled)
-++				num_tx++;
-++		}
-++
-++		if (!num_tx)
-++			continue;
-++
-++		nth = 0;
-++		dsa_lag_foreach_port(dp, ds->dst, lag) {
-++			if (!dp->lag_tx_enabled)
-++				continue;
-++
-++			if (dp->ds == ds)
-++				mv88e6xxx_lag_set_port_mask(mask, dp->index,
-++							    num_tx, nth);
-++
-++			nth++;
-++		}
-++	}
-++
-++	for (i = 0; i < 8; i++) {
-++		err = mv88e6xxx_g2_trunk_mask_write(chip, i, true, mask[i]);
-++		if (err)
-++			return err;
-++	}
-++
-++	return 0;
-++}
-++
-++static int mv88e6xxx_lag_sync_masks_map(struct dsa_switch *ds,
-++					struct net_device *lag)
-++{
-++	int err;
-++
-++	err = mv88e6xxx_lag_sync_masks(ds);
-++
-++	if (!err)
-++		err = mv88e6xxx_lag_sync_map(ds, lag);
-++
-++	return err;
-++}
-++
-++static int mv88e6xxx_port_lag_change(struct dsa_switch *ds, int port)
-++{
-++	struct mv88e6xxx_chip *chip = ds->priv;
-++	int err;
-++
-++	mv88e6xxx_reg_lock(chip);
-++	err = mv88e6xxx_lag_sync_masks(ds);
-++	mv88e6xxx_reg_unlock(chip);
-++	return err;
-++}
-++
-++static int mv88e6xxx_port_lag_join(struct dsa_switch *ds, int port,
-++				   struct net_device *lag,
-++				   struct netdev_lag_upper_info *info)
-++{
-++	struct mv88e6xxx_chip *chip = ds->priv;
-++	int err, id;
-++
-++	if (!mv88e6xxx_lag_can_offload(ds, lag, info))
-++		return -EOPNOTSUPP;
-++
-++	id = dsa_lag_id(ds->dst, lag);
-++
-++	mv88e6xxx_reg_lock(chip);
-++
-++	err = mv88e6xxx_port_set_trunk(chip, port, true, id);
-++	if (err)
-++		goto err_unlock;
-++
-++	err = mv88e6xxx_lag_sync_masks_map(ds, lag);
-++	if (err)
-++		goto err_clear_trunk;
-++
-++	mv88e6xxx_reg_unlock(chip);
-++	return 0;
-++
-++err_clear_trunk:
-++	mv88e6xxx_port_set_trunk(chip, port, false, 0);
-++err_unlock:
-++	mv88e6xxx_reg_unlock(chip);
-++	return err;
-++}
-++
-++static int mv88e6xxx_port_lag_leave(struct dsa_switch *ds, int port,
-++				    struct net_device *lag)
-++{
-++	struct mv88e6xxx_chip *chip = ds->priv;
-++	int err_sync, err_trunk;
-++
-++	mv88e6xxx_reg_lock(chip);
-++	err_sync = mv88e6xxx_lag_sync_masks_map(ds, lag);
-++	err_trunk = mv88e6xxx_port_set_trunk(chip, port, false, 0);
-++	mv88e6xxx_reg_unlock(chip);
-++	return err_sync ? : err_trunk;
-++}
-++
-++static int mv88e6xxx_crosschip_lag_change(struct dsa_switch *ds, int sw_index,
-++					  int port)
-++{
-++	struct mv88e6xxx_chip *chip = ds->priv;
-++	int err;
-++
-++	mv88e6xxx_reg_lock(chip);
-++	err = mv88e6xxx_lag_sync_masks(ds);
-++	mv88e6xxx_reg_unlock(chip);
-++	return err;
-++}
-++
-++static int mv88e6xxx_crosschip_lag_join(struct dsa_switch *ds, int sw_index,
-++					int port, struct net_device *lag,
-++					struct netdev_lag_upper_info *info)
-++{
-++	struct mv88e6xxx_chip *chip = ds->priv;
-++	int err;
-++
-++	if (!mv88e6xxx_lag_can_offload(ds, lag, info))
-++		return -EOPNOTSUPP;
-++
-++	mv88e6xxx_reg_lock(chip);
-++
-++	err = mv88e6xxx_lag_sync_masks_map(ds, lag);
-++	if (err)
-++		goto unlock;
-++
-++	err = mv88e6xxx_pvt_map(chip, sw_index, port);
-++
-++unlock:
-++	mv88e6xxx_reg_unlock(chip);
-++	return err;
-++}
-++
-++static int mv88e6xxx_crosschip_lag_leave(struct dsa_switch *ds, int sw_index,
-++					 int port, struct net_device *lag)
-++{
-++	struct mv88e6xxx_chip *chip = ds->priv;
-++	int err_sync, err_pvt;
-++
-++	mv88e6xxx_reg_lock(chip);
-++	err_sync = mv88e6xxx_lag_sync_masks_map(ds, lag);
-++	err_pvt = mv88e6xxx_pvt_map(chip, sw_index, port);
-++	mv88e6xxx_reg_unlock(chip);
-++	return err_sync ? : err_pvt;
-++}
-++
-+ static const struct dsa_switch_ops mv88e6xxx_switch_ops = {
-+ 	.get_tag_protocol	= mv88e6xxx_get_tag_protocol,
-+ 	.setup			= mv88e6xxx_setup,
-+@@ -5069,6 +5350,12 @@ static const struct dsa_switch_ops mv88e
-+ 	.port_txtstamp		= mv88e6xxx_port_txtstamp,
-+ 	.port_rxtstamp		= mv88e6xxx_port_rxtstamp,
-+ 	.get_ts_info		= mv88e6xxx_get_ts_info,
-++	.port_lag_change	= mv88e6xxx_port_lag_change,
-++	.port_lag_join		= mv88e6xxx_port_lag_join,
-++	.port_lag_leave		= mv88e6xxx_port_lag_leave,
-++	.crosschip_lag_change	= mv88e6xxx_crosschip_lag_change,
-++	.crosschip_lag_join	= mv88e6xxx_crosschip_lag_join,
-++	.crosschip_lag_leave	= mv88e6xxx_crosschip_lag_leave,
-+ };
-+ 
-+ static int mv88e6xxx_register_switch(struct mv88e6xxx_chip *chip)
-+@@ -5076,10 +5363,12 @@ static int mv88e6xxx_register_switch(str
-+ 	struct device *dev = chip->dev;
-+ 	struct dsa_switch *ds;
-+ 
-+-	ds = dsa_switch_alloc(dev, mv88e6xxx_num_ports(chip));
-++	ds = devm_kzalloc(dev, sizeof(*ds), GFP_KERNEL);
-+ 	if (!ds)
-+ 		return -ENOMEM;
-+ 
-++	ds->dev = dev;
-++	ds->num_ports = mv88e6xxx_num_ports(chip);
-+ 	ds->priv = chip;
-+ 	ds->dev = dev;
-+ 	ds->ops = &mv88e6xxx_switch_ops;
-+@@ -5087,6 +5376,12 @@ static int mv88e6xxx_register_switch(str
-+ 	ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX;
-+ 	ds->assisted_learning_on_cpu_port = true;
-+ 
-++	/* Some chips support up to 32, but that requires enabling the
-++	 * 5-bit port mode, which we do not support. 640k^W16 ought to
-++	 * be enough for anyone.
-++	 */
-++	ds->num_lag_ids = 16;
-++
-+ 	dev_set_drvdata(dev, ds);
-+ 
-+ 	return dsa_register_switch(ds);
-+Index: linux-5.4.158/drivers/net/dsa/mv88e6xxx/global2.c
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/mv88e6xxx/global2.c
-++++ linux-5.4.158/drivers/net/dsa/mv88e6xxx/global2.c
-+@@ -126,8 +126,8 @@ int mv88e6xxx_g2_device_mapping_write(st
-+ 
-+ /* Offset 0x07: Trunk Mask Table register */
-+ 
-+-static int mv88e6xxx_g2_trunk_mask_write(struct mv88e6xxx_chip *chip, int num,
-+-					 bool hash, u16 mask)
-++int mv88e6xxx_g2_trunk_mask_write(struct mv88e6xxx_chip *chip, int num,
-++				  bool hash, u16 mask)
-+ {
-+ 	u16 val = (num << 12) | (mask & mv88e6xxx_port_mask(chip));
-+ 
-+@@ -140,8 +140,8 @@ static int mv88e6xxx_g2_trunk_mask_write
-+ 
-+ /* Offset 0x08: Trunk Mapping Table register */
-+ 
-+-static int mv88e6xxx_g2_trunk_mapping_write(struct mv88e6xxx_chip *chip, int id,
-+-					    u16 map)
-++int mv88e6xxx_g2_trunk_mapping_write(struct mv88e6xxx_chip *chip, int id,
-++				     u16 map)
-+ {
-+ 	const u16 port_mask = BIT(mv88e6xxx_num_ports(chip)) - 1;
-+ 	u16 val = (id << 11) | (map & port_mask);
-+Index: linux-5.4.158/drivers/net/dsa/mv88e6xxx/global2.h
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/mv88e6xxx/global2.h
-++++ linux-5.4.158/drivers/net/dsa/mv88e6xxx/global2.h
-+@@ -101,6 +101,7 @@
-+ #define MV88E6XXX_G2_PVT_ADDR_OP_WRITE_PVLAN	0x3000
-+ #define MV88E6XXX_G2_PVT_ADDR_OP_READ		0x4000
-+ #define MV88E6XXX_G2_PVT_ADDR_PTR_MASK		0x01ff
-++#define MV88E6XXX_G2_PVT_ADRR_DEV_TRUNK		0x1f
-+ 
-+ /* Offset 0x0C: Cross-chip Port VLAN Data Register */
-+ #define MV88E6XXX_G2_PVT_DATA		0x0c
-+@@ -336,6 +337,10 @@ int mv88e6352_g2_mgmt_rsvd2cpu(struct mv
-+ 
-+ int mv88e6xxx_g2_pot_clear(struct mv88e6xxx_chip *chip);
-+ 
-++int mv88e6xxx_g2_trunk_mask_write(struct mv88e6xxx_chip *chip, int num,
-++				  bool hash, u16 mask);
-++int mv88e6xxx_g2_trunk_mapping_write(struct mv88e6xxx_chip *chip, int id,
-++				     u16 map);
-+ int mv88e6xxx_g2_trunk_clear(struct mv88e6xxx_chip *chip);
-+ 
-+ int mv88e6xxx_g2_device_mapping_write(struct mv88e6xxx_chip *chip, int target,
-+Index: linux-5.4.158/drivers/net/dsa/mv88e6xxx/port.c
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/mv88e6xxx/port.c
-++++ linux-5.4.158/drivers/net/dsa/mv88e6xxx/port.c
-+@@ -994,6 +994,27 @@ int mv88e6xxx_port_set_message_port(stru
-+ 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL1, val);
-+ }
-+ 
-++int mv88e6xxx_port_set_trunk(struct mv88e6xxx_chip *chip, int port,
-++			     bool trunk, u8 id)
-++{
-++	u16 val;
-++	int err;
-++
-++	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL1, &val);
-++	if (err)
-++		return err;
-++
-++	val &= ~MV88E6XXX_PORT_CTL1_TRUNK_ID_MASK;
-++
-++	if (trunk)
-++		val |= MV88E6XXX_PORT_CTL1_TRUNK_PORT |
-++			(id << MV88E6XXX_PORT_CTL1_TRUNK_ID_SHIFT);
-++	else
-++		val &= ~MV88E6XXX_PORT_CTL1_TRUNK_PORT;
-++
-++	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL1, val);
-++}
-++
-+ /* Offset 0x06: Port Based VLAN Map */
-+ 
-+ int mv88e6xxx_port_set_vlan_map(struct mv88e6xxx_chip *chip, int port, u16 map)
-+Index: linux-5.4.158/drivers/net/dsa/mv88e6xxx/port.h
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/mv88e6xxx/port.h
-++++ linux-5.4.158/drivers/net/dsa/mv88e6xxx/port.h
-+@@ -168,6 +168,9 @@
-+ /* Offset 0x05: Port Control 1 */
-+ #define MV88E6XXX_PORT_CTL1			0x05
-+ #define MV88E6XXX_PORT_CTL1_MESSAGE_PORT	0x8000
-++#define MV88E6XXX_PORT_CTL1_TRUNK_PORT		0x4000
-++#define MV88E6XXX_PORT_CTL1_TRUNK_ID_MASK	0x0f00
-++#define MV88E6XXX_PORT_CTL1_TRUNK_ID_SHIFT	8
-+ #define MV88E6XXX_PORT_CTL1_FID_11_4_MASK	0x00ff
-+ 
-+ /* Offset 0x06: Port Based VLAN Map */
-+@@ -343,6 +346,8 @@ int mv88e6351_port_set_ether_type(struct
-+ 				  u16 etype);
-+ int mv88e6xxx_port_set_message_port(struct mv88e6xxx_chip *chip, int port,
-+ 				    bool message_port);
-++int mv88e6xxx_port_set_trunk(struct mv88e6xxx_chip *chip, int port,
-++			     bool trunk, u8 id);
-+ int mv88e6165_port_set_jumbo_size(struct mv88e6xxx_chip *chip, int port,
-+ 				  size_t size);
-+ int mv88e6095_port_egress_rate_limiting(struct mv88e6xxx_chip *chip, int port);
-+Index: linux-5.4.158/drivers/net/dsa/qca8k.c
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/qca8k.c
-++++ linux-5.4.158/drivers/net/dsa/qca8k.c
-+@@ -661,7 +661,7 @@ qca8k_setup(struct dsa_switch *ds)
-+ 		return ret;
-+ 
-+ 	/* Initialize CPU port pad mode (xMII type, delays...) */
-+-	phy_mode = of_get_phy_mode(ds->ports[QCA8K_CPU_PORT].dn);
-++	phy_mode = of_get_phy_mode(dsa_to_port(ds, QCA8K_CPU_PORT)->dn);
-+ 	if (phy_mode < 0) {
-+ 		pr_err("Can't find phy-mode for master device\n");
-+ 		return phy_mode;
-+@@ -1077,10 +1077,13 @@ qca8k_sw_probe(struct mdio_device *mdiod
-+ 	if (id != QCA8K_ID_QCA8337)
-+ 		return -ENODEV;
-+ 
-+-	priv->ds = dsa_switch_alloc(&mdiodev->dev, QCA8K_NUM_PORTS);
-++	priv->ds = devm_kzalloc(&mdiodev->dev, sizeof(*priv->ds),
-++				QCA8K_NUM_PORTS);
-+ 	if (!priv->ds)
-+ 		return -ENOMEM;
-+ 
-++	priv->ds->dev = &mdiodev->dev;
-++	priv->ds->num_ports = DSA_MAX_PORTS;
-+ 	priv->ds->priv = priv;
-+ 	priv->ops = qca8k_switch_ops;
-+ 	priv->ds->ops = &priv->ops;
-+Index: linux-5.4.158/drivers/net/dsa/realtek-smi-core.c
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/realtek-smi-core.c
-++++ linux-5.4.158/drivers/net/dsa/realtek-smi-core.c
-+@@ -444,9 +444,12 @@ static int realtek_smi_probe(struct plat
-+ 		return ret;
-+ 	}
-+ 
-+-	smi->ds = dsa_switch_alloc(dev, smi->num_ports);
-++	smi->ds = devm_kzalloc(dev, sizeof(*smi->ds), GFP_KERNEL);
-+ 	if (!smi->ds)
-+ 		return -ENOMEM;
-++
-++	smi->ds->dev = dev;
-++	smi->ds->num_ports = smi->num_ports;
-+ 	smi->ds->priv = smi;
-+ 
-+ 	smi->ds->ops = var->ds_ops;
-+Index: linux-5.4.158/drivers/net/dsa/sja1105/sja1105_main.c
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/sja1105/sja1105_main.c
-++++ linux-5.4.158/drivers/net/dsa/sja1105/sja1105_main.c
-+@@ -1121,7 +1121,7 @@ int sja1105pqrs_fdb_add(struct dsa_switc
-+ 	l2_lookup.vlanid = vid;
-+ 	l2_lookup.iotag = SJA1105_S_TAG;
-+ 	l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
-+-	if (dsa_port_is_vlan_filtering(&ds->ports[port])) {
-++	if (dsa_port_is_vlan_filtering(dsa_to_port(ds, port))) {
-+ 		l2_lookup.mask_vlanid = VLAN_VID_MASK;
-+ 		l2_lookup.mask_iotag = BIT(0);
-+ 	} else {
-+@@ -1214,7 +1214,7 @@ int sja1105pqrs_fdb_del(struct dsa_switc
-+ 	l2_lookup.vlanid = vid;
-+ 	l2_lookup.iotag = SJA1105_S_TAG;
-+ 	l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
-+-	if (dsa_port_is_vlan_filtering(&ds->ports[port])) {
-++	if (dsa_port_is_vlan_filtering(dsa_to_port(ds, port))) {
-+ 		l2_lookup.mask_vlanid = VLAN_VID_MASK;
-+ 		l2_lookup.mask_iotag = BIT(0);
-+ 	} else {
-+@@ -1260,7 +1260,7 @@ static int sja1105_fdb_add(struct dsa_sw
-+ 	 * for what gets printed in 'bridge fdb show'.  In the case of zero,
-+ 	 * no VID gets printed at all.
-+ 	 */
-+-	if (!dsa_port_is_vlan_filtering(&ds->ports[port]))
-++	if (!dsa_port_is_vlan_filtering(dsa_to_port(ds, port)))
-+ 		vid = 0;
-+ 
-+ 	return priv->info->fdb_add_cmd(ds, port, addr, vid);
-+@@ -1271,7 +1271,7 @@ static int sja1105_fdb_del(struct dsa_sw
-+ {
-+ 	struct sja1105_private *priv = ds->priv;
-+ 
-+-	if (!dsa_port_is_vlan_filtering(&ds->ports[port]))
-++	if (!dsa_port_is_vlan_filtering(dsa_to_port(ds, port)))
-+ 		vid = 0;
-+ 
-+ 	return priv->info->fdb_del_cmd(ds, port, addr, vid);
-+@@ -1310,7 +1310,7 @@ static int sja1105_fdb_dump(struct dsa_s
-+ 		u64_to_ether_addr(l2_lookup.macaddr, macaddr);
-+ 
-+ 		/* We need to hide the dsa_8021q VLANs from the user. */
-+-		if (!dsa_port_is_vlan_filtering(&ds->ports[port]))
-++		if (!dsa_port_is_vlan_filtering(dsa_to_port(ds, port)))
-+ 			l2_lookup.vlanid = 0;
-+ 		rc = cb(macaddr, l2_lookup.vlanid, l2_lookup.lockeds, data);
-+ 		if (rc)
-+@@ -1805,7 +1805,7 @@ static int sja1105_port_enable(struct ds
-+ 	if (!dsa_is_user_port(ds, port))
-+ 		return 0;
-+ 
-+-	slave = ds->ports[port].slave;
-++	slave = dsa_to_port(ds, port)->slave;
-+ 
-+ 	slave->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
-+ 
-+@@ -1837,7 +1837,7 @@ static int sja1105_mgmt_xmit(struct dsa_
-+ 	}
-+ 
-+ 	/* Transfer skb to the host port. */
-+-	dsa_enqueue_skb(skb, ds->ports[port].slave);
-++	dsa_enqueue_skb(skb, dsa_to_port(ds, port)->slave);
-+ 
-+ 	/* Wait until the switch has processed the frame */
-+ 	do {
-+@@ -2255,10 +2255,12 @@ static int sja1105_probe(struct spi_devi
-+ 
-+ 	dev_info(dev, "Probed switch chip: %s\n", priv->info->name);
-+ 
-+-	ds = dsa_switch_alloc(dev, SJA1105_NUM_PORTS);
-++	ds = devm_kzalloc(dev, sizeof(*ds), GFP_KERNEL);
-+ 	if (!ds)
-+ 		return -ENOMEM;
-+ 
-++	ds->dev = dev;
-++	ds->num_ports = SJA1105_NUM_PORTS;
-+ 	ds->ops = &sja1105_switch_ops;
-+ 	ds->priv = priv;
-+ 	priv->ds = ds;
-+@@ -2272,8 +2274,8 @@ static int sja1105_probe(struct spi_devi
-+ 	for (i = 0; i < SJA1105_NUM_PORTS; i++) {
-+ 		struct sja1105_port *sp = &priv->ports[i];
-+ 
-+-		ds->ports[i].priv = sp;
-+-		sp->dp = &ds->ports[i];
-++		dsa_to_port(ds, i)->priv = sp;
-++		sp->dp = dsa_to_port(ds, i);
-+ 		sp->data = tagger_data;
-+ 	}
-+ 	mutex_init(&priv->mgmt_lock);
-+Index: linux-5.4.158/drivers/net/dsa/vitesse-vsc73xx-core.c
-+===================================================================
-+--- linux-5.4.158.orig/drivers/net/dsa/vitesse-vsc73xx-core.c
-++++ linux-5.4.158/drivers/net/dsa/vitesse-vsc73xx-core.c
-+@@ -1178,9 +1178,12 @@ int vsc73xx_probe(struct vsc73xx *vsc)
-+ 	 * We allocate 8 ports and avoid access to the nonexistant
-+ 	 * ports.
-+ 	 */
-+-	vsc->ds = dsa_switch_alloc(dev, 8);
-++	vsc->ds = devm_kzalloc(dev, sizeof(*vsc->ds), GFP_KERNEL);
-+ 	if (!vsc->ds)
-+ 		return -ENOMEM;
-++
-++	vsc->ds->dev = dev;
-++	vsc->ds->num_ports = 8;
-+ 	vsc->ds->priv = vsc;
-+ 
-+ 	vsc->ds->ops = &vsc73xx_ds_ops;
-+Index: linux-5.4.158/include/net/dsa.h
-+===================================================================
-+--- linux-5.4.158.orig/include/net/dsa.h
-++++ linux-5.4.158/include/net/dsa.h
-+@@ -124,17 +124,46 @@ struct dsa_switch_tree {
-+ 	 */
-+ 	struct dsa_platform_data	*pd;
-+ 
-+-	/*
-+-	 * The switch port to which the CPU is attached.
-+-	 */
-+-	struct dsa_port		*cpu_dp;
-++	/* List of switch ports */
-++	struct list_head ports;
-+ 
-+-	/*
-+-	 * Data for the individual switch chips.
-++	/* List of DSA links composing the routing table */
-++	struct list_head rtable;
-++
-++	/* Maps offloaded LAG netdevs to a zero-based linear ID for
-++	 * drivers that need it.
-+ 	 */
-+-	struct dsa_switch	*ds[DSA_MAX_SWITCHES];
-++	struct net_device **lags;
-++	unsigned int lags_len;
-+ };
-+ 
-++#define dsa_lags_foreach_id(_id, _dst)				\
-++	for ((_id) = 0; (_id) < (_dst)->lags_len; (_id)++)	\
-++		if ((_dst)->lags[(_id)])
-++
-++#define dsa_lag_foreach_port(_dp, _dst, _lag)			\
-++	list_for_each_entry((_dp), &(_dst)->ports, list)	\
-++		if ((_dp)->lag_dev == (_lag))
-++
-++static inline struct net_device *dsa_lag_dev(struct dsa_switch_tree *dst,
-++					     unsigned int id)
-++{
-++	return dst->lags[id];
-++}
-++
-++static inline int dsa_lag_id(struct dsa_switch_tree *dst,
-++			     struct net_device *lag)
-++{
-++	unsigned int id;
-++
-++	dsa_lags_foreach_id(id, dst) {
-++		if (dsa_lag_dev(dst, id) == lag)
-++			return id;
-++	}
-++
-++	return -ENODEV;
-++}
-++
-+ /* TC matchall action types, only mirroring for now */
-+ enum dsa_port_mall_action_type {
-+ 	DSA_PORT_MALL_MIRROR,
-+@@ -195,10 +224,14 @@ struct dsa_port {
-+ 	struct devlink_port	devlink_port;
-+ 	struct phylink		*pl;
-+ 	struct phylink_config	pl_config;
-++	struct net_device	*lag_dev;
-++	bool			lag_tx_enabled;
-+ 
-+ 	struct work_struct	xmit_work;
-+ 	struct sk_buff_head	xmit_queue;
-+ 
-++	struct list_head list;
-++
-+ 	/*
-+ 	 * Give the switch driver somewhere to hang its per-port private data
-+ 	 * structures (accessible from the tagger).
-+@@ -214,9 +247,24 @@ struct dsa_port {
-+ 	 * Original copy of the master netdev net_device_ops
-+ 	 */
-+ 	const struct net_device_ops *orig_ndo_ops;
-++
-++	bool setup;
-++};
-++
-++/* TODO: ideally DSA ports would have a single dp->link_dp member,
-++ * and no dst->rtable nor this struct dsa_link would be needed,
-++ * but this would require some more complex tree walking,
-++ * so keep it stupid at the moment and list them all.
-++ */
-++struct dsa_link {
-++	struct dsa_port *dp;
-++	struct dsa_port *link_dp;
-++	struct list_head list;
-+ };
-+ 
-+ struct dsa_switch {
-++	bool setup;
-++
-+ 	struct device *dev;
-+ 
-+ 	/*
-+@@ -245,13 +293,6 @@ struct dsa_switch {
-+ 	const struct dsa_switch_ops	*ops;
-+ 
-+ 	/*
-+-	 * An array of which element [a] indicates which port on this
-+-	 * switch should be used to send packets to that are destined
-+-	 * for switch a. Can be NULL if there is only one switch chip.
-+-	 */
-+-	s8		rtable[DSA_MAX_SWITCHES];
-+-
-+-	/*
-+ 	 * Slave mii_bus and devices for the individual ports.
-+ 	 */
-+ 	u32			phys_mii_mask;
-+@@ -289,14 +330,27 @@ struct dsa_switch {
-+ 	 */
-+ 	bool			vlan_filtering;
-+ 
-+-	/* Dynamically allocated ports, keep last */
-+ 	size_t num_ports;
-+-	struct dsa_port ports[];
-++
-++	/* Drivers that benefit from having an ID associated with each
-++	 * offloaded LAG should set this to the maximum number of
-++	 * supported IDs. DSA will then maintain a mapping of _at
-++	 * least_ these many IDs, accessible to drivers via
-++	 * dsa_lag_id().
-++	 */
-++	unsigned int		num_lag_ids;
-+ };
-+ 
-+-static inline const struct dsa_port *dsa_to_port(struct dsa_switch *ds, int p)
-++static inline struct dsa_port *dsa_to_port(struct dsa_switch *ds, int p)
-+ {
-+-	return &ds->ports[p];
-++	struct dsa_switch_tree *dst = ds->dst;
-++	struct dsa_port *dp;
-++
-++	list_for_each_entry(dp, &dst->ports, list)
-++		if (dp->ds == ds && dp->index == p)
-++			return dp;
-++
-++	return NULL;
-+ }
-+ 
-+ static inline bool dsa_is_unused_port(struct dsa_switch *ds, int p)
-+@@ -331,6 +385,19 @@ static inline u32 dsa_user_ports(struct
-+ 	return mask;
-+ }
-+ 
-++/* Return the local port used to reach an arbitrary switch device */
-++static inline unsigned int dsa_routing_port(struct dsa_switch *ds, int device)
-++{
-++	struct dsa_switch_tree *dst = ds->dst;
-++	struct dsa_link *dl;
-++
-++	list_for_each_entry(dl, &dst->rtable, list)
-++		if (dl->dp->ds == ds && dl->link_dp->ds->index == device)
-++			return dl->dp->index;
-++
-++	return ds->num_ports;
-++}
-++
-+ /* Return the local port used to reach an arbitrary switch port */
-+ static inline unsigned int dsa_towards_port(struct dsa_switch *ds, int device,
-+ 					    int port)
-+@@ -338,7 +405,7 @@ static inline unsigned int dsa_towards_p
-+ 	if (device == ds->index)
-+ 		return port;
-+ 	else
-+-		return ds->rtable[device];
-++		return dsa_routing_port(ds, device);
-+ }
-+ 
-+ /* Return the local port used to reach the dedicated CPU port */
-+@@ -539,6 +606,13 @@ struct dsa_switch_ops {
-+ 					 int port, struct net_device *br);
-+ 	void	(*crosschip_bridge_leave)(struct dsa_switch *ds, int sw_index,
-+ 					  int port, struct net_device *br);
-++	int	(*crosschip_lag_change)(struct dsa_switch *ds, int sw_index,
-++					int port);
-++	int	(*crosschip_lag_join)(struct dsa_switch *ds, int sw_index,
-++				      int port, struct net_device *lag,
-++				      struct netdev_lag_upper_info *info);
-++	int	(*crosschip_lag_leave)(struct dsa_switch *ds, int sw_index,
-++				       int port, struct net_device *lag);
-+ 
-+ 	/*
-+ 	 * PTP functionality
-+@@ -557,6 +631,16 @@ struct dsa_switch_ops {
-+ 	 */
-+ 	netdev_tx_t (*port_deferred_xmit)(struct dsa_switch *ds, int port,
-+ 					  struct sk_buff *skb);
-++
-++	/*
-++	 * LAG integration
-++	 */
-++	int	(*port_lag_change)(struct dsa_switch *ds, int port);
-++	int	(*port_lag_join)(struct dsa_switch *ds, int port,
-++				 struct net_device *lag,
-++				 struct netdev_lag_upper_info *info);
-++	int	(*port_lag_leave)(struct dsa_switch *ds, int port,
-++				  struct net_device *lag);
-+ };
-+ 
-+ struct dsa_switch_driver {
-+@@ -584,7 +668,6 @@ static inline bool dsa_can_decode(const
-+ 	return false;
-+ }
-+ 
-+-struct dsa_switch *dsa_switch_alloc(struct device *dev, size_t n);
-+ void dsa_unregister_switch(struct dsa_switch *ds);
-+ int dsa_register_switch(struct dsa_switch *ds);
-+ #ifdef CONFIG_PM_SLEEP
-+@@ -628,6 +711,7 @@ int register_dsa_notifier(struct notifie
-+ int unregister_dsa_notifier(struct notifier_block *nb);
-+ int call_dsa_notifiers(unsigned long val, struct net_device *dev,
-+ 		       struct dsa_notifier_info *info);
-++bool dsa_slave_dev_check(const struct net_device *dev);
-+ #else
-+ static inline int register_dsa_notifier(struct notifier_block *nb)
-+ {
-+@@ -644,6 +728,11 @@ static inline int call_dsa_notifiers(uns
-+ {
-+ 	return NOTIFY_DONE;
-+ }
-++
-++static inline bool dsa_slave_dev_check(const struct net_device *dev)
-++{
-++	return false;
-++}
-+ #endif
-+ 
-+ /* Broadcom tag specific helpers to insert and extract queue/port number */
-+Index: linux-5.4.158/net/dsa/Kconfig
-+===================================================================
-+--- linux-5.4.158.orig/net/dsa/Kconfig
-++++ linux-5.4.158/net/dsa/Kconfig
-+@@ -56,14 +56,19 @@ config NET_DSA_TAG_GSWIP
-+ 	  Say Y or M if you want to enable support for tagging frames for the
-+ 	  Lantiq / Intel GSWIP switches.
-+ 
-++config NET_DSA_TAG_DSA_COMMON
-++	tristate
-++
-+ config NET_DSA_TAG_DSA
-+ 	tristate "Tag driver for Marvell switches using DSA headers"
-++	select NET_DSA_TAG_DSA_COMMON
-+ 	help
-+ 	  Say Y or M if you want to enable support for tagging frames for the
-+ 	  Marvell switches which use DSA headers.
-+ 
-+ config NET_DSA_TAG_EDSA
-+ 	tristate "Tag driver for Marvell switches using EtherType DSA headers"
-++	select NET_DSA_TAG_DSA_COMMON
-+ 	help
-+ 	  Say Y or M if you want to enable support for tagging frames for the
-+ 	  Marvell switches which use EtherType DSA headers.
-+Index: linux-5.4.158/net/dsa/Makefile
-+===================================================================
-+--- linux-5.4.158.orig/net/dsa/Makefile
-++++ linux-5.4.158/net/dsa/Makefile
-+@@ -6,8 +6,7 @@ dsa_core-y += dsa.o dsa2.o master.o port
-+ # tagging formats
-+ obj-$(CONFIG_NET_DSA_TAG_8021Q) += tag_8021q.o
-+ obj-$(CONFIG_NET_DSA_TAG_BRCM_COMMON) += tag_brcm.o
-+-obj-$(CONFIG_NET_DSA_TAG_DSA) += tag_dsa.o
-+-obj-$(CONFIG_NET_DSA_TAG_EDSA) += tag_edsa.o
-++obj-$(CONFIG_NET_DSA_TAG_DSA_COMMON) += tag_dsa.o
-+ obj-$(CONFIG_NET_DSA_TAG_GSWIP) += tag_gswip.o
-+ obj-$(CONFIG_NET_DSA_TAG_KSZ) += tag_ksz.o
-+ obj-$(CONFIG_NET_DSA_TAG_RTL4_A) += tag_rtl4_a.o
-+Index: linux-5.4.158/net/dsa/dsa.c
-+===================================================================
-+--- linux-5.4.158.orig/net/dsa/dsa.c
-++++ linux-5.4.158/net/dsa/dsa.c
-+@@ -224,11 +224,21 @@ static int dsa_switch_rcv(struct sk_buff
-+ 	}
-+ 
-+ 	skb = nskb;
-+-	p = netdev_priv(skb->dev);
-+ 	skb_push(skb, ETH_HLEN);
-+ 	skb->pkt_type = PACKET_HOST;
-+ 	skb->protocol = eth_type_trans(skb, skb->dev);
-+ 
-++	if (unlikely(!dsa_slave_dev_check(skb->dev))) {
-++		/* Packet is to be injected directly on an upper
-++		 * device, e.g. a team/bond, so skip all DSA-port
-++		 * specific actions.
-++		 */
-++		netif_rx(skb);
-++		return 0;
-++	}
-++
-++	p = netdev_priv(skb->dev);
-++
-+ 	s = this_cpu_ptr(p->stats64);
-+ 	u64_stats_update_begin(&s->syncp);
-+ 	s->rx_packets++;
-+@@ -246,7 +256,9 @@ static int dsa_switch_rcv(struct sk_buff
-+ #ifdef CONFIG_PM_SLEEP
-+ static bool dsa_is_port_initialized(struct dsa_switch *ds, int p)
-+ {
-+-	return dsa_is_user_port(ds, p) && ds->ports[p].slave;
-++	const struct dsa_port *dp = dsa_to_port(ds, p);
-++
-++	return dp->type == DSA_PORT_TYPE_USER && dp->slave;
-+ }
-+ 
-+ int dsa_switch_suspend(struct dsa_switch *ds)
-+@@ -258,7 +270,7 @@ int dsa_switch_suspend(struct dsa_switch
-+ 		if (!dsa_is_port_initialized(ds, i))
-+ 			continue;
-+ 
-+-		ret = dsa_slave_suspend(ds->ports[i].slave);
-++		ret = dsa_slave_suspend(dsa_to_port(ds, i)->slave);
-+ 		if (ret)
-+ 			return ret;
-+ 	}
-+@@ -285,7 +297,7 @@ int dsa_switch_resume(struct dsa_switch
-+ 		if (!dsa_is_port_initialized(ds, i))
-+ 			continue;
-+ 
-+-		ret = dsa_slave_resume(ds->ports[i].slave);
-++		ret = dsa_slave_resume(dsa_to_port(ds, i)->slave);
-+ 		if (ret)
-+ 			return ret;
-+ 	}
-+Index: linux-5.4.158/net/dsa/dsa2.c
-+===================================================================
-+--- linux-5.4.158.orig/net/dsa/dsa2.c
-++++ linux-5.4.158/net/dsa/dsa2.c
-+@@ -24,6 +24,65 @@ static DEFINE_MUTEX(dsa2_mutex);
-+ static const struct devlink_ops dsa_devlink_ops = {
-+ };
-+ 
-++/**
-++ * dsa_lag_map() - Map LAG netdev to a linear LAG ID
-++ * @dst: Tree in which to record the mapping.
-++ * @lag: Netdev that is to be mapped to an ID.
-++ *
-++ * dsa_lag_id/dsa_lag_dev can then be used to translate between the
-++ * two spaces. The size of the mapping space is determined by the
-++ * driver by setting ds->num_lag_ids. It is perfectly legal to leave
-++ * it unset if it is not needed, in which case these functions become
-++ * no-ops.
-++ */
-++void dsa_lag_map(struct dsa_switch_tree *dst, struct net_device *lag)
-++{
-++	unsigned int id;
-++
-++	if (dsa_lag_id(dst, lag) >= 0)
-++		/* Already mapped */
-++		return;
-++
-++	for (id = 0; id < dst->lags_len; id++) {
-++		if (!dsa_lag_dev(dst, id)) {
-++			dst->lags[id] = lag;
-++			return;
-++		}
-++	}
-++
-++	/* No IDs left, which is OK. Some drivers do not need it. The
-++	 * ones that do, e.g. mv88e6xxx, will discover that dsa_lag_id
-++	 * returns an error for this device when joining the LAG. The
-++	 * driver can then return -EOPNOTSUPP back to DSA, which will
-++	 * fall back to a software LAG.
-++	 */
-++}
-++
-++/**
-++ * dsa_lag_unmap() - Remove a LAG ID mapping
-++ * @dst: Tree in which the mapping is recorded.
-++ * @lag: Netdev that was mapped.
-++ *
-++ * As there may be multiple users of the mapping, it is only removed
-++ * if there are no other references to it.
-++ */
-++void dsa_lag_unmap(struct dsa_switch_tree *dst, struct net_device *lag)
-++{
-++	struct dsa_port *dp;
-++	unsigned int id;
-++
-++	dsa_lag_foreach_port(dp, dst, lag)
-++		/* There are remaining users of this mapping */
-++		return;
-++
-++	dsa_lags_foreach_id(id, dst) {
-++		if (dsa_lag_dev(dst, id) == lag) {
-++			dst->lags[id] = NULL;
-++			break;
-++		}
-++	}
-++}
-++
-+ static struct dsa_switch_tree *dsa_tree_find(int index)
-+ {
-+ 	struct dsa_switch_tree *dst;
-+@@ -45,6 +104,10 @@ static struct dsa_switch_tree *dsa_tree_
-+ 
-+ 	dst->index = index;
-+ 
-++	INIT_LIST_HEAD(&dst->rtable);
-++
-++	INIT_LIST_HEAD(&dst->ports);
-++
-+ 	INIT_LIST_HEAD(&dst->list);
-+ 	list_add_tail(&dst->list, &dsa_tree_list);
-+ 
-+@@ -111,24 +174,38 @@ static bool dsa_port_is_user(struct dsa_
-+ static struct dsa_port *dsa_tree_find_port_by_node(struct dsa_switch_tree *dst,
-+ 						   struct device_node *dn)
-+ {
-+-	struct dsa_switch *ds;
-+ 	struct dsa_port *dp;
-+-	int device, port;
-+ 
-+-	for (device = 0; device < DSA_MAX_SWITCHES; device++) {
-+-		ds = dst->ds[device];
-+-		if (!ds)
-+-			continue;
-++	list_for_each_entry(dp, &dst->ports, list)
-++		if (dp->dn == dn)
-++			return dp;
-+ 
-+-		for (port = 0; port < ds->num_ports; port++) {
-+-			dp = &ds->ports[port];
-++	return NULL;
-++}
-+ 
-+-			if (dp->dn == dn)
-+-				return dp;
-+-		}
-+-	}
-++struct dsa_link *dsa_link_touch(struct dsa_port *dp, struct dsa_port *link_dp)
-++{
-++	struct dsa_switch *ds = dp->ds;
-++	struct dsa_switch_tree *dst;
-++	struct dsa_link *dl;
-+ 
-+-	return NULL;
-++	dst = ds->dst;
-++
-++	list_for_each_entry(dl, &dst->rtable, list)
-++		if (dl->dp == dp && dl->link_dp == link_dp)
-++			return dl;
-++
-++	dl = kzalloc(sizeof(*dl), GFP_KERNEL);
-++	if (!dl)
-++		return NULL;
-++
-++	dl->dp = dp;
-++	dl->link_dp = link_dp;
-++
-++	INIT_LIST_HEAD(&dl->list);
-++	list_add_tail(&dl->list, &dst->rtable);
-++
-++	return dl;
-+ }
-+ 
-+ static bool dsa_port_setup_routing_table(struct dsa_port *dp)
-+@@ -138,6 +215,7 @@ static bool dsa_port_setup_routing_table
-+ 	struct device_node *dn = dp->dn;
-+ 	struct of_phandle_iterator it;
-+ 	struct dsa_port *link_dp;
-++	struct dsa_link *dl;
-+ 	int err;
-+ 
-+ 	of_for_each_phandle(&it, err, dn, "link", NULL, 0) {
-+@@ -147,24 +225,22 @@ static bool dsa_port_setup_routing_table
-+ 			return false;
-+ 		}
-+ 
-+-		ds->rtable[link_dp->ds->index] = dp->index;
-++		dl = dsa_link_touch(dp, link_dp);
-++		if (!dl) {
-++			of_node_put(it.node);
-++			return false;
-++		}
-+ 	}
-+ 
-+ 	return true;
-+ }
-+ 
-+-static bool dsa_switch_setup_routing_table(struct dsa_switch *ds)
-++static bool dsa_tree_setup_routing_table(struct dsa_switch_tree *dst)
-+ {
-+ 	bool complete = true;
-+ 	struct dsa_port *dp;
-+-	int i;
-+-
-+-	for (i = 0; i < DSA_MAX_SWITCHES; i++)
-+-		ds->rtable[i] = DSA_RTABLE_NONE;
-+-
-+-	for (i = 0; i < ds->num_ports; i++) {
-+-		dp = &ds->ports[i];
-+ 
-++	list_for_each_entry(dp, &dst->ports, list) {
-+ 		if (dsa_port_is_dsa(dp)) {
-+ 			complete = dsa_port_setup_routing_table(dp);
-+ 			if (!complete)
-+@@ -175,81 +251,42 @@ static bool dsa_switch_setup_routing_tab
-+ 	return complete;
-+ }
-+ 
-+-static bool dsa_tree_setup_routing_table(struct dsa_switch_tree *dst)
-+-{
-+-	struct dsa_switch *ds;
-+-	bool complete = true;
-+-	int device;
-+-
-+-	for (device = 0; device < DSA_MAX_SWITCHES; device++) {
-+-		ds = dst->ds[device];
-+-		if (!ds)
-+-			continue;
-+-
-+-		complete = dsa_switch_setup_routing_table(ds);
-+-		if (!complete)
-+-			break;
-+-	}
-+-
-+-	return complete;
-+-}
-+-
-+ static struct dsa_port *dsa_tree_find_first_cpu(struct dsa_switch_tree *dst)
-+ {
-+-	struct dsa_switch *ds;
-+ 	struct dsa_port *dp;
-+-	int device, port;
-+ 
-+-	for (device = 0; device < DSA_MAX_SWITCHES; device++) {
-+-		ds = dst->ds[device];
-+-		if (!ds)
-+-			continue;
-+-
-+-		for (port = 0; port < ds->num_ports; port++) {
-+-			dp = &ds->ports[port];
-+-
-+-			if (dsa_port_is_cpu(dp))
-+-				return dp;
-+-		}
-+-	}
-++	list_for_each_entry(dp, &dst->ports, list)
-++		if (dsa_port_is_cpu(dp))
-++			return dp;
-+ 
-+ 	return NULL;
-+ }
-+ 
-+ static int dsa_tree_setup_default_cpu(struct dsa_switch_tree *dst)
-+ {
-+-	struct dsa_switch *ds;
-+-	struct dsa_port *dp;
-+-	int device, port;
-++	struct dsa_port *cpu_dp, *dp;
-+ 
-+-	/* DSA currently only supports a single CPU port */
-+-	dst->cpu_dp = dsa_tree_find_first_cpu(dst);
-+-	if (!dst->cpu_dp) {
-+-		pr_warn("Tree has no master device\n");
-++	cpu_dp = dsa_tree_find_first_cpu(dst);
-++	if (!cpu_dp) {
-++		pr_err("DSA: tree %d has no CPU port\n", dst->index);
-+ 		return -EINVAL;
-+ 	}
-+ 
-+ 	/* Assign the default CPU port to all ports of the fabric */
-+-	for (device = 0; device < DSA_MAX_SWITCHES; device++) {
-+-		ds = dst->ds[device];
-+-		if (!ds)
-+-			continue;
-+-
-+-		for (port = 0; port < ds->num_ports; port++) {
-+-			dp = &ds->ports[port];
-+-
-+-			if (dsa_port_is_user(dp) || dsa_port_is_dsa(dp))
-+-				dp->cpu_dp = dst->cpu_dp;
-+-		}
-+-	}
-++	list_for_each_entry(dp, &dst->ports, list)
-++		if (dsa_port_is_user(dp) || dsa_port_is_dsa(dp))
-++			dp->cpu_dp = cpu_dp;
-+ 
-+ 	return 0;
-+ }
-+ 
-+ static void dsa_tree_teardown_default_cpu(struct dsa_switch_tree *dst)
-+ {
-+-	/* DSA currently only supports a single CPU port */
-+-	dst->cpu_dp = NULL;
-++	struct dsa_port *dp;
-++
-++	list_for_each_entry(dp, &dst->ports, list)
-++		if (dsa_port_is_user(dp) || dsa_port_is_dsa(dp))
-++			dp->cpu_dp = NULL;
-+ }
-+ 
-+ static int dsa_port_setup(struct dsa_port *dp)
-+@@ -265,6 +302,9 @@ static int dsa_port_setup(struct dsa_por
-+ 	bool dsa_port_enabled = false;
-+ 	int err = 0;
-+ 
-++	if (dp->setup)
-++		return 0;
-++
-+ 	switch (dp->type) {
-+ 	case DSA_PORT_TYPE_UNUSED:
-+ 		dsa_port_disable(dp);
-+@@ -333,14 +373,21 @@ static int dsa_port_setup(struct dsa_por
-+ 		dsa_port_link_unregister_of(dp);
-+ 	if (err && devlink_port_registered)
-+ 		devlink_port_unregister(dlp);
-++	if (err)
-++		return err;
-+ 
-+-	return err;
-++	dp->setup = true;
-++
-++	return 0;
-+ }
-+ 
-+ static void dsa_port_teardown(struct dsa_port *dp)
-+ {
-+ 	struct devlink_port *dlp = &dp->devlink_port;
-+ 
-++	if (!dp->setup)
-++		return;
-++
-+ 	switch (dp->type) {
-+ 	case DSA_PORT_TYPE_UNUSED:
-+ 		break;
-+@@ -363,11 +410,16 @@ static void dsa_port_teardown(struct dsa
-+ 		}
-+ 		break;
-+ 	}
-++
-++	dp->setup = false;
-+ }
-+ 
-+ static int dsa_switch_setup(struct dsa_switch *ds)
-+ {
-+-	int err = 0;
-++	int err;
-++
-++	if (ds->setup)
-++		return 0;
-+ 
-+ 	/* Initialize ds->phys_mii_mask before registering the slave MDIO bus
-+ 	 * driver and before ops->setup() has run, since the switch drivers and
-+@@ -409,6 +461,8 @@ static int dsa_switch_setup(struct dsa_s
-+ 			goto teardown;
-+ 	}
-+ 
-++	ds->setup = true;
-++
-+ 	return 0;
-+ 
-+ teardown:
-+@@ -427,6 +481,9 @@ free_devlink:
-+ 
-+ static void dsa_switch_teardown(struct dsa_switch *ds)
-+ {
-++	if (!ds->setup)
-++		return;
-++
-+ 	if (ds->slave_mii_bus && ds->ops->phy_read)
-+ 		mdiobus_unregister(ds->slave_mii_bus);
-+ 
-+@@ -441,89 +498,98 @@ static void dsa_switch_teardown(struct d
-+ 		ds->devlink = NULL;
-+ 	}
-+ 
-++	ds->setup = false;
-+ }
-+ 
-+ static int dsa_tree_setup_switches(struct dsa_switch_tree *dst)
-+ {
-+-	struct dsa_switch *ds;
-+ 	struct dsa_port *dp;
-+-	int device, port, i;
-+-	int err = 0;
-+-
-+-	for (device = 0; device < DSA_MAX_SWITCHES; device++) {
-+-		ds = dst->ds[device];
-+-		if (!ds)
-+-			continue;
-++	int err;
-+ 
-+-		err = dsa_switch_setup(ds);
-++	list_for_each_entry(dp, &dst->ports, list) {
-++		err = dsa_switch_setup(dp->ds);
-+ 		if (err)
-+-			goto switch_teardown;
-+-
-+-		for (port = 0; port < ds->num_ports; port++) {
-+-			dp = &ds->ports[port];
-+-
-+-			err = dsa_port_setup(dp);
-+-			if (err)
-+-				continue;
-+-		}
-++			goto teardown;
-+ 	}
-+ 
-+-	return 0;
-+-
-+-switch_teardown:
-+-	for (i = 0; i < device; i++) {
-+-		ds = dst->ds[i];
-+-		if (!ds)
-+-			continue;
-+-
-+-		for (port = 0; port < ds->num_ports; port++) {
-+-			dp = &ds->ports[port];
-++	list_for_each_entry(dp, &dst->ports, list) {
-++		err = dsa_port_setup(dp);
-++		if (err)
-++			goto teardown;
-++ 	}
-+ 
-+-			dsa_port_teardown(dp);
-+-		}
-++	return 0;
-+ 
-+-		dsa_switch_teardown(ds);
-+-	}
-++teardown:
-++	list_for_each_entry(dp, &dst->ports, list)
-++		dsa_port_teardown(dp);
-++ 
-++	list_for_each_entry(dp, &dst->ports, list)
-++		dsa_switch_teardown(dp->ds);
-+ 
-+ 	return err;
-+ }
-+ 
-+ static void dsa_tree_teardown_switches(struct dsa_switch_tree *dst)
-+ {
-+-	struct dsa_switch *ds;
-+ 	struct dsa_port *dp;
-+-	int device, port;
-+ 
-+-	for (device = 0; device < DSA_MAX_SWITCHES; device++) {
-+-		ds = dst->ds[device];
-+-		if (!ds)
-+-			continue;
-++	list_for_each_entry(dp, &dst->ports, list)
-++		dsa_port_teardown(dp);
-+ 
-+-		for (port = 0; port < ds->num_ports; port++) {
-+-			dp = &ds->ports[port];
-++	list_for_each_entry(dp, &dst->ports, list)
-++		dsa_switch_teardown(dp->ds);
-++}
-+ 
-+-			dsa_port_teardown(dp);
-+-		}
-++static int dsa_tree_setup_master(struct dsa_switch_tree *dst)
-++{
-++	struct dsa_port *dp;
-++	int err;
-+ 
-+-		dsa_switch_teardown(ds);
-++	list_for_each_entry(dp, &dst->ports, list) {
-++		if (dsa_port_is_cpu(dp)) {
-++			err = dsa_master_setup(dp->master, dp);
-++			if (err)
-++				return err;
-++		}
-+ 	}
-++
-++	return 0;
-+ }
-+ 
-+-static int dsa_tree_setup_master(struct dsa_switch_tree *dst)
-++static void dsa_tree_teardown_master(struct dsa_switch_tree *dst)
-+ {
-+-	struct dsa_port *cpu_dp = dst->cpu_dp;
-+-	struct net_device *master = cpu_dp->master;
-++	struct dsa_port *dp;
-+ 
-+-	/* DSA currently supports a single pair of CPU port and master device */
-+-	return dsa_master_setup(master, cpu_dp);
-++	list_for_each_entry(dp, &dst->ports, list)
-++		if (dsa_port_is_cpu(dp))
-++			dsa_master_teardown(dp->master);
-+ }
-+ 
-+-static void dsa_tree_teardown_master(struct dsa_switch_tree *dst)
-++static int dsa_tree_setup_lags(struct dsa_switch_tree *dst)
-+ {
-+-	struct dsa_port *cpu_dp = dst->cpu_dp;
-+-	struct net_device *master = cpu_dp->master;
-++	unsigned int len = 0;
-++	struct dsa_port *dp;
-++
-++	list_for_each_entry(dp, &dst->ports, list) {
-++		if (dp->ds->num_lag_ids > len)
-++			len = dp->ds->num_lag_ids;
-++	}
-+ 
-+-	return dsa_master_teardown(master);
-++	if (!len)
-++		return 0;
-++
-++	dst->lags = kcalloc(len, sizeof(*dst->lags), GFP_KERNEL);
-++	if (!dst->lags)
-++		return -ENOMEM;
-++
-++	dst->lags_len = len;
-++	return 0;
-++}
-++
-++static void dsa_tree_teardown_lags(struct dsa_switch_tree *dst)
-++{
-++	kfree(dst->lags);
-+ }
-+ 
-+ static int dsa_tree_setup(struct dsa_switch_tree *dst)
-+@@ -553,12 +619,18 @@ static int dsa_tree_setup(struct dsa_swi
-+ 	if (err)
-+ 		goto teardown_switches;
-+ 
-++	err = dsa_tree_setup_lags(dst);
-++	if (err)
-++		goto teardown_master;
-++
-+ 	dst->setup = true;
-+ 
-+ 	pr_info("DSA: tree %d setup\n", dst->index);
-+ 
-+ 	return 0;
-+ 
-++teardown_master:
-++	dsa_tree_teardown_master(dst);
-+ teardown_switches:
-+ 	dsa_tree_teardown_switches(dst);
-+ teardown_default_cpu:
-+@@ -569,48 +641,49 @@ teardown_default_cpu:
-+ 
-+ static void dsa_tree_teardown(struct dsa_switch_tree *dst)
-+ {
-++	struct dsa_link *dl, *next;
-++
-+ 	if (!dst->setup)
-+ 		return;
-+ 
-++	dsa_tree_teardown_lags(dst);
-++
-+ 	dsa_tree_teardown_master(dst);
-+ 
-+ 	dsa_tree_teardown_switches(dst);
-+ 
-+ 	dsa_tree_teardown_default_cpu(dst);
-+ 
-++	list_for_each_entry_safe(dl, next, &dst->rtable, list) {
-++		list_del(&dl->list);
-++		kfree(dl);
-++	}
-++
-+ 	pr_info("DSA: tree %d torn down\n", dst->index);
-+ 
-+ 	dst->setup = false;
-+ }
-+ 
-+-static void dsa_tree_remove_switch(struct dsa_switch_tree *dst,
-+-				   unsigned int index)
-++static struct dsa_port *dsa_port_touch(struct dsa_switch *ds, int index)
-+ {
-+-	dsa_tree_teardown(dst);
-++	struct dsa_switch_tree *dst = ds->dst;
-++	struct dsa_port *dp;
-+ 
-+-	dst->ds[index] = NULL;
-+-	dsa_tree_put(dst);
-+-}
-++	list_for_each_entry(dp, &dst->ports, list)
-++		if (dp->ds == ds && dp->index == index)
-++			return dp;
-+ 
-+-static int dsa_tree_add_switch(struct dsa_switch_tree *dst,
-+-			       struct dsa_switch *ds)
-+-{
-+-	unsigned int index = ds->index;
-+-	int err;
-++	dp = kzalloc(sizeof(*dp), GFP_KERNEL);
-++	if (!dp)
-++		return NULL;
-+ 
-+-	if (dst->ds[index])
-+-		return -EBUSY;
-++	dp->ds = ds;
-++	dp->index = index;
-+ 
-+-	dsa_tree_get(dst);
-+-	dst->ds[index] = ds;
-++	INIT_LIST_HEAD(&dp->list);
-++	list_add_tail(&dp->list, &dst->ports);
-+ 
-+-	err = dsa_tree_setup(dst);
-+-	if (err) {
-+-		dst->ds[index] = NULL;
-+-		dsa_tree_put(dst);
-+-	}
-+-
-+-	return err;
-++	return dp;
-+ }
-+ 
-+ static int dsa_port_parse_user(struct dsa_port *dp, const char *name)
-+@@ -705,7 +778,7 @@ static int dsa_switch_parse_ports_of(str
-+ 			goto out_put_node;
-+ 		}
-+ 
-+-		dp = &ds->ports[reg];
-++		dp = dsa_to_port(ds, reg);
-+ 
-+ 		err = dsa_port_parse_of(dp, port);
-+ 		if (err)
-+@@ -729,8 +802,6 @@ static int dsa_switch_parse_member_of(st
-+ 		return sz;
-+ 
-+ 	ds->index = m[1];
-+-	if (ds->index >= DSA_MAX_SWITCHES)
-+-		return -EINVAL;
-+ 
-+ 	ds->dst = dsa_tree_touch(m[0]);
-+ 	if (!ds->dst)
-+@@ -739,6 +810,20 @@ static int dsa_switch_parse_member_of(st
-+ 	return 0;
-+ }
-+ 
-++static int dsa_switch_touch_ports(struct dsa_switch *ds)
-++{
-++	struct dsa_port *dp;
-++	int port;
-++
-++	for (port = 0; port < ds->num_ports; port++) {
-++		dp = dsa_port_touch(ds, port);
-++		if (!dp)
-++			return -ENOMEM;
-++	}
-++
-++	return 0;
-++}
-++
-+ static int dsa_switch_parse_of(struct dsa_switch *ds, struct device_node *dn)
-+ {
-+ 	int err;
-+@@ -747,6 +832,10 @@ static int dsa_switch_parse_of(struct ds
-+ 	if (err)
-+ 		return err;
-+ 
-++	err = dsa_switch_touch_ports(ds);
-++	if (err)
-++		return err;
-++
-+ 	return dsa_switch_parse_ports_of(ds, dn);
-+ }
-+ 
-+@@ -784,7 +873,7 @@ static int dsa_switch_parse_ports(struct
-+ 	for (i = 0; i < DSA_MAX_PORTS; i++) {
-+ 		name = cd->port_names[i];
-+ 		dev = cd->netdev[i];
-+-		dp = &ds->ports[i];
-++		dp = dsa_to_port(ds, i);
-+ 
-+ 		if (!name)
-+ 			continue;
-+@@ -804,6 +893,8 @@ static int dsa_switch_parse_ports(struct
-+ 
-+ static int dsa_switch_parse(struct dsa_switch *ds, struct dsa_chip_data *cd)
-+ {
-++	int err;
-++
-+ 	ds->cd = cd;
-+ 
-+ 	/* We don't support interconnected switches nor multiple trees via
-+@@ -814,22 +905,26 @@ static int dsa_switch_parse(struct dsa_s
-+ 	if (!ds->dst)
-+ 		return -ENOMEM;
-+ 
-+-	return dsa_switch_parse_ports(ds, cd);
-+-}
-+-
-+-static int dsa_switch_add(struct dsa_switch *ds)
-+-{
-+-	struct dsa_switch_tree *dst = ds->dst;
-++	err = dsa_switch_touch_ports(ds);
-++	if (err)
-++		return err;
-+ 
-+-	return dsa_tree_add_switch(dst, ds);
-++	return dsa_switch_parse_ports(ds, cd);
-+ }
-+ 
-+ static int dsa_switch_probe(struct dsa_switch *ds)
-+ {
-++	struct dsa_switch_tree *dst;
-+ 	struct dsa_chip_data *pdata = ds->dev->platform_data;
-+ 	struct device_node *np = ds->dev->of_node;
-+ 	int err;
-+ 
-++	if (!ds->dev)
-++		return -ENODEV;
-++
-++	if (!ds->num_ports)
-++		return -EINVAL;
-++
-+ 	if (np)
-+ 		err = dsa_switch_parse_of(ds, np);
-+ 	else if (pdata)
-+@@ -840,29 +935,14 @@ static int dsa_switch_probe(struct dsa_s
-+ 	if (err)
-+ 		return err;
-+ 
-+-	return dsa_switch_add(ds);
-+-}
-+-
-+-struct dsa_switch *dsa_switch_alloc(struct device *dev, size_t n)
-+-{
-+-	struct dsa_switch *ds;
-+-	int i;
-+-
-+-	ds = devm_kzalloc(dev, struct_size(ds, ports, n), GFP_KERNEL);
-+-	if (!ds)
-+-		return NULL;
-+-
-+-	ds->dev = dev;
-+-	ds->num_ports = n;
-+-
-+-	for (i = 0; i < ds->num_ports; ++i) {
-+-		ds->ports[i].index = i;
-+-		ds->ports[i].ds = ds;
-+-	}
-++	dst = ds->dst;
-++	dsa_tree_get(dst);
-++	err = dsa_tree_setup(dst);
-++	if (err)
-++		dsa_tree_put(dst);
-+ 
-+-	return ds;
-++	return err;
-+ }
-+-EXPORT_SYMBOL_GPL(dsa_switch_alloc);
-+ 
-+ int dsa_register_switch(struct dsa_switch *ds)
-+ {
-+@@ -880,9 +960,15 @@ EXPORT_SYMBOL_GPL(dsa_register_switch);
-+ static void dsa_switch_remove(struct dsa_switch *ds)
-+ {
-+ 	struct dsa_switch_tree *dst = ds->dst;
-+-	unsigned int index = ds->index;
-++	struct dsa_port *dp, *next;
-++
-++	list_for_each_entry_safe(dp, next, &dst->ports, list) {
-++		list_del(&dp->list);
-++		kfree(dp);
-++	}
-+ 
-+-	dsa_tree_remove_switch(dst, index);
-++	dsa_tree_teardown(dst);
-++	dsa_tree_put(dst);
-+ }
-+ 
-+ void dsa_unregister_switch(struct dsa_switch *ds)
-+Index: linux-5.4.158/net/dsa/dsa_priv.h
-+===================================================================
-+--- linux-5.4.158.orig/net/dsa/dsa_priv.h
-++++ linux-5.4.158/net/dsa/dsa_priv.h
-+@@ -19,6 +19,9 @@ enum {
-+ 	DSA_NOTIFIER_BRIDGE_LEAVE,
-+ 	DSA_NOTIFIER_FDB_ADD,
-+ 	DSA_NOTIFIER_FDB_DEL,
-++	DSA_NOTIFIER_LAG_CHANGE,
-++	DSA_NOTIFIER_LAG_JOIN,
-++	DSA_NOTIFIER_LAG_LEAVE,
-+ 	DSA_NOTIFIER_MDB_ADD,
-+ 	DSA_NOTIFIER_MDB_DEL,
-+ 	DSA_NOTIFIER_VLAN_ADD,
-+@@ -54,6 +57,15 @@ struct dsa_notifier_mdb_info {
-+ 	int port;
-+ };
-+ 
-++/* DSA_NOTIFIER_LAG_* */
-++struct dsa_notifier_lag_info {
-++	struct net_device *lag;
-++	int sw_index;
-++	int port;
-++
-++	struct netdev_lag_upper_info *info;
-++};
-++
-+ /* DSA_NOTIFIER_VLAN_* */
-+ struct dsa_notifier_vlan_info {
-+ 	const struct switchdev_obj_port_vlan *vlan;
-+@@ -119,25 +131,14 @@ static inline struct net_device *dsa_mas
-+ {
-+ 	struct dsa_port *cpu_dp = dev->dsa_ptr;
-+ 	struct dsa_switch_tree *dst = cpu_dp->dst;
-+-	struct dsa_switch *ds;
-+-	struct dsa_port *slave_port;
-+-
-+-	if (device < 0 || device >= DSA_MAX_SWITCHES)
-+-		return NULL;
-+-
-+-	ds = dst->ds[device];
-+-	if (!ds)
-+-		return NULL;
-+-
-+-	if (port < 0 || port >= ds->num_ports)
-+-		return NULL;
-++	struct dsa_port *dp;
-+ 
-+-	slave_port = &ds->ports[port];
-++	list_for_each_entry(dp, &dst->ports, list)
-++		if (dp->ds->index == device && dp->index == port &&
-++		    dp->type == DSA_PORT_TYPE_USER)
-++			return dp->slave;
-+ 
-+-	if (unlikely(slave_port->type != DSA_PORT_TYPE_USER))
-+-		return NULL;
-+-
-+-	return slave_port->slave;
-++	return NULL;
-+ }
-+ 
-+ /* port.c */
-+@@ -149,6 +150,11 @@ void dsa_port_disable_rt(struct dsa_port
-+ void dsa_port_disable(struct dsa_port *dp);
-+ int dsa_port_bridge_join(struct dsa_port *dp, struct net_device *br);
-+ void dsa_port_bridge_leave(struct dsa_port *dp, struct net_device *br);
-++int dsa_port_lag_change(struct dsa_port *dp,
-++			struct netdev_lag_lower_state_info *linfo);
-++int dsa_port_lag_join(struct dsa_port *dp, struct net_device *lag_dev,
-++		      struct netdev_lag_upper_info *uinfo);
-++void dsa_port_lag_leave(struct dsa_port *dp, struct net_device *lag_dev);
-+ int dsa_port_vlan_filtering(struct dsa_port *dp, bool vlan_filtering,
-+ 			    struct switchdev_trans *trans);
-+ bool dsa_port_skip_vlan_configuration(struct dsa_port *dp);
-+@@ -197,6 +203,22 @@ void dsa_port_phylink_mac_link_up(struct
-+ 				  struct phy_device *phydev);
-+ extern const struct phylink_mac_ops dsa_port_phylink_mac_ops;
-+ 
-++static inline bool dsa_port_offloads_netdev(struct dsa_port *dp,
-++					    struct net_device *dev)
-++{
-++	/* Switchdev offloading can be configured on: */
-++
-++	if (dev == dp->slave)
-++		/* DSA ports directly connected to a bridge. */
-++		return true;
-++
-++	if (dp->lag_dev == dev)
-++		/* DSA ports connected to a bridge via a LAG */
-++		return true;
-++
-++	return false;
-++}
-++
-+ /* slave.c */
-+ extern const struct dsa_device_ops notag_netdev_ops;
-+ void dsa_slave_mii_bus_init(struct dsa_switch *ds);
-+@@ -227,4 +249,9 @@ dsa_slave_to_master(const struct net_dev
-+ /* switch.c */
-+ int dsa_switch_register_notifier(struct dsa_switch *ds);
-+ void dsa_switch_unregister_notifier(struct dsa_switch *ds);
-++
-++/* dsa2.c */
-++void dsa_lag_map(struct dsa_switch_tree *dst, struct net_device *lag);
-++void dsa_lag_unmap(struct dsa_switch_tree *dst, struct net_device *lag);
-++
-+ #endif
-+Index: linux-5.4.158/net/dsa/port.c
-+===================================================================
-+--- linux-5.4.158.orig/net/dsa/port.c
-++++ linux-5.4.158/net/dsa/port.c
-+@@ -174,6 +174,85 @@ void dsa_port_bridge_leave(struct dsa_po
-+ 	dsa_port_set_state_now(dp, BR_STATE_FORWARDING);
-+ }
-+ 
-++int dsa_port_lag_change(struct dsa_port *dp,
-++			struct netdev_lag_lower_state_info *linfo)
-++{
-++	struct dsa_notifier_lag_info info = {
-++		.sw_index = dp->ds->index,
-++		.port = dp->index,
-++	};
-++	bool tx_enabled;
-++
-++	if (!dp->lag_dev)
-++		return 0;
-++
-++	/* On statically configured aggregates (e.g. loadbalance
-++	 * without LACP) ports will always be tx_enabled, even if the
-++	 * link is down. Thus we require both link_up and tx_enabled
-++	 * in order to include it in the tx set.
-++	 */
-++	tx_enabled = linfo->link_up && linfo->tx_enabled;
-++
-++	if (tx_enabled == dp->lag_tx_enabled)
-++		return 0;
-++
-++	dp->lag_tx_enabled = tx_enabled;
-++
-++	return dsa_port_notify(dp, DSA_NOTIFIER_LAG_CHANGE, &info);
-++}
-++
-++int dsa_port_lag_join(struct dsa_port *dp, struct net_device *lag,
-++		      struct netdev_lag_upper_info *uinfo)
-++{
-++	struct dsa_notifier_lag_info info = {
-++		.sw_index = dp->ds->index,
-++		.port = dp->index,
-++		.lag = lag,
-++		.info = uinfo,
-++	};
-++	int err;
-++
-++	dsa_lag_map(dp->ds->dst, lag);
-++	dp->lag_dev = lag;
-++
-++	err = dsa_port_notify(dp, DSA_NOTIFIER_LAG_JOIN, &info);
-++	if (err) {
-++		dp->lag_dev = NULL;
-++		dsa_lag_unmap(dp->ds->dst, lag);
-++	}
-++
-++	return err;
-++}
-++
-++void dsa_port_lag_leave(struct dsa_port *dp, struct net_device *lag)
-++{
-++	struct dsa_notifier_lag_info info = {
-++		.sw_index = dp->ds->index,
-++		.port = dp->index,
-++		.lag = lag,
-++	};
-++	int err;
-++
-++	if (!dp->lag_dev)
-++		return;
-++
-++	/* Port might have been part of a LAG that in turn was
-++	 * attached to a bridge.
-++	 */
-++	if (dp->bridge_dev)
-++		dsa_port_bridge_leave(dp, dp->bridge_dev);
-++
-++	dp->lag_tx_enabled = false;
-++	dp->lag_dev = NULL;
-++
-++	err = dsa_port_notify(dp, DSA_NOTIFIER_LAG_LEAVE, &info);
-++	if (err)
-++		pr_err("DSA: failed to notify DSA_NOTIFIER_LAG_LEAVE: %d\n",
-++		       err);
-++
-++	dsa_lag_unmap(dp->ds->dst, lag);
-++}
-++
-+ static bool dsa_port_can_apply_vlan_filtering(struct dsa_port *dp,
-+ 					      bool vlan_filtering)
-+ {
-+Index: linux-5.4.158/net/dsa/slave.c
-+===================================================================
-+--- linux-5.4.158.orig/net/dsa/slave.c
-++++ linux-5.4.158/net/dsa/slave.c
-+@@ -26,8 +26,6 @@
-+ 
-+ #include "dsa_priv.h"
-+ 
-+-static bool dsa_slave_dev_check(const struct net_device *dev);
-+-
-+ /* slave mii_bus handling ***************************************************/
-+ static int dsa_slave_phy_read(struct mii_bus *bus, int addr, int reg)
-+ {
-+@@ -286,6 +284,9 @@ static int dsa_slave_port_attr_set(struc
-+ 	struct dsa_port *dp = dsa_slave_to_port(dev);
-+ 	int ret;
-+ 
-++	if (!dsa_port_offloads_netdev(dp, attr->orig_dev))
-++		return -EOPNOTSUPP;
-++
-+ 	switch (attr->id) {
-+ 	case SWITCHDEV_ATTR_ID_PORT_STP_STATE:
-+ 		ret = dsa_port_set_state(dp, attr->u.stp_state, trans);
-+@@ -323,7 +324,7 @@ static int dsa_slave_vlan_add(struct net
-+ 	struct switchdev_obj_port_vlan vlan;
-+ 	int err;
-+ 
-+-	if (obj->orig_dev != dev)
-++	if (!dsa_port_offloads_netdev(dp, obj->orig_dev))
-+ 		return -EOPNOTSUPP;
-+ 
-+ 	if (dsa_port_skip_vlan_configuration(dp))
-+@@ -363,7 +364,7 @@ static int dsa_slave_port_obj_add(struct
-+ 
-+ 	switch (obj->id) {
-+ 	case SWITCHDEV_OBJ_ID_PORT_MDB:
-+-		if (obj->orig_dev != dev)
-++		if (!dsa_port_offloads_netdev(dp, obj->orig_dev))
-+ 			return -EOPNOTSUPP;
-+ 		err = dsa_port_mdb_add(dp, SWITCHDEV_OBJ_PORT_MDB(obj), trans);
-+ 		break;
-+@@ -390,7 +391,7 @@ static int dsa_slave_vlan_del(struct net
-+ {
-+ 	struct dsa_port *dp = dsa_slave_to_port(dev);
-+ 
-+-	if (obj->orig_dev != dev)
-++	if (!dsa_port_offloads_netdev(dp, obj->orig_dev))
-+ 		return -EOPNOTSUPP;
-+ 
-+ 	if (dsa_port_skip_vlan_configuration(dp))
-+@@ -410,7 +411,7 @@ static int dsa_slave_port_obj_del(struct
-+ 
-+ 	switch (obj->id) {
-+ 	case SWITCHDEV_OBJ_ID_PORT_MDB:
-+-		if (obj->orig_dev != dev)
-++		if (!dsa_port_offloads_netdev(dp, obj->orig_dev))
-+ 			return -EOPNOTSUPP;
-+ 		err = dsa_port_mdb_del(dp, SWITCHDEV_OBJ_PORT_MDB(obj));
-+ 		break;
-+@@ -1525,10 +1526,11 @@ void dsa_slave_destroy(struct net_device
-+ 	free_netdev(slave_dev);
-+ }
-+ 
-+-static bool dsa_slave_dev_check(const struct net_device *dev)
-++bool dsa_slave_dev_check(const struct net_device *dev)
-+ {
-+ 	return dev->netdev_ops == &dsa_slave_netdev_ops;
-+ }
-++EXPORT_SYMBOL_GPL(dsa_slave_dev_check);
-+ 
-+ static int dsa_slave_changeupper(struct net_device *dev,
-+ 				 struct netdev_notifier_changeupper_info *info)
-+@@ -1544,6 +1546,46 @@ static int dsa_slave_changeupper(struct
-+ 			dsa_port_bridge_leave(dp, info->upper_dev);
-+ 			err = NOTIFY_OK;
-+ 		}
-++	} else if (netif_is_lag_master(info->upper_dev)) {
-++		if (info->linking) {
-++			err = dsa_port_lag_join(dp, info->upper_dev,
-++						info->upper_info);
-++			if (err == -EOPNOTSUPP) {
-++				NL_SET_ERR_MSG_MOD(info->info.extack,
-++						   "Offloading not supported");
-++				err = 0;
-++			}
-++			err = notifier_from_errno(err);
-++		} else {
-++			dsa_port_lag_leave(dp, info->upper_dev);
-++			err = NOTIFY_OK;
-++		}
-++	}
-++
-++	return err;
-++}
-++
-++static int
-++dsa_slave_lag_changeupper(struct net_device *dev,
-++			  struct netdev_notifier_changeupper_info *info)
-++{
-++	struct net_device *lower;
-++	struct list_head *iter;
-++	int err = NOTIFY_DONE;
-++	struct dsa_port *dp;
-++
-++	netdev_for_each_lower_dev(dev, lower, iter) {
-++		if (!dsa_slave_dev_check(lower))
-++			continue;
-++
-++		dp = dsa_slave_to_port(lower);
-++		if (!dp->lag_dev)
-++			/* Software LAG */
-++			continue;
-++
-++		err = dsa_slave_changeupper(lower, info);
-++		if (notifier_to_errno(err))
-++			break;
-+ 	}
-+ 
-+ 	return err;
-+@@ -1586,11 +1628,33 @@ static int dsa_slave_netdevice_event(str
-+ {
-+ 	struct net_device *dev = netdev_notifier_info_to_dev(ptr);
-+ 
-+-	if (event == NETDEV_CHANGEUPPER) {
-++	switch(event) {
-++	case NETDEV_PRECHANGEUPPER:
-+ 		if (!dsa_slave_dev_check(dev))
-+ 			return dsa_slave_upper_vlan_check(dev, ptr);
-+ 
-+-		return dsa_slave_changeupper(dev, ptr);
-++		break;
-++	case NETDEV_CHANGEUPPER:
-++		if (dsa_slave_dev_check(dev))
-++			return dsa_slave_changeupper(dev, ptr);
-++
-++		if (netif_is_lag_master(dev))
-++			return dsa_slave_lag_changeupper(dev, ptr);
-++
-++		break;
-++	case NETDEV_CHANGELOWERSTATE: {
-++		struct netdev_notifier_changelowerstate_info *info = ptr;
-++		struct dsa_port *dp;
-++		int err;
-++
-++		if (!dsa_slave_dev_check(dev))
-++			break;
-++ 
-++		dp = dsa_slave_to_port(dev);
-++
-++		err = dsa_port_lag_change(dp, info->lower_state_info);
-++		return notifier_from_errno(err);
-++	}
-+ 	}
-+ 
-+ 	return NOTIFY_DONE;
-+Index: linux-5.4.158/net/dsa/switch.c
-+===================================================================
-+--- linux-5.4.158.orig/net/dsa/switch.c
-++++ linux-5.4.158/net/dsa/switch.c
-+@@ -20,7 +20,7 @@ static unsigned int dsa_switch_fastest_a
-+ 	int i;
-+ 
-+ 	for (i = 0; i < ds->num_ports; ++i) {
-+-		struct dsa_port *dp = &ds->ports[i];
-++		struct dsa_port *dp = dsa_to_port(ds, i);
-+ 
-+ 		if (dp->ageing_time && dp->ageing_time < ageing_time)
-+ 			ageing_time = dp->ageing_time;
-+@@ -98,7 +98,7 @@ static int dsa_switch_bridge_leave(struc
-+ 	if (unset_vlan_filtering) {
-+ 		struct switchdev_trans trans = {0};
-+ 
-+-		err = dsa_port_vlan_filtering(&ds->ports[info->port],
-++		err = dsa_port_vlan_filtering(dsa_to_port(ds, info->port),
-+ 					      false, &trans);
-+ 		if (err && err != EOPNOTSUPP)
-+ 			return err;
-+@@ -128,6 +128,47 @@ static int dsa_switch_fdb_del(struct dsa
-+ 	return ds->ops->port_fdb_del(ds, port, info->addr, info->vid);
-+ }
-+ 
-++static int dsa_switch_lag_change(struct dsa_switch *ds,
-++				 struct dsa_notifier_lag_info *info)
-++{
-++	if (ds->index == info->sw_index && ds->ops->port_lag_change)
-++		return ds->ops->port_lag_change(ds, info->port);
-++
-++	if (ds->index != info->sw_index && ds->ops->crosschip_lag_change)
-++		return ds->ops->crosschip_lag_change(ds, info->sw_index,
-++						     info->port);
-++
-++	return 0;
-++}
-++
-++static int dsa_switch_lag_join(struct dsa_switch *ds,
-++			       struct dsa_notifier_lag_info *info)
-++{
-++	if (ds->index == info->sw_index && ds->ops->port_lag_join)
-++		return ds->ops->port_lag_join(ds, info->port, info->lag,
-++					      info->info);
-++
-++	if (ds->index != info->sw_index && ds->ops->crosschip_lag_join)
-++		return ds->ops->crosschip_lag_join(ds, info->sw_index,
-++						   info->port, info->lag,
-++						   info->info);
-++
-++	return 0;
-++}
-++
-++static int dsa_switch_lag_leave(struct dsa_switch *ds,
-++				struct dsa_notifier_lag_info *info)
-++{
-++	if (ds->index == info->sw_index && ds->ops->port_lag_leave)
-++		return ds->ops->port_lag_leave(ds, info->port, info->lag);
-++
-++	if (ds->index != info->sw_index && ds->ops->crosschip_lag_leave)
-++		return ds->ops->crosschip_lag_leave(ds, info->sw_index,
-++						    info->port, info->lag);
-++
-++	return 0;
-++}
-++
-+ static bool dsa_switch_mdb_match(struct dsa_switch *ds, int port,
-+ 				 struct dsa_notifier_mdb_info *info)
-+ {
-+@@ -316,6 +357,15 @@ static int dsa_switch_event(struct notif
-+ 	case DSA_NOTIFIER_FDB_DEL:
-+ 		err = dsa_switch_fdb_del(ds, info);
-+ 		break;
-++	case DSA_NOTIFIER_LAG_CHANGE:
-++		err = dsa_switch_lag_change(ds, info);
-++		break;
-++	case DSA_NOTIFIER_LAG_JOIN:
-++		err = dsa_switch_lag_join(ds, info);
-++		break;
-++	case DSA_NOTIFIER_LAG_LEAVE:
-++		err = dsa_switch_lag_leave(ds, info);
-++		break;
-+ 	case DSA_NOTIFIER_MDB_ADD:
-+ 		err = dsa_switch_mdb_add(ds, info);
-+ 		break;
-+Index: linux-5.4.158/net/dsa/tag_8021q.c
-+===================================================================
-+--- linux-5.4.158.orig/net/dsa/tag_8021q.c
-++++ linux-5.4.158/net/dsa/tag_8021q.c
-+@@ -31,15 +31,14 @@
-+  *	Must be transmitted as zero and ignored on receive.
-+  *
-+  * SWITCH_ID - VID[8:6]:
-+- *	Index of switch within DSA tree. Must be between 0 and
-+- *	DSA_MAX_SWITCHES - 1.
-++ *	Index of switch within DSA tree. Must be between 0 and 7.
-+  *
-+  * RSV - VID[5:4]:
-+  *	To be used for further expansion of PORT or for other purposes.
-+  *	Must be transmitted as zero and ignored on receive.
-+  *
-+  * PORT - VID[3:0]:
-+- *	Index of switch port. Must be between 0 and DSA_MAX_PORTS - 1.
-++ *	Index of switch port. Must be between 0 and 15.
-+  */
-+ 
-+ #define DSA_8021Q_DIR_SHIFT		10
-+@@ -103,7 +102,7 @@ static int dsa_8021q_restore_pvid(struct
-+ 	if (!dsa_is_user_port(ds, port))
-+ 		return 0;
-+ 
-+-	slave = ds->ports[port].slave;
-++	slave = dsa_to_port(ds, port)->slave;
-+ 
-+ 	err = br_vlan_get_pvid(slave, &pvid);
-+ 	if (!pvid || err < 0)
-+@@ -118,7 +117,7 @@ static int dsa_8021q_restore_pvid(struct
-+ 		return err;
-+ 	}
-+ 
-+-	return dsa_port_vid_add(&ds->ports[port], pvid, vinfo.flags);
-++	return dsa_port_vid_add(dsa_to_port(ds, port), pvid, vinfo.flags);
-+ }
-+ 
-+ /* If @enabled is true, installs @vid with @flags into the switch port's HW
-+@@ -130,7 +129,7 @@ static int dsa_8021q_restore_pvid(struct
-+ static int dsa_8021q_vid_apply(struct dsa_switch *ds, int port, u16 vid,
-+ 			       u16 flags, bool enabled)
-+ {
-+-	struct dsa_port *dp = &ds->ports[port];
-++	struct dsa_port *dp = dsa_to_port(ds, port);
-+ 	struct bridge_vlan_info vinfo;
-+ 	int err;
-+ 
-+Index: linux-5.4.158/net/dsa/tag_dsa.c
-+===================================================================
-+--- linux-5.4.158.orig/net/dsa/tag_dsa.c
-++++ linux-5.4.158/net/dsa/tag_dsa.c
-+@@ -1,7 +1,48 @@
-+ // SPDX-License-Identifier: GPL-2.0+
-+ /*
-+- * net/dsa/tag_dsa.c - (Non-ethertype) DSA tagging
-++ * Regular and Ethertype DSA tagging
-+  * Copyright (c) 2008-2009 Marvell Semiconductor
-++ *
-++ * Regular DSA
-++ * -----------
-++
-++ * For untagged (in 802.1Q terms) packets, the switch will splice in
-++ * the tag between the SA and the ethertype of the original
-++ * packet. Tagged frames will instead have their outermost .1Q tag
-++ * converted to a DSA tag. It expects the same layout when receiving
-++ * packets from the CPU.
-++ *
-++ * Example:
-++ *
-++ *     .----.----.----.---------
-++ * Pu: | DA | SA | ET | Payload ...
-++ *     '----'----'----'---------
-++ *       6    6    2       N
-++ *     .----.----.--------.-----.----.---------
-++ * Pt: | DA | SA | 0x8100 | TCI | ET | Payload ...
-++ *     '----'----'--------'-----'----'---------
-++ *       6    6       2      2    2       N
-++ *     .----.----.-----.----.---------
-++ * Pd: | DA | SA | DSA | ET | Payload ...
-++ *     '----'----'-----'----'---------
-++ *       6    6     4    2       N
-++ *
-++ * No matter if a packet is received untagged (Pu) or tagged (Pt),
-++ * they will both have the same layout (Pd) when they are sent to the
-++ * CPU. This is done by ignoring 802.3, replacing the ethertype field
-++ * with more metadata, among which is a bit to signal if the original
-++ * packet was tagged or not.
-++ *
-++ * Ethertype DSA
-++ * -------------
-++ * Uses the exact same tag format as regular DSA, but also includes a
-++ * proper ethertype field (which the mv88e6xxx driver sets to
-++ * ETH_P_EDSA/0xdada) followed by two zero bytes:
-++ *
-++ * .----.----.--------.--------.-----.----.---------
-++ * | DA | SA | 0xdada | 0x0000 | DSA | ET | Payload ...
-++ * '----'----'--------'--------'-----'----'---------
-++ *   6    6       2        2      4    2       N
-+  */
-+ 
-+ #include <linux/etherdevice.h>
-+@@ -12,16 +53,81 @@
-+ 
-+ #define DSA_HLEN	4
-+ 
-+-static struct sk_buff *dsa_xmit(struct sk_buff *skb, struct net_device *dev)
-++/**
-++ * enum dsa_cmd - DSA Command
-++ * @DSA_CMD_TO_CPU: Set on packets that were trapped or mirrored to
-++ *     the CPU port. This is needed to implement control protocols,
-++ *     e.g. STP and LLDP, that must not allow those control packets to
-++ *     be switched according to the normal rules.
-++ * @DSA_CMD_FROM_CPU: Used by the CPU to send a packet to a specific
-++ *     port, ignoring all the barriers that the switch normally
-++ *     enforces (VLANs, STP port states etc.). No source address
-++ *     learning takes place. "sudo send packet"
-++ * @DSA_CMD_TO_SNIFFER: Set on the copies of packets that matched some
-++ *     user configured ingress or egress monitor criteria. These are
-++ *     forwarded by the switch tree to the user configured ingress or
-++ *     egress monitor port, which can be set to the CPU port or a
-++ *     regular port. If the destination is a regular port, the tag
-++ *     will be removed before egressing the port. If the destination
-++ *     is the CPU port, the tag will not be removed.
-++ * @DSA_CMD_FORWARD: This tag is used on all bulk traffic passing
-++ *     through the switch tree, including the flows that are directed
-++ *     towards the CPU. Its device/port tuple encodes the original
-++ *     source port on which the packet ingressed. It can also be used
-++ *     on transmit by the CPU to defer the forwarding decision to the
-++ *     hardware, based on the current config of PVT/VTU/ATU
-++ *     etc. Source address learning takes places if enabled on the
-++ *     receiving DSA/CPU port.
-++ */
-++enum dsa_cmd {
-++	DSA_CMD_TO_CPU     = 0,
-++	DSA_CMD_FROM_CPU   = 1,
-++	DSA_CMD_TO_SNIFFER = 2,
-++	DSA_CMD_FORWARD    = 3
-++};
-++
-++/**
-++ * enum dsa_code - TO_CPU Code
-++ *
-++ * @DSA_CODE_MGMT_TRAP: DA was classified as a management
-++ *     address. Typical examples include STP BPDUs and LLDP.
-++ * @DSA_CODE_FRAME2REG: Response to a "remote management" request.
-++ * @DSA_CODE_IGMP_MLD_TRAP: IGMP/MLD signaling.
-++ * @DSA_CODE_POLICY_TRAP: Frame matched some policy configuration on
-++ *     the device. Typical examples are matching on DA/SA/VID and DHCP
-++ *     snooping.
-++ * @DSA_CODE_ARP_MIRROR: The name says it all really.
-++ * @DSA_CODE_POLICY_MIRROR: Same as @DSA_CODE_POLICY_TRAP, but the
-++ *     particular policy was set to trigger a mirror instead of a
-++ *     trap.
-++ * @DSA_CODE_RESERVED_6: Unused on all devices up to at least 6393X.
-++ * @DSA_CODE_RESERVED_7: Unused on all devices up to at least 6393X.
-++ *
-++ * A 3-bit code is used to relay why a particular frame was sent to
-++ * the CPU. We only use this to determine if the packet was mirrored
-++ * or trapped, i.e. whether the packet has been forwarded by hardware
-++ * or not.
-++ *
-++ * This is the superset of all possible codes. Any particular device
-++ * may only implement a subset.
-++ */
-++enum dsa_code {
-++	DSA_CODE_MGMT_TRAP     = 0,
-++	DSA_CODE_FRAME2REG     = 1,
-++	DSA_CODE_IGMP_MLD_TRAP = 2,
-++	DSA_CODE_POLICY_TRAP   = 3,
-++	DSA_CODE_ARP_MIRROR    = 4,
-++	DSA_CODE_POLICY_MIRROR = 5,
-++	DSA_CODE_RESERVED_6    = 6,
-++	DSA_CODE_RESERVED_7    = 7
-++};
-++
-++static struct sk_buff *dsa_xmit_ll(struct sk_buff *skb, struct net_device *dev,
-++				   u8 extra)
-+ {
-+ 	struct dsa_port *dp = dsa_slave_to_port(dev);
-+ 	u8 *dsa_header;
-+ 
-+-	/*
-+-	 * Convert the outermost 802.1q tag to a DSA tag for tagged
-+-	 * packets, or insert a DSA tag between the addresses and
-+-	 * the ethertype field for untagged packets.
-+-	 */
-+ 	if (skb->protocol == htons(ETH_P_8021Q)) {
-+ 		if (skb_cow_head(skb, 0) < 0)
-+ 			return NULL;
-+@@ -29,8 +135,13 @@ static struct sk_buff *dsa_xmit(struct s
-+ 		/*
-+ 		 * Construct tagged FROM_CPU DSA tag from 802.1q tag.
-+ 		 */
-+-		dsa_header = skb->data + 2 * ETH_ALEN;
-+-		dsa_header[0] = 0x60 | dp->ds->index;
-++		if (extra) {
-++			skb_push(skb, extra);
-++			memmove(skb->data, skb->data + extra, 2 * ETH_ALEN);
-++		}
-++
-++		dsa_header = skb->data + 2 * ETH_ALEN + extra;
-++		dsa_header[0] = (DSA_CMD_FROM_CPU << 6) | 0x20 | dp->ds->index;
-+ 		dsa_header[1] = dp->index << 3;
-+ 
-+ 		/*
-+@@ -43,15 +154,12 @@ static struct sk_buff *dsa_xmit(struct s
-+ 	} else {
-+ 		if (skb_cow_head(skb, DSA_HLEN) < 0)
-+ 			return NULL;
-+-		skb_push(skb, DSA_HLEN);
-++		skb_push(skb, DSA_HLEN + extra);
-++		memmove(skb->data, skb->data + DSA_HLEN + extra, 2 * ETH_ALEN);
-+ 
-+-		memmove(skb->data, skb->data + DSA_HLEN, 2 * ETH_ALEN);
-+-
-+-		/*
-+-		 * Construct untagged FROM_CPU DSA tag.
-+-		 */
-+-		dsa_header = skb->data + 2 * ETH_ALEN;
-+-		dsa_header[0] = 0x40 | dp->ds->index;
-++		/* Construct untagged FROM_CPU DSA tag. */
-++		dsa_header = skb->data + 2 * ETH_ALEN + extra;
-++		dsa_header[0] = (DSA_CMD_FROM_CPU << 6) | dp->ds->index;
-+ 		dsa_header[1] = dp->index << 3;
-+ 		dsa_header[2] = 0x00;
-+ 		dsa_header[3] = 0x00;
-+@@ -60,47 +168,91 @@ static struct sk_buff *dsa_xmit(struct s
-+ 	return skb;
-+ }
-+ 
-+-static struct sk_buff *dsa_rcv(struct sk_buff *skb, struct net_device *dev,
-+-			       struct packet_type *pt)
-++static struct sk_buff *dsa_rcv_ll(struct sk_buff *skb, struct net_device *dev,
-++				  u8 extra)
-+ {
-++	int source_device, source_port;
-++	bool trunk = false;
-++	enum dsa_code code;
-++	enum dsa_cmd cmd;
-+ 	u8 *dsa_header;
-+-	int source_device;
-+-	int source_port;
-+ 
-+-	if (unlikely(!pskb_may_pull(skb, DSA_HLEN)))
-+-		return NULL;
-+-
-+-	/*
-+-	 * The ethertype field is part of the DSA header.
-+-	 */
-++	/* The ethertype field is part of the DSA header. */
-+ 	dsa_header = skb->data - 2;
-+ 
-+-	/*
-+-	 * Check that frame type is either TO_CPU or FORWARD.
-+-	 */
-+-	if ((dsa_header[0] & 0xc0) != 0x00 && (dsa_header[0] & 0xc0) != 0xc0)
-++	cmd = dsa_header[0] >> 6;
-++	switch (cmd) {
-++	case DSA_CMD_FORWARD:
-++		skb->offload_fwd_mark = 1;
-++
-++		trunk = !!(dsa_header[1] & 7);
-++		break;
-++
-++	case DSA_CMD_TO_CPU:
-++		code = (dsa_header[1] & 0x6) | ((dsa_header[2] >> 4) & 1);
-++
-++		switch (code) {
-++		case DSA_CODE_FRAME2REG:
-++			/* Remote management is not implemented yet,
-++			 * drop.
-++			 */
-++			return NULL;
-++		case DSA_CODE_ARP_MIRROR:
-++		case DSA_CODE_POLICY_MIRROR:
-++			/* Mark mirrored packets to notify any upper
-++			 * device (like a bridge) that forwarding has
-++			 * already been done by hardware.
-++			 */
-++			skb->offload_fwd_mark = 1;
-++			break;
-++		case DSA_CODE_MGMT_TRAP:
-++		case DSA_CODE_IGMP_MLD_TRAP:
-++		case DSA_CODE_POLICY_TRAP:
-++			/* Traps have, by definition, not been
-++			 * forwarded by hardware, so don't mark them.
-++			 */
-++			break;
-++		default:
-++			/* Reserved code, this could be anything. Drop
-++			 * seems like the safest option.
-++			 */
-++			return NULL;
-++		}
-++
-++		break;
-++
-++	default:
-+ 		return NULL;
-++	}
-+ 
-+-	/*
-+-	 * Determine source device and port.
-+-	 */
-+ 	source_device = dsa_header[0] & 0x1f;
-+ 	source_port = (dsa_header[1] >> 3) & 0x1f;
-+ 
-+-	skb->dev = dsa_master_find_slave(dev, source_device, source_port);
-++	if (trunk) {
-++		struct dsa_port *cpu_dp = dev->dsa_ptr;
-++
-++		/* The exact source port is not available in the tag,
-++		 * so we inject the frame directly on the upper
-++		 * team/bond.
-++		 */
-++		skb->dev = dsa_lag_dev(cpu_dp->dst, source_port);
-++	} else {
-++		skb->dev = dsa_master_find_slave(dev, source_device,
-++						 source_port);
-++	}
-++
-+ 	if (!skb->dev)
-+ 		return NULL;
-+ 
-+-	/*
-+-	 * Convert the DSA header to an 802.1q header if the 'tagged'
-+-	 * bit in the DSA header is set.  If the 'tagged' bit is clear,
-+-	 * delete the DSA header entirely.
-++	/* If the 'tagged' bit is set; convert the DSA tag to a 802.1Q
-++	 * tag, and delete the ethertype (extra) if applicable. If the
-++	 * 'tagged' bit is cleared; delete the DSA tag, and ethertype
-++	 * if applicable.
-+ 	 */
-+ 	if (dsa_header[0] & 0x20) {
-+ 		u8 new_header[4];
-+ 
-+-		/*
-+-		 * Insert 802.1q ethertype and copy the VLAN-related
-++		/* Insert 802.1Q ethertype and copy the VLAN-related
-+ 		 * fields, but clear the bit that will hold CFI (since
-+ 		 * DSA uses that bit location for another purpose).
-+ 		 */
-+@@ -109,16 +261,13 @@ static struct sk_buff *dsa_rcv(struct sk
-+ 		new_header[2] = dsa_header[2] & ~0x10;
-+ 		new_header[3] = dsa_header[3];
-+ 
-+-		/*
-+-		 * Move CFI bit from its place in the DSA header to
-+-		 * its 802.1q-designated place.
-++		/* Move CFI bit from its place in the DSA header to
-++		 * its 802.1Q-designated place.
-+ 		 */
-+ 		if (dsa_header[1] & 0x01)
-+ 			new_header[2] |= 0x10;
-+ 
-+-		/*
-+-		 * Update packet checksum if skb is CHECKSUM_COMPLETE.
-+-		 */
-++		/* Update packet checksum if skb is CHECKSUM_COMPLETE. */
-+ 		if (skb->ip_summed == CHECKSUM_COMPLETE) {
-+ 			__wsum c = skb->csum;
-+ 			c = csum_add(c, csum_partial(new_header + 2, 2, 0));
-+@@ -126,19 +275,20 @@ static struct sk_buff *dsa_rcv(struct sk
-+ 			skb->csum = c;
-+ 		}
-+ 
-++
-+ 		memcpy(dsa_header, new_header, DSA_HLEN);
-++
-++		if (extra)
-++			memmove(skb->data - ETH_HLEN,
-++				skb->data - ETH_HLEN - extra,
-++				2 * ETH_ALEN);
-+ 	} else {
-+-		/*
-+-		 * Remove DSA tag and update checksum.
-+-		 */
-+ 		skb_pull_rcsum(skb, DSA_HLEN);
-+ 		memmove(skb->data - ETH_HLEN,
-+-			skb->data - ETH_HLEN - DSA_HLEN,
-++			skb->data - ETH_HLEN - DSA_HLEN - extra,
-+ 			2 * ETH_ALEN);
-+ 	}
-+ 
-+-	skb->offload_fwd_mark = 1;
-+-
-+ 	return skb;
-+ }
-+ 
-+@@ -150,16 +300,88 @@ static int dsa_tag_flow_dissect(const st
-+ 	return 0;
-+ }
-+ 
-++#if IS_ENABLED(CONFIG_NET_DSA_TAG_DSA)
-++
-++static struct sk_buff *dsa_xmit(struct sk_buff *skb, struct net_device *dev)
-++{
-++	return dsa_xmit_ll(skb, dev, 0);
-++}
-++
-++static struct sk_buff *dsa_rcv(struct sk_buff *skb, struct net_device *dev,
-++			       struct packet_type *pt)
-++{
-++	if (unlikely(!pskb_may_pull(skb, DSA_HLEN)))
-++		return NULL;
-++
-++	return dsa_rcv_ll(skb, dev, 0);
-++}
-++
-+ static const struct dsa_device_ops dsa_netdev_ops = {
-+-	.name	= "dsa",
-+-	.proto	= DSA_TAG_PROTO_DSA,
-+-	.xmit	= dsa_xmit,
-+-	.rcv	= dsa_rcv,
-++	.name	  = "dsa",
-++	.proto	  = DSA_TAG_PROTO_DSA,
-++	.xmit	  = dsa_xmit,
-++	.rcv	  = dsa_rcv,
-+ 	.flow_dissect   = dsa_tag_flow_dissect,
-+ 	.overhead = DSA_HLEN,
-+ };
-+ 
-+-MODULE_LICENSE("GPL");
-++DSA_TAG_DRIVER(dsa_netdev_ops);
-+ MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_DSA);
-+ 
-+-module_dsa_tag_driver(dsa_netdev_ops);
-++#endif	/* CONFIG_NET_DSA_TAG_DSA */
-++
-++#if IS_ENABLED(CONFIG_NET_DSA_TAG_EDSA)
-++
-++#define EDSA_HLEN 8
-++
-++static struct sk_buff *edsa_xmit(struct sk_buff *skb, struct net_device *dev)
-++{
-++	u8 *edsa_header;
-++
-++	skb = dsa_xmit_ll(skb, dev, EDSA_HLEN - DSA_HLEN);
-++	if (!skb)
-++		return NULL;
-++
-++	edsa_header = skb->data + 2 * ETH_ALEN;
-++	edsa_header[0] = (ETH_P_EDSA >> 8) & 0xff;
-++	edsa_header[1] = ETH_P_EDSA & 0xff;
-++	edsa_header[2] = 0x00;
-++	edsa_header[3] = 0x00;
-++	return skb;
-++}
-++
-++static struct sk_buff *edsa_rcv(struct sk_buff *skb, struct net_device *dev,
-++				struct packet_type *pt)
-++{
-++	if (unlikely(!pskb_may_pull(skb, EDSA_HLEN)))
-++		return NULL;
-++
-++	skb_pull_rcsum(skb, EDSA_HLEN - DSA_HLEN);
-++
-++	return dsa_rcv_ll(skb, dev, EDSA_HLEN - DSA_HLEN);
-++}
-++
-++static const struct dsa_device_ops edsa_netdev_ops = {
-++	.name	  = "edsa",
-++	.proto	  = DSA_TAG_PROTO_EDSA,
-++	.xmit	  = edsa_xmit,
-++	.rcv	  = edsa_rcv,
-++	.overhead = EDSA_HLEN,
-++};
-++
-++DSA_TAG_DRIVER(edsa_netdev_ops);
-++MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_EDSA);
-++#endif	/* CONFIG_NET_DSA_TAG_EDSA */
-++
-++static struct dsa_tag_driver *dsa_tag_drivers[] = {
-++#if IS_ENABLED(CONFIG_NET_DSA_TAG_DSA)
-++	&DSA_TAG_DRIVER_NAME(dsa_netdev_ops),
-++#endif
-++#if IS_ENABLED(CONFIG_NET_DSA_TAG_EDSA)
-++	&DSA_TAG_DRIVER_NAME(edsa_netdev_ops),
-++#endif
-++};
-++
-++module_dsa_tag_drivers(dsa_tag_drivers);
-++
-++MODULE_LICENSE("GPL");
-+Index: linux-5.4.158/net/dsa/tag_edsa.c
-+===================================================================
-+--- linux-5.4.158.orig/net/dsa/tag_edsa.c
-++++ /dev/null
-+@@ -1,215 +0,0 @@
-+-// SPDX-License-Identifier: GPL-2.0+
-+-/*
-+- * net/dsa/tag_edsa.c - Ethertype DSA tagging
-+- * Copyright (c) 2008-2009 Marvell Semiconductor
-+- */
-+-
-+-#include <linux/etherdevice.h>
-+-#include <linux/list.h>
-+-#include <linux/slab.h>
-+-
-+-#include "dsa_priv.h"
-+-
-+-#define DSA_HLEN	4
-+-#define EDSA_HLEN	8
-+-
-+-#define FRAME_TYPE_TO_CPU	0x00
-+-#define FRAME_TYPE_FORWARD	0x03
-+-
-+-#define TO_CPU_CODE_MGMT_TRAP		0x00
-+-#define TO_CPU_CODE_FRAME2REG		0x01
-+-#define TO_CPU_CODE_IGMP_MLD_TRAP	0x02
-+-#define TO_CPU_CODE_POLICY_TRAP		0x03
-+-#define TO_CPU_CODE_ARP_MIRROR		0x04
-+-#define TO_CPU_CODE_POLICY_MIRROR	0x05
-+-
-+-static struct sk_buff *edsa_xmit(struct sk_buff *skb, struct net_device *dev)
-+-{
-+-	struct dsa_port *dp = dsa_slave_to_port(dev);
-+-	u8 *edsa_header;
-+-
-+-	/*
-+-	 * Convert the outermost 802.1q tag to a DSA tag and prepend
-+-	 * a DSA ethertype field is the packet is tagged, or insert
-+-	 * a DSA ethertype plus DSA tag between the addresses and the
-+-	 * current ethertype field if the packet is untagged.
-+-	 */
-+-	if (skb->protocol == htons(ETH_P_8021Q)) {
-+-		if (skb_cow_head(skb, DSA_HLEN) < 0)
-+-			return NULL;
-+-		skb_push(skb, DSA_HLEN);
-+-
-+-		memmove(skb->data, skb->data + DSA_HLEN, 2 * ETH_ALEN);
-+-
-+-		/*
-+-		 * Construct tagged FROM_CPU DSA tag from 802.1q tag.
-+-		 */
-+-		edsa_header = skb->data + 2 * ETH_ALEN;
-+-		edsa_header[0] = (ETH_P_EDSA >> 8) & 0xff;
-+-		edsa_header[1] = ETH_P_EDSA & 0xff;
-+-		edsa_header[2] = 0x00;
-+-		edsa_header[3] = 0x00;
-+-		edsa_header[4] = 0x60 | dp->ds->index;
-+-		edsa_header[5] = dp->index << 3;
-+-
-+-		/*
-+-		 * Move CFI field from byte 6 to byte 5.
-+-		 */
-+-		if (edsa_header[6] & 0x10) {
-+-			edsa_header[5] |= 0x01;
-+-			edsa_header[6] &= ~0x10;
-+-		}
-+-	} else {
-+-		if (skb_cow_head(skb, EDSA_HLEN) < 0)
-+-			return NULL;
-+-		skb_push(skb, EDSA_HLEN);
-+-
-+-		memmove(skb->data, skb->data + EDSA_HLEN, 2 * ETH_ALEN);
-+-
-+-		/*
-+-		 * Construct untagged FROM_CPU DSA tag.
-+-		 */
-+-		edsa_header = skb->data + 2 * ETH_ALEN;
-+-		edsa_header[0] = (ETH_P_EDSA >> 8) & 0xff;
-+-		edsa_header[1] = ETH_P_EDSA & 0xff;
-+-		edsa_header[2] = 0x00;
-+-		edsa_header[3] = 0x00;
-+-		edsa_header[4] = 0x40 | dp->ds->index;
-+-		edsa_header[5] = dp->index << 3;
-+-		edsa_header[6] = 0x00;
-+-		edsa_header[7] = 0x00;
-+-	}
-+-
-+-	return skb;
-+-}
-+-
-+-static struct sk_buff *edsa_rcv(struct sk_buff *skb, struct net_device *dev,
-+-				struct packet_type *pt)
-+-{
-+-	u8 *edsa_header;
-+-	int frame_type;
-+-	int code;
-+-	int source_device;
-+-	int source_port;
-+-
-+-	if (unlikely(!pskb_may_pull(skb, EDSA_HLEN)))
-+-		return NULL;
-+-
-+-	/*
-+-	 * Skip the two null bytes after the ethertype.
-+-	 */
-+-	edsa_header = skb->data + 2;
-+-
-+-	/*
-+-	 * Check that frame type is either TO_CPU or FORWARD.
-+-	 */
-+-	frame_type = edsa_header[0] >> 6;
-+-
-+-	switch (frame_type) {
-+-	case FRAME_TYPE_TO_CPU:
-+-		code = (edsa_header[1] & 0x6) | ((edsa_header[2] >> 4) & 1);
-+-
-+-		/*
-+-		 * Mark the frame to never egress on any port of the same switch
-+-		 * unless it's a trapped IGMP/MLD packet, in which case the
-+-		 * bridge might want to forward it.
-+-		 */
-+-		if (code != TO_CPU_CODE_IGMP_MLD_TRAP)
-+-			skb->offload_fwd_mark = 1;
-+-
-+-		break;
-+-
-+-	case FRAME_TYPE_FORWARD:
-+-		skb->offload_fwd_mark = 1;
-+-		break;
-+-
-+-	default:
-+-		return NULL;
-+-	}
-+-
-+-	/*
-+-	 * Determine source device and port.
-+-	 */
-+-	source_device = edsa_header[0] & 0x1f;
-+-	source_port = (edsa_header[1] >> 3) & 0x1f;
-+-
-+-	skb->dev = dsa_master_find_slave(dev, source_device, source_port);
-+-	if (!skb->dev)
-+-		return NULL;
-+-
-+-	/*
-+-	 * If the 'tagged' bit is set, convert the DSA tag to a 802.1q
-+-	 * tag and delete the ethertype part.  If the 'tagged' bit is
-+-	 * clear, delete the ethertype and the DSA tag parts.
-+-	 */
-+-	if (edsa_header[0] & 0x20) {
-+-		u8 new_header[4];
-+-
-+-		/*
-+-		 * Insert 802.1q ethertype and copy the VLAN-related
-+-		 * fields, but clear the bit that will hold CFI (since
-+-		 * DSA uses that bit location for another purpose).
-+-		 */
-+-		new_header[0] = (ETH_P_8021Q >> 8) & 0xff;
-+-		new_header[1] = ETH_P_8021Q & 0xff;
-+-		new_header[2] = edsa_header[2] & ~0x10;
-+-		new_header[3] = edsa_header[3];
-+-
-+-		/*
-+-		 * Move CFI bit from its place in the DSA header to
-+-		 * its 802.1q-designated place.
-+-		 */
-+-		if (edsa_header[1] & 0x01)
-+-			new_header[2] |= 0x10;
-+-
-+-		skb_pull_rcsum(skb, DSA_HLEN);
-+-
-+-		/*
-+-		 * Update packet checksum if skb is CHECKSUM_COMPLETE.
-+-		 */
-+-		if (skb->ip_summed == CHECKSUM_COMPLETE) {
-+-			__wsum c = skb->csum;
-+-			c = csum_add(c, csum_partial(new_header + 2, 2, 0));
-+-			c = csum_sub(c, csum_partial(edsa_header + 2, 2, 0));
-+-			skb->csum = c;
-+-		}
-+-
-+-		memcpy(edsa_header, new_header, DSA_HLEN);
-+-
-+-		memmove(skb->data - ETH_HLEN,
-+-			skb->data - ETH_HLEN - DSA_HLEN,
-+-			2 * ETH_ALEN);
-+-	} else {
-+-		/*
-+-		 * Remove DSA tag and update checksum.
-+-		 */
-+-		skb_pull_rcsum(skb, EDSA_HLEN);
-+-		memmove(skb->data - ETH_HLEN,
-+-			skb->data - ETH_HLEN - EDSA_HLEN,
-+-			2 * ETH_ALEN);
-+-	}
-+-
-+-	return skb;
-+-}
-+-
-+-static int edsa_tag_flow_dissect(const struct sk_buff *skb, __be16 *proto,
-+-				 int *offset)
-+-{
-+-	*offset = 8;
-+-	*proto = ((__be16 *)skb->data)[3];
-+-	return 0;
-+-}
-+-
-+-static const struct dsa_device_ops edsa_netdev_ops = {
-+-	.name	= "edsa",
-+-	.proto	= DSA_TAG_PROTO_EDSA,
-+-	.xmit	= edsa_xmit,
-+-	.rcv	= edsa_rcv,
-+-	.flow_dissect   = edsa_tag_flow_dissect,
-+-	.overhead = EDSA_HLEN,
-+-};
-+-
-+-MODULE_LICENSE("GPL");
-+-MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_EDSA);
-+-
-+-module_dsa_tag_driver(edsa_netdev_ops);
-diff --git a/target/linux/realtek/patches-5.4/101-brflood-api.patch b/target/linux/realtek/patches-5.4/101-brflood-api.patch
-new file mode 100644
-index 0000000000..0a7f1986ea
---- /dev/null
-+++ b/target/linux/realtek/patches-5.4/101-brflood-api.patch
-@@ -0,0 +1,817 @@
-+Index: linux-5.4.111/drivers/net/dsa/b53/b53_common.c
-+===================================================================
-+--- linux-5.4.111.orig/drivers/net/dsa/b53/b53_common.c
-++++ linux-5.4.111/drivers/net/dsa/b53/b53_common.c
-+@@ -527,6 +527,39 @@ static void b53_port_set_learning(struct
-+ 	b53_write16(dev, B53_CTRL_PAGE, B53_DIS_LEARNING, reg);
-+ }
-+ 
-++static void b53_port_set_ucast_flood(struct b53_device *dev, int port,
-++				     bool unicast)
-++{
-++	u16 uc;
-++
-++	b53_read16(dev, B53_CTRL_PAGE, B53_UC_FLOOD_MASK, &uc);
-++	if (unicast)
-++		uc |= BIT(port);
-++	else
-++		uc &= ~BIT(port);
-++	b53_write16(dev, B53_CTRL_PAGE, B53_UC_FLOOD_MASK, uc);
-++}
-++
-++static void b53_port_set_mcast_flood(struct b53_device *dev, int port,
-++				     bool multicast)
-++{
-++	u16 mc;
-++
-++	b53_read16(dev, B53_CTRL_PAGE, B53_MC_FLOOD_MASK, &mc);
-++	if (multicast)
-++		mc |= BIT(port);
-++	else
-++		mc &= ~BIT(port);
-++	b53_write16(dev, B53_CTRL_PAGE, B53_MC_FLOOD_MASK, mc);
-++
-++	b53_read16(dev, B53_CTRL_PAGE, B53_IPMC_FLOOD_MASK, &mc);
-++	if (multicast)
-++		mc |= BIT(port);
-++	else
-++		mc &= ~BIT(port);
-++	b53_write16(dev, B53_CTRL_PAGE, B53_IPMC_FLOOD_MASK, mc);
-++}
-++
-+ int b53_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy)
-+ {
-+ 	struct b53_device *dev = ds->priv;
-+@@ -539,7 +572,8 @@ int b53_enable_port(struct dsa_switch *d
-+ 
-+ 	cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
-+ 
-+-	b53_br_egress_floods(ds, port, true, true);
-++	b53_port_set_ucast_flood(dev, port, true);
-++	b53_port_set_mcast_flood(dev, port, true);
-+ 	b53_port_set_learning(dev, port, false);
-+ 
-+ 	if (dev->ops->irq_enable)
-+@@ -658,7 +692,8 @@ static void b53_enable_cpu_port(struct b
-+ 
-+ 	b53_brcm_hdr_setup(dev->ds, port);
-+ 
-+-	b53_br_egress_floods(dev->ds, port, true, true);
-++	b53_port_set_ucast_flood(dev, port, true);
-++	b53_port_set_mcast_flood(dev, port, true);
-+ 	b53_port_set_learning(dev, port, false);
-+ }
-+ 
-+@@ -1808,37 +1843,37 @@ void b53_br_fast_age(struct dsa_switch *
-+ }
-+ EXPORT_SYMBOL(b53_br_fast_age);
-+ 
-+-int b53_br_egress_floods(struct dsa_switch *ds, int port,
-+-			 bool unicast, bool multicast)
-++static int b53_br_flags_pre(struct dsa_switch *ds, int port,
-++			    unsigned long flags,
-++			    struct netlink_ext_ack *extack)
-+ {
-+-	struct b53_device *dev = ds->priv;
-+-	u16 uc, mc;
-+-
-+-	b53_read16(dev, B53_CTRL_PAGE, B53_UC_FLOOD_MASK, &uc);
-+-	if (unicast)
-+-		uc |= BIT(port);
-+-	else
-+-		uc &= ~BIT(port);
-+-	b53_write16(dev, B53_CTRL_PAGE, B53_UC_FLOOD_MASK, uc);
-++	if (flags & ~(BR_FLOOD | BR_MCAST_FLOOD))
-++		return -EINVAL;
-+ 
-+-	b53_read16(dev, B53_CTRL_PAGE, B53_MC_FLOOD_MASK, &mc);
-+-	if (multicast)
-+-		mc |= BIT(port);
-+-	else
-+-		mc &= ~BIT(port);
-+-	b53_write16(dev, B53_CTRL_PAGE, B53_MC_FLOOD_MASK, mc);
-++	return 0;
-++}
-+ 
-+-	b53_read16(dev, B53_CTRL_PAGE, B53_IPMC_FLOOD_MASK, &mc);
-+-	if (multicast)
-+-		mc |= BIT(port);
-+-	else
-+-		mc &= ~BIT(port);
-+-	b53_write16(dev, B53_CTRL_PAGE, B53_IPMC_FLOOD_MASK, mc);
-++static int b53_br_flags(struct dsa_switch *ds, int port,
-++			unsigned long flags,
-++			struct netlink_ext_ack *extack)
-++{
-++	if (flags & BR_FLOOD)
-++		b53_port_set_ucast_flood(ds->priv, port,
-++					 !!(flags.val & BR_FLOOD));
-++	if (flags & BR_MCAST_FLOOD)
-++		b53_port_set_mcast_flood(ds->priv, port,
-++					 !!(flags.val & BR_MCAST_FLOOD));
-+ 
-+ 	return 0;
-++}
-+ 
-++static int b53_set_mrouter(struct dsa_switch *ds, int port, bool mrouter,
-++			   struct netlink_ext_ack *extack)
-++{
-++	b53_port_set_mcast_flood(ds->priv, port, mrouter);
-++
-++	return 0;
-+ }
-+-EXPORT_SYMBOL(b53_br_egress_floods);
-+ 
-+ static bool b53_possible_cpu_port(struct dsa_switch *ds, int port)
-+ {
-+@@ -2037,9 +2072,11 @@ static const struct dsa_switch_ops b53_s
-+ 	.set_mac_eee		= b53_set_mac_eee,
-+ 	.port_bridge_join	= b53_br_join,
-+ 	.port_bridge_leave	= b53_br_leave,
-++	.port_pre_bridge_flags	= b53_br_flags_pre,
-++	.port_bridge_flags	= b53_br_flags,
-++	.port_set_mrouter	= b53_set_mrouter,
-+ 	.port_stp_state_set	= b53_br_set_stp_state,
-+ 	.port_fast_age		= b53_br_fast_age,
-+-	.port_egress_floods	= b53_br_egress_floods,
-+ 	.port_vlan_filtering	= b53_vlan_filtering,
-+ 	.port_vlan_prepare	= b53_vlan_prepare,
-+ 	.port_vlan_add		= b53_vlan_add,
-+Index: linux-5.4.111/drivers/net/dsa/b53/b53_priv.h
-+===================================================================
-+--- linux-5.4.111.orig/drivers/net/dsa/b53/b53_priv.h
-++++ linux-5.4.111/drivers/net/dsa/b53/b53_priv.h
-+@@ -319,8 +319,6 @@ int b53_br_join(struct dsa_switch *ds, i
-+ void b53_br_leave(struct dsa_switch *ds, int port, struct net_device *bridge);
-+ void b53_br_set_stp_state(struct dsa_switch *ds, int port, u8 state);
-+ void b53_br_fast_age(struct dsa_switch *ds, int port);
-+-int b53_br_egress_floods(struct dsa_switch *ds, int port,
-+-			 bool unicast, bool multicast);
-+ void b53_port_event(struct dsa_switch *ds, int port);
-+ void b53_phylink_validate(struct dsa_switch *ds, int port,
-+ 			  unsigned long *supported,
-+Index: linux-5.4.111/drivers/net/dsa/mv88e6xxx/chip.c
-+===================================================================
-+--- linux-5.4.111.orig/drivers/net/dsa/mv88e6xxx/chip.c
-++++ linux-5.4.111/drivers/net/dsa/mv88e6xxx/chip.c
-+@@ -2274,12 +2274,20 @@ static int mv88e6xxx_setup_egress_floods
-+ {
-+ 	struct dsa_switch *ds = chip->ds;
-+ 	bool flood;
-++	int err;
-+ 
-+ 	/* Upstream ports flood frames with unknown unicast or multicast DA */
-+ 	flood = dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port);
-+-	if (chip->info->ops->port_set_egress_floods)
-+-		return chip->info->ops->port_set_egress_floods(chip, port,
-+-							       flood, flood);
-++	if (chip->info->ops->port_set_ucast_flood) {
-++		err = chip->info->ops->port_set_ucast_flood(chip, port, flood);
-++		if (err)
-++			return err;
-++	}
-++	if (chip->info->ops->port_set_mcast_flood) {
-++		err = chip->info->ops->port_set_mcast_flood(chip, port, flood);
-++		if (err)
-++			return err;
-++	}
-+ 
-+ 	return 0;
-+ }
-+@@ -3019,7 +3027,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_set_speed = mv88e6185_port_set_speed,
-+ 	.port_tag_remap = mv88e6095_port_tag_remap,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
-+ 	.port_pause_limit = mv88e6097_port_pause_limit,
-+@@ -3058,7 +3067,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_set_duplex = mv88e6xxx_port_set_duplex,
-+ 	.port_set_speed = mv88e6185_port_set_speed,
-+ 	.port_set_frame_mode = mv88e6085_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6185_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6185_port_set_forward_unknown,
-++	.port_set_mcast_flood = mv88e6185_port_set_default_forward,
-+ 	.port_set_upstream_port = mv88e6095_port_set_upstream_port,
-+ 	.port_link_state = mv88e6185_port_link_state,
-+ 	.port_get_cmode = mv88e6185_port_get_cmode,
-+@@ -3090,7 +3100,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_set_speed = mv88e6185_port_set_speed,
-+ 	.port_tag_remap = mv88e6095_port_tag_remap,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_egress_rate_limiting = mv88e6095_port_egress_rate_limiting,
-+ 	.port_pause_limit = mv88e6097_port_pause_limit,
-+@@ -3128,7 +3139,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_set_duplex = mv88e6xxx_port_set_duplex,
-+ 	.port_set_speed = mv88e6185_port_set_speed,
-+ 	.port_set_frame_mode = mv88e6085_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
-+ 	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
-+ 	.port_link_state = mv88e6352_port_link_state,
-+@@ -3162,7 +3174,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_set_speed = mv88e6185_port_set_speed,
-+ 	.port_tag_remap = mv88e6095_port_tag_remap,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6185_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6185_port_set_forward_unknown,
-++	.port_set_mcast_flood = mv88e6185_port_set_default_forward,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_set_upstream_port = mv88e6095_port_set_upstream_port,
-+ 	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
-+@@ -3207,7 +3220,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_max_speed_mode = mv88e6341_port_max_speed_mode,
-+ 	.port_tag_remap = mv88e6095_port_tag_remap,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
-+ 	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
-+@@ -3253,7 +3267,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_set_speed = mv88e6185_port_set_speed,
-+ 	.port_tag_remap = mv88e6095_port_tag_remap,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
-+ 	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
-+@@ -3329,7 +3344,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_set_speed = mv88e6185_port_set_speed,
-+ 	.port_tag_remap = mv88e6095_port_tag_remap,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
-+ 	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
-+@@ -3372,7 +3388,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_tag_remap = mv88e6095_port_tag_remap,
-+ 	.port_set_policy = mv88e6352_port_set_policy,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
-+ 	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
-+@@ -3416,7 +3433,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_set_speed = mv88e6185_port_set_speed,
-+ 	.port_tag_remap = mv88e6095_port_tag_remap,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
-+ 	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
-+@@ -3459,7 +3477,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_tag_remap = mv88e6095_port_tag_remap,
-+ 	.port_set_policy = mv88e6352_port_set_policy,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
-+ 	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
-+@@ -3503,7 +3522,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_set_duplex = mv88e6xxx_port_set_duplex,
-+ 	.port_set_speed = mv88e6185_port_set_speed,
-+ 	.port_set_frame_mode = mv88e6085_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6185_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6185_port_set_forward_unknown,
-++	.port_set_mcast_flood = mv88e6185_port_set_default_forward,
-+ 	.port_egress_rate_limiting = mv88e6095_port_egress_rate_limiting,
-+ 	.port_set_upstream_port = mv88e6095_port_set_upstream_port,
-+ 	.port_set_pause = mv88e6185_port_set_pause,
-+@@ -3545,7 +3565,6 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_tag_remap = mv88e6390_port_tag_remap,
-+ 	.port_set_policy = mv88e6352_port_set_policy,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_pause_limit = mv88e6390_port_pause_limit,
-+ 	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
-+@@ -3594,7 +3613,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_tag_remap = mv88e6390_port_tag_remap,
-+ 	.port_set_policy = mv88e6352_port_set_policy,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_pause_limit = mv88e6390_port_pause_limit,
-+ 	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
-+@@ -3642,7 +3662,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_max_speed_mode = mv88e6390_port_max_speed_mode,
-+ 	.port_tag_remap = mv88e6390_port_tag_remap,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_pause_limit = mv88e6390_port_pause_limit,
-+ 	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
-+@@ -3692,7 +3713,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_tag_remap = mv88e6095_port_tag_remap,
-+ 	.port_set_policy = mv88e6352_port_set_policy,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
-+ 	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
-+@@ -3743,7 +3765,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_set_speed = mv88e6250_port_set_speed,
-+ 	.port_tag_remap = mv88e6095_port_tag_remap,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
-+ 	.port_pause_limit = mv88e6097_port_pause_limit,
-+@@ -3784,7 +3807,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_tag_remap = mv88e6390_port_tag_remap,
-+ 	.port_set_policy = mv88e6352_port_set_policy,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_pause_limit = mv88e6390_port_pause_limit,
-+ 	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
-+@@ -3833,7 +3857,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_set_speed = mv88e6185_port_set_speed,
-+ 	.port_tag_remap = mv88e6095_port_tag_remap,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
-+ 	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
-+@@ -3877,7 +3902,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_set_speed = mv88e6185_port_set_speed,
-+ 	.port_tag_remap = mv88e6095_port_tag_remap,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
-+ 	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
-+@@ -3921,7 +3947,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_max_speed_mode = mv88e6341_port_max_speed_mode,
-+ 	.port_tag_remap = mv88e6095_port_tag_remap,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
-+ 	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
-+@@ -3970,7 +3997,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_set_speed = mv88e6185_port_set_speed,
-+ 	.port_tag_remap = mv88e6095_port_tag_remap,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
-+ 	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
-+@@ -4055,7 +4083,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_tag_remap = mv88e6095_port_tag_remap,
-+ 	.port_set_policy = mv88e6352_port_set_policy,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
-+ 	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
-+@@ -4110,7 +4139,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_tag_remap = mv88e6390_port_tag_remap,
-+ 	.port_set_policy = mv88e6352_port_set_policy,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
-+ 	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
-+@@ -4163,7 +4193,8 @@ static const struct mv88e6xxx_ops mv88e6
-+ 	.port_tag_remap = mv88e6390_port_tag_remap,
-+ 	.port_set_policy = mv88e6352_port_set_policy,
-+ 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,
-+-	.port_set_egress_floods = mv88e6352_port_set_egress_floods,
-++	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
-++	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
-+ 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-+ 	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
-+ 	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
-+@@ -5016,17 +5047,72 @@ static void mv88e6xxx_port_mirror_del(st
-+ 	mutex_unlock(&chip->reg_lock);
-+ }
-+ 
-+-static int mv88e6xxx_port_egress_floods(struct dsa_switch *ds, int port,
-+-					 bool unicast, bool multicast)
-++static int mv88e6xxx_port_pre_bridge_flags(struct dsa_switch *ds, int port,
-++					   unsigned long flags,
-++					   struct netlink_ext_ack *extack)
-++{
-++	struct mv88e6xxx_chip *chip = ds->priv;
-++	const struct mv88e6xxx_ops *ops;
-++
-++	if (flags & ~(BR_FLOOD | BR_MCAST_FLOOD))
-++		return -EINVAL;
-++
-++	ops = chip->info->ops;
-++
-++	if ((flags & BR_FLOOD) && !ops->port_set_ucast_flood)
-++		return -EINVAL;
-++
-++	if ((flags & BR_MCAST_FLOOD) && !ops->port_set_mcast_flood)
-++		return -EINVAL;
-++
-++	return 0;
-++}
-++
-++static int mv88e6xxx_port_bridge_flags(struct dsa_switch *ds, int port,
-++				       unsigned long flags,
-++				       struct netlink_ext_ack *extack)
-+ {
-+ 	struct mv88e6xxx_chip *chip = ds->priv;
-+ 	int err = -EOPNOTSUPP;
-+ 
-+ 	mv88e6xxx_reg_lock(chip);
-+-	if (chip->info->ops->port_set_egress_floods)
-+-		err = chip->info->ops->port_set_egress_floods(chip, port,
-+-							      unicast,
-+-							      multicast);
-++
-++	if (flags & BR_FLOOD) {
-++		bool unicast = !!(flags.val & BR_FLOOD);
-++
-++		err = chip->info->ops->port_set_ucast_flood(chip, port,
-++							    unicast);
-++		if (err)
-++			goto out;
-++	}
-++
-++	if (flags & BR_MCAST_FLOOD) {
-++		bool multicast = !!(flags.val & BR_MCAST_FLOOD);
-++
-++		err = chip->info->ops->port_set_mcast_flood(chip, port,
-++							    multicast);
-++		if (err)
-++			goto out;
-++	}
-++
-++out:
-++	mv88e6xxx_reg_unlock(chip);
-++
-++	return err;
-++}
-++
-++static int mv88e6xxx_port_set_mrouter(struct dsa_switch *ds, int port,
-++				      bool mrouter,
-++				      struct netlink_ext_ack *extack)
-++{
-++	struct mv88e6xxx_chip *chip = ds->priv;
-++	int err;
-++
-++	if (!chip->info->ops->port_set_mcast_flood)
-++		return -EOPNOTSUPP;
-++
-++	mv88e6xxx_reg_lock(chip);
-++	err = chip->info->ops->port_set_mcast_flood(chip, port, mrouter);
-+ 	mv88e6xxx_reg_unlock(chip);
-+ 
-+ 	return err;
-+@@ -5322,7 +5408,9 @@ static const struct dsa_switch_ops mv88e
-+ 	.set_ageing_time	= mv88e6xxx_set_ageing_time,
-+ 	.port_bridge_join	= mv88e6xxx_port_bridge_join,
-+ 	.port_bridge_leave	= mv88e6xxx_port_bridge_leave,
-+-	.port_egress_floods	= mv88e6xxx_port_egress_floods,
-++	.port_pre_bridge_flags	= mv88e6xxx_port_pre_bridge_flags,
-++	.port_bridge_flags	= mv88e6xxx_port_bridge_flags,
-++	.port_set_mrouter	= mv88e6xxx_port_set_mrouter,
-+ 	.port_stp_state_set	= mv88e6xxx_port_stp_state_set,
-+ 	.port_fast_age		= mv88e6xxx_port_fast_age,
-+ 	.port_vlan_filtering	= mv88e6xxx_port_vlan_filtering,
-+Index: linux-5.4.111/drivers/net/dsa/mv88e6xxx/chip.h
-+===================================================================
-+--- linux-5.4.111.orig/drivers/net/dsa/mv88e6xxx/chip.h
-++++ linux-5.4.111/drivers/net/dsa/mv88e6xxx/chip.h
-+@@ -429,8 +429,10 @@ struct mv88e6xxx_ops {
-+ 
-+ 	int (*port_set_frame_mode)(struct mv88e6xxx_chip *chip, int port,
-+ 				   enum mv88e6xxx_frame_mode mode);
-+-	int (*port_set_egress_floods)(struct mv88e6xxx_chip *chip, int port,
-+-				      bool unicast, bool multicast);
-++	int (*port_set_ucast_flood)(struct mv88e6xxx_chip *chip, int port,
-++				    bool unicast);
-++	int (*port_set_mcast_flood)(struct mv88e6xxx_chip *chip, int port,
-++				    bool multicast);
-+ 	int (*port_set_ether_type)(struct mv88e6xxx_chip *chip, int port,
-+ 				   u16 etype);
-+ 	int (*port_set_jumbo_size)(struct mv88e6xxx_chip *chip, int port,
-+Index: linux-5.4.111/drivers/net/dsa/mv88e6xxx/port.c
-+===================================================================
-+--- linux-5.4.111.orig/drivers/net/dsa/mv88e6xxx/port.c
-++++ linux-5.4.111/drivers/net/dsa/mv88e6xxx/port.c
-+@@ -932,8 +932,8 @@ int mv88e6351_port_set_frame_mode(struct
-+ 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);
-+ }
-+ 
-+-static int mv88e6185_port_set_forward_unknown(struct mv88e6xxx_chip *chip,
-+-					      int port, bool unicast)
-++int mv88e6185_port_set_forward_unknown(struct mv88e6xxx_chip *chip,
-++				       int port, bool unicast)
-+ {
-+ 	int err;
-+ 	u16 reg;
-+@@ -950,8 +950,8 @@ static int mv88e6185_port_set_forward_un
-+ 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);
-+ }
-+ 
-+-int mv88e6352_port_set_egress_floods(struct mv88e6xxx_chip *chip, int port,
-+-				     bool unicast, bool multicast)
-++int mv88e6352_port_set_ucast_flood(struct mv88e6xxx_chip *chip, int port,
-++				   bool unicast)
-+ {
-+ 	int err;
-+ 	u16 reg;
-+@@ -960,16 +960,28 @@ int mv88e6352_port_set_egress_floods(str
-+ 	if (err)
-+ 		return err;
-+ 
-+-	reg &= ~MV88E6352_PORT_CTL0_EGRESS_FLOODS_MASK;
-++	if (unicast)
-++		reg |= MV88E6352_PORT_CTL0_EGRESS_FLOODS_UC;
-++	else
-++		reg &= ~MV88E6352_PORT_CTL0_EGRESS_FLOODS_UC;
-++
-++	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);
-++}
-++
-++int mv88e6352_port_set_mcast_flood(struct mv88e6xxx_chip *chip, int port,
-++				   bool multicast)
-++{
-++	int err;
-++	u16 reg;
-++
-++	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL0, &reg);
-++	if (err)
-++		return err;
-+ 
-+-	if (unicast && multicast)
-+-		reg |= MV88E6352_PORT_CTL0_EGRESS_FLOODS_ALL_UNKNOWN_DA;
-+-	else if (unicast)
-+-		reg |= MV88E6352_PORT_CTL0_EGRESS_FLOODS_NO_UNKNOWN_MC_DA;
-+-	else if (multicast)
-+-		reg |= MV88E6352_PORT_CTL0_EGRESS_FLOODS_NO_UNKNOWN_UC_DA;
-++	if (multicast)
-++		reg |= MV88E6352_PORT_CTL0_EGRESS_FLOODS_MC;
-+ 	else
-+-		reg |= MV88E6352_PORT_CTL0_EGRESS_FLOODS_NO_UNKNOWN_DA;
-++		reg &= ~MV88E6352_PORT_CTL0_EGRESS_FLOODS_MC;
-+ 
-+ 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);
-+ }
-+@@ -1156,8 +1168,8 @@ static const char * const mv88e6xxx_port
-+ 	[MV88E6XXX_PORT_CTL2_8021Q_MODE_SECURE] = "Secure",
-+ };
-+ 
-+-static int mv88e6185_port_set_default_forward(struct mv88e6xxx_chip *chip,
-+-					      int port, bool multicast)
-++int mv88e6185_port_set_default_forward(struct mv88e6xxx_chip *chip,
-++				       int port, bool multicast)
-+ {
-+ 	int err;
-+ 	u16 reg;
-+@@ -1174,18 +1186,6 @@ static int mv88e6185_port_set_default_fo
-+ 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);
-+ }
-+ 
-+-int mv88e6185_port_set_egress_floods(struct mv88e6xxx_chip *chip, int port,
-+-				     bool unicast, bool multicast)
-+-{
-+-	int err;
-+-
-+-	err = mv88e6185_port_set_forward_unknown(chip, port, unicast);
-+-	if (err)
-+-		return err;
-+-
-+-	return mv88e6185_port_set_default_forward(chip, port, multicast);
-+-}
-+-
-+ int mv88e6095_port_set_upstream_port(struct mv88e6xxx_chip *chip, int port,
-+ 				     int upstream_port)
-+ {
-+Index: linux-5.4.111/drivers/net/dsa/mv88e6xxx/port.h
-+===================================================================
-+--- linux-5.4.111.orig/drivers/net/dsa/mv88e6xxx/port.h
-++++ linux-5.4.111/drivers/net/dsa/mv88e6xxx/port.h
-+@@ -154,11 +154,8 @@
-+ #define MV88E6185_PORT_CTL0_USE_IP				0x0020
-+ #define MV88E6185_PORT_CTL0_USE_TAG				0x0010
-+ #define MV88E6185_PORT_CTL0_FORWARD_UNKNOWN			0x0004
-+-#define MV88E6352_PORT_CTL0_EGRESS_FLOODS_MASK			0x000c
-+-#define MV88E6352_PORT_CTL0_EGRESS_FLOODS_NO_UNKNOWN_DA		0x0000
-+-#define MV88E6352_PORT_CTL0_EGRESS_FLOODS_NO_UNKNOWN_MC_DA	0x0004
-+-#define MV88E6352_PORT_CTL0_EGRESS_FLOODS_NO_UNKNOWN_UC_DA	0x0008
-+-#define MV88E6352_PORT_CTL0_EGRESS_FLOODS_ALL_UNKNOWN_DA	0x000c
-++#define MV88E6352_PORT_CTL0_EGRESS_FLOODS_UC			0x0004
-++#define MV88E6352_PORT_CTL0_EGRESS_FLOODS_MC			0x0008
-+ #define MV88E6XXX_PORT_CTL0_STATE_MASK				0x0003
-+ #define MV88E6XXX_PORT_CTL0_STATE_DISABLED			0x0000
-+ #define MV88E6XXX_PORT_CTL0_STATE_BLOCKING			0x0001
-+@@ -335,10 +332,14 @@ int mv88e6085_port_set_frame_mode(struct
-+ 				  enum mv88e6xxx_frame_mode mode);
-+ int mv88e6351_port_set_frame_mode(struct mv88e6xxx_chip *chip, int port,
-+ 				  enum mv88e6xxx_frame_mode mode);
-+-int mv88e6185_port_set_egress_floods(struct mv88e6xxx_chip *chip, int port,
-+-				     bool unicast, bool multicast);
-+-int mv88e6352_port_set_egress_floods(struct mv88e6xxx_chip *chip, int port,
-+-				     bool unicast, bool multicast);
-++int mv88e6185_port_set_forward_unknown(struct mv88e6xxx_chip *chip,
-++				       int port, bool unicast);
-++int mv88e6185_port_set_default_forward(struct mv88e6xxx_chip *chip,
-++				       int port, bool multicast);
-++int mv88e6352_port_set_ucast_flood(struct mv88e6xxx_chip *chip, int port,
-++				   bool unicast);
-++int mv88e6352_port_set_mcast_flood(struct mv88e6xxx_chip *chip, int port,
-++				   bool multicast);
-+ int mv88e6352_port_set_policy(struct mv88e6xxx_chip *chip, int port,
-+ 			      enum mv88e6xxx_policy_mapping mapping,
-+ 			      enum mv88e6xxx_policy_action action);
-+Index: linux-5.4.111/include/net/dsa.h
-+===================================================================
-+--- linux-5.4.111.orig/include/net/dsa.h
-++++ linux-5.4.111/include/net/dsa.h
-+@@ -547,8 +547,14 @@ struct dsa_switch_ops {
-+ 	void	(*port_stp_state_set)(struct dsa_switch *ds, int port,
-+ 				      u8 state);
-+ 	void	(*port_fast_age)(struct dsa_switch *ds, int port);
-+-	int	(*port_egress_floods)(struct dsa_switch *ds, int port,
-+-				      bool unicast, bool multicast);
-++	int	(*port_pre_bridge_flags)(struct dsa_switch *ds, int port,
-++					 unsigned long flags,
-++					 struct netlink_ext_ack *extack);
-++	int	(*port_bridge_flags)(struct dsa_switch *ds, int port,
-++				     unsigned long flags,
-++				     struct netlink_ext_ack *extack);
-++	int	(*port_set_mrouter)(struct dsa_switch *ds, int port, bool mrouter,
-++				    struct netlink_ext_ack *extack);
-+ 
-+ 	/*
-+ 	 * VLAN support
-+Index: linux-5.4.111/net/dsa/dsa_priv.h
-+===================================================================
-+--- linux-5.4.111.orig/net/dsa/dsa_priv.h
-++++ linux-5.4.111/net/dsa/dsa_priv.h
-+@@ -171,11 +171,11 @@ int dsa_port_mdb_add(const struct dsa_po
-+ int dsa_port_mdb_del(const struct dsa_port *dp,
-+ 		     const struct switchdev_obj_port_mdb *mdb);
-+ int dsa_port_pre_bridge_flags(const struct dsa_port *dp, unsigned long flags,
-+-			      struct switchdev_trans *trans);
-++			      struct switchdev_trans *trans, struct netlink_ext_ack *extack);
-+ int dsa_port_bridge_flags(const struct dsa_port *dp, unsigned long flags,
-+-			  struct switchdev_trans *trans);
-++			  struct switchdev_trans *trans, struct netlink_ext_ack *extack);
-+ int dsa_port_mrouter(struct dsa_port *dp, bool mrouter,
-+-		     struct switchdev_trans *trans);
-++		     struct switchdev_trans *trans, struct netlink_ext_ack *extack);
-+ int dsa_port_vlan_add(struct dsa_port *dp,
-+ 		      const struct switchdev_obj_port_vlan *vlan,
-+ 		      struct switchdev_trans *trans);
-+Index: linux-5.4.111/net/dsa/port.c
-+===================================================================
-+--- linux-5.4.111.orig/net/dsa/port.c
-++++ linux-5.4.111/net/dsa/port.c
-+@@ -127,7 +127,7 @@ int dsa_port_bridge_join(struct dsa_port
-+ 	int err;
-+ 
-+ 	/* Set the flooding mode before joining the port in the switch */
-+-	err = dsa_port_bridge_flags(dp, BR_FLOOD | BR_MCAST_FLOOD, NULL);
-++	err = dsa_port_bridge_flags(dp, BR_FLOOD | BR_MCAST_FLOOD, NULL, NULL);
-+ 	if (err)
-+ 		return err;
-+ 
-+@@ -140,7 +140,7 @@ int dsa_port_bridge_join(struct dsa_port
-+ 
-+ 	/* The bridging is rolled back on error */
-+ 	if (err) {
-+-		dsa_port_bridge_flags(dp, 0, NULL);
-++		dsa_port_bridge_flags(dp, 0, NULL, NULL);
-+ 		dp->bridge_dev = NULL;
-+ 	}
-+ 
-+@@ -166,7 +166,7 @@ void dsa_port_bridge_leave(struct dsa_po
-+ 		pr_err("DSA: failed to notify DSA_NOTIFIER_BRIDGE_LEAVE\n");
-+ 
-+ 	/* Port is leaving the bridge, disable flooding */
-+-	dsa_port_bridge_flags(dp, 0, NULL);
-++	dsa_port_bridge_flags(dp, 0, NULL, NULL);
-+ 
-+ 	/* Port left the bridge, put in BR_STATE_DISABLED by the bridge layer,
-+ 	 * so allow it to be in BR_STATE_FORWARDING to be kept functional
-+@@ -350,44 +350,44 @@ int dsa_port_ageing_time(struct dsa_port
-+ }
-+ 
-+ int dsa_port_pre_bridge_flags(const struct dsa_port *dp, unsigned long flags,
-+-			      struct switchdev_trans *trans)
-++			      struct switchdev_trans *trans, struct netlink_ext_ack *extack)
-+ {
-+ 	struct dsa_switch *ds = dp->ds;
-+ 
-+-	if (!ds->ops->port_egress_floods ||
-+-	    (flags & ~(BR_FLOOD | BR_MCAST_FLOOD)))
-++	if (!ds->ops->port_pre_bridge_flags)
-+ 		return -EINVAL;
-+ 
-+-	return 0;
-++	return ds->ops->port_pre_bridge_flags(ds, dp->index, flags, extack);
-+ }
-+ 
-+ int dsa_port_bridge_flags(const struct dsa_port *dp, unsigned long flags,
-+-			  struct switchdev_trans *trans)
-++			  struct switchdev_trans *trans, struct netlink_ext_ack *extack)
-+ {
-+ 	struct dsa_switch *ds = dp->ds;
-+-	int port = dp->index;
-+-	int err = 0;
-+ 
-+ 	if (switchdev_trans_ph_prepare(trans))
-+ 		return 0;
-+ 
-+-	if (ds->ops->port_egress_floods)
-+-		err = ds->ops->port_egress_floods(ds, port, flags & BR_FLOOD,
-+-						  flags & BR_MCAST_FLOOD);
-++	if (!ds->ops->port_bridge_flags)
-++		return -EINVAL;
-++ 
-++	return ds->ops->port_bridge_flags(ds, dp->index, flags, extack);
-+ 
-+-	return err;
-+ }
-+ 
-+ int dsa_port_mrouter(struct dsa_port *dp, bool mrouter,
-+-		     struct switchdev_trans *trans)
-++		     struct switchdev_trans *trans,
-++		     struct netlink_ext_ack *extack)
-+ {
-+ 	struct dsa_switch *ds = dp->ds;
-+-	int port = dp->index;
-+ 
-+ 	if (switchdev_trans_ph_prepare(trans))
-+-		return ds->ops->port_egress_floods ? 0 : -EOPNOTSUPP;
-++		return ds->ops->port_set_mrouter ? 0 : -EOPNOTSUPP;
-++
-++	if (!ds->ops->port_set_mrouter)
-++ 		return -EOPNOTSUPP;
-+ 
-+-	return ds->ops->port_egress_floods(ds, port, true, mrouter);
-++	return ds->ops->port_set_mrouter(ds, dp->index, mrouter, extack);
-+ }
-+ 
-+ int dsa_port_fdb_add(struct dsa_port *dp, const unsigned char *addr,
-+Index: linux-5.4.111/net/dsa/slave.c
-+===================================================================
-+--- linux-5.4.111.orig/net/dsa/slave.c
-++++ linux-5.4.111/net/dsa/slave.c
-+@@ -293,13 +293,13 @@ static int dsa_slave_port_attr_set(struc
-+ 		break;
-+ 	case SWITCHDEV_ATTR_ID_PORT_PRE_BRIDGE_FLAGS:
-+ 		ret = dsa_port_pre_bridge_flags(dp, attr->u.brport_flags,
-+-						trans);
-++						trans, NULL);
-+ 		break;
-+ 	case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
-+-		ret = dsa_port_bridge_flags(dp, attr->u.brport_flags, trans);
-++		ret = dsa_port_bridge_flags(dp, attr->u.brport_flags, trans, NULL);
-+ 		break;
-+ 	case SWITCHDEV_ATTR_ID_BRIDGE_MROUTER:
-+-		ret = dsa_port_mrouter(dp->cpu_dp, attr->u.mrouter, trans);
-++		ret = dsa_port_mrouter(dp->cpu_dp, attr->u.mrouter, trans, NULL);
-+ 		break;
-+ 	default:
-+ 		ret = -EOPNOTSUPP;
-diff --git a/target/linux/realtek/patches-5.4/500-gpio-Add-Realtek-Otto-GPIO-support.patch b/target/linux/realtek/patches-5.4/500-gpio-Add-Realtek-Otto-GPIO-support.patch
-new file mode 100644
-index 0000000000..8b43f07e8a
---- /dev/null
-+++ b/target/linux/realtek/patches-5.4/500-gpio-Add-Realtek-Otto-GPIO-support.patch
-@@ -0,0 +1,405 @@
-+From patchwork Tue Mar 30 17:48:43 2021
-+Content-Type: text/plain; charset="utf-8"
-+MIME-Version: 1.0
-+Content-Transfer-Encoding: 7bit
-+Subject: [v6,2/2] gpio: Add Realtek Otto GPIO support
-+X-Patchwork-Submitter: Sander Vanheule <sander@svanheule.net>
-+X-Patchwork-Id: 411993
-+Message-Id: <2d00064530e88fbef4fff2e759a66bdda261cca7.1617126277.git.sander@svanheule.net>
-+To: devicetree@vger.kernel.org, linux-gpio@vger.kernel.org
-+Cc: andy.shevchenko@gmail.com, bert@biot.com,
-+ bgolaszewski@baylibre.com, linus.walleij@linaro.org,
-+ linux-kernel@vger.kernel.org, maz@kernel.org, robh+dt@kernel.org,
-+ Sander Vanheule <sander@svanheule.net>
-+Date: Tue, 30 Mar 2021 19:48:43 +0200
-+From: Sander Vanheule <sander@svanheule.net>
-+List-Id: <linux-gpio.vger.kernel.org>
-+
-+Realtek MIPS SoCs (platform name Otto) have GPIO controllers with up to
-+64 GPIOs, divided over two banks. Each bank has a set of registers for
-+32 GPIOs, with support for edge-triggered interrupts.
-+
-+Each GPIO bank consists of four 8-bit GPIO ports (ABCD and EFGH). Most
-+registers pack one bit per GPIO, except for the IMR register, which
-+packs two bits per GPIO (AB-CD).
-+
-+Although the byte order is currently assumed to have port A..D at offset
-+0x0..0x3, this has been observed to be reversed on other, Lexra-based,
-+SoCs (e.g. RTL8196E/97D/97F).
-+
-+Interrupt support is disabled for the fallback devicetree-compatible
-+'realtek,otto-gpio'. This allows for quick support of GPIO banks in
-+which the byte order would be unknown. In this case, the port ordering
-+in the IMR registers may not match the reversed order in the other
-+registers (DCBA, and BA-DC or DC-BA).
-+
-+Signed-off-by: Sander Vanheule <sander@svanheule.net>
-+Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
-+Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
-+---
-+ drivers/gpio/Kconfig             |  13 ++
-+ drivers/gpio/Makefile            |   1 +
-+ drivers/gpio/gpio-realtek-otto.c | 325 +++++++++++++++++++++++++++++++
-+ 3 files changed, 339 insertions(+)
-+ create mode 100644 drivers/gpio/gpio-realtek-otto.c
-+
-+--- a/drivers/gpio/Kconfig
-++++ b/drivers/gpio/Kconfig
-+@@ -435,6 +435,19 @@ config GPIO_RCAR
-+ 	help
-+ 	  Say yes here to support GPIO on Renesas R-Car SoCs.
-+ 
-++config GPIO_REALTEK_OTTO
-++	tristate "Realtek Otto GPIO support"
-++	depends on RTL838X
-++	default RTL838X
-++	select GPIO_GENERIC
-++	select GPIOLIB_IRQCHIP
-++	help
-++	  The GPIO controller on the Otto MIPS platform supports up to two
-++	  banks of 32 GPIOs, with edge triggered interrupts. The 32 GPIOs
-++	  are grouped in four 8-bit wide ports.
-++
-++	  When built as a module, the module will be called realtek_otto_gpio.
-++
-+ config GPIO_REG
-+ 	bool
-+ 	help
-+--- a/drivers/gpio/Makefile
-++++ b/drivers/gpio/Makefile
-+@@ -116,6 +116,7 @@ obj-$(CONFIG_GPIO_RASPBERRYPI_EXP)	+= gp
-+ obj-$(CONFIG_GPIO_RC5T583)		+= gpio-rc5t583.o
-+ obj-$(CONFIG_GPIO_RCAR)			+= gpio-rcar.o
-+ obj-$(CONFIG_GPIO_RDC321X)		+= gpio-rdc321x.o
-++obj-$(CONFIG_GPIO_REALTEK_OTTO)		+= gpio-realtek-otto.o
-+ obj-$(CONFIG_GPIO_REG)			+= gpio-reg.o
-+ obj-$(CONFIG_GPIO_RTL8231)		+= gpio-rtl8231.o
-+ #obj-$(CONFIG_GPIO_RTL838X)		+= gpio-rtl838x.o
-+--- /dev/null
-++++ b/drivers/gpio/gpio-realtek-otto.c
-+@@ -0,0 +1,325 @@
-++// SPDX-License-Identifier: GPL-2.0-only
-++
-++#include <linux/gpio/driver.h>
-++#include <linux/irq.h>
-++//#include <linux/minmax.h>
-++#include <linux/mod_devicetable.h>
-++#include <linux/module.h>
-++#include <linux/platform_device.h>
-++#include <linux/property.h>
-++
-++/*
-++ * Total register block size is 0x1C for one bank of four ports (A, B, C, D).
-++ * An optional second bank, with ports E, F, G, and H, may be present, starting
-++ * at register offset 0x1C.
-++ */
-++
-++/*
-++ * Pin select: (0) "normal", (1) "dedicate peripheral"
-++ * Not used on RTL8380/RTL8390, peripheral selection is managed by control bits
-++ * in the peripheral registers.
-++ */
-++#define REALTEK_GPIO_REG_CNR		0x00
-++/* Clear bit (0) for input, set bit (1) for output */
-++#define REALTEK_GPIO_REG_DIR		0x08
-++#define REALTEK_GPIO_REG_DATA		0x0C
-++/* Read bit for IRQ status, write 1 to clear IRQ */
-++#define REALTEK_GPIO_REG_ISR		0x10
-++/* Two bits per GPIO in IMR registers */
-++#define REALTEK_GPIO_REG_IMR		0x14
-++#define REALTEK_GPIO_REG_IMR_AB		0x14
-++#define REALTEK_GPIO_REG_IMR_CD		0x18
-++#define REALTEK_GPIO_IMR_LINE_MASK	GENMASK(1, 0)
-++#define REALTEK_GPIO_IRQ_EDGE_FALLING	1
-++#define REALTEK_GPIO_IRQ_EDGE_RISING	2
-++#define REALTEK_GPIO_IRQ_EDGE_BOTH	3
-++
-++#define REALTEK_GPIO_MAX		32
-++#define REALTEK_GPIO_PORTS_PER_BANK	4
-++
-++/**
-++ * realtek_gpio_ctrl - Realtek Otto GPIO driver data
-++ *
-++ * @gc: Associated gpio_chip instance
-++ * @base: Base address of the register block for a GPIO bank
-++ * @lock: Lock for accessing the IRQ registers and values
-++ * @intr_mask: Mask for interrupts lines
-++ * @intr_type: Interrupt type selection
-++ *
-++ * Because the interrupt mask register (IMR) combines the function of IRQ type
-++ * selection and masking, two extra values are stored. @intr_mask is used to
-++ * mask/unmask the interrupts for a GPIO port, and @intr_type is used to store
-++ * the selected interrupt types. The logical AND of these values is written to
-++ * IMR on changes.
-++ */
-++struct realtek_gpio_ctrl {
-++	struct gpio_chip gc;
-++	void __iomem *base;
-++	raw_spinlock_t lock;
-++	u16 intr_mask[REALTEK_GPIO_PORTS_PER_BANK];
-++	u16 intr_type[REALTEK_GPIO_PORTS_PER_BANK];
-++};
-++
-++/* Expand with more flags as devices with other quirks are added */
-++enum realtek_gpio_flags {
-++	/*
-++	 * Allow disabling interrupts, for cases where the port order is
-++	 * unknown. This may result in a port mismatch between ISR and IMR.
-++	 * An interrupt would appear to come from a different line than the
-++	 * line the IRQ handler was assigned to, causing uncaught interrupts.
-++	 */
-++	GPIO_INTERRUPTS_DISABLED = BIT(0),
-++};
-++
-++static struct realtek_gpio_ctrl *irq_data_to_ctrl(struct irq_data *data)
-++{
-++	struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
-++
-++	return container_of(gc, struct realtek_gpio_ctrl, gc);
-++}
-++
-++/*
-++ * Normal port order register access
-++ *
-++ * Port information is stored with the first port at offset 0, followed by the
-++ * second, etc. Most registers store one bit per GPIO and use a u8 value per
-++ * port. The two interrupt mask registers store two bits per GPIO, so use u16
-++ * values.
-++ */
-++static void realtek_gpio_write_imr(struct realtek_gpio_ctrl *ctrl,
-++	unsigned int port, u16 irq_type, u16 irq_mask)
-++{
-++	iowrite16(irq_type & irq_mask, ctrl->base + REALTEK_GPIO_REG_IMR + 2 * port);
-++}
-++
-++static void realtek_gpio_clear_isr(struct realtek_gpio_ctrl *ctrl,
-++	unsigned int port, u8 mask)
-++{
-++	iowrite8(mask, ctrl->base + REALTEK_GPIO_REG_ISR + port);
-++}
-++
-++static u8 realtek_gpio_read_isr(struct realtek_gpio_ctrl *ctrl, unsigned int port)
-++{
-++	return ioread8(ctrl->base + REALTEK_GPIO_REG_ISR + port);
-++}
-++
-++/* Set the rising and falling edge mask bits for a GPIO port pin */
-++static u16 realtek_gpio_imr_bits(unsigned int pin, u16 value)
-++{
-++	return (value & REALTEK_GPIO_IMR_LINE_MASK) << 2 * pin;
-++}
-++
-++static void realtek_gpio_irq_ack(struct irq_data *data)
-++{
-++	struct realtek_gpio_ctrl *ctrl = irq_data_to_ctrl(data);
-++	irq_hw_number_t line = irqd_to_hwirq(data);
-++	unsigned int port = line / 8;
-++	unsigned int port_pin = line % 8;
-++
-++	realtek_gpio_clear_isr(ctrl, port, BIT(port_pin));
-++}
-++
-++static void realtek_gpio_irq_unmask(struct irq_data *data)
-++{
-++	struct realtek_gpio_ctrl *ctrl = irq_data_to_ctrl(data);
-++	unsigned int line = irqd_to_hwirq(data);
-++	unsigned int port = line / 8;
-++	unsigned int port_pin = line % 8;
-++	unsigned long flags;
-++	u16 m;
-++
-++	raw_spin_lock_irqsave(&ctrl->lock, flags);
-++	m = ctrl->intr_mask[port];
-++	m |= realtek_gpio_imr_bits(port_pin, REALTEK_GPIO_IMR_LINE_MASK);
-++	ctrl->intr_mask[port] = m;
-++	realtek_gpio_write_imr(ctrl, port, ctrl->intr_type[port], m);
-++	raw_spin_unlock_irqrestore(&ctrl->lock, flags);
-++}
-++
-++static void realtek_gpio_irq_mask(struct irq_data *data)
-++{
-++	struct realtek_gpio_ctrl *ctrl = irq_data_to_ctrl(data);
-++	unsigned int line = irqd_to_hwirq(data);
-++	unsigned int port = line / 8;
-++	unsigned int port_pin = line % 8;
-++	unsigned long flags;
-++	u16 m;
-++
-++	raw_spin_lock_irqsave(&ctrl->lock, flags);
-++	m = ctrl->intr_mask[port];
-++	m &= ~realtek_gpio_imr_bits(port_pin, REALTEK_GPIO_IMR_LINE_MASK);
-++	ctrl->intr_mask[port] = m;
-++	realtek_gpio_write_imr(ctrl, port, ctrl->intr_type[port], m);
-++	raw_spin_unlock_irqrestore(&ctrl->lock, flags);
-++}
-++
-++static int realtek_gpio_irq_set_type(struct irq_data *data, unsigned int flow_type)
-++{
-++	struct realtek_gpio_ctrl *ctrl = irq_data_to_ctrl(data);
-++	unsigned int line = irqd_to_hwirq(data);
-++	unsigned int port = line / 8;
-++	unsigned int port_pin = line % 8;
-++	unsigned long flags;
-++	u16 type, t;
-++
-++	switch (flow_type & IRQ_TYPE_SENSE_MASK) {
-++	case IRQ_TYPE_EDGE_FALLING:
-++		type = REALTEK_GPIO_IRQ_EDGE_FALLING;
-++		break;
-++	case IRQ_TYPE_EDGE_RISING:
-++		type = REALTEK_GPIO_IRQ_EDGE_RISING;
-++		break;
-++	case IRQ_TYPE_EDGE_BOTH:
-++		type = REALTEK_GPIO_IRQ_EDGE_BOTH;
-++		break;
-++	default:
-++		return -EINVAL;
-++	}
-++
-++	irq_set_handler_locked(data, handle_edge_irq);
-++
-++	raw_spin_lock_irqsave(&ctrl->lock, flags);
-++	t = ctrl->intr_type[port];
-++	t &= ~realtek_gpio_imr_bits(port_pin, REALTEK_GPIO_IMR_LINE_MASK);
-++	t |= realtek_gpio_imr_bits(port_pin, type);
-++	ctrl->intr_type[port] = t;
-++	realtek_gpio_write_imr(ctrl, port, t, ctrl->intr_mask[port]);
-++	raw_spin_unlock_irqrestore(&ctrl->lock, flags);
-++
-++	return 0;
-++}
-++
-++static void realtek_gpio_irq_handler(struct irq_desc *desc)
-++{
-++	struct gpio_chip *gc = irq_desc_get_handler_data(desc);
-++	struct realtek_gpio_ctrl *ctrl = gpiochip_get_data(gc);
-++	struct irq_chip *irq_chip = irq_desc_get_chip(desc);
-++	unsigned int lines_done;
-++	unsigned int port_pin_count;
-++	unsigned int irq;
-++	unsigned long status;
-++	int offset;
-++
-++	chained_irq_enter(irq_chip, desc);
-++
-++	for (lines_done = 0; lines_done < gc->ngpio; lines_done += 8) {
-++		status = realtek_gpio_read_isr(ctrl, lines_done / 8);
-++		port_pin_count = min(gc->ngpio - lines_done, 8U);
-++		for_each_set_bit(offset, &status, port_pin_count) {
-++			irq = irq_find_mapping(gc->irq.domain, offset);
-++			generic_handle_irq(irq);
-++		}
-++	}
-++
-++	chained_irq_exit(irq_chip, desc);
-++}
-++
-++static int realtek_gpio_irq_init(struct gpio_chip *gc)
-++{
-++	struct realtek_gpio_ctrl *ctrl = gpiochip_get_data(gc);
-++	unsigned int port;
-++
-++	for (port = 0; (port * 8) < gc->ngpio; port++) {
-++		realtek_gpio_write_imr(ctrl, port, 0, 0);
-++		realtek_gpio_clear_isr(ctrl, port, GENMASK(7, 0));
-++	}
-++
-++	return 0;
-++}
-++
-++static struct irq_chip realtek_gpio_irq_chip = {
-++	.name = "realtek-otto-gpio",
-++	.irq_ack = realtek_gpio_irq_ack,
-++	.irq_mask = realtek_gpio_irq_mask,
-++	.irq_unmask = realtek_gpio_irq_unmask,
-++	.irq_set_type = realtek_gpio_irq_set_type,
-++};
-++
-++static const struct of_device_id realtek_gpio_of_match[] = {
-++	{
-++		.compatible = "realtek,otto-gpio",
-++		.data = (void *)GPIO_INTERRUPTS_DISABLED,
-++	},
-++	{
-++		.compatible = "realtek,rtl8380-gpio",
-++	},
-++	{
-++		.compatible = "realtek,rtl8390-gpio",
-++	},
-++	{}
-++};
-++MODULE_DEVICE_TABLE(of, realtek_gpio_of_match);
-++
-++static int realtek_gpio_probe(struct platform_device *pdev)
-++{
-++	struct device *dev = &pdev->dev;
-++	unsigned int dev_flags;
-++	struct gpio_irq_chip *girq;
-++	struct realtek_gpio_ctrl *ctrl;
-++	u32 ngpios;
-++	int err, irq;
-++
-++	ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
-++	if (!ctrl)
-++		return -ENOMEM;
-++
-++	dev_flags = (unsigned int) device_get_match_data(dev);
-++
-++	ngpios = REALTEK_GPIO_MAX;
-++	device_property_read_u32(dev, "ngpios", &ngpios);
-++
-++	if (ngpios > REALTEK_GPIO_MAX) {
-++		dev_err(&pdev->dev, "invalid ngpios (max. %d)\n",
-++			REALTEK_GPIO_MAX);
-++		return -EINVAL;
-++	}
-++
-++	ctrl->base = devm_platform_ioremap_resource(pdev, 0);
-++	if (IS_ERR(ctrl->base))
-++		return PTR_ERR(ctrl->base);
-++
-++	raw_spin_lock_init(&ctrl->lock);
-++
-++	err = bgpio_init(&ctrl->gc, dev, 4,
-++		ctrl->base + REALTEK_GPIO_REG_DATA, NULL, NULL,
-++		ctrl->base + REALTEK_GPIO_REG_DIR, NULL,
-++		BGPIOF_BIG_ENDIAN_BYTE_ORDER);
-++	if (err) {
-++		dev_err(dev, "unable to init generic GPIO");
-++		return err;
-++	}
-++
-++	ctrl->gc.ngpio = ngpios;
-++	ctrl->gc.owner = THIS_MODULE;
-++
-++	irq = platform_get_irq_optional(pdev, 0);
-++	if (!(dev_flags & GPIO_INTERRUPTS_DISABLED) && irq > 0) {
-++		girq = &ctrl->gc.irq;
-++		girq->chip = &realtek_gpio_irq_chip;
-++		girq->default_type = IRQ_TYPE_NONE;
-++		girq->handler = handle_bad_irq;
-++		girq->parent_handler = realtek_gpio_irq_handler;
-++		girq->num_parents = 1;
-++		girq->parents = devm_kcalloc(dev, girq->num_parents,
-++					sizeof(*girq->parents),	GFP_KERNEL);
-++		if (!girq->parents)
-++			return -ENOMEM;
-++		girq->parents[0] = irq;
-++		girq->init_hw = realtek_gpio_irq_init;
-++	}
-++
-++	return devm_gpiochip_add_data(dev, &ctrl->gc, ctrl);
-++}
-++
-++static struct platform_driver realtek_gpio_driver = {
-++	.driver = {
-++		.name = "realtek-otto-gpio",
-++		.of_match_table	= realtek_gpio_of_match,
-++	},
-++	.probe = realtek_gpio_probe,
-++};
-++module_platform_driver(realtek_gpio_driver);
-++
-++MODULE_DESCRIPTION("Realtek Otto GPIO support");
-++MODULE_AUTHOR("Sander Vanheule <sander@svanheule.net>");
-++MODULE_LICENSE("GPL v2");
-diff --git a/target/linux/realtek/patches-5.4/702-net-ethernet-add-support-for-rtl838x-ethernet.patch b/target/linux/realtek/patches-5.4/702-net-ethernet-add-support-for-rtl838x-ethernet.patch
-index 952384ac89..11e62450d5 100644
---- a/target/linux/realtek/patches-5.4/702-net-ethernet-add-support-for-rtl838x-ethernet.patch
-+++ b/target/linux/realtek/patches-5.4/702-net-ethernet-add-support-for-rtl838x-ethernet.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/ethernet/Kconfig
- +++ b/drivers/net/ethernet/Kconfig
--@@ -164,6 +164,13 @@ source "drivers/net/ethernet/rdc/Kconfig
-+@@ -163,6 +163,13 @@ source "drivers/net/ethernet/rdc/Kconfig
-  source "drivers/net/ethernet/realtek/Kconfig"
-  source "drivers/net/ethernet/renesas/Kconfig"
-  source "drivers/net/ethernet/rocker/Kconfig"
-diff --git a/target/linux/realtek/patches-5.4/703-include-linux-add-phy-ops-for-rtl838x.patch b/target/linux/realtek/patches-5.4/703-include-linux-add-phy-ops-for-rtl838x.patch
-index 03accd1e07..3682eb30a3 100644
---- a/target/linux/realtek/patches-5.4/703-include-linux-add-phy-ops-for-rtl838x.patch
-+++ b/target/linux/realtek/patches-5.4/703-include-linux-add-phy-ops-for-rtl838x.patch
-@@ -1,6 +1,6 @@
- --- a/include/linux/phy.h
- +++ b/include/linux/phy.h
--@@ -644,6 +644,10 @@ struct phy_driver {
-+@@ -645,6 +645,10 @@ struct phy_driver {
-  			    struct ethtool_tunable *tuna,
-  			    const void *data);
-  	int (*set_loopback)(struct phy_device *dev, bool enable);
-diff --git a/target/linux/realtek/patches-5.4/704-include-linux-add-phy-hsgmii-mode.patch b/target/linux/realtek/patches-5.4/704-include-linux-add-phy-hsgmii-mode.patch
-new file mode 100644
-index 0000000000..9a61a70c44
---- /dev/null
-+++ b/target/linux/realtek/patches-5.4/704-include-linux-add-phy-hsgmii-mode.patch
-@@ -0,0 +1,19 @@
-+--- a/include/linux/phy.h
-++++ b/include/linux/phy.h
-+@@ -93,6 +93,7 @@
-+ 	PHY_INTERFACE_MODE_SMII,
-+ 	PHY_INTERFACE_MODE_XGMII,
-+ 	PHY_INTERFACE_MODE_MOCA,
-++	PHY_INTERFACE_MODE_HSGMII,
-+ 	PHY_INTERFACE_MODE_QSGMII,
-+ 	PHY_INTERFACE_MODE_TRGMII,
-+ 	PHY_INTERFACE_MODE_1000BASEX,
-+@@ -163,6 +164,8 @@
-+ 		return "xgmii";
-+ 	case PHY_INTERFACE_MODE_MOCA:
-+ 		return "moca";
-++	case PHY_INTERFACE_MODE_HSGMII:
-++		return "hsgmii";
-+ 	case PHY_INTERFACE_MODE_QSGMII:
-+ 		return "qsgmii";
-+ 	case PHY_INTERFACE_MODE_TRGMII:
-diff --git a/target/linux/realtek/patches-5.4/706-sysled.patch b/target/linux/realtek/patches-5.4/706-sysled.patch
-new file mode 100644
-index 0000000000..184aa70b44
---- /dev/null
-+++ b/target/linux/realtek/patches-5.4/706-sysled.patch
-@@ -0,0 +1,288 @@
-+From c1a89fdf22862379bb4150fc76504e2d3384cd67 Mon Sep 17 00:00:00 2001
-+From: Bert Vermeulen <bert@biot.com>
-+Date: Mon, 1 Mar 2021 12:41:35 +0100
-+Subject: [PATCH] mfd: Add Realtek RTL838x/RTL839x sys-led driver
-+
-+---
-+ drivers/mfd/Kconfig       |  11 ++
-+ drivers/mfd/Makefile      |   1 +
-+ drivers/mfd/realtek-eio.c | 243 ++++++++++++++++++++++++++++++++++++++
-+ 3 files changed, 255 insertions(+)
-+ create mode 100644 drivers/mfd/realtek-eio.c
-+
-+--- a/drivers/mfd/Kconfig
-++++ b/drivers/mfd/Kconfig
-+@@ -923,6 +923,16 @@ config MFD_RETU
-+ 	  Retu and Tahvo are a multi-function devices found on Nokia
-+ 	  Internet Tablets (770, N800 and N810).
-+ 
-++config MFD_REALTEK_EIO
-++	tristate "Realtek external LED and GPIO driver"
-++	select MFD_CORE
-++	select MFD_SYSCON
-++	select GENERIC_PINCONF
-++	default y
-++	help
-++	  Say yes here if you want external LED/GPIO support for Realtek
-++	  switch SoCs.
-++
-+ config MFD_PCF50633
-+ 	tristate "NXP PCF50633"
-+ 	depends on I2C
-+--- /dev/null
-++++ b/drivers/mfd/realtek-eio.c
-+@@ -0,0 +1,246 @@
-++// SPDX-License-Identifier: GPL-2.0-or-later
-++
-++#include <linux/leds.h>
-++#include <linux/mfd/core.h>
-++#include <linux/mfd/syscon.h>
-++#include <linux/module.h>
-++#include <linux/of.h>
-++#include <linux/of_address.h>
-++#include <linux/of_platform.h>
-++#include <linux/platform_device.h>
-++#include <linux/regmap.h>
-++
-++#define REALTEK_EIO_GLOBAL_CTRL				0x0
-++
-++/*
-++ * Management of external RTL8231 GPIO expanders.
-++ * One RTL8231's GPIO registers can be shadowed to the internal GPIO_DIR
-++ * and GPIO_DAT registers.
-++ */
-++#define RTL8380_EIO_GPIO_INDIRECT_ACCESS	0x9C
-++#define RTL8380_EIO_GPIO_CTRL			0xE0
-++#define RTL8380_EIO_GPIO_DIR(pin)		(0xE4 + 4*((pin)/32))
-++#define RTL8380_EIO_GPIO_DAT(pin)		(0xEC + 4*((pin)/32))
-++
-++struct realtek_eio_ctrl;
-++
-++struct realtek_eio_data {
-++	unsigned int sys_led_pos;
-++	const struct mfd_cell *mfd_devices;
-++	unsigned int mfd_device_count;
-++};
-++
-++struct realtek_eio_ctrl {
-++	struct device *dev;
-++	struct regmap *map;
-++	const struct realtek_eio_data *data;
-++	struct led_classdev sys_led;
-++	bool active_low;
-++};
-++
-++
-++#define OF_MFD_CELL(_name, _compat)		\
-++	{								\
-++		.name = (_name),					\
-++		.of_compatible = (_compat),				\
-++	}
-++
-++/*
-++ * Realtek hardware system LED
-++ *
-++ * The switch SoC supports one hardware managed direct LED output
-++ * to manage a system LED, with two supported blinking rates.
-++ */
-++enum {
-++	REALTEK_SYS_LED_OFF = 0,
-++	REALTEK_SYS_LED_BLINK_64MS,
-++	REALTEK_SYS_LED_BLINK_1024MS,
-++	REALTEK_SYS_LED_ON
-++};
-++
-++static void realtek_sys_led_set(const struct realtek_eio_ctrl *ctrl,
-++	unsigned int mode)
-++{
-++	regmap_update_bits(ctrl->map, REALTEK_EIO_GLOBAL_CTRL,
-++		(0x3 << ctrl->data->sys_led_pos),
-++		((mode & 0x3) << ctrl->data->sys_led_pos));
-++}
-++
-++static void realtek_sys_led_brightness_set(struct led_classdev *led_cdev,
-++	enum led_brightness brightness)
-++{
-++	struct realtek_eio_ctrl *ctrl =
-++		container_of(led_cdev, struct realtek_eio_ctrl, sys_led);
-++
-++	if ((!ctrl->active_low && brightness == LED_OFF) ||
-++		(ctrl->active_low && brightness != LED_OFF))
-++		realtek_sys_led_set(ctrl, REALTEK_SYS_LED_OFF);
-++	else
-++		realtek_sys_led_set(ctrl, REALTEK_SYS_LED_ON);
-++}
-++
-++static enum led_brightness realtek_sys_led_brightness_get(
-++	struct led_classdev *led_cdev)
-++{
-++	struct realtek_eio_ctrl *ctrl =
-++		container_of(led_cdev, struct realtek_eio_ctrl, sys_led);
-++	u32 val;
-++
-++	regmap_read(ctrl->map, REALTEK_EIO_GLOBAL_CTRL, &val);
-++	val = (val >> ctrl->data->sys_led_pos) & 0x3;
-++
-++	if ((!ctrl->active_low && val == REALTEK_SYS_LED_OFF) ||
-++		(ctrl->active_low && val == REALTEK_SYS_LED_ON))
-++		return LED_OFF;
-++	else
-++		return LED_ON;
-++}
-++
-++static int realtek_sys_led_blink_set(struct led_classdev *led_cdev,
-++	unsigned long *delay_on, unsigned long *delay_off)
-++{
-++	struct realtek_eio_ctrl *ctrl =
-++		container_of(led_cdev, struct realtek_eio_ctrl, sys_led);
-++	u32 blink_interval = *delay_on + *delay_off;
-++
-++	/* Split range at geometric mean of 64 and 1024 */
-++	if (blink_interval == 0 || blink_interval > 2*256) {
-++		*delay_on = 1024;
-++		*delay_off = 1024;
-++		realtek_sys_led_set(ctrl, REALTEK_SYS_LED_BLINK_1024MS);
-++	}
-++	else {
-++		*delay_on = 64;
-++		*delay_off = 64;
-++		realtek_sys_led_set(ctrl, REALTEK_SYS_LED_BLINK_64MS);
-++	}
-++
-++	return 0;
-++}
-++
-++static int realtek_sys_led_probe(struct realtek_eio_ctrl *ctrl,
-++	struct device *parent, struct device_node *np)
-++{
-++	struct led_classdev *sys_led = &ctrl->sys_led;
-++	struct led_init_data init_data = {};
-++
-++	init_data.fwnode = of_fwnode_handle(np);
-++
-++	ctrl->active_low = of_property_read_bool(np, "active-low");
-++
-++	sys_led->max_brightness = 1;
-++	sys_led->brightness_set = realtek_sys_led_brightness_set;
-++	sys_led->brightness_get = realtek_sys_led_brightness_get;
-++	sys_led->blink_set = realtek_sys_led_blink_set;
-++
-++	return devm_led_classdev_register_ext(parent, sys_led, &init_data);
-++}
-++
-++static const struct mfd_cell rtl8380_mfd_devices[] = {
-++	OF_MFD_CELL("realtek-eio-port-leds", "realtek,rtl8380-eio-port-led"),
-++	OF_MFD_CELL("realtek-eio-mdio", "realtek,rtl8380-eio-mdio"),
-++	OF_MFD_CELL("realtek-eio-pinctrl", "realtek,rtl8380-eio-pinctrl"),
-++};
-++
-++static const struct realtek_eio_data rtl8380_eio_data = {
-++	.sys_led_pos = 16,
-++	.mfd_devices = rtl8380_mfd_devices,
-++	.mfd_device_count = ARRAY_SIZE(rtl8380_mfd_devices)
-++};
-++
-++static const struct mfd_cell rtl8390_mfd_devices[] = {
-++	OF_MFD_CELL("realtek-eio-port-leds", "realtek,rtl8390-eio-port-led"),
-++};
-++
-++static struct realtek_eio_data rtl8390_eio_data = {
-++	.sys_led_pos = 15,
-++	.mfd_devices = rtl8390_mfd_devices,
-++	.mfd_device_count = ARRAY_SIZE(rtl8390_mfd_devices)
-++};
-++
-++static const struct of_device_id of_realtek_eio_match[] = {
-++	{
-++		.compatible = "realtek,rtl8380-eio",
-++		.data = &rtl8380_eio_data,
-++	},
-++	{
-++		.compatible = "realtek,rtl8390-eio",
-++		.data = &rtl8390_eio_data,
-++	},
-++};
-++
-++MODULE_DEVICE_TABLE(of, of_realtek_eio_match);
-++
-++static int realtek_eio_probe(struct platform_device *pdev)
-++{
-++	struct device *dev = &pdev->dev;
-++	struct device_node *np = dev->of_node;
-++	struct device_node *np_sys_led;
-++	const struct of_device_id *match;
-++	struct realtek_eio_ctrl *ctrl;
-++	int err, val;
-++	unsigned r;
-++
-++	ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
-++	if (!ctrl)
-++		return -ENOMEM;
-++
-++	match = of_match_device(of_realtek_eio_match, dev);
-++	if (match)
-++		ctrl->data = (struct realtek_eio_data *) match->data;
-++	else {
-++		dev_err(dev, "no device match\n");
-++		return -EINVAL;
-++	}
-++
-++	ctrl->dev = dev;
-++
-++	if (!np) {
-++		dev_err(dev, "no DT node found\n");
-++		return -EINVAL;
-++	}
-++
-++	ctrl->map = device_node_to_regmap(np);
-++	if (!ctrl->map) {
-++		dev_err(dev, "failed to get regmap\n");
-++		return -EINVAL;
-++	}
-++
-++	/* Parse optional sys-led child */
-++	np_sys_led = of_get_child_by_name(np, "sys-led");
-++	if (IS_ERR(np_sys_led))
-++		return PTR_ERR(np_sys_led);
-++
-++	if (np_sys_led) {
-++		err = realtek_sys_led_probe(ctrl, dev, np_sys_led);
-++		if (err)
-++			return err;
-++	}
-++
-++	/* Find sub-devices */
-++	if (ctrl->data->mfd_devices)
-++		mfd_add_devices(dev, 0, ctrl->data->mfd_devices,
-++			ctrl->data->mfd_device_count, NULL, 0, NULL);
-++
-++	/* Dump register values */
-++	for (r = 0; r <= regmap_get_max_register(ctrl->map); r += 4) {
-++		regmap_read(ctrl->map, r, &val);
-++		dev_info(dev, "%02x %08x\n", r, val);
-++	}
-++
-++	return 0;
-++}
-++
-++static struct platform_driver realtek_eio_driver = {
-++	.probe = realtek_eio_probe,
-++	.driver = {
-++		.name = "realtek-ext-io",
-++		.of_match_table = of_realtek_eio_match
-++	}
-++};
-++
-++module_platform_driver(realtek_eio_driver);
-++
-++MODULE_AUTHOR("Sander Vanheule <sander@svanheule.net>");
-++MODULE_DESCRIPTION("Realtek switch SoC external LED/GPIO driver");
-++MODULE_LICENSE("GPL v2");
-+--- a/drivers/mfd/Makefile
-++++ b/drivers/mfd/Makefile
-+@@ -255,4 +255,4 @@ obj-$(CONFIG_RAVE_SP_CORE)	+= rave-sp.o
-+ obj-$(CONFIG_MFD_ROHM_BD70528)	+= rohm-bd70528.o
-+ obj-$(CONFIG_MFD_ROHM_BD718XX)	+= rohm-bd718x7.o
-+ obj-$(CONFIG_MFD_STMFX) 	+= stmfx.o
-+-
-++obj-$(CONFIG_MFD_REALTEK_EIO)	+= realtek-eio.o
-diff --git a/target/linux/realtek/patches-5.4/707-dsa-trailer-hack.patch b/target/linux/realtek/patches-5.4/707-dsa-trailer-hack.patch
-new file mode 100644
-index 0000000000..7f4b1aaa13
---- /dev/null
-+++ b/target/linux/realtek/patches-5.4/707-dsa-trailer-hack.patch
-@@ -0,0 +1,44 @@
-+diff -urpN linux-5.4.139.old/include/net/dsa.h linux-5.4.139/include/net/dsa.h
-+--- linux-5.4.139.old/include/net/dsa.h	2021-08-12 11:07:00.456095739 +0700
-++++ linux-5.4.139/include/net/dsa.h	2021-08-12 11:11:24.556448045 +0700
-+@@ -43,6 +43,7 @@ struct phylink_link_state;
-+ #define DSA_TAG_PROTO_SJA1105_VALUE		13
-+ #define DSA_TAG_PROTO_KSZ8795_VALUE		14
-+ #define DSA_TAG_PROTO_RTL4_A_VALUE		17
-++#define DSA_TAG_PROTO_RTL83XX_VALUE		18
-+ 
-+ enum dsa_tag_protocol {
-+ 	DSA_TAG_PROTO_NONE		= DSA_TAG_PROTO_NONE_VALUE,
-+@@ -61,6 +62,7 @@ enum dsa_tag_protocol {
-+ 	DSA_TAG_PROTO_SJA1105		= DSA_TAG_PROTO_SJA1105_VALUE,
-+ 	DSA_TAG_PROTO_KSZ8795		= DSA_TAG_PROTO_KSZ8795_VALUE,
-+ 	DSA_TAG_PROTO_RTL4_A		= DSA_TAG_PROTO_RTL4_A_VALUE,
-++	DSA_TAG_PROTO_RTL83XX		= DSA_TAG_PROTO_RTL83XX_VALUE,
-+ };
-+ 
-+ struct packet_type;
-+diff -urpN linux-5.4.139.old/net/dsa/Kconfig linux-5.4.139/net/dsa/Kconfig
-+--- linux-5.4.139.old/net/dsa/Kconfig	2021-08-12 11:08:44.196228650 +0700
-++++ linux-5.4.139/net/dsa/Kconfig	2021-08-12 11:09:01.260252005 +0700
-+@@ -120,4 +120,10 @@ config NET_DSA_TAG_TRAILER
-+ 	  Say Y or M if you want to enable support for tagging frames at
-+ 	  with a trailed. e.g. Marvell 88E6060.
-+ 
-++config NET_DSA_TAG_RTL83XX
-++	tristate "Tag driver for RTL83XX switches"
-++	help
-++	  Say Y or M if you want to enable support for tagging frames for
-++	    the RTL83XX chipsets.
-++
-+ endif
-+diff -urpN linux-5.4.139.old/net/dsa/Makefile linux-5.4.139/net/dsa/Makefile
-+--- linux-5.4.139.old/net/dsa/Makefile	2021-08-12 11:08:44.196228650 +0700
-++++ linux-5.4.139/net/dsa/Makefile	2021-08-12 11:09:01.260252005 +0700
-+@@ -15,3 +15,4 @@ obj-$(CONFIG_NET_DSA_TAG_MTK) += tag_mtk
-+ obj-$(CONFIG_NET_DSA_TAG_QCA) += tag_qca.o
-+ obj-$(CONFIG_NET_DSA_TAG_SJA1105) += tag_sja1105.o
-+ obj-$(CONFIG_NET_DSA_TAG_TRAILER) += tag_trailer.o
-++obj-$(CONFIG_NET_DSA_TAG_RTL83XX) += tag_rtl83xx.o
-+\ No newline at end of file
-+diff -urpN linux-5.4.139.old/net/dsa/tag_rtl83xx.c linux-5.4.139/net/dsa/tag_rtl83xx.c
-+diff -urpN linux-5.4.139.old/net/dsa/tag_trailer.c linux-5.4.139/net/dsa/tag_trailer.c
-diff --git a/target/linux/realtek/patches-5.4/707-reboot.patch b/target/linux/realtek/patches-5.4/707-reboot.patch
-new file mode 100644
-index 0000000000..bdea960c45
---- /dev/null
-+++ b/target/linux/realtek/patches-5.4/707-reboot.patch
-@@ -0,0 +1,7 @@
-+--- a/drivers/gpio/Makefile
-++++ b/drivers/gpio/Makefile
-+@@ -172,3 +172,4 @@ obj-$(CONFIG_GPIO_XTENSA)		+= gpio-xtens
-+ obj-$(CONFIG_GPIO_ZEVIO)		+= gpio-zevio.o
-+ obj-$(CONFIG_GPIO_ZX)			+= gpio-zx.o
-+ obj-$(CONFIG_GPIO_ZYNQ)			+= gpio-zynq.o
-++obj-y += edgecore_reboot.o
-diff --git a/target/linux/realtek/patches-5.4/708-dsa-backports.patch b/target/linux/realtek/patches-5.4/708-dsa-backports.patch
-new file mode 100644
-index 0000000000..103d6ba113
---- /dev/null
-+++ b/target/linux/realtek/patches-5.4/708-dsa-backports.patch
-@@ -0,0 +1,239 @@
-+diff -urpN linux-5.4.139.old/include/net/dsa.h linux-5.4.139/include/net/dsa.h
-+--- linux-5.4.139.old/include/net/dsa.h	2021-08-12 12:42:24.015154362 +0700
-++++ linux-5.4.139/include/net/dsa.h	2021-08-12 12:44:13.935282068 +0700
-+@@ -432,6 +432,18 @@ static inline bool dsa_port_is_vlan_filt
-+ 		return dp->vlan_filtering;
-+ }
-+ 
-++static inline
-++struct net_device *dsa_port_to_bridge_port(const struct dsa_port *dp)
-++{
-++	if (!dp->bridge_dev)
-++		return NULL;
-++
-++	if (dp->lag_dev)
-++		return dp->lag_dev;
-++
-++	return dp->slave;
-++}
-++
-+ typedef int dsa_fdb_dump_cb_t(const unsigned char *addr, u16 vid,
-+ 			      bool is_static, void *data);
-+ struct dsa_switch_ops {
-+diff -urpN linux-5.4.139.old/net/dsa/dsa_priv.h linux-5.4.139/net/dsa/dsa_priv.h
-+--- linux-5.4.139.old/net/dsa/dsa_priv.h	2021-08-12 12:42:24.015154362 +0700
-++++ linux-5.4.139/net/dsa/dsa_priv.h	2021-08-12 12:42:40.619173663 +0700
-+@@ -203,18 +203,30 @@ void dsa_port_phylink_mac_link_up(struct
-+ 				  struct phy_device *phydev);
-+ extern const struct phylink_mac_ops dsa_port_phylink_mac_ops;
-+ 
-+-static inline bool dsa_port_offloads_netdev(struct dsa_port *dp,
-+-					    struct net_device *dev)
-++static inline bool dsa_port_offloads_bridge_port(struct dsa_port *dp,
-++						 struct net_device *dev)
-+ {
-+-	/* Switchdev offloading can be configured on: */
-++	return dsa_port_to_bridge_port(dp) == dev;
-++}
-+ 
-+-	if (dev == dp->slave)
-+-		/* DSA ports directly connected to a bridge. */
-+-		return true;
-++static inline bool dsa_port_offloads_bridge(struct dsa_port *dp,
-++					    struct net_device *bridge_dev)
-++{
-++	/* DSA ports connected to a bridge, and event was emitted
-++	 * for the bridge.
-++	 */
-++	return dp->bridge_dev == bridge_dev;
-++}
-++
-++/* Returns true if any port of this tree offloads the given net_device */
-++static inline bool dsa_tree_offloads_bridge_port(struct dsa_switch_tree *dst,
-++						 struct net_device *dev)
-++{
-++	struct dsa_port *dp;
-+ 
-+-	if (dp->lag_dev == dev)
-+-		/* DSA ports connected to a bridge via a LAG */
-+-		return true;
-++	list_for_each_entry(dp, &dst->ports, list)
-++		if (dsa_port_offloads_bridge_port(dp, dev))
-++			return true;
-+ 
-+ 	return false;
-+ }
-+diff -urpN linux-5.4.139.old/net/dsa/port.c linux-5.4.139/net/dsa/port.c
-+--- linux-5.4.139.old/net/dsa/port.c	2021-08-12 12:41:26.839087913 +0700
-++++ linux-5.4.139/net/dsa/port.c	2021-08-12 12:46:43.067455364 +0700
-+@@ -210,17 +210,31 @@ int dsa_port_lag_join(struct dsa_port *d
-+ 		.lag = lag,
-+ 		.info = uinfo,
-+ 	};
-++	struct net_device *bridge_dev;
-+ 	int err;
-+ 
-+ 	dsa_lag_map(dp->ds->dst, lag);
-+ 	dp->lag_dev = lag;
-+ 
-+ 	err = dsa_port_notify(dp, DSA_NOTIFIER_LAG_JOIN, &info);
-+-	if (err) {
-+-		dp->lag_dev = NULL;
-+-		dsa_lag_unmap(dp->ds->dst, lag);
-+-	}
-++	if (err)
-++		goto err_lag_join;
-+ 
-++	bridge_dev = netdev_master_upper_dev_get(lag);
-++	if (!bridge_dev || !netif_is_bridge_master(bridge_dev))
-++		return 0;
-++
-++	err = dsa_port_bridge_join(dp, bridge_dev);
-++	if (err)
-++		goto err_bridge_join;
-++
-++	return 0;
-++
-++err_bridge_join:
-++	dsa_port_notify(dp, DSA_NOTIFIER_LAG_LEAVE, &info);
-++err_lag_join:
-++	dp->lag_dev = NULL;
-++	dsa_lag_unmap(dp->ds->dst, lag);
-+ 	return err;
-+ }
-+ 
-+diff -urpN linux-5.4.139.old/net/dsa/port.c.orig linux-5.4.139/net/dsa/port.c.orig
-+diff -urpN linux-5.4.139.old/net/dsa/slave.c linux-5.4.139/net/dsa/slave.c
-+--- linux-5.4.139.old/net/dsa/slave.c	2021-08-12 12:42:24.015154362 +0700
-++++ linux-5.4.139/net/dsa/slave.c	2021-08-12 12:42:40.619173663 +0700
-+@@ -284,28 +284,43 @@ static int dsa_slave_port_attr_set(struc
-+ 	struct dsa_port *dp = dsa_slave_to_port(dev);
-+ 	int ret;
-+ 
-+-	if (!dsa_port_offloads_netdev(dp, attr->orig_dev))
-+-		return -EOPNOTSUPP;
-+-
-+ 	switch (attr->id) {
-+ 	case SWITCHDEV_ATTR_ID_PORT_STP_STATE:
-++		if (!dsa_port_offloads_bridge_port(dp, attr->orig_dev))
-++			return -EOPNOTSUPP;
-++
-+ 		ret = dsa_port_set_state(dp, attr->u.stp_state, trans);
-+ 		break;
-+ 	case SWITCHDEV_ATTR_ID_BRIDGE_VLAN_FILTERING:
-++		if (!dsa_port_offloads_bridge(dp, attr->orig_dev))
-++			return -EOPNOTSUPP;
-++
-+ 		ret = dsa_port_vlan_filtering(dp, attr->u.vlan_filtering,
-+ 					      trans);
-+ 		break;
-+ 	case SWITCHDEV_ATTR_ID_BRIDGE_AGEING_TIME:
-++		if (!dsa_port_offloads_bridge(dp, attr->orig_dev))
-++			return -EOPNOTSUPP;
-++
-+ 		ret = dsa_port_ageing_time(dp, attr->u.ageing_time, trans);
-+ 		break;
-+ 	case SWITCHDEV_ATTR_ID_PORT_PRE_BRIDGE_FLAGS:
-++		if (!dsa_port_offloads_bridge_port(dp, attr->orig_dev))
-++			return -EOPNOTSUPP;
-++
-+ 		ret = dsa_port_pre_bridge_flags(dp, attr->u.brport_flags,
-+ 						trans, NULL);
-+ 		break;
-+ 	case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
-++		if (!dsa_port_offloads_bridge_port(dp, attr->orig_dev))
-++			return -EOPNOTSUPP;
-++
-+ 		ret = dsa_port_bridge_flags(dp, attr->u.brport_flags, trans, NULL);
-+ 		break;
-+ 	case SWITCHDEV_ATTR_ID_BRIDGE_MROUTER:
-++		if (!dsa_port_offloads_bridge(dp, attr->orig_dev))
-++			return -EOPNOTSUPP;
-++
-+ 		ret = dsa_port_mrouter(dp->cpu_dp, attr->u.mrouter, trans, NULL);
-+ 		break;
-+ 	default:
-+@@ -324,9 +339,6 @@ static int dsa_slave_vlan_add(struct net
-+ 	struct switchdev_obj_port_vlan vlan;
-+ 	int err;
-+ 
-+-	if (!dsa_port_offloads_netdev(dp, obj->orig_dev))
-+-		return -EOPNOTSUPP;
-+-
-+ 	if (dsa_port_skip_vlan_configuration(dp))
-+ 		return 0;
-+ 
-+@@ -364,11 +376,13 @@ static int dsa_slave_port_obj_add(struct
-+ 
-+ 	switch (obj->id) {
-+ 	case SWITCHDEV_OBJ_ID_PORT_MDB:
-+-		if (!dsa_port_offloads_netdev(dp, obj->orig_dev))
-++		if (!dsa_port_offloads_bridge_port(dp, obj->orig_dev))
-+ 			return -EOPNOTSUPP;
-+ 		err = dsa_port_mdb_add(dp, SWITCHDEV_OBJ_PORT_MDB(obj), trans);
-+ 		break;
-+ 	case SWITCHDEV_OBJ_ID_HOST_MDB:
-++		if (!dsa_port_offloads_bridge(dp, obj->orig_dev))
-++			return -EOPNOTSUPP;
-+ 		/* DSA can directly translate this to a normal MDB add,
-+ 		 * but on the CPU port.
-+ 		 */
-+@@ -376,6 +390,9 @@ static int dsa_slave_port_obj_add(struct
-+ 				       trans);
-+ 		break;
-+ 	case SWITCHDEV_OBJ_ID_PORT_VLAN:
-++		if (!dsa_port_offloads_bridge_port(dp, obj->orig_dev))
-++			return -EOPNOTSUPP;
-++
-+ 		err = dsa_slave_vlan_add(dev, obj, trans);
-+ 		break;
-+ 	default:
-+@@ -391,9 +408,6 @@ static int dsa_slave_vlan_del(struct net
-+ {
-+ 	struct dsa_port *dp = dsa_slave_to_port(dev);
-+ 
-+-	if (!dsa_port_offloads_netdev(dp, obj->orig_dev))
-+-		return -EOPNOTSUPP;
-+-
-+ 	if (dsa_port_skip_vlan_configuration(dp))
-+ 		return 0;
-+ 
-+@@ -411,17 +425,22 @@ static int dsa_slave_port_obj_del(struct
-+ 
-+ 	switch (obj->id) {
-+ 	case SWITCHDEV_OBJ_ID_PORT_MDB:
-+-		if (!dsa_port_offloads_netdev(dp, obj->orig_dev))
-++		if (!dsa_port_offloads_bridge_port(dp, obj->orig_dev))
-+ 			return -EOPNOTSUPP;
-+ 		err = dsa_port_mdb_del(dp, SWITCHDEV_OBJ_PORT_MDB(obj));
-+ 		break;
-+ 	case SWITCHDEV_OBJ_ID_HOST_MDB:
-++		if (!dsa_port_offloads_bridge(dp, obj->orig_dev))
-++			return -EOPNOTSUPP;
-+ 		/* DSA can directly translate this to a normal MDB add,
-+ 		 * but on the CPU port.
-+ 		 */
-+ 		err = dsa_port_mdb_del(dp->cpu_dp, SWITCHDEV_OBJ_PORT_MDB(obj));
-+ 		break;
-+ 	case SWITCHDEV_OBJ_ID_PORT_VLAN:
-++		if (!dsa_port_offloads_bridge_port(dp, obj->orig_dev))
-++			return -EOPNOTSUPP;
-++
-+ 		err = dsa_slave_vlan_del(dev, obj);
-+ 		break;
-+ 	default:
-+@@ -1801,6 +1820,14 @@ static int dsa_slave_switchdev_event(str
-+ 			if (!fdb_info->added_by_user &&
-+ 			    !dp->ds->assisted_learning_on_cpu_port)
-+ 				return NOTIFY_DONE;
-++
-++			/* When the bridge learns an address on an offloaded
-++			 * LAG we don't want to send traffic to the CPU, the
-++			 * other ports bridged with the LAG should be able to
-++			 * autonomously forward towards it.
-++			 */
-++			if (dsa_tree_offloads_bridge_port(dp->ds->dst, dev))
-++				return NOTIFY_DONE;
-+ 		}
-+ 
-+ 		if (!dp->ds->ops->port_fdb_add || !dp->ds->ops->port_fdb_del)
-diff --git a/target/linux/realtek/patches-5.4/710-adt7470.patch b/target/linux/realtek/patches-5.4/710-adt7470.patch
-new file mode 100644
-index 0000000000..64798b7ddf
---- /dev/null
-+++ b/target/linux/realtek/patches-5.4/710-adt7470.patch
-@@ -0,0 +1,20 @@
-+--- a/drivers/hwmon/adt7470.c
-++++ b/drivers/hwmon/adt7470.c
-+@@ -1271,10 +1271,17 @@ static const struct i2c_device_id adt747
-+ };
-+ MODULE_DEVICE_TABLE(i2c, adt7470_id);
-+ 
-++static const struct of_device_id __maybe_unused adt7470_of_match =
-++{
-++	.compatible = "adi,adt7470",
-++};
-++MODULE_DEVICE_TABLE(of, adt7470_of_match);
-++
-+ static struct i2c_driver adt7470_driver = {
-+ 	.class		= I2C_CLASS_HWMON,
-+ 	.driver = {
-+ 		.name	= "adt7470",
-++		.of_match_table = of_match_ptr(&adt7470_of_match),
-+ 	},
-+ 	.probe		= adt7470_probe,
-+ 	.remove		= adt7470_remove,
-diff --git a/target/linux/realtek/patches-5.4/711-ec4100.patch b/target/linux/realtek/patches-5.4/711-ec4100.patch
-new file mode 100644
-index 0000000000..950912ce8d
---- /dev/null
-+++ b/target/linux/realtek/patches-5.4/711-ec4100.patch
-@@ -0,0 +1,150 @@
-+Index: linux-5.4.111/drivers/net/dsa/rtl83xx/common.c
-+===================================================================
-+--- linux-5.4.111.orig/drivers/net/dsa/rtl83xx/common.c
-++++ linux-5.4.111/drivers/net/dsa/rtl83xx/common.c
-+@@ -1609,6 +1609,17 @@ static int __init rtl83xx_sw_probe(struc
-+ 		rtl930x_dbgfs_init(priv);
-+ 	}
-+ 
-++	if (of_machine_is_compatible("edgecore,ecs4100-12ph")) {
-++		sw_w32(0x000000FF, 0x110);
-++		sw_w32(0x00000000, 0x114);
-++		sw_w32(0x00000000, 0x118);
-++		sw_w32(0x000f0000, 0x11c);
-++		sw_w32(0x00000000, 0x120);
-++		sw_w32(0x000f0000, 0x124);
-++		sw_w32(0x3DEA, 0xec);
-++		sw_w32(0x707568, 0xe4);
-++	}
-++
-+ 	return 0;
-+ 
-+ err_register_fib_nb:
-+Index: linux-5.4.111/drivers/net/phy/rtl83xx-phy.c
-+===================================================================
-+--- linux-5.4.111.orig/drivers/net/phy/rtl83xx-phy.c
-++++ linux-5.4.111/drivers/net/phy/rtl83xx-phy.c
-+@@ -1439,6 +1439,14 @@ static int rtl8380_configure_rtl8214fc(s
-+ 		write_phy(mac + i, 0xfff, 0x1e, 0x0000);
-+ 	}
-+ 
-++	if (of_machine_is_compatible("edgecore,ecs4100-12ph")) {
-++		printk("setting edgecore specific SFP modes\n");
-++		rtl8380_rtl8214fc_media_set(mac + 0, 0);
-++		rtl8380_rtl8214fc_media_set(mac + 1, 0);
-++		rtl8380_rtl8214fc_media_set(mac + 2, 1);
-++		rtl8380_rtl8214fc_media_set(mac + 3, 1);
-++	}
-++
-+ 	return 0;
-+ }
-+ 
-+Index: linux-5.4.111/arch/mips/rtl838x/setup.c
-+===================================================================
-+--- linux-5.4.111.orig/arch/mips/rtl838x/setup.c
-++++ linux-5.4.111/arch/mips/rtl838x/setup.c
-+@@ -46,21 +46,6 @@ static void rtl838x_restart(char *comman
-+ 	sw_w32(1, RTL838X_RST_GLB_CTRL_1);
-+ }
-+ 
-+-static void rtl839x_restart(char *command)
-+-{
-+-	/* SoC reset vector (in flash memory): on RTL839x platform preferred way to reset */
-+-	void (*f)(void) = (void *) 0xbfc00000;
-+-
-+-	pr_info("System restart.\n");
-+-	/* Reset SoC */
-+-	sw_w32(0xFFFFFFFF, RTL839X_RST_GLB_CTRL);
-+-	/* and call reset vector */
-+-	f();
-+-	/* If this fails, halt the CPU */
-+-	while
-+-		(1);
-+-}
-+-
-+ static void rtl930x_restart(char *command)
-+ {
-+ 	pr_info("System restart.\n");
-+@@ -109,8 +94,6 @@ static void __init rtl838x_setup(void)
-+ static void __init rtl839x_setup(void)
-+ {
-+ 	pr_info("Registering _machine_restart\n");
-+-	_machine_restart = rtl839x_restart;
-+-	_machine_halt = rtl838x_halt;
-+ 
-+ 	/* Setup System LED. Bit 14 of RTL839X_LED_GLB_CTRL then allows to toggle it */
-+ 	sw_w32_mask(0, 3 << 15, RTL839X_LED_GLB_CTRL);
-+@@ -141,7 +124,6 @@ void __init plat_mem_setup(void)
-+ 	void *dtb;
-+ 
-+ 	set_io_port_base(KSEG1);
-+-	_machine_restart = rtl838x_restart;
-+ 
-+ 	if (fw_passed_dtb) /* UHI interface */
-+ 		dtb = (void *)fw_passed_dtb;
-+Index: linux-5.4.111/drivers/gpio/edgecore_reboot.c
-+===================================================================
-+--- /dev/null
-++++ linux-5.4.111/drivers/gpio/edgecore_reboot.c
-+@@ -0,0 +1,61 @@
-++// SPDX-License-Identifier: GPL-2.0-only
-++/* Copyright (C) 2021 John Crispin <john@phrozen.org> */
-++#include <linux/delay.h>
-++#include <linux/io.h>
-++#include <linux/notifier.h>
-++#include <linux/of_address.h>
-++#include <linux/of_device.h>
-++#include <linux/platform_device.h>
-++#include <linux/reboot.h>
-++#include <linux/module.h>
-++#include <linux/gpio.h>
-++#include <linux/gpio/consumer.h>
-++
-++static struct notifier_block edgecore_reboot_handler;
-++static struct gpio_desc *gpiod;
-++static int edgecore_reboot_handle(struct notifier_block *this,
-++					unsigned long mode, void *cmd)
-++{
-++	gpiod_direction_output(gpiod, 0);
-++	mdelay(1000);
-++
-++	pr_emerg("Unable to restart system\n");
-++	return NOTIFY_DONE;
-++}
-++
-++static int __init edgecore_reboot_probe(struct platform_device *pdev)
-++{
-++	int err;
-++        unsigned long flags = GPIOF_IN;
-++
-++	gpiod = devm_gpiod_get_index(&pdev->dev, NULL, 0, flags);
-++        if (!IS_ERR(gpiod))
-++                gpiod_set_consumer_name(gpiod, "reboot");
-++	else
-++		return -EPROBE_DEFER;
-++
-++	edgecore_reboot_handler.notifier_call = edgecore_reboot_handle;
-++	edgecore_reboot_handler.priority = 255;
-++	err = register_restart_handler(&edgecore_reboot_handler);
-++	if (err)
-++		printk("can't register restart notifier (err=%d)\n", err);
-++
-++
-++	return 0;
-++}
-++
-++static const struct of_device_id edgecore_reboot_of_ids[] = {
-++	{ .compatible = "edgecore,reboot"},
-++	{ /* sentinel */ }
-++};
-++
-++
-++static struct platform_driver edgecore_reboot_driver = {
-++	.probe = edgecore_reboot_probe,
-++	.driver = {
-++		.name = "edgecore_reboot",
-++		.of_match_table = edgecore_reboot_of_ids,
-++	},
-++};
-++
-++module_platform_driver(edgecore_reboot_driver);
-diff --git a/target/linux/realtek/patches-5.4/712-fixes.patch b/target/linux/realtek/patches-5.4/712-fixes.patch
-new file mode 100644
-index 0000000000..68494b0ecc
---- /dev/null
-+++ b/target/linux/realtek/patches-5.4/712-fixes.patch
-@@ -0,0 +1,23 @@
-+--- a/drivers/gpio/gpio-rtl838x.c
-++++ b/drivers/gpio/gpio-rtl838x.c
-+@@ -348,6 +348,9 @@ static int rtl838x_gpio_probe(struct pla
-+ 	case 0x8391:
-+ 		pr_debug("Found RTL8391 GPIO\n");
-+ 		break;
-++	case 0x8392:
-++		pr_debug("Found RTL8392 GPIO\n");
-++		break;
-+ 	case 0x8393:
-+ 		pr_debug("Found RTL8393 GPIO\n");
-+ 		break;
-+--- a/drivers/net/phy/rtl83xx-phy.c
-++++ b/drivers/net/phy/rtl83xx-phy.c
-+@@ -1399,7 +1399,7 @@ static int rtl8380_configure_rtl8214fc(s
-+ 	for (i = 0; i < 4; i++) {
-+ 		for (l = 0; l < 100; l++) {
-+ 			read_phy(mac + i, 0xb80, 0x10, &val);
-+-			if (val & 0x40)
-++			if (val & 0x80)
-+ 				break;
-+ 		}
-+ 		if (l >= 100) {
--- 
-2.25.1
-
diff --git a/patches/backports/0009-include-set-kernel-version.mk.patch b/patches/backports/0009-include-set-kernel-version.mk.patch
deleted file mode 100644
index a318df86d..000000000
--- a/patches/backports/0009-include-set-kernel-version.mk.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From d28712edcc0e57b5c0e5d79125a5517ced252e18 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Wed, 7 Apr 2021 10:46:26 +0200
-Subject: [PATCH] include: set kernel-version.mk
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- include/kernel-version.mk | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/include/kernel-version.mk b/include/kernel-version.mk
-index 688660cbbd..c7aba61cd7 100644
---- a/include/kernel-version.mk
-+++ b/include/kernel-version.mk
-@@ -6,9 +6,15 @@ ifdef CONFIG_TESTING_KERNEL
-   KERNEL_PATCHVER:=$(KERNEL_TESTING_PATCHVER)
- endif
- 
-+LINUX_VERSION-4.4 = .60
-+LINUX_VERSION-4.14 = .193
- LINUX_VERSION-5.4 = .158
-+LINUX_VERSION-5.10 = .27
- 
-+LINUX_KERNEL_HASH-4.4.60 = 2cd8df6f1ac6a5329c5a286ec9b5956215977221a1b731597ed169fff74a9659
-+LINUX_KERNEL_HASH-4.14.193 = 0b0fb41d4430e1a42738b341cbfd2f41951aa5cd02acabbd53f076119c8b9f03
- LINUX_KERNEL_HASH-5.4.158 = 6e018fecdc8fc24553756e582d83b82d65b10a6b03ef36262a24911f839b8d59
-+LINUX_KERNEL_HASH-5.10.27 = d99dc9662951299c53a0a8d8c8d0a72a16ff861d20e927c0f9b14f63282d69d9
- 
- remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
- sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))
--- 
-2.25.1
-
diff --git a/patches/backports/0011-backport-mkits.sh.patch b/patches/backports/0011-backport-mkits.sh.patch
deleted file mode 100644
index c6a5fb7d4..000000000
--- a/patches/backports/0011-backport-mkits.sh.patch
+++ /dev/null
@@ -1,266 +0,0 @@
-From ad860cb413d1934332de60658d5eb8fb64d19663 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Sun, 9 May 2021 12:23:00 +0200
-Subject: [PATCH 11/27] backport: mkits.sh
-
-969083634481c3ab5fb80509f385ef10ab45b55f
-e991c1b8a2385397fc1e657ed73878938997d951
-9f714398e060c6338fbfad44cdbfa8c940dbb84b
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- include/image-commands.mk           |   2 +-
- include/image.mk                    |   2 +-
- scripts/mkits.sh                    | 101 +++++++++++++++++++++++++---
- target/linux/ipq40xx/image/Makefile |   1 +
- target/linux/ipq806x/image/Makefile |   1 +
- 5 files changed, 95 insertions(+), 12 deletions(-)
-
-diff --git a/include/image-commands.mk b/include/image-commands.mk
-index 2c917d613e..c6e8eb0293 100644
---- a/include/image-commands.mk
-+++ b/include/image-commands.mk
-@@ -203,7 +203,7 @@ define Build/fit
- 		$(if $(word 3,$(1)),-r $(IMAGE_ROOTFS) -f $(subst _,$(comma),$(DEVICE_NAME))) \
- 		-a $(KERNEL_LOADADDR) -e $(if $(KERNEL_ENTRY),$(KERNEL_ENTRY),$(KERNEL_LOADADDR)) \
- 		$(if $(DEVICE_FDT_NUM),-n $(DEVICE_FDT_NUM)) \
--		-c $(if $(DEVICE_DTS_CONFIG),$(DEVICE_DTS_CONFIG),"config@1") \
-+		-c $(if $(DEVICE_DTS_CONFIG),$(DEVICE_DTS_CONFIG),"config-1") \
- 		-A $(LINUX_KARCH) -v $(LINUX_VERSION)
- 	PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage $(if $(word 3,$(1)),-E -B 0x1000 -p 0x1000) -f $@.its $@.new
- 	@mv $@.new $@
-diff --git a/include/image.mk b/include/image.mk
-index b6e8ab3c84..7c2dcf0e8b 100644
---- a/include/image.mk
-+++ b/include/image.mk
-@@ -139,7 +139,7 @@ endef
- define Image/BuildKernel/MkFIT
- 	$(TOPDIR)/scripts/mkits.sh \
- 		-D $(1) -o $(KDIR)/fit-$(1).its -k $(2) $(if $(3),-d $(3)) -C $(4) -a $(5) -e $(6) \
--		-c $(if $(DEVICE_DTS_CONFIG),$(DEVICE_DTS_CONFIG),"config@1") \
-+		-c $(if $(DEVICE_DTS_CONFIG),$(DEVICE_DTS_CONFIG),"config-1") \
- 		-A $(LINUX_KARCH) -v $(LINUX_VERSION)
- 	PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage -f $(KDIR)/fit-$(1).its $(KDIR)/fit-$(1)$(7).itb
- endef
-diff --git a/scripts/mkits.sh b/scripts/mkits.sh
-index 3d68fdacbc..7533baf799 100755
---- a/scripts/mkits.sh
-+++ b/scripts/mkits.sh
-@@ -24,22 +24,29 @@ usage() {
- 	printf "\n\t-a ==> set load address to 'addr' (hex)"
- 	printf "\n\t-e ==> set entry point to 'entry' (hex)"
- 	printf "\n\t-f ==> set device tree compatible string"
-+	printf "\n\t-i ==> include initrd Blob 'initrd'"
- 	printf "\n\t-v ==> set kernel version to 'version'"
- 	printf "\n\t-k ==> include kernel image 'kernel'"
- 	printf "\n\t-D ==> human friendly Device Tree Blob 'name'"
- 	printf "\n\t-n ==> fdt unit-address 'address'"
- 	printf "\n\t-d ==> include Device Tree Blob 'dtb'"
--	printf "\n\t-r ==> include RootFS blob"
-+	printf "\n\t-r ==> include RootFS blob 'rootfs'"
- 	printf "\n\t-H ==> specify hash algo instead of SHA1"
--	printf "\n\t-o ==> create output file 'its_file'\n"
-+	printf "\n\t-o ==> create output file 'its_file'"
-+	printf "\n\t-O ==> create config with dt overlay 'name:dtb'"
-+	printf "\n\t\t(can be specified more than once)\n"
- 	exit 1
- }
- 
- FDTNUM=1
- ROOTFSNUM=1
-+INITRDNUM=1
- HASH=sha1
-+LOADABLES=
-+DTOVERLAY=
-+DTADDR=
- 
--while getopts ":A:a:c:C:D:d:e:f:k:n:o:v:r:S" OPTION
-+while getopts ":A:a:c:C:D:d:e:f:i:k:n:o:O:v:r:S" OPTION
- do
- 	case $OPTION in
- 		A ) ARCH=$OPTARG;;
-@@ -50,9 +57,11 @@ do
- 		d ) DTB=$OPTARG;;
- 		e ) ENTRY_ADDR=$OPTARG;;
- 		f ) COMPATIBLE=$OPTARG;;
-+		i ) INITRD=$OPTARG;;
- 		k ) KERNEL=$OPTARG;;
- 		n ) FDTNUM=$OPTARG;;
- 		o ) OUTPUT=$OPTARG;;
-+		O ) DTOVERLAY="$DTOVERLAY ${OPTARG}";;
- 		r ) ROOTFS=$OPTARG;;
- 		S ) HASH=$OPTARG;;
- 		v ) VERSION=$OPTARG;;
-@@ -74,14 +83,20 @@ if [ -n "${COMPATIBLE}" ]; then
- 	COMPATIBLE_PROP="compatible = \"${COMPATIBLE}\";"
- fi
- 
-+[ "$DTOVERLAY" ] && {
-+	dtbsize=$(wc -c "$DTB" | cut -d' ' -f1)
-+	DTADDR=$(printf "0x%08x" $(($LOAD_ADDR - $dtbsize)) )
-+}
-+
- # Conditionally create fdt information
- if [ -n "${DTB}" ]; then
- 	FDT_NODE="
--		fdt@$FDTNUM {
-+		fdt-$FDTNUM {
- 			description = \"${ARCH_UPPER} OpenWrt ${DEVICE} device tree blob\";
- 			${COMPATIBLE_PROP}
- 			data = /incbin/(\"${DTB}\");
- 			type = \"flat_dt\";
-+			${DTADDR:+load = <${DTADDR}>;}
- 			arch = \"${ARCH}\";
- 			compression = \"none\";
- 			hash@1 {
-@@ -92,13 +107,34 @@ if [ -n "${DTB}" ]; then
- 			};
- 		};
- "
--	FDT_PROP="fdt = \"fdt@$FDTNUM\";"
-+	FDT_PROP="fdt = \"fdt-$FDTNUM\";"
- fi
- 
-+if [ -n "${INITRD}" ]; then
-+	INITRD_NODE="
-+		initrd-$INITRDNUM {
-+			description = \"${ARCH_UPPER} OpenWrt ${DEVICE} initrd\";
-+			${COMPATIBLE_PROP}
-+			data = /incbin/(\"${INITRD}\");
-+			type = \"ramdisk\";
-+			arch = \"${ARCH}\";
-+			os = \"linux\";
-+			hash@1 {
-+				algo = \"crc32\";
-+			};
-+			hash@2 {
-+				algo = \"${HASH}\";
-+			};
-+		};
-+"
-+	INITRD_PROP="ramdisk=\"initrd-${INITRDNUM}\";"
-+fi
-+
-+
- if [ -n "${ROOTFS}" ]; then
- 	dd if="${ROOTFS}" of="${ROOTFS}.pagesync" bs=4096 conv=sync
- 	ROOTFS_NODE="
--		rootfs@$ROOTFSNUM {
-+		rootfs-$ROOTFSNUM {
- 			description = \"${ARCH_UPPER} OpenWrt ${DEVICE} rootfs\";
- 			${COMPATIBLE_PROP}
- 			data = /incbin/(\"${ROOTFS}.pagesync\");
-@@ -113,9 +149,50 @@ if [ -n "${ROOTFS}" ]; then
- 			};
- 		};
- "
--	ROOTFS_PROP="loadables = \"rootfs@${ROOTFSNUM}\";"
-+	LOADABLES="${LOADABLES:+$LOADABLES, }\"rootfs-${ROOTFSNUM}\""
- fi
- 
-+# add DT overlay blobs
-+FDTOVERLAY_NODE=""
-+OVCONFIGS=""
-+[ "$DTOVERLAY" ] && for overlay in $DTOVERLAY ; do
-+	overlay_blob=${overlay##*:}
-+	ovname=${overlay%%:*}
-+	ovnode="fdt-$ovname"
-+	ovsize=$(wc -c "$overlay_blob" | cut -d' ' -f1)
-+	echo "$ovname ($overlay_blob) : $ovsize" >&2
-+	DTADDR=$(printf "0x%08x" $(($DTADDR - $ovsize)))
-+	FDTOVERLAY_NODE="$FDTOVERLAY_NODE
-+
-+		$ovnode {
-+			description = \"${ARCH_UPPER} OpenWrt ${DEVICE} device tree overlay $ovname\";
-+			${COMPATIBLE_PROP}
-+			data = /incbin/(\"${overlay_blob}\");
-+			type = \"flat_dt\";
-+			arch = \"${ARCH}\";
-+			load = <${DTADDR}>;
-+			compression = \"none\";
-+			hash@1 {
-+				algo = \"crc32\";
-+			};
-+			hash@2 {
-+				algo = \"${HASH}\";
-+			};
-+		};
-+"
-+	OVCONFIGS="$OVCONFIGS
-+
-+		config-$ovname {
-+			description = \"OpenWrt ${DEVICE} with $ovname\";
-+			kernel = \"kernel-1\";
-+			fdt = \"fdt-$FDTNUM\", \"$ovnode\";
-+			${LOADABLES:+loadables = ${LOADABLES};}
-+			${COMPATIBLE_PROP}
-+			${INITRD_PROP}
-+		};
-+	"
-+done
-+
- # Create a default, fully populated DTS file
- DATA="/dts-v1/;
- 
-@@ -124,7 +201,7 @@ DATA="/dts-v1/;
- 	#address-cells = <1>;
- 
- 	images {
--		kernel@1 {
-+		kernel-1 {
- 			description = \"${ARCH_UPPER} OpenWrt Linux-${VERSION}\";
- 			data = /incbin/(\"${KERNEL}\");
- 			type = \"kernel\";
-@@ -140,7 +217,9 @@ DATA="/dts-v1/;
- 				algo = \"$HASH\";
- 			};
- 		};
-+${INITRD_NODE}
- ${FDT_NODE}
-+${FDTOVERLAY_NODE}
- ${ROOTFS_NODE}
- 	};
- 
-@@ -148,11 +227,13 @@ ${ROOTFS_NODE}
- 		default = \"${CONFIG}\";
- 		${CONFIG} {
- 			description = \"OpenWrt ${DEVICE}\";
--			kernel = \"kernel@1\";
-+			kernel = \"kernel-1\";
- 			${FDT_PROP}
--			${ROOTFS_PROP}
-+			${LOADABLES:+loadables = ${LOADABLES};}
- 			${COMPATIBLE_PROP}
-+			${INITRD_PROP}
- 		};
-+		${OVCONFIGS}
- 	};
- };"
- 
-diff --git a/target/linux/ipq40xx/image/Makefile b/target/linux/ipq40xx/image/Makefile
-index 2be262936f..a0d6242a28 100644
---- a/target/linux/ipq40xx/image/Makefile
-+++ b/target/linux/ipq40xx/image/Makefile
-@@ -8,6 +8,7 @@ define Device/Default
- 	KERNEL_PREFIX := $$(IMAGE_PREFIX)
- 	KERNEL_LOADADDR := 0x80208000
- 	DEVICE_DTS = $$(SOC)-$(lastword $(subst _, ,$(1)))
-+	DEVICE_DTS_CONFIG := config@1
- 	IMAGES := sysupgrade.bin
- 	IMAGE/sysupgrade.bin = sysupgrade-tar | append-metadata
- 	IMAGE/sysupgrade.bin/squashfs :=
-diff --git a/target/linux/ipq806x/image/Makefile b/target/linux/ipq806x/image/Makefile
-index bab1da0090..3bc60fa931 100644
---- a/target/linux/ipq806x/image/Makefile
-+++ b/target/linux/ipq806x/image/Makefile
-@@ -30,6 +30,7 @@ define Device/Default
- 	KERNEL_PREFIX := $$(IMAGE_PREFIX)
- 	KERNEL_LOADADDR = 0x42208000
- 	DEVICE_DTS = $$(SOC)-$(lastword $(subst _, ,$(1)))
-+	DEVICE_DTS_CONFIG := config@1
- 	IMAGES := sysupgrade.bin
- 	IMAGE/sysupgrade.bin = sysupgrade-tar | append-metadata
- 	IMAGE/sysupgrade.bin/squashfs :=
--- 
-2.25.1
-
diff --git a/patches/backports/0012-libubox-update-to-latest-HEAD.patch b/patches/backports/0012-libubox-update-to-latest-HEAD.patch
deleted file mode 100644
index 783c632aa..000000000
--- a/patches/backports/0012-libubox-update-to-latest-HEAD.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 4b7a8429c654dc7a3fc96c0042592793a09f667a Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Tue, 18 May 2021 10:46:43 +0200
-Subject: [PATCH 2/4] libubox: update to latest HEAD
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/libs/libubox/Makefile | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/package/libs/libubox/Makefile b/package/libs/libubox/Makefile
-index d2c07783e1..c112b49d0f 100644
---- a/package/libs/libubox/Makefile
-+++ b/package/libs/libubox/Makefile
-@@ -5,9 +5,9 @@ PKG_RELEASE=2
- 
- PKG_SOURCE_PROTO:=git
- PKG_SOURCE_URL=$(PROJECT_GIT)/project/libubox.git
--PKG_MIRROR_HASH:=7dd1db1e0074a9c7c722db654cce3111b3bd3cff0bfd791c4497cb0f6c22d3ca
--PKG_SOURCE_DATE:=2021-05-16
--PKG_SOURCE_VERSION:=b14c4688612c05c78ce984d7bde633bce8703b1e
-+PKG_MIRROR_HASH:=f9f9c631e8167597ce721c64a0023dae9e0f1b2cc37ae846a49984d535a3c480
-+PKG_SOURCE_DATE:=2023-07-05
-+PKG_SOURCE_VERSION:=75a3b870cace1171faf57bd55e5a9a2f1564f757
- PKG_ABI_VERSION:=$(call abi_version_str,$(PKG_SOURCE_DATE))
- CMAKE_INSTALL:=1
- 
-@@ -67,7 +67,7 @@ define Package/libubox-lua
- endef
- 
- TARGET_CFLAGS += -I$(STAGING_DIR)/usr/include
--CMAKE_OPTIONS = \
-+CMAKE_OPTIONS += \
- 	-DLUAPATH=/usr/lib/lua \
- 	-DABIVERSION="$(PKG_ABI_VERSION)"
- 
--- 
-2.25.1
-
diff --git a/patches/backports/0013-umdns-update-to-latest-HEAD.patch b/patches/backports/0013-umdns-update-to-latest-HEAD.patch
deleted file mode 100644
index 09811a936..000000000
--- a/patches/backports/0013-umdns-update-to-latest-HEAD.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 41db6b8282d09bd9d7ee453f54e592003904ab0e Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Wed, 30 Jun 2021 14:21:23 +0200
-Subject: [PATCH 13/27] umdns: update to latest HEAD
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/network/services/umdns/Makefile | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/package/network/services/umdns/Makefile b/package/network/services/umdns/Makefile
-index 9a5f46a705..908758e44b 100644
---- a/package/network/services/umdns/Makefile
-+++ b/package/network/services/umdns/Makefile
-@@ -12,9 +12,9 @@ PKG_RELEASE:=$(AUTORELEASE)
- 
- PKG_SOURCE_URL=$(PROJECT_GIT)/project/mdnsd.git
- PKG_SOURCE_PROTO:=git
--PKG_SOURCE_DATE:=2021-01-26
--PKG_SOURCE_VERSION:=78aa36b0e9808e801c527c6dc47320e593309522
--PKG_MIRROR_HASH:=241833f2bf2f3366f356703159be386862ef747d9b253af6c13555f252cc970d
-+PKG_SOURCE_DATE:=2021-06-30
-+PKG_SOURCE_VERSION:=4a8747193ab2b8f2d68a9d26334545e19d89cbe2
-+PKG_MIRROR_HASH:=bdddec2793303e4cc1a90cb2ed2241c04fdd0a736b6c0cbbb1fab9de5527566a
- 
- PKG_MAINTAINER:=John Crispin <john@phrozen.org>
- PKG_LICENSE:=LGPL-2.1
--- 
-2.25.1
-
diff --git a/patches/backports/0014-kernel-add-bdpu-filter-support.patch b/patches/backports/0014-kernel-add-bdpu-filter-support.patch
deleted file mode 100644
index bed48a7f1..000000000
--- a/patches/backports/0014-kernel-add-bdpu-filter-support.patch
+++ /dev/null
@@ -1,242 +0,0 @@
-From 9df1500bde8e609dcbbecbefa0eb5a29d9e6f7f5 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Fri, 27 Aug 2021 16:52:34 +0200
-Subject: [PATCH 14/27] kernel: add bdpu filter support
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- ...l-knob-for-filtering-rx-tx-BPDU-pack.patch | 107 ++++++++++++++++++
- ...l-knob-for-filtering-rx-tx-BPDU-pack.patch | 107 ++++++++++++++++++
- 2 files changed, 214 insertions(+)
- create mode 100644 target/linux/generic/pending-5.10/710-bridge-add-sysctl-knob-for-filtering-rx-tx-BPDU-pack.patch
- create mode 100644 target/linux/generic/pending-5.4/710-bridge-add-sysctl-knob-for-filtering-rx-tx-BPDU-pack.patch
-
-diff --git a/target/linux/generic/pending-5.10/710-bridge-add-sysctl-knob-for-filtering-rx-tx-BPDU-pack.patch b/target/linux/generic/pending-5.10/710-bridge-add-sysctl-knob-for-filtering-rx-tx-BPDU-pack.patch
-new file mode 100644
-index 0000000000..918ae05d12
---- /dev/null
-+++ b/target/linux/generic/pending-5.10/710-bridge-add-sysctl-knob-for-filtering-rx-tx-BPDU-pack.patch
-@@ -0,0 +1,107 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Fri, 27 Aug 2021 12:22:32 +0200
-+Subject: [PATCH] bridge: add sysctl knob for filtering rx/tx BPDU packets on a
-+ port
-+
-+Some devices (e.g. wireless APs) can't have devices behind them be part of
-+a bridge topology with redundant links, due to address limitations.
-+Additionally, broadcast traffic on these devices is somewhat expensive, due to
-+the low data rate and wakeups of clients in powersave mode.
-+This sysctl knob can be used to ensure that BPDU packets are never sent
-+or forwarded to/from these devices
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/include/linux/if_bridge.h
-++++ b/include/linux/if_bridge.h
-+@@ -56,6 +56,7 @@ struct br_ip_list {
-+ #define BR_MRP_AWARE		BIT(17)
-+ #define BR_MRP_LOST_CONT	BIT(18)
-+ #define BR_MRP_LOST_IN_CONT	BIT(19)
-++#define BR_BPDU_FILTER		BIT(20)
-+ 
-+ #define BR_DEFAULT_AGEING_TIME	(300 * HZ)
-+ 
-+--- a/net/bridge/br_forward.c
-++++ b/net/bridge/br_forward.c
-+@@ -191,6 +191,7 @@ out:
-+ void br_flood(struct net_bridge *br, struct sk_buff *skb,
-+ 	      enum br_pkt_type pkt_type, bool local_rcv, bool local_orig)
-+ {
-++	const unsigned char *dest = eth_hdr(skb)->h_dest;
-+ 	struct net_bridge_port *prev = NULL;
-+ 	struct net_bridge_port *p;
-+ 
-+@@ -206,6 +207,10 @@ void br_flood(struct net_bridge *br, str
-+ 		case BR_PKT_MULTICAST:
-+ 			if (!(p->flags & BR_MCAST_FLOOD) && skb->dev != br->dev)
-+ 				continue;
-++			if ((p->flags & BR_BPDU_FILTER) &&
-++			    unlikely(is_link_local_ether_addr(dest) &&
-++				     dest[5] == 0))
-++				continue;
-+ 			break;
-+ 		case BR_PKT_BROADCAST:
-+ 			if (!(p->flags & BR_BCAST_FLOOD) && skb->dev != br->dev)
-+--- a/net/bridge/br_input.c
-++++ b/net/bridge/br_input.c
-+@@ -305,6 +305,8 @@ static rx_handler_result_t br_handle_fra
-+ 		fwd_mask |= p->group_fwd_mask;
-+ 		switch (dest[5]) {
-+ 		case 0x00:	/* Bridge Group Address */
-++			if (p->flags & BR_BPDU_FILTER)
-++				goto drop;
-+ 			/* If STP is turned off,
-+ 			   then must forward to keep loop detection */
-+ 			if (p->br->stp_enabled == BR_NO_STP ||
-+--- a/net/bridge/br_sysfs_if.c
-++++ b/net/bridge/br_sysfs_if.c
-+@@ -233,6 +233,7 @@ BRPORT_ATTR_FLAG(multicast_flood, BR_MCA
-+ BRPORT_ATTR_FLAG(broadcast_flood, BR_BCAST_FLOOD);
-+ BRPORT_ATTR_FLAG(neigh_suppress, BR_NEIGH_SUPPRESS);
-+ BRPORT_ATTR_FLAG(isolated, BR_ISOLATED);
-++BRPORT_ATTR_FLAG(bpdu_filter, BR_BPDU_FILTER);
-+ 
-+ #ifdef CONFIG_BRIDGE_IGMP_SNOOPING
-+ static ssize_t show_multicast_router(struct net_bridge_port *p, char *buf)
-+@@ -285,6 +286,7 @@ static const struct brport_attribute *br
-+ 	&brport_attr_group_fwd_mask,
-+ 	&brport_attr_neigh_suppress,
-+ 	&brport_attr_isolated,
-++	&brport_attr_bpdu_filter,
-+ 	&brport_attr_backup_port,
-+ 	NULL
-+ };
-+--- a/net/bridge/br_stp_bpdu.c
-++++ b/net/bridge/br_stp_bpdu.c
-+@@ -80,7 +80,8 @@ void br_send_config_bpdu(struct net_brid
-+ {
-+ 	unsigned char buf[35];
-+ 
-+-	if (p->br->stp_enabled != BR_KERNEL_STP)
-++	if (p->br->stp_enabled != BR_KERNEL_STP ||
-++	    (p->flags & BR_BPDU_FILTER))
-+ 		return;
-+ 
-+ 	buf[0] = 0;
-+@@ -127,7 +128,8 @@ void br_send_tcn_bpdu(struct net_bridge_
-+ {
-+ 	unsigned char buf[4];
-+ 
-+-	if (p->br->stp_enabled != BR_KERNEL_STP)
-++	if (p->br->stp_enabled != BR_KERNEL_STP ||
-++	    (p->flags & BR_BPDU_FILTER))
-+ 		return;
-+ 
-+ 	buf[0] = 0;
-+@@ -172,6 +174,9 @@ void br_stp_rcv(const struct stp_proto *
-+ 	if (!(br->dev->flags & IFF_UP))
-+ 		goto out;
-+ 
-++	if (p->flags & BR_BPDU_FILTER)
-++		goto out;
-++
-+ 	if (p->state == BR_STATE_DISABLED)
-+ 		goto out;
-+ 
-diff --git a/target/linux/generic/pending-5.4/710-bridge-add-sysctl-knob-for-filtering-rx-tx-BPDU-pack.patch b/target/linux/generic/pending-5.4/710-bridge-add-sysctl-knob-for-filtering-rx-tx-BPDU-pack.patch
-new file mode 100644
-index 0000000000..586d264cd5
---- /dev/null
-+++ b/target/linux/generic/pending-5.4/710-bridge-add-sysctl-knob-for-filtering-rx-tx-BPDU-pack.patch
-@@ -0,0 +1,107 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Fri, 27 Aug 2021 12:22:32 +0200
-+Subject: [PATCH] bridge: add sysctl knob for filtering rx/tx BPDU packets on a
-+ port
-+
-+Some devices (e.g. wireless APs) can't have devices behind them be part of
-+a bridge topology with redundant links, due to address limitations.
-+Additionally, broadcast traffic on these devices is somewhat expensive, due to
-+the low data rate and wakeups of clients in powersave mode.
-+This sysctl knob can be used to ensure that BPDU packets are never sent
-+or forwarded to/from these devices
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/include/linux/if_bridge.h
-++++ b/include/linux/if_bridge.h
-+@@ -47,6 +47,7 @@ struct br_ip_list {
-+ #define BR_BCAST_FLOOD		BIT(14)
-+ #define BR_NEIGH_SUPPRESS	BIT(15)
-+ #define BR_ISOLATED		BIT(16)
-++#define BR_BPDU_FILTER		BIT(17)
-+ 
-+ #define BR_DEFAULT_AGEING_TIME	(300 * HZ)
-+ 
-+--- a/net/bridge/br_forward.c
-++++ b/net/bridge/br_forward.c
-+@@ -191,6 +191,7 @@ out:
-+ void br_flood(struct net_bridge *br, struct sk_buff *skb,
-+ 	      enum br_pkt_type pkt_type, bool local_rcv, bool local_orig)
-+ {
-++	const unsigned char *dest = eth_hdr(skb)->h_dest;
-+ 	struct net_bridge_port *prev = NULL;
-+ 	struct net_bridge_port *p;
-+ 
-+@@ -206,6 +207,10 @@ void br_flood(struct net_bridge *br, str
-+ 		case BR_PKT_MULTICAST:
-+ 			if (!(p->flags & BR_MCAST_FLOOD) && skb->dev != br->dev)
-+ 				continue;
-++			if ((p->flags & BR_BPDU_FILTER) &&
-++			    unlikely(is_link_local_ether_addr(dest) &&
-++				     dest[5] == 0))
-++				continue;
-+ 			break;
-+ 		case BR_PKT_BROADCAST:
-+ 			if (!(p->flags & BR_BCAST_FLOOD) && skb->dev != br->dev)
-+--- a/net/bridge/br_input.c
-++++ b/net/bridge/br_input.c
-+@@ -300,6 +300,8 @@ rx_handler_result_t br_handle_frame(stru
-+ 		fwd_mask |= p->group_fwd_mask;
-+ 		switch (dest[5]) {
-+ 		case 0x00:	/* Bridge Group Address */
-++			if (p->flags & BR_BPDU_FILTER)
-++				goto drop;
-+ 			/* If STP is turned off,
-+ 			   then must forward to keep loop detection */
-+ 			if (p->br->stp_enabled == BR_NO_STP ||
-+--- a/net/bridge/br_sysfs_if.c
-++++ b/net/bridge/br_sysfs_if.c
-+@@ -233,6 +233,7 @@ BRPORT_ATTR_FLAG(multicast_flood, BR_MCA
-+ BRPORT_ATTR_FLAG(broadcast_flood, BR_BCAST_FLOOD);
-+ BRPORT_ATTR_FLAG(neigh_suppress, BR_NEIGH_SUPPRESS);
-+ BRPORT_ATTR_FLAG(isolated, BR_ISOLATED);
-++BRPORT_ATTR_FLAG(bpdu_filter, BR_BPDU_FILTER);
-+ 
-+ #ifdef CONFIG_BRIDGE_IGMP_SNOOPING
-+ static ssize_t show_multicast_router(struct net_bridge_port *p, char *buf)
-+@@ -285,6 +286,7 @@ static const struct brport_attribute *br
-+ 	&brport_attr_group_fwd_mask,
-+ 	&brport_attr_neigh_suppress,
-+ 	&brport_attr_isolated,
-++	&brport_attr_bpdu_filter,
-+ 	&brport_attr_backup_port,
-+ 	NULL
-+ };
-+--- a/net/bridge/br_stp_bpdu.c
-++++ b/net/bridge/br_stp_bpdu.c
-+@@ -80,7 +80,8 @@ void br_send_config_bpdu(struct net_brid
-+ {
-+ 	unsigned char buf[35];
-+ 
-+-	if (p->br->stp_enabled != BR_KERNEL_STP)
-++	if (p->br->stp_enabled != BR_KERNEL_STP ||
-++	    (p->flags & BR_BPDU_FILTER))
-+ 		return;
-+ 
-+ 	buf[0] = 0;
-+@@ -125,7 +126,8 @@ void br_send_tcn_bpdu(struct net_bridge_
-+ {
-+ 	unsigned char buf[4];
-+ 
-+-	if (p->br->stp_enabled != BR_KERNEL_STP)
-++	if (p->br->stp_enabled != BR_KERNEL_STP ||
-++	    (p->flags & BR_BPDU_FILTER))
-+ 		return;
-+ 
-+ 	buf[0] = 0;
-+@@ -168,6 +170,9 @@ void br_stp_rcv(const struct stp_proto *
-+ 	if (!(br->dev->flags & IFF_UP))
-+ 		goto out;
-+ 
-++	if (p->flags & BR_BPDU_FILTER)
-++		goto out;
-++
-+ 	if (p->state == BR_STATE_DISABLED)
-+ 		goto out;
-+ 
--- 
-2.25.1
-
diff --git a/patches/backports/0015-uhttpd-add-config-option-for-json_script.patch b/patches/backports/0015-uhttpd-add-config-option-for-json_script.patch
deleted file mode 100644
index 02fbb177c..000000000
--- a/patches/backports/0015-uhttpd-add-config-option-for-json_script.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 8ba5feb6aaba50bda126db027490c7d37e428e3b Mon Sep 17 00:00:00 2001
-From: Stijn Tintel <stijn@linux-ipv6.be>
-Date: Fri, 20 Aug 2021 16:11:12 +0300
-Subject: [PATCH 15/27] uhttpd: add config option for json_script
-
-Add a config option for json_script instead of unconditionally including
-all json files in /etc/uhttpd in every uhttpd instance. This makes it
-possible to configure a single instance with an unconditional redirect,
-which is currently not possible as it would render all other uhttpd
-instances unusable.
-
-Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
----
- package/network/services/uhttpd/files/uhttpd.init | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/package/network/services/uhttpd/files/uhttpd.init b/package/network/services/uhttpd/files/uhttpd.init
-index 869f79bea2..7020912c6c 100755
---- a/package/network/services/uhttpd/files/uhttpd.init
-+++ b/package/network/services/uhttpd/files/uhttpd.init
-@@ -195,7 +195,8 @@ start_instance()
- 		append_bool "$cfg" redirect_https "-q" 0
- 	}
- 
--	for file in /etc/uhttpd/*.json; do
-+	config_get json_script "$cfg" json_script
-+	for file in $json_script; do
- 		[ -s "$file" ] && procd_append_param command -H "$file"
- 	done
- 
--- 
-2.25.1
-
diff --git a/patches/backports/0016-iwinfo-update-to-latest-git-HEAD.patch b/patches/backports/0016-iwinfo-update-to-latest-git-HEAD.patch
deleted file mode 100644
index a33b693b6..000000000
--- a/patches/backports/0016-iwinfo-update-to-latest-git-HEAD.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 63281b982b3692828ff453dcb9e68b8e43d628e5 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Mon, 21 Jun 2021 12:53:28 +0200
-Subject: [PATCH 16/27] iwinfo: update to latest git HEAD
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/network/utils/iwinfo/Makefile | 14 +++++++++++---
- 1 file changed, 11 insertions(+), 3 deletions(-)
-
-diff --git a/package/network/utils/iwinfo/Makefile b/package/network/utils/iwinfo/Makefile
-index 815c477988..d235f07da9 100644
---- a/package/network/utils/iwinfo/Makefile
-+++ b/package/network/utils/iwinfo/Makefile
-@@ -11,12 +11,20 @@ PKG_RELEASE:=2.1
- 
- PKG_SOURCE_PROTO:=git
- PKG_SOURCE_URL=$(PROJECT_GIT)/project/iwinfo.git
--PKG_SOURCE_DATE:=2021-04-30
--PKG_SOURCE_VERSION:=c45f0b584b4b86f8250f90ea19afca271c114fa2
--PKG_MIRROR_HASH:=24ad04791254a0523cd15a4fec6116d9ff121e006c93e5e41459f91347b33ec2
-+PKG_SOURCE_DATE:=2021-06-09
-+PKG_SOURCE_VERSION:=c0414642fead263a4a6a686ad3cb7e965ec8a23a
-+PKG_MIRROR_HASH:=c5686bbae86753c53db03a686b034bbb80d31107cc359ebd8522ea1c82db35ea
- PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
- PKG_LICENSE:=GPL-2.0
- 
-+PKG_FLAGS := nonshared
-+
-+PKG_CONFIG_DEPENDS := \
-+	CONFIG_PACKAGE_kmod-brcm-wl \
-+	CONFIG_PACKAGE_kmod-brcm-wl-mini \
-+	CONFIG_PACKAGE_kmod-brcm-wl-mimo \
-+	CONFIG_PACKAGE_kmod-cfg80211
-+
- IWINFO_ABI_VERSION:=20210430
- 
- include $(INCLUDE_DIR)/package.mk
--- 
-2.25.1
-
diff --git a/patches/backports/0017-netifd-update-to-latest-HEAD.patch b/patches/backports/0017-netifd-update-to-latest-HEAD.patch
deleted file mode 100644
index 58995de20..000000000
--- a/patches/backports/0017-netifd-update-to-latest-HEAD.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 9f1829135434aa08a15ada5b366707b4eb38ec41 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Thu, 27 May 2021 13:24:47 +0200
-Subject: [PATCH] netifd: update to latest HEAD
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/network/config/netifd/Makefile        |  8 +++----
- .../config/netifd/patches/100-script.patch    | 21 +++++++++++++++++++
- 2 files changed, 24 insertions(+), 5 deletions(-)
- create mode 100644 package/network/config/netifd/patches/100-script.patch
-
-diff --git a/package/network/config/netifd/Makefile b/package/network/config/netifd/Makefile
-index cd4f8f423d..4e7c99b5e6 100644
---- a/package/network/config/netifd/Makefile
-+++ b/package/network/config/netifd/Makefile
-@@ -5,16 +5,14 @@ PKG_RELEASE:=1
- 
- PKG_SOURCE_PROTO:=git
- PKG_SOURCE_URL=$(PROJECT_GIT)/project/netifd.git
--PKG_SOURCE_DATE:=2021-10-30
--PKG_SOURCE_VERSION:=8f82742ca4f47f459284f3a07323d04da72ea5f6
--PKG_MIRROR_HASH:=5e519bb1aec9bb30782213f32f19f12e874c909e42826618dd4332ded816d2fe
-+PKG_SOURCE_DATE:=2023-08-17
-+PKG_SOURCE_VERSION:=4711f74479e213ef86f8792b408b117d40148eb2
-+PKG_MIRROR_HASH:=91c8aa8e890b0616c1ad1860618951ee73655c4e53cc31999dcbb8d00b8b456d
- PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
- 
- PKG_LICENSE:=GPL-2.0
- PKG_LICENSE_FILES:=
- 
--PKG_BUILD_PARALLEL:=1
--
- include $(INCLUDE_DIR)/package.mk
- include $(INCLUDE_DIR)/cmake.mk
- 
-diff --git a/package/network/config/netifd/patches/100-script.patch b/package/network/config/netifd/patches/100-script.patch
-new file mode 100644
-index 0000000000..e7ba83f4bb
---- /dev/null
-+++ b/package/network/config/netifd/patches/100-script.patch
-@@ -0,0 +1,21 @@
-+Index: a/scripts/netifd-wireless.sh
-+===================================================================
-+--- a/scripts/netifd-wireless.sh
-++++ b/scripts/netifd-wireless.sh
-+@@ -252,11 +252,14 @@ wireless_vif_parse_encryption() {
-+ 			auth_type=owe
-+ 		;;
-+ 		wpa3-mixed*)
-+-			auth_type=eap-eap192
-++			auth_type=eap-eap256
-+ 		;;
-+-		wpa3*)
-++		wpa3-192*)
-+ 			auth_type=eap192
-+ 		;;
-++		wpa3*)
-++			auth_type=eap256
-++		;;
-+ 		psk3-mixed*|sae-mixed*)
-+ 			auth_type=psk-sae
-+ 		;;
--- 
-2.34.1
-
diff --git a/patches/backports/0020-procd-add-uxc-support.patch b/patches/backports/0020-procd-add-uxc-support.patch
deleted file mode 100644
index b10ff3d87..000000000
--- a/patches/backports/0020-procd-add-uxc-support.patch
+++ /dev/null
@@ -1,179 +0,0 @@
-From 006abf1773051ad355b52d70095f63f44a496b13 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Sun, 25 Jul 2021 13:32:37 +0200
-Subject: [PATCH 02/70] procd: add uxc support
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/system/procd/Makefile       | 15 +++---
- package/system/procd/files/procd.sh | 79 +++++++++++++++++++++++++++++
- package/system/procd/files/uxc.init |  4 ++
- 3 files changed, 90 insertions(+), 8 deletions(-)
-
-diff --git a/package/system/procd/Makefile b/package/system/procd/Makefile
-index 30d5adf427..b831f86639 100644
---- a/package/system/procd/Makefile
-+++ b/package/system/procd/Makefile
-@@ -12,9 +12,9 @@ PKG_RELEASE:=$(AUTORELEASE)
- 
- PKG_SOURCE_PROTO:=git
- PKG_SOURCE_URL=$(PROJECT_GIT)/project/procd.git
--PKG_SOURCE_DATE:=2021-02-23
--PKG_SOURCE_VERSION:=37eed131e9967a35f47bacb3437a9d3c8a57b3f4
--PKG_MIRROR_HASH:=2b0131ff9055ccf987cbeb5f36c2c2585dc780999df6be312fbbbcd61ce676d4
-+PKG_MIRROR_HASH:=0d51642d82d7bb4150355a6986e54504dce171c6fcb7eeff312d20a5d106bad8
-+PKG_SOURCE_DATE:=2021-11-04
-+PKG_SOURCE_VERSION:=0ee8e734a7f67220cf4a3412b60ff674b5fb20dd
- CMAKE_INSTALL:=1
- 
- PKG_LICENSE:=GPL-2.0
-@@ -32,7 +32,7 @@ include $(INCLUDE_DIR)/package.mk
- include $(INCLUDE_DIR)/cmake.mk
- 
- ifeq ($(DUMP),)
--  STAMP_CONFIGURED:=$(strip $(STAMP_CONFIGURED))_$(shell echo $(CONFIG_TARGET_INIT_PATH) | mkhash md5)
-+  STAMP_CONFIGURED:=$(strip $(STAMP_CONFIGURED))_$(shell echo $(CONFIG_TARGET_INIT_PATH) | $(MKHASH) md5)
- endif
- 
- CMAKE_OPTIONS += -DEARLY_PATH="$(TARGET_INIT_PATH)"
-@@ -68,7 +68,7 @@ define Package/procd-ujail
-   SECTION:=base
-   CATEGORY:=Base system
-   DEPENDS:=@KERNEL_NAMESPACES +@KERNEL_UTS_NS +@KERNEL_IPC_NS +@KERNEL_PID_NS \
--	  +libubox +libubus +libblobmsg-json
-+	  +libubox +libubus +libuci +libblobmsg-json
-   TITLE:=OpenWrt process jail helper
- endef
- 
-@@ -82,15 +82,14 @@ endef
- define Package/procd-seccomp
-   SECTION:=base
-   CATEGORY:=Base system
--  DEPENDS:=@(arm||armeb||mips||mipsel||i386||powerpc||x86_64) @!TARGET_uml \
--	  @KERNEL_SECCOMP +libubox +libblobmsg-json
-+  DEPENDS:=@SECCOMP +libubox +libblobmsg-json
-   TITLE:=OpenWrt process seccomp helper + utrace
- endef
- 
- define Package/uxc
-   SECTION:=base
-   CATEGORY:=Base system
--  DEPENDS:=+procd-ujail +libubus +libubox +libblobmsg-json
-+  DEPENDS:=+procd-ujail +libubus +libubox +libblobmsg-json +blockd +PACKAGE_uxc:rpcd
-   TITLE:=OpenWrt container management
-   MAINTAINER:=Daniel Golle <daniel@makrotopia.org>
- endef
-diff --git a/package/system/procd/files/procd.sh b/package/system/procd/files/procd.sh
-index d86b7219da..3549a5a914 100644
---- a/package/system/procd/files/procd.sh
-+++ b/package/system/procd/files/procd.sh
-@@ -329,6 +329,82 @@ _procd_add_config_trigger() {
- 	json_close_array
- }
- 
-+_procd_add_mount_trigger() {
-+	json_add_array
-+	_procd_add_array_data "$1"
-+	local action="$2"
-+	local multi=0
-+	shift ; shift
-+
-+	json_add_array
-+	_procd_add_array_data "if"
-+
-+	if [ "$2" ]; then
-+		json_add_array
-+		_procd_add_array_data "or"
-+		multi=1
-+	fi
-+
-+	while [ "$1" ]; do
-+		json_add_array
-+		_procd_add_array_data "eq" "target" "$1"
-+		shift
-+		json_close_array
-+	done
-+
-+	[ $multi = 1 ] && json_close_array
-+
-+	json_add_array
-+	_procd_add_array_data "run_script" /etc/init.d/$name $action
-+	json_close_array
-+
-+	json_close_array
-+	_procd_add_timeout
-+	json_close_array
-+}
-+
-+_procd_add_action_mount_trigger() {
-+	local script=$(readlink "$initscript")
-+	local name=$(basename ${script:-$initscript})
-+	local action="$1"
-+	local mpath
-+	shift
-+
-+	_procd_open_trigger
-+	_procd_add_mount_trigger mount.add $action "$@"
-+	_procd_close_trigger
-+}
-+
-+procd_get_mountpoints() {
-+	(
-+		__procd_check_mount() {
-+			local cfg="$1"
-+			local path="${2%%/}/"
-+			local target
-+			config_get target "$cfg" target
-+			target="${target%%/}/"
-+			[ "$path" != "${path##$target}" ] && echo "${target%%/}"
-+		}
-+
-+		config_load fstab
-+		for mpath in "$@"; do
-+			config_foreach __procd_check_mount mount "$mpath"
-+		done
-+	) | sort -u
-+}
-+
-+_procd_add_restart_mount_trigger() {
-+	local mountpoints="$(procd_get_mountpoints "$@")"
-+	[ "${mountpoints//[[:space:]]}" ] &&
-+		_procd_add_action_mount_trigger restart $mountpoints
-+}
-+
-+_procd_add_reload_mount_trigger() {
-+	local mountpoints="$(procd_get_mountpoints "$@")"
-+	[ "${mountpoints//[[:space:]]}" ] &&
-+		_procd_add_action_mount_trigger reload $mountpoints
-+}
-+
- _procd_add_raw_trigger() {
- 	json_add_array
- 	_procd_add_array_data "$1"
-@@ -560,8 +636,11 @@ _procd_wrapper \
- 	procd_add_raw_trigger \
- 	procd_add_config_trigger \
- 	procd_add_interface_trigger \
-+	procd_add_mount_trigger \
- 	procd_add_reload_trigger \
- 	procd_add_reload_interface_trigger \
-+	procd_add_reload_mount_trigger \
-+	procd_add_restart_mount_trigger \
- 	procd_open_trigger \
- 	procd_close_trigger \
- 	procd_open_instance \
-diff --git a/package/system/procd/files/uxc.init b/package/system/procd/files/uxc.init
-index 035c8b0b9e..1e75b796f8 100644
---- a/package/system/procd/files/uxc.init
-+++ b/package/system/procd/files/uxc.init
-@@ -16,3 +16,7 @@ boot() {
- 	__BOOT_UXC=1
- 	start
- }
-+
-+service_triggers() {
-+	procd_add_raw_trigger "mount.add" 3000 /etc/init.d/uxc boot
-+}
--- 
-2.25.1
-
diff --git a/patches/backports/0021-build-create-APK-files-parrallel-to-IPK.patch b/patches/backports/0021-build-create-APK-files-parrallel-to-IPK.patch
deleted file mode 100644
index 55688dc7f..000000000
--- a/patches/backports/0021-build-create-APK-files-parrallel-to-IPK.patch
+++ /dev/null
@@ -1,174 +0,0 @@
-From 23c15e2536d0fa5ed81c5bdfe7623d3370dca997 Mon Sep 17 00:00:00 2001
-From: Paul Spooren <mail@aparcar.org>
-Date: Fri, 2 Oct 2020 23:30:30 -1000
-Subject: [PATCH 21/27] build: create APK files parrallel to IPK
-
-Create APK files based on the folder and control files of IPK packages.
-
-Signed-off-by: Paul Spooren <mail@aparcar.org>
----
- include/package-ipkg.mk     | 48 +++++++++++++++++++++++++------------
- package/Makefile            |  2 ++
- package/base-files/Makefile |  4 ++++
- rules.mk                    |  2 ++
- scripts/apk-make-index.sh   | 20 ++++++++++++++++
- 5 files changed, 61 insertions(+), 15 deletions(-)
- create mode 100755 scripts/apk-make-index.sh
-
-diff --git a/include/package-ipkg.mk b/include/package-ipkg.mk
-index e972b7de0b..5c31b1774f 100644
---- a/include/package-ipkg.mk
-+++ b/include/package-ipkg.mk
-@@ -102,6 +102,7 @@ ifeq ($(DUMP),)
-     ABIV_$(1):=$(call FormatABISuffix,$(1),$(ABI_VERSION))
-     PDIR_$(1):=$(call FeedPackageDir,$(1))
-     IPKG_$(1):=$$(PDIR_$(1))/$(1)$$(ABIV_$(1))_$(VERSION)_$(PKGARCH).ipk
-+    APK_$(1):=$$(PDIR_$(1))/$(1)$$(ABIV_$(1))_$(VERSION)_$(PKGARCH).apk
-     IDIR_$(1):=$(PKG_BUILD_DIR)/ipkg-$(PKGARCH)/$(1)
-     KEEP_$(1):=$(strip $(call Package/$(1)/conffiles))
- 
-@@ -200,7 +201,7 @@ $(_endef)
-     $(PKG_INFO_DIR)/$(1).provides $$(IPKG_$(1)): $(STAMP_BUILT) $(INCLUDE_DIR)/package-ipkg.mk
- 	@rm -rf $$(IDIR_$(1)); \
- 		$$(call remove_ipkg_files,$(1),$$(call opkg_package_files,$(call gen_ipkg_wildcard,$(1))))
--	mkdir -p $(PACKAGE_DIR) $$(IDIR_$(1))/CONTROL $(PKG_INFO_DIR)
-+	mkdir -p $(PACKAGE_DIR) $$(IDIR_$(1)) $(PKG_INFO_DIR)
- 	$(call Package/$(1)/install,$$(IDIR_$(1)))
- 	$(if $(Package/$(1)/install-overlay),mkdir -p $(PACKAGE_DIR) $$(IDIR_$(1))/rootfs-overlay)
- 	$(call Package/$(1)/install-overlay,$$(IDIR_$(1))/rootfs-overlay)
-@@ -226,6 +227,37 @@ $(_endef)
- 		) || true \
- 	)
-     endif
-+
-+    ifneq ($$(KEEP_$(1)),)
-+		@( \
-+			keepfiles=""; \
-+			for x in $$(KEEP_$(1)); do \
-+				[ -f "$$(IDIR_$(1))/$$$$x" ] || keepfiles="$$$${keepfiles:+$$$$keepfiles }$$$$x"; \
-+			done; \
-+			[ -z "$$$$keepfiles" ] || { \
-+				mkdir -p $$(IDIR_$(1))/lib/upgrade/keep.d; \
-+				for x in $$$$keepfiles; do echo $$$$x >> $$(IDIR_$(1))/lib/upgrade/keep.d/$(1); done; \
-+			}; \
-+		)
-+    endif
-+
-+	$(INSTALL_DIR) $$(PDIR_$(1))
-+
-+	$(FAKEROOT) apk mkpkg \
-+	  --info "name:$(1)" \
-+	  --info "version:$(VERSION)" \
-+	  --info "description:$()" \
-+	  --info "arch:$(PKGARCH)" \
-+	  --info "license:$(LICENSE)" \
-+	  --info "origin:$(SOURCE)" \
-+	  --info "maintainer:$(MAINTAINER)" \
-+	  $$(foreach dep,$$(Package/$(1)/DEPENDS),--info "depends:$$(subst $$(comma),,$$(dep))") \
-+	  --files "$$(IDIR_$(1))" \
-+	  --output "$$(APK_$(1))" \
-+	  --sign "$(BUILD_KEY_APK_SEC)"
-+
-+	mkdir -p $$(IDIR_$(1))/CONTROL
-+
- 	(cd $$(IDIR_$(1))/CONTROL; \
- 		( \
- 			echo "$$$$CONTROL"; \
-@@ -249,20 +281,6 @@ $(_endef)
- 		$($(1)_COMMANDS) \
- 	)
- 
--    ifneq ($$(KEEP_$(1)),)
--		@( \
--			keepfiles=""; \
--			for x in $$(KEEP_$(1)); do \
--				[ -f "$$(IDIR_$(1))/$$$$x" ] || keepfiles="$$$${keepfiles:+$$$$keepfiles }$$$$x"; \
--			done; \
--			[ -z "$$$$keepfiles" ] || { \
--				mkdir -p $$(IDIR_$(1))/lib/upgrade/keep.d; \
--				for x in $$$$keepfiles; do echo $$$$x >> $$(IDIR_$(1))/lib/upgrade/keep.d/$(1); done; \
--			}; \
--		)
--    endif
--
--	$(INSTALL_DIR) $$(PDIR_$(1))
- 	$(FAKEROOT) $(SCRIPT_DIR)/ipkg-build -m "$(FILE_MODES)" $$(IDIR_$(1)) $$(PDIR_$(1))
- 	@[ -f $$(IPKG_$(1)) ]
- 
-diff --git a/package/Makefile b/package/Makefile
-index ec503dc527..18a19fff13 100644
---- a/package/Makefile
-+++ b/package/Makefile
-@@ -60,6 +60,7 @@ $(curdir)/merge-index: $(curdir)/merge
- 
- ifndef SDK
-   $(curdir)/compile: $(curdir)/system/opkg/host/compile
-+  $(patsubst %,$(curdir)/%/compile,$(filter-out %/apk/host,$($(curdir)/builddirs))): $(curdir)/system/apk/host/compile
- endif
- 
- $(curdir)/install: $(TMP_DIR)/.build $(curdir)/merge $(if $(CONFIG_TARGET_PER_DEVICE_ROOTFS),$(curdir)/merge-index)
-@@ -84,6 +85,7 @@ $(curdir)/index: FORCE
- 	@for d in $(PACKAGE_SUBDIRS); do ( \
- 		mkdir -p $$d; \
- 		cd $$d || continue; \
-+		$(SCRIPT_DIR)/apk-make-index.sh . 2>&1; \
- 		$(SCRIPT_DIR)/ipkg-make-index.sh . 2>&1 > Packages.manifest; \
- 		grep -vE '^(Maintainer|LicenseFiles|Source|SourceName|Require|SourceDateEpoch)' Packages.manifest > Packages; \
- 		case "$$(((64 + $$(stat -L -c%s Packages)) % 128))" in 110|111) \
-diff --git a/package/base-files/Makefile b/package/base-files/Makefile
-index 8a1ddf96f5..9db4812981 100644
---- a/package/base-files/Makefile
-+++ b/package/base-files/Makefile
-@@ -107,6 +107,10 @@ ifdef CONFIG_SIGNED_PACKAGES
- 	[ -s $(BUILD_KEY).ucert ] || \
- 		$(STAGING_DIR_HOST)/bin/ucert -I -c $(BUILD_KEY).ucert -p $(BUILD_KEY).pub -s $(BUILD_KEY)
- 
-+	[ -s $(BUILD_KEY_APK_SEC) -a -s $(BUILD_KEY_APK_PUB) ] || \
-+		openssl ecparam -name prime256v1 -genkey -noout -out $(BUILD_KEY_APK_SEC); \
-+		openssl ec -in $(BUILD_KEY_APK_SEC) -pubout > $(BUILD_KEY_APK_PUB)
-+
-   endef
- 
- ifndef CONFIG_BUILDBOT
-diff --git a/rules.mk b/rules.mk
-index f31d9bb113..de81b65d46 100644
---- a/rules.mk
-+++ b/rules.mk
-@@ -258,6 +258,8 @@ else
- endif
- 
- BUILD_KEY=$(TOPDIR)/key-build
-+BUILD_KEY_APK_SEC=$(TOPDIR)/private-key.pem
-+BUILD_KEY_APK_PUB=$(TOPDIR)/public-key.pem
- 
- FAKEROOT:=$(STAGING_DIR_HOST)/bin/fakeroot
- 
-diff --git a/scripts/apk-make-index.sh b/scripts/apk-make-index.sh
-new file mode 100755
-index 0000000000..df1f1a2e2b
---- /dev/null
-+++ b/scripts/apk-make-index.sh
-@@ -0,0 +1,20 @@
-+#!/usr/bin/env bash
-+set -e
-+
-+pkg_dir=$1
-+
-+if [ -z "$pkg_dir" ] || [ ! -d "$pkg_dir" ]; then
-+	echo "Usage: apk-make-index <package_directory>" >&2
-+	exit 1
-+fi
-+
-+(
-+	cd "$pkg_dir" || exit 1
-+	GLOBIGNORE="kernel*:libc*"
-+	set -- *.apk
-+	if [ "$1" = '*.apk' ]; then
-+		echo "No APK packages found"
-+	fi
-+	apk index --output APKINDEX.tar.gz "$@"
-+	unset GLOBIGNORE
-+)
--- 
-2.25.1
-
diff --git a/patches/backports/0022-fstools-update-to-git-HEAD.patch b/patches/backports/0022-fstools-update-to-git-HEAD.patch
deleted file mode 100644
index 54be4da02..000000000
--- a/patches/backports/0022-fstools-update-to-git-HEAD.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From 8e8b3e443a7f1d0644f43888c8683698f26d4d13 Mon Sep 17 00:00:00 2001
-From: Daniel Golle <daniel@makrotopia.org>
-Date: Sun, 25 Jul 2021 01:20:31 +0100
-Subject: [PATCH 22/27] fstools: update to git HEAD
-
- bad1835 fstools: add partname volume driver
- 19d7d93 libfstools: partname: several fixes
- 3c38f0c libfstools: fix build with glibc
- d05ad93 libfstools: remove superflus include
- 964d1e3 partname: allow skipping existing 'rootfs_data' partition
- c44b40b overlay: fix syncronizing typo
- b5397a1 fstools: block: fix segfault on mount with no target
- bd7cc8d block: use dynamically allocated target string
- 6d8450e blockd: use allocated strings instead of fixed buffers
- d47909e libblkid-tiny: fix buffer overflow
- 67d2297 block: match device path instead of assuming /dev/%s
- 2aeba88 block: allow autofs and umount commands also on MTD/UBI
- 3d40a1b blockd: add missing #define _GNU_SOURCE
- 4d4dcfb blockd: detect mountpoint of /dev/mapper/*
- 2f42515 block: resolve /dev/mapper/* name for /dev/dm-0 when hotplugging
- 39558a1 blockd: also send ubus notification on mount hotplug
- 3386b6b blockd: fix trigger name
- cdc9939 blockd: move to its own POSIX process group
- 59f7c11 blockd: create mountpoint parent folder if needed
- 9cc96af Revert "block: resolve /dev/mapper/* name for /dev/dm-0 when hotplugging"
- 06334ac Revert "blockd: detect mountpoint of /dev/mapper/*"
- 9ab3551 block: use /dev/dm-* instead of /dev/mapper/*
- 5114595 block: allow remove hotplug event to arrive at blockd
- a846c6b blockd: fix length of timeout int passed to ioctl
- 1d681ca block: support umount device basename
-
-Signed-off-by: Daniel Golle <daniel@makrotopia.org>
----
- package/system/fstools/Makefile          | 6 +++---
- package/system/fstools/files/blockd.init | 1 +
- 2 files changed, 4 insertions(+), 3 deletions(-)
-
-diff --git a/package/system/fstools/Makefile b/package/system/fstools/Makefile
-index 2da508d541..b582a17bae 100644
---- a/package/system/fstools/Makefile
-+++ b/package/system/fstools/Makefile
-@@ -12,9 +12,9 @@ PKG_RELEASE:=1
- 
- PKG_SOURCE_PROTO:=git
- PKG_SOURCE_URL=$(PROJECT_GIT)/project/fstools.git
--PKG_MIRROR_HASH:=a485792d90c71cd4fb396ce97f42a57ee4d2a3d78e5f3fd0748270ffb14209e6
--PKG_SOURCE_DATE:=2021-01-04
--PKG_SOURCE_VERSION:=c53b18820756f6f32ad0782d3bf489422b7c4ad3
-+PKG_MIRROR_HASH:=6a457b812166e04e2244ee1be92a4957666b5d1554315c0e18db1b30376cc617
-+PKG_SOURCE_DATE:=2021-07-28
-+PKG_SOURCE_VERSION:=cc63933faedd8d4fcdabb872cf4661ac04fe4ba2
- CMAKE_INSTALL:=1
- 
- PKG_LICENSE:=GPL-2.0
-diff --git a/package/system/fstools/files/blockd.init b/package/system/fstools/files/blockd.init
-index a4ce57d40d..bdd8bbf622 100755
---- a/package/system/fstools/files/blockd.init
-+++ b/package/system/fstools/files/blockd.init
-@@ -16,6 +16,7 @@ reload_service() {
- start_service() {
- 	procd_open_instance
- 	procd_set_param command "$PROG"
-+	procd_set_param watch block
- 	procd_set_param respawn
- 	procd_close_instance
- }
--- 
-2.25.1
-
diff --git a/patches/backports/0023-tools-libressl-update-to-3.3.3.patch b/patches/backports/0023-tools-libressl-update-to-3.3.3.patch
deleted file mode 100644
index f6235c360..000000000
--- a/patches/backports/0023-tools-libressl-update-to-3.3.3.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 873052b99d6597209957ec32898fa56324cf34a4 Mon Sep 17 00:00:00 2001
-From: Rosen Penev <rosenp@gmail.com>
-Date: Sat, 19 Jun 2021 14:45:11 -0700
-Subject: [PATCH 23/27] tools/libressl: update to 3.3.3
-
-Fix wrong FPIC variable usage. Fixes compilation under sparc64 host.
-
-Signed-off-by: Rosen Penev <rosenp@gmail.com>
-(cherry picked from commit bf4dbbb55e2b8e23f186e1334f1e9ce6a3a8ddfe)
----
- tools/libressl/Makefile | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/tools/libressl/Makefile b/tools/libressl/Makefile
-index 2b5a33450c..e25b5661ee 100644
---- a/tools/libressl/Makefile
-+++ b/tools/libressl/Makefile
-@@ -8,8 +8,8 @@
- include $(TOPDIR)/rules.mk
- 
- PKG_NAME:=libressl
--PKG_VERSION:=3.3.1
--PKG_HASH:=a6d331865e0164a13ac85a228e52517f7cf8f8488f2f95f34e7857302f97cfdb
-+PKG_VERSION:=3.3.3
-+PKG_HASH:=a471565b36ccd1a70d0bd7d37c6e95c43a26a62829b487d9d2cdebfe58be3066
- PKG_RELEASE:=1
- 
- PKG_CPE_ID:=cpe:/a:openbsd:libressl
-@@ -25,7 +25,7 @@ include $(INCLUDE_DIR)/host-build.mk
- 
- HOSTCC := $(HOSTCC_NOCACHE)
- HOST_CONFIGURE_ARGS += --enable-static --disable-shared --disable-tests
--HOST_CFLAGS += $(FPIC)
-+HOST_CFLAGS += $(HOST_FPIC)
- 
- ifeq ($(GNU_HOST_NAME),x86_64-linux-gnux32)
- HOST_CONFIGURE_ARGS += --disable-asm
--- 
-2.25.1
-
diff --git a/patches/backports/0024-uvol-backport-package.patch b/patches/backports/0024-uvol-backport-package.patch
deleted file mode 100644
index 1d153f61a..000000000
--- a/patches/backports/0024-uvol-backport-package.patch
+++ /dev/null
@@ -1,1272 +0,0 @@
-From 813b09542fd13428d432e47eecd7191d1b3067fd Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Fri, 13 Aug 2021 08:46:57 +0200
-Subject: [PATCH 01/83] uvol: backport package
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/system/uvol/Makefile                |  77 ++++
- package/system/uvol/files/autopart.defaults | 127 ++++++
- package/system/uvol/files/common.sh         |  83 ++++
- package/system/uvol/files/lvm.sh            | 459 ++++++++++++++++++++
- package/system/uvol/files/ubi.sh            | 358 +++++++++++++++
- package/system/uvol/files/uvol              |  52 +++
- package/system/uvol/files/uvol.defaults     |  17 +
- package/system/uvol/files/uvol.init         |  23 +
- 8 files changed, 1196 insertions(+)
- create mode 100644 package/system/uvol/Makefile
- create mode 100644 package/system/uvol/files/autopart.defaults
- create mode 100644 package/system/uvol/files/common.sh
- create mode 100644 package/system/uvol/files/lvm.sh
- create mode 100644 package/system/uvol/files/ubi.sh
- create mode 100644 package/system/uvol/files/uvol
- create mode 100644 package/system/uvol/files/uvol.defaults
- create mode 100644 package/system/uvol/files/uvol.init
-
-diff --git a/package/system/uvol/Makefile b/package/system/uvol/Makefile
-new file mode 100644
-index 0000000000..6583e6e756
---- /dev/null
-+++ b/package/system/uvol/Makefile
-@@ -0,0 +1,77 @@
-+include $(TOPDIR)/rules.mk
-+
-+PKG_NAME:=uvol
-+PKG_VERSION:=0.6
-+PKG_RELEASE:=$(AUTORELEASE)
-+
-+PKG_MAINTAINER:=Daniel Golle <daniel@makrotopia.org>
-+PKG_LICENSE:=GPL-2.0-or-later
-+
-+include $(INCLUDE_DIR)/package.mk
-+
-+define Package/autopart
-+  SECTION:=utils
-+  CATEGORY:=Utilities
-+  SUBMENU:=Disc
-+  TITLE:=Automatically initialize LVM partition
-+  DEPENDS:=+lvm2 +partx-utils +sfdisk
-+  PKGARCH=all
-+endef
-+
-+define Package/autopart/description
-+ Automatically allocate the GPT partition for LVM and initialize it
-+ on first boot.
-+endef
-+
-+define Package/uvol
-+  SECTION:=utils
-+  CATEGORY:=Utilities
-+  SUBMENU:=Disc
-+  TITLE:=OpenWrt UBI/LVM volume abstraction
-+  DEPENDS:=+blockd
-+  PKGARCH=all
-+endef
-+
-+define Package/uvol/description
-+  'uvol' is tool to automate storage volume handling on embedded
-+  devices in a generic way.
-+  Also install the 'autopart' package to easily make use of 'uvol' on
-+  block-storage based devices.
-+
-+  Examples:
-+  uvol create example_volume_1 256MiB rw
-+  uvol up example_volume_1
-+  uvol device example_volume_1
-+
-+  uvol create example_volume_2 9812733 ro
-+  cat example_volume_2.squashfs | uvol write example_volume_2 9812733
-+  uvol up example_volume_2
-+  uvol device example_volume_2
-+endef
-+
-+define Build/Prepare
-+endef
-+
-+define Build/Configure
-+endef
-+
-+define Build/Compile
-+endef
-+
-+define Package/autopart/install
-+	$(INSTALL_DIR) $(1)/etc/uci-defaults
-+	$(INSTALL_BIN) ./files/autopart.defaults $(1)/etc/uci-defaults/30-autopart
-+endef
-+
-+define Package/uvol/install
-+	$(INSTALL_DIR) $(1)/etc/init.d $(1)/usr/libexec/uvol $(1)/usr/sbin $(1)/lib/functions $(1)/etc/uci-defaults
-+	$(INSTALL_BIN) ./files/uvol.init $(1)/etc/init.d/uvol
-+	$(INSTALL_BIN) ./files/common.sh $(1)/lib/functions/uvol.sh
-+	$(INSTALL_BIN) ./files/ubi.sh $(1)/usr/libexec/uvol/20-ubi.sh
-+	$(INSTALL_BIN) ./files/lvm.sh $(1)/usr/libexec/uvol/50-lvm.sh
-+	$(INSTALL_BIN) ./files/uvol $(1)/usr/sbin
-+	$(INSTALL_BIN) ./files/uvol.defaults $(1)/etc/uci-defaults/90-uvol-init
-+endef
-+
-+$(eval $(call BuildPackage,autopart))
-+$(eval $(call BuildPackage,uvol))
-diff --git a/package/system/uvol/files/autopart.defaults b/package/system/uvol/files/autopart.defaults
-new file mode 100644
-index 0000000000..870cd44156
---- /dev/null
-+++ b/package/system/uvol/files/autopart.defaults
-@@ -0,0 +1,127 @@
-+#!/bin/sh
-+
-+. /lib/functions.sh
-+. /lib/upgrade/common.sh
-+. /usr/share/libubox/jshn.sh
-+
-+OWRT_VOLUMES=owrt-volumes
-+
-+load_partitions() {
-+	local dev="$1"
-+	json_init
-+	json_load "$(sfdisk -J "$dev" 2>/dev/null)"
-+	json_select "partitiontable" || return 1
-+	return 0
-+}
-+
-+get_partition_by_name_gpt() {
-+	local label part parts node name
-+	json_get_vars label
-+	[ "$label" = "gpt" ] || return
-+	json_select "partitions" || return
-+	json_get_keys parts
-+	for part in $parts; do
-+		json_select "$part"
-+		json_get_vars node name
-+		if [ "$1" = "$name" ]; then
-+			echo "$node"
-+			break
-+		fi
-+		json_select ..
-+	done
-+	json_select ..
-+}
-+
-+get_partition_by_type_mbr() {
-+	local label part parts node type
-+	json_get_vars label
-+	[ "$label" = "dos" ] || return
-+	json_select "partitions" || return
-+	json_get_keys parts
-+	for part in $parts; do
-+		json_select "$part"
-+		json_get_vars node type
-+		if [ "$1" = "$type" ]; then
-+			echo "$node"
-+			break
-+		fi
-+		json_select ..
-+	done
-+	json_select ..
-+}
-+
-+part_fixup() {
-+	echo "write" | sfdisk --force -q -w never "$1" 1>/dev/null 2>/dev/null
-+}
-+
-+get_free_area() {
-+	local found=
-+	sfdisk -q -F "$1" 2>/dev/null | while read -r start end sectors size; do
-+		case $start in
-+		*"Unpartitioned"* | *"Units:"* | *"Sector"* | *"Start"* )
-+			continue
-+			;;
-+		[0-9]*)
-+			case "$size" in
-+				*"M")
-+					[ "${size%%M}" -lt 100 ] && continue
-+					;;
-+				*"G" | *"T")
-+					;;
-+				*"k" | *"b")
-+					continue
-+					;;
-+			esac
-+			[ "$found" ] || echo "start=$start, size=$((end - start))"
-+			found=1
-+			;;
-+		esac
-+	done
-+}
-+
-+create_lvm_part() {
-+	local disk="$1"
-+	local freepart
-+
-+	freepart="$(get_free_area "$disk")"
-+	if [ "$freepart" ]; then
-+		echo "$freepart, type=lvm, name=$OWRT_VOLUMES" | sfdisk --force -w never -a "$disk" || return 1
-+		partx -a "$disk" 1>/dev/null 2>/dev/null || true
-+		return 0
-+	else
-+		return 1
-+	fi
-+}
-+
-+lvm_init() {
-+	lvm pvcreate -f "$1"
-+	lvm vgcreate "$2" "$1"
-+	lvm vgs
-+}
-+
-+autopart_init() {
-+	local diskdev
-+	local lvmpart
-+	local diskserial diskhash
-+
-+	export_bootdevice && export_partdevice diskdev 0
-+
-+	[ "$diskdev" ] || return
-+
-+	[ -e "/sys/class/block/$diskdev/device/serial" ] && diskserial="$(cat "/sys/class/block/$diskdev/device/serial")"
-+	[ -e "/sys/class/block/$diskdev/device/cid" ] && diskserial="$diskserial$(cat "/sys/class/block/$diskdev/device/cid")"
-+	[ "$diskserial" ] || diskserial="$(cat /proc/sys/kernel/random/uuid)"
-+	diskhash="$(echo "$diskserial" | sha256sum | cut -d' ' -f1)"
-+
-+	part_fixup "/dev/$diskdev"
-+	create_lvm_part "/dev/$diskdev" || return
-+	load_partitions "/dev/$diskdev" || return
-+	lvmpart="$(get_partition_by_name_gpt "$OWRT_VOLUMES")"
-+	[ "$lvmpart" ] || lvmpart="$(get_partition_by_type_mbr "8e")"
-+	[ "$lvmpart" ] || return
-+
-+	lvm_init "$lvmpart" "${OWRT_VOLUMES}-${diskhash:0:16}"
-+}
-+
-+autopart_init
-+exit 0
-diff --git a/package/system/uvol/files/common.sh b/package/system/uvol/files/common.sh
-new file mode 100644
-index 0000000000..8306477720
---- /dev/null
-+++ b/package/system/uvol/files/common.sh
-@@ -0,0 +1,83 @@
-+#!/bin/sh
-+
-+UCI_SPOOLDIR="/var/spool/uvol"
-+
-+_uvol_init_spooldir() {
-+	[ ! -d "$(dirname "$UCI_SPOOLDIR")" ] && mkdir -p "$(dirname "$UCI_SPOOLDIR")"
-+	mkdir -m 0700 -p "$UCI_SPOOLDIR"
-+}
-+
-+uvol_uci_add() {
-+	local volname="$1"
-+	local devname="$2"
-+	local mode="$3"
-+	local autofs=0
-+	local target="/var/run/uvol/$volname"
-+	local uuid uciname
-+
-+	[ "$mode" = "ro" ] && autofs=1
-+	uciname="${volname//[-.]/_}"
-+	uciname="${uciname//[!([:alnum:]_)]}"
-+	uuid="$(/sbin/block info | grep "^$2" | xargs -n 1 echo | grep "^UUID=.*")"
-+	[ "$uuid" ] || return 22
-+	uuid="${uuid:5}"
-+
-+	case "$uciname" in
-+		"_meta")
-+			target="/var/run/uvol/.meta"
-+			;;
-+		"_"*)
-+			return 1
-+			;;
-+	esac
-+
-+	_uvol_init_spooldir
-+	if [ -e "${UCI_SPOOLDIR}/remove-$1" ]; then
-+		rm "${UCI_SPOOLDIR}/remove-$1"
-+	fi
-+
-+	cat >"${UCI_SPOOLDIR}/add-$1" <<EOF
-+set fstab.$uciname=mount
-+set fstab.$uciname.uuid=$uuid
-+set fstab.$uciname.target=$target
-+set fstab.$uciname.options=$mode
-+set fstab.$uciname.autofs=$autofs
-+set fstab.$uciname.enabled=1
-+EOF
-+}
-+
-+uvol_uci_remove() {
-+	local volname="$1"
-+	local uciname
-+
-+	uciname="${volname//[-.]/_}"
-+	uciname="${uciname//[!([:alnum:]_)]}"
-+	if [ -e "${UCI_SPOOLDIR}/add-$1" ]; then
-+		rm "${UCI_SPOOLDIR}/add-$1"
-+		return
-+	fi
-+	_uvol_init_spooldir
-+	cat >"${UCI_SPOOLDIR}/remove-$1" <<EOF
-+delete fstab.$uciname
-+EOF
-+}
-+
-+uvol_uci_commit() {
-+	local volname="$1"
-+	local ucibatch
-+
-+	for ucibatch in "${UCI_SPOOLDIR}/"*"-$volname"${volname+*} ; do
-+		[ -e "$ucibatch" ] || break
-+		uci batch < "$ucibatch"
-+		[ $? -eq 0 ] && rm "$ucibatch"
-+	done
-+
-+	uci commit fstab
-+	return $?
-+}
-+
-+uvol_uci_init() {
-+	uci -q get fstab.@uvol[0] && return
-+	uci add fstab uvol
-+	uci set fstab.@uvol[-1].initialized=1
-+}
-diff --git a/package/system/uvol/files/lvm.sh b/package/system/uvol/files/lvm.sh
-new file mode 100644
-index 0000000000..c7e93f13f2
---- /dev/null
-+++ b/package/system/uvol/files/lvm.sh
-@@ -0,0 +1,459 @@
-+#!/bin/sh
-+
-+cmd="$1"
-+shift
-+
-+if [ "$cmd" = "name" ]; then
-+	echo "LVM"
-+	return 0
-+fi
-+
-+command -v lvm >/dev/null || return 1
-+
-+. /lib/functions.sh
-+. /lib/functions/uvol.sh
-+. /lib/upgrade/common.sh
-+. /usr/share/libubox/jshn.sh
-+
-+export_bootdevice
-+[ "$BOOTDEV_MAJOR" ] || return 1
-+export_partdevice rootdev 0
-+[ "$rootdev" ] || return 1
-+
-+case "$rootdev" in
-+	mtd*|\
-+	ram*|\
-+	ubi*)
-+		return 1
-+esac
-+
-+lvm_cmd() {
-+	local cmd="$1"
-+	shift
-+	LVM_SUPPRESS_FD_WARNINGS=1 lvm "$cmd" "$@"
-+	return $?
-+}
-+
-+pvs() {
-+	lvm_cmd pvs --reportformat json --units b "$@"
-+}
-+
-+vgs() {
-+	lvm_cmd vgs --reportformat json --units b "$@"
-+}
-+
-+lvs() {
-+	lvm_cmd lvs --reportformat json --units b "$@"
-+}
-+
-+freebytes() {
-+	echo $((vg_free_count * vg_extent_size))
-+}
-+
-+totalbytes() {
-+	echo $((vg_extent_count * vg_extent_size))
-+}
-+
-+existvol() {
-+	[ "$1" ] || return 1
-+	test -e "/dev/$vg_name/ro_$1" || test -e "/dev/$vg_name/rw_$1"
-+	return $?
-+}
-+
-+vg_name=
-+exportpv() {
-+	vg_name=
-+	config_load fstab
-+	local uvolsect="$(config_foreach echo uvol)"
-+	[ -n "$uvolsect" ] && config_get vg_name "$uvolsect" vg_name
-+	[ -n "$vg_name" ] && return
-+	local reports rep pv pvs
-+	json_init
-+	json_load "$(pvs -o vg_name -S "pv_name=~^/dev/$rootdev.*\$")"
-+	json_select report
-+	json_get_keys reports
-+	for rep in $reports; do
-+		json_select "$rep"
-+		json_select pv
-+		json_get_keys pvs
-+		for pv in $pvs; do
-+			json_select "$pv"
-+			json_get_vars vg_name
-+			json_select ..
-+			break
-+		done
-+		json_select ..
-+		break
-+	done
-+}
-+
-+vg_extent_size=
-+vg_extent_count=
-+vg_free_count=
-+exportvg() {
-+	local reports rep vg vgs
-+	vg_extent_size=
-+	vg_extent_count=
-+	vg_free_count=
-+	json_init
-+	json_load "$(vgs -o vg_extent_size,vg_extent_count,vg_free_count -S "vg_name=$vg_name")"
-+	json_select report
-+	json_get_keys reports
-+	for rep in $reports; do
-+		json_select "$rep"
-+		json_select vg
-+		json_get_keys vgs
-+		for vg in $vgs; do
-+			json_select "$vg"
-+			json_get_vars vg_extent_size vg_extent_count vg_free_count
-+			vg_extent_size=${vg_extent_size%B}
-+			json_select ..
-+			break
-+		done
-+		json_select ..
-+		break
-+	done
-+}
-+
-+lv_active=
-+lv_name=
-+lv_full_name=
-+lv_path=
-+lv_dm_path=
-+lv_size=
-+exportlv() {
-+	local reports rep lv lvs
-+	lv_active=
-+	lv_name=
-+	lv_full_name=
-+	lv_path=
-+	lv_dm_path=
-+	lv_size=
-+	json_init
-+
-+	json_load "$(lvs -o lv_active,lv_name,lv_full_name,lv_size,lv_path,lv_dm_path -S "lv_name=~^[rw][owp]_$1\$ && vg_name=$vg_name")"
-+	json_select report
-+	json_get_keys reports
-+	for rep in $reports; do
-+		json_select "$rep"
-+		json_select lv
-+		json_get_keys lvs
-+		for lv in $lvs; do
-+			json_select "$lv"
-+			json_get_vars lv_active lv_name lv_full_name lv_size lv_path lv_dm_path
-+			lv_size=${lv_size%B}
-+			json_select ..
-+			break
-+		done
-+		json_select ..
-+		break
-+	done
-+}
-+
-+getdev() {
-+	local dms dm_name
-+
-+	for dms in /sys/devices/virtual/block/dm-* ; do
-+		[ "$dms" = "/sys/devices/virtual/block/dm-*" ] && break
-+		read -r dm_name < "$dms/dm/name"
-+		[ "$(basename "$lv_dm_path")" = "$dm_name" ] && basename "$dms"
-+	done
-+}
-+
-+getuserdev() {
-+	local dms dm_name
-+	existvol "$1" || return 1
-+	exportlv "$1"
-+	getdev "$@"
-+}
-+
-+getsize() {
-+	exportlv "$1"
-+	[ "$lv_size" ] && echo "$lv_size"
-+}
-+
-+activatevol() {
-+	exportlv "$1"
-+	[ "$lv_path" ] || return 2
-+	case "$lv_path" in
-+		/dev/*/wo_*|\
-+		/dev/*/wp_*)
-+			return 22
-+			;;
-+		*)
-+			uvol_uci_commit "$1"
-+			[ "$lv_active" = "active" ] && return 0
-+			lvm_cmd lvchange -k n "$lv_full_name" || return $?
-+			lvm_cmd lvchange -a y "$lv_full_name" || return $?
-+			return 0
-+			;;
-+	esac
-+}
-+
-+disactivatevol() {
-+	exportlv "$1"
-+	local devname
-+	[ "$lv_path" ] || return 2
-+	case "$lv_path" in
-+		/dev/*/wo_*|\
-+		/dev/*/wp_*)
-+			return 22
-+			;;
-+		*)
-+			[ "$lv_active" = "active" ] || return 0
-+			devname="$(getdev "$1")"
-+			[ "$devname" ] && umount "/dev/$devname"
-+			lvm_cmd lvchange -a n "$lv_full_name"
-+			lvm_cmd lvchange -k y "$lv_full_name" || return $?
-+			return 0
-+			;;
-+	esac
-+}
-+
-+getstatus() {
-+	exportlv "$1"
-+	[ "$lv_full_name" ] || return 2
-+	existvol "$1" || return 1
-+	return 0
-+}
-+
-+createvol() {
-+	local mode lvmode ret
-+	local volsize=$(($2))
-+	[ "$volsize" ] || return 22
-+	exportlv "$1"
-+	[ "$lv_size" ] && return 17
-+	size_ext=$((volsize / vg_extent_size))
-+	[ $((size_ext * vg_extent_size)) -lt $volsize ] && size_ext=$((size_ext + 1))
-+
-+	case "$3" in
-+		ro|wo)
-+			lvmode=r
-+			mode=wo
-+			;;
-+		rw)
-+			lvmode=rw
-+			mode=wp
-+			;;
-+		*)
-+			return 22
-+			;;
-+	esac
-+
-+	lvm_cmd lvcreate -p "$lvmode" -a n -y -W n -Z n -n "${mode}_$1" -l "$size_ext" "$vg_name" || return $?
-+	ret=$?
-+	if [ ! $ret -eq 0 ] || [ "$lvmode" = "r" ]; then
-+		return $ret
-+	fi
-+	exportlv "$1"
-+	[ "$lv_full_name" ] || return 22
-+	lvm_cmd lvchange -a y "$lv_full_name" || return $?
-+	if [ "$lv_size" -gt $(( 100 * 1024 * 1024 )) ]; then
-+		mkfs.f2fs -f -l "$1" "$lv_path"
-+		ret=$?
-+		[ $ret != 0 ] && [ $ret != 134 ] && {
-+			lvm_cmd lvchange -a n "$lv_full_name" || return $?
-+			return $ret
-+		}
-+	else
-+		mke2fs -F -L "$1" "$lv_path" || {
-+			ret=$?
-+			lvm_cmd lvchange -a n "$lv_full_name" || return $?
-+			return $ret
-+		}
-+	fi
-+	uvol_uci_add "$1" "/dev/$(getdev "$1")" "rw"
-+	lvm_cmd lvchange -a n "$lv_full_name" || return $?
-+	lvm_cmd lvrename "$vg_name" "wp_$1" "rw_$1" || return $?
-+	return 0
-+}
-+
-+removevol() {
-+	exportlv "$1"
-+	[ "$lv_full_name" ] || return 2
-+	[ "$lv_active" = "active" ] && return 16
-+	lvm_cmd lvremove -y "$lv_full_name" || return $?
-+	uvol_uci_remove "$1"
-+	uvol_uci_commit "$1"
-+}
-+
-+updatevol() {
-+	exportlv "$1"
-+	[ "$lv_full_name" ] || return 2
-+	[ "$lv_size" -ge "$2" ] || return 27
-+	case "$lv_path" in
-+		/dev/*/wo_*)
-+			lvm_cmd lvchange -p rw "$lv_full_name" || return $?
-+			lvm_cmd lvchange -a y "$lv_full_name" || return $?
-+			dd of="$lv_path"
-+			uvol_uci_add "$1" "/dev/$(getdev "$1")" "ro"
-+			lvm_cmd lvchange -a n "$lv_full_name" || return $?
-+			lvm_cmd lvchange -p r "$lv_full_name" || return $?
-+			lvm_cmd lvrename "$lv_full_name" "${lv_full_name%%/*}/ro_$1" || return $?
-+			return 0
-+			;;
-+		default)
-+			return 22
-+			;;
-+	esac
-+}
-+
-+listvols() {
-+	local reports rep lv lvs lv_name lv_size lv_mode volname json_output json_notfirst
-+	if [ "$1" = "-j" ]; then
-+		json_output=1
-+		echo "["
-+		shift
-+	fi
-+	volname=${1:-.*}
-+	json_init
-+	json_load "$(lvs -o lv_name,lv_size -S "lv_name=~^[rw][owp]_$volname\$ && vg_name=$vg_name")"
-+	json_select report
-+	json_get_keys reports
-+	for rep in $reports; do
-+		json_select "$rep"
-+		json_select lv
-+		json_get_keys lvs
-+		for lv in $lvs; do
-+			json_select "$lv"
-+			json_get_vars lv_name lv_size
-+			lv_mode="${lv_name:0:2}"
-+			lv_name="${lv_name:3}"
-+			lv_size=${lv_size%B}
-+			[ "${lv_name:0:1}" = "." ] && continue
-+			if [ "$json_output" = "1" ]; then
-+				[ "$json_notfirst" = "1" ] && echo ","
-+				echo -e "\t{"
-+				echo -e "\t\t\"name\": \"$lv_name\","
-+				echo -e "\t\t\"mode\": \"$lv_mode\","
-+				echo -e "\t\t\"size\": $lv_size"
-+				echo -n -e "\t}"
-+				json_notfirst=1
-+			else
-+				echo "$lv_name $lv_mode $lv_size"
-+			fi
-+			json_select ..
-+		done
-+		json_select ..
-+		break
-+	done
-+
-+	if [ "$json_output" = "1" ]; then
-+		[ "$json_notfirst" = "1" ] && echo
-+		echo "]"
-+	fi
-+}
-+
-+detect() {
-+	local reports rep lv lvs lv_name lv_full_name lv_mode volname devname
-+	local temp_up=""
-+
-+	json_init
-+	json_load "$(lvs -o lv_full_name -S "lv_name=~^[rw][owp]_.*\$ && vg_name=$vg_name && lv_skip_activation!=0")"
-+	json_select report
-+	json_get_keys reports
-+	for rep in $reports; do
-+		json_select "$rep"
-+		json_select lv
-+		json_get_keys lvs
-+		for lv in $lvs; do
-+			json_select "$lv"
-+			json_get_vars lv_full_name
-+			echo "lvchange -a y $lv_full_name"
-+			lvm_cmd lvchange -k n "$lv_full_name"
-+			lvm_cmd lvchange -a y "$lv_full_name"
-+			temp_up="$temp_up $lv_full_name"
-+			json_select ..
-+		done
-+		json_select ..
-+		break
-+	done
-+	sleep 1
-+
-+	uvol_uci_init
-+
-+	json_init
-+	json_load "$(lvs -o lv_name,lv_dm_path -S "lv_name=~^[rw][owp]_.*\$ && vg_name=$vg_name")"
-+	json_select report
-+	json_get_keys reports
-+	for rep in $reports; do
-+		json_select "$rep"
-+		json_select lv
-+		json_get_keys lvs
-+		for lv in $lvs; do
-+			json_select "$lv"
-+			json_get_vars lv_name lv_dm_path
-+			lv_mode="${lv_name:0:2}"
-+			lv_name="${lv_name:3}"
-+			echo uvol_uci_add "$lv_name" "/dev/$(getdev "$lv_name")" "$lv_mode"
-+			uvol_uci_add "$lv_name" "/dev/$(getdev "$lv_name")" "$lv_mode"
-+			json_select ..
-+		done
-+		json_select ..
-+		break
-+	done
-+
-+	uvol_uci_commit
-+
-+	for lv_full_name in $temp_up; do
-+		echo "lvchange -a n $lv_full_name"
-+		lvm_cmd lvchange -a n "$lv_full_name"
-+		lvm_cmd lvchange -k y "$lv_full_name"
-+	done
-+}
-+
-+boot() {
-+	true ; # nothing to do, lvm does it all for us
-+}
-+
-+exportpv
-+exportvg
-+
-+case "$cmd" in
-+	align)
-+		echo "$vg_extent_size"
-+		;;
-+	free)
-+		freebytes
-+		;;
-+	total)
-+		totalbytes
-+		;;
-+	detect)
-+		detect
-+		;;
-+	boot)
-+		boot
-+		;;
-+	list)
-+		listvols "$@"
-+		;;
-+	create)
-+		createvol "$@"
-+		;;
-+	remove)
-+		removevol "$@"
-+		;;
-+	device)
-+		getuserdev "$@"
-+		;;
-+	size)
-+		getsize "$@"
-+		;;
-+	up)
-+		activatevol "$@"
-+		;;
-+	down)
-+		disactivatevol "$@"
-+		;;
-+	status)
-+		getstatus "$@"
-+		;;
-+	write)
-+		updatevol "$@"
-+		;;
-+	*)
-+		echo "unknown command"
-+		return 1
-+		;;
-+esac
-diff --git a/package/system/uvol/files/ubi.sh b/package/system/uvol/files/ubi.sh
-new file mode 100644
-index 0000000000..7637fba682
---- /dev/null
-+++ b/package/system/uvol/files/ubi.sh
-@@ -0,0 +1,358 @@
-+#!/bin/sh
-+
-+cmd="$1"
-+shift
-+
-+if [ "$cmd" = "name" ]; then
-+	echo "UBI"
-+	return 0
-+fi
-+
-+test -e /sys/class/ubi/version || return 0
-+read -r ubiver < /sys/class/ubi/version
-+[ "$ubiver" = "1" ] || return 1
-+test -e /sys/devices/virtual/ubi || return 0
-+
-+ubidev=$(ls -1 /sys/devices/virtual/ubi | head -n 1)
-+
-+read -r ebsize < "/sys/devices/virtual/ubi/${ubidev}/eraseblock_size"
-+
-+. /lib/functions/uvol.sh
-+
-+freebytes() {
-+	read -r availeb < "/sys/devices/virtual/ubi/${ubidev}/avail_eraseblocks"
-+	echo $((availeb * ebsize))
-+}
-+
-+totalbytes() {
-+	read -r totaleb < "/sys/devices/virtual/ubi/${ubidev}/total_eraseblocks"
-+	echo $((totaleb * ebsize))
-+}
-+
-+getdev() {
-+	local voldir volname
-+	for voldir in "/sys/devices/virtual/ubi/${ubidev}/${ubidev}_"*; do
-+		read -r volname < "${voldir}/name"
-+		case "$volname" in
-+			uvol-[rw][owpd]-$1)
-+				basename "$voldir"
-+				break
-+				;;
-+			*)
-+				continue
-+				;;
-+		esac
-+	done
-+}
-+
-+vol_is_mode() {
-+	local voldev="$1"
-+	local volname
-+	read -r volname < "/sys/devices/virtual/ubi/${ubidev}/${voldev}/name"
-+	case "$volname" in
-+		uvol-$2-*)
-+			return 0
-+			;;
-+	esac
-+	return 1
-+}
-+
-+getstatus() {
-+	local voldev
-+	voldev="$(getdev "$@")"
-+	[ "$voldev" ] || return 2
-+	vol_is_mode "$voldev" wo && return 22
-+	vol_is_mode "$voldev" wp && return 16
-+	vol_is_mode "$voldev" wd && return 1
-+	vol_is_mode "$voldev" ro && [ ! -e "/dev/ubiblock${voldev:3}" ] && return 1
-+	return 0
-+}
-+
-+getsize() {
-+	local voldev
-+	voldev="$(getdev "$@")"
-+	[ "$voldev" ] || return 2
-+	cat "/sys/devices/virtual/ubi/${ubidev}/${voldev}/data_bytes"
-+}
-+
-+getuserdev() {
-+	local voldev
-+	voldev="$(getdev "$@")"
-+	[ "$voldev" ] || return 2
-+	if vol_is_mode "$voldev" ro ; then
-+		echo "/dev/ubiblock${voldev:3}"
-+	elif vol_is_mode "$voldev" rw ; then
-+		echo "/dev/$voldev"
-+	fi
-+}
-+
-+mkubifs() {
-+	local tmp_mp
-+	tmp_mp="$(mktemp -d)"
-+	mount -t ubifs "$1" "$tmp_mp" || return $?
-+	umount "$tmp_mp" || return $?
-+	rmdir "$tmp_mp" || return $?
-+	return 0
-+}
-+
-+createvol() {
-+	local mode ret voldev
-+	voldev=$(getdev "$@")
-+	[ "$voldev" ] && return 17
-+	case "$3" in
-+		ro|wo)
-+			mode=wo
-+			;;
-+		rw)
-+			mode=wp
-+			;;
-+		*)
-+			return 22
-+			;;
-+	esac
-+	ubimkvol "/dev/$ubidev" -N "uvol-$mode-$1" -s "$2" || return $?
-+	ret=$?
-+	[ $ret -eq 0 ] || return $ret
-+	voldev="$(getdev "$@")"
-+	ubiupdatevol -t "/dev/$voldev" || return $?
-+	[ "$mode" = "wp" ] || return 0
-+	mkubifs "/dev/$voldev" || return $?
-+	uvol_uci_add "$1" "/dev/$voldev" "rw"
-+	ubirename "/dev/$ubidev" "uvol-wp-$1" "uvol-wd-$1" || return $?
-+}
-+
-+removevol() {
-+	local voldev volnum
-+	voldev=$(getdev "$@")
-+	[ "$voldev" ] || return 2
-+	vol_is_mode "$voldev" rw && return 16
-+	vol_is_mode "$voldev" ro && return 16
-+	volnum="${voldev#${ubidev}_}"
-+	ubirmvol "/dev/$ubidev" -n "$volnum" || return $?
-+	uvol_uci_remove "$1"
-+	uvol_uci_commit "$1"
-+}
-+
-+block_hotplug() {
-+	export ACTION="$1"
-+	export DEVNAME="$2"
-+	/sbin/block hotplug
-+}
-+
-+activatevol() {
-+	local voldev
-+	voldev="$(getdev "$@")"
-+	[ "$voldev" ] || return 2
-+	vol_is_mode "$voldev" rw && return 0
-+	vol_is_mode "$voldev" ro && return 0
-+	vol_is_mode "$voldev" wo && return 22
-+	vol_is_mode "$voldev" wp && return 16
-+	uvol_uci_commit "$1"
-+	if vol_is_mode "$voldev" rd; then
-+		ubirename "/dev/$ubidev" "uvol-rd-$1" "uvol-ro-$1" || return $?
-+		ubiblock --create "/dev/$voldev" || return $?
-+		return 0
-+	elif vol_is_mode "$voldev" wd; then
-+		ubirename "/dev/$ubidev" "uvol-wd-$1" "uvol-rw-$1" || return $?
-+		block_hotplug add "$voldev"
-+		return 0
-+	fi
-+}
-+
-+disactivatevol() {
-+	local voldev
-+	voldev="$(getdev "$@")"
-+	[ "$voldev" ] || return 2
-+	vol_is_mode "$voldev" rd && return 0
-+	vol_is_mode "$voldev" wd && return 0
-+	vol_is_mode "$voldev" wo && return 22
-+	vol_is_mode "$voldev" wp && return 16
-+	if vol_is_mode "$voldev" ro; then
-+		grep -q "^/dev/ubiblock${voldev:3}" /proc/self/mounts && umount "/dev/ubiblock${voldev:3}"
-+		ubiblock --remove "/dev/$voldev"
-+		ubirename "/dev/$ubidev" "uvol-ro-$1" "uvol-rd-$1" || return $?
-+		return 0
-+	elif vol_is_mode "$voldev" rw; then
-+		umount "/dev/$voldev"
-+		ubirename "/dev/$ubidev" "uvol-rw-$1" "uvol-wd-$1" || return $?
-+		block_hotplug remove "$voldev"
-+		return 0
-+	fi
-+}
-+
-+updatevol() {
-+	local voldev
-+	voldev="$(getdev "$@")"
-+	[ "$voldev" ] || return 2
-+	[ "$2" ] || return 22
-+	vol_is_mode "$voldev" wo || return 22
-+	ubiupdatevol -s "$2" "/dev/$voldev" -
-+	ubiblock --create "/dev/$voldev"
-+	uvol_uci_add "$1" "/dev/ubiblock${voldev:3}" "ro"
-+	ubiblock --remove "/dev/$voldev"
-+	ubirename "/dev/$ubidev" "uvol-wo-$1" "uvol-rd-$1"
-+}
-+
-+listvols() {
-+	local volname volmode volsize json_output json_notfirst
-+	if [ "$1" = "-j" ]; then
-+		json_output=1
-+		shift
-+		echo "["
-+	fi
-+	for voldir in "/sys/devices/virtual/ubi/${ubidev}/${ubidev}_"*; do
-+		read -r volname < "$voldir/name"
-+		case "$volname" in
-+			uvol-[rw][wod]*)
-+				read -r volsize < "$voldir/data_bytes"
-+				;;
-+			*)
-+				continue
-+				;;
-+		esac
-+		volmode="${volname:5:2}"
-+		volname="${volname:8}"
-+		[ "${volname:0:1}" = "." ] && continue
-+		if [ "$json_output" = "1" ]; then
-+			[ "$json_notfirst" = "1" ] && echo ","
-+				echo -e "\t{"
-+				echo -e "\t\t\"name\": \"$volname\","
-+				echo -e "\t\t\"mode\": \"$volmode\","
-+				echo -e "\t\t\"size\": $volsize"
-+				echo -n -e "\t}"
-+				json_notfirst=1
-+		else
-+			echo "$volname $volmode $volsize"
-+		fi
-+	done
-+
-+	if [ "$json_output" = "1" ]; then
-+		[ "$json_notfirst" = "1" ] && echo
-+		echo "]"
-+	fi
-+}
-+
-+bootvols() {
-+	local volname volmode volsize voldev fstype
-+	for voldir in "/sys/devices/virtual/ubi/${ubidev}/${ubidev}_"*; do
-+		read -r volname < "$voldir/name"
-+		voldev="$(basename "$voldir")"
-+		fstype=
-+		case "$volname" in
-+			uvol-ro-*)
-+				ubiblock --create "/dev/$voldev" || return $?
-+				;;
-+			*)
-+				continue
-+				;;
-+		esac
-+		volmode="${volname:5:2}"
-+		volname="${volname:8}"
-+	done
-+}
-+
-+detect() {
-+	local volname voldev volmode voldev fstype tmpdev=""
-+	for voldir in "/sys/devices/virtual/ubi/${ubidev}/${ubidev}_"*; do
-+		read -r volname < "$voldir/name"
-+		voldev="$(basename "$voldir")"
-+		fstype=
-+		case "$volname" in
-+			uvol-r[od]-*)
-+				if ! [ -e "/dev/ubiblock${voldev:3}" ]; then
-+					ubiblock --create "/dev/$voldev" || return $?
-+				fi
-+				case "$volname" in
-+				uvol-rd-*)
-+					tmpdev="$tmpdev $voldev"
-+					;;
-+				esac
-+				;;
-+			*)
-+				continue
-+				;;
-+		esac
-+		volmode="${volname:5:2}"
-+		volname="${volname:8}"
-+	done
-+
-+	uvol_uci_init
-+
-+	for voldir in "/sys/devices/virtual/ubi/${ubidev}/${ubidev}_"*; do
-+		read -r volname < "$voldir/name"
-+		voldev="$(basename "$voldir")"
-+		case "$volname" in
-+			uvol-[rw][wod]*)
-+				true
-+				;;
-+			*)
-+				continue
-+				;;
-+		esac
-+		volmode="${volname:5:2}"
-+		volname="${volname:8}"
-+		case "$volmode" in
-+		"ro" | "rd")
-+			uvol_uci_add "$volname" "/dev/ubiblock${voldev:3}" "ro"
-+			;;
-+		"rw" | "wd")
-+			uvol_uci_add "$volname" "/dev/${voldev}" "rw"
-+			;;
-+		esac
-+	done
-+
-+	uvol_uci_commit
-+
-+	for voldev in $tmpdev ; do
-+		ubiblock --remove "/dev/$voldev" || return $?
-+	done
-+}
-+
-+case "$cmd" in
-+	align)
-+		echo "$ebsize"
-+		;;
-+	free)
-+		freebytes
-+		;;
-+	total)
-+		totalbytes
-+		;;
-+	detect)
-+		detect
-+		;;
-+	boot)
-+		bootvols
-+		;;
-+	list)
-+		listvols "$@"
-+		;;
-+	create)
-+		createvol "$@"
-+		;;
-+	remove)
-+		removevol "$@"
-+		;;
-+	device)
-+		getuserdev "$@"
-+		;;
-+	size)
-+		getsize "$@"
-+		;;
-+	up)
-+		activatevol "$@"
-+		;;
-+	down)
-+		disactivatevol "$@"
-+		;;
-+	status)
-+		getstatus "$@"
-+		;;
-+	write)
-+		updatevol "$@"
-+		;;
-+	*)
-+		echo "unknown command"
-+		return 1
-+		;;
-+esac
-diff --git a/package/system/uvol/files/uvol b/package/system/uvol/files/uvol
-new file mode 100644
-index 0000000000..4ecd2e165a
---- /dev/null
-+++ b/package/system/uvol/files/uvol
-@@ -0,0 +1,52 @@
-+#!/bin/sh
-+
-+# uvol prototype
-+# future development roadmap (aka. to-do):
-+# * re-implement in C (use libubox, execve lvm/ubi*)
-+# * hash to validate volume while writing
-+# * add atomic batch processing for use by container/package manager
-+
-+if [ -z "$1" ]; then cat <<EOF
-+uvol storage volume manager
-+
-+syntax: uvol command ...
-+
-+commands:
-+  boot				get active volumes ready (called on boot)
-+  free				show number of bytes available
-+  total				show total number of bytes
-+  align				show sector size in bytes
-+  list [volname]		list volumes
-+  create volname size type	create new volume
-+    size: in bytes
-+    type: 'ro' or 'rw'
-+  remove volname		delete volume
-+  device volname		show block device for mounting
-+  size volname			show size of volume
-+  up volname			get volume ready for mounting
-+  down volname			take volume down after unmounting
-+  status volname		return status of volume
-+    return code: 0 - volume is ready for use
-+                 1 - volume is not ready for use
-+                 2 - volume doesn'y exist
-+  write volname size		write to volume from stdin, size in bytes
-+EOF
-+	return 22
-+fi
-+
-+uvol_backend=
-+backends_tried=
-+
-+for backend in /usr/libexec/uvol/*.sh; do
-+	total=$($backend total)
-+	backends_tried="$backends_tried $($backend name)"
-+	[ "$total" ] && uvol_backend=$backend
-+done
-+
-+if [ -z "$uvol_backend" ]; then
-+	echo "No backend available. (tried:$backends_tried)"
-+	echo "To setup devices with block storage install 'autopart'."
-+	return 2
-+fi
-+
-+flock -x /tmp/run/uvol.lock "$uvol_backend" "$@"
-diff --git a/package/system/uvol/files/uvol.defaults b/package/system/uvol/files/uvol.defaults
-new file mode 100644
-index 0000000000..e71135f7a8
---- /dev/null
-+++ b/package/system/uvol/files/uvol.defaults
-@@ -0,0 +1,17 @@
-+#!/bin/sh
-+
-+uvol_init() {
-+	local metasz freesz totalsz
-+	uvol detect
-+	metasz="$(uvol size .meta 2>/dev/null)"
-+	[ "$((metasz))" -gt 0 ] && return
-+	totalsz="$(uvol total)"
-+	freesz="$(uvol free)"
-+	metasz="$((totalsz / 10240))"
-+	[ "$metasz" -lt 4194304 ] && metasz=4194304
-+	[ "$metasz" -gt "$freesz" ] && return
-+	uvol create .meta "$metasz" rw
-+	uvol up .meta
-+}
-+
-+uci -q get fstab.@uvol[0].initialized >/dev/null || uvol_init
-diff --git a/package/system/uvol/files/uvol.init b/package/system/uvol/files/uvol.init
-new file mode 100644
-index 0000000000..1f6e2aac08
---- /dev/null
-+++ b/package/system/uvol/files/uvol.init
-@@ -0,0 +1,23 @@
-+#!/bin/sh /etc/rc.common
-+
-+START=99
-+USE_PROCD=1
-+NAME=uvol
-+PROG=/usr/sbin/uvol
-+
-+start_service() {
-+	[ "${__BOOT_UVOL}" = "1" ] && return 0
-+	procd_open_instance "$NAME"
-+	procd_set_param command "$PROG" boot
-+	procd_close_instance
-+}
-+
-+boot() {
-+	__BOOT_UVOL=1
-+	start
-+}
-+
-+service_triggers() {
-+	procd_add_raw_trigger "mount.ready" 200 /etc/init.d/uvol start
-+}
-+
--- 
-2.25.1
-
diff --git a/patches/backports/0025-apk-backport-package.patch b/patches/backports/0025-apk-backport-package.patch
deleted file mode 100644
index 5178ba423..000000000
--- a/patches/backports/0025-apk-backport-package.patch
+++ /dev/null
@@ -1,312 +0,0 @@
-From bf98d3c1de524ca50cbc09f825a4b0648e353624 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Fri, 13 Aug 2021 08:47:11 +0200
-Subject: [PATCH 25/27] apk: backport package
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/system/apk/Makefile                   | 93 +++++++++++++++++++
- ...vel@lists.alpinelinux.org-4a6a0840.rsa.pub |  9 ++
- ...vel@lists.alpinelinux.org-5243ef4b.rsa.pub |  9 ++
- ...vel@lists.alpinelinux.org-5261cecb.rsa.pub |  9 ++
- package/system/apk/files/alpine-repositories  |  3 +
- .../apk/patches/000-Makefile-version.patch    | 11 +++
- .../patches/0001-remove-doc-generation.patch  | 21 +++++
- package/system/apk/patches/100-link.patch     | 16 ++++
- package/system/apk/patches/100-phtread.patch  | 12 +++
- ...ude-limits.h-to-fix-build-with-glibc.patch | 20 ++++
- package/system/apk/test.sh                    |  9 ++
- 11 files changed, 212 insertions(+)
- create mode 100644 package/system/apk/Makefile
- create mode 100644 package/system/apk/files/alpine-keys/alpine-devel@lists.alpinelinux.org-4a6a0840.rsa.pub
- create mode 100644 package/system/apk/files/alpine-keys/alpine-devel@lists.alpinelinux.org-5243ef4b.rsa.pub
- create mode 100644 package/system/apk/files/alpine-keys/alpine-devel@lists.alpinelinux.org-5261cecb.rsa.pub
- create mode 100644 package/system/apk/files/alpine-repositories
- create mode 100644 package/system/apk/patches/000-Makefile-version.patch
- create mode 100644 package/system/apk/patches/0001-remove-doc-generation.patch
- create mode 100644 package/system/apk/patches/100-link.patch
- create mode 100644 package/system/apk/patches/100-phtread.patch
- create mode 100644 package/system/apk/patches/100-tar-include-limits.h-to-fix-build-with-glibc.patch
- create mode 100644 package/system/apk/test.sh
-
-diff --git a/package/system/apk/Makefile b/package/system/apk/Makefile
-new file mode 100644
-index 0000000000..335f50c155
---- /dev/null
-+++ b/package/system/apk/Makefile
-@@ -0,0 +1,93 @@
-+include $(TOPDIR)/rules.mk
-+
-+PKG_NAME:=apk
-+PKG_VERSION:=3.0.0_pre0
-+
-+PKG_SOURCE_PROTO:=git
-+PKG_SOURCE_URL:=https://git.alpinelinux.org/apk-tools.git
-+PKG_SOURCE_DATE:=2021-08-17
-+PKG_SOURCE_VERSION:=a46043bcc4cc15b456ef1eac5c5f9d93bd905d53
-+PKG_MIRROR_HASH:=e16fd04b18043e78a177acd8c6958fa03fd1484b62c879c2dd0bed8ce9c50625
-+PKG_SOURCE_SUBDIR:=$(PKG_NAME)-$(PKG_SOURCE_DATE)-$(call version_abbrev,$(PKG_SOURCE_VERSION))
-+PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_SOURCE_SUBDIR)
-+HOST_BUILD_DIR:=$(BUILD_DIR_HOST)/$(PKG_SOURCE_SUBDIR)
-+PKG_SOURCE:=$(PKG_SOURCE_SUBDIR).tar.xz
-+PKG_RELEASE:=r$(PKG_SOURCE_DATE)-$(call version_abbrev,$(PKG_SOURCE_VERSION))-$(AUTORELEASE)
-+
-+PKG_MAINTAINER:=Paul Spooren <mail@aparcar.org>
-+PKG_LICENSE:=GPL-2.0-only
-+PKG_LICENSE_FILES:=LICENSE
-+
-+PKG_INSTALL:=1
-+PKG_BUILD_PARALLEL:=1
-+
-+HOST_BUILD_DEPENDS:=lua/host lua-lzlib/host
-+PKG_BUILD_DEPENDS:=$(HOST_BUILD_DEPENDS)
-+
-+include $(INCLUDE_DIR)/package.mk
-+include $(INCLUDE_DIR)/host-build.mk
-+
-+define Package/apk
-+  SECTION:=utils
-+  CATEGORY:=Utilities
-+  TITLE:=apk package manager
-+  DEPENDS:=+liblua +libopenssl +zlib @!arc
-+  URL:=$(PKG_SOURCE_URL)
-+endef
-+
-+define Package/alpine-keys
-+  SECTION:=utils
-+  CATEGORY:=Utilities
-+  TITLE:=Alpine apk public signing keys
-+  DEPENDS:=apk
-+endef
-+
-+define Package/alpine-repositories
-+  SECTION:=utils
-+  CATEGORY:=Utilities
-+  TITLE:=Official Alpine repositories
-+  DEPENDS:=apk
-+endef
-+
-+MAKE_FLAGS += \
-+	LUA=$(STAGING_DIR_HOSTPKG)/bin/lua \
-+	LUA_VERSION=5.1 \
-+	LUA_PC=lua
-+
-+HOST_MAKE_FLAGS += \
-+	LUA=$(STAGING_DIR_HOSTPKG)/bin/lua \
-+	LUA_VERSION=5.1 \
-+	DESTDIR=$(STAGING_DIR_HOSTPKG) \
-+	SBINDIR=/bin \
-+	PREFIX=
-+
-+HOST_LDFLAGS+=-Wl,-rpath=$(STAGING_DIR_HOSTPKG)/lib -lpthread
-+
-+define Package/apk/install
-+	$(INSTALL_DIR) $(1)/lib/apk/db
-+
-+	$(INSTALL_DIR) $(1)/bin
-+	$(INSTALL_BIN) $(PKG_INSTALL_DIR)/sbin/apk $(1)/bin/apk
-+
-+	$(INSTALL_DIR) $(1)/usr/lib
-+	$(CP) $(PKG_INSTALL_DIR)/lib/*.so.* $(1)/usr/lib/
-+
-+	$(INSTALL_DIR) $(1)/etc/apk/
-+	echo $(ARCH) > $(1)/etc/apk/arch
-+	touch $(1)/etc/apk/world
-+endef
-+
-+define Package/alpine-keys/install
-+	$(INSTALL_DIR) $(1)/etc/apk/keys
-+	$(INSTALL_DATA) ./files/alpine-keys/* $(1)/etc/apk/keys
-+endef
-+
-+define Package/alpine-repositories/install
-+	$(INSTALL_DIR) $(1)/etc/apk/keys
-+	$(INSTALL_DATA) ./files/alpine-repositories $(1)/etc/apk/repositories
-+endef
-+
-+$(eval $(call BuildPackage,apk))
-+$(eval $(call BuildPackage,alpine-keys))
-+$(eval $(call BuildPackage,alpine-repositories))
-+$(eval $(call HostBuild))
-diff --git a/package/system/apk/files/alpine-keys/alpine-devel@lists.alpinelinux.org-4a6a0840.rsa.pub b/package/system/apk/files/alpine-keys/alpine-devel@lists.alpinelinux.org-4a6a0840.rsa.pub
-new file mode 100644
-index 0000000000..bb4bdc80fd
---- /dev/null
-+++ b/package/system/apk/files/alpine-keys/alpine-devel@lists.alpinelinux.org-4a6a0840.rsa.pub
-@@ -0,0 +1,9 @@
-+-----BEGIN PUBLIC KEY-----
-+MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEA1yHJxQgsHQREclQu4Ohe
-+qxTxd1tHcNnvnQTu/UrTky8wWvgXT+jpveroeWWnzmsYlDI93eLI2ORakxb3gA2O
-+Q0Ry4ws8vhaxLQGC74uQR5+/yYrLuTKydFzuPaS1dK19qJPXB8GMdmFOijnXX4SA
-+jixuHLe1WW7kZVtjL7nufvpXkWBGjsfrvskdNA/5MfxAeBbqPgaq0QMEfxMAn6/R
-+L5kNepi/Vr4S39Xvf2DzWkTLEK8pcnjNkt9/aafhWqFVW7m3HCAII6h/qlQNQKSo
-+GuH34Q8GsFG30izUENV9avY7hSLq7nggsvknlNBZtFUcmGoQrtx3FmyYsIC8/R+B
-+ywIDAQAB
-+-----END PUBLIC KEY-----
-diff --git a/package/system/apk/files/alpine-keys/alpine-devel@lists.alpinelinux.org-5243ef4b.rsa.pub b/package/system/apk/files/alpine-keys/alpine-devel@lists.alpinelinux.org-5243ef4b.rsa.pub
-new file mode 100644
-index 0000000000..6cbfad7441
---- /dev/null
-+++ b/package/system/apk/files/alpine-keys/alpine-devel@lists.alpinelinux.org-5243ef4b.rsa.pub
-@@ -0,0 +1,9 @@
-+-----BEGIN PUBLIC KEY-----
-+MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAvNijDxJ8kloskKQpJdx+
-+mTMVFFUGDoDCbulnhZMJoKNkSuZOzBoFC94omYPtxnIcBdWBGnrm6ncbKRlR+6oy
-+DO0W7c44uHKCFGFqBhDasdI4RCYP+fcIX/lyMh6MLbOxqS22TwSLhCVjTyJeeH7K
-+aA7vqk+QSsF4TGbYzQDDpg7+6aAcNzg6InNePaywA6hbT0JXbxnDWsB+2/LLSF2G
-+mnhJlJrWB1WGjkz23ONIWk85W4S0XB/ewDefd4Ly/zyIciastA7Zqnh7p3Ody6Q0
-+sS2MJzo7p3os1smGjUF158s6m/JbVh4DN6YIsxwl2OjDOz9R0OycfJSDaBVIGZzg
-+cQIDAQAB
-+-----END PUBLIC KEY-----
-diff --git a/package/system/apk/files/alpine-keys/alpine-devel@lists.alpinelinux.org-5261cecb.rsa.pub b/package/system/apk/files/alpine-keys/alpine-devel@lists.alpinelinux.org-5261cecb.rsa.pub
-new file mode 100644
-index 0000000000..83f0658e9c
---- /dev/null
-+++ b/package/system/apk/files/alpine-keys/alpine-devel@lists.alpinelinux.org-5261cecb.rsa.pub
-@@ -0,0 +1,9 @@
-+-----BEGIN PUBLIC KEY-----
-+MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAwlzMkl7b5PBdfMzGdCT0
-+cGloRr5xGgVmsdq5EtJvFkFAiN8Ac9MCFy/vAFmS8/7ZaGOXoCDWbYVLTLOO2qtX
-+yHRl+7fJVh2N6qrDDFPmdgCi8NaE+3rITWXGrrQ1spJ0B6HIzTDNEjRKnD4xyg4j
-+g01FMcJTU6E+V2JBY45CKN9dWr1JDM/nei/Pf0byBJlMp/mSSfjodykmz4Oe13xB
-+Ca1WTwgFykKYthoLGYrmo+LKIGpMoeEbY1kuUe04UiDe47l6Oggwnl+8XD1MeRWY
-+sWgj8sF4dTcSfCMavK4zHRFFQbGp/YFJ/Ww6U9lA3Vq0wyEI6MCMQnoSMFwrbgZw
-+wwIDAQAB
-+-----END PUBLIC KEY-----
-diff --git a/package/system/apk/files/alpine-repositories b/package/system/apk/files/alpine-repositories
-new file mode 100644
-index 0000000000..5babbb23b4
---- /dev/null
-+++ b/package/system/apk/files/alpine-repositories
-@@ -0,0 +1,3 @@
-+https://dl-cdn.alpinelinux.org/alpine/edge/main
-+https://dl-cdn.alpinelinux.org/alpine/edge/community
-+
-diff --git a/package/system/apk/patches/000-Makefile-version.patch b/package/system/apk/patches/000-Makefile-version.patch
-new file mode 100644
-index 0000000000..2e7f5b0f15
---- /dev/null
-+++ b/package/system/apk/patches/000-Makefile-version.patch
-@@ -0,0 +1,11 @@
-+--- a/Makefile
-++++ b/Makefile
-+@@ -4,7 +4,7 @@
-+ -include config.mk
-+ 
-+ PACKAGE := apk-tools
-+-VERSION := 2.12.0
-++VERSION := 3.0.0_pre0
-+ 
-+ export VERSION
-+ 
-diff --git a/package/system/apk/patches/0001-remove-doc-generation.patch b/package/system/apk/patches/0001-remove-doc-generation.patch
-new file mode 100644
-index 0000000000..dee05c56f2
---- /dev/null
-+++ b/package/system/apk/patches/0001-remove-doc-generation.patch
-@@ -0,0 +1,21 @@
-+From b05a93c48fdbb50f0c464310dc2ce45777d32ea2 Mon Sep 17 00:00:00 2001
-+From: Paul Spooren <mail@aparcar.org>
-+Date: Fri, 2 Oct 2020 14:08:52 -1000
-+Subject: [PATCH] remove doc generation
-+
-+Signed-off-by: Paul Spooren <mail@aparcar.org>
-+---
-+ Makefile | 2 +-
-+ 1 file changed, 1 insertion(+), 1 deletion(-)
-+
-+--- a/Makefile
-++++ b/Makefile
-+@@ -25,7 +25,7 @@ export DESTDIR SBINDIR LIBDIR CONFDIR MA
-+ ##
-+ # Top-level subdirs
-+ 
-+-subdirs		:= libfetch/ src/ doc/
-++subdirs		:= libfetch/ src/
-+ 
-+ ##
-+ # Include all rules and stuff
-diff --git a/package/system/apk/patches/100-link.patch b/package/system/apk/patches/100-link.patch
-new file mode 100644
-index 0000000000..9cae2787d9
---- /dev/null
-+++ b/package/system/apk/patches/100-link.patch
-@@ -0,0 +1,16 @@
-+diff -urN apk-2021-08-17-a46043bc.orig/src/Makefile apk-2021-08-17-a46043bc/src/Makefile
-+--- apk-2021-08-17-a46043bc.orig/src/Makefile	2021-08-17 14:21:04.117760513 +0200
-++++ apk-2021-08-17-a46043bc/src/Makefile	2021-08-17 14:21:16.653830180 +0200
-+@@ -65,7 +65,11 @@
-+ 	app_convdb.o app_convndx.o app_del.o app_dot.o app_extract.o app_fetch.o \
-+ 	app_fix.o app_index.o app_info.o app_list.o app_manifest.o app_mkndx.o \
-+ 	app_mkpkg.o app_policy.o app_update.o app_upgrade.o app_search.o \
-+-	app_stats.o app_verify.o app_version.o app_vertest.o applet.o
-++	app_stats.o app_verify.o app_version.o app_vertest.o applet.o \
-++	adb.o adb_comp.o adb_walk_adb.o adb_walk_genadb.o adb_walk_gentext.o adb_walk_text.o apk_adb.o \
-++	atom.o blob.o commit.o common.o context.o crypto_openssl.o database.o hash.o \
-++	extract.o extract_v2.o extract_v3.o io.o io_gunzip.o io_url.o tar.o \
-++	package.o pathbuilder.o print.o solver.o trust.o version.o
-+ 
-+ ifeq ($(ADB),y)
-+ libapk.so.$(libapk_soname)-objs += apk_adb.o
-diff --git a/package/system/apk/patches/100-phtread.patch b/package/system/apk/patches/100-phtread.patch
-new file mode 100644
-index 0000000000..c252e14dc1
---- /dev/null
-+++ b/package/system/apk/patches/100-phtread.patch
-@@ -0,0 +1,12 @@
-+diff -urN apk-2021-07-23-3d203e8f.orig/src/Makefile apk-2021-07-23-3d203e8f/src/Makefile
-+--- apk-2021-07-23-3d203e8f.orig/src/Makefile	2021-07-25 12:55:05.576564663 +0200
-++++ apk-2021-07-23-3d203e8f/src/Makefile	2021-07-25 12:55:48.660862181 +0200
-+@@ -87,7 +87,7 @@
-+ apk.static-libs		:= $(apk-static-libs)
-+ LDFLAGS_apk.static	:= -static
-+ LIBS_apk.static		:= -Wl,--as-needed -ldl -Wl,--no-as-needed
-+-LDFLAGS_apk		+= -L$(obj)
-++LDFLAGS_apk		+= -L$(obj) -pthread
-+ LDFLAGS_apk-test	+= -L$(obj)
-+ 
-+ CFLAGS_ALL		+= $(OPENSSL_CFLAGS) $(ZLIB_CFLAGS)
-diff --git a/package/system/apk/patches/100-tar-include-limits.h-to-fix-build-with-glibc.patch b/package/system/apk/patches/100-tar-include-limits.h-to-fix-build-with-glibc.patch
-new file mode 100644
-index 0000000000..43ec7d5f1a
---- /dev/null
-+++ b/package/system/apk/patches/100-tar-include-limits.h-to-fix-build-with-glibc.patch
-@@ -0,0 +1,20 @@
-+From c72ea983e287ec1d8b1f2b3aab1bf40aa7a30b03 Mon Sep 17 00:00:00 2001
-+From: Daniel Golle <daniel@makrotopia.org>
-+Date: Wed, 4 Aug 2021 21:37:40 +0100
-+Subject: [PATCH] tar: include <limits.h> to fix build with glibc
-+
-+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
-+---
-+ src/tar.c | 1 +
-+ 1 file changed, 1 insertion(+)
-+
-+--- a/src/tar.c
-++++ b/src/tar.c
-+@@ -9,6 +9,7 @@
-+ 
-+ #include <sys/stat.h>
-+ #include <sys/sysmacros.h>
-++#include <limits.h> /* for SSIZE_MAX with glibc */
-+ 
-+ #include "apk_defines.h"
-+ #include "apk_tar.h"
-diff --git a/package/system/apk/test.sh b/package/system/apk/test.sh
-new file mode 100644
-index 0000000000..814777fd70
---- /dev/null
-+++ b/package/system/apk/test.sh
-@@ -0,0 +1,9 @@
-+#!/bin/sh
-+
-+case "$1" in
-+    "apk")
-+        apk --version | grep "${2/-r*/}"
-+        ;;
-+    *)
-+        return 0;
-+esac
--- 
-2.25.1
-
diff --git a/patches/backports/0026-lua-lzlib-backport-package.patch b/patches/backports/0026-lua-lzlib-backport-package.patch
deleted file mode 100644
index 7da20ad35..000000000
--- a/patches/backports/0026-lua-lzlib-backport-package.patch
+++ /dev/null
@@ -1,104 +0,0 @@
-From ec862d472fca676cc04ce71b640e880ecefdd477 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Fri, 13 Aug 2021 08:48:02 +0200
-Subject: [PATCH 26/27] lua-lzlib: backport package
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/libs/lua-lzlib/Makefile               | 64 +++++++++++++++++++
- .../patches/001-allow_optim_flags.patch       | 12 ++++
- 2 files changed, 76 insertions(+)
- create mode 100644 package/libs/lua-lzlib/Makefile
- create mode 100644 package/libs/lua-lzlib/patches/001-allow_optim_flags.patch
-
-diff --git a/package/libs/lua-lzlib/Makefile b/package/libs/lua-lzlib/Makefile
-new file mode 100644
-index 0000000000..5e0a16b135
---- /dev/null
-+++ b/package/libs/lua-lzlib/Makefile
-@@ -0,0 +1,64 @@
-+#
-+# Copyright (C) 2015 OpenWrt.org
-+#
-+# This is free software, licensed under the GNU General Public License v2.
-+# See /LICENSE for more information.
-+#
-+
-+include $(TOPDIR)/rules.mk
-+
-+PKG_NAME:=lua-lzlib
-+PKG_VERSION:=0.4.3
-+PKG_RELEASE:=1
-+PKG_MAINTAINER:=Dirk Chang <dirk@kooiot.com>
-+PKG_LICENSE:=MIT
-+
-+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
-+PKG_MIRROR_HASH:=b6ef5e3f04b7f2137b39931a175ee802489a2486e70537770919bcccca10e723
-+PKG_SOURCE_URL:=https://github.com/LuaDist/lzlib.git
-+PKG_SOURCE_PROTO:=git
-+PKG_SOURCE_VERSION:=79329a07d8f79c19eadd7ea2752b4c4e1574b015
-+PKG_SOURCE_SUBDIR:=$(PKG_NAME)-$(PKG_VERSION)
-+
-+HOST_BUILD_DEPENDS:=lua/host
-+
-+include $(INCLUDE_DIR)/package.mk
-+include $(INCLUDE_DIR)/host-build.mk
-+
-+define Package/lua-lzlib
-+  SUBMENU:=Lua
-+  SECTION:=lang
-+  CATEGORY:=Languages
-+  TITLE:=Lua zlib binding
-+  URL:=http://github.com/LuaDist/lzlib
-+  DEPENDS:= +lua +zlib
-+endef
-+
-+define Package/lua-lzlib/description
-+	A library to access zlib library functions and also to read/write gzip files using an interface similar to the base io package. 
-+endef
-+
-+MAKE_FLAGS += \
-+	LUA="$(STAGING_DIR)/usr" \
-+	OFLAGS="$(TARGET_CFLAGS)" \
-+
-+HOST_MAKE_FLAGS += \
-+	LUA="$(STAGING_DIR_HOSTPKG)" \
-+	OFLAGS="$(HOST_CFLAGS)" \
-+
-+define Package/lua-lzlib/install
-+	$(INSTALL_DIR) $(1)/usr/lib/lua
-+	$(INSTALL_BIN) $(PKG_BUILD_DIR)/zlib.so $(1)/usr/lib/lua/
-+
-+	$(INSTALL_DATA) $(PKG_BUILD_DIR)/gzip.lua $(1)/usr/lib/lua/
-+endef
-+
-+define Host/Install
-+	$(INSTALL_DIR) $(STAGING_DIR_HOSTPKG)/lib/lua/5.1
-+	$(INSTALL_BIN) $(HOST_BUILD_DIR)/zlib.so $(STAGING_DIR_HOSTPKG)/lib/lua/5.1
-+
-+	$(INSTALL_DATA) $(HOST_BUILD_DIR)/gzip.lua $(STAGING_DIR_HOSTPKG)/lib/lua/5.1
-+endef
-+
-+$(eval $(call BuildPackage,lua-lzlib))
-+$(eval $(call HostBuild))
-diff --git a/package/libs/lua-lzlib/patches/001-allow_optim_flags.patch b/package/libs/lua-lzlib/patches/001-allow_optim_flags.patch
-new file mode 100644
-index 0000000000..78f981d237
---- /dev/null
-+++ b/package/libs/lua-lzlib/patches/001-allow_optim_flags.patch
-@@ -0,0 +1,12 @@
-+--- a/Makefile
-++++ b/Makefile
-+@@ -14,7 +14,8 @@ LUABIN= $(LUA)/bin
-+ ZLIB=../zlib-1.2.3
-+ 
-+ # no need to change anything below here
-+-CFLAGS= $(INCS) $(DEFS) $(WARN) -O0 -fPIC
-++CFLAGS= $(INCS) $(DEFS) $(WARN) $(OFLAGS) -fPIC
-++OFLAGS= -O0
-+ WARN= -g -Werror -Wall -pedantic #-ansi
-+ INCS= -I$(LUAINC) -I$(ZLIB)
-+ LIBS= -L$(ZLIB) -lz -L$(LUALIB) -L$(LUABIN) #-llua51
--- 
-2.25.1
-
diff --git a/patches/backports/0027-lua-make-it-easier-to-detect-host-built-Lua.patch b/patches/backports/0027-lua-make-it-easier-to-detect-host-built-Lua.patch
deleted file mode 100644
index 6cd7e7cfa..000000000
--- a/patches/backports/0027-lua-make-it-easier-to-detect-host-built-Lua.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 5fc717aa60b36934892d6d77c0637fc53aa7f761 Mon Sep 17 00:00:00 2001
-From: Daniel Golle <daniel@makrotopia.org>
-Date: Sat, 10 Jul 2021 20:21:26 +0100
-Subject: [PATCH 27/27] lua: make it easier to detect host-built Lua
-
-Install pkg-config file also for host-build, clean up Lua symlinks.
-
-Signed-off-by: Daniel Golle <daniel@makrotopia.org>
-(cherry picked from commit 315f52e0f3bfa3d65ad14ca21a696c6d31c4edcd)
----
- package/utils/lua/Makefile | 8 ++++++--
- 1 file changed, 6 insertions(+), 2 deletions(-)
-
-diff --git a/package/utils/lua/Makefile b/package/utils/lua/Makefile
-index d262d1e1fc..e15142d8d2 100644
---- a/package/utils/lua/Makefile
-+++ b/package/utils/lua/Makefile
-@@ -134,8 +134,12 @@ define Host/Install
- 		INSTALL_TOP="$(STAGING_DIR_HOSTPKG)" \
- 		install
- 
--	$(LN) $(STAGING_DIR_HOSTPKG)/bin/lua5.1 $(STAGING_DIR_HOSTPKG)/bin/lua
--	$(LN) $(STAGING_DIR_HOSTPKG)/bin/luac5.1 $(STAGING_DIR_HOSTPKG)/bin/luac
-+	$(INSTALL_DIR) $(STAGING_DIR_HOSTPKG)/lib/pkgconfig
-+	$(CP) $(HOST_BUILD_DIR)/etc/lua.pc $(STAGING_DIR_HOSTPKG)/lib/pkgconfig/lua5.1.pc
-+
-+	$(LN) lua5.1 $(STAGING_DIR_HOSTPKG)/bin/lua
-+	$(LN) luac5.1 $(STAGING_DIR_HOSTPKG)/bin/luac
-+	$(LN) lua5.1.pc $(STAGING_DIR_HOSTPKG)/lib/pkgconfig/lua.pc
- endef
- 
- define Build/InstallDev
--- 
-2.25.1
-
diff --git a/patches/backports/0028-libnl-tiny-update-to-latest-HEAD.patch b/patches/backports/0028-libnl-tiny-update-to-latest-HEAD.patch
deleted file mode 100644
index db48cc7bc..000000000
--- a/patches/backports/0028-libnl-tiny-update-to-latest-HEAD.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From bd346c1fa7f205b10f1aa8f1f4e4e89c3a80c13d Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Thu, 26 May 2022 09:01:48 +0200
-Subject: [PATCH 1/4] libnl-tiny: update to latest HEAD
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/libs/libnl-tiny/Makefile | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/package/libs/libnl-tiny/Makefile b/package/libs/libnl-tiny/Makefile
-index bdb496c48e..48df6a4c8c 100644
---- a/package/libs/libnl-tiny/Makefile
-+++ b/package/libs/libnl-tiny/Makefile
-@@ -8,13 +8,13 @@
- include $(TOPDIR)/rules.mk
- 
- PKG_NAME:=libnl-tiny
--PKG_RELEASE:=2
-+PKG_RELEASE:=1
- 
- PKG_SOURCE_PROTO:=git
- PKG_SOURCE_URL=$(PROJECT_GIT)/project/libnl-tiny.git
--PKG_SOURCE_DATE:=2020-08-05
--PKG_SOURCE_VERSION:=c291088f631d1694f7ba0444b59677b194348da8
--PKG_MIRROR_HASH:=99bcce12701bb34dadb39689d95c2c5cf1e27719d0ecfd645d3957a8947025ac
-+PKG_SOURCE_DATE:=2022-05-17
-+PKG_SOURCE_VERSION:=b5b2ba09c4f1c8b3c21580aea7223edc2f5e92be
-+PKG_MIRROR_HASH:=b957d56aa8c2e7b55184111be69eb8dea734f1feba19e670a91f302459a48a78
- CMAKE_INSTALL:=1
- 
- PKG_LICENSE:=LGPL-2.1
-@@ -27,7 +27,7 @@ define Package/libnl-tiny
-   SECTION:=libs
-   CATEGORY:=Libraries
-   TITLE:=netlink socket library
--  ABI_VERSION:=1
-+  ABI_VERSION:=$(PKG_SOURCE_DATE)
- endef
- 
- define Package/libnl-tiny/description
--- 
-2.25.1
-
diff --git a/patches/backports/0031-ubus-update-to-the-latest-version.patch b/patches/backports/0031-ubus-update-to-the-latest-version.patch
deleted file mode 100644
index 8cb8d3b58..000000000
--- a/patches/backports/0031-ubus-update-to-the-latest-version.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From d4e24006e05474b6dbe582f7c56a505cc0c45e81 Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Mon, 1 Nov 2021 11:59:41 +0100
-Subject: [PATCH] ubus: update to the latest version
-
-b743a331421d ubusd: log ACL init errors
-2099bb3ad997 libubus: use list_empty/list_first_entry in ubus_process_pending_msg
-ef038488edc3 libubus: process pending messages in data handler if stack depth is 0
-a72457b61df0 libubus: increase stack depth for processing obj msgs
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- package/system/ubus/Makefile | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/package/system/ubus/Makefile b/package/system/ubus/Makefile
-index 8a3fd1de7b..d5f86b6850 100644
---- a/package/system/ubus/Makefile
-+++ b/package/system/ubus/Makefile
-@@ -5,9 +5,9 @@ PKG_RELEASE:=2
- 
- PKG_SOURCE_PROTO:=git
- PKG_SOURCE_URL=$(PROJECT_GIT)/project/ubus.git
--PKG_SOURCE_DATE:=2021-06-30
--PKG_SOURCE_VERSION:=4fc532c8a55ba8217ad67d7fd47c5eb9a8aba044
--PKG_MIRROR_HASH:=a5c8205f2e2b2f1f9ad687592e66a6e2bf8900dc54cfe3ceefe6c297d18971a8
-+PKG_SOURCE_DATE:=2021-08-09
-+PKG_SOURCE_VERSION:=a72457b61df045d3c499a6211362b751710590d7
-+PKG_MIRROR_HASH:=ac617577bcb2ff3dbc3039ad67200afcce910840223a2de15977d3224e6557fd
- PKG_ABI_VERSION:=$(call abi_version_str,$(PKG_SOURCE_DATE))
- CMAKE_INSTALL:=1
- 
--- 
-2.25.1
-
diff --git a/patches/backports/0032-rpcd-bump-to-git-HEAD.patch b/patches/backports/0032-rpcd-bump-to-git-HEAD.patch
deleted file mode 100644
index 9e002aea5..000000000
--- a/patches/backports/0032-rpcd-bump-to-git-HEAD.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 49ceb8a8d7009e5c81599c68b8aacc16d17d2e62 Mon Sep 17 00:00:00 2001
-From: Stijn Tintel <stijn@linux-ipv6.be>
-Date: Tue, 9 Nov 2021 17:20:41 +0100
-Subject: [PATCH] rpcd: bump to git HEAD
-
- 20bf958 session: use uloop_timeout_remaining64
- d11ffe9 session: use blobmsg_get_u64 for RPC_DUMP_EXPIRES
-
-Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
----
- package/system/rpcd/Makefile | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/package/system/rpcd/Makefile b/package/system/rpcd/Makefile
-index 0896a7dada..af788dcfaa 100644
---- a/package/system/rpcd/Makefile
-+++ b/package/system/rpcd/Makefile
-@@ -12,10 +12,10 @@ PKG_RELEASE:=1
- 
- PKG_SOURCE_PROTO:=git
- PKG_SOURCE_URL=$(PROJECT_GIT)/project/rpcd.git
--PKG_SOURCE_DATE:=2021-03-11
--PKG_SOURCE_VERSION:=ccb75178cf6a726896729c6904bd623636aa0b29
-+PKG_MIRROR_HASH:=98071b4a1ce983a0e738d7e4a2f6e52b7f6db19f99510ddef430093314134ca4
-+PKG_SOURCE_DATE:=2021-11-04
-+PKG_SOURCE_VERSION:=d11ffe9383ae0ec34836421926364b24c1d891ca
- PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
--PKG_MIRROR_HASH:=87b1839275c209f9767057d6da5272cae973a064767fa28f380a37fb65e2e643
- 
- PKG_LICENSE:=ISC
- PKG_LICENSE_FILES:=
--- 
-2.25.1
-
diff --git a/patches/backports/0033-net-bridge-clear-bridge-s-private-skb-space-on-xmit.patch b/patches/backports/0033-net-bridge-clear-bridge-s-private-skb-space-on-xmit.patch
deleted file mode 100644
index cefdab0de..000000000
--- a/patches/backports/0033-net-bridge-clear-bridge-s-private-skb-space-on-xmit.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 9bede53698b963280df8b7c3c85c052e66e9d548 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Thu, 17 Feb 2022 08:27:09 +0100
-Subject: [PATCH] net: bridge: clear bridge's private skb space on xmit
-
-We need to clear all of the bridge private skb variables as they can be
-stale due to the packet being recirculated through the stack and then
-transmitted through the bridge device. Similar memset is already done on
-bridge's input. We've seen cases where proxyarp_replied was 1 on routed
-multicast packets transmitted through the bridge to ports with neigh
-suppress which were getting dropped. Same thing can in theory happen with
-the port isolation bit as well.
-
-Fixes: 821f1b21cabb ("bridge: add new BR_NEIGH_SUPPRESS port flag to suppress arp and nd flood")
-Signed-off-by: Nikolay Aleksandrov <nikolay@cumulusnetworks.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- ...r-bridge-s-private-skb-space-on-xmit.patch | 36 +++++++++++++++++++
- 1 file changed, 36 insertions(+)
- create mode 100644 target/linux/generic/backport-5.4/999-net-bridge-clear-bridge-s-private-skb-space-on-xmit.patch
-
-diff --git a/target/linux/generic/backport-5.4/999-net-bridge-clear-bridge-s-private-skb-space-on-xmit.patch b/target/linux/generic/backport-5.4/999-net-bridge-clear-bridge-s-private-skb-space-on-xmit.patch
-new file mode 100644
-index 0000000000..20f71569da
---- /dev/null
-+++ b/target/linux/generic/backport-5.4/999-net-bridge-clear-bridge-s-private-skb-space-on-xmit.patch
-@@ -0,0 +1,36 @@
-+From fd65e5a95d08389444e8591a20538b3edece0e15 Mon Sep 17 00:00:00 2001
-+From: Nikolay Aleksandrov <nikolay@cumulusnetworks.com>
-+Date: Fri, 31 Jul 2020 19:26:16 +0300
-+Subject: [PATCH] net: bridge: clear bridge's private skb space on xmit
-+
-+We need to clear all of the bridge private skb variables as they can be
-+stale due to the packet being recirculated through the stack and then
-+transmitted through the bridge device. Similar memset is already done on
-+bridge's input. We've seen cases where proxyarp_replied was 1 on routed
-+multicast packets transmitted through the bridge to ports with neigh
-+suppress which were getting dropped. Same thing can in theory happen with
-+the port isolation bit as well.
-+
-+Fixes: 821f1b21cabb ("bridge: add new BR_NEIGH_SUPPRESS port flag to suppress arp and nd flood")
-+Signed-off-by: Nikolay Aleksandrov <nikolay@cumulusnetworks.com>
-+Signed-off-by: David S. Miller <davem@davemloft.net>
-+---
-+ net/bridge/br_device.c | 2 ++
-+ 1 file changed, 2 insertions(+)
-+
-+diff --git a/net/bridge/br_device.c b/net/bridge/br_device.c
-+index 8c7b78f8bc23..9a2fb4aa1a10 100644
-+--- a/net/bridge/br_device.c
-++++ b/net/bridge/br_device.c
-+@@ -36,6 +36,8 @@ netdev_tx_t br_dev_xmit(struct sk_buff *skb, struct net_device *dev)
-+ 	const unsigned char *dest;
-+ 	u16 vid = 0;
-+ 
-++	memset(skb->cb, 0, sizeof(struct br_input_skb_cb));
-++
-+ 	rcu_read_lock();
-+ 	nf_ops = rcu_dereference(nf_br_ops);
-+ 	if (nf_ops && nf_ops->br_dev_xmit_hook(skb)) {
-+-- 
-+2.25.1
-+
--- 
-2.25.1
-
diff --git a/patches/backports/0033-netifd-on-dhcp-interfaces-store-the-dhcp-server-in-i.patch b/patches/backports/0033-netifd-on-dhcp-interfaces-store-the-dhcp-server-in-i.patch
deleted file mode 100644
index ec97b916e..000000000
--- a/patches/backports/0033-netifd-on-dhcp-interfaces-store-the-dhcp-server-in-i.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From a3598bcbc83224faf0d2ecb55761d048a1beb6d1 Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Fri, 10 Dec 2021 10:16:18 +0100
-Subject: [PATCH] netifd: on dhcp interfaces, store the dhcp server in
- interface data
-
-Among other things, this can be used to auto-configure the DHCP server
-address for wireless APs using FILS, if the bridged interface is
-configured to DHCP
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- package/network/config/netifd/files/lib/netifd/dhcp.script | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/package/network/config/netifd/files/lib/netifd/dhcp.script b/package/network/config/netifd/files/lib/netifd/dhcp.script
-index e46005d84c..6fcf139beb 100755
---- a/package/network/config/netifd/files/lib/netifd/dhcp.script
-+++ b/package/network/config/netifd/files/lib/netifd/dhcp.script
-@@ -60,6 +60,7 @@ setup_interface () {
- 	[ -n "$message" ]  && json_add_string message "$message"
- 	[ -n "$timezone" ] && json_add_int timezone "$timezone"
- 	[ -n "$lease" ]    && json_add_int leasetime "$lease"
-+	[ -n "$serverid" ] && json_add_string dhcpserver "$serverid"
- 	proto_close_data
- 
- 	proto_send_update "$INTERFACE"
--- 
-2.25.1
-
diff --git a/patches/backports/0034-hostapd-add-owe_transition_ifname.patch b/patches/backports/0034-hostapd-add-owe_transition_ifname.patch
deleted file mode 100644
index edb1177a4..000000000
--- a/patches/backports/0034-hostapd-add-owe_transition_ifname.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 574539ee2cdbb3dd54086423c6dfdd19bb1c06a6 Mon Sep 17 00:00:00 2001
-From: David Bauer <mail@david-bauer.net>
-Date: Thu, 16 Jun 2022 01:55:26 +0200
-Subject: [PATCH] hostapd: add owe_transition_ifname
-
-Add the owe_transition_ifname config option to wifi-ifaces.
-
-This allows to configure OWE transition VAPs without adding SSID / BSSID
-to the uci conifg but instead autodiscovering these parameters from
-other networks on the same PHY.
-
-The following configuration creates a OWE transition mode network
-constellation.
-
-config wifi-iface 'open0'
-	option device 'radio0'
-	option ifname 'open0'
-	option network 'lan'
-	option mode 'ap'
-	option ssid 'FreeNet'
-	option encryption 'none'
-	option owe_transition_ifname 'owe0'
-
-config wifi-iface 'owe0'
-	option device 'radio0'
-	option ifname 'owe0'
-	option network 'lan'
-	option mode 'ap'
-	option ssid 'owe_tm.FreeNet'
-	option encryption 'owe'
-	option hidden '1'
-	option owe_transition_ifname 'open0'
-
-Signed-off-by: David Bauer <mail@david-bauer.net>
----
- package/network/services/hostapd/files/hostapd.sh | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/package/network/services/hostapd/files/hostapd.sh b/package/network/services/hostapd/files/hostapd.sh
-index e5f816a55b..fa344bd2dd 100644
---- a/package/network/services/hostapd/files/hostapd.sh
-+++ b/package/network/services/hostapd/files/hostapd.sh
-@@ -335,6 +335,7 @@ hostapd_common_add_bss_config() {
- 	config_add_int sae_pwe
- 
- 	config_add_string 'owe_transition_bssid:macaddr' 'owe_transition_ssid:string'
-+	config_add_string owe_transition_ifname
- 
- 	config_add_boolean iw_enabled iw_internet iw_asra iw_esr iw_uesa
- 	config_add_int iw_access_network_type iw_venue_group iw_venue_type
-@@ -635,10 +636,11 @@ hostapd_set_bss_options() {
- 
- 	case "$auth_type" in
- 		none|owe)
--			json_get_vars owe_transition_bssid owe_transition_ssid
-+			json_get_vars owe_transition_bssid owe_transition_ssid owe_transition_ifname
- 
- 			[ -n "$owe_transition_ssid" ] && append bss_conf "owe_transition_ssid=\"$owe_transition_ssid\"" "$N"
- 			[ -n "$owe_transition_bssid" ] && append bss_conf "owe_transition_bssid=$owe_transition_bssid" "$N"
-+			[ -n "$owe_transition_ifname" ] && append bss_conf "owe_transition_ifname=$owe_transition_ifname" "$N"
- 
- 			wps_possible=1
- 			# Here we make the assumption that if we're in open mode
--- 
-2.25.1
-
diff --git a/patches/backports/0035-bpftools-update-to-latest-HEAD.patch b/patches/backports/0035-bpftools-update-to-latest-HEAD.patch
deleted file mode 100644
index f6769693e..000000000
--- a/patches/backports/0035-bpftools-update-to-latest-HEAD.patch
+++ /dev/null
@@ -1,271 +0,0 @@
-From a613510bc023dfbf838a2127c94644a56252efcd Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Mon, 11 Jul 2022 13:49:14 +0200
-Subject: [PATCH] bpftools: update to latest HEAD
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- ...pc-fix-EDEADLOCK-redefinition-errors.patch | 56 ------------
- package/{network => }/utils/bpftools/Makefile | 86 ++++++++-----------
- .../utils/bpftools/patches/001-cflags.patch   | 10 +++
- .../utils/bpftools/patches/002-includes.patch | 26 ++++++
- 4 files changed, 70 insertions(+), 108 deletions(-)
- delete mode 100644 package/network/utils/bpftools/patches/005-tools-arch-powerpc-fix-EDEADLOCK-redefinition-errors.patch
- rename package/{network => }/utils/bpftools/Makefile (60%)
- create mode 100644 package/utils/bpftools/patches/001-cflags.patch
- create mode 100644 package/utils/bpftools/patches/002-includes.patch
-
-diff --git a/package/network/utils/bpftools/patches/005-tools-arch-powerpc-fix-EDEADLOCK-redefinition-errors.patch b/package/network/utils/bpftools/patches/005-tools-arch-powerpc-fix-EDEADLOCK-redefinition-errors.patch
-deleted file mode 100644
-index 66c00a325f..0000000000
---- a/package/network/utils/bpftools/patches/005-tools-arch-powerpc-fix-EDEADLOCK-redefinition-errors.patch
-+++ /dev/null
-@@ -1,56 +0,0 @@
--From afe3f4c765b17ced23811fe652c7f7adf7a0c0cf Mon Sep 17 00:00:00 2001
--From: Tony Ambardar <Tony.Ambardar@gmail.com>
--Date: Mon, 14 Sep 2020 23:05:26 -0700
--Subject: [PATCH] tools/arch/powerpc: fix EDEADLOCK redefinition errors in
-- errno.h
--
--A few archs like powerpc have different errno.h values for macros
--EDEADLOCK and EDEADLK. In code including both libc and linux versions of
--errno.h, this can result in multiple definitions of EDEADLOCK in the
--include chain. Definitions to the same value (e.g. seen with mips) do
--not raise warnings, but on powerpc there are redefinitions changing the
--value, which raise warnings and errors (with "-Werror").
--
--Guard against these redefinitions to avoid build errors like the following,
--first seen cross-compiling libbpf v5.8.9 for powerpc using GCC 8.4.0 with
--musl 1.1.24:
--
--  In file included from ../../arch/powerpc/include/uapi/asm/errno.h:5,
--                   from ../../include/linux/err.h:8,
--                   from libbpf.c:29:
--  ../../include/uapi/asm-generic/errno.h:40: error: "EDEADLOCK" redefined [-Werror]
--   #define EDEADLOCK EDEADLK
--
--  In file included from toolchain-powerpc_8540_gcc-8.4.0_musl/include/errno.h:10,
--                   from libbpf.c:26:
--  toolchain-powerpc_8540_gcc-8.4.0_musl/include/bits/errno.h:58: note: this is the location of the previous definition
--   #define EDEADLOCK       58
--
--  cc1: all warnings being treated as errors
--  make[5]: *** [target-powerpc_8540_musl/bpftools-5.8.9/tools/build/Makefile.build:97: /home/kodidev/openwrt-project/build_dir/target-powerpc_8540_musl/bpftools-minimal/bpftools-5.8.9//libbpf/staticobjs/libbpf.o] Error 1
--
--Fixes: 95f28190aa01 ("tools include arch: Grab a copy of errno.h for arch's
--                      supported by perf")
--Fixes: c3617f72036c ("UAPI: (Scripted) Disintegrate arch/powerpc/include/asm")
--
--Reported-by: Rosen Penev <rosenp@gmail.com>
--Signed-off-by: Tony Ambardar <Tony.Ambardar@gmail.com>
-----
-- tools/arch/powerpc/include/uapi/asm/errno.h | 1 +
-- 1 file changed, 1 insertion(+)
--
--diff --git a/tools/arch/powerpc/include/uapi/asm/errno.h b/tools/arch/powerpc/include/uapi/asm/errno.h
--index cc79856896a1..4ba87de32be0 100644
----- a/tools/arch/powerpc/include/uapi/asm/errno.h
--+++ b/tools/arch/powerpc/include/uapi/asm/errno.h
--@@ -2,6 +2,7 @@
-- #ifndef _ASM_POWERPC_ERRNO_H
-- #define _ASM_POWERPC_ERRNO_H
-- 
--+#undef	EDEADLOCK
-- #include <asm-generic/errno.h>
-- 
-- #undef	EDEADLOCK
---- 
--2.25.1
--
-diff --git a/package/network/utils/bpftools/Makefile b/package/utils/bpftools/Makefile
-similarity index 60%
-rename from package/network/utils/bpftools/Makefile
-rename to package/utils/bpftools/Makefile
-index 82eb34e2dc..56422e7902 100644
---- a/package/network/utils/bpftools/Makefile
-+++ b/package/utils/bpftools/Makefile
-@@ -8,12 +8,14 @@
- include $(TOPDIR)/rules.mk
- 
- PKG_NAME:=bpftools
--PKG_VERSION:=5.10.10
--PKG_RELEASE:=2
-+PKG_RELEASE:=1
- 
--PKG_SOURCE:=linux-$(PKG_VERSION).tar.xz
--PKG_SOURCE_URL:=@KERNEL/linux/kernel/v5.x
--PKG_HASH:=60ed866fa951522a5255ea37ec3ac2006d3f3427d4783a13ef478464f37cdb19
-+PKG_SOURCE_URL:=https://github.com/libbpf/bpftool
-+PKG_SOURCE_PROTO:=git
-+PKG_SOURCE_DATE:=2022-03-08
-+PKG_SOURCE_VERSION:=04c465fd1f561f67796dc68bbfe1aa7cfa956c3c
-+PKG_MIRROR_HASH:=e22a954cd186f43228a96586bbdc120b11e6c87360ab88ae96ba37afb9c7cb58
-+PKG_ABI_VERSION:=$(call abi_version_str,$(PKG_SOURCE_DATE))
- 
- PKG_MAINTAINER:=Tony Ambardar <itugrok@yahoo.com>
- 
-@@ -21,16 +23,6 @@ PKG_USE_MIPS16:=0
- PKG_BUILD_PARALLEL:=1
- PKG_INSTALL:=1
- 
--LINUX_VERSION:=$(PKG_VERSION)
--LINUX_TLD:=linux-$(LINUX_VERSION)
--
--BPF_FILES:= \
--	kernel/bpf scripts tools/Makefile tools/bpf tools/perf/perf-sys.h \
--	tools/arch tools/build tools/include tools/lib tools/scripts
--TAR_OPTIONS+= \
--	--transform="s;$(LINUX_TLD)/;$(PKG_NAME)-$(PKG_VERSION)/;" \
--	$(addprefix $(LINUX_TLD)/,$(BPF_FILES))
--
- include $(INCLUDE_DIR)/package.mk
- include $(INCLUDE_DIR)/nls.mk
- 
-@@ -77,7 +69,7 @@ define Package/libbpf
-   TITLE:=libbpf - eBPF helper library
-   VARIANT:=lib
-   LICENSE:=LGPL-2.1 OR BSD-2-Clause
--  ABI_VERSION:=0
-+  ABI_VERSION:=$(PKG_ABI_VERSION)
-   URL:=http://www.kernel.org
-   DEPENDS:=+libelf
- endef
-@@ -93,53 +85,43 @@ ifneq ($(BUILD_VARIANT),lib)
-   TARGET_LDFLAGS += -Wl,--gc-sections
- endif
- 
--MAKE_FLAGS += \
-+ifeq ($(BUILD_VARIANT),full)
-+  full:=1
-+else
-+  full:=0
-+endif
-+
-+MAKE_VARS = \
- 	EXTRA_CFLAGS="$(TARGET_CFLAGS) $(TARGET_CPPFLAGS)" \
--	LDFLAGS="$(TARGET_LDFLAGS)" \
--	BPFTOOL_VERSION="$(LINUX_VERSION)" \
--	FEATURES_DUMP="$(PKG_BUILD_DIR)/FEATURE-DUMP.openwrt" \
-+	LDFLAGS="$(TARGET_LDFLAGS)"
-+
-+MAKE_FLAGS += \
- 	OUTPUT="$(PKG_BUILD_DIR)/" \
- 	prefix="/usr" \
--	$(if $(findstring c,$(OPENWRT_VERBOSE)),V=1,V='')
-+	$(if $(findstring c,$(OPENWRT_VERBOSE)),V=1,V='') \
-+	LIBSUBDIR=lib \
-+	check_feat=0 \
-+	feature-clang-bpf-co-re=0 \
-+	feature-reallocarray=1 \
-+	feature-zlib=1 \
-+	feature-libbfd=$(full) \
-+	feature-libcap=0 \
-+	feature-disassembler-four-args=$(full)
- 
--ifeq ($(BUILD_VARIANT),full)
--  HAVE_LIBBFD:=1
--  HAVE_LIBCAP:=0
--  HAVE_CLANG:=0
--  MAKE_PATH:=tools/bpf/bpftool
--else ifeq ($(BUILD_VARIANT),minimal)
--  HAVE_LIBBFD:=0
--  HAVE_LIBCAP:=0
--  HAVE_CLANG:=0
--  MAKE_PATH:=tools/bpf/bpftool
--else ifeq ($(BUILD_VARIANT),lib)
--  HAVE_LIBBFD:=0
--  HAVE_LIBCAP:=0
--  HAVE_CLANG:=0
--  MAKE_PATH:=tools/lib/bpf
-+ifeq ($(BUILD_VARIANT),lib)
-+  MAKE_PATH = libbpf/src
-+else
-+  MAKE_PATH = src
- endif
- 
--# Perform a "throw-away" make to create a FEATURE-DUMP.* file to edit later.
--# The "//" in the make target is actually needed, very unPOSIXly.
--define Build/Configure
--	+$(MAKE_VARS) $(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR)/tools/bpf/bpftool \
--		$(MAKE_FLAGS) FEATURES_DUMP= $(PKG_BUILD_DIR)//libbpf/libbpf.a
--	(cd $(PKG_BUILD_DIR); cat FEATURE-DUMP.bpftool libbpf/FEATURE-DUMP.libbpf \
--		| sort | uniq > FEATURE-DUMP.openwrt)
--	$(SED) 's/feature-libbfd=1/feature-libbfd=$(HAVE_LIBBFD)/' \
--		-e 's/feature-libcap=1/feature-libcap=$(HAVE_LIBCAP)/' \
--		-e 's/feature-clang-bpf-global-var=1/feature-clang-bpf-global-var=$(HAVE_CLANG)/' \
--		$(PKG_BUILD_DIR)/FEATURE-DUMP.openwrt
--endef
--
- define Build/InstallDev/libbpf
- 	$(INSTALL_DIR) $(1)/usr/include/bpf
- 	$(CP) $(PKG_INSTALL_DIR)/usr/include/bpf/*.h $(1)/usr/include/bpf/
- 	$(INSTALL_DIR) $(1)/usr/lib
--	$(CP) $(PKG_INSTALL_DIR)/usr/lib$(LIB_SUFFIX)/libbpf.{a,so*} \
-+	$(CP) $(PKG_INSTALL_DIR)/usr/lib/libbpf.{a,so*} \
- 		$(1)/usr/lib/
- 	$(INSTALL_DIR) $(1)/usr/lib/pkgconfig
--	$(CP) $(PKG_INSTALL_DIR)/usr/lib$(LIB_SUFFIX)/pkgconfig/libbpf.pc \
-+	$(CP) $(PKG_INSTALL_DIR)/usr/lib/pkgconfig/libbpf.pc \
- 		$(1)/usr/lib/pkgconfig/
- 	$(SED) 's,/usr/include,$$$${prefix}/include,g' \
- 		$(1)/usr/lib/pkgconfig/libbpf.pc
-@@ -159,7 +141,7 @@ endef
- 
- define Package/libbpf/install
- 	$(INSTALL_DIR) $(1)/usr/lib
--	$(CP) $(PKG_INSTALL_DIR)/usr/lib$(LIB_SUFFIX)/libbpf.so.* $(1)/usr/lib/
-+	$(CP) $(PKG_INSTALL_DIR)/usr/lib/libbpf.so.* $(1)/usr/lib/
- endef
- 
- $(eval $(call BuildPackage,libbpf))
-diff --git a/package/utils/bpftools/patches/001-cflags.patch b/package/utils/bpftools/patches/001-cflags.patch
-new file mode 100644
-index 0000000000..48617e302b
---- /dev/null
-+++ b/package/utils/bpftools/patches/001-cflags.patch
-@@ -0,0 +1,10 @@
-+--- a/libbpf/src/Makefile
-++++ b/libbpf/src/Makefile
-+@@ -25,6 +25,7 @@ ALL_CFLAGS := $(INCLUDES)
-+ 
-+ SHARED_CFLAGS += -fPIC -fvisibility=hidden -DSHARED
-+ 
-++CFLAGS = $(EXTRA_CFLAGS)
-+ CFLAGS ?= -g -O2 -Werror -Wall -std=gnu89
-+ ALL_CFLAGS += $(CFLAGS) -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64
-+ ALL_LDFLAGS += $(LDFLAGS)
-diff --git a/package/utils/bpftools/patches/002-includes.patch b/package/utils/bpftools/patches/002-includes.patch
-new file mode 100644
-index 0000000000..589d71c31e
---- /dev/null
-+++ b/package/utils/bpftools/patches/002-includes.patch
-@@ -0,0 +1,26 @@
-+--- a/libbpf/include/linux/list.h
-++++ b/libbpf/include/linux/list.h
-+@@ -3,6 +3,8 @@
-+ #ifndef __LINUX_LIST_H
-+ #define __LINUX_LIST_H
-+ 
-++#include <linux/types.h>
-++
-+ #define LIST_HEAD_INIT(name) { &(name), &(name) }
-+ #define LIST_HEAD(name) \
-+         struct list_head name = LIST_HEAD_INIT(name)
-+--- a/src/Makefile
-++++ b/src/Makefile
-+@@ -73,10 +73,10 @@ CFLAGS += -W -Wall -Wextra -Wno-unused-p
-+ CFLAGS += $(filter-out -Wswitch-enum -Wnested-externs,$(EXTRA_WARNINGS))
-+ CFLAGS += -DPACKAGE='"bpftool"' -D__EXPORTED_HEADERS__ \
-+ 	-I$(if $(OUTPUT),$(OUTPUT),.) \
-+-	-I$(LIBBPF_INCLUDE) \
-+ 	-I$(srctree)/src/kernel/bpf/ \
-+ 	-I$(srctree)/include \
-+-	-I$(srctree)/include/uapi
-++	-I$(srctree)/include/uapi \
-++	-I$(LIBBPF_INCLUDE)
-+ ifneq ($(BPFTOOL_VERSION),)
-+ CFLAGS += -DBPFTOOL_VERSION='"$(BPFTOOL_VERSION)"'
-+ endif
--- 
-2.25.1
-
diff --git a/patches/backports/0036-openssl-backport-from-22.06-rc3.patch b/patches/backports/0036-openssl-backport-from-22.06-rc3.patch
deleted file mode 100644
index 55031e639..000000000
--- a/patches/backports/0036-openssl-backport-from-22.06-rc3.patch
+++ /dev/null
@@ -1,779 +0,0 @@
-From 5cd97adeb33f5fc92ad1ff319b4ba34535c0a65b Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Tue, 23 Aug 2022 08:59:23 +0200
-Subject: [PATCH] openssl: backport from 22.06-rc3
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- include/openssl-engine.mk                     | 50 +++++++++++
- package/libs/openssl/Config.in                | 11 ---
- package/libs/openssl/Makefile                 | 64 ++++++--------
- package/libs/openssl/files/afalg.cnf          |  3 +
- package/libs/openssl/files/devcrypto.cnf      | 31 +++++++
- package/libs/openssl/files/openssl.init       | 31 +++++++
- package/libs/openssl/files/padlock.cnf        |  3 +
- ...m-ppc-xlate.pl-add-linux64v2-flavour.patch | 56 +++++++++++++
- .../patches/100-Configure-afalg-support.patch |  5 +-
- .../openssl/patches/110-openwrt_targets.patch |  9 +-
- .../120-strip-cflags-from-binary.patch        |  3 +-
- .../patches/130-dont-build-tests-fuzz.patch   |  3 +-
- .../patches/140-allow-prefer-chacha20.patch   |  4 +-
- .../150-openssl.cnf-add-engines-conf.patch    | 83 ++++---------------
- ...o-save-ioctl-if-EVP_MD_.FLAG_ONESHOT.patch |  3 +-
- ...ypto-add-command-to-dump-driver-info.patch |  3 +-
- ...o-make-the-dev-crypto-engine-dynamic.patch | 12 +--
- ...default-to-not-use-digests-in-engine.patch |  1 -
- ...to-ignore-error-when-closing-session.patch |  1 -
- 19 files changed, 232 insertions(+), 144 deletions(-)
- create mode 100644 include/openssl-engine.mk
- create mode 100644 package/libs/openssl/files/afalg.cnf
- create mode 100644 package/libs/openssl/files/devcrypto.cnf
- create mode 100755 package/libs/openssl/files/openssl.init
- create mode 100644 package/libs/openssl/files/padlock.cnf
- create mode 100644 package/libs/openssl/patches/001-crypto-perlasm-ppc-xlate.pl-add-linux64v2-flavour.patch
-
-diff --git a/include/openssl-engine.mk b/include/openssl-engine.mk
-new file mode 100644
-index 0000000000..d8baba482e
---- /dev/null
-+++ b/include/openssl-engine.mk
-@@ -0,0 +1,50 @@
-+# SPDX-License-Identifier: GPL-2.0-only
-+#
-+# Copyright (C) 2022 Enéas Ulir de Queiroz
-+
-+ENGINES_DIR=engines-1.1
-+
-+define Package/openssl/engine/Default
-+  SECTION:=libs
-+  CATEGORY:=Libraries
-+  SUBMENU:=SSL
-+  DEPENDS:=libopenssl @OPENSSL_ENGINE +libopenssl-conf
-+endef
-+
-+# 1 = engine name
-+# 2 - package name, defaults to libopenssl-$(1)
-+define Package/openssl/add-engine
-+  OSSL_ENG_PKG:=$(if $(2),$(2),libopenssl-$(1))
-+  Package/$$(OSSL_ENG_PKG)/conffiles:=/etc/ssl/engines.cnf.d/$(1).cnf
-+
-+  define Package/$$(OSSL_ENG_PKG)/install
-+	$$(INSTALL_DIR)  $$(1)/usr/lib/$(ENGINES_DIR)
-+	$$(INSTALL_BIN)  $$(PKG_INSTALL_DIR)/usr/lib/$(ENGINES_DIR)/$(1).so \
-+			 $$(1)/usr/lib/$(ENGINES_DIR)
-+	$$(INSTALL_DIR)  $$(1)/etc/ssl/engines.cnf.d
-+	$$(INSTALL_DATA) ./files/$(1).cnf $$(1)/etc/ssl/engines.cnf.d/
-+  endef
-+
-+  define Package/$$(OSSL_ENG_PKG)/postinst :=
-+#!/bin/sh
-+OPENSSL_UCI="$$$${IPKG_INSTROOT}/etc/config/openssl"
-+
-+[ -z "$$$${IPKG_INSTROOT}" ] && uci -q get openssl.$(1) >/dev/null && exit 0
-+
-+cat << EOF >> "$$$${OPENSSL_UCI}"
-+
-+config engine '$(1)'
-+	option enabled '1'
-+EOF
-+
-+[ -n "$$$${IPKG_INSTROOT}" ] || /etc/init.d/openssl reload
-+  endef
-+
-+  define Package/$$(OSSL_ENG_PKG)/postrm :=
-+#!/bin/sh
-+[ -n "$$$${IPKG_INSTROOT}" ] && exit 0
-+uci delete openssl.$(1)
-+uci commit openssl
-+/etc/init.d/openssl reload
-+  endef
-+endef
-diff --git a/package/libs/openssl/Config.in b/package/libs/openssl/Config.in
-index d1281ec6fa..bc2f0584b6 100644
---- a/package/libs/openssl/Config.in
-+++ b/package/libs/openssl/Config.in
-@@ -293,15 +293,4 @@ config OPENSSL_WITH_ASYNC
- 		initiate crypto operations asynchronously. In order to work
- 		this will require the presence of an async capable engine.
- 
--config OPENSSL_WITH_GOST
--	bool
--	prompt "Prepare library for GOST engine"
--	depends on OPENSSL_ENGINE
--	help
--		This option prepares the library to accept engine support
--		for Russian GOST crypto algorithms.
--		The gost engine is not included in standard openwrt feeds.
--		To build such engine yourself, see:
--		https://github.com/gost-engine/engine
--
- endif
-diff --git a/package/libs/openssl/Makefile b/package/libs/openssl/Makefile
-index 0397ab90c4..09bada3915 100644
---- a/package/libs/openssl/Makefile
-+++ b/package/libs/openssl/Makefile
-@@ -9,11 +9,10 @@ include $(TOPDIR)/rules.mk
- 
- PKG_NAME:=openssl
- PKG_BASE:=1.1.1
--PKG_BUGFIX:=l
-+PKG_BUGFIX:=q
- PKG_VERSION:=$(PKG_BASE)$(PKG_BUGFIX)
--PKG_RELEASE:=1
-+PKG_RELEASE:=$(AUTORELEASE)
- PKG_USE_MIPS16:=0
--ENGINES_DIR=engines-1.1
- 
- PKG_BUILD_PARALLEL:=1
- 
-@@ -26,7 +25,7 @@ PKG_SOURCE_URL:= \
- 	ftp://ftp.pca.dfn.de/pub/tools/net/openssl/source/ \
- 	ftp://ftp.pca.dfn.de/pub/tools/net/openssl/source/old/$(PKG_BASE)/
- 
--PKG_HASH:=0b7a3e5e59c34827fe0c3a74b7ec8baef302b98fa80088d7f9153aa16fa76bd1
-+PKG_HASH:=d7939ce614029cdff0b6c20f0e2e5703158a489a72b2507b8bd51bf8c8fd10ca
- 
- PKG_LICENSE:=OpenSSL
- PKG_LICENSE_FILES:=LICENSE
-@@ -52,7 +51,6 @@ PKG_CONFIG_DEPENDS:= \
- 	CONFIG_OPENSSL_WITH_DTLS \
- 	CONFIG_OPENSSL_WITH_EC2M \
- 	CONFIG_OPENSSL_WITH_ERROR_MESSAGES \
--	CONFIG_OPENSSL_WITH_GOST \
- 	CONFIG_OPENSSL_WITH_IDEA \
- 	CONFIG_OPENSSL_WITH_MDC2 \
- 	CONFIG_OPENSSL_WITH_NPN \
-@@ -66,6 +64,7 @@ PKG_CONFIG_DEPENDS:= \
- 	CONFIG_OPENSSL_WITH_WHIRLPOOL
- 
- include $(INCLUDE_DIR)/package.mk
-+include $(INCLUDE_DIR)/openssl-engine.mk
- 
- ifneq ($(CONFIG_CCACHE),)
- HOSTCC=$(HOSTCC_NOCACHE)
-@@ -129,6 +128,8 @@ endef
- 
- define Package/libopenssl-conf/conffiles
- /etc/ssl/openssl.cnf
-+$(if CONFIG_OPENSSL_ENGINE_BUILTIN_DEVCRYPTO,/etc/ssl/engines.cnf.d/devcrypto.cnf)
-+$(if CONFIG_OPENSSL_ENGINE_BUILTIN_PADLOCK,/etc/ssl/engines.cnf.d/padlock.cnf)
- endef
- 
- define Package/libopenssl-conf/description
-@@ -136,51 +137,50 @@ $(call Package/openssl/Default/description)
- This package installs the OpenSSL configuration file /etc/ssl/openssl.cnf.
- endef
- 
-+$(eval $(call Package/openssl/add-engine,afalg))
- define Package/libopenssl-afalg
-   $(call Package/openssl/Default)
--  SUBMENU:=SSL
-+  $(call Package/openssl/engine/Default)
-   TITLE:=AFALG hardware acceleration engine
--  DEPENDS:=libopenssl @OPENSSL_ENGINE @KERNEL_AIO \
--	   +PACKAGE_libopenssl-afalg:kmod-crypto-user +libopenssl-conf @!OPENSSL_ENGINE_BUILTIN
-+  DEPENDS += @KERNEL_AIO +PACKAGE_libopenssl-afalg:kmod-crypto-user \
-+	     @!OPENSSL_ENGINE_BUILTIN
- endef
- 
- define Package/libopenssl-afalg/description
- This package adds an engine that enables hardware acceleration
- through the AF_ALG kernel interface.
--To use it, you need to configure the engine in /etc/ssl/openssl.cnf
- See https://www.openssl.org/docs/man1.1.1/man5/config.html#Engine-Configuration-Module
- and https://openwrt.org/docs/techref/hardware/cryptographic.hardware.accelerators
- The engine_id is "afalg"
- endef
- 
-+$(eval $(call Package/openssl/add-engine,devcrypto))
- define Package/libopenssl-devcrypto
-   $(call Package/openssl/Default)
--  SUBMENU:=SSL
-+  $(call Package/openssl/engine/Default)
-   TITLE:=/dev/crypto hardware acceleration engine
--  DEPENDS:=libopenssl @OPENSSL_ENGINE +PACKAGE_libopenssl-devcrypto:kmod-cryptodev +libopenssl-conf \
--	   @!OPENSSL_ENGINE_BUILTIN
-+  DEPENDS += +PACKAGE_libopenssl-devcrypto:kmod-cryptodev @!OPENSSL_ENGINE_BUILTIN
- endef
- 
- define Package/libopenssl-devcrypto/description
- This package adds an engine that enables hardware acceleration
- through the /dev/crypto kernel interface.
--To use it, you need to configure the engine in /etc/ssl/openssl.cnf
- See https://www.openssl.org/docs/man1.1.1/man5/config.html#Engine-Configuration-Module
- and https://openwrt.org/docs/techref/hardware/cryptographic.hardware.accelerators
- The engine_id is "devcrypto"
- endef
- 
-+$(eval $(call Package/openssl/add-engine,padlock))
- define Package/libopenssl-padlock
-   $(call Package/openssl/Default)
--  SUBMENU:=SSL
-+  $(call Package/openssl/engine/Default)
-   TITLE:=VIA Padlock hardware acceleration engine
--  DEPENDS:=libopenssl @OPENSSL_ENGINE @TARGET_x86 +PACKAGE_libopenssl-padlock:kmod-crypto-hw-padlock \
--	   +libopenssl-conf @!OPENSSL_ENGINE_BUILTIN
-+  DEPENDS += @TARGET_x86 +PACKAGE_libopenssl-padlock:kmod-crypto-hw-padlock \
-+	     @!OPENSSL_ENGINE_BUILTIN
- endef
- 
- define Package/libopenssl-padlock/description
- This package adds an engine that enables VIA Padlock hardware acceleration.
--To use it, you need to configure it in /etc/ssl/openssl.cnf.
- See https://www.openssl.org/docs/man1.1.1/man5/config.html#Engine-Configuration-Module
- and https://openwrt.org/docs/techref/hardware/cryptographic.hardware.accelerators
- The engine_id is "padlock"
-@@ -289,10 +289,6 @@ else
-   OPENSSL_OPTIONS += no-engine
- endif
- 
--ifndef CONFIG_OPENSSL_WITH_GOST
--  OPENSSL_OPTIONS += no-gost
--endif
--
- ifndef CONFIG_OPENSSL_WITH_DTLS
-   OPENSSL_OPTIONS += no-dtls
- endif
-@@ -381,8 +377,17 @@ define Package/libopenssl/install
- endef
- 
- define Package/libopenssl-conf/install
--	$(INSTALL_DIR) $(1)/etc/ssl
-+	$(INSTALL_DIR) $(1)/etc/ssl/engines.cnf.d $(1)/etc/config $(1)/etc/init.d
- 	$(CP) $(PKG_INSTALL_DIR)/etc/ssl/openssl.cnf $(1)/etc/ssl/
-+	$(INSTALL_BIN) ./files/openssl.init $(1)/etc/init.d/openssl
-+	$(SED) 's!%ENGINES_DIR%!/usr/lib/$(ENGINES_DIR)!' $(1)/etc/init.d/openssl
-+	touch $(1)/etc/config/openssl
-+	$(if $(CONFIG_OPENSSL_ENGINE_BUILTIN_DEVCRYPTO),
-+		$(CP) ./files/devcrypto.cnf $(1)/etc/ssl/engines.cnf.d/
-+		echo -e "config engine 'devcrypto'\n\toption enabled '1'" >> $(1)/etc/config/openssl)
-+	$(if $(CONFIG_OPENSSL_ENGINE_BUILTIN_PADLOCK),
-+		$(CP) ./files/padlock.cnf $(1)/etc/ssl/engines.cnf.d/
-+		echo -e "\nconfig engine 'padlock'\n\toption enabled '1'" >> $(1)/etc/config/openssl)
- endef
- 
- define Package/openssl-util/install
-@@ -390,21 +395,6 @@ define Package/openssl-util/install
- 	$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/openssl $(1)/usr/bin/
- endef
- 
--define Package/libopenssl-afalg/install
--	$(INSTALL_DIR) $(1)/usr/lib/$(ENGINES_DIR)
--	$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/lib/$(ENGINES_DIR)/afalg.so $(1)/usr/lib/$(ENGINES_DIR)
--endef
--
--define Package/libopenssl-devcrypto/install
--	$(INSTALL_DIR) $(1)/usr/lib/$(ENGINES_DIR)
--	$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/lib/$(ENGINES_DIR)/devcrypto.so $(1)/usr/lib/$(ENGINES_DIR)
--endef
--
--define Package/libopenssl-padlock/install
--	$(INSTALL_DIR) $(1)/usr/lib/$(ENGINES_DIR)
--	$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/lib/$(ENGINES_DIR)/*padlock.so $(1)/usr/lib/$(ENGINES_DIR)
--endef
--
- $(eval $(call BuildPackage,libopenssl))
- $(eval $(call BuildPackage,libopenssl-conf))
- $(eval $(call BuildPackage,libopenssl-afalg))
-diff --git a/package/libs/openssl/files/afalg.cnf b/package/libs/openssl/files/afalg.cnf
-new file mode 100644
-index 0000000000..4f573d757c
---- /dev/null
-+++ b/package/libs/openssl/files/afalg.cnf
-@@ -0,0 +1,3 @@
-+[afalg]
-+default_algorithms = ALL
-+
-diff --git a/package/libs/openssl/files/devcrypto.cnf b/package/libs/openssl/files/devcrypto.cnf
-new file mode 100644
-index 0000000000..549275600d
---- /dev/null
-+++ b/package/libs/openssl/files/devcrypto.cnf
-@@ -0,0 +1,31 @@
-+[devcrypto]
-+# Leave this alone and configure algorithms with CIPERS/DIGESTS below
-+default_algorithms = ALL
-+
-+# Configuration commands:
-+# Run 'openssl engine -t -c -vv -pre DUMP_INFO devcrypto' to see a
-+# list of supported algorithms, along with their driver, whether they
-+# are hw accelerated or not, and the engine's configuration commands.
-+
-+# USE_SOFTDRIVERS: specifies whether to use software (not accelerated)
-+# drivers (0=use only accelerated drivers, 1=allow all drivers, 2=use
-+# if acceleration can't be determined) [default=2]
-+#USE_SOFTDRIVERS = 2
-+
-+# CIPHERS: either ALL, NONE, or a comma-separated list of ciphers to
-+# enable [default=ALL]
-+# It is recommended to disable the ECB ciphers; in most cases, it will
-+# only be used for PRNG, in small blocks, where performance is poor,
-+# and there may be problems with apps forking with open crypto
-+# contexts, leading to failures.  The CBC ciphers work well:
-+#CIPHERS=DES-CBC, DES-EDE3-CBC, AES-128-CBC, AES-192-CBC, AES-256-CBC
-+
-+# DIGESTS: either ALL, NONE, or a comma-separated list of digests to
-+# enable [default=NONE]
-+# It is strongly recommended not to enable digests; their performance
-+# is poor, and there are many cases in which they will not work,
-+# especially when calling fork with open crypto contexts.  Openssh,
-+# for example, does this, and you may not be able to login.
-+#DIGESTS = NONE
-+
-+
-diff --git a/package/libs/openssl/files/openssl.init b/package/libs/openssl/files/openssl.init
-new file mode 100755
-index 0000000000..21e253e7a5
---- /dev/null
-+++ b/package/libs/openssl/files/openssl.init
-@@ -0,0 +1,31 @@
-+#!/bin/sh /etc/rc.common
-+
-+START=13
-+ENGINES_CNF_D="/etc/ssl/engines.cnf.d"
-+ENGINES_CNF="/var/etc/ssl/engines.cnf"
-+ENGINES_DIR="%ENGINES_DIR%"
-+
-+config_engine() {
-+	local enabled force
-+	config_get_bool enabled "$1" enabled 1
-+	config_get_bool force "$1" force 0
-+	[ "$enabled" = 0 ] && return
-+	if [ "$force" = 0 ] && \
-+	   [ ! -f "${ENGINES_CNF_D}/$1.cnf" ] && \
-+	   [ ! -f "${ENGINES_DIR}/$1.so" ]; then
-+	    echo Skipping engine "$1": not installed
-+	    return
-+	fi
-+	echo Enabling engine "$1"
-+	echo "$1=$1" >> "${ENGINES_CNF}"
-+}
-+
-+start() {
-+	mkdir -p "$(dirname "${ENGINES_CNF}")" || exit 1
-+	echo Generating engines.cnf
-+	echo "# This file is automatically generated from /etc/config/openssl." \
-+	      > "${ENGINES_CNF}" || \
-+	      { echo Error writing ${ENGINES_CNF} >&2; exit 1; }
-+        config_load openssl
-+	config_foreach config_engine engine
-+}
-diff --git a/package/libs/openssl/files/padlock.cnf b/package/libs/openssl/files/padlock.cnf
-new file mode 100644
-index 0000000000..ef91079e5d
---- /dev/null
-+++ b/package/libs/openssl/files/padlock.cnf
-@@ -0,0 +1,3 @@
-+[padlock]
-+default_algorithms = ALL
-+
-diff --git a/package/libs/openssl/patches/001-crypto-perlasm-ppc-xlate.pl-add-linux64v2-flavour.patch b/package/libs/openssl/patches/001-crypto-perlasm-ppc-xlate.pl-add-linux64v2-flavour.patch
-new file mode 100644
-index 0000000000..e52a3d52ea
---- /dev/null
-+++ b/package/libs/openssl/patches/001-crypto-perlasm-ppc-xlate.pl-add-linux64v2-flavour.patch
-@@ -0,0 +1,56 @@
-+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-+From: Andy Polyakov <appro@openssl.org>
-+Date: Sun, 5 May 2019 18:25:50 +0200
-+Subject: crypto/perlasm/ppc-xlate.pl: add linux64v2 flavour
-+MIME-Version: 1.0
-+Content-Type: text/plain; charset=UTF-8
-+Content-Transfer-Encoding: 8bit
-+
-+This is a big endian ELFv2 configuration. ELFv2 was already being
-+used for little endian, and big endian was traditionally ELFv1
-+but there are practical configurations that use ELFv2 with big
-+endian nowadays (Adélie Linux, Void Linux, possibly Gentoo, etc.)
-+
-+Reviewed-by: Paul Dale <paul.dale@oracle.com>
-+Reviewed-by: Richard Levitte <levitte@openssl.org>
-+(Merged from https://github.com/openssl/openssl/pull/8883)
-+
-+diff --git a/crypto/perlasm/ppc-xlate.pl b/crypto/perlasm/ppc-xlate.pl
-+--- a/crypto/perlasm/ppc-xlate.pl
-++++ b/crypto/perlasm/ppc-xlate.pl
-+@@ -49,7 +49,7 @@ my $globl = sub {
-+ 	/osx/		&& do { $name = "_$name";
-+ 				last;
-+ 			      };
-+-	/linux.*(32|64le)/
-++	/linux.*(32|64(le|v2))/
-+ 			&& do {	$ret .= ".globl	$name";
-+ 				if (!$$type) {
-+ 				    $ret .= "\n.type	$name,\@function";
-+@@ -80,7 +80,7 @@ my $globl = sub {
-+ };
-+ my $text = sub {
-+     my $ret = ($flavour =~ /aix/) ? ".csect\t.text[PR],7" : ".text";
-+-    $ret = ".abiversion	2\n".$ret	if ($flavour =~ /linux.*64le/);
-++    $ret = ".abiversion	2\n".$ret	if ($flavour =~ /linux.*64(le|v2)/);
-+     $ret;
-+ };
-+ my $machine = sub {
-+@@ -186,7 +186,7 @@ my $vmr = sub {
-+ 
-+ # Some ABIs specify vrsave, special-purpose register #256, as reserved
-+ # for system use.
-+-my $no_vrsave = ($flavour =~ /aix|linux64le/);
-++my $no_vrsave = ($flavour =~ /aix|linux64(le|v2)/);
-+ my $mtspr = sub {
-+     my ($f,$idx,$ra) = @_;
-+     if ($idx == 256 && $no_vrsave) {
-+@@ -318,7 +318,7 @@ while($line=<>) {
-+ 	if ($label) {
-+ 	    my $xlated = ($GLOBALS{$label} or $label);
-+ 	    print "$xlated:";
-+-	    if ($flavour =~ /linux.*64le/) {
-++	    if ($flavour =~ /linux.*64(le|v2)/) {
-+ 		if ($TYPES{$label} =~ /function/) {
-+ 		    printf "\n.localentry	%s,0\n",$xlated;
-+ 		}
-diff --git a/package/libs/openssl/patches/100-Configure-afalg-support.patch b/package/libs/openssl/patches/100-Configure-afalg-support.patch
-index 98944103b5..3125e37a94 100644
---- a/package/libs/openssl/patches/100-Configure-afalg-support.patch
-+++ b/package/libs/openssl/patches/100-Configure-afalg-support.patch
-@@ -1,4 +1,4 @@
--From 559fbff13af9ce2fbc0b9bc5727a7323e1db6217 Mon Sep 17 00:00:00 2001
-+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
- From: Eneas U de Queiroz <cote2004-github@yahoo.com>
- Date: Thu, 27 Sep 2018 08:29:21 -0300
- Subject: Do not use host kernel version to disable AFALG
-@@ -9,10 +9,9 @@ version to disable building the AFALG engine on openwrt targets.
- Signed-off-by: Eneas U de Queiroz <cote2004-github@yahoo.com>
- 
- diff --git a/Configure b/Configure
--index 5a699836f3..74d057c219 100755
- --- a/Configure
- +++ b/Configure
--@@ -1545,7 +1545,9 @@ unless ($disabled{"crypto-mdebug-backtrace"})
-+@@ -1548,7 +1548,9 @@ unless ($disabled{"crypto-mdebug-backtrace"})
-  
-  unless ($disabled{afalgeng}) {
-      $config{afalgeng}="";
-diff --git a/package/libs/openssl/patches/110-openwrt_targets.patch b/package/libs/openssl/patches/110-openwrt_targets.patch
-index d0530b4661..9d5db6cfd1 100644
---- a/package/libs/openssl/patches/110-openwrt_targets.patch
-+++ b/package/libs/openssl/patches/110-openwrt_targets.patch
-@@ -1,4 +1,4 @@
--From 3d43acc6068f00dbfc0c9a06355e2c8f7d302d0f Mon Sep 17 00:00:00 2001
-+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
- From: Eneas U de Queiroz <cote2004-github@yahoo.com>
- Date: Thu, 27 Sep 2018 08:30:24 -0300
- Subject: Add openwrt targets
-@@ -9,10 +9,9 @@ Signed-off-by: Eneas U de Queiroz <cote2004-github@yahoo.com>
- 
- diff --git a/Configurations/25-openwrt.conf b/Configurations/25-openwrt.conf
- new file mode 100644
--index 0000000000..86a86d31e4
- --- /dev/null
- +++ b/Configurations/25-openwrt.conf
--@@ -0,0 +1,48 @@
-+@@ -0,0 +1,52 @@
- +## Openwrt "CONFIG_ARCH" matching targets.
- +
- +# The targets need to end in '-openwrt' for the AFALG patch to work
-@@ -52,6 +51,10 @@ index 0000000000..86a86d31e4
- +    "linux-powerpc-openwrt" => {
- +        inherit_from    => [ "linux-ppc", "openwrt" ],
- +    },
-++    "linux-powerpc64-openwrt" => {
-++        inherit_from    => [ "linux-ppc64", "openwrt" ],
-++        perlasm_scheme  => "linux64v2",
-++    },
- +    "linux-x86_64-openwrt" => {
- +        inherit_from    => [ "linux-x86_64", "openwrt" ],
- +    },
-diff --git a/package/libs/openssl/patches/120-strip-cflags-from-binary.patch b/package/libs/openssl/patches/120-strip-cflags-from-binary.patch
-index 7faec9ab88..20fe21f2ac 100644
---- a/package/libs/openssl/patches/120-strip-cflags-from-binary.patch
-+++ b/package/libs/openssl/patches/120-strip-cflags-from-binary.patch
-@@ -1,4 +1,4 @@
--From 4ad8f2fe6bf3b91df7904fcbe960e5fdfca36336 Mon Sep 17 00:00:00 2001
-+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
- From: Eneas U de Queiroz <cote2004-github@yahoo.com>
- Date: Thu, 27 Sep 2018 08:31:38 -0300
- Subject: Avoid exposing build directories
-@@ -9,7 +9,6 @@ OpenSSL_version(OPENSSL_CFLAGS), or running openssl version -a
- Signed-off-by: Eneas U de Queiroz <cote2004-github@yahoo.com>
- 
- diff --git a/crypto/build.info b/crypto/build.info
--index 2c619c62e8..893128345a 100644
- --- a/crypto/build.info
- +++ b/crypto/build.info
- @@ -10,7 +10,7 @@ EXTRA=  ../ms/uplink-x86.pl ../ms/uplink.c ../ms/applink.c \
-diff --git a/package/libs/openssl/patches/130-dont-build-tests-fuzz.patch b/package/libs/openssl/patches/130-dont-build-tests-fuzz.patch
-index 7f33cb9dae..4707554d2d 100644
---- a/package/libs/openssl/patches/130-dont-build-tests-fuzz.patch
-+++ b/package/libs/openssl/patches/130-dont-build-tests-fuzz.patch
-@@ -1,4 +1,4 @@
--From ba2fe646f2d9104a18b066e43582154049e9ffcb Mon Sep 17 00:00:00 2001
-+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
- From: Eneas U de Queiroz <cote2004-github@yahoo.com>
- Date: Thu, 27 Sep 2018 08:34:38 -0300
- Subject: Do not build tests and fuzz directories
-@@ -8,7 +8,6 @@ This shortens build time.
- Signed-off-by: Eneas U de Queiroz <cote2004-github@yahoo.com>
- 
- diff --git a/Configure b/Configure
--index 74d057c219..5813e9f8fe 100755
- --- a/Configure
- +++ b/Configure
- @@ -318,7 +318,7 @@ my $auto_threads=1;    # enable threads automatically? true by default
-diff --git a/package/libs/openssl/patches/140-allow-prefer-chacha20.patch b/package/libs/openssl/patches/140-allow-prefer-chacha20.patch
-index b293db28f7..b2418006a9 100644
---- a/package/libs/openssl/patches/140-allow-prefer-chacha20.patch
-+++ b/package/libs/openssl/patches/140-allow-prefer-chacha20.patch
-@@ -1,4 +1,4 @@
--From 4f7ab2040bb71f03a8f8388911144559aa2a5b60 Mon Sep 17 00:00:00 2001
-+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
- From: Eneas U de Queiroz <cote2004-github@yahoo.com>
- Date: Thu, 27 Sep 2018 08:44:39 -0300
- Subject: Add OPENSSL_PREFER_CHACHA_OVER_GCM option
-@@ -15,7 +15,6 @@ when the client has it on top of its ciphersuite preference.
- Signed-off-by: Eneas U de Queiroz <cote2004-github@yahoo.com>
- 
- diff --git a/include/openssl/ssl.h b/include/openssl/ssl.h
--index 6724ccf2d2..96d959427e 100644
- --- a/include/openssl/ssl.h
- +++ b/include/openssl/ssl.h
- @@ -173,9 +173,15 @@ extern "C" {
-@@ -38,7 +37,6 @@ index 6724ccf2d2..96d959427e 100644
-  #  define TLS_DEFAULT_CIPHERSUITES "TLS_AES_256_GCM_SHA384:" \
-                                     "TLS_AES_128_GCM_SHA256"
- diff --git a/ssl/ssl_ciph.c b/ssl/ssl_ciph.c
--index 27a1b2ec68..7039811323 100644
- --- a/ssl/ssl_ciph.c
- +++ b/ssl/ssl_ciph.c
- @@ -1467,11 +1467,29 @@ STACK_OF(SSL_CIPHER) *ssl_create_cipher_list(const SSL_METHOD *ssl_method,
-diff --git a/package/libs/openssl/patches/150-openssl.cnf-add-engines-conf.patch b/package/libs/openssl/patches/150-openssl.cnf-add-engines-conf.patch
-index 81d41963c6..8851116347 100644
---- a/package/libs/openssl/patches/150-openssl.cnf-add-engines-conf.patch
-+++ b/package/libs/openssl/patches/150-openssl.cnf-add-engines-conf.patch
-@@ -1,6 +1,17 @@
-+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-+From: Eneas U de Queiroz <cotequeiroz@gmail.com>
-+Date: Sat, 27 Mar 2021 17:43:25 -0300
-+Subject: openssl.cnf: add engine configuration
-+
-+This adds configuration options for engines, loading all cnf files under
-+/etc/ssl/engines.cnf.d/.
-+
-+Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
-+
-+diff --git a/apps/openssl.cnf b/apps/openssl.cnf
- --- a/apps/openssl.cnf
- +++ b/apps/openssl.cnf
--@@ -22,6 +22,82 @@ oid_section		= new_oids
-+@@ -22,6 +22,16 @@ oid_section		= new_oids
-  # (Alternatively, use a configuration file that has only
-  # X.509v3 extensions in its main [= default] section.)
-  
-@@ -10,75 +21,9 @@
- +engines=engines
- +
- +[engines]
--+# To enable an engine, install the package, and uncomment it here:
--+#devcrypto=devcrypto
--+#afalg=afalg
--+#padlock=padlock
-++.include /var/etc/ssl/engines.cnf
- +
--+[afalg]
--+# Leave this alone and configure algorithms with CIPERS/DIGESTS below
--+default_algorithms = ALL
--+
--+# The following commands are only available if using the alternative
--+# (sync) AFALG engine
--+# Configuration commands:
--+# Run 'openssl engine -t -c -vv -pre DUMP_INFO devcrypto' to see a
--+# list of supported algorithms, along with their driver, whether they
--+# are hw accelerated or not, and the engine's configuration commands.
--+
--+# USE_SOFTDRIVERS: specifies whether to use software (not accelerated)
--+# drivers (0=use only accelerated drivers, 1=allow all drivers, 2=use
--+# if acceleration can't be determined) [default=2]
--+#USE_SOFTDRIVERS = 2
--+
--+# CIPHERS: either ALL, NONE, NO_ECB (all except ECB-mode) or a
--+# comma-separated list of ciphers to enable [default=NO_ECB]
--+# Starting in 1.2.0, if you use a cipher list, each cipher may be
--+# followed by a colon (:) and the minimum request length to use
--+# AF_ALG drivers for that cipher; smaller requests are processed by
--+# softare; a negative value will use the default for that cipher
--+#CIPHERS=AES-128-CBC:1024, AES-256-CBC:768, DES-EDE3-CBC:0
--+
--+# DIGESTS: either ALL, NONE, or a comma-separated list of digests to
--+# enable [default=NONE]
--+# It is strongly recommended not to enable digests; their performance
--+# is poor, and there are many cases in which they will not work,
--+# especially when calling fork with open crypto contexts.  Openssh,
--+# for example, does this, and you may not be able to login.
--+#DIGESTS = NONE
--+
--+[devcrypto]
--+# Leave this alone and configure algorithms with CIPERS/DIGESTS below
--+default_algorithms = ALL
--+
--+# Configuration commands:
--+# Run 'openssl engine -t -c -vv -pre DUMP_INFO devcrypto' to see a
--+# list of supported algorithms, along with their driver, whether they
--+# are hw accelerated or not, and the engine's configuration commands.
--+
--+# USE_SOFTDRIVERS: specifies whether to use software (not accelerated)
--+# drivers (0=use only accelerated drivers, 1=allow all drivers, 2=use
--+# if acceleration can't be determined) [default=2]
--+#USE_SOFTDRIVERS = 2
--+
--+# CIPHERS: either ALL, NONE, or a comma-separated list of ciphers to
--+# enable [default=ALL]
--+# It is recommended to disable the ECB ciphers; in most cases, it will
--+# only be used for PRNG, in small blocks, where performance is poor,
--+# and there may be problems with apps forking with open crypto
--+# contexts, leading to failures.  The CBC ciphers work well:
--+#CIPHERS=DES-CBC, DES-EDE3-CBC, AES-128-CBC, AES-192-CBC, AES-256-CBC
--+
--+# DIGESTS: either ALL, NONE, or a comma-separated list of digests to
--+# enable [default=NONE]
--+# It is strongly recommended not to enable digests; their performance
--+# is poor, and there are many cases in which they will not work,
--+# especially when calling fork with open crypto contexts.  Openssh,
--+# for example, does this, and you may not be able to login.
--+#DIGESTS = NONE
--+
--+[padlock]
--+default_algorithms = ALL
-++.include /etc/ssl/engines.cnf.d
- +
-  [ new_oids ]
-  
-diff --git a/package/libs/openssl/patches/400-eng_devcrypto-save-ioctl-if-EVP_MD_.FLAG_ONESHOT.patch b/package/libs/openssl/patches/400-eng_devcrypto-save-ioctl-if-EVP_MD_.FLAG_ONESHOT.patch
-index 84c68b16a2..71c9fdd438 100644
---- a/package/libs/openssl/patches/400-eng_devcrypto-save-ioctl-if-EVP_MD_.FLAG_ONESHOT.patch
-+++ b/package/libs/openssl/patches/400-eng_devcrypto-save-ioctl-if-EVP_MD_.FLAG_ONESHOT.patch
-@@ -1,4 +1,4 @@
--From f14345422747a495a52f9237a43b8be189f21912 Mon Sep 17 00:00:00 2001
-+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
- From: Eneas U de Queiroz <cote2004-github@yahoo.com>
- Date: Mon, 5 Nov 2018 15:54:17 -0200
- Subject: eng_devcrypto: save ioctl if EVP_MD_..FLAG_ONESHOT
-@@ -15,7 +15,6 @@ Reviewed-by: Richard Levitte <levitte@openssl.org>
- (Merged from https://github.com/openssl/openssl/pull/7585)
- 
- diff --git a/crypto/engine/eng_devcrypto.c b/crypto/engine/eng_devcrypto.c
--index a727c6f646..a2c9a966f7 100644
- --- a/crypto/engine/eng_devcrypto.c
- +++ b/crypto/engine/eng_devcrypto.c
- @@ -461,6 +461,7 @@ struct digest_ctx {
-diff --git a/package/libs/openssl/patches/420-eng_devcrypto-add-command-to-dump-driver-info.patch b/package/libs/openssl/patches/420-eng_devcrypto-add-command-to-dump-driver-info.patch
-index ad83a51a10..83989a3625 100644
---- a/package/libs/openssl/patches/420-eng_devcrypto-add-command-to-dump-driver-info.patch
-+++ b/package/libs/openssl/patches/420-eng_devcrypto-add-command-to-dump-driver-info.patch
-@@ -1,4 +1,4 @@
--From 78e7b1cc7119622645bc5a8542c55b6c95dc7868 Mon Sep 17 00:00:00 2001
-+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
- From: Eneas U de Queiroz <cote2004-github@yahoo.com>
- Date: Tue, 6 Nov 2018 22:54:07 -0200
- Subject: eng_devcrypto: add command to dump driver info
-@@ -12,7 +12,6 @@ Reviewed-by: Richard Levitte <levitte@openssl.org>
- (Merged from https://github.com/openssl/openssl/pull/7585)
- 
- diff --git a/crypto/engine/eng_devcrypto.c b/crypto/engine/eng_devcrypto.c
--index 5ec38ca8f3..64dc6b891d 100644
- --- a/crypto/engine/eng_devcrypto.c
- +++ b/crypto/engine/eng_devcrypto.c
- @@ -50,16 +50,20 @@ static int use_softdrivers = DEVCRYPTO_DEFAULT_USE_SOFDTRIVERS;
-diff --git a/package/libs/openssl/patches/430-e_devcrypto-make-the-dev-crypto-engine-dynamic.patch b/package/libs/openssl/patches/430-e_devcrypto-make-the-dev-crypto-engine-dynamic.patch
-index ea3f8fb8a7..da9b704501 100644
---- a/package/libs/openssl/patches/430-e_devcrypto-make-the-dev-crypto-engine-dynamic.patch
-+++ b/package/libs/openssl/patches/430-e_devcrypto-make-the-dev-crypto-engine-dynamic.patch
-@@ -9,7 +9,6 @@ engines/e_devcrypto.c.
- Signed-off-by: Eneas U de Queiroz <cote2004-github@yahoo.com>
- 
- diff --git a/crypto/engine/build.info b/crypto/engine/build.info
--index e00802a3fd..47fe948966 100644
- --- a/crypto/engine/build.info
- +++ b/crypto/engine/build.info
- @@ -6,6 +6,3 @@ SOURCE[../../libcrypto]=\
-@@ -20,10 +19,9 @@ index e00802a3fd..47fe948966 100644
- -  SOURCE[../../libcrypto]=eng_devcrypto.c
- -ENDIF
- diff --git a/crypto/init.c b/crypto/init.c
--index 1b0d523bea..ee3e2eb075 100644
- --- a/crypto/init.c
- +++ b/crypto/init.c
--@@ -329,18 +329,6 @@ DEFINE_RUN_ONCE_STATIC(ossl_init_engine_openssl)
-+@@ -328,18 +328,6 @@ DEFINE_RUN_ONCE_STATIC(ossl_init_engine_openssl)
-      engine_load_openssl_int();
-      return 1;
-  }
-@@ -42,7 +40,7 @@ index 1b0d523bea..ee3e2eb075 100644
-  
-  # ifndef OPENSSL_NO_RDRAND
-  static CRYPTO_ONCE engine_rdrand = CRYPTO_ONCE_STATIC_INIT;
--@@ -365,6 +353,18 @@ DEFINE_RUN_ONCE_STATIC(ossl_init_engine_dynamic)
-+@@ -364,6 +352,18 @@ DEFINE_RUN_ONCE_STATIC(ossl_init_engine_dynamic)
-      return 1;
-  }
-  # ifndef OPENSSL_NO_STATIC_ENGINE
-@@ -61,7 +59,7 @@ index 1b0d523bea..ee3e2eb075 100644
-  #  if !defined(OPENSSL_NO_HW) && !defined(OPENSSL_NO_HW_PADLOCK)
-  static CRYPTO_ONCE engine_padlock = CRYPTO_ONCE_STATIC_INIT;
-  DEFINE_RUN_ONCE_STATIC(ossl_init_engine_padlock)
--@@ -713,11 +713,6 @@ int OPENSSL_init_crypto(uint64_t opts, const OPENSSL_INIT_SETTINGS *settings)
-+@@ -704,11 +704,6 @@ int OPENSSL_init_crypto(uint64_t opts, const OPENSSL_INIT_SETTINGS *settings)
-      if ((opts & OPENSSL_INIT_ENGINE_OPENSSL)
-              && !RUN_ONCE(&engine_openssl, ossl_init_engine_openssl))
-          return 0;
-@@ -73,7 +71,7 @@ index 1b0d523bea..ee3e2eb075 100644
-  # ifndef OPENSSL_NO_RDRAND
-      if ((opts & OPENSSL_INIT_ENGINE_RDRAND)
-              && !RUN_ONCE(&engine_rdrand, ossl_init_engine_rdrand))
--@@ -727,6 +722,11 @@ int OPENSSL_init_crypto(uint64_t opts, const OPENSSL_INIT_SETTINGS *settings)
-+@@ -718,6 +713,11 @@ int OPENSSL_init_crypto(uint64_t opts, const OPENSSL_INIT_SETTINGS *settings)
-              && !RUN_ONCE(&engine_dynamic, ossl_init_engine_dynamic))
-          return 0;
-  # ifndef OPENSSL_NO_STATIC_ENGINE
-@@ -86,7 +84,6 @@ index 1b0d523bea..ee3e2eb075 100644
-      if ((opts & OPENSSL_INIT_ENGINE_PADLOCK)
-              && !RUN_ONCE(&engine_padlock, ossl_init_engine_padlock))
- diff --git a/engines/build.info b/engines/build.info
--index 1db771971c..33a25d7004 100644
- --- a/engines/build.info
- +++ b/engines/build.info
- @@ -11,6 +11,9 @@ IF[{- !$disabled{"engine"} -}]
-@@ -116,7 +113,6 @@ diff --git a/crypto/engine/eng_devcrypto.c b/engines/e_devcrypto.c
- similarity index 95%
- rename from crypto/engine/eng_devcrypto.c
- rename to engines/e_devcrypto.c
--index 2c1b52d572..eff1ed3a7d 100644
- --- a/crypto/engine/eng_devcrypto.c
- +++ b/engines/e_devcrypto.c
- @@ -7,7 +7,7 @@
-diff --git a/package/libs/openssl/patches/500-e_devcrypto-default-to-not-use-digests-in-engine.patch b/package/libs/openssl/patches/500-e_devcrypto-default-to-not-use-digests-in-engine.patch
-index 1f1cd7a582..fd4701307e 100644
---- a/package/libs/openssl/patches/500-e_devcrypto-default-to-not-use-digests-in-engine.patch
-+++ b/package/libs/openssl/patches/500-e_devcrypto-default-to-not-use-digests-in-engine.patch
-@@ -20,7 +20,6 @@ turn them on if it is safe and fast enough.
- Signed-off-by: Eneas U de Queiroz <cote2004-github@yahoo.com>
- 
- diff --git a/engines/e_devcrypto.c b/engines/e_devcrypto.c
--index 3fcd81de7a..d25230d366 100644
- --- a/engines/e_devcrypto.c
- +++ b/engines/e_devcrypto.c
- @@ -852,7 +852,7 @@ static void prepare_digest_methods(void)
-diff --git a/package/libs/openssl/patches/510-e_devcrypto-ignore-error-when-closing-session.patch b/package/libs/openssl/patches/510-e_devcrypto-ignore-error-when-closing-session.patch
-index bc514b88c9..bf1c98b104 100644
---- a/package/libs/openssl/patches/510-e_devcrypto-ignore-error-when-closing-session.patch
-+++ b/package/libs/openssl/patches/510-e_devcrypto-ignore-error-when-closing-session.patch
-@@ -9,7 +9,6 @@ session.  It may have been closed by another process after a fork.
- Signed-off-by: Eneas U de Queiroz <cote2004-github@yahoo.com>
- 
- diff --git a/engines/e_devcrypto.c b/engines/e_devcrypto.c
--index d25230d366..f4570f1666 100644
- --- a/engines/e_devcrypto.c
- +++ b/engines/e_devcrypto.c
- @@ -195,9 +195,8 @@ static int cipher_init(EVP_CIPHER_CTX *ctx, const unsigned char *key,
--- 
-2.25.1
-
diff --git a/patches/backports/0037-backport-5.4-add-a-BPF-off-by-one-fix.patch b/patches/backports/0037-backport-5.4-add-a-BPF-off-by-one-fix.patch
deleted file mode 100644
index 9875010ed..000000000
--- a/patches/backports/0037-backport-5.4-add-a-BPF-off-by-one-fix.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 1ac3763815e804eacc0977afb420f015a78f8d72 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Fri, 23 Sep 2022 08:48:38 +0200
-Subject: [PATCH] backport-5.4: add a BPF off-by-one fix
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- .../backport-5.4/999-bpf-off-by-one-backport.patch  | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
- create mode 100644 target/linux/generic/backport-5.4/999-bpf-off-by-one-backport.patch
-
-diff --git a/target/linux/generic/backport-5.4/999-bpf-off-by-one-backport.patch b/target/linux/generic/backport-5.4/999-bpf-off-by-one-backport.patch
-new file mode 100644
-index 0000000000..271eac67da
---- /dev/null
-+++ b/target/linux/generic/backport-5.4/999-bpf-off-by-one-backport.patch
-@@ -0,0 +1,13 @@
-+Index: linux-5.4.158/kernel/bpf/verifier.c
-+===================================================================
-+--- linux-5.4.158.orig/kernel/bpf/verifier.c
-++++ linux-5.4.158/kernel/bpf/verifier.c
-+@@ -5372,7 +5372,7 @@ static void find_good_pkt_pointers(struc
-+ 
-+ 	new_range = dst_reg->off;
-+ 	if (range_right_open)
-+-		new_range--;
-++		new_range++;
-+ 
-+ 	/* Examples for register markings:
-+ 	 *
--- 
-2.25.1
-
diff --git a/patches/backports/0050-bpf-headers-add-a-package-with-kernel-headers-for-eb.patch b/patches/backports/0050-bpf-headers-add-a-package-with-kernel-headers-for-eb.patch
deleted file mode 100644
index 9dd7f09a4..000000000
--- a/patches/backports/0050-bpf-headers-add-a-package-with-kernel-headers-for-eb.patch
+++ /dev/null
@@ -1,221 +0,0 @@
-From 3937223beab0c3e4284fd916c0c3b6548c287e03 Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Tue, 26 Oct 2021 20:41:22 +0200
-Subject: [PATCH 050/102] bpf-headers: add a package with kernel headers for
- ebpf
-
-In order to genererate suitable kernel headers, a 5.10 kernel tree is
-prepared with a default config for mips. The arch is forced to mips in
-order to avoid issues with inline asm on various architectures in a way
-that doesn't involve relying on the host toolchain/headers.
-It also has the advantage of supporting both endian types
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- include/bpf.mk                                | 65 ++++++++++++
- package/kernel/bpf-headers/Makefile           | 99 +++++++++++++++++++
- .../src/include/generated/bounds.h            | 14 +++
- 3 files changed, 178 insertions(+)
- create mode 100644 include/bpf.mk
- create mode 100644 package/kernel/bpf-headers/Makefile
- create mode 100644 package/kernel/bpf-headers/src/include/generated/bounds.h
-
-diff --git a/include/bpf.mk b/include/bpf.mk
-new file mode 100644
-index 0000000000..3dc65c7685
---- /dev/null
-+++ b/include/bpf.mk
-@@ -0,0 +1,65 @@
-+ifneq ($(CONFIG_BPF_TOOLCHAIN_HOST),)
-+  BPF_TOOLCHAIN_HOST_PATH:=$(call qstrip,$(CONFIG_BPF_TOOLCHAIN_HOST_PATH))
-+  ifneq ($(BPF_TOOLCHAIN_HOST_PATH),)
-+    BPF_PATH:=$(BPF_TOOLCHAIN_HOST_PATH)/bin:$(PATH)
-+  else
-+    BPF_PATH:=$(BPF_PATH)
-+  endif
-+  CLANG:=$(firstword $(shell PATH='$(BPF_PATH)' which clang clang-13 clang-12 clang-11))
-+  LLVM_VER:=$(subst clang,,$(notdir $(CLANG)))
-+else
-+  CLANG:=$(STAGING_DIR_HOST)/bin/clang
-+  LLVM_VER:=
-+endif
-+
-+LLVM_PATH:=$(dir $(CLANG))
-+LLVM_LLC:=$(LLVM_PATH)/llc$(LLVM_VER)
-+LLVM_DIS:=$(LLVM_PATH)/llvm-dis$(LLVM_VER)
-+LLVM_OPT:=$(LLVM_PATH)/opt$(LLVM_VER)
-+LLVM_STRIP:=$(LLVM_PATH)/llvm-strip$(LLVM_VER)
-+
-+BPF_KARCH:=mips
-+BPF_ARCH:=mips$(if $(CONFIG_BIG_ENDIAN),,el)
-+
-+BPF_HEADERS_DIR:=$(STAGING_DIR)/bpf-headers
-+
-+BPF_KERNEL_INCLUDE := \
-+	-nostdinc -isystem $(TOOLCHAIN_DIR)/include \
-+	-I$(BPF_HEADERS_DIR)/arch/$(BPF_KARCH)/include \
-+	-I$(BPF_HEADERS_DIR)/arch/$(BPF_KARCH)/include/asm/mach-generic \
-+	-I$(BPF_HEADERS_DIR)/arch/$(BPF_KARCH)/include/generated \
-+	-I$(BPF_HEADERS_DIR)/include \
-+	-I$(BPF_HEADERS_DIR)/arch/$(BPF_KARCH)/include/uapi \
-+	-I$(BPF_HEADERS_DIR)/arch/$(BPF_KARCH)/include/generated/uapi \
-+	-I$(BPF_HEADERS_DIR)/include/uapi \
-+	-I$(BPF_HEADERS_DIR)/include/generated/uapi \
-+	-I$(BPF_HEADERS_DIR)/tools/lib \
-+	-I$(BPF_HEADERS_DIR)/tools/testing/selftests \
-+	-I$(BPF_HEADERS_DIR)/samples/bpf \
-+	-include linux/kconfig.h -include asm_goto_workaround.h
-+
-+BPF_CFLAGS := \
-+	$(BPF_KERNEL_INCLUDE) -I$(PKG_BUILD_DIR) \
-+	-D__KERNEL__ -D__BPF_TRACING__ \
-+	-D__TARGET_ARCH_${BPF_KARCH} \
-+	-m$(if $(CONFIG_BIG_ENDIAN),big,little)-endian \
-+	-fno-stack-protector -Wall \
-+	-Wno-unused-value -Wno-pointer-sign \
-+	-Wno-compare-distinct-pointer-types \
-+	-Wno-gnu-variable-sized-type-not-at-end \
-+	-Wno-address-of-packed-member -Wno-tautological-compare \
-+	-Wno-unknown-warning-option \
-+	-fno-asynchronous-unwind-tables \
-+	-Wno-uninitialized -Wno-unused-variable \
-+	-Wno-unused-label \
-+	-O2 -emit-llvm -Xclang -disable-llvm-passes
-+
-+define CompileBPF
-+	$(CLANG) -g -target $(BPF_ARCH)-linux-gnu $(BPF_CFLAGS) $(2) \
-+		-c $(1) -o $(patsubst %.c,%.bc,$(1))
-+	$(LLVM_OPT) -O2 -mtriple=bpf-pc-linux < $(patsubst %.c,%.bc,$(1)) > $(patsubst %.c,%.opt,$(1))
-+	$(LLVM_DIS) < $(patsubst %.c,%.opt,$(1)) > $(patsubst %.c,%.S,$(1))
-+	$(LLVM_LLC) -march=bpf -filetype=obj -o $(patsubst %.c,%.o,$(1)) < $(patsubst %.c,%.S,$(1))
-+	$(LLVM_STRIP) --strip-debug $(patsubst %.c,%.o,$(1))
-+endef
-+
-diff --git a/package/kernel/bpf-headers/Makefile b/package/kernel/bpf-headers/Makefile
-new file mode 100644
-index 0000000000..5f5b89370d
---- /dev/null
-+++ b/package/kernel/bpf-headers/Makefile
-@@ -0,0 +1,99 @@
-+#
-+# Copyright (C) 2006-2009 OpenWrt.org
-+#
-+# This is free software, licensed under the GNU General Public License v2.
-+# See /LICENSE for more information.
-+#
-+include $(TOPDIR)/rules.mk
-+
-+override QUILT:=
-+override HOST_QUILT:=
-+
-+include $(INCLUDE_DIR)/kernel.mk
-+
-+
-+PKG_NAME:=linux
-+PKG_PATCHVER:=5.10
-+PKG_VERSION:=$(PKG_PATCHVER)$(strip $(LINUX_VERSION-$(PKG_PATCHVER)))
-+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
-+PKG_SOURCE_URL:=$(LINUX_SITE)
-+PKG_HASH:=$(LINUX_KERNEL_HASH-$(strip $(PKG_VERSION)))
-+PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/bpf-headers/$(PKG_NAME)-$(PKG_VERSION)
-+
-+GENERIC_BACKPORT_DIR := $(GENERIC_PLATFORM_DIR)/backport$(if $(wildcard $(GENERIC_PLATFORM_DIR)/backport-$(PKG_PATCHVER)),-$(PKG_PATCHVER))
-+GENERIC_PATCH_DIR := $(GENERIC_PLATFORM_DIR)/pending$(if $(wildcard $(GENERIC_PLATFORM_DIR)/pending-$(PKG_PATCHVER)),-$(PKG_PATCHVER))
-+GENERIC_HACK_DIR := $(GENERIC_PLATFORM_DIR)/hack$(if $(wildcard $(GENERIC_PLATFORM_DIR)/hack-$(PKG_PATCHVER)),-$(PKG_PATCHVER))
-+GENERIC_FILES_DIR := $(foreach dir,$(wildcard $(GENERIC_PLATFORM_DIR)/files $(GENERIC_PLATFORM_DIR)/files-$(PKG_PATCHVER)),"$(dir)")
-+PATCH_DIR := $(CURDIR)/patches
-+FILES_DIR :=
-+
-+REAL_LINUX_DIR := $(LINUX_DIR)
-+LINUX_DIR := $(PKG_BUILD_DIR)
-+
-+include $(INCLUDE_DIR)/bpf.mk
-+include $(INCLUDE_DIR)/package.mk
-+
-+define Package/bpf-headers
-+  SECTION:=kernel
-+  CATEGORY:=Kernel
-+  TITLE:=eBPF kernel headers
-+  BUILDONLY:=1
-+  HIDDEN:=1
-+endef
-+
-+export HOST_EXTRACFLAGS=-I$(STAGING_DIR_HOST)/include
-+
-+KERNEL_MAKE := \
-+	$(MAKE) -C $(PKG_BUILD_DIR) \
-+		ARCH=$(BPF_KARCH) \
-+		CROSS_COMPILE=$(BPF_ARCH)-linux- \
-+		LLVM=1 CC="$(CLANG)" LD="$(TARGET_CROSS)ld" \
-+		HOSTCC="$(HOSTCC)" \
-+		HOSTCXX="$(HOSTCXX)" \
-+		HOST_LOADLIBES="-L$(STAGING_DIR_HOST)/lib" \
-+		KBUILD_HOSTLDLIBS="-L$(STAGING_DIR_HOST)/lib" \
-+		CONFIG_SHELL="$(BASH)" \
-+		INSTALL_HDR_PATH="$(PKG_BUILD_DIR)/user_headers"
-+
-+define Build/Patch
-+	$(Kernel/Patch/Default)
-+endef
-+
-+BPF_DOC = $(PKG_BUILD_DIR)/scripts/bpf_helpers_doc.py
-+
-+define Build/Configure
-+	grep -vE 'CONFIG_(CPU_.*ENDIAN|HZ)' $(PKG_BUILD_DIR)/arch/mips/configs/generic_defconfig > $(PKG_BUILD_DIR)/.config
-+	echo 'CONFIG_CPU_$(if $(CONFIG_BIG_ENDIAN),BIG,LITTLE)_ENDIAN=y' >> $(PKG_BUILD_DIR)/.config
-+	grep CONFIG_HZ $(REAL_LINUX_DIR)/.config >> $(PKG_BUILD_DIR)/.config
-+	yes '' | $(KERNEL_MAKE) oldconfig
-+	grep 'CONFIG_HZ=' $(REAL_LINUX_DIR)/.config | \
-+		cut -d= -f2 | \
-+		bc -q $(LINUX_DIR)/kernel/time/timeconst.bc \
-+		> $(LINUX_DIR)/include/generated/timeconst.h
-+	$(BPF_DOC) --header \
-+		--file $(LINUX_DIR)/tools/include/uapi/linux/bpf.h \
-+		> $(PKG_BUILD_DIR)/tools/lib/bpf/bpf_helper_defs.h
-+endef
-+
-+define Build/Compile
-+	$(KERNEL_MAKE) archprepare headers_install
-+endef
-+
-+define Build/InstallDev
-+	mkdir -p $(1)/bpf-headers/arch $(1)/bpf-headers/tools
-+	$(CP) \
-+		$(PKG_BUILD_DIR)/arch/$(BPF_KARCH) \
-+		$(1)/bpf-headers/arch/
-+	$(CP) \
-+		$(PKG_BUILD_DIR)/tools/lib \
-+		$(PKG_BUILD_DIR)/tools/testing \
-+		$(1)/bpf-headers/tools/
-+	$(CP) \
-+		$(PKG_BUILD_DIR)/include \
-+		$(PKG_BUILD_DIR)/samples \
-+		$(PKG_BUILD_DIR)/scripts \
-+		$(PKG_BUILD_DIR)/user_headers \
-+		$(1)/bpf-headers
-+endef
-+
-+$(eval $(call BuildPackage,bpf-headers))
-diff --git a/package/kernel/bpf-headers/src/include/generated/bounds.h b/package/kernel/bpf-headers/src/include/generated/bounds.h
-new file mode 100644
-index 0000000000..82ff01043c
---- /dev/null
-+++ b/package/kernel/bpf-headers/src/include/generated/bounds.h
-@@ -0,0 +1,14 @@
-+#ifndef __LINUX_BOUNDS_H__
-+#define __LINUX_BOUNDS_H__
-+/*
-+ * DO NOT MODIFY.
-+ *
-+ * This file was generated by Kbuild
-+ */
-+
-+#define NR_PAGEFLAGS 23 /* __NR_PAGEFLAGS */
-+#define MAX_NR_ZONES 4 /* __MAX_NR_ZONES */
-+#define NR_CPUS_BITS 1 /* ilog2(CONFIG_NR_CPUS) */
-+#define SPINLOCK_SIZE 64 /* sizeof(spinlock_t) */
-+
-+#endif
--- 
-2.25.1
-
diff --git a/patches/backports/0051-bpf-headers-unset-PKG_CONFIG_PATH.patch b/patches/backports/0051-bpf-headers-unset-PKG_CONFIG_PATH.patch
deleted file mode 100644
index de15a0c82..000000000
--- a/patches/backports/0051-bpf-headers-unset-PKG_CONFIG_PATH.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 32243b2148fd0dacd0630affaea59345c64df79a Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Tue, 2 Nov 2021 10:36:14 +0100
-Subject: [PATCH 051/102] bpf-headers: unset PKG_CONFIG_PATH
-
-This fixes an issue where the kernel would pick up an incompatible target
-libyaml for building host tools
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- package/kernel/bpf-headers/Makefile | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/package/kernel/bpf-headers/Makefile b/package/kernel/bpf-headers/Makefile
-index 5f5b89370d..df24bfa13f 100644
---- a/package/kernel/bpf-headers/Makefile
-+++ b/package/kernel/bpf-headers/Makefile
-@@ -41,6 +41,8 @@ define Package/bpf-headers
-   HIDDEN:=1
- endef
- 
-+PKG_CONFIG_PATH:=
-+
- export HOST_EXTRACFLAGS=-I$(STAGING_DIR_HOST)/include
- 
- KERNEL_MAKE := \
--- 
-2.25.1
-
diff --git a/patches/backports/0052-tools-llvm-bpf-add-llvm-clang-build-suitable-for-com.patch b/patches/backports/0052-tools-llvm-bpf-add-llvm-clang-build-suitable-for-com.patch
deleted file mode 100644
index 065b63df0..000000000
--- a/patches/backports/0052-tools-llvm-bpf-add-llvm-clang-build-suitable-for-com.patch
+++ /dev/null
@@ -1,99 +0,0 @@
-From 1eb36bc2be4b54e4e4e4ceffc01be78d996205f0 Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Sun, 17 Oct 2021 17:50:53 +0200
-Subject: [PATCH 052/102] tools/llvm-bpf: add llvm+clang build suitable for
- compiling code to eBPF
-
-Preparation for building packages that ship eBPF code
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- toolchain/Config.in     |  7 +++++++
- tools/Makefile          |  2 ++
- tools/llvm-bpf/Makefile | 36 ++++++++++++++++++++++++++++++++++++
- 3 files changed, 45 insertions(+)
- create mode 100644 tools/llvm-bpf/Makefile
-
-diff --git a/toolchain/Config.in b/toolchain/Config.in
-index 6dda9af92d..9062d6f65e 100644
---- a/toolchain/Config.in
-+++ b/toolchain/Config.in
-@@ -37,6 +37,13 @@ menuconfig TARGET_OPTIONS
- 
- 		  Most people will answer N.
- 
-+config BUILD_LLVM_BPF
-+	bool "Build LLVM toolchain for eBPF" if DEVEL
-+	help
-+	  If enabled, a LLVM toolchain for building eBPF binaries will be built.
-+	  If this is not enabled, eBPF packages can only be built if the host
-+	  has a suitable toolchain
-+
- 
- menuconfig EXTERNAL_TOOLCHAIN
- 	bool
-diff --git a/tools/Makefile b/tools/Makefile
-index a2665dbc9a..83147014c6 100644
---- a/tools/Makefile
-+++ b/tools/Makefile
-@@ -35,6 +35,7 @@ tools-$(CONFIG_TARGET_mxs) += elftosb sdimage
- tools-$(CONFIG_TARGET_tegra) += cbootimage cbootimage-configs
- tools-$(CONFIG_USES_MINOR) += kernel2minor
- tools-$(CONFIG_USE_SPARSE) += sparse
-+tools-$(CONFIG_BUILD_LLVM_BPF) += llvm-bpf
- 
- # builddir dependencies
- $(curdir)/autoconf/compile := $(curdir)/m4/compile
-@@ -57,6 +58,7 @@ $(curdir)/libelf/compile := $(curdir)/libtool/compile
- $(curdir)/libressl/compile := $(curdir)/pkgconf/compile
- $(curdir)/libtool/compile := $(curdir)/m4/compile $(curdir)/autoconf/compile $(curdir)/automake/compile $(curdir)/missing-macros/compile
- $(curdir)/lzma-old/compile := $(curdir)/zlib/compile
-+$(curdir)/llvm-bpf/compile := $(curdir)/cmake/compile
- $(curdir)/make-ext4fs/compile := $(curdir)/zlib/compile
- $(curdir)/missing-macros/compile := $(curdir)/autoconf/compile
- $(curdir)/mkimage/compile += $(curdir)/libressl/compile
-diff --git a/tools/llvm-bpf/Makefile b/tools/llvm-bpf/Makefile
-new file mode 100644
-index 0000000000..a5ba2a4cb7
---- /dev/null
-+++ b/tools/llvm-bpf/Makefile
-@@ -0,0 +1,36 @@
-+#
-+# Copyright (C) 2006-2016 OpenWrt.org
-+#
-+# This is free software, licensed under the GNU General Public License v2.
-+# See /LICENSE for more information.
-+#
-+include $(TOPDIR)/rules.mk
-+
-+PKG_NAME:=llvm-project
-+PKG_VERSION:=13.0.0
-+PKG_RELEASE:=1
-+
-+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).src.tar.xz
-+PKG_SOURCE_URL:=https://github.com/llvm/llvm-project/releases/download/llvmorg-$(PKG_VERSION)
-+PKG_HASH:=6075ad30f1ac0e15f07c1bf062c1e1268c241d674f11bd32cdf0e040c71f2bf3
-+
-+HOST_BUILD_DIR:=$(BUILD_DIR_HOST)/$(PKG_NAME)-$(PKG_VERSION).src
-+
-+HOST_BUILD_PARALLEL:=1
-+
-+CMAKE_BINARY_SUBDIR := build
-+CMAKE_SOURCE_SUBDIR := llvm
-+
-+include $(INCLUDE_DIR)/host-build.mk
-+include $(INCLUDE_DIR)/cmake.mk
-+
-+CMAKE_HOST_OPTIONS += \
-+	-DLLVM_ENABLE_BINDINGS=OFF \
-+	-DLLVM_INCLUDE_DOCS=OFF \
-+	-DLLVM_INCLUDE_EXAMPLES=OFF \
-+	-DLLVM_INCLUDE_TESTS=OFF \
-+	-DLLVM_ENABLE_PROJECTS="clang;lld" \
-+	-DLLVM_TARGETS_TO_BUILD=BPF \
-+	-DCLANG_BUILD_EXAMPLES=OFF
-+
-+$(eval $(call HostBuild))
--- 
-2.25.1
-
diff --git a/patches/backports/0053-llvm-bpf-move-to-staging_dir-host-llvm-bpf.patch b/patches/backports/0053-llvm-bpf-move-to-staging_dir-host-llvm-bpf.patch
deleted file mode 100644
index e624d9865..000000000
--- a/patches/backports/0053-llvm-bpf-move-to-staging_dir-host-llvm-bpf.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 103a743e7ca4a2e98969d0f60d8aeb6cc7641f67 Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Tue, 2 Nov 2021 19:38:12 +0100
-Subject: [PATCH 053/102] llvm-bpf: move to staging_dir/host/llvm-bpf
-
-This makes it easier to package it up for the download server
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- tools/llvm-bpf/Makefile | 8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/tools/llvm-bpf/Makefile b/tools/llvm-bpf/Makefile
-index a5ba2a4cb7..ae279d26d2 100644
---- a/tools/llvm-bpf/Makefile
-+++ b/tools/llvm-bpf/Makefile
-@@ -24,6 +24,8 @@ CMAKE_SOURCE_SUBDIR := llvm
- include $(INCLUDE_DIR)/host-build.mk
- include $(INCLUDE_DIR)/cmake.mk
- 
-+CMAKE_HOST_INSTALL_PREFIX = $(STAGING_DIR_HOST)/llvm-bpf
-+
- CMAKE_HOST_OPTIONS += \
- 	-DLLVM_ENABLE_BINDINGS=OFF \
- 	-DLLVM_INCLUDE_DOCS=OFF \
-@@ -31,6 +33,10 @@ CMAKE_HOST_OPTIONS += \
- 	-DLLVM_INCLUDE_TESTS=OFF \
- 	-DLLVM_ENABLE_PROJECTS="clang;lld" \
- 	-DLLVM_TARGETS_TO_BUILD=BPF \
--	-DCLANG_BUILD_EXAMPLES=OFF
-+	-DCLANG_BUILD_EXAMPLES=OFF \
-+	-DLLVM_INSTALL_TOOLCHAIN_ONLY=ON \
-+	-DLLVM_LINK_LLVM_DYLIB=ON \
-+	-DLLVM_TOOLCHAIN_TOOLS="llvm-objcopy;llvm-objdump;llvm-readelf;llvm-strip;llvm-ar;llvm-as;llvm-dis;llvm-link;llvm-nm;llvm-ranlib;llc;opt" \
-+	-DCMAKE_SKIP_RPATH=OFF
- 
- $(eval $(call HostBuild))
--- 
-2.25.1
-
diff --git a/patches/backports/0054-build-fix-bpf-toolchain-dependency-for-qosify.patch b/patches/backports/0054-build-fix-bpf-toolchain-dependency-for-qosify.patch
deleted file mode 100644
index c932d26bd..000000000
--- a/patches/backports/0054-build-fix-bpf-toolchain-dependency-for-qosify.patch
+++ /dev/null
@@ -1,103 +0,0 @@
-From a368d456ba1e9198fd8f473b7e82c0e066e4eb82 Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Mon, 1 Nov 2021 18:40:03 +0100
-Subject: [PATCH 054/102] build: fix bpf toolchain dependency for qosify
-
-Add hidden symbols to fix defaults with CONFIG_DEVEL unset
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- include/bpf.mk      |  2 ++
- toolchain/Config.in | 45 +++++++++++++++++++++++++++++++++++++++++++++
- tools/Makefile      |  2 +-
- 3 files changed, 48 insertions(+), 1 deletion(-)
-
-diff --git a/include/bpf.mk b/include/bpf.mk
-index 3dc65c7685..5211ec4434 100644
---- a/include/bpf.mk
-+++ b/include/bpf.mk
-@@ -1,3 +1,5 @@
-+BPF_DEPENDS := @HAS_BPF_TOOLCHAIN
-+
- ifneq ($(CONFIG_BPF_TOOLCHAIN_HOST),)
-   BPF_TOOLCHAIN_HOST_PATH:=$(call qstrip,$(CONFIG_BPF_TOOLCHAIN_HOST_PATH))
-   ifneq ($(BPF_TOOLCHAIN_HOST_PATH),)
-diff --git a/toolchain/Config.in b/toolchain/Config.in
-index 9062d6f65e..997cff59e4 100644
---- a/toolchain/Config.in
-+++ b/toolchain/Config.in
-@@ -44,6 +44,32 @@ config BUILD_LLVM_BPF
- 	  If this is not enabled, eBPF packages can only be built if the host
- 	  has a suitable toolchain
- 
-+	choice BPF_TOOLCHAIN
-+		prompt "BPF toolchain" if DEVEL
-+		default BPF_TOOLCHAIN_NONE
-+
-+		config BPF_TOOLCHAIN_NONE
-+			bool "None"
-+
-+		config BPF_TOOLCHAIN_HOST
-+			select USE_LLVM_HOST
-+			bool "Use host LLVM toolchain"
-+
-+		config BPF_TOOLCHAIN_BUILD_LLVM
-+			select USE_LLVM_BUILD
-+			bool "Build LLVM toolchain for eBPF"
-+			help
-+			  If enabled, a LLVM toolchain for building eBPF binaries will be built.
-+			  If this is not enabled, eBPF packages can only be built if the host
-+			  has a suitable toolchain
-+	endchoice
-+
-+	config BPF_TOOLCHAIN_HOST_PATH
-+		string
-+		depends on BPF_TOOLCHAIN_HOST
-+		prompt "Host LLVM toolchain path (prefix)" if DEVEL
-+		default "/usr/local/opt/llvm" if HOST_OS_MACOS
-+		default ""
- 
- menuconfig EXTERNAL_TOOLCHAIN
- 	bool
-@@ -266,6 +292,25 @@ config GDB
- 	help
- 	  Enable if you want to build the gdb.
- 
-+config GDB_PYTHON
-+	bool
-+	depends on GDB
-+	prompt "Build gdb with python binding"
-+	
-+	help
-+	  Enable the python bindings for GDB to allow using python in the gdb shell.
-+
-+config HAS_BPF_TOOLCHAIN
-+	bool
-+
-+config USE_LLVM_HOST
-+	select HAS_BPF_TOOLCHAIN
-+	bool
-+
-+config USE_LLVM_BUILD
-+	select HAS_BPF_TOOLCHAIN
-+	bool
-+
- config USE_GLIBC
- 	default y if !TOOLCHAINOPTS && !EXTERNAL_TOOLCHAIN && !NATIVE_TOOLCHAIN && (arc)
- 	bool
-diff --git a/tools/Makefile b/tools/Makefile
-index 83147014c6..ae3cc5dfd6 100644
---- a/tools/Makefile
-+++ b/tools/Makefile
-@@ -35,7 +35,7 @@ tools-$(CONFIG_TARGET_mxs) += elftosb sdimage
- tools-$(CONFIG_TARGET_tegra) += cbootimage cbootimage-configs
- tools-$(CONFIG_USES_MINOR) += kernel2minor
- tools-$(CONFIG_USE_SPARSE) += sparse
--tools-$(CONFIG_BUILD_LLVM_BPF) += llvm-bpf
-+tools-$(CONFIG_USE_LLVM_BUILD) += llvm-bpf
- 
- # builddir dependencies
- $(curdir)/autoconf/compile := $(curdir)/m4/compile
--- 
-2.25.1
-
diff --git a/patches/backports/0055-include-bpf.mk-fix-typo.patch b/patches/backports/0055-include-bpf.mk-fix-typo.patch
deleted file mode 100644
index 4a3b23070..000000000
--- a/patches/backports/0055-include-bpf.mk-fix-typo.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From 2ae5b19a52da190ea342ec4210523407837c58ea Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Tue, 2 Nov 2021 09:56:10 +0100
-Subject: [PATCH 055/102] include/bpf.mk: fix typo
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- include/bpf.mk | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/include/bpf.mk b/include/bpf.mk
-index 5211ec4434..6223648c5d 100644
---- a/include/bpf.mk
-+++ b/include/bpf.mk
-@@ -5,7 +5,7 @@ ifneq ($(CONFIG_BPF_TOOLCHAIN_HOST),)
-   ifneq ($(BPF_TOOLCHAIN_HOST_PATH),)
-     BPF_PATH:=$(BPF_TOOLCHAIN_HOST_PATH)/bin:$(PATH)
-   else
--    BPF_PATH:=$(BPF_PATH)
-+    BPF_PATH:=$(PATH)
-   endif
-   CLANG:=$(firstword $(shell PATH='$(BPF_PATH)' which clang clang-13 clang-12 clang-11))
-   LLVM_VER:=$(subst clang,,$(notdir $(CLANG)))
--- 
-2.25.1
-
diff --git a/patches/backports/0056-include-bpf.mk-fix-compile-for-big-endian-targets.patch b/patches/backports/0056-include-bpf.mk-fix-compile-for-big-endian-targets.patch
deleted file mode 100644
index 9d825b0c6..000000000
--- a/patches/backports/0056-include-bpf.mk-fix-compile-for-big-endian-targets.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From aff796bf3e60d7f09e5ca500cbf59221211dd218 Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Tue, 2 Nov 2021 10:39:35 +0100
-Subject: [PATCH 056/102] include/bpf.mk: fix compile for big-endian targets
-
-llvm-opt and llc need endian flags in the target as well
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- include/bpf.mk | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
-diff --git a/include/bpf.mk b/include/bpf.mk
-index 6223648c5d..9636ad5165 100644
---- a/include/bpf.mk
-+++ b/include/bpf.mk
-@@ -22,6 +22,7 @@ LLVM_STRIP:=$(LLVM_PATH)/llvm-strip$(LLVM_VER)
- 
- BPF_KARCH:=mips
- BPF_ARCH:=mips$(if $(CONFIG_BIG_ENDIAN),,el)
-+BPF_TARGET:=bpf$(if $(CONFIG_BIG_ENDIAN),eb,el)
- 
- BPF_HEADERS_DIR:=$(STAGING_DIR)/bpf-headers
- 
-@@ -59,9 +60,9 @@ BPF_CFLAGS := \
- define CompileBPF
- 	$(CLANG) -g -target $(BPF_ARCH)-linux-gnu $(BPF_CFLAGS) $(2) \
- 		-c $(1) -o $(patsubst %.c,%.bc,$(1))
--	$(LLVM_OPT) -O2 -mtriple=bpf-pc-linux < $(patsubst %.c,%.bc,$(1)) > $(patsubst %.c,%.opt,$(1))
-+	$(LLVM_OPT) -O2 -mtriple=$(BPF_TARGET) < $(patsubst %.c,%.bc,$(1)) > $(patsubst %.c,%.opt,$(1))
- 	$(LLVM_DIS) < $(patsubst %.c,%.opt,$(1)) > $(patsubst %.c,%.S,$(1))
--	$(LLVM_LLC) -march=bpf -filetype=obj -o $(patsubst %.c,%.o,$(1)) < $(patsubst %.c,%.S,$(1))
-+	$(LLVM_LLC) -march=$(BPF_TARGET) -filetype=obj -o $(patsubst %.c,%.o,$(1)) < $(patsubst %.c,%.S,$(1))
- 	$(LLVM_STRIP) --strip-debug $(patsubst %.c,%.o,$(1))
- endef
- 
--- 
-2.25.1
-
diff --git a/patches/backports/0057-include-bpf.mk-add-LD_LIBRARY_PATH.patch b/patches/backports/0057-include-bpf.mk-add-LD_LIBRARY_PATH.patch
deleted file mode 100644
index 66ec8b9e2..000000000
--- a/patches/backports/0057-include-bpf.mk-add-LD_LIBRARY_PATH.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From d05fae42794c5fe76509935b1e8f900e1d17d9f0 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Fri, 5 Nov 2021 10:46:00 +0100
-Subject: [PATCH] include/bpf.mk: add LD_LIBRARY_PATH
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- include/bpf.mk | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/include/bpf.mk b/include/bpf.mk
-index 9636ad5165..2f797625b6 100644
---- a/include/bpf.mk
-+++ b/include/bpf.mk
-@@ -58,11 +58,16 @@ BPF_CFLAGS := \
- 	-O2 -emit-llvm -Xclang -disable-llvm-passes
- 
- define CompileBPF
-+	LD_LIBRARY_PATH=$(LD_LIBRARY_PATH):$(STAGING_DIR_HOST)/lib \
- 	$(CLANG) -g -target $(BPF_ARCH)-linux-gnu $(BPF_CFLAGS) $(2) \
- 		-c $(1) -o $(patsubst %.c,%.bc,$(1))
-+	LD_LIBRARY_PATH=$(LD_LIBRARY_PATH):$(STAGING_DIR_HOST)/lib \
- 	$(LLVM_OPT) -O2 -mtriple=$(BPF_TARGET) < $(patsubst %.c,%.bc,$(1)) > $(patsubst %.c,%.opt,$(1))
-+	LD_LIBRARY_PATH=$(LD_LIBRARY_PATH):$(STAGING_DIR_HOST)/lib \
- 	$(LLVM_DIS) < $(patsubst %.c,%.opt,$(1)) > $(patsubst %.c,%.S,$(1))
-+	LD_LIBRARY_PATH=$(LD_LIBRARY_PATH):$(STAGING_DIR_HOST)/lib \
- 	$(LLVM_LLC) -march=$(BPF_TARGET) -filetype=obj -o $(patsubst %.c,%.o,$(1)) < $(patsubst %.c,%.S,$(1))
-+	LD_LIBRARY_PATH=$(LD_LIBRARY_PATH):$(STAGING_DIR_HOST)/lib \
- 	$(LLVM_STRIP) --strip-debug $(patsubst %.c,%.o,$(1))
- endef
- 
--- 
-2.25.1
-
diff --git a/patches/backports/0058-kernel-backport-napi-threading-patches.patch b/patches/backports/0058-kernel-backport-napi-threading-patches.patch
deleted file mode 100644
index 58dd6d74e..000000000
--- a/patches/backports/0058-kernel-backport-napi-threading-patches.patch
+++ /dev/null
@@ -1,1088 +0,0 @@
-From e2bb75821cd023b62bf69bc40d5187ba63237cc2 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Tue, 14 Dec 2021 09:39:42 +0100
-Subject: [PATCH] kernel: backport napi threading patches
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- ...pi-poll-functionality-to-__napi_poll.patch |  88 +++++
- ...threaded-able-napi-poll-loop-support.patch | 261 +++++++++++++
- ...tribute-to-control-napi-threaded-mod.patch | 177 +++++++++
- ...ween-napi-kthread-mode-and-busy-poll.patch |  93 +++++
- ...up-on-napi_disable-for-threaded-napi.patch |  53 +++
- ...dd-support-for-threaded-NAPI-polling.patch | 356 ------------------
- 6 files changed, 672 insertions(+), 356 deletions(-)
- create mode 100644 target/linux/generic/backport-5.4/600-v5.12-net-extract-napi-poll-functionality-to-__napi_poll.patch
- create mode 100644 target/linux/generic/backport-5.4/601-v5.12-net-implement-threaded-able-napi-poll-loop-support.patch
- create mode 100644 target/linux/generic/backport-5.4/602-v5.12-net-add-sysfs-attribute-to-control-napi-threaded-mod.patch
- create mode 100644 target/linux/generic/backport-5.4/603-v5.12-net-fix-race-between-napi-kthread-mode-and-busy-poll.patch
- create mode 100644 target/linux/generic/backport-5.4/604-v5.12-net-fix-hangup-on-napi_disable-for-threaded-napi.patch
- delete mode 100644 target/linux/generic/pending-5.4/690-net-add-support-for-threaded-NAPI-polling.patch
-
-diff --git a/target/linux/generic/backport-5.4/600-v5.12-net-extract-napi-poll-functionality-to-__napi_poll.patch b/target/linux/generic/backport-5.4/600-v5.12-net-extract-napi-poll-functionality-to-__napi_poll.patch
-new file mode 100644
-index 0000000000..961140aabb
---- /dev/null
-+++ b/target/linux/generic/backport-5.4/600-v5.12-net-extract-napi-poll-functionality-to-__napi_poll.patch
-@@ -0,0 +1,88 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Mon, 8 Feb 2021 11:34:08 -0800
-+Subject: [PATCH] net: extract napi poll functionality to __napi_poll()
-+
-+This commit introduces a new function __napi_poll() which does the main
-+logic of the existing napi_poll() function, and will be called by other
-+functions in later commits.
-+This idea and implementation is done by Felix Fietkau <nbd@nbd.name> and
-+is proposed as part of the patch to move napi work to work_queue
-+context.
-+This commit by itself is a code restructure.
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+Signed-off-by: Wei Wang <weiwan@google.com>
-+Reviewed-by: Alexander Duyck <alexanderduyck@fb.com>
-+Signed-off-by: David S. Miller <davem@davemloft.net>
-+---
-+
-+--- a/net/core/dev.c
-++++ b/net/core/dev.c
-+@@ -6322,15 +6322,10 @@ void netif_napi_del(struct napi_struct *
-+ }
-+ EXPORT_SYMBOL(netif_napi_del);
-+ 
-+-static int napi_poll(struct napi_struct *n, struct list_head *repoll)
-++static int __napi_poll(struct napi_struct *n, bool *repoll)
-+ {
-+-	void *have;
-+ 	int work, weight;
-+ 
-+-	list_del_init(&n->poll_list);
-+-
-+-	have = netpoll_poll_lock(n);
-+-
-+ 	weight = n->weight;
-+ 
-+ 	/* This NAPI_STATE_SCHED test is for avoiding a race
-+@@ -6348,7 +6343,7 @@ static int napi_poll(struct napi_struct
-+ 	WARN_ON_ONCE(work > weight);
-+ 
-+ 	if (likely(work < weight))
-+-		goto out_unlock;
-++		return work;
-+ 
-+ 	/* Drivers must not modify the NAPI state if they
-+ 	 * consume the entire weight.  In such cases this code
-+@@ -6357,7 +6352,7 @@ static int napi_poll(struct napi_struct
-+ 	 */
-+ 	if (unlikely(napi_disable_pending(n))) {
-+ 		napi_complete(n);
-+-		goto out_unlock;
-++		return work;
-+ 	}
-+ 
-+ 	if (n->gro_bitmask) {
-+@@ -6375,12 +6370,29 @@ static int napi_poll(struct napi_struct
-+ 	if (unlikely(!list_empty(&n->poll_list))) {
-+ 		pr_warn_once("%s: Budget exhausted after napi rescheduled\n",
-+ 			     n->dev ? n->dev->name : "backlog");
-+-		goto out_unlock;
-++		return work;
-+ 	}
-+ 
-+-	list_add_tail(&n->poll_list, repoll);
-++	*repoll = true;
-++
-++	return work;
-++}
-++
-++static int napi_poll(struct napi_struct *n, struct list_head *repoll)
-++{
-++	bool do_repoll = false;
-++	void *have;
-++	int work;
-++
-++	list_del_init(&n->poll_list);
-++
-++	have = netpoll_poll_lock(n);
-++
-++	work = __napi_poll(n, &do_repoll);
-++
-++	if (do_repoll)
-++		list_add_tail(&n->poll_list, repoll);
-+ 
-+-out_unlock:
-+ 	netpoll_poll_unlock(have);
-+ 
-+ 	return work;
-diff --git a/target/linux/generic/backport-5.4/601-v5.12-net-implement-threaded-able-napi-poll-loop-support.patch b/target/linux/generic/backport-5.4/601-v5.12-net-implement-threaded-able-napi-poll-loop-support.patch
-new file mode 100644
-index 0000000000..c9bd4abb53
---- /dev/null
-+++ b/target/linux/generic/backport-5.4/601-v5.12-net-implement-threaded-able-napi-poll-loop-support.patch
-@@ -0,0 +1,261 @@
-+From: Wei Wang <weiwan@google.com>
-+Date: Mon, 8 Feb 2021 11:34:09 -0800
-+Subject: [PATCH] net: implement threaded-able napi poll loop support
-+
-+This patch allows running each napi poll loop inside its own
-+kernel thread.
-+The kthread is created during netif_napi_add() if dev->threaded
-+is set. And threaded mode is enabled in napi_enable(). We will
-+provide a way to set dev->threaded and enable threaded mode
-+without a device up/down in the following patch.
-+
-+Once that threaded mode is enabled and the kthread is
-+started, napi_schedule() will wake-up such thread instead
-+of scheduling the softirq.
-+
-+The threaded poll loop behaves quite likely the net_rx_action,
-+but it does not have to manipulate local irqs and uses
-+an explicit scheduling point based on netdev_budget.
-+
-+Co-developed-by: Paolo Abeni <pabeni@redhat.com>
-+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
-+Co-developed-by: Hannes Frederic Sowa <hannes@stressinduktion.org>
-+Signed-off-by: Hannes Frederic Sowa <hannes@stressinduktion.org>
-+Co-developed-by: Jakub Kicinski <kuba@kernel.org>
-+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
-+Signed-off-by: Wei Wang <weiwan@google.com>
-+Reviewed-by: Alexander Duyck <alexanderduyck@fb.com>
-+Signed-off-by: David S. Miller <davem@davemloft.net>
-+---
-+
-+--- a/include/linux/netdevice.h
-++++ b/include/linux/netdevice.h
-+@@ -340,6 +340,7 @@ struct napi_struct {
-+ 	struct list_head	dev_list;
-+ 	struct hlist_node	napi_hash_node;
-+ 	unsigned int		napi_id;
-++	struct task_struct	*thread;
-+ };
-+ 
-+ enum {
-+@@ -350,6 +351,7 @@ enum {
-+ 	NAPI_STATE_HASHED,	/* In NAPI hash (busy polling possible) */
-+ 	NAPI_STATE_NO_BUSY_POLL,/* Do not add in napi_hash, no busy polling */
-+ 	NAPI_STATE_IN_BUSY_POLL,/* sk_busy_loop() owns this NAPI */
-++	NAPI_STATE_THREADED,		/* The poll is performed inside its own thread*/
-+ };
-+ 
-+ enum {
-+@@ -360,6 +362,7 @@ enum {
-+ 	NAPIF_STATE_HASHED	 = BIT(NAPI_STATE_HASHED),
-+ 	NAPIF_STATE_NO_BUSY_POLL = BIT(NAPI_STATE_NO_BUSY_POLL),
-+ 	NAPIF_STATE_IN_BUSY_POLL = BIT(NAPI_STATE_IN_BUSY_POLL),
-++	NAPIF_STATE_THREADED	 = BIT(NAPI_STATE_THREADED),
-+ };
-+ 
-+ enum gro_result {
-+@@ -504,20 +507,7 @@ bool napi_hash_del(struct napi_struct *n
-+  */
-+ void napi_disable(struct napi_struct *n);
-+ 
-+-/**
-+- *	napi_enable - enable NAPI scheduling
-+- *	@n: NAPI context
-+- *
-+- * Resume NAPI from being scheduled on this context.
-+- * Must be paired with napi_disable.
-+- */
-+-static inline void napi_enable(struct napi_struct *n)
-+-{
-+-	BUG_ON(!test_bit(NAPI_STATE_SCHED, &n->state));
-+-	smp_mb__before_atomic();
-+-	clear_bit(NAPI_STATE_SCHED, &n->state);
-+-	clear_bit(NAPI_STATE_NPSVC, &n->state);
-+-}
-++void napi_enable(struct napi_struct *n);
-+ 
-+ /**
-+  *	napi_synchronize - wait until NAPI is not running
-+@@ -1783,6 +1773,8 @@ enum netdev_ml_priv_type {
-+  *
-+  *	@wol_enabled:	Wake-on-LAN is enabled
-+  *
-++ *	@threaded:	napi threaded mode is enabled
-++ *
-+  *	FIXME: cleanup struct net_device such that network protocol info
-+  *	moves out.
-+  */
-+@@ -2075,6 +2067,7 @@ struct net_device {
-+ 	struct lock_class_key	addr_list_lock_key;
-+ 	bool			proto_down;
-+ 	unsigned		wol_enabled:1;
-++	unsigned		threaded:1;
-+ };
-+ #define to_net_dev(d) container_of(d, struct net_device, dev)
-+ 
-+--- a/net/core/dev.c
-++++ b/net/core/dev.c
-+@@ -91,6 +91,7 @@
-+ #include <linux/etherdevice.h>
-+ #include <linux/ethtool.h>
-+ #include <linux/skbuff.h>
-++#include <linux/kthread.h>
-+ #include <linux/bpf.h>
-+ #include <linux/bpf_trace.h>
-+ #include <net/net_namespace.h>
-+@@ -1289,6 +1290,27 @@ void netdev_notify_peers(struct net_devi
-+ }
-+ EXPORT_SYMBOL(netdev_notify_peers);
-+ 
-++static int napi_threaded_poll(void *data);
-++
-++static int napi_kthread_create(struct napi_struct *n)
-++{
-++	int err = 0;
-++
-++	/* Create and wake up the kthread once to put it in
-++	 * TASK_INTERRUPTIBLE mode to avoid the blocked task
-++	 * warning and work with loadavg.
-++	 */
-++	n->thread = kthread_run(napi_threaded_poll, n, "napi/%s-%d",
-++				n->dev->name, n->napi_id);
-++	if (IS_ERR(n->thread)) {
-++		err = PTR_ERR(n->thread);
-++		pr_err("kthread_run failed with err %d\n", err);
-++		n->thread = NULL;
-++	}
-++
-++	return err;
-++}
-++
-+ static int __dev_open(struct net_device *dev, struct netlink_ext_ack *extack)
-+ {
-+ 	const struct net_device_ops *ops = dev->netdev_ops;
-+@@ -3885,6 +3907,21 @@ int gro_normal_batch __read_mostly = 8;
-+ static inline void ____napi_schedule(struct softnet_data *sd,
-+ 				     struct napi_struct *napi)
-+ {
-++	struct task_struct *thread;
-++
-++	if (test_bit(NAPI_STATE_THREADED, &napi->state)) {
-++		/* Paired with smp_mb__before_atomic() in
-++		 * napi_enable(). Use READ_ONCE() to guarantee
-++		 * a complete read on napi->thread. Only call
-++		 * wake_up_process() when it's not NULL.
-++		 */
-++		thread = READ_ONCE(napi->thread);
-++		if (thread) {
-++			wake_up_process(thread);
-++			return;
-++		}
-++	}
-++
-+ 	list_add_tail(&napi->poll_list, &sd->poll_list);
-+ 	__raise_softirq_irqoff(NET_RX_SOFTIRQ);
-+ }
-+@@ -6276,6 +6313,12 @@ void netif_napi_add(struct net_device *d
-+ 	set_bit(NAPI_STATE_NPSVC, &napi->state);
-+ 	list_add_rcu(&napi->dev_list, &dev->napi_list);
-+ 	napi_hash_add(napi);
-++	/* Create kthread for this napi if dev->threaded is set.
-++	 * Clear dev->threaded if kthread creation failed so that
-++	 * threaded mode will not be enabled in napi_enable().
-++	 */
-++	if (dev->threaded && napi_kthread_create(napi))
-++		dev->threaded = 0;
-+ }
-+ EXPORT_SYMBOL(netif_napi_add);
-+ 
-+@@ -6292,9 +6335,28 @@ void napi_disable(struct napi_struct *n)
-+ 	hrtimer_cancel(&n->timer);
-+ 
-+ 	clear_bit(NAPI_STATE_DISABLE, &n->state);
-++	clear_bit(NAPI_STATE_THREADED, &n->state);
-+ }
-+ EXPORT_SYMBOL(napi_disable);
-+ 
-++/**
-++ *	napi_enable - enable NAPI scheduling
-++ *	@n: NAPI context
-++ *
-++ * Resume NAPI from being scheduled on this context.
-++ * Must be paired with napi_disable.
-++ */
-++void napi_enable(struct napi_struct *n)
-++{
-++	BUG_ON(!test_bit(NAPI_STATE_SCHED, &n->state));
-++	smp_mb__before_atomic();
-++	clear_bit(NAPI_STATE_SCHED, &n->state);
-++	clear_bit(NAPI_STATE_NPSVC, &n->state);
-++	if (n->dev->threaded && n->thread)
-++		set_bit(NAPI_STATE_THREADED, &n->state);
-++}
-++EXPORT_SYMBOL(napi_enable);
-++
-+ static void flush_gro_hash(struct napi_struct *napi)
-+ {
-+ 	int i;
-+@@ -6319,6 +6381,11 @@ void netif_napi_del(struct napi_struct *
-+ 
-+ 	flush_gro_hash(napi);
-+ 	napi->gro_bitmask = 0;
-++
-++	if (napi->thread) {
-++		kthread_stop(napi->thread);
-++		napi->thread = NULL;
-++	}
-+ }
-+ EXPORT_SYMBOL(netif_napi_del);
-+ 
-+@@ -6398,6 +6465,51 @@ static int napi_poll(struct napi_struct
-+ 	return work;
-+ }
-+ 
-++static int napi_thread_wait(struct napi_struct *napi)
-++{
-++	set_current_state(TASK_INTERRUPTIBLE);
-++
-++	while (!kthread_should_stop() && !napi_disable_pending(napi)) {
-++		if (test_bit(NAPI_STATE_SCHED, &napi->state)) {
-++			WARN_ON(!list_empty(&napi->poll_list));
-++			__set_current_state(TASK_RUNNING);
-++			return 0;
-++		}
-++
-++		schedule();
-++		set_current_state(TASK_INTERRUPTIBLE);
-++	}
-++	__set_current_state(TASK_RUNNING);
-++	return -1;
-++}
-++
-++static int napi_threaded_poll(void *data)
-++{
-++	struct napi_struct *napi = data;
-++	void *have;
-++
-++	while (!napi_thread_wait(napi)) {
-++		for (;;) {
-++			bool repoll = false;
-++
-++			local_bh_disable();
-++
-++			have = netpoll_poll_lock(napi);
-++			__napi_poll(napi, &repoll);
-++			netpoll_poll_unlock(have);
-++
-++			__kfree_skb_flush();
-++			local_bh_enable();
-++
-++			if (!repoll)
-++				break;
-++
-++			cond_resched();
-++		}
-++	}
-++	return 0;
-++}
-++
-+ static __latent_entropy void net_rx_action(struct softirq_action *h)
-+ {
-+ 	struct softnet_data *sd = this_cpu_ptr(&softnet_data);
-diff --git a/target/linux/generic/backport-5.4/602-v5.12-net-add-sysfs-attribute-to-control-napi-threaded-mod.patch b/target/linux/generic/backport-5.4/602-v5.12-net-add-sysfs-attribute-to-control-napi-threaded-mod.patch
-new file mode 100644
-index 0000000000..d8b932978c
---- /dev/null
-+++ b/target/linux/generic/backport-5.4/602-v5.12-net-add-sysfs-attribute-to-control-napi-threaded-mod.patch
-@@ -0,0 +1,177 @@
-+From: Wei Wang <weiwan@google.com>
-+Date: Mon, 8 Feb 2021 11:34:10 -0800
-+Subject: [PATCH] net: add sysfs attribute to control napi threaded mode
-+
-+This patch adds a new sysfs attribute to the network device class.
-+Said attribute provides a per-device control to enable/disable the
-+threaded mode for all the napi instances of the given network device,
-+without the need for a device up/down.
-+User sets it to 1 or 0 to enable or disable threaded mode.
-+Note: when switching between threaded and the current softirq based mode
-+for a napi instance, it will not immediately take effect if the napi is
-+currently being polled. The mode switch will happen for the next time
-+napi_schedule() is called.
-+
-+Co-developed-by: Paolo Abeni <pabeni@redhat.com>
-+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
-+Co-developed-by: Hannes Frederic Sowa <hannes@stressinduktion.org>
-+Signed-off-by: Hannes Frederic Sowa <hannes@stressinduktion.org>
-+Co-developed-by: Felix Fietkau <nbd@nbd.name>
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+Signed-off-by: Wei Wang <weiwan@google.com>
-+Reviewed-by: Alexander Duyck <alexanderduyck@fb.com>
-+Signed-off-by: David S. Miller <davem@davemloft.net>
-+---
-+
-+--- a/Documentation/ABI/testing/sysfs-class-net
-++++ b/Documentation/ABI/testing/sysfs-class-net
-+@@ -301,3 +301,18 @@ Contact:	netdev@vger.kernel.org
-+ Description:
-+ 		32-bit unsigned integer counting the number of times the link has
-+ 		been down
-++
-++What:		/sys/class/net/<iface>/threaded
-++Date:		Jan 2021
-++KernelVersion:	5.12
-++Contact:	netdev@vger.kernel.org
-++Description:
-++		Boolean value to control the threaded mode per device. User could
-++		set this value to enable/disable threaded mode for all napi
-++		belonging to this device, without the need to do device up/down.
-++
-++		Possible values:
-++		== ==================================
-++		0  threaded mode disabled for this dev
-++		1  threaded mode enabled for this dev
-++		== ==================================
-+--- a/include/linux/netdevice.h
-++++ b/include/linux/netdevice.h
-+@@ -498,6 +498,8 @@ static inline bool napi_complete(struct
-+  */
-+ bool napi_hash_del(struct napi_struct *napi);
-+ 
-++int dev_set_threaded(struct net_device *dev, bool threaded);
-++
-+ /**
-+  *	napi_disable - prevent NAPI from scheduling
-+  *	@n: NAPI context
-+--- a/net/core/dev.c
-++++ b/net/core/dev.c
-+@@ -3911,8 +3911,9 @@ static inline void ____napi_schedule(str
-+ 
-+ 	if (test_bit(NAPI_STATE_THREADED, &napi->state)) {
-+ 		/* Paired with smp_mb__before_atomic() in
-+-		 * napi_enable(). Use READ_ONCE() to guarantee
-+-		 * a complete read on napi->thread. Only call
-++		 * napi_enable()/dev_set_threaded().
-++		 * Use READ_ONCE() to guarantee a complete
-++		 * read on napi->thread. Only call
-+ 		 * wake_up_process() when it's not NULL.
-+ 		 */
-+ 		thread = READ_ONCE(napi->thread);
-+@@ -6290,6 +6291,49 @@ static void init_gro_hash(struct napi_st
-+ 	napi->gro_bitmask = 0;
-+ }
-+ 
-++int dev_set_threaded(struct net_device *dev, bool threaded)
-++{
-++	struct napi_struct *napi;
-++	int err = 0;
-++
-++	if (dev->threaded == threaded)
-++		return 0;
-++
-++	if (threaded) {
-++		list_for_each_entry(napi, &dev->napi_list, dev_list) {
-++			if (!napi->thread) {
-++				err = napi_kthread_create(napi);
-++				if (err) {
-++					threaded = false;
-++					break;
-++				}
-++			}
-++		}
-++	}
-++
-++	dev->threaded = threaded;
-++
-++	/* Make sure kthread is created before THREADED bit
-++	 * is set.
-++	 */
-++	smp_mb__before_atomic();
-++
-++	/* Setting/unsetting threaded mode on a napi might not immediately
-++	 * take effect, if the current napi instance is actively being
-++	 * polled. In this case, the switch between threaded mode and
-++	 * softirq mode will happen in the next round of napi_schedule().
-++	 * This should not cause hiccups/stalls to the live traffic.
-++	 */
-++	list_for_each_entry(napi, &dev->napi_list, dev_list) {
-++		if (threaded)
-++			set_bit(NAPI_STATE_THREADED, &napi->state);
-++		else
-++			clear_bit(NAPI_STATE_THREADED, &napi->state);
-++	}
-++
-++	return err;
-++}
-++
-+ void netif_napi_add(struct net_device *dev, struct napi_struct *napi,
-+ 		    int (*poll)(struct napi_struct *, int), int weight)
-+ {
-+--- a/net/core/net-sysfs.c
-++++ b/net/core/net-sysfs.c
-+@@ -557,6 +557,45 @@ static ssize_t phys_switch_id_show(struc
-+ }
-+ static DEVICE_ATTR_RO(phys_switch_id);
-+ 
-++static ssize_t threaded_show(struct device *dev,
-++			     struct device_attribute *attr, char *buf)
-++{
-++	struct net_device *netdev = to_net_dev(dev);
-++	ssize_t ret = -EINVAL;
-++
-++	if (!rtnl_trylock())
-++		return restart_syscall();
-++
-++	if (dev_isalive(netdev))
-++		ret = sprintf(buf, fmt_dec, netdev->threaded);
-++
-++	rtnl_unlock();
-++	return ret;
-++}
-++
-++static int modify_napi_threaded(struct net_device *dev, unsigned long val)
-++{
-++	int ret;
-++
-++	if (list_empty(&dev->napi_list))
-++		return -EOPNOTSUPP;
-++
-++	if (val != 0 && val != 1)
-++		return -EOPNOTSUPP;
-++
-++	ret = dev_set_threaded(dev, val);
-++
-++	return ret;
-++}
-++
-++static ssize_t threaded_store(struct device *dev,
-++			      struct device_attribute *attr,
-++			      const char *buf, size_t len)
-++{
-++	return netdev_store(dev, attr, buf, len, modify_napi_threaded);
-++}
-++static DEVICE_ATTR_RW(threaded);
-++
-+ static struct attribute *net_class_attrs[] __ro_after_init = {
-+ 	&dev_attr_netdev_group.attr,
-+ 	&dev_attr_type.attr,
-+@@ -587,6 +626,7 @@ static struct attribute *net_class_attrs
-+ 	&dev_attr_proto_down.attr,
-+ 	&dev_attr_carrier_up_count.attr,
-+ 	&dev_attr_carrier_down_count.attr,
-++	&dev_attr_threaded.attr,
-+ 	NULL,
-+ };
-+ ATTRIBUTE_GROUPS(net_class);
-diff --git a/target/linux/generic/backport-5.4/603-v5.12-net-fix-race-between-napi-kthread-mode-and-busy-poll.patch b/target/linux/generic/backport-5.4/603-v5.12-net-fix-race-between-napi-kthread-mode-and-busy-poll.patch
-new file mode 100644
-index 0000000000..19c5a53a27
---- /dev/null
-+++ b/target/linux/generic/backport-5.4/603-v5.12-net-fix-race-between-napi-kthread-mode-and-busy-poll.patch
-@@ -0,0 +1,93 @@
-+From: Wei Wang <weiwan@google.com>
-+Date: Mon, 1 Mar 2021 17:21:13 -0800
-+Subject: [PATCH] net: fix race between napi kthread mode and busy poll
-+
-+Currently, napi_thread_wait() checks for NAPI_STATE_SCHED bit to
-+determine if the kthread owns this napi and could call napi->poll() on
-+it. However, if socket busy poll is enabled, it is possible that the
-+busy poll thread grabs this SCHED bit (after the previous napi->poll()
-+invokes napi_complete_done() and clears SCHED bit) and tries to poll
-+on the same napi. napi_disable() could grab the SCHED bit as well.
-+This patch tries to fix this race by adding a new bit
-+NAPI_STATE_SCHED_THREADED in napi->state. This bit gets set in
-+____napi_schedule() if the threaded mode is enabled, and gets cleared
-+in napi_complete_done(), and we only poll the napi in kthread if this
-+bit is set. This helps distinguish the ownership of the napi between
-+kthread and other scenarios and fixes the race issue.
-+
-+Fixes: 29863d41bb6e ("net: implement threaded-able napi poll loop support")
-+Reported-by: Martin Zaharinov <micron10@gmail.com>
-+Suggested-by: Jakub Kicinski <kuba@kernel.org>
-+Signed-off-by: Wei Wang <weiwan@google.com>
-+Cc: Alexander Duyck <alexanderduyck@fb.com>
-+Cc: Eric Dumazet <edumazet@google.com>
-+Cc: Paolo Abeni <pabeni@redhat.com>
-+Cc: Hannes Frederic Sowa <hannes@stressinduktion.org>
-+---
-+
-+--- a/include/linux/netdevice.h
-++++ b/include/linux/netdevice.h
-+@@ -352,6 +352,7 @@ enum {
-+ 	NAPI_STATE_NO_BUSY_POLL,/* Do not add in napi_hash, no busy polling */
-+ 	NAPI_STATE_IN_BUSY_POLL,/* sk_busy_loop() owns this NAPI */
-+ 	NAPI_STATE_THREADED,		/* The poll is performed inside its own thread*/
-++	NAPI_STATE_SCHED_THREADED,	/* Napi is currently scheduled in threaded mode */
-+ };
-+ 
-+ enum {
-+@@ -363,6 +364,7 @@ enum {
-+ 	NAPIF_STATE_NO_BUSY_POLL = BIT(NAPI_STATE_NO_BUSY_POLL),
-+ 	NAPIF_STATE_IN_BUSY_POLL = BIT(NAPI_STATE_IN_BUSY_POLL),
-+ 	NAPIF_STATE_THREADED	 = BIT(NAPI_STATE_THREADED),
-++	NAPIF_STATE_SCHED_THREADED	= BIT(NAPI_STATE_SCHED_THREADED),
-+ };
-+ 
-+ enum gro_result {
-+--- a/net/core/dev.c
-++++ b/net/core/dev.c
-+@@ -3918,6 +3918,8 @@ static inline void ____napi_schedule(str
-+ 		 */
-+ 		thread = READ_ONCE(napi->thread);
-+ 		if (thread) {
-++			if (thread->state != TASK_INTERRUPTIBLE)
-++				set_bit(NAPI_STATE_SCHED_THREADED, &napi->state);
-+ 			wake_up_process(thread);
-+ 			return;
-+ 		}
-+@@ -6078,7 +6080,8 @@ bool napi_complete_done(struct napi_stru
-+ 
-+ 		WARN_ON_ONCE(!(val & NAPIF_STATE_SCHED));
-+ 
-+-		new = val & ~(NAPIF_STATE_MISSED | NAPIF_STATE_SCHED);
-++		new = val & ~(NAPIF_STATE_MISSED | NAPIF_STATE_SCHED |
-++			      NAPIF_STATE_SCHED_THREADED);
-+ 
-+ 		/* If STATE_MISSED was set, leave STATE_SCHED set,
-+ 		 * because we will call napi->poll() one more time.
-+@@ -6511,16 +6514,25 @@ static int napi_poll(struct napi_struct
-+ 
-+ static int napi_thread_wait(struct napi_struct *napi)
-+ {
-++	bool woken = false;
-++
-+ 	set_current_state(TASK_INTERRUPTIBLE);
-+ 
-+ 	while (!kthread_should_stop() && !napi_disable_pending(napi)) {
-+-		if (test_bit(NAPI_STATE_SCHED, &napi->state)) {
-++		/* Testing SCHED_THREADED bit here to make sure the current
-++		 * kthread owns this napi and could poll on this napi.
-++		 * Testing SCHED bit is not enough because SCHED bit might be
-++		 * set by some other busy poll thread or by napi_disable().
-++		 */
-++		if (test_bit(NAPI_STATE_SCHED_THREADED, &napi->state) || woken) {
-+ 			WARN_ON(!list_empty(&napi->poll_list));
-+ 			__set_current_state(TASK_RUNNING);
-+ 			return 0;
-+ 		}
-+ 
-+ 		schedule();
-++		/* woken being true indicates this thread owns this napi. */
-++		woken = true;
-+ 		set_current_state(TASK_INTERRUPTIBLE);
-+ 	}
-+ 	__set_current_state(TASK_RUNNING);
-diff --git a/target/linux/generic/backport-5.4/604-v5.12-net-fix-hangup-on-napi_disable-for-threaded-napi.patch b/target/linux/generic/backport-5.4/604-v5.12-net-fix-hangup-on-napi_disable-for-threaded-napi.patch
-new file mode 100644
-index 0000000000..108cf809f8
---- /dev/null
-+++ b/target/linux/generic/backport-5.4/604-v5.12-net-fix-hangup-on-napi_disable-for-threaded-napi.patch
-@@ -0,0 +1,53 @@
-+From: Paolo Abeni <pabeni@redhat.com>
-+Date: Fri, 9 Apr 2021 17:24:17 +0200
-+Subject: [PATCH] net: fix hangup on napi_disable for threaded napi
-+
-+napi_disable() is subject to an hangup, when the threaded
-+mode is enabled and the napi is under heavy traffic.
-+
-+If the relevant napi has been scheduled and the napi_disable()
-+kicks in before the next napi_threaded_wait() completes - so
-+that the latter quits due to the napi_disable_pending() condition,
-+the existing code leaves the NAPI_STATE_SCHED bit set and the
-+napi_disable() loop waiting for such bit will hang.
-+
-+This patch addresses the issue by dropping the NAPI_STATE_DISABLE
-+bit test in napi_thread_wait(). The later napi_threaded_poll()
-+iteration will take care of clearing the NAPI_STATE_SCHED.
-+
-+This also addresses a related problem reported by Jakub:
-+before this patch a napi_disable()/napi_enable() pair killed
-+the napi thread, effectively disabling the threaded mode.
-+On the patched kernel napi_disable() simply stops scheduling
-+the relevant thread.
-+
-+v1 -> v2:
-+  - let the main napi_thread_poll() loop clear the SCHED bit
-+
-+Reported-by: Jakub Kicinski <kuba@kernel.org>
-+Fixes: 29863d41bb6e ("net: implement threaded-able napi poll loop support")
-+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
-+Reviewed-by: Eric Dumazet <edumazet@google.com>
-+Link: https://lore.kernel.org/r/883923fa22745a9589e8610962b7dc59df09fb1f.1617981844.git.pabeni@redhat.com
-+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
-+---
-+
-+--- a/net/core/dev.c
-++++ b/net/core/dev.c
-+@@ -6518,7 +6518,7 @@ static int napi_thread_wait(struct napi_
-+ 
-+ 	set_current_state(TASK_INTERRUPTIBLE);
-+ 
-+-	while (!kthread_should_stop() && !napi_disable_pending(napi)) {
-++	while (!kthread_should_stop()) {
-+ 		/* Testing SCHED_THREADED bit here to make sure the current
-+ 		 * kthread owns this napi and could poll on this napi.
-+ 		 * Testing SCHED bit is not enough because SCHED bit might be
-+@@ -6536,6 +6536,7 @@ static int napi_thread_wait(struct napi_
-+ 		set_current_state(TASK_INTERRUPTIBLE);
-+ 	}
-+ 	__set_current_state(TASK_RUNNING);
-++
-+ 	return -1;
-+ }
-+ 
-diff --git a/target/linux/generic/pending-5.4/690-net-add-support-for-threaded-NAPI-polling.patch b/target/linux/generic/pending-5.4/690-net-add-support-for-threaded-NAPI-polling.patch
-deleted file mode 100644
-index febec868f4..0000000000
---- a/target/linux/generic/pending-5.4/690-net-add-support-for-threaded-NAPI-polling.patch
-+++ /dev/null
-@@ -1,356 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Sun, 26 Jul 2020 14:03:21 +0200
--Subject: [PATCH] net: add support for threaded NAPI polling
--
--For some drivers (especially 802.11 drivers), doing a lot of work in the NAPI
--poll function does not perform well. Since NAPI poll is bound to the CPU it
--was scheduled from, we can easily end up with a few very busy CPUs spending
--most of their time in softirq/ksoftirqd and some idle ones.
--
--Introduce threaded NAPI for such drivers based on a workqueue. The API is the
--same except for using netif_threaded_napi_add instead of netif_napi_add.
--
--In my tests with mt76 on MT7621 using threaded NAPI + a thread for tx scheduling
--improves LAN->WLAN bridging throughput by 10-50%. Throughput without threaded
--NAPI is wildly inconsistent, depending on the CPU that runs the tx scheduling
--thread.
--
--With threaded NAPI it seems stable and consistent (and higher than the best
--results I got without it).
--
--Based on a patch by Hillf Danton
--
--Cc: Hillf Danton <hdanton@sina.com>
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/include/linux/netdevice.h
--+++ b/include/linux/netdevice.h
--@@ -340,6 +340,7 @@ struct napi_struct {
-- 	struct list_head	dev_list;
-- 	struct hlist_node	napi_hash_node;
-- 	unsigned int		napi_id;
--+	struct work_struct	work;
-- };
-- 
-- enum {
--@@ -350,6 +351,7 @@ enum {
-- 	NAPI_STATE_HASHED,	/* In NAPI hash (busy polling possible) */
-- 	NAPI_STATE_NO_BUSY_POLL,/* Do not add in napi_hash, no busy polling */
-- 	NAPI_STATE_IN_BUSY_POLL,/* sk_busy_loop() owns this NAPI */
--+	NAPI_STATE_THREADED,	/* Use threaded NAPI */
-- };
-- 
-- enum {
--@@ -360,6 +362,7 @@ enum {
-- 	NAPIF_STATE_HASHED	 = BIT(NAPI_STATE_HASHED),
-- 	NAPIF_STATE_NO_BUSY_POLL = BIT(NAPI_STATE_NO_BUSY_POLL),
-- 	NAPIF_STATE_IN_BUSY_POLL = BIT(NAPI_STATE_IN_BUSY_POLL),
--+	NAPIF_STATE_THREADED	 = BIT(NAPI_STATE_THREADED),
-- };
-- 
-- enum gro_result {
--@@ -2101,6 +2104,7 @@ struct net_device {
-- 	struct lock_class_key	addr_list_lock_key;
-- 	bool			proto_down;
-- 	unsigned		wol_enabled:1;
--+	unsigned		threaded:1;
-- };
-- #define to_net_dev(d) container_of(d, struct net_device, dev)
-- 
--@@ -2281,6 +2285,26 @@ void netif_napi_add(struct net_device *d
-- 		    int (*poll)(struct napi_struct *, int), int weight);
-- 
-- /**
--+ *	netif_threaded_napi_add - initialize a NAPI context
--+ *	@dev:  network device
--+ *	@napi: NAPI context
--+ *	@poll: polling function
--+ *	@weight: default weight
--+ *
--+ * This variant of netif_napi_add() should be used from drivers using NAPI
--+ * with CPU intensive poll functions.
--+ * This will schedule polling from a high priority workqueue
--+ */
--+static inline void netif_threaded_napi_add(struct net_device *dev,
--+					   struct napi_struct *napi,
--+					   int (*poll)(struct napi_struct *, int),
--+					   int weight)
--+{
--+	set_bit(NAPI_STATE_THREADED, &napi->state);
--+	netif_napi_add(dev, napi, poll, weight);
--+}
--+
--+/**
--  *	netif_tx_napi_add - initialize a NAPI context
--  *	@dev:  network device
--  *	@napi: NAPI context
----- a/net/core/dev.c
--+++ b/net/core/dev.c
--@@ -156,6 +156,7 @@ static DEFINE_SPINLOCK(offload_lock);
-- struct list_head ptype_base[PTYPE_HASH_SIZE] __read_mostly;
-- struct list_head ptype_all __read_mostly;	/* Taps */
-- static struct list_head offload_base __read_mostly;
--+static struct workqueue_struct *napi_workq __read_mostly;
-- 
-- static int netif_rx_internal(struct sk_buff *skb);
-- static int call_netdevice_notifiers_info(unsigned long val,
--@@ -5937,6 +5938,11 @@ void __napi_schedule(struct napi_struct
-- {
-- 	unsigned long flags;
-- 
--+	if (test_bit(NAPI_STATE_THREADED, &n->state)) {
--+		queue_work(napi_workq, &n->work);
--+		return;
--+	}
--+
-- 	local_irq_save(flags);
-- 	____napi_schedule(this_cpu_ptr(&softnet_data), n);
-- 	local_irq_restore(flags);
--@@ -5988,6 +5994,11 @@ EXPORT_SYMBOL(napi_schedule_prep);
--  */
-- void __napi_schedule_irqoff(struct napi_struct *n)
-- {
--+	if (test_bit(NAPI_STATE_THREADED, &n->state)) {
--+		queue_work(napi_workq, &n->work);
--+		return;
--+	}
--+
-- 	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
-- 		____napi_schedule(this_cpu_ptr(&softnet_data), n);
-- 	else
--@@ -6252,9 +6263,89 @@ static void init_gro_hash(struct napi_st
-- 	napi->gro_bitmask = 0;
-- }
-- 
--+static int __napi_poll(struct napi_struct *n, bool *repoll)
--+{
--+	int work, weight;
--+
--+	weight = n->weight;
--+
--+	/* This NAPI_STATE_SCHED test is for avoiding a race
--+	 * with netpoll's poll_napi().  Only the entity which
--+	 * obtains the lock and sees NAPI_STATE_SCHED set will
--+	 * actually make the ->poll() call.  Therefore we avoid
--+	 * accidentally calling ->poll() when NAPI is not scheduled.
--+	 */
--+	work = 0;
--+	if (test_bit(NAPI_STATE_SCHED, &n->state)) {
--+		work = n->poll(n, weight);
--+		trace_napi_poll(n, work, weight);
--+	}
--+
--+	WARN_ON_ONCE(work > weight);
--+
--+	if (likely(work < weight))
--+		return work;
--+
--+	/* Drivers must not modify the NAPI state if they
--+	 * consume the entire weight.  In such cases this code
--+	 * still "owns" the NAPI instance and therefore can
--+	 * move the instance around on the list at-will.
--+	 */
--+	if (unlikely(napi_disable_pending(n))) {
--+		napi_complete(n);
--+		return work;
--+	}
--+
--+	if (n->gro_bitmask) {
--+		/* flush too old packets
--+		 * If HZ < 1000, flush all packets.
--+		 */
--+		napi_gro_flush(n, HZ >= 1000);
--+	}
--+
--+	gro_normal_list(n);
--+
--+	*repoll = true;
--+
--+	return work;
--+}
--+
--+static void napi_workfn(struct work_struct *work)
--+{
--+	struct napi_struct *n = container_of(work, struct napi_struct, work);
--+	void *have;
--+
--+	for (;;) {
--+		bool repoll = false;
--+
--+		local_bh_disable();
--+
--+		have = netpoll_poll_lock(n);
--+		__napi_poll(n, &repoll);
--+		netpoll_poll_unlock(have);
--+
--+		local_bh_enable();
--+
--+		if (!repoll)
--+			return;
--+
--+		if (!need_resched())
--+			continue;
--+
--+		/*
--+		 * have to pay for the latency of task switch even if
--+		 * napi is scheduled
--+		 */
--+		queue_work(napi_workq, work);
--+		return;
--+	}
--+}
--+
-- void netif_napi_add(struct net_device *dev, struct napi_struct *napi,
-- 		    int (*poll)(struct napi_struct *, int), int weight)
-- {
--+	if (dev->threaded)
--+		set_bit(NAPI_STATE_THREADED, &napi->state);
-- 	INIT_LIST_HEAD(&napi->poll_list);
-- 	hrtimer_init(&napi->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL_PINNED);
-- 	napi->timer.function = napi_watchdog;
--@@ -6271,6 +6362,7 @@ void netif_napi_add(struct net_device *d
-- #ifdef CONFIG_NETPOLL
-- 	napi->poll_owner = -1;
-- #endif
--+	INIT_WORK(&napi->work, napi_workfn);
-- 	set_bit(NAPI_STATE_SCHED, &napi->state);
-- 	set_bit(NAPI_STATE_NPSVC, &napi->state);
-- 	list_add_rcu(&napi->dev_list, &dev->napi_list);
--@@ -6311,6 +6403,7 @@ static void flush_gro_hash(struct napi_s
-- void netif_napi_del(struct napi_struct *napi)
-- {
-- 	might_sleep();
--+	cancel_work_sync(&napi->work);
-- 	if (napi_hash_del(napi))
-- 		synchronize_net();
-- 	list_del_init(&napi->dev_list);
--@@ -6323,50 +6416,18 @@ EXPORT_SYMBOL(netif_napi_del);
-- 
-- static int napi_poll(struct napi_struct *n, struct list_head *repoll)
-- {
--+	bool do_repoll = false;
-- 	void *have;
---	int work, weight;
--+	int work;
-- 
-- 	list_del_init(&n->poll_list);
-- 
-- 	have = netpoll_poll_lock(n);
-- 
---	weight = n->weight;
--+	work = __napi_poll(n, &do_repoll);
-- 
---	/* This NAPI_STATE_SCHED test is for avoiding a race
---	 * with netpoll's poll_napi().  Only the entity which
---	 * obtains the lock and sees NAPI_STATE_SCHED set will
---	 * actually make the ->poll() call.  Therefore we avoid
---	 * accidentally calling ->poll() when NAPI is not scheduled.
---	 */
---	work = 0;
---	if (test_bit(NAPI_STATE_SCHED, &n->state)) {
---		work = n->poll(n, weight);
---		trace_napi_poll(n, work, weight);
---	}
---
---	WARN_ON_ONCE(work > weight);
---
---	if (likely(work < weight))
---		goto out_unlock;
---
---	/* Drivers must not modify the NAPI state if they
---	 * consume the entire weight.  In such cases this code
---	 * still "owns" the NAPI instance and therefore can
---	 * move the instance around on the list at-will.
---	 */
---	if (unlikely(napi_disable_pending(n))) {
---		napi_complete(n);
--+	if (!do_repoll)
-- 		goto out_unlock;
---	}
---
---	if (n->gro_bitmask) {
---		/* flush too old packets
---		 * If HZ < 1000, flush all packets.
---		 */
---		napi_gro_flush(n, HZ >= 1000);
---	}
---
---	gro_normal_list(n);
-- 
-- 	/* Some drivers may have called napi_schedule
-- 	 * prior to exhausting their budget.
--@@ -10346,6 +10407,10 @@ static int __init net_dev_init(void)
-- 		sd->backlog.weight = weight_p;
-- 	}
-- 
--+	napi_workq = alloc_workqueue("napi_workq", WQ_UNBOUND | WQ_HIGHPRI,
--+				     WQ_UNBOUND_MAX_ACTIVE | WQ_SYSFS);
--+	BUG_ON(!napi_workq);
--+
-- 	dev_boot_phase = 0;
-- 
-- 	/* The loopback device is special if any other network devices
----- a/net/core/net-sysfs.c
--+++ b/net/core/net-sysfs.c
--@@ -442,6 +442,52 @@ static ssize_t proto_down_store(struct d
-- }
-- NETDEVICE_SHOW_RW(proto_down, fmt_dec);
-- 
--+static int change_napi_threaded(struct net_device *dev, unsigned long val)
--+{
--+	struct napi_struct *napi;
--+
--+	if (list_empty(&dev->napi_list))
--+		return -EOPNOTSUPP;
--+
--+	list_for_each_entry(napi, &dev->napi_list, dev_list) {
--+		if (val)
--+			set_bit(NAPI_STATE_THREADED, &napi->state);
--+		else
--+			clear_bit(NAPI_STATE_THREADED, &napi->state);
--+	}
--+
--+	return 0;
--+}
--+
--+static ssize_t napi_threaded_store(struct device *dev,
--+				struct device_attribute *attr,
--+				const char *buf, size_t len)
--+{
--+	return netdev_store(dev, attr, buf, len, change_napi_threaded);
--+}
--+
--+static ssize_t napi_threaded_show(struct device *dev,
--+				  struct device_attribute *attr,
--+				  char *buf)
--+{
--+	struct net_device *netdev = to_net_dev(dev);
--+	struct napi_struct *napi;
--+	bool enabled = false;
--+
--+	if (!rtnl_trylock())
--+		return restart_syscall();
--+
--+	list_for_each_entry(napi, &netdev->napi_list, dev_list) {
--+		if (test_bit(NAPI_STATE_THREADED, &napi->state))
--+			enabled = true;
--+	}
--+
--+	rtnl_unlock();
--+
--+	return sprintf(buf, fmt_dec, enabled);
--+}
--+static DEVICE_ATTR_RW(napi_threaded);
--+
-- static ssize_t phys_port_id_show(struct device *dev,
-- 				 struct device_attribute *attr, char *buf)
-- {
--@@ -532,6 +578,7 @@ static struct attribute *net_class_attrs
-- 	&dev_attr_flags.attr,
-- 	&dev_attr_tx_queue_len.attr,
-- 	&dev_attr_gro_flush_timeout.attr,
--+	&dev_attr_napi_threaded.attr,
-- 	&dev_attr_phys_port_id.attr,
-- 	&dev_attr_phys_port_name.attr,
-- 	&dev_attr_phys_switch_id.attr,
--- 
-2.25.1
-
diff --git a/patches/backports/0059-bpf.mk-backport-a-fix-that-unbreaks-bpf-compile-on-a.patch b/patches/backports/0059-bpf.mk-backport-a-fix-that-unbreaks-bpf-compile-on-a.patch
deleted file mode 100644
index e5fbef07f..000000000
--- a/patches/backports/0059-bpf.mk-backport-a-fix-that-unbreaks-bpf-compile-on-a.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From aed33811a7780131e72bf14a616579bee46ce5ae Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Tue, 3 May 2022 07:42:32 +0200
-Subject: [PATCH] bpf.mk: backport a fix that unbreaks bpf compile on armv7
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- include/bpf.mk | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/include/bpf.mk b/include/bpf.mk
-index 2f797625b6..d8164436a4 100644
---- a/include/bpf.mk
-+++ b/include/bpf.mk
-@@ -66,7 +66,7 @@ define CompileBPF
- 	LD_LIBRARY_PATH=$(LD_LIBRARY_PATH):$(STAGING_DIR_HOST)/lib \
- 	$(LLVM_DIS) < $(patsubst %.c,%.opt,$(1)) > $(patsubst %.c,%.S,$(1))
- 	LD_LIBRARY_PATH=$(LD_LIBRARY_PATH):$(STAGING_DIR_HOST)/lib \
--	$(LLVM_LLC) -march=$(BPF_TARGET) -filetype=obj -o $(patsubst %.c,%.o,$(1)) < $(patsubst %.c,%.S,$(1))
-+	$(LLVM_LLC) -march=$(BPF_TARGET) -mcpu=v3 -filetype=obj -o $(patsubst %.c,%.o,$(1)) < $(patsubst %.c,%.S,$(1))
- 	LD_LIBRARY_PATH=$(LD_LIBRARY_PATH):$(STAGING_DIR_HOST)/lib \
- 	$(LLVM_STRIP) --strip-debug $(patsubst %.c,%.o,$(1))
- endef
--- 
-2.25.1
-
diff --git a/patches/backports/0062-uboot-envtools-ipq40xx-ipq806x-fix-syntax.patch b/patches/backports/0062-uboot-envtools-ipq40xx-ipq806x-fix-syntax.patch
deleted file mode 100644
index 417d5fbc7..000000000
--- a/patches/backports/0062-uboot-envtools-ipq40xx-ipq806x-fix-syntax.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From d0ccce13b5d72712ffb19af77fbab2b4926e8d28 Mon Sep 17 00:00:00 2001
-From: Ravi Vaishnav <ravi.vaishnav@netexperience.com>
-Date: Mon, 23 Jan 2023 13:46:32 -0500
-Subject: [PATCH] uboot-envtools. ipq40xx, ipq806x. Fix syntax
-
-Signed-off-by: Ravi Vaishnav <ravi.vaishnav@netexperience.com>
----
- package/boot/uboot-envtools/files/ipq40xx | 2 +-
- package/boot/uboot-envtools/files/ipq806x | 2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/package/boot/uboot-envtools/files/ipq40xx b/package/boot/uboot-envtools/files/ipq40xx
-index c51b40ab12..d112d9eb40 100644
---- a/package/boot/uboot-envtools/files/ipq40xx
-+++ b/package/boot/uboot-envtools/files/ipq40xx
-@@ -26,7 +26,7 @@ ubootenv_mtdinfo () {
- 		ubootenv_size=0x40000
- 	fi
- 
--	sectors=$(( $ubootenv_size / $mtd_erase ))
-+	sectors=$(printf '0x%x' $(( $ubootenv_size / $mtd_erase )))
- 	echo /dev/$mtd_dev 0x0 $ubootenv_size $mtd_erase $sectors
- }
- 
-diff --git a/package/boot/uboot-envtools/files/ipq806x b/package/boot/uboot-envtools/files/ipq806x
-index 1b49fd51d4..06507f8087 100644
---- a/package/boot/uboot-envtools/files/ipq806x
-+++ b/package/boot/uboot-envtools/files/ipq806x
-@@ -26,7 +26,7 @@ ubootenv_mtdinfo () {
- 		ubootenv_size=0x40000
- 	fi
- 
--	sectors=$(( $ubootenv_size / $mtd_erase ))
-+	sectors=$(printf '0x%x' $(( $ubootenv_size / $mtd_erase )))
- 	echo /dev/$mtd_dev 0x0 $ubootenv_size $mtd_erase $sectors
- }
- 
--- 
-2.25.1
-
diff --git a/patches/base/0001-.gitignore-add-the-profiles-folder.patch b/patches/base/0001-.gitignore-add-the-profiles-folder.patch
deleted file mode 100644
index 1e7b8cac7..000000000
--- a/patches/base/0001-.gitignore-add-the-profiles-folder.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 534b0e8d0ff1407c2c0e8e8c650f47ce6060a7a4 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Tue, 22 Sep 2020 18:02:55 +0200
-Subject: [PATCH 01/43] .gitignore: add the /profiles folder
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- .gitignore | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/.gitignore b/.gitignore
-index 9647daa5a4..70a592e12f 100644
---- a/.gitignore
-+++ b/.gitignore
-@@ -16,6 +16,7 @@
- /overlay
- /package/feeds
- /package/openwrt-packages
-+/profiles
- /*.patch
- key-build*
- *.orig
--- 
-2.25.1
-
diff --git a/patches/base/0015-target-add-pstore-support.patch b/patches/base/0015-target-add-pstore-support.patch
deleted file mode 100644
index caffbf1b4..000000000
--- a/patches/base/0015-target-add-pstore-support.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From 17dbf01adfa8cc4704873a57ae3676fe09f961fa Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Tue, 30 Mar 2021 19:03:43 +0200
-Subject: [PATCH 24/43] target: add pstore support
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- target/linux/generic/config-5.10                | 15 ++++++++++++++-
- target/linux/generic/config-5.4                 | 14 +++++++++++++-
- .../linux/ipq40xx/patches-5.4/903-pstore.patch  | 17 +++++++++++++++++
- 3 files changed, 44 insertions(+), 2 deletions(-)
- create mode 100644 target/linux/ipq40xx/patches-5.4/903-pstore.patch
-
-diff --git a/target/linux/generic/config-5.10 b/target/linux/generic/config-5.10
-index 4eb5607f17..2582e8851a 100644
---- a/target/linux/generic/config-5.10
-+++ b/target/linux/generic/config-5.10
-@@ -4506,7 +4506,20 @@ CONFIG_PROC_SYSCTL=y
- # CONFIG_PSAMPLE is not set
- # CONFIG_PSB6970_PHY is not set
- # CONFIG_PSI is not set
--# CONFIG_PSTORE is not set
-+CONFIG_PSTORE=y
-+# CONFIG_PSTORE_842_COMPRESS is not set
-+# CONFIG_PSTORE_BLK is not set
-+CONFIG_PSTORE_COMPRESS=y
-+CONFIG_PSTORE_COMPRESS_DEFAULT="deflate"
-+# CONFIG_PSTORE_CONSOLE is not set
-+CONFIG_PSTORE_DEFLATE_COMPRESS=y
-+CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y
-+# CONFIG_PSTORE_LZ4HC_COMPRESS is not set
-+# CONFIG_PSTORE_LZ4_COMPRESS is not set
-+# CONFIG_PSTORE_LZO_COMPRESS is not set
-+# CONFIG_PSTORE_PMSG is not set
-+CONFIG_PSTORE_RAM=y
-+# CONFIG_PSTORE_ZSTD_COMPRESS is not set
- # CONFIG_PTDUMP_DEBUGFS is not set
- # CONFIG_PTP_1588_CLOCK is not set
- # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set
-diff --git a/target/linux/generic/config-5.4 b/target/linux/generic/config-5.4
-index da0e2e2186..b6673ede4d 100644
---- a/target/linux/generic/config-5.4
-+++ b/target/linux/generic/config-5.4
-@@ -4177,7 +4177,19 @@ CONFIG_PROC_SYSCTL=y
- # CONFIG_PSAMPLE is not set
- # CONFIG_PSB6970_PHY is not set
- # CONFIG_PSI is not set
--# CONFIG_PSTORE is not set
-+CONFIG_PSTORE=y
-+# CONFIG_PSTORE_842_COMPRESS is not set
-+CONFIG_PSTORE_COMPRESS=y
-+CONFIG_PSTORE_COMPRESS_DEFAULT="deflate"
-+# CONFIG_PSTORE_CONSOLE is not set
-+CONFIG_PSTORE_DEFLATE_COMPRESS=y
-+CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y
-+# CONFIG_PSTORE_LZ4HC_COMPRESS is not set
-+# CONFIG_PSTORE_LZ4_COMPRESS is not set
-+# CONFIG_PSTORE_LZO_COMPRESS is not set
-+# CONFIG_PSTORE_PMSG is not set
-+CONFIG_PSTORE_RAM=y
-+# CONFIG_PSTORE_ZSTD_COMPRESS is not set
- # CONFIG_PTP_1588_CLOCK is not set
- # CONFIG_PTP_1588_CLOCK_IXP46X is not set
- # CONFIG_PTP_1588_CLOCK_KVM is not set
-diff --git a/target/linux/ipq40xx/patches-5.4/903-pstore.patch b/target/linux/ipq40xx/patches-5.4/903-pstore.patch
-new file mode 100644
-index 0000000000..89ea4a438e
---- /dev/null
-+++ b/target/linux/ipq40xx/patches-5.4/903-pstore.patch
-@@ -0,0 +1,17 @@
-+Index: linux-5.4.105/arch/arm/boot/dts/qcom-ipq4019.dtsi
-+===================================================================
-+--- linux-5.4.105.orig/arch/arm/boot/dts/qcom-ipq4019.dtsi
-++++ linux-5.4.105/arch/arm/boot/dts/qcom-ipq4019.dtsi
-+@@ -32,6 +32,12 @@
-+ 			reg = <0x87e80000 0x180000>;
-+ 			no-map;
-+ 		};
-++
-++		ramoops@87f00000 {
-++			compatible = "ramoops";
-++			reg = <0x87df0000 0x10000>;
-++			record-size = <0x1000>;
-++		};
-+ 	};
-+ 
-+ 	aliases {
--- 
-2.25.1
-
diff --git a/patches/base/0017-base-files-fix-rootfs_data_max-support-during-sysupg.patch b/patches/base/0017-base-files-fix-rootfs_data_max-support-during-sysupg.patch
deleted file mode 100644
index cb9ca351c..000000000
--- a/patches/base/0017-base-files-fix-rootfs_data_max-support-during-sysupg.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 35412c4626e6b2195421452926dd9b2854bceb9a Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Tue, 17 Aug 2021 17:29:22 +0200
-Subject: [PATCH 41/43] base-files: fix rootfs_data_max support during
- sysupgrade
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/base-files/files/sbin/sysupgrade | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/package/base-files/files/sbin/sysupgrade b/package/base-files/files/sbin/sysupgrade
-index 7e0a00e13b..5a2d459013 100755
---- a/package/base-files/files/sbin/sysupgrade
-+++ b/package/base-files/files/sbin/sysupgrade
-@@ -357,6 +357,8 @@ if [ $TEST -eq 1 ]; then
- 	exit 0
- fi
- 
-+fw_printenv > /dev/null
-+
- install_bin /sbin/upgraded
- v "Commencing upgrade. Closing all shell sessions."
- 
--- 
-2.25.1
-
diff --git a/patches/base/0019-procd-add-service-measurement.patch b/patches/base/0019-procd-add-service-measurement.patch
deleted file mode 100644
index 9bd055eba..000000000
--- a/patches/base/0019-procd-add-service-measurement.patch
+++ /dev/null
@@ -1,185 +0,0 @@
-From 87d55ae018f4298fed4c223c5f8fca9750b6d868 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Wed, 26 Jan 2022 07:51:17 +0100
-Subject: [PATCH 31/31] procd: add service measurement
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- ...service-resource-measurement-support.patch | 165 ++++++++++++++++++
- 1 file changed, 165 insertions(+)
- create mode 100644 package/system/procd/patches/0002-add-service-resource-measurement-support.patch
-
-diff --git a/package/system/procd/patches/0002-add-service-resource-measurement-support.patch b/package/system/procd/patches/0002-add-service-resource-measurement-support.patch
-new file mode 100644
-index 0000000000..de3e767eac
---- /dev/null
-+++ b/package/system/procd/patches/0002-add-service-resource-measurement-support.patch
-@@ -0,0 +1,165 @@
-+From b34b9a29cff6de4487586cae6d09bac45b9a9e59 Mon Sep 17 00:00:00 2001
-+From: John Crispin <john@phrozen.org>
-+Date: Wed, 26 Jan 2022 07:43:55 +0100
-+Subject: [PATCH] add service resource measurement support
-+
-+Signed-off-by: John Crispin <john@phrozen.org>
-+---
-+ service/instance.c | 106 ++++++++++++++++++++++++++++++++++++++++++++-
-+ service/instance.h |   1 +
-+ service/service.c  |   1 +
-+ 3 files changed, 107 insertions(+), 1 deletion(-)
-+
-+diff --git a/service/instance.c b/service/instance.c
-+index 9c74265..bf2b597 100644
-+--- a/service/instance.c
-++++ b/service/instance.c
-+@@ -28,6 +28,10 @@
-+ #include <unistd.h>
-+ #define SYSLOG_NAMES
-+ #include <syslog.h>
-++#include <glob.h>
-++#include <regex.h>
-++#include <ctype.h>
-++#include <sys/sysinfo.h>
-+ 
-+ #include <libubox/md5.h>
-+ 
-+@@ -189,6 +193,102 @@ static const struct rlimit_name rlimit_names[] = {
-+ 	{ NULL, 0 }
-+ };
-+ 
-++static regex_t pat_vmdata, pat_vmstk;
-++struct sysinfo info;
-++long systick;
-++
-++static void __attribute__((constructor))
-++measure_init()
-++{
-++	regcomp(&pat_vmdata, "VmData:[ \t]*([0-9]*) kB", REG_EXTENDED);
-++	regcomp(&pat_vmstk, "VmStk:[ \t]*([0-9]*) kB", REG_EXTENDED);
-++}
-++
-++static char *
-++strnchr(char *buf, int c, int i)
-++{
-++	while (*buf && i) {
-++		buf = strchr(buf, c);
-++		buf++;
-++		i--;
-++	}
-++	return buf;
-++}
-++
-++void
-++measure_start(void)
-++{
-++	sysinfo(&info);
-++	systick = sysconf(_SC_CLK_TCK);
-++}
-++
-++static int
-++measure_process(struct blob_buf *b, pid_t pid)
-++{
-++	int fd;
-++	char buffer[512] = "";
-++	ssize_t rxed;
-++	regmatch_t matches[2];
-++	glob_t gl;
-++	size_t i;
-++	char *ch;
-++	uint32_t fdcount = 0;
-++	uint32_t mem = 0;
-++
-++	snprintf(buffer, sizeof(buffer), "/proc/%i/fd/*", (int)pid);
-++
-++	if (glob(buffer, GLOB_NOESCAPE | GLOB_MARK, NULL, &gl))
-++		return -1;
-++
-++	for (i = 0; i < gl.gl_pathc; i++)
-++		if (isdigit(basename(gl.gl_pathv[i])[0]))
-++			fdcount = fdcount + 1;
-++	globfree(&gl);
-++	blobmsg_add_u32(b, "fds", fdcount);
-++
-++	snprintf(buffer, sizeof(buffer), "/proc/%i/stat", (int)pid);
-++	fd = open(buffer, O_RDONLY);
-++	if (fd == -1)
-++		return -1;
-++
-++	rxed = read(fd, buffer, sizeof(buffer) - 1);
-++	close(fd);
-++	if (rxed == -1)
-++		return -1;
-++
-++	buffer[rxed] = 0;
-++
-++	ch = strnchr(buffer, ' ', 14);
-++	if (ch)
-++		blobmsg_add_u64(b, "load", atoll(ch));
-++
-++	ch = strnchr(buffer, ' ', 21);
-++	if (ch)
-++		blobmsg_add_u64(b, "age", info.uptime - atol(ch) / systick);
-++
-++	snprintf(buffer, sizeof(buffer), "/proc/%i/status", (int)pid);
-++	fd = open(buffer, O_RDONLY);
-++	if (fd == -1)
-++		return -1;
-++
-++	rxed = read(fd, buffer, sizeof(buffer) - 1);
-++	close(fd);
-++	if (rxed == -1)
-++		return -1;
-++
-++	buffer[rxed] = 0;
-++
-++	if (!regexec(&pat_vmdata, buffer, 2, matches, 0))
-++		mem += atoi(buffer + matches[1].rm_so) * 1024;
-++
-++	if (!regexec(&pat_vmstk, buffer, 2, matches, 0))
-++		mem += atoi(buffer + matches[1].rm_so) * 1024;
-++
-++	blobmsg_add_u64(b, "meminfo", mem);
-++
-++	return 0;
-++}
-++
-+ static void closefd(int fd)
-+ {
-+ 	if (fd > STDERR_FILENO)
-+@@ -1795,5 +1896,8 @@ void instance_dump(struct blob_buf *b, struct service_instance *in, int verbose)
-+ 		blobmsg_close_table(b, r);
-+ 	}
-+ 
-++	if (in->proc.pending)
-++		measure_process(b, in->proc.pid);
-++
-+ 	blobmsg_close_table(b, i);
-+ }
-+diff --git a/service/instance.h b/service/instance.h
-+index 15eb997..1606eed 100644
-+--- a/service/instance.h
-++++ b/service/instance.h
-+@@ -122,5 +122,6 @@ void instance_update(struct service_instance *in, struct service_instance *in_ne
-+ void instance_init(struct service_instance *in, struct service *s, struct blob_attr *config);
-+ void instance_free(struct service_instance *in);
-+ void instance_dump(struct blob_buf *b, struct service_instance *in, int debug);
-++void measure_start(void);
-+ 
-+ #endif
-+diff --git a/service/service.c b/service/service.c
-+index bb3e121..9cd8886 100644
-+--- a/service/service.c
-++++ b/service/service.c
-+@@ -497,6 +497,7 @@ service_handle_list(struct ubus_context *ctx, struct ubus_object *obj,
-+ 	if (tb[SERVICE_LIST_ATTR_NAME])
-+ 		name = blobmsg_get_string(tb[SERVICE_LIST_ATTR_NAME]);
-+ 
-++	measure_start();
-+ 	blob_buf_init(&b, 0);
-+ 	avl_for_each_element(tree, s, avl) {
-+ 		if (name && strcmp(s->name, name) != 0)
-+-- 
-+2.25.1
-+
--- 
-2.25.1
-
diff --git a/patches/base/0021-ubox-add-log-priority-filtering.patch b/patches/base/0021-ubox-add-log-priority-filtering.patch
deleted file mode 100644
index bfe054bf6..000000000
--- a/patches/base/0021-ubox-add-log-priority-filtering.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From 54ba51e39a2abcb50bd3a91c369bc2837aee9aaa Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Mon, 31 Jan 2022 12:40:51 +0100
-Subject: [PATCH] ubox: add log priority filtering
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/system/ubox/files/log.init            |  2 +
- .../ubox/patches/000-log-priority.patch       | 50 +++++++++++++++++++
- 2 files changed, 52 insertions(+)
- create mode 100644 package/system/ubox/patches/000-log-priority.patch
-
-diff --git a/package/system/ubox/files/log.init b/package/system/ubox/files/log.init
-index c4802d4199..76a1110698 100644
---- a/package/system/ubox/files/log.init
-+++ b/package/system/ubox/files/log.init
-@@ -20,6 +20,7 @@ validate_log_section()
- 		'log_port:port:514' \
- 		'log_proto:or("tcp", "udp"):udp' \
- 		'log_trailer_null:bool:0' \
-+		'log_priority:uinteger' \
- 		'log_prefix:string'
- }
- 
-@@ -80,6 +81,7 @@ start_service_remote()
- 		"tcp") [ "${log_trailer_null}" -eq 1 ] && procd_append_param command -0;;
- 	esac
- 	[ -z "${log_prefix}" ] || procd_append_param command -P "${log_prefix}"
-+	[ -z "${log_priority}" ] || procd_append_param command -m "${log_priority}"
- 	procd_close_instance
- }
- 
-diff --git a/package/system/ubox/patches/000-log-priority.patch b/package/system/ubox/patches/000-log-priority.patch
-new file mode 100644
-index 0000000000..736e224a34
---- /dev/null
-+++ b/package/system/ubox/patches/000-log-priority.patch
-@@ -0,0 +1,50 @@
-+Index: ubox-2020-10-25-9ef88681/log/logread.c
-+===================================================================
-+--- ubox-2020-10-25-9ef88681.orig/log/logread.c
-++++ ubox-2020-10-25-9ef88681/log/logread.c
-+@@ -63,7 +63,7 @@ static struct uloop_fd sender;
-+ static regex_t regexp_preg;
-+ static const char *log_file, *log_ip, *log_port, *log_prefix, *pid_file, *hostname, *regexp_pattern;
-+ static int log_type = LOG_STDOUT;
-+-static int log_size, log_udp, log_follow, log_trailer_null = 0;
-++static int log_size, log_udp, log_follow, log_trailer_null = 0, log_priority = -1;
-+ static int log_timestamp;
-+ static int logd_conn_tries = LOGD_CONNECT_RETRY;
-+ static int facility_include;
-+@@ -147,6 +147,9 @@ static int log_notify(struct blob_attr *
-+ 	}
-+ 	p = blobmsg_get_u32(tb[LOG_PRIO]);
-+ 
-++	if (log_priority >= 0 && LOG_PRI(p) > log_priority)
-++		return 0;
-++
-+ 	if (!check_facility_filter(LOG_FAC(p)))
-+ 			return 0;
-+ 
-+@@ -229,6 +232,7 @@ static int usage(const char *prog)
-+ 		"    -P	<prefix>	Prefix custom text to streamed messages\n"
-+ 		"    -z	<facility>	handle only messages with given facility (0-23), repeatable\n"
-+ 		"    -Z	<facility>	ignore messages with given facility (0-23), repeatable\n"
-++		"    -m <priority>	filter messages by their maximum priority\n"
-+ 		"    -f			Follow log messages\n"
-+ 		"    -u			Use UDP as the protocol\n"
-+ 		"    -t			Add an extra timestamp\n"
-+@@ -307,7 +311,7 @@ int main(int argc, char **argv)
-+ 
-+ 	signal(SIGPIPE, SIG_IGN);
-+ 
-+-	while ((ch = getopt(argc, argv, "u0fcs:l:z:Z:r:F:p:S:P:h:e:t")) != -1) {
-++	while ((ch = getopt(argc, argv, "u0fcs:l:z:Z:r:F:p:S:P:h:e:tm:")) != -1) {
-+ 		switch (ch) {
-+ 		case 'u':
-+ 			log_udp = 1;
-+@@ -345,6 +349,9 @@ int main(int argc, char **argv)
-+ 			id = strtoul(optarg, NULL, 0) & 0x1f;
-+ 			facility_exclude |= (1 << id);
-+ 			break;
-++		case 'm':
-++			log_priority = atoi(optarg);
-++			break;
-+ 		case 'S':
-+ 			log_size = atoi(optarg);
-+ 			if (log_size < 1)
--- 
-2.25.1
-
diff --git a/patches/base/0025-uhttpd-update-to-latest-HEAD.patch b/patches/base/0025-uhttpd-update-to-latest-HEAD.patch
deleted file mode 100644
index 96f3a377e..000000000
--- a/patches/base/0025-uhttpd-update-to-latest-HEAD.patch
+++ /dev/null
@@ -1,163 +0,0 @@
-From 3a4a31f26f1699b9a4a7d6684a380a990bb9ac86 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Wed, 10 Aug 2022 09:50:13 +0200
-Subject: [PATCH 85/85] uhttpd: update to latest HEAD
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/network/services/uhttpd/Makefile      |  43 +++--
- .../services/uhttpd/files/uhttpd.config       |   8 +
- .../network/services/uhttpd/files/uhttpd.init |  15 ++
- .../services/uhttpd/patches/error.patch       | 165 ------------------
- .../services/uhttpd/patches/path.patch        |  14 --
- 5 files changed, 56 insertions(+), 189 deletions(-)
- delete mode 100644 package/network/services/uhttpd/patches/error.patch
- delete mode 100644 package/network/services/uhttpd/patches/path.patch
-
-diff --git a/package/network/services/uhttpd/Makefile b/package/network/services/uhttpd/Makefile
-index de666a480d..0ae076ca8b 100644
---- a/package/network/services/uhttpd/Makefile
-+++ b/package/network/services/uhttpd/Makefile
-@@ -8,19 +8,18 @@
- include $(TOPDIR)/rules.mk
- 
- PKG_NAME:=uhttpd
--PKG_RELEASE:=2
-+PKG_RELEASE:=1
- 
- PKG_SOURCE_PROTO:=git
- PKG_SOURCE_URL=$(PROJECT_GIT)/project/uhttpd.git
--PKG_SOURCE_DATE:=2021-03-21
--PKG_SOURCE_VERSION:=15346de8d3ba422002496526ee24c62a3601ab8c
--PKG_MIRROR_HASH:=819424d071ed7c8888f9ca66f679907831becc59a67dd4a5ec521d5fba0a3171
-+PKG_SOURCE_DATE:=2022-06-01
-+PKG_SOURCE_VERSION:=e3395cd90bed9b7b9fc319e79528fedcc0d947fe
- PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
- PKG_LICENSE:=ISC
- 
- PKG_ASLR_PIE_REGULAR:=1
- PKG_BUILD_DEPENDS = ustream-ssl
--PKG_CONFIG_DEPENDS:= CONFIG_uhttpd_lua
-+PKG_CONFIG_DEPENDS:= CONFIG_uhttpd_lua CONFIG_uhttpd_ucode
- 
- include $(INCLUDE_DIR)/package.mk
- include $(INCLUDE_DIR)/cmake.mk
-@@ -49,8 +48,20 @@ define Package/uhttpd/config
-     depends on PACKAGE_uhttpd-mod-lua
-     bool "Enable Integrated Lua interpreter"
- 	default y
-+
-+  config uhttpd_ucode
-+    depends on PACKAGE_uhttpd-mod-ucode
-+    bool "Enable Integrated ucode interpreter"
-+	default y
- endef
- 
-+define Package/uhttpd/conffiles
-+/etc/config/uhttpd
-+/etc/uhttpd.crt
-+/etc/uhttpd.key
-+endef
-+
-+
- define Package/uhttpd-mod-lua
-   $(Package/uhttpd/default)
-   TITLE+= (Lua plugin)
-@@ -73,19 +84,25 @@ define Package/uhttpd-mod-ubus/description
-  session.* namespace and procedures.
- endef
- 
--define Package/uhttpd/conffiles
--/etc/config/uhttpd
--/etc/uhttpd.crt
--/etc/uhttpd.key
-+
-+define Package/uhttpd-mod-ucode
-+  $(Package/uhttpd/default)
-+  TITLE+= (ucode plugin)
-+  DEPENDS:=uhttpd +libucode
-+endef
-+
-+define Package/uhttpd-mod-ucode/description
-+ The ucode plugin adds a CGI-like ucode runtime interface to uHTTPd.
- endef
- 
-+
- ifneq ($(CONFIG_USE_GLIBC),)
-   TARGET_CFLAGS += -D_DEFAULT_SOURCE
- endif
- 
- TARGET_LDFLAGS += -lcrypt
- 
--CMAKE_OPTIONS = -DTLS_SUPPORT=on
-+CMAKE_OPTIONS += -DTLS_SUPPORT=on
- 
- define Package/uhttpd/install
- 	$(INSTALL_DIR) $(1)/etc/init.d
-@@ -108,7 +125,13 @@ define Package/uhttpd-mod-ubus/install
- 	$(INSTALL_DATA) ./files/ubus.default $(1)/etc/uci-defaults/00_uhttpd_ubus
- endef
- 
-+define Package/uhttpd-mod-ucode/install
-+	$(INSTALL_DIR) $(1)/usr/lib
-+	$(INSTALL_BIN) $(PKG_BUILD_DIR)/uhttpd_ucode.so $(1)/usr/lib/
-+endef
-+
- 
- $(eval $(call BuildPackage,uhttpd))
- $(eval $(call BuildPackage,uhttpd-mod-lua))
- $(eval $(call BuildPackage,uhttpd-mod-ubus))
-+$(eval $(call BuildPackage,uhttpd-mod-ucode))
-diff --git a/package/network/services/uhttpd/files/uhttpd.config b/package/network/services/uhttpd/files/uhttpd.config
-index 40ce67fd01..a9b8ff3d15 100644
---- a/package/network/services/uhttpd/files/uhttpd.config
-+++ b/package/network/services/uhttpd/files/uhttpd.config
-@@ -57,6 +57,14 @@ config uhttpd main
- 	# matches have precedence over the CGI prefix.
- 	list lua_prefix		"/cgi-bin/luci=/usr/lib/lua/luci/sgi/uhttpd.lua"
- 
-+	# List of prefix->ucode handler mappings.
-+	# Any request to an URL beneath the prefix
-+	# will be dispatched to the associated ucode
-+	# handler script. Ucode support is disabled when
-+	# no handler mappings are specified. Ucode prefix
-+	# matches have precedence over the CGI prefix.
-+#	list ucode_prefix		"/ucode/example=/usr/share/example.uc"
-+
- 	# Specify the ubus-rpc prefix and socket path.
- #	option ubus_prefix	/ubus
- #	option ubus_socket	/var/run/ubus/ubus.sock
-diff --git a/package/network/services/uhttpd/files/uhttpd.init b/package/network/services/uhttpd/files/uhttpd.init
-index 30fd7b4259..8dbc23f59c 100755
---- a/package/network/services/uhttpd/files/uhttpd.init
-+++ b/package/network/services/uhttpd/files/uhttpd.init
-@@ -91,6 +91,18 @@ append_lua_prefix() {
- 	fi
- }
- 
-+append_ucode_prefix() {
-+	local v="$1"
-+	local prefix="${v%%=*}"
-+	local handler="${v#*=}"
-+
-+	if [ "$prefix" != "$handler" ] && [ -n "$prefix" ] && [ -f "$handler" ]; then
-+		procd_append_param command -o "$prefix" -O "$handler"
-+	else
-+		echo "Skipping invalid ucode prefix \"$v\"" >&2
-+	fi
-+}
-+
- start_instance()
- {
- 	UHTTPD_CERT=""
-@@ -142,6 +154,9 @@ start_instance()
- 		append_arg "$cfg" ubus_socket "-U"
- 		append_bool "$cfg" ubus_cors "-X" 0
- 	}
-+	[ -f /usr/lib/uhttpd_ucode.so ] && {
-+		config_list_foreach "$cfg" ucode_prefix append_ucode_prefix
-+	}
- 	append_arg "$cfg" script_timeout "-t"
- 	append_arg "$cfg" network_timeout "-T"
- 	append_arg "$cfg" http_keepalive "-k"
-
diff --git a/patches/base/0028-ubox-update-to-latest-HEAD.patch b/patches/base/0028-ubox-update-to-latest-HEAD.patch
deleted file mode 100644
index 605eb0f5d..000000000
--- a/patches/base/0028-ubox-update-to-latest-HEAD.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From b2cea8e521532dfa4f4156933bbd0f2a8c560644 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Mon, 23 Jan 2023 11:58:34 +0100
-Subject: [PATCH] ubox: update to latest HEAD
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/system/ubox/Makefile | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/package/system/ubox/Makefile b/package/system/ubox/Makefile
-index 9ba4abdd58..766ca1c2e7 100644
---- a/package/system/ubox/Makefile
-+++ b/package/system/ubox/Makefile
-@@ -5,9 +5,9 @@ PKG_RELEASE:=2
- 
- PKG_SOURCE_PROTO:=git
- PKG_SOURCE_URL=$(PROJECT_GIT)/project/ubox.git
-+PKG_MIRROR_HASH:=aeabb4f0b0bb163fa62e2672cb3f0fd0bed3622bd7ad95d13a36e00978b4f864
- PKG_SOURCE_DATE:=2020-10-25
--PKG_SOURCE_VERSION:=9ef886819dd48303d8ced4cdbc9afbf32682535c
--PKG_MIRROR_HASH:=e2d93b798b91de98cb003f7b3be97d3d8a2413c8612b527d096c86ac5365cbdd
-+PKG_SOURCE_VERSION:=cc34fb7b922f183e6ece5fa0fec31d4eb95c5823
- CMAKE_INSTALL:=1
- 
- PKG_LICENSE:=GPL-2.0
--- 
-2.34.1
-
diff --git a/patches/base/0058-fix-target-feeds.patch b/patches/base/0058-fix-target-feeds.patch
deleted file mode 100644
index 118d204af..000000000
--- a/patches/base/0058-fix-target-feeds.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 6255f1c2ee5b586bd41fc1caea73c57ccd3e1339 Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Mon, 24 Jan 2022 13:16:00 +0100
-Subject: [PATCH] scripts/feeds: fix installing targets without explicitly
- specifying the feed
-
-Add similar code to what is done on packages
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
-(cherry-picked from commit 0bdf8d12063b9be1cd73798f54a53279d21c9c95)
----
- scripts/feeds | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/scripts/feeds b/scripts/feeds
-index 9d66ea5d9888..007726c5d38c 100755
---- a/scripts/feeds
-+++ b/scripts/feeds
-@@ -499,6 +499,8 @@ sub install_target {
- 	my $feed = shift;
- 	my $name = shift;
- 
-+	$feed = lookup_target($feed, $name);
-+
- 	$installed_targets{$name} and return 0;
- 
- 	$feed = $feed_cache{$feed->[1]}->[2];
--- 
-2.34.1
-
diff --git a/patches/base/0060-base-files-minimal-support-for-QCA-runtime-failsafe.patch b/patches/base/0060-base-files-minimal-support-for-QCA-runtime-failsafe.patch
deleted file mode 100644
index 6785aeb82..000000000
--- a/patches/base/0060-base-files-minimal-support-for-QCA-runtime-failsafe.patch
+++ /dev/null
@@ -1,116 +0,0 @@
-From 793e3c02cd7ce6392913031b1f546923d4277f50 Mon Sep 17 00:00:00 2001
-From: Piotr Dymacz <pepe2k@gmail.com>
-Date: Sun, 6 Nov 2022 10:22:42 +0100
-Subject: [PATCH] base-files: minimal support for QCA runtime failsafe upgrade
-
-During research, when working on support for YunCore AX840 board it was
-found that this vendor decided to use Qualcomm-made, so called 'runtime
-failsafe' based upgrades from QSDK (see e.g. [1] and [2]).
-
-It turned out that vendor firmware makes use of dual-image feature
-controlled by SBL (not only by U-Boot as usual). This mode allows to
-switch between two copies of firmware in case of a failed upgrade and
-works not only with kernel/rootfs but apparently, also with other parts
-of the firmware, like APPS (U-Boot), Wi-Fi (ath11k) firmware, etc.
-Here, we will focus only on the firmware (in our case, UBI on NAND).
-
-Two, equal in size, UBI partitions are used: the 'rootfs' is always the
-active one (for booting) and 'rootfs_1' is used for storing new firmware
-during the regular 'sysupgrade'. Partition names are swapped, probably
-by the 'SBL' (closed-source, second level bootloader), based on layout
-in 'MIBIB' and content of 'BOOTCONFIG'/'BOOTCONFIG1' partitions (the
-second one seems to be only a backup, as mentioned in related kernel
-driver) and then provided by 'SMEM' to U-Boot and kernel. For example:
-
-- when primary 'rootfs' partition is #0:
-  0x000000000000-0x000003c00000 : "rootfs"   (used for booting)
-  0x000003c00000-0x000007800000 : "rootfs_1"
-
-- when primary 'rootfs' partition is #1:
-  0x000000000000-0x000003c00000 : "rootfs_1"
-  0x000003c00000-0x000007800000 : "rootfs"   (used for booting)
-
-The whole solution requires support in several other places, including
-kernel (detecting crash) and U-Boot (partition swap) but this requires
-more research and apparently, YunCore doesn't even use all of that in a
-proper way, resulting only in a rotation of firmware partitions during
-upgrade (without the part responsible for reverting in case of fail
-during the upgrade).
-
-This patch adds only a small part of the solution, making 'dual-image'
-feature kind of working, resulting in rotation between 'rootfs' and
-'rootfs_1' partitions (areas on NAND) between subsequent updates. This
-requires also 'CONFIG_BOOTCONFIG_PARTITION' support in the kernel and
-in simple terms, works as follows:
-
-1. Get name of target 'rootfs' partition for upgrade from:
-   '/proc/boot_info/rootfs/upgradepartition'
-
-2. Perform upgrade and in case of success change 'primaryboot' flag
-   (1 -> 0, 0 -> 1) for 'rootfs' partition in 'BOOTCONFIG'
-
-3. Write back updated 'BOOTCONFIG' content to flash:
-   from '/proc/boot_info/getbinary_bootconfig' to mtd partitions
-   ('0:BOOTCONFIG' and '0:BOOTCONFIG1')
-
-This topic definitely requires additional research if a proper solution
-(kernel crash and/or failed upgrade detection) is needed so more changes
-might come in future.
-
-[1] https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/commit/67225a559ca8e61e87c36a1c9940a085b3950c97
-[2] https://git.codelinaro.org/clo/qsdk/oss/system/openwrt_repo/-/blob/NHSS.QSDK.12.1.5.r2/target/linux/ipq60xx/base-files/lib/upgrade/platform.sh#L175
-
-Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
----
- package/base-files/files/lib/upgrade/nand.sh | 25 ++++++++++++++++++++
- 1 file changed, 25 insertions(+)
-
-diff --git a/package/base-files/files/lib/upgrade/nand.sh b/package/base-files/files/lib/upgrade/nand.sh
-index ab3db4cdf2..349d287841 100644
---- a/package/base-files/files/lib/upgrade/nand.sh
-+++ b/package/base-files/files/lib/upgrade/nand.sh
-@@ -15,6 +15,9 @@ CI_ROOTPART="${CI_ROOTPART:-rootfs}"
- # ipq807x qsdk kernel misbehaves
- CI_IPQ807X=0
- 
-+# update BOOTCONFIG partitions (rotate rootfs/rootfs_1)
-+CI_BOOTCFG=0
-+
- ubi_mknod() {
- 	local dir="$1"
- 	local dev="/dev/$(basename $dir)"
-@@ -216,9 +219,31 @@ nand_upgrade_prepare_ubi() {
- 	return 0
- }
- 
-+nand_qca_update_bootconfig() {
-+	local primary="0"
-+	local mtdnum
-+	local part
-+
-+	[ -f /proc/boot_info/rootfs/primaryboot ] || return
-+	[ -f /proc/boot_info/getbinary_bootconfig ] || return
-+
-+	[ "$(cat /proc/boot_info/rootfs/primaryboot)" = "0" ] && primary="1"
-+	echo "$primary" > /proc/boot_info/rootfs/primaryboot 2>/dev/null
-+
-+	for part in "0:BOOTCONFIG" "0:BOOTCONFIG1"; do
-+		mtdnum="$(find_mtd_index "$part")"
-+		[ -c "/dev/mtd${mtdnum}" ] && {
-+			mtd -qq write /proc/boot_info/getbinary_bootconfig \
-+				"/dev/mtd${mtdnum}" 2>/dev/null &&\
-+			echo "partition '$part' updated"
-+		}
-+	done
-+}
-+
- nand_do_upgrade_success() {
- 	local conf_tar="/tmp/sysupgrade.tgz"
- 	sync
-+	[ "$CI_BOOTCFG" = 1 ] && nand_qca_update_bootconfig
- 	[ -f "$conf_tar" ] && nand_restore_config "$conf_tar"
- 	echo "sysupgrade successful"
- 	umount -a
--- 
-2.38.1
-
diff --git a/patches/ipq40xx/0001-Revert-ipq40xx-revert-usage-of-VLAN-S-TAG.patch b/patches/ipq40xx/0001-Revert-ipq40xx-revert-usage-of-VLAN-S-TAG.patch
deleted file mode 100644
index c0de8a9b4..000000000
--- a/patches/ipq40xx/0001-Revert-ipq40xx-revert-usage-of-VLAN-S-TAG.patch
+++ /dev/null
@@ -1,113 +0,0 @@
-From f42a338de65dc32684d26cca106853eb3e888fde Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Thu, 8 Apr 2021 10:46:29 +0200
-Subject: [PATCH 52/83] Revert "ipq40xx: revert usage of VLAN S-TAG"
-
-This reverts commit cdc8d4b46f0811292fffc6094acd81e854b5f4a5.
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- .../net/ethernet/qualcomm/essedma/edma_axi.c  | 19 +++++++++----
- .../ipq40xx/files/drivers/net/phy/ar40xx.c    | 27 ++++++++++++++++---
- 2 files changed, 37 insertions(+), 9 deletions(-)
-
-diff --git a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/edma_axi.c b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/edma_axi.c
-index af55ee4dd5..9dc38bcfcc 100644
---- a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/edma_axi.c
-+++ b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/edma_axi.c
-@@ -952,7 +952,7 @@ static int edma_axi_probe(struct platform_device *pdev)
- 		edma_netdev[i]->max_mtu = 9000;
- 		edma_netdev[i]->features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM
- 				      | NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_SG |
--				      NETIF_F_TSO | NETIF_F_GRO | NETIF_F_HW_VLAN_CTAG_TX;
-+				      NETIF_F_TSO | NETIF_F_GRO;
- 		edma_netdev[i]->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
- 				NETIF_F_HW_VLAN_CTAG_RX
- 				| NETIF_F_SG | NETIF_F_TSO | NETIF_F_GRO;
-@@ -961,11 +961,20 @@ static int edma_axi_probe(struct platform_device *pdev)
- 		edma_netdev[i]->wanted_features = NETIF_F_HW_CSUM | NETIF_F_SG |
- 					     NETIF_F_TSO | NETIF_F_GRO;
- 
-+		if (of_property_read_bool(np, "qcom,single-phy") && edma_cinfo->num_gmac == 1)
-+			edma_netdev[i]->features |= NETIF_F_HW_VLAN_CTAG_TX;
-+
- #ifdef CONFIG_RFS_ACCEL
--		edma_netdev[i]->features |=  NETIF_F_NTUPLE | NETIF_F_RXHASH;
--		edma_netdev[i]->hw_features |=  NETIF_F_NTUPLE | NETIF_F_RXHASH;
--		edma_netdev[i]->vlan_features |= NETIF_F_NTUPLE | NETIF_F_RXHASH;
--		edma_netdev[i]->wanted_features |= NETIF_F_NTUPLE | NETIF_F_RXHASH;
-+		edma_netdev[i]->features |=  NETIF_F_NTUPLE;
-+		edma_netdev[i]->hw_features |=  NETIF_F_NTUPLE;
-+		edma_netdev[i]->vlan_features |= NETIF_F_NTUPLE;
-+		edma_netdev[i]->wanted_features |= NETIF_F_NTUPLE;
-+		if (of_property_read_bool(np, "qcom,single-phy") && edma_cinfo->num_gmac == 1) {
-+			edma_netdev[i]->features |= NETIF_F_RXHASH;
-+			edma_netdev[i]->hw_features |= NETIF_F_RXHASH;
-+			edma_netdev[i]->vlan_features |= NETIF_F_RXHASH;
-+			edma_netdev[i]->wanted_features |= NETIF_F_RXHASH;
-+		}
- #endif
- 		edma_set_ethtool_ops(edma_netdev[i]);
- 
-diff --git a/target/linux/ipq40xx/files/drivers/net/phy/ar40xx.c b/target/linux/ipq40xx/files/drivers/net/phy/ar40xx.c
-index ca7f0ca350..8b3ae53bd9 100644
---- a/target/linux/ipq40xx/files/drivers/net/phy/ar40xx.c
-+++ b/target/linux/ipq40xx/files/drivers/net/phy/ar40xx.c
-@@ -1200,7 +1200,11 @@ ar40xx_init_port(struct ar40xx_priv *priv, int port)
- 
- 	ar40xx_write(priv, AR40XX_REG_PORT_STATUS(port), 0);
- 
--	ar40xx_write(priv, AR40XX_REG_PORT_HEADER(port), 0);
-+	/* CPU port is setting headers to limit output ports */
-+	if (port == 0)
-+		ar40xx_write(priv, AR40XX_REG_PORT_HEADER(port), 0x8);
-+	else
-+		ar40xx_write(priv, AR40XX_REG_PORT_HEADER(port), 0);
- 
- 	ar40xx_write(priv, AR40XX_REG_PORT_VLAN0(port), 0);
- 
-@@ -1243,6 +1247,10 @@ ar40xx_init_globals(struct ar40xx_priv *priv)
- 	t = (AR40XX_PORT0_FC_THRESH_ON_DFLT << 16) |
- 	      AR40XX_PORT0_FC_THRESH_OFF_DFLT;
- 	ar40xx_write(priv, AR40XX_REG_PORT_FLOWCTRL_THRESH(0), t);
-+
-+	/* set service tag to 802.1q */
-+	t = ETH_P_8021Q | AR40XX_ESS_SERVICE_TAG_STAG;
-+	ar40xx_write(priv, AR40XX_ESS_SERVICE_TAG, t);
- }
- 
- static int
-@@ -1530,7 +1538,10 @@ ar40xx_setup_port(struct ar40xx_priv *priv, int port, u32 members)
- 	u32 pvid = priv->vlan_id[priv->pvid[port]];
- 
- 	if (priv->vlan) {
--		egress = AR40XX_PORT_VLAN1_OUT_MODE_UNMOD;
-+		if (priv->vlan_tagged & BIT(port))
-+			egress = AR40XX_PORT_VLAN1_OUT_MODE_TAG;
-+		else
-+			egress = AR40XX_PORT_VLAN1_OUT_MODE_UNMOD;
- 
- 		ingress = AR40XX_IN_SECURE;
- 	} else {
-@@ -1542,8 +1553,16 @@ ar40xx_setup_port(struct ar40xx_priv *priv, int port, u32 members)
- 	t |= pvid << AR40XX_PORT_VLAN0_DEF_CVID_S;
- 	ar40xx_write(priv, AR40XX_REG_PORT_VLAN0(port), t);
- 
--	t = AR40XX_PORT_VLAN1_PORT_VLAN_PROP;
--	t |= egress << AR40XX_PORT_VLAN1_OUT_MODE_S;
-+	t = egress << AR40XX_PORT_VLAN1_OUT_MODE_S;
-+
-+	/* set CPU port to core port */
-+	if (port == 0)
-+		t |= AR40XX_PORT_VLAN1_CORE_PORT;
-+
-+	if (priv->vlan_tagged & BIT(port))
-+		t |= AR40XX_PORT_VLAN1_PORT_VLAN_PROP;
-+	else
-+		t |= AR40XX_PORT_VLAN1_PORT_TLS_MODE;
- 
- 	ar40xx_write(priv, AR40XX_REG_PORT_VLAN1(port), t);
- 
--- 
-2.25.1
-
diff --git a/patches/ipq40xx/0003-ipq4019-add-CIG-wf610d.patch b/patches/ipq40xx/0003-ipq4019-add-CIG-wf610d.patch
deleted file mode 100644
index c1cae25f4..000000000
--- a/patches/ipq40xx/0003-ipq4019-add-CIG-wf610d.patch
+++ /dev/null
@@ -1,644 +0,0 @@
-From abd52a80294b6752cc66432041e91ca11944366e Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Sat, 4 Sep 2021 05:56:53 +0200
-Subject: [PATCH 01/33] ipq4019: add CIG wf610d
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/firmware/ipq-wifi/Makefile            |   4 +-
- .../ipq-wifi/board-cig_wf610d.qca4019         | Bin 0 -> 24316 bytes
- .../ipq40xx/base-files/etc/board.d/01_leds    |   3 +
- .../ipq40xx/base-files/etc/board.d/02_network |   1 +
- .../etc/hotplug.d/firmware/11-ath10k-caldata  |   8 +
- .../lib/preinit/05_set_iface_mac_ipq40xx.sh   |   4 +
- .../boot/dts/qcom-ipq4029-ap-cig-wf610d.dts   | 414 ++++++++++++++++++
- target/linux/ipq40xx/image/generic.mk         |  14 +
- .../901-arm-boot-add-dts-files.patch          |   3 +-
- 9 files changed, 449 insertions(+), 2 deletions(-)
- create mode 100644 package/firmware/ipq-wifi/board-cig_wf610d.qca4019
- create mode 100755 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-cig-wf610d.dts
-
-diff --git a/package/firmware/ipq-wifi/Makefile b/package/firmware/ipq-wifi/Makefile
-index e3b25bb556..b996ee311f 100644
---- a/package/firmware/ipq-wifi/Makefile
-+++ b/package/firmware/ipq-wifi/Makefile
-@@ -49,7 +49,8 @@ ALLWIFIBOARDS:= \
- 	nec_wg2600hp3 \
- 	plasmacloud_pa1200 \
- 	plasmacloud_pa2200 \
--	qxwlan_e2600ac
-+	qxwlan_e2600ac \
-+	cig_wf610d
- 
- ALLWIFIPACKAGES:=$(foreach BOARD,$(ALLWIFIBOARDS),ipq-wifi-$(BOARD))
- 
-@@ -135,5 +136,6 @@ $(eval $(call generate-ipq-wifi-package,nec_wg2600hp3,NEC Platforms WG2600HP3))
- $(eval $(call generate-ipq-wifi-package,plasmacloud_pa1200,Plasma Cloud PA1200))
- $(eval $(call generate-ipq-wifi-package,plasmacloud_pa2200,Plasma Cloud PA2200))
- $(eval $(call generate-ipq-wifi-package,qxwlan_e2600ac,Qxwlan E2600AC))
-+$(eval $(call generate-ipq-wifi-package,cig_wf610d,CIG WF_610D))
- 
- $(foreach PACKAGE,$(ALLWIFIPACKAGES),$(eval $(call BuildPackage,$(PACKAGE))))
-diff --git a/package/firmware/ipq-wifi/board-cig_wf610d.qca4019 b/package/firmware/ipq-wifi/board-cig_wf610d.qca4019
-new file mode 100644
-index 0000000000000000000000000000000000000000..3ba97ff0b9dc46519dc3767cac3931872a8cc5f1
-GIT binary patch
-literal 24316
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-
-literal 0
-HcmV?d00001
-
-diff --git a/target/linux/ipq40xx/base-files/etc/board.d/01_leds b/target/linux/ipq40xx/base-files/etc/board.d/01_leds
-index ac11655904..c1d4e693f2 100755
---- a/target/linux/ipq40xx/base-files/etc/board.d/01_leds
-+++ b/target/linux/ipq40xx/base-files/etc/board.d/01_leds
-@@ -30,6 +30,7 @@ edgecore,oap100)
- 	ucidef_set_led_wlan "wlan2g" "WLAN2G" "blue:wlan2g" "phy0tpt"
- 	ucidef_set_led_wlan "wlan5g" "WLAN5G" "blue:wlan5g" "phy1tpt"
- 	;;
-+
- engenius,eap1300)
- 	ucidef_set_led_netdev "lan" "LAN" "blue:lan" "eth0"
- 	ucidef_set_led_wlan "wlan2g" "WLAN2G" "blue:wlan2g" "phy0tpt"
-@@ -69,6 +70,8 @@ qxwlan,e2600ac-c2)
- 	ucidef_set_led_wlan "wlan2g" "WLAN0" "green:wlan0" "phy0tpt"
- 	ucidef_set_led_wlan "wlan5g" "WLAN1" "green:wlan1" "phy1tpt"
- 	;;
-+edgecore,ecw5211 |\
-+cig,wf610d |\
- zyxel,nbg6617 |\
- zyxel,wre6606)
- 	ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wlan2g" "phy0tpt"
-diff --git a/target/linux/ipq40xx/base-files/etc/board.d/02_network b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-index 1d4c78833a..d62a2e5061 100755
---- a/target/linux/ipq40xx/base-files/etc/board.d/02_network
-+++ b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-@@ -42,6 +42,7 @@ ipq40xx_setup_interfaces()
- 		;;
- 	asus,map-ac2200|\
- 	cilab,meshpoint-one|\
-+	cig,wf610d|\
- 	edgecore,ecw5211|\
- 	edgecore,oap100|\
- 	openmesh,a42|\
-diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-index b12c9af9a7..4a3f18579c 100644
---- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-+++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-@@ -93,6 +93,10 @@ case "$FIRMWARE" in
- 		caldata_extract "ART" 0x1000 0x2f20
- 		ath10k_patch_mac $(mtd_get_mac_binary ORGDATA 0x26)
- 		;;
-+	cig,wf610d)
-+		caldata_extract "0:ART" 0x1000 0x2f20
-+		ath10kcal_patch_mac_crc $(macaddr_add $(mtd_get_mac_ascii 0:APPSBLENV ethaddr) +2)
-+		;;
- 	cellc,rtl30vw |\
- 	compex,wpj419 |\
- 	compex,wpj428 |\
-@@ -202,6 +206,10 @@ case "$FIRMWARE" in
- 		caldata_extract "ART" 0x5000 0x2f20
- 		ath10k_patch_mac $(mtd_get_mac_binary ORGDATA 0x2c)
- 		;;
-+	cig,wf610d)
-+		caldata_extract "0:ART" 0x5000 0x2f20
-+		ath10kcal_patch_mac_crc $(macaddr_add $(mtd_get_mac_ascii 0:APPSBLENV ethaddr) +3)
-+		;;
- 	cellc,rtl30vw |\
- 	compex,wpj419 |\
- 	compex,wpj428 |\
-diff --git a/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh b/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh
-index 0d606c75b5..4d3b1df219 100644
---- a/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh
-+++ b/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh
-@@ -7,6 +7,10 @@ preinit_set_mac_address() {
- 		ip link set dev eth0 address $(macaddr_add "$base_mac" +1)
- 		ip link set dev eth1 address $(macaddr_add "$base_mac" +3)
- 		;;
-+	cig,wf610d)
-+		base_mac=$(mtd_get_mac_ascii 0:APPSBLENV ethaddr)
-+		ip link set eth0 address "${base_mac}"
-+		;;
- 	ezviz,cs-w3-wd1200g-eup)
- 		ip link set dev eth0 address $(mtd_get_mac_binary "ART" 0x6)
- 		ip link set dev eth1 address $(mtd_get_mac_binary "ART" 0x0)
-diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-cig-wf610d.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-cig-wf610d.dts
-new file mode 100755
-index 0000000000..3f24369f19
---- /dev/null
-+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-cig-wf610d.dts
-@@ -0,0 +1,414 @@
-+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
-+ *
-+ * Permission to use, copy, modify, and/or distribute this software for any
-+ * purpose with or without fee is hereby granted, provided that the above
-+ * copyright notice and this permission notice appear in all copies.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+ *
-+ */
-+#include "qcom-ipq4019.dtsi"
-+#include <dt-bindings/input/input.h>
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/soc/qcom,tcsr.h>
-+
-+/ {
-+	model = "Cambridge Industries Group, Ltd. WF-610D";
-+	compatible = "cig,wf610d", "qcom,ipq4019";
-+	qcom,board-id = <8 0>;
-+	qcom,msm-id = <0x111 0>;
-+	qcom,pmic-id = <0 0 0 0>;
-+
-+	memory {
-+		device_type = "memory";
-+		reg = <0x80000000 0x10000000>; /* 256MB */
-+	};
-+
-+	chosen {
-+		bootargs-append = " clk_ignore_unused";
-+	};
-+
-+	soc {
-+		pinctrl@1000000 {
-+			serial_0_pins: serial0_pinmux {
-+				mux {
-+					pins = "gpio16", "gpio17";
-+					function = "blsp_uart0";
-+					bias-disable;
-+				};
-+			};
-+	
-+			serial_1_pins: serial1_pinmux {
-+				mux {
-+					pins = "gpio8", "gpio9";
-+					function = "blsp_uart1";
-+					bias-disable;
-+				};
-+			};
-+
-+			nand_pins: nand_pins {
-+
-+				pullups {
-+					pins = "gpio53", "gpio58",
-+						"gpio59";
-+					function = "qpic";
-+					bias-pull-up;
-+				};
-+
-+				pulldowns {
-+					pins = "gpio54", "gpio55", "gpio56",
-+						"gpio57", "gpio60", "gpio61",
-+						"gpio62", "gpio63", "gpio64",
-+						"gpio65", "gpio66", "gpio67",
-+						"gpio68", "gpio69";
-+					function = "qpic";
-+					bias-pull-down;
-+				};
-+			};
-+			led_0_pins: led0_pinmux {
-+				mux {
-+					pins = "gpio52", "gpio42", "gpio43", "gpio45", "gpio46", "gpio47", "gpio48", "gpio40", "gpio39", "gpio49";
-+					function = "gpio";
-+					drive-strength = <16>;
-+					bias-pull-down;
-+					output-low;
-+				};
-+			};
-+
-+			spi_0_pins: spi_0_pinmux {
-+				pinmux {
-+					function = "blsp_spi0";
-+					pins = "gpio13", "gpio14", "gpio15";
-+				};
-+				pinmux_cs {
-+					function = "gpio";
-+					pins = "gpio12";
-+				};
-+				pinconf {
-+					pins = "gpio13", "gpio14", "gpio15";
-+					drive-strength = <12>;
-+					bias-disable;
-+				};
-+				pinconf_cs {
-+					pins = "gpio12";
-+					drive-strength = <2>;
-+					bias-disable;
-+					output-high;
-+				};
-+			};
-+
-+			i2c_0_pins: i2c_0_pinmux {
-+				pinmux {
-+					function = "blsp_i2c0";
-+					pins = "gpio10", "gpio11";
-+				};
-+				pinconf {
-+					pins = "gpio10", "gpio11";
-+					drive-strength = <16>;
-+					bias-disable;
-+				};
-+			};
-+			mdio_pins: mdio_pinmux {
-+				mux_1 {
-+					pins = "gpio6";
-+					function = "mdio";
-+					bias-pull-up;
-+				};
-+				mux_2 {
-+					pins = "gpio7";
-+					function = "mdc";
-+					bias-pull-up;
-+				};
-+			};
-+
-+		};
-+
-+		serial@78af000 {
-+			pinctrl-0 = <&serial_0_pins>;
-+			pinctrl-names = "default";
-+			status = "okay";
-+		};
-+	
-+		serial@78b0000 {
-+			pinctrl-0 = <&serial_1_pins>;
-+			pinctrl-names = "default";
-+			status = "okay";
-+		};
-+
-+		blsp_dma: dma@7884000 {
-+			status = "okay";
-+		};
-+
-+		spi_0: spi@78b5000 { 
-+			pinctrl-0 = <&spi_0_pins>;
-+			pinctrl-names = "default";
-+			status = "okay";
-+			cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
-+
-+			m25p80@0 {
-+				#address-cells = <1>;
-+				#size-cells = <1>;
-+				reg = <0>;
-+				compatible = "jedec,spi-nor";
-+				linux,modalias = "m25p80", "n25q128a11";
-+				spi-max-frequency = <24000000>;
-+				partitions {
-+					compatible = "fixed-partitions";
-+					#address-cells = <1>;
-+					#size-cells = <1>;
-+	
-+					SBL1@0 {
-+						label = "0:SBL1";
-+						reg = <0x0 0x40000>;
-+						read-only;
-+					};
-+		
-+					MIBIB@40000 {
-+						label = "0:MIBIB";
-+						reg = <0x40000 0x20000>;
-+						read-only;
-+					};
-+		
-+					QSEE@60000 {
-+						label = "0:QSEE";
-+						reg = <0x60000 0x60000>;
-+						read-only;
-+					};
-+		
-+					CDT@c0000 {
-+						label = "0:CDT";
-+						reg = <0xc0000 0x10000>;
-+						read-only;
-+					};
-+		
-+					DDRPARAMS@d0000 {
-+						label = "0:DDRPARAMS";
-+						reg = <0xd0000 0x10000>;
-+						read-only;
-+					};
-+		
-+					APPSBLENV@e0000 {
-+						label = "0:APPSBLENV";
-+						reg = <0xe0000 0x10000>;
-+						read-only;
-+					};
-+		
-+					APPSBL@f0000 {
-+						label = "0:APPSBL";
-+						reg = <0xf0000 0x80000>;
-+						read-only;
-+					};
-+		
-+					ART@170000 {
-+						label = "0:ART";
-+						reg = <0x170000 0x10000>;
-+						read-only;
-+					};
-+	
-+					firmware@180000 {
-+						compatible = "denx,fit";
-+						label = "firmware";
-+						reg = <0x180000 0x1e70000>;
-+					};
-+
-+					certificates@1ff0000 {
-+						compatible = "denx,fit";
-+						label = "certificates";
-+						reg = <0x1ff0000 0x10000>;
-+					};
-+				};
-+			};
-+		};
-+
-+		i2c_0: i2c@78b7000 { /* BLSP1 QUP2 */
-+			pinctrl-0 = <&i2c_0_pins>;
-+			pinctrl-1 = <&i2c_0_pins>;
-+			pinctrl-names = "i2c_active", "i2c_sleep";
-+			status = "okay";
-+
-+			qca_codec: qca_codec@12 {
-+				compatible = "qca,ipq40xx-codec";
-+				reg = <0x12>;
-+				status = "disabled";
-+			};
-+
-+			lcd_ts: lcd_ts@40 {
-+				compatible = "qca,gsl1680_ts";
-+				reg = <0x40>;
-+				status = "disabled";
-+			};
-+		};
-+
-+
-+
-+		cryptobam: dma@8e04000 {
-+			status = "okay";
-+		};
-+
-+		crypto@8e3a000 {
-+			status = "okay";
-+		};
-+
-+		gpio_keys {
-+			compatible = "gpio-keys";
-+	
-+			reset {
-+				label = "reset";
-+				linux,code = <KEY_RESTART>;
-+				gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
-+				linux,input-type = <1>;
-+			};
-+		};
-+
-+		gpio-leds {
-+			compatible = "gpio-leds";
-+			pinctrl-0 = <&led_0_pins>;
-+
-+			wf6203_green_power {
-+					gpios = <&tlmm 52 0>;
-+					label = "wf6203:green:power";
-+					default-state = "off";
-+			};
-+			wf6203_yellow_eth0 {
-+					gpios = <&tlmm 42 0>;
-+					label = "wf6203:yellow:eth0";
-+					default-state = "off";
-+			};
-+			wf6203_green_eth0 {
-+					gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
-+					label = "wf6203:green:eth0";
-+					default-state = "off";
-+			};
-+			wf6203_yellow_eth1 {
-+					gpios = <&tlmm 45 0>;
-+					label = "wf6203:yellow:eth1";
-+					default-state = "off";
-+			};
-+			wf6203_green_eth1 {
-+					gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;
-+					label = "wf6203:green:eth1";
-+					default-state = "off";
-+			};
-+			wf6203_yellow_eth2 {
-+					gpios = <&tlmm 47 0>;
-+					label = "wf6203:yellow:eth2";
-+					default-state = "off";
-+			};
-+			wf6203_green_eth2 {
-+					gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
-+					label = "wf6203:green:eth2";
-+					default-state = "off";
-+			};																
-+			wf6203_green_wifi2g {
-+					gpios = <&tlmm 40 0>;
-+					label = "wf6203:green:wifi2g";
-+					default-state = "off";
-+			};
-+			wf6203_green_wifi5g {
-+					gpios = <&tlmm 39 0>;
-+					label = "wf6203:green:wifi5g";
-+					default-state = "off";
-+			};				
-+			wf6203_green_status {
-+					gpios = <&tlmm 49 0>;
-+					label = "wf6203:green:status";
-+					default-state = "off";
-+			};								
-+		};
-+
-+
-+		watchdog@b017000 {
-+			timeout-sec = <60>;
-+			status = "okay";
-+		};
-+
-+		qpic_bam: dma@7984000 {
-+			status = "okay";
-+		};
-+
-+		nand: qpic-nand@79b0000 {
-+			pinctrl-0 = <&nand_pins>;
-+			pinctrl-names = "default";
-+			status = "okay";
-+		};
-+
-+		mdio@90000 {
-+			pinctrl-0 = <&mdio_pins>;
-+			pinctrl-names = "default";
-+			phy-reset-gpio = <&tlmm 18 0>;
-+			status = "okay";
-+			bias-disable;
-+		};
-+
-+		ess-switch@c000000 {
-+			switch_lan_bmp = <0x3e>; /* lan port bitmap */
-+			switch_wan_bmp = <1>; /* wan port bitmap */
-+			status = "okay";
-+		};
-+
-+		ess-psgmii@98000 {
-+			status = "okay";
-+		};
-+
-+		edma@c080000 {
-+			status = "okay";
-+		};
-+
-+		usb3_ss_phy: ssphy@9a000 {
-+			status = "okay";
-+		};
-+
-+		usb3_hs_phy: hsphy@a6000 {
-+			status = "okay";
-+		};
-+
-+		usb3: usb3@8af8800 {
-+			status = "okay";
-+		};
-+
-+		usb2_hs_phy: hsphy@a8000 {
-+			status = "okay";
-+		};
-+
-+		usb2: usb2@60f8800 {
-+			status = "okay";
-+		};
-+
-+		ext_wtd {
-+			compatible = "linux,wdt-gpio";
-+			gpios = <&tlmm 41 GPIO_ACTIVE_LOW>;
-+			hw_algo = "toggle";
-+			hw_margin_ms = <1000>;
-+			always-running;
-+		};
-+
-+		tcsr@1949000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1949000 0x100>;
-+			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
-+		};
-+
-+		tcsr@1957000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1957000 0x100>;
-+			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
-+		};
-+
-+		wifi0: wifi@a000000 {
-+			qcom,ath10k-calibration-variant = "CIG WF_610D";
-+			status = "okay";
-+		};
-+	
-+		wifi1: wifi@a800000 {
-+			qcom,ath10k-calibration-variant = "CIG WF_610D";
-+			status = "okay";
-+		};
-+	};
-+
-+};
-diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk
-index 49aa202e62..bca03f58ec 100644
---- a/target/linux/ipq40xx/image/generic.mk
-+++ b/target/linux/ipq40xx/image/generic.mk
-@@ -271,6 +271,20 @@ define Device/cilab_meshpoint-one
- endef
- TARGET_DEVICES += cilab_meshpoint-one
- 
-+define Device/cig_wf610d
-+	$(call Device/FitImage)
-+	DEVICE_TITLE := CIG WF_610D
-+	DEVICE_DTS := qcom-ipq4029-ap-cig-wf610d
-+	KERNEL_INSTALL := 1
-+	KERNEL_SIZE := 4048k
-+	BLOCKSIZE := 128k
-+	PAGESIZE := 2048
-+	DEVICE_PACKAGES := ipq-wifi-cig_wf610d
-+	IMAGES = sysupgrade.bin
-+	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
-+endef
-+TARGET_DEVICES += cig_wf610d
-+
- define Device/compex_wpj419
- 	$(call Device/FitImage)
- 	$(call Device/UbiFit)
-diff --git a/target/linux/ipq40xx/patches-5.4/901-arm-boot-add-dts-files.patch b/target/linux/ipq40xx/patches-5.4/901-arm-boot-add-dts-files.patch
-index 6b7c68bf63..aa2fc4bd17 100644
---- a/target/linux/ipq40xx/patches-5.4/901-arm-boot-add-dts-files.patch
-+++ b/target/linux/ipq40xx/patches-5.4/901-arm-boot-add-dts-files.patch
-@@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
- 
- --- a/arch/arm/boot/dts/Makefile
- +++ b/arch/arm/boot/dts/Makefile
--@@ -837,11 +837,60 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-+@@ -837,11 +837,61 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-  	qcom-apq8074-dragonboard.dtb \
-  	qcom-apq8084-ifc6540.dtb \
-  	qcom-apq8084-mtp.dtb \
-@@ -45,6 +45,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
-  	qcom-ipq4019-ap.dk07.1-c1.dtb \
-  	qcom-ipq4019-ap.dk07.1-c2.dtb \
- +	qcom-ipq4019-a62.dtb \
-++	qcom-ipq4029-ap-cig-wf610d.dtb \
- +	qcom-ipq4019-cm520-79f.dtb \
- +	qcom-ipq4019-ea8300.dtb \
- +	qcom-ipq4019-eap2200.dtb \
--- 
-2.25.1
-
diff --git a/patches/ipq40xx/0004-ipq40xx-add-tplink-ec420-support.patch b/patches/ipq40xx/0004-ipq40xx-add-tplink-ec420-support.patch
deleted file mode 100644
index cc42f45fa..000000000
--- a/patches/ipq40xx/0004-ipq40xx-add-tplink-ec420-support.patch
+++ /dev/null
@@ -1,1502 +0,0 @@
-From 0f91fe9eea8820e68b3d754e768a673ed165b3ce Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Sat, 4 Sep 2021 05:59:39 +0200
-Subject: [PATCH 31/43] ipq40xx: add tplink ec420 support
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/boot/uboot-envtools/files/ipq40xx     |   1 +
- package/firmware/ipq-wifi/Makefile            |   4 +-
- .../ipq-wifi/board-tp-link_ec420-g1.qca4019   | Bin 0 -> 607304 bytes
- .../ipq-wifi/board-tp-link_ec420-g1.qca9984   | Bin 0 -> 171916 bytes
- .../ipq40xx/base-files/etc/board.d/02_network |   3 +-
- .../etc/hotplug.d/firmware/11-ath10k-caldata  |  11 +-
- .../base-files/lib/upgrade/platform.sh        |   3 +-
- .../dts/qcom-ipq4019-tp-link-ec420-g1.dts     | 275 ++++++++++++++++++
- target/linux/ipq40xx/image/generic.mk         |  15 +
- .../patches-5.4/998-tp-link-ec420-g1.patch    |  12 +
- 10 files changed, 316 insertions(+), 8 deletions(-)
- create mode 100644 package/firmware/ipq-wifi/board-tp-link_ec420-g1.qca4019
- create mode 100644 package/firmware/ipq-wifi/board-tp-link_ec420-g1.qca9984
- create mode 100755 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-tp-link-ec420-g1.dts
- create mode 100644 target/linux/ipq40xx/patches-5.4/998-tp-link-ec420-g1.patch
-
-diff --git a/package/boot/uboot-envtools/files/ipq40xx b/package/boot/uboot-envtools/files/ipq40xx
-index b24cbf979e..44a8688dbe 100644
---- a/package/boot/uboot-envtools/files/ipq40xx
-+++ b/package/boot/uboot-envtools/files/ipq40xx
-@@ -59,6 +59,7 @@ linksys,ea8300 |\
- linksys,mr8300)
- 	ubootenv_add_uci_config "/dev/mtd7" "0x0" "0x40000" "0x20000"
- 	;;
-+tp-link,ec420-g1 |\
- zyxel,nbg6617)
- 	ubootenv_add_uci_config "/dev/mtd6" "0x0" "0x10000" "0x10000"
- 	;;
-diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-index b12c9af9a7..b7ee73b12e 100644
---- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-+++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-@@ -265,6 +265,11 @@ case "$FIRMWARE" in
- 		caldata_extract "ART" 0x5000 0x2f20
- 		ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -1)
- 		;;
-+	tp-link,ap2220 |\
-+	tp-link,ec420-g1)
-+		ath10kcal_extract "0:ART" 4096 12064
-+		ath10kcal_patch_mac_crc $(macaddr_add "$(get_tip mac_address)" 9) #2.4G, wlan1
-+		;;
- 	esac
- 	;;
- *)
-diff --git a/package/firmware/ipq-wifi/Makefile b/package/firmware/ipq-wifi/Makefile
-index b996ee311f..c9d113ae6a 100644
---- a/package/firmware/ipq-wifi/Makefile
-+++ b/package/firmware/ipq-wifi/Makefile
-@@ -50,7 +50,8 @@ ALLWIFIBOARDS:= \
- 	plasmacloud_pa1200 \
- 	plasmacloud_pa2200 \
- 	qxwlan_e2600ac \
--	cig_wf610d
-+	cig_wf610d \
-+	tp-link_ec420-g1
- 
- ALLWIFIPACKAGES:=$(foreach BOARD,$(ALLWIFIBOARDS),ipq-wifi-$(BOARD))
- 
-@@ -137,5 +138,6 @@ $(eval $(call generate-ipq-wifi-package,plasmacloud_pa1200,Plasma Cloud PA1200))
- $(eval $(call generate-ipq-wifi-package,plasmacloud_pa2200,Plasma Cloud PA2200))
- $(eval $(call generate-ipq-wifi-package,qxwlan_e2600ac,Qxwlan E2600AC))
- $(eval $(call generate-ipq-wifi-package,cig_wf610d,CIG WF_610D))
-+$(eval $(call generate-ipq-wifi-package,tp-link_ec420-g1,tp-link EC420-G1))
- 
- $(foreach PACKAGE,$(ALLWIFIPACKAGES),$(eval $(call BuildPackage,$(PACKAGE))))
-diff --git a/package/firmware/ipq-wifi/board-tp-link_ec420-g1.qca4019 b/package/firmware/ipq-wifi/board-tp-link_ec420-g1.qca4019
-new file mode 100644
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-
-literal 0
-HcmV?d00001
-
-diff --git a/target/linux/ipq40xx/base-files/etc/board.d/02_network b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-index d62a2e5061..16f6040b6e 100755
---- a/target/linux/ipq40xx/base-files/etc/board.d/02_network
-+++ b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-@@ -32,8 +32,9 @@ ipq40xx_setup_interfaces()
- 	mikrotik,sxtsq-5-ac|\
- 	netgear,ex6100v2|\
- 	netgear,ex6150v2|\
-+	tp-link,ec420-g1|\
- 	zyxel,wre6606)
--		ucidef_set_interface_lan "eth0"
-+		ucidef_set_interface_wan "eth0"
- 		;;
- 	aruba,ap-303h)
- 		ucidef_set_interfaces_lan_wan "eth0" "eth1"
-diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-index 3948c08984..c8943d3ba3 100644
---- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-+++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-@@ -46,6 +46,9 @@ case "$FIRMWARE" in
- 		# OEM assigns 4 sequential MACs
- 		ath10k_patch_mac $(macaddr_setbit_la $(macaddr_add "$(cat /sys/class/net/eth0/address)" 4))
- 		;;
-+	tp-link,ec420-g1)
-+		caldata_extract "0:ART" 0x9000 0x2f20
-+		;;
- 	esac
- 	;;
- "ath10k/pre-cal-ahb-a000000.wifi.bin")
-@@ -159,6 +162,9 @@ case "$FIRMWARE" in
- 		caldata_extract "ART" 0x1000 0x2f20
- 		ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -2)
- 		;;
-+	tp-link,ec420-g1)
-+		caldata_extract "0:ART" 0x1000 0x2f20
-+		;;
- 	esac
- 	;;
- "ath10k/pre-cal-ahb-a800000.wifi.bin")
-@@ -273,11 +279,6 @@ case "$FIRMWARE" in
- 		caldata_extract "ART" 0x5000 0x2f20
- 		ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -1)
- 		;;
--	tp-link,ap2220 |\
--	tp-link,ec420-g1)
--		ath10kcal_extract "0:ART" 4096 12064
--		ath10kcal_patch_mac_crc $(macaddr_add "$(get_tip mac_address)" 9) #2.4G, wlan1
--		;;
- 	esac
- 	;;
- *)
-diff --git a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-index 54683977cd..cbdd12c750 100644
---- a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-+++ b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-@@ -72,7 +72,8 @@ platform_do_upgrade() {
- 	glinet,gl-ap1300 |\
- 	luma,wrtq-329acn |\
- 	mobipromo,cm520-79f |\
--	qxwlan,e2600ac-c2)
-+	qxwlan,e2600ac-c2 |\
-+	tp-link,ec420-g1)
- 		nand_do_upgrade "$1"
- 		;;
- 	alfa-network,ap120c-ac)
-diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-tp-link-ec420-g1.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-tp-link-ec420-g1.dts
-new file mode 100755
-index 0000000000..9f6fdd5e76
---- /dev/null
-+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-tp-link-ec420-g1.dts
-@@ -0,0 +1,275 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+
-+#include "qcom-ipq4019.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+#include <dt-bindings/soc/qcom,tcsr.h>
-+
-+/ {
-+	model = "tp-link EC420 G1";
-+	compatible = "tp-link,ec420-g1";
-+
-+	aliases {
-+		led-boot = &led_green;
-+		led-failsafe = &led_green;
-+		led-running = &led_green;
-+		led-upgrade = &led_green;
-+	};
-+
-+	soc {
-+		mdio@90000 {
-+			status = "okay";
-+		};
-+
-+		ess-psgmii@98000 {
-+			status = "okay";
-+		};
-+
-+		tcsr@1949000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1949000 0x100>;
-+			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
-+		};
-+
-+		ess_tcsr@1953000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1953000 0x1000>;
-+			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
-+		};
-+
-+		tcsr@1957000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1957000 0x100>;
-+			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
-+		};
-+
-+		crypto@8e3a000 {
-+			status = "okay";
-+		};
-+
-+		watchdog@b017000 {
-+			status = "okay";
-+		};
-+
-+		ess-switch@c000000 {
-+			status = "okay";
-+            switch_mac_mode = <0x0>; /* mac mode for RGMII RMII */
-+            switch_initvlas = <0x0007c 0x54>; /* port0 status */
-+            switch_lan_bmp = <0x10>;
-+		};
-+
-+		edma@c080000 {
-+            status = "okay";
-+        };
-+    };
-+
-+	key {
-+		compatible = "gpio-keys";
-+
-+		button@1 {
-+            label = "reset";
-+            linux,code = <KEY_RESTART>;
-+            gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
-+            linux,input-type = <1>;
-+        };
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		led_red {
-+			label = "ec420:red:status";
-+			gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		led_green: power {
-+			label = "ec420:green:status";
-+			gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		led_blue {
-+			label = "ec420:blue:status";
-+			gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
-+};
-+
-+&tlmm {
-+	serial_0_pins: serial_pinmux {
-+		mux {
-+			pins = "gpio16", "gpio17";
-+			function = "blsp_uart0";
-+			bias-disable;
-+		};
-+	};
-+
-+spi_0_pins: spi_0_pinmux {
-+	pinmux {
-+		function = "blsp_spi0";
-+		pins = "gpio13", "gpio14", "gpio15";
-+		drive-strength = <12>;
-+		bias-disable;
-+	};
-+
-+	pinmux_cs {
-+		function = "gpio";
-+		pins = "gpio12";
-+		drive-strength = <2>;
-+		bias-disable;
-+		output-high;
-+	};
-+};
-+
-+nand_pins: nand_pins {
-+	pullups {
-+		pins = "gpio53", "gpio58", "gpio59";
-+		function = "qpic";
-+		bias-pull-up;
-+	};
-+
-+	pulldowns {
-+		pins = "gpio54", "gpio55", "gpio56",
-+		       "gpio57", "gpio60", "gpio61",
-+		       "gpio62", "gpio63", "gpio64",
-+		       "gpio65", "gpio66", "gpio67",
-+		       "gpio68", "gpio69";
-+		function = "qpic";
-+		bias-pull-down;
-+	};
-+	};
-+};
-+
-+&cryptobam {
-+	status = "okay";
-+};
-+
-+&blsp1_spi1 {
-+	pinctrl-0 = <&spi_0_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
-+
-+	flash@0 {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		compatible = "jedec,spi-nor";
-+		reg = <0>;
-+		linux,modalias = "m25p80", "gd25q256";
-+		spi-max-frequency = <24000000>;
-+
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			partition0@0 {
-+				label = "0:SBL1";
-+				reg = <0x00000000 0x00040000>;
-+				read-only;
-+			};
-+			partition1@40000 {
-+				label = "0:MIBIB";
-+				reg = <0x00040000 0x00020000>;
-+				read-only;
-+			};
-+			partition2@60000 {
-+				label = "0:QSEE";
-+				reg = <0x00060000 0x00060000>;
-+				read-only;
-+			};
-+			partition3@c0000 {
-+				label = "0:CDT";
-+				reg = <0x000c0000 0x00010000>;
-+				read-only;
-+			};
-+			partition4@d0000 {
-+				label = "0:DDRPARAMS";
-+				reg = <0x000d0000 0x00010000>;
-+				read-only;
-+			};
-+			partition5@e0000 {
-+				label = "0:APPSBLENV";
-+				reg = <0x000e0000 0x00010000>;
-+			};
-+			partition6@f0000 {
-+				label = "0:APPSBL";
-+				reg = <0x000f0000 0x00080000>;
-+				read-only;
-+			};
-+			partition7@170000 {
-+				label = "0:ART";
-+				reg = <0x00170000 0x00010000>;
-+				read-only;
-+			};
-+			partition8@180000 {
-+				label = "product_info";
-+				reg = <0x00180000 0x00010000>;
-+			};
-+			partition9@190000 {
-+				label = "factory_fw";
-+				reg = <0x00190000 0x01e70000>;
-+			};
-+		};
-+	};
-+};
-+
-+&nand {
-+	pinctrl-0 = <&nand_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+
-+	nand@0 {
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			partition@0 {
-+				label = "ubi";
-+				reg = <0x00000000 0x10000000>;
-+			};
-+		};
-+	};
-+};
-+
-+&blsp_dma {
-+	status = "okay";
-+};
-+
-+&blsp1_uart1 {
-+	pinctrl-0 = <&serial_0_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+};
-+
-+&qpic_bam {
-+	status = "okay";
-+};
-+
-+&wifi0 {
-+	status = "okay";
-+};
-+
-+&wifi1 {
-+	status = "disabled";
-+};
-+
-+&pcie0 {
-+	status = "okay";
-+	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
-+	wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
-+
-+	bridge@0,0 {
-+		reg = <0x00000000 0 0 0 0>;
-+		#address-cells = <3>;
-+		#size-cells = <2>;
-+		ranges;
-+
-+		wifi2: wifi@1,0 {
-+			compatible = "qcom,ath10k";
-+			status = "okay";
-+			reg = <0x00010000 0 0 0 0>;
-+		};
-+	};
-+};
-+
-diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk
-index 31f4971c90..ec3e779a44 100644
---- a/target/linux/ipq40xx/image/generic.mk
-+++ b/target/linux/ipq40xx/image/generic.mk
-@@ -816,3 +816,18 @@ define Device/zyxel_wre6606
- 	DEVICE_PACKAGES := -kmod-ath10k-ct kmod-ath10k-ct-smallbuffers
- endef
- TARGET_DEVICES += zyxel_wre6606
-+
-+define Device/tp-link_ec420_g1
-+	$(call Device/FitImage)
-+	$(call Device/UbiFit)
-+	DEVICE_TITLE := tp-link EC420 G1
-+	BOARD_NAME := ec420_g1
-+	DEVICE_DTS := qcom-ipq4019-tp-link-ec420-g1
-+	KERNEL_SIZE := 4096k
-+	IMAGE_SIZE := 26624k
-+	BLOCKSIZE := 128k
-+	PAGESIZE := 2048
-+	SUPPORTED_DEVICES := tp-link,ec420-g1
-+	DEVICE_PACKAGES := ath10k-firmware-qca9984-ct ipq-wifi-tp-link_ec420-g1 uboot-envtools
-+endef
-+TARGET_DEVICES += tp-link_ec420_g1
-diff --git a/target/linux/ipq40xx/patches-5.4/998-tp-link-ec420-g1.patch b/target/linux/ipq40xx/patches-5.4/998-tp-link-ec420-g1.patch
-new file mode 100644
-index 0000000000..40c913323f
---- /dev/null
-+++ b/target/linux/ipq40xx/patches-5.4/998-tp-link-ec420-g1.patch
-@@ -0,0 +1,12 @@
-+Index: linux-5.4.111/arch/arm/boot/dts/Makefile
-+===================================================================
-+--- linux-5.4.111.orig/arch/arm/boot/dts/Makefile
-++++ linux-5.4.111/arch/arm/boot/dts/Makefile
-+@@ -883,6 +883,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-+ 	qcom-ipq4019-u4019-32m.dtb \
-+ 	qcom-ipq4019-wpj419.dtb \
-+ 	qcom-ipq4019-wtr-m2133hp.dtb \
-++	qcom-ipq4019-tp-link-ec420-g1.dtb \
-+ 	qcom-ipq4028-wpj428.dtb \
-+ 	qcom-ipq4029-ap-303.dtb \
-+ 	qcom-ipq4029-ap-303h.dtb \
--- 
-2.25.1
-
diff --git a/patches/ipq40xx/0005-ipq4018-add-EdgeCore-SPW2AC1200-support.patch b/patches/ipq40xx/0005-ipq4018-add-EdgeCore-SPW2AC1200-support.patch
deleted file mode 100644
index 6fa826260..000000000
--- a/patches/ipq40xx/0005-ipq4018-add-EdgeCore-SPW2AC1200-support.patch
+++ /dev/null
@@ -1,483 +0,0 @@
-From 4d1fff5847b7550e185a87b230529cab68d21967 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Sat, 4 Sep 2021 06:15:19 +0200
-Subject: [PATCH 01/11] ipq4018: add EdgeCore SPW2AC1200 support
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/boot/uboot-envtools/files/ipq40xx     |   1 +
- .../ipq40xx/base-files/etc/board.d/01_leds    |   1 +
- .../ipq40xx/base-files/etc/board.d/02_network |   1 +
- .../etc/hotplug.d/firmware/11-ath10k-caldata  |   2 +
- .../base-files/lib/upgrade/platform.sh        |   5 +
- .../arm/boot/dts/qcom-ipq4018-spw2ac1200.dts  | 332 ++++++++++++++++++
- target/linux/ipq40xx/image/generic.mk         |  13 +
- .../901-arm-boot-add-dts-files.patch          |   3 +-
- 8 files changed, 357 insertions(+), 1 deletion(-)
- create mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-spw2ac1200.dts
-
-diff --git a/package/boot/uboot-envtools/files/ipq40xx b/package/boot/uboot-envtools/files/ipq40xx
-index 44a8688dbe..ab489a6e18 100644
---- a/package/boot/uboot-envtools/files/ipq40xx
-+++ b/package/boot/uboot-envtools/files/ipq40xx
-@@ -34,6 +34,7 @@ case "$board" in
- alfa-network,ap120c-ac |\
- devolo,magic-2-wifi-next |\
- edgecore,ecw5211 |\
-+edgecore,spw2ac1200 |\
- glinet,gl-ap1300 |\
- glinet,gl-b1300 |\
- luma,wrtq-329acn |\
-diff --git a/target/linux/ipq40xx/base-files/etc/board.d/01_leds b/target/linux/ipq40xx/base-files/etc/board.d/01_leds
-index c1d4e693f2..d473448137 100755
---- a/target/linux/ipq40xx/base-files/etc/board.d/01_leds
-+++ b/target/linux/ipq40xx/base-files/etc/board.d/01_leds
-@@ -71,6 +71,7 @@ qxwlan,e2600ac-c2)
- 	ucidef_set_led_wlan "wlan5g" "WLAN1" "green:wlan1" "phy1tpt"
- 	;;
- edgecore,ecw5211 |\
-+edgecore,spw2ac1200 |\
- cig,wf610d |\
- zyxel,nbg6617 |\
- zyxel,wre6606)
-diff --git a/target/linux/ipq40xx/base-files/etc/board.d/02_network b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-index 16f6040b6e..0240798bbb 100755
---- a/target/linux/ipq40xx/base-files/etc/board.d/02_network
-+++ b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-@@ -45,6 +45,7 @@ ipq40xx_setup_interfaces()
- 	cilab,meshpoint-one|\
- 	cig,wf610d|\
- 	edgecore,ecw5211|\
-+	edgecore,spw2ac1200 |\
- 	edgecore,oap100|\
- 	openmesh,a42|\
- 	openmesh,a62)
-diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-index c8943d3ba3..ad2946f636 100644
---- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-+++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-@@ -104,6 +104,7 @@ case "$FIRMWARE" in
- 	compex,wpj419 |\
- 	compex,wpj428 |\
- 	edgecore,ecw5211 |\
-+	edgecore,spw2ac1200 |\
- 	edgecore,oap100 |\
- 	engenius,eap1300 |\
- 	engenius,eap2200 |\
-@@ -220,6 +221,7 @@ case "$FIRMWARE" in
- 	compex,wpj419 |\
- 	compex,wpj428 |\
- 	edgecore,ecw5211 |\
-+	edgecore,spw2ac1200 |\
- 	edgecore,oap100 |\
- 	engenius,eap1300 |\
- 	engenius,eap2200 |\
-diff --git a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-index cbdd12c750..62742f0697 100644
---- a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-+++ b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-@@ -77,6 +77,7 @@ platform_do_upgrade() {
- 		nand_do_upgrade "$1"
- 		;;
- 	alfa-network,ap120c-ac)
-+		mkdir -p /var/lock/
- 		part="$(awk -F 'ubi.mtd=' '{printf $2}' /proc/cmdline | sed -e 's/ .*$//')"
- 		if [ "$part" = "rootfs1" ]; then
- 			fw_setenv active 2 || exit 1
-@@ -87,6 +88,10 @@ platform_do_upgrade() {
- 		fi
- 		nand_do_upgrade "$1"
- 		;;
-+	edgecore,spw2ac1200)
-+		CI_UBIPART="$(awk -F 'ubi.mtd=' '{printf $2}' /proc/cmdline | sed -e 's/ .*$//')"
-+		nand_do_upgrade "$1"
-+		;;
- 	asus,map-ac2200)
- 		CI_KERNPART="linux"
- 		nand_do_upgrade "$1"
-diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-spw2ac1200.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-spw2ac1200.dts
-new file mode 100644
-index 0000000000..a152ba57f4
---- /dev/null
-+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-spw2ac1200.dts
-@@ -0,0 +1,332 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+
-+#include "qcom-ipq4019.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+#include <dt-bindings/soc/qcom,tcsr.h>
-+
-+/ {
-+	model = "Edgecore SPW2AC1200";
-+	compatible = "edgecore,spw2ac1200";
-+
-+	aliases {
-+		led-boot = &led_power;
-+		led-failsafe = &led_power;
-+		led-running = &led_power;
-+		led-upgrade = &led_power;
-+		label-mac-device = &gmac0;
-+	};
-+
-+	chosen {
-+		bootargs-append = " root=";
-+	};
-+
-+	keys {
-+		compatible = "gpio-keys";
-+
-+		reset {
-+			label = "reset";
-+			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_RESTART>;
-+		};
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		led_power: power {
-+			label = "yellow:power";
-+			gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		wlan2g {
-+			label = "green:wlan2g";
-+			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
-+			linux,default-trigger = "phy0tpt";
-+		};
-+
-+		wlan5g {
-+			label = "green:wlan5g";
-+			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
-+			linux,default-trigger = "phy1tpt";
-+		};
-+	};
-+
-+	soc {
-+		rng@22000 {
-+			status = "okay";
-+		};
-+
-+		ess-psgmii@98000 {
-+			status = "okay";
-+		};
-+
-+		counter@4a1000 {
-+			compatible = "qcom,qca-gcnt";
-+			reg = <0x4a1000 0x4>;
-+		};
-+
-+		tcsr@1949000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1949000 0x100>;
-+			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
-+		};
-+
-+		tcsr@194b000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x194b000 0x100>;
-+			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
-+		};
-+
-+		ess_tcsr@1953000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1953000 0x1000>;
-+			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
-+		};
-+
-+		tcsr@1957000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1957000 0x100>;
-+			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
-+		};
-+
-+		usb2@60f8800 {
-+			status = "okay";
-+		};
-+
-+		usb3@8af8800 {
-+			status = "okay";
-+
-+			dwc3@8a00000 {
-+				phys = <&usb3_hs_phy>;
-+				phy-names = "usb2-phy";
-+			};
-+		};
-+
-+		crypto@8e3a000 {
-+			status = "okay";
-+		};
-+
-+		watchdog@b017000 {
-+			status = "okay";
-+		};
-+
-+		ess-switch@c000000 {
-+			status = "okay";
-+
-+			switch_lan_bmp = <0x10>;
-+			switch_wan_bmp = <0x20>;
-+		};
-+
-+		edma@c080000 {
-+			status = "okay";
-+		};
-+	};
-+};
-+
-+&tlmm {
-+	mdio_pins: mdio_pinmux {
-+		mux_mdio {
-+			pins = "gpio53";
-+			function = "mdio";
-+			bias-pull-up;
-+		};
-+
-+		mux_mdc {
-+			pins = "gpio52";
-+			function = "mdc";
-+			bias-pull-up;
-+		};
-+	};
-+
-+	serial_pins: serial_pinmux {
-+		mux {
-+			pins = "gpio60", "gpio61";
-+			function = "blsp_uart0";
-+			bias-disable;
-+		};
-+	};
-+
-+	spi0_pins: spi0_pinmux {
-+		pin {
-+			function = "blsp_spi0";
-+			pins = "gpio55", "gpio56", "gpio57";
-+			drive-strength = <2>;
-+			bias-disable;
-+		};
-+
-+		pin_cs {
-+			function = "gpio";
-+			pins = "gpio54", "gpio4";
-+			drive-strength = <2>;
-+			bias-disable;
-+			output-high;
-+		};
-+	};
-+
-+	i2c0_pins: i2c0_pinmux {
-+		mux_i2c {
-+			function = "blsp_i2c0";
-+			pins = "gpio58", "gpio59";
-+			drive-strength = <16>;
-+			bias-disable;
-+		};
-+	};
-+};
-+
-+&blsp_dma {
-+	status = "okay";
-+};
-+
-+&blsp1_spi1 {
-+	status = "okay";
-+
-+	pinctrl-0 = <&spi0_pins>;
-+	pinctrl-names = "default";
-+	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 4 GPIO_ACTIVE_HIGH>;
-+
-+	flash@0 {
-+		compatible = "jedec,spi-nor";
-+		reg = <0>;
-+		spi-max-frequency = <24000000>;
-+
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			partition@0 {
-+				label = "0:SBL1";
-+				reg = <0x00000000 0x00040000>;
-+				read-only;
-+			};
-+
-+			partition@40000 {
-+				label = "0:MIBIB";
-+				reg = <0x00040000 0x00020000>;
-+				read-only;
-+			};
-+
-+			partition@60000 {
-+				label = "0:QSEE";
-+				reg = <0x00060000 0x00060000>;
-+				read-only;
-+			};
-+
-+			partition@c0000 {
-+				label = "0:CDT";
-+				reg = <0x000c0000 0x00010000>;
-+				read-only;
-+			};
-+
-+			partition@d0000 {
-+				label = "0:DDRPARAMS";
-+				reg = <0x000d0000 0x00010000>;
-+				read-only;
-+			};
-+
-+			partition@e0000 {
-+				label = "0:APPSBLENV"; /* uboot env */
-+				reg = <0x000e0000 0x00010000>;
-+			};
-+
-+			partition@f0000 {
-+				label = "0:APPSBL"; /* uboot */
-+				reg = <0x000f0000 0x00080000>;
-+				read-only;
-+			};
-+
-+			partition@170000 {
-+				label = "0:ART";
-+				reg = <0x00170000 0x00010000>;
-+				read-only;
-+			};
-+
-+			partition@180000 {
-+				label = "certificates";
-+				reg = <0x00180000 0x00010000>;
-+			};
-+		};
-+	};
-+
-+	flash@1 {
-+		compatible = "spi-nand";
-+		reg = <1>;
-+		spi-max-frequency = <24000000>;
-+
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			partition@0 {
-+				label = "rootfs1";
-+				reg = <0x00000000 0x04000000>;
-+			};
-+
-+			partition@4000000 {
-+				label = "rootfs2";
-+				reg = <0x04000000 0x04000000>;
-+			};
-+		};
-+	};
-+};
-+
-+&blsp1_i2c3 {
-+	status = "okay";
-+
-+	pinctrl-0 = <&i2c0_pins>;
-+	pinctrl-names = "default";
-+
-+	tpm@29 {
-+		compatible = "atmel,at97sc3204t";
-+		reg = <0x29>;
-+	};
-+};
-+
-+&blsp1_uart1 {
-+	status = "okay";
-+
-+	pinctrl-0 = <&serial_pins>;
-+	pinctrl-names = "default";
-+};
-+
-+&cryptobam {
-+	status = "okay";
-+};
-+
-+&mdio {
-+	status = "okay";
-+
-+	pinctrl-0 = <&mdio_pins>;
-+	pinctrl-names = "default";
-+};
-+
-+&gmac0 {
-+	qcom,poll_required = <1>;
-+	qcom,phy_mdio_addr = <4>;
-+	vlan_tag = <2 0x20>;
-+};
-+
-+&gmac1 {
-+	qcom,poll_required = <1>;
-+	qcom,phy_mdio_addr = <3>;
-+	vlan_tag = <1 0x10>;
-+};
-+
-+&wifi0 {
-+	status = "okay";
-+};
-+
-+&wifi1 {
-+	status = "okay";
-+	qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";
-+};
-+
-+&usb3_hs_phy {
-+	status = "okay";
-+};
-+
-+&usb2_hs_phy {
-+	status = "okay";
-+};
-diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk
-index ec3e779a44..4448ed6083 100644
---- a/target/linux/ipq40xx/image/generic.mk
-+++ b/target/linux/ipq40xx/image/generic.mk
-@@ -374,6 +374,19 @@ define Device/edgecore_ecw5211
- endef
- TARGET_DEVICES += edgecore_ecw5211
- 
-+define Device/edgecore_spw2ac1200
-+	$(call Device/FitImage)
-+	$(call Device/UbiFit)
-+	DEVICE_VENDOR := Edgecore
-+	DEVICE_MODEL := SPW2AC1200
-+	SOC := qcom-ipq4018
-+	BLOCKSIZE := 128k
-+	PAGESIZE := 2048
-+	DEVICE_DTS_CONFIG := config@ap.dk01.1-c2
-+	DEVICE_PACKAGES := kmod-tpm-i2c-atmel kmod-usb-acm uboot-envtools kmod-usb-net kmod-usb-net-cdc-qmi uqmi
-+endef
-+TARGET_DEVICES += edgecore_spw2ac1200
-+
- define Device/edgecore_oap100
- 	$(call Device/FitImage)
- 	$(call Device/UbiFit)
-diff --git a/target/linux/ipq40xx/patches-5.4/901-arm-boot-add-dts-files.patch b/target/linux/ipq40xx/patches-5.4/901-arm-boot-add-dts-files.patch
-index aa2fc4bd17..ae0b8f2025 100644
---- a/target/linux/ipq40xx/patches-5.4/901-arm-boot-add-dts-files.patch
-+++ b/target/linux/ipq40xx/patches-5.4/901-arm-boot-add-dts-files.patch
-@@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
- 
- --- a/arch/arm/boot/dts/Makefile
- +++ b/arch/arm/boot/dts/Makefile
--@@ -837,11 +837,61 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-+@@ -837,11 +837,62 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-  	qcom-apq8074-dragonboard.dtb \
-  	qcom-apq8084-ifc6540.dtb \
-  	qcom-apq8084-mtp.dtb \
-@@ -22,6 +22,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
- +	qcom-ipq4018-ea6350v3.dtb \
- +	qcom-ipq4018-eap1300.dtb \
- +	qcom-ipq4018-ecw5211.dtb \
-++	qcom-ipq4018-spw2ac1200.dtb \
- +	qcom-ipq4018-emd1.dtb \
- +	qcom-ipq4018-emr3500.dtb \
- +	qcom-ipq4018-ens620ext.dtb \
--- 
-2.25.1
-
diff --git a/patches/ipq40xx/0006-ipq40xx-add-Wallys-DR40x9-support.patch b/patches/ipq40xx/0006-ipq40xx-add-Wallys-DR40x9-support.patch
deleted file mode 100644
index 064cd6d8e..000000000
--- a/patches/ipq40xx/0006-ipq40xx-add-Wallys-DR40x9-support.patch
+++ /dev/null
@@ -1,641 +0,0 @@
-From e251101d0e0383714cc1c6ff260beb46f560c37c Mon Sep 17 00:00:00 2001
-From: Robert Marko <robert.marko@sartura.hr>
-Date: Sat, 4 Sep 2021 06:19:42 +0200
-Subject: [PATCH 01/33] ipq40xx: add Wallys DR40x9 support
-
-Adds support for the Wallys DR40x9 series boards.
-They come in IPQ4019 and IPQ4029 versions.
-IPQ4019/4029 only differ in that that IPQ4029 is the industrial version that is rated to higher temperatures.
-
-Specifications are:
-* CPU: Qualcomm IPQ40x9 (4x ARMv7A Cortex A7) at 716 MHz
-* RAM: 512 MB
-* Storage: 2MB of SPI-NOR, 128 MB of parallel NAND
-* USB 3.0 TypeA port for users
-* MiniPCI-E with PCI-E 2.0 link
-* MiniPCI-E for LTE modems with only USB2.0 link
-* 2 SIM card slots that are selected via GPIO11
-* MicroSD card slot
-* Ethernet: 2x GBe with 24~48V passive POE
-* SFP port (Untested, I have no way to test it)
-* DC Jack
-* UART header
-* WLAN: In-SoC 2x2 802.11b/g/n and 2x2 802.11a/n/ac
-* 4x MMCX connectors for WLAN
-* Reset button
-* 8x LED-s
-
-Installation instructions:
-Connect to UART, pins are like this:
--> 3.3V | TX | RX | GND
-
-Settings are 115200 8n1
-
-Boot initramfs from TFTP:
-tftpboot 0x84000000 openwrt-ipq40xx-generic-wallys_dr40x9-initramfs-fit-uImage.itb
-
-bootm
-
-Then copy the sysupgrade image to the /tmp folder and execute sysupgrade -n <image_name>
-
-Signed-off-by: Robert Marko <robert.marko@sartura.hr>
----
- package/firmware/ipq-wifi/Makefile            |   2 +
- .../ipq-wifi/board-wallys_dr40x9.qca4019      | Bin 0 -> 24316 bytes
- .../ipq40xx/base-files/etc/board.d/02_network |   3 +-
- .../base-files/etc/board.d/03_gpio_switches   |   3 +
- .../etc/hotplug.d/firmware/11-ath10k-caldata  |   6 +-
- .../base-files/lib/upgrade/platform.sh        |   1 +
- .../arch/arm/boot/dts/qcom-ipq40x9-dr40x9.dts | 387 ++++++++++++++++++
- target/linux/ipq40xx/image/generic.mk         |  13 +
- .../901-arm-boot-add-dts-files.patch          |   3 +-
- 9 files changed, 414 insertions(+), 4 deletions(-)
- create mode 100644 package/firmware/ipq-wifi/board-wallys_dr40x9.qca4019
- create mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq40x9-dr40x9.dts
-
-diff --git a/package/firmware/ipq-wifi/Makefile b/package/firmware/ipq-wifi/Makefile
-index c9d113ae6a..b222ce30d6 100644
---- a/package/firmware/ipq-wifi/Makefile
-+++ b/package/firmware/ipq-wifi/Makefile
-@@ -51,6 +51,7 @@ ALLWIFIBOARDS:= \
- 	plasmacloud_pa2200 \
- 	qxwlan_e2600ac \
- 	cig_wf610d \
-+	wallys_dr40x9 \
- 	tp-link_ec420-g1
- 
- ALLWIFIPACKAGES:=$(foreach BOARD,$(ALLWIFIBOARDS),ipq-wifi-$(BOARD))
-@@ -139,5 +140,6 @@ $(eval $(call generate-ipq-wifi-package,plasmacloud_pa2200,Plasma Cloud PA2200))
- $(eval $(call generate-ipq-wifi-package,qxwlan_e2600ac,Qxwlan E2600AC))
- $(eval $(call generate-ipq-wifi-package,cig_wf610d,CIG WF_610D))
- $(eval $(call generate-ipq-wifi-package,tp-link_ec420-g1,tp-link EC420-G1))
-+$(eval $(call generate-ipq-wifi-package,wallys_dr40x9,Wallys DR40X9))
- 
- $(foreach PACKAGE,$(ALLWIFIPACKAGES),$(eval $(call BuildPackage,$(PACKAGE))))
-diff --git a/package/firmware/ipq-wifi/board-wallys_dr40x9.qca4019 b/package/firmware/ipq-wifi/board-wallys_dr40x9.qca4019
-new file mode 100644
-index 0000000000000000000000000000000000000000..9114eecbbdffb0c47192e9ea4d7b6055a1c4b470
-GIT binary patch
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-
-literal 0
-HcmV?d00001
-
-diff --git a/target/linux/ipq40xx/base-files/etc/board.d/02_network b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-index 0240798bbb..5a2a3a47f7 100755
---- a/target/linux/ipq40xx/base-files/etc/board.d/02_network
-+++ b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-@@ -19,7 +19,8 @@ ipq40xx_setup_interfaces()
- 	engenius,ens620ext|\
- 	luma,wrtq-329acn|\
- 	plasmacloud,pa1200|\
--	plasmacloud,pa2200)
-+	plasmacloud,pa2200|\
-+	wallys,dr40x9)
- 		ucidef_set_interfaces_lan_wan "eth0" "eth1"
- 		;;
- 	aruba,ap-303|\
-diff --git a/target/linux/ipq40xx/base-files/etc/board.d/03_gpio_switches b/target/linux/ipq40xx/base-files/etc/board.d/03_gpio_switches
-index c255707f91..e1f75fd4bd 100755
---- a/target/linux/ipq40xx/base-files/etc/board.d/03_gpio_switches
-+++ b/target/linux/ipq40xx/base-files/etc/board.d/03_gpio_switches
-@@ -19,6 +19,9 @@ cilab,meshpoint-one)
- compex,wpj428)
- 	ucidef_add_gpio_switch "sim_card_select" "SIM card select" "3" "0"
- 	;;
-+wallys,dr40x9)
-+	ucidef_add_gpio_switch "sim_card_select" "SIM card select" "423" "0"
-+	;;
- esac
- 
- board_config_flush
-diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-index ad2946f636..64bb4efaf8 100644
---- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-+++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-@@ -115,7 +115,8 @@ case "$FIRMWARE" in
- 	plasmacloud,pa2200 |\
- 	qxwlan,e2600ac-c1 |\
- 	qxwlan,e2600ac-c2 |\
--	unielec,u4019-32m)
-+	unielec,u4019-32m |\
-+	wallys,dr40x9)
- 		caldata_extract "0:ART" 0x1000 0x2f20
- 		;;
- 	devolo,magic-2-wifi-next)
-@@ -232,7 +233,8 @@ case "$FIRMWARE" in
- 	plasmacloud,pa2200 |\
- 	qxwlan,e2600ac-c1 |\
- 	qxwlan,e2600ac-c2 |\
--	unielec,u4019-32m)
-+	unielec,u4019-32m |\
-+	wallys,dr40x9)
- 		caldata_extract "0:ART" 0x5000 0x2f20
- 		;;
- 	devolo,magic-2-wifi-next)
-diff --git a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-index 62742f0697..fc64807d74 100644
---- a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-+++ b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-@@ -73,6 +73,7 @@ platform_do_upgrade() {
- 	luma,wrtq-329acn |\
- 	mobipromo,cm520-79f |\
- 	qxwlan,e2600ac-c2 |\
-+	wallys,dr40x9 |\
- 	tp-link,ec420-g1)
- 		nand_do_upgrade "$1"
- 		;;
-diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq40x9-dr40x9.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq40x9-dr40x9.dts
-new file mode 100644
-index 0000000000..34630959e2
---- /dev/null
-+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq40x9-dr40x9.dts
-@@ -0,0 +1,387 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+
-+#include "qcom-ipq4019.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+#include <dt-bindings/soc/qcom,tcsr.h>
-+
-+/ {
-+	model = "Wallys DR40X9";
-+	compatible = "wallys,dr40x9";
-+
-+	chosen {
-+		bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
-+	};
-+
-+	soc {
-+		rng@22000 {
-+			status = "okay";
-+		};
-+
-+		mdio@90000 {
-+			status = "okay";
-+
-+			pinctrl-0 = <&mdio_pins>;
-+			pinctrl-names = "default";
-+			reset-gpios = <&tlmm 41 GPIO_ACTIVE_LOW>;
-+			reset-delay-us = <2000>;
-+		};
-+
-+		ess-psgmii@98000 {
-+			status = "okay";
-+		};
-+
-+		counter@4a1000 {
-+			compatible = "qcom,qca-gcnt";
-+			reg = <0x4a1000 0x4>;
-+		};
-+
-+		tcsr@1949000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1949000 0x100>;
-+			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
-+		};
-+
-+		tcsr@194b000 {
-+			status = "okay";
-+
-+			/* select hostmode */
-+			compatible = "qcom,tcsr";
-+			reg = <0x194b000 0x100>;
-+			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
-+		};
-+
-+		ess_tcsr@1953000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1953000 0x1000>;
-+			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
-+		};
-+
-+		tcsr@1957000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1957000 0x100>;
-+			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
-+		};
-+
-+		usb2: usb2@60f8800 {
-+			status = "okay";
-+		};
-+
-+		usb3: usb3@8af8800 {
-+			status = "okay";
-+		};
-+
-+		crypto@8e3a000 {
-+			status = "okay";
-+		};
-+
-+		watchdog@b017000 {
-+			status = "okay";
-+		};
-+
-+		ess-switch@c000000 {
-+			status = "okay";
-+		};
-+
-+		edma@c080000 {
-+			status = "okay";
-+		};
-+	};
-+
-+	keys {
-+		compatible = "gpio-keys";
-+
-+		reset {
-+			label = "reset";
-+			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_RESTART>;
-+		};
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		wlan2g {
-+			label = "dr4029:green:wlan2g";
-+			gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
-+			linux,default-trigger = "phy0tpt";
-+		};
-+
-+		wlan5g {
-+			label = "dr4029:green:wlan5g";
-+			gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
-+			linux,default-trigger = "phy1tpt";
-+		};
-+
-+		wlan2g-strength {
-+			label = "dr4029:green:wlan2g-strength";
-+			gpios = <&tlmm 36 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		wlan5g-strength {
-+			label = "dr4029:green:wlan5g-strength";
-+			gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
-+		};
-+	};
-+};
-+
-+&tlmm {
-+	mdio_pins: mdio_pinmux {
-+		mux_1 {
-+			pins = "gpio6";
-+			function = "mdio";
-+			bias-pull-up;
-+		};
-+		mux_2 {
-+			pins = "gpio7";
-+			function = "mdc";
-+			bias-pull-up;
-+		};
-+	};
-+
-+	serial0_pins: serial0_pinmux {
-+		mux {
-+			pins = "gpio16", "gpio17";
-+			function = "blsp_uart0";
-+			bias-disable;
-+		};
-+	};
-+
-+	serial1_pins: serial1_pinmux {
-+		mux {
-+			pins = "gpio8", "gpio9";
-+			function = "blsp_uart1";
-+			bias-disable;
-+		};
-+	};
-+
-+	spi_0_pins: spi_0_pinmux {
-+		pinmux {
-+			function = "blsp_spi0";
-+			pins = "gpio13", "gpio14", "gpio15";
-+			drive-strength = <12>;
-+			bias-disable;
-+		};
-+		pinmux_cs {
-+			function = "gpio";
-+			pins = "gpio12";
-+			drive-strength = <2>;
-+			bias-disable;
-+			output-high;
-+		};
-+	};
-+
-+	nand_pins: nand_pins {
-+		pullups {
-+			pins =  "gpio52", "gpio53", "gpio58", "gpio59";
-+			function = "qpic";
-+			bias-pull-up;
-+		};
-+
-+		pulldowns {
-+			pins = "gpio54", "gpio55", "gpio56", "gpio57",
-+				"gpio60", "gpio62", "gpio63", "gpio64",
-+				"gpio65", "gpio66", "gpio67", "gpio68",
-+				"gpio69";
-+			function = "qpic";
-+			bias-pull-down;
-+		};
-+	};
-+
-+	sd_pins: sd_pins {
-+		pinmux {
-+			function = "sdio";
-+			pins = "gpio23", "gpio24", "gpio25", "gpio26",
-+				"gpio28", "gpio29", "gpio30", "gpio31";
-+			drive-strength = <10>;
-+		};
-+		pinmux_sd_clk {
-+			function = "sdio";
-+			pins = "gpio27";
-+			drive-strength = <16>;
-+		};
-+		pinmux_sd7 {
-+			function = "sdio";
-+			pins = "gpio32";
-+			drive-strength = <10>;
-+			bias-disable;
-+		};
-+	};
-+};
-+
-+&blsp_dma {
-+	status = "okay";
-+};
-+
-+&blsp1_spi1 {
-+	status = "okay";
-+
-+	pinctrl-0 = <&spi_0_pins>;
-+	pinctrl-names = "default";
-+
-+	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
-+
-+	flash@0 {
-+		compatible = "jedec,spi-nor";
-+		spi-max-frequency = <24000000>;
-+		reg = <0>;
-+
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			partition0@0 {
-+				label = "0:SBL1";
-+				reg = <0x00000000 0x00040000>;
-+				read-only;
-+			};
-+
-+			partition1@40000 {
-+				label = "0:MIBIB";
-+				reg = <0x00040000 0x00020000>;
-+				read-only;
-+			};
-+
-+			partition2@60000 {
-+				label = "0:QSEE";
-+				reg = <0x00060000 0x00060000>;
-+				read-only;
-+			};
-+
-+			partition3@c0000 {
-+				label = "0:CDT";
-+				reg = <0x000c0000 0x00010000>;
-+				read-only;
-+			};
-+
-+			partition4@d0000 {
-+				label = "0:DDRPARAMS";
-+				reg = <0x000d0000 0x00010000>;
-+				read-only;
-+			};
-+
-+			partition5@e0000 {
-+				label = "0:APPSBLENV"; /* uboot env */
-+				reg = <0x000e0000 0x00010000>;
-+				read-only;
-+			};
-+
-+			partition6@f0000 {
-+				label = "0:APPSBL"; /* uboot */
-+				reg = <0x000f0000 0x00080000>;
-+				read-only;
-+			};
-+
-+			partition7@170000 {
-+				label = "0:ART";
-+				reg = <0x00170000 0x00010000>;
-+				read-only;
-+			};
-+		};
-+	};
-+};
-+
-+&qpic_bam {
-+	status = "okay";
-+};
-+
-+&nand {
-+	status = "okay";
-+
-+	pinctrl-0 = <&nand_pins>;
-+	pinctrl-names = "default";
-+
-+	nand@0 {
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			partition@0 {
-+				label = "ubi";
-+				reg = <0x00000000 0x04000000>;
-+			};
-+		};
-+	};
-+};
-+
-+&blsp1_uart1 {
-+	status = "okay";
-+
-+	pinctrl-0 = <&serial0_pins>;
-+	pinctrl-names = "default";
-+};
-+
-+&blsp1_uart2 {
-+	status = "okay";
-+
-+	pinctrl-0 = <&serial1_pins>;
-+	pinctrl-names = "default";
-+};
-+
-+&cryptobam {
-+	status = "okay";
-+};
-+
-+&pcie0 {
-+	status = "okay";
-+
-+	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
-+	wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
-+
-+	/* Unpolulated slot */
-+	bridge@0,0 {
-+		reg = <0x00000000 0 0 0 0>;
-+		#address-cells = <3>;
-+		#size-cells = <2>;
-+		ranges;
-+	};
-+};
-+
-+&vqmmc {
-+	status = "okay";
-+};
-+
-+&sdhci {
-+	pinctrl-0 = <&sd_pins>;
-+	pinctrl-names = "default";
-+	cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
-+	vqmmc-supply = <&vqmmc>;
-+	status = "okay";
-+};
-+
-+&ethphy4 {
-+	qcom,fiber-enable;
-+};
-+
-+&gmac0 {
-+	qcom,phy_mdio_addr = <3>;
-+	qcom,poll_required = <1>;
-+	qcom,forced_speed = <1000>;
-+	qcom,forced_duplex = <1>;
-+};
-+
-+&wifi0 {
-+	status = "okay";
-+
-+	qcom,ath10k-calibration-variant = "Wallys-DR40X9";
-+};
-+
-+&wifi1 {
-+	status = "okay";
-+
-+	qcom,ath10k-calibration-variant = "Wallys-DR40X9";
-+};
-+
-+&usb3_ss_phy {
-+	status = "okay";
-+};
-+
-+&usb3_hs_phy {
-+	status = "okay";
-+};
-+
-+&usb2_hs_phy {
-+	status = "okay";
-+};
-diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk
-index 75bf67cf87..8bd02a766f 100644
---- a/target/linux/ipq40xx/image/generic.mk
-+++ b/target/linux/ipq40xx/image/generic.mk
-@@ -832,6 +832,19 @@ define Device/zyxel_wre6606
- endef
- TARGET_DEVICES += zyxel_wre6606
- 
-+define Device/wallys_dr40x9
-+	$(call Device/FitImage)
-+	$(call Device/UbiFit)
-+	DEVICE_VENDOR := Wallys
-+	DEVICE_MODEL := DR40X9
-+	SOC := qcom-ipq40x9
-+	DEVICE_DTS_CONFIG := config@ap.dk07.1-c1
-+	BLOCKSIZE := 128k
-+	PAGESIZE := 2048
-+	DEVICE_PACKAGES := ipq-wifi-wallys_dr40x9
-+endef
-+TARGET_DEVICES += wallys_dr40x9
-+
- define Device/tp-link_ec420_g1
- 	$(call Device/FitImage)
- 	$(call Device/UbiFit)
-diff --git a/target/linux/ipq40xx/patches-5.4/901-arm-boot-add-dts-files.patch b/target/linux/ipq40xx/patches-5.4/901-arm-boot-add-dts-files.patch
-index ae0b8f2025..826e17b0e9 100644
---- a/target/linux/ipq40xx/patches-5.4/901-arm-boot-add-dts-files.patch
-+++ b/target/linux/ipq40xx/patches-5.4/901-arm-boot-add-dts-files.patch
-@@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
- 
- --- a/arch/arm/boot/dts/Makefile
- +++ b/arch/arm/boot/dts/Makefile
--@@ -837,11 +837,62 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-+@@ -837,11 +837,63 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-  	qcom-apq8074-dragonboard.dtb \
-  	qcom-apq8084-ifc6540.dtb \
-  	qcom-apq8084-mtp.dtb \
-@@ -70,6 +70,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
- +	qcom-ipq4029-gl-b1300.dtb \
- +	qcom-ipq4029-gl-s1300.dtb \
- +	qcom-ipq4029-mr33.dtb \
-++	qcom-ipq40x9-dr40x9.dtb \
-  	qcom-ipq8064-ap148.dtb \
-  	qcom-msm8660-surf.dtb \
-  	qcom-msm8960-cdp.dtb \
--- 
-2.25.1
-
diff --git a/patches/ipq40xx/0007-ipq40xx-add-HFCL-ION4-support.patch b/patches/ipq40xx/0007-ipq40xx-add-HFCL-ION4-support.patch
deleted file mode 100644
index d47486f5e..000000000
--- a/patches/ipq40xx/0007-ipq40xx-add-HFCL-ION4-support.patch
+++ /dev/null
@@ -1,410 +0,0 @@
-From 2bfcd7d31d0860c28e6c35688302e48eb2b3e2ae Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Thu, 26 Aug 2021 17:34:47 +0200
-Subject: [PATCH 01/14] ipq40xx: add HFCL ION4 support
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/boot/uboot-envtools/files/ipq40xx     |   4 +
- package/firmware/ipq-wifi/Makefile            |   4 +-
- .../ipq40xx/base-files/etc/board.d/01_leds    |   4 +
- .../ipq40xx/base-files/etc/board.d/02_network |   1 +
- .../etc/hotplug.d/firmware/11-ath10k-caldata  |   8 +
- .../base-files/lib/upgrade/platform.sh        |   1 +
- .../arm/boot/dts/qcom-ipq4019-hfcl-ion4.dts   | 236 ++++++++++++++++++
- target/linux/ipq40xx/image/generic.mk         |  18 ++
- .../ipq40xx/patches-5.4/999-hfcl_ion.patch    |  12 +
- 9 files changed, 287 insertions(+), 1 deletion(-)
- create mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-hfcl-ion4.dts
- create mode 100644 target/linux/ipq40xx/patches-5.4/999-hfcl_ion.patch
-
-diff --git a/package/boot/uboot-envtools/files/ipq40xx b/package/boot/uboot-envtools/files/ipq40xx
-index ab489a6e18..fd7ad69eff 100644
---- a/package/boot/uboot-envtools/files/ipq40xx
-+++ b/package/boot/uboot-envtools/files/ipq40xx
-@@ -64,6 +64,10 @@ tp-link,ec420-g1 |\
- zyxel,nbg6617)
- 	ubootenv_add_uci_config "/dev/mtd6" "0x0" "0x10000" "0x10000"
- 	;;
-+hfcl,ion4)
-+	env=$(ubootenv_mtdinfo)
-+	ubootenv_add_uci_config $env
-+	;;
- esac
- 
- config_load ubootenv
-diff --git a/package/firmware/ipq-wifi/Makefile b/package/firmware/ipq-wifi/Makefile
-index b222ce30d6..cd7bfc3c82 100644
---- a/package/firmware/ipq-wifi/Makefile
-+++ b/package/firmware/ipq-wifi/Makefile
-@@ -52,7 +52,8 @@ ALLWIFIBOARDS:= \
- 	qxwlan_e2600ac \
- 	cig_wf610d \
- 	wallys_dr40x9 \
--	tp-link_ec420-g1
-+	tp-link_ec420-g1 \
-+	hfcl_ion4
- 
- ALLWIFIPACKAGES:=$(foreach BOARD,$(ALLWIFIBOARDS),ipq-wifi-$(BOARD))
- 
-@@ -141,5 +142,6 @@ $(eval $(call generate-ipq-wifi-package,qxwlan_e2600ac,Qxwlan E2600AC))
- $(eval $(call generate-ipq-wifi-package,cig_wf610d,CIG WF_610D))
- $(eval $(call generate-ipq-wifi-package,tp-link_ec420-g1,tp-link EC420-G1))
- $(eval $(call generate-ipq-wifi-package,wallys_dr40x9,Wallys DR40X9))
-+$(eval $(call generate-ipq-wifi-package,hfcl_ion4,HFCL ION4))
- 
- $(foreach PACKAGE,$(ALLWIFIPACKAGES),$(eval $(call BuildPackage,$(PACKAGE))))
-diff --git a/target/linux/ipq40xx/base-files/etc/board.d/01_leds b/target/linux/ipq40xx/base-files/etc/board.d/01_leds
-index d473448137..d944d72184 100755
---- a/target/linux/ipq40xx/base-files/etc/board.d/01_leds
-+++ b/target/linux/ipq40xx/base-files/etc/board.d/01_leds
-@@ -78,6 +78,10 @@ zyxel,wre6606)
- 	ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wlan2g" "phy0tpt"
- 	ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wlan5g" "phy1tpt"
- 	;;
-+hfcl,ion4)
-+	ucidef_set_led_wlan "wlan2g" "WLAN2G" "yellow:wlan2g" "phy0tpt"
-+	ucidef_set_led_wlan "wlan5g" "WLAN5G" "red:wlan5g" "phy1tpt"
-+	;;
- esac
- 
- board_config_flush
-diff --git a/target/linux/ipq40xx/base-files/etc/board.d/02_network b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-index 5a2a3a47f7..e4b009bf93 100755
---- a/target/linux/ipq40xx/base-files/etc/board.d/02_network
-+++ b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-@@ -34,6 +34,7 @@ ipq40xx_setup_interfaces()
- 	netgear,ex6100v2|\
- 	netgear,ex6150v2|\
- 	tp-link,ec420-g1|\
-+	hfcl,ion4|\
- 	zyxel,wre6606)
- 		ucidef_set_interface_wan "eth0"
- 		;;
-diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-index 64bb4efaf8..211e7cfda1 100644
---- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-+++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-@@ -167,6 +167,10 @@ case "$FIRMWARE" in
- 	tp-link,ec420-g1)
- 		caldata_extract "0:ART" 0x1000 0x2f20
- 		;;
-+	hfcl,ion4)
-+		caldata_extract "0:ART" 4096 12064
-+		ath10k_patch_mac $(mtd_get_mac_ascii 0:ART WLAN0_BASEMAC)
-+		;;
- 	esac
- 	;;
- "ath10k/pre-cal-ahb-a800000.wifi.bin")
-@@ -283,6 +287,10 @@ case "$FIRMWARE" in
- 		caldata_extract "ART" 0x5000 0x2f20
- 		ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -1)
- 		;;
-+	hfcl,ion4)
-+		caldata_extract "0:ART" 20480 12064
-+		ath10k_patch_mac $(mtd_get_mac_ascii 0:ART WLAN1_BASEMAC)
-+		;;
- 	esac
- 	;;
- *)
-diff --git a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-index fc64807d74..806b3edb66 100644
---- a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-+++ b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-@@ -74,6 +74,7 @@ platform_do_upgrade() {
- 	mobipromo,cm520-79f |\
- 	qxwlan,e2600ac-c2 |\
- 	wallys,dr40x9 |\
-+	hfcl,ion4 |\
- 	tp-link,ec420-g1)
- 		nand_do_upgrade "$1"
- 		;;
-diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-hfcl-ion4.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-hfcl-ion4.dts
-new file mode 100644
-index 0000000000..bb247c5b79
---- /dev/null
-+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-hfcl-ion4.dts
-@@ -0,0 +1,236 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+
-+#include "qcom-ipq4019.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+#include <dt-bindings/soc/qcom,tcsr.h>
-+
-+/ {
-+	model = "HFCL Ltd, ION4";
-+	compatible = "hfcl,ion4";
-+
-+	aliases {
-+/*		led-boot = &power_green;
-+		led-failsafe = &power_red;
-+		led-running = &power_green;
-+		led-upgrade = &power_red;
-+		label-mac-device = &wifi0;
-+		*/
-+	};
-+
-+	soc {
-+		rng@22000 {
-+			status = "okay";
-+		};
-+
-+		mdio@90000 {
-+			status = "okay";
-+			pinctrl-0 = <&mdio_pins>;
-+			pinctrl-names = "default";
-+
-+			/delete-node/ ethernet-phy@1;
-+			/delete-node/ ethernet-phy@2;
-+			/delete-node/ ethernet-phy@3;
-+			/delete-node/ ethernet-phy@4;
-+			/delete-node/ psgmii-phy@5;
-+		};
-+
-+		tcsr@1949000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1949000 0x100>;
-+			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
-+		};
-+
-+		ess_tcsr@1953000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1953000 0x1000>;
-+			qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
-+		};
-+
-+		tcsr@1957000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1957000 0x100>;
-+			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
-+		};
-+
-+		crypto@8e3a000 {
-+			status = "okay";
-+		};
-+
-+		watchdog@b017000 {
-+			status = "okay";
-+		};
-+
-+		ess-switch@c000000 {
-+			switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
-+			switch_lan_bmp = <0x0>; /* lan port bitmap */
-+			switch_wan_bmp = <0x10>; /* wan port bitmap */
-+		};
-+
-+		edma@c080000 {
-+			status = "okay";
-+			phy-mode = "rgmii-id";
-+			qcom,num_gmac = <1>;
-+			qcom,single-phy;
-+		};
-+	};
-+
-+	gpio_key {
-+		compatible = "gpio-keys";
-+		button@1 {
-+			label = "reset";
-+			linux,code = <KEY_RESTART>;
-+			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
-+			linux,input-type = <1>;
-+		};
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		power_red: power_red {
-+			label = "yellow:wlan2g";
-+			gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		power_green: power_green {
-+			label = "red:wlan5g";
-+			gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
-+};
-+
-+&tlmm {
-+	serial_0_pins: serial_pinmux {
-+		mux {
-+			pins = "gpio16", "gpio17";
-+			function = "blsp_uart0";
-+			bias-disable;
-+		};
-+	};
-+
-+	nand_pins: nand_pins {
-+		pullups {
-+			pins = "gpio53", "gpio58", "gpio59";
-+			function = "qpic";
-+			bias-pull-up;
-+		};
-+
-+		pulldowns {
-+			pins = "gpio54", "gpio55", "gpio56",
-+				"gpio57", "gpio60", "gpio61",
-+				"gpio62", "gpio63", "gpio64",
-+				"gpio65", "gpio66", "gpio67",
-+				"gpio68", "gpio69";
-+			function = "qpic";
-+			bias-pull-down;
-+		};
-+	};
-+
-+	mdio_pins: mdio_pinmux {
-+		mux_1 {
-+			pins = "gpio6";
-+			function = "mdio";
-+			bias-pull-up;
-+		};
-+		mux_2 {
-+			pins = "gpio7";
-+			function = "mdc";
-+			bias-pull-up;
-+		};
-+	};
-+};
-+
-+&nand {
-+	pinctrl-0 = <&nand_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+
-+	nand@0 {
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			partition0@0 {
-+				label = "0:SBL1";
-+				reg = <0x00000000 0x00100000>;
-+				read-only;
-+			};
-+			partition1@100000 {
-+				label = "0:MIBIB";
-+				reg = <0x00100000 0x00100000>;
-+				read-only;
-+			};
-+			partition2@200000 {
-+				label = "0:BOOTCONFIG";
-+				reg = <0x00200000 0x00100000>;
-+				read-only;
-+			};
-+			partition3@300000 {
-+				label = "0:QSEE";
-+				reg = <0x00300000 0x00200000>;
-+				read-only;
-+			};
-+			partition4@500000 {
-+				label = "0:CDT";
-+				reg = <0x00500000 0x00180000>;
-+				read-only;
-+			};
-+			partition5@680000 {
-+				label = "0:APPSBLENV";
-+				reg = <0x00680000 0x00080000>;
-+			};
-+			partition6@700000 {
-+				label = "0:APPSBL";
-+				reg = <0x00700000 0x00400000>;
-+				read-only;
-+			};
-+			partition7@b00000 {
-+				label = "0:ART";
-+				reg = <0x00b00000 0x00080000>;
-+				read-only;
-+			};
-+			partition8@b80000 {
-+				label = "kernel";
-+				reg = <0x00b80000 0x1000000>;
-+			};
-+			partition8@180000 {
-+				label = "ubi";
-+				reg = <0x02b80000 0x5480000>;
-+			};
-+		};
-+	};
-+};
-+
-+&cryptobam {
-+	status = "okay";
-+};
-+
-+&blsp_dma {
-+	status = "okay";
-+};
-+
-+&blsp1_uart1 {
-+	pinctrl-0 = <&serial_0_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+};
-+
-+&qpic_bam {
-+	status = "okay";
-+};
-+
-+&wifi0 {
-+	status = "okay";
-+};
-+
-+&wifi1 {
-+	status = "okay";
-+};
-+
-+&gmac0 {
-+	qcom,phy_mdio_addr = <0>;
-+	qcom,poll_required = <1>;
-+	vlan_tag = <0 0x20>;
-+};
-diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk
-index 540f1f2778..ae1e2e49cf 100644
---- a/target/linux/ipq40xx/image/generic.mk
-+++ b/target/linux/ipq40xx/image/generic.mk
-@@ -857,3 +857,21 @@ define Device/tp-link_ec420_g1
- 	DEVICE_PACKAGES := ath10k-firmware-qca9984-ct ipq-wifi-tp-link_ec420-g1 uboot-envtools
- endef
- TARGET_DEVICES += tp-link_ec420_g1
-+
-+define Device/hfcl_ion4
-+	$(call Device/FitImage)
-+	$(call Device/UbiFit)
-+	DEVICE_VENDOR := HFCL
-+	DEVICE_MODEL := ION4
-+	SOC := qcom-ipq4019
-+	DEVICE_DTS := qcom-ipq4019-hfcl-ion4
-+	KERNEL_INSTALL := 1
-+	KERNEL_SIZE := 4048k
-+	BLOCKSIZE := 128k
-+	PAGESIZE := 2048
-+	BOARD_NAME := hfcl-ion4
-+	IMAGES := nand-sysupgrade.bin
-+	IMAGE/nand-sysupgrade.bin := sysupgrade-tar | append-metadata
-+	DEVICE_PACKAGES := uboot-envtools
-+endef
-+TARGET_DEVICES += hfcl_ion4
-diff --git a/target/linux/ipq40xx/patches-5.4/999-hfcl_ion.patch b/target/linux/ipq40xx/patches-5.4/999-hfcl_ion.patch
-new file mode 100644
-index 0000000000..2b45b47521
---- /dev/null
-+++ b/target/linux/ipq40xx/patches-5.4/999-hfcl_ion.patch
-@@ -0,0 +1,12 @@
-+Index: linux-5.4.111/arch/arm/boot/dts/Makefile
-+===================================================================
-+--- linux-5.4.111.orig/arch/arm/boot/dts/Makefile
-++++ linux-5.4.111/arch/arm/boot/dts/Makefile
-+@@ -885,6 +885,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-+ 	qcom-ipq4019-wpj419.dtb \
-+ 	qcom-ipq4019-wtr-m2133hp.dtb \
-+ 	qcom-ipq4019-tp-link-ec420-g1.dtb \
-++	qcom-ipq4019-hfcl-ion4.dtb \
-+ 	qcom-ipq4028-wpj428.dtb \
-+ 	qcom-ipq4029-ap-303.dtb \
-+ 	qcom-ipq4029-ap-303h.dtb \
--- 
-2.25.1
-
diff --git a/patches/ipq40xx/0008-ipq40xx-enable-napi-threading.patch b/patches/ipq40xx/0008-ipq40xx-enable-napi-threading.patch
deleted file mode 100644
index df10fa792..000000000
--- a/patches/ipq40xx/0008-ipq40xx-enable-napi-threading.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 0bd80d71774ab01df2c150c85cb6ea2b94f3928c Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Tue, 14 Dec 2021 11:04:27 +0100
-Subject: [PATCH] ipq40xx: enable napi threading
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- .../ipq40xx/base-files/lib/preinit/05_set_threading.sh     | 7 +++++++
- 1 file changed, 7 insertions(+)
- create mode 100644 target/linux/ipq40xx/base-files/lib/preinit/05_set_threading.sh
-
-diff --git a/target/linux/ipq40xx/base-files/lib/preinit/05_set_threading.sh b/target/linux/ipq40xx/base-files/lib/preinit/05_set_threading.sh
-new file mode 100644
-index 0000000000..66c865bc62
---- /dev/null
-+++ b/target/linux/ipq40xx/base-files/lib/preinit/05_set_threading.sh
-@@ -0,0 +1,7 @@
-+. /lib/functions.sh
-+
-+preinit_set_threading() {
-+	echo 1 > /sys/class/net/eth0/threaded
-+}
-+
-+boot_hook_add preinit_main preinit_set_threading
--- 
-2.25.1
-
diff --git a/patches/ipq40xx/0009-ipq40xx-add-packet_steering-script-from-19.07.patch b/patches/ipq40xx/0009-ipq40xx-add-packet_steering-script-from-19.07.patch
deleted file mode 100644
index f6f7d515b..000000000
--- a/patches/ipq40xx/0009-ipq40xx-add-packet_steering-script-from-19.07.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From 954975fbc48c2273051ba2b83e85e2e462130725 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Tue, 14 Dec 2021 07:20:25 +0100
-Subject: [PATCH] ipq40xx: add packet_steering script from 19.07
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- .../base-files/etc/hotplug.d/net/20-smp-tune  | 67 +++++++++++++++++++
- 1 file changed, 67 insertions(+)
- create mode 100644 target/linux/ipq40xx/base-files/etc/hotplug.d/net/20-smp-tune
-
-diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/net/20-smp-tune b/target/linux/ipq40xx/base-files/etc/hotplug.d/net/20-smp-tune
-new file mode 100644
-index 0000000000..ab9a90418e
---- /dev/null
-+++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/net/20-smp-tune
-@@ -0,0 +1,67 @@
-+#!/bin/sh
-+[ "$ACTION" = add ] || exit
-+
-+NPROCS="$(grep -c "^processor.*:" /proc/cpuinfo)"
-+[ "$NPROCS" -gt 1 ] || exit
-+
-+PROC_MASK="$(( (1 << $NPROCS) - 1 ))"
-+
-+find_irq_cpu() {
-+	local dev="$1"
-+	local match="$(grep -m 1 "$dev\$" /proc/interrupts)"
-+	local cpu=0
-+
-+	[ -n "$match" ] && {
-+		set -- $match
-+		shift
-+		for cur in `seq 1 $NPROCS`; do
-+			[ "$1" -gt 0 ] && {
-+				cpu=$(($cur - 1))
-+				break
-+			}
-+			shift
-+		done
-+	}
-+
-+	echo "$cpu"
-+}
-+
-+set_hex_val() {
-+	local file="$1"
-+	local val="$2"
-+	val="$(printf %x "$val")"
-+	[ -n "$DEBUG" ] && echo "$file = $val"
-+	echo "$val" > "$file"
-+}
-+
-+default_ps="$(uci get "network.@globals[0].default_ps")"
-+[ -n "$default_ps" -a "$default_ps" != 1 ] && exit 0
-+
-+exec 512>/var/lock/smp_tune.lock
-+flock 512 || exit 1
-+
-+for dev in /sys/class/net/*; do
-+	[ -d "$dev" ] || continue
-+
-+	# ignore virtual interfaces
-+	[ -n "$(ls "${dev}/" | grep '^lower_')" ] && continue
-+	[ -d "${dev}/device" ] || continue
-+
-+	device="$(readlink "${dev}/device")"
-+	device="$(basename "$device")"
-+	irq_cpu="$(find_irq_cpu "$device")"
-+	irq_cpu_mask="$((1 << $irq_cpu))"
-+
-+	for q in ${dev}/queues/rx-*; do
-+		set_hex_val "$q/rps_cpus" "$(($PROC_MASK & ~$irq_cpu_mask))"
-+	done
-+
-+	ntxq="$(ls -d ${dev}/queues/tx-* | wc -l)"
-+
-+	idx=$(($irq_cpu + 1))
-+	for q in ${dev}/queues/tx-*; do
-+		set_hex_val "$q/xps_cpus" "$((1 << $idx))"
-+		let "idx = idx + 1"
-+		[ "$idx" -ge "$NPROCS" ] && idx=0
-+	done
-+done
--- 
-2.25.1
-
diff --git a/patches/ipq40xx/0010-certificates-add-ability-to-persistently-store-certi.patch b/patches/ipq40xx/0010-certificates-add-ability-to-persistently-store-certi.patch
deleted file mode 100644
index 85e006b00..000000000
--- a/patches/ipq40xx/0010-certificates-add-ability-to-persistently-store-certi.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From ee837f028bd7af515d30a8a90cc2b5ee61eecf19 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Sat, 4 Sep 2021 06:04:54 +0200
-Subject: [PATCH 35/43] certificates: add ability to persistently store
- certificates
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- target/linux/ath79/dts/qca9563_tplink_cpe710-v1.dts        | 7 ++++++-
- .../files/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi       | 3 +--
- .../linux/ramips/dts/mt7628an_tplink_8m-split-uboot.dtsi   | 7 ++++++-
- 3 files changed, 13 insertions(+), 4 deletions(-)
-
-diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi
-index 8f971e505c..0f1f083a5b 100644
---- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi
-+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi
-@@ -229,9 +229,8 @@
- 			};
- 
- 			partition@b880000 {
--				label = "syscfg";
-+				label = "certificates";
- 				reg = <0xb880000 0x4680000>;
--				read-only;
- 			};
- 		};
- 	};
--- 
-2.25.1
-
diff --git a/patches/ipq40xx/0011-ipq4018-add-EdgeCore-SPW2AC1200-support-lan.patch b/patches/ipq40xx/0011-ipq4018-add-EdgeCore-SPW2AC1200-support-lan.patch
deleted file mode 100644
index 90514c02b..000000000
--- a/patches/ipq40xx/0011-ipq4018-add-EdgeCore-SPW2AC1200-support-lan.patch
+++ /dev/null
@@ -1,148 +0,0 @@
-From a0eb587ea9e4d905e1796c4f0d64fff9cd8a88f3 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Thu, 14 Oct 2021 15:13:56 +0200
-Subject: [PATCH] spwlanpoe
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/boot/uboot-envtools/files/ipq40xx           |  1 +
- target/linux/ipq40xx/base-files/etc/board.d/01_leds |  1 +
- .../linux/ipq40xx/base-files/etc/board.d/02_network |  1 +
- .../etc/hotplug.d/firmware/11-ath10k-caldata        |  2 ++
- .../ipq40xx/base-files/lib/upgrade/platform.sh      |  3 ++-
- .../boot/dts/qcom-ipq4018-spw2ac1200-lan-poe.dts    |  6 ++++++
- target/linux/ipq40xx/image/generic.mk               | 13 +++++++++++++
- .../patches-5.4/901-arm-boot-add-dts-files.patch    |  3 ++-
- 8 files changed, 28 insertions(+), 2 deletions(-)
- create mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-spw2ac1200-lan-poe.dts
-
-diff --git a/package/boot/uboot-envtools/files/ipq40xx b/package/boot/uboot-envtools/files/ipq40xx
-index fd7ad69eff..c51b40ab12 100644
---- a/package/boot/uboot-envtools/files/ipq40xx
-+++ b/package/boot/uboot-envtools/files/ipq40xx
-@@ -35,6 +35,7 @@ alfa-network,ap120c-ac |\
- devolo,magic-2-wifi-next |\
- edgecore,ecw5211 |\
- edgecore,spw2ac1200 |\
-+edgecore,spw2ac1200-lan-poe |\
- glinet,gl-ap1300 |\
- glinet,gl-b1300 |\
- luma,wrtq-329acn |\
-diff --git a/target/linux/ipq40xx/base-files/etc/board.d/01_leds b/target/linux/ipq40xx/base-files/etc/board.d/01_leds
-index d944d72184..5476dd5df6 100755
---- a/target/linux/ipq40xx/base-files/etc/board.d/01_leds
-+++ b/target/linux/ipq40xx/base-files/etc/board.d/01_leds
-@@ -72,6 +72,7 @@ qxwlan,e2600ac-c2)
- 	;;
- edgecore,ecw5211 |\
- edgecore,spw2ac1200 |\
-+edgecore,spw2ac1200-lan-poe |\
- cig,wf610d |\
- zyxel,nbg6617 |\
- zyxel,wre6606)
-diff --git a/target/linux/ipq40xx/base-files/etc/board.d/02_network b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-index e4b009bf93..f533c39179 100755
---- a/target/linux/ipq40xx/base-files/etc/board.d/02_network
-+++ b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-@@ -15,6 +15,7 @@ ipq40xx_setup_interfaces()
- 	8dev,habanero-dvk|\
- 	8dev,jalapeno|\
- 	alfa-network,ap120c-ac|\
-+	edgecore,spw2ac1200-lan-poe |\
- 	engenius,emr3500|\
- 	engenius,ens620ext|\
- 	luma,wrtq-329acn|\
-diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-index 97dd1b4039..e36821a596 100644
---- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-+++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-@@ -105,6 +105,7 @@ case "$FIRMWARE" in
- 	compex,wpj428 |\
- 	edgecore,ecw5211 |\
- 	edgecore,spw2ac1200 |\
-+	edgecore,spw2ac1200-lan-poe |\
- 	edgecore,oap100 |\
- 	engenius,eap1300 |\
- 	engenius,eap2200 |\
-@@ -226,6 +227,7 @@ case "$FIRMWARE" in
- 	compex,wpj428 |\
- 	edgecore,ecw5211 |\
- 	edgecore,spw2ac1200 |\
-+	edgecore,spw2ac1200-lan-poe |\
- 	edgecore,oap100 |\
- 	engenius,eap1300 |\
- 	engenius,eap2200 |\
-diff --git a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-index 806b3edb66..d44a57c62a 100644
---- a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-+++ b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-@@ -90,7 +90,8 @@ platform_do_upgrade() {
- 		fi
- 		nand_do_upgrade "$1"
- 		;;
--	edgecore,spw2ac1200)
-+	edgecore,spw2ac1200|\
-+	edgecore,spw2ac1200-lan-poe)
- 		CI_UBIPART="$(awk -F 'ubi.mtd=' '{printf $2}' /proc/cmdline | sed -e 's/ .*$//')"
- 		nand_do_upgrade "$1"
- 		;;
-diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-spw2ac1200-lan-poe.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-spw2ac1200-lan-poe.dts
-new file mode 100644
-index 0000000000..1c2a2a8621
---- /dev/null
-+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-spw2ac1200-lan-poe.dts
-@@ -0,0 +1,6 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+
-+#include "qcom-ipq4018-spw2ac1200.dts"
-+/ {
-+	compatible = "edgecore,spw2ac1200-lan-poe";
-+};
-diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk
-index ae1e2e49cf..7e6118e61c 100644
---- a/target/linux/ipq40xx/image/generic.mk
-+++ b/target/linux/ipq40xx/image/generic.mk
-@@ -387,6 +387,19 @@ define Device/edgecore_spw2ac1200
- endef
- TARGET_DEVICES += edgecore_spw2ac1200
- 
-+define Device/edgecore_spw2ac1200-lan-poe
-+	$(call Device/FitImage)
-+	$(call Device/UbiFit)
-+	DEVICE_VENDOR := Edgecore
-+	DEVICE_MODEL := SPW2AC1200
-+	SOC := qcom-ipq4018
-+	BLOCKSIZE := 128k
-+	PAGESIZE := 2048
-+	DEVICE_DTS_CONFIG := config@ap.dk01.1-c2
-+	DEVICE_PACKAGES := kmod-tpm-i2c-atmel kmod-usb-acm uboot-envtools kmod-usb-net kmod-usb-net-cdc-qmi uqmi
-+endef
-+TARGET_DEVICES += edgecore_spw2ac1200-lan-poe
-+
- define Device/edgecore_oap100
- 	$(call Device/FitImage)
- 	$(call Device/UbiFit)
-diff --git a/target/linux/ipq40xx/patches-5.4/901-arm-boot-add-dts-files.patch b/target/linux/ipq40xx/patches-5.4/901-arm-boot-add-dts-files.patch
-index 826e17b0e9..c4ecf62313 100644
---- a/target/linux/ipq40xx/patches-5.4/901-arm-boot-add-dts-files.patch
-+++ b/target/linux/ipq40xx/patches-5.4/901-arm-boot-add-dts-files.patch
-@@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
- 
- --- a/arch/arm/boot/dts/Makefile
- +++ b/arch/arm/boot/dts/Makefile
--@@ -837,11 +837,63 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-+@@ -837,11 +837,64 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-  	qcom-apq8074-dragonboard.dtb \
-  	qcom-apq8084-ifc6540.dtb \
-  	qcom-apq8084-mtp.dtb \
-@@ -23,6 +23,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
- +	qcom-ipq4018-eap1300.dtb \
- +	qcom-ipq4018-ecw5211.dtb \
- +	qcom-ipq4018-spw2ac1200.dtb \
-++	qcom-ipq4018-spw2ac1200-lan-poe.dtb \
- +	qcom-ipq4018-emd1.dtb \
- +	qcom-ipq4018-emr3500.dtb \
- +	qcom-ipq4018-ens620ext.dtb \
--- 
-2.25.1
-
diff --git a/patches/ipq40xx/0012-Revert-ipq40xx-ar40xx-reset-port-status-register.patch b/patches/ipq40xx/0012-Revert-ipq40xx-ar40xx-reset-port-status-register.patch
deleted file mode 100644
index c501879f3..000000000
--- a/patches/ipq40xx/0012-Revert-ipq40xx-ar40xx-reset-port-status-register.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From d8d342c6d0c4076b509faf1ae1a87df24814abe0 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Wed, 23 Feb 2022 07:44:56 +0100
-Subject: [PATCH] Revert "ipq40xx: ar40xx: reset port status register"
-
-This reverts commit 88151b8303f29f18e8b037076628fd82eda0978a.
-
-This actually causes several boards to have bad eth connectivity
-after reboot.
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- target/linux/ipq40xx/files/drivers/net/phy/ar40xx.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/target/linux/ipq40xx/files/drivers/net/phy/ar40xx.c b/target/linux/ipq40xx/files/drivers/net/phy/ar40xx.c
-index 8b3ae53bd9..9758f013f0 100644
---- a/target/linux/ipq40xx/files/drivers/net/phy/ar40xx.c
-+++ b/target/linux/ipq40xx/files/drivers/net/phy/ar40xx.c
-@@ -1198,7 +1198,8 @@ ar40xx_init_port(struct ar40xx_priv *priv, int port)
- {
- 	u32 t;
- 
--	ar40xx_write(priv, AR40XX_REG_PORT_STATUS(port), 0);
-+	ar40xx_rmw(priv, AR40XX_REG_PORT_STATUS(port),
-+			AR40XX_PORT_AUTO_LINK_EN, 0);
- 
- 	/* CPU port is setting headers to limit output ports */
- 	if (port == 0)
--- 
-2.25.1
-
diff --git a/patches/ipq40xx/0013-ipq40xx-disable-dualboot-on-ecw5211.patch b/patches/ipq40xx/0013-ipq40xx-disable-dualboot-on-ecw5211.patch
deleted file mode 100644
index 4a25ab869..000000000
--- a/patches/ipq40xx/0013-ipq40xx-disable-dualboot-on-ecw5211.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 9ff18b1e8b9417c50566f469d8b3f5f36bef746a Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Fri, 11 Mar 2022 16:13:41 +0100
-Subject: [PATCH] ipq40xx: disable dualboot on ecw5211
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- target/linux/ipq40xx/base-files/etc/init.d/bootcount | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/target/linux/ipq40xx/base-files/etc/init.d/bootcount b/target/linux/ipq40xx/base-files/etc/init.d/bootcount
-index d2a4abcadd..36b5d56d0c 100755
---- a/target/linux/ipq40xx/base-files/etc/init.d/bootcount
-+++ b/target/linux/ipq40xx/base-files/etc/init.d/bootcount
-@@ -13,5 +13,13 @@ boot() {
- 	linksys,mr8300)
- 		mtd resetbc s_env || true
- 		;;
-+	edgecore,spw2ac1200|\
-+	edgecore,spw2ac1200-lan-poe|\
-+	edgecore,ecw5211)
-+		avail=$(fw_printenv -n upgrade_available)
-+		[ ${avail} -eq 0 ] || {
-+			fw_setenv bootcount 0
-+			fw_setenv upgrade_available 0
-+		}
- 	esac
- }
--- 
-2.25.1
-
diff --git a/patches/ipq40xx/0014-ipq40xx-add-Indio-UM-325AC-support.patch b/patches/ipq40xx/0014-ipq40xx-add-Indio-UM-325AC-support.patch
deleted file mode 100644
index b58645e56..000000000
--- a/patches/ipq40xx/0014-ipq40xx-add-Indio-UM-325AC-support.patch
+++ /dev/null
@@ -1,377 +0,0 @@
-From 77c7dfe84d6a89a237e34ce24b8fae63a01b6be3 Mon Sep 17 00:00:00 2001
-From: Sohail Ahmad <sohail@indionetworks.com>
-Date: Tue, 22 Mar 2022 08:02:50 +0100
-Subject: [PATCH] ipq40xx: add Support for Indio's UM-325AC AP
-
-Changes made in OpenWrt supported targets to Include Indio's UM-325AC AP which is an indoor WiFi5 AP based on ipq4019 chipset.
-
-Signed-off-by: Sohail Ahmad <sohail@indionetworks.com>
----
- .../ipq40xx/base-files/etc/board.d/02_network |   4 +
- .../etc/hotplug.d/firmware/11-ath10k-caldata  |   6 +
- .../arm/boot/dts/qcom-ipq4019-um-325ac.dts    |  94 ++++++++++
- .../arm/boot/dts/qcom-ipq4019-um-325ac.dtsi   | 168 ++++++++++++++++++
- target/linux/ipq40xx/image/generic.mk         |  14 ++
- .../911-dts-ipq4019-indio-um-325ac.patch      |  13 ++
- 6 files changed, 299 insertions(+)
- create mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-325ac.dts
- create mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-325ac.dtsi
- create mode 100644 target/linux/ipq40xx/patches-5.4/911-dts-ipq4019-indio-um-325ac.patch
-
-diff --git a/target/linux/ipq40xx/base-files/etc/board.d/02_network b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-index f533c39179..f875719400 100755
---- a/target/linux/ipq40xx/base-files/etc/board.d/02_network
-+++ b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-@@ -123,6 +123,10 @@ ipq40xx_setup_interfaces()
- 		ucidef_add_switch "switch0" \
- 			"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
- 		;;
-+	um-325ac)
-+		ucidef_set_interface_wan "eth0"
-+		ucidef_set_interface_lan "eth1"
-+		;;
- 	*)
- 		echo "Unsupported hardware. Network interfaces not initialized"
- 		;;
-diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-index 99a99801ef..3a22a6faab 100644
---- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-+++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-@@ -172,6 +172,9 @@ case "$FIRMWARE" in
- 		caldata_extract "0:ART" 4096 12064
- 		ath10k_patch_mac $(mtd_get_mac_ascii 0:ART WLAN0_BASEMAC)
- 		;;
-+	um-325ac)
-+		caldata_extract "ART" 0x1000 0x2f20
-+		;;
- 	esac
- 	;;
- "ath10k/pre-cal-ahb-a800000.wifi.bin")
-@@ -293,6 +296,9 @@ case "$FIRMWARE" in
- 		caldata_extract "0:ART" 20480 12064
- 		ath10k_patch_mac $(mtd_get_mac_ascii 0:ART WLAN1_BASEMAC)
- 		;;
-+	um-325ac)
-+		caldata_extract "ART" 0x5000 0x2f20
-+		;;
- 	esac
- 	;;
- *)
-diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-325ac.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-325ac.dts
-new file mode 100644
-index 0000000000..0ab70a68c3
---- /dev/null
-+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-325ac.dts
-@@ -0,0 +1,94 @@
-+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
-+ *
-+ * Permission to use, copy, modify, and/or distribute this software for any
-+ * purpose with or without fee is hereby granted, provided that the above
-+ * copyright notice and this permission notice appear in all copies.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+ *
-+ */
-+
-+#include "qcom-ipq4019-um-325ac.dtsi"
-+
-+/ {
-+	model = "Indio Networks UM-325AC";
-+	compatible = "um-325ac";
-+
-+	memory {
-+		device_type = "memory";
-+		reg = <0x80000000 0x10000000>;
-+	};
-+};
-+
-+&blsp1_spi1 {
-+	mx25l25635f@0 {
-+		compatible = "mx25l25635f", "jedec,spi-nor";
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		reg = <0>;
-+		spi-max-frequency = <24000000>;
-+
-+		SBL1@0 {
-+			label = "SBL1";
-+			reg = <0x0 0x40000>;
-+			read-only;
-+		};
-+		MIBIB@40000 {
-+			label = "MIBIB";
-+			reg = <0x40000 0x20000>;
-+			read-only;
-+		};
-+		QSEE@60000 {
-+			label = "QSEE";
-+			reg = <0x60000 0x60000>;
-+			read-only;
-+		};
-+		CDT@c0000 {
-+			label = "CDT";
-+			reg = <0xc0000 0x10000>;
-+			read-only;
-+		};
-+		DDRPARAMS@d0000 {
-+			label = "DDRPARAMS";
-+			reg = <0xd0000 0x10000>;
-+			read-only;
-+		};
-+		APPSBLENV@e0000 {
-+			label = "APPSBLENV";
-+			reg = <0xe0000 0x10000>;
-+			read-only;
-+		};
-+		APPSBL@f0000 {
-+			label = "APPSBL";
-+			reg = <0xf0000 0x80000>;
-+			read-only;
-+		};
-+		ART@170000 {
-+			label = "ART";
-+			reg = <0x170000 0x10000>;
-+			read-only;
-+		};
-+		kernel@180000 {
-+			label = "kernel";
-+			reg = <0x180000 0x400000>;
-+		};
-+		rootfs@580000 {
-+			label = "rootfs";
-+			reg = <0x580000 0x15F0000>;
-+		};
-+		certificates@1b80000 {
-+			label = "certificates";
-+			reg = <0x1b80000 0x10000>;
-+		};
-+		firmware@180000 {
-+			label = "firmware";
-+			reg = <0x180000 0x1a00000>;
-+		};
-+	};
-+};
-diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-325ac.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-325ac.dtsi
-new file mode 100644
-index 0000000000..6fccf0d1d8
---- /dev/null
-+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-325ac.dtsi
-@@ -0,0 +1,168 @@
-+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
-+ *
-+ * Permission to use, copy, modify, and/or distribute this software for any
-+ * purpose with or without fee is hereby granted, provided that the above
-+ * copyright notice and this permission notice appear in all copies.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+ *
-+ */
-+
-+#include "qcom-ipq4019.dtsi"
-+#include <dt-bindings/soc/qcom,tcsr.h>
-+
-+/ {
-+	model = "Indio Networks UM-325AC";
-+	compatible = "um-325ac";
-+
-+	aliases {
-+		serial0 = &blsp1_uart1;
-+	};
-+
-+	chosen {
-+		stdout-path = "serial0:115200n8";
-+	};
-+
-+	soc {
-+		tcsr@194b000 {
-+			/* select hostmode */
-+			compatible = "qcom,tcsr";
-+			reg = <0x194b000 0x100>;
-+			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
-+			status = "okay";
-+		};
-+
-+		ess_tcsr@1953000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1953000 0x1000>;
-+			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
-+		};
-+
-+		tcsr@1949000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1949000 0x100>;
-+			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
-+		};
-+
-+		tcsr@1957000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1957000 0x100>;
-+			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
-+		};
-+
-+		rng@22000 {
-+			status = "ok";
-+		};
-+
-+		pinctrl@1000000 {
-+			serial_pins: serial_pinmux {
-+				mux {
-+					pins = "gpio60", "gpio61";
-+					function = "blsp_uart0";
-+					bias-disable;
-+				};
-+			};
-+
-+			spi_0_pins: spi_0_pinmux {
-+				pinmux {
-+					function = "blsp_spi0";
-+					pins = "gpio55", "gpio56", "gpio57";
-+				};
-+				pinmux_cs {
-+					function = "gpio";
-+					pins = "gpio54";
-+				};
-+				pinconf {
-+					pins = "gpio55", "gpio56", "gpio57";
-+					drive-strength = <12>;
-+					bias-disable;
-+				};
-+				pinconf_cs {
-+					pins = "gpio54";
-+					drive-strength = <2>;
-+					bias-disable;
-+					output-high;
-+				};
-+			};
-+		};
-+
-+		blsp_dma: dma@7884000 {
-+			status = "ok";
-+		};
-+
-+		spi@78b5000 {
-+			pinctrl-0 = <&spi_0_pins>;
-+			pinctrl-names = "default";
-+			status = "ok";
-+			cs-gpios = <&tlmm 54 0>;
-+		};
-+
-+		serial@78af000 {
-+			pinctrl-0 = <&serial_pins>;
-+			pinctrl-names = "default";
-+			status = "ok";
-+		};
-+
-+		cryptobam: dma@8e04000 {
-+			status = "ok";
-+		};
-+
-+		crypto@8e3a000 {
-+			status = "ok";
-+		};
-+
-+		watchdog@b017000 {
-+			status = "ok";
-+		};
-+
-+		wifi@a000000 {
-+			status = "ok";
-+		};
-+
-+		wifi@a800000 {
-+			status = "ok";
-+		};
-+
-+		mdio@90000 {
-+			status = "okay";
-+		};
-+
-+		ess-switch@c000000 {
-+			status = "okay";
-+		};
-+
-+		ess-psgmii@98000 {
-+			status = "okay";
-+		};
-+
-+		edma@c080000 {
-+			status = "okay";
-+		};
-+
-+		usb3_ss_phy: ssphy@9a000 {
-+			status = "okay";
-+		};
-+
-+		usb3_hs_phy: hsphy@a6000 {
-+			status = "okay";
-+		};
-+
-+		usb3: usb3@8af8800 {
-+			status = "okay";
-+		};
-+
-+		usb2_hs_phy: hsphy@a8000 {
-+			status = "okay";
-+		};
-+
-+		usb2: usb2@60f8800 {
-+			status = "okay";
-+		};
-+	};
-+};
-diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk
-index fffd8fdd66..5c8f51ad98 100644
---- a/target/linux/ipq40xx/image/generic.mk
-+++ b/target/linux/ipq40xx/image/generic.mk
-@@ -890,3 +890,17 @@ define Device/hfcl_ion4
- 	DEVICE_PACKAGES := uboot-envtools
- endef
- TARGET_DEVICES += hfcl_ion4
-+
-+define Device/um-325ac
-+	DEVICE_VENDOR := Indio Networks
-+	DEVICE_MODEL := UM-325AC
-+	BOARD_NAME := um-325ac
-+	SOC := qcom-ipq4019
-+	DEVICE_DTS := qcom-ipq4019-um-325ac
-+	KERNEL_INSTALL := 1
-+	KERNEL_SIZE := 4096k
-+	IMAGE_SIZE := 26624k
-+	$(call Device/FitImage)
-+	IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | append-metadata
-+endef
-+TARGET_DEVICES += um-325ac
-diff --git a/target/linux/ipq40xx/patches-5.4/911-dts-ipq4019-indio-um-325ac.patch b/target/linux/ipq40xx/patches-5.4/911-dts-ipq4019-indio-um-325ac.patch
-new file mode 100644
-index 0000000000..5c591e1a47
---- /dev/null
-+++ b/target/linux/ipq40xx/patches-5.4/911-dts-ipq4019-indio-um-325ac.patch
-@@ -0,0 +1,13 @@
-+diff -Nurb a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-+--- a/arch/arm/boot/dts/Makefile	2022-03-21 14:59:54.834759752 +0000
-++++ b/arch/arm/boot/dts/Makefile	2022-03-21 15:01:21.535371530 +0000
-+@@ -906,7 +906,8 @@
-+ 	qcom-msm8974-sony-xperia-amami.dtb \
-+ 	qcom-msm8974-sony-xperia-castor.dtb \
-+ 	qcom-msm8974-sony-xperia-honami.dtb \
-+-	qcom-mdm9615-wp8548-mangoh-green.dtb
-++	qcom-mdm9615-wp8548-mangoh-green.dtb \
-++	qcom-ipq4019-um-325ac.dtb
-+ dtb-$(CONFIG_ARCH_RDA) += \
-+ 	rda8810pl-orangepi-2g-iot.dtb \
-+ 	rda8810pl-orangepi-i96.dtb
--- 
-2.25.1
-
diff --git a/patches/ipq40xx/0015-ipq40xx-add-support-for-udaya-a5-id2.patch b/patches/ipq40xx/0015-ipq40xx-add-support-for-udaya-a5-id2.patch
deleted file mode 100644
index 2478de64e..000000000
--- a/patches/ipq40xx/0015-ipq40xx-add-support-for-udaya-a5-id2.patch
+++ /dev/null
@@ -1,1052 +0,0 @@
-From 0ac463ea1512a9db9ec8fefeff9e9663dd0afa82 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Thu, 24 Mar 2022 12:43:36 +0100
-Subject: [PATCH] ipq40xx: add support for udaya a5-id2
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/firmware/ipq-wifi/Makefile            |   2 +
- .../ipq-wifi/board-udaya-a5-id2.qca4019       | Bin 0 -> 607304 bytes
- package/network/services/umdns/Makefile       |   2 +-
- .../ipq40xx/base-files/etc/board.d/02_network |   1 +
- .../etc/hotplug.d/firmware/11-ath10k-caldata  |   2 +
- .../boot/dts/qcom-ipq4018-udaya-a5-id2.dts    | 114 ++++++++++++++++++
- target/linux/ipq40xx/image/generic.mk         |  14 +++
- .../ipq40xx/patches-5.4/999-hfcl_ion.patch    |  16 ++-
- 8 files changed, 146 insertions(+), 5 deletions(-)
- create mode 100644 package/firmware/ipq-wifi/board-udaya-a5-id2.qca4019
- create mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-udaya-a5-id2.dts
-
-diff --git a/package/firmware/ipq-wifi/Makefile b/package/firmware/ipq-wifi/Makefile
-index a400ac9470..20d08e981b 100644
---- a/package/firmware/ipq-wifi/Makefile
-+++ b/package/firmware/ipq-wifi/Makefile
-@@ -54,6 +54,7 @@ ALLWIFIBOARDS:= \
- 	cig_wf610d \
- 	wallys_dr40x9 \
- 	tp-link_ec420-g1 \
-+	udaya-a5-id2 \
- 	hfcl_ion4
- 
- ALLWIFIPACKAGES:=$(foreach BOARD,$(ALLWIFIBOARDS),ipq-wifi-$(BOARD))
-@@ -145,5 +146,6 @@ $(eval $(call generate-ipq-wifi-package,cig_wf610d,CIG WF_610D))
- $(eval $(call generate-ipq-wifi-package,tp-link_ec420-g1,tp-link EC420-G1))
- $(eval $(call generate-ipq-wifi-package,wallys_dr40x9,Wallys DR40X9))
- $(eval $(call generate-ipq-wifi-package,hfcl_ion4,HFCL ION4))
-+$(eval $(call generate-ipq-wifi-package,udaya-a5-id2,udaya A5 ID2))
- 
- $(foreach PACKAGE,$(ALLWIFIPACKAGES),$(eval $(call BuildPackage,$(PACKAGE))))
-diff --git a/package/firmware/ipq-wifi/board-udaya-a5-id2.qca4019 b/package/firmware/ipq-wifi/board-udaya-a5-id2.qca4019
-new file mode 100644
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-
-literal 0
-HcmV?d00001
-
-diff --git a/package/network/services/umdns/Makefile b/package/network/services/umdns/Makefile
-index 908758e44b..28114de4ed 100644
---- a/package/network/services/umdns/Makefile
-+++ b/package/network/services/umdns/Makefile
-@@ -14,7 +14,7 @@ PKG_SOURCE_URL=$(PROJECT_GIT)/project/mdnsd.git
- PKG_SOURCE_PROTO:=git
- PKG_SOURCE_DATE:=2021-06-30
- PKG_SOURCE_VERSION:=4a8747193ab2b8f2d68a9d26334545e19d89cbe2
--PKG_MIRROR_HASH:=bdddec2793303e4cc1a90cb2ed2241c04fdd0a736b6c0cbbb1fab9de5527566a
-+PKG_MIRROR_HASH:=2ef9c41ac944f6f8e2ed59ecac19e98ae8e67ade2bc4c7c9afe2b0c1f17ae469
- 
- PKG_MAINTAINER:=John Crispin <john@phrozen.org>
- PKG_LICENSE:=LGPL-2.1
-diff --git a/target/linux/ipq40xx/base-files/etc/board.d/02_network b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-index f875719400..76e21801d9 100755
---- a/target/linux/ipq40xx/base-files/etc/board.d/02_network
-+++ b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-@@ -50,6 +50,7 @@ ipq40xx_setup_interfaces()
- 	edgecore,ecw5211|\
- 	edgecore,spw2ac1200 |\
- 	edgecore,oap100|\
-+	udaya,a5-id2|\
- 	openmesh,a42|\
- 	openmesh,a62)
- 		ucidef_set_interfaces_lan_wan "eth1" "eth0"
-diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-index 3a22a6faab..3f32308f3e 100644
---- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-+++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-@@ -63,6 +63,7 @@ case "$FIRMWARE" in
- 	glinet,gl-s1300 |\
- 	linksys,ea6350v3 |\
- 	mobipromo,cm520-79f |\
-+	udaya,a5-id2 |\
- 	qcom,ap-dk01.1-c1)
- 		caldata_extract "ART" 0x1000 0x2f20
- 		;;
-@@ -189,6 +190,7 @@ case "$FIRMWARE" in
- 	glinet,gl-s1300 |\
- 	linksys,ea6350v3 |\
- 	mobipromo,cm520-79f |\
-+	udaya,a5-id2 |\
- 	qcom,ap-dk01.1-c1)
- 		caldata_extract "ART" 0x5000 0x2f20
- 		;;
-diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-udaya-a5-id2.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-udaya-a5-id2.dts
-new file mode 100644
-index 0000000000..ee2d4ac374
---- /dev/null
-+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-udaya-a5-id2.dts
-@@ -0,0 +1,114 @@
-+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
-+ *
-+ * Permission to use, copy, modify, and/or distribute this software for any
-+ * purpose with or without fee is hereby granted, provided that the above
-+ * copyright notice and this permission notice appear in all copies.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+ *
-+ */
-+
-+#include "qcom-ipq4019-ap.dk01.1.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+
-+/ {
-+	model = "udaya A5-ID2";
-+	compatible = "udaya,a5-id2", "qcom,ap-dk01.1-c1", "qcom,ap-dk01.2-c1";
-+
-+	aliases {
-+		led-boot = &led_power;
-+		led-failsafe = &led_power;
-+		led-running = &led_power;
-+		led-upgrade = &led_power;
-+	};
-+
-+	memory {
-+		device_type = "memory";
-+		reg = <0x80000000 0x10000000>;
-+	};
-+
-+	keys {
-+		compatible = "gpio-keys";
-+
-+		reset {
-+			label = "reset";
-+			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_RESTART>;
-+		};
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		led_power: power {
-+			label = "green:power";
-+			gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
-+};
-+
-+&blsp1_spi1 {
-+	mx25l25635f@0 {
-+		compatible = "mx25l25635f", "jedec,spi-nor";
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		reg = <0>;
-+		spi-max-frequency = <24000000>;
-+
-+		SBL1@0 {
-+			label = "SBL1";
-+			reg = <0x0 0x40000>;
-+			read-only;
-+		};
-+		MIBIB@40000 {
-+			label = "MIBIB";
-+			reg = <0x40000 0x20000>;
-+			read-only;
-+		};
-+		QSEE@60000 {
-+			label = "QSEE";
-+			reg = <0x60000 0x60000>;
-+			read-only;
-+		};
-+		CDT@c0000 {
-+			label = "CDT";
-+			reg = <0xc0000 0x10000>;
-+			read-only;
-+		};
-+		DDRPARAMS@d0000 {
-+			label = "DDRPARAMS";
-+			reg = <0xd0000 0x10000>;
-+			read-only;
-+		};
-+		APPSBLENV@e0000 {
-+			label = "APPSBLENV";
-+			reg = <0xe0000 0x10000>;
-+			read-only;
-+		};
-+		APPSBL@f0000 {
-+			label = "APPSBL";
-+			reg = <0xf0000 0x80000>;
-+			read-only;
-+		};
-+		ART@170000 {
-+			label = "ART";
-+			reg = <0x170000 0x10000>;
-+			read-only;
-+		};
-+		firmware@180000 {
-+			label = "firmware";
-+			reg = <0x180000 0x1e70000>;
-+		};
-+		certificates@1ff0000 {
-+			label = "certificates";
-+			reg = <0x1ff0000 0x10000>;
-+		};
-+	};
-+};
-diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk
-index 5c8f51ad98..526f20528f 100644
---- a/target/linux/ipq40xx/image/generic.mk
-+++ b/target/linux/ipq40xx/image/generic.mk
-@@ -904,3 +904,17 @@ define Device/um-325ac
- 	IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | append-metadata
- endef
- TARGET_DEVICES += um-325ac
-+
-+define Device/udaya_a5-id2
-+	DEVICE_VENDOR := udaya
-+	DEVICE_MODEL := A5-ID2
-+	SOC := qcom-ipq4018
-+	DEVICE_DTS := qcom-ipq4018-udaya-a5-id2
-+	KERNEL_INSTALL := 1
-+	KERNEL_SIZE := 4096k
-+	IMAGE_SIZE := 26624k
-+	DEVICE_PACKAGES := ipq-wifi-udaya-a5-id2
-+	$(call Device/FitImage)
-+	IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | append-metadata
-+endef
-+TARGET_DEVICES += udaya_a5-id2
-diff --git a/target/linux/ipq40xx/patches-5.4/999-hfcl_ion.patch b/target/linux/ipq40xx/patches-5.4/999-hfcl_ion.patch
-index 2b45b47521..274071a5cc 100644
---- a/target/linux/ipq40xx/patches-5.4/999-hfcl_ion.patch
-+++ b/target/linux/ipq40xx/patches-5.4/999-hfcl_ion.patch
-@@ -1,8 +1,8 @@
--Index: linux-5.4.111/arch/arm/boot/dts/Makefile
-+Index: linux-5.4.158/arch/arm/boot/dts/Makefile
- ===================================================================
----- linux-5.4.111.orig/arch/arm/boot/dts/Makefile
--+++ linux-5.4.111/arch/arm/boot/dts/Makefile
--@@ -885,6 +885,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-+--- linux-5.4.158.orig/arch/arm/boot/dts/Makefile
-++++ linux-5.4.158/arch/arm/boot/dts/Makefile
-+@@ -888,6 +888,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-  	qcom-ipq4019-wpj419.dtb \
-  	qcom-ipq4019-wtr-m2133hp.dtb \
-  	qcom-ipq4019-tp-link-ec420-g1.dtb \
-@@ -10,3 +10,11 @@ Index: linux-5.4.111/arch/arm/boot/dts/Makefile
-  	qcom-ipq4028-wpj428.dtb \
-  	qcom-ipq4029-ap-303.dtb \
-  	qcom-ipq4029-ap-303h.dtb \
-+@@ -906,6 +907,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-+ 	qcom-msm8974-sony-xperia-castor.dtb \
-+ 	qcom-msm8974-sony-xperia-honami.dtb \
-+ 	qcom-mdm9615-wp8548-mangoh-green.dtb \
-++	qcom-ipq4018-udaya-a5-id2.dtb \
-+ 	qcom-ipq4019-um-325ac.dtb
-+ dtb-$(CONFIG_ARCH_RDA) += \
-+ 	rda8810pl-orangepi-2g-iot.dtb \
--- 
-2.25.1
-
diff --git a/patches/ipq40xx/0016-ipq40xx-add-Indio-UM-550AC-support.patch b/patches/ipq40xx/0016-ipq40xx-add-Indio-UM-550AC-support.patch
deleted file mode 100644
index c99302b76..000000000
--- a/patches/ipq40xx/0016-ipq40xx-add-Indio-UM-550AC-support.patch
+++ /dev/null
@@ -1,375 +0,0 @@
-From bac86b0d264589822e6020702e5eca04f6df40d8 Mon Sep 17 00:00:00 2001
-From: Sohail Ahmad <sohail@indionetworks.com>
-Date: Fri, 6 May 2022 07:47:25 +0200
-Subject: [PATCH] ipq40xx: Support for Indio's Outdoor IP67 WiFi5 AP UM-550AC
-
-Changes made in OpenWrt supported targets to support Indio's UM-550AC AP which is based on IPQ4019 chipset
-
-Signed-off-by: Sohail Ahmad <sohail@indionetworks.com>
----
- .../ipq40xx/base-files/etc/board.d/02_network |   3 +-
- .../etc/hotplug.d/firmware/11-ath10k-caldata  |   6 +-
- .../arm/boot/dts/qcom-ipq4019-um-550ac.dts    |  94 ++++++++++
- .../arm/boot/dts/qcom-ipq4019-um-550ac.dtsi   | 168 ++++++++++++++++++
- target/linux/ipq40xx/image/generic.mk         |  14 ++
- .../ipq40xx/patches-5.4/999-hfcl_ion.patch    |   6 +-
- 6 files changed, 285 insertions(+), 6 deletions(-)
- create mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-550ac.dts
- create mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-550ac.dtsi
-
-diff --git a/target/linux/ipq40xx/base-files/etc/board.d/02_network b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-index 76e21801d9..a02f47f102 100755
---- a/target/linux/ipq40xx/base-files/etc/board.d/02_network
-+++ b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-@@ -124,7 +124,8 @@ ipq40xx_setup_interfaces()
- 		ucidef_add_switch "switch0" \
- 			"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
- 		;;
--	um-325ac)
-+	um-325ac |\
-+	um-550ac) 
- 		ucidef_set_interface_wan "eth0"
- 		ucidef_set_interface_lan "eth1"
- 		;;
-diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-index 3f32308f3e..785d51ed98 100644
---- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-+++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-@@ -173,7 +173,8 @@ case "$FIRMWARE" in
- 		caldata_extract "0:ART" 4096 12064
- 		ath10k_patch_mac $(mtd_get_mac_ascii 0:ART WLAN0_BASEMAC)
- 		;;
--	um-325ac)
-+	um-325ac |\
-+	um-550ac) 
- 		caldata_extract "ART" 0x1000 0x2f20
- 		;;
- 	esac
-@@ -298,7 +299,8 @@ case "$FIRMWARE" in
- 		caldata_extract "0:ART" 20480 12064
- 		ath10k_patch_mac $(mtd_get_mac_ascii 0:ART WLAN1_BASEMAC)
- 		;;
--	um-325ac)
-+	um-325ac |\
-+	um-550ac) 
- 		caldata_extract "ART" 0x5000 0x2f20
- 		;;
- 	esac
-diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-550ac.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-550ac.dts
-new file mode 100644
-index 0000000000..a15df3f916
---- /dev/null
-+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-550ac.dts
-@@ -0,0 +1,94 @@
-+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
-+ *
-+ * Permission to use, copy, modify, and/or distribute this software for any
-+ * purpose with or without fee is hereby granted, provided that the above
-+ * copyright notice and this permission notice appear in all copies.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+ *
-+ */
-+
-+#include "qcom-ipq4019-um-550ac.dtsi"
-+
-+/ {
-+	model = "Indio Networks UM-550AC";
-+	compatible = "um-550ac";
-+
-+	memory {
-+		device_type = "memory";
-+		reg = <0x80000000 0x10000000>;
-+	};
-+};
-+
-+&blsp1_spi1 {
-+	mx25l25635f@0 {
-+		compatible = "mx25l25635f", "jedec,spi-nor";
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		reg = <0>;
-+		spi-max-frequency = <24000000>;
-+
-+		SBL1@0 {
-+			label = "SBL1";
-+			reg = <0x0 0x40000>;
-+			read-only;
-+		};
-+		MIBIB@40000 {
-+			label = "MIBIB";
-+			reg = <0x40000 0x20000>;
-+			read-only;
-+		};
-+		QSEE@60000 {
-+			label = "QSEE";
-+			reg = <0x60000 0x60000>;
-+			read-only;
-+		};
-+		CDT@c0000 {
-+			label = "CDT";
-+			reg = <0xc0000 0x10000>;
-+			read-only;
-+		};
-+		DDRPARAMS@d0000 {
-+			label = "DDRPARAMS";
-+			reg = <0xd0000 0x10000>;
-+			read-only;
-+		};
-+		APPSBLENV@e0000 {
-+			label = "APPSBLENV";
-+			reg = <0xe0000 0x10000>;
-+			read-only;
-+		};
-+		APPSBL@f0000 {
-+			label = "APPSBL";
-+			reg = <0xf0000 0x80000>;
-+			read-only;
-+		};
-+		ART@170000 {
-+			label = "ART";
-+			reg = <0x170000 0x10000>;
-+			read-only;
-+		};
-+		kernel@180000 {
-+			label = "kernel";
-+			reg = <0x180000 0x400000>;
-+		};
-+		rootfs@580000 {
-+			label = "rootfs";
-+			reg = <0x580000 0x15F0000>;
-+		};
-+		certificates@1b80000 {
-+			label = "certificates";
-+			reg = <0x1b80000 0x10000>;
-+		};
-+		firmware@180000 {
-+			label = "firmware";
-+			reg = <0x180000 0x1a00000>;
-+		};
-+	};
-+};
-diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-550ac.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-550ac.dtsi
-new file mode 100644
-index 0000000000..5f4c8a103b
---- /dev/null
-+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-550ac.dtsi
-@@ -0,0 +1,168 @@
-+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
-+ *
-+ * Permission to use, copy, modify, and/or distribute this software for any
-+ * purpose with or without fee is hereby granted, provided that the above
-+ * copyright notice and this permission notice appear in all copies.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+ *
-+ */
-+
-+#include "qcom-ipq4019.dtsi"
-+#include <dt-bindings/soc/qcom,tcsr.h>
-+
-+/ {
-+	model = "Indio Networks UM-550AC";
-+	compatible = "um-550ac";
-+
-+	aliases {
-+		serial0 = &blsp1_uart1;
-+	};
-+
-+	chosen {
-+		stdout-path = "serial0:115200n8";
-+	};
-+
-+	soc {
-+		tcsr@194b000 {
-+			/* select hostmode */
-+			compatible = "qcom,tcsr";
-+			reg = <0x194b000 0x100>;
-+			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
-+			status = "okay";
-+		};
-+
-+		ess_tcsr@1953000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1953000 0x1000>;
-+			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
-+		};
-+
-+		tcsr@1949000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1949000 0x100>;
-+			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
-+		};
-+
-+		tcsr@1957000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1957000 0x100>;
-+			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
-+		};
-+
-+		rng@22000 {
-+			status = "ok";
-+		};
-+
-+		pinctrl@1000000 {
-+			serial_pins: serial_pinmux {
-+				mux {
-+					pins = "gpio60", "gpio61";
-+					function = "blsp_uart0";
-+					bias-disable;
-+				};
-+			};
-+
-+			spi_0_pins: spi_0_pinmux {
-+				pinmux {
-+					function = "blsp_spi0";
-+					pins = "gpio55", "gpio56", "gpio57";
-+				};
-+				pinmux_cs {
-+					function = "gpio";
-+					pins = "gpio54";
-+				};
-+				pinconf {
-+					pins = "gpio55", "gpio56", "gpio57";
-+					drive-strength = <12>;
-+					bias-disable;
-+				};
-+				pinconf_cs {
-+					pins = "gpio54";
-+					drive-strength = <2>;
-+					bias-disable;
-+					output-high;
-+				};
-+			};
-+		};
-+
-+		blsp_dma: dma@7884000 {
-+			status = "ok";
-+		};
-+
-+		spi@78b5000 {
-+			pinctrl-0 = <&spi_0_pins>;
-+			pinctrl-names = "default";
-+			status = "ok";
-+			cs-gpios = <&tlmm 54 0>;
-+		};
-+
-+		serial@78af000 {
-+			pinctrl-0 = <&serial_pins>;
-+			pinctrl-names = "default";
-+			status = "ok";
-+		};
-+
-+		cryptobam: dma@8e04000 {
-+			status = "ok";
-+		};
-+
-+		crypto@8e3a000 {
-+			status = "ok";
-+		};
-+
-+		watchdog@b017000 {
-+			status = "ok";
-+		};
-+
-+		wifi@a000000 {
-+			status = "ok";
-+		};
-+
-+		wifi@a800000 {
-+			status = "ok";
-+		};
-+
-+		mdio@90000 {
-+			status = "okay";
-+		};
-+
-+		ess-switch@c000000 {
-+			status = "okay";
-+		};
-+
-+		ess-psgmii@98000 {
-+			status = "okay";
-+		};
-+
-+		edma@c080000 {
-+			status = "okay";
-+		};
-+
-+		usb3_ss_phy: ssphy@9a000 {
-+			status = "okay";
-+		};
-+
-+		usb3_hs_phy: hsphy@a6000 {
-+			status = "okay";
-+		};
-+
-+		usb3: usb3@8af8800 {
-+			status = "okay";
-+		};
-+
-+		usb2_hs_phy: hsphy@a8000 {
-+			status = "okay";
-+		};
-+
-+		usb2: usb2@60f8800 {
-+			status = "okay";
-+		};
-+	};
-+};
-diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk
-index 526f20528f..7cfd20e9b6 100644
---- a/target/linux/ipq40xx/image/generic.mk
-+++ b/target/linux/ipq40xx/image/generic.mk
-@@ -918,3 +918,17 @@ define Device/udaya_a5-id2
- 	IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | append-metadata
- endef
- TARGET_DEVICES += udaya_a5-id2
-+
-+define Device/um-550ac
-+	DEVICE_VENDOR := Indio Networks
-+	DEVICE_MODEL := UM-550AC
-+	BOARD_NAME := um-550ac
-+	SOC := qcom-ipq4019
-+	DEVICE_DTS := qcom-ipq4019-um-550ac
-+	KERNEL_INSTALL := 1
-+	KERNEL_SIZE := 4096k
-+	IMAGE_SIZE := 26624k
-+	$(call Device/FitImage)
-+	IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | append-metadata
-+endef
-+TARGET_DEVICES += um-550ac
-diff --git a/target/linux/ipq40xx/patches-5.4/999-hfcl_ion.patch b/target/linux/ipq40xx/patches-5.4/999-hfcl_ion.patch
-index 274071a5cc..d7b3de9508 100644
---- a/target/linux/ipq40xx/patches-5.4/999-hfcl_ion.patch
-+++ b/target/linux/ipq40xx/patches-5.4/999-hfcl_ion.patch
-@@ -10,11 +10,11 @@ Index: linux-5.4.158/arch/arm/boot/dts/Makefile
-  	qcom-ipq4028-wpj428.dtb \
-  	qcom-ipq4029-ap-303.dtb \
-  	qcom-ipq4029-ap-303h.dtb \
--@@ -906,6 +907,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-- 	qcom-msm8974-sony-xperia-castor.dtb \
-+@@ -907,6 +908,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-  	qcom-msm8974-sony-xperia-honami.dtb \
-  	qcom-mdm9615-wp8548-mangoh-green.dtb \
-+ 	qcom-ipq4019-um-325ac.dtb \
- +	qcom-ipq4018-udaya-a5-id2.dtb \
-- 	qcom-ipq4019-um-325ac.dtb
-+ 	qcom-ipq4019-um-550ac.dtb
-  dtb-$(CONFIG_ARCH_RDA) += \
-  	rda8810pl-orangepi-2g-iot.dtb \
--- 
-2.25.1
-
diff --git a/patches/ipq40xx/0017-ipq40xx-add-Indio-UM-510AC-V3-support.patch b/patches/ipq40xx/0017-ipq40xx-add-Indio-UM-510AC-V3-support.patch
deleted file mode 100644
index 40fbbdeb7..000000000
--- a/patches/ipq40xx/0017-ipq40xx-add-Indio-UM-510AC-V3-support.patch
+++ /dev/null
@@ -1,409 +0,0 @@
-From 38880b602348676c4643e0a435239a793bbfefab Mon Sep 17 00:00:00 2001
-From: Sohail Ahmad <sohail@indionetworks.com>
-Date: Fri, 6 May 2022 09:05:41 +0200
-Subject: [PATCH] ipq40xx: Support for Indio UM-510AC-V3 AP Model, Outdoor
- WiFi5 AP based on IPQ40XX
-
-Changes made in OpenWrt supported targets to support Indio's UM-510AC-V3 AP which is based on IPQ4019 chipset
-
-Signed-off-by: Sohail Ahmad <sohail@indionetworks.com>
----
- .../ipq40xx/base-files/etc/board.d/02_network |   1 +
- .../etc/hotplug.d/firmware/11-ath10k-caldata  |   2 +
- .../arm/boot/dts/qcom-ipq4019-um-510ac-v3.dts |  94 ++++++++++
- .../boot/dts/qcom-ipq4019-um-510ac-v3.dtsi    | 168 ++++++++++++++++++
- target/linux/ipq40xx/image/generic.mk         |  15 ++
- .../912-dts-ipq4019-indio-um-550ac.patch      |  13 ++
- .../913-dts-ipq4019-indio-um-510ac-v3.patch   |  11 ++
- .../ipq40xx/patches-5.4/999-hfcl_ion.patch    |   4 +-
- 8 files changed, 306 insertions(+), 2 deletions(-)
- create mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-510ac-v3.dts
- create mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-510ac-v3.dtsi
- create mode 100644 target/linux/ipq40xx/patches-5.4/912-dts-ipq4019-indio-um-550ac.patch
- create mode 100644 target/linux/ipq40xx/patches-5.4/913-dts-ipq4019-indio-um-510ac-v3.patch
-
-diff --git a/target/linux/ipq40xx/base-files/etc/board.d/02_network b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-index a02f47f102..abaa6f3e16 100755
---- a/target/linux/ipq40xx/base-files/etc/board.d/02_network
-+++ b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-@@ -125,6 +125,7 @@ ipq40xx_setup_interfaces()
- 			"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
- 		;;
- 	um-325ac |\
-+	um-510ac-v3 |\
- 	um-550ac) 
- 		ucidef_set_interface_wan "eth0"
- 		ucidef_set_interface_lan "eth1"
-diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-index 785d51ed98..4af1d5ea2f 100644
---- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-+++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-@@ -174,6 +174,7 @@ case "$FIRMWARE" in
- 		ath10k_patch_mac $(mtd_get_mac_ascii 0:ART WLAN0_BASEMAC)
- 		;;
- 	um-325ac |\
-+	um-510ac-v3 |\
- 	um-550ac) 
- 		caldata_extract "ART" 0x1000 0x2f20
- 		;;
-@@ -300,6 +301,7 @@ case "$FIRMWARE" in
- 		ath10k_patch_mac $(mtd_get_mac_ascii 0:ART WLAN1_BASEMAC)
- 		;;
- 	um-325ac |\
-+	um-510ac-v3 |\
- 	um-550ac) 
- 		caldata_extract "ART" 0x5000 0x2f20
- 		;;
-diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-510ac-v3.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-510ac-v3.dts
-new file mode 100644
-index 0000000000..e0854189c1
---- /dev/null
-+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-510ac-v3.dts
-@@ -0,0 +1,94 @@
-+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
-+ *
-+ * Permission to use, copy, modify, and/or distribute this software for any
-+ * purpose with or without fee is hereby granted, provided that the above
-+ * copyright notice and this permission notice appear in all copies.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+ *
-+ */
-+
-+#include "qcom-ipq4019-um-510ac-v3.dtsi"
-+
-+/ {
-+	model = "Indio Networks UM-510AC-V3";
-+	compatible = "um-510ac-v3";
-+
-+	memory {
-+		device_type = "memory";
-+		reg = <0x80000000 0x10000000>;
-+	};
-+};
-+
-+&blsp1_spi1 {
-+	mx25l25635f@0 {
-+		compatible = "mx25l25635f", "jedec,spi-nor";
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		reg = <0>;
-+		spi-max-frequency = <24000000>;
-+
-+		SBL1@0 {
-+			label = "SBL1";
-+			reg = <0x0 0x40000>;
-+			read-only;
-+		};
-+		MIBIB@40000 {
-+			label = "MIBIB";
-+			reg = <0x40000 0x20000>;
-+			read-only;
-+		};
-+		QSEE@60000 {
-+			label = "QSEE";
-+			reg = <0x60000 0x60000>;
-+			read-only;
-+		};
-+		CDT@c0000 {
-+			label = "CDT";
-+			reg = <0xc0000 0x10000>;
-+			read-only;
-+		};
-+		DDRPARAMS@d0000 {
-+			label = "DDRPARAMS";
-+			reg = <0xd0000 0x10000>;
-+			read-only;
-+		};
-+		APPSBLENV@e0000 {
-+			label = "APPSBLENV";
-+			reg = <0xe0000 0x10000>;
-+			read-only;
-+		};
-+		APPSBL@f0000 {
-+			label = "APPSBL";
-+			reg = <0xf0000 0x80000>;
-+			read-only;
-+		};
-+		ART@170000 {
-+			label = "ART";
-+			reg = <0x170000 0x10000>;
-+			read-only;
-+		};
-+		kernel@180000 {
-+			label = "kernel";
-+			reg = <0x180000 0x400000>;
-+		};
-+		rootfs@580000 {
-+			label = "rootfs";
-+			reg = <0x580000 0x15F0000>;
-+		};
-+		certificates@1b80000 {
-+			label = "certificates";
-+			reg = <0x1b80000 0x10000>;
-+		};
-+		firmware@180000 {
-+			label = "firmware";
-+			reg = <0x180000 0x1a00000>;
-+		};
-+	};
-+};
-diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-510ac-v3.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-510ac-v3.dtsi
-new file mode 100644
-index 0000000000..a8ad081f03
---- /dev/null
-+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-um-510ac-v3.dtsi
-@@ -0,0 +1,168 @@
-+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
-+ *
-+ * Permission to use, copy, modify, and/or distribute this software for any
-+ * purpose with or without fee is hereby granted, provided that the above
-+ * copyright notice and this permission notice appear in all copies.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+ *
-+ */
-+
-+#include "qcom-ipq4019.dtsi"
-+#include <dt-bindings/soc/qcom,tcsr.h>
-+
-+/ {
-+	model = "Indio Networks UM-510AC-V3";
-+	compatible = "um-510ac-v3";
-+
-+	aliases {
-+		serial0 = &blsp1_uart1;
-+	};
-+
-+	chosen {
-+		stdout-path = "serial0:115200n8";
-+	};
-+
-+	soc {
-+		tcsr@194b000 {
-+			/* select hostmode */
-+			compatible = "qcom,tcsr";
-+			reg = <0x194b000 0x100>;
-+			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
-+			status = "okay";
-+		};
-+
-+		ess_tcsr@1953000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1953000 0x1000>;
-+			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
-+		};
-+
-+		tcsr@1949000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1949000 0x100>;
-+			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
-+		};
-+
-+		tcsr@1957000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1957000 0x100>;
-+			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
-+		};
-+
-+		rng@22000 {
-+			status = "ok";
-+		};
-+
-+		pinctrl@1000000 {
-+			serial_pins: serial_pinmux {
-+				mux {
-+					pins = "gpio60", "gpio61";
-+					function = "blsp_uart0";
-+					bias-disable;
-+				};
-+			};
-+
-+			spi_0_pins: spi_0_pinmux {
-+				pinmux {
-+					function = "blsp_spi0";
-+					pins = "gpio55", "gpio56", "gpio57";
-+				};
-+				pinmux_cs {
-+					function = "gpio";
-+					pins = "gpio54";
-+				};
-+				pinconf {
-+					pins = "gpio55", "gpio56", "gpio57";
-+					drive-strength = <12>;
-+					bias-disable;
-+				};
-+				pinconf_cs {
-+					pins = "gpio54";
-+					drive-strength = <2>;
-+					bias-disable;
-+					output-high;
-+				};
-+			};
-+		};
-+
-+		blsp_dma: dma@7884000 {
-+			status = "ok";
-+		};
-+
-+		spi@78b5000 {
-+			pinctrl-0 = <&spi_0_pins>;
-+			pinctrl-names = "default";
-+			status = "ok";
-+			cs-gpios = <&tlmm 54 0>;
-+		};
-+
-+		serial@78af000 {
-+			pinctrl-0 = <&serial_pins>;
-+			pinctrl-names = "default";
-+			status = "ok";
-+		};
-+
-+		cryptobam: dma@8e04000 {
-+			status = "ok";
-+		};
-+
-+		crypto@8e3a000 {
-+			status = "ok";
-+		};
-+
-+		watchdog@b017000 {
-+			status = "ok";
-+		};
-+
-+		wifi@a000000 {
-+			status = "ok";
-+		};
-+
-+		wifi@a800000 {
-+			status = "ok";
-+		};
-+
-+		mdio@90000 {
-+			status = "okay";
-+		};
-+
-+		ess-switch@c000000 {
-+			status = "okay";
-+		};
-+
-+		ess-psgmii@98000 {
-+			status = "okay";
-+		};
-+
-+		edma@c080000 {
-+			status = "okay";
-+		};
-+
-+		usb3_ss_phy: ssphy@9a000 {
-+			status = "okay";
-+		};
-+
-+		usb3_hs_phy: hsphy@a6000 {
-+			status = "okay";
-+		};
-+
-+		usb3: usb3@8af8800 {
-+			status = "okay";
-+		};
-+
-+		usb2_hs_phy: hsphy@a8000 {
-+			status = "okay";
-+		};
-+
-+		usb2: usb2@60f8800 {
-+			status = "okay";
-+		};
-+	};
-+};
-diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk
-index 7cfd20e9b6..c156cb3415 100644
---- a/target/linux/ipq40xx/image/generic.mk
-+++ b/target/linux/ipq40xx/image/generic.mk
-@@ -932,3 +932,18 @@ define Device/um-550ac
- 	IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | append-metadata
- endef
- TARGET_DEVICES += um-550ac
-+
-+
-+define Device/um-510ac-v3
-+	DEVICE_VENDOR := Indio Networks
-+	DEVICE_MODEL := UM-510AC-V3
-+	BOARD_NAME := um-510ac-v3
-+	SOC := qcom-ipq4019
-+	DEVICE_DTS := qcom-ipq4019-um-510ac-v3
-+	KERNEL_INSTALL := 1
-+	KERNEL_SIZE := 4096k
-+	IMAGE_SIZE := 26624k
-+	$(call Device/FitImage)
-+	IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | append-metadata
-+endef
-+TARGET_DEVICES += um-510ac-v3
-diff --git a/target/linux/ipq40xx/patches-5.4/912-dts-ipq4019-indio-um-550ac.patch b/target/linux/ipq40xx/patches-5.4/912-dts-ipq4019-indio-um-550ac.patch
-new file mode 100644
-index 0000000000..876eb48d0a
---- /dev/null
-+++ b/target/linux/ipq40xx/patches-5.4/912-dts-ipq4019-indio-um-550ac.patch
-@@ -0,0 +1,13 @@
-+diff -Nurb a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-+--- a/arch/arm/boot/dts/Makefile	2022-03-27 09:16:13.544943010 +0000
-++++ b/arch/arm/boot/dts/Makefile	2022-03-27 09:17:15.574098533 +0000
-+@@ -907,7 +907,8 @@
-+ 	qcom-msm8974-sony-xperia-castor.dtb \
-+ 	qcom-msm8974-sony-xperia-honami.dtb \
-+ 	qcom-mdm9615-wp8548-mangoh-green.dtb \
-+-	qcom-ipq4019-um-325ac.dtb
-++	qcom-ipq4019-um-325ac.dtb \
-++	qcom-ipq4019-um-550ac.dtb
-+ dtb-$(CONFIG_ARCH_RDA) += \
-+ 	rda8810pl-orangepi-2g-iot.dtb \
-+ 	rda8810pl-orangepi-i96.dtb
-diff --git a/target/linux/ipq40xx/patches-5.4/913-dts-ipq4019-indio-um-510ac-v3.patch b/target/linux/ipq40xx/patches-5.4/913-dts-ipq4019-indio-um-510ac-v3.patch
-new file mode 100644
-index 0000000000..dd22a709a7
---- /dev/null
-+++ b/target/linux/ipq40xx/patches-5.4/913-dts-ipq4019-indio-um-510ac-v3.patch
-@@ -0,0 +1,11 @@
-+diff -Nurb a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-+--- a/arch/arm/boot/dts/Makefile	2022-03-31 03:03:23.379141391 +0000
-++++ b/arch/arm/boot/dts/Makefile	2022-03-31 03:07:24.671320669 +0000
-+@@ -908,6 +908,7 @@
-+ 	qcom-msm8974-sony-xperia-honami.dtb \
-+ 	qcom-mdm9615-wp8548-mangoh-green.dtb \
-+ 	qcom-ipq4019-um-325ac.dtb \
-++	qcom-ipq4019-um-510ac-v3.dtb \
-+ 	qcom-ipq4019-um-550ac.dtb
-+ dtb-$(CONFIG_ARCH_RDA) += \
-+ 	rda8810pl-orangepi-2g-iot.dtb \
-diff --git a/target/linux/ipq40xx/patches-5.4/999-hfcl_ion.patch b/target/linux/ipq40xx/patches-5.4/999-hfcl_ion.patch
-index d7b3de9508..5100c408b9 100644
---- a/target/linux/ipq40xx/patches-5.4/999-hfcl_ion.patch
-+++ b/target/linux/ipq40xx/patches-5.4/999-hfcl_ion.patch
-@@ -10,10 +10,10 @@ Index: linux-5.4.158/arch/arm/boot/dts/Makefile
-  	qcom-ipq4028-wpj428.dtb \
-  	qcom-ipq4029-ap-303.dtb \
-  	qcom-ipq4029-ap-303h.dtb \
--@@ -907,6 +908,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-- 	qcom-msm8974-sony-xperia-honami.dtb \
-+@@ -908,6 +909,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-  	qcom-mdm9615-wp8548-mangoh-green.dtb \
-  	qcom-ipq4019-um-325ac.dtb \
-+ 	qcom-ipq4019-um-510ac-v3.dtb \
- +	qcom-ipq4018-udaya-a5-id2.dtb \
-  	qcom-ipq4019-um-550ac.dtb
-  dtb-$(CONFIG_ARCH_RDA) += \
--- 
-2.25.1
-
diff --git a/patches/ipq40xx/0019-ipq40xx-support-oap100e.patch b/patches/ipq40xx/0019-ipq40xx-support-oap100e.patch
deleted file mode 100644
index 33ef1632b..000000000
--- a/patches/ipq40xx/0019-ipq40xx-support-oap100e.patch
+++ /dev/null
@@ -1,477 +0,0 @@
-From 01a4ef29f885392972ad52ef910ab734ea7b58ce Mon Sep 17 00:00:00 2001
-From: Tanya Singh <tanya_singh@accton.com>
-Date: Wed, 16 Nov 2022 16:49:19 +0800
-Subject: [PATCH] ipq40xx: Support OAP100e
-
-Signed-off-by: Tanya Singh <tanya_singh@accton.com>
----
- .../ipq40xx/base-files/etc/board.d/01_leds    	|   3 +-
- .../ipq40xx/base-files/etc/board.d/02_network 	|   1 +
- .../etc/hotplug.d/firmware/11-ath10k-caldata  	|   2 +
- .../base-files/lib/upgrade/platform.sh        	|   1 +
- .../arm/boot/dts/qcom-ipq4019-oap100e.dts     	| 351 ++++++++++++++++++
- target/linux/ipq40xx/image/generic.mk         	|  14 +
- .../9991-arm-boot-add-oap100e-dts-files.patch 	|  10 +
- 7 files changed, 381 insertions(+), 1 deletion(-)
- create mode 100644 target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-oap100e.dts
- create mode 100644 target/linux/ipq40xx/patches-5.4/9991-arm-boot-add-oap100e-dts-files.patch
-
-diff --git a/target/linux/ipq40xx/base-files/etc/board.d/01_leds b/target/linux/ipq40xx/base-files/etc/board.d/01_leds
-index 5476dd5df6..e16e916d31 100755
---- a/target/linux/ipq40xx/base-files/etc/board.d/01_leds
-+++ b/target/linux/ipq40xx/base-files/etc/board.d/01_leds
-@@ -26,7 +26,8 @@ avm,fritzbox-7530 |\
- glinet,gl-b1300)
- 	ucidef_set_led_wlan "wlan" "WLAN" "green:wlan" "phy0tpt"
- 	;;
--edgecore,oap100)
-+edgecore,oap100 |\
-+edgecore,oap100e)
- 	ucidef_set_led_wlan "wlan2g" "WLAN2G" "blue:wlan2g" "phy0tpt"
- 	ucidef_set_led_wlan "wlan5g" "WLAN5G" "blue:wlan5g" "phy1tpt"
- 	;;
-diff --git a/target/linux/ipq40xx/base-files/etc/board.d/02_network b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-index abaa6f3e16..efaf347b08 100755
---- a/target/linux/ipq40xx/base-files/etc/board.d/02_network
-+++ b/target/linux/ipq40xx/base-files/etc/board.d/02_network
-@@ -50,6 +50,7 @@ ipq40xx_setup_interfaces()
- 	edgecore,ecw5211|\
- 	edgecore,spw2ac1200 |\
- 	edgecore,oap100|\
-+	edgecore,oap100e|\
- 	udaya,a5-id2|\
- 	openmesh,a42|\
- 	openmesh,a62)
-diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-index 4af1d5ea2f..cc4406e7e2 100644
---- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-+++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-@@ -108,6 +108,7 @@ case "$FIRMWARE" in
- 	edgecore,spw2ac1200 |\
- 	edgecore,spw2ac1200-lan-poe |\
- 	edgecore,oap100 |\
-+	edgecore,oap100e |\
- 	engenius,eap1300 |\
- 	engenius,eap2200 |\
- 	luma,wrtq-329acn|\
-@@ -237,6 +238,7 @@ case "$FIRMWARE" in
- 	edgecore,spw2ac1200 |\
- 	edgecore,spw2ac1200-lan-poe |\
- 	edgecore,oap100 |\
-+	edgecore,oap100e |\
- 	engenius,eap1300 |\
- 	engenius,eap2200 |\
- 	luma,wrtq-329acn|\
-diff --git a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-index 6f2bff527c..fa6a16cf4f 100644
---- a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-+++ b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
-@@ -67,6 +67,7 @@ platform_do_upgrade() {
- 	buffalo,wtr-m2133hp |\
- 	cilab,meshpoint-one |\
- 	edgecore,oap100 |\
-+	edgecore,oap100e |\
- 	engenius,eap2200 |\
- 	glinet,gl-ap1300 |\
- 	luma,wrtq-329acn |\
-diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-oap100e.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-oap100e.dts
-new file mode 100644
-index 0000000000..d3891ddb47
---- /dev/null
-+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-oap100e.dts
-@@ -0,0 +1,351 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+
-+#include "qcom-ipq4019.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+#include <dt-bindings/soc/qcom,tcsr.h>
-+
-+/ {
-+	model = "EdgeCore OAP-100e";
-+	compatible = "edgecore,oap100e";
-+
-+	aliases {
-+		led-boot = &led_system;
-+		led-failsafe = &led_system;
-+		led-running = &led_system;
-+		led-upgrade = &led_system;
-+	};
-+
-+	chosen {
-+		bootargs-append = " root=/dev/ubiblock0_1";
-+	};
-+
-+	soc {
-+		mdio@90000 {
-+			status = "okay";
-+			pinctrl-0 = <&mdio_pins>;
-+			pinctrl-names = "default";
-+		};
-+
-+		ess-psgmii@98000 {
-+			status = "okay";
-+		};
-+
-+		tcsr@1949000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1949000 0x100>;
-+			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
-+		};
-+
-+		ess_tcsr@1953000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1953000 0x1000>;
-+			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
-+		};
-+
-+		tcsr@1957000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1957000 0x100>;
-+			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
-+		};
-+
-+		tcsr@194b000 {
-+			/* select hostmode */
-+			compatible = "qcom,tcsr";
-+			reg = <0x194b000 0x100>;
-+			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
-+			status = "okay";
-+		};
-+
-+		usb2@60f8800 {
-+			status = "okay";
-+
-+			dwc3@6000000 {
-+				#address-cells = <1>;
-+				#size-cells = <0>;
-+
-+				usb2_port1: port@1 {
-+					reg = <1>;
-+					#trigger-source-cells = <0>;
-+				};
-+			};
-+		};
-+
-+		usb3@8af8800 {
-+			status = "okay";
-+
-+			dwc3@8a00000 {
-+				#address-cells = <1>;
-+				#size-cells = <0>;
-+
-+				usb3_port1: port@1 {
-+					reg = <1>;
-+					#trigger-source-cells = <0>;
-+				};
-+
-+				usb3_port2: port@2 {
-+					reg = <2>;
-+					#trigger-source-cells = <0>;
-+				};
-+			};
-+		};
-+
-+		crypto@8e3a000 {
-+			status = "okay";
-+		};
-+
-+		watchdog@b017000 {
-+			status = "okay";
-+		};
-+
-+		ess-switch@c000000 {
-+			status = "okay";
-+			switch_mac_mode = <0x0>; /* mac mode for RGMII RMII */
-+			switch_initvlas = <0x0007c 0x54>; /* port0 status */
-+			switch_lan_bmp = <0x10>;
-+		};
-+
-+		edma@c080000 {
-+			status = "okay";
-+		};
-+	};
-+
-+	key {
-+		compatible = "gpio-keys";
-+
-+		button@1 {
-+			label = "reset";
-+			linux,code = <KEY_RESTART>;
-+			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
-+			linux,input-type = <1>;
-+		};
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		led_system: led_system {
-+			label = "green:system";
-+			gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		led_2g {
-+			label = "blue:wlan2g";
-+			gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		led_5g {
-+			label = "blue:wlan5g";
-+			gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
-+
-+	gpio_export {
-+		compatible = "gpio-export";
-+		#size-cells = <0>;
-+
-+		usb {
-+			gpio-export,name = "usb-power";
-+			gpio-export,output = <1>;
-+			gpios = <&tlmm 44 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		poe {
-+			gpio-export,name = "poe-power";
-+			gpio-export,output = <0>;
-+			gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		external_antenna_1 {
-+			gpio-export,name = "gpio458";
-+			gpio-export,output = <1>;
-+			gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		external_antenna_2 {
-+			gpio-export,name = "gpio459";
-+			gpio-export,output = <1>;
-+			gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
-+};
-+
-+&tlmm {
-+	serial_0_pins: serial_pinmux {
-+		mux {
-+			pins = "gpio16", "gpio17";
-+			function = "blsp_uart0";
-+			bias-disable;
-+		};
-+	};
-+
-+	spi_0_pins: spi_0_pinmux {
-+		pinmux {
-+			function = "blsp_spi0";
-+			pins = "gpio13", "gpio14", "gpio15";
-+			drive-strength = <12>;
-+			bias-disable;
-+		};
-+
-+		pinmux_cs {
-+			function = "gpio";
-+			pins = "gpio12";
-+			drive-strength = <2>;
-+			bias-disable;
-+			output-high;
-+		};
-+	};
-+
-+	nand_pins: nand_pins {
-+		pullups {
-+			pins = "gpio53", "gpio58", "gpio59";
-+			function = "qpic";
-+			bias-pull-up;
-+		};
-+
-+		pulldowns {
-+			pins = "gpio54", "gpio55", "gpio56",
-+				"gpio57", "gpio60", "gpio61",
-+				"gpio62", "gpio63", "gpio64",
-+				"gpio65", "gpio66", "gpio67",
-+				"gpio68", "gpio69";
-+			function = "qpic";
-+			bias-pull-down;
-+		};
-+	};
-+
-+	mdio_pins: mdio_pinmux {
-+		mux_1 {
-+			pins = "gpio6";
-+			function = "mdio";
-+			bias-pull-up;
-+		};
-+		mux_2 {
-+			pins = "gpio7";
-+			function = "mdc";
-+			bias-pull-up;
-+		};
-+	};
-+};
-+
-+&cryptobam {
-+	status = "okay";
-+};
-+
-+&blsp1_spi1 {
-+	pinctrl-0 = <&spi_0_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
-+
-+	flash@0 {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		compatible = "jedec,spi-nor";
-+		reg = <0>;
-+		linux,modalias = "m25p80", "gd25q256";
-+		spi-max-frequency = <24000000>;
-+
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			partition0@0 {
-+				label = "0:SBL1";
-+				reg = <0x00000000 0x00040000>;
-+				read-only;
-+			};
-+			partition1@40000 {
-+				label = "0:MIBIB";
-+				reg = <0x00040000 0x00020000>;
-+				read-only;
-+			};
-+			partition2@60000 {
-+				label = "0:QSEE";
-+				reg = <0x00060000 0x00060000>;
-+				read-only;
-+			};
-+			partition3@c0000 {
-+				label = "0:CDT";
-+				reg = <0x000c0000 0x00010000>;
-+				read-only;
-+			};
-+			partition4@d0000 {
-+				label = "0:DDRPARAMS";
-+				reg = <0x000d0000 0x00010000>;
-+				read-only;
-+			};
-+			partition5@e0000 {
-+				label = "0:APPSBLENV";
-+				reg = <0x000e0000 0x00010000>;
-+				read-only;
-+			};
-+			partition6@f0000 {
-+				label = "0:APPSBL";
-+				reg = <0x000f0000 0x00080000>;
-+				read-only;
-+			};
-+			partition7@170000 {
-+				label = "0:ART";
-+				reg = <0x00170000 0x00010000>;
-+				read-only;
-+			};
-+		};
-+	};
-+};
-+
-+&nand {
-+	pinctrl-0 = <&nand_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+
-+	nand@0 {
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			partition@0 {
-+				label = "rootfs";
-+				reg = <0x00000000 0x4000000>;
-+			};
-+		};
-+	};
-+};
-+
-+&blsp_dma {
-+	status = "okay";
-+};
-+
-+&blsp1_uart1 {
-+	pinctrl-0 = <&serial_0_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+};
-+
-+&qpic_bam {
-+	status = "okay";
-+};
-+
-+&wifi0 {
-+	status = "okay";
-+	qcom,ath10k-calibration-variant = "Edgecore OAP100e";
-+};
-+
-+&wifi1 {
-+	status = "okay";
-+	qcom,ath10k-calibration-variant = "Edgecore OAP100e";
-+};
-+
-+&usb3_ss_phy {
-+	status = "okay";
-+};
-+
-+&usb3_hs_phy {
-+	status = "okay";
-+};
-+
-+&usb2_hs_phy {
-+	status = "okay";
-+};
-diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk
-index c156cb3415..b68c647f04 100644
---- a/target/linux/ipq40xx/image/generic.mk
-+++ b/target/linux/ipq40xx/image/generic.mk
-@@ -414,6 +414,20 @@ define Device/edgecore_oap100
- endef
- TARGET_DEVICES += edgecore_oap100
- 
-+define Device/edgecore_oap100e
-+	$(call Device/FitImage)
-+	$(call Device/UbiFit)
-+	DEVICE_VENDOR := Edgecore
-+	DEVICE_MODEL := OAP100e
-+	SOC := qcom-ipq4019
-+	BLOCKSIZE := 128k
-+	PAGESIZE := 2048
-+	IMAGES := nand-sysupgrade.bin
-+	DEVICE_DTS_CONFIG := config@ap.dk07.1-c1
-+	DEVICE_PACKAGES := ipq-wifi-edgecore_oap100 kmod-usb-acm kmod-usb-net kmod-usb-net-cdc-qmi uqmi
-+endef
-+TARGET_DEVICES += edgecore_oap100e
-+
- define Device/engenius_eap1300
- 	$(call Device/FitImage)
- 	DEVICE_VENDOR := EnGenius
-diff --git a/target/linux/ipq40xx/patches-5.4/9991-arm-boot-add-oap100e-dts-files.patch b/target/linux/ipq40xx/patches-5.4/9991-arm-boot-add-oap100e-dts-files.patch
-new file mode 100644
-index 0000000000..3e397ae686
---- /dev/null
-+++ b/target/linux/ipq40xx/patches-5.4/9991-arm-boot-add-oap100e-dts-files.patch
-@@ -0,0 +1,10 @@
-+--- a/arch/arm/boot/dts/Makefile	2022-11-16 16:35:30.232986884 +0800
-++++ b/arch/arm/boot/dts/Makefile	2022-11-16 16:35:48.949080170 +0800
-+@@ -860,6 +860,7 @@
-+ 	qcom-ipq4018-sxtsq-5-ac.dtb \
-+ 	qcom-ipq4018-nbg6617.dtb \
-+ 	qcom-ipq4019-oap100.dtb \
-++	qcom-ipq4019-oap100e.dtb \
-+ 	qcom-ipq4018-pa1200.dtb \
-+ 	qcom-ipq4018-rt-ac58u.dtb \
-+ 	qcom-ipq4018-wre6606.dtb \
--- 
-2.17.1
-
diff --git a/patches/ipq806x/0001-ipq806x-simplify-ecw5410-dts.patch b/patches/ipq806x/0001-ipq806x-simplify-ecw5410-dts.patch
deleted file mode 100644
index b6e197046..000000000
--- a/patches/ipq806x/0001-ipq806x-simplify-ecw5410-dts.patch
+++ /dev/null
@@ -1,202 +0,0 @@
-From 8b82aea440583198be21bbbe4e3f6d7bd814aad8 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Thu, 17 Jun 2021 16:13:40 +0200
-Subject: [PATCH 14/43] ipq806x: simplify ecw5410 dts
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- .../etc/hotplug.d/firmware/11-ath10k-caldata  |  6 +-
- .../arm/boot/dts/qcom-ipq8068-ecw5410.dts     | 83 +++++++++++--------
- target/linux/ipq806x/image/Makefile           |  2 +-
- .../linux/ipq806x/patches-5.4/999-at803.patch | 12 +++
- 4 files changed, 64 insertions(+), 39 deletions(-)
- create mode 100644 target/linux/ipq806x/patches-5.4/999-at803.patch
-
-diff --git a/target/linux/ipq806x/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq806x/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-index 3befc40630..e5715a79aa 100644
---- a/target/linux/ipq806x/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-+++ b/target/linux/ipq806x/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-@@ -16,9 +16,6 @@ case "$FIRMWARE" in
- 		caldata_extract "ART" 0x1000 0x2f20
- 		ath10k_patch_mac $(mtd_get_mac_binary ART 0x1e)
- 		;;
--	edgecore,ecw5410)
--		caldata_extract "0:ART" 0x1000 0x2f20
--		;;
- 	linksys,ea7500-v1 |\
- 	linksys,ea8500)
- 		caldata_extract "art" 0x1000 0x2f20
-@@ -59,6 +56,9 @@ case "$FIRMWARE" in
- 		caldata_extract "ART" 0x5000 0x2f20
- 		ath10k_patch_mac $(mtd_get_mac_binary ART 0x18)
- 		;;
-+	edgecore,ecw5410)
-+		caldata_extract "0:ART" 0x1000 0x2f20
-+		;;
- 	linksys,ea7500-v1 |\
- 	linksys,ea8500)
- 		caldata_extract "art" 0x5000 0x2f20
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts
-index 712910c261..e87ef16b9a 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts
-@@ -95,6 +95,16 @@
- 			gpios = <&qcom_pinmux 59 GPIO_ACTIVE_LOW>;
- 		};
- 	};
-+
-+	i2c-gpio {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		compatible = "i2c-gpio";
-+		gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>, /* sda */
-+			<&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; /* scl */
-+		i2c-gpio,delay-us = <5>;
-+	};
- };
- 
- 
-@@ -124,7 +134,7 @@
- 
- 	led_pins: led_pins {
- 		mux {
--			pins = "gpio16", "gpio23", "gpio24", "gpio26",
-+			pins = "gpio6", "gpio7", "gpio16", "gpio23", "gpio24", "gpio26",
- 				   "gpio28", "gpio59";
- 			function = "gpio";
- 			drive-strength = <2>;
-@@ -259,39 +269,6 @@
- };
- 
- &soc {
--	nand@1ac00000 {
--		status = "okay";
--
--		pinctrl-0 = <&nand_pins>;
--		pinctrl-names = "default";
--
--		nand@0 {
--			compatible = "qcom,nandcs";
--
--			reg = <0>;
--
--			nand-ecc-strength = <4>;
--			nand-bus-width = <8>;
--			nand-ecc-step-size = <512>;
--
--			partitions {
--				compatible = "fixed-partitions";
--				#address-cells = <1>;
--				#size-cells = <1>;
--
--				rootfs1@0 {
--					label = "rootfs1";
--					reg = <0x0000000 0x4000000>;
--				};
--
--				rootfs2@4000000 {
--					label = "rootfs2";
--					reg = <0x4000000 0x4000000>;
--				};
--			};
--		};
--	};
--
- 	mdio1: mdio {
- 		compatible = "virtual,mdio-gpio";
- 		#address-cells = <1>;
-@@ -306,14 +283,50 @@
- 
- 		phy0: ethernet-phy@0 {
- 			reg = <0>;
-+			reset-gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
- 		};
- 
- 		phy1: ethernet-phy@1 {
- 			reg = <1>;
-+			reset-gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>;
- 		};
- 	};
- };
- 
-+&nand_controller {
-+	status = "okay";
-+
-+	pinctrl-0 = <&nand_pins>;
-+	pinctrl-names = "default";
-+
-+	nand@0 {
-+		compatible = "qcom,nandcs";
-+
-+		reg = <0>;
-+
-+		nand-ecc-strength = <4>;
-+		nand-bus-width = <8>;
-+		nand-ecc-step-size = <512>;
-+
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			rootfs1@0 {
-+				label = "rootfs1";
-+				reg = <0x0000000 0x4000000>;
-+			};
-+
-+			rootfs2@4000000 {
-+				label = "rootfs2";
-+				reg = <0x4000000 0x4000000>;
-+			};
-+		};
-+	};
-+};
-+
-+
- &gmac2 {
- 	status = "okay";
- 
-@@ -328,7 +341,7 @@
- 	status = "okay";
- 
- 	qcom,id = <3>;
--	mdiobus = <&mdio1>;
-+	mdiobus = <&mdio0>;
- 
- 	phy-mode = "sgmii";
- 	phy-handle = <&phy0>;
-diff --git a/target/linux/ipq806x/image/Makefile b/target/linux/ipq806x/image/Makefile
-index 3bc60fa931..d620f0eb70 100644
---- a/target/linux/ipq806x/image/Makefile
-+++ b/target/linux/ipq806x/image/Makefile
-@@ -142,7 +142,7 @@ define Device/edgecore_ecw5410
- 	BLOCKSIZE := 128k
- 	PAGESIZE := 2048
- 	DEVICE_DTS_CONFIG := config@v2.0-ap160
--	DEVICE_PACKAGES := ath10k-firmware-qca9984-ct ipq-wifi-edgecore_ecw5410
-+	DEVICE_PACKAGES := ath10k-firmware-qca9984-ct ipq-wifi-edgecore_ecw5410 kmod-i2c-gpio
- endef
- TARGET_DEVICES += edgecore_ecw5410
- 
-diff --git a/target/linux/ipq806x/patches-5.4/999-at803.patch b/target/linux/ipq806x/patches-5.4/999-at803.patch
-new file mode 100644
-index 0000000000..0dda8bdd59
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.4/999-at803.patch
-@@ -0,0 +1,12 @@
-+Index: linux-5.4.111/drivers/net/phy/at803x.c
-+===================================================================
-+--- linux-5.4.111.orig/drivers/net/phy/at803x.c
-++++ linux-5.4.111/drivers/net/phy/at803x.c
-+@@ -486,6 +486,7 @@ static struct phy_driver at803x_driver[]
-+ 	.phy_id_mask		= AT803X_PHY_ID_MASK,
-+ 	.probe			= at803x_probe,
-+ 	.config_init		= at803x_config_init,
-++	.link_change_notify	= at803x_link_change_notify,
-+ 	.set_wol		= at803x_set_wol,
-+ 	.get_wol		= at803x_get_wol,
-+ 	.suspend		= at803x_suspend,
--- 
-2.25.1
-
diff --git a/patches/ipq806x/0002-ipq806x-update-to-latest-HEAD.patch b/patches/ipq806x/0002-ipq806x-update-to-latest-HEAD.patch
deleted file mode 100644
index 71c236267..000000000
--- a/patches/ipq806x/0002-ipq806x-update-to-latest-HEAD.patch
+++ /dev/null
@@ -1,12675 +0,0 @@
-From a16429d604a6c2cff7b2791e380fc57827485f03 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Sat, 4 Sep 2021 06:01:17 +0200
-Subject: [PATCH 32/43] ipq806x: update to latest HEAD
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- target/linux/ipq806x/Makefile                 |   1 +
- .../ipq806x/base-files/etc/board.d/01_leds    |   1 -
- .../ipq806x/base-files/etc/board.d/02_network |  17 +-
- .../etc/hotplug.d/firmware/11-ath10k-caldata  |  58 +-
- .../ipq806x/base-files/etc/init.d/bootcount   |   7 +-
- .../base-files/lib/preinit/04_reorder_eth     |  13 +
- .../ipq806x/base-files/lib/upgrade/asrock.sh  |   4 +-
- .../base-files/lib/upgrade/platform.sh        |  19 +-
- .../ipq806x/base-files/lib/upgrade/zyxel.sh   |   5 +-
- target/linux/ipq806x/config-5.10              | 508 +++++++++
- target/linux/ipq806x/config-5.4               |  77 +-
- .../arm/boot/dts/qcom-ipq8062-wg2600hp3.dts   |  28 +-
- .../files/arch/arm/boot/dts/qcom-ipq8062.dtsi |  40 +-
- .../boot/dts/qcom-ipq8064-ad7200-c2600.dtsi   |  18 +-
- .../arch/arm/boot/dts/qcom-ipq8064-ad7200.dts |   8 +
- .../arch/arm/boot/dts/qcom-ipq8064-ap148.dts  |   4 +-
- .../arch/arm/boot/dts/qcom-ipq8064-ap161.dts  |   4 +-
- .../arch/arm/boot/dts/qcom-ipq8064-c2600.dts  |   8 +
- .../arch/arm/boot/dts/qcom-ipq8064-d7800.dts  |  29 +-
- .../arm/boot/dts/qcom-ipq8064-ea7500-v1.dts   |   4 +
- .../arch/arm/boot/dts/qcom-ipq8064-ea8500.dts |   6 +
- .../arm/boot/dts/qcom-ipq8064-eax500.dtsi     |   3 +
- .../arch/arm/boot/dts/qcom-ipq8064-g10.dts    |  10 +-
- .../arch/arm/boot/dts/qcom-ipq8064-r7500.dts  |  29 +-
- .../arm/boot/dts/qcom-ipq8064-r7500v2.dts     |  31 +-
- .../arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts |  57 +-
- .../arm/boot/dts/qcom-ipq8064-vr2600v.dts     |  28 +-
- .../arm/boot/dts/qcom-ipq8064-wg2600hp.dts    |  28 +-
- .../arch/arm/boot/dts/qcom-ipq8064-wpq864.dts |   5 +
- .../arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts |  38 +-
- .../arm/boot/dts/qcom-ipq8065-nbg6817.dts     |  10 +-
- .../arch/arm/boot/dts/qcom-ipq8065-r7800.dts  |  33 +-
- .../boot/dts/qcom-ipq8065-rt4230w-rev6.dts    | 319 ++++++
- .../files/arch/arm/boot/dts/qcom-ipq8065.dtsi | 103 +-
- .../arm/boot/dts/qcom-ipq8068-ecw5410.dts     |  65 +-
- target/linux/ipq806x/image/Makefile           |  19 +-
- ...ings-qcom_adm-Fix-channel-specifiers.patch |  71 ++
- ...ically-select-PCI_DOMAINS-if-PCI-is-.patch |  29 +
- ...arch-arm-force-ZRELADDR-on-arch-qcom.patch |  62 ++
- .../0065-arm-override-compiler-flags.patch    |  21 +
- ...Mangle-bootloader-s-kernel-arguments.patch | 210 ++++
- .../0069-arm-boot-add-dts-files.patch         |  39 +
- .../0072-add-ipq806x-with-no-clocks.patch     |  10 +
- .../082-ipq8064-dtsi-tweaks.patch             | 211 ++++
- .../083-ipq8064-dtsi-additions.patch          | 754 ++++++++++++++
- .../084-ipq8064-v1.0-dtsi-cleanup.patch       |  89 ++
- .../085-ipq8064-v1.0-dtsi-additions.patch     |  14 +
- .../086-ipq8064-fix-duplicate-node.patch      | 145 +++
- ...qcom-cpufreq-nvmem-support-specific-.patch |  51 +
- ...7-1-ipq806x-gcc-add-missing-clk-flag.patch | 115 +++
- .../097-2-ipq806x-lcc-add-missing-reset.patch |  59 ++
- ...com-krait-add-missing-enable-disable.patch |  57 ++
- ...missing-clk-and-reset-for-crypto-eng.patch | 372 +++++++
- ...q-add-Krait-dedicated-scaling-driver.patch | 681 ++++++++++++
- ...ufreq-add-qcom-krait-cpufreq-binding.patch | 237 +++++
- ...dd-fab-scaling-support-with-cpufreq.patch} |  32 +-
- ...m_nandc-add-boot_layout_mode-support.patch | 239 +++++
- ...vicetree-mtd-qcom_nandc-document-qco.patch |  42 +
- ...v5.11-dmaengine-qcom-add_ADM_driver.patch} | 277 +++--
- ....12-mtd-parsers-Add-Qcom-SMEM-parser.patch | 217 ++++
- ...-dwmac-ipq806x-qsgmii-pcs-all-ch-ctl.patch |  83 ++
- ...conflicts-with-OpenWrt-auto-mounting.patch |  24 +
- ...M-dts-qcom-reduce-pci-IO-size-to-64K.patch |  46 +
- ...hermal-tsens-Add-VER_0-tsens-version.patch | 285 ++++++
- ...al-tsens-Don-t-hardcode-sensor-slope.patch |  28 +
- ...l-tsens-Convert-msm8960-to-reg_field.patch | 119 +++
- ...al-tsens-Use-init_common-for-msm8960.patch |  81 ++
- ...tsens-Fix-bug-in-sensor-enable-for-m.patch |  66 ++
- ...tsens-Replace-custom-8960-apis-with-.patch | 109 ++
- ...tsens-Drop-unused-define-for-msm8960.patch |  65 ++
- ...-tsens-Add-support-for-ipq8064-tsens.patch |  26 +
- ...rmal-tsens-Document-ipq8064-bindings.patch | 112 ++
- ...al-tsens-Fix-wrong-slope-on-msm-8960.patch |  32 +
- ...ns-init-debugfs-only-with-successful.patch |  41 +
- ...tsens-simplify-debugfs-init-function.patch |  54 +
- .../850-soc-add-qualcomm-syscon.patch         | 121 +++
- .../patches-5.10/851-add-gsbi1-dts.patch      |  44 +
- .../900-arm-add-cmdline-override.patch        |  37 +
- .../997-device_tree_cmdline.patch             |  12 +
- ...d-add-SMEM-parser-for-QCOM-platforms.patch | 282 -----
- ...rt-adjusting-OPP-voltages-at-runtime.patch | 153 ---
- ...per-to-get-an-opp-regulator-for-devi.patch |  52 -
- ...e-voltage-tolerance-when-adjusting-t.patch |  47 -
- ...-dt-Handle-OPP-voltage-adjust-events.patch | 118 ---
- ...-dt-Add-L2-frequency-scaling-support.patch | 199 ----
- ...056-cpufreq-dt-Add-missing-rcu-locks.patch |  23 -
- ...conflicts-with-OpenWrt-auto-mounting.patch |  23 -
- .../0069-arm-boot-add-dts-files.patch         |   3 +-
- .../083-ipq8064-dtsi-additions.patch          |  84 +-
- ...qcom-cpufreq-nvmem-support-specific-.patch |  51 +
- ...q-add-Krait-dedicated-scaling-driver.patch | 681 ++++++++++++
- ...ufreq-add-qcom-krait-cpufreq-binding.patch | 237 +++++
- ...add-fab-scaling-support-with-cpufreq.patch | 243 +++++
- ...-dwmac-ipq806x-qsgmii-pcs-all-ch-ctl.patch |  83 ++
- ...-v5.11-dmaengine-qcom-add_ADM_driver.patch | 965 ++++++++++++++++++
- ....12-mtd-parsers-Add-Qcom-SMEM-parser.patch | 217 ++++
- ...conflicts-with-OpenWrt-auto-mounting.patch |  24 +
- .../patches-5.4/851-add-gsbi1-dts.patch       |   2 +-
- .../linux/ipq806x/patches-5.4/999-at803.patch |  12 -
- 99 files changed, 9190 insertions(+), 1365 deletions(-)
- create mode 100644 target/linux/ipq806x/base-files/lib/preinit/04_reorder_eth
- create mode 100644 target/linux/ipq806x/config-5.10
- create mode 100644 target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
- create mode 100644 target/linux/ipq806x/patches-5.10/0001-dtbindings-qcom_adm-Fix-channel-specifiers.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/0033-ARM-qcom-automatically-select-PCI_DOMAINS-if-PCI-is-.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/0060-HACK-arch-arm-force-ZRELADDR-on-arch-qcom.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/0065-arm-override-compiler-flags.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/0067-generic-Mangle-bootloader-s-kernel-arguments.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/0069-arm-boot-add-dts-files.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/0072-add-ipq806x-with-no-clocks.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/084-ipq8064-v1.0-dtsi-cleanup.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/085-ipq8064-v1.0-dtsi-additions.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/086-ipq8064-fix-duplicate-node.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/093-drivers-cpufreq-qcom-cpufreq-nvmem-support-specific-.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/097-1-ipq806x-gcc-add-missing-clk-flag.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/097-2-ipq806x-lcc-add-missing-reset.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/097-3-clk-qcom-krait-add-missing-enable-disable.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/097-4-ipq806x-gcc-add-missing-clk-and-reset-for-crypto-eng.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/098-1-cpufreq-add-Krait-dedicated-scaling-driver.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/098-2-Documentation-cpufreq-add-qcom-krait-cpufreq-binding.patch
- rename target/linux/ipq806x/{patches-5.4/0057-add-fab-scaling-support-with-cpufreq.patch => patches-5.10/098-3-add-fab-scaling-support-with-cpufreq.patch} (94%)
- create mode 100644 target/linux/ipq806x/patches-5.10/099-1-mtd-nand-raw-qcom_nandc-add-boot_layout_mode-support.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/099-2-Documentation-devicetree-mtd-qcom_nandc-document-qco.patch
- rename target/linux/ipq806x/{patches-5.4/0002-dmaengine-Add-ADM-driver.patch => patches-5.10/100-v5.11-dmaengine-qcom-add_ADM_driver.patch} (82%)
- create mode 100644 target/linux/ipq806x/patches-5.10/101-5.12-mtd-parsers-Add-Qcom-SMEM-parser.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/101-dwmac-ipq806x-qsgmii-pcs-all-ch-ctl.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/103-ARM-dts-qcom-reduce-pci-IO-size-to-64K.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/104-1-drivers-thermal-tsens-Add-VER_0-tsens-version.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/104-2-drivers-thermal-tsens-Don-t-hardcode-sensor-slope.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/104-3-drivers-thermal-tsens-Convert-msm8960-to-reg_field.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/104-4-drivers-thermal-tsens-Use-init_common-for-msm8960.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/104-5-drivers-thermal-tsens-Fix-bug-in-sensor-enable-for-m.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/104-6-drivers-thermal-tsens-Replace-custom-8960-apis-with-.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/104-7-drivers-thermal-tsens-Drop-unused-define-for-msm8960.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/104-8-drivers-thermal-tsens-Add-support-for-ipq8064-tsens.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/104-9-dt-bindings-thermal-tsens-Document-ipq8064-bindings.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/105-10-drivers-thermal-tsens-Fix-wrong-slope-on-msm-8960.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/107-1-thermal-qcom-tsens-init-debugfs-only-with-successful.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/107-2-thermal-qcom-tsens-simplify-debugfs-init-function.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/850-soc-add-qualcomm-syscon.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/851-add-gsbi1-dts.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/900-arm-add-cmdline-override.patch
- create mode 100644 target/linux/ipq806x/patches-5.10/997-device_tree_cmdline.patch
- delete mode 100644 target/linux/ipq806x/patches-5.4/0031-mtd-add-SMEM-parser-for-QCOM-platforms.patch
- delete mode 100644 target/linux/ipq806x/patches-5.4/0049-PM-OPP-Support-adjusting-OPP-voltages-at-runtime.patch
- delete mode 100644 target/linux/ipq806x/patches-5.4/0051-PM-OPP-Add-a-helper-to-get-an-opp-regulator-for-devi.patch
- delete mode 100644 target/linux/ipq806x/patches-5.4/0052-PM-OPP-Update-the-voltage-tolerance-when-adjusting-t.patch
- delete mode 100644 target/linux/ipq806x/patches-5.4/0054-cpufreq-dt-Handle-OPP-voltage-adjust-events.patch
- delete mode 100644 target/linux/ipq806x/patches-5.4/0055-cpufreq-dt-Add-L2-frequency-scaling-support.patch
- delete mode 100644 target/linux/ipq806x/patches-5.4/0056-cpufreq-dt-Add-missing-rcu-locks.patch
- delete mode 100644 target/linux/ipq806x/patches-5.4/0061-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch
- create mode 100644 target/linux/ipq806x/patches-5.4/093-drivers-cpufreq-qcom-cpufreq-nvmem-support-specific-.patch
- create mode 100644 target/linux/ipq806x/patches-5.4/098-1-cpufreq-add-Krait-dedicated-scaling-driver.patch
- create mode 100644 target/linux/ipq806x/patches-5.4/098-2-Documentation-cpufreq-add-qcom-krait-cpufreq-binding.patch
- create mode 100644 target/linux/ipq806x/patches-5.4/098-3-add-fab-scaling-support-with-cpufreq.patch
- create mode 100644 target/linux/ipq806x/patches-5.4/100-dwmac-ipq806x-qsgmii-pcs-all-ch-ctl.patch
- create mode 100644 target/linux/ipq806x/patches-5.4/100-v5.11-dmaengine-qcom-add_ADM_driver.patch
- create mode 100644 target/linux/ipq806x/patches-5.4/101-5.12-mtd-parsers-Add-Qcom-SMEM-parser.patch
- create mode 100644 target/linux/ipq806x/patches-5.4/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch
- delete mode 100644 target/linux/ipq806x/patches-5.4/999-at803.patch
-
-diff --git a/target/linux/ipq806x/Makefile b/target/linux/ipq806x/Makefile
-index 69d3aa1e56..c3407217d6 100644
---- a/target/linux/ipq806x/Makefile
-+++ b/target/linux/ipq806x/Makefile
-@@ -11,6 +11,7 @@ CPU_SUBTYPE:=neon-vfpv4
- SUBTARGETS:=generic
- 
- KERNEL_PATCHVER:=5.4
-+KERNEL_TESTING_PATCHVER:=5.10
- 
- KERNELNAME:=zImage Image dtbs
- 
-diff --git a/target/linux/ipq806x/base-files/etc/board.d/01_leds b/target/linux/ipq806x/base-files/etc/board.d/01_leds
-index 284f9e2c1d..74b94a29b4 100755
---- a/target/linux/ipq806x/base-files/etc/board.d/01_leds
-+++ b/target/linux/ipq806x/base-files/etc/board.d/01_leds
-@@ -1,4 +1,3 @@
--#!/bin/sh
- #
- # Copyright (C) 2015 OpenWrt.org
- #
-diff --git a/target/linux/ipq806x/base-files/etc/board.d/02_network b/target/linux/ipq806x/base-files/etc/board.d/02_network
-index 1e00b97092..1a1cec51aa 100755
---- a/target/linux/ipq806x/base-files/etc/board.d/02_network
-+++ b/target/linux/ipq806x/base-files/etc/board.d/02_network
-@@ -1,4 +1,3 @@
--#!/bin/sh
- #
- # Copyright (c) 2015 The Linux Foundation. All rights reserved.
- # Copyright (c) 2011-2015 OpenWrt.org
-@@ -12,6 +11,7 @@ board_config_update
- board=$(board_name)
- 
- case "$board" in
-+askey,rt4230w-rev6 |\
- asrock,g10 |\
- nec,wg2600hp)
- 	ucidef_add_switch "switch0" \
-@@ -29,8 +29,14 @@ tplink,vr2600v)
- 	;;
- edgecore,ecw5410)
- 	ucidef_set_interfaces_lan_wan "eth1" "eth0"
--	ucidef_set_interface_macaddr "lan" "$(mtd_get_mac_binary "0:ART" 0x6)"
--	ucidef_set_interface_macaddr "wan" "$(mtd_get_mac_binary "0:ART" 0x0)"
-+	if [ -b "$(find_mtd_part 0:art)" ]; then
-+		ucidef_set_interface_macaddr "lan" "$(mtd_get_mac_binary "0:art" 0x6)"
-+		ucidef_set_interface_macaddr "wan" "$(mtd_get_mac_binary "0:art" 0x0)"
-+	else
-+		# XXX: drop upper case after kernel v5.4 is gone (qcom-smem)
-+		ucidef_set_interface_macaddr "lan" "$(mtd_get_mac_binary "0:ART" 0x6)"
-+		ucidef_set_interface_macaddr "wan" "$(mtd_get_mac_binary "0:ART" 0x0)"
-+	fi
- 	;;
- linksys,ea7500-v1)
- 	hw_mac_addr=$(mtd_get_mac_ascii devinfo hw_mac_addr)
-@@ -73,7 +79,10 @@ ubnt,unifi-ac-hd)
- 	ucidef_set_interface_lan "eth0 eth1"
- 	;;
- zyxel,nbg6817)
--	hw_mac_addr=$(mtd_get_mac_ascii 0:APPSBLENV ethaddr)
-+	hw_mac_addr=$(mtd_get_mac_ascii 0:appsblenv ethaddr)
-+	# XXX: drop upper case after kernel v5.4 is gone (qcom-smem)
-+	[ -n "$hw_mac_addr" ] || \
-+		hw_mac_addr=$(mtd_get_mac_ascii 0:APPSBLENV ethaddr)
- 	ucidef_add_switch "switch0" \
- 		"1:lan" "2:lan" "3:lan" "4:lan" "6@eth1" "5:wan" "0@eth0"
- 	ucidef_set_interface_macaddr "lan" "$(macaddr_add $hw_mac_addr 2)"
-diff --git a/target/linux/ipq806x/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq806x/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-index e5715a79aa..b9d0fec25e 100644
---- a/target/linux/ipq806x/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-+++ b/target/linux/ipq806x/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-@@ -9,8 +9,14 @@ board=$(board_name)
- case "$FIRMWARE" in
- "ath10k/pre-cal-pci-0000:01:00.0.bin")
- 	case $board in
-+	askey,rt4230w-rev6 |\
- 	asrock,g10)
--		caldata_extract "0:ART" 0x1000 0x2f20
-+		if [ -b "$(find_mtd_part 0:art)" ]; then
-+			caldata_extract "0:art" 0x1000 0x2f20
-+		else
-+			# XXX: drop upper case after kernel v5.4 is gone (qcom-smem)
-+			caldata_extract "0:ART" 0x1000 0x2f20
-+		fi
- 		;;
- 	buffalo,wxr-2533dhp)
- 		caldata_extract "ART" 0x1000 0x2f20
-@@ -19,7 +25,7 @@ case "$FIRMWARE" in
- 	linksys,ea7500-v1 |\
- 	linksys,ea8500)
- 		caldata_extract "art" 0x1000 0x2f20
--		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii devinfo hw_mac_addr) +1)
-+		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii devinfo hw_mac_addr) 1)
- 		;;
- 	nec,wg2600hp |\
- 	nec,wg2600hp3)
-@@ -30,7 +36,7 @@ case "$FIRMWARE" in
- 	netgear,r7500v2 |\
- 	netgear,r7800)
- 		caldata_extract "art" 0x1000 0x2f20
--		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary art 0x6) +1)
-+		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary art 0x6) 1)
- 		;;
- 	tplink,ad7200 |\
- 	tplink,c2600)
-@@ -42,27 +48,44 @@ case "$FIRMWARE" in
- 		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary default-mac 0x0) -1)
- 		;;
- 	zyxel,nbg6817)
--		caldata_extract "0:ART" 0x1000 0x2f20
--		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii 0:APPSBLENV ethaddr) +1)
-+		if [ -b "$(find_mtd_part 0:art)" ]; then
-+			caldata_extract "0:art" 0x1000 0x2f20
-+			ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii 0:appsblenv ethaddr) 1)
-+		else
-+			# XXX: drop upper case after kernel v5.4 is gone (qcom-smem)
-+			caldata_extract "0:ART" 0x1000 0x2f20
-+			ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii 0:APPSBLENV ethaddr) 1)
-+		fi
- 		;;
- 	esac
- 	;;
- "ath10k/pre-cal-pci-0001:01:00.0.bin")
- 	case $board in
-+	askey,rt4230w-rev6 |\
- 	asrock,g10)
--		caldata_extract "0:ART" 0x5000 0x2f20
-+		if [ -b "$(find_mtd_part 0:art)" ]; then
-+			caldata_extract "0:art" 0x5000 0x2f20
-+		else
-+			# XXX: drop upper case after kernel v5.4 is gone (qcom-smem)
-+			caldata_extract "0:ART" 0x5000 0x2f20
-+		fi
- 		;;
- 	buffalo,wxr-2533dhp)
- 		caldata_extract "ART" 0x5000 0x2f20
- 		ath10k_patch_mac $(mtd_get_mac_binary ART 0x18)
- 		;;
- 	edgecore,ecw5410)
--		caldata_extract "0:ART" 0x1000 0x2f20
-+		if [ -b "$(find_mtd_part 0:art)" ]; then
-+			caldata_extract "0:art" 0x1000 0x2f20
-+		else
-+			# XXX: drop upper case after kernel v5.4 is gone (qcom-smem)
-+			caldata_extract "0:ART" 0x1000 0x2f20
-+		fi
- 		;;
- 	linksys,ea7500-v1 |\
- 	linksys,ea8500)
- 		caldata_extract "art" 0x5000 0x2f20
--		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii devinfo hw_mac_addr) +2)
-+		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii devinfo hw_mac_addr) 2)
- 		;;
- 	nec,wg2600hp |\
- 	nec,wg2600hp3)
-@@ -73,7 +96,7 @@ case "$FIRMWARE" in
- 	netgear,r7500v2 |\
- 	netgear,r7800)
- 		caldata_extract "art" 0x5000 0x2f20
--		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary art 0x6) +2)
-+		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary art 0x6) 2)
- 		;;
- 	tplink,ad7200 |\
- 	tplink,c2600)
-@@ -85,15 +108,26 @@ case "$FIRMWARE" in
- 		ath10k_patch_mac $(mtd_get_mac_binary default-mac 0x0)
- 		;;
- 	zyxel,nbg6817)
--		caldata_extract "0:ART" 0x5000 0x2f20
--		ath10k_patch_mac $(mtd_get_mac_ascii 0:APPSBLENV ethaddr)
-+		if [ -b "$(find_mtd_part 0:art)" ]; then
-+			caldata_extract "0:art" 0x5000 0x2f20
-+			ath10k_patch_mac $(mtd_get_mac_ascii 0:appsblenv ethaddr)
-+		else
-+			# XXX: drop upper case after kernel v5.4 is gone (qcom-smem)
-+			caldata_extract "0:ART" 0x5000 0x2f20
-+			ath10k_patch_mac $(mtd_get_mac_ascii 0:APPSBLENV ethaddr)
-+		fi
- 		;;
- 	esac
- 	;;
- "ath10k/pre-cal-pci-0002:01:00.0.bin")
- 	case $board in
- 	edgecore,ecw5410)
--		caldata_extract "0:ART" 0x5000 0x2f20
-+		if [ -b "$(find_mtd_part 0:art)" ]; then
-+			caldata_extract "0:art" 0x5000 0x2f20
-+		else
-+			# XXX: drop upper case after kernel v5.4 is gone (qcom-smem)
-+			caldata_extract "0:ART" 0x5000 0x2f20
-+		fi
- 		;;
- 	esac
- 	;;
-diff --git a/target/linux/ipq806x/base-files/etc/init.d/bootcount b/target/linux/ipq806x/base-files/etc/init.d/bootcount
-index 7a54c34dba..cb32a4ed35 100755
---- a/target/linux/ipq806x/base-files/etc/init.d/bootcount
-+++ b/target/linux/ipq806x/base-files/etc/init.d/bootcount
-@@ -2,15 +2,12 @@
- 
- START=99
- 
--. /lib/upgrade/asrock.sh
-+. "$IPKG_INSTROOT/lib/upgrade/asrock.sh"
- 
- boot() {
- 	case $(board_name) in
- 	asrock,g10)
--		asrock_bootconfig_mangle "bootcheck"
--		if [ $? -eq 0 ]; then
--			reboot
--		fi
-+		asrock_bootconfig_mangle "bootcheck" && reboot
- 		;;
- 	edgecore,ecw5410)
- 		fw_setenv bootcount 0
-diff --git a/target/linux/ipq806x/base-files/lib/preinit/04_reorder_eth b/target/linux/ipq806x/base-files/lib/preinit/04_reorder_eth
-new file mode 100644
-index 0000000000..9f58473617
---- /dev/null
-+++ b/target/linux/ipq806x/base-files/lib/preinit/04_reorder_eth
-@@ -0,0 +1,13 @@
-+. /lib/functions.sh
-+
-+preinit_reorder_eth() {
-+	case $(board_name) in
-+	ubnt,unifi-ac-hd)
-+		ip link set eth0 name ethtmp
-+		ip link set eth1 name eth0
-+		ip link set ethtmp name eth1
-+		;;
-+	esac
-+}
-+
-+boot_hook_add preinit_main preinit_reorder_eth
-diff --git a/target/linux/ipq806x/base-files/lib/upgrade/asrock.sh b/target/linux/ipq806x/base-files/lib/upgrade/asrock.sh
-index 9e1376a578..8be737d2da 100644
---- a/target/linux/ipq806x/base-files/lib/upgrade/asrock.sh
-+++ b/target/linux/ipq806x/base-files/lib/upgrade/asrock.sh
-@@ -1,7 +1,9 @@
- . /lib/functions.sh
- 
- asrock_bootconfig_mangle() {
--	local mtdnum="$( find_mtd_index 0:BOOTCONFIG )"
-+	local mtdnum="$(find_mtd_index 0:bootconfig)"
-+	# XXX: drop upper case after kernel v5.4 is gone (qcom-smem)
-+	[ -n "$mtdnum" ] || mtdnum="$(find_mtd_index 0:BOOTCONFIG)"
- 
- 	if [ -z "$mtdnum" ]; then
- 		echo "cannot find bootconfig mtd partition"
-diff --git a/target/linux/ipq806x/base-files/lib/upgrade/platform.sh b/target/linux/ipq806x/base-files/lib/upgrade/platform.sh
-index 4dc612492c..a5e18201df 100644
---- a/target/linux/ipq806x/base-files/lib/upgrade/platform.sh
-+++ b/target/linux/ipq806x/base-files/lib/upgrade/platform.sh
-@@ -10,15 +10,7 @@ platform_check_image() {
- 
- platform_do_upgrade() {
- 	case "$(board_name)" in
--	asrock,g10)
--		asrock_upgrade_prepare
--		nand_do_upgrade "$1"
--		;;
--	buffalo,wxr-2533dhp)
--		buffalo_upgrade_prepare_ubi
--		CI_ROOTPART="ubi_rootfs"
--		nand_do_upgrade "$1"
--		;;
-+	askey,rt4230w-rev6 |\
- 	compex,wpq864|\
- 	netgear,d7800 |\
- 	netgear,r7500 |\
-@@ -28,6 +20,15 @@ platform_do_upgrade() {
- 	qcom,ipq8064-ap161)
- 		nand_do_upgrade "$1"
- 		;;
-+	asrock,g10)
-+		asrock_upgrade_prepare
-+		nand_do_upgrade "$1"
-+		;;
-+	buffalo,wxr-2533dhp)
-+		buffalo_upgrade_prepare_ubi
-+		CI_ROOTPART="ubi_rootfs"
-+		nand_do_upgrade "$1"
-+		;;
- 	edgecore,ecw5410)
- 		part="$(awk -F 'ubi.mtd=' '{printf $2}' /proc/cmdline | sed -e 's/ .*$//')"
- 		if [ "$part" = "rootfs1" ]; then
-diff --git a/target/linux/ipq806x/base-files/lib/upgrade/zyxel.sh b/target/linux/ipq806x/base-files/lib/upgrade/zyxel.sh
-index cece018b31..50f8a3ceaf 100644
---- a/target/linux/ipq806x/base-files/lib/upgrade/zyxel.sh
-+++ b/target/linux/ipq806x/base-files/lib/upgrade/zyxel.sh
-@@ -90,7 +90,10 @@ zyxel_do_upgrade() {
- 	[ -b "${rootfs}" ] || return 1
- 	case "$board" in
- 	zyxel,nbg6817)
--		local dualflagmtd="$(find_mtd_part 0:DUAL_FLAG)"
-+		local dualflagmtd="$(find_mtd_part 0:dual_flag)"
-+		# XXX: drop upper case after kernel v5.4 is gone (qcom-smem)
-+		[ -b $dualflagmtd ] || \
-+			dualflagmtd="$(find_mtd_part 0:DUAL_FLAG)"
- 		[ -b $dualflagmtd ] || return 1
- 
- 		case "$rootfs" in
-diff --git a/target/linux/ipq806x/config-5.10 b/target/linux/ipq806x/config-5.10
-new file mode 100644
-index 0000000000..6b8a418d36
---- /dev/null
-+++ b/target/linux/ipq806x/config-5.10
-@@ -0,0 +1,508 @@
-+CONFIG_ALIGNMENT_TRAP=y
-+# CONFIG_APQ_GCC_8084 is not set
-+# CONFIG_APQ_MMCC_8084 is not set
-+CONFIG_AR8216_PHY=y
-+CONFIG_ARCH_32BIT_OFF_T=y
-+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-+# CONFIG_ARCH_IPQ40XX is not set
-+CONFIG_ARCH_KEEP_MEMBLOCK=y
-+# CONFIG_ARCH_MDM9615 is not set
-+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-+CONFIG_ARCH_MSM8960=y
-+CONFIG_ARCH_MSM8974=y
-+CONFIG_ARCH_MSM8X60=y
-+CONFIG_ARCH_MULTIPLATFORM=y
-+CONFIG_ARCH_MULTI_V6_V7=y
-+CONFIG_ARCH_MULTI_V7=y
-+CONFIG_ARCH_NR_GPIO=0
-+CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
-+CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
-+CONFIG_ARCH_QCOM=y
-+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
-+CONFIG_ARCH_SPARSEMEM_ENABLE=y
-+CONFIG_ARCH_SUSPEND_POSSIBLE=y
-+CONFIG_ARM=y
-+CONFIG_ARM_AMBA=y
-+CONFIG_ARM_APPENDED_DTB=y
-+CONFIG_ARM_ARCH_TIMER=y
-+CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
-+CONFIG_ARM_ATAG_DTB_COMPAT=y
-+# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER is not set
-+CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE=y
-+CONFIG_ARM_CPUIDLE=y
-+CONFIG_ARM_CPU_SUSPEND=y
-+# CONFIG_ARM_CPU_TOPOLOGY is not set
-+CONFIG_ARM_GIC=y
-+CONFIG_ARM_HAS_SG_CHAIN=y
-+CONFIG_ARM_L1_CACHE_SHIFT=6
-+CONFIG_ARM_L1_CACHE_SHIFT_6=y
-+CONFIG_ARM_MODULE_PLTS=y
-+CONFIG_ARM_PATCH_IDIV=y
-+CONFIG_ARM_PATCH_PHYS_VIRT=y
-+# CONFIG_ARM_QCOM_CPUFREQ_HW is not set
-+CONFIG_ARM_QCOM_CPUFREQ_KRAIT=y
-+CONFIG_ARM_QCOM_CPUFREQ_NVMEM=y
-+CONFIG_ARM_QCOM_SPM_CPUIDLE=y
-+# CONFIG_ARM_SMMU is not set
-+CONFIG_ARM_THUMB=y
-+CONFIG_ARM_UNWIND=y
-+CONFIG_ARM_VIRT_EXT=y
-+CONFIG_AT803X_PHY=y
-+CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
-+CONFIG_BLK_DEV_LOOP=y
-+CONFIG_BLK_MQ_PCI=y
-+CONFIG_BOUNCE=y
-+# CONFIG_CACHE_L2X0 is not set
-+CONFIG_CLKDEV_LOOKUP=y
-+CONFIG_CLKSRC_QCOM=y
-+CONFIG_CLONE_BACKWARDS=y
-+CONFIG_CMDLINE_OVERRIDE=y
-+CONFIG_COMMON_CLK=y
-+CONFIG_COMMON_CLK_QCOM=y
-+CONFIG_COMPAT_32BIT_TIME=y
-+CONFIG_CPUFREQ_DT=y
-+CONFIG_CPUFREQ_DT_PLATDEV=y
-+CONFIG_CPU_32v6K=y
-+CONFIG_CPU_32v7=y
-+CONFIG_CPU_ABRT_EV7=y
-+CONFIG_CPU_CACHE_V7=y
-+CONFIG_CPU_CACHE_VIPT=y
-+CONFIG_CPU_COPY_V6=y
-+CONFIG_CPU_CP15=y
-+CONFIG_CPU_CP15_MMU=y
-+CONFIG_CPU_FREQ=y
-+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
-+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
-+CONFIG_CPU_FREQ_GOV_ATTR_SET=y
-+CONFIG_CPU_FREQ_GOV_COMMON=y
-+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
-+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
-+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
-+# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
-+CONFIG_CPU_FREQ_STAT=y
-+CONFIG_CPU_HAS_ASID=y
-+CONFIG_CPU_IDLE=y
-+CONFIG_CPU_IDLE_GOV_LADDER=y
-+CONFIG_CPU_IDLE_GOV_MENU=y
-+CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
-+CONFIG_CPU_PABRT_V7=y
-+CONFIG_CPU_PM=y
-+CONFIG_CPU_RMAP=y
-+CONFIG_CPU_SPECTRE=y
-+CONFIG_CPU_THERMAL=y
-+CONFIG_CPU_THUMB_CAPABLE=y
-+CONFIG_CPU_TLB_V7=y
-+CONFIG_CPU_V7=y
-+CONFIG_CRC16=y
-+# CONFIG_CRC32_SARWATE is not set
-+CONFIG_CRC32_SLICEBY8=y
-+CONFIG_CRYPTO_ACOMP2=y
-+CONFIG_CRYPTO_AEAD=y
-+CONFIG_CRYPTO_AEAD2=y
-+CONFIG_CRYPTO_DEFLATE=y
-+CONFIG_CRYPTO_DEV_QCOM_RNG=y
-+CONFIG_CRYPTO_DRBG=y
-+CONFIG_CRYPTO_DRBG_HMAC=y
-+CONFIG_CRYPTO_DRBG_MENU=y
-+CONFIG_CRYPTO_HASH=y
-+CONFIG_CRYPTO_HASH2=y
-+CONFIG_CRYPTO_HASH_INFO=y
-+CONFIG_CRYPTO_HMAC=y
-+CONFIG_CRYPTO_HW=y
-+CONFIG_CRYPTO_JITTERENTROPY=y
-+CONFIG_CRYPTO_LIB_SHA256=y
-+CONFIG_CRYPTO_LZO=y
-+CONFIG_CRYPTO_MANAGER=y
-+CONFIG_CRYPTO_MANAGER2=y
-+CONFIG_CRYPTO_NULL2=y
-+CONFIG_CRYPTO_RNG=y
-+CONFIG_CRYPTO_RNG2=y
-+CONFIG_CRYPTO_SHA256=y
-+CONFIG_CRYPTO_ZSTD=y
-+CONFIG_DCACHE_WORD_ACCESS=y
-+CONFIG_DEBUG_GPIO=y
-+CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
-+# CONFIG_DEVFREQ_GOV_PASSIVE is not set
-+# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set
-+# CONFIG_DEVFREQ_GOV_POWERSAVE is not set
-+# CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND is not set
-+# CONFIG_DEVFREQ_GOV_USERSPACE is not set
-+# CONFIG_DEVFREQ_THERMAL is not set
-+CONFIG_DMADEVICES=y
-+CONFIG_DMA_ENGINE=y
-+CONFIG_DMA_OF=y
-+CONFIG_DMA_OPS=y
-+CONFIG_DMA_REMAP=y
-+CONFIG_DMA_VIRTUAL_CHANNELS=y
-+CONFIG_DTC=y
-+CONFIG_DT_IDLE_STATES=y
-+# CONFIG_DWMAC_GENERIC is not set
-+CONFIG_DWMAC_IPQ806X=y
-+# CONFIG_DWMAC_QCOM_ETHQOS is not set
-+CONFIG_DYNAMIC_DEBUG=y
-+CONFIG_EDAC_ATOMIC_SCRUB=y
-+CONFIG_EDAC_SUPPORT=y
-+CONFIG_FIXED_PHY=y
-+CONFIG_FIX_EARLYCON_MEM=y
-+CONFIG_FW_LOADER_PAGED_BUF=y
-+CONFIG_GENERIC_ALLOCATOR=y
-+CONFIG_GENERIC_BUG=y
-+CONFIG_GENERIC_CLOCKEVENTS=y
-+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
-+CONFIG_GENERIC_CPU_AUTOPROBE=y
-+CONFIG_GENERIC_EARLY_IOREMAP=y
-+CONFIG_GENERIC_GETTIMEOFDAY=y
-+CONFIG_GENERIC_IDLE_POLL_SETUP=y
-+CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
-+CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
-+CONFIG_GENERIC_IRQ_SHOW=y
-+CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
-+CONFIG_GENERIC_MSI_IRQ=y
-+CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
-+CONFIG_GENERIC_PCI_IOMAP=y
-+CONFIG_GENERIC_PHY=y
-+CONFIG_GENERIC_PINCONF=y
-+CONFIG_GENERIC_PINCTRL_GROUPS=y
-+CONFIG_GENERIC_PINMUX_FUNCTIONS=y
-+CONFIG_GENERIC_SCHED_CLOCK=y
-+CONFIG_GENERIC_SMP_IDLE_THREAD=y
-+CONFIG_GENERIC_STRNCPY_FROM_USER=y
-+CONFIG_GENERIC_STRNLEN_USER=y
-+CONFIG_GENERIC_TIME_VSYSCALL=y
-+CONFIG_GENERIC_VDSO_32=y
-+CONFIG_GPIOLIB=y
-+CONFIG_GPIOLIB_IRQCHIP=y
-+CONFIG_GRO_CELLS=y
-+CONFIG_HANDLE_DOMAIN_IRQ=y
-+CONFIG_HARDEN_BRANCH_PREDICTOR=y
-+CONFIG_HARDIRQS_SW_RESEND=y
-+CONFIG_HAS_DMA=y
-+CONFIG_HAS_IOMEM=y
-+CONFIG_HAS_IOPORT_MAP=y
-+CONFIG_HAVE_SMP=y
-+CONFIG_HIGHMEM=y
-+# CONFIG_HIGHPTE is not set
-+CONFIG_HWMON=y
-+CONFIG_HWSPINLOCK=y
-+CONFIG_HWSPINLOCK_QCOM=y
-+CONFIG_HW_RANDOM=y
-+CONFIG_HZ=100
-+CONFIG_HZ_100=y
-+CONFIG_HZ_FIXED=0
-+CONFIG_I2C=y
-+CONFIG_I2C_BOARDINFO=y
-+CONFIG_I2C_CHARDEV=y
-+CONFIG_I2C_HELPER_AUTO=y
-+# CONFIG_I2C_QCOM_CCI is not set
-+CONFIG_I2C_QUP=y
-+CONFIG_INITRAMFS_SOURCE=""
-+# CONFIG_IOMMU_DEBUGFS is not set
-+# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
-+# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
-+CONFIG_IOMMU_SUPPORT=y
-+# CONFIG_IPQ_APSS_PLL is not set
-+# CONFIG_IPQ_GCC_4019 is not set
-+# CONFIG_IPQ_GCC_6018 is not set
-+CONFIG_IPQ_GCC_806X=y
-+# CONFIG_IPQ_GCC_8074 is not set
-+# CONFIG_IPQ_LCC_806X is not set
-+CONFIG_IRQCHIP=y
-+CONFIG_IRQ_DOMAIN=y
-+CONFIG_IRQ_DOMAIN_HIERARCHY=y
-+CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y
-+CONFIG_IRQ_FORCED_THREADING=y
-+CONFIG_IRQ_WORK=y
-+CONFIG_KPSS_XCC=y
-+CONFIG_KRAITCC=y
-+CONFIG_KRAIT_CLOCKS=y
-+CONFIG_KRAIT_L2_ACCESSORS=y
-+CONFIG_LIBFDT=y
-+CONFIG_LLD_VERSION=0
-+CONFIG_LOCK_DEBUGGING_SUPPORT=y
-+CONFIG_LOCK_SPIN_ON_OWNER=y
-+CONFIG_LZO_COMPRESS=y
-+CONFIG_LZO_DECOMPRESS=y
-+CONFIG_MDIO_BITBANG=y
-+CONFIG_MDIO_BUS=y
-+CONFIG_MDIO_DEVICE=y
-+CONFIG_MDIO_GPIO=y
-+CONFIG_MDIO_IPQ8064=y
-+# CONFIG_MDM_GCC_9615 is not set
-+# CONFIG_MDM_LCC_9615 is not set
-+CONFIG_MEMFD_CREATE=y
-+# CONFIG_MFD_HI6421_SPMI is not set
-+CONFIG_MFD_QCOM_RPM=y
-+# CONFIG_MFD_SPMI_PMIC is not set
-+CONFIG_MFD_SYSCON=y
-+CONFIG_MIGHT_HAVE_CACHE_L2X0=y
-+CONFIG_MIGRATION=y
-+CONFIG_MMC=y
-+CONFIG_MMC_ARMMMCI=y
-+CONFIG_MMC_BLOCK=y
-+CONFIG_MMC_BLOCK_MINORS=16
-+CONFIG_MMC_CQHCI=y
-+CONFIG_MMC_QCOM_DML=y
-+CONFIG_MMC_SDHCI=y
-+CONFIG_MMC_SDHCI_IO_ACCESSORS=y
-+CONFIG_MMC_SDHCI_MSM=y
-+# CONFIG_MMC_SDHCI_PCI is not set
-+CONFIG_MMC_SDHCI_PLTFM=y
-+# CONFIG_MMC_TIFM_SD is not set
-+CONFIG_MODULES_USE_ELF_REL=y
-+CONFIG_MSM_GCC_8660=y
-+# CONFIG_MSM_GCC_8916 is not set
-+# CONFIG_MSM_GCC_8939 is not set
-+# CONFIG_MSM_GCC_8960 is not set
-+# CONFIG_MSM_GCC_8974 is not set
-+# CONFIG_MSM_GCC_8994 is not set
-+# CONFIG_MSM_GCC_8996 is not set
-+# CONFIG_MSM_GCC_8998 is not set
-+# CONFIG_MSM_GPUCC_8998 is not set
-+# CONFIG_MSM_IOMMU is not set
-+# CONFIG_MSM_LCC_8960 is not set
-+# CONFIG_MSM_MMCC_8960 is not set
-+# CONFIG_MSM_MMCC_8974 is not set
-+# CONFIG_MSM_MMCC_8996 is not set
-+# CONFIG_MSM_MMCC_8998 is not set
-+CONFIG_MTD_CMDLINE_PARTS=y
-+CONFIG_MTD_NAND_CORE=y
-+CONFIG_MTD_NAND_ECC=y
-+CONFIG_MTD_NAND_ECC_SW_HAMMING=y
-+CONFIG_MTD_NAND_QCOM=y
-+CONFIG_MTD_QCOMSMEM_PARTS=y
-+CONFIG_MTD_RAW_NAND=y
-+CONFIG_MTD_SPI_NOR=y
-+CONFIG_MTD_SPLIT_FIRMWARE=y
-+CONFIG_MTD_SPLIT_FIT_FW=y
-+CONFIG_MTD_SPLIT_UIMAGE_FW=y
-+CONFIG_MTD_UBI=y
-+CONFIG_MTD_UBI_BEB_LIMIT=20
-+CONFIG_MTD_UBI_BLOCK=y
-+CONFIG_MTD_UBI_WL_THRESHOLD=4096
-+CONFIG_MUTEX_SPIN_ON_OWNER=y
-+CONFIG_NEED_DMA_MAP_STATE=y
-+CONFIG_NEON=y
-+CONFIG_NET_DEVLINK=y
-+CONFIG_NET_DSA=y
-+CONFIG_NET_DSA_QCA8K=y
-+CONFIG_NET_DSA_TAG_QCA=y
-+CONFIG_NET_FLOW_LIMIT=y
-+CONFIG_NET_PTP_CLASSIFY=y
-+CONFIG_NET_SWITCHDEV=y
-+CONFIG_NLS=y
-+CONFIG_NO_HZ=y
-+CONFIG_NO_HZ_COMMON=y
-+CONFIG_NO_HZ_IDLE=y
-+CONFIG_NR_CPUS=2
-+CONFIG_NVMEM=y
-+# CONFIG_NVMEM_SPMI_SDAM is not set
-+CONFIG_OF=y
-+CONFIG_OF_ADDRESS=y
-+CONFIG_OF_EARLY_FLATTREE=y
-+CONFIG_OF_FLATTREE=y
-+CONFIG_OF_GPIO=y
-+CONFIG_OF_IRQ=y
-+CONFIG_OF_KOBJ=y
-+CONFIG_OF_MDIO=y
-+CONFIG_OF_NET=y
-+CONFIG_OLD_SIGACTION=y
-+CONFIG_OLD_SIGSUSPEND3=y
-+CONFIG_PADATA=y
-+CONFIG_PAGE_OFFSET=0xC0000000
-+CONFIG_PAGE_POOL=y
-+CONFIG_PCI=y
-+CONFIG_PCIEAER=y
-+CONFIG_PCIEPORTBUS=y
-+CONFIG_PCIE_DW=y
-+CONFIG_PCIE_DW_HOST=y
-+CONFIG_PCIE_QCOM=y
-+CONFIG_PCI_DEBUG=y
-+CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
-+CONFIG_PCI_DOMAINS=y
-+CONFIG_PCI_DOMAINS_GENERIC=y
-+CONFIG_PCI_MSI=y
-+CONFIG_PCI_MSI_IRQ_DOMAIN=y
-+CONFIG_PCS_XPCS=y
-+CONFIG_PERF_USE_VMALLOC=y
-+CONFIG_PGTABLE_LEVELS=2
-+CONFIG_PHYLIB=y
-+CONFIG_PHYLINK=y
-+# CONFIG_PHY_QCOM_APQ8064_SATA is not set
-+# CONFIG_PHY_QCOM_IPQ4019_USB is not set
-+CONFIG_PHY_QCOM_IPQ806X_SATA=y
-+# CONFIG_PHY_QCOM_IPQ806X_USB is not set
-+# CONFIG_PHY_QCOM_PCIE2 is not set
-+# CONFIG_PHY_QCOM_QMP is not set
-+# CONFIG_PHY_QCOM_QUSB2 is not set
-+# CONFIG_PHY_QCOM_USB_HS_28NM is not set
-+# CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2 is not set
-+# CONFIG_PHY_QCOM_USB_SS is not set
-+CONFIG_PINCTRL=y
-+# CONFIG_PINCTRL_APQ8064 is not set
-+# CONFIG_PINCTRL_APQ8084 is not set
-+# CONFIG_PINCTRL_IPQ4019 is not set
-+# CONFIG_PINCTRL_IPQ6018 is not set
-+CONFIG_PINCTRL_IPQ8064=y
-+# CONFIG_PINCTRL_IPQ8074 is not set
-+# CONFIG_PINCTRL_MDM9615 is not set
-+CONFIG_PINCTRL_MSM=y
-+# CONFIG_PINCTRL_MSM8226 is not set
-+# CONFIG_PINCTRL_MSM8660 is not set
-+# CONFIG_PINCTRL_MSM8916 is not set
-+# CONFIG_PINCTRL_MSM8960 is not set
-+# CONFIG_PINCTRL_MSM8976 is not set
-+# CONFIG_PINCTRL_MSM8994 is not set
-+# CONFIG_PINCTRL_MSM8996 is not set
-+# CONFIG_PINCTRL_MSM8998 is not set
-+# CONFIG_PINCTRL_QCOM_SPMI_PMIC is not set
-+# CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set
-+# CONFIG_PINCTRL_QCS404 is not set
-+# CONFIG_PINCTRL_SC7180 is not set
-+# CONFIG_PINCTRL_SDM660 is not set
-+# CONFIG_PINCTRL_SDM845 is not set
-+# CONFIG_PINCTRL_SM8150 is not set
-+# CONFIG_PINCTRL_SM8250 is not set
-+CONFIG_PM_DEVFREQ=y
-+# CONFIG_PM_DEVFREQ_EVENT is not set
-+CONFIG_PM_OPP=y
-+CONFIG_POWER_RESET=y
-+CONFIG_POWER_RESET_MSM=y
-+CONFIG_POWER_SUPPLY=y
-+CONFIG_PPS=y
-+CONFIG_PRINTK_TIME=y
-+CONFIG_PTP_1588_CLOCK=y
-+# CONFIG_QCOM_A53PLL is not set
-+CONFIG_QCOM_ADM=y
-+CONFIG_QCOM_BAM_DMA=y
-+CONFIG_QCOM_CLK_RPM=y
-+# CONFIG_QCOM_COMMAND_DB is not set
-+# CONFIG_QCOM_CPR is not set
-+# CONFIG_QCOM_EBI2 is not set
-+# CONFIG_QCOM_GENI_SE is not set
-+CONFIG_QCOM_GSBI=y
-+CONFIG_QCOM_HFPLL=y
-+# CONFIG_QCOM_IOMMU is not set
-+# CONFIG_QCOM_LLCC is not set
-+# CONFIG_QCOM_OCMEM is not set
-+# CONFIG_QCOM_PDC is not set
-+CONFIG_QCOM_QFPROM=y
-+# CONFIG_QCOM_RMTFS_MEM is not set
-+CONFIG_QCOM_RPMCC=y
-+# CONFIG_QCOM_RPMH is not set
-+CONFIG_QCOM_SCM=y
-+# CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is not set
-+CONFIG_QCOM_SMEM=y
-+# CONFIG_QCOM_SMSM is not set
-+# CONFIG_QCOM_SOCINFO is not set
-+CONFIG_QCOM_TCSR=y
-+CONFIG_QCOM_TSENS=y
-+CONFIG_QCOM_WDT=y
-+# CONFIG_QCS_GCC_404 is not set
-+# CONFIG_QCS_Q6SSTOP_404 is not set
-+# CONFIG_QCS_TURING_404 is not set
-+CONFIG_RAS=y
-+CONFIG_RATIONAL=y
-+CONFIG_RCU_CPU_STALL_TIMEOUT=21
-+CONFIG_RCU_NEED_SEGCBLIST=y
-+CONFIG_RCU_STALL_COMMON=y
-+CONFIG_REGMAP=y
-+CONFIG_REGMAP_MMIO=y
-+CONFIG_REGULATOR=y
-+CONFIG_REGULATOR_FIXED_VOLTAGE=y
-+# CONFIG_REGULATOR_QCOM_LABIBB is not set
-+CONFIG_REGULATOR_QCOM_RPM=y
-+# CONFIG_REGULATOR_QCOM_SPMI is not set
-+# CONFIG_REGULATOR_QCOM_USB_VBUS is not set
-+# CONFIG_REGULATOR_VQMMC_IPQ4019 is not set
-+CONFIG_RESET_CONTROLLER=y
-+# CONFIG_RESET_QCOM_AOSS is not set
-+# CONFIG_RESET_QCOM_PDC is not set
-+CONFIG_RFS_ACCEL=y
-+CONFIG_RPS=y
-+CONFIG_RTC_CLASS=y
-+CONFIG_RTC_I2C_AND_SPI=y
-+CONFIG_RTC_MC146818_LIB=y
-+CONFIG_RWSEM_SPIN_ON_OWNER=y
-+# CONFIG_SC_DISPCC_7180 is not set
-+# CONFIG_SC_GCC_7180 is not set
-+# CONFIG_SC_GPUCC_7180 is not set
-+# CONFIG_SC_LPASS_CORECC_7180 is not set
-+# CONFIG_SC_MSS_7180 is not set
-+# CONFIG_SC_VIDEOCC_7180 is not set
-+# CONFIG_SDM_CAMCC_845 is not set
-+# CONFIG_SDM_DISPCC_845 is not set
-+# CONFIG_SDM_GCC_660 is not set
-+# CONFIG_SDM_GCC_845 is not set
-+# CONFIG_SDM_GPUCC_845 is not set
-+# CONFIG_SDM_LPASSCC_845 is not set
-+# CONFIG_SDM_VIDEOCC_845 is not set
-+CONFIG_SERIAL_8250_FSL=y
-+CONFIG_SERIAL_MCTRL_GPIO=y
-+CONFIG_SERIAL_MSM=y
-+CONFIG_SERIAL_MSM_CONSOLE=y
-+CONFIG_SGL_ALLOC=y
-+CONFIG_SMP=y
-+CONFIG_SMP_ON_UP=y
-+# CONFIG_SM_GCC_8150 is not set
-+# CONFIG_SM_GCC_8250 is not set
-+# CONFIG_SM_GPUCC_8150 is not set
-+# CONFIG_SM_GPUCC_8250 is not set
-+# CONFIG_SM_VIDEOCC_8150 is not set
-+# CONFIG_SM_VIDEOCC_8250 is not set
-+CONFIG_SPARSE_IRQ=y
-+CONFIG_SPI=y
-+CONFIG_SPI_MASTER=y
-+CONFIG_SPI_MEM=y
-+CONFIG_SPI_QUP=y
-+CONFIG_SPMI=y
-+# CONFIG_SPMI_HISI3670 is not set
-+CONFIG_SPMI_MSM_PMIC_ARB=y
-+# CONFIG_SPMI_PMIC_CLKDIV is not set
-+CONFIG_SRCU=y
-+CONFIG_STMMAC_ETH=y
-+CONFIG_STMMAC_PLATFORM=y
-+# CONFIG_STMMAC_SELFTESTS is not set
-+CONFIG_SWCONFIG=y
-+CONFIG_SWCONFIG_LEDS=y
-+CONFIG_SWPHY=y
-+CONFIG_SWP_EMULATE=y
-+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-+CONFIG_THERMAL=y
-+CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
-+CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
-+CONFIG_THERMAL_GOV_STEP_WISE=y
-+CONFIG_THERMAL_HWMON=y
-+CONFIG_THERMAL_OF=y
-+CONFIG_TICK_CPU_ACCOUNTING=y
-+CONFIG_TIMER_OF=y
-+CONFIG_TIMER_PROBE=y
-+CONFIG_TREE_RCU=y
-+CONFIG_TREE_SRCU=y
-+CONFIG_UBIFS_FS=y
-+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
-+CONFIG_UBIFS_FS_LZO=y
-+CONFIG_UBIFS_FS_ZLIB=y
-+CONFIG_UBIFS_FS_ZSTD=y
-+# CONFIG_UCLAMP_TASK is not set
-+CONFIG_UEVENT_HELPER_PATH=""
-+CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
-+CONFIG_UNWINDER_ARM=y
-+CONFIG_USB=y
-+CONFIG_USB_COMMON=y
-+CONFIG_USB_SUPPORT=y
-+CONFIG_USE_OF=y
-+CONFIG_VFP=y
-+CONFIG_VFPv3=y
-+CONFIG_WATCHDOG_CORE=y
-+CONFIG_XPS=y
-+CONFIG_XXHASH=y
-+CONFIG_XZ_DEC_ARM=y
-+CONFIG_XZ_DEC_BCJ=y
-+CONFIG_ZBOOT_ROM_BSS=0
-+CONFIG_ZBOOT_ROM_TEXT=0
-+CONFIG_ZLIB_DEFLATE=y
-+CONFIG_ZLIB_INFLATE=y
-+CONFIG_ZSTD_COMPRESS=y
-+CONFIG_ZSTD_DECOMPRESS=y
-diff --git a/target/linux/ipq806x/config-5.4 b/target/linux/ipq806x/config-5.4
-index 68ed6ec0c7..fd42d371fe 100644
---- a/target/linux/ipq806x/config-5.4
-+++ b/target/linux/ipq806x/config-5.4
-@@ -4,22 +4,6 @@ CONFIG_ALIGNMENT_TRAP=y
- CONFIG_AR8216_PHY=y
- CONFIG_ARCH_32BIT_OFF_T=y
- CONFIG_ARCH_CLOCKSOURCE_DATA=y
--CONFIG_ARCH_HAS_BINFMT_FLAT=y
--CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
--CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
--CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
--CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
--CONFIG_ARCH_HAS_KCOV=y
--CONFIG_ARCH_HAS_KEEPINITRD=y
--CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
--CONFIG_ARCH_HAS_PHYS_TO_DMA=y
--CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
--CONFIG_ARCH_HAS_SET_MEMORY=y
--CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
--CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
--CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y
--CONFIG_ARCH_HAS_TICK_BROADCAST=y
--CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
- CONFIG_ARCH_HIBERNATION_POSSIBLE=y
- CONFIG_ARCH_KEEP_MEMBLOCK=y
- # CONFIG_ARCH_MDM9615 is not set
-@@ -34,15 +18,7 @@ CONFIG_ARCH_NR_GPIO=0
- CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
- CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
- CONFIG_ARCH_QCOM=y
--CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
--CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y
--CONFIG_ARCH_SUPPORTS_UPROBES=y
- CONFIG_ARCH_SUSPEND_POSSIBLE=y
--CONFIG_ARCH_USE_BUILTIN_BSWAP=y
--CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
--CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
--CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
--CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
- CONFIG_ARM=y
- CONFIG_ARM_AMBA=y
- CONFIG_ARM_APPENDED_DTB=y
-@@ -62,6 +38,7 @@ CONFIG_ARM_MODULE_PLTS=y
- CONFIG_ARM_PATCH_IDIV=y
- CONFIG_ARM_PATCH_PHYS_VIRT=y
- # CONFIG_ARM_QCOM_CPUFREQ_HW is not set
-+CONFIG_ARM_QCOM_CPUFREQ_KRAIT=y
- CONFIG_ARM_QCOM_CPUFREQ_NVMEM=y
- CONFIG_ARM_QCOM_CPUIDLE=y
- # CONFIG_ARM_SMMU is not set
-@@ -74,7 +51,6 @@ CONFIG_BLK_DEV_LOOP=y
- CONFIG_BLK_MQ_PCI=y
- CONFIG_BOUNCE=y
- # CONFIG_CACHE_L2X0 is not set
--CONFIG_CC_HAS_KASAN_GENERIC=y
- CONFIG_CLKDEV_LOOKUP=y
- CONFIG_CLKSRC_QCOM=y
- CONFIG_CLONE_BACKWARDS=y
-@@ -195,56 +171,13 @@ CONFIG_HARDIRQS_SW_RESEND=y
- CONFIG_HAS_DMA=y
- CONFIG_HAS_IOMEM=y
- CONFIG_HAS_IOPORT_MAP=y
--CONFIG_HAVE_ARCH_AUDITSYSCALL=y
--CONFIG_HAVE_ARCH_BITREVERSE=y
--CONFIG_HAVE_ARCH_JUMP_LABEL=y
--CONFIG_HAVE_ARCH_KGDB=y
--CONFIG_HAVE_ARCH_PFN_VALID=y
--CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
--CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
--CONFIG_HAVE_ARCH_TRACEHOOK=y
--CONFIG_HAVE_ARM_ARCH_TIMER=y
--CONFIG_HAVE_ARM_SMCCC=y
--CONFIG_HAVE_CLK=y
--CONFIG_HAVE_CLK_PREPARE=y
--CONFIG_HAVE_CONTEXT_TRACKING=y
--CONFIG_HAVE_COPY_THREAD_TLS=y
--CONFIG_HAVE_C_RECORDMCOUNT=y
--CONFIG_HAVE_DEBUG_KMEMLEAK=y
--CONFIG_HAVE_DMA_CONTIGUOUS=y
--CONFIG_HAVE_DYNAMIC_FTRACE=y
--CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
--CONFIG_HAVE_EBPF_JIT=y
--CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
--CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
--CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
--CONFIG_HAVE_FUNCTION_TRACER=y
--CONFIG_HAVE_IDE=y
--CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
--CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
--CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
--CONFIG_HAVE_NET_DSA=y
--CONFIG_HAVE_OPROFILE=y
--CONFIG_HAVE_OPTPROBES=y
--CONFIG_HAVE_PCI=y
--CONFIG_HAVE_PERF_EVENTS=y
--CONFIG_HAVE_PERF_REGS=y
--CONFIG_HAVE_PERF_USER_STACK_DUMP=y
--CONFIG_HAVE_PROC_CPU=y
--CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
--CONFIG_HAVE_RSEQ=y
- CONFIG_HAVE_SMP=y
--CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
--CONFIG_HAVE_UID16=y
--CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
- CONFIG_HIGHMEM=y
- # CONFIG_HIGHPTE is not set
- CONFIG_HWMON=y
- CONFIG_HWSPINLOCK=y
- CONFIG_HWSPINLOCK_QCOM=y
- CONFIG_HW_RANDOM=y
--CONFIG_HZ=100
--CONFIG_HZ_100=y
- CONFIG_HZ_FIXED=0
- CONFIG_I2C=y
- CONFIG_I2C_BOARDINFO=y
-@@ -315,7 +248,7 @@ CONFIG_MTD_CMDLINE_PARTS=y
- CONFIG_MTD_NAND_CORE=y
- CONFIG_MTD_NAND_ECC_SW_HAMMING=y
- CONFIG_MTD_NAND_QCOM=y
--CONFIG_MTD_QCOM_SMEM_PARTS=y
-+CONFIG_MTD_QCOMSMEM_PARTS=y
- CONFIG_MTD_RAW_NAND=y
- CONFIG_MTD_SPI_NOR=y
- CONFIG_MTD_SPLIT_FIRMWARE=y
-@@ -341,6 +274,7 @@ CONFIG_NO_HZ_COMMON=y
- CONFIG_NO_HZ_IDLE=y
- CONFIG_NR_CPUS=2
- CONFIG_NVMEM=y
-+# CONFIG_NVME_TCP is not set
- CONFIG_OF=y
- CONFIG_OF_ADDRESS=y
- CONFIG_OF_EARLY_FLATTREE=y
-@@ -373,6 +307,7 @@ CONFIG_PHYLIB=y
- CONFIG_PHYLINK=y
- # CONFIG_PHY_QCOM_APQ8064_SATA is not set
- CONFIG_PHY_QCOM_IPQ806X_SATA=y
-+# CONFIG_PHY_QCOM_IPQ806X_USB is not set
- # CONFIG_PHY_QCOM_PCIE2 is not set
- # CONFIG_PHY_QCOM_QMP is not set
- # CONFIG_PHY_QCOM_QUSB2 is not set
-@@ -498,10 +433,6 @@ CONFIG_TIMER_PROBE=y
- CONFIG_TREE_RCU=y
- CONFIG_TREE_SRCU=y
- CONFIG_UBIFS_FS=y
--CONFIG_UBIFS_FS_ADVANCED_COMPR=y
--CONFIG_UBIFS_FS_LZO=y
--CONFIG_UBIFS_FS_ZLIB=y
--CONFIG_UBIFS_FS_ZSTD=y
- # CONFIG_UCLAMP_TASK is not set
- CONFIG_UEVENT_HELPER_PATH=""
- CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts
-index d234b94a46..c6feb71a8e 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts
-@@ -33,12 +33,16 @@
- 			label = "reset";
- 			gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RESTART>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		wps {
- 			label = "wps";
- 			gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_WPS_BUTTON>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		mode0 {
-@@ -46,6 +50,8 @@
- 			gpios = <&qcom_pinmux 40 GPIO_ACTIVE_LOW>;
- 			linux,code = <BTN_0>;
- 			linux,input-type = <EV_SW>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		mode1 {
-@@ -53,6 +59,8 @@
- 			gpios = <&qcom_pinmux 41 GPIO_ACTIVE_LOW>;
- 			linux,code = <BTN_1>;
- 			linux,input-type = <EV_SW>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 	};
- 
-@@ -408,7 +416,8 @@
- 	phy-mode = "rgmii";
- 	qcom,id = <1>;
- 	mdiobus = <&mdio0>;
--	mtd-mac-address = <&factory 0x0>;
-+	nvmem-cells = <&macaddr_factory_0>;
-+	nvmem-cell-names = "mac-address";
- 
- 	fixed-link {
- 		speed = <1000>;
-@@ -421,10 +430,25 @@
- 	phy-mode = "sgmii";
- 	qcom,id = <2>;
- 	mdiobus = <&mdio0>;
--	mtd-mac-address = <&factory 0x6>;
-+	nvmem-cells = <&macaddr_factory_6>;
-+	nvmem-cell-names = "mac-address";
- 
- 	fixed-link {
- 		speed = <1000>;
- 		full-duplex;
- 	};
- };
-+
-+&factory {
-+	compatible = "nvmem-cells";
-+	#address-cells = <1>;
-+	#size-cells = <1>;
-+
-+	macaddr_factory_0: macaddr@0 {
-+		reg = <0x0 0x6>;
-+	};
-+
-+	macaddr_factory_6: macaddr@6 {
-+		reg = <0x6 0x6>;
-+	};
-+};
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062.dtsi
-index caef2bc824..4b007130aa 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062.dtsi
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062.dtsi
-@@ -14,14 +14,6 @@
- 		stdout-path = "serial0:115200n8";
- 	};
- 
--	cpus {
--		qcom,l2 {
--			qcom,l2-rates = <384000000 1000000000 1000000000>;
--			qcom,l2-cpufreq = <384000000 600000000 1000000000>;
--			qcom,l2-volt = <1100000 1100000 1100000>;
--		};
--	};
--
- 	reserved-memory {
- 		#address-cells = <1>;
- 		#size-cells = <1>;
-@@ -54,31 +46,31 @@
- 	/delete-node/opp-1400000000;
- 
- 	opp-384000000 {
--		opp-microvolt-speed0-pvs0-v0 = <950000>;
--		opp-microvolt-speed0-pvs1-v0 = <900000>;
--		opp-microvolt-speed0-pvs2-v0 = <850000>;
--		opp-microvolt-speed0-pvs3-v0 = <800000>;
-+		opp-microvolt-speed0-pvs0-v0 = <902500 950000 997500>;
-+		opp-microvolt-speed0-pvs1-v0 = <855000 900000 945000>;
-+		opp-microvolt-speed0-pvs2-v0 = <807500 850000 892500>;
-+		opp-microvolt-speed0-pvs3-v0 = <760000 800000 840000>;
- 	};
- 
- 	opp-600000000 {
--		opp-microvolt-speed0-pvs0-v0 = <1000000>;
--		opp-microvolt-speed0-pvs1-v0 = <950000>;
--		opp-microvolt-speed0-pvs2-v0 = <900000>;
--		opp-microvolt-speed0-pvs3-v0 = <850000>;
-+		opp-microvolt-speed0-pvs0-v0 = <950000 1000000 1050000>;
-+		opp-microvolt-speed0-pvs1-v0 = <945000  950000  955000>;
-+		opp-microvolt-speed0-pvs2-v0 = <895000  900000  905000>;
-+		opp-microvolt-speed0-pvs3-v0 = <845000  850000  855000>;
- 	};
- 
- 	opp-800000000 {
--		opp-microvolt-speed0-pvs0-v0 = <1050000>;
--		opp-microvolt-speed0-pvs1-v0 = <1000000>;
--		opp-microvolt-speed0-pvs2-v0 = <950000>;
--		opp-microvolt-speed0-pvs3-v0 = <900000>;
-+		opp-microvolt-speed0-pvs0-v0 = <997500 1050000 1102500>;
-+		opp-microvolt-speed0-pvs1-v0 = < 995000 1000000 1005000>;
-+		opp-microvolt-speed0-pvs2-v0 = < 945000  950000  955000>;
-+		opp-microvolt-speed0-pvs3-v0 = < 895000  900000  905000>;
- 	};
- 
- 	opp-1000000000 {
--		opp-microvolt-speed0-pvs0-v0 = <1100000>;
--		opp-microvolt-speed0-pvs1-v0 = <1050000>;
--		opp-microvolt-speed0-pvs2-v0 = <1000000>;
--		opp-microvolt-speed0-pvs3-v0 = <950000>;
-+		opp-microvolt-speed0-pvs0-v0 = <1045000 1100000 1155000>;
-+		opp-microvolt-speed0-pvs1-v0 = <997500 1050000 1102500>;
-+		opp-microvolt-speed0-pvs2-v0 = < 995000 1000000 1005000>;
-+		opp-microvolt-speed0-pvs3-v0 = < 945000  950000  955000>;
- 	};
- };
- 
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi
-index af0efb2565..daa7b148cc 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi
-@@ -288,8 +288,9 @@
- 	pinctrl-0 = <&rgmii2_pins>;
- 	pinctrl-names = "default";
- 
--	mtd-mac-address = <&defaultmac 0x8>;
--	mtd-mac-address-increment = <1>;
-+	nvmem-cells = <&macaddr_defaultmac_8>;
-+	nvmem-cell-names = "mac-address";
-+	mac-address-increment = <1>;
- 
- 	fixed-link {
- 		speed = <1000>;
-@@ -302,7 +303,8 @@
- 	phy-mode = "sgmii";
- 	qcom,id = <2>;
- 
--	mtd-mac-address = <&defaultmac 0x8>;
-+	nvmem-cells = <&macaddr_defaultmac_8>;
-+	nvmem-cell-names = "mac-address";
- 
- 	fixed-link {
- 		speed = <1000>;
-@@ -313,3 +315,13 @@
- &adm_dma {
- 	status = "okay";
- };
-+
-+&defaultmac {
-+	compatible = "nvmem-cells";
-+	#address-cells = <1>;
-+	#size-cells = <1>;
-+
-+	macaddr_defaultmac_8: macaddr@8 {
-+		reg = <0x8 0x6>;
-+	};
-+};
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts
-index 9ccf3d74ac..6cb21fc4f3 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts
-@@ -22,24 +22,32 @@
- 			label = "wifi";
- 			gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RFKILL>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		reset {
- 			label = "reset";
- 			gpios = <&qcom_pinmux 7 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RESTART>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		wps {
- 			label = "wps";
- 			gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_WPS_BUTTON>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		led_enable {
- 			label = "led-enable";
- 			gpios = <&qcom_pinmux 53 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_LIGHTS_TOGGLE>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 	};
- 
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
-index b2fdc427e2..29476e3877 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
-@@ -30,7 +30,7 @@
- 
- &flash {
- 	partitions {
--		compatible = "qcom,smem";
-+		compatible = "qcom,smem-part";
- 	};
- };
- 
-@@ -66,7 +66,7 @@
- 		nand-ecc-step-size = <512>;
- 
- 		partitions {
--			compatible = "qcom,smem";
-+			compatible = "qcom,smem-part";
- 		};
- 	};
- };
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap161.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap161.dts
-index 6ba3d70808..914c370552 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap161.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap161.dts
-@@ -38,7 +38,7 @@
- 
- &flash {
- 	partitions {
--		compatible = "qcom,smem";
-+		compatible = "qcom,smem-part";
- 	};
- };
- 
-@@ -78,7 +78,7 @@
- 		nand-ecc-step-size = <512>;
- 
- 		partitions {
--			compatible = "qcom,smem";
-+			compatible = "qcom,smem-part";
- 		};
- 	};
- };
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-c2600.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
-index 3f2a90fdee..cef1aba344 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
-@@ -20,24 +20,32 @@
- 			label = "wifi";
- 			gpios = <&qcom_pinmux 49 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RFKILL>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		reset {
- 			label = "reset";
- 			gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RESTART>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		wps {
- 			label = "wps";
- 			gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_WPS_BUTTON>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		ledswitch {
- 			label = "ledswitch";
- 			gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_LIGHTS_TOGGLE>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 	};
- 
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
-index 229596b082..6e022cece0 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
-@@ -33,18 +33,24 @@
- 			label = "wifi";
- 			gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RFKILL>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		reset {
- 			label = "reset";
- 			gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RESTART>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		wps {
- 			label = "wps";
- 			gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_WPS_BUTTON>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 	};
- 
-@@ -196,6 +202,9 @@
- 		nand-bus-width = <8>;
- 		nand-ecc-step-size = <512>;
- 
-+		nand-is-boot-medium;
-+		qcom,boot_pages_size = <0x1180000>;
-+
- 		partitions {
- 			compatible = "fixed-partitions";
- 			#address-cells = <1>;
-@@ -288,7 +297,8 @@
- 	pinctrl-0 = <&rgmii2_pins>;
- 	pinctrl-names = "default";
- 
--	mtd-mac-address = <&art 6>;
-+	nvmem-cells = <&macaddr_art_6>;
-+	nvmem-cell-names = "mac-address";
- 
- 	fixed-link {
- 		speed = <1000>;
-@@ -301,7 +311,8 @@
- 	phy-mode = "sgmii";
- 	qcom,id = <2>;
- 
--	mtd-mac-address = <&art 0>;
-+	nvmem-cells = <&macaddr_art_0>;
-+	nvmem-cell-names = "mac-address";
- 
- 	fixed-link {
- 		speed = <1000>;
-@@ -312,3 +323,17 @@
- &adm_dma {
- 	status = "okay";
- };
-+
-+&art {
-+	compatible = "nvmem-cells";
-+	#address-cells = <1>;
-+	#size-cells = <1>;
-+
-+	macaddr_art_0: macaddr@0 {
-+		reg = <0x0 0x6>;
-+	};
-+
-+	macaddr_art_6: macaddr@6 {
-+		reg = <0x6 0x6>;
-+	};
-+};
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts
-index 176807163e..9d82d52d27 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts
-@@ -32,12 +32,16 @@
- 			label = "reset";
- 			gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RESTART>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		wps {
- 			label = "wps";
- 			gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_WPS_BUTTON>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 	};
- 
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
-index 9b01ae0328..1c6a4bdacd 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
-@@ -27,18 +27,24 @@
- 			label = "wifi";
- 			gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RFKILL>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		reset {
- 			label = "reset";
- 			gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RESTART>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		wps {
- 			label = "wps";
- 			gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_WPS_BUTTON>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 	};
- 
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi
-index 3e6732e9df..98c4b2d29d 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi
-@@ -48,6 +48,9 @@
- 		nand-bus-width = <8>;
- 		nand-ecc-step-size = <512>;
- 
-+		nand-is-boot-medium;
-+		qcom,boot_pages_size = <0x0c80000>;
-+
- 		partitions: partitions {
- 			compatible = "fixed-partitions";
- 			#address-cells = <1>;
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-g10.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-g10.dts
-index 15ed5b4773..45efb2b46f 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-g10.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-g10.dts
-@@ -86,24 +86,32 @@
- 			label = "ir-remote";
- 			gpios = <&qcom_pinmux 15 GPIO_ACTIVE_LOW>;
- 			linux,code = <BTN_0>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		reset {
- 			label = "reset";
- 			gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RESTART>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		wps5g {
- 			label = "wps5g";
- 			gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_WPS_BUTTON>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		wps2g {
- 			label = "wps2g";
- 			gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_WPS_BUTTON>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 	};
- };
-@@ -179,7 +187,7 @@
- 		nand-ecc-step-size = <512>;
- 
- 		partitions {
--			compatible = "qcom,smem";
-+			compatible = "qcom,smem-part";
- 		};
- 	};
- };
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
-index ed8ab3dbfa..c7d26a0772 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
-@@ -44,18 +44,24 @@
- 			label = "wifi";
- 			gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RFKILL>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		reset {
- 			label = "reset";
- 			gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RESTART>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		wps {
- 			label = "wps";
- 			gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_WPS_BUTTON>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 	};
- 
-@@ -174,6 +180,9 @@
- 		nand-bus-width = <8>;
- 		nand-ecc-step-size = <512>;
- 
-+		nand-is-boot-medium;
-+		qcom,boot_pages_size = <0x1180000>;
-+
- 		partitions {
- 			compatible = "fixed-partitions";
- 			#address-cells = <1>;
-@@ -260,7 +269,8 @@
- 	pinctrl-0 = <&rgmii2_pins>;
- 	pinctrl-names = "default";
- 
--	mtd-mac-address = <&art 6>;
-+	nvmem-cells = <&macaddr_art_6>;
-+	nvmem-cell-names = "mac-address";
- 
- 	fixed-link {
- 		speed = <1000>;
-@@ -273,7 +283,8 @@
- 	phy-mode = "sgmii";
- 	qcom,id = <2>;
- 
--	mtd-mac-address = <&art 0>;
-+	nvmem-cells = <&macaddr_art_0>;
-+	nvmem-cell-names = "mac-address";
- 
- 	fixed-link {
- 		speed = <1000>;
-@@ -289,3 +300,17 @@
- &adm_dma {
- 	status = "okay";
- };
-+
-+&art {
-+	compatible = "nvmem-cells";
-+	#address-cells = <1>;
-+	#size-cells = <1>;
-+
-+	macaddr_art_0: macaddr@0 {
-+		reg = <0x0 0x6>;
-+	};
-+
-+	macaddr_art_6: macaddr@6 {
-+		reg = <0x6 0x6>;
-+	};
-+};
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
-index 20a1fad7b2..0f22480434 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
-@@ -40,18 +40,24 @@
- 			label = "wifi";
- 			gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RFKILL>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		reset {
- 			label = "reset";
- 			gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RESTART>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		wps {
- 			label = "wps";
- 			gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_WPS_BUTTON>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 	};
- 
-@@ -204,6 +210,9 @@
- 		nand-bus-width = <8>;
- 		nand-ecc-step-size = <512>;
- 
-+		nand-is-boot-medium;
-+		qcom,boot_pages_size = <0x1180000>;
-+
- 		partitions {
- 			compatible = "fixed-partitions";
- 			#address-cells = <1>;
-@@ -290,7 +299,8 @@
- 	pinctrl-0 = <&rgmii2_pins>;
- 	pinctrl-names = "default";
- 
--	mtd-mac-address = <&art 6>;
-+	nvmem-cells = <&macaddr_art_6>;
-+	nvmem-cell-names = "mac-address";
- 
- 	fixed-link {
- 		speed = <1000>;
-@@ -303,10 +313,25 @@
- 	phy-mode = "sgmii";
- 	qcom,id = <2>;
- 
--	mtd-mac-address = <&art 0>;
-+	nvmem-cells = <&macaddr_art_0>;
-+	nvmem-cell-names = "mac-address";
- 
- 	fixed-link {
- 		speed = <1000>;
- 		full-duplex;
- 	};
--};
-\ No newline at end of file
-+};
-+
-+&art {
-+	compatible = "nvmem-cells";
-+	#address-cells = <1>;
-+	#size-cells = <1>;
-+
-+	macaddr_art_0: macaddr@0 {
-+		reg = <0x0 0x6>;
-+	};
-+
-+	macaddr_art_6: macaddr@6 {
-+		reg = <0x6 0x6>;
-+	};
-+};
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts
-index 7c2d6c9d13..a50204fee1 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts
-@@ -16,6 +16,8 @@
- 		led-running = &led_dome_blue;
- 		led-upgrade = &led_dome_blue;
- 		mdio-gpio0 = &mdio0;
-+		ethernet0 = &gmac2;
-+		ethernet1 = &gmac1;
- 	};
- 
- 	leds {
-@@ -44,6 +46,7 @@
- 			gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RESTART>;
- 			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 	};
- };
-@@ -229,38 +232,38 @@
- 
- 	pinctrl-0 = <&mdio0_pins>;
- 	pinctrl-names = "default";
--};
--
--&gmac2 {
--	status = "okay";
- 
--	phy-mode = "sgmii";
--	qcom,id = <2>;
--	qcom,emulation = <0>;
--	mdiobus = <&mdio0>;
--
--	mtd-mac-address = <&eeprom 0x0>;
-+	phy4: ethernet-phy@4 {
-+		reg = <4>;
-+	};
- 
--	fixed-link {
--		speed = <1000>;
--		full-duplex;
-+	phy5: ethernet-phy@5 {
-+		reg = <5>;
- 	};
- };
- 
- &gmac1 {
- 	status = "okay";
- 
-+	mdiobus = <&mdio0>;
-+	phy-handle = <&phy5>;
- 	phy-mode = "sgmii";
- 	qcom,id = <1>;
--	qcom,emulation = <0>;
--	mdiobus = <&mdio0>;
- 
--	mtd-mac-address = <&eeprom 0x6>;
-+	nvmem-cells = <&macaddr_eeprom_6>;
-+	nvmem-cell-names = "mac-address";
-+};
- 
--	fixed-link {
--		speed = <1000>;
--		full-duplex;
--	};
-+&gmac2 {
-+	status = "okay";
-+
-+	mdiobus = <&mdio0>;
-+	phy-handle = <&phy4>;
-+	phy-mode = "sgmii";
-+	qcom,id = <2>;
-+
-+	nvmem-cells = <&macaddr_eeprom_0>;
-+	nvmem-cell-names = "mac-address";
- };
- 
- &pcie0 {
-@@ -298,3 +301,17 @@
- &usb3_1 {
- 	status = "okay";
- };
-+
-+&eeprom {
-+	compatible = "nvmem-cells";
-+	#address-cells = <1>;
-+	#size-cells = <1>;
-+
-+	macaddr_eeprom_0: macaddr@0 {
-+		reg = <0x0 0x6>;
-+	};
-+
-+	macaddr_eeprom_6: macaddr@6 {
-+		reg = <0x6 0x6>;
-+	};
-+};
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
-index ea7d0235ce..54ae07590a 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
-@@ -29,30 +29,40 @@
- 			label = "wifi";
- 			gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RFKILL>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		reset {
- 			label = "reset";
- 			gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RESTART>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		wps {
- 			label = "wps";
- 			gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_WPS_BUTTON>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		dect {
- 			label = "dect";
- 			gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_PHONE>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		ledswitch {
- 			label = "ledswitch";
- 			gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_LIGHTS_TOGGLE>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 	};
- 
-@@ -313,8 +323,9 @@
- 	pinctrl-0 = <&rgmii2_pins>;
- 	pinctrl-names = "default";
- 
--	mtd-mac-address = <&defaultmac 0>;
--	mtd-mac-address-increment = <1>;
-+	nvmem-cells = <&macaddr_defaultmac_0>;
-+	nvmem-cell-names = "mac-address";
-+	mac-address-increment = <1>;
- 
- 	fixed-link {
- 		speed = <1000>;
-@@ -327,7 +338,8 @@
- 	phy-mode = "sgmii";
- 	qcom,id = <2>;
- 
--	mtd-mac-address = <&defaultmac 0>;
-+	nvmem-cells = <&macaddr_defaultmac_0>;
-+	nvmem-cell-names = "mac-address";
- 
- 	fixed-link {
- 		speed = <1000>;
-@@ -338,3 +350,13 @@
- &adm_dma {
- 	status = "okay";
- };
-+
-+&defaultmac {
-+	compatible = "nvmem-cells";
-+	#address-cells = <1>;
-+	#size-cells = <1>;
-+
-+	macaddr_defaultmac_0: macaddr@0 {
-+		reg = <0x0 0x6>;
-+	};
-+};
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts
-index 23898e0221..7148fdf143 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts
-@@ -29,12 +29,16 @@
- 			label = "wps";
- 			gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_WPS_BUTTON>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		reset {
- 			label = "reset";
- 			gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RESTART>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		bridge {
-@@ -42,6 +46,8 @@
- 			gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
- 			linux,code = <BTN_0>;
- 			linux,input-type = <EV_SW>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		converter {
-@@ -49,6 +55,8 @@
- 			gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
- 			linux,code = <BTN_0>;
- 			linux,input-type = <EV_SW>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 	};
- 
-@@ -159,7 +167,8 @@
- 	pinctrl-0 = <&rgmii2_pins>;
- 	pinctrl-names = "default";
- 
--	mtd-mac-address = <&PRODUCTDATA 6>;
-+	nvmem-cells = <&macaddr_PRODUCTDATA_6>;
-+	nvmem-cell-names = "mac-address";
- 
- 	fixed-link {
- 		speed = <1000>;
-@@ -173,7 +182,8 @@
- 	phy-mode = "sgmii";
- 	qcom,id = <2>;
- 
--	mtd-mac-address = <&PRODUCTDATA 0>;
-+	nvmem-cells = <&macaddr_PRODUCTDATA_0>;
-+	nvmem-cell-names = "mac-address";
- 
- 	fixed-link {
- 		speed = <1000>;
-@@ -372,3 +382,17 @@
- 		};
- 	};
- };
-+
-+&PRODUCTDATA {
-+	compatible = "nvmem-cells";
-+	#address-cells = <1>;
-+	#size-cells = <1>;
-+
-+	macaddr_PRODUCTDATA_0: macaddr@0 {
-+		reg = <0x0 0x6>;
-+	};
-+
-+	macaddr_PRODUCTDATA_6: macaddr@6 {
-+		reg = <0x6 0x6>;
-+	};
-+};
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts
-index ba3f51e446..ec5d5047aa 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts
-@@ -83,6 +83,8 @@
- 			label = "reset";
- 			gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RESTART>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 	};
- 
-@@ -116,6 +118,9 @@
- 		nand-bus-width = <8>;
- 		nand-ecc-step-size = <512>;
- 
-+		nand-is-boot-medium;
-+		qcom,boot_pages_size = <0x1180000>;
-+
- 		partitions {
- 			compatible = "fixed-partitions";
- 			#address-cells = <1>;
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts
-index d80bfa204d..1cf5e3452f 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts
-@@ -91,30 +91,40 @@
- 			label = "power";
- 			gpios = <&qcom_pinmux 58 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_POWER>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		reset {
- 			label = "reset";
- 			gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RESTART>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		wps {
- 			label = "wps";
- 			gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_WPS_BUTTON>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		eject {
- 			label = "eject";
- 			gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_EJECTCD>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		guest {
- 			label = "guest";
- 			gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
- 			linux,code = <BTN_0>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		ap {
-@@ -122,6 +132,8 @@
- 			gpios = <&qcom_pinmux 55 GPIO_ACTIVE_LOW>;
- 			linux,code = <BTN_1>;
- 			linux,input-type = <EV_SW>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		router {
-@@ -129,6 +141,8 @@
- 			gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>;
- 			linux,code = <BTN_1>;
- 			linux,input-type = <EV_SW>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		auto {
-@@ -136,6 +150,8 @@
- 			gpios = <&qcom_pinmux 57 GPIO_ACTIVE_LOW>;
- 			linux,code = <BTN_1>;
- 			linux,input-type = <EV_SW>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 	};
- };
-@@ -213,7 +229,8 @@
- 	pinctrl-0 = <&rgmii2_pins>;
- 	pinctrl-names = "default";
- 
--	mtd-mac-address = <&ART 6>;
-+	nvmem-cells = <&macaddr_ART_6>;
-+	nvmem-cell-names = "mac-address";
- 
- 	fixed-link {
- 		speed = <1000>;
-@@ -227,7 +244,8 @@
- 	phy-mode = "sgmii";
- 	qcom,id = <2>;
- 
--	mtd-mac-address = <&ART 0>;
-+	nvmem-cells = <&macaddr_ART_0>;
-+	nvmem-cell-names = "mac-address";
- 
- 	fixed-link {
- 		speed = <1000>;
-@@ -447,4 +465,18 @@
- 			output-high;
- 		};
- 	};
--};
-\ No newline at end of file
-+};
-+
-+&ART {
-+	compatible = "nvmem-cells";
-+	#address-cells = <1>;
-+	#size-cells = <1>;
-+
-+	macaddr_ART_0: macaddr@0 {
-+		reg = <0x0 0x6>;
-+	};
-+
-+	macaddr_ART_6: macaddr@6 {
-+		reg = <0x6 0x6>;
-+	};
-+};
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
-index 2573349f55..969ca724e3 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
-@@ -22,7 +22,7 @@
- 	};
- 
- 	chosen {
--		bootargs = "rootfstype=squashfs,ext4 rootwait noinitrd";
-+		bootargs = "rootfstype=squashfs,ext4 rootwait noinitrd fstools_ignore_partname=1";
- 		append-rootblock = "root=/dev/mmcblk0p";
- 	};
- 
-@@ -36,18 +36,24 @@
- 			gpios = <&qcom_pinmux 53 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RFKILL>;
- 			linux,input-type = <EV_SW>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		reset {
- 			label = "reset";
- 			gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RESTART>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 
- 		wps {
- 			label = "wps";
- 			gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_WPS_BUTTON>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 	};
- 
-@@ -182,7 +188,7 @@
- 			reg = <0>;
- 
- 			partitions {
--				compatible = "qcom,smem";
-+				compatible = "qcom,smem-part";
- 			};
- 		};
- 	};
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-r7800.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-r7800.dts
-index 181f6d3bde..b12e348145 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-r7800.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-r7800.dts
-@@ -240,6 +240,9 @@
- 		nand-bus-width = <8>;
- 		nand-ecc-step-size = <512>;
- 
-+		nand-is-boot-medium;
-+		qcom,boot_pages_size = <0x1180000>;
-+
- 		partitions {
- 			compatible = "fixed-partitions";
- 			#address-cells = <1>;
-@@ -355,7 +358,8 @@
- 	pinctrl-0 = <&rgmii2_pins>;
- 	pinctrl-names = "default";
- 
--	mtd-mac-address = <&art 6>;
-+	nvmem-cells = <&macaddr_art_6>;
-+	nvmem-cell-names = "mac-address";
- 
- 	fixed-link {
- 		speed = <1000>;
-@@ -375,7 +379,8 @@
- 	qcom,irq = <258>;
- 	mdiobus = <&mdio0>;
- 
--	mtd-mac-address = <&art 0>;
-+	nvmem-cells = <&macaddr_art_0>;
-+	nvmem-cell-names = "mac-address";
- 
- 	fixed-link {
- 		speed = <1000>;
-@@ -422,8 +427,9 @@
- 			compatible = "pci168c,0046";
- 			reg = <0x00010000 0 0 0 0>;
- 
--			mtd-mac-address = <&art 6>;
--			mtd-mac-address-increment = <(1)>;
-+			nvmem-cells = <&macaddr_art_6>;
-+			nvmem-cell-names = "mac-address";
-+			mac-address-increment = <(1)>;
- 		};
- 	};
- };
-@@ -442,8 +448,23 @@
- 			compatible = "pci168c,0046";
- 			reg = <0x00010000 0 0 0 0>;
- 
--			mtd-mac-address = <&art 6>;
--			mtd-mac-address-increment = <(2)>;
-+			nvmem-cells = <&macaddr_art_6>;
-+			nvmem-cell-names = "mac-address";
-+			mac-address-increment = <(2)>;
- 		};
- 	};
- };
-+
-+&art {
-+	compatible = "nvmem-cells";
-+	#address-cells = <1>;
-+	#size-cells = <1>;
-+
-+	macaddr_art_0: macaddr@0 {
-+		reg = <0x0 0x6>;
-+	};
-+
-+	macaddr_art_6: macaddr@6 {
-+		reg = <0x6 0x6>;
-+	};
-+};
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
-new file mode 100644
-index 0000000000..54356e2ff1
---- /dev/null
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
-@@ -0,0 +1,319 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later
-+
-+#include "qcom-ipq8065.dtsi"
-+#include <dt-bindings/input/input.h>
-+
-+/ {
-+	model = "Askey RT4230W REV6";
-+	compatible = "askey,rt4230w-rev6", "qcom,ipq8065", "qcom,ipq8064";
-+
-+	memory@0 {
-+		reg = <0x42000000 0x3e000000>;
-+		device_type = "memory";
-+	};
-+
-+	aliases {
-+		led-boot = &ledctrl3;
-+		led-failsafe = &ledctrl1;
-+		led-running = &ledctrl2;
-+		led-upgrade = &ledctrl3;
-+	};
-+
-+	chosen {
-+		bootargs = "rootfstype=squashfs noinitrd";
-+	};
-+
-+	keys {
-+		compatible = "gpio-keys";
-+		pinctrl-0 = <&button_pins>;
-+		pinctrl-names = "default";
-+
-+		reset {
-+			label = "reset";
-+			gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_RESTART>;
-+		};
-+
-+		wps {
-+			label = "wps";
-+			gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_WPS_BUTTON>;
-+		};
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+		pinctrl-0 = <&led_pins>;
-+		pinctrl-names = "default";
-+
-+		ledctrl1: ledctrl1 {
-+			label = "ledctrl1";
-+			gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		ledctrl2: ledctrl2 {
-+			label = "ledctrl2";
-+			gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		ledctrl3: ledctrl3 {
-+			label = "ledctrl3";
-+			gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
-+};
-+
-+&qcom_pinmux {
-+	button_pins: button_pins {
-+		mux {
-+			pins = "gpio54", "gpio68";
-+			function = "gpio";
-+			drive-strength = <2>;
-+			bias-pull-up;
-+		};
-+	};
-+
-+	led_pins: led_pins {
-+		mux {
-+			pins = "gpio22", "gpio23", "gpio24";
-+			function = "gpio";
-+			drive-strength = <2>;
-+			bias-pull-down;
-+		};
-+	};
-+
-+	rgmii2_pins: rgmii2_pins {
-+		mux {
-+			pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31",
-+				"gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62";
-+			function = "rgmii2";
-+			drive-strength = <8>;
-+			bias-disable;
-+		};
-+
-+		tx {
-+			pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32";
-+			input-disable;
-+		};
-+	};
-+};
-+
-+&nand_controller {
-+	status = "okay";
-+
-+	pinctrl-0 = <&nand_pins>;
-+	pinctrl-names = "default";
-+
-+	nand@0 {
-+		reg = <0>;
-+		compatible = "qcom,nandcs";
-+
-+		nand-ecc-strength = <4>;
-+		nand-bus-width = <8>;
-+		nand-ecc-step-size = <512>;
-+
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			partition@0 {
-+				label = "0:SBL1";
-+				reg = <0x0000000 0x0040000>;
-+				read-only;
-+			};
-+			partition@40000 {
-+				label = "0:MIBIB";
-+				reg = <0x0040000 0x0140000>;
-+				read-only;
-+			};
-+			partition@180000 {
-+				label = "0:SBL2";
-+				reg = <0x0180000 0x0140000>;
-+				read-only;
-+			};
-+			partition@2c0000 {
-+				label = "0:SBL3";
-+				reg = <0x02c0000 0x0280000>;
-+				read-only;
-+			};
-+			partition@540000 {
-+				label = "0:DDRCONFIG";
-+				reg = <0x0540000 0x0120000>;
-+				read-only;
-+			};
-+			partition@660000 {
-+				label = "0:SSD";
-+				reg = <0x0660000 0x0120000>;
-+				read-only;
-+			};
-+			partition@780000 {
-+				label = "0:TZ";
-+				reg = <0x0780000 0x0280000>;
-+				read-only;
-+			};
-+			partition@a00000 {
-+				label = "0:RPM";
-+				reg = <0x0a00000 0x0280000>;
-+				read-only;
-+			};
-+			partition@c80000 {
-+				label = "0:APPSBL";
-+				reg = <0x0c80000 0x0500000>;
-+				read-only;
-+			};
-+			partition@1180000 {
-+				label = "0:APPSBLENV";
-+				reg = <0x1180000 0x0080000>;
-+			};
-+			ART: partition@1200000 {
-+				label = "0:ART";
-+				reg = <0x1200000 0x0140000>;
-+				read-only;
-+			};
-+			partition@1340000 {
-+				label = "0:BOOTCONFIG";
-+				reg = <0x1340000 0x0060000>;
-+				read-only;
-+			};
-+			partition@13a0000 {
-+				label = "0:SBL2_1";
-+				reg = <0x13a0000 0x0140000>;
-+				read-only;
-+			};
-+			partition@14e0000 {
-+				label = "0:SBL3_1";
-+				reg = <0x14e0000 0x0280000>;
-+				read-only;
-+			};
-+			partition@1760000 {
-+				label = "0:DDRCONFIG_1";
-+				reg = <0x1760000 0x0120000>;
-+				read-only;
-+			};
-+			partition@1880000 {
-+				label = "0:SSD_1";
-+				reg = <0x1880000 0x0120000>;
-+				read-only;
-+			};
-+			partition@19a0000 {
-+				label = "0:TZ_1";
-+				reg = <0x19a0000 0x0280000>;
-+				read-only;
-+			};
-+			partition@1c20000 {
-+				label = "0:RPM_1";
-+				reg = <0x1c20000 0x0280000>;
-+				read-only;
-+			};
-+			partition@1ea0000 {
-+				label = "0:BOOTCONFIG1";
-+				reg = <0x1ea0000 0x0060000>;
-+				read-only;
-+			};
-+			partition@1f00000 {
-+				label = "0:APPSBL_1";
-+				reg = <0x1f00000 0x0500000>;
-+				read-only;
-+			};
-+			partition@2400000 {
-+				label = "ubi";
-+				reg = <0x2400000 0x1a000000>;
-+			};
-+		};
-+	};
-+};
-+
-+&mdio0 {
-+	status = "okay";
-+
-+	pinctrl-0 = <&mdio0_pins>;
-+	pinctrl-names = "default";
-+
-+	phy0: ethernet-phy@0 {
-+		reg = <0x0>;
-+		qca,ar8327-initvals = <
-+			0x00004 0x7600000   /* PAD0_MODE */
-+			0x00008 0x1000000   /* PAD5_MODE */
-+			0x0000c 0x80        /* PAD6_MODE */
-+			0x000e4 0xaa545     /* MAC_POWER_SEL */
-+			0x000e0 0xc74164de  /* SGMII_CTRL */
-+			0x0007c 0x4e        /* PORT0_STATUS */
-+			0x00094 0x4e        /* PORT6_STATUS */
-+			0x00050 0xcf02cf02  /* LED_CTRL_0 */
-+			0x00054 0xc832c832  /* LED_CTRL_1 */
-+			>;
-+	};
-+};
-+
-+&gmac0 {
-+	status = "okay";
-+	phy-mode = "rgmii";
-+	qcom,id = <0>;
-+
-+	nvmem-cells = <&macaddr_ART_0>;
-+	nvmem-cell-names = "mac-address";
-+
-+	pinctrl-0 = <&rgmii2_pins>;
-+	pinctrl-names = "default";
-+
-+	fixed-link {
-+		speed = <1000>;
-+		full-duplex;
-+	};
-+};
-+
-+&gmac1 {
-+	status = "okay";
-+	phy-mode = "sgmii";
-+	qcom,id = <1>;
-+
-+	nvmem-cells = <&macaddr_ART_6>;
-+	nvmem-cell-names = "mac-address";
-+
-+	fixed-link {
-+		speed = <1000>;
-+		full-duplex;
-+	};
-+};
-+
-+&adm_dma {
-+	status = "okay";
-+};
-+
-+&usb3_0 {
-+	status = "okay";
-+	clocks = <&gcc USB30_1_MASTER_CLK>;
-+};
-+
-+&usb3_1 {
-+	status = "okay";
-+	clocks = <&gcc USB30_0_MASTER_CLK>;
-+};
-+
-+&pcie0 {
-+	status = "okay";
-+	reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
-+	/delete-property/ perst-gpios;
-+};
-+
-+&pcie1 {
-+	status = "okay";
-+	reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
-+	/delete-property/ perst-gpios;
-+	force_gen1 = <1>;
-+};
-+
-+&ART {
-+	compatible = "nvmem-cells";
-+	#address-cells = <1>;
-+	#size-cells = <1>;
-+
-+	macaddr_ART_0: macaddr@0 {
-+		reg = <0x0 0x6>;
-+	};
-+
-+	macaddr_ART_6: macaddr@6 {
-+		reg = <0x6 0x6>;
-+	};
-+};
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065.dtsi
-index ab67d504e6..a0312686a0 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065.dtsi
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065.dtsi
-@@ -12,12 +12,6 @@
- 		stdout-path = "serial0:115200n8";
- 	};
- 
--	cpus {
--		qcom,l2 {
--			qcom,l2-cpufreq = <384000000 600000000 1400000000>;
--		};
--	};
--
- 	reserved-memory {
- 		#address-cells = <1>;
- 		#size-cells = <1>;
-@@ -83,6 +77,17 @@
- 	qcom,mpll = <5>;
- };
- 
-+&opp_table_l2 {
-+	/delete-node/opp-1200000000;
-+
-+	opp-1400000000 {
-+		opp-hz = /bits/ 64 <1400000000>;
-+		opp-microvolt = <1150000>;
-+		clock-latency-ns = <100000>;
-+		opp-level = <2>;
-+	};
-+};
-+
- &opp_table0 {
- 	/* 
- 	 * On ipq8065 1.2 ghz freq is not present
-@@ -93,65 +98,67 @@
- 	/delete-node/opp-1200000000;
- 
- 	opp-384000000 {
--		opp-microvolt-speed0-pvs0-v0 = <975000>;
--		opp-microvolt-speed0-pvs1-v0 = <950000>;
--		opp-microvolt-speed0-pvs2-v0 = <925000>;
--		opp-microvolt-speed0-pvs3-v0 = <900000>;
--		opp-microvolt-speed0-pvs4-v0 = <875000>;
--		opp-microvolt-speed0-pvs5-v0 = <825000>;
--		opp-microvolt-speed0-pvs6-v0 = <775000>;
-+		opp-microvolt-speed0-pvs0-v0 = <926250 975000 1023750>;
-+		opp-microvolt-speed0-pvs1-v0 = <902500 950000 997500>;
-+		opp-microvolt-speed0-pvs2-v0 = <878750 925000 971250>;
-+		opp-microvolt-speed0-pvs3-v0 = <855000 900000 945000>;
-+		opp-microvolt-speed0-pvs4-v0 = <831250 875000 918750>;
-+		opp-microvolt-speed0-pvs5-v0 = <783750 825000 866250>;
-+		opp-microvolt-speed0-pvs6-v0 = <736250 775000 813750>;
- 	};
- 
- 	opp-600000000 {
--		opp-microvolt-speed0-pvs0-v0 = <1000000>;
--		opp-microvolt-speed0-pvs1-v0 = <975000>;
--		opp-microvolt-speed0-pvs2-v0 = <950000>;
--		opp-microvolt-speed0-pvs3-v0 = <925000>;
--		opp-microvolt-speed0-pvs4-v0 = <900000>;
--		opp-microvolt-speed0-pvs5-v0 = <850000>;
--		opp-microvolt-speed0-pvs6-v0 = <800000>;
-+		opp-microvolt-speed0-pvs0-v0 = <950000 1000000 1050000>;
-+		opp-microvolt-speed0-pvs1-v0 = <926250 975000 1023750>;
-+		opp-microvolt-speed0-pvs2-v0 = <902500 950000 997500>;
-+		opp-microvolt-speed0-pvs3-v0 = <878750 925000 971250>;
-+		opp-microvolt-speed0-pvs4-v0 = <855000 900000 945000>;
-+		opp-microvolt-speed0-pvs5-v0 = <807500 850000 892500>;
-+		opp-microvolt-speed0-pvs6-v0 = <760000 800000 840000>;
- 	};
- 
- 	opp-800000000 {
--		opp-microvolt-speed0-pvs0-v0 = <1050000>;
--		opp-microvolt-speed0-pvs1-v0 = <1025000>;
--		opp-microvolt-speed0-pvs2-v0 = <1000000>;
--		opp-microvolt-speed0-pvs3-v0 = <975000>;
--		opp-microvolt-speed0-pvs4-v0 = <950000>;
--		opp-microvolt-speed0-pvs5-v0 = <900000>;
--		opp-microvolt-speed0-pvs6-v0 = <850000>;
-+		opp-microvolt-speed0-pvs0-v0 = <997500 1050000 1102500>;
-+		opp-microvolt-speed0-pvs1-v0 = <973750 1025000 1076250>;
-+		opp-microvolt-speed0-pvs2-v0 = <950000 1000000 1050000>;
-+		opp-microvolt-speed0-pvs3-v0 = <926250 975000 1023750>;
-+		opp-microvolt-speed0-pvs4-v0 = <902500 950000 997500>;
-+		opp-microvolt-speed0-pvs5-v0 = <855000 900000 945000>;
-+		opp-microvolt-speed0-pvs6-v0 = <807500 850000 892500>;
- 	};
- 
- 	opp-1000000000 {
--		opp-microvolt-speed0-pvs0-v0 = <1100000>;
--		opp-microvolt-speed0-pvs1-v0 = <1075000>;
--		opp-microvolt-speed0-pvs2-v0 = <1050000>;
--		opp-microvolt-speed0-pvs3-v0 = <1025000>;
--		opp-microvolt-speed0-pvs4-v0 = <1000000>;
--		opp-microvolt-speed0-pvs5-v0 = <950000>;
--		opp-microvolt-speed0-pvs6-v0 = <900000>;
-+		opp-microvolt-speed0-pvs0-v0 = <1045000 1100000 1155000>;
-+		opp-microvolt-speed0-pvs1-v0 = <1021250 1075000 1128750>;
-+		opp-microvolt-speed0-pvs2-v0 = <997500 1050000 1102500>;
-+		opp-microvolt-speed0-pvs3-v0 = <973750 1025000 1076250>;
-+		opp-microvolt-speed0-pvs4-v0 = <950000 1000000 1050000>;
-+		opp-microvolt-speed0-pvs5-v0 = <902500 950000 997500>;
-+		opp-microvolt-speed0-pvs6-v0 = <855000 900000 945000>;
- 	};
- 
- 	opp-1400000000 {
--		opp-microvolt-speed0-pvs0-v0 = <1175000>;
--		opp-microvolt-speed0-pvs1-v0 = <1150000>;
--		opp-microvolt-speed0-pvs2-v0 = <1125000>;
--		opp-microvolt-speed0-pvs3-v0 = <1100000>;
--		opp-microvolt-speed0-pvs4-v0 = <1075000>;
--		opp-microvolt-speed0-pvs5-v0 = <1025000>;
--		opp-microvolt-speed0-pvs6-v0 = <975000>;
-+		opp-microvolt-speed0-pvs0-v0 = <1116250 1175000 1233750>;
-+		opp-microvolt-speed0-pvs1-v0 = <1092500 1150000 1207500>;
-+		opp-microvolt-speed0-pvs2-v0 = <1068750 1125000 1181250>;
-+		opp-microvolt-speed0-pvs3-v0 = <1045000 1100000 1155000>;
-+		opp-microvolt-speed0-pvs4-v0 = <1021250 1075000 1128750>;
-+		opp-microvolt-speed0-pvs5-v0 = <973750 1025000 1076250>;
-+		opp-microvolt-speed0-pvs6-v0 = <926250 975000 1023750>;
-+		opp-level = <1>;
- 	};
- 
- 	opp-1725000000 {
- 		opp-hz = /bits/ 64 <1725000000>;
--		opp-microvolt-speed0-pvs0-v0 = <1262500>;
--		opp-microvolt-speed0-pvs1-v0 = <1225000>;
--		opp-microvolt-speed0-pvs2-v0 = <1200000>;
--		opp-microvolt-speed0-pvs3-v0 = <1175000>;
--		opp-microvolt-speed0-pvs4-v0 = <1150000>;
--		opp-microvolt-speed0-pvs5-v0 = <1100000>;
--		opp-microvolt-speed0-pvs6-v0 = <1050000>;
-+		opp-microvolt-speed0-pvs0-v0 = <1199375 1262500 1325625>;
-+		opp-microvolt-speed0-pvs1-v0 = <1163750 1225000 1286250>;
-+		opp-microvolt-speed0-pvs2-v0 = <1140000 1200000 1260000>;
-+		opp-microvolt-speed0-pvs3-v0 = <1116250 1175000 1233750>;
-+		opp-microvolt-speed0-pvs4-v0 = <1092500 1150000 1207500>;
-+		opp-microvolt-speed0-pvs5-v0 = <1045000 1100000 1155000>;
-+		opp-microvolt-speed0-pvs6-v0 = <997500 1050000 1102500>;
- 		opp-supported-hw = <0x1>;
- 		clock-latency-ns = <100000>;
-+		opp-level = <2>;
- 	};
- };
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts
-index e87ef16b9a..43bed451cb 100644
---- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts
-@@ -57,6 +57,8 @@
- 			label = "reset";
- 			gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
- 			linux,code = <KEY_RESTART>;
-+			debounce-interval = <60>;
-+			wakeup-source;
- 		};
- 	};
- 
-@@ -95,16 +97,6 @@
- 			gpios = <&qcom_pinmux 59 GPIO_ACTIVE_LOW>;
- 		};
- 	};
--
--	i2c-gpio {
--		#address-cells = <1>;
--		#size-cells = <0>;
--
--		compatible = "i2c-gpio";
--		gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>, /* sda */
--			<&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; /* scl */
--		i2c-gpio,delay-us = <5>;
--	};
- };
- 
- 
-@@ -134,7 +126,7 @@
- 
- 	led_pins: led_pins {
- 		mux {
--			pins = "gpio6", "gpio7", "gpio16", "gpio23", "gpio24", "gpio26",
-+			pins = "gpio16", "gpio23", "gpio24", "gpio26",
- 				   "gpio28", "gpio59";
- 			function = "gpio";
- 			drive-strength = <2>;
-@@ -194,7 +186,7 @@
- 			reg = <0>;
- 
- 			partitions {
--				compatible = "qcom,smem";
-+				compatible = "qcom,smem-part";
- 			};
- 		};
- 	};
-@@ -268,31 +260,6 @@
- 	};
- };
- 
--&soc {
--	mdio1: mdio {
--		compatible = "virtual,mdio-gpio";
--		#address-cells = <1>;
--		#size-cells = <0>;
--
--		status = "okay";
--
--		pinctrl-0 = <&mdio0_pins>;
--		pinctrl-names = "default";
--
--		gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
--
--		phy0: ethernet-phy@0 {
--			reg = <0>;
--			reset-gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
--		};
--
--		phy1: ethernet-phy@1 {
--			reg = <1>;
--			reset-gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>;
--		};
--	};
--};
--
- &nand_controller {
- 	status = "okay";
- 
-@@ -326,6 +293,28 @@
- 	};
- };
- 
-+&soc {
-+	mdio1: mdio {
-+		compatible = "virtual,mdio-gpio";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		status = "okay";
-+
-+		pinctrl-0 = <&mdio0_pins>;
-+		pinctrl-names = "default";
-+
-+		gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
-+
-+		phy0: ethernet-phy@0 {
-+			reg = <0>;
-+		};
-+
-+		phy1: ethernet-phy@1 {
-+			reg = <1>;
-+		};
-+	};
-+};
- 
- &gmac2 {
- 	status = "okay";
-@@ -341,7 +330,7 @@
- 	status = "okay";
- 
- 	qcom,id = <3>;
--	mdiobus = <&mdio0>;
-+	mdiobus = <&mdio1>;
- 
- 	phy-mode = "sgmii";
- 	phy-handle = <&phy0>;
-diff --git a/target/linux/ipq806x/image/Makefile b/target/linux/ipq806x/image/Makefile
-index d620f0eb70..93e7ba3151 100644
---- a/target/linux/ipq806x/image/Makefile
-+++ b/target/linux/ipq806x/image/Makefile
-@@ -26,8 +26,6 @@ endef
- define Device/Default
- 	PROFILES := Default
- 	KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts)
--	KERNEL_INITRAMFS_PREFIX := $$(IMG_PREFIX)-$(1)-initramfs
--	KERNEL_PREFIX := $$(IMAGE_PREFIX)
- 	KERNEL_LOADADDR = 0x42208000
- 	DEVICE_DTS = $$(SOC)-$(lastword $(subst _, ,$(1)))
- 	DEVICE_DTS_CONFIG := config@1
-@@ -92,6 +90,19 @@ define Device/ZyXELImage
- 	IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-to $$$$(BLOCKSIZE) | sysupgrade-tar rootfs=$$$$@ | append-metadata
- endef
- 
-+define Device/askey_rt4230w-rev6
-+	$(call Device/LegacyImage)
-+	DEVICE_VENDOR := Askey
-+	DEVICE_MODEL := RT4230W
-+	DEVICE_VARIANT := REV6
-+	SOC := qcom-ipq8065
-+	BLOCKSIZE := 128k
-+	PAGESIZE := 2048
-+	DEVICE_PACKAGES := ath10k-firmware-qca9984-ct
-+	KERNEL_IN_UBI := 1
-+endef
-+TARGET_DEVICES += askey_rt4230w-rev6
-+
- define Device/asrock_g10
- 	$(call Device/FitImage)
- 	$(call Device/UbiFit)
-@@ -142,7 +153,7 @@ define Device/edgecore_ecw5410
- 	BLOCKSIZE := 128k
- 	PAGESIZE := 2048
- 	DEVICE_DTS_CONFIG := config@v2.0-ap160
--	DEVICE_PACKAGES := ath10k-firmware-qca9984-ct ipq-wifi-edgecore_ecw5410 kmod-i2c-gpio
-+	DEVICE_PACKAGES := ath10k-firmware-qca9984-ct ipq-wifi-edgecore_ecw5410
- endef
- TARGET_DEVICES += edgecore_ecw5410
- 
-@@ -390,7 +401,7 @@ define Device/ubnt_unifi-ac-hd
- 	BLOCKSIZE := 64k
- 	IMAGE_SIZE := 14784k
- 	DEVICE_PACKAGES := ath10k-firmware-qca9984-ct
--	IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(BLOCKSIZE) | append-rootfs | pad-rootfs | append-metadata | check-size
-+	IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(BLOCKSIZE) | append-rootfs | pad-rootfs | check-size | append-metadata
- endef
- TARGET_DEVICES += ubnt_unifi-ac-hd
- 
-diff --git a/target/linux/ipq806x/patches-5.10/0001-dtbindings-qcom_adm-Fix-channel-specifiers.patch b/target/linux/ipq806x/patches-5.10/0001-dtbindings-qcom_adm-Fix-channel-specifiers.patch
-new file mode 100644
-index 0000000000..83d7bbc6f4
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/0001-dtbindings-qcom_adm-Fix-channel-specifiers.patch
-@@ -0,0 +1,71 @@
-+From 28d0ed88f536dd639adf1b0c7c08e04be3c8f294 Mon Sep 17 00:00:00 2001
-+From: Thomas Pedersen <twp@codeaurora.org>
-+Date: Mon, 16 May 2016 17:58:50 -0700
-+Subject: [PATCH 01/69] dtbindings: qcom_adm: Fix channel specifiers
-+
-+Original patch from Andy Gross.
-+
-+This patch removes the crci information from the dma
-+channel property.  At least one client device requires
-+using more than one CRCI value for a channel.  This does
-+not match the current binding and the crci information
-+needs to be removed.
-+
-+Instead, the client device will provide this information
-+via other means.
-+
-+Signed-off-by: Andy Gross <agross@codeaurora.org>
-+Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
-+---
-+ Documentation/devicetree/bindings/dma/qcom_adm.txt | 16 ++++++----------
-+ 1 file changed, 6 insertions(+), 10 deletions(-)
-+
-+--- a/Documentation/devicetree/bindings/dma/qcom_adm.txt
-++++ b/Documentation/devicetree/bindings/dma/qcom_adm.txt
-+@@ -4,8 +4,7 @@ Required properties:
-+ - compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960
-+ - reg: Address range for DMA registers
-+ - interrupts: Should contain one interrupt shared by all channels
-+-- #dma-cells: must be <2>.  First cell denotes the channel number.  Second cell
-+-  denotes CRCI (client rate control interface) flow control assignment.
-++- #dma-cells: must be <1>.  First cell denotes the channel number.
-+ - clocks: Should contain the core clock and interface clock.
-+ - clock-names: Must contain "core" for the core clock and "iface" for the
-+   interface clock.
-+@@ -22,7 +21,7 @@ Example:
-+ 			compatible = "qcom,adm";
-+ 			reg = <0x18300000 0x100000>;
-+ 			interrupts = <0 170 0>;
-+-			#dma-cells = <2>;
-++			#dma-cells = <1>;
-+ 
-+ 			clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
-+ 			clock-names = "core", "iface";
-+@@ -35,15 +34,12 @@ Example:
-+ 			qcom,ee = <0>;
-+ 		};
-+ 
-+-DMA clients must use the format descripted in the dma.txt file, using a three
-++DMA clients must use the format descripted in the dma.txt file, using a two
-+ cell specifier for each channel.
-+ 
-+-Each dmas request consists of 3 cells:
-++Each dmas request consists of two cells:
-+  1. phandle pointing to the DMA controller
-+  2. channel number
-+- 3. CRCI assignment, if applicable.  If no CRCI flow control is required, use 0.
-+-    The CRCI is used for flow control.  It identifies the peripheral device that
-+-    is the source/destination for the transferred data.
-+ 
-+ Example:
-+ 
-+@@ -55,7 +51,7 @@ Example:
-+ 
-+ 		cs-gpios = <&qcom_pinmux 20 0>;
-+ 
-+-		dmas = <&adm_dma 6 9>,
-+-			<&adm_dma 5 10>;
-++		dmas = <&adm_dma 6>,
-++			<&adm_dma 5>;
-+ 		dma-names = "rx", "tx";
-+ 	};
-diff --git a/target/linux/ipq806x/patches-5.10/0033-ARM-qcom-automatically-select-PCI_DOMAINS-if-PCI-is-.patch b/target/linux/ipq806x/patches-5.10/0033-ARM-qcom-automatically-select-PCI_DOMAINS-if-PCI-is-.patch
-new file mode 100644
-index 0000000000..a12aa721e2
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/0033-ARM-qcom-automatically-select-PCI_DOMAINS-if-PCI-is-.patch
-@@ -0,0 +1,29 @@
-+From 48051ece78136e4235a2415a52797db56f8a4478 Mon Sep 17 00:00:00 2001
-+From: Mathieu Olivari <mathieu@codeaurora.org>
-+Date: Tue, 21 Apr 2015 19:09:07 -0700
-+Subject: [PATCH 33/69] ARM: qcom: automatically select PCI_DOMAINS if PCI is
-+ enabled
-+
-+If multiple PCIe devices are present in the system, the kernel will
-+panic at boot time when trying to scan the PCI buses. This happens on
-+IPQ806x based platforms, which has 3 PCIe ports.
-+
-+Enabling this option allows the kernel to assign the pci-domains
-+according to the device-tree content. This allows multiple PCIe
-+controllers to coexist in the system.
-+
-+Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
-+---
-+ arch/arm/mach-qcom/Kconfig | 1 +
-+ 1 file changed, 1 insertion(+)
-+
-+--- a/arch/arm/mach-qcom/Kconfig
-++++ b/arch/arm/mach-qcom/Kconfig
-+@@ -7,6 +7,7 @@ menuconfig ARCH_QCOM
-+ 	select ARM_AMBA
-+ 	select PINCTRL
-+ 	select QCOM_SCM if SMP
-++	select PCI_DOMAINS if PCI
-+ 	help
-+ 	  Support for Qualcomm's devicetree based systems.
-+ 
-diff --git a/target/linux/ipq806x/patches-5.10/0060-HACK-arch-arm-force-ZRELADDR-on-arch-qcom.patch b/target/linux/ipq806x/patches-5.10/0060-HACK-arch-arm-force-ZRELADDR-on-arch-qcom.patch
-new file mode 100644
-index 0000000000..b56480deaa
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/0060-HACK-arch-arm-force-ZRELADDR-on-arch-qcom.patch
-@@ -0,0 +1,62 @@
-+From fa71139b55e114aa8c3c4823ff8ee7d49ee810d4 Mon Sep 17 00:00:00 2001
-+From: Mathieu Olivari <mathieu@codeaurora.org>
-+Date: Wed, 29 Apr 2015 15:21:46 -0700
-+Subject: [PATCH 60/69] HACK: arch: arm: force ZRELADDR on arch-qcom
-+
-+ARCH_QCOM is using the ARCH_MULTIPLATFORM option, as now recommended
-+on most ARM architectures. This automatically calculate ZRELADDR by
-+masking PHYS_OFFSET with 0xf8000000.
-+
-+However, on IPQ806x, the first ~20MB of RAM is reserved for the hardware
-+network accelerators, and the bootloader removes this section from the
-+layout passed from the ATAGS (when used).
-+
-+For newer bootloader, when DT is used, this is not a problem, we just
-+reserve this memory in the device tree. But if the bootloader doesn't
-+have DT support, then ATAGS have to be used. In this case, the ARM
-+decompressor will position the kernel in this low mem, which will not be
-+in the RAM section mapped by the bootloader, which means the kernel will
-+freeze in the middle of the boot process trying to map the memory.
-+
-+As a work around, this patch allows disabling AUTO_ZRELADDR when
-+ARCH_QCOM is selected. It makes the zImage usage possible on bootloaders
-+which don't support device-tree, which is the case on certain early
-+IPQ806x based designs.
-+
-+Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
-+---
-+ arch/arm/Kconfig                 | 2 +-
-+ arch/arm/Makefile                | 2 ++
-+ arch/arm/mach-qcom/Makefile.boot | 1 +
-+ 3 files changed, 4 insertions(+), 1 deletion(-)
-+ create mode 100644 arch/arm/mach-qcom/Makefile.boot
-+
-+--- a/arch/arm/Kconfig
-++++ b/arch/arm/Kconfig
-+@@ -321,7 +321,7 @@ config ARCH_MULTIPLATFORM
-+ 	select ARCH_SELECT_MEMORY_MODEL
-+ 	select ARM_HAS_SG_CHAIN
-+ 	select ARM_PATCH_PHYS_VIRT
-+-	select AUTO_ZRELADDR
-++	select AUTO_ZRELADDR if !ARCH_QCOM
-+ 	select TIMER_OF
-+ 	select COMMON_CLK
-+ 	select GENERIC_CLOCKEVENTS
-+--- a/arch/arm/Makefile
-++++ b/arch/arm/Makefile
-+@@ -251,9 +251,11 @@ MACHINE  := arch/arm/mach-$(word 1,$(mac
-+ else
-+ MACHINE  :=
-+ endif
-++ifeq ($(CONFIG_ARCH_QCOM),)
-+ ifeq ($(CONFIG_ARCH_MULTIPLATFORM),y)
-+ MACHINE  :=
-+ endif
-++endif
-+ 
-+ machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
-+ platdirs := $(patsubst %,arch/arm/plat-%/,$(sort $(plat-y)))
-+--- /dev/null
-++++ b/arch/arm/mach-qcom/Makefile.boot
-+@@ -0,0 +1 @@
-++zreladdr-y+= 0x42208000
-diff --git a/target/linux/ipq806x/patches-5.10/0065-arm-override-compiler-flags.patch b/target/linux/ipq806x/patches-5.10/0065-arm-override-compiler-flags.patch
-new file mode 100644
-index 0000000000..5a970e87ac
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/0065-arm-override-compiler-flags.patch
-@@ -0,0 +1,21 @@
-+From 4d8e29642661397a339ac3485f212c6360445421 Mon Sep 17 00:00:00 2001
-+From: John Crispin <john@phrozen.org>
-+Date: Thu, 9 Mar 2017 09:33:32 +0100
-+Subject: [PATCH 65/69] arm: override compiler flags
-+
-+Signed-off-by: John Crispin <john@phrozen.org>
-+---
-+ arch/arm/Makefile | 2 +-
-+ 1 file changed, 1 insertion(+), 1 deletion(-)
-+
-+--- a/arch/arm/Makefile
-++++ b/arch/arm/Makefile
-+@@ -61,7 +61,7 @@ KBUILD_CFLAGS	+= $(call cc-option,-fno-i
-+ # macro, but instead defines a whole series of macros which makes
-+ # testing for a specific architecture or later rather impossible.
-+ arch-$(CONFIG_CPU_32v7M)	=-D__LINUX_ARM_ARCH__=7 -march=armv7-m -Wa,-march=armv7-m
-+-arch-$(CONFIG_CPU_32v7)		=-D__LINUX_ARM_ARCH__=7 $(call cc-option,-march=armv7-a,-march=armv5t -Wa$(comma)-march=armv7-a)
-++arch-$(CONFIG_CPU_32v7)		=-D__LINUX_ARM_ARCH__=7 -mcpu=cortex-a15
-+ arch-$(CONFIG_CPU_32v6)		=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6)
-+ # Only override the compiler option if ARMv6. The ARMv6K extensions are
-+ # always available in ARMv7
-diff --git a/target/linux/ipq806x/patches-5.10/0067-generic-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/ipq806x/patches-5.10/0067-generic-Mangle-bootloader-s-kernel-arguments.patch
-new file mode 100644
-index 0000000000..c38e0a4669
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/0067-generic-Mangle-bootloader-s-kernel-arguments.patch
-@@ -0,0 +1,210 @@
-+From 71270226b14733a4b1f2cde58ea9265caa50b38d Mon Sep 17 00:00:00 2001
-+From: Adrian Panella <ianchi74@outlook.com>
-+Date: Thu, 9 Mar 2017 09:37:17 +0100
-+Subject: [PATCH 67/69] generic: Mangle bootloader's kernel arguments
-+
-+The command-line arguments provided by the boot loader will be
-+appended to a new device tree property: bootloader-args.
-+If there is a property "append-rootblock" in DT under /chosen
-+and a root= option in bootloaders command line it will be parsed
-+and added to DT bootargs with the form: <append-rootblock>XX.
-+Only command line ATAG will be processed, the rest of the ATAGs
-+sent by bootloader will be ignored.
-+This is usefull in dual boot systems, to get the current root partition
-+without afecting the rest of the system.
-+
-+Signed-off-by: Adrian Panella <ianchi74@outlook.com>
-+---
-+ arch/arm/Kconfig                        | 11 +++++
-+ arch/arm/boot/compressed/atags_to_fdt.c | 72 ++++++++++++++++++++++++++++++++-
-+ init/main.c                             | 16 ++++++++
-+ 3 files changed, 98 insertions(+), 1 deletion(-)
-+
-+--- a/arch/arm/Kconfig
-++++ b/arch/arm/Kconfig
-+@@ -1780,6 +1780,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN
-+ 	  The command-line arguments provided by the boot loader will be
-+ 	  appended to the the device tree bootargs property.
-+ 
-++config ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE
-++	bool "Append rootblock parsing bootloader's kernel arguments"
-++	help
-++	  The command-line arguments provided by the boot loader will be
-++	  appended to a new device tree property: bootloader-args.
-++	  If there is a property "append-rootblock" in DT under /chosen
-++	  and a root= option in bootloaders command line it will be parsed
-++	  and added to DT bootargs with the form: <append-rootblock>XX.
-++	  Only command line ATAG will be processed, the rest of the ATAGs
-++	  sent by bootloader will be ignored.
-++
-+ endchoice
-+ 
-+ config CMDLINE
-+--- a/arch/arm/boot/compressed/atags_to_fdt.c
-++++ b/arch/arm/boot/compressed/atags_to_fdt.c
-+@@ -5,6 +5,8 @@
-+ 
-+ #if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND)
-+ #define do_extend_cmdline 1
-++#elif defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
-++#define do_extend_cmdline 1
-+ #else
-+ #define do_extend_cmdline 0
-+ #endif
-+@@ -69,6 +71,80 @@ static uint32_t get_cell_size(const void
-+ 	return cell_size;
-+ }
-+ 
-++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
-++/**
-++ * taken from arch/x86/boot/string.c
-++ * local_strstr - Find the first substring in a %NUL terminated string
-++ * @s1: The string to be searched
-++ * @s2: The string to search for
-++ */
-++static char *local_strstr(const char *s1, const char *s2)
-++{
-++	size_t l1, l2;
-++
-++	l2 = strlen(s2);
-++	if (!l2)
-++		return (char *)s1;
-++	l1 = strlen(s1);
-++	while (l1 >= l2) {
-++		l1--;
-++		if (!memcmp(s1, s2, l2))
-++			return (char *)s1;
-++		s1++;
-++	}
-++	return NULL;
-++}
-++
-++static char *append_rootblock(char *dest, const char *str, int len, void *fdt)
-++{
-++	char *ptr, *end, *tmp;
-++	char *root="root=";
-++	char *find_rootblock;
-++	int i, l;
-++	const char *rootblock;
-++
-++	find_rootblock = getprop(fdt, "/chosen", "find-rootblock", &l);
-++	if(!find_rootblock)
-++		find_rootblock = root;
-++
-++	//ARM doesn't have __HAVE_ARCH_STRSTR, so it was copied from x86
-++	ptr = local_strstr(str, find_rootblock);
-++
-++	if(!ptr)
-++		return dest;
-++
-++	end = strchr(ptr, ' ');
-++	end = end ? (end - 1) : (strchr(ptr, 0) - 1);
-++
-++	// Some boards ubi.mtd=XX,ZZZZ, so let's check for '," too.
-++	tmp = strchr(ptr, ',');
-++
-++	if(tmp)
-++		end = end < tmp ? end : tmp - 1;
-++
-++	//find partition number (assumes format root=/dev/mtdXX | /dev/mtdblockXX | yy:XX | ubi.mtd=XX,ZZZZ )
-++	for( i = 0; end >= ptr && *end >= '0' && *end <= '9'; end--, i++);
-++	ptr = end + 1;
-++
-++	/* if append-rootblock property is set use it to append to command line */
-++	rootblock = getprop(fdt, "/chosen", "append-rootblock", &l);
-++	if(rootblock != NULL) {
-++		if(*dest != ' ') {
-++			*dest = ' ';
-++			dest++;
-++			len++;
-++		}
-++		if (len + l + i <= COMMAND_LINE_SIZE) {
-++			memcpy(dest, rootblock, l);
-++			dest += l - 1;
-++			memcpy(dest, ptr, i);
-++			dest += i;
-++		}
-++	}
-++	return dest;
-++}
-++#endif
-++
-+ static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline)
-+ {
-+ 	char cmdline[COMMAND_LINE_SIZE];
-+@@ -88,12 +164,21 @@ static void merge_fdt_bootargs(void *fdt
-+ 
-+ 	/* and append the ATAG_CMDLINE */
-+ 	if (fdt_cmdline) {
-++
-++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
-++		//save original bootloader args
-++		//and append ubi.mtd with root partition number to current cmdline
-++		setprop_string(fdt, "/chosen", "bootloader-args", fdt_cmdline);
-++		ptr = append_rootblock(ptr, fdt_cmdline, len, fdt);
-++
-++#else
-+ 		len = strlen(fdt_cmdline);
-+ 		if (ptr - cmdline + len + 2 < COMMAND_LINE_SIZE) {
-+ 			*ptr++ = ' ';
-+ 			memcpy(ptr, fdt_cmdline, len);
-+ 			ptr += len;
-+ 		}
-++#endif
-+ 	}
-+ 	*ptr = '\0';
-+ 
-+@@ -168,7 +253,9 @@ int atags_to_fdt(void *atag_list, void *
-+ 			else
-+ 				setprop_string(fdt, "/chosen", "bootargs",
-+ 					       atag->u.cmdline.cmdline);
-+-		} else if (atag->hdr.tag == ATAG_MEM) {
-++		}
-++#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE
-++		else if (atag->hdr.tag == ATAG_MEM) {
-+ 			if (memcount >= sizeof(mem_reg_property)/4)
-+ 				continue;
-+ 			if (!atag->u.mem.size)
-+@@ -212,6 +299,10 @@ int atags_to_fdt(void *atag_list, void *
-+ 		setprop(fdt, "/memory", "reg", mem_reg_property,
-+ 			4 * memcount * memsize);
-+ 	}
-++#else
-++
-++	}
-++#endif
-+ 
-+ 	return fdt_pack(fdt);
-+ }
-+--- a/init/main.c
-++++ b/init/main.c
-+@@ -110,6 +110,10 @@
-+ 
-+ #include <kunit/test.h>
-+ 
-++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
-++#include <linux/of.h>
-++#endif
-++
-+ static int kernel_init(void *);
-+ 
-+ extern void init_IRQ(void);
-+@@ -905,6 +909,18 @@ asmlinkage __visible void __init __no_sa
-+ 	pr_notice("Kernel command line: %s\n", saved_command_line);
-+ 	/* parameters may set static keys */
-+ 	jump_label_init();
-++
-++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
-++	//Show bootloader's original command line for reference
-++	if(of_chosen) {
-++		const char *prop = of_get_property(of_chosen, "bootloader-args", NULL);
-++		if(prop)
-++			pr_notice("Bootloader command line (ignored): %s\n", prop);
-++		else
-++			pr_notice("Bootloader command line not present\n");
-++	}
-++#endif
-++
-+ 	parse_early_param();
-+ 	after_dashes = parse_args("Booting kernel",
-+ 				  static_command_line, __start___param,
-diff --git a/target/linux/ipq806x/patches-5.10/0069-arm-boot-add-dts-files.patch b/target/linux/ipq806x/patches-5.10/0069-arm-boot-add-dts-files.patch
-new file mode 100644
-index 0000000000..87d6b65694
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/0069-arm-boot-add-dts-files.patch
-@@ -0,0 +1,39 @@
-+From 8f68331e14dff9a101f2d0e1d6bec84a031f27ee Mon Sep 17 00:00:00 2001
-+From: John Crispin <john@phrozen.org>
-+Date: Thu, 9 Mar 2017 11:03:18 +0100
-+Subject: [PATCH 69/69] arm: boot: add dts files
-+
-+Signed-off-by: John Crispin <john@phrozen.org>
-+---
-+ arch/arm/boot/dts/Makefile | 8 ++++++++
-+ 1 file changed, 8 insertions(+)
-+
-+--- a/arch/arm/boot/dts/Makefile
-++++ b/arch/arm/boot/dts/Makefile
-+@@ -907,8 +907,26 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-+ 	qcom-ipq4019-ap.dk04.1-c3.dtb \
-+ 	qcom-ipq4019-ap.dk07.1-c1.dtb \
-+ 	qcom-ipq4019-ap.dk07.1-c2.dtb \
-++	qcom-ipq8062-wg2600hp3.dtb \
-+ 	qcom-ipq8064-ap148.dtb \
-+ 	qcom-ipq8064-rb3011.dtb \
-++	qcom-ipq8064-c2600.dtb \
-++	qcom-ipq8064-d7800.dtb \
-++	qcom-ipq8064-db149.dtb \
-++	qcom-ipq8064-ap161.dtb \
-++	qcom-ipq8064-ea7500-v1.dtb \
-++	qcom-ipq8064-ea8500.dtb \
-++	qcom-ipq8064-g10.dtb \
-++	qcom-ipq8064-r7500.dtb \
-++	qcom-ipq8064-r7500v2.dtb \
-++	qcom-ipq8064-unifi-ac-hd.dtb \
-++	qcom-ipq8064-wg2600hp.dtb \
-++	qcom-ipq8064-wpq864.dtb \
-++	qcom-ipq8064-wxr-2533dhp.dtb \
-++	qcom-ipq8065-nbg6817.dtb \
-++	qcom-ipq8065-r7800.dtb \
-++	qcom-ipq8065-rt4230w-rev6.dtb \
-++	qcom-ipq8068-ecw5410.dtb \
-+ 	qcom-msm8660-surf.dtb \
-+ 	qcom-msm8960-cdp.dtb \
-+ 	qcom-msm8974-fairphone-fp2.dtb \
-diff --git a/target/linux/ipq806x/patches-5.10/0072-add-ipq806x-with-no-clocks.patch b/target/linux/ipq806x/patches-5.10/0072-add-ipq806x-with-no-clocks.patch
-new file mode 100644
-index 0000000000..62bba1d72a
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/0072-add-ipq806x-with-no-clocks.patch
-@@ -0,0 +1,10 @@
-+--- a/drivers/firmware/qcom_scm.c
-++++ b/drivers/firmware/qcom_scm.c
-+@@ -1275,6 +1275,7 @@ static const struct of_device_id qcom_sc
-+ 							     SCM_HAS_BUS_CLK)
-+ 	},
-+ 	{ .compatible = "qcom,scm-ipq4019" },
-++	{ .compatible = "qcom,scm-ipq806x" },
-+ 	{ .compatible = "qcom,scm-msm8660", .data = (void *) SCM_HAS_CORE_CLK },
-+ 	{ .compatible = "qcom,scm-msm8960", .data = (void *) SCM_HAS_CORE_CLK },
-+ 	{ .compatible = "qcom,scm-msm8916", .data = (void *)(SCM_HAS_CORE_CLK |
-diff --git a/target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch b/target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch
-new file mode 100644
-index 0000000000..c91fb68dc4
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch
-@@ -0,0 +1,211 @@
-+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
-++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-+@@ -20,7 +20,7 @@
-+ 		#address-cells = <1>;
-+ 		#size-cells = <0>;
-+ 
-+-		cpu@0 {
-++		cpu0: cpu@0 {
-+ 			compatible = "qcom,krait";
-+ 			enable-method = "qcom,kpss-acc-v1";
-+ 			device_type = "cpu";
-+@@ -30,7 +30,7 @@
-+ 			qcom,saw = <&saw0>;
-+ 		};
-+ 
-+-		cpu@1 {
-++		cpu1: cpu@1 {
-+ 			compatible = "qcom,krait";
-+ 			enable-method = "qcom,kpss-acc-v1";
-+ 			device_type = "cpu";
-+@@ -67,7 +67,7 @@
-+ 			no-map;
-+ 		};
-+ 
-+-		smem@41000000 {
-++		smem: smem@41000000 {
-+ 			reg = <0x41000000 0x200000>;
-+ 			no-map;
-+ 		};
-+@@ -128,6 +128,7 @@
-+ 			gpio-ranges = <&qcom_pinmux 0 0 69>;
-+ 			#gpio-cells = <2>;
-+ 			interrupt-controller;
-++			#address-cells = <0>;
-+ 			#interrupt-cells = <2>;
-+ 			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
-+ 
-+@@ -155,6 +156,7 @@
-+ 					function = "pcie3_rst";
-+ 					drive-strength = <12>;
-+ 					bias-disable;
-++					output-low;
-+ 				};
-+ 			};
-+ 
-+@@ -190,6 +192,7 @@
-+ 		intc: interrupt-controller@2000000 {
-+ 			compatible = "qcom,msm-qgic2";
-+ 			interrupt-controller;
-++			#address-cells = <0>;
-+ 			#interrupt-cells = <3>;
-+ 			reg = <0x02000000 0x1000>,
-+ 			      <0x02002000 0x1000>;
-+@@ -219,21 +222,23 @@
-+ 		acc0: clock-controller@2088000 {
-+ 			compatible = "qcom,kpss-acc-v1";
-+ 			reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
-++			clock-output-names = "acpu0_aux";
-+ 		};
-+ 
-+ 		acc1: clock-controller@2098000 {
-+ 			compatible = "qcom,kpss-acc-v1";
-+ 			reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
-++			clock-output-names = "acpu1_aux";
-+ 		};
-+ 
-+ 		saw0: regulator@2089000 {
-+-			compatible = "qcom,saw2";
-++			compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
-+ 			reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
-+ 			regulator;
-+ 		};
-+ 
-+ 		saw1: regulator@2099000 {
-+-			compatible = "qcom,saw2";
-++			compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
-+ 			reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
-+ 			regulator;
-+ 		};
-+@@ -251,7 +256,7 @@
-+ 
-+ 			syscon-tcsr = <&tcsr>;
-+ 
-+-			serial@12490000 {
-++			gsbi2_serial: serial@12490000 {
-+ 				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
-+ 				reg = <0x12490000 0x1000>,
-+ 				      <0x12480000 0x1000>;
-+@@ -326,7 +331,7 @@
-+ 
-+ 			syscon-tcsr = <&tcsr>;
-+ 
-+-			serial@1a240000 {
-++			gsbi5_serial: serial@1a240000 {
-+ 				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
-+ 				reg = <0x1a240000 0x1000>,
-+ 				      <0x1a200000 0x1000>;
-+@@ -397,7 +402,7 @@
-+ 			status = "disabled";
-+ 		};
-+ 
-+-		sata@29000000 {
-++		sata: sata@29000000 {
-+ 			compatible = "qcom,ipq806x-ahci", "generic-ahci";
-+ 			reg = <0x29000000 0x180>;
-+ 
-+@@ -430,13 +435,35 @@
-+ 			reg = <0x00700000 0x1000>;
-+ 			#address-cells = <1>;
-+ 			#size-cells = <1>;
-++
-++			tsens_calib: calib@400 {
-++				reg = <0x400 0xb>;
-++			};
-++			tsens_backup: backup@410 {
-++				reg = <0x410 0xb>;
-++			};
-++			speedbin_efuse: speedbin@0c0 {
-++				reg = <0x0c0 0x4>;
-++			};
-+ 		};
-+ 
-+ 		gcc: clock-controller@900000 {
-+-			compatible = "qcom,gcc-ipq8064";
-++			compatible = "qcom,gcc-ipq8064", "syscon";
-+ 			reg = <0x00900000 0x4000>;
-+ 			#clock-cells = <1>;
-+ 			#reset-cells = <1>;
-++			#power-domain-cells = <1>;
-++
-++			tsens: thermal-sensor@900000 {
-++				compatible = "qcom,ipq8064-tsens";
-++
-++				nvmem-cells = <&tsens_calib>, <&tsens_backup>;
-++				nvmem-cell-names = "calib", "calib_backup";
-++				interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
-++				interrupt-names = "uplow";
-++				#thermal-sensor-cells = <1>;
-++				#qcom,sensors = <11>;
-++			};
-+ 		};
-+ 
-+ 		tcsr: syscon@1a400000 {
-+@@ -622,7 +649,7 @@
-+ 
-+ 		gmac0: ethernet@37000000 {
-+ 			device_type = "network";
-+-			compatible = "qcom,ipq806x-gmac";
-++			compatible = "qcom,ipq806x-gmac", "snps,dwmac";
-+ 			reg = <0x37000000 0x200000>;
-+ 			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
-+ 			interrupt-names = "macirq";
-+@@ -645,7 +672,7 @@
-+ 
-+ 		gmac1: ethernet@37200000 {
-+ 			device_type = "network";
-+-			compatible = "qcom,ipq806x-gmac";
-++			compatible = "qcom,ipq806x-gmac", "snps,dwmac";
-+ 			reg = <0x37200000 0x200000>;
-+ 			interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
-+ 			interrupt-names = "macirq";
-+@@ -668,7 +695,7 @@
-+ 
-+ 		gmac2: ethernet@37400000 {
-+ 			device_type = "network";
-+-			compatible = "qcom,ipq806x-gmac";
-++			compatible = "qcom,ipq806x-gmac", "snps,dwmac";
-+ 			reg = <0x37400000 0x200000>;
-+ 			interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
-+ 			interrupt-names = "macirq";
-+@@ -691,7 +718,7 @@
-+ 
-+ 		gmac3: ethernet@37600000 {
-+ 			device_type = "network";
-+-			compatible = "qcom,ipq806x-gmac";
-++			compatible = "qcom,ipq806x-gmac", "snps,dwmac";
-+ 			reg = <0x37600000 0x200000>;
-+ 			interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
-+ 			interrupt-names = "macirq";
-+@@ -740,13 +767,13 @@
-+ 			qcom,ee = <0>;
-+ 		};
-+ 
-+-		amba {
-+-			compatible = "simple-bus";
-++		amba: amba {
-++			compatible = "arm,amba-bus";
-+ 			#address-cells = <1>;
-+ 			#size-cells = <1>;
-+ 			ranges;
-+ 
-+-			sdcc@12400000 {
-++			sdcc1: sdcc@12400000 {
-+ 				status          = "disabled";
-+ 				compatible      = "arm,pl18x", "arm,primecell";
-+ 				arm,primecell-periphid = <0x00051180>;
-+@@ -760,13 +787,12 @@
-+ 				non-removable;
-+ 				cap-sd-highspeed;
-+ 				cap-mmc-highspeed;
-+-				mmc-ddr-1_8v;
-+ 				vmmc-supply = <&vsdcc_fixed>;
-+ 				dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
-+ 				dma-names = "tx", "rx";
-+ 			};
-+ 
-+-			sdcc@12180000 {
-++			sdcc3: sdcc@12180000 {
-+ 				compatible      = "arm,pl18x", "arm,primecell";
-+ 				arm,primecell-periphid = <0x00051180>;
-+ 				status          = "disabled";
-diff --git a/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch b/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch
-new file mode 100644
-index 0000000000..fac8b174d4
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch
-@@ -0,0 +1,754 @@
-+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
-++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-+@@ -8,6 +8,8 @@
-+ #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
-+ #include <dt-bindings/soc/qcom,gsbi.h>
-+ #include <dt-bindings/interrupt-controller/arm-gic.h>
-++#include <dt-bindings/mfd/qcom-rpm.h>
-++#include <dt-bindings/clock/qcom,rpmcc.h>
-+ 
-+ / {
-+ 	#address-cells = <1>;
-+@@ -28,6 +30,16 @@
-+ 			next-level-cache = <&L2>;
-+ 			qcom,acc = <&acc0>;
-+ 			qcom,saw = <&saw0>;
-++			clocks = <&kraitcc 0>, <&kraitcc 4>;
-++			clock-names = "cpu", "l2";
-++			clock-latency = <100000>;
-++			cpu-supply = <&smb208_s2a>;
-++			operating-points-v2 = <&opp_table0>;
-++			voltage-tolerance = <5>;
-++			cooling-min-state = <0>;
-++			cooling-max-state = <10>;
-++			#cooling-cells = <2>;
-++			cpu-idle-states = <&CPU_SPC>;
-+ 		};
-+ 
-+ 		cpu1: cpu@1 {
-+@@ -38,14 +50,347 @@
-+ 			next-level-cache = <&L2>;
-+ 			qcom,acc = <&acc1>;
-+ 			qcom,saw = <&saw1>;
-++			clocks = <&kraitcc 1>, <&kraitcc 4>;
-++			clock-names = "cpu", "l2";
-++			clock-latency = <100000>;
-++			cpu-supply = <&smb208_s2b>;
-++			operating-points-v2 = <&opp_table0>;
-++			voltage-tolerance = <5>;
-++			cooling-min-state = <0>;
-++			cooling-max-state = <10>;
-++			#cooling-cells = <2>;
-++			cpu-idle-states = <&CPU_SPC>;
-++ 		};
-++
-++		idle-states {
-++			CPU_SPC: spc {
-++				compatible = "qcom,idle-state-spc";
-++				status = "disabled";
-++				entry-latency-us = <400>;
-++				exit-latency-us = <900>;
-++				min-residency-us = <3000>;
-++			};
-+ 		};
-++	};
-+ 
-+-		L2: l2-cache {
-+-			compatible = "cache";
-+-			cache-level = <2>;
-++	opp_table_l2: opp_table_l2 {
-++		compatible = "operating-points-v2";
-++
-++		opp-384000000 {
-++			opp-hz = /bits/ 64 <384000000>;
-++			opp-microvolt = <1100000>;
-++			clock-latency-ns = <100000>;
-++			opp-level = <0>;
-++		};
-++
-++		opp-1000000000 {
-++			opp-hz = /bits/ 64 <1000000000>;
-++			opp-microvolt = <1100000>;
-++			clock-latency-ns = <100000>;
-++			opp-level = <1>;
-++		};
-++
-++		opp-1200000000 {
-++			opp-hz = /bits/ 64 <1200000000>;
-++			opp-microvolt = <1150000>;
-++			clock-latency-ns = <100000>;
-++			opp-level = <2>;
-+ 		};
-+ 	};
-+ 
-++	opp_table0: opp_table0 {
-++		compatible = "operating-points-v2-kryo-cpu";
-++		nvmem-cells = <&speedbin_efuse>;
-++
-++		opp-384000000 {
-++			opp-hz = /bits/ 64 <384000000>;
-++			opp-microvolt-speed0-pvs0-v0 = <950000 1000000 1050000>;
-++			opp-microvolt-speed0-pvs1-v0 = <878750 925000 971250>;
-++			opp-microvolt-speed0-pvs2-v0 = <831250 875000 918750>;
-++			opp-microvolt-speed0-pvs3-v0 = <760000 800000 840000>;
-++			opp-supported-hw = <0x1>;
-++			clock-latency-ns = <100000>;
-++			opp-level = <0>;
-++		};
-++
-++		opp-600000000 {
-++			opp-hz = /bits/ 64 <600000000>;
-++			opp-microvolt-speed0-pvs0-v0 = <997500 1050000 1102500>;
-++			opp-microvolt-speed0-pvs1-v0 = <926250 975000 1023750>;
-++			opp-microvolt-speed0-pvs2-v0 = <878750 925000 971250>;
-++			opp-microvolt-speed0-pvs3-v0 = <807500 850000 892500>;
-++			opp-supported-hw = <0x1>;
-++			clock-latency-ns = <100000>;
-++			opp-level = <1>;
-++		};
-++
-++		opp-800000000 {
-++			opp-hz = /bits/ 64 <800000000>;
-++			opp-microvolt-speed0-pvs0-v0 = <1045000 1100000 1155000>;
-++			opp-microvolt-speed0-pvs1-v0 = <973750 1025000 1076250>;
-++			opp-microvolt-speed0-pvs2-v0 = <945250 995000 1044750>;
-++			opp-microvolt-speed0-pvs3-v0 = <855000 900000 945000>;
-++			opp-supported-hw = <0x1>;
-++			clock-latency-ns = <100000>;
-++			opp-level = <1>;
-++		};
-++
-++		opp-1000000000 {
-++			opp-hz = /bits/ 64 <1000000000>;
-++			opp-microvolt-speed0-pvs0-v0 = <1092500 1150000 1207500>;
-++			opp-microvolt-speed0-pvs1-v0 = <1021250 1075000 1128750>;
-++			opp-microvolt-speed0-pvs2-v0 = <973750 1025000 1076250>;
-++			opp-microvolt-speed0-pvs3-v0 = <902500 950000 997500>;
-++			opp-supported-hw = <0x1>;
-++			clock-latency-ns = <100000>;
-++			opp-level = <1>;
-++		};
-++
-++		opp-1200000000 {
-++			opp-hz = /bits/ 64 <1200000000>;
-++			opp-microvolt-speed0-pvs0-v0 = <1140000 1200000 1260000>;
-++			opp-microvolt-speed0-pvs1-v0 = <1068750 1125000 1181250>;
-++			opp-microvolt-speed0-pvs2-v0 = <1021250 1075000 1128750>;
-++			opp-microvolt-speed0-pvs3-v0 = <950000 1000000 1050000>;
-++			opp-supported-hw = <0x1>;
-++			clock-latency-ns = <100000>;
-++			opp-level = <2>;
-++		};
-++
-++		opp-1400000000 {
-++			opp-hz = /bits/ 64 <1400000000>;
-++			opp-microvolt-speed0-pvs0-v0 = <1187500 1250000 1312500>;
-++			opp-microvolt-speed0-pvs1-v0 = <1116250 1175000 1233750>;
-++			opp-microvolt-speed0-pvs2-v0 = <1068750 1125000 1181250>;
-++			opp-microvolt-speed0-pvs3-v0 = <997500 1050000 1102500>;
-++			opp-supported-hw = <0x1>;
-++			clock-latency-ns = <100000>;
-++			opp-level = <2>;
-++		};
-++	};
-++
-++	thermal-zones {
-++		tsens_tz_sensor0 {
-++			polling-delay-passive = <0>;
-++			polling-delay = <0>;
-++			thermal-sensors = <&tsens 0>;
-++
-++			trips {
-++				cpu-critical {
-++					temperature = <105000>;
-++					hysteresis = <2000>;
-++					type = "critical";
-++				};
-++
-++				cpu-hot {
-++					temperature = <95000>;
-++					hysteresis = <2000>;
-++					type = "hot";
-++				};
-++			};
-++		};
-++
-++		tsens_tz_sensor1 {
-++			polling-delay-passive = <0>;
-++			polling-delay = <0>;
-++			thermal-sensors = <&tsens 1>;
-++
-++			trips {
-++				cpu-critical {
-++					temperature = <105000>;
-++					hysteresis = <2000>;
-++					type = "critical";
-++				};
-++
-++				cpu-hot {
-++					temperature = <95000>;
-++					hysteresis = <2000>;
-++					type = "hot";
-++				};
-++			};
-++		};
-++
-++		tsens_tz_sensor2 {
-++			polling-delay-passive = <0>;
-++			polling-delay = <0>;
-++			thermal-sensors = <&tsens 2>;
-++
-++			trips {
-++				cpu-critical {
-++					temperature = <105000>;
-++					hysteresis = <2000>;
-++					type = "critical";
-++				};
-++
-++				cpu-hot {
-++					temperature = <95000>;
-++					hysteresis = <2000>;
-++					type = "hot";
-++				};
-++			};
-++		};
-++
-++		tsens_tz_sensor3 {
-++			polling-delay-passive = <0>;
-++			polling-delay = <0>;
-++			thermal-sensors = <&tsens 3>;
-++
-++			trips {
-++				cpu-critical {
-++					temperature = <105000>;
-++					hysteresis = <2000>;
-++					type = "critical";
-++				};
-++
-++				cpu-hot {
-++					temperature = <95000>;
-++					hysteresis = <2000>;
-++					type = "hot";
-++				};
-++			};
-++		};
-++
-++		tsens_tz_sensor4 {
-++			polling-delay-passive = <0>;
-++			polling-delay = <0>;
-++			thermal-sensors = <&tsens 4>;
-++
-++			trips {
-++				cpu-critical {
-++					temperature = <105000>;
-++					hysteresis = <2000>;
-++					type = "critical";
-++				};
-++
-++				cpu-hot {
-++					temperature = <95000>;
-++					hysteresis = <2000>;
-++					type = "hot";
-++				};
-++			};
-++		};
-++
-++		tsens_tz_sensor5 {
-++			polling-delay-passive = <0>;
-++			polling-delay = <0>;
-++			thermal-sensors = <&tsens 5>;
-++
-++			trips {
-++				cpu-critical {
-++					temperature = <105000>;
-++					hysteresis = <2000>;
-++					type = "critical";
-++				};
-++
-++				cpu-hot {
-++					temperature = <95000>;
-++					hysteresis = <2000>;
-++					type = "hot";
-++				};
-++			};
-++		};
-++
-++		tsens_tz_sensor6 {
-++			polling-delay-passive = <0>;
-++			polling-delay = <0>;
-++			thermal-sensors = <&tsens 6>;
-++
-++			trips {
-++				cpu-critical {
-++					temperature = <105000>;
-++					hysteresis = <2000>;
-++					type = "critical";
-++				};
-++
-++				cpu-hot {
-++					temperature = <95000>;
-++					hysteresis = <2000>;
-++					type = "hot";
-++				};
-++			};
-++		};
-++
-++		tsens_tz_sensor7 {
-++			polling-delay-passive = <0>;
-++			polling-delay = <0>;
-++			thermal-sensors = <&tsens 7>;
-++
-++			trips {
-++				cpu-critical {
-++					temperature = <105000>;
-++					hysteresis = <2000>;
-++					type = "critical";
-++				};
-++
-++				cpu-hot {
-++					temperature = <95000>;
-++					hysteresis = <2000>;
-++					type = "hot";
-++				};
-++			};
-++		};
-++
-++		tsens_tz_sensor8 {
-++			polling-delay-passive = <0>;
-++			polling-delay = <0>;
-++			thermal-sensors = <&tsens 8>;
-++
-++			trips {
-++				cpu-critical {
-++					temperature = <105000>;
-++					hysteresis = <2000>;
-++					type = "critical";
-++				};
-++
-++				cpu-hot {
-++					temperature = <95000>;
-++					hysteresis = <2000>;
-++					type = "hot";
-++				};
-++			};
-++		};
-++
-++		tsens_tz_sensor9 {
-++			polling-delay-passive = <0>;
-++			polling-delay = <0>;
-++			thermal-sensors = <&tsens 9>;
-++
-++			trips {
-++				cpu-critical {
-++					temperature = <105000>;
-++					hysteresis = <2000>;
-++					type = "critical";
-++				};
-++
-++				cpu-hot {
-++					temperature = <95000>;
-++					hysteresis = <2000>;
-++					type = "hot";
-++				};
-++			};
-++		};
-++
-++		tsens_tz_sensor10 {
-++			polling-delay-passive = <0>;
-++			polling-delay = <0>;
-++			thermal-sensors = <&tsens 10>;
-++
-++			trips {
-++				cpu-critical {
-++					temperature = <105000>;
-++					hysteresis = <2000>;
-++					type = "critical";
-++				};
-++
-++				cpu-hot {
-++					temperature = <95000>;
-++					hysteresis = <2000>;
-++					type = "hot";
-++				};
-++			};
-++ 		};
-++ 	};
-++
-+ 	memory {
-+ 		device_type = "memory";
-+ 		reg = <0x0 0x0>;
-+@@ -93,6 +438,15 @@
-+ 		};
-+ 	};
-+ 
-++	fab-scaling {
-++		compatible = "qcom,fab-scaling";
-++		clocks = <&rpmcc RPM_APPS_FABRIC_A_CLK>, <&rpmcc RPM_EBI1_A_CLK>;
-++		clock-names = "apps-fab-clk", "ddr-fab-clk";
-++		fab_freq_high = <533000000>;
-++		fab_freq_nominal = <400000000>;
-++		cpu_freq_threshold = <1000000000>;
-++	};
-++
-+ 	firmware {
-+ 		scm {
-+ 			compatible = "qcom,scm-ipq806x", "qcom,scm";
-+@@ -120,6 +474,78 @@
-+ 			reg-names = "lpass-lpaif";
-+ 		};
-+ 
-++		L2: l2-cache {
-++			compatible = "qcom,krait-cache", "cache";
-++			cache-level = <2>;
-++			qcom,saw = <&saw_l2>;
-++
-++			clocks = <&kraitcc 4>;
-++			clock-names = "l2";
-++			l2-supply = <&smb208_s1a>;
-++			operating-points-v2 = <&opp_table_l2>;
-++		};
-++
-++		rpm: rpm@108000 {
-++			compatible = "qcom,rpm-ipq8064";
-++			reg = <0x108000 0x1000>;
-++			qcom,ipc = <&l2cc 0x8 2>;
-++
-++			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
-++					 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
-++					 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
-++			interrupt-names = "ack", "err", "wakeup";
-++
-++			clocks = <&gcc RPM_MSG_RAM_H_CLK>;
-++			clock-names = "ram";
-++
-++			#address-cells = <1>;
-++			#size-cells = <0>;
-++
-++			rpmcc: clock-controller {
-++				compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
-++				#clock-cells = <1>;
-++			};
-++
-++			regulators {
-++				compatible = "qcom,rpm-smb208-regulators";
-++
-++				smb208_s1a: s1a {
-++					regulator-min-microvolt = <1050000>;
-++					regulator-max-microvolt = <1150000>;
-++
-++					qcom,switch-mode-frequency = <1200000>;
-++				};
-++
-++				smb208_s1b: s1b {
-++					regulator-min-microvolt = <1050000>;
-++					regulator-max-microvolt = <1150000>;
-++
-++					qcom,switch-mode-frequency = <1200000>;
-++				};
-++
-++				smb208_s2a: s2a {
-++					regulator-min-microvolt = < 800000>;
-++					regulator-max-microvolt = <1250000>;
-++
-++					qcom,switch-mode-frequency = <1200000>;
-++				};
-++
-++				smb208_s2b: s2b {
-++					regulator-min-microvolt = < 800000>;
-++					regulator-max-microvolt = <1250000>;
-++
-++					qcom,switch-mode-frequency = <1200000>;
-++				};
-++			};
-++		};
-++
-++		rng@1a500000 {
-++			compatible = "qcom,prng";
-++			reg = <0x1a500000 0x200>;
-++			clocks = <&gcc PRNG_CLK>;
-++			clock-names = "core";
-++		};
-++
-+ 		qcom_pinmux: pinmux@800000 {
-+ 			compatible = "qcom,ipq8064-pinctrl";
-+ 			reg = <0x800000 0x4000>;
-+@@ -160,6 +586,15 @@
-+ 				};
-+ 			};
-+ 
-++			i2c4_pins: i2c4_pinmux {
-++				mux {
-++					pins = "gpio12", "gpio13";
-++					function = "gsbi4";
-++					drive-strength = <12>;
-++					bias-disable;
-++				};
-++			};
-++
-+ 			spi_pins: spi_pins {
-+ 				mux {
-+ 					pins = "gpio18", "gpio19", "gpio21";
-+@@ -169,6 +604,53 @@
-+ 				};
-+ 			};
-+ 
-++			nand_pins: nand_pins {
-++				disable {
-++					pins = "gpio34", "gpio35", "gpio36",
-++					       "gpio37", "gpio38";
-++					function = "nand";
-++					drive-strength = <10>;
-++					bias-disable;
-++				};
-++
-++				pullups {
-++					pins = "gpio39";
-++					function = "nand";
-++					drive-strength = <10>;
-++					bias-pull-up;
-++				};
-++
-++				hold {
-++					pins = "gpio40", "gpio41", "gpio42",
-++					       "gpio43", "gpio44", "gpio45",
-++					       "gpio46", "gpio47";
-++					function = "nand";
-++					drive-strength = <10>;
-++					bias-bus-hold;
-++				};
-++			};
-++
-++			mdio0_pins: mdio0_pins {
-++				mux {
-++					pins = "gpio0", "gpio1";
-++					function = "mdio";
-++					drive-strength = <8>;
-++					bias-disable;
-++				};
-++			};
-++
-++			rgmii2_pins: rgmii2_pins {
-++				mux {
-++					pins = "gpio27", "gpio28", "gpio29",
-++					       "gpio30", "gpio31", "gpio32",
-++					       "gpio51", "gpio52", "gpio59",
-++					       "gpio60", "gpio61", "gpio62";
-++					function = "rgmii2";
-++					drive-strength = <8>;
-++					bias-disable;
-++				};
-++			};
-++
-+ 			leds_pins: leds_pins {
-+ 				mux {
-+ 					pins = "gpio7", "gpio8", "gpio9",
-+@@ -231,6 +713,17 @@
-+ 			clock-output-names = "acpu1_aux";
-+ 		};
-+ 
-++		l2cc: clock-controller@2011000 {
-++			compatible = "qcom,kpss-gcc", "syscon";
-++			reg = <0x2011000 0x1000>;
-++			clock-output-names = "acpu_l2_aux";
-++		};
-++
-++		kraitcc: clock-controller {
-++			compatible = "qcom,krait-cc-v1";
-++			#clock-cells = <1>;
-++		};
-++
-+ 		saw0: regulator@2089000 {
-+ 			compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
-+ 			reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
-+@@ -243,6 +736,17 @@
-+ 			regulator;
-+ 		};
-+ 
-++		saw_l2: regulator@02012000 {
-++			compatible = "qcom,saw2", "syscon";
-++			reg = <0x02012000 0x1000>;
-++			regulator;
-++		};
-++
-++		sic_non_secure: sic-non-secure@12100000 {
-++			compatible = "syscon";
-++			reg = <0x12100000 0x10000>;
-++		};
-++
-+ 		gsbi2: gsbi@12480000 {
-+ 			compatible = "qcom,gsbi-v1.0.0";
-+ 			cell-index = <2>;
-+@@ -478,6 +982,95 @@
-+ 			#reset-cells = <1>;
-+ 		};
-+ 
-++		sfpb_mutex_block: syscon@1200600 {
-++			compatible = "syscon";
-++			reg = <0x01200600 0x100>;
-++		};
-++
-++		hs_phy_0: hs_phy_0 {
-++			compatible = "qcom,ipq806x-usb-phy-hs";
-++			reg = <0x110f8800 0x30>;
-++			clocks = <&gcc USB30_0_UTMI_CLK>;
-++			clock-names = "ref";
-++			#phy-cells = <0>;
-++		};
-++
-++		ss_phy_0: ss_phy_0 {
-++			compatible = "qcom,ipq806x-usb-phy-ss";
-++			reg = <0x110f8830 0x30>;
-++			clocks = <&gcc USB30_0_MASTER_CLK>;
-++			clock-names = "ref";
-++			#phy-cells = <0>;
-++		};
-++
-++		usb3_0: usb3@110f8800 {
-++			compatible = "qcom,dwc3", "syscon";
-++			#address-cells = <1>;
-++			#size-cells = <1>;
-++			reg = <0x110f8800 0x8000>;
-++			clocks = <&gcc USB30_0_MASTER_CLK>;
-++			clock-names = "core";
-++
-++			ranges;
-++
-++			resets = <&gcc USB30_0_MASTER_RESET>;
-++			reset-names = "master";
-++
-++			status = "disabled";
-++
-++			dwc3_0: dwc3@11000000 {
-++				compatible = "snps,dwc3";
-++				reg = <0x11000000 0xcd00>;
-++				interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
-++				phys = <&hs_phy_0>, <&ss_phy_0>;
-++				phy-names = "usb2-phy", "usb3-phy";
-++				dr_mode = "host";
-++				snps,dis_u3_susphy_quirk;
-++			};
-++		};
-++
-++		hs_phy_1: hs_phy_1 {
-++			compatible = "qcom,ipq806x-usb-phy-hs";
-++			reg = <0x100f8800 0x30>;
-++			clocks = <&gcc USB30_1_UTMI_CLK>;
-++			clock-names = "ref";
-++			#phy-cells = <0>;
-++		};
-++
-++		ss_phy_1: ss_phy_1 {
-++			compatible = "qcom,ipq806x-usb-phy-ss";
-++			reg = <0x100f8830 0x30>;
-++			clocks = <&gcc USB30_1_MASTER_CLK>;
-++			clock-names = "ref";
-++			#phy-cells = <0>;
-++		};
-++
-++		usb3_1: usb3@100f8800 {
-++			compatible = "qcom,dwc3", "syscon";
-++			#address-cells = <1>;
-++			#size-cells = <1>;
-++			reg = <0x100f8800 0x8000>;
-++			clocks = <&gcc USB30_1_MASTER_CLK>;
-++			clock-names = "core";
-++
-++			ranges;
-++
-++			resets = <&gcc USB30_1_MASTER_RESET>;
-++			reset-names = "master";
-++
-++			status = "disabled";
-++
-++			dwc3_1: dwc3@10000000 {
-++				compatible = "snps,dwc3";
-++				reg = <0x10000000 0xcd00>;
-++				interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
-++				phys = <&hs_phy_1>, <&ss_phy_1>;
-++				phy-names = "usb2-phy", "usb3-phy";
-++				dr_mode = "host";
-++				snps,dis_u3_susphy_quirk;
-++			};
-++		};
-++
-+ 		pcie0: pci@1b500000 {
-+ 			compatible = "qcom,pcie-ipq8064";
-+ 			reg = <0x1b500000 0x1000
-+@@ -739,6 +1332,59 @@
-+ 			status = "disabled";
-+ 		};
-+ 
-++		adm_dma: dma@18300000 {
-++			compatible = "qcom,adm";
-++			reg = <0x18300000 0x100000>;
-++			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
-++			#dma-cells = <1>;
-++
-++			clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
-++			clock-names = "core", "iface";
-++
-++			resets = <&gcc ADM0_RESET>,
-++				 <&gcc ADM0_PBUS_RESET>,
-++				 <&gcc ADM0_C0_RESET>,
-++				 <&gcc ADM0_C1_RESET>,
-++				 <&gcc ADM0_C2_RESET>;
-++			reset-names = "clk", "pbus", "c0", "c1", "c2";
-++			qcom,ee = <0>;
-++
-++			status = "disabled";
-++		};
-++
-++		nand_controller: nand-controller@1ac00000 {
-++			compatible = "qcom,ipq806x-nand";
-++			reg = <0x1ac00000 0x800>;
-++
-++			clocks = <&gcc EBI2_CLK>,
-++				 <&gcc EBI2_AON_CLK>;
-++			clock-names = "core", "aon";
-++
-++			dmas = <&adm_dma 3>;
-++			dma-names = "rxtx";
-++			qcom,cmd-crci = <15>;
-++			qcom,data-crci = <3>;
-++
-++			status = "disabled";
-++
-++			#address-cells = <1>;
-++			#size-cells = <0>;
-++		};
-++
-++		mdio0: mdio@37000000 {
-++			#address-cells = <1>;
-++			#size-cells = <0>;
-++
-++			compatible = "qcom,ipq8064-mdio", "syscon";
-++			reg = <0x37000000 0x200000>;
-++			resets = <&gcc GMAC_CORE1_RESET>;
-++			reset-names = "stmmaceth";
-++			clocks = <&gcc GMAC_CORE1_CLK>;
-++			clock-names = "stmmaceth";
-++
-++			status = "disabled";
-++		};
-++
-+ 		vsdcc_fixed: vsdcc-regulator {
-+ 			compatible = "regulator-fixed";
-+ 			regulator-name = "SDCC Power";
-+@@ -814,4 +1460,17 @@
-+ 			};
-+ 		};
-+ 	};
-++
-++	sfpb_mutex: sfpb-mutex {
-++		compatible = "qcom,sfpb-mutex";
-++		syscon = <&sfpb_mutex_block 4 4>;
-++
-++		#hwlock-cells = <1>;
-++	};
-++
-++	smem {
-++		compatible = "qcom,smem";
-++		memory-region = <&smem>;
-++		hwlocks = <&sfpb_mutex 3>;
-++	};
-+ };
-diff --git a/target/linux/ipq806x/patches-5.10/084-ipq8064-v1.0-dtsi-cleanup.patch b/target/linux/ipq806x/patches-5.10/084-ipq8064-v1.0-dtsi-cleanup.patch
-new file mode 100644
-index 0000000000..e5ea8e6393
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/084-ipq8064-v1.0-dtsi-cleanup.patch
-@@ -0,0 +1,89 @@
-+This uses upstream qcom-ipq8064-v1.0.dtsi and modifies it by patches
-+instead of keeping a local version.
-+We drop partitions, LEDs and keys from the file as we will implement
-+them differently anyway.
-+
-+--- a/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
-++++ b/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
-+@@ -42,16 +42,6 @@
-+ 					#size-cells = <1>;
-+ 					spi-max-frequency = <50000000>;
-+ 					reg = <0>;
-+-
-+-					partition@0 {
-+-						label = "rootfs";
-+-						reg = <0x0 0x1000000>;
-+-					};
-+-
-+-					partition@1 {
-+-						label = "scratch";
-+-						reg = <0x1000000 0x1000000>;
-+-					};
-+ 				};
-+ 			};
-+ 		};
-+@@ -64,64 +54,5 @@
-+ 			ports-implemented = <0x1>;
-+ 			status = "ok";
-+ 		};
-+-
-+-		gpio_keys {
-+-			compatible = "gpio-keys";
-+-			pinctrl-0 = <&buttons_pins>;
-+-			pinctrl-names = "default";
-+-
-+-			button@1 {
-+-				label = "reset";
-+-				linux,code = <KEY_RESTART>;
-+-				gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
-+-				linux,input-type = <1>;
-+-				debounce-interval = <60>;
-+-			};
-+-			button@2 {
-+-				label = "wps";
-+-				linux,code = <KEY_WPS_BUTTON>;
-+-				gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
-+-				linux,input-type = <1>;
-+-				debounce-interval = <60>;
-+-			};
-+-		};
-+-
-+-		leds {
-+-			compatible = "gpio-leds";
-+-			pinctrl-0 = <&leds_pins>;
-+-			pinctrl-names = "default";
-+-
-+-			led@7 {
-+-				label = "led_usb1";
-+-				gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
-+-				linux,default-trigger = "usbdev";
-+-				default-state = "off";
-+-			};
-+-
-+-			led@8 {
-+-				label = "led_usb3";
-+-				gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
-+-				linux,default-trigger = "usbdev";
-+-				default-state = "off";
-+-			};
-+-
-+-			led@9 {
-+-				label = "status_led_fail";
-+-				gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
-+-				default-state = "off";
-+-			};
-+-
-+-			led@26 {
-+-				label = "sata_led";
-+-				gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
-+-				default-state = "off";
-+-			};
-+-
-+-			led@53 {
-+-				label = "status_led_pass";
-+-				gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
-+-				default-state = "off";
-+-			};
-+-		};
-+ 	};
-+ };
-diff --git a/target/linux/ipq806x/patches-5.10/085-ipq8064-v1.0-dtsi-additions.patch b/target/linux/ipq806x/patches-5.10/085-ipq8064-v1.0-dtsi-additions.patch
-new file mode 100644
-index 0000000000..58f6a46e4f
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/085-ipq8064-v1.0-dtsi-additions.patch
-@@ -0,0 +1,14 @@
-+This uses upstream qcom-ipq8064-v1.0.dtsi and modifies it by patches
-+instead of keeping a local version. This patch adds our local adjustments
-+for the (local) additional contents of qcom-ipq8064.dtsi
-+
-+--- a/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
-++++ b/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
-+@@ -56,3 +56,7 @@
-+ 		};
-+ 	};
-+ };
-++
-++&CPU_SPC {
-++	status = "okay";
-++};
-diff --git a/target/linux/ipq806x/patches-5.10/086-ipq8064-fix-duplicate-node.patch b/target/linux/ipq806x/patches-5.10/086-ipq8064-fix-duplicate-node.patch
-new file mode 100644
-index 0000000000..8423fd137f
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/086-ipq8064-fix-duplicate-node.patch
-@@ -0,0 +1,145 @@
-+--- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
-++++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
-+@@ -24,73 +24,6 @@
-+ 		device_type = "memory";
-+ 	};
-+ 
-+-	mdio0: mdio@0 {
-+-		status = "okay";
-+-		compatible = "virtual,mdio-gpio";
-+-		gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
-+-			<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
-+-		#address-cells = <1>;
-+-		#size-cells = <0>;
-+-
-+-		pinctrl-0 = <&mdio0_pins>;
-+-		pinctrl-names = "default";
-+-
-+-		switch0: switch@10 {
-+-			compatible = "qca,qca8337";
-+-			#address-cells = <1>;
-+-			#size-cells = <0>;
-+-
-+-			dsa,member = <0 0>;
-+-
-+-			pinctrl-0 = <&sw0_reset_pin>;
-+-			pinctrl-names = "default";
-+-
-+-			reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
-+-			reg = <0x10>;
-+-
-+-			ports {
-+-				#address-cells = <1>;
-+-				#size-cells = <0>;
-+-
-+-				switch0cpu: port@0 {
-+-					reg = <0>;
-+-					label = "cpu";
-+-					ethernet = <&gmac0>;
-+-					phy-mode = "rgmii-id";
-+-					fixed-link {
-+-						speed = <1000>;
-+-						full-duplex;
-+-					};
-+-				};
-+-
-+-				port@1 {
-+-					reg = <1>;
-+-					label = "sw1";
-+-				};
-+-
-+-				port@2 {
-+-					reg = <2>;
-+-					label = "sw2";
-+-				};
-+-
-+-				port@3 {
-+-					reg = <3>;
-+-					label = "sw3";
-+-				};
-+-
-+-				port@4 {
-+-					reg = <4>;
-+-					label = "sw4";
-+-				};
-+-
-+-				port@5 {
-+-					reg = <5>;
-+-					label = "sw5";
-+-				};
-+-			};
-+-		};
-+-	};
-+-
-+ 	mdio1: mdio@1 {
-+ 		status = "okay";
-+ 		compatible = "virtual,mdio-gpio";
-+@@ -216,6 +149,68 @@
-+ 	};
-+ };
-+ 
-++&mdio0 {
-++	status = "okay";
-++
-++	pinctrl-0 = <&mdio0_pins>;
-++	pinctrl-names = "default";
-++
-++	switch0: switch@10 {
-++		compatible = "qca,qca8337";
-++		#address-cells = <1>;
-++		#size-cells = <0>;
-++
-++		dsa,member = <0 0>;
-++
-++		pinctrl-0 = <&sw0_reset_pin>;
-++		pinctrl-names = "default";
-++
-++		reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
-++		reg = <0x10>;
-++
-++		ports {
-++			#address-cells = <1>;
-++			#size-cells = <0>;
-++
-++			switch0cpu: port@0 {
-++				reg = <0>;
-++				label = "cpu";
-++				ethernet = <&gmac0>;
-++				phy-mode = "rgmii-id";
-++				fixed-link {
-++					speed = <1000>;
-++					full-duplex;
-++				};
-++			};
-++
-++			port@1 {
-++				reg = <1>;
-++				label = "sw1";
-++			};
-++
-++			port@2 {
-++				reg = <2>;
-++				label = "sw2";
-++			};
-++
-++			port@3 {
-++				reg = <3>;
-++				label = "sw3";
-++			};
-++
-++			port@4 {
-++				reg = <4>;
-++				label = "sw4";
-++			};
-++
-++			port@5 {
-++				reg = <5>;
-++				label = "sw5";
-++			};
-++		};
-++	};
-++};
-++
-+ &gmac0 {
-+ 	status = "okay";
-+ 
-diff --git a/target/linux/ipq806x/patches-5.10/093-drivers-cpufreq-qcom-cpufreq-nvmem-support-specific-.patch b/target/linux/ipq806x/patches-5.10/093-drivers-cpufreq-qcom-cpufreq-nvmem-support-specific-.patch
-new file mode 100644
-index 0000000000..19c3d096c4
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/093-drivers-cpufreq-qcom-cpufreq-nvmem-support-specific-.patch
-@@ -0,0 +1,51 @@
-+From a206d4061f1cc2c5cd17ee45c53a0ba711e48e6d Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Sun, 7 Feb 2021 16:42:52 +0100
-+Subject: [PATCH 3/3] drivers: cpufreq: qcom-cpufreq-nvmem: support specific
-+ cpufreq driver
-+
-+Add support for specific cpufreq driver for qcom-cpufreq-nvmem driver.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+---
-+ drivers/cpufreq/qcom-cpufreq-nvmem.c | 15 +++++++++++++++
-+ 1 file changed, 15 insertions(+)
-+
-+--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
-++++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
-+@@ -52,6 +52,7 @@ struct qcom_cpufreq_match_data {
-+ 			   char **pvs_name,
-+ 			   struct qcom_cpufreq_drv *drv);
-+ 	const char **genpd_names;
-++	const char *cpufreq_driver;
-+ };
-+ 
-+ struct qcom_cpufreq_drv {
-+@@ -250,6 +251,7 @@ static const struct qcom_cpufreq_match_d
-+ 
-+ static const struct qcom_cpufreq_match_data match_data_krait = {
-+ 	.get_version = qcom_cpufreq_krait_name_version,
-++	.cpufreq_driver = "krait-cpufreq",
-+ };
-+ 
-+ static const char *qcs404_genpd_names[] = { "cpr", NULL };
-+@@ -385,6 +387,19 @@ static int qcom_cpufreq_probe(struct pla
-+ 		}
-+ 	}
-+ 
-++	if (drv->data->cpufreq_driver) {
-++		cpufreq_dt_pdev = platform_device_register_simple(
-++			drv->data->cpufreq_driver, -1, NULL, 0);
-++		if (!IS_ERR(cpufreq_dt_pdev)) {
-++			platform_set_drvdata(pdev, drv);
-++			return 0;
-++		} else {
-++			dev_err(cpu_dev,
-++				"Failed to register dedicated %s cpufreq\n",
-++				drv->data->cpufreq_driver);
-++		}
-++	}
-++
-+ 	cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
-+ 							  NULL, 0);
-+ 	if (!IS_ERR(cpufreq_dt_pdev)) {
-diff --git a/target/linux/ipq806x/patches-5.10/097-1-ipq806x-gcc-add-missing-clk-flag.patch b/target/linux/ipq806x/patches-5.10/097-1-ipq806x-gcc-add-missing-clk-flag.patch
-new file mode 100644
-index 0000000000..3067ec777a
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/097-1-ipq806x-gcc-add-missing-clk-flag.patch
-@@ -0,0 +1,115 @@
-+From 0af44917941cbfecdc86bb9bf05ff01d22a88973 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Sun, 7 Feb 2021 16:52:56 +0100
-+Subject: [PATCH 1/4] ipq806x: gcc: add missing clk flag
-+
-+Some flag are missing from the original code.
-+These clk can't be set using the protected-clock proprities as they
-+cause the malfunction of the serial interface.
-+These clks are needed for the rpm interface to work proprely or the
-+cpu regulators starts to fail as soon as they are disabled by the
-+kernel.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+---
-+ drivers/clk/qcom/gcc-ipq806x.c | 19 +++++++++++++------
-+ 1 file changed, 13 insertions(+), 6 deletions(-)
-+
-+--- a/drivers/clk/qcom/gcc-ipq806x.c
-++++ b/drivers/clk/qcom/gcc-ipq806x.c
-+@@ -65,6 +65,7 @@ static struct clk_pll pll3 = {
-+ 		.parent_names = (const char *[]){ "pxo" },
-+ 		.num_parents = 1,
-+ 		.ops = &clk_pll_ops,
-++		.flags = CLK_IS_CRITICAL,
-+ 	},
-+ };
-+ 
-+@@ -782,7 +783,7 @@ static struct clk_rcg gsbi4_qup_src = {
-+ 			.parent_names = gcc_pxo_pll8,
-+ 			.num_parents = 2,
-+ 			.ops = &clk_rcg_ops,
-+-			.flags = CLK_SET_PARENT_GATE,
-++			.flags = CLK_SET_PARENT_GATE | CLK_IGNORE_UNUSED,
-+ 		},
-+ 	},
-+ };
-+@@ -798,7 +799,7 @@ static struct clk_branch gsbi4_qup_clk =
-+ 			.parent_names = (const char *[]){ "gsbi4_qup_src" },
-+ 			.num_parents = 1,
-+ 			.ops = &clk_branch_ops,
-+-			.flags = CLK_SET_RATE_PARENT,
-++			.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+ 		},
-+ 	},
-+ };
-+@@ -880,7 +881,7 @@ static struct clk_rcg gsbi6_qup_src = {
-+ 			.parent_names = gcc_pxo_pll8,
-+ 			.num_parents = 2,
-+ 			.ops = &clk_rcg_ops,
-+-			.flags = CLK_SET_PARENT_GATE,
-++			.flags = CLK_SET_PARENT_GATE | CLK_IGNORE_UNUSED,
-+ 		},
-+ 	},
-+ };
-+@@ -945,7 +946,7 @@ static struct clk_branch gsbi7_qup_clk =
-+ 			.parent_names = (const char *[]){ "gsbi7_qup_src" },
-+ 			.num_parents = 1,
-+ 			.ops = &clk_branch_ops,
-+-			.flags = CLK_SET_RATE_PARENT,
-++			.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+ 		},
-+ 	},
-+ };
-+@@ -991,6 +992,7 @@ static struct clk_branch gsbi4_h_clk = {
-+ 		.hw.init = &(struct clk_init_data){
-+ 			.name = "gsbi4_h_clk",
-+ 			.ops = &clk_branch_ops,
-++			.flags = CLK_IGNORE_UNUSED,
-+ 		},
-+ 	},
-+ };
-+@@ -1293,6 +1295,7 @@ static struct clk_rcg sdc1_src = {
-+ 			.parent_names = gcc_pxo_pll8,
-+ 			.num_parents = 2,
-+ 			.ops = &clk_rcg_ops,
-++			.flags = CLK_SET_RATE_GATE,
-+ 		},
-+ 	}
-+ };
-+@@ -1341,6 +1344,7 @@ static struct clk_rcg sdc3_src = {
-+ 			.parent_names = gcc_pxo_pll8,
-+ 			.num_parents = 2,
-+ 			.ops = &clk_rcg_ops,
-++			.flags = CLK_SET_RATE_GATE,
-+ 		},
-+ 	}
-+ };
-+@@ -1424,6 +1428,7 @@ static struct clk_rcg tsif_ref_src = {
-+ 			.parent_names = gcc_pxo_pll8,
-+ 			.num_parents = 2,
-+ 			.ops = &clk_rcg_ops,
-++			.flags = CLK_SET_RATE_GATE,
-+ 		},
-+ 	}
-+ };
-+@@ -2694,7 +2699,8 @@ static struct clk_dyn_rcg ubi32_core1_sr
-+ 			.parent_names = gcc_pxo_pll8_pll14_pll18_pll0,
-+ 			.num_parents = 5,
-+ 			.ops = &clk_dyn_rcg_ops,
-+-			.flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE,
-++			.flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE |
-++				 CLK_IGNORE_UNUSED,
-+ 		},
-+ 	},
-+ };
-+@@ -2747,7 +2753,8 @@ static struct clk_dyn_rcg ubi32_core2_sr
-+ 			.parent_names = gcc_pxo_pll8_pll14_pll18_pll0,
-+ 			.num_parents = 5,
-+ 			.ops = &clk_dyn_rcg_ops,
-+-			.flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE,
-++			.flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE |
-++				 CLK_IGNORE_UNUSED,
-+ 		},
-+ 	},
-+ };
-diff --git a/target/linux/ipq806x/patches-5.10/097-2-ipq806x-lcc-add-missing-reset.patch b/target/linux/ipq806x/patches-5.10/097-2-ipq806x-lcc-add-missing-reset.patch
-new file mode 100644
-index 0000000000..cd2cb33356
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/097-2-ipq806x-lcc-add-missing-reset.patch
-@@ -0,0 +1,59 @@
-+From 3a5f1793c0bf4a6b536751886b0a44589fe05f35 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Sun, 7 Feb 2021 17:00:07 +0100
-+Subject: [PATCH 2/4] ipq806x: lcc: add missing reset
-+
-+Add missing reset for ipq806x lcc clk
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+---
-+ drivers/clk/qcom/lcc-ipq806x.c               | 8 ++++++++
-+ include/dt-bindings/clock/qcom,lcc-ipq806x.h | 1 +
-+ 2 files changed, 9 insertions(+)
-+
-+--- a/drivers/clk/qcom/lcc-ipq806x.c
-++++ b/drivers/clk/qcom/lcc-ipq806x.c
-+@@ -12,6 +12,7 @@
-+ #include <linux/of_device.h>
-+ #include <linux/clk-provider.h>
-+ #include <linux/regmap.h>
-++#include <linux/reset-controller.h>
-+ 
-+ #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
-+ 
-+@@ -22,6 +23,7 @@
-+ #include "clk-branch.h"
-+ #include "clk-regmap-divider.h"
-+ #include "clk-regmap-mux.h"
-++#include "reset.h"
-+ 
-+ static struct clk_pll pll4 = {
-+ 	.l_reg = 0x4,
-+@@ -39,6 +41,10 @@ static struct clk_pll pll4 = {
-+ 	},
-+ };
-+ 
-++static const struct qcom_reset_map lcc_ipq806x_resets[] = {
-++	[LCC_PCM_RESET] = { 0x54, 13 },
-++};
-++
-+ static const struct pll_config pll4_config = {
-+ 	.l = 0xf,
-+ 	.m = 0x91,
-+@@ -417,6 +423,8 @@ static const struct qcom_cc_desc lcc_ipq
-+ 	.config = &lcc_ipq806x_regmap_config,
-+ 	.clks = lcc_ipq806x_clks,
-+ 	.num_clks = ARRAY_SIZE(lcc_ipq806x_clks),
-++	.resets = lcc_ipq806x_resets,
-++	.num_resets = ARRAY_SIZE(lcc_ipq806x_resets),
-+ };
-+ 
-+ static const struct of_device_id lcc_ipq806x_match_table[] = {
-+--- a/include/dt-bindings/clock/qcom,lcc-ipq806x.h
-++++ b/include/dt-bindings/clock/qcom,lcc-ipq806x.h
-+@@ -19,4 +19,5 @@
-+ #define SPDIF_CLK			10
-+ #define AHBIX_CLK			11
-+ 
-++#define LCC_PCM_RESET			0
-+ #endif
-diff --git a/target/linux/ipq806x/patches-5.10/097-3-clk-qcom-krait-add-missing-enable-disable.patch b/target/linux/ipq806x/patches-5.10/097-3-clk-qcom-krait-add-missing-enable-disable.patch
-new file mode 100644
-index 0000000000..bf1c1a4a2f
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/097-3-clk-qcom-krait-add-missing-enable-disable.patch
-@@ -0,0 +1,57 @@
-+From f8fdbecdaca97f0f2eebd77256e2eca4a8da6c39 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Sun, 7 Feb 2021 17:08:16 +0100
-+Subject: [PATCH 3/4] clk: qcom: krait: add missing enable disable
-+
-+Add missing enable disable mux function. Add extra check to
-+div2_round_rate.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+---
-+ drivers/clk/qcom/clk-krait.c | 27 +++++++++++++++++++++++++--
-+ 1 file changed, 25 insertions(+), 2 deletions(-)
-+
-+--- a/drivers/clk/qcom/clk-krait.c
-++++ b/drivers/clk/qcom/clk-krait.c
-+@@ -68,7 +68,25 @@ static u8 krait_mux_get_parent(struct cl
-+ 	return clk_mux_val_to_index(hw, mux->parent_map, 0, sel);
-+ }
-+ 
-++static int krait_mux_enable(struct clk_hw *hw)
-++{
-++	struct krait_mux_clk *mux = to_krait_mux_clk(hw);
-++
-++	__krait_mux_set_sel(mux, mux->en_mask);
-++
-++	return 0;
-++}
-++
-++static void krait_mux_disable(struct clk_hw *hw)
-++{
-++	struct krait_mux_clk *mux = to_krait_mux_clk(hw);
-++
-++	__krait_mux_set_sel(mux, mux->safe_sel);
-++}
-++
-+ const struct clk_ops krait_mux_clk_ops = {
-++	.enable = krait_mux_enable,
-++	.disable = krait_mux_disable,
-+ 	.set_parent = krait_mux_set_parent,
-+ 	.get_parent = krait_mux_get_parent,
-+ 	.determine_rate = __clk_mux_determine_rate_closest,
-+@@ -79,8 +97,13 @@ EXPORT_SYMBOL_GPL(krait_mux_clk_ops);
-+ static long krait_div2_round_rate(struct clk_hw *hw, unsigned long rate,
-+ 				  unsigned long *parent_rate)
-+ {
-+-	*parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), rate * 2);
-+-	return DIV_ROUND_UP(*parent_rate, 2);
-++	struct clk_hw *hw_parent = clk_hw_get_parent(hw);
-++
-++	if (hw_parent) {
-++		*parent_rate = clk_hw_round_rate(hw_parent, rate * 2);
-++		return DIV_ROUND_UP(*parent_rate, 2);
-++	} else
-++		return -1;
-+ }
-+ 
-+ static int krait_div2_set_rate(struct clk_hw *hw, unsigned long rate,
-diff --git a/target/linux/ipq806x/patches-5.10/097-4-ipq806x-gcc-add-missing-clk-and-reset-for-crypto-eng.patch b/target/linux/ipq806x/patches-5.10/097-4-ipq806x-gcc-add-missing-clk-and-reset-for-crypto-eng.patch
-new file mode 100644
-index 0000000000..f8f4924dd1
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/097-4-ipq806x-gcc-add-missing-clk-and-reset-for-crypto-eng.patch
-@@ -0,0 +1,372 @@
-+From 22a0f55b0e505fbbbb680e451a62878bc97f7ff1 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Sun, 7 Feb 2021 17:23:38 +0100
-+Subject: [PATCH 4/4] ipq806x: gcc: add missing clk and reset for crypto engine
-+
-+Add missing clk and reset needed for nss additional core and crypto
-+engine.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+---
-+ drivers/clk/qcom/gcc-ipq806x.c               | 250 +++++++++++++++++++
-+ include/dt-bindings/clock/qcom,gcc-ipq806x.h |   5 +-
-+ include/dt-bindings/reset/qcom,gcc-ipq806x.h |   5 +
-+ 3 files changed, 259 insertions(+), 1 deletion(-)
-+
-+--- a/drivers/clk/qcom/gcc-ipq806x.c
-++++ b/drivers/clk/qcom/gcc-ipq806x.c
-+@@ -223,7 +223,9 @@ static struct clk_regmap pll14_vote = {
-+ 
-+ static struct pll_freq_tbl pll18_freq_tbl[] = {
-+ 	NSS_PLL_RATE(550000000, 44, 0, 1, 0x01495625),
-++	NSS_PLL_RATE(600000000, 48, 0, 1, 0x01495625),
-+ 	NSS_PLL_RATE(733000000, 58, 16, 25, 0x014b5625),
-++	NSS_PLL_RATE(800000000, 64, 0, 1, 0x01495625),
-+ };
-+ 
-+ static struct clk_pll pll18 = {
-+@@ -245,6 +247,22 @@ static struct clk_pll pll18 = {
-+ 	},
-+ };
-+ 
-++static struct clk_pll pll11 = {
-++	.l_reg = 0x3184,
-++	.m_reg = 0x3188,
-++	.n_reg = 0x318c,
-++	.config_reg = 0x3194,
-++	.mode_reg = 0x3180,
-++	.status_reg = 0x3198,
-++	.status_bit = 16,
-++	.clkr.hw.init = &(struct clk_init_data){
-++		.name = "pll11",
-++		.parent_names = (const char *[]){ "pxo" },
-++		.num_parents = 1,
-++		.ops = &clk_pll_ops,
-++	},
-++};
-++
-+ enum {
-+ 	P_PXO,
-+ 	P_PLL8,
-+@@ -253,6 +271,7 @@ enum {
-+ 	P_CXO,
-+ 	P_PLL14,
-+ 	P_PLL18,
-++	P_PLL11,
-+ };
-+ 
-+ static const struct parent_map gcc_pxo_pll8_map[] = {
-+@@ -320,6 +339,42 @@ static const char * const gcc_pxo_pll8_p
-+ 	"pll18",
-+ };
-+ 
-++static const struct parent_map gcc_pxo_pll8_pll0_pll14_pll18_pll11_map[] = {
-++	{ P_PXO, 0 },
-++	{ P_PLL8, 4 },
-++	{ P_PLL0, 2 },
-++	{ P_PLL14, 5 },
-++	{ P_PLL18, 1 },
-++	{ P_PLL11, 3 },
-++};
-++
-++static const char *gcc_pxo_pll8_pll0_pll14_pll18_pll11[] = {
-++	"pxo",
-++	"pll8_vote",
-++	"pll0_vote",
-++	"pll14",
-++	"pll18",
-++	"pll11"
-++};
-++
-++static const struct parent_map gcc_pxo_pll3_pll0_pll14_pll18_pll11_map[] = {
-++	{ P_PXO, 0 },
-++	{ P_PLL3, 6 },
-++	{ P_PLL0, 2 },
-++	{ P_PLL14, 5 },
-++	{ P_PLL18, 1 },
-++	{ P_PLL11, 3 },
-++};
-++
-++static const char *gcc_pxo_pll3_pll0_pll14_pll18_pll11[] = {
-++	"pxo",
-++	"pll3",
-++	"pll0_vote",
-++	"pll14",
-++	"pll18",
-++	"pll11"
-++};
-++
-+ static struct freq_tbl clk_tbl_gsbi_uart[] = {
-+ 	{  1843200, P_PLL8, 2,  6, 625 },
-+ 	{  3686400, P_PLL8, 2, 12, 625 },
-+@@ -1261,6 +1316,7 @@ static const struct freq_tbl clk_tbl_sdc
-+ 	{  20210000, P_PLL8,  1, 1,  19 },
-+ 	{  24000000, P_PLL8,  4, 1,   4 },
-+ 	{  48000000, P_PLL8,  4, 1,   2 },
-++	{  52000000, P_PLL8,  1, 2,  15 }, /* 51.2 Mhz */
-+ 	{  64000000, P_PLL8,  3, 1,   2 },
-+ 	{  96000000, P_PLL8,  4, 0,   0 },
-+ 	{ 192000000, P_PLL8,  2, 0,   0 },
-+@@ -2647,7 +2703,9 @@ static const struct freq_tbl clk_tbl_nss
-+ 	{ 110000000, P_PLL18, 1, 1, 5 },
-+ 	{ 275000000, P_PLL18, 2, 0, 0 },
-+ 	{ 550000000, P_PLL18, 1, 0, 0 },
-++	{ 600000000, P_PLL18, 1, 0, 0 },
-+ 	{ 733000000, P_PLL18, 1, 0, 0 },
-++	{ 800000000, P_PLL18, 1, 0, 0 },
-+ 	{ }
-+ };
-+ 
-+@@ -2759,6 +2817,186 @@ static struct clk_dyn_rcg ubi32_core2_sr
-+ 	},
-+ };
-+ 
-++static const struct freq_tbl clk_tbl_ce5_core[] = {
-++	{ 150000000, P_PLL3, 8, 1, 1 },
-++	{ 213200000, P_PLL11, 5, 1, 1 },
-++	{ }
-++};
-++
-++static struct clk_dyn_rcg ce5_core_src = {
-++	.ns_reg[0] = 0x36C4,
-++	.ns_reg[1] = 0x36C8,
-++	.bank_reg = 0x36C0,
-++	.s[0] = {
-++		.src_sel_shift = 0,
-++		.parent_map = gcc_pxo_pll3_pll0_pll14_pll18_pll11_map,
-++	},
-++	.s[1] = {
-++		.src_sel_shift = 0,
-++		.parent_map = gcc_pxo_pll3_pll0_pll14_pll18_pll11_map,
-++	},
-++	.p[0] = {
-++		.pre_div_shift = 3,
-++		.pre_div_width = 4,
-++	},
-++	.p[1] = {
-++		.pre_div_shift = 3,
-++		.pre_div_width = 4,
-++	},
-++	.mux_sel_bit = 0,
-++	.freq_tbl = clk_tbl_ce5_core,
-++	.clkr = {
-++		.enable_reg = 0x36C0,
-++		.enable_mask = BIT(1),
-++		.hw.init = &(struct clk_init_data){
-++			.name = "ce5_core_src",
-++			.parent_names = gcc_pxo_pll3_pll0_pll14_pll18_pll11,
-++			.num_parents = 6,
-++			.ops = &clk_dyn_rcg_ops,
-++		},
-++	},
-++};
-++
-++static struct clk_branch ce5_core_clk = {
-++	.halt_reg = 0x2FDC,
-++	.halt_bit = 5,
-++	.hwcg_reg = 0x36CC,
-++	.hwcg_bit = 6,
-++	.clkr = {
-++		.enable_reg = 0x36CC,
-++		.enable_mask = BIT(4),
-++		.hw.init = &(struct clk_init_data){
-++			.name = "ce5_core_clk",
-++			.parent_names = (const char *[]){
-++				"ce5_core_src",
-++			},
-++			.num_parents = 1,
-++			.ops = &clk_branch_ops,
-++			.flags = CLK_SET_RATE_PARENT,
-++		},
-++	},
-++};
-++
-++static const struct freq_tbl clk_tbl_ce5_a_clk[] = {
-++	{ 160000000, P_PLL0, 5, 1, 1 },
-++	{ 213200000, P_PLL11, 5, 1, 1 },
-++	{ }
-++};
-++
-++static struct clk_dyn_rcg ce5_a_clk_src = {
-++	.ns_reg[0] = 0x3d84,
-++	.ns_reg[1] = 0x3d88,
-++	.bank_reg = 0x3d80,
-++	.s[0] = {
-++		.src_sel_shift = 0,
-++		.parent_map = gcc_pxo_pll8_pll0_pll14_pll18_pll11_map,
-++	},
-++	.s[1] = {
-++		.src_sel_shift = 0,
-++		.parent_map = gcc_pxo_pll8_pll0_pll14_pll18_pll11_map,
-++	},
-++	.p[0] = {
-++		.pre_div_shift = 3,
-++		.pre_div_width = 4,
-++	},
-++	.p[1] = {
-++		.pre_div_shift = 3,
-++		.pre_div_width = 4,
-++	},
-++	.mux_sel_bit = 0,
-++	.freq_tbl = clk_tbl_ce5_a_clk,
-++	.clkr = {
-++		.enable_reg = 0x3d80,
-++		.enable_mask = BIT(1),
-++		.hw.init = &(struct clk_init_data){
-++			.name = "ce5_a_clk_src",
-++			.parent_names = gcc_pxo_pll8_pll0_pll14_pll18_pll11,
-++			.num_parents = 6,
-++			.ops = &clk_dyn_rcg_ops,
-++		},
-++	},
-++};
-++
-++static struct clk_branch ce5_a_clk = {
-++	.halt_reg = 0x3c20,
-++	.halt_bit = 12,
-++	.hwcg_reg = 0x3d8c,
-++	.hwcg_bit = 6,
-++	.clkr = {
-++		.enable_reg = 0x3d8c,
-++		.enable_mask = BIT(4),
-++		.hw.init = &(struct clk_init_data){
-++			.name = "ce5_a_clk",
-++			.parent_names = (const char *[]){
-++				"ce5_a_clk_src",
-++			},
-++			.num_parents = 1,
-++			.ops = &clk_branch_ops,
-++			.flags = CLK_SET_RATE_PARENT,
-++		},
-++	},
-++};
-++
-++static const struct freq_tbl clk_tbl_ce5_h_clk[] = {
-++	{ 160000000, P_PLL0, 5, 1, 1 },
-++	{ 213200000, P_PLL11, 5, 1, 1 },
-++	{ }
-++};
-++
-++static struct clk_dyn_rcg ce5_h_clk_src = {
-++	.ns_reg[0] = 0x3c64,
-++	.ns_reg[1] = 0x3c68,
-++	.bank_reg = 0x3c60,
-++	.s[0] = {
-++		.src_sel_shift = 0,
-++		.parent_map = gcc_pxo_pll8_pll0_pll14_pll18_pll11_map,
-++	},
-++	.s[1] = {
-++		.src_sel_shift = 0,
-++		.parent_map = gcc_pxo_pll8_pll0_pll14_pll18_pll11_map,
-++	},
-++	.p[0] = {
-++		.pre_div_shift = 3,
-++		.pre_div_width = 4,
-++	},
-++	.p[1] = {
-++		.pre_div_shift = 3,
-++		.pre_div_width = 4,
-++	},
-++	.mux_sel_bit = 0,
-++	.freq_tbl = clk_tbl_ce5_h_clk,
-++	.clkr = {
-++		.enable_reg = 0x3c60,
-++		.enable_mask = BIT(1),
-++		.hw.init = &(struct clk_init_data){
-++			.name = "ce5_h_clk_src",
-++			.parent_names = gcc_pxo_pll8_pll0_pll14_pll18_pll11,
-++			.num_parents = 6,
-++			.ops = &clk_dyn_rcg_ops,
-++		},
-++	},
-++};
-++
-++static struct clk_branch ce5_h_clk = {
-++	.halt_reg = 0x3c20,
-++	.halt_bit = 11,
-++	.hwcg_reg = 0x3c6c,
-++	.hwcg_bit = 6,
-++	.clkr = {
-++		.enable_reg = 0x3c6c,
-++		.enable_mask = BIT(4),
-++		.hw.init = &(struct clk_init_data){
-++			.name = "ce5_h_clk",
-++			.parent_names = (const char *[]){
-++				"ce5_h_clk_src",
-++			},
-++			.num_parents = 1,
-++			.ops = &clk_branch_ops,
-++			.flags = CLK_SET_RATE_PARENT,
-++		},
-++	},
-++};
-++
-+ static struct clk_regmap *gcc_ipq806x_clks[] = {
-+ 	[PLL0] = &pll0.clkr,
-+ 	[PLL0_VOTE] = &pll0_vote,
-+@@ -2766,6 +3004,7 @@ static struct clk_regmap *gcc_ipq806x_cl
-+ 	[PLL4_VOTE] = &pll4_vote,
-+ 	[PLL8] = &pll8.clkr,
-+ 	[PLL8_VOTE] = &pll8_vote,
-++	[PLL11] = &pll11.clkr,
-+ 	[PLL14] = &pll14.clkr,
-+ 	[PLL14_VOTE] = &pll14_vote,
-+ 	[PLL18] = &pll18.clkr,
-+@@ -2880,6 +3119,12 @@ static struct clk_regmap *gcc_ipq806x_cl
-+ 	[PLL9] = &hfpll0.clkr,
-+ 	[PLL10] = &hfpll1.clkr,
-+ 	[PLL12] = &hfpll_l2.clkr,
-++	[CE5_A_CLK_SRC] = &ce5_a_clk_src.clkr,
-++	[CE5_A_CLK] = &ce5_a_clk.clkr,
-++	[CE5_H_CLK_SRC] = &ce5_h_clk_src.clkr,
-++	[CE5_H_CLK] = &ce5_h_clk.clkr,
-++	[CE5_CORE_CLK_SRC] = &ce5_core_src.clkr,
-++	[CE5_CORE_CLK] = &ce5_core_clk.clkr,
-+ };
-+ 
-+ static const struct qcom_reset_map gcc_ipq806x_resets[] = {
-+@@ -3011,6 +3256,11 @@ static const struct qcom_reset_map gcc_i
-+ 	[GMAC_CORE3_RESET] = { 0x3cfc, 0 },
-+ 	[GMAC_CORE4_RESET] = { 0x3d1c, 0 },
-+ 	[GMAC_AHB_RESET] = { 0x3e24, 0 },
-++	[CRYPTO_ENG1_RESET] = { 0x3e00, 0},
-++	[CRYPTO_ENG2_RESET] = { 0x3e04, 0},
-++	[CRYPTO_ENG3_RESET] = { 0x3e08, 0},
-++	[CRYPTO_ENG4_RESET] = { 0x3e0c, 0},
-++	[CRYPTO_AHB_RESET] = { 0x3e10, 0},
-+ 	[NSS_CH0_RST_RX_CLK_N_RESET] = { 0x3b60, 0 },
-+ 	[NSS_CH0_RST_TX_CLK_N_RESET] = { 0x3b60, 1 },
-+ 	[NSS_CH0_RST_RX_125M_N_RESET] = { 0x3b60, 2 },
-+--- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h
-++++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
-+@@ -240,7 +240,7 @@
-+ #define PLL14					232
-+ #define PLL14_VOTE				233
-+ #define PLL18					234
-+-#define CE5_SRC					235
-++#define CE5_A_CLK				235
-+ #define CE5_H_CLK				236
-+ #define CE5_CORE_CLK				237
-+ #define CE3_SLEEP_CLK				238
-+@@ -283,5 +283,8 @@
-+ #define EBI2_AON_CLK				281
-+ #define NSSTCM_CLK_SRC				282
-+ #define NSSTCM_CLK				283
-++#define CE5_A_CLK_SRC				285
-++#define CE5_H_CLK_SRC				286
-++#define CE5_CORE_CLK_SRC			287
-+ 
-+ #endif
-+--- a/include/dt-bindings/reset/qcom,gcc-ipq806x.h
-++++ b/include/dt-bindings/reset/qcom,gcc-ipq806x.h
-+@@ -163,5 +163,10 @@
-+ #define NSS_CAL_PRBS_RST_N_RESET			154
-+ #define NSS_LCKDT_RST_N_RESET				155
-+ #define NSS_SRDS_N_RESET				156
-++#define CRYPTO_ENG1_RESET				157
-++#define CRYPTO_ENG2_RESET				158
-++#define CRYPTO_ENG3_RESET				159
-++#define CRYPTO_ENG4_RESET				160
-++#define CRYPTO_AHB_RESET				161
-+ 
-+ #endif
-diff --git a/target/linux/ipq806x/patches-5.10/098-1-cpufreq-add-Krait-dedicated-scaling-driver.patch b/target/linux/ipq806x/patches-5.10/098-1-cpufreq-add-Krait-dedicated-scaling-driver.patch
-new file mode 100644
-index 0000000000..769686220b
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/098-1-cpufreq-add-Krait-dedicated-scaling-driver.patch
-@@ -0,0 +1,681 @@
-+From cc41a266280cad0b55319e614167c88dff344248 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Sat, 22 Feb 2020 16:33:10 +0100
-+Subject: [PATCH 1/8] cpufreq: add Krait dedicated scaling driver
-+
-+This new driver is based on generic cpufreq-dt driver.
-+Krait SoCs have 2-4 cpu and one shared L2 cache that can
-+operate at different frequency based on the maximum cpu clk
-+across all core.
-+L2 frequency and voltage are scaled on every frequency change
-+if needed. On Krait SoCs is present a bug that can cause
-+transition problem between frequency bin, to workaround this
-+on more than one transition, the L2 frequency is first set to the
-+base rate and then to the target rate.
-+The L2 frequency use the OPP framework and use the opp-level
-+bindings to link the l2 freq to different cpu freq. This is needed
-+as the Krait l2 clk are note mapped 1:1 to the core clks and some
-+of the l2 clk is set based on a range of the cpu clks. If the driver
-+find a broken config (for example no opp-level set) the l2 scaling is
-+skipped.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+---
-+ drivers/cpufreq/Kconfig.arm          |  14 +-
-+ drivers/cpufreq/Makefile             |   2 +
-+ drivers/cpufreq/qcom-cpufreq-krait.c | 589 +++++++++++++++++++++++++++
-+ 3 files changed, 604 insertions(+), 1 deletion(-)
-+ create mode 100644 drivers/cpufreq/qcom-cpufreq-krait.c
-+
-+--- a/drivers/cpufreq/Kconfig.arm
-++++ b/drivers/cpufreq/Kconfig.arm
-+@@ -150,6 +150,18 @@ config ARM_QCOM_CPUFREQ_HW
-+ 	  The driver implements the cpufreq interface for this HW engine.
-+ 	  Say Y if you want to support CPUFreq HW.
-+ 
-++config ARM_QCOM_CPUFREQ_KRAIT
-++	tristate "CPU Frequency scaling support for Krait SoCs"
-++	depends on ARCH_QCOM || COMPILE_TEST
-++	select PM_OPP
-++	select ARM_QCOM_CPUFREQ_NVMEM
-++	help
-++	  This adds the CPUFreq driver for Qualcomm Krait SoC based boards.
-++	  This scale the cache clk and regulator based on the different cpu
-++	  clks when scaling the different cores clk.
-++
-++	  If in doubt, say N.
-++
-+ config ARM_RASPBERRYPI_CPUFREQ
-+ 	tristate "Raspberry Pi cpufreq support"
-+ 	depends on CLK_RASPBERRYPI || COMPILE_TEST
-+@@ -339,4 +351,4 @@ config ARM_PXA2xx_CPUFREQ
-+ 	help
-+ 	  This add the CPUFreq driver support for Intel PXA2xx SOCs.
-+ 
-+-	  If in doubt, say N.
-++	  If in doubt, say N.
-+\ No newline at end of file
-+--- a/drivers/cpufreq/Makefile
-++++ b/drivers/cpufreq/Makefile
-+@@ -63,6 +63,7 @@ obj-$(CONFIG_ARM_PXA2xx_CPUFREQ)	+= pxa2
-+ obj-$(CONFIG_PXA3xx)			+= pxa3xx-cpufreq.o
-+ obj-$(CONFIG_ARM_QCOM_CPUFREQ_HW)	+= qcom-cpufreq-hw.o
-+ obj-$(CONFIG_ARM_QCOM_CPUFREQ_NVMEM)	+= qcom-cpufreq-nvmem.o
-++obj-$(CONFIG_ARM_QCOM_CPUFREQ_KRAIT)	+= qcom-cpufreq-krait.o
-+ obj-$(CONFIG_ARM_RASPBERRYPI_CPUFREQ) 	+= raspberrypi-cpufreq.o
-+ obj-$(CONFIG_ARM_S3C2410_CPUFREQ)	+= s3c2410-cpufreq.o
-+ obj-$(CONFIG_ARM_S3C2412_CPUFREQ)	+= s3c2412-cpufreq.o
-+@@ -86,6 +87,7 @@ obj-$(CONFIG_ARM_TEGRA186_CPUFREQ)	+= te
-+ obj-$(CONFIG_ARM_TEGRA194_CPUFREQ)	+= tegra194-cpufreq.o
-+ obj-$(CONFIG_ARM_TI_CPUFREQ)		+= ti-cpufreq.o
-+ obj-$(CONFIG_ARM_VEXPRESS_SPC_CPUFREQ)	+= vexpress-spc-cpufreq.o
-++obj-$(CONFIG_ARM_KRAIT_CPUFREQ)		+= krait-cpufreq.o
-+ 
-+ 
-+ ##################################################################################
-+--- /dev/null
-++++ b/drivers/cpufreq/qcom-cpufreq-krait.c
-+@@ -0,0 +1,603 @@
-++// SPDX-License-Identifier: GPL-2.0
-++
-++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-++
-++#include <linux/clk.h>
-++#include <linux/cpu.h>
-++#include <linux/cpufreq.h>
-++#include <linux/cpumask.h>
-++#include <linux/err.h>
-++#include <linux/module.h>
-++#include <linux/of.h>
-++#include <linux/of_device.h>
-++#include <linux/pm_opp.h>
-++#include <linux/platform_device.h>
-++#include <linux/regulator/consumer.h>
-++#include <linux/slab.h>
-++#include <linux/thermal.h>
-++
-++#include "cpufreq-dt.h"
-++
-++static struct platform_device *l2_pdev;
-++
-++struct private_data {
-++	struct opp_table *opp_table;
-++	struct device *cpu_dev;
-++	const char *reg_name;
-++	bool have_static_opps;
-++};
-++
-++static int set_target(struct cpufreq_policy *policy, unsigned int index)
-++{
-++	struct private_data *priv = policy->driver_data;
-++	unsigned long freq = policy->freq_table[index].frequency;
-++	unsigned long target_freq = freq * 1000;
-++	struct dev_pm_opp *opp;
-++	unsigned int level;
-++	int cpu, ret;
-++
-++	if (l2_pdev) {
-++		int policy_cpu = policy->cpu;
-++
-++		/* find the max freq across all core */
-++		for_each_present_cpu(cpu)
-++			if (cpu != policy_cpu)
-++				target_freq = max(
-++					target_freq,
-++					(unsigned long)cpufreq_quick_get(cpu));
-++
-++		opp = dev_pm_opp_find_freq_exact(priv->cpu_dev, target_freq,
-++						 true);
-++		if (IS_ERR(opp)) {
-++			dev_err(&l2_pdev->dev, "failed to find OPP for %ld\n",
-++				target_freq);
-++			return PTR_ERR(opp);
-++		}
-++		level = dev_pm_opp_get_level(opp);
-++		dev_pm_opp_put(opp);
-++
-++		/*
-++		 * Hardware constraint:
-++		 * Krait CPU cannot operate at 384MHz with L2 at 1Ghz.
-++		 * Assume index 0 with the idle freq and level > 0 as 
-++		 * any L2 freq > 384MHz.
-++		 * Skip CPU freq change in this corner case.
-++		 */
-++		if (unlikely(index == 0 && level != 0)) {
-++			dev_err(priv->cpu_dev, "Krait CPU can't operate at idle freq with L2 at 1GHz");
-++			return -EINVAL;
-++		}
-++
-++		opp = dev_pm_opp_find_level_exact(&l2_pdev->dev, level);
-++		if (IS_ERR(opp)) {
-++			dev_err(&l2_pdev->dev,
-++				"failed to find level OPP for %d\n", level);
-++			return PTR_ERR(opp);
-++		}
-++		target_freq = dev_pm_opp_get_freq(opp);
-++		dev_pm_opp_put(opp);
-++
-++		ret = dev_pm_opp_set_rate(&l2_pdev->dev, target_freq);
-++		if (ret)
-++			return ret;
-++	}
-++
-++	ret = dev_pm_opp_set_rate(priv->cpu_dev, freq * 1000);
-++	if (ret)
-++		return ret;
-++
-++	arch_set_freq_scale(policy->related_cpus, freq,
-++			    policy->cpuinfo.max_freq);
-++
-++	return 0;
-++}
-++
-++/*
-++ * An earlier version of opp-v1 bindings used to name the regulator
-++ * "cpu0-supply", we still need to handle that for backwards compatibility.
-++ */
-++static const char *find_supply_name(struct device *dev)
-++{
-++	struct device_node *np;
-++	struct property *pp;
-++	int cpu = dev->id;
-++	const char *name = NULL;
-++
-++	np = of_node_get(dev->of_node);
-++
-++	/* This must be valid for sure */
-++	if (WARN_ON(!np))
-++		return NULL;
-++
-++	/* Try "cpu0" for older DTs */
-++	if (!cpu) {
-++		pp = of_find_property(np, "cpu0-supply", NULL);
-++		if (pp) {
-++			name = "cpu0";
-++			goto node_put;
-++		}
-++	}
-++
-++	pp = of_find_property(np, "cpu-supply", NULL);
-++	if (pp) {
-++		name = "cpu";
-++		goto node_put;
-++	}
-++
-++	dev_dbg(dev, "no regulator for cpu%d\n", cpu);
-++node_put:
-++	of_node_put(np);
-++	return name;
-++}
-++
-++static int resources_available(void)
-++{
-++	struct device *cpu_dev;
-++	struct regulator *cpu_reg;
-++	struct clk *cpu_clk;
-++	int ret = 0;
-++	const char *name;
-++
-++	cpu_dev = get_cpu_device(0);
-++	if (!cpu_dev) {
-++		pr_err("failed to get cpu0 device\n");
-++		return -ENODEV;
-++	}
-++
-++	cpu_clk = clk_get(cpu_dev, NULL);
-++	ret = PTR_ERR_OR_ZERO(cpu_clk);
-++	if (ret) {
-++		/*
-++		 * If cpu's clk node is present, but clock is not yet
-++		 * registered, we should try defering probe.
-++		 */
-++		if (ret == -EPROBE_DEFER)
-++			dev_dbg(cpu_dev, "clock not ready, retry\n");
-++		else
-++			dev_err(cpu_dev, "failed to get clock: %d\n", ret);
-++
-++		return ret;
-++	}
-++
-++	clk_put(cpu_clk);
-++
-++	name = find_supply_name(cpu_dev);
-++	/* Platform doesn't require regulator */
-++	if (!name)
-++		return 0;
-++
-++	cpu_reg = regulator_get_optional(cpu_dev, name);
-++	ret = PTR_ERR_OR_ZERO(cpu_reg);
-++	if (ret) {
-++		/*
-++		 * If cpu's regulator supply node is present, but regulator is
-++		 * not yet registered, we should try defering probe.
-++		 */
-++		if (ret == -EPROBE_DEFER)
-++			dev_dbg(cpu_dev, "cpu0 regulator not ready, retry\n");
-++		else
-++			dev_dbg(cpu_dev, "no regulator for cpu0: %d\n", ret);
-++
-++		return ret;
-++	}
-++
-++	regulator_put(cpu_reg);
-++	return 0;
-++}
-++
-++static int cpufreq_init(struct cpufreq_policy *policy)
-++{
-++	struct cpufreq_frequency_table *freq_table;
-++	struct opp_table *opp_table = NULL;
-++	unsigned int transition_latency;
-++	struct private_data *priv;
-++	struct device *cpu_dev;
-++	bool fallback = false;
-++	struct clk *cpu_clk;
-++	const char *name;
-++	int ret;
-++
-++	cpu_dev = get_cpu_device(policy->cpu);
-++	if (!cpu_dev) {
-++		pr_err("failed to get cpu%d device\n", policy->cpu);
-++		return -ENODEV;
-++	}
-++
-++	cpu_clk = clk_get(cpu_dev, NULL);
-++	if (IS_ERR(cpu_clk)) {
-++		ret = PTR_ERR(cpu_clk);
-++		dev_err(cpu_dev, "%s: failed to get clk: %d\n", __func__, ret);
-++		return ret;
-++	}
-++
-++	/* Get OPP-sharing information from "operating-points-v2" bindings */
-++	ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, policy->cpus);
-++	if (ret) {
-++		if (ret != -ENOENT)
-++			goto out_put_clk;
-++
-++		/*
-++		 * operating-points-v2 not supported, fallback to old method of
-++		 * finding shared-OPPs for backward compatibility if the
-++		 * platform hasn't set sharing CPUs.
-++		 */
-++		if (dev_pm_opp_get_sharing_cpus(cpu_dev, policy->cpus))
-++			fallback = true;
-++	}
-++
-++	/*
-++	 * OPP layer will be taking care of regulators now, but it needs to know
-++	 * the name of the regulator first.
-++	 */
-++	name = find_supply_name(cpu_dev);
-++	if (name) {
-++		opp_table = dev_pm_opp_set_regulators(cpu_dev, &name, 1);
-++		if (IS_ERR(opp_table)) {
-++			ret = PTR_ERR(opp_table);
-++			dev_err(cpu_dev,
-++				"Failed to set regulator for cpu%d: %d\n",
-++				policy->cpu, ret);
-++			goto out_put_clk;
-++		}
-++	}
-++
-++	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
-++	if (!priv) {
-++		ret = -ENOMEM;
-++		goto out_put_regulator;
-++	}
-++
-++	priv->reg_name = name;
-++	priv->opp_table = opp_table;
-++
-++	/*
-++	 * Initialize OPP tables for all policy->cpus. They will be shared by
-++	 * all CPUs which have marked their CPUs shared with OPP bindings.
-++	 *
-++	 * For platforms not using operating-points-v2 bindings, we do this
-++	 * before updating policy->cpus. Otherwise, we will end up creating
-++	 * duplicate OPPs for policy->cpus.
-++	 *
-++	 * OPPs might be populated at runtime, don't check for error here
-++	 */
-++	if (!dev_pm_opp_of_cpumask_add_table(policy->cpus))
-++		priv->have_static_opps = true;
-++
-++	/*
-++	 * But we need OPP table to function so if it is not there let's
-++	 * give platform code chance to provide it for us.
-++	 */
-++	ret = dev_pm_opp_get_opp_count(cpu_dev);
-++	if (ret <= 0) {
-++		dev_dbg(cpu_dev, "OPP table is not ready, deferring probe\n");
-++		ret = -EPROBE_DEFER;
-++		goto out_free_opp;
-++	}
-++
-++	if (fallback) {
-++		cpumask_setall(policy->cpus);
-++
-++		/*
-++		 * OPP tables are initialized only for policy->cpu, do it for
-++		 * others as well.
-++		 */
-++		ret = dev_pm_opp_set_sharing_cpus(cpu_dev, policy->cpus);
-++		if (ret)
-++			dev_err(cpu_dev,
-++				"%s: failed to mark OPPs as shared: %d\n",
-++				__func__, ret);
-++	}
-++
-++	ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
-++	if (ret) {
-++		dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret);
-++		goto out_free_opp;
-++	}
-++
-++	priv->cpu_dev = cpu_dev;
-++
-++	policy->driver_data = priv;
-++	policy->clk = cpu_clk;
-++	policy->freq_table = freq_table;
-++
-++	policy->suspend_freq = dev_pm_opp_get_suspend_opp_freq(cpu_dev) / 1000;
-++
-++	transition_latency = dev_pm_opp_get_max_transition_latency(cpu_dev);
-++	if (!transition_latency)
-++		transition_latency = CPUFREQ_ETERNAL;
-++
-++	policy->cpuinfo.transition_latency = transition_latency;
-++	policy->dvfs_possible_from_any_cpu = true;
-++
-++	dev_pm_opp_of_register_em(cpu_dev, policy->cpus);
-++
-++	return 0;
-++
-++out_free_opp:
-++	if (priv->have_static_opps)
-++		dev_pm_opp_of_cpumask_remove_table(policy->cpus);
-++	kfree(priv);
-++out_put_regulator:
-++	if (name)
-++		dev_pm_opp_put_regulators(opp_table);
-++out_put_clk:
-++	clk_put(cpu_clk);
-++
-++	return ret;
-++}
-++
-++static int cpufreq_online(struct cpufreq_policy *policy)
-++{
-++	/* We did light-weight tear down earlier, nothing to do here */
-++	return 0;
-++}
-++
-++static int cpufreq_offline(struct cpufreq_policy *policy)
-++{
-++	/*
-++	 * Preserve policy->driver_data and don't free resources on light-weight
-++	 * tear down.
-++	 */
-++	return 0;
-++}
-++
-++static int cpufreq_exit(struct cpufreq_policy *policy)
-++{
-++	struct private_data *priv = policy->driver_data;
-++
-++	dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table);
-++	if (priv->have_static_opps)
-++		dev_pm_opp_of_cpumask_remove_table(policy->related_cpus);
-++	if (priv->reg_name)
-++		dev_pm_opp_put_regulators(priv->opp_table);
-++
-++	clk_put(policy->clk);
-++	kfree(priv);
-++
-++	return 0;
-++}
-++
-++static struct cpufreq_driver krait_cpufreq_driver = {
-++	.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK |
-++		 CPUFREQ_IS_COOLING_DEV,
-++	.verify = cpufreq_generic_frequency_table_verify,
-++	.target_index = set_target,
-++	.get = cpufreq_generic_get,
-++	.init = cpufreq_init,
-++	.exit = cpufreq_exit,
-++	.online = cpufreq_online,
-++	.offline = cpufreq_offline,
-++	.name = "krait-cpufreq",
-++	.suspend = cpufreq_generic_suspend,
-++};
-++
-++struct krait_data {
-++	unsigned long idle_freq;
-++	bool regulator_enabled;
-++};
-++
-++static int krait_cache_set_opp(struct dev_pm_set_opp_data *data)
-++{
-++	unsigned long old_freq = data->old_opp.rate, freq = data->new_opp.rate;
-++	struct dev_pm_opp_supply *supply = &data->new_opp.supplies[0];
-++	struct regulator *reg = data->regulators[0];
-++	struct clk *clk = data->clk;
-++	struct krait_data *kdata;
-++	unsigned long idle_freq;
-++	int ret;
-++
-++	kdata = (struct krait_data *)dev_get_drvdata(data->dev);
-++	idle_freq = kdata->idle_freq;
-++
-++	/* Scaling up? Scale voltage before frequency */
-++	if (freq >= old_freq) {
-++		ret = regulator_set_voltage_triplet(reg, supply->u_volt_min,
-++						    supply->u_volt,
-++						    supply->u_volt_max);
-++		if (ret)
-++			goto exit;
-++	}
-++
-++	/*
-++	 * Set to idle bin if switching from normal to high bin
-++	 * or vice versa. It has been notice that a bug is triggered
-++	 * in cache scaling when more than one bin is scaled, to fix
-++	 * this we first need to transition to the base rate and then
-++	 * to target rate
-++	 */
-++	if (likely(freq != idle_freq && old_freq != idle_freq)) {
-++		ret = clk_set_rate(clk, idle_freq);
-++		if (ret)
-++			goto exit;
-++	}
-++
-++	ret = clk_set_rate(clk, freq);
-++	if (ret)
-++		goto exit;
-++
-++	/* Scaling down? Scale voltage after frequency */
-++	if (freq < old_freq) {
-++		ret = regulator_set_voltage_triplet(reg, supply->u_volt_min,
-++						    supply->u_volt,
-++						    supply->u_volt_max);
-++	}
-++
-++	if (unlikely(!kdata->regulator_enabled)) {
-++		ret = regulator_enable(reg);
-++		if (ret < 0)
-++			dev_warn(data->dev, "Failed to enable regulator: %d", ret);
-++		else
-++			kdata->regulator_enabled = true;
-++	}
-++
-++exit:
-++	return ret;
-++};
-++
-++static int krait_cache_probe(struct platform_device *pdev)
-++{
-++	struct device *dev = &pdev->dev;
-++	struct krait_data *data;
-++	struct opp_table *table;
-++	struct dev_pm_opp *opp;
-++	struct device *cpu_dev;
-++	int ret;
-++
-++	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
-++	if (!data)
-++		return -ENOMEM;
-++
-++	table = dev_pm_opp_set_regulators(dev, (const char *[]){ "l2" }, 1);
-++	if (IS_ERR(table)) {
-++		ret = PTR_ERR(table);
-++		if (ret != -EPROBE_DEFER)
-++			dev_err(dev, "failed to set regulators %d\n", ret);
-++
-++		return ret;
-++	}
-++
-++	ret = PTR_ERR_OR_ZERO(
-++		dev_pm_opp_register_set_opp_helper(dev, krait_cache_set_opp));
-++	if (ret)
-++		return ret;
-++
-++	ret = dev_pm_opp_of_add_table(dev);
-++	if (ret) {
-++		dev_err(dev, "failed to parse L2 freq thresholds\n");
-++		return ret;
-++	}
-++
-++	opp = dev_pm_opp_find_freq_ceil(dev, &data->idle_freq);
-++	dev_pm_opp_put(opp);
-++
-++	/*
-++	 * Check opp-level configuration
-++	 * At least 2 level must be set or the cache will always be scaled
-++	 * the idle freq causing some performance problem
-++	 *
-++	 * In case of invalid configuration, the l2 scaling is skipped
-++	 */
-++	cpu_dev = get_cpu_device(0);
-++	if (!cpu_dev) {
-++		pr_err("failed to get cpu0 device\n");
-++		return -ENODEV;
-++	}
-++
-++	/*
-++	 * Check if we have at least opp-level 1, 0 should always be set to
-++	 * the idle freq
-++	 */
-++	opp = dev_pm_opp_find_level_exact(dev, 1);
-++	if (IS_ERR(opp)) {
-++		dev_err(dev,
-++			"Invalid configuration found of l2 opp. Can't find opp-level 1");
-++		goto invalid_conf;
-++	}
-++	dev_pm_opp_put(opp);
-++
-++	/*
-++	 * Check if we have at least opp-level 1 in the cpu opp, 0 should always
-++	 * be set to the idle freq
-++	 */
-++	opp = dev_pm_opp_find_level_exact(cpu_dev, 1);
-++	if (IS_ERR(opp)) {
-++		dev_err(dev,
-++			"Invalid configuration found of cpu opp. Can't find opp-level 1");
-++		goto invalid_conf;
-++	}
-++	dev_pm_opp_put(opp);
-++
-++	platform_set_drvdata(pdev, data);
-++
-++	/* The l2 scaling is enabled by linking the cpufreq driver */
-++	l2_pdev = pdev;
-++
-++	return 0;
-++
-++invalid_conf:
-++	dev_pm_opp_remove_table(dev);
-++	dev_pm_opp_put_regulators(table);
-++	dev_pm_opp_unregister_set_opp_helper(table);
-++
-++	return -EINVAL;
-++};
-++
-++static int krait_cache_remove(struct platform_device *pdev)
-++{
-++	struct device *dev = &pdev->dev;
-++	struct opp_table *table = dev_pm_opp_get_opp_table(dev);
-++
-++	dev_pm_opp_remove_table(dev);
-++	dev_pm_opp_put_regulators(table);
-++	dev_pm_opp_unregister_set_opp_helper(table);
-++
-++	return 0;
-++};
-++
-++static const struct of_device_id krait_cache_match_table[] = {
-++	{ .compatible = "qcom,krait-cache" },
-++	{}
-++};
-++
-++static struct platform_driver krait_cache_driver = {
-++	.driver = {
-++		.name	= "krait-cache",
-++		.of_match_table = krait_cache_match_table,
-++	},
-++	.probe		= krait_cache_probe,
-++	.remove		= krait_cache_remove,
-++};
-++module_platform_driver(krait_cache_driver);
-++
-++static int krait_cpufreq_probe(struct platform_device *pdev)
-++{
-++	struct cpufreq_dt_platform_data *data = dev_get_platdata(&pdev->dev);
-++	int ret;
-++
-++	/*
-++	 * All per-cluster (CPUs sharing clock/voltages) initialization is done
-++	 * from ->init(). In probe(), we just need to make sure that clk and
-++	 * regulators are available. Else defer probe and retry.
-++	 *
-++	 * FIXME: Is checking this only for CPU0 sufficient ?
-++	 */
-++	ret = resources_available();
-++	if (ret)
-++		return ret;
-++
-++	if (data) {
-++		if (data->have_governor_per_policy)
-++			krait_cpufreq_driver.flags |=
-++				CPUFREQ_HAVE_GOVERNOR_PER_POLICY;
-++
-++		krait_cpufreq_driver.resume = data->resume;
-++		if (data->suspend)
-++			krait_cpufreq_driver.suspend = data->suspend;
-++	}
-++
-++	ret = cpufreq_register_driver(&krait_cpufreq_driver);
-++	if (ret)
-++		dev_err(&pdev->dev, "failed register driver: %d\n", ret);
-++
-++	return ret;
-++}
-++
-++static int krait_cpufreq_remove(struct platform_device *pdev)
-++{
-++	cpufreq_unregister_driver(&krait_cpufreq_driver);
-++	return 0;
-++}
-++
-++static struct platform_driver krait_cpufreq_platdrv = {
-++	.driver = {
-++		.name	= "krait-cpufreq",
-++	},
-++	.probe		= krait_cpufreq_probe,
-++	.remove		= krait_cpufreq_remove,
-++};
-++module_platform_driver(krait_cpufreq_platdrv);
-++
-++MODULE_ALIAS("platform:krait-cpufreq");
-++MODULE_AUTHOR("Ansuel Smith <ansuelsmth@gmail.com>");
-++MODULE_DESCRIPTION("Dedicated Krait SoC cpufreq driver");
-++MODULE_LICENSE("GPL");
-diff --git a/target/linux/ipq806x/patches-5.10/098-2-Documentation-cpufreq-add-qcom-krait-cpufreq-binding.patch b/target/linux/ipq806x/patches-5.10/098-2-Documentation-cpufreq-add-qcom-krait-cpufreq-binding.patch
-new file mode 100644
-index 0000000000..316e18b790
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/098-2-Documentation-cpufreq-add-qcom-krait-cpufreq-binding.patch
-@@ -0,0 +1,237 @@
-+From c9ecd920324a647bf1f2b47f771c8f599cc7b551 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Sat, 22 Feb 2020 18:02:17 +0100
-+Subject: [PATCH 2/8] Documentation: cpufreq: add qcom,krait-cache bindings
-+
-+Document dedicated cpufreq for Krait CPUs.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+---
-+ .../bindings/cpufreq/qcom-cpufreq-krait.yaml  | 221 ++++++++++++++++++
-+ 1 file changed, 221 insertions(+)
-+ create mode 100644 Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-krait.yaml
-+
-+--- /dev/null
-++++ b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-krait.yaml
-+@@ -0,0 +1,221 @@
-++# SPDX-License-Identifier: GPL-2.0
-++%YAML 1.2
-++---
-++$id: http://devicetree.org/schemas/cpufreq/qcom-cpufreq-krait.yaml#
-++$schema: http://devicetree.org/meta-schemas/core.yaml#
-++
-++title: CPU Frequency scaling driver for Krait SoCs
-++
-++maintainers:
-++  - Ansuel Smith <ansuelsmth@gmail.com>
-++
-++description: |
-++  The krait cpufreq driver is a dedicated frequency scaling driver
-++  based on cpufreq-dt generic driver that scale L2 cache and the
-++  cores. TEST
-++
-++  The L2 cache is scaled based on the max clk across all cores and
-++  the clock is decided based on the opp-level set in the device tree.
-++
-++  Different core freq can be linked to a specific l2 freq and the driver
-++  on frequency change will scale the core and the l2 clk based of the 
-++  linked freq.
-++
-++  On Krait SoC is present a bug and on every L2 clk change the driver
-++  needs to set the clk to the idle freq before changing it to the new value.
-++
-++  This requires the qcom cpufreq nvmem driver to parse the different opp
-++  core clk and an additional opp table for the l2 scaling.
-++
-++  If the driver detect broken config (for example missing opp-level) the
-++  cpufreq driver skips the l2 scaling
-++
-++  Referring to this example opp-level can be used to link a range of cpu freq
-++  to a specific l2 freq:
-++    cpu opp freq 384000000 has opp-level 0
-++    l2 opp freq 384000000 has opp-level 0
-++    The driver will scale l2 to 384000000
-++
-++    cpu opp freq 600000000-1000000000 has opp-level 1
-++    l2 opp freq 1000000000 has opp-level 1
-++    The driver will scale l2 to 1000000000
-++
-++allOf:
-++  - $ref: /schemas/cache-controller.yaml#
-++
-++select:
-++  properties:
-++    compatible:
-++      items:
-++        - enum:
-++            - qcom,krait-cache
-++
-++  required:
-++    - compatible
-++
-++properties:
-++  compatible:
-++    items:
-++      - const: qcom,krait-cache
-++      - const: cache
-++
-++  cache-level:
-++    const: 2
-++
-++  clocks:
-++    maxItems: 1
-++
-++  clock-names:
-++    const: l2
-++
-++  l2-supply: true
-++
-++  operating-points-v2: true
-++
-++required:
-++  - compatible
-++  - cache-level
-++  - clocks
-++  - clock-names
-++  - l2-supply
-++  - operating-points-v2
-++
-++additionalProperties: false
-++
-++examples:
-++  - |
-++    cpus {
-++      #address-cells = <1>;
-++      #size-cells = <0>;
-++
-++      cpu0: cpu@0 {
-++        compatible = "qcom,krait";
-++        enable-method = "qcom,kpss-acc-v1";
-++        device_type = "cpu";
-++        reg = <0>;
-++        next-level-cache = <&L2>;
-++        qcom,acc = <&acc0>;
-++        qcom,saw = <&saw0>;
-++        clocks = <&kraitcc 0>, <&kraitcc 4>;
-++        clock-names = "cpu", "l2";
-++        clock-latency = <100000>;
-++        cpu-supply = <&smb208_s2a>;
-++        operating-points-v2 = <&opp_table0>;
-++        voltage-tolerance = <5>;
-++        cooling-min-state = <0>;
-++        cooling-max-state = <10>;
-++        #cooling-cells = <2>;
-++        cpu-idle-states = <&CPU_SPC>;
-++      };
-++
-++      /* ... */
-++
-++    };
-++
-++    opp_table0: opp_table0 {
-++      compatible = "operating-points-v2-kryo-cpu";
-++      nvmem-cells = <&speedbin_efuse>;
-++
-++      opp-384000000 {
-++        opp-hz = /bits/ 64 <384000000>;
-++        opp-microvolt-speed0-pvs0-v0 = <1000000>;
-++        opp-microvolt-speed0-pvs1-v0 = <925000>;
-++        opp-microvolt-speed0-pvs2-v0 = <875000>;
-++        opp-microvolt-speed0-pvs3-v0 = <800000>;
-++        opp-supported-hw = <0x1>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <0>;
-++      };
-++
-++      opp-600000000 {
-++        opp-hz = /bits/ 64 <600000000>;
-++        opp-microvolt-speed0-pvs0-v0 = <1050000>;
-++        opp-microvolt-speed0-pvs1-v0 = <975000>;
-++        opp-microvolt-speed0-pvs2-v0 = <925000>;
-++        opp-microvolt-speed0-pvs3-v0 = <850000>;
-++        opp-supported-hw = <0x1>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <1>;
-++      };
-++
-++      opp-800000000 {
-++        opp-hz = /bits/ 64 <800000000>;
-++        opp-microvolt-speed0-pvs0-v0 = <1100000>;
-++        opp-microvolt-speed0-pvs1-v0 = <1025000>;
-++        opp-microvolt-speed0-pvs2-v0 = <995000>;
-++        opp-microvolt-speed0-pvs3-v0 = <900000>;
-++        opp-supported-hw = <0x1>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <1>;
-++      };
-++
-++      opp-1000000000 {
-++        opp-hz = /bits/ 64 <1000000000>;
-++        opp-microvolt-speed0-pvs0-v0 = <1150000>;
-++        opp-microvolt-speed0-pvs1-v0 = <1075000>;
-++        opp-microvolt-speed0-pvs2-v0 = <1025000>;
-++        opp-microvolt-speed0-pvs3-v0 = <950000>;
-++        opp-supported-hw = <0x1>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <1>;
-++      };
-++
-++      opp-1200000000 {
-++        opp-hz = /bits/ 64 <1200000000>;
-++        opp-microvolt-speed0-pvs0-v0 = <1200000>;
-++        opp-microvolt-speed0-pvs1-v0 = <1125000>;
-++        opp-microvolt-speed0-pvs2-v0 = <1075000>;
-++        opp-microvolt-speed0-pvs3-v0 = <1000000>;
-++        opp-supported-hw = <0x1>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <2>;
-++      };
-++
-++      opp-1400000000 {
-++        opp-hz = /bits/ 64 <1400000000>;
-++        opp-microvolt-speed0-pvs0-v0 = <1250000>;
-++        opp-microvolt-speed0-pvs1-v0 = <1175000>;
-++        opp-microvolt-speed0-pvs2-v0 = <1125000>;
-++        opp-microvolt-speed0-pvs3-v0 = <1050000>;
-++        opp-supported-hw = <0x1>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <2>;
-++      };
-++    };
-++
-++    opp_table_l2: opp_table_l2 {
-++      compatible = "operating-points-v2";
-++
-++      opp-384000000 {
-++        opp-hz = /bits/ 64 <384000000>;
-++        opp-microvolt = <1100000>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <0>;
-++      };
-++      opp-1000000000 {
-++        opp-hz = /bits/ 64 <1000000000>;
-++        opp-microvolt = <1100000>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <1>;
-++      };
-++      opp-1200000000 {
-++        opp-hz = /bits/ 64 <1200000000>;
-++        opp-microvolt = <1150000>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <2>;
-++      };
-++    };
-++
-++    soc {
-++      L2: l2-cache {
-++        compatible = "qcom,krait-cache", "cache";
-++        cache-level = <2>;
-++
-++        clocks = <&kraitcc 4>;
-++        clock-names = "l2";
-++        l2-supply = <&smb208_s1a>;
-++        operating-points-v2 = <&opp_table_l2>;
-++      };
-++    };
-++
-++...
-diff --git a/target/linux/ipq806x/patches-5.4/0057-add-fab-scaling-support-with-cpufreq.patch b/target/linux/ipq806x/patches-5.10/098-3-add-fab-scaling-support-with-cpufreq.patch
-similarity index 94%
-rename from target/linux/ipq806x/patches-5.4/0057-add-fab-scaling-support-with-cpufreq.patch
-rename to target/linux/ipq806x/patches-5.10/098-3-add-fab-scaling-support-with-cpufreq.patch
-index 441500df79..8ce3f062cf 100644
---- a/target/linux/ipq806x/patches-5.4/0057-add-fab-scaling-support-with-cpufreq.patch
-+++ b/target/linux/ipq806x/patches-5.10/098-3-add-fab-scaling-support-with-cpufreq.patch
-@@ -217,9 +217,9 @@
- +int scale_fabrics(unsigned long max_cpu_freq);
- +
- +#endif
----- a/drivers/cpufreq/cpufreq-dt.c
--+++ b/drivers/cpufreq/cpufreq-dt.c
--@@ -20,6 +20,7 @@
-+--- a/drivers/cpufreq/qcom-cpufreq-krait.c
-++++ b/drivers/cpufreq/qcom-cpufreq-krait.c
-+@@ -15,6 +15,7 @@
-  #include <linux/regulator/consumer.h>
-  #include <linux/slab.h>
-  #include <linux/thermal.h>
-@@ -227,17 +227,17 @@
-  
-  #include "cpufreq-dt.h"
-  
--@@ -111,6 +112,13 @@ static int set_target(struct cpufreq_pol
-- 					}
-- 				}
-- 			}
--+
--+			/*
--+			 * Scale fabrics with max freq across all cores
--+			 */
--+			ret = scale_fabrics(target_freq);
--+			if (ret)
--+				goto exit;
-+@@ -68,6 +69,13 @@ static int set_target(struct cpufreq_pol
-+ 			return -EINVAL;
-  		}
-- 		priv->opp_freq = freq * 1000;
-- 		arch_set_freq_scale(policy->related_cpus, freq,
-+ 
-++		/*
-++		 * Scale fabrics with max freq across all cores
-++		 */
-++		ret = scale_fabrics(target_freq);
-++		if (ret)
-++			return ret;
-++
-+ 		opp = dev_pm_opp_find_level_exact(&l2_pdev->dev, level);
-+ 		if (IS_ERR(opp)) {
-+ 			dev_err(&l2_pdev->dev,
-diff --git a/target/linux/ipq806x/patches-5.10/099-1-mtd-nand-raw-qcom_nandc-add-boot_layout_mode-support.patch b/target/linux/ipq806x/patches-5.10/099-1-mtd-nand-raw-qcom_nandc-add-boot_layout_mode-support.patch
-new file mode 100644
-index 0000000000..6106dfb8dc
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/099-1-mtd-nand-raw-qcom_nandc-add-boot_layout_mode-support.patch
-@@ -0,0 +1,239 @@
-+From 6949d651e3be3ebbfedb6bbd5b541cfda6ee58a9 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Wed, 10 Feb 2021 10:40:17 +0100
-+Subject: [PATCH 1/2] mtd: nand: raw: qcom_nandc: add boot_layout_mode support
-+
-+ipq806x nand have a special ecc configuration for the boot pages. The
-+use of the non-boot pages configuration on boot pages cause I/O error
-+and can cause broken data written to the nand. Add support for this
-+special configuration if the page to be read/write is in the size of the
-+boot pages set by the dts.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+---
-+ drivers/mtd/nand/raw/qcom_nandc.c | 82 +++++++++++++++++++++++++++++--
-+ 1 file changed, 77 insertions(+), 5 deletions(-)
-+
-+--- a/drivers/mtd/nand/raw/qcom_nandc.c
-++++ b/drivers/mtd/nand/raw/qcom_nandc.c
-+@@ -159,6 +159,11 @@
-+ /* NAND_CTRL bits */
-+ #define	BAM_MODE_EN			BIT(0)
-+ 
-++
-++#define UD_SIZE_BYTES_MASK	(0x3ff << UD_SIZE_BYTES)
-++#define SPARE_SIZE_BYTES_MASK	(0xf << SPARE_SIZE_BYTES)
-++#define ECC_NUM_DATA_BYTES_MASK	(0x3ff << ECC_NUM_DATA_BYTES)
-++
-+ /*
-+  * the NAND controller performs reads/writes with ECC in 516 byte chunks.
-+  * the driver calls the chunks 'step' or 'codeword' interchangeably
-+@@ -430,6 +435,13 @@ struct qcom_nand_controller {
-+  * @cfg0, cfg1, cfg0_raw..:	NANDc register configurations needed for
-+  *				ecc/non-ecc mode for the current nand flash
-+  *				device
-++ *
-++ * @boot_pages_conf:		keep track of the current ecc configuration used by
-++ * 				the driver for read/write operation. (boot pages
-++ * 				have different configuration than normal page)
-++ * @boot_pages:			number of pages starting from 0 used as boot pages
-++ * 				where the driver will use the boot pages ecc
-++ * 				configuration for read/write operation
-+  */
-+ struct qcom_nand_host {
-+ 	struct nand_chip chip;
-+@@ -452,6 +464,9 @@ struct qcom_nand_host {
-+ 	u32 ecc_bch_cfg;
-+ 	u32 clrflashstatus;
-+ 	u32 clrreadstatus;
-++
-++	bool boot_pages_conf;
-++	u32 boot_pages;
-+ };
-+ 
-+ /*
-+@@ -460,12 +475,14 @@ struct qcom_nand_host {
-+  * @ecc_modes - ecc mode for NAND
-+  * @is_bam - whether NAND controller is using BAM
-+  * @is_qpic - whether NAND CTRL is part of qpic IP
-++ * @has_boot_pages - whether NAND has different ecc settings for boot pages
-+  * @dev_cmd_reg_start - NAND_DEV_CMD_* registers starting offset
-+  */
-+ struct qcom_nandc_props {
-+ 	u32 ecc_modes;
-+ 	bool is_bam;
-+ 	bool is_qpic;
-++	bool has_boot_pages;
-+ 	u32 dev_cmd_reg_start;
-+ };
-+ 
-+@@ -1604,7 +1621,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *
-+ 	data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1);
-+ 	oob_size1 = host->bbm_size;
-+ 
-+-	if (cw == (ecc->steps - 1)) {
-++	if (cw == (ecc->steps - 1) && !host->boot_pages_conf) {
-+ 		data_size2 = ecc->size - data_size1 -
-+ 			     ((ecc->steps - 1) * 4);
-+ 		oob_size2 = (ecc->steps * 4) + host->ecc_bytes_hw +
-+@@ -1685,7 +1702,7 @@ check_for_erased_page(struct qcom_nand_h
-+ 	}
-+ 
-+ 	for_each_set_bit(cw, &uncorrectable_cws, ecc->steps) {
-+-		if (cw == (ecc->steps - 1)) {
-++		if (cw == (ecc->steps - 1) && !host->boot_pages_conf) {
-+ 			data_size = ecc->size - ((ecc->steps - 1) * 4);
-+ 			oob_size = (ecc->steps * 4) + host->ecc_bytes_hw;
-+ 		} else {
-+@@ -1844,7 +1861,7 @@ static int read_page_ecc(struct qcom_nan
-+ 	for (i = 0; i < ecc->steps; i++) {
-+ 		int data_size, oob_size;
-+ 
-+-		if (i == (ecc->steps - 1)) {
-++		if (i == (ecc->steps - 1) && !host->boot_pages_conf) {
-+ 			data_size = ecc->size - ((ecc->steps - 1) << 2);
-+ 			oob_size = (ecc->steps << 2) + host->ecc_bytes_hw +
-+ 				   host->spare_bytes;
-+@@ -1941,6 +1958,30 @@ static int copy_last_cw(struct qcom_nand
-+ 	return ret;
-+ }
-+ 
-++static void
-++check_boot_pages_conf(struct qcom_nand_host *host, int page)
-++{
-++	bool boot_pages_conf = page < host->boot_pages;
-++
-++	/* Skip conf write if we are already in the correct mode */
-++	if (boot_pages_conf != host->boot_pages_conf) {
-++		host->boot_pages_conf = boot_pages_conf;
-++
-++		host->cw_data = boot_pages_conf ? 512 : 516;
-++		host->spare_bytes = host->cw_size - host->ecc_bytes_hw -
-++				    host->bbm_size - host->cw_data;
-++
-++		host->cfg0 &= ~(SPARE_SIZE_BYTES_MASK | UD_SIZE_BYTES_MASK);
-++		host->cfg0 |= host->spare_bytes << SPARE_SIZE_BYTES |
-++			      host->cw_data << UD_SIZE_BYTES;
-++
-++		host->ecc_bch_cfg &= ~ECC_NUM_DATA_BYTES_MASK;
-++		host->ecc_bch_cfg |= host->cw_data << ECC_NUM_DATA_BYTES;
-++		host->ecc_buf_cfg = (boot_pages_conf ? 0x1ff : 0x203) <<
-++				     NUM_STEPS;
-++	}
-++}
-++
-+ /* implements ecc->read_page() */
-+ static int qcom_nandc_read_page(struct nand_chip *chip, uint8_t *buf,
-+ 				int oob_required, int page)
-+@@ -1949,6 +1990,9 @@ static int qcom_nandc_read_page(struct n
-+ 	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
-+ 	u8 *data_buf, *oob_buf = NULL;
-+ 
-++	if (host->boot_pages)
-++		check_boot_pages_conf(host, page);
-++
-+ 	nand_read_page_op(chip, page, 0, NULL, 0);
-+ 	data_buf = buf;
-+ 	oob_buf = oob_required ? chip->oob_poi : NULL;
-+@@ -1968,6 +2012,9 @@ static int qcom_nandc_read_page_raw(stru
-+ 	int cw, ret;
-+ 	u8 *data_buf = buf, *oob_buf = chip->oob_poi;
-+ 
-++	if (host->boot_pages)
-++		check_boot_pages_conf(host, page);
-++
-+ 	for (cw = 0; cw < ecc->steps; cw++) {
-+ 		ret = qcom_nandc_read_cw_raw(mtd, chip, data_buf, oob_buf,
-+ 					     page, cw);
-+@@ -1988,6 +2035,9 @@ static int qcom_nandc_read_oob(struct na
-+ 	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
-+ 	struct nand_ecc_ctrl *ecc = &chip->ecc;
-+ 
-++	if (host->boot_pages)
-++		check_boot_pages_conf(host, page);
-++
-+ 	clear_read_regs(nandc);
-+ 	clear_bam_transaction(nandc);
-+ 
-+@@ -2008,6 +2058,9 @@ static int qcom_nandc_write_page(struct
-+ 	u8 *data_buf, *oob_buf;
-+ 	int i, ret;
-+ 
-++	if (host->boot_pages)
-++		check_boot_pages_conf(host, page);
-++
-+ 	nand_prog_page_begin_op(chip, page, 0, NULL, 0);
-+ 
-+ 	clear_read_regs(nandc);
-+@@ -2023,7 +2076,7 @@ static int qcom_nandc_write_page(struct
-+ 	for (i = 0; i < ecc->steps; i++) {
-+ 		int data_size, oob_size;
-+ 
-+-		if (i == (ecc->steps - 1)) {
-++		if (i == (ecc->steps - 1) && !host->boot_pages_conf) {
-+ 			data_size = ecc->size - ((ecc->steps - 1) << 2);
-+ 			oob_size = (ecc->steps << 2) + host->ecc_bytes_hw +
-+ 				   host->spare_bytes;
-+@@ -2080,6 +2133,9 @@ static int qcom_nandc_write_page_raw(str
-+ 	u8 *data_buf, *oob_buf;
-+ 	int i, ret;
-+ 
-++	if (host->boot_pages)
-++		check_boot_pages_conf(host, page);
-++
-+ 	nand_prog_page_begin_op(chip, page, 0, NULL, 0);
-+ 	clear_read_regs(nandc);
-+ 	clear_bam_transaction(nandc);
-+@@ -2098,7 +2154,7 @@ static int qcom_nandc_write_page_raw(str
-+ 		data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1);
-+ 		oob_size1 = host->bbm_size;
-+ 
-+-		if (i == (ecc->steps - 1)) {
-++		if (i == (ecc->steps - 1) && !host->boot_pages_conf) {
-+ 			data_size2 = ecc->size - data_size1 -
-+ 				     ((ecc->steps - 1) << 2);
-+ 			oob_size2 = (ecc->steps << 2) + host->ecc_bytes_hw +
-+@@ -2158,6 +2214,9 @@ static int qcom_nandc_write_oob(struct n
-+ 	int data_size, oob_size;
-+ 	int ret;
-+ 
-++	if (host->boot_pages)
-++		check_boot_pages_conf(host, page);
-++
-+ 	host->use_ecc = true;
-+ 	clear_bam_transaction(nandc);
-+ 
-+@@ -2806,6 +2865,7 @@ static int qcom_nand_host_init_and_regis
-+ 	struct nand_chip *chip = &host->chip;
-+ 	struct mtd_info *mtd = nand_to_mtd(chip);
-+ 	struct device *dev = nandc->dev;
-++	u32 boot_pages_size;
-+ 	int ret;
-+ 
-+ 	ret = of_property_read_u32(dn, "reg", &host->cs);
-+@@ -2866,6 +2926,17 @@ static int qcom_nand_host_init_and_regis
-+ 	if (ret)
-+ 		nand_cleanup(chip);
-+ 
-++	if (nandc->props->has_boot_pages &&
-++	    of_property_read_bool(dn, "nand-is-boot-medium")) {
-++		ret = of_property_read_u32(dn, "qcom,boot_pages_size",
-++					   &boot_pages_size);
-++		if (ret)
-++			dev_warn(dev, "can't get boot pages size");
-++		else
-++			/* Convert size to nand pages */
-++			host->boot_pages = boot_pages_size / mtd->writesize;
-++	}
-++
-+ 	return ret;
-+ }
-+ 
-+@@ -3032,6 +3103,7 @@ static int qcom_nandc_remove(struct plat
-+ static const struct qcom_nandc_props ipq806x_nandc_props = {
-+ 	.ecc_modes = (ECC_RS_4BIT | ECC_BCH_8BIT),
-+ 	.is_bam = false,
-++	.has_boot_pages = true,
-+ 	.dev_cmd_reg_start = 0x0,
-+ };
-+ 
-diff --git a/target/linux/ipq806x/patches-5.10/099-2-Documentation-devicetree-mtd-qcom_nandc-document-qco.patch b/target/linux/ipq806x/patches-5.10/099-2-Documentation-devicetree-mtd-qcom_nandc-document-qco.patch
-new file mode 100644
-index 0000000000..79036cb057
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/099-2-Documentation-devicetree-mtd-qcom_nandc-document-qco.patch
-@@ -0,0 +1,42 @@
-+From 6fb003a7a117f97a35b078ba726c84adeae29c4c Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Wed, 10 Feb 2021 10:54:19 +0100
-+Subject: [PATCH 2/2] Documentation: devicetree: mtd: qcom_nandc: document
-+ qcom,boot_layout_size binding
-+
-+Document new qcom,boot_layout_size binding used to apply special
-+read/write confituation to boots partitions.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+---
-+ Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 11 +++++++++++
-+ 1 file changed, 11 insertions(+)
-+
-+--- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
-++++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
-+@@ -52,6 +52,15 @@ Optional properties:
-+ 			be used according to chip requirement and available
-+ 			OOB size.
-+ 
-++EBI2 specific properties:
-++- nand-is-boot-medium:	nand contains boot partitions and different ecc configuration
-++			should be used for these partitions.
-++- qcom,boot_pages_size:	should contain the size of the total boot partitions
-++			where the boot layout read/write specific configuration
-++			should be used. The boot layout is considered from the
-++			start of the nand to the value set in this binding.
-++			Only used in combination with 'nand-is-boot-medium'.
-++
-+ Each nandcs device node may optionally contain a 'partitions' sub-node, which
-+ further contains sub-nodes describing the flash partition mapping. See
-+ partition.txt for more detail.
-+@@ -80,6 +89,9 @@ nand-controller@1ac00000 {
-+ 		nand-ecc-strength = <4>;
-+ 		nand-bus-width = <8>;
-+ 
-++		nand-is-boot-medium;
-++		qcom,boot_pages_size: <0x58a0000>;
-++
-+ 		partitions {
-+ 			compatible = "fixed-partitions";
-+ 			#address-cells = <1>;
-diff --git a/target/linux/ipq806x/patches-5.4/0002-dmaengine-Add-ADM-driver.patch b/target/linux/ipq806x/patches-5.10/100-v5.11-dmaengine-qcom-add_ADM_driver.patch
-similarity index 82%
-rename from target/linux/ipq806x/patches-5.4/0002-dmaengine-Add-ADM-driver.patch
-rename to target/linux/ipq806x/patches-5.10/100-v5.11-dmaengine-qcom-add_ADM_driver.patch
-index 7aa46526f2..2d24da01e4 100644
---- a/target/linux/ipq806x/patches-5.4/0002-dmaengine-Add-ADM-driver.patch
-+++ b/target/linux/ipq806x/patches-5.10/100-v5.11-dmaengine-qcom-add_ADM_driver.patch
-@@ -1,86 +1,88 @@
--From 563fa24db4e529c5a3311928d73a8a90531ee527 Mon Sep 17 00:00:00 2001
--From: Thomas Pedersen <twp@codeaurora.org>
--Date: Mon, 16 May 2016 17:58:51 -0700
--Subject: [PATCH 02/69] dmaengine: Add ADM driver
--
--Original patch by Andy Gross.
-+From 5c9f8c2dbdbe53818bcde6aa6695e1331e5f841f Mon Sep 17 00:00:00 2001
-+From: Jonathan McDowell <noodles@earth.li>
-+Date: Sat, 14 Nov 2020 14:02:33 +0000
-+Subject: dmaengine: qcom: Add ADM driver
- 
- Add the DMA engine driver for the QCOM Application Data Mover (ADM) DMA
- controller found in the MSM8x60 and IPQ/APQ8064 platforms.
- 
- The ADM supports both memory to memory transactions and memory
--to/from peripheral device transactions.  The controller also provides flow
--control capabilities for transactions to/from peripheral devices.
-+to/from peripheral device transactions.  The controller also provides
-+flow control capabilities for transactions to/from peripheral devices.
-+
-+The initial release of this driver supports slave transfers to/from
-+peripherals and also incorporates CRCI (client rate control interface)
-+flow control.
- 
--The initial release of this driver supports slave transfers to/from peripherals
--and also incorporates CRCI (client rate control interface) flow control.
-+The hardware only supports a 32 bit physical address, so specifying
-+!PHYS_ADDR_T_64BIT gives maximum COMPILE_TEST coverage without having to
-+spend effort on kludging things in the code that will never actually be
-+needed on real hardware.
- 
- Signed-off-by: Andy Gross <agross@codeaurora.org>
- Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
-+Signed-off-by: Jonathan McDowell <noodles@earth.li>
-+Link: https://lore.kernel.org/r/20201114140233.GM32650@earth.li
-+Signed-off-by: Vinod Koul <vkoul@kernel.org>
- ---
-- drivers/dma/qcom/Kconfig    |  10 +
-+ drivers/dma/qcom/Kconfig    |  11 +
-  drivers/dma/qcom/Makefile   |   1 +
-- drivers/dma/qcom/qcom_adm.c | 900 ++++++++++++++++++++++++++++++++++++++++++++
-- 3 files changed, 911 insertions(+)
-+ drivers/dma/qcom/qcom_adm.c | 903 ++++++++++++++++++++++++++++++++++++++++++++
-+ 3 files changed, 915 insertions(+)
-  create mode 100644 drivers/dma/qcom/qcom_adm.c
- 
- --- a/drivers/dma/qcom/Kconfig
- +++ b/drivers/dma/qcom/Kconfig
--@@ -29,3 +29,13 @@ config QCOM_HIDMA
-- 	  (user to kernel, kernel to kernel, etc.).  It only supports
-- 	  memcpy interface. The core is not intended for general
-- 	  purpose slave DMA.
--+
-+@@ -1,4 +1,15 @@
-+ # SPDX-License-Identifier: GPL-2.0-only
- +config QCOM_ADM
- +	tristate "Qualcomm ADM support"
--+	depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM)
-++	depends on (ARCH_QCOM || COMPILE_TEST) && !PHYS_ADDR_T_64BIT
- +	select DMA_ENGINE
- +	select DMA_VIRTUAL_CHANNELS
--+	---help---
--+	  Enable support for the Qualcomm ADM DMA controller.  This controller
--+	  provides DMA capabilities for both general purpose and on-chip
--+	  peripheral devices.
-++	help
-++	  Enable support for the Qualcomm Application Data Mover (ADM) DMA
-++	  controller, as present on MSM8x60, APQ8064, and IPQ8064 devices.
-++	  This controller provides DMA capabilities for both general purpose
-++	  and on-chip peripheral devices.
-++
-+ config QCOM_BAM_DMA
-+ 	tristate "QCOM BAM DMA support"
-+ 	depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM)
- --- a/drivers/dma/qcom/Makefile
- +++ b/drivers/dma/qcom/Makefile
--@@ -4,3 +4,4 @@ obj-$(CONFIG_QCOM_HIDMA_MGMT) += hdma_mg
-- hdma_mgmt-objs	 := hidma_mgmt.o hidma_mgmt_sys.o
-- obj-$(CONFIG_QCOM_HIDMA) +=  hdma.o
-- hdma-objs        := hidma_ll.o hidma.o hidma_dbg.o
-+@@ -1,4 +1,5 @@
-+ # SPDX-License-Identifier: GPL-2.0
- +obj-$(CONFIG_QCOM_ADM) += qcom_adm.o
-+ obj-$(CONFIG_QCOM_BAM_DMA) += bam_dma.o
-+ obj-$(CONFIG_QCOM_HIDMA_MGMT) += hdma_mgmt.o
-+ hdma_mgmt-objs	 := hidma_mgmt.o hidma_mgmt_sys.o
- --- /dev/null
- +++ b/drivers/dma/qcom/qcom_adm.c
--@@ -0,0 +1,914 @@
-+@@ -0,0 +1,903 @@
-++// SPDX-License-Identifier: GPL-2.0-only
- +/*
- + * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
--+ *
--+ * This program is free software; you can redistribute it and/or modify
--+ * it under the terms of the GNU General Public License version 2 and
--+ * only version 2 as published by the Free Software Foundation.
--+ *
--+ * This program is distributed in the hope that it will be useful,
--+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
--+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
--+ * GNU General Public License for more details.
--+ *
- + */
- +
--+#include <linux/kernel.h>
--+#include <linux/io.h>
-++#include <linux/clk.h>
-++#include <linux/delay.h>
-++#include <linux/device.h>
-++#include <linux/dmaengine.h>
-++#include <linux/dma-mapping.h>
- +#include <linux/init.h>
--+#include <linux/slab.h>
--+#include <linux/module.h>
- +#include <linux/interrupt.h>
--+#include <linux/dma-mapping.h>
--+#include <linux/scatterlist.h>
--+#include <linux/device.h>
--+#include <linux/platform_device.h>
-++#include <linux/io.h>
-++#include <linux/kernel.h>
-++#include <linux/module.h>
- +#include <linux/of.h>
- +#include <linux/of_address.h>
- +#include <linux/of_irq.h>
- +#include <linux/of_dma.h>
-++#include <linux/platform_device.h>
- +#include <linux/reset.h>
--+#include <linux/clk.h>
--+#include <linux/dmaengine.h>
-++#include <linux/scatterlist.h>
-++#include <linux/slab.h>
- +
- +#include "../dmaengine.h"
- +#include "../virt-dma.h"
-@@ -90,10 +92,10 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +#define ADM_CI_MULTI			0x4
- +#define ADM_CRCI_MULTI			0x4
- +#define ADM_EE_MULTI			0x800
--+#define ADM_CHAN_OFFS(chan)		(ADM_CHAN_MULTI * chan)
--+#define ADM_EE_OFFS(ee)			(ADM_EE_MULTI * ee)
-++#define ADM_CHAN_OFFS(chan)		(ADM_CHAN_MULTI * (chan))
-++#define ADM_EE_OFFS(ee)			(ADM_EE_MULTI * (ee))
- +#define ADM_CHAN_EE_OFFS(chan, ee)	(ADM_CHAN_OFFS(chan) + ADM_EE_OFFS(ee))
--+#define ADM_CHAN_OFFS(chan)		(ADM_CHAN_MULTI * chan)
-++#define ADM_CHAN_OFFS(chan)		(ADM_CHAN_MULTI * (chan))
- +#define ADM_CI_OFFS(ci)			(ADM_CHAN_OFF(ci))
- +#define ADM_CH_CMD_PTR(chan, ee)	(ADM_CHAN_EE_OFFS(chan, ee))
- +#define ADM_CH_RSLT(chan, ee)		(0x40 + ADM_CHAN_EE_OFFS(chan, ee))
-@@ -102,62 +104,62 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +#define ADM_CH_CONF(chan)		(0x240 + ADM_CHAN_OFFS(chan))
- +#define ADM_CH_RSLT_CONF(chan, ee)	(0x300 + ADM_CHAN_EE_OFFS(chan, ee))
- +#define ADM_SEC_DOMAIN_IRQ_STATUS(ee)	(0x380 + ADM_EE_OFFS(ee))
--+#define ADM_CI_CONF(ci)			(0x390 + ci * ADM_CI_MULTI)
-++#define ADM_CI_CONF(ci)			(0x390 + (ci) * ADM_CI_MULTI)
- +#define ADM_GP_CTL			0x3d8
--+#define ADM_CRCI_CTL(crci, ee)		(0x400 + crci * ADM_CRCI_MULTI + \
-++#define ADM_CRCI_CTL(crci, ee)		(0x400 + (crci) * ADM_CRCI_MULTI + \
- +						ADM_EE_OFFS(ee))
- +
- +/* channel status */
--+#define ADM_CH_STATUS_VALID	BIT(1)
-++#define ADM_CH_STATUS_VALID		BIT(1)
- +
- +/* channel result */
--+#define ADM_CH_RSLT_VALID	BIT(31)
--+#define ADM_CH_RSLT_ERR		BIT(3)
--+#define ADM_CH_RSLT_FLUSH	BIT(2)
--+#define ADM_CH_RSLT_TPD		BIT(1)
-++#define ADM_CH_RSLT_VALID		BIT(31)
-++#define ADM_CH_RSLT_ERR			BIT(3)
-++#define ADM_CH_RSLT_FLUSH		BIT(2)
-++#define ADM_CH_RSLT_TPD			BIT(1)
- +
- +/* channel conf */
- +#define ADM_CH_CONF_SHADOW_EN		BIT(12)
- +#define ADM_CH_CONF_MPU_DISABLE		BIT(11)
- +#define ADM_CH_CONF_PERM_MPU_CONF	BIT(9)
- +#define ADM_CH_CONF_FORCE_RSLT_EN	BIT(7)
--+#define ADM_CH_CONF_SEC_DOMAIN(ee)	(((ee & 0x3) << 4) | ((ee & 0x4) << 11))
-++#define ADM_CH_CONF_SEC_DOMAIN(ee)	((((ee) & 0x3) << 4) | (((ee) & 0x4) << 11))
- +
- +/* channel result conf */
- +#define ADM_CH_RSLT_CONF_FLUSH_EN	BIT(1)
- +#define ADM_CH_RSLT_CONF_IRQ_EN		BIT(0)
- +
- +/* CRCI CTL */
--+#define ADM_CRCI_CTL_MUX_SEL	BIT(18)
--+#define ADM_CRCI_CTL_RST	BIT(17)
-++#define ADM_CRCI_CTL_MUX_SEL		BIT(18)
-++#define ADM_CRCI_CTL_RST		BIT(17)
- +
- +/* CI configuration */
--+#define ADM_CI_RANGE_END(x)	(x << 24)
--+#define ADM_CI_RANGE_START(x)	(x << 16)
--+#define ADM_CI_BURST_4_WORDS	BIT(2)
--+#define ADM_CI_BURST_8_WORDS	BIT(3)
-++#define ADM_CI_RANGE_END(x)		((x) << 24)
-++#define ADM_CI_RANGE_START(x)		((x) << 16)
-++#define ADM_CI_BURST_4_WORDS		BIT(2)
-++#define ADM_CI_BURST_8_WORDS		BIT(3)
- +
- +/* GP CTL */
--+#define ADM_GP_CTL_LP_EN	BIT(12)
--+#define ADM_GP_CTL_LP_CNT(x)	(x << 8)
-++#define ADM_GP_CTL_LP_EN		BIT(12)
-++#define ADM_GP_CTL_LP_CNT(x)		((x) << 8)
- +
- +/* Command pointer list entry */
--+#define ADM_CPLE_LP		BIT(31)
--+#define ADM_CPLE_CMD_PTR_LIST	BIT(29)
-++#define ADM_CPLE_LP			BIT(31)
-++#define ADM_CPLE_CMD_PTR_LIST		BIT(29)
- +
- +/* Command list entry */
--+#define ADM_CMD_LC		BIT(31)
--+#define ADM_CMD_DST_CRCI(n)	(((n) & 0xf) << 7)
--+#define ADM_CMD_SRC_CRCI(n)	(((n) & 0xf) << 3)
-++#define ADM_CMD_LC			BIT(31)
-++#define ADM_CMD_DST_CRCI(n)		(((n) & 0xf) << 7)
-++#define ADM_CMD_SRC_CRCI(n)		(((n) & 0xf) << 3)
- +
--+#define ADM_CMD_TYPE_SINGLE	0x0
--+#define ADM_CMD_TYPE_BOX	0x3
-++#define ADM_CMD_TYPE_SINGLE		0x0
-++#define ADM_CMD_TYPE_BOX		0x3
- +
--+#define ADM_CRCI_MUX_SEL	BIT(4)
--+#define ADM_DESC_ALIGN		8
--+#define ADM_MAX_XFER		(SZ_64K-1)
--+#define ADM_MAX_ROWS		(SZ_64K-1)
--+#define ADM_MAX_CHANNELS	16
-++#define ADM_CRCI_MUX_SEL		BIT(4)
-++#define ADM_DESC_ALIGN			8
-++#define ADM_MAX_XFER			(SZ_64K - 1)
-++#define ADM_MAX_ROWS			(SZ_64K - 1)
-++#define ADM_MAX_CHANNELS		16
- +
- +struct adm_desc_hw_box {
- +	u32 cmd;
-@@ -255,7 +257,7 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +	case 32:
- +	case 64:
- +	case 128:
--+		ret = ffs(burst>>4) - 1;
-++		ret = ffs(burst >> 4) - 1;
- +		break;
- +	case 192:
- +		ret = 4;
-@@ -281,9 +283,10 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- + * @burst: Burst size of transaction
- + * @direction: DMA transfer direction
- + */
--+static void *adm_process_fc_descriptors(struct adm_chan *achan,
--+	void *desc, struct scatterlist *sg, u32 crci, u32 burst,
--+	enum dma_transfer_direction direction)
-++static void *adm_process_fc_descriptors(struct adm_chan *achan, void *desc,
-++					struct scatterlist *sg, u32 crci,
-++					u32 burst,
-++					enum dma_transfer_direction direction)
- +{
- +	struct adm_desc_hw_box *box_desc = NULL;
- +	struct adm_desc_hw_single *single_desc;
-@@ -349,9 +352,9 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- + * @sg: Scatterlist entry
- + * @direction: DMA transfer direction
- + */
--+static void *adm_process_non_fc_descriptors(struct adm_chan *achan,
--+	void *desc, struct scatterlist *sg,
--+	enum dma_transfer_direction direction)
-++static void *adm_process_non_fc_descriptors(struct adm_chan *achan, void *desc,
-++					    struct scatterlist *sg,
-++					    enum dma_transfer_direction direction)
- +{
- +	struct adm_desc_hw_single *single_desc;
- +	u32 remainder = sg_dma_len(sg);
-@@ -398,9 +401,11 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- + * @context: transfer context (unused)
- + */
- +static struct dma_async_tx_descriptor *adm_prep_slave_sg(struct dma_chan *chan,
--+	struct scatterlist *sgl, unsigned int sg_len,
--+	enum dma_transfer_direction direction, unsigned long flags,
--+	void *context)
-++							 struct scatterlist *sgl,
-++							 unsigned int sg_len,
-++							 enum dma_transfer_direction direction,
-++							 unsigned long flags,
-++							 void *context)
- +{
- +	struct adm_chan *achan = to_adm_chan(chan);
- +	struct adm_device *adev = achan->adev;
-@@ -427,7 +432,6 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +
- +	/* if using flow control, validate burst and crci values */
- +	if (achan->slave.device_fc) {
--+
- +		blk_size = adm_get_blksize(burst);
- +		if (blk_size < 0) {
- +			dev_err(adev->dev, "invalid burst value: %d\n",
-@@ -455,7 +459,7 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +		}
- +	}
- +
--+	async_desc = kzalloc(sizeof(*async_desc), GFP_ATOMIC);
-++	async_desc = kzalloc(sizeof(*async_desc), GFP_NOWAIT);
- +	if (!async_desc)
- +		return ERR_PTR(-ENOMEM);
- +
-@@ -468,7 +472,7 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +				box_count * sizeof(struct adm_desc_hw_box) +
- +				sizeof(*cple) + 2 * ADM_DESC_ALIGN;
- +
--+	async_desc->cpl = kzalloc(async_desc->dma_len, GFP_ATOMIC);
-++	async_desc->cpl = kzalloc(async_desc->dma_len, GFP_NOWAIT);
- +	if (!async_desc->cpl)
- +		goto free;
- +
-@@ -483,10 +487,10 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +
- +		if (achan->slave.device_fc)
- +			desc = adm_process_fc_descriptors(achan, desc, sg, crci,
--+							burst, direction);
-++							  burst, direction);
- +		else
- +			desc = adm_process_non_fc_descriptors(achan, desc, sg,
--+							   direction);
-++							      direction);
- +	}
- +
- +	async_desc->dma_addr = dma_map_single(adev->dev, async_desc->cpl,
-@@ -532,7 +536,7 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +
- +	/* send flush command to terminate current transaction */
- +	writel_relaxed(0x0,
--+		adev->regs + ADM_CH_FLUSH_STATE0(achan->id, adev->ee));
-++		       adev->regs + ADM_CH_FLUSH_STATE0(achan->id, adev->ee));
- +
- +	spin_unlock_irqrestore(&achan->vc.lock, flags);
- +
-@@ -586,7 +590,7 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +		       adev->regs + ADM_CH_CONF(achan->id));
- +
- +		writel(ADM_CH_RSLT_CONF_IRQ_EN | ADM_CH_RSLT_CONF_FLUSH_EN,
--+			adev->regs + ADM_CH_RSLT_CONF(achan->id, adev->ee));
-++		       adev->regs + ADM_CH_RSLT_CONF(achan->id, adev->ee));
- +
- +		achan->initialized = 1;
- +	}
-@@ -594,7 +598,7 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +	/* set the crci block size if this transaction requires CRCI */
- +	if (async_desc->crci) {
- +		writel(async_desc->mux | async_desc->blk_size,
--+			adev->regs + ADM_CRCI_CTL(async_desc->crci, adev->ee));
-++		       adev->regs + ADM_CRCI_CTL(async_desc->crci, adev->ee));
- +	}
- +
- +	/* make sure IRQ enable doesn't get reordered */
-@@ -602,7 +606,7 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +
- +	/* write next command list out to the CMD FIFO */
- +	writel(ALIGN(async_desc->dma_addr, ADM_DESC_ALIGN) >> 3,
--+		adev->regs + ADM_CH_CMD_PTR(achan->id, adev->ee));
-++	       adev->regs + ADM_CH_CMD_PTR(achan->id, adev->ee));
- +}
- +
- +/**
-@@ -628,7 +632,7 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +
- +		if (srcs & BIT(i)) {
- +			status = readl_relaxed(adev->regs +
--+				ADM_CH_STATUS_SD(i, adev->ee));
-++					       ADM_CH_STATUS_SD(i, adev->ee));
- +
- +			/* if no result present, skip */
- +			if (!(status & ADM_CH_STATUS_VALID))
-@@ -673,7 +677,7 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- + * Return status of dma transaction
- + */
- +static enum dma_status adm_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
--+	struct dma_tx_state *txstate)
-++				     struct dma_tx_state *txstate)
- +{
- +	struct adm_chan *achan = to_adm_chan(chan);
- +	struct virt_dma_desc *vd;
-@@ -697,7 +701,7 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +	 * residue is either the full length if it is in the issued list, or 0
- +	 * if it is in progress.  We have no reliable way of determining
- +	 * anything inbetween
--+	*/
-++	 */
- +	dma_set_residue(txstate, residue);
- +
- +	if (achan->error)
-@@ -741,7 +745,7 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +}
- +
- +static void adm_channel_init(struct adm_device *adev, struct adm_chan *achan,
--+	u32 index)
-++			     u32 index)
- +{
- +	achan->id = index;
- +	achan->adev = adev;
-@@ -753,7 +757,6 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +static int adm_dma_probe(struct platform_device *pdev)
- +{
- +	struct adm_device *adev;
--+	struct resource *iores;
- +	int ret;
- +	u32 i;
- +
-@@ -763,8 +766,7 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +
- +	adev->dev = &pdev->dev;
- +
--+	iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--+	adev->regs = devm_ioremap_resource(&pdev->dev, iores);
-++	adev->regs = devm_platform_ioremap_resource(pdev, 0);
- +	if (IS_ERR(adev->regs))
- +		return PTR_ERR(adev->regs);
- +
-@@ -782,50 +784,44 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +	if (IS_ERR(adev->core_clk))
- +		return PTR_ERR(adev->core_clk);
- +
--+	ret = clk_prepare_enable(adev->core_clk);
--+	if (ret) {
--+		dev_err(adev->dev, "failed to prepare/enable core clock\n");
--+		return ret;
--+	}
--+
- +	adev->iface_clk = devm_clk_get(adev->dev, "iface");
--+	if (IS_ERR(adev->iface_clk)) {
--+		ret = PTR_ERR(adev->iface_clk);
--+		goto err_disable_core_clk;
--+	}
-++	if (IS_ERR(adev->iface_clk))
-++		return PTR_ERR(adev->iface_clk);
- +
--+	ret = clk_prepare_enable(adev->iface_clk);
--+	if (ret) {
--+		dev_err(adev->dev, "failed to prepare/enable iface clock\n");
--+		goto err_disable_core_clk;
--+	}
--+
--+	adev->clk_reset = devm_reset_control_get(&pdev->dev, "clk");
-++	adev->clk_reset = devm_reset_control_get_exclusive(&pdev->dev, "clk");
- +	if (IS_ERR(adev->clk_reset)) {
- +		dev_err(adev->dev, "failed to get ADM0 reset\n");
--+		ret = PTR_ERR(adev->clk_reset);
--+		goto err_disable_clks;
-++		return PTR_ERR(adev->clk_reset);
- +	}
- +
--+	adev->c0_reset = devm_reset_control_get(&pdev->dev, "c0");
-++	adev->c0_reset = devm_reset_control_get_exclusive(&pdev->dev, "c0");
- +	if (IS_ERR(adev->c0_reset)) {
- +		dev_err(adev->dev, "failed to get ADM0 C0 reset\n");
--+		ret = PTR_ERR(adev->c0_reset);
--+		goto err_disable_clks;
-++		return PTR_ERR(adev->c0_reset);
- +	}
- +
--+	adev->c1_reset = devm_reset_control_get(&pdev->dev, "c1");
-++	adev->c1_reset = devm_reset_control_get_exclusive(&pdev->dev, "c1");
- +	if (IS_ERR(adev->c1_reset)) {
- +		dev_err(adev->dev, "failed to get ADM0 C1 reset\n");
--+		ret = PTR_ERR(adev->c1_reset);
--+		goto err_disable_clks;
-++		return PTR_ERR(adev->c1_reset);
- +	}
- +
--+	adev->c2_reset = devm_reset_control_get(&pdev->dev, "c2");
-++	adev->c2_reset = devm_reset_control_get_exclusive(&pdev->dev, "c2");
- +	if (IS_ERR(adev->c2_reset)) {
- +		dev_err(adev->dev, "failed to get ADM0 C2 reset\n");
--+		ret = PTR_ERR(adev->c2_reset);
--+		goto err_disable_clks;
-++		return PTR_ERR(adev->c2_reset);
-++	}
-++
-++	ret = clk_prepare_enable(adev->core_clk);
-++	if (ret) {
-++		dev_err(adev->dev, "failed to prepare/enable core clock\n");
-++		return ret;
-++	}
-++
-++	ret = clk_prepare_enable(adev->iface_clk);
-++	if (ret) {
-++		dev_err(adev->dev, "failed to prepare/enable iface clock\n");
-++		goto err_disable_core_clk;
- +	}
- +
- +	reset_control_assert(adev->clk_reset);
-@@ -833,13 +829,15 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +	reset_control_assert(adev->c1_reset);
- +	reset_control_assert(adev->c2_reset);
- +
-++	udelay(2);
-++
- +	reset_control_deassert(adev->clk_reset);
- +	reset_control_deassert(adev->c0_reset);
- +	reset_control_deassert(adev->c1_reset);
- +	reset_control_deassert(adev->c2_reset);
- +
- +	adev->channels = devm_kcalloc(adev->dev, ADM_MAX_CHANNELS,
--+				sizeof(*adev->channels), GFP_KERNEL);
-++				      sizeof(*adev->channels), GFP_KERNEL);
- +
- +	if (!adev->channels) {
- +		ret = -ENOMEM;
-@@ -859,16 +857,16 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +
- +	/* configure client interfaces */
- +	writel(ADM_CI_RANGE_START(0x40) | ADM_CI_RANGE_END(0xb0) |
--+		ADM_CI_BURST_8_WORDS, adev->regs + ADM_CI_CONF(0));
-++	       ADM_CI_BURST_8_WORDS, adev->regs + ADM_CI_CONF(0));
- +	writel(ADM_CI_RANGE_START(0x2a) | ADM_CI_RANGE_END(0x2c) |
--+		ADM_CI_BURST_8_WORDS, adev->regs + ADM_CI_CONF(1));
-++	       ADM_CI_BURST_8_WORDS, adev->regs + ADM_CI_CONF(1));
- +	writel(ADM_CI_RANGE_START(0x12) | ADM_CI_RANGE_END(0x28) |
--+		ADM_CI_BURST_8_WORDS, adev->regs + ADM_CI_CONF(2));
-++	       ADM_CI_BURST_8_WORDS, adev->regs + ADM_CI_CONF(2));
- +	writel(ADM_GP_CTL_LP_EN | ADM_GP_CTL_LP_CNT(0xf),
--+		adev->regs + ADM_GP_CTL);
-++	       adev->regs + ADM_GP_CTL);
- +
- +	ret = devm_request_irq(adev->dev, adev->irq, adm_dma_irq,
--+			0, "adm_dma", adev);
-++			       0, "adm_dma", adev);
- +	if (ret)
- +		goto err_disable_clks;
- +
-@@ -933,6 +931,7 @@ Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- +		/* mask IRQs for this channel/EE pair */
- +		writel(0, adev->regs + ADM_CH_RSLT_CONF(achan->id, adev->ee));
- +
-++		tasklet_kill(&adev->channels[i].vc.task);
- +		adm_terminate_all(&adev->channels[i].vc.chan);
- +	}
- +
-diff --git a/target/linux/ipq806x/patches-5.10/101-5.12-mtd-parsers-Add-Qcom-SMEM-parser.patch b/target/linux/ipq806x/patches-5.10/101-5.12-mtd-parsers-Add-Qcom-SMEM-parser.patch
-new file mode 100644
-index 0000000000..a78dc82a47
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/101-5.12-mtd-parsers-Add-Qcom-SMEM-parser.patch
-@@ -0,0 +1,217 @@
-+From 803eb124e1a64e42888542c3444bfe6dac412c7f Mon Sep 17 00:00:00 2001
-+From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-+Date: Mon, 4 Jan 2021 09:41:35 +0530
-+Subject: mtd: parsers: Add Qcom SMEM parser
-+
-+NAND based Qualcomm platforms have the partition table populated in the
-+Shared Memory (SMEM). Hence, add a parser for parsing the partitions
-+from it.
-+
-+Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-+Link: https://lore.kernel.org/linux-mtd/20210104041137.113075-3-manivannan.sadhasivam@linaro.org
-+---
-+ drivers/mtd/parsers/Kconfig        |   8 ++
-+ drivers/mtd/parsers/Makefile       |   1 +
-+ drivers/mtd/parsers/qcomsmempart.c | 170 +++++++++++++++++++++++++++++++++++++
-+ 3 files changed, 179 insertions(+)
-+ create mode 100644 drivers/mtd/parsers/qcomsmempart.c
-+
-+--- a/drivers/mtd/parsers/Kconfig
-++++ b/drivers/mtd/parsers/Kconfig
-+@@ -196,6 +196,14 @@ config MTD_REDBOOT_PARTS_READONLY
-+ 
-+ endif # MTD_REDBOOT_PARTS
-+ 
-++config MTD_QCOMSMEM_PARTS
-++	tristate "Qualcomm SMEM NAND flash partition parser"
-++	depends on MTD_NAND_QCOM || COMPILE_TEST
-++	depends on QCOM_SMEM
-++	help
-++	  This provides support for parsing partitions from Shared Memory (SMEM)
-++	  for NAND flash on Qualcomm platforms.
-++
-+ config MTD_ROUTERBOOT_PARTS
-+ 	tristate "RouterBoot flash partition parser"
-+ 	depends on MTD && OF
-+--- a/drivers/mtd/parsers/Makefile
-++++ b/drivers/mtd/parsers/Makefile
-+@@ -13,4 +13,5 @@ obj-$(CONFIG_MTD_AFS_PARTS)		+= afs.o
-+ obj-$(CONFIG_MTD_PARSER_TRX)		+= parser_trx.o
-+ obj-$(CONFIG_MTD_SHARPSL_PARTS)		+= sharpslpart.o
-+ obj-$(CONFIG_MTD_REDBOOT_PARTS)		+= redboot.o
-++obj-$(CONFIG_MTD_QCOMSMEM_PARTS)	+= qcomsmempart.o
-+ obj-$(CONFIG_MTD_ROUTERBOOT_PARTS)		+= routerbootpart.o
-+--- /dev/null
-++++ b/drivers/mtd/parsers/qcomsmempart.c
-+@@ -0,0 +1,170 @@
-++// SPDX-License-Identifier: GPL-2.0-only
-++/*
-++ * Qualcomm SMEM NAND flash partition parser
-++ *
-++ * Copyright (C) 2020, Linaro Ltd.
-++ */
-++
-++#include <linux/ctype.h>
-++#include <linux/module.h>
-++#include <linux/mtd/mtd.h>
-++#include <linux/mtd/partitions.h>
-++#include <linux/slab.h>
-++#include <linux/soc/qcom/smem.h>
-++
-++#define SMEM_AARM_PARTITION_TABLE	9
-++#define SMEM_APPS			0
-++
-++#define SMEM_FLASH_PART_MAGIC1		0x55ee73aa
-++#define SMEM_FLASH_PART_MAGIC2		0xe35ebddb
-++#define SMEM_FLASH_PTABLE_V3		3
-++#define SMEM_FLASH_PTABLE_V4		4
-++#define SMEM_FLASH_PTABLE_MAX_PARTS_V3	16
-++#define SMEM_FLASH_PTABLE_MAX_PARTS_V4	48
-++#define SMEM_FLASH_PTABLE_HDR_LEN	(4 * sizeof(u32))
-++#define SMEM_FLASH_PTABLE_NAME_SIZE	16
-++
-++/**
-++ * struct smem_flash_pentry - SMEM Flash partition entry
-++ * @name: Name of the partition
-++ * @offset: Offset in blocks
-++ * @length: Length of the partition in blocks
-++ * @attr: Flags for this partition
-++ */
-++struct smem_flash_pentry {
-++	char name[SMEM_FLASH_PTABLE_NAME_SIZE];
-++	__le32 offset;
-++	__le32 length;
-++	u8 attr;
-++} __packed __aligned(4);
-++
-++/**
-++ * struct smem_flash_ptable - SMEM Flash partition table
-++ * @magic1: Partition table Magic 1
-++ * @magic2: Partition table Magic 2
-++ * @version: Partition table version
-++ * @numparts: Number of partitions in this ptable
-++ * @pentry: Flash partition entries belonging to this ptable
-++ */
-++struct smem_flash_ptable {
-++	__le32 magic1;
-++	__le32 magic2;
-++	__le32 version;
-++	__le32 numparts;
-++	struct smem_flash_pentry pentry[SMEM_FLASH_PTABLE_MAX_PARTS_V4];
-++} __packed __aligned(4);
-++
-++static int parse_qcomsmem_part(struct mtd_info *mtd,
-++			       const struct mtd_partition **pparts,
-++			       struct mtd_part_parser_data *data)
-++{
-++	struct smem_flash_pentry *pentry;
-++	struct smem_flash_ptable *ptable;
-++	size_t len = SMEM_FLASH_PTABLE_HDR_LEN;
-++	struct mtd_partition *parts;
-++	int ret, i, numparts;
-++	char *name, *c;
-++
-++	pr_debug("Parsing partition table info from SMEM\n");
-++	ptable = qcom_smem_get(SMEM_APPS, SMEM_AARM_PARTITION_TABLE, &len);
-++	if (IS_ERR(ptable)) {
-++		pr_err("Error reading partition table header\n");
-++		return PTR_ERR(ptable);
-++	}
-++
-++	/* Verify ptable magic */
-++	if (le32_to_cpu(ptable->magic1) != SMEM_FLASH_PART_MAGIC1 ||
-++	    le32_to_cpu(ptable->magic2) != SMEM_FLASH_PART_MAGIC2) {
-++		pr_err("Partition table magic verification failed\n");
-++		return -EINVAL;
-++	}
-++
-++	/* Ensure that # of partitions is less than the max we have allocated */
-++	numparts = le32_to_cpu(ptable->numparts);
-++	if (numparts > SMEM_FLASH_PTABLE_MAX_PARTS_V4) {
-++		pr_err("Partition numbers exceed the max limit\n");
-++		return -EINVAL;
-++	}
-++
-++	/* Find out length of partition data based on table version */
-++	if (le32_to_cpu(ptable->version) <= SMEM_FLASH_PTABLE_V3) {
-++		len = SMEM_FLASH_PTABLE_HDR_LEN + SMEM_FLASH_PTABLE_MAX_PARTS_V3 *
-++			sizeof(struct smem_flash_pentry);
-++	} else if (le32_to_cpu(ptable->version) == SMEM_FLASH_PTABLE_V4) {
-++		len = SMEM_FLASH_PTABLE_HDR_LEN + SMEM_FLASH_PTABLE_MAX_PARTS_V4 *
-++			sizeof(struct smem_flash_pentry);
-++	} else {
-++		pr_err("Unknown ptable version (%d)", le32_to_cpu(ptable->version));
-++		return -EINVAL;
-++	}
-++
-++	/*
-++	 * Now that the partition table header has been parsed, verified
-++	 * and the length of the partition table calculated, read the
-++	 * complete partition table
-++	 */
-++	ptable = qcom_smem_get(SMEM_APPS, SMEM_AARM_PARTITION_TABLE, &len);
-++	if (IS_ERR_OR_NULL(ptable)) {
-++		pr_err("Error reading partition table\n");
-++		return PTR_ERR(ptable);
-++	}
-++
-++	parts = kcalloc(numparts, sizeof(*parts), GFP_KERNEL);
-++	if (!parts)
-++		return -ENOMEM;
-++
-++	for (i = 0; i < numparts; i++) {
-++		pentry = &ptable->pentry[i];
-++		if (pentry->name[0] == '\0')
-++			continue;
-++
-++		name = kstrdup(pentry->name, GFP_KERNEL);
-++		if (!name) {
-++			ret = -ENOMEM;
-++			goto out_free_parts;
-++		}
-++
-++		/* Convert name to lower case */
-++		for (c = name; *c != '\0'; c++)
-++			*c = tolower(*c);
-++
-++		parts[i].name = name;
-++		parts[i].offset = le32_to_cpu(pentry->offset) * mtd->erasesize;
-++		parts[i].mask_flags = pentry->attr;
-++		parts[i].size = le32_to_cpu(pentry->length) * mtd->erasesize;
-++		pr_debug("%d: %s offs=0x%08x size=0x%08x attr:0x%08x\n",
-++			 i, pentry->name, le32_to_cpu(pentry->offset),
-++			 le32_to_cpu(pentry->length), pentry->attr);
-++	}
-++
-++	pr_debug("SMEM partition table found: ver: %d len: %d\n",
-++		 le32_to_cpu(ptable->version), numparts);
-++	*pparts = parts;
-++
-++	return numparts;
-++
-++out_free_parts:
-++	while (--i >= 0)
-++		kfree(parts[i].name);
-++	kfree(parts);
-++	*pparts = NULL;
-++
-++	return ret;
-++}
-++
-++static const struct of_device_id qcomsmem_of_match_table[] = {
-++	{ .compatible = "qcom,smem-part" },
-++	{},
-++};
-++MODULE_DEVICE_TABLE(of, qcomsmem_of_match_table);
-++
-++static struct mtd_part_parser mtd_parser_qcomsmem = {
-++	.parse_fn = parse_qcomsmem_part,
-++	.name = "qcomsmem",
-++	.of_match_table = qcomsmem_of_match_table,
-++};
-++module_mtd_part_parser(mtd_parser_qcomsmem);
-++
-++MODULE_LICENSE("GPL v2");
-++MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
-++MODULE_DESCRIPTION("Qualcomm SMEM NAND flash partition parser");
-diff --git a/target/linux/ipq806x/patches-5.10/101-dwmac-ipq806x-qsgmii-pcs-all-ch-ctl.patch b/target/linux/ipq806x/patches-5.10/101-dwmac-ipq806x-qsgmii-pcs-all-ch-ctl.patch
-new file mode 100644
-index 0000000000..8e9939a416
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/101-dwmac-ipq806x-qsgmii-pcs-all-ch-ctl.patch
-@@ -0,0 +1,83 @@
-+--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
-++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
-+@@ -64,6 +64,17 @@
-+ #define NSS_COMMON_CLK_DIV_SGMII_100		4
-+ #define NSS_COMMON_CLK_DIV_SGMII_10		49
-+ 
-++#define QSGMII_PCS_ALL_CH_CTL			0x80
-++#define QSGMII_PCS_CH_SPEED_FORCE		0x2
-++#define QSGMII_PCS_CH_SPEED_10			0x0
-++#define QSGMII_PCS_CH_SPEED_100			0x4
-++#define QSGMII_PCS_CH_SPEED_1000		0x8
-++#define QSGMII_PCS_CH_SPEED_MASK		(QSGMII_PCS_CH_SPEED_FORCE | \
-++						 QSGMII_PCS_CH_SPEED_10 | \
-++						 QSGMII_PCS_CH_SPEED_100 | \
-++						 QSGMII_PCS_CH_SPEED_1000)
-++#define QSGMII_PCS_CH_SPEED_SHIFT(x)		(x * 4)
-++
-+ #define QSGMII_PCS_CAL_LCKDT_CTL		0x120
-+ #define QSGMII_PCS_CAL_LCKDT_CTL_RST		BIT(19)
-+ 
-+@@ -242,6 +253,36 @@ static void ipq806x_gmac_fix_mac_speed(v
-+ 	ipq806x_gmac_set_speed(gmac, speed);
-+ }
-+ 
-++static int
-++ipq806x_gmac_get_qsgmii_pcs_speed_val(struct platform_device *pdev) {
-++	struct device_node *fixed_link_node;
-++	int rv;
-++	int fixed_link_speed;
-++
-++	if (!of_phy_is_fixed_link(pdev->dev.of_node))
-++		return 0;
-++
-++	fixed_link_node = of_get_child_by_name(pdev->dev.of_node, "fixed-link");
-++	if (!fixed_link_node)
-++		return -1;
-++
-++	rv = of_property_read_u32(fixed_link_node, "speed", &fixed_link_speed);
-++	of_node_put(fixed_link_node);
-++	if (rv)
-++		return -1;
-++
-++	switch (fixed_link_speed) {
-++	case SPEED_1000:
-++		return QSGMII_PCS_CH_SPEED_FORCE | QSGMII_PCS_CH_SPEED_1000;
-++	case SPEED_100:
-++		return QSGMII_PCS_CH_SPEED_FORCE | QSGMII_PCS_CH_SPEED_100;
-++	case SPEED_10:
-++		return QSGMII_PCS_CH_SPEED_FORCE | QSGMII_PCS_CH_SPEED_10;
-++	}
-++
-++	return -1;
-++}
-++
-+ static int ipq806x_gmac_probe(struct platform_device *pdev)
-+ {
-+ 	struct plat_stmmacenet_data *plat_dat;
-+@@ -250,6 +291,7 @@ static int ipq806x_gmac_probe(struct pla
-+ 	struct ipq806x_gmac *gmac;
-+ 	int val;
-+ 	int err;
-++	int qsgmii_pcs_speed;
-+ 
-+ 	val = stmmac_get_platform_resources(pdev, &stmmac_res);
-+ 	if (val)
-+@@ -346,6 +388,17 @@ static int ipq806x_gmac_probe(struct pla
-+ 			     0x1ul << QSGMII_PHY_RX_INPUT_EQU_OFFSET |
-+ 			     0x2ul << QSGMII_PHY_CDR_PI_SLEW_OFFSET |
-+ 			     0xCul << QSGMII_PHY_TX_DRV_AMP_OFFSET);
-++
-++		qsgmii_pcs_speed = ipq806x_gmac_get_qsgmii_pcs_speed_val(pdev);
-++		if (qsgmii_pcs_speed != -1) {
-++			regmap_update_bits(
-++			    gmac->qsgmii_csr,
-++			    QSGMII_PCS_ALL_CH_CTL,
-++			    QSGMII_PCS_CH_SPEED_MASK <<
-++				QSGMII_PCS_CH_SPEED_SHIFT(gmac->id),
-++			    qsgmii_pcs_speed <<
-++				QSGMII_PCS_CH_SPEED_SHIFT(gmac->id));
-++		}
-+ 	}
-+ 
-+ 	plat_dat->has_gmac = true;
-diff --git a/target/linux/ipq806x/patches-5.10/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch b/target/linux/ipq806x/patches-5.10/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch
-new file mode 100644
-index 0000000000..e83872935f
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch
-@@ -0,0 +1,24 @@
-+From 5001f2e1a325b68dbf225bd17f69a4d3d975cca5 Mon Sep 17 00:00:00 2001
-+From: John Crispin <john@phrozen.org>
-+Date: Thu, 9 Mar 2017 09:31:44 +0100
-+Subject: [PATCH 61/69] mtd: "rootfs" conflicts with OpenWrt auto mounting
-+
-+Signed-off-by: John Crispin <john@phrozen.org>
-+---
-+ drivers/mtd/parsers/qcomsmempart.c | 4 ++++
-+ 1 file changed, 4 insertions(+)
-+
-+--- a/drivers/mtd/parsers/qcomsmempart.c
-++++ b/drivers/mtd/parsers/qcomsmempart.c
-+@@ -132,6 +132,11 @@ static int parse_qcomsmem_part(struct mt
-+ 		parts[i].offset = le32_to_cpu(pentry->offset) * mtd->erasesize;
-+ 		parts[i].mask_flags = pentry->attr;
-+ 		parts[i].size = le32_to_cpu(pentry->length) * mtd->erasesize;
-++
-++		/* "rootfs" conflicts with OpenWrt auto mounting */
-++		if (mtd_type_is_nand(mtd) && !strcmp(name, "rootfs"))
-++			parts[i].name = "ubi";
-++
-+ 		pr_debug("%d: %s offs=0x%08x size=0x%08x attr:0x%08x\n",
-+ 			 i, pentry->name, le32_to_cpu(pentry->offset),
-+ 			 le32_to_cpu(pentry->length), pentry->attr);
-diff --git a/target/linux/ipq806x/patches-5.10/103-ARM-dts-qcom-reduce-pci-IO-size-to-64K.patch b/target/linux/ipq806x/patches-5.10/103-ARM-dts-qcom-reduce-pci-IO-size-to-64K.patch
-new file mode 100644
-index 0000000000..050360ad21
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/103-ARM-dts-qcom-reduce-pci-IO-size-to-64K.patch
-@@ -0,0 +1,46 @@
-+From 84909e85881d67244240c9f40974ce12a51e3886 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Tue, 11 May 2021 23:09:45 +0200
-+Subject: [PATCH] ARM: dts: qcom: reduce pci IO size to 64K
-+
-+The current value is probably a typo and is actually uncommon to find
-+1MB IO space even on a x86 arch. Also with recent changes to the pci
-+driver, pci1 and pci2 now fails to function as any connected device
-+fails any reg read/write. Reduce this to 64K as it should be more than
-+enough and 3 * 64K of total IO space doesn't exceed the IO_SPACE_LIMIT
-+hardcoded for the ARM arch.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+---
-+ arch/arm/boot/dts/qcom-ipq8064.dtsi | 6 +++---
-+ 1 file changed, 3 insertions(+), 3 deletions(-)
-+
-+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
-++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-+@@ -1085,7 +1085,7 @@
-+ 			#address-cells = <3>;
-+ 			#size-cells = <2>;
-+ 
-+-			ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00100000   /* downstream I/O */
-++			ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00010000   /* downstream I/O */
-+ 				  0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
-+ 
-+ 			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-+@@ -1136,7 +1136,7 @@
-+ 			#address-cells = <3>;
-+ 			#size-cells = <2>;
-+ 
-+-			ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00100000   /* downstream I/O */
-++			ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00010000   /* downstream I/O */
-+ 				  0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
-+ 
-+ 			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
-+@@ -1187,7 +1187,7 @@
-+ 			#address-cells = <3>;
-+ 			#size-cells = <2>;
-+ 
-+-			ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00100000   /* downstream I/O */
-++			ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00010000   /* downstream I/O */
-+ 				  0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
-+ 
-+ 			interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
-diff --git a/target/linux/ipq806x/patches-5.10/104-1-drivers-thermal-tsens-Add-VER_0-tsens-version.patch b/target/linux/ipq806x/patches-5.10/104-1-drivers-thermal-tsens-Add-VER_0-tsens-version.patch
-new file mode 100644
-index 0000000000..8627244c59
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/104-1-drivers-thermal-tsens-Add-VER_0-tsens-version.patch
-@@ -0,0 +1,285 @@
-+From 5c7d1181056feef0b58fb2f556f55e170ba5b479 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Sat, 25 Jul 2020 19:14:59 +0200
-+Subject: [PATCH 01/10] drivers: thermal: tsens: Add VER_0 tsens version
-+
-+VER_0 is used to describe device based on tsens version before v0.1.
-+These device are devices based on msm8960 for example apq8064 or
-+ipq806x.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
-+Reported-by: kernel test robot <lkp@intel.com>
-+Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
-+---
-+ drivers/thermal/qcom/tsens.c | 150 ++++++++++++++++++++++++++++-------
-+ drivers/thermal/qcom/tsens.h |   4 +-
-+ 2 files changed, 124 insertions(+), 30 deletions(-)
-+
-+--- a/drivers/thermal/qcom/tsens.c
-++++ b/drivers/thermal/qcom/tsens.c
-+@@ -12,6 +12,7 @@
-+ #include <linux/of.h>
-+ #include <linux/of_address.h>
-+ #include <linux/of_platform.h>
-++#include <linux/mfd/syscon.h>
-+ #include <linux/platform_device.h>
-+ #include <linux/pm.h>
-+ #include <linux/regmap.h>
-+@@ -515,6 +516,15 @@ static irqreturn_t tsens_irq_thread(int
-+ 			dev_dbg(priv->dev, "[%u] %s: no violation:  %d\n",
-+ 				hw_id, __func__, temp);
-+ 		}
-++
-++		if (tsens_version(priv) < VER_0_1) {
-++			/* Constraint: There is only 1 interrupt control register for all
-++			 * 11 temperature sensor. So monitoring more than 1 sensor based
-++			 * on interrupts will yield inconsistent result. To overcome this
-++			 * issue we will monitor only sensor 0 which is the master sensor.
-++			 */
-++			break;
-++		}
-+ 	}
-+ 
-+ 	return IRQ_HANDLED;
-+@@ -530,6 +540,13 @@ static int tsens_set_trips(void *_sensor
-+ 	int high_val, low_val, cl_high, cl_low;
-+ 	u32 hw_id = s->hw_id;
-+ 
-++	if (tsens_version(priv) < VER_0_1) {
-++		/* Pre v0.1 IP had a single register for each type of interrupt
-++		 * and thresholds
-++		 */
-++		hw_id = 0;
-++	}
-++
-+ 	dev_dbg(dev, "[%u] %s: proposed thresholds: (%d:%d)\n",
-+ 		hw_id, __func__, low, high);
-+ 
-+@@ -584,18 +601,21 @@ int get_temp_tsens_valid(const struct ts
-+ 	u32 valid;
-+ 	int ret;
-+ 
-+-	ret = regmap_field_read(priv->rf[valid_idx], &valid);
-+-	if (ret)
-+-		return ret;
-+-	while (!valid) {
-+-		/* Valid bit is 0 for 6 AHB clock cycles.
-+-		 * At 19.2MHz, 1 AHB clock is ~60ns.
-+-		 * We should enter this loop very, very rarely.
-+-		 */
-+-		ndelay(400);
-++	/* VER_0 doesn't have VALID bit */
-++	if (tsens_version(priv) >= VER_0_1) {
-+ 		ret = regmap_field_read(priv->rf[valid_idx], &valid);
-+ 		if (ret)
-+ 			return ret;
-++		while (!valid) {
-++			/* Valid bit is 0 for 6 AHB clock cycles.
-++			 * At 19.2MHz, 1 AHB clock is ~60ns.
-++			 * We should enter this loop very, very rarely.
-++			 */
-++			ndelay(400);
-++			ret = regmap_field_read(priv->rf[valid_idx], &valid);
-++			if (ret)
-++				return ret;
-++		}
-+ 	}
-+ 
-+ 	/* Valid bit is set, OK to read the temperature */
-+@@ -608,15 +628,29 @@ int get_temp_common(const struct tsens_s
-+ {
-+ 	struct tsens_priv *priv = s->priv;
-+ 	int hw_id = s->hw_id;
-+-	int last_temp = 0, ret;
-++	int last_temp = 0, ret, trdy;
-++	unsigned long timeout;
-+ 
-+-	ret = regmap_field_read(priv->rf[LAST_TEMP_0 + hw_id], &last_temp);
-+-	if (ret)
-+-		return ret;
-++	timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
-++	do {
-++		if (tsens_version(priv) == VER_0) {
-++			ret = regmap_field_read(priv->rf[TRDY], &trdy);
-++			if (ret)
-++				return ret;
-++			if (!trdy)
-++				continue;
-++		}
-+ 
-+-	*temp = code_to_degc(last_temp, s) * 1000;
-++		ret = regmap_field_read(priv->rf[LAST_TEMP_0 + hw_id], &last_temp);
-++		if (ret)
-++			return ret;
-+ 
-+-	return 0;
-++		*temp = code_to_degc(last_temp, s) * 1000;
-++
-++		return 0;
-++	} while (time_before(jiffies, timeout));
-++
-++	return -ETIMEDOUT;
-+ }
-+ 
-+ #ifdef CONFIG_DEBUG_FS
-+@@ -738,19 +772,34 @@ int __init init_common(struct tsens_priv
-+ 		priv->tm_offset = 0x1000;
-+ 	}
-+ 
-+-	res = platform_get_resource(op, IORESOURCE_MEM, 0);
-+-	tm_base = devm_ioremap_resource(dev, res);
-+-	if (IS_ERR(tm_base)) {
-+-		ret = PTR_ERR(tm_base);
-+-		goto err_put_device;
-++	if (tsens_version(priv) >= VER_0_1) {
-++		res = platform_get_resource(op, IORESOURCE_MEM, 0);
-++		tm_base = devm_ioremap_resource(dev, res);
-++		if (IS_ERR(tm_base)) {
-++			ret = PTR_ERR(tm_base);
-++			goto err_put_device;
-++		}
-++
-++		priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config);
-++	} else { /* VER_0 share the same gcc regs using a syscon */
-++		struct device *parent = priv->dev->parent;
-++
-++		if (parent)
-++			priv->tm_map = syscon_node_to_regmap(parent->of_node);
-+ 	}
-+ 
-+-	priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config);
-+-	if (IS_ERR(priv->tm_map)) {
-+-		ret = PTR_ERR(priv->tm_map);
-++	if (IS_ERR_OR_NULL(priv->tm_map)) {
-++		if (!priv->tm_map)
-++			ret = -ENODEV;
-++		else
-++			ret = PTR_ERR(priv->tm_map);
-+ 		goto err_put_device;
-+ 	}
-+ 
-++	/* VER_0 have only tm_map */
-++	if (!priv->srot_map)
-++		priv->srot_map = priv->tm_map;
-++
-+ 	if (tsens_version(priv) > VER_0_1) {
-+ 		for (i = VER_MAJOR; i <= VER_STEP; i++) {
-+ 			priv->rf[i] = devm_regmap_field_alloc(dev, priv->srot_map,
-+@@ -771,6 +820,10 @@ int __init init_common(struct tsens_priv
-+ 		ret = PTR_ERR(priv->rf[TSENS_EN]);
-+ 		goto err_put_device;
-+ 	}
-++	/* in VER_0 TSENS need to be explicitly enabled */
-++	if (tsens_version(priv) == VER_0)
-++		regmap_field_write(priv->rf[TSENS_EN], 1);
-++
-+ 	ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
-+ 	if (ret)
-+ 		goto err_put_device;
-+@@ -793,6 +846,19 @@ int __init init_common(struct tsens_priv
-+ 		goto err_put_device;
-+ 	}
-+ 
-++	priv->rf[TSENS_SW_RST] =
-++		devm_regmap_field_alloc(dev, priv->srot_map, priv->fields[TSENS_SW_RST]);
-++	if (IS_ERR(priv->rf[TSENS_SW_RST])) {
-++		ret = PTR_ERR(priv->rf[TSENS_SW_RST]);
-++		goto err_put_device;
-++	}
-++
-++	priv->rf[TRDY] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[TRDY]);
-++	if (IS_ERR(priv->rf[TRDY])) {
-++		ret = PTR_ERR(priv->rf[TRDY]);
-++		goto err_put_device;
-++	}
-++
-+ 	/* This loop might need changes if enum regfield_ids is reordered */
-+ 	for (j = LAST_TEMP_0; j <= UP_THRESH_15; j += 16) {
-+ 		for (i = 0; i < priv->feat->max_sensors; i++) {
-+@@ -808,7 +874,7 @@ int __init init_common(struct tsens_priv
-+ 		}
-+ 	}
-+ 
-+-	if (priv->feat->crit_int) {
-++	if (priv->feat->crit_int || tsens_version(priv) < VER_0_1) {
-+ 		/* Loop might need changes if enum regfield_ids is reordered */
-+ 		for (j = CRITICAL_STATUS_0; j <= CRIT_THRESH_15; j += 16) {
-+ 			for (i = 0; i < priv->feat->max_sensors; i++) {
-+@@ -846,7 +912,11 @@ int __init init_common(struct tsens_priv
-+ 	}
-+ 
-+ 	spin_lock_init(&priv->ul_lock);
-+-	tsens_enable_irq(priv);
-++
-++	/* VER_0 interrupt doesn't need to be enabled */
-++	if (tsens_version(priv) >= VER_0_1)
-++		tsens_enable_irq(priv);
-++
-+ 	tsens_debug_init(op);
-+ 
-+ err_put_device:
-+@@ -945,10 +1015,19 @@ static int tsens_register_irq(struct tse
-+ 		if (irq == -ENXIO)
-+ 			ret = 0;
-+ 	} else {
-+-		ret = devm_request_threaded_irq(&pdev->dev, irq,
-+-						NULL, thread_fn,
-+-						IRQF_ONESHOT,
-+-						dev_name(&pdev->dev), priv);
-++		/* VER_0 interrupt is TRIGGER_RISING, VER_0_1 and up is ONESHOT */
-++		if (tsens_version(priv) == VER_0)
-++			ret = devm_request_threaded_irq(&pdev->dev, irq,
-++							thread_fn, NULL,
-++							IRQF_TRIGGER_RISING,
-++							dev_name(&pdev->dev),
-++							priv);
-++		else
-++			ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
-++							thread_fn, IRQF_ONESHOT,
-++							dev_name(&pdev->dev),
-++							priv);
-++
-+ 		if (ret)
-+ 			dev_err(&pdev->dev, "%s: failed to get irq\n",
-+ 				__func__);
-+@@ -977,6 +1056,19 @@ static int tsens_register(struct tsens_p
-+ 			priv->ops->enable(priv, i);
-+ 	}
-+ 
-++	/* VER_0 require to set MIN and MAX THRESH
-++	 * These 2 regs are set using the:
-++	 * - CRIT_THRESH_0 for MAX THRESH hardcoded to 120°C
-++	 * - CRIT_THRESH_1 for MIN THRESH hardcoded to   0°C
-++	 */
-++	if (tsens_version(priv) < VER_0_1) {
-++		regmap_field_write(priv->rf[CRIT_THRESH_0],
-++				   tsens_mC_to_hw(priv->sensor, 120000));
-++
-++		regmap_field_write(priv->rf[CRIT_THRESH_1],
-++				   tsens_mC_to_hw(priv->sensor, 0));
-++	}
-++
-+ 	ret = tsens_register_irq(priv, "uplow", tsens_irq_thread);
-+ 	if (ret < 0)
-+ 		return ret;
-+--- a/drivers/thermal/qcom/tsens.h
-++++ b/drivers/thermal/qcom/tsens.h
-+@@ -13,6 +13,7 @@
-+ #define CAL_DEGC_PT2		120
-+ #define SLOPE_FACTOR		1000
-+ #define SLOPE_DEFAULT		3200
-++#define TIMEOUT_US		100
-+ #define THRESHOLD_MAX_ADC_CODE	0x3ff
-+ #define THRESHOLD_MIN_ADC_CODE	0x0
-+ 
-+@@ -25,7 +26,8 @@ struct tsens_priv;
-+ 
-+ /* IP version numbers in ascending order */
-+ enum tsens_ver {
-+-	VER_0_1 = 0,
-++	VER_0 = 0,
-++	VER_0_1,
-+ 	VER_1_X,
-+ 	VER_2_X,
-+ };
-diff --git a/target/linux/ipq806x/patches-5.10/104-2-drivers-thermal-tsens-Don-t-hardcode-sensor-slope.patch b/target/linux/ipq806x/patches-5.10/104-2-drivers-thermal-tsens-Don-t-hardcode-sensor-slope.patch
-new file mode 100644
-index 0000000000..109f524bbd
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/104-2-drivers-thermal-tsens-Don-t-hardcode-sensor-slope.patch
-@@ -0,0 +1,28 @@
-+From efa0d50a6c5ec7619371dfe4d3e6ca54b73787d5 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Wed, 25 Nov 2020 16:47:21 +0100
-+Subject: [PATCH 02/10] drivers: thermal: tsens: Don't hardcode sensor slope
-+
-+Function compute_intercept_slope hardcode the sensor slope to
-+SLOPE_DEFAULT. Change this and use the default value only if a slope is
-+not defined. This is needed for tsens VER_0 that has a hardcoded slope
-+table.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
-+---
-+ drivers/thermal/qcom/tsens.c | 3 ++-
-+ 1 file changed, 2 insertions(+), 1 deletion(-)
-+
-+--- a/drivers/thermal/qcom/tsens.c
-++++ b/drivers/thermal/qcom/tsens.c
-+@@ -86,7 +86,8 @@ void compute_intercept_slope(struct tsen
-+ 			"%s: sensor%d - data_point1:%#x data_point2:%#x\n",
-+ 			__func__, i, p1[i], p2[i]);
-+ 
-+-		priv->sensor[i].slope = SLOPE_DEFAULT;
-++		if (!priv->sensor[i].slope)
-++			priv->sensor[i].slope = SLOPE_DEFAULT;
-+ 		if (mode == TWO_PT_CALIB) {
-+ 			/*
-+ 			 * slope (m) = adc_code2 - adc_code1 (y2 - y1)/
-diff --git a/target/linux/ipq806x/patches-5.10/104-3-drivers-thermal-tsens-Convert-msm8960-to-reg_field.patch b/target/linux/ipq806x/patches-5.10/104-3-drivers-thermal-tsens-Convert-msm8960-to-reg_field.patch
-new file mode 100644
-index 0000000000..bf378107c6
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/104-3-drivers-thermal-tsens-Convert-msm8960-to-reg_field.patch
-@@ -0,0 +1,119 @@
-+From 6bac2e2fa36c2d7c304768a689d8b73155b90aa2 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Wed, 25 Nov 2020 17:15:51 +0100
-+Subject: [PATCH 03/10] drivers: thermal: tsens: Convert msm8960 to reg_field
-+
-+Convert msm9860 driver to reg_field to use the init_common
-+function.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+Acked-by: Thara Gopinath <thara.gopinath@linaro.org>
-+---
-+ drivers/thermal/qcom/tsens-8960.c | 80 ++++++++++++++++++++++++++++++-
-+ 1 file changed, 79 insertions(+), 1 deletion(-)
-+
-+--- a/drivers/thermal/qcom/tsens-8960.c
-++++ b/drivers/thermal/qcom/tsens-8960.c
-+@@ -51,11 +51,22 @@
-+ #define MIN_LIMIT_TH		0x0
-+ #define MAX_LIMIT_TH		0xff
-+ 
-+-#define S0_STATUS_ADDR		0x3628
-+ #define INT_STATUS_ADDR		0x363c
-+ #define TRDY_MASK		BIT(7)
-+ #define TIMEOUT_US		100
-+ 
-++#define S0_STATUS_OFF		0x3628
-++#define S1_STATUS_OFF		0x362c
-++#define S2_STATUS_OFF		0x3630
-++#define S3_STATUS_OFF		0x3634
-++#define S4_STATUS_OFF		0x3638
-++#define S5_STATUS_OFF		0x3664  /* Sensors 5-10 found on apq8064/msm8960 */
-++#define S6_STATUS_OFF		0x3668
-++#define S7_STATUS_OFF		0x366c
-++#define S8_STATUS_OFF		0x3670
-++#define S9_STATUS_OFF		0x3674
-++#define S10_STATUS_OFF		0x3678
-++
-+ static int suspend_8960(struct tsens_priv *priv)
-+ {
-+ 	int ret;
-+@@ -269,6 +280,71 @@ static int get_temp_8960(const struct ts
-+ 	return -ETIMEDOUT;
-+ }
-+ 
-++static struct tsens_features tsens_8960_feat = {
-++	.ver_major	= VER_0,
-++	.crit_int	= 0,
-++	.adc		= 1,
-++	.srot_split	= 0,
-++	.max_sensors	= 11,
-++};
-++
-++static const struct reg_field tsens_8960_regfields[MAX_REGFIELDS] = {
-++	/* ----- SROT ------ */
-++	/* No VERSION information */
-++
-++	/* CNTL */
-++	[TSENS_EN]     = REG_FIELD(CNTL_ADDR,  0, 0),
-++	[TSENS_SW_RST] = REG_FIELD(CNTL_ADDR,  1, 1),
-++	/* 8960 has 5 sensors, 8660 has 11, we only handle 5 */
-++	[SENSOR_EN]    = REG_FIELD(CNTL_ADDR,  3, 7),
-++
-++	/* ----- TM ------ */
-++	/* INTERRUPT ENABLE */
-++	/* NO INTERRUPT ENABLE */
-++
-++	/* Single UPPER/LOWER TEMPERATURE THRESHOLD for all sensors */
-++	[LOW_THRESH_0]   = REG_FIELD(THRESHOLD_ADDR,  0,  7),
-++	[UP_THRESH_0]    = REG_FIELD(THRESHOLD_ADDR,  8, 15),
-++	/* MIN_THRESH_0 and MAX_THRESH_0 are not present in the regfield
-++	 * Recycle CRIT_THRESH_0 and 1 to set the required regs to hardcoded temp
-++	 * MIN_THRESH_0 -> CRIT_THRESH_1
-++	 * MAX_THRESH_0 -> CRIT_THRESH_0
-++	 */
-++	[CRIT_THRESH_1]   = REG_FIELD(THRESHOLD_ADDR, 16, 23),
-++	[CRIT_THRESH_0]   = REG_FIELD(THRESHOLD_ADDR, 24, 31),
-++
-++	/* UPPER/LOWER INTERRUPT [CLEAR/STATUS] */
-++	/* 1 == clear, 0 == normal operation */
-++	[LOW_INT_CLEAR_0]   = REG_FIELD(CNTL_ADDR,  9,  9),
-++	[UP_INT_CLEAR_0]    = REG_FIELD(CNTL_ADDR, 10, 10),
-++
-++	/* NO CRITICAL INTERRUPT SUPPORT on 8960 */
-++
-++	/* Sn_STATUS */
-++	[LAST_TEMP_0]  = REG_FIELD(S0_STATUS_OFF,  0,  7),
-++	[LAST_TEMP_1]  = REG_FIELD(S1_STATUS_OFF,  0,  7),
-++	[LAST_TEMP_2]  = REG_FIELD(S2_STATUS_OFF,  0,  7),
-++	[LAST_TEMP_3]  = REG_FIELD(S3_STATUS_OFF,  0,  7),
-++	[LAST_TEMP_4]  = REG_FIELD(S4_STATUS_OFF,  0,  7),
-++	[LAST_TEMP_5]  = REG_FIELD(S5_STATUS_OFF,  0,  7),
-++	[LAST_TEMP_6]  = REG_FIELD(S6_STATUS_OFF,  0,  7),
-++	[LAST_TEMP_7]  = REG_FIELD(S7_STATUS_OFF,  0,  7),
-++	[LAST_TEMP_8]  = REG_FIELD(S8_STATUS_OFF,  0,  7),
-++	[LAST_TEMP_9]  = REG_FIELD(S9_STATUS_OFF,  0,  7),
-++	[LAST_TEMP_10] = REG_FIELD(S10_STATUS_OFF, 0,  7),
-++
-++	/* No VALID field on 8960 */
-++	/* TSENS_INT_STATUS bits: 1 == threshold violated */
-++	[MIN_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 0, 0),
-++	[LOWER_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 1, 1),
-++	[UPPER_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 2, 2),
-++	/* No CRITICAL field on 8960 */
-++	[MAX_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 3, 3),
-++
-++	/* TRDY: 1=ready, 0=in progress */
-++	[TRDY] = REG_FIELD(INT_STATUS_ADDR, 7, 7),
-++};
-++
-+ static const struct tsens_ops ops_8960 = {
-+ 	.init		= init_8960,
-+ 	.calibrate	= calibrate_8960,
-+@@ -282,4 +358,6 @@ static const struct tsens_ops ops_8960 =
-+ struct tsens_plat_data data_8960 = {
-+ 	.num_sensors	= 11,
-+ 	.ops		= &ops_8960,
-++	.feat		= &tsens_8960_feat,
-++	.fields		= tsens_8960_regfields,
-+ };
-diff --git a/target/linux/ipq806x/patches-5.10/104-4-drivers-thermal-tsens-Use-init_common-for-msm8960.patch b/target/linux/ipq806x/patches-5.10/104-4-drivers-thermal-tsens-Use-init_common-for-msm8960.patch
-new file mode 100644
-index 0000000000..ae8a52c100
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/104-4-drivers-thermal-tsens-Use-init_common-for-msm8960.patch
-@@ -0,0 +1,81 @@
-+From c04f98a496929f75d75c65115d5717423c3d0634 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Wed, 25 Nov 2020 17:16:36 +0100
-+Subject: [PATCH 04/10] drivers: thermal: tsens: Use init_common for msm8960
-+
-+Use init_common and drop custom init for msm8960.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
-+---
-+ drivers/thermal/qcom/tsens-8960.c | 52 +------------------------------
-+ 1 file changed, 1 insertion(+), 51 deletions(-)
-+
-+--- a/drivers/thermal/qcom/tsens-8960.c
-++++ b/drivers/thermal/qcom/tsens-8960.c
-+@@ -173,56 +173,6 @@ static void disable_8960(struct tsens_pr
-+ 	regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
-+ }
-+ 
-+-static int init_8960(struct tsens_priv *priv)
-+-{
-+-	int ret, i;
-+-	u32 reg_cntl;
-+-
-+-	priv->tm_map = dev_get_regmap(priv->dev, NULL);
-+-	if (!priv->tm_map)
-+-		return -ENODEV;
-+-
-+-	/*
-+-	 * The status registers for each sensor are discontiguous
-+-	 * because some SoCs have 5 sensors while others have more
-+-	 * but the control registers stay in the same place, i.e
-+-	 * directly after the first 5 status registers.
-+-	 */
-+-	for (i = 0; i < priv->num_sensors; i++) {
-+-		if (i >= 5)
-+-			priv->sensor[i].status = S0_STATUS_ADDR + 40;
-+-		priv->sensor[i].status += i * 4;
-+-	}
-+-
-+-	reg_cntl = SW_RST;
-+-	ret = regmap_update_bits(priv->tm_map, CNTL_ADDR, SW_RST, reg_cntl);
-+-	if (ret)
-+-		return ret;
-+-
-+-	if (priv->num_sensors > 1) {
-+-		reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18);
-+-		reg_cntl &= ~SW_RST;
-+-		ret = regmap_update_bits(priv->tm_map, CONFIG_ADDR,
-+-					 CONFIG_MASK, CONFIG);
-+-	} else {
-+-		reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16);
-+-		reg_cntl &= ~CONFIG_MASK_8660;
-+-		reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660;
-+-	}
-+-
-+-	reg_cntl |= GENMASK(priv->num_sensors - 1, 0) << SENSOR0_SHIFT;
-+-	ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
-+-	if (ret)
-+-		return ret;
-+-
-+-	reg_cntl |= EN;
-+-	ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
-+-	if (ret)
-+-		return ret;
-+-
-+-	return 0;
-+-}
-+-
-+ static int calibrate_8960(struct tsens_priv *priv)
-+ {
-+ 	int i;
-+@@ -346,7 +296,7 @@ static const struct reg_field tsens_8960
-+ };
-+ 
-+ static const struct tsens_ops ops_8960 = {
-+-	.init		= init_8960,
-++	.init		= init_common,
-+ 	.calibrate	= calibrate_8960,
-+ 	.get_temp	= get_temp_8960,
-+ 	.enable		= enable_8960,
-diff --git a/target/linux/ipq806x/patches-5.10/104-5-drivers-thermal-tsens-Fix-bug-in-sensor-enable-for-m.patch b/target/linux/ipq806x/patches-5.10/104-5-drivers-thermal-tsens-Fix-bug-in-sensor-enable-for-m.patch
-new file mode 100644
-index 0000000000..7b01a67d90
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/104-5-drivers-thermal-tsens-Fix-bug-in-sensor-enable-for-m.patch
-@@ -0,0 +1,66 @@
-+From b3e8bd33b84a6b6c863bd1733bd15b5f1483b8ab Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Wed, 25 Nov 2020 17:06:55 +0100
-+Subject: [PATCH 05/10] drivers: thermal: tsens: Fix bug in sensor enable for
-+ msm8960
-+
-+Device based on tsens VER_0 contains a hardware bug that results in some
-+problem with sensor enablement. Sensor id 6-11 can't be enabled
-+selectively and all of them must be enabled in one step.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+Acked-by: Thara Gopinath <thara.gopinath@linaro.org>
-+---
-+ drivers/thermal/qcom/tsens-8960.c | 23 ++++++++++++++++++++---
-+ 1 file changed, 20 insertions(+), 3 deletions(-)
-+
-+--- a/drivers/thermal/qcom/tsens-8960.c
-++++ b/drivers/thermal/qcom/tsens-8960.c
-+@@ -27,9 +27,9 @@
-+ #define EN			BIT(0)
-+ #define SW_RST			BIT(1)
-+ #define SENSOR0_EN		BIT(3)
-++#define MEASURE_PERIOD		BIT(18)
-+ #define SLP_CLK_ENA		BIT(26)
-+ #define SLP_CLK_ENA_8660	BIT(24)
-+-#define MEASURE_PERIOD		1
-+ #define SENSOR0_SHIFT		3
-+ 
-+ /* INT_STATUS_ADDR bitmasks */
-+@@ -126,17 +126,34 @@ static int resume_8960(struct tsens_priv
-+ static int enable_8960(struct tsens_priv *priv, int id)
-+ {
-+ 	int ret;
-+-	u32 reg, mask;
-++	u32 reg, mask = BIT(id);
-+ 
-+ 	ret = regmap_read(priv->tm_map, CNTL_ADDR, &reg);
-+ 	if (ret)
-+ 		return ret;
-+ 
-+-	mask = BIT(id + SENSOR0_SHIFT);
-++	/* HARDWARE BUG:
-++	 * On platforms with more than 6 sensors, all remaining sensors
-++	 * must be enabled together, otherwise undefined results are expected.
-++	 * (Sensor 6-7 disabled, Sensor 3 disabled...) In the original driver,
-++	 * all the sensors are enabled in one step hence this bug is not
-++	 * triggered.
-++	 */
-++	if (id > 5)
-++		mask = GENMASK(10, 6);
-++
-++	mask <<= SENSOR0_SHIFT;
-++
-++	/* Sensors already enabled. Skip. */
-++	if ((reg & mask) == mask)
-++		return 0;
-++
-+ 	ret = regmap_write(priv->tm_map, CNTL_ADDR, reg | SW_RST);
-+ 	if (ret)
-+ 		return ret;
-+ 
-++	reg |= MEASURE_PERIOD;
-++
-+ 	if (priv->num_sensors > 1)
-+ 		reg |= mask | SLP_CLK_ENA | EN;
-+ 	else
-diff --git a/target/linux/ipq806x/patches-5.10/104-6-drivers-thermal-tsens-Replace-custom-8960-apis-with-.patch b/target/linux/ipq806x/patches-5.10/104-6-drivers-thermal-tsens-Replace-custom-8960-apis-with-.patch
-new file mode 100644
-index 0000000000..a82f596954
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/104-6-drivers-thermal-tsens-Replace-custom-8960-apis-with-.patch
-@@ -0,0 +1,109 @@
-+From 1ff9f982051759e0387e8c7e793b49c48eae291d Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Wed, 25 Nov 2020 17:11:05 +0100
-+Subject: [PATCH 06/10] drivers: thermal: tsens: Replace custom 8960 apis with
-+ generic apis
-+
-+Rework calibrate function to use common function. Derive the offset from
-+a missing hardcoded slope table and the data from the nvmem calib
-+efuses.
-+Drop custom get_temp function and use generic api.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+Acked-by: Thara Gopinath <thara.gopinath@linaro.org>
-+---
-+ drivers/thermal/qcom/tsens-8960.c | 56 +++++++++----------------------
-+ 1 file changed, 15 insertions(+), 41 deletions(-)
-+
-+--- a/drivers/thermal/qcom/tsens-8960.c
-++++ b/drivers/thermal/qcom/tsens-8960.c
-+@@ -67,6 +67,13 @@
-+ #define S9_STATUS_OFF		0x3674
-+ #define S10_STATUS_OFF		0x3678
-+ 
-++/* Original slope - 200 to compensate mC to C inaccuracy */
-++static u32 tsens_msm8960_slope[] = {
-++			976, 976, 954, 976,
-++			911, 932, 932, 999,
-++			932, 999, 932
-++			};
-++
-+ static int suspend_8960(struct tsens_priv *priv)
-+ {
-+ 	int ret;
-+@@ -194,9 +201,7 @@ static int calibrate_8960(struct tsens_p
-+ {
-+ 	int i;
-+ 	char *data;
-+-
-+-	ssize_t num_read = priv->num_sensors;
-+-	struct tsens_sensor *s = priv->sensor;
-++	u32 p1[11];
-+ 
-+ 	data = qfprom_read(priv->dev, "calib");
-+ 	if (IS_ERR(data))
-+@@ -204,49 +209,18 @@ static int calibrate_8960(struct tsens_p
-+ 	if (IS_ERR(data))
-+ 		return PTR_ERR(data);
-+ 
-+-	for (i = 0; i < num_read; i++, s++)
-+-		s->offset = data[i];
-++	for (i = 0; i < priv->num_sensors; i++) {
-++		p1[i] = data[i];
-++		priv->sensor[i].slope = tsens_msm8960_slope[i];
-++	}
-++
-++	compute_intercept_slope(priv, p1, NULL, ONE_PT_CALIB);
-+ 
-+ 	kfree(data);
-+ 
-+ 	return 0;
-+ }
-+ 
-+-/* Temperature on y axis and ADC-code on x-axis */
-+-static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s)
-+-{
-+-	int slope, offset;
-+-
-+-	slope = thermal_zone_get_slope(s->tzd);
-+-	offset = CAL_MDEGC - slope * s->offset;
-+-
-+-	return adc_code * slope + offset;
-+-}
-+-
-+-static int get_temp_8960(const struct tsens_sensor *s, int *temp)
-+-{
-+-	int ret;
-+-	u32 code, trdy;
-+-	struct tsens_priv *priv = s->priv;
-+-	unsigned long timeout;
-+-
-+-	timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
-+-	do {
-+-		ret = regmap_read(priv->tm_map, INT_STATUS_ADDR, &trdy);
-+-		if (ret)
-+-			return ret;
-+-		if (!(trdy & TRDY_MASK))
-+-			continue;
-+-		ret = regmap_read(priv->tm_map, s->status, &code);
-+-		if (ret)
-+-			return ret;
-+-		*temp = code_to_mdegC(code, s);
-+-		return 0;
-+-	} while (time_before(jiffies, timeout));
-+-
-+-	return -ETIMEDOUT;
-+-}
-+-
-+ static struct tsens_features tsens_8960_feat = {
-+ 	.ver_major	= VER_0,
-+ 	.crit_int	= 0,
-+@@ -315,7 +289,7 @@ static const struct reg_field tsens_8960
-+ static const struct tsens_ops ops_8960 = {
-+ 	.init		= init_common,
-+ 	.calibrate	= calibrate_8960,
-+-	.get_temp	= get_temp_8960,
-++	.get_temp	= get_temp_common,
-+ 	.enable		= enable_8960,
-+ 	.disable	= disable_8960,
-+ 	.suspend	= suspend_8960,
-diff --git a/target/linux/ipq806x/patches-5.10/104-7-drivers-thermal-tsens-Drop-unused-define-for-msm8960.patch b/target/linux/ipq806x/patches-5.10/104-7-drivers-thermal-tsens-Drop-unused-define-for-msm8960.patch
-new file mode 100644
-index 0000000000..77ca3cfe45
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/104-7-drivers-thermal-tsens-Drop-unused-define-for-msm8960.patch
-@@ -0,0 +1,65 @@
-+From 5716a61239c6ac9ceb137e825e93c3aea06c4634 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Fri, 19 Mar 2021 00:48:23 +0100
-+Subject: [PATCH 07/10] drivers: thermal: tsens: Drop unused define for msm8960
-+
-+Drop unused define for msm8960 replaced by generic api and reg_field.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
-+---
-+ drivers/thermal/qcom/tsens-8960.c | 24 +-----------------------
-+ 1 file changed, 1 insertion(+), 23 deletions(-)
-+
-+--- a/drivers/thermal/qcom/tsens-8960.c
-++++ b/drivers/thermal/qcom/tsens-8960.c
-+@@ -10,8 +10,6 @@
-+ #include <linux/thermal.h>
-+ #include "tsens.h"
-+ 
-+-#define CAL_MDEGC		30000
-+-
-+ #define CONFIG_ADDR		0x3640
-+ #define CONFIG_ADDR_8660	0x3620
-+ /* CONFIG_ADDR bitmasks */
-+@@ -21,39 +19,19 @@
-+ #define CONFIG_SHIFT_8660	28
-+ #define CONFIG_MASK_8660	(3 << CONFIG_SHIFT_8660)
-+ 
-+-#define STATUS_CNTL_ADDR_8064	0x3660
-+ #define CNTL_ADDR		0x3620
-+ /* CNTL_ADDR bitmasks */
-+ #define EN			BIT(0)
-+ #define SW_RST			BIT(1)
-+-#define SENSOR0_EN		BIT(3)
-++
-+ #define MEASURE_PERIOD		BIT(18)
-+ #define SLP_CLK_ENA		BIT(26)
-+ #define SLP_CLK_ENA_8660	BIT(24)
-+ #define SENSOR0_SHIFT		3
-+ 
-+-/* INT_STATUS_ADDR bitmasks */
-+-#define MIN_STATUS_MASK		BIT(0)
-+-#define LOWER_STATUS_CLR	BIT(1)
-+-#define UPPER_STATUS_CLR	BIT(2)
-+-#define MAX_STATUS_MASK		BIT(3)
-+-
-+ #define THRESHOLD_ADDR		0x3624
-+-/* THRESHOLD_ADDR bitmasks */
-+-#define THRESHOLD_MAX_LIMIT_SHIFT	24
-+-#define THRESHOLD_MIN_LIMIT_SHIFT	16
-+-#define THRESHOLD_UPPER_LIMIT_SHIFT	8
-+-#define THRESHOLD_LOWER_LIMIT_SHIFT	0
-+-
-+-/* Initial temperature threshold values */
-+-#define LOWER_LIMIT_TH		0x50
-+-#define UPPER_LIMIT_TH		0xdf
-+-#define MIN_LIMIT_TH		0x0
-+-#define MAX_LIMIT_TH		0xff
-+ 
-+ #define INT_STATUS_ADDR		0x363c
-+-#define TRDY_MASK		BIT(7)
-+-#define TIMEOUT_US		100
-+ 
-+ #define S0_STATUS_OFF		0x3628
-+ #define S1_STATUS_OFF		0x362c
-diff --git a/target/linux/ipq806x/patches-5.10/104-8-drivers-thermal-tsens-Add-support-for-ipq8064-tsens.patch b/target/linux/ipq806x/patches-5.10/104-8-drivers-thermal-tsens-Add-support-for-ipq8064-tsens.patch
-new file mode 100644
-index 0000000000..127abaefc3
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/104-8-drivers-thermal-tsens-Add-support-for-ipq8064-tsens.patch
-@@ -0,0 +1,26 @@
-+From 0d0c22a59bf2672b57e23da9a9ea743e91b71f54 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Sat, 25 Jul 2020 19:55:57 +0200
-+Subject: [PATCH 08/10] drivers: thermal: tsens: Add support for ipq8064-tsens
-+
-+Add support for tsens present in ipq806x SoCs based on generic msm8960
-+tsens driver.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
-+---
-+ drivers/thermal/qcom/tsens.c | 3 +++
-+ 1 file changed, 3 insertions(+)
-+
-+--- a/drivers/thermal/qcom/tsens.c
-++++ b/drivers/thermal/qcom/tsens.c
-+@@ -968,6 +968,9 @@ static SIMPLE_DEV_PM_OPS(tsens_pm_ops, t
-+ 
-+ static const struct of_device_id tsens_table[] = {
-+ 	{
-++		.compatible = "qcom,ipq8064-tsens",
-++		.data = &data_8960,
-++	}, {
-+ 		.compatible = "qcom,msm8916-tsens",
-+ 		.data = &data_8916,
-+ 	}, {
-diff --git a/target/linux/ipq806x/patches-5.10/104-9-dt-bindings-thermal-tsens-Document-ipq8064-bindings.patch b/target/linux/ipq806x/patches-5.10/104-9-dt-bindings-thermal-tsens-Document-ipq8064-bindings.patch
-new file mode 100644
-index 0000000000..382106863f
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/104-9-dt-bindings-thermal-tsens-Document-ipq8064-bindings.patch
-@@ -0,0 +1,112 @@
-+From ac369071920d427dd484cf74cddba2774bba45f5 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Thu, 9 Jul 2020 22:35:54 +0200
-+Subject: [PATCH 09/10] dt-bindings: thermal: tsens: Document ipq8064 bindings
-+
-+Document the use of bindings used for msm8960 tsens based devices.
-+msm8960 use the same gcc regs and is set as a child of the qcom gcc.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+Reviewed-by: Rob Herring <robh@kernel.org>
-+---
-+ .../bindings/thermal/qcom-tsens.yaml          | 56 ++++++++++++++++---
-+ 1 file changed, 48 insertions(+), 8 deletions(-)
-+
-+--- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
-++++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
-+@@ -19,6 +19,11 @@ description: |
-+ properties:
-+   compatible:
-+     oneOf:
-++      - description: msm9860 TSENS based
-++        items:
-++          - enum:
-++              - qcom,ipq8064-tsens
-++
-+       - description: v0.1 of TSENS
-+         items:
-+           - enum:
-+@@ -73,7 +78,9 @@ properties:
-+     maxItems: 2
-+     items:
-+       - const: calib
-+-      - const: calib_sel
-++      - enum:
-++          - calib_backup
-++          - calib_sel
-+ 
-+   "#qcom,sensors":
-+     description:
-+@@ -88,12 +95,20 @@ properties:
-+       Number of cells required to uniquely identify the thermal sensors. Since
-+       we have multiple sensors this is set to 1
-+ 
-++required:
-++  - compatible
-++  - interrupts
-++  - interrupt-names
-++  - "#thermal-sensor-cells"
-++  - "#qcom,sensors"
-++
-+ allOf:
-+   - if:
-+       properties:
-+         compatible:
-+           contains:
-+             enum:
-++              - qcom,ipq8064-tsens
-+               - qcom,msm8916-tsens
-+               - qcom,msm8974-tsens
-+               - qcom,msm8976-tsens
-+@@ -114,19 +129,44 @@ allOf:
-+         interrupt-names:
-+           minItems: 2
-+ 
-+-required:
-+-  - compatible
-+-  - reg
-+-  - "#qcom,sensors"
-+-  - interrupts
-+-  - interrupt-names
-+-  - "#thermal-sensor-cells"
-++  - if:
-++      properties:
-++        compatible:
-++          contains:
-++            enum:
-++              - qcom,tsens-v0_1
-++              - qcom,tsens-v1
-++              - qcom,tsens-v2
-++
-++    then:
-++      required:
-++        - reg
-+ 
-+ additionalProperties: false
-+ 
-+ examples:
-+   - |
-+     #include <dt-bindings/interrupt-controller/arm-gic.h>
-++    // Example msm9860 based SoC (ipq8064):
-++    gcc: clock-controller {
-++
-++           /* ... */
-++
-++           tsens: thermal-sensor {
-++                compatible = "qcom,ipq8064-tsens";
-++
-++                 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
-++                 nvmem-cell-names = "calib", "calib_backup";
-++                 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
-++                 interrupt-names = "uplow";
-++
-++                 #qcom,sensors = <11>;
-++                 #thermal-sensor-cells = <1>;
-++          };
-++    };
-++
-++  - |
-++    #include <dt-bindings/interrupt-controller/arm-gic.h>
-+     // Example 1 (legacy: for pre v1 IP):
-+     tsens1: thermal-sensor@900000 {
-+            compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
-diff --git a/target/linux/ipq806x/patches-5.10/105-10-drivers-thermal-tsens-Fix-wrong-slope-on-msm-8960.patch b/target/linux/ipq806x/patches-5.10/105-10-drivers-thermal-tsens-Fix-wrong-slope-on-msm-8960.patch
-new file mode 100644
-index 0000000000..6cdc0b263f
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/105-10-drivers-thermal-tsens-Fix-wrong-slope-on-msm-8960.patch
-@@ -0,0 +1,32 @@
-+From 68e720ed73c8f038c8c500e4c49c1e65a993a448 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Tue, 6 Apr 2021 04:45:31 +0200
-+Subject: [PATCH 10/10] drivers: thermal: tsens: Fix wrong slope on msm-8960
-+
-+Some user using some stats with the old legacy implementation and the
-+new implementation using the compute_intercept_slope reported an offset
-+of 3C. Fix the slope table to reflect the original temp.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+---
-+ drivers/thermal/qcom/tsens-8960.c | 8 ++++----
-+ 1 file changed, 4 insertions(+), 4 deletions(-)
-+
-+--- a/drivers/thermal/qcom/tsens-8960.c
-++++ b/drivers/thermal/qcom/tsens-8960.c
-+@@ -45,11 +45,11 @@
-+ #define S9_STATUS_OFF		0x3674
-+ #define S10_STATUS_OFF		0x3678
-+ 
-+-/* Original slope - 200 to compensate mC to C inaccuracy */
-++/* Original slope - 350 to compensate mC to C inaccuracy */
-+ static u32 tsens_msm8960_slope[] = {
-+-			976, 976, 954, 976,
-+-			911, 932, 932, 999,
-+-			932, 999, 932
-++			826, 826, 804, 826,
-++			761, 782, 782, 849,
-++			782, 849, 782
-+ 			};
-+ 
-+ static int suspend_8960(struct tsens_priv *priv)
-diff --git a/target/linux/ipq806x/patches-5.10/107-1-thermal-qcom-tsens-init-debugfs-only-with-successful.patch b/target/linux/ipq806x/patches-5.10/107-1-thermal-qcom-tsens-init-debugfs-only-with-successful.patch
-new file mode 100644
-index 0000000000..1dc2d2e55e
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/107-1-thermal-qcom-tsens-init-debugfs-only-with-successful.patch
-@@ -0,0 +1,41 @@
-+From 8f32d48a309246a80bdca505968085a484d54408 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Mon, 19 Apr 2021 03:01:53 +0200
-+Subject: [thermal-next PATCH v2 1/2] thermal: qcom: tsens: init debugfs only with
-+ successful probe
-+
-+calibrate and tsens_register can fail or PROBE_DEFER. This will cause a
-+double or a wrong init of the debugfs information. Init debugfs only
-+with successful probe fixing warning about directory already present.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+Acked-by: Thara Gopinath <thara.gopinath@linaro.org>
-+---
-+ drivers/thermal/qcom/tsens.c | 9 ++++++---
-+ 1 file changed, 6 insertions(+), 3 deletions(-)
-+
-+--- a/drivers/thermal/qcom/tsens.c
-++++ b/drivers/thermal/qcom/tsens.c
-+@@ -918,8 +918,6 @@ int __init init_common(struct tsens_priv
-+ 	if (tsens_version(priv) >= VER_0_1)
-+ 		tsens_enable_irq(priv);
-+ 
-+-	tsens_debug_init(op);
-+-
-+ err_put_device:
-+ 	put_device(&op->dev);
-+ 	return ret;
-+@@ -1155,7 +1153,12 @@ static int tsens_probe(struct platform_d
-+ 		}
-+ 	}
-+ 
-+-	return tsens_register(priv);
-++	ret = tsens_register(priv);
-++
-++	if (!ret)
-++		tsens_debug_init(pdev);
-++
-++	return ret;
-+ }
-+ 
-+ static int tsens_remove(struct platform_device *pdev)
-diff --git a/target/linux/ipq806x/patches-5.10/107-2-thermal-qcom-tsens-simplify-debugfs-init-function.patch b/target/linux/ipq806x/patches-5.10/107-2-thermal-qcom-tsens-simplify-debugfs-init-function.patch
-new file mode 100644
-index 0000000000..0fbc4bd8ca
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/107-2-thermal-qcom-tsens-simplify-debugfs-init-function.patch
-@@ -0,0 +1,54 @@
-+From 4204f22060f7a5d42c6ccb4d4c25a6a875571099 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Mon, 19 Apr 2021 03:08:37 +0200
-+Subject: [thermal-next PATCH v2 2/2] thermal: qcom: tsens: simplify debugfs init
-+ function
-+
-+Simplify debugfs init function.
-+- Add check for existing dev directory.
-+- Fix wrong version in dbg_version_show (with version 0.0.0, 0.1.0 was
-+  incorrectly reported)
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
-+---
-+ drivers/thermal/qcom/tsens.c | 16 +++++++---------
-+ 1 file changed, 7 insertions(+), 9 deletions(-)
-+
-+--- a/drivers/thermal/qcom/tsens.c
-++++ b/drivers/thermal/qcom/tsens.c
-+@@ -692,7 +692,7 @@ static int dbg_version_show(struct seq_f
-+ 			return ret;
-+ 		seq_printf(s, "%d.%d.%d\n", maj_ver, min_ver, step_ver);
-+ 	} else {
-+-		seq_puts(s, "0.1.0\n");
-++		seq_printf(s, "0.%d.0\n", priv->feat->ver_major);
-+ 	}
-+ 
-+ 	return 0;
-+@@ -704,21 +704,17 @@ DEFINE_SHOW_ATTRIBUTE(dbg_sensors);
-+ static void tsens_debug_init(struct platform_device *pdev)
-+ {
-+ 	struct tsens_priv *priv = platform_get_drvdata(pdev);
-+-	struct dentry *root, *file;
-+ 
-+-	root = debugfs_lookup("tsens", NULL);
-+-	if (!root)
-++	priv->debug_root = debugfs_lookup("tsens", NULL);
-++	if (!priv->debug_root)
-+ 		priv->debug_root = debugfs_create_dir("tsens", NULL);
-+-	else
-+-		priv->debug_root = root;
-+ 
-+-	file = debugfs_lookup("version", priv->debug_root);
-+-	if (!file)
-++	if (!debugfs_lookup("version", priv->debug_root))
-+ 		debugfs_create_file("version", 0444, priv->debug_root,
-+ 				    pdev, &dbg_version_fops);
-+ 
-+ 	/* A directory for each instance of the TSENS IP */
-+-	priv->debug = debugfs_create_dir(dev_name(&pdev->dev), priv->debug_root);
-++	priv->debug = debugfs_lookup(dev_name(&pdev->dev), priv->debug_root);
-+ 	debugfs_create_file("sensors", 0444, priv->debug, pdev, &dbg_sensors_fops);
-+ }
-+ #else
-diff --git a/target/linux/ipq806x/patches-5.10/850-soc-add-qualcomm-syscon.patch b/target/linux/ipq806x/patches-5.10/850-soc-add-qualcomm-syscon.patch
-new file mode 100644
-index 0000000000..8325e10389
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/850-soc-add-qualcomm-syscon.patch
-@@ -0,0 +1,121 @@
-+From: Christian Lamparter <chunkeey@googlemail.com>
-+Subject: SoC: add qualcomm syscon
-+--- a/drivers/soc/qcom/Makefile
-++++ b/drivers/soc/qcom/Makefile
-+@@ -21,6 +21,7 @@ obj-$(CONFIG_QCOM_SMP2P)	+= smp2p.o
-+ obj-$(CONFIG_QCOM_SMSM)	+= smsm.o
-+ obj-$(CONFIG_QCOM_SOCINFO)	+= socinfo.o
-+ obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
-++obj-$(CONFIG_QCOM_TCSR)	 += qcom_tcsr.o
-+ obj-$(CONFIG_QCOM_APR) += apr.o
-+ obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
-+ obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
-+--- a/drivers/soc/qcom/Kconfig
-++++ b/drivers/soc/qcom/Kconfig
-+@@ -189,6 +189,13 @@ config QCOM_SOCINFO
-+ 	 Say yes here to support the Qualcomm socinfo driver, providing
-+ 	 information about the SoC to user space.
-+ 
-++config QCOM_TCSR
-++	tristate "QCOM Top Control and Status Registers"
-++	depends on ARCH_QCOM
-++	help
-++	  Say y here to enable TCSR support.  The TCSR provides control
-++	  functions for various peripherals.
-++
-+ config QCOM_WCNSS_CTRL
-+ 	tristate "Qualcomm WCNSS control driver"
-+ 	depends on ARCH_QCOM || COMPILE_TEST
-+--- /dev/null
-++++ b/drivers/soc/qcom/qcom_tcsr.c
-+@@ -0,0 +1,64 @@
-++/*
-++ * Copyright (c) 2014, The Linux foundation. All rights reserved.
-++ *
-++ * This program is free software; you can redistribute it and/or modify
-++ * it under the terms of the GNU General Public License rev 2 and
-++ * only rev 2 as published by the free Software foundation.
-++ *
-++ * This program is distributed in the hope that it will be useful,
-++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-++ * MERCHANTABILITY or fITNESS fOR A PARTICULAR PURPOSE.  See the
-++ * GNU General Public License for more details.
-++ */
-++
-++#include <linux/clk.h>
-++#include <linux/err.h>
-++#include <linux/io.h>
-++#include <linux/module.h>
-++#include <linux/of.h>
-++#include <linux/of_platform.h>
-++#include <linux/platform_device.h>
-++
-++#define TCSR_USB_PORT_SEL	0xb0
-++
-++static int tcsr_probe(struct platform_device *pdev)
-++{
-++	struct resource *res;
-++	const struct device_node *node = pdev->dev.of_node;
-++	void __iomem *base;
-++	u32 val;
-++
-++	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-++	base = devm_ioremap_resource(&pdev->dev, res);
-++	if (IS_ERR(base))
-++		return PTR_ERR(base);
-++
-++	if (!of_property_read_u32(node, "qcom,usb-ctrl-select", &val)) {
-++		dev_err(&pdev->dev, "setting usb port select = %d\n", val);
-++		writel(val, base + TCSR_USB_PORT_SEL);
-++	}
-++
-++	return 0;
-++}
-++
-++static const struct of_device_id tcsr_dt_match[] = {
-++	{ .compatible = "qcom,tcsr", },
-++	{ },
-++};
-++
-++MODULE_DEVICE_TABLE(of, tcsr_dt_match);
-++
-++static struct platform_driver tcsr_driver = {
-++	.driver = {
-++		.name		= "tcsr",
-++		.owner		= THIS_MODULE,
-++		.of_match_table	= tcsr_dt_match,
-++	},
-++	.probe = tcsr_probe,
-++};
-++
-++module_platform_driver(tcsr_driver);
-++
-++MODULE_AUTHOR("Andy Gross <agross@codeaurora.org>");
-++MODULE_DESCRIPTION("QCOM TCSR driver");
-++MODULE_LICENSE("GPL v2");
-+--- /dev/null
-++++ b/include/dt-bindings/soc/qcom,tcsr.h
-+@@ -0,0 +1,23 @@
-++/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
-++ *
-++ * This program is free software; you can redistribute it and/or modify
-++ * it under the terms of the GNU General Public License version 2 and
-++ * only version 2 as published by the Free Software Foundation.
-++ *
-++ * This program is distributed in the hope that it will be useful,
-++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-++ * GNU General Public License for more details.
-++ */
-++#ifndef __DT_BINDINGS_QCOM_TCSR_H
-++#define __DT_BINDINGS_QCOM_TCSR_H
-++
-++#define TCSR_USB_SELECT_USB3_P0		0x1
-++#define TCSR_USB_SELECT_USB3_P1		0x2
-++#define TCSR_USB_SELECT_USB3_DUAL	0x3
-++
-++/* TCSR A/B REG */
-++#define IPQ806X_TCSR_REG_A_ADM_CRCI_MUX_SEL     0
-++#define IPQ806X_TCSR_REG_B_ADM_CRCI_MUX_SEL     1
-++
-++#endif
-diff --git a/target/linux/ipq806x/patches-5.10/851-add-gsbi1-dts.patch b/target/linux/ipq806x/patches-5.10/851-add-gsbi1-dts.patch
-new file mode 100644
-index 0000000000..3a83b2de30
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/851-add-gsbi1-dts.patch
-@@ -0,0 +1,44 @@
-+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
-++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-+@@ -747,6 +747,41 @@
-+ 			reg = <0x12100000 0x10000>;
-+ 		};
-+ 
-++		gsbi1: gsbi@12440000 {
-++			compatible = "qcom,gsbi-v1.0.0";
-++			cell-index = <1>;
-++			reg = <0x12440000 0x100>;
-++			clocks = <&gcc GSBI1_H_CLK>;
-++			clock-names = "iface";
-++			#address-cells = <1>;
-++			#size-cells = <1>;
-++			ranges;
-++			status = "disabled";
-++
-++			syscon-tcsr = <&tcsr>;
-++
-++			gsbi1_serial: serial@12450000 {
-++				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
-++				reg = <0x12450000 0x100>,
-++				      <0x12400000 0x03>;
-++				interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
-++				clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>;
-++				clock-names = "core", "iface";
-++				status = "disabled";
-++			};
-++
-++			gsbi1_i2c: i2c@12460000 {
-++				compatible = "qcom,i2c-qup-v1.1.1";
-++				reg = <0x12460000 0x1000>;
-++				interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
-++				clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
-++				clock-names = "core", "iface";
-++				#address-cells = <1>;
-++				#size-cells = <0>;
-++				status = "disabled";
-++			};
-++		};
-++
-+ 		gsbi2: gsbi@12480000 {
-+ 			compatible = "qcom,gsbi-v1.0.0";
-+ 			cell-index = <2>;
-diff --git a/target/linux/ipq806x/patches-5.10/900-arm-add-cmdline-override.patch b/target/linux/ipq806x/patches-5.10/900-arm-add-cmdline-override.patch
-new file mode 100644
-index 0000000000..2459e6a2f0
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/900-arm-add-cmdline-override.patch
-@@ -0,0 +1,37 @@
-+--- a/arch/arm/Kconfig
-++++ b/arch/arm/Kconfig
-+@@ -1793,6 +1793,14 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_MANGL
-+ 
-+ endchoice
-+ 
-++config CMDLINE_OVERRIDE
-++	bool "Use alternative cmdline from device tree"
-++	help
-++	  Some bootloaders may have uneditable bootargs. While CMDLINE_FORCE can
-++	  be used, this is not a good option for kernels that are shared across
-++	  devices. This setting enables using "chosen/cmdline-override" as the
-++	  cmdline if it exists in the device tree.
-++
-+ config CMDLINE
-+ 	string "Default kernel command string"
-+ 	default ""
-+--- a/drivers/of/fdt.c
-++++ b/drivers/of/fdt.c
-+@@ -1056,6 +1056,17 @@ int __init early_init_dt_scan_chosen(uns
-+ 	if (p != NULL && l > 0)
-+ 		strlcpy(data, p, min(l, COMMAND_LINE_SIZE));
-+ 
-++    /* CONFIG_CMDLINE_OVERRIDE is used to fallback to a different
-++     * device tree option of chosen/bootargs-override. This is
-++     * helpful on boards where u-boot sets bootargs, and is unable
-++     * to be modified.
-++     */
-++#ifdef CONFIG_CMDLINE_OVERRIDE
-++	p = of_get_flat_dt_prop(node, "bootargs-override", &l);
-++	if (p != NULL && l > 0)
-++		strlcpy(data, p, min((int)l, COMMAND_LINE_SIZE));
-++#endif
-++
-+ 	/*
-+ 	 * CONFIG_CMDLINE is meant to be a default in case nothing else
-+ 	 * managed to set the command line, unless CONFIG_CMDLINE_FORCE
-diff --git a/target/linux/ipq806x/patches-5.10/997-device_tree_cmdline.patch b/target/linux/ipq806x/patches-5.10/997-device_tree_cmdline.patch
-new file mode 100644
-index 0000000000..bdcba2a21c
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.10/997-device_tree_cmdline.patch
-@@ -0,0 +1,12 @@
-+--- a/drivers/of/fdt.c
-++++ b/drivers/of/fdt.c
-+@@ -1055,6 +1055,9 @@ int __init early_init_dt_scan_chosen(uns
-+ 	p = of_get_flat_dt_prop(node, "bootargs", &l);
-+ 	if (p != NULL && l > 0)
-+ 		strlcpy(data, p, min(l, COMMAND_LINE_SIZE));
-++	p = of_get_flat_dt_prop(node, "bootargs-append", &l);
-++	if (p != NULL && l > 0)
-++		strlcat(data, p, min_t(int, strlen(data) + (int)l, COMMAND_LINE_SIZE));
-+ 
-+     /* CONFIG_CMDLINE_OVERRIDE is used to fallback to a different
-+      * device tree option of chosen/bootargs-override. This is
-diff --git a/target/linux/ipq806x/patches-5.4/0031-mtd-add-SMEM-parser-for-QCOM-platforms.patch b/target/linux/ipq806x/patches-5.4/0031-mtd-add-SMEM-parser-for-QCOM-platforms.patch
-deleted file mode 100644
-index 6b7119b8e0..0000000000
---- a/target/linux/ipq806x/patches-5.4/0031-mtd-add-SMEM-parser-for-QCOM-platforms.patch
-+++ /dev/null
-@@ -1,282 +0,0 @@
--From d8eeb4de90e968ba32d956728c866f20752cf2c3 Mon Sep 17 00:00:00 2001
--From: Mathieu Olivari <mathieu@codeaurora.org>
--Date: Thu, 9 Mar 2017 08:18:08 +0100
--Subject: [PATCH 31/69] mtd: add SMEM parser for QCOM platforms
--
--On QCOM platforms using MTD devices storage (such as IPQ806x), SMEM is
--used to store partition layout. This new parser can now be used to read
--SMEM and use it to register an MTD layout according to its content.
--
--Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
--Signed-off-by: Ram Chandra Jangir <rjangi@codeaurora.org>
-----
-- drivers/mtd/parsers/Kconfig          |   7 ++
-- drivers/mtd/parsers/Makefile         |   1 +
-- drivers/mtd/parsers/qcom_smem_part.c | 228 +++++++++++++++++++++++++++++++++++++++++++
-- 3 files changed, 236 insertions(+)
-- create mode 100644 drivers/mtd/parsers/qcom_smem_part.c
--
----- a/drivers/mtd/parsers/Kconfig
--+++ b/drivers/mtd/parsers/Kconfig
--@@ -138,6 +138,13 @@ config MTD_PARSER_TRX
-- 	  This driver will parse TRX header and report at least two partitions:
-- 	  kernel and rootfs.
-- 
--+config MTD_QCOM_SMEM_PARTS
--+	tristate "QCOM SMEM partitioning support"
--+	depends on QCOM_SMEM
--+	help
--+	  This provides partitions parser for QCOM devices using SMEM
--+	  such as IPQ806x.
--+
-- config MTD_SHARPSL_PARTS
-- 	tristate "Sharp SL Series NAND flash partition parser"
-- 	depends on MTD_NAND_SHARPSL || MTD_NAND_TMIO || COMPILE_TEST
----- a/drivers/mtd/parsers/Makefile
--+++ b/drivers/mtd/parsers/Makefile
--@@ -11,6 +11,7 @@ ofpart-$(CONFIG_MTD_OF_PARTS_LINKSYS_NS)
-- obj-$(CONFIG_MTD_PARSER_IMAGETAG)	+= parser_imagetag.o
-- obj-$(CONFIG_MTD_AFS_PARTS)		+= afs.o
-- obj-$(CONFIG_MTD_PARSER_TRX)		+= parser_trx.o
--+obj-$(CONFIG_MTD_QCOM_SMEM_PARTS)		+= qcom_smem_part.o
-- obj-$(CONFIG_MTD_SHARPSL_PARTS)		+= sharpslpart.o
-- obj-$(CONFIG_MTD_REDBOOT_PARTS)		+= redboot.o
-- obj-$(CONFIG_MTD_ROUTERBOOT_PARTS)		+= routerbootpart.o
----- /dev/null
--+++ b/drivers/mtd/parsers/qcom_smem_part.c
--@@ -0,0 +1,235 @@
--+/*
--+ * Copyright (c) 2015, The Linux Foundation. All rights reserved.
--+ *
--+ * This program is free software; you can redistribute it and/or modify
--+ * it under the terms of the GNU General Public License version 2 and
--+ * only version 2 as published by the Free Software Foundation.
--+ *
--+ * This program is distributed in the hope that it will be useful,
--+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
--+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
--+ * GNU General Public License for more details.
--+ */
--+
--+#include <linux/kernel.h>
--+#include <linux/device.h>
--+#include <linux/slab.h>
--+
--+#include <linux/mtd/mtd.h>
--+#include <linux/mtd/partitions.h>
--+#include <linux/spi/spi.h>
--+#include <linux/module.h>
--+
--+#include <linux/soc/qcom/smem.h>
--+
--+/* Processor/host identifier for the application processor */
--+#define SMEM_HOST_APPS			0
--+
--+/* SMEM items index */
--+#define SMEM_AARM_PARTITION_TABLE	9
--+#define SMEM_BOOT_FLASH_TYPE		421
--+#define SMEM_BOOT_FLASH_BLOCK_SIZE	424
--+
--+/* SMEM Flash types */
--+#define SMEM_FLASH_NAND			2
--+#define SMEM_FLASH_SPI			6
--+
--+#define SMEM_PART_NAME_SZ		16
--+#define SMEM_PARTS_MAX			32
--+
--+struct smem_partition {
--+	char name[SMEM_PART_NAME_SZ];
--+	__le32 start;
--+	__le32 size;
--+	__le32 attr;
--+};
--+
--+struct smem_partition_table {
--+	u8 magic[8];
--+	__le32 version;
--+	__le32 len;
--+	struct smem_partition parts[SMEM_PARTS_MAX];
--+};
--+
--+/* SMEM Magic values in partition table */
--+static const u8 SMEM_PTABLE_MAGIC[] = {
--+	0xaa, 0x73, 0xee, 0x55,
--+	0xdb, 0xbd, 0x5e, 0xe3,
--+};
--+
--+static int qcom_smem_get_flash_blksz(u64 **smem_blksz)
--+{
--+	size_t size;
--+
--+	*smem_blksz = qcom_smem_get(SMEM_HOST_APPS, SMEM_BOOT_FLASH_BLOCK_SIZE,
--+			    	    &size);
--+
--+	if (IS_ERR(*smem_blksz)) {
--+		pr_err("Unable to read flash blksz from SMEM\n");
--+		return -ENOENT;
--+	}
--+
--+	if (size != sizeof(**smem_blksz)) {
--+		pr_err("Invalid flash blksz size in SMEM\n");
--+		return -EINVAL;
--+	}
--+
--+	return 0;
--+}
--+
--+static int qcom_smem_get_flash_type(u64 **smem_flash_type)
--+{
--+	size_t size;
--+
--+	*smem_flash_type = qcom_smem_get(SMEM_HOST_APPS, SMEM_BOOT_FLASH_TYPE,
--+			    		&size);
--+
--+	if (IS_ERR(*smem_flash_type)) {
--+		pr_err("Unable to read flash type from SMEM\n");
--+		return -ENOENT;
--+	}
--+
--+	if (size != sizeof(**smem_flash_type)) {
--+		pr_err("Invalid flash type size in SMEM\n");
--+		return -EINVAL;
--+	}
--+
--+	return 0;
--+}
--+
--+static int qcom_smem_get_flash_partitions(struct smem_partition_table **pparts)
--+{
--+	size_t size;
--+
--+	*pparts = qcom_smem_get(SMEM_HOST_APPS, SMEM_AARM_PARTITION_TABLE,
--+				&size);
--+
--+	if (IS_ERR(*pparts)) {
--+		pr_err("Unable to read partition table from SMEM\n");
--+		return -ENOENT;
--+	}
--+
--+	return 0;
--+}
--+
--+static int of_dev_node_match(struct device *dev, const void *data)
--+{
--+	return dev->of_node == data;
--+}
--+
--+static bool is_spi_device(struct device_node *np)
--+{
--+	struct device *dev;
--+
--+	dev = bus_find_device(&spi_bus_type, NULL, np, of_dev_node_match);
--+	if (!dev)
--+		return false;
--+
--+	put_device(dev);
--+	return true;
--+}
--+
--+static int parse_qcom_smem_partitions(struct mtd_info *master,
--+				      const struct mtd_partition **pparts,
--+				      struct mtd_part_parser_data *data)
--+{
--+	struct smem_partition_table *smem_parts;
--+	u64 *smem_flash_type, *smem_blksz;
--+	struct mtd_partition *mtd_parts;
--+	struct device_node *of_node = master->dev.of_node;
--+	int i, ret;
--+
--+	/*
--+	 * SMEM will only store the partition table of the boot device.
--+	 * If this is not the boot device, do not return any partition.
--+	 */
--+	ret = qcom_smem_get_flash_type(&smem_flash_type);
--+	if (ret < 0)
--+		return ret;
--+
--+	if ((*smem_flash_type == SMEM_FLASH_NAND && !mtd_type_is_nand(master))
--+	    || (*smem_flash_type == SMEM_FLASH_SPI && !is_spi_device(of_node)))
--+		return 0;
--+
--+	/*
--+	 * Just for sanity purpose, make sure the block size in SMEM matches the
--+	 * block size of the MTD device
--+	 */
--+	ret = qcom_smem_get_flash_blksz(&smem_blksz);
--+	if (ret < 0)
--+		return ret;
--+
--+	if (*smem_blksz != master->erasesize) {
--+		pr_err("SMEM block size differs from MTD block size\n");
--+		return -EINVAL;
--+	}
--+
--+	/* Get partition pointer from SMEM */
--+	ret = qcom_smem_get_flash_partitions(&smem_parts);
--+	if (ret < 0)
--+		return ret;
--+
--+	if (memcmp(SMEM_PTABLE_MAGIC, smem_parts->magic,
--+		   sizeof(SMEM_PTABLE_MAGIC))) {
--+		pr_err("SMEM partition magic invalid\n");
--+		return -EINVAL;
--+	}
--+
--+	/* Allocate and populate the mtd structures */
--+	mtd_parts = kcalloc(le32_to_cpu(smem_parts->len), sizeof(*mtd_parts),
--+			    GFP_KERNEL);
--+	if (!mtd_parts)
--+		return -ENOMEM;
--+
--+	for (i = 0; i < smem_parts->len; i++) {
--+		struct smem_partition *s_part = &smem_parts->parts[i];
--+		struct mtd_partition *m_part = &mtd_parts[i];
--+
--+		m_part->name = s_part->name;
--+		m_part->size = le32_to_cpu(s_part->size) * (*smem_blksz);
--+		m_part->offset = le32_to_cpu(s_part->start) * (*smem_blksz);
--+
--+		/*
--+		 * The last SMEM partition may have its size marked as
--+		 * something like 0xffffffff, which means "until the end of the
--+		 * flash device". In this case, truncate it.
--+		 */
--+		if (m_part->offset + m_part->size > master->size)
--+			m_part->size = master->size - m_part->offset;
--+	}
--+
--+	*pparts = mtd_parts;
--+
--+	return smem_parts->len;
--+}
--+
--+static const struct of_device_id qcom_smem_of_match_table[] = {
--+	{ .compatible = "qcom,smem" },
--+	{},
--+};
--+MODULE_DEVICE_TABLE(of, qcom_smem_of_match_table);
--+
--+static struct mtd_part_parser qcom_smem_parser = {
--+	.owner = THIS_MODULE,
--+	.parse_fn = parse_qcom_smem_partitions,
--+	.name = "qcom-smem",
--+	.of_match_table = qcom_smem_of_match_table,
--+};
--+
--+static int __init qcom_smem_parser_init(void)
--+{
--+	register_mtd_parser(&qcom_smem_parser);
--+	return 0;
--+}
--+
--+static void __exit qcom_smem_parser_exit(void)
--+{
--+	deregister_mtd_parser(&qcom_smem_parser);
--+}
--+
--+module_init(qcom_smem_parser_init);
--+module_exit(qcom_smem_parser_exit);
--+
--+MODULE_LICENSE("GPL");
--+MODULE_AUTHOR("Mathieu Olivari <mathieu@codeaurora.org>");
--+MODULE_DESCRIPTION("Parsing code for SMEM based partition tables");
-diff --git a/target/linux/ipq806x/patches-5.4/0049-PM-OPP-Support-adjusting-OPP-voltages-at-runtime.patch b/target/linux/ipq806x/patches-5.4/0049-PM-OPP-Support-adjusting-OPP-voltages-at-runtime.patch
-deleted file mode 100644
-index 9efbd583b4..0000000000
---- a/target/linux/ipq806x/patches-5.4/0049-PM-OPP-Support-adjusting-OPP-voltages-at-runtime.patch
-+++ /dev/null
-@@ -1,153 +0,0 @@
--From: Sylwester Nawrocki <s.nawrocki@samsung.com>
--To: krzk@kernel.org, vireshk@kernel.org, robh+dt@kernel.org
--Cc: sboyd@kernel.org, roger.lu@mediatek.com,
--	linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
--	linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org,
--	b.zolnierkie@samsung.com, m.szyprowski@samsung.com,
--	Stephen Boyd <sboyd@codeaurora.org>,
--	Sylwester Nawrocki <s.nawrocki@samsung.com>
--Subject: [PATCH v5 1/4] PM / OPP: Support adjusting OPP voltages at runtime
--Date: Wed, 16 Oct 2019 16:57:53 +0200
--Message-ID: <20191016145756.16004-2-s.nawrocki@samsung.com> (raw)
--In-Reply-To: <20191016145756.16004-1-s.nawrocki@samsung.com>
--
--From: Stephen Boyd <sboyd@codeaurora.org>
--
--On some SoCs the Adaptive Voltage Scaling (AVS) technique is
--employed to optimize the operating voltage of a device. At a
--given frequency, the hardware monitors dynamic factors and either
--makes a suggestion for how much to adjust a voltage for the
--current frequency, or it automatically adjusts the voltage
--without software intervention. Add an API to the OPP library for
--the former case, so that AVS type devices can update the voltages
--for an OPP when the hardware determines the voltage should
--change. The assumption is that drivers like CPUfreq or devfreq
--will register for the OPP notifiers and adjust the voltage
--according to suggestions that AVS makes.
--
--This patch is derived from [1] submitted by Stephen.
--[1] https://lore.kernel.org/patchwork/patch/599279/
--
--Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
--Signed-off-by: Roger Lu <roger.lu@mediatek.com>
--[s.nawrocki@samsung.com: added handling of OPP min/max voltage]
--Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
-----
-- drivers/opp/core.c     | 69 ++++++++++++++++++++++++++++++++++++++++++
-- include/linux/pm_opp.h | 13 ++++++++
-- 2 files changed, 82 insertions(+)
--
----- a/drivers/opp/core.c
--+++ b/drivers/opp/core.c
--@@ -2102,6 +2102,75 @@ put_table:
-- }
-- 
-- /**
--+ * dev_pm_opp_adjust_voltage() - helper to change the voltage of an OPP
--+ * @dev:		device for which we do this operation
--+ * @freq:		OPP frequency to adjust voltage of
--+ * @u_volt:		new OPP target voltage
--+ * @u_volt_min:		new OPP min voltage
--+ * @u_volt_max:		new OPP max voltage
--+ *
--+ * Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the
--+ * copy operation, returns 0 if no modifcation was done OR modification was
--+ * successful.
--+ */
--+int dev_pm_opp_adjust_voltage(struct device *dev, unsigned long freq,
--+			      unsigned long u_volt, unsigned long u_volt_min,
--+			      unsigned long u_volt_max)
--+
--+{
--+	struct opp_table *opp_table;
--+	struct dev_pm_opp *tmp_opp, *opp = ERR_PTR(-ENODEV);
--+	int r = 0;
--+
--+	/* Find the opp_table */
--+	opp_table = _find_opp_table(dev);
--+	if (IS_ERR(opp_table)) {
--+		r = PTR_ERR(opp_table);
--+		dev_warn(dev, "%s: Device OPP not found (%d)\n", __func__, r);
--+		return r;
--+	}
--+
--+	mutex_lock(&opp_table->lock);
--+
--+	/* Do we have the frequency? */
--+	list_for_each_entry(tmp_opp, &opp_table->opp_list, node) {
--+		if (tmp_opp->rate == freq) {
--+			opp = tmp_opp;
--+			break;
--+		}
--+	}
--+
--+	if (IS_ERR(opp)) {
--+		r = PTR_ERR(opp);
--+		goto adjust_unlock;
--+	}
--+
--+	/* Is update really needed? */
--+	if (opp->supplies->u_volt == u_volt)
--+		goto adjust_unlock;
--+
--+	opp->supplies->u_volt = u_volt;
--+	opp->supplies->u_volt_min = u_volt_min;
--+	opp->supplies->u_volt_max = u_volt_max;
--+
--+	dev_pm_opp_get(opp);
--+	mutex_unlock(&opp_table->lock);
--+
--+	/* Notify the voltage change of the OPP */
--+	blocking_notifier_call_chain(&opp_table->head, OPP_EVENT_ADJUST_VOLTAGE,
--+				     opp);
--+
--+	dev_pm_opp_put(opp);
--+	goto adjust_put_table;
--+
--+adjust_unlock:
--+	mutex_unlock(&opp_table->lock);
--+adjust_put_table:
--+	dev_pm_opp_put_opp_table(opp_table);
--+	return r;
--+}
--+
--+/**
--  * dev_pm_opp_enable() - Enable a specific OPP
--  * @dev:	device for which we do this operation
--  * @freq:	OPP frequency to enable
----- a/include/linux/pm_opp.h
--+++ b/include/linux/pm_opp.h
--@@ -22,6 +22,7 @@ struct opp_table;
-- 
-- enum dev_pm_opp_event {
-- 	OPP_EVENT_ADD, OPP_EVENT_REMOVE, OPP_EVENT_ENABLE, OPP_EVENT_DISABLE,
--+	OPP_EVENT_ADJUST_VOLTAGE,
-- };
-- 
-- /**
--@@ -113,6 +114,10 @@ int dev_pm_opp_add(struct device *dev, u
-- void dev_pm_opp_remove(struct device *dev, unsigned long freq);
-- void dev_pm_opp_remove_all_dynamic(struct device *dev);
-- 
--+int dev_pm_opp_adjust_voltage(struct device *dev, unsigned long freq,
--+			      unsigned long u_volt, unsigned long u_volt_min,
--+			      unsigned long u_volt_max);
--+
-- int dev_pm_opp_enable(struct device *dev, unsigned long freq);
-- 
-- int dev_pm_opp_disable(struct device *dev, unsigned long freq);
--@@ -242,6 +247,14 @@ static inline void dev_pm_opp_remove_all
-- {
-- }
-- 
--+static inline int
--+dev_pm_opp_adjust_voltage(struct device *dev, unsigned long freq,
--+			  unsigned long u_volt, unsigned long u_volt_min,
--+			  unsigned long u_volt_max)
--+{
--+	return 0;
--+}
--+
-- static inline int dev_pm_opp_enable(struct device *dev, unsigned long freq)
-- {
-- 	return 0;
-diff --git a/target/linux/ipq806x/patches-5.4/0051-PM-OPP-Add-a-helper-to-get-an-opp-regulator-for-devi.patch b/target/linux/ipq806x/patches-5.4/0051-PM-OPP-Add-a-helper-to-get-an-opp-regulator-for-devi.patch
-deleted file mode 100644
-index 35fe45fca7..0000000000
---- a/target/linux/ipq806x/patches-5.4/0051-PM-OPP-Add-a-helper-to-get-an-opp-regulator-for-devi.patch
-+++ /dev/null
-@@ -1,52 +0,0 @@
--From d06ca5e7a3cf726f5be5ffd96e93ccd798b8c09a Mon Sep 17 00:00:00 2001
--From: Georgi Djakov <georgi.djakov@linaro.org>
--Date: Thu, 12 May 2016 14:41:33 +0300
--Subject: [PATCH 51/69] PM / OPP: Add a helper to get an opp regulator for
-- device
--
--Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
-----
-- drivers/opp/core.c            | 21 +++++++++++++++++++++
-- include/linux/pm_opp.h        |  1 +
-- 2 files changed, 22 insertions(+)
--
----- a/drivers/opp/core.c
--+++ b/drivers/opp/core.c
--@@ -127,6 +127,27 @@ unsigned long dev_pm_opp_get_freq(struct
-- }
-- EXPORT_SYMBOL_GPL(dev_pm_opp_get_freq);
-- 
--+struct regulator *dev_pm_opp_get_regulator(struct device *dev)
--+{
--+	struct opp_table *opp_table;
--+	struct regulator *reg;
--+
--+	rcu_read_lock();
--+
--+	opp_table = _find_opp_table(dev);
--+	if (IS_ERR(opp_table)) {
--+		rcu_read_unlock();
--+		return ERR_CAST(opp_table);
--+	}
--+
--+	reg = opp_table->regulators[0];
--+
--+	rcu_read_unlock();
--+
--+	return reg;
--+}
--+EXPORT_SYMBOL_GPL(dev_pm_opp_get_regulator);
--+
-- /**
--  * dev_pm_opp_get_level() - Gets the level corresponding to an available opp
--  * @opp:	opp for which level value has to be returned for
----- a/include/linux/pm_opp.h
--+++ b/include/linux/pm_opp.h
--@@ -83,6 +83,7 @@ void dev_pm_opp_put_opp_table(struct opp
-- unsigned long dev_pm_opp_get_voltage(struct dev_pm_opp *opp);
-- 
-- unsigned long dev_pm_opp_get_freq(struct dev_pm_opp *opp);
--+struct regulator *dev_pm_opp_get_regulator(struct device *dev);
-- 
-- unsigned int dev_pm_opp_get_level(struct dev_pm_opp *opp);
-- 
-diff --git a/target/linux/ipq806x/patches-5.4/0052-PM-OPP-Update-the-voltage-tolerance-when-adjusting-t.patch b/target/linux/ipq806x/patches-5.4/0052-PM-OPP-Update-the-voltage-tolerance-when-adjusting-t.patch
-deleted file mode 100644
-index 8498a0b6df..0000000000
---- a/target/linux/ipq806x/patches-5.4/0052-PM-OPP-Update-the-voltage-tolerance-when-adjusting-t.patch
-+++ /dev/null
-@@ -1,47 +0,0 @@
--From 4533c285c2aedce6d4434d7b877066de3b1ecb33 Mon Sep 17 00:00:00 2001
--From: Georgi Djakov <georgi.djakov@linaro.org>
--Date: Thu, 25 Aug 2016 18:43:35 +0300
--Subject: [PATCH 52/69] PM / OPP: Update the voltage tolerance when adjusting
-- the OPP
--
--When the voltage is adjusted, the voltage tolerance is not updated.
--This can lead to situations where the voltage min value is greater
--than the voltage max value. The final result is triggering a BUG()
--in the regulator core.
--Fix this by updating the voltage tolerance values too.
--
--Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
-----
-- drivers/opp/core.c | 5 +++++
-- 1 file changed, 5 insertions(+)
--
----- a/drivers/opp/core.c
--+++ b/drivers/opp/core.c
--@@ -2142,6 +2142,7 @@ int dev_pm_opp_adjust_voltage(struct dev
-- 	struct opp_table *opp_table;
-- 	struct dev_pm_opp *tmp_opp, *opp = ERR_PTR(-ENODEV);
-- 	int r = 0;
--+	unsigned long tol;
-- 
-- 	/* Find the opp_table */
-- 	opp_table = _find_opp_table(dev);
--@@ -2171,8 +2172,17 @@ int dev_pm_opp_adjust_voltage(struct dev
-- 		goto adjust_unlock;
-- 
-- 	opp->supplies->u_volt = u_volt;
---	opp->supplies->u_volt_min = u_volt_min;
---	opp->supplies->u_volt_max = u_volt_max;
--+
--+	tol = u_volt * opp_table->voltage_tolerance_v1 / 100;
--+	if ( u_volt_min == u_volt )
--+		opp->supplies->u_volt_min = u_volt - tol;
--+	else
--+		opp->supplies->u_volt_min = u_volt_min;
--+
--+	if ( u_volt_max == u_volt )
--+		opp->supplies->u_volt_max = u_volt + tol;
--+	else
--+		opp->supplies->u_volt_max = u_volt_max;
-- 
-- 	dev_pm_opp_get(opp);
-- 	mutex_unlock(&opp_table->lock);
-diff --git a/target/linux/ipq806x/patches-5.4/0054-cpufreq-dt-Handle-OPP-voltage-adjust-events.patch b/target/linux/ipq806x/patches-5.4/0054-cpufreq-dt-Handle-OPP-voltage-adjust-events.patch
-deleted file mode 100644
-index 2e9c101d94..0000000000
---- a/target/linux/ipq806x/patches-5.4/0054-cpufreq-dt-Handle-OPP-voltage-adjust-events.patch
-+++ /dev/null
-@@ -1,118 +0,0 @@
--From 10577f74c35bd395951d1b2382c8d821089b5745 Mon Sep 17 00:00:00 2001
--From: Stephen Boyd <sboyd@codeaurora.org>
--Date: Fri, 18 Sep 2015 17:52:08 -0700
--Subject: [PATCH 54/69] cpufreq-dt: Handle OPP voltage adjust events
--
--On some SoCs the Adaptive Voltage Scaling (AVS) technique is
--employed to optimize the operating voltage of a device. At a
--given frequency, the hardware monitors dynamic factors and either
--makes a suggestion for how much to adjust a voltage for the
--current frequency, or it automatically adjusts the voltage
--without software intervention.
--
--In the former case, an AVS driver will call
--dev_pm_opp_modify_voltage() and update the voltage for the
--particular OPP the CPUs are using. Add an OPP notifier to
--cpufreq-dt so that we can adjust the voltage of the CPU when AVS
--updates the OPP.
--
--Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
--Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
--Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
-----
-- drivers/cpufreq/cpufreq-dt.c | 68 ++++++++++++++++++++++++++++++++++++++++++--
-- 1 file changed, 65 insertions(+), 3 deletions(-)
--
----- a/drivers/cpufreq/cpufreq-dt.c
--+++ b/drivers/cpufreq/cpufreq-dt.c
--@@ -27,6 +27,9 @@ struct private_data {
-- 	struct opp_table *opp_table;
-- 	struct device *cpu_dev;
-- 	const char *reg_name;
--+	struct notifier_block opp_nb;
--+	struct mutex lock;
--+	unsigned long opp_freq;
-- 	bool have_static_opps;
-- };
-- 
--@@ -42,12 +45,15 @@ static int set_target(struct cpufreq_pol
-- 	unsigned long freq = policy->freq_table[index].frequency;
-- 	int ret;
-- 
--+	mutex_lock(&priv->lock);
-- 	ret = dev_pm_opp_set_rate(priv->cpu_dev, freq * 1000);
-- 
-- 	if (!ret) {
--+		priv->opp_freq = freq * 1000;
-- 		arch_set_freq_scale(policy->related_cpus, freq,
-- 				    policy->cpuinfo.max_freq);
-- 	}
--+	mutex_unlock(&priv->lock);
-- 
-- 	return ret;
-- }
--@@ -90,6 +96,39 @@ node_put:
-- 	return name;
-- }
-- 
--+static int opp_notifier(struct notifier_block *nb, unsigned long event,
--+			void *data)
--+{
--+	struct dev_pm_opp *opp = data;
--+	struct private_data *priv = container_of(nb, struct private_data,
--+						 opp_nb);
--+	struct device *cpu_dev = priv->cpu_dev;
--+	struct regulator *cpu_reg;
--+	unsigned long volt, freq;
--+	int ret = 0;
--+
--+	if (event == OPP_EVENT_ADJUST_VOLTAGE) {
--+		cpu_reg = dev_pm_opp_get_regulator(cpu_dev);
--+		if (IS_ERR(cpu_reg)) {
--+			ret = PTR_ERR(cpu_reg);
--+			goto out;
--+		}
--+		volt = dev_pm_opp_get_voltage(opp);
--+		freq = dev_pm_opp_get_freq(opp);
--+
--+		mutex_lock(&priv->lock);
--+		if (freq == priv->opp_freq) {
--+			ret = regulator_set_voltage_triplet(cpu_reg, volt, volt, volt);
--+		}
--+		mutex_unlock(&priv->lock);
--+		if (ret)
--+			dev_err(cpu_dev, "failed to scale voltage: %d\n", ret);
--+	}
--+
--+out:
--+	return notifier_from_errno(ret);
--+}
--+
-- static int resources_available(void)
-- {
-- 	struct device *cpu_dev;
--@@ -246,10 +285,14 @@ static int cpufreq_init(struct cpufreq_p
-- 				__func__, ret);
-- 	}
-- 
--+	mutex_init(&priv->lock);
--+	priv->opp_nb.notifier_call = opp_notifier;
--+	dev_pm_opp_register_notifier(cpu_dev, &priv->opp_nb);
--+
-- 	ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
-- 	if (ret) {
-- 		dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret);
---		goto out_free_opp;
--+		goto out_unregister_nb;
-- 	}
-- 
-- 	priv->cpu_dev = cpu_dev;
--@@ -281,6 +324,8 @@ static int cpufreq_init(struct cpufreq_p
-- 
-- out_free_cpufreq_table:
-- 	dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
--+out_unregister_nb:
--+	dev_pm_opp_unregister_notifier(cpu_dev, &priv->opp_nb);
-- out_free_opp:
-- 	if (priv->have_static_opps)
-- 		dev_pm_opp_of_cpumask_remove_table(policy->cpus);
-diff --git a/target/linux/ipq806x/patches-5.4/0055-cpufreq-dt-Add-L2-frequency-scaling-support.patch b/target/linux/ipq806x/patches-5.4/0055-cpufreq-dt-Add-L2-frequency-scaling-support.patch
-deleted file mode 100644
-index 910c2b1722..0000000000
---- a/target/linux/ipq806x/patches-5.4/0055-cpufreq-dt-Add-L2-frequency-scaling-support.patch
-+++ /dev/null
-@@ -1,199 +0,0 @@
----- a/drivers/cpufreq/cpufreq-dt.c
--+++ b/drivers/cpufreq/cpufreq-dt.c
--@@ -39,20 +39,85 @@ static struct freq_attr *cpufreq_dt_attr
-- 	NULL,
-- };
-- 
--+struct shared_data {
--+	unsigned long *curr_freq_table;
--+	unsigned long curr_l2_freq;
--+	unsigned long curr_l2_volt;
--+};
--+
--+static struct shared_data *cpus_shared_data;
--+
-- static int set_target(struct cpufreq_policy *policy, unsigned int index)
-- {
-- 	struct private_data *priv = policy->driver_data;
-- 	unsigned long freq = policy->freq_table[index].frequency;
--+	struct clk *l2_clk = policy->l2_clk;
--+	struct regulator *l2_regulator = policy->l2_regulator;
--+	unsigned long l2_freq, target_l2_freq;
--+	unsigned long l2_vol, target_l2_volt;
--+	unsigned long target_freq;
-- 	int ret;
-- 
-- 	mutex_lock(&priv->lock);
-- 	ret = dev_pm_opp_set_rate(priv->cpu_dev, freq * 1000);
-- 
-- 	if (!ret) {
--+		if (policy->l2_rate_set) {
--+			int cpu, l2_index, tol = 0;
--+			target_freq = freq * 1000;
--+
--+			cpus_shared_data->curr_freq_table[policy->cpu] = target_freq;
--+			for_each_present_cpu(cpu)
--+				if (cpu != policy->cpu)
--+					target_freq = max(target_freq, cpus_shared_data->curr_freq_table[cpu]);
--+
--+			for (l2_index = 2; l2_index > 0; l2_index--)
--+				if (target_freq >= policy->l2_cpufreq[l2_index])
--+					break;
--+
--+			l2_freq = cpus_shared_data->curr_l2_freq;
--+			target_l2_freq = policy->l2_rate[l2_index];
--+
--+			if (l2_freq != target_l2_freq) {
--+
--+				/*
--+				 * Set to idle bin if switching from normal to high bin 
--+				 * or vice versa
--+				 */
--+				if ( (l2_index == 2 && l2_freq == policy->l2_rate[1]) ||
--+					 (l2_index == 1 && l2_freq == policy->l2_rate[2]) ) {
--+					ret = clk_set_rate(l2_clk, policy->l2_rate[0]);
--+					if (ret)
--+						goto exit;
--+				}
--+
--+				/* scale l2 with the core */
--+				ret = clk_set_rate(l2_clk, target_l2_freq);
--+				if (ret)
--+					goto exit;
--+				cpus_shared_data->curr_l2_freq = target_l2_freq;
--+
--+				if (policy->l2_volt_set) {
--+
--+					l2_vol = cpus_shared_data->curr_l2_volt;
--+					target_l2_volt = policy->l2_volt[l2_index];
--+
--+					if (l2_vol != target_l2_volt) {
--+						tol = target_l2_volt * policy->l2_volt_tol / 100;
--+						ret = regulator_set_voltage_tol(l2_regulator,target_l2_volt,tol);
--+						if (ret)
--+							goto exit;
--+						cpus_shared_data->curr_l2_volt = target_l2_volt;
--+					}
--+				}
--+			}
--+		}
-- 		priv->opp_freq = freq * 1000;
-- 		arch_set_freq_scale(policy->related_cpus, freq,
-- 				    policy->cpuinfo.max_freq);
-- 	}
--+
--+exit:
-- 	mutex_unlock(&priv->lock);
-- 
-- 	return ret;
--@@ -195,6 +260,9 @@ static int cpufreq_init(struct cpufreq_p
-- 	bool fallback = false;
-- 	const char *name;
-- 	int ret;
--+	struct device_node *np, *l2_np;
--+	struct clk *l2_clk = NULL;
--+	struct regulator *l2_regulator = NULL;
-- 
-- 	cpu_dev = get_cpu_device(policy->cpu);
-- 	if (!cpu_dev) {
--@@ -302,6 +370,57 @@ static int cpufreq_init(struct cpufreq_p
-- 
-- 	policy->suspend_freq = dev_pm_opp_get_suspend_opp_freq(cpu_dev) / 1000;
-- 
--+	policy->l2_rate_set = false;
--+	policy->l2_volt_set = false;
--+
--+	l2_clk = clk_get(cpu_dev, "l2");
--+	if (!IS_ERR(l2_clk))
--+		policy->l2_clk = l2_clk;
--+
--+	l2_np = of_find_node_by_name(NULL, "qcom,l2");
--+	if (l2_np) {
--+		struct device_node *vdd;
--+		np = of_node_get(priv->cpu_dev->of_node);
--+
--+		if (np)
--+			of_property_read_u32(np, "voltage-tolerance", &policy->l2_volt_tol);
--+
--+		of_property_read_u32_array(l2_np, "qcom,l2-rates", policy->l2_rate, 3);
--+		if (policy->l2_rate[0] && policy->l2_rate[1] && policy->l2_rate[2]) {
--+			policy->l2_rate_set = true;
--+			of_property_read_u32_array(l2_np, "qcom,l2-cpufreq", policy->l2_cpufreq, 3);
--+			of_property_read_u32_array(l2_np, "qcom,l2-volt", policy->l2_volt, 3);
--+		} else
--+			pr_warn("L2: failed to parse L2 rates\n");
--+
--+		if (!policy->l2_cpufreq[0] && !policy->l2_cpufreq[1] && 
--+			!policy->l2_cpufreq[2] && policy->l2_rate_set) {
--+			int i;
--+
--+			pr_warn("L2: failed to parse target cpu freq, using defaults\n");
--+			for (i = 0; i < 3; i++)
--+				policy->l2_cpufreq[i] = policy->l2_rate[i];
--+		}
--+
--+		if (policy->l2_volt[0] && policy->l2_volt[1] && policy->l2_volt[2] &&
--+			policy->l2_volt_tol && policy->l2_rate_set) {
--+			vdd = of_parse_phandle(l2_np, "qcom,l2-supply", 0);
--+
--+			if (vdd) {
--+				l2_regulator = devm_regulator_get(cpu_dev, vdd->name);
--+				if (!IS_ERR(l2_regulator)) {
--+					policy->l2_regulator = l2_regulator;
--+					policy->l2_volt_set = true;
--+				} else {
--+					pr_warn("failed to get l2 supply\n");
--+					l2_regulator = NULL;
--+				}
--+
--+				of_node_put(vdd);
--+			}
--+		}
--+	}
--+
-- 	/* Support turbo/boost mode */
-- 	if (policy_has_boost_freq(policy)) {
-- 		/* This gets disabled by core on driver unregister */
--@@ -401,6 +520,14 @@ static int dt_cpufreq_probe(struct platf
-- 	if (ret)
-- 		return ret;
-- 
--+	cpus_shared_data = kzalloc(sizeof(struct shared_data), GFP_KERNEL);
--+	if (!cpus_shared_data)
--+		return -ENOMEM;
--+
--+	cpus_shared_data->curr_freq_table = kzalloc(sizeof(int) * CONFIG_NR_CPUS, GFP_KERNEL);
--+	if (!cpus_shared_data->curr_freq_table)
--+		return -ENOMEM;
--+
-- 	if (data) {
-- 		if (data->have_governor_per_policy)
-- 			dt_cpufreq_driver.flags |= CPUFREQ_HAVE_GOVERNOR_PER_POLICY;
--@@ -419,6 +546,8 @@ static int dt_cpufreq_probe(struct platf
-- 
-- static int dt_cpufreq_remove(struct platform_device *pdev)
-- {
--+	kfree(cpus_shared_data->curr_freq_table);
--+	kfree(cpus_shared_data);
-- 	cpufreq_unregister_driver(&dt_cpufreq_driver);
-- 	return 0;
-- }
----- a/include/linux/cpufreq.h
--+++ b/include/linux/cpufreq.h
--@@ -58,7 +58,15 @@ struct cpufreq_policy {
-- 						should set cpufreq */
-- 	unsigned int		cpu;    /* cpu managing this policy, must be online */
-- 
---	struct clk		*clk;
--+	struct clk			*clk;
--+	struct clk			*l2_clk; /* L2 clock */
--+	struct regulator	*l2_regulator; /* L2 supply */
--+	unsigned int		l2_rate[3]; /* L2 bus clock rate */
--+	bool				l2_rate_set;
--+	unsigned int		l2_cpufreq[3]; /* L2 target CPU frequency */
--+	unsigned int		l2_volt[3]; /* L2 voltage array */
--+	bool				l2_volt_set;
--+	unsigned int		l2_volt_tol; /* L2 voltage tolerance */
-- 	struct cpufreq_cpuinfo	cpuinfo;/* see above */
-- 
-- 	unsigned int		min;    /* in kHz */
-diff --git a/target/linux/ipq806x/patches-5.4/0056-cpufreq-dt-Add-missing-rcu-locks.patch b/target/linux/ipq806x/patches-5.4/0056-cpufreq-dt-Add-missing-rcu-locks.patch
-deleted file mode 100644
-index 9b85839e19..0000000000
---- a/target/linux/ipq806x/patches-5.4/0056-cpufreq-dt-Add-missing-rcu-locks.patch
-+++ /dev/null
-@@ -1,23 +0,0 @@
--From 001a8dcb56ced58c518aaa10a4f0ba5e878705b6 Mon Sep 17 00:00:00 2001
--From: Georgi Djakov <georgi.djakov@linaro.org>
--Date: Tue, 17 May 2016 16:15:43 +0300
--Subject: [PATCH 56/69] cpufreq-dt: Add missing rcu locks
--
--Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
-----
-- drivers/cpufreq/cpufreq-dt.c | 2 ++
-- 1 file changed, 2 insertions(+)
--
----- a/drivers/cpufreq/cpufreq-dt.c
--+++ b/drivers/cpufreq/cpufreq-dt.c
--@@ -178,8 +178,10 @@ static int opp_notifier(struct notifier_
-- 			ret = PTR_ERR(cpu_reg);
-- 			goto out;
-- 		}
--+		rcu_read_lock();
-- 		volt = dev_pm_opp_get_voltage(opp);
-- 		freq = dev_pm_opp_get_freq(opp);
--+		rcu_read_unlock();
-- 
-- 		mutex_lock(&priv->lock);
-- 		if (freq == priv->opp_freq) {
-diff --git a/target/linux/ipq806x/patches-5.4/0061-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch b/target/linux/ipq806x/patches-5.4/0061-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch
-deleted file mode 100644
-index ff6f6edf49..0000000000
---- a/target/linux/ipq806x/patches-5.4/0061-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch
-+++ /dev/null
-@@ -1,23 +0,0 @@
--From 5001f2e1a325b68dbf225bd17f69a4d3d975cca5 Mon Sep 17 00:00:00 2001
--From: John Crispin <john@phrozen.org>
--Date: Thu, 9 Mar 2017 09:31:44 +0100
--Subject: [PATCH 61/69] mtd: "rootfs" conflicts with OpenWrt auto mounting
--
--Signed-off-by: John Crispin <john@phrozen.org>
-----
-- drivers/mtd/parsers/qcom_smem_part.c | 4 ++++
-- 1 file changed, 4 insertions(+)
--
----- a/drivers/mtd/parsers/qcom_smem_part.c
--+++ b/drivers/mtd/parsers/qcom_smem_part.c
--@@ -189,6 +189,10 @@ static int parse_qcom_smem_partitions(st
-- 		m_part->size = le32_to_cpu(s_part->size) * (*smem_blksz);
-- 		m_part->offset = le32_to_cpu(s_part->start) * (*smem_blksz);
-- 
--+		/* "rootfs" conflicts with OpenWrt auto mounting */
--+		if (mtd_type_is_nand(master) && !strcmp(m_part->name, "rootfs"))
--+			m_part->name = "ubi";
--+
-- 		/*
-- 		 * The last SMEM partition may have its size marked as
-- 		 * something like 0xffffffff, which means "until the end of the
-diff --git a/target/linux/ipq806x/patches-5.4/0069-arm-boot-add-dts-files.patch b/target/linux/ipq806x/patches-5.4/0069-arm-boot-add-dts-files.patch
-index 055a4cbc30..b97d36fd7c 100644
---- a/target/linux/ipq806x/patches-5.4/0069-arm-boot-add-dts-files.patch
-+++ b/target/linux/ipq806x/patches-5.4/0069-arm-boot-add-dts-files.patch
-@@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
- 
- --- a/arch/arm/boot/dts/Makefile
- +++ b/arch/arm/boot/dts/Makefile
--@@ -842,7 +842,24 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-+@@ -842,7 +842,25 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-  	qcom-ipq4019-ap.dk04.1-c3.dtb \
-  	qcom-ipq4019-ap.dk07.1-c1.dtb \
-  	qcom-ipq4019-ap.dk07.1-c2.dtb \
-@@ -31,6 +31,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
- +	qcom-ipq8064-wxr-2533dhp.dtb \
- +	qcom-ipq8065-nbg6817.dtb \
- +	qcom-ipq8065-r7800.dtb \
-++	qcom-ipq8065-rt4230w-rev6.dtb \
- +	qcom-ipq8068-ecw5410.dtb \
-  	qcom-msm8660-surf.dtb \
-  	qcom-msm8960-cdp.dtb \
-diff --git a/target/linux/ipq806x/patches-5.4/083-ipq8064-dtsi-additions.patch b/target/linux/ipq806x/patches-5.4/083-ipq8064-dtsi-additions.patch
-index 221ecd7396..ccfae25494 100644
---- a/target/linux/ipq806x/patches-5.4/083-ipq8064-dtsi-additions.patch
-+++ b/target/linux/ipq806x/patches-5.4/083-ipq8064-dtsi-additions.patch
-@@ -26,7 +26,7 @@
-  		};
-  
-  		cpu1: cpu@1 {
--@@ -38,11 +50,458 @@
-+@@ -38,11 +50,476 @@
-  			next-level-cache = <&L2>;
-  			qcom,acc = <&acc1>;
-  			qcom,saw = <&saw1>;
-@@ -42,19 +42,9 @@
- +			cpu-idle-states = <&CPU_SPC>;
-  		};
-  
-- 		L2: l2-cache {
-- 			compatible = "cache";
-- 			cache-level = <2>;
--+			qcom,saw = <&saw_l2>;
--+		};
--+
--+		qcom,l2 {
--+			qcom,l2-rates = <384000000 1000000000 1200000000>;
--+			qcom,l2-cpufreq = <384000000 600000000 1200000000>;
--+			qcom,l2-volt = <1100000 1100000 1150000>;
--+			qcom,l2-supply = <&smb208_s1a>;
--+		};
--+
-+-		L2: l2-cache {
-+-			compatible = "cache";
-+-			cache-level = <2>;
- +		idle-states {
- +			CPU_SPC: spc {
- +				compatible = "qcom,idle-state-spc", "arm,idle-state";
-@@ -66,6 +56,31 @@
- +		};
- +	};
- +
-++	opp_table_l2: opp_table_l2 {
-++		compatible = "operating-points-v2";
-++
-++		opp-384000000 {
-++			opp-hz = /bits/ 64 <384000000>;
-++			opp-microvolt = <1100000>;
-++			clock-latency-ns = <100000>;
-++			opp-level = <0>;
-++		};
-++
-++		opp-1000000000 {
-++			opp-hz = /bits/ 64 <1000000000>;
-++			opp-microvolt = <1100000>;
-++			clock-latency-ns = <100000>;
-++			opp-level = <1>;
-++		};
-++
-++		opp-1200000000 {
-++			opp-hz = /bits/ 64 <1200000000>;
-++			opp-microvolt = <1150000>;
-++			clock-latency-ns = <100000>;
-++			opp-level = <2>;
-++ 		};
-++ 	};
-++ 
- +	opp_table0: opp_table0 {
- +		compatible = "operating-points-v2-kryo-cpu";
- +		nvmem-cells = <&speedbin_efuse>;
-@@ -78,6 +93,7 @@
- +			opp-microvolt-speed0-pvs3-v0 = <800000>;
- +			opp-supported-hw = <0x1>;
- +			clock-latency-ns = <100000>;
-++			opp-level = <0>;
- +		};
- +
- +		opp-600000000 {
-@@ -88,6 +104,7 @@
- +			opp-microvolt-speed0-pvs3-v0 = <850000>;
- +			opp-supported-hw = <0x1>;
- +			clock-latency-ns = <100000>;
-++			opp-level = <1>;
- +		};
- +
- +		opp-800000000 {
-@@ -98,6 +115,7 @@
- +			opp-microvolt-speed0-pvs3-v0 = <900000>;
- +			opp-supported-hw = <0x1>;
- +			clock-latency-ns = <100000>;
-++			opp-level = <1>;
- +		};
- +
- +		opp-1000000000 {
-@@ -108,6 +126,7 @@
- +			opp-microvolt-speed0-pvs3-v0 = <950000>;
- +			opp-supported-hw = <0x1>;
- +			clock-latency-ns = <100000>;
-++			opp-level = <1>;
- +		};
- +
- +		opp-1200000000 {
-@@ -118,6 +137,7 @@
- +			opp-microvolt-speed0-pvs3-v0 = <1000000>;
- +			opp-supported-hw = <0x1>;
- +			clock-latency-ns = <100000>;
-++			opp-level = <1>;
- +		};
- +
- +		opp-1400000000 {
-@@ -128,6 +148,7 @@
- +			opp-microvolt-speed0-pvs3-v0 = <1050000>;
- +			opp-supported-hw = <0x1>;
- +			clock-latency-ns = <100000>;
-++			opp-level = <2>;
- +		};
- +	};
- +
-@@ -485,7 +506,7 @@
-  		};
-  	};
-  
--@@ -93,6 +552,15 @@
-+@@ -93,6 +570,15 @@
-  		};
-  	};
-  
-@@ -501,10 +522,21 @@
-  	firmware {
-  		scm {
-  			compatible = "qcom,scm-ipq806x", "qcom,scm";
--@@ -120,6 +588,84 @@
-+@@ -120,6 +606,95 @@
-  			reg-names = "lpass-lpaif";
-  		};
-  
-++		L2: l2-cache {
-++			compatible = "qcom,krait-cache", "cache";
-++			cache-level = <2>;
-++			qcom,saw = <&saw_l2>;
-++
-++			clocks = <&kraitcc 4>;
-++			clock-names = "l2";
-++			l2-supply = <&smb208_s1a>;
-++			operating-points-v2 = <&opp_table_l2>;
-++		};
-++
- +		qfprom: qfprom@700000 {
- +			compatible = "qcom,qfprom", "syscon";
- +			reg = <0x700000 0x1000>;
-@@ -586,7 +618,7 @@
-  		qcom_pinmux: pinmux@800000 {
-  			compatible = "qcom,ipq8064-pinctrl";
-  			reg = <0x800000 0x4000>;
--@@ -159,6 +705,15 @@
-+@@ -159,6 +734,15 @@
-  				};
-  			};
-  
-@@ -602,7 +634,7 @@
-  			spi_pins: spi_pins {
-  				mux {
-  					pins = "gpio18", "gpio19", "gpio21";
--@@ -168,6 +723,53 @@
-+@@ -168,6 +752,53 @@
-  				};
-  			};
-  
-@@ -656,7 +688,7 @@
-  			leds_pins: leds_pins {
-  				mux {
-  					pins = "gpio7", "gpio8", "gpio9",
--@@ -229,6 +831,17 @@
-+@@ -229,6 +860,17 @@
-  			clock-output-names = "acpu1_aux";
-  		};
-  
-@@ -674,7 +706,7 @@
-  		saw0: regulator@2089000 {
-  			compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
-  			reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
--@@ -241,6 +854,17 @@
-+@@ -241,6 +883,17 @@
-  			regulator;
-  		};
-  
-@@ -692,7 +724,7 @@
-  		gsbi2: gsbi@12480000 {
-  			compatible = "qcom,gsbi-v1.0.0";
-  			cell-index = <2>;
--@@ -436,6 +1060,15 @@
-+@@ -436,6 +1089,15 @@
-  			#power-domain-cells = <1>;
-  		};
-  
-@@ -708,7 +740,7 @@
-  		tcsr: syscon@1a400000 {
-  			compatible = "qcom,tcsr-ipq8064", "syscon";
-  			reg = <0x1a400000 0x100>;
--@@ -448,6 +1081,95 @@
-+@@ -448,6 +1110,95 @@
-  			#reset-cells = <1>;
-  		};
-  
-@@ -804,7 +836,7 @@
-  		pcie0: pci@1b500000 {
-  			compatible = "qcom,pcie-ipq8064";
-  			reg = <0x1b500000 0x1000
--@@ -601,6 +1323,167 @@
-+@@ -601,6 +1352,167 @@
-  			perst-gpio = <&qcom_pinmux 63 GPIO_ACTIVE_LOW>;
-  		};
-  
-@@ -879,7 +911,7 @@
- +
- +		gmac0: ethernet@37000000 {
- +			device_type = "network";
--+			compatible = "qcom,ipq806x-gmac";
-++			compatible = "qcom,ipq806x-gmac", "snps,dwmac";
- +			reg = <0x37000000 0x200000>;
- +			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
- +			interrupt-names = "macirq";
-@@ -902,7 +934,7 @@
- +
- +		gmac1: ethernet@37200000 {
- +			device_type = "network";
--+			compatible = "qcom,ipq806x-gmac";
-++			compatible = "qcom,ipq806x-gmac", "snps,dwmac";
- +			reg = <0x37200000 0x200000>;
- +			interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
- +			interrupt-names = "macirq";
-@@ -972,7 +1004,7 @@
-  		vsdcc_fixed: vsdcc-regulator {
-  			compatible = "regulator-fixed";
-  			regulator-name = "SDCC Power";
--@@ -676,4 +1559,17 @@
-+@@ -676,4 +1588,17 @@
-  			};
-  		};
-  	};
-diff --git a/target/linux/ipq806x/patches-5.4/093-drivers-cpufreq-qcom-cpufreq-nvmem-support-specific-.patch b/target/linux/ipq806x/patches-5.4/093-drivers-cpufreq-qcom-cpufreq-nvmem-support-specific-.patch
-new file mode 100644
-index 0000000000..19c3d096c4
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.4/093-drivers-cpufreq-qcom-cpufreq-nvmem-support-specific-.patch
-@@ -0,0 +1,51 @@
-+From a206d4061f1cc2c5cd17ee45c53a0ba711e48e6d Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Sun, 7 Feb 2021 16:42:52 +0100
-+Subject: [PATCH 3/3] drivers: cpufreq: qcom-cpufreq-nvmem: support specific
-+ cpufreq driver
-+
-+Add support for specific cpufreq driver for qcom-cpufreq-nvmem driver.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+---
-+ drivers/cpufreq/qcom-cpufreq-nvmem.c | 15 +++++++++++++++
-+ 1 file changed, 15 insertions(+)
-+
-+--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
-++++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
-+@@ -52,6 +52,7 @@ struct qcom_cpufreq_match_data {
-+ 			   char **pvs_name,
-+ 			   struct qcom_cpufreq_drv *drv);
-+ 	const char **genpd_names;
-++	const char *cpufreq_driver;
-+ };
-+ 
-+ struct qcom_cpufreq_drv {
-+@@ -250,6 +251,7 @@ static const struct qcom_cpufreq_match_d
-+ 
-+ static const struct qcom_cpufreq_match_data match_data_krait = {
-+ 	.get_version = qcom_cpufreq_krait_name_version,
-++	.cpufreq_driver = "krait-cpufreq",
-+ };
-+ 
-+ static const char *qcs404_genpd_names[] = { "cpr", NULL };
-+@@ -385,6 +387,19 @@ static int qcom_cpufreq_probe(struct pla
-+ 		}
-+ 	}
-+ 
-++	if (drv->data->cpufreq_driver) {
-++		cpufreq_dt_pdev = platform_device_register_simple(
-++			drv->data->cpufreq_driver, -1, NULL, 0);
-++		if (!IS_ERR(cpufreq_dt_pdev)) {
-++			platform_set_drvdata(pdev, drv);
-++			return 0;
-++		} else {
-++			dev_err(cpu_dev,
-++				"Failed to register dedicated %s cpufreq\n",
-++				drv->data->cpufreq_driver);
-++		}
-++	}
-++
-+ 	cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
-+ 							  NULL, 0);
-+ 	if (!IS_ERR(cpufreq_dt_pdev)) {
-diff --git a/target/linux/ipq806x/patches-5.4/098-1-cpufreq-add-Krait-dedicated-scaling-driver.patch b/target/linux/ipq806x/patches-5.4/098-1-cpufreq-add-Krait-dedicated-scaling-driver.patch
-new file mode 100644
-index 0000000000..d6711105da
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.4/098-1-cpufreq-add-Krait-dedicated-scaling-driver.patch
-@@ -0,0 +1,681 @@
-+From cc41a266280cad0b55319e614167c88dff344248 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Sat, 22 Feb 2020 16:33:10 +0100
-+Subject: [PATCH 1/8] cpufreq: add Krait dedicated scaling driver
-+
-+This new driver is based on generic cpufreq-dt driver.
-+Krait SoCs have 2-4 cpu and one shared L2 cache that can
-+operate at different frequency based on the maximum cpu clk
-+across all core.
-+L2 frequency and voltage are scaled on every frequency change
-+if needed. On Krait SoCs is present a bug that can cause
-+transition problem between frequency bin, to workaround this
-+on more than one transition, the L2 frequency is first set to the
-+base rate and then to the target rate.
-+The L2 frequency use the OPP framework and use the opp-level
-+bindings to link the l2 freq to different cpu freq. This is needed
-+as the Krait l2 clk are note mapped 1:1 to the core clks and some
-+of the l2 clk is set based on a range of the cpu clks. If the driver
-+find a broken config (for example no opp-level set) the l2 scaling is
-+skipped.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+---
-+ drivers/cpufreq/Kconfig.arm          |  14 +-
-+ drivers/cpufreq/Makefile             |   2 +
-+ drivers/cpufreq/qcom-cpufreq-krait.c | 589 +++++++++++++++++++++++++++
-+ 3 files changed, 604 insertions(+), 1 deletion(-)
-+ create mode 100644 drivers/cpufreq/qcom-cpufreq-krait.c
-+
-+--- a/drivers/cpufreq/Kconfig.arm
-++++ b/drivers/cpufreq/Kconfig.arm
-+@@ -155,6 +155,18 @@ config ARM_QCOM_CPUFREQ_HW
-+ 	  The driver implements the cpufreq interface for this HW engine.
-+ 	  Say Y if you want to support CPUFreq HW.
-+ 
-++config ARM_QCOM_CPUFREQ_KRAIT
-++	tristate "CPU Frequency scaling support for Krait SoCs"
-++	depends on ARCH_QCOM || COMPILE_TEST
-++	select PM_OPP
-++	select ARM_QCOM_CPUFREQ_NVMEM
-++	help
-++	  This adds the CPUFreq driver for Qualcomm Krait SoC based boards.
-++	  This scale the cache clk and regulator based on the different cpu
-++	  clks when scaling the different cores clk.
-++
-++	  If in doubt, say N.
-++
-+ config ARM_RASPBERRYPI_CPUFREQ
-+ 	tristate "Raspberry Pi cpufreq support"
-+ 	depends on CLK_RASPBERRYPI || COMPILE_TEST
-+@@ -338,4 +350,4 @@ config ARM_PXA2xx_CPUFREQ
-+ 	help
-+ 	  This add the CPUFreq driver support for Intel PXA2xx SOCs.
-+ 
-+-	  If in doubt, say N.
-++	  If in doubt, say N.
-+\ No newline at end of file
-+--- a/drivers/cpufreq/Makefile
-++++ b/drivers/cpufreq/Makefile
-+@@ -65,6 +65,7 @@ obj-$(CONFIG_ARM_PXA2xx_CPUFREQ)	+= pxa2
-+ obj-$(CONFIG_PXA3xx)			+= pxa3xx-cpufreq.o
-+ obj-$(CONFIG_ARM_QCOM_CPUFREQ_HW)	+= qcom-cpufreq-hw.o
-+ obj-$(CONFIG_ARM_QCOM_CPUFREQ_NVMEM)	+= qcom-cpufreq-nvmem.o
-++obj-$(CONFIG_ARM_QCOM_CPUFREQ_KRAIT)	+= qcom-cpufreq-krait.o
-+ obj-$(CONFIG_ARM_RASPBERRYPI_CPUFREQ) 	+= raspberrypi-cpufreq.o
-+ obj-$(CONFIG_ARM_S3C2410_CPUFREQ)	+= s3c2410-cpufreq.o
-+ obj-$(CONFIG_ARM_S3C2412_CPUFREQ)	+= s3c2412-cpufreq.o
-+@@ -87,6 +88,7 @@ obj-$(CONFIG_ARM_TEGRA124_CPUFREQ)	+= te
-+ obj-$(CONFIG_ARM_TEGRA186_CPUFREQ)	+= tegra186-cpufreq.o
-+ obj-$(CONFIG_ARM_TI_CPUFREQ)		+= ti-cpufreq.o
-+ obj-$(CONFIG_ARM_VEXPRESS_SPC_CPUFREQ)	+= vexpress-spc-cpufreq.o
-++obj-$(CONFIG_ARM_KRAIT_CPUFREQ)		+= krait-cpufreq.o
-+ 
-+ 
-+ ##################################################################################
-+--- /dev/null
-++++ b/drivers/cpufreq/qcom-cpufreq-krait.c
-+@@ -0,0 +1,603 @@
-++// SPDX-License-Identifier: GPL-2.0
-++
-++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-++
-++#include <linux/clk.h>
-++#include <linux/cpu.h>
-++#include <linux/cpufreq.h>
-++#include <linux/cpumask.h>
-++#include <linux/err.h>
-++#include <linux/module.h>
-++#include <linux/of.h>
-++#include <linux/of_device.h>
-++#include <linux/pm_opp.h>
-++#include <linux/platform_device.h>
-++#include <linux/regulator/consumer.h>
-++#include <linux/slab.h>
-++#include <linux/thermal.h>
-++
-++#include "cpufreq-dt.h"
-++
-++static struct platform_device *l2_pdev;
-++
-++struct private_data {
-++	struct opp_table *opp_table;
-++	struct device *cpu_dev;
-++	const char *reg_name;
-++	bool have_static_opps;
-++};
-++
-++static int set_target(struct cpufreq_policy *policy, unsigned int index)
-++{
-++	struct private_data *priv = policy->driver_data;
-++	unsigned long freq = policy->freq_table[index].frequency;
-++	unsigned long target_freq = freq * 1000;
-++	struct dev_pm_opp *opp;
-++	unsigned int level;
-++	int cpu, ret;
-++
-++	if (l2_pdev) {
-++		int policy_cpu = policy->cpu;
-++
-++		/* find the max freq across all core */
-++		for_each_present_cpu(cpu)
-++			if (cpu != policy_cpu)
-++				target_freq = max(
-++					target_freq,
-++					(unsigned long)cpufreq_quick_get(cpu));
-++
-++		opp = dev_pm_opp_find_freq_exact(priv->cpu_dev, target_freq,
-++						 true);
-++		if (IS_ERR(opp)) {
-++			dev_err(&l2_pdev->dev, "failed to find OPP for %ld\n",
-++				target_freq);
-++			return PTR_ERR(opp);
-++		}
-++		level = dev_pm_opp_get_level(opp);
-++		dev_pm_opp_put(opp);
-++
-++		/*
-++		 * Hardware constraint:
-++		 * Krait CPU cannot operate at 384MHz with L2 at 1Ghz.
-++		 * Assume index 0 with the idle freq and level > 0 as 
-++		 * any L2 freq > 384MHz.
-++		 * Skip CPU freq change in this corner case.
-++		 */
-++		if (unlikely(index == 0 && level != 0)) {
-++			dev_err(priv->cpu_dev, "Krait CPU can't operate at idle freq with L2 at 1GHz");
-++			return -EINVAL;
-++		}
-++
-++		opp = dev_pm_opp_find_level_exact(&l2_pdev->dev, level);
-++		if (IS_ERR(opp)) {
-++			dev_err(&l2_pdev->dev,
-++				"failed to find level OPP for %d\n", level);
-++			return PTR_ERR(opp);
-++		}
-++		target_freq = dev_pm_opp_get_freq(opp);
-++		dev_pm_opp_put(opp);
-++
-++		ret = dev_pm_opp_set_rate(&l2_pdev->dev, target_freq);
-++		if (ret)
-++			return ret;
-++	}
-++
-++	ret = dev_pm_opp_set_rate(priv->cpu_dev, freq * 1000);
-++	if (ret)
-++		return ret;
-++
-++	arch_set_freq_scale(policy->related_cpus, freq,
-++			    policy->cpuinfo.max_freq);
-++
-++	return 0;
-++}
-++
-++/*
-++ * An earlier version of opp-v1 bindings used to name the regulator
-++ * "cpu0-supply", we still need to handle that for backwards compatibility.
-++ */
-++static const char *find_supply_name(struct device *dev)
-++{
-++	struct device_node *np;
-++	struct property *pp;
-++	int cpu = dev->id;
-++	const char *name = NULL;
-++
-++	np = of_node_get(dev->of_node);
-++
-++	/* This must be valid for sure */
-++	if (WARN_ON(!np))
-++		return NULL;
-++
-++	/* Try "cpu0" for older DTs */
-++	if (!cpu) {
-++		pp = of_find_property(np, "cpu0-supply", NULL);
-++		if (pp) {
-++			name = "cpu0";
-++			goto node_put;
-++		}
-++	}
-++
-++	pp = of_find_property(np, "cpu-supply", NULL);
-++	if (pp) {
-++		name = "cpu";
-++		goto node_put;
-++	}
-++
-++	dev_dbg(dev, "no regulator for cpu%d\n", cpu);
-++node_put:
-++	of_node_put(np);
-++	return name;
-++}
-++
-++static int resources_available(void)
-++{
-++	struct device *cpu_dev;
-++	struct regulator *cpu_reg;
-++	struct clk *cpu_clk;
-++	int ret = 0;
-++	const char *name;
-++
-++	cpu_dev = get_cpu_device(0);
-++	if (!cpu_dev) {
-++		pr_err("failed to get cpu0 device\n");
-++		return -ENODEV;
-++	}
-++
-++	cpu_clk = clk_get(cpu_dev, NULL);
-++	ret = PTR_ERR_OR_ZERO(cpu_clk);
-++	if (ret) {
-++		/*
-++		 * If cpu's clk node is present, but clock is not yet
-++		 * registered, we should try defering probe.
-++		 */
-++		if (ret == -EPROBE_DEFER)
-++			dev_dbg(cpu_dev, "clock not ready, retry\n");
-++		else
-++			dev_err(cpu_dev, "failed to get clock: %d\n", ret);
-++
-++		return ret;
-++	}
-++
-++	clk_put(cpu_clk);
-++
-++	name = find_supply_name(cpu_dev);
-++	/* Platform doesn't require regulator */
-++	if (!name)
-++		return 0;
-++
-++	cpu_reg = regulator_get_optional(cpu_dev, name);
-++	ret = PTR_ERR_OR_ZERO(cpu_reg);
-++	if (ret) {
-++		/*
-++		 * If cpu's regulator supply node is present, but regulator is
-++		 * not yet registered, we should try defering probe.
-++		 */
-++		if (ret == -EPROBE_DEFER)
-++			dev_dbg(cpu_dev, "cpu0 regulator not ready, retry\n");
-++		else
-++			dev_dbg(cpu_dev, "no regulator for cpu0: %d\n", ret);
-++
-++		return ret;
-++	}
-++
-++	regulator_put(cpu_reg);
-++	return 0;
-++}
-++
-++static int cpufreq_init(struct cpufreq_policy *policy)
-++{
-++	struct cpufreq_frequency_table *freq_table;
-++	struct opp_table *opp_table = NULL;
-++	unsigned int transition_latency;
-++	struct private_data *priv;
-++	struct device *cpu_dev;
-++	bool fallback = false;
-++	struct clk *cpu_clk;
-++	const char *name;
-++	int ret;
-++
-++	cpu_dev = get_cpu_device(policy->cpu);
-++	if (!cpu_dev) {
-++		pr_err("failed to get cpu%d device\n", policy->cpu);
-++		return -ENODEV;
-++	}
-++
-++	cpu_clk = clk_get(cpu_dev, NULL);
-++	if (IS_ERR(cpu_clk)) {
-++		ret = PTR_ERR(cpu_clk);
-++		dev_err(cpu_dev, "%s: failed to get clk: %d\n", __func__, ret);
-++		return ret;
-++	}
-++
-++	/* Get OPP-sharing information from "operating-points-v2" bindings */
-++	ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, policy->cpus);
-++	if (ret) {
-++		if (ret != -ENOENT)
-++			goto out_put_clk;
-++
-++		/*
-++		 * operating-points-v2 not supported, fallback to old method of
-++		 * finding shared-OPPs for backward compatibility if the
-++		 * platform hasn't set sharing CPUs.
-++		 */
-++		if (dev_pm_opp_get_sharing_cpus(cpu_dev, policy->cpus))
-++			fallback = true;
-++	}
-++
-++	/*
-++	 * OPP layer will be taking care of regulators now, but it needs to know
-++	 * the name of the regulator first.
-++	 */
-++	name = find_supply_name(cpu_dev);
-++	if (name) {
-++		opp_table = dev_pm_opp_set_regulators(cpu_dev, &name, 1);
-++		if (IS_ERR(opp_table)) {
-++			ret = PTR_ERR(opp_table);
-++			dev_err(cpu_dev,
-++				"Failed to set regulator for cpu%d: %d\n",
-++				policy->cpu, ret);
-++			goto out_put_clk;
-++		}
-++	}
-++
-++	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
-++	if (!priv) {
-++		ret = -ENOMEM;
-++		goto out_put_regulator;
-++	}
-++
-++	priv->reg_name = name;
-++	priv->opp_table = opp_table;
-++
-++	/*
-++	 * Initialize OPP tables for all policy->cpus. They will be shared by
-++	 * all CPUs which have marked their CPUs shared with OPP bindings.
-++	 *
-++	 * For platforms not using operating-points-v2 bindings, we do this
-++	 * before updating policy->cpus. Otherwise, we will end up creating
-++	 * duplicate OPPs for policy->cpus.
-++	 *
-++	 * OPPs might be populated at runtime, don't check for error here
-++	 */
-++	if (!dev_pm_opp_of_cpumask_add_table(policy->cpus))
-++		priv->have_static_opps = true;
-++
-++	/*
-++	 * But we need OPP table to function so if it is not there let's
-++	 * give platform code chance to provide it for us.
-++	 */
-++	ret = dev_pm_opp_get_opp_count(cpu_dev);
-++	if (ret <= 0) {
-++		dev_dbg(cpu_dev, "OPP table is not ready, deferring probe\n");
-++		ret = -EPROBE_DEFER;
-++		goto out_free_opp;
-++	}
-++
-++	if (fallback) {
-++		cpumask_setall(policy->cpus);
-++
-++		/*
-++		 * OPP tables are initialized only for policy->cpu, do it for
-++		 * others as well.
-++		 */
-++		ret = dev_pm_opp_set_sharing_cpus(cpu_dev, policy->cpus);
-++		if (ret)
-++			dev_err(cpu_dev,
-++				"%s: failed to mark OPPs as shared: %d\n",
-++				__func__, ret);
-++	}
-++
-++	ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
-++	if (ret) {
-++		dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret);
-++		goto out_free_opp;
-++	}
-++
-++	priv->cpu_dev = cpu_dev;
-++
-++	policy->driver_data = priv;
-++	policy->clk = cpu_clk;
-++	policy->freq_table = freq_table;
-++
-++	policy->suspend_freq = dev_pm_opp_get_suspend_opp_freq(cpu_dev) / 1000;
-++
-++	transition_latency = dev_pm_opp_get_max_transition_latency(cpu_dev);
-++	if (!transition_latency)
-++		transition_latency = CPUFREQ_ETERNAL;
-++
-++	policy->cpuinfo.transition_latency = transition_latency;
-++	policy->dvfs_possible_from_any_cpu = true;
-++
-++	dev_pm_opp_of_register_em(policy->cpus);
-++
-++	return 0;
-++
-++out_free_opp:
-++	if (priv->have_static_opps)
-++		dev_pm_opp_of_cpumask_remove_table(policy->cpus);
-++	kfree(priv);
-++out_put_regulator:
-++	if (name)
-++		dev_pm_opp_put_regulators(opp_table);
-++out_put_clk:
-++	clk_put(cpu_clk);
-++
-++	return ret;
-++}
-++
-++static int cpufreq_online(struct cpufreq_policy *policy)
-++{
-++	/* We did light-weight tear down earlier, nothing to do here */
-++	return 0;
-++}
-++
-++static int cpufreq_offline(struct cpufreq_policy *policy)
-++{
-++	/*
-++	 * Preserve policy->driver_data and don't free resources on light-weight
-++	 * tear down.
-++	 */
-++	return 0;
-++}
-++
-++static int cpufreq_exit(struct cpufreq_policy *policy)
-++{
-++	struct private_data *priv = policy->driver_data;
-++
-++	dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table);
-++	if (priv->have_static_opps)
-++		dev_pm_opp_of_cpumask_remove_table(policy->related_cpus);
-++	if (priv->reg_name)
-++		dev_pm_opp_put_regulators(priv->opp_table);
-++
-++	clk_put(policy->clk);
-++	kfree(priv);
-++
-++	return 0;
-++}
-++
-++static struct cpufreq_driver krait_cpufreq_driver = {
-++	.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK |
-++		 CPUFREQ_IS_COOLING_DEV,
-++	.verify = cpufreq_generic_frequency_table_verify,
-++	.target_index = set_target,
-++	.get = cpufreq_generic_get,
-++	.init = cpufreq_init,
-++	.exit = cpufreq_exit,
-++	.online = cpufreq_online,
-++	.offline = cpufreq_offline,
-++	.name = "krait-cpufreq",
-++	.suspend = cpufreq_generic_suspend,
-++};
-++
-++struct krait_data {
-++	unsigned long idle_freq;
-++	bool regulator_enabled;
-++};
-++
-++static int krait_cache_set_opp(struct dev_pm_set_opp_data *data)
-++{
-++	unsigned long old_freq = data->old_opp.rate, freq = data->new_opp.rate;
-++	struct dev_pm_opp_supply *supply = &data->new_opp.supplies[0];
-++	struct regulator *reg = data->regulators[0];
-++	struct clk *clk = data->clk;
-++	struct krait_data *kdata;
-++	unsigned long idle_freq;
-++	int ret;
-++
-++	kdata = (struct krait_data *)dev_get_drvdata(data->dev);
-++	idle_freq = kdata->idle_freq;
-++
-++	/* Scaling up? Scale voltage before frequency */
-++	if (freq >= old_freq) {
-++		ret = regulator_set_voltage_triplet(reg, supply->u_volt_min,
-++						    supply->u_volt,
-++						    supply->u_volt_max);
-++		if (ret)
-++			goto exit;
-++	}
-++
-++	/*
-++	 * Set to idle bin if switching from normal to high bin
-++	 * or vice versa. It has been notice that a bug is triggered
-++	 * in cache scaling when more than one bin is scaled, to fix
-++	 * this we first need to transition to the base rate and then
-++	 * to target rate
-++	 */
-++	if (likely(freq != idle_freq && old_freq != idle_freq)) {
-++		ret = clk_set_rate(clk, idle_freq);
-++		if (ret)
-++			goto exit;
-++	}
-++
-++	ret = clk_set_rate(clk, freq);
-++	if (ret)
-++		goto exit;
-++
-++	/* Scaling down? Scale voltage after frequency */
-++	if (freq < old_freq) {
-++		ret = regulator_set_voltage_triplet(reg, supply->u_volt_min,
-++						    supply->u_volt,
-++						    supply->u_volt_max);
-++	}
-++
-++	if (unlikely(!kdata->regulator_enabled)) {
-++		ret = regulator_enable(reg);
-++		if (ret < 0)
-++			dev_warn(data->dev, "Failed to enable regulator: %d", ret);
-++		else
-++			kdata->regulator_enabled = true;
-++	}
-++
-++exit:
-++	return ret;
-++};
-++
-++static int krait_cache_probe(struct platform_device *pdev)
-++{
-++	struct device *dev = &pdev->dev;
-++	struct krait_data *data;
-++	struct opp_table *table;
-++	struct dev_pm_opp *opp;
-++	struct device *cpu_dev;
-++	int ret;
-++
-++	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
-++	if (!data)
-++		return -ENOMEM;
-++
-++	table = dev_pm_opp_set_regulators(dev, (const char *[]){ "l2" }, 1);
-++	if (IS_ERR(table)) {
-++		ret = PTR_ERR(table);
-++		if (ret != -EPROBE_DEFER)
-++			dev_err(dev, "failed to set regulators %d\n", ret);
-++
-++		return ret;
-++	}
-++
-++	ret = PTR_ERR_OR_ZERO(
-++		dev_pm_opp_register_set_opp_helper(dev, krait_cache_set_opp));
-++	if (ret)
-++		return ret;
-++
-++	ret = dev_pm_opp_of_add_table(dev);
-++	if (ret) {
-++		dev_err(dev, "failed to parse L2 freq thresholds\n");
-++		return ret;
-++	}
-++
-++	opp = dev_pm_opp_find_freq_ceil(dev, &data->idle_freq);
-++	dev_pm_opp_put(opp);
-++
-++	/*
-++	 * Check opp-level configuration
-++	 * At least 2 level must be set or the cache will always be scaled
-++	 * the idle freq causing some performance problem
-++	 *
-++	 * In case of invalid configuration, the l2 scaling is skipped
-++	 */
-++	cpu_dev = get_cpu_device(0);
-++	if (!cpu_dev) {
-++		pr_err("failed to get cpu0 device\n");
-++		return -ENODEV;
-++	}
-++
-++	/*
-++	 * Check if we have at least opp-level 1, 0 should always be set to
-++	 * the idle freq
-++	 */
-++	opp = dev_pm_opp_find_level_exact(dev, 1);
-++	if (IS_ERR(opp)) {
-++		dev_err(dev,
-++			"Invalid configuration found of l2 opp. Can't find opp-level 1");
-++		goto invalid_conf;
-++	}
-++	dev_pm_opp_put(opp);
-++
-++	/*
-++	 * Check if we have at least opp-level 1 in the cpu opp, 0 should always
-++	 * be set to the idle freq
-++	 */
-++	opp = dev_pm_opp_find_level_exact(cpu_dev, 1);
-++	if (IS_ERR(opp)) {
-++		dev_err(dev,
-++			"Invalid configuration found of cpu opp. Can't find opp-level 1");
-++		goto invalid_conf;
-++	}
-++	dev_pm_opp_put(opp);
-++
-++	platform_set_drvdata(pdev, data);
-++
-++	/* The l2 scaling is enabled by linking the cpufreq driver */
-++	l2_pdev = pdev;
-++
-++	return 0;
-++
-++invalid_conf:
-++	dev_pm_opp_remove_table(dev);
-++	dev_pm_opp_put_regulators(table);
-++	dev_pm_opp_unregister_set_opp_helper(table);
-++
-++	return -EINVAL;
-++};
-++
-++static int krait_cache_remove(struct platform_device *pdev)
-++{
-++	struct device *dev = &pdev->dev;
-++	struct opp_table *table = dev_pm_opp_get_opp_table(dev);
-++
-++	dev_pm_opp_remove_table(dev);
-++	dev_pm_opp_put_regulators(table);
-++	dev_pm_opp_unregister_set_opp_helper(table);
-++
-++	return 0;
-++};
-++
-++static const struct of_device_id krait_cache_match_table[] = {
-++	{ .compatible = "qcom,krait-cache" },
-++	{}
-++};
-++
-++static struct platform_driver krait_cache_driver = {
-++	.driver = {
-++		.name	= "krait-cache",
-++		.of_match_table = krait_cache_match_table,
-++	},
-++	.probe		= krait_cache_probe,
-++	.remove		= krait_cache_remove,
-++};
-++module_platform_driver(krait_cache_driver);
-++
-++static int krait_cpufreq_probe(struct platform_device *pdev)
-++{
-++	struct cpufreq_dt_platform_data *data = dev_get_platdata(&pdev->dev);
-++	int ret;
-++
-++	/*
-++	 * All per-cluster (CPUs sharing clock/voltages) initialization is done
-++	 * from ->init(). In probe(), we just need to make sure that clk and
-++	 * regulators are available. Else defer probe and retry.
-++	 *
-++	 * FIXME: Is checking this only for CPU0 sufficient ?
-++	 */
-++	ret = resources_available();
-++	if (ret)
-++		return ret;
-++
-++	if (data) {
-++		if (data->have_governor_per_policy)
-++			krait_cpufreq_driver.flags |=
-++				CPUFREQ_HAVE_GOVERNOR_PER_POLICY;
-++
-++		krait_cpufreq_driver.resume = data->resume;
-++		if (data->suspend)
-++			krait_cpufreq_driver.suspend = data->suspend;
-++	}
-++
-++	ret = cpufreq_register_driver(&krait_cpufreq_driver);
-++	if (ret)
-++		dev_err(&pdev->dev, "failed register driver: %d\n", ret);
-++
-++	return ret;
-++}
-++
-++static int krait_cpufreq_remove(struct platform_device *pdev)
-++{
-++	cpufreq_unregister_driver(&krait_cpufreq_driver);
-++	return 0;
-++}
-++
-++static struct platform_driver krait_cpufreq_platdrv = {
-++	.driver = {
-++		.name	= "krait-cpufreq",
-++	},
-++	.probe		= krait_cpufreq_probe,
-++	.remove		= krait_cpufreq_remove,
-++};
-++module_platform_driver(krait_cpufreq_platdrv);
-++
-++MODULE_ALIAS("platform:krait-cpufreq");
-++MODULE_AUTHOR("Ansuel Smith <ansuelsmth@gmail.com>");
-++MODULE_DESCRIPTION("Dedicated Krait SoC cpufreq driver");
-++MODULE_LICENSE("GPL");
-diff --git a/target/linux/ipq806x/patches-5.4/098-2-Documentation-cpufreq-add-qcom-krait-cpufreq-binding.patch b/target/linux/ipq806x/patches-5.4/098-2-Documentation-cpufreq-add-qcom-krait-cpufreq-binding.patch
-new file mode 100644
-index 0000000000..316e18b790
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.4/098-2-Documentation-cpufreq-add-qcom-krait-cpufreq-binding.patch
-@@ -0,0 +1,237 @@
-+From c9ecd920324a647bf1f2b47f771c8f599cc7b551 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Sat, 22 Feb 2020 18:02:17 +0100
-+Subject: [PATCH 2/8] Documentation: cpufreq: add qcom,krait-cache bindings
-+
-+Document dedicated cpufreq for Krait CPUs.
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+---
-+ .../bindings/cpufreq/qcom-cpufreq-krait.yaml  | 221 ++++++++++++++++++
-+ 1 file changed, 221 insertions(+)
-+ create mode 100644 Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-krait.yaml
-+
-+--- /dev/null
-++++ b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-krait.yaml
-+@@ -0,0 +1,221 @@
-++# SPDX-License-Identifier: GPL-2.0
-++%YAML 1.2
-++---
-++$id: http://devicetree.org/schemas/cpufreq/qcom-cpufreq-krait.yaml#
-++$schema: http://devicetree.org/meta-schemas/core.yaml#
-++
-++title: CPU Frequency scaling driver for Krait SoCs
-++
-++maintainers:
-++  - Ansuel Smith <ansuelsmth@gmail.com>
-++
-++description: |
-++  The krait cpufreq driver is a dedicated frequency scaling driver
-++  based on cpufreq-dt generic driver that scale L2 cache and the
-++  cores. TEST
-++
-++  The L2 cache is scaled based on the max clk across all cores and
-++  the clock is decided based on the opp-level set in the device tree.
-++
-++  Different core freq can be linked to a specific l2 freq and the driver
-++  on frequency change will scale the core and the l2 clk based of the 
-++  linked freq.
-++
-++  On Krait SoC is present a bug and on every L2 clk change the driver
-++  needs to set the clk to the idle freq before changing it to the new value.
-++
-++  This requires the qcom cpufreq nvmem driver to parse the different opp
-++  core clk and an additional opp table for the l2 scaling.
-++
-++  If the driver detect broken config (for example missing opp-level) the
-++  cpufreq driver skips the l2 scaling
-++
-++  Referring to this example opp-level can be used to link a range of cpu freq
-++  to a specific l2 freq:
-++    cpu opp freq 384000000 has opp-level 0
-++    l2 opp freq 384000000 has opp-level 0
-++    The driver will scale l2 to 384000000
-++
-++    cpu opp freq 600000000-1000000000 has opp-level 1
-++    l2 opp freq 1000000000 has opp-level 1
-++    The driver will scale l2 to 1000000000
-++
-++allOf:
-++  - $ref: /schemas/cache-controller.yaml#
-++
-++select:
-++  properties:
-++    compatible:
-++      items:
-++        - enum:
-++            - qcom,krait-cache
-++
-++  required:
-++    - compatible
-++
-++properties:
-++  compatible:
-++    items:
-++      - const: qcom,krait-cache
-++      - const: cache
-++
-++  cache-level:
-++    const: 2
-++
-++  clocks:
-++    maxItems: 1
-++
-++  clock-names:
-++    const: l2
-++
-++  l2-supply: true
-++
-++  operating-points-v2: true
-++
-++required:
-++  - compatible
-++  - cache-level
-++  - clocks
-++  - clock-names
-++  - l2-supply
-++  - operating-points-v2
-++
-++additionalProperties: false
-++
-++examples:
-++  - |
-++    cpus {
-++      #address-cells = <1>;
-++      #size-cells = <0>;
-++
-++      cpu0: cpu@0 {
-++        compatible = "qcom,krait";
-++        enable-method = "qcom,kpss-acc-v1";
-++        device_type = "cpu";
-++        reg = <0>;
-++        next-level-cache = <&L2>;
-++        qcom,acc = <&acc0>;
-++        qcom,saw = <&saw0>;
-++        clocks = <&kraitcc 0>, <&kraitcc 4>;
-++        clock-names = "cpu", "l2";
-++        clock-latency = <100000>;
-++        cpu-supply = <&smb208_s2a>;
-++        operating-points-v2 = <&opp_table0>;
-++        voltage-tolerance = <5>;
-++        cooling-min-state = <0>;
-++        cooling-max-state = <10>;
-++        #cooling-cells = <2>;
-++        cpu-idle-states = <&CPU_SPC>;
-++      };
-++
-++      /* ... */
-++
-++    };
-++
-++    opp_table0: opp_table0 {
-++      compatible = "operating-points-v2-kryo-cpu";
-++      nvmem-cells = <&speedbin_efuse>;
-++
-++      opp-384000000 {
-++        opp-hz = /bits/ 64 <384000000>;
-++        opp-microvolt-speed0-pvs0-v0 = <1000000>;
-++        opp-microvolt-speed0-pvs1-v0 = <925000>;
-++        opp-microvolt-speed0-pvs2-v0 = <875000>;
-++        opp-microvolt-speed0-pvs3-v0 = <800000>;
-++        opp-supported-hw = <0x1>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <0>;
-++      };
-++
-++      opp-600000000 {
-++        opp-hz = /bits/ 64 <600000000>;
-++        opp-microvolt-speed0-pvs0-v0 = <1050000>;
-++        opp-microvolt-speed0-pvs1-v0 = <975000>;
-++        opp-microvolt-speed0-pvs2-v0 = <925000>;
-++        opp-microvolt-speed0-pvs3-v0 = <850000>;
-++        opp-supported-hw = <0x1>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <1>;
-++      };
-++
-++      opp-800000000 {
-++        opp-hz = /bits/ 64 <800000000>;
-++        opp-microvolt-speed0-pvs0-v0 = <1100000>;
-++        opp-microvolt-speed0-pvs1-v0 = <1025000>;
-++        opp-microvolt-speed0-pvs2-v0 = <995000>;
-++        opp-microvolt-speed0-pvs3-v0 = <900000>;
-++        opp-supported-hw = <0x1>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <1>;
-++      };
-++
-++      opp-1000000000 {
-++        opp-hz = /bits/ 64 <1000000000>;
-++        opp-microvolt-speed0-pvs0-v0 = <1150000>;
-++        opp-microvolt-speed0-pvs1-v0 = <1075000>;
-++        opp-microvolt-speed0-pvs2-v0 = <1025000>;
-++        opp-microvolt-speed0-pvs3-v0 = <950000>;
-++        opp-supported-hw = <0x1>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <1>;
-++      };
-++
-++      opp-1200000000 {
-++        opp-hz = /bits/ 64 <1200000000>;
-++        opp-microvolt-speed0-pvs0-v0 = <1200000>;
-++        opp-microvolt-speed0-pvs1-v0 = <1125000>;
-++        opp-microvolt-speed0-pvs2-v0 = <1075000>;
-++        opp-microvolt-speed0-pvs3-v0 = <1000000>;
-++        opp-supported-hw = <0x1>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <2>;
-++      };
-++
-++      opp-1400000000 {
-++        opp-hz = /bits/ 64 <1400000000>;
-++        opp-microvolt-speed0-pvs0-v0 = <1250000>;
-++        opp-microvolt-speed0-pvs1-v0 = <1175000>;
-++        opp-microvolt-speed0-pvs2-v0 = <1125000>;
-++        opp-microvolt-speed0-pvs3-v0 = <1050000>;
-++        opp-supported-hw = <0x1>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <2>;
-++      };
-++    };
-++
-++    opp_table_l2: opp_table_l2 {
-++      compatible = "operating-points-v2";
-++
-++      opp-384000000 {
-++        opp-hz = /bits/ 64 <384000000>;
-++        opp-microvolt = <1100000>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <0>;
-++      };
-++      opp-1000000000 {
-++        opp-hz = /bits/ 64 <1000000000>;
-++        opp-microvolt = <1100000>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <1>;
-++      };
-++      opp-1200000000 {
-++        opp-hz = /bits/ 64 <1200000000>;
-++        opp-microvolt = <1150000>;
-++        clock-latency-ns = <100000>;
-++        opp-level = <2>;
-++      };
-++    };
-++
-++    soc {
-++      L2: l2-cache {
-++        compatible = "qcom,krait-cache", "cache";
-++        cache-level = <2>;
-++
-++        clocks = <&kraitcc 4>;
-++        clock-names = "l2";
-++        l2-supply = <&smb208_s1a>;
-++        operating-points-v2 = <&opp_table_l2>;
-++      };
-++    };
-++
-++...
-diff --git a/target/linux/ipq806x/patches-5.4/098-3-add-fab-scaling-support-with-cpufreq.patch b/target/linux/ipq806x/patches-5.4/098-3-add-fab-scaling-support-with-cpufreq.patch
-new file mode 100644
-index 0000000000..8ce3f062cf
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.4/098-3-add-fab-scaling-support-with-cpufreq.patch
-@@ -0,0 +1,243 @@
-+--- a/drivers/clk/qcom/Makefile
-++++ b/drivers/clk/qcom/Makefile
-+@@ -15,6 +15,7 @@ clk-qcom-$(CONFIG_KRAIT_CLOCKS) += clk-k
-+ clk-qcom-y += clk-hfpll.o
-+ clk-qcom-y += reset.o
-+ clk-qcom-$(CONFIG_QCOM_GDSC) += gdsc.o
-++clk-qcom-y += fab_scaling.o
-+ 
-+ # Keep alphabetically sorted by config
-+ obj-$(CONFIG_APQ_GCC_8084) += gcc-apq8084.o
-+--- /dev/null
-++++ b/drivers/clk/qcom/fab_scaling.c
-+@@ -0,0 +1,172 @@
-++/*
-++ * Copyright (c) 2015, The Linux Foundation. All rights reserved.
-++ *
-++ * Permission to use, copy, modify, and/or distribute this software for any
-++ * purpose with or without fee is hereby granted, provided that the above
-++ * copyright notice and this permission notice appear in all copies.
-++ *
-++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-++ */
-++
-++#include <linux/kernel.h>
-++#include <linux/init.h>
-++#include <linux/module.h>
-++#include <linux/platform_device.h>
-++#include <linux/err.h>
-++#include <linux/io.h>
-++#include <linux/of.h>
-++#include <linux/of_device.h>
-++#include <linux/clk.h>
-++#include <linux/clk-provider.h>
-++#include <linux/slab.h>
-++#include <linux/fab_scaling.h>
-++
-++struct qcom_fab_scaling_data {
-++	u32 fab_freq_high;
-++	u32 fab_freq_nominal;
-++	u32 cpu_freq_threshold;
-++	struct clk *apps_fab_clk;
-++	struct clk *ddr_fab_clk;
-++};
-++
-++static struct qcom_fab_scaling_data *drv_data;
-++
-++int scale_fabrics(unsigned long max_cpu_freq)
-++{	
-++	struct clk *apps_fab_clk = drv_data->apps_fab_clk,
-++	           *ddr_fab_clk = drv_data->ddr_fab_clk;
-++	unsigned long target_freq, cur_freq;
-++	int ret;
-++
-++	/* Skip fab scaling if the driver is not ready */
-++	if (!apps_fab_clk || !ddr_fab_clk)
-++		return 0;
-++
-++	if (max_cpu_freq > drv_data->cpu_freq_threshold)
-++		target_freq = drv_data->fab_freq_high;
-++	else
-++		target_freq = drv_data->fab_freq_nominal;
-++
-++	cur_freq = clk_get_rate(ddr_fab_clk);
-++
-++	if (target_freq != cur_freq) {
-++		ret = clk_set_rate(apps_fab_clk, target_freq);
-++		if (ret)
-++			return ret;
-++		ret = clk_set_rate(ddr_fab_clk, target_freq);
-++		if (ret)
-++			return ret;
-++	}
-++
-++	return 0;
-++}
-++EXPORT_SYMBOL(scale_fabrics);
-++
-++static int ipq806x_fab_scaling_probe(struct platform_device *pdev)
-++{
-++	struct device_node *np = pdev->dev.of_node;
-++	struct clk *apps_fab_clk, *ddr_fab_clk;
-++	int ret;
-++
-++	if (!np)
-++		return -ENODEV;
-++	
-++	drv_data = kzalloc(sizeof(*drv_data), GFP_KERNEL);
-++	if (!drv_data)
-++		return -ENOMEM;
-++
-++	if (of_property_read_u32(np, "fab_freq_high", &drv_data->fab_freq_high)) {
-++		pr_err("FABRICS turbo freq not found. Using defaults...\n");
-++		drv_data->fab_freq_high = 533000000;
-++	}
-++
-++	if (of_property_read_u32(np, "fab_freq_nominal", &drv_data->fab_freq_nominal)) {
-++		pr_err("FABRICS nominal freq not found. Using defaults...\n");
-++		drv_data->fab_freq_nominal = 400000000;
-++	}
-++
-++	if (of_property_read_u32(np, "cpu_freq_threshold", &drv_data->cpu_freq_threshold)) {
-++		pr_err("FABRICS cpu freq threshold not found. Using defaults...\n");
-++		drv_data->cpu_freq_threshold = 1000000000;
-++	}
-++
-++	apps_fab_clk = devm_clk_get(&pdev->dev, "apps-fab-clk");
-++	ret = PTR_ERR_OR_ZERO(apps_fab_clk);
-++	if (ret) {
-++		/*
-++		 * If apps fab clk node is present, but clock is not yet
-++		 * registered, we should try defering probe.
-++		 */
-++		if (ret != -EPROBE_DEFER) {
-++			pr_err("Failed to get APPS FABRIC clock: %d\n", ret);
-++			ret = -ENODEV;
-++		}
-++		goto err;
-++	}
-++
-++	clk_prepare_enable(apps_fab_clk);
-++	clk_set_rate(apps_fab_clk, drv_data->fab_freq_high);
-++	drv_data->apps_fab_clk = apps_fab_clk;
-++
-++	ddr_fab_clk = devm_clk_get(&pdev->dev, "ddr-fab-clk");
-++	ret = PTR_ERR_OR_ZERO(ddr_fab_clk);
-++	if (ret) {
-++		/*
-++		 * If ddr fab clk node is present, but clock is not yet
-++		 * registered, we should try defering probe.
-++		 */
-++		if (ret != -EPROBE_DEFER) {
-++			pr_err("Failed to get DDR FABRIC clock: %d\n", ret);
-++			ddr_fab_clk = NULL;
-++			ret = -ENODEV;
-++		}
-++		goto err;
-++	}
-++
-++	clk_prepare_enable(ddr_fab_clk);
-++	clk_set_rate(ddr_fab_clk, drv_data->fab_freq_high);
-++	drv_data->ddr_fab_clk = ddr_fab_clk;
-++
-++	return 0;
-++err:
-++	kfree(drv_data);
-++	return ret;
-++}
-++
-++static int ipq806x_fab_scaling_remove(struct platform_device *pdev)
-++{
-++	kfree(drv_data);
-++	return 0;
-++}
-++
-++static const struct of_device_id fab_scaling_ipq806x_match_table[] = {
-++	{ .compatible = "qcom,fab-scaling" },
-++	{ }
-++};
-++
-++static struct platform_driver fab_scaling_ipq806x_driver = {
-++	.probe		= ipq806x_fab_scaling_probe,
-++	.remove		= ipq806x_fab_scaling_remove,
-++	.driver		= {
-++		.name   = "fab-scaling",
-++		.of_match_table = fab_scaling_ipq806x_match_table,
-++	},
-++};
-++
-++static int __init fab_scaling_ipq806x_init(void)
-++{
-++	return platform_driver_register(&fab_scaling_ipq806x_driver);
-++}
-++late_initcall(fab_scaling_ipq806x_init);
-++
-++static void __exit fab_scaling_ipq806x_exit(void)
-++{
-++	platform_driver_unregister(&fab_scaling_ipq806x_driver);
-++}
-++module_exit(fab_scaling_ipq806x_exit);
-+--- /dev/null
-++++ b/include/linux/fab_scaling.h
-+@@ -0,0 +1,31 @@
-++/*
-++ * Copyright (c) 2015, The Linux Foundation. All rights reserved.
-++ *
-++ * Permission to use, copy, modify, and/or distribute this software for any
-++ * purpose with or without fee is hereby granted, provided that the above
-++ * copyright notice and this permission notice appear in all copies.
-++ *
-++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-++ */
-++
-++
-++#ifndef __FAB_SCALING_H
-++#define __FAB_SCALING_H
-++
-++/**
-++ * scale_fabrics - Scale DDR and APPS FABRICS
-++ *
-++ * This function monitors all the registered clocks and does APPS
-++ * and DDR FABRIC scaling based on the idle frequencies with which
-++ * it was registered.
-++ *
-++ */
-++int scale_fabrics(unsigned long max_cpu_freq);
-++
-++#endif
-+--- a/drivers/cpufreq/qcom-cpufreq-krait.c
-++++ b/drivers/cpufreq/qcom-cpufreq-krait.c
-+@@ -15,6 +15,7 @@
-+ #include <linux/regulator/consumer.h>
-+ #include <linux/slab.h>
-+ #include <linux/thermal.h>
-++#include <linux/fab_scaling.h>
-+ 
-+ #include "cpufreq-dt.h"
-+ 
-+@@ -68,6 +69,13 @@ static int set_target(struct cpufreq_pol
-+ 			return -EINVAL;
-+ 		}
-+ 
-++		/*
-++		 * Scale fabrics with max freq across all cores
-++		 */
-++		ret = scale_fabrics(target_freq);
-++		if (ret)
-++			return ret;
-++
-+ 		opp = dev_pm_opp_find_level_exact(&l2_pdev->dev, level);
-+ 		if (IS_ERR(opp)) {
-+ 			dev_err(&l2_pdev->dev,
-diff --git a/target/linux/ipq806x/patches-5.4/100-dwmac-ipq806x-qsgmii-pcs-all-ch-ctl.patch b/target/linux/ipq806x/patches-5.4/100-dwmac-ipq806x-qsgmii-pcs-all-ch-ctl.patch
-new file mode 100644
-index 0000000000..3c497ead6a
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.4/100-dwmac-ipq806x-qsgmii-pcs-all-ch-ctl.patch
-@@ -0,0 +1,83 @@
-+--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
-++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
-+@@ -64,6 +64,17 @@
-+ #define NSS_COMMON_CLK_DIV_SGMII_100		4
-+ #define NSS_COMMON_CLK_DIV_SGMII_10		49
-+ 
-++#define QSGMII_PCS_ALL_CH_CTL			0x80
-++#define QSGMII_PCS_CH_SPEED_FORCE		0x2
-++#define QSGMII_PCS_CH_SPEED_10			0x0
-++#define QSGMII_PCS_CH_SPEED_100			0x4
-++#define QSGMII_PCS_CH_SPEED_1000		0x8
-++#define QSGMII_PCS_CH_SPEED_MASK		(QSGMII_PCS_CH_SPEED_FORCE | \
-++						 QSGMII_PCS_CH_SPEED_10 | \
-++						 QSGMII_PCS_CH_SPEED_100 | \
-++						 QSGMII_PCS_CH_SPEED_1000)
-++#define QSGMII_PCS_CH_SPEED_SHIFT(x)		(x * 4)
-++
-+ #define QSGMII_PCS_CAL_LCKDT_CTL		0x120
-+ #define QSGMII_PCS_CAL_LCKDT_CTL_RST		BIT(19)
-+ 
-+@@ -241,6 +252,36 @@ static void ipq806x_gmac_fix_mac_speed(v
-+ 	ipq806x_gmac_set_speed(gmac, speed);
-+ }
-+ 
-++static int
-++ipq806x_gmac_get_qsgmii_pcs_speed_val(struct platform_device *pdev) {
-++	struct device_node *fixed_link_node;
-++	int rv;
-++	int fixed_link_speed;
-++
-++	if (!of_phy_is_fixed_link(pdev->dev.of_node))
-++		return 0;
-++
-++	fixed_link_node = of_get_child_by_name(pdev->dev.of_node, "fixed-link");
-++	if (!fixed_link_node)
-++		return -1;
-++
-++	rv = of_property_read_u32(fixed_link_node, "speed", &fixed_link_speed);
-++	of_node_put(fixed_link_node);
-++	if (rv)
-++		return -1;
-++
-++	switch (fixed_link_speed) {
-++	case SPEED_1000:
-++		return QSGMII_PCS_CH_SPEED_FORCE | QSGMII_PCS_CH_SPEED_1000;
-++	case SPEED_100:
-++		return QSGMII_PCS_CH_SPEED_FORCE | QSGMII_PCS_CH_SPEED_100;
-++	case SPEED_10:
-++		return QSGMII_PCS_CH_SPEED_FORCE | QSGMII_PCS_CH_SPEED_10;
-++	}
-++
-++	return -1;
-++}
-++
-+ static int ipq806x_gmac_probe(struct platform_device *pdev)
-+ {
-+ 	struct plat_stmmacenet_data *plat_dat;
-+@@ -249,6 +290,7 @@ static int ipq806x_gmac_probe(struct pla
-+ 	struct ipq806x_gmac *gmac;
-+ 	int val;
-+ 	int err;
-++	int qsgmii_pcs_speed;
-+ 
-+ 	val = stmmac_get_platform_resources(pdev, &stmmac_res);
-+ 	if (val)
-+@@ -345,6 +387,17 @@ static int ipq806x_gmac_probe(struct pla
-+ 			     0x1ul << QSGMII_PHY_RX_INPUT_EQU_OFFSET |
-+ 			     0x2ul << QSGMII_PHY_CDR_PI_SLEW_OFFSET |
-+ 			     0xCul << QSGMII_PHY_TX_DRV_AMP_OFFSET);
-++
-++		qsgmii_pcs_speed = ipq806x_gmac_get_qsgmii_pcs_speed_val(pdev);
-++		if (qsgmii_pcs_speed != -1) {
-++			regmap_update_bits(
-++			    gmac->qsgmii_csr,
-++			    QSGMII_PCS_ALL_CH_CTL,
-++			    QSGMII_PCS_CH_SPEED_MASK <<
-++				QSGMII_PCS_CH_SPEED_SHIFT(gmac->id),
-++			    qsgmii_pcs_speed <<
-++				QSGMII_PCS_CH_SPEED_SHIFT(gmac->id));
-++		}
-+ 	}
-+ 
-+ 	plat_dat->has_gmac = true;
-diff --git a/target/linux/ipq806x/patches-5.4/100-v5.11-dmaengine-qcom-add_ADM_driver.patch b/target/linux/ipq806x/patches-5.4/100-v5.11-dmaengine-qcom-add_ADM_driver.patch
-new file mode 100644
-index 0000000000..2d24da01e4
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.4/100-v5.11-dmaengine-qcom-add_ADM_driver.patch
-@@ -0,0 +1,965 @@
-+From 5c9f8c2dbdbe53818bcde6aa6695e1331e5f841f Mon Sep 17 00:00:00 2001
-+From: Jonathan McDowell <noodles@earth.li>
-+Date: Sat, 14 Nov 2020 14:02:33 +0000
-+Subject: dmaengine: qcom: Add ADM driver
-+
-+Add the DMA engine driver for the QCOM Application Data Mover (ADM) DMA
-+controller found in the MSM8x60 and IPQ/APQ8064 platforms.
-+
-+The ADM supports both memory to memory transactions and memory
-+to/from peripheral device transactions.  The controller also provides
-+flow control capabilities for transactions to/from peripheral devices.
-+
-+The initial release of this driver supports slave transfers to/from
-+peripherals and also incorporates CRCI (client rate control interface)
-+flow control.
-+
-+The hardware only supports a 32 bit physical address, so specifying
-+!PHYS_ADDR_T_64BIT gives maximum COMPILE_TEST coverage without having to
-+spend effort on kludging things in the code that will never actually be
-+needed on real hardware.
-+
-+Signed-off-by: Andy Gross <agross@codeaurora.org>
-+Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
-+Signed-off-by: Jonathan McDowell <noodles@earth.li>
-+Link: https://lore.kernel.org/r/20201114140233.GM32650@earth.li
-+Signed-off-by: Vinod Koul <vkoul@kernel.org>
-+---
-+ drivers/dma/qcom/Kconfig    |  11 +
-+ drivers/dma/qcom/Makefile   |   1 +
-+ drivers/dma/qcom/qcom_adm.c | 903 ++++++++++++++++++++++++++++++++++++++++++++
-+ 3 files changed, 915 insertions(+)
-+ create mode 100644 drivers/dma/qcom/qcom_adm.c
-+
-+--- a/drivers/dma/qcom/Kconfig
-++++ b/drivers/dma/qcom/Kconfig
-+@@ -1,4 +1,15 @@
-+ # SPDX-License-Identifier: GPL-2.0-only
-++config QCOM_ADM
-++	tristate "Qualcomm ADM support"
-++	depends on (ARCH_QCOM || COMPILE_TEST) && !PHYS_ADDR_T_64BIT
-++	select DMA_ENGINE
-++	select DMA_VIRTUAL_CHANNELS
-++	help
-++	  Enable support for the Qualcomm Application Data Mover (ADM) DMA
-++	  controller, as present on MSM8x60, APQ8064, and IPQ8064 devices.
-++	  This controller provides DMA capabilities for both general purpose
-++	  and on-chip peripheral devices.
-++
-+ config QCOM_BAM_DMA
-+ 	tristate "QCOM BAM DMA support"
-+ 	depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM)
-+--- a/drivers/dma/qcom/Makefile
-++++ b/drivers/dma/qcom/Makefile
-+@@ -1,4 +1,5 @@
-+ # SPDX-License-Identifier: GPL-2.0
-++obj-$(CONFIG_QCOM_ADM) += qcom_adm.o
-+ obj-$(CONFIG_QCOM_BAM_DMA) += bam_dma.o
-+ obj-$(CONFIG_QCOM_HIDMA_MGMT) += hdma_mgmt.o
-+ hdma_mgmt-objs	 := hidma_mgmt.o hidma_mgmt_sys.o
-+--- /dev/null
-++++ b/drivers/dma/qcom/qcom_adm.c
-+@@ -0,0 +1,903 @@
-++// SPDX-License-Identifier: GPL-2.0-only
-++/*
-++ * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
-++ */
-++
-++#include <linux/clk.h>
-++#include <linux/delay.h>
-++#include <linux/device.h>
-++#include <linux/dmaengine.h>
-++#include <linux/dma-mapping.h>
-++#include <linux/init.h>
-++#include <linux/interrupt.h>
-++#include <linux/io.h>
-++#include <linux/kernel.h>
-++#include <linux/module.h>
-++#include <linux/of.h>
-++#include <linux/of_address.h>
-++#include <linux/of_irq.h>
-++#include <linux/of_dma.h>
-++#include <linux/platform_device.h>
-++#include <linux/reset.h>
-++#include <linux/scatterlist.h>
-++#include <linux/slab.h>
-++
-++#include "../dmaengine.h"
-++#include "../virt-dma.h"
-++
-++/* ADM registers - calculated from channel number and security domain */
-++#define ADM_CHAN_MULTI			0x4
-++#define ADM_CI_MULTI			0x4
-++#define ADM_CRCI_MULTI			0x4
-++#define ADM_EE_MULTI			0x800
-++#define ADM_CHAN_OFFS(chan)		(ADM_CHAN_MULTI * (chan))
-++#define ADM_EE_OFFS(ee)			(ADM_EE_MULTI * (ee))
-++#define ADM_CHAN_EE_OFFS(chan, ee)	(ADM_CHAN_OFFS(chan) + ADM_EE_OFFS(ee))
-++#define ADM_CHAN_OFFS(chan)		(ADM_CHAN_MULTI * (chan))
-++#define ADM_CI_OFFS(ci)			(ADM_CHAN_OFF(ci))
-++#define ADM_CH_CMD_PTR(chan, ee)	(ADM_CHAN_EE_OFFS(chan, ee))
-++#define ADM_CH_RSLT(chan, ee)		(0x40 + ADM_CHAN_EE_OFFS(chan, ee))
-++#define ADM_CH_FLUSH_STATE0(chan, ee)	(0x80 + ADM_CHAN_EE_OFFS(chan, ee))
-++#define ADM_CH_STATUS_SD(chan, ee)	(0x200 + ADM_CHAN_EE_OFFS(chan, ee))
-++#define ADM_CH_CONF(chan)		(0x240 + ADM_CHAN_OFFS(chan))
-++#define ADM_CH_RSLT_CONF(chan, ee)	(0x300 + ADM_CHAN_EE_OFFS(chan, ee))
-++#define ADM_SEC_DOMAIN_IRQ_STATUS(ee)	(0x380 + ADM_EE_OFFS(ee))
-++#define ADM_CI_CONF(ci)			(0x390 + (ci) * ADM_CI_MULTI)
-++#define ADM_GP_CTL			0x3d8
-++#define ADM_CRCI_CTL(crci, ee)		(0x400 + (crci) * ADM_CRCI_MULTI + \
-++						ADM_EE_OFFS(ee))
-++
-++/* channel status */
-++#define ADM_CH_STATUS_VALID		BIT(1)
-++
-++/* channel result */
-++#define ADM_CH_RSLT_VALID		BIT(31)
-++#define ADM_CH_RSLT_ERR			BIT(3)
-++#define ADM_CH_RSLT_FLUSH		BIT(2)
-++#define ADM_CH_RSLT_TPD			BIT(1)
-++
-++/* channel conf */
-++#define ADM_CH_CONF_SHADOW_EN		BIT(12)
-++#define ADM_CH_CONF_MPU_DISABLE		BIT(11)
-++#define ADM_CH_CONF_PERM_MPU_CONF	BIT(9)
-++#define ADM_CH_CONF_FORCE_RSLT_EN	BIT(7)
-++#define ADM_CH_CONF_SEC_DOMAIN(ee)	((((ee) & 0x3) << 4) | (((ee) & 0x4) << 11))
-++
-++/* channel result conf */
-++#define ADM_CH_RSLT_CONF_FLUSH_EN	BIT(1)
-++#define ADM_CH_RSLT_CONF_IRQ_EN		BIT(0)
-++
-++/* CRCI CTL */
-++#define ADM_CRCI_CTL_MUX_SEL		BIT(18)
-++#define ADM_CRCI_CTL_RST		BIT(17)
-++
-++/* CI configuration */
-++#define ADM_CI_RANGE_END(x)		((x) << 24)
-++#define ADM_CI_RANGE_START(x)		((x) << 16)
-++#define ADM_CI_BURST_4_WORDS		BIT(2)
-++#define ADM_CI_BURST_8_WORDS		BIT(3)
-++
-++/* GP CTL */
-++#define ADM_GP_CTL_LP_EN		BIT(12)
-++#define ADM_GP_CTL_LP_CNT(x)		((x) << 8)
-++
-++/* Command pointer list entry */
-++#define ADM_CPLE_LP			BIT(31)
-++#define ADM_CPLE_CMD_PTR_LIST		BIT(29)
-++
-++/* Command list entry */
-++#define ADM_CMD_LC			BIT(31)
-++#define ADM_CMD_DST_CRCI(n)		(((n) & 0xf) << 7)
-++#define ADM_CMD_SRC_CRCI(n)		(((n) & 0xf) << 3)
-++
-++#define ADM_CMD_TYPE_SINGLE		0x0
-++#define ADM_CMD_TYPE_BOX		0x3
-++
-++#define ADM_CRCI_MUX_SEL		BIT(4)
-++#define ADM_DESC_ALIGN			8
-++#define ADM_MAX_XFER			(SZ_64K - 1)
-++#define ADM_MAX_ROWS			(SZ_64K - 1)
-++#define ADM_MAX_CHANNELS		16
-++
-++struct adm_desc_hw_box {
-++	u32 cmd;
-++	u32 src_addr;
-++	u32 dst_addr;
-++	u32 row_len;
-++	u32 num_rows;
-++	u32 row_offset;
-++};
-++
-++struct adm_desc_hw_single {
-++	u32 cmd;
-++	u32 src_addr;
-++	u32 dst_addr;
-++	u32 len;
-++};
-++
-++struct adm_async_desc {
-++	struct virt_dma_desc vd;
-++	struct adm_device *adev;
-++
-++	size_t length;
-++	enum dma_transfer_direction dir;
-++	dma_addr_t dma_addr;
-++	size_t dma_len;
-++
-++	void *cpl;
-++	dma_addr_t cp_addr;
-++	u32 crci;
-++	u32 mux;
-++	u32 blk_size;
-++};
-++
-++struct adm_chan {
-++	struct virt_dma_chan vc;
-++	struct adm_device *adev;
-++
-++	/* parsed from DT */
-++	u32 id;			/* channel id */
-++
-++	struct adm_async_desc *curr_txd;
-++	struct dma_slave_config slave;
-++	struct list_head node;
-++
-++	int error;
-++	int initialized;
-++};
-++
-++static inline struct adm_chan *to_adm_chan(struct dma_chan *common)
-++{
-++	return container_of(common, struct adm_chan, vc.chan);
-++}
-++
-++struct adm_device {
-++	void __iomem *regs;
-++	struct device *dev;
-++	struct dma_device common;
-++	struct device_dma_parameters dma_parms;
-++	struct adm_chan *channels;
-++
-++	u32 ee;
-++
-++	struct clk *core_clk;
-++	struct clk *iface_clk;
-++
-++	struct reset_control *clk_reset;
-++	struct reset_control *c0_reset;
-++	struct reset_control *c1_reset;
-++	struct reset_control *c2_reset;
-++	int irq;
-++};
-++
-++/**
-++ * adm_free_chan - Frees dma resources associated with the specific channel
-++ *
-++ * Free all allocated descriptors associated with this channel
-++ *
-++ */
-++static void adm_free_chan(struct dma_chan *chan)
-++{
-++	/* free all queued descriptors */
-++	vchan_free_chan_resources(to_virt_chan(chan));
-++}
-++
-++/**
-++ * adm_get_blksize - Get block size from burst value
-++ *
-++ */
-++static int adm_get_blksize(unsigned int burst)
-++{
-++	int ret;
-++
-++	switch (burst) {
-++	case 16:
-++	case 32:
-++	case 64:
-++	case 128:
-++		ret = ffs(burst >> 4) - 1;
-++		break;
-++	case 192:
-++		ret = 4;
-++		break;
-++	case 256:
-++		ret = 5;
-++		break;
-++	default:
-++		ret = -EINVAL;
-++		break;
-++	}
-++
-++	return ret;
-++}
-++
-++/**
-++ * adm_process_fc_descriptors - Process descriptors for flow controlled xfers
-++ *
-++ * @achan: ADM channel
-++ * @desc: Descriptor memory pointer
-++ * @sg: Scatterlist entry
-++ * @crci: CRCI value
-++ * @burst: Burst size of transaction
-++ * @direction: DMA transfer direction
-++ */
-++static void *adm_process_fc_descriptors(struct adm_chan *achan, void *desc,
-++					struct scatterlist *sg, u32 crci,
-++					u32 burst,
-++					enum dma_transfer_direction direction)
-++{
-++	struct adm_desc_hw_box *box_desc = NULL;
-++	struct adm_desc_hw_single *single_desc;
-++	u32 remainder = sg_dma_len(sg);
-++	u32 rows, row_offset, crci_cmd;
-++	u32 mem_addr = sg_dma_address(sg);
-++	u32 *incr_addr = &mem_addr;
-++	u32 *src, *dst;
-++
-++	if (direction == DMA_DEV_TO_MEM) {
-++		crci_cmd = ADM_CMD_SRC_CRCI(crci);
-++		row_offset = burst;
-++		src = &achan->slave.src_addr;
-++		dst = &mem_addr;
-++	} else {
-++		crci_cmd = ADM_CMD_DST_CRCI(crci);
-++		row_offset = burst << 16;
-++		src = &mem_addr;
-++		dst = &achan->slave.dst_addr;
-++	}
-++
-++	while (remainder >= burst) {
-++		box_desc = desc;
-++		box_desc->cmd = ADM_CMD_TYPE_BOX | crci_cmd;
-++		box_desc->row_offset = row_offset;
-++		box_desc->src_addr = *src;
-++		box_desc->dst_addr = *dst;
-++
-++		rows = remainder / burst;
-++		rows = min_t(u32, rows, ADM_MAX_ROWS);
-++		box_desc->num_rows = rows << 16 | rows;
-++		box_desc->row_len = burst << 16 | burst;
-++
-++		*incr_addr += burst * rows;
-++		remainder -= burst * rows;
-++		desc += sizeof(*box_desc);
-++	}
-++
-++	/* if leftover bytes, do one single descriptor */
-++	if (remainder) {
-++		single_desc = desc;
-++		single_desc->cmd = ADM_CMD_TYPE_SINGLE | crci_cmd;
-++		single_desc->len = remainder;
-++		single_desc->src_addr = *src;
-++		single_desc->dst_addr = *dst;
-++		desc += sizeof(*single_desc);
-++
-++		if (sg_is_last(sg))
-++			single_desc->cmd |= ADM_CMD_LC;
-++	} else {
-++		if (box_desc && sg_is_last(sg))
-++			box_desc->cmd |= ADM_CMD_LC;
-++	}
-++
-++	return desc;
-++}
-++
-++/**
-++ * adm_process_non_fc_descriptors - Process descriptors for non-fc xfers
-++ *
-++ * @achan: ADM channel
-++ * @desc: Descriptor memory pointer
-++ * @sg: Scatterlist entry
-++ * @direction: DMA transfer direction
-++ */
-++static void *adm_process_non_fc_descriptors(struct adm_chan *achan, void *desc,
-++					    struct scatterlist *sg,
-++					    enum dma_transfer_direction direction)
-++{
-++	struct adm_desc_hw_single *single_desc;
-++	u32 remainder = sg_dma_len(sg);
-++	u32 mem_addr = sg_dma_address(sg);
-++	u32 *incr_addr = &mem_addr;
-++	u32 *src, *dst;
-++
-++	if (direction == DMA_DEV_TO_MEM) {
-++		src = &achan->slave.src_addr;
-++		dst = &mem_addr;
-++	} else {
-++		src = &mem_addr;
-++		dst = &achan->slave.dst_addr;
-++	}
-++
-++	do {
-++		single_desc = desc;
-++		single_desc->cmd = ADM_CMD_TYPE_SINGLE;
-++		single_desc->src_addr = *src;
-++		single_desc->dst_addr = *dst;
-++		single_desc->len = (remainder > ADM_MAX_XFER) ?
-++				ADM_MAX_XFER : remainder;
-++
-++		remainder -= single_desc->len;
-++		*incr_addr += single_desc->len;
-++		desc += sizeof(*single_desc);
-++	} while (remainder);
-++
-++	/* set last command if this is the end of the whole transaction */
-++	if (sg_is_last(sg))
-++		single_desc->cmd |= ADM_CMD_LC;
-++
-++	return desc;
-++}
-++
-++/**
-++ * adm_prep_slave_sg - Prep slave sg transaction
-++ *
-++ * @chan: dma channel
-++ * @sgl: scatter gather list
-++ * @sg_len: length of sg
-++ * @direction: DMA transfer direction
-++ * @flags: DMA flags
-++ * @context: transfer context (unused)
-++ */
-++static struct dma_async_tx_descriptor *adm_prep_slave_sg(struct dma_chan *chan,
-++							 struct scatterlist *sgl,
-++							 unsigned int sg_len,
-++							 enum dma_transfer_direction direction,
-++							 unsigned long flags,
-++							 void *context)
-++{
-++	struct adm_chan *achan = to_adm_chan(chan);
-++	struct adm_device *adev = achan->adev;
-++	struct adm_async_desc *async_desc;
-++	struct scatterlist *sg;
-++	dma_addr_t cple_addr;
-++	u32 i, burst;
-++	u32 single_count = 0, box_count = 0, crci = 0;
-++	void *desc;
-++	u32 *cple;
-++	int blk_size = 0;
-++
-++	if (!is_slave_direction(direction)) {
-++		dev_err(adev->dev, "invalid dma direction\n");
-++		return NULL;
-++	}
-++
-++	/*
-++	 * get burst value from slave configuration
-++	 */
-++	burst = (direction == DMA_MEM_TO_DEV) ?
-++		achan->slave.dst_maxburst :
-++		achan->slave.src_maxburst;
-++
-++	/* if using flow control, validate burst and crci values */
-++	if (achan->slave.device_fc) {
-++		blk_size = adm_get_blksize(burst);
-++		if (blk_size < 0) {
-++			dev_err(adev->dev, "invalid burst value: %d\n",
-++				burst);
-++			return ERR_PTR(-EINVAL);
-++		}
-++
-++		crci = achan->slave.slave_id & 0xf;
-++		if (!crci || achan->slave.slave_id > 0x1f) {
-++			dev_err(adev->dev, "invalid crci value\n");
-++			return ERR_PTR(-EINVAL);
-++		}
-++	}
-++
-++	/* iterate through sgs and compute allocation size of structures */
-++	for_each_sg(sgl, sg, sg_len, i) {
-++		if (achan->slave.device_fc) {
-++			box_count += DIV_ROUND_UP(sg_dma_len(sg) / burst,
-++						  ADM_MAX_ROWS);
-++			if (sg_dma_len(sg) % burst)
-++				single_count++;
-++		} else {
-++			single_count += DIV_ROUND_UP(sg_dma_len(sg),
-++						     ADM_MAX_XFER);
-++		}
-++	}
-++
-++	async_desc = kzalloc(sizeof(*async_desc), GFP_NOWAIT);
-++	if (!async_desc)
-++		return ERR_PTR(-ENOMEM);
-++
-++	if (crci)
-++		async_desc->mux = achan->slave.slave_id & ADM_CRCI_MUX_SEL ?
-++					ADM_CRCI_CTL_MUX_SEL : 0;
-++	async_desc->crci = crci;
-++	async_desc->blk_size = blk_size;
-++	async_desc->dma_len = single_count * sizeof(struct adm_desc_hw_single) +
-++				box_count * sizeof(struct adm_desc_hw_box) +
-++				sizeof(*cple) + 2 * ADM_DESC_ALIGN;
-++
-++	async_desc->cpl = kzalloc(async_desc->dma_len, GFP_NOWAIT);
-++	if (!async_desc->cpl)
-++		goto free;
-++
-++	async_desc->adev = adev;
-++
-++	/* both command list entry and descriptors must be 8 byte aligned */
-++	cple = PTR_ALIGN(async_desc->cpl, ADM_DESC_ALIGN);
-++	desc = PTR_ALIGN(cple + 1, ADM_DESC_ALIGN);
-++
-++	for_each_sg(sgl, sg, sg_len, i) {
-++		async_desc->length += sg_dma_len(sg);
-++
-++		if (achan->slave.device_fc)
-++			desc = adm_process_fc_descriptors(achan, desc, sg, crci,
-++							  burst, direction);
-++		else
-++			desc = adm_process_non_fc_descriptors(achan, desc, sg,
-++							      direction);
-++	}
-++
-++	async_desc->dma_addr = dma_map_single(adev->dev, async_desc->cpl,
-++					      async_desc->dma_len,
-++					      DMA_TO_DEVICE);
-++	if (dma_mapping_error(adev->dev, async_desc->dma_addr))
-++		goto free;
-++
-++	cple_addr = async_desc->dma_addr + ((void *)cple - async_desc->cpl);
-++
-++	/* init cmd list */
-++	dma_sync_single_for_cpu(adev->dev, cple_addr, sizeof(*cple),
-++				DMA_TO_DEVICE);
-++	*cple = ADM_CPLE_LP;
-++	*cple |= (async_desc->dma_addr + ADM_DESC_ALIGN) >> 3;
-++	dma_sync_single_for_device(adev->dev, cple_addr, sizeof(*cple),
-++				   DMA_TO_DEVICE);
-++
-++	return vchan_tx_prep(&achan->vc, &async_desc->vd, flags);
-++
-++free:
-++	kfree(async_desc);
-++	return ERR_PTR(-ENOMEM);
-++}
-++
-++/**
-++ * adm_terminate_all - terminate all transactions on a channel
-++ * @achan: adm dma channel
-++ *
-++ * Dequeues and frees all transactions, aborts current transaction
-++ * No callbacks are done
-++ *
-++ */
-++static int adm_terminate_all(struct dma_chan *chan)
-++{
-++	struct adm_chan *achan = to_adm_chan(chan);
-++	struct adm_device *adev = achan->adev;
-++	unsigned long flags;
-++	LIST_HEAD(head);
-++
-++	spin_lock_irqsave(&achan->vc.lock, flags);
-++	vchan_get_all_descriptors(&achan->vc, &head);
-++
-++	/* send flush command to terminate current transaction */
-++	writel_relaxed(0x0,
-++		       adev->regs + ADM_CH_FLUSH_STATE0(achan->id, adev->ee));
-++
-++	spin_unlock_irqrestore(&achan->vc.lock, flags);
-++
-++	vchan_dma_desc_free_list(&achan->vc, &head);
-++
-++	return 0;
-++}
-++
-++static int adm_slave_config(struct dma_chan *chan, struct dma_slave_config *cfg)
-++{
-++	struct adm_chan *achan = to_adm_chan(chan);
-++	unsigned long flag;
-++
-++	spin_lock_irqsave(&achan->vc.lock, flag);
-++	memcpy(&achan->slave, cfg, sizeof(struct dma_slave_config));
-++	spin_unlock_irqrestore(&achan->vc.lock, flag);
-++
-++	return 0;
-++}
-++
-++/**
-++ * adm_start_dma - start next transaction
-++ * @achan - ADM dma channel
-++ */
-++static void adm_start_dma(struct adm_chan *achan)
-++{
-++	struct virt_dma_desc *vd = vchan_next_desc(&achan->vc);
-++	struct adm_device *adev = achan->adev;
-++	struct adm_async_desc *async_desc;
-++
-++	lockdep_assert_held(&achan->vc.lock);
-++
-++	if (!vd)
-++		return;
-++
-++	list_del(&vd->node);
-++
-++	/* write next command list out to the CMD FIFO */
-++	async_desc = container_of(vd, struct adm_async_desc, vd);
-++	achan->curr_txd = async_desc;
-++
-++	/* reset channel error */
-++	achan->error = 0;
-++
-++	if (!achan->initialized) {
-++		/* enable interrupts */
-++		writel(ADM_CH_CONF_SHADOW_EN |
-++		       ADM_CH_CONF_PERM_MPU_CONF |
-++		       ADM_CH_CONF_MPU_DISABLE |
-++		       ADM_CH_CONF_SEC_DOMAIN(adev->ee),
-++		       adev->regs + ADM_CH_CONF(achan->id));
-++
-++		writel(ADM_CH_RSLT_CONF_IRQ_EN | ADM_CH_RSLT_CONF_FLUSH_EN,
-++		       adev->regs + ADM_CH_RSLT_CONF(achan->id, adev->ee));
-++
-++		achan->initialized = 1;
-++	}
-++
-++	/* set the crci block size if this transaction requires CRCI */
-++	if (async_desc->crci) {
-++		writel(async_desc->mux | async_desc->blk_size,
-++		       adev->regs + ADM_CRCI_CTL(async_desc->crci, adev->ee));
-++	}
-++
-++	/* make sure IRQ enable doesn't get reordered */
-++	wmb();
-++
-++	/* write next command list out to the CMD FIFO */
-++	writel(ALIGN(async_desc->dma_addr, ADM_DESC_ALIGN) >> 3,
-++	       adev->regs + ADM_CH_CMD_PTR(achan->id, adev->ee));
-++}
-++
-++/**
-++ * adm_dma_irq - irq handler for ADM controller
-++ * @irq: IRQ of interrupt
-++ * @data: callback data
-++ *
-++ * IRQ handler for the bam controller
-++ */
-++static irqreturn_t adm_dma_irq(int irq, void *data)
-++{
-++	struct adm_device *adev = data;
-++	u32 srcs, i;
-++	struct adm_async_desc *async_desc;
-++	unsigned long flags;
-++
-++	srcs = readl_relaxed(adev->regs +
-++			ADM_SEC_DOMAIN_IRQ_STATUS(adev->ee));
-++
-++	for (i = 0; i < ADM_MAX_CHANNELS; i++) {
-++		struct adm_chan *achan = &adev->channels[i];
-++		u32 status, result;
-++
-++		if (srcs & BIT(i)) {
-++			status = readl_relaxed(adev->regs +
-++					       ADM_CH_STATUS_SD(i, adev->ee));
-++
-++			/* if no result present, skip */
-++			if (!(status & ADM_CH_STATUS_VALID))
-++				continue;
-++
-++			result = readl_relaxed(adev->regs +
-++				ADM_CH_RSLT(i, adev->ee));
-++
-++			/* no valid results, skip */
-++			if (!(result & ADM_CH_RSLT_VALID))
-++				continue;
-++
-++			/* flag error if transaction was flushed or failed */
-++			if (result & (ADM_CH_RSLT_ERR | ADM_CH_RSLT_FLUSH))
-++				achan->error = 1;
-++
-++			spin_lock_irqsave(&achan->vc.lock, flags);
-++			async_desc = achan->curr_txd;
-++
-++			achan->curr_txd = NULL;
-++
-++			if (async_desc) {
-++				vchan_cookie_complete(&async_desc->vd);
-++
-++				/* kick off next DMA */
-++				adm_start_dma(achan);
-++			}
-++
-++			spin_unlock_irqrestore(&achan->vc.lock, flags);
-++		}
-++	}
-++
-++	return IRQ_HANDLED;
-++}
-++
-++/**
-++ * adm_tx_status - returns status of transaction
-++ * @chan: dma channel
-++ * @cookie: transaction cookie
-++ * @txstate: DMA transaction state
-++ *
-++ * Return status of dma transaction
-++ */
-++static enum dma_status adm_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
-++				     struct dma_tx_state *txstate)
-++{
-++	struct adm_chan *achan = to_adm_chan(chan);
-++	struct virt_dma_desc *vd;
-++	enum dma_status ret;
-++	unsigned long flags;
-++	size_t residue = 0;
-++
-++	ret = dma_cookie_status(chan, cookie, txstate);
-++	if (ret == DMA_COMPLETE || !txstate)
-++		return ret;
-++
-++	spin_lock_irqsave(&achan->vc.lock, flags);
-++
-++	vd = vchan_find_desc(&achan->vc, cookie);
-++	if (vd)
-++		residue = container_of(vd, struct adm_async_desc, vd)->length;
-++
-++	spin_unlock_irqrestore(&achan->vc.lock, flags);
-++
-++	/*
-++	 * residue is either the full length if it is in the issued list, or 0
-++	 * if it is in progress.  We have no reliable way of determining
-++	 * anything inbetween
-++	 */
-++	dma_set_residue(txstate, residue);
-++
-++	if (achan->error)
-++		return DMA_ERROR;
-++
-++	return ret;
-++}
-++
-++/**
-++ * adm_issue_pending - starts pending transactions
-++ * @chan: dma channel
-++ *
-++ * Issues all pending transactions and starts DMA
-++ */
-++static void adm_issue_pending(struct dma_chan *chan)
-++{
-++	struct adm_chan *achan = to_adm_chan(chan);
-++	unsigned long flags;
-++
-++	spin_lock_irqsave(&achan->vc.lock, flags);
-++
-++	if (vchan_issue_pending(&achan->vc) && !achan->curr_txd)
-++		adm_start_dma(achan);
-++	spin_unlock_irqrestore(&achan->vc.lock, flags);
-++}
-++
-++/**
-++ * adm_dma_free_desc - free descriptor memory
-++ * @vd: virtual descriptor
-++ *
-++ */
-++static void adm_dma_free_desc(struct virt_dma_desc *vd)
-++{
-++	struct adm_async_desc *async_desc = container_of(vd,
-++			struct adm_async_desc, vd);
-++
-++	dma_unmap_single(async_desc->adev->dev, async_desc->dma_addr,
-++			 async_desc->dma_len, DMA_TO_DEVICE);
-++	kfree(async_desc->cpl);
-++	kfree(async_desc);
-++}
-++
-++static void adm_channel_init(struct adm_device *adev, struct adm_chan *achan,
-++			     u32 index)
-++{
-++	achan->id = index;
-++	achan->adev = adev;
-++
-++	vchan_init(&achan->vc, &adev->common);
-++	achan->vc.desc_free = adm_dma_free_desc;
-++}
-++
-++static int adm_dma_probe(struct platform_device *pdev)
-++{
-++	struct adm_device *adev;
-++	int ret;
-++	u32 i;
-++
-++	adev = devm_kzalloc(&pdev->dev, sizeof(*adev), GFP_KERNEL);
-++	if (!adev)
-++		return -ENOMEM;
-++
-++	adev->dev = &pdev->dev;
-++
-++	adev->regs = devm_platform_ioremap_resource(pdev, 0);
-++	if (IS_ERR(adev->regs))
-++		return PTR_ERR(adev->regs);
-++
-++	adev->irq = platform_get_irq(pdev, 0);
-++	if (adev->irq < 0)
-++		return adev->irq;
-++
-++	ret = of_property_read_u32(pdev->dev.of_node, "qcom,ee", &adev->ee);
-++	if (ret) {
-++		dev_err(adev->dev, "Execution environment unspecified\n");
-++		return ret;
-++	}
-++
-++	adev->core_clk = devm_clk_get(adev->dev, "core");
-++	if (IS_ERR(adev->core_clk))
-++		return PTR_ERR(adev->core_clk);
-++
-++	adev->iface_clk = devm_clk_get(adev->dev, "iface");
-++	if (IS_ERR(adev->iface_clk))
-++		return PTR_ERR(adev->iface_clk);
-++
-++	adev->clk_reset = devm_reset_control_get_exclusive(&pdev->dev, "clk");
-++	if (IS_ERR(adev->clk_reset)) {
-++		dev_err(adev->dev, "failed to get ADM0 reset\n");
-++		return PTR_ERR(adev->clk_reset);
-++	}
-++
-++	adev->c0_reset = devm_reset_control_get_exclusive(&pdev->dev, "c0");
-++	if (IS_ERR(adev->c0_reset)) {
-++		dev_err(adev->dev, "failed to get ADM0 C0 reset\n");
-++		return PTR_ERR(adev->c0_reset);
-++	}
-++
-++	adev->c1_reset = devm_reset_control_get_exclusive(&pdev->dev, "c1");
-++	if (IS_ERR(adev->c1_reset)) {
-++		dev_err(adev->dev, "failed to get ADM0 C1 reset\n");
-++		return PTR_ERR(adev->c1_reset);
-++	}
-++
-++	adev->c2_reset = devm_reset_control_get_exclusive(&pdev->dev, "c2");
-++	if (IS_ERR(adev->c2_reset)) {
-++		dev_err(adev->dev, "failed to get ADM0 C2 reset\n");
-++		return PTR_ERR(adev->c2_reset);
-++	}
-++
-++	ret = clk_prepare_enable(adev->core_clk);
-++	if (ret) {
-++		dev_err(adev->dev, "failed to prepare/enable core clock\n");
-++		return ret;
-++	}
-++
-++	ret = clk_prepare_enable(adev->iface_clk);
-++	if (ret) {
-++		dev_err(adev->dev, "failed to prepare/enable iface clock\n");
-++		goto err_disable_core_clk;
-++	}
-++
-++	reset_control_assert(adev->clk_reset);
-++	reset_control_assert(adev->c0_reset);
-++	reset_control_assert(adev->c1_reset);
-++	reset_control_assert(adev->c2_reset);
-++
-++	udelay(2);
-++
-++	reset_control_deassert(adev->clk_reset);
-++	reset_control_deassert(adev->c0_reset);
-++	reset_control_deassert(adev->c1_reset);
-++	reset_control_deassert(adev->c2_reset);
-++
-++	adev->channels = devm_kcalloc(adev->dev, ADM_MAX_CHANNELS,
-++				      sizeof(*adev->channels), GFP_KERNEL);
-++
-++	if (!adev->channels) {
-++		ret = -ENOMEM;
-++		goto err_disable_clks;
-++	}
-++
-++	/* allocate and initialize channels */
-++	INIT_LIST_HEAD(&adev->common.channels);
-++
-++	for (i = 0; i < ADM_MAX_CHANNELS; i++)
-++		adm_channel_init(adev, &adev->channels[i], i);
-++
-++	/* reset CRCIs */
-++	for (i = 0; i < 16; i++)
-++		writel(ADM_CRCI_CTL_RST, adev->regs +
-++			ADM_CRCI_CTL(i, adev->ee));
-++
-++	/* configure client interfaces */
-++	writel(ADM_CI_RANGE_START(0x40) | ADM_CI_RANGE_END(0xb0) |
-++	       ADM_CI_BURST_8_WORDS, adev->regs + ADM_CI_CONF(0));
-++	writel(ADM_CI_RANGE_START(0x2a) | ADM_CI_RANGE_END(0x2c) |
-++	       ADM_CI_BURST_8_WORDS, adev->regs + ADM_CI_CONF(1));
-++	writel(ADM_CI_RANGE_START(0x12) | ADM_CI_RANGE_END(0x28) |
-++	       ADM_CI_BURST_8_WORDS, adev->regs + ADM_CI_CONF(2));
-++	writel(ADM_GP_CTL_LP_EN | ADM_GP_CTL_LP_CNT(0xf),
-++	       adev->regs + ADM_GP_CTL);
-++
-++	ret = devm_request_irq(adev->dev, adev->irq, adm_dma_irq,
-++			       0, "adm_dma", adev);
-++	if (ret)
-++		goto err_disable_clks;
-++
-++	platform_set_drvdata(pdev, adev);
-++
-++	adev->common.dev = adev->dev;
-++	adev->common.dev->dma_parms = &adev->dma_parms;
-++
-++	/* set capabilities */
-++	dma_cap_zero(adev->common.cap_mask);
-++	dma_cap_set(DMA_SLAVE, adev->common.cap_mask);
-++	dma_cap_set(DMA_PRIVATE, adev->common.cap_mask);
-++
-++	/* initialize dmaengine apis */
-++	adev->common.directions = BIT(DMA_DEV_TO_MEM | DMA_MEM_TO_DEV);
-++	adev->common.residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR;
-++	adev->common.src_addr_widths = DMA_SLAVE_BUSWIDTH_4_BYTES;
-++	adev->common.dst_addr_widths = DMA_SLAVE_BUSWIDTH_4_BYTES;
-++	adev->common.device_free_chan_resources = adm_free_chan;
-++	adev->common.device_prep_slave_sg = adm_prep_slave_sg;
-++	adev->common.device_issue_pending = adm_issue_pending;
-++	adev->common.device_tx_status = adm_tx_status;
-++	adev->common.device_terminate_all = adm_terminate_all;
-++	adev->common.device_config = adm_slave_config;
-++
-++	ret = dma_async_device_register(&adev->common);
-++	if (ret) {
-++		dev_err(adev->dev, "failed to register dma async device\n");
-++		goto err_disable_clks;
-++	}
-++
-++	ret = of_dma_controller_register(pdev->dev.of_node,
-++					 of_dma_xlate_by_chan_id,
-++					 &adev->common);
-++	if (ret)
-++		goto err_unregister_dma;
-++
-++	return 0;
-++
-++err_unregister_dma:
-++	dma_async_device_unregister(&adev->common);
-++err_disable_clks:
-++	clk_disable_unprepare(adev->iface_clk);
-++err_disable_core_clk:
-++	clk_disable_unprepare(adev->core_clk);
-++
-++	return ret;
-++}
-++
-++static int adm_dma_remove(struct platform_device *pdev)
-++{
-++	struct adm_device *adev = platform_get_drvdata(pdev);
-++	struct adm_chan *achan;
-++	u32 i;
-++
-++	of_dma_controller_free(pdev->dev.of_node);
-++	dma_async_device_unregister(&adev->common);
-++
-++	for (i = 0; i < ADM_MAX_CHANNELS; i++) {
-++		achan = &adev->channels[i];
-++
-++		/* mask IRQs for this channel/EE pair */
-++		writel(0, adev->regs + ADM_CH_RSLT_CONF(achan->id, adev->ee));
-++
-++		tasklet_kill(&adev->channels[i].vc.task);
-++		adm_terminate_all(&adev->channels[i].vc.chan);
-++	}
-++
-++	devm_free_irq(adev->dev, adev->irq, adev);
-++
-++	clk_disable_unprepare(adev->core_clk);
-++	clk_disable_unprepare(adev->iface_clk);
-++
-++	return 0;
-++}
-++
-++static const struct of_device_id adm_of_match[] = {
-++	{ .compatible = "qcom,adm", },
-++	{}
-++};
-++MODULE_DEVICE_TABLE(of, adm_of_match);
-++
-++static struct platform_driver adm_dma_driver = {
-++	.probe = adm_dma_probe,
-++	.remove = adm_dma_remove,
-++	.driver = {
-++		.name = "adm-dma-engine",
-++		.of_match_table = adm_of_match,
-++	},
-++};
-++
-++module_platform_driver(adm_dma_driver);
-++
-++MODULE_AUTHOR("Andy Gross <agross@codeaurora.org>");
-++MODULE_DESCRIPTION("QCOM ADM DMA engine driver");
-++MODULE_LICENSE("GPL v2");
-diff --git a/target/linux/ipq806x/patches-5.4/101-5.12-mtd-parsers-Add-Qcom-SMEM-parser.patch b/target/linux/ipq806x/patches-5.4/101-5.12-mtd-parsers-Add-Qcom-SMEM-parser.patch
-new file mode 100644
-index 0000000000..a78dc82a47
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.4/101-5.12-mtd-parsers-Add-Qcom-SMEM-parser.patch
-@@ -0,0 +1,217 @@
-+From 803eb124e1a64e42888542c3444bfe6dac412c7f Mon Sep 17 00:00:00 2001
-+From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-+Date: Mon, 4 Jan 2021 09:41:35 +0530
-+Subject: mtd: parsers: Add Qcom SMEM parser
-+
-+NAND based Qualcomm platforms have the partition table populated in the
-+Shared Memory (SMEM). Hence, add a parser for parsing the partitions
-+from it.
-+
-+Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-+Link: https://lore.kernel.org/linux-mtd/20210104041137.113075-3-manivannan.sadhasivam@linaro.org
-+---
-+ drivers/mtd/parsers/Kconfig        |   8 ++
-+ drivers/mtd/parsers/Makefile       |   1 +
-+ drivers/mtd/parsers/qcomsmempart.c | 170 +++++++++++++++++++++++++++++++++++++
-+ 3 files changed, 179 insertions(+)
-+ create mode 100644 drivers/mtd/parsers/qcomsmempart.c
-+
-+--- a/drivers/mtd/parsers/Kconfig
-++++ b/drivers/mtd/parsers/Kconfig
-+@@ -196,6 +196,14 @@ config MTD_REDBOOT_PARTS_READONLY
-+ 
-+ endif # MTD_REDBOOT_PARTS
-+ 
-++config MTD_QCOMSMEM_PARTS
-++	tristate "Qualcomm SMEM NAND flash partition parser"
-++	depends on MTD_NAND_QCOM || COMPILE_TEST
-++	depends on QCOM_SMEM
-++	help
-++	  This provides support for parsing partitions from Shared Memory (SMEM)
-++	  for NAND flash on Qualcomm platforms.
-++
-+ config MTD_ROUTERBOOT_PARTS
-+ 	tristate "RouterBoot flash partition parser"
-+ 	depends on MTD && OF
-+--- a/drivers/mtd/parsers/Makefile
-++++ b/drivers/mtd/parsers/Makefile
-+@@ -13,4 +13,5 @@ obj-$(CONFIG_MTD_AFS_PARTS)		+= afs.o
-+ obj-$(CONFIG_MTD_PARSER_TRX)		+= parser_trx.o
-+ obj-$(CONFIG_MTD_SHARPSL_PARTS)		+= sharpslpart.o
-+ obj-$(CONFIG_MTD_REDBOOT_PARTS)		+= redboot.o
-++obj-$(CONFIG_MTD_QCOMSMEM_PARTS)	+= qcomsmempart.o
-+ obj-$(CONFIG_MTD_ROUTERBOOT_PARTS)		+= routerbootpart.o
-+--- /dev/null
-++++ b/drivers/mtd/parsers/qcomsmempart.c
-+@@ -0,0 +1,170 @@
-++// SPDX-License-Identifier: GPL-2.0-only
-++/*
-++ * Qualcomm SMEM NAND flash partition parser
-++ *
-++ * Copyright (C) 2020, Linaro Ltd.
-++ */
-++
-++#include <linux/ctype.h>
-++#include <linux/module.h>
-++#include <linux/mtd/mtd.h>
-++#include <linux/mtd/partitions.h>
-++#include <linux/slab.h>
-++#include <linux/soc/qcom/smem.h>
-++
-++#define SMEM_AARM_PARTITION_TABLE	9
-++#define SMEM_APPS			0
-++
-++#define SMEM_FLASH_PART_MAGIC1		0x55ee73aa
-++#define SMEM_FLASH_PART_MAGIC2		0xe35ebddb
-++#define SMEM_FLASH_PTABLE_V3		3
-++#define SMEM_FLASH_PTABLE_V4		4
-++#define SMEM_FLASH_PTABLE_MAX_PARTS_V3	16
-++#define SMEM_FLASH_PTABLE_MAX_PARTS_V4	48
-++#define SMEM_FLASH_PTABLE_HDR_LEN	(4 * sizeof(u32))
-++#define SMEM_FLASH_PTABLE_NAME_SIZE	16
-++
-++/**
-++ * struct smem_flash_pentry - SMEM Flash partition entry
-++ * @name: Name of the partition
-++ * @offset: Offset in blocks
-++ * @length: Length of the partition in blocks
-++ * @attr: Flags for this partition
-++ */
-++struct smem_flash_pentry {
-++	char name[SMEM_FLASH_PTABLE_NAME_SIZE];
-++	__le32 offset;
-++	__le32 length;
-++	u8 attr;
-++} __packed __aligned(4);
-++
-++/**
-++ * struct smem_flash_ptable - SMEM Flash partition table
-++ * @magic1: Partition table Magic 1
-++ * @magic2: Partition table Magic 2
-++ * @version: Partition table version
-++ * @numparts: Number of partitions in this ptable
-++ * @pentry: Flash partition entries belonging to this ptable
-++ */
-++struct smem_flash_ptable {
-++	__le32 magic1;
-++	__le32 magic2;
-++	__le32 version;
-++	__le32 numparts;
-++	struct smem_flash_pentry pentry[SMEM_FLASH_PTABLE_MAX_PARTS_V4];
-++} __packed __aligned(4);
-++
-++static int parse_qcomsmem_part(struct mtd_info *mtd,
-++			       const struct mtd_partition **pparts,
-++			       struct mtd_part_parser_data *data)
-++{
-++	struct smem_flash_pentry *pentry;
-++	struct smem_flash_ptable *ptable;
-++	size_t len = SMEM_FLASH_PTABLE_HDR_LEN;
-++	struct mtd_partition *parts;
-++	int ret, i, numparts;
-++	char *name, *c;
-++
-++	pr_debug("Parsing partition table info from SMEM\n");
-++	ptable = qcom_smem_get(SMEM_APPS, SMEM_AARM_PARTITION_TABLE, &len);
-++	if (IS_ERR(ptable)) {
-++		pr_err("Error reading partition table header\n");
-++		return PTR_ERR(ptable);
-++	}
-++
-++	/* Verify ptable magic */
-++	if (le32_to_cpu(ptable->magic1) != SMEM_FLASH_PART_MAGIC1 ||
-++	    le32_to_cpu(ptable->magic2) != SMEM_FLASH_PART_MAGIC2) {
-++		pr_err("Partition table magic verification failed\n");
-++		return -EINVAL;
-++	}
-++
-++	/* Ensure that # of partitions is less than the max we have allocated */
-++	numparts = le32_to_cpu(ptable->numparts);
-++	if (numparts > SMEM_FLASH_PTABLE_MAX_PARTS_V4) {
-++		pr_err("Partition numbers exceed the max limit\n");
-++		return -EINVAL;
-++	}
-++
-++	/* Find out length of partition data based on table version */
-++	if (le32_to_cpu(ptable->version) <= SMEM_FLASH_PTABLE_V3) {
-++		len = SMEM_FLASH_PTABLE_HDR_LEN + SMEM_FLASH_PTABLE_MAX_PARTS_V3 *
-++			sizeof(struct smem_flash_pentry);
-++	} else if (le32_to_cpu(ptable->version) == SMEM_FLASH_PTABLE_V4) {
-++		len = SMEM_FLASH_PTABLE_HDR_LEN + SMEM_FLASH_PTABLE_MAX_PARTS_V4 *
-++			sizeof(struct smem_flash_pentry);
-++	} else {
-++		pr_err("Unknown ptable version (%d)", le32_to_cpu(ptable->version));
-++		return -EINVAL;
-++	}
-++
-++	/*
-++	 * Now that the partition table header has been parsed, verified
-++	 * and the length of the partition table calculated, read the
-++	 * complete partition table
-++	 */
-++	ptable = qcom_smem_get(SMEM_APPS, SMEM_AARM_PARTITION_TABLE, &len);
-++	if (IS_ERR_OR_NULL(ptable)) {
-++		pr_err("Error reading partition table\n");
-++		return PTR_ERR(ptable);
-++	}
-++
-++	parts = kcalloc(numparts, sizeof(*parts), GFP_KERNEL);
-++	if (!parts)
-++		return -ENOMEM;
-++
-++	for (i = 0; i < numparts; i++) {
-++		pentry = &ptable->pentry[i];
-++		if (pentry->name[0] == '\0')
-++			continue;
-++
-++		name = kstrdup(pentry->name, GFP_KERNEL);
-++		if (!name) {
-++			ret = -ENOMEM;
-++			goto out_free_parts;
-++		}
-++
-++		/* Convert name to lower case */
-++		for (c = name; *c != '\0'; c++)
-++			*c = tolower(*c);
-++
-++		parts[i].name = name;
-++		parts[i].offset = le32_to_cpu(pentry->offset) * mtd->erasesize;
-++		parts[i].mask_flags = pentry->attr;
-++		parts[i].size = le32_to_cpu(pentry->length) * mtd->erasesize;
-++		pr_debug("%d: %s offs=0x%08x size=0x%08x attr:0x%08x\n",
-++			 i, pentry->name, le32_to_cpu(pentry->offset),
-++			 le32_to_cpu(pentry->length), pentry->attr);
-++	}
-++
-++	pr_debug("SMEM partition table found: ver: %d len: %d\n",
-++		 le32_to_cpu(ptable->version), numparts);
-++	*pparts = parts;
-++
-++	return numparts;
-++
-++out_free_parts:
-++	while (--i >= 0)
-++		kfree(parts[i].name);
-++	kfree(parts);
-++	*pparts = NULL;
-++
-++	return ret;
-++}
-++
-++static const struct of_device_id qcomsmem_of_match_table[] = {
-++	{ .compatible = "qcom,smem-part" },
-++	{},
-++};
-++MODULE_DEVICE_TABLE(of, qcomsmem_of_match_table);
-++
-++static struct mtd_part_parser mtd_parser_qcomsmem = {
-++	.parse_fn = parse_qcomsmem_part,
-++	.name = "qcomsmem",
-++	.of_match_table = qcomsmem_of_match_table,
-++};
-++module_mtd_part_parser(mtd_parser_qcomsmem);
-++
-++MODULE_LICENSE("GPL v2");
-++MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
-++MODULE_DESCRIPTION("Qualcomm SMEM NAND flash partition parser");
-diff --git a/target/linux/ipq806x/patches-5.4/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch b/target/linux/ipq806x/patches-5.4/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch
-new file mode 100644
-index 0000000000..e83872935f
---- /dev/null
-+++ b/target/linux/ipq806x/patches-5.4/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch
-@@ -0,0 +1,24 @@
-+From 5001f2e1a325b68dbf225bd17f69a4d3d975cca5 Mon Sep 17 00:00:00 2001
-+From: John Crispin <john@phrozen.org>
-+Date: Thu, 9 Mar 2017 09:31:44 +0100
-+Subject: [PATCH 61/69] mtd: "rootfs" conflicts with OpenWrt auto mounting
-+
-+Signed-off-by: John Crispin <john@phrozen.org>
-+---
-+ drivers/mtd/parsers/qcomsmempart.c | 4 ++++
-+ 1 file changed, 4 insertions(+)
-+
-+--- a/drivers/mtd/parsers/qcomsmempart.c
-++++ b/drivers/mtd/parsers/qcomsmempart.c
-+@@ -132,6 +132,11 @@ static int parse_qcomsmem_part(struct mt
-+ 		parts[i].offset = le32_to_cpu(pentry->offset) * mtd->erasesize;
-+ 		parts[i].mask_flags = pentry->attr;
-+ 		parts[i].size = le32_to_cpu(pentry->length) * mtd->erasesize;
-++
-++		/* "rootfs" conflicts with OpenWrt auto mounting */
-++		if (mtd_type_is_nand(mtd) && !strcmp(name, "rootfs"))
-++			parts[i].name = "ubi";
-++
-+ 		pr_debug("%d: %s offs=0x%08x size=0x%08x attr:0x%08x\n",
-+ 			 i, pentry->name, le32_to_cpu(pentry->offset),
-+ 			 le32_to_cpu(pentry->length), pentry->attr);
-diff --git a/target/linux/ipq806x/patches-5.4/851-add-gsbi1-dts.patch b/target/linux/ipq806x/patches-5.4/851-add-gsbi1-dts.patch
-index f75f994904..a123189804 100644
---- a/target/linux/ipq806x/patches-5.4/851-add-gsbi1-dts.patch
-+++ b/target/linux/ipq806x/patches-5.4/851-add-gsbi1-dts.patch
-@@ -1,6 +1,6 @@
- --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
- +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
--@@ -865,6 +865,41 @@
-+@@ -894,6 +894,41 @@
-  			reg = <0x12100000 0x10000>;
-  		};
-  
-diff --git a/target/linux/ipq806x/patches-5.4/999-at803.patch b/target/linux/ipq806x/patches-5.4/999-at803.patch
-deleted file mode 100644
-index 0dda8bdd59..0000000000
---- a/target/linux/ipq806x/patches-5.4/999-at803.patch
-+++ /dev/null
-@@ -1,12 +0,0 @@
--Index: linux-5.4.111/drivers/net/phy/at803x.c
--===================================================================
----- linux-5.4.111.orig/drivers/net/phy/at803x.c
--+++ linux-5.4.111/drivers/net/phy/at803x.c
--@@ -486,6 +486,7 @@ static struct phy_driver at803x_driver[]
-- 	.phy_id_mask		= AT803X_PHY_ID_MASK,
-- 	.probe			= at803x_probe,
-- 	.config_init		= at803x_config_init,
--+	.link_change_notify	= at803x_link_change_notify,
-- 	.set_wol		= at803x_set_wol,
-- 	.get_wol		= at803x_get_wol,
-- 	.suspend		= at803x_suspend,
--- 
-2.25.1
-
diff --git a/patches/ipq806x/0003-ipq806x-add-edgecore_ssw2ac2600-support.patch b/patches/ipq806x/0003-ipq806x-add-edgecore_ssw2ac2600-support.patch
deleted file mode 100644
index 0a4bd1728..000000000
--- a/patches/ipq806x/0003-ipq806x-add-edgecore_ssw2ac2600-support.patch
+++ /dev/null
@@ -1,597 +0,0 @@
-From b91c659806905ea2c8dd71bdd552cad9e9a48c8a Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Wed, 18 Aug 2021 15:49:56 +0200
-Subject: [PATCH 27/30] ipq806x: add edgecore_ssw2ac2600 support
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/boot/uboot-envtools/files/ipq806x     |   1 +
- package/firmware/ipq-wifi/Makefile            |   2 +
- .../board-edgecore_ssw2ac2600.qca9984         | Bin 0 -> 24324 bytes
- .../ipq806x/base-files/etc/board.d/01_leds    |   1 +
- .../ipq806x/base-files/etc/board.d/02_network |   3 +
- .../etc/hotplug.d/firmware/11-ath10k-caldata  |   2 +
- .../ipq806x/base-files/etc/init.d/bootcount   |   1 +
- .../base-files/lib/upgrade/platform.sh        |   1 +
- .../arm/boot/dts/qcom-ipq8068-ssw2ac2600.dts  | 341 ++++++++++++++++++
- target/linux/ipq806x/image/Makefile           |  14 +
- .../0069-arm-boot-add-dts-files.patch         |   3 +-
- 11 files changed, 368 insertions(+), 1 deletion(-)
- create mode 100644 package/firmware/ipq-wifi/board-edgecore_ssw2ac2600.qca9984
- create mode 100644 target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ssw2ac2600.dts
-
-diff --git a/package/boot/uboot-envtools/files/ipq806x b/package/boot/uboot-envtools/files/ipq806x
-index 96a4ee6450..1b49fd51d4 100644
---- a/package/boot/uboot-envtools/files/ipq806x
-+++ b/package/boot/uboot-envtools/files/ipq806x
-@@ -31,6 +31,7 @@ ubootenv_mtdinfo () {
- }
- 
- case "$board" in
-+edgecore,ssw2ac2600 |\
- edgecore,ecw5410)
- 	ubootenv_add_uci_config "/dev/mtd11" "0x0" "0x10000" "0x10000"
- 	;;
-diff --git a/package/firmware/ipq-wifi/Makefile b/package/firmware/ipq-wifi/Makefile
-index cd7bfc3c82..a400ac9470 100644
---- a/package/firmware/ipq-wifi/Makefile
-+++ b/package/firmware/ipq-wifi/Makefile
-@@ -33,6 +33,7 @@ ALLWIFIBOARDS:= \
- 	devolo_magic-2-wifi-next \
- 	dlink_dap2610 \
- 	edgecore_ecw5410 \
-+	edgecore_ssw2ac2600 \
- 	edgecore_oap100 \
- 	engenius_eap2200 \
- 	engenius_emd1 \
-@@ -122,6 +123,7 @@ $(eval $(call generate-ipq-wifi-package,cellc_rtl30vw, Cell C RTL30VW))
- $(eval $(call generate-ipq-wifi-package,devolo_magic-2-wifi-next,devolo Magic 2 WiFi next))
- $(eval $(call generate-ipq-wifi-package,dlink_dap2610,D-Link DAP-2610))
- $(eval $(call generate-ipq-wifi-package,edgecore_ecw5410,Edgecore ECW5410))
-+$(eval $(call generate-ipq-wifi-package,edgecore_ssw2ac2600,Edgecore SSW2AC2600))
- $(eval $(call generate-ipq-wifi-package,edgecore_oap100,Edgecore OAP100))
- $(eval $(call generate-ipq-wifi-package,engenius_eap2200,EnGenius EAP2200))
- $(eval $(call generate-ipq-wifi-package,engenius_emd1,EnGenius EMD1))
-diff --git a/package/firmware/ipq-wifi/board-edgecore_ssw2ac2600.qca9984 b/package/firmware/ipq-wifi/board-edgecore_ssw2ac2600.qca9984
-new file mode 100644
-index 0000000000000000000000000000000000000000..2c1992001d86268e0483b9e53ed4b563e224ada4
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-z;4x)jtS4=7aO#GKkaBeE!`jISel1TildJWlZSaF#aH8`#oV1N;=@a5SkBWNdj@W|N
-zr-wnfdz2mucMk<e23NgrwUPmewZoFcESW71u(0-QJ;crLr!n%Lo>QjKSFE`EJOBRI
-zS6_aKfc{q8z5A~}e*fKf-$0!=e7+sdpB>*Sdw6|KJqn*Soq<PBH@xU8JASuXI4TW?
-zyQfbV%r(T_&z?=mbKu4_eey6ay7|Mz8<}pnHFCIn`YrQ<^=0!B6dl<^VI%HonMxU*
-ztqHHuz01bjBYBLl`%u<v#jxUVzb~WJJ(3Tx+@c-1UAQc9S+bJ>?$)rAm_h1?Axnc6
-z#C5m~a2en-z-55T0GEMBI0Hj5@eJ(VZQRc6hmOI(?%l_2j0f!_EciQO-Hlwxc}Fn7
-z6#q}Yz4h&_-jDzI=#P((PF6w}+WzL>zJScwqV|3w_@^F-2jT9I{C>;zmMg7eaQ6(h
-zpTXRtb|Ti%gLOf6=XpW~K<%maoJ##=z!2E|&l55FC}KLaPY&ZcYB!20Os31daQ6s<
-zP5oap(>aNF2y-x*_Z~Mkmx0O50K)ZS5ZAAI75?)+0l0p9czZ@anV5StHix^X&bmfh
-zak%@@W{&f_Z!_S?nXx^rJzIa@E^v$!<8b#7Wo3ck+koY5x`XjpBg5?5doK7Nj2+EG
-
-literal 0
-HcmV?d00001
-
-diff --git a/target/linux/ipq806x/base-files/etc/board.d/01_leds b/target/linux/ipq806x/base-files/etc/board.d/01_leds
-index 74b94a29b4..05c63c817f 100755
---- a/target/linux/ipq806x/base-files/etc/board.d/01_leds
-+++ b/target/linux/ipq806x/base-files/etc/board.d/01_leds
-@@ -17,6 +17,7 @@ compex,wpq864)
- 	ucidef_set_led_usbport "usb" "USB" "green:usb" "usb1-port1" "usb2-port1"
- 	ucidef_set_led_usbport "pcie-usb" "PCIe USB" "green:usb-pcie" "usb3-port1"
- 	;;
-+edgecore,ssw2ac2600 |\
- edgecore,ecw5410)
- 	ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wlan2g" "phy1tpt"
- 	ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wlan5g" "phy0tpt"
-diff --git a/target/linux/ipq806x/base-files/etc/board.d/02_network b/target/linux/ipq806x/base-files/etc/board.d/02_network
-index 1a1cec51aa..078de50a31 100755
---- a/target/linux/ipq806x/base-files/etc/board.d/02_network
-+++ b/target/linux/ipq806x/base-files/etc/board.d/02_network
-@@ -27,11 +27,14 @@ tplink,vr2600v)
- 	ucidef_add_switch "switch0" \
- 		"1:lan" "2:lan" "3:lan" "4:lan" "6@eth1" "5:wan" "0@eth0"
- 	;;
-+edgecore,ssw2ac2600 |\
- edgecore,ecw5410)
- 	ucidef_set_interfaces_lan_wan "eth1" "eth0"
- 	if [ -b "$(find_mtd_part 0:art)" ]; then
- 		ucidef_set_interface_macaddr "lan" "$(mtd_get_mac_binary "0:art" 0x6)"
- 		ucidef_set_interface_macaddr "wan" "$(mtd_get_mac_binary "0:art" 0x0)"
-+		ucidef_set_network_device_mac "eth1" "$(mtd_get_mac_binary "0:art" 0x6)"
-+		ucidef_set_network_device_mac "eth0" "$(mtd_get_mac_binary "0:art" 0x0)"
- 	else
- 		# XXX: drop upper case after kernel v5.4 is gone (qcom-smem)
- 		ucidef_set_interface_macaddr "lan" "$(mtd_get_mac_binary "0:ART" 0x6)"
-diff --git a/target/linux/ipq806x/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq806x/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-index b9d0fec25e..ae8feba798 100644
---- a/target/linux/ipq806x/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-+++ b/target/linux/ipq806x/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
-@@ -74,6 +74,7 @@ case "$FIRMWARE" in
- 		caldata_extract "ART" 0x5000 0x2f20
- 		ath10k_patch_mac $(mtd_get_mac_binary ART 0x18)
- 		;;
-+	edgecore,ssw2ac2600 |\
- 	edgecore,ecw5410)
- 		if [ -b "$(find_mtd_part 0:art)" ]; then
- 			caldata_extract "0:art" 0x1000 0x2f20
-@@ -121,6 +122,7 @@ case "$FIRMWARE" in
- 	;;
- "ath10k/pre-cal-pci-0002:01:00.0.bin")
- 	case $board in
-+	edgecore,ssw2ac2600 |\
- 	edgecore,ecw5410)
- 		if [ -b "$(find_mtd_part 0:art)" ]; then
- 			caldata_extract "0:art" 0x5000 0x2f20
-diff --git a/target/linux/ipq806x/base-files/etc/init.d/bootcount b/target/linux/ipq806x/base-files/etc/init.d/bootcount
-index cb32a4ed35..f555e1af9a 100755
---- a/target/linux/ipq806x/base-files/etc/init.d/bootcount
-+++ b/target/linux/ipq806x/base-files/etc/init.d/bootcount
-@@ -9,6 +9,7 @@ boot() {
- 	asrock,g10)
- 		asrock_bootconfig_mangle "bootcheck" && reboot
- 		;;
-+	edgecore,ssw2ac2600|\
- 	edgecore,ecw5410)
- 		fw_setenv bootcount 0
- 		;;
-diff --git a/target/linux/ipq806x/base-files/lib/upgrade/platform.sh b/target/linux/ipq806x/base-files/lib/upgrade/platform.sh
-index a5e18201df..f3ac923ccb 100644
---- a/target/linux/ipq806x/base-files/lib/upgrade/platform.sh
-+++ b/target/linux/ipq806x/base-files/lib/upgrade/platform.sh
-@@ -29,6 +29,7 @@ platform_do_upgrade() {
- 		CI_ROOTPART="ubi_rootfs"
- 		nand_do_upgrade "$1"
- 		;;
-+	edgecore,ssw2ac2600|\
- 	edgecore,ecw5410)
- 		part="$(awk -F 'ubi.mtd=' '{printf $2}' /proc/cmdline | sed -e 's/ .*$//')"
- 		if [ "$part" = "rootfs1" ]; then
-diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ssw2ac2600.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ssw2ac2600.dts
-new file mode 100644
-index 0000000000..b5608c2f94
---- /dev/null
-+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ssw2ac2600.dts
-@@ -0,0 +1,341 @@
-+#include "qcom-ipq8064-v2.0.dtsi"
-+
-+#include <dt-bindings/input/input.h>
-+#include <dt-bindings/soc/qcom,tcsr.h>
-+
-+/ {
-+	model = "Edgecore SSW2AC2600";
-+	compatible = "edgecore,ssw2ac2600", "qcom,ipq8064";
-+
-+	reserved-memory {
-+		nss@40000000 {
-+			reg = <0x40000000 0x1000000>;
-+			no-map;
-+		};
-+
-+		smem: smem@41000000 {
-+			reg = <0x41000000 0x200000>;
-+			no-map;
-+		};
-+
-+		wifi_dump@44000000 {
-+			reg = <0x44000000 0x600000>;
-+			no-map;
-+		};
-+	};
-+
-+	cpus {
-+		idle-states {
-+			CPU_SPC: spc {
-+				status = "disabled";
-+			};
-+		};
-+	};
-+
-+	aliases {
-+		serial1 = &gsbi1_serial;
-+		mdio-gpio0 = &mdio0;
-+		ethernet0 = &gmac3;
-+		ethernet1 = &gmac2;
-+
-+		led-boot = &led_power_green;
-+		led-failsafe = &led_power_red;
-+		led-running = &led_power_green;
-+		led-upgrade = &led_power_green;
-+	};
-+
-+	chosen {
-+		bootargs-append = " console=ttyMSM0,115200n8 root=/dev/ubiblock0_1";
-+	};
-+
-+	keys {
-+		compatible = "gpio-keys";
-+		pinctrl-0 = <&button_pins>;
-+		pinctrl-names = "default";
-+
-+		reset {
-+			label = "reset";
-+			gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_RESTART>;
-+			debounce-interval = <60>;
-+			wakeup-source;
-+		};
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+		pinctrl-0 = <&led_pins>;
-+		pinctrl-names = "default";
-+
-+		led_power_green: power_green {
-+			label = "green:power";
-+			gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		wlan2g_green {
-+			label = "green:wlan2g";
-+			gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		wlan2g_yellow {
-+			label = "yellow:wlan2g";
-+			gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		wlan5g_green {
-+			label = "green:wlan5g";
-+			gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		led_power_red: power_red {
-+			label = "red:power";
-+			gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		wlan5g_yellow {
-+			label = "yellow:wlan5g";
-+			gpios = <&qcom_pinmux 59 GPIO_ACTIVE_LOW>;
-+		};
-+	};
-+};
-+
-+
-+&qcom_pinmux {
-+	spi_pins: spi_pins {
-+		mux {
-+			pins = "gpio18", "gpio19";
-+			function = "gsbi5";
-+			drive-strength = <10>;
-+			bias-pull-down;
-+		};
-+
-+		clk {
-+			pins = "gpio21";
-+			function = "gsbi5";
-+			drive-strength = <12>;
-+			bias-pull-down;
-+		};
-+
-+		cs {
-+			pins = "gpio20";
-+			function = "gpio";
-+			drive-strength = <10>;
-+			bias-pull-up;
-+		};
-+	};
-+
-+	led_pins: led_pins {
-+		mux {
-+			pins = "gpio16", "gpio23", "gpio24", "gpio26",
-+				   "gpio28", "gpio59";
-+			function = "gpio";
-+			drive-strength = <2>;
-+			bias-pull-up;
-+		};
-+	};
-+
-+	button_pins: button_pins {
-+		mux {
-+			pins = "gpio25";
-+			function = "gpio";
-+			drive-strength = <2>;
-+			bias-pull-up;
-+		};
-+	};
-+
-+	uart1_pins: uart1_pins {
-+		mux {
-+			pins = "gpio51", "gpio52", "gpio53", "gpio54";
-+			function = "gsbi1";
-+			drive-strength = <12>;
-+			bias-none;
-+		};
-+	};
-+};
-+
-+&gsbi1 {
-+	qcom,mode = <GSBI_PROT_UART_W_FC>;
-+	status = "okay";
-+
-+	serial@12450000 {
-+		status = "okay";
-+
-+		pinctrl-0 = <&uart1_pins>;
-+		pinctrl-names = "default";
-+	};
-+};
-+
-+&gsbi5 {
-+	qcom,mode = <GSBI_PROT_SPI>;
-+	status = "okay";
-+
-+	spi4: spi@1a280000 {
-+		status = "okay";
-+		spi-max-frequency = <50000000>;
-+
-+		pinctrl-0 = <&spi_pins>;
-+		pinctrl-names = "default";
-+
-+		cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
-+
-+		m25p80@0 {
-+			compatible = "jedec,spi-nor";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+			spi-max-frequency = <50000000>;
-+			reg = <0>;
-+
-+			partitions {
-+				compatible = "qcom,smem-part";
-+			};
-+		};
-+	};
-+};
-+
-+&hs_phy_0 {		/* USB3 port 0 HS phy */
-+	status = "okay";
-+};
-+
-+&hs_phy_1 {		/* USB3 port 1 HS phy */
-+	status = "okay";
-+};
-+
-+&ss_phy_0 {		/* USB3 port 0 SS phy */
-+	status = "okay";
-+};
-+
-+&ss_phy_1 {		/* USB3 port 1 SS phy */
-+	status = "okay";
-+};
-+
-+&usb3_0 {
-+	status = "okay";
-+};
-+
-+&usb3_1 {
-+	status = "okay";
-+};
-+
-+&pcie1 {
-+	status = "okay";
-+
-+	/delete-property/ pinctrl-0;
-+	/delete-property/ pinctrl-names;
-+	/delete-property/ perst-gpios;
-+
-+	bridge@0,0 {
-+		reg = <0x00000000 0 0 0 0>;
-+		#address-cells = <3>;
-+		#size-cells = <2>;
-+		ranges;
-+
-+		wifi@1,0 {
-+			compatible = "qcom,ath10k";
-+			status = "okay";
-+			reg = <0x00010000 0 0 0 0>;
-+			qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
-+		};
-+	};
-+};
-+
-+&pcie2 {
-+	status = "okay";
-+
-+	/delete-property/ pinctrl-0;
-+	/delete-property/ pinctrl-names;
-+	/delete-property/ perst-gpios;
-+
-+	bridge@0,0 {
-+		reg = <0x00000000 0 0 0 0>;
-+		#address-cells = <3>;
-+		#size-cells = <2>;
-+		ranges;
-+
-+		wifi@1,0 {
-+			compatible = "qcom,ath10k";
-+			status = "okay";
-+			reg = <0x00010000 0 0 0 0>;
-+			qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
-+		};
-+	};
-+};
-+
-+&nand_controller {
-+	status = "okay";
-+
-+	pinctrl-0 = <&nand_pins>;
-+	pinctrl-names = "default";
-+
-+	nand@0 {
-+		compatible = "qcom,nandcs";
-+
-+		reg = <0>;
-+
-+		nand-ecc-strength = <4>;
-+		nand-bus-width = <8>;
-+		nand-ecc-step-size = <512>;
-+
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			rootfs1@0 {
-+				label = "rootfs1";
-+				reg = <0x0000000 0x4000000>;
-+			};
-+
-+			rootfs2@4000000 {
-+				label = "rootfs2";
-+				reg = <0x4000000 0x4000000>;
-+			};
-+		};
-+	};
-+};
-+
-+&soc {
-+	mdio1: mdio {
-+		compatible = "virtual,mdio-gpio";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		status = "okay";
-+
-+		pinctrl-0 = <&mdio0_pins>;
-+		pinctrl-names = "default";
-+
-+		gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
-+
-+		phy0: ethernet-phy@0 {
-+			reg = <0>;
-+		};
-+
-+		phy1: ethernet-phy@1 {
-+			reg = <1>;
-+		};
-+	};
-+};
-+
-+&gmac2 {
-+	status = "okay";
-+
-+	qcom,id = <2>;
-+	mdiobus = <&mdio0>;
-+
-+	phy-mode = "sgmii";
-+	phy-handle = <&phy1>;
-+};
-+
-+&gmac3 {
-+	status = "okay";
-+
-+	qcom,id = <3>;
-+	mdiobus = <&mdio1>;
-+
-+	phy-mode = "sgmii";
-+	phy-handle = <&phy0>;
-+};
-+
-+&adm_dma {
-+	status = "okay";
-+};
-diff --git a/target/linux/ipq806x/image/Makefile b/target/linux/ipq806x/image/Makefile
-index 93e7ba3151..8c000075c6 100644
---- a/target/linux/ipq806x/image/Makefile
-+++ b/target/linux/ipq806x/image/Makefile
-@@ -157,6 +157,20 @@ define Device/edgecore_ecw5410
- endef
- TARGET_DEVICES += edgecore_ecw5410
- 
-+define Device/edgecore_ssw2ac2600
-+	$(call Device/FitImage)
-+	$(call Device/UbiFit)
-+	DEVICE_VENDOR := Edgecore
-+	DEVICE_MODEL := SSW2AC2600
-+	SOC := qcom-ipq8068
-+	BLOCKSIZE := 128k
-+	PAGESIZE := 2048
-+	DEVICE_DTS := qcom-ipq8068-ssw2ac2600
-+	DEVICE_DTS_CONFIG := config@v2.0-ap160
-+	DEVICE_PACKAGES := ath10k-firmware-qca9984-ct ipq-wifi-edgecore_ssw2ac2600
-+endef
-+TARGET_DEVICES += edgecore_ssw2ac2600
-+
- define Device/linksys_ea7500-v1
- 	$(call Device/LegacyImage)
- 	DEVICE_VENDOR := Linksys
-diff --git a/target/linux/ipq806x/patches-5.4/0069-arm-boot-add-dts-files.patch b/target/linux/ipq806x/patches-5.4/0069-arm-boot-add-dts-files.patch
-index b97d36fd7c..7cb1d9cc75 100644
---- a/target/linux/ipq806x/patches-5.4/0069-arm-boot-add-dts-files.patch
-+++ b/target/linux/ipq806x/patches-5.4/0069-arm-boot-add-dts-files.patch
-@@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
- 
- --- a/arch/arm/boot/dts/Makefile
- +++ b/arch/arm/boot/dts/Makefile
--@@ -842,7 +842,25 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-+@@ -842,7 +842,26 @@ dtb-$(CONFIG_ARCH_QCOM) += \
-  	qcom-ipq4019-ap.dk04.1-c3.dtb \
-  	qcom-ipq4019-ap.dk07.1-c1.dtb \
-  	qcom-ipq4019-ap.dk07.1-c2.dtb \
-@@ -33,6 +33,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
- +	qcom-ipq8065-r7800.dtb \
- +	qcom-ipq8065-rt4230w-rev6.dtb \
- +	qcom-ipq8068-ecw5410.dtb \
-++	qcom-ipq8068-ssw2ac2600.dtb \
-  	qcom-msm8660-surf.dtb \
-  	qcom-msm8960-cdp.dtb \
-  	qcom-msm8974-fairphone-fp2.dtb \
--- 
-2.25.1
-
diff --git a/patches/ipq807x/0005-om-fwupgradecfg-gen-Add-support-for-Plasma-Cloud-PAX.patch b/patches/ipq807x/0005-om-fwupgradecfg-gen-Add-support-for-Plasma-Cloud-PAX.patch
deleted file mode 100644
index e169b2c7a..000000000
--- a/patches/ipq807x/0005-om-fwupgradecfg-gen-Add-support-for-Plasma-Cloud-PAX.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-From: Sven Eckelmann <sven@narfation.org>
-Date: Mon, 14 Mar 2022 15:23:40 +0100
-Subject: om-fwupgradecfg-gen: Add support for Plasma Cloud PAX1800 v1/v2
-
-Signed-off-by: Sven Eckelmann <sven@narfation.org>
-
-diff --git a/scripts/om-fwupgradecfg-gen.sh b/scripts/om-fwupgradecfg-gen.sh
-index bf7c047c5ba8e78ad4e43fa7edff2bb4bb3f4388..61617a0b772e1661a46f559380ffaf0b021c524d 100755
---- a/scripts/om-fwupgradecfg-gen.sh
-+++ b/scripts/om-fwupgradecfg-gen.sh
-@@ -45,6 +45,13 @@ case $CE_TYPE in
- 		SIZE_FACTOR=1024
- 		SIZE_FORMAT="0x%08x"
- 		;;
-+	PAX1800|\
-+	PAX1800v2)
-+		MAX_PART_SIZE=28672
-+		KERNEL_FLASH_ADDR=0x3a0000
-+		SIZE_FACTOR=1024
-+		SIZE_FORMAT="0x%08x"
-+		;;
- 	*)
- 		echo "Error - unsupported ce type: $CE_TYPE"
- 		exit 1
diff --git a/patches/ipq807x/0006-toolchain-gcc-fix-building-gcc-5.5-on-newer-systems.patch b/patches/ipq807x/0006-toolchain-gcc-fix-building-gcc-5.5-on-newer-systems.patch
deleted file mode 100644
index ecf2901dc..000000000
--- a/patches/ipq807x/0006-toolchain-gcc-fix-building-gcc-5.5-on-newer-systems.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From: Felix Fietkau <nbd@nbd.name>
-Date: Tue, 1 Mar 2022 17:03:50 +0100
-Subject: toolchain/gcc: fix building gcc 5.5 on newer systems
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
-
-diff --git a/toolchain/gcc/patches/5.5.0/003-build_fix.patch b/toolchain/gcc/patches/5.5.0/003-build_fix.patch
-new file mode 100644
-index 0000000000000000000000000000000000000000..9602cd3b1cbc6ae787690a44564132d1af05746a
---- /dev/null
-+++ b/toolchain/gcc/patches/5.5.0/003-build_fix.patch
-@@ -0,0 +1,11 @@
-+--- a/gcc/reload.h
-++++ b/gcc/reload.h
-+@@ -168,7 +168,7 @@ struct target_reload {
-+      value indicates the level of indirect addressing supported, e.g., two
-+      means that (MEM (MEM (REG n))) is also valid if (REG n) does not get
-+      a hard register.  */
-+-  bool x_spill_indirect_levels;
-++  unsigned char x_spill_indirect_levels;
-+ 
-+   /* True if caller-save has been reinitialized.  */
-+   bool x_caller_save_initialized_p;
diff --git a/patches/ipq807x/0007-uboot-envtools-ipq807x-fix-syntax.patch b/patches/ipq807x/0007-uboot-envtools-ipq807x-fix-syntax.patch
deleted file mode 100644
index 73a88100f..000000000
--- a/patches/ipq807x/0007-uboot-envtools-ipq807x-fix-syntax.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From 326075f4a7002886b2e3c0f19215f71e8e8d78dd Mon Sep 17 00:00:00 2001
-From: Ravi Vaishnav <ravi.vaishnav@netexperience.com>
-Date: Mon, 23 Jan 2023 13:49:57 -0500
-Subject: [PATCH] uboot-envtools. ipq807x. Fix syntax
-
-Signed-off-by: Ravi Vaishnav <ravi.vaishnav@netexperience.com>
----
- package/boot/uboot-envtools/files/ipq807x | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/package/boot/uboot-envtools/files/ipq807x b/package/boot/uboot-envtools/files/ipq807x
-index 6c429f1852..37e06dca04 100644
---- a/package/boot/uboot-envtools/files/ipq807x
-+++ b/package/boot/uboot-envtools/files/ipq807x
-@@ -21,7 +21,7 @@ ubootenv_mtdinfo () {
- 		ubootenv_size=0x40000
- 	fi
- 
--	sectors=$(( $ubootenv_size / $mtd_erase ))
-+	sectors=$(printf '0x%x' $(( $ubootenv_size / $mtd_erase )))
- 	echo /dev/$mtd_dev 0x0 $ubootenv_size $mtd_erase $sectors
- }
- 
--- 
-2.25.1
-
diff --git a/patches/ipq807x/0008-Add-fw_printenv-support-for-EMMC.patch b/patches/ipq807x/0008-Add-fw_printenv-support-for-EMMC.patch
deleted file mode 100644
index 1f42dc08e..000000000
--- a/patches/ipq807x/0008-Add-fw_printenv-support-for-EMMC.patch
+++ /dev/null
@@ -1,120 +0,0 @@
-From 7d2818e1e1b49b9172c66171e9a96f4cdb9418ff Mon Sep 17 00:00:00 2001
-From: Ken <xshi@actiontec.com>
-Date: Tue, 7 Feb 2023 14:39:52 +0800
-Subject: [PATCH 1/9] Add fw_printenv support for EMMC
-
----
- package/base-files/files/lib/functions.sh | 13 ++++++++++++
- package/boot/uboot-envtools/files/ipq60xx | 24 +++++++++++++++++++----
- package/boot/uboot-envtools/files/ipq807x | 24 +++++++++++++++++++----
- 3 files changed, 53 insertions(+), 8 deletions(-)
-
-diff --git a/package/base-files/files/lib/functions.sh b/package/base-files/files/lib/functions.sh
-index 2bad45324f..415e0763ed 100644
---- a/package/base-files/files/lib/functions.sh
-+++ b/package/base-files/files/lib/functions.sh
-@@ -32,6 +32,19 @@ xor() {
- 	printf "%0${retlen}x" "$ret"
- }
- 
-+find_mmc_part() {
-+        local DEVNAME PARTNAME
-+        if grep -q "$1" /proc/mtd; then
-+                echo "" && return 0
-+        fi
-+
-+        for DEVNAME in /sys/block/mmcblk*/mmcblk*p*; do
-+                PARTNAME=$(grep PARTNAME ${DEVNAME}/uevent | cut -f2 -d'=')
-+                [ "$PARTNAME" = "$1" ] && echo "/dev/$(basename $DEVNAME)" && return 0
-+        done
-+}
-+
-+
- append() {
- 	local var="$1"
- 	local value="$2"
-diff --git a/package/boot/uboot-envtools/files/ipq60xx b/package/boot/uboot-envtools/files/ipq60xx
-index 84ed73f288..8863df4225 100644
---- a/package/boot/uboot-envtools/files/ipq60xx
-+++ b/package/boot/uboot-envtools/files/ipq60xx
-@@ -13,16 +13,32 @@ ubootenv_mtdinfo () {
- 	mtd_size=$(echo $UBOOTENV_PART | awk '{print "0x"$2}')
- 	mtd_erase=$(echo $UBOOTENV_PART | awk '{print "0x"$3}')
- 	nor_flash=$(find /sys/bus/spi/devices/*/mtd -name ${mtd_dev})
--
--	if [ -n "$nor_flash" ]; then
-+    	found_emmc=0
-+    
-+         if [ -z "$UBOOTENV_PART" ]; then
-+                mtd_dev=$(echo $(find_mmc_part "0:APPSBLENV") | sed 's/^.\{5\}//')
-+                if [ -n "$mtd_dev" ]; then
-+                        EMMC_UBOOTENV_PART=$(cat /proc/partitions | grep $mtd_dev)
-+                        #convert block to bytes
-+                        emmc_ubootenv_size=`expr $(echo $EMMC_UBOOTENV_PART | awk '{print $3}') \* 1024`
-+                        ubootenv_size=0x`printf "%x" $emmc_ubootenv_size`
-+			found_emmc=1
-+                fi
-+                mtd_erase=""
-+        
-+	elif [ -n "$nor_flash" ]; then
- 		ubootenv_size=$mtd_size
- 	else
- 		# size is fixed to 0x40000 in u-boot
- 		ubootenv_size=0x40000
- 	fi
-+	if [ $found_emmc -eq 0 ]; then
-+                sectors=$(printf '0x%x' $(( $ubootenv_size / $mtd_erase )))
-+                echo /dev/$mtd_dev 0x0 $ubootenv_size $mtd_erase $sectors
-+	else
-+                echo /dev/$mtd_dev 0x0 $ubootenv_size
-+	fi
- 
--	sectors=$(( $ubootenv_size / $mtd_erase ))
--	echo /dev/$mtd_dev 0x0 $ubootenv_size $mtd_erase $sectors
- }
- 
- case "$board" in
-diff --git a/package/boot/uboot-envtools/files/ipq807x b/package/boot/uboot-envtools/files/ipq807x
-index 2dcd294964..8863df4225 100644
---- a/package/boot/uboot-envtools/files/ipq807x
-+++ b/package/boot/uboot-envtools/files/ipq807x
-@@ -13,16 +13,32 @@ ubootenv_mtdinfo () {
- 	mtd_size=$(echo $UBOOTENV_PART | awk '{print "0x"$2}')
- 	mtd_erase=$(echo $UBOOTENV_PART | awk '{print "0x"$3}')
- 	nor_flash=$(find /sys/bus/spi/devices/*/mtd -name ${mtd_dev})
--
--	if [ -n "$nor_flash" ]; then
-+    	found_emmc=0
-+    
-+         if [ -z "$UBOOTENV_PART" ]; then
-+                mtd_dev=$(echo $(find_mmc_part "0:APPSBLENV") | sed 's/^.\{5\}//')
-+                if [ -n "$mtd_dev" ]; then
-+                        EMMC_UBOOTENV_PART=$(cat /proc/partitions | grep $mtd_dev)
-+                        #convert block to bytes
-+                        emmc_ubootenv_size=`expr $(echo $EMMC_UBOOTENV_PART | awk '{print $3}') \* 1024`
-+                        ubootenv_size=0x`printf "%x" $emmc_ubootenv_size`
-+			found_emmc=1
-+                fi
-+                mtd_erase=""
-+        
-+	elif [ -n "$nor_flash" ]; then
- 		ubootenv_size=$mtd_size
- 	else
- 		# size is fixed to 0x40000 in u-boot
- 		ubootenv_size=0x40000
- 	fi
-+	if [ $found_emmc -eq 0 ]; then
-+                sectors=$(printf '0x%x' $(( $ubootenv_size / $mtd_erase )))
-+                echo /dev/$mtd_dev 0x0 $ubootenv_size $mtd_erase $sectors
-+	else
-+                echo /dev/$mtd_dev 0x0 $ubootenv_size
-+	fi
- 
--	sectors=$(printf '0x%x' $(( $ubootenv_size / $mtd_erase )))
--	echo /dev/$mtd_dev 0x0 $ubootenv_size $mtd_erase $sectors
- }
- 
- case "$board" in
--- 
-2.34.1
-
diff --git a/patches/ipq807x/0009-Add-RTL8367C-S-compile-option.patch b/patches/ipq807x/0009-Add-RTL8367C-S-compile-option.patch
deleted file mode 100644
index f710151d8..000000000
--- a/patches/ipq807x/0009-Add-RTL8367C-S-compile-option.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From df7b592c06c29014ad804e16785e563dd34ff6d1 Mon Sep 17 00:00:00 2001
-From: Ken <xshi@actiontec.com>
-Date: Thu, 16 Mar 2023 22:29:41 +0800
-Subject: [PATCH] Add RTL8367C/S switch compile option
-
----
- package/kernel/linux/modules/netdevices.mk | 17 ++++++++++++++++-
- 1 file changed, 16 insertions(+), 1 deletion(-)
-
-diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk
-index 0df00feed5..44a91d3d87 100644
---- a/package/kernel/linux/modules/netdevices.mk
-+++ b/package/kernel/linux/modules/netdevices.mk
-@@ -323,7 +323,7 @@ define KernelPackage/switch-rtl8366-smi
-   SUBMENU:=$(NETWORK_DEVICES_MENU)
-   TITLE:=Realtek RTL8366 SMI switch interface support
-   DEPENDS:=@GPIO_SUPPORT +kmod-swconfig +(TARGET_armvirt||TARGET_bcm27xx_bcm2708||TARGET_tegra):kmod-of-mdio
--  KCONFIG:=CONFIG_RTL8366_SMI
-+  KCONFIG:=CONFIG_RTL8366_SMI=y
-   FILES:=$(LINUX_DIR)/drivers/net/phy/rtl8366_smi.ko
-   AUTOLOAD:=$(call AutoLoad,42,rtl8366_smi,1)
- endef
-@@ -382,6 +382,21 @@ endef
- 
- $(eval $(call KernelPackage,switch-rtl8367b))
- 
-+define KernelPackage/switch-rtl8367c
-+  SUBMENU:=$(NETWORK_DEVICES_MENU)
-+  TITLE:=Realtek RTL8367C/S switch support
-+  DEPENDS:=+kmod-switch-rtl8366-smi
-+  KCONFIG:=CONFIG_RTL8367C_PHY=y
-+  FILES:=$(LINUX_DIR)/drivers/net/phy/rtl8367c.ko
-+  AUTOLOAD:=$(call AutoLoad,43,rtl8367c,1)
-+endef
-+
-+define KernelPackage/switch-rtl8367c/description
-+ Realtek RTL8367C/S switch support
-+endef
-+
-+$(eval $(call KernelPackage,switch-rtl8367c))
-+
- 
- define KernelPackage/natsemi
-   SUBMENU:=$(NETWORK_DEVICES_MENU)
--- 
-2.34.1
-
diff --git a/patches/ipq807x/0009-fixes.patch b/patches/ipq807x/0009-fixes.patch
deleted file mode 100644
index fad4bc785..000000000
--- a/patches/ipq807x/0009-fixes.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From 833545e6979f50ab476d46f424dd47a8107f2dd6 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Wed, 22 Mar 2023 15:08:54 +0100
-Subject: [PATCH] fixes
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- include/kernel-version.mk     | 4 ++++
- include/target.mk             | 3 ++-
- package/kernel/nat46/Makefile | 2 +-
- scripts/apk-make-index.sh     | 2 ++
- 4 files changed, 9 insertions(+), 2 deletions(-)
-
-diff --git a/include/kernel-version.mk b/include/kernel-version.mk
-index d041819b08..f4daad2e39 100644
---- a/include/kernel-version.mk
-+++ b/include/kernel-version.mk
-@@ -18,7 +18,11 @@ LINUX_VERSION-5.10 = .27
- LINUX_KERNEL_HASH-4.4.60 = e7f2f47acf17497d6ffd713eda65c025b3df0bce09faa8c04712bf1b3cfc9fdb
- LINUX_KERNEL_HASH-4.14.193 = 0b0fb41d4430e1a42738b341cbfd2f41951aa5cd02acabbd53f076119c8b9f03
- LINUX_KERNEL_HASH-5.4.158 = 6e018fecdc8fc24553756e582d83b82d65b10a6b03ef36262a24911f839b8d59
-+ifeq ($(CONFIG_TARGET_ipq95xx),y)
-+LINUX_KERNEL_HASH-5.4.164 = 0b2987b4b838d169b49f33f01ffa1bb1940eda8f159632943a6db2a3f61db233
-+else
- LINUX_KERNEL_HASH-5.4.164 = a8fdb27e0e7a871086e0c78b899088c21fbc8e16fb236d220926dc4c93e0fb2d
-+endif
- LINUX_KERNEL_HASH-5.10.27 = d99dc9662951299c53a0a8d8c8d0a72a16ff861d20e927c0f9b14f63282d69d9
- 
- remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
-diff --git a/include/target.mk b/include/target.mk
-index a3ad598ebc..57a4f5e9e4 100644
---- a/include/target.mk
-+++ b/include/target.mk
-@@ -248,7 +248,8 @@ ifeq ($(DUMP),1)
-     CPU_TYPE ?= generic
-     CPU_CFLAGS_generic = -mcpu=generic
-     CPU_CFLAGS_cortex-a53 = -mcpu=cortex-a53
--  endif
-+    CPU_CFLAGS_cortex-a73 = -mcpu=cortex-a73+crypto
-+ endif
-   ifeq ($(ARCH),arc)
-     CPU_TYPE ?= arc700
-     CPU_CFLAGS += -matomic
-diff --git a/package/kernel/nat46/Makefile b/package/kernel/nat46/Makefile
-index c2bf582cfa..1d5660c55e 100644
---- a/package/kernel/nat46/Makefile
-+++ b/package/kernel/nat46/Makefile
-@@ -28,7 +28,7 @@ include $(INCLUDE_DIR)/kernel-defaults.mk
- define Build/Compile
- 	$(KERNEL_MAKE) M="$(PKG_BUILD_DIR)/nat46/modules" \
- 		MODFLAGS="-DMODULE -mlong-calls" \
--		EXTRA_CFLAGS="-DNAT46_VERSION=\\\"$(PKG_SOURCE_VERSION)\\\"" \
-+		EXTRA_CFLAGS="-DNAT46_VERSION=\\\"$(PKG_SOURCE_VERSION)\\\" -Wno-error=vla" \
- 		modules
- endef
- 
-diff --git a/scripts/apk-make-index.sh b/scripts/apk-make-index.sh
-index df1f1a2e2b..600464ea15 100755
---- a/scripts/apk-make-index.sh
-+++ b/scripts/apk-make-index.sh
-@@ -1,6 +1,8 @@
- #!/usr/bin/env bash
- set -e
- 
-+exit 0
-+
- pkg_dir=$1
- 
- if [ -z "$pkg_dir" ] || [ ! -d "$pkg_dir" ]; then
--- 
-2.34.1
-
diff --git a/patches/ramips/0001-ramips-add-tplink-ex228-support.patch b/patches/ramips/0001-ramips-add-tplink-ex228-support.patch
deleted file mode 100644
index c5c00d88c..000000000
--- a/patches/ramips/0001-ramips-add-tplink-ex228-support.patch
+++ /dev/null
@@ -1,197 +0,0 @@
-From 2970ecaae31c8e42cf1ef5cff2a78cf57701070e Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Thu, 27 May 2021 16:48:27 +0200
-Subject: [PATCH 18/43] ramips: add tplink ex228 support
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- .../linux/ramips/dts/mt7621_tplink_ex228.dts  | 129 ++++++++++++++++++
- target/linux/ramips/image/mt7621.mk           |  10 ++
- .../mt7621/base-files/etc/board.d/02_network  |   1 +
- .../mt7621/base-files/lib/upgrade/platform.sh |   1 +
- 4 files changed, 141 insertions(+)
- create mode 100644 target/linux/ramips/dts/mt7621_tplink_ex228.dts
-
-diff --git a/target/linux/ramips/dts/mt7621_tplink_ex228.dts b/target/linux/ramips/dts/mt7621_tplink_ex228.dts
-new file mode 100644
-index 0000000000..9e5cc9ef01
---- /dev/null
-+++ b/target/linux/ramips/dts/mt7621_tplink_ex228.dts
-@@ -0,0 +1,129 @@
-+#include "mt7621.dtsi"
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+
-+/ {
-+	compatible = "tplink,ex228", "mediatek,mt7621-soc";
-+	model = "TP-Link EX228";
-+
-+	aliases {
-+		led-boot = &led_status;
-+		led-failsafe = &led_status;
-+		led-running = &led_status;
-+		led-upgrade = &led_status;
-+	};
-+
-+	chosen {
-+		bootargs = "console=ttyS0,115200";
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		led_status: blue {
-+			label = "blue:status";
-+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		green {
-+			label = "green:system";
-+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		red {
-+			label = "green:system";
-+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
-+		};
-+	};
-+
-+	keys {
-+		compatible = "gpio-keys";
-+
-+		reset {
-+			label = "reset";
-+			gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
-+			linux,code = <KEY_RESTART>;
-+		};
-+	};
-+};
-+
-+&nand {
-+	status = "okay";
-+
-+	partitions {
-+		compatible = "fixed-partitions";
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+
-+		partition@0 {
-+			label = "u-boot";
-+			reg = <0x0 0x80000>;
-+			read-only;
-+		};
-+
-+		partition@80000 {
-+			label = "u-boot-env";
-+			reg = <0x80000 0x80000>;
-+			read-only;
-+		};
-+
-+		factory: partition@100000 {
-+			label = "factory";
-+			reg = <0x100000 0x80000>;
-+			read-only;
-+		};
-+
-+		partition@180000 {
-+			label = "kernel";
-+			reg = <0x180000 0x400000>;
-+		};
-+
-+		partition@580000 {
-+			label = "ubi";
-+			reg = <0x580000 0x7a60000>;
-+		};
-+	};
-+};
-+
-+&pcie {
-+	status = "okay";
-+};
-+
-+&pcie1 {
-+	mt76@0,0 {
-+		reg = <0x0000 0 0 0 0>;
-+		mediatek,mtd-eeprom = <&factory 0x0000>;
-+	};
-+};
-+
-+&switch0 {
-+	ports {
-+		port@1 {
-+			status = "okay";
-+			label = "lan1";
-+		};
-+
-+		port@2 {
-+			status = "okay";
-+			label = "lan2";
-+		};
-+
-+		port@3 {
-+			status = "okay";
-+			label = "lan3";
-+		};
-+
-+		port@0 {
-+			status = "okay";
-+			label = "wan";
-+		};
-+	};
-+};
-+
-+&state_default {
-+	gpio {
-+		groups = "uart3", "jtag";
-+		function = "gpio";
-+	};
-+};
-diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
-index a3bc14d59d..6e0b9b5f76 100644
---- a/target/linux/ramips/image/mt7621.mk
-+++ b/target/linux/ramips/image/mt7621.mk
-@@ -1271,6 +1271,16 @@ define Device/tplink_eap235-wall-v1
- endef
- TARGET_DEVICES += tplink_eap235-wall-v1
- 
-+define Device/tplink_ex228
-+  $(Device/uimage-lzma-loader)
-+  DEVICE_VENDOR := TP-Link
-+  DEVICE_MODEL := EX228 
-+  DEVICE_PACKAGES := kmod-mt7915e
-+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata | check-size
-+  IMAGE_SIZE=20000k
-+endef
-+TARGET_DEVICES += tplink_ex228
-+
- define Device/tplink_re350-v1
-   $(Device/dsa-migration)
-   $(Device/tplink-safeloader)
-diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
-index 4b44669b84..1c4e29dd97 100755
---- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
-+++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
-@@ -25,6 +25,7 @@ ramips_setup_interfaces()
- 	ampedwireless,ally-r1900k|\
- 	gehua,ghl-r-001|\
- 	hiwifi,hc5962|\
-+	tplink,ex228|\
- 	xiaomi,mi-router-3-pro|\
- 	xiaomi,mi-router-ac2100|\
- 	xiaomi,redmi-router-ac2100)
-diff --git a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
-index c2ad4d3ed6..acaa62d171 100755
---- a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
-+++ b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
-@@ -73,6 +73,7 @@ platform_do_upgrade() {
- 	netgear,wac124|\
- 	netis,wf2881|\
- 	sercomm,na502|\
-+	tplink,ex228|\
- 	xiaomi,mi-router-3g|\
- 	xiaomi,mi-router-3-pro|\
- 	xiaomi,mi-router-4|\
--- 
-2.25.1
-
diff --git a/patches/ramips/0002-ramips-make-wifi-work.patch b/patches/ramips/0002-ramips-make-wifi-work.patch
deleted file mode 100644
index 13d1f8cd8..000000000
--- a/patches/ramips/0002-ramips-make-wifi-work.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From e00ffc2ad678216a318106da687701aafa5a1ac7 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Fri, 4 Dec 2020 16:29:16 +0100
-Subject: [PATCH 20/43] ramips: make wifi work
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- target/linux/ramips/mt76x8/config-5.4 | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/target/linux/ramips/mt76x8/config-5.4 b/target/linux/ramips/mt76x8/config-5.4
-index dfd01598ad..e82b775758 100644
---- a/target/linux/ramips/mt76x8/config-5.4
-+++ b/target/linux/ramips/mt76x8/config-5.4
-@@ -46,6 +46,7 @@ CONFIG_CPU_R4K_CACHE_TLB=y
- CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
- CONFIG_CPU_SUPPORTS_HIGHMEM=y
- CONFIG_CPU_SUPPORTS_MSA=y
-+CONFIG_CRYPTO_HASH=y
- CONFIG_CRYPTO_RNG2=y
- CONFIG_CSRC_R4K=y
- CONFIG_DEBUG_PINCTRL=y
--- 
-2.25.1
-
diff --git a/patches/ramips/0003-mt7621-add-linksys-ea6350-and-ea7200-support.patch b/patches/ramips/0003-mt7621-add-linksys-ea6350-and-ea7200-support.patch
deleted file mode 100644
index 4898c109d..000000000
--- a/patches/ramips/0003-mt7621-add-linksys-ea6350-and-ea7200-support.patch
+++ /dev/null
@@ -1,267 +0,0 @@
-From 3ddd1b6e78ab565c6210663df6cd0c1a2a9afac6 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Tue, 14 Sep 2021 17:03:50 +0200
-Subject: [PATCH] mt7621: add linksys ea6350 and ea7200 support
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/boot/uboot-envtools/files/ramips      |  2 +
- .../ramips/dts/mt7621_linksys_ea6350-v4.dts   | 57 +++++++++++++++++++
- .../ramips/dts/mt7621_linksys_ea7200.dts      | 57 +++++++++++++++++++
- .../ramips/dts/mt7621_linksys_ea7xxx.dtsi     | 19 +------
- target/linux/ramips/image/mt7621.mk           | 17 ++++++
- .../mt7621/base-files/etc/board.d/02_network  |  8 ++-
- .../mt7621/base-files/lib/upgrade/platform.sh |  2 +
- 7 files changed, 143 insertions(+), 19 deletions(-)
- create mode 100644 target/linux/ramips/dts/mt7621_linksys_ea6350-v4.dts
- create mode 100644 target/linux/ramips/dts/mt7621_linksys_ea7200.dts
-
-diff --git a/package/boot/uboot-envtools/files/ramips b/package/boot/uboot-envtools/files/ramips
-index 0de062bd83..c711cc0a12 100644
---- a/package/boot/uboot-envtools/files/ramips
-+++ b/package/boot/uboot-envtools/files/ramips
-@@ -51,6 +51,8 @@ ravpower,rp-wd03)
- jcg,q20)
- 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
- 	;;
-+linksys,ea6350-v4|\
-+linksys,ea7200|\
- linksys,ea7300-v1|\
- linksys,ea7300-v2|\
- linksys,ea7500-v2|\
-diff --git a/target/linux/ramips/dts/mt7621_linksys_ea6350-v4.dts b/target/linux/ramips/dts/mt7621_linksys_ea6350-v4.dts
-new file mode 100644
-index 0000000000..12378e61bc
---- /dev/null
-+++ b/target/linux/ramips/dts/mt7621_linksys_ea6350-v4.dts
-@@ -0,0 +1,57 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+
-+#include "mt7621_linksys_ea7xxx.dtsi"
-+
-+/ {
-+	compatible = "linksys,ea6350-v4", "mediatek,mt7621-soc";
-+	model = "Linksys EA6350 v4";
-+
-+	keys {
-+		/delete-node/ wps;
-+
-+		wps {
-+			label = "wps";
-+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_WPS_BUTTON>;
-+		};
-+	};
-+
-+	leds {
-+		/delete-node/ wan_green;
-+		/delete-node/ lan1_green;
-+		/delete-node/ lan2_green;
-+		/delete-node/ lan3_green;
-+		/delete-node/ lan4_green;
-+		/delete-node/ wps;
-+	};
-+};
-+
-+&pcie1 {
-+	mt76@0,0 {
-+		ieee80211-freq-limit = <5000000 6000000>;
-+	};
-+};
-+
-+&switch0 {
-+	ports {
-+		port@0 {
-+			label = "lan1";
-+		};
-+
-+		port@1 {
-+			label = "lan2";
-+		};
-+
-+		port@2 {
-+			label = "lan3";
-+		};
-+
-+		port@3 {
-+			label = "lan4";
-+		};
-+
-+		port@4 {
-+			label = "wan";
-+		};
-+	};
-+};
-diff --git a/target/linux/ramips/dts/mt7621_linksys_ea7200.dts b/target/linux/ramips/dts/mt7621_linksys_ea7200.dts
-new file mode 100644
-index 0000000000..c9eb7a7bba
---- /dev/null
-+++ b/target/linux/ramips/dts/mt7621_linksys_ea7200.dts
-@@ -0,0 +1,57 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+
-+#include "mt7621_linksys_ea7xxx.dtsi"
-+
-+/ {
-+	compatible = "linksys,ea7200", "mediatek,mt7621-soc";
-+	model = "Linksys EA6350 v4";
-+
-+	keys {
-+		/delete-node/ wps;
-+
-+		wps {
-+			label = "wps";
-+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_WPS_BUTTON>;
-+		};
-+	};
-+
-+	leds {
-+		/delete-node/ wan_green;
-+		/delete-node/ lan1_green;
-+		/delete-node/ lan2_green;
-+		/delete-node/ lan3_green;
-+		/delete-node/ lan4_green;
-+		/delete-node/ wps;
-+	};
-+};
-+
-+&pcie1 {
-+	mt76@0,0 {
-+		ieee80211-freq-limit = <5000000 6000000>;
-+	};
-+};
-+
-+&switch0 {
-+	ports {
-+		port@0 {
-+			label = "lan1";
-+		};
-+
-+		port@1 {
-+			label = "lan2";
-+		};
-+
-+		port@2 {
-+			label = "lan3";
-+		};
-+
-+		port@3 {
-+			label = "lan4";
-+		};
-+
-+		port@4 {
-+			label = "wan";
-+		};
-+	};
-+};
-diff --git a/target/linux/ramips/dts/mt7621_linksys_ea7xxx.dtsi b/target/linux/ramips/dts/mt7621_linksys_ea7xxx.dtsi
-index ecff6406d5..86878e6e1b 100644
---- a/target/linux/ramips/dts/mt7621_linksys_ea7xxx.dtsi
-+++ b/target/linux/ramips/dts/mt7621_linksys_ea7xxx.dtsi
-@@ -82,15 +82,14 @@
- 		#size-cells = <1>;
- 
- 		partition@0 {
--			label = "boot";
-+			label = "u-boot";
- 			reg = <0x0 0x80000>;
- 			read-only;
- 		};
- 
- 		partition@80000 {
--			label = "u_env";
-+			label = "u-boot-env";
- 			reg = <0x80000 0x40000>;
--			read-only;
- 		};
- 
- 		factory: partition@c0000 {
-@@ -117,19 +116,7 @@
- 
- 		partition@580000 {
- 			label = "ubi";
--			reg = <0x580000 0x2400000>;
--		};
--
--		partition@2980000 {
--			label = "alt_kernel";
--			reg = <0x2980000 0x400000>;
--			read-only;
--		};
--
--		partition@2d80000 {
--			label = "alt_rootfs";
--			reg = <0x2d80000 0x2400000>;
--			read-only;
-+			reg = <0x580000 0x4c00000>;
- 		};
- 
- 		partition@5180000 {
-diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
-index 6e0b9b5f76..eebd49d86c 100644
---- a/target/linux/ramips/image/mt7621.mk
-+++ b/target/linux/ramips/image/mt7621.mk
-@@ -829,6 +829,23 @@ define Device/linksys_ea7xxx
- 	append-ubi | check-size | linksys-image type=$$$$(LINKSYS_HWNAME)
- endef
- 
-+define Device/linksys_ea6350-v4
-+  $(Device/linksys_ea7xxx)
-+  DEVICE_MODEL := EA6350
-+  DEVICE_VARIANT := v4
-+  LINKSYS_HWNAME := EA6350v4
-+  DEVICE_PACKAGES += kmod-mt7603 kmod-mt7663-firmware-ap
-+endef
-+TARGET_DEVICES += linksys_ea6350-v4
-+
-+define Device/linksys_ea7200
-+  $(Device/linksys_ea7xxx)
-+  DEVICE_MODEL := EA7200
-+  LINKSYS_HWNAME := EA7200
-+  DEVICE_PACKAGES += kmod-mt7603 kmod-mt7663-firmware-ap
-+endef
-+TARGET_DEVICES += linksys_ea7200
-+
- define Device/linksys_ea7300-v1
-   $(Device/linksys_ea7xxx)
-   DEVICE_MODEL := EA7300
-diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
-index 1c4e29dd97..53910135cc 100755
---- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
-+++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
-@@ -142,13 +142,15 @@ ramips_setup_macs()
- 		label_mac=$(mtd_get_mac_binary factory 0x4)
- 		;;
- 	linksys,e5600|\
-+	linksys,ea6350-v4|\
-+	linksys,ea7200|\
- 	linksys,ea7300-v1|\
- 	linksys,ea7300-v2|\
- 	linksys,ea7500-v2|\
- 	linksys,ea8100-v1)
--		lan_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr)
--		wan_mac=$lan_mac
--		label_mac=$lan_mac
-+		label_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr)
-+		lan_mac=$(macaddr_add $label_mac 1)
-+		wan_mac=$label_mac
- 		;;
- 	mikrotik,routerboard-750gr3|\
- 	mikrotik,routerboard-760igs|\
-diff --git a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
-index acaa62d171..1f1ecb33d9 100755
---- a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
-+++ b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
-@@ -59,6 +59,8 @@ platform_do_upgrade() {
- 	hiwifi,hc5962|\
- 	jcg,q20|\
- 	linksys,e5600|\
-+	linksys,ea6350-v4|\
-+	linksys,ea7200|\
- 	linksys,ea7300-v1|\
- 	linksys,ea7300-v2|\
- 	linksys,ea7500-v2|\
--- 
-2.25.1
-
diff --git a/patches/ramips/0004-certificates-add-ability-to-persistently-store-certi.patch b/patches/ramips/0004-certificates-add-ability-to-persistently-store-certi.patch
deleted file mode 100644
index 9713a4122..000000000
--- a/patches/ramips/0004-certificates-add-ability-to-persistently-store-certi.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From ee837f028bd7af515d30a8a90cc2b5ee61eecf19 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Sat, 4 Sep 2021 06:04:54 +0200
-Subject: [PATCH 35/43] certificates: add ability to persistently store
- certificates
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- target/linux/ath79/dts/qca9563_tplink_cpe710-v1.dts        | 7 ++++++-
- .../files/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi       | 3 +--
- .../linux/ramips/dts/mt7628an_tplink_8m-split-uboot.dtsi   | 7 ++++++-
- 3 files changed, 13 insertions(+), 4 deletions(-)
-
-diff --git a/target/linux/ramips/dts/mt7628an_tplink_8m-split-uboot.dtsi b/target/linux/ramips/dts/mt7628an_tplink_8m-split-uboot.dtsi
-index b6ce7b1f56..471be72001 100644
---- a/target/linux/ramips/dts/mt7628an_tplink_8m-split-uboot.dtsi
-+++ b/target/linux/ramips/dts/mt7628an_tplink_8m-split-uboot.dtsi
-@@ -43,7 +43,12 @@
- 			partition@50000 {
- 				compatible = "tplink,firmware";
- 				label = "firmware";
--				reg = <0x50000 0x770000>;
-+				reg = <0x50000 0x760000>;
-+			};
-+
-+			partition@7b0000 {
-+				label = "certificates";
-+				reg = <0x7b0000 0x10000>;
- 			};
- 
- 			partition@7c0000 {
--- 
-2.25.1
-
diff --git a/patches/ramips/0005-mt7621-add-CIG-WF808-support.patch b/patches/ramips/0005-mt7621-add-CIG-WF808-support.patch
deleted file mode 100644
index 7c8af1f32..000000000
--- a/patches/ramips/0005-mt7621-add-CIG-WF808-support.patch
+++ /dev/null
@@ -1,249 +0,0 @@
-From 1ece0fbb9f49d3a43c10e61e696ba19804c20ac5 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Fri, 17 Dec 2021 16:11:07 +0100
-Subject: [PATCH] mt7621: add CIG WF808 support
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/boot/uboot-envtools/files/ramips      |   3 +
- target/linux/ramips/dts/mt7621_cig_wf808.dts  | 131 ++++++++++++++++++
- target/linux/ramips/image/mt7621.mk           |  10 ++
- .../mt7621/base-files/etc/board.d/02_network  |   7 +
- .../mt7621/base-files/etc/init.d/bootcount    |  10 ++
- .../mt7621/base-files/lib/upgrade/platform.sh |   1 +
- 6 files changed, 162 insertions(+)
- create mode 100644 target/linux/ramips/dts/mt7621_cig_wf808.dts
-
-diff --git a/package/boot/uboot-envtools/files/ramips b/package/boot/uboot-envtools/files/ramips
-index c711cc0a12..33af86c846 100644
---- a/package/boot/uboot-envtools/files/ramips
-+++ b/package/boot/uboot-envtools/files/ramips
-@@ -42,6 +42,9 @@ zbtlink,zbt-wg2626|\
- zte,mf283plus)
- 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x10000"
- 	;;
-+cig,wf808)
-+	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x80000"
-+	;;
- hootoo,ht-tm05|\
- ravpower,rp-wd03)
- 	idx="$(find_mtd_index u-boot-env)"
-diff --git a/target/linux/ramips/dts/mt7621_cig_wf808.dts b/target/linux/ramips/dts/mt7621_cig_wf808.dts
-new file mode 100644
-index 0000000000..e08f87fb06
---- /dev/null
-+++ b/target/linux/ramips/dts/mt7621_cig_wf808.dts
-@@ -0,0 +1,131 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+
-+#include "mt7621.dtsi"
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+
-+/ {
-+	compatible = "cig,wf808", "mediatek,mt7621-soc";
-+	model = "CIG WF-808";
-+
-+	aliases {
-+		led-boot = &led_power;
-+		led-failsafe = &led_power;
-+		led-running = &led_power;
-+		led-upgrade = &led_power;
-+	};
-+
-+	chosen {
-+		bootargs = "console=ttyS0,57600";
-+	};
-+
-+	reserved-memory {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		ranges;
-+
-+		ramoops@ec0000 {
-+			compatible = "ramoops";
-+			reg = <0xec0000 0x140000>;
-+			record-size = <0x1000>;
-+		};
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		red {
-+			label = "red:power";
-+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		led_power: green {
-+			label = "green:power";
-+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
-+			default-state = "on";
-+		};
-+
-+		blue {
-+			label = "blue:power";
-+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
-+		};
-+	};
-+};
-+
-+&nand {
-+	status = "okay";
-+
-+	partitions {
-+		compatible = "fixed-partitions";
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+
-+		partition@0 {
-+			label = "u-boot";
-+			reg = <0x0 0x80000>;
-+			read-only;
-+		};
-+
-+		partition@80000 {
-+			label = "u-boot-env";
-+			reg = <0x80000 0x80000>;
-+		};
-+
-+		factory: partition@100000 {
-+			label = "factory";
-+			reg = <0x100000 0x40000>;
-+			read-only;
-+		};
-+
-+		partition@1400000 {
-+			label = "kernel";
-+			reg = <0x140000 0x4c0000>;
-+		};
-+
-+		partition@600000 {
-+			label = "ubi";
-+			reg = <0x600000 0x1a00000>;
-+		};
-+	};
-+};
-+
-+&state_default {
-+	gpio {
-+		groups = "uart2", "uart3", "jtag";
-+		function = "gpio";
-+	};
-+};
-+
-+&pcie {
-+	status = "okay";
-+};
-+
-+&pcie0 {
-+	mt76@0,0 {
-+		compatible = "mediatek,mt76";
-+		reg = <0x0000 0 0 0 0>;
-+		mediatek,mtd-eeprom = <&factory 0x0000>;
-+	};
-+};
-+
-+&pcie1 {
-+	mt76@0,0 {
-+		compatible = "mediatek,mt76";
-+		reg = <0x0000 0 0 0 0>;
-+		mediatek,mtd-eeprom = <&factory 0x8000>;
-+	};
-+};
-+
-+&switch0 {
-+	ports {
-+		port@0 {
-+			status = "okay";
-+			label = "wan";
-+		};
-+	};
-+};
-+
-+&xhci {
-+	status = "disabled";
-+};
-diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
-index eebd49d86c..c3a1f68d84 100644
---- a/target/linux/ramips/image/mt7621.mk
-+++ b/target/linux/ramips/image/mt7621.mk
-@@ -261,6 +261,16 @@ define Device/buffalo_wsr-600dhp
- endef
- TARGET_DEVICES += buffalo_wsr-600dhp
- 
-+define Device/cig_wf808
-+  $(Device/dsa-migration)
-+  DEVICE_VENDOR := CIG
-+  DEVICE_MODEL := WF808
-+  IMAGE_SIZE := 25000kk
-+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615e kmod-mt7615-firmware uboot-envtools
-+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
-+endef
-+TARGET_DEVICES += cig_wf808
-+
- define Device/cudy_wr1300
-   $(Device/dsa-migration)
-   IMAGE_SIZE := 15872k
-diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
-index 53910135cc..0e171f457b 100755
---- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
-+++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
-@@ -46,6 +46,9 @@ ramips_setup_interfaces()
- 	xiaomi,mi-router-4a-gigabit)
- 		ucidef_set_interfaces_lan_wan "lan1 lan2" "wan"
- 		;;
-+	cig,wf808)
-+		ucidef_set_interface_wan "wan"
-+		;;
- 	gnubee,gb-pc1|\
- 	gnubee,gb-pc2)
- 		ucidef_set_interface_lan "lan1 lan2"
-@@ -109,6 +112,10 @@ ramips_setup_macs()
- 		wan_mac="$(grep -m1 mac= "/dev/mtd${index}" | cut -d= -f2)"
- 		lan_mac=$wan_mac
- 		;;
-+	cig,wf808)
-+		wan_mac=$(mtd_get_mac_ascii u-boot-env mac1)
-+		label_mac=$wan_mac
-+		;;
- 	dlink,dir-860l-b1)
- 		lan_mac=$(mtd_get_mac_ascii factory lanmac)
- 		wan_mac=$(mtd_get_mac_ascii factory wanmac)
-diff --git a/target/linux/ramips/mt7621/base-files/etc/init.d/bootcount b/target/linux/ramips/mt7621/base-files/etc/init.d/bootcount
-index d3525ea0c9..90d88049b6 100755
---- a/target/linux/ramips/mt7621/base-files/etc/init.d/bootcount
-+++ b/target/linux/ramips/mt7621/base-files/etc/init.d/bootcount
-@@ -8,6 +8,16 @@ boot() {
- 		[ -n "$(fw_printenv bootcount bootchanged 2>/dev/null)" ] &&\
- 			echo -e "bootcount\nbootchanged\n" | /usr/sbin/fw_setenv -s -
- 		;;
-+	cig,wf808)
-+		stable=`fw_printenv -n Image1Stable 2>/dev/null`
-+		if [ "${stable}" -ne 1 ]; then
-+			fw_setenv Image1Stable 1
-+		fi
-+		try=`fw_printenv -n Image1Try 2>/dev/null`
-+		if [ "${try}" -ne 0 ]; then
-+			fw_setenv Image1Try 0
-+		fi
-+		;;
- 	linksys,e5600|\
- 	linksys,ea7300-v1|\
- 	linksys,ea7300-v2|\
-diff --git a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
-index 1f1ecb33d9..f044325752 100755
---- a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
-+++ b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
-@@ -53,6 +53,7 @@ platform_do_upgrade() {
- 	ampedwireless,ally-r1900k|\
- 	asus,rt-ac65p|\
- 	asus,rt-ac85p|\
-+	cig,wf808|\
- 	dlink,dir-1960-a1|\
- 	dlink,dir-2640-a1|\
- 	dlink,dir-2660-a1|\
--- 
-2.25.1
-
diff --git a/patches/ramips/0006-ramips-add-support-for-actiontec-web7200.patch b/patches/ramips/0006-ramips-add-support-for-actiontec-web7200.patch
deleted file mode 100644
index d94df4c63..000000000
--- a/patches/ramips/0006-ramips-add-support-for-actiontec-web7200.patch
+++ /dev/null
@@ -1,4510 +0,0 @@
-From 84b62781ea2aa375890a890cdbbc15ee2d3944b8 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Mon, 7 Feb 2022 11:16:12 +0100
-Subject: [PATCH] ramips: add support for actiontec web7200
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/boot/uboot-envtools/files/ramips      |    3 +
- .../ramips/dts/mt7621_actiontec_web7200.dts   |  146 +
- .../ramips/files/drivers/mtd/nmbm/Kconfig     |   35 +
- .../ramips/files/drivers/mtd/nmbm/Makefile    |    6 +
- .../ramips/files/drivers/mtd/nmbm/nmbm-core.c | 2936 +++++++++++++++++
- .../files/drivers/mtd/nmbm/nmbm-debug.h       |   20 +
- .../files/drivers/mtd/nmbm/nmbm-debug.inl     |    0
- .../ramips/files/drivers/mtd/nmbm/nmbm-mtd.c  |  795 +++++
- .../files/drivers/mtd/nmbm/nmbm-private.h     |  137 +
- .../linux/ramips/files/include/nmbm/nmbm-os.h |   69 +
- target/linux/ramips/files/include/nmbm/nmbm.h |  102 +
- target/linux/ramips/image/mt7621.mk           |   33 +-
- .../mt7621/base-files/etc/board.d/02_network  |    6 +
- .../mt7621/base-files/lib/upgrade/platform.sh |    9 +
- target/linux/ramips/mt7621/config-5.4         |    9 +-
- .../499-mtd-add-nmbm-support.patch            |   21 +
- 16 files changed, 4317 insertions(+), 10 deletions(-)
- create mode 100644 target/linux/ramips/dts/mt7621_actiontec_web7200.dts
- create mode 100644 target/linux/ramips/files/drivers/mtd/nmbm/Kconfig
- create mode 100644 target/linux/ramips/files/drivers/mtd/nmbm/Makefile
- create mode 100644 target/linux/ramips/files/drivers/mtd/nmbm/nmbm-core.c
- create mode 100644 target/linux/ramips/files/drivers/mtd/nmbm/nmbm-debug.h
- create mode 100644 target/linux/ramips/files/drivers/mtd/nmbm/nmbm-debug.inl
- create mode 100644 target/linux/ramips/files/drivers/mtd/nmbm/nmbm-mtd.c
- create mode 100644 target/linux/ramips/files/drivers/mtd/nmbm/nmbm-private.h
- create mode 100644 target/linux/ramips/files/include/nmbm/nmbm-os.h
- create mode 100644 target/linux/ramips/files/include/nmbm/nmbm.h
- create mode 100644 target/linux/ramips/patches-5.4/499-mtd-add-nmbm-support.patch
-
-diff --git a/package/boot/uboot-envtools/files/ramips b/package/boot/uboot-envtools/files/ramips
-index 33af86c846..c13ee08103 100644
---- a/package/boot/uboot-envtools/files/ramips
-+++ b/package/boot/uboot-envtools/files/ramips
-@@ -13,6 +13,9 @@ touch /etc/config/ubootenv
- board=$(board_name)
- 
- case "$board" in
-+actiontec,web7200)
-+	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
-+	;;
- alfa-network,ac1200rm|\
- alfa-network,awusfree1|\
- alfa-network,quad-e4g|\
-diff --git a/target/linux/ramips/dts/mt7621_actiontec_web7200.dts b/target/linux/ramips/dts/mt7621_actiontec_web7200.dts
-new file mode 100644
-index 0000000000..f112354ec3
---- /dev/null
-+++ b/target/linux/ramips/dts/mt7621_actiontec_web7200.dts
-@@ -0,0 +1,146 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+
-+#include "mt7621.dtsi"
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+
-+/ {
-+	compatible = "actiontec,web7200", "mediatek,mt7621-soc";
-+	model = "Actiontec WEB7200";
-+
-+	aliases {
-+/*		led-boot = &led_white;
-+		led-failsafe = &led_white;
-+		led-running = &led_blue;
-+		led-upgrade = &led_blue;
-+		label-mac-device = &gmac0;*/
-+	};
-+
-+	chosen {
-+		bootargs = "console=ttyS0,115200";
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		wan_green {
-+			label = "wan:green";
-+			gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		lan_green {
-+			label = "lan:green";
-+			gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
-+
-+	keys {
-+		compatible = "gpio-keys";
-+
-+		reset {
-+			label = "reset";
-+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_RESTART>;
-+		};
-+
-+		wps {
-+			label = "wps";
-+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_WPS_BUTTON>;
-+		};
-+	};
-+
-+	nmbm {
-+		compatible = "generic,nmbm";
-+		lower-mtd-device = <&nand>;
-+		forced-create;
-+		#size-cells = <0x01>;
-+		#address-cells = <0x01>;
-+
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#size-cells = <0x01>;
-+			#address-cells = <0x01>;
-+
-+			partition@0 {
-+				label = "u-boot";
-+				reg = <0x00 0x80000>;
-+				read-only;
-+			};
-+
-+			partition@80000 {
-+				label = "u-boot-env";
-+				reg = <0x80000 0x80000>;
-+			};
-+
-+			factory: partition@100000 {
-+				label = "factory";
-+				reg = <0x100000 0x80000>;
-+			};
-+
-+			partition@180000 {
-+				compatible = "denx,fit";
-+				label = "firmware";
-+				openwrt,cmdline-match = "bootselect=0";
-+				reg = <0x180000 0x3000000>;
-+			};
-+
-+			partition@3180000 {
-+				compatible = "denx,fit";
-+				label = "firmware2";
-+				openwrt,cmdline-match = "bootselect=1";
-+				reg = <0x3180000 0x3000000>;
-+			};
-+
-+			partition@6980000 {
-+				label = "aei_data";
-+				reg = <0x6980000 0x400000>;
-+			};
-+
-+			partition@6180000 {
-+				label = "aei_data_ext";
-+				reg = <0x6180000 0x800000>;
-+			};
-+		};
-+	};
-+};
-+
-+&nand {
-+	status = "okay";
-+
-+	partitions {
-+		compatible = "fixed-partitions";
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+	};
-+};
-+
-+&pcie {
-+	status = "okay";
-+};
-+
-+&pcie1 {
-+	wlan_5g: wifi@0,0 {
-+		compatible = "mediatek,mt76";
-+		reg = <0x0 0 0 0 0>;
-+		mediatek,mtd-eeprom = <&factory 0x0>;
-+	};
-+};
-+
-+&i2c {
-+	status = "okay";
-+};
-+
-+&switch0 {
-+	ports {
-+		port@0 {
-+			status = "okay";
-+			label = "lan";
-+		};
-+		port@1 {
-+			status = "okay";
-+			label = "wan";
-+		};
-+	};
-+};
-diff --git a/target/linux/ramips/files/drivers/mtd/nmbm/Kconfig b/target/linux/ramips/files/drivers/mtd/nmbm/Kconfig
-new file mode 100644
-index 0000000000..98df305728
---- /dev/null
-+++ b/target/linux/ramips/files/drivers/mtd/nmbm/Kconfig
-@@ -0,0 +1,35 @@
-+
-+config NMBM
-+	bool "Enable NAND mapping block management"
-+	default n
-+	select CRC32
-+
-+choice
-+	prompt "Default log level"
-+	depends on NMBM
-+	default NMBM_LOG_LEVEL_INFO
-+
-+config NMBM_LOG_LEVEL_DEBUG
-+	bool "0 - Debug"
-+
-+config NMBM_LOG_LEVEL_INFO
-+	bool "1 - Info"
-+
-+config NMBM_LOG_LEVEL_WARN
-+	bool "2 - Warn"
-+
-+config NMBM_LOG_LEVEL_ERR
-+	bool "3 - Error"
-+
-+config NMBM_LOG_LEVEL_EMERG
-+	bool "4 - Emergency"
-+
-+config NMBM_LOG_LEVEL_NONE
-+	bool "5 - None"
-+
-+endchoice
-+
-+config NMBM_MTD
-+	bool "Enable MTD based NAND mapping block management"
-+	default n
-+	depends on NMBM
-diff --git a/target/linux/ramips/files/drivers/mtd/nmbm/Makefile b/target/linux/ramips/files/drivers/mtd/nmbm/Makefile
-new file mode 100644
-index 0000000000..46e6d50a80
---- /dev/null
-+++ b/target/linux/ramips/files/drivers/mtd/nmbm/Makefile
-@@ -0,0 +1,6 @@
-+# SPDX-License-Identifier: GPL-2.0
-+#
-+# (C) Copyright 2020 MediaTek Inc. All rights reserved.
-+
-+obj-$(CONFIG_NMBM) += nmbm-core.o
-+obj-$(CONFIG_NMBM_MTD) += nmbm-mtd.o
-diff --git a/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-core.c b/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-core.c
-new file mode 100644
-index 0000000000..18dfb6adda
---- /dev/null
-+++ b/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-core.c
-@@ -0,0 +1,2936 @@
-+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
-+/*
-+ * Copyright (C) 2021 MediaTek Inc. All Rights Reserved.
-+ *
-+ * Author: Weijie Gao <weijie.gao@mediatek.com>
-+ */
-+
-+#include "nmbm-private.h"
-+
-+#include "nmbm-debug.h"
-+
-+#define NMBM_VER_MAJOR			1
-+#define NMBM_VER_MINOR			0
-+#define NMBM_VER			NMBM_VERSION_MAKE(NMBM_VER_MAJOR, \
-+							  NMBM_VER_MINOR)
-+
-+#define NMBM_ALIGN(v, a)		(((v) + (a) - 1) & ~((a) - 1))
-+
-+/*****************************************************************************/
-+/* Logging related functions */
-+/*****************************************************************************/
-+
-+/*
-+ * nmbm_log_lower - Print log using OS specific routine
-+ * @nld: NMBM lower device structure
-+ * @level: log level
-+ * @fmt: format string
-+ */
-+static void nmbm_log_lower(struct nmbm_lower_device *nld,
-+			   enum nmbm_log_category level, const char *fmt, ...)
-+{
-+	va_list ap;
-+
-+	if (!nld->logprint)
-+		return;
-+
-+	va_start(ap, fmt);
-+	nld->logprint(nld->arg, level, fmt, ap);
-+	va_end(ap);
-+}
-+
-+/*
-+ * nmbm_log - Print log using OS specific routine
-+ * @ni: NMBM instance structure
-+ * @level: log level
-+ * @fmt: format string
-+ */
-+static void nmbm_log(struct nmbm_instance *ni, enum nmbm_log_category level,
-+		     const char *fmt, ...)
-+{
-+	va_list ap;
-+
-+	if (!ni)
-+		return;
-+
-+	if (!ni->lower.logprint || level < ni->log_display_level)
-+		return;
-+
-+	va_start(ap, fmt);
-+	ni->lower.logprint(ni->lower.arg, level, fmt, ap);
-+	va_end(ap);
-+}
-+
-+/*
-+ * nmbm_set_log_level - Set log display level
-+ * @ni: NMBM instance structure
-+ * @level: log display level
-+ */
-+enum nmbm_log_category nmbm_set_log_level(struct nmbm_instance *ni,
-+					  enum nmbm_log_category level)
-+{
-+	enum nmbm_log_category old;
-+
-+	if (!ni)
-+		return __NMBM_LOG_MAX;
-+
-+	old = ni->log_display_level;
-+	ni->log_display_level = level;
-+	return old;
-+}
-+
-+/*
-+ * nlog_table_creation - Print log of table creation event
-+ * @ni: NMBM instance structure
-+ * @main_table: whether the table is main info table
-+ * @start_ba: start block address of the table
-+ * @end_ba: block address after the end of the table
-+ */
-+static void nlog_table_creation(struct nmbm_instance *ni, bool main_table,
-+			       uint32_t start_ba, uint32_t end_ba)
-+{
-+	if (start_ba == end_ba - 1)
-+		nlog_info(ni, "%s info table has been written to block %u\n",
-+			 main_table ? "Main" : "Backup", start_ba);
-+	else
-+		nlog_info(ni, "%s info table has been written to block %u-%u\n",
-+			 main_table ? "Main" : "Backup", start_ba, end_ba - 1);
-+
-+	nmbm_mark_block_color_info_table(ni, start_ba, end_ba - 1);
-+}
-+
-+/*
-+ * nlog_table_update - Print log of table update event
-+ * @ni: NMBM instance structure
-+ * @main_table: whether the table is main info table
-+ * @start_ba: start block address of the table
-+ * @end_ba: block address after the end of the table
-+ */
-+static void nlog_table_update(struct nmbm_instance *ni, bool main_table,
-+			     uint32_t start_ba, uint32_t end_ba)
-+{
-+	if (start_ba == end_ba - 1)
-+		nlog_debug(ni, "%s info table has been updated in block %u\n",
-+			  main_table ? "Main" : "Backup", start_ba);
-+	else
-+		nlog_debug(ni, "%s info table has been updated in block %u-%u\n",
-+			  main_table ? "Main" : "Backup", start_ba, end_ba - 1);
-+
-+	nmbm_mark_block_color_info_table(ni, start_ba, end_ba - 1);
-+}
-+
-+/*
-+ * nlog_table_found - Print log of table found event
-+ * @ni: NMBM instance structure
-+ * @first_table: whether the table is first found info table
-+ * @write_count: write count of the info table
-+ * @start_ba: start block address of the table
-+ * @end_ba: block address after the end of the table
-+ */
-+static void nlog_table_found(struct nmbm_instance *ni, bool first_table,
-+			    uint32_t write_count, uint32_t start_ba,
-+			    uint32_t end_ba)
-+{
-+	if (start_ba == end_ba - 1)
-+		nlog_info(ni, "%s info table with writecount %u found in block %u\n",
-+			 first_table ? "First" : "Second", write_count,
-+			 start_ba);
-+	else
-+		nlog_info(ni, "%s info table with writecount %u found in block %u-%u\n",
-+			 first_table ? "First" : "Second", write_count,
-+			 start_ba, end_ba - 1);
-+
-+	nmbm_mark_block_color_info_table(ni, start_ba, end_ba - 1);
-+}
-+
-+/*****************************************************************************/
-+/* Address conversion functions */
-+/*****************************************************************************/
-+
-+/*
-+ * addr2ba - Convert a linear address to block address
-+ * @ni: NMBM instance structure
-+ * @addr: Linear address
-+ */
-+static uint32_t addr2ba(struct nmbm_instance *ni, uint64_t addr)
-+{
-+	return addr >> ni->erasesize_shift;
-+}
-+
-+/*
-+ * ba2addr - Convert a block address to linear address
-+ * @ni: NMBM instance structure
-+ * @ba: Block address
-+ */
-+static uint64_t ba2addr(struct nmbm_instance *ni, uint32_t ba)
-+{
-+	return (uint64_t)ba << ni->erasesize_shift;
-+}
-+/*
-+ * size2blk - Get minimum required blocks for storing specific size of data
-+ * @ni: NMBM instance structure
-+ * @size: size for storing
-+ */
-+static uint32_t size2blk(struct nmbm_instance *ni, uint64_t size)
-+{
-+	return (size + ni->lower.erasesize - 1) >> ni->erasesize_shift;
-+}
-+
-+/*****************************************************************************/
-+/* High level NAND chip APIs */
-+/*****************************************************************************/
-+
-+/*
-+ * nmbm_reset_chip - Reset NAND device
-+ * @nld: Lower NAND chip structure
-+ */
-+static void nmbm_reset_chip(struct nmbm_instance *ni)
-+{
-+	if (ni->lower.reset_chip)
-+		ni->lower.reset_chip(ni->lower.arg);
-+}
-+
-+/*
-+ * nmbm_read_phys_page - Read page with retry
-+ * @ni: NMBM instance structure
-+ * @addr: linear address where the data will be read from
-+ * @data: the main data to be read
-+ * @oob: the oob data to be read
-+ * @mode: mode for processing oob data
-+ *
-+ * Read a page for at most NMBM_TRY_COUNT times.
-+ *
-+ * Return 0 for success, positive value for corrected bitflip count,
-+ * -EBADMSG for ecc error, other negative values for other errors
-+ */
-+static int nmbm_read_phys_page(struct nmbm_instance *ni, uint64_t addr,
-+			       void *data, void *oob, enum nmbm_oob_mode mode)
-+{
-+	int tries, ret;
-+
-+	for (tries = 0; tries < NMBM_TRY_COUNT; tries++) {
-+		ret = ni->lower.read_page(ni->lower.arg, addr, data, oob, mode);
-+		if (ret >= 0)
-+			return ret;
-+
-+		nmbm_reset_chip(ni);
-+	}
-+
-+	if (ret != -EBADMSG)
-+		nlog_err(ni, "Page read failed at address 0x%08llx\n", addr);
-+
-+	return ret;
-+}
-+
-+/*
-+ * nmbm_write_phys_page - Write page with retry
-+ * @ni: NMBM instance structure
-+ * @addr: linear address where the data will be written to
-+ * @data: the main data to be written
-+ * @oob: the oob data to be written
-+ * @mode: mode for processing oob data
-+ *
-+ * Write a page for at most NMBM_TRY_COUNT times.
-+ */
-+static bool nmbm_write_phys_page(struct nmbm_instance *ni, uint64_t addr,
-+				 const void *data, const void *oob,
-+				 enum nmbm_oob_mode mode)
-+{
-+	int tries, ret;
-+
-+	if (ni->lower.flags & NMBM_F_READ_ONLY) {
-+		nlog_err(ni, "%s called with NMBM_F_READ_ONLY set\n", addr);
-+		return false;
-+	}
-+
-+	for (tries = 0; tries < NMBM_TRY_COUNT; tries++) {
-+		ret = ni->lower.write_page(ni->lower.arg, addr, data, oob, mode);
-+		if (!ret)
-+			return true;
-+
-+		nmbm_reset_chip(ni);
-+	}
-+
-+	nlog_err(ni, "Page write failed at address 0x%08llx\n", addr);
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_erase_phys_block - Erase a block with retry
-+ * @ni: NMBM instance structure
-+ * @addr: Linear address
-+ *
-+ * Erase a block for at most NMBM_TRY_COUNT times.
-+ */
-+static bool nmbm_erase_phys_block(struct nmbm_instance *ni, uint64_t addr)
-+{
-+	int tries, ret;
-+
-+	if (ni->lower.flags & NMBM_F_READ_ONLY) {
-+		nlog_err(ni, "%s called with NMBM_F_READ_ONLY set\n", addr);
-+		return false;
-+	}
-+
-+	for (tries = 0; tries < NMBM_TRY_COUNT; tries++) {
-+		ret = ni->lower.erase_block(ni->lower.arg, addr);
-+		if (!ret)
-+			return true;
-+
-+		nmbm_reset_chip(ni);
-+	}
-+
-+	nlog_err(ni, "Block erasure failed at address 0x%08llx\n", addr);
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_check_bad_phys_block - Check whether a block is marked bad in OOB
-+ * @ni: NMBM instance structure
-+ * @ba: block address
-+ */
-+static bool nmbm_check_bad_phys_block(struct nmbm_instance *ni, uint32_t ba)
-+{
-+	uint64_t addr = ba2addr(ni, ba);
-+	int ret;
-+
-+	if (ni->lower.is_bad_block)
-+		return ni->lower.is_bad_block(ni->lower.arg, addr);
-+
-+	/* Treat ECC error as read success */
-+	ret = nmbm_read_phys_page(ni, addr, NULL,
-+				  ni->page_cache + ni->lower.writesize,
-+				  NMBM_MODE_RAW);
-+	if (ret < 0 && ret != -EBADMSG)
-+		return true;
-+
-+	return ni->page_cache[ni->lower.writesize] != 0xff;
-+}
-+
-+/*
-+ * nmbm_mark_phys_bad_block - Mark a block bad
-+ * @ni: NMBM instance structure
-+ * @addr: Linear address
-+ */
-+static int nmbm_mark_phys_bad_block(struct nmbm_instance *ni, uint32_t ba)
-+{
-+	uint64_t addr = ba2addr(ni, ba);
-+	enum nmbm_log_category level;
-+	uint32_t off;
-+
-+	if (ni->lower.flags & NMBM_F_READ_ONLY) {
-+		nlog_err(ni, "%s called with NMBM_F_READ_ONLY set\n", addr);
-+		return false;
-+	}
-+
-+	nlog_info(ni, "Block %u [0x%08llx] will be marked bad\n", ba, addr);
-+
-+	if (ni->lower.mark_bad_block)
-+		return ni->lower.mark_bad_block(ni->lower.arg, addr);
-+
-+	/* Whole page set to 0x00 */
-+	memset(ni->page_cache, 0, ni->rawpage_size);
-+
-+	/* Write to all pages within this block, disable all errors */
-+	level = nmbm_set_log_level(ni, __NMBM_LOG_MAX);
-+
-+	for (off = 0; off < ni->lower.erasesize; off += ni->lower.writesize) {
-+		nmbm_write_phys_page(ni, addr + off, ni->page_cache,
-+				     ni->page_cache + ni->lower.writesize,
-+				     NMBM_MODE_RAW);
-+	}
-+
-+	nmbm_set_log_level(ni, level);
-+
-+	return 0;
-+}
-+
-+/*****************************************************************************/
-+/* NMBM related functions */
-+/*****************************************************************************/
-+
-+/*
-+ * nmbm_check_header - Check whether a NMBM structure is valid
-+ * @data: pointer to a NMBM structure with a NMBM header at beginning
-+ * @size: Size of the buffer pointed by @header
-+ *
-+ * The size of the NMBM structure may be larger than NMBM header,
-+ * e.g. block mapping table and block state table.
-+ */
-+static bool nmbm_check_header(const void *data, uint32_t size)
-+{
-+	const struct nmbm_header *header = data;
-+	struct nmbm_header nhdr;
-+	uint32_t new_checksum;
-+
-+	/*
-+	 * Make sure expected structure size is equal or smaller than
-+	 * buffer size.
-+	 */
-+	if (header->size > size)
-+		return false;
-+
-+	memcpy(&nhdr, data, sizeof(nhdr));
-+
-+	nhdr.checksum = 0;
-+	new_checksum = nmbm_crc32(0, &nhdr, sizeof(nhdr));
-+	if (header->size > sizeof(nhdr))
-+		new_checksum = nmbm_crc32(new_checksum,
-+			(const uint8_t *)data + sizeof(nhdr),
-+			header->size - sizeof(nhdr));
-+
-+	if (header->checksum != new_checksum)
-+		return false;
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_update_checksum - Update checksum of a NMBM structure
-+ * @header: pointer to a NMBM structure with a NMBM header at beginning
-+ *
-+ * The size of the NMBM structure must be specified by @header->size
-+ */
-+static void nmbm_update_checksum(struct nmbm_header *header)
-+{
-+	header->checksum = 0;
-+	header->checksum = nmbm_crc32(0, header, header->size);
-+}
-+
-+/*
-+ * nmbm_get_spare_block_count - Calculate number of blocks should be reserved
-+ * @block_count: number of blocks of data
-+ *
-+ * Calculate number of blocks should be reserved for data
-+ */
-+static uint32_t nmbm_get_spare_block_count(uint32_t block_count)
-+{
-+	uint32_t val;
-+
-+	val = (block_count + NMBM_SPARE_BLOCK_DIV / 2) / NMBM_SPARE_BLOCK_DIV;
-+	val *= NMBM_SPARE_BLOCK_MULTI;
-+
-+	if (val < NMBM_SPARE_BLOCK_MIN)
-+		val = NMBM_SPARE_BLOCK_MIN;
-+
-+	return val;
-+}
-+
-+/*
-+ * nmbm_get_block_state_raw - Get state of a block from raw block state table
-+ * @block_state: pointer to raw block state table (bitmap)
-+ * @ba: block address
-+ */
-+static uint32_t nmbm_get_block_state_raw(nmbm_bitmap_t *block_state,
-+					 uint32_t ba)
-+{
-+	uint32_t unit, shift;
-+
-+	unit = ba / NMBM_BITMAP_BLOCKS_PER_UNIT;
-+	shift = (ba % NMBM_BITMAP_BLOCKS_PER_UNIT) * NMBM_BITMAP_BITS_PER_BLOCK;
-+
-+	return (block_state[unit] >> shift) & BLOCK_ST_MASK;
-+}
-+
-+/*
-+ * nmbm_get_block_state - Get state of a block from block state table
-+ * @ni: NMBM instance structure
-+ * @ba: block address
-+ */
-+static uint32_t nmbm_get_block_state(struct nmbm_instance *ni, uint32_t ba)
-+{
-+	return nmbm_get_block_state_raw(ni->block_state, ba);
-+}
-+
-+/*
-+ * nmbm_set_block_state - Set state of a block to block state table
-+ * @ni: NMBM instance structure
-+ * @ba: block address
-+ * @state: block state
-+ *
-+ * Set state of a block. If the block state changed, ni->block_state_changed
-+ * will be increased.
-+ */
-+static bool nmbm_set_block_state(struct nmbm_instance *ni, uint32_t ba,
-+				 uint32_t state)
-+{
-+	uint32_t unit, shift, orig;
-+	nmbm_bitmap_t uv;
-+
-+	unit = ba / NMBM_BITMAP_BLOCKS_PER_UNIT;
-+	shift = (ba % NMBM_BITMAP_BLOCKS_PER_UNIT) * NMBM_BITMAP_BITS_PER_BLOCK;
-+
-+	orig = (ni->block_state[unit] >> shift) & BLOCK_ST_MASK;
-+	state &= BLOCK_ST_MASK;
-+
-+	uv = ni->block_state[unit] & (~(BLOCK_ST_MASK << shift));
-+	uv |= state << shift;
-+	ni->block_state[unit] = uv;
-+
-+	if (state == BLOCK_ST_BAD)
-+		nmbm_mark_block_color_bad(ni, ba);
-+
-+	if (orig != state) {
-+		ni->block_state_changed++;
-+		return true;
-+	}
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_block_walk_asc - Skip specified number of good blocks, ascending addr.
-+ * @ni: NMBM instance structure
-+ * @ba: start physical block address
-+ * @nba: return physical block address after walk
-+ * @count: number of good blocks to be skipped
-+ * @limit: highest block address allowed for walking
-+ *
-+ * Start from @ba, skipping any bad blocks, counting @count good blocks, and
-+ * return the next good block address.
-+ *
-+ * If no enough good blocks counted while @limit reached, false will be returned.
-+ *
-+ * If @count == 0, nearest good block address will be returned.
-+ * @limit is not counted in walking.
-+ */
-+static bool nmbm_block_walk_asc(struct nmbm_instance *ni, uint32_t ba,
-+				uint32_t *nba, uint32_t count,
-+				uint32_t limit)
-+{
-+	int32_t nblock = count;
-+
-+	if (limit >= ni->block_count)
-+		limit = ni->block_count - 1;
-+
-+	while (ba < limit) {
-+		if (nmbm_get_block_state(ni, ba) == BLOCK_ST_GOOD)
-+			nblock--;
-+
-+		if (nblock < 0) {
-+			*nba = ba;
-+			return true;
-+		}
-+
-+		ba++;
-+	}
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_block_walk_desc - Skip specified number of good blocks, descending addr
-+ * @ni: NMBM instance structure
-+ * @ba: start physical block address
-+ * @nba: return physical block address after walk
-+ * @count: number of good blocks to be skipped
-+ * @limit: lowest block address allowed for walking
-+ *
-+ * Start from @ba, skipping any bad blocks, counting @count good blocks, and
-+ * return the next good block address.
-+ *
-+ * If no enough good blocks counted while @limit reached, false will be returned.
-+ *
-+ * If @count == 0, nearest good block address will be returned.
-+ * @limit is not counted in walking.
-+ */
-+static bool nmbm_block_walk_desc(struct nmbm_instance *ni, uint32_t ba,
-+				 uint32_t *nba, uint32_t count, uint32_t limit)
-+{
-+	int32_t nblock = count;
-+
-+	if (limit >= ni->block_count)
-+		limit = ni->block_count - 1;
-+
-+	while (ba > limit) {
-+		if (nmbm_get_block_state(ni, ba) == BLOCK_ST_GOOD)
-+			nblock--;
-+
-+		if (nblock < 0) {
-+			*nba = ba;
-+			return true;
-+		}
-+
-+		ba--;
-+	}
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_block_walk - Skip specified number of good blocks from curr. block addr
-+ * @ni: NMBM instance structure
-+ * @ascending: whether to walk ascending
-+ * @ba: start physical block address
-+ * @nba: return physical block address after walk
-+ * @count: number of good blocks to be skipped
-+ * @limit: highest/lowest block address allowed for walking
-+ *
-+ * Start from @ba, skipping any bad blocks, counting @count good blocks, and
-+ * return the next good block address.
-+ *
-+ * If no enough good blocks counted while @limit reached, false will be returned.
-+ *
-+ * If @count == 0, nearest good block address will be returned.
-+ * @limit can be set to negative if no limit required.
-+ * @limit is not counted in walking.
-+ */
-+static bool nmbm_block_walk(struct nmbm_instance *ni, bool ascending,
-+			    uint32_t ba, uint32_t *nba, int32_t count,
-+			    int32_t limit)
-+{
-+	if (ascending)
-+		return nmbm_block_walk_asc(ni, ba, nba, count, limit);
-+
-+	return nmbm_block_walk_desc(ni, ba, nba, count, limit);
-+}
-+
-+/*
-+ * nmbm_scan_badblocks - Scan and record all bad blocks
-+ * @ni: NMBM instance structure
-+ *
-+ * Scan the entire lower NAND chip and record all bad blocks in to block state
-+ * table.
-+ */
-+static void nmbm_scan_badblocks(struct nmbm_instance *ni)
-+{
-+	uint32_t ba;
-+
-+	for (ba = 0; ba < ni->block_count; ba++) {
-+		if (nmbm_check_bad_phys_block(ni, ba)) {
-+			nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+			nlog_info(ni, "Bad block %u [0x%08llx]\n", ba,
-+				 ba2addr(ni, ba));
-+		}
-+	}
-+}
-+
-+/*
-+ * nmbm_build_mapping_table - Build initial block mapping table
-+ * @ni: NMBM instance structure
-+ *
-+ * The initial mapping table will be compatible with the stratage of
-+ * factory production.
-+ */
-+static void nmbm_build_mapping_table(struct nmbm_instance *ni)
-+{
-+	uint32_t pb, lb;
-+
-+	for (pb = 0, lb = 0; pb < ni->mgmt_start_ba; pb++) {
-+		if (nmbm_get_block_state(ni, pb) == BLOCK_ST_BAD)
-+			continue;
-+
-+		/* Always map to the next good block */
-+		ni->block_mapping[lb++] = pb;
-+	}
-+
-+	ni->data_block_count = lb;
-+
-+	/* Unusable/Management blocks */
-+	for (pb = lb; pb < ni->block_count; pb++)
-+		ni->block_mapping[pb] = -1;
-+}
-+
-+/*
-+ * nmbm_erase_block_and_check - Erase a block and check its usability
-+ * @ni: NMBM instance structure
-+ * @ba: block address to be erased
-+ *
-+ * Erase a block anc check its usability
-+ *
-+ * Return true if the block is usable, false if erasure failure or the block
-+ * has too many bitflips.
-+ */
-+static bool nmbm_erase_block_and_check(struct nmbm_instance *ni, uint32_t ba)
-+{
-+	uint64_t addr, off;
-+	bool success;
-+	int ret;
-+
-+	success = nmbm_erase_phys_block(ni, ba2addr(ni, ba));
-+	if (!success)
-+		return false;
-+
-+	if (!(ni->lower.flags & NMBM_F_EMPTY_PAGE_ECC_OK))
-+		return true;
-+
-+	/* Check every page to make sure there aren't too many bitflips */
-+
-+	addr = ba2addr(ni, ba);
-+
-+	for (off = 0; off < ni->lower.erasesize; off += ni->lower.writesize) {
-+		WATCHDOG_RESET();
-+
-+		ret = nmbm_read_phys_page(ni, addr + off, ni->page_cache, NULL,
-+					  NMBM_MODE_PLACE_OOB);
-+		if (ret == -EBADMSG) {
-+			/*
-+			 * NMBM_F_EMPTY_PAGE_ECC_OK means the empty page is
-+			 * still protected by ECC. So reading pages with ECC
-+			 * enabled and -EBADMSG means there are too many
-+			 * bitflips that can't be recovered, and the block
-+			 * containing the page should be marked bad.
-+			 */
-+			nlog_err(ni,
-+				 "Too many bitflips in empty page at 0x%llx\n",
-+				 addr + off);
-+			return false;
-+		}
-+	}
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_erase_range - Erase a range of blocks
-+ * @ni: NMBM instance structure
-+ * @ba: block address where the erasure will start
-+ * @limit: top block address allowed for erasure
-+ *
-+ * Erase blocks within the specific range. Newly-found bad blocks will be
-+ * marked.
-+ *
-+ * @limit is not counted into the allowed erasure address.
-+ */
-+static void nmbm_erase_range(struct nmbm_instance *ni, uint32_t ba,
-+			     uint32_t limit)
-+{
-+	bool success;
-+
-+	while (ba < limit) {
-+		WATCHDOG_RESET();
-+
-+		if (nmbm_get_block_state(ni, ba) != BLOCK_ST_GOOD)
-+			goto next_block;
-+
-+		/* Insurance to detect unexpected bad block marked by user */
-+		if (nmbm_check_bad_phys_block(ni, ba)) {
-+			nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+			goto next_block;
-+		}
-+
-+		success = nmbm_erase_block_and_check(ni, ba);
-+		if (success)
-+			goto next_block;
-+
-+		nmbm_mark_phys_bad_block(ni, ba);
-+		nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+
-+	next_block:
-+		ba++;
-+	}
-+}
-+
-+/*
-+ * nmbm_write_repeated_data - Write critical data to a block with retry
-+ * @ni: NMBM instance structure
-+ * @ba: block address where the data will be written to
-+ * @data: the data to be written
-+ * @size: size of the data
-+ *
-+ * Write data to every page of the block. Success only if all pages within
-+ * this block have been successfully written.
-+ *
-+ * Make sure data size is not bigger than one page.
-+ *
-+ * This function will write and verify every page for at most
-+ * NMBM_TRY_COUNT times.
-+ */
-+static bool nmbm_write_repeated_data(struct nmbm_instance *ni, uint32_t ba,
-+				     const void *data, uint32_t size)
-+{
-+	uint64_t addr, off;
-+	bool success;
-+	int ret;
-+
-+	if (size > ni->lower.writesize)
-+		return false;
-+
-+	addr = ba2addr(ni, ba);
-+
-+	for (off = 0; off < ni->lower.erasesize; off += ni->lower.writesize) {
-+		WATCHDOG_RESET();
-+
-+		/* Prepare page data. fill 0xff to unused region */
-+		memcpy(ni->page_cache, data, size);
-+		memset(ni->page_cache + size, 0xff, ni->rawpage_size - size);
-+
-+		success = nmbm_write_phys_page(ni, addr + off, ni->page_cache,
-+					       NULL, NMBM_MODE_PLACE_OOB);
-+		if (!success)
-+			return false;
-+
-+		/* Verify the data just written. ECC error indicates failure */
-+		ret = nmbm_read_phys_page(ni, addr + off, ni->page_cache, NULL,
-+					  NMBM_MODE_PLACE_OOB);
-+		if (ret < 0)
-+			return false;
-+
-+		if (memcmp(ni->page_cache, data, size))
-+			return false;
-+	}
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_write_signature - Write signature to NAND chip
-+ * @ni: NMBM instance structure
-+ * @limit: top block address allowed for writing
-+ * @signature: the signature to be written
-+ * @signature_ba: the actual block address where signature is written to
-+ *
-+ * Write signature within a specific range, from chip bottom to limit.
-+ * At most one block will be written.
-+ *
-+ * @limit is not counted into the allowed write address.
-+ */
-+static bool nmbm_write_signature(struct nmbm_instance *ni, uint32_t limit,
-+				 const struct nmbm_signature *signature,
-+				 uint32_t *signature_ba)
-+{
-+	uint32_t ba = ni->block_count - 1;
-+	bool success;
-+
-+	while (ba > limit) {
-+		WATCHDOG_RESET();
-+
-+		if (nmbm_get_block_state(ni, ba) != BLOCK_ST_GOOD)
-+			goto next_block;
-+
-+		/* Insurance to detect unexpected bad block marked by user */
-+		if (nmbm_check_bad_phys_block(ni, ba)) {
-+			nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+			goto next_block;
-+		}
-+
-+		success = nmbm_erase_block_and_check(ni, ba);
-+		if (!success)
-+			goto skip_bad_block;
-+
-+		success = nmbm_write_repeated_data(ni, ba, signature,
-+						   sizeof(*signature));
-+		if (success) {
-+			*signature_ba = ba;
-+			return true;
-+		}
-+
-+	skip_bad_block:
-+		nmbm_mark_phys_bad_block(ni, ba);
-+		nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+
-+	next_block:
-+		ba--;
-+	};
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbn_read_data - Read data
-+ * @ni: NMBM instance structure
-+ * @addr: linear address where the data will be read from
-+ * @data: the data to be read
-+ * @size: the size of data
-+ *
-+ * Read data range.
-+ * Every page will be tried for at most NMBM_TRY_COUNT times.
-+ *
-+ * Return 0 for success, positive value for corrected bitflip count,
-+ * -EBADMSG for ecc error, other negative values for other errors
-+ */
-+static int nmbn_read_data(struct nmbm_instance *ni, uint64_t addr, void *data,
-+			  uint32_t size)
-+{
-+	uint64_t off = addr;
-+	uint8_t *ptr = data;
-+	uint32_t sizeremain = size, chunksize, leading;
-+	int ret;
-+
-+	while (sizeremain) {
-+		WATCHDOG_RESET();
-+
-+		leading = off & ni->writesize_mask;
-+		chunksize = ni->lower.writesize - leading;
-+		if (chunksize > sizeremain)
-+			chunksize = sizeremain;
-+
-+		if (chunksize == ni->lower.writesize) {
-+			ret = nmbm_read_phys_page(ni, off - leading, ptr, NULL,
-+						  NMBM_MODE_PLACE_OOB);
-+			if (ret < 0)
-+				return ret;
-+		} else {
-+			ret = nmbm_read_phys_page(ni, off - leading,
-+						  ni->page_cache, NULL,
-+						  NMBM_MODE_PLACE_OOB);
-+			if (ret < 0)
-+				return ret;
-+
-+			memcpy(ptr, ni->page_cache + leading, chunksize);
-+		}
-+
-+		off += chunksize;
-+		ptr += chunksize;
-+		sizeremain -= chunksize;
-+	}
-+
-+	return 0;
-+}
-+
-+/*
-+ * nmbn_write_verify_data - Write data with validation
-+ * @ni: NMBM instance structure
-+ * @addr: linear address where the data will be written to
-+ * @data: the data to be written
-+ * @size: the size of data
-+ *
-+ * Write data and verify.
-+ * Every page will be tried for at most NMBM_TRY_COUNT times.
-+ */
-+static bool nmbn_write_verify_data(struct nmbm_instance *ni, uint64_t addr,
-+				   const void *data, uint32_t size)
-+{
-+	uint64_t off = addr;
-+	const uint8_t *ptr = data;
-+	uint32_t sizeremain = size, chunksize, leading;
-+	bool success;
-+	int ret;
-+
-+	while (sizeremain) {
-+		WATCHDOG_RESET();
-+
-+		leading = off & ni->writesize_mask;
-+		chunksize = ni->lower.writesize - leading;
-+		if (chunksize > sizeremain)
-+			chunksize = sizeremain;
-+
-+		/* Prepare page data. fill 0xff to unused region */
-+		memset(ni->page_cache, 0xff, ni->rawpage_size);
-+		memcpy(ni->page_cache + leading, ptr, chunksize);
-+
-+		success = nmbm_write_phys_page(ni, off - leading,
-+					       ni->page_cache, NULL,
-+					       NMBM_MODE_PLACE_OOB);
-+		if (!success)
-+			return false;
-+
-+		/* Verify the data just written. ECC error indicates failure */
-+		ret = nmbm_read_phys_page(ni, off - leading, ni->page_cache,
-+					  NULL, NMBM_MODE_PLACE_OOB);
-+		if (ret < 0)
-+			return false;
-+
-+		if (memcmp(ni->page_cache + leading, ptr, chunksize))
-+			return false;
-+
-+		off += chunksize;
-+		ptr += chunksize;
-+		sizeremain -= chunksize;
-+	}
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_write_mgmt_range - Write management data into NAND within a range
-+ * @ni: NMBM instance structure
-+ * @addr: preferred start block address for writing
-+ * @limit: highest block address allowed for writing
-+ * @data: the data to be written
-+ * @size: the size of data
-+ * @actual_start_ba: actual start block address of data
-+ * @actual_end_ba: block address after the end of data
-+ *
-+ * @limit is not counted into the allowed write address.
-+ */
-+static bool nmbm_write_mgmt_range(struct nmbm_instance *ni, uint32_t ba,
-+				  uint32_t limit, const void *data,
-+				  uint32_t size, uint32_t *actual_start_ba,
-+				  uint32_t *actual_end_ba)
-+{
-+	const uint8_t *ptr = data;
-+	uint32_t sizeremain = size, chunksize;
-+	bool success;
-+
-+	while (sizeremain && ba < limit) {
-+		WATCHDOG_RESET();
-+
-+		chunksize = sizeremain;
-+		if (chunksize > ni->lower.erasesize)
-+			chunksize = ni->lower.erasesize;
-+
-+		if (nmbm_get_block_state(ni, ba) != BLOCK_ST_GOOD)
-+			goto next_block;
-+
-+		/* Insurance to detect unexpected bad block marked by user */
-+		if (nmbm_check_bad_phys_block(ni, ba)) {
-+			nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+			goto next_block;
-+		}
-+
-+		success = nmbm_erase_block_and_check(ni, ba);
-+		if (!success)
-+			goto skip_bad_block;
-+
-+		success = nmbn_write_verify_data(ni, ba2addr(ni, ba), ptr,
-+						 chunksize);
-+		if (!success)
-+			goto skip_bad_block;
-+
-+		if (sizeremain == size)
-+			*actual_start_ba = ba;
-+
-+		ptr += chunksize;
-+		sizeremain -= chunksize;
-+
-+		goto next_block;
-+
-+	skip_bad_block:
-+		nmbm_mark_phys_bad_block(ni, ba);
-+		nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+
-+	next_block:
-+		ba++;
-+	}
-+
-+	if (sizeremain)
-+		return false;
-+
-+	*actual_end_ba = ba;
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_generate_info_table_cache - Generate info table cache data
-+ * @ni: NMBM instance structure
-+ *
-+ * Generate info table cache data to be written into flash.
-+ */
-+static bool nmbm_generate_info_table_cache(struct nmbm_instance *ni)
-+{
-+	bool changed = false;
-+
-+	memset(ni->info_table_cache, 0xff, ni->info_table_size);
-+
-+	memcpy(ni->info_table_cache + ni->info_table.state_table_off,
-+	       ni->block_state, ni->state_table_size);
-+
-+	memcpy(ni->info_table_cache + ni->info_table.mapping_table_off,
-+		ni->block_mapping, ni->mapping_table_size);
-+
-+	ni->info_table.header.magic = NMBM_MAGIC_INFO_TABLE;
-+	ni->info_table.header.version = NMBM_VER;
-+	ni->info_table.header.size = ni->info_table_size;
-+
-+	if (ni->block_state_changed || ni->block_mapping_changed) {
-+		ni->info_table.write_count++;
-+		changed = true;
-+	}
-+
-+	memcpy(ni->info_table_cache, &ni->info_table, sizeof(ni->info_table));
-+
-+	nmbm_update_checksum((struct nmbm_header *)ni->info_table_cache);
-+
-+	return changed;
-+}
-+
-+/*
-+ * nmbm_write_info_table - Write info table into NAND within a range
-+ * @ni: NMBM instance structure
-+ * @ba: preferred start block address for writing
-+ * @limit: highest block address allowed for writing
-+ * @actual_start_ba: actual start block address of info table
-+ * @actual_end_ba: block address after the end of info table
-+ *
-+ * @limit is counted into the allowed write address.
-+ */
-+static bool nmbm_write_info_table(struct nmbm_instance *ni, uint32_t ba,
-+				  uint32_t limit, uint32_t *actual_start_ba,
-+				  uint32_t *actual_end_ba)
-+{
-+	return nmbm_write_mgmt_range(ni, ba, limit, ni->info_table_cache,
-+				     ni->info_table_size, actual_start_ba,
-+				     actual_end_ba);
-+}
-+
-+/*
-+ * nmbm_mark_tables_clean - Mark info table `clean'
-+ * @ni: NMBM instance structure
-+ */
-+static void nmbm_mark_tables_clean(struct nmbm_instance *ni)
-+{
-+	ni->block_state_changed = 0;
-+	ni->block_mapping_changed = 0;
-+}
-+
-+/*
-+ * nmbm_try_reserve_blocks - Reserve blocks with compromisation
-+ * @ni: NMBM instance structure
-+ * @ba: start physical block address
-+ * @nba: return physical block address after reservation
-+ * @count: number of good blocks to be skipped
-+ * @min_count: minimum number of good blocks to be skipped
-+ * @limit: highest/lowest block address allowed for walking
-+ *
-+ * Reserve specific blocks. If failed, try to reserve as many as possible.
-+ */
-+static bool nmbm_try_reserve_blocks(struct nmbm_instance *ni, uint32_t ba,
-+				    uint32_t *nba, uint32_t count,
-+				    int32_t min_count, int32_t limit)
-+{
-+	int32_t nblocks = count;
-+	bool success;
-+
-+	while (nblocks >= min_count) {
-+		success = nmbm_block_walk(ni, true, ba, nba, nblocks, limit);
-+		if (success)
-+			return true;
-+
-+		nblocks--;
-+	}
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_rebuild_info_table - Build main & backup info table from scratch
-+ * @ni: NMBM instance structure
-+ * @allow_no_gap: allow no spare blocks between two tables
-+ */
-+static bool nmbm_rebuild_info_table(struct nmbm_instance *ni)
-+{
-+	uint32_t table_start_ba, table_end_ba, next_start_ba;
-+	uint32_t main_table_end_ba;
-+	bool success;
-+
-+	/* Set initial value */
-+	ni->main_table_ba = 0;
-+	ni->backup_table_ba = 0;
-+	ni->mapping_blocks_ba = ni->mapping_blocks_top_ba;
-+
-+	/* Write main table */
-+	success = nmbm_write_info_table(ni, ni->mgmt_start_ba,
-+					ni->mapping_blocks_top_ba,
-+					&table_start_ba, &table_end_ba);
-+	if (!success) {
-+		/* Failed to write main table, data will be lost */
-+		nlog_emerg(ni, "Unable to write at least one info table!\n");
-+		nlog_emerg(ni, "Please save your data before power off!\n");
-+		ni->protected = 1;
-+		return false;
-+	}
-+
-+	/* Main info table is successfully written, record its offset */
-+	ni->main_table_ba = table_start_ba;
-+	main_table_end_ba = table_end_ba;
-+
-+	/* Adjust mapping_blocks_ba */
-+	ni->mapping_blocks_ba = table_end_ba;
-+
-+	nmbm_mark_tables_clean(ni);
-+
-+	nlog_table_creation(ni, true, table_start_ba, table_end_ba);
-+
-+	/* Reserve spare blocks for main info table. */
-+	success = nmbm_try_reserve_blocks(ni, table_end_ba,
-+					  &next_start_ba,
-+					  ni->info_table_spare_blocks, 0,
-+					  ni->mapping_blocks_top_ba -
-+					  size2blk(ni, ni->info_table_size));
-+	if (!success) {
-+		/* There is no spare block. */
-+		nlog_debug(ni, "No room for backup info table\n");
-+		return true;
-+	}
-+
-+	/* Write backup info table. */
-+	success = nmbm_write_info_table(ni, next_start_ba,
-+					ni->mapping_blocks_top_ba,
-+					&table_start_ba, &table_end_ba);
-+	if (!success) {
-+		/* There is no enough blocks for backup table. */
-+		nlog_debug(ni, "No room for backup info table\n");
-+		return true;
-+	}
-+
-+	/* Backup table is successfully written, record its offset */
-+	ni->backup_table_ba = table_start_ba;
-+
-+	/* Adjust mapping_blocks_off */
-+	ni->mapping_blocks_ba = table_end_ba;
-+
-+	/* Erase spare blocks of main table to clean possible interference data */
-+	nmbm_erase_range(ni, main_table_end_ba, ni->backup_table_ba);
-+
-+	nlog_table_creation(ni, false, table_start_ba, table_end_ba);
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_rescue_single_info_table - Rescue when there is only one info table
-+ * @ni: NMBM instance structure
-+ *
-+ * This function is called when there is only one info table exists.
-+ * This function may fail if we can't write new info table
-+ */
-+static bool nmbm_rescue_single_info_table(struct nmbm_instance *ni)
-+{
-+	uint32_t table_start_ba, table_end_ba, write_ba;
-+	bool success;
-+
-+	/* Try to write new info table in front of existing table */
-+	success = nmbm_write_info_table(ni, ni->mgmt_start_ba,
-+					ni->main_table_ba,
-+					&table_start_ba,
-+					&table_end_ba);
-+	if (success) {
-+		/*
-+		 * New table becomes the main table, existing table becomes
-+		 * the backup table.
-+		 */
-+		ni->backup_table_ba = ni->main_table_ba;
-+		ni->main_table_ba = table_start_ba;
-+
-+		nmbm_mark_tables_clean(ni);
-+
-+		/* Erase spare blocks of main table to clean possible interference data */
-+		nmbm_erase_range(ni, table_end_ba, ni->backup_table_ba);
-+
-+		nlog_table_creation(ni, true, table_start_ba, table_end_ba);
-+
-+		return true;
-+	}
-+
-+	/* Try to reserve spare blocks for existing table */
-+	success = nmbm_try_reserve_blocks(ni, ni->mapping_blocks_ba, &write_ba,
-+					  ni->info_table_spare_blocks, 0,
-+					  ni->mapping_blocks_top_ba -
-+					  size2blk(ni, ni->info_table_size));
-+	if (!success) {
-+		nlog_warn(ni, "Failed to rescue single info table\n");
-+		return false;
-+	}
-+
-+	/* Try to write new info table next to the existing table */
-+	while (write_ba >= ni->mapping_blocks_ba) {
-+		WATCHDOG_RESET();
-+
-+		success = nmbm_write_info_table(ni, write_ba,
-+						ni->mapping_blocks_top_ba,
-+						&table_start_ba,
-+						&table_end_ba);
-+		if (success)
-+			break;
-+
-+		write_ba--;
-+	}
-+
-+	if (success) {
-+		/* Erase spare blocks of main table to clean possible interference data */
-+		nmbm_erase_range(ni, ni->mapping_blocks_ba, table_start_ba);
-+
-+		/* New table becomes the backup table */
-+		ni->backup_table_ba = table_start_ba;
-+		ni->mapping_blocks_ba = table_end_ba;
-+
-+		nmbm_mark_tables_clean(ni);
-+
-+		nlog_table_creation(ni, false, table_start_ba, table_end_ba);
-+
-+		return true;
-+	}
-+
-+	nlog_warn(ni, "Failed to rescue single info table\n");
-+	return false;
-+}
-+
-+/*
-+ * nmbm_update_single_info_table - Update specific one info table
-+ * @ni: NMBM instance structure
-+ */
-+static bool nmbm_update_single_info_table(struct nmbm_instance *ni,
-+					  bool update_main_table)
-+{
-+	uint32_t write_start_ba, write_limit, table_start_ba, table_end_ba;
-+	bool success;
-+
-+	/* Determine the write range */
-+	if (update_main_table) {
-+		write_start_ba = ni->main_table_ba;
-+		write_limit = ni->backup_table_ba;
-+	} else {
-+		write_start_ba = ni->backup_table_ba;
-+		write_limit = ni->mapping_blocks_top_ba;
-+	}
-+
-+	nmbm_mark_block_color_mgmt(ni, write_start_ba, write_limit - 1);
-+
-+	success = nmbm_write_info_table(ni, write_start_ba, write_limit,
-+					&table_start_ba, &table_end_ba);
-+	if (success) {
-+		if (update_main_table) {
-+			ni->main_table_ba = table_start_ba;
-+		} else {
-+			ni->backup_table_ba = table_start_ba;
-+			ni->mapping_blocks_ba = table_end_ba;
-+		}
-+
-+		nmbm_mark_tables_clean(ni);
-+
-+		nlog_table_update(ni, update_main_table, table_start_ba,
-+				 table_end_ba);
-+
-+		return true;
-+	}
-+
-+	if (update_main_table) {
-+		/*
-+		 * If failed to update main table, make backup table the new
-+		 * main table, and call nmbm_rescue_single_info_table()
-+		 */
-+		nlog_warn(ni, "Unable to update %s info table\n",
-+			 update_main_table ? "Main" : "Backup");
-+
-+		ni->main_table_ba = ni->backup_table_ba;
-+		ni->backup_table_ba = 0;
-+		return nmbm_rescue_single_info_table(ni);
-+	}
-+
-+	/* Only one table left */
-+	ni->mapping_blocks_ba = ni->backup_table_ba;
-+	ni->backup_table_ba = 0;
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_rescue_main_info_table - Rescue when failed to write main info table
-+ * @ni: NMBM instance structure
-+ *
-+ * This function is called when main info table failed to be written, and
-+ *    backup info table exists.
-+ */
-+static bool nmbm_rescue_main_info_table(struct nmbm_instance *ni)
-+{
-+	uint32_t tmp_table_start_ba, tmp_table_end_ba, main_table_start_ba;
-+	uint32_t main_table_end_ba, write_ba;
-+	uint32_t info_table_erasesize = size2blk(ni, ni->info_table_size);
-+	bool success;
-+
-+	/* Try to reserve spare blocks for existing backup info table */
-+	success = nmbm_try_reserve_blocks(ni, ni->mapping_blocks_ba, &write_ba,
-+					  ni->info_table_spare_blocks, 0,
-+					  ni->mapping_blocks_top_ba -
-+					  info_table_erasesize);
-+	if (!success) {
-+		/* There is no spare block. Backup info table becomes the main table. */
-+		nlog_err(ni, "No room for temporary info table\n");
-+		ni->main_table_ba = ni->backup_table_ba;
-+		ni->backup_table_ba = 0;
-+		return true;
-+	}
-+
-+	/* Try to write temporary info table into spare unmapped blocks */
-+	while (write_ba >= ni->mapping_blocks_ba) {
-+		WATCHDOG_RESET();
-+
-+		success = nmbm_write_info_table(ni, write_ba,
-+						ni->mapping_blocks_top_ba,
-+						&tmp_table_start_ba,
-+						&tmp_table_end_ba);
-+		if (success)
-+			break;
-+
-+		write_ba--;
-+	}
-+
-+	if (!success) {
-+		/* Backup info table becomes the main table */
-+		nlog_err(ni, "Failed to update main info table\n");
-+		ni->main_table_ba = ni->backup_table_ba;
-+		ni->backup_table_ba = 0;
-+		return true;
-+	}
-+
-+	/* Adjust mapping_blocks_off */
-+	ni->mapping_blocks_ba = tmp_table_end_ba;
-+
-+	nmbm_mark_block_color_mgmt(ni, ni->backup_table_ba,
-+				   tmp_table_end_ba - 1);
-+
-+	/*
-+	 * Now write main info table at the beginning of management area.
-+	 * This operation will generally destroy the original backup info
-+	 * table.
-+	 */
-+	success = nmbm_write_info_table(ni, ni->mgmt_start_ba,
-+					tmp_table_start_ba,
-+					&main_table_start_ba,
-+					&main_table_end_ba);
-+	if (!success) {
-+		/* Temporary info table becomes the main table */
-+		ni->main_table_ba = tmp_table_start_ba;
-+		ni->backup_table_ba = 0;
-+
-+		nmbm_mark_tables_clean(ni);
-+
-+		nlog_err(ni, "Failed to update main info table\n");
-+		nmbm_mark_block_color_info_table(ni, tmp_table_start_ba,
-+						 tmp_table_end_ba - 1);
-+
-+		return true;
-+	}
-+
-+	/* Main info table has been successfully written, record its offset */
-+	ni->main_table_ba = main_table_start_ba;
-+
-+	nmbm_mark_tables_clean(ni);
-+
-+	nlog_table_creation(ni, true, main_table_start_ba, main_table_end_ba);
-+
-+	/*
-+	 * Temporary info table becomes the new backup info table if it's
-+	 * not overwritten.
-+	 */
-+	if (main_table_end_ba <= tmp_table_start_ba) {
-+		ni->backup_table_ba = tmp_table_start_ba;
-+
-+		nlog_table_creation(ni, false, tmp_table_start_ba,
-+				   tmp_table_end_ba);
-+
-+		return true;
-+	}
-+
-+	/* Adjust mapping_blocks_off */
-+	ni->mapping_blocks_ba = main_table_end_ba;
-+
-+	/* Try to reserve spare blocks for new main info table */
-+	success = nmbm_try_reserve_blocks(ni, main_table_end_ba, &write_ba,
-+					  ni->info_table_spare_blocks, 0,
-+					  ni->mapping_blocks_top_ba -
-+					  info_table_erasesize);
-+	if (!success) {
-+		/* There is no spare block. Only main table exists. */
-+		nlog_err(ni, "No room for backup info table\n");
-+		ni->backup_table_ba = 0;
-+		return true;
-+	}
-+
-+	/* Write new backup info table. */
-+	while (write_ba >= main_table_end_ba) {
-+		WATCHDOG_RESET();
-+
-+		success = nmbm_write_info_table(ni, write_ba,
-+						ni->mapping_blocks_top_ba,
-+						&tmp_table_start_ba,
-+						&tmp_table_end_ba);
-+		if (success)
-+			break;
-+
-+		write_ba--;
-+	}
-+
-+	if (!success) {
-+		nlog_err(ni, "No room for backup info table\n");
-+		ni->backup_table_ba = 0;
-+		return true;
-+	}
-+
-+	/* Backup info table has been successfully written, record its offset */
-+	ni->backup_table_ba = tmp_table_start_ba;
-+
-+	/* Adjust mapping_blocks_off */
-+	ni->mapping_blocks_ba = tmp_table_end_ba;
-+
-+	/* Erase spare blocks of main table to clean possible interference data */
-+	nmbm_erase_range(ni, main_table_end_ba, ni->backup_table_ba);
-+
-+	nlog_table_creation(ni, false, tmp_table_start_ba, tmp_table_end_ba);
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_update_info_table_once - Update info table once
-+ * @ni: NMBM instance structure
-+ * @force: force update
-+ *
-+ * Update both main and backup info table. Return true if at least one info
-+ * table has been successfully written.
-+ * This function only try to update info table once regard less of the result.
-+ */
-+static bool nmbm_update_info_table_once(struct nmbm_instance *ni, bool force)
-+{
-+	uint32_t table_start_ba, table_end_ba;
-+	uint32_t main_table_limit;
-+	bool success;
-+
-+	/* Do nothing if there is no change */
-+	if (!nmbm_generate_info_table_cache(ni) && !force)
-+		return true;
-+
-+	/* Check whether both two tables exist */
-+	if (!ni->backup_table_ba) {
-+		main_table_limit = ni->mapping_blocks_top_ba;
-+		goto write_main_table;
-+	}
-+
-+	nmbm_mark_block_color_mgmt(ni, ni->backup_table_ba,
-+				   ni->mapping_blocks_ba - 1);
-+
-+	/*
-+	 * Write backup info table in its current range.
-+	 * Note that limit is set to mapping_blocks_top_off to provide as many
-+	 * spare blocks as possible for the backup table. If at last
-+	 * unmapped blocks are used by backup table, mapping_blocks_off will
-+	 * be adjusted.
-+	 */
-+	success = nmbm_write_info_table(ni, ni->backup_table_ba,
-+					ni->mapping_blocks_top_ba,
-+					&table_start_ba, &table_end_ba);
-+	if (!success) {
-+		/*
-+		 * There is nothing to do if failed to write backup table.
-+		 * Write the main table now.
-+		 */
-+		nlog_err(ni, "No room for backup table\n");
-+		ni->mapping_blocks_ba = ni->backup_table_ba;
-+		ni->backup_table_ba = 0;
-+		main_table_limit = ni->mapping_blocks_top_ba;
-+		goto write_main_table;
-+	}
-+
-+	/* Backup table is successfully written, record its offset */
-+	ni->backup_table_ba = table_start_ba;
-+
-+	/* Adjust mapping_blocks_off */
-+	ni->mapping_blocks_ba = table_end_ba;
-+
-+	nmbm_mark_tables_clean(ni);
-+
-+	/* The normal limit of main table */
-+	main_table_limit = ni->backup_table_ba;
-+
-+	nlog_table_update(ni, false, table_start_ba, table_end_ba);
-+
-+write_main_table:
-+	if (!ni->main_table_ba)
-+		goto rebuild_tables;
-+
-+	if (!ni->backup_table_ba)
-+		nmbm_mark_block_color_mgmt(ni, ni->mgmt_start_ba,
-+					   ni->mapping_blocks_ba - 1);
-+	else
-+		nmbm_mark_block_color_mgmt(ni, ni->mgmt_start_ba,
-+					   ni->backup_table_ba - 1);
-+
-+	/* Write main info table in its current range */
-+	success = nmbm_write_info_table(ni, ni->main_table_ba,
-+					main_table_limit, &table_start_ba,
-+					&table_end_ba);
-+	if (!success) {
-+		/* If failed to write main table, go rescue procedure */
-+		if (!ni->backup_table_ba)
-+			goto rebuild_tables;
-+
-+		return nmbm_rescue_main_info_table(ni);
-+	}
-+
-+	/* Main info table is successfully written, record its offset */
-+	ni->main_table_ba = table_start_ba;
-+
-+	/* Adjust mapping_blocks_off */
-+	if (!ni->backup_table_ba)
-+		ni->mapping_blocks_ba = table_end_ba;
-+
-+	nmbm_mark_tables_clean(ni);
-+
-+	nlog_table_update(ni, true, table_start_ba, table_end_ba);
-+
-+	return true;
-+
-+rebuild_tables:
-+	return nmbm_rebuild_info_table(ni);
-+}
-+
-+/*
-+ * nmbm_update_info_table - Update info table
-+ * @ni: NMBM instance structure
-+ *
-+ * Update both main and backup info table. Return true if at least one table
-+ * has been successfully written.
-+ * This function will try to update info table repeatedly until no new bad
-+ * block found during updating.
-+ */
-+static bool nmbm_update_info_table(struct nmbm_instance *ni)
-+{
-+	bool success;
-+
-+	if (ni->protected)
-+		return true;
-+
-+	while (ni->block_state_changed || ni->block_mapping_changed) {
-+		success = nmbm_update_info_table_once(ni, false);
-+		if (!success) {
-+			nlog_err(ni, "Failed to update info table\n");
-+			return false;
-+		}
-+	}
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_map_block - Map a bad block to a unused spare block
-+ * @ni: NMBM instance structure
-+ * @lb: logic block addr to map
-+ */
-+static bool nmbm_map_block(struct nmbm_instance *ni, uint32_t lb)
-+{
-+	uint32_t pb;
-+	bool success;
-+
-+	if (ni->mapping_blocks_ba == ni->mapping_blocks_top_ba) {
-+		nlog_warn(ni, "No spare unmapped blocks.\n");
-+		return false;
-+	}
-+
-+	success = nmbm_block_walk(ni, false, ni->mapping_blocks_top_ba, &pb, 0,
-+				  ni->mapping_blocks_ba);
-+	if (!success) {
-+		nlog_warn(ni, "No spare unmapped blocks.\n");
-+		nmbm_update_info_table(ni);
-+		ni->mapping_blocks_top_ba = ni->mapping_blocks_ba;
-+		return false;
-+	}
-+
-+	ni->block_mapping[lb] = pb;
-+	ni->mapping_blocks_top_ba--;
-+	ni->block_mapping_changed++;
-+
-+	nlog_info(ni, "Logic block %u mapped to physical blcok %u\n", lb, pb);
-+	nmbm_mark_block_color_mapped(ni, pb);
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_create_info_table - Create info table(s)
-+ * @ni: NMBM instance structure
-+ *
-+ * This function assumes that the chip has no existing info table(s)
-+ */
-+static bool nmbm_create_info_table(struct nmbm_instance *ni)
-+{
-+	uint32_t lb;
-+	bool success;
-+
-+	/* Set initial mapping_blocks_top_off  */
-+	success = nmbm_block_walk(ni, false, ni->signature_ba,
-+				  &ni->mapping_blocks_top_ba, 1,
-+				  ni->mgmt_start_ba);
-+	if (!success) {
-+		nlog_err(ni, "No room for spare blocks\n");
-+		return false;
-+	}
-+
-+	/* Generate info table cache */
-+	nmbm_generate_info_table_cache(ni);
-+
-+	/* Write info table */
-+	success = nmbm_rebuild_info_table(ni);
-+	if (!success) {
-+		nlog_err(ni, "Failed to build info tables\n");
-+		return false;
-+	}
-+
-+	/* Remap bad block(s) at end of data area */
-+	for (lb = ni->data_block_count; lb < ni->mgmt_start_ba; lb++) {
-+		success = nmbm_map_block(ni, lb);
-+		if (!success)
-+			break;
-+
-+		ni->data_block_count++;
-+	}
-+
-+	/* If state table and/or mapping table changed, update info table. */
-+	success = nmbm_update_info_table(ni);
-+	if (!success)
-+		return false;
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_create_new - Create NMBM on a new chip
-+ * @ni: NMBM instance structure
-+ */
-+static bool nmbm_create_new(struct nmbm_instance *ni)
-+{
-+	bool success;
-+
-+	/* Determine the boundary of management blocks */
-+	ni->mgmt_start_ba = ni->block_count * (NMBM_MGMT_DIV - ni->lower.max_ratio) / NMBM_MGMT_DIV;
-+
-+	if (ni->lower.max_reserved_blocks && ni->block_count - ni->mgmt_start_ba > ni->lower.max_reserved_blocks)
-+		ni->mgmt_start_ba = ni->block_count - ni->lower.max_reserved_blocks;
-+
-+	nlog_info(ni, "NMBM management region starts at block %u [0x%08llx]\n",
-+		  ni->mgmt_start_ba, ba2addr(ni, ni->mgmt_start_ba));
-+	nmbm_mark_block_color_mgmt(ni, ni->mgmt_start_ba, ni->block_count - 1);
-+
-+	/* Fill block state table & mapping table */
-+	nmbm_scan_badblocks(ni);
-+	nmbm_build_mapping_table(ni);
-+
-+	/* Write signature */
-+	ni->signature.header.magic = NMBM_MAGIC_SIGNATURE;
-+	ni->signature.header.version = NMBM_VER;
-+	ni->signature.header.size = sizeof(ni->signature);
-+	ni->signature.nand_size = ni->lower.size;
-+	ni->signature.block_size = ni->lower.erasesize;
-+	ni->signature.page_size = ni->lower.writesize;
-+	ni->signature.spare_size = ni->lower.oobsize;
-+	ni->signature.mgmt_start_pb = ni->mgmt_start_ba;
-+	ni->signature.max_try_count = NMBM_TRY_COUNT;
-+	nmbm_update_checksum(&ni->signature.header);
-+
-+	if (ni->lower.flags & NMBM_F_READ_ONLY) {
-+		nlog_info(ni, "NMBM has been initialized in read-only mode\n");
-+		return true;
-+	}
-+
-+	success = nmbm_write_signature(ni, ni->mgmt_start_ba,
-+				       &ni->signature, &ni->signature_ba);
-+	if (!success) {
-+		nlog_err(ni, "Failed to write signature to a proper offset\n");
-+		return false;
-+	}
-+
-+	nlog_info(ni, "Signature has been written to block %u [0x%08llx]\n",
-+		 ni->signature_ba, ba2addr(ni, ni->signature_ba));
-+	nmbm_mark_block_color_signature(ni, ni->signature_ba);
-+
-+	/* Write info table(s) */
-+	success = nmbm_create_info_table(ni);
-+	if (success) {
-+		nlog_info(ni, "NMBM has been successfully created\n");
-+		return true;
-+	}
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_check_info_table_header - Check if a info table header is valid
-+ * @ni: NMBM instance structure
-+ * @data: pointer to the info table header
-+ */
-+static bool nmbm_check_info_table_header(struct nmbm_instance *ni, void *data)
-+{
-+	struct nmbm_info_table_header *ifthdr = data;
-+
-+	if (ifthdr->header.magic != NMBM_MAGIC_INFO_TABLE)
-+		return false;
-+
-+	if (ifthdr->header.size != ni->info_table_size)
-+		return false;
-+
-+	if (ifthdr->mapping_table_off - ifthdr->state_table_off < ni->state_table_size)
-+		return false;
-+
-+	if (ni->info_table_size - ifthdr->mapping_table_off < ni->mapping_table_size)
-+		return false;
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_check_info_table - Check if a whole info table is valid
-+ * @ni: NMBM instance structure
-+ * @start_ba: start block address of this table
-+ * @end_ba: end block address of this table
-+ * @data: pointer to the info table header
-+ * @mapping_blocks_top_ba: return the block address of top remapped block
-+ */
-+static bool nmbm_check_info_table(struct nmbm_instance *ni, uint32_t start_ba,
-+				  uint32_t end_ba, void *data,
-+				  uint32_t *mapping_blocks_top_ba)
-+{
-+	struct nmbm_info_table_header *ifthdr = data;
-+	int32_t *block_mapping = (int32_t *)((uintptr_t)data + ifthdr->mapping_table_off);
-+	nmbm_bitmap_t *block_state = (nmbm_bitmap_t *)((uintptr_t)data + ifthdr->state_table_off);
-+	uint32_t minimum_mapping_pb = ni->signature_ba;
-+	uint32_t ba;
-+
-+	for (ba = 0; ba < ni->data_block_count; ba++) {
-+		if ((block_mapping[ba] >= ni->data_block_count && block_mapping[ba] < end_ba) ||
-+		    block_mapping[ba] == ni->signature_ba)
-+			return false;
-+
-+		if (block_mapping[ba] >= end_ba && block_mapping[ba] < minimum_mapping_pb)
-+			minimum_mapping_pb = block_mapping[ba];
-+	}
-+
-+	for (ba = start_ba; ba < end_ba; ba++) {
-+		if (nmbm_get_block_state(ni, ba) != BLOCK_ST_GOOD)
-+			continue;
-+
-+		if (nmbm_get_block_state_raw(block_state, ba) != BLOCK_ST_GOOD)
-+			return false;
-+	}
-+
-+	*mapping_blocks_top_ba = minimum_mapping_pb - 1;
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_try_load_info_table - Try to load info table from a address
-+ * @ni: NMBM instance structure
-+ * @ba: start block address of the info table
-+ * @eba: return the block address after end of the table
-+ * @write_count: return the write count of this table
-+ * @mapping_blocks_top_ba: return the block address of top remapped block
-+ * @table_loaded: used to record whether ni->info_table has valid data
-+ */
-+static bool nmbm_try_load_info_table(struct nmbm_instance *ni, uint32_t ba,
-+				     uint32_t *eba, uint32_t *write_count,
-+				     uint32_t *mapping_blocks_top_ba,
-+				     bool table_loaded)
-+{
-+	struct nmbm_info_table_header *ifthdr = (void *)ni->info_table_cache;
-+	uint8_t *off = ni->info_table_cache;
-+	uint32_t limit = ba + size2blk(ni, ni->info_table_size);
-+	uint32_t start_ba = 0, chunksize, sizeremain = ni->info_table_size;
-+	bool success, checkhdr = true;
-+	int ret;
-+
-+	while (sizeremain && ba < limit) {
-+		WATCHDOG_RESET();
-+
-+		if (nmbm_get_block_state(ni, ba) != BLOCK_ST_GOOD)
-+			goto next_block;
-+
-+		if (nmbm_check_bad_phys_block(ni, ba)) {
-+			nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+			goto next_block;
-+		}
-+
-+		chunksize = sizeremain;
-+		if (chunksize > ni->lower.erasesize)
-+			chunksize = ni->lower.erasesize;
-+
-+		/* Assume block with ECC error has no info table data */
-+		ret = nmbn_read_data(ni, ba2addr(ni, ba), off, chunksize);
-+		if (ret < 0)
-+			goto skip_bad_block;
-+		else if (ret > 0)
-+			return false;
-+
-+		if (checkhdr) {
-+			success = nmbm_check_info_table_header(ni, off);
-+			if (!success)
-+				return false;
-+
-+			start_ba = ba;
-+			checkhdr = false;
-+		}
-+
-+		off += chunksize;
-+		sizeremain -= chunksize;
-+
-+		goto next_block;
-+
-+	skip_bad_block:
-+		/* Only mark bad in memory */
-+		nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+
-+	next_block:
-+		ba++;
-+	}
-+
-+	if (sizeremain)
-+		return false;
-+
-+	success = nmbm_check_header(ni->info_table_cache, ni->info_table_size);
-+	if (!success)
-+		return false;
-+
-+	*eba = ba;
-+	*write_count = ifthdr->write_count;
-+
-+	success = nmbm_check_info_table(ni, start_ba, ba, ni->info_table_cache,
-+					mapping_blocks_top_ba);
-+	if (!success)
-+		return false;
-+
-+	if (!table_loaded || ifthdr->write_count > ni->info_table.write_count) {
-+		memcpy(&ni->info_table, ifthdr, sizeof(ni->info_table));
-+		memcpy(ni->block_state,
-+		       (uint8_t *)ifthdr + ifthdr->state_table_off,
-+		       ni->state_table_size);
-+		memcpy(ni->block_mapping,
-+		       (uint8_t *)ifthdr + ifthdr->mapping_table_off,
-+		       ni->mapping_table_size);
-+		ni->info_table.write_count = ifthdr->write_count;
-+	}
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_search_info_table - Search info table from specific address
-+ * @ni: NMBM instance structure
-+ * @ba: start block address to search
-+ * @limit: highest block address allowed for searching
-+ * @table_start_ba: return the start block address of this table
-+ * @table_end_ba: return the block address after end of this table
-+ * @write_count: return the write count of this table
-+ * @mapping_blocks_top_ba: return the block address of top remapped block
-+ * @table_loaded: used to record whether ni->info_table has valid data
-+ */
-+static bool nmbm_search_info_table(struct nmbm_instance *ni, uint32_t ba,
-+				   uint32_t limit, uint32_t *table_start_ba,
-+				   uint32_t *table_end_ba,
-+				   uint32_t *write_count,
-+				   uint32_t *mapping_blocks_top_ba,
-+				   bool table_loaded)
-+{
-+	bool success;
-+
-+	while (ba < limit - size2blk(ni, ni->info_table_size)) {
-+		WATCHDOG_RESET();
-+
-+		success = nmbm_try_load_info_table(ni, ba, table_end_ba,
-+						   write_count,
-+						   mapping_blocks_top_ba,
-+						   table_loaded);
-+		if (success) {
-+			*table_start_ba = ba;
-+			return true;
-+		}
-+
-+		ba++;
-+	}
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_load_info_table - Load info table(s) from a chip
-+ * @ni: NMBM instance structure
-+ * @ba: start block address to search info table
-+ * @limit: highest block address allowed for searching
-+ */
-+static bool nmbm_load_info_table(struct nmbm_instance *ni, uint32_t ba,
-+				 uint32_t limit)
-+{
-+	uint32_t main_table_end_ba, backup_table_end_ba, table_end_ba;
-+	uint32_t main_mapping_blocks_top_ba, backup_mapping_blocks_top_ba;
-+	uint32_t main_table_write_count, backup_table_write_count;
-+	uint32_t i;
-+	bool success;
-+
-+	/* Set initial value */
-+	ni->main_table_ba = 0;
-+	ni->backup_table_ba = 0;
-+	ni->info_table.write_count = 0;
-+	ni->mapping_blocks_top_ba = ni->signature_ba - 1;
-+	ni->data_block_count = ni->signature.mgmt_start_pb;
-+
-+	/* Find first info table */
-+	success = nmbm_search_info_table(ni, ba, limit, &ni->main_table_ba,
-+		&main_table_end_ba, &main_table_write_count,
-+		&main_mapping_blocks_top_ba, false);
-+	if (!success) {
-+		nlog_warn(ni, "No valid info table found\n");
-+		return false;
-+	}
-+
-+	table_end_ba = main_table_end_ba;
-+
-+	nlog_table_found(ni, true, main_table_write_count, ni->main_table_ba,
-+			main_table_end_ba);
-+
-+	/* Find second info table */
-+	success = nmbm_search_info_table(ni, main_table_end_ba, limit,
-+		&ni->backup_table_ba, &backup_table_end_ba,
-+		&backup_table_write_count, &backup_mapping_blocks_top_ba, true);
-+	if (!success) {
-+		nlog_warn(ni, "Second info table not found\n");
-+	} else {
-+		table_end_ba = backup_table_end_ba;
-+
-+		nlog_table_found(ni, false, backup_table_write_count,
-+				ni->backup_table_ba, backup_table_end_ba);
-+	}
-+
-+	/* Pick mapping_blocks_top_ba */
-+	if (!ni->backup_table_ba) {
-+		ni->mapping_blocks_top_ba= main_mapping_blocks_top_ba;
-+	} else {
-+		if (main_table_write_count >= backup_table_write_count)
-+			ni->mapping_blocks_top_ba = main_mapping_blocks_top_ba;
-+		else
-+			ni->mapping_blocks_top_ba = backup_mapping_blocks_top_ba;
-+	}
-+
-+	/* Set final mapping_blocks_ba */
-+	ni->mapping_blocks_ba = table_end_ba;
-+
-+	/* Set final data_block_count */
-+	for (i = ni->signature.mgmt_start_pb; i > 0; i--) {
-+		if (ni->block_mapping[i - 1] >= 0) {
-+			ni->data_block_count = i;
-+			break;
-+		}
-+	}
-+
-+	/* Debug purpose: mark mapped blocks and bad blocks */
-+	for (i = 0; i < ni->data_block_count; i++) {
-+		if (ni->block_mapping[i] > ni->mapping_blocks_top_ba)
-+			nmbm_mark_block_color_mapped(ni, ni->block_mapping[i]);
-+	}
-+
-+	for (i = 0; i < ni->block_count; i++) {
-+		if (nmbm_get_block_state(ni, i) == BLOCK_ST_BAD)
-+			nmbm_mark_block_color_bad(ni, i);
-+	}
-+
-+	/* Regenerate the info table cache from the final selected info table */
-+	nmbm_generate_info_table_cache(ni);
-+
-+	if (ni->lower.flags & NMBM_F_READ_ONLY)
-+		return true;
-+
-+	/*
-+	 * If only one table exists, try to write another table.
-+	 * If two tables have different write count, try to update info table
-+	 */
-+	if (!ni->backup_table_ba) {
-+		success = nmbm_rescue_single_info_table(ni);
-+	} else if (main_table_write_count != backup_table_write_count) {
-+		/* Mark state & mapping tables changed */
-+		ni->block_state_changed = 1;
-+		ni->block_mapping_changed = 1;
-+
-+		success = nmbm_update_single_info_table(ni,
-+			main_table_write_count < backup_table_write_count);
-+	} else {
-+		success = true;
-+	}
-+
-+	/*
-+	 * If there is no spare unmapped blocks, or still only one table
-+	 * exists, set the chip to read-only
-+	 */
-+	if (ni->mapping_blocks_ba == ni->mapping_blocks_top_ba) {
-+		nlog_warn(ni, "No spare unmapped blocks. Device is now read-only\n");
-+		ni->protected = 1;
-+	} else if (!success) {
-+		nlog_warn(ni, "Only one info table found. Device is now read-only\n");
-+		ni->protected = 1;
-+	}
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_load_existing - Load NMBM from a new chip
-+ * @ni: NMBM instance structure
-+ */
-+static bool nmbm_load_existing(struct nmbm_instance *ni)
-+{
-+	bool success;
-+
-+	/* Calculate the boundary of management blocks */
-+	ni->mgmt_start_ba = ni->signature.mgmt_start_pb;
-+
-+	nlog_debug(ni, "NMBM management region starts at block %u [0x%08llx]\n",
-+		  ni->mgmt_start_ba, ba2addr(ni, ni->mgmt_start_ba));
-+	nmbm_mark_block_color_mgmt(ni, ni->mgmt_start_ba,
-+				   ni->signature_ba - 1);
-+
-+	/* Look for info table(s) */
-+	success = nmbm_load_info_table(ni, ni->mgmt_start_ba,
-+		ni->signature_ba);
-+	if (success) {
-+		nlog_info(ni, "NMBM has been successfully attached %s\n",
-+			  (ni->lower.flags & NMBM_F_READ_ONLY) ? "in read-only mode" : "");
-+		return true;
-+	}
-+
-+	if (!(ni->lower.flags & NMBM_F_CREATE))
-+		return false;
-+
-+	/* Fill block state table & mapping table */
-+	nmbm_scan_badblocks(ni);
-+	nmbm_build_mapping_table(ni);
-+
-+	if (ni->lower.flags & NMBM_F_READ_ONLY) {
-+		nlog_info(ni, "NMBM has been initialized in read-only mode\n");
-+		return true;
-+	}
-+
-+	/* Write info table(s) */
-+	success = nmbm_create_info_table(ni);
-+	if (success) {
-+		nlog_info(ni, "NMBM has been successfully created\n");
-+		return true;
-+	}
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_find_signature - Find signature in the lower NAND chip
-+ * @ni: NMBM instance structure
-+ * @signature_ba: used for storing block address of the signature
-+ * @signature_ba: return the actual block address of signature block
-+ *
-+ * Find a valid signature from a specific range in the lower NAND chip,
-+ * from bottom (highest address) to top (lowest address)
-+ *
-+ * Return true if found.
-+ */
-+static bool nmbm_find_signature(struct nmbm_instance *ni,
-+				struct nmbm_signature *signature,
-+				uint32_t *signature_ba)
-+{
-+	struct nmbm_signature sig;
-+	uint64_t off, addr;
-+	uint32_t block_count, ba, limit;
-+	bool success;
-+	int ret;
-+
-+	/* Calculate top and bottom block address */
-+	block_count = ni->lower.size >> ni->erasesize_shift;
-+	ba = block_count;
-+	limit = (block_count / NMBM_MGMT_DIV) * (NMBM_MGMT_DIV - ni->lower.max_ratio);
-+	if (ni->lower.max_reserved_blocks && block_count - limit > ni->lower.max_reserved_blocks)
-+		limit = block_count - ni->lower.max_reserved_blocks;
-+
-+	while (ba >= limit) {
-+		WATCHDOG_RESET();
-+
-+		ba--;
-+		addr = ba2addr(ni, ba);
-+
-+		if (nmbm_check_bad_phys_block(ni, ba))
-+			continue;
-+
-+		/* Check every page.
-+		 * As long as at leaset one page contains valid signature,
-+		 * the block is treated as a valid signature block.
-+		 */
-+		for (off = 0; off < ni->lower.erasesize;
-+		     off += ni->lower.writesize) {
-+			WATCHDOG_RESET();
-+
-+			ret = nmbn_read_data(ni, addr + off, &sig,
-+					     sizeof(sig));
-+			if (ret)
-+				continue;
-+
-+			/* Check for header size and checksum */
-+			success = nmbm_check_header(&sig, sizeof(sig));
-+			if (!success)
-+				continue;
-+
-+			/* Check for header magic */
-+			if (sig.header.magic == NMBM_MAGIC_SIGNATURE) {
-+				/* Found it */
-+				memcpy(signature, &sig, sizeof(sig));
-+				*signature_ba = ba;
-+				return true;
-+			}
-+		}
-+	};
-+
-+	return false;
-+}
-+
-+/*
-+ * is_power_of_2_u64 - Check whether a 64-bit integer is power of 2
-+ * @n: number to check
-+ */
-+static bool is_power_of_2_u64(uint64_t n)
-+{
-+	return (n != 0 && ((n & (n - 1)) == 0));
-+}
-+
-+/*
-+ * nmbm_check_lower_members - Validate the members of lower NAND device
-+ * @nld: Lower NAND chip structure
-+ */
-+static bool nmbm_check_lower_members(struct nmbm_lower_device *nld)
-+{
-+
-+	if (!nld->size || !is_power_of_2_u64(nld->size)) {
-+		nmbm_log_lower(nld, NMBM_LOG_ERR,
-+			       "Chip size %llu is not valid\n", nld->size);
-+		return false;
-+	}
-+
-+	if (!nld->erasesize || !is_power_of_2(nld->erasesize)) {
-+		nmbm_log_lower(nld, NMBM_LOG_ERR,
-+			       "Block size %u is not valid\n", nld->erasesize);
-+		return false;
-+	}
-+
-+	if (!nld->writesize || !is_power_of_2(nld->writesize)) {
-+		nmbm_log_lower(nld, NMBM_LOG_ERR,
-+			       "Page size %u is not valid\n", nld->writesize);
-+		return false;
-+	}
-+
-+	if (!nld->oobsize || !is_power_of_2(nld->oobsize)) {
-+		nmbm_log_lower(nld, NMBM_LOG_ERR,
-+			       "Page spare size %u is not valid\n", nld->oobsize);
-+		return false;
-+	}
-+
-+	if (!nld->read_page) {
-+		nmbm_log_lower(nld, NMBM_LOG_ERR, "read_page() is required\n");
-+		return false;
-+	}
-+
-+	if (!(nld->flags & NMBM_F_READ_ONLY) && (!nld->write_page || !nld->erase_block)) {
-+		nmbm_log_lower(nld, NMBM_LOG_ERR,
-+			       "write_page() and erase_block() are required\n");
-+		return false;
-+	}
-+
-+	/* Data sanity check */
-+	if (!nld->max_ratio)
-+		nld->max_ratio = 1;
-+
-+	if (nld->max_ratio >= NMBM_MGMT_DIV - 1) {
-+		nmbm_log_lower(nld, NMBM_LOG_ERR,
-+			       "max ratio %u is invalid\n", nld->max_ratio);
-+		return false;
-+	}
-+
-+	if (nld->max_reserved_blocks && nld->max_reserved_blocks < NMBM_MGMT_BLOCKS_MIN) {
-+		nmbm_log_lower(nld, NMBM_LOG_ERR,
-+			       "max reserved blocks %u is too small\n", nld->max_reserved_blocks);
-+		return false;
-+	}
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_calc_structure_size - Calculate the instance structure size
-+ * @nld: NMBM lower device structure
-+ */
-+size_t nmbm_calc_structure_size(struct nmbm_lower_device *nld)
-+{
-+	uint32_t state_table_size, mapping_table_size, info_table_size;
-+	uint32_t block_count;
-+
-+	block_count = nmbm_lldiv(nld->size, nld->erasesize);
-+
-+	/* Calculate info table size */
-+	state_table_size = ((block_count + NMBM_BITMAP_BLOCKS_PER_UNIT - 1) /
-+		NMBM_BITMAP_BLOCKS_PER_UNIT) * NMBM_BITMAP_UNIT_SIZE;
-+	mapping_table_size = block_count * sizeof(int32_t);
-+
-+	info_table_size = NMBM_ALIGN(sizeof(struct nmbm_info_table_header),
-+				     nld->writesize);
-+	info_table_size += NMBM_ALIGN(state_table_size, nld->writesize);
-+	info_table_size += NMBM_ALIGN(mapping_table_size, nld->writesize);
-+
-+	return info_table_size + state_table_size + mapping_table_size +
-+		nld->writesize + nld->oobsize + sizeof(struct nmbm_instance);
-+}
-+
-+/*
-+ * nmbm_init_structure - Initialize members of instance structure
-+ * @ni: NMBM instance structure
-+ */
-+static void nmbm_init_structure(struct nmbm_instance *ni)
-+{
-+	uint32_t pages_per_block, blocks_per_chip;
-+	uintptr_t ptr;
-+
-+	pages_per_block = ni->lower.erasesize / ni->lower.writesize;
-+	blocks_per_chip = nmbm_lldiv(ni->lower.size, ni->lower.erasesize);
-+
-+	ni->rawpage_size = ni->lower.writesize + ni->lower.oobsize;
-+	ni->rawblock_size = pages_per_block * ni->rawpage_size;
-+	ni->rawchip_size = blocks_per_chip * ni->rawblock_size;
-+
-+	ni->writesize_mask = ni->lower.writesize - 1;
-+	ni->erasesize_mask = ni->lower.erasesize - 1;
-+
-+	ni->writesize_shift = ffs(ni->lower.writesize) - 1;
-+	ni->erasesize_shift = ffs(ni->lower.erasesize) - 1;
-+
-+	/* Calculate number of block this chip */
-+	ni->block_count = ni->lower.size >> ni->erasesize_shift;
-+
-+	/* Calculate info table size */
-+	ni->state_table_size = ((ni->block_count + NMBM_BITMAP_BLOCKS_PER_UNIT - 1) /
-+		NMBM_BITMAP_BLOCKS_PER_UNIT) * NMBM_BITMAP_UNIT_SIZE;
-+	ni->mapping_table_size = ni->block_count * sizeof(*ni->block_mapping);
-+
-+	ni->info_table_size = NMBM_ALIGN(sizeof(ni->info_table),
-+					 ni->lower.writesize);
-+	ni->info_table.state_table_off = ni->info_table_size;
-+
-+	ni->info_table_size += NMBM_ALIGN(ni->state_table_size,
-+					  ni->lower.writesize);
-+	ni->info_table.mapping_table_off = ni->info_table_size;
-+
-+	ni->info_table_size += NMBM_ALIGN(ni->mapping_table_size,
-+					  ni->lower.writesize);
-+
-+	ni->info_table_spare_blocks = nmbm_get_spare_block_count(
-+		size2blk(ni, ni->info_table_size));
-+
-+	/* Assign memory to members */
-+	ptr = (uintptr_t)ni + sizeof(*ni);
-+
-+	ni->info_table_cache = (void *)ptr;
-+	ptr += ni->info_table_size;
-+
-+	ni->block_state = (void *)ptr;
-+	ptr += ni->state_table_size;
-+
-+	ni->block_mapping = (void *)ptr;
-+	ptr += ni->mapping_table_size;
-+
-+	ni->page_cache = (uint8_t *)ptr;
-+
-+	/* Initialize block state table */
-+	ni->block_state_changed = 0;
-+	memset(ni->block_state, 0xff, ni->state_table_size);
-+
-+	/* Initialize block mapping table */
-+	ni->block_mapping_changed = 0;
-+}
-+
-+/*
-+ * nmbm_attach - Attach to a lower device
-+ * @nld: NMBM lower device structure
-+ * @ni: NMBM instance structure
-+ */
-+int nmbm_attach(struct nmbm_lower_device *nld, struct nmbm_instance *ni)
-+{
-+	bool success;
-+
-+	if (!nld || !ni)
-+		return -EINVAL;
-+
-+	/* Set default log level */
-+	ni->log_display_level = NMBM_DEFAULT_LOG_LEVEL;
-+
-+	/* Check lower members */
-+	success = nmbm_check_lower_members(nld);
-+	if (!success)
-+		return -EINVAL;
-+
-+	/* Initialize NMBM instance */
-+	memcpy(&ni->lower, nld, sizeof(struct nmbm_lower_device));
-+	nmbm_init_structure(ni);
-+
-+	success = nmbm_find_signature(ni, &ni->signature, &ni->signature_ba);
-+	if (!success) {
-+		if (!(nld->flags & NMBM_F_CREATE)) {
-+			nlog_err(ni, "Signature not found\n");
-+			return -ENODEV;
-+		}
-+
-+		success = nmbm_create_new(ni);
-+		if (!success)
-+			return -ENODEV;
-+
-+		return 0;
-+	}
-+
-+	nlog_info(ni, "Signature found at block %u [0x%08llx]\n",
-+		 ni->signature_ba, ba2addr(ni, ni->signature_ba));
-+	nmbm_mark_block_color_signature(ni, ni->signature_ba);
-+
-+	if (ni->signature.header.version != NMBM_VER) {
-+		nlog_err(ni, "NMBM version %u.%u is not supported\n",
-+			NMBM_VERSION_MAJOR_GET(ni->signature.header.version),
-+			NMBM_VERSION_MINOR_GET(ni->signature.header.version));
-+		return -EINVAL;
-+	}
-+
-+	if (ni->signature.nand_size != nld->size ||
-+	    ni->signature.block_size != nld->erasesize ||
-+	    ni->signature.page_size != nld->writesize ||
-+	    ni->signature.spare_size != nld->oobsize) {
-+		nlog_err(ni, "NMBM configuration mismatch\n");
-+		return -EINVAL;
-+	}
-+
-+	success = nmbm_load_existing(ni);
-+	if (!success)
-+		return -ENODEV;
-+
-+	return 0;
-+}
-+
-+/*
-+ * nmbm_detach - Detach from a lower device, and save all tables
-+ * @ni: NMBM instance structure
-+ */
-+int nmbm_detach(struct nmbm_instance *ni)
-+{
-+	if (!ni)
-+		return -EINVAL;
-+
-+	if (!(ni->lower.flags & NMBM_F_READ_ONLY))
-+		nmbm_update_info_table(ni);
-+
-+	nmbm_mark_block_color_normal(ni, 0, ni->block_count - 1);
-+
-+	return 0;
-+}
-+
-+/*
-+ * nmbm_erase_logic_block - Erase a logic block
-+ * @ni: NMBM instance structure
-+ * @nmbm_erase_logic_block: logic block address
-+ *
-+ * Logic block will be mapped to physical block before erasing.
-+ * Bad block found during erasinh will be remapped to a good block if there is
-+ * still at least one good spare block available.
-+ */
-+static int nmbm_erase_logic_block(struct nmbm_instance *ni, uint32_t block_addr)
-+{
-+	uint32_t pb;
-+	bool success;
-+
-+retry:
-+	/* Map logic block to physical block */
-+	pb = ni->block_mapping[block_addr];
-+
-+	/* Whether the logic block is good (has valid mapping) */
-+	if ((int32_t)pb < 0) {
-+		nlog_debug(ni, "Logic block %u is a bad block\n", block_addr);
-+		return -EIO;
-+	}
-+
-+	/* Remap logic block if current physical block is a bad block */
-+	if (nmbm_get_block_state(ni, pb) == BLOCK_ST_BAD ||
-+	    nmbm_get_block_state(ni, pb) == BLOCK_ST_NEED_REMAP)
-+		goto remap_logic_block;
-+
-+	/* Insurance to detect unexpected bad block marked by user */
-+	if (nmbm_check_bad_phys_block(ni, pb)) {
-+		nlog_warn(ni, "Found unexpected bad block possibly marked by user\n");
-+		nmbm_set_block_state(ni, pb, BLOCK_ST_BAD);
-+		goto remap_logic_block;
-+	}
-+
-+	success = nmbm_erase_block_and_check(ni, pb);
-+	if (success)
-+		return 0;
-+
-+	/* Mark bad block */
-+	nmbm_mark_phys_bad_block(ni, pb);
-+	nmbm_set_block_state(ni, pb, BLOCK_ST_BAD);
-+
-+remap_logic_block:
-+	/* Try to assign a new block */
-+	success = nmbm_map_block(ni, block_addr);
-+	if (!success) {
-+		/* Mark logic block unusable, and update info table */
-+		ni->block_mapping[block_addr] = -1;
-+		if (nmbm_get_block_state(ni, pb) != BLOCK_ST_NEED_REMAP)
-+			nmbm_set_block_state(ni, pb, BLOCK_ST_BAD);
-+		nmbm_update_info_table(ni);
-+		return -EIO;
-+	}
-+
-+	/* Update info table before erasing */
-+	if (nmbm_get_block_state(ni, pb) != BLOCK_ST_NEED_REMAP)
-+		nmbm_set_block_state(ni, pb, BLOCK_ST_BAD);
-+	nmbm_update_info_table(ni);
-+
-+	goto retry;
-+}
-+
-+/*
-+ * nmbm_erase_block_range - Erase logic blocks
-+ * @ni: NMBM instance structure
-+ * @addr: logic linear address
-+ * @size: erase range
-+ * @failed_addr: return failed block address if error occurs
-+ */
-+int nmbm_erase_block_range(struct nmbm_instance *ni, uint64_t addr,
-+			   uint64_t size, uint64_t *failed_addr)
-+{
-+	uint32_t start_ba, end_ba;
-+	int ret;
-+
-+	if (!ni)
-+		return -EINVAL;
-+
-+	/* Sanity check */
-+	if (ni->protected || (ni->lower.flags & NMBM_F_READ_ONLY)) {
-+		nlog_debug(ni, "Device is forced read-only\n");
-+		return -EROFS;
-+	}
-+
-+	if (addr >= ba2addr(ni, ni->data_block_count)) {
-+		nlog_err(ni, "Address 0x%llx is invalid\n", addr);
-+		return -EINVAL;
-+	}
-+
-+	if (addr + size > ba2addr(ni, ni->data_block_count)) {
-+		nlog_err(ni, "Erase range 0xllxu is too large\n", size);
-+		return -EINVAL;
-+	}
-+
-+	if (!size) {
-+		nlog_warn(ni, "No blocks to be erased\n");
-+		return 0;
-+	}
-+
-+	start_ba = addr2ba(ni, addr);
-+	end_ba = addr2ba(ni, addr + size - 1);
-+
-+	while (start_ba <= end_ba) {
-+		WATCHDOG_RESET();
-+
-+		ret = nmbm_erase_logic_block(ni, start_ba);
-+		if (ret) {
-+			if (failed_addr)
-+				*failed_addr = ba2addr(ni, start_ba);
-+			return ret;
-+		}
-+
-+		start_ba++;
-+	}
-+
-+	return 0;
-+}
-+
-+/*
-+ * nmbm_read_logic_page - Read page based on logic address
-+ * @ni: NMBM instance structure
-+ * @addr: logic linear address
-+ * @data: buffer to store main data. optional.
-+ * @oob: buffer to store oob data. optional.
-+ * @mode: read mode
-+ *
-+ * Return 0 for success, positive value for corrected bitflip count,
-+ * -EBADMSG for ecc error, other negative values for other errors
-+ */
-+static int nmbm_read_logic_page(struct nmbm_instance *ni, uint64_t addr,
-+				void *data, void *oob, enum nmbm_oob_mode mode)
-+{
-+	uint32_t lb, pb, offset;
-+	uint64_t paddr;
-+
-+	/* Extract block address and in-block offset */
-+	lb = addr2ba(ni, addr);
-+	offset = addr & ni->erasesize_mask;
-+
-+	/* Map logic block to physical block */
-+	pb = ni->block_mapping[lb];
-+
-+	/* Whether the logic block is good (has valid mapping) */
-+	if ((int32_t)pb < 0) {
-+		nlog_debug(ni, "Logic block %u is a bad block\n", lb);
-+		return -EIO;
-+	}
-+
-+	/* Fail if physical block is marked bad */
-+	if (nmbm_get_block_state(ni, pb) == BLOCK_ST_BAD)
-+		return -EIO;
-+
-+	/* Assemble new address */
-+	paddr = ba2addr(ni, pb) + offset;
-+
-+	return nmbm_read_phys_page(ni, paddr, data, oob, mode);
-+}
-+
-+/*
-+ * nmbm_read_single_page - Read one page based on logic address
-+ * @ni: NMBM instance structure
-+ * @addr: logic linear address
-+ * @data: buffer to store main data. optional.
-+ * @oob: buffer to store oob data. optional.
-+ * @mode: read mode
-+ *
-+ * Return 0 for success, positive value for corrected bitflip count,
-+ * -EBADMSG for ecc error, other negative values for other errors
-+ */
-+int nmbm_read_single_page(struct nmbm_instance *ni, uint64_t addr, void *data,
-+			  void *oob, enum nmbm_oob_mode mode)
-+{
-+	if (!ni)
-+		return -EINVAL;
-+
-+	/* Sanity check */
-+	if (ni->protected) {
-+		nlog_debug(ni, "Device is forced read-only\n");
-+		return -EROFS;
-+	}
-+
-+	if (addr >= ba2addr(ni, ni->data_block_count)) {
-+		nlog_err(ni, "Address 0x%llx is invalid\n", addr);
-+		return -EINVAL;
-+	}
-+
-+	return nmbm_read_logic_page(ni, addr, data, oob, mode);
-+}
-+
-+/*
-+ * nmbm_read_range - Read data without oob
-+ * @ni: NMBM instance structure
-+ * @addr: logic linear address
-+ * @size: data size to read
-+ * @data: buffer to store main data to be read
-+ * @mode: read mode
-+ * @retlen: return actual data size read
-+ *
-+ * Return 0 for success, positive value for corrected bitflip count,
-+ * -EBADMSG for ecc error, other negative values for other errors
-+ */
-+int nmbm_read_range(struct nmbm_instance *ni, uint64_t addr, size_t size,
-+		    void *data, enum nmbm_oob_mode mode, size_t *retlen)
-+{
-+	uint64_t off = addr;
-+	uint8_t *ptr = data;
-+	size_t sizeremain = size, chunksize, leading;
-+	bool has_ecc_err = false;
-+	int ret, max_bitflips = 0;
-+
-+	if (!ni)
-+		return -EINVAL;
-+
-+	/* Sanity check */
-+	if (ni->protected) {
-+		nlog_debug(ni, "Device is forced read-only\n");
-+		return -EROFS;
-+	}
-+
-+	if (addr >= ba2addr(ni, ni->data_block_count)) {
-+		nlog_err(ni, "Address 0x%llx is invalid\n", addr);
-+		return -EINVAL;
-+	}
-+
-+	if (addr + size > ba2addr(ni, ni->data_block_count)) {
-+		nlog_err(ni, "Read range 0x%llx is too large\n", size);
-+		return -EINVAL;
-+	}
-+
-+	if (!size) {
-+		nlog_warn(ni, "No data to be read\n");
-+		return 0;
-+	}
-+
-+	while (sizeremain) {
-+		WATCHDOG_RESET();
-+
-+		leading = off & ni->writesize_mask;
-+		chunksize = ni->lower.writesize - leading;
-+		if (chunksize > sizeremain)
-+			chunksize = sizeremain;
-+
-+		if (chunksize == ni->lower.writesize) {
-+			ret = nmbm_read_logic_page(ni, off - leading, ptr,
-+							NULL, mode);
-+			if (ret < 0 && ret != -EBADMSG)
-+				break;
-+		} else {
-+			ret = nmbm_read_logic_page(ni, off - leading,
-+							ni->page_cache, NULL,
-+							mode);
-+			if (ret < 0 && ret != -EBADMSG)
-+				break;
-+
-+			memcpy(ptr, ni->page_cache + leading, chunksize);
-+		}
-+
-+		if (ret == -EBADMSG)
-+			has_ecc_err = true;
-+
-+		if (ret > max_bitflips)
-+			max_bitflips = ret;
-+
-+		off += chunksize;
-+		ptr += chunksize;
-+		sizeremain -= chunksize;
-+	}
-+
-+	if (retlen)
-+		*retlen = size - sizeremain;
-+
-+	if (ret < 0 && ret != -EBADMSG)
-+		return ret;
-+
-+	if (has_ecc_err)
-+		return -EBADMSG;
-+
-+	return max_bitflips;
-+}
-+
-+/*
-+ * nmbm_write_logic_page - Read page based on logic address
-+ * @ni: NMBM instance structure
-+ * @addr: logic linear address
-+ * @data: buffer contains main data. optional.
-+ * @oob: buffer contains oob data. optional.
-+ * @mode: write mode
-+ */
-+static int nmbm_write_logic_page(struct nmbm_instance *ni, uint64_t addr,
-+				  const void *data, const void *oob,
-+				  enum nmbm_oob_mode mode)
-+{
-+	uint32_t lb, pb, offset;
-+	uint64_t paddr;
-+	bool success;
-+
-+	/* Extract block address and in-block offset */
-+	lb = addr2ba(ni, addr);
-+	offset = addr & ni->erasesize_mask;
-+
-+	/* Map logic block to physical block */
-+	pb = ni->block_mapping[lb];
-+
-+	/* Whether the logic block is good (has valid mapping) */
-+	if ((int32_t)pb < 0) {
-+		nlog_debug(ni, "Logic block %u is a bad block\n", lb);
-+		return -EIO;
-+	}
-+
-+	/* Fail if physical block is marked bad */
-+	if (nmbm_get_block_state(ni, pb) == BLOCK_ST_BAD)
-+		return -EIO;
-+
-+	/* Assemble new address */
-+	paddr = ba2addr(ni, pb) + offset;
-+
-+	success = nmbm_write_phys_page(ni, paddr, data, oob, mode);
-+	if (success)
-+		return 0;
-+
-+	/*
-+	 * Do not remap bad block here. Just mark this block in state table.
-+	 * Remap this block on erasing.
-+	 */
-+	nmbm_set_block_state(ni, pb, BLOCK_ST_NEED_REMAP);
-+	nmbm_update_info_table(ni);
-+
-+	return -EIO;
-+}
-+
-+/*
-+ * nmbm_write_single_page - Write one page based on logic address
-+ * @ni: NMBM instance structure
-+ * @addr: logic linear address
-+ * @data: buffer contains main data. optional.
-+ * @oob: buffer contains oob data. optional.
-+ * @mode: write mode
-+ */
-+int nmbm_write_single_page(struct nmbm_instance *ni, uint64_t addr,
-+			   const void *data, const void *oob,
-+			   enum nmbm_oob_mode mode)
-+{
-+	if (!ni)
-+		return -EINVAL;
-+
-+	/* Sanity check */
-+	if (ni->protected || (ni->lower.flags & NMBM_F_READ_ONLY)) {
-+		nlog_debug(ni, "Device is forced read-only\n");
-+		return -EROFS;
-+	}
-+
-+	if (addr >= ba2addr(ni, ni->data_block_count)) {
-+		nlog_err(ni, "Address 0x%llx is invalid\n", addr);
-+		return -EINVAL;
-+	}
-+
-+	return nmbm_write_logic_page(ni, addr, data, oob, mode);
-+}
-+
-+/*
-+ * nmbm_write_range - Write data without oob
-+ * @ni: NMBM instance structure
-+ * @addr: logic linear address
-+ * @size: data size to write
-+ * @data: buffer contains data to be written
-+ * @mode: write mode
-+ * @retlen: return actual data size written
-+ */
-+int nmbm_write_range(struct nmbm_instance *ni, uint64_t addr, size_t size,
-+		     const void *data, enum nmbm_oob_mode mode,
-+		     size_t *retlen)
-+{
-+	uint64_t off = addr;
-+	const uint8_t *ptr = data;
-+	size_t sizeremain = size, chunksize, leading;
-+	int ret;
-+
-+	if (!ni)
-+		return -EINVAL;
-+
-+	/* Sanity check */
-+	if (ni->protected || (ni->lower.flags & NMBM_F_READ_ONLY)) {
-+		nlog_debug(ni, "Device is forced read-only\n");
-+		return -EROFS;
-+	}
-+
-+	if (addr >= ba2addr(ni, ni->data_block_count)) {
-+		nlog_err(ni, "Address 0x%llx is invalid\n", addr);
-+		return -EINVAL;
-+	}
-+
-+	if (addr + size > ba2addr(ni, ni->data_block_count)) {
-+		nlog_err(ni, "Write size 0x%zx is too large\n", size);
-+		return -EINVAL;
-+	}
-+
-+	if (!size) {
-+		nlog_warn(ni, "No data to be written\n");
-+		return 0;
-+	}
-+
-+	while (sizeremain) {
-+		WATCHDOG_RESET();
-+
-+		leading = off & ni->writesize_mask;
-+		chunksize = ni->lower.writesize - leading;
-+		if (chunksize > sizeremain)
-+			chunksize = sizeremain;
-+
-+		if (chunksize == ni->lower.writesize) {
-+			ret = nmbm_write_logic_page(ni, off - leading, ptr,
-+							 NULL, mode);
-+			if (ret)
-+				break;
-+		} else {
-+			memset(ni->page_cache, 0xff, leading);
-+			memcpy(ni->page_cache + leading, ptr, chunksize);
-+
-+			ret = nmbm_write_logic_page(ni, off - leading,
-+							 ni->page_cache, NULL,
-+							 mode);
-+			if (ret)
-+				break;
-+		}
-+
-+		off += chunksize;
-+		ptr += chunksize;
-+		sizeremain -= chunksize;
-+	}
-+
-+	if (retlen)
-+		*retlen = size - sizeremain;
-+
-+	return ret;
-+}
-+
-+/*
-+ * nmbm_check_bad_block - Check whether a logic block is usable
-+ * @ni: NMBM instance structure
-+ * @addr: logic linear address
-+ */
-+int nmbm_check_bad_block(struct nmbm_instance *ni, uint64_t addr)
-+{
-+	uint32_t lb, pb;
-+
-+	if (!ni)
-+		return -EINVAL;
-+
-+	if (addr >= ba2addr(ni, ni->data_block_count)) {
-+		nlog_err(ni, "Address 0x%llx is invalid\n", addr);
-+		return -EINVAL;
-+	}
-+
-+	lb = addr2ba(ni, addr);
-+
-+	/* Map logic block to physical block */
-+	pb = ni->block_mapping[lb];
-+
-+	if ((int32_t)pb < 0)
-+		return 1;
-+
-+	if (nmbm_get_block_state(ni, pb) == BLOCK_ST_BAD)
-+		return 1;
-+
-+	return 0;
-+}
-+
-+/*
-+ * nmbm_mark_bad_block - Mark a logic block unusable
-+ * @ni: NMBM instance structure
-+ * @addr: logic linear address
-+ */
-+int nmbm_mark_bad_block(struct nmbm_instance *ni, uint64_t addr)
-+{
-+	uint32_t lb, pb;
-+
-+	if (!ni)
-+		return -EINVAL;
-+
-+	/* Sanity check */
-+	if (ni->protected || (ni->lower.flags & NMBM_F_READ_ONLY)) {
-+		nlog_debug(ni, "Device is forced read-only\n");
-+		return -EROFS;
-+	}
-+
-+	if (addr >= ba2addr(ni, ni->data_block_count)) {
-+		nlog_err(ni, "Address 0x%llx is invalid\n", addr);
-+		return -EINVAL;
-+	}
-+
-+	lb = addr2ba(ni, addr);
-+
-+	/* Map logic block to physical block */
-+	pb = ni->block_mapping[lb];
-+
-+	if ((int32_t)pb < 0)
-+		return 0;
-+
-+	ni->block_mapping[lb] = -1;
-+	nmbm_mark_phys_bad_block(ni, pb);
-+	nmbm_set_block_state(ni, pb, BLOCK_ST_BAD);
-+	nmbm_update_info_table(ni);
-+
-+	return 0;
-+}
-+
-+/*
-+ * nmbm_get_avail_size - Get available user data size
-+ * @ni: NMBM instance structure
-+ */
-+uint64_t nmbm_get_avail_size(struct nmbm_instance *ni)
-+{
-+	if (!ni)
-+		return 0;
-+
-+	return (uint64_t)ni->data_block_count << ni->erasesize_shift;
-+}
-+
-+/*
-+ * nmbm_get_lower_device - Get lower device structure
-+ * @ni: NMBM instance structure
-+ * @nld: pointer to hold the data of lower device structure
-+ */
-+int nmbm_get_lower_device(struct nmbm_instance *ni, struct nmbm_lower_device *nld)
-+{
-+	if (!ni)
-+		return -EINVAL;
-+
-+	if (nld)
-+		memcpy(nld, &ni->lower, sizeof(*nld));
-+
-+	return 0;
-+}
-+
-+#include "nmbm-debug.inl"
-diff --git a/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-debug.h b/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-debug.h
-new file mode 100644
-index 0000000000..7f9dfed9e1
---- /dev/null
-+++ b/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-debug.h
-@@ -0,0 +1,20 @@
-+/* SPDX-License-Identifier: GPL-2.0 */
-+/*
-+ * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
-+ *
-+ * Debug addons for NAND Mapped-block Management (NMBM)
-+ *
-+ * Author: Weijie Gao <weijie.gao@mediatek.com>
-+ */
-+
-+#ifndef _NMBM_DEBUG_H_
-+#define _NMBM_DEBUG_H_
-+
-+#define nmbm_mark_block_color_normal(ni, start_ba, end_ba)
-+#define nmbm_mark_block_color_bad(ni, ba)
-+#define nmbm_mark_block_color_mgmt(ni, start_ba, end_ba)
-+#define nmbm_mark_block_color_signature(ni, ba)
-+#define nmbm_mark_block_color_info_table(ni, start_ba, end_ba)
-+#define nmbm_mark_block_color_mapped(ni, ba)
-+
-+#endif /* _NMBM_DEBUG_H_ */
-diff --git a/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-debug.inl b/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-debug.inl
-new file mode 100644
-index 0000000000..e69de29bb2
-diff --git a/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-mtd.c b/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-mtd.c
-new file mode 100644
-index 0000000000..a3e9e1832d
---- /dev/null
-+++ b/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-mtd.c
-@@ -0,0 +1,795 @@
-+// SPDX-License-Identifier: GPL-2.0
-+/*
-+ * MTD layer for NAND Mapped-block Management (NMBM)
-+ *
-+ * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
-+ *
-+ * Author: Weijie Gao <weijie.gao@mediatek.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/slab.h>
-+#include <linux/interrupt.h>
-+#include <linux/sched.h>
-+#include <linux/wait.h>
-+#include <linux/spinlock.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/flashchip.h>
-+#include <linux/mtd/partitions.h>
-+#include <linux/of_platform.h>
-+#include <linux/kern_levels.h>
-+
-+#include "nmbm-private.h"
-+#include "nmbm-debug.h"
-+
-+#define NMBM_MAX_RATIO_DEFAULT			1
-+#define NMBM_MAX_BLOCKS_DEFAULT			256
-+
-+struct nmbm_mtd {
-+	struct mtd_info upper;
-+	struct mtd_info *lower;
-+
-+	struct nmbm_instance *ni;
-+	uint8_t *page_cache;
-+
-+	flstate_t state;
-+	spinlock_t lock;
-+	wait_queue_head_t wq;
-+
-+	struct device *dev;
-+	struct list_head node;
-+};
-+
-+struct list_head nmbm_devs;
-+static DEFINE_MUTEX(nmbm_devs_lock);
-+
-+static int nmbm_lower_read_page(void *arg, uint64_t addr, void *buf, void *oob,
-+				enum nmbm_oob_mode mode)
-+{
-+	struct nmbm_mtd *nm = arg;
-+	struct mtd_oob_ops ops;
-+	int ret;
-+
-+	memset(&ops, 0, sizeof(ops));
-+
-+	switch (mode) {
-+	case NMBM_MODE_PLACE_OOB:
-+		ops.mode = MTD_OPS_PLACE_OOB;
-+		break;
-+	case NMBM_MODE_AUTO_OOB:
-+		ops.mode = MTD_OPS_AUTO_OOB;
-+		break;
-+	case NMBM_MODE_RAW:
-+		ops.mode = MTD_OPS_RAW;
-+		break;
-+	default:
-+		pr_debug("%s: unsupported NMBM mode: %u\n", __func__, mode);
-+		return -ENOTSUPP;
-+	}
-+
-+	if (buf) {
-+		ops.datbuf = buf;
-+		ops.len = nm->lower->writesize;
-+	}
-+
-+	if (oob) {
-+		ops.oobbuf = oob;
-+		ops.ooblen = mtd_oobavail(nm->lower, &ops);
-+	}
-+
-+	ret = mtd_read_oob(nm->lower, addr, &ops);
-+	nm->upper.ecc_stats.corrected = nm->lower->ecc_stats.corrected;
-+	nm->upper.ecc_stats.failed = nm->lower->ecc_stats.failed;
-+
-+	/* Report error on failure (including ecc error) */
-+	if (ret < 0 && ret != -EUCLEAN)
-+		return ret;
-+
-+	/*
-+	 * Since mtd_read_oob() won't report exact bitflips, what we can know
-+	 * is whether bitflips exceeds the threshold.
-+	 * We want the -EUCLEAN to be passed to the upper layer, but not the
-+	 * error value itself. To achieve this, report bitflips above the
-+	 * threshold.
-+	 */
-+
-+	if (ret == -EUCLEAN) {
-+		return min_t(u32, nm->lower->bitflip_threshold + 1,
-+			     nm->lower->ecc_strength);
-+	}
-+
-+	/* For bitflips less than the threshold, return 0 */
-+	return 0;
-+}
-+
-+static int nmbm_lower_write_page(void *arg, uint64_t addr, const void *buf,
-+				 const void *oob, enum nmbm_oob_mode mode)
-+{
-+	struct nmbm_mtd *nm = arg;
-+	struct mtd_oob_ops ops;
-+
-+	memset(&ops, 0, sizeof(ops));
-+
-+	switch (mode) {
-+	case NMBM_MODE_PLACE_OOB:
-+		ops.mode = MTD_OPS_PLACE_OOB;
-+		break;
-+	case NMBM_MODE_AUTO_OOB:
-+		ops.mode = MTD_OPS_AUTO_OOB;
-+		break;
-+	case NMBM_MODE_RAW:
-+		ops.mode = MTD_OPS_RAW;
-+		break;
-+	default:
-+		pr_debug("%s: unsupported NMBM mode: %u\n", __func__, mode);
-+		return -ENOTSUPP;
-+	}
-+
-+	if (buf) {
-+		ops.datbuf = (uint8_t *)buf;
-+		ops.len = nm->lower->writesize;
-+	}
-+
-+	if (oob) {
-+		ops.oobbuf = (uint8_t *)oob;
-+		ops.ooblen = mtd_oobavail(nm->lower, &ops);
-+	}
-+
-+	return mtd_write_oob(nm->lower, addr, &ops);
-+}
-+
-+static int nmbm_lower_erase_block(void *arg, uint64_t addr)
-+{
-+	struct nmbm_mtd *nm = arg;
-+	struct erase_info ei;
-+
-+	memset(&ei, 0, sizeof(ei));
-+
-+	ei.addr = addr;
-+	ei.len = nm->lower->erasesize;
-+
-+	return mtd_erase(nm->lower, &ei);
-+}
-+
-+static int nmbm_lower_is_bad_block(void *arg, uint64_t addr)
-+{
-+	struct nmbm_mtd *nm = arg;
-+
-+	return mtd_block_isbad(nm->lower, addr);
-+}
-+
-+static int nmbm_lower_mark_bad_block(void *arg, uint64_t addr)
-+{
-+	struct nmbm_mtd *nm = arg;
-+
-+	return mtd_block_markbad(nm->lower, addr);
-+}
-+
-+static void nmbm_lower_log(void *arg, enum nmbm_log_category level,
-+			   const char *fmt, va_list ap)
-+{
-+	struct nmbm_mtd *nm = arg;
-+	char *msg;
-+	char *kl;
-+
-+	msg = kvasprintf(GFP_KERNEL, fmt, ap);
-+	if (!msg) {
-+		dev_warn(nm->dev, "unable to print log\n");
-+		return;
-+	}
-+
-+	switch (level) {
-+	case NMBM_LOG_DEBUG:
-+		kl = KERN_DEBUG;
-+		break;
-+	case NMBM_LOG_WARN:
-+		kl = KERN_WARNING;
-+		break;
-+	case NMBM_LOG_ERR:
-+		kl = KERN_ERR;
-+		break;
-+	case NMBM_LOG_EMERG:
-+		kl = KERN_EMERG;
-+		break;
-+	default:
-+		kl = KERN_INFO ;
-+	}
-+
-+	dev_printk(kl, nm->dev, "%s", msg);
-+
-+	kfree(msg);
-+}
-+
-+static int nmbm_get_device(struct nmbm_mtd *nm, int new_state)
-+{
-+	DECLARE_WAITQUEUE(wait, current);
-+
-+retry:
-+	spin_lock(&nm->lock);
-+
-+	if (nm->state == FL_READY) {
-+		nm->state = new_state;
-+		spin_unlock(&nm->lock);
-+		return 0;
-+	}
-+
-+	if (new_state == FL_PM_SUSPENDED) {
-+		if (nm->state == FL_PM_SUSPENDED) {
-+			spin_unlock(&nm->lock);
-+			return 0;
-+		}
-+	}
-+
-+	set_current_state(TASK_UNINTERRUPTIBLE);
-+	add_wait_queue(&nm->wq, &wait);
-+	spin_unlock(&nm->lock);
-+	schedule();
-+	remove_wait_queue(&nm->wq, &wait);
-+	goto retry;
-+}
-+
-+static void nmbm_release_device(struct nmbm_mtd *nm)
-+{
-+	spin_lock(&nm->lock);
-+	nm->state = FL_READY;
-+	wake_up(&nm->wq);
-+	spin_unlock(&nm->lock);
-+}
-+
-+static int nmbm_mtd_erase(struct mtd_info *mtd, struct erase_info *instr)
-+{
-+	struct nmbm_mtd *nm = container_of(mtd, struct nmbm_mtd, upper);
-+	int ret;
-+
-+	nmbm_get_device(nm, FL_ERASING);
-+
-+	ret = nmbm_erase_block_range(nm->ni, instr->addr, instr->len,
-+				     &instr->fail_addr);
-+
-+	nmbm_release_device(nm);
-+
-+	if (!ret)
-+		return 0;
-+
-+	return -EIO;
-+}
-+
-+static int nmbm_mtd_read_data(struct nmbm_mtd *nm, uint64_t addr,
-+			      struct mtd_oob_ops *ops, enum nmbm_oob_mode mode)
-+{
-+	size_t len, ooblen, maxooblen, chklen;
-+	uint32_t col, ooboffs;
-+	uint8_t *datcache, *oobcache;
-+	bool has_ecc_err = false;
-+	int ret, max_bitflips = 0;
-+
-+	col = addr & nm->lower->writesize_mask;
-+	addr &= ~nm->lower->writesize_mask;
-+	maxooblen = mtd_oobavail(nm->lower, ops);
-+	ooboffs = ops->ooboffs;
-+	ooblen = ops->ooblen;
-+	len = ops->len;
-+
-+	datcache = len ? nm->page_cache : NULL;
-+	oobcache = ooblen ? nm->page_cache + nm->lower->writesize : NULL;
-+
-+	ops->oobretlen = 0;
-+	ops->retlen = 0;
-+
-+	while (len || ooblen) {
-+		ret = nmbm_read_single_page(nm->ni, addr, datcache, oobcache,
-+					    mode);
-+		if (ret < 0 && ret != -EBADMSG)
-+			return ret;
-+
-+		/* Continue reading on ecc error */
-+		if (ret == -EBADMSG)
-+			has_ecc_err = true;
-+
-+		/* Record the maximum bitflips between pages */
-+		if (ret > max_bitflips)
-+			max_bitflips = ret;
-+
-+		if (len) {
-+			/* Move data */
-+			chklen = nm->lower->writesize - col;
-+			if (chklen > len)
-+				chklen = len;
-+
-+			memcpy(ops->datbuf + ops->retlen, datcache + col,
-+			       chklen);
-+			len -= chklen;
-+			col = 0; /* (col + chklen) %  */
-+			ops->retlen += chklen;
-+		}
-+
-+		if (ooblen) {
-+			/* Move oob */
-+			chklen = maxooblen - ooboffs;
-+			if (chklen > ooblen)
-+				chklen = ooblen;
-+
-+			memcpy(ops->oobbuf + ops->oobretlen, oobcache + ooboffs,
-+			       chklen);
-+			ooblen -= chklen;
-+			ooboffs = 0; /* (ooboffs + chklen) % maxooblen; */
-+			ops->oobretlen += chklen;
-+		}
-+
-+		addr += nm->lower->writesize;
-+	}
-+
-+	if (has_ecc_err)
-+		return -EBADMSG;
-+
-+	return max_bitflips;
-+}
-+
-+static int nmbm_mtd_read_oob(struct mtd_info *mtd, loff_t from,
-+			     struct mtd_oob_ops *ops)
-+{
-+	struct nmbm_mtd *nm = container_of(mtd, struct nmbm_mtd, upper);
-+	uint32_t maxooblen;
-+	enum nmbm_oob_mode mode;
-+	int ret;
-+
-+	if (!ops->oobbuf && !ops->datbuf) {
-+		if (ops->ooblen || ops->len)
-+			return -EINVAL;
-+
-+		return 0;
-+	}
-+
-+	switch (ops->mode) {
-+	case MTD_OPS_PLACE_OOB:
-+		mode = NMBM_MODE_PLACE_OOB;
-+		break;
-+	case MTD_OPS_AUTO_OOB:
-+		mode = NMBM_MODE_AUTO_OOB;
-+		break;
-+	case MTD_OPS_RAW:
-+		mode = NMBM_MODE_RAW;
-+		break;
-+	default:
-+		pr_debug("%s: unsupported oob mode: %u\n", __func__, ops->mode);
-+		return -ENOTSUPP;
-+	}
-+
-+	maxooblen = mtd_oobavail(mtd, ops);
-+
-+	/* Do not allow read past end of device */
-+	if (ops->datbuf && (from + ops->len) > mtd->size) {
-+		pr_debug("%s: attempt to read beyond end of device\n",
-+			 __func__);
-+		return -EINVAL;
-+	}
-+
-+	if (!ops->oobbuf) {
-+		nmbm_get_device(nm, FL_READING);
-+
-+		/* Optimized for reading data only */
-+		ret = nmbm_read_range(nm->ni, from, ops->len, ops->datbuf,
-+				      mode, &ops->retlen);
-+
-+		nmbm_release_device(nm);
-+
-+		return ret;
-+	}
-+
-+	if (unlikely(ops->ooboffs >= maxooblen)) {
-+		pr_debug("%s: attempt to start read outside oob\n",
-+			__func__);
-+		return -EINVAL;
-+	}
-+
-+	if (unlikely(from >= mtd->size ||
-+	    ops->ooboffs + ops->ooblen > ((mtd->size >> mtd->writesize_shift) -
-+	    (from >> mtd->writesize_shift)) * maxooblen)) {
-+		pr_debug("%s: attempt to read beyond end of device\n",
-+				__func__);
-+		return -EINVAL;
-+	}
-+
-+	nmbm_get_device(nm, FL_READING);
-+	ret = nmbm_mtd_read_data(nm, from, ops, mode);
-+	nmbm_release_device(nm);
-+
-+	return ret;
-+}
-+
-+static int nmbm_mtd_write_data(struct nmbm_mtd *nm, uint64_t addr,
-+			       struct mtd_oob_ops *ops, enum nmbm_oob_mode mode)
-+{
-+	size_t len, ooblen, maxooblen, chklen;
-+	uint32_t col, ooboffs;
-+	uint8_t *datcache, *oobcache;
-+	int ret;
-+
-+	col = addr & nm->lower->writesize_mask;
-+	addr &= ~nm->lower->writesize_mask;
-+	maxooblen = mtd_oobavail(nm->lower, ops);
-+	ooboffs = ops->ooboffs;
-+	ooblen = ops->ooblen;
-+	len = ops->len;
-+
-+	datcache = len ? nm->page_cache : NULL;
-+	oobcache = ooblen ? nm->page_cache + nm->lower->writesize : NULL;
-+
-+	ops->oobretlen = 0;
-+	ops->retlen = 0;
-+
-+	while (len || ooblen) {
-+		if (len) {
-+			/* Move data */
-+			chklen = nm->lower->writesize - col;
-+			if (chklen > len)
-+				chklen = len;
-+
-+			memset(datcache, 0xff, col);
-+			memcpy(datcache + col, ops->datbuf + ops->retlen,
-+			       chklen);
-+			memset(datcache + col + chklen, 0xff,
-+			       nm->lower->writesize - col - chklen);
-+			len -= chklen;
-+			col = 0; /* (col + chklen) %  */
-+			ops->retlen += chklen;
-+		}
-+
-+		if (ooblen) {
-+			/* Move oob */
-+			chklen = maxooblen - ooboffs;
-+			if (chklen > ooblen)
-+				chklen = ooblen;
-+
-+			memset(oobcache, 0xff, ooboffs);
-+			memcpy(oobcache + ooboffs,
-+			       ops->oobbuf + ops->oobretlen, chklen);
-+			memset(oobcache + ooboffs + chklen, 0xff,
-+			       nm->lower->oobsize - ooboffs - chklen);
-+			ooblen -= chklen;
-+			ooboffs = 0; /* (ooboffs + chklen) % maxooblen; */
-+			ops->oobretlen += chklen;
-+		}
-+
-+		ret = nmbm_write_single_page(nm->ni, addr, datcache, oobcache,
-+					     mode);
-+		if (ret)
-+			return ret;
-+
-+		addr += nm->lower->writesize;
-+	}
-+
-+	return 0;
-+}
-+
-+static int nmbm_mtd_write_oob(struct mtd_info *mtd, loff_t to,
-+			      struct mtd_oob_ops *ops)
-+{
-+	struct nmbm_mtd *nm = container_of(mtd, struct nmbm_mtd, upper);
-+	enum nmbm_oob_mode mode;
-+	uint32_t maxooblen;
-+	int ret;
-+
-+	if (!ops->oobbuf && !ops->datbuf) {
-+		if (ops->ooblen || ops->len)
-+			return -EINVAL;
-+
-+		return 0;
-+	}
-+
-+	switch (ops->mode) {
-+	case MTD_OPS_PLACE_OOB:
-+		mode = NMBM_MODE_PLACE_OOB;
-+		break;
-+	case MTD_OPS_AUTO_OOB:
-+		mode = NMBM_MODE_AUTO_OOB;
-+		break;
-+	case MTD_OPS_RAW:
-+		mode = NMBM_MODE_RAW;
-+		break;
-+	default:
-+		pr_debug("%s: unsupported oob mode: %u\n", __func__,
-+			 ops->mode);
-+		return -ENOTSUPP;
-+	}
-+
-+	maxooblen = mtd_oobavail(mtd, ops);
-+
-+	/* Do not allow write past end of device */
-+	if (ops->datbuf && (to + ops->len) > mtd->size) {
-+		pr_debug("%s: attempt to write beyond end of device\n",
-+			 __func__);
-+		return -EINVAL;
-+	}
-+
-+	if (!ops->oobbuf) {
-+		nmbm_get_device(nm, FL_WRITING);
-+
-+		/* Optimized for writing data only */
-+		ret = nmbm_write_range(nm->ni, to, ops->len, ops->datbuf,
-+				       mode, &ops->retlen);
-+
-+		nmbm_release_device(nm);
-+
-+		return ret;
-+	}
-+
-+	if (unlikely(ops->ooboffs >= maxooblen)) {
-+		pr_debug("%s: attempt to start write outside oob\n",
-+			__func__);
-+		return -EINVAL;
-+	}
-+
-+	if (unlikely(to >= mtd->size ||
-+	    ops->ooboffs + ops->ooblen > ((mtd->size >> mtd->writesize_shift) -
-+	    (to >> mtd->writesize_shift)) * maxooblen)) {
-+		pr_debug("%s: attempt to write beyond end of device\n",
-+				__func__);
-+		return -EINVAL;
-+	}
-+
-+	nmbm_get_device(nm, FL_WRITING);
-+	ret = nmbm_mtd_write_data(nm, to, ops, mode);
-+	nmbm_release_device(nm);
-+
-+	return ret;
-+}
-+
-+static int nmbm_mtd_block_isbad(struct mtd_info *mtd, loff_t offs)
-+{
-+	struct nmbm_mtd *nm = container_of(mtd, struct nmbm_mtd, upper);
-+	int ret;
-+
-+	nmbm_get_device(nm, FL_READING);
-+	ret = nmbm_check_bad_block(nm->ni, offs);
-+	nmbm_release_device(nm);
-+
-+	return ret;
-+}
-+
-+static int nmbm_mtd_block_markbad(struct mtd_info *mtd, loff_t offs)
-+{
-+	struct nmbm_mtd *nm = container_of(mtd, struct nmbm_mtd, upper);
-+	int ret;
-+
-+	nmbm_get_device(nm, FL_WRITING);
-+	ret = nmbm_mark_bad_block(nm->ni, offs);
-+	nmbm_release_device(nm);
-+
-+	return ret;
-+}
-+
-+static void nmbm_mtd_shutdown(struct mtd_info *mtd)
-+{
-+	struct nmbm_mtd *nm = container_of(mtd, struct nmbm_mtd, upper);
-+
-+	nmbm_get_device(nm, FL_PM_SUSPENDED);
-+}
-+
-+static int nmbm_probe(struct platform_device *pdev)
-+{
-+	struct device_node *mtd_np, *np = pdev->dev.of_node;
-+	uint32_t max_ratio, max_reserved_blocks, alloc_size;
-+	bool forced_create, empty_page_ecc_ok;
-+	struct nmbm_lower_device nld;
-+	struct mtd_info *lower, *mtd;
-+	struct nmbm_mtd *nm;
-+	const char *mtdname;
-+	int ret;
-+
-+	mtd_np = of_parse_phandle(np, "lower-mtd-device", 0);
-+	if (mtd_np) {
-+		lower = get_mtd_device_by_node(mtd_np);
-+		if (!IS_ERR(lower))
-+			goto do_attach_mtd;
-+
-+		dev_dbg(&pdev->dev, "failed to find mtd device by phandle\n");
-+		return -EPROBE_DEFER;
-+	}
-+
-+	ret = of_property_read_string(np, "lower-mtd-name", &mtdname);
-+	if (!ret) {
-+		lower = get_mtd_device_nm(mtdname);
-+		if (!IS_ERR(lower))
-+			goto do_attach_mtd;
-+
-+		dev_dbg(&pdev->dev, "failed to find mtd device by name '%s'\n",
-+			mtdname);
-+		return -EPROBE_DEFER;
-+	}
-+
-+do_attach_mtd:
-+	if (of_property_read_u32(np, "max-ratio", &max_ratio))
-+		max_ratio = NMBM_MAX_RATIO_DEFAULT;
-+
-+	if (of_property_read_u32(np, "max-reserved-blocks",
-+				 &max_reserved_blocks))
-+		max_reserved_blocks = NMBM_MAX_BLOCKS_DEFAULT;
-+
-+	forced_create = of_property_read_bool(np, "forced-create");
-+	empty_page_ecc_ok = of_property_read_bool(np,
-+						  "empty-page-ecc-protected");
-+
-+	memset(&nld, 0, sizeof(nld));
-+
-+	nld.flags = 0;
-+
-+	if (forced_create)
-+		nld.flags |= NMBM_F_CREATE;
-+
-+	if (empty_page_ecc_ok)
-+		nld.flags |= NMBM_F_EMPTY_PAGE_ECC_OK;
-+
-+	nld.max_ratio = max_ratio;
-+	nld.max_reserved_blocks = max_reserved_blocks;
-+
-+	nld.size = lower->size;
-+	nld.erasesize = lower->erasesize;
-+	nld.writesize = lower->writesize;
-+	nld.oobsize = lower->oobsize;
-+	nld.oobavail = lower->oobavail;
-+
-+	nld.read_page = nmbm_lower_read_page;
-+	nld.write_page = nmbm_lower_write_page;
-+	nld.erase_block = nmbm_lower_erase_block;
-+	nld.is_bad_block = nmbm_lower_is_bad_block;
-+	nld.mark_bad_block = nmbm_lower_mark_bad_block;
-+
-+	nld.logprint = nmbm_lower_log;
-+
-+	alloc_size = nmbm_calc_structure_size(&nld);
-+
-+	nm = devm_kzalloc(&pdev->dev, sizeof(*nm) + alloc_size +
-+			  lower->writesize + lower->oobsize, GFP_KERNEL);
-+	if (!nm) {
-+		ret = -ENOMEM;
-+		goto out;
-+	}
-+
-+	nm->ni = (void *)nm + sizeof(*nm);
-+	nm->page_cache = (uint8_t *)nm->ni + alloc_size;
-+	nm->lower = lower;
-+	nm->dev = &pdev->dev;
-+
-+	INIT_LIST_HEAD(&nm->node);
-+	spin_lock_init(&nm->lock);
-+	init_waitqueue_head(&nm->wq);
-+
-+	nld.arg = nm;
-+
-+	ret = nmbm_attach(&nld, nm->ni);
-+	if (ret)
-+		goto out;
-+
-+	/* Initialize upper mtd */
-+	mtd = &nm->upper;
-+
-+	mtd->owner = THIS_MODULE;
-+	mtd->dev.parent = &pdev->dev;
-+	mtd->type = lower->type;
-+	mtd->flags = lower->flags;
-+
-+	mtd->size = (uint64_t)nm->ni->data_block_count * lower->erasesize;
-+	mtd->erasesize = lower->erasesize;
-+	mtd->writesize = lower->writesize;
-+	mtd->writebufsize = lower->writesize;
-+	mtd->oobsize = lower->oobsize;
-+	mtd->oobavail = lower->oobavail;
-+
-+	mtd->erasesize_shift = lower->erasesize_shift;
-+	mtd->writesize_shift = lower->writesize_shift;
-+	mtd->erasesize_mask = lower->erasesize_mask;
-+	mtd->writesize_mask = lower->writesize_mask;
-+
-+	mtd->bitflip_threshold = lower->bitflip_threshold;
-+
-+	mtd->ooblayout = lower->ooblayout;
-+
-+	mtd->ecc_step_size = lower->ecc_step_size;
-+	mtd->ecc_strength = lower->ecc_strength;
-+
-+	mtd->numeraseregions = lower->numeraseregions;
-+	mtd->eraseregions = lower->eraseregions;
-+
-+	mtd->_erase = nmbm_mtd_erase;
-+	mtd->_read_oob = nmbm_mtd_read_oob;
-+	mtd->_write_oob = nmbm_mtd_write_oob;
-+	mtd->_block_isbad = nmbm_mtd_block_isbad;
-+	mtd->_block_markbad = nmbm_mtd_block_markbad;
-+	mtd->_reboot = nmbm_mtd_shutdown;
-+
-+	mtd_set_of_node(mtd, np);
-+
-+	ret = mtd_device_register(mtd, NULL, 0);
-+	if (ret) {
-+		dev_err(&pdev->dev, "failed to register mtd device\n");
-+		nmbm_detach(nm->ni);
-+		goto out;
-+	}
-+
-+	platform_set_drvdata(pdev, nm);
-+
-+	mutex_lock(&nmbm_devs_lock);
-+	list_add_tail(&nm->node, &nmbm_devs);
-+	mutex_unlock(&nmbm_devs_lock);
-+
-+	return 0;
-+
-+out:
-+	if (nm)
-+		devm_kfree(&pdev->dev, nm);
-+
-+	put_mtd_device(lower);
-+
-+	return ret;
-+}
-+
-+static int nmbm_remove(struct platform_device *pdev)
-+{
-+	struct nmbm_mtd *nm = platform_get_drvdata(pdev);
-+	struct mtd_info *lower = nm->lower;
-+	int ret;
-+
-+	ret = mtd_device_unregister(&nm->upper);
-+	if (ret)
-+		return ret;
-+
-+	nmbm_detach(nm->ni);
-+
-+	mutex_lock(&nmbm_devs_lock);
-+	list_add_tail(&nm->node, &nmbm_devs);
-+	mutex_unlock(&nmbm_devs_lock);
-+
-+	devm_kfree(&pdev->dev, nm);
-+
-+	put_mtd_device(lower);
-+
-+	platform_set_drvdata(pdev, NULL);
-+
-+	return 0;
-+}
-+
-+static const struct of_device_id nmbm_ids[] = {
-+	{ .compatible = "generic,nmbm" },
-+	{ },
-+};
-+
-+MODULE_DEVICE_TABLE(of, nmbm_ids);
-+
-+static struct platform_driver nmbm_driver = {
-+	.probe = nmbm_probe,
-+	.remove = nmbm_remove,
-+	.driver = {
-+		.name = "nmbm",
-+		.of_match_table = nmbm_ids,
-+	},
-+};
-+
-+static int __init nmbm_init(void)
-+{
-+	int ret;
-+
-+	INIT_LIST_HEAD(&nmbm_devs);
-+
-+	ret = platform_driver_register(&nmbm_driver);
-+	if (ret) {
-+		pr_err("failed to register nmbm driver\n");
-+		return ret;
-+	}
-+
-+	return 0;
-+}
-+module_init(nmbm_init);
-+
-+static void __exit nmbm_exit(void)
-+{
-+	platform_driver_unregister(&nmbm_driver);
-+}
-+module_exit(nmbm_exit);
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Weijie Gao <weijie.gao@mediatek.com>");
-+MODULE_DESCRIPTION("NAND mapping block management");
-diff --git a/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-private.h b/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-private.h
-new file mode 100644
-index 0000000000..c285aeb9dd
---- /dev/null
-+++ b/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-private.h
-@@ -0,0 +1,137 @@
-+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
-+/*
-+ * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
-+ *
-+ * Definitions for NAND Mapped-block Management (NMBM)
-+ *
-+ * Author: Weijie Gao <weijie.gao@mediatek.com>
-+ */
-+
-+#ifndef _NMBM_PRIVATE_H_
-+#define _NMBM_PRIVATE_H_
-+
-+#include <nmbm/nmbm.h>
-+
-+#define NMBM_MAGIC_SIGNATURE			0x304d4d4e	/* NMM0 */
-+#define NMBM_MAGIC_INFO_TABLE			0x314d4d4e	/* NMM1 */
-+
-+#define NMBM_VERSION_MAJOR_S			0
-+#define NMBM_VERSION_MAJOR_M			0xffff
-+#define NMBM_VERSION_MINOR_S			16
-+#define NMBM_VERSION_MINOR_M			0xffff
-+#define NMBM_VERSION_MAKE(major, minor)		(((major) & NMBM_VERSION_MAJOR_M) | \
-+						(((minor) & NMBM_VERSION_MINOR_M) << \
-+						NMBM_VERSION_MINOR_S))
-+#define NMBM_VERSION_MAJOR_GET(ver)		(((ver) >> NMBM_VERSION_MAJOR_S) & \
-+						NMBM_VERSION_MAJOR_M)
-+#define NMBM_VERSION_MINOR_GET(ver)		(((ver) >> NMBM_VERSION_MINOR_S) & \
-+						NMBM_VERSION_MINOR_M)
-+
-+typedef uint32_t				nmbm_bitmap_t;
-+#define NMBM_BITMAP_UNIT_SIZE			(sizeof(nmbm_bitmap_t))
-+#define NMBM_BITMAP_BITS_PER_BLOCK		2
-+#define NMBM_BITMAP_BITS_PER_UNIT		(8 * sizeof(nmbm_bitmap_t))
-+#define NMBM_BITMAP_BLOCKS_PER_UNIT		(NMBM_BITMAP_BITS_PER_UNIT / \
-+						 NMBM_BITMAP_BITS_PER_BLOCK)
-+
-+#define NMBM_SPARE_BLOCK_MULTI			1
-+#define NMBM_SPARE_BLOCK_DIV			2
-+#define NMBM_SPARE_BLOCK_MIN			2
-+
-+#define NMBM_MGMT_DIV				16
-+#define NMBM_MGMT_BLOCKS_MIN			32
-+
-+#define NMBM_TRY_COUNT				3
-+
-+#define BLOCK_ST_BAD				0
-+#define BLOCK_ST_NEED_REMAP			2
-+#define BLOCK_ST_GOOD				3
-+#define BLOCK_ST_MASK				3
-+
-+struct nmbm_header {
-+	uint32_t magic;
-+	uint32_t version;
-+	uint32_t size;
-+	uint32_t checksum;
-+};
-+
-+struct nmbm_signature {
-+	struct nmbm_header header;
-+	uint64_t nand_size;
-+	uint32_t block_size;
-+	uint32_t page_size;
-+	uint32_t spare_size;
-+	uint32_t mgmt_start_pb;
-+	uint8_t max_try_count;
-+	uint8_t padding[3];
-+};
-+
-+struct nmbm_info_table_header {
-+	struct nmbm_header header;
-+	uint32_t write_count;
-+	uint32_t state_table_off;
-+	uint32_t mapping_table_off;
-+	uint32_t padding;
-+};
-+
-+struct nmbm_instance {
-+	struct nmbm_lower_device lower;
-+
-+	uint32_t rawpage_size;
-+	uint32_t rawblock_size;
-+	uint32_t rawchip_size;
-+
-+	uint32_t writesize_mask;
-+	uint32_t erasesize_mask;
-+	uint16_t writesize_shift;
-+	uint16_t erasesize_shift;
-+
-+	struct nmbm_signature signature;
-+
-+	uint8_t *info_table_cache;
-+	uint32_t info_table_size;
-+	uint32_t info_table_spare_blocks;
-+	struct nmbm_info_table_header info_table;
-+
-+	nmbm_bitmap_t *block_state;
-+	uint32_t block_state_changed;
-+	uint32_t state_table_size;
-+
-+	int32_t *block_mapping;
-+	uint32_t block_mapping_changed;
-+	uint32_t mapping_table_size;
-+
-+	uint8_t *page_cache;
-+
-+	int protected;
-+
-+	uint32_t block_count;
-+	uint32_t data_block_count;
-+
-+	uint32_t mgmt_start_ba;
-+	uint32_t main_table_ba;
-+	uint32_t backup_table_ba;
-+	uint32_t mapping_blocks_ba;
-+	uint32_t mapping_blocks_top_ba;
-+	uint32_t signature_ba;
-+
-+	enum nmbm_log_category log_display_level;
-+};
-+
-+/* Log utilities */
-+#define nlog_debug(ni, fmt, ...) \
-+	nmbm_log(ni, NMBM_LOG_DEBUG, fmt, ##__VA_ARGS__)
-+
-+#define nlog_info(ni, fmt, ...) \
-+	nmbm_log(ni, NMBM_LOG_INFO, fmt, ##__VA_ARGS__)
-+
-+#define nlog_warn(ni, fmt, ...) \
-+	nmbm_log(ni, NMBM_LOG_WARN, fmt, ##__VA_ARGS__)
-+
-+#define nlog_err(ni, fmt, ...) \
-+	nmbm_log(ni, NMBM_LOG_ERR, fmt, ##__VA_ARGS__)
-+
-+#define nlog_emerg(ni, fmt, ...) \
-+	nmbm_log(ni, NMBM_LOG_EMERG, fmt, ##__VA_ARGS__)
-+
-+#endif /* _NMBM_PRIVATE_H_ */
-diff --git a/target/linux/ramips/files/include/nmbm/nmbm-os.h b/target/linux/ramips/files/include/nmbm/nmbm-os.h
-new file mode 100644
-index 0000000000..1cae854df1
---- /dev/null
-+++ b/target/linux/ramips/files/include/nmbm/nmbm-os.h
-@@ -0,0 +1,69 @@
-+/* SPDX-License-Identifier: GPL-2.0 */
-+/*
-+ * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
-+ *
-+ * OS-dependent definitions for NAND Mapped-block Management (NMBM)
-+ *
-+ * Author: Weijie Gao <weijie.gao@mediatek.com>
-+ */
-+
-+#ifndef _NMBM_OS_H_
-+#define _NMBM_OS_H_
-+
-+#include <linux/kernel.h>
-+#include <linux/limits.h>
-+#include <linux/string.h>
-+#include <linux/errno.h>
-+#include <linux/types.h>
-+#include <linux/crc32.h>
-+#include <linux/log2.h>
-+#include <asm/div64.h>
-+
-+static inline uint32_t nmbm_crc32(uint32_t crcval, const void *buf, size_t size)
-+{
-+	uint chksz;
-+	const unsigned char *p = buf;
-+
-+	while (size) {
-+		if (size > UINT_MAX)
-+			chksz = UINT_MAX;
-+		else
-+			chksz = (uint)size;
-+
-+		crcval = crc32_le(crcval, p, chksz);
-+		size -= chksz;
-+		p += chksz;
-+	}
-+
-+	return crcval;
-+}
-+
-+static inline uint32_t nmbm_lldiv(uint64_t dividend, uint32_t divisor)
-+{
-+#if BITS_PER_LONG == 64
-+	return dividend / divisor;
-+#else
-+	do_div(dividend, divisor);
-+	return dividend;
-+#endif
-+}
-+
-+#define WATCHDOG_RESET()
-+
-+#ifdef CONFIG_NMBM_LOG_LEVEL_DEBUG
-+#define NMBM_DEFAULT_LOG_LEVEL		0
-+#elif defined(NMBM_LOG_LEVEL_INFO)
-+#define NMBM_DEFAULT_LOG_LEVEL		1
-+#elif defined(NMBM_LOG_LEVEL_WARN)
-+#define NMBM_DEFAULT_LOG_LEVEL		2
-+#elif defined(NMBM_LOG_LEVEL_ERR)
-+#define NMBM_DEFAULT_LOG_LEVEL		3
-+#elif defined(NMBM_LOG_LEVEL_EMERG)
-+#define NMBM_DEFAULT_LOG_LEVEL		4
-+#elif defined(NMBM_LOG_LEVEL_NONE)
-+#define NMBM_DEFAULT_LOG_LEVEL		5
-+#else
-+#define NMBM_DEFAULT_LOG_LEVEL		1
-+#endif
-+
-+#endif /* _NMBM_OS_H_ */
-diff --git a/target/linux/ramips/files/include/nmbm/nmbm.h b/target/linux/ramips/files/include/nmbm/nmbm.h
-new file mode 100644
-index 0000000000..c0400988b1
---- /dev/null
-+++ b/target/linux/ramips/files/include/nmbm/nmbm.h
-@@ -0,0 +1,102 @@
-+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
-+/*
-+ * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
-+ *
-+ * Definitions for NAND Mapped-block Management (NMBM)
-+ *
-+ * Author: Weijie Gao <weijie.gao@mediatek.com>
-+ */
-+
-+#ifndef _NMBM_H_
-+#define _NMBM_H_
-+
-+#include <nmbm/nmbm-os.h>
-+
-+enum nmbm_log_category {
-+	NMBM_LOG_DEBUG,
-+	NMBM_LOG_INFO,
-+	NMBM_LOG_WARN,
-+	NMBM_LOG_ERR,
-+	NMBM_LOG_EMERG,
-+
-+	__NMBM_LOG_MAX
-+};
-+
-+enum nmbm_oob_mode {
-+	NMBM_MODE_PLACE_OOB,
-+	NMBM_MODE_AUTO_OOB,
-+	NMBM_MODE_RAW,
-+
-+	__NMBM_MODE_MAX
-+};
-+
-+struct nmbm_lower_device {
-+	uint32_t max_ratio;
-+	uint32_t max_reserved_blocks;
-+	int flags;
-+
-+	uint64_t size;
-+	uint32_t erasesize;
-+	uint32_t writesize;
-+	uint32_t oobsize;
-+	uint32_t oobavail;
-+
-+	void *arg;
-+	int (*reset_chip)(void *arg);
-+
-+	/*
-+	 * read_page:
-+	 *    return 0 if succeeds
-+	 *    return positive number for ecc error
-+	 *    return negative number for other errors
-+	 */
-+	int (*read_page)(void *arg, uint64_t addr, void *buf, void *oob, enum nmbm_oob_mode mode);
-+	int (*write_page)(void *arg, uint64_t addr, const void *buf, const void *oob, enum nmbm_oob_mode mode);
-+	int (*erase_block)(void *arg, uint64_t addr);
-+
-+	int (*is_bad_block)(void *arg, uint64_t addr);
-+	int (*mark_bad_block)(void *arg, uint64_t addr);
-+
-+	/* OS-dependent logging function */
-+	void (*logprint)(void *arg, enum nmbm_log_category level, const char *fmt, va_list ap);
-+};
-+
-+struct nmbm_instance;
-+
-+/* Create NMBM if management area not found, or not complete */
-+#define NMBM_F_CREATE			0x01
-+
-+/* Empty page is also protected by ECC, and bitflip(s) can be corrected */
-+#define NMBM_F_EMPTY_PAGE_ECC_OK	0x02
-+
-+/* Do not write anything back to flash */
-+#define NMBM_F_READ_ONLY		0x04
-+
-+size_t nmbm_calc_structure_size(struct nmbm_lower_device *nld);
-+int nmbm_attach(struct nmbm_lower_device *nld, struct nmbm_instance *ni);
-+int nmbm_detach(struct nmbm_instance *ni);
-+
-+enum nmbm_log_category nmbm_set_log_level(struct nmbm_instance *ni,
-+					  enum nmbm_log_category level);
-+
-+int nmbm_erase_block_range(struct nmbm_instance *ni, uint64_t addr,
-+			   uint64_t size, uint64_t *failed_addr);
-+int nmbm_read_single_page(struct nmbm_instance *ni, uint64_t addr, void *data,
-+			  void *oob, enum nmbm_oob_mode mode);
-+int nmbm_read_range(struct nmbm_instance *ni, uint64_t addr, size_t size,
-+		    void *data, enum nmbm_oob_mode mode, size_t *retlen);
-+int nmbm_write_single_page(struct nmbm_instance *ni, uint64_t addr,
-+			   const void *data, const void *oob,
-+			   enum nmbm_oob_mode mode);
-+int nmbm_write_range(struct nmbm_instance *ni, uint64_t addr, size_t size,
-+		     const void *data, enum nmbm_oob_mode mode,
-+		     size_t *retlen);
-+
-+int nmbm_check_bad_block(struct nmbm_instance *ni, uint64_t addr);
-+int nmbm_mark_bad_block(struct nmbm_instance *ni, uint64_t addr);
-+
-+uint64_t nmbm_get_avail_size(struct nmbm_instance *ni);
-+
-+int nmbm_get_lower_device(struct nmbm_instance *ni, struct nmbm_lower_device *nld);
-+
-+#endif /* _NMBM_H_ */
-diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
-index c3a1f68d84..57c3efcf2b 100644
---- a/target/linux/ramips/image/mt7621.mk
-+++ b/target/linux/ramips/image/mt7621.mk
-@@ -90,11 +90,35 @@ define Build/zytrx-header
- 	mv $@.new $@
- endef
- 
-+RELOCATE_LOADADDR = 0x81000000
-+
-+define Build/fit-relocate
-+	$(TOPDIR)/scripts/mkits.sh \
-+		-D $(DEVICE_NAME) -o $@.its -k $@ \
-+		$(if $(word 2,$(1)),-d $(word 2,$(1))) -C $(word 1,$(1)) \
-+		$(if $(word 3,$(1)),-r $(IMAGE_ROOTFS) -f $(subst _,$(comma),$(DEVICE_NAME))) \
-+		-a $(RELOCATE_LOADADDR) -e $(RELOCATE_LOADADDR) \
-+		$(if $(DEVICE_FDT_NUM),-n $(DEVICE_FDT_NUM)) \
-+		-c $(if $(DEVICE_DTS_CONFIG),$(DEVICE_DTS_CONFIG),"config-1") \
-+		-A $(LINUX_KARCH) -v $(LINUX_VERSION)
-+	PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage $(if $(word 3,$(1)),-E -B 0x1000 -p 0x1000) -f $@.its $@.new
-+	@mv $@.new $@
-+endef
-+
- define Device/dsa-migration
-   DEVICE_COMPAT_VERSION := 1.1
-   DEVICE_COMPAT_MESSAGE := Config cannot be migrated from swconfig to DSA
- endef
- 
-+define Device/actiontec_web7200
-+  DEVICE_VENDOR := Actiontec
-+  DEVICE_MODEL := EB7200
-+  DEVICE_PACKAGES += kmod-mt7603 kmod-mt7915e kmod-usb3 uboot-envtools kmod-i2c-core
-+  KERNEL := kernel-bin | relocate-kernel | lzma | fit-relocate lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
-+  IMAGE_SIZE := 15552k
-+endef
-+TARGET_DEVICES += actiontec_web7200
-+
- define Device/adslr_g7
-   $(Device/dsa-migration)
-   IMAGE_SIZE := 16064k
-@@ -1380,15 +1404,6 @@ define Device/ubnt_unifi-6-lite
- endef
- TARGET_DEVICES += ubnt_unifi-6-lite
- 
--define Device/ubnt_unifi-nanohd
--  $(Device/dsa-migration)
--  DEVICE_VENDOR := Ubiquiti
--  DEVICE_MODEL := UniFi nanoHD
--  DEVICE_PACKAGES += kmod-mt7603 kmod-mt7615e kmod-mt7615-firmware
--  IMAGE_SIZE := 15552k
--endef
--TARGET_DEVICES += ubnt_unifi-nanohd
--
- define Device/unielec_u7621-01-16m
-   $(Device/dsa-migration)
-   $(Device/uimage-lzma-loader)
-diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
-index 0e171f457b..b88fac6f59 100755
---- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
-+++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
-@@ -31,6 +31,7 @@ ramips_setup_interfaces()
- 	xiaomi,redmi-router-ac2100)
- 		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
- 		;;
-+	actiontec,web7200|\
- 	asiarf,ap7621-001|\
- 	winstars,ws-wn583a6)
- 		ucidef_set_interfaces_lan_wan "lan" "wan"
-@@ -93,6 +94,11 @@ ramips_setup_macs()
- 	local label_mac=""
- 
- 	case $board in
-+	actiontec,web7200)
-+		wan_mac=$(mtd_get_mac_ascii u-boot-env "AeiBaseMACAddr")
-+		label_mac=$wan_mac
-+		lan_mac=$(macaddr_add "$wan_mac" 1)
-+		;;
- 	ampedwireless,ally-00x19k)
- 		lan_mac=$(mtd_get_mac_ascii hwconfig HW.LAN.MAC.Address)
- 		label_mac=$lan_mac
-diff --git a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
-index f044325752..924f259e25 100755
---- a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
-+++ b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
-@@ -46,6 +46,15 @@ platform_do_upgrade() {
- 		dd if=/dev/mtd5 bs=1024 count=52224 >> /tmp/backup_firmware.bin
- 		mtd -e firmware2 write /tmp/backup_firmware.bin firmware2
- 		;;
-+	actiontec,web7200)
-+		if grep -q bootselect=0 /proc/cmdline; then
-+			PART_NAME=firmware2
-+			fw_setenv bootselect 1 || exit 1
-+		else
-+			PART_NAME=firmware1
-+			fw_setenv bootselect 0 || exit 1
-+		fi
-+		;;
- 	esac
- 
- 	case "$board" in
-diff --git a/target/linux/ramips/mt7621/config-5.4 b/target/linux/ramips/mt7621/config-5.4
-index 057c782760..1484fc0269 100644
---- a/target/linux/ramips/mt7621/config-5.4
-+++ b/target/linux/ramips/mt7621/config-5.4
-@@ -184,6 +184,14 @@ CONFIG_NET_MEDIATEK_SOC=y
- CONFIG_NET_SWITCHDEV=y
- CONFIG_NET_VENDOR_MEDIATEK=y
- # CONFIG_NET_VENDOR_RALINK is not set
-+CONFIG_NMBM=y
-+# CONFIG_NMBM_LOG_LEVEL_DEBUG is not set
-+# CONFIG_NMBM_LOG_LEVEL_EMERG is not set
-+# CONFIG_NMBM_LOG_LEVEL_ERR is not set
-+CONFIG_NMBM_LOG_LEVEL_INFO=y
-+# CONFIG_NMBM_LOG_LEVEL_NONE is not set
-+# CONFIG_NMBM_LOG_LEVEL_WARN is not set
-+CONFIG_NMBM_MTD=y
- CONFIG_NR_CPUS=4
- CONFIG_OF=y
- CONFIG_OF_ADDRESS=y
-@@ -230,7 +238,6 @@ CONFIG_RFS_ACCEL=y
- CONFIG_RPS=y
- CONFIG_RTC_CLASS=y
- CONFIG_RTC_DRV_BQ32K=y
--# CONFIG_RTC_DRV_JZ4740 is not set
- CONFIG_RTC_DRV_PCF8563=y
- CONFIG_RTC_I2C_AND_SPI=y
- CONFIG_RTC_MC146818_LIB=y
-diff --git a/target/linux/ramips/patches-5.4/499-mtd-add-nmbm-support.patch b/target/linux/ramips/patches-5.4/499-mtd-add-nmbm-support.patch
-new file mode 100644
-index 0000000000..5cbaae2b7b
---- /dev/null
-+++ b/target/linux/ramips/patches-5.4/499-mtd-add-nmbm-support.patch
-@@ -0,0 +1,21 @@
-+--- a/drivers/mtd/Kconfig
-++++ b/drivers/mtd/Kconfig
-+@@ -228,6 +228,8 @@ source "drivers/mtd/ubi/Kconfig"
-+ 
-+ source "drivers/mtd/hyperbus/Kconfig"
-+ 
-++source "drivers/mtd/nmbm/Kconfig"
-++
-+ source "drivers/mtd/composite/Kconfig"
-+ 
-+ endif # MTD
-+--- a/drivers/mtd/Makefile
-++++ b/drivers/mtd/Makefile
-+@@ -33,5 +33,7 @@ obj-$(CONFIG_MTD_SPI_NOR)	+= spi-nor/
-+ obj-$(CONFIG_MTD_UBI)		+= ubi/
-+ obj-$(CONFIG_MTD_HYPERBUS)	+= hyperbus/
-+ 
-++obj-y				+= nmbm/
-++
-+ # Composite drivers must be loaded last
-+ obj-y				+= composite/
--- 
-2.34.1
-
diff --git a/patches/ramips/0007-ramips-add-mtk_bmt-support-includes-bbt-bmt-v2-nmbm.patch b/patches/ramips/0007-ramips-add-mtk_bmt-support-includes-bbt-bmt-v2-nmbm.patch
deleted file mode 100644
index 45d6dc8c3..000000000
--- a/patches/ramips/0007-ramips-add-mtk_bmt-support-includes-bbt-bmt-v2-nmbm.patch
+++ /dev/null
@@ -1,3796 +0,0 @@
-From ed2d3983fdc3b7fe8b67d6fbf104258c23f0544c Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Thu, 10 Mar 2022 18:19:37 +0100
-Subject: [PATCH 07/14] ramips: add mtk_bmt support (includes bbt, bmt v2,
- nmbm)
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- target/linux/generic/config-5.4               |    1 +
- .../ramips/files/drivers/mtd/nand/mtk_bmt.c   |  465 ++++
- .../ramips/files/drivers/mtd/nand/mtk_bmt.h   |  131 +
- .../files/drivers/mtd/nand/mtk_bmt_bbt.c      |  203 ++
- .../files/drivers/mtd/nand/mtk_bmt_nmbm.c     | 2348 +++++++++++++++++
- .../files/drivers/mtd/nand/mtk_bmt_v2.c       |  513 ++++
- .../ramips/files/include/linux/mtd/mtk_bmt.h  |   18 +
- target/linux/ramips/mt7621/config-5.4         |    1 +
- .../patches-5.4/430-mtk-bmt-support.patch     |   23 +
- 9 files changed, 3703 insertions(+)
- create mode 100644 target/linux/ramips/files/drivers/mtd/nand/mtk_bmt.c
- create mode 100644 target/linux/ramips/files/drivers/mtd/nand/mtk_bmt.h
- create mode 100644 target/linux/ramips/files/drivers/mtd/nand/mtk_bmt_bbt.c
- create mode 100644 target/linux/ramips/files/drivers/mtd/nand/mtk_bmt_nmbm.c
- create mode 100644 target/linux/ramips/files/drivers/mtd/nand/mtk_bmt_v2.c
- create mode 100644 target/linux/ramips/files/include/linux/mtd/mtk_bmt.h
- create mode 100644 target/linux/ramips/patches-5.4/430-mtk-bmt-support.patch
-
-diff --git a/target/linux/generic/config-5.4 b/target/linux/generic/config-5.4
-index a62b2cadcb..a821a1de5f 100644
---- a/target/linux/generic/config-5.4
-+++ b/target/linux/generic/config-5.4
-@@ -3234,6 +3234,7 @@ CONFIG_MTD_NAND_IDS=y
- # CONFIG_MTD_NAND_JZ4740 is not set
- # CONFIG_MTD_NAND_MPC5121_NFC is not set
- # CONFIG_MTD_NAND_MTK is not set
-+# CONFIG_MTD_NAND_MTK_BMT is not set
- # CONFIG_MTD_NAND_MXC is not set
- # CONFIG_MTD_NAND_MXIC is not set
- # CONFIG_MTD_NAND_NANDSIM is not set
-diff --git a/target/linux/ramips/files/drivers/mtd/nand/mtk_bmt.c b/target/linux/ramips/files/drivers/mtd/nand/mtk_bmt.c
-new file mode 100644
-index 0000000000..f1df4a11f1
---- /dev/null
-+++ b/target/linux/ramips/files/drivers/mtd/nand/mtk_bmt.c
-@@ -0,0 +1,465 @@
-+/*
-+ * Copyright (c) 2017 MediaTek Inc.
-+ * Author: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
-+ * Copyright (c) 2020-2022 Felix Fietkau <nbd@nbd.name>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/gfp.h>
-+#include <linux/slab.h>
-+#include <linux/bits.h>
-+#include "mtk_bmt.h"
-+
-+struct bmt_desc bmtd = {};
-+
-+/* -------- Nand operations wrapper -------- */
-+int bbt_nand_copy(u16 dest_blk, u16 src_blk, loff_t max_offset)
-+{
-+	int pages = bmtd.blk_size >> bmtd.pg_shift;
-+	loff_t src = (loff_t)src_blk << bmtd.blk_shift;
-+	loff_t dest = (loff_t)dest_blk << bmtd.blk_shift;
-+	loff_t offset = 0;
-+	uint8_t oob[64];
-+	int i, ret;
-+
-+	for (i = 0; i < pages; i++) {
-+		struct mtd_oob_ops rd_ops = {
-+			.mode = MTD_OPS_PLACE_OOB,
-+			.oobbuf = oob,
-+			.ooblen = min_t(int, bmtd.mtd->oobsize / pages, sizeof(oob)),
-+			.datbuf = bmtd.data_buf,
-+			.len = bmtd.pg_size,
-+		};
-+		struct mtd_oob_ops wr_ops = {
-+			.mode = MTD_OPS_PLACE_OOB,
-+			.oobbuf = oob,
-+			.datbuf = bmtd.data_buf,
-+			.len = bmtd.pg_size,
-+		};
-+
-+		if (offset >= max_offset)
-+			break;
-+
-+		ret = bmtd._read_oob(bmtd.mtd, src + offset, &rd_ops);
-+		if (ret < 0 && !mtd_is_bitflip(ret))
-+			return ret;
-+
-+		if (!rd_ops.retlen)
-+			break;
-+
-+		ret = bmtd._write_oob(bmtd.mtd, dest + offset, &wr_ops);
-+		if (ret < 0)
-+			return ret;
-+
-+		wr_ops.ooblen = rd_ops.oobretlen;
-+		offset += rd_ops.retlen;
-+	}
-+
-+	return 0;
-+}
-+
-+/* -------- Bad Blocks Management -------- */
-+bool mapping_block_in_range(int block, int *start, int *end)
-+{
-+	const __be32 *cur = bmtd.remap_range;
-+	u32 addr = block << bmtd.blk_shift;
-+	int i;
-+
-+	if (!cur || !bmtd.remap_range_len) {
-+		*start = 0;
-+		*end = bmtd.total_blks;
-+		return true;
-+	}
-+
-+	for (i = 0; i < bmtd.remap_range_len; i++, cur += 2) {
-+		if (addr < be32_to_cpu(cur[0]) || addr >= be32_to_cpu(cur[1]))
-+			continue;
-+
-+		*start = be32_to_cpu(cur[0]);
-+		*end = be32_to_cpu(cur[1]);
-+		return true;
-+	}
-+
-+	return false;
-+}
-+
-+static bool
-+mtk_bmt_remap_block(u32 block, u32 mapped_block, int copy_len)
-+{
-+	int start, end;
-+
-+	if (!mapping_block_in_range(block, &start, &end))
-+		return false;
-+
-+	return bmtd.ops->remap_block(block, mapped_block, copy_len);
-+}
-+
-+static int
-+mtk_bmt_read(struct mtd_info *mtd, loff_t from,
-+	     struct mtd_oob_ops *ops)
-+{
-+	struct mtd_oob_ops cur_ops = *ops;
-+	int retry_count = 0;
-+	loff_t cur_from;
-+	int ret = 0;
-+	int max_bitflips = 0;
-+
-+	ops->retlen = 0;
-+	ops->oobretlen = 0;
-+
-+	while (ops->retlen < ops->len || ops->oobretlen < ops->ooblen) {
-+		int cur_ret;
-+
-+		u32 offset = from & (bmtd.blk_size - 1);
-+		u32 block = from >> bmtd.blk_shift;
-+		int cur_block;
-+
-+		cur_block = bmtd.ops->get_mapping_block(block);
-+		if (cur_block < 0)
-+			return -EIO;
-+
-+		cur_from = ((loff_t)cur_block << bmtd.blk_shift) + offset;
-+
-+		cur_ops.oobretlen = 0;
-+		cur_ops.retlen = 0;
-+		cur_ops.len = min_t(u32, mtd->erasesize - offset,
-+					 ops->len - ops->retlen);
-+		cur_ret = bmtd._read_oob(mtd, cur_from, &cur_ops);
-+		if (cur_ret < 0)
-+			ret = cur_ret;
-+		else
-+			max_bitflips = max_t(int, max_bitflips, cur_ret);
-+		if (cur_ret < 0 && !mtd_is_bitflip(cur_ret)) {
-+			if (mtk_bmt_remap_block(block, cur_block, mtd->erasesize) &&
-+				retry_count++ < 10)
-+				continue;
-+
-+			goto out;
-+		}
-+
-+		if (cur_ret >= mtd->bitflip_threshold)
-+			mtk_bmt_remap_block(block, cur_block, mtd->erasesize);
-+
-+		ops->retlen += cur_ops.retlen;
-+		ops->oobretlen += cur_ops.oobretlen;
-+
-+		cur_ops.ooboffs = 0;
-+		cur_ops.datbuf += cur_ops.retlen;
-+		cur_ops.oobbuf += cur_ops.oobretlen;
-+		cur_ops.ooblen -= cur_ops.oobretlen;
-+
-+		if (!cur_ops.len)
-+			cur_ops.len = mtd->erasesize - offset;
-+
-+		from += cur_ops.len;
-+		retry_count = 0;
-+	}
-+
-+out:
-+	if (ret < 0)
-+		return ret;
-+
-+	return max_bitflips;
-+}
-+
-+static int
-+mtk_bmt_write(struct mtd_info *mtd, loff_t to,
-+	      struct mtd_oob_ops *ops)
-+{
-+	struct mtd_oob_ops cur_ops = *ops;
-+	int retry_count = 0;
-+	loff_t cur_to;
-+	int ret;
-+
-+	ops->retlen = 0;
-+	ops->oobretlen = 0;
-+
-+	while (ops->retlen < ops->len || ops->oobretlen < ops->ooblen) {
-+		u32 offset = to & (bmtd.blk_size - 1);
-+		u32 block = to >> bmtd.blk_shift;
-+		int cur_block;
-+
-+		cur_block = bmtd.ops->get_mapping_block(block);
-+		if (cur_block < 0)
-+			return -EIO;
-+
-+		cur_to = ((loff_t)cur_block << bmtd.blk_shift) + offset;
-+
-+		cur_ops.oobretlen = 0;
-+		cur_ops.retlen = 0;
-+		cur_ops.len = min_t(u32, bmtd.blk_size - offset,
-+					 ops->len - ops->retlen);
-+		ret = bmtd._write_oob(mtd, cur_to, &cur_ops);
-+		if (ret < 0) {
-+			if (mtk_bmt_remap_block(block, cur_block, offset) &&
-+			    retry_count++ < 10)
-+				continue;
-+
-+			return ret;
-+		}
-+
-+		ops->retlen += cur_ops.retlen;
-+		ops->oobretlen += cur_ops.oobretlen;
-+
-+		cur_ops.ooboffs = 0;
-+		cur_ops.datbuf += cur_ops.retlen;
-+		cur_ops.oobbuf += cur_ops.oobretlen;
-+		cur_ops.ooblen -= cur_ops.oobretlen;
-+
-+		if (!cur_ops.len)
-+			cur_ops.len = mtd->erasesize - offset;
-+
-+		to += cur_ops.len;
-+		retry_count = 0;
-+	}
-+
-+	return 0;
-+}
-+
-+static int
-+mtk_bmt_mtd_erase(struct mtd_info *mtd, struct erase_info *instr)
-+{
-+	struct erase_info mapped_instr = {
-+		.len = bmtd.blk_size,
-+	};
-+	int retry_count = 0;
-+	u64 start_addr, end_addr;
-+	int ret;
-+	u16 orig_block;
-+	int block;
-+
-+	start_addr = instr->addr & (~mtd->erasesize_mask);
-+	end_addr = instr->addr + instr->len;
-+
-+	while (start_addr < end_addr) {
-+		orig_block = start_addr >> bmtd.blk_shift;
-+		block = bmtd.ops->get_mapping_block(orig_block);
-+		if (block < 0)
-+			return -EIO;
-+		mapped_instr.addr = (loff_t)block << bmtd.blk_shift;
-+		ret = bmtd._erase(mtd, &mapped_instr);
-+		if (ret) {
-+			if (mtk_bmt_remap_block(orig_block, block, 0) &&
-+			    retry_count++ < 10)
-+				continue;
-+			instr->fail_addr = start_addr;
-+			break;
-+		}
-+		start_addr += mtd->erasesize;
-+		retry_count = 0;
-+	}
-+
-+	return ret;
-+}
-+static int
-+mtk_bmt_block_isbad(struct mtd_info *mtd, loff_t ofs)
-+{
-+	int retry_count = 0;
-+	u16 orig_block = ofs >> bmtd.blk_shift;
-+	u16 block;
-+	int ret;
-+
-+retry:
-+	block = bmtd.ops->get_mapping_block(orig_block);
-+	ret = bmtd._block_isbad(mtd, (loff_t)block << bmtd.blk_shift);
-+	if (ret) {
-+		if (mtk_bmt_remap_block(orig_block, block, bmtd.blk_size) &&
-+		    retry_count++ < 10)
-+			goto retry;
-+	}
-+	return ret;
-+}
-+
-+static int
-+mtk_bmt_block_markbad(struct mtd_info *mtd, loff_t ofs)
-+{
-+	u16 orig_block = ofs >> bmtd.blk_shift;
-+	int block;
-+
-+	block = bmtd.ops->get_mapping_block(orig_block);
-+	if (block < 0)
-+		return -EIO;
-+
-+	mtk_bmt_remap_block(orig_block, block, bmtd.blk_size);
-+
-+	return bmtd._block_markbad(mtd, (loff_t)block << bmtd.blk_shift);
-+}
-+
-+static void
-+mtk_bmt_replace_ops(struct mtd_info *mtd)
-+{
-+	bmtd._read_oob = mtd->_read_oob;
-+	bmtd._write_oob = mtd->_write_oob;
-+	bmtd._erase = mtd->_erase;
-+	bmtd._block_isbad = mtd->_block_isbad;
-+	bmtd._block_markbad = mtd->_block_markbad;
-+
-+	mtd->_read_oob = mtk_bmt_read;
-+	mtd->_write_oob = mtk_bmt_write;
-+	mtd->_erase = mtk_bmt_mtd_erase;
-+	mtd->_block_isbad = mtk_bmt_block_isbad;
-+	mtd->_block_markbad = mtk_bmt_block_markbad;
-+}
-+
-+static int mtk_bmt_debug_repair(void *data, u64 val)
-+{
-+	int block = val >> bmtd.blk_shift;
-+	int prev_block, new_block;
-+
-+	prev_block = bmtd.ops->get_mapping_block(block);
-+	if (prev_block < 0)
-+		return -EIO;
-+
-+	bmtd.ops->unmap_block(block);
-+	new_block = bmtd.ops->get_mapping_block(block);
-+	if (new_block < 0)
-+		return -EIO;
-+
-+	if (prev_block == new_block)
-+		return 0;
-+
-+	bbt_nand_erase(new_block);
-+	bbt_nand_copy(new_block, prev_block, bmtd.blk_size);
-+
-+	return 0;
-+}
-+
-+static int mtk_bmt_debug_mark_good(void *data, u64 val)
-+{
-+	bmtd.ops->unmap_block(val >> bmtd.blk_shift);
-+
-+	return 0;
-+}
-+
-+static int mtk_bmt_debug_mark_bad(void *data, u64 val)
-+{
-+	u32 block = val >> bmtd.blk_shift;
-+	int cur_block;
-+
-+	cur_block = bmtd.ops->get_mapping_block(block);
-+	if (cur_block < 0)
-+		return -EIO;
-+
-+	mtk_bmt_remap_block(block, cur_block, bmtd.blk_size);
-+
-+	return 0;
-+}
-+
-+static int mtk_bmt_debug(void *data, u64 val)
-+{
-+	return bmtd.ops->debug(data, val);
-+}
-+
-+
-+DEFINE_DEBUGFS_ATTRIBUTE(fops_repair, NULL, mtk_bmt_debug_repair, "%llu\n");
-+DEFINE_DEBUGFS_ATTRIBUTE(fops_mark_good, NULL, mtk_bmt_debug_mark_good, "%llu\n");
-+DEFINE_DEBUGFS_ATTRIBUTE(fops_mark_bad, NULL, mtk_bmt_debug_mark_bad, "%llu\n");
-+DEFINE_DEBUGFS_ATTRIBUTE(fops_debug, NULL, mtk_bmt_debug, "%llu\n");
-+
-+static void
-+mtk_bmt_add_debugfs(void)
-+{
-+	struct dentry *dir;
-+
-+	dir = bmtd.debugfs_dir = debugfs_create_dir("mtk-bmt", NULL);
-+	if (!dir)
-+		return;
-+
-+	debugfs_create_file_unsafe("repair", S_IWUSR, dir, NULL, &fops_repair);
-+	debugfs_create_file_unsafe("mark_good", S_IWUSR, dir, NULL, &fops_mark_good);
-+	debugfs_create_file_unsafe("mark_bad", S_IWUSR, dir, NULL, &fops_mark_bad);
-+	debugfs_create_file_unsafe("debug", S_IWUSR, dir, NULL, &fops_debug);
-+}
-+
-+void mtk_bmt_detach(struct mtd_info *mtd)
-+{
-+	if (bmtd.mtd != mtd)
-+		return;
-+
-+	if (bmtd.debugfs_dir)
-+		debugfs_remove_recursive(bmtd.debugfs_dir);
-+	bmtd.debugfs_dir = NULL;
-+
-+	kfree(bmtd.bbt_buf);
-+	kfree(bmtd.data_buf);
-+
-+	mtd->_read_oob = bmtd._read_oob;
-+	mtd->_write_oob = bmtd._write_oob;
-+	mtd->_erase = bmtd._erase;
-+	mtd->_block_isbad = bmtd._block_isbad;
-+	mtd->_block_markbad = bmtd._block_markbad;
-+	mtd->size = bmtd.total_blks << bmtd.blk_shift;
-+
-+	memset(&bmtd, 0, sizeof(bmtd));
-+}
-+
-+
-+int mtk_bmt_attach(struct mtd_info *mtd)
-+{
-+	struct device_node *np;
-+	int ret = 0;
-+
-+	if (bmtd.mtd)
-+		return -ENOSPC;
-+
-+	np = mtd_get_of_node(mtd);
-+	if (!np)
-+		return 0;
-+
-+	if (of_property_read_bool(np, "mediatek,bmt-v2"))
-+		bmtd.ops = &mtk_bmt_v2_ops;
-+	else if (of_property_read_bool(np, "mediatek,nmbm"))
-+		bmtd.ops = &mtk_bmt_nmbm_ops;
-+	else if (of_property_read_bool(np, "mediatek,bbt"))
-+		bmtd.ops = &mtk_bmt_bbt_ops;
-+	else
-+		return 0;
-+
-+	bmtd.remap_range = of_get_property(np, "mediatek,bmt-remap-range",
-+					   &bmtd.remap_range_len);
-+	bmtd.remap_range_len /= 8;
-+
-+	bmtd.mtd = mtd;
-+	mtk_bmt_replace_ops(mtd);
-+
-+	bmtd.blk_size = mtd->erasesize;
-+	bmtd.blk_shift = ffs(bmtd.blk_size) - 1;
-+	bmtd.pg_size = mtd->writesize;
-+	bmtd.pg_shift = ffs(bmtd.pg_size) - 1;
-+	bmtd.total_blks = mtd->size >> bmtd.blk_shift;
-+
-+	bmtd.data_buf = kzalloc(bmtd.pg_size + bmtd.mtd->oobsize, GFP_KERNEL);
-+	if (!bmtd.data_buf) {
-+		pr_info("nand: FATAL ERR: allocate buffer failed!\n");
-+		ret = -1;
-+		goto error;
-+	}
-+
-+	memset(bmtd.data_buf, 0xff, bmtd.pg_size + bmtd.mtd->oobsize);
-+
-+	ret = bmtd.ops->init(np);
-+	if (ret)
-+		goto error;
-+
-+	mtk_bmt_add_debugfs();
-+	return 0;
-+
-+error:
-+	mtk_bmt_detach(mtd);
-+	return ret;
-+}
-+
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Xiangsheng Hou <xiangsheng.hou@mediatek.com>, Felix Fietkau <nbd@nbd.name>");
-+MODULE_DESCRIPTION("Bad Block mapping management v2 for MediaTek NAND Flash Driver");
-+
-diff --git a/target/linux/ramips/files/drivers/mtd/nand/mtk_bmt.h b/target/linux/ramips/files/drivers/mtd/nand/mtk_bmt.h
-new file mode 100644
-index 0000000000..dff1f28c81
---- /dev/null
-+++ b/target/linux/ramips/files/drivers/mtd/nand/mtk_bmt.h
-@@ -0,0 +1,131 @@
-+#ifndef __MTK_BMT_PRIV_H
-+#define __MTK_BMT_PRIV_H
-+
-+#include <linux/kernel.h>
-+#include <linux/of.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/partitions.h>
-+#include <linux/mtd/mtk_bmt.h>
-+#include <linux/debugfs.h>
-+
-+#define MAIN_SIGNATURE_OFFSET   0
-+#define OOB_SIGNATURE_OFFSET    1
-+
-+#define BBT_LOG(fmt, ...) pr_debug("[BBT][%s|%d] "fmt"\n", __func__, __LINE__, ##__VA_ARGS__)
-+
-+struct mtk_bmt_ops {
-+	char *sig;
-+	unsigned int sig_len;
-+	int (*init)(struct device_node *np);
-+	bool (*remap_block)(u16 block, u16 mapped_block, int copy_len);
-+	void (*unmap_block)(u16 block);
-+	int (*get_mapping_block)(int block);
-+	int (*debug)(void *data, u64 val);
-+};
-+
-+struct bbbt;
-+struct nmbm_instance;
-+
-+struct bmt_desc {
-+	struct mtd_info *mtd;
-+	unsigned char *bbt_buf;
-+	unsigned char *data_buf;
-+
-+	int (*_read_oob) (struct mtd_info *mtd, loff_t from,
-+			  struct mtd_oob_ops *ops);
-+	int (*_write_oob) (struct mtd_info *mtd, loff_t to,
-+			   struct mtd_oob_ops *ops);
-+	int (*_erase) (struct mtd_info *mtd, struct erase_info *instr);
-+	int (*_block_isbad) (struct mtd_info *mtd, loff_t ofs);
-+	int (*_block_markbad) (struct mtd_info *mtd, loff_t ofs);
-+
-+	const struct mtk_bmt_ops *ops;
-+
-+	union {
-+		struct bbbt *bbt;
-+		struct nmbm_instance *ni;
-+	};
-+
-+	struct dentry *debugfs_dir;
-+
-+	u32 table_size;
-+	u32 pg_size;
-+	u32 blk_size;
-+	u16 pg_shift;
-+	u16 blk_shift;
-+	/* bbt logical address */
-+	u16 pool_lba;
-+	/* bbt physical address */
-+	u16 pool_pba;
-+	/* Maximum count of bad blocks that the vendor guaranteed */
-+	u16 bb_max;
-+	/* Total blocks of the Nand Chip */
-+	u16 total_blks;
-+	/* The block(n) BMT is located at (bmt_tbl[n]) */
-+	u16 bmt_blk_idx;
-+	/* How many pages needs to store 'struct bbbt' */
-+	u32 bmt_pgs;
-+
-+	const __be32 *remap_range;
-+	int remap_range_len;
-+
-+	/* to compensate for driver level remapping */
-+	u8 oob_offset;
-+};
-+
-+extern struct bmt_desc bmtd;
-+extern const struct mtk_bmt_ops mtk_bmt_v2_ops;
-+extern const struct mtk_bmt_ops mtk_bmt_bbt_ops;
-+extern const struct mtk_bmt_ops mtk_bmt_nmbm_ops;
-+
-+static inline u32 blk_pg(u16 block)
-+{
-+	return (u32)(block << (bmtd.blk_shift - bmtd.pg_shift));
-+}
-+
-+static inline int
-+bbt_nand_read(u32 page, unsigned char *dat, int dat_len,
-+	      unsigned char *fdm, int fdm_len)
-+{
-+	struct mtd_oob_ops ops = {
-+		.mode = MTD_OPS_PLACE_OOB,
-+		.ooboffs = bmtd.oob_offset,
-+		.oobbuf = fdm,
-+		.ooblen = fdm_len,
-+		.datbuf = dat,
-+		.len = dat_len,
-+	};
-+
-+	return bmtd._read_oob(bmtd.mtd, page << bmtd.pg_shift, &ops);
-+}
-+
-+static inline int bbt_nand_erase(u16 block)
-+{
-+	struct mtd_info *mtd = bmtd.mtd;
-+	struct erase_info instr = {
-+		.addr = (loff_t)block << bmtd.blk_shift,
-+		.len = bmtd.blk_size,
-+	};
-+
-+	return bmtd._erase(mtd, &instr);
-+}
-+
-+static inline int write_bmt(u16 block, unsigned char *dat)
-+{
-+	struct mtd_oob_ops ops = {
-+		.mode = MTD_OPS_PLACE_OOB,
-+		.ooboffs = OOB_SIGNATURE_OFFSET + bmtd.oob_offset,
-+		.oobbuf = bmtd.ops->sig,
-+		.ooblen = bmtd.ops->sig_len,
-+		.datbuf = dat,
-+		.len = bmtd.bmt_pgs << bmtd.pg_shift,
-+	};
-+	loff_t addr = (loff_t)block << bmtd.blk_shift;
-+
-+	return bmtd._write_oob(bmtd.mtd, addr, &ops);
-+}
-+
-+int bbt_nand_copy(u16 dest_blk, u16 src_blk, loff_t max_offset);
-+bool mapping_block_in_range(int block, int *start, int *end);
-+
-+#endif
-diff --git a/target/linux/ramips/files/drivers/mtd/nand/mtk_bmt_bbt.c b/target/linux/ramips/files/drivers/mtd/nand/mtk_bmt_bbt.c
-new file mode 100644
-index 0000000000..519e1ed70c
---- /dev/null
-+++ b/target/linux/ramips/files/drivers/mtd/nand/mtk_bmt_bbt.c
-@@ -0,0 +1,203 @@
-+/*
-+ * Copyright (c) 2017 MediaTek Inc.
-+ * Author: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
-+ * Copyright (c) 2020-2022 Felix Fietkau <nbd@nbd.name>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/slab.h>
-+#include "mtk_bmt.h"
-+
-+static bool
-+bbt_block_is_bad(u16 block)
-+{
-+	u8 cur = bmtd.bbt_buf[block / 4];
-+
-+	return cur & (3 << ((block % 4) * 2));
-+}
-+
-+static void
-+bbt_set_block_state(u16 block, bool bad)
-+{
-+	u8 mask = (3 << ((block % 4) * 2));
-+
-+	if (bad)
-+		bmtd.bbt_buf[block / 4] |= mask;
-+	else
-+		bmtd.bbt_buf[block / 4] &= ~mask;
-+
-+	bbt_nand_erase(bmtd.bmt_blk_idx);
-+	write_bmt(bmtd.bmt_blk_idx, bmtd.bbt_buf);
-+}
-+
-+static int
-+get_mapping_block_index_bbt(int block)
-+{
-+	int start, end, ofs;
-+	int bad_blocks = 0;
-+	int i;
-+
-+	if (!mapping_block_in_range(block, &start, &end))
-+		return block;
-+
-+	start >>= bmtd.blk_shift;
-+	end >>= bmtd.blk_shift;
-+	/* skip bad blocks within the mapping range */
-+	ofs = block - start;
-+	for (i = start; i < end; i++) {
-+		if (bbt_block_is_bad(i))
-+			bad_blocks++;
-+		else if (ofs)
-+			ofs--;
-+		else
-+			break;
-+	}
-+
-+	if (i < end)
-+		return i;
-+
-+	/* when overflowing, remap remaining blocks to bad ones */
-+	for (i = end - 1; bad_blocks > 0; i--) {
-+		if (!bbt_block_is_bad(i))
-+			continue;
-+
-+		bad_blocks--;
-+		if (bad_blocks <= ofs)
-+			return i;
-+	}
-+
-+	return block;
-+}
-+
-+static bool remap_block_bbt(u16 block, u16 mapped_blk, int copy_len)
-+{
-+	int start, end;
-+	u16 new_blk;
-+
-+	if (!mapping_block_in_range(block, &start, &end))
-+		return false;
-+
-+	bbt_set_block_state(mapped_blk, true);
-+
-+	new_blk = get_mapping_block_index_bbt(block);
-+	bbt_nand_erase(new_blk);
-+	if (copy_len > 0)
-+		bbt_nand_copy(new_blk, mapped_blk, copy_len);
-+
-+	return true;
-+}
-+
-+static void
-+unmap_block_bbt(u16 block)
-+{
-+	bbt_set_block_state(block, false);
-+}
-+
-+static int
-+mtk_bmt_read_bbt(void)
-+{
-+	u8 oob_buf[8];
-+	int i;
-+
-+	for (i = bmtd.total_blks - 1; i >= bmtd.total_blks - 5; i--) {
-+		u32 page = i << (bmtd.blk_shift - bmtd.pg_shift);
-+
-+		if (bbt_nand_read(page, bmtd.bbt_buf, bmtd.pg_size,
-+				  oob_buf, sizeof(oob_buf))) {
-+			pr_info("read_bbt: could not read block %d\n", i);
-+			continue;
-+		}
-+
-+		if (oob_buf[0] != 0xff) {
-+			pr_info("read_bbt: bad block at %d\n", i);
-+			continue;
-+		}
-+
-+		if (memcmp(&oob_buf[1], "mtknand", 7) != 0) {
-+			pr_info("read_bbt: signature mismatch in block %d\n", i);
-+			print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1, oob_buf, 8, 1);
-+			continue;
-+		}
-+
-+		pr_info("read_bbt: found bbt at block %d\n", i);
-+		bmtd.bmt_blk_idx = i;
-+		return 0;
-+	}
-+
-+	return -EIO;
-+}
-+
-+
-+static int
-+mtk_bmt_init_bbt(struct device_node *np)
-+{
-+	int buf_size = round_up(bmtd.total_blks >> 2, bmtd.blk_size);
-+	int ret;
-+
-+	bmtd.bbt_buf = kmalloc(buf_size, GFP_KERNEL);
-+	if (!bmtd.bbt_buf)
-+		return -ENOMEM;
-+
-+	memset(bmtd.bbt_buf, 0xff, buf_size);
-+	bmtd.mtd->size -= 4 * bmtd.mtd->erasesize;
-+
-+	ret = mtk_bmt_read_bbt();
-+	if (ret)
-+		return ret;
-+
-+	bmtd.bmt_pgs = buf_size / bmtd.pg_size;
-+
-+	return 0;
-+}
-+
-+static int mtk_bmt_debug_bbt(void *data, u64 val)
-+{
-+	char buf[5];
-+	int i, k;
-+
-+	switch (val) {
-+	case 0:
-+		for (i = 0; i < bmtd.total_blks; i += 4) {
-+			u8 cur = bmtd.bbt_buf[i / 4];
-+
-+			for (k = 0; k < 4; k++, cur >>= 2)
-+				buf[k] = (cur & 3) ? 'B' : '.';
-+
-+			buf[4] = 0;
-+			printk("[%06x] %s\n", i * bmtd.blk_size, buf);
-+		}
-+		break;
-+	case 100:
-+#if 0
-+		for (i = bmtd.bmt_blk_idx; i < bmtd.total_blks - 1; i++)
-+			bbt_nand_erase(bmtd.bmt_blk_idx);
-+#endif
-+
-+		bmtd.bmt_blk_idx = bmtd.total_blks - 1;
-+		bbt_nand_erase(bmtd.bmt_blk_idx);
-+		write_bmt(bmtd.bmt_blk_idx, bmtd.bbt_buf);
-+		break;
-+	default:
-+		break;
-+	}
-+	return 0;
-+}
-+
-+const struct mtk_bmt_ops mtk_bmt_bbt_ops = {
-+	.sig = "mtknand",
-+	.sig_len = 7,
-+	.init = mtk_bmt_init_bbt,
-+	.remap_block = remap_block_bbt,
-+	.unmap_block = unmap_block_bbt,
-+	.get_mapping_block = get_mapping_block_index_bbt,
-+	.debug = mtk_bmt_debug_bbt,
-+};
-diff --git a/target/linux/ramips/files/drivers/mtd/nand/mtk_bmt_nmbm.c b/target/linux/ramips/files/drivers/mtd/nand/mtk_bmt_nmbm.c
-new file mode 100644
-index 0000000000..a896e49ec0
---- /dev/null
-+++ b/target/linux/ramips/files/drivers/mtd/nand/mtk_bmt_nmbm.c
-@@ -0,0 +1,2348 @@
-+#include <linux/crc32.h>
-+#include <linux/slab.h>
-+#include "mtk_bmt.h"
-+
-+#define nlog_err(ni, ...) printk(KERN_ERR __VA_ARGS__)
-+#define nlog_info(ni, ...) printk(KERN_INFO __VA_ARGS__)
-+#define nlog_debug(ni, ...) printk(KERN_INFO __VA_ARGS__)
-+#define nlog_warn(ni, ...) printk(KERN_WARNING __VA_ARGS__)
-+
-+#define NMBM_MAGIC_SIGNATURE			0x304d4d4e	/* NMM0 */
-+#define NMBM_MAGIC_INFO_TABLE			0x314d4d4e	/* NMM1 */
-+
-+#define NMBM_VERSION_MAJOR_S			0
-+#define NMBM_VERSION_MAJOR_M			0xffff
-+#define NMBM_VERSION_MINOR_S			16
-+#define NMBM_VERSION_MINOR_M			0xffff
-+#define NMBM_VERSION_MAKE(major, minor)		(((major) & NMBM_VERSION_MAJOR_M) | \
-+						(((minor) & NMBM_VERSION_MINOR_M) << \
-+						NMBM_VERSION_MINOR_S))
-+#define NMBM_VERSION_MAJOR_GET(ver)		(((ver) >> NMBM_VERSION_MAJOR_S) & \
-+						NMBM_VERSION_MAJOR_M)
-+#define NMBM_VERSION_MINOR_GET(ver)		(((ver) >> NMBM_VERSION_MINOR_S) & \
-+						NMBM_VERSION_MINOR_M)
-+
-+#define NMBM_BITMAP_UNIT_SIZE			(sizeof(u32))
-+#define NMBM_BITMAP_BITS_PER_BLOCK		2
-+#define NMBM_BITMAP_BITS_PER_UNIT		(8 * sizeof(u32))
-+#define NMBM_BITMAP_BLOCKS_PER_UNIT		(NMBM_BITMAP_BITS_PER_UNIT / \
-+						 NMBM_BITMAP_BITS_PER_BLOCK)
-+
-+#define NMBM_SPARE_BLOCK_MULTI			1
-+#define NMBM_SPARE_BLOCK_DIV			2
-+#define NMBM_SPARE_BLOCK_MIN			2
-+
-+#define NMBM_MGMT_DIV				16
-+#define NMBM_MGMT_BLOCKS_MIN			32
-+
-+#define NMBM_TRY_COUNT				3
-+
-+#define BLOCK_ST_BAD				0
-+#define BLOCK_ST_NEED_REMAP			2
-+#define BLOCK_ST_GOOD				3
-+#define BLOCK_ST_MASK				3
-+
-+#define NMBM_VER_MAJOR			1
-+#define NMBM_VER_MINOR			0
-+#define NMBM_VER			NMBM_VERSION_MAKE(NMBM_VER_MAJOR, \
-+							  NMBM_VER_MINOR)
-+
-+struct nmbm_header {
-+	u32 magic;
-+	u32 version;
-+	u32 size;
-+	u32 checksum;
-+};
-+
-+struct nmbm_signature {
-+	struct nmbm_header header;
-+	uint64_t nand_size;
-+	u32 block_size;
-+	u32 page_size;
-+	u32 spare_size;
-+	u32 mgmt_start_pb;
-+	u8 max_try_count;
-+	u8 padding[3];
-+};
-+
-+struct nmbm_info_table_header {
-+	struct nmbm_header header;
-+	u32 write_count;
-+	u32 state_table_off;
-+	u32 mapping_table_off;
-+	u32 padding;
-+};
-+
-+struct nmbm_instance {
-+	u32 rawpage_size;
-+	u32 rawblock_size;
-+	u32 rawchip_size;
-+
-+	struct nmbm_signature signature;
-+
-+	u8 *info_table_cache;
-+	u32 info_table_size;
-+	u32 info_table_spare_blocks;
-+	struct nmbm_info_table_header info_table;
-+
-+	u32 *block_state;
-+	u32 block_state_changed;
-+	u32 state_table_size;
-+
-+	int32_t *block_mapping;
-+	u32 block_mapping_changed;
-+	u32 mapping_table_size;
-+
-+	u8 *page_cache;
-+
-+	int protected;
-+
-+	u32 block_count;
-+	u32 data_block_count;
-+
-+	u32 mgmt_start_ba;
-+	u32 main_table_ba;
-+	u32 backup_table_ba;
-+	u32 mapping_blocks_ba;
-+	u32 mapping_blocks_top_ba;
-+	u32 signature_ba;
-+
-+	u32 max_ratio;
-+	u32 max_reserved_blocks;
-+	bool empty_page_ecc_ok;
-+	bool force_create;
-+};
-+
-+static inline u32 nmbm_crc32(u32 crcval, const void *buf, size_t size)
-+{
-+	unsigned int chksz;
-+	const unsigned char *p = buf;
-+
-+	while (size) {
-+		if (size > UINT_MAX)
-+			chksz = UINT_MAX;
-+		else
-+			chksz = (uint)size;
-+
-+		crcval = crc32_le(crcval, p, chksz);
-+		size -= chksz;
-+		p += chksz;
-+	}
-+
-+	return crcval;
-+}
-+/*
-+ * nlog_table_creation - Print log of table creation event
-+ * @ni: NMBM instance structure
-+ * @main_table: whether the table is main info table
-+ * @start_ba: start block address of the table
-+ * @end_ba: block address after the end of the table
-+ */
-+static void nlog_table_creation(struct nmbm_instance *ni, bool main_table,
-+			       uint32_t start_ba, uint32_t end_ba)
-+{
-+	if (start_ba == end_ba - 1)
-+		nlog_info(ni, "%s info table has been written to block %u\n",
-+			 main_table ? "Main" : "Backup", start_ba);
-+	else
-+		nlog_info(ni, "%s info table has been written to block %u-%u\n",
-+			 main_table ? "Main" : "Backup", start_ba, end_ba - 1);
-+}
-+
-+/*
-+ * nlog_table_update - Print log of table update event
-+ * @ni: NMBM instance structure
-+ * @main_table: whether the table is main info table
-+ * @start_ba: start block address of the table
-+ * @end_ba: block address after the end of the table
-+ */
-+static void nlog_table_update(struct nmbm_instance *ni, bool main_table,
-+			     uint32_t start_ba, uint32_t end_ba)
-+{
-+	if (start_ba == end_ba - 1)
-+		nlog_debug(ni, "%s info table has been updated in block %u\n",
-+			  main_table ? "Main" : "Backup", start_ba);
-+	else
-+		nlog_debug(ni, "%s info table has been updated in block %u-%u\n",
-+			  main_table ? "Main" : "Backup", start_ba, end_ba - 1);
-+}
-+
-+/*
-+ * nlog_table_found - Print log of table found event
-+ * @ni: NMBM instance structure
-+ * @first_table: whether the table is first found info table
-+ * @write_count: write count of the info table
-+ * @start_ba: start block address of the table
-+ * @end_ba: block address after the end of the table
-+ */
-+static void nlog_table_found(struct nmbm_instance *ni, bool first_table,
-+			    uint32_t write_count, uint32_t start_ba,
-+			    uint32_t end_ba)
-+{
-+	if (start_ba == end_ba - 1)
-+		nlog_info(ni, "%s info table with writecount %u found in block %u\n",
-+			 first_table ? "First" : "Second", write_count,
-+			 start_ba);
-+	else
-+		nlog_info(ni, "%s info table with writecount %u found in block %u-%u\n",
-+			 first_table ? "First" : "Second", write_count,
-+			 start_ba, end_ba - 1);
-+}
-+
-+/*****************************************************************************/
-+/* Address conversion functions */
-+/*****************************************************************************/
-+
-+/*
-+ * ba2addr - Convert a block address to linear address
-+ * @ni: NMBM instance structure
-+ * @ba: Block address
-+ */
-+static uint64_t ba2addr(struct nmbm_instance *ni, uint32_t ba)
-+{
-+	return (uint64_t)ba << bmtd.blk_shift;
-+}
-+/*
-+ * size2blk - Get minimum required blocks for storing specific size of data
-+ * @ni: NMBM instance structure
-+ * @size: size for storing
-+ */
-+static uint32_t size2blk(struct nmbm_instance *ni, uint64_t size)
-+{
-+	return (size + bmtd.blk_size - 1) >> bmtd.blk_shift;
-+}
-+
-+/*****************************************************************************/
-+/* High level NAND chip APIs */
-+/*****************************************************************************/
-+
-+/*
-+ * nmbm_read_phys_page - Read page with retry
-+ * @ni: NMBM instance structure
-+ * @addr: linear address where the data will be read from
-+ * @data: the main data to be read
-+ * @oob: the oob data to be read
-+ *
-+ * Read a page for at most NMBM_TRY_COUNT times.
-+ *
-+ * Return 0 for success, positive value for corrected bitflip count,
-+ * -EBADMSG for ecc error, other negative values for other errors
-+ */
-+static int nmbm_read_phys_page(struct nmbm_instance *ni, uint64_t addr,
-+			       void *data, void *oob)
-+{
-+	int tries, ret;
-+
-+	for (tries = 0; tries < NMBM_TRY_COUNT; tries++) {
-+		struct mtd_oob_ops ops = {
-+			.mode = MTD_OPS_PLACE_OOB,
-+			.oobbuf = oob,
-+			.datbuf = data,
-+		};
-+
-+		if (data)
-+			ops.len = bmtd.pg_size;
-+		if (oob)
-+			ops.ooblen = mtd_oobavail(bmtd.mtd, &ops);
-+
-+		ret = bmtd._read_oob(bmtd.mtd, addr, &ops);
-+		if (ret == -EUCLEAN)
-+			return min_t(u32, bmtd.mtd->bitflip_threshold + 1,
-+				     bmtd.mtd->ecc_strength);
-+		if (ret >= 0)
-+			return 0;
-+	}
-+
-+	if (ret != -EBADMSG)
-+		nlog_err(ni, "Page read failed at address 0x%08llx\n", addr);
-+
-+	return ret;
-+}
-+
-+/*
-+ * nmbm_write_phys_page - Write page with retry
-+ * @ni: NMBM instance structure
-+ * @addr: linear address where the data will be written to
-+ * @data: the main data to be written
-+ * @oob: the oob data to be written
-+ *
-+ * Write a page for at most NMBM_TRY_COUNT times.
-+ */
-+static bool nmbm_write_phys_page(struct nmbm_instance *ni, uint64_t addr,
-+				 const void *data, const void *oob)
-+{
-+	int tries, ret;
-+
-+	for (tries = 0; tries < NMBM_TRY_COUNT; tries++) {
-+		struct mtd_oob_ops ops = {
-+			.mode = MTD_OPS_PLACE_OOB,
-+			.oobbuf = (void *)oob,
-+			.datbuf = (void *)data,
-+		};
-+
-+		if (data)
-+			ops.len = bmtd.pg_size;
-+		if (oob)
-+			ops.ooblen = mtd_oobavail(bmtd.mtd, &ops);
-+
-+		ret = bmtd._write_oob(bmtd.mtd, addr, &ops);
-+		if (!ret)
-+			return true;
-+	}
-+
-+	nlog_err(ni, "Page write failed at address 0x%08llx\n", addr);
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_erase_phys_block - Erase a block with retry
-+ * @ni: NMBM instance structure
-+ * @addr: Linear address
-+ *
-+ * Erase a block for at most NMBM_TRY_COUNT times.
-+ */
-+static bool nmbm_erase_phys_block(struct nmbm_instance *ni, uint64_t addr)
-+{
-+	int tries, ret;
-+
-+	for (tries = 0; tries < NMBM_TRY_COUNT; tries++) {
-+		struct erase_info ei = {
-+			.addr = addr,
-+			.len = bmtd.mtd->erasesize,
-+		};
-+
-+		ret = bmtd._erase(bmtd.mtd, &ei);
-+		if (!ret)
-+			return true;
-+	}
-+
-+	nlog_err(ni, "Block erasure failed at address 0x%08llx\n", addr);
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_check_bad_phys_block - Check whether a block is marked bad in OOB
-+ * @ni: NMBM instance structure
-+ * @ba: block address
-+ */
-+static bool nmbm_check_bad_phys_block(struct nmbm_instance *ni, uint32_t ba)
-+{
-+	uint64_t addr = ba2addr(ni, ba);
-+
-+	return bmtd._block_isbad(bmtd.mtd, addr);
-+}
-+
-+/*
-+ * nmbm_mark_phys_bad_block - Mark a block bad
-+ * @ni: NMBM instance structure
-+ * @addr: Linear address
-+ */
-+static int nmbm_mark_phys_bad_block(struct nmbm_instance *ni, uint32_t ba)
-+{
-+	uint64_t addr = ba2addr(ni, ba);
-+
-+	nlog_info(ni, "Block %u [0x%08llx] will be marked bad\n", ba, addr);
-+
-+	return bmtd._block_markbad(bmtd.mtd, addr);
-+}
-+
-+/*****************************************************************************/
-+/* NMBM related functions */
-+/*****************************************************************************/
-+
-+/*
-+ * nmbm_check_header - Check whether a NMBM structure is valid
-+ * @data: pointer to a NMBM structure with a NMBM header at beginning
-+ * @size: Size of the buffer pointed by @header
-+ *
-+ * The size of the NMBM structure may be larger than NMBM header,
-+ * e.g. block mapping table and block state table.
-+ */
-+static bool nmbm_check_header(const void *data, uint32_t size)
-+{
-+	const struct nmbm_header *header = data;
-+	struct nmbm_header nhdr;
-+	uint32_t new_checksum;
-+
-+	/*
-+	 * Make sure expected structure size is equal or smaller than
-+	 * buffer size.
-+	 */
-+	if (header->size > size)
-+		return false;
-+
-+	memcpy(&nhdr, data, sizeof(nhdr));
-+
-+	nhdr.checksum = 0;
-+	new_checksum = nmbm_crc32(0, &nhdr, sizeof(nhdr));
-+	if (header->size > sizeof(nhdr))
-+		new_checksum = nmbm_crc32(new_checksum,
-+			(const uint8_t *)data + sizeof(nhdr),
-+			header->size - sizeof(nhdr));
-+
-+	if (header->checksum != new_checksum)
-+		return false;
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_update_checksum - Update checksum of a NMBM structure
-+ * @header: pointer to a NMBM structure with a NMBM header at beginning
-+ *
-+ * The size of the NMBM structure must be specified by @header->size
-+ */
-+static void nmbm_update_checksum(struct nmbm_header *header)
-+{
-+	header->checksum = 0;
-+	header->checksum = nmbm_crc32(0, header, header->size);
-+}
-+
-+/*
-+ * nmbm_get_spare_block_count - Calculate number of blocks should be reserved
-+ * @block_count: number of blocks of data
-+ *
-+ * Calculate number of blocks should be reserved for data
-+ */
-+static uint32_t nmbm_get_spare_block_count(uint32_t block_count)
-+{
-+	uint32_t val;
-+
-+	val = (block_count + NMBM_SPARE_BLOCK_DIV / 2) / NMBM_SPARE_BLOCK_DIV;
-+	val *= NMBM_SPARE_BLOCK_MULTI;
-+
-+	if (val < NMBM_SPARE_BLOCK_MIN)
-+		val = NMBM_SPARE_BLOCK_MIN;
-+
-+	return val;
-+}
-+
-+/*
-+ * nmbm_get_block_state_raw - Get state of a block from raw block state table
-+ * @block_state: pointer to raw block state table (bitmap)
-+ * @ba: block address
-+ */
-+static uint32_t nmbm_get_block_state_raw(u32 *block_state,
-+					 uint32_t ba)
-+{
-+	uint32_t unit, shift;
-+
-+	unit = ba / NMBM_BITMAP_BLOCKS_PER_UNIT;
-+	shift = (ba % NMBM_BITMAP_BLOCKS_PER_UNIT) * NMBM_BITMAP_BITS_PER_BLOCK;
-+
-+	return (block_state[unit] >> shift) & BLOCK_ST_MASK;
-+}
-+
-+/*
-+ * nmbm_get_block_state - Get state of a block from block state table
-+ * @ni: NMBM instance structure
-+ * @ba: block address
-+ */
-+static uint32_t nmbm_get_block_state(struct nmbm_instance *ni, uint32_t ba)
-+{
-+	return nmbm_get_block_state_raw(ni->block_state, ba);
-+}
-+
-+/*
-+ * nmbm_set_block_state - Set state of a block to block state table
-+ * @ni: NMBM instance structure
-+ * @ba: block address
-+ * @state: block state
-+ *
-+ * Set state of a block. If the block state changed, ni->block_state_changed
-+ * will be increased.
-+ */
-+static bool nmbm_set_block_state(struct nmbm_instance *ni, uint32_t ba,
-+				 uint32_t state)
-+{
-+	uint32_t unit, shift, orig;
-+	u32 uv;
-+
-+	unit = ba / NMBM_BITMAP_BLOCKS_PER_UNIT;
-+	shift = (ba % NMBM_BITMAP_BLOCKS_PER_UNIT) * NMBM_BITMAP_BITS_PER_BLOCK;
-+
-+	orig = (ni->block_state[unit] >> shift) & BLOCK_ST_MASK;
-+	state &= BLOCK_ST_MASK;
-+
-+	uv = ni->block_state[unit] & (~(BLOCK_ST_MASK << shift));
-+	uv |= state << shift;
-+	ni->block_state[unit] = uv;
-+
-+	if (orig != state) {
-+		ni->block_state_changed++;
-+		return true;
-+	}
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_block_walk_asc - Skip specified number of good blocks, ascending addr.
-+ * @ni: NMBM instance structure
-+ * @ba: start physical block address
-+ * @nba: return physical block address after walk
-+ * @count: number of good blocks to be skipped
-+ * @limit: highest block address allowed for walking
-+ *
-+ * Start from @ba, skipping any bad blocks, counting @count good blocks, and
-+ * return the next good block address.
-+ *
-+ * If no enough good blocks counted while @limit reached, false will be returned.
-+ *
-+ * If @count == 0, nearest good block address will be returned.
-+ * @limit is not counted in walking.
-+ */
-+static bool nmbm_block_walk_asc(struct nmbm_instance *ni, uint32_t ba,
-+				uint32_t *nba, uint32_t count,
-+				uint32_t limit)
-+{
-+	int32_t nblock = count;
-+
-+	if (limit >= ni->block_count)
-+		limit = ni->block_count - 1;
-+
-+	while (ba < limit) {
-+		if (nmbm_get_block_state(ni, ba) == BLOCK_ST_GOOD)
-+			nblock--;
-+
-+		if (nblock < 0) {
-+			*nba = ba;
-+			return true;
-+		}
-+
-+		ba++;
-+	}
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_block_walk_desc - Skip specified number of good blocks, descending addr
-+ * @ni: NMBM instance structure
-+ * @ba: start physical block address
-+ * @nba: return physical block address after walk
-+ * @count: number of good blocks to be skipped
-+ * @limit: lowest block address allowed for walking
-+ *
-+ * Start from @ba, skipping any bad blocks, counting @count good blocks, and
-+ * return the next good block address.
-+ *
-+ * If no enough good blocks counted while @limit reached, false will be returned.
-+ *
-+ * If @count == 0, nearest good block address will be returned.
-+ * @limit is not counted in walking.
-+ */
-+static bool nmbm_block_walk_desc(struct nmbm_instance *ni, uint32_t ba,
-+				 uint32_t *nba, uint32_t count, uint32_t limit)
-+{
-+	int32_t nblock = count;
-+
-+	if (limit >= ni->block_count)
-+		limit = ni->block_count - 1;
-+
-+	while (ba > limit) {
-+		if (nmbm_get_block_state(ni, ba) == BLOCK_ST_GOOD)
-+			nblock--;
-+
-+		if (nblock < 0) {
-+			*nba = ba;
-+			return true;
-+		}
-+
-+		ba--;
-+	}
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_block_walk - Skip specified number of good blocks from curr. block addr
-+ * @ni: NMBM instance structure
-+ * @ascending: whether to walk ascending
-+ * @ba: start physical block address
-+ * @nba: return physical block address after walk
-+ * @count: number of good blocks to be skipped
-+ * @limit: highest/lowest block address allowed for walking
-+ *
-+ * Start from @ba, skipping any bad blocks, counting @count good blocks, and
-+ * return the next good block address.
-+ *
-+ * If no enough good blocks counted while @limit reached, false will be returned.
-+ *
-+ * If @count == 0, nearest good block address will be returned.
-+ * @limit can be set to negative if no limit required.
-+ * @limit is not counted in walking.
-+ */
-+static bool nmbm_block_walk(struct nmbm_instance *ni, bool ascending,
-+			    uint32_t ba, uint32_t *nba, int32_t count,
-+			    int32_t limit)
-+{
-+	if (ascending)
-+		return nmbm_block_walk_asc(ni, ba, nba, count, limit);
-+
-+	return nmbm_block_walk_desc(ni, ba, nba, count, limit);
-+}
-+
-+/*
-+ * nmbm_scan_badblocks - Scan and record all bad blocks
-+ * @ni: NMBM instance structure
-+ *
-+ * Scan the entire lower NAND chip and record all bad blocks in to block state
-+ * table.
-+ */
-+static void nmbm_scan_badblocks(struct nmbm_instance *ni)
-+{
-+	uint32_t ba;
-+
-+	for (ba = 0; ba < ni->block_count; ba++) {
-+		if (nmbm_check_bad_phys_block(ni, ba)) {
-+			nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+			nlog_info(ni, "Bad block %u [0x%08llx]\n", ba,
-+				 ba2addr(ni, ba));
-+		}
-+	}
-+}
-+
-+/*
-+ * nmbm_build_mapping_table - Build initial block mapping table
-+ * @ni: NMBM instance structure
-+ *
-+ * The initial mapping table will be compatible with the stratage of
-+ * factory production.
-+ */
-+static void nmbm_build_mapping_table(struct nmbm_instance *ni)
-+{
-+	uint32_t pb, lb;
-+
-+	for (pb = 0, lb = 0; pb < ni->mgmt_start_ba; pb++) {
-+		if (nmbm_get_block_state(ni, pb) == BLOCK_ST_BAD)
-+			continue;
-+
-+		/* Always map to the next good block */
-+		ni->block_mapping[lb++] = pb;
-+	}
-+
-+	ni->data_block_count = lb;
-+
-+	/* Unusable/Management blocks */
-+	for (pb = lb; pb < ni->block_count; pb++)
-+		ni->block_mapping[pb] = -1;
-+}
-+
-+/*
-+ * nmbm_erase_block_and_check - Erase a block and check its usability
-+ * @ni: NMBM instance structure
-+ * @ba: block address to be erased
-+ *
-+ * Erase a block anc check its usability
-+ *
-+ * Return true if the block is usable, false if erasure failure or the block
-+ * has too many bitflips.
-+ */
-+static bool nmbm_erase_block_and_check(struct nmbm_instance *ni, uint32_t ba)
-+{
-+	uint64_t addr, off;
-+	bool success;
-+	int ret;
-+
-+	success = nmbm_erase_phys_block(ni, ba2addr(ni, ba));
-+	if (!success)
-+		return false;
-+
-+	if (!ni->empty_page_ecc_ok)
-+		return true;
-+
-+	/* Check every page to make sure there aren't too many bitflips */
-+
-+	addr = ba2addr(ni, ba);
-+
-+	for (off = 0; off < bmtd.blk_size; off += bmtd.pg_size) {
-+		ret = nmbm_read_phys_page(ni, addr + off, ni->page_cache, NULL);
-+		if (ret == -EBADMSG) {
-+			/*
-+			 * empty_page_ecc_ok means the empty page is
-+			 * still protected by ECC. So reading pages with ECC
-+			 * enabled and -EBADMSG means there are too many
-+			 * bitflips that can't be recovered, and the block
-+			 * containing the page should be marked bad.
-+			 */
-+			nlog_err(ni,
-+				 "Too many bitflips in empty page at 0x%llx\n",
-+				 addr + off);
-+			return false;
-+		}
-+	}
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_erase_range - Erase a range of blocks
-+ * @ni: NMBM instance structure
-+ * @ba: block address where the erasure will start
-+ * @limit: top block address allowed for erasure
-+ *
-+ * Erase blocks within the specific range. Newly-found bad blocks will be
-+ * marked.
-+ *
-+ * @limit is not counted into the allowed erasure address.
-+ */
-+static void nmbm_erase_range(struct nmbm_instance *ni, uint32_t ba,
-+			     uint32_t limit)
-+{
-+	bool success;
-+
-+	while (ba < limit) {
-+		if (nmbm_get_block_state(ni, ba) != BLOCK_ST_GOOD)
-+			goto next_block;
-+
-+		/* Insurance to detect unexpected bad block marked by user */
-+		if (nmbm_check_bad_phys_block(ni, ba)) {
-+			nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+			goto next_block;
-+		}
-+
-+		success = nmbm_erase_block_and_check(ni, ba);
-+		if (success)
-+			goto next_block;
-+
-+		nmbm_mark_phys_bad_block(ni, ba);
-+		nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+
-+	next_block:
-+		ba++;
-+	}
-+}
-+
-+/*
-+ * nmbm_write_repeated_data - Write critical data to a block with retry
-+ * @ni: NMBM instance structure
-+ * @ba: block address where the data will be written to
-+ * @data: the data to be written
-+ * @size: size of the data
-+ *
-+ * Write data to every page of the block. Success only if all pages within
-+ * this block have been successfully written.
-+ *
-+ * Make sure data size is not bigger than one page.
-+ *
-+ * This function will write and verify every page for at most
-+ * NMBM_TRY_COUNT times.
-+ */
-+static bool nmbm_write_repeated_data(struct nmbm_instance *ni, uint32_t ba,
-+				     const void *data, uint32_t size)
-+{
-+	uint64_t addr, off;
-+	bool success;
-+	int ret;
-+
-+	if (size > bmtd.pg_size)
-+		return false;
-+
-+	addr = ba2addr(ni, ba);
-+
-+	for (off = 0; off < bmtd.blk_size; off += bmtd.pg_size) {
-+		/* Prepare page data. fill 0xff to unused region */
-+		memcpy(ni->page_cache, data, size);
-+		memset(ni->page_cache + size, 0xff, ni->rawpage_size - size);
-+
-+		success = nmbm_write_phys_page(ni, addr + off, ni->page_cache, NULL);
-+		if (!success)
-+			return false;
-+
-+		/* Verify the data just written. ECC error indicates failure */
-+		ret = nmbm_read_phys_page(ni, addr + off, ni->page_cache, NULL);
-+		if (ret < 0)
-+			return false;
-+
-+		if (memcmp(ni->page_cache, data, size))
-+			return false;
-+	}
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_write_signature - Write signature to NAND chip
-+ * @ni: NMBM instance structure
-+ * @limit: top block address allowed for writing
-+ * @signature: the signature to be written
-+ * @signature_ba: the actual block address where signature is written to
-+ *
-+ * Write signature within a specific range, from chip bottom to limit.
-+ * At most one block will be written.
-+ *
-+ * @limit is not counted into the allowed write address.
-+ */
-+static bool nmbm_write_signature(struct nmbm_instance *ni, uint32_t limit,
-+				 const struct nmbm_signature *signature,
-+				 uint32_t *signature_ba)
-+{
-+	uint32_t ba = ni->block_count - 1;
-+	bool success;
-+
-+	while (ba > limit) {
-+		if (nmbm_get_block_state(ni, ba) != BLOCK_ST_GOOD)
-+			goto next_block;
-+
-+		/* Insurance to detect unexpected bad block marked by user */
-+		if (nmbm_check_bad_phys_block(ni, ba)) {
-+			nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+			goto next_block;
-+		}
-+
-+		success = nmbm_erase_block_and_check(ni, ba);
-+		if (!success)
-+			goto skip_bad_block;
-+
-+		success = nmbm_write_repeated_data(ni, ba, signature,
-+						   sizeof(*signature));
-+		if (success) {
-+			*signature_ba = ba;
-+			return true;
-+		}
-+
-+	skip_bad_block:
-+		nmbm_mark_phys_bad_block(ni, ba);
-+		nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+
-+	next_block:
-+		ba--;
-+	};
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbn_read_data - Read data
-+ * @ni: NMBM instance structure
-+ * @addr: linear address where the data will be read from
-+ * @data: the data to be read
-+ * @size: the size of data
-+ *
-+ * Read data range.
-+ * Every page will be tried for at most NMBM_TRY_COUNT times.
-+ *
-+ * Return 0 for success, positive value for corrected bitflip count,
-+ * -EBADMSG for ecc error, other negative values for other errors
-+ */
-+static int nmbn_read_data(struct nmbm_instance *ni, uint64_t addr, void *data,
-+			  uint32_t size)
-+{
-+	uint64_t off = addr;
-+	uint8_t *ptr = data;
-+	uint32_t sizeremain = size, chunksize, leading;
-+	int ret;
-+
-+	while (sizeremain) {
-+		leading = off & (bmtd.pg_size - 1);
-+		chunksize = bmtd.pg_size - leading;
-+		if (chunksize > sizeremain)
-+			chunksize = sizeremain;
-+
-+		if (chunksize == bmtd.pg_size) {
-+			ret = nmbm_read_phys_page(ni, off - leading, ptr, NULL);
-+			if (ret < 0)
-+				return ret;
-+		} else {
-+			ret = nmbm_read_phys_page(ni, off - leading,
-+						  ni->page_cache, NULL);
-+			if (ret < 0)
-+				return ret;
-+
-+			memcpy(ptr, ni->page_cache + leading, chunksize);
-+		}
-+
-+		off += chunksize;
-+		ptr += chunksize;
-+		sizeremain -= chunksize;
-+	}
-+
-+	return 0;
-+}
-+
-+/*
-+ * nmbn_write_verify_data - Write data with validation
-+ * @ni: NMBM instance structure
-+ * @addr: linear address where the data will be written to
-+ * @data: the data to be written
-+ * @size: the size of data
-+ *
-+ * Write data and verify.
-+ * Every page will be tried for at most NMBM_TRY_COUNT times.
-+ */
-+static bool nmbn_write_verify_data(struct nmbm_instance *ni, uint64_t addr,
-+				   const void *data, uint32_t size)
-+{
-+	uint64_t off = addr;
-+	const uint8_t *ptr = data;
-+	uint32_t sizeremain = size, chunksize, leading;
-+	bool success;
-+	int ret;
-+
-+	while (sizeremain) {
-+		leading = off & (bmtd.pg_size - 1);
-+		chunksize = bmtd.pg_size - leading;
-+		if (chunksize > sizeremain)
-+			chunksize = sizeremain;
-+
-+		/* Prepare page data. fill 0xff to unused region */
-+		memset(ni->page_cache, 0xff, ni->rawpage_size);
-+		memcpy(ni->page_cache + leading, ptr, chunksize);
-+
-+		success = nmbm_write_phys_page(ni, off - leading,
-+					       ni->page_cache, NULL);
-+		if (!success)
-+			return false;
-+
-+		/* Verify the data just written. ECC error indicates failure */
-+		ret = nmbm_read_phys_page(ni, off - leading, ni->page_cache, NULL);
-+		if (ret < 0)
-+			return false;
-+
-+		if (memcmp(ni->page_cache + leading, ptr, chunksize))
-+			return false;
-+
-+		off += chunksize;
-+		ptr += chunksize;
-+		sizeremain -= chunksize;
-+	}
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_write_mgmt_range - Write management data into NAND within a range
-+ * @ni: NMBM instance structure
-+ * @addr: preferred start block address for writing
-+ * @limit: highest block address allowed for writing
-+ * @data: the data to be written
-+ * @size: the size of data
-+ * @actual_start_ba: actual start block address of data
-+ * @actual_end_ba: block address after the end of data
-+ *
-+ * @limit is not counted into the allowed write address.
-+ */
-+static bool nmbm_write_mgmt_range(struct nmbm_instance *ni, uint32_t ba,
-+				  uint32_t limit, const void *data,
-+				  uint32_t size, uint32_t *actual_start_ba,
-+				  uint32_t *actual_end_ba)
-+{
-+	const uint8_t *ptr = data;
-+	uint32_t sizeremain = size, chunksize;
-+	bool success;
-+
-+	while (sizeremain && ba < limit) {
-+		chunksize = sizeremain;
-+		if (chunksize > bmtd.blk_size)
-+			chunksize = bmtd.blk_size;
-+
-+		if (nmbm_get_block_state(ni, ba) != BLOCK_ST_GOOD)
-+			goto next_block;
-+
-+		/* Insurance to detect unexpected bad block marked by user */
-+		if (nmbm_check_bad_phys_block(ni, ba)) {
-+			nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+			goto next_block;
-+		}
-+
-+		success = nmbm_erase_block_and_check(ni, ba);
-+		if (!success)
-+			goto skip_bad_block;
-+
-+		success = nmbn_write_verify_data(ni, ba2addr(ni, ba), ptr,
-+						 chunksize);
-+		if (!success)
-+			goto skip_bad_block;
-+
-+		if (sizeremain == size)
-+			*actual_start_ba = ba;
-+
-+		ptr += chunksize;
-+		sizeremain -= chunksize;
-+
-+		goto next_block;
-+
-+	skip_bad_block:
-+		nmbm_mark_phys_bad_block(ni, ba);
-+		nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+
-+	next_block:
-+		ba++;
-+	}
-+
-+	if (sizeremain)
-+		return false;
-+
-+	*actual_end_ba = ba;
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_generate_info_table_cache - Generate info table cache data
-+ * @ni: NMBM instance structure
-+ *
-+ * Generate info table cache data to be written into flash.
-+ */
-+static bool nmbm_generate_info_table_cache(struct nmbm_instance *ni)
-+{
-+	bool changed = false;
-+
-+	memset(ni->info_table_cache, 0xff, ni->info_table_size);
-+
-+	memcpy(ni->info_table_cache + ni->info_table.state_table_off,
-+	       ni->block_state, ni->state_table_size);
-+
-+	memcpy(ni->info_table_cache + ni->info_table.mapping_table_off,
-+		ni->block_mapping, ni->mapping_table_size);
-+
-+	ni->info_table.header.magic = NMBM_MAGIC_INFO_TABLE;
-+	ni->info_table.header.version = NMBM_VER;
-+	ni->info_table.header.size = ni->info_table_size;
-+
-+	if (ni->block_state_changed || ni->block_mapping_changed) {
-+		ni->info_table.write_count++;
-+		changed = true;
-+	}
-+
-+	memcpy(ni->info_table_cache, &ni->info_table, sizeof(ni->info_table));
-+
-+	nmbm_update_checksum((struct nmbm_header *)ni->info_table_cache);
-+
-+	return changed;
-+}
-+
-+/*
-+ * nmbm_write_info_table - Write info table into NAND within a range
-+ * @ni: NMBM instance structure
-+ * @ba: preferred start block address for writing
-+ * @limit: highest block address allowed for writing
-+ * @actual_start_ba: actual start block address of info table
-+ * @actual_end_ba: block address after the end of info table
-+ *
-+ * @limit is counted into the allowed write address.
-+ */
-+static bool nmbm_write_info_table(struct nmbm_instance *ni, uint32_t ba,
-+				  uint32_t limit, uint32_t *actual_start_ba,
-+				  uint32_t *actual_end_ba)
-+{
-+	return nmbm_write_mgmt_range(ni, ba, limit, ni->info_table_cache,
-+				     ni->info_table_size, actual_start_ba,
-+				     actual_end_ba);
-+}
-+
-+/*
-+ * nmbm_mark_tables_clean - Mark info table `clean'
-+ * @ni: NMBM instance structure
-+ */
-+static void nmbm_mark_tables_clean(struct nmbm_instance *ni)
-+{
-+	ni->block_state_changed = 0;
-+	ni->block_mapping_changed = 0;
-+}
-+
-+/*
-+ * nmbm_try_reserve_blocks - Reserve blocks with compromisation
-+ * @ni: NMBM instance structure
-+ * @ba: start physical block address
-+ * @nba: return physical block address after reservation
-+ * @count: number of good blocks to be skipped
-+ * @min_count: minimum number of good blocks to be skipped
-+ * @limit: highest/lowest block address allowed for walking
-+ *
-+ * Reserve specific blocks. If failed, try to reserve as many as possible.
-+ */
-+static bool nmbm_try_reserve_blocks(struct nmbm_instance *ni, uint32_t ba,
-+				    uint32_t *nba, uint32_t count,
-+				    int32_t min_count, int32_t limit)
-+{
-+	int32_t nblocks = count;
-+	bool success;
-+
-+	while (nblocks >= min_count) {
-+		success = nmbm_block_walk(ni, true, ba, nba, nblocks, limit);
-+		if (success)
-+			return true;
-+
-+		nblocks--;
-+	}
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_rebuild_info_table - Build main & backup info table from scratch
-+ * @ni: NMBM instance structure
-+ * @allow_no_gap: allow no spare blocks between two tables
-+ */
-+static bool nmbm_rebuild_info_table(struct nmbm_instance *ni)
-+{
-+	uint32_t table_start_ba, table_end_ba, next_start_ba;
-+	uint32_t main_table_end_ba;
-+	bool success;
-+
-+	/* Set initial value */
-+	ni->main_table_ba = 0;
-+	ni->backup_table_ba = 0;
-+	ni->mapping_blocks_ba = ni->mapping_blocks_top_ba;
-+
-+	/* Write main table */
-+	success = nmbm_write_info_table(ni, ni->mgmt_start_ba,
-+					ni->mapping_blocks_top_ba,
-+					&table_start_ba, &table_end_ba);
-+	if (!success) {
-+		/* Failed to write main table, data will be lost */
-+		nlog_err(ni, "Unable to write at least one info table!\n");
-+		nlog_err(ni, "Please save your data before power off!\n");
-+		ni->protected = 1;
-+		return false;
-+	}
-+
-+	/* Main info table is successfully written, record its offset */
-+	ni->main_table_ba = table_start_ba;
-+	main_table_end_ba = table_end_ba;
-+
-+	/* Adjust mapping_blocks_ba */
-+	ni->mapping_blocks_ba = table_end_ba;
-+
-+	nmbm_mark_tables_clean(ni);
-+
-+	nlog_table_creation(ni, true, table_start_ba, table_end_ba);
-+
-+	/* Reserve spare blocks for main info table. */
-+	success = nmbm_try_reserve_blocks(ni, table_end_ba,
-+					  &next_start_ba,
-+					  ni->info_table_spare_blocks, 0,
-+					  ni->mapping_blocks_top_ba -
-+					  size2blk(ni, ni->info_table_size));
-+	if (!success) {
-+		/* There is no spare block. */
-+		nlog_debug(ni, "No room for backup info table\n");
-+		return true;
-+	}
-+
-+	/* Write backup info table. */
-+	success = nmbm_write_info_table(ni, next_start_ba,
-+					ni->mapping_blocks_top_ba,
-+					&table_start_ba, &table_end_ba);
-+	if (!success) {
-+		/* There is no enough blocks for backup table. */
-+		nlog_debug(ni, "No room for backup info table\n");
-+		return true;
-+	}
-+
-+	/* Backup table is successfully written, record its offset */
-+	ni->backup_table_ba = table_start_ba;
-+
-+	/* Adjust mapping_blocks_off */
-+	ni->mapping_blocks_ba = table_end_ba;
-+
-+	/* Erase spare blocks of main table to clean possible interference data */
-+	nmbm_erase_range(ni, main_table_end_ba, ni->backup_table_ba);
-+
-+	nlog_table_creation(ni, false, table_start_ba, table_end_ba);
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_rescue_single_info_table - Rescue when there is only one info table
-+ * @ni: NMBM instance structure
-+ *
-+ * This function is called when there is only one info table exists.
-+ * This function may fail if we can't write new info table
-+ */
-+static bool nmbm_rescue_single_info_table(struct nmbm_instance *ni)
-+{
-+	uint32_t table_start_ba, table_end_ba, write_ba;
-+	bool success;
-+
-+	/* Try to write new info table in front of existing table */
-+	success = nmbm_write_info_table(ni, ni->mgmt_start_ba,
-+					ni->main_table_ba,
-+					&table_start_ba,
-+					&table_end_ba);
-+	if (success) {
-+		/*
-+		 * New table becomes the main table, existing table becomes
-+		 * the backup table.
-+		 */
-+		ni->backup_table_ba = ni->main_table_ba;
-+		ni->main_table_ba = table_start_ba;
-+
-+		nmbm_mark_tables_clean(ni);
-+
-+		/* Erase spare blocks of main table to clean possible interference data */
-+		nmbm_erase_range(ni, table_end_ba, ni->backup_table_ba);
-+
-+		nlog_table_creation(ni, true, table_start_ba, table_end_ba);
-+
-+		return true;
-+	}
-+
-+	/* Try to reserve spare blocks for existing table */
-+	success = nmbm_try_reserve_blocks(ni, ni->mapping_blocks_ba, &write_ba,
-+					  ni->info_table_spare_blocks, 0,
-+					  ni->mapping_blocks_top_ba -
-+					  size2blk(ni, ni->info_table_size));
-+	if (!success) {
-+		nlog_warn(ni, "Failed to rescue single info table\n");
-+		return false;
-+	}
-+
-+	/* Try to write new info table next to the existing table */
-+	while (write_ba >= ni->mapping_blocks_ba) {
-+		success = nmbm_write_info_table(ni, write_ba,
-+						ni->mapping_blocks_top_ba,
-+						&table_start_ba,
-+						&table_end_ba);
-+		if (success)
-+			break;
-+
-+		write_ba--;
-+	}
-+
-+	if (success) {
-+		/* Erase spare blocks of main table to clean possible interference data */
-+		nmbm_erase_range(ni, ni->mapping_blocks_ba, table_start_ba);
-+
-+		/* New table becomes the backup table */
-+		ni->backup_table_ba = table_start_ba;
-+		ni->mapping_blocks_ba = table_end_ba;
-+
-+		nmbm_mark_tables_clean(ni);
-+
-+		nlog_table_creation(ni, false, table_start_ba, table_end_ba);
-+
-+		return true;
-+	}
-+
-+	nlog_warn(ni, "Failed to rescue single info table\n");
-+	return false;
-+}
-+
-+/*
-+ * nmbm_update_single_info_table - Update specific one info table
-+ * @ni: NMBM instance structure
-+ */
-+static bool nmbm_update_single_info_table(struct nmbm_instance *ni,
-+					  bool update_main_table)
-+{
-+	uint32_t write_start_ba, write_limit, table_start_ba, table_end_ba;
-+	bool success;
-+
-+	/* Determine the write range */
-+	if (update_main_table) {
-+		write_start_ba = ni->main_table_ba;
-+		write_limit = ni->backup_table_ba;
-+	} else {
-+		write_start_ba = ni->backup_table_ba;
-+		write_limit = ni->mapping_blocks_top_ba;
-+	}
-+
-+	success = nmbm_write_info_table(ni, write_start_ba, write_limit,
-+					&table_start_ba, &table_end_ba);
-+	if (success) {
-+		if (update_main_table) {
-+			ni->main_table_ba = table_start_ba;
-+		} else {
-+			ni->backup_table_ba = table_start_ba;
-+			ni->mapping_blocks_ba = table_end_ba;
-+		}
-+
-+		nmbm_mark_tables_clean(ni);
-+
-+		nlog_table_update(ni, update_main_table, table_start_ba,
-+				 table_end_ba);
-+
-+		return true;
-+	}
-+
-+	if (update_main_table) {
-+		/*
-+		 * If failed to update main table, make backup table the new
-+		 * main table, and call nmbm_rescue_single_info_table()
-+		 */
-+		nlog_warn(ni, "Unable to update %s info table\n",
-+			 update_main_table ? "Main" : "Backup");
-+
-+		ni->main_table_ba = ni->backup_table_ba;
-+		ni->backup_table_ba = 0;
-+		return nmbm_rescue_single_info_table(ni);
-+	}
-+
-+	/* Only one table left */
-+	ni->mapping_blocks_ba = ni->backup_table_ba;
-+	ni->backup_table_ba = 0;
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_rescue_main_info_table - Rescue when failed to write main info table
-+ * @ni: NMBM instance structure
-+ *
-+ * This function is called when main info table failed to be written, and
-+ *    backup info table exists.
-+ */
-+static bool nmbm_rescue_main_info_table(struct nmbm_instance *ni)
-+{
-+	uint32_t tmp_table_start_ba, tmp_table_end_ba, main_table_start_ba;
-+	uint32_t main_table_end_ba, write_ba;
-+	uint32_t info_table_erasesize = size2blk(ni, ni->info_table_size);
-+	bool success;
-+
-+	/* Try to reserve spare blocks for existing backup info table */
-+	success = nmbm_try_reserve_blocks(ni, ni->mapping_blocks_ba, &write_ba,
-+					  ni->info_table_spare_blocks, 0,
-+					  ni->mapping_blocks_top_ba -
-+					  info_table_erasesize);
-+	if (!success) {
-+		/* There is no spare block. Backup info table becomes the main table. */
-+		nlog_err(ni, "No room for temporary info table\n");
-+		ni->main_table_ba = ni->backup_table_ba;
-+		ni->backup_table_ba = 0;
-+		return true;
-+	}
-+
-+	/* Try to write temporary info table into spare unmapped blocks */
-+	while (write_ba >= ni->mapping_blocks_ba) {
-+		success = nmbm_write_info_table(ni, write_ba,
-+						ni->mapping_blocks_top_ba,
-+						&tmp_table_start_ba,
-+						&tmp_table_end_ba);
-+		if (success)
-+			break;
-+
-+		write_ba--;
-+	}
-+
-+	if (!success) {
-+		/* Backup info table becomes the main table */
-+		nlog_err(ni, "Failed to update main info table\n");
-+		ni->main_table_ba = ni->backup_table_ba;
-+		ni->backup_table_ba = 0;
-+		return true;
-+	}
-+
-+	/* Adjust mapping_blocks_off */
-+	ni->mapping_blocks_ba = tmp_table_end_ba;
-+
-+	/*
-+	 * Now write main info table at the beginning of management area.
-+	 * This operation will generally destroy the original backup info
-+	 * table.
-+	 */
-+	success = nmbm_write_info_table(ni, ni->mgmt_start_ba,
-+					tmp_table_start_ba,
-+					&main_table_start_ba,
-+					&main_table_end_ba);
-+	if (!success) {
-+		/* Temporary info table becomes the main table */
-+		ni->main_table_ba = tmp_table_start_ba;
-+		ni->backup_table_ba = 0;
-+
-+		nmbm_mark_tables_clean(ni);
-+
-+		nlog_err(ni, "Failed to update main info table\n");
-+
-+		return true;
-+	}
-+
-+	/* Main info table has been successfully written, record its offset */
-+	ni->main_table_ba = main_table_start_ba;
-+
-+	nmbm_mark_tables_clean(ni);
-+
-+	nlog_table_creation(ni, true, main_table_start_ba, main_table_end_ba);
-+
-+	/*
-+	 * Temporary info table becomes the new backup info table if it's
-+	 * not overwritten.
-+	 */
-+	if (main_table_end_ba <= tmp_table_start_ba) {
-+		ni->backup_table_ba = tmp_table_start_ba;
-+
-+		nlog_table_creation(ni, false, tmp_table_start_ba,
-+				   tmp_table_end_ba);
-+
-+		return true;
-+	}
-+
-+	/* Adjust mapping_blocks_off */
-+	ni->mapping_blocks_ba = main_table_end_ba;
-+
-+	/* Try to reserve spare blocks for new main info table */
-+	success = nmbm_try_reserve_blocks(ni, main_table_end_ba, &write_ba,
-+					  ni->info_table_spare_blocks, 0,
-+					  ni->mapping_blocks_top_ba -
-+					  info_table_erasesize);
-+	if (!success) {
-+		/* There is no spare block. Only main table exists. */
-+		nlog_err(ni, "No room for backup info table\n");
-+		ni->backup_table_ba = 0;
-+		return true;
-+	}
-+
-+	/* Write new backup info table. */
-+	while (write_ba >= main_table_end_ba) {
-+		success = nmbm_write_info_table(ni, write_ba,
-+						ni->mapping_blocks_top_ba,
-+						&tmp_table_start_ba,
-+						&tmp_table_end_ba);
-+		if (success)
-+			break;
-+
-+		write_ba--;
-+	}
-+
-+	if (!success) {
-+		nlog_err(ni, "No room for backup info table\n");
-+		ni->backup_table_ba = 0;
-+		return true;
-+	}
-+
-+	/* Backup info table has been successfully written, record its offset */
-+	ni->backup_table_ba = tmp_table_start_ba;
-+
-+	/* Adjust mapping_blocks_off */
-+	ni->mapping_blocks_ba = tmp_table_end_ba;
-+
-+	/* Erase spare blocks of main table to clean possible interference data */
-+	nmbm_erase_range(ni, main_table_end_ba, ni->backup_table_ba);
-+
-+	nlog_table_creation(ni, false, tmp_table_start_ba, tmp_table_end_ba);
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_update_info_table_once - Update info table once
-+ * @ni: NMBM instance structure
-+ * @force: force update
-+ *
-+ * Update both main and backup info table. Return true if at least one info
-+ * table has been successfully written.
-+ * This function only try to update info table once regard less of the result.
-+ */
-+static bool nmbm_update_info_table_once(struct nmbm_instance *ni, bool force)
-+{
-+	uint32_t table_start_ba, table_end_ba;
-+	uint32_t main_table_limit;
-+	bool success;
-+
-+	/* Do nothing if there is no change */
-+	if (!nmbm_generate_info_table_cache(ni) && !force)
-+		return true;
-+
-+	/* Check whether both two tables exist */
-+	if (!ni->backup_table_ba) {
-+		main_table_limit = ni->mapping_blocks_top_ba;
-+		goto write_main_table;
-+	}
-+
-+	/*
-+	 * Write backup info table in its current range.
-+	 * Note that limit is set to mapping_blocks_top_off to provide as many
-+	 * spare blocks as possible for the backup table. If at last
-+	 * unmapped blocks are used by backup table, mapping_blocks_off will
-+	 * be adjusted.
-+	 */
-+	success = nmbm_write_info_table(ni, ni->backup_table_ba,
-+					ni->mapping_blocks_top_ba,
-+					&table_start_ba, &table_end_ba);
-+	if (!success) {
-+		/*
-+		 * There is nothing to do if failed to write backup table.
-+		 * Write the main table now.
-+		 */
-+		nlog_err(ni, "No room for backup table\n");
-+		ni->mapping_blocks_ba = ni->backup_table_ba;
-+		ni->backup_table_ba = 0;
-+		main_table_limit = ni->mapping_blocks_top_ba;
-+		goto write_main_table;
-+	}
-+
-+	/* Backup table is successfully written, record its offset */
-+	ni->backup_table_ba = table_start_ba;
-+
-+	/* Adjust mapping_blocks_off */
-+	ni->mapping_blocks_ba = table_end_ba;
-+
-+	nmbm_mark_tables_clean(ni);
-+
-+	/* The normal limit of main table */
-+	main_table_limit = ni->backup_table_ba;
-+
-+	nlog_table_update(ni, false, table_start_ba, table_end_ba);
-+
-+write_main_table:
-+	if (!ni->main_table_ba)
-+		goto rebuild_tables;
-+
-+	/* Write main info table in its current range */
-+	success = nmbm_write_info_table(ni, ni->main_table_ba,
-+					main_table_limit, &table_start_ba,
-+					&table_end_ba);
-+	if (!success) {
-+		/* If failed to write main table, go rescue procedure */
-+		if (!ni->backup_table_ba)
-+			goto rebuild_tables;
-+
-+		return nmbm_rescue_main_info_table(ni);
-+	}
-+
-+	/* Main info table is successfully written, record its offset */
-+	ni->main_table_ba = table_start_ba;
-+
-+	/* Adjust mapping_blocks_off */
-+	if (!ni->backup_table_ba)
-+		ni->mapping_blocks_ba = table_end_ba;
-+
-+	nmbm_mark_tables_clean(ni);
-+
-+	nlog_table_update(ni, true, table_start_ba, table_end_ba);
-+
-+	return true;
-+
-+rebuild_tables:
-+	return nmbm_rebuild_info_table(ni);
-+}
-+
-+/*
-+ * nmbm_update_info_table - Update info table
-+ * @ni: NMBM instance structure
-+ *
-+ * Update both main and backup info table. Return true if at least one table
-+ * has been successfully written.
-+ * This function will try to update info table repeatedly until no new bad
-+ * block found during updating.
-+ */
-+static bool nmbm_update_info_table(struct nmbm_instance *ni)
-+{
-+	bool success;
-+
-+	if (ni->protected)
-+		return true;
-+
-+	while (ni->block_state_changed || ni->block_mapping_changed) {
-+		success = nmbm_update_info_table_once(ni, false);
-+		if (!success) {
-+			nlog_err(ni, "Failed to update info table\n");
-+			return false;
-+		}
-+	}
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_map_block - Map a bad block to a unused spare block
-+ * @ni: NMBM instance structure
-+ * @lb: logic block addr to map
-+ */
-+static bool nmbm_map_block(struct nmbm_instance *ni, uint32_t lb)
-+{
-+	uint32_t pb;
-+	bool success;
-+
-+	if (ni->mapping_blocks_ba == ni->mapping_blocks_top_ba) {
-+		nlog_warn(ni, "No spare unmapped blocks.\n");
-+		return false;
-+	}
-+
-+	success = nmbm_block_walk(ni, false, ni->mapping_blocks_top_ba, &pb, 0,
-+				  ni->mapping_blocks_ba);
-+	if (!success) {
-+		nlog_warn(ni, "No spare unmapped blocks.\n");
-+		nmbm_update_info_table(ni);
-+		ni->mapping_blocks_top_ba = ni->mapping_blocks_ba;
-+		return false;
-+	}
-+
-+	ni->block_mapping[lb] = pb;
-+	ni->mapping_blocks_top_ba--;
-+	ni->block_mapping_changed++;
-+
-+	nlog_info(ni, "Logic block %u mapped to physical block %u\n", lb, pb);
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_create_info_table - Create info table(s)
-+ * @ni: NMBM instance structure
-+ *
-+ * This function assumes that the chip has no existing info table(s)
-+ */
-+static bool nmbm_create_info_table(struct nmbm_instance *ni)
-+{
-+	uint32_t lb;
-+	bool success;
-+
-+	/* Set initial mapping_blocks_top_off  */
-+	success = nmbm_block_walk(ni, false, ni->signature_ba,
-+				  &ni->mapping_blocks_top_ba, 1,
-+				  ni->mgmt_start_ba);
-+	if (!success) {
-+		nlog_err(ni, "No room for spare blocks\n");
-+		return false;
-+	}
-+
-+	/* Generate info table cache */
-+	nmbm_generate_info_table_cache(ni);
-+
-+	/* Write info table */
-+	success = nmbm_rebuild_info_table(ni);
-+	if (!success) {
-+		nlog_err(ni, "Failed to build info tables\n");
-+		return false;
-+	}
-+
-+	/* Remap bad block(s) at end of data area */
-+	for (lb = ni->data_block_count; lb < ni->mgmt_start_ba; lb++) {
-+		success = nmbm_map_block(ni, lb);
-+		if (!success)
-+			break;
-+
-+		ni->data_block_count++;
-+	}
-+
-+	/* If state table and/or mapping table changed, update info table. */
-+	success = nmbm_update_info_table(ni);
-+	if (!success)
-+		return false;
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_create_new - Create NMBM on a new chip
-+ * @ni: NMBM instance structure
-+ */
-+static bool nmbm_create_new(struct nmbm_instance *ni)
-+{
-+	bool success;
-+
-+	/* Determine the boundary of management blocks */
-+	ni->mgmt_start_ba = ni->block_count * (NMBM_MGMT_DIV - ni->max_ratio) / NMBM_MGMT_DIV;
-+
-+	if (ni->max_reserved_blocks && ni->block_count - ni->mgmt_start_ba > ni->max_reserved_blocks)
-+		ni->mgmt_start_ba = ni->block_count - ni->max_reserved_blocks;
-+
-+	nlog_info(ni, "NMBM management region starts at block %u [0x%08llx]\n",
-+		  ni->mgmt_start_ba, ba2addr(ni, ni->mgmt_start_ba));
-+
-+	/* Fill block state table & mapping table */
-+	nmbm_scan_badblocks(ni);
-+	nmbm_build_mapping_table(ni);
-+
-+	/* Write signature */
-+	ni->signature.header.magic = NMBM_MAGIC_SIGNATURE;
-+	ni->signature.header.version = NMBM_VER;
-+	ni->signature.header.size = sizeof(ni->signature);
-+	ni->signature.nand_size = bmtd.total_blks << bmtd.blk_shift;
-+	ni->signature.block_size = bmtd.blk_size;
-+	ni->signature.page_size = bmtd.pg_size;
-+	ni->signature.spare_size = bmtd.mtd->oobsize;
-+	ni->signature.mgmt_start_pb = ni->mgmt_start_ba;
-+	ni->signature.max_try_count = NMBM_TRY_COUNT;
-+	nmbm_update_checksum(&ni->signature.header);
-+
-+	success = nmbm_write_signature(ni, ni->mgmt_start_ba,
-+				       &ni->signature, &ni->signature_ba);
-+	if (!success) {
-+		nlog_err(ni, "Failed to write signature to a proper offset\n");
-+		return false;
-+	}
-+
-+	nlog_info(ni, "Signature has been written to block %u [0x%08llx]\n",
-+		 ni->signature_ba, ba2addr(ni, ni->signature_ba));
-+
-+	/* Write info table(s) */
-+	success = nmbm_create_info_table(ni);
-+	if (success) {
-+		nlog_info(ni, "NMBM has been successfully created\n");
-+		return true;
-+	}
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_check_info_table_header - Check if a info table header is valid
-+ * @ni: NMBM instance structure
-+ * @data: pointer to the info table header
-+ */
-+static bool nmbm_check_info_table_header(struct nmbm_instance *ni, void *data)
-+{
-+	struct nmbm_info_table_header *ifthdr = data;
-+
-+	if (ifthdr->header.magic != NMBM_MAGIC_INFO_TABLE)
-+		return false;
-+
-+	if (ifthdr->header.size != ni->info_table_size)
-+		return false;
-+
-+	if (ifthdr->mapping_table_off - ifthdr->state_table_off < ni->state_table_size)
-+		return false;
-+
-+	if (ni->info_table_size - ifthdr->mapping_table_off < ni->mapping_table_size)
-+		return false;
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_check_info_table - Check if a whole info table is valid
-+ * @ni: NMBM instance structure
-+ * @start_ba: start block address of this table
-+ * @end_ba: end block address of this table
-+ * @data: pointer to the info table header
-+ * @mapping_blocks_top_ba: return the block address of top remapped block
-+ */
-+static bool nmbm_check_info_table(struct nmbm_instance *ni, uint32_t start_ba,
-+				  uint32_t end_ba, void *data,
-+				  uint32_t *mapping_blocks_top_ba)
-+{
-+	struct nmbm_info_table_header *ifthdr = data;
-+	int32_t *block_mapping = (int32_t *)((uintptr_t)data + ifthdr->mapping_table_off);
-+	u32 *block_state = (u32 *)((uintptr_t)data + ifthdr->state_table_off);
-+	uint32_t minimum_mapping_pb = ni->signature_ba;
-+	uint32_t ba;
-+
-+	for (ba = 0; ba < ni->data_block_count; ba++) {
-+		if ((block_mapping[ba] >= ni->data_block_count && block_mapping[ba] < end_ba) ||
-+		    block_mapping[ba] == ni->signature_ba)
-+			return false;
-+
-+		if (block_mapping[ba] >= end_ba && block_mapping[ba] < minimum_mapping_pb)
-+			minimum_mapping_pb = block_mapping[ba];
-+	}
-+
-+	for (ba = start_ba; ba < end_ba; ba++) {
-+		if (nmbm_get_block_state(ni, ba) != BLOCK_ST_GOOD)
-+			continue;
-+
-+		if (nmbm_get_block_state_raw(block_state, ba) != BLOCK_ST_GOOD)
-+			return false;
-+	}
-+
-+	*mapping_blocks_top_ba = minimum_mapping_pb - 1;
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_try_load_info_table - Try to load info table from a address
-+ * @ni: NMBM instance structure
-+ * @ba: start block address of the info table
-+ * @eba: return the block address after end of the table
-+ * @write_count: return the write count of this table
-+ * @mapping_blocks_top_ba: return the block address of top remapped block
-+ * @table_loaded: used to record whether ni->info_table has valid data
-+ */
-+static bool nmbm_try_load_info_table(struct nmbm_instance *ni, uint32_t ba,
-+				     uint32_t *eba, uint32_t *write_count,
-+				     uint32_t *mapping_blocks_top_ba,
-+				     bool table_loaded)
-+{
-+	struct nmbm_info_table_header *ifthdr = (void *)ni->info_table_cache;
-+	uint8_t *off = ni->info_table_cache;
-+	uint32_t limit = ba + size2blk(ni, ni->info_table_size);
-+	uint32_t start_ba = 0, chunksize, sizeremain = ni->info_table_size;
-+	bool success, checkhdr = true;
-+	int ret;
-+
-+	while (sizeremain && ba < limit) {
-+		if (nmbm_get_block_state(ni, ba) != BLOCK_ST_GOOD)
-+			goto next_block;
-+
-+		if (nmbm_check_bad_phys_block(ni, ba)) {
-+			nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+			goto next_block;
-+		}
-+
-+		chunksize = sizeremain;
-+		if (chunksize > bmtd.blk_size)
-+			chunksize = bmtd.blk_size;
-+
-+		/* Assume block with ECC error has no info table data */
-+		ret = nmbn_read_data(ni, ba2addr(ni, ba), off, chunksize);
-+		if (ret < 0)
-+			goto skip_bad_block;
-+		else if (ret > 0)
-+			return false;
-+
-+		if (checkhdr) {
-+			success = nmbm_check_info_table_header(ni, off);
-+			if (!success)
-+				return false;
-+
-+			start_ba = ba;
-+			checkhdr = false;
-+		}
-+
-+		off += chunksize;
-+		sizeremain -= chunksize;
-+
-+		goto next_block;
-+
-+	skip_bad_block:
-+		/* Only mark bad in memory */
-+		nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
-+
-+	next_block:
-+		ba++;
-+	}
-+
-+	if (sizeremain)
-+		return false;
-+
-+	success = nmbm_check_header(ni->info_table_cache, ni->info_table_size);
-+	if (!success)
-+		return false;
-+
-+	*eba = ba;
-+	*write_count = ifthdr->write_count;
-+
-+	success = nmbm_check_info_table(ni, start_ba, ba, ni->info_table_cache,
-+					mapping_blocks_top_ba);
-+	if (!success)
-+		return false;
-+
-+	if (!table_loaded || ifthdr->write_count > ni->info_table.write_count) {
-+		memcpy(&ni->info_table, ifthdr, sizeof(ni->info_table));
-+		memcpy(ni->block_state,
-+		       (uint8_t *)ifthdr + ifthdr->state_table_off,
-+		       ni->state_table_size);
-+		memcpy(ni->block_mapping,
-+		       (uint8_t *)ifthdr + ifthdr->mapping_table_off,
-+		       ni->mapping_table_size);
-+		ni->info_table.write_count = ifthdr->write_count;
-+	}
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_search_info_table - Search info table from specific address
-+ * @ni: NMBM instance structure
-+ * @ba: start block address to search
-+ * @limit: highest block address allowed for searching
-+ * @table_start_ba: return the start block address of this table
-+ * @table_end_ba: return the block address after end of this table
-+ * @write_count: return the write count of this table
-+ * @mapping_blocks_top_ba: return the block address of top remapped block
-+ * @table_loaded: used to record whether ni->info_table has valid data
-+ */
-+static bool nmbm_search_info_table(struct nmbm_instance *ni, uint32_t ba,
-+				   uint32_t limit, uint32_t *table_start_ba,
-+				   uint32_t *table_end_ba,
-+				   uint32_t *write_count,
-+				   uint32_t *mapping_blocks_top_ba,
-+				   bool table_loaded)
-+{
-+	bool success;
-+
-+	while (ba < limit - size2blk(ni, ni->info_table_size)) {
-+		success = nmbm_try_load_info_table(ni, ba, table_end_ba,
-+						   write_count,
-+						   mapping_blocks_top_ba,
-+						   table_loaded);
-+		if (success) {
-+			*table_start_ba = ba;
-+			return true;
-+		}
-+
-+		ba++;
-+	}
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_load_info_table - Load info table(s) from a chip
-+ * @ni: NMBM instance structure
-+ * @ba: start block address to search info table
-+ * @limit: highest block address allowed for searching
-+ */
-+static bool nmbm_load_info_table(struct nmbm_instance *ni, uint32_t ba,
-+				 uint32_t limit)
-+{
-+	uint32_t main_table_end_ba, backup_table_end_ba, table_end_ba;
-+	uint32_t main_mapping_blocks_top_ba, backup_mapping_blocks_top_ba;
-+	uint32_t main_table_write_count, backup_table_write_count;
-+	uint32_t i;
-+	bool success;
-+
-+	/* Set initial value */
-+	ni->main_table_ba = 0;
-+	ni->backup_table_ba = 0;
-+	ni->info_table.write_count = 0;
-+	ni->mapping_blocks_top_ba = ni->signature_ba - 1;
-+	ni->data_block_count = ni->signature.mgmt_start_pb;
-+
-+	/* Find first info table */
-+	success = nmbm_search_info_table(ni, ba, limit, &ni->main_table_ba,
-+		&main_table_end_ba, &main_table_write_count,
-+		&main_mapping_blocks_top_ba, false);
-+	if (!success) {
-+		nlog_warn(ni, "No valid info table found\n");
-+		return false;
-+	}
-+
-+	table_end_ba = main_table_end_ba;
-+
-+	nlog_table_found(ni, true, main_table_write_count, ni->main_table_ba,
-+			main_table_end_ba);
-+
-+	/* Find second info table */
-+	success = nmbm_search_info_table(ni, main_table_end_ba, limit,
-+		&ni->backup_table_ba, &backup_table_end_ba,
-+		&backup_table_write_count, &backup_mapping_blocks_top_ba, true);
-+	if (!success) {
-+		nlog_warn(ni, "Second info table not found\n");
-+	} else {
-+		table_end_ba = backup_table_end_ba;
-+
-+		nlog_table_found(ni, false, backup_table_write_count,
-+				ni->backup_table_ba, backup_table_end_ba);
-+	}
-+
-+	/* Pick mapping_blocks_top_ba */
-+	if (!ni->backup_table_ba) {
-+		ni->mapping_blocks_top_ba= main_mapping_blocks_top_ba;
-+	} else {
-+		if (main_table_write_count >= backup_table_write_count)
-+			ni->mapping_blocks_top_ba = main_mapping_blocks_top_ba;
-+		else
-+			ni->mapping_blocks_top_ba = backup_mapping_blocks_top_ba;
-+	}
-+
-+	/* Set final mapping_blocks_ba */
-+	ni->mapping_blocks_ba = table_end_ba;
-+
-+	/* Set final data_block_count */
-+	for (i = ni->signature.mgmt_start_pb; i > 0; i--) {
-+		if (ni->block_mapping[i - 1] >= 0) {
-+			ni->data_block_count = i;
-+			break;
-+		}
-+	}
-+
-+	/* Regenerate the info table cache from the final selected info table */
-+	nmbm_generate_info_table_cache(ni);
-+
-+	/*
-+	 * If only one table exists, try to write another table.
-+	 * If two tables have different write count, try to update info table
-+	 */
-+	if (!ni->backup_table_ba) {
-+		success = nmbm_rescue_single_info_table(ni);
-+	} else if (main_table_write_count != backup_table_write_count) {
-+		/* Mark state & mapping tables changed */
-+		ni->block_state_changed = 1;
-+		ni->block_mapping_changed = 1;
-+
-+		success = nmbm_update_single_info_table(ni,
-+			main_table_write_count < backup_table_write_count);
-+	} else {
-+		success = true;
-+	}
-+
-+	/*
-+	 * If there is no spare unmapped blocks, or still only one table
-+	 * exists, set the chip to read-only
-+	 */
-+	if (ni->mapping_blocks_ba == ni->mapping_blocks_top_ba) {
-+		nlog_warn(ni, "No spare unmapped blocks. Device is now read-only\n");
-+		ni->protected = 1;
-+	} else if (!success) {
-+		nlog_warn(ni, "Only one info table found. Device is now read-only\n");
-+		ni->protected = 1;
-+	}
-+
-+	return true;
-+}
-+
-+/*
-+ * nmbm_load_existing - Load NMBM from a new chip
-+ * @ni: NMBM instance structure
-+ */
-+static bool nmbm_load_existing(struct nmbm_instance *ni)
-+{
-+	bool success;
-+
-+	/* Calculate the boundary of management blocks */
-+	ni->mgmt_start_ba = ni->signature.mgmt_start_pb;
-+
-+	nlog_debug(ni, "NMBM management region starts at block %u [0x%08llx]\n",
-+		  ni->mgmt_start_ba, ba2addr(ni, ni->mgmt_start_ba));
-+
-+	/* Look for info table(s) */
-+	success = nmbm_load_info_table(ni, ni->mgmt_start_ba,
-+		ni->signature_ba);
-+	if (success) {
-+		nlog_info(ni, "NMBM has been successfully attached\n");
-+		return true;
-+	}
-+
-+	if (!ni->force_create) {
-+		printk("not creating NMBM table\n");
-+		return false;
-+	}
-+
-+	/* Fill block state table & mapping table */
-+	nmbm_scan_badblocks(ni);
-+	nmbm_build_mapping_table(ni);
-+
-+	/* Write info table(s) */
-+	success = nmbm_create_info_table(ni);
-+	if (success) {
-+		nlog_info(ni, "NMBM has been successfully created\n");
-+		return true;
-+	}
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_find_signature - Find signature in the lower NAND chip
-+ * @ni: NMBM instance structure
-+ * @signature_ba: used for storing block address of the signature
-+ * @signature_ba: return the actual block address of signature block
-+ *
-+ * Find a valid signature from a specific range in the lower NAND chip,
-+ * from bottom (highest address) to top (lowest address)
-+ *
-+ * Return true if found.
-+ */
-+static bool nmbm_find_signature(struct nmbm_instance *ni,
-+				struct nmbm_signature *signature,
-+				uint32_t *signature_ba)
-+{
-+	struct nmbm_signature sig;
-+	uint64_t off, addr;
-+	uint32_t block_count, ba, limit;
-+	bool success;
-+	int ret;
-+
-+	/* Calculate top and bottom block address */
-+	block_count = bmtd.total_blks;
-+	ba = block_count;
-+	limit = (block_count / NMBM_MGMT_DIV) * (NMBM_MGMT_DIV - ni->max_ratio);
-+	if (ni->max_reserved_blocks && block_count - limit > ni->max_reserved_blocks)
-+		limit = block_count - ni->max_reserved_blocks;
-+
-+	while (ba >= limit) {
-+		ba--;
-+		addr = ba2addr(ni, ba);
-+
-+		if (nmbm_check_bad_phys_block(ni, ba))
-+			continue;
-+
-+		/* Check every page.
-+		 * As long as at leaset one page contains valid signature,
-+		 * the block is treated as a valid signature block.
-+		 */
-+		for (off = 0; off < bmtd.blk_size;
-+		     off += bmtd.pg_size) {
-+			ret = nmbn_read_data(ni, addr + off, &sig,
-+					     sizeof(sig));
-+			if (ret)
-+				continue;
-+
-+			/* Check for header size and checksum */
-+			success = nmbm_check_header(&sig, sizeof(sig));
-+			if (!success)
-+				continue;
-+
-+			/* Check for header magic */
-+			if (sig.header.magic == NMBM_MAGIC_SIGNATURE) {
-+				/* Found it */
-+				memcpy(signature, &sig, sizeof(sig));
-+				*signature_ba = ba;
-+				return true;
-+			}
-+		}
-+	};
-+
-+	return false;
-+}
-+
-+/*
-+ * nmbm_calc_structure_size - Calculate the instance structure size
-+ * @nld: NMBM lower device structure
-+ */
-+static size_t nmbm_calc_structure_size(void)
-+{
-+	uint32_t state_table_size, mapping_table_size, info_table_size;
-+	uint32_t block_count;
-+
-+	block_count = bmtd.total_blks;
-+
-+	/* Calculate info table size */
-+	state_table_size = ((block_count + NMBM_BITMAP_BLOCKS_PER_UNIT - 1) /
-+		NMBM_BITMAP_BLOCKS_PER_UNIT) * NMBM_BITMAP_UNIT_SIZE;
-+	mapping_table_size = block_count * sizeof(int32_t);
-+
-+	info_table_size = ALIGN(sizeof(struct nmbm_info_table_header),
-+				     bmtd.pg_size);
-+	info_table_size += ALIGN(state_table_size, bmtd.pg_size);
-+	info_table_size += ALIGN(mapping_table_size, bmtd.pg_size);
-+
-+	return info_table_size + state_table_size + mapping_table_size +
-+		sizeof(struct nmbm_instance);
-+}
-+
-+/*
-+ * nmbm_init_structure - Initialize members of instance structure
-+ * @ni: NMBM instance structure
-+ */
-+static void nmbm_init_structure(struct nmbm_instance *ni)
-+{
-+	uint32_t pages_per_block, blocks_per_chip;
-+	uintptr_t ptr;
-+
-+	pages_per_block = bmtd.blk_size / bmtd.pg_size;
-+	blocks_per_chip = bmtd.total_blks;
-+
-+	ni->rawpage_size = bmtd.pg_size + bmtd.mtd->oobsize;
-+	ni->rawblock_size = pages_per_block * ni->rawpage_size;
-+	ni->rawchip_size = blocks_per_chip * ni->rawblock_size;
-+
-+	/* Calculate number of block this chip */
-+	ni->block_count = blocks_per_chip;
-+
-+	/* Calculate info table size */
-+	ni->state_table_size = ((ni->block_count + NMBM_BITMAP_BLOCKS_PER_UNIT - 1) /
-+		NMBM_BITMAP_BLOCKS_PER_UNIT) * NMBM_BITMAP_UNIT_SIZE;
-+	ni->mapping_table_size = ni->block_count * sizeof(*ni->block_mapping);
-+
-+	ni->info_table_size = ALIGN(sizeof(ni->info_table),
-+					 bmtd.pg_size);
-+	ni->info_table.state_table_off = ni->info_table_size;
-+
-+	ni->info_table_size += ALIGN(ni->state_table_size,
-+					  bmtd.pg_size);
-+	ni->info_table.mapping_table_off = ni->info_table_size;
-+
-+	ni->info_table_size += ALIGN(ni->mapping_table_size,
-+					  bmtd.pg_size);
-+
-+	ni->info_table_spare_blocks = nmbm_get_spare_block_count(
-+		size2blk(ni, ni->info_table_size));
-+
-+	/* Assign memory to members */
-+	ptr = (uintptr_t)ni + sizeof(*ni);
-+
-+	ni->info_table_cache = (void *)ptr;
-+	ptr += ni->info_table_size;
-+
-+	ni->block_state = (void *)ptr;
-+	ptr += ni->state_table_size;
-+
-+	ni->block_mapping = (void *)ptr;
-+	ptr += ni->mapping_table_size;
-+
-+	ni->page_cache = bmtd.data_buf;
-+
-+	/* Initialize block state table */
-+	ni->block_state_changed = 0;
-+	memset(ni->block_state, 0xff, ni->state_table_size);
-+
-+	/* Initialize block mapping table */
-+	ni->block_mapping_changed = 0;
-+}
-+
-+/*
-+ * nmbm_attach - Attach to a lower device
-+ * @ni: NMBM instance structure
-+ */
-+static int nmbm_attach(struct nmbm_instance *ni)
-+{
-+	bool success;
-+
-+	if (!ni)
-+		return -EINVAL;
-+
-+	/* Initialize NMBM instance */
-+	nmbm_init_structure(ni);
-+
-+	success = nmbm_find_signature(ni, &ni->signature, &ni->signature_ba);
-+	if (!success) {
-+		if (!ni->force_create) {
-+			nlog_err(ni, "Signature not found\n");
-+			return -ENODEV;
-+		}
-+
-+		success = nmbm_create_new(ni);
-+		if (!success)
-+			return -ENODEV;
-+
-+		return 0;
-+	}
-+
-+	nlog_info(ni, "Signature found at block %u [0x%08llx]\n",
-+		 ni->signature_ba, ba2addr(ni, ni->signature_ba));
-+
-+	if (ni->signature.header.version != NMBM_VER) {
-+		nlog_err(ni, "NMBM version %u.%u is not supported\n",
-+			NMBM_VERSION_MAJOR_GET(ni->signature.header.version),
-+			NMBM_VERSION_MINOR_GET(ni->signature.header.version));
-+		return -EINVAL;
-+	}
-+
-+	if (ni->signature.nand_size != bmtd.total_blks << bmtd.blk_shift ||
-+	    ni->signature.block_size != bmtd.blk_size ||
-+	    ni->signature.page_size != bmtd.pg_size ||
-+	    ni->signature.spare_size != bmtd.mtd->oobsize) {
-+		nlog_err(ni, "NMBM configuration mismatch\n");
-+		return -EINVAL;
-+	}
-+
-+	success = nmbm_load_existing(ni);
-+	if (!success)
-+		return -ENODEV;
-+
-+	return 0;
-+}
-+
-+static bool remap_block_nmbm(u16 block, u16 mapped_block, int copy_len)
-+{
-+	struct nmbm_instance *ni = bmtd.ni;
-+	int new_block;
-+
-+	if (block >= ni->data_block_count)
-+		return false;
-+
-+	nmbm_set_block_state(ni, mapped_block, BLOCK_ST_BAD);
-+	if (!nmbm_map_block(ni, block))
-+		return false;
-+
-+	new_block = ni->block_mapping[block];
-+	bbt_nand_erase(new_block);
-+    if (copy_len > 0)
-+		bbt_nand_copy(new_block, mapped_block, copy_len);
-+	nmbm_update_info_table(ni);
-+
-+	return true;
-+}
-+
-+static int get_mapping_block_index_nmbm(int block)
-+{
-+	struct nmbm_instance *ni = bmtd.ni;
-+
-+	if (block >= ni->data_block_count)
-+		return -1;
-+
-+	return ni->block_mapping[block];
-+}
-+
-+static int mtk_bmt_init_nmbm(struct device_node *np)
-+{
-+	struct nmbm_instance *ni;
-+	int ret;
-+
-+	ni = kzalloc(nmbm_calc_structure_size(), GFP_KERNEL);
-+	if (!ni)
-+		return -ENOMEM;
-+
-+	bmtd.ni = ni;
-+
-+	if (of_property_read_u32(np, "mediatek,bmt-max-ratio", &ni->max_ratio))
-+		ni->max_ratio = 1;
-+	if (of_property_read_u32(np, "mediatek,bmt-max-reserved-blocks",
-+				 &ni->max_reserved_blocks))
-+		ni->max_reserved_blocks = 256;
-+	if (of_property_read_bool(np, "mediatek,empty-page-ecc-protected"))
-+		ni->empty_page_ecc_ok = true;
-+	if (of_property_read_bool(np, "mediatek,bmt-force-create"))
-+		ni->force_create = true;
-+
-+	ret = nmbm_attach(ni);
-+	if (ret)
-+		goto out;
-+
-+	bmtd.mtd->size = ni->data_block_count << bmtd.blk_shift;
-+
-+	return 0;
-+
-+out:
-+	kfree(ni);
-+	bmtd.ni = NULL;
-+
-+	return ret;
-+}
-+
-+static int mtk_bmt_debug_nmbm(void *data, u64 val)
-+{
-+	struct nmbm_instance *ni = bmtd.ni;
-+	int i;
-+
-+	switch (val) {
-+	case 0:
-+		for (i = 1; i < ni->data_block_count; i++) {
-+			if (ni->block_mapping[i] < ni->mapping_blocks_ba)
-+				continue;
-+
-+			printk("remap [%x->%x]\n", i, ni->block_mapping[i]);
-+		}
-+	}
-+
-+	return 0;
-+}
-+
-+static void unmap_block_nmbm(u16 block)
-+{
-+	struct nmbm_instance *ni = bmtd.ni;
-+	int start, offset;
-+	int new_block;
-+
-+	if (block >= ni->data_block_count)
-+		return;
-+
-+	start = block;
-+	offset = 0;
-+	while (ni->block_mapping[start] >= ni->mapping_blocks_ba) {
-+		start--;
-+		offset++;
-+		if (start < 0)
-+			return;
-+	}
-+
-+	if (!offset)
-+		return;
-+
-+	new_block = ni->block_mapping[start] + offset;
-+	nmbm_set_block_state(ni, new_block, BLOCK_ST_GOOD);
-+	ni->block_mapping[block] = new_block;
-+	ni->block_mapping_changed++;
-+
-+	new_block = ni->signature_ba - 1;
-+	for (block = 0; block < ni->data_block_count; block++) {
-+		int cur = ni->block_mapping[block];
-+
-+		if (cur < ni->mapping_blocks_ba)
-+			continue;
-+
-+		if (cur <= new_block)
-+			new_block = cur - 1;
-+	}
-+
-+	ni->mapping_blocks_top_ba = new_block;
-+
-+	nmbm_update_info_table(ni);
-+}
-+
-+const struct mtk_bmt_ops mtk_bmt_nmbm_ops = {
-+	.init = mtk_bmt_init_nmbm,
-+	.remap_block = remap_block_nmbm,
-+	.unmap_block = unmap_block_nmbm,
-+	.get_mapping_block = get_mapping_block_index_nmbm,
-+	.debug = mtk_bmt_debug_nmbm,
-+};
-diff --git a/target/linux/ramips/files/drivers/mtd/nand/mtk_bmt_v2.c b/target/linux/ramips/files/drivers/mtd/nand/mtk_bmt_v2.c
-new file mode 100644
-index 0000000000..2770376e98
---- /dev/null
-+++ b/target/linux/ramips/files/drivers/mtd/nand/mtk_bmt_v2.c
-@@ -0,0 +1,513 @@
-+/*
-+ * Copyright (c) 2017 MediaTek Inc.
-+ * Author: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
-+ * Copyright (c) 2020-2022 Felix Fietkau <nbd@nbd.name>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/slab.h>
-+#include "mtk_bmt.h"
-+
-+struct bbbt {
-+	char signature[3];
-+	/* This version is used to distinguish the legacy and new algorithm */
-+#define BBMT_VERSION		2
-+	unsigned char version;
-+	/* Below 2 tables will be written in SLC */
-+	u16 bb_tbl[];
-+};
-+
-+struct bbmt {
-+	u16 block;
-+#define NO_MAPPED		0
-+#define NORMAL_MAPPED	1
-+#define BMT_MAPPED		2
-+	u16 mapped;
-+};
-+
-+/* Maximum 8k blocks */
-+#define BBPOOL_RATIO		2
-+#define BB_TABLE_MAX	bmtd.table_size
-+#define BMT_TABLE_MAX	(BB_TABLE_MAX * BBPOOL_RATIO / 100)
-+#define BMT_TBL_DEF_VAL	0x0
-+
-+static inline struct bbmt *bmt_tbl(struct bbbt *bbbt)
-+{
-+	return (struct bbmt *)&bbbt->bb_tbl[bmtd.table_size];
-+}
-+
-+static u16 find_valid_block(u16 block)
-+{
-+	u8 fdm[4];
-+	int ret;
-+	int loop = 0;
-+
-+retry:
-+	if (block >= bmtd.total_blks)
-+		return 0;
-+
-+	ret = bbt_nand_read(blk_pg(block), bmtd.data_buf, bmtd.pg_size,
-+			    fdm, sizeof(fdm));
-+	/* Read the 1st byte of FDM to judge whether it's a bad
-+	 * or not
-+	 */
-+	if (ret || fdm[0] != 0xff) {
-+		pr_info("nand: found bad block 0x%x\n", block);
-+		if (loop >= bmtd.bb_max) {
-+			pr_info("nand: FATAL ERR: too many bad blocks!!\n");
-+			return 0;
-+		}
-+
-+		loop++;
-+		block++;
-+		goto retry;
-+	}
-+
-+	return block;
-+}
-+
-+/* Find out all bad blocks, and fill in the mapping table */
-+static int scan_bad_blocks(struct bbbt *bbt)
-+{
-+	int i;
-+	u16 block = 0;
-+
-+	/* First time download, the block0 MUST NOT be a bad block,
-+	 * this is guaranteed by vendor
-+	 */
-+	bbt->bb_tbl[0] = 0;
-+
-+	/*
-+	 * Construct the mapping table of Normal data area(non-PMT/BMTPOOL)
-+	 * G - Good block; B - Bad block
-+	 *			---------------------------
-+	 * physical |G|G|B|G|B|B|G|G|G|G|B|G|B|
-+	 *			---------------------------
-+	 * What bb_tbl[i] looks like:
-+	 *   physical block(i):
-+	 *			 0 1 2 3 4 5 6 7 8 9 a b c
-+	 *   mapped block(bb_tbl[i]):
-+	 *			 0 1 3 6 7 8 9 b ......
-+	 * ATTENTION:
-+	 *		If new bad block ocurred(n), search bmt_tbl to find
-+	 *		a available block(x), and fill in the bb_tbl[n] = x;
-+	 */
-+	for (i = 1; i < bmtd.pool_lba; i++) {
-+		bbt->bb_tbl[i] = find_valid_block(bbt->bb_tbl[i - 1] + 1);
-+		BBT_LOG("bb_tbl[0x%x] = 0x%x", i, bbt->bb_tbl[i]);
-+		if (bbt->bb_tbl[i] == 0)
-+			return -1;
-+	}
-+
-+	/* Physical Block start Address of BMT pool */
-+	bmtd.pool_pba = bbt->bb_tbl[i - 1] + 1;
-+	if (bmtd.pool_pba >= bmtd.total_blks - 2) {
-+		pr_info("nand: FATAL ERR: Too many bad blocks!!\n");
-+		return -1;
-+	}
-+
-+	BBT_LOG("pool_pba=0x%x", bmtd.pool_pba);
-+	i = 0;
-+	block = bmtd.pool_pba;
-+	/*
-+	 * The bmt table is used for runtime bad block mapping
-+	 * G - Good block; B - Bad block
-+	 *			---------------------------
-+	 * physical |G|G|B|G|B|B|G|G|G|G|B|G|B|
-+	 *			---------------------------
-+	 *   block:	 0 1 2 3 4 5 6 7 8 9 a b c
-+	 * What bmt_tbl[i] looks like in initial state:
-+	 *   i:
-+	 *			 0 1 2 3 4 5 6 7
-+	 *   bmt_tbl[i].block:
-+	 *			 0 1 3 6 7 8 9 b
-+	 *   bmt_tbl[i].mapped:
-+	 *			 N N N N N N N B
-+	 *		N - Not mapped(Available)
-+	 *		M - Mapped
-+	 *		B - BMT
-+	 * ATTENTION:
-+	 *		BMT always in the last valid block in pool
-+	 */
-+	while ((block = find_valid_block(block)) != 0) {
-+		bmt_tbl(bbt)[i].block = block;
-+		bmt_tbl(bbt)[i].mapped = NO_MAPPED;
-+		BBT_LOG("bmt_tbl[%d].block = 0x%x", i, block);
-+		block++;
-+		i++;
-+	}
-+
-+	/* i - How many available blocks in pool, which is the length of bmt_tbl[]
-+	 * bmtd.bmt_blk_idx - bmt_tbl[bmtd.bmt_blk_idx].block => the BMT block
-+	 */
-+	bmtd.bmt_blk_idx = i - 1;
-+	bmt_tbl(bbt)[bmtd.bmt_blk_idx].mapped = BMT_MAPPED;
-+
-+	if (i < 1) {
-+		pr_info("nand: FATAL ERR: no space to store BMT!!\n");
-+		return -1;
-+	}
-+
-+	pr_info("[BBT] %d available blocks in BMT pool\n", i);
-+
-+	return 0;
-+}
-+
-+static bool is_valid_bmt(unsigned char *buf, unsigned char *fdm)
-+{
-+	struct bbbt *bbt = (struct bbbt *)buf;
-+	u8 *sig = (u8*)bbt->signature + MAIN_SIGNATURE_OFFSET;
-+
-+
-+	if (memcmp(bbt->signature + MAIN_SIGNATURE_OFFSET, "BMT", 3) == 0 &&
-+		memcmp(fdm + OOB_SIGNATURE_OFFSET, "bmt", 3) == 0) {
-+		if (bbt->version == BBMT_VERSION)
-+			return true;
-+	}
-+	BBT_LOG("[BBT] BMT Version not match,upgrage preloader and uboot please! sig=%02x%02x%02x, fdm=%02x%02x%02x",
-+		sig[0], sig[1], sig[2],
-+		fdm[1], fdm[2], fdm[3]);
-+	return false;
-+}
-+
-+static u16 get_bmt_index(struct bbmt *bmt)
-+{
-+	int i = 0;
-+
-+	while (bmt[i].block != BMT_TBL_DEF_VAL) {
-+		if (bmt[i].mapped == BMT_MAPPED)
-+			return i;
-+		i++;
-+	}
-+	return 0;
-+}
-+
-+static int
-+read_bmt(u16 block, unsigned char *dat, unsigned char *fdm, int fdm_len)
-+{
-+	u32 len = bmtd.bmt_pgs << bmtd.pg_shift;
-+
-+	return bbt_nand_read(blk_pg(block), dat, len, fdm, fdm_len);
-+}
-+
-+static struct bbbt *scan_bmt(u16 block)
-+{
-+	u8 fdm[4];
-+
-+	if (block < bmtd.pool_lba)
-+		return NULL;
-+
-+	if (read_bmt(block, bmtd.bbt_buf, fdm, sizeof(fdm)))
-+		return scan_bmt(block - 1);
-+
-+	if (is_valid_bmt(bmtd.bbt_buf, fdm)) {
-+		bmtd.bmt_blk_idx = get_bmt_index(bmt_tbl((struct bbbt *)bmtd.bbt_buf));
-+		if (bmtd.bmt_blk_idx == 0) {
-+			pr_info("[BBT] FATAL ERR: bmt block index is wrong!\n");
-+			return NULL;
-+		}
-+		pr_info("[BBT] BMT.v2 is found at 0x%x\n", block);
-+		return (struct bbbt *)bmtd.bbt_buf;
-+	} else
-+		return scan_bmt(block - 1);
-+}
-+
-+/* Write the Burner Bad Block Table to Nand Flash
-+ * n - write BMT to bmt_tbl[n]
-+ */
-+static u16 upload_bmt(struct bbbt *bbt, int n)
-+{
-+	u16 block;
-+
-+retry:
-+	if (n < 0 || bmt_tbl(bbt)[n].mapped == NORMAL_MAPPED) {
-+		pr_info("nand: FATAL ERR: no space to store BMT!\n");
-+		return (u16)-1;
-+	}
-+
-+	block = bmt_tbl(bbt)[n].block;
-+	BBT_LOG("n = 0x%x, block = 0x%x", n, block);
-+	if (bbt_nand_erase(block)) {
-+		bmt_tbl(bbt)[n].block = 0;
-+		/* erase failed, try the previous block: bmt_tbl[n - 1].block */
-+		n--;
-+		goto retry;
-+	}
-+
-+	/* The signature offset is fixed set to 0,
-+	 * oob signature offset is fixed set to 1
-+	 */
-+	memcpy(bbt->signature + MAIN_SIGNATURE_OFFSET, "BMT", 3);
-+	bbt->version = BBMT_VERSION;
-+
-+	if (write_bmt(block, (unsigned char *)bbt)) {
-+		bmt_tbl(bbt)[n].block = 0;
-+
-+		/* write failed, try the previous block in bmt_tbl[n - 1] */
-+		n--;
-+		goto retry;
-+	}
-+
-+	/* Return the current index(n) of BMT pool (bmt_tbl[n]) */
-+	return n;
-+}
-+
-+static u16 find_valid_block_in_pool(struct bbbt *bbt)
-+{
-+	int i;
-+
-+	if (bmtd.bmt_blk_idx == 0)
-+		goto error;
-+
-+	for (i = 0; i < bmtd.bmt_blk_idx; i++) {
-+		if (bmt_tbl(bbt)[i].block != 0 && bmt_tbl(bbt)[i].mapped == NO_MAPPED) {
-+			bmt_tbl(bbt)[i].mapped = NORMAL_MAPPED;
-+			return bmt_tbl(bbt)[i].block;
-+		}
-+	}
-+
-+error:
-+	pr_info("nand: FATAL ERR: BMT pool is run out!\n");
-+	return 0;
-+}
-+
-+/* We met a bad block, mark it as bad and map it to a valid block in pool,
-+ * if it's a write failure, we need to write the data to mapped block
-+ */
-+static bool remap_block_v2(u16 block, u16 mapped_block, int copy_len)
-+{
-+	u16 new_block;
-+	struct bbbt *bbt;
-+
-+	bbt = bmtd.bbt;
-+	new_block = find_valid_block_in_pool(bbt);
-+	if (new_block == 0)
-+		return false;
-+
-+	/* Map new bad block to available block in pool */
-+	bbt->bb_tbl[block] = new_block;
-+
-+	/* Erase new block */
-+	bbt_nand_erase(new_block);
-+	if (copy_len > 0)
-+		bbt_nand_copy(new_block, mapped_block, copy_len);
-+
-+	bmtd.bmt_blk_idx = upload_bmt(bbt, bmtd.bmt_blk_idx);
-+
-+	return true;
-+}
-+
-+static int get_mapping_block_index_v2(int block)
-+{
-+	int start, end;
-+
-+	if (block >= bmtd.pool_lba)
-+		return block;
-+
-+	if (!mapping_block_in_range(block, &start, &end))
-+		return block;
-+
-+	return bmtd.bbt->bb_tbl[block];
-+}
-+
-+static void
-+unmap_block_v2(u16 block)
-+{
-+	bmtd.bbt->bb_tbl[block] = block;
-+	bmtd.bmt_blk_idx = upload_bmt(bmtd.bbt, bmtd.bmt_blk_idx);
-+}
-+
-+static unsigned long *
-+mtk_bmt_get_mapping_mask(void)
-+{
-+	struct bbmt *bbmt = bmt_tbl(bmtd.bbt);
-+	int main_blocks = bmtd.mtd->size >> bmtd.blk_shift;
-+	unsigned long *used;
-+	int i, k;
-+
-+	used = kcalloc(sizeof(unsigned long), BIT_WORD(bmtd.bmt_blk_idx) + 1, GFP_KERNEL);
-+	if (!used)
-+		return NULL;
-+
-+	for (i = 1; i < main_blocks; i++) {
-+		if (bmtd.bbt->bb_tbl[i] == i)
-+			continue;
-+
-+		for (k = 0; k < bmtd.bmt_blk_idx; k++) {
-+			if (bmtd.bbt->bb_tbl[i] != bbmt[k].block)
-+				continue;
-+
-+			set_bit(k, used);
-+			break;
-+		}
-+	}
-+
-+	return used;
-+}
-+
-+static int mtk_bmt_debug_v2(void *data, u64 val)
-+{
-+	struct bbmt *bbmt = bmt_tbl(bmtd.bbt);
-+	struct mtd_info *mtd = bmtd.mtd;
-+	unsigned long *used;
-+	int main_blocks = mtd->size >> bmtd.blk_shift;
-+	int n_remap = 0;
-+	int i;
-+
-+	used = mtk_bmt_get_mapping_mask();
-+	if (!used)
-+		return -ENOMEM;
-+
-+	switch (val) {
-+	case 0:
-+		for (i = 1; i < main_blocks; i++) {
-+			if (bmtd.bbt->bb_tbl[i] == i)
-+				continue;
-+
-+			printk("remap [%x->%x]\n", i, bmtd.bbt->bb_tbl[i]);
-+			n_remap++;
-+		}
-+		for (i = 0; i <= bmtd.bmt_blk_idx; i++) {
-+			char c;
-+
-+			switch (bbmt[i].mapped) {
-+			case NO_MAPPED:
-+				continue;
-+			case NORMAL_MAPPED:
-+				c = 'm';
-+				if (test_bit(i, used))
-+					c = 'M';
-+				break;
-+			case BMT_MAPPED:
-+				c = 'B';
-+				break;
-+			default:
-+				c = 'X';
-+				break;
-+			}
-+			printk("[%x:%c] = 0x%x\n", i, c, bbmt[i].block);
-+		}
-+		break;
-+	case 100:
-+		for (i = 0; i <= bmtd.bmt_blk_idx; i++) {
-+			if (bbmt[i].mapped != NORMAL_MAPPED)
-+				continue;
-+
-+			if (test_bit(i, used))
-+				continue;
-+
-+			n_remap++;
-+			bbmt[i].mapped = NO_MAPPED;
-+			printk("free block [%d:%x]\n", i, bbmt[i].block);
-+		}
-+		if (n_remap)
-+			bmtd.bmt_blk_idx = upload_bmt(bmtd.bbt, bmtd.bmt_blk_idx);
-+		break;
-+	}
-+
-+	kfree(used);
-+
-+	return 0;
-+}
-+
-+static int mtk_bmt_init_v2(struct device_node *np)
-+{
-+	u32 bmt_pool_size, bmt_table_size;
-+	u32 bufsz, block;
-+	u16 pmt_block;
-+
-+	if (of_property_read_u32(np, "mediatek,bmt-pool-size",
-+				 &bmt_pool_size) != 0)
-+		bmt_pool_size = 80;
-+
-+	if (of_property_read_u8(np, "mediatek,bmt-oob-offset",
-+				 &bmtd.oob_offset) != 0)
-+		bmtd.oob_offset = 0;
-+
-+	if (of_property_read_u32(np, "mediatek,bmt-table-size",
-+				 &bmt_table_size) != 0)
-+		bmt_table_size = 0x2000U;
-+
-+	bmtd.table_size = bmt_table_size;
-+
-+	pmt_block = bmtd.total_blks - bmt_pool_size - 2;
-+
-+	bmtd.mtd->size = pmt_block << bmtd.blk_shift;
-+
-+	/*
-+	 *  ---------------------------------------
-+	 * | PMT(2blks) | BMT POOL(totalblks * 2%) |
-+	 *  ---------------------------------------
-+	 * ^            ^
-+	 * |            |
-+	 * pmt_block	pmt_block + 2blocks(pool_lba)
-+	 *
-+	 * ATTETION!!!!!!
-+	 *     The blocks ahead of the boundary block are stored in bb_tbl
-+	 *     and blocks behind are stored in bmt_tbl
-+	 */
-+
-+	bmtd.pool_lba = (u16)(pmt_block + 2);
-+	bmtd.bb_max = bmtd.total_blks * BBPOOL_RATIO / 100;
-+
-+	bufsz = round_up(sizeof(struct bbbt) +
-+			 bmt_table_size * sizeof(struct bbmt), bmtd.pg_size);
-+	bmtd.bmt_pgs = bufsz >> bmtd.pg_shift;
-+
-+	bmtd.bbt_buf = kzalloc(bufsz, GFP_KERNEL);
-+	if (!bmtd.bbt_buf)
-+		return -ENOMEM;
-+
-+	memset(bmtd.bbt_buf, 0xff, bufsz);
-+
-+	/* Scanning start from the first page of the last block
-+	 * of whole flash
-+	 */
-+	bmtd.bbt = scan_bmt(bmtd.total_blks - 1);
-+	if (!bmtd.bbt) {
-+		/* BMT not found */
-+		if (bmtd.total_blks > BB_TABLE_MAX + BMT_TABLE_MAX) {
-+			pr_info("nand: FATAL: Too many blocks, can not support!\n");
-+			return -1;
-+		}
-+
-+		bmtd.bbt = (struct bbbt *)bmtd.bbt_buf;
-+		memset(bmt_tbl(bmtd.bbt), BMT_TBL_DEF_VAL,
-+		       bmtd.table_size * sizeof(struct bbmt));
-+
-+		if (scan_bad_blocks(bmtd.bbt))
-+			return -1;
-+
-+		/* BMT always in the last valid block in pool */
-+		bmtd.bmt_blk_idx = upload_bmt(bmtd.bbt, bmtd.bmt_blk_idx);
-+		block = bmt_tbl(bmtd.bbt)[bmtd.bmt_blk_idx].block;
-+		pr_notice("[BBT] BMT.v2 is written into PBA:0x%x\n", block);
-+
-+		if (bmtd.bmt_blk_idx == 0)
-+			pr_info("nand: Warning: no available block in BMT pool!\n");
-+		else if (bmtd.bmt_blk_idx == (u16)-1)
-+			return -1;
-+	}
-+
-+	return 0;
-+}
-+
-+
-+const struct mtk_bmt_ops mtk_bmt_v2_ops = {
-+	.sig = "bmt",
-+	.sig_len = 3,
-+	.init = mtk_bmt_init_v2,
-+	.remap_block = remap_block_v2,
-+	.unmap_block = unmap_block_v2,
-+	.get_mapping_block = get_mapping_block_index_v2,
-+	.debug = mtk_bmt_debug_v2,
-+};
-diff --git a/target/linux/ramips/files/include/linux/mtd/mtk_bmt.h b/target/linux/ramips/files/include/linux/mtd/mtk_bmt.h
-new file mode 100644
-index 0000000000..cbb6d04d89
---- /dev/null
-+++ b/target/linux/ramips/files/include/linux/mtd/mtk_bmt.h
-@@ -0,0 +1,18 @@
-+#ifndef __MTK_BMT_H
-+#define __MTK_BMT_H
-+
-+#ifdef CONFIG_MTD_NAND_MTK_BMT
-+int mtk_bmt_attach(struct mtd_info *mtd);
-+void mtk_bmt_detach(struct mtd_info *mtd);
-+#else
-+static inline int mtk_bmt_attach(struct mtd_info *mtd)
-+{
-+	return 0;
-+}
-+
-+static inline void mtk_bmt_detach(struct mtd_info *mtd)
-+{
-+}
-+#endif
-+
-+#endif
-diff --git a/target/linux/ramips/mt7621/config-5.4 b/target/linux/ramips/mt7621/config-5.4
-index 1484fc0269..ae4a0679bd 100644
---- a/target/linux/ramips/mt7621/config-5.4
-+++ b/target/linux/ramips/mt7621/config-5.4
-@@ -158,6 +158,7 @@ CONFIG_MTD_CMDLINE_PARTS=y
- CONFIG_MTD_NAND_CORE=y
- CONFIG_MTD_NAND_ECC_SW_HAMMING=y
- CONFIG_MTD_NAND_MT7621=y
-+CONFIG_MTD_NAND_MTK_BMT=y
- CONFIG_MTD_PHYSMAP=y
- CONFIG_MTD_RAW_NAND=y
- CONFIG_MTD_ROUTERBOOT_PARTS=y
-diff --git a/target/linux/ramips/patches-5.4/430-mtk-bmt-support.patch b/target/linux/ramips/patches-5.4/430-mtk-bmt-support.patch
-new file mode 100644
-index 0000000000..9533e4a7ee
---- /dev/null
-+++ b/target/linux/ramips/patches-5.4/430-mtk-bmt-support.patch
-@@ -0,0 +1,23 @@
-+--- a/drivers/mtd/nand/Kconfig
-++++ b/drivers/mtd/nand/Kconfig
-+@@ -2,6 +2,10 @@
-+ config MTD_NAND_CORE
-+ 	tristate
-+ 
-++config MTD_NAND_MTK_BMT
-++	bool "Support MediaTek NAND Bad-block Management Table"
-++	default n
-++
-+ source "drivers/mtd/nand/onenand/Kconfig"
-+ source "drivers/mtd/nand/raw/Kconfig"
-+ source "drivers/mtd/nand/spi/Kconfig"
-+--- a/drivers/mtd/nand/Makefile
-++++ b/drivers/mtd/nand/Makefile
-+@@ -2,6 +2,7 @@
-+ 
-+ nandcore-objs := core.o bbt.o
-+ obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
-++obj-$(CONFIG_MTD_NAND_MTK_BMT)	+= mtk_bmt.o mtk_bmt_v2.o mtk_bmt_bbt.o mtk_bmt_nmbm.o
-+ 
-+ obj-y	+= onenand/
-+ obj-y	+= raw/
--- 
-2.25.1
-
diff --git a/patches/ramips/0008-ramips-move-mt7621_nand-driver-to-files.patch b/patches/ramips/0008-ramips-move-mt7621_nand-driver-to-files.patch
deleted file mode 100644
index cdb600e4e..000000000
--- a/patches/ramips/0008-ramips-move-mt7621_nand-driver-to-files.patch
+++ /dev/null
@@ -1,2740 +0,0 @@
-From 897e51080f5d0e9bf99ac7108e7444319b8c6f99 Mon Sep 17 00:00:00 2001
-From: Stijn Tintel <stijn@linux-ipv6.be>
-Date: Wed, 19 Jan 2022 15:44:58 +0200
-Subject: [PATCH 08/14] ramips: move mt7621_nand driver to files
-
-The patch was rejected by upstream. The mtk_nand driver should be
-modified to support the mt7621 flash controller instead. As there is no
-newer version to backport, or no upstream version to fix bugs, let's
-move the driver to the files dir under the ramips target. This makes it
-easier to make changes to the driver while waiting for mt7621 support to
-land in mtk_nand.
-
-Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
----
- .../files/drivers/mtd/nand/raw/mt7621_nand.c  | 1350 ++++++++++++++++
- ...driver-support-for-MT7621-nand-flash.patch | 1354 +----------------
- 2 files changed, 1351 insertions(+), 1353 deletions(-)
- create mode 100644 target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
-
-diff --git a/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c b/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
-new file mode 100644
-index 0000000000..678295a68d
---- /dev/null
-+++ b/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
-@@ -0,0 +1,1350 @@
-+// SPDX-License-Identifier: GPL-2.0
-+/*
-+ * MediaTek MT7621 NAND Flash Controller driver
-+ *
-+ * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
-+ *
-+ * Author: Weijie Gao <weijie.gao@mediatek.com>
-+ */
-+
-+#include <linux/io.h>
-+#include <linux/clk.h>
-+#include <linux/init.h>
-+#include <linux/errno.h>
-+#include <linux/sizes.h>
-+#include <linux/iopoll.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/rawnand.h>
-+#include <linux/mtd/partitions.h>
-+#include <linux/platform_device.h>
-+#include <asm/addrspace.h>
-+
-+/* NFI core registers */
-+#define NFI_CNFG			0x000
-+#define   CNFG_OP_MODE_S		12
-+#define   CNFG_OP_MODE_M		GENMASK(14, 12)
-+#define     CNFG_OP_CUSTOM		6
-+#define   CNFG_AUTO_FMT_EN		BIT(9)
-+#define   CNFG_HW_ECC_EN		BIT(8)
-+#define   CNFG_BYTE_RW			BIT(6)
-+#define   CNFG_READ_MODE		BIT(1)
-+
-+#define NFI_PAGEFMT			0x004
-+#define   PAGEFMT_FDM_ECC_S		12
-+#define   PAGEFMT_FDM_ECC_M		GENMASK(15, 12)
-+#define   PAGEFMT_FDM_S			8
-+#define   PAGEFMT_FDM_M			GENMASK(11, 8)
-+#define   PAGEFMT_SPARE_S		4
-+#define   PAGEFMT_SPARE_M		GENMASK(5, 4)
-+#define   PAGEFMT_PAGE_S		0
-+#define   PAGEFMT_PAGE_M		GENMASK(1, 0)
-+
-+#define NFI_CON				0x008
-+#define   CON_NFI_SEC_S			12
-+#define   CON_NFI_SEC_M			GENMASK(15, 12)
-+#define   CON_NFI_BWR			BIT(9)
-+#define   CON_NFI_BRD			BIT(8)
-+#define   CON_NFI_RST			BIT(1)
-+#define   CON_FIFO_FLUSH		BIT(0)
-+
-+#define NFI_ACCCON			0x00c
-+#define   ACCCON_POECS_S		28
-+#define   ACCCON_POECS_MAX		0x0f
-+#define   ACCCON_POECS_DEF		3
-+#define   ACCCON_PRECS_S		22
-+#define   ACCCON_PRECS_MAX		0x3f
-+#define   ACCCON_PRECS_DEF		3
-+#define   ACCCON_C2R_S			16
-+#define   ACCCON_C2R_MAX		0x3f
-+#define   ACCCON_C2R_DEF		7
-+#define   ACCCON_W2R_S			12
-+#define   ACCCON_W2R_MAX		0x0f
-+#define   ACCCON_W2R_DEF		7
-+#define   ACCCON_WH_S			8
-+#define   ACCCON_WH_MAX			0x0f
-+#define   ACCCON_WH_DEF			15
-+#define   ACCCON_WST_S			4
-+#define   ACCCON_WST_MAX		0x0f
-+#define   ACCCON_WST_DEF		15
-+#define   ACCCON_WST_MIN		3
-+#define   ACCCON_RLT_S			0
-+#define   ACCCON_RLT_MAX		0x0f
-+#define   ACCCON_RLT_DEF		15
-+#define   ACCCON_RLT_MIN		3
-+
-+#define NFI_CMD				0x020
-+
-+#define NFI_ADDRNOB			0x030
-+#define   ADDR_ROW_NOB_S		4
-+#define   ADDR_ROW_NOB_M		GENMASK(6, 4)
-+#define   ADDR_COL_NOB_S		0
-+#define   ADDR_COL_NOB_M		GENMASK(2, 0)
-+
-+#define NFI_COLADDR			0x034
-+#define NFI_ROWADDR			0x038
-+
-+#define NFI_STRDATA			0x040
-+#define   STR_DATA			BIT(0)
-+
-+#define NFI_CNRNB			0x044
-+#define   CB2R_TIME_S			4
-+#define   CB2R_TIME_M			GENMASK(7, 4)
-+#define   STR_CNRNB			BIT(0)
-+
-+#define NFI_DATAW			0x050
-+#define NFI_DATAR			0x054
-+
-+#define NFI_PIO_DIRDY			0x058
-+#define   PIO_DIRDY			BIT(0)
-+
-+#define NFI_STA				0x060
-+#define   STA_NFI_FSM_S			16
-+#define   STA_NFI_FSM_M			GENMASK(19, 16)
-+#define     STA_FSM_CUSTOM_DATA		14
-+#define   STA_BUSY			BIT(8)
-+#define   STA_ADDR			BIT(1)
-+#define   STA_CMD			BIT(0)
-+
-+#define NFI_ADDRCNTR			0x070
-+#define   SEC_CNTR_S			12
-+#define   SEC_CNTR_M			GENMASK(15, 12)
-+#define   SEC_ADDR_S			0
-+#define   SEC_ADDR_M			GENMASK(9, 0)
-+
-+#define NFI_CSEL			0x090
-+#define   CSEL_S			0
-+#define   CSEL_M			GENMASK(1, 0)
-+
-+#define NFI_FDM0L			0x0a0
-+#define NFI_FDML(n)			(0x0a0 + ((n) << 3))
-+
-+#define NFI_FDM0M			0x0a4
-+#define NFI_FDMM(n)			(0x0a4 + ((n) << 3))
-+
-+#define NFI_MASTER_STA			0x210
-+#define   MAS_ADDR			GENMASK(11, 9)
-+#define   MAS_RD			GENMASK(8, 6)
-+#define   MAS_WR			GENMASK(5, 3)
-+#define   MAS_RDDLY			GENMASK(2, 0)
-+
-+/* ECC engine registers */
-+#define ECC_ENCCON			0x000
-+#define   ENC_EN			BIT(0)
-+
-+#define ECC_ENCCNFG			0x004
-+#define   ENC_CNFG_MSG_S		16
-+#define   ENC_CNFG_MSG_M		GENMASK(28, 16)
-+#define   ENC_MODE_S			4
-+#define   ENC_MODE_M			GENMASK(5, 4)
-+#define     ENC_MODE_NFI		1
-+#define   ENC_TNUM_S			0
-+#define   ENC_TNUM_M			GENMASK(2, 0)
-+
-+#define ECC_ENCIDLE			0x00c
-+#define   ENC_IDLE			BIT(0)
-+
-+#define ECC_DECCON			0x100
-+#define   DEC_EN			BIT(0)
-+
-+#define ECC_DECCNFG			0x104
-+#define   DEC_EMPTY_EN			BIT(31)
-+#define   DEC_CS_S			16
-+#define   DEC_CS_M			GENMASK(28, 16)
-+#define   DEC_CON_S			12
-+#define   DEC_CON_M			GENMASK(13, 12)
-+#define     DEC_CON_EL			2
-+#define   DEC_MODE_S			4
-+#define   DEC_MODE_M			GENMASK(5, 4)
-+#define     DEC_MODE_NFI		1
-+#define   DEC_TNUM_S			0
-+#define   DEC_TNUM_M			GENMASK(2, 0)
-+
-+#define ECC_DECIDLE			0x10c
-+#define   DEC_IDLE			BIT(1)
-+
-+#define ECC_DECENUM			0x114
-+#define   ERRNUM_S			2
-+#define   ERRNUM_M			GENMASK(3, 0)
-+
-+#define ECC_DECDONE			0x118
-+#define   DEC_DONE7			BIT(7)
-+#define   DEC_DONE6			BIT(6)
-+#define   DEC_DONE5			BIT(5)
-+#define   DEC_DONE4			BIT(4)
-+#define   DEC_DONE3			BIT(3)
-+#define   DEC_DONE2			BIT(2)
-+#define   DEC_DONE1			BIT(1)
-+#define   DEC_DONE0			BIT(0)
-+
-+#define ECC_DECEL(n)			(0x11c + (n) * 4)
-+#define   DEC_EL_ODD_S			16
-+#define   DEC_EL_EVEN_S			0
-+#define   DEC_EL_M			0x1fff
-+#define   DEC_EL_BYTE_POS_S		3
-+#define   DEC_EL_BIT_POS_M		GENMASK(2, 0)
-+
-+#define ECC_FDMADDR			0x13c
-+
-+/* ENCIDLE and DECIDLE */
-+#define   ECC_IDLE			BIT(0)
-+
-+#define ACCTIMING(tpoecs, tprecs, tc2r, tw2r, twh, twst, trlt) \
-+	((tpoecs) << ACCCON_POECS_S | (tprecs) << ACCCON_PRECS_S | \
-+	(tc2r) << ACCCON_C2R_S | (tw2r) << ACCCON_W2R_S | \
-+	(twh) << ACCCON_WH_S | (twst) << ACCCON_WST_S | (trlt))
-+
-+#define MASTER_STA_MASK			(MAS_ADDR | MAS_RD | MAS_WR | \
-+					 MAS_RDDLY)
-+#define NFI_RESET_TIMEOUT		1000000
-+#define NFI_CORE_TIMEOUT		500000
-+#define ECC_ENGINE_TIMEOUT		500000
-+
-+#define ECC_SECTOR_SIZE			512
-+#define ECC_PARITY_BITS			13
-+
-+#define NFI_FDM_SIZE		8
-+
-+#define MT7621_NFC_NAME			"mt7621-nand"
-+
-+struct mt7621_nfc {
-+	struct nand_controller controller;
-+	struct nand_chip nand;
-+	struct clk *nfi_clk;
-+	struct device *dev;
-+
-+	void __iomem *nfi_regs;
-+	void __iomem *ecc_regs;
-+
-+	u32 spare_per_sector;
-+};
-+
-+static const u16 mt7621_nfi_page_size[] = { SZ_512, SZ_2K, SZ_4K };
-+static const u8 mt7621_nfi_spare_size[] = { 16, 26, 27, 28 };
-+static const u8 mt7621_ecc_strength[] = { 4, 6, 8, 10, 12 };
-+
-+static inline u32 nfi_read32(struct mt7621_nfc *nfc, u32 reg)
-+{
-+	return readl(nfc->nfi_regs + reg);
-+}
-+
-+static inline void nfi_write32(struct mt7621_nfc *nfc, u32 reg, u32 val)
-+{
-+	writel(val, nfc->nfi_regs + reg);
-+}
-+
-+static inline u16 nfi_read16(struct mt7621_nfc *nfc, u32 reg)
-+{
-+	return readw(nfc->nfi_regs + reg);
-+}
-+
-+static inline void nfi_write16(struct mt7621_nfc *nfc, u32 reg, u16 val)
-+{
-+	writew(val, nfc->nfi_regs + reg);
-+}
-+
-+static inline void ecc_write16(struct mt7621_nfc *nfc, u32 reg, u16 val)
-+{
-+	writew(val, nfc->ecc_regs + reg);
-+}
-+
-+static inline u32 ecc_read32(struct mt7621_nfc *nfc, u32 reg)
-+{
-+	return readl(nfc->ecc_regs + reg);
-+}
-+
-+static inline void ecc_write32(struct mt7621_nfc *nfc, u32 reg, u32 val)
-+{
-+	return writel(val, nfc->ecc_regs + reg);
-+}
-+
-+static inline u8 *oob_fdm_ptr(struct nand_chip *nand, int sect)
-+{
-+	return nand->oob_poi + sect * NFI_FDM_SIZE;
-+}
-+
-+static inline u8 *oob_ecc_ptr(struct mt7621_nfc *nfc, int sect)
-+{
-+	struct nand_chip *nand = &nfc->nand;
-+
-+	return nand->oob_poi + nand->ecc.steps * NFI_FDM_SIZE +
-+		sect * (nfc->spare_per_sector - NFI_FDM_SIZE);
-+}
-+
-+static inline u8 *page_data_ptr(struct nand_chip *nand, const u8 *buf,
-+				int sect)
-+{
-+	return (u8 *)buf + sect * nand->ecc.size;
-+}
-+
-+static int mt7621_ecc_wait_idle(struct mt7621_nfc *nfc, u32 reg)
-+{
-+	struct device *dev = nfc->dev;
-+	u32 val;
-+	int ret;
-+
-+	ret = readw_poll_timeout_atomic(nfc->ecc_regs + reg, val,
-+					val & ECC_IDLE, 10,
-+					ECC_ENGINE_TIMEOUT);
-+	if (ret) {
-+		dev_warn(dev, "ECC engine timed out entering idle mode\n");
-+		return -EIO;
-+	}
-+
-+	return 0;
-+}
-+
-+static int mt7621_ecc_decoder_wait_done(struct mt7621_nfc *nfc, u32 sect)
-+{
-+	struct device *dev = nfc->dev;
-+	u32 val;
-+	int ret;
-+
-+	ret = readw_poll_timeout_atomic(nfc->ecc_regs + ECC_DECDONE, val,
-+					val & (1 << sect), 10,
-+					ECC_ENGINE_TIMEOUT);
-+
-+	if (ret) {
-+		dev_warn(dev, "ECC decoder for sector %d timed out\n",
-+			 sect);
-+		return -ETIMEDOUT;
-+	}
-+
-+	return 0;
-+}
-+
-+static void mt7621_ecc_encoder_op(struct mt7621_nfc *nfc, bool enable)
-+{
-+	mt7621_ecc_wait_idle(nfc, ECC_ENCIDLE);
-+	ecc_write16(nfc, ECC_ENCCON, enable ? ENC_EN : 0);
-+}
-+
-+static void mt7621_ecc_decoder_op(struct mt7621_nfc *nfc, bool enable)
-+{
-+	mt7621_ecc_wait_idle(nfc, ECC_DECIDLE);
-+	ecc_write16(nfc, ECC_DECCON, enable ? DEC_EN : 0);
-+}
-+
-+static int mt7621_ecc_correct_check(struct mt7621_nfc *nfc, u8 *sector_buf,
-+				   u8 *fdm_buf, u32 sect)
-+{
-+	struct nand_chip *nand = &nfc->nand;
-+	u32 decnum, num_error_bits, fdm_end_bits;
-+	u32 error_locations, error_bit_loc;
-+	u32 error_byte_pos, error_bit_pos;
-+	int bitflips = 0;
-+	u32 i;
-+
-+	decnum = ecc_read32(nfc, ECC_DECENUM);
-+	num_error_bits = (decnum >> (sect << ERRNUM_S)) & ERRNUM_M;
-+	fdm_end_bits = (nand->ecc.size + NFI_FDM_SIZE) << 3;
-+
-+	if (!num_error_bits)
-+		return 0;
-+
-+	if (num_error_bits == ERRNUM_M)
-+		return -1;
-+
-+	for (i = 0; i < num_error_bits; i++) {
-+		error_locations = ecc_read32(nfc, ECC_DECEL(i / 2));
-+		error_bit_loc = (error_locations >> ((i % 2) * DEC_EL_ODD_S)) &
-+				DEC_EL_M;
-+		error_byte_pos = error_bit_loc >> DEC_EL_BYTE_POS_S;
-+		error_bit_pos = error_bit_loc & DEC_EL_BIT_POS_M;
-+
-+		if (error_bit_loc < (nand->ecc.size << 3)) {
-+			if (sector_buf) {
-+				sector_buf[error_byte_pos] ^=
-+					(1 << error_bit_pos);
-+			}
-+		} else if (error_bit_loc < fdm_end_bits) {
-+			if (fdm_buf) {
-+				fdm_buf[error_byte_pos - nand->ecc.size] ^=
-+					(1 << error_bit_pos);
-+			}
-+		}
-+
-+		bitflips++;
-+	}
-+
-+	return bitflips;
-+}
-+
-+static int mt7621_nfc_wait_write_completion(struct mt7621_nfc *nfc,
-+					    struct nand_chip *nand)
-+{
-+	struct device *dev = nfc->dev;
-+	u16 val;
-+	int ret;
-+
-+	ret = readw_poll_timeout_atomic(nfc->nfi_regs + NFI_ADDRCNTR, val,
-+		((val & SEC_CNTR_M) >> SEC_CNTR_S) >= nand->ecc.steps, 10,
-+		NFI_CORE_TIMEOUT);
-+
-+	if (ret) {
-+		dev_warn(dev, "NFI core write operation timed out\n");
-+		return -ETIMEDOUT;
-+	}
-+
-+	return ret;
-+}
-+
-+static void mt7621_nfc_hw_reset(struct mt7621_nfc *nfc)
-+{
-+	u32 val;
-+	int ret;
-+
-+	/* reset all registers and force the NFI master to terminate */
-+	nfi_write16(nfc, NFI_CON, CON_FIFO_FLUSH | CON_NFI_RST);
-+
-+	/* wait for the master to finish the last transaction */
-+	ret = readw_poll_timeout(nfc->nfi_regs + NFI_MASTER_STA, val,
-+				 !(val & MASTER_STA_MASK), 50,
-+				 NFI_RESET_TIMEOUT);
-+	if (ret) {
-+		dev_warn(nfc->dev, "Failed to reset NFI master in %dms\n",
-+			 NFI_RESET_TIMEOUT);
-+	}
-+
-+	/* ensure any status register affected by the NFI master is reset */
-+	nfi_write16(nfc, NFI_CON, CON_FIFO_FLUSH | CON_NFI_RST);
-+	nfi_write16(nfc, NFI_STRDATA, 0);
-+}
-+
-+static inline void mt7621_nfc_hw_init(struct mt7621_nfc *nfc)
-+{
-+	u32 acccon;
-+
-+	/*
-+	 * CNRNB: nand ready/busy register
-+	 * -------------------------------
-+	 * 7:4: timeout register for polling the NAND busy/ready signal
-+	 * 0  : poll the status of the busy/ready signal after [7:4]*16 cycles.
-+	 */
-+	nfi_write16(nfc, NFI_CNRNB, CB2R_TIME_M | STR_CNRNB);
-+
-+	mt7621_nfc_hw_reset(nfc);
-+
-+	/* Apply default access timing */
-+	acccon = ACCTIMING(ACCCON_POECS_DEF, ACCCON_PRECS_DEF, ACCCON_C2R_DEF,
-+			   ACCCON_W2R_DEF, ACCCON_WH_DEF, ACCCON_WST_DEF,
-+			   ACCCON_RLT_DEF);
-+
-+	nfi_write32(nfc, NFI_ACCCON, acccon);
-+}
-+
-+static int mt7621_nfc_send_command(struct mt7621_nfc *nfc, u8 command)
-+{
-+	struct device *dev = nfc->dev;
-+	u32 val;
-+	int ret;
-+
-+	nfi_write32(nfc, NFI_CMD, command);
-+
-+	ret = readl_poll_timeout_atomic(nfc->nfi_regs + NFI_STA, val,
-+					!(val & STA_CMD), 10,
-+					NFI_CORE_TIMEOUT);
-+	if (ret) {
-+		dev_warn(dev, "NFI core timed out entering command mode\n");
-+		return -EIO;
-+	}
-+
-+	return 0;
-+}
-+
-+static int mt7621_nfc_send_address_byte(struct mt7621_nfc *nfc, int addr)
-+{
-+	struct device *dev = nfc->dev;
-+	u32 val;
-+	int ret;
-+
-+	nfi_write32(nfc, NFI_COLADDR, addr);
-+	nfi_write32(nfc, NFI_ROWADDR, 0);
-+	nfi_write16(nfc, NFI_ADDRNOB, 1);
-+
-+	ret = readl_poll_timeout_atomic(nfc->nfi_regs + NFI_STA, val,
-+					!(val & STA_ADDR), 10,
-+					NFI_CORE_TIMEOUT);
-+	if (ret) {
-+		dev_warn(dev, "NFI core timed out entering address mode\n");
-+		return -EIO;
-+	}
-+
-+	return 0;
-+}
-+
-+static int mt7621_nfc_send_address(struct mt7621_nfc *nfc, const u8 *addr,
-+				   unsigned int naddrs)
-+{
-+	int ret;
-+
-+	while (naddrs) {
-+		ret = mt7621_nfc_send_address_byte(nfc, *addr);
-+		if (ret)
-+			return ret;
-+
-+		addr++;
-+		naddrs--;
-+	}
-+
-+	return 0;
-+}
-+
-+static void mt7621_nfc_wait_pio_ready(struct mt7621_nfc *nfc)
-+{
-+	struct device *dev = nfc->dev;
-+	int ret;
-+	u16 val;
-+
-+	ret = readw_poll_timeout_atomic(nfc->nfi_regs + NFI_PIO_DIRDY, val,
-+					val & PIO_DIRDY, 10,
-+					NFI_CORE_TIMEOUT);
-+	if (ret < 0)
-+		dev_err(dev, "NFI core PIO mode not ready\n");
-+}
-+
-+static u32 mt7621_nfc_pio_read(struct mt7621_nfc *nfc, bool br)
-+{
-+	u32 reg;
-+
-+	/* after each byte read, the NFI_STA reg is reset by the hardware */
-+	reg = (nfi_read32(nfc, NFI_STA) & STA_NFI_FSM_M) >> STA_NFI_FSM_S;
-+	if (reg != STA_FSM_CUSTOM_DATA) {
-+		reg = nfi_read16(nfc, NFI_CNFG);
-+		reg |= CNFG_READ_MODE | CNFG_BYTE_RW;
-+		if (!br)
-+			reg &= ~CNFG_BYTE_RW;
-+		nfi_write16(nfc, NFI_CNFG, reg);
-+
-+		/*
-+		 * set to max sector to allow the HW to continue reading over
-+		 * unaligned accesses
-+		 */
-+		nfi_write16(nfc, NFI_CON, CON_NFI_SEC_M | CON_NFI_BRD);
-+
-+		/* trigger to fetch data */
-+		nfi_write16(nfc, NFI_STRDATA, STR_DATA);
-+	}
-+
-+	mt7621_nfc_wait_pio_ready(nfc);
-+
-+	return nfi_read32(nfc, NFI_DATAR);
-+}
-+
-+static void mt7621_nfc_read_data(struct mt7621_nfc *nfc, u8 *buf, u32 len)
-+{
-+	while (((uintptr_t)buf & 3) && len) {
-+		*buf = mt7621_nfc_pio_read(nfc, true);
-+		buf++;
-+		len--;
-+	}
-+
-+	while (len >= 4) {
-+		*(u32 *)buf = mt7621_nfc_pio_read(nfc, false);
-+		buf += 4;
-+		len -= 4;
-+	}
-+
-+	while (len) {
-+		*buf = mt7621_nfc_pio_read(nfc, true);
-+		buf++;
-+		len--;
-+	}
-+}
-+
-+static void mt7621_nfc_read_data_discard(struct mt7621_nfc *nfc, u32 len)
-+{
-+	while (len >= 4) {
-+		mt7621_nfc_pio_read(nfc, false);
-+		len -= 4;
-+	}
-+
-+	while (len) {
-+		mt7621_nfc_pio_read(nfc, true);
-+		len--;
-+	}
-+}
-+
-+static void mt7621_nfc_pio_write(struct mt7621_nfc *nfc, u32 val, bool bw)
-+{
-+	u32 reg;
-+
-+	reg = (nfi_read32(nfc, NFI_STA) & STA_NFI_FSM_M) >> STA_NFI_FSM_S;
-+	if (reg != STA_FSM_CUSTOM_DATA) {
-+		reg = nfi_read16(nfc, NFI_CNFG);
-+		reg &= ~(CNFG_READ_MODE | CNFG_BYTE_RW);
-+		if (bw)
-+			reg |= CNFG_BYTE_RW;
-+		nfi_write16(nfc, NFI_CNFG, reg);
-+
-+		nfi_write16(nfc, NFI_CON, CON_NFI_SEC_M | CON_NFI_BWR);
-+		nfi_write16(nfc, NFI_STRDATA, STR_DATA);
-+	}
-+
-+	mt7621_nfc_wait_pio_ready(nfc);
-+	nfi_write32(nfc, NFI_DATAW, val);
-+}
-+
-+static void mt7621_nfc_write_data(struct mt7621_nfc *nfc, const u8 *buf,
-+				  u32 len)
-+{
-+	while (((uintptr_t)buf & 3) && len) {
-+		mt7621_nfc_pio_write(nfc, *buf, true);
-+		buf++;
-+		len--;
-+	}
-+
-+	while (len >= 4) {
-+		mt7621_nfc_pio_write(nfc, *(const u32 *)buf, false);
-+		buf += 4;
-+		len -= 4;
-+	}
-+
-+	while (len) {
-+		mt7621_nfc_pio_write(nfc, *buf, true);
-+		buf++;
-+		len--;
-+	}
-+}
-+
-+static void mt7621_nfc_write_data_empty(struct mt7621_nfc *nfc, u32 len)
-+{
-+	while (len >= 4) {
-+		mt7621_nfc_pio_write(nfc, 0xffffffff, false);
-+		len -= 4;
-+	}
-+
-+	while (len) {
-+		mt7621_nfc_pio_write(nfc, 0xff, true);
-+		len--;
-+	}
-+}
-+
-+static int mt7621_nfc_dev_ready(struct mt7621_nfc *nfc,
-+				unsigned int timeout_ms)
-+{
-+	u32 val;
-+
-+	return readl_poll_timeout_atomic(nfc->nfi_regs + NFI_STA, val,
-+					 !(val & STA_BUSY), 10,
-+					 timeout_ms * 1000);
-+}
-+
-+static int mt7621_nfc_exec_instr(struct nand_chip *nand,
-+				 const struct nand_op_instr *instr)
-+{
-+	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
-+
-+	switch (instr->type) {
-+	case NAND_OP_CMD_INSTR:
-+		mt7621_nfc_hw_reset(nfc);
-+		nfi_write16(nfc, NFI_CNFG, CNFG_OP_CUSTOM << CNFG_OP_MODE_S);
-+		return mt7621_nfc_send_command(nfc, instr->ctx.cmd.opcode);
-+	case NAND_OP_ADDR_INSTR:
-+		return mt7621_nfc_send_address(nfc, instr->ctx.addr.addrs,
-+					       instr->ctx.addr.naddrs);
-+	case NAND_OP_DATA_IN_INSTR:
-+		mt7621_nfc_read_data(nfc, instr->ctx.data.buf.in,
-+				     instr->ctx.data.len);
-+		return 0;
-+	case NAND_OP_DATA_OUT_INSTR:
-+		mt7621_nfc_write_data(nfc, instr->ctx.data.buf.out,
-+				      instr->ctx.data.len);
-+		return 0;
-+	case NAND_OP_WAITRDY_INSTR:
-+		return mt7621_nfc_dev_ready(nfc,
-+					    instr->ctx.waitrdy.timeout_ms);
-+	default:
-+		WARN_ONCE(1, "unsupported NAND instruction type: %d\n",
-+			  instr->type);
-+
-+		return -EINVAL;
-+	}
-+}
-+
-+static int mt7621_nfc_exec_op(struct nand_chip *nand,
-+			      const struct nand_operation *op, bool check_only)
-+{
-+	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
-+	int i, ret;
-+
-+	if (check_only)
-+		return 0;
-+
-+	/* Only CS0 available */
-+	nfi_write16(nfc, NFI_CSEL, 0);
-+
-+	for (i = 0; i < op->ninstrs; i++) {
-+		ret = mt7621_nfc_exec_instr(nand, &op->instrs[i]);
-+		if (ret)
-+			return ret;
-+	}
-+
-+	return 0;
-+}
-+
-+static int mt7621_nfc_setup_data_interface(struct nand_chip *nand, int csline,
-+					   const struct nand_data_interface *conf)
-+{
-+	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
-+	const struct nand_sdr_timings *timings;
-+	u32 acccon, temp, rate, tpoecs, tprecs, tc2r, tw2r, twh, twst, trlt;
-+
-+	if (!nfc->nfi_clk)
-+		return -ENOTSUPP;
-+
-+	timings = nand_get_sdr_timings(conf);
-+	if (IS_ERR(timings))
-+		return -ENOTSUPP;
-+
-+	rate = clk_get_rate(nfc->nfi_clk);
-+
-+	/* turn clock rate into KHZ */
-+	rate /= 1000;
-+
-+	tpoecs = max(timings->tALH_min, timings->tCLH_min) / 1000;
-+	tpoecs = DIV_ROUND_UP(tpoecs * rate, 1000000);
-+	tpoecs = min_t(u32, tpoecs, ACCCON_POECS_MAX);
-+
-+	tprecs = max(timings->tCLS_min, timings->tALS_min) / 1000;
-+	tprecs = DIV_ROUND_UP(tprecs * rate, 1000000);
-+	tprecs = min_t(u32, tprecs, ACCCON_PRECS_MAX);
-+
-+	/* sdr interface has no tCR which means CE# low to RE# low */
-+	tc2r = 0;
-+
-+	tw2r = timings->tWHR_min / 1000;
-+	tw2r = DIV_ROUND_UP(tw2r * rate, 1000000);
-+	tw2r = DIV_ROUND_UP(tw2r - 1, 2);
-+	tw2r = min_t(u32, tw2r, ACCCON_W2R_MAX);
-+
-+	twh = max(timings->tREH_min, timings->tWH_min) / 1000;
-+	twh = DIV_ROUND_UP(twh * rate, 1000000) - 1;
-+	twh = min_t(u32, twh, ACCCON_WH_MAX);
-+
-+	/* Calculate real WE#/RE# hold time in nanosecond */
-+	temp = (twh + 1) * 1000000 / rate;
-+	/* nanosecond to picosecond */
-+	temp *= 1000;
-+
-+	/*
-+	 * WE# low level time should be expaned to meet WE# pulse time
-+	 * and WE# cycle time at the same time.
-+	 */
-+	if (temp < timings->tWC_min)
-+		twst = timings->tWC_min - temp;
-+	else
-+		twst = 0;
-+	twst = max(timings->tWP_min, twst) / 1000;
-+	twst = DIV_ROUND_UP(twst * rate, 1000000) - 1;
-+	twst = min_t(u32, twst, ACCCON_WST_MAX);
-+
-+	/*
-+	 * RE# low level time should be expaned to meet RE# pulse time
-+	 * and RE# cycle time at the same time.
-+	 */
-+	if (temp < timings->tRC_min)
-+		trlt = timings->tRC_min - temp;
-+	else
-+		trlt = 0;
-+	trlt = max(trlt, timings->tRP_min) / 1000;
-+	trlt = DIV_ROUND_UP(trlt * rate, 1000000) - 1;
-+	trlt = min_t(u32, trlt, ACCCON_RLT_MAX);
-+
-+	if (csline == NAND_DATA_IFACE_CHECK_ONLY) {
-+		if (twst < ACCCON_WST_MIN || trlt < ACCCON_RLT_MIN)
-+			return -ENOTSUPP;
-+	}
-+
-+	acccon = ACCTIMING(tpoecs, tprecs, tc2r, tw2r, twh, twst, trlt);
-+
-+	dev_info(nfc->dev, "Using programmed access timing: %08x\n", acccon);
-+
-+	nfi_write32(nfc, NFI_ACCCON, acccon);
-+
-+	return 0;
-+}
-+
-+static int mt7621_nfc_calc_ecc_strength(struct mt7621_nfc *nfc,
-+					u32 avail_ecc_bytes)
-+{
-+	struct nand_chip *nand = &nfc->nand;
-+	struct mtd_info *mtd = nand_to_mtd(nand);
-+	u32 strength;
-+	int i;
-+
-+	strength = avail_ecc_bytes * 8 / ECC_PARITY_BITS;
-+
-+	/* Find the closest supported ecc strength */
-+	for (i = ARRAY_SIZE(mt7621_ecc_strength) - 1; i >= 0; i--) {
-+		if (mt7621_ecc_strength[i] <= strength)
-+			break;
-+	}
-+
-+	if (unlikely(i < 0)) {
-+		dev_err(nfc->dev, "OOB size (%u) is not supported\n",
-+			mtd->oobsize);
-+		return -EINVAL;
-+	}
-+
-+	nand->ecc.strength = mt7621_ecc_strength[i];
-+	nand->ecc.bytes =
-+		DIV_ROUND_UP(nand->ecc.strength * ECC_PARITY_BITS, 8);
-+
-+	dev_info(nfc->dev, "ECC strength adjusted to %u bits\n",
-+		 nand->ecc.strength);
-+
-+	return i;
-+}
-+
-+static int mt7621_nfc_set_spare_per_sector(struct mt7621_nfc *nfc)
-+{
-+	struct nand_chip *nand = &nfc->nand;
-+	struct mtd_info *mtd = nand_to_mtd(nand);
-+	u32 size;
-+	int i;
-+
-+	size = nand->ecc.bytes + NFI_FDM_SIZE;
-+
-+	/* Find the closest supported spare size */
-+	for (i = 0; i < ARRAY_SIZE(mt7621_nfi_spare_size); i++) {
-+		if (mt7621_nfi_spare_size[i] >= size)
-+			break;
-+	}
-+
-+	if (unlikely(i >= ARRAY_SIZE(mt7621_nfi_spare_size))) {
-+		dev_err(nfc->dev, "OOB size (%u) is not supported\n",
-+			mtd->oobsize);
-+		return -EINVAL;
-+	}
-+
-+	nfc->spare_per_sector = mt7621_nfi_spare_size[i];
-+
-+	return i;
-+}
-+
-+static int mt7621_nfc_ecc_init(struct mt7621_nfc *nfc)
-+{
-+	struct nand_chip *nand = &nfc->nand;
-+	struct mtd_info *mtd = nand_to_mtd(nand);
-+	u32 spare_per_sector, encode_block_size, decode_block_size;
-+	u32 ecc_enccfg, ecc_deccfg;
-+	int ecc_cap;
-+
-+	/* Only hardware ECC mode is supported */
-+	if (nand->ecc.mode != NAND_ECC_HW_SYNDROME) {
-+		dev_err(nfc->dev, "Only hardware ECC mode is supported\n");
-+		return -EINVAL;
-+	}
-+
-+	nand->ecc.size = ECC_SECTOR_SIZE;
-+	nand->ecc.steps = mtd->writesize / nand->ecc.size;
-+
-+	spare_per_sector = mtd->oobsize / nand->ecc.steps;
-+
-+	ecc_cap = mt7621_nfc_calc_ecc_strength(nfc,
-+		spare_per_sector - NFI_FDM_SIZE);
-+	if (ecc_cap < 0)
-+		return ecc_cap;
-+
-+	/* Sector + FDM */
-+	encode_block_size = (nand->ecc.size + NFI_FDM_SIZE) * 8;
-+	ecc_enccfg = ecc_cap | (ENC_MODE_NFI << ENC_MODE_S) |
-+		     (encode_block_size << ENC_CNFG_MSG_S);
-+
-+	/* Sector + FDM + ECC parity bits */
-+	decode_block_size = ((nand->ecc.size + NFI_FDM_SIZE) * 8) +
-+			    nand->ecc.strength * ECC_PARITY_BITS;
-+	ecc_deccfg = ecc_cap | (DEC_MODE_NFI << DEC_MODE_S) |
-+		     (decode_block_size << DEC_CS_S) |
-+		     (DEC_CON_EL << DEC_CON_S) | DEC_EMPTY_EN;
-+
-+	mt7621_ecc_encoder_op(nfc, false);
-+	ecc_write32(nfc, ECC_ENCCNFG, ecc_enccfg);
-+
-+	mt7621_ecc_decoder_op(nfc, false);
-+	ecc_write32(nfc, ECC_DECCNFG, ecc_deccfg);
-+
-+	return 0;
-+}
-+
-+static int mt7621_nfc_set_page_format(struct mt7621_nfc *nfc)
-+{
-+	struct nand_chip *nand = &nfc->nand;
-+	struct mtd_info *mtd = nand_to_mtd(nand);
-+	int i, spare_size;
-+	u32 pagefmt;
-+
-+	spare_size = mt7621_nfc_set_spare_per_sector(nfc);
-+	if (spare_size < 0)
-+		return spare_size;
-+
-+	for (i = 0; i < ARRAY_SIZE(mt7621_nfi_page_size); i++) {
-+		if (mt7621_nfi_page_size[i] == mtd->writesize)
-+			break;
-+	}
-+
-+	if (unlikely(i >= ARRAY_SIZE(mt7621_nfi_page_size))) {
-+		dev_err(nfc->dev, "Page size (%u) is not supported\n",
-+			mtd->writesize);
-+		return -EINVAL;
-+	}
-+
-+	pagefmt = i | (spare_size << PAGEFMT_SPARE_S) |
-+		  (NFI_FDM_SIZE << PAGEFMT_FDM_S) |
-+		  (NFI_FDM_SIZE << PAGEFMT_FDM_ECC_S);
-+
-+	nfi_write16(nfc, NFI_PAGEFMT, pagefmt);
-+
-+	return 0;
-+}
-+
-+static int mt7621_nfc_attach_chip(struct nand_chip *nand)
-+{
-+	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
-+	int ret;
-+
-+	if (nand->options & NAND_BUSWIDTH_16) {
-+		dev_err(nfc->dev, "16-bit buswidth is not supported");
-+		return -EINVAL;
-+	}
-+
-+	ret = mt7621_nfc_ecc_init(nfc);
-+	if (ret)
-+		return ret;
-+
-+	return mt7621_nfc_set_page_format(nfc);
-+}
-+
-+static const struct nand_controller_ops mt7621_nfc_controller_ops = {
-+	.attach_chip = mt7621_nfc_attach_chip,
-+	.exec_op = mt7621_nfc_exec_op,
-+	.setup_data_interface = mt7621_nfc_setup_data_interface,
-+};
-+
-+static int mt7621_nfc_ooblayout_free(struct mtd_info *mtd, int section,
-+				     struct mtd_oob_region *oob_region)
-+{
-+	struct nand_chip *nand = mtd_to_nand(mtd);
-+
-+	if (section >= nand->ecc.steps)
-+		return -ERANGE;
-+
-+	oob_region->length = NFI_FDM_SIZE - 1;
-+	oob_region->offset = section * NFI_FDM_SIZE + 1;
-+
-+	return 0;
-+}
-+
-+static int mt7621_nfc_ooblayout_ecc(struct mtd_info *mtd, int section,
-+				    struct mtd_oob_region *oob_region)
-+{
-+	struct nand_chip *nand = mtd_to_nand(mtd);
-+
-+	if (section)
-+		return -ERANGE;
-+
-+	oob_region->offset = NFI_FDM_SIZE * nand->ecc.steps;
-+	oob_region->length = mtd->oobsize - oob_region->offset;
-+
-+	return 0;
-+}
-+
-+static const struct mtd_ooblayout_ops mt7621_nfc_ooblayout_ops = {
-+	.free = mt7621_nfc_ooblayout_free,
-+	.ecc = mt7621_nfc_ooblayout_ecc,
-+};
-+
-+static void mt7621_nfc_write_fdm(struct mt7621_nfc *nfc)
-+{
-+	struct nand_chip *nand = &nfc->nand;
-+	u32 vall, valm;
-+	u8 *oobptr;
-+	int i, j;
-+
-+	for (i = 0; i < nand->ecc.steps; i++) {
-+		vall = 0;
-+		valm = 0;
-+		oobptr = oob_fdm_ptr(nand, i);
-+
-+		for (j = 0; j < 4; j++)
-+			vall |= (u32)oobptr[j] << (j * 8);
-+
-+		for (j = 0; j < 4; j++)
-+			valm |= (u32)oobptr[j + 4] << (j * 8);
-+
-+		nfi_write32(nfc, NFI_FDML(i), vall);
-+		nfi_write32(nfc, NFI_FDMM(i), valm);
-+	}
-+}
-+
-+static void mt7621_nfc_read_sector_fdm(struct mt7621_nfc *nfc, u32 sect)
-+{
-+	struct nand_chip *nand = &nfc->nand;
-+	u32 vall, valm;
-+	u8 *oobptr;
-+	int i;
-+
-+	vall = nfi_read32(nfc, NFI_FDML(sect));
-+	valm = nfi_read32(nfc, NFI_FDMM(sect));
-+	oobptr = oob_fdm_ptr(nand, sect);
-+
-+	for (i = 0; i < 4; i++)
-+		oobptr[i] = (vall >> (i * 8)) & 0xff;
-+
-+	for (i = 0; i < 4; i++)
-+		oobptr[i + 4] = (valm >> (i * 8)) & 0xff;
-+}
-+
-+static int mt7621_nfc_read_page_hwecc(struct nand_chip *nand, uint8_t *buf,
-+				      int oob_required, int page)
-+{
-+	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
-+	struct mtd_info *mtd = nand_to_mtd(nand);
-+	int bitflips = 0;
-+	int rc, i;
-+
-+	nand_read_page_op(nand, page, 0, NULL, 0);
-+
-+	nfi_write16(nfc, NFI_CNFG, (CNFG_OP_CUSTOM << CNFG_OP_MODE_S) |
-+		    CNFG_READ_MODE | CNFG_AUTO_FMT_EN | CNFG_HW_ECC_EN);
-+
-+	mt7621_ecc_decoder_op(nfc, true);
-+
-+	nfi_write16(nfc, NFI_CON,
-+		    CON_NFI_BRD | (nand->ecc.steps << CON_NFI_SEC_S));
-+
-+	for (i = 0; i < nand->ecc.steps; i++) {
-+		if (buf)
-+			mt7621_nfc_read_data(nfc, page_data_ptr(nand, buf, i),
-+					     nand->ecc.size);
-+		else
-+			mt7621_nfc_read_data_discard(nfc, nand->ecc.size);
-+
-+		rc = mt7621_ecc_decoder_wait_done(nfc, i);
-+
-+		mt7621_nfc_read_sector_fdm(nfc, i);
-+
-+		if (rc < 0) {
-+			bitflips = -EIO;
-+			continue;
-+		}
-+
-+		rc = mt7621_ecc_correct_check(nfc,
-+			buf ? page_data_ptr(nand, buf, i) : NULL,
-+			oob_fdm_ptr(nand, i), i);
-+
-+		if (rc < 0) {
-+			dev_dbg(nfc->dev,
-+				 "Uncorrectable ECC error at page %d.%d\n",
-+				 page, i);
-+			bitflips = -EBADMSG;
-+			mtd->ecc_stats.failed++;
-+		} else if (bitflips >= 0) {
-+			bitflips += rc;
-+			mtd->ecc_stats.corrected += rc;
-+		}
-+	}
-+
-+	mt7621_ecc_decoder_op(nfc, false);
-+
-+	nfi_write16(nfc, NFI_CON, 0);
-+
-+	return bitflips;
-+}
-+
-+static int mt7621_nfc_read_page_raw(struct nand_chip *nand, uint8_t *buf,
-+				    int oob_required, int page)
-+{
-+	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
-+	int i;
-+
-+	nand_read_page_op(nand, page, 0, NULL, 0);
-+
-+	nfi_write16(nfc, NFI_CNFG, (CNFG_OP_CUSTOM << CNFG_OP_MODE_S) |
-+		    CNFG_READ_MODE);
-+
-+	nfi_write16(nfc, NFI_CON,
-+		    CON_NFI_BRD | (nand->ecc.steps << CON_NFI_SEC_S));
-+
-+	for (i = 0; i < nand->ecc.steps; i++) {
-+		/* Read data */
-+		if (buf)
-+			mt7621_nfc_read_data(nfc, page_data_ptr(nand, buf, i),
-+					     nand->ecc.size);
-+		else
-+			mt7621_nfc_read_data_discard(nfc, nand->ecc.size);
-+
-+		/* Read FDM */
-+		mt7621_nfc_read_data(nfc, oob_fdm_ptr(nand, i), NFI_FDM_SIZE);
-+
-+		/* Read ECC parity data */
-+		mt7621_nfc_read_data(nfc, oob_ecc_ptr(nfc, i),
-+				     nfc->spare_per_sector - NFI_FDM_SIZE);
-+	}
-+
-+	nfi_write16(nfc, NFI_CON, 0);
-+
-+	return 0;
-+}
-+
-+static int mt7621_nfc_read_oob_hwecc(struct nand_chip *nand, int page)
-+{
-+	return mt7621_nfc_read_page_hwecc(nand, NULL, 1, page);
-+}
-+
-+static int mt7621_nfc_read_oob_raw(struct nand_chip *nand, int page)
-+{
-+	return mt7621_nfc_read_page_raw(nand, NULL, 1, page);
-+}
-+
-+static int mt7621_nfc_check_empty_page(struct nand_chip *nand, const u8 *buf)
-+{
-+	struct mtd_info *mtd = nand_to_mtd(nand);
-+	uint32_t i, j;
-+	u8 *oobptr;
-+
-+	if (buf) {
-+		for (i = 0; i < mtd->writesize; i++)
-+			if (buf[i] != 0xff)
-+				return 0;
-+	}
-+
-+	for (i = 0; i < nand->ecc.steps; i++) {
-+		oobptr = oob_fdm_ptr(nand, i);
-+		for (j = 0; j < NFI_FDM_SIZE; j++)
-+			if (oobptr[j] != 0xff)
-+				return 0;
-+	}
-+
-+	return 1;
-+}
-+
-+static int mt7621_nfc_write_page_hwecc(struct nand_chip *nand,
-+				       const uint8_t *buf, int oob_required,
-+				       int page)
-+{
-+	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
-+	struct mtd_info *mtd = nand_to_mtd(nand);
-+
-+	if (mt7621_nfc_check_empty_page(nand, buf)) {
-+		/*
-+		 * MT7621 ECC engine always generates parity code for input
-+		 * pages, even for empty pages. Doing so will write back ECC
-+		 * parity code to the oob region, which means such pages will
-+		 * no longer be empty pages.
-+		 *
-+		 * To avoid this, stop write operation if current page is an
-+		 * empty page.
-+		 */
-+		return 0;
-+	}
-+
-+	nand_prog_page_begin_op(nand, page, 0, NULL, 0);
-+
-+	nfi_write16(nfc, NFI_CNFG, (CNFG_OP_CUSTOM << CNFG_OP_MODE_S) |
-+		   CNFG_AUTO_FMT_EN | CNFG_HW_ECC_EN);
-+
-+	mt7621_ecc_encoder_op(nfc, true);
-+
-+	mt7621_nfc_write_fdm(nfc);
-+
-+	nfi_write16(nfc, NFI_CON,
-+		    CON_NFI_BWR | (nand->ecc.steps << CON_NFI_SEC_S));
-+
-+	if (buf)
-+		mt7621_nfc_write_data(nfc, buf, mtd->writesize);
-+	else
-+		mt7621_nfc_write_data_empty(nfc, mtd->writesize);
-+
-+	mt7621_nfc_wait_write_completion(nfc, nand);
-+
-+	mt7621_ecc_encoder_op(nfc, false);
-+
-+	nfi_write16(nfc, NFI_CON, 0);
-+
-+	return nand_prog_page_end_op(nand);
-+}
-+
-+static int mt7621_nfc_write_page_raw(struct nand_chip *nand,
-+				     const uint8_t *buf, int oob_required,
-+				     int page)
-+{
-+	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
-+	int i;
-+
-+	nand_prog_page_begin_op(nand, page, 0, NULL, 0);
-+
-+	nfi_write16(nfc, NFI_CNFG, (CNFG_OP_CUSTOM << CNFG_OP_MODE_S));
-+
-+	nfi_write16(nfc, NFI_CON,
-+		    CON_NFI_BWR | (nand->ecc.steps << CON_NFI_SEC_S));
-+
-+	for (i = 0; i < nand->ecc.steps; i++) {
-+		/* Write data */
-+		if (buf)
-+			mt7621_nfc_write_data(nfc, page_data_ptr(nand, buf, i),
-+					      nand->ecc.size);
-+		else
-+			mt7621_nfc_write_data_empty(nfc, nand->ecc.size);
-+
-+		/* Write FDM */
-+		mt7621_nfc_write_data(nfc, oob_fdm_ptr(nand, i),
-+				      NFI_FDM_SIZE);
-+
-+		/* Write dummy ECC parity data */
-+		mt7621_nfc_write_data_empty(nfc, nfc->spare_per_sector -
-+					    NFI_FDM_SIZE);
-+	}
-+
-+	mt7621_nfc_wait_write_completion(nfc, nand);
-+
-+	nfi_write16(nfc, NFI_CON, 0);
-+
-+	return nand_prog_page_end_op(nand);
-+}
-+
-+static int mt7621_nfc_write_oob_hwecc(struct nand_chip *nand, int page)
-+{
-+	return mt7621_nfc_write_page_hwecc(nand, NULL, 1, page);
-+}
-+
-+static int mt7621_nfc_write_oob_raw(struct nand_chip *nand, int page)
-+{
-+	return mt7621_nfc_write_page_raw(nand, NULL, 1, page);
-+}
-+
-+static int mt7621_nfc_init_chip(struct mt7621_nfc *nfc)
-+{
-+	struct nand_chip *nand = &nfc->nand;
-+	struct mtd_info *mtd;
-+	int ret;
-+
-+	nand->controller = &nfc->controller;
-+	nand_set_controller_data(nand, (void *)nfc);
-+	nand_set_flash_node(nand, nfc->dev->of_node);
-+
-+	nand->options |= NAND_USE_BOUNCE_BUFFER | NAND_NO_SUBPAGE_WRITE;
-+	if (!nfc->nfi_clk)
-+		nand->options |= NAND_KEEP_TIMINGS;
-+
-+	nand->ecc.mode = NAND_ECC_HW_SYNDROME;
-+	nand->ecc.read_page = mt7621_nfc_read_page_hwecc;
-+	nand->ecc.read_page_raw = mt7621_nfc_read_page_raw;
-+	nand->ecc.write_page = mt7621_nfc_write_page_hwecc;
-+	nand->ecc.write_page_raw = mt7621_nfc_write_page_raw;
-+	nand->ecc.read_oob = mt7621_nfc_read_oob_hwecc;
-+	nand->ecc.read_oob_raw = mt7621_nfc_read_oob_raw;
-+	nand->ecc.write_oob = mt7621_nfc_write_oob_hwecc;
-+	nand->ecc.write_oob_raw = mt7621_nfc_write_oob_raw;
-+
-+	mtd = nand_to_mtd(nand);
-+	mtd->owner = THIS_MODULE;
-+	mtd->dev.parent = nfc->dev;
-+	mtd->name = MT7621_NFC_NAME;
-+	mtd_set_ooblayout(mtd, &mt7621_nfc_ooblayout_ops);
-+
-+	mt7621_nfc_hw_init(nfc);
-+
-+	ret = nand_scan(nand, 1);
-+	if (ret)
-+		return ret;
-+
-+	ret = mtd_device_register(mtd, NULL, 0);
-+	if (ret) {
-+		dev_err(nfc->dev, "Failed to register MTD: %d\n", ret);
-+		nand_release(nand);
-+		return ret;
-+	}
-+
-+	return 0;
-+}
-+
-+static int mt7621_nfc_probe(struct platform_device *pdev)
-+{
-+	struct device *dev = &pdev->dev;
-+	struct mt7621_nfc *nfc;
-+	struct resource *res;
-+	int ret;
-+
-+	nfc = devm_kzalloc(dev, sizeof(*nfc), GFP_KERNEL);
-+	if (!nfc)
-+		return -ENOMEM;
-+
-+	nand_controller_init(&nfc->controller);
-+	nfc->controller.ops = &mt7621_nfc_controller_ops;
-+	nfc->dev = dev;
-+
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nfi");
-+	nfc->nfi_regs = devm_ioremap_resource(dev, res);
-+	if (IS_ERR(nfc->nfi_regs)) {
-+		ret = PTR_ERR(nfc->nfi_regs);
-+		return ret;
-+	}
-+
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ecc");
-+	nfc->ecc_regs = devm_ioremap_resource(dev, res);
-+	if (IS_ERR(nfc->ecc_regs)) {
-+		ret = PTR_ERR(nfc->ecc_regs);
-+		return ret;
-+	}
-+
-+	nfc->nfi_clk = devm_clk_get(dev, "nfi_clk");
-+	if (IS_ERR(nfc->nfi_clk)) {
-+		dev_warn(dev, "nfi clk not provided\n");
-+		nfc->nfi_clk = NULL;
-+	} else {
-+		ret = clk_prepare_enable(nfc->nfi_clk);
-+		if (ret) {
-+			dev_err(dev, "Failed to enable nfi core clock\n");
-+			return ret;
-+		}
-+	}
-+
-+	platform_set_drvdata(pdev, nfc);
-+
-+	ret = mt7621_nfc_init_chip(nfc);
-+	if (ret) {
-+		dev_err(dev, "Failed to initialize nand chip\n");
-+		goto clk_disable;
-+	}
-+
-+	return 0;
-+
-+clk_disable:
-+	clk_disable_unprepare(nfc->nfi_clk);
-+
-+	return ret;
-+}
-+
-+static int mt7621_nfc_remove(struct platform_device *pdev)
-+{
-+	struct mt7621_nfc *nfc = platform_get_drvdata(pdev);
-+
-+	nand_release(&nfc->nand);
-+	clk_disable_unprepare(nfc->nfi_clk);
-+
-+	return 0;
-+}
-+
-+static const struct of_device_id mt7621_nfc_id_table[] = {
-+	{ .compatible = "mediatek,mt7621-nfc" },
-+	{ },
-+};
-+MODULE_DEVICE_TABLE(of, match);
-+
-+static struct platform_driver mt7621_nfc_driver = {
-+	.probe = mt7621_nfc_probe,
-+	.remove = mt7621_nfc_remove,
-+	.driver = {
-+		.name = MT7621_NFC_NAME,
-+		.owner = THIS_MODULE,
-+		.of_match_table = mt7621_nfc_id_table,
-+	},
-+};
-+module_platform_driver(mt7621_nfc_driver);
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Weijie Gao <weijie.gao@mediatek.com>");
-+MODULE_DESCRIPTION("MediaTek MT7621 NAND Flash Controller driver");
-diff --git a/target/linux/ramips/patches-5.4/0300-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch b/target/linux/ramips/patches-5.4/0300-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch
-index ba844fed0f..586db208db 100644
---- a/target/linux/ramips/patches-5.4/0300-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch
-+++ b/target/linux/ramips/patches-5.4/0300-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch
-@@ -45,1356 +45,4 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
-  obj-$(CONFIG_MTD_NAND_MTK)		+= mtk_ecc.o mtk_nand.o
-  obj-$(CONFIG_MTD_NAND_MXIC)		+= mxic_nand.o
-  obj-$(CONFIG_MTD_NAND_TEGRA)		+= tegra_nand.o
----- /dev/null
--+++ b/drivers/mtd/nand/raw/mt7621_nand.c
--@@ -0,0 +1,1350 @@
--+// SPDX-License-Identifier: GPL-2.0
--+/*
--+ * MediaTek MT7621 NAND Flash Controller driver
--+ *
--+ * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
--+ *
--+ * Author: Weijie Gao <weijie.gao@mediatek.com>
--+ */
--+
--+#include <linux/io.h>
--+#include <linux/clk.h>
--+#include <linux/init.h>
--+#include <linux/errno.h>
--+#include <linux/sizes.h>
--+#include <linux/iopoll.h>
--+#include <linux/kernel.h>
--+#include <linux/module.h>
--+#include <linux/mtd/mtd.h>
--+#include <linux/mtd/rawnand.h>
--+#include <linux/mtd/partitions.h>
--+#include <linux/platform_device.h>
--+#include <asm/addrspace.h>
--+
--+/* NFI core registers */
--+#define NFI_CNFG			0x000
--+#define   CNFG_OP_MODE_S		12
--+#define   CNFG_OP_MODE_M		GENMASK(14, 12)
--+#define     CNFG_OP_CUSTOM		6
--+#define   CNFG_AUTO_FMT_EN		BIT(9)
--+#define   CNFG_HW_ECC_EN		BIT(8)
--+#define   CNFG_BYTE_RW			BIT(6)
--+#define   CNFG_READ_MODE		BIT(1)
--+
--+#define NFI_PAGEFMT			0x004
--+#define   PAGEFMT_FDM_ECC_S		12
--+#define   PAGEFMT_FDM_ECC_M		GENMASK(15, 12)
--+#define   PAGEFMT_FDM_S			8
--+#define   PAGEFMT_FDM_M			GENMASK(11, 8)
--+#define   PAGEFMT_SPARE_S		4
--+#define   PAGEFMT_SPARE_M		GENMASK(5, 4)
--+#define   PAGEFMT_PAGE_S		0
--+#define   PAGEFMT_PAGE_M		GENMASK(1, 0)
--+
--+#define NFI_CON				0x008
--+#define   CON_NFI_SEC_S			12
--+#define   CON_NFI_SEC_M			GENMASK(15, 12)
--+#define   CON_NFI_BWR			BIT(9)
--+#define   CON_NFI_BRD			BIT(8)
--+#define   CON_NFI_RST			BIT(1)
--+#define   CON_FIFO_FLUSH		BIT(0)
--+
--+#define NFI_ACCCON			0x00c
--+#define   ACCCON_POECS_S		28
--+#define   ACCCON_POECS_MAX		0x0f
--+#define   ACCCON_POECS_DEF		3
--+#define   ACCCON_PRECS_S		22
--+#define   ACCCON_PRECS_MAX		0x3f
--+#define   ACCCON_PRECS_DEF		3
--+#define   ACCCON_C2R_S			16
--+#define   ACCCON_C2R_MAX		0x3f
--+#define   ACCCON_C2R_DEF		7
--+#define   ACCCON_W2R_S			12
--+#define   ACCCON_W2R_MAX		0x0f
--+#define   ACCCON_W2R_DEF		7
--+#define   ACCCON_WH_S			8
--+#define   ACCCON_WH_MAX			0x0f
--+#define   ACCCON_WH_DEF			15
--+#define   ACCCON_WST_S			4
--+#define   ACCCON_WST_MAX		0x0f
--+#define   ACCCON_WST_DEF		15
--+#define   ACCCON_WST_MIN		3
--+#define   ACCCON_RLT_S			0
--+#define   ACCCON_RLT_MAX		0x0f
--+#define   ACCCON_RLT_DEF		15
--+#define   ACCCON_RLT_MIN		3
--+
--+#define NFI_CMD				0x020
--+
--+#define NFI_ADDRNOB			0x030
--+#define   ADDR_ROW_NOB_S		4
--+#define   ADDR_ROW_NOB_M		GENMASK(6, 4)
--+#define   ADDR_COL_NOB_S		0
--+#define   ADDR_COL_NOB_M		GENMASK(2, 0)
--+
--+#define NFI_COLADDR			0x034
--+#define NFI_ROWADDR			0x038
--+
--+#define NFI_STRDATA			0x040
--+#define   STR_DATA			BIT(0)
--+
--+#define NFI_CNRNB			0x044
--+#define   CB2R_TIME_S			4
--+#define   CB2R_TIME_M			GENMASK(7, 4)
--+#define   STR_CNRNB			BIT(0)
--+
--+#define NFI_DATAW			0x050
--+#define NFI_DATAR			0x054
--+
--+#define NFI_PIO_DIRDY			0x058
--+#define   PIO_DIRDY			BIT(0)
--+
--+#define NFI_STA				0x060
--+#define   STA_NFI_FSM_S			16
--+#define   STA_NFI_FSM_M			GENMASK(19, 16)
--+#define     STA_FSM_CUSTOM_DATA		14
--+#define   STA_BUSY			BIT(8)
--+#define   STA_ADDR			BIT(1)
--+#define   STA_CMD			BIT(0)
--+
--+#define NFI_ADDRCNTR			0x070
--+#define   SEC_CNTR_S			12
--+#define   SEC_CNTR_M			GENMASK(15, 12)
--+#define   SEC_ADDR_S			0
--+#define   SEC_ADDR_M			GENMASK(9, 0)
--+
--+#define NFI_CSEL			0x090
--+#define   CSEL_S			0
--+#define   CSEL_M			GENMASK(1, 0)
--+
--+#define NFI_FDM0L			0x0a0
--+#define NFI_FDML(n)			(0x0a0 + ((n) << 3))
--+
--+#define NFI_FDM0M			0x0a4
--+#define NFI_FDMM(n)			(0x0a4 + ((n) << 3))
--+
--+#define NFI_MASTER_STA			0x210
--+#define   MAS_ADDR			GENMASK(11, 9)
--+#define   MAS_RD			GENMASK(8, 6)
--+#define   MAS_WR			GENMASK(5, 3)
--+#define   MAS_RDDLY			GENMASK(2, 0)
--+
--+/* ECC engine registers */
--+#define ECC_ENCCON			0x000
--+#define   ENC_EN			BIT(0)
--+
--+#define ECC_ENCCNFG			0x004
--+#define   ENC_CNFG_MSG_S		16
--+#define   ENC_CNFG_MSG_M		GENMASK(28, 16)
--+#define   ENC_MODE_S			4
--+#define   ENC_MODE_M			GENMASK(5, 4)
--+#define     ENC_MODE_NFI		1
--+#define   ENC_TNUM_S			0
--+#define   ENC_TNUM_M			GENMASK(2, 0)
--+
--+#define ECC_ENCIDLE			0x00c
--+#define   ENC_IDLE			BIT(0)
--+
--+#define ECC_DECCON			0x100
--+#define   DEC_EN			BIT(0)
--+
--+#define ECC_DECCNFG			0x104
--+#define   DEC_EMPTY_EN			BIT(31)
--+#define   DEC_CS_S			16
--+#define   DEC_CS_M			GENMASK(28, 16)
--+#define   DEC_CON_S			12
--+#define   DEC_CON_M			GENMASK(13, 12)
--+#define     DEC_CON_EL			2
--+#define   DEC_MODE_S			4
--+#define   DEC_MODE_M			GENMASK(5, 4)
--+#define     DEC_MODE_NFI		1
--+#define   DEC_TNUM_S			0
--+#define   DEC_TNUM_M			GENMASK(2, 0)
--+
--+#define ECC_DECIDLE			0x10c
--+#define   DEC_IDLE			BIT(1)
--+
--+#define ECC_DECENUM			0x114
--+#define   ERRNUM_S			2
--+#define   ERRNUM_M			GENMASK(3, 0)
--+
--+#define ECC_DECDONE			0x118
--+#define   DEC_DONE7			BIT(7)
--+#define   DEC_DONE6			BIT(6)
--+#define   DEC_DONE5			BIT(5)
--+#define   DEC_DONE4			BIT(4)
--+#define   DEC_DONE3			BIT(3)
--+#define   DEC_DONE2			BIT(2)
--+#define   DEC_DONE1			BIT(1)
--+#define   DEC_DONE0			BIT(0)
--+
--+#define ECC_DECEL(n)			(0x11c + (n) * 4)
--+#define   DEC_EL_ODD_S			16
--+#define   DEC_EL_EVEN_S			0
--+#define   DEC_EL_M			0x1fff
--+#define   DEC_EL_BYTE_POS_S		3
--+#define   DEC_EL_BIT_POS_M		GENMASK(3, 0)
--+
--+#define ECC_FDMADDR			0x13c
--+
--+/* ENCIDLE and DECIDLE */
--+#define   ECC_IDLE			BIT(0)
--+
--+#define ACCTIMING(tpoecs, tprecs, tc2r, tw2r, twh, twst, trlt) \
--+	((tpoecs) << ACCCON_POECS_S | (tprecs) << ACCCON_PRECS_S | \
--+	(tc2r) << ACCCON_C2R_S | (tw2r) << ACCCON_W2R_S | \
--+	(twh) << ACCCON_WH_S | (twst) << ACCCON_WST_S | (trlt))
--+
--+#define MASTER_STA_MASK			(MAS_ADDR | MAS_RD | MAS_WR | \
--+					 MAS_RDDLY)
--+#define NFI_RESET_TIMEOUT		1000000
--+#define NFI_CORE_TIMEOUT		500000
--+#define ECC_ENGINE_TIMEOUT		500000
--+
--+#define ECC_SECTOR_SIZE			512
--+#define ECC_PARITY_BITS			13
--+
--+#define NFI_FDM_SIZE		8
--+
--+#define MT7621_NFC_NAME			"mt7621-nand"
--+
--+struct mt7621_nfc {
--+	struct nand_controller controller;
--+	struct nand_chip nand;
--+	struct clk *nfi_clk;
--+	struct device *dev;
--+
--+	void __iomem *nfi_regs;
--+	void __iomem *ecc_regs;
--+
--+	u32 spare_per_sector;
--+};
--+
--+static const u16 mt7621_nfi_page_size[] = { SZ_512, SZ_2K, SZ_4K };
--+static const u8 mt7621_nfi_spare_size[] = { 16, 26, 27, 28 };
--+static const u8 mt7621_ecc_strength[] = { 4, 6, 8, 10, 12 };
--+
--+static inline u32 nfi_read32(struct mt7621_nfc *nfc, u32 reg)
--+{
--+	return readl(nfc->nfi_regs + reg);
--+}
--+
--+static inline void nfi_write32(struct mt7621_nfc *nfc, u32 reg, u32 val)
--+{
--+	writel(val, nfc->nfi_regs + reg);
--+}
--+
--+static inline u16 nfi_read16(struct mt7621_nfc *nfc, u32 reg)
--+{
--+	return readw(nfc->nfi_regs + reg);
--+}
--+
--+static inline void nfi_write16(struct mt7621_nfc *nfc, u32 reg, u16 val)
--+{
--+	writew(val, nfc->nfi_regs + reg);
--+}
--+
--+static inline void ecc_write16(struct mt7621_nfc *nfc, u32 reg, u16 val)
--+{
--+	writew(val, nfc->ecc_regs + reg);
--+}
--+
--+static inline u32 ecc_read32(struct mt7621_nfc *nfc, u32 reg)
--+{
--+	return readl(nfc->ecc_regs + reg);
--+}
--+
--+static inline void ecc_write32(struct mt7621_nfc *nfc, u32 reg, u32 val)
--+{
--+	return writel(val, nfc->ecc_regs + reg);
--+}
--+
--+static inline u8 *oob_fdm_ptr(struct nand_chip *nand, int sect)
--+{
--+	return nand->oob_poi + sect * NFI_FDM_SIZE;
--+}
--+
--+static inline u8 *oob_ecc_ptr(struct mt7621_nfc *nfc, int sect)
--+{
--+	struct nand_chip *nand = &nfc->nand;
--+
--+	return nand->oob_poi + nand->ecc.steps * NFI_FDM_SIZE +
--+		sect * (nfc->spare_per_sector - NFI_FDM_SIZE);
--+}
--+
--+static inline u8 *page_data_ptr(struct nand_chip *nand, const u8 *buf,
--+				int sect)
--+{
--+	return (u8 *)buf + sect * nand->ecc.size;
--+}
--+
--+static int mt7621_ecc_wait_idle(struct mt7621_nfc *nfc, u32 reg)
--+{
--+	struct device *dev = nfc->dev;
--+	u32 val;
--+	int ret;
--+
--+	ret = readw_poll_timeout_atomic(nfc->ecc_regs + reg, val,
--+					val & ECC_IDLE, 10,
--+					ECC_ENGINE_TIMEOUT);
--+	if (ret) {
--+		dev_warn(dev, "ECC engine timed out entering idle mode\n");
--+		return -EIO;
--+	}
--+
--+	return 0;
--+}
--+
--+static int mt7621_ecc_decoder_wait_done(struct mt7621_nfc *nfc, u32 sect)
--+{
--+	struct device *dev = nfc->dev;
--+	u32 val;
--+	int ret;
--+
--+	ret = readw_poll_timeout_atomic(nfc->ecc_regs + ECC_DECDONE, val,
--+					val & (1 << sect), 10,
--+					ECC_ENGINE_TIMEOUT);
--+
--+	if (ret) {
--+		dev_warn(dev, "ECC decoder for sector %d timed out\n",
--+			 sect);
--+		return -ETIMEDOUT;
--+	}
--+
--+	return 0;
--+}
--+
--+static void mt7621_ecc_encoder_op(struct mt7621_nfc *nfc, bool enable)
--+{
--+	mt7621_ecc_wait_idle(nfc, ECC_ENCIDLE);
--+	ecc_write16(nfc, ECC_ENCCON, enable ? ENC_EN : 0);
--+}
--+
--+static void mt7621_ecc_decoder_op(struct mt7621_nfc *nfc, bool enable)
--+{
--+	mt7621_ecc_wait_idle(nfc, ECC_DECIDLE);
--+	ecc_write16(nfc, ECC_DECCON, enable ? DEC_EN : 0);
--+}
--+
--+static int mt7621_ecc_correct_check(struct mt7621_nfc *nfc, u8 *sector_buf,
--+				   u8 *fdm_buf, u32 sect)
--+{
--+	struct nand_chip *nand = &nfc->nand;
--+	u32 decnum, num_error_bits, fdm_end_bits;
--+	u32 error_locations, error_bit_loc;
--+	u32 error_byte_pos, error_bit_pos;
--+	int bitflips = 0;
--+	u32 i;
--+
--+	decnum = ecc_read32(nfc, ECC_DECENUM);
--+	num_error_bits = (decnum >> (sect << ERRNUM_S)) & ERRNUM_M;
--+	fdm_end_bits = (nand->ecc.size + NFI_FDM_SIZE) << 3;
--+
--+	if (!num_error_bits)
--+		return 0;
--+
--+	if (num_error_bits == ERRNUM_M)
--+		return -1;
--+
--+	for (i = 0; i < num_error_bits; i++) {
--+		error_locations = ecc_read32(nfc, ECC_DECEL(i / 2));
--+		error_bit_loc = (error_locations >> ((i % 2) * DEC_EL_ODD_S)) &
--+				DEC_EL_M;
--+		error_byte_pos = error_bit_loc >> DEC_EL_BYTE_POS_S;
--+		error_bit_pos = error_bit_loc & DEC_EL_BIT_POS_M;
--+
--+		if (error_bit_loc < (nand->ecc.size << 3)) {
--+			if (sector_buf) {
--+				sector_buf[error_byte_pos] ^=
--+					(1 << error_bit_pos);
--+			}
--+		} else if (error_bit_loc < fdm_end_bits) {
--+			if (fdm_buf) {
--+				fdm_buf[error_byte_pos - nand->ecc.size] ^=
--+					(1 << error_bit_pos);
--+			}
--+		}
--+
--+		bitflips++;
--+	}
--+
--+	return bitflips;
--+}
--+
--+static int mt7621_nfc_wait_write_completion(struct mt7621_nfc *nfc,
--+					    struct nand_chip *nand)
--+{
--+	struct device *dev = nfc->dev;
--+	u16 val;
--+	int ret;
--+
--+	ret = readw_poll_timeout_atomic(nfc->nfi_regs + NFI_ADDRCNTR, val,
--+		((val & SEC_CNTR_M) >> SEC_CNTR_S) >= nand->ecc.steps, 10,
--+		NFI_CORE_TIMEOUT);
--+
--+	if (ret) {
--+		dev_warn(dev, "NFI core write operation timed out\n");
--+		return -ETIMEDOUT;
--+	}
--+
--+	return ret;
--+}
--+
--+static void mt7621_nfc_hw_reset(struct mt7621_nfc *nfc)
--+{
--+	u32 val;
--+	int ret;
--+
--+	/* reset all registers and force the NFI master to terminate */
--+	nfi_write16(nfc, NFI_CON, CON_FIFO_FLUSH | CON_NFI_RST);
--+
--+	/* wait for the master to finish the last transaction */
--+	ret = readw_poll_timeout(nfc->nfi_regs + NFI_MASTER_STA, val,
--+				 !(val & MASTER_STA_MASK), 50,
--+				 NFI_RESET_TIMEOUT);
--+	if (ret) {
--+		dev_warn(nfc->dev, "Failed to reset NFI master in %dms\n",
--+			 NFI_RESET_TIMEOUT);
--+	}
--+
--+	/* ensure any status register affected by the NFI master is reset */
--+	nfi_write16(nfc, NFI_CON, CON_FIFO_FLUSH | CON_NFI_RST);
--+	nfi_write16(nfc, NFI_STRDATA, 0);
--+}
--+
--+static inline void mt7621_nfc_hw_init(struct mt7621_nfc *nfc)
--+{
--+	u32 acccon;
--+
--+	/*
--+	 * CNRNB: nand ready/busy register
--+	 * -------------------------------
--+	 * 7:4: timeout register for polling the NAND busy/ready signal
--+	 * 0  : poll the status of the busy/ready signal after [7:4]*16 cycles.
--+	 */
--+	nfi_write16(nfc, NFI_CNRNB, CB2R_TIME_M | STR_CNRNB);
--+
--+	mt7621_nfc_hw_reset(nfc);
--+
--+	/* Apply default access timing */
--+	acccon = ACCTIMING(ACCCON_POECS_DEF, ACCCON_PRECS_DEF, ACCCON_C2R_DEF,
--+			   ACCCON_W2R_DEF, ACCCON_WH_DEF, ACCCON_WST_DEF,
--+			   ACCCON_RLT_DEF);
--+
--+	nfi_write32(nfc, NFI_ACCCON, acccon);
--+}
--+
--+static int mt7621_nfc_send_command(struct mt7621_nfc *nfc, u8 command)
--+{
--+	struct device *dev = nfc->dev;
--+	u32 val;
--+	int ret;
--+
--+	nfi_write32(nfc, NFI_CMD, command);
--+
--+	ret = readl_poll_timeout_atomic(nfc->nfi_regs + NFI_STA, val,
--+					!(val & STA_CMD), 10,
--+					NFI_CORE_TIMEOUT);
--+	if (ret) {
--+		dev_warn(dev, "NFI core timed out entering command mode\n");
--+		return -EIO;
--+	}
--+
--+	return 0;
--+}
--+
--+static int mt7621_nfc_send_address_byte(struct mt7621_nfc *nfc, int addr)
--+{
--+	struct device *dev = nfc->dev;
--+	u32 val;
--+	int ret;
--+
--+	nfi_write32(nfc, NFI_COLADDR, addr);
--+	nfi_write32(nfc, NFI_ROWADDR, 0);
--+	nfi_write16(nfc, NFI_ADDRNOB, 1);
--+
--+	ret = readl_poll_timeout_atomic(nfc->nfi_regs + NFI_STA, val,
--+					!(val & STA_ADDR), 10,
--+					NFI_CORE_TIMEOUT);
--+	if (ret) {
--+		dev_warn(dev, "NFI core timed out entering address mode\n");
--+		return -EIO;
--+	}
--+
--+	return 0;
--+}
--+
--+static int mt7621_nfc_send_address(struct mt7621_nfc *nfc, const u8 *addr,
--+				   unsigned int naddrs)
--+{
--+	int ret;
--+
--+	while (naddrs) {
--+		ret = mt7621_nfc_send_address_byte(nfc, *addr);
--+		if (ret)
--+			return ret;
--+
--+		addr++;
--+		naddrs--;
--+	}
--+
--+	return 0;
--+}
--+
--+static void mt7621_nfc_wait_pio_ready(struct mt7621_nfc *nfc)
--+{
--+	struct device *dev = nfc->dev;
--+	int ret;
--+	u16 val;
--+
--+	ret = readw_poll_timeout_atomic(nfc->nfi_regs + NFI_PIO_DIRDY, val,
--+					val & PIO_DIRDY, 10,
--+					NFI_CORE_TIMEOUT);
--+	if (ret < 0)
--+		dev_err(dev, "NFI core PIO mode not ready\n");
--+}
--+
--+static u32 mt7621_nfc_pio_read(struct mt7621_nfc *nfc, bool br)
--+{
--+	u32 reg;
--+
--+	/* after each byte read, the NFI_STA reg is reset by the hardware */
--+	reg = (nfi_read32(nfc, NFI_STA) & STA_NFI_FSM_M) >> STA_NFI_FSM_S;
--+	if (reg != STA_FSM_CUSTOM_DATA) {
--+		reg = nfi_read16(nfc, NFI_CNFG);
--+		reg |= CNFG_READ_MODE | CNFG_BYTE_RW;
--+		if (!br)
--+			reg &= ~CNFG_BYTE_RW;
--+		nfi_write16(nfc, NFI_CNFG, reg);
--+
--+		/*
--+		 * set to max sector to allow the HW to continue reading over
--+		 * unaligned accesses
--+		 */
--+		nfi_write16(nfc, NFI_CON, CON_NFI_SEC_M | CON_NFI_BRD);
--+
--+		/* trigger to fetch data */
--+		nfi_write16(nfc, NFI_STRDATA, STR_DATA);
--+	}
--+
--+	mt7621_nfc_wait_pio_ready(nfc);
--+
--+	return nfi_read32(nfc, NFI_DATAR);
--+}
--+
--+static void mt7621_nfc_read_data(struct mt7621_nfc *nfc, u8 *buf, u32 len)
--+{
--+	while (((uintptr_t)buf & 3) && len) {
--+		*buf = mt7621_nfc_pio_read(nfc, true);
--+		buf++;
--+		len--;
--+	}
--+
--+	while (len >= 4) {
--+		*(u32 *)buf = mt7621_nfc_pio_read(nfc, false);
--+		buf += 4;
--+		len -= 4;
--+	}
--+
--+	while (len) {
--+		*buf = mt7621_nfc_pio_read(nfc, true);
--+		buf++;
--+		len--;
--+	}
--+}
--+
--+static void mt7621_nfc_read_data_discard(struct mt7621_nfc *nfc, u32 len)
--+{
--+	while (len >= 4) {
--+		mt7621_nfc_pio_read(nfc, false);
--+		len -= 4;
--+	}
--+
--+	while (len) {
--+		mt7621_nfc_pio_read(nfc, true);
--+		len--;
--+	}
--+}
--+
--+static void mt7621_nfc_pio_write(struct mt7621_nfc *nfc, u32 val, bool bw)
--+{
--+	u32 reg;
--+
--+	reg = (nfi_read32(nfc, NFI_STA) & STA_NFI_FSM_M) >> STA_NFI_FSM_S;
--+	if (reg != STA_FSM_CUSTOM_DATA) {
--+		reg = nfi_read16(nfc, NFI_CNFG);
--+		reg &= ~(CNFG_READ_MODE | CNFG_BYTE_RW);
--+		if (bw)
--+			reg |= CNFG_BYTE_RW;
--+		nfi_write16(nfc, NFI_CNFG, reg);
--+
--+		nfi_write16(nfc, NFI_CON, CON_NFI_SEC_M | CON_NFI_BWR);
--+		nfi_write16(nfc, NFI_STRDATA, STR_DATA);
--+	}
--+
--+	mt7621_nfc_wait_pio_ready(nfc);
--+	nfi_write32(nfc, NFI_DATAW, val);
--+}
--+
--+static void mt7621_nfc_write_data(struct mt7621_nfc *nfc, const u8 *buf,
--+				  u32 len)
--+{
--+	while (((uintptr_t)buf & 3) && len) {
--+		mt7621_nfc_pio_write(nfc, *buf, true);
--+		buf++;
--+		len--;
--+	}
--+
--+	while (len >= 4) {
--+		mt7621_nfc_pio_write(nfc, *(const u32 *)buf, false);
--+		buf += 4;
--+		len -= 4;
--+	}
--+
--+	while (len) {
--+		mt7621_nfc_pio_write(nfc, *buf, true);
--+		buf++;
--+		len--;
--+	}
--+}
--+
--+static void mt7621_nfc_write_data_empty(struct mt7621_nfc *nfc, u32 len)
--+{
--+	while (len >= 4) {
--+		mt7621_nfc_pio_write(nfc, 0xffffffff, false);
--+		len -= 4;
--+	}
--+
--+	while (len) {
--+		mt7621_nfc_pio_write(nfc, 0xff, true);
--+		len--;
--+	}
--+}
--+
--+static int mt7621_nfc_dev_ready(struct mt7621_nfc *nfc,
--+				unsigned int timeout_ms)
--+{
--+	u32 val;
--+
--+	return readl_poll_timeout_atomic(nfc->nfi_regs + NFI_STA, val,
--+					 !(val & STA_BUSY), 10,
--+					 timeout_ms * 1000);
--+}
--+
--+static int mt7621_nfc_exec_instr(struct nand_chip *nand,
--+				 const struct nand_op_instr *instr)
--+{
--+	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
--+
--+	switch (instr->type) {
--+	case NAND_OP_CMD_INSTR:
--+		mt7621_nfc_hw_reset(nfc);
--+		nfi_write16(nfc, NFI_CNFG, CNFG_OP_CUSTOM << CNFG_OP_MODE_S);
--+		return mt7621_nfc_send_command(nfc, instr->ctx.cmd.opcode);
--+	case NAND_OP_ADDR_INSTR:
--+		return mt7621_nfc_send_address(nfc, instr->ctx.addr.addrs,
--+					       instr->ctx.addr.naddrs);
--+	case NAND_OP_DATA_IN_INSTR:
--+		mt7621_nfc_read_data(nfc, instr->ctx.data.buf.in,
--+				     instr->ctx.data.len);
--+		return 0;
--+	case NAND_OP_DATA_OUT_INSTR:
--+		mt7621_nfc_write_data(nfc, instr->ctx.data.buf.out,
--+				      instr->ctx.data.len);
--+		return 0;
--+	case NAND_OP_WAITRDY_INSTR:
--+		return mt7621_nfc_dev_ready(nfc,
--+					    instr->ctx.waitrdy.timeout_ms);
--+	default:
--+		WARN_ONCE(1, "unsupported NAND instruction type: %d\n",
--+			  instr->type);
--+
--+		return -EINVAL;
--+	}
--+}
--+
--+static int mt7621_nfc_exec_op(struct nand_chip *nand,
--+			      const struct nand_operation *op, bool check_only)
--+{
--+	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
--+	int i, ret;
--+
--+	if (check_only)
--+		return 0;
--+
--+	/* Only CS0 available */
--+	nfi_write16(nfc, NFI_CSEL, 0);
--+
--+	for (i = 0; i < op->ninstrs; i++) {
--+		ret = mt7621_nfc_exec_instr(nand, &op->instrs[i]);
--+		if (ret)
--+			return ret;
--+	}
--+
--+	return 0;
--+}
--+
--+static int mt7621_nfc_setup_data_interface(struct nand_chip *nand, int csline,
--+					   const struct nand_data_interface *conf)
--+{
--+	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
--+	const struct nand_sdr_timings *timings;
--+	u32 acccon, temp, rate, tpoecs, tprecs, tc2r, tw2r, twh, twst, trlt;
--+
--+	if (!nfc->nfi_clk)
--+		return -ENOTSUPP;
--+
--+	timings = nand_get_sdr_timings(conf);
--+	if (IS_ERR(timings))
--+		return -ENOTSUPP;
--+
--+	rate = clk_get_rate(nfc->nfi_clk);
--+
--+	/* turn clock rate into KHZ */
--+	rate /= 1000;
--+
--+	tpoecs = max(timings->tALH_min, timings->tCLH_min) / 1000;
--+	tpoecs = DIV_ROUND_UP(tpoecs * rate, 1000000);
--+	tpoecs = min_t(u32, tpoecs, ACCCON_POECS_MAX);
--+
--+	tprecs = max(timings->tCLS_min, timings->tALS_min) / 1000;
--+	tprecs = DIV_ROUND_UP(tprecs * rate, 1000000);
--+	tprecs = min_t(u32, tprecs, ACCCON_PRECS_MAX);
--+
--+	/* sdr interface has no tCR which means CE# low to RE# low */
--+	tc2r = 0;
--+
--+	tw2r = timings->tWHR_min / 1000;
--+	tw2r = DIV_ROUND_UP(tw2r * rate, 1000000);
--+	tw2r = DIV_ROUND_UP(tw2r - 1, 2);
--+	tw2r = min_t(u32, tw2r, ACCCON_W2R_MAX);
--+
--+	twh = max(timings->tREH_min, timings->tWH_min) / 1000;
--+	twh = DIV_ROUND_UP(twh * rate, 1000000) - 1;
--+	twh = min_t(u32, twh, ACCCON_WH_MAX);
--+
--+	/* Calculate real WE#/RE# hold time in nanosecond */
--+	temp = (twh + 1) * 1000000 / rate;
--+	/* nanosecond to picosecond */
--+	temp *= 1000;
--+
--+	/*
--+	 * WE# low level time should be expaned to meet WE# pulse time
--+	 * and WE# cycle time at the same time.
--+	 */
--+	if (temp < timings->tWC_min)
--+		twst = timings->tWC_min - temp;
--+	else
--+		twst = 0;
--+	twst = max(timings->tWP_min, twst) / 1000;
--+	twst = DIV_ROUND_UP(twst * rate, 1000000) - 1;
--+	twst = min_t(u32, twst, ACCCON_WST_MAX);
--+
--+	/*
--+	 * RE# low level time should be expaned to meet RE# pulse time
--+	 * and RE# cycle time at the same time.
--+	 */
--+	if (temp < timings->tRC_min)
--+		trlt = timings->tRC_min - temp;
--+	else
--+		trlt = 0;
--+	trlt = max(trlt, timings->tRP_min) / 1000;
--+	trlt = DIV_ROUND_UP(trlt * rate, 1000000) - 1;
--+	trlt = min_t(u32, trlt, ACCCON_RLT_MAX);
--+
--+	if (csline == NAND_DATA_IFACE_CHECK_ONLY) {
--+		if (twst < ACCCON_WST_MIN || trlt < ACCCON_RLT_MIN)
--+			return -ENOTSUPP;
--+	}
--+
--+	acccon = ACCTIMING(tpoecs, tprecs, tc2r, tw2r, twh, twst, trlt);
--+
--+	dev_info(nfc->dev, "Using programmed access timing: %08x\n", acccon);
--+
--+	nfi_write32(nfc, NFI_ACCCON, acccon);
--+
--+	return 0;
--+}
--+
--+static int mt7621_nfc_calc_ecc_strength(struct mt7621_nfc *nfc,
--+					u32 avail_ecc_bytes)
--+{
--+	struct nand_chip *nand = &nfc->nand;
--+	struct mtd_info *mtd = nand_to_mtd(nand);
--+	u32 strength;
--+	int i;
--+
--+	strength = avail_ecc_bytes * 8 / ECC_PARITY_BITS;
--+
--+	/* Find the closest supported ecc strength */
--+	for (i = ARRAY_SIZE(mt7621_ecc_strength) - 1; i >= 0; i--) {
--+		if (mt7621_ecc_strength[i] <= strength)
--+			break;
--+	}
--+
--+	if (unlikely(i < 0)) {
--+		dev_err(nfc->dev, "OOB size (%u) is not supported\n",
--+			mtd->oobsize);
--+		return -EINVAL;
--+	}
--+
--+	nand->ecc.strength = mt7621_ecc_strength[i];
--+	nand->ecc.bytes =
--+		DIV_ROUND_UP(nand->ecc.strength * ECC_PARITY_BITS, 8);
--+
--+	dev_info(nfc->dev, "ECC strength adjusted to %u bits\n",
--+		 nand->ecc.strength);
--+
--+	return i;
--+}
--+
--+static int mt7621_nfc_set_spare_per_sector(struct mt7621_nfc *nfc)
--+{
--+	struct nand_chip *nand = &nfc->nand;
--+	struct mtd_info *mtd = nand_to_mtd(nand);
--+	u32 size;
--+	int i;
--+
--+	size = nand->ecc.bytes + NFI_FDM_SIZE;
--+
--+	/* Find the closest supported spare size */
--+	for (i = 0; i < ARRAY_SIZE(mt7621_nfi_spare_size); i++) {
--+		if (mt7621_nfi_spare_size[i] >= size)
--+			break;
--+	}
--+
--+	if (unlikely(i >= ARRAY_SIZE(mt7621_nfi_spare_size))) {
--+		dev_err(nfc->dev, "OOB size (%u) is not supported\n",
--+			mtd->oobsize);
--+		return -EINVAL;
--+	}
--+
--+	nfc->spare_per_sector = mt7621_nfi_spare_size[i];
--+
--+	return i;
--+}
--+
--+static int mt7621_nfc_ecc_init(struct mt7621_nfc *nfc)
--+{
--+	struct nand_chip *nand = &nfc->nand;
--+	struct mtd_info *mtd = nand_to_mtd(nand);
--+	u32 spare_per_sector, encode_block_size, decode_block_size;
--+	u32 ecc_enccfg, ecc_deccfg;
--+	int ecc_cap;
--+
--+	/* Only hardware ECC mode is supported */
--+	if (nand->ecc.mode != NAND_ECC_HW_SYNDROME) {
--+		dev_err(nfc->dev, "Only hardware ECC mode is supported\n");
--+		return -EINVAL;
--+	}
--+
--+	nand->ecc.size = ECC_SECTOR_SIZE;
--+	nand->ecc.steps = mtd->writesize / nand->ecc.size;
--+
--+	spare_per_sector = mtd->oobsize / nand->ecc.steps;
--+
--+	ecc_cap = mt7621_nfc_calc_ecc_strength(nfc,
--+		spare_per_sector - NFI_FDM_SIZE);
--+	if (ecc_cap < 0)
--+		return ecc_cap;
--+
--+	/* Sector + FDM */
--+	encode_block_size = (nand->ecc.size + NFI_FDM_SIZE) * 8;
--+	ecc_enccfg = ecc_cap | (ENC_MODE_NFI << ENC_MODE_S) |
--+		     (encode_block_size << ENC_CNFG_MSG_S);
--+
--+	/* Sector + FDM + ECC parity bits */
--+	decode_block_size = ((nand->ecc.size + NFI_FDM_SIZE) * 8) +
--+			    nand->ecc.strength * ECC_PARITY_BITS;
--+	ecc_deccfg = ecc_cap | (DEC_MODE_NFI << DEC_MODE_S) |
--+		     (decode_block_size << DEC_CS_S) |
--+		     (DEC_CON_EL << DEC_CON_S) | DEC_EMPTY_EN;
--+
--+	mt7621_ecc_encoder_op(nfc, false);
--+	ecc_write32(nfc, ECC_ENCCNFG, ecc_enccfg);
--+
--+	mt7621_ecc_decoder_op(nfc, false);
--+	ecc_write32(nfc, ECC_DECCNFG, ecc_deccfg);
--+
--+	return 0;
--+}
--+
--+static int mt7621_nfc_set_page_format(struct mt7621_nfc *nfc)
--+{
--+	struct nand_chip *nand = &nfc->nand;
--+	struct mtd_info *mtd = nand_to_mtd(nand);
--+	int i, spare_size;
--+	u32 pagefmt;
--+
--+	spare_size = mt7621_nfc_set_spare_per_sector(nfc);
--+	if (spare_size < 0)
--+		return spare_size;
--+
--+	for (i = 0; i < ARRAY_SIZE(mt7621_nfi_page_size); i++) {
--+		if (mt7621_nfi_page_size[i] == mtd->writesize)
--+			break;
--+	}
--+
--+	if (unlikely(i >= ARRAY_SIZE(mt7621_nfi_page_size))) {
--+		dev_err(nfc->dev, "Page size (%u) is not supported\n",
--+			mtd->writesize);
--+		return -EINVAL;
--+	}
--+
--+	pagefmt = i | (spare_size << PAGEFMT_SPARE_S) |
--+		  (NFI_FDM_SIZE << PAGEFMT_FDM_S) |
--+		  (NFI_FDM_SIZE << PAGEFMT_FDM_ECC_S);
--+
--+	nfi_write16(nfc, NFI_PAGEFMT, pagefmt);
--+
--+	return 0;
--+}
--+
--+static int mt7621_nfc_attach_chip(struct nand_chip *nand)
--+{
--+	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
--+	int ret;
--+
--+	if (nand->options & NAND_BUSWIDTH_16) {
--+		dev_err(nfc->dev, "16-bit buswidth is not supported");
--+		return -EINVAL;
--+	}
--+
--+	ret = mt7621_nfc_ecc_init(nfc);
--+	if (ret)
--+		return ret;
--+
--+	return mt7621_nfc_set_page_format(nfc);
--+}
--+
--+static const struct nand_controller_ops mt7621_nfc_controller_ops = {
--+	.attach_chip = mt7621_nfc_attach_chip,
--+	.exec_op = mt7621_nfc_exec_op,
--+	.setup_data_interface = mt7621_nfc_setup_data_interface,
--+};
--+
--+static int mt7621_nfc_ooblayout_free(struct mtd_info *mtd, int section,
--+				     struct mtd_oob_region *oob_region)
--+{
--+	struct nand_chip *nand = mtd_to_nand(mtd);
--+
--+	if (section >= nand->ecc.steps)
--+		return -ERANGE;
--+
--+	oob_region->length = NFI_FDM_SIZE - 1;
--+	oob_region->offset = section * NFI_FDM_SIZE + 1;
--+
--+	return 0;
--+}
--+
--+static int mt7621_nfc_ooblayout_ecc(struct mtd_info *mtd, int section,
--+				    struct mtd_oob_region *oob_region)
--+{
--+	struct nand_chip *nand = mtd_to_nand(mtd);
--+
--+	if (section)
--+		return -ERANGE;
--+
--+	oob_region->offset = NFI_FDM_SIZE * nand->ecc.steps;
--+	oob_region->length = mtd->oobsize - oob_region->offset;
--+
--+	return 0;
--+}
--+
--+static const struct mtd_ooblayout_ops mt7621_nfc_ooblayout_ops = {
--+	.free = mt7621_nfc_ooblayout_free,
--+	.ecc = mt7621_nfc_ooblayout_ecc,
--+};
--+
--+static void mt7621_nfc_write_fdm(struct mt7621_nfc *nfc)
--+{
--+	struct nand_chip *nand = &nfc->nand;
--+	u32 vall, valm;
--+	u8 *oobptr;
--+	int i, j;
--+
--+	for (i = 0; i < nand->ecc.steps; i++) {
--+		vall = 0;
--+		valm = 0;
--+		oobptr = oob_fdm_ptr(nand, i);
--+
--+		for (j = 0; j < 4; j++)
--+			vall |= (u32)oobptr[j] << (j * 8);
--+
--+		for (j = 0; j < 4; j++)
--+			valm |= (u32)oobptr[j + 4] << ((j - 4) * 8);
--+
--+		nfi_write32(nfc, NFI_FDML(i), vall);
--+		nfi_write32(nfc, NFI_FDMM(i), valm);
--+	}
--+}
--+
--+static void mt7621_nfc_read_sector_fdm(struct mt7621_nfc *nfc, u32 sect)
--+{
--+	struct nand_chip *nand = &nfc->nand;
--+	u32 vall, valm;
--+	u8 *oobptr;
--+	int i;
--+
--+	vall = nfi_read32(nfc, NFI_FDML(sect));
--+	valm = nfi_read32(nfc, NFI_FDMM(sect));
--+	oobptr = oob_fdm_ptr(nand, sect);
--+
--+	for (i = 0; i < 4; i++)
--+		oobptr[i] = (vall >> (i * 8)) & 0xff;
--+
--+	for (i = 0; i < 4; i++)
--+		oobptr[i + 4] = (valm >> (i * 8)) & 0xff;
--+}
--+
--+static int mt7621_nfc_read_page_hwecc(struct nand_chip *nand, uint8_t *buf,
--+				      int oob_required, int page)
--+{
--+	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
--+	struct mtd_info *mtd = nand_to_mtd(nand);
--+	int bitflips = 0;
--+	int rc, i;
--+
--+	nand_read_page_op(nand, page, 0, NULL, 0);
--+
--+	nfi_write16(nfc, NFI_CNFG, (CNFG_OP_CUSTOM << CNFG_OP_MODE_S) |
--+		    CNFG_READ_MODE | CNFG_AUTO_FMT_EN | CNFG_HW_ECC_EN);
--+
--+	mt7621_ecc_decoder_op(nfc, true);
--+
--+	nfi_write16(nfc, NFI_CON,
--+		    CON_NFI_BRD | (nand->ecc.steps << CON_NFI_SEC_S));
--+
--+	for (i = 0; i < nand->ecc.steps; i++) {
--+		if (buf)
--+			mt7621_nfc_read_data(nfc, page_data_ptr(nand, buf, i),
--+					     nand->ecc.size);
--+		else
--+			mt7621_nfc_read_data_discard(nfc, nand->ecc.size);
--+
--+		rc = mt7621_ecc_decoder_wait_done(nfc, i);
--+
--+		mt7621_nfc_read_sector_fdm(nfc, i);
--+
--+		if (rc < 0) {
--+			bitflips = -EIO;
--+			continue;
--+		}
--+
--+		rc = mt7621_ecc_correct_check(nfc,
--+			buf ? page_data_ptr(nand, buf, i) : NULL,
--+			oob_fdm_ptr(nand, i), i);
--+
--+		if (rc < 0) {
--+			dev_warn(nfc->dev,
--+				 "Uncorrectable ECC error at page %d.%d\n",
--+				 page, i);
--+			bitflips = -EBADMSG;
--+			mtd->ecc_stats.failed++;
--+		} else if (bitflips >= 0) {
--+			bitflips += rc;
--+			mtd->ecc_stats.corrected += rc;
--+		}
--+	}
--+
--+	mt7621_ecc_decoder_op(nfc, false);
--+
--+	nfi_write16(nfc, NFI_CON, 0);
--+
--+	return bitflips;
--+}
--+
--+static int mt7621_nfc_read_page_raw(struct nand_chip *nand, uint8_t *buf,
--+				    int oob_required, int page)
--+{
--+	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
--+	int i;
--+
--+	nand_read_page_op(nand, page, 0, NULL, 0);
--+
--+	nfi_write16(nfc, NFI_CNFG, (CNFG_OP_CUSTOM << CNFG_OP_MODE_S) |
--+		    CNFG_READ_MODE);
--+
--+	nfi_write16(nfc, NFI_CON,
--+		    CON_NFI_BRD | (nand->ecc.steps << CON_NFI_SEC_S));
--+
--+	for (i = 0; i < nand->ecc.steps; i++) {
--+		/* Read data */
--+		if (buf)
--+			mt7621_nfc_read_data(nfc, page_data_ptr(nand, buf, i),
--+					     nand->ecc.size);
--+		else
--+			mt7621_nfc_read_data_discard(nfc, nand->ecc.size);
--+
--+		/* Read FDM */
--+		mt7621_nfc_read_data(nfc, oob_fdm_ptr(nand, i), NFI_FDM_SIZE);
--+
--+		/* Read ECC parity data */
--+		mt7621_nfc_read_data(nfc, oob_ecc_ptr(nfc, i),
--+				     nfc->spare_per_sector - NFI_FDM_SIZE);
--+	}
--+
--+	nfi_write16(nfc, NFI_CON, 0);
--+
--+	return 0;
--+}
--+
--+static int mt7621_nfc_read_oob_hwecc(struct nand_chip *nand, int page)
--+{
--+	return mt7621_nfc_read_page_hwecc(nand, NULL, 1, page);
--+}
--+
--+static int mt7621_nfc_read_oob_raw(struct nand_chip *nand, int page)
--+{
--+	return mt7621_nfc_read_page_raw(nand, NULL, 1, page);
--+}
--+
--+static int mt7621_nfc_check_empty_page(struct nand_chip *nand, const u8 *buf)
--+{
--+	struct mtd_info *mtd = nand_to_mtd(nand);
--+	uint32_t i, j;
--+	u8 *oobptr;
--+
--+	if (buf) {
--+		for (i = 0; i < mtd->writesize; i++)
--+			if (buf[i] != 0xff)
--+				return 0;
--+	}
--+
--+	for (i = 0; i < nand->ecc.steps; i++) {
--+		oobptr = oob_fdm_ptr(nand, i);
--+		for (j = 0; j < NFI_FDM_SIZE; j++)
--+			if (oobptr[j] != 0xff)
--+				return 0;
--+	}
--+
--+	return 1;
--+}
--+
--+static int mt7621_nfc_write_page_hwecc(struct nand_chip *nand,
--+				       const uint8_t *buf, int oob_required,
--+				       int page)
--+{
--+	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
--+	struct mtd_info *mtd = nand_to_mtd(nand);
--+
--+	if (mt7621_nfc_check_empty_page(nand, buf)) {
--+		/*
--+		 * MT7621 ECC engine always generates parity code for input
--+		 * pages, even for empty pages. Doing so will write back ECC
--+		 * parity code to the oob region, which means such pages will
--+		 * no longer be empty pages.
--+		 *
--+		 * To avoid this, stop write operation if current page is an
--+		 * empty page.
--+		 */
--+		return 0;
--+	}
--+
--+	nand_prog_page_begin_op(nand, page, 0, NULL, 0);
--+
--+	nfi_write16(nfc, NFI_CNFG, (CNFG_OP_CUSTOM << CNFG_OP_MODE_S) |
--+		   CNFG_AUTO_FMT_EN | CNFG_HW_ECC_EN);
--+
--+	mt7621_ecc_encoder_op(nfc, true);
--+
--+	mt7621_nfc_write_fdm(nfc);
--+
--+	nfi_write16(nfc, NFI_CON,
--+		    CON_NFI_BWR | (nand->ecc.steps << CON_NFI_SEC_S));
--+
--+	if (buf)
--+		mt7621_nfc_write_data(nfc, buf, mtd->writesize);
--+	else
--+		mt7621_nfc_write_data_empty(nfc, mtd->writesize);
--+
--+	mt7621_nfc_wait_write_completion(nfc, nand);
--+
--+	mt7621_ecc_encoder_op(nfc, false);
--+
--+	nfi_write16(nfc, NFI_CON, 0);
--+
--+	return nand_prog_page_end_op(nand);
--+}
--+
--+static int mt7621_nfc_write_page_raw(struct nand_chip *nand,
--+				     const uint8_t *buf, int oob_required,
--+				     int page)
--+{
--+	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
--+	int i;
--+
--+	nand_prog_page_begin_op(nand, page, 0, NULL, 0);
--+
--+	nfi_write16(nfc, NFI_CNFG, (CNFG_OP_CUSTOM << CNFG_OP_MODE_S));
--+
--+	nfi_write16(nfc, NFI_CON,
--+		    CON_NFI_BWR | (nand->ecc.steps << CON_NFI_SEC_S));
--+
--+	for (i = 0; i < nand->ecc.steps; i++) {
--+		/* Write data */
--+		if (buf)
--+			mt7621_nfc_write_data(nfc, page_data_ptr(nand, buf, i),
--+					      nand->ecc.size);
--+		else
--+			mt7621_nfc_write_data_empty(nfc, nand->ecc.size);
--+
--+		/* Write FDM */
--+		mt7621_nfc_write_data(nfc, oob_fdm_ptr(nand, i),
--+				      NFI_FDM_SIZE);
--+
--+		/* Write dummy ECC parity data */
--+		mt7621_nfc_write_data_empty(nfc, nfc->spare_per_sector -
--+					    NFI_FDM_SIZE);
--+	}
--+
--+	mt7621_nfc_wait_write_completion(nfc, nand);
--+
--+	nfi_write16(nfc, NFI_CON, 0);
--+
--+	return nand_prog_page_end_op(nand);
--+}
--+
--+static int mt7621_nfc_write_oob_hwecc(struct nand_chip *nand, int page)
--+{
--+	return mt7621_nfc_write_page_hwecc(nand, NULL, 1, page);
--+}
--+
--+static int mt7621_nfc_write_oob_raw(struct nand_chip *nand, int page)
--+{
--+	return mt7621_nfc_write_page_raw(nand, NULL, 1, page);
--+}
--+
--+static int mt7621_nfc_init_chip(struct mt7621_nfc *nfc)
--+{
--+	struct nand_chip *nand = &nfc->nand;
--+	struct mtd_info *mtd;
--+	int ret;
--+
--+	nand->controller = &nfc->controller;
--+	nand_set_controller_data(nand, (void *)nfc);
--+	nand_set_flash_node(nand, nfc->dev->of_node);
--+
--+	nand->options |= NAND_USE_BOUNCE_BUFFER | NAND_NO_SUBPAGE_WRITE;
--+	if (!nfc->nfi_clk)
--+		nand->options |= NAND_KEEP_TIMINGS;
--+
--+	nand->ecc.mode = NAND_ECC_HW_SYNDROME;
--+	nand->ecc.read_page = mt7621_nfc_read_page_hwecc;
--+	nand->ecc.read_page_raw = mt7621_nfc_read_page_raw;
--+	nand->ecc.write_page = mt7621_nfc_write_page_hwecc;
--+	nand->ecc.write_page_raw = mt7621_nfc_write_page_raw;
--+	nand->ecc.read_oob = mt7621_nfc_read_oob_hwecc;
--+	nand->ecc.read_oob_raw = mt7621_nfc_read_oob_raw;
--+	nand->ecc.write_oob = mt7621_nfc_write_oob_hwecc;
--+	nand->ecc.write_oob_raw = mt7621_nfc_write_oob_raw;
--+
--+	mtd = nand_to_mtd(nand);
--+	mtd->owner = THIS_MODULE;
--+	mtd->dev.parent = nfc->dev;
--+	mtd->name = MT7621_NFC_NAME;
--+	mtd_set_ooblayout(mtd, &mt7621_nfc_ooblayout_ops);
--+
--+	mt7621_nfc_hw_init(nfc);
--+
--+	ret = nand_scan(nand, 1);
--+	if (ret)
--+		return ret;
--+
--+	ret = mtd_device_register(mtd, NULL, 0);
--+	if (ret) {
--+		dev_err(nfc->dev, "Failed to register MTD: %d\n", ret);
--+		nand_release(nand);
--+		return ret;
--+	}
--+
--+	return 0;
--+}
--+
--+static int mt7621_nfc_probe(struct platform_device *pdev)
--+{
--+	struct device *dev = &pdev->dev;
--+	struct mt7621_nfc *nfc;
--+	struct resource *res;
--+	int ret;
--+
--+	nfc = devm_kzalloc(dev, sizeof(*nfc), GFP_KERNEL);
--+	if (!nfc)
--+		return -ENOMEM;
--+
--+	nand_controller_init(&nfc->controller);
--+	nfc->controller.ops = &mt7621_nfc_controller_ops;
--+	nfc->dev = dev;
--+
--+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nfi");
--+	nfc->nfi_regs = devm_ioremap_resource(dev, res);
--+	if (IS_ERR(nfc->nfi_regs)) {
--+		ret = PTR_ERR(nfc->nfi_regs);
--+		return ret;
--+	}
--+
--+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ecc");
--+	nfc->ecc_regs = devm_ioremap_resource(dev, res);
--+	if (IS_ERR(nfc->ecc_regs)) {
--+		ret = PTR_ERR(nfc->ecc_regs);
--+		return ret;
--+	}
--+
--+	nfc->nfi_clk = devm_clk_get(dev, "nfi_clk");
--+	if (IS_ERR(nfc->nfi_clk)) {
--+		dev_warn(dev, "nfi clk not provided\n");
--+		nfc->nfi_clk = NULL;
--+	} else {
--+		ret = clk_prepare_enable(nfc->nfi_clk);
--+		if (ret) {
--+			dev_err(dev, "Failed to enable nfi core clock\n");
--+			return ret;
--+		}
--+	}
--+
--+	platform_set_drvdata(pdev, nfc);
--+
--+	ret = mt7621_nfc_init_chip(nfc);
--+	if (ret) {
--+		dev_err(dev, "Failed to initialize nand chip\n");
--+		goto clk_disable;
--+	}
--+
--+	return 0;
--+
--+clk_disable:
--+	clk_disable_unprepare(nfc->nfi_clk);
--+
--+	return ret;
--+}
--+
--+static int mt7621_nfc_remove(struct platform_device *pdev)
--+{
--+	struct mt7621_nfc *nfc = platform_get_drvdata(pdev);
--+
--+	nand_release(&nfc->nand);
--+	clk_disable_unprepare(nfc->nfi_clk);
--+
--+	return 0;
--+}
--+
--+static const struct of_device_id mt7621_nfc_id_table[] = {
--+	{ .compatible = "mediatek,mt7621-nfc" },
--+	{ },
--+};
--+MODULE_DEVICE_TABLE(of, match);
--+
--+static struct platform_driver mt7621_nfc_driver = {
--+	.probe = mt7621_nfc_probe,
--+	.remove = mt7621_nfc_remove,
--+	.driver = {
--+		.name = MT7621_NFC_NAME,
--+		.owner = THIS_MODULE,
--+		.of_match_table = mt7621_nfc_id_table,
--+	},
--+};
--+module_platform_driver(mt7621_nfc_driver);
--+
--+MODULE_LICENSE("GPL");
--+MODULE_AUTHOR("Weijie Gao <weijie.gao@mediatek.com>");
--+MODULE_DESCRIPTION("MediaTek MT7621 NAND Flash Controller driver");
-+
--- 
-2.25.1
-
diff --git a/patches/ramips/0009-ramips-mt7621_nand-reduce-log-verbosity.patch b/patches/ramips/0009-ramips-mt7621_nand-reduce-log-verbosity.patch
deleted file mode 100644
index 3c4809e29..000000000
--- a/patches/ramips/0009-ramips-mt7621_nand-reduce-log-verbosity.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 8ff3f57a88d867d48c2a38876baf9b389d7441df Mon Sep 17 00:00:00 2001
-From: Stijn Tintel <stijn@linux-ipv6.be>
-Date: Wed, 19 Jan 2022 17:59:51 +0200
-Subject: [PATCH 09/14] ramips: mt7621_nand: reduce log verbosity
-
-Avoid flooding the log with the message below by increasing the log
-level to debug:
-
-  mt7621-nand 1e003000.nand: Using programmed access timing: 31c07388
-
-Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
----
- target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c b/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
-index 678295a68d..16493a2e97 100644
---- a/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
-+++ b/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
-@@ -759,7 +759,7 @@ static int mt7621_nfc_setup_data_interface(struct nand_chip *nand, int csline,
- 
- 	acccon = ACCTIMING(tpoecs, tprecs, tc2r, tw2r, twh, twst, trlt);
- 
--	dev_info(nfc->dev, "Using programmed access timing: %08x\n", acccon);
-+	dev_dbg(nfc->dev, "Using programmed access timing: %08x\n", acccon);
- 
- 	nfi_write32(nfc, NFI_ACCCON, acccon);
- 
--- 
-2.25.1
-
diff --git a/patches/ramips/0010-ramips-mt7621_nand-initialize-ECC_FDMADDR.patch b/patches/ramips/0010-ramips-mt7621_nand-initialize-ECC_FDMADDR.patch
deleted file mode 100644
index 876d813b6..000000000
--- a/patches/ramips/0010-ramips-mt7621_nand-initialize-ECC_FDMADDR.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 10d63c9973b9598a065244e9752db7aa3d78a93f Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Wed, 9 Mar 2022 20:46:21 +0100
-Subject: [PATCH 10/14] ramips: mt7621_nand: initialize ECC_FDMADDR
-
-This is needed for the ECC controller to access FDM data
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c b/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
-index 16493a2e97..0751e59c37 100644
---- a/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
-+++ b/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
-@@ -214,6 +214,7 @@ struct mt7621_nfc {
- 	struct clk *nfi_clk;
- 	struct device *dev;
- 
-+	u32 nfi_base;
- 	void __iomem *nfi_regs;
- 	void __iomem *ecc_regs;
- 
-@@ -860,6 +861,8 @@ static int mt7621_nfc_ecc_init(struct mt7621_nfc *nfc)
- 		     (decode_block_size << DEC_CS_S) |
- 		     (DEC_CON_EL << DEC_CON_S) | DEC_EMPTY_EN;
- 
-+	ecc_write32(nfc, ECC_FDMADDR, nfc->nfi_base + NFI_FDML(0));
-+
- 	mt7621_ecc_encoder_op(nfc, false);
- 	ecc_write32(nfc, ECC_ENCCNFG, ecc_enccfg);
- 
-@@ -1277,6 +1280,7 @@ static int mt7621_nfc_probe(struct platform_device *pdev)
- 	nfc->dev = dev;
- 
- 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nfi");
-+	nfc->nfi_base = res->start;
- 	nfc->nfi_regs = devm_ioremap_resource(dev, res);
- 	if (IS_ERR(nfc->nfi_regs)) {
- 		ret = PTR_ERR(nfc->nfi_regs);
--- 
-2.25.1
-
diff --git a/patches/ramips/0011-ramips-enable-support-for-mtk_bmt-in-the-nand-flash-.patch b/patches/ramips/0011-ramips-enable-support-for-mtk_bmt-in-the-nand-flash-.patch
deleted file mode 100644
index 1f6ae94f9..000000000
--- a/patches/ramips/0011-ramips-enable-support-for-mtk_bmt-in-the-nand-flash-.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From bee84b6606374bb887e70e263419b19e112f1b5c Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Thu, 10 Mar 2022 11:45:00 +0100
-Subject: [PATCH 11/14] ramips: enable support for mtk_bmt in the nand flash
- driver
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- .../linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c b/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
-index 0751e59c37..1072450898 100644
---- a/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
-+++ b/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
-@@ -18,6 +18,7 @@
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/rawnand.h>
- #include <linux/mtd/partitions.h>
-+#include <linux/mtd/mtk_bmt.h>
- #include <linux/platform_device.h>
- #include <asm/addrspace.h>
- 
-@@ -1254,9 +1255,12 @@ static int mt7621_nfc_init_chip(struct mt7621_nfc *nfc)
- 	if (ret)
- 		return ret;
- 
-+	mtk_bmt_attach(mtd);
-+
- 	ret = mtd_device_register(mtd, NULL, 0);
- 	if (ret) {
- 		dev_err(nfc->dev, "Failed to register MTD: %d\n", ret);
-+		mtk_bmt_detach(mtd);
- 		nand_release(nand);
- 		return ret;
- 	}
-@@ -1325,7 +1329,11 @@ clk_disable:
- static int mt7621_nfc_remove(struct platform_device *pdev)
- {
- 	struct mt7621_nfc *nfc = platform_get_drvdata(pdev);
-+	struct nand_chip *nand = &nfc->nand;
-+	struct mtd_info *mtd = nand_to_mtd(nand);
- 
-+	mtk_bmt_detach(mtd);
-+	mtd_device_unregister(mtd);
- 	nand_release(&nfc->nand);
- 	clk_disable_unprepare(nfc->nfi_clk);
- 
--- 
-2.25.1
-
diff --git a/patches/ramips/0012-ramips-skip-bbt-scan-on-mt7621.patch b/patches/ramips/0012-ramips-skip-bbt-scan-on-mt7621.patch
deleted file mode 100644
index 5b1d1332b..000000000
--- a/patches/ramips/0012-ramips-skip-bbt-scan-on-mt7621.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 806708eed0809c9ee07cbcff1285a64c9767242f Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Thu, 10 Mar 2022 15:20:29 +0100
-Subject: [PATCH 12/14] ramips: skip bbt scan on mt7621
-
-reduces unnecessary flash reads and speeds up boot time
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c b/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
-index 1072450898..f01e1e8a8e 100644
---- a/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
-+++ b/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
-@@ -1229,7 +1229,8 @@ static int mt7621_nfc_init_chip(struct mt7621_nfc *nfc)
- 	nand_set_controller_data(nand, (void *)nfc);
- 	nand_set_flash_node(nand, nfc->dev->of_node);
- 
--	nand->options |= NAND_USE_BOUNCE_BUFFER | NAND_NO_SUBPAGE_WRITE;
-+	nand->options |= NAND_USE_BOUNCE_BUFFER | NAND_NO_SUBPAGE_WRITE |
-+			 NAND_SKIP_BBTSCAN;
- 	if (!nfc->nfi_clk)
- 		nand->options |= NAND_KEEP_TIMINGS;
- 
--- 
-2.25.1
-
diff --git a/patches/ramips/0013-kernel-mtdsplit-support-UBI-after-FIT-images.patch b/patches/ramips/0013-kernel-mtdsplit-support-UBI-after-FIT-images.patch
deleted file mode 100644
index 124d2309f..000000000
--- a/patches/ramips/0013-kernel-mtdsplit-support-UBI-after-FIT-images.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 9f51c3956a80205006dc6a686d80969bd3b42ecb Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Thu, 10 Mar 2022 17:32:20 +0100
-Subject: [PATCH 13/14] kernel: mtdsplit: support UBI after FIT images
-
-Change the partition name accordingly. Same behavior as mtdsplit_uimage
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- .../generic/files/drivers/mtd/mtdsplit/mtdsplit_fit.c     | 8 ++++++--
- 1 file changed, 6 insertions(+), 2 deletions(-)
-
-diff --git a/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_fit.c b/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_fit.c
-index 5cc1658dbd..f043428949 100644
---- a/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_fit.c
-+++ b/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_fit.c
-@@ -57,6 +57,7 @@ mtdsplit_fit_parse(struct mtd_info *mtd,
- 	size_t fit_offset, fit_size;
- 	size_t rootfs_offset, rootfs_size;
- 	struct mtd_partition *parts;
-+	enum mtdsplit_part_type type;
- 	int ret;
- 
- 	of_property_read_string(np, "openwrt,cmdline-match", &cmdline_match);
-@@ -101,7 +102,7 @@ mtdsplit_fit_parse(struct mtd_info *mtd,
- 
- 	/* Search for the rootfs partition after the FIT image */
- 	ret = mtd_find_rootfs_from(mtd, fit_offset + fit_size, mtd->size,
--				   &rootfs_offset, NULL);
-+				   &rootfs_offset, &type);
- 	if (ret) {
- 		pr_info("no rootfs found after FIT image in \"%s\"\n",
- 			mtd->name);
-@@ -118,7 +119,10 @@ mtdsplit_fit_parse(struct mtd_info *mtd,
- 	parts[0].offset = fit_offset;
- 	parts[0].size = mtd_rounddown_to_eb(fit_size, mtd) + mtd->erasesize;
- 
--	parts[1].name = ROOTFS_PART_NAME;
-+	if (type == MTDSPLIT_PART_TYPE_UBI)
-+		parts[1].name = UBI_PART_NAME;
-+	else
-+		parts[1].name = ROOTFS_PART_NAME;
- 	parts[1].offset = rootfs_offset;
- 	parts[1].size = rootfs_size;
- 
--- 
-2.25.1
-
diff --git a/patches/ramips/0014-update-actiontec-web7200-support.patch b/patches/ramips/0014-update-actiontec-web7200-support.patch
deleted file mode 100644
index 0f93301a3..000000000
--- a/patches/ramips/0014-update-actiontec-web7200-support.patch
+++ /dev/null
@@ -1,4446 +0,0 @@
-From c8878d6eda88d844593bb6a6e205eafc27f32b34 Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Thu, 10 Mar 2022 18:09:15 +0100
-Subject: [PATCH 02/37] update actiontec web7200 support
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- .../ramips/dts/mt7621_actiontec_web7200.dts   |  108 +-
- .../ramips/files/drivers/mtd/nmbm/Kconfig     |   35 -
- .../ramips/files/drivers/mtd/nmbm/Makefile    |    6 -
- .../ramips/files/drivers/mtd/nmbm/nmbm-core.c | 2936 -----------------
- .../files/drivers/mtd/nmbm/nmbm-debug.h       |   20 -
- .../files/drivers/mtd/nmbm/nmbm-debug.inl     |    0
- .../ramips/files/drivers/mtd/nmbm/nmbm-mtd.c  |  795 -----
- .../files/drivers/mtd/nmbm/nmbm-private.h     |  137 -
- .../linux/ramips/files/include/nmbm/nmbm-os.h |   69 -
- target/linux/ramips/files/include/nmbm/nmbm.h |  102 -
- target/linux/ramips/image/mt7621.mk           |   20 +-
- .../etc/hotplug.d/ieee80211/10_fix_wifi_mac   |    5 +
- .../mt7621/base-files/lib/upgrade/platform.sh |    7 +-
- target/linux/ramips/mt7621/config-5.4         |    8 -
- .../499-mtd-add-nmbm-support.patch            |   21 -
- 15 files changed, 84 insertions(+), 4185 deletions(-)
- delete mode 100644 target/linux/ramips/files/drivers/mtd/nmbm/Kconfig
- delete mode 100644 target/linux/ramips/files/drivers/mtd/nmbm/Makefile
- delete mode 100644 target/linux/ramips/files/drivers/mtd/nmbm/nmbm-core.c
- delete mode 100644 target/linux/ramips/files/drivers/mtd/nmbm/nmbm-debug.h
- delete mode 100644 target/linux/ramips/files/drivers/mtd/nmbm/nmbm-debug.inl
- delete mode 100644 target/linux/ramips/files/drivers/mtd/nmbm/nmbm-mtd.c
- delete mode 100644 target/linux/ramips/files/drivers/mtd/nmbm/nmbm-private.h
- delete mode 100644 target/linux/ramips/files/include/nmbm/nmbm-os.h
- delete mode 100644 target/linux/ramips/files/include/nmbm/nmbm.h
- delete mode 100644 target/linux/ramips/patches-5.4/499-mtd-add-nmbm-support.patch
-
-diff --git a/target/linux/ramips/dts/mt7621_actiontec_web7200.dts b/target/linux/ramips/dts/mt7621_actiontec_web7200.dts
-index f112354ec3..a4002f01a8 100644
---- a/target/linux/ramips/dts/mt7621_actiontec_web7200.dts
-+++ b/target/linux/ramips/dts/mt7621_actiontec_web7200.dts
-@@ -51,68 +51,70 @@
- 		};
- 	};
- 
--	nmbm {
--		compatible = "generic,nmbm";
--		lower-mtd-device = <&nand>;
--		forced-create;
--		#size-cells = <0x01>;
--		#address-cells = <0x01>;
--
--		partitions {
--			compatible = "fixed-partitions";
--			#size-cells = <0x01>;
--			#address-cells = <0x01>;
--
--			partition@0 {
--				label = "u-boot";
--				reg = <0x00 0x80000>;
--				read-only;
--			};
--
--			partition@80000 {
--				label = "u-boot-env";
--				reg = <0x80000 0x80000>;
--			};
--
--			factory: partition@100000 {
--				label = "factory";
--				reg = <0x100000 0x80000>;
--			};
--
--			partition@180000 {
--				compatible = "denx,fit";
--				label = "firmware";
--				openwrt,cmdline-match = "bootselect=0";
--				reg = <0x180000 0x3000000>;
--			};
--
--			partition@3180000 {
--				compatible = "denx,fit";
--				label = "firmware2";
--				openwrt,cmdline-match = "bootselect=1";
--				reg = <0x3180000 0x3000000>;
--			};
--
--			partition@6980000 {
--				label = "aei_data";
--				reg = <0x6980000 0x400000>;
--			};
--
--			partition@6180000 {
--				label = "aei_data_ext";
--				reg = <0x6180000 0x800000>;
--			};
--		};
--	};
- };
- 
- &nand {
- 	status = "okay";
- 
-+	mediatek,nmbm;
-+	mediatek,bmt-remap-range =
-+		<0x0 0x580000>,
-+		<0x3180000 0x3580000>;
-+
- 	partitions {
- 		compatible = "fixed-partitions";
- 		#address-cells = <1>;
- 		#size-cells = <1>;
-+
-+		partition@0 {
-+			label = "u-boot";
-+			reg = <0x00 0x80000>;
-+			read-only;
-+		};
-+
-+		partition@80000 {
-+			label = "u-boot-env";
-+			reg = <0x80000 0x80000>;
-+		};
-+
-+		factory: partition@100000 {
-+			label = "factory";
-+			reg = <0x100000 0x80000>;
-+		};
-+
-+		partition@180000 {
-+			compatible = "denx,fit";
-+			label = "firmware";
-+			openwrt,cmdline-match = "bootselect=0";
-+			reg = <0x180000 0x3000000>;
-+		};
-+
-+		partition@580000 {
-+			label = "ubi_1";
-+			reg = <0x580000 0x2c00000>;
-+		};
-+
-+		partition@3180000 {
-+			compatible = "denx,fit";
-+			label = "firmware2";
-+			openwrt,cmdline-match = "bootselect=1";
-+			reg = <0x3180000 0x3000000>;
-+		};
-+
-+		partition@3580000 {
-+			label = "ubi_2";
-+			reg = <0x3580000 0x2c00000>;
-+		};
-+
-+		partition@6980000 {
-+			label = "aei_data";
-+			reg = <0x6980000 0x400000>;
-+		};
-+
-+		partition@6180000 {
-+			label = "aei_data_ext";
-+			reg = <0x6180000 0x800000>;
-+		};
- 	};
- };
- 
-diff --git a/target/linux/ramips/files/drivers/mtd/nmbm/Kconfig b/target/linux/ramips/files/drivers/mtd/nmbm/Kconfig
-deleted file mode 100644
-index 98df305728..0000000000
---- a/target/linux/ramips/files/drivers/mtd/nmbm/Kconfig
-+++ /dev/null
-@@ -1,35 +0,0 @@
--
--config NMBM
--	bool "Enable NAND mapping block management"
--	default n
--	select CRC32
--
--choice
--	prompt "Default log level"
--	depends on NMBM
--	default NMBM_LOG_LEVEL_INFO
--
--config NMBM_LOG_LEVEL_DEBUG
--	bool "0 - Debug"
--
--config NMBM_LOG_LEVEL_INFO
--	bool "1 - Info"
--
--config NMBM_LOG_LEVEL_WARN
--	bool "2 - Warn"
--
--config NMBM_LOG_LEVEL_ERR
--	bool "3 - Error"
--
--config NMBM_LOG_LEVEL_EMERG
--	bool "4 - Emergency"
--
--config NMBM_LOG_LEVEL_NONE
--	bool "5 - None"
--
--endchoice
--
--config NMBM_MTD
--	bool "Enable MTD based NAND mapping block management"
--	default n
--	depends on NMBM
-diff --git a/target/linux/ramips/files/drivers/mtd/nmbm/Makefile b/target/linux/ramips/files/drivers/mtd/nmbm/Makefile
-deleted file mode 100644
-index 46e6d50a80..0000000000
---- a/target/linux/ramips/files/drivers/mtd/nmbm/Makefile
-+++ /dev/null
-@@ -1,6 +0,0 @@
--# SPDX-License-Identifier: GPL-2.0
--#
--# (C) Copyright 2020 MediaTek Inc. All rights reserved.
--
--obj-$(CONFIG_NMBM) += nmbm-core.o
--obj-$(CONFIG_NMBM_MTD) += nmbm-mtd.o
-diff --git a/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-core.c b/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-core.c
-deleted file mode 100644
-index 18dfb6adda..0000000000
---- a/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-core.c
-+++ /dev/null
-@@ -1,2936 +0,0 @@
--// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
--/*
-- * Copyright (C) 2021 MediaTek Inc. All Rights Reserved.
-- *
-- * Author: Weijie Gao <weijie.gao@mediatek.com>
-- */
--
--#include "nmbm-private.h"
--
--#include "nmbm-debug.h"
--
--#define NMBM_VER_MAJOR			1
--#define NMBM_VER_MINOR			0
--#define NMBM_VER			NMBM_VERSION_MAKE(NMBM_VER_MAJOR, \
--							  NMBM_VER_MINOR)
--
--#define NMBM_ALIGN(v, a)		(((v) + (a) - 1) & ~((a) - 1))
--
--/*****************************************************************************/
--/* Logging related functions */
--/*****************************************************************************/
--
--/*
-- * nmbm_log_lower - Print log using OS specific routine
-- * @nld: NMBM lower device structure
-- * @level: log level
-- * @fmt: format string
-- */
--static void nmbm_log_lower(struct nmbm_lower_device *nld,
--			   enum nmbm_log_category level, const char *fmt, ...)
--{
--	va_list ap;
--
--	if (!nld->logprint)
--		return;
--
--	va_start(ap, fmt);
--	nld->logprint(nld->arg, level, fmt, ap);
--	va_end(ap);
--}
--
--/*
-- * nmbm_log - Print log using OS specific routine
-- * @ni: NMBM instance structure
-- * @level: log level
-- * @fmt: format string
-- */
--static void nmbm_log(struct nmbm_instance *ni, enum nmbm_log_category level,
--		     const char *fmt, ...)
--{
--	va_list ap;
--
--	if (!ni)
--		return;
--
--	if (!ni->lower.logprint || level < ni->log_display_level)
--		return;
--
--	va_start(ap, fmt);
--	ni->lower.logprint(ni->lower.arg, level, fmt, ap);
--	va_end(ap);
--}
--
--/*
-- * nmbm_set_log_level - Set log display level
-- * @ni: NMBM instance structure
-- * @level: log display level
-- */
--enum nmbm_log_category nmbm_set_log_level(struct nmbm_instance *ni,
--					  enum nmbm_log_category level)
--{
--	enum nmbm_log_category old;
--
--	if (!ni)
--		return __NMBM_LOG_MAX;
--
--	old = ni->log_display_level;
--	ni->log_display_level = level;
--	return old;
--}
--
--/*
-- * nlog_table_creation - Print log of table creation event
-- * @ni: NMBM instance structure
-- * @main_table: whether the table is main info table
-- * @start_ba: start block address of the table
-- * @end_ba: block address after the end of the table
-- */
--static void nlog_table_creation(struct nmbm_instance *ni, bool main_table,
--			       uint32_t start_ba, uint32_t end_ba)
--{
--	if (start_ba == end_ba - 1)
--		nlog_info(ni, "%s info table has been written to block %u\n",
--			 main_table ? "Main" : "Backup", start_ba);
--	else
--		nlog_info(ni, "%s info table has been written to block %u-%u\n",
--			 main_table ? "Main" : "Backup", start_ba, end_ba - 1);
--
--	nmbm_mark_block_color_info_table(ni, start_ba, end_ba - 1);
--}
--
--/*
-- * nlog_table_update - Print log of table update event
-- * @ni: NMBM instance structure
-- * @main_table: whether the table is main info table
-- * @start_ba: start block address of the table
-- * @end_ba: block address after the end of the table
-- */
--static void nlog_table_update(struct nmbm_instance *ni, bool main_table,
--			     uint32_t start_ba, uint32_t end_ba)
--{
--	if (start_ba == end_ba - 1)
--		nlog_debug(ni, "%s info table has been updated in block %u\n",
--			  main_table ? "Main" : "Backup", start_ba);
--	else
--		nlog_debug(ni, "%s info table has been updated in block %u-%u\n",
--			  main_table ? "Main" : "Backup", start_ba, end_ba - 1);
--
--	nmbm_mark_block_color_info_table(ni, start_ba, end_ba - 1);
--}
--
--/*
-- * nlog_table_found - Print log of table found event
-- * @ni: NMBM instance structure
-- * @first_table: whether the table is first found info table
-- * @write_count: write count of the info table
-- * @start_ba: start block address of the table
-- * @end_ba: block address after the end of the table
-- */
--static void nlog_table_found(struct nmbm_instance *ni, bool first_table,
--			    uint32_t write_count, uint32_t start_ba,
--			    uint32_t end_ba)
--{
--	if (start_ba == end_ba - 1)
--		nlog_info(ni, "%s info table with writecount %u found in block %u\n",
--			 first_table ? "First" : "Second", write_count,
--			 start_ba);
--	else
--		nlog_info(ni, "%s info table with writecount %u found in block %u-%u\n",
--			 first_table ? "First" : "Second", write_count,
--			 start_ba, end_ba - 1);
--
--	nmbm_mark_block_color_info_table(ni, start_ba, end_ba - 1);
--}
--
--/*****************************************************************************/
--/* Address conversion functions */
--/*****************************************************************************/
--
--/*
-- * addr2ba - Convert a linear address to block address
-- * @ni: NMBM instance structure
-- * @addr: Linear address
-- */
--static uint32_t addr2ba(struct nmbm_instance *ni, uint64_t addr)
--{
--	return addr >> ni->erasesize_shift;
--}
--
--/*
-- * ba2addr - Convert a block address to linear address
-- * @ni: NMBM instance structure
-- * @ba: Block address
-- */
--static uint64_t ba2addr(struct nmbm_instance *ni, uint32_t ba)
--{
--	return (uint64_t)ba << ni->erasesize_shift;
--}
--/*
-- * size2blk - Get minimum required blocks for storing specific size of data
-- * @ni: NMBM instance structure
-- * @size: size for storing
-- */
--static uint32_t size2blk(struct nmbm_instance *ni, uint64_t size)
--{
--	return (size + ni->lower.erasesize - 1) >> ni->erasesize_shift;
--}
--
--/*****************************************************************************/
--/* High level NAND chip APIs */
--/*****************************************************************************/
--
--/*
-- * nmbm_reset_chip - Reset NAND device
-- * @nld: Lower NAND chip structure
-- */
--static void nmbm_reset_chip(struct nmbm_instance *ni)
--{
--	if (ni->lower.reset_chip)
--		ni->lower.reset_chip(ni->lower.arg);
--}
--
--/*
-- * nmbm_read_phys_page - Read page with retry
-- * @ni: NMBM instance structure
-- * @addr: linear address where the data will be read from
-- * @data: the main data to be read
-- * @oob: the oob data to be read
-- * @mode: mode for processing oob data
-- *
-- * Read a page for at most NMBM_TRY_COUNT times.
-- *
-- * Return 0 for success, positive value for corrected bitflip count,
-- * -EBADMSG for ecc error, other negative values for other errors
-- */
--static int nmbm_read_phys_page(struct nmbm_instance *ni, uint64_t addr,
--			       void *data, void *oob, enum nmbm_oob_mode mode)
--{
--	int tries, ret;
--
--	for (tries = 0; tries < NMBM_TRY_COUNT; tries++) {
--		ret = ni->lower.read_page(ni->lower.arg, addr, data, oob, mode);
--		if (ret >= 0)
--			return ret;
--
--		nmbm_reset_chip(ni);
--	}
--
--	if (ret != -EBADMSG)
--		nlog_err(ni, "Page read failed at address 0x%08llx\n", addr);
--
--	return ret;
--}
--
--/*
-- * nmbm_write_phys_page - Write page with retry
-- * @ni: NMBM instance structure
-- * @addr: linear address where the data will be written to
-- * @data: the main data to be written
-- * @oob: the oob data to be written
-- * @mode: mode for processing oob data
-- *
-- * Write a page for at most NMBM_TRY_COUNT times.
-- */
--static bool nmbm_write_phys_page(struct nmbm_instance *ni, uint64_t addr,
--				 const void *data, const void *oob,
--				 enum nmbm_oob_mode mode)
--{
--	int tries, ret;
--
--	if (ni->lower.flags & NMBM_F_READ_ONLY) {
--		nlog_err(ni, "%s called with NMBM_F_READ_ONLY set\n", addr);
--		return false;
--	}
--
--	for (tries = 0; tries < NMBM_TRY_COUNT; tries++) {
--		ret = ni->lower.write_page(ni->lower.arg, addr, data, oob, mode);
--		if (!ret)
--			return true;
--
--		nmbm_reset_chip(ni);
--	}
--
--	nlog_err(ni, "Page write failed at address 0x%08llx\n", addr);
--
--	return false;
--}
--
--/*
-- * nmbm_erase_phys_block - Erase a block with retry
-- * @ni: NMBM instance structure
-- * @addr: Linear address
-- *
-- * Erase a block for at most NMBM_TRY_COUNT times.
-- */
--static bool nmbm_erase_phys_block(struct nmbm_instance *ni, uint64_t addr)
--{
--	int tries, ret;
--
--	if (ni->lower.flags & NMBM_F_READ_ONLY) {
--		nlog_err(ni, "%s called with NMBM_F_READ_ONLY set\n", addr);
--		return false;
--	}
--
--	for (tries = 0; tries < NMBM_TRY_COUNT; tries++) {
--		ret = ni->lower.erase_block(ni->lower.arg, addr);
--		if (!ret)
--			return true;
--
--		nmbm_reset_chip(ni);
--	}
--
--	nlog_err(ni, "Block erasure failed at address 0x%08llx\n", addr);
--
--	return false;
--}
--
--/*
-- * nmbm_check_bad_phys_block - Check whether a block is marked bad in OOB
-- * @ni: NMBM instance structure
-- * @ba: block address
-- */
--static bool nmbm_check_bad_phys_block(struct nmbm_instance *ni, uint32_t ba)
--{
--	uint64_t addr = ba2addr(ni, ba);
--	int ret;
--
--	if (ni->lower.is_bad_block)
--		return ni->lower.is_bad_block(ni->lower.arg, addr);
--
--	/* Treat ECC error as read success */
--	ret = nmbm_read_phys_page(ni, addr, NULL,
--				  ni->page_cache + ni->lower.writesize,
--				  NMBM_MODE_RAW);
--	if (ret < 0 && ret != -EBADMSG)
--		return true;
--
--	return ni->page_cache[ni->lower.writesize] != 0xff;
--}
--
--/*
-- * nmbm_mark_phys_bad_block - Mark a block bad
-- * @ni: NMBM instance structure
-- * @addr: Linear address
-- */
--static int nmbm_mark_phys_bad_block(struct nmbm_instance *ni, uint32_t ba)
--{
--	uint64_t addr = ba2addr(ni, ba);
--	enum nmbm_log_category level;
--	uint32_t off;
--
--	if (ni->lower.flags & NMBM_F_READ_ONLY) {
--		nlog_err(ni, "%s called with NMBM_F_READ_ONLY set\n", addr);
--		return false;
--	}
--
--	nlog_info(ni, "Block %u [0x%08llx] will be marked bad\n", ba, addr);
--
--	if (ni->lower.mark_bad_block)
--		return ni->lower.mark_bad_block(ni->lower.arg, addr);
--
--	/* Whole page set to 0x00 */
--	memset(ni->page_cache, 0, ni->rawpage_size);
--
--	/* Write to all pages within this block, disable all errors */
--	level = nmbm_set_log_level(ni, __NMBM_LOG_MAX);
--
--	for (off = 0; off < ni->lower.erasesize; off += ni->lower.writesize) {
--		nmbm_write_phys_page(ni, addr + off, ni->page_cache,
--				     ni->page_cache + ni->lower.writesize,
--				     NMBM_MODE_RAW);
--	}
--
--	nmbm_set_log_level(ni, level);
--
--	return 0;
--}
--
--/*****************************************************************************/
--/* NMBM related functions */
--/*****************************************************************************/
--
--/*
-- * nmbm_check_header - Check whether a NMBM structure is valid
-- * @data: pointer to a NMBM structure with a NMBM header at beginning
-- * @size: Size of the buffer pointed by @header
-- *
-- * The size of the NMBM structure may be larger than NMBM header,
-- * e.g. block mapping table and block state table.
-- */
--static bool nmbm_check_header(const void *data, uint32_t size)
--{
--	const struct nmbm_header *header = data;
--	struct nmbm_header nhdr;
--	uint32_t new_checksum;
--
--	/*
--	 * Make sure expected structure size is equal or smaller than
--	 * buffer size.
--	 */
--	if (header->size > size)
--		return false;
--
--	memcpy(&nhdr, data, sizeof(nhdr));
--
--	nhdr.checksum = 0;
--	new_checksum = nmbm_crc32(0, &nhdr, sizeof(nhdr));
--	if (header->size > sizeof(nhdr))
--		new_checksum = nmbm_crc32(new_checksum,
--			(const uint8_t *)data + sizeof(nhdr),
--			header->size - sizeof(nhdr));
--
--	if (header->checksum != new_checksum)
--		return false;
--
--	return true;
--}
--
--/*
-- * nmbm_update_checksum - Update checksum of a NMBM structure
-- * @header: pointer to a NMBM structure with a NMBM header at beginning
-- *
-- * The size of the NMBM structure must be specified by @header->size
-- */
--static void nmbm_update_checksum(struct nmbm_header *header)
--{
--	header->checksum = 0;
--	header->checksum = nmbm_crc32(0, header, header->size);
--}
--
--/*
-- * nmbm_get_spare_block_count - Calculate number of blocks should be reserved
-- * @block_count: number of blocks of data
-- *
-- * Calculate number of blocks should be reserved for data
-- */
--static uint32_t nmbm_get_spare_block_count(uint32_t block_count)
--{
--	uint32_t val;
--
--	val = (block_count + NMBM_SPARE_BLOCK_DIV / 2) / NMBM_SPARE_BLOCK_DIV;
--	val *= NMBM_SPARE_BLOCK_MULTI;
--
--	if (val < NMBM_SPARE_BLOCK_MIN)
--		val = NMBM_SPARE_BLOCK_MIN;
--
--	return val;
--}
--
--/*
-- * nmbm_get_block_state_raw - Get state of a block from raw block state table
-- * @block_state: pointer to raw block state table (bitmap)
-- * @ba: block address
-- */
--static uint32_t nmbm_get_block_state_raw(nmbm_bitmap_t *block_state,
--					 uint32_t ba)
--{
--	uint32_t unit, shift;
--
--	unit = ba / NMBM_BITMAP_BLOCKS_PER_UNIT;
--	shift = (ba % NMBM_BITMAP_BLOCKS_PER_UNIT) * NMBM_BITMAP_BITS_PER_BLOCK;
--
--	return (block_state[unit] >> shift) & BLOCK_ST_MASK;
--}
--
--/*
-- * nmbm_get_block_state - Get state of a block from block state table
-- * @ni: NMBM instance structure
-- * @ba: block address
-- */
--static uint32_t nmbm_get_block_state(struct nmbm_instance *ni, uint32_t ba)
--{
--	return nmbm_get_block_state_raw(ni->block_state, ba);
--}
--
--/*
-- * nmbm_set_block_state - Set state of a block to block state table
-- * @ni: NMBM instance structure
-- * @ba: block address
-- * @state: block state
-- *
-- * Set state of a block. If the block state changed, ni->block_state_changed
-- * will be increased.
-- */
--static bool nmbm_set_block_state(struct nmbm_instance *ni, uint32_t ba,
--				 uint32_t state)
--{
--	uint32_t unit, shift, orig;
--	nmbm_bitmap_t uv;
--
--	unit = ba / NMBM_BITMAP_BLOCKS_PER_UNIT;
--	shift = (ba % NMBM_BITMAP_BLOCKS_PER_UNIT) * NMBM_BITMAP_BITS_PER_BLOCK;
--
--	orig = (ni->block_state[unit] >> shift) & BLOCK_ST_MASK;
--	state &= BLOCK_ST_MASK;
--
--	uv = ni->block_state[unit] & (~(BLOCK_ST_MASK << shift));
--	uv |= state << shift;
--	ni->block_state[unit] = uv;
--
--	if (state == BLOCK_ST_BAD)
--		nmbm_mark_block_color_bad(ni, ba);
--
--	if (orig != state) {
--		ni->block_state_changed++;
--		return true;
--	}
--
--	return false;
--}
--
--/*
-- * nmbm_block_walk_asc - Skip specified number of good blocks, ascending addr.
-- * @ni: NMBM instance structure
-- * @ba: start physical block address
-- * @nba: return physical block address after walk
-- * @count: number of good blocks to be skipped
-- * @limit: highest block address allowed for walking
-- *
-- * Start from @ba, skipping any bad blocks, counting @count good blocks, and
-- * return the next good block address.
-- *
-- * If no enough good blocks counted while @limit reached, false will be returned.
-- *
-- * If @count == 0, nearest good block address will be returned.
-- * @limit is not counted in walking.
-- */
--static bool nmbm_block_walk_asc(struct nmbm_instance *ni, uint32_t ba,
--				uint32_t *nba, uint32_t count,
--				uint32_t limit)
--{
--	int32_t nblock = count;
--
--	if (limit >= ni->block_count)
--		limit = ni->block_count - 1;
--
--	while (ba < limit) {
--		if (nmbm_get_block_state(ni, ba) == BLOCK_ST_GOOD)
--			nblock--;
--
--		if (nblock < 0) {
--			*nba = ba;
--			return true;
--		}
--
--		ba++;
--	}
--
--	return false;
--}
--
--/*
-- * nmbm_block_walk_desc - Skip specified number of good blocks, descending addr
-- * @ni: NMBM instance structure
-- * @ba: start physical block address
-- * @nba: return physical block address after walk
-- * @count: number of good blocks to be skipped
-- * @limit: lowest block address allowed for walking
-- *
-- * Start from @ba, skipping any bad blocks, counting @count good blocks, and
-- * return the next good block address.
-- *
-- * If no enough good blocks counted while @limit reached, false will be returned.
-- *
-- * If @count == 0, nearest good block address will be returned.
-- * @limit is not counted in walking.
-- */
--static bool nmbm_block_walk_desc(struct nmbm_instance *ni, uint32_t ba,
--				 uint32_t *nba, uint32_t count, uint32_t limit)
--{
--	int32_t nblock = count;
--
--	if (limit >= ni->block_count)
--		limit = ni->block_count - 1;
--
--	while (ba > limit) {
--		if (nmbm_get_block_state(ni, ba) == BLOCK_ST_GOOD)
--			nblock--;
--
--		if (nblock < 0) {
--			*nba = ba;
--			return true;
--		}
--
--		ba--;
--	}
--
--	return false;
--}
--
--/*
-- * nmbm_block_walk - Skip specified number of good blocks from curr. block addr
-- * @ni: NMBM instance structure
-- * @ascending: whether to walk ascending
-- * @ba: start physical block address
-- * @nba: return physical block address after walk
-- * @count: number of good blocks to be skipped
-- * @limit: highest/lowest block address allowed for walking
-- *
-- * Start from @ba, skipping any bad blocks, counting @count good blocks, and
-- * return the next good block address.
-- *
-- * If no enough good blocks counted while @limit reached, false will be returned.
-- *
-- * If @count == 0, nearest good block address will be returned.
-- * @limit can be set to negative if no limit required.
-- * @limit is not counted in walking.
-- */
--static bool nmbm_block_walk(struct nmbm_instance *ni, bool ascending,
--			    uint32_t ba, uint32_t *nba, int32_t count,
--			    int32_t limit)
--{
--	if (ascending)
--		return nmbm_block_walk_asc(ni, ba, nba, count, limit);
--
--	return nmbm_block_walk_desc(ni, ba, nba, count, limit);
--}
--
--/*
-- * nmbm_scan_badblocks - Scan and record all bad blocks
-- * @ni: NMBM instance structure
-- *
-- * Scan the entire lower NAND chip and record all bad blocks in to block state
-- * table.
-- */
--static void nmbm_scan_badblocks(struct nmbm_instance *ni)
--{
--	uint32_t ba;
--
--	for (ba = 0; ba < ni->block_count; ba++) {
--		if (nmbm_check_bad_phys_block(ni, ba)) {
--			nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
--			nlog_info(ni, "Bad block %u [0x%08llx]\n", ba,
--				 ba2addr(ni, ba));
--		}
--	}
--}
--
--/*
-- * nmbm_build_mapping_table - Build initial block mapping table
-- * @ni: NMBM instance structure
-- *
-- * The initial mapping table will be compatible with the stratage of
-- * factory production.
-- */
--static void nmbm_build_mapping_table(struct nmbm_instance *ni)
--{
--	uint32_t pb, lb;
--
--	for (pb = 0, lb = 0; pb < ni->mgmt_start_ba; pb++) {
--		if (nmbm_get_block_state(ni, pb) == BLOCK_ST_BAD)
--			continue;
--
--		/* Always map to the next good block */
--		ni->block_mapping[lb++] = pb;
--	}
--
--	ni->data_block_count = lb;
--
--	/* Unusable/Management blocks */
--	for (pb = lb; pb < ni->block_count; pb++)
--		ni->block_mapping[pb] = -1;
--}
--
--/*
-- * nmbm_erase_block_and_check - Erase a block and check its usability
-- * @ni: NMBM instance structure
-- * @ba: block address to be erased
-- *
-- * Erase a block anc check its usability
-- *
-- * Return true if the block is usable, false if erasure failure or the block
-- * has too many bitflips.
-- */
--static bool nmbm_erase_block_and_check(struct nmbm_instance *ni, uint32_t ba)
--{
--	uint64_t addr, off;
--	bool success;
--	int ret;
--
--	success = nmbm_erase_phys_block(ni, ba2addr(ni, ba));
--	if (!success)
--		return false;
--
--	if (!(ni->lower.flags & NMBM_F_EMPTY_PAGE_ECC_OK))
--		return true;
--
--	/* Check every page to make sure there aren't too many bitflips */
--
--	addr = ba2addr(ni, ba);
--
--	for (off = 0; off < ni->lower.erasesize; off += ni->lower.writesize) {
--		WATCHDOG_RESET();
--
--		ret = nmbm_read_phys_page(ni, addr + off, ni->page_cache, NULL,
--					  NMBM_MODE_PLACE_OOB);
--		if (ret == -EBADMSG) {
--			/*
--			 * NMBM_F_EMPTY_PAGE_ECC_OK means the empty page is
--			 * still protected by ECC. So reading pages with ECC
--			 * enabled and -EBADMSG means there are too many
--			 * bitflips that can't be recovered, and the block
--			 * containing the page should be marked bad.
--			 */
--			nlog_err(ni,
--				 "Too many bitflips in empty page at 0x%llx\n",
--				 addr + off);
--			return false;
--		}
--	}
--
--	return true;
--}
--
--/*
-- * nmbm_erase_range - Erase a range of blocks
-- * @ni: NMBM instance structure
-- * @ba: block address where the erasure will start
-- * @limit: top block address allowed for erasure
-- *
-- * Erase blocks within the specific range. Newly-found bad blocks will be
-- * marked.
-- *
-- * @limit is not counted into the allowed erasure address.
-- */
--static void nmbm_erase_range(struct nmbm_instance *ni, uint32_t ba,
--			     uint32_t limit)
--{
--	bool success;
--
--	while (ba < limit) {
--		WATCHDOG_RESET();
--
--		if (nmbm_get_block_state(ni, ba) != BLOCK_ST_GOOD)
--			goto next_block;
--
--		/* Insurance to detect unexpected bad block marked by user */
--		if (nmbm_check_bad_phys_block(ni, ba)) {
--			nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
--			goto next_block;
--		}
--
--		success = nmbm_erase_block_and_check(ni, ba);
--		if (success)
--			goto next_block;
--
--		nmbm_mark_phys_bad_block(ni, ba);
--		nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
--
--	next_block:
--		ba++;
--	}
--}
--
--/*
-- * nmbm_write_repeated_data - Write critical data to a block with retry
-- * @ni: NMBM instance structure
-- * @ba: block address where the data will be written to
-- * @data: the data to be written
-- * @size: size of the data
-- *
-- * Write data to every page of the block. Success only if all pages within
-- * this block have been successfully written.
-- *
-- * Make sure data size is not bigger than one page.
-- *
-- * This function will write and verify every page for at most
-- * NMBM_TRY_COUNT times.
-- */
--static bool nmbm_write_repeated_data(struct nmbm_instance *ni, uint32_t ba,
--				     const void *data, uint32_t size)
--{
--	uint64_t addr, off;
--	bool success;
--	int ret;
--
--	if (size > ni->lower.writesize)
--		return false;
--
--	addr = ba2addr(ni, ba);
--
--	for (off = 0; off < ni->lower.erasesize; off += ni->lower.writesize) {
--		WATCHDOG_RESET();
--
--		/* Prepare page data. fill 0xff to unused region */
--		memcpy(ni->page_cache, data, size);
--		memset(ni->page_cache + size, 0xff, ni->rawpage_size - size);
--
--		success = nmbm_write_phys_page(ni, addr + off, ni->page_cache,
--					       NULL, NMBM_MODE_PLACE_OOB);
--		if (!success)
--			return false;
--
--		/* Verify the data just written. ECC error indicates failure */
--		ret = nmbm_read_phys_page(ni, addr + off, ni->page_cache, NULL,
--					  NMBM_MODE_PLACE_OOB);
--		if (ret < 0)
--			return false;
--
--		if (memcmp(ni->page_cache, data, size))
--			return false;
--	}
--
--	return true;
--}
--
--/*
-- * nmbm_write_signature - Write signature to NAND chip
-- * @ni: NMBM instance structure
-- * @limit: top block address allowed for writing
-- * @signature: the signature to be written
-- * @signature_ba: the actual block address where signature is written to
-- *
-- * Write signature within a specific range, from chip bottom to limit.
-- * At most one block will be written.
-- *
-- * @limit is not counted into the allowed write address.
-- */
--static bool nmbm_write_signature(struct nmbm_instance *ni, uint32_t limit,
--				 const struct nmbm_signature *signature,
--				 uint32_t *signature_ba)
--{
--	uint32_t ba = ni->block_count - 1;
--	bool success;
--
--	while (ba > limit) {
--		WATCHDOG_RESET();
--
--		if (nmbm_get_block_state(ni, ba) != BLOCK_ST_GOOD)
--			goto next_block;
--
--		/* Insurance to detect unexpected bad block marked by user */
--		if (nmbm_check_bad_phys_block(ni, ba)) {
--			nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
--			goto next_block;
--		}
--
--		success = nmbm_erase_block_and_check(ni, ba);
--		if (!success)
--			goto skip_bad_block;
--
--		success = nmbm_write_repeated_data(ni, ba, signature,
--						   sizeof(*signature));
--		if (success) {
--			*signature_ba = ba;
--			return true;
--		}
--
--	skip_bad_block:
--		nmbm_mark_phys_bad_block(ni, ba);
--		nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
--
--	next_block:
--		ba--;
--	};
--
--	return false;
--}
--
--/*
-- * nmbn_read_data - Read data
-- * @ni: NMBM instance structure
-- * @addr: linear address where the data will be read from
-- * @data: the data to be read
-- * @size: the size of data
-- *
-- * Read data range.
-- * Every page will be tried for at most NMBM_TRY_COUNT times.
-- *
-- * Return 0 for success, positive value for corrected bitflip count,
-- * -EBADMSG for ecc error, other negative values for other errors
-- */
--static int nmbn_read_data(struct nmbm_instance *ni, uint64_t addr, void *data,
--			  uint32_t size)
--{
--	uint64_t off = addr;
--	uint8_t *ptr = data;
--	uint32_t sizeremain = size, chunksize, leading;
--	int ret;
--
--	while (sizeremain) {
--		WATCHDOG_RESET();
--
--		leading = off & ni->writesize_mask;
--		chunksize = ni->lower.writesize - leading;
--		if (chunksize > sizeremain)
--			chunksize = sizeremain;
--
--		if (chunksize == ni->lower.writesize) {
--			ret = nmbm_read_phys_page(ni, off - leading, ptr, NULL,
--						  NMBM_MODE_PLACE_OOB);
--			if (ret < 0)
--				return ret;
--		} else {
--			ret = nmbm_read_phys_page(ni, off - leading,
--						  ni->page_cache, NULL,
--						  NMBM_MODE_PLACE_OOB);
--			if (ret < 0)
--				return ret;
--
--			memcpy(ptr, ni->page_cache + leading, chunksize);
--		}
--
--		off += chunksize;
--		ptr += chunksize;
--		sizeremain -= chunksize;
--	}
--
--	return 0;
--}
--
--/*
-- * nmbn_write_verify_data - Write data with validation
-- * @ni: NMBM instance structure
-- * @addr: linear address where the data will be written to
-- * @data: the data to be written
-- * @size: the size of data
-- *
-- * Write data and verify.
-- * Every page will be tried for at most NMBM_TRY_COUNT times.
-- */
--static bool nmbn_write_verify_data(struct nmbm_instance *ni, uint64_t addr,
--				   const void *data, uint32_t size)
--{
--	uint64_t off = addr;
--	const uint8_t *ptr = data;
--	uint32_t sizeremain = size, chunksize, leading;
--	bool success;
--	int ret;
--
--	while (sizeremain) {
--		WATCHDOG_RESET();
--
--		leading = off & ni->writesize_mask;
--		chunksize = ni->lower.writesize - leading;
--		if (chunksize > sizeremain)
--			chunksize = sizeremain;
--
--		/* Prepare page data. fill 0xff to unused region */
--		memset(ni->page_cache, 0xff, ni->rawpage_size);
--		memcpy(ni->page_cache + leading, ptr, chunksize);
--
--		success = nmbm_write_phys_page(ni, off - leading,
--					       ni->page_cache, NULL,
--					       NMBM_MODE_PLACE_OOB);
--		if (!success)
--			return false;
--
--		/* Verify the data just written. ECC error indicates failure */
--		ret = nmbm_read_phys_page(ni, off - leading, ni->page_cache,
--					  NULL, NMBM_MODE_PLACE_OOB);
--		if (ret < 0)
--			return false;
--
--		if (memcmp(ni->page_cache + leading, ptr, chunksize))
--			return false;
--
--		off += chunksize;
--		ptr += chunksize;
--		sizeremain -= chunksize;
--	}
--
--	return true;
--}
--
--/*
-- * nmbm_write_mgmt_range - Write management data into NAND within a range
-- * @ni: NMBM instance structure
-- * @addr: preferred start block address for writing
-- * @limit: highest block address allowed for writing
-- * @data: the data to be written
-- * @size: the size of data
-- * @actual_start_ba: actual start block address of data
-- * @actual_end_ba: block address after the end of data
-- *
-- * @limit is not counted into the allowed write address.
-- */
--static bool nmbm_write_mgmt_range(struct nmbm_instance *ni, uint32_t ba,
--				  uint32_t limit, const void *data,
--				  uint32_t size, uint32_t *actual_start_ba,
--				  uint32_t *actual_end_ba)
--{
--	const uint8_t *ptr = data;
--	uint32_t sizeremain = size, chunksize;
--	bool success;
--
--	while (sizeremain && ba < limit) {
--		WATCHDOG_RESET();
--
--		chunksize = sizeremain;
--		if (chunksize > ni->lower.erasesize)
--			chunksize = ni->lower.erasesize;
--
--		if (nmbm_get_block_state(ni, ba) != BLOCK_ST_GOOD)
--			goto next_block;
--
--		/* Insurance to detect unexpected bad block marked by user */
--		if (nmbm_check_bad_phys_block(ni, ba)) {
--			nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
--			goto next_block;
--		}
--
--		success = nmbm_erase_block_and_check(ni, ba);
--		if (!success)
--			goto skip_bad_block;
--
--		success = nmbn_write_verify_data(ni, ba2addr(ni, ba), ptr,
--						 chunksize);
--		if (!success)
--			goto skip_bad_block;
--
--		if (sizeremain == size)
--			*actual_start_ba = ba;
--
--		ptr += chunksize;
--		sizeremain -= chunksize;
--
--		goto next_block;
--
--	skip_bad_block:
--		nmbm_mark_phys_bad_block(ni, ba);
--		nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
--
--	next_block:
--		ba++;
--	}
--
--	if (sizeremain)
--		return false;
--
--	*actual_end_ba = ba;
--
--	return true;
--}
--
--/*
-- * nmbm_generate_info_table_cache - Generate info table cache data
-- * @ni: NMBM instance structure
-- *
-- * Generate info table cache data to be written into flash.
-- */
--static bool nmbm_generate_info_table_cache(struct nmbm_instance *ni)
--{
--	bool changed = false;
--
--	memset(ni->info_table_cache, 0xff, ni->info_table_size);
--
--	memcpy(ni->info_table_cache + ni->info_table.state_table_off,
--	       ni->block_state, ni->state_table_size);
--
--	memcpy(ni->info_table_cache + ni->info_table.mapping_table_off,
--		ni->block_mapping, ni->mapping_table_size);
--
--	ni->info_table.header.magic = NMBM_MAGIC_INFO_TABLE;
--	ni->info_table.header.version = NMBM_VER;
--	ni->info_table.header.size = ni->info_table_size;
--
--	if (ni->block_state_changed || ni->block_mapping_changed) {
--		ni->info_table.write_count++;
--		changed = true;
--	}
--
--	memcpy(ni->info_table_cache, &ni->info_table, sizeof(ni->info_table));
--
--	nmbm_update_checksum((struct nmbm_header *)ni->info_table_cache);
--
--	return changed;
--}
--
--/*
-- * nmbm_write_info_table - Write info table into NAND within a range
-- * @ni: NMBM instance structure
-- * @ba: preferred start block address for writing
-- * @limit: highest block address allowed for writing
-- * @actual_start_ba: actual start block address of info table
-- * @actual_end_ba: block address after the end of info table
-- *
-- * @limit is counted into the allowed write address.
-- */
--static bool nmbm_write_info_table(struct nmbm_instance *ni, uint32_t ba,
--				  uint32_t limit, uint32_t *actual_start_ba,
--				  uint32_t *actual_end_ba)
--{
--	return nmbm_write_mgmt_range(ni, ba, limit, ni->info_table_cache,
--				     ni->info_table_size, actual_start_ba,
--				     actual_end_ba);
--}
--
--/*
-- * nmbm_mark_tables_clean - Mark info table `clean'
-- * @ni: NMBM instance structure
-- */
--static void nmbm_mark_tables_clean(struct nmbm_instance *ni)
--{
--	ni->block_state_changed = 0;
--	ni->block_mapping_changed = 0;
--}
--
--/*
-- * nmbm_try_reserve_blocks - Reserve blocks with compromisation
-- * @ni: NMBM instance structure
-- * @ba: start physical block address
-- * @nba: return physical block address after reservation
-- * @count: number of good blocks to be skipped
-- * @min_count: minimum number of good blocks to be skipped
-- * @limit: highest/lowest block address allowed for walking
-- *
-- * Reserve specific blocks. If failed, try to reserve as many as possible.
-- */
--static bool nmbm_try_reserve_blocks(struct nmbm_instance *ni, uint32_t ba,
--				    uint32_t *nba, uint32_t count,
--				    int32_t min_count, int32_t limit)
--{
--	int32_t nblocks = count;
--	bool success;
--
--	while (nblocks >= min_count) {
--		success = nmbm_block_walk(ni, true, ba, nba, nblocks, limit);
--		if (success)
--			return true;
--
--		nblocks--;
--	}
--
--	return false;
--}
--
--/*
-- * nmbm_rebuild_info_table - Build main & backup info table from scratch
-- * @ni: NMBM instance structure
-- * @allow_no_gap: allow no spare blocks between two tables
-- */
--static bool nmbm_rebuild_info_table(struct nmbm_instance *ni)
--{
--	uint32_t table_start_ba, table_end_ba, next_start_ba;
--	uint32_t main_table_end_ba;
--	bool success;
--
--	/* Set initial value */
--	ni->main_table_ba = 0;
--	ni->backup_table_ba = 0;
--	ni->mapping_blocks_ba = ni->mapping_blocks_top_ba;
--
--	/* Write main table */
--	success = nmbm_write_info_table(ni, ni->mgmt_start_ba,
--					ni->mapping_blocks_top_ba,
--					&table_start_ba, &table_end_ba);
--	if (!success) {
--		/* Failed to write main table, data will be lost */
--		nlog_emerg(ni, "Unable to write at least one info table!\n");
--		nlog_emerg(ni, "Please save your data before power off!\n");
--		ni->protected = 1;
--		return false;
--	}
--
--	/* Main info table is successfully written, record its offset */
--	ni->main_table_ba = table_start_ba;
--	main_table_end_ba = table_end_ba;
--
--	/* Adjust mapping_blocks_ba */
--	ni->mapping_blocks_ba = table_end_ba;
--
--	nmbm_mark_tables_clean(ni);
--
--	nlog_table_creation(ni, true, table_start_ba, table_end_ba);
--
--	/* Reserve spare blocks for main info table. */
--	success = nmbm_try_reserve_blocks(ni, table_end_ba,
--					  &next_start_ba,
--					  ni->info_table_spare_blocks, 0,
--					  ni->mapping_blocks_top_ba -
--					  size2blk(ni, ni->info_table_size));
--	if (!success) {
--		/* There is no spare block. */
--		nlog_debug(ni, "No room for backup info table\n");
--		return true;
--	}
--
--	/* Write backup info table. */
--	success = nmbm_write_info_table(ni, next_start_ba,
--					ni->mapping_blocks_top_ba,
--					&table_start_ba, &table_end_ba);
--	if (!success) {
--		/* There is no enough blocks for backup table. */
--		nlog_debug(ni, "No room for backup info table\n");
--		return true;
--	}
--
--	/* Backup table is successfully written, record its offset */
--	ni->backup_table_ba = table_start_ba;
--
--	/* Adjust mapping_blocks_off */
--	ni->mapping_blocks_ba = table_end_ba;
--
--	/* Erase spare blocks of main table to clean possible interference data */
--	nmbm_erase_range(ni, main_table_end_ba, ni->backup_table_ba);
--
--	nlog_table_creation(ni, false, table_start_ba, table_end_ba);
--
--	return true;
--}
--
--/*
-- * nmbm_rescue_single_info_table - Rescue when there is only one info table
-- * @ni: NMBM instance structure
-- *
-- * This function is called when there is only one info table exists.
-- * This function may fail if we can't write new info table
-- */
--static bool nmbm_rescue_single_info_table(struct nmbm_instance *ni)
--{
--	uint32_t table_start_ba, table_end_ba, write_ba;
--	bool success;
--
--	/* Try to write new info table in front of existing table */
--	success = nmbm_write_info_table(ni, ni->mgmt_start_ba,
--					ni->main_table_ba,
--					&table_start_ba,
--					&table_end_ba);
--	if (success) {
--		/*
--		 * New table becomes the main table, existing table becomes
--		 * the backup table.
--		 */
--		ni->backup_table_ba = ni->main_table_ba;
--		ni->main_table_ba = table_start_ba;
--
--		nmbm_mark_tables_clean(ni);
--
--		/* Erase spare blocks of main table to clean possible interference data */
--		nmbm_erase_range(ni, table_end_ba, ni->backup_table_ba);
--
--		nlog_table_creation(ni, true, table_start_ba, table_end_ba);
--
--		return true;
--	}
--
--	/* Try to reserve spare blocks for existing table */
--	success = nmbm_try_reserve_blocks(ni, ni->mapping_blocks_ba, &write_ba,
--					  ni->info_table_spare_blocks, 0,
--					  ni->mapping_blocks_top_ba -
--					  size2blk(ni, ni->info_table_size));
--	if (!success) {
--		nlog_warn(ni, "Failed to rescue single info table\n");
--		return false;
--	}
--
--	/* Try to write new info table next to the existing table */
--	while (write_ba >= ni->mapping_blocks_ba) {
--		WATCHDOG_RESET();
--
--		success = nmbm_write_info_table(ni, write_ba,
--						ni->mapping_blocks_top_ba,
--						&table_start_ba,
--						&table_end_ba);
--		if (success)
--			break;
--
--		write_ba--;
--	}
--
--	if (success) {
--		/* Erase spare blocks of main table to clean possible interference data */
--		nmbm_erase_range(ni, ni->mapping_blocks_ba, table_start_ba);
--
--		/* New table becomes the backup table */
--		ni->backup_table_ba = table_start_ba;
--		ni->mapping_blocks_ba = table_end_ba;
--
--		nmbm_mark_tables_clean(ni);
--
--		nlog_table_creation(ni, false, table_start_ba, table_end_ba);
--
--		return true;
--	}
--
--	nlog_warn(ni, "Failed to rescue single info table\n");
--	return false;
--}
--
--/*
-- * nmbm_update_single_info_table - Update specific one info table
-- * @ni: NMBM instance structure
-- */
--static bool nmbm_update_single_info_table(struct nmbm_instance *ni,
--					  bool update_main_table)
--{
--	uint32_t write_start_ba, write_limit, table_start_ba, table_end_ba;
--	bool success;
--
--	/* Determine the write range */
--	if (update_main_table) {
--		write_start_ba = ni->main_table_ba;
--		write_limit = ni->backup_table_ba;
--	} else {
--		write_start_ba = ni->backup_table_ba;
--		write_limit = ni->mapping_blocks_top_ba;
--	}
--
--	nmbm_mark_block_color_mgmt(ni, write_start_ba, write_limit - 1);
--
--	success = nmbm_write_info_table(ni, write_start_ba, write_limit,
--					&table_start_ba, &table_end_ba);
--	if (success) {
--		if (update_main_table) {
--			ni->main_table_ba = table_start_ba;
--		} else {
--			ni->backup_table_ba = table_start_ba;
--			ni->mapping_blocks_ba = table_end_ba;
--		}
--
--		nmbm_mark_tables_clean(ni);
--
--		nlog_table_update(ni, update_main_table, table_start_ba,
--				 table_end_ba);
--
--		return true;
--	}
--
--	if (update_main_table) {
--		/*
--		 * If failed to update main table, make backup table the new
--		 * main table, and call nmbm_rescue_single_info_table()
--		 */
--		nlog_warn(ni, "Unable to update %s info table\n",
--			 update_main_table ? "Main" : "Backup");
--
--		ni->main_table_ba = ni->backup_table_ba;
--		ni->backup_table_ba = 0;
--		return nmbm_rescue_single_info_table(ni);
--	}
--
--	/* Only one table left */
--	ni->mapping_blocks_ba = ni->backup_table_ba;
--	ni->backup_table_ba = 0;
--
--	return false;
--}
--
--/*
-- * nmbm_rescue_main_info_table - Rescue when failed to write main info table
-- * @ni: NMBM instance structure
-- *
-- * This function is called when main info table failed to be written, and
-- *    backup info table exists.
-- */
--static bool nmbm_rescue_main_info_table(struct nmbm_instance *ni)
--{
--	uint32_t tmp_table_start_ba, tmp_table_end_ba, main_table_start_ba;
--	uint32_t main_table_end_ba, write_ba;
--	uint32_t info_table_erasesize = size2blk(ni, ni->info_table_size);
--	bool success;
--
--	/* Try to reserve spare blocks for existing backup info table */
--	success = nmbm_try_reserve_blocks(ni, ni->mapping_blocks_ba, &write_ba,
--					  ni->info_table_spare_blocks, 0,
--					  ni->mapping_blocks_top_ba -
--					  info_table_erasesize);
--	if (!success) {
--		/* There is no spare block. Backup info table becomes the main table. */
--		nlog_err(ni, "No room for temporary info table\n");
--		ni->main_table_ba = ni->backup_table_ba;
--		ni->backup_table_ba = 0;
--		return true;
--	}
--
--	/* Try to write temporary info table into spare unmapped blocks */
--	while (write_ba >= ni->mapping_blocks_ba) {
--		WATCHDOG_RESET();
--
--		success = nmbm_write_info_table(ni, write_ba,
--						ni->mapping_blocks_top_ba,
--						&tmp_table_start_ba,
--						&tmp_table_end_ba);
--		if (success)
--			break;
--
--		write_ba--;
--	}
--
--	if (!success) {
--		/* Backup info table becomes the main table */
--		nlog_err(ni, "Failed to update main info table\n");
--		ni->main_table_ba = ni->backup_table_ba;
--		ni->backup_table_ba = 0;
--		return true;
--	}
--
--	/* Adjust mapping_blocks_off */
--	ni->mapping_blocks_ba = tmp_table_end_ba;
--
--	nmbm_mark_block_color_mgmt(ni, ni->backup_table_ba,
--				   tmp_table_end_ba - 1);
--
--	/*
--	 * Now write main info table at the beginning of management area.
--	 * This operation will generally destroy the original backup info
--	 * table.
--	 */
--	success = nmbm_write_info_table(ni, ni->mgmt_start_ba,
--					tmp_table_start_ba,
--					&main_table_start_ba,
--					&main_table_end_ba);
--	if (!success) {
--		/* Temporary info table becomes the main table */
--		ni->main_table_ba = tmp_table_start_ba;
--		ni->backup_table_ba = 0;
--
--		nmbm_mark_tables_clean(ni);
--
--		nlog_err(ni, "Failed to update main info table\n");
--		nmbm_mark_block_color_info_table(ni, tmp_table_start_ba,
--						 tmp_table_end_ba - 1);
--
--		return true;
--	}
--
--	/* Main info table has been successfully written, record its offset */
--	ni->main_table_ba = main_table_start_ba;
--
--	nmbm_mark_tables_clean(ni);
--
--	nlog_table_creation(ni, true, main_table_start_ba, main_table_end_ba);
--
--	/*
--	 * Temporary info table becomes the new backup info table if it's
--	 * not overwritten.
--	 */
--	if (main_table_end_ba <= tmp_table_start_ba) {
--		ni->backup_table_ba = tmp_table_start_ba;
--
--		nlog_table_creation(ni, false, tmp_table_start_ba,
--				   tmp_table_end_ba);
--
--		return true;
--	}
--
--	/* Adjust mapping_blocks_off */
--	ni->mapping_blocks_ba = main_table_end_ba;
--
--	/* Try to reserve spare blocks for new main info table */
--	success = nmbm_try_reserve_blocks(ni, main_table_end_ba, &write_ba,
--					  ni->info_table_spare_blocks, 0,
--					  ni->mapping_blocks_top_ba -
--					  info_table_erasesize);
--	if (!success) {
--		/* There is no spare block. Only main table exists. */
--		nlog_err(ni, "No room for backup info table\n");
--		ni->backup_table_ba = 0;
--		return true;
--	}
--
--	/* Write new backup info table. */
--	while (write_ba >= main_table_end_ba) {
--		WATCHDOG_RESET();
--
--		success = nmbm_write_info_table(ni, write_ba,
--						ni->mapping_blocks_top_ba,
--						&tmp_table_start_ba,
--						&tmp_table_end_ba);
--		if (success)
--			break;
--
--		write_ba--;
--	}
--
--	if (!success) {
--		nlog_err(ni, "No room for backup info table\n");
--		ni->backup_table_ba = 0;
--		return true;
--	}
--
--	/* Backup info table has been successfully written, record its offset */
--	ni->backup_table_ba = tmp_table_start_ba;
--
--	/* Adjust mapping_blocks_off */
--	ni->mapping_blocks_ba = tmp_table_end_ba;
--
--	/* Erase spare blocks of main table to clean possible interference data */
--	nmbm_erase_range(ni, main_table_end_ba, ni->backup_table_ba);
--
--	nlog_table_creation(ni, false, tmp_table_start_ba, tmp_table_end_ba);
--
--	return true;
--}
--
--/*
-- * nmbm_update_info_table_once - Update info table once
-- * @ni: NMBM instance structure
-- * @force: force update
-- *
-- * Update both main and backup info table. Return true if at least one info
-- * table has been successfully written.
-- * This function only try to update info table once regard less of the result.
-- */
--static bool nmbm_update_info_table_once(struct nmbm_instance *ni, bool force)
--{
--	uint32_t table_start_ba, table_end_ba;
--	uint32_t main_table_limit;
--	bool success;
--
--	/* Do nothing if there is no change */
--	if (!nmbm_generate_info_table_cache(ni) && !force)
--		return true;
--
--	/* Check whether both two tables exist */
--	if (!ni->backup_table_ba) {
--		main_table_limit = ni->mapping_blocks_top_ba;
--		goto write_main_table;
--	}
--
--	nmbm_mark_block_color_mgmt(ni, ni->backup_table_ba,
--				   ni->mapping_blocks_ba - 1);
--
--	/*
--	 * Write backup info table in its current range.
--	 * Note that limit is set to mapping_blocks_top_off to provide as many
--	 * spare blocks as possible for the backup table. If at last
--	 * unmapped blocks are used by backup table, mapping_blocks_off will
--	 * be adjusted.
--	 */
--	success = nmbm_write_info_table(ni, ni->backup_table_ba,
--					ni->mapping_blocks_top_ba,
--					&table_start_ba, &table_end_ba);
--	if (!success) {
--		/*
--		 * There is nothing to do if failed to write backup table.
--		 * Write the main table now.
--		 */
--		nlog_err(ni, "No room for backup table\n");
--		ni->mapping_blocks_ba = ni->backup_table_ba;
--		ni->backup_table_ba = 0;
--		main_table_limit = ni->mapping_blocks_top_ba;
--		goto write_main_table;
--	}
--
--	/* Backup table is successfully written, record its offset */
--	ni->backup_table_ba = table_start_ba;
--
--	/* Adjust mapping_blocks_off */
--	ni->mapping_blocks_ba = table_end_ba;
--
--	nmbm_mark_tables_clean(ni);
--
--	/* The normal limit of main table */
--	main_table_limit = ni->backup_table_ba;
--
--	nlog_table_update(ni, false, table_start_ba, table_end_ba);
--
--write_main_table:
--	if (!ni->main_table_ba)
--		goto rebuild_tables;
--
--	if (!ni->backup_table_ba)
--		nmbm_mark_block_color_mgmt(ni, ni->mgmt_start_ba,
--					   ni->mapping_blocks_ba - 1);
--	else
--		nmbm_mark_block_color_mgmt(ni, ni->mgmt_start_ba,
--					   ni->backup_table_ba - 1);
--
--	/* Write main info table in its current range */
--	success = nmbm_write_info_table(ni, ni->main_table_ba,
--					main_table_limit, &table_start_ba,
--					&table_end_ba);
--	if (!success) {
--		/* If failed to write main table, go rescue procedure */
--		if (!ni->backup_table_ba)
--			goto rebuild_tables;
--
--		return nmbm_rescue_main_info_table(ni);
--	}
--
--	/* Main info table is successfully written, record its offset */
--	ni->main_table_ba = table_start_ba;
--
--	/* Adjust mapping_blocks_off */
--	if (!ni->backup_table_ba)
--		ni->mapping_blocks_ba = table_end_ba;
--
--	nmbm_mark_tables_clean(ni);
--
--	nlog_table_update(ni, true, table_start_ba, table_end_ba);
--
--	return true;
--
--rebuild_tables:
--	return nmbm_rebuild_info_table(ni);
--}
--
--/*
-- * nmbm_update_info_table - Update info table
-- * @ni: NMBM instance structure
-- *
-- * Update both main and backup info table. Return true if at least one table
-- * has been successfully written.
-- * This function will try to update info table repeatedly until no new bad
-- * block found during updating.
-- */
--static bool nmbm_update_info_table(struct nmbm_instance *ni)
--{
--	bool success;
--
--	if (ni->protected)
--		return true;
--
--	while (ni->block_state_changed || ni->block_mapping_changed) {
--		success = nmbm_update_info_table_once(ni, false);
--		if (!success) {
--			nlog_err(ni, "Failed to update info table\n");
--			return false;
--		}
--	}
--
--	return true;
--}
--
--/*
-- * nmbm_map_block - Map a bad block to a unused spare block
-- * @ni: NMBM instance structure
-- * @lb: logic block addr to map
-- */
--static bool nmbm_map_block(struct nmbm_instance *ni, uint32_t lb)
--{
--	uint32_t pb;
--	bool success;
--
--	if (ni->mapping_blocks_ba == ni->mapping_blocks_top_ba) {
--		nlog_warn(ni, "No spare unmapped blocks.\n");
--		return false;
--	}
--
--	success = nmbm_block_walk(ni, false, ni->mapping_blocks_top_ba, &pb, 0,
--				  ni->mapping_blocks_ba);
--	if (!success) {
--		nlog_warn(ni, "No spare unmapped blocks.\n");
--		nmbm_update_info_table(ni);
--		ni->mapping_blocks_top_ba = ni->mapping_blocks_ba;
--		return false;
--	}
--
--	ni->block_mapping[lb] = pb;
--	ni->mapping_blocks_top_ba--;
--	ni->block_mapping_changed++;
--
--	nlog_info(ni, "Logic block %u mapped to physical blcok %u\n", lb, pb);
--	nmbm_mark_block_color_mapped(ni, pb);
--
--	return true;
--}
--
--/*
-- * nmbm_create_info_table - Create info table(s)
-- * @ni: NMBM instance structure
-- *
-- * This function assumes that the chip has no existing info table(s)
-- */
--static bool nmbm_create_info_table(struct nmbm_instance *ni)
--{
--	uint32_t lb;
--	bool success;
--
--	/* Set initial mapping_blocks_top_off  */
--	success = nmbm_block_walk(ni, false, ni->signature_ba,
--				  &ni->mapping_blocks_top_ba, 1,
--				  ni->mgmt_start_ba);
--	if (!success) {
--		nlog_err(ni, "No room for spare blocks\n");
--		return false;
--	}
--
--	/* Generate info table cache */
--	nmbm_generate_info_table_cache(ni);
--
--	/* Write info table */
--	success = nmbm_rebuild_info_table(ni);
--	if (!success) {
--		nlog_err(ni, "Failed to build info tables\n");
--		return false;
--	}
--
--	/* Remap bad block(s) at end of data area */
--	for (lb = ni->data_block_count; lb < ni->mgmt_start_ba; lb++) {
--		success = nmbm_map_block(ni, lb);
--		if (!success)
--			break;
--
--		ni->data_block_count++;
--	}
--
--	/* If state table and/or mapping table changed, update info table. */
--	success = nmbm_update_info_table(ni);
--	if (!success)
--		return false;
--
--	return true;
--}
--
--/*
-- * nmbm_create_new - Create NMBM on a new chip
-- * @ni: NMBM instance structure
-- */
--static bool nmbm_create_new(struct nmbm_instance *ni)
--{
--	bool success;
--
--	/* Determine the boundary of management blocks */
--	ni->mgmt_start_ba = ni->block_count * (NMBM_MGMT_DIV - ni->lower.max_ratio) / NMBM_MGMT_DIV;
--
--	if (ni->lower.max_reserved_blocks && ni->block_count - ni->mgmt_start_ba > ni->lower.max_reserved_blocks)
--		ni->mgmt_start_ba = ni->block_count - ni->lower.max_reserved_blocks;
--
--	nlog_info(ni, "NMBM management region starts at block %u [0x%08llx]\n",
--		  ni->mgmt_start_ba, ba2addr(ni, ni->mgmt_start_ba));
--	nmbm_mark_block_color_mgmt(ni, ni->mgmt_start_ba, ni->block_count - 1);
--
--	/* Fill block state table & mapping table */
--	nmbm_scan_badblocks(ni);
--	nmbm_build_mapping_table(ni);
--
--	/* Write signature */
--	ni->signature.header.magic = NMBM_MAGIC_SIGNATURE;
--	ni->signature.header.version = NMBM_VER;
--	ni->signature.header.size = sizeof(ni->signature);
--	ni->signature.nand_size = ni->lower.size;
--	ni->signature.block_size = ni->lower.erasesize;
--	ni->signature.page_size = ni->lower.writesize;
--	ni->signature.spare_size = ni->lower.oobsize;
--	ni->signature.mgmt_start_pb = ni->mgmt_start_ba;
--	ni->signature.max_try_count = NMBM_TRY_COUNT;
--	nmbm_update_checksum(&ni->signature.header);
--
--	if (ni->lower.flags & NMBM_F_READ_ONLY) {
--		nlog_info(ni, "NMBM has been initialized in read-only mode\n");
--		return true;
--	}
--
--	success = nmbm_write_signature(ni, ni->mgmt_start_ba,
--				       &ni->signature, &ni->signature_ba);
--	if (!success) {
--		nlog_err(ni, "Failed to write signature to a proper offset\n");
--		return false;
--	}
--
--	nlog_info(ni, "Signature has been written to block %u [0x%08llx]\n",
--		 ni->signature_ba, ba2addr(ni, ni->signature_ba));
--	nmbm_mark_block_color_signature(ni, ni->signature_ba);
--
--	/* Write info table(s) */
--	success = nmbm_create_info_table(ni);
--	if (success) {
--		nlog_info(ni, "NMBM has been successfully created\n");
--		return true;
--	}
--
--	return false;
--}
--
--/*
-- * nmbm_check_info_table_header - Check if a info table header is valid
-- * @ni: NMBM instance structure
-- * @data: pointer to the info table header
-- */
--static bool nmbm_check_info_table_header(struct nmbm_instance *ni, void *data)
--{
--	struct nmbm_info_table_header *ifthdr = data;
--
--	if (ifthdr->header.magic != NMBM_MAGIC_INFO_TABLE)
--		return false;
--
--	if (ifthdr->header.size != ni->info_table_size)
--		return false;
--
--	if (ifthdr->mapping_table_off - ifthdr->state_table_off < ni->state_table_size)
--		return false;
--
--	if (ni->info_table_size - ifthdr->mapping_table_off < ni->mapping_table_size)
--		return false;
--
--	return true;
--}
--
--/*
-- * nmbm_check_info_table - Check if a whole info table is valid
-- * @ni: NMBM instance structure
-- * @start_ba: start block address of this table
-- * @end_ba: end block address of this table
-- * @data: pointer to the info table header
-- * @mapping_blocks_top_ba: return the block address of top remapped block
-- */
--static bool nmbm_check_info_table(struct nmbm_instance *ni, uint32_t start_ba,
--				  uint32_t end_ba, void *data,
--				  uint32_t *mapping_blocks_top_ba)
--{
--	struct nmbm_info_table_header *ifthdr = data;
--	int32_t *block_mapping = (int32_t *)((uintptr_t)data + ifthdr->mapping_table_off);
--	nmbm_bitmap_t *block_state = (nmbm_bitmap_t *)((uintptr_t)data + ifthdr->state_table_off);
--	uint32_t minimum_mapping_pb = ni->signature_ba;
--	uint32_t ba;
--
--	for (ba = 0; ba < ni->data_block_count; ba++) {
--		if ((block_mapping[ba] >= ni->data_block_count && block_mapping[ba] < end_ba) ||
--		    block_mapping[ba] == ni->signature_ba)
--			return false;
--
--		if (block_mapping[ba] >= end_ba && block_mapping[ba] < minimum_mapping_pb)
--			minimum_mapping_pb = block_mapping[ba];
--	}
--
--	for (ba = start_ba; ba < end_ba; ba++) {
--		if (nmbm_get_block_state(ni, ba) != BLOCK_ST_GOOD)
--			continue;
--
--		if (nmbm_get_block_state_raw(block_state, ba) != BLOCK_ST_GOOD)
--			return false;
--	}
--
--	*mapping_blocks_top_ba = minimum_mapping_pb - 1;
--
--	return true;
--}
--
--/*
-- * nmbm_try_load_info_table - Try to load info table from a address
-- * @ni: NMBM instance structure
-- * @ba: start block address of the info table
-- * @eba: return the block address after end of the table
-- * @write_count: return the write count of this table
-- * @mapping_blocks_top_ba: return the block address of top remapped block
-- * @table_loaded: used to record whether ni->info_table has valid data
-- */
--static bool nmbm_try_load_info_table(struct nmbm_instance *ni, uint32_t ba,
--				     uint32_t *eba, uint32_t *write_count,
--				     uint32_t *mapping_blocks_top_ba,
--				     bool table_loaded)
--{
--	struct nmbm_info_table_header *ifthdr = (void *)ni->info_table_cache;
--	uint8_t *off = ni->info_table_cache;
--	uint32_t limit = ba + size2blk(ni, ni->info_table_size);
--	uint32_t start_ba = 0, chunksize, sizeremain = ni->info_table_size;
--	bool success, checkhdr = true;
--	int ret;
--
--	while (sizeremain && ba < limit) {
--		WATCHDOG_RESET();
--
--		if (nmbm_get_block_state(ni, ba) != BLOCK_ST_GOOD)
--			goto next_block;
--
--		if (nmbm_check_bad_phys_block(ni, ba)) {
--			nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
--			goto next_block;
--		}
--
--		chunksize = sizeremain;
--		if (chunksize > ni->lower.erasesize)
--			chunksize = ni->lower.erasesize;
--
--		/* Assume block with ECC error has no info table data */
--		ret = nmbn_read_data(ni, ba2addr(ni, ba), off, chunksize);
--		if (ret < 0)
--			goto skip_bad_block;
--		else if (ret > 0)
--			return false;
--
--		if (checkhdr) {
--			success = nmbm_check_info_table_header(ni, off);
--			if (!success)
--				return false;
--
--			start_ba = ba;
--			checkhdr = false;
--		}
--
--		off += chunksize;
--		sizeremain -= chunksize;
--
--		goto next_block;
--
--	skip_bad_block:
--		/* Only mark bad in memory */
--		nmbm_set_block_state(ni, ba, BLOCK_ST_BAD);
--
--	next_block:
--		ba++;
--	}
--
--	if (sizeremain)
--		return false;
--
--	success = nmbm_check_header(ni->info_table_cache, ni->info_table_size);
--	if (!success)
--		return false;
--
--	*eba = ba;
--	*write_count = ifthdr->write_count;
--
--	success = nmbm_check_info_table(ni, start_ba, ba, ni->info_table_cache,
--					mapping_blocks_top_ba);
--	if (!success)
--		return false;
--
--	if (!table_loaded || ifthdr->write_count > ni->info_table.write_count) {
--		memcpy(&ni->info_table, ifthdr, sizeof(ni->info_table));
--		memcpy(ni->block_state,
--		       (uint8_t *)ifthdr + ifthdr->state_table_off,
--		       ni->state_table_size);
--		memcpy(ni->block_mapping,
--		       (uint8_t *)ifthdr + ifthdr->mapping_table_off,
--		       ni->mapping_table_size);
--		ni->info_table.write_count = ifthdr->write_count;
--	}
--
--	return true;
--}
--
--/*
-- * nmbm_search_info_table - Search info table from specific address
-- * @ni: NMBM instance structure
-- * @ba: start block address to search
-- * @limit: highest block address allowed for searching
-- * @table_start_ba: return the start block address of this table
-- * @table_end_ba: return the block address after end of this table
-- * @write_count: return the write count of this table
-- * @mapping_blocks_top_ba: return the block address of top remapped block
-- * @table_loaded: used to record whether ni->info_table has valid data
-- */
--static bool nmbm_search_info_table(struct nmbm_instance *ni, uint32_t ba,
--				   uint32_t limit, uint32_t *table_start_ba,
--				   uint32_t *table_end_ba,
--				   uint32_t *write_count,
--				   uint32_t *mapping_blocks_top_ba,
--				   bool table_loaded)
--{
--	bool success;
--
--	while (ba < limit - size2blk(ni, ni->info_table_size)) {
--		WATCHDOG_RESET();
--
--		success = nmbm_try_load_info_table(ni, ba, table_end_ba,
--						   write_count,
--						   mapping_blocks_top_ba,
--						   table_loaded);
--		if (success) {
--			*table_start_ba = ba;
--			return true;
--		}
--
--		ba++;
--	}
--
--	return false;
--}
--
--/*
-- * nmbm_load_info_table - Load info table(s) from a chip
-- * @ni: NMBM instance structure
-- * @ba: start block address to search info table
-- * @limit: highest block address allowed for searching
-- */
--static bool nmbm_load_info_table(struct nmbm_instance *ni, uint32_t ba,
--				 uint32_t limit)
--{
--	uint32_t main_table_end_ba, backup_table_end_ba, table_end_ba;
--	uint32_t main_mapping_blocks_top_ba, backup_mapping_blocks_top_ba;
--	uint32_t main_table_write_count, backup_table_write_count;
--	uint32_t i;
--	bool success;
--
--	/* Set initial value */
--	ni->main_table_ba = 0;
--	ni->backup_table_ba = 0;
--	ni->info_table.write_count = 0;
--	ni->mapping_blocks_top_ba = ni->signature_ba - 1;
--	ni->data_block_count = ni->signature.mgmt_start_pb;
--
--	/* Find first info table */
--	success = nmbm_search_info_table(ni, ba, limit, &ni->main_table_ba,
--		&main_table_end_ba, &main_table_write_count,
--		&main_mapping_blocks_top_ba, false);
--	if (!success) {
--		nlog_warn(ni, "No valid info table found\n");
--		return false;
--	}
--
--	table_end_ba = main_table_end_ba;
--
--	nlog_table_found(ni, true, main_table_write_count, ni->main_table_ba,
--			main_table_end_ba);
--
--	/* Find second info table */
--	success = nmbm_search_info_table(ni, main_table_end_ba, limit,
--		&ni->backup_table_ba, &backup_table_end_ba,
--		&backup_table_write_count, &backup_mapping_blocks_top_ba, true);
--	if (!success) {
--		nlog_warn(ni, "Second info table not found\n");
--	} else {
--		table_end_ba = backup_table_end_ba;
--
--		nlog_table_found(ni, false, backup_table_write_count,
--				ni->backup_table_ba, backup_table_end_ba);
--	}
--
--	/* Pick mapping_blocks_top_ba */
--	if (!ni->backup_table_ba) {
--		ni->mapping_blocks_top_ba= main_mapping_blocks_top_ba;
--	} else {
--		if (main_table_write_count >= backup_table_write_count)
--			ni->mapping_blocks_top_ba = main_mapping_blocks_top_ba;
--		else
--			ni->mapping_blocks_top_ba = backup_mapping_blocks_top_ba;
--	}
--
--	/* Set final mapping_blocks_ba */
--	ni->mapping_blocks_ba = table_end_ba;
--
--	/* Set final data_block_count */
--	for (i = ni->signature.mgmt_start_pb; i > 0; i--) {
--		if (ni->block_mapping[i - 1] >= 0) {
--			ni->data_block_count = i;
--			break;
--		}
--	}
--
--	/* Debug purpose: mark mapped blocks and bad blocks */
--	for (i = 0; i < ni->data_block_count; i++) {
--		if (ni->block_mapping[i] > ni->mapping_blocks_top_ba)
--			nmbm_mark_block_color_mapped(ni, ni->block_mapping[i]);
--	}
--
--	for (i = 0; i < ni->block_count; i++) {
--		if (nmbm_get_block_state(ni, i) == BLOCK_ST_BAD)
--			nmbm_mark_block_color_bad(ni, i);
--	}
--
--	/* Regenerate the info table cache from the final selected info table */
--	nmbm_generate_info_table_cache(ni);
--
--	if (ni->lower.flags & NMBM_F_READ_ONLY)
--		return true;
--
--	/*
--	 * If only one table exists, try to write another table.
--	 * If two tables have different write count, try to update info table
--	 */
--	if (!ni->backup_table_ba) {
--		success = nmbm_rescue_single_info_table(ni);
--	} else if (main_table_write_count != backup_table_write_count) {
--		/* Mark state & mapping tables changed */
--		ni->block_state_changed = 1;
--		ni->block_mapping_changed = 1;
--
--		success = nmbm_update_single_info_table(ni,
--			main_table_write_count < backup_table_write_count);
--	} else {
--		success = true;
--	}
--
--	/*
--	 * If there is no spare unmapped blocks, or still only one table
--	 * exists, set the chip to read-only
--	 */
--	if (ni->mapping_blocks_ba == ni->mapping_blocks_top_ba) {
--		nlog_warn(ni, "No spare unmapped blocks. Device is now read-only\n");
--		ni->protected = 1;
--	} else if (!success) {
--		nlog_warn(ni, "Only one info table found. Device is now read-only\n");
--		ni->protected = 1;
--	}
--
--	return true;
--}
--
--/*
-- * nmbm_load_existing - Load NMBM from a new chip
-- * @ni: NMBM instance structure
-- */
--static bool nmbm_load_existing(struct nmbm_instance *ni)
--{
--	bool success;
--
--	/* Calculate the boundary of management blocks */
--	ni->mgmt_start_ba = ni->signature.mgmt_start_pb;
--
--	nlog_debug(ni, "NMBM management region starts at block %u [0x%08llx]\n",
--		  ni->mgmt_start_ba, ba2addr(ni, ni->mgmt_start_ba));
--	nmbm_mark_block_color_mgmt(ni, ni->mgmt_start_ba,
--				   ni->signature_ba - 1);
--
--	/* Look for info table(s) */
--	success = nmbm_load_info_table(ni, ni->mgmt_start_ba,
--		ni->signature_ba);
--	if (success) {
--		nlog_info(ni, "NMBM has been successfully attached %s\n",
--			  (ni->lower.flags & NMBM_F_READ_ONLY) ? "in read-only mode" : "");
--		return true;
--	}
--
--	if (!(ni->lower.flags & NMBM_F_CREATE))
--		return false;
--
--	/* Fill block state table & mapping table */
--	nmbm_scan_badblocks(ni);
--	nmbm_build_mapping_table(ni);
--
--	if (ni->lower.flags & NMBM_F_READ_ONLY) {
--		nlog_info(ni, "NMBM has been initialized in read-only mode\n");
--		return true;
--	}
--
--	/* Write info table(s) */
--	success = nmbm_create_info_table(ni);
--	if (success) {
--		nlog_info(ni, "NMBM has been successfully created\n");
--		return true;
--	}
--
--	return false;
--}
--
--/*
-- * nmbm_find_signature - Find signature in the lower NAND chip
-- * @ni: NMBM instance structure
-- * @signature_ba: used for storing block address of the signature
-- * @signature_ba: return the actual block address of signature block
-- *
-- * Find a valid signature from a specific range in the lower NAND chip,
-- * from bottom (highest address) to top (lowest address)
-- *
-- * Return true if found.
-- */
--static bool nmbm_find_signature(struct nmbm_instance *ni,
--				struct nmbm_signature *signature,
--				uint32_t *signature_ba)
--{
--	struct nmbm_signature sig;
--	uint64_t off, addr;
--	uint32_t block_count, ba, limit;
--	bool success;
--	int ret;
--
--	/* Calculate top and bottom block address */
--	block_count = ni->lower.size >> ni->erasesize_shift;
--	ba = block_count;
--	limit = (block_count / NMBM_MGMT_DIV) * (NMBM_MGMT_DIV - ni->lower.max_ratio);
--	if (ni->lower.max_reserved_blocks && block_count - limit > ni->lower.max_reserved_blocks)
--		limit = block_count - ni->lower.max_reserved_blocks;
--
--	while (ba >= limit) {
--		WATCHDOG_RESET();
--
--		ba--;
--		addr = ba2addr(ni, ba);
--
--		if (nmbm_check_bad_phys_block(ni, ba))
--			continue;
--
--		/* Check every page.
--		 * As long as at leaset one page contains valid signature,
--		 * the block is treated as a valid signature block.
--		 */
--		for (off = 0; off < ni->lower.erasesize;
--		     off += ni->lower.writesize) {
--			WATCHDOG_RESET();
--
--			ret = nmbn_read_data(ni, addr + off, &sig,
--					     sizeof(sig));
--			if (ret)
--				continue;
--
--			/* Check for header size and checksum */
--			success = nmbm_check_header(&sig, sizeof(sig));
--			if (!success)
--				continue;
--
--			/* Check for header magic */
--			if (sig.header.magic == NMBM_MAGIC_SIGNATURE) {
--				/* Found it */
--				memcpy(signature, &sig, sizeof(sig));
--				*signature_ba = ba;
--				return true;
--			}
--		}
--	};
--
--	return false;
--}
--
--/*
-- * is_power_of_2_u64 - Check whether a 64-bit integer is power of 2
-- * @n: number to check
-- */
--static bool is_power_of_2_u64(uint64_t n)
--{
--	return (n != 0 && ((n & (n - 1)) == 0));
--}
--
--/*
-- * nmbm_check_lower_members - Validate the members of lower NAND device
-- * @nld: Lower NAND chip structure
-- */
--static bool nmbm_check_lower_members(struct nmbm_lower_device *nld)
--{
--
--	if (!nld->size || !is_power_of_2_u64(nld->size)) {
--		nmbm_log_lower(nld, NMBM_LOG_ERR,
--			       "Chip size %llu is not valid\n", nld->size);
--		return false;
--	}
--
--	if (!nld->erasesize || !is_power_of_2(nld->erasesize)) {
--		nmbm_log_lower(nld, NMBM_LOG_ERR,
--			       "Block size %u is not valid\n", nld->erasesize);
--		return false;
--	}
--
--	if (!nld->writesize || !is_power_of_2(nld->writesize)) {
--		nmbm_log_lower(nld, NMBM_LOG_ERR,
--			       "Page size %u is not valid\n", nld->writesize);
--		return false;
--	}
--
--	if (!nld->oobsize || !is_power_of_2(nld->oobsize)) {
--		nmbm_log_lower(nld, NMBM_LOG_ERR,
--			       "Page spare size %u is not valid\n", nld->oobsize);
--		return false;
--	}
--
--	if (!nld->read_page) {
--		nmbm_log_lower(nld, NMBM_LOG_ERR, "read_page() is required\n");
--		return false;
--	}
--
--	if (!(nld->flags & NMBM_F_READ_ONLY) && (!nld->write_page || !nld->erase_block)) {
--		nmbm_log_lower(nld, NMBM_LOG_ERR,
--			       "write_page() and erase_block() are required\n");
--		return false;
--	}
--
--	/* Data sanity check */
--	if (!nld->max_ratio)
--		nld->max_ratio = 1;
--
--	if (nld->max_ratio >= NMBM_MGMT_DIV - 1) {
--		nmbm_log_lower(nld, NMBM_LOG_ERR,
--			       "max ratio %u is invalid\n", nld->max_ratio);
--		return false;
--	}
--
--	if (nld->max_reserved_blocks && nld->max_reserved_blocks < NMBM_MGMT_BLOCKS_MIN) {
--		nmbm_log_lower(nld, NMBM_LOG_ERR,
--			       "max reserved blocks %u is too small\n", nld->max_reserved_blocks);
--		return false;
--	}
--
--	return true;
--}
--
--/*
-- * nmbm_calc_structure_size - Calculate the instance structure size
-- * @nld: NMBM lower device structure
-- */
--size_t nmbm_calc_structure_size(struct nmbm_lower_device *nld)
--{
--	uint32_t state_table_size, mapping_table_size, info_table_size;
--	uint32_t block_count;
--
--	block_count = nmbm_lldiv(nld->size, nld->erasesize);
--
--	/* Calculate info table size */
--	state_table_size = ((block_count + NMBM_BITMAP_BLOCKS_PER_UNIT - 1) /
--		NMBM_BITMAP_BLOCKS_PER_UNIT) * NMBM_BITMAP_UNIT_SIZE;
--	mapping_table_size = block_count * sizeof(int32_t);
--
--	info_table_size = NMBM_ALIGN(sizeof(struct nmbm_info_table_header),
--				     nld->writesize);
--	info_table_size += NMBM_ALIGN(state_table_size, nld->writesize);
--	info_table_size += NMBM_ALIGN(mapping_table_size, nld->writesize);
--
--	return info_table_size + state_table_size + mapping_table_size +
--		nld->writesize + nld->oobsize + sizeof(struct nmbm_instance);
--}
--
--/*
-- * nmbm_init_structure - Initialize members of instance structure
-- * @ni: NMBM instance structure
-- */
--static void nmbm_init_structure(struct nmbm_instance *ni)
--{
--	uint32_t pages_per_block, blocks_per_chip;
--	uintptr_t ptr;
--
--	pages_per_block = ni->lower.erasesize / ni->lower.writesize;
--	blocks_per_chip = nmbm_lldiv(ni->lower.size, ni->lower.erasesize);
--
--	ni->rawpage_size = ni->lower.writesize + ni->lower.oobsize;
--	ni->rawblock_size = pages_per_block * ni->rawpage_size;
--	ni->rawchip_size = blocks_per_chip * ni->rawblock_size;
--
--	ni->writesize_mask = ni->lower.writesize - 1;
--	ni->erasesize_mask = ni->lower.erasesize - 1;
--
--	ni->writesize_shift = ffs(ni->lower.writesize) - 1;
--	ni->erasesize_shift = ffs(ni->lower.erasesize) - 1;
--
--	/* Calculate number of block this chip */
--	ni->block_count = ni->lower.size >> ni->erasesize_shift;
--
--	/* Calculate info table size */
--	ni->state_table_size = ((ni->block_count + NMBM_BITMAP_BLOCKS_PER_UNIT - 1) /
--		NMBM_BITMAP_BLOCKS_PER_UNIT) * NMBM_BITMAP_UNIT_SIZE;
--	ni->mapping_table_size = ni->block_count * sizeof(*ni->block_mapping);
--
--	ni->info_table_size = NMBM_ALIGN(sizeof(ni->info_table),
--					 ni->lower.writesize);
--	ni->info_table.state_table_off = ni->info_table_size;
--
--	ni->info_table_size += NMBM_ALIGN(ni->state_table_size,
--					  ni->lower.writesize);
--	ni->info_table.mapping_table_off = ni->info_table_size;
--
--	ni->info_table_size += NMBM_ALIGN(ni->mapping_table_size,
--					  ni->lower.writesize);
--
--	ni->info_table_spare_blocks = nmbm_get_spare_block_count(
--		size2blk(ni, ni->info_table_size));
--
--	/* Assign memory to members */
--	ptr = (uintptr_t)ni + sizeof(*ni);
--
--	ni->info_table_cache = (void *)ptr;
--	ptr += ni->info_table_size;
--
--	ni->block_state = (void *)ptr;
--	ptr += ni->state_table_size;
--
--	ni->block_mapping = (void *)ptr;
--	ptr += ni->mapping_table_size;
--
--	ni->page_cache = (uint8_t *)ptr;
--
--	/* Initialize block state table */
--	ni->block_state_changed = 0;
--	memset(ni->block_state, 0xff, ni->state_table_size);
--
--	/* Initialize block mapping table */
--	ni->block_mapping_changed = 0;
--}
--
--/*
-- * nmbm_attach - Attach to a lower device
-- * @nld: NMBM lower device structure
-- * @ni: NMBM instance structure
-- */
--int nmbm_attach(struct nmbm_lower_device *nld, struct nmbm_instance *ni)
--{
--	bool success;
--
--	if (!nld || !ni)
--		return -EINVAL;
--
--	/* Set default log level */
--	ni->log_display_level = NMBM_DEFAULT_LOG_LEVEL;
--
--	/* Check lower members */
--	success = nmbm_check_lower_members(nld);
--	if (!success)
--		return -EINVAL;
--
--	/* Initialize NMBM instance */
--	memcpy(&ni->lower, nld, sizeof(struct nmbm_lower_device));
--	nmbm_init_structure(ni);
--
--	success = nmbm_find_signature(ni, &ni->signature, &ni->signature_ba);
--	if (!success) {
--		if (!(nld->flags & NMBM_F_CREATE)) {
--			nlog_err(ni, "Signature not found\n");
--			return -ENODEV;
--		}
--
--		success = nmbm_create_new(ni);
--		if (!success)
--			return -ENODEV;
--
--		return 0;
--	}
--
--	nlog_info(ni, "Signature found at block %u [0x%08llx]\n",
--		 ni->signature_ba, ba2addr(ni, ni->signature_ba));
--	nmbm_mark_block_color_signature(ni, ni->signature_ba);
--
--	if (ni->signature.header.version != NMBM_VER) {
--		nlog_err(ni, "NMBM version %u.%u is not supported\n",
--			NMBM_VERSION_MAJOR_GET(ni->signature.header.version),
--			NMBM_VERSION_MINOR_GET(ni->signature.header.version));
--		return -EINVAL;
--	}
--
--	if (ni->signature.nand_size != nld->size ||
--	    ni->signature.block_size != nld->erasesize ||
--	    ni->signature.page_size != nld->writesize ||
--	    ni->signature.spare_size != nld->oobsize) {
--		nlog_err(ni, "NMBM configuration mismatch\n");
--		return -EINVAL;
--	}
--
--	success = nmbm_load_existing(ni);
--	if (!success)
--		return -ENODEV;
--
--	return 0;
--}
--
--/*
-- * nmbm_detach - Detach from a lower device, and save all tables
-- * @ni: NMBM instance structure
-- */
--int nmbm_detach(struct nmbm_instance *ni)
--{
--	if (!ni)
--		return -EINVAL;
--
--	if (!(ni->lower.flags & NMBM_F_READ_ONLY))
--		nmbm_update_info_table(ni);
--
--	nmbm_mark_block_color_normal(ni, 0, ni->block_count - 1);
--
--	return 0;
--}
--
--/*
-- * nmbm_erase_logic_block - Erase a logic block
-- * @ni: NMBM instance structure
-- * @nmbm_erase_logic_block: logic block address
-- *
-- * Logic block will be mapped to physical block before erasing.
-- * Bad block found during erasinh will be remapped to a good block if there is
-- * still at least one good spare block available.
-- */
--static int nmbm_erase_logic_block(struct nmbm_instance *ni, uint32_t block_addr)
--{
--	uint32_t pb;
--	bool success;
--
--retry:
--	/* Map logic block to physical block */
--	pb = ni->block_mapping[block_addr];
--
--	/* Whether the logic block is good (has valid mapping) */
--	if ((int32_t)pb < 0) {
--		nlog_debug(ni, "Logic block %u is a bad block\n", block_addr);
--		return -EIO;
--	}
--
--	/* Remap logic block if current physical block is a bad block */
--	if (nmbm_get_block_state(ni, pb) == BLOCK_ST_BAD ||
--	    nmbm_get_block_state(ni, pb) == BLOCK_ST_NEED_REMAP)
--		goto remap_logic_block;
--
--	/* Insurance to detect unexpected bad block marked by user */
--	if (nmbm_check_bad_phys_block(ni, pb)) {
--		nlog_warn(ni, "Found unexpected bad block possibly marked by user\n");
--		nmbm_set_block_state(ni, pb, BLOCK_ST_BAD);
--		goto remap_logic_block;
--	}
--
--	success = nmbm_erase_block_and_check(ni, pb);
--	if (success)
--		return 0;
--
--	/* Mark bad block */
--	nmbm_mark_phys_bad_block(ni, pb);
--	nmbm_set_block_state(ni, pb, BLOCK_ST_BAD);
--
--remap_logic_block:
--	/* Try to assign a new block */
--	success = nmbm_map_block(ni, block_addr);
--	if (!success) {
--		/* Mark logic block unusable, and update info table */
--		ni->block_mapping[block_addr] = -1;
--		if (nmbm_get_block_state(ni, pb) != BLOCK_ST_NEED_REMAP)
--			nmbm_set_block_state(ni, pb, BLOCK_ST_BAD);
--		nmbm_update_info_table(ni);
--		return -EIO;
--	}
--
--	/* Update info table before erasing */
--	if (nmbm_get_block_state(ni, pb) != BLOCK_ST_NEED_REMAP)
--		nmbm_set_block_state(ni, pb, BLOCK_ST_BAD);
--	nmbm_update_info_table(ni);
--
--	goto retry;
--}
--
--/*
-- * nmbm_erase_block_range - Erase logic blocks
-- * @ni: NMBM instance structure
-- * @addr: logic linear address
-- * @size: erase range
-- * @failed_addr: return failed block address if error occurs
-- */
--int nmbm_erase_block_range(struct nmbm_instance *ni, uint64_t addr,
--			   uint64_t size, uint64_t *failed_addr)
--{
--	uint32_t start_ba, end_ba;
--	int ret;
--
--	if (!ni)
--		return -EINVAL;
--
--	/* Sanity check */
--	if (ni->protected || (ni->lower.flags & NMBM_F_READ_ONLY)) {
--		nlog_debug(ni, "Device is forced read-only\n");
--		return -EROFS;
--	}
--
--	if (addr >= ba2addr(ni, ni->data_block_count)) {
--		nlog_err(ni, "Address 0x%llx is invalid\n", addr);
--		return -EINVAL;
--	}
--
--	if (addr + size > ba2addr(ni, ni->data_block_count)) {
--		nlog_err(ni, "Erase range 0xllxu is too large\n", size);
--		return -EINVAL;
--	}
--
--	if (!size) {
--		nlog_warn(ni, "No blocks to be erased\n");
--		return 0;
--	}
--
--	start_ba = addr2ba(ni, addr);
--	end_ba = addr2ba(ni, addr + size - 1);
--
--	while (start_ba <= end_ba) {
--		WATCHDOG_RESET();
--
--		ret = nmbm_erase_logic_block(ni, start_ba);
--		if (ret) {
--			if (failed_addr)
--				*failed_addr = ba2addr(ni, start_ba);
--			return ret;
--		}
--
--		start_ba++;
--	}
--
--	return 0;
--}
--
--/*
-- * nmbm_read_logic_page - Read page based on logic address
-- * @ni: NMBM instance structure
-- * @addr: logic linear address
-- * @data: buffer to store main data. optional.
-- * @oob: buffer to store oob data. optional.
-- * @mode: read mode
-- *
-- * Return 0 for success, positive value for corrected bitflip count,
-- * -EBADMSG for ecc error, other negative values for other errors
-- */
--static int nmbm_read_logic_page(struct nmbm_instance *ni, uint64_t addr,
--				void *data, void *oob, enum nmbm_oob_mode mode)
--{
--	uint32_t lb, pb, offset;
--	uint64_t paddr;
--
--	/* Extract block address and in-block offset */
--	lb = addr2ba(ni, addr);
--	offset = addr & ni->erasesize_mask;
--
--	/* Map logic block to physical block */
--	pb = ni->block_mapping[lb];
--
--	/* Whether the logic block is good (has valid mapping) */
--	if ((int32_t)pb < 0) {
--		nlog_debug(ni, "Logic block %u is a bad block\n", lb);
--		return -EIO;
--	}
--
--	/* Fail if physical block is marked bad */
--	if (nmbm_get_block_state(ni, pb) == BLOCK_ST_BAD)
--		return -EIO;
--
--	/* Assemble new address */
--	paddr = ba2addr(ni, pb) + offset;
--
--	return nmbm_read_phys_page(ni, paddr, data, oob, mode);
--}
--
--/*
-- * nmbm_read_single_page - Read one page based on logic address
-- * @ni: NMBM instance structure
-- * @addr: logic linear address
-- * @data: buffer to store main data. optional.
-- * @oob: buffer to store oob data. optional.
-- * @mode: read mode
-- *
-- * Return 0 for success, positive value for corrected bitflip count,
-- * -EBADMSG for ecc error, other negative values for other errors
-- */
--int nmbm_read_single_page(struct nmbm_instance *ni, uint64_t addr, void *data,
--			  void *oob, enum nmbm_oob_mode mode)
--{
--	if (!ni)
--		return -EINVAL;
--
--	/* Sanity check */
--	if (ni->protected) {
--		nlog_debug(ni, "Device is forced read-only\n");
--		return -EROFS;
--	}
--
--	if (addr >= ba2addr(ni, ni->data_block_count)) {
--		nlog_err(ni, "Address 0x%llx is invalid\n", addr);
--		return -EINVAL;
--	}
--
--	return nmbm_read_logic_page(ni, addr, data, oob, mode);
--}
--
--/*
-- * nmbm_read_range - Read data without oob
-- * @ni: NMBM instance structure
-- * @addr: logic linear address
-- * @size: data size to read
-- * @data: buffer to store main data to be read
-- * @mode: read mode
-- * @retlen: return actual data size read
-- *
-- * Return 0 for success, positive value for corrected bitflip count,
-- * -EBADMSG for ecc error, other negative values for other errors
-- */
--int nmbm_read_range(struct nmbm_instance *ni, uint64_t addr, size_t size,
--		    void *data, enum nmbm_oob_mode mode, size_t *retlen)
--{
--	uint64_t off = addr;
--	uint8_t *ptr = data;
--	size_t sizeremain = size, chunksize, leading;
--	bool has_ecc_err = false;
--	int ret, max_bitflips = 0;
--
--	if (!ni)
--		return -EINVAL;
--
--	/* Sanity check */
--	if (ni->protected) {
--		nlog_debug(ni, "Device is forced read-only\n");
--		return -EROFS;
--	}
--
--	if (addr >= ba2addr(ni, ni->data_block_count)) {
--		nlog_err(ni, "Address 0x%llx is invalid\n", addr);
--		return -EINVAL;
--	}
--
--	if (addr + size > ba2addr(ni, ni->data_block_count)) {
--		nlog_err(ni, "Read range 0x%llx is too large\n", size);
--		return -EINVAL;
--	}
--
--	if (!size) {
--		nlog_warn(ni, "No data to be read\n");
--		return 0;
--	}
--
--	while (sizeremain) {
--		WATCHDOG_RESET();
--
--		leading = off & ni->writesize_mask;
--		chunksize = ni->lower.writesize - leading;
--		if (chunksize > sizeremain)
--			chunksize = sizeremain;
--
--		if (chunksize == ni->lower.writesize) {
--			ret = nmbm_read_logic_page(ni, off - leading, ptr,
--							NULL, mode);
--			if (ret < 0 && ret != -EBADMSG)
--				break;
--		} else {
--			ret = nmbm_read_logic_page(ni, off - leading,
--							ni->page_cache, NULL,
--							mode);
--			if (ret < 0 && ret != -EBADMSG)
--				break;
--
--			memcpy(ptr, ni->page_cache + leading, chunksize);
--		}
--
--		if (ret == -EBADMSG)
--			has_ecc_err = true;
--
--		if (ret > max_bitflips)
--			max_bitflips = ret;
--
--		off += chunksize;
--		ptr += chunksize;
--		sizeremain -= chunksize;
--	}
--
--	if (retlen)
--		*retlen = size - sizeremain;
--
--	if (ret < 0 && ret != -EBADMSG)
--		return ret;
--
--	if (has_ecc_err)
--		return -EBADMSG;
--
--	return max_bitflips;
--}
--
--/*
-- * nmbm_write_logic_page - Read page based on logic address
-- * @ni: NMBM instance structure
-- * @addr: logic linear address
-- * @data: buffer contains main data. optional.
-- * @oob: buffer contains oob data. optional.
-- * @mode: write mode
-- */
--static int nmbm_write_logic_page(struct nmbm_instance *ni, uint64_t addr,
--				  const void *data, const void *oob,
--				  enum nmbm_oob_mode mode)
--{
--	uint32_t lb, pb, offset;
--	uint64_t paddr;
--	bool success;
--
--	/* Extract block address and in-block offset */
--	lb = addr2ba(ni, addr);
--	offset = addr & ni->erasesize_mask;
--
--	/* Map logic block to physical block */
--	pb = ni->block_mapping[lb];
--
--	/* Whether the logic block is good (has valid mapping) */
--	if ((int32_t)pb < 0) {
--		nlog_debug(ni, "Logic block %u is a bad block\n", lb);
--		return -EIO;
--	}
--
--	/* Fail if physical block is marked bad */
--	if (nmbm_get_block_state(ni, pb) == BLOCK_ST_BAD)
--		return -EIO;
--
--	/* Assemble new address */
--	paddr = ba2addr(ni, pb) + offset;
--
--	success = nmbm_write_phys_page(ni, paddr, data, oob, mode);
--	if (success)
--		return 0;
--
--	/*
--	 * Do not remap bad block here. Just mark this block in state table.
--	 * Remap this block on erasing.
--	 */
--	nmbm_set_block_state(ni, pb, BLOCK_ST_NEED_REMAP);
--	nmbm_update_info_table(ni);
--
--	return -EIO;
--}
--
--/*
-- * nmbm_write_single_page - Write one page based on logic address
-- * @ni: NMBM instance structure
-- * @addr: logic linear address
-- * @data: buffer contains main data. optional.
-- * @oob: buffer contains oob data. optional.
-- * @mode: write mode
-- */
--int nmbm_write_single_page(struct nmbm_instance *ni, uint64_t addr,
--			   const void *data, const void *oob,
--			   enum nmbm_oob_mode mode)
--{
--	if (!ni)
--		return -EINVAL;
--
--	/* Sanity check */
--	if (ni->protected || (ni->lower.flags & NMBM_F_READ_ONLY)) {
--		nlog_debug(ni, "Device is forced read-only\n");
--		return -EROFS;
--	}
--
--	if (addr >= ba2addr(ni, ni->data_block_count)) {
--		nlog_err(ni, "Address 0x%llx is invalid\n", addr);
--		return -EINVAL;
--	}
--
--	return nmbm_write_logic_page(ni, addr, data, oob, mode);
--}
--
--/*
-- * nmbm_write_range - Write data without oob
-- * @ni: NMBM instance structure
-- * @addr: logic linear address
-- * @size: data size to write
-- * @data: buffer contains data to be written
-- * @mode: write mode
-- * @retlen: return actual data size written
-- */
--int nmbm_write_range(struct nmbm_instance *ni, uint64_t addr, size_t size,
--		     const void *data, enum nmbm_oob_mode mode,
--		     size_t *retlen)
--{
--	uint64_t off = addr;
--	const uint8_t *ptr = data;
--	size_t sizeremain = size, chunksize, leading;
--	int ret;
--
--	if (!ni)
--		return -EINVAL;
--
--	/* Sanity check */
--	if (ni->protected || (ni->lower.flags & NMBM_F_READ_ONLY)) {
--		nlog_debug(ni, "Device is forced read-only\n");
--		return -EROFS;
--	}
--
--	if (addr >= ba2addr(ni, ni->data_block_count)) {
--		nlog_err(ni, "Address 0x%llx is invalid\n", addr);
--		return -EINVAL;
--	}
--
--	if (addr + size > ba2addr(ni, ni->data_block_count)) {
--		nlog_err(ni, "Write size 0x%zx is too large\n", size);
--		return -EINVAL;
--	}
--
--	if (!size) {
--		nlog_warn(ni, "No data to be written\n");
--		return 0;
--	}
--
--	while (sizeremain) {
--		WATCHDOG_RESET();
--
--		leading = off & ni->writesize_mask;
--		chunksize = ni->lower.writesize - leading;
--		if (chunksize > sizeremain)
--			chunksize = sizeremain;
--
--		if (chunksize == ni->lower.writesize) {
--			ret = nmbm_write_logic_page(ni, off - leading, ptr,
--							 NULL, mode);
--			if (ret)
--				break;
--		} else {
--			memset(ni->page_cache, 0xff, leading);
--			memcpy(ni->page_cache + leading, ptr, chunksize);
--
--			ret = nmbm_write_logic_page(ni, off - leading,
--							 ni->page_cache, NULL,
--							 mode);
--			if (ret)
--				break;
--		}
--
--		off += chunksize;
--		ptr += chunksize;
--		sizeremain -= chunksize;
--	}
--
--	if (retlen)
--		*retlen = size - sizeremain;
--
--	return ret;
--}
--
--/*
-- * nmbm_check_bad_block - Check whether a logic block is usable
-- * @ni: NMBM instance structure
-- * @addr: logic linear address
-- */
--int nmbm_check_bad_block(struct nmbm_instance *ni, uint64_t addr)
--{
--	uint32_t lb, pb;
--
--	if (!ni)
--		return -EINVAL;
--
--	if (addr >= ba2addr(ni, ni->data_block_count)) {
--		nlog_err(ni, "Address 0x%llx is invalid\n", addr);
--		return -EINVAL;
--	}
--
--	lb = addr2ba(ni, addr);
--
--	/* Map logic block to physical block */
--	pb = ni->block_mapping[lb];
--
--	if ((int32_t)pb < 0)
--		return 1;
--
--	if (nmbm_get_block_state(ni, pb) == BLOCK_ST_BAD)
--		return 1;
--
--	return 0;
--}
--
--/*
-- * nmbm_mark_bad_block - Mark a logic block unusable
-- * @ni: NMBM instance structure
-- * @addr: logic linear address
-- */
--int nmbm_mark_bad_block(struct nmbm_instance *ni, uint64_t addr)
--{
--	uint32_t lb, pb;
--
--	if (!ni)
--		return -EINVAL;
--
--	/* Sanity check */
--	if (ni->protected || (ni->lower.flags & NMBM_F_READ_ONLY)) {
--		nlog_debug(ni, "Device is forced read-only\n");
--		return -EROFS;
--	}
--
--	if (addr >= ba2addr(ni, ni->data_block_count)) {
--		nlog_err(ni, "Address 0x%llx is invalid\n", addr);
--		return -EINVAL;
--	}
--
--	lb = addr2ba(ni, addr);
--
--	/* Map logic block to physical block */
--	pb = ni->block_mapping[lb];
--
--	if ((int32_t)pb < 0)
--		return 0;
--
--	ni->block_mapping[lb] = -1;
--	nmbm_mark_phys_bad_block(ni, pb);
--	nmbm_set_block_state(ni, pb, BLOCK_ST_BAD);
--	nmbm_update_info_table(ni);
--
--	return 0;
--}
--
--/*
-- * nmbm_get_avail_size - Get available user data size
-- * @ni: NMBM instance structure
-- */
--uint64_t nmbm_get_avail_size(struct nmbm_instance *ni)
--{
--	if (!ni)
--		return 0;
--
--	return (uint64_t)ni->data_block_count << ni->erasesize_shift;
--}
--
--/*
-- * nmbm_get_lower_device - Get lower device structure
-- * @ni: NMBM instance structure
-- * @nld: pointer to hold the data of lower device structure
-- */
--int nmbm_get_lower_device(struct nmbm_instance *ni, struct nmbm_lower_device *nld)
--{
--	if (!ni)
--		return -EINVAL;
--
--	if (nld)
--		memcpy(nld, &ni->lower, sizeof(*nld));
--
--	return 0;
--}
--
--#include "nmbm-debug.inl"
-diff --git a/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-debug.h b/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-debug.h
-deleted file mode 100644
-index 7f9dfed9e1..0000000000
---- a/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-debug.h
-+++ /dev/null
-@@ -1,20 +0,0 @@
--/* SPDX-License-Identifier: GPL-2.0 */
--/*
-- * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
-- *
-- * Debug addons for NAND Mapped-block Management (NMBM)
-- *
-- * Author: Weijie Gao <weijie.gao@mediatek.com>
-- */
--
--#ifndef _NMBM_DEBUG_H_
--#define _NMBM_DEBUG_H_
--
--#define nmbm_mark_block_color_normal(ni, start_ba, end_ba)
--#define nmbm_mark_block_color_bad(ni, ba)
--#define nmbm_mark_block_color_mgmt(ni, start_ba, end_ba)
--#define nmbm_mark_block_color_signature(ni, ba)
--#define nmbm_mark_block_color_info_table(ni, start_ba, end_ba)
--#define nmbm_mark_block_color_mapped(ni, ba)
--
--#endif /* _NMBM_DEBUG_H_ */
-diff --git a/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-debug.inl b/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-debug.inl
-deleted file mode 100644
-index e69de29bb2..0000000000
-diff --git a/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-mtd.c b/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-mtd.c
-deleted file mode 100644
-index a3e9e1832d..0000000000
---- a/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-mtd.c
-+++ /dev/null
-@@ -1,795 +0,0 @@
--// SPDX-License-Identifier: GPL-2.0
--/*
-- * MTD layer for NAND Mapped-block Management (NMBM)
-- *
-- * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
-- *
-- * Author: Weijie Gao <weijie.gao@mediatek.com>
-- */
--
--#include <linux/kernel.h>
--#include <linux/module.h>
--#include <linux/init.h>
--#include <linux/device.h>
--#include <linux/slab.h>
--#include <linux/interrupt.h>
--#include <linux/sched.h>
--#include <linux/wait.h>
--#include <linux/spinlock.h>
--#include <linux/mtd/mtd.h>
--#include <linux/mtd/flashchip.h>
--#include <linux/mtd/partitions.h>
--#include <linux/of_platform.h>
--#include <linux/kern_levels.h>
--
--#include "nmbm-private.h"
--#include "nmbm-debug.h"
--
--#define NMBM_MAX_RATIO_DEFAULT			1
--#define NMBM_MAX_BLOCKS_DEFAULT			256
--
--struct nmbm_mtd {
--	struct mtd_info upper;
--	struct mtd_info *lower;
--
--	struct nmbm_instance *ni;
--	uint8_t *page_cache;
--
--	flstate_t state;
--	spinlock_t lock;
--	wait_queue_head_t wq;
--
--	struct device *dev;
--	struct list_head node;
--};
--
--struct list_head nmbm_devs;
--static DEFINE_MUTEX(nmbm_devs_lock);
--
--static int nmbm_lower_read_page(void *arg, uint64_t addr, void *buf, void *oob,
--				enum nmbm_oob_mode mode)
--{
--	struct nmbm_mtd *nm = arg;
--	struct mtd_oob_ops ops;
--	int ret;
--
--	memset(&ops, 0, sizeof(ops));
--
--	switch (mode) {
--	case NMBM_MODE_PLACE_OOB:
--		ops.mode = MTD_OPS_PLACE_OOB;
--		break;
--	case NMBM_MODE_AUTO_OOB:
--		ops.mode = MTD_OPS_AUTO_OOB;
--		break;
--	case NMBM_MODE_RAW:
--		ops.mode = MTD_OPS_RAW;
--		break;
--	default:
--		pr_debug("%s: unsupported NMBM mode: %u\n", __func__, mode);
--		return -ENOTSUPP;
--	}
--
--	if (buf) {
--		ops.datbuf = buf;
--		ops.len = nm->lower->writesize;
--	}
--
--	if (oob) {
--		ops.oobbuf = oob;
--		ops.ooblen = mtd_oobavail(nm->lower, &ops);
--	}
--
--	ret = mtd_read_oob(nm->lower, addr, &ops);
--	nm->upper.ecc_stats.corrected = nm->lower->ecc_stats.corrected;
--	nm->upper.ecc_stats.failed = nm->lower->ecc_stats.failed;
--
--	/* Report error on failure (including ecc error) */
--	if (ret < 0 && ret != -EUCLEAN)
--		return ret;
--
--	/*
--	 * Since mtd_read_oob() won't report exact bitflips, what we can know
--	 * is whether bitflips exceeds the threshold.
--	 * We want the -EUCLEAN to be passed to the upper layer, but not the
--	 * error value itself. To achieve this, report bitflips above the
--	 * threshold.
--	 */
--
--	if (ret == -EUCLEAN) {
--		return min_t(u32, nm->lower->bitflip_threshold + 1,
--			     nm->lower->ecc_strength);
--	}
--
--	/* For bitflips less than the threshold, return 0 */
--	return 0;
--}
--
--static int nmbm_lower_write_page(void *arg, uint64_t addr, const void *buf,
--				 const void *oob, enum nmbm_oob_mode mode)
--{
--	struct nmbm_mtd *nm = arg;
--	struct mtd_oob_ops ops;
--
--	memset(&ops, 0, sizeof(ops));
--
--	switch (mode) {
--	case NMBM_MODE_PLACE_OOB:
--		ops.mode = MTD_OPS_PLACE_OOB;
--		break;
--	case NMBM_MODE_AUTO_OOB:
--		ops.mode = MTD_OPS_AUTO_OOB;
--		break;
--	case NMBM_MODE_RAW:
--		ops.mode = MTD_OPS_RAW;
--		break;
--	default:
--		pr_debug("%s: unsupported NMBM mode: %u\n", __func__, mode);
--		return -ENOTSUPP;
--	}
--
--	if (buf) {
--		ops.datbuf = (uint8_t *)buf;
--		ops.len = nm->lower->writesize;
--	}
--
--	if (oob) {
--		ops.oobbuf = (uint8_t *)oob;
--		ops.ooblen = mtd_oobavail(nm->lower, &ops);
--	}
--
--	return mtd_write_oob(nm->lower, addr, &ops);
--}
--
--static int nmbm_lower_erase_block(void *arg, uint64_t addr)
--{
--	struct nmbm_mtd *nm = arg;
--	struct erase_info ei;
--
--	memset(&ei, 0, sizeof(ei));
--
--	ei.addr = addr;
--	ei.len = nm->lower->erasesize;
--
--	return mtd_erase(nm->lower, &ei);
--}
--
--static int nmbm_lower_is_bad_block(void *arg, uint64_t addr)
--{
--	struct nmbm_mtd *nm = arg;
--
--	return mtd_block_isbad(nm->lower, addr);
--}
--
--static int nmbm_lower_mark_bad_block(void *arg, uint64_t addr)
--{
--	struct nmbm_mtd *nm = arg;
--
--	return mtd_block_markbad(nm->lower, addr);
--}
--
--static void nmbm_lower_log(void *arg, enum nmbm_log_category level,
--			   const char *fmt, va_list ap)
--{
--	struct nmbm_mtd *nm = arg;
--	char *msg;
--	char *kl;
--
--	msg = kvasprintf(GFP_KERNEL, fmt, ap);
--	if (!msg) {
--		dev_warn(nm->dev, "unable to print log\n");
--		return;
--	}
--
--	switch (level) {
--	case NMBM_LOG_DEBUG:
--		kl = KERN_DEBUG;
--		break;
--	case NMBM_LOG_WARN:
--		kl = KERN_WARNING;
--		break;
--	case NMBM_LOG_ERR:
--		kl = KERN_ERR;
--		break;
--	case NMBM_LOG_EMERG:
--		kl = KERN_EMERG;
--		break;
--	default:
--		kl = KERN_INFO ;
--	}
--
--	dev_printk(kl, nm->dev, "%s", msg);
--
--	kfree(msg);
--}
--
--static int nmbm_get_device(struct nmbm_mtd *nm, int new_state)
--{
--	DECLARE_WAITQUEUE(wait, current);
--
--retry:
--	spin_lock(&nm->lock);
--
--	if (nm->state == FL_READY) {
--		nm->state = new_state;
--		spin_unlock(&nm->lock);
--		return 0;
--	}
--
--	if (new_state == FL_PM_SUSPENDED) {
--		if (nm->state == FL_PM_SUSPENDED) {
--			spin_unlock(&nm->lock);
--			return 0;
--		}
--	}
--
--	set_current_state(TASK_UNINTERRUPTIBLE);
--	add_wait_queue(&nm->wq, &wait);
--	spin_unlock(&nm->lock);
--	schedule();
--	remove_wait_queue(&nm->wq, &wait);
--	goto retry;
--}
--
--static void nmbm_release_device(struct nmbm_mtd *nm)
--{
--	spin_lock(&nm->lock);
--	nm->state = FL_READY;
--	wake_up(&nm->wq);
--	spin_unlock(&nm->lock);
--}
--
--static int nmbm_mtd_erase(struct mtd_info *mtd, struct erase_info *instr)
--{
--	struct nmbm_mtd *nm = container_of(mtd, struct nmbm_mtd, upper);
--	int ret;
--
--	nmbm_get_device(nm, FL_ERASING);
--
--	ret = nmbm_erase_block_range(nm->ni, instr->addr, instr->len,
--				     &instr->fail_addr);
--
--	nmbm_release_device(nm);
--
--	if (!ret)
--		return 0;
--
--	return -EIO;
--}
--
--static int nmbm_mtd_read_data(struct nmbm_mtd *nm, uint64_t addr,
--			      struct mtd_oob_ops *ops, enum nmbm_oob_mode mode)
--{
--	size_t len, ooblen, maxooblen, chklen;
--	uint32_t col, ooboffs;
--	uint8_t *datcache, *oobcache;
--	bool has_ecc_err = false;
--	int ret, max_bitflips = 0;
--
--	col = addr & nm->lower->writesize_mask;
--	addr &= ~nm->lower->writesize_mask;
--	maxooblen = mtd_oobavail(nm->lower, ops);
--	ooboffs = ops->ooboffs;
--	ooblen = ops->ooblen;
--	len = ops->len;
--
--	datcache = len ? nm->page_cache : NULL;
--	oobcache = ooblen ? nm->page_cache + nm->lower->writesize : NULL;
--
--	ops->oobretlen = 0;
--	ops->retlen = 0;
--
--	while (len || ooblen) {
--		ret = nmbm_read_single_page(nm->ni, addr, datcache, oobcache,
--					    mode);
--		if (ret < 0 && ret != -EBADMSG)
--			return ret;
--
--		/* Continue reading on ecc error */
--		if (ret == -EBADMSG)
--			has_ecc_err = true;
--
--		/* Record the maximum bitflips between pages */
--		if (ret > max_bitflips)
--			max_bitflips = ret;
--
--		if (len) {
--			/* Move data */
--			chklen = nm->lower->writesize - col;
--			if (chklen > len)
--				chklen = len;
--
--			memcpy(ops->datbuf + ops->retlen, datcache + col,
--			       chklen);
--			len -= chklen;
--			col = 0; /* (col + chklen) %  */
--			ops->retlen += chklen;
--		}
--
--		if (ooblen) {
--			/* Move oob */
--			chklen = maxooblen - ooboffs;
--			if (chklen > ooblen)
--				chklen = ooblen;
--
--			memcpy(ops->oobbuf + ops->oobretlen, oobcache + ooboffs,
--			       chklen);
--			ooblen -= chklen;
--			ooboffs = 0; /* (ooboffs + chklen) % maxooblen; */
--			ops->oobretlen += chklen;
--		}
--
--		addr += nm->lower->writesize;
--	}
--
--	if (has_ecc_err)
--		return -EBADMSG;
--
--	return max_bitflips;
--}
--
--static int nmbm_mtd_read_oob(struct mtd_info *mtd, loff_t from,
--			     struct mtd_oob_ops *ops)
--{
--	struct nmbm_mtd *nm = container_of(mtd, struct nmbm_mtd, upper);
--	uint32_t maxooblen;
--	enum nmbm_oob_mode mode;
--	int ret;
--
--	if (!ops->oobbuf && !ops->datbuf) {
--		if (ops->ooblen || ops->len)
--			return -EINVAL;
--
--		return 0;
--	}
--
--	switch (ops->mode) {
--	case MTD_OPS_PLACE_OOB:
--		mode = NMBM_MODE_PLACE_OOB;
--		break;
--	case MTD_OPS_AUTO_OOB:
--		mode = NMBM_MODE_AUTO_OOB;
--		break;
--	case MTD_OPS_RAW:
--		mode = NMBM_MODE_RAW;
--		break;
--	default:
--		pr_debug("%s: unsupported oob mode: %u\n", __func__, ops->mode);
--		return -ENOTSUPP;
--	}
--
--	maxooblen = mtd_oobavail(mtd, ops);
--
--	/* Do not allow read past end of device */
--	if (ops->datbuf && (from + ops->len) > mtd->size) {
--		pr_debug("%s: attempt to read beyond end of device\n",
--			 __func__);
--		return -EINVAL;
--	}
--
--	if (!ops->oobbuf) {
--		nmbm_get_device(nm, FL_READING);
--
--		/* Optimized for reading data only */
--		ret = nmbm_read_range(nm->ni, from, ops->len, ops->datbuf,
--				      mode, &ops->retlen);
--
--		nmbm_release_device(nm);
--
--		return ret;
--	}
--
--	if (unlikely(ops->ooboffs >= maxooblen)) {
--		pr_debug("%s: attempt to start read outside oob\n",
--			__func__);
--		return -EINVAL;
--	}
--
--	if (unlikely(from >= mtd->size ||
--	    ops->ooboffs + ops->ooblen > ((mtd->size >> mtd->writesize_shift) -
--	    (from >> mtd->writesize_shift)) * maxooblen)) {
--		pr_debug("%s: attempt to read beyond end of device\n",
--				__func__);
--		return -EINVAL;
--	}
--
--	nmbm_get_device(nm, FL_READING);
--	ret = nmbm_mtd_read_data(nm, from, ops, mode);
--	nmbm_release_device(nm);
--
--	return ret;
--}
--
--static int nmbm_mtd_write_data(struct nmbm_mtd *nm, uint64_t addr,
--			       struct mtd_oob_ops *ops, enum nmbm_oob_mode mode)
--{
--	size_t len, ooblen, maxooblen, chklen;
--	uint32_t col, ooboffs;
--	uint8_t *datcache, *oobcache;
--	int ret;
--
--	col = addr & nm->lower->writesize_mask;
--	addr &= ~nm->lower->writesize_mask;
--	maxooblen = mtd_oobavail(nm->lower, ops);
--	ooboffs = ops->ooboffs;
--	ooblen = ops->ooblen;
--	len = ops->len;
--
--	datcache = len ? nm->page_cache : NULL;
--	oobcache = ooblen ? nm->page_cache + nm->lower->writesize : NULL;
--
--	ops->oobretlen = 0;
--	ops->retlen = 0;
--
--	while (len || ooblen) {
--		if (len) {
--			/* Move data */
--			chklen = nm->lower->writesize - col;
--			if (chklen > len)
--				chklen = len;
--
--			memset(datcache, 0xff, col);
--			memcpy(datcache + col, ops->datbuf + ops->retlen,
--			       chklen);
--			memset(datcache + col + chklen, 0xff,
--			       nm->lower->writesize - col - chklen);
--			len -= chklen;
--			col = 0; /* (col + chklen) %  */
--			ops->retlen += chklen;
--		}
--
--		if (ooblen) {
--			/* Move oob */
--			chklen = maxooblen - ooboffs;
--			if (chklen > ooblen)
--				chklen = ooblen;
--
--			memset(oobcache, 0xff, ooboffs);
--			memcpy(oobcache + ooboffs,
--			       ops->oobbuf + ops->oobretlen, chklen);
--			memset(oobcache + ooboffs + chklen, 0xff,
--			       nm->lower->oobsize - ooboffs - chklen);
--			ooblen -= chklen;
--			ooboffs = 0; /* (ooboffs + chklen) % maxooblen; */
--			ops->oobretlen += chklen;
--		}
--
--		ret = nmbm_write_single_page(nm->ni, addr, datcache, oobcache,
--					     mode);
--		if (ret)
--			return ret;
--
--		addr += nm->lower->writesize;
--	}
--
--	return 0;
--}
--
--static int nmbm_mtd_write_oob(struct mtd_info *mtd, loff_t to,
--			      struct mtd_oob_ops *ops)
--{
--	struct nmbm_mtd *nm = container_of(mtd, struct nmbm_mtd, upper);
--	enum nmbm_oob_mode mode;
--	uint32_t maxooblen;
--	int ret;
--
--	if (!ops->oobbuf && !ops->datbuf) {
--		if (ops->ooblen || ops->len)
--			return -EINVAL;
--
--		return 0;
--	}
--
--	switch (ops->mode) {
--	case MTD_OPS_PLACE_OOB:
--		mode = NMBM_MODE_PLACE_OOB;
--		break;
--	case MTD_OPS_AUTO_OOB:
--		mode = NMBM_MODE_AUTO_OOB;
--		break;
--	case MTD_OPS_RAW:
--		mode = NMBM_MODE_RAW;
--		break;
--	default:
--		pr_debug("%s: unsupported oob mode: %u\n", __func__,
--			 ops->mode);
--		return -ENOTSUPP;
--	}
--
--	maxooblen = mtd_oobavail(mtd, ops);
--
--	/* Do not allow write past end of device */
--	if (ops->datbuf && (to + ops->len) > mtd->size) {
--		pr_debug("%s: attempt to write beyond end of device\n",
--			 __func__);
--		return -EINVAL;
--	}
--
--	if (!ops->oobbuf) {
--		nmbm_get_device(nm, FL_WRITING);
--
--		/* Optimized for writing data only */
--		ret = nmbm_write_range(nm->ni, to, ops->len, ops->datbuf,
--				       mode, &ops->retlen);
--
--		nmbm_release_device(nm);
--
--		return ret;
--	}
--
--	if (unlikely(ops->ooboffs >= maxooblen)) {
--		pr_debug("%s: attempt to start write outside oob\n",
--			__func__);
--		return -EINVAL;
--	}
--
--	if (unlikely(to >= mtd->size ||
--	    ops->ooboffs + ops->ooblen > ((mtd->size >> mtd->writesize_shift) -
--	    (to >> mtd->writesize_shift)) * maxooblen)) {
--		pr_debug("%s: attempt to write beyond end of device\n",
--				__func__);
--		return -EINVAL;
--	}
--
--	nmbm_get_device(nm, FL_WRITING);
--	ret = nmbm_mtd_write_data(nm, to, ops, mode);
--	nmbm_release_device(nm);
--
--	return ret;
--}
--
--static int nmbm_mtd_block_isbad(struct mtd_info *mtd, loff_t offs)
--{
--	struct nmbm_mtd *nm = container_of(mtd, struct nmbm_mtd, upper);
--	int ret;
--
--	nmbm_get_device(nm, FL_READING);
--	ret = nmbm_check_bad_block(nm->ni, offs);
--	nmbm_release_device(nm);
--
--	return ret;
--}
--
--static int nmbm_mtd_block_markbad(struct mtd_info *mtd, loff_t offs)
--{
--	struct nmbm_mtd *nm = container_of(mtd, struct nmbm_mtd, upper);
--	int ret;
--
--	nmbm_get_device(nm, FL_WRITING);
--	ret = nmbm_mark_bad_block(nm->ni, offs);
--	nmbm_release_device(nm);
--
--	return ret;
--}
--
--static void nmbm_mtd_shutdown(struct mtd_info *mtd)
--{
--	struct nmbm_mtd *nm = container_of(mtd, struct nmbm_mtd, upper);
--
--	nmbm_get_device(nm, FL_PM_SUSPENDED);
--}
--
--static int nmbm_probe(struct platform_device *pdev)
--{
--	struct device_node *mtd_np, *np = pdev->dev.of_node;
--	uint32_t max_ratio, max_reserved_blocks, alloc_size;
--	bool forced_create, empty_page_ecc_ok;
--	struct nmbm_lower_device nld;
--	struct mtd_info *lower, *mtd;
--	struct nmbm_mtd *nm;
--	const char *mtdname;
--	int ret;
--
--	mtd_np = of_parse_phandle(np, "lower-mtd-device", 0);
--	if (mtd_np) {
--		lower = get_mtd_device_by_node(mtd_np);
--		if (!IS_ERR(lower))
--			goto do_attach_mtd;
--
--		dev_dbg(&pdev->dev, "failed to find mtd device by phandle\n");
--		return -EPROBE_DEFER;
--	}
--
--	ret = of_property_read_string(np, "lower-mtd-name", &mtdname);
--	if (!ret) {
--		lower = get_mtd_device_nm(mtdname);
--		if (!IS_ERR(lower))
--			goto do_attach_mtd;
--
--		dev_dbg(&pdev->dev, "failed to find mtd device by name '%s'\n",
--			mtdname);
--		return -EPROBE_DEFER;
--	}
--
--do_attach_mtd:
--	if (of_property_read_u32(np, "max-ratio", &max_ratio))
--		max_ratio = NMBM_MAX_RATIO_DEFAULT;
--
--	if (of_property_read_u32(np, "max-reserved-blocks",
--				 &max_reserved_blocks))
--		max_reserved_blocks = NMBM_MAX_BLOCKS_DEFAULT;
--
--	forced_create = of_property_read_bool(np, "forced-create");
--	empty_page_ecc_ok = of_property_read_bool(np,
--						  "empty-page-ecc-protected");
--
--	memset(&nld, 0, sizeof(nld));
--
--	nld.flags = 0;
--
--	if (forced_create)
--		nld.flags |= NMBM_F_CREATE;
--
--	if (empty_page_ecc_ok)
--		nld.flags |= NMBM_F_EMPTY_PAGE_ECC_OK;
--
--	nld.max_ratio = max_ratio;
--	nld.max_reserved_blocks = max_reserved_blocks;
--
--	nld.size = lower->size;
--	nld.erasesize = lower->erasesize;
--	nld.writesize = lower->writesize;
--	nld.oobsize = lower->oobsize;
--	nld.oobavail = lower->oobavail;
--
--	nld.read_page = nmbm_lower_read_page;
--	nld.write_page = nmbm_lower_write_page;
--	nld.erase_block = nmbm_lower_erase_block;
--	nld.is_bad_block = nmbm_lower_is_bad_block;
--	nld.mark_bad_block = nmbm_lower_mark_bad_block;
--
--	nld.logprint = nmbm_lower_log;
--
--	alloc_size = nmbm_calc_structure_size(&nld);
--
--	nm = devm_kzalloc(&pdev->dev, sizeof(*nm) + alloc_size +
--			  lower->writesize + lower->oobsize, GFP_KERNEL);
--	if (!nm) {
--		ret = -ENOMEM;
--		goto out;
--	}
--
--	nm->ni = (void *)nm + sizeof(*nm);
--	nm->page_cache = (uint8_t *)nm->ni + alloc_size;
--	nm->lower = lower;
--	nm->dev = &pdev->dev;
--
--	INIT_LIST_HEAD(&nm->node);
--	spin_lock_init(&nm->lock);
--	init_waitqueue_head(&nm->wq);
--
--	nld.arg = nm;
--
--	ret = nmbm_attach(&nld, nm->ni);
--	if (ret)
--		goto out;
--
--	/* Initialize upper mtd */
--	mtd = &nm->upper;
--
--	mtd->owner = THIS_MODULE;
--	mtd->dev.parent = &pdev->dev;
--	mtd->type = lower->type;
--	mtd->flags = lower->flags;
--
--	mtd->size = (uint64_t)nm->ni->data_block_count * lower->erasesize;
--	mtd->erasesize = lower->erasesize;
--	mtd->writesize = lower->writesize;
--	mtd->writebufsize = lower->writesize;
--	mtd->oobsize = lower->oobsize;
--	mtd->oobavail = lower->oobavail;
--
--	mtd->erasesize_shift = lower->erasesize_shift;
--	mtd->writesize_shift = lower->writesize_shift;
--	mtd->erasesize_mask = lower->erasesize_mask;
--	mtd->writesize_mask = lower->writesize_mask;
--
--	mtd->bitflip_threshold = lower->bitflip_threshold;
--
--	mtd->ooblayout = lower->ooblayout;
--
--	mtd->ecc_step_size = lower->ecc_step_size;
--	mtd->ecc_strength = lower->ecc_strength;
--
--	mtd->numeraseregions = lower->numeraseregions;
--	mtd->eraseregions = lower->eraseregions;
--
--	mtd->_erase = nmbm_mtd_erase;
--	mtd->_read_oob = nmbm_mtd_read_oob;
--	mtd->_write_oob = nmbm_mtd_write_oob;
--	mtd->_block_isbad = nmbm_mtd_block_isbad;
--	mtd->_block_markbad = nmbm_mtd_block_markbad;
--	mtd->_reboot = nmbm_mtd_shutdown;
--
--	mtd_set_of_node(mtd, np);
--
--	ret = mtd_device_register(mtd, NULL, 0);
--	if (ret) {
--		dev_err(&pdev->dev, "failed to register mtd device\n");
--		nmbm_detach(nm->ni);
--		goto out;
--	}
--
--	platform_set_drvdata(pdev, nm);
--
--	mutex_lock(&nmbm_devs_lock);
--	list_add_tail(&nm->node, &nmbm_devs);
--	mutex_unlock(&nmbm_devs_lock);
--
--	return 0;
--
--out:
--	if (nm)
--		devm_kfree(&pdev->dev, nm);
--
--	put_mtd_device(lower);
--
--	return ret;
--}
--
--static int nmbm_remove(struct platform_device *pdev)
--{
--	struct nmbm_mtd *nm = platform_get_drvdata(pdev);
--	struct mtd_info *lower = nm->lower;
--	int ret;
--
--	ret = mtd_device_unregister(&nm->upper);
--	if (ret)
--		return ret;
--
--	nmbm_detach(nm->ni);
--
--	mutex_lock(&nmbm_devs_lock);
--	list_add_tail(&nm->node, &nmbm_devs);
--	mutex_unlock(&nmbm_devs_lock);
--
--	devm_kfree(&pdev->dev, nm);
--
--	put_mtd_device(lower);
--
--	platform_set_drvdata(pdev, NULL);
--
--	return 0;
--}
--
--static const struct of_device_id nmbm_ids[] = {
--	{ .compatible = "generic,nmbm" },
--	{ },
--};
--
--MODULE_DEVICE_TABLE(of, nmbm_ids);
--
--static struct platform_driver nmbm_driver = {
--	.probe = nmbm_probe,
--	.remove = nmbm_remove,
--	.driver = {
--		.name = "nmbm",
--		.of_match_table = nmbm_ids,
--	},
--};
--
--static int __init nmbm_init(void)
--{
--	int ret;
--
--	INIT_LIST_HEAD(&nmbm_devs);
--
--	ret = platform_driver_register(&nmbm_driver);
--	if (ret) {
--		pr_err("failed to register nmbm driver\n");
--		return ret;
--	}
--
--	return 0;
--}
--module_init(nmbm_init);
--
--static void __exit nmbm_exit(void)
--{
--	platform_driver_unregister(&nmbm_driver);
--}
--module_exit(nmbm_exit);
--
--MODULE_LICENSE("GPL");
--MODULE_AUTHOR("Weijie Gao <weijie.gao@mediatek.com>");
--MODULE_DESCRIPTION("NAND mapping block management");
-diff --git a/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-private.h b/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-private.h
-deleted file mode 100644
-index c285aeb9dd..0000000000
---- a/target/linux/ramips/files/drivers/mtd/nmbm/nmbm-private.h
-+++ /dev/null
-@@ -1,137 +0,0 @@
--/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
--/*
-- * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
-- *
-- * Definitions for NAND Mapped-block Management (NMBM)
-- *
-- * Author: Weijie Gao <weijie.gao@mediatek.com>
-- */
--
--#ifndef _NMBM_PRIVATE_H_
--#define _NMBM_PRIVATE_H_
--
--#include <nmbm/nmbm.h>
--
--#define NMBM_MAGIC_SIGNATURE			0x304d4d4e	/* NMM0 */
--#define NMBM_MAGIC_INFO_TABLE			0x314d4d4e	/* NMM1 */
--
--#define NMBM_VERSION_MAJOR_S			0
--#define NMBM_VERSION_MAJOR_M			0xffff
--#define NMBM_VERSION_MINOR_S			16
--#define NMBM_VERSION_MINOR_M			0xffff
--#define NMBM_VERSION_MAKE(major, minor)		(((major) & NMBM_VERSION_MAJOR_M) | \
--						(((minor) & NMBM_VERSION_MINOR_M) << \
--						NMBM_VERSION_MINOR_S))
--#define NMBM_VERSION_MAJOR_GET(ver)		(((ver) >> NMBM_VERSION_MAJOR_S) & \
--						NMBM_VERSION_MAJOR_M)
--#define NMBM_VERSION_MINOR_GET(ver)		(((ver) >> NMBM_VERSION_MINOR_S) & \
--						NMBM_VERSION_MINOR_M)
--
--typedef uint32_t				nmbm_bitmap_t;
--#define NMBM_BITMAP_UNIT_SIZE			(sizeof(nmbm_bitmap_t))
--#define NMBM_BITMAP_BITS_PER_BLOCK		2
--#define NMBM_BITMAP_BITS_PER_UNIT		(8 * sizeof(nmbm_bitmap_t))
--#define NMBM_BITMAP_BLOCKS_PER_UNIT		(NMBM_BITMAP_BITS_PER_UNIT / \
--						 NMBM_BITMAP_BITS_PER_BLOCK)
--
--#define NMBM_SPARE_BLOCK_MULTI			1
--#define NMBM_SPARE_BLOCK_DIV			2
--#define NMBM_SPARE_BLOCK_MIN			2
--
--#define NMBM_MGMT_DIV				16
--#define NMBM_MGMT_BLOCKS_MIN			32
--
--#define NMBM_TRY_COUNT				3
--
--#define BLOCK_ST_BAD				0
--#define BLOCK_ST_NEED_REMAP			2
--#define BLOCK_ST_GOOD				3
--#define BLOCK_ST_MASK				3
--
--struct nmbm_header {
--	uint32_t magic;
--	uint32_t version;
--	uint32_t size;
--	uint32_t checksum;
--};
--
--struct nmbm_signature {
--	struct nmbm_header header;
--	uint64_t nand_size;
--	uint32_t block_size;
--	uint32_t page_size;
--	uint32_t spare_size;
--	uint32_t mgmt_start_pb;
--	uint8_t max_try_count;
--	uint8_t padding[3];
--};
--
--struct nmbm_info_table_header {
--	struct nmbm_header header;
--	uint32_t write_count;
--	uint32_t state_table_off;
--	uint32_t mapping_table_off;
--	uint32_t padding;
--};
--
--struct nmbm_instance {
--	struct nmbm_lower_device lower;
--
--	uint32_t rawpage_size;
--	uint32_t rawblock_size;
--	uint32_t rawchip_size;
--
--	uint32_t writesize_mask;
--	uint32_t erasesize_mask;
--	uint16_t writesize_shift;
--	uint16_t erasesize_shift;
--
--	struct nmbm_signature signature;
--
--	uint8_t *info_table_cache;
--	uint32_t info_table_size;
--	uint32_t info_table_spare_blocks;
--	struct nmbm_info_table_header info_table;
--
--	nmbm_bitmap_t *block_state;
--	uint32_t block_state_changed;
--	uint32_t state_table_size;
--
--	int32_t *block_mapping;
--	uint32_t block_mapping_changed;
--	uint32_t mapping_table_size;
--
--	uint8_t *page_cache;
--
--	int protected;
--
--	uint32_t block_count;
--	uint32_t data_block_count;
--
--	uint32_t mgmt_start_ba;
--	uint32_t main_table_ba;
--	uint32_t backup_table_ba;
--	uint32_t mapping_blocks_ba;
--	uint32_t mapping_blocks_top_ba;
--	uint32_t signature_ba;
--
--	enum nmbm_log_category log_display_level;
--};
--
--/* Log utilities */
--#define nlog_debug(ni, fmt, ...) \
--	nmbm_log(ni, NMBM_LOG_DEBUG, fmt, ##__VA_ARGS__)
--
--#define nlog_info(ni, fmt, ...) \
--	nmbm_log(ni, NMBM_LOG_INFO, fmt, ##__VA_ARGS__)
--
--#define nlog_warn(ni, fmt, ...) \
--	nmbm_log(ni, NMBM_LOG_WARN, fmt, ##__VA_ARGS__)
--
--#define nlog_err(ni, fmt, ...) \
--	nmbm_log(ni, NMBM_LOG_ERR, fmt, ##__VA_ARGS__)
--
--#define nlog_emerg(ni, fmt, ...) \
--	nmbm_log(ni, NMBM_LOG_EMERG, fmt, ##__VA_ARGS__)
--
--#endif /* _NMBM_PRIVATE_H_ */
-diff --git a/target/linux/ramips/files/include/nmbm/nmbm-os.h b/target/linux/ramips/files/include/nmbm/nmbm-os.h
-deleted file mode 100644
-index 1cae854df1..0000000000
---- a/target/linux/ramips/files/include/nmbm/nmbm-os.h
-+++ /dev/null
-@@ -1,69 +0,0 @@
--/* SPDX-License-Identifier: GPL-2.0 */
--/*
-- * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
-- *
-- * OS-dependent definitions for NAND Mapped-block Management (NMBM)
-- *
-- * Author: Weijie Gao <weijie.gao@mediatek.com>
-- */
--
--#ifndef _NMBM_OS_H_
--#define _NMBM_OS_H_
--
--#include <linux/kernel.h>
--#include <linux/limits.h>
--#include <linux/string.h>
--#include <linux/errno.h>
--#include <linux/types.h>
--#include <linux/crc32.h>
--#include <linux/log2.h>
--#include <asm/div64.h>
--
--static inline uint32_t nmbm_crc32(uint32_t crcval, const void *buf, size_t size)
--{
--	uint chksz;
--	const unsigned char *p = buf;
--
--	while (size) {
--		if (size > UINT_MAX)
--			chksz = UINT_MAX;
--		else
--			chksz = (uint)size;
--
--		crcval = crc32_le(crcval, p, chksz);
--		size -= chksz;
--		p += chksz;
--	}
--
--	return crcval;
--}
--
--static inline uint32_t nmbm_lldiv(uint64_t dividend, uint32_t divisor)
--{
--#if BITS_PER_LONG == 64
--	return dividend / divisor;
--#else
--	do_div(dividend, divisor);
--	return dividend;
--#endif
--}
--
--#define WATCHDOG_RESET()
--
--#ifdef CONFIG_NMBM_LOG_LEVEL_DEBUG
--#define NMBM_DEFAULT_LOG_LEVEL		0
--#elif defined(NMBM_LOG_LEVEL_INFO)
--#define NMBM_DEFAULT_LOG_LEVEL		1
--#elif defined(NMBM_LOG_LEVEL_WARN)
--#define NMBM_DEFAULT_LOG_LEVEL		2
--#elif defined(NMBM_LOG_LEVEL_ERR)
--#define NMBM_DEFAULT_LOG_LEVEL		3
--#elif defined(NMBM_LOG_LEVEL_EMERG)
--#define NMBM_DEFAULT_LOG_LEVEL		4
--#elif defined(NMBM_LOG_LEVEL_NONE)
--#define NMBM_DEFAULT_LOG_LEVEL		5
--#else
--#define NMBM_DEFAULT_LOG_LEVEL		1
--#endif
--
--#endif /* _NMBM_OS_H_ */
-diff --git a/target/linux/ramips/files/include/nmbm/nmbm.h b/target/linux/ramips/files/include/nmbm/nmbm.h
-deleted file mode 100644
-index c0400988b1..0000000000
---- a/target/linux/ramips/files/include/nmbm/nmbm.h
-+++ /dev/null
-@@ -1,102 +0,0 @@
--/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
--/*
-- * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
-- *
-- * Definitions for NAND Mapped-block Management (NMBM)
-- *
-- * Author: Weijie Gao <weijie.gao@mediatek.com>
-- */
--
--#ifndef _NMBM_H_
--#define _NMBM_H_
--
--#include <nmbm/nmbm-os.h>
--
--enum nmbm_log_category {
--	NMBM_LOG_DEBUG,
--	NMBM_LOG_INFO,
--	NMBM_LOG_WARN,
--	NMBM_LOG_ERR,
--	NMBM_LOG_EMERG,
--
--	__NMBM_LOG_MAX
--};
--
--enum nmbm_oob_mode {
--	NMBM_MODE_PLACE_OOB,
--	NMBM_MODE_AUTO_OOB,
--	NMBM_MODE_RAW,
--
--	__NMBM_MODE_MAX
--};
--
--struct nmbm_lower_device {
--	uint32_t max_ratio;
--	uint32_t max_reserved_blocks;
--	int flags;
--
--	uint64_t size;
--	uint32_t erasesize;
--	uint32_t writesize;
--	uint32_t oobsize;
--	uint32_t oobavail;
--
--	void *arg;
--	int (*reset_chip)(void *arg);
--
--	/*
--	 * read_page:
--	 *    return 0 if succeeds
--	 *    return positive number for ecc error
--	 *    return negative number for other errors
--	 */
--	int (*read_page)(void *arg, uint64_t addr, void *buf, void *oob, enum nmbm_oob_mode mode);
--	int (*write_page)(void *arg, uint64_t addr, const void *buf, const void *oob, enum nmbm_oob_mode mode);
--	int (*erase_block)(void *arg, uint64_t addr);
--
--	int (*is_bad_block)(void *arg, uint64_t addr);
--	int (*mark_bad_block)(void *arg, uint64_t addr);
--
--	/* OS-dependent logging function */
--	void (*logprint)(void *arg, enum nmbm_log_category level, const char *fmt, va_list ap);
--};
--
--struct nmbm_instance;
--
--/* Create NMBM if management area not found, or not complete */
--#define NMBM_F_CREATE			0x01
--
--/* Empty page is also protected by ECC, and bitflip(s) can be corrected */
--#define NMBM_F_EMPTY_PAGE_ECC_OK	0x02
--
--/* Do not write anything back to flash */
--#define NMBM_F_READ_ONLY		0x04
--
--size_t nmbm_calc_structure_size(struct nmbm_lower_device *nld);
--int nmbm_attach(struct nmbm_lower_device *nld, struct nmbm_instance *ni);
--int nmbm_detach(struct nmbm_instance *ni);
--
--enum nmbm_log_category nmbm_set_log_level(struct nmbm_instance *ni,
--					  enum nmbm_log_category level);
--
--int nmbm_erase_block_range(struct nmbm_instance *ni, uint64_t addr,
--			   uint64_t size, uint64_t *failed_addr);
--int nmbm_read_single_page(struct nmbm_instance *ni, uint64_t addr, void *data,
--			  void *oob, enum nmbm_oob_mode mode);
--int nmbm_read_range(struct nmbm_instance *ni, uint64_t addr, size_t size,
--		    void *data, enum nmbm_oob_mode mode, size_t *retlen);
--int nmbm_write_single_page(struct nmbm_instance *ni, uint64_t addr,
--			   const void *data, const void *oob,
--			   enum nmbm_oob_mode mode);
--int nmbm_write_range(struct nmbm_instance *ni, uint64_t addr, size_t size,
--		     const void *data, enum nmbm_oob_mode mode,
--		     size_t *retlen);
--
--int nmbm_check_bad_block(struct nmbm_instance *ni, uint64_t addr);
--int nmbm_mark_bad_block(struct nmbm_instance *ni, uint64_t addr);
--
--uint64_t nmbm_get_avail_size(struct nmbm_instance *ni);
--
--int nmbm_get_lower_device(struct nmbm_instance *ni, struct nmbm_lower_device *nld);
--
--#endif /* _NMBM_H_ */
-diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
-index 57c3efcf2b..81ef6bbd14 100644
---- a/target/linux/ramips/image/mt7621.mk
-+++ b/target/linux/ramips/image/mt7621.mk
-@@ -111,11 +111,20 @@ define Device/dsa-migration
- endef
- 
- define Device/actiontec_web7200
-+  $(Device/dsa-migration)
-   DEVICE_VENDOR := Actiontec
-   DEVICE_MODEL := EB7200
-   DEVICE_PACKAGES += kmod-mt7603 kmod-mt7915e kmod-usb3 uboot-envtools kmod-i2c-core
-+  LOADER_TYPE := bin
-+  KERNEL_SIZE := 4096k
-+  BLOCKSIZE := 128k
-+  PAGESIZE := 2048
-+  UBINIZE_OPTS := -E 5
-+  KERNEL_INITRAMFS := kernel-bin | lzma | loader-kernel | gzip | fit-relocate gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
-   KERNEL := kernel-bin | relocate-kernel | lzma | fit-relocate lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
--  IMAGE_SIZE := 15552k
-+  IMAGES += factory.bin
-+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
-+  IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi
- endef
- TARGET_DEVICES += actiontec_web7200
- 
-@@ -1404,6 +1413,15 @@ define Device/ubnt_unifi-6-lite
- endef
- TARGET_DEVICES += ubnt_unifi-6-lite
- 
-+define Device/ubnt_unifi-nanohd
-+  $(Device/dsa-migration)
-+  DEVICE_VENDOR := Ubiquiti
-+  DEVICE_MODEL := UniFi nanoHD
-+  DEVICE_PACKAGES += kmod-mt7603 kmod-mt7615e kmod-mt7615-firmware
-+  IMAGE_SIZE := 15552k
-+endef
-+TARGET_DEVICES += ubnt_unifi-nanohd
-+
- define Device/unielec_u7621-01-16m
-   $(Device/dsa-migration)
-   $(Device/uimage-lzma-loader)
-diff --git a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
-index bd0f0254c6..7109a4647e 100644
---- a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
-+++ b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
-@@ -10,6 +10,11 @@ PHYNBR=${DEVPATH##*/phy}
- board=$(board_name)
- 
- case "$board" in
-+	actiontec,web7200)
-+		wan_mac=$(mtd_get_mac_ascii u-boot-env "AeiBaseMACAddr")
-+		[ "$PHYNBR" = "0" ] && macaddr_add $wan_mac 2 > /sys${DEVPATH}/macaddress
-+		[ "$PHYNBR" = "1" ] && macaddr_add $wan_mac 3 > /sys${DEVPATH}/macaddress
-+		;;
- 	glinet,gl-mt1300)
- 		[ "$PHYNBR" = "1" ] && \
- 			macaddr_add "$(mtd_get_mac_binary factory 0x4)" 1 > /sys${DEVPATH}/macaddress
-diff --git a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
-index 924f259e25..93f6e836dc 100755
---- a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
-+++ b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
-@@ -48,16 +48,19 @@ platform_do_upgrade() {
- 		;;
- 	actiontec,web7200)
- 		if grep -q bootselect=0 /proc/cmdline; then
--			PART_NAME=firmware2
-+			CI_KERNPART=firmware2
-+			CI_UBIPART=ubi_2
- 			fw_setenv bootselect 1 || exit 1
- 		else
--			PART_NAME=firmware1
-+			CI_KERNPART=firmware
-+			CI_UBIPART=ubi_1
- 			fw_setenv bootselect 0 || exit 1
- 		fi
- 		;;
- 	esac
- 
- 	case "$board" in
-+	actiontec,web7200|\
- 	ampedwireless,ally-00x19k|\
- 	ampedwireless,ally-r1900k|\
- 	asus,rt-ac65p|\
-diff --git a/target/linux/ramips/mt7621/config-5.4 b/target/linux/ramips/mt7621/config-5.4
-index ae4a0679bd..eada0ff602 100644
---- a/target/linux/ramips/mt7621/config-5.4
-+++ b/target/linux/ramips/mt7621/config-5.4
-@@ -185,14 +185,6 @@ CONFIG_NET_MEDIATEK_SOC=y
- CONFIG_NET_SWITCHDEV=y
- CONFIG_NET_VENDOR_MEDIATEK=y
- # CONFIG_NET_VENDOR_RALINK is not set
--CONFIG_NMBM=y
--# CONFIG_NMBM_LOG_LEVEL_DEBUG is not set
--# CONFIG_NMBM_LOG_LEVEL_EMERG is not set
--# CONFIG_NMBM_LOG_LEVEL_ERR is not set
--CONFIG_NMBM_LOG_LEVEL_INFO=y
--# CONFIG_NMBM_LOG_LEVEL_NONE is not set
--# CONFIG_NMBM_LOG_LEVEL_WARN is not set
--CONFIG_NMBM_MTD=y
- CONFIG_NR_CPUS=4
- CONFIG_OF=y
- CONFIG_OF_ADDRESS=y
-diff --git a/target/linux/ramips/patches-5.4/499-mtd-add-nmbm-support.patch b/target/linux/ramips/patches-5.4/499-mtd-add-nmbm-support.patch
-deleted file mode 100644
-index 5cbaae2b7b..0000000000
---- a/target/linux/ramips/patches-5.4/499-mtd-add-nmbm-support.patch
-+++ /dev/null
-@@ -1,21 +0,0 @@
----- a/drivers/mtd/Kconfig
--+++ b/drivers/mtd/Kconfig
--@@ -228,6 +228,8 @@ source "drivers/mtd/ubi/Kconfig"
-- 
-- source "drivers/mtd/hyperbus/Kconfig"
-- 
--+source "drivers/mtd/nmbm/Kconfig"
--+
-- source "drivers/mtd/composite/Kconfig"
-- 
-- endif # MTD
----- a/drivers/mtd/Makefile
--+++ b/drivers/mtd/Makefile
--@@ -33,5 +33,7 @@ obj-$(CONFIG_MTD_SPI_NOR)	+= spi-nor/
-- obj-$(CONFIG_MTD_UBI)		+= ubi/
-- obj-$(CONFIG_MTD_HYPERBUS)	+= hyperbus/
-- 
--+obj-y				+= nmbm/
--+
-- # Composite drivers must be loaded last
-- obj-y				+= composite/
--- 
-2.25.1
-
diff --git a/patches/ramips/0017-ramips-add-support-for-YunCore-FAP640.patch b/patches/ramips/0017-ramips-add-support-for-YunCore-FAP640.patch
deleted file mode 100644
index b70bf7974..000000000
--- a/patches/ramips/0017-ramips-add-support-for-YunCore-FAP640.patch
+++ /dev/null
@@ -1,303 +0,0 @@
-From a508da9dd0951d42064b8054f5a6e37c6c8bc3ba Mon Sep 17 00:00:00 2001
-From: Volodymyr Puiul <volodymyr.puiul@gmail.com>
-Date: Thu, 8 Dec 2022 15:20:40 +0100
-Subject: [PATCH] ramips: add support for YunCore FAP640
-
-It is an in-wall 802.11ax (Wi-Fi 6) router, based on MediaTek MT7621A.
-
-Specifications:
-- SoC: MT7621AT (880MHz, 2 Cores)
-- RAM: 128 MB
-- Flash: 16 MB SPI
-- Wi-Fi:
-    - MT7915DN + MT7905DAN: 2.4/5 GHz
-- Ethernet: 5x1GiE via MT7530, 1xWAN with POE and 4xLAN
-- UART: J4 (115200 baud)
-    - Pinout: [3V3] (TXD) (RXD) (GND)
-- Power: 802.11af/at PoE;
-
-- Bootloader: U-Boot
-- Buttons:
-    - Reset
-- LEDs:
-    - Status - RGB controlled by
-      - GPIO 14 LOW - green color
-      - GPIO 15 LOW- red color
-      - GPIO 16 LOW - blue color
-    - WAN - gren color, controlled by switch GPIO 12 LOW
-    - LAN1 - gren color, controlled by switch GPIO 9 HIGH
-    - LAN2 - gren color, controlled by switch GPIO 6 LOW
-    - LAN3 - gren color, controlled by switch GPIO 3 LOW
-    - LAN4 - gren color, controlled by switch GPIO 0 LOW
-
-Installation:
-OEM firmware is based on LEDE with custom UI and support standard sysupgrade
-variant of firmware. However it requires "*.ubin" extension for sysupgrade file.
-Always select "Factory reset" switch on upgrade to OpenWRT, otherwise
-router will not boot.
-
-MAC addresses with OEM firmware:
-vendor   source
-lan      factory 0x4 (label)
-5g       factory 0x4 (label)
-2g       label with flipped bits bit in 1-st byte and bits 5, 6, 7 in
-  4-th byte
-
-Example
-label:  44:xx:xx:b7:xx:xx
-lan:    44:xx:xx:b7:xx:xx
-2g      46:xx:xx:c7:xx:xx
-5g      44:xx:xx:b7:xx:xx
-
-Signed-off-by: Volodymyr Puiul <volodymyr.puiul@gmail.com>
----
- .../ramips/dts/mt7621_yuncore_fap640.dts      | 200 ++++++++++++++++++
- target/linux/ramips/image/mt7621.mk           |  10 +
- .../etc/hotplug.d/ieee80211/10_fix_wifi_mac   |   5 +
- 3 files changed, 215 insertions(+)
- create mode 100644 target/linux/ramips/dts/mt7621_yuncore_fap640.dts
-
-diff --git a/target/linux/ramips/dts/mt7621_yuncore_fap640.dts b/target/linux/ramips/dts/mt7621_yuncore_fap640.dts
-new file mode 100644
-index 0000000000..05d03c9c9c
---- /dev/null
-+++ b/target/linux/ramips/dts/mt7621_yuncore_fap640.dts
-@@ -0,0 +1,200 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+
-+#include "mt7621.dtsi"
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+
-+/ {
-+	compatible = "yuncore,fap640", "mediatek,mt7621-soc";
-+	model = "YunCore FAP640";
-+
-+	aliases {
-+		led-boot = &led_status_blue;
-+		led-failsafe = &led_status_red;
-+		led-running = &led_status_green;
-+		led-upgrade = &led_status_red;
-+		label-mac-device = &gmac0;
-+	};
-+
-+	chosen {
-+		bootargs = "console=ttyS0,115200";
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		led_status_green: status_green {
-+			label = "green:status";
-+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		led_status_red: status_red {
-+			label = "red:status";
-+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		led_status_blue: status_blue {
-+			label = "blue:status";
-+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		wan {
-+			label = "green:wan";
-+			gpios = <&switch0 12 GPIO_ACTIVE_LOW>;
-+			linux,default-trigger = "mt7530-0:04:link";
-+		};
-+
-+		lan1 {
-+			label = "green:lan1";
-+			gpios = <&switch0 9 GPIO_ACTIVE_HIGH>;
-+			linux,default-trigger = "mt7530-0:03:link";
-+		};
-+
-+		lan2 {
-+			label = "green:lan2";
-+			gpios = <&switch0 6 GPIO_ACTIVE_LOW>;
-+			linux,default-trigger = "mt7530-0:02:link";
-+		};
-+
-+		lan3 {
-+			label = "green:lan3";
-+			gpios = <&switch0 3 GPIO_ACTIVE_LOW>;
-+			linux,default-trigger = "mt7530-0:01:link";
-+		};
-+
-+		lan4 {
-+			label = "green:lan4";
-+			gpios = <&switch0 0 GPIO_ACTIVE_LOW>;
-+			linux,default-trigger = "mt7530-0:00:link";
-+		};
-+	};
-+
-+	watchdog {
-+		compatible = "linux,wdt-gpio";
-+		gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
-+		hw_algo = "toggle";
-+		hw_margin_ms = <200>;
-+		always-running;
-+	};
-+
-+	keys {
-+		compatible = "gpio-keys";
-+
-+		reset {
-+			label = "reset";
-+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_RESTART>;
-+		};
-+	};
-+};
-+
-+&spi0 {
-+	status = "okay";
-+
-+	flash@0 {
-+		compatible = "jedec,spi-nor";
-+		reg = <0>;
-+		spi-max-frequency = <80000000>;
-+		m25p,fast-read;
-+
-+		partitions {
-+			compatible = "fixed-partitions";
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			partition@0 {
-+				label = "Bootloader";
-+				reg = <0x0 0x30000>;
-+				read-only;
-+			};
-+
-+			partition@30000 {
-+				label = "Config";
-+				reg = <0x30000 0x10000>;
-+				read-only;
-+			};
-+
-+			/* range 0x40000 to 0x50000 is empty in vendor
-+			 * firmware, so we do not use it either
-+			 */
-+
-+			factory: partition@50000 {
-+				label = "Factory";
-+				reg = <0x50000 0x40000>;
-+				read-only;
-+			};
-+
-+			partition@90000 {
-+				compatible = "denx,uimage";
-+				label = "firmware";
-+				reg = <0x90000 0xf60000>;
-+			};
-+
-+			partition@ff0000 {
-+				label = "certificates";
-+				reg = <0xff0000 0x10000>;
-+			};
-+		};
-+	};
-+};
-+
-+&pcie {
-+	status = "okay";
-+};
-+
-+&pcie1 {
-+	wifi@0,0 {
-+		compatible = "mediatek,mt76";
-+		reg = <0x0000 0 0 0 0>;
-+		mediatek,mtd-eeprom = <&factory 0x0>;
-+		mediatek,disable-radar-background;
-+		mtd-mac-address = <&factory 0x4>;
-+		mtd-mac-address-increment = <1>;
-+	};
-+};
-+
-+&gmac0 {
-+	mtd-mac-address = <&factory 0x4>;
-+};
-+
-+&switch0 {
-+	gpio-controller;
-+	#gpio-cells = <2>;
-+
-+	ports {
-+		port@0 {
-+			status = "okay";
-+			label = "lan4";
-+		};
-+
-+		port@1 {
-+			status = "okay";
-+			label = "lan3";
-+		};
-+
-+		port@2 {
-+			status = "okay";
-+			label = "lan2";
-+		};
-+
-+		port@3 {
-+			status = "okay";
-+			label = "lan1";
-+		};
-+
-+		port@4 {
-+			status = "okay";
-+			label = "wan";
-+			mtd-mac-address = <&factory 0x4>;
-+		//	mtd-mac-address-increment = <1>;
-+		};
-+	};
-+};
-+
-+&state_default {
-+	gpio {
-+		groups = "jtag", "wdt";
-+		function = "gpio";
-+	};
-+};
-diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
-index 9e1eed024b..a528a257d4 100644
---- a/target/linux/ramips/image/mt7621.mk
-+++ b/target/linux/ramips/image/mt7621.mk
-@@ -1637,6 +1637,16 @@ define Device/youku_yk-l2
- endef
- TARGET_DEVICES += youku_yk-l2
- 
-+define Device/yuncore_fap640
-+  $(Device/dsa-migration)
-+  $(Device/uimage-lzma-loader)
-+  IMAGE_SIZE := 15808k
-+  DEVICE_VENDOR := YunCore
-+  DEVICE_MODEL := FAP640
-+  DEVICE_PACKAGES := kmod-mt7915e
-+endef
-+TARGET_DEVICES += yuncore_fap640
-+
- define Device/zbtlink_zbt-we1326
-   $(Device/dsa-migration)
-   $(Device/uimage-lzma-loader)
-diff --git a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
-index 157e706534..be7b226c32 100644
---- a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
-+++ b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
-@@ -38,4 +38,9 @@ case "$board" in
- 		[ "$PHYNBR" = "0" ] && macaddr_add $hw_mac_addr 1 > /sys${DEVPATH}/macaddress
- 		[ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr 2 > /sys${DEVPATH}/macaddress
- 		;;
-+	yuncore,fap640)
-+		hw_mac_addr="$(mtd_get_mac_binary Factory 0x4)"
-+		[ "$PHYNBR" = "0" ] && macaddr_setbit_la "$hw_mac_addr" > /sys${DEVPATH}/macaddress
-+		[ "$PHYNBR" = "1" ] && echo -n "$hw_mac_addr" > /sys${DEVPATH}/macaddress
-+		;;
- esac
--- 
-2.34.1
-
diff --git a/patches/rest/0037-Revert-libusb-update-to-1.0.24.patch b/patches/rest/0037-Revert-libusb-update-to-1.0.24.patch
deleted file mode 100644
index 0875da753..000000000
--- a/patches/rest/0037-Revert-libusb-update-to-1.0.24.patch
+++ /dev/null
@@ -1,141 +0,0 @@
-From 0cb58169aa1f1b29c0c713469bdc7b352cdf85f3 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Fri, 2 Jul 2021 12:02:04 +0200
-Subject: [PATCH 21/27] Revert "libusb: update to 1.0.24"
-
-This reverts commit 0798b13d7df0deafd005b14d52420c4f480d146e.
----
- package/libs/libusb/Makefile                  |  6 +-
- ...n-the-Changelog-and-clean-up-a-stray.patch | 29 ---------
- ...parsing-of-descriptors-for-multi-con.patch | 61 -------------------
- 3 files changed, 3 insertions(+), 93 deletions(-)
- delete mode 100644 package/libs/libusb/patches/001-Correct-a-typo-in-the-Changelog-and-clean-up-a-stray.patch
- delete mode 100644 package/libs/libusb/patches/002-linux_usbfs-Fix-parsing-of-descriptors-for-multi-con.patch
-
-diff --git a/package/libs/libusb/Makefile b/package/libs/libusb/Makefile
-index 6b80b3848d..1667fb2840 100644
---- a/package/libs/libusb/Makefile
-+++ b/package/libs/libusb/Makefile
-@@ -8,14 +8,14 @@
- include $(TOPDIR)/rules.mk
- 
- PKG_NAME:=libusb
--PKG_VERSION:=1.0.24
--PKG_RELEASE:=$(AUTORELEASE)
-+PKG_VERSION:=1.0.22
-+PKG_RELEASE:=2
- 
- PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
- PKG_SOURCE_URL:=\
-   https://github.com/libusb/libusb/releases/download/v$(PKG_VERSION) \
-   @SF/$(PKG_NAME)
--PKG_HASH:=7efd2685f7b327326dcfb85cee426d9b871fd70e22caa15bb68d595ce2a2b12a
-+PKG_HASH:=75aeb9d59a4fdb800d329a545c2e6799f732362193b465ea198f2aa275518157
- 
- PKG_MAINTAINER:= Felix Fietkau <nbd@nbd.name>
- PKG_LICENSE:=LGPL-2.1-or-later
-diff --git a/package/libs/libusb/patches/001-Correct-a-typo-in-the-Changelog-and-clean-up-a-stray.patch b/package/libs/libusb/patches/001-Correct-a-typo-in-the-Changelog-and-clean-up-a-stray.patch
-deleted file mode 100644
-index b17d6178d3..0000000000
---- a/package/libs/libusb/patches/001-Correct-a-typo-in-the-Changelog-and-clean-up-a-stray.patch
-+++ /dev/null
-@@ -1,29 +0,0 @@
--From 369af149e3ad92514a2d24f112cedfeb7acaf558 Mon Sep 17 00:00:00 2001
--From: Chris Dickens <christopher.a.dickens@gmail.com>
--Date: Sun, 13 Dec 2020 15:46:27 -0800
--Subject: [PATCH] Correct a typo in the Changelog and clean up a stray file
--
--Signed-off-by: Chris Dickens <christopher.a.dickens@gmail.com>
-----
-- ChangeLog             | 2 +-
-- libusb/version_nano.h | 2 +-
-- test                  | 0
-- 3 files changed, 2 insertions(+), 2 deletions(-)
-- delete mode 100644 test
--
----- a/ChangeLog
--+++ b/ChangeLog
--@@ -12,7 +12,7 @@ visit: http://log.libusb.info
-- * Darwin (macOS): use IOUSBDevice as darwin_device_class explicitly (#693)
-- * Linux: Drop support for kernel older than 2.6.32
-- * Linux: Provide an event thread name (#689)
---* Linux: Wait until all USBs have been reaped before freeing them (#607)
--+* Linux: Wait until all URBs have been reaped before freeing them (#607)
-- * NetBSD: Recognize device timeouts (#710)
-- * OpenBSD: Allow opening ugen devices multiple times (#763)
-- * OpenBSD: Support libusb_get_port_number() (#764)
----- a/libusb/version_nano.h
--+++ b/libusb/version_nano.h
--@@ -1 +1 @@
---#define LIBUSB_NANO 11584
--+#define LIBUSB_NANO 11585
-diff --git a/package/libs/libusb/patches/002-linux_usbfs-Fix-parsing-of-descriptors-for-multi-con.patch b/package/libs/libusb/patches/002-linux_usbfs-Fix-parsing-of-descriptors-for-multi-con.patch
-deleted file mode 100644
-index a53a8900de..0000000000
---- a/package/libs/libusb/patches/002-linux_usbfs-Fix-parsing-of-descriptors-for-multi-con.patch
-+++ /dev/null
-@@ -1,61 +0,0 @@
--From f6d2cb561402c3b6d3627c0eb89e009b503d9067 Mon Sep 17 00:00:00 2001
--From: Chris Dickens <christopher.a.dickens@gmail.com>
--Date: Sun, 13 Dec 2020 15:49:19 -0800
--Subject: [PATCH] linux_usbfs: Fix parsing of descriptors for
-- multi-configuration devices
--
--Commit e2be556bd2 ("linux_usbfs: Parse config descriptors during device
--initialization") introduced a regression for devices with multiple
--configurations. The logic that verifies the reported length of the
--configuration descriptors failed to count the length of the
--configuration descriptor itself and would truncate the actual length by
--9 bytes, leading to a parsing error for subsequent descriptors.
--
--Closes #825
--
--Signed-off-by: Chris Dickens <christopher.a.dickens@gmail.com>
-----
-- libusb/os/linux_usbfs.c | 12 ++++++++----
-- libusb/version_nano.h   |  2 +-
-- 2 files changed, 9 insertions(+), 5 deletions(-)
--
----- a/libusb/os/linux_usbfs.c
--+++ b/libusb/os/linux_usbfs.c
--@@ -641,7 +641,12 @@ static int seek_to_next_config(struct li
-- 	uint8_t *buffer, size_t len)
-- {
-- 	struct usbi_descriptor_header *header;
---	int offset = 0;
--+	int offset;
--+
--+	/* Start seeking past the config descriptor */
--+	offset = LIBUSB_DT_CONFIG_SIZE;
--+	buffer += LIBUSB_DT_CONFIG_SIZE;
--+	len -= LIBUSB_DT_CONFIG_SIZE;
-- 
-- 	while (len > 0) {
-- 		if (len < 2) {
--@@ -718,7 +723,7 @@ static int parse_config_descriptors(stru
-- 		}
-- 
-- 		if (priv->sysfs_dir) {
---			 /*
--+			/*
-- 			 * In sysfs wTotalLength is ignored, instead the kernel returns a
-- 			 * config descriptor with verified bLength fields, with descriptors
-- 			 * with an invalid bLength removed.
--@@ -727,8 +732,7 @@ static int parse_config_descriptors(stru
-- 			int offset;
-- 
-- 			if (num_configs > 1 && idx < num_configs - 1) {
---				offset = seek_to_next_config(ctx, buffer + LIBUSB_DT_CONFIG_SIZE,
---							     remaining - LIBUSB_DT_CONFIG_SIZE);
--+				offset = seek_to_next_config(ctx, buffer, remaining);
-- 				if (offset < 0)
-- 					return offset;
-- 				sysfs_config_len = (uint16_t)offset;
----- a/libusb/version_nano.h
--+++ b/libusb/version_nano.h
--@@ -1 +1 @@
---#define LIBUSB_NANO 11585
--+#define LIBUSB_NANO 11586
--- 
-2.25.1
-
diff --git a/patches/rest/0038-firewall-enable-ssh-on-wan-during-early-boot-stage.patch b/patches/rest/0038-firewall-enable-ssh-on-wan-during-early-boot-stage.patch
deleted file mode 100644
index c7c27c488..000000000
--- a/patches/rest/0038-firewall-enable-ssh-on-wan-during-early-boot-stage.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From a7bfcdcf6675076c1a8a71aac6e2d8793345e8a6 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Mon, 12 Jul 2021 13:10:48 +0200
-Subject: [PATCH 38/43] firewall: enable ssh on wan during early boot stage
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/network/config/firewall/files/firewall.config | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/package/network/config/firewall/files/firewall.config b/package/network/config/firewall/files/firewall.config
-index 5e22f984ce..31b6065e86 100644
---- a/package/network/config/firewall/files/firewall.config
-+++ b/package/network/config/firewall/files/firewall.config
-@@ -17,7 +17,7 @@ config zone
- 	option name		wan
- 	list   network		'wan'
- 	list   network		'wan6'
--	option input		REJECT
-+	option input		ACCEPT
- 	option output		ACCEPT
- 	option forward		REJECT
- 	option masq		1
--- 
-2.25.1
-
diff --git a/patches/wifi/0001-mac80211-backport-latest-HEAD.patch b/patches/wifi/0001-mac80211-backport-latest-HEAD.patch
deleted file mode 100644
index f684a80bf..000000000
--- a/patches/wifi/0001-mac80211-backport-latest-HEAD.patch
+++ /dev/null
@@ -1,16557 +0,0 @@
-From 1ee96e877b2e1ce30774dcde5391e96d5211407f Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Tue, 4 Jan 2022 06:22:29 +0100
-Subject: [PATCH 1/4] mac80211: backport latest HEAD
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/kernel/mac80211/Makefile              |   46 +-
- package/kernel/mac80211/ath.mk                |   18 +-
- package/kernel/mac80211/broadcom.mk           |    4 +-
- .../mac80211/files/lib/netifd/mac80211.sh     |   36 -
- .../files/lib/netifd/wireless/mac80211.sh     |    3 +-
- .../mac80211/files/lib/wifi/mac80211.sh       |    5 +-
- .../patches/ath/120-owl-loader-compat.patch   |   53 -
- .../patches/ath/402-ath_regd_optional.patch   |    8 +-
- .../patches/ath/404-regd_no_assoc_hints.patch |    4 +-
- .../ath/406-ath_relax_default_regd.patch      |    2 +-
- .../ath/550-ath9k-disable-bands-via-dt.patch  |   15 -
- ...h10k-increase-rx-buffer-size-to-2048.patch |   37 -
- ...980-ath10k-fix-max-antenna-gain-unit.patch |   49 -
- .../080-ath10k_thermal_config.patch           |    2 +-
- ...calibration-data-via-nvmem-subsystem.patch |  162 ++
- ...21-ath10k_init_devices_synchronously.patch |    2 +-
- .../930-ath10k_add_tpt_led_trigger.patch      |    4 +-
- ...rolling-support-for-various-chipsets.patch |   38 +-
- ...75-ath10k-use-tpt-trigger-by-default.patch |    8 +-
- ...-power-reduction-for-US-regulatory-d.patch |    8 +-
- ...h10k-Try-to-get-mac-address-from-dts.patch |   37 +
- .../ath10k/990-ath10k-small-buffers.patch     |   64 +
- .../201-ath5k-WAR-for-AR71xx-PCI-bug.patch    |    0
- .../411-ath5k_allow_adhoc_and_ap.patch        |    6 +-
- .../420-ath5k_disable_fast_cc.patch           |    0
- .../430-add_ath5k_platform.patch              |    0
- .../{ath => ath5k}/432-ath5k_add_pciids.patch |    0
- .../440-ath5k_channel_bw_debugfs.patch        |    2 +-
- ...-ieee80211-freq-limit-property-to-li.patch |   28 +
- ...w-reset-AHB-WMAC-interface-on-AR91xx.patch |    2 +-
- ..._hw-issue-external-reset-for-QCA955x.patch |    4 +-
- ...h9k-force-rx_clear-when-disabling-rx.patch |    0
- ...erpret-requested-txpower-in-EIRP-dom.patch |    4 +-
- ...power-reduction-for-US-regulatory-do.patch |    2 +-
- .../401-ath9k_blink_default.patch             |    2 +-
- .../410-ath9k_allow_adhoc_and_ap.patch        |    4 +-
- ...abled-MFP-capability-unconditionally.patch |    4 +-
- .../500-ath9k_eeprom_debugfs.patch            |    0
- .../{ath => ath9k}/501-ath9k_ahb_init.patch   |    2 +-
- .../510-ath9k_intr_mitigation_tweak.patch     |    2 +-
- .../511-ath9k_reduce_rxbuf.patch              |    0
- .../512-ath9k_channelbw_debugfs.patch         |    0
- .../513-ath9k_add_pci_ids.patch               |    2 +-
- .../{ath => ath9k}/530-ath9k_extra_leds.patch |    8 +-
- .../531-ath9k_extra_platform_leds.patch       |    0
- .../540-ath9k_reduce_ani_interval.patch       |    0
- .../542-ath9k_debugfs_diag.patch              |    8 +-
- .../543-ath9k_entropy_from_adc.patch          |   14 +-
- ...544-ath9k-ar933x-usb-hang-workaround.patch |   10 +-
- .../545-ath9k_ani_ws_detect.patch             |    2 +-
- .../547-ath9k_led_defstate_fix.patch          |    0
- .../548-ath9k_enable_gpio_chip.patch          |    4 +-
- .../549-ath9k_enable_gpio_buttons.patch       |    2 +-
- .../551-ath9k_ubnt_uap_plus_hsr.patch         |    6 +-
- .../552-ath9k-ahb_of.patch}                   |   18 +-
- .../553-ath9k_of_gpio_mask.patch              |    4 +-
- ...calibration-data-via-nvmem-subsystem.patch |  154 ++
- ...-fetch-pci-init-values-through-nvmem.patch |  181 +++
- .../brcm/812-b43-add-antenna-control.patch    |    8 +-
- ...-register-wiphy-s-during-module_init.patch |   18 +-
- ...62-brcmfmac-Disable-power-management.patch |    2 +-
- ...-in-driver-tables-with-country-codes.patch |   12 +-
- .../mac80211/patches/brcm/998-survey.patch    |   12 +-
- .../build/003-remove_bogus_modparams.patch    |    2 +-
- .../build/004-kconfig_backport_fix.patch      |   28 -
- .../patches/build/010-disable_rfkill.patch    |   15 -
- .../patches/build/060-no_local_ssb_bcma.patch |   10 +-
- ...700-mwl8k-missing-pci-id-for-WNR854T.patch |    2 +-
- ...940-mwl8k_init_devices_synchronously.patch |    4 +-
- ...define-RF5592-in-init_eeprom-routine.patch |    2 +-
- .../602-rt2x00-introduce-rt2x00eeprom.patch   |   10 +-
- ...isabling_bands_through_platform_data.patch |    4 +-
- ...07-rt2x00-add_platform_data_mac_addr.patch |   11 +-
- ...00-allow_disabling_bands_through_dts.patch |    2 +-
- ...0-rt2x00-change-led-polarity-from-OF.patch |    2 +-
- .../611-rt2x00-add-AP+STA-support.patch       |    2 +-
- .../612-rt2x00-led-tpt-trigger-support.patch  |    4 +-
- ...dd-support-for-external-PA-on-MT7620.patch |    6 +-
- ...-rt2x00-add-rf-self-txdc-calibration.patch |    4 +-
- .../rt2x00/983-rt2x00-add-r-calibration.patch |    4 +-
- .../984-rt2x00-add-rxdcoc-calibration.patch   |    4 +-
- .../985-rt2x00-add-rxiq-calibration.patch     |    4 +-
- .../986-rt2x00-add-TX-LOFT-calibration.patch  |    4 +-
- ...-differentiate-based-on-SoC-CHIP_VER.patch |   16 +-
- ...ave-survey-for-every-channel-visited.patch |  183 ---
- ...ent-set_tim-by-update-beacon-content.patch |  118 --
- .../patches/subsys/010-sync-nl80211_h.patch   |  297 ----
- .../100-remove-cryptoapi-dependencies.patch   |  699 ---------
- .../110-mac80211_keep_keys_on_stop_ap.patch   |    2 +-
- .../120-cfg80211_allow_perm_addr_change.patch |    2 +-
- .../patches/subsys/130-disable-fils.patch     |   32 -
- ...aes-cmac-switch-to-shash-CMAC-driver.patch |  230 ---
- .../132-mac80211-remove-cmac-dependency.patch |   10 -
- .../subsys/150-disable_addr_notifier.patch    |   12 +-
- .../mac80211/patches/subsys/210-ap_scan.patch |    2 +-
- ...ort-immediate-reconnect-request-hint.patch |  279 ----
- ...te-control-for-retransmitted-frames.patch} |    2 +-
- ...-driver-based-disconnect-with-reconn.patch |  271 ----
- ...port-to-configure-SAE-PWE-value-to-d.patch |   74 -
- ...gression-in-SSN-handling-of-addba-tx.patch |    2 +-
- ...-the-fwd_skb-dev-for-mesh-forwarding.patch |    2 +-
- ...t-access-the-IV-when-it-was-stripped.patch |   26 -
- ...BA-requests-using-the-tid-queue-of-.patch} |    0
- ...on-t-schedule_and_wake_txq-under-st.patch} |    0
- ...-free-packets-from-a-flow-on-overmem.patch |   95 --
- ...rse-boottime-for-airtime-fairness-co.patch |   60 +
- ...-get_default_func-move-default-flow-.patch |  144 --
- ...ot-maintain-a-backlog-sorted-list-of.patch |  317 ----
- ...add-rx-decapsulation-offload-support.patch |  570 -------
- ...le-QoS-support-for-nl80211-ctrl-port.patch |  116 --
- ...211_hwsim-make-6-GHz-channels-usable.patch |   74 +
- ...c80211-minstrel_ht-clean-up-CCK-code.patch |  166 ---
- ...l_ht-add-support-for-OFDM-rates-on-n.patch |  762 ----------
- ...-remove-legacy-minstrel-rate-control.patch | 1328 -----------------
- ...l_ht-remove-old-ewma-based-rate-aver.patch |   96 --
- ...l_ht-improve-ampdu-length-estimation.patch |   67 -
- ...rel_ht-improve-sample-rate-selection.patch |   31 -
- ...l_ht-fix-max-probability-rate-select.patch |  124 --
- ...el_ht-increase-stats-update-interval.patch |   20 -
- ...l_ht-fix-rounding-error-in-throughpu.patch |   34 -
- ...l_ht-use-bitfields-to-encode-rate-in.patch |  412 -----
- ...l_ht-update-total-packets-counter-in.patch |   54 -
- ...l_ht-reduce-the-need-to-sample-slowe.patch |  102 --
- ...l_ht-significantly-redesign-the-rate.patch |  767 ----------
- ...el_ht-show-sampling-rates-in-debugfs.patch |   58 -
- ...l_ht-remove-sample-rate-switching-co.patch |  279 ----
- ...l_ht-fix-regression-in-the-max_prob_.patch |   23 -
- ...l_ht-rework-rate-downgrade-code-and-.patch |   10 +-
- ...pply-flow-control-on-management-fram.patch |   60 -
- ...set-sk_pacing_shift-for-802.3-txpath.patch |   21 -
- ...-Rx-timestamp-calculation-for-all-pr.patch |  134 --
- ...MPDU-session-check-from-minstrel_ht-.patch |  126 --
- ...eee80211_tx_h_rate_ctrl-when-dequeue.patch |  114 --
- ...te-control-support-for-encap-offload.patch |  126 --
- ...11-minstrel_ht-fix-sample-time-check.patch |   23 -
- ...rting-aggregation-sessions-on-mesh-i.patch |  112 --
- ...introduce-aql_enable-node-in-debugfs.patch |  111 --
- ...ange-struct-txq_info-for-fewer-holes.patch |   39 -
- ...to-a-virtual-time-based-airtime-sche.patch | 1277 ----------------
- ...on-API-to-configure-SAR-power-limita.patch |  398 -----
- ...mac80211-add-ieee80211_set_sar_specs.patch |   51 -
- ...eck-per-vif-offload_flags-in-Tx-path.patch |   26 -
- ...nl80211-add-support-for-BSS-coloring.patch |  485 ------
- ...211-add-support-for-BSS-color-change.patch |  524 -------
- ...eee80211-add-TWT-element-definitions.patch |  112 --
- ...ce-individual-TWT-support-in-AP-mode.patch |  576 -------
- ...n-some-HE-capabilities-with-the-spec.patch |  196 ---
- ...pelling-of-A-MSDU-in-HE-capabilities.patch |  113 --
- ...E-capabilities-A-MPDU-Length-Exponen.patch |  148 --
- .../patches/subsys/400-allow-ibss-mixed.patch |    2 +-
- .../500-mac80211_configure_antenna_gain.patch |   48 +-
- ...the-dst-buffer-to-of_get_mac_address.patch |   29 +
- 152 files changed, 1038 insertions(+), 13037 deletions(-)
- delete mode 100644 package/kernel/mac80211/files/lib/netifd/mac80211.sh
- delete mode 100644 package/kernel/mac80211/patches/ath/120-owl-loader-compat.patch
- delete mode 100644 package/kernel/mac80211/patches/ath/550-ath9k-disable-bands-via-dt.patch
- delete mode 100644 package/kernel/mac80211/patches/ath/922-ath10k-increase-rx-buffer-size-to-2048.patch
- delete mode 100644 package/kernel/mac80211/patches/ath/980-ath10k-fix-max-antenna-gain-unit.patch
- rename package/kernel/mac80211/patches/{ath => ath10k}/080-ath10k_thermal_config.patch (97%)
- create mode 100644 package/kernel/mac80211/patches/ath10k/120-ath10k-fetch-calibration-data-via-nvmem-subsystem.patch
- rename package/kernel/mac80211/patches/{ath => ath10k}/921-ath10k_init_devices_synchronously.patch (94%)
- rename package/kernel/mac80211/patches/{ath => ath10k}/930-ath10k_add_tpt_led_trigger.patch (89%)
- rename package/kernel/mac80211/patches/{ath => ath10k}/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch (94%)
- rename package/kernel/mac80211/patches/{ath => ath10k}/975-ath10k-use-tpt-trigger-by-default.patch (92%)
- rename package/kernel/mac80211/patches/{ath => ath10k}/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch (93%)
- create mode 100644 package/kernel/mac80211/patches/ath10k/984-ath10k-Try-to-get-mac-address-from-dts.patch
- create mode 100644 package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch
- rename package/kernel/mac80211/patches/{ath => ath5k}/201-ath5k-WAR-for-AR71xx-PCI-bug.patch (100%)
- rename package/kernel/mac80211/patches/{ath => ath5k}/411-ath5k_allow_adhoc_and_ap.patch (89%)
- rename package/kernel/mac80211/patches/{ath => ath5k}/420-ath5k_disable_fast_cc.patch (100%)
- rename package/kernel/mac80211/patches/{ath => ath5k}/430-add_ath5k_platform.patch (100%)
- rename package/kernel/mac80211/patches/{ath => ath5k}/432-ath5k_add_pciids.patch (100%)
- rename package/kernel/mac80211/patches/{ath => ath5k}/440-ath5k_channel_bw_debugfs.patch (98%)
- create mode 100644 package/kernel/mac80211/patches/ath9k/040-ath9k-support-DT-ieee80211-freq-limit-property-to-li.patch
- rename package/kernel/mac80211/patches/{ath => ath9k}/350-ath9k_hw-reset-AHB-WMAC-interface-on-AR91xx.patch (89%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/351-ath9k_hw-issue-external-reset-for-QCA955x.patch (95%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/354-ath9k-force-rx_clear-when-disabling-rx.patch (100%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch (89%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch (91%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/401-ath9k_blink_default.patch (88%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/410-ath9k_allow_adhoc_and_ap.patch (73%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/450-ath9k-enabled-MFP-capability-unconditionally.patch (90%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/500-ath9k_eeprom_debugfs.patch (100%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/501-ath9k_ahb_init.patch (91%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/510-ath9k_intr_mitigation_tweak.patch (87%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/511-ath9k_reduce_rxbuf.patch (100%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/512-ath9k_channelbw_debugfs.patch (100%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/513-ath9k_add_pci_ids.patch (93%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/530-ath9k_extra_leds.patch (96%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/531-ath9k_extra_platform_leds.patch (100%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/540-ath9k_reduce_ani_interval.patch (100%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/542-ath9k_debugfs_diag.patch (93%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/543-ath9k_entropy_from_adc.patch (94%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/544-ath9k-ar933x-usb-hang-workaround.patch (84%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/545-ath9k_ani_ws_detect.patch (98%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/547-ath9k_led_defstate_fix.patch (100%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/548-ath9k_enable_gpio_chip.patch (98%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/549-ath9k_enable_gpio_buttons.patch (98%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/551-ath9k_ubnt_uap_plus_hsr.patch (98%)
- rename package/kernel/mac80211/patches/{ath/552-ahb_of.patch => ath9k/552-ath9k-ahb_of.patch} (93%)
- rename package/kernel/mac80211/patches/{ath => ath9k}/553-ath9k_of_gpio_mask.patch (80%)
- create mode 100644 package/kernel/mac80211/patches/ath9k/600-v5.16-ath9k-fetch-calibration-data-via-nvmem-subsystem.patch
- create mode 100644 package/kernel/mac80211/patches/ath9k/601-v5.16-ath9k-owl-loader-fetch-pci-init-values-through-nvmem.patch
- delete mode 100644 package/kernel/mac80211/patches/build/004-kconfig_backport_fix.patch
- delete mode 100644 package/kernel/mac80211/patches/build/010-disable_rfkill.patch
- delete mode 100644 package/kernel/mac80211/patches/rt2x00/992-rt2x00-save-survey-for-every-channel-visited.patch
- delete mode 100644 package/kernel/mac80211/patches/rtl/002-v5.13-rtlwifi-implement-set_tim-by-update-beacon-content.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/010-sync-nl80211_h.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/100-remove-cryptoapi-dependencies.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/130-disable-fils.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/131-Revert-mac80211-aes-cmac-switch-to-shash-CMAC-driver.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/132-mac80211-remove-cmac-dependency.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/300-cfg80211-support-immediate-reconnect-request-hint.patch
- rename package/kernel/mac80211/patches/subsys/{394-mac80211-fix-rate-control-for-retransmitted-frames.patch => 301-mac80211-fix-rate-control-for-retransmitted-frames.patch} (94%)
- delete mode 100644 package/kernel/mac80211/patches/subsys/301-mac80211-support-driver-based-disconnect-with-reconn.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/302-cfg80211-Add-support-to-configure-SAE-PWE-value-to-d.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/307-mac80211-do-not-access-the-IV-when-it-was-stripped.patch
- rename package/kernel/mac80211/patches/subsys/{308-mac80211-send-ADDBA-requests-using-the-tid-queue-of-.patch => 309-mac80211-send-ADDBA-requests-using-the-tid-queue-of-.patch} (100%)
- rename package/kernel/mac80211/patches/subsys/{309-mac80211-agg-tx-don-t-schedule_and_wake_txq-under-st.patch => 310-mac80211-agg-tx-don-t-schedule_and_wake_txq-under-st.patch} (100%)
- delete mode 100644 package/kernel/mac80211/patches/subsys/310-net-fq_impl-bulk-free-packets-from-a-flow-on-overmem.patch
- create mode 100644 package/kernel/mac80211/patches/subsys/311-mac80211-use-coarse-boottime-for-airtime-fairness-co.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/311-net-fq_impl-drop-get_default_func-move-default-flow-.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/312-net-fq_impl-do-not-maintain-a-backlog-sorted-list-of.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/315-mac80211-add-rx-decapsulation-offload-support.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/316-mac80211-enable-QoS-support-for-nl80211-ctrl-port.patch
- create mode 100644 package/kernel/mac80211/patches/subsys/321-mac80211_hwsim-make-6-GHz-channels-usable.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/337-mac80211-minstrel_ht-clean-up-CCK-code.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/338-mac80211-minstrel_ht-add-support-for-OFDM-rates-on-n.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/339-mac80211-remove-legacy-minstrel-rate-control.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/340-mac80211-minstrel_ht-remove-old-ewma-based-rate-aver.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/341-mac80211-minstrel_ht-improve-ampdu-length-estimation.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/342-mac80211-minstrel_ht-improve-sample-rate-selection.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/343-mac80211-minstrel_ht-fix-max-probability-rate-select.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/344-mac80211-minstrel_ht-increase-stats-update-interval.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/345-mac80211-minstrel_ht-fix-rounding-error-in-throughpu.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/346-mac80211-minstrel_ht-use-bitfields-to-encode-rate-in.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/347-mac80211-minstrel_ht-update-total-packets-counter-in.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/348-mac80211-minstrel_ht-reduce-the-need-to-sample-slowe.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/349-mac80211-minstrel_ht-significantly-redesign-the-rate.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/350-mac80211-minstrel_ht-show-sampling-rates-in-debugfs.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/351-mac80211-minstrel_ht-remove-sample-rate-switching-co.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/352-mac80211-minstrel_ht-fix-regression-in-the-max_prob_.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/371-mac80211-don-t-apply-flow-control-on-management-fram.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/372-mac80211-set-sk_pacing_shift-for-802.3-txpath.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/373-mac80211-support-Rx-timestamp-calculation-for-all-pr.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/374-mac80211-move-A-MPDU-session-check-from-minstrel_ht-.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/375-mac80211-call-ieee80211_tx_h_rate_ctrl-when-dequeue.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/376-mac80211-add-rate-control-support-for-encap-offload.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/377-mac80211-minstrel_ht-fix-sample-time-check.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/379-mac80211-fix-starting-aggregation-sessions-on-mesh-i.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/380-mac80211-introduce-aql_enable-node-in-debugfs.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/381-mac80211-rearrange-struct-txq_info-for-fewer-holes.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/382-mac80211-Switch-to-a-virtual-time-based-airtime-sche.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/384-nl80211-add-common-API-to-configure-SAR-power-limita.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/385-mac80211-add-ieee80211_set_sar_specs.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/386-mac80211-check-per-vif-offload_flags-in-Tx-path.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/387-nl80211-add-support-for-BSS-coloring.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/388-mac80211-add-support-for-BSS-color-change.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/389-ieee80211-add-TWT-element-definitions.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/390-mac80211-introduce-individual-TWT-support-in-AP-mode.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/391-wireless-align-some-HE-capabilities-with-the-spec.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/392-wireless-fix-spelling-of-A-MSDU-in-HE-capabilities.patch
- delete mode 100644 package/kernel/mac80211/patches/subsys/393-wireless-align-HE-capabilities-A-MPDU-Length-Exponen.patch
- create mode 100644 package/kernel/mac80211/patches/subsys/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch
-
-diff --git a/package/kernel/mac80211/Makefile b/package/kernel/mac80211/Makefile
-index 211bb346f3..2f9fd11f10 100644
---- a/package/kernel/mac80211/Makefile
-+++ b/package/kernel/mac80211/Makefile
-@@ -10,10 +10,10 @@ include $(INCLUDE_DIR)/kernel.mk
- 
- PKG_NAME:=mac80211
- 
--PKG_VERSION:=5.10.68-1
--PKG_RELEASE:=3
--PKG_SOURCE_URL:=@KERNEL/linux/kernel/projects/backports/stable/v5.10.68/
--PKG_HASH:=bba161b0084590c677a84b80993709e388a3c478f29ed0c475d4fce1b9162968
-+PKG_VERSION:=5.15.8-1
-+PKG_RELEASE:=1
-+PKG_SOURCE_URL:=@KERNEL/linux/kernel/projects/backports/stable/v5.15.8/
-+PKG_HASH:=9f71b659c034f19d156532ec780fcb606cee3c4ccc42e2f8ef18dd3e9f1b6820
- 
- PKG_SOURCE:=backports-$(PKG_VERSION).tar.xz
- PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/backports-$(PKG_VERSION)
-@@ -23,7 +23,6 @@ PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
- 
- PKG_DRIVERS = \
- 	adm8211 \
--	airo \
- 	hermes hermes-pci hermes-pcmcia hermes-plx\
- 	lib80211 \
- 	mac80211-hwsim \
-@@ -98,7 +97,7 @@ PKG_CONFIG_DEPENDS += \
- define KernelPackage/cfg80211
-   $(call KernelPackage/mac80211/Default)
-   TITLE:=cfg80211 - wireless configuration API
--  DEPENDS+= +iw +wireless-regdb
-+  DEPENDS+= +iw +iwinfo +wireless-regdb +USE_RFKILL:kmod-rfkill
-   ABI_VERSION:=$(PKG_VERSION)-$(PKG_RELEASE)
-   FILES:= \
- 	$(PKG_BUILD_DIR)/compat/compat.ko \
-@@ -127,7 +126,7 @@ define KernelPackage/mac80211
-   $(call KernelPackage/mac80211/Default)
-   TITLE:=Linux 802.11 Wireless Networking Stack
-   # +kmod-crypto-cmac is a runtime only dependency of net/mac80211/aes_cmac.c
--  DEPENDS+= +kmod-cfg80211 +hostapd-common
-+  DEPENDS+= +kmod-cfg80211 +kmod-crypto-cmac +kmod-crypto-ccm +kmod-crypto-gcm +hostapd-common
-   KCONFIG:=\
- 	CONFIG_AVERAGE=y
-   FILES:= $(PKG_BUILD_DIR)/net/mac80211/mac80211.ko
-@@ -174,18 +173,6 @@ define KernelPackage/adm8211
-   AUTOLOAD:=$(call AutoProbe,adm8211)
- endef
- 
--define KernelPackage/airo
--  $(call KernelPackage/mac80211/Default)
--  TITLE:=Cisco Aironet driver
--  DEPENDS+=@PCI_SUPPORT +@DRIVER_WEXT_SUPPORT +kmod-cfg80211 @TARGET_x86 @BROKEN
--  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/cisco/airo.ko
--  AUTOLOAD:=$(call AutoProbe,airo)
--endef
--
--define KernelPackage/airo/description
-- Kernel support for Cisco Aironet cards
--endef
--
- define KernelPackage/hermes
-   $(call KernelPackage/mac80211/Default)
-   TITLE:=Hermes 802.11b chipset support
-@@ -406,8 +393,6 @@ endif
- 
- config-$(call config_package,lib80211) += LIB80211 LIB80211_CRYPT_WEP LIB80211_CRYPT_CCMP LIB80211_CRYPT_TKIP
- 
--config-$(call config_package,airo) += AIRO
--
- config-$(call config_package,mac80211-hwsim) += MAC80211_HWSIM
- config-$(call config_package,mt7601u) += MT7601U
- config-y += WL_MEDIATEK
-@@ -434,9 +419,15 @@ config-$(call config_package,rsi91x-sdio) += RSI_SDIO
- 
- config-$(CONFIG_LEDS_TRIGGERS) += MAC80211_LEDS
- 
-+C_DEFINES=
-+
-+ifeq ($(BUILD_VARIANT),smallbuffers)
-+	C_DEFINES+= -DCONFIG_ATH10K_SMALLBUFFERS
-+endif
-+
- MAKE_OPTS:= -C "$(PKG_BUILD_DIR)" \
- 	$(KERNEL_MAKE_FLAGS) \
--	EXTRA_CFLAGS="-I$(PKG_BUILD_DIR)/include $(IREMAP_CFLAGS)" \
-+	EXTRA_CFLAGS="-I$(PKG_BUILD_DIR)/include $(IREMAP_CFLAGS) $(C_DEFINES)" \
- 	KLIB_BUILD="$(LINUX_DIR)" \
- 	MODPROBE=true \
- 	KLIB=$(TARGET_MODULES_DIR) \
-@@ -501,9 +492,14 @@ define Build/Patch
- 	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/build,build/)
- 	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/subsys,subsys/)
- 	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath,ath/)
-+	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath5k,ath5k/)
-+	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath9k,ath9k/)
-+	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath10k,ath10k/)
-+	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath11k,ath11k/)
- 	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/rt2x00,rt2x00/)
- 	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/mwl,mwl/)
- 	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/brcm,brcm/)
-+	$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/rtl,rtl/)
- 	$(if $(QUILT),touch $(PKG_BUILD_DIR)/.quilt_used)
- endef
- 
-@@ -511,9 +507,14 @@ define Quilt/Refresh/Package
- 	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/build,build/)
- 	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/subsys,subsys/)
- 	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath,ath/)
-+	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath5k,ath5k/)
-+	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath9k,ath9k/)
-+	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath10k,ath10k/)
-+	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath11k,ath11k/)
- 	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/rt2x00,rt2x00/)
- 	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/mwl,mwl/)
- 	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/brcm,brcm/)
-+	$(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/rtl,rtl/)
- endef
- 
- define Build/Compile
-@@ -539,7 +540,6 @@ endef
- define KernelPackage/cfg80211/install
- 	$(INSTALL_DIR) $(1)/lib/wifi $(1)/lib/netifd/wireless
- 	$(INSTALL_DATA) ./files/lib/wifi/mac80211.sh $(1)/lib/wifi
--	$(INSTALL_DATA) ./files/lib/netifd/mac80211.sh $(1)/lib/netifd
- 	$(INSTALL_BIN) ./files/lib/netifd/wireless/mac80211.sh $(1)/lib/netifd/wireless
- 	$(INSTALL_DIR) $(1)/etc/hotplug.d/ieee80211
- 	$(INSTALL_DATA) ./files/mac80211.hotplug $(1)/etc/hotplug.d/ieee80211/10-wifi-detect
-diff --git a/package/kernel/mac80211/ath.mk b/package/kernel/mac80211/ath.mk
-index 24abb910ff..50b1eed9c8 100644
---- a/package/kernel/mac80211/ath.mk
-+++ b/package/kernel/mac80211/ath.mk
-@@ -1,5 +1,5 @@
- PKG_DRIVERS += \
--	ath ath5k ath6kl ath6kl-sdio ath6kl-usb ath9k ath9k-common ath9k-htc ath10k \
-+	ath ath5k ath6kl ath6kl-sdio ath6kl-usb ath9k ath9k-common ath9k-htc ath10k ath10k-smallbuffers \
- 	carl9170 owl-loader ar5523 wil6210
- 
- PKG_CONFIG_DEPENDS += \
-@@ -34,7 +34,7 @@ ifdef CONFIG_PACKAGE_MAC80211_TRACING
- 	WIL6210_TRACING
- endif
- 
--config-$(call config_package,ath) += ATH_CARDS ATH_COMMON ATH_REG_DYNAMIC_USER_REG_HINTS
-+config-$(call config_package,ath) += ATH_CARDS ATH_COMMON
- config-$(CONFIG_PACKAGE_ATH_DEBUG) += ATH_DEBUG ATH10K_DEBUG ATH9K_STATION_STATISTICS
- config-$(CONFIG_PACKAGE_ATH_DFS) += ATH9K_DFS_CERTIFIED ATH10K_DFS_CERTIFIED
- config-$(CONFIG_PACKAGE_ATH_SPECTRAL) += ATH9K_COMMON_SPECTRAL ATH10K_SPECTRAL
-@@ -45,7 +45,7 @@ config-$(call config_package,owl-loader) += ATH9K_PCI_NO_EEPROM
- config-$(CONFIG_TARGET_ath79) += ATH9K_AHB
- config-$(CONFIG_TARGET_ipq40xx) += ATH10K_AHB
- config-$(CONFIG_PCI) += ATH9K_PCI
--config-$(CONFIG_ATH_USER_REGD) += ATH_USER_REGD
-+config-$(CONFIG_ATH_USER_REGD) += ATH_USER_REGD ATH_REG_DYNAMIC_USER_REG_HINTS
- config-$(CONFIG_ATH9K_HWRNG) += ATH9K_HWRNG
- config-$(CONFIG_ATH9K_SUPPORT_PCOEM) += ATH9K_PCOEM
- config-$(CONFIG_ATH9K_TX99) += ATH9K_TX99
-@@ -55,6 +55,7 @@ config-$(CONFIG_ATH10K_THERMAL) += ATH10K_THERMAL
- 
- config-$(call config_package,ath9k-htc) += ATH9K_HTC
- config-$(call config_package,ath10k) += ATH10K ATH10K_PCI
-+config-$(call config_package,ath10k-smallbuffers) += ATH10K ATH10K_PCI ATH10K_SMALLBUFFERS
- 
- config-$(call config_package,ath5k) += ATH5K
- ifdef CONFIG_TARGET_ath25
-@@ -260,6 +261,7 @@ define KernelPackage/ath10k
- 	$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath10k/ath10k_core.ko \
- 	$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath10k/ath10k_pci.ko
-   AUTOLOAD:=$(call AutoProbe,ath10k_pci)
-+  VARIANT:=regular
- endef
- 
- define KernelPackage/ath10k/description
-@@ -273,14 +275,20 @@ define KernelPackage/ath10k/config
-        config ATH10K_LEDS
-                bool "Enable LED support"
-                default y
--               depends on PACKAGE_kmod-ath10k
-+               depends on PACKAGE_kmod-ath10k || PACKAGE_kmod-ath10k-smallbuffers
- 
-        config ATH10K_THERMAL
-                bool "Enable thermal sensors and throttling support"
--               depends on PACKAGE_kmod-ath10k
-+               depends on PACKAGE_kmod-ath10k || PACKAGE_kmod-ath10k-smallbuffers
- 
- endef
- 
-+define KernelPackage/ath10k-smallbuffers
-+  $(call KernelPackage/ath10k)
-+  TITLE+= (small buffers for low-RAM devices)
-+  VARIANT:=smallbuffers
-+endef
-+
- define KernelPackage/carl9170
-   $(call KernelPackage/mac80211/Default)
-   TITLE:=Driver for Atheros AR9170 USB sticks
-diff --git a/package/kernel/mac80211/broadcom.mk b/package/kernel/mac80211/broadcom.mk
-index fb576c5809..473bbf597c 100644
---- a/package/kernel/mac80211/broadcom.mk
-+++ b/package/kernel/mac80211/broadcom.mk
-@@ -209,7 +209,7 @@ config PACKAGE_B43_USE_BCMA
- 		default "16,28,29,30" if TARGET_bcm47xx_mips74k
- 		default "5,6,7,8,9,10,11,13,15,16,28,29,30"
- 		help
--		  This is a comma seperated list of core revision numbers.
-+		  This is a comma separated list of core revision numbers.
- 
- 		  Example (keep files for rev5 only):
- 		    5
-@@ -224,7 +224,7 @@ config PACKAGE_B43_USE_BCMA
- 		default "N,HT" if TARGET_bcm47xx_mips74k
- 		default "G,N,LP,HT"
- 		help
--		  This is a comma seperated list of PHY types:
-+		  This is a comma separated list of PHY types:
- 		    A  => A-PHY
- 		    AG => Dual A-PHY G-PHY
- 		    G  => G-PHY
-diff --git a/package/kernel/mac80211/files/lib/netifd/mac80211.sh b/package/kernel/mac80211/files/lib/netifd/mac80211.sh
-deleted file mode 100644
-index 92e5c0e395..0000000000
---- a/package/kernel/mac80211/files/lib/netifd/mac80211.sh
-+++ /dev/null
-@@ -1,36 +0,0 @@
--mac80211_phy_to_path() {
--	local phy="$1"
--
--	[ -x /usr/bin/readlink -a -h /sys/class/ieee80211/${phy} ] || return
--
--	local path="$(readlink -f /sys/class/ieee80211/${phy}/device)"
--	[ -n "$path" ] || return
--
--	path="${path##/sys/devices/}"
--	case "$path" in
--		platform*/pci*) path="${path##platform/}";;
--	esac
--
--	local p
--	local seq=""
--	for p in $(ls /sys/class/ieee80211/$phy/device/ieee80211); do
--		[ "$p" = "$phy" ] && {
--			echo "$path${seq:++$seq}"
--			break
--		}
--
--		seq=$((${seq:-0} + 1))
--	done
--}
--
--mac80211_path_to_phy() {
--	local path="$1"
--
--	local p
--	for p in $(ls /sys/class/ieee80211); do
--		local cur="$(mac80211_phy_to_path "$p")"
--		case "$cur" in
--			*$path) echo "$p"; return;;
--		esac
--	done
--}
-diff --git a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh
-index d69667bf8c..27eecf3a7f 100644
---- a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh
-+++ b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh
-@@ -1,7 +1,6 @@
- #!/bin/sh
- . /lib/netifd/netifd-wireless.sh
- . /lib/netifd/hostapd.sh
--. /lib/netifd/mac80211.sh
- 
- init_wireless_driver "$@"
- 
-@@ -563,7 +562,7 @@ mac80211_generate_mac() {
- find_phy() {
- 	[ -n "$phy" -a -d /sys/class/ieee80211/$phy ] && return 0
- 	[ -n "$path" ] && {
--		phy="$(mac80211_path_to_phy "$path")"
-+		phy="$(iwinfo nl80211 phyname "path=$path")"
- 		[ -n "$phy" ] && return 0
- 	}
- 	[ -n "$macaddr" ] && {
-diff --git a/package/kernel/mac80211/files/lib/wifi/mac80211.sh b/package/kernel/mac80211/files/lib/wifi/mac80211.sh
-index 5eb7cc4c61..6aa46b0c74 100644
---- a/package/kernel/mac80211/files/lib/wifi/mac80211.sh
-+++ b/package/kernel/mac80211/files/lib/wifi/mac80211.sh
-@@ -1,5 +1,4 @@
- #!/bin/sh
--. /lib/netifd/mac80211.sh
- 
- append DRIVERS "mac80211"
- 
-@@ -11,7 +10,7 @@ lookup_phy() {
- 	local devpath
- 	config_get devpath "$device" path
- 	[ -n "$devpath" ] && {
--		phy="$(mac80211_path_to_phy "$devpath")"
-+		phy="$(iwinfo nl80211 phyname "path=$devpath")"
- 		[ -n "$phy" ] && return
- 	}
- 
-@@ -161,7 +160,7 @@ detect_mac80211() {
- 
- 		get_band_defaults "$dev"
- 
--		path="$(mac80211_phy_to_path "$dev")"
-+		path="$(iwinfo nl80211 path "$dev")"
- 		if [ -n "$path" ]; then
- 			dev_id="set wireless.radio${devidx}.path='$path'"
- 		else
-diff --git a/package/kernel/mac80211/patches/ath/120-owl-loader-compat.patch b/package/kernel/mac80211/patches/ath/120-owl-loader-compat.patch
-deleted file mode 100644
-index d1d6c9e2e3..0000000000
---- a/package/kernel/mac80211/patches/ath/120-owl-loader-compat.patch
-+++ /dev/null
-@@ -1,53 +0,0 @@
--From: Christian Lamparter <chunkeey@gmail.com>
--Date: Sat, 16 Nov 2019 19:25:24 +0100
--Subject: [PATCH] owl_loader: compatibility patch
--
--This patch includes OpenWrt specific changes that are
--not included in the upstream owl-loader.
--
--This includes a platform data handling changes for ar71xx.
--
--Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
--
----- a/drivers/net/wireless/ath/ath9k/ath9k_pci_owl_loader.c
--+++ b/drivers/net/wireless/ath/ath9k/ath9k_pci_owl_loader.c
--@@ -103,6 +103,7 @@ static void owl_fw_cb(const struct firmw
-- {
-- 	struct pci_dev *pdev = (struct pci_dev *)context;
-- 	struct owl_ctx *ctx = (struct owl_ctx *)pci_get_drvdata(pdev);
--+	struct ath9k_platform_data *pdata = dev_get_platdata(&pdev->dev);
-- 	struct pci_bus *bus;
-- 
-- 	complete(&ctx->eeprom_load);
--@@ -118,6 +119,16 @@ static void owl_fw_cb(const struct firmw
-- 		goto release;
-- 	}
-- 
--+	if (pdata) {
--+		memcpy(pdata->eeprom_data, fw->data, fw->size);
--+
--+		/*
--+		 * eeprom has been successfully loaded - pass the data to ath9k
--+		 * but remove the eeprom_name, so it doesn't try to load it too.
--+		 */
--+		pdata->eeprom_name = NULL;
--+	}
--+
-- 	if (ath9k_pci_fixup(pdev, (const u16 *)fw->data, fw->size))
-- 		goto release;
-- 
--@@ -137,8 +148,14 @@ release:
-- static const char *owl_get_eeprom_name(struct pci_dev *pdev)
-- {
-- 	struct device *dev = &pdev->dev;
--+	struct ath9k_platform_data *pdata;
-- 	char *eeprom_name;
-- 
--+	/* try the existing platform data first */
--+	pdata = dev_get_platdata(dev);
--+	if (pdata && pdata->eeprom_name)
--+		return pdata->eeprom_name;
--+
-- 	dev_dbg(dev, "using auto-generated eeprom filename\n");
-- 
-- 	eeprom_name = devm_kzalloc(dev, EEPROM_FILENAME_LEN, GFP_KERNEL);
-diff --git a/package/kernel/mac80211/patches/ath/402-ath_regd_optional.patch b/package/kernel/mac80211/patches/ath/402-ath_regd_optional.patch
-index bf87d3551a..506beb79c3 100644
---- a/package/kernel/mac80211/patches/ath/402-ath_regd_optional.patch
-+++ b/package/kernel/mac80211/patches/ath/402-ath_regd_optional.patch
-@@ -37,7 +37,7 @@
-  	for (band = 0; band < NUM_NL80211_BANDS; band++) {
-  		if (!wiphy->bands[band])
-  			continue;
--@@ -378,6 +387,9 @@ ath_reg_apply_ir_flags(struct wiphy *wip
-+@@ -379,6 +388,9 @@ ath_reg_apply_ir_flags(struct wiphy *wip
-  {
-  	struct ieee80211_supported_band *sband;
-  
-@@ -47,7 +47,7 @@
-  	sband = wiphy->bands[NL80211_BAND_2GHZ];
-  	if (!sband)
-  		return;
--@@ -407,6 +419,9 @@ static void ath_reg_apply_radar_flags(st
-+@@ -408,6 +420,9 @@ static void ath_reg_apply_radar_flags(st
-  	struct ieee80211_channel *ch;
-  	unsigned int i;
-  
-@@ -57,7 +57,7 @@
-  	if (!wiphy->bands[NL80211_BAND_5GHZ])
-  		return;
-  
--@@ -639,6 +654,10 @@ ath_regd_init_wiphy(struct ath_regulator
-+@@ -640,6 +655,10 @@ ath_regd_init_wiphy(struct ath_regulator
-  	const struct ieee80211_regdomain *regd;
-  
-  	wiphy->reg_notifier = reg_notifier;
-@@ -82,7 +82,7 @@
-  	help
- --- a/local-symbols
- +++ b/local-symbols
--@@ -85,6 +85,7 @@ ADM8211=
-+@@ -76,6 +76,7 @@ ADM8211=
-  ATH_COMMON=
-  WLAN_VENDOR_ATH=
-  ATH_DEBUG=
-diff --git a/package/kernel/mac80211/patches/ath/404-regd_no_assoc_hints.patch b/package/kernel/mac80211/patches/ath/404-regd_no_assoc_hints.patch
-index c6dc184e28..833e2411c4 100644
---- a/package/kernel/mac80211/patches/ath/404-regd_no_assoc_hints.patch
-+++ b/package/kernel/mac80211/patches/ath/404-regd_no_assoc_hints.patch
-@@ -1,6 +1,6 @@
- --- a/net/wireless/reg.c
- +++ b/net/wireless/reg.c
--@@ -3252,6 +3252,8 @@ void regulatory_hint_country_ie(struct w
-+@@ -3299,6 +3299,8 @@ void regulatory_hint_country_ie(struct w
-  	enum environment_cap env = ENVIRON_ANY;
-  	struct regulatory_request *request = NULL, *lr;
-  
-@@ -9,7 +9,7 @@
-  	/* IE len must be evenly divisible by 2 */
-  	if (country_ie_len & 0x01)
-  		return;
--@@ -3503,6 +3505,7 @@ static bool is_wiphy_all_set_reg_flag(en
-+@@ -3550,6 +3552,7 @@ static bool is_wiphy_all_set_reg_flag(en
-  
-  void regulatory_hint_disconnect(void)
-  {
-diff --git a/package/kernel/mac80211/patches/ath/406-ath_relax_default_regd.patch b/package/kernel/mac80211/patches/ath/406-ath_relax_default_regd.patch
-index 35b0f2b76e..ee4e461342 100644
---- a/package/kernel/mac80211/patches/ath/406-ath_relax_default_regd.patch
-+++ b/package/kernel/mac80211/patches/ath/406-ath_relax_default_regd.patch
-@@ -39,7 +39,7 @@
-  bool ath_is_world_regd(struct ath_regulatory *reg)
-  {
-  	return is_wwr_sku(ath_regd_get_eepromRD(reg));
--@@ -658,6 +666,9 @@ ath_regd_init_wiphy(struct ath_regulator
-+@@ -659,6 +667,9 @@ ath_regd_init_wiphy(struct ath_regulator
-  	if (IS_ENABLED(CPTCFG_ATH_USER_REGD))
-  		return 0;
-  
-diff --git a/package/kernel/mac80211/patches/ath/550-ath9k-disable-bands-via-dt.patch b/package/kernel/mac80211/patches/ath/550-ath9k-disable-bands-via-dt.patch
-deleted file mode 100644
-index 7d3a334c42..0000000000
---- a/package/kernel/mac80211/patches/ath/550-ath9k-disable-bands-via-dt.patch
-+++ /dev/null
-@@ -1,15 +0,0 @@
----- a/drivers/net/wireless/ath/ath9k/init.c
--+++ b/drivers/net/wireless/ath/ath9k/init.c
--@@ -627,6 +627,12 @@ static int ath9k_of_init(struct ath_soft
-- 
-- 	ath_dbg(common, CONFIG, "parsing configuration from OF node\n");
-- 
--+	if (of_property_read_bool(np, "qca,disable-2ghz"))
--+		ah->disable_2ghz = true;
--+
--+	if (of_property_read_bool(np, "qca,disable-5ghz"))
--+		ah->disable_5ghz = true;
--+
-- 	if (of_property_read_bool(np, "qca,no-eeprom")) {
-- 		/* ath9k-eeprom-<bus>-<id>.bin */
-- 		scnprintf(eeprom_name, sizeof(eeprom_name),
-diff --git a/package/kernel/mac80211/patches/ath/922-ath10k-increase-rx-buffer-size-to-2048.patch b/package/kernel/mac80211/patches/ath/922-ath10k-increase-rx-buffer-size-to-2048.patch
-deleted file mode 100644
-index 8f7a60eec8..0000000000
---- a/package/kernel/mac80211/patches/ath/922-ath10k-increase-rx-buffer-size-to-2048.patch
-+++ /dev/null
-@@ -1,37 +0,0 @@
--From: Linus Lüssing <ll@simonwunderlich.de>
--Date: Wed, 5 Feb 2020 20:10:43 +0100
--Subject: ath10k: increase rx buffer size to 2048
--
--Before, only frames with a maximum size of 1528 bytes could be
--transmitted between two 802.11s nodes.
--
--For batman-adv for instance, which adds its own header to each frame,
--we typically need an MTU of at least 1532 bytes to be able to transmit
--without fragmentation.
--
--This patch now increases the maxmimum frame size from 1528 to 1656
--bytes.
--
--Tested with two ath10k devices in 802.11s mode, as well as with
--batman-adv on top of 802.11s with forwarding disabled.
--
--Fix originally found and developed by Ben Greear.
--
--Link: https://github.com/greearb/ath10k-ct/issues/89
--Link: https://github.com/greearb/ath10k-ct/commit/9e5ab25027e0971fa24ccf93373324c08c4e992d
--Cc: Ben Greear <greearb@candelatech.com>
--Signed-off-by: Linus Lüssing <ll@simonwunderlich.de>
--
--Forwarded: https://patchwork.kernel.org/patch/11367055/
--
----- a/drivers/net/wireless/ath/ath10k/htt.h
--+++ b/drivers/net/wireless/ath/ath10k/htt.h
--@@ -2243,7 +2243,7 @@ struct htt_rx_chan_info {
--  * Should be: sizeof(struct htt_host_rx_desc) + max rx MSDU size,
--  * rounded up to a cache line size.
--  */
---#define HTT_RX_BUF_SIZE 1920
--+#define HTT_RX_BUF_SIZE 2048
-- #define HTT_RX_MSDU_SIZE (HTT_RX_BUF_SIZE - (int)sizeof(struct htt_rx_desc))
-- 
-- /* Refill a bunch of RX buffers for each refill round so that FW/HW can handle
-diff --git a/package/kernel/mac80211/patches/ath/980-ath10k-fix-max-antenna-gain-unit.patch b/package/kernel/mac80211/patches/ath/980-ath10k-fix-max-antenna-gain-unit.patch
-deleted file mode 100644
-index e951e011e6..0000000000
---- a/package/kernel/mac80211/patches/ath/980-ath10k-fix-max-antenna-gain-unit.patch
-+++ /dev/null
-@@ -1,49 +0,0 @@
--From: Sven Eckelmann <seckelmann@datto.com>
--Date: Tue, 11 Jun 2019 13:58:35 +0200
--Subject: ath10k: fix max antenna gain unit
--
--Most of the txpower for the ath10k firmware is stored as twicepower (0.5 dB
--steps). This isn't the case for max_antenna_gain - which is still expected
--by the firmware as dB.
--
--The firmware is converting it from dB to the internal (twicepower)
--representation when it calculates the limits of a channel. This can be seen
--in tpc_stats when configuring "12" as max_antenna_gain. Instead of the
--expected 12 (6 dB), the tpc_stats shows 24 (12 dB).
--
--Tested on QCA9888 and IPQ4019 with firmware 10.4-3.5.3-00057.
--
--Fixes: 02256930d9b8 ("ath10k: use proper tx power unit")
--Signed-off-by: Sven Eckelmann <seckelmann@datto.com>
--
--Forwarded: https://patchwork.kernel.org/patch/10986723/
--
----- a/drivers/net/wireless/ath/ath10k/mac.c
--+++ b/drivers/net/wireless/ath/ath10k/mac.c
--@@ -1038,7 +1038,7 @@ static int ath10k_monitor_vdev_start(str
-- 	arg.channel.min_power = 0;
-- 	arg.channel.max_power = channel->max_power * 2;
-- 	arg.channel.max_reg_power = channel->max_reg_power * 2;
---	arg.channel.max_antenna_gain = channel->max_antenna_gain * 2;
--+	arg.channel.max_antenna_gain = channel->max_antenna_gain;
-- 
-- 	reinit_completion(&ar->vdev_setup_done);
-- 	reinit_completion(&ar->vdev_delete_done);
--@@ -1484,7 +1484,7 @@ static int ath10k_vdev_start_restart(str
-- 	arg.channel.min_power = 0;
-- 	arg.channel.max_power = chandef->chan->max_power * 2;
-- 	arg.channel.max_reg_power = chandef->chan->max_reg_power * 2;
---	arg.channel.max_antenna_gain = chandef->chan->max_antenna_gain * 2;
--+	arg.channel.max_antenna_gain = chandef->chan->max_antenna_gain;
-- 
-- 	if (arvif->vdev_type == WMI_VDEV_TYPE_AP) {
-- 		arg.ssid = arvif->u.ap.ssid;
--@@ -3255,7 +3255,7 @@ static int ath10k_update_channel_list(st
-- 			ch->min_power = 0;
-- 			ch->max_power = channel->max_power * 2;
-- 			ch->max_reg_power = channel->max_reg_power * 2;
---			ch->max_antenna_gain = channel->max_antenna_gain * 2;
--+			ch->max_antenna_gain = channel->max_antenna_gain;
-- 			ch->reg_class_id = 0; /* FIXME */
-- 
-- 			/* FIXME: why use only legacy modes, why not any
-diff --git a/package/kernel/mac80211/patches/ath/080-ath10k_thermal_config.patch b/package/kernel/mac80211/patches/ath10k/080-ath10k_thermal_config.patch
-similarity index 97%
-rename from package/kernel/mac80211/patches/ath/080-ath10k_thermal_config.patch
-rename to package/kernel/mac80211/patches/ath10k/080-ath10k_thermal_config.patch
-index de6f9d9bb0..0886fd688a 100644
---- a/package/kernel/mac80211/patches/ath/080-ath10k_thermal_config.patch
-+++ b/package/kernel/mac80211/patches/ath10k/080-ath10k_thermal_config.patch
-@@ -37,7 +37,7 @@
-  void ath10k_thermal_event_temperature(struct ath10k *ar, int temperature);
- --- a/local-symbols
- +++ b/local-symbols
--@@ -142,6 +142,7 @@ ATH10K_SNOC=
-+@@ -135,6 +135,7 @@ ATH10K_SNOC=
-  ATH10K_DEBUG=
-  ATH10K_DEBUGFS=
-  ATH10K_SPECTRAL=
-diff --git a/package/kernel/mac80211/patches/ath10k/120-ath10k-fetch-calibration-data-via-nvmem-subsystem.patch b/package/kernel/mac80211/patches/ath10k/120-ath10k-fetch-calibration-data-via-nvmem-subsystem.patch
-new file mode 100644
-index 0000000000..6728a69efe
---- /dev/null
-+++ b/package/kernel/mac80211/patches/ath10k/120-ath10k-fetch-calibration-data-via-nvmem-subsystem.patch
-@@ -0,0 +1,162 @@
-+From e2333703373e8b81294da5d1c73c30154f75b082 Mon Sep 17 00:00:00 2001
-+From: Christian Lamparter <chunkeey@gmail.com>
-+Date: Fri, 15 Oct 2021 18:56:33 +0200
-+Subject: [PATCH] ath10k: fetch (pre-)calibration data via nvmem subsystem
-+
-+On most embedded ath10k devices (like range extenders,
-+routers, accesspoints, ...) the calibration data is
-+stored in a easily accessible MTD partitions named
-+"ART", "caldata", "calibration", etc...
-+
-+Since commit 4b361cfa8624 ("mtd: core: add OTP nvmem provider support"):
-+MTD partitions and portions of them can be specified
-+as potential nvmem-cells which are accessible through
-+the nvmem subsystem.
-+
-+This feature - together with an nvmem cell definition either
-+in the platform data or via device-tree allows drivers to get
-+the (pre-)calibration data which is required for initializing
-+the WIFI.
-+
-+Tested with Netgear EX6150v2 (IPQ4018)
-+
-+Cc: Robert Marko <robimarko@gmail.com>
-+Cc: Thibaut Varene <hacks@slashdirt.org>
-+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
-+---
-+--- a/drivers/net/wireless/ath/ath10k/core.c
-++++ b/drivers/net/wireless/ath/ath10k/core.c
-+@@ -12,6 +12,7 @@
-+ #include <linux/dmi.h>
-+ #include <linux/ctype.h>
-+ #include <linux/pm_qos.h>
-++#include <linux/nvmem-consumer.h>
-+ #include <asm/byteorder.h>
-+ 
-+ #include "core.h"
-+@@ -935,7 +936,8 @@ static int ath10k_core_get_board_id_from
-+ 	}
-+ 
-+ 	if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
-+-	    ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
-++	    ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE ||
-++	    ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM)
-+ 		bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
-+ 	else
-+ 		bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
-+@@ -1726,7 +1728,8 @@ static int ath10k_download_and_run_otp(s
-+ 
-+ 	/* As of now pre-cal is valid for 10_4 variants */
-+ 	if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
-+-	    ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
-++	    ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE ||
-++	    ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM)
-+ 		bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
-+ 
-+ 	ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
-+@@ -1853,6 +1856,39 @@ out_free:
-+ 	return ret;
-+ }
-+ 
-++static int ath10k_download_cal_nvmem(struct ath10k *ar, const char *cell_name)
-++{
-++	struct nvmem_cell *cell;
-++	void *buf;
-++	size_t len;
-++	int ret;
-++
-++	cell = devm_nvmem_cell_get(ar->dev, cell_name);
-++	if (IS_ERR(cell)) {
-++		ret = PTR_ERR(cell);
-++		return ret;
-++	}
-++
-++	buf = nvmem_cell_read(cell, &len);
-++	if (IS_ERR(buf))
-++		return PTR_ERR(buf);
-++
-++	if (ar->hw_params.cal_data_len != len) {
-++		kfree(buf);
-++		ath10k_warn(ar, "invalid calibration data length in nvmem-cell '%s': %zu != %u\n",
-++			    cell_name, len, ar->hw_params.cal_data_len);
-++		return -EMSGSIZE;
-++	}
-++
-++	ret = ath10k_download_board_data(ar, buf, len);
-++	kfree(buf);
-++	if (ret)
-++		ath10k_warn(ar, "failed to download calibration data from nvmem-cell '%s': %d\n",
-++			    cell_name, ret);
-++
-++	return ret;
-++}
-++
-+ int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
-+ 				     struct ath10k_fw_file *fw_file)
-+ {
-+@@ -2087,6 +2123,18 @@ static int ath10k_core_pre_cal_download(
-+ {
-+ 	int ret;
-+ 
-++	ret = ath10k_download_cal_nvmem(ar, "pre-calibration");
-++	if (ret == 0) {
-++		ar->cal_mode = ATH10K_PRE_CAL_MODE_NVMEM;
-++		goto success;
-++	} else if (ret == -EPROBE_DEFER) {
-++		return ret;
-++	}
-++
-++	ath10k_dbg(ar, ATH10K_DBG_BOOT,
-++		   "boot did not find a pre-calibration nvmem-cell, try file next: %d\n",
-++		   ret);
-++
-+ 	ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
-+ 	if (ret == 0) {
-+ 		ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
-+@@ -2153,6 +2201,18 @@ static int ath10k_download_cal_data(stru
-+ 		   "pre cal download procedure failed, try cal file: %d\n",
-+ 		   ret);
-+ 
-++	ret = ath10k_download_cal_nvmem(ar, "calibration");
-++	if (ret == 0) {
-++		ar->cal_mode = ATH10K_CAL_MODE_NVMEM;
-++		goto done;
-++	} else if (ret == -EPROBE_DEFER) {
-++		return ret;
-++	}
-++
-++	ath10k_dbg(ar, ATH10K_DBG_BOOT,
-++		   "boot did not find a calibration nvmem-cell, try file next: %d\n",
-++		   ret);
-++
-+ 	ret = ath10k_download_cal_file(ar, ar->cal_file);
-+ 	if (ret == 0) {
-+ 		ar->cal_mode = ATH10K_CAL_MODE_FILE;
-+--- a/drivers/net/wireless/ath/ath10k/core.h
-++++ b/drivers/net/wireless/ath/ath10k/core.h
-+@@ -877,8 +877,10 @@ enum ath10k_cal_mode {
-+ 	ATH10K_CAL_MODE_FILE,
-+ 	ATH10K_CAL_MODE_OTP,
-+ 	ATH10K_CAL_MODE_DT,
-++	ATH10K_CAL_MODE_NVMEM,
-+ 	ATH10K_PRE_CAL_MODE_FILE,
-+ 	ATH10K_PRE_CAL_MODE_DT,
-++	ATH10K_PRE_CAL_MODE_NVMEM,
-+ 	ATH10K_CAL_MODE_EEPROM,
-+ };
-+ 
-+@@ -898,10 +900,14 @@ static inline const char *ath10k_cal_mod
-+ 		return "otp";
-+ 	case ATH10K_CAL_MODE_DT:
-+ 		return "dt";
-++	case ATH10K_CAL_MODE_NVMEM:
-++		return "nvmem";
-+ 	case ATH10K_PRE_CAL_MODE_FILE:
-+ 		return "pre-cal-file";
-+ 	case ATH10K_PRE_CAL_MODE_DT:
-+ 		return "pre-cal-dt";
-++	case ATH10K_PRE_CAL_MODE_NVMEM:
-++		return "pre-cal-nvmem";
-+ 	case ATH10K_CAL_MODE_EEPROM:
-+ 		return "eeprom";
-+ 	}
-diff --git a/package/kernel/mac80211/patches/ath/921-ath10k_init_devices_synchronously.patch b/package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch
-similarity index 94%
-rename from package/kernel/mac80211/patches/ath/921-ath10k_init_devices_synchronously.patch
-rename to package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch
-index e004acc340..710cd45269 100644
---- a/package/kernel/mac80211/patches/ath/921-ath10k_init_devices_synchronously.patch
-+++ b/package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch
-@@ -14,7 +14,7 @@ Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
- 
- --- a/drivers/net/wireless/ath/ath10k/core.c
- +++ b/drivers/net/wireless/ath/ath10k/core.c
--@@ -3189,6 +3189,16 @@ int ath10k_core_register(struct ath10k *
-+@@ -3412,6 +3412,16 @@ int ath10k_core_register(struct ath10k *
-  
-  	queue_work(ar->workqueue, &ar->register_work);
-  
-diff --git a/package/kernel/mac80211/patches/ath/930-ath10k_add_tpt_led_trigger.patch b/package/kernel/mac80211/patches/ath10k/930-ath10k_add_tpt_led_trigger.patch
-similarity index 89%
-rename from package/kernel/mac80211/patches/ath/930-ath10k_add_tpt_led_trigger.patch
-rename to package/kernel/mac80211/patches/ath10k/930-ath10k_add_tpt_led_trigger.patch
-index 517a98206d..b60db19464 100644
---- a/package/kernel/mac80211/patches/ath/930-ath10k_add_tpt_led_trigger.patch
-+++ b/package/kernel/mac80211/patches/ath10k/930-ath10k_add_tpt_led_trigger.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/ath/ath10k/mac.c
- +++ b/drivers/net/wireless/ath/ath10k/mac.c
--@@ -9709,6 +9709,21 @@ static int ath10k_mac_init_rd(struct ath
-+@@ -9843,6 +9843,21 @@ static int ath10k_mac_init_rd(struct ath
-  	return 0;
-  }
-  
-@@ -22,7 +22,7 @@
-  int ath10k_mac_register(struct ath10k *ar)
-  {
-  	static const u32 cipher_suites[] = {
--@@ -10058,6 +10073,12 @@ int ath10k_mac_register(struct ath10k *a
-+@@ -10195,6 +10210,12 @@ int ath10k_mac_register(struct ath10k *a
-  
-  	ar->hw->weight_multiplier = ATH10K_AIRTIME_WEIGHT_MULTIPLIER;
-  
-diff --git a/package/kernel/mac80211/patches/ath/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch b/package/kernel/mac80211/patches/ath10k/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch
-similarity index 94%
-rename from package/kernel/mac80211/patches/ath/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch
-rename to package/kernel/mac80211/patches/ath10k/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch
-index ce8effe3c3..65d67b2e03 100644
---- a/package/kernel/mac80211/patches/ath/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch
-+++ b/package/kernel/mac80211/patches/ath10k/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch
-@@ -85,7 +85,7 @@ v13:
-  create mode 100644 drivers/net/wireless/ath/ath10k/leds.h
- --- a/drivers/net/wireless/ath/ath10k/Kconfig
- +++ b/drivers/net/wireless/ath/ath10k/Kconfig
--@@ -70,6 +70,16 @@ config ATH10K_DEBUGFS
-+@@ -71,6 +71,16 @@ config ATH10K_DEBUGFS
-  
-  	  If unsure, say Y to make it easier to debug problems.
-  
-@@ -114,7 +114,7 @@ v13:
-  ath10k_core-$(CONFIG_DEV_COREDUMP) += coredump.o
- --- a/local-symbols
- +++ b/local-symbols
--@@ -145,6 +145,7 @@ ATH10K_DEBUG=
-+@@ -136,6 +136,7 @@ ATH10K_DEBUG=
-  ATH10K_DEBUGFS=
-  ATH10K_SPECTRAL=
-  ATH10K_THERMAL=
-@@ -124,7 +124,7 @@ v13:
-  WCN36XX=
- --- a/drivers/net/wireless/ath/ath10k/core.c
- +++ b/drivers/net/wireless/ath/ath10k/core.c
--@@ -25,6 +25,7 @@
-+@@ -26,6 +26,7 @@
-  #include "testmode.h"
-  #include "wmi-ops.h"
-  #include "coredump.h"
-@@ -132,7 +132,7 @@ v13:
-  
-  unsigned int ath10k_debug_mask;
-  EXPORT_SYMBOL(ath10k_debug_mask);
--@@ -61,6 +62,7 @@ static const struct ath10k_hw_params ath
-+@@ -62,6 +63,7 @@ static const struct ath10k_hw_params ath
-  		.dev_id = QCA988X_2_0_DEVICE_ID,
-  		.bus = ATH10K_BUS_PCI,
-  		.name = "qca988x hw2.0",
-@@ -140,7 +140,7 @@ v13:
-  		.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
-  		.uart_pin = 7,
-  		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
--@@ -130,6 +132,7 @@ static const struct ath10k_hw_params ath
-+@@ -133,6 +135,7 @@ static const struct ath10k_hw_params ath
-  		.dev_id = QCA9887_1_0_DEVICE_ID,
-  		.bus = ATH10K_BUS_PCI,
-  		.name = "qca9887 hw1.0",
-@@ -148,7 +148,7 @@ v13:
-  		.patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
-  		.uart_pin = 7,
-  		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
--@@ -335,6 +338,7 @@ static const struct ath10k_hw_params ath
-+@@ -344,6 +347,7 @@ static const struct ath10k_hw_params ath
-  		.dev_id = QCA99X0_2_0_DEVICE_ID,
-  		.bus = ATH10K_BUS_PCI,
-  		.name = "qca99x0 hw2.0",
-@@ -156,7 +156,7 @@ v13:
-  		.patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
-  		.uart_pin = 7,
-  		.otp_exe_param = 0x00000700,
--@@ -375,6 +379,7 @@ static const struct ath10k_hw_params ath
-+@@ -385,6 +389,7 @@ static const struct ath10k_hw_params ath
-  		.dev_id = QCA9984_1_0_DEVICE_ID,
-  		.bus = ATH10K_BUS_PCI,
-  		.name = "qca9984/qca9994 hw1.0",
-@@ -164,7 +164,7 @@ v13:
-  		.patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
-  		.uart_pin = 7,
-  		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
--@@ -422,6 +427,7 @@ static const struct ath10k_hw_params ath
-+@@ -433,6 +438,7 @@ static const struct ath10k_hw_params ath
-  		.dev_id = QCA9888_2_0_DEVICE_ID,
-  		.bus = ATH10K_BUS_PCI,
-  		.name = "qca9888 hw2.0",
-@@ -172,7 +172,7 @@ v13:
-  		.patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
-  		.uart_pin = 7,
-  		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
--@@ -2904,6 +2910,10 @@ int ath10k_core_start(struct ath10k *ar,
-+@@ -3127,6 +3133,10 @@ int ath10k_core_start(struct ath10k *ar,
-  		goto err_hif_stop;
-  	}
-  
-@@ -183,7 +183,7 @@ v13:
-  	return 0;
-  
-  err_hif_stop:
--@@ -3162,9 +3172,18 @@ static void ath10k_core_register_work(st
-+@@ -3385,9 +3395,18 @@ static void ath10k_core_register_work(st
-  		goto err_spectral_destroy;
-  	}
-  
-@@ -202,7 +202,7 @@ v13:
-  err_spectral_destroy:
-  	ath10k_spectral_destroy(ar);
-  err_debug_destroy:
--@@ -3210,6 +3229,8 @@ void ath10k_core_unregister(struct ath10
-+@@ -3433,6 +3452,8 @@ void ath10k_core_unregister(struct ath10
-  	if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
-  		return;
-  
-@@ -221,7 +221,7 @@ v13:
-  
-  #include "htt.h"
-  #include "htc.h"
--@@ -1237,6 +1238,13 @@ struct ath10k {
-+@@ -1256,6 +1257,13 @@ struct ath10k {
-  	} testmode;
-  
-  	struct {
-@@ -467,7 +467,7 @@ v13:
-  static const struct wmi_peer_flags_map wmi_tlv_peer_flags_map = {
- --- a/drivers/net/wireless/ath/ath10k/wmi.c
- +++ b/drivers/net/wireless/ath/ath10k/wmi.c
--@@ -7468,6 +7468,49 @@ ath10k_wmi_op_gen_peer_set_param(struct
-+@@ -7472,6 +7472,49 @@ ath10k_wmi_op_gen_peer_set_param(struct
-  	return skb;
-  }
-  
-@@ -517,7 +517,7 @@ v13:
-  static struct sk_buff *
-  ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
-  			     enum wmi_sta_ps_mode psmode)
--@@ -9156,6 +9199,9 @@ static const struct wmi_ops wmi_ops = {
-+@@ -9160,6 +9203,9 @@ static const struct wmi_ops wmi_ops = {
-  	.fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
-  	.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
-  	.gen_echo = ath10k_wmi_op_gen_echo,
-@@ -527,7 +527,7 @@ v13:
-  	/* .gen_bcn_tmpl not implemented */
-  	/* .gen_prb_tmpl not implemented */
-  	/* .gen_p2p_go_bcn_ie not implemented */
--@@ -9226,6 +9272,8 @@ static const struct wmi_ops wmi_10_1_ops
-+@@ -9230,6 +9276,8 @@ static const struct wmi_ops wmi_10_1_ops
-  	.fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
-  	.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
-  	.gen_echo = ath10k_wmi_op_gen_echo,
-@@ -536,7 +536,7 @@ v13:
-  	/* .gen_bcn_tmpl not implemented */
-  	/* .gen_prb_tmpl not implemented */
-  	/* .gen_p2p_go_bcn_ie not implemented */
--@@ -9298,6 +9346,8 @@ static const struct wmi_ops wmi_10_2_ops
-+@@ -9302,6 +9350,8 @@ static const struct wmi_ops wmi_10_2_ops
-  	.gen_delba_send = ath10k_wmi_op_gen_delba_send,
-  	.fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
-  	.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
-@@ -545,7 +545,7 @@ v13:
-  	/* .gen_pdev_enable_adaptive_cca not implemented */
-  };
-  
--@@ -9369,6 +9419,8 @@ static const struct wmi_ops wmi_10_2_4_o
-+@@ -9373,6 +9423,8 @@ static const struct wmi_ops wmi_10_2_4_o
-  		ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
-  	.get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
-  	.gen_bb_timing = ath10k_wmi_10_2_4_op_gen_bb_timing,
-@@ -554,7 +554,7 @@ v13:
-  	/* .gen_bcn_tmpl not implemented */
-  	/* .gen_prb_tmpl not implemented */
-  	/* .gen_p2p_go_bcn_ie not implemented */
--@@ -9450,6 +9502,8 @@ static const struct wmi_ops wmi_10_4_ops
-+@@ -9454,6 +9506,8 @@ static const struct wmi_ops wmi_10_4_ops
-  	.gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
-  	.gen_echo = ath10k_wmi_op_gen_echo,
-  	.gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
-@@ -565,7 +565,7 @@ v13:
-  int ath10k_wmi_attach(struct ath10k *ar)
- --- a/drivers/net/wireless/ath/ath10k/wmi.h
- +++ b/drivers/net/wireless/ath/ath10k/wmi.h
--@@ -3027,6 +3027,41 @@ enum wmi_10_4_feature_mask {
-+@@ -3030,6 +3030,41 @@ enum wmi_10_4_feature_mask {
-  
-  };
-  
-diff --git a/package/kernel/mac80211/patches/ath/975-ath10k-use-tpt-trigger-by-default.patch b/package/kernel/mac80211/patches/ath10k/975-ath10k-use-tpt-trigger-by-default.patch
-similarity index 92%
-rename from package/kernel/mac80211/patches/ath/975-ath10k-use-tpt-trigger-by-default.patch
-rename to package/kernel/mac80211/patches/ath10k/975-ath10k-use-tpt-trigger-by-default.patch
-index 975d9a88a8..da31ad578a 100644
---- a/package/kernel/mac80211/patches/ath/975-ath10k-use-tpt-trigger-by-default.patch
-+++ b/package/kernel/mac80211/patches/ath10k/975-ath10k-use-tpt-trigger-by-default.patch
-@@ -16,9 +16,9 @@ Signed-off-by: Mathias Kresin <dev@kresin.me>
- 
- --- a/drivers/net/wireless/ath/ath10k/core.h
- +++ b/drivers/net/wireless/ath/ath10k/core.h
--@@ -1290,6 +1290,10 @@ struct ath10k {
-- 	bool coex_support;
-- 	int coex_gpio_pin;
-+@@ -1312,6 +1312,10 @@ struct ath10k {
-+ 	s32 tx_power_2g_limit;
-+ 	s32 tx_power_5g_limit;
-  
- +#ifdef CPTCFG_MAC80211_LEDS
- +	const char *led_default_trigger;
-@@ -42,7 +42,7 @@ Signed-off-by: Mathias Kresin <dev@kresin.me>
-  	if (ret)
- --- a/drivers/net/wireless/ath/ath10k/mac.c
- +++ b/drivers/net/wireless/ath/ath10k/mac.c
--@@ -10075,7 +10075,7 @@ int ath10k_mac_register(struct ath10k *a
-+@@ -10212,7 +10212,7 @@ int ath10k_mac_register(struct ath10k *a
-  	ar->hw->weight_multiplier = ATH10K_AIRTIME_WEIGHT_MULTIPLIER;
-  
-  #ifdef CPTCFG_MAC80211_LEDS
-diff --git a/package/kernel/mac80211/patches/ath/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch b/package/kernel/mac80211/patches/ath10k/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch
-similarity index 93%
-rename from package/kernel/mac80211/patches/ath/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch
-rename to package/kernel/mac80211/patches/ath10k/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch
-index a149ce1216..a45addf119 100644
---- a/package/kernel/mac80211/patches/ath/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch
-+++ b/package/kernel/mac80211/patches/ath10k/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch
-@@ -28,7 +28,7 @@ Forwarded: no
- 
- --- a/drivers/net/wireless/ath/ath10k/mac.c
- +++ b/drivers/net/wireless/ath/ath10k/mac.c
--@@ -1006,6 +1006,40 @@ static inline int ath10k_vdev_setup_sync
-+@@ -1021,6 +1021,40 @@ static inline int ath10k_vdev_setup_sync
-  	return ar->last_wmi_vdev_start_status;
-  }
-  
-@@ -69,7 +69,7 @@ Forwarded: no
-  static int ath10k_monitor_vdev_start(struct ath10k *ar, int vdev_id)
-  {
-  	struct cfg80211_chan_def *chandef = NULL;
--@@ -1038,7 +1072,8 @@ static int ath10k_monitor_vdev_start(str
-+@@ -1053,7 +1087,8 @@ static int ath10k_monitor_vdev_start(str
-  	arg.channel.min_power = 0;
-  	arg.channel.max_power = channel->max_power * 2;
-  	arg.channel.max_reg_power = channel->max_reg_power * 2;
-@@ -79,7 +79,7 @@ Forwarded: no
-  
-  	reinit_completion(&ar->vdev_setup_done);
-  	reinit_completion(&ar->vdev_delete_done);
--@@ -1484,7 +1519,8 @@ static int ath10k_vdev_start_restart(str
-+@@ -1499,7 +1534,8 @@ static int ath10k_vdev_start_restart(str
-  	arg.channel.min_power = 0;
-  	arg.channel.max_power = chandef->chan->max_power * 2;
-  	arg.channel.max_reg_power = chandef->chan->max_reg_power * 2;
-@@ -89,7 +89,7 @@ Forwarded: no
-  
-  	if (arvif->vdev_type == WMI_VDEV_TYPE_AP) {
-  		arg.ssid = arvif->u.ap.ssid;
--@@ -3255,7 +3291,8 @@ static int ath10k_update_channel_list(st
-+@@ -3427,7 +3463,8 @@ static int ath10k_update_channel_list(st
-  			ch->min_power = 0;
-  			ch->max_power = channel->max_power * 2;
-  			ch->max_reg_power = channel->max_reg_power * 2;
-diff --git a/package/kernel/mac80211/patches/ath10k/984-ath10k-Try-to-get-mac-address-from-dts.patch b/package/kernel/mac80211/patches/ath10k/984-ath10k-Try-to-get-mac-address-from-dts.patch
-new file mode 100644
-index 0000000000..e14329cce8
---- /dev/null
-+++ b/package/kernel/mac80211/patches/ath10k/984-ath10k-Try-to-get-mac-address-from-dts.patch
-@@ -0,0 +1,37 @@
-+From 22fb5991a44c78ff18ec0082dc90c809356eb893 Mon Sep 17 00:00:00 2001
-+From: Ansuel Smith <ansuelsmth@gmail.com>
-+Date: Sun, 27 Sep 2020 19:23:35 +0200
-+Subject: [PATCH 1/2] ath10k: Try to get mac-address from dts
-+
-+Most of embedded device that have the ath10k wifi integrated store the
-+mac-address in nvmem partitions. Try to fetch the mac-address using the
-+standard 'of_get_mac_address' than in all the check also try to fetch the
-+address using the nvmem api searching for a defined 'mac-address' cell.
-+Mac-address defined in the dts have priority than any other address found.
-+
-+Tested-on: QCA9984 hw1.0 PCI 10.4
-+
-+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-+---
-+ drivers/net/wireless/ath/ath10k/core.c | 10 ++++++++++
-+ 1 file changed, 10 insertions(+)
-+
-+--- a/drivers/net/wireless/ath/ath10k/core.c
-++++ b/drivers/net/wireless/ath/ath10k/core.c
-+@@ -8,6 +8,7 @@
-+ #include <linux/module.h>
-+ #include <linux/firmware.h>
-+ #include <linux/of.h>
-++#include <linux/of_net.h>
-+ #include <linux/property.h>
-+ #include <linux/dmi.h>
-+ #include <linux/ctype.h>
-+@@ -3303,6 +3304,8 @@ static int ath10k_core_probe_fw(struct a
-+ 
-+ 	device_get_mac_address(ar->dev, ar->mac_addr, sizeof(ar->mac_addr));
-+ 
-++	of_get_mac_address(ar->dev->of_node, ar->mac_addr);
-++
-+ 	ret = ath10k_core_init_firmware_features(ar);
-+ 	if (ret) {
-+ 		ath10k_err(ar, "fatal problem with firmware features: %d\n",
-diff --git a/package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch b/package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch
-new file mode 100644
-index 0000000000..2f560c70a0
---- /dev/null
-+++ b/package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch
-@@ -0,0 +1,64 @@
-+--- a/drivers/net/wireless/ath/ath10k/htt.h
-++++ b/drivers/net/wireless/ath/ath10k/htt.h
-+@@ -235,7 +235,11 @@ enum htt_rx_ring_flags {
-+ };
-+ 
-+ #define HTT_RX_RING_SIZE_MIN 128
-++#ifndef CONFIG_ATH10K_SMALLBUFFERS
-+ #define HTT_RX_RING_SIZE_MAX 2048
-++#else
-++#define HTT_RX_RING_SIZE_MAX 512
-++#endif
-+ #define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX
-+ #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
-+ #define HTT_RX_RING_FILL_LEVEL_DUAL_MAC (HTT_RX_RING_SIZE - 1)
-+--- a/drivers/net/wireless/ath/ath10k/pci.c
-++++ b/drivers/net/wireless/ath/ath10k/pci.c
-+@@ -131,7 +131,11 @@ static const struct ce_attr pci_host_ce_
-+ 		.flags = CE_ATTR_FLAGS,
-+ 		.src_nentries = 0,
-+ 		.src_sz_max = 2048,
-++#ifndef CONFIG_ATH10K_SMALLBUFFERS
-+ 		.dest_nentries = 512,
-++#else
-++		.dest_nentries = 128,
-++#endif
-+ 		.recv_cb = ath10k_pci_htt_htc_rx_cb,
-+ 	},
-+ 
-+@@ -140,7 +144,11 @@ static const struct ce_attr pci_host_ce_
-+ 		.flags = CE_ATTR_FLAGS,
-+ 		.src_nentries = 0,
-+ 		.src_sz_max = 2048,
-++#ifndef CONFIG_ATH10K_SMALLBUFFERS
-+ 		.dest_nentries = 128,
-++#else
-++		.dest_nentries = 64,
-++#endif
-+ 		.recv_cb = ath10k_pci_htc_rx_cb,
-+ 	},
-+ 
-+@@ -167,7 +175,11 @@ static const struct ce_attr pci_host_ce_
-+ 		.flags = CE_ATTR_FLAGS,
-+ 		.src_nentries = 0,
-+ 		.src_sz_max = 512,
-++#ifndef CONFIG_ATH10K_SMALLBUFFERS
-+ 		.dest_nentries = 512,
-++#else
-++		.dest_nentries = 128,
-++#endif
-+ 		.recv_cb = ath10k_pci_htt_rx_cb,
-+ 	},
-+ 
-+@@ -192,7 +204,11 @@ static const struct ce_attr pci_host_ce_
-+ 		.flags = CE_ATTR_FLAGS,
-+ 		.src_nentries = 0,
-+ 		.src_sz_max = 2048,
-++#ifndef CONFIG_ATH10K_SMALLBUFFERS
-+ 		.dest_nentries = 128,
-++#else
-++		.dest_nentries = 96,
-++#endif
-+ 		.recv_cb = ath10k_pci_pktlog_rx_cb,
-+ 	},
-+ 
-diff --git a/package/kernel/mac80211/patches/ath/201-ath5k-WAR-for-AR71xx-PCI-bug.patch b/package/kernel/mac80211/patches/ath5k/201-ath5k-WAR-for-AR71xx-PCI-bug.patch
-similarity index 100%
-rename from package/kernel/mac80211/patches/ath/201-ath5k-WAR-for-AR71xx-PCI-bug.patch
-rename to package/kernel/mac80211/patches/ath5k/201-ath5k-WAR-for-AR71xx-PCI-bug.patch
-diff --git a/package/kernel/mac80211/patches/ath/411-ath5k_allow_adhoc_and_ap.patch b/package/kernel/mac80211/patches/ath5k/411-ath5k_allow_adhoc_and_ap.patch
-similarity index 89%
-rename from package/kernel/mac80211/patches/ath/411-ath5k_allow_adhoc_and_ap.patch
-rename to package/kernel/mac80211/patches/ath5k/411-ath5k_allow_adhoc_and_ap.patch
-index 9dbe047c9a..35ed6ea555 100644
---- a/package/kernel/mac80211/patches/ath/411-ath5k_allow_adhoc_and_ap.patch
-+++ b/package/kernel/mac80211/patches/ath5k/411-ath5k_allow_adhoc_and_ap.patch
-@@ -18,7 +18,7 @@
-  		goto end;
- --- a/drivers/net/wireless/ath/ath5k/base.c
- +++ b/drivers/net/wireless/ath/ath5k/base.c
--@@ -1964,7 +1964,7 @@ ath5k_beacon_send(struct ath5k_hw *ah)
-+@@ -1963,7 +1963,7 @@ ath5k_beacon_send(struct ath5k_hw *ah)
-  	}
-  
-  	if ((ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs +
-@@ -27,7 +27,7 @@
-  			ah->opmode == NL80211_IFTYPE_MESH_POINT) {
-  		u64 tsf = ath5k_hw_get_tsf64(ah);
-  		u32 tsftu = TSF_TO_TU(tsf);
--@@ -2050,7 +2050,7 @@ ath5k_beacon_update_timers(struct ath5k_
-+@@ -2049,7 +2049,7 @@ ath5k_beacon_update_timers(struct ath5k_
-  
-  	intval = ah->bintval & AR5K_BEACON_PERIOD;
-  	if (ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs
-@@ -36,7 +36,7 @@
-  		intval /= ATH_BCBUF;	/* staggered multi-bss beacons */
-  		if (intval < 15)
-  			ATH5K_WARN(ah, "intval %u is too low, min 15\n",
--@@ -2516,6 +2516,7 @@ static const struct ieee80211_iface_limi
-+@@ -2515,6 +2515,7 @@ static const struct ieee80211_iface_limi
-  				 BIT(NL80211_IFTYPE_MESH_POINT) |
-  #endif
-  				 BIT(NL80211_IFTYPE_AP) },
-diff --git a/package/kernel/mac80211/patches/ath/420-ath5k_disable_fast_cc.patch b/package/kernel/mac80211/patches/ath5k/420-ath5k_disable_fast_cc.patch
-similarity index 100%
-rename from package/kernel/mac80211/patches/ath/420-ath5k_disable_fast_cc.patch
-rename to package/kernel/mac80211/patches/ath5k/420-ath5k_disable_fast_cc.patch
-diff --git a/package/kernel/mac80211/patches/ath/430-add_ath5k_platform.patch b/package/kernel/mac80211/patches/ath5k/430-add_ath5k_platform.patch
-similarity index 100%
-rename from package/kernel/mac80211/patches/ath/430-add_ath5k_platform.patch
-rename to package/kernel/mac80211/patches/ath5k/430-add_ath5k_platform.patch
-diff --git a/package/kernel/mac80211/patches/ath/432-ath5k_add_pciids.patch b/package/kernel/mac80211/patches/ath5k/432-ath5k_add_pciids.patch
-similarity index 100%
-rename from package/kernel/mac80211/patches/ath/432-ath5k_add_pciids.patch
-rename to package/kernel/mac80211/patches/ath5k/432-ath5k_add_pciids.patch
-diff --git a/package/kernel/mac80211/patches/ath/440-ath5k_channel_bw_debugfs.patch b/package/kernel/mac80211/patches/ath5k/440-ath5k_channel_bw_debugfs.patch
-similarity index 98%
-rename from package/kernel/mac80211/patches/ath/440-ath5k_channel_bw_debugfs.patch
-rename to package/kernel/mac80211/patches/ath5k/440-ath5k_channel_bw_debugfs.patch
-index 92fb90c165..a63f0c881b 100644
---- a/package/kernel/mac80211/patches/ath/440-ath5k_channel_bw_debugfs.patch
-+++ b/package/kernel/mac80211/patches/ath5k/440-ath5k_channel_bw_debugfs.patch
-@@ -130,7 +130,7 @@ drivers/net/wireless/ath/ath5k/debug.c |   86 ++++++++++++++++++++++++++++++++
-  	/* Antenna Control */
- --- a/drivers/net/wireless/ath/ath5k/base.c
- +++ b/drivers/net/wireless/ath/ath5k/base.c
--@@ -466,6 +466,9 @@ ath5k_chan_set(struct ath5k_hw *ah, stru
-+@@ -465,6 +465,9 @@ ath5k_chan_set(struct ath5k_hw *ah, stru
-  		return -EINVAL;
-  	}
-  
-diff --git a/package/kernel/mac80211/patches/ath9k/040-ath9k-support-DT-ieee80211-freq-limit-property-to-li.patch b/package/kernel/mac80211/patches/ath9k/040-ath9k-support-DT-ieee80211-freq-limit-property-to-li.patch
-new file mode 100644
-index 0000000000..7d44681760
---- /dev/null
-+++ b/package/kernel/mac80211/patches/ath9k/040-ath9k-support-DT-ieee80211-freq-limit-property-to-li.patch
-@@ -0,0 +1,28 @@
-+From 03469e79fee9e8e908dae3bd1a80bcd9a66f2a88 Mon Sep 17 00:00:00 2001
-+From: Christian Lamparter <chunkeey@gmail.com>
-+Date: Mon, 11 Oct 2021 18:18:00 +0300
-+Subject: ath9k: support DT ieee80211-freq-limit property to limit channels
-+
-+The common DT property can be used to limit the available channels
-+but ath9k has to manually call wiphy_read_of_freq_limits().
-+
-+I would have put this into ath9k_of_init(). But it didn't work there.
-+The reason is that in ath9k_of_init() the channels and bands are not yet
-+registered in the wiphy struct. So there isn't any channel to flag as
-+disabled.
-+
-+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
-+Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
-+Link: https://lore.kernel.org/r/20211009212847.1781986-1-chunkeey@gmail.com
-+---
-+--- a/drivers/net/wireless/ath/ath9k/init.c
-++++ b/drivers/net/wireless/ath/ath9k/init.c
-+@@ -1038,6 +1038,8 @@ int ath9k_init_device(u16 devid, struct
-+ 		ARRAY_SIZE(ath9k_tpt_blink));
-+ #endif
-+ 
-++	wiphy_read_of_freq_limits(hw->wiphy);
-++
-+ 	/* Register with mac80211 */
-+ 	error = ieee80211_register_hw(hw);
-+ 	if (error)
-diff --git a/package/kernel/mac80211/patches/ath/350-ath9k_hw-reset-AHB-WMAC-interface-on-AR91xx.patch b/package/kernel/mac80211/patches/ath9k/350-ath9k_hw-reset-AHB-WMAC-interface-on-AR91xx.patch
-similarity index 89%
-rename from package/kernel/mac80211/patches/ath/350-ath9k_hw-reset-AHB-WMAC-interface-on-AR91xx.patch
-rename to package/kernel/mac80211/patches/ath9k/350-ath9k_hw-reset-AHB-WMAC-interface-on-AR91xx.patch
-index d648a3a3e5..3a0171d4a2 100644
---- a/package/kernel/mac80211/patches/ath/350-ath9k_hw-reset-AHB-WMAC-interface-on-AR91xx.patch
-+++ b/package/kernel/mac80211/patches/ath9k/350-ath9k_hw-reset-AHB-WMAC-interface-on-AR91xx.patch
-@@ -9,7 +9,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
- 
- --- a/drivers/net/wireless/ath/ath9k/hw.c
- +++ b/drivers/net/wireless/ath/ath9k/hw.c
--@@ -1435,8 +1435,12 @@ static bool ath9k_hw_set_reset(struct at
-+@@ -1434,8 +1434,12 @@ static bool ath9k_hw_set_reset(struct at
-  	if (!AR_SREV_9100(ah))
-  		REG_WRITE(ah, AR_RC, 0);
-  
-diff --git a/package/kernel/mac80211/patches/ath/351-ath9k_hw-issue-external-reset-for-QCA955x.patch b/package/kernel/mac80211/patches/ath9k/351-ath9k_hw-issue-external-reset-for-QCA955x.patch
-similarity index 95%
-rename from package/kernel/mac80211/patches/ath/351-ath9k_hw-issue-external-reset-for-QCA955x.patch
-rename to package/kernel/mac80211/patches/ath9k/351-ath9k_hw-issue-external-reset-for-QCA955x.patch
-index 5f265b84c2..53b7ba08bc 100644
---- a/package/kernel/mac80211/patches/ath/351-ath9k_hw-issue-external-reset-for-QCA955x.patch
-+++ b/package/kernel/mac80211/patches/ath9k/351-ath9k_hw-issue-external-reset-for-QCA955x.patch
-@@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
- 
- --- a/drivers/net/wireless/ath/ath9k/hw.c
- +++ b/drivers/net/wireless/ath/ath9k/hw.c
--@@ -1312,39 +1312,56 @@ void ath9k_hw_get_delta_slope_vals(struc
-+@@ -1311,39 +1311,56 @@ void ath9k_hw_get_delta_slope_vals(struc
-  	*coef_exponent = coef_exp - 16;
-  }
-  
-@@ -94,7 +94,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
-  	return true;
-  }
-  
--@@ -1397,24 +1414,24 @@ static bool ath9k_hw_set_reset(struct at
-+@@ -1396,24 +1413,24 @@ static bool ath9k_hw_set_reset(struct at
-  			rst_flags |= AR_RTC_RC_MAC_COLD;
-  	}
-  
-diff --git a/package/kernel/mac80211/patches/ath/354-ath9k-force-rx_clear-when-disabling-rx.patch b/package/kernel/mac80211/patches/ath9k/354-ath9k-force-rx_clear-when-disabling-rx.patch
-similarity index 100%
-rename from package/kernel/mac80211/patches/ath/354-ath9k-force-rx_clear-when-disabling-rx.patch
-rename to package/kernel/mac80211/patches/ath9k/354-ath9k-force-rx_clear-when-disabling-rx.patch
-diff --git a/package/kernel/mac80211/patches/ath/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch b/package/kernel/mac80211/patches/ath9k/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch
-similarity index 89%
-rename from package/kernel/mac80211/patches/ath/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch
-rename to package/kernel/mac80211/patches/ath9k/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch
-index 406d03e2fe..385eea0116 100644
---- a/package/kernel/mac80211/patches/ath/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch
-+++ b/package/kernel/mac80211/patches/ath9k/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch
-@@ -8,7 +8,7 @@ This reverts commit 71f5137bf010c6faffab50c0ec15374c59c4a411.
- 
- --- a/drivers/net/wireless/ath/ath9k/hw.c
- +++ b/drivers/net/wireless/ath/ath9k/hw.c
--@@ -2979,7 +2979,8 @@ void ath9k_hw_apply_txpower(struct ath_h
-+@@ -2977,7 +2977,8 @@ void ath9k_hw_apply_txpower(struct ath_h
-  {
-  	struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
-  	struct ieee80211_channel *channel;
-@@ -18,7 +18,7 @@ This reverts commit 71f5137bf010c6faffab50c0ec15374c59c4a411.
-  	u16 ctl = NO_CTL;
-  
-  	if (!chan)
--@@ -2991,9 +2992,14 @@ void ath9k_hw_apply_txpower(struct ath_h
-+@@ -2989,9 +2990,14 @@ void ath9k_hw_apply_txpower(struct ath_h
-  	channel = chan->chan;
-  	chan_pwr = min_t(int, channel->max_power * 2, MAX_COMBINED_POWER);
-  	new_pwr = min_t(int, chan_pwr, reg->power_limit);
-diff --git a/package/kernel/mac80211/patches/ath/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch b/package/kernel/mac80211/patches/ath9k/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch
-similarity index 91%
-rename from package/kernel/mac80211/patches/ath/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch
-rename to package/kernel/mac80211/patches/ath9k/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch
-index 12cbd27e1a..0c3edc1260 100644
---- a/package/kernel/mac80211/patches/ath/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch
-+++ b/package/kernel/mac80211/patches/ath9k/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch
-@@ -11,7 +11,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
- 
- --- a/drivers/net/wireless/ath/ath9k/hw.c
- +++ b/drivers/net/wireless/ath/ath9k/hw.c
--@@ -2998,6 +2998,10 @@ void ath9k_hw_apply_txpower(struct ath_h
-+@@ -2996,6 +2996,10 @@ void ath9k_hw_apply_txpower(struct ath_h
-  	if (ant_gain > max_gain)
-  		ant_reduction = ant_gain - max_gain;
-  
-diff --git a/package/kernel/mac80211/patches/ath/401-ath9k_blink_default.patch b/package/kernel/mac80211/patches/ath9k/401-ath9k_blink_default.patch
-similarity index 88%
-rename from package/kernel/mac80211/patches/ath/401-ath9k_blink_default.patch
-rename to package/kernel/mac80211/patches/ath9k/401-ath9k_blink_default.patch
-index 3eb57bb1cf..7405e594fe 100644
---- a/package/kernel/mac80211/patches/ath/401-ath9k_blink_default.patch
-+++ b/package/kernel/mac80211/patches/ath9k/401-ath9k_blink_default.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/ath/ath9k/init.c
- +++ b/drivers/net/wireless/ath/ath9k/init.c
--@@ -48,7 +48,7 @@ int ath9k_modparam_nohwcrypt;
-+@@ -47,7 +47,7 @@ int ath9k_modparam_nohwcrypt;
-  module_param_named(nohwcrypt, ath9k_modparam_nohwcrypt, int, 0444);
-  MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
-  
-diff --git a/package/kernel/mac80211/patches/ath/410-ath9k_allow_adhoc_and_ap.patch b/package/kernel/mac80211/patches/ath9k/410-ath9k_allow_adhoc_and_ap.patch
-similarity index 73%
-rename from package/kernel/mac80211/patches/ath/410-ath9k_allow_adhoc_and_ap.patch
-rename to package/kernel/mac80211/patches/ath9k/410-ath9k_allow_adhoc_and_ap.patch
-index 17dd8f6597..b355e8372f 100644
---- a/package/kernel/mac80211/patches/ath/410-ath9k_allow_adhoc_and_ap.patch
-+++ b/package/kernel/mac80211/patches/ath9k/410-ath9k_allow_adhoc_and_ap.patch
-@@ -1,10 +1,10 @@
- --- a/drivers/net/wireless/ath/ath9k/init.c
- +++ b/drivers/net/wireless/ath/ath9k/init.c
--@@ -830,6 +830,7 @@ static const struct ieee80211_iface_limi
-+@@ -826,6 +826,7 @@ static const struct ieee80211_iface_limi
-  				 BIT(NL80211_IFTYPE_AP) },
-  	{ .max = 1,	.types = BIT(NL80211_IFTYPE_P2P_CLIENT) |
-  				 BIT(NL80211_IFTYPE_P2P_GO) },
- +	{ .max = 1,	.types = BIT(NL80211_IFTYPE_ADHOC) },
-  };
-  
-- #ifdef CPTCFG_WIRELESS_WDS
-+ #ifdef CPTCFG_ATH9K_CHANNEL_CONTEXT
-diff --git a/package/kernel/mac80211/patches/ath/450-ath9k-enabled-MFP-capability-unconditionally.patch b/package/kernel/mac80211/patches/ath9k/450-ath9k-enabled-MFP-capability-unconditionally.patch
-similarity index 90%
-rename from package/kernel/mac80211/patches/ath/450-ath9k-enabled-MFP-capability-unconditionally.patch
-rename to package/kernel/mac80211/patches/ath9k/450-ath9k-enabled-MFP-capability-unconditionally.patch
-index ea94b52385..284c88ff49 100644
---- a/package/kernel/mac80211/patches/ath/450-ath9k-enabled-MFP-capability-unconditionally.patch
-+++ b/package/kernel/mac80211/patches/ath9k/450-ath9k-enabled-MFP-capability-unconditionally.patch
-@@ -14,7 +14,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
- 
- --- a/drivers/net/wireless/ath/ath9k/init.c
- +++ b/drivers/net/wireless/ath/ath9k/init.c
--@@ -927,6 +927,7 @@ static void ath9k_set_hw_capab(struct at
-+@@ -907,6 +907,7 @@ static void ath9k_set_hw_capab(struct at
-  	ieee80211_hw_set(hw, HOST_BROADCAST_PS_BUFFERING);
-  	ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
-  	ieee80211_hw_set(hw, SUPPORTS_CLONED_SKBS);
-@@ -22,7 +22,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
-  
-  	if (ath9k_ps_enable)
-  		ieee80211_hw_set(hw, SUPPORTS_PS);
--@@ -939,9 +940,6 @@ static void ath9k_set_hw_capab(struct at
-+@@ -919,9 +920,6 @@ static void ath9k_set_hw_capab(struct at
-  				IEEE80211_RADIOTAP_MCS_HAVE_STBC;
-  	}
-  
-diff --git a/package/kernel/mac80211/patches/ath/500-ath9k_eeprom_debugfs.patch b/package/kernel/mac80211/patches/ath9k/500-ath9k_eeprom_debugfs.patch
-similarity index 100%
-rename from package/kernel/mac80211/patches/ath/500-ath9k_eeprom_debugfs.patch
-rename to package/kernel/mac80211/patches/ath9k/500-ath9k_eeprom_debugfs.patch
-diff --git a/package/kernel/mac80211/patches/ath/501-ath9k_ahb_init.patch b/package/kernel/mac80211/patches/ath9k/501-ath9k_ahb_init.patch
-similarity index 91%
-rename from package/kernel/mac80211/patches/ath/501-ath9k_ahb_init.patch
-rename to package/kernel/mac80211/patches/ath9k/501-ath9k_ahb_init.patch
-index b9c784eb25..6ab7972b55 100644
---- a/package/kernel/mac80211/patches/ath/501-ath9k_ahb_init.patch
-+++ b/package/kernel/mac80211/patches/ath9k/501-ath9k_ahb_init.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/ath/ath9k/init.c
- +++ b/drivers/net/wireless/ath/ath9k/init.c
--@@ -1143,25 +1143,25 @@ static int __init ath9k_init(void)
-+@@ -1122,25 +1122,25 @@ static int __init ath9k_init(void)
-  {
-  	int error;
-  
-diff --git a/package/kernel/mac80211/patches/ath/510-ath9k_intr_mitigation_tweak.patch b/package/kernel/mac80211/patches/ath9k/510-ath9k_intr_mitigation_tweak.patch
-similarity index 87%
-rename from package/kernel/mac80211/patches/ath/510-ath9k_intr_mitigation_tweak.patch
-rename to package/kernel/mac80211/patches/ath9k/510-ath9k_intr_mitigation_tweak.patch
-index 75b48b480e..fda050a8f2 100644
---- a/package/kernel/mac80211/patches/ath/510-ath9k_intr_mitigation_tweak.patch
-+++ b/package/kernel/mac80211/patches/ath9k/510-ath9k_intr_mitigation_tweak.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/ath/ath9k/hw.c
- +++ b/drivers/net/wireless/ath/ath9k/hw.c
--@@ -403,13 +403,8 @@ static void ath9k_hw_init_config(struct
-+@@ -402,13 +402,8 @@ static void ath9k_hw_init_config(struct
-  
-  	ah->config.rx_intr_mitigation = true;
-  
-diff --git a/package/kernel/mac80211/patches/ath/511-ath9k_reduce_rxbuf.patch b/package/kernel/mac80211/patches/ath9k/511-ath9k_reduce_rxbuf.patch
-similarity index 100%
-rename from package/kernel/mac80211/patches/ath/511-ath9k_reduce_rxbuf.patch
-rename to package/kernel/mac80211/patches/ath9k/511-ath9k_reduce_rxbuf.patch
-diff --git a/package/kernel/mac80211/patches/ath/512-ath9k_channelbw_debugfs.patch b/package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch
-similarity index 100%
-rename from package/kernel/mac80211/patches/ath/512-ath9k_channelbw_debugfs.patch
-rename to package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch
-diff --git a/package/kernel/mac80211/patches/ath/513-ath9k_add_pci_ids.patch b/package/kernel/mac80211/patches/ath9k/513-ath9k_add_pci_ids.patch
-similarity index 93%
-rename from package/kernel/mac80211/patches/ath/513-ath9k_add_pci_ids.patch
-rename to package/kernel/mac80211/patches/ath9k/513-ath9k_add_pci_ids.patch
-index 113c35625f..a085e3a1fb 100644
---- a/package/kernel/mac80211/patches/ath/513-ath9k_add_pci_ids.patch
-+++ b/package/kernel/mac80211/patches/ath9k/513-ath9k_add_pci_ids.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/ath/ath9k/hw.c
- +++ b/drivers/net/wireless/ath/ath9k/hw.c
--@@ -663,6 +663,7 @@ int ath9k_hw_init(struct ath_hw *ah)
-+@@ -662,6 +662,7 @@ int ath9k_hw_init(struct ath_hw *ah)
-  
-  	/* These are all the AR5008/AR9001/AR9002/AR9003 hardware family of chipsets */
-  	switch (ah->hw_version.devid) {
-diff --git a/package/kernel/mac80211/patches/ath/530-ath9k_extra_leds.patch b/package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch
-similarity index 96%
-rename from package/kernel/mac80211/patches/ath/530-ath9k_extra_leds.patch
-rename to package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch
-index 5fd5c73a2f..c161237827 100644
---- a/package/kernel/mac80211/patches/ath/530-ath9k_extra_leds.patch
-+++ b/package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/ath/ath9k/ath9k.h
- +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
--@@ -844,6 +844,9 @@ static inline int ath9k_dump_btcoex(stru
-+@@ -843,6 +843,9 @@ static inline int ath9k_dump_btcoex(stru
-  #ifdef CPTCFG_MAC80211_LEDS
-  void ath_init_leds(struct ath_softc *sc);
-  void ath_deinit_leds(struct ath_softc *sc);
-@@ -10,7 +10,7 @@
-  #else
-  static inline void ath_init_leds(struct ath_softc *sc)
-  {
--@@ -980,6 +983,13 @@ void ath_ant_comb_scan(struct ath_softc
-+@@ -979,6 +982,13 @@ void ath_ant_comb_scan(struct ath_softc
-  
-  #define ATH9K_NUM_CHANCTX  2 /* supports 2 operating channels */
-  
-@@ -24,7 +24,7 @@
-  struct ath_softc {
-  	struct ieee80211_hw *hw;
-  	struct device *dev;
--@@ -1033,9 +1043,8 @@ struct ath_softc {
-+@@ -1032,9 +1042,8 @@ struct ath_softc {
-  	spinlock_t chan_lock;
-  
-  #ifdef CPTCFG_MAC80211_LEDS
-@@ -181,7 +181,7 @@
-  
- --- a/drivers/net/wireless/ath/ath9k/init.c
- +++ b/drivers/net/wireless/ath/ath9k/init.c
--@@ -1055,7 +1055,7 @@ int ath9k_init_device(u16 devid, struct
-+@@ -1032,7 +1032,7 @@ int ath9k_init_device(u16 devid, struct
-  
-  #ifdef CPTCFG_MAC80211_LEDS
-  	/* must be initialized before ieee80211_register_hw */
-diff --git a/package/kernel/mac80211/patches/ath/531-ath9k_extra_platform_leds.patch b/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch
-similarity index 100%
-rename from package/kernel/mac80211/patches/ath/531-ath9k_extra_platform_leds.patch
-rename to package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch
-diff --git a/package/kernel/mac80211/patches/ath/540-ath9k_reduce_ani_interval.patch b/package/kernel/mac80211/patches/ath9k/540-ath9k_reduce_ani_interval.patch
-similarity index 100%
-rename from package/kernel/mac80211/patches/ath/540-ath9k_reduce_ani_interval.patch
-rename to package/kernel/mac80211/patches/ath9k/540-ath9k_reduce_ani_interval.patch
-diff --git a/package/kernel/mac80211/patches/ath/542-ath9k_debugfs_diag.patch b/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch
-similarity index 93%
-rename from package/kernel/mac80211/patches/ath/542-ath9k_debugfs_diag.patch
-rename to package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch
-index 0e75b86cbf..5b64f560fd 100644
---- a/package/kernel/mac80211/patches/ath/542-ath9k_debugfs_diag.patch
-+++ b/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch
-@@ -94,7 +94,7 @@
-  struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,
- --- a/drivers/net/wireless/ath/ath9k/hw.c
- +++ b/drivers/net/wireless/ath/ath9k/hw.c
--@@ -1882,6 +1882,20 @@ u32 ath9k_hw_get_tsf_offset(struct times
-+@@ -1881,6 +1881,20 @@ u32 ath9k_hw_get_tsf_offset(struct times
-  }
-  EXPORT_SYMBOL(ath9k_hw_get_tsf_offset);
-  
-@@ -115,7 +115,7 @@
-  int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
-  		   struct ath9k_hw_cal_data *caldata, bool fastcc)
-  {
--@@ -2090,6 +2104,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
-+@@ -2089,6 +2103,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
-  		ar9003_hw_disable_phy_restart(ah);
-  
-  	ath9k_hw_apply_gpio_override(ah);
-@@ -125,9 +125,9 @@
-  		REG_SET_BIT(ah, AR_BTCOEX_WL_LNADIV, AR_BTCOEX_WL_LNADIV_FORCE_ON);
- --- a/drivers/net/wireless/ath/ath9k/main.c
- +++ b/drivers/net/wireless/ath/ath9k/main.c
--@@ -536,6 +536,11 @@ irqreturn_t ath_isr(int irq, void *dev)
-- 	if (test_bit(ATH_OP_HW_RESET, &common->op_flags))
-+@@ -538,6 +538,11 @@ irqreturn_t ath_isr(int irq, void *dev)
-  		return IRQ_HANDLED;
-+ 	}
-  
- +	if (test_bit(ATH_DIAG_TRIGGER_ERROR, &ah->diag)) {
- +		status |= ATH9K_INT_FATAL;
-diff --git a/package/kernel/mac80211/patches/ath/543-ath9k_entropy_from_adc.patch b/package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch
-similarity index 94%
-rename from package/kernel/mac80211/patches/ath/543-ath9k_entropy_from_adc.patch
-rename to package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch
-index 0d938a3730..ef4e659870 100644
---- a/package/kernel/mac80211/patches/ath/543-ath9k_entropy_from_adc.patch
-+++ b/package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch
-@@ -55,7 +55,7 @@
-  	ops->spectral_scan_config = ar9003_hw_spectral_scan_config;
- --- a/drivers/net/wireless/ath/ath9k/init.c
- +++ b/drivers/net/wireless/ath/ath9k/init.c
--@@ -818,7 +818,8 @@ static void ath9k_init_txpower_limits(st
-+@@ -814,7 +814,8 @@ static void ath9k_init_txpower_limits(st
-  	if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
-  		ath9k_init_band_txpower(sc, NL80211_BAND_5GHZ);
-  
-@@ -65,7 +65,7 @@
-  }
-  
-  static const struct ieee80211_iface_limit if_limits[] = {
--@@ -1015,6 +1016,18 @@ static void ath9k_set_hw_capab(struct at
-+@@ -992,6 +993,18 @@ static void ath9k_set_hw_capab(struct at
-  	wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
-  }
-  
-@@ -84,9 +84,9 @@
-  int ath9k_init_device(u16 devid, struct ath_softc *sc,
-  		    const struct ath_bus_ops *bus_ops)
-  {
--@@ -1060,6 +1073,8 @@ int ath9k_init_device(u16 devid, struct
-- 		ARRAY_SIZE(ath9k_tpt_blink));
-- #endif
-+@@ -1039,6 +1052,8 @@ int ath9k_init_device(u16 devid, struct
-+ 
-+ 	wiphy_read_of_freq_limits(hw->wiphy);
-  
- +	ath_get_initial_entropy(sc);
- +
-@@ -110,7 +110,7 @@
-  static inline void ath9k_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable)
- --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
- +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
--@@ -1349,9 +1349,30 @@ void ar5008_hw_init_rate_txpower(struct
-+@@ -1340,9 +1340,30 @@ void ar5008_hw_init_rate_txpower(struct
-  	}
-  }
-  
-@@ -141,7 +141,7 @@
-  	static const u32 ar5416_cca_regs[6] = {
-  		AR_PHY_CCA,
-  		AR_PHY_CH1_CCA,
--@@ -1366,6 +1387,8 @@ int ar5008_hw_attach_phy_ops(struct ath_
-+@@ -1357,6 +1378,8 @@ int ar5008_hw_attach_phy_ops(struct ath_
-  	if (ret)
-  	    return ret;
-  
-diff --git a/package/kernel/mac80211/patches/ath/544-ath9k-ar933x-usb-hang-workaround.patch b/package/kernel/mac80211/patches/ath9k/544-ath9k-ar933x-usb-hang-workaround.patch
-similarity index 84%
-rename from package/kernel/mac80211/patches/ath/544-ath9k-ar933x-usb-hang-workaround.patch
-rename to package/kernel/mac80211/patches/ath9k/544-ath9k-ar933x-usb-hang-workaround.patch
-index 2d2b837072..23a81864fa 100644
---- a/package/kernel/mac80211/patches/ath/544-ath9k-ar933x-usb-hang-workaround.patch
-+++ b/package/kernel/mac80211/patches/ath9k/544-ath9k-ar933x-usb-hang-workaround.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/ath/ath9k/hw.c
- +++ b/drivers/net/wireless/ath/ath9k/hw.c
--@@ -248,6 +248,19 @@ void ath9k_hw_get_channel_centers(struct
-+@@ -247,6 +247,19 @@ void ath9k_hw_get_channel_centers(struct
-  		centers->synth_center + (extoff * HT40_CHANNEL_CENTER_SHIFT);
-  }
-  
-@@ -20,7 +20,7 @@
-  /******************/
-  /* Chip Revisions */
-  /******************/
--@@ -1455,6 +1468,9 @@ static bool ath9k_hw_set_reset(struct at
-+@@ -1454,6 +1467,9 @@ static bool ath9k_hw_set_reset(struct at
-  		udelay(50);
-  	}
-  
-@@ -30,7 +30,7 @@
-  	return true;
-  }
-  
--@@ -1554,6 +1570,9 @@ static bool ath9k_hw_chip_reset(struct a
-+@@ -1553,6 +1569,9 @@ static bool ath9k_hw_chip_reset(struct a
-  		ar9003_hw_internal_regulator_apply(ah);
-  	ath9k_hw_init_pll(ah, chan);
-  
-@@ -40,7 +40,7 @@
-  	return true;
-  }
-  
--@@ -1860,8 +1879,14 @@ static int ath9k_hw_do_fastcc(struct ath
-+@@ -1859,8 +1878,14 @@ static int ath9k_hw_do_fastcc(struct ath
-  	if (AR_SREV_9271(ah))
-  		ar9002_hw_load_ani_reg(ah, chan);
-  
-@@ -55,7 +55,7 @@
-  	return -EINVAL;
-  }
-  
--@@ -2115,6 +2140,9 @@ int ath9k_hw_reset(struct ath_hw *ah, st
-+@@ -2114,6 +2139,9 @@ int ath9k_hw_reset(struct ath_hw *ah, st
-  		ath9k_hw_set_radar_params(ah);
-  	}
-  
-diff --git a/package/kernel/mac80211/patches/ath/545-ath9k_ani_ws_detect.patch b/package/kernel/mac80211/patches/ath9k/545-ath9k_ani_ws_detect.patch
-similarity index 98%
-rename from package/kernel/mac80211/patches/ath/545-ath9k_ani_ws_detect.patch
-rename to package/kernel/mac80211/patches/ath9k/545-ath9k_ani_ws_detect.patch
-index 466767adb9..854bb3659a 100644
---- a/package/kernel/mac80211/patches/ath/545-ath9k_ani_ws_detect.patch
-+++ b/package/kernel/mac80211/patches/ath9k/545-ath9k_ani_ws_detect.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
- +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
--@@ -978,55 +978,6 @@ static bool ar5008_hw_ani_control_new(st
-+@@ -969,55 +969,6 @@ static bool ar5008_hw_ani_control_new(st
-  		 * on == 0 means more noise imm
-  		 */
-  		u32 on = param ? 1 : 0;
-diff --git a/package/kernel/mac80211/patches/ath/547-ath9k_led_defstate_fix.patch b/package/kernel/mac80211/patches/ath9k/547-ath9k_led_defstate_fix.patch
-similarity index 100%
-rename from package/kernel/mac80211/patches/ath/547-ath9k_led_defstate_fix.patch
-rename to package/kernel/mac80211/patches/ath9k/547-ath9k_led_defstate_fix.patch
-diff --git a/package/kernel/mac80211/patches/ath/548-ath9k_enable_gpio_chip.patch b/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch
-similarity index 98%
-rename from package/kernel/mac80211/patches/ath/548-ath9k_enable_gpio_chip.patch
-rename to package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch
-index 88198a4562..78206d2860 100644
---- a/package/kernel/mac80211/patches/ath/548-ath9k_enable_gpio_chip.patch
-+++ b/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch
-@@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
-  
-  #include "common.h"
-  #include "debug.h"
--@@ -990,6 +991,14 @@ struct ath_led {
-+@@ -989,6 +990,14 @@ struct ath_led {
-  	struct led_classdev cdev;
-  };
-  
-@@ -33,7 +33,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
-  struct ath_softc {
-  	struct ieee80211_hw *hw;
-  	struct device *dev;
--@@ -1045,6 +1054,9 @@ struct ath_softc {
-+@@ -1044,6 +1053,9 @@ struct ath_softc {
-  #ifdef CPTCFG_MAC80211_LEDS
-  	const char *led_default_trigger;
-  	struct list_head leds;
-diff --git a/package/kernel/mac80211/patches/ath/549-ath9k_enable_gpio_buttons.patch b/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
-similarity index 98%
-rename from package/kernel/mac80211/patches/ath/549-ath9k_enable_gpio_buttons.patch
-rename to package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
-index 83076b8ae4..716e09f351 100644
---- a/package/kernel/mac80211/patches/ath/549-ath9k_enable_gpio_buttons.patch
-+++ b/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
-@@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
- ---
- --- a/drivers/net/wireless/ath/ath9k/ath9k.h
- +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
--@@ -1056,6 +1056,7 @@ struct ath_softc {
-+@@ -1055,6 +1055,7 @@ struct ath_softc {
-  	struct list_head leds;
-  #ifdef CONFIG_GPIOLIB
-  	struct ath9k_gpio_chip *gpiochip;
-diff --git a/package/kernel/mac80211/patches/ath/551-ath9k_ubnt_uap_plus_hsr.patch b/package/kernel/mac80211/patches/ath9k/551-ath9k_ubnt_uap_plus_hsr.patch
-similarity index 98%
-rename from package/kernel/mac80211/patches/ath/551-ath9k_ubnt_uap_plus_hsr.patch
-rename to package/kernel/mac80211/patches/ath9k/551-ath9k_ubnt_uap_plus_hsr.patch
-index c98222781d..cb6374feb0 100644
---- a/package/kernel/mac80211/patches/ath/551-ath9k_ubnt_uap_plus_hsr.patch
-+++ b/package/kernel/mac80211/patches/ath9k/551-ath9k_ubnt_uap_plus_hsr.patch
-@@ -339,7 +339,7 @@
-  
-  static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
-  			u32 queues, bool drop);
--@@ -657,6 +658,7 @@ void ath_reset_work(struct work_struct *
-+@@ -659,6 +660,7 @@ void ath_reset_work(struct work_struct *
-  static int ath9k_start(struct ieee80211_hw *hw)
-  {
-  	struct ath_softc *sc = hw->priv;
-@@ -347,7 +347,7 @@
-  	struct ath_hw *ah = sc->sc_ah;
-  	struct ath_common *common = ath9k_hw_common(ah);
-  	struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
--@@ -735,6 +737,11 @@ static int ath9k_start(struct ieee80211_
-+@@ -737,6 +739,11 @@ static int ath9k_start(struct ieee80211_
-  					  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
-  	}
-  
-@@ -371,7 +371,7 @@
-  
- --- a/local-symbols
- +++ b/local-symbols
--@@ -112,6 +112,7 @@ ATH9K_WOW=
-+@@ -103,6 +103,7 @@ ATH9K_WOW=
-  ATH9K_RFKILL=
-  ATH9K_CHANNEL_CONTEXT=
-  ATH9K_PCOEM=
-diff --git a/package/kernel/mac80211/patches/ath/552-ahb_of.patch b/package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch
-similarity index 93%
-rename from package/kernel/mac80211/patches/ath/552-ahb_of.patch
-rename to package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch
-index 8fd6e4409b..7ce8bc5b82 100644
---- a/package/kernel/mac80211/patches/ath/552-ahb_of.patch
-+++ b/package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch
-@@ -16,7 +16,7 @@
-  
-  static const struct platform_device_id ath9k_platform_id_table[] = {
-  	{
--@@ -69,6 +77,242 @@ static const struct ath_bus_ops ath_ahb_
-+@@ -69,6 +77,236 @@ static const struct ath_bus_ops ath_ahb_
-  	.eeprom_read = ath_ahb_eeprom_read,
-  };
-  
-@@ -218,12 +218,6 @@
- +	else
- +		pdata->led_pin = -1;
- +
--+	if (of_property_read_bool(pdev->dev.of_node, "qca,disable-2ghz"))
--+		pdata->disable_2ghz = true;
--+
--+	if (of_property_read_bool(pdev->dev.of_node, "qca,disable-5ghz"))
--+		pdata->disable_5ghz = true;
--+
- +	if (of_property_read_bool(pdev->dev.of_node, "qca,tx-gain-buffalo"))
- +		pdata->tx_gain_buffalo = true;
- +
-@@ -259,7 +253,7 @@
-  static int ath_ahb_probe(struct platform_device *pdev)
-  {
-  	void __iomem *mem;
--@@ -80,6 +324,17 @@ static int ath_ahb_probe(struct platform
-+@@ -80,6 +318,17 @@ static int ath_ahb_probe(struct platform
-  	int ret = 0;
-  	struct ath_hw *ah;
-  	char hw_name[64];
-@@ -277,7 +271,7 @@
-  
-  	if (!dev_get_platdata(&pdev->dev)) {
-  		dev_err(&pdev->dev, "no platform data specified\n");
--@@ -122,13 +377,16 @@ static int ath_ahb_probe(struct platform
-+@@ -122,13 +371,16 @@ static int ath_ahb_probe(struct platform
-  	sc->mem = mem;
-  	sc->irq = irq;
-  
-@@ -295,7 +289,7 @@
-  	if (ret) {
-  		dev_err(&pdev->dev, "failed to initialize device\n");
-  		goto err_irq;
--@@ -159,6 +417,9 @@ static int ath_ahb_remove(struct platfor
-+@@ -159,6 +411,9 @@ static int ath_ahb_remove(struct platfor
-  		free_irq(sc->irq, sc);
-  		ieee80211_free_hw(sc->hw);
-  	}
-@@ -305,7 +299,7 @@
-  
-  	return 0;
-  }
--@@ -168,6 +429,9 @@ static struct platform_driver ath_ahb_dr
-+@@ -168,6 +423,9 @@ static struct platform_driver ath_ahb_dr
-  	.remove     = ath_ahb_remove,
-  	.driver		= {
-  		.name	= "ath9k",
-@@ -325,7 +319,7 @@
-  
-  #include "common.h"
-  #include "debug.h"
--@@ -1012,6 +1013,9 @@ struct ath_softc {
-+@@ -1011,6 +1012,9 @@ struct ath_softc {
-  	struct ath_hw *sc_ah;
-  	void __iomem *mem;
-  	int irq;
-diff --git a/package/kernel/mac80211/patches/ath/553-ath9k_of_gpio_mask.patch b/package/kernel/mac80211/patches/ath9k/553-ath9k_of_gpio_mask.patch
-similarity index 80%
-rename from package/kernel/mac80211/patches/ath/553-ath9k_of_gpio_mask.patch
-rename to package/kernel/mac80211/patches/ath9k/553-ath9k_of_gpio_mask.patch
-index 8e0041e3ef..80e0dc4c5e 100644
---- a/package/kernel/mac80211/patches/ath/553-ath9k_of_gpio_mask.patch
-+++ b/package/kernel/mac80211/patches/ath9k/553-ath9k_of_gpio_mask.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/ath/ath9k/init.c
- +++ b/drivers/net/wireless/ath/ath9k/init.c
--@@ -654,6 +654,12 @@ static int ath9k_of_init(struct ath_soft
-+@@ -644,6 +644,12 @@ static int ath9k_of_init(struct ath_soft
-  	return 0;
-  }
-  
-@@ -13,7 +13,7 @@
-  static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
-  			    const struct ath_bus_ops *bus_ops)
-  {
--@@ -757,6 +763,9 @@ static int ath9k_init_softc(u16 devid, s
-+@@ -747,6 +753,9 @@ static int ath9k_init_softc(u16 devid, s
-  	if (ret)
-  		goto err_hw;
-  
-diff --git a/package/kernel/mac80211/patches/ath9k/600-v5.16-ath9k-fetch-calibration-data-via-nvmem-subsystem.patch b/package/kernel/mac80211/patches/ath9k/600-v5.16-ath9k-fetch-calibration-data-via-nvmem-subsystem.patch
-new file mode 100644
-index 0000000000..a250d2318e
---- /dev/null
-+++ b/package/kernel/mac80211/patches/ath9k/600-v5.16-ath9k-fetch-calibration-data-via-nvmem-subsystem.patch
-@@ -0,0 +1,154 @@
-+From dab16ef495dbb3cabb355b6c80f0771a4a25e35d Mon Sep 17 00:00:00 2001
-+From: Christian Lamparter <chunkeey@gmail.com>
-+Date: Fri, 20 Aug 2021 22:44:52 +0200
-+Subject: [PATCH] ath9k: fetch calibration data via nvmem subsystem
-+
-+On most embedded ath9k devices (like range extenders,
-+routers, accesspoints, ...) the calibration data is
-+stored in a MTD partitions named "ART", or "caldata"/
-+"calibration".
-+
-+Ever since commit
-+4b361cfa8624 ("mtd: core: add OTP nvmem provider support")
-+all MTD partitions are all automatically available through
-+the nvmem subsystem. This allows drivers like ath9k to read
-+the necessary data without needing any userspace helpers
-+that would do this extraction.
-+
-+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
-+---
-+
-+includes:
-+
-+From 57671351379b2051cfb07fc14e0bead9916a0880 Mon Sep 17 00:00:00 2001
-+From: Dan Carpenter <dan.carpenter@oracle.com>
-+Date: Mon, 11 Oct 2021 18:18:01 +0300
-+Subject: ath9k: fix an IS_ERR() vs NULL check
-+
-+The devm_kmemdup() function doesn't return error pointers, it returns
-+NULL on error.
-+
-+Fixes: eb3a97a69be8 ("ath9k: fetch calibration data via nvmem subsystem")
-+Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-+Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
-+Link: https://lore.kernel.org/r/20211011123533.GA15188@kili
-+
-+---
-+
-+--- a/drivers/net/wireless/ath/ath9k/eeprom.c
-++++ b/drivers/net/wireless/ath/ath9k/eeprom.c
-+@@ -135,13 +135,23 @@ static bool ath9k_hw_nvram_read_firmware
-+ 					 offset, data);
-+ }
-+ 
-++static bool ath9k_hw_nvram_read_nvmem(struct ath_hw *ah, off_t offset,
-++				      u16 *data)
-++{
-++	return ath9k_hw_nvram_read_array(ah->nvmem_blob,
-++					 ah->nvmem_blob_len / sizeof(u16),
-++					 offset, data);
-++}
-++
-+ bool ath9k_hw_nvram_read(struct ath_hw *ah, u32 off, u16 *data)
-+ {
-+ 	struct ath_common *common = ath9k_hw_common(ah);
-+ 	struct ath9k_platform_data *pdata = ah->dev->platform_data;
-+ 	bool ret;
-+ 
-+-	if (ah->eeprom_blob)
-++	if (ah->nvmem_blob)
-++		ret = ath9k_hw_nvram_read_nvmem(ah, off, data);
-++	else if (ah->eeprom_blob)
-+ 		ret = ath9k_hw_nvram_read_firmware(ah->eeprom_blob, off, data);
-+ 	else if (pdata && !pdata->use_eeprom)
-+ 		ret = ath9k_hw_nvram_read_pdata(pdata, off, data);
-+--- a/drivers/net/wireless/ath/ath9k/hw.h
-++++ b/drivers/net/wireless/ath/ath9k/hw.h
-+@@ -988,6 +988,8 @@ struct ath_hw {
-+ 	bool disable_5ghz;
-+ 
-+ 	const struct firmware *eeprom_blob;
-++	u16 *nvmem_blob;	/* devres managed */
-++	size_t nvmem_blob_len;
-+ 
-+ 	struct ath_dynack dynack;
-+ 
-+--- a/drivers/net/wireless/ath/ath9k/init.c
-++++ b/drivers/net/wireless/ath/ath9k/init.c
-+@@ -22,6 +22,7 @@
-+ #include <linux/module.h>
-+ #include <linux/of.h>
-+ #include <linux/of_net.h>
-++#include <linux/nvmem-consumer.h>
-+ #include <linux/relay.h>
-+ #include <linux/dmi.h>
-+ #include <net/ieee80211_radiotap.h>
-+@@ -568,6 +569,57 @@ static void ath9k_eeprom_release(struct
-+ 	release_firmware(sc->sc_ah->eeprom_blob);
-+ }
-+ 
-++static int ath9k_nvmem_request_eeprom(struct ath_softc *sc)
-++{
-++	struct ath_hw *ah = sc->sc_ah;
-++	struct nvmem_cell *cell;
-++	void *buf;
-++	size_t len;
-++	int err;
-++
-++	cell = devm_nvmem_cell_get(sc->dev, "calibration");
-++	if (IS_ERR(cell)) {
-++		err = PTR_ERR(cell);
-++
-++		/* nvmem cell might not be defined, or the nvmem
-++		 * subsystem isn't included. In this case, follow
-++		 * the established "just return 0;" convention of
-++		 * ath9k_init_platform to say:
-++		 * "All good. Nothing to see here. Please go on."
-++		 */
-++		if (err == -ENOENT || err == -EOPNOTSUPP)
-++			return 0;
-++
-++		return err;
-++	}
-++
-++	buf = nvmem_cell_read(cell, &len);
-++	if (IS_ERR(buf))
-++		return PTR_ERR(buf);
-++
-++	/* run basic sanity checks on the returned nvram cell length.
-++	 * That length has to be a multiple of a "u16" (i.e.: & 1).
-++	 * Furthermore, it has to be more than "let's say" 512 bytes
-++	 * but less than the maximum of AR9300_EEPROM_SIZE (16kb).
-++	 */
-++	if (((len & 1) == 1) || (len < 512) || (len >= AR9300_EEPROM_SIZE)) {
-++		kfree(buf);
-++		return -EINVAL;
-++	}
-++
-++	/* devres manages the calibration values release on shutdown */
-++	ah->nvmem_blob = (u16 *)devm_kmemdup(sc->dev, buf, len, GFP_KERNEL);
-++	kfree(buf);
-++	if (!ah->nvmem_blob)
-++		return -ENOMEM;
-++
-++	ah->nvmem_blob_len = len;
-++	ah->ah_flags &= ~AH_USE_EEPROM;
-++	ah->ah_flags |= AH_NO_EEP_SWAP;
-++
-++	return 0;
-++}
-++
-+ static int ath9k_init_platform(struct ath_softc *sc)
-+ {
-+ 	struct ath9k_platform_data *pdata = sc->dev->platform_data;
-+@@ -710,6 +762,10 @@ static int ath9k_init_softc(u16 devid, s
-+ 	if (ret)
-+ 		return ret;
-+ 
-++	ret = ath9k_nvmem_request_eeprom(sc);
-++	if (ret)
-++		return ret;
-++
-+ 	if (ath9k_led_active_high != -1)
-+ 		ah->config.led_active_high = ath9k_led_active_high == 1;
-+ 
-diff --git a/package/kernel/mac80211/patches/ath9k/601-v5.16-ath9k-owl-loader-fetch-pci-init-values-through-nvmem.patch b/package/kernel/mac80211/patches/ath9k/601-v5.16-ath9k-owl-loader-fetch-pci-init-values-through-nvmem.patch
-new file mode 100644
-index 0000000000..62c561d619
---- /dev/null
-+++ b/package/kernel/mac80211/patches/ath9k/601-v5.16-ath9k-owl-loader-fetch-pci-init-values-through-nvmem.patch
-@@ -0,0 +1,181 @@
-+From 9bf31835f11aa3c4fe5a9c1f7462c199c5d8e7ca Mon Sep 17 00:00:00 2001
-+From: Christian Lamparter <chunkeey@gmail.com>
-+Date: Sat, 21 Aug 2021 00:22:39 +0200
-+Subject: [PATCH] ath9k: owl-loader: fetch pci init values through nvmem
-+
-+extends the owl loader to fetch important pci initialization
-+values - which are stored together with the calibration data -
-+through the nvmem subsystem.
-+
-+This allows for much faster WIFI/ath9k initializations on devices
-+that do not require to perform any post-processing (like XOR'ing/
-+reversal or unpacking) since no userspace helper is required.
-+
-+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
-+---
-+ .../wireless/ath/ath9k/ath9k_pci_owl_loader.c | 105 +++++++++++++-----
-+ 1 file changed, 76 insertions(+), 29 deletions(-)
-+
-+--- a/drivers/net/wireless/ath/ath9k/ath9k_pci_owl_loader.c
-++++ b/drivers/net/wireless/ath/ath9k/ath9k_pci_owl_loader.c
-+@@ -19,9 +19,14 @@
-+ #include <linux/delay.h>
-+ #include <linux/platform_device.h>
-+ #include <linux/ath9k_platform.h>
-++#include <linux/nvmem-consumer.h>
-++#include <linux/workqueue.h>
-+ 
-+ struct owl_ctx {
-++	struct pci_dev *pdev;
-+ 	struct completion eeprom_load;
-++	struct work_struct work;
-++	struct nvmem_cell *cell;
-+ };
-+ 
-+ #define EEPROM_FILENAME_LEN 100
-+@@ -42,6 +47,12 @@ static int ath9k_pci_fixup(struct pci_de
-+ 	u32 bar0;
-+ 	bool swap_needed = false;
-+ 
-++	/* also note that we are doing *u16 operations on the file */
-++	if (cal_len > 4096 || cal_len < 0x200 || (cal_len & 1) == 1) {
-++		dev_err(&pdev->dev, "eeprom has an invalid size.\n");
-++		return -EINVAL;
-++	}
-++
-+ 	if (*cal_data != AR5416_EEPROM_MAGIC) {
-+ 		if (*cal_data != swab16(AR5416_EEPROM_MAGIC)) {
-+ 			dev_err(&pdev->dev, "invalid calibration data\n");
-+@@ -99,38 +110,31 @@ static int ath9k_pci_fixup(struct pci_de
-+ 	return 0;
-+ }
-+ 
-+-static void owl_fw_cb(const struct firmware *fw, void *context)
-++static void owl_rescan(struct pci_dev *pdev)
-+ {
-+-	struct pci_dev *pdev = (struct pci_dev *)context;
-+-	struct owl_ctx *ctx = (struct owl_ctx *)pci_get_drvdata(pdev);
-+-	struct pci_bus *bus;
-+-
-+-	complete(&ctx->eeprom_load);
-+-
-+-	if (!fw) {
-+-		dev_err(&pdev->dev, "no eeprom data received.\n");
-+-		goto release;
-+-	}
-+-
-+-	/* also note that we are doing *u16 operations on the file */
-+-	if (fw->size > 4096 || fw->size < 0x200 || (fw->size & 1) == 1) {
-+-		dev_err(&pdev->dev, "eeprom file has an invalid size.\n");
-+-		goto release;
-+-	}
-+-
-+-	if (ath9k_pci_fixup(pdev, (const u16 *)fw->data, fw->size))
-+-		goto release;
-++	struct pci_bus *bus = pdev->bus;
-+ 
-+ 	pci_lock_rescan_remove();
-+-	bus = pdev->bus;
-+ 	pci_stop_and_remove_bus_device(pdev);
-+ 	/* the device should come back with the proper
-+ 	 * ProductId. But we have to initiate a rescan.
-+ 	 */
-+ 	pci_rescan_bus(bus);
-+ 	pci_unlock_rescan_remove();
-++}
-++
-++static void owl_fw_cb(const struct firmware *fw, void *context)
-++{
-++	struct owl_ctx *ctx = (struct owl_ctx *)context;
-++
-++	complete(&ctx->eeprom_load);
-+ 
-+-release:
-++	if (fw) {
-++		ath9k_pci_fixup(ctx->pdev, (const u16 *)fw->data, fw->size);
-++		owl_rescan(ctx->pdev);
-++	} else {
-++		dev_err(&ctx->pdev->dev, "no eeprom data received.\n");
-++	}
-+ 	release_firmware(fw);
-+ }
-+ 
-+@@ -152,6 +156,43 @@ static const char *owl_get_eeprom_name(s
-+ 	return eeprom_name;
-+ }
-+ 
-++static void owl_nvmem_work(struct work_struct *work)
-++{
-++	struct owl_ctx *ctx = container_of(work, struct owl_ctx, work);
-++	void *buf;
-++	size_t len;
-++
-++	complete(&ctx->eeprom_load);
-++
-++	buf = nvmem_cell_read(ctx->cell, &len);
-++	if (!IS_ERR(buf)) {
-++		ath9k_pci_fixup(ctx->pdev, buf, len);
-++		kfree(buf);
-++		owl_rescan(ctx->pdev);
-++	} else {
-++		dev_err(&ctx->pdev->dev, "no nvmem data received.\n");
-++	}
-++}
-++
-++static int owl_nvmem_probe(struct owl_ctx *ctx)
-++{
-++	int err;
-++
-++	ctx->cell = devm_nvmem_cell_get(&ctx->pdev->dev, "calibration");
-++	if (IS_ERR(ctx->cell)) {
-++		err = PTR_ERR(ctx->cell);
-++		if (err == -ENOENT || err == -EOPNOTSUPP)
-++			return 1; /* not present, try firmware_request */
-++
-++		return err;
-++	}
-++
-++	INIT_WORK(&ctx->work, owl_nvmem_work);
-++	schedule_work(&ctx->work);
-++
-++	return 0;
-++}
-++
-+ static int owl_probe(struct pci_dev *pdev,
-+ 		     const struct pci_device_id *id)
-+ {
-+@@ -164,21 +205,27 @@ static int owl_probe(struct pci_dev *pde
-+ 
-+ 	pcim_pin_device(pdev);
-+ 
-+-	eeprom_name = owl_get_eeprom_name(pdev);
-+-	if (!eeprom_name) {
-+-		dev_err(&pdev->dev, "no eeprom filename found.\n");
-+-		return -ENODEV;
-+-	}
-+-
-+ 	ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
-+ 	if (!ctx)
-+ 		return -ENOMEM;
-+ 
-+ 	init_completion(&ctx->eeprom_load);
-++	ctx->pdev = pdev;
-+ 
-+ 	pci_set_drvdata(pdev, ctx);
-++
-++	err = owl_nvmem_probe(ctx);
-++	if (err <= 0)
-++		return err;
-++
-++	eeprom_name = owl_get_eeprom_name(pdev);
-++	if (!eeprom_name) {
-++		dev_err(&pdev->dev, "no eeprom filename found.\n");
-++		return -ENODEV;
-++	}
-++
-+ 	err = request_firmware_nowait(THIS_MODULE, true, eeprom_name,
-+-				      &pdev->dev, GFP_KERNEL, pdev, owl_fw_cb);
-++				      &pdev->dev, GFP_KERNEL, ctx, owl_fw_cb);
-+ 	if (err)
-+ 		dev_err(&pdev->dev, "failed to request caldata (%d).\n", err);
-+ 
-diff --git a/package/kernel/mac80211/patches/brcm/812-b43-add-antenna-control.patch b/package/kernel/mac80211/patches/brcm/812-b43-add-antenna-control.patch
-index 52ae7a8eba..5dc04ecc88 100644
---- a/package/kernel/mac80211/patches/brcm/812-b43-add-antenna-control.patch
-+++ b/package/kernel/mac80211/patches/brcm/812-b43-add-antenna-control.patch
-@@ -42,7 +42,7 @@
-  
-  	if (wl->radio_enabled != phy->radio_on) {
-  		if (wl->radio_enabled) {
--@@ -5176,6 +5173,47 @@ static int b43_op_get_survey(struct ieee
-+@@ -5175,6 +5172,47 @@ static int b43_op_get_survey(struct ieee
-  	return 0;
-  }
-  
-@@ -90,7 +90,7 @@
-  static const struct ieee80211_ops b43_hw_ops = {
-  	.tx			= b43_op_tx,
-  	.conf_tx		= b43_op_conf_tx,
--@@ -5197,6 +5235,8 @@ static const struct ieee80211_ops b43_hw
-+@@ -5196,6 +5234,8 @@ static const struct ieee80211_ops b43_hw
-  	.sw_scan_complete	= b43_op_sw_scan_complete_notifier,
-  	.get_survey		= b43_op_get_survey,
-  	.rfkill_poll		= b43_rfkill_poll,
-@@ -99,7 +99,7 @@
-  };
-  
-  /* Hard-reset the chip. Do not call this directly.
--@@ -5498,6 +5538,8 @@ static int b43_one_core_attach(struct b4
-+@@ -5497,6 +5537,8 @@ static int b43_one_core_attach(struct b4
-  	if (!wldev)
-  		goto out;
-  
-@@ -108,7 +108,7 @@
-  	wldev->use_pio = b43_modparam_pio;
-  	wldev->dev = dev;
-  	wldev->wl = wl;
--@@ -5592,6 +5634,9 @@ static struct b43_wl *b43_wireless_init(
-+@@ -5588,6 +5630,9 @@ static struct b43_wl *b43_wireless_init(
-  
-  	wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
-  
-diff --git a/package/kernel/mac80211/patches/brcm/860-brcmfmac-register-wiphy-s-during-module_init.patch b/package/kernel/mac80211/patches/brcm/860-brcmfmac-register-wiphy-s-during-module_init.patch
-index c9730e29fd..aa890ce0f3 100644
---- a/package/kernel/mac80211/patches/brcm/860-brcmfmac-register-wiphy-s-during-module_init.patch
-+++ b/package/kernel/mac80211/patches/brcm/860-brcmfmac-register-wiphy-s-during-module_init.patch
-@@ -13,15 +13,15 @@ Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
- 
- --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c
- +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c
--@@ -431,6 +431,7 @@ struct brcmf_fw {
-+@@ -429,6 +429,7 @@ struct brcmf_fw {
-  	struct brcmf_fw_request *req;
-  	u32 curpos;
-  	void (*done)(struct device *dev, int err, struct brcmf_fw_request *req);
- +	struct completion *completion;
-  };
-  
-- static void brcmf_fw_request_done(const struct firmware *fw, void *ctx);
--@@ -638,6 +639,8 @@ static void brcmf_fw_request_done(const
-+ #ifdef CONFIG_EFI
-+@@ -653,6 +654,8 @@ static void brcmf_fw_request_done(const
-  		fwctx->req = NULL;
-  	}
-  	fwctx->done(fwctx->dev, ret, fwctx->req);
-@@ -30,16 +30,16 @@ Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
-  	kfree(fwctx);
-  }
-  
--@@ -662,6 +665,8 @@ int brcmf_fw_get_firmwares(struct device
-+@@ -693,6 +696,8 @@ int brcmf_fw_get_firmwares(struct device
-  {
-  	struct brcmf_fw_item *first = &req->items[0];
-  	struct brcmf_fw *fwctx;
- +	struct completion completion;
- +	unsigned long time_left;
-+ 	char *alt_path;
-  	int ret;
-  
-- 	brcmf_dbg(TRACE, "enter: dev=%s\n", dev_name(dev));
--@@ -678,6 +683,9 @@ int brcmf_fw_get_firmwares(struct device
-+@@ -710,6 +715,9 @@ int brcmf_fw_get_firmwares(struct device
-  	fwctx->dev = dev;
-  	fwctx->req = req;
-  	fwctx->done = fw_cb;
-@@ -47,9 +47,9 @@ Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
- +	init_completion(&completion);
- +	fwctx->completion = &completion;
-  
-- 	ret = request_firmware_nowait(THIS_MODULE, true, first->path,
-- 				      fwctx->dev, GFP_KERNEL, fwctx,
--@@ -685,6 +693,12 @@ int brcmf_fw_get_firmwares(struct device
-+ 	/* First try alternative board-specific path if any */
-+ 	alt_path = brcm_alt_fw_path(first->path, fwctx->req->board_type);
-+@@ -726,6 +734,12 @@ int brcmf_fw_get_firmwares(struct device
-  	if (ret < 0)
-  		brcmf_fw_request_done(NULL, fwctx);
-  
-diff --git a/package/kernel/mac80211/patches/brcm/862-brcmfmac-Disable-power-management.patch b/package/kernel/mac80211/patches/brcm/862-brcmfmac-Disable-power-management.patch
-index 774656f1fd..88465f256b 100644
---- a/package/kernel/mac80211/patches/brcm/862-brcmfmac-Disable-power-management.patch
-+++ b/package/kernel/mac80211/patches/brcm/862-brcmfmac-Disable-power-management.patch
-@@ -14,7 +14,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
- 
- --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
- +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
--@@ -2961,6 +2961,10 @@ brcmf_cfg80211_set_power_mgmt(struct wip
-+@@ -2974,6 +2974,10 @@ brcmf_cfg80211_set_power_mgmt(struct wip
-  	 * preference in cfg struct to apply this to
-  	 * FW later while initializing the dongle
-  	 */
-diff --git a/package/kernel/mac80211/patches/brcm/863-brcmfmac-add-in-driver-tables-with-country-codes.patch b/package/kernel/mac80211/patches/brcm/863-brcmfmac-add-in-driver-tables-with-country-codes.patch
-index 9658bda1c1..835c870a65 100644
---- a/package/kernel/mac80211/patches/brcm/863-brcmfmac-add-in-driver-tables-with-country-codes.patch
-+++ b/package/kernel/mac80211/patches/brcm/863-brcmfmac-add-in-driver-tables-with-country-codes.patch
-@@ -12,9 +12,9 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
- 
- --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c
- +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c
--@@ -12,6 +12,36 @@
-- #include "common.h"
-- #include "of.h"
-+@@ -58,6 +58,36 @@ static int brcmf_of_get_country_codes(st
-+ 	return 0;
-+ }
-  
- +/* TODO: FIXME: Use DT */
- +static void brcmf_of_probe_cc(struct device *dev,
-@@ -49,12 +49,12 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-  void brcmf_of_probe(struct device *dev, enum brcmf_bus_type bus_type,
-  		    struct brcmf_mp_device *settings)
-  {
--@@ -43,6 +73,8 @@ void brcmf_of_probe(struct device *dev,
-+@@ -90,6 +120,8 @@ void brcmf_of_probe(struct device *dev,
-  		of_node_put(root);
-  	}
-  
- +	brcmf_of_probe_cc(dev, settings);
- +
-- 	if (!np || bus_type != BRCMF_BUSTYPE_SDIO ||
-- 	    !of_device_is_compatible(np, "brcm,bcm4329-fmac"))
-+ 	if (!np || !of_device_is_compatible(np, "brcm,bcm4329-fmac"))
-  		return;
-+ 
-diff --git a/package/kernel/mac80211/patches/brcm/998-survey.patch b/package/kernel/mac80211/patches/brcm/998-survey.patch
-index 25a12c783e..a5efc08015 100644
---- a/package/kernel/mac80211/patches/brcm/998-survey.patch
-+++ b/package/kernel/mac80211/patches/brcm/998-survey.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
- +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
--@@ -2913,6 +2913,63 @@ done:
-+@@ -2921,6 +2921,63 @@ done:
-  }
-  
-  static int
-@@ -64,7 +64,7 @@
-  brcmf_cfg80211_dump_station(struct wiphy *wiphy, struct net_device *ndev,
-  			    int idx, u8 *mac, struct station_info *sinfo)
-  {
--@@ -3008,6 +3065,7 @@ static s32 brcmf_inform_single_bss(struc
-+@@ -3021,6 +3078,7 @@ static s32 brcmf_inform_single_bss(struc
-  	struct brcmu_chan ch;
-  	u16 channel;
-  	u32 freq;
-@@ -72,7 +72,7 @@
-  	u16 notify_capability;
-  	u16 notify_interval;
-  	u8 *notify_ie;
--@@ -3032,6 +3090,17 @@ static s32 brcmf_inform_single_bss(struc
-+@@ -3045,6 +3103,17 @@ static s32 brcmf_inform_single_bss(struc
-  		band = NL80211_BAND_5GHZ;
-  
-  	freq = ieee80211_channel_to_frequency(channel, band);
-@@ -90,7 +90,7 @@
-  	bss_data.chan = ieee80211_get_channel(wiphy, freq);
-  	bss_data.scan_width = NL80211_BSS_CHAN_WIDTH_20;
-  	bss_data.boottime_ns = ktime_to_ns(ktime_get_boottime());
--@@ -5518,6 +5587,7 @@ static struct cfg80211_ops brcmf_cfg8021
-+@@ -5573,6 +5642,7 @@ static struct cfg80211_ops brcmf_cfg8021
-  	.leave_ibss = brcmf_cfg80211_leave_ibss,
-  	.get_station = brcmf_cfg80211_get_station,
-  	.dump_station = brcmf_cfg80211_dump_station,
-@@ -100,7 +100,7 @@
-  	.add_key = brcmf_cfg80211_add_key,
- --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c
- +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c
--@@ -1356,6 +1356,8 @@ int brcmf_attach(struct device *dev)
-+@@ -1361,6 +1361,8 @@ int brcmf_attach(struct device *dev)
-  
-  	/* Link to bus module */
-  	drvr->hdrlen = 0;
-@@ -109,7 +109,7 @@
-  
-  	/* Attach and link in the protocol */
-  	ret = brcmf_proto_attach(drvr);
--@@ -1438,6 +1440,12 @@ void brcmf_detach(struct device *dev)
-+@@ -1443,6 +1445,12 @@ void brcmf_detach(struct device *dev)
-  	if (drvr == NULL)
-  		return;
-  
-diff --git a/package/kernel/mac80211/patches/build/003-remove_bogus_modparams.patch b/package/kernel/mac80211/patches/build/003-remove_bogus_modparams.patch
-index 8fa465a7e1..aa26c8cb2a 100644
---- a/package/kernel/mac80211/patches/build/003-remove_bogus_modparams.patch
-+++ b/package/kernel/mac80211/patches/build/003-remove_bogus_modparams.patch
-@@ -1,6 +1,6 @@
- --- a/compat/main.c
- +++ b/compat/main.c
--@@ -20,31 +20,6 @@ MODULE_LICENSE("GPL");
-+@@ -19,31 +19,6 @@ MODULE_LICENSE("GPL");
-  #error "You need a CPTCFG_VERSION"
-  #endif
-  
-diff --git a/package/kernel/mac80211/patches/build/004-kconfig_backport_fix.patch b/package/kernel/mac80211/patches/build/004-kconfig_backport_fix.patch
-deleted file mode 100644
-index 2c9572ec93..0000000000
---- a/package/kernel/mac80211/patches/build/004-kconfig_backport_fix.patch
-+++ /dev/null
-@@ -1,28 +0,0 @@
----- a/backport-include/linux/kconfig.h
--+++ b/backport-include/linux/kconfig.h
--@@ -5,6 +5,8 @@
-- #include_next <linux/kconfig.h>
-- #endif
-- 
--+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)
--+
-- #ifndef __ARG_PLACEHOLDER_1
-- #define __ARG_PLACEHOLDER_1 0,
-- #define config_enabled(cfg) _config_enabled(cfg)
--@@ -16,6 +18,7 @@
--  * 3.1 - 3.3 had a broken version of this, so undef
--  * (they didn't have __ARG_PLACEHOLDER_1)
--  */
--+
-- #undef IS_ENABLED
-- #define IS_ENABLED(option) \
--         (config_enabled(option) || config_enabled(option##_MODULE))
--@@ -31,6 +34,8 @@
-- #undef IS_BUILTIN
-- #define IS_BUILTIN(option) config_enabled(option)
-- 
--+#endif
--+
-- #ifndef IS_REACHABLE
-- /*
--  * IS_REACHABLE(CONFIG_FOO) evaluates to 1 if the currently compiled
-diff --git a/package/kernel/mac80211/patches/build/010-disable_rfkill.patch b/package/kernel/mac80211/patches/build/010-disable_rfkill.patch
-deleted file mode 100644
-index d5253063ce..0000000000
---- a/package/kernel/mac80211/patches/build/010-disable_rfkill.patch
-+++ /dev/null
-@@ -1,15 +0,0 @@
----- a/backport-include/linux/rfkill.h
--+++ b/backport-include/linux/rfkill.h
--@@ -2,6 +2,12 @@
-- #define __COMPAT_RFKILL_H
-- #include <linux/version.h>
-- 
--+#undef CONFIG_RFKILL
--+#undef CONFIG_RFKILL_FULL
--+#undef CONFIG_RFKILL_LEDS
--+#undef CONFIG_RFKILL_MODULE
--+#undef CONFIG_RFKILL_FULL_MODULE
--+
-- #if LINUX_VERSION_IS_GEQ(3,10,0)
-- #include_next <linux/rfkill.h>
-- #else
-diff --git a/package/kernel/mac80211/patches/build/060-no_local_ssb_bcma.patch b/package/kernel/mac80211/patches/build/060-no_local_ssb_bcma.patch
-index ff2ce2071f..3967d73fad 100644
---- a/package/kernel/mac80211/patches/build/060-no_local_ssb_bcma.patch
-+++ b/package/kernel/mac80211/patches/build/060-no_local_ssb_bcma.patch
-@@ -1,9 +1,9 @@
- --- a/local-symbols
- +++ b/local-symbols
--@@ -437,43 +437,6 @@ USB_SIERRA_NET=
-- USB_VL600=
-+@@ -421,43 +421,6 @@ USB_VL600=
-  USB_NET_CH9200=
-  USB_NET_AQC111=
-+ USB_RTL8153_ECM=
- -SSB_POSSIBLE=
- -SSB=
- -SSB_SPROM=
-@@ -192,10 +192,10 @@
-  	select BRCMUTIL
- --- a/Kconfig.local
- +++ b/Kconfig.local
--@@ -1315,117 +1315,6 @@ config BACKPORTED_USB_NET_CH9200
-- config BACKPORTED_USB_NET_AQC111
-+@@ -1267,117 +1267,6 @@ config BACKPORTED_USB_NET_AQC111
-+ config BACKPORTED_USB_RTL8153_ECM
-  	tristate
-- 	default USB_NET_AQC111
-+ 	default USB_RTL8153_ECM
- -config BACKPORTED_SSB_POSSIBLE
- -	tristate
- -	default SSB_POSSIBLE
-diff --git a/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch b/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch
-index d358cfe367..140949f9a8 100644
---- a/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch
-+++ b/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/marvell/mwl8k.c
- +++ b/drivers/net/wireless/marvell/mwl8k.c
--@@ -5695,6 +5695,7 @@ MODULE_FIRMWARE("mwl8k/fmimage_8366.fw")
-+@@ -5699,6 +5699,7 @@ MODULE_FIRMWARE("mwl8k/fmimage_8366.fw")
-  MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
-  
-  static const struct pci_device_id mwl8k_pci_id_table[] = {
-diff --git a/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch b/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch
-index a35cf1875a..96b1ce77e9 100644
---- a/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch
-+++ b/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/marvell/mwl8k.c
- +++ b/drivers/net/wireless/marvell/mwl8k.c
--@@ -6280,6 +6280,8 @@ static int mwl8k_probe(struct pci_dev *p
-+@@ -6285,6 +6285,8 @@ static int mwl8k_probe(struct pci_dev *p
-  
-  	priv->running_bsses = 0;
-  
-@@ -9,7 +9,7 @@
-  	return rc;
-  
-  err_stop_firmware:
--@@ -6313,8 +6315,6 @@ static void mwl8k_remove(struct pci_dev
-+@@ -6318,8 +6320,6 @@ static void mwl8k_remove(struct pci_dev
-  		return;
-  	priv = hw->priv;
-  
-diff --git a/package/kernel/mac80211/patches/rt2x00/002-rt2x00-define-RF5592-in-init_eeprom-routine.patch b/package/kernel/mac80211/patches/rt2x00/002-rt2x00-define-RF5592-in-init_eeprom-routine.patch
-index a50a195285..96eeb37dc6 100644
---- a/package/kernel/mac80211/patches/rt2x00/002-rt2x00-define-RF5592-in-init_eeprom-routine.patch
-+++ b/package/kernel/mac80211/patches/rt2x00/002-rt2x00-define-RF5592-in-init_eeprom-routine.patch
-@@ -40,7 +40,7 @@ Signed-off-by: Tomislav Požega <pozega.tomislav@gmail.com>
- 
- --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
- +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
--@@ -9416,6 +9416,8 @@ static int rt2800_init_eeprom(struct rt2
-+@@ -9435,6 +9435,8 @@ static int rt2800_init_eeprom(struct rt2
-  		rf = RF3853;
-  	else if (rt2x00_rt(rt2x00dev, RT5350))
-  		rf = RF5350;
-diff --git a/package/kernel/mac80211/patches/rt2x00/602-rt2x00-introduce-rt2x00eeprom.patch b/package/kernel/mac80211/patches/rt2x00/602-rt2x00-introduce-rt2x00eeprom.patch
-index e74d9a9aa0..5bc55cc90b 100644
---- a/package/kernel/mac80211/patches/rt2x00/602-rt2x00-introduce-rt2x00eeprom.patch
-+++ b/package/kernel/mac80211/patches/rt2x00/602-rt2x00-introduce-rt2x00eeprom.patch
-@@ -1,6 +1,6 @@
- --- a/local-symbols
- +++ b/local-symbols
--@@ -332,6 +332,7 @@ RT2X00_LIB_FIRMWARE=
-+@@ -315,6 +315,7 @@ RT2X00_LIB_FIRMWARE=
-  RT2X00_LIB_CRYPTO=
-  RT2X00_LIB_LEDS=
-  RT2X00_LIB_DEBUGFS=
-@@ -105,7 +105,7 @@
-  	.drv_init_registers	= rt2800mmio_init_registers,
- --- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
- +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
--@@ -694,6 +694,7 @@ enum rt2x00_capability_flags {
-+@@ -703,6 +703,7 @@ enum rt2x00_capability_flags {
-  	REQUIRE_HT_TX_DESC,
-  	REQUIRE_PS_AUTOWAKE,
-  	REQUIRE_DELAYED_RFKILL,
-@@ -113,7 +113,7 @@
-  
-  	/*
-  	 * Capabilities
--@@ -970,6 +971,11 @@ struct rt2x00_dev {
-+@@ -980,6 +981,11 @@ struct rt2x00_dev {
-  	const struct firmware *fw;
-  
-  	/*
-@@ -127,7 +127,7 @@
-  	DECLARE_KFIFO_PTR(txstatus_fifo, u32);
- --- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
- +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
--@@ -1406,6 +1406,10 @@ int rt2x00lib_probe_dev(struct rt2x00_de
-+@@ -1401,6 +1401,10 @@ int rt2x00lib_probe_dev(struct rt2x00_de
-  	INIT_DELAYED_WORK(&rt2x00dev->autowakeup_work, rt2x00lib_autowakeup);
-  	INIT_WORK(&rt2x00dev->sleep_work, rt2x00lib_sleep);
-  
-@@ -138,7 +138,7 @@
-  	/*
-  	 * Let the driver probe the device to detect the capabilities.
-  	 */
--@@ -1549,6 +1553,11 @@ void rt2x00lib_remove_dev(struct rt2x00_
-+@@ -1541,6 +1545,11 @@ void rt2x00lib_remove_dev(struct rt2x00_
-  	 * Free the driver data.
-  	 */
-  	kfree(rt2x00dev->drv_data);
-diff --git a/package/kernel/mac80211/patches/rt2x00/606-rt2x00-allow_disabling_bands_through_platform_data.patch b/package/kernel/mac80211/patches/rt2x00/606-rt2x00-allow_disabling_bands_through_platform_data.patch
-index 6a8e594d5e..ffee2189d2 100644
---- a/package/kernel/mac80211/patches/rt2x00/606-rt2x00-allow_disabling_bands_through_platform_data.patch
-+++ b/package/kernel/mac80211/patches/rt2x00/606-rt2x00-allow_disabling_bands_through_platform_data.patch
-@@ -12,7 +12,7 @@
-  #endif /* _RT2X00_PLATFORM_H */
- --- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
- +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
--@@ -1012,6 +1012,22 @@ static int rt2x00lib_probe_hw_modes(stru
-+@@ -1007,6 +1007,22 @@ static int rt2x00lib_probe_hw_modes(stru
-  	unsigned int num_rates;
-  	unsigned int i;
-  
-@@ -37,7 +37,7 @@
-  		num_rates += 4;
- --- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
- +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
--@@ -399,6 +399,7 @@ struct hw_mode_spec {
-+@@ -408,6 +408,7 @@ struct hw_mode_spec {
-  	unsigned int supported_bands;
-  #define SUPPORT_BAND_2GHZ	0x00000001
-  #define SUPPORT_BAND_5GHZ	0x00000002
-diff --git a/package/kernel/mac80211/patches/rt2x00/607-rt2x00-add_platform_data_mac_addr.patch b/package/kernel/mac80211/patches/rt2x00/607-rt2x00-add_platform_data_mac_addr.patch
-index b5b2c61037..37553bb80a 100644
---- a/package/kernel/mac80211/patches/rt2x00/607-rt2x00-add_platform_data_mac_addr.patch
-+++ b/package/kernel/mac80211/patches/rt2x00/607-rt2x00-add_platform_data_mac_addr.patch
-@@ -1,19 +1,18 @@
- --- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
- +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
--@@ -990,8 +990,13 @@ static void rt2x00lib_rate(struct ieee80
-+@@ -989,6 +989,12 @@ static void rt2x00lib_rate(struct ieee80
-  
-  void rt2x00lib_set_mac_address(struct rt2x00_dev *rt2x00dev, u8 *eeprom_mac_addr)
-  {
- +	struct rt2x00_platform_data *pdata;
-- 	const char *mac_addr;
-- 
-++
- +	pdata = rt2x00dev->dev->platform_data;
- +	if (pdata && pdata->mac_address)
- +		ether_addr_copy(eeprom_mac_addr, pdata->mac_address);
- +
-- 	mac_addr = of_get_mac_address(rt2x00dev->dev->of_node);
-- 	if (!IS_ERR(mac_addr))
-- 		ether_addr_copy(eeprom_mac_addr, mac_addr);
-+ 	of_get_mac_address(rt2x00dev->dev->of_node, eeprom_mac_addr);
-+ 
-+ 	if (!is_valid_ether_addr(eeprom_mac_addr)) {
- --- a/include/linux/rt2x00_platform.h
- +++ b/include/linux/rt2x00_platform.h
- @@ -14,6 +14,7 @@
-diff --git a/package/kernel/mac80211/patches/rt2x00/608-rt2x00-allow_disabling_bands_through_dts.patch b/package/kernel/mac80211/patches/rt2x00/608-rt2x00-allow_disabling_bands_through_dts.patch
-index ff8b2c947b..6211809c0a 100644
---- a/package/kernel/mac80211/patches/rt2x00/608-rt2x00-allow_disabling_bands_through_dts.patch
-+++ b/package/kernel/mac80211/patches/rt2x00/608-rt2x00-allow_disabling_bands_through_dts.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
- +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
--@@ -1016,6 +1016,16 @@ static int rt2x00lib_probe_hw_modes(stru
-+@@ -1012,6 +1012,16 @@ static int rt2x00lib_probe_hw_modes(stru
-  	struct ieee80211_rate *rates;
-  	unsigned int num_rates;
-  	unsigned int i;
-diff --git a/package/kernel/mac80211/patches/rt2x00/610-rt2x00-change-led-polarity-from-OF.patch b/package/kernel/mac80211/patches/rt2x00/610-rt2x00-change-led-polarity-from-OF.patch
-index 039c6f6afc..d78b76d7f5 100644
---- a/package/kernel/mac80211/patches/rt2x00/610-rt2x00-change-led-polarity-from-OF.patch
-+++ b/package/kernel/mac80211/patches/rt2x00/610-rt2x00-change-led-polarity-from-OF.patch
-@@ -8,7 +8,7 @@
-  
-  #include "rt2x00.h"
-  #include "rt2800lib.h"
--@@ -9530,6 +9531,17 @@ static int rt2800_init_eeprom(struct rt2
-+@@ -9549,6 +9550,17 @@ static int rt2800_init_eeprom(struct rt2
-  	rt2800_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
-  	rt2800_init_led(rt2x00dev, &rt2x00dev->led_qual, LED_TYPE_QUALITY);
-  
-diff --git a/package/kernel/mac80211/patches/rt2x00/611-rt2x00-add-AP+STA-support.patch b/package/kernel/mac80211/patches/rt2x00/611-rt2x00-add-AP+STA-support.patch
-index 88d6dd559b..0da9356e0c 100644
---- a/package/kernel/mac80211/patches/rt2x00/611-rt2x00-add-AP+STA-support.patch
-+++ b/package/kernel/mac80211/patches/rt2x00/611-rt2x00-add-AP+STA-support.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
- +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
--@@ -1344,7 +1344,7 @@ static inline void rt2x00lib_set_if_comb
-+@@ -1340,7 +1340,7 @@ static inline void rt2x00lib_set_if_comb
-  	 */
-  	if_limit = &rt2x00dev->if_limits_ap;
-  	if_limit->max = rt2x00dev->ops->max_ap_intf;
-diff --git a/package/kernel/mac80211/patches/rt2x00/612-rt2x00-led-tpt-trigger-support.patch b/package/kernel/mac80211/patches/rt2x00/612-rt2x00-led-tpt-trigger-support.patch
-index fca1fb2cd4..6e6564f870 100644
---- a/package/kernel/mac80211/patches/rt2x00/612-rt2x00-led-tpt-trigger-support.patch
-+++ b/package/kernel/mac80211/patches/rt2x00/612-rt2x00-led-tpt-trigger-support.patch
-@@ -11,7 +11,7 @@ Tested-by: Christoph Krapp <achterin@googlemail.com>
- 
- --- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
- +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
--@@ -1129,6 +1129,19 @@ static void rt2x00lib_remove_hw(struct r
-+@@ -1125,6 +1125,19 @@ static void rt2x00lib_remove_hw(struct r
-  	kfree(rt2x00dev->spec.channels_info);
-  }
-  
-@@ -31,7 +31,7 @@ Tested-by: Christoph Krapp <achterin@googlemail.com>
-  static int rt2x00lib_probe_hw(struct rt2x00_dev *rt2x00dev)
-  {
-  	struct hw_mode_spec *spec = &rt2x00dev->spec;
--@@ -1210,6 +1223,10 @@ static int rt2x00lib_probe_hw(struct rt2
-+@@ -1206,6 +1219,10 @@ static int rt2x00lib_probe_hw(struct rt2
-  
-  #undef RT2X00_TASKLET_INIT
-  
-diff --git a/package/kernel/mac80211/patches/rt2x00/650-rt2x00-add-support-for-external-PA-on-MT7620.patch b/package/kernel/mac80211/patches/rt2x00/650-rt2x00-add-support-for-external-PA-on-MT7620.patch
-index 20452cd8a7..8814c02532 100644
---- a/package/kernel/mac80211/patches/rt2x00/650-rt2x00-add-support-for-external-PA-on-MT7620.patch
-+++ b/package/kernel/mac80211/patches/rt2x00/650-rt2x00-add-support-for-external-PA-on-MT7620.patch
-@@ -30,7 +30,7 @@ Signed-off-by: Tomislav Po=C5=BEega <pozega.tomislav@gmail.com>
-   * EEPROM LNA
- --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
- +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
--@@ -4356,6 +4356,45 @@ static void rt2800_config_channel(struct
-+@@ -4369,6 +4369,45 @@ static void rt2800_config_channel(struct
-  		rt2800_iq_calibrate(rt2x00dev, rf->channel);
-  	}
-  
-@@ -76,7 +76,7 @@ Signed-off-by: Tomislav Po=C5=BEega <pozega.tomislav@gmail.com>
-  	bbp = rt2800_bbp_read(rt2x00dev, 4);
-  	rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf));
-  	rt2800_bbp_write(rt2x00dev, 4, bbp);
--@@ -9559,7 +9598,8 @@ static int rt2800_init_eeprom(struct rt2
-+@@ -9578,7 +9617,8 @@ static int rt2800_init_eeprom(struct rt2
-  	 */
-  	eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1);
-  
-@@ -86,7 +86,7 @@ Signed-off-by: Tomislav Po=C5=BEega <pozega.tomislav@gmail.com>
-  		if (rt2x00_get_field16(eeprom,
-  		    EEPROM_NIC_CONF1_EXTERNAL_TX0_PA_3352))
-  		    __set_bit(CAPABILITY_EXTERNAL_PA_TX0,
--@@ -9570,6 +9610,18 @@ static int rt2800_init_eeprom(struct rt2
-+@@ -9589,6 +9629,18 @@ static int rt2800_init_eeprom(struct rt2
-  			      &rt2x00dev->cap_flags);
-  	}
-  
-diff --git a/package/kernel/mac80211/patches/rt2x00/982-rt2x00-add-rf-self-txdc-calibration.patch b/package/kernel/mac80211/patches/rt2x00/982-rt2x00-add-rf-self-txdc-calibration.patch
-index 6be847478e..b798dcc6d8 100644
---- a/package/kernel/mac80211/patches/rt2x00/982-rt2x00-add-rf-self-txdc-calibration.patch
-+++ b/package/kernel/mac80211/patches/rt2x00/982-rt2x00-add-rf-self-txdc-calibration.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
- +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
--@@ -8419,6 +8419,56 @@ static void rt2800_init_rfcsr_5592(struc
-+@@ -8438,6 +8438,56 @@ static void rt2800_init_rfcsr_5592(struc
-  	rt2800_led_open_drain_enable(rt2x00dev);
-  }
-  
-@@ -57,7 +57,7 @@
-  static void rt2800_bbp_core_soft_reset(struct rt2x00_dev *rt2x00dev,
-  				       bool set_bw, bool is_ht40)
-  {
--@@ -9026,6 +9076,7 @@ static void rt2800_init_rfcsr_6352(struc
-+@@ -9045,6 +9095,7 @@ static void rt2800_init_rfcsr_6352(struc
-  	rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
-  	rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
-  
-diff --git a/package/kernel/mac80211/patches/rt2x00/983-rt2x00-add-r-calibration.patch b/package/kernel/mac80211/patches/rt2x00/983-rt2x00-add-r-calibration.patch
-index 3ed0ff7ef5..cf21c39a6c 100644
---- a/package/kernel/mac80211/patches/rt2x00/983-rt2x00-add-r-calibration.patch
-+++ b/package/kernel/mac80211/patches/rt2x00/983-rt2x00-add-r-calibration.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
- +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
--@@ -8469,6 +8469,155 @@ static void rt2800_rf_self_txdc_cal(stru
-+@@ -8488,6 +8488,155 @@ static void rt2800_rf_self_txdc_cal(stru
-  	rt2x00_info(rt2x00dev, "RF Tx self calibration end\n");
-  }
-  
-@@ -156,7 +156,7 @@
-  static void rt2800_bbp_core_soft_reset(struct rt2x00_dev *rt2x00dev,
-  				       bool set_bw, bool is_ht40)
-  {
--@@ -9076,6 +9225,7 @@ static void rt2800_init_rfcsr_6352(struc
-+@@ -9095,6 +9244,7 @@ static void rt2800_init_rfcsr_6352(struc
-  	rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
-  	rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
-  
-diff --git a/package/kernel/mac80211/patches/rt2x00/984-rt2x00-add-rxdcoc-calibration.patch b/package/kernel/mac80211/patches/rt2x00/984-rt2x00-add-rxdcoc-calibration.patch
-index 77be986d18..1f8684b0bf 100644
---- a/package/kernel/mac80211/patches/rt2x00/984-rt2x00-add-rxdcoc-calibration.patch
-+++ b/package/kernel/mac80211/patches/rt2x00/984-rt2x00-add-rxdcoc-calibration.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
- +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
--@@ -8618,6 +8618,70 @@ static void rt2800_r_calibration(struct
-+@@ -8637,6 +8637,70 @@ static void rt2800_r_calibration(struct
-  	rt2800_register_write(rt2x00dev, PWR_PIN_CFG, MAC_PWR_PIN_CFG);
-  }
-  
-@@ -71,7 +71,7 @@
-  static void rt2800_bbp_core_soft_reset(struct rt2x00_dev *rt2x00dev,
-  				       bool set_bw, bool is_ht40)
-  {
--@@ -9227,6 +9291,7 @@ static void rt2800_init_rfcsr_6352(struc
-+@@ -9246,6 +9310,7 @@ static void rt2800_init_rfcsr_6352(struc
-  
-  	rt2800_r_calibration(rt2x00dev);
-  	rt2800_rf_self_txdc_cal(rt2x00dev);
-diff --git a/package/kernel/mac80211/patches/rt2x00/985-rt2x00-add-rxiq-calibration.patch b/package/kernel/mac80211/patches/rt2x00/985-rt2x00-add-rxiq-calibration.patch
-index 7352ad036c..98f2e245ce 100644
---- a/package/kernel/mac80211/patches/rt2x00/985-rt2x00-add-rxiq-calibration.patch
-+++ b/package/kernel/mac80211/patches/rt2x00/985-rt2x00-add-rxiq-calibration.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
- +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
--@@ -8682,6 +8682,384 @@ static void rt2800_rxdcoc_calibration(st
-+@@ -8701,6 +8701,384 @@ static void rt2800_rxdcoc_calibration(st
-  	rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, saverfb0r2);
-  }
-  
-@@ -385,7 +385,7 @@
-  static void rt2800_bbp_core_soft_reset(struct rt2x00_dev *rt2x00dev,
-  				       bool set_bw, bool is_ht40)
-  {
--@@ -9294,6 +9672,7 @@ static void rt2800_init_rfcsr_6352(struc
-+@@ -9313,6 +9691,7 @@ static void rt2800_init_rfcsr_6352(struc
-  	rt2800_rxdcoc_calibration(rt2x00dev);
-  	rt2800_bw_filter_calibration(rt2x00dev, true);
-  	rt2800_bw_filter_calibration(rt2x00dev, false);
-diff --git a/package/kernel/mac80211/patches/rt2x00/986-rt2x00-add-TX-LOFT-calibration.patch b/package/kernel/mac80211/patches/rt2x00/986-rt2x00-add-TX-LOFT-calibration.patch
-index fe0961baa7..6a685f80ab 100644
---- a/package/kernel/mac80211/patches/rt2x00/986-rt2x00-add-TX-LOFT-calibration.patch
-+++ b/package/kernel/mac80211/patches/rt2x00/986-rt2x00-add-TX-LOFT-calibration.patch
-@@ -1,6 +1,6 @@
- --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
- +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
--@@ -9060,6 +9060,943 @@ restore_value:
-+@@ -9079,6 +9079,943 @@ restore_value:
-  	rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, savemacsysctrl);
-  }
-  
-@@ -944,7 +944,7 @@
-  static void rt2800_bbp_core_soft_reset(struct rt2x00_dev *rt2x00dev,
-  				       bool set_bw, bool is_ht40)
-  {
--@@ -9672,6 +10609,7 @@ static void rt2800_init_rfcsr_6352(struc
-+@@ -9691,6 +10628,7 @@ static void rt2800_init_rfcsr_6352(struc
-  	rt2800_rxdcoc_calibration(rt2x00dev);
-  	rt2800_bw_filter_calibration(rt2x00dev, true);
-  	rt2800_bw_filter_calibration(rt2x00dev, false);
-diff --git a/package/kernel/mac80211/patches/rt2x00/991-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch b/package/kernel/mac80211/patches/rt2x00/991-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
-index 3de00b2267..40b20ec594 100644
---- a/package/kernel/mac80211/patches/rt2x00/991-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
-+++ b/package/kernel/mac80211/patches/rt2x00/991-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
-@@ -14,7 +14,7 @@
-   */
- --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
- +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
--@@ -3685,14 +3685,16 @@ static void rt2800_config_channel_rf7620
-+@@ -3698,14 +3698,16 @@ static void rt2800_config_channel_rf7620
-  	rt2x00_set_field8(&rfcsr, RFCSR19_K, rf->rf4);
-  	rt2800_rfcsr_write(rt2x00dev, 19, rfcsr);
-  
-@@ -39,7 +39,7 @@
-  
-  	rfcsr = rt2800_rfcsr_read(rt2x00dev, 1);
-  	rt2x00_set_field8(&rfcsr, RFCSR1_TX2_EN_MT7620,
--@@ -3726,18 +3728,23 @@ static void rt2800_config_channel_rf7620
-+@@ -3739,18 +3741,23 @@ static void rt2800_config_channel_rf7620
-  		rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x20);
-  	}
-  
-@@ -73,7 +73,7 @@
-  
-  	if (!test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags)) {
-  		if (conf_is_ht40(conf)) {
--@@ -3837,25 +3844,29 @@ static void rt2800_config_alc(struct rt2
-+@@ -3850,25 +3857,29 @@ static void rt2800_config_alc(struct rt2
-  	if (i == 10000)
-  		rt2x00_warn(rt2x00dev, "Wait MAC Status to MAX !!!\n");
-  
-@@ -121,7 +121,7 @@
-  	rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, mac_sys_ctrl);
-  
-  	rt2800_vco_calibration(rt2x00dev);
--@@ -5887,18 +5898,33 @@ static int rt2800_init_registers(struct
-+@@ -5906,18 +5917,33 @@ static int rt2800_init_registers(struct
-  	} else if (rt2x00_rt(rt2x00dev, RT5350)) {
-  		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
-  	} else if (rt2x00_rt(rt2x00dev, RT6352)) {
-@@ -167,7 +167,7 @@
-  		reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
-  		rt2x00_set_field32(&reg, TX_ALC_CFG_1_ROS_BUSY_EN, 0);
-  		rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
--@@ -7042,14 +7068,16 @@ static void rt2800_init_bbp_6352(struct
-+@@ -7061,14 +7087,16 @@ static void rt2800_init_bbp_6352(struct
-  	rt2800_bbp_write(rt2x00dev, 188, 0x00);
-  	rt2800_bbp_write(rt2x00dev, 189, 0x00);
-  
-@@ -192,7 +192,7 @@
-  
-  	/* BBP for G band GLRT function (BBP_128 ~ BBP_221) */
-  	rt2800_bbp_glrt_write(rt2x00dev, 0, 0x00);
--@@ -10388,31 +10416,36 @@ static void rt2800_init_rfcsr_6352(struc
-+@@ -10407,31 +10435,36 @@ static void rt2800_init_rfcsr_6352(struc
-  	rt2800_rfcsr_write(rt2x00dev, 42, 0x5B);
-  	rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
-  
-@@ -254,7 +254,7 @@
-  
-  	/* Initialize RF channel register to default value */
-  	rt2800_rfcsr_write_chanreg(rt2x00dev, 0, 0x03);
--@@ -10478,63 +10511,71 @@ static void rt2800_init_rfcsr_6352(struc
-+@@ -10497,63 +10530,71 @@ static void rt2800_init_rfcsr_6352(struc
-  
-  	rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5);
-  
-@@ -383,7 +383,7 @@
-  
-  	/* Initialize RF DC calibration register to default value */
-  	rt2800_rfcsr_write_dccal(rt2x00dev, 0, 0x47);
--@@ -10597,12 +10638,17 @@ static void rt2800_init_rfcsr_6352(struc
-+@@ -10616,12 +10657,17 @@ static void rt2800_init_rfcsr_6352(struc
-  	rt2800_rfcsr_write_dccal(rt2x00dev, 62, 0x00);
-  	rt2800_rfcsr_write_dccal(rt2x00dev, 63, 0x00);
-  
-diff --git a/package/kernel/mac80211/patches/rt2x00/992-rt2x00-save-survey-for-every-channel-visited.patch b/package/kernel/mac80211/patches/rt2x00/992-rt2x00-save-survey-for-every-channel-visited.patch
-deleted file mode 100644
-index 31a7baeee7..0000000000
---- a/package/kernel/mac80211/patches/rt2x00/992-rt2x00-save-survey-for-every-channel-visited.patch
-+++ /dev/null
-@@ -1,183 +0,0 @@
----- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
--+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
--@@ -1238,6 +1238,8 @@ void rt2800_watchdog(struct rt2x00_dev *
-- 	if (test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags))
-- 		return;
-- 
--+	rt2800_update_survey(rt2x00dev);
--+
-- 	queue_for_each(rt2x00dev, queue) {
-- 		switch (queue->qid) {
-- 		case QID_AC_VO:
--@@ -1274,6 +1276,18 @@ void rt2800_watchdog(struct rt2x00_dev *
-- }
-- EXPORT_SYMBOL_GPL(rt2800_watchdog);
-- 
--+void rt2800_update_survey(struct rt2x00_dev *rt2x00dev)
--+{
--+	struct ieee80211_channel *chan = rt2x00dev->hw->conf.chandef.chan;
--+	struct rt2x00_chan_survey *chan_survey =
--+		   &rt2x00dev->chan_survey[chan->hw_value];
--+
--+	chan_survey->time_idle += rt2800_register_read(rt2x00dev, CH_IDLE_STA);
--+	chan_survey->time_busy += rt2800_register_read(rt2x00dev, CH_BUSY_STA);
--+	chan_survey->time_ext_busy += rt2800_register_read(rt2x00dev, CH_BUSY_STA_SEC);
--+}
--+EXPORT_SYMBOL_GPL(rt2800_update_survey);
--+
-- static unsigned int rt2800_hw_beacon_base(struct rt2x00_dev *rt2x00dev,
-- 					  unsigned int index)
-- {
--@@ -12199,26 +12213,30 @@ int rt2800_get_survey(struct ieee80211_h
-- {
-- 	struct rt2x00_dev *rt2x00dev = hw->priv;
-- 	struct ieee80211_conf *conf = &hw->conf;
---	u32 idle, busy, busy_ext;
--+	struct rt2x00_chan_survey *chan_survey =
--+		   &rt2x00dev->chan_survey[idx];
--+	enum nl80211_band band = NL80211_BAND_2GHZ;
-- 
---	if (idx != 0)
--+	if (idx >= rt2x00dev->bands[band].n_channels) {
--+		idx -= rt2x00dev->bands[band].n_channels;
--+		band = NL80211_BAND_5GHZ;
--+	}
--+
--+	if (idx >= rt2x00dev->bands[band].n_channels)
-- 		return -ENOENT;
-- 
---	survey->channel = conf->chandef.chan;
--+	if (idx == 0)
--+		rt2800_update_survey(rt2x00dev);
-- 
---	idle = rt2800_register_read(rt2x00dev, CH_IDLE_STA);
---	busy = rt2800_register_read(rt2x00dev, CH_BUSY_STA);
---	busy_ext = rt2800_register_read(rt2x00dev, CH_BUSY_STA_SEC);
---
---	if (idle || busy) {
---		survey->filled = SURVEY_INFO_TIME |
---				 SURVEY_INFO_TIME_BUSY |
---				 SURVEY_INFO_TIME_EXT_BUSY;
---
---		survey->time = (idle + busy) / 1000;
---		survey->time_busy = busy / 1000;
---		survey->time_ext_busy = busy_ext / 1000;
---	}
--+	survey->channel = &rt2x00dev->bands[band].channels[idx];
--+
--+	survey->filled = SURVEY_INFO_TIME |
--+			 SURVEY_INFO_TIME_BUSY |
--+			 SURVEY_INFO_TIME_EXT_BUSY;
--+
--+	survey->time = div_u64(chan_survey->time_idle + chan_survey->time_busy, 1000);
--+	survey->time_busy = div_u64(chan_survey->time_busy, 1000);
--+	survey->time_ext_busy = div_u64(chan_survey->time_ext_busy, 1000);
-- 
-- 	if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
-- 		survey->filled |= SURVEY_INFO_IN_USE;
----- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
--+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
--@@ -243,6 +243,7 @@ bool rt2800_txstatus_timeout(struct rt2x
-- bool rt2800_txstatus_pending(struct rt2x00_dev *rt2x00dev);
-- 
-- void rt2800_watchdog(struct rt2x00_dev *rt2x00dev);
--+void rt2800_update_survey(struct rt2x00_dev *rt2x00dev);
-- 
-- void rt2800_write_beacon(struct queue_entry *entry, struct txentry_desc *txdesc);
-- void rt2800_clear_beacon(struct queue_entry *entry);
----- a/drivers/net/wireless/ralink/rt2x00/rt2800pci.c
--+++ b/drivers/net/wireless/ralink/rt2x00/rt2800pci.c
--@@ -360,6 +360,7 @@ static const struct rt2x00lib_ops rt2800
-- 	.gain_calibration	= rt2800_gain_calibration,
-- 	.vco_calibration	= rt2800_vco_calibration,
-- 	.watchdog		= rt2800_watchdog,
--+	.update_survey		= rt2800_update_survey,
-- 	.start_queue		= rt2800mmio_start_queue,
-- 	.kick_queue		= rt2800mmio_kick_queue,
-- 	.stop_queue		= rt2800mmio_stop_queue,
----- a/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
--+++ b/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
--@@ -214,6 +214,7 @@ static const struct rt2x00lib_ops rt2800
-- 	.gain_calibration	= rt2800_gain_calibration,
-- 	.vco_calibration	= rt2800_vco_calibration,
-- 	.watchdog		= rt2800_watchdog,
--+	.update_survey		= rt2800_update_survey,
-- 	.start_queue		= rt2800mmio_start_queue,
-- 	.kick_queue		= rt2800mmio_kick_queue,
-- 	.stop_queue		= rt2800mmio_stop_queue,
----- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
--+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
--@@ -183,6 +183,15 @@ struct rf_channel {
-- };
-- 
-- /*
--+ * Information structure for channel survey.
--+ */
--+struct rt2x00_chan_survey {
--+	u64 time_idle;
--+	u64 time_busy;
--+	u64 time_ext_busy;
--+};
--+
--+/*
--  * Channel information structure
--  */
-- struct channel_info {
--@@ -567,6 +576,7 @@ struct rt2x00lib_ops {
-- 	 * Data queue handlers.
-- 	 */
-- 	void (*watchdog) (struct rt2x00_dev *rt2x00dev);
--+	void (*update_survey) (struct rt2x00_dev *rt2x00dev);
-- 	void (*start_queue) (struct data_queue *queue);
-- 	void (*kick_queue) (struct data_queue *queue);
-- 	void (*stop_queue) (struct data_queue *queue);
--@@ -755,6 +765,7 @@ struct rt2x00_dev {
-- 	 */
-- 	struct ieee80211_hw *hw;
-- 	struct ieee80211_supported_band bands[NUM_NL80211_BANDS];
--+	struct rt2x00_chan_survey *chan_survey;
-- 	enum nl80211_band curr_band;
-- 	int curr_freq;
-- 
----- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
--+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
--@@ -1057,6 +1057,12 @@ static int rt2x00lib_probe_hw_modes(stru
-- 	if (!rates)
-- 		goto exit_free_channels;
-- 
--+	rt2x00dev->chan_survey =
--+		kcalloc(spec->num_channels, sizeof(struct rt2x00_chan_survey),
--+			GFP_KERNEL);
--+	if (!rt2x00dev->chan_survey)
--+		goto exit_free_rates;
--+
-- 	/*
-- 	 * Initialize Rate list.
-- 	 */
--@@ -1108,6 +1114,8 @@ static int rt2x00lib_probe_hw_modes(stru
-- 
-- 	return 0;
-- 
--+ exit_free_rates:
--+	kfree(rates);
--  exit_free_channels:
-- 	kfree(channels);
-- 	rt2x00_err(rt2x00dev, "Allocation ieee80211 modes failed\n");
----- a/drivers/net/wireless/ralink/rt2x00/rt2x00mac.c
--+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00mac.c
--@@ -317,6 +317,15 @@ int rt2x00mac_config(struct ieee80211_hw
-- 		return 0;
-- 
-- 	/*
--+	 * To provide correct survey data for survey-based ACS algorithm
--+	 * we have to save survey data for current channel before switching.
--+	 */
--+	if (rt2x00dev->ops->lib->update_survey &&
--+	    (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
--+		rt2x00dev->ops->lib->update_survey(rt2x00dev);
--+	}
--+
--+	/*
-- 	 * Some configuration parameters (e.g. channel and antenna values) can
-- 	 * only be set when the radio is enabled, but do require the RX to
-- 	 * be off. During this period we should keep link tuning enabled,
-diff --git a/package/kernel/mac80211/patches/rtl/002-v5.13-rtlwifi-implement-set_tim-by-update-beacon-content.patch b/package/kernel/mac80211/patches/rtl/002-v5.13-rtlwifi-implement-set_tim-by-update-beacon-content.patch
-deleted file mode 100644
-index 3daf65e967..0000000000
---- a/package/kernel/mac80211/patches/rtl/002-v5.13-rtlwifi-implement-set_tim-by-update-beacon-content.patch
-+++ /dev/null
-@@ -1,118 +0,0 @@
--Date: Mon, 19 Apr 2021 14:59:56 +0800
--From: Ping-Ke Shih <pkshih@realtek.com>
--To: <kvalo@codeaurora.org>
--CC: <linux-wireless@vger.kernel.org>, <mail@maciej.szmigiero.name>,
--        <Larry.Finger@lwfinger.net>
--Subject: [PATCH] rtlwifi: implement set_tim by update beacon content
--
--Once beacon content is changed, we update the content to wifi card by
--send_beacon_frame(). Then, STA with PS can wake up properly to receive its
--packets.
--
--Since we update beacon content to PCI wifi devices every beacon interval,
--the only one usb device, 8192CU, needs to update beacon content when
--mac80211 calling set_tim.
--
--Reported-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
--Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
--Tested-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
-----
-- drivers/net/wireless/realtek/rtlwifi/core.c | 32 +++++++++++++++++++++
-- drivers/net/wireless/realtek/rtlwifi/core.h |  1 +
-- drivers/net/wireless/realtek/rtlwifi/usb.c  |  3 ++
-- drivers/net/wireless/realtek/rtlwifi/wifi.h |  1 +
-- 4 files changed, 37 insertions(+)
--
----- a/drivers/net/wireless/realtek/rtlwifi/core.c
--+++ b/drivers/net/wireless/realtek/rtlwifi/core.c
--@@ -1018,6 +1018,25 @@ static void send_beacon_frame(struct iee
-- 	}
-- }
-- 
--+void rtl_update_beacon_work_callback(struct work_struct *work)
--+{
--+	struct rtl_works *rtlworks =
--+	    container_of(work, struct rtl_works, update_beacon_work);
--+	struct ieee80211_hw *hw = rtlworks->hw;
--+	struct rtl_priv *rtlpriv = rtl_priv(hw);
--+	struct ieee80211_vif *vif = rtlpriv->mac80211.vif;
--+
--+	if (!vif) {
--+		WARN_ONCE(true, "no vif to update beacon\n");
--+		return;
--+	}
--+
--+	mutex_lock(&rtlpriv->locks.conf_mutex);
--+	send_beacon_frame(hw, vif);
--+	mutex_unlock(&rtlpriv->locks.conf_mutex);
--+}
--+EXPORT_SYMBOL_GPL(rtl_update_beacon_work_callback);
--+
-- static void rtl_op_bss_info_changed(struct ieee80211_hw *hw,
-- 				    struct ieee80211_vif *vif,
-- 				    struct ieee80211_bss_conf *bss_conf,
--@@ -1747,6 +1766,18 @@ static void rtl_op_flush(struct ieee8021
-- 		rtlpriv->intf_ops->flush(hw, queues, drop);
-- }
-- 
--+static int rtl_op_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
--+			  bool set)
--+{
--+	struct rtl_priv *rtlpriv = rtl_priv(hw);
--+	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
--+
--+	if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CU)
--+		schedule_work(&rtlpriv->works.update_beacon_work);
--+
--+	return 0;
--+}
--+
-- /*	Description:
--  *		This routine deals with the Power Configuration CMD
--  *		 parsing for RTL8723/RTL8188E Series IC.
--@@ -1903,6 +1934,7 @@ const struct ieee80211_ops rtl_ops = {
-- 	.sta_add = rtl_op_sta_add,
-- 	.sta_remove = rtl_op_sta_remove,
-- 	.flush = rtl_op_flush,
--+	.set_tim = rtl_op_set_tim,
-- };
-- EXPORT_SYMBOL_GPL(rtl_ops);
-- 
----- a/drivers/net/wireless/realtek/rtlwifi/core.h
--+++ b/drivers/net/wireless/realtek/rtlwifi/core.h
--@@ -60,5 +60,6 @@ void rtl_bb_delay(struct ieee80211_hw *h
-- bool rtl_cmd_send_packet(struct ieee80211_hw *hw, struct sk_buff *skb);
-- bool rtl_btc_status_false(void);
-- void rtl_dm_diginit(struct ieee80211_hw *hw, u32 cur_igval);
--+void rtl_update_beacon_work_callback(struct work_struct *work);
-- 
-- #endif
----- a/drivers/net/wireless/realtek/rtlwifi/usb.c
--+++ b/drivers/net/wireless/realtek/rtlwifi/usb.c
--@@ -807,6 +807,7 @@ static void rtl_usb_stop(struct ieee8021
-- 
-- 	tasklet_kill(&rtlusb->rx_work_tasklet);
-- 	cancel_work_sync(&rtlpriv->works.lps_change_work);
--+	cancel_work_sync(&rtlpriv->works.update_beacon_work);
-- 
-- 	flush_workqueue(rtlpriv->works.rtl_wq);
-- 
--@@ -1033,6 +1034,8 @@ int rtl_usb_probe(struct usb_interface *
-- 		  rtl_fill_h2c_cmd_work_callback);
-- 	INIT_WORK(&rtlpriv->works.lps_change_work,
-- 		  rtl_lps_change_work_callback);
--+	INIT_WORK(&rtlpriv->works.update_beacon_work,
--+		  rtl_update_beacon_work_callback);
-- 
-- 	rtlpriv->usb_data_index = 0;
-- 	init_completion(&rtlpriv->firmware_loading_complete);
----- a/drivers/net/wireless/realtek/rtlwifi/wifi.h
--+++ b/drivers/net/wireless/realtek/rtlwifi/wifi.h
--@@ -2487,6 +2487,7 @@ struct rtl_works {
-- 
-- 	struct work_struct lps_change_work;
-- 	struct work_struct fill_h2c_cmd;
--+	struct work_struct update_beacon_work;
-- };
-- 
-- struct rtl_debug {
-diff --git a/package/kernel/mac80211/patches/subsys/010-sync-nl80211_h.patch b/package/kernel/mac80211/patches/subsys/010-sync-nl80211_h.patch
-deleted file mode 100644
-index e1f66ac1c3..0000000000
---- a/package/kernel/mac80211/patches/subsys/010-sync-nl80211_h.patch
-+++ /dev/null
-@@ -1,297 +0,0 @@
----- a/include/uapi/linux/nl80211.h
--+++ b/include/uapi/linux/nl80211.h
--@@ -655,6 +655,9 @@
--  *	When a security association was established on an 802.1X network using
--  *	fast transition, this event should be followed by an
--  *	%NL80211_CMD_PORT_AUTHORIZED event.
--+ *	Following a %NL80211_CMD_ROAM event userspace can issue
--+ *	%NL80211_CMD_GET_SCAN in order to obtain the scan information for the
--+ *	new BSS the card/driver roamed to.
--  * @NL80211_CMD_DISCONNECT: drop a given connection; also used to notify
--  *	userspace that a connection was dropped by the AP or due to other
--  *	reasons, for this the %NL80211_ATTR_DISCONNECTED_BY_AP and
--@@ -757,7 +760,8 @@
--  *	of any other interfaces, and other interfaces will again take
--  *	precedence when they are used.
--  *
--- * @NL80211_CMD_SET_WDS_PEER: Set the MAC address of the peer on a WDS interface.
--+ * @NL80211_CMD_SET_WDS_PEER: Set the MAC address of the peer on a WDS interface
--+ *	(no longer supported).
--  *
--  * @NL80211_CMD_SET_MULTICAST_TO_UNICAST: Configure if this AP should perform
--  *	multicast to unicast conversion. When enabled, all multicast packets
--@@ -1177,6 +1181,10 @@
--  *	includes the contents of the frame. %NL80211_ATTR_ACK flag is included
--  *	if the recipient acknowledged the frame.
--  *
--+ * @NL80211_CMD_SET_SAR_SPECS: SAR power limitation configuration is
--+ *	passed using %NL80211_ATTR_SAR_SPEC. %NL80211_ATTR_WIPHY is used to
--+ *	specify the wiphy index to be applied to.
--+ *
--  * @NL80211_CMD_MAX: highest used command number
--  * @__NL80211_CMD_AFTER_LAST: internal use
--  */
--@@ -1407,6 +1415,8 @@ enum nl80211_commands {
-- 
-- 	NL80211_CMD_CONTROL_PORT_FRAME_TX_STATUS,
-- 
--+	NL80211_CMD_SET_SAR_SPECS,
--+
-- 	/* add new commands above here */
-- 
-- 	/* used to define NL80211_CMD_MAX below */
--@@ -1750,8 +1760,9 @@ enum nl80211_commands {
--  *	specify just a single bitrate, which is to be used for the beacon.
--  *	The driver must also specify support for this with the extended
--  *	features NL80211_EXT_FEATURE_BEACON_RATE_LEGACY,
--- *	NL80211_EXT_FEATURE_BEACON_RATE_HT and
--- *	NL80211_EXT_FEATURE_BEACON_RATE_VHT.
--+ *	NL80211_EXT_FEATURE_BEACON_RATE_HT,
--+ *	NL80211_EXT_FEATURE_BEACON_RATE_VHT and
--+ *	NL80211_EXT_FEATURE_BEACON_RATE_HE.
--  *
--  * @NL80211_ATTR_FRAME_MATCH: A binary attribute which typically must contain
--  *	at least one byte, currently used with @NL80211_CMD_REGISTER_FRAME.
--@@ -1955,8 +1966,15 @@ enum nl80211_commands {
--  * @NL80211_ATTR_PROBE_RESP: Probe Response template data. Contains the entire
--  *	probe-response frame. The DA field in the 802.11 header is zero-ed out,
--  *	to be filled by the FW.
--- * @NL80211_ATTR_DISABLE_HT:  Force HT capable interfaces to disable
--- *      this feature.  Currently, only supported in mac80211 drivers.
--+ * @NL80211_ATTR_DISABLE_HT: Force HT capable interfaces to disable
--+ *      this feature during association. This is a flag attribute.
--+ *	Currently only supported in mac80211 drivers.
--+ * @NL80211_ATTR_DISABLE_VHT: Force VHT capable interfaces to disable
--+ *      this feature during association. This is a flag attribute.
--+ *	Currently only supported in mac80211 drivers.
--+ * @NL80211_ATTR_DISABLE_HE: Force HE capable interfaces to disable
--+ *      this feature during association. This is a flag attribute.
--+ *	Currently only supported in mac80211 drivers.
--  * @NL80211_ATTR_HT_CAPABILITY_MASK: Specify which bits of the
--  *      ATTR_HT_CAPABILITY to which attention should be paid.
--  *      Currently, only mac80211 NICs support this feature.
--@@ -2077,7 +2095,8 @@ enum nl80211_commands {
--  *	until the channel switch event.
--  * @NL80211_ATTR_CH_SWITCH_BLOCK_TX: flag attribute specifying that transmission
--  *	must be blocked on the current channel (before the channel switch
--- *	operation).
--+ *	operation). Also included in the channel switch started event if quiet
--+ *	was requested by the AP.
--  * @NL80211_ATTR_CSA_IES: Nested set of attributes containing the IE information
--  *	for the time while performing a channel switch.
--  * @NL80211_ATTR_CNTDWN_OFFS_BEACON: An array of offsets (u16) to the channel
--@@ -2527,6 +2546,20 @@ enum nl80211_commands {
--  *	override mask. Used with NL80211_ATTR_S1G_CAPABILITY in
--  *	NL80211_CMD_ASSOCIATE or NL80211_CMD_CONNECT.
--  *
--+ * @NL80211_ATTR_SAE_PWE: Indicates the mechanism(s) allowed for SAE PWE
--+ *	derivation in WPA3-Personal networks which are using SAE authentication.
--+ *	This is a u8 attribute that encapsulates one of the values from
--+ *	&enum nl80211_sae_pwe_mechanism.
--+ *
--+ * @NL80211_ATTR_SAR_SPEC: SAR power limitation specification when
--+ *	used with %NL80211_CMD_SET_SAR_SPECS. The message contains fields
--+ *	of %nl80211_sar_attrs which specifies the sar type and related
--+ *	sar specs. Sar specs contains array of %nl80211_sar_specs_attrs.
--+ *
--+ * @NL80211_ATTR_RECONNECT_REQUESTED: flag attribute, used with deauth and
--+ *	disassoc events to indicate that an immediate reconnect to the AP
--+ *	is desired.
--+ *
--  * @NUM_NL80211_ATTR: total number of nl80211_attrs available
--  * @NL80211_ATTR_MAX: highest attribute number currently defined
--  * @__NL80211_ATTR_AFTER_LAST: internal use
--@@ -3016,6 +3049,14 @@ enum nl80211_attrs {
-- 	NL80211_ATTR_S1G_CAPABILITY,
-- 	NL80211_ATTR_S1G_CAPABILITY_MASK,
-- 
--+	NL80211_ATTR_SAE_PWE,
--+
--+	NL80211_ATTR_RECONNECT_REQUESTED,
--+
--+	NL80211_ATTR_SAR_SPEC,
--+
--+	NL80211_ATTR_DISABLE_HE,
--+
-- 	/* add attributes here, update the policy in nl80211.c */
-- 
-- 	__NL80211_ATTR_AFTER_LAST,
--@@ -5896,6 +5937,19 @@ enum nl80211_feature_flags {
--  * @NL80211_EXT_FEATURE_UNSOL_BCAST_PROBE_RESP: Driver/device supports
--  *	unsolicited broadcast probe response transmission
--  *
--+ * @NL80211_EXT_FEATURE_BEACON_RATE_HE: Driver supports beacon rate
--+ *	configuration (AP/mesh) with HE rates.
--+ *
--+ * @NL80211_EXT_FEATURE_SECURE_LTF: Device supports secure LTF measurement
--+ *      exchange protocol.
--+ *
--+ * @NL80211_EXT_FEATURE_SECURE_RTT: Device supports secure RTT measurement
--+ *      exchange protocol.
--+ *
--+ * @NL80211_EXT_FEATURE_PROT_RANGE_NEGO_AND_MEASURE: Device supports management
--+ *      frame protection for all management frames exchanged during the
--+ *      negotiation and range measurement procedure.
--+ *
--  * @NUM_NL80211_EXT_FEATURES: number of extended features.
--  * @MAX_NL80211_EXT_FEATURES: highest extended feature index.
--  */
--@@ -5956,6 +6010,10 @@ enum nl80211_ext_feature_index {
-- 	NL80211_EXT_FEATURE_SAE_OFFLOAD_AP,
-- 	NL80211_EXT_FEATURE_FILS_DISCOVERY,
-- 	NL80211_EXT_FEATURE_UNSOL_BCAST_PROBE_RESP,
--+	NL80211_EXT_FEATURE_BEACON_RATE_HE,
--+	NL80211_EXT_FEATURE_SECURE_LTF,
--+	NL80211_EXT_FEATURE_SECURE_RTT,
--+	NL80211_EXT_FEATURE_PROT_RANGE_NEGO_AND_MEASURE,
-- 
-- 	/* add new features before the definition below */
-- 	NUM_NL80211_EXT_FEATURES,
--@@ -6253,11 +6311,13 @@ struct nl80211_vendor_cmd_info {
--  * @NL80211_TDLS_PEER_HT: TDLS peer is HT capable.
--  * @NL80211_TDLS_PEER_VHT: TDLS peer is VHT capable.
--  * @NL80211_TDLS_PEER_WMM: TDLS peer is WMM capable.
--+ * @NL80211_TDLS_PEER_HE: TDLS peer is HE capable.
--  */
-- enum nl80211_tdls_peer_capability {
-- 	NL80211_TDLS_PEER_HT = 1<<0,
-- 	NL80211_TDLS_PEER_VHT = 1<<1,
-- 	NL80211_TDLS_PEER_WMM = 1<<2,
--+	NL80211_TDLS_PEER_HE = 1<<3,
-- };
-- 
-- /**
--@@ -6849,6 +6909,9 @@ enum nl80211_peer_measurement_ftm_capa {
--  *      if neither %NL80211_PMSR_FTM_REQ_ATTR_TRIGGER_BASED nor
--  *	%NL80211_PMSR_FTM_REQ_ATTR_NON_TRIGGER_BASED is set, EDCA based
--  *	ranging will be used.
--+ * @NL80211_PMSR_FTM_REQ_ATTR_LMR_FEEDBACK: negotiate for LMR feedback. Only
--+ *	valid if either %NL80211_PMSR_FTM_REQ_ATTR_TRIGGER_BASED or
--+ *	%NL80211_PMSR_FTM_REQ_ATTR_NON_TRIGGER_BASED is set.
--  *
--  * @NUM_NL80211_PMSR_FTM_REQ_ATTR: internal
--  * @NL80211_PMSR_FTM_REQ_ATTR_MAX: highest attribute number
--@@ -6867,6 +6930,7 @@ enum nl80211_peer_measurement_ftm_req {
-- 	NL80211_PMSR_FTM_REQ_ATTR_REQUEST_CIVICLOC,
-- 	NL80211_PMSR_FTM_REQ_ATTR_TRIGGER_BASED,
-- 	NL80211_PMSR_FTM_REQ_ATTR_NON_TRIGGER_BASED,
--+	NL80211_PMSR_FTM_REQ_ATTR_LMR_FEEDBACK,
-- 
-- 	/* keep last */
-- 	NUM_NL80211_PMSR_FTM_REQ_ATTR,
--@@ -7124,4 +7188,115 @@ enum nl80211_unsol_bcast_probe_resp_attr
-- 	NL80211_UNSOL_BCAST_PROBE_RESP_ATTR_MAX =
-- 		__NL80211_UNSOL_BCAST_PROBE_RESP_ATTR_LAST - 1
-- };
--+
--+/**
--+ * enum nl80211_sae_pwe_mechanism - The mechanism(s) allowed for SAE PWE
--+ *	derivation. Applicable only when WPA3-Personal SAE authentication is
--+ *	used.
--+ *
--+ * @NL80211_SAE_PWE_UNSPECIFIED: not specified, used internally to indicate that
--+ *	attribute is not present from userspace.
--+ * @NL80211_SAE_PWE_HUNT_AND_PECK: hunting-and-pecking loop only
--+ * @NL80211_SAE_PWE_HASH_TO_ELEMENT: hash-to-element only
--+ * @NL80211_SAE_PWE_BOTH: both hunting-and-pecking loop and hash-to-element
--+ *	can be used.
--+ */
--+enum nl80211_sae_pwe_mechanism {
--+	NL80211_SAE_PWE_UNSPECIFIED,
--+	NL80211_SAE_PWE_HUNT_AND_PECK,
--+	NL80211_SAE_PWE_HASH_TO_ELEMENT,
--+	NL80211_SAE_PWE_BOTH,
--+};
--+
--+/**
--+ * enum nl80211_sar_type - type of SAR specs
--+ *
--+ * @NL80211_SAR_TYPE_POWER: power limitation specified in 0.25dBm unit
--+ *
--+ */
--+enum nl80211_sar_type {
--+	NL80211_SAR_TYPE_POWER,
--+
--+	/* add new type here */
--+
--+	/* Keep last */
--+	NUM_NL80211_SAR_TYPE,
--+};
--+
--+/**
--+ * enum nl80211_sar_attrs - Attributes for SAR spec
--+ *
--+ * @NL80211_SAR_ATTR_TYPE: the SAR type as defined in &enum nl80211_sar_type.
--+ *
--+ * @NL80211_SAR_ATTR_SPECS: Nested array of SAR power
--+ *	limit specifications. Each specification contains a set
--+ *	of %nl80211_sar_specs_attrs.
--+ *
--+ *	For SET operation, it contains array of %NL80211_SAR_ATTR_SPECS_POWER
--+ *	and %NL80211_SAR_ATTR_SPECS_RANGE_INDEX.
--+ *
--+ *	For sar_capa dump, it contains array of
--+ *	%NL80211_SAR_ATTR_SPECS_START_FREQ
--+ *	and %NL80211_SAR_ATTR_SPECS_END_FREQ.
--+ *
--+ * @__NL80211_SAR_ATTR_LAST: Internal
--+ * @NL80211_SAR_ATTR_MAX: highest sar attribute
--+ *
--+ * These attributes are used with %NL80211_CMD_SET_SAR_SPEC
--+ */
--+enum nl80211_sar_attrs {
--+	__NL80211_SAR_ATTR_INVALID,
--+
--+	NL80211_SAR_ATTR_TYPE,
--+	NL80211_SAR_ATTR_SPECS,
--+
--+	__NL80211_SAR_ATTR_LAST,
--+	NL80211_SAR_ATTR_MAX = __NL80211_SAR_ATTR_LAST - 1,
--+};
--+
--+/**
--+ * enum nl80211_sar_specs_attrs - Attributes for SAR power limit specs
--+ *
--+ * @NL80211_SAR_ATTR_SPECS_POWER: Required (s32)value to specify the actual
--+ *	power limit value in units of 0.25 dBm if type is
--+ *	NL80211_SAR_TYPE_POWER. (i.e., a value of 44 represents 11 dBm).
--+ *	0 means userspace doesn't have SAR limitation on this associated range.
--+ *
--+ * @NL80211_SAR_ATTR_SPECS_RANGE_INDEX: Required (u32) value to specify the
--+ *	index of exported freq range table and the associated power limitation
--+ *	is applied to this range.
--+ *
--+ *	Userspace isn't required to set all the ranges advertised by WLAN driver,
--+ *	and userspace can skip some certain ranges. These skipped ranges don't
--+ *	have SAR limitations, and they are same as setting the
--+ *	%NL80211_SAR_ATTR_SPECS_POWER to any unreasonable high value because any
--+ *	value higher than regulatory allowed value just means SAR power
--+ *	limitation is removed, but it's required to set at least one range.
--+ *	It's not allowed to set duplicated range in one SET operation.
--+ *
--+ *	Every SET operation overwrites previous SET operation.
--+ *
--+ * @NL80211_SAR_ATTR_SPECS_START_FREQ: Required (u32) value to specify the start
--+ *	frequency of this range edge when registering SAR capability to wiphy.
--+ *	It's not a channel center frequency. The unit is kHz.
--+ *
--+ * @NL80211_SAR_ATTR_SPECS_END_FREQ: Required (u32) value to specify the end
--+ *	frequency of this range edge when registering SAR capability to wiphy.
--+ *	It's not a channel center frequency. The unit is kHz.
--+ *
--+ * @__NL80211_SAR_ATTR_SPECS_LAST: Internal
--+ * @NL80211_SAR_ATTR_SPECS_MAX: highest sar specs attribute
--+ */
--+enum nl80211_sar_specs_attrs {
--+	__NL80211_SAR_ATTR_SPECS_INVALID,
--+
--+	NL80211_SAR_ATTR_SPECS_POWER,
--+	NL80211_SAR_ATTR_SPECS_RANGE_INDEX,
--+	NL80211_SAR_ATTR_SPECS_START_FREQ,
--+	NL80211_SAR_ATTR_SPECS_END_FREQ,
--+
--+	__NL80211_SAR_ATTR_SPECS_LAST,
--+	NL80211_SAR_ATTR_SPECS_MAX = __NL80211_SAR_ATTR_SPECS_LAST - 1,
--+};
--+
-- #endif /* __LINUX_NL80211_H */
-diff --git a/package/kernel/mac80211/patches/subsys/100-remove-cryptoapi-dependencies.patch b/package/kernel/mac80211/patches/subsys/100-remove-cryptoapi-dependencies.patch
-deleted file mode 100644
-index ca02dfb06f..0000000000
---- a/package/kernel/mac80211/patches/subsys/100-remove-cryptoapi-dependencies.patch
-+++ /dev/null
-@@ -1,699 +0,0 @@
----- a/net/mac80211/Makefile
--+++ b/net/mac80211/Makefile
--@@ -7,7 +7,6 @@ mac80211-y := \
-- 	driver-ops.o \
-- 	sta_info.o \
-- 	wep.o \
---	aead_api.o \
-- 	wpa.o \
-- 	scan.o offchannel.o \
-- 	ht.o agg-tx.o agg-rx.o \
--@@ -19,8 +18,8 @@ mac80211-y := \
-- 	rate.o \
-- 	michael.o \
-- 	tkip.o \
--+	aes_ccm.o \
-- 	aes_cmac.o \
---	aes_gmac.o \
-- 	fils_aead.o \
-- 	cfg.o \
-- 	ethtool.o \
----- a/net/mac80211/aead_api.c
--+++ /dev/null
--@@ -1,113 +0,0 @@
---// SPDX-License-Identifier: GPL-2.0-only
---/*
--- * Copyright 2003-2004, Instant802 Networks, Inc.
--- * Copyright 2005-2006, Devicescape Software, Inc.
--- * Copyright 2014-2015, Qualcomm Atheros, Inc.
--- *
--- * Rewrite: Copyright (C) 2013 Linaro Ltd <ard.biesheuvel@linaro.org>
--- */
---
---#include <linux/kernel.h>
---#include <linux/types.h>
---#include <linux/err.h>
---#include <linux/scatterlist.h>
---#include <crypto/aead.h>
---
---#include "aead_api.h"
---
---int aead_encrypt(struct crypto_aead *tfm, u8 *b_0, u8 *aad, size_t aad_len,
---		 u8 *data, size_t data_len, u8 *mic)
---{
---	size_t mic_len = crypto_aead_authsize(tfm);
---	struct scatterlist sg[3];
---	struct aead_request *aead_req;
---	int reqsize = sizeof(*aead_req) + crypto_aead_reqsize(tfm);
---	u8 *__aad;
---	int ret;
---
---	aead_req = kzalloc(reqsize + aad_len, GFP_ATOMIC);
---	if (!aead_req)
---		return -ENOMEM;
---
---	__aad = (u8 *)aead_req + reqsize;
---	memcpy(__aad, aad, aad_len);
---
---	sg_init_table(sg, 3);
---	sg_set_buf(&sg[0], __aad, aad_len);
---	sg_set_buf(&sg[1], data, data_len);
---	sg_set_buf(&sg[2], mic, mic_len);
---
---	aead_request_set_tfm(aead_req, tfm);
---	aead_request_set_crypt(aead_req, sg, sg, data_len, b_0);
---	aead_request_set_ad(aead_req, sg[0].length);
---
---	ret = crypto_aead_encrypt(aead_req);
---	kfree_sensitive(aead_req);
---
---	return ret;
---}
---
---int aead_decrypt(struct crypto_aead *tfm, u8 *b_0, u8 *aad, size_t aad_len,
---		 u8 *data, size_t data_len, u8 *mic)
---{
---	size_t mic_len = crypto_aead_authsize(tfm);
---	struct scatterlist sg[3];
---	struct aead_request *aead_req;
---	int reqsize = sizeof(*aead_req) + crypto_aead_reqsize(tfm);
---	u8 *__aad;
---	int err;
---
---	if (data_len == 0)
---		return -EINVAL;
---
---	aead_req = kzalloc(reqsize + aad_len, GFP_ATOMIC);
---	if (!aead_req)
---		return -ENOMEM;
---
---	__aad = (u8 *)aead_req + reqsize;
---	memcpy(__aad, aad, aad_len);
---
---	sg_init_table(sg, 3);
---	sg_set_buf(&sg[0], __aad, aad_len);
---	sg_set_buf(&sg[1], data, data_len);
---	sg_set_buf(&sg[2], mic, mic_len);
---
---	aead_request_set_tfm(aead_req, tfm);
---	aead_request_set_crypt(aead_req, sg, sg, data_len + mic_len, b_0);
---	aead_request_set_ad(aead_req, sg[0].length);
---
---	err = crypto_aead_decrypt(aead_req);
---	kfree_sensitive(aead_req);
---
---	return err;
---}
---
---struct crypto_aead *
---aead_key_setup_encrypt(const char *alg, const u8 key[],
---		       size_t key_len, size_t mic_len)
---{
---	struct crypto_aead *tfm;
---	int err;
---
---	tfm = crypto_alloc_aead(alg, 0, CRYPTO_ALG_ASYNC);
---	if (IS_ERR(tfm))
---		return tfm;
---
---	err = crypto_aead_setkey(tfm, key, key_len);
---	if (err)
---		goto free_aead;
---	err = crypto_aead_setauthsize(tfm, mic_len);
---	if (err)
---		goto free_aead;
---
---	return tfm;
---
---free_aead:
---	crypto_free_aead(tfm);
---	return ERR_PTR(err);
---}
---
---void aead_key_free(struct crypto_aead *tfm)
---{
---	crypto_free_aead(tfm);
---}
----- a/net/mac80211/aead_api.h
--+++ /dev/null
--@@ -1,23 +0,0 @@
---/* SPDX-License-Identifier: GPL-2.0-only */
---
---#ifndef _AEAD_API_H
---#define _AEAD_API_H
---
---#include <crypto/aead.h>
---#include <linux/crypto.h>
---
---struct crypto_aead *
---aead_key_setup_encrypt(const char *alg, const u8 key[],
---		       size_t key_len, size_t mic_len);
---
---int aead_encrypt(struct crypto_aead *tfm, u8 *b_0, u8 *aad,
---		 size_t aad_len, u8 *data,
---		 size_t data_len, u8 *mic);
---
---int aead_decrypt(struct crypto_aead *tfm, u8 *b_0, u8 *aad,
---		 size_t aad_len, u8 *data,
---		 size_t data_len, u8 *mic);
---
---void aead_key_free(struct crypto_aead *tfm);
---
---#endif /* _AEAD_API_H */
----- a/net/mac80211/aes_ccm.h
--+++ b/net/mac80211/aes_ccm.h
--@@ -7,39 +7,17 @@
-- #ifndef AES_CCM_H
-- #define AES_CCM_H
-- 
---#include "aead_api.h"
--+#include <linux/crypto.h>
-- 
---#define CCM_AAD_LEN	32
---
---static inline struct crypto_aead *
---ieee80211_aes_key_setup_encrypt(const u8 key[], size_t key_len, size_t mic_len)
---{
---	return aead_key_setup_encrypt("ccm(aes)", key, key_len, mic_len);
---}
---
---static inline int
---ieee80211_aes_ccm_encrypt(struct crypto_aead *tfm,
---			  u8 *b_0, u8 *aad, u8 *data,
---			  size_t data_len, u8 *mic)
---{
---	return aead_encrypt(tfm, b_0, aad + 2,
---			    be16_to_cpup((__be16 *)aad),
---			    data, data_len, mic);
---}
---
---static inline int
---ieee80211_aes_ccm_decrypt(struct crypto_aead *tfm,
---			  u8 *b_0, u8 *aad, u8 *data,
---			  size_t data_len, u8 *mic)
---{
---	return aead_decrypt(tfm, b_0, aad + 2,
---			    be16_to_cpup((__be16 *)aad),
---			    data, data_len, mic);
---}
---
---static inline void ieee80211_aes_key_free(struct crypto_aead *tfm)
---{
---	return aead_key_free(tfm);
---}
--+struct crypto_cipher *ieee80211_aes_key_setup_encrypt(const u8 key[],
--+						      size_t key_len,
--+						      size_t mic_len);
--+void ieee80211_aes_ccm_encrypt(struct crypto_cipher *tfm, u8 *b_0, u8 *aad,
--+			       u8 *data, size_t data_len, u8 *mic,
--+			       size_t mic_len);
--+int ieee80211_aes_ccm_decrypt(struct crypto_cipher *tfm, u8 *b_0, u8 *aad,
--+			      u8 *data, size_t data_len, u8 *mic,
--+			      size_t mic_len);
--+void ieee80211_aes_key_free(struct crypto_cipher *tfm);
-- 
-- #endif /* AES_CCM_H */
----- /dev/null
--+++ b/net/mac80211/aes_gcm.c
--@@ -0,0 +1,109 @@
--+/*
--+ * Copyright 2014-2015, Qualcomm Atheros, Inc.
--+ *
--+ * This program is free software; you can redistribute it and/or modify
--+ * it under the terms of the GNU General Public License version 2 as
--+ * published by the Free Software Foundation.
--+ */
--+
--+#include <linux/kernel.h>
--+#include <linux/types.h>
--+#include <linux/err.h>
--+#include <crypto/aead.h>
--+
--+#include <net/mac80211.h>
--+#include "key.h"
--+#include "aes_gcm.h"
--+
--+int ieee80211_aes_gcm_encrypt(struct crypto_aead *tfm, u8 *j_0, u8 *aad,
--+			      u8 *data, size_t data_len, u8 *mic)
--+{
--+	struct scatterlist sg[3];
--+	struct aead_request *aead_req;
--+	int reqsize = sizeof(*aead_req) + crypto_aead_reqsize(tfm);
--+	u8 *__aad;
--+
--+	aead_req = kzalloc(reqsize + GCM_AAD_LEN, GFP_ATOMIC);
--+	if (!aead_req)
--+		return -ENOMEM;
--+
--+	__aad = (u8 *)aead_req + reqsize;
--+	memcpy(__aad, aad, GCM_AAD_LEN);
--+
--+	sg_init_table(sg, 3);
--+	sg_set_buf(&sg[0], &__aad[2], be16_to_cpup((__be16 *)__aad));
--+	sg_set_buf(&sg[1], data, data_len);
--+	sg_set_buf(&sg[2], mic, IEEE80211_GCMP_MIC_LEN);
--+
--+	aead_request_set_tfm(aead_req, tfm);
--+	aead_request_set_crypt(aead_req, sg, sg, data_len, j_0);
--+	aead_request_set_ad(aead_req, sg[0].length);
--+
--+	crypto_aead_encrypt(aead_req);
--+	kzfree(aead_req);
--+	return 0;
--+}
--+
--+int ieee80211_aes_gcm_decrypt(struct crypto_aead *tfm, u8 *j_0, u8 *aad,
--+			      u8 *data, size_t data_len, u8 *mic)
--+{
--+	struct scatterlist sg[3];
--+	struct aead_request *aead_req;
--+	int reqsize = sizeof(*aead_req) + crypto_aead_reqsize(tfm);
--+	u8 *__aad;
--+	int err;
--+
--+	if (data_len == 0)
--+		return -EINVAL;
--+
--+	aead_req = kzalloc(reqsize + GCM_AAD_LEN, GFP_ATOMIC);
--+	if (!aead_req)
--+		return -ENOMEM;
--+
--+	__aad = (u8 *)aead_req + reqsize;
--+	memcpy(__aad, aad, GCM_AAD_LEN);
--+
--+	sg_init_table(sg, 3);
--+	sg_set_buf(&sg[0], &__aad[2], be16_to_cpup((__be16 *)__aad));
--+	sg_set_buf(&sg[1], data, data_len);
--+	sg_set_buf(&sg[2], mic, IEEE80211_GCMP_MIC_LEN);
--+
--+	aead_request_set_tfm(aead_req, tfm);
--+	aead_request_set_crypt(aead_req, sg, sg,
--+			       data_len + IEEE80211_GCMP_MIC_LEN, j_0);
--+	aead_request_set_ad(aead_req, sg[0].length);
--+
--+	err = crypto_aead_decrypt(aead_req);
--+	kzfree(aead_req);
--+
--+	return err;
--+}
--+
--+struct crypto_aead *ieee80211_aes_gcm_key_setup_encrypt(const u8 key[],
--+							size_t key_len)
--+{
--+	struct crypto_aead *tfm;
--+	int err;
--+
--+	tfm = crypto_alloc_aead("gcm(aes)", 0, CRYPTO_ALG_ASYNC);
--+	if (IS_ERR(tfm))
--+		return tfm;
--+
--+	err = crypto_aead_setkey(tfm, key, key_len);
--+	if (err)
--+		goto free_aead;
--+	err = crypto_aead_setauthsize(tfm, IEEE80211_GCMP_MIC_LEN);
--+	if (err)
--+		goto free_aead;
--+
--+	return tfm;
--+
--+free_aead:
--+	crypto_free_aead(tfm);
--+	return ERR_PTR(err);
--+}
--+
--+void ieee80211_aes_gcm_key_free(struct crypto_aead *tfm)
--+{
--+	crypto_free_aead(tfm);
--+}
----- a/net/mac80211/aes_gcm.h
--+++ b/net/mac80211/aes_gcm.h
--@@ -6,38 +6,30 @@
-- #ifndef AES_GCM_H
-- #define AES_GCM_H
-- 
---#include "aead_api.h"
--+#include <linux/crypto.h>
-- 
---#define GCM_AAD_LEN	32
---
---static inline int ieee80211_aes_gcm_encrypt(struct crypto_aead *tfm,
---					    u8 *j_0, u8 *aad,  u8 *data,
---					    size_t data_len, u8 *mic)
--+static inline void
--+ieee80211_aes_gcm_encrypt(struct crypto_aead *tfm, u8 *j_0, u8 *aad,
--+			  u8 *data, size_t data_len, u8 *mic)
-- {
---	return aead_encrypt(tfm, j_0, aad + 2,
---			    be16_to_cpup((__be16 *)aad),
---			    data, data_len, mic);
-- }
-- 
---static inline int ieee80211_aes_gcm_decrypt(struct crypto_aead *tfm,
---					    u8 *j_0, u8 *aad, u8 *data,
---					    size_t data_len, u8 *mic)
--+static inline int
--+ieee80211_aes_gcm_decrypt(struct crypto_aead *tfm, u8 *j_0, u8 *aad,
--+			  u8 *data, size_t data_len, u8 *mic)
-- {
---	return aead_decrypt(tfm, j_0, aad + 2,
---			    be16_to_cpup((__be16 *)aad),
---			    data, data_len, mic);
--+    return -EOPNOTSUPP;
-- }
-- 
-- static inline struct crypto_aead *
-- ieee80211_aes_gcm_key_setup_encrypt(const u8 key[], size_t key_len)
-- {
---	return aead_key_setup_encrypt("gcm(aes)", key,
---				      key_len, IEEE80211_GCMP_MIC_LEN);
--+    return NULL;
-- }
-- 
---static inline void ieee80211_aes_gcm_key_free(struct crypto_aead *tfm)
--+static inline void
--+ieee80211_aes_gcm_key_free(struct crypto_aead *tfm)
-- {
---	return aead_key_free(tfm);
-- }
-- 
-- #endif /* AES_GCM_H */
----- a/net/mac80211/wpa.c
--+++ b/net/mac80211/wpa.c
--@@ -312,7 +312,8 @@ ieee80211_crypto_tkip_decrypt(struct iee
-- }
-- 
-- 
---static void ccmp_special_blocks(struct sk_buff *skb, u8 *pn, u8 *b_0, u8 *aad)
--+static void ccmp_special_blocks(struct sk_buff *skb, u8 *pn, u8 *b_0, u8 *aad,
--+				u16 data_len)
-- {
-- 	__le16 mask_fc;
-- 	int a4_included, mgmt;
--@@ -342,14 +343,8 @@ static void ccmp_special_blocks(struct s
-- 	else
-- 		qos_tid = 0;
-- 
---	/* In CCM, the initial vectors (IV) used for CTR mode encryption and CBC
---	 * mode authentication are not allowed to collide, yet both are derived
---	 * from this vector b_0. We only set L := 1 here to indicate that the
---	 * data size can be represented in (L+1) bytes. The CCM layer will take
---	 * care of storing the data length in the top (L+1) bytes and setting
---	 * and clearing the other bits as is required to derive the two IVs.
---	 */
---	b_0[0] = 0x1;
--+	/* First block, b_0 */
--+	b_0[0] = 0x59; /* flags: Adata: 1, M: 011, L: 001 */
-- 
-- 	/* Nonce: Nonce Flags | A2 | PN
-- 	 * Nonce Flags: Priority (b0..b3) | Management (b4) | Reserved (b5..b7)
--@@ -357,6 +352,8 @@ static void ccmp_special_blocks(struct s
-- 	b_0[1] = qos_tid | (mgmt << 4);
-- 	memcpy(&b_0[2], hdr->addr2, ETH_ALEN);
-- 	memcpy(&b_0[8], pn, IEEE80211_CCMP_PN_LEN);
--+	/* l(m) */
--+	put_unaligned_be16(data_len, &b_0[14]);
-- 
-- 	/* AAD (extra authenticate-only data) / masked 802.11 header
-- 	 * FC | A1 | A2 | A3 | SC | [A4] | [QC] */
--@@ -413,7 +410,7 @@ static int ccmp_encrypt_skb(struct ieee8
-- 	u8 *pos;
-- 	u8 pn[6];
-- 	u64 pn64;
---	u8 aad[CCM_AAD_LEN];
--+	u8 aad[2 * AES_BLOCK_SIZE];
-- 	u8 b_0[AES_BLOCK_SIZE];
-- 
-- 	if (info->control.hw_key &&
--@@ -468,9 +465,11 @@ static int ccmp_encrypt_skb(struct ieee8
-- 		return 0;
-- 
-- 	pos += IEEE80211_CCMP_HDR_LEN;
---	ccmp_special_blocks(skb, pn, b_0, aad);
---	return ieee80211_aes_ccm_encrypt(key->u.ccmp.tfm, b_0, aad, pos, len,
---					 skb_put(skb, mic_len));
--+	ccmp_special_blocks(skb, pn, b_0, aad, len);
--+	ieee80211_aes_ccm_encrypt(key->u.ccmp.tfm, b_0, aad, pos, len,
--+				  skb_put(skb, mic_len), mic_len);
--+
--+	return 0;
-- }
-- 
-- 
--@@ -543,13 +542,13 @@ ieee80211_crypto_ccmp_decrypt(struct iee
-- 			u8 aad[2 * AES_BLOCK_SIZE];
-- 			u8 b_0[AES_BLOCK_SIZE];
-- 			/* hardware didn't decrypt/verify MIC */
---			ccmp_special_blocks(skb, pn, b_0, aad);
--+			ccmp_special_blocks(skb, pn, b_0, aad, data_len);
-- 
-- 			if (ieee80211_aes_ccm_decrypt(
-- 				    key->u.ccmp.tfm, b_0, aad,
-- 				    skb->data + hdrlen + IEEE80211_CCMP_HDR_LEN,
-- 				    data_len,
---				    skb->data + skb->len - mic_len))
--+				    skb->data + skb->len - mic_len, mic_len))
-- 				return RX_DROP_UNUSABLE;
-- 		}
-- 
--@@ -646,7 +645,7 @@ static int gcmp_encrypt_skb(struct ieee8
-- 	u8 *pos;
-- 	u8 pn[6];
-- 	u64 pn64;
---	u8 aad[GCM_AAD_LEN];
--+	u8 aad[2 * AES_BLOCK_SIZE];
-- 	u8 j_0[AES_BLOCK_SIZE];
-- 
-- 	if (info->control.hw_key &&
--@@ -703,8 +702,10 @@ static int gcmp_encrypt_skb(struct ieee8
-- 
-- 	pos += IEEE80211_GCMP_HDR_LEN;
-- 	gcmp_special_blocks(skb, pn, j_0, aad);
---	return ieee80211_aes_gcm_encrypt(key->u.gcmp.tfm, j_0, aad, pos, len,
---					 skb_put(skb, IEEE80211_GCMP_MIC_LEN));
--+	ieee80211_aes_gcm_encrypt(key->u.gcmp.tfm, j_0, aad, pos, len,
--+				  skb_put(skb, IEEE80211_GCMP_MIC_LEN));
--+
--+	return 0;
-- }
-- 
-- ieee80211_tx_result
--@@ -1133,9 +1134,9 @@ ieee80211_crypto_aes_gmac_encrypt(struct
-- 	struct ieee80211_key *key = tx->key;
-- 	struct ieee80211_mmie_16 *mmie;
-- 	struct ieee80211_hdr *hdr;
---	u8 aad[GMAC_AAD_LEN];
--+	u8 aad[20];
-- 	u64 pn64;
---	u8 nonce[GMAC_NONCE_LEN];
--+	u8 nonce[12];
-- 
-- 	if (WARN_ON(skb_queue_len(&tx->skbs) != 1))
-- 		return TX_DROP;
--@@ -1181,7 +1182,7 @@ ieee80211_crypto_aes_gmac_decrypt(struct
-- 	struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
-- 	struct ieee80211_key *key = rx->key;
-- 	struct ieee80211_mmie_16 *mmie;
---	u8 aad[GMAC_AAD_LEN], *mic, ipn[6], nonce[GMAC_NONCE_LEN];
--+	u8 aad[20], *mic, ipn[6], nonce[12];
-- 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
-- 
-- 	if (!ieee80211_is_mgmt(hdr->frame_control))
----- /dev/null
--+++ b/net/mac80211/aes_ccm.c
--@@ -0,0 +1,144 @@
--+/*
--+ * Copyright 2003-2004, Instant802 Networks, Inc.
--+ * Copyright 2005-2006, Devicescape Software, Inc.
--+ *
--+ * Rewrite: Copyright (C) 2013 Linaro Ltd <ard.biesheuvel@linaro.org>
--+ *
--+ * This program is free software; you can redistribute it and/or modify
--+ * it under the terms of the GNU General Public License version 2 as
--+ * published by the Free Software Foundation.
--+ */
--+
--+#include <linux/kernel.h>
--+#include <linux/types.h>
--+#include <linux/err.h>
--+#include <crypto/aead.h>
--+#include <crypto/aes.h>
--+
--+#include <net/mac80211.h>
--+#include "key.h"
--+#include "aes_ccm.h"
--+
--+static void aes_ccm_prepare(struct crypto_cipher *tfm, u8 *b_0, u8 *aad, u8 *s_0,
--+			    u8 *a, u8 *b)
--+{
--+	int i;
--+
--+	crypto_cipher_encrypt_one(tfm, b, b_0);
--+
--+	/* Extra Authenticate-only data (always two AES blocks) */
--+	for (i = 0; i < AES_BLOCK_SIZE; i++)
--+		aad[i] ^= b[i];
--+	crypto_cipher_encrypt_one(tfm, b, aad);
--+
--+	aad += AES_BLOCK_SIZE;
--+
--+	for (i = 0; i < AES_BLOCK_SIZE; i++)
--+		aad[i] ^= b[i];
--+	crypto_cipher_encrypt_one(tfm, a, aad);
--+
--+	/* Mask out bits from auth-only-b_0 */
--+	b_0[0] &= 0x07;
--+
--+	/* S_0 is used to encrypt T (= MIC) */
--+	b_0[14] = 0;
--+	b_0[15] = 0;
--+	crypto_cipher_encrypt_one(tfm, s_0, b_0);
--+}
--+
--+
--+void ieee80211_aes_ccm_encrypt(struct crypto_cipher *tfm, u8 *b_0, u8 *aad,
--+			       u8 *data, size_t data_len, u8 *mic,
--+			       size_t mic_len)
--+{
--+	int i, j, last_len, num_blocks;
--+	u8 b[AES_BLOCK_SIZE];
--+	u8 s_0[AES_BLOCK_SIZE];
--+	u8 e[AES_BLOCK_SIZE];
--+	u8 *pos, *cpos;
--+
--+	num_blocks = DIV_ROUND_UP(data_len, AES_BLOCK_SIZE);
--+	last_len = data_len % AES_BLOCK_SIZE;
--+	aes_ccm_prepare(tfm, b_0, aad, s_0, b, b);
--+
--+	/* Process payload blocks */
--+	pos = data;
--+	cpos = data;
--+	for (j = 1; j <= num_blocks; j++) {
--+		int blen = (j == num_blocks && last_len) ?
--+			last_len : AES_BLOCK_SIZE;
--+
--+		/* Authentication followed by encryption */
--+		for (i = 0; i < blen; i++)
--+			b[i] ^= pos[i];
--+		crypto_cipher_encrypt_one(tfm, b, b);
--+
--+		b_0[14] = (j >> 8) & 0xff;
--+		b_0[15] = j & 0xff;
--+		crypto_cipher_encrypt_one(tfm, e, b_0);
--+		for (i = 0; i < blen; i++)
--+			*cpos++ = *pos++ ^ e[i];
--+	}
--+
--+	for (i = 0; i < mic_len; i++)
--+		mic[i] = b[i] ^ s_0[i];
--+}
--+
--+int ieee80211_aes_ccm_decrypt(struct crypto_cipher *tfm, u8 *b_0, u8 *aad,
--+			      u8 *data, size_t data_len, u8 *mic,
--+			      size_t mic_len)
--+{
--+	int i, j, last_len, num_blocks;
--+	u8 *pos, *cpos;
--+	u8 a[AES_BLOCK_SIZE];
--+	u8 b[AES_BLOCK_SIZE];
--+	u8 s_0[AES_BLOCK_SIZE];
--+
--+	num_blocks = DIV_ROUND_UP(data_len, AES_BLOCK_SIZE);
--+	last_len = data_len % AES_BLOCK_SIZE;
--+	aes_ccm_prepare(tfm, b_0, aad, s_0, a, b);
--+
--+	/* Process payload blocks */
--+	cpos = data;
--+	pos = data;
--+	for (j = 1; j <= num_blocks; j++) {
--+		int blen = (j == num_blocks && last_len) ?
--+			last_len : AES_BLOCK_SIZE;
--+
--+		/* Decryption followed by authentication */
--+		b_0[14] = (j >> 8) & 0xff;
--+		b_0[15] = j & 0xff;
--+		crypto_cipher_encrypt_one(tfm, b, b_0);
--+		for (i = 0; i < blen; i++) {
--+			*pos = *cpos++ ^ b[i];
--+			a[i] ^= *pos++;
--+		}
--+		crypto_cipher_encrypt_one(tfm, a, a);
--+	}
--+
--+	for (i = 0; i < mic_len; i++) {
--+		if ((mic[i] ^ s_0[i]) != a[i])
--+			return -1;
--+	}
--+
--+	return 0;
--+}
--+
--+struct crypto_cipher *ieee80211_aes_key_setup_encrypt(const u8 key[],
--+						      size_t key_len,
--+						      size_t mic_len)
--+{
--+	struct crypto_cipher *tfm;
--+
--+	tfm = crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
--+	if (!IS_ERR(tfm))
--+		crypto_cipher_setkey(tfm, key, key_len);
--+
--+	return tfm;
--+}
--+
--+
--+void ieee80211_aes_key_free(struct crypto_cipher *tfm)
--+{
--+	crypto_free_cipher(tfm);
--+}
----- a/net/mac80211/Kconfig
--+++ b/net/mac80211/Kconfig
--@@ -6,8 +6,6 @@ config MAC80211
-- 	depends on CRYPTO
-- 	select BPAUTO_CRYPTO_LIB_ARC4
-- 	depends on CRYPTO_AES
---	depends on CRYPTO_CCM
---	depends on CRYPTO_GCM
-- 	depends on CRYPTO_CMAC
-- 	depends on CRC32
-- 	help
----- a/net/mac80211/aes_gmac.h
--+++ b/net/mac80211/aes_gmac.h
--@@ -12,10 +12,22 @@
-- #define GMAC_MIC_LEN	16
-- #define GMAC_NONCE_LEN	12
-- 
---struct crypto_aead *ieee80211_aes_gmac_key_setup(const u8 key[],
---						 size_t key_len);
---int ieee80211_aes_gmac(struct crypto_aead *tfm, const u8 *aad, u8 *nonce,
---		       const u8 *data, size_t data_len, u8 *mic);
---void ieee80211_aes_gmac_key_free(struct crypto_aead *tfm);
--+static inline struct crypto_aead *
--+ieee80211_aes_gmac_key_setup(const u8 key[], size_t key_len)
--+{
--+	return NULL;
--+}
--+
--+static inline int
--+ieee80211_aes_gmac(struct crypto_aead *tfm, const u8 *aad, u8 *nonce,
--+		   const u8 *data, size_t data_len, u8 *mic)
--+{
--+	return -EOPNOTSUPP;
--+}
--+
--+static inline void
--+ieee80211_aes_gmac_key_free(struct crypto_aead *tfm)
--+{
--+}
-- 
-- #endif /* AES_GMAC_H */
----- a/net/mac80211/key.h
--+++ b/net/mac80211/key.h
--@@ -89,7 +89,7 @@ struct ieee80211_key {
-- 			 * Management frames.
-- 			 */
-- 			u8 rx_pn[IEEE80211_NUM_TIDS + 1][IEEE80211_CCMP_PN_LEN];
---			struct crypto_aead *tfm;
--+			struct crypto_cipher *tfm;
-- 			u32 replays; /* dot11RSNAStatsCCMPReplays */
-- 		} ccmp;
-- 		struct {
-diff --git a/package/kernel/mac80211/patches/subsys/110-mac80211_keep_keys_on_stop_ap.patch b/package/kernel/mac80211/patches/subsys/110-mac80211_keep_keys_on_stop_ap.patch
-index c6fafb77b1..638da14346 100644
---- a/package/kernel/mac80211/patches/subsys/110-mac80211_keep_keys_on_stop_ap.patch
-+++ b/package/kernel/mac80211/patches/subsys/110-mac80211_keep_keys_on_stop_ap.patch
-@@ -2,7 +2,7 @@ Used for AP+STA support in OpenWrt - preserve AP mode keys across STA reconnects
- 
- --- a/net/mac80211/cfg.c
- +++ b/net/mac80211/cfg.c
--@@ -1307,7 +1307,6 @@ static int ieee80211_stop_ap(struct wiph
-+@@ -1316,7 +1316,6 @@ static int ieee80211_stop_ap(struct wiph
-  	sdata->vif.bss_conf.ftmr_params = NULL;
-  
-  	__sta_info_flush(sdata, true);
-diff --git a/package/kernel/mac80211/patches/subsys/120-cfg80211_allow_perm_addr_change.patch b/package/kernel/mac80211/patches/subsys/120-cfg80211_allow_perm_addr_change.patch
-index 172e5b04fd..ffd8807ccc 100644
---- a/package/kernel/mac80211/patches/subsys/120-cfg80211_allow_perm_addr_change.patch
-+++ b/package/kernel/mac80211/patches/subsys/120-cfg80211_allow_perm_addr_change.patch
-@@ -1,6 +1,6 @@
- --- a/net/wireless/sysfs.c
- +++ b/net/wireless/sysfs.c
--@@ -23,18 +23,35 @@ static inline struct cfg80211_registered
-+@@ -24,18 +24,35 @@ static inline struct cfg80211_registered
-  	return container_of(dev, struct cfg80211_registered_device, wiphy.dev);
-  }
-  
-diff --git a/package/kernel/mac80211/patches/subsys/130-disable-fils.patch b/package/kernel/mac80211/patches/subsys/130-disable-fils.patch
-deleted file mode 100644
-index 9c6e971f9d..0000000000
---- a/package/kernel/mac80211/patches/subsys/130-disable-fils.patch
-+++ /dev/null
-@@ -1,32 +0,0 @@
--Disable FILS support, since it pulls in crypto hash support
--
----- a/net/mac80211/fils_aead.h
--+++ b/net/mac80211/fils_aead.h
--@@ -7,7 +7,7 @@
-- #ifndef FILS_AEAD_H
-- #define FILS_AEAD_H
-- 
---#if LINUX_VERSION_IS_GEQ(4,3,0)
--+#if 0 /* LINUX_VERSION_IS_GEQ(4,3,0) */
-- int fils_encrypt_assoc_req(struct sk_buff *skb,
-- 			   struct ieee80211_mgd_assoc_data *assoc_data);
-- int fils_decrypt_assoc_resp(struct ieee80211_sub_if_data *sdata,
----- a/net/mac80211/fils_aead.c
--+++ b/net/mac80211/fils_aead.c
--@@ -1,4 +1,4 @@
---#if LINUX_VERSION_IS_GEQ(4,3,0)
--+#if 0 /* LINUX_VERSION_IS_GEQ(4,3,0) */
-- // SPDX-License-Identifier: GPL-2.0-only
-- /*
--  * FILS AEAD for (Re)Association Request/Response frames
----- a/net/mac80211/main.c
--+++ b/net/mac80211/main.c
--@@ -591,7 +591,7 @@ struct ieee80211_hw *ieee80211_alloc_hw_
-- 			   NL80211_FEATURE_MAC_ON_CREATE |
-- 			   NL80211_FEATURE_USERSPACE_MPM |
-- 			   NL80211_FEATURE_FULL_AP_CLIENT_STATE;
---#if LINUX_VERSION_IS_GEQ(4,3,0)
--+#if 0 /* LINUX_VERSION_IS_GEQ(4,3,0) */
-- 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_FILS_STA);
-- #endif
-- 	wiphy_ext_feature_set(wiphy,
-diff --git a/package/kernel/mac80211/patches/subsys/131-Revert-mac80211-aes-cmac-switch-to-shash-CMAC-driver.patch b/package/kernel/mac80211/patches/subsys/131-Revert-mac80211-aes-cmac-switch-to-shash-CMAC-driver.patch
-deleted file mode 100644
-index c3bf7ccc7a..0000000000
---- a/package/kernel/mac80211/patches/subsys/131-Revert-mac80211-aes-cmac-switch-to-shash-CMAC-driver.patch
-+++ /dev/null
-@@ -1,230 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Sat, 7 Oct 2017 09:37:28 +0200
--Subject: [PATCH] Revert "mac80211: aes-cmac: switch to shash CMAC
-- driver"
--
--This reverts commit 26717828b75dd5c46e97f7f4a9b937d038bb2852.
--Reduces mac80211 dependencies for LEDE
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/aes_cmac.c
--+++ b/net/mac80211/aes_cmac.c
--@@ -19,67 +19,151 @@
-- #define CMAC_TLEN_256 16 /* CMAC TLen = 128 bits (16 octets) */
-- #define AAD_LEN 20
-- 
---static const u8 zero[CMAC_TLEN_256];
-- 
---void ieee80211_aes_cmac(struct crypto_shash *tfm, const u8 *aad,
--+void gf_mulx(u8 *pad)
--+{
--+	int i, carry;
--+
--+	carry = pad[0] & 0x80;
--+	for (i = 0; i < AES_BLOCK_SIZE - 1; i++)
--+		pad[i] = (pad[i] << 1) | (pad[i + 1] >> 7);
--+	pad[AES_BLOCK_SIZE - 1] <<= 1;
--+	if (carry)
--+		pad[AES_BLOCK_SIZE - 1] ^= 0x87;
--+}
--+
--+void aes_cmac_vector(struct crypto_cipher *tfm, size_t num_elem,
--+		     const u8 *addr[], const size_t *len, u8 *mac,
--+		     size_t mac_len)
--+{
--+	u8 cbc[AES_BLOCK_SIZE], pad[AES_BLOCK_SIZE];
--+	const u8 *pos, *end;
--+	size_t i, e, left, total_len;
--+
--+	memset(cbc, 0, AES_BLOCK_SIZE);
--+
--+	total_len = 0;
--+	for (e = 0; e < num_elem; e++)
--+		total_len += len[e];
--+	left = total_len;
--+
--+	e = 0;
--+	pos = addr[0];
--+	end = pos + len[0];
--+
--+	while (left >= AES_BLOCK_SIZE) {
--+		for (i = 0; i < AES_BLOCK_SIZE; i++) {
--+			cbc[i] ^= *pos++;
--+			if (pos >= end) {
--+				e++;
--+				pos = addr[e];
--+				end = pos + len[e];
--+			}
--+		}
--+		if (left > AES_BLOCK_SIZE)
--+			crypto_cipher_encrypt_one(tfm, cbc, cbc);
--+		left -= AES_BLOCK_SIZE;
--+	}
--+
--+	memset(pad, 0, AES_BLOCK_SIZE);
--+	crypto_cipher_encrypt_one(tfm, pad, pad);
--+	gf_mulx(pad);
--+
--+	if (left || total_len == 0) {
--+		for (i = 0; i < left; i++) {
--+			cbc[i] ^= *pos++;
--+			if (pos >= end) {
--+				e++;
--+				pos = addr[e];
--+				end = pos + len[e];
--+			}
--+		}
--+		cbc[left] ^= 0x80;
--+		gf_mulx(pad);
--+	}
--+
--+	for (i = 0; i < AES_BLOCK_SIZE; i++)
--+		pad[i] ^= cbc[i];
--+	crypto_cipher_encrypt_one(tfm, pad, pad);
--+	memcpy(mac, pad, mac_len);
--+}
--+
--+
--+void ieee80211_aes_cmac(struct crypto_cipher *tfm, const u8 *aad,
-- 			const u8 *data, size_t data_len, u8 *mic)
-- {
---	SHASH_DESC_ON_STACK(desc, tfm);
---	u8 out[AES_BLOCK_SIZE];
--+	const u8 *addr[4];
--+	size_t len[4];
--+	u8 zero[CMAC_TLEN];
-- 	const __le16 *fc;
-- 
---	desc->tfm = tfm;
---
---	crypto_shash_init(desc);
---	crypto_shash_update(desc, aad, AAD_LEN);
--+	memset(zero, 0, CMAC_TLEN);
--+	addr[0] = aad;
--+	len[0] = AAD_LEN;
-- 	fc = (const __le16 *)aad;
-- 	if (ieee80211_is_beacon(*fc)) {
-- 		/* mask Timestamp field to zero */
---		crypto_shash_update(desc, zero, 8);
---		crypto_shash_update(desc, data + 8, data_len - 8 - CMAC_TLEN);
--+		addr[1] = zero;
--+		len[1] = 8;
--+		addr[2] = data + 8;
--+		len[2] = data_len - 8 - CMAC_TLEN;
--+		addr[3] = zero;
--+		len[3] = CMAC_TLEN;
--+		aes_cmac_vector(tfm, 4, addr, len, mic, CMAC_TLEN);
-- 	} else {
---		crypto_shash_update(desc, data, data_len - CMAC_TLEN);
--+		addr[1] = data;
--+		len[1] = data_len - CMAC_TLEN;
--+		addr[2] = zero;
--+		len[2] = CMAC_TLEN;
--+		aes_cmac_vector(tfm, 3, addr, len, mic, CMAC_TLEN);
-- 	}
---	crypto_shash_finup(desc, zero, CMAC_TLEN, out);
---
---	memcpy(mic, out, CMAC_TLEN);
-- }
-- 
---void ieee80211_aes_cmac_256(struct crypto_shash *tfm, const u8 *aad,
--+void ieee80211_aes_cmac_256(struct crypto_cipher *tfm, const u8 *aad,
-- 			    const u8 *data, size_t data_len, u8 *mic)
-- {
---	SHASH_DESC_ON_STACK(desc, tfm);
--+	const u8 *addr[4];
--+	size_t len[4];
--+	u8 zero[CMAC_TLEN_256];
-- 	const __le16 *fc;
-- 
---	desc->tfm = tfm;
---
---	crypto_shash_init(desc);
---	crypto_shash_update(desc, aad, AAD_LEN);
--+	memset(zero, 0, CMAC_TLEN_256);
--+	addr[0] = aad;
--+	len[0] = AAD_LEN;
--+	addr[1] = data;
-- 	fc = (const __le16 *)aad;
-- 	if (ieee80211_is_beacon(*fc)) {
-- 		/* mask Timestamp field to zero */
---		crypto_shash_update(desc, zero, 8);
---		crypto_shash_update(desc, data + 8,
---				    data_len - 8 - CMAC_TLEN_256);
--+		addr[1] = zero;
--+		len[1] = 8;
--+		addr[2] = data + 8;
--+		len[2] = data_len - 8 - CMAC_TLEN_256;
--+		addr[3] = zero;
--+		len[3] = CMAC_TLEN_256;
--+		aes_cmac_vector(tfm, 4, addr, len, mic, CMAC_TLEN_256);
-- 	} else {
---		crypto_shash_update(desc, data, data_len - CMAC_TLEN_256);
--+		addr[1] = data;
--+		len[1] = data_len - CMAC_TLEN_256;
--+		addr[2] = zero;
--+		len[2] = CMAC_TLEN_256;
--+		aes_cmac_vector(tfm, 3, addr, len, mic, CMAC_TLEN_256);
-- 	}
---	crypto_shash_finup(desc, zero, CMAC_TLEN_256, mic);
-- }
-- 
---struct crypto_shash *ieee80211_aes_cmac_key_setup(const u8 key[],
---						  size_t key_len)
--+struct crypto_cipher *ieee80211_aes_cmac_key_setup(const u8 key[],
--+						   size_t key_len)
-- {
---	struct crypto_shash *tfm;
--+	struct crypto_cipher *tfm;
-- 
---	tfm = crypto_alloc_shash("cmac(aes)", 0, 0);
--+	tfm = crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
-- 	if (!IS_ERR(tfm))
---		crypto_shash_setkey(tfm, key, key_len);
--+		crypto_cipher_setkey(tfm, key, key_len);
-- 
-- 	return tfm;
-- }
-- 
---void ieee80211_aes_cmac_key_free(struct crypto_shash *tfm)
--+
--+void ieee80211_aes_cmac_key_free(struct crypto_cipher *tfm)
-- {
---	crypto_free_shash(tfm);
--+	crypto_free_cipher(tfm);
-- }
----- a/net/mac80211/aes_cmac.h
--+++ b/net/mac80211/aes_cmac.h
--@@ -7,14 +7,13 @@
-- #define AES_CMAC_H
-- 
-- #include <linux/crypto.h>
---#include <crypto/hash.h>
-- 
---struct crypto_shash *ieee80211_aes_cmac_key_setup(const u8 key[],
---						  size_t key_len);
---void ieee80211_aes_cmac(struct crypto_shash *tfm, const u8 *aad,
--+struct crypto_cipher *ieee80211_aes_cmac_key_setup(const u8 key[],
--+						   size_t key_len);
--+void ieee80211_aes_cmac(struct crypto_cipher *tfm, const u8 *aad,
-- 			const u8 *data, size_t data_len, u8 *mic);
---void ieee80211_aes_cmac_256(struct crypto_shash *tfm, const u8 *aad,
--+void ieee80211_aes_cmac_256(struct crypto_cipher *tfm, const u8 *aad,
-- 			    const u8 *data, size_t data_len, u8 *mic);
---void ieee80211_aes_cmac_key_free(struct crypto_shash *tfm);
--+void ieee80211_aes_cmac_key_free(struct crypto_cipher *tfm);
-- 
-- #endif /* AES_CMAC_H */
----- a/net/mac80211/key.h
--+++ b/net/mac80211/key.h
--@@ -94,7 +94,7 @@ struct ieee80211_key {
-- 		} ccmp;
-- 		struct {
-- 			u8 rx_pn[IEEE80211_CMAC_PN_LEN];
---			struct crypto_shash *tfm;
--+			struct crypto_cipher *tfm;
-- 			u32 replays; /* dot11RSNAStatsCMACReplays */
-- 			u32 icverrors; /* dot11RSNAStatsCMACICVErrors */
-- 		} aes_cmac;
-diff --git a/package/kernel/mac80211/patches/subsys/132-mac80211-remove-cmac-dependency.patch b/package/kernel/mac80211/patches/subsys/132-mac80211-remove-cmac-dependency.patch
-deleted file mode 100644
-index df67d2f101..0000000000
---- a/package/kernel/mac80211/patches/subsys/132-mac80211-remove-cmac-dependency.patch
-+++ /dev/null
-@@ -1,10 +0,0 @@
----- a/net/mac80211/Kconfig
--+++ b/net/mac80211/Kconfig
--@@ -6,7 +6,6 @@ config MAC80211
-- 	depends on CRYPTO
-- 	select BPAUTO_CRYPTO_LIB_ARC4
-- 	depends on CRYPTO_AES
---	depends on CRYPTO_CMAC
-- 	depends on CRC32
-- 	help
-- 	  This option enables the hardware independent IEEE 802.11
-diff --git a/package/kernel/mac80211/patches/subsys/150-disable_addr_notifier.patch b/package/kernel/mac80211/patches/subsys/150-disable_addr_notifier.patch
-index 8d086625e4..e93efa4429 100644
---- a/package/kernel/mac80211/patches/subsys/150-disable_addr_notifier.patch
-+++ b/package/kernel/mac80211/patches/subsys/150-disable_addr_notifier.patch
-@@ -1,6 +1,6 @@
- --- a/net/mac80211/main.c
- +++ b/net/mac80211/main.c
--@@ -321,7 +321,7 @@ void ieee80211_restart_hw(struct ieee802
-+@@ -337,7 +337,7 @@ void ieee80211_restart_hw(struct ieee802
-  }
-  EXPORT_SYMBOL(ieee80211_restart_hw);
-  
-@@ -9,7 +9,7 @@
-  static int ieee80211_ifa_changed(struct notifier_block *nb,
-  				 unsigned long data, void *arg)
-  {
--@@ -380,7 +380,7 @@ static int ieee80211_ifa_changed(struct
-+@@ -396,7 +396,7 @@ static int ieee80211_ifa_changed(struct
-  }
-  #endif
-  
-@@ -18,8 +18,8 @@
-  static int ieee80211_ifa6_changed(struct notifier_block *nb,
-  				  unsigned long data, void *arg)
-  {
--@@ -1315,14 +1315,14 @@ int ieee80211_register_hw(struct ieee802
-- 
-+@@ -1324,14 +1324,14 @@ int ieee80211_register_hw(struct ieee802
-+ 	wiphy_unlock(hw->wiphy);
-  	rtnl_unlock();
-  
- -#ifdef CONFIG_INET
-@@ -35,7 +35,7 @@
-  	local->ifa6_notifier.notifier_call = ieee80211_ifa6_changed;
-  	result = register_inet6addr_notifier(&local->ifa6_notifier);
-  	if (result)
--@@ -1331,13 +1331,13 @@ int ieee80211_register_hw(struct ieee802
-+@@ -1340,13 +1340,13 @@ int ieee80211_register_hw(struct ieee802
-  
-  	return 0;
-  
-@@ -52,7 +52,7 @@
-   fail_ifa:
-  #endif
-  	wiphy_unregister(local->hw.wiphy);
--@@ -1365,10 +1365,10 @@ void ieee80211_unregister_hw(struct ieee
-+@@ -1374,10 +1374,10 @@ void ieee80211_unregister_hw(struct ieee
-  	tasklet_kill(&local->tx_pending_tasklet);
-  	tasklet_kill(&local->tasklet);
-  
-diff --git a/package/kernel/mac80211/patches/subsys/210-ap_scan.patch b/package/kernel/mac80211/patches/subsys/210-ap_scan.patch
-index f8c3821c51..0c06829ce4 100644
---- a/package/kernel/mac80211/patches/subsys/210-ap_scan.patch
-+++ b/package/kernel/mac80211/patches/subsys/210-ap_scan.patch
-@@ -1,6 +1,6 @@
- --- a/net/mac80211/cfg.c
- +++ b/net/mac80211/cfg.c
--@@ -2463,7 +2463,7 @@ static int ieee80211_scan(struct wiphy *
-+@@ -2497,7 +2497,7 @@ static int ieee80211_scan(struct wiphy *
-  		 * the  frames sent while scanning on other channel will be
-  		 * lost)
-  		 */
-diff --git a/package/kernel/mac80211/patches/subsys/300-cfg80211-support-immediate-reconnect-request-hint.patch b/package/kernel/mac80211/patches/subsys/300-cfg80211-support-immediate-reconnect-request-hint.patch
-deleted file mode 100644
-index 425b6895b1..0000000000
---- a/package/kernel/mac80211/patches/subsys/300-cfg80211-support-immediate-reconnect-request-hint.patch
-+++ /dev/null
-@@ -1,279 +0,0 @@
--From: Johannes Berg <johannes.berg@intel.com>
--Date: Sun, 6 Dec 2020 14:54:42 +0200
--Subject: [PATCH] cfg80211: support immediate reconnect request hint
--
--There are cases where it's necessary to disconnect, but an
--immediate reconnection is desired. Support a hint to userspace
--that this is the case, by including a new attribute in the
--deauth or disassoc event.
--
--Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
--Link: https://lore.kernel.org/r/iwlwifi.20201206145305.58d33941fb9d.I0e7168c205c7949529c8e3b86f3c9b12c01a7017@changeid
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/include/net/cfg80211.h
--+++ b/include/net/cfg80211.h
--@@ -6410,13 +6410,15 @@ void cfg80211_abandon_assoc(struct net_d
--  * @dev: network device
--  * @buf: 802.11 frame (header + body)
--  * @len: length of the frame data
--+ * @reconnect: immediate reconnect is desired (include the nl80211 attribute)
--  *
--  * This function is called whenever deauthentication has been processed in
--  * station mode. This includes both received deauthentication frames and
--  * locally generated ones. This function may sleep. The caller must hold the
--  * corresponding wdev's mutex.
--  */
---void cfg80211_tx_mlme_mgmt(struct net_device *dev, const u8 *buf, size_t len);
--+void cfg80211_tx_mlme_mgmt(struct net_device *dev, const u8 *buf, size_t len,
--+			   bool reconnect);
-- 
-- /**
--  * cfg80211_rx_unprot_mlme_mgmt - notification of unprotected mlme mgmt frame
----- a/net/mac80211/mlme.c
--+++ b/net/mac80211/mlme.c
--@@ -2725,7 +2725,7 @@ static void ieee80211_report_disconnect(
-- 	};
-- 
-- 	if (tx)
---		cfg80211_tx_mlme_mgmt(sdata->dev, buf, len);
--+		cfg80211_tx_mlme_mgmt(sdata->dev, buf, len, false);
-- 	else
-- 		cfg80211_rx_mlme_mgmt(sdata->dev, buf, len);
-- 
--@@ -4719,7 +4719,8 @@ void ieee80211_mgd_quiesce(struct ieee80
-- 		if (ifmgd->auth_data)
-- 			ieee80211_destroy_auth_data(sdata, false);
-- 		cfg80211_tx_mlme_mgmt(sdata->dev, frame_buf,
---				      IEEE80211_DEAUTH_FRAME_LEN);
--+				      IEEE80211_DEAUTH_FRAME_LEN,
--+				      false);
-- 	}
-- 
-- 	/* This is a bit of a hack - we should find a better and more generic
----- a/net/wireless/mlme.c
--+++ b/net/wireless/mlme.c
--@@ -4,7 +4,7 @@
--  *
--  * Copyright (c) 2009, Jouni Malinen <j@w1.fi>
--  * Copyright (c) 2015		Intel Deutschland GmbH
--- * Copyright (C) 2019 Intel Corporation
--+ * Copyright (C) 2019-2020 Intel Corporation
--  */
-- 
-- #include <linux/kernel.h>
--@@ -81,7 +81,8 @@ static void cfg80211_process_auth(struct
-- }
-- 
-- static void cfg80211_process_deauth(struct wireless_dev *wdev,
---				    const u8 *buf, size_t len)
--+				    const u8 *buf, size_t len,
--+				    bool reconnect)
-- {
-- 	struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy);
-- 	struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)buf;
--@@ -89,7 +90,7 @@ static void cfg80211_process_deauth(stru
-- 	u16 reason_code = le16_to_cpu(mgmt->u.deauth.reason_code);
-- 	bool from_ap = !ether_addr_equal(mgmt->sa, wdev->netdev->dev_addr);
-- 
---	nl80211_send_deauth(rdev, wdev->netdev, buf, len, GFP_KERNEL);
--+	nl80211_send_deauth(rdev, wdev->netdev, buf, len, reconnect, GFP_KERNEL);
-- 
-- 	if (!wdev->current_bss ||
-- 	    !ether_addr_equal(wdev->current_bss->pub.bssid, bssid))
--@@ -100,7 +101,8 @@ static void cfg80211_process_deauth(stru
-- }
-- 
-- static void cfg80211_process_disassoc(struct wireless_dev *wdev,
---				      const u8 *buf, size_t len)
--+				      const u8 *buf, size_t len,
--+				      bool reconnect)
-- {
-- 	struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy);
-- 	struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)buf;
--@@ -108,7 +110,8 @@ static void cfg80211_process_disassoc(st
-- 	u16 reason_code = le16_to_cpu(mgmt->u.disassoc.reason_code);
-- 	bool from_ap = !ether_addr_equal(mgmt->sa, wdev->netdev->dev_addr);
-- 
---	nl80211_send_disassoc(rdev, wdev->netdev, buf, len, GFP_KERNEL);
--+	nl80211_send_disassoc(rdev, wdev->netdev, buf, len, reconnect,
--+			      GFP_KERNEL);
-- 
-- 	if (WARN_ON(!wdev->current_bss ||
-- 		    !ether_addr_equal(wdev->current_bss->pub.bssid, bssid)))
--@@ -133,9 +136,9 @@ void cfg80211_rx_mlme_mgmt(struct net_de
-- 	if (ieee80211_is_auth(mgmt->frame_control))
-- 		cfg80211_process_auth(wdev, buf, len);
-- 	else if (ieee80211_is_deauth(mgmt->frame_control))
---		cfg80211_process_deauth(wdev, buf, len);
--+		cfg80211_process_deauth(wdev, buf, len, false);
-- 	else if (ieee80211_is_disassoc(mgmt->frame_control))
---		cfg80211_process_disassoc(wdev, buf, len);
--+		cfg80211_process_disassoc(wdev, buf, len, false);
-- }
-- EXPORT_SYMBOL(cfg80211_rx_mlme_mgmt);
-- 
--@@ -180,22 +183,23 @@ void cfg80211_abandon_assoc(struct net_d
-- }
-- EXPORT_SYMBOL(cfg80211_abandon_assoc);
-- 
---void cfg80211_tx_mlme_mgmt(struct net_device *dev, const u8 *buf, size_t len)
--+void cfg80211_tx_mlme_mgmt(struct net_device *dev, const u8 *buf, size_t len,
--+			   bool reconnect)
-- {
-- 	struct wireless_dev *wdev = dev->ieee80211_ptr;
-- 	struct ieee80211_mgmt *mgmt = (void *)buf;
-- 
-- 	ASSERT_WDEV_LOCK(wdev);
-- 
---	trace_cfg80211_tx_mlme_mgmt(dev, buf, len);
--+	trace_cfg80211_tx_mlme_mgmt(dev, buf, len, reconnect);
-- 
-- 	if (WARN_ON(len < 2))
-- 		return;
-- 
-- 	if (ieee80211_is_deauth(mgmt->frame_control))
---		cfg80211_process_deauth(wdev, buf, len);
--+		cfg80211_process_deauth(wdev, buf, len, reconnect);
-- 	else
---		cfg80211_process_disassoc(wdev, buf, len);
--+		cfg80211_process_disassoc(wdev, buf, len, reconnect);
-- }
-- EXPORT_SYMBOL(cfg80211_tx_mlme_mgmt);
-- 
----- a/net/wireless/nl80211.c
--+++ b/net/wireless/nl80211.c
--@@ -736,6 +736,7 @@ static const struct nla_policy nl80211_p
-- 		NLA_POLICY_EXACT_LEN(IEEE80211_S1G_CAPABILITY_LEN),
-- 	[NL80211_ATTR_S1G_CAPABILITY_MASK] =
-- 		NLA_POLICY_EXACT_LEN(IEEE80211_S1G_CAPABILITY_LEN),
--+	[NL80211_ATTR_RECONNECT_REQUESTED] = { .type = NLA_REJECT },
-- };
-- 
-- /* policy for the key attributes */
--@@ -15902,7 +15903,7 @@ static void nl80211_send_mlme_event(stru
-- 				    const u8 *buf, size_t len,
-- 				    enum nl80211_commands cmd, gfp_t gfp,
-- 				    int uapsd_queues, const u8 *req_ies,
---				    size_t req_ies_len)
--+				    size_t req_ies_len, bool reconnect)
-- {
-- 	struct sk_buff *msg;
-- 	void *hdr;
--@@ -15924,6 +15925,9 @@ static void nl80211_send_mlme_event(stru
-- 	     nla_put(msg, NL80211_ATTR_REQ_IE, req_ies_len, req_ies)))
-- 		goto nla_put_failure;
-- 
--+	if (reconnect && nla_put_flag(msg, NL80211_ATTR_RECONNECT_REQUESTED))
--+		goto nla_put_failure;
--+
-- 	if (uapsd_queues >= 0) {
-- 		struct nlattr *nla_wmm =
-- 			nla_nest_start_noflag(msg, NL80211_ATTR_STA_WME);
--@@ -15952,7 +15956,8 @@ void nl80211_send_rx_auth(struct cfg8021
-- 			  size_t len, gfp_t gfp)
-- {
-- 	nl80211_send_mlme_event(rdev, netdev, buf, len,
---				NL80211_CMD_AUTHENTICATE, gfp, -1, NULL, 0);
--+				NL80211_CMD_AUTHENTICATE, gfp, -1, NULL, 0,
--+				false);
-- }
-- 
-- void nl80211_send_rx_assoc(struct cfg80211_registered_device *rdev,
--@@ -15962,23 +15967,25 @@ void nl80211_send_rx_assoc(struct cfg802
-- {
-- 	nl80211_send_mlme_event(rdev, netdev, buf, len,
-- 				NL80211_CMD_ASSOCIATE, gfp, uapsd_queues,
---				req_ies, req_ies_len);
--+				req_ies, req_ies_len, false);
-- }
-- 
-- void nl80211_send_deauth(struct cfg80211_registered_device *rdev,
-- 			 struct net_device *netdev, const u8 *buf,
---			 size_t len, gfp_t gfp)
--+			 size_t len, bool reconnect, gfp_t gfp)
-- {
-- 	nl80211_send_mlme_event(rdev, netdev, buf, len,
---				NL80211_CMD_DEAUTHENTICATE, gfp, -1, NULL, 0);
--+				NL80211_CMD_DEAUTHENTICATE, gfp, -1, NULL, 0,
--+				reconnect);
-- }
-- 
-- void nl80211_send_disassoc(struct cfg80211_registered_device *rdev,
-- 			   struct net_device *netdev, const u8 *buf,
---			   size_t len, gfp_t gfp)
--+			   size_t len, bool reconnect, gfp_t gfp)
-- {
-- 	nl80211_send_mlme_event(rdev, netdev, buf, len,
---				NL80211_CMD_DISASSOCIATE, gfp, -1, NULL, 0);
--+				NL80211_CMD_DISASSOCIATE, gfp, -1, NULL, 0,
--+				reconnect);
-- }
-- 
-- void cfg80211_rx_unprot_mlme_mgmt(struct net_device *dev, const u8 *buf,
--@@ -16009,7 +16016,7 @@ void cfg80211_rx_unprot_mlme_mgmt(struct
-- 
-- 	trace_cfg80211_rx_unprot_mlme_mgmt(dev, buf, len);
-- 	nl80211_send_mlme_event(rdev, dev, buf, len, cmd, GFP_ATOMIC, -1,
---				NULL, 0);
--+				NULL, 0, false);
-- }
-- EXPORT_SYMBOL(cfg80211_rx_unprot_mlme_mgmt);
-- 
----- a/net/wireless/nl80211.h
--+++ b/net/wireless/nl80211.h
--@@ -1,7 +1,7 @@
-- /* SPDX-License-Identifier: GPL-2.0 */
-- /*
--  * Portions of this file
--- * Copyright (C) 2018 Intel Corporation
--+ * Copyright (C) 2018, 2020 Intel Corporation
--  */
-- #ifndef __NET_WIRELESS_NL80211_H
-- #define __NET_WIRELESS_NL80211_H
--@@ -69,10 +69,12 @@ void nl80211_send_rx_assoc(struct cfg802
-- 			   const u8 *req_ies, size_t req_ies_len);
-- void nl80211_send_deauth(struct cfg80211_registered_device *rdev,
-- 			 struct net_device *netdev,
---			 const u8 *buf, size_t len, gfp_t gfp);
--+			 const u8 *buf, size_t len,
--+			 bool reconnect, gfp_t gfp);
-- void nl80211_send_disassoc(struct cfg80211_registered_device *rdev,
-- 			   struct net_device *netdev,
---			   const u8 *buf, size_t len, gfp_t gfp);
--+			   const u8 *buf, size_t len,
--+			   bool reconnect, gfp_t gfp);
-- void nl80211_send_auth_timeout(struct cfg80211_registered_device *rdev,
-- 			       struct net_device *netdev,
-- 			       const u8 *addr, gfp_t gfp);
----- a/net/wireless/trace.h
--+++ b/net/wireless/trace.h
--@@ -2684,19 +2684,23 @@ DEFINE_EVENT(netdev_frame_event, cfg8021
-- );
-- 
-- TRACE_EVENT(cfg80211_tx_mlme_mgmt,
---	TP_PROTO(struct net_device *netdev, const u8 *buf, int len),
---	TP_ARGS(netdev, buf, len),
--+	TP_PROTO(struct net_device *netdev, const u8 *buf, int len,
--+		 bool reconnect),
--+	TP_ARGS(netdev, buf, len, reconnect),
-- 	TP_STRUCT__entry(
-- 		NETDEV_ENTRY
-- 		__dynamic_array(u8, frame, len)
--+		__field(int, reconnect)
-- 	),
-- 	TP_fast_assign(
-- 		NETDEV_ASSIGN;
-- 		memcpy(__get_dynamic_array(frame), buf, len);
--+		__entry->reconnect = reconnect;
-- 	),
---	TP_printk(NETDEV_PR_FMT ", ftype:0x%.2x",
--+	TP_printk(NETDEV_PR_FMT ", ftype:0x%.2x reconnect:%d",
-- 		  NETDEV_PR_ARG,
---		  le16_to_cpup((__le16 *)__get_dynamic_array(frame)))
--+		  le16_to_cpup((__le16 *)__get_dynamic_array(frame)),
--+		  __entry->reconnect)
-- );
-- 
-- DECLARE_EVENT_CLASS(netdev_mac_evt,
-diff --git a/package/kernel/mac80211/patches/subsys/394-mac80211-fix-rate-control-for-retransmitted-frames.patch b/package/kernel/mac80211/patches/subsys/301-mac80211-fix-rate-control-for-retransmitted-frames.patch
-similarity index 94%
-rename from package/kernel/mac80211/patches/subsys/394-mac80211-fix-rate-control-for-retransmitted-frames.patch
-rename to package/kernel/mac80211/patches/subsys/301-mac80211-fix-rate-control-for-retransmitted-frames.patch
-index cd91a925f3..98dfe88cbd 100644
---- a/package/kernel/mac80211/patches/subsys/394-mac80211-fix-rate-control-for-retransmitted-frames.patch
-+++ b/package/kernel/mac80211/patches/subsys/301-mac80211-fix-rate-control-for-retransmitted-frames.patch
-@@ -14,7 +14,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
- 
- --- a/net/mac80211/tx.c
- +++ b/net/mac80211/tx.c
--@@ -1835,15 +1835,15 @@ static int invoke_tx_handlers_late(struc
-+@@ -1821,15 +1821,15 @@ static int invoke_tx_handlers_late(struc
-  	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx->skb);
-  	ieee80211_tx_result res = TX_CONTINUE;
-  
-diff --git a/package/kernel/mac80211/patches/subsys/301-mac80211-support-driver-based-disconnect-with-reconn.patch b/package/kernel/mac80211/patches/subsys/301-mac80211-support-driver-based-disconnect-with-reconn.patch
-deleted file mode 100644
-index cc9602df71..0000000000
---- a/package/kernel/mac80211/patches/subsys/301-mac80211-support-driver-based-disconnect-with-reconn.patch
-+++ /dev/null
-@@ -1,271 +0,0 @@
--From: Johannes Berg <johannes.berg@intel.com>
--Date: Sun, 6 Dec 2020 14:54:43 +0200
--Subject: [PATCH] mac80211: support driver-based disconnect with reconnect hint
--
--Support the driver indicating that a disconnection needs
--to be performed, and pass through the reconnect hint in
--this case.
--
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
--Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
--Link: https://lore.kernel.org/r/iwlwifi.20201206145305.5c8dab7a22a0.I58459fdf6968b16c90cab9c574f0f04ca22b0c79@changeid
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/include/net/mac80211.h
--+++ b/include/net/mac80211.h
--@@ -5885,6 +5885,17 @@ void ieee80211_beacon_loss(struct ieee80
-- void ieee80211_connection_loss(struct ieee80211_vif *vif);
-- 
-- /**
--+ * ieee80211_disconnect - request disconnection
--+ *
--+ * @vif: &struct ieee80211_vif pointer from the add_interface callback.
--+ * @reconnect: immediate reconnect is desired
--+ *
--+ * Request disconnection from the current network and, if enabled, send a
--+ * hint to the higher layers that immediate reconnect is desired.
--+ */
--+void ieee80211_disconnect(struct ieee80211_vif *vif, bool reconnect);
--+
--+/**
--  * ieee80211_resume_disconnect - disconnect from AP after resume
--  *
--  * @vif: &struct ieee80211_vif pointer from the add_interface callback.
----- a/net/mac80211/ieee80211_i.h
--+++ b/net/mac80211/ieee80211_i.h
--@@ -450,7 +450,9 @@ struct ieee80211_if_managed {
-- 	unsigned long probe_timeout;
-- 	int probe_send_count;
-- 	bool nullfunc_failed;
---	bool connection_loss;
--+	u8 connection_loss:1,
--+	   driver_disconnect:1,
--+	   reconnect:1;
-- 
-- 	struct cfg80211_bss *associated;
-- 	struct ieee80211_mgd_auth_data *auth_data;
----- a/net/mac80211/mlme.c
--+++ b/net/mac80211/mlme.c
--@@ -2716,7 +2716,7 @@ EXPORT_SYMBOL(ieee80211_ap_probereq_get)
-- 
-- static void ieee80211_report_disconnect(struct ieee80211_sub_if_data *sdata,
-- 					const u8 *buf, size_t len, bool tx,
---					u16 reason)
--+					u16 reason, bool reconnect)
-- {
-- 	struct ieee80211_event event = {
-- 		.type = MLME_EVENT,
--@@ -2725,7 +2725,7 @@ static void ieee80211_report_disconnect(
-- 	};
-- 
-- 	if (tx)
---		cfg80211_tx_mlme_mgmt(sdata->dev, buf, len, false);
--+		cfg80211_tx_mlme_mgmt(sdata->dev, buf, len, reconnect);
-- 	else
-- 		cfg80211_rx_mlme_mgmt(sdata->dev, buf, len);
-- 
--@@ -2747,13 +2747,18 @@ static void __ieee80211_disconnect(struc
-- 
-- 	tx = !sdata->csa_block_tx;
-- 
---	/* AP is probably out of range (or not reachable for another reason) so
---	 * remove the bss struct for that AP.
---	 */
---	cfg80211_unlink_bss(local->hw.wiphy, ifmgd->associated);
--+	if (!ifmgd->driver_disconnect) {
--+		/*
--+		 * AP is probably out of range (or not reachable for another
--+		 * reason) so remove the bss struct for that AP.
--+		 */
--+		cfg80211_unlink_bss(local->hw.wiphy, ifmgd->associated);
--+	}
-- 
-- 	ieee80211_set_disassoc(sdata, IEEE80211_STYPE_DEAUTH,
---			       WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY,
--+			       ifmgd->driver_disconnect ?
--+					WLAN_REASON_DEAUTH_LEAVING :
--+					WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY,
-- 			       tx, frame_buf);
-- 	mutex_lock(&local->mtx);
-- 	sdata->vif.csa_active = false;
--@@ -2766,7 +2771,9 @@ static void __ieee80211_disconnect(struc
-- 	mutex_unlock(&local->mtx);
-- 
-- 	ieee80211_report_disconnect(sdata, frame_buf, sizeof(frame_buf), tx,
---				    WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY);
--+				    WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY,
--+				    ifmgd->reconnect);
--+	ifmgd->reconnect = false;
-- 
-- 	sdata_unlock(sdata);
-- }
--@@ -2785,6 +2792,13 @@ static void ieee80211_beacon_connection_
-- 		sdata_info(sdata, "Connection to AP %pM lost\n",
-- 			   ifmgd->bssid);
-- 		__ieee80211_disconnect(sdata);
--+		ifmgd->connection_loss = false;
--+	} else if (ifmgd->driver_disconnect) {
--+		sdata_info(sdata,
--+			   "Driver requested disconnection from AP %pM\n",
--+			   ifmgd->bssid);
--+		__ieee80211_disconnect(sdata);
--+		ifmgd->driver_disconnect = false;
-- 	} else {
-- 		ieee80211_mgd_probe_ap(sdata, true);
-- 	}
--@@ -2823,6 +2837,21 @@ void ieee80211_connection_loss(struct ie
-- }
-- EXPORT_SYMBOL(ieee80211_connection_loss);
-- 
--+void ieee80211_disconnect(struct ieee80211_vif *vif, bool reconnect)
--+{
--+	struct ieee80211_sub_if_data *sdata = vif_to_sdata(vif);
--+	struct ieee80211_hw *hw = &sdata->local->hw;
--+
--+	trace_api_disconnect(sdata, reconnect);
--+
--+	if (WARN_ON(sdata->vif.type != NL80211_IFTYPE_STATION))
--+		return;
--+
--+	sdata->u.mgd.driver_disconnect = true;
--+	sdata->u.mgd.reconnect = reconnect;
--+	ieee80211_queue_work(hw, &sdata->u.mgd.beacon_connection_loss_work);
--+}
--+EXPORT_SYMBOL(ieee80211_disconnect);
-- 
-- static void ieee80211_destroy_auth_data(struct ieee80211_sub_if_data *sdata,
-- 					bool assoc)
--@@ -3126,7 +3155,7 @@ static void ieee80211_rx_mgmt_deauth(str
-- 		ieee80211_set_disassoc(sdata, 0, 0, false, NULL);
-- 
-- 		ieee80211_report_disconnect(sdata, (u8 *)mgmt, len, false,
---					    reason_code);
--+					    reason_code, false);
-- 		return;
-- 	}
-- 
--@@ -3175,7 +3204,8 @@ static void ieee80211_rx_mgmt_disassoc(s
-- 
-- 	ieee80211_set_disassoc(sdata, 0, 0, false, NULL);
-- 
---	ieee80211_report_disconnect(sdata, (u8 *)mgmt, len, false, reason_code);
--+	ieee80211_report_disconnect(sdata, (u8 *)mgmt, len, false, reason_code,
--+				    false);
-- }
-- 
-- static void ieee80211_get_rates(struct ieee80211_supported_band *sband,
--@@ -4199,7 +4229,8 @@ static void ieee80211_rx_mgmt_beacon(str
-- 				       true, deauth_buf);
-- 		ieee80211_report_disconnect(sdata, deauth_buf,
-- 					    sizeof(deauth_buf), true,
---					    WLAN_REASON_DEAUTH_LEAVING);
--+					    WLAN_REASON_DEAUTH_LEAVING,
--+					    false);
-- 		return;
-- 	}
-- 
--@@ -4344,7 +4375,7 @@ static void ieee80211_sta_connection_los
-- 			       tx, frame_buf);
-- 
-- 	ieee80211_report_disconnect(sdata, frame_buf, sizeof(frame_buf), true,
---				    reason);
--+				    reason, false);
-- }
-- 
-- static int ieee80211_auth(struct ieee80211_sub_if_data *sdata)
--@@ -5434,7 +5465,8 @@ int ieee80211_mgd_auth(struct ieee80211_
-- 
-- 		ieee80211_report_disconnect(sdata, frame_buf,
-- 					    sizeof(frame_buf), true,
---					    WLAN_REASON_UNSPECIFIED);
--+					    WLAN_REASON_UNSPECIFIED,
--+					    false);
-- 	}
-- 
-- 	sdata_info(sdata, "authenticate with %pM\n", req->bss->bssid);
--@@ -5506,7 +5538,8 @@ int ieee80211_mgd_assoc(struct ieee80211
-- 
-- 		ieee80211_report_disconnect(sdata, frame_buf,
-- 					    sizeof(frame_buf), true,
---					    WLAN_REASON_UNSPECIFIED);
--+					    WLAN_REASON_UNSPECIFIED,
--+					    false);
-- 	}
-- 
-- 	if (ifmgd->auth_data && !ifmgd->auth_data->done) {
--@@ -5809,7 +5842,7 @@ int ieee80211_mgd_deauth(struct ieee8021
-- 		ieee80211_destroy_auth_data(sdata, false);
-- 		ieee80211_report_disconnect(sdata, frame_buf,
-- 					    sizeof(frame_buf), true,
---					    req->reason_code);
--+					    req->reason_code, false);
-- 
-- 		return 0;
-- 	}
--@@ -5829,7 +5862,7 @@ int ieee80211_mgd_deauth(struct ieee8021
-- 		ieee80211_destroy_assoc_data(sdata, false, true);
-- 		ieee80211_report_disconnect(sdata, frame_buf,
-- 					    sizeof(frame_buf), true,
---					    req->reason_code);
--+					    req->reason_code, false);
-- 		return 0;
-- 	}
-- 
--@@ -5844,7 +5877,7 @@ int ieee80211_mgd_deauth(struct ieee8021
-- 				       req->reason_code, tx, frame_buf);
-- 		ieee80211_report_disconnect(sdata, frame_buf,
-- 					    sizeof(frame_buf), true,
---					    req->reason_code);
--+					    req->reason_code, false);
-- 		return 0;
-- 	}
-- 
--@@ -5877,7 +5910,7 @@ int ieee80211_mgd_disassoc(struct ieee80
-- 			       frame_buf);
-- 
-- 	ieee80211_report_disconnect(sdata, frame_buf, sizeof(frame_buf), true,
---				    req->reason_code);
--+				    req->reason_code, false);
-- 
-- 	return 0;
-- }
----- a/net/mac80211/trace.h
--+++ b/net/mac80211/trace.h
--@@ -2,7 +2,7 @@
-- /*
-- * Portions of this file
-- * Copyright(c) 2016-2017 Intel Deutschland GmbH
---* Copyright (C) 2018 - 2019 Intel Corporation
--+* Copyright (C) 2018 - 2020 Intel Corporation
-- */
-- 
-- #if !defined(__MAC80211_DRIVER_TRACE) || defined(TRACE_HEADER_MULTI_READ)
--@@ -2086,6 +2086,27 @@ TRACE_EVENT(api_connection_loss,
-- 	)
-- );
-- 
--+TRACE_EVENT(api_disconnect,
--+	TP_PROTO(struct ieee80211_sub_if_data *sdata, bool reconnect),
--+
--+	TP_ARGS(sdata, reconnect),
--+
--+	TP_STRUCT__entry(
--+		VIF_ENTRY
--+		__field(int, reconnect)
--+	),
--+
--+	TP_fast_assign(
--+		VIF_ASSIGN;
--+		__entry->reconnect = reconnect;
--+	),
--+
--+	TP_printk(
--+		VIF_PR_FMT " reconnect:%d",
--+		VIF_PR_ARG, __entry->reconnect
--+	)
--+);
--+
-- TRACE_EVENT(api_cqm_rssi_notify,
-- 	TP_PROTO(struct ieee80211_sub_if_data *sdata,
-- 		 enum nl80211_cqm_rssi_threshold_event rssi_event,
-diff --git a/package/kernel/mac80211/patches/subsys/302-cfg80211-Add-support-to-configure-SAE-PWE-value-to-d.patch b/package/kernel/mac80211/patches/subsys/302-cfg80211-Add-support-to-configure-SAE-PWE-value-to-d.patch
-deleted file mode 100644
-index da88d1413d..0000000000
---- a/package/kernel/mac80211/patches/subsys/302-cfg80211-Add-support-to-configure-SAE-PWE-value-to-d.patch
-+++ /dev/null
-@@ -1,74 +0,0 @@
--From: Rohan Dutta <drohan@codeaurora.org>
--Date: Tue, 27 Oct 2020 12:09:10 +0200
--Subject: [PATCH] cfg80211: Add support to configure SAE PWE value to drivers
--
--Add support to configure SAE PWE preference from userspace to drivers in
--both AP and STA modes. This is needed for cases where the driver takes
--care of Authentication frame processing (SME in the driver) so that
--correct enforcement of the acceptable PWE derivation mechanism can be
--performed.
--
--The userspace applications can pass the sae_pwe value using the
--NL80211_ATTR_SAE_PWE attribute in the NL80211_CMD_CONNECT and
--NL80211_CMD_START_AP commands to the driver. This allows selection
--between the hunting-and-pecking loop and hash-to-element options for PWE
--derivation. For backwards compatibility, this new attribute is optional
--and if not included, the driver is notified of the value being
--unspecified.
--
--Signed-off-by: Rohan Dutta <drohan@codeaurora.org>
--Signed-off-by: Jouni Malinen <jouni@codeaurora.org>
--Link: https://lore.kernel.org/r/20201027100910.22283-1-jouni@codeaurora.org
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/include/net/cfg80211.h
--+++ b/include/net/cfg80211.h
--@@ -1009,6 +1009,14 @@ struct survey_info {
--  * @sae_pwd: password for SAE authentication (for devices supporting SAE
--  *	offload)
--  * @sae_pwd_len: length of SAE password (for devices supporting SAE offload)
--+ * @sae_pwe: The mechanisms allowed for SAE PWE derivation
--+ *	NL80211_SAE_PWE_UNSPECIFIED: Not-specified, used to indicate userspace
--+ *		did not specify any preference. The driver should follow its
--+ *		internal policy in such a scenario.
--+ *	NL80211_SAE_PWE_HUNT_AND_PECK: Allow hunting-and-pecking loop only
--+ *	NL80211_SAE_PWE_HASH_TO_ELEMENT: Allow hash-to-element only
--+ *	NL80211_SAE_PWE_BOTH: Allow either hunting-and-pecking loop
--+ *		or hash-to-element
--  */
-- struct cfg80211_crypto_settings {
-- 	u32 wpa_versions;
--@@ -1027,6 +1035,7 @@ struct cfg80211_crypto_settings {
-- 	const u8 *psk;
-- 	const u8 *sae_pwd;
-- 	u8 sae_pwd_len;
--+	enum nl80211_sae_pwe_mechanism sae_pwe;
-- };
-- 
-- /**
----- a/net/wireless/nl80211.c
--+++ b/net/wireless/nl80211.c
--@@ -736,6 +736,9 @@ static const struct nla_policy nl80211_p
-- 		NLA_POLICY_EXACT_LEN(IEEE80211_S1G_CAPABILITY_LEN),
-- 	[NL80211_ATTR_S1G_CAPABILITY_MASK] =
-- 		NLA_POLICY_EXACT_LEN(IEEE80211_S1G_CAPABILITY_LEN),
--+	[NL80211_ATTR_SAE_PWE] =
--+		NLA_POLICY_RANGE(NLA_U8, NL80211_SAE_PWE_HUNT_AND_PECK,
--+				 NL80211_SAE_PWE_BOTH),
-- 	[NL80211_ATTR_RECONNECT_REQUESTED] = { .type = NLA_REJECT },
-- };
-- 
--@@ -9763,6 +9766,12 @@ static int nl80211_crypto_settings(struc
-- 			nla_len(info->attrs[NL80211_ATTR_SAE_PASSWORD]);
-- 	}
-- 
--+	if (info->attrs[NL80211_ATTR_SAE_PWE])
--+		settings->sae_pwe =
--+			nla_get_u8(info->attrs[NL80211_ATTR_SAE_PWE]);
--+	else
--+		settings->sae_pwe = NL80211_SAE_PWE_UNSPECIFIED;
--+
-- 	return 0;
-- }
-- 
-diff --git a/package/kernel/mac80211/patches/subsys/305-mac80211-fix-regression-in-SSN-handling-of-addba-tx.patch b/package/kernel/mac80211/patches/subsys/305-mac80211-fix-regression-in-SSN-handling-of-addba-tx.patch
-index 6ffdffc562..dc8afb9186 100644
---- a/package/kernel/mac80211/patches/subsys/305-mac80211-fix-regression-in-SSN-handling-of-addba-tx.patch
-+++ b/package/kernel/mac80211/patches/subsys/305-mac80211-fix-regression-in-SSN-handling-of-addba-tx.patch
-@@ -34,7 +34,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
-  	} else if (ret == IEEE80211_AMPDU_TX_START_IMMEDIATE) {
- --- a/net/mac80211/sta_info.h
- +++ b/net/mac80211/sta_info.h
--@@ -190,6 +190,7 @@ struct tid_ampdu_tx {
-+@@ -199,6 +199,7 @@ struct tid_ampdu_tx {
-  	u8 stop_initiator;
-  	bool tx_stop;
-  	u16 buf_size;
-diff --git a/package/kernel/mac80211/patches/subsys/306-mac80211-set-up-the-fwd_skb-dev-for-mesh-forwarding.patch b/package/kernel/mac80211/patches/subsys/306-mac80211-set-up-the-fwd_skb-dev-for-mesh-forwarding.patch
-index c8cac93354..1ceb2be25c 100644
---- a/package/kernel/mac80211/patches/subsys/306-mac80211-set-up-the-fwd_skb-dev-for-mesh-forwarding.patch
-+++ b/package/kernel/mac80211/patches/subsys/306-mac80211-set-up-the-fwd_skb-dev-for-mesh-forwarding.patch
-@@ -52,7 +52,7 @@ Signed-off-by: Xing Song <xing.song@mediatek.com>
- 
- --- a/net/mac80211/rx.c
- +++ b/net/mac80211/rx.c
--@@ -2940,6 +2940,7 @@ ieee80211_rx_h_mesh_fwding(struct ieee80
-+@@ -2948,6 +2948,7 @@ ieee80211_rx_h_mesh_fwding(struct ieee80
-  	if (!fwd_skb)
-  		goto out;
-  
-diff --git a/package/kernel/mac80211/patches/subsys/307-mac80211-do-not-access-the-IV-when-it-was-stripped.patch b/package/kernel/mac80211/patches/subsys/307-mac80211-do-not-access-the-IV-when-it-was-stripped.patch
-deleted file mode 100644
-index b50499d58a..0000000000
---- a/package/kernel/mac80211/patches/subsys/307-mac80211-do-not-access-the-IV-when-it-was-stripped.patch
-+++ /dev/null
-@@ -1,26 +0,0 @@
--From: Xing Song <xing.song@mediatek.com>
--Date: Mon, 1 Nov 2021 10:46:57 +0800
--Subject: [PATCH] mac80211: do not access the IV when it was stripped
--
--ieee80211_get_keyid() will return false value if IV has been stripped,
--such as return 0 for IP/ARP frames due to LLC header, and return -EINVAL
--for disassociation frames due to its length... etc. Don't try to access
--it if it's not present.
--
--Signed-off-by: Xing Song <xing.song@mediatek.com>
--Link: https://lore.kernel.org/r/20211101024657.143026-1-xing.song@mediatek.com
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/net/mac80211/rx.c
--+++ b/net/mac80211/rx.c
--@@ -1945,7 +1945,8 @@ ieee80211_rx_h_decrypt(struct ieee80211_
-- 		int keyid = rx->sta->ptk_idx;
-- 		sta_ptk = rcu_dereference(rx->sta->ptk[keyid]);
-- 
---		if (ieee80211_has_protected(fc)) {
--+		if (ieee80211_has_protected(fc) &&
--+		    !(status->flag & RX_FLAG_IV_STRIPPED)) {
-- 			cs = rx->sta->cipher_scheme;
-- 			keyid = ieee80211_get_keyid(rx->skb, cs);
-- 
-diff --git a/package/kernel/mac80211/patches/subsys/308-mac80211-send-ADDBA-requests-using-the-tid-queue-of-.patch b/package/kernel/mac80211/patches/subsys/309-mac80211-send-ADDBA-requests-using-the-tid-queue-of-.patch
-similarity index 100%
-rename from package/kernel/mac80211/patches/subsys/308-mac80211-send-ADDBA-requests-using-the-tid-queue-of-.patch
-rename to package/kernel/mac80211/patches/subsys/309-mac80211-send-ADDBA-requests-using-the-tid-queue-of-.patch
-diff --git a/package/kernel/mac80211/patches/subsys/309-mac80211-agg-tx-don-t-schedule_and_wake_txq-under-st.patch b/package/kernel/mac80211/patches/subsys/310-mac80211-agg-tx-don-t-schedule_and_wake_txq-under-st.patch
-similarity index 100%
-rename from package/kernel/mac80211/patches/subsys/309-mac80211-agg-tx-don-t-schedule_and_wake_txq-under-st.patch
-rename to package/kernel/mac80211/patches/subsys/310-mac80211-agg-tx-don-t-schedule_and_wake_txq-under-st.patch
-diff --git a/package/kernel/mac80211/patches/subsys/310-net-fq_impl-bulk-free-packets-from-a-flow-on-overmem.patch b/package/kernel/mac80211/patches/subsys/310-net-fq_impl-bulk-free-packets-from-a-flow-on-overmem.patch
-deleted file mode 100644
-index 05a888006e..0000000000
---- a/package/kernel/mac80211/patches/subsys/310-net-fq_impl-bulk-free-packets-from-a-flow-on-overmem.patch
-+++ /dev/null
-@@ -1,95 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Wed, 25 Nov 2020 18:03:46 +0100
--Subject: [PATCH] net/fq_impl: bulk-free packets from a flow on overmemory
--
--This is similar to what sch_fq_codel does. It also amortizes the worst
--case cost of a follow-up patch that changes the selection of the biggest
--flow for dropping packets
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/include/net/fq_impl.h
--+++ b/include/net/fq_impl.h
--@@ -11,17 +11,25 @@
-- 
-- /* functions that are embedded into includer */
-- 
--+
--+static void
--+__fq_adjust_removal(struct fq *fq, struct fq_flow *flow, unsigned int packets,
--+		    unsigned int bytes, unsigned int truesize)
--+{
--+	struct fq_tin *tin = flow->tin;
--+
--+	tin->backlog_bytes -= bytes;
--+	tin->backlog_packets -= packets;
--+	flow->backlog -= bytes;
--+	fq->backlog -= packets;
--+	fq->memory_usage -= truesize;
--+}
--+
-- static void fq_adjust_removal(struct fq *fq,
-- 			      struct fq_flow *flow,
-- 			      struct sk_buff *skb)
-- {
---	struct fq_tin *tin = flow->tin;
---
---	tin->backlog_bytes -= skb->len;
---	tin->backlog_packets--;
---	flow->backlog -= skb->len;
---	fq->backlog--;
---	fq->memory_usage -= skb->truesize;
--+	__fq_adjust_removal(fq, flow, 1, skb->len, skb->truesize);
-- }
-- 
-- static void fq_rejigger_backlog(struct fq *fq, struct fq_flow *flow)
--@@ -59,6 +67,34 @@ static struct sk_buff *fq_flow_dequeue(s
-- 	return skb;
-- }
-- 
--+static int fq_flow_drop(struct fq *fq, struct fq_flow *flow,
--+			fq_skb_free_t free_func)
--+{
--+	unsigned int packets = 0, bytes = 0, truesize = 0;
--+	struct fq_tin *tin = flow->tin;
--+	struct sk_buff *skb;
--+	int pending;
--+
--+	lockdep_assert_held(&fq->lock);
--+
--+	pending = min_t(int, 32, skb_queue_len(&flow->queue) / 2);
--+	do {
--+		skb = __skb_dequeue(&flow->queue);
--+		if (!skb)
--+			break;
--+
--+		packets++;
--+		bytes += skb->len;
--+		truesize += skb->truesize;
--+		free_func(fq, tin, flow, skb);
--+	} while (packets < pending);
--+
--+	__fq_adjust_removal(fq, flow, packets, bytes, truesize);
--+	fq_rejigger_backlog(fq, flow);
--+
--+	return packets;
--+}
--+
-- static struct sk_buff *fq_tin_dequeue(struct fq *fq,
-- 				      struct fq_tin *tin,
-- 				      fq_tin_dequeue_t dequeue_func)
--@@ -190,12 +226,9 @@ static void fq_tin_enqueue(struct fq *fq
-- 		if (!flow)
-- 			return;
-- 
---		skb = fq_flow_dequeue(fq, flow);
---		if (!skb)
--+		if (!fq_flow_drop(fq, flow, free_func))
-- 			return;
-- 
---		free_func(fq, flow->tin, flow, skb);
---
-- 		flow->tin->overlimit++;
-- 		fq->overlimit++;
-- 		if (oom) {
-diff --git a/package/kernel/mac80211/patches/subsys/311-mac80211-use-coarse-boottime-for-airtime-fairness-co.patch b/package/kernel/mac80211/patches/subsys/311-mac80211-use-coarse-boottime-for-airtime-fairness-co.patch
-new file mode 100644
-index 0000000000..c43cd3acb9
---- /dev/null
-+++ b/package/kernel/mac80211/patches/subsys/311-mac80211-use-coarse-boottime-for-airtime-fairness-co.patch
-@@ -0,0 +1,60 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Tue, 14 Dec 2021 17:53:12 +0100
-+Subject: [PATCH] mac80211: use coarse boottime for airtime fairness code
-+
-+The time values used by the airtime fairness code only need to be accurate
-+enough to cover station activity detection.
-+Using ktime_get_coarse_boottime_ns instead of ktime_get_boottime_ns will
-+drop the accuracy down to jiffies intervals, but at the same time saves
-+a lot of CPU cycles in a hot path
-+
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/net/mac80211/tx.c
-++++ b/net/mac80211/tx.c
-+@@ -3820,7 +3820,7 @@ struct ieee80211_txq *ieee80211_next_txq
-+ {
-+ 	struct ieee80211_local *local = hw_to_local(hw);
-+ 	struct airtime_sched_info *air_sched;
-+-	u64 now = ktime_get_boottime_ns();
-++	u64 now = ktime_get_coarse_boottime_ns();
-+ 	struct ieee80211_txq *ret = NULL;
-+ 	struct airtime_info *air_info;
-+ 	struct txq_info *txqi = NULL;
-+@@ -3947,7 +3947,7 @@ void ieee80211_update_airtime_weight(str
-+ 	u64 weight_sum = 0;
-+ 
-+ 	if (unlikely(!now))
-+-		now = ktime_get_boottime_ns();
-++		now = ktime_get_coarse_boottime_ns();
-+ 
-+ 	lockdep_assert_held(&air_sched->lock);
-+ 
-+@@ -3973,7 +3973,7 @@ void ieee80211_schedule_txq(struct ieee8
-+ 	struct ieee80211_local *local = hw_to_local(hw);
-+ 	struct txq_info *txqi = to_txq_info(txq);
-+ 	struct airtime_sched_info *air_sched;
-+-	u64 now = ktime_get_boottime_ns();
-++	u64 now = ktime_get_coarse_boottime_ns();
-+ 	struct airtime_info *air_info;
-+ 	u8 ac = txq->ac;
-+ 	bool was_active;
-+@@ -4031,7 +4031,7 @@ static void __ieee80211_unschedule_txq(s
-+ 
-+ 	if (!purge)
-+ 		airtime_set_active(air_sched, air_info,
-+-				   ktime_get_boottime_ns());
-++				   ktime_get_coarse_boottime_ns());
-+ 
-+ 	rb_erase_cached(&txqi->schedule_order,
-+ 			&air_sched->active_txqs);
-+@@ -4119,7 +4119,7 @@ bool ieee80211_txq_may_transmit(struct i
-+ 	if (RB_EMPTY_NODE(&txqi->schedule_order))
-+ 		goto out;
-+ 
-+-	now = ktime_get_boottime_ns();
-++	now = ktime_get_coarse_boottime_ns();
-+ 
-+ 	/* Like in ieee80211_next_txq(), make sure the first station in the
-+ 	 * scheduling order is eligible for transmission to avoid starvation.
-diff --git a/package/kernel/mac80211/patches/subsys/311-net-fq_impl-drop-get_default_func-move-default-flow-.patch b/package/kernel/mac80211/patches/subsys/311-net-fq_impl-drop-get_default_func-move-default-flow-.patch
-deleted file mode 100644
-index 6adca7d70d..0000000000
---- a/package/kernel/mac80211/patches/subsys/311-net-fq_impl-drop-get_default_func-move-default-flow-.patch
-+++ /dev/null
-@@ -1,144 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Wed, 25 Nov 2020 18:09:10 +0100
--Subject: [PATCH] net/fq_impl: drop get_default_func, move default flow to
-- fq_tin
--
--Simplifies the code and prepares for a rework of scanning for flows on
--overmemory drop.
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/include/net/fq.h
--+++ b/include/net/fq.h
--@@ -47,6 +47,7 @@ struct fq_flow {
-- struct fq_tin {
-- 	struct list_head new_flows;
-- 	struct list_head old_flows;
--+	struct fq_flow default_flow;
-- 	u32 backlog_bytes;
-- 	u32 backlog_packets;
-- 	u32 overlimit;
----- a/include/net/fq_impl.h
--+++ b/include/net/fq_impl.h
--@@ -151,8 +151,7 @@ static u32 fq_flow_idx(struct fq *fq, st
-- 
-- static struct fq_flow *fq_flow_classify(struct fq *fq,
-- 					struct fq_tin *tin, u32 idx,
---					struct sk_buff *skb,
---					fq_flow_get_default_t get_default_func)
--+					struct sk_buff *skb)
-- {
-- 	struct fq_flow *flow;
-- 
--@@ -160,7 +159,7 @@ static struct fq_flow *fq_flow_classify(
-- 
-- 	flow = &fq->flows[idx];
-- 	if (flow->tin && flow->tin != tin) {
---		flow = get_default_func(fq, tin, idx, skb);
--+		flow = &tin->default_flow;
-- 		tin->collisions++;
-- 		fq->collisions++;
-- 	}
--@@ -192,15 +191,14 @@ static void fq_recalc_backlog(struct fq
-- static void fq_tin_enqueue(struct fq *fq,
-- 			   struct fq_tin *tin, u32 idx,
-- 			   struct sk_buff *skb,
---			   fq_skb_free_t free_func,
---			   fq_flow_get_default_t get_default_func)
--+			   fq_skb_free_t free_func)
-- {
-- 	struct fq_flow *flow;
-- 	bool oom;
-- 
-- 	lockdep_assert_held(&fq->lock);
-- 
---	flow = fq_flow_classify(fq, tin, idx, skb, get_default_func);
--+	flow = fq_flow_classify(fq, tin, idx, skb);
-- 
-- 	flow->tin = tin;
-- 	flow->backlog += skb->len;
--@@ -331,6 +329,7 @@ static void fq_tin_init(struct fq_tin *t
-- {
-- 	INIT_LIST_HEAD(&tin->new_flows);
-- 	INIT_LIST_HEAD(&tin->old_flows);
--+	fq_flow_init(&tin->default_flow);
-- }
-- 
-- static int fq_init(struct fq *fq, int flows_cnt)
----- a/net/mac80211/ieee80211_i.h
--+++ b/net/mac80211/ieee80211_i.h
--@@ -846,7 +846,6 @@ enum txq_info_flags {
--  */
-- struct txq_info {
-- 	struct fq_tin tin;
---	struct fq_flow def_flow;
-- 	struct codel_vars def_cvars;
-- 	struct codel_stats cstats;
-- 	struct sk_buff_head frags;
----- a/net/mac80211/tx.c
--+++ b/net/mac80211/tx.c
--@@ -1322,7 +1322,7 @@ static struct sk_buff *codel_dequeue_fun
-- 	fq = &local->fq;
-- 
-- 	if (cvars == &txqi->def_cvars)
---		flow = &txqi->def_flow;
--+		flow = &txqi->tin.default_flow;
-- 	else
-- 		flow = &fq->flows[cvars - local->cvars];
-- 
--@@ -1365,7 +1365,7 @@ static struct sk_buff *fq_tin_dequeue_fu
-- 		cparams = &local->cparams;
-- 	}
-- 
---	if (flow == &txqi->def_flow)
--+	if (flow == &tin->default_flow)
-- 		cvars = &txqi->def_cvars;
-- 	else
-- 		cvars = &local->cvars[flow - fq->flows];
--@@ -1392,17 +1392,6 @@ static void fq_skb_free_func(struct fq *
-- 	ieee80211_free_txskb(&local->hw, skb);
-- }
-- 
---static struct fq_flow *fq_flow_get_default_func(struct fq *fq,
---						struct fq_tin *tin,
---						int idx,
---						struct sk_buff *skb)
---{
---	struct txq_info *txqi;
---
---	txqi = container_of(tin, struct txq_info, tin);
---	return &txqi->def_flow;
---}
---
-- static void ieee80211_txq_enqueue(struct ieee80211_local *local,
-- 				  struct txq_info *txqi,
-- 				  struct sk_buff *skb)
--@@ -1415,8 +1404,7 @@ static void ieee80211_txq_enqueue(struct
-- 
-- 	spin_lock_bh(&fq->lock);
-- 	fq_tin_enqueue(fq, tin, flow_idx, skb,
---		       fq_skb_free_func,
---		       fq_flow_get_default_func);
--+		       fq_skb_free_func);
-- 	spin_unlock_bh(&fq->lock);
-- }
-- 
--@@ -1459,7 +1447,6 @@ void ieee80211_txq_init(struct ieee80211
-- 			struct txq_info *txqi, int tid)
-- {
-- 	fq_tin_init(&txqi->tin);
---	fq_flow_init(&txqi->def_flow);
-- 	codel_vars_init(&txqi->def_cvars);
-- 	codel_stats_init(&txqi->cstats);
-- 	__skb_queue_head_init(&txqi->frags);
--@@ -3332,8 +3319,7 @@ static bool ieee80211_amsdu_aggregate(st
-- 	 */
-- 
-- 	tin = &txqi->tin;
---	flow = fq_flow_classify(fq, tin, flow_idx, skb,
---				fq_flow_get_default_func);
--+	flow = fq_flow_classify(fq, tin, flow_idx, skb);
-- 	head = skb_peek_tail(&flow->queue);
-- 	if (!head || skb_is_gso(head))
-- 		goto out;
-diff --git a/package/kernel/mac80211/patches/subsys/312-net-fq_impl-do-not-maintain-a-backlog-sorted-list-of.patch b/package/kernel/mac80211/patches/subsys/312-net-fq_impl-do-not-maintain-a-backlog-sorted-list-of.patch
-deleted file mode 100644
-index 793c76abec..0000000000
---- a/package/kernel/mac80211/patches/subsys/312-net-fq_impl-do-not-maintain-a-backlog-sorted-list-of.patch
-+++ /dev/null
-@@ -1,317 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Wed, 25 Nov 2020 18:10:34 +0100
--Subject: [PATCH] net/fq_impl: do not maintain a backlog-sorted list of
-- flows
--
--A sorted flow list is only needed to drop packets in the biggest flow when
--hitting the overmemory condition.
--By scanning flows only when needed, we can avoid paying the cost of
--maintaining the list under normal conditions
--In order to avoid scanning lots of empty flows and touching too many cold
--cache lines, a bitmap of flows with backlog is maintained
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/include/net/fq.h
--+++ b/include/net/fq.h
--@@ -19,8 +19,6 @@ struct fq_tin;
--  * @flowchain: can be linked to fq_tin's new_flows or old_flows. Used for DRR++
--  *	(deficit round robin) based round robin queuing similar to the one
--  *	found in net/sched/sch_fq_codel.c
--- * @backlogchain: can be linked to other fq_flow and fq. Used to keep track of
--- *	fat flows and efficient head-dropping if packet limit is reached
--  * @queue: sk_buff queue to hold packets
--  * @backlog: number of bytes pending in the queue. The number of packets can be
--  *	found in @queue.qlen
--@@ -29,7 +27,6 @@ struct fq_tin;
-- struct fq_flow {
-- 	struct fq_tin *tin;
-- 	struct list_head flowchain;
---	struct list_head backlogchain;
-- 	struct sk_buff_head queue;
-- 	u32 backlog;
-- 	int deficit;
--@@ -47,6 +44,7 @@ struct fq_flow {
-- struct fq_tin {
-- 	struct list_head new_flows;
-- 	struct list_head old_flows;
--+	struct list_head tin_list;
-- 	struct fq_flow default_flow;
-- 	u32 backlog_bytes;
-- 	u32 backlog_packets;
--@@ -60,14 +58,14 @@ struct fq_tin {
-- /**
--  * struct fq - main container for fair queuing purposes
--  *
--- * @backlogs: linked to fq_flows. Used to maintain fat flows for efficient
--- *	head-dropping when @backlog reaches @limit
--  * @limit: max number of packets that can be queued across all flows
--  * @backlog: number of packets queued across all flows
--  */
-- struct fq {
-- 	struct fq_flow *flows;
---	struct list_head backlogs;
--+	unsigned long *flows_bitmap;
--+
--+	struct list_head tin_backlog;
-- 	spinlock_t lock;
-- 	u32 flows_cnt;
-- 	u32 limit;
----- a/include/net/fq_impl.h
--+++ b/include/net/fq_impl.h
--@@ -17,12 +17,24 @@ __fq_adjust_removal(struct fq *fq, struc
-- 		    unsigned int bytes, unsigned int truesize)
-- {
-- 	struct fq_tin *tin = flow->tin;
--+	int idx;
-- 
-- 	tin->backlog_bytes -= bytes;
-- 	tin->backlog_packets -= packets;
-- 	flow->backlog -= bytes;
-- 	fq->backlog -= packets;
-- 	fq->memory_usage -= truesize;
--+
--+	if (flow->backlog)
--+		return;
--+
--+	if (flow == &tin->default_flow) {
--+		list_del_init(&tin->tin_list);
--+		return;
--+	}
--+
--+	idx = flow - fq->flows;
--+	__clear_bit(idx, fq->flows_bitmap);
-- }
-- 
-- static void fq_adjust_removal(struct fq *fq,
--@@ -32,24 +44,6 @@ static void fq_adjust_removal(struct fq
-- 	__fq_adjust_removal(fq, flow, 1, skb->len, skb->truesize);
-- }
-- 
---static void fq_rejigger_backlog(struct fq *fq, struct fq_flow *flow)
---{
---	struct fq_flow *i;
---
---	if (flow->backlog == 0) {
---		list_del_init(&flow->backlogchain);
---	} else {
---		i = flow;
---
---		list_for_each_entry_continue(i, &fq->backlogs, backlogchain)
---			if (i->backlog < flow->backlog)
---				break;
---
---		list_move_tail(&flow->backlogchain,
---			       &i->backlogchain);
---	}
---}
---
-- static struct sk_buff *fq_flow_dequeue(struct fq *fq,
-- 				       struct fq_flow *flow)
-- {
--@@ -62,7 +56,6 @@ static struct sk_buff *fq_flow_dequeue(s
-- 		return NULL;
-- 
-- 	fq_adjust_removal(fq, flow, skb);
---	fq_rejigger_backlog(fq, flow);
-- 
-- 	return skb;
-- }
--@@ -90,7 +83,6 @@ static int fq_flow_drop(struct fq *fq, s
-- 	} while (packets < pending);
-- 
-- 	__fq_adjust_removal(fq, flow, packets, bytes, truesize);
---	fq_rejigger_backlog(fq, flow);
-- 
-- 	return packets;
-- }
--@@ -170,22 +162,36 @@ static struct fq_flow *fq_flow_classify(
-- 	return flow;
-- }
-- 
---static void fq_recalc_backlog(struct fq *fq,
---			      struct fq_tin *tin,
---			      struct fq_flow *flow)
---{
---	struct fq_flow *i;
---
---	if (list_empty(&flow->backlogchain))
---		list_add_tail(&flow->backlogchain, &fq->backlogs);
---
---	i = flow;
---	list_for_each_entry_continue_reverse(i, &fq->backlogs,
---					     backlogchain)
---		if (i->backlog > flow->backlog)
---			break;
--+static struct fq_flow *fq_find_fattest_flow(struct fq *fq)
--+{
--+	struct fq_tin *tin;
--+	struct fq_flow *flow = NULL;
--+	u32 len = 0;
--+	int i;
--+
--+	for_each_set_bit(i, fq->flows_bitmap, fq->flows_cnt) {
--+		struct fq_flow *cur = &fq->flows[i];
--+		unsigned int cur_len;
--+
--+		cur_len = cur->backlog;
--+		if (cur_len <= len)
--+			continue;
--+
--+		flow = cur;
--+		len = cur_len;
--+	}
-- 
---	list_move(&flow->backlogchain, &i->backlogchain);
--+	list_for_each_entry(tin, &fq->tin_backlog, tin_list) {
--+		unsigned int cur_len = tin->default_flow.backlog;
--+
--+		if (cur_len <= len)
--+			continue;
--+
--+		flow = &tin->default_flow;
--+		len = cur_len;
--+	}
--+
--+	return flow;
-- }
-- 
-- static void fq_tin_enqueue(struct fq *fq,
--@@ -200,6 +206,13 @@ static void fq_tin_enqueue(struct fq *fq
-- 
-- 	flow = fq_flow_classify(fq, tin, idx, skb);
-- 
--+	if (!flow->backlog) {
--+		if (flow != &tin->default_flow)
--+			__set_bit(idx, fq->flows_bitmap);
--+		else if (list_empty(&tin->tin_list))
--+			list_add(&tin->tin_list, &fq->tin_backlog);
--+	}
--+
-- 	flow->tin = tin;
-- 	flow->backlog += skb->len;
-- 	tin->backlog_bytes += skb->len;
--@@ -207,8 +220,6 @@ static void fq_tin_enqueue(struct fq *fq
-- 	fq->memory_usage += skb->truesize;
-- 	fq->backlog++;
-- 
---	fq_recalc_backlog(fq, tin, flow);
---
-- 	if (list_empty(&flow->flowchain)) {
-- 		flow->deficit = fq->quantum;
-- 		list_add_tail(&flow->flowchain,
--@@ -218,9 +229,7 @@ static void fq_tin_enqueue(struct fq *fq
-- 	__skb_queue_tail(&flow->queue, skb);
-- 	oom = (fq->memory_usage > fq->memory_limit);
-- 	while (fq->backlog > fq->limit || oom) {
---		flow = list_first_entry_or_null(&fq->backlogs,
---						struct fq_flow,
---						backlogchain);
--+		flow = fq_find_fattest_flow(fq);
-- 		if (!flow)
-- 			return;
-- 
--@@ -255,8 +264,6 @@ static void fq_flow_filter(struct fq *fq
-- 		fq_adjust_removal(fq, flow, skb);
-- 		free_func(fq, tin, flow, skb);
-- 	}
---
---	fq_rejigger_backlog(fq, flow);
-- }
-- 
-- static void fq_tin_filter(struct fq *fq,
--@@ -279,16 +286,18 @@ static void fq_flow_reset(struct fq *fq,
-- 			  struct fq_flow *flow,
-- 			  fq_skb_free_t free_func)
-- {
--+	struct fq_tin *tin = flow->tin;
-- 	struct sk_buff *skb;
-- 
-- 	while ((skb = fq_flow_dequeue(fq, flow)))
---		free_func(fq, flow->tin, flow, skb);
--+		free_func(fq, tin, flow, skb);
-- 
---	if (!list_empty(&flow->flowchain))
--+	if (!list_empty(&flow->flowchain)) {
-- 		list_del_init(&flow->flowchain);
---
---	if (!list_empty(&flow->backlogchain))
---		list_del_init(&flow->backlogchain);
--+		if (list_empty(&tin->new_flows) &&
--+		    list_empty(&tin->old_flows))
--+			list_del_init(&tin->tin_list);
--+	}
-- 
-- 	flow->tin = NULL;
-- 
--@@ -314,6 +323,7 @@ static void fq_tin_reset(struct fq *fq,
-- 		fq_flow_reset(fq, flow, free_func);
-- 	}
-- 
--+	WARN_ON_ONCE(!list_empty(&tin->tin_list));
-- 	WARN_ON_ONCE(tin->backlog_bytes);
-- 	WARN_ON_ONCE(tin->backlog_packets);
-- }
--@@ -321,7 +331,6 @@ static void fq_tin_reset(struct fq *fq,
-- static void fq_flow_init(struct fq_flow *flow)
-- {
-- 	INIT_LIST_HEAD(&flow->flowchain);
---	INIT_LIST_HEAD(&flow->backlogchain);
-- 	__skb_queue_head_init(&flow->queue);
-- }
-- 
--@@ -329,6 +338,7 @@ static void fq_tin_init(struct fq_tin *t
-- {
-- 	INIT_LIST_HEAD(&tin->new_flows);
-- 	INIT_LIST_HEAD(&tin->old_flows);
--+	INIT_LIST_HEAD(&tin->tin_list);
-- 	fq_flow_init(&tin->default_flow);
-- }
-- 
--@@ -337,8 +347,8 @@ static int fq_init(struct fq *fq, int fl
-- 	int i;
-- 
-- 	memset(fq, 0, sizeof(fq[0]));
---	INIT_LIST_HEAD(&fq->backlogs);
-- 	spin_lock_init(&fq->lock);
--+	INIT_LIST_HEAD(&fq->tin_backlog);
-- 	fq->flows_cnt = max_t(u32, flows_cnt, 1);
-- 	fq->quantum = 300;
-- 	fq->limit = 8192;
--@@ -348,6 +358,14 @@ static int fq_init(struct fq *fq, int fl
-- 	if (!fq->flows)
-- 		return -ENOMEM;
-- 
--+	fq->flows_bitmap = kcalloc(BITS_TO_LONGS(fq->flows_cnt), sizeof(long),
--+				   GFP_KERNEL);
--+	if (!fq->flows_bitmap) {
--+		kvfree(fq->flows);
--+		fq->flows = NULL;
--+		return -ENOMEM;
--+	}
--+
-- 	for (i = 0; i < fq->flows_cnt; i++)
-- 		fq_flow_init(&fq->flows[i]);
-- 
--@@ -364,6 +382,9 @@ static void fq_reset(struct fq *fq,
-- 
-- 	kvfree(fq->flows);
-- 	fq->flows = NULL;
--+
--+	kfree(fq->flows_bitmap);
--+	fq->flows_bitmap = NULL;
-- }
-- 
-- #endif
----- a/net/mac80211/tx.c
--+++ b/net/mac80211/tx.c
--@@ -3386,8 +3386,6 @@ out_recalc:
-- 	if (head->len != orig_len) {
-- 		flow->backlog += head->len - orig_len;
-- 		tin->backlog_bytes += head->len - orig_len;
---
---		fq_recalc_backlog(fq, tin, flow);
-- 	}
-- out:
-- 	spin_unlock_bh(&fq->lock);
-diff --git a/package/kernel/mac80211/patches/subsys/315-mac80211-add-rx-decapsulation-offload-support.patch b/package/kernel/mac80211/patches/subsys/315-mac80211-add-rx-decapsulation-offload-support.patch
-deleted file mode 100644
-index 518bc582ae..0000000000
---- a/package/kernel/mac80211/patches/subsys/315-mac80211-add-rx-decapsulation-offload-support.patch
-+++ /dev/null
-@@ -1,570 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Wed, 16 Dec 2020 21:34:03 +0100
--Subject: [PATCH] mac80211: add rx decapsulation offload support
--
--This allows drivers to pass 802.3 frames to mac80211, with some restrictions:
--
--- the skb must be passed with a valid sta
--- fast-rx needs to be active for the sta
--- monitor mode needs to be disabled
--
--mac80211 will tell the driver when it is safe to enable rx decap offload for
--a particular station.
--
--In order to implement support, a driver must:
--
--- call ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD)
--- implement ops->sta_set_decap_offload
--- mark 802.3 frames with RX_FLAG_8023
--
--If it doesn't want to enable offload for some vif types, it can mask out
--IEEE80211_OFFLOAD_DECAP_ENABLED in vif->offload_flags from within the
--.add_interface or .update_vif_offload driver ops
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/include/net/mac80211.h
--+++ b/include/net/mac80211.h
--@@ -1297,6 +1297,8 @@ ieee80211_tx_info_clear_status(struct ie
--  *	the "0-length PSDU" field included there.  The value for it is
--  *	in &struct ieee80211_rx_status.  Note that if this value isn't
--  *	known the frame shouldn't be reported.
--+ * @RX_FLAG_8023: the frame has an 802.3 header (decap offload performed by
--+ *	hardware or driver)
--  */
-- enum mac80211_rx_flags {
-- 	RX_FLAG_MMIC_ERROR		= BIT(0),
--@@ -1329,6 +1331,7 @@ enum mac80211_rx_flags {
-- 	RX_FLAG_RADIOTAP_HE_MU		= BIT(27),
-- 	RX_FLAG_RADIOTAP_LSIG		= BIT(28),
-- 	RX_FLAG_NO_PSDU			= BIT(29),
--+	RX_FLAG_8023			= BIT(30),
-- };
-- 
-- /**
--@@ -1650,11 +1653,15 @@ enum ieee80211_vif_flags {
--  *	The driver supports sending frames passed as 802.3 frames by mac80211.
--  *	It must also support sending 802.11 packets for the same interface.
--  * @IEEE80211_OFFLOAD_ENCAP_4ADDR: support 4-address mode encapsulation offload
--+ * @IEEE80211_OFFLOAD_DECAP_ENABLED: rx encapsulation offload is enabled
--+ *	The driver supports passing received 802.11 frames as 802.3 frames to
--+ *	mac80211.
--  */
-- 
-- enum ieee80211_offload_flags {
-- 	IEEE80211_OFFLOAD_ENCAP_ENABLED		= BIT(0),
-- 	IEEE80211_OFFLOAD_ENCAP_4ADDR		= BIT(1),
--+	IEEE80211_OFFLOAD_DECAP_ENABLED		= BIT(2),
-- };
-- 
-- /**
--@@ -2390,6 +2397,9 @@ struct ieee80211_txq {
--  * @IEEE80211_HW_SUPPORTS_TX_ENCAP_OFFLOAD: Hardware supports tx encapsulation
--  *	offload
--  *
--+ * @IEEE80211_HW_SUPPORTS_RX_DECAP_OFFLOAD: Hardware supports rx decapsulation
--+ *	offload
--+ *
--  * @NUM_IEEE80211_HW_FLAGS: number of hardware flags, used for sizing arrays
--  */
-- enum ieee80211_hw_flags {
--@@ -2443,6 +2453,7 @@ enum ieee80211_hw_flags {
-- 	IEEE80211_HW_SUPPORTS_ONLY_HE_MULTI_BSSID,
-- 	IEEE80211_HW_AMPDU_KEYBORDER_SUPPORT,
-- 	IEEE80211_HW_SUPPORTS_TX_ENCAP_OFFLOAD,
--+	IEEE80211_HW_SUPPORTS_RX_DECAP_OFFLOAD,
-- 
-- 	/* keep last, obviously */
-- 	NUM_IEEE80211_HW_FLAGS
--@@ -4196,6 +4207,9 @@ struct ieee80211_ops {
-- 				   struct ieee80211_vif *vif);
-- 	void (*sta_set_4addr)(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
-- 			      struct ieee80211_sta *sta, bool enabled);
--+	void (*sta_set_decap_offload)(struct ieee80211_hw *hw,
--+				      struct ieee80211_vif *vif,
--+				      struct ieee80211_sta *sta, bool enabled);
-- };
-- 
-- /**
----- a/net/mac80211/debugfs.c
--+++ b/net/mac80211/debugfs.c
--@@ -405,6 +405,7 @@ static const char *hw_flag_names[] = {
-- 	FLAG(SUPPORTS_ONLY_HE_MULTI_BSSID),
-- 	FLAG(AMPDU_KEYBORDER_SUPPORT),
-- 	FLAG(SUPPORTS_TX_ENCAP_OFFLOAD),
--+	FLAG(SUPPORTS_RX_DECAP_OFFLOAD),
-- #undef FLAG
-- };
-- 
----- a/net/mac80211/debugfs_sta.c
--+++ b/net/mac80211/debugfs_sta.c
--@@ -79,6 +79,7 @@ static const char * const sta_flag_names
-- 	FLAG(MPSP_RECIPIENT),
-- 	FLAG(PS_DELIVER),
-- 	FLAG(USES_ENCRYPTION),
--+	FLAG(DECAP_OFFLOAD),
-- #undef FLAG
-- };
-- 
----- a/net/mac80211/driver-ops.h
--+++ b/net/mac80211/driver-ops.h
--@@ -1413,4 +1413,20 @@ static inline void drv_sta_set_4addr(str
-- 	trace_drv_return_void(local);
-- }
-- 
--+static inline void drv_sta_set_decap_offload(struct ieee80211_local *local,
--+					     struct ieee80211_sub_if_data *sdata,
--+					     struct ieee80211_sta *sta,
--+					     bool enabled)
--+{
--+	sdata = get_bss_sdata(sdata);
--+	if (!check_sdata_in_driver(sdata))
--+		return;
--+
--+	trace_drv_sta_set_decap_offload(local, sdata, sta, enabled);
--+	if (local->ops->sta_set_decap_offload)
--+		local->ops->sta_set_decap_offload(&local->hw, &sdata->vif, sta,
--+						  enabled);
--+	trace_drv_return_void(local);
--+}
--+
-- #endif /* __MAC80211_DRIVER_OPS */
----- a/net/mac80211/iface.c
--+++ b/net/mac80211/iface.c
--@@ -856,7 +856,7 @@ static const struct net_device_ops ieee8
-- 
-- };
-- 
---static bool ieee80211_iftype_supports_encap_offload(enum nl80211_iftype iftype)
--+static bool ieee80211_iftype_supports_hdr_offload(enum nl80211_iftype iftype)
-- {
-- 	switch (iftype) {
-- 	/* P2P GO and client are mapped to AP/STATION types */
--@@ -876,7 +876,7 @@ static bool ieee80211_set_sdata_offload_
-- 	flags = sdata->vif.offload_flags;
-- 
-- 	if (ieee80211_hw_check(&local->hw, SUPPORTS_TX_ENCAP_OFFLOAD) &&
---	    ieee80211_iftype_supports_encap_offload(sdata->vif.type)) {
--+	    ieee80211_iftype_supports_hdr_offload(sdata->vif.type)) {
-- 		flags |= IEEE80211_OFFLOAD_ENCAP_ENABLED;
-- 
-- 		if (!ieee80211_hw_check(&local->hw, SUPPORTS_TX_FRAG) &&
--@@ -889,10 +889,21 @@ static bool ieee80211_set_sdata_offload_
-- 		flags &= ~IEEE80211_OFFLOAD_ENCAP_ENABLED;
-- 	}
-- 
--+	if (ieee80211_hw_check(&local->hw, SUPPORTS_RX_DECAP_OFFLOAD) &&
--+	    ieee80211_iftype_supports_hdr_offload(sdata->vif.type)) {
--+		flags |= IEEE80211_OFFLOAD_DECAP_ENABLED;
--+
--+		if (local->monitors)
--+			flags &= ~IEEE80211_OFFLOAD_DECAP_ENABLED;
--+	} else {
--+		flags &= ~IEEE80211_OFFLOAD_DECAP_ENABLED;
--+	}
--+
-- 	if (sdata->vif.offload_flags == flags)
-- 		return false;
-- 
-- 	sdata->vif.offload_flags = flags;
--+	ieee80211_check_fast_rx_iface(sdata);
-- 	return true;
-- }
-- 
--@@ -910,7 +921,7 @@ static void ieee80211_set_vif_encap_ops(
-- 	}
-- 
-- 	if (!ieee80211_hw_check(&local->hw, SUPPORTS_TX_ENCAP_OFFLOAD) ||
---	    !ieee80211_iftype_supports_encap_offload(bss->vif.type))
--+	    !ieee80211_iftype_supports_hdr_offload(bss->vif.type))
-- 		return;
-- 
-- 	enabled = bss->vif.offload_flags & IEEE80211_OFFLOAD_ENCAP_ENABLED;
----- a/net/mac80211/rx.c
--+++ b/net/mac80211/rx.c
--@@ -4197,7 +4197,9 @@ void ieee80211_check_fast_rx(struct sta_
-- 		.vif_type = sdata->vif.type,
-- 		.control_port_protocol = sdata->control_port_protocol,
-- 	}, *old, *new = NULL;
--+	bool set_offload = false;
-- 	bool assign = false;
--+	bool offload;
-- 
-- 	/* use sparse to check that we don't return without updating */
-- 	__acquire(check_fast_rx);
--@@ -4310,6 +4312,17 @@ void ieee80211_check_fast_rx(struct sta_
-- 	if (assign)
-- 		new = kmemdup(&fastrx, sizeof(fastrx), GFP_KERNEL);
-- 
--+	offload = assign &&
--+		  (sdata->vif.offload_flags & IEEE80211_OFFLOAD_DECAP_ENABLED);
--+
--+	if (offload)
--+		set_offload = !test_and_set_sta_flag(sta, WLAN_STA_DECAP_OFFLOAD);
--+	else
--+		set_offload = test_and_clear_sta_flag(sta, WLAN_STA_DECAP_OFFLOAD);
--+
--+	if (set_offload)
--+		drv_sta_set_decap_offload(local, sdata, &sta->sta, assign);
--+
-- 	spin_lock_bh(&sta->lock);
-- 	old = rcu_dereference_protected(sta->fast_rx, true);
-- 	rcu_assign_pointer(sta->fast_rx, new);
--@@ -4356,6 +4369,108 @@ void ieee80211_check_fast_rx_iface(struc
-- 	mutex_unlock(&local->sta_mtx);
-- }
-- 
--+static void ieee80211_rx_8023(struct ieee80211_rx_data *rx,
--+			      struct ieee80211_fast_rx *fast_rx,
--+			      int orig_len)
--+{
--+	struct ieee80211_sta_rx_stats *stats;
--+	struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(rx->skb);
--+	struct sta_info *sta = rx->sta;
--+	struct sk_buff *skb = rx->skb;
--+	void *sa = skb->data + ETH_ALEN;
--+	void *da = skb->data;
--+
--+	stats = &sta->rx_stats;
--+	if (fast_rx->uses_rss)
--+		stats = this_cpu_ptr(sta->pcpu_rx_stats);
--+
--+	/* statistics part of ieee80211_rx_h_sta_process() */
--+	if (!(status->flag & RX_FLAG_NO_SIGNAL_VAL)) {
--+		stats->last_signal = status->signal;
--+		if (!fast_rx->uses_rss)
--+			ewma_signal_add(&sta->rx_stats_avg.signal,
--+					-status->signal);
--+	}
--+
--+	if (status->chains) {
--+		int i;
--+
--+		stats->chains = status->chains;
--+		for (i = 0; i < ARRAY_SIZE(status->chain_signal); i++) {
--+			int signal = status->chain_signal[i];
--+
--+			if (!(status->chains & BIT(i)))
--+				continue;
--+
--+			stats->chain_signal_last[i] = signal;
--+			if (!fast_rx->uses_rss)
--+				ewma_signal_add(&sta->rx_stats_avg.chain_signal[i],
--+						-signal);
--+		}
--+	}
--+	/* end of statistics */
--+
--+	stats->last_rx = jiffies;
--+	stats->last_rate = sta_stats_encode_rate(status);
--+
--+	stats->fragments++;
--+	stats->packets++;
--+
--+	skb->dev = fast_rx->dev;
--+
--+	ieee80211_rx_stats(fast_rx->dev, skb->len);
--+
--+	/* The seqno index has the same property as needed
--+	 * for the rx_msdu field, i.e. it is IEEE80211_NUM_TIDS
--+	 * for non-QoS-data frames. Here we know it's a data
--+	 * frame, so count MSDUs.
--+	 */
--+	u64_stats_update_begin(&stats->syncp);
--+	stats->msdu[rx->seqno_idx]++;
--+	stats->bytes += orig_len;
--+	u64_stats_update_end(&stats->syncp);
--+
--+	if (fast_rx->internal_forward) {
--+		struct sk_buff *xmit_skb = NULL;
--+		if (is_multicast_ether_addr(da)) {
--+			xmit_skb = skb_copy(skb, GFP_ATOMIC);
--+		} else if (!ether_addr_equal(da, sa) &&
--+			   sta_info_get(rx->sdata, da)) {
--+			xmit_skb = skb;
--+			skb = NULL;
--+		}
--+
--+		if (xmit_skb) {
--+			/*
--+			 * Send to wireless media and increase priority by 256
--+			 * to keep the received priority instead of
--+			 * reclassifying the frame (see cfg80211_classify8021d).
--+			 */
--+			xmit_skb->priority += 256;
--+			xmit_skb->protocol = htons(ETH_P_802_3);
--+			skb_reset_network_header(xmit_skb);
--+			skb_reset_mac_header(xmit_skb);
--+			dev_queue_xmit(xmit_skb);
--+		}
--+
--+		if (!skb)
--+			return;
--+	}
--+
--+	/* deliver to local stack */
--+	skb->protocol = eth_type_trans(skb, fast_rx->dev);
--+	memset(skb->cb, 0, sizeof(skb->cb));
--+	if (rx->list)
--+#if LINUX_VERSION_IS_GEQ(4,19,0)
--+		list_add_tail(&skb->list, rx->list);
--+#else
--+		__skb_queue_tail(rx->list, skb);
--+#endif
--+	else
--+		netif_receive_skb(skb);
--+
--+}
--+
-- static bool ieee80211_invoke_fast_rx(struct ieee80211_rx_data *rx,
-- 				     struct ieee80211_fast_rx *fast_rx)
-- {
--@@ -4376,9 +4491,6 @@ static bool ieee80211_invoke_fast_rx(str
-- 	} addrs __aligned(2);
-- 	struct ieee80211_sta_rx_stats *stats = &sta->rx_stats;
-- 
---	if (fast_rx->uses_rss)
---		stats = this_cpu_ptr(sta->pcpu_rx_stats);
---
-- 	/* for parallel-rx, we need to have DUP_VALIDATED, otherwise we write
-- 	 * to a common data structure; drivers can implement that per queue
-- 	 * but we don't have that information in mac80211
--@@ -4452,32 +4564,6 @@ static bool ieee80211_invoke_fast_rx(str
-- 	    pskb_trim(skb, skb->len - fast_rx->icv_len))
-- 		goto drop;
-- 
---	/* statistics part of ieee80211_rx_h_sta_process() */
---	if (!(status->flag & RX_FLAG_NO_SIGNAL_VAL)) {
---		stats->last_signal = status->signal;
---		if (!fast_rx->uses_rss)
---			ewma_signal_add(&sta->rx_stats_avg.signal,
---					-status->signal);
---	}
---
---	if (status->chains) {
---		int i;
---
---		stats->chains = status->chains;
---		for (i = 0; i < ARRAY_SIZE(status->chain_signal); i++) {
---			int signal = status->chain_signal[i];
---
---			if (!(status->chains & BIT(i)))
---				continue;
---
---			stats->chain_signal_last[i] = signal;
---			if (!fast_rx->uses_rss)
---				ewma_signal_add(&sta->rx_stats_avg.chain_signal[i],
---						-signal);
---		}
---	}
---	/* end of statistics */
---
-- 	if (rx->key && !ieee80211_has_protected(hdr->frame_control))
-- 		goto drop;
-- 
--@@ -4489,12 +4575,6 @@ static bool ieee80211_invoke_fast_rx(str
-- 		return true;
-- 	}
-- 
---	stats->last_rx = jiffies;
---	stats->last_rate = sta_stats_encode_rate(status);
---
---	stats->fragments++;
---	stats->packets++;
---
-- 	/* do the header conversion - first grab the addresses */
-- 	ether_addr_copy(addrs.da, skb->data + fast_rx->da_offs);
-- 	ether_addr_copy(addrs.sa, skb->data + fast_rx->sa_offs);
--@@ -4503,62 +4583,14 @@ static bool ieee80211_invoke_fast_rx(str
-- 	/* push the addresses in front */
-- 	memcpy(skb_push(skb, sizeof(addrs)), &addrs, sizeof(addrs));
-- 
---	skb->dev = fast_rx->dev;
---
---	ieee80211_rx_stats(fast_rx->dev, skb->len);
---
---	/* The seqno index has the same property as needed
---	 * for the rx_msdu field, i.e. it is IEEE80211_NUM_TIDS
---	 * for non-QoS-data frames. Here we know it's a data
---	 * frame, so count MSDUs.
---	 */
---	u64_stats_update_begin(&stats->syncp);
---	stats->msdu[rx->seqno_idx]++;
---	stats->bytes += orig_len;
---	u64_stats_update_end(&stats->syncp);
---
---	if (fast_rx->internal_forward) {
---		struct sk_buff *xmit_skb = NULL;
---		if (is_multicast_ether_addr(addrs.da)) {
---			xmit_skb = skb_copy(skb, GFP_ATOMIC);
---		} else if (!ether_addr_equal(addrs.da, addrs.sa) &&
---			   sta_info_get(rx->sdata, addrs.da)) {
---			xmit_skb = skb;
---			skb = NULL;
---		}
---
---		if (xmit_skb) {
---			/*
---			 * Send to wireless media and increase priority by 256
---			 * to keep the received priority instead of
---			 * reclassifying the frame (see cfg80211_classify8021d).
---			 */
---			xmit_skb->priority += 256;
---			xmit_skb->protocol = htons(ETH_P_802_3);
---			skb_reset_network_header(xmit_skb);
---			skb_reset_mac_header(xmit_skb);
---			dev_queue_xmit(xmit_skb);
---		}
---
---		if (!skb)
---			return true;
---	}
---
---	/* deliver to local stack */
---	skb->protocol = eth_type_trans(skb, fast_rx->dev);
---	memset(skb->cb, 0, sizeof(skb->cb));
---	if (rx->list)
---#if LINUX_VERSION_IS_GEQ(4,19,0)
---		list_add_tail(&skb->list, rx->list);
---#else
---		__skb_queue_tail(rx->list, skb);
---#endif
---	else
---		netif_receive_skb(skb);
--+	ieee80211_rx_8023(rx, fast_rx, orig_len);
-- 
-- 	return true;
--  drop:
-- 	dev_kfree_skb(skb);
--+	if (fast_rx->uses_rss)
--+		stats = this_cpu_ptr(sta->pcpu_rx_stats);
--+
-- 	stats->dropped++;
-- 	return true;
-- }
--@@ -4612,6 +4644,47 @@ static bool ieee80211_prepare_and_rx_han
-- 	return true;
-- }
-- 
--+static void __ieee80211_rx_handle_8023(struct ieee80211_hw *hw,
--+				       struct ieee80211_sta *pubsta,
--+				       struct sk_buff *skb,
--+#if LINUX_VERSION_IS_GEQ(4,19,0)
--+				       struct list_head *list)
--+#else
--+				       struct sk_buff_head *list)
--+#endif
--+{
--+	struct ieee80211_local *local = hw_to_local(hw);
--+	struct ieee80211_fast_rx *fast_rx;
--+	struct ieee80211_rx_data rx;
--+
--+	memset(&rx, 0, sizeof(rx));
--+	rx.skb = skb;
--+	rx.local = local;
--+	rx.list = list;
--+
--+	I802_DEBUG_INC(local->dot11ReceivedFragmentCount);
--+
--+	/* drop frame if too short for header */
--+	if (skb->len < sizeof(struct ethhdr))
--+		goto drop;
--+
--+	if (!pubsta)
--+		goto drop;
--+
--+	rx.sta = container_of(pubsta, struct sta_info, sta);
--+	rx.sdata = rx.sta->sdata;
--+
--+	fast_rx = rcu_dereference(rx.sta->fast_rx);
--+	if (!fast_rx)
--+		goto drop;
--+
--+	ieee80211_rx_8023(&rx, fast_rx, skb->len);
--+	return;
--+
--+drop:
--+	dev_kfree_skb(skb);
--+}
--+
-- /*
--  * This is the actual Rx frames handler. as it belongs to Rx path it must
--  * be called with rcu_read_lock protection.
--@@ -4849,15 +4922,20 @@ void ieee80211_rx_list(struct ieee80211_
-- 	 * if it was previously present.
-- 	 * Also, frames with less than 16 bytes are dropped.
-- 	 */
---	skb = ieee80211_rx_monitor(local, skb, rate);
---	if (!skb)
---		return;
--+	if (!(status->flag & RX_FLAG_8023)) {
--+		skb = ieee80211_rx_monitor(local, skb, rate);
--+		if (!skb)
--+			return;
--+	}
-- 
-- 	ieee80211_tpt_led_trig_rx(local,
-- 			((struct ieee80211_hdr *)skb->data)->frame_control,
-- 			skb->len);
-- 
---	__ieee80211_rx_handle_packet(hw, pubsta, skb, list);
--+	if (status->flag & RX_FLAG_8023)
--+		__ieee80211_rx_handle_8023(hw, pubsta, skb, list);
--+	else
--+		__ieee80211_rx_handle_packet(hw, pubsta, skb, list);
-- 
-- 	return;
--  drop:
----- a/net/mac80211/sta_info.h
--+++ b/net/mac80211/sta_info.h
--@@ -71,6 +71,7 @@
--  *	until pending frames are delivered
--  * @WLAN_STA_USES_ENCRYPTION: This station was configured for encryption,
--  *	so drop all packets without a key later.
--+ * @WLAN_STA_DECAP_OFFLOAD: This station uses rx decap offload
--  *
--  * @NUM_WLAN_STA_FLAGS: number of defined flags
--  */
--@@ -102,6 +103,7 @@ enum ieee80211_sta_info_flags {
-- 	WLAN_STA_MPSP_RECIPIENT,
-- 	WLAN_STA_PS_DELIVER,
-- 	WLAN_STA_USES_ENCRYPTION,
--+	WLAN_STA_DECAP_OFFLOAD,
-- 
-- 	NUM_WLAN_STA_FLAGS,
-- };
----- a/net/mac80211/trace.h
--+++ b/net/mac80211/trace.h
--@@ -2761,7 +2761,7 @@ DEFINE_EVENT(local_sdata_addr_evt, drv_u
-- 	TP_ARGS(local, sdata)
-- );
-- 
---TRACE_EVENT(drv_sta_set_4addr,
--+DECLARE_EVENT_CLASS(sta_flag_evt,
-- 	TP_PROTO(struct ieee80211_local *local,
-- 		 struct ieee80211_sub_if_data *sdata,
-- 		 struct ieee80211_sta *sta, bool enabled),
--@@ -2788,6 +2788,22 @@ TRACE_EVENT(drv_sta_set_4addr,
-- 	)
-- );
-- 
--+DEFINE_EVENT(sta_flag_evt, drv_sta_set_4addr,
--+	TP_PROTO(struct ieee80211_local *local,
--+		 struct ieee80211_sub_if_data *sdata,
--+		 struct ieee80211_sta *sta, bool enabled),
--+
--+	TP_ARGS(local, sdata, sta, enabled)
--+);
--+
--+DEFINE_EVENT(sta_flag_evt, drv_sta_set_decap_offload,
--+	TP_PROTO(struct ieee80211_local *local,
--+		 struct ieee80211_sub_if_data *sdata,
--+		 struct ieee80211_sta *sta, bool enabled),
--+
--+	TP_ARGS(local, sdata, sta, enabled)
--+);
--+
-- #endif /* !__MAC80211_DRIVER_TRACE || TRACE_HEADER_MULTI_READ */
-- 
-- #undef TRACE_INCLUDE_PATH
-diff --git a/package/kernel/mac80211/patches/subsys/316-mac80211-enable-QoS-support-for-nl80211-ctrl-port.patch b/package/kernel/mac80211/patches/subsys/316-mac80211-enable-QoS-support-for-nl80211-ctrl-port.patch
-deleted file mode 100644
-index 43ac9a0cef..0000000000
---- a/package/kernel/mac80211/patches/subsys/316-mac80211-enable-QoS-support-for-nl80211-ctrl-port.patch
-+++ /dev/null
-@@ -1,116 +0,0 @@
--From: Markus Theil <markus.theil@tu-ilmenau.de>
--Date: Sat, 6 Feb 2021 12:51:12 +0100
--Subject: [PATCH] mac80211: enable QoS support for nl80211 ctrl port
--
--This patch unifies sending control port frames
--over nl80211 and AF_PACKET sockets a little more.
--
--Before this patch, EAPOL frames got QoS prioritization
--only when using AF_PACKET sockets.
--
--__ieee80211_select_queue only selects a QoS-enabled queue
--for control port frames, when the control port protocol
--is set correctly on the skb. For the AF_PACKET path this
--works, but the nl80211 path used ETH_P_802_3.
--
--Another check for injected frames in wme.c then prevented
--the QoS TID to be copied in the frame.
--
--In order to fix this, get rid of the frame injection marking
--for nl80211 ctrl port and set the correct ethernet protocol.
--
--Please note:
--An erlier version of this path tried to prevent
--frame aggregation for control port frames in order to speed up
--the initial connection setup a little. This seemed to cause
--issues on my older Intel dvm-based hardware, and was therefore
--removed again. Future commits which try to reintroduce this
--have to check carefully how hw behaves with aggregated and
--non-aggregated traffic for the same TID.
--My NIC: Intel(R) Centrino(R) Ultimate-N 6300 AGN, REV=0x74
--
--Reported-by: kernel test robot <lkp@intel.com>
--Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
--Link: https://lore.kernel.org/r/20210206115112.567881-1-markus.theil@tu-ilmenau.de
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/net/mac80211/status.c
--+++ b/net/mac80211/status.c
--@@ -628,16 +628,12 @@ static void ieee80211_report_ack_skb(str
-- 		u64 cookie = IEEE80211_SKB_CB(skb)->ack.cookie;
-- 		struct ieee80211_sub_if_data *sdata;
-- 		struct ieee80211_hdr *hdr = (void *)skb->data;
---		__be16 ethertype = 0;
---
---		if (skb->len >= ETH_HLEN && skb->protocol == cpu_to_be16(ETH_P_802_3))
---			skb_copy_bits(skb, 2 * ETH_ALEN, &ethertype, ETH_TLEN);
-- 
-- 		rcu_read_lock();
-- 		sdata = ieee80211_sdata_from_skb(local, skb);
-- 		if (sdata) {
---			if (ethertype == sdata->control_port_protocol ||
---			    ethertype == cpu_to_be16(ETH_P_PREAUTH))
--+			if (skb->protocol == sdata->control_port_protocol ||
--+			    skb->protocol == cpu_to_be16(ETH_P_PREAUTH))
-- 				cfg80211_control_port_tx_status(&sdata->wdev,
-- 								cookie,
-- 								skb->data,
----- a/net/mac80211/tx.c
--+++ b/net/mac80211/tx.c
--@@ -1195,9 +1195,7 @@ ieee80211_tx_prepare(struct ieee80211_su
-- 			tx->sta = rcu_dereference(sdata->u.vlan.sta);
-- 			if (!tx->sta && sdata->wdev.use_4addr)
-- 				return TX_DROP;
---		} else if (info->flags & (IEEE80211_TX_INTFL_NL80211_FRAME_TX |
---					  IEEE80211_TX_CTL_INJECTED) ||
---			   tx->sdata->control_port_protocol == tx->skb->protocol) {
--+		} else if (tx->sdata->control_port_protocol == tx->skb->protocol) {
-- 			tx->sta = sta_info_get_bss(sdata, hdr->addr1);
-- 		}
-- 		if (!tx->sta && !is_multicast_ether_addr(hdr->addr1))
--@@ -5443,6 +5441,7 @@ int ieee80211_tx_control_port(struct wip
-- {
-- 	struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
-- 	struct ieee80211_local *local = sdata->local;
--+	struct sta_info *sta;
-- 	struct sk_buff *skb;
-- 	struct ethhdr *ehdr;
-- 	u32 ctrl_flags = 0;
--@@ -5465,8 +5464,7 @@ int ieee80211_tx_control_port(struct wip
-- 	if (cookie)
-- 		ctrl_flags |= IEEE80211_TX_CTL_REQ_TX_STATUS;
-- 
---	flags |= IEEE80211_TX_INTFL_NL80211_FRAME_TX |
---		 IEEE80211_TX_CTL_INJECTED;
--+	flags |= IEEE80211_TX_INTFL_NL80211_FRAME_TX;
-- 
-- 	skb = dev_alloc_skb(local->hw.extra_tx_headroom +
-- 			    sizeof(struct ethhdr) + len);
--@@ -5483,10 +5481,25 @@ int ieee80211_tx_control_port(struct wip
-- 	ehdr->h_proto = proto;
-- 
-- 	skb->dev = dev;
---	skb->protocol = htons(ETH_P_802_3);
--+	skb->protocol = proto;
-- 	skb_reset_network_header(skb);
-- 	skb_reset_mac_header(skb);
-- 
--+	/* update QoS header to prioritize control port frames if possible,
--+	 * priorization also happens for control port frames send over
--+	 * AF_PACKET
--+	 */
--+	rcu_read_lock();
--+
--+	if (ieee80211_lookup_ra_sta(sdata, skb, &sta) == 0 && !IS_ERR(sta)) {
--+		u16 queue = __ieee80211_select_queue(sdata, sta, skb);
--+
--+		skb_set_queue_mapping(skb, queue);
--+		skb_get_hash(skb);
--+	}
--+
--+	rcu_read_unlock();
--+
-- 	/* mutex lock is only needed for incrementing the cookie counter */
-- 	mutex_lock(&local->mtx);
-- 
-diff --git a/package/kernel/mac80211/patches/subsys/321-mac80211_hwsim-make-6-GHz-channels-usable.patch b/package/kernel/mac80211/patches/subsys/321-mac80211_hwsim-make-6-GHz-channels-usable.patch
-new file mode 100644
-index 0000000000..9c7417e5fc
---- /dev/null
-+++ b/package/kernel/mac80211/patches/subsys/321-mac80211_hwsim-make-6-GHz-channels-usable.patch
-@@ -0,0 +1,74 @@
-+From: Felix Fietkau <nbd@nbd.name>
-+Date: Mon, 24 May 2021 11:46:09 +0200
-+Subject: [PATCH] mac80211_hwsim: make 6 GHz channels usable
-+
-+The previous commit that claimed to add 6 GHz channels didn't actually make
-+them usable, since the 6 GHz band was not registered with mac80211.
-+
-+Fixes: 28881922abd7 ("mac80211_hwsim: add 6GHz channels")
-+Signed-off-by: Felix Fietkau <nbd@nbd.name>
-+---
-+
-+--- a/drivers/net/wireless/mac80211_hwsim.c
-++++ b/drivers/net/wireless/mac80211_hwsim.c
-+@@ -2992,15 +2992,19 @@ static void mac80211_hwsim_he_capab(stru
-+ {
-+ 	u16 n_iftype_data;
-+ 
-+-	if (sband->band == NL80211_BAND_2GHZ) {
-++	switch (sband->band) {
-++	case NL80211_BAND_2GHZ:
-+ 		n_iftype_data = ARRAY_SIZE(he_capa_2ghz);
-+ 		sband->iftype_data =
-+ 			(struct ieee80211_sband_iftype_data *)he_capa_2ghz;
-+-	} else if (sband->band == NL80211_BAND_5GHZ) {
-++		break;
-++	case NL80211_BAND_5GHZ:
-++	case NL80211_BAND_6GHZ:
-+ 		n_iftype_data = ARRAY_SIZE(he_capa_5ghz);
-+ 		sband->iftype_data =
-+ 			(struct ieee80211_sband_iftype_data *)he_capa_5ghz;
-+-	} else {
-++		break;
-++	default:
-+ 		return;
-+ 	}
-+ 
-+@@ -3290,6 +3294,12 @@ static int mac80211_hwsim_new_radio(stru
-+ 			sband->vht_cap.vht_mcs.tx_mcs_map =
-+ 				sband->vht_cap.vht_mcs.rx_mcs_map;
-+ 			break;
-++		case NL80211_BAND_6GHZ:
-++			sband->channels = data->channels_6ghz;
-++			sband->n_channels = ARRAY_SIZE(hwsim_channels_6ghz);
-++			sband->bitrates = data->rates + 4;
-++			sband->n_bitrates = ARRAY_SIZE(hwsim_rates) - 4;
-++			break;
-+ 		case NL80211_BAND_S1GHZ:
-+ 			memcpy(&sband->s1g_cap, &hwsim_s1g_cap,
-+ 			       sizeof(sband->s1g_cap));
-+@@ -3300,6 +3310,13 @@ static int mac80211_hwsim_new_radio(stru
-+ 			continue;
-+ 		}
-+ 
-++		mac80211_hwsim_he_capab(sband);
-++
-++		hw->wiphy->bands[band] = sband;
-++
-++		if (band == NL80211_BAND_6GHZ)
-++			continue;
-++
-+ 		sband->ht_cap.ht_supported = true;
-+ 		sband->ht_cap.cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
-+ 				    IEEE80211_HT_CAP_GRN_FLD |
-+@@ -3313,10 +3330,6 @@ static int mac80211_hwsim_new_radio(stru
-+ 		sband->ht_cap.mcs.rx_mask[0] = 0xff;
-+ 		sband->ht_cap.mcs.rx_mask[1] = 0xff;
-+ 		sband->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
-+-
-+-		mac80211_hwsim_he_capab(sband);
-+-
-+-		hw->wiphy->bands[band] = sband;
-+ 	}
-+ 
-+ 	/* By default all radios belong to the first group */
-diff --git a/package/kernel/mac80211/patches/subsys/337-mac80211-minstrel_ht-clean-up-CCK-code.patch b/package/kernel/mac80211/patches/subsys/337-mac80211-minstrel_ht-clean-up-CCK-code.patch
-deleted file mode 100644
-index f667d2c94e..0000000000
---- a/package/kernel/mac80211/patches/subsys/337-mac80211-minstrel_ht-clean-up-CCK-code.patch
-+++ /dev/null
-@@ -1,166 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Fri, 25 Dec 2020 16:22:52 +0100
--Subject: [PATCH] mac80211: minstrel_ht: clean up CCK code
--
--- move ack overhead out of rate duration table
--- remove cck_supported, cck_supported_short
--
--Preparation for adding OFDM legacy rates support
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/rc80211_minstrel_ht.c
--+++ b/net/mac80211/rc80211_minstrel_ht.c
--@@ -136,20 +136,16 @@
-- 	__VHT_GROUP(_streams, _sgi, _bw,				\
-- 		    VHT_GROUP_SHIFT(_streams, _sgi, _bw))
-- 
---#define CCK_DURATION(_bitrate, _short, _len)		\
--+#define CCK_DURATION(_bitrate, _short)			\
-- 	(1000 * (10 /* SIFS */ +			\
-- 	 (_short ? 72 + 24 : 144 + 48) +		\
---	 (8 * (_len + 4) * 10) / (_bitrate)))
---
---#define CCK_ACK_DURATION(_bitrate, _short)			\
---	(CCK_DURATION((_bitrate > 10 ? 20 : 10), false, 60) +	\
---	 CCK_DURATION(_bitrate, _short, AVG_PKT_SIZE))
--+	 (8 * (AVG_PKT_SIZE + 4) * 10) / (_bitrate)))
-- 
-- #define CCK_DURATION_LIST(_short, _s)			\
---	CCK_ACK_DURATION(10, _short) >> _s,		\
---	CCK_ACK_DURATION(20, _short) >> _s,		\
---	CCK_ACK_DURATION(55, _short) >> _s,		\
---	CCK_ACK_DURATION(110, _short) >> _s
--+	CCK_DURATION(10, _short) >> _s,			\
--+	CCK_DURATION(20, _short) >> _s,			\
--+	CCK_DURATION(55, _short) >> _s,			\
--+	CCK_DURATION(110, _short) >> _s
-- 
-- #define __CCK_GROUP(_s)					\
-- 	[MINSTREL_CCK_GROUP] = {			\
--@@ -163,7 +159,7 @@
-- 	}
-- 
-- #define CCK_GROUP_SHIFT					\
---	GROUP_SHIFT(CCK_ACK_DURATION(10, false))
--+	GROUP_SHIFT(CCK_DURATION(10, false))
-- 
-- #define CCK_GROUP __CCK_GROUP(CCK_GROUP_SHIFT)
-- 
--@@ -349,15 +345,19 @@ int
-- minstrel_ht_get_tp_avg(struct minstrel_ht_sta *mi, int group, int rate,
-- 		       int prob_avg)
-- {
---	unsigned int nsecs = 0;
--+	unsigned int nsecs = 0, overhead = mi->overhead;
--+	unsigned int ampdu_len = 1;
-- 
-- 	/* do not account throughput if sucess prob is below 10% */
-- 	if (prob_avg < MINSTREL_FRAC(10, 100))
-- 		return 0;
-- 
---	if (group != MINSTREL_CCK_GROUP)
---		nsecs = 1000 * mi->overhead / minstrel_ht_avg_ampdu_len(mi);
--+	if (group == MINSTREL_CCK_GROUP)
--+		overhead = mi->overhead_legacy;
--+	else
--+		ampdu_len = minstrel_ht_avg_ampdu_len(mi);
-- 
--+	nsecs = 1000 * overhead / ampdu_len;
-- 	nsecs += minstrel_mcs_groups[group].duration[rate] <<
-- 		 minstrel_mcs_groups[group].shift;
-- 
--@@ -1031,7 +1031,10 @@ minstrel_calc_retransmit(struct minstrel
-- 	ctime += (t_slot * cw) >> 1;
-- 	cw = min((cw << 1) | 1, mp->cw_max);
-- 
---	if (index / MCS_GROUP_RATES != MINSTREL_CCK_GROUP) {
--+	if (index / MCS_GROUP_RATES == MINSTREL_CCK_GROUP) {
--+		overhead = mi->overhead_legacy;
--+		overhead_rtscts = mi->overhead_legacy_rtscts;
--+	} else {
-- 		overhead = mi->overhead;
-- 		overhead_rtscts = mi->overhead_rtscts;
-- 	}
--@@ -1369,18 +1372,14 @@ minstrel_ht_update_cck(struct minstrel_p
-- 	if (!ieee80211_hw_check(mp->hw, SUPPORTS_HT_CCK_RATES))
-- 		return;
-- 
---	mi->cck_supported = 0;
---	mi->cck_supported_short = 0;
-- 	for (i = 0; i < 4; i++) {
-- 		if (!rate_supported(sta, sband->band, mp->cck_rates[i]))
-- 			continue;
-- 
---		mi->cck_supported |= BIT(i);
--+		mi->supported[MINSTREL_CCK_GROUP] |= BIT(i);
-- 		if (sband->bitrates[i].flags & IEEE80211_RATE_SHORT_PREAMBLE)
---			mi->cck_supported_short |= BIT(i);
--+			mi->supported[MINSTREL_CCK_GROUP] |= BIT(i + 4);
-- 	}
---
---	mi->supported[MINSTREL_CCK_GROUP] = mi->cck_supported;
-- }
-- 
-- static void
--@@ -1394,12 +1393,13 @@ minstrel_ht_update_caps(void *priv, stru
-- 	struct ieee80211_mcs_info *mcs = &sta->ht_cap.mcs;
-- 	u16 ht_cap = sta->ht_cap.cap;
-- 	struct ieee80211_sta_vht_cap *vht_cap = &sta->vht_cap;
--+	const struct ieee80211_rate *ctl_rate;
--+	bool ldpc, erp;
-- 	int use_vht;
-- 	int n_supported = 0;
-- 	int ack_dur;
-- 	int stbc;
-- 	int i;
---	bool ldpc;
-- 
-- 	/* fall back to the old minstrel for legacy stations */
-- 	if (!sta->ht_cap.ht_supported)
--@@ -1423,6 +1423,14 @@ minstrel_ht_update_caps(void *priv, stru
-- 	mi->overhead += ack_dur;
-- 	mi->overhead_rtscts = mi->overhead + 2 * ack_dur;
-- 
--+	ctl_rate = &sband->bitrates[rate_lowest_index(sband, sta)];
--+	erp = ctl_rate->flags & IEEE80211_RATE_ERP_G;
--+	ack_dur = ieee80211_frame_duration(sband->band, 10,
--+					   ctl_rate->bitrate, erp, 1,
--+					   ieee80211_chandef_get_shift(chandef));
--+	mi->overhead_legacy = ack_dur;
--+	mi->overhead_legacy_rtscts = mi->overhead_legacy + 2 * ack_dur;
--+
-- 	mi->avg_ampdu_len = MINSTREL_FRAC(1, 1);
-- 
-- 	/* When using MRR, sample more on the first attempt, without delay */
--@@ -1523,8 +1531,6 @@ minstrel_ht_update_caps(void *priv, stru
-- 	if (!n_supported)
-- 		goto use_legacy;
-- 
---	mi->supported[MINSTREL_CCK_GROUP] |= mi->cck_supported_short << 4;
---
-- 	/* create an initial rate table with the lowest supported rates */
-- 	minstrel_ht_update_stats(mp, mi, true);
-- 	minstrel_ht_update_rates(mp, mi);
----- a/net/mac80211/rc80211_minstrel_ht.h
--+++ b/net/mac80211/rc80211_minstrel_ht.h
--@@ -77,6 +77,8 @@ struct minstrel_ht_sta {
-- 	/* overhead time in usec for each frame */
-- 	unsigned int overhead;
-- 	unsigned int overhead_rtscts;
--+	unsigned int overhead_legacy;
--+	unsigned int overhead_legacy_rtscts;
-- 
-- 	unsigned int total_packets_last;
-- 	unsigned int total_packets_cur;
--@@ -97,9 +99,6 @@ struct minstrel_ht_sta {
-- 	/* current MCS group to be sampled */
-- 	u8 sample_group;
-- 
---	u8 cck_supported;
---	u8 cck_supported_short;
---
-- 	/* Bitfield of supported MCS rates of all groups */
-- 	u16 supported[MINSTREL_GROUPS_NB];
-- 
-diff --git a/package/kernel/mac80211/patches/subsys/338-mac80211-minstrel_ht-add-support-for-OFDM-rates-on-n.patch b/package/kernel/mac80211/patches/subsys/338-mac80211-minstrel_ht-add-support-for-OFDM-rates-on-n.patch
-deleted file mode 100644
-index abefde7109..0000000000
---- a/package/kernel/mac80211/patches/subsys/338-mac80211-minstrel_ht-add-support-for-OFDM-rates-on-n.patch
-+++ /dev/null
-@@ -1,762 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Sat, 26 Dec 2020 13:56:42 +0100
--Subject: [PATCH] mac80211: minstrel_ht: add support for OFDM rates on
-- non-HT clients
--
--The legacy minstrel code is essentially unmaintained and receives only very
--little testing. In order to bring the significant algorithm improvements from
--minstrel_ht to legacy clients, this patch adds support for OFDM rates to
--minstrel_ht and removes the fallback to the legacy codepath.
--This also makes it work much better on hardware with rate selection constraints,
--e.g. mt76.
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/rc80211_minstrel.h
--+++ b/net/mac80211/rc80211_minstrel.h
--@@ -152,6 +152,7 @@ struct minstrel_priv {
-- 	unsigned int lookaround_rate_mrr;
-- 
-- 	u8 cck_rates[4];
--+	u8 ofdm_rates[NUM_NL80211_BANDS][8];
-- 
-- #ifdef CPTCFG_MAC80211_DEBUGFS
-- 	/*
----- a/net/mac80211/rc80211_minstrel_ht.c
--+++ b/net/mac80211/rc80211_minstrel_ht.c
--@@ -163,6 +163,38 @@
-- 
-- #define CCK_GROUP __CCK_GROUP(CCK_GROUP_SHIFT)
-- 
--+#define OFDM_DURATION(_bitrate)				\
--+	(1000 * (16 /* SIFS + signal ext */ +		\
--+	 16 /* T_PREAMBLE */ +				\
--+	 4 /* T_SIGNAL */ +				\
--+	 4 * (((16 + 80 * (AVG_PKT_SIZE + 4) + 6) /	\
--+	      ((_bitrate) * 4)))))
--+
--+#define OFDM_DURATION_LIST(_s)				\
--+	OFDM_DURATION(60) >> _s,			\
--+	OFDM_DURATION(90) >> _s,			\
--+	OFDM_DURATION(120) >> _s,			\
--+	OFDM_DURATION(180) >> _s,			\
--+	OFDM_DURATION(240) >> _s,			\
--+	OFDM_DURATION(360) >> _s,			\
--+	OFDM_DURATION(480) >> _s,			\
--+	OFDM_DURATION(540) >> _s
--+
--+#define __OFDM_GROUP(_s)				\
--+	[MINSTREL_OFDM_GROUP] = {			\
--+		.streams = 1,				\
--+		.flags = 0,				\
--+		.shift = _s,				\
--+		.duration = {				\
--+			OFDM_DURATION_LIST(_s),		\
--+		}					\
--+	}
--+
--+#define OFDM_GROUP_SHIFT				\
--+	GROUP_SHIFT(OFDM_DURATION(60))
--+
--+#define OFDM_GROUP __OFDM_GROUP(OFDM_GROUP_SHIFT)
--+
-- 
-- static bool minstrel_vht_only = true;
-- module_param(minstrel_vht_only, bool, 0644);
--@@ -199,6 +231,7 @@ const struct mcs_group minstrel_mcs_grou
-- 	MCS_GROUP(4, 1, BW_40),
-- 
-- 	CCK_GROUP,
--+	OFDM_GROUP,
-- 
-- 	VHT_GROUP(1, 0, BW_20),
-- 	VHT_GROUP(2, 0, BW_20),
--@@ -231,6 +264,8 @@ const struct mcs_group minstrel_mcs_grou
-- 	VHT_GROUP(4, 1, BW_80),
-- };
-- 
--+const s16 minstrel_cck_bitrates[4] = { 10, 20, 55, 110 };
--+const s16 minstrel_ofdm_bitrates[8] = { 60, 90, 120, 180, 240, 360, 480, 540 };
-- static u8 sample_table[SAMPLE_COLUMNS][MCS_GROUP_RATES] __read_mostly;
-- 
-- static void
--@@ -275,6 +310,13 @@ minstrel_get_valid_vht_rates(int bw, int
-- 	return 0x3ff & ~mask;
-- }
-- 
--+static bool
--+minstrel_ht_is_legacy_group(int group)
--+{
--+	return group == MINSTREL_CCK_GROUP ||
--+	       group == MINSTREL_OFDM_GROUP;
--+}
--+
-- /*
--  * Look up an MCS group index based on mac80211 rate information
--  */
--@@ -304,21 +346,34 @@ minstrel_ht_get_stats(struct minstrel_pr
-- 	if (rate->flags & IEEE80211_TX_RC_MCS) {
-- 		group = minstrel_ht_get_group_idx(rate);
-- 		idx = rate->idx % 8;
---	} else if (rate->flags & IEEE80211_TX_RC_VHT_MCS) {
--+		goto out;
--+	}
--+
--+	if (rate->flags & IEEE80211_TX_RC_VHT_MCS) {
-- 		group = minstrel_vht_get_group_idx(rate);
-- 		idx = ieee80211_rate_get_vht_mcs(rate);
---	} else {
---		group = MINSTREL_CCK_GROUP;
--+		goto out;
--+	}
-- 
---		for (idx = 0; idx < ARRAY_SIZE(mp->cck_rates); idx++)
---			if (rate->idx == mp->cck_rates[idx])
---				break;
--+	group = MINSTREL_CCK_GROUP;
--+	for (idx = 0; idx < ARRAY_SIZE(mp->cck_rates); idx++) {
--+		if (rate->idx != mp->cck_rates[idx])
--+			continue;
-- 
-- 		/* short preamble */
-- 		if ((mi->supported[group] & BIT(idx + 4)) &&
-- 		    (rate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
---			idx += 4;
--+				idx += 4;
--+		goto out;
-- 	}
--+
--+	group = MINSTREL_OFDM_GROUP;
--+	for (idx = 0; idx < ARRAY_SIZE(mp->ofdm_rates[0]); idx++)
--+		if (rate->idx == mp->ofdm_rates[mi->band][idx])
--+			goto out;
--+
--+	idx = 0;
--+out:
-- 	return &mi->groups[group].rates[idx];
-- }
-- 
--@@ -352,7 +407,7 @@ minstrel_ht_get_tp_avg(struct minstrel_h
-- 	if (prob_avg < MINSTREL_FRAC(10, 100))
-- 		return 0;
-- 
---	if (group == MINSTREL_CCK_GROUP)
--+	if (minstrel_ht_is_legacy_group(group))
-- 		overhead = mi->overhead_legacy;
-- 	else
-- 		ampdu_len = minstrel_ht_avg_ampdu_len(mi);
--@@ -439,8 +494,8 @@ minstrel_ht_set_best_prob_rate(struct mi
-- 	/* if max_tp_rate[0] is from MCS_GROUP max_prob_rate get selected from
-- 	 * MCS_GROUP as well as CCK_GROUP rates do not allow aggregation */
-- 	max_tp_group = mi->max_tp_rate[0] / MCS_GROUP_RATES;
---	if((index / MCS_GROUP_RATES == MINSTREL_CCK_GROUP) &&
---	    (max_tp_group != MINSTREL_CCK_GROUP))
--+	if (minstrel_ht_is_legacy_group(index / MCS_GROUP_RATES) &&
--+	    !minstrel_ht_is_legacy_group(max_tp_group))
-- 		return;
-- 
-- 	max_gpr_group = mg->max_group_prob_rate / MCS_GROUP_RATES;
--@@ -476,13 +531,13 @@ minstrel_ht_set_best_prob_rate(struct mi
-- static void
-- minstrel_ht_assign_best_tp_rates(struct minstrel_ht_sta *mi,
-- 				 u16 tmp_mcs_tp_rate[MAX_THR_RATES],
---				 u16 tmp_cck_tp_rate[MAX_THR_RATES])
--+				 u16 tmp_legacy_tp_rate[MAX_THR_RATES])
-- {
-- 	unsigned int tmp_group, tmp_idx, tmp_cck_tp, tmp_mcs_tp, tmp_prob;
-- 	int i;
-- 
---	tmp_group = tmp_cck_tp_rate[0] / MCS_GROUP_RATES;
---	tmp_idx = tmp_cck_tp_rate[0] % MCS_GROUP_RATES;
--+	tmp_group = tmp_legacy_tp_rate[0] / MCS_GROUP_RATES;
--+	tmp_idx = tmp_legacy_tp_rate[0] % MCS_GROUP_RATES;
-- 	tmp_prob = mi->groups[tmp_group].rates[tmp_idx].prob_avg;
-- 	tmp_cck_tp = minstrel_ht_get_tp_avg(mi, tmp_group, tmp_idx, tmp_prob);
-- 
--@@ -493,7 +548,7 @@ minstrel_ht_assign_best_tp_rates(struct
-- 
-- 	if (tmp_cck_tp > tmp_mcs_tp) {
-- 		for(i = 0; i < MAX_THR_RATES; i++) {
---			minstrel_ht_sort_best_tp_rates(mi, tmp_cck_tp_rate[i],
--+			minstrel_ht_sort_best_tp_rates(mi, tmp_legacy_tp_rate[i],
-- 						       tmp_mcs_tp_rate);
-- 		}
-- 	}
--@@ -511,6 +566,9 @@ minstrel_ht_prob_rate_reduce_streams(str
-- 	int tmp_max_streams, group, tmp_idx, tmp_prob;
-- 	int tmp_tp = 0;
-- 
--+	if (!mi->sta->ht_cap.ht_supported)
--+		return;
--+
-- 	tmp_max_streams = minstrel_mcs_groups[mi->max_tp_rate[0] /
-- 			  MCS_GROUP_RATES].streams;
-- 	for (group = 0; group < ARRAY_SIZE(minstrel_mcs_groups); group++) {
--@@ -675,7 +733,8 @@ minstrel_ht_update_stats(struct minstrel
-- 	struct minstrel_rate_stats *mrs;
-- 	int group, i, j, cur_prob;
-- 	u16 tmp_mcs_tp_rate[MAX_THR_RATES], tmp_group_tp_rate[MAX_THR_RATES];
---	u16 tmp_cck_tp_rate[MAX_THR_RATES], index;
--+	u16 tmp_legacy_tp_rate[MAX_THR_RATES], index;
--+	bool ht_supported = mi->sta->ht_cap.ht_supported;
-- 
-- 	mi->sample_mode = MINSTREL_SAMPLE_IDLE;
-- 
--@@ -704,21 +763,29 @@ minstrel_ht_update_stats(struct minstrel
-- 	mi->sample_count = 0;
-- 
-- 	memset(tmp_mcs_tp_rate, 0, sizeof(tmp_mcs_tp_rate));
---	memset(tmp_cck_tp_rate, 0, sizeof(tmp_cck_tp_rate));
--+	memset(tmp_legacy_tp_rate, 0, sizeof(tmp_legacy_tp_rate));
-- 	if (mi->supported[MINSTREL_CCK_GROUP])
---		for (j = 0; j < ARRAY_SIZE(tmp_cck_tp_rate); j++)
---			tmp_cck_tp_rate[j] = MINSTREL_CCK_GROUP * MCS_GROUP_RATES;
--+		for (j = 0; j < ARRAY_SIZE(tmp_legacy_tp_rate); j++)
--+			tmp_legacy_tp_rate[j] = MINSTREL_CCK_GROUP * MCS_GROUP_RATES;
--+	else if (mi->supported[MINSTREL_OFDM_GROUP])
--+		for (j = 0; j < ARRAY_SIZE(tmp_legacy_tp_rate); j++)
--+			tmp_legacy_tp_rate[j] = MINSTREL_OFDM_GROUP * MCS_GROUP_RATES;
-- 
-- 	if (mi->supported[MINSTREL_VHT_GROUP_0])
-- 		index = MINSTREL_VHT_GROUP_0 * MCS_GROUP_RATES;
---	else
--+	else if (ht_supported)
-- 		index = MINSTREL_HT_GROUP_0 * MCS_GROUP_RATES;
--+	else if (mi->supported[MINSTREL_CCK_GROUP])
--+		index = MINSTREL_CCK_GROUP * MCS_GROUP_RATES;
--+	else
--+		index = MINSTREL_OFDM_GROUP * MCS_GROUP_RATES;
-- 
-- 	for (j = 0; j < ARRAY_SIZE(tmp_mcs_tp_rate); j++)
-- 		tmp_mcs_tp_rate[j] = index;
-- 
-- 	/* Find best rate sets within all MCS groups*/
-- 	for (group = 0; group < ARRAY_SIZE(minstrel_mcs_groups); group++) {
--+		u16 *tp_rate = tmp_mcs_tp_rate;
-- 
-- 		mg = &mi->groups[group];
-- 		if (!mi->supported[group])
--@@ -730,6 +797,9 @@ minstrel_ht_update_stats(struct minstrel
-- 		for(j = 0; j < MAX_THR_RATES; j++)
-- 			tmp_group_tp_rate[j] = MCS_GROUP_RATES * group;
-- 
--+		if (group == MINSTREL_CCK_GROUP && ht_supported)
--+			tp_rate = tmp_legacy_tp_rate;
--+
-- 		for (i = 0; i < MCS_GROUP_RATES; i++) {
-- 			if (!(mi->supported[group] & BIT(i)))
-- 				continue;
--@@ -745,13 +815,7 @@ minstrel_ht_update_stats(struct minstrel
-- 				continue;
-- 
-- 			/* Find max throughput rate set */
---			if (group != MINSTREL_CCK_GROUP) {
---				minstrel_ht_sort_best_tp_rates(mi, index,
---							       tmp_mcs_tp_rate);
---			} else if (group == MINSTREL_CCK_GROUP) {
---				minstrel_ht_sort_best_tp_rates(mi, index,
---							       tmp_cck_tp_rate);
---			}
--+			minstrel_ht_sort_best_tp_rates(mi, index, tp_rate);
-- 
-- 			/* Find max throughput rate set within a group */
-- 			minstrel_ht_sort_best_tp_rates(mi, index,
--@@ -766,7 +830,8 @@ minstrel_ht_update_stats(struct minstrel
-- 	}
-- 
-- 	/* Assign new rate set per sta */
---	minstrel_ht_assign_best_tp_rates(mi, tmp_mcs_tp_rate, tmp_cck_tp_rate);
--+	minstrel_ht_assign_best_tp_rates(mi, tmp_mcs_tp_rate,
--+					 tmp_legacy_tp_rate);
-- 	memcpy(mi->max_tp_rate, tmp_mcs_tp_rate, sizeof(mi->max_tp_rate));
-- 
-- 	/* Try to increase robustness of max_prob_rate*/
--@@ -795,8 +860,11 @@ minstrel_ht_update_stats(struct minstrel
-- }
-- 
-- static bool
---minstrel_ht_txstat_valid(struct minstrel_priv *mp, struct ieee80211_tx_rate *rate)
--+minstrel_ht_txstat_valid(struct minstrel_priv *mp, struct minstrel_ht_sta *mi,
--+			 struct ieee80211_tx_rate *rate)
-- {
--+	int i;
--+
-- 	if (rate->idx < 0)
-- 		return false;
-- 
--@@ -807,10 +875,15 @@ minstrel_ht_txstat_valid(struct minstrel
-- 	    rate->flags & IEEE80211_TX_RC_VHT_MCS)
-- 		return true;
-- 
---	return rate->idx == mp->cck_rates[0] ||
---	       rate->idx == mp->cck_rates[1] ||
---	       rate->idx == mp->cck_rates[2] ||
---	       rate->idx == mp->cck_rates[3];
--+	for (i = 0; i < ARRAY_SIZE(mp->cck_rates); i++)
--+		if (rate->idx == mp->cck_rates[i])
--+			return true;
--+
--+	for (i = 0; i < ARRAY_SIZE(mp->ofdm_rates[0]); i++)
--+		if (rate->idx == mp->ofdm_rates[mi->band][i])
--+			return true;
--+
--+	return false;
-- }
-- 
-- static void
--@@ -897,11 +970,6 @@ minstrel_ht_tx_status(void *priv, struct
-- 	bool sample_status = false;
-- 	int i;
-- 
---	if (!msp->is_ht)
---		return mac80211_minstrel.tx_status_ext(priv, sband,
---						       &msp->legacy, st);
---
---
-- 	/* This packet was aggregated but doesn't carry status info */
-- 	if ((info->flags & IEEE80211_TX_CTL_AMPDU) &&
-- 	    !(info->flags & IEEE80211_TX_STAT_AMPDU))
--@@ -930,10 +998,10 @@ minstrel_ht_tx_status(void *priv, struct
-- 	if (mi->sample_mode != MINSTREL_SAMPLE_IDLE)
-- 		rate_sample = minstrel_get_ratestats(mi, mi->sample_rate);
-- 
---	last = !minstrel_ht_txstat_valid(mp, &ar[0]);
--+	last = !minstrel_ht_txstat_valid(mp, mi, &ar[0]);
-- 	for (i = 0; !last; i++) {
-- 		last = (i == IEEE80211_TX_MAX_RATES - 1) ||
---		       !minstrel_ht_txstat_valid(mp, &ar[i + 1]);
--+		       !minstrel_ht_txstat_valid(mp, mi, &ar[i + 1]);
-- 
-- 		rate = minstrel_ht_get_stats(mp, mi, &ar[i]);
-- 		if (rate == rate_sample)
--@@ -1031,7 +1099,7 @@ minstrel_calc_retransmit(struct minstrel
-- 	ctime += (t_slot * cw) >> 1;
-- 	cw = min((cw << 1) | 1, mp->cw_max);
-- 
---	if (index / MCS_GROUP_RATES == MINSTREL_CCK_GROUP) {
--+	if (minstrel_ht_is_legacy_group(index / MCS_GROUP_RATES)) {
-- 		overhead = mi->overhead_legacy;
-- 		overhead_rtscts = mi->overhead_legacy_rtscts;
-- 	} else {
--@@ -1064,7 +1132,8 @@ static void
-- minstrel_ht_set_rate(struct minstrel_priv *mp, struct minstrel_ht_sta *mi,
--                      struct ieee80211_sta_rates *ratetbl, int offset, int index)
-- {
---	const struct mcs_group *group = &minstrel_mcs_groups[index / MCS_GROUP_RATES];
--+	int group_idx = index / MCS_GROUP_RATES;
--+	const struct mcs_group *group = &minstrel_mcs_groups[group_idx];
-- 	struct minstrel_rate_stats *mrs;
-- 	u8 idx;
-- 	u16 flags = group->flags;
--@@ -1083,13 +1152,17 @@ minstrel_ht_set_rate(struct minstrel_pri
-- 		ratetbl->rate[offset].count_rts = mrs->retry_count_rtscts;
-- 	}
-- 
---	if (index / MCS_GROUP_RATES == MINSTREL_CCK_GROUP)
--+	index %= MCS_GROUP_RATES;
--+	if (group_idx == MINSTREL_CCK_GROUP)
-- 		idx = mp->cck_rates[index % ARRAY_SIZE(mp->cck_rates)];
--+	else if (group_idx == MINSTREL_OFDM_GROUP)
--+		idx = mp->ofdm_rates[mi->band][index %
--+					       ARRAY_SIZE(mp->ofdm_rates[0])];
-- 	else if (flags & IEEE80211_TX_RC_VHT_MCS)
-- 		idx = ((group->streams - 1) << 4) |
---		      ((index % MCS_GROUP_RATES) & 0xF);
--+		      (index & 0xF);
-- 	else
---		idx = index % MCS_GROUP_RATES + (group->streams - 1) * 8;
--+		idx = index + (group->streams - 1) * 8;
-- 
-- 	/* enable RTS/CTS if needed:
-- 	 *  - if station is in dynamic SMPS (and streams > 1)
--@@ -1304,11 +1377,8 @@ minstrel_ht_get_rate(void *priv, struct
-- 	struct minstrel_priv *mp = priv;
-- 	int sample_idx;
-- 
---	if (!msp->is_ht)
---		return mac80211_minstrel.get_rate(priv, sta, &msp->legacy, txrc);
---
-- 	if (!(info->flags & IEEE80211_TX_CTL_AMPDU) &&
---	    mi->max_prob_rate / MCS_GROUP_RATES != MINSTREL_CCK_GROUP)
--+	    !minstrel_ht_is_legacy_group(mi->max_prob_rate / MCS_GROUP_RATES))
-- 		minstrel_aggr_check(sta, txrc->skb);
-- 
-- 	info->flags |= mi->tx_flags;
--@@ -1349,6 +1419,9 @@ minstrel_ht_get_rate(void *priv, struct
-- 	if (sample_group == &minstrel_mcs_groups[MINSTREL_CCK_GROUP]) {
-- 		int idx = sample_idx % ARRAY_SIZE(mp->cck_rates);
-- 		rate->idx = mp->cck_rates[idx];
--+	} else if (sample_group == &minstrel_mcs_groups[MINSTREL_OFDM_GROUP]) {
--+		int idx = sample_idx % ARRAY_SIZE(mp->ofdm_rates[0]);
--+		rate->idx = mp->ofdm_rates[mi->band][idx];
-- 	} else if (sample_group->flags & IEEE80211_TX_RC_VHT_MCS) {
-- 		ieee80211_rate_set_vht(rate, sample_idx % MCS_GROUP_RATES,
-- 				       sample_group->streams);
--@@ -1369,11 +1442,13 @@ minstrel_ht_update_cck(struct minstrel_p
-- 	if (sband->band != NL80211_BAND_2GHZ)
-- 		return;
-- 
---	if (!ieee80211_hw_check(mp->hw, SUPPORTS_HT_CCK_RATES))
--+	if (sta->ht_cap.ht_supported &&
--+	    !ieee80211_hw_check(mp->hw, SUPPORTS_HT_CCK_RATES))
-- 		return;
-- 
-- 	for (i = 0; i < 4; i++) {
---		if (!rate_supported(sta, sband->band, mp->cck_rates[i]))
--+		if (mp->cck_rates[i] == 0xff ||
--+		    !rate_supported(sta, sband->band, mp->cck_rates[i]))
-- 			continue;
-- 
-- 		mi->supported[MINSTREL_CCK_GROUP] |= BIT(i);
--@@ -1383,9 +1458,30 @@ minstrel_ht_update_cck(struct minstrel_p
-- }
-- 
-- static void
--+minstrel_ht_update_ofdm(struct minstrel_priv *mp, struct minstrel_ht_sta *mi,
--+			struct ieee80211_supported_band *sband,
--+			struct ieee80211_sta *sta)
--+{
--+	const u8 *rates;
--+	int i;
--+
--+	if (sta->ht_cap.ht_supported)
--+		return;
--+
--+	rates = mp->ofdm_rates[sband->band];
--+	for (i = 0; i < ARRAY_SIZE(mp->ofdm_rates[0]); i++) {
--+		if (rates[i] == 0xff ||
--+		    !rate_supported(sta, sband->band, rates[i]))
--+			continue;
--+
--+		mi->supported[MINSTREL_OFDM_GROUP] |= BIT(i);
--+	}
--+}
--+
--+static void
-- minstrel_ht_update_caps(void *priv, struct ieee80211_supported_band *sband,
-- 			struct cfg80211_chan_def *chandef,
---                        struct ieee80211_sta *sta, void *priv_sta)
--+			struct ieee80211_sta *sta, void *priv_sta)
-- {
-- 	struct minstrel_priv *mp = priv;
-- 	struct minstrel_ht_sta_priv *msp = priv_sta;
--@@ -1401,10 +1497,6 @@ minstrel_ht_update_caps(void *priv, stru
-- 	int stbc;
-- 	int i;
-- 
---	/* fall back to the old minstrel for legacy stations */
---	if (!sta->ht_cap.ht_supported)
---		goto use_legacy;
---
-- 	BUILD_BUG_ON(ARRAY_SIZE(minstrel_mcs_groups) != MINSTREL_GROUPS_NB);
-- 
-- 	if (vht_cap->vht_supported)
--@@ -1412,10 +1504,10 @@ minstrel_ht_update_caps(void *priv, stru
-- 	else
-- 		use_vht = 0;
-- 
---	msp->is_ht = true;
-- 	memset(mi, 0, sizeof(*mi));
-- 
-- 	mi->sta = sta;
--+	mi->band = sband->band;
-- 	mi->last_stats_update = jiffies;
-- 
-- 	ack_dur = ieee80211_frame_duration(sband->band, 10, 60, 1, 1, 0);
--@@ -1464,10 +1556,8 @@ minstrel_ht_update_caps(void *priv, stru
-- 		int bw, nss;
-- 
-- 		mi->supported[i] = 0;
---		if (i == MINSTREL_CCK_GROUP) {
---			minstrel_ht_update_cck(mp, mi, sband, sta);
--+		if (minstrel_ht_is_legacy_group(i))
-- 			continue;
---		}
-- 
-- 		if (gflags & IEEE80211_TX_RC_SHORT_GI) {
-- 			if (gflags & IEEE80211_TX_RC_40_MHZ_WIDTH) {
--@@ -1528,22 +1618,12 @@ minstrel_ht_update_caps(void *priv, stru
-- 			n_supported++;
-- 	}
-- 
---	if (!n_supported)
---		goto use_legacy;
--+	minstrel_ht_update_cck(mp, mi, sband, sta);
--+	minstrel_ht_update_ofdm(mp, mi, sband, sta);
-- 
-- 	/* create an initial rate table with the lowest supported rates */
-- 	minstrel_ht_update_stats(mp, mi, true);
-- 	minstrel_ht_update_rates(mp, mi);
---
---	return;
---
---use_legacy:
---	msp->is_ht = false;
---	memset(&msp->legacy, 0, sizeof(msp->legacy));
---	msp->legacy.r = msp->ratelist;
---	msp->legacy.sample_table = msp->sample_table;
---	return mac80211_minstrel.rate_init(priv, sband, chandef, sta,
---					   &msp->legacy);
-- }
-- 
-- static void
--@@ -1611,40 +1691,70 @@ minstrel_ht_free_sta(void *priv, struct
-- }
-- 
-- static void
---minstrel_ht_init_cck_rates(struct minstrel_priv *mp)
--+minstrel_ht_fill_rate_array(u8 *dest, struct ieee80211_supported_band *sband,
--+			    const s16 *bitrates, int n_rates, u32 rate_flags)
-- {
---	static const int bitrates[4] = { 10, 20, 55, 110 };
---	struct ieee80211_supported_band *sband;
---	u32 rate_flags = ieee80211_chandef_rate_flags(&mp->hw->conf.chandef);
-- 	int i, j;
-- 
---	sband = mp->hw->wiphy->bands[NL80211_BAND_2GHZ];
---	if (!sband)
---		return;
---
-- 	for (i = 0; i < sband->n_bitrates; i++) {
-- 		struct ieee80211_rate *rate = &sband->bitrates[i];
-- 
---		if (rate->flags & IEEE80211_RATE_ERP_G)
---			continue;
---
-- 		if ((rate_flags & sband->bitrates[i].flags) != rate_flags)
-- 			continue;
-- 
---		for (j = 0; j < ARRAY_SIZE(bitrates); j++) {
--+		for (j = 0; j < n_rates; j++) {
-- 			if (rate->bitrate != bitrates[j])
-- 				continue;
-- 
---			mp->cck_rates[j] = i;
--+			dest[j] = i;
-- 			break;
-- 		}
-- 	}
-- }
-- 
--+static void
--+minstrel_ht_init_cck_rates(struct minstrel_priv *mp)
--+{
--+	static const s16 bitrates[4] = { 10, 20, 55, 110 };
--+	struct ieee80211_supported_band *sband;
--+	u32 rate_flags = ieee80211_chandef_rate_flags(&mp->hw->conf.chandef);
--+
--+	memset(mp->cck_rates, 0xff, sizeof(mp->cck_rates));
--+	sband = mp->hw->wiphy->bands[NL80211_BAND_2GHZ];
--+	if (!sband)
--+		return;
--+
--+	BUILD_BUG_ON(ARRAY_SIZE(mp->cck_rates) != ARRAY_SIZE(bitrates));
--+	minstrel_ht_fill_rate_array(mp->cck_rates, sband,
--+				    minstrel_cck_bitrates,
--+				    ARRAY_SIZE(minstrel_cck_bitrates),
--+				    rate_flags);
--+}
--+
--+static void
--+minstrel_ht_init_ofdm_rates(struct minstrel_priv *mp, enum nl80211_band band)
--+{
--+	static const s16 bitrates[8] = { 60, 90, 120, 180, 240, 360, 480, 540 };
--+	struct ieee80211_supported_band *sband;
--+	u32 rate_flags = ieee80211_chandef_rate_flags(&mp->hw->conf.chandef);
--+
--+	memset(mp->ofdm_rates[band], 0xff, sizeof(mp->ofdm_rates[band]));
--+	sband = mp->hw->wiphy->bands[band];
--+	if (!sband)
--+		return;
--+
--+	BUILD_BUG_ON(ARRAY_SIZE(mp->ofdm_rates[band]) != ARRAY_SIZE(bitrates));
--+	minstrel_ht_fill_rate_array(mp->ofdm_rates[band], sband,
--+				    minstrel_ofdm_bitrates,
--+				    ARRAY_SIZE(minstrel_ofdm_bitrates),
--+				    rate_flags);
--+}
--+
-- static void *
-- minstrel_ht_alloc(struct ieee80211_hw *hw)
-- {
-- 	struct minstrel_priv *mp;
--+	int i;
-- 
-- 	mp = kzalloc(sizeof(struct minstrel_priv), GFP_ATOMIC);
-- 	if (!mp)
--@@ -1681,6 +1791,8 @@ minstrel_ht_alloc(struct ieee80211_hw *h
-- 	mp->new_avg = true;
-- 
-- 	minstrel_ht_init_cck_rates(mp);
--+	for (i = 0; i < ARRAY_SIZE(mp->hw->wiphy->bands); i++)
--+	    minstrel_ht_init_ofdm_rates(mp, i);
-- 
-- 	return mp;
-- }
--@@ -1713,9 +1825,6 @@ static u32 minstrel_ht_get_expected_thro
-- 	struct minstrel_ht_sta *mi = &msp->ht;
-- 	int i, j, prob, tp_avg;
-- 
---	if (!msp->is_ht)
---		return mac80211_minstrel.get_expected_throughput(priv_sta);
---
-- 	i = mi->max_tp_rate[0] / MCS_GROUP_RATES;
-- 	j = mi->max_tp_rate[0] % MCS_GROUP_RATES;
-- 	prob = mi->groups[i].rates[j].prob_avg;
----- a/net/mac80211/rc80211_minstrel_ht.h
--+++ b/net/mac80211/rc80211_minstrel_ht.h
--@@ -18,14 +18,15 @@
-- 				 MINSTREL_HT_STREAM_GROUPS)
-- #define MINSTREL_VHT_GROUPS_NB	(MINSTREL_MAX_STREAMS *		\
-- 				 MINSTREL_VHT_STREAM_GROUPS)
---#define MINSTREL_CCK_GROUPS_NB	1
--+#define MINSTREL_LEGACY_GROUPS_NB	2
-- #define MINSTREL_GROUPS_NB	(MINSTREL_HT_GROUPS_NB +	\
-- 				 MINSTREL_VHT_GROUPS_NB +	\
---				 MINSTREL_CCK_GROUPS_NB)
--+				 MINSTREL_LEGACY_GROUPS_NB)
-- 
-- #define MINSTREL_HT_GROUP_0	0
-- #define MINSTREL_CCK_GROUP	(MINSTREL_HT_GROUP_0 + MINSTREL_HT_GROUPS_NB)
---#define MINSTREL_VHT_GROUP_0	(MINSTREL_CCK_GROUP + 1)
--+#define MINSTREL_OFDM_GROUP	(MINSTREL_CCK_GROUP + 1)
--+#define MINSTREL_VHT_GROUP_0	(MINSTREL_OFDM_GROUP + 1)
-- 
-- #define MCS_GROUP_RATES		10
-- 
--@@ -37,6 +38,8 @@ struct mcs_group {
-- 	u16 duration[MCS_GROUP_RATES];
-- };
-- 
--+extern const s16 minstrel_cck_bitrates[4];
--+extern const s16 minstrel_ofdm_bitrates[8];
-- extern const struct mcs_group minstrel_mcs_groups[];
-- 
-- struct minstrel_mcs_group_data {
--@@ -99,6 +102,8 @@ struct minstrel_ht_sta {
-- 	/* current MCS group to be sampled */
-- 	u8 sample_group;
-- 
--+	u8 band;
--+
-- 	/* Bitfield of supported MCS rates of all groups */
-- 	u16 supported[MINSTREL_GROUPS_NB];
-- 
--@@ -107,13 +112,9 @@ struct minstrel_ht_sta {
-- };
-- 
-- struct minstrel_ht_sta_priv {
---	union {
---		struct minstrel_ht_sta ht;
---		struct minstrel_sta_info legacy;
---	};
--+	struct minstrel_ht_sta ht;
-- 	void *ratelist;
-- 	void *sample_table;
---	bool is_ht;
-- };
-- 
-- void minstrel_ht_add_sta_debugfs(void *priv, void *priv_sta, struct dentry *dir);
----- a/net/mac80211/rc80211_minstrel_ht_debugfs.c
--+++ b/net/mac80211/rc80211_minstrel_ht_debugfs.c
--@@ -52,7 +52,6 @@ minstrel_ht_stats_dump(struct minstrel_h
-- 
-- 	for (j = 0; j < MCS_GROUP_RATES; j++) {
-- 		struct minstrel_rate_stats *mrs = &mi->groups[i].rates[j];
---		static const int bitrates[4] = { 10, 20, 55, 110 };
-- 		int idx = i * MCS_GROUP_RATES + j;
-- 		unsigned int duration;
-- 
--@@ -67,6 +66,9 @@ minstrel_ht_stats_dump(struct minstrel_h
-- 			p += sprintf(p, "VHT%c0 ", htmode);
-- 			p += sprintf(p, "%cGI ", gimode);
-- 			p += sprintf(p, "%d  ", mg->streams);
--+		} else if (i == MINSTREL_OFDM_GROUP) {
--+			p += sprintf(p, "OFDM       ");
--+			p += sprintf(p, "1 ");
-- 		} else {
-- 			p += sprintf(p, "CCK    ");
-- 			p += sprintf(p, "%cP  ", j < 4 ? 'L' : 'S');
--@@ -84,7 +86,12 @@ minstrel_ht_stats_dump(struct minstrel_h
-- 		} else if (gflags & IEEE80211_TX_RC_VHT_MCS) {
-- 			p += sprintf(p, "  MCS%-1u/%1u", j, mg->streams);
-- 		} else {
---			int r = bitrates[j % 4];
--+			int r;
--+
--+			if (i == MINSTREL_OFDM_GROUP)
--+				r = minstrel_ofdm_bitrates[j % 8];
--+			else
--+				r = minstrel_cck_bitrates[j % 4];
-- 
-- 			p += sprintf(p, "   %2u.%1uM", r / 10, r % 10);
-- 		}
--@@ -124,16 +131,8 @@ minstrel_ht_stats_open(struct inode *ino
-- 	struct minstrel_ht_sta *mi = &msp->ht;
-- 	struct minstrel_debugfs_info *ms;
-- 	unsigned int i;
---	int ret;
-- 	char *p;
-- 
---	if (!msp->is_ht) {
---		inode->i_private = &msp->legacy;
---		ret = minstrel_stats_open(inode, file);
---		inode->i_private = msp;
---		return ret;
---	}
---
-- 	ms = kmalloc(32768, GFP_KERNEL);
-- 	if (!ms)
-- 		return -ENOMEM;
--@@ -199,7 +198,6 @@ minstrel_ht_stats_csv_dump(struct minstr
-- 
-- 	for (j = 0; j < MCS_GROUP_RATES; j++) {
-- 		struct minstrel_rate_stats *mrs = &mi->groups[i].rates[j];
---		static const int bitrates[4] = { 10, 20, 55, 110 };
-- 		int idx = i * MCS_GROUP_RATES + j;
-- 		unsigned int duration;
-- 
--@@ -214,6 +212,8 @@ minstrel_ht_stats_csv_dump(struct minstr
-- 			p += sprintf(p, "VHT%c0,", htmode);
-- 			p += sprintf(p, "%cGI,", gimode);
-- 			p += sprintf(p, "%d,", mg->streams);
--+		} else if (i == MINSTREL_OFDM_GROUP) {
--+			p += sprintf(p, "OFDM,,1,");
-- 		} else {
-- 			p += sprintf(p, "CCK,");
-- 			p += sprintf(p, "%cP,", j < 4 ? 'L' : 'S');
--@@ -231,7 +231,13 @@ minstrel_ht_stats_csv_dump(struct minstr
-- 		} else if (gflags & IEEE80211_TX_RC_VHT_MCS) {
-- 			p += sprintf(p, ",MCS%-1u/%1u,", j, mg->streams);
-- 		} else {
---			int r = bitrates[j % 4];
--+			int r;
--+
--+			if (i == MINSTREL_OFDM_GROUP)
--+				r = minstrel_ofdm_bitrates[j % 8];
--+			else
--+				r = minstrel_cck_bitrates[j % 4];
--+
-- 			p += sprintf(p, ",%2u.%1uM,", r / 10, r % 10);
-- 		}
-- 
--@@ -274,18 +280,9 @@ minstrel_ht_stats_csv_open(struct inode
-- 	struct minstrel_ht_sta *mi = &msp->ht;
-- 	struct minstrel_debugfs_info *ms;
-- 	unsigned int i;
---	int ret;
-- 	char *p;
-- 
---	if (!msp->is_ht) {
---		inode->i_private = &msp->legacy;
---		ret = minstrel_stats_csv_open(inode, file);
---		inode->i_private = msp;
---		return ret;
---	}
---
-- 	ms = kmalloc(32768, GFP_KERNEL);
---
-- 	if (!ms)
-- 		return -ENOMEM;
-- 
-diff --git a/package/kernel/mac80211/patches/subsys/339-mac80211-remove-legacy-minstrel-rate-control.patch b/package/kernel/mac80211/patches/subsys/339-mac80211-remove-legacy-minstrel-rate-control.patch
-deleted file mode 100644
-index 96ee595ac1..0000000000
---- a/package/kernel/mac80211/patches/subsys/339-mac80211-remove-legacy-minstrel-rate-control.patch
-+++ /dev/null
-@@ -1,1328 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Sat, 26 Dec 2020 14:23:47 +0100
--Subject: [PATCH] mac80211: remove legacy minstrel rate control
--
--Now that minstrel_ht supports legacy rates, it is no longer needed
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
-- delete mode 100644 net/mac80211/rc80211_minstrel.c
-- delete mode 100644 net/mac80211/rc80211_minstrel.h
-- delete mode 100644 net/mac80211/rc80211_minstrel_debugfs.c
--
----- a/net/mac80211/Makefile
--+++ b/net/mac80211/Makefile
--@@ -55,11 +55,9 @@ mac80211-$(CONFIG_PM) += pm.o
-- CFLAGS_trace.o := -I$(src)
-- 
-- rc80211_minstrel-y := \
---	rc80211_minstrel.o \
-- 	rc80211_minstrel_ht.o
-- 
-- rc80211_minstrel-$(CPTCFG_MAC80211_DEBUGFS) += \
---	rc80211_minstrel_debugfs.o \
-- 	rc80211_minstrel_ht_debugfs.o
-- 
-- mac80211-$(CPTCFG_MAC80211_RC_MINSTREL) += $(rc80211_minstrel-y)
----- a/net/mac80211/rc80211_minstrel.c
--+++ /dev/null
--@@ -1,574 +0,0 @@
---/*
--- * Copyright (C) 2008 Felix Fietkau <nbd@openwrt.org>
--- *
--- * This program is free software; you can redistribute it and/or modify
--- * it under the terms of the GNU General Public License version 2 as
--- * published by the Free Software Foundation.
--- *
--- * Based on minstrel.c:
--- *   Copyright (C) 2005-2007 Derek Smithies <derek@indranet.co.nz>
--- *   Sponsored by Indranet Technologies Ltd
--- *
--- * Based on sample.c:
--- *   Copyright (c) 2005 John Bicket
--- *   All rights reserved.
--- *
--- *   Redistribution and use in source and binary forms, with or without
--- *   modification, are permitted provided that the following conditions
--- *   are met:
--- *   1. Redistributions of source code must retain the above copyright
--- *      notice, this list of conditions and the following disclaimer,
--- *      without modification.
--- *   2. Redistributions in binary form must reproduce at minimum a disclaimer
--- *      similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
--- *      redistribution must be conditioned upon including a substantially
--- *      similar Disclaimer requirement for further binary redistribution.
--- *   3. Neither the names of the above-listed copyright holders nor the names
--- *      of any contributors may be used to endorse or promote products derived
--- *      from this software without specific prior written permission.
--- *
--- *   Alternatively, this software may be distributed under the terms of the
--- *   GNU General Public License ("GPL") version 2 as published by the Free
--- *   Software Foundation.
--- *
--- *   NO WARRANTY
--- *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
--- *   ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
--- *   LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
--- *   AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
--- *   THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
--- *   OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
--- *   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
--- *   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
--- *   IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
--- *   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
--- *   THE POSSIBILITY OF SUCH DAMAGES.
--- */
---#include <linux/netdevice.h>
---#include <linux/types.h>
---#include <linux/skbuff.h>
---#include <linux/debugfs.h>
---#include <linux/random.h>
---#include <linux/ieee80211.h>
---#include <linux/slab.h>
---#include <net/mac80211.h>
---#include "rate.h"
---#include "rc80211_minstrel.h"
---
---#define SAMPLE_TBL(_mi, _idx, _col) \
---		_mi->sample_table[(_idx * SAMPLE_COLUMNS) + _col]
---
---/* convert mac80211 rate index to local array index */
---static inline int
---rix_to_ndx(struct minstrel_sta_info *mi, int rix)
---{
---	int i = rix;
---	for (i = rix; i >= 0; i--)
---		if (mi->r[i].rix == rix)
---			break;
---	return i;
---}
---
---/* return current EMWA throughput */
---int minstrel_get_tp_avg(struct minstrel_rate *mr, int prob_avg)
---{
---	int usecs;
---
---	usecs = mr->perfect_tx_time;
---	if (!usecs)
---		usecs = 1000000;
---
---	/* reset thr. below 10% success */
---	if (mr->stats.prob_avg < MINSTREL_FRAC(10, 100))
---		return 0;
---
---	if (prob_avg > MINSTREL_FRAC(90, 100))
---		return MINSTREL_TRUNC(100000 * (MINSTREL_FRAC(90, 100) / usecs));
---	else
---		return MINSTREL_TRUNC(100000 * (prob_avg / usecs));
---}
---
---/* find & sort topmost throughput rates */
---static inline void
---minstrel_sort_best_tp_rates(struct minstrel_sta_info *mi, int i, u8 *tp_list)
---{
---	int j;
---	struct minstrel_rate_stats *tmp_mrs;
---	struct minstrel_rate_stats *cur_mrs = &mi->r[i].stats;
---
---	for (j = MAX_THR_RATES; j > 0; --j) {
---		tmp_mrs = &mi->r[tp_list[j - 1]].stats;
---		if (minstrel_get_tp_avg(&mi->r[i], cur_mrs->prob_avg) <=
---		    minstrel_get_tp_avg(&mi->r[tp_list[j - 1]], tmp_mrs->prob_avg))
---			break;
---	}
---
---	if (j < MAX_THR_RATES - 1)
---		memmove(&tp_list[j + 1], &tp_list[j], MAX_THR_RATES - (j + 1));
---	if (j < MAX_THR_RATES)
---		tp_list[j] = i;
---}
---
---static void
---minstrel_set_rate(struct minstrel_sta_info *mi, struct ieee80211_sta_rates *ratetbl,
---		  int offset, int idx)
---{
---	struct minstrel_rate *r = &mi->r[idx];
---
---	ratetbl->rate[offset].idx = r->rix;
---	ratetbl->rate[offset].count = r->adjusted_retry_count;
---	ratetbl->rate[offset].count_cts = r->retry_count_cts;
---	ratetbl->rate[offset].count_rts = r->stats.retry_count_rtscts;
---}
---
---static void
---minstrel_update_rates(struct minstrel_priv *mp, struct minstrel_sta_info *mi)
---{
---	struct ieee80211_sta_rates *ratetbl;
---	int i = 0;
---
---	ratetbl = kzalloc(sizeof(*ratetbl), GFP_ATOMIC);
---	if (!ratetbl)
---		return;
---
---	/* Start with max_tp_rate */
---	minstrel_set_rate(mi, ratetbl, i++, mi->max_tp_rate[0]);
---
---	if (mp->hw->max_rates >= 3) {
---		/* At least 3 tx rates supported, use max_tp_rate2 next */
---		minstrel_set_rate(mi, ratetbl, i++, mi->max_tp_rate[1]);
---	}
---
---	if (mp->hw->max_rates >= 2) {
---		/* At least 2 tx rates supported, use max_prob_rate next */
---		minstrel_set_rate(mi, ratetbl, i++, mi->max_prob_rate);
---	}
---
---	/* Use lowest rate last */
---	ratetbl->rate[i].idx = mi->lowest_rix;
---	ratetbl->rate[i].count = mp->max_retry;
---	ratetbl->rate[i].count_cts = mp->max_retry;
---	ratetbl->rate[i].count_rts = mp->max_retry;
---
---	rate_control_set_rates(mp->hw, mi->sta, ratetbl);
---}
---
---/*
---* Recalculate statistics and counters of a given rate
---*/
---void
---minstrel_calc_rate_stats(struct minstrel_priv *mp,
---			 struct minstrel_rate_stats *mrs)
---{
---	unsigned int cur_prob;
---
---	if (unlikely(mrs->attempts > 0)) {
---		mrs->sample_skipped = 0;
---		cur_prob = MINSTREL_FRAC(mrs->success, mrs->attempts);
---		if (mp->new_avg) {
---			minstrel_filter_avg_add(&mrs->prob_avg,
---						&mrs->prob_avg_1, cur_prob);
---		} else if (unlikely(!mrs->att_hist)) {
---			mrs->prob_avg = cur_prob;
---		} else {
---			/*update exponential weighted moving avarage */
---			mrs->prob_avg = minstrel_ewma(mrs->prob_avg,
---						      cur_prob,
---						      EWMA_LEVEL);
---		}
---		mrs->att_hist += mrs->attempts;
---		mrs->succ_hist += mrs->success;
---	} else {
---		mrs->sample_skipped++;
---	}
---
---	mrs->last_success = mrs->success;
---	mrs->last_attempts = mrs->attempts;
---	mrs->success = 0;
---	mrs->attempts = 0;
---}
---
---static void
---minstrel_update_stats(struct minstrel_priv *mp, struct minstrel_sta_info *mi)
---{
---	u8 tmp_tp_rate[MAX_THR_RATES];
---	u8 tmp_prob_rate = 0;
---	int i, tmp_cur_tp, tmp_prob_tp;
---
---	for (i = 0; i < MAX_THR_RATES; i++)
---	    tmp_tp_rate[i] = 0;
---
---	for (i = 0; i < mi->n_rates; i++) {
---		struct minstrel_rate *mr = &mi->r[i];
---		struct minstrel_rate_stats *mrs = &mi->r[i].stats;
---		struct minstrel_rate_stats *tmp_mrs = &mi->r[tmp_prob_rate].stats;
---
---		/* Update statistics of success probability per rate */
---		minstrel_calc_rate_stats(mp, mrs);
---
---		/* Sample less often below the 10% chance of success.
---		 * Sample less often above the 95% chance of success. */
---		if (mrs->prob_avg > MINSTREL_FRAC(95, 100) ||
---		    mrs->prob_avg < MINSTREL_FRAC(10, 100)) {
---			mr->adjusted_retry_count = mrs->retry_count >> 1;
---			if (mr->adjusted_retry_count > 2)
---				mr->adjusted_retry_count = 2;
---			mr->sample_limit = 4;
---		} else {
---			mr->sample_limit = -1;
---			mr->adjusted_retry_count = mrs->retry_count;
---		}
---		if (!mr->adjusted_retry_count)
---			mr->adjusted_retry_count = 2;
---
---		minstrel_sort_best_tp_rates(mi, i, tmp_tp_rate);
---
---		/* To determine the most robust rate (max_prob_rate) used at
---		 * 3rd mmr stage we distinct between two cases:
---		 * (1) if any success probabilitiy >= 95%, out of those rates
---		 * choose the maximum throughput rate as max_prob_rate
---		 * (2) if all success probabilities < 95%, the rate with
---		 * highest success probability is chosen as max_prob_rate */
---		if (mrs->prob_avg >= MINSTREL_FRAC(95, 100)) {
---			tmp_cur_tp = minstrel_get_tp_avg(mr, mrs->prob_avg);
---			tmp_prob_tp = minstrel_get_tp_avg(&mi->r[tmp_prob_rate],
---							  tmp_mrs->prob_avg);
---			if (tmp_cur_tp >= tmp_prob_tp)
---				tmp_prob_rate = i;
---		} else {
---			if (mrs->prob_avg >= tmp_mrs->prob_avg)
---				tmp_prob_rate = i;
---		}
---	}
---
---	/* Assign the new rate set */
---	memcpy(mi->max_tp_rate, tmp_tp_rate, sizeof(mi->max_tp_rate));
---	mi->max_prob_rate = tmp_prob_rate;
---
---#ifdef CPTCFG_MAC80211_DEBUGFS
---	/* use fixed index if set */
---	if (mp->fixed_rate_idx != -1) {
---		mi->max_tp_rate[0] = mp->fixed_rate_idx;
---		mi->max_tp_rate[1] = mp->fixed_rate_idx;
---		mi->max_prob_rate = mp->fixed_rate_idx;
---	}
---#endif
---
---	/* Reset update timer */
---	mi->last_stats_update = jiffies;
---
---	minstrel_update_rates(mp, mi);
---}
---
---static void
---minstrel_tx_status(void *priv, struct ieee80211_supported_band *sband,
---		   void *priv_sta, struct ieee80211_tx_status *st)
---{
---	struct ieee80211_tx_info *info = st->info;
---	struct minstrel_priv *mp = priv;
---	struct minstrel_sta_info *mi = priv_sta;
---	struct ieee80211_tx_rate *ar = info->status.rates;
---	int i, ndx;
---	int success;
---
---	success = !!(info->flags & IEEE80211_TX_STAT_ACK);
---
---	for (i = 0; i < IEEE80211_TX_MAX_RATES; i++) {
---		if (ar[i].idx < 0 || !ar[i].count)
---			break;
---
---		ndx = rix_to_ndx(mi, ar[i].idx);
---		if (ndx < 0)
---			continue;
---
---		mi->r[ndx].stats.attempts += ar[i].count;
---
---		if ((i != IEEE80211_TX_MAX_RATES - 1) && (ar[i + 1].idx < 0))
---			mi->r[ndx].stats.success += success;
---	}
---
---	if (time_after(jiffies, mi->last_stats_update +
---				mp->update_interval / (mp->new_avg ? 2 : 1)))
---		minstrel_update_stats(mp, mi);
---}
---
---
---static inline unsigned int
---minstrel_get_retry_count(struct minstrel_rate *mr,
---			 struct ieee80211_tx_info *info)
---{
---	u8 retry = mr->adjusted_retry_count;
---
---	if (info->control.use_rts)
---		retry = max_t(u8, 2, min(mr->stats.retry_count_rtscts, retry));
---	else if (info->control.use_cts_prot)
---		retry = max_t(u8, 2, min(mr->retry_count_cts, retry));
---	return retry;
---}
---
---
---static int
---minstrel_get_next_sample(struct minstrel_sta_info *mi)
---{
---	unsigned int sample_ndx;
---	sample_ndx = SAMPLE_TBL(mi, mi->sample_row, mi->sample_column);
---	mi->sample_row++;
---	if ((int) mi->sample_row >= mi->n_rates) {
---		mi->sample_row = 0;
---		mi->sample_column++;
---		if (mi->sample_column >= SAMPLE_COLUMNS)
---			mi->sample_column = 0;
---	}
---	return sample_ndx;
---}
---
---static void
---minstrel_get_rate(void *priv, struct ieee80211_sta *sta,
---		  void *priv_sta, struct ieee80211_tx_rate_control *txrc)
---{
---	struct sk_buff *skb = txrc->skb;
---	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
---	struct minstrel_sta_info *mi = priv_sta;
---	struct minstrel_priv *mp = priv;
---	struct ieee80211_tx_rate *rate = &info->control.rates[0];
---	struct minstrel_rate *msr, *mr;
---	unsigned int ndx;
---	bool mrr_capable;
---	bool prev_sample;
---	int delta;
---	int sampling_ratio;
---
---	/* check multi-rate-retry capabilities & adjust lookaround_rate */
---	mrr_capable = mp->has_mrr &&
---		      !txrc->rts &&
---		      !txrc->bss_conf->use_cts_prot;
---	if (mrr_capable)
---		sampling_ratio = mp->lookaround_rate_mrr;
---	else
---		sampling_ratio = mp->lookaround_rate;
---
---	/* increase sum packet counter */
---	mi->total_packets++;
---
---#ifdef CPTCFG_MAC80211_DEBUGFS
---	if (mp->fixed_rate_idx != -1)
---		return;
---#endif
---
---	/* Don't use EAPOL frames for sampling on non-mrr hw */
---	if (mp->hw->max_rates == 1 &&
---	    (info->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO))
---		return;
---
---	delta = (mi->total_packets * sampling_ratio / 100) -
---			mi->sample_packets;
---
---	/* delta < 0: no sampling required */
---	prev_sample = mi->prev_sample;
---	mi->prev_sample = false;
---	if (delta < 0 || (!mrr_capable && prev_sample))
---		return;
---
---	if (mi->total_packets >= 10000) {
---		mi->sample_packets = 0;
---		mi->total_packets = 0;
---	} else if (delta > mi->n_rates * 2) {
---		/* With multi-rate retry, not every planned sample
---		 * attempt actually gets used, due to the way the retry
---		 * chain is set up - [max_tp,sample,prob,lowest] for
---		 * sample_rate < max_tp.
---		 *
---		 * If there's too much sampling backlog and the link
---		 * starts getting worse, minstrel would start bursting
---		 * out lots of sampling frames, which would result
---		 * in a large throughput loss. */
---		mi->sample_packets += (delta - mi->n_rates * 2);
---	}
---
---	/* get next random rate sample */
---	ndx = minstrel_get_next_sample(mi);
---	msr = &mi->r[ndx];
---	mr = &mi->r[mi->max_tp_rate[0]];
---
---	/* Decide if direct ( 1st mrr stage) or indirect (2nd mrr stage)
---	 * rate sampling method should be used.
---	 * Respect such rates that are not sampled for 20 interations.
---	 */
---	if (msr->perfect_tx_time < mr->perfect_tx_time ||
---	    msr->stats.sample_skipped >= 20) {
---		if (!msr->sample_limit)
---			return;
---
---		mi->sample_packets++;
---		if (msr->sample_limit > 0)
---			msr->sample_limit--;
---	}
---
---	/* If we're not using MRR and the sampling rate already
---	 * has a probability of >95%, we shouldn't be attempting
---	 * to use it, as this only wastes precious airtime */
---	if (!mrr_capable &&
---	   (mi->r[ndx].stats.prob_avg > MINSTREL_FRAC(95, 100)))
---		return;
---
---	mi->prev_sample = true;
---
---	rate->idx = mi->r[ndx].rix;
---	rate->count = minstrel_get_retry_count(&mi->r[ndx], info);
---	info->flags |= IEEE80211_TX_CTL_RATE_CTRL_PROBE;
---}
---
---
---static void
---calc_rate_durations(enum nl80211_band band,
---		    struct minstrel_rate *d,
---		    struct ieee80211_rate *rate,
---		    struct cfg80211_chan_def *chandef)
---{
---	int erp = !!(rate->flags & IEEE80211_RATE_ERP_G);
---	int shift = ieee80211_chandef_get_shift(chandef);
---
---	d->perfect_tx_time = ieee80211_frame_duration(band, 1200,
---			DIV_ROUND_UP(rate->bitrate, 1 << shift), erp, 1,
---			shift);
---	d->ack_time = ieee80211_frame_duration(band, 10,
---			DIV_ROUND_UP(rate->bitrate, 1 << shift), erp, 1,
---			shift);
---}
---
---static void
---init_sample_table(struct minstrel_sta_info *mi)
---{
---	unsigned int i, col, new_idx;
---	u8 rnd[8];
---
---	mi->sample_column = 0;
---	mi->sample_row = 0;
---	memset(mi->sample_table, 0xff, SAMPLE_COLUMNS * mi->n_rates);
---
---	for (col = 0; col < SAMPLE_COLUMNS; col++) {
---		prandom_bytes(rnd, sizeof(rnd));
---		for (i = 0; i < mi->n_rates; i++) {
---			new_idx = (i + rnd[i & 7]) % mi->n_rates;
---			while (SAMPLE_TBL(mi, new_idx, col) != 0xff)
---				new_idx = (new_idx + 1) % mi->n_rates;
---
---			SAMPLE_TBL(mi, new_idx, col) = i;
---		}
---	}
---}
---
---static void
---minstrel_rate_init(void *priv, struct ieee80211_supported_band *sband,
---		   struct cfg80211_chan_def *chandef,
---		   struct ieee80211_sta *sta, void *priv_sta)
---{
---	struct minstrel_sta_info *mi = priv_sta;
---	struct minstrel_priv *mp = priv;
---	struct ieee80211_rate *ctl_rate;
---	unsigned int i, n = 0;
---	unsigned int t_slot = 9; /* FIXME: get real slot time */
---	u32 rate_flags;
---
---	mi->sta = sta;
---	mi->lowest_rix = rate_lowest_index(sband, sta);
---	ctl_rate = &sband->bitrates[mi->lowest_rix];
---	mi->sp_ack_dur = ieee80211_frame_duration(sband->band, 10,
---				ctl_rate->bitrate,
---				!!(ctl_rate->flags & IEEE80211_RATE_ERP_G), 1,
---				ieee80211_chandef_get_shift(chandef));
---
---	rate_flags = ieee80211_chandef_rate_flags(&mp->hw->conf.chandef);
---	memset(mi->max_tp_rate, 0, sizeof(mi->max_tp_rate));
---	mi->max_prob_rate = 0;
---
---	for (i = 0; i < sband->n_bitrates; i++) {
---		struct minstrel_rate *mr = &mi->r[n];
---		struct minstrel_rate_stats *mrs = &mi->r[n].stats;
---		unsigned int tx_time = 0, tx_time_cts = 0, tx_time_rtscts = 0;
---		unsigned int tx_time_single;
---		unsigned int cw = mp->cw_min;
---		int shift;
---
---		if (!rate_supported(sta, sband->band, i))
---			continue;
---		if ((rate_flags & sband->bitrates[i].flags) != rate_flags)
---			continue;
---
---		n++;
---		memset(mr, 0, sizeof(*mr));
---		memset(mrs, 0, sizeof(*mrs));
---
---		mr->rix = i;
---		shift = ieee80211_chandef_get_shift(chandef);
---		mr->bitrate = DIV_ROUND_UP(sband->bitrates[i].bitrate,
---					   (1 << shift) * 5);
---		calc_rate_durations(sband->band, mr, &sband->bitrates[i],
---				    chandef);
---
---		/* calculate maximum number of retransmissions before
---		 * fallback (based on maximum segment size) */
---		mr->sample_limit = -1;
---		mrs->retry_count = 1;
---		mr->retry_count_cts = 1;
---		mrs->retry_count_rtscts = 1;
---		tx_time = mr->perfect_tx_time + mi->sp_ack_dur;
---		do {
---			/* add one retransmission */
---			tx_time_single = mr->ack_time + mr->perfect_tx_time;
---
---			/* contention window */
---			tx_time_single += (t_slot * cw) >> 1;
---			cw = min((cw << 1) | 1, mp->cw_max);
---
---			tx_time += tx_time_single;
---			tx_time_cts += tx_time_single + mi->sp_ack_dur;
---			tx_time_rtscts += tx_time_single + 2 * mi->sp_ack_dur;
---			if ((tx_time_cts < mp->segment_size) &&
---				(mr->retry_count_cts < mp->max_retry))
---				mr->retry_count_cts++;
---			if ((tx_time_rtscts < mp->segment_size) &&
---				(mrs->retry_count_rtscts < mp->max_retry))
---				mrs->retry_count_rtscts++;
---		} while ((tx_time < mp->segment_size) &&
---				(++mr->stats.retry_count < mp->max_retry));
---		mr->adjusted_retry_count = mrs->retry_count;
---		if (!(sband->bitrates[i].flags & IEEE80211_RATE_ERP_G))
---			mr->retry_count_cts = mrs->retry_count;
---	}
---
---	for (i = n; i < sband->n_bitrates; i++) {
---		struct minstrel_rate *mr = &mi->r[i];
---		mr->rix = -1;
---	}
---
---	mi->n_rates = n;
---	mi->last_stats_update = jiffies;
---
---	init_sample_table(mi);
---	minstrel_update_rates(mp, mi);
---}
---
---static u32 minstrel_get_expected_throughput(void *priv_sta)
---{
---	struct minstrel_sta_info *mi = priv_sta;
---	struct minstrel_rate_stats *tmp_mrs;
---	int idx = mi->max_tp_rate[0];
---	int tmp_cur_tp;
---
---	/* convert pkt per sec in kbps (1200 is the average pkt size used for
---	 * computing cur_tp
---	 */
---	tmp_mrs = &mi->r[idx].stats;
---	tmp_cur_tp = minstrel_get_tp_avg(&mi->r[idx], tmp_mrs->prob_avg) * 10;
---	tmp_cur_tp = tmp_cur_tp * 1200 * 8 / 1024;
---
---	return tmp_cur_tp;
---}
---
---const struct rate_control_ops mac80211_minstrel = {
---	.tx_status_ext = minstrel_tx_status,
---	.get_rate = minstrel_get_rate,
---	.rate_init = minstrel_rate_init,
---	.get_expected_throughput = minstrel_get_expected_throughput,
---};
----- a/net/mac80211/rc80211_minstrel.h
--+++ /dev/null
--@@ -1,185 +0,0 @@
---/* SPDX-License-Identifier: GPL-2.0-only */
---/*
--- * Copyright (C) 2008 Felix Fietkau <nbd@openwrt.org>
--- */
---
---#ifndef __RC_MINSTREL_H
---#define __RC_MINSTREL_H
---
---#define EWMA_LEVEL	96	/* ewma weighting factor [/EWMA_DIV] */
---#define EWMA_DIV	128
---#define SAMPLE_COLUMNS	10	/* number of columns in sample table */
---
---/* scaled fraction values */
---#define MINSTREL_SCALE  12
---#define MINSTREL_FRAC(val, div) (((val) << MINSTREL_SCALE) / div)
---#define MINSTREL_TRUNC(val) ((val) >> MINSTREL_SCALE)
---
---/* number of highest throughput rates to consider*/
---#define MAX_THR_RATES 4
---
---/*
--- * Coefficients for moving average with noise filter (period=16),
--- * scaled by 10 bits
--- *
--- * a1 = exp(-pi * sqrt(2) / period)
--- * coeff2 = 2 * a1 * cos(sqrt(2) * 2 * pi / period)
--- * coeff3 = -sqr(a1)
--- * coeff1 = 1 - coeff2 - coeff3
--- */
---#define MINSTREL_AVG_COEFF1		(MINSTREL_FRAC(1, 1) - \
---					 MINSTREL_AVG_COEFF2 - \
---					 MINSTREL_AVG_COEFF3)
---#define MINSTREL_AVG_COEFF2		0x00001499
---#define MINSTREL_AVG_COEFF3		-0x0000092e
---
---/*
--- * Perform EWMA (Exponentially Weighted Moving Average) calculation
--- */
---static inline int
---minstrel_ewma(int old, int new, int weight)
---{
---	int diff, incr;
---
---	diff = new - old;
---	incr = (EWMA_DIV - weight) * diff / EWMA_DIV;
---
---	return old + incr;
---}
---
---static inline int minstrel_filter_avg_add(u16 *prev_1, u16 *prev_2, s32 in)
---{
---	s32 out_1 = *prev_1;
---	s32 out_2 = *prev_2;
---	s32 val;
---
---	if (!in)
---		in += 1;
---
---	if (!out_1) {
---		val = out_1 = in;
---		goto out;
---	}
---
---	val = MINSTREL_AVG_COEFF1 * in;
---	val += MINSTREL_AVG_COEFF2 * out_1;
---	val += MINSTREL_AVG_COEFF3 * out_2;
---	val >>= MINSTREL_SCALE;
---
---	if (val > 1 << MINSTREL_SCALE)
---		val = 1 << MINSTREL_SCALE;
---	if (val < 0)
---		val = 1;
---
---out:
---	*prev_2 = out_1;
---	*prev_1 = val;
---
---	return val;
---}
---
---struct minstrel_rate_stats {
---	/* current / last sampling period attempts/success counters */
---	u16 attempts, last_attempts;
---	u16 success, last_success;
---
---	/* total attempts/success counters */
---	u32 att_hist, succ_hist;
---
---	/* prob_avg - moving average of prob */
---	u16 prob_avg;
---	u16 prob_avg_1;
---
---	/* maximum retry counts */
---	u8 retry_count;
---	u8 retry_count_rtscts;
---
---	u8 sample_skipped;
---	bool retry_updated;
---};
---
---struct minstrel_rate {
---	int bitrate;
---
---	s8 rix;
---	u8 retry_count_cts;
---	u8 adjusted_retry_count;
---
---	unsigned int perfect_tx_time;
---	unsigned int ack_time;
---
---	int sample_limit;
---
---	struct minstrel_rate_stats stats;
---};
---
---struct minstrel_sta_info {
---	struct ieee80211_sta *sta;
---
---	unsigned long last_stats_update;
---	unsigned int sp_ack_dur;
---	unsigned int rate_avg;
---
---	unsigned int lowest_rix;
---
---	u8 max_tp_rate[MAX_THR_RATES];
---	u8 max_prob_rate;
---	unsigned int total_packets;
---	unsigned int sample_packets;
---
---	unsigned int sample_row;
---	unsigned int sample_column;
---
---	int n_rates;
---	struct minstrel_rate *r;
---	bool prev_sample;
---
---	/* sampling table */
---	u8 *sample_table;
---};
---
---struct minstrel_priv {
---	struct ieee80211_hw *hw;
---	bool has_mrr;
---	bool new_avg;
---	u32 sample_switch;
---	unsigned int cw_min;
---	unsigned int cw_max;
---	unsigned int max_retry;
---	unsigned int segment_size;
---	unsigned int update_interval;
---	unsigned int lookaround_rate;
---	unsigned int lookaround_rate_mrr;
---
---	u8 cck_rates[4];
---	u8 ofdm_rates[NUM_NL80211_BANDS][8];
---
---#ifdef CPTCFG_MAC80211_DEBUGFS
---	/*
---	 * enable fixed rate processing per RC
---	 *   - write static index to debugfs:ieee80211/phyX/rc/fixed_rate_idx
---	 *   - write -1 to enable RC processing again
---	 *   - setting will be applied on next update
---	 */
---	u32 fixed_rate_idx;
---#endif
---};
---
---struct minstrel_debugfs_info {
---	size_t len;
---	char buf[];
---};
---
---extern const struct rate_control_ops mac80211_minstrel;
---void minstrel_add_sta_debugfs(void *priv, void *priv_sta, struct dentry *dir);
---
---/* Recalculate success probabilities and counters for a given rate using EWMA */
---void minstrel_calc_rate_stats(struct minstrel_priv *mp,
---			      struct minstrel_rate_stats *mrs);
---int minstrel_get_tp_avg(struct minstrel_rate *mr, int prob_avg);
---
---/* debugfs */
---int minstrel_stats_open(struct inode *inode, struct file *file);
---int minstrel_stats_csv_open(struct inode *inode, struct file *file);
---
---#endif
----- a/net/mac80211/rc80211_minstrel_debugfs.c
--+++ /dev/null
--@@ -1,172 +0,0 @@
---/*
--- * Copyright (C) 2008 Felix Fietkau <nbd@openwrt.org>
--- *
--- * This program is free software; you can redistribute it and/or modify
--- * it under the terms of the GNU General Public License version 2 as
--- * published by the Free Software Foundation.
--- *
--- * Based on minstrel.c:
--- *   Copyright (C) 2005-2007 Derek Smithies <derek@indranet.co.nz>
--- *   Sponsored by Indranet Technologies Ltd
--- *
--- * Based on sample.c:
--- *   Copyright (c) 2005 John Bicket
--- *   All rights reserved.
--- *
--- *   Redistribution and use in source and binary forms, with or without
--- *   modification, are permitted provided that the following conditions
--- *   are met:
--- *   1. Redistributions of source code must retain the above copyright
--- *      notice, this list of conditions and the following disclaimer,
--- *      without modification.
--- *   2. Redistributions in binary form must reproduce at minimum a disclaimer
--- *      similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
--- *      redistribution must be conditioned upon including a substantially
--- *      similar Disclaimer requirement for further binary redistribution.
--- *   3. Neither the names of the above-listed copyright holders nor the names
--- *      of any contributors may be used to endorse or promote products derived
--- *      from this software without specific prior written permission.
--- *
--- *   Alternatively, this software may be distributed under the terms of the
--- *   GNU General Public License ("GPL") version 2 as published by the Free
--- *   Software Foundation.
--- *
--- *   NO WARRANTY
--- *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
--- *   ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
--- *   LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
--- *   AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
--- *   THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
--- *   OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
--- *   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
--- *   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
--- *   IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
--- *   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
--- *   THE POSSIBILITY OF SUCH DAMAGES.
--- */
---#include <linux/netdevice.h>
---#include <linux/types.h>
---#include <linux/skbuff.h>
---#include <linux/debugfs.h>
---#include <linux/ieee80211.h>
---#include <linux/slab.h>
---#include <linux/export.h>
---#include <net/mac80211.h>
---#include "rc80211_minstrel.h"
---
---int
---minstrel_stats_open(struct inode *inode, struct file *file)
---{
---	struct minstrel_sta_info *mi = inode->i_private;
---	struct minstrel_debugfs_info *ms;
---	unsigned int i, tp_max, tp_avg, eprob;
---	char *p;
---
---	ms = kmalloc(2048, GFP_KERNEL);
---	if (!ms)
---		return -ENOMEM;
---
---	file->private_data = ms;
---	p = ms->buf;
---	p += sprintf(p, "\n");
---	p += sprintf(p,
---		     "best   __________rate_________    ____statistics___    ____last_____    ______sum-of________\n");
---	p += sprintf(p,
---		     "rate  [name idx airtime max_tp]  [avg(tp) avg(prob)]  [retry|suc|att]  [#success | #attempts]\n");
---
---	for (i = 0; i < mi->n_rates; i++) {
---		struct minstrel_rate *mr = &mi->r[i];
---		struct minstrel_rate_stats *mrs = &mi->r[i].stats;
---
---		*(p++) = (i == mi->max_tp_rate[0]) ? 'A' : ' ';
---		*(p++) = (i == mi->max_tp_rate[1]) ? 'B' : ' ';
---		*(p++) = (i == mi->max_tp_rate[2]) ? 'C' : ' ';
---		*(p++) = (i == mi->max_tp_rate[3]) ? 'D' : ' ';
---		*(p++) = (i == mi->max_prob_rate) ? 'P' : ' ';
---
---		p += sprintf(p, " %3u%s ", mr->bitrate / 2,
---				(mr->bitrate & 1 ? ".5" : "  "));
---		p += sprintf(p, "%3u  ", i);
---		p += sprintf(p, "%6u ", mr->perfect_tx_time);
---
---		tp_max = minstrel_get_tp_avg(mr, MINSTREL_FRAC(100,100));
---		tp_avg = minstrel_get_tp_avg(mr, mrs->prob_avg);
---		eprob = MINSTREL_TRUNC(mrs->prob_avg * 1000);
---
---		p += sprintf(p, "%4u.%1u    %4u.%1u     %3u.%1u"
---				"     %3u   %3u %-3u   "
---				"%9llu   %-9llu\n",
---				tp_max / 10, tp_max % 10,
---				tp_avg / 10, tp_avg % 10,
---				eprob / 10, eprob % 10,
---				mrs->retry_count,
---				mrs->last_success,
---				mrs->last_attempts,
---				(unsigned long long)mrs->succ_hist,
---				(unsigned long long)mrs->att_hist);
---	}
---	p += sprintf(p, "\nTotal packet count::    ideal %d      "
---			"lookaround %d\n\n",
---			mi->total_packets - mi->sample_packets,
---			mi->sample_packets);
---	ms->len = p - ms->buf;
---
---	WARN_ON(ms->len + sizeof(*ms) > 2048);
---
---	return 0;
---}
---
---int
---minstrel_stats_csv_open(struct inode *inode, struct file *file)
---{
---	struct minstrel_sta_info *mi = inode->i_private;
---	struct minstrel_debugfs_info *ms;
---	unsigned int i, tp_max, tp_avg, eprob;
---	char *p;
---
---	ms = kmalloc(2048, GFP_KERNEL);
---	if (!ms)
---		return -ENOMEM;
---
---	file->private_data = ms;
---	p = ms->buf;
---
---	for (i = 0; i < mi->n_rates; i++) {
---		struct minstrel_rate *mr = &mi->r[i];
---		struct minstrel_rate_stats *mrs = &mi->r[i].stats;
---
---		p += sprintf(p, "%s" ,((i == mi->max_tp_rate[0]) ? "A" : ""));
---		p += sprintf(p, "%s" ,((i == mi->max_tp_rate[1]) ? "B" : ""));
---		p += sprintf(p, "%s" ,((i == mi->max_tp_rate[2]) ? "C" : ""));
---		p += sprintf(p, "%s" ,((i == mi->max_tp_rate[3]) ? "D" : ""));
---		p += sprintf(p, "%s" ,((i == mi->max_prob_rate) ? "P" : ""));
---
---		p += sprintf(p, ",%u%s", mr->bitrate / 2,
---				(mr->bitrate & 1 ? ".5," : ","));
---		p += sprintf(p, "%u,", i);
---		p += sprintf(p, "%u,",mr->perfect_tx_time);
---
---		tp_max = minstrel_get_tp_avg(mr, MINSTREL_FRAC(100,100));
---		tp_avg = minstrel_get_tp_avg(mr, mrs->prob_avg);
---		eprob = MINSTREL_TRUNC(mrs->prob_avg * 1000);
---
---		p += sprintf(p, "%u.%u,%u.%u,%u.%u,%u,%u,%u,"
---				"%llu,%llu,%d,%d\n",
---				tp_max / 10, tp_max % 10,
---				tp_avg / 10, tp_avg % 10,
---				eprob / 10, eprob % 10,
---				mrs->retry_count,
---				mrs->last_success,
---				mrs->last_attempts,
---				(unsigned long long)mrs->succ_hist,
---				(unsigned long long)mrs->att_hist,
---				mi->total_packets - mi->sample_packets,
---				mi->sample_packets);
---
---	}
---	ms->len = p - ms->buf;
---
---	WARN_ON(ms->len + sizeof(*ms) > 2048);
---
---	return 0;
---}
----- a/net/mac80211/rc80211_minstrel_ht.c
--+++ b/net/mac80211/rc80211_minstrel_ht.c
--@@ -13,7 +13,6 @@
-- #include <net/mac80211.h>
-- #include "rate.h"
-- #include "sta_info.h"
---#include "rc80211_minstrel.h"
-- #include "rc80211_minstrel_ht.h"
-- 
-- #define AVG_AMPDU_SIZE	16
--@@ -716,6 +715,83 @@ out:
-- 	mi->sample_mode = MINSTREL_SAMPLE_ACTIVE;
-- }
-- 
--+static inline int
--+minstrel_ewma(int old, int new, int weight)
--+{
--+	int diff, incr;
--+
--+	diff = new - old;
--+	incr = (EWMA_DIV - weight) * diff / EWMA_DIV;
--+
--+	return old + incr;
--+}
--+
--+static inline int minstrel_filter_avg_add(u16 *prev_1, u16 *prev_2, s32 in)
--+{
--+	s32 out_1 = *prev_1;
--+	s32 out_2 = *prev_2;
--+	s32 val;
--+
--+	if (!in)
--+		in += 1;
--+
--+	if (!out_1) {
--+		val = out_1 = in;
--+		goto out;
--+	}
--+
--+	val = MINSTREL_AVG_COEFF1 * in;
--+	val += MINSTREL_AVG_COEFF2 * out_1;
--+	val += MINSTREL_AVG_COEFF3 * out_2;
--+	val >>= MINSTREL_SCALE;
--+
--+	if (val > 1 << MINSTREL_SCALE)
--+		val = 1 << MINSTREL_SCALE;
--+	if (val < 0)
--+		val = 1;
--+
--+out:
--+	*prev_2 = out_1;
--+	*prev_1 = val;
--+
--+	return val;
--+}
--+
--+/*
--+* Recalculate statistics and counters of a given rate
--+*/
--+static void
--+minstrel_ht_calc_rate_stats(struct minstrel_priv *mp,
--+			    struct minstrel_rate_stats *mrs)
--+{
--+	unsigned int cur_prob;
--+
--+	if (unlikely(mrs->attempts > 0)) {
--+		mrs->sample_skipped = 0;
--+		cur_prob = MINSTREL_FRAC(mrs->success, mrs->attempts);
--+		if (mp->new_avg) {
--+			minstrel_filter_avg_add(&mrs->prob_avg,
--+						&mrs->prob_avg_1, cur_prob);
--+		} else if (unlikely(!mrs->att_hist)) {
--+			mrs->prob_avg = cur_prob;
--+		} else {
--+			/*update exponential weighted moving avarage */
--+			mrs->prob_avg = minstrel_ewma(mrs->prob_avg,
--+						      cur_prob,
--+						      EWMA_LEVEL);
--+		}
--+		mrs->att_hist += mrs->attempts;
--+		mrs->succ_hist += mrs->success;
--+	} else {
--+		mrs->sample_skipped++;
--+	}
--+
--+	mrs->last_success = mrs->success;
--+	mrs->last_attempts = mrs->attempts;
--+	mrs->success = 0;
--+	mrs->attempts = 0;
--+}
--+
-- /*
--  * Update rate statistics and select new primary rates
--  *
--@@ -808,7 +884,7 @@ minstrel_ht_update_stats(struct minstrel
-- 
-- 			mrs = &mg->rates[i];
-- 			mrs->retry_updated = false;
---			minstrel_calc_rate_stats(mp, mrs);
--+			minstrel_ht_calc_rate_stats(mp, mrs);
-- 			cur_prob = mrs->prob_avg;
-- 
-- 			if (minstrel_ht_get_tp_avg(mi, group, i, cur_prob) == 0)
--@@ -960,8 +1036,7 @@ minstrel_ht_tx_status(void *priv, struct
--                       void *priv_sta, struct ieee80211_tx_status *st)
-- {
-- 	struct ieee80211_tx_info *info = st->info;
---	struct minstrel_ht_sta_priv *msp = priv_sta;
---	struct minstrel_ht_sta *mi = &msp->ht;
--+	struct minstrel_ht_sta *mi = priv_sta;
-- 	struct ieee80211_tx_rate *ar = info->status.rates;
-- 	struct minstrel_rate_stats *rate, *rate2, *rate_sample = NULL;
-- 	struct minstrel_priv *mp = priv;
--@@ -1372,8 +1447,7 @@ minstrel_ht_get_rate(void *priv, struct
-- 	const struct mcs_group *sample_group;
-- 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(txrc->skb);
-- 	struct ieee80211_tx_rate *rate = &info->status.rates[0];
---	struct minstrel_ht_sta_priv *msp = priv_sta;
---	struct minstrel_ht_sta *mi = &msp->ht;
--+	struct minstrel_ht_sta *mi = priv_sta;
-- 	struct minstrel_priv *mp = priv;
-- 	int sample_idx;
-- 
--@@ -1484,8 +1558,7 @@ minstrel_ht_update_caps(void *priv, stru
-- 			struct ieee80211_sta *sta, void *priv_sta)
-- {
-- 	struct minstrel_priv *mp = priv;
---	struct minstrel_ht_sta_priv *msp = priv_sta;
---	struct minstrel_ht_sta *mi = &msp->ht;
--+	struct minstrel_ht_sta *mi = priv_sta;
-- 	struct ieee80211_mcs_info *mcs = &sta->ht_cap.mcs;
-- 	u16 ht_cap = sta->ht_cap.cap;
-- 	struct ieee80211_sta_vht_cap *vht_cap = &sta->vht_cap;
--@@ -1647,7 +1720,7 @@ static void *
-- minstrel_ht_alloc_sta(void *priv, struct ieee80211_sta *sta, gfp_t gfp)
-- {
-- 	struct ieee80211_supported_band *sband;
---	struct minstrel_ht_sta_priv *msp;
--+	struct minstrel_ht_sta *mi;
-- 	struct minstrel_priv *mp = priv;
-- 	struct ieee80211_hw *hw = mp->hw;
-- 	int max_rates = 0;
--@@ -1659,35 +1732,13 @@ minstrel_ht_alloc_sta(void *priv, struct
-- 			max_rates = sband->n_bitrates;
-- 	}
-- 
---	msp = kzalloc(sizeof(*msp), gfp);
---	if (!msp)
---		return NULL;
---
---	msp->ratelist = kcalloc(max_rates, sizeof(struct minstrel_rate), gfp);
---	if (!msp->ratelist)
---		goto error;
---
---	msp->sample_table = kmalloc_array(max_rates, SAMPLE_COLUMNS, gfp);
---	if (!msp->sample_table)
---		goto error1;
---
---	return msp;
---
---error1:
---	kfree(msp->ratelist);
---error:
---	kfree(msp);
---	return NULL;
--+	return kzalloc(sizeof(*mi), gfp);
-- }
-- 
-- static void
-- minstrel_ht_free_sta(void *priv, struct ieee80211_sta *sta, void *priv_sta)
-- {
---	struct minstrel_ht_sta_priv *msp = priv_sta;
---
---	kfree(msp->sample_table);
---	kfree(msp->ratelist);
---	kfree(msp);
--+	kfree(priv_sta);
-- }
-- 
-- static void
--@@ -1768,12 +1819,6 @@ minstrel_ht_alloc(struct ieee80211_hw *h
-- 	mp->cw_min = 15;
-- 	mp->cw_max = 1023;
-- 
---	/* number of packets (in %) to use for sampling other rates
---	 * sample less often for non-mrr packets, because the overhead
---	 * is much higher than with mrr */
---	mp->lookaround_rate = 5;
---	mp->lookaround_rate_mrr = 10;
---
-- 	/* maximum time that the hw is allowed to stay in one MRR segment */
-- 	mp->segment_size = 6000;
-- 
--@@ -1821,8 +1866,7 @@ minstrel_ht_free(void *priv)
-- 
-- static u32 minstrel_ht_get_expected_throughput(void *priv_sta)
-- {
---	struct minstrel_ht_sta_priv *msp = priv_sta;
---	struct minstrel_ht_sta *mi = &msp->ht;
--+	struct minstrel_ht_sta *mi = priv_sta;
-- 	int i, j, prob, tp_avg;
-- 
-- 	i = mi->max_tp_rate[0] / MCS_GROUP_RATES;
----- a/net/mac80211/rc80211_minstrel_ht.h
--+++ b/net/mac80211/rc80211_minstrel_ht.h
--@@ -6,6 +6,33 @@
-- #ifndef __RC_MINSTREL_HT_H
-- #define __RC_MINSTREL_HT_H
-- 
--+/* number of highest throughput rates to consider*/
--+#define MAX_THR_RATES 4
--+#define SAMPLE_COLUMNS	10	/* number of columns in sample table */
--+
--+/* scaled fraction values */
--+#define MINSTREL_SCALE  12
--+#define MINSTREL_FRAC(val, div) (((val) << MINSTREL_SCALE) / div)
--+#define MINSTREL_TRUNC(val) ((val) >> MINSTREL_SCALE)
--+
--+#define EWMA_LEVEL	96	/* ewma weighting factor [/EWMA_DIV] */
--+#define EWMA_DIV	128
--+
--+/*
--+ * Coefficients for moving average with noise filter (period=16),
--+ * scaled by 10 bits
--+ *
--+ * a1 = exp(-pi * sqrt(2) / period)
--+ * coeff2 = 2 * a1 * cos(sqrt(2) * 2 * pi / period)
--+ * coeff3 = -sqr(a1)
--+ * coeff1 = 1 - coeff2 - coeff3
--+ */
--+#define MINSTREL_AVG_COEFF1		(MINSTREL_FRAC(1, 1) - \
--+					 MINSTREL_AVG_COEFF2 - \
--+					 MINSTREL_AVG_COEFF3)
--+#define MINSTREL_AVG_COEFF2		0x00001499
--+#define MINSTREL_AVG_COEFF3		-0x0000092e
--+
-- /*
--  * The number of streams can be changed to 2 to reduce code
--  * size and memory footprint.
--@@ -30,6 +57,32 @@
-- 
-- #define MCS_GROUP_RATES		10
-- 
--+struct minstrel_priv {
--+	struct ieee80211_hw *hw;
--+	bool has_mrr;
--+	bool new_avg;
--+	u32 sample_switch;
--+	unsigned int cw_min;
--+	unsigned int cw_max;
--+	unsigned int max_retry;
--+	unsigned int segment_size;
--+	unsigned int update_interval;
--+
--+	u8 cck_rates[4];
--+	u8 ofdm_rates[NUM_NL80211_BANDS][8];
--+
--+#ifdef CPTCFG_MAC80211_DEBUGFS
--+	/*
--+	 * enable fixed rate processing per RC
--+	 *   - write static index to debugfs:ieee80211/phyX/rc/fixed_rate_idx
--+	 *   - write -1 to enable RC processing again
--+	 *   - setting will be applied on next update
--+	 */
--+	u32 fixed_rate_idx;
--+#endif
--+};
--+
--+
-- struct mcs_group {
-- 	u16 flags;
-- 	u8 streams;
--@@ -42,6 +95,26 @@ extern const s16 minstrel_cck_bitrates[4
-- extern const s16 minstrel_ofdm_bitrates[8];
-- extern const struct mcs_group minstrel_mcs_groups[];
-- 
--+struct minstrel_rate_stats {
--+	/* current / last sampling period attempts/success counters */
--+	u16 attempts, last_attempts;
--+	u16 success, last_success;
--+
--+	/* total attempts/success counters */
--+	u32 att_hist, succ_hist;
--+
--+	/* prob_avg - moving average of prob */
--+	u16 prob_avg;
--+	u16 prob_avg_1;
--+
--+	/* maximum retry counts */
--+	u8 retry_count;
--+	u8 retry_count_rtscts;
--+
--+	u8 sample_skipped;
--+	bool retry_updated;
--+};
--+
-- struct minstrel_mcs_group_data {
-- 	u8 index;
-- 	u8 column;
--@@ -111,12 +184,6 @@ struct minstrel_ht_sta {
-- 	struct minstrel_mcs_group_data groups[MINSTREL_GROUPS_NB];
-- };
-- 
---struct minstrel_ht_sta_priv {
---	struct minstrel_ht_sta ht;
---	void *ratelist;
---	void *sample_table;
---};
---
-- void minstrel_ht_add_sta_debugfs(void *priv, void *priv_sta, struct dentry *dir);
-- int minstrel_ht_get_tp_avg(struct minstrel_ht_sta *mi, int group, int rate,
-- 			   int prob_avg);
----- a/net/mac80211/rc80211_minstrel_ht_debugfs.c
--+++ b/net/mac80211/rc80211_minstrel_ht_debugfs.c
--@@ -9,9 +9,13 @@
-- #include <linux/ieee80211.h>
-- #include <linux/export.h>
-- #include <net/mac80211.h>
---#include "rc80211_minstrel.h"
-- #include "rc80211_minstrel_ht.h"
-- 
--+struct minstrel_debugfs_info {
--+	size_t len;
--+	char buf[];
--+};
--+
-- static ssize_t
-- minstrel_stats_read(struct file *file, char __user *buf, size_t len, loff_t *ppos)
-- {
--@@ -127,8 +131,7 @@ minstrel_ht_stats_dump(struct minstrel_h
-- static int
-- minstrel_ht_stats_open(struct inode *inode, struct file *file)
-- {
---	struct minstrel_ht_sta_priv *msp = inode->i_private;
---	struct minstrel_ht_sta *mi = &msp->ht;
--+	struct minstrel_ht_sta *mi = inode->i_private;
-- 	struct minstrel_debugfs_info *ms;
-- 	unsigned int i;
-- 	char *p;
--@@ -276,8 +279,7 @@ minstrel_ht_stats_csv_dump(struct minstr
-- static int
-- minstrel_ht_stats_csv_open(struct inode *inode, struct file *file)
-- {
---	struct minstrel_ht_sta_priv *msp = inode->i_private;
---	struct minstrel_ht_sta *mi = &msp->ht;
--+	struct minstrel_ht_sta *mi = inode->i_private;
-- 	struct minstrel_debugfs_info *ms;
-- 	unsigned int i;
-- 	char *p;
--@@ -313,10 +315,8 @@ static const struct file_operations mins
-- void
-- minstrel_ht_add_sta_debugfs(void *priv, void *priv_sta, struct dentry *dir)
-- {
---	struct minstrel_ht_sta_priv *msp = priv_sta;
---
---	debugfs_create_file("rc_stats", 0444, dir, msp,
--+	debugfs_create_file("rc_stats", 0444, dir, priv_sta,
-- 			    &minstrel_ht_stat_fops);
---	debugfs_create_file("rc_stats_csv", 0444, dir, msp,
--+	debugfs_create_file("rc_stats_csv", 0444, dir, priv_sta,
-- 			    &minstrel_ht_stat_csv_fops);
-- }
-diff --git a/package/kernel/mac80211/patches/subsys/340-mac80211-minstrel_ht-remove-old-ewma-based-rate-aver.patch b/package/kernel/mac80211/patches/subsys/340-mac80211-minstrel_ht-remove-old-ewma-based-rate-aver.patch
-deleted file mode 100644
-index 9b6a614aa8..0000000000
---- a/package/kernel/mac80211/patches/subsys/340-mac80211-minstrel_ht-remove-old-ewma-based-rate-aver.patch
-+++ /dev/null
-@@ -1,96 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Sat, 26 Dec 2020 14:34:30 +0100
--Subject: [PATCH] mac80211: minstrel_ht: remove old ewma based rate average
-- code
--
--The new noise filter has been the default for a while now with no reported
--downside and significant improvement compared to the old code.
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/rc80211_minstrel_ht.c
--+++ b/net/mac80211/rc80211_minstrel_ht.c
--@@ -769,17 +769,8 @@ minstrel_ht_calc_rate_stats(struct minst
-- 	if (unlikely(mrs->attempts > 0)) {
-- 		mrs->sample_skipped = 0;
-- 		cur_prob = MINSTREL_FRAC(mrs->success, mrs->attempts);
---		if (mp->new_avg) {
---			minstrel_filter_avg_add(&mrs->prob_avg,
---						&mrs->prob_avg_1, cur_prob);
---		} else if (unlikely(!mrs->att_hist)) {
---			mrs->prob_avg = cur_prob;
---		} else {
---			/*update exponential weighted moving avarage */
---			mrs->prob_avg = minstrel_ewma(mrs->prob_avg,
---						      cur_prob,
---						      EWMA_LEVEL);
---		}
--+		minstrel_filter_avg_add(&mrs->prob_avg,
--+					&mrs->prob_avg_1, cur_prob);
-- 		mrs->att_hist += mrs->attempts;
-- 		mrs->succ_hist += mrs->success;
-- 	} else {
--@@ -913,10 +904,8 @@ minstrel_ht_update_stats(struct minstrel
-- 	/* Try to increase robustness of max_prob_rate*/
-- 	minstrel_ht_prob_rate_reduce_streams(mi);
-- 
---	/* try to sample all available rates during each interval */
---	mi->sample_count *= 8;
---	if (mp->new_avg)
---		mi->sample_count /= 2;
--+	/* try to sample half of all available rates during each interval */
--+	mi->sample_count *= 4;
-- 
-- 	if (sample)
-- 		minstrel_ht_rate_sample_switch(mp, mi);
--@@ -1040,7 +1029,7 @@ minstrel_ht_tx_status(void *priv, struct
-- 	struct ieee80211_tx_rate *ar = info->status.rates;
-- 	struct minstrel_rate_stats *rate, *rate2, *rate_sample = NULL;
-- 	struct minstrel_priv *mp = priv;
---	u32 update_interval = mp->update_interval / 2;
--+	u32 update_interval = mp->update_interval;
-- 	bool last, update = false;
-- 	bool sample_status = false;
-- 	int i;
--@@ -1090,9 +1079,8 @@ minstrel_ht_tx_status(void *priv, struct
-- 
-- 	switch (mi->sample_mode) {
-- 	case MINSTREL_SAMPLE_IDLE:
---		if (mp->new_avg &&
---		    (mp->hw->max_rates > 1 ||
---		     mi->total_packets_cur < SAMPLE_SWITCH_THR))
--+		if (mp->hw->max_rates > 1 ||
--+		     mi->total_packets_cur < SAMPLE_SWITCH_THR)
-- 			update_interval /= 2;
-- 		break;
-- 
--@@ -1832,8 +1820,7 @@ minstrel_ht_alloc(struct ieee80211_hw *h
-- 		mp->has_mrr = true;
-- 
-- 	mp->hw = hw;
---	mp->update_interval = HZ / 10;
---	mp->new_avg = true;
--+	mp->update_interval = HZ / 20;
-- 
-- 	minstrel_ht_init_cck_rates(mp);
-- 	for (i = 0; i < ARRAY_SIZE(mp->hw->wiphy->bands); i++)
--@@ -1853,8 +1840,6 @@ static void minstrel_ht_add_debugfs(stru
-- 			   &mp->fixed_rate_idx);
-- 	debugfs_create_u32("sample_switch", S_IRUGO | S_IWUSR, debugfsdir,
-- 			   &mp->sample_switch);
---	debugfs_create_bool("new_avg", S_IRUGO | S_IWUSR, debugfsdir,
---			   &mp->new_avg);
-- }
-- #endif
-- 
----- a/net/mac80211/rc80211_minstrel_ht.h
--+++ b/net/mac80211/rc80211_minstrel_ht.h
--@@ -60,7 +60,6 @@
-- struct minstrel_priv {
-- 	struct ieee80211_hw *hw;
-- 	bool has_mrr;
---	bool new_avg;
-- 	u32 sample_switch;
-- 	unsigned int cw_min;
-- 	unsigned int cw_max;
-diff --git a/package/kernel/mac80211/patches/subsys/341-mac80211-minstrel_ht-improve-ampdu-length-estimation.patch b/package/kernel/mac80211/patches/subsys/341-mac80211-minstrel_ht-improve-ampdu-length-estimation.patch
-deleted file mode 100644
-index a8e6e89954..0000000000
---- a/package/kernel/mac80211/patches/subsys/341-mac80211-minstrel_ht-improve-ampdu-length-estimation.patch
-+++ /dev/null
-@@ -1,67 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Sat, 26 Dec 2020 19:08:19 +0100
--Subject: [PATCH] mac80211: minstrel_ht: improve ampdu length estimation
--
--If the driver does not report A-MPDU length, estimate it based on the rate.
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/rc80211_minstrel_ht.c
--+++ b/net/mac80211/rc80211_minstrel_ht.c
--@@ -382,13 +382,37 @@ minstrel_get_ratestats(struct minstrel_h
-- 	return &mi->groups[index / MCS_GROUP_RATES].rates[index % MCS_GROUP_RATES];
-- }
-- 
--+static inline int
--+minstrel_get_duration(int index)
--+{
--+	const struct mcs_group *group = &minstrel_mcs_groups[index / MCS_GROUP_RATES];
--+	unsigned int duration = group->duration[index % MCS_GROUP_RATES];
--+	return duration << group->shift;
--+}
--+
-- static unsigned int
-- minstrel_ht_avg_ampdu_len(struct minstrel_ht_sta *mi)
-- {
---	if (!mi->avg_ampdu_len)
---		return AVG_AMPDU_SIZE;
--+	int duration;
--+
--+	if (mi->avg_ampdu_len)
--+		return MINSTREL_TRUNC(mi->avg_ampdu_len);
--+
--+	if (minstrel_ht_is_legacy_group(mi->max_tp_rate[0] / MCS_GROUP_RATES))
--+		return 1;
--+
--+	duration = minstrel_get_duration(mi->max_tp_rate[0]);
-- 
---	return MINSTREL_TRUNC(mi->avg_ampdu_len);
--+	if (duration > 400 * 1000)
--+		return 2;
--+
--+	if (duration > 250 * 1000)
--+		return 4;
--+
--+	if (duration > 150 * 1000)
--+		return 8;
--+
--+	return 16;
-- }
-- 
-- /*
--@@ -588,14 +612,6 @@ minstrel_ht_prob_rate_reduce_streams(str
-- 	}
-- }
-- 
---static inline int
---minstrel_get_duration(int index)
---{
---	const struct mcs_group *group = &minstrel_mcs_groups[index / MCS_GROUP_RATES];
---	unsigned int duration = group->duration[index % MCS_GROUP_RATES];
---	return duration << group->shift;
---}
---
-- static bool
-- minstrel_ht_probe_group(struct minstrel_ht_sta *mi, const struct mcs_group *tp_group,
-- 						int tp_idx, const struct mcs_group *group)
-diff --git a/package/kernel/mac80211/patches/subsys/342-mac80211-minstrel_ht-improve-sample-rate-selection.patch b/package/kernel/mac80211/patches/subsys/342-mac80211-minstrel_ht-improve-sample-rate-selection.patch
-deleted file mode 100644
-index e084525235..0000000000
---- a/package/kernel/mac80211/patches/subsys/342-mac80211-minstrel_ht-improve-sample-rate-selection.patch
-+++ /dev/null
-@@ -1,31 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Sat, 26 Dec 2020 19:12:22 +0100
--Subject: [PATCH] mac80211: minstrel_ht: improve sample rate selection
--
--Always allow sampling of rates faster than the primary max throughput rate.
--When the second max_tp_rate is higher than the first one, sample attempts were
--previously skipped, potentially causing rate control to get stuck at a slightly
--lower rate
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/rc80211_minstrel_ht.c
--+++ b/net/mac80211/rc80211_minstrel_ht.c
--@@ -1379,13 +1379,13 @@ minstrel_get_sample_rate(struct minstrel
-- 	mrs = &mg->rates[sample_idx];
-- 	sample_idx += sample_group * MCS_GROUP_RATES;
-- 
---	/* Set tp_rate1, tp_rate2 to the highest / second highest max_tp_rate */
--+	tp_rate1 = mi->max_tp_rate[0];
--+
--+	/* Set tp_rate2 to the second highest max_tp_rate */
-- 	if (minstrel_get_duration(mi->max_tp_rate[0]) >
-- 	    minstrel_get_duration(mi->max_tp_rate[1])) {
---		tp_rate1 = mi->max_tp_rate[1];
-- 		tp_rate2 = mi->max_tp_rate[0];
-- 	} else {
---		tp_rate1 = mi->max_tp_rate[0];
-- 		tp_rate2 = mi->max_tp_rate[1];
-- 	}
-- 
-diff --git a/package/kernel/mac80211/patches/subsys/343-mac80211-minstrel_ht-fix-max-probability-rate-select.patch b/package/kernel/mac80211/patches/subsys/343-mac80211-minstrel_ht-fix-max-probability-rate-select.patch
-deleted file mode 100644
-index 0dbfa9d4fb..0000000000
---- a/package/kernel/mac80211/patches/subsys/343-mac80211-minstrel_ht-fix-max-probability-rate-select.patch
-+++ /dev/null
-@@ -1,124 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Sat, 26 Dec 2020 19:09:08 +0100
--Subject: [PATCH] mac80211: minstrel_ht: fix max probability rate selection
--
--- do not select rates faster than the max throughput rate if probability is lower
--- reset previous rate before sorting again
--
--This ensures that the max prob rate gets set to a more reliable rate
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/rc80211_minstrel_ht.c
--+++ b/net/mac80211/rc80211_minstrel_ht.c
--@@ -495,12 +495,13 @@ minstrel_ht_sort_best_tp_rates(struct mi
--  * Find and set the topmost probability rate per sta and per group
--  */
-- static void
---minstrel_ht_set_best_prob_rate(struct minstrel_ht_sta *mi, u16 index)
--+minstrel_ht_set_best_prob_rate(struct minstrel_ht_sta *mi, u16 *dest, u16 index)
-- {
-- 	struct minstrel_mcs_group_data *mg;
-- 	struct minstrel_rate_stats *mrs;
-- 	int tmp_group, tmp_idx, tmp_tp_avg, tmp_prob;
---	int max_tp_group, cur_tp_avg, cur_group, cur_idx;
--+	int max_tp_group, max_tp_idx, max_tp_prob;
--+	int cur_tp_avg, cur_group, cur_idx;
-- 	int max_gpr_group, max_gpr_idx;
-- 	int max_gpr_tp_avg, max_gpr_prob;
-- 
--@@ -509,18 +510,26 @@ minstrel_ht_set_best_prob_rate(struct mi
-- 	mg = &mi->groups[index / MCS_GROUP_RATES];
-- 	mrs = &mg->rates[index % MCS_GROUP_RATES];
-- 
---	tmp_group = mi->max_prob_rate / MCS_GROUP_RATES;
---	tmp_idx = mi->max_prob_rate % MCS_GROUP_RATES;
--+	tmp_group = *dest / MCS_GROUP_RATES;
--+	tmp_idx = *dest % MCS_GROUP_RATES;
-- 	tmp_prob = mi->groups[tmp_group].rates[tmp_idx].prob_avg;
-- 	tmp_tp_avg = minstrel_ht_get_tp_avg(mi, tmp_group, tmp_idx, tmp_prob);
-- 
-- 	/* if max_tp_rate[0] is from MCS_GROUP max_prob_rate get selected from
-- 	 * MCS_GROUP as well as CCK_GROUP rates do not allow aggregation */
-- 	max_tp_group = mi->max_tp_rate[0] / MCS_GROUP_RATES;
--+	max_tp_idx = mi->max_tp_rate[0] % MCS_GROUP_RATES;
--+	max_tp_prob = mi->groups[max_tp_group].rates[max_tp_idx].prob_avg;
--+
-- 	if (minstrel_ht_is_legacy_group(index / MCS_GROUP_RATES) &&
-- 	    !minstrel_ht_is_legacy_group(max_tp_group))
-- 		return;
-- 
--+	/* skip rates faster than max tp rate with lower prob */
--+	if (minstrel_get_duration(mi->max_tp_rate[0]) > minstrel_get_duration(index) &&
--+	    mrs->prob_avg < max_tp_prob)
--+		return;
--+
-- 	max_gpr_group = mg->max_group_prob_rate / MCS_GROUP_RATES;
-- 	max_gpr_idx = mg->max_group_prob_rate % MCS_GROUP_RATES;
-- 	max_gpr_prob = mi->groups[max_gpr_group].rates[max_gpr_idx].prob_avg;
--@@ -538,7 +547,7 @@ minstrel_ht_set_best_prob_rate(struct mi
-- 			mg->max_group_prob_rate = index;
-- 	} else {
-- 		if (mrs->prob_avg > tmp_prob)
---			mi->max_prob_rate = index;
--+			*dest = index;
-- 		if (mrs->prob_avg > max_gpr_prob)
-- 			mg->max_group_prob_rate = index;
-- 	}
--@@ -816,7 +825,8 @@ minstrel_ht_update_stats(struct minstrel
-- 	struct minstrel_rate_stats *mrs;
-- 	int group, i, j, cur_prob;
-- 	u16 tmp_mcs_tp_rate[MAX_THR_RATES], tmp_group_tp_rate[MAX_THR_RATES];
---	u16 tmp_legacy_tp_rate[MAX_THR_RATES], index;
--+	u16 tmp_legacy_tp_rate[MAX_THR_RATES], tmp_max_prob_rate;
--+	u16 index;
-- 	bool ht_supported = mi->sta->ht_cap.ht_supported;
-- 
-- 	mi->sample_mode = MINSTREL_SAMPLE_IDLE;
--@@ -863,6 +873,7 @@ minstrel_ht_update_stats(struct minstrel
-- 	else
-- 		index = MINSTREL_OFDM_GROUP * MCS_GROUP_RATES;
-- 
--+	tmp_max_prob_rate = index;
-- 	for (j = 0; j < ARRAY_SIZE(tmp_mcs_tp_rate); j++)
-- 		tmp_mcs_tp_rate[j] = index;
-- 
--@@ -903,9 +914,6 @@ minstrel_ht_update_stats(struct minstrel
-- 			/* Find max throughput rate set within a group */
-- 			minstrel_ht_sort_best_tp_rates(mi, index,
-- 						       tmp_group_tp_rate);
---
---			/* Find max probability rate per group and global */
---			minstrel_ht_set_best_prob_rate(mi, index);
-- 		}
-- 
-- 		memcpy(mg->max_group_tp_rate, tmp_group_tp_rate,
--@@ -917,6 +925,27 @@ minstrel_ht_update_stats(struct minstrel
-- 					 tmp_legacy_tp_rate);
-- 	memcpy(mi->max_tp_rate, tmp_mcs_tp_rate, sizeof(mi->max_tp_rate));
-- 
--+	for (group = 0; group < ARRAY_SIZE(minstrel_mcs_groups); group++) {
--+		if (!mi->supported[group])
--+			continue;
--+
--+		mg = &mi->groups[group];
--+		mg->max_group_prob_rate = MCS_GROUP_RATES * group;
--+
--+		for (i = 0; i < MCS_GROUP_RATES; i++) {
--+			if (!(mi->supported[group] & BIT(i)))
--+				continue;
--+
--+			index = MCS_GROUP_RATES * group + i;
--+
--+			/* Find max probability rate per group and global */
--+			minstrel_ht_set_best_prob_rate(mi, &tmp_max_prob_rate,
--+						       index);
--+		}
--+	}
--+
--+	mi->max_prob_rate = tmp_max_prob_rate;
--+
-- 	/* Try to increase robustness of max_prob_rate*/
-- 	minstrel_ht_prob_rate_reduce_streams(mi);
-- 
-diff --git a/package/kernel/mac80211/patches/subsys/344-mac80211-minstrel_ht-increase-stats-update-interval.patch b/package/kernel/mac80211/patches/subsys/344-mac80211-minstrel_ht-increase-stats-update-interval.patch
-deleted file mode 100644
-index 9972a9414e..0000000000
---- a/package/kernel/mac80211/patches/subsys/344-mac80211-minstrel_ht-increase-stats-update-interval.patch
-+++ /dev/null
-@@ -1,20 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Sat, 26 Dec 2020 19:14:58 +0100
--Subject: [PATCH] mac80211: minstrel_ht: increase stats update interval
--
--The shorter interval was leading to too many frames being used for probing
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/rc80211_minstrel_ht.c
--+++ b/net/mac80211/rc80211_minstrel_ht.c
--@@ -1865,7 +1865,7 @@ minstrel_ht_alloc(struct ieee80211_hw *h
-- 		mp->has_mrr = true;
-- 
-- 	mp->hw = hw;
---	mp->update_interval = HZ / 20;
--+	mp->update_interval = HZ / 10;
-- 
-- 	minstrel_ht_init_cck_rates(mp);
-- 	for (i = 0; i < ARRAY_SIZE(mp->hw->wiphy->bands); i++)
-diff --git a/package/kernel/mac80211/patches/subsys/345-mac80211-minstrel_ht-fix-rounding-error-in-throughpu.patch b/package/kernel/mac80211/patches/subsys/345-mac80211-minstrel_ht-fix-rounding-error-in-throughpu.patch
-deleted file mode 100644
-index 1df5dec039..0000000000
---- a/package/kernel/mac80211/patches/subsys/345-mac80211-minstrel_ht-fix-rounding-error-in-throughpu.patch
-+++ /dev/null
-@@ -1,34 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Fri, 15 Jan 2021 12:15:06 +0100
--Subject: [PATCH] mac80211: minstrel_ht: fix rounding error in throughput
-- calculation
--
--On lower data rates, the throughput calculation has a significant rounding
--error, causing rates like 48M and 54M OFDM to share the same throughput
--value with >= 90% success probablity.
--
--This is because the result of the division (prob_avg * 1000) / nsecs
--is really small (8 in this example).
--
--Improve accuracy by moving over some zeroes, making better use of the full
--range of u32 before the division.
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/rc80211_minstrel_ht.c
--+++ b/net/mac80211/rc80211_minstrel_ht.c
--@@ -445,10 +445,9 @@ minstrel_ht_get_tp_avg(struct minstrel_h
-- 	 * (prob is scaled - see MINSTREL_FRAC above)
-- 	 */
-- 	if (prob_avg > MINSTREL_FRAC(90, 100))
---		return MINSTREL_TRUNC(100000 * ((MINSTREL_FRAC(90, 100) * 1000)
---								      / nsecs));
---	else
---		return MINSTREL_TRUNC(100000 * ((prob_avg * 1000) / nsecs));
--+		prob_avg = MINSTREL_FRAC(90, 100);
--+
--+	return MINSTREL_TRUNC(100 * ((prob_avg * 1000000) / nsecs));
-- }
-- 
-- /*
-diff --git a/package/kernel/mac80211/patches/subsys/346-mac80211-minstrel_ht-use-bitfields-to-encode-rate-in.patch b/package/kernel/mac80211/patches/subsys/346-mac80211-minstrel_ht-use-bitfields-to-encode-rate-in.patch
-deleted file mode 100644
-index 6aa6f0ed93..0000000000
---- a/package/kernel/mac80211/patches/subsys/346-mac80211-minstrel_ht-use-bitfields-to-encode-rate-in.patch
-+++ /dev/null
-@@ -1,412 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Thu, 21 Jan 2021 18:29:30 +0100
--Subject: [PATCH] mac80211: minstrel_ht: use bitfields to encode rate
-- indexes
--
--Get rid of a lot of divisions and modulo operations
--Reduces code size and improves performance
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/rc80211_minstrel_ht.c
--+++ b/net/mac80211/rc80211_minstrel_ht.c
--@@ -379,14 +379,14 @@ out:
-- static inline struct minstrel_rate_stats *
-- minstrel_get_ratestats(struct minstrel_ht_sta *mi, int index)
-- {
---	return &mi->groups[index / MCS_GROUP_RATES].rates[index % MCS_GROUP_RATES];
--+	return &mi->groups[MI_RATE_GROUP(index)].rates[MI_RATE_IDX(index)];
-- }
-- 
---static inline int
---minstrel_get_duration(int index)
--+static inline int minstrel_get_duration(int index)
-- {
---	const struct mcs_group *group = &minstrel_mcs_groups[index / MCS_GROUP_RATES];
---	unsigned int duration = group->duration[index % MCS_GROUP_RATES];
--+	const struct mcs_group *group = &minstrel_mcs_groups[MI_RATE_GROUP(index)];
--+	unsigned int duration = group->duration[MI_RATE_IDX(index)];
--+
-- 	return duration << group->shift;
-- }
-- 
--@@ -398,7 +398,7 @@ minstrel_ht_avg_ampdu_len(struct minstre
-- 	if (mi->avg_ampdu_len)
-- 		return MINSTREL_TRUNC(mi->avg_ampdu_len);
-- 
---	if (minstrel_ht_is_legacy_group(mi->max_tp_rate[0] / MCS_GROUP_RATES))
--+	if (minstrel_ht_is_legacy_group(MI_RATE_GROUP(mi->max_tp_rate[0])))
-- 		return 1;
-- 
-- 	duration = minstrel_get_duration(mi->max_tp_rate[0]);
--@@ -465,14 +465,14 @@ minstrel_ht_sort_best_tp_rates(struct mi
-- 	int tmp_group, tmp_idx, tmp_tp_avg, tmp_prob;
-- 	int j = MAX_THR_RATES;
-- 
---	cur_group = index / MCS_GROUP_RATES;
---	cur_idx = index  % MCS_GROUP_RATES;
--+	cur_group = MI_RATE_GROUP(index);
--+	cur_idx = MI_RATE_IDX(index);
-- 	cur_prob = mi->groups[cur_group].rates[cur_idx].prob_avg;
-- 	cur_tp_avg = minstrel_ht_get_tp_avg(mi, cur_group, cur_idx, cur_prob);
-- 
-- 	do {
---		tmp_group = tp_list[j - 1] / MCS_GROUP_RATES;
---		tmp_idx = tp_list[j - 1] % MCS_GROUP_RATES;
--+		tmp_group = MI_RATE_GROUP(tp_list[j - 1]);
--+		tmp_idx = MI_RATE_IDX(tp_list[j - 1]);
-- 		tmp_prob = mi->groups[tmp_group].rates[tmp_idx].prob_avg;
-- 		tmp_tp_avg = minstrel_ht_get_tp_avg(mi, tmp_group, tmp_idx,
-- 						    tmp_prob);
--@@ -504,23 +504,23 @@ minstrel_ht_set_best_prob_rate(struct mi
-- 	int max_gpr_group, max_gpr_idx;
-- 	int max_gpr_tp_avg, max_gpr_prob;
-- 
---	cur_group = index / MCS_GROUP_RATES;
---	cur_idx = index % MCS_GROUP_RATES;
---	mg = &mi->groups[index / MCS_GROUP_RATES];
---	mrs = &mg->rates[index % MCS_GROUP_RATES];
--+	cur_group = MI_RATE_GROUP(index);
--+	cur_idx = MI_RATE_IDX(index);
--+	mg = &mi->groups[cur_group];
--+	mrs = &mg->rates[cur_idx];
-- 
---	tmp_group = *dest / MCS_GROUP_RATES;
---	tmp_idx = *dest % MCS_GROUP_RATES;
--+	tmp_group = MI_RATE_GROUP(*dest);
--+	tmp_idx = MI_RATE_IDX(*dest);
-- 	tmp_prob = mi->groups[tmp_group].rates[tmp_idx].prob_avg;
-- 	tmp_tp_avg = minstrel_ht_get_tp_avg(mi, tmp_group, tmp_idx, tmp_prob);
-- 
-- 	/* if max_tp_rate[0] is from MCS_GROUP max_prob_rate get selected from
-- 	 * MCS_GROUP as well as CCK_GROUP rates do not allow aggregation */
---	max_tp_group = mi->max_tp_rate[0] / MCS_GROUP_RATES;
---	max_tp_idx = mi->max_tp_rate[0] % MCS_GROUP_RATES;
--+	max_tp_group = MI_RATE_GROUP(mi->max_tp_rate[0]);
--+	max_tp_idx = MI_RATE_IDX(mi->max_tp_rate[0]);
-- 	max_tp_prob = mi->groups[max_tp_group].rates[max_tp_idx].prob_avg;
-- 
---	if (minstrel_ht_is_legacy_group(index / MCS_GROUP_RATES) &&
--+	if (minstrel_ht_is_legacy_group(MI_RATE_GROUP(index)) &&
-- 	    !minstrel_ht_is_legacy_group(max_tp_group))
-- 		return;
-- 
--@@ -529,8 +529,8 @@ minstrel_ht_set_best_prob_rate(struct mi
-- 	    mrs->prob_avg < max_tp_prob)
-- 		return;
-- 
---	max_gpr_group = mg->max_group_prob_rate / MCS_GROUP_RATES;
---	max_gpr_idx = mg->max_group_prob_rate % MCS_GROUP_RATES;
--+	max_gpr_group = MI_RATE_GROUP(mg->max_group_prob_rate);
--+	max_gpr_idx = MI_RATE_IDX(mg->max_group_prob_rate);
-- 	max_gpr_prob = mi->groups[max_gpr_group].rates[max_gpr_idx].prob_avg;
-- 
-- 	if (mrs->prob_avg > MINSTREL_FRAC(75, 100)) {
--@@ -567,13 +567,13 @@ minstrel_ht_assign_best_tp_rates(struct
-- 	unsigned int tmp_group, tmp_idx, tmp_cck_tp, tmp_mcs_tp, tmp_prob;
-- 	int i;
-- 
---	tmp_group = tmp_legacy_tp_rate[0] / MCS_GROUP_RATES;
---	tmp_idx = tmp_legacy_tp_rate[0] % MCS_GROUP_RATES;
--+	tmp_group = MI_RATE_GROUP(tmp_legacy_tp_rate[0]);
--+	tmp_idx = MI_RATE_IDX(tmp_legacy_tp_rate[0]);
-- 	tmp_prob = mi->groups[tmp_group].rates[tmp_idx].prob_avg;
-- 	tmp_cck_tp = minstrel_ht_get_tp_avg(mi, tmp_group, tmp_idx, tmp_prob);
-- 
---	tmp_group = tmp_mcs_tp_rate[0] / MCS_GROUP_RATES;
---	tmp_idx = tmp_mcs_tp_rate[0] % MCS_GROUP_RATES;
--+	tmp_group = MI_RATE_GROUP(tmp_mcs_tp_rate[0]);
--+	tmp_idx = MI_RATE_IDX(tmp_mcs_tp_rate[0]);
-- 	tmp_prob = mi->groups[tmp_group].rates[tmp_idx].prob_avg;
-- 	tmp_mcs_tp = minstrel_ht_get_tp_avg(mi, tmp_group, tmp_idx, tmp_prob);
-- 
--@@ -600,14 +600,14 @@ minstrel_ht_prob_rate_reduce_streams(str
-- 	if (!mi->sta->ht_cap.ht_supported)
-- 		return;
-- 
---	tmp_max_streams = minstrel_mcs_groups[mi->max_tp_rate[0] /
---			  MCS_GROUP_RATES].streams;
--+	group = MI_RATE_GROUP(mi->max_tp_rate[0]);
--+	tmp_max_streams = minstrel_mcs_groups[group].streams;
-- 	for (group = 0; group < ARRAY_SIZE(minstrel_mcs_groups); group++) {
-- 		mg = &mi->groups[group];
-- 		if (!mi->supported[group] || group == MINSTREL_CCK_GROUP)
-- 			continue;
-- 
---		tmp_idx = mg->max_group_prob_rate % MCS_GROUP_RATES;
--+		tmp_idx = MI_RATE_IDX(mg->max_group_prob_rate);
-- 		tmp_prob = mi->groups[group].rates[tmp_idx].prob_avg;
-- 
-- 		if (tmp_tp < minstrel_ht_get_tp_avg(mi, group, tmp_idx, tmp_prob) &&
--@@ -644,8 +644,8 @@ minstrel_ht_find_probe_rates(struct mins
-- 	int i, g, max_dur;
-- 	int tp_idx;
-- 
---	tp_group = &minstrel_mcs_groups[mi->max_tp_rate[0] / MCS_GROUP_RATES];
---	tp_idx = mi->max_tp_rate[0] % MCS_GROUP_RATES;
--+	tp_group = &minstrel_mcs_groups[MI_RATE_GROUP(mi->max_tp_rate[0])];
--+	tp_idx = MI_RATE_IDX(mi->max_tp_rate[0]);
-- 
-- 	max_dur = minstrel_get_duration(mi->max_tp_rate[0]);
-- 	if (faster_rate)
--@@ -670,7 +670,7 @@ minstrel_ht_find_probe_rates(struct mins
-- 			if ((group->duration[i] << group->shift) > max_dur)
-- 				continue;
-- 
---			idx = g * MCS_GROUP_RATES + i;
--+			idx = MI_RATE(g, i);
-- 			if (idx == mi->max_tp_rate[0])
-- 				continue;
-- 
--@@ -712,10 +712,10 @@ minstrel_ht_rate_sample_switch(struct mi
-- 
-- 	/* If no suitable rate was found, try to pick the next one in the group */
-- 	if (!n_rates) {
---		int g_idx = mi->max_tp_rate[0] / MCS_GROUP_RATES;
--+		int g_idx = MI_RATE_GROUP(mi->max_tp_rate[0]);
-- 		u16 supported = mi->supported[g_idx];
-- 
---		supported >>= mi->max_tp_rate[0] % MCS_GROUP_RATES;
--+		supported >>= MI_RATE_IDX(mi->max_tp_rate[0]);
-- 		for (i = 0; supported; supported >>= 1, i++) {
-- 			if (!(supported & 1))
-- 				continue;
--@@ -854,24 +854,27 @@ minstrel_ht_update_stats(struct minstrel
-- 	mi->sample_slow = 0;
-- 	mi->sample_count = 0;
-- 
---	memset(tmp_mcs_tp_rate, 0, sizeof(tmp_mcs_tp_rate));
---	memset(tmp_legacy_tp_rate, 0, sizeof(tmp_legacy_tp_rate));
-- 	if (mi->supported[MINSTREL_CCK_GROUP])
---		for (j = 0; j < ARRAY_SIZE(tmp_legacy_tp_rate); j++)
---			tmp_legacy_tp_rate[j] = MINSTREL_CCK_GROUP * MCS_GROUP_RATES;
--+		group = MINSTREL_CCK_GROUP;
-- 	else if (mi->supported[MINSTREL_OFDM_GROUP])
---		for (j = 0; j < ARRAY_SIZE(tmp_legacy_tp_rate); j++)
---			tmp_legacy_tp_rate[j] = MINSTREL_OFDM_GROUP * MCS_GROUP_RATES;
--+		group = MINSTREL_OFDM_GROUP;
--+	else
--+		group = 0;
--+
--+	index = MI_RATE(group, 0);
--+	for (j = 0; j < ARRAY_SIZE(tmp_legacy_tp_rate); j++)
--+		tmp_legacy_tp_rate[j] = index;
-- 
-- 	if (mi->supported[MINSTREL_VHT_GROUP_0])
---		index = MINSTREL_VHT_GROUP_0 * MCS_GROUP_RATES;
--+		group = MINSTREL_VHT_GROUP_0;
-- 	else if (ht_supported)
---		index = MINSTREL_HT_GROUP_0 * MCS_GROUP_RATES;
--+		group = MINSTREL_HT_GROUP_0;
-- 	else if (mi->supported[MINSTREL_CCK_GROUP])
---		index = MINSTREL_CCK_GROUP * MCS_GROUP_RATES;
--+		group = MINSTREL_CCK_GROUP;
-- 	else
---		index = MINSTREL_OFDM_GROUP * MCS_GROUP_RATES;
--+		group = MINSTREL_OFDM_GROUP;
-- 
--+	index = MI_RATE(group, 0);
-- 	tmp_max_prob_rate = index;
-- 	for (j = 0; j < ARRAY_SIZE(tmp_mcs_tp_rate); j++)
-- 		tmp_mcs_tp_rate[j] = index;
--@@ -888,7 +891,7 @@ minstrel_ht_update_stats(struct minstrel
-- 
-- 		/* (re)Initialize group rate indexes */
-- 		for(j = 0; j < MAX_THR_RATES; j++)
---			tmp_group_tp_rate[j] = MCS_GROUP_RATES * group;
--+			tmp_group_tp_rate[j] = MI_RATE(group, 0);
-- 
-- 		if (group == MINSTREL_CCK_GROUP && ht_supported)
-- 			tp_rate = tmp_legacy_tp_rate;
--@@ -897,7 +900,7 @@ minstrel_ht_update_stats(struct minstrel
-- 			if (!(mi->supported[group] & BIT(i)))
-- 				continue;
-- 
---			index = MCS_GROUP_RATES * group + i;
--+			index = MI_RATE(group, i);
-- 
-- 			mrs = &mg->rates[i];
-- 			mrs->retry_updated = false;
--@@ -929,13 +932,13 @@ minstrel_ht_update_stats(struct minstrel
-- 			continue;
-- 
-- 		mg = &mi->groups[group];
---		mg->max_group_prob_rate = MCS_GROUP_RATES * group;
--+		mg->max_group_prob_rate = MI_RATE(group, 0);
-- 
-- 		for (i = 0; i < MCS_GROUP_RATES; i++) {
-- 			if (!(mi->supported[group] & BIT(i)))
-- 				continue;
-- 
---			index = MCS_GROUP_RATES * group + i;
--+			index = MI_RATE(group, i);
-- 
-- 			/* Find max probability rate per group and global */
-- 			minstrel_ht_set_best_prob_rate(mi, &tmp_max_prob_rate,
--@@ -1022,7 +1025,7 @@ minstrel_downgrade_rate(struct minstrel_
-- {
-- 	int group, orig_group;
-- 
---	orig_group = group = *idx / MCS_GROUP_RATES;
--+	orig_group = group = MI_RATE_GROUP(*idx);
-- 	while (group > 0) {
-- 		group--;
-- 
--@@ -1206,7 +1209,7 @@ minstrel_calc_retransmit(struct minstrel
-- 	ctime += (t_slot * cw) >> 1;
-- 	cw = min((cw << 1) | 1, mp->cw_max);
-- 
---	if (minstrel_ht_is_legacy_group(index / MCS_GROUP_RATES)) {
--+	if (minstrel_ht_is_legacy_group(MI_RATE_GROUP(index))) {
-- 		overhead = mi->overhead_legacy;
-- 		overhead_rtscts = mi->overhead_legacy_rtscts;
-- 	} else {
--@@ -1239,7 +1242,7 @@ static void
-- minstrel_ht_set_rate(struct minstrel_priv *mp, struct minstrel_ht_sta *mi,
--                      struct ieee80211_sta_rates *ratetbl, int offset, int index)
-- {
---	int group_idx = index / MCS_GROUP_RATES;
--+	int group_idx = MI_RATE_GROUP(index);
-- 	const struct mcs_group *group = &minstrel_mcs_groups[group_idx];
-- 	struct minstrel_rate_stats *mrs;
-- 	u8 idx;
--@@ -1259,7 +1262,7 @@ minstrel_ht_set_rate(struct minstrel_pri
-- 		ratetbl->rate[offset].count_rts = mrs->retry_count_rtscts;
-- 	}
-- 
---	index %= MCS_GROUP_RATES;
--+	index = MI_RATE_IDX(index);
-- 	if (group_idx == MINSTREL_CCK_GROUP)
-- 		idx = mp->cck_rates[index % ARRAY_SIZE(mp->cck_rates)];
-- 	else if (group_idx == MINSTREL_OFDM_GROUP)
--@@ -1289,17 +1292,17 @@ minstrel_ht_set_rate(struct minstrel_pri
-- static inline int
-- minstrel_ht_get_prob_avg(struct minstrel_ht_sta *mi, int rate)
-- {
---	int group = rate / MCS_GROUP_RATES;
---	rate %= MCS_GROUP_RATES;
--+	int group = MI_RATE_GROUP(rate);
--+	rate = MI_RATE_IDX(rate);
-- 	return mi->groups[group].rates[rate].prob_avg;
-- }
-- 
-- static int
-- minstrel_ht_get_max_amsdu_len(struct minstrel_ht_sta *mi)
-- {
---	int group = mi->max_prob_rate / MCS_GROUP_RATES;
--+	int group = MI_RATE_GROUP(mi->max_prob_rate);
-- 	const struct mcs_group *g = &minstrel_mcs_groups[group];
---	int rate = mi->max_prob_rate % MCS_GROUP_RATES;
--+	int rate = MI_RATE_IDX(mi->max_prob_rate);
-- 	unsigned int duration;
-- 
-- 	/* Disable A-MSDU if max_prob_rate is bad */
--@@ -1405,7 +1408,7 @@ minstrel_get_sample_rate(struct minstrel
-- 		return -1;
-- 
-- 	mrs = &mg->rates[sample_idx];
---	sample_idx += sample_group * MCS_GROUP_RATES;
--+	sample_idx += MI_RATE(sample_group, 0);
-- 
-- 	tp_rate1 = mi->max_tp_rate[0];
-- 
--@@ -1455,8 +1458,7 @@ minstrel_get_sample_rate(struct minstrel
-- 	 * if the link is working perfectly.
-- 	 */
-- 
---	cur_max_tp_streams = minstrel_mcs_groups[tp_rate1 /
---		MCS_GROUP_RATES].streams;
--+	cur_max_tp_streams = minstrel_mcs_groups[MI_RATE_GROUP(tp_rate1)].streams;
-- 	if (sample_dur >= minstrel_get_duration(tp_rate2) &&
-- 	    (cur_max_tp_streams - 1 <
-- 	     minstrel_mcs_groups[sample_group].streams ||
--@@ -1484,7 +1486,7 @@ minstrel_ht_get_rate(void *priv, struct
-- 	int sample_idx;
-- 
-- 	if (!(info->flags & IEEE80211_TX_CTL_AMPDU) &&
---	    !minstrel_ht_is_legacy_group(mi->max_prob_rate / MCS_GROUP_RATES))
--+	    !minstrel_ht_is_legacy_group(MI_RATE_GROUP(mi->max_prob_rate)))
-- 		minstrel_aggr_check(sta, txrc->skb);
-- 
-- 	info->flags |= mi->tx_flags;
--@@ -1512,8 +1514,8 @@ minstrel_ht_get_rate(void *priv, struct
-- 	if (sample_idx < 0)
-- 		return;
-- 
---	sample_group = &minstrel_mcs_groups[sample_idx / MCS_GROUP_RATES];
---	sample_idx %= MCS_GROUP_RATES;
--+	sample_group = &minstrel_mcs_groups[MI_RATE_GROUP(sample_idx)];
--+	sample_idx = MI_RATE_IDX(sample_idx);
-- 
-- 	if (sample_group == &minstrel_mcs_groups[MINSTREL_CCK_GROUP] &&
-- 	    (sample_idx >= 4) != txrc->short_preamble)
--@@ -1529,7 +1531,7 @@ minstrel_ht_get_rate(void *priv, struct
-- 		int idx = sample_idx % ARRAY_SIZE(mp->ofdm_rates[0]);
-- 		rate->idx = mp->ofdm_rates[mi->band][idx];
-- 	} else if (sample_group->flags & IEEE80211_TX_RC_VHT_MCS) {
---		ieee80211_rate_set_vht(rate, sample_idx % MCS_GROUP_RATES,
--+		ieee80211_rate_set_vht(rate, MI_RATE_IDX(sample_idx),
-- 				       sample_group->streams);
-- 	} else {
-- 		rate->idx = sample_idx + (sample_group->streams - 1) * 8;
--@@ -1898,8 +1900,8 @@ static u32 minstrel_ht_get_expected_thro
-- 	struct minstrel_ht_sta *mi = priv_sta;
-- 	int i, j, prob, tp_avg;
-- 
---	i = mi->max_tp_rate[0] / MCS_GROUP_RATES;
---	j = mi->max_tp_rate[0] % MCS_GROUP_RATES;
--+	i = MI_RATE_GROUP(mi->max_tp_rate[0]);
--+	j = MI_RATE_IDX(mi->max_tp_rate[0]);
-- 	prob = mi->groups[i].rates[j].prob_avg;
-- 
-- 	/* convert tp_avg from pkt per second in kbps */
----- a/net/mac80211/rc80211_minstrel_ht.h
--+++ b/net/mac80211/rc80211_minstrel_ht.h
--@@ -6,6 +6,8 @@
-- #ifndef __RC_MINSTREL_HT_H
-- #define __RC_MINSTREL_HT_H
-- 
--+#include <linux/bitfield.h>
--+
-- /* number of highest throughput rates to consider*/
-- #define MAX_THR_RATES 4
-- #define SAMPLE_COLUMNS	10	/* number of columns in sample table */
--@@ -57,6 +59,17 @@
-- 
-- #define MCS_GROUP_RATES		10
-- 
--+#define MI_RATE_IDX_MASK	GENMASK(3, 0)
--+#define MI_RATE_GROUP_MASK	GENMASK(15, 4)
--+
--+#define MI_RATE(_group, _idx)				\
--+	(FIELD_PREP(MI_RATE_GROUP_MASK, _group) |	\
--+	 FIELD_PREP(MI_RATE_IDX_MASK, _idx))
--+
--+#define MI_RATE_IDX(_rate) FIELD_GET(MI_RATE_IDX_MASK, _rate)
--+#define MI_RATE_GROUP(_rate) FIELD_GET(MI_RATE_GROUP_MASK, _rate)
--+
--+
-- struct minstrel_priv {
-- 	struct ieee80211_hw *hw;
-- 	bool has_mrr;
----- a/net/mac80211/rc80211_minstrel_ht_debugfs.c
--+++ b/net/mac80211/rc80211_minstrel_ht_debugfs.c
--@@ -56,7 +56,7 @@ minstrel_ht_stats_dump(struct minstrel_h
-- 
-- 	for (j = 0; j < MCS_GROUP_RATES; j++) {
-- 		struct minstrel_rate_stats *mrs = &mi->groups[i].rates[j];
---		int idx = i * MCS_GROUP_RATES + j;
--+		int idx = MI_RATE(i, j);
-- 		unsigned int duration;
-- 
-- 		if (!(mi->supported[i] & BIT(j)))
--@@ -201,7 +201,7 @@ minstrel_ht_stats_csv_dump(struct minstr
-- 
-- 	for (j = 0; j < MCS_GROUP_RATES; j++) {
-- 		struct minstrel_rate_stats *mrs = &mi->groups[i].rates[j];
---		int idx = i * MCS_GROUP_RATES + j;
--+		int idx = MI_RATE(i, j);
-- 		unsigned int duration;
-- 
-- 		if (!(mi->supported[i] & BIT(j)))
-diff --git a/package/kernel/mac80211/patches/subsys/347-mac80211-minstrel_ht-update-total-packets-counter-in.patch b/package/kernel/mac80211/patches/subsys/347-mac80211-minstrel_ht-update-total-packets-counter-in.patch
-deleted file mode 100644
-index dce8104934..0000000000
---- a/package/kernel/mac80211/patches/subsys/347-mac80211-minstrel_ht-update-total-packets-counter-in.patch
-+++ /dev/null
-@@ -1,54 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Fri, 22 Jan 2021 18:21:13 +0100
--Subject: [PATCH] mac80211: minstrel_ht: update total packets counter in tx
-- status path
--
--Keep the update in one place and prepare for further rework
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/rc80211_minstrel_ht.c
--+++ b/net/mac80211/rc80211_minstrel_ht.c
--@@ -1092,6 +1092,16 @@ minstrel_ht_tx_status(void *priv, struct
-- 		info->status.ampdu_len = 1;
-- 	}
-- 
--+	/* wraparound */
--+	if (mi->total_packets >= ~0 - info->status.ampdu_len) {
--+		mi->total_packets = 0;
--+		mi->sample_packets = 0;
--+	}
--+
--+	mi->total_packets += info->status.ampdu_len;
--+	if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)
--+		mi->sample_packets += info->status.ampdu_len;
--+
-- 	mi->ampdu_packets++;
-- 	mi->ampdu_len += info->status.ampdu_len;
-- 
--@@ -1103,9 +1113,6 @@ minstrel_ht_tx_status(void *priv, struct
-- 		mi->sample_count--;
-- 	}
-- 
---	if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)
---		mi->sample_packets += info->status.ampdu_len;
---
-- 	if (mi->sample_mode != MINSTREL_SAMPLE_IDLE)
-- 		rate_sample = minstrel_get_ratestats(mi, mi->sample_rate);
-- 
--@@ -1503,14 +1510,6 @@ minstrel_ht_get_rate(void *priv, struct
-- 	else
-- 		sample_idx = minstrel_get_sample_rate(mp, mi);
-- 
---	mi->total_packets++;
---
---	/* wraparound */
---	if (mi->total_packets == ~0) {
---		mi->total_packets = 0;
---		mi->sample_packets = 0;
---	}
---
-- 	if (sample_idx < 0)
-- 		return;
-- 
-diff --git a/package/kernel/mac80211/patches/subsys/348-mac80211-minstrel_ht-reduce-the-need-to-sample-slowe.patch b/package/kernel/mac80211/patches/subsys/348-mac80211-minstrel_ht-reduce-the-need-to-sample-slowe.patch
-deleted file mode 100644
-index dc6f11e4b9..0000000000
---- a/package/kernel/mac80211/patches/subsys/348-mac80211-minstrel_ht-reduce-the-need-to-sample-slowe.patch
-+++ /dev/null
-@@ -1,102 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Fri, 22 Jan 2021 19:24:59 +0100
--Subject: [PATCH] mac80211: minstrel_ht: reduce the need to sample slower
-- rates
--
--In order to more gracefully be able to fall back to lower rates without too
--much throughput fluctuations, initialize all untested rates below tested ones
--to the maximum probabilty of higher rates.
--Usually this leads to untested lower rates getting initialized with a
--probability value of 100%, making them better candidates for fallback without
--having to rely on random probing
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/rc80211_minstrel_ht.c
--+++ b/net/mac80211/rc80211_minstrel_ht.c
--@@ -791,14 +791,11 @@ minstrel_ht_calc_rate_stats(struct minst
-- 	unsigned int cur_prob;
-- 
-- 	if (unlikely(mrs->attempts > 0)) {
---		mrs->sample_skipped = 0;
-- 		cur_prob = MINSTREL_FRAC(mrs->success, mrs->attempts);
-- 		minstrel_filter_avg_add(&mrs->prob_avg,
-- 					&mrs->prob_avg_1, cur_prob);
-- 		mrs->att_hist += mrs->attempts;
-- 		mrs->succ_hist += mrs->success;
---	} else {
---		mrs->sample_skipped++;
-- 	}
-- 
-- 	mrs->last_success = mrs->success;
--@@ -851,7 +848,6 @@ minstrel_ht_update_stats(struct minstrel
-- 		mi->ampdu_packets = 0;
-- 	}
-- 
---	mi->sample_slow = 0;
-- 	mi->sample_count = 0;
-- 
-- 	if (mi->supported[MINSTREL_CCK_GROUP])
--@@ -882,6 +878,7 @@ minstrel_ht_update_stats(struct minstrel
-- 	/* Find best rate sets within all MCS groups*/
-- 	for (group = 0; group < ARRAY_SIZE(minstrel_mcs_groups); group++) {
-- 		u16 *tp_rate = tmp_mcs_tp_rate;
--+		u16 last_prob = 0;
-- 
-- 		mg = &mi->groups[group];
-- 		if (!mi->supported[group])
--@@ -896,7 +893,7 @@ minstrel_ht_update_stats(struct minstrel
-- 		if (group == MINSTREL_CCK_GROUP && ht_supported)
-- 			tp_rate = tmp_legacy_tp_rate;
-- 
---		for (i = 0; i < MCS_GROUP_RATES; i++) {
--+		for (i = MCS_GROUP_RATES - 1; i >= 0; i--) {
-- 			if (!(mi->supported[group] & BIT(i)))
-- 				continue;
-- 
--@@ -905,6 +902,11 @@ minstrel_ht_update_stats(struct minstrel
-- 			mrs = &mg->rates[i];
-- 			mrs->retry_updated = false;
-- 			minstrel_ht_calc_rate_stats(mp, mrs);
--+
--+			if (mrs->att_hist)
--+				last_prob = max(last_prob, mrs->prob_avg);
--+			else
--+				mrs->prob_avg = max(last_prob, mrs->prob_avg);
-- 			cur_prob = mrs->prob_avg;
-- 
-- 			if (minstrel_ht_get_tp_avg(mi, group, i, cur_prob) == 0)
--@@ -1469,13 +1471,9 @@ minstrel_get_sample_rate(struct minstrel
-- 	if (sample_dur >= minstrel_get_duration(tp_rate2) &&
-- 	    (cur_max_tp_streams - 1 <
-- 	     minstrel_mcs_groups[sample_group].streams ||
---	     sample_dur >= minstrel_get_duration(mi->max_prob_rate))) {
---		if (mrs->sample_skipped < 20)
--+	     sample_dur >= minstrel_get_duration(mi->max_prob_rate)))
-- 			return -1;
-- 
---		if (mi->sample_slow++ > 2)
---			return -1;
---	}
-- 	mi->sample_tries--;
-- 
-- 	return sample_idx;
----- a/net/mac80211/rc80211_minstrel_ht.h
--+++ b/net/mac80211/rc80211_minstrel_ht.h
--@@ -123,7 +123,6 @@ struct minstrel_rate_stats {
-- 	u8 retry_count;
-- 	u8 retry_count_rtscts;
-- 
---	u8 sample_skipped;
-- 	bool retry_updated;
-- };
-- 
--@@ -179,7 +178,6 @@ struct minstrel_ht_sta {
-- 	u8 sample_wait;
-- 	u8 sample_tries;
-- 	u8 sample_count;
---	u8 sample_slow;
-- 
-- 	enum minstrel_sample_mode sample_mode;
-- 	u16 sample_rate;
-diff --git a/package/kernel/mac80211/patches/subsys/349-mac80211-minstrel_ht-significantly-redesign-the-rate.patch b/package/kernel/mac80211/patches/subsys/349-mac80211-minstrel_ht-significantly-redesign-the-rate.patch
-deleted file mode 100644
-index 09f6fd2214..0000000000
---- a/package/kernel/mac80211/patches/subsys/349-mac80211-minstrel_ht-significantly-redesign-the-rate.patch
-+++ /dev/null
-@@ -1,767 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Fri, 22 Jan 2021 23:57:50 +0100
--Subject: [PATCH] mac80211: minstrel_ht: significantly redesign the rate
-- probing strategy
--
--The biggest flaw in current minstrel_ht is the fact that it needs way too
--many probing packets to be able to quickly find the best rate.
--Depending on the wifi hardware and operating mode, this can significantly
--reduce throughput when not operating at the highest available data rate.
--
--In order to be able to significantly reduce the amount of rate sampling,
--we need a much smarter selection of probing rates.
--
--The new approach introduced by this patch maintains a limited set of
--available rates to be tested during a statistics window.
--
--They are split into distinct categories:
--- MINSTREL_SAMPLE_TYPE_INC - incremental rate upgrade:
--  Pick the next rate group and find the first rate that is faster than
--  the current max. throughput rate
--- MINSTREL_SAMPLE_TYPE_JUMP - random testing of higher rates:
--  Pick a random rate from the next group that is faster than the current
--  max throughput rate. This allows faster adaptation when the link changes
--  significantly
--- MINSTREL_SAMPLE_TYPE_SLOW - test a rate between max_prob, max_tp2 and
--  max_tp in order to reduce the gap between them
--
--In order to prioritize sampling, every 6 attempts are split into 3x INC,
--2x JUMP, 1x SLOW.
--
--Available rates are checked and refilled on every stats window update.
--
--With this approach, we finally get a very small delta in throughput when
--comparing setting the optimal data rate as a fixed rate vs normal rate
--control operation.
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/rc80211_minstrel_ht.c
--+++ b/net/mac80211/rc80211_minstrel_ht.c
--@@ -266,6 +266,14 @@ const struct mcs_group minstrel_mcs_grou
-- const s16 minstrel_cck_bitrates[4] = { 10, 20, 55, 110 };
-- const s16 minstrel_ofdm_bitrates[8] = { 60, 90, 120, 180, 240, 360, 480, 540 };
-- static u8 sample_table[SAMPLE_COLUMNS][MCS_GROUP_RATES] __read_mostly;
--+static const u8 minstrel_sample_seq[] = {
--+	MINSTREL_SAMPLE_TYPE_INC,
--+	MINSTREL_SAMPLE_TYPE_JUMP,
--+	MINSTREL_SAMPLE_TYPE_INC,
--+	MINSTREL_SAMPLE_TYPE_JUMP,
--+	MINSTREL_SAMPLE_TYPE_INC,
--+	MINSTREL_SAMPLE_TYPE_SLOW,
--+};
-- 
-- static void
-- minstrel_ht_update_rates(struct minstrel_priv *mp, struct minstrel_ht_sta *mi);
--@@ -620,77 +628,31 @@ minstrel_ht_prob_rate_reduce_streams(str
-- 	}
-- }
-- 
---static bool
---minstrel_ht_probe_group(struct minstrel_ht_sta *mi, const struct mcs_group *tp_group,
---						int tp_idx, const struct mcs_group *group)
---{
---	if (group->bw < tp_group->bw)
---		return false;
---
---	if (group->streams == tp_group->streams)
---		return true;
---
---	if (tp_idx < 4 && group->streams == tp_group->streams - 1)
---		return true;
---
---	return group->streams == tp_group->streams + 1;
---}
---
---static void
---minstrel_ht_find_probe_rates(struct minstrel_ht_sta *mi, u16 *rates, int *n_rates,
---			     bool faster_rate)
--+static u16
--+__minstrel_ht_get_sample_rate(struct minstrel_ht_sta *mi,
--+			      enum minstrel_sample_type type)
-- {
---	const struct mcs_group *group, *tp_group;
---	int i, g, max_dur;
---	int tp_idx;
---
---	tp_group = &minstrel_mcs_groups[MI_RATE_GROUP(mi->max_tp_rate[0])];
---	tp_idx = MI_RATE_IDX(mi->max_tp_rate[0]);
---
---	max_dur = minstrel_get_duration(mi->max_tp_rate[0]);
---	if (faster_rate)
---		max_dur -= max_dur / 16;
---
---	for (g = 0; g < MINSTREL_GROUPS_NB; g++) {
---		u16 supported = mi->supported[g];
---
---		if (!supported)
---			continue;
--+	u16 *rates = mi->sample[type].sample_rates;
--+	u16 cur;
--+	int i;
-- 
---		group = &minstrel_mcs_groups[g];
---		if (!minstrel_ht_probe_group(mi, tp_group, tp_idx, group))
--+	for (i = 0; i < MINSTREL_SAMPLE_RATES; i++) {
--+		if (!rates[i])
-- 			continue;
-- 
---		for (i = 0; supported; supported >>= 1, i++) {
---			int idx;
---
---			if (!(supported & 1))
---				continue;
---
---			if ((group->duration[i] << group->shift) > max_dur)
---				continue;
---
---			idx = MI_RATE(g, i);
---			if (idx == mi->max_tp_rate[0])
---				continue;
---
---			rates[(*n_rates)++] = idx;
---			break;
---		}
--+		cur = rates[i];
--+		rates[i] = 0;
--+		return cur;
-- 	}
--+
--+	return 0;
-- }
-- 
-- static void
-- minstrel_ht_rate_sample_switch(struct minstrel_priv *mp,
-- 			       struct minstrel_ht_sta *mi)
-- {
---	struct minstrel_rate_stats *mrs;
---	u16 rates[MINSTREL_GROUPS_NB];
---	int n_rates = 0;
---	int probe_rate = 0;
---	bool faster_rate;
---	int i;
---	u8 random;
--+	u16 rate;
-- 
-- 	/*
-- 	 * Use rate switching instead of probing packets for devices with
--@@ -699,43 +661,11 @@ minstrel_ht_rate_sample_switch(struct mi
-- 	if (mp->hw->max_rates > 1)
-- 		return;
-- 
---	/*
---	 * If the current EWMA prob is >75%, look for a rate that's 6.25%
---	 * faster than the max tp rate.
---	 * If that fails, look again for a rate that is at least as fast
---	 */
---	mrs = minstrel_get_ratestats(mi, mi->max_tp_rate[0]);
---	faster_rate = mrs->prob_avg > MINSTREL_FRAC(75, 100);
---	minstrel_ht_find_probe_rates(mi, rates, &n_rates, faster_rate);
---	if (!n_rates && faster_rate)
---		minstrel_ht_find_probe_rates(mi, rates, &n_rates, false);
---
---	/* If no suitable rate was found, try to pick the next one in the group */
---	if (!n_rates) {
---		int g_idx = MI_RATE_GROUP(mi->max_tp_rate[0]);
---		u16 supported = mi->supported[g_idx];
---
---		supported >>= MI_RATE_IDX(mi->max_tp_rate[0]);
---		for (i = 0; supported; supported >>= 1, i++) {
---			if (!(supported & 1))
---				continue;
---
---			probe_rate = mi->max_tp_rate[0] + i;
---			goto out;
---		}
---
--+	rate = __minstrel_ht_get_sample_rate(mi, MINSTREL_SAMPLE_TYPE_INC);
--+	if (!rate)
-- 		return;
---	}
---
---	i = 0;
---	if (n_rates > 1) {
---		random = prandom_u32();
---		i = random % n_rates;
---	}
---	probe_rate = rates[i];
-- 
---out:
---	mi->sample_rate = probe_rate;
--+	mi->sample_rate = rate;
-- 	mi->sample_mode = MINSTREL_SAMPLE_ACTIVE;
-- }
-- 
--@@ -804,6 +734,274 @@ minstrel_ht_calc_rate_stats(struct minst
-- 	mrs->attempts = 0;
-- }
-- 
--+static bool
--+minstrel_ht_find_sample_rate(struct minstrel_ht_sta *mi, int type, int idx)
--+{
--+	int i;
--+
--+	for (i = 0; i < MINSTREL_SAMPLE_RATES; i++) {
--+		u16 cur = mi->sample[type].sample_rates[i];
--+
--+		if (cur == idx)
--+			return true;
--+
--+		if (!cur)
--+			break;
--+	}
--+
--+	return false;
--+}
--+
--+static int
--+minstrel_ht_move_sample_rates(struct minstrel_ht_sta *mi, int type,
--+			      u32 fast_rate_dur, u32 slow_rate_dur)
--+{
--+	u16 *rates = mi->sample[type].sample_rates;
--+	int i, j;
--+
--+	for (i = 0, j = 0; i < MINSTREL_SAMPLE_RATES; i++) {
--+		u32 duration;
--+		bool valid = false;
--+		u16 cur;
--+
--+		cur = rates[i];
--+		if (!cur)
--+			continue;
--+
--+		duration = minstrel_get_duration(cur);
--+		switch (type) {
--+		case MINSTREL_SAMPLE_TYPE_SLOW:
--+			valid = duration > fast_rate_dur &&
--+				duration < slow_rate_dur;
--+			break;
--+		case MINSTREL_SAMPLE_TYPE_INC:
--+		case MINSTREL_SAMPLE_TYPE_JUMP:
--+			valid = duration < fast_rate_dur;
--+			break;
--+		default:
--+			valid = false;
--+			break;
--+		}
--+
--+		if (!valid) {
--+			rates[i] = 0;
--+			continue;
--+		}
--+
--+		if (i == j)
--+			continue;
--+
--+		rates[j++] = cur;
--+		rates[i] = 0;
--+	}
--+
--+	return j;
--+}
--+
--+static int
--+minstrel_ht_group_min_rate_offset(struct minstrel_ht_sta *mi, int group,
--+				  u32 max_duration)
--+{
--+	u16 supported = mi->supported[group];
--+	int i;
--+
--+	for (i = 0; i < MCS_GROUP_RATES && supported; i++, supported >>= 1) {
--+		if (!(supported & BIT(0)))
--+			continue;
--+
--+		if (minstrel_get_duration(MI_RATE(group, i)) >= max_duration)
--+			continue;
--+
--+		return i;
--+	}
--+
--+	return -1;
--+}
--+
--+/*
--+ * Incremental update rates:
--+ * Flip through groups and pick the first group rate that is faster than the
--+ * highest currently selected rate
--+ */
--+static u16
--+minstrel_ht_next_inc_rate(struct minstrel_ht_sta *mi, u32 fast_rate_dur)
--+{
--+	struct minstrel_mcs_group_data *mg;
--+	u8 type = MINSTREL_SAMPLE_TYPE_INC;
--+	int i, index = 0;
--+	u8 group;
--+
--+	group = mi->sample[type].sample_group;
--+	for (i = 0; i < ARRAY_SIZE(minstrel_mcs_groups); i++) {
--+		group = (group + 1) % ARRAY_SIZE(minstrel_mcs_groups);
--+		mg = &mi->groups[group];
--+
--+		index = minstrel_ht_group_min_rate_offset(mi, group,
--+							  fast_rate_dur);
--+		if (index < 0)
--+			continue;
--+
--+		index = MI_RATE(group, index & 0xf);
--+		if (!minstrel_ht_find_sample_rate(mi, type, index))
--+			goto out;
--+	}
--+	index = 0;
--+
--+out:
--+	mi->sample[type].sample_group = group;
--+
--+	return index;
--+}
--+
--+static int
--+minstrel_ht_next_group_sample_rate(struct minstrel_ht_sta *mi, int group,
--+				   u16 supported, int offset)
--+{
--+	struct minstrel_mcs_group_data *mg = &mi->groups[group];
--+	u16 idx;
--+	int i;
--+
--+	for (i = 0; i < MCS_GROUP_RATES; i++) {
--+		idx = sample_table[mg->column][mg->index];
--+		if (++mg->index >= MCS_GROUP_RATES) {
--+			mg->index = 0;
--+			if (++mg->column >= ARRAY_SIZE(sample_table))
--+				mg->column = 0;
--+		}
--+
--+		if (idx < offset)
--+			continue;
--+
--+		if (!(supported & BIT(idx)))
--+			continue;
--+
--+		return MI_RATE(group, idx);
--+	}
--+
--+	return -1;
--+}
--+
--+/*
--+ * Jump rates:
--+ * Sample random rates, use those that are faster than the highest
--+ * currently selected rate. Rates between the fastest and the slowest
--+ * get sorted into the slow sample bucket, but only if it has room
--+ */
--+static u16
--+minstrel_ht_next_jump_rate(struct minstrel_ht_sta *mi, u32 fast_rate_dur,
--+			   u32 slow_rate_dur, int *slow_rate_ofs)
--+{
--+	struct minstrel_mcs_group_data *mg;
--+	struct minstrel_rate_stats *mrs;
--+	u32 max_duration = slow_rate_dur;
--+	int i, index, offset;
--+	u16 *slow_rates;
--+	u16 supported;
--+	u32 duration;
--+	u8 group;
--+
--+	if (*slow_rate_ofs >= MINSTREL_SAMPLE_RATES)
--+		max_duration = fast_rate_dur;
--+
--+	slow_rates = mi->sample[MINSTREL_SAMPLE_TYPE_SLOW].sample_rates;
--+	group = mi->sample[MINSTREL_SAMPLE_TYPE_JUMP].sample_group;
--+	for (i = 0; i < ARRAY_SIZE(minstrel_mcs_groups); i++) {
--+		u8 type;
--+
--+		group = (group + 1) % ARRAY_SIZE(minstrel_mcs_groups);
--+		mg = &mi->groups[group];
--+
--+		supported = mi->supported[group];
--+		if (!supported)
--+			continue;
--+
--+		offset = minstrel_ht_group_min_rate_offset(mi, group,
--+							   max_duration);
--+		if (offset < 0)
--+			continue;
--+
--+		index = minstrel_ht_next_group_sample_rate(mi, group, supported,
--+							   offset);
--+		if (index < 0)
--+			continue;
--+
--+		duration = minstrel_get_duration(index);
--+		if (duration < fast_rate_dur)
--+			type = MINSTREL_SAMPLE_TYPE_JUMP;
--+		else
--+			type = MINSTREL_SAMPLE_TYPE_SLOW;
--+
--+		if (minstrel_ht_find_sample_rate(mi, type, index))
--+			continue;
--+
--+		if (type == MINSTREL_SAMPLE_TYPE_JUMP)
--+			goto found;
--+
--+		if (*slow_rate_ofs >= MINSTREL_SAMPLE_RATES)
--+			continue;
--+
--+		if (duration >= slow_rate_dur)
--+			continue;
--+
--+		/* skip slow rates with high success probability */
--+		mrs = minstrel_get_ratestats(mi, index);
--+		if (mrs->prob_avg > MINSTREL_FRAC(95, 100))
--+			continue;
--+
--+		slow_rates[(*slow_rate_ofs)++] = index;
--+		if (*slow_rate_ofs >= MINSTREL_SAMPLE_RATES)
--+			max_duration = fast_rate_dur;
--+	}
--+	index = 0;
--+
--+found:
--+	mi->sample[MINSTREL_SAMPLE_TYPE_JUMP].sample_group = group;
--+
--+	return index;
--+}
--+
--+static void
--+minstrel_ht_refill_sample_rates(struct minstrel_ht_sta *mi)
--+{
--+	u32 prob_dur = minstrel_get_duration(mi->max_prob_rate);
--+	u32 tp_dur = minstrel_get_duration(mi->max_tp_rate[0]);
--+	u32 tp2_dur = minstrel_get_duration(mi->max_tp_rate[1]);
--+	u32 fast_rate_dur = min(min(tp_dur, tp2_dur), prob_dur);
--+	u32 slow_rate_dur = max(max(tp_dur, tp2_dur), prob_dur);
--+	u16 *rates;
--+	int i, j;
--+
--+	rates = mi->sample[MINSTREL_SAMPLE_TYPE_INC].sample_rates;
--+	i = minstrel_ht_move_sample_rates(mi, MINSTREL_SAMPLE_TYPE_INC,
--+					  fast_rate_dur, slow_rate_dur);
--+	while (i < MINSTREL_SAMPLE_RATES) {
--+		rates[i] = minstrel_ht_next_inc_rate(mi, tp_dur);
--+		if (!rates[i])
--+			break;
--+
--+		i++;
--+	}
--+
--+	rates = mi->sample[MINSTREL_SAMPLE_TYPE_JUMP].sample_rates;
--+	i = minstrel_ht_move_sample_rates(mi, MINSTREL_SAMPLE_TYPE_JUMP,
--+					  fast_rate_dur, slow_rate_dur);
--+	j = minstrel_ht_move_sample_rates(mi, MINSTREL_SAMPLE_TYPE_SLOW,
--+					  fast_rate_dur, slow_rate_dur);
--+	while (i < MINSTREL_SAMPLE_RATES) {
--+		rates[i] = minstrel_ht_next_jump_rate(mi, fast_rate_dur,
--+						      slow_rate_dur, &j);
--+		if (!rates[i])
--+			break;
--+
--+		i++;
--+	}
--+
--+	for (i = 0; i < ARRAY_SIZE(mi->sample); i++)
--+		memcpy(mi->sample[i].cur_sample_rates, mi->sample[i].sample_rates,
--+		       sizeof(mi->sample[i].cur_sample_rates));
--+}
--+
--+
-- /*
--  * Update rate statistics and select new primary rates
--  *
--@@ -848,8 +1046,6 @@ minstrel_ht_update_stats(struct minstrel
-- 		mi->ampdu_packets = 0;
-- 	}
-- 
---	mi->sample_count = 0;
---
-- 	if (mi->supported[MINSTREL_CCK_GROUP])
-- 		group = MINSTREL_CCK_GROUP;
-- 	else if (mi->supported[MINSTREL_OFDM_GROUP])
--@@ -884,8 +1080,6 @@ minstrel_ht_update_stats(struct minstrel
-- 		if (!mi->supported[group])
-- 			continue;
-- 
---		mi->sample_count++;
---
-- 		/* (re)Initialize group rate indexes */
-- 		for(j = 0; j < MAX_THR_RATES; j++)
-- 			tmp_group_tp_rate[j] = MI_RATE(group, 0);
--@@ -952,9 +1146,7 @@ minstrel_ht_update_stats(struct minstrel
-- 
-- 	/* Try to increase robustness of max_prob_rate*/
-- 	minstrel_ht_prob_rate_reduce_streams(mi);
---
---	/* try to sample half of all available rates during each interval */
---	mi->sample_count *= 4;
--+	minstrel_ht_refill_sample_rates(mi);
-- 
-- 	if (sample)
-- 		minstrel_ht_rate_sample_switch(mp, mi);
--@@ -971,6 +1163,7 @@ minstrel_ht_update_stats(struct minstrel
-- 
-- 	/* Reset update timer */
-- 	mi->last_stats_update = jiffies;
--+	mi->sample_time = jiffies;
-- }
-- 
-- static bool
--@@ -1001,28 +1194,6 @@ minstrel_ht_txstat_valid(struct minstrel
-- }
-- 
-- static void
---minstrel_set_next_sample_idx(struct minstrel_ht_sta *mi)
---{
---	struct minstrel_mcs_group_data *mg;
---
---	for (;;) {
---		mi->sample_group++;
---		mi->sample_group %= ARRAY_SIZE(minstrel_mcs_groups);
---		mg = &mi->groups[mi->sample_group];
---
---		if (!mi->supported[mi->sample_group])
---			continue;
---
---		if (++mg->index >= MCS_GROUP_RATES) {
---			mg->index = 0;
---			if (++mg->column >= ARRAY_SIZE(sample_table))
---				mg->column = 0;
---		}
---		break;
---	}
---}
---
---static void
-- minstrel_downgrade_rate(struct minstrel_ht_sta *mi, u16 *idx, bool primary)
-- {
-- 	int group, orig_group;
--@@ -1107,14 +1278,6 @@ minstrel_ht_tx_status(void *priv, struct
-- 	mi->ampdu_packets++;
-- 	mi->ampdu_len += info->status.ampdu_len;
-- 
---	if (!mi->sample_wait && !mi->sample_tries && mi->sample_count > 0) {
---		int avg_ampdu_len = minstrel_ht_avg_ampdu_len(mi);
---
---		mi->sample_wait = 16 + 2 * avg_ampdu_len;
---		mi->sample_tries = 1;
---		mi->sample_count--;
---	}
---
-- 	if (mi->sample_mode != MINSTREL_SAMPLE_IDLE)
-- 		rate_sample = minstrel_get_ratestats(mi, mi->sample_rate);
-- 
--@@ -1386,97 +1549,20 @@ minstrel_ht_update_rates(struct minstrel
-- 	rate_control_set_rates(mp->hw, mi->sta, rates);
-- }
-- 
---static int
---minstrel_get_sample_rate(struct minstrel_priv *mp, struct minstrel_ht_sta *mi)
--+static u16
--+minstrel_ht_get_sample_rate(struct minstrel_priv *mp, struct minstrel_ht_sta *mi)
-- {
---	struct minstrel_rate_stats *mrs;
---	struct minstrel_mcs_group_data *mg;
---	unsigned int sample_dur, sample_group, cur_max_tp_streams;
---	int tp_rate1, tp_rate2;
---	int sample_idx = 0;
---
---	if (mp->hw->max_rates == 1 && mp->sample_switch &&
---	    (mi->total_packets_cur >= SAMPLE_SWITCH_THR ||
---	     mp->sample_switch == 1))
---		return -1;
---
---	if (mi->sample_wait > 0) {
---		mi->sample_wait--;
---		return -1;
---	}
---
---	if (!mi->sample_tries)
---		return -1;
---
---	sample_group = mi->sample_group;
---	mg = &mi->groups[sample_group];
---	sample_idx = sample_table[mg->column][mg->index];
---	minstrel_set_next_sample_idx(mi);
---
---	if (!(mi->supported[sample_group] & BIT(sample_idx)))
---		return -1;
--+	u8 seq;
-- 
---	mrs = &mg->rates[sample_idx];
---	sample_idx += MI_RATE(sample_group, 0);
---
---	tp_rate1 = mi->max_tp_rate[0];
---
---	/* Set tp_rate2 to the second highest max_tp_rate */
---	if (minstrel_get_duration(mi->max_tp_rate[0]) >
---	    minstrel_get_duration(mi->max_tp_rate[1])) {
---		tp_rate2 = mi->max_tp_rate[0];
--+	if (mp->hw->max_rates > 1) {
--+		seq = mi->sample_seq;
--+		mi->sample_seq = (seq + 1) % ARRAY_SIZE(minstrel_sample_seq);
--+		seq = minstrel_sample_seq[seq];
-- 	} else {
---		tp_rate2 = mi->max_tp_rate[1];
--+		seq = MINSTREL_SAMPLE_TYPE_INC;
-- 	}
-- 
---	/*
---	 * Sampling might add some overhead (RTS, no aggregation)
---	 * to the frame. Hence, don't use sampling for the highest currently
---	 * used highest throughput or probability rate.
---	 */
---	if (sample_idx == mi->max_tp_rate[0] || sample_idx == mi->max_prob_rate)
---		return -1;
---
---	/*
---	 * Do not sample if the probability is already higher than 95%,
---	 * or if the rate is 3 times slower than the current max probability
---	 * rate, to avoid wasting airtime.
---	 */
---	sample_dur = minstrel_get_duration(sample_idx);
---	if (mrs->prob_avg > MINSTREL_FRAC(95, 100) ||
---	    minstrel_get_duration(mi->max_prob_rate) * 3 < sample_dur)
---		return -1;
---
---
---	/*
---	 * For devices with no configurable multi-rate retry, skip sampling
---	 * below the per-group max throughput rate, and only use one sampling
---	 * attempt per rate
---	 */
---	if (mp->hw->max_rates == 1 &&
---	    (minstrel_get_duration(mg->max_group_tp_rate[0]) < sample_dur ||
---	     mrs->attempts))
---		return -1;
---
---	/* Skip already sampled slow rates */
---	if (sample_dur >= minstrel_get_duration(tp_rate1) && mrs->attempts)
---		return -1;
---
---	/*
---	 * Make sure that lower rates get sampled only occasionally,
---	 * if the link is working perfectly.
---	 */
---
---	cur_max_tp_streams = minstrel_mcs_groups[MI_RATE_GROUP(tp_rate1)].streams;
---	if (sample_dur >= minstrel_get_duration(tp_rate2) &&
---	    (cur_max_tp_streams - 1 <
---	     minstrel_mcs_groups[sample_group].streams ||
---	     sample_dur >= minstrel_get_duration(mi->max_prob_rate)))
---			return -1;
---
---	mi->sample_tries--;
---
---	return sample_idx;
--+	return __minstrel_ht_get_sample_rate(mi, seq);
-- }
-- 
-- static void
--@@ -1488,7 +1574,7 @@ minstrel_ht_get_rate(void *priv, struct
-- 	struct ieee80211_tx_rate *rate = &info->status.rates[0];
-- 	struct minstrel_ht_sta *mi = priv_sta;
-- 	struct minstrel_priv *mp = priv;
---	int sample_idx;
--+	u16 sample_idx;
-- 
-- 	if (!(info->flags & IEEE80211_TX_CTL_AMPDU) &&
-- 	    !minstrel_ht_is_legacy_group(MI_RATE_GROUP(mi->max_prob_rate)))
--@@ -1504,11 +1590,19 @@ minstrel_ht_get_rate(void *priv, struct
-- 	/* Don't use EAPOL frames for sampling on non-mrr hw */
-- 	if (mp->hw->max_rates == 1 &&
-- 	    (info->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO))
---		sample_idx = -1;
---	else
---		sample_idx = minstrel_get_sample_rate(mp, mi);
--+		return;
--+
--+	if (mp->hw->max_rates == 1 && mp->sample_switch &&
--+	    (mi->total_packets_cur >= SAMPLE_SWITCH_THR ||
--+	     mp->sample_switch == 1))
--+		return;
--+
--+	if (time_is_before_jiffies(mi->sample_time))
--+		return;
-- 
---	if (sample_idx < 0)
--+	mi->sample_time = jiffies + MINSTREL_SAMPLE_INTERVAL;
--+	sample_idx = minstrel_ht_get_sample_rate(mp, mi);
--+	if (!sample_idx)
-- 		return;
-- 
-- 	sample_group = &minstrel_mcs_groups[MI_RATE_GROUP(sample_idx)];
--@@ -1629,16 +1723,6 @@ minstrel_ht_update_caps(void *priv, stru
-- 
-- 	mi->avg_ampdu_len = MINSTREL_FRAC(1, 1);
-- 
---	/* When using MRR, sample more on the first attempt, without delay */
---	if (mp->has_mrr) {
---		mi->sample_count = 16;
---		mi->sample_wait = 0;
---	} else {
---		mi->sample_count = 8;
---		mi->sample_wait = 8;
---	}
---	mi->sample_tries = 4;
---
-- 	if (!use_vht) {
-- 		stbc = (ht_cap & IEEE80211_HT_CAP_RX_STBC) >>
-- 			IEEE80211_HT_CAP_RX_STBC_SHIFT;
----- a/net/mac80211/rc80211_minstrel_ht.h
--+++ b/net/mac80211/rc80211_minstrel_ht.h
--@@ -69,6 +69,8 @@
-- #define MI_RATE_IDX(_rate) FIELD_GET(MI_RATE_IDX_MASK, _rate)
-- #define MI_RATE_GROUP(_rate) FIELD_GET(MI_RATE_GROUP_MASK, _rate)
-- 
--+#define MINSTREL_SAMPLE_RATES		5 /* rates per sample type */
--+#define MINSTREL_SAMPLE_INTERVAL	(HZ / 50)
-- 
-- struct minstrel_priv {
-- 	struct ieee80211_hw *hw;
--@@ -126,6 +128,13 @@ struct minstrel_rate_stats {
-- 	bool retry_updated;
-- };
-- 
--+enum minstrel_sample_type {
--+	MINSTREL_SAMPLE_TYPE_INC,
--+	MINSTREL_SAMPLE_TYPE_JUMP,
--+	MINSTREL_SAMPLE_TYPE_SLOW,
--+	__MINSTREL_SAMPLE_TYPE_MAX
--+};
--+
-- struct minstrel_mcs_group_data {
-- 	u8 index;
-- 	u8 column;
--@@ -144,6 +153,12 @@ enum minstrel_sample_mode {
-- 	MINSTREL_SAMPLE_PENDING,
-- };
-- 
--+struct minstrel_sample_category {
--+	u8 sample_group;
--+	u16 sample_rates[MINSTREL_SAMPLE_RATES];
--+	u16 cur_sample_rates[MINSTREL_SAMPLE_RATES];
--+};
--+
-- struct minstrel_ht_sta {
-- 	struct ieee80211_sta *sta;
-- 
--@@ -175,16 +190,14 @@ struct minstrel_ht_sta {
-- 	/* tx flags to add for frames for this sta */
-- 	u32 tx_flags;
-- 
---	u8 sample_wait;
---	u8 sample_tries;
---	u8 sample_count;
--+	unsigned long sample_time;
--+	struct minstrel_sample_category sample[__MINSTREL_SAMPLE_TYPE_MAX];
--+
--+	u8 sample_seq;
-- 
-- 	enum minstrel_sample_mode sample_mode;
-- 	u16 sample_rate;
-- 
---	/* current MCS group to be sampled */
---	u8 sample_group;
---
-- 	u8 band;
-- 
-- 	/* Bitfield of supported MCS rates of all groups */
-diff --git a/package/kernel/mac80211/patches/subsys/350-mac80211-minstrel_ht-show-sampling-rates-in-debugfs.patch b/package/kernel/mac80211/patches/subsys/350-mac80211-minstrel_ht-show-sampling-rates-in-debugfs.patch
-deleted file mode 100644
-index 041ba31a37..0000000000
---- a/package/kernel/mac80211/patches/subsys/350-mac80211-minstrel_ht-show-sampling-rates-in-debugfs.patch
-+++ /dev/null
-@@ -1,58 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Sat, 23 Jan 2021 00:10:34 +0100
--Subject: [PATCH] mac80211: minstrel_ht: show sampling rates in debugfs
--
--This makes it easier to see what rates are going to be tested next
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/rc80211_minstrel_ht_debugfs.c
--+++ b/net/mac80211/rc80211_minstrel_ht_debugfs.c
--@@ -32,6 +32,18 @@ minstrel_stats_release(struct inode *ino
-- 	return 0;
-- }
-- 
--+static bool
--+minstrel_ht_is_sample_rate(struct minstrel_ht_sta *mi, int idx)
--+{
--+	int type, i;
--+
--+	for (type = 0; type < ARRAY_SIZE(mi->sample); type++)
--+		for (i = 0; i < MINSTREL_SAMPLE_RATES; i++)
--+			if (mi->sample[type].cur_sample_rates[i] == idx)
--+				return true;
--+	return false;
--+}
--+
-- static char *
-- minstrel_ht_stats_dump(struct minstrel_ht_sta *mi, int i, char *p)
-- {
--@@ -84,6 +96,7 @@ minstrel_ht_stats_dump(struct minstrel_h
-- 		*(p++) = (idx == mi->max_tp_rate[2]) ? 'C' : ' ';
-- 		*(p++) = (idx == mi->max_tp_rate[3]) ? 'D' : ' ';
-- 		*(p++) = (idx == mi->max_prob_rate) ? 'P' : ' ';
--+		*(p++) = minstrel_ht_is_sample_rate(mi, idx) ? 'S' : ' ';
-- 
-- 		if (gflags & IEEE80211_TX_RC_MCS) {
-- 			p += sprintf(p, "  MCS%-2u", (mg->streams - 1) * 8 + j);
--@@ -145,9 +158,9 @@ minstrel_ht_stats_open(struct inode *ino
-- 
-- 	p += sprintf(p, "\n");
-- 	p += sprintf(p,
---		     "              best   ____________rate__________    ____statistics___    _____last____    ______sum-of________\n");
--+		     "              best    ____________rate__________    ____statistics___    _____last____    ______sum-of________\n");
-- 	p += sprintf(p,
---		     "mode guard #  rate  [name   idx airtime  max_tp]  [avg(tp) avg(prob)]  [retry|suc|att]  [#success | #attempts]\n");
--+		     "mode guard #  rate   [name   idx airtime  max_tp]  [avg(tp) avg(prob)]  [retry|suc|att]  [#success | #attempts]\n");
-- 
-- 	p = minstrel_ht_stats_dump(mi, MINSTREL_CCK_GROUP, p);
-- 	for (i = 0; i < MINSTREL_CCK_GROUP; i++)
--@@ -228,6 +241,7 @@ minstrel_ht_stats_csv_dump(struct minstr
-- 		p += sprintf(p, "%s" ,((idx == mi->max_tp_rate[2]) ? "C" : ""));
-- 		p += sprintf(p, "%s" ,((idx == mi->max_tp_rate[3]) ? "D" : ""));
-- 		p += sprintf(p, "%s" ,((idx == mi->max_prob_rate) ? "P" : ""));
--+		p += sprintf(p, "%s", (minstrel_ht_is_sample_rate(mi, idx) ? "S" : ""));
-- 
-- 		if (gflags & IEEE80211_TX_RC_MCS) {
-- 			p += sprintf(p, ",MCS%-2u,", (mg->streams - 1) * 8 + j);
-diff --git a/package/kernel/mac80211/patches/subsys/351-mac80211-minstrel_ht-remove-sample-rate-switching-co.patch b/package/kernel/mac80211/patches/subsys/351-mac80211-minstrel_ht-remove-sample-rate-switching-co.patch
-deleted file mode 100644
-index 8170ff85f8..0000000000
---- a/package/kernel/mac80211/patches/subsys/351-mac80211-minstrel_ht-remove-sample-rate-switching-co.patch
-+++ /dev/null
-@@ -1,279 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Sat, 23 Jan 2021 07:18:26 +0100
--Subject: [PATCH] mac80211: minstrel_ht: remove sample rate switching code for
-- constrained devices
--
--This was added to mitigate the effects of too much sampling on devices that
--use a static global fallback table instead of configurable multi-rate retry.
--Now that the sampling algorithm is improved, this code path no longer performs
--any better than the standard probing on affected devices.
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/rc80211_minstrel_ht.c
--+++ b/net/mac80211/rc80211_minstrel_ht.c
--@@ -648,27 +648,6 @@ __minstrel_ht_get_sample_rate(struct min
-- 	return 0;
-- }
-- 
---static void
---minstrel_ht_rate_sample_switch(struct minstrel_priv *mp,
---			       struct minstrel_ht_sta *mi)
---{
---	u16 rate;
---
---	/*
---	 * Use rate switching instead of probing packets for devices with
---	 * little control over retry fallback behavior
---	 */
---	if (mp->hw->max_rates > 1)
---		return;
---
---	rate = __minstrel_ht_get_sample_rate(mi, MINSTREL_SAMPLE_TYPE_INC);
---	if (!rate)
---		return;
---
---	mi->sample_rate = rate;
---	mi->sample_mode = MINSTREL_SAMPLE_ACTIVE;
---}
---
-- static inline int
-- minstrel_ewma(int old, int new, int weight)
-- {
--@@ -1012,8 +991,7 @@ minstrel_ht_refill_sample_rates(struct m
--  *    higher throughput rates, even if the probablity is a bit lower
--  */
-- static void
---minstrel_ht_update_stats(struct minstrel_priv *mp, struct minstrel_ht_sta *mi,
---			 bool sample)
--+minstrel_ht_update_stats(struct minstrel_priv *mp, struct minstrel_ht_sta *mi)
-- {
-- 	struct minstrel_mcs_group_data *mg;
-- 	struct minstrel_rate_stats *mrs;
--@@ -1023,18 +1001,6 @@ minstrel_ht_update_stats(struct minstrel
-- 	u16 index;
-- 	bool ht_supported = mi->sta->ht_cap.ht_supported;
-- 
---	mi->sample_mode = MINSTREL_SAMPLE_IDLE;
---
---	if (sample) {
---		mi->total_packets_cur = mi->total_packets -
---					mi->total_packets_last;
---		mi->total_packets_last = mi->total_packets;
---	}
---	if (!mp->sample_switch)
---		sample = false;
---	if (mi->total_packets_cur < SAMPLE_SWITCH_THR && mp->sample_switch != 1)
---	    sample = false;
---
-- 	if (mi->ampdu_packets > 0) {
-- 		if (!ieee80211_hw_check(mp->hw, TX_STATUS_NO_AMPDU_LEN))
-- 			mi->avg_ampdu_len = minstrel_ewma(mi->avg_ampdu_len,
--@@ -1148,16 +1114,12 @@ minstrel_ht_update_stats(struct minstrel
-- 	minstrel_ht_prob_rate_reduce_streams(mi);
-- 	minstrel_ht_refill_sample_rates(mi);
-- 
---	if (sample)
---		minstrel_ht_rate_sample_switch(mp, mi);
---
-- #ifdef CPTCFG_MAC80211_DEBUGFS
-- 	/* use fixed index if set */
-- 	if (mp->fixed_rate_idx != -1) {
-- 		for (i = 0; i < 4; i++)
-- 			mi->max_tp_rate[i] = mp->fixed_rate_idx;
-- 		mi->max_prob_rate = mp->fixed_rate_idx;
---		mi->sample_mode = MINSTREL_SAMPLE_IDLE;
-- 	}
-- #endif
-- 
--@@ -1247,11 +1209,10 @@ minstrel_ht_tx_status(void *priv, struct
-- 	struct ieee80211_tx_info *info = st->info;
-- 	struct minstrel_ht_sta *mi = priv_sta;
-- 	struct ieee80211_tx_rate *ar = info->status.rates;
---	struct minstrel_rate_stats *rate, *rate2, *rate_sample = NULL;
--+	struct minstrel_rate_stats *rate, *rate2;
-- 	struct minstrel_priv *mp = priv;
-- 	u32 update_interval = mp->update_interval;
-- 	bool last, update = false;
---	bool sample_status = false;
-- 	int i;
-- 
-- 	/* This packet was aggregated but doesn't carry status info */
--@@ -1278,49 +1239,18 @@ minstrel_ht_tx_status(void *priv, struct
-- 	mi->ampdu_packets++;
-- 	mi->ampdu_len += info->status.ampdu_len;
-- 
---	if (mi->sample_mode != MINSTREL_SAMPLE_IDLE)
---		rate_sample = minstrel_get_ratestats(mi, mi->sample_rate);
---
-- 	last = !minstrel_ht_txstat_valid(mp, mi, &ar[0]);
-- 	for (i = 0; !last; i++) {
-- 		last = (i == IEEE80211_TX_MAX_RATES - 1) ||
-- 		       !minstrel_ht_txstat_valid(mp, mi, &ar[i + 1]);
-- 
-- 		rate = minstrel_ht_get_stats(mp, mi, &ar[i]);
---		if (rate == rate_sample)
---			sample_status = true;
---
-- 		if (last)
-- 			rate->success += info->status.ampdu_ack_len;
-- 
-- 		rate->attempts += ar[i].count * info->status.ampdu_len;
-- 	}
-- 
---	switch (mi->sample_mode) {
---	case MINSTREL_SAMPLE_IDLE:
---		if (mp->hw->max_rates > 1 ||
---		     mi->total_packets_cur < SAMPLE_SWITCH_THR)
---			update_interval /= 2;
---		break;
---
---	case MINSTREL_SAMPLE_ACTIVE:
---		if (!sample_status)
---			break;
---
---		mi->sample_mode = MINSTREL_SAMPLE_PENDING;
---		update = true;
---		break;
---
---	case MINSTREL_SAMPLE_PENDING:
---		if (sample_status)
---			break;
---
---		update = true;
---		minstrel_ht_update_stats(mp, mi, false);
---		break;
---	}
---
---
-- 	if (mp->hw->max_rates > 1) {
-- 		/*
-- 		 * check for sudden death of spatial multiplexing,
--@@ -1343,7 +1273,7 @@ minstrel_ht_tx_status(void *priv, struct
-- 
-- 	if (time_after(jiffies, mi->last_stats_update + update_interval)) {
-- 		update = true;
---		minstrel_ht_update_stats(mp, mi, true);
--+		minstrel_ht_update_stats(mp, mi);
-- 	}
-- 
-- 	if (update)
--@@ -1522,18 +1452,14 @@ static void
-- minstrel_ht_update_rates(struct minstrel_priv *mp, struct minstrel_ht_sta *mi)
-- {
-- 	struct ieee80211_sta_rates *rates;
---	u16 first_rate = mi->max_tp_rate[0];
-- 	int i = 0;
-- 
---	if (mi->sample_mode == MINSTREL_SAMPLE_ACTIVE)
---		first_rate = mi->sample_rate;
---
-- 	rates = kzalloc(sizeof(*rates), GFP_ATOMIC);
-- 	if (!rates)
-- 		return;
-- 
-- 	/* Start with max_tp_rate[0] */
---	minstrel_ht_set_rate(mp, mi, rates, i++, first_rate);
--+	minstrel_ht_set_rate(mp, mi, rates, i++, mi->max_tp_rate[0]);
-- 
-- 	if (mp->hw->max_rates >= 3) {
-- 		/* At least 3 tx rates supported, use max_tp_rate[1] next */
--@@ -1592,11 +1518,6 @@ minstrel_ht_get_rate(void *priv, struct
-- 	    (info->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO))
-- 		return;
-- 
---	if (mp->hw->max_rates == 1 && mp->sample_switch &&
---	    (mi->total_packets_cur >= SAMPLE_SWITCH_THR ||
---	     mp->sample_switch == 1))
---		return;
---
-- 	if (time_is_before_jiffies(mi->sample_time))
-- 		return;
-- 
--@@ -1810,7 +1731,7 @@ minstrel_ht_update_caps(void *priv, stru
-- 	minstrel_ht_update_ofdm(mp, mi, sband, sta);
-- 
-- 	/* create an initial rate table with the lowest supported rates */
---	minstrel_ht_update_stats(mp, mi, true);
--+	minstrel_ht_update_stats(mp, mi);
-- 	minstrel_ht_update_rates(mp, mi);
-- }
-- 
--@@ -1926,8 +1847,6 @@ minstrel_ht_alloc(struct ieee80211_hw *h
-- 	if (!mp)
-- 		return NULL;
-- 
---	mp->sample_switch = -1;
---
-- 	/* contention window settings
-- 	 * Just an approximation. Using the per-queue values would complicate
-- 	 * the calculations and is probably unnecessary */
--@@ -1947,7 +1866,7 @@ minstrel_ht_alloc(struct ieee80211_hw *h
-- 		mp->has_mrr = true;
-- 
-- 	mp->hw = hw;
---	mp->update_interval = HZ / 10;
--+	mp->update_interval = HZ / 20;
-- 
-- 	minstrel_ht_init_cck_rates(mp);
-- 	for (i = 0; i < ARRAY_SIZE(mp->hw->wiphy->bands); i++)
--@@ -1965,8 +1884,6 @@ static void minstrel_ht_add_debugfs(stru
-- 	mp->fixed_rate_idx = (u32) -1;
-- 	debugfs_create_u32("fixed_rate_idx", S_IRUGO | S_IWUGO, debugfsdir,
-- 			   &mp->fixed_rate_idx);
---	debugfs_create_u32("sample_switch", S_IRUGO | S_IWUSR, debugfsdir,
---			   &mp->sample_switch);
-- }
-- #endif
-- 
----- a/net/mac80211/rc80211_minstrel_ht.h
--+++ b/net/mac80211/rc80211_minstrel_ht.h
--@@ -75,7 +75,6 @@
-- struct minstrel_priv {
-- 	struct ieee80211_hw *hw;
-- 	bool has_mrr;
---	u32 sample_switch;
-- 	unsigned int cw_min;
-- 	unsigned int cw_max;
-- 	unsigned int max_retry;
--@@ -147,12 +146,6 @@ struct minstrel_mcs_group_data {
-- 	struct minstrel_rate_stats rates[MCS_GROUP_RATES];
-- };
-- 
---enum minstrel_sample_mode {
---	MINSTREL_SAMPLE_IDLE,
---	MINSTREL_SAMPLE_ACTIVE,
---	MINSTREL_SAMPLE_PENDING,
---};
---
-- struct minstrel_sample_category {
-- 	u8 sample_group;
-- 	u16 sample_rates[MINSTREL_SAMPLE_RATES];
--@@ -182,23 +175,19 @@ struct minstrel_ht_sta {
-- 	unsigned int overhead_legacy;
-- 	unsigned int overhead_legacy_rtscts;
-- 
---	unsigned int total_packets_last;
---	unsigned int total_packets_cur;
-- 	unsigned int total_packets;
-- 	unsigned int sample_packets;
-- 
-- 	/* tx flags to add for frames for this sta */
-- 	u32 tx_flags;
-- 
---	unsigned long sample_time;
---	struct minstrel_sample_category sample[__MINSTREL_SAMPLE_TYPE_MAX];
--+	u8 band;
-- 
-- 	u8 sample_seq;
---
---	enum minstrel_sample_mode sample_mode;
-- 	u16 sample_rate;
-- 
---	u8 band;
--+	unsigned long sample_time;
--+	struct minstrel_sample_category sample[__MINSTREL_SAMPLE_TYPE_MAX];
-- 
-- 	/* Bitfield of supported MCS rates of all groups */
-- 	u16 supported[MINSTREL_GROUPS_NB];
-diff --git a/package/kernel/mac80211/patches/subsys/352-mac80211-minstrel_ht-fix-regression-in-the-max_prob_.patch b/package/kernel/mac80211/patches/subsys/352-mac80211-minstrel_ht-fix-regression-in-the-max_prob_.patch
-deleted file mode 100644
-index a366a921d4..0000000000
---- a/package/kernel/mac80211/patches/subsys/352-mac80211-minstrel_ht-fix-regression-in-the-max_prob_.patch
-+++ /dev/null
-@@ -1,23 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Tue, 26 Jan 2021 16:40:52 +0100
--Subject: [PATCH] mac80211: minstrel_ht: fix regression in the max_prob_rate
-- fix
--
--Since mi->max_prob_rate is overwritten after the loop that calls
--minstrel_ht_set_best_prob_rate, the new best rate needs to be written to *dest
--
--Fixes: a7fca4e4037f ("mac80211: minstrel_ht: fix max probability rate selection")
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/rc80211_minstrel_ht.c
--+++ b/net/mac80211/rc80211_minstrel_ht.c
--@@ -545,7 +545,7 @@ minstrel_ht_set_best_prob_rate(struct mi
-- 		cur_tp_avg = minstrel_ht_get_tp_avg(mi, cur_group, cur_idx,
-- 						    mrs->prob_avg);
-- 		if (cur_tp_avg > tmp_tp_avg)
---			mi->max_prob_rate = index;
--+			*dest = index;
-- 
-- 		max_gpr_tp_avg = minstrel_ht_get_tp_avg(mi, max_gpr_group,
-- 							max_gpr_idx,
-diff --git a/package/kernel/mac80211/patches/subsys/355-mac80211-minstrel_ht-rework-rate-downgrade-code-and-.patch b/package/kernel/mac80211/patches/subsys/355-mac80211-minstrel_ht-rework-rate-downgrade-code-and-.patch
-index aec2e07781..a6817bd4a6 100644
---- a/package/kernel/mac80211/patches/subsys/355-mac80211-minstrel_ht-rework-rate-downgrade-code-and-.patch
-+++ b/package/kernel/mac80211/patches/subsys/355-mac80211-minstrel_ht-rework-rate-downgrade-code-and-.patch
-@@ -86,7 +86,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
-  static u16
-  __minstrel_ht_get_sample_rate(struct minstrel_ht_sta *mi,
-  			      enum minstrel_sample_type type)
--@@ -1111,8 +1080,6 @@ minstrel_ht_update_stats(struct minstrel
-+@@ -1107,8 +1076,6 @@ minstrel_ht_update_stats(struct minstrel
-  
-  	mi->max_prob_rate = tmp_max_prob_rate;
-  
-@@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
-  	minstrel_ht_refill_sample_rates(mi);
-  
-  #ifdef CPTCFG_MAC80211_DEBUGFS
--@@ -1157,7 +1124,7 @@ minstrel_ht_txstat_valid(struct minstrel
-+@@ -1153,7 +1120,7 @@ minstrel_ht_txstat_valid(struct minstrel
-  }
-  
-  static void
-@@ -104,7 +104,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
-  {
-  	int group, orig_group;
-  
--@@ -1172,11 +1139,7 @@ minstrel_downgrade_rate(struct minstrel_
-+@@ -1168,11 +1135,7 @@ minstrel_downgrade_rate(struct minstrel_
-  		    minstrel_mcs_groups[orig_group].streams)
-  			continue;
-  
-@@ -117,7 +117,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
-  	}
-  }
-  
--@@ -1210,7 +1173,7 @@ minstrel_ht_tx_status(void *priv, struct
-+@@ -1183,7 +1146,7 @@ minstrel_ht_tx_status(void *priv, struct
-  	struct ieee80211_tx_info *info = st->info;
-  	struct minstrel_ht_sta *mi = priv_sta;
-  	struct ieee80211_tx_rate *ar = info->status.rates;
-@@ -126,7 +126,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
-  	struct minstrel_priv *mp = priv;
-  	u32 update_interval = mp->update_interval;
-  	bool last, update = false;
--@@ -1256,18 +1219,13 @@ minstrel_ht_tx_status(void *priv, struct
-+@@ -1233,18 +1196,13 @@ minstrel_ht_tx_status(void *priv, struct
-  		/*
-  		 * check for sudden death of spatial multiplexing,
-  		 * downgrade to a lower number of streams if necessary.
-diff --git a/package/kernel/mac80211/patches/subsys/371-mac80211-don-t-apply-flow-control-on-management-fram.patch b/package/kernel/mac80211/patches/subsys/371-mac80211-don-t-apply-flow-control-on-management-fram.patch
-deleted file mode 100644
-index 3ce6ceacd5..0000000000
---- a/package/kernel/mac80211/patches/subsys/371-mac80211-don-t-apply-flow-control-on-management-fram.patch
-+++ /dev/null
-@@ -1,60 +0,0 @@
--From: Johannes Berg <johannes.berg@intel.com>
--Date: Fri, 19 Mar 2021 23:28:01 +0100
--Subject: [PATCH] mac80211: don't apply flow control on management frames
--
--In some cases (depending on the driver, but it's true e.g. for
--iwlwifi) we're using an internal TXQ for management packets,
--mostly to simplify the code and to have a place to queue them.
--However, it appears that in certain cases we can confuse the
--code and management frames are dropped, which is certainly not
--what we want.
--
--Short-circuit the processing of management frames. To keep the
--impact minimal, only put them on the frags queue and check the
--tid == management only for doing that and to skip the airtime
--fairness checks, if applicable.
--
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/net/mac80211/tx.c
--+++ b/net/mac80211/tx.c
--@@ -5,7 +5,7 @@
--  * Copyright 2006-2007	Jiri Benc <jbenc@suse.cz>
--  * Copyright 2007	Johannes Berg <johannes@sipsolutions.net>
--  * Copyright 2013-2014  Intel Mobile Communications GmbH
--- * Copyright (C) 2018-2020 Intel Corporation
--+ * Copyright (C) 2018-2021 Intel Corporation
--  *
--  * Transmit and frame generation functions.
--  */
--@@ -1401,8 +1401,17 @@ static void ieee80211_txq_enqueue(struct
-- 	ieee80211_set_skb_enqueue_time(skb);
-- 
-- 	spin_lock_bh(&fq->lock);
---	fq_tin_enqueue(fq, tin, flow_idx, skb,
---		       fq_skb_free_func);
--+	/*
--+	 * For management frames, don't really apply codel etc.,
--+	 * we don't want to apply any shaping or anything we just
--+	 * want to simplify the driver API by having them on the
--+	 * txqi.
--+	 */
--+	if (unlikely(txqi->txq.tid == IEEE80211_NUM_TIDS))
--+		__skb_queue_tail(&txqi->frags, skb);
--+	else
--+		fq_tin_enqueue(fq, tin, flow_idx, skb,
--+			       fq_skb_free_func);
-- 	spin_unlock_bh(&fq->lock);
-- }
-- 
--@@ -3866,6 +3875,9 @@ bool ieee80211_txq_airtime_check(struct
-- 	if (!txq->sta)
-- 		return true;
-- 
--+	if (unlikely(txq->tid == IEEE80211_NUM_TIDS))
--+		return true;
--+
-- 	sta = container_of(txq->sta, struct sta_info, sta);
-- 	if (atomic_read(&sta->airtime[txq->ac].aql_tx_pending) <
-- 	    sta->airtime[txq->ac].aql_limit_low)
-diff --git a/package/kernel/mac80211/patches/subsys/372-mac80211-set-sk_pacing_shift-for-802.3-txpath.patch b/package/kernel/mac80211/patches/subsys/372-mac80211-set-sk_pacing_shift-for-802.3-txpath.patch
-deleted file mode 100644
-index c8f3047a34..0000000000
---- a/package/kernel/mac80211/patches/subsys/372-mac80211-set-sk_pacing_shift-for-802.3-txpath.patch
-+++ /dev/null
-@@ -1,21 +0,0 @@
--From: Lorenzo Bianconi <lorenzo@kernel.org>
--Date: Mon, 8 Mar 2021 23:01:49 +0100
--Subject: [PATCH] mac80211: set sk_pacing_shift for 802.3 txpath
--
--Similar to 802.11 txpath, set socket sk_pacing_shift for 802.3 tx path.
--
--Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
-----
--
----- a/net/mac80211/tx.c
--+++ b/net/mac80211/tx.c
--@@ -4193,6 +4193,9 @@ static bool ieee80211_tx_8023(struct iee
-- 	unsigned long flags;
-- 	int q = info->hw_queue;
-- 
--+	if (sta)
--+		sk_pacing_shift_update(skb->sk, local->hw.tx_sk_pacing_shift);
--+
-- 	if (ieee80211_queue_skb(local, sdata, sta, skb))
-- 		return true;
-- 
-diff --git a/package/kernel/mac80211/patches/subsys/373-mac80211-support-Rx-timestamp-calculation-for-all-pr.patch b/package/kernel/mac80211/patches/subsys/373-mac80211-support-Rx-timestamp-calculation-for-all-pr.patch
-deleted file mode 100644
-index 117fb35fcf..0000000000
---- a/package/kernel/mac80211/patches/subsys/373-mac80211-support-Rx-timestamp-calculation-for-all-pr.patch
-+++ /dev/null
-@@ -1,134 +0,0 @@
--From: Avraham Stern <avraham.stern@intel.com>
--Date: Sun, 6 Dec 2020 14:54:45 +0200
--Subject: [PATCH] mac80211: support Rx timestamp calculation for all preamble
-- types
--
--Add support for calculating the Rx timestamp for HE frames.
--Since now all frame types are supported, allow setting the Rx
--timestamp regardless of the frame type.
--
--Signed-off-by: Avraham Stern <avraham.stern@intel.com>
--Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
--Link: https://lore.kernel.org/r/iwlwifi.20201206145305.4786559af475.Ia54486bb0a12e5351f9d5c60ef6fcda7c9e7141c@changeid
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/net/mac80211/ieee80211_i.h
--+++ b/net/mac80211/ieee80211_i.h
--@@ -1587,13 +1587,8 @@ ieee80211_have_rx_timestamp(struct ieee8
-- {
-- 	WARN_ON_ONCE(status->flag & RX_FLAG_MACTIME_START &&
-- 		     status->flag & RX_FLAG_MACTIME_END);
---	if (status->flag & (RX_FLAG_MACTIME_START | RX_FLAG_MACTIME_END))
---		return true;
---	/* can't handle non-legacy preamble yet */
---	if (status->flag & RX_FLAG_MACTIME_PLCP_START &&
---	    status->encoding == RX_ENC_LEGACY)
---		return true;
---	return false;
--+	return !!(status->flag & (RX_FLAG_MACTIME_START | RX_FLAG_MACTIME_END |
--+				  RX_FLAG_MACTIME_PLCP_START));
-- }
-- 
-- void ieee80211_vif_inc_num_mcast(struct ieee80211_sub_if_data *sdata);
----- a/net/mac80211/util.c
--+++ b/net/mac80211/util.c
--@@ -3665,6 +3665,7 @@ u64 ieee80211_calculate_rx_timestamp(str
-- 	u64 ts = status->mactime;
-- 	struct rate_info ri;
-- 	u16 rate;
--+	u8 n_ltf;
-- 
-- 	if (WARN_ON(!ieee80211_have_rx_timestamp(status)))
-- 		return 0;
--@@ -3675,11 +3676,58 @@ u64 ieee80211_calculate_rx_timestamp(str
-- 
-- 	/* Fill cfg80211 rate info */
-- 	switch (status->encoding) {
--+	case RX_ENC_HE:
--+		ri.flags |= RATE_INFO_FLAGS_HE_MCS;
--+		ri.mcs = status->rate_idx;
--+		ri.nss = status->nss;
--+		ri.he_ru_alloc = status->he_ru;
--+		if (status->enc_flags & RX_ENC_FLAG_SHORT_GI)
--+			ri.flags |= RATE_INFO_FLAGS_SHORT_GI;
--+
--+		/*
--+		 * See P802.11ax_D6.0, section 27.3.4 for
--+		 * VHT PPDU format.
--+		 */
--+		if (status->flag & RX_FLAG_MACTIME_PLCP_START) {
--+			mpdu_offset += 2;
--+			ts += 36;
--+
--+			/*
--+			 * TODO:
--+			 * For HE MU PPDU, add the HE-SIG-B.
--+			 * For HE ER PPDU, add 8us for the HE-SIG-A.
--+			 * For HE TB PPDU, add 4us for the HE-STF.
--+			 * Add the HE-LTF durations - variable.
--+			 */
--+		}
--+
--+		break;
-- 	case RX_ENC_HT:
-- 		ri.mcs = status->rate_idx;
-- 		ri.flags |= RATE_INFO_FLAGS_MCS;
-- 		if (status->enc_flags & RX_ENC_FLAG_SHORT_GI)
-- 			ri.flags |= RATE_INFO_FLAGS_SHORT_GI;
--+
--+		/*
--+		 * See P802.11REVmd_D3.0, section 19.3.2 for
--+		 * HT PPDU format.
--+		 */
--+		if (status->flag & RX_FLAG_MACTIME_PLCP_START) {
--+			mpdu_offset += 2;
--+			if (status->enc_flags & RX_ENC_FLAG_HT_GF)
--+				ts += 24;
--+			else
--+				ts += 32;
--+
--+			/*
--+			 * Add Data HT-LTFs per streams
--+			 * TODO: add Extension HT-LTFs, 4us per LTF
--+			 */
--+			n_ltf = ((ri.mcs >> 3) & 3) + 1;
--+			n_ltf = n_ltf == 3 ? 4 : n_ltf;
--+			ts += n_ltf * 4;
--+		}
--+
-- 		break;
-- 	case RX_ENC_VHT:
-- 		ri.flags |= RATE_INFO_FLAGS_VHT_MCS;
--@@ -3687,6 +3735,23 @@ u64 ieee80211_calculate_rx_timestamp(str
-- 		ri.nss = status->nss;
-- 		if (status->enc_flags & RX_ENC_FLAG_SHORT_GI)
-- 			ri.flags |= RATE_INFO_FLAGS_SHORT_GI;
--+
--+		/*
--+		 * See P802.11REVmd_D3.0, section 21.3.2 for
--+		 * VHT PPDU format.
--+		 */
--+		if (status->flag & RX_FLAG_MACTIME_PLCP_START) {
--+			mpdu_offset += 2;
--+			ts += 36;
--+
--+			/*
--+			 * Add VHT-LTFs per streams
--+			 */
--+			n_ltf = (ri.nss != 1) && (ri.nss % 2) ?
--+				ri.nss + 1 : ri.nss;
--+			ts += 4 * n_ltf;
--+		}
--+
-- 		break;
-- 	default:
-- 		WARN_ON(1);
--@@ -3710,7 +3775,6 @@ u64 ieee80211_calculate_rx_timestamp(str
-- 		ri.legacy = DIV_ROUND_UP(bitrate, (1 << shift));
-- 
-- 		if (status->flag & RX_FLAG_MACTIME_PLCP_START) {
---			/* TODO: handle HT/VHT preambles */
-- 			if (status->band == NL80211_BAND_5GHZ) {
-- 				ts += 20 << shift;
-- 				mpdu_offset += 2;
-diff --git a/package/kernel/mac80211/patches/subsys/374-mac80211-move-A-MPDU-session-check-from-minstrel_ht-.patch b/package/kernel/mac80211/patches/subsys/374-mac80211-move-A-MPDU-session-check-from-minstrel_ht-.patch
-deleted file mode 100644
-index 07f5bb5263..0000000000
---- a/package/kernel/mac80211/patches/subsys/374-mac80211-move-A-MPDU-session-check-from-minstrel_ht-.patch
-+++ /dev/null
-@@ -1,126 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Thu, 17 Jun 2021 17:56:54 +0200
--Subject: [PATCH] mac80211: move A-MPDU session check from minstrel_ht to
-- mac80211
--
--This avoids calling back into tx handlers from within the rate control module.
--Preparation for deferring rate control until tx dequeue
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/include/net/mac80211.h
--+++ b/include/net/mac80211.h
--@@ -6160,6 +6160,11 @@ enum rate_control_capabilities {
-- 	 * otherwise the NSS difference doesn't bother us.
-- 	 */
-- 	RATE_CTRL_CAPA_VHT_EXT_NSS_BW = BIT(0),
--+	/**
--+	 * @RATE_CTRL_CAPA_AMPDU_TRIGGER:
--+	 * mac80211 should start A-MPDU sessions on tx
--+	 */
--+	RATE_CTRL_CAPA_AMPDU_TRIGGER = BIT(1),
-- };
-- 
-- struct rate_control_ops {
----- a/net/mac80211/rc80211_minstrel_ht.c
--+++ b/net/mac80211/rc80211_minstrel_ht.c
--@@ -1144,29 +1144,6 @@ minstrel_downgrade_prob_rate(struct mins
-- }
-- 
-- static void
---minstrel_aggr_check(struct ieee80211_sta *pubsta, struct sk_buff *skb)
---{
---	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
---	struct sta_info *sta = container_of(pubsta, struct sta_info, sta);
---	u16 tid;
---
---	if (skb_get_queue_mapping(skb) == IEEE80211_AC_VO)
---		return;
---
---	if (unlikely(!ieee80211_is_data_qos(hdr->frame_control)))
---		return;
---
---	if (unlikely(skb->protocol == cpu_to_be16(ETH_P_PAE)))
---		return;
---
---	tid = ieee80211_get_tid(hdr);
---	if (likely(sta->ampdu_mlme.tid_tx[tid]))
---		return;
---
---	ieee80211_start_tx_ba_session(pubsta, tid, 0);
---}
---
---static void
-- minstrel_ht_tx_status(void *priv, struct ieee80211_supported_band *sband,
--                       void *priv_sta, struct ieee80211_tx_status *st)
-- {
--@@ -1461,10 +1438,6 @@ minstrel_ht_get_rate(void *priv, struct
-- 	struct minstrel_priv *mp = priv;
-- 	u16 sample_idx;
-- 
---	if (!(info->flags & IEEE80211_TX_CTL_AMPDU) &&
---	    !minstrel_ht_is_legacy_group(MI_RATE_GROUP(mi->max_prob_rate)))
---		minstrel_aggr_check(sta, txrc->skb);
---
-- 	info->flags |= mi->tx_flags;
-- 
-- #ifdef CPTCFG_MAC80211_DEBUGFS
--@@ -1870,6 +1843,7 @@ static u32 minstrel_ht_get_expected_thro
-- 
-- static const struct rate_control_ops mac80211_minstrel_ht = {
-- 	.name = "minstrel_ht",
--+	.capa = RATE_CTRL_CAPA_AMPDU_TRIGGER,
-- 	.tx_status_ext = minstrel_ht_tx_status,
-- 	.get_rate = minstrel_ht_get_rate,
-- 	.rate_init = minstrel_ht_rate_init,
----- a/net/mac80211/tx.c
--+++ b/net/mac80211/tx.c
--@@ -3953,6 +3953,29 @@ void ieee80211_txq_schedule_start(struct
-- }
-- EXPORT_SYMBOL(ieee80211_txq_schedule_start);
-- 
--+static void
--+ieee80211_aggr_check(struct ieee80211_sub_if_data *sdata,
--+		     struct sta_info *sta,
--+		     struct sk_buff *skb)
--+{
--+	struct rate_control_ref *ref = sdata->local->rate_ctrl;
--+	u16 tid;
--+
--+	if (!ref || !(ref->ops->capa & RATE_CTRL_CAPA_AMPDU_TRIGGER))
--+		return;
--+
--+	if (!sta || !sta->sta.ht_cap.ht_supported ||
--+	    !sta->sta.wme || skb_get_queue_mapping(skb) == IEEE80211_AC_VO ||
--+	    skb->protocol == sdata->control_port_protocol)
--+		return;
--+
--+	tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
--+	if (likely(sta->ampdu_mlme.tid_tx[tid]))
--+		return;
--+
--+	ieee80211_start_tx_ba_session(&sta->sta, tid, 0);
--+}
--+
-- void __ieee80211_subif_start_xmit(struct sk_buff *skb,
-- 				  struct net_device *dev,
-- 				  u32 info_flags,
--@@ -3983,6 +4006,8 @@ void __ieee80211_subif_start_xmit(struct
-- 		skb_get_hash(skb);
-- 	}
-- 
--+	ieee80211_aggr_check(sdata, sta, skb);
--+
-- 	if (sta) {
-- 		struct ieee80211_fast_tx *fast_tx;
-- 
--@@ -4246,6 +4271,8 @@ static void ieee80211_8023_xmit(struct i
-- 
-- 	memset(info, 0, sizeof(*info));
-- 
--+	ieee80211_aggr_check(sdata, sta, skb);
--+
-- 	tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
-- 	tid_tx = rcu_dereference(sta->ampdu_mlme.tid_tx[tid]);
-- 	if (tid_tx) {
-diff --git a/package/kernel/mac80211/patches/subsys/375-mac80211-call-ieee80211_tx_h_rate_ctrl-when-dequeue.patch b/package/kernel/mac80211/patches/subsys/375-mac80211-call-ieee80211_tx_h_rate_ctrl-when-dequeue.patch
-deleted file mode 100644
-index 26f7f59296..0000000000
---- a/package/kernel/mac80211/patches/subsys/375-mac80211-call-ieee80211_tx_h_rate_ctrl-when-dequeue.patch
-+++ /dev/null
-@@ -1,114 +0,0 @@
--From: Ryder Lee <ryder.lee@mediatek.com>
--Date: Fri, 28 May 2021 14:05:41 +0800
--Subject: [PATCH] mac80211: call ieee80211_tx_h_rate_ctrl() when dequeue
--
--Make ieee80211_tx_h_rate_ctrl() get called on dequeue to improve
--performance since it reduces the turnaround time for rate control.
--
--Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
-----
--
----- a/net/mac80211/tx.c
--+++ b/net/mac80211/tx.c
--@@ -1778,8 +1778,6 @@ static int invoke_tx_handlers_early(stru
-- 	CALL_TXH(ieee80211_tx_h_ps_buf);
-- 	CALL_TXH(ieee80211_tx_h_check_control_port_protocol);
-- 	CALL_TXH(ieee80211_tx_h_select_key);
---	if (!ieee80211_hw_check(&tx->local->hw, HAS_RATE_CONTROL))
---		CALL_TXH(ieee80211_tx_h_rate_ctrl);
-- 
--  txh_done:
-- 	if (unlikely(res == TX_DROP)) {
--@@ -1812,6 +1810,9 @@ static int invoke_tx_handlers_late(struc
-- 		goto txh_done;
-- 	}
-- 
--+	if (!ieee80211_hw_check(&tx->local->hw, HAS_RATE_CONTROL))
--+		CALL_TXH(ieee80211_tx_h_rate_ctrl);
--+
-- 	CALL_TXH(ieee80211_tx_h_michael_mic_add);
-- 	CALL_TXH(ieee80211_tx_h_sequence);
-- 	CALL_TXH(ieee80211_tx_h_fragment);
--@@ -3404,15 +3405,21 @@ out:
--  * Can be called while the sta lock is held. Anything that can cause packets to
--  * be generated will cause deadlock!
--  */
---static void ieee80211_xmit_fast_finish(struct ieee80211_sub_if_data *sdata,
---				       struct sta_info *sta, u8 pn_offs,
---				       struct ieee80211_key *key,
---				       struct sk_buff *skb)
--+static ieee80211_tx_result
--+ieee80211_xmit_fast_finish(struct ieee80211_sub_if_data *sdata,
--+			   struct sta_info *sta, u8 pn_offs,
--+			   struct ieee80211_key *key,
--+			   struct ieee80211_tx_data *tx)
-- {
--+	struct sk_buff *skb = tx->skb;
-- 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
-- 	struct ieee80211_hdr *hdr = (void *)skb->data;
-- 	u8 tid = IEEE80211_NUM_TIDS;
-- 
--+	if (!ieee80211_hw_check(&tx->local->hw, HAS_RATE_CONTROL) &&
--+	    ieee80211_tx_h_rate_ctrl(tx) != TX_CONTINUE)
--+		return TX_DROP;
--+
-- 	if (key)
-- 		info->control.hw_key = &key->conf;
-- 
--@@ -3461,6 +3468,8 @@ static void ieee80211_xmit_fast_finish(s
-- 			break;
-- 		}
-- 	}
--+
--+	return TX_CONTINUE;
-- }
-- 
-- static bool ieee80211_xmit_fast(struct ieee80211_sub_if_data *sdata,
--@@ -3564,24 +3573,17 @@ static bool ieee80211_xmit_fast(struct i
-- 	tx.sta = sta;
-- 	tx.key = fast_tx->key;
-- 
---	if (!ieee80211_hw_check(&local->hw, HAS_RATE_CONTROL)) {
---		tx.skb = skb;
---		r = ieee80211_tx_h_rate_ctrl(&tx);
---		skb = tx.skb;
---		tx.skb = NULL;
---
---		if (r != TX_CONTINUE) {
---			if (r != TX_QUEUED)
---				kfree_skb(skb);
---			return true;
---		}
---	}
---
-- 	if (ieee80211_queue_skb(local, sdata, sta, skb))
-- 		return true;
-- 
---	ieee80211_xmit_fast_finish(sdata, sta, fast_tx->pn_offs,
---				   fast_tx->key, skb);
--+	tx.skb = skb;
--+	r = ieee80211_xmit_fast_finish(sdata, sta, fast_tx->pn_offs,
--+				       fast_tx->key, &tx);
--+	tx.skb = NULL;
--+	if (r == TX_DROP) {
--+		kfree_skb(skb);
--+		return true;
--+	}
-- 
-- 	if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
-- 		sdata = container_of(sdata->bss,
--@@ -3692,8 +3694,12 @@ begin:
-- 		    (tx.key->conf.flags & IEEE80211_KEY_FLAG_GENERATE_IV))
-- 			pn_offs = ieee80211_hdrlen(hdr->frame_control);
-- 
---		ieee80211_xmit_fast_finish(sta->sdata, sta, pn_offs,
---					   tx.key, skb);
--+		r = ieee80211_xmit_fast_finish(sta->sdata, sta, pn_offs,
--+					       tx.key, &tx);
--+		if (r != TX_CONTINUE) {
--+			ieee80211_free_txskb(&local->hw, skb);
--+			goto begin;
--+		}
-- 	} else {
-- 		if (invoke_tx_handlers_late(&tx))
-- 			goto begin;
-diff --git a/package/kernel/mac80211/patches/subsys/376-mac80211-add-rate-control-support-for-encap-offload.patch b/package/kernel/mac80211/patches/subsys/376-mac80211-add-rate-control-support-for-encap-offload.patch
-deleted file mode 100644
-index 5d390990cd..0000000000
---- a/package/kernel/mac80211/patches/subsys/376-mac80211-add-rate-control-support-for-encap-offload.patch
-+++ /dev/null
-@@ -1,126 +0,0 @@
--From: Ryder Lee <ryder.lee@mediatek.com>
--Date: Fri, 28 May 2021 14:05:43 +0800
--Subject: [PATCH] mac80211: add rate control support for encap offload
--
--The software rate control cannot deal with encap offload, so fix it.
--
--Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
-----
--
----- a/net/mac80211/rate.c
--+++ b/net/mac80211/rate.c
--@@ -297,15 +297,11 @@ void ieee80211_check_rate_mask(struct ie
-- static bool rc_no_data_or_no_ack_use_min(struct ieee80211_tx_rate_control *txrc)
-- {
-- 	struct sk_buff *skb = txrc->skb;
---	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
-- 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
---	__le16 fc;
---
---	fc = hdr->frame_control;
-- 
-- 	return (info->flags & (IEEE80211_TX_CTL_NO_ACK |
-- 			       IEEE80211_TX_CTL_USE_MINRATE)) ||
---		!ieee80211_is_data(fc);
--+		!ieee80211_is_tx_data(skb);
-- }
-- 
-- static void rc_send_low_basicrate(struct ieee80211_tx_rate *rate,
--@@ -870,7 +866,6 @@ void ieee80211_get_tx_rates(struct ieee8
-- 			    int max_rates)
-- {
-- 	struct ieee80211_sub_if_data *sdata;
---	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
-- 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
-- 	struct ieee80211_supported_band *sband;
-- 
--@@ -882,7 +877,7 @@ void ieee80211_get_tx_rates(struct ieee8
-- 	sdata = vif_to_sdata(vif);
-- 	sband = sdata->local->hw.wiphy->bands[info->band];
-- 
---	if (ieee80211_is_data(hdr->frame_control))
--+	if (ieee80211_is_tx_data(skb))
-- 		rate_control_apply_mask(sdata, sta, sband, dest, max_rates);
-- 
-- 	if (dest[0].idx < 0)
----- a/net/mac80211/tx.c
--+++ b/net/mac80211/tx.c
--@@ -679,6 +679,7 @@ ieee80211_tx_h_rate_ctrl(struct ieee8021
-- 	u32 len;
-- 	struct ieee80211_tx_rate_control txrc;
-- 	struct ieee80211_sta_rates *ratetbl = NULL;
--+	bool encap = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP;
-- 	bool assoc = false;
-- 
-- 	memset(&txrc, 0, sizeof(txrc));
--@@ -720,7 +721,7 @@ ieee80211_tx_h_rate_ctrl(struct ieee8021
-- 	 * just wants a probe response.
-- 	 */
-- 	if (tx->sdata->vif.bss_conf.use_short_preamble &&
---	    (ieee80211_is_data(hdr->frame_control) ||
--+	    (ieee80211_is_tx_data(tx->skb) ||
-- 	     (tx->sta && test_sta_flag(tx->sta, WLAN_STA_SHORT_PREAMBLE))))
-- 		txrc.short_preamble = true;
-- 
--@@ -742,7 +743,8 @@ ieee80211_tx_h_rate_ctrl(struct ieee8021
-- 		 "%s: Dropped data frame as no usable bitrate found while "
-- 		 "scanning and associated. Target station: "
-- 		 "%pM on %d GHz band\n",
---		 tx->sdata->name, hdr->addr1,
--+		 tx->sdata->name,
--+		 encap ? ((struct ethhdr *)hdr)->h_dest : hdr->addr1,
-- 		 info->band ? 5 : 2))
-- 		return TX_DROP;
-- 
--@@ -776,7 +778,7 @@ ieee80211_tx_h_rate_ctrl(struct ieee8021
-- 
-- 	if (txrc.reported_rate.idx < 0) {
-- 		txrc.reported_rate = tx->rate;
---		if (tx->sta && ieee80211_is_data(hdr->frame_control))
--+		if (tx->sta && ieee80211_is_tx_data(tx->skb))
-- 			tx->sta->tx_stats.last_rate = txrc.reported_rate;
-- 	} else if (tx->sta)
-- 		tx->sta->tx_stats.last_rate = txrc.reported_rate;
--@@ -3682,8 +3684,16 @@ begin:
-- 	else
-- 		info->flags &= ~IEEE80211_TX_CTL_AMPDU;
-- 
---	if (info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP)
--+	if (info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) {
--+		if (!ieee80211_hw_check(&local->hw, HAS_RATE_CONTROL)) {
--+			r = ieee80211_tx_h_rate_ctrl(&tx);
--+			if (r != TX_CONTINUE) {
--+				ieee80211_free_txskb(&local->hw, skb);
--+				goto begin;
--+			}
--+		}
-- 		goto encap_out;
--+	}
-- 
-- 	if (info->control.flags & IEEE80211_TX_CTRL_FAST_XMIT) {
-- 		struct sta_info *sta = container_of(txq->sta, struct sta_info,
----- a/include/net/mac80211.h
--+++ b/include/net/mac80211.h
--@@ -6733,4 +6733,22 @@ struct sk_buff *ieee80211_get_fils_disco
-- struct sk_buff *
-- ieee80211_get_unsol_bcast_probe_resp_tmpl(struct ieee80211_hw *hw,
-- 					  struct ieee80211_vif *vif);
--+
--+/**
--+ * ieee80211_is_tx_data - check if frame is a data frame
--+ *
--+ * The function is used to check if a frame is a data frame. Frames with
--+ * hardware encapsulation enabled are data frames.
--+ *
--+ * @skb: the frame to be transmitted.
--+ */
--+static inline bool ieee80211_is_tx_data(struct sk_buff *skb)
--+{
--+	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
--+	struct ieee80211_hdr *hdr = (void *) skb->data;
--+
--+	return info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP ||
--+	       ieee80211_is_data(hdr->frame_control);
--+}
--+
-- #endif /* MAC80211_H */
-diff --git a/package/kernel/mac80211/patches/subsys/377-mac80211-minstrel_ht-fix-sample-time-check.patch b/package/kernel/mac80211/patches/subsys/377-mac80211-minstrel_ht-fix-sample-time-check.patch
-deleted file mode 100644
-index 054662f3ef..0000000000
---- a/package/kernel/mac80211/patches/subsys/377-mac80211-minstrel_ht-fix-sample-time-check.patch
-+++ /dev/null
-@@ -1,23 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Thu, 17 Jun 2021 12:05:54 +0200
--Subject: [PATCH] mac80211: minstrel_ht: fix sample time check
--
--We need to skip sampling if the next sample time is after jiffies, not before.
--This patch fixes an issue where in some cases only very little sampling (or none
--at all) is performed, leading to really bad data rates
--
--Fixes: 80d55154b2f8 ("mac80211: minstrel_ht: significantly redesign the rate probing strategy")
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/rc80211_minstrel_ht.c
--+++ b/net/mac80211/rc80211_minstrel_ht.c
--@@ -1450,7 +1450,7 @@ minstrel_ht_get_rate(void *priv, struct
-- 	    (info->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO))
-- 		return;
-- 
---	if (time_is_before_jiffies(mi->sample_time))
--+	if (time_is_after_jiffies(mi->sample_time))
-- 		return;
-- 
-- 	mi->sample_time = jiffies + MINSTREL_SAMPLE_INTERVAL;
-diff --git a/package/kernel/mac80211/patches/subsys/379-mac80211-fix-starting-aggregation-sessions-on-mesh-i.patch b/package/kernel/mac80211/patches/subsys/379-mac80211-fix-starting-aggregation-sessions-on-mesh-i.patch
-deleted file mode 100644
-index c7902d6542..0000000000
---- a/package/kernel/mac80211/patches/subsys/379-mac80211-fix-starting-aggregation-sessions-on-mesh-i.patch
-+++ /dev/null
-@@ -1,112 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Tue, 29 Jun 2021 13:25:09 +0200
--Subject: [PATCH] mac80211: fix starting aggregation sessions on mesh
-- interfaces
--
--The logic for starting aggregation sessions was recently moved from minstrel_ht
--to mac80211, into the subif tx handler just after the sta lookup.
--Unfortunately this didn't work for mesh interfaces, since the sta lookup is
--deferred until a much later point in time on those.
--Fix this by also calling the aggregation check right after the deferred sta
--lookup.
--
--Fixes: 08a46c642001 ("mac80211: move A-MPDU session check from minstrel_ht to mac80211")
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/net/mac80211/tx.c
--+++ b/net/mac80211/tx.c
--@@ -1159,6 +1159,29 @@ static bool ieee80211_tx_prep_agg(struct
-- 	return queued;
-- }
-- 
--+static void
--+ieee80211_aggr_check(struct ieee80211_sub_if_data *sdata,
--+		     struct sta_info *sta,
--+		     struct sk_buff *skb)
--+{
--+	struct rate_control_ref *ref = sdata->local->rate_ctrl;
--+	u16 tid;
--+
--+	if (!ref || !(ref->ops->capa & RATE_CTRL_CAPA_AMPDU_TRIGGER))
--+		return;
--+
--+	if (!sta || !sta->sta.ht_cap.ht_supported ||
--+	    !sta->sta.wme || skb_get_queue_mapping(skb) == IEEE80211_AC_VO ||
--+	    skb->protocol == sdata->control_port_protocol)
--+		return;
--+
--+	tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
--+	if (likely(sta->ampdu_mlme.tid_tx[tid]))
--+		return;
--+
--+	ieee80211_start_tx_ba_session(&sta->sta, tid, 0);
--+}
--+
-- /*
--  * initialises @tx
--  * pass %NULL for the station if unknown, a valid pointer if known
--@@ -1172,6 +1195,7 @@ ieee80211_tx_prepare(struct ieee80211_su
-- 	struct ieee80211_local *local = sdata->local;
-- 	struct ieee80211_hdr *hdr;
-- 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
--+	bool aggr_check = false;
-- 	int tid;
-- 
-- 	memset(tx, 0, sizeof(*tx));
--@@ -1200,8 +1224,10 @@ ieee80211_tx_prepare(struct ieee80211_su
-- 		} else if (tx->sdata->control_port_protocol == tx->skb->protocol) {
-- 			tx->sta = sta_info_get_bss(sdata, hdr->addr1);
-- 		}
---		if (!tx->sta && !is_multicast_ether_addr(hdr->addr1))
--+		if (!tx->sta && !is_multicast_ether_addr(hdr->addr1)) {
-- 			tx->sta = sta_info_get(sdata, hdr->addr1);
--+			aggr_check = true;
--+		}
-- 	}
-- 
-- 	if (tx->sta && ieee80211_is_data_qos(hdr->frame_control) &&
--@@ -1211,8 +1237,12 @@ ieee80211_tx_prepare(struct ieee80211_su
-- 		struct tid_ampdu_tx *tid_tx;
-- 
-- 		tid = ieee80211_get_tid(hdr);
---
-- 		tid_tx = rcu_dereference(tx->sta->ampdu_mlme.tid_tx[tid]);
--+		if (!tid_tx && aggr_check) {
--+			ieee80211_aggr_check(sdata, tx->sta, skb);
--+			tid_tx = rcu_dereference(tx->sta->ampdu_mlme.tid_tx[tid]);
--+		}
--+
-- 		if (tid_tx) {
-- 			bool queued;
-- 
--@@ -3969,29 +3999,6 @@ void ieee80211_txq_schedule_start(struct
-- }
-- EXPORT_SYMBOL(ieee80211_txq_schedule_start);
-- 
---static void
---ieee80211_aggr_check(struct ieee80211_sub_if_data *sdata,
---		     struct sta_info *sta,
---		     struct sk_buff *skb)
---{
---	struct rate_control_ref *ref = sdata->local->rate_ctrl;
---	u16 tid;
---
---	if (!ref || !(ref->ops->capa & RATE_CTRL_CAPA_AMPDU_TRIGGER))
---		return;
---
---	if (!sta || !sta->sta.ht_cap.ht_supported ||
---	    !sta->sta.wme || skb_get_queue_mapping(skb) == IEEE80211_AC_VO ||
---	    skb->protocol == sdata->control_port_protocol)
---		return;
---
---	tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
---	if (likely(sta->ampdu_mlme.tid_tx[tid]))
---		return;
---
---	ieee80211_start_tx_ba_session(&sta->sta, tid, 0);
---}
---
-- void __ieee80211_subif_start_xmit(struct sk_buff *skb,
-- 				  struct net_device *dev,
-- 				  u32 info_flags,
-diff --git a/package/kernel/mac80211/patches/subsys/380-mac80211-introduce-aql_enable-node-in-debugfs.patch b/package/kernel/mac80211/patches/subsys/380-mac80211-introduce-aql_enable-node-in-debugfs.patch
-deleted file mode 100644
-index 073782188a..0000000000
---- a/package/kernel/mac80211/patches/subsys/380-mac80211-introduce-aql_enable-node-in-debugfs.patch
-+++ /dev/null
-@@ -1,111 +0,0 @@
--From: Lorenzo Bianconi <lorenzo@kernel.org>
--Date: Sat, 9 Jan 2021 18:57:51 +0100
--Subject: [PATCH] mac80211: introduce aql_enable node in debugfs
--
--Introduce aql_enable node in debugfs in order to enable/disable aql.
--This is useful for debugging purpose.
--
--Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
--Link: https://lore.kernel.org/r/e7a934d5d84e4796c4f97ea5de4e66c824296b07.1610214851.git.lorenzo@kernel.org
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/net/mac80211/debugfs.c
--+++ b/net/mac80211/debugfs.c
--@@ -281,6 +281,56 @@ static const struct file_operations aql_
-- 	.llseek = default_llseek,
-- };
-- 
--+static ssize_t aql_enable_read(struct file *file, char __user *user_buf,
--+			       size_t count, loff_t *ppos)
--+{
--+	char buf[3];
--+	int len;
--+
--+	len = scnprintf(buf, sizeof(buf), "%d\n",
--+			!static_key_false(&aql_disable.key));
--+
--+	return simple_read_from_buffer(user_buf, count, ppos, buf, len);
--+}
--+
--+static ssize_t aql_enable_write(struct file *file, const char __user *user_buf,
--+				size_t count, loff_t *ppos)
--+{
--+	bool aql_disabled = static_key_false(&aql_disable.key);
--+	char buf[3];
--+	size_t len;
--+
--+	if (count > sizeof(buf))
--+		return -EINVAL;
--+
--+	if (copy_from_user(buf, user_buf, count))
--+		return -EFAULT;
--+
--+	buf[sizeof(buf) - 1] = '\0';
--+	len = strlen(buf);
--+	if (len > 0 && buf[len - 1] == '\n')
--+		buf[len - 1] = 0;
--+
--+	if (buf[0] == '0' && buf[1] == '\0') {
--+		if (!aql_disabled)
--+			static_branch_inc(&aql_disable);
--+	} else if (buf[0] == '1' && buf[1] == '\0') {
--+		if (aql_disabled)
--+			static_branch_dec(&aql_disable);
--+	} else {
--+		return -EINVAL;
--+	}
--+
--+	return count;
--+}
--+
--+static const struct file_operations aql_enable_ops = {
--+	.write = aql_enable_write,
--+	.read = aql_enable_read,
--+	.open = simple_open,
--+	.llseek = default_llseek,
--+};
--+
-- static ssize_t force_tx_status_read(struct file *file,
-- 				    char __user *user_buf,
-- 				    size_t count,
--@@ -569,6 +619,7 @@ void debugfs_hw_add(struct ieee80211_loc
-- 	DEBUGFS_ADD(power);
-- 	DEBUGFS_ADD(hw_conf);
-- 	DEBUGFS_ADD_MODE(force_tx_status, 0600);
--+	DEBUGFS_ADD_MODE(aql_enable, 0600);
-- 
-- 	if (local->ops->wake_tx_queue)
-- 		DEBUGFS_ADD_MODE(aqm, 0600);
----- a/net/mac80211/ieee80211_i.h
--+++ b/net/mac80211/ieee80211_i.h
--@@ -1140,6 +1140,8 @@ enum mac80211_scan_state {
-- 	SCAN_ABORT,
-- };
-- 
--+DECLARE_STATIC_KEY_FALSE(aql_disable);
--+
-- struct ieee80211_local {
-- 	/* embed the driver visible part.
-- 	 * don't cast (use the static inlines below), but we keep
----- a/net/mac80211/tx.c
--+++ b/net/mac80211/tx.c
--@@ -3909,6 +3909,8 @@ void __ieee80211_schedule_txq(struct iee
-- }
-- EXPORT_SYMBOL(__ieee80211_schedule_txq);
-- 
--+DEFINE_STATIC_KEY_FALSE(aql_disable);
--+
-- bool ieee80211_txq_airtime_check(struct ieee80211_hw *hw,
-- 				 struct ieee80211_txq *txq)
-- {
--@@ -3918,6 +3920,9 @@ bool ieee80211_txq_airtime_check(struct
-- 	if (!wiphy_ext_feature_isset(local->hw.wiphy, NL80211_EXT_FEATURE_AQL))
-- 		return true;
-- 
--+	if (static_branch_unlikely(&aql_disable))
--+		return true;
--+
-- 	if (!txq->sta)
-- 		return true;
-- 
-diff --git a/package/kernel/mac80211/patches/subsys/381-mac80211-rearrange-struct-txq_info-for-fewer-holes.patch b/package/kernel/mac80211/patches/subsys/381-mac80211-rearrange-struct-txq_info-for-fewer-holes.patch
-deleted file mode 100644
-index 708ad6f460..0000000000
---- a/package/kernel/mac80211/patches/subsys/381-mac80211-rearrange-struct-txq_info-for-fewer-holes.patch
-+++ /dev/null
-@@ -1,39 +0,0 @@
--From: Johannes Berg <johannes.berg@intel.com>
--Date: Fri, 18 Jun 2021 13:41:44 +0300
--Subject: [PATCH] mac80211: rearrange struct txq_info for fewer holes
--
--We can slightly decrease the size of struct txq_info by
--rearranging some fields for fewer holes, so do that.
--
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
--Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
--Link: https://lore.kernel.org/r/iwlwifi.20210618133832.1bf019a1fe2e.Ib54622b8d6dc1a9a7dc484e573c073119450538b@changeid
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/net/mac80211/ieee80211_i.h
--+++ b/net/mac80211/ieee80211_i.h
--@@ -5,7 +5,7 @@
--  * Copyright 2006-2007	Jiri Benc <jbenc@suse.cz>
--  * Copyright 2007-2010	Johannes Berg <johannes@sipsolutions.net>
--  * Copyright 2013-2015  Intel Mobile Communications GmbH
--- * Copyright (C) 2018-2020 Intel Corporation
--+ * Copyright (C) 2018-2021 Intel Corporation
--  */
-- 
-- #ifndef IEEE80211_I_H
--@@ -848,9 +848,12 @@ struct txq_info {
-- 	struct fq_tin tin;
-- 	struct codel_vars def_cvars;
-- 	struct codel_stats cstats;
---	struct sk_buff_head frags;
---	struct list_head schedule_order;
--+
-- 	u16 schedule_round;
--+	struct list_head schedule_order;
--+
--+	struct sk_buff_head frags;
--+
-- 	unsigned long flags;
-- 
-- 	/* keep last! */
-diff --git a/package/kernel/mac80211/patches/subsys/382-mac80211-Switch-to-a-virtual-time-based-airtime-sche.patch b/package/kernel/mac80211/patches/subsys/382-mac80211-Switch-to-a-virtual-time-based-airtime-sche.patch
-deleted file mode 100644
-index 8b3d743b2f..0000000000
---- a/package/kernel/mac80211/patches/subsys/382-mac80211-Switch-to-a-virtual-time-based-airtime-sche.patch
-+++ /dev/null
-@@ -1,1277 +0,0 @@
--From: =?UTF-8?q?Toke=20H=C3=B8iland-J=C3=B8rgensen?= <toke@redhat.com>
--Date: Wed, 23 Jun 2021 15:47:55 +0200
--Subject: [PATCH] mac80211: Switch to a virtual time-based airtime scheduler
--MIME-Version: 1.0
--Content-Type: text/plain; charset=UTF-8
--Content-Transfer-Encoding: 8bit
--
--This switches the airtime scheduler in mac80211 to use a virtual
--time-based scheduler instead of the round-robin scheduler used before.
--This has a couple of advantages:
--
--- No need to sync up the round-robin scheduler in firmware/hardware with
--  the round-robin airtime scheduler.
--
--- If several stations are eligible for transmission we can schedule both
--  of them; no need to hard-block the scheduling rotation until the head
--  of the queue has used up its quantum.
--
--- The check of whether a station is eligible for transmission becomes
--  simpler (in ieee80211_txq_may_transmit()).
--
--The drawback is that scheduling becomes slightly more expensive, as we
--need to maintain an rbtree of TXQs sorted by virtual time. This means
--that ieee80211_register_airtime() becomes O(logN) in the number of
--currently scheduled TXQs because it can change the order of the
--scheduled stations. We mitigate this overhead by only resorting when a
--station changes position in the tree, and hopefully N rarely grows too
--big (it's only TXQs currently backlogged, not all associated stations),
--so it shouldn't be too big of an issue.
--
--To prevent divisions in the fast path, we maintain both station sums and
--pre-computed reciprocals of the sums. This turns the fast-path operation
--into a multiplication, with divisions only happening as the number of
--active stations change (to re-compute the current sum of all active
--station weights). To prevent this re-computation of the reciprocal from
--happening too frequently, we use a time-based notion of station
--activity, instead of updating the weight every time a station gets
--scheduled or de-scheduled. As queues can oscillate between empty and
--occupied quite frequently, this can significantly cut down on the number
--of re-computations. It also has the added benefit of making the station
--airtime calculation independent on whether the queue happened to have
--drained at the time an airtime value was accounted.
--
--Co-developed-by: Yibo Zhao <yiboz@codeaurora.org>
--Signed-off-by: Yibo Zhao <yiboz@codeaurora.org>
--Signed-off-by: Toke Høiland-Jørgensen <toke@redhat.com>
--Link: https://lore.kernel.org/r/20210623134755.235545-1-toke@redhat.com
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/include/net/mac80211.h
--+++ b/include/net/mac80211.h
--@@ -6557,9 +6557,6 @@ static inline void ieee80211_txq_schedul
-- {
-- }
-- 
---void __ieee80211_schedule_txq(struct ieee80211_hw *hw,
---			      struct ieee80211_txq *txq, bool force);
---
-- /**
--  * ieee80211_schedule_txq - schedule a TXQ for transmission
--  *
--@@ -6572,11 +6569,7 @@ void __ieee80211_schedule_txq(struct iee
--  * The driver may call this function if it has buffered packets for
--  * this TXQ internally.
--  */
---static inline void
---ieee80211_schedule_txq(struct ieee80211_hw *hw, struct ieee80211_txq *txq)
---{
---	__ieee80211_schedule_txq(hw, txq, true);
---}
--+void ieee80211_schedule_txq(struct ieee80211_hw *hw, struct ieee80211_txq *txq);
-- 
-- /**
--  * ieee80211_return_txq - return a TXQ previously acquired by ieee80211_next_txq()
--@@ -6588,12 +6581,8 @@ ieee80211_schedule_txq(struct ieee80211_
--  * The driver may set force=true if it has buffered packets for this TXQ
--  * internally.
--  */
---static inline void
---ieee80211_return_txq(struct ieee80211_hw *hw, struct ieee80211_txq *txq,
---		     bool force)
---{
---	__ieee80211_schedule_txq(hw, txq, force);
---}
--+void ieee80211_return_txq(struct ieee80211_hw *hw, struct ieee80211_txq *txq,
--+			  bool force);
-- 
-- /**
--  * ieee80211_txq_may_transmit - check whether TXQ is allowed to transmit
----- a/net/mac80211/cfg.c
--+++ b/net/mac80211/cfg.c
--@@ -1461,6 +1461,38 @@ static void sta_apply_mesh_params(struct
-- #endif
-- }
-- 
--+static void sta_apply_airtime_params(struct ieee80211_local *local,
--+				     struct sta_info *sta,
--+				     struct station_parameters *params)
--+{
--+	u8 ac;
--+
--+	for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
--+		struct airtime_sched_info *air_sched = &local->airtime[ac];
--+		struct airtime_info *air_info = &sta->airtime[ac];
--+		struct txq_info *txqi;
--+		u8 tid;
--+
--+		spin_lock_bh(&air_sched->lock);
--+		for (tid = 0; tid < IEEE80211_NUM_TIDS + 1; tid++) {
--+			if (air_info->weight == params->airtime_weight ||
--+			    !sta->sta.txq[tid] ||
--+			    ac != ieee80211_ac_from_tid(tid))
--+				continue;
--+
--+			airtime_weight_set(air_info, params->airtime_weight);
--+
--+			txqi = to_txq_info(sta->sta.txq[tid]);
--+			if (RB_EMPTY_NODE(&txqi->schedule_order))
--+				continue;
--+
--+			ieee80211_update_airtime_weight(local, air_sched,
--+							0, true);
--+		}
--+		spin_unlock_bh(&air_sched->lock);
--+	}
--+}
--+
-- static int sta_apply_parameters(struct ieee80211_local *local,
-- 				struct sta_info *sta,
-- 				struct station_parameters *params)
--@@ -1648,7 +1680,8 @@ static int sta_apply_parameters(struct i
-- 		sta_apply_mesh_params(local, sta, params);
-- 
-- 	if (params->airtime_weight)
---		sta->airtime_weight = params->airtime_weight;
--+		sta_apply_airtime_params(local, sta, params);
--+
-- 
-- 	/* set the STA state after all sta info from usermode has been set */
-- 	if (test_sta_flag(sta, WLAN_STA_TDLS_PEER) ||
----- a/net/mac80211/debugfs.c
--+++ b/net/mac80211/debugfs.c
--@@ -216,14 +216,14 @@ static ssize_t aql_txq_limit_read(struct
-- 			"VI	%u		%u\n"
-- 			"BE	%u		%u\n"
-- 			"BK	%u		%u\n",
---			local->aql_txq_limit_low[IEEE80211_AC_VO],
---			local->aql_txq_limit_high[IEEE80211_AC_VO],
---			local->aql_txq_limit_low[IEEE80211_AC_VI],
---			local->aql_txq_limit_high[IEEE80211_AC_VI],
---			local->aql_txq_limit_low[IEEE80211_AC_BE],
---			local->aql_txq_limit_high[IEEE80211_AC_BE],
---			local->aql_txq_limit_low[IEEE80211_AC_BK],
---			local->aql_txq_limit_high[IEEE80211_AC_BK]);
--+			local->airtime[IEEE80211_AC_VO].aql_txq_limit_low,
--+			local->airtime[IEEE80211_AC_VO].aql_txq_limit_high,
--+			local->airtime[IEEE80211_AC_VI].aql_txq_limit_low,
--+			local->airtime[IEEE80211_AC_VI].aql_txq_limit_high,
--+			local->airtime[IEEE80211_AC_BE].aql_txq_limit_low,
--+			local->airtime[IEEE80211_AC_BE].aql_txq_limit_high,
--+			local->airtime[IEEE80211_AC_BK].aql_txq_limit_low,
--+			local->airtime[IEEE80211_AC_BK].aql_txq_limit_high);
-- 	return simple_read_from_buffer(user_buf, count, ppos,
-- 				       buf, len);
-- }
--@@ -255,11 +255,11 @@ static ssize_t aql_txq_limit_write(struc
-- 	if (ac >= IEEE80211_NUM_ACS)
-- 		return -EINVAL;
-- 
---	q_limit_low_old = local->aql_txq_limit_low[ac];
---	q_limit_high_old = local->aql_txq_limit_high[ac];
--+	q_limit_low_old = local->airtime[ac].aql_txq_limit_low;
--+	q_limit_high_old = local->airtime[ac].aql_txq_limit_high;
-- 
---	local->aql_txq_limit_low[ac] = q_limit_low;
---	local->aql_txq_limit_high[ac] = q_limit_high;
--+	local->airtime[ac].aql_txq_limit_low = q_limit_low;
--+	local->airtime[ac].aql_txq_limit_high = q_limit_high;
-- 
-- 	mutex_lock(&local->sta_mtx);
-- 	list_for_each_entry(sta, &local->sta_list, list) {
--@@ -382,6 +382,46 @@ static const struct file_operations forc
-- 	.llseek = default_llseek,
-- };
-- 
--+static ssize_t airtime_read(struct file *file,
--+			    char __user *user_buf,
--+			    size_t count,
--+			    loff_t *ppos)
--+{
--+	struct ieee80211_local *local = file->private_data;
--+	char buf[200];
--+	u64 v_t[IEEE80211_NUM_ACS];
--+	u64 wt[IEEE80211_NUM_ACS];
--+	int len = 0, ac;
--+
--+	for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
--+		spin_lock_bh(&local->airtime[ac].lock);
--+		v_t[ac] = local->airtime[ac].v_t;
--+		wt[ac] = local->airtime[ac].weight_sum;
--+		spin_unlock_bh(&local->airtime[ac].lock);
--+	}
--+	len = scnprintf(buf, sizeof(buf),
--+			"\tVO         VI         BE         BK\n"
--+			"Virt-t\t%-10llu %-10llu %-10llu %-10llu\n"
--+			"Weight\t%-10llu %-10llu %-10llu %-10llu\n",
--+			v_t[0],
--+			v_t[1],
--+			v_t[2],
--+			v_t[3],
--+			wt[0],
--+			wt[1],
--+			wt[2],
--+			wt[3]);
--+
--+	return simple_read_from_buffer(user_buf, count, ppos,
--+				       buf, len);
--+}
--+
--+static const struct file_operations airtime_ops = {
--+	.read = airtime_read,
--+	.open = simple_open,
--+	.llseek = default_llseek,
--+};
--+
-- #ifdef CONFIG_PM
-- static ssize_t reset_write(struct file *file, const char __user *user_buf,
-- 			   size_t count, loff_t *ppos)
--@@ -624,7 +664,11 @@ void debugfs_hw_add(struct ieee80211_loc
-- 	if (local->ops->wake_tx_queue)
-- 		DEBUGFS_ADD_MODE(aqm, 0600);
-- 
---	DEBUGFS_ADD_MODE(airtime_flags, 0600);
--+	if (wiphy_ext_feature_isset(local->hw.wiphy,
--+				    NL80211_EXT_FEATURE_AIRTIME_FAIRNESS)) {
--+		DEBUGFS_ADD_MODE(airtime, 0600);
--+		DEBUGFS_ADD_MODE(airtime_flags, 0600);
--+	}
-- 
-- 	DEBUGFS_ADD(aql_txq_limit);
-- 	debugfs_create_u32("aql_threshold", 0600,
----- a/net/mac80211/debugfs_netdev.c
--+++ b/net/mac80211/debugfs_netdev.c
--@@ -513,6 +513,34 @@ static ssize_t ieee80211_if_fmt_aqm(
-- }
-- IEEE80211_IF_FILE_R(aqm);
-- 
--+static ssize_t ieee80211_if_fmt_airtime(
--+	const struct ieee80211_sub_if_data *sdata, char *buf, int buflen)
--+{
--+	struct ieee80211_local *local = sdata->local;
--+	struct ieee80211_txq *txq = sdata->vif.txq;
--+	struct airtime_info *air_info;
--+	int len;
--+
--+	if (!txq)
--+		return 0;
--+
--+	spin_lock_bh(&local->airtime[txq->ac].lock);
--+	air_info = to_airtime_info(txq);
--+	len = scnprintf(buf,
--+			buflen,
--+			"RX: %llu us\nTX: %llu us\nWeight: %u\n"
--+			"Virt-T: %lld us\n",
--+			air_info->rx_airtime,
--+			air_info->tx_airtime,
--+			air_info->weight,
--+			air_info->v_t);
--+	spin_unlock_bh(&local->airtime[txq->ac].lock);
--+
--+	return len;
--+}
--+
--+IEEE80211_IF_FILE_R(airtime);
--+
-- IEEE80211_IF_FILE(multicast_to_unicast, u.ap.multicast_to_unicast, HEX);
-- 
-- /* IBSS attributes */
--@@ -661,8 +689,10 @@ static void add_common_files(struct ieee
-- 
-- 	if (sdata->local->ops->wake_tx_queue &&
-- 	    sdata->vif.type != NL80211_IFTYPE_P2P_DEVICE &&
---	    sdata->vif.type != NL80211_IFTYPE_NAN)
--+	    sdata->vif.type != NL80211_IFTYPE_NAN) {
-- 		DEBUGFS_ADD(aqm);
--+		DEBUGFS_ADD(airtime);
--+	}
-- }
-- 
-- static void add_sta_files(struct ieee80211_sub_if_data *sdata)
----- a/net/mac80211/debugfs_sta.c
--+++ b/net/mac80211/debugfs_sta.c
--@@ -202,7 +202,7 @@ static ssize_t sta_airtime_read(struct f
-- 	size_t bufsz = 400;
-- 	char *buf = kzalloc(bufsz, GFP_KERNEL), *p = buf;
-- 	u64 rx_airtime = 0, tx_airtime = 0;
---	s64 deficit[IEEE80211_NUM_ACS];
--+	u64 v_t[IEEE80211_NUM_ACS];
-- 	ssize_t rv;
-- 	int ac;
-- 
--@@ -210,18 +210,18 @@ static ssize_t sta_airtime_read(struct f
-- 		return -ENOMEM;
-- 
-- 	for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
---		spin_lock_bh(&local->active_txq_lock[ac]);
--+		spin_lock_bh(&local->airtime[ac].lock);
-- 		rx_airtime += sta->airtime[ac].rx_airtime;
-- 		tx_airtime += sta->airtime[ac].tx_airtime;
---		deficit[ac] = sta->airtime[ac].deficit;
---		spin_unlock_bh(&local->active_txq_lock[ac]);
--+		v_t[ac] = sta->airtime[ac].v_t;
--+		spin_unlock_bh(&local->airtime[ac].lock);
-- 	}
-- 
-- 	p += scnprintf(p, bufsz + buf - p,
-- 		"RX: %llu us\nTX: %llu us\nWeight: %u\n"
---		"Deficit: VO: %lld us VI: %lld us BE: %lld us BK: %lld us\n",
---		rx_airtime, tx_airtime, sta->airtime_weight,
---		deficit[0], deficit[1], deficit[2], deficit[3]);
--+		"Virt-T: VO: %lld us VI: %lld us BE: %lld us BK: %lld us\n",
--+		rx_airtime, tx_airtime, sta->airtime[0].weight,
--+		v_t[0], v_t[1], v_t[2], v_t[3]);
-- 
-- 	rv = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
-- 	kfree(buf);
--@@ -236,11 +236,11 @@ static ssize_t sta_airtime_write(struct
-- 	int ac;
-- 
-- 	for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
---		spin_lock_bh(&local->active_txq_lock[ac]);
--+		spin_lock_bh(&local->airtime[ac].lock);
-- 		sta->airtime[ac].rx_airtime = 0;
-- 		sta->airtime[ac].tx_airtime = 0;
---		sta->airtime[ac].deficit = sta->airtime_weight;
---		spin_unlock_bh(&local->active_txq_lock[ac]);
--+		sta->airtime[ac].v_t = 0;
--+		spin_unlock_bh(&local->airtime[ac].lock);
-- 	}
-- 
-- 	return count;
--@@ -263,10 +263,10 @@ static ssize_t sta_aql_read(struct file
-- 		return -ENOMEM;
-- 
-- 	for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
---		spin_lock_bh(&local->active_txq_lock[ac]);
--+		spin_lock_bh(&local->airtime[ac].lock);
-- 		q_limit_l[ac] = sta->airtime[ac].aql_limit_low;
-- 		q_limit_h[ac] = sta->airtime[ac].aql_limit_high;
---		spin_unlock_bh(&local->active_txq_lock[ac]);
--+		spin_unlock_bh(&local->airtime[ac].lock);
-- 		q_depth[ac] = atomic_read(&sta->airtime[ac].aql_tx_pending);
-- 	}
-- 
----- a/net/mac80211/ieee80211_i.h
--+++ b/net/mac80211/ieee80211_i.h
--@@ -840,20 +840,16 @@ enum txq_info_flags {
--  * @def_flow: used as a fallback flow when a packet destined to @tin hashes to
--  *	a fq_flow which is already owned by a different tin
--  * @def_cvars: codel vars for @def_flow
--- * @frags: used to keep fragments created after dequeue
--  * @schedule_order: used with ieee80211_local->active_txqs
--- * @schedule_round: counter to prevent infinite loops on TXQ scheduling
--+ * @frags: used to keep fragments created after dequeue
--  */
-- struct txq_info {
-- 	struct fq_tin tin;
-- 	struct codel_vars def_cvars;
-- 	struct codel_stats cstats;
---
---	u16 schedule_round;
---	struct list_head schedule_order;
--+	struct rb_node schedule_order;
-- 
-- 	struct sk_buff_head frags;
---
-- 	unsigned long flags;
-- 
-- 	/* keep last! */
--@@ -930,6 +926,8 @@ struct ieee80211_sub_if_data {
-- 	struct ieee80211_tx_queue_params tx_conf[IEEE80211_NUM_ACS];
-- 	struct mac80211_qos_map __rcu *qos_map;
-- 
--+	struct airtime_info airtime[IEEE80211_NUM_ACS];
--+
-- 	struct work_struct csa_finalize_work;
-- 	bool csa_block_tx; /* write-protected by sdata_lock and local->mtx */
-- 	struct cfg80211_chan_def csa_chandef;
--@@ -1143,6 +1141,44 @@ enum mac80211_scan_state {
-- 	SCAN_ABORT,
-- };
-- 
--+/**
--+ * struct airtime_sched_info - state used for airtime scheduling and AQL
--+ *
--+ * @lock: spinlock that protects all the fields in this struct
--+ * @active_txqs: rbtree of currently backlogged queues, sorted by virtual time
--+ * @schedule_pos: the current position maintained while a driver walks the tree
--+ *                with ieee80211_next_txq()
--+ * @active_list: list of struct airtime_info structs that were active within
--+ *               the last AIRTIME_ACTIVE_DURATION (100 ms), used to compute
--+ *               weight_sum
--+ * @last_weight_update: used for rate limiting walking active_list
--+ * @last_schedule_time: tracks the last time a transmission was scheduled; used
--+ *                      for catching up v_t if no stations are eligible for
--+ *                      transmission.
--+ * @v_t: global virtual time; queues with v_t < this are eligible for
--+ *       transmission
--+ * @weight_sum: total sum of all active stations used for dividing airtime
--+ * @weight_sum_reciprocal: reciprocal of weight_sum (to avoid divisions in fast
--+ *                         path - see comment above
--+ *                         IEEE80211_RECIPROCAL_DIVISOR_64)
--+ * @aql_txq_limit_low: AQL limit when total outstanding airtime
--+ *                     is < IEEE80211_AQL_THRESHOLD
--+ * @aql_txq_limit_high: AQL limit when total outstanding airtime
--+ *                      is > IEEE80211_AQL_THRESHOLD
--+ */
--+struct airtime_sched_info {
--+	spinlock_t lock;
--+	struct rb_root_cached active_txqs;
--+	struct rb_node *schedule_pos;
--+	struct list_head active_list;
--+	u64 last_weight_update;
--+	u64 last_schedule_activity;
--+	u64 v_t;
--+	u64 weight_sum;
--+	u64 weight_sum_reciprocal;
--+	u32 aql_txq_limit_low;
--+	u32 aql_txq_limit_high;
--+};
-- DECLARE_STATIC_KEY_FALSE(aql_disable);
-- 
-- struct ieee80211_local {
--@@ -1156,13 +1192,8 @@ struct ieee80211_local {
-- 	struct codel_params cparams;
-- 
-- 	/* protects active_txqs and txqi->schedule_order */
---	spinlock_t active_txq_lock[IEEE80211_NUM_ACS];
---	struct list_head active_txqs[IEEE80211_NUM_ACS];
---	u16 schedule_round[IEEE80211_NUM_ACS];
---
--+	struct airtime_sched_info airtime[IEEE80211_NUM_ACS];
-- 	u16 airtime_flags;
---	u32 aql_txq_limit_low[IEEE80211_NUM_ACS];
---	u32 aql_txq_limit_high[IEEE80211_NUM_ACS];
-- 	u32 aql_threshold;
-- 	atomic_t aql_total_pending_airtime;
-- 
--@@ -1581,6 +1612,125 @@ static inline bool txq_has_queue(struct
-- 	return !(skb_queue_empty(&txqi->frags) && !txqi->tin.backlog_packets);
-- }
-- 
--+static inline struct airtime_info *to_airtime_info(struct ieee80211_txq *txq)
--+{
--+	struct ieee80211_sub_if_data *sdata;
--+	struct sta_info *sta;
--+
--+	if (txq->sta) {
--+		sta = container_of(txq->sta, struct sta_info, sta);
--+		return &sta->airtime[txq->ac];
--+	}
--+
--+	sdata = vif_to_sdata(txq->vif);
--+	return &sdata->airtime[txq->ac];
--+}
--+
--+/* To avoid divisions in the fast path, we keep pre-computed reciprocals for
--+ * airtime weight calculations. There are two different weights to keep track
--+ * of: The per-station weight and the sum of weights per phy.
--+ *
--+ * For the per-station weights (kept in airtime_info below), we use 32-bit
--+ * reciprocals with a devisor of 2^19. This lets us keep the multiplications and
--+ * divisions for the station weights as 32-bit operations at the cost of a bit
--+ * of rounding error for high weights; but the choice of divisor keeps rounding
--+ * errors <10% for weights <2^15, assuming no more than 8ms of airtime is
--+ * reported at a time.
--+ *
--+ * For the per-phy sum of weights the values can get higher, so we use 64-bit
--+ * operations for those with a 32-bit divisor, which should avoid any
--+ * significant rounding errors.
--+ */
--+#define IEEE80211_RECIPROCAL_DIVISOR_64 0x100000000ULL
--+#define IEEE80211_RECIPROCAL_SHIFT_64 32
--+#define IEEE80211_RECIPROCAL_DIVISOR_32 0x80000U
--+#define IEEE80211_RECIPROCAL_SHIFT_32 19
--+
--+static inline void airtime_weight_set(struct airtime_info *air_info, u16 weight)
--+{
--+	if (air_info->weight == weight)
--+		return;
--+
--+	air_info->weight = weight;
--+	if (weight) {
--+		air_info->weight_reciprocal =
--+			IEEE80211_RECIPROCAL_DIVISOR_32 / weight;
--+	} else {
--+		air_info->weight_reciprocal = 0;
--+	}
--+}
--+
--+static inline void airtime_weight_sum_set(struct airtime_sched_info *air_sched,
--+					  int weight_sum)
--+{
--+	if (air_sched->weight_sum == weight_sum)
--+		return;
--+
--+	air_sched->weight_sum = weight_sum;
--+	if (air_sched->weight_sum) {
--+		air_sched->weight_sum_reciprocal = IEEE80211_RECIPROCAL_DIVISOR_64;
--+		do_div(air_sched->weight_sum_reciprocal, air_sched->weight_sum);
--+	} else {
--+		air_sched->weight_sum_reciprocal = 0;
--+	}
--+}
--+
--+/* A problem when trying to enforce airtime fairness is that we want to divide
--+ * the airtime between the currently *active* stations. However, basing this on
--+ * the instantaneous queue state of stations doesn't work, as queues tend to
--+ * oscillate very quickly between empty and occupied, leading to the scheduler
--+ * thinking only a single station is active when deciding whether to allow
--+ * transmission (and thus not throttling correctly).
--+ *
--+ * To fix this we use a timer-based notion of activity: a station is considered
--+ * active if it has been scheduled within the last 100 ms; we keep a separate
--+ * list of all the stations considered active in this manner, and lazily update
--+ * the total weight of active stations from this list (filtering the stations in
--+ * the list by their 'last active' time).
--+ *
--+ * We add one additional safeguard to guard against stations that manage to get
--+ * scheduled every 100 ms but don't transmit a lot of data, and thus don't use
--+ * up any airtime. Such stations would be able to get priority for an extended
--+ * period of time if they do start transmitting at full capacity again, and so
--+ * we add an explicit maximum for how far behind a station is allowed to fall in
--+ * the virtual airtime domain. This limit is set to a relatively high value of
--+ * 20 ms because the main mechanism for catching up idle stations is the active
--+ * state as described above; i.e., the hard limit should only be hit in
--+ * pathological cases.
--+ */
--+#define AIRTIME_ACTIVE_DURATION (100 * NSEC_PER_MSEC)
--+#define AIRTIME_MAX_BEHIND 20000 /* 20 ms */
--+
--+static inline bool airtime_is_active(struct airtime_info *air_info, u64 now)
--+{
--+	return air_info->last_scheduled >= now - AIRTIME_ACTIVE_DURATION;
--+}
--+
--+static inline void airtime_set_active(struct airtime_sched_info *air_sched,
--+				      struct airtime_info *air_info, u64 now)
--+{
--+	air_info->last_scheduled = now;
--+	air_sched->last_schedule_activity = now;
--+	list_move_tail(&air_info->list, &air_sched->active_list);
--+}
--+
--+static inline bool airtime_catchup_v_t(struct airtime_sched_info *air_sched,
--+				       u64 v_t, u64 now)
--+{
--+	air_sched->v_t = v_t;
--+	return true;
--+}
--+
--+static inline void init_airtime_info(struct airtime_info *air_info,
--+				     struct airtime_sched_info *air_sched)
--+{
--+	atomic_set(&air_info->aql_tx_pending, 0);
--+	air_info->aql_limit_low = air_sched->aql_txq_limit_low;
--+	air_info->aql_limit_high = air_sched->aql_txq_limit_high;
--+	airtime_weight_set(air_info, IEEE80211_DEFAULT_AIRTIME_WEIGHT);
--+	INIT_LIST_HEAD(&air_info->list);
--+}
--+
-- static inline int ieee80211_bssid_match(const u8 *raddr, const u8 *addr)
-- {
-- 	return ether_addr_equal(raddr, addr) ||
--@@ -1821,6 +1971,14 @@ int ieee80211_tx_control_port(struct wip
-- 			      u64 *cookie);
-- int ieee80211_probe_mesh_link(struct wiphy *wiphy, struct net_device *dev,
-- 			      const u8 *buf, size_t len);
--+void ieee80211_resort_txq(struct ieee80211_hw *hw,
--+			  struct ieee80211_txq *txq);
--+void ieee80211_unschedule_txq(struct ieee80211_hw *hw,
--+			      struct ieee80211_txq *txq,
--+			      bool purge);
--+void ieee80211_update_airtime_weight(struct ieee80211_local *local,
--+				     struct airtime_sched_info *air_sched,
--+				     u64 now, bool force);
-- 
-- /* HT */
-- void ieee80211_apply_htcap_overrides(struct ieee80211_sub_if_data *sdata,
----- a/net/mac80211/iface.c
--+++ b/net/mac80211/iface.c
--@@ -2088,6 +2088,9 @@ int ieee80211_if_add(struct ieee80211_lo
-- 		}
-- 	}
-- 
--+	for (i = 0; i < IEEE80211_NUM_ACS; i++)
--+		init_airtime_info(&sdata->airtime[i], &local->airtime[i]);
--+
-- 	ieee80211_set_default_queues(sdata);
-- 
-- 	sdata->ap_power_level = IEEE80211_UNSET_POWER_LEVEL;
----- a/net/mac80211/main.c
--+++ b/net/mac80211/main.c
--@@ -693,10 +693,13 @@ struct ieee80211_hw *ieee80211_alloc_hw_
-- 	spin_lock_init(&local->queue_stop_reason_lock);
-- 
-- 	for (i = 0; i < IEEE80211_NUM_ACS; i++) {
---		INIT_LIST_HEAD(&local->active_txqs[i]);
---		spin_lock_init(&local->active_txq_lock[i]);
---		local->aql_txq_limit_low[i] = IEEE80211_DEFAULT_AQL_TXQ_LIMIT_L;
---		local->aql_txq_limit_high[i] =
--+		struct airtime_sched_info *air_sched = &local->airtime[i];
--+
--+		air_sched->active_txqs = RB_ROOT_CACHED;
--+		INIT_LIST_HEAD(&air_sched->active_list);
--+		spin_lock_init(&air_sched->lock);
--+		air_sched->aql_txq_limit_low = IEEE80211_DEFAULT_AQL_TXQ_LIMIT_L;
--+		air_sched->aql_txq_limit_high =
-- 			IEEE80211_DEFAULT_AQL_TXQ_LIMIT_H;
-- 	}
-- 
----- a/net/mac80211/rx.c
--+++ b/net/mac80211/rx.c
--@@ -1573,12 +1573,8 @@ static void sta_ps_start(struct sta_info
-- 
-- 	for (tid = 0; tid < IEEE80211_NUM_TIDS; tid++) {
-- 		struct ieee80211_txq *txq = sta->sta.txq[tid];
---		struct txq_info *txqi = to_txq_info(txq);
-- 
---		spin_lock(&local->active_txq_lock[txq->ac]);
---		if (!list_empty(&txqi->schedule_order))
---			list_del_init(&txqi->schedule_order);
---		spin_unlock(&local->active_txq_lock[txq->ac]);
--+		ieee80211_unschedule_txq(&local->hw, txq, false);
-- 
-- 		if (txq_has_queue(txq))
-- 			set_bit(tid, &sta->txq_buffered_tids);
----- a/net/mac80211/sta_info.c
--+++ b/net/mac80211/sta_info.c
--@@ -426,15 +426,11 @@ struct sta_info *sta_info_alloc(struct i
-- 	if (sta_prepare_rate_control(local, sta, gfp))
-- 		goto free_txq;
-- 
---	sta->airtime_weight = IEEE80211_DEFAULT_AIRTIME_WEIGHT;
-- 
-- 	for (i = 0; i < IEEE80211_NUM_ACS; i++) {
-- 		skb_queue_head_init(&sta->ps_tx_buf[i]);
-- 		skb_queue_head_init(&sta->tx_filtered[i]);
---		sta->airtime[i].deficit = sta->airtime_weight;
---		atomic_set(&sta->airtime[i].aql_tx_pending, 0);
---		sta->airtime[i].aql_limit_low = local->aql_txq_limit_low[i];
---		sta->airtime[i].aql_limit_high = local->aql_txq_limit_high[i];
--+		init_airtime_info(&sta->airtime[i], &local->airtime[i]);
-- 	}
-- 
-- 	for (i = 0; i < IEEE80211_NUM_TIDS; i++)
--@@ -1893,24 +1889,59 @@ void ieee80211_sta_set_buffered(struct i
-- }
-- EXPORT_SYMBOL(ieee80211_sta_set_buffered);
-- 
---void ieee80211_sta_register_airtime(struct ieee80211_sta *pubsta, u8 tid,
---				    u32 tx_airtime, u32 rx_airtime)
--+void ieee80211_register_airtime(struct ieee80211_txq *txq,
--+				u32 tx_airtime, u32 rx_airtime)
-- {
---	struct sta_info *sta = container_of(pubsta, struct sta_info, sta);
---	struct ieee80211_local *local = sta->sdata->local;
---	u8 ac = ieee80211_ac_from_tid(tid);
--+	struct ieee80211_sub_if_data *sdata = vif_to_sdata(txq->vif);
--+	struct ieee80211_local *local = sdata->local;
--+	u64 weight_sum, weight_sum_reciprocal;
--+	struct airtime_sched_info *air_sched;
--+	struct airtime_info *air_info;
-- 	u32 airtime = 0;
-- 
---	if (sta->local->airtime_flags & AIRTIME_USE_TX)
--+	air_sched = &local->airtime[txq->ac];
--+	air_info = to_airtime_info(txq);
--+
--+	if (local->airtime_flags & AIRTIME_USE_TX)
-- 		airtime += tx_airtime;
---	if (sta->local->airtime_flags & AIRTIME_USE_RX)
--+	if (local->airtime_flags & AIRTIME_USE_RX)
-- 		airtime += rx_airtime;
-- 
---	spin_lock_bh(&local->active_txq_lock[ac]);
---	sta->airtime[ac].tx_airtime += tx_airtime;
---	sta->airtime[ac].rx_airtime += rx_airtime;
---	sta->airtime[ac].deficit -= airtime;
---	spin_unlock_bh(&local->active_txq_lock[ac]);
--+	/* Weights scale so the unit weight is 256 */
--+	airtime <<= 8;
--+
--+	spin_lock_bh(&air_sched->lock);
--+
--+	air_info->tx_airtime += tx_airtime;
--+	air_info->rx_airtime += rx_airtime;
--+
--+	if (air_sched->weight_sum) {
--+		weight_sum = air_sched->weight_sum;
--+		weight_sum_reciprocal = air_sched->weight_sum_reciprocal;
--+	} else {
--+		weight_sum = air_info->weight;
--+		weight_sum_reciprocal = air_info->weight_reciprocal;
--+	}
--+
--+	/* Round the calculation of global vt */
--+	air_sched->v_t += (u64)((airtime + (weight_sum >> 1)) *
--+				weight_sum_reciprocal) >> IEEE80211_RECIPROCAL_SHIFT_64;
--+	air_info->v_t += (u32)((airtime + (air_info->weight >> 1)) *
--+			       air_info->weight_reciprocal) >> IEEE80211_RECIPROCAL_SHIFT_32;
--+	ieee80211_resort_txq(&local->hw, txq);
--+
--+	spin_unlock_bh(&air_sched->lock);
--+}
--+
--+void ieee80211_sta_register_airtime(struct ieee80211_sta *pubsta, u8 tid,
--+				    u32 tx_airtime, u32 rx_airtime)
--+{
--+	struct ieee80211_txq *txq = pubsta->txq[tid];
--+
--+	if (!txq)
--+		return;
--+
--+	ieee80211_register_airtime(txq, tx_airtime, rx_airtime);
-- }
-- EXPORT_SYMBOL(ieee80211_sta_register_airtime);
-- 
--@@ -2354,7 +2385,7 @@ void sta_set_sinfo(struct sta_info *sta,
-- 	}
-- 
-- 	if (!(sinfo->filled & BIT_ULL(NL80211_STA_INFO_AIRTIME_WEIGHT))) {
---		sinfo->airtime_weight = sta->airtime_weight;
--+		sinfo->airtime_weight = sta->airtime[0].weight;
-- 		sinfo->filled |= BIT_ULL(NL80211_STA_INFO_AIRTIME_WEIGHT);
-- 	}
-- 
----- a/net/mac80211/sta_info.h
--+++ b/net/mac80211/sta_info.h
--@@ -135,18 +135,25 @@ enum ieee80211_agg_stop_reason {
-- #define AIRTIME_USE_TX		BIT(0)
-- #define AIRTIME_USE_RX		BIT(1)
-- 
--+
-- struct airtime_info {
-- 	u64 rx_airtime;
-- 	u64 tx_airtime;
---	s64 deficit;
--+	u64 v_t;
--+	u64 last_scheduled;
--+	struct list_head list;
-- 	atomic_t aql_tx_pending; /* Estimated airtime for frames pending */
-- 	u32 aql_limit_low;
-- 	u32 aql_limit_high;
--+	u32 weight_reciprocal;
--+	u16 weight;
-- };
-- 
-- void ieee80211_sta_update_pending_airtime(struct ieee80211_local *local,
-- 					  struct sta_info *sta, u8 ac,
-- 					  u16 tx_airtime, bool tx_completed);
--+void ieee80211_register_airtime(struct ieee80211_txq *txq,
--+				u32 tx_airtime, u32 rx_airtime);
-- 
-- struct sta_info;
-- 
--@@ -516,7 +523,6 @@ struct ieee80211_fragment_cache {
--  * @tid_seq: per-TID sequence numbers for sending to this STA
--  * @airtime: per-AC struct airtime_info describing airtime statistics for this
--  *	station
--- * @airtime_weight: station weight for airtime fairness calculation purposes
--  * @ampdu_mlme: A-MPDU state machine state
--  * @mesh: mesh STA information
--  * @debugfs_dir: debug filesystem directory dentry
--@@ -647,7 +653,6 @@ struct sta_info {
-- 	u16 tid_seq[IEEE80211_QOS_CTL_TID_MASK + 1];
-- 
-- 	struct airtime_info airtime[IEEE80211_NUM_ACS];
---	u16 airtime_weight;
-- 
-- 	/*
-- 	 * Aggregation information, locked with lock.
----- a/net/mac80211/status.c
--+++ b/net/mac80211/status.c
--@@ -972,6 +972,25 @@ static void __ieee80211_tx_status(struct
-- 		if (!(info->flags & IEEE80211_TX_CTL_INJECTED) && acked)
-- 			ieee80211_frame_acked(sta, skb);
-- 
--+	} else if (wiphy_ext_feature_isset(local->hw.wiphy,
--+					   NL80211_EXT_FEATURE_AIRTIME_FAIRNESS)) {
--+		struct ieee80211_sub_if_data *sdata;
--+		struct ieee80211_txq *txq;
--+		u32 airtime;
--+
--+		/* Account airtime to multicast queue */
--+		sdata = ieee80211_sdata_from_skb(local, skb);
--+
--+		if (sdata && (txq = sdata->vif.txq)) {
--+			airtime = info->status.tx_time ?:
--+				ieee80211_calc_expected_tx_airtime(hw,
--+								   &sdata->vif,
--+								   NULL,
--+								   skb->len,
--+								   false);
--+
--+			ieee80211_register_airtime(txq, airtime, 0);
--+		}
-- 	}
-- 
-- 	/* SNMP counters
----- a/net/mac80211/tx.c
--+++ b/net/mac80211/tx.c
--@@ -18,6 +18,7 @@
-- #include <linux/bitmap.h>
-- #include <linux/rcupdate.h>
-- #include <linux/export.h>
--+#include <linux/timekeeping.h>
-- #include <net/net_namespace.h>
-- #include <net/ieee80211_radiotap.h>
-- #include <net/cfg80211.h>
--@@ -1489,7 +1490,7 @@ void ieee80211_txq_init(struct ieee80211
-- 	codel_vars_init(&txqi->def_cvars);
-- 	codel_stats_init(&txqi->cstats);
-- 	__skb_queue_head_init(&txqi->frags);
---	INIT_LIST_HEAD(&txqi->schedule_order);
--+	RB_CLEAR_NODE(&txqi->schedule_order);
-- 
-- 	txqi->txq.vif = &sdata->vif;
-- 
--@@ -1533,9 +1534,7 @@ void ieee80211_txq_purge(struct ieee8021
-- 	ieee80211_purge_tx_queue(&local->hw, &txqi->frags);
-- 	spin_unlock_bh(&fq->lock);
-- 
---	spin_lock_bh(&local->active_txq_lock[txqi->txq.ac]);
---	list_del_init(&txqi->schedule_order);
---	spin_unlock_bh(&local->active_txq_lock[txqi->txq.ac]);
--+	ieee80211_unschedule_txq(&local->hw, &txqi->txq, true);
-- }
-- 
-- void ieee80211_txq_set_params(struct ieee80211_local *local)
--@@ -3819,102 +3818,259 @@ EXPORT_SYMBOL(ieee80211_tx_dequeue);
-- struct ieee80211_txq *ieee80211_next_txq(struct ieee80211_hw *hw, u8 ac)
-- {
-- 	struct ieee80211_local *local = hw_to_local(hw);
--+	struct airtime_sched_info *air_sched;
--+	u64 now = ktime_get_boottime_ns();
-- 	struct ieee80211_txq *ret = NULL;
---	struct txq_info *txqi = NULL, *head = NULL;
---	bool found_eligible_txq = false;
--+	struct airtime_info *air_info;
--+	struct txq_info *txqi = NULL;
--+	struct rb_node *node;
--+	bool first = false;
-- 
---	spin_lock_bh(&local->active_txq_lock[ac]);
--+	air_sched = &local->airtime[ac];
--+	spin_lock_bh(&air_sched->lock);
-- 
--- begin:
---	txqi = list_first_entry_or_null(&local->active_txqs[ac],
---					struct txq_info,
---					schedule_order);
---	if (!txqi)
--+	node = air_sched->schedule_pos;
--+
--+begin:
--+	if (!node) {
--+		node = rb_first_cached(&air_sched->active_txqs);
--+		first = true;
--+	} else {
--+		node = rb_next(node);
--+	}
--+
--+	if (!node)
-- 		goto out;
-- 
---	if (txqi == head) {
---		if (!found_eligible_txq)
---			goto out;
---		else
---			found_eligible_txq = false;
--+	txqi = container_of(node, struct txq_info, schedule_order);
--+	air_info = to_airtime_info(&txqi->txq);
--+
--+	if (air_info->v_t > air_sched->v_t &&
--+	    (!first || !airtime_catchup_v_t(air_sched, air_info->v_t, now)))
--+		goto out;
--+
--+	if (!ieee80211_txq_airtime_check(hw, &txqi->txq)) {
--+		first = false;
--+		goto begin;
-- 	}
-- 
---	if (!head)
---		head = txqi;
--+	air_sched->schedule_pos = node;
--+	air_sched->last_schedule_activity = now;
--+	ret = &txqi->txq;
--+out:
--+	spin_unlock_bh(&air_sched->lock);
--+	return ret;
--+}
--+EXPORT_SYMBOL(ieee80211_next_txq);
-- 
---	if (txqi->txq.sta) {
---		struct sta_info *sta = container_of(txqi->txq.sta,
---						    struct sta_info, sta);
---		bool aql_check = ieee80211_txq_airtime_check(hw, &txqi->txq);
---		s64 deficit = sta->airtime[txqi->txq.ac].deficit;
--+static void __ieee80211_insert_txq(struct rb_root_cached *root,
--+				   struct txq_info *txqi)
--+{
--+	struct rb_node **new = &root->rb_root.rb_node;
--+	struct airtime_info *old_air, *new_air;
--+	struct rb_node *parent = NULL;
--+	struct txq_info *__txqi;
--+	bool leftmost = true;
--+
--+	while (*new) {
--+		parent = *new;
--+		__txqi = rb_entry(parent, struct txq_info, schedule_order);
--+		old_air = to_airtime_info(&__txqi->txq);
--+		new_air = to_airtime_info(&txqi->txq);
-- 
---		if (aql_check)
---			found_eligible_txq = true;
--+		if (new_air->v_t <= old_air->v_t) {
--+			new = &parent->rb_left;
--+		} else {
--+			new = &parent->rb_right;
--+			leftmost = false;
--+		}
--+	}
-- 
---		if (deficit < 0)
---			sta->airtime[txqi->txq.ac].deficit +=
---				sta->airtime_weight;
---
---		if (deficit < 0 || !aql_check) {
---			list_move_tail(&txqi->schedule_order,
---				       &local->active_txqs[txqi->txq.ac]);
---			goto begin;
--+	rb_link_node(&txqi->schedule_order, parent, new);
--+	rb_insert_color_cached(&txqi->schedule_order, root, leftmost);
--+}
--+
--+void ieee80211_resort_txq(struct ieee80211_hw *hw,
--+			  struct ieee80211_txq *txq)
--+{
--+	struct airtime_info *air_info = to_airtime_info(txq);
--+	struct ieee80211_local *local = hw_to_local(hw);
--+	struct txq_info *txqi = to_txq_info(txq);
--+	struct airtime_sched_info *air_sched;
--+
--+	air_sched = &local->airtime[txq->ac];
--+
--+	lockdep_assert_held(&air_sched->lock);
--+
--+	if (!RB_EMPTY_NODE(&txqi->schedule_order)) {
--+		struct airtime_info *a_prev = NULL, *a_next = NULL;
--+		struct txq_info *t_prev, *t_next;
--+		struct rb_node *n_prev, *n_next;
--+
--+		/* Erasing a node can cause an expensive rebalancing operation,
--+		 * so we check the previous and next nodes first and only remove
--+		 * and re-insert if the current node is not already in the
--+		 * correct position.
--+		 */
--+		if ((n_prev = rb_prev(&txqi->schedule_order)) != NULL) {
--+			t_prev = container_of(n_prev, struct txq_info,
--+					      schedule_order);
--+			a_prev = to_airtime_info(&t_prev->txq);
--+		}
--+
--+		if ((n_next = rb_next(&txqi->schedule_order)) != NULL) {
--+			t_next = container_of(n_next, struct txq_info,
--+					      schedule_order);
--+			a_next = to_airtime_info(&t_next->txq);
-- 		}
--+
--+		if ((!a_prev || a_prev->v_t <= air_info->v_t) &&
--+		    (!a_next || a_next->v_t > air_info->v_t))
--+			return;
--+
--+		if (air_sched->schedule_pos == &txqi->schedule_order)
--+			air_sched->schedule_pos = n_prev;
--+
--+		rb_erase_cached(&txqi->schedule_order,
--+				&air_sched->active_txqs);
--+		RB_CLEAR_NODE(&txqi->schedule_order);
--+		__ieee80211_insert_txq(&air_sched->active_txqs, txqi);
-- 	}
--+}
--+
--+void ieee80211_update_airtime_weight(struct ieee80211_local *local,
--+				     struct airtime_sched_info *air_sched,
--+				     u64 now, bool force)
--+{
--+	struct airtime_info *air_info, *tmp;
--+	u64 weight_sum = 0;
--+
--+	if (unlikely(!now))
--+		now = ktime_get_boottime_ns();
--+
--+	lockdep_assert_held(&air_sched->lock);
--+
--+	if (!force && (air_sched->last_weight_update <
--+		       now - AIRTIME_ACTIVE_DURATION))
--+		return;
--+
--+	list_for_each_entry_safe(air_info, tmp,
--+				 &air_sched->active_list, list) {
--+		if (airtime_is_active(air_info, now))
--+			weight_sum += air_info->weight;
--+		else
--+			list_del_init(&air_info->list);
--+	}
--+	airtime_weight_sum_set(air_sched, weight_sum);
--+	air_sched->last_weight_update = now;
--+}
-- 
--+void ieee80211_schedule_txq(struct ieee80211_hw *hw,
--+			    struct ieee80211_txq *txq)
--+	__acquires(txq_lock) __releases(txq_lock)
--+{
--+	struct ieee80211_local *local = hw_to_local(hw);
--+	struct txq_info *txqi = to_txq_info(txq);
--+	struct airtime_sched_info *air_sched;
--+	u64 now = ktime_get_boottime_ns();
--+	struct airtime_info *air_info;
--+	u8 ac = txq->ac;
--+	bool was_active;
-- 
---	if (txqi->schedule_round == local->schedule_round[ac])
--+	air_sched = &local->airtime[ac];
--+	air_info = to_airtime_info(txq);
--+
--+	spin_lock_bh(&air_sched->lock);
--+	was_active = airtime_is_active(air_info, now);
--+	airtime_set_active(air_sched, air_info, now);
--+
--+	if (!RB_EMPTY_NODE(&txqi->schedule_order))
-- 		goto out;
-- 
---	list_del_init(&txqi->schedule_order);
---	txqi->schedule_round = local->schedule_round[ac];
---	ret = &txqi->txq;
--+	/* If the station has been inactive for a while, catch up its v_t so it
--+	 * doesn't get indefinite priority; see comment above the definition of
--+	 * AIRTIME_MAX_BEHIND.
--+	 */
--+	if ((!was_active && air_info->v_t < air_sched->v_t) ||
--+	    air_info->v_t < air_sched->v_t - AIRTIME_MAX_BEHIND)
--+		air_info->v_t = air_sched->v_t;
--+
--+	ieee80211_update_airtime_weight(local, air_sched, now, !was_active);
--+	__ieee80211_insert_txq(&air_sched->active_txqs, txqi);
-- 
-- out:
---	spin_unlock_bh(&local->active_txq_lock[ac]);
---	return ret;
--+	spin_unlock_bh(&air_sched->lock);
-- }
---EXPORT_SYMBOL(ieee80211_next_txq);
--+EXPORT_SYMBOL(ieee80211_schedule_txq);
-- 
---void __ieee80211_schedule_txq(struct ieee80211_hw *hw,
---			      struct ieee80211_txq *txq,
---			      bool force)
--+static void __ieee80211_unschedule_txq(struct ieee80211_hw *hw,
--+				       struct ieee80211_txq *txq,
--+				       bool purge)
-- {
-- 	struct ieee80211_local *local = hw_to_local(hw);
-- 	struct txq_info *txqi = to_txq_info(txq);
--+	struct airtime_sched_info *air_sched;
--+	struct airtime_info *air_info;
-- 
---	spin_lock_bh(&local->active_txq_lock[txq->ac]);
--+	air_sched = &local->airtime[txq->ac];
--+	air_info = to_airtime_info(&txqi->txq);
-- 
---	if (list_empty(&txqi->schedule_order) &&
---	    (force || !skb_queue_empty(&txqi->frags) ||
---	     txqi->tin.backlog_packets)) {
---		/* If airtime accounting is active, always enqueue STAs at the
---		 * head of the list to ensure that they only get moved to the
---		 * back by the airtime DRR scheduler once they have a negative
---		 * deficit. A station that already has a negative deficit will
---		 * get immediately moved to the back of the list on the next
---		 * call to ieee80211_next_txq().
---		 */
---		if (txqi->txq.sta && local->airtime_flags &&
---		    wiphy_ext_feature_isset(local->hw.wiphy,
---					    NL80211_EXT_FEATURE_AIRTIME_FAIRNESS))
---			list_add(&txqi->schedule_order,
---				 &local->active_txqs[txq->ac]);
---		else
---			list_add_tail(&txqi->schedule_order,
---				      &local->active_txqs[txq->ac]);
--+	lockdep_assert_held(&air_sched->lock);
--+
--+	if (purge) {
--+		list_del_init(&air_info->list);
--+		ieee80211_update_airtime_weight(local, air_sched, 0, true);
-- 	}
-- 
---	spin_unlock_bh(&local->active_txq_lock[txq->ac]);
--+	if (RB_EMPTY_NODE(&txqi->schedule_order))
--+		return;
--+
--+	if (air_sched->schedule_pos == &txqi->schedule_order)
--+		air_sched->schedule_pos = rb_prev(&txqi->schedule_order);
--+
--+	if (!purge)
--+		airtime_set_active(air_sched, air_info,
--+				   ktime_get_boottime_ns());
--+
--+	rb_erase_cached(&txqi->schedule_order,
--+			&air_sched->active_txqs);
--+	RB_CLEAR_NODE(&txqi->schedule_order);
--+}
--+
--+void ieee80211_unschedule_txq(struct ieee80211_hw *hw,
--+			      struct ieee80211_txq *txq,
--+			      bool purge)
--+	__acquires(txq_lock) __releases(txq_lock)
--+{
--+	struct ieee80211_local *local = hw_to_local(hw);
--+
--+	spin_lock_bh(&local->airtime[txq->ac].lock);
--+	__ieee80211_unschedule_txq(hw, txq, purge);
--+	spin_unlock_bh(&local->airtime[txq->ac].lock);
--+}
--+
--+void ieee80211_return_txq(struct ieee80211_hw *hw,
--+			  struct ieee80211_txq *txq, bool force)
--+{
--+	struct ieee80211_local *local = hw_to_local(hw);
--+	struct txq_info *txqi = to_txq_info(txq);
--+
--+	spin_lock_bh(&local->airtime[txq->ac].lock);
--+
--+	if (!RB_EMPTY_NODE(&txqi->schedule_order) && !force &&
--+	    !txq_has_queue(txq))
--+		__ieee80211_unschedule_txq(hw, txq, false);
--+
--+	spin_unlock_bh(&local->airtime[txq->ac].lock);
-- }
---EXPORT_SYMBOL(__ieee80211_schedule_txq);
--+EXPORT_SYMBOL(ieee80211_return_txq);
-- 
-- DEFINE_STATIC_KEY_FALSE(aql_disable);
-- 
-- bool ieee80211_txq_airtime_check(struct ieee80211_hw *hw,
-- 				 struct ieee80211_txq *txq)
-- {
---	struct sta_info *sta;
--+	struct airtime_info *air_info = to_airtime_info(txq);
-- 	struct ieee80211_local *local = hw_to_local(hw);
-- 
-- 	if (!wiphy_ext_feature_isset(local->hw.wiphy, NL80211_EXT_FEATURE_AQL))
--@@ -3929,15 +4085,12 @@ bool ieee80211_txq_airtime_check(struct
-- 	if (unlikely(txq->tid == IEEE80211_NUM_TIDS))
-- 		return true;
-- 
---	sta = container_of(txq->sta, struct sta_info, sta);
---	if (atomic_read(&sta->airtime[txq->ac].aql_tx_pending) <
---	    sta->airtime[txq->ac].aql_limit_low)
--+	if (atomic_read(&air_info->aql_tx_pending) < air_info->aql_limit_low)
-- 		return true;
-- 
-- 	if (atomic_read(&local->aql_total_pending_airtime) <
-- 	    local->aql_threshold &&
---	    atomic_read(&sta->airtime[txq->ac].aql_tx_pending) <
---	    sta->airtime[txq->ac].aql_limit_high)
--+	    atomic_read(&air_info->aql_tx_pending) < air_info->aql_limit_high)
-- 		return true;
-- 
-- 	return false;
--@@ -3947,60 +4100,59 @@ EXPORT_SYMBOL(ieee80211_txq_airtime_chec
-- bool ieee80211_txq_may_transmit(struct ieee80211_hw *hw,
-- 				struct ieee80211_txq *txq)
-- {
--+	struct txq_info *first_txqi = NULL, *txqi = to_txq_info(txq);
-- 	struct ieee80211_local *local = hw_to_local(hw);
---	struct txq_info *iter, *tmp, *txqi = to_txq_info(txq);
---	struct sta_info *sta;
---	u8 ac = txq->ac;
--+	struct airtime_sched_info *air_sched;
--+	struct airtime_info *air_info;
--+	struct rb_node *node = NULL;
--+	bool ret = false;
--+	u64 now;
-- 
---	spin_lock_bh(&local->active_txq_lock[ac]);
-- 
---	if (!txqi->txq.sta)
---		goto out;
--+	if (!ieee80211_txq_airtime_check(hw, txq))
--+		return false;
--+
--+	air_sched = &local->airtime[txq->ac];
--+	spin_lock_bh(&air_sched->lock);
-- 
---	if (list_empty(&txqi->schedule_order))
--+	if (RB_EMPTY_NODE(&txqi->schedule_order))
-- 		goto out;
-- 
---	list_for_each_entry_safe(iter, tmp, &local->active_txqs[ac],
---				 schedule_order) {
---		if (iter == txqi)
---			break;
--+	now = ktime_get_boottime_ns();
-- 
---		if (!iter->txq.sta) {
---			list_move_tail(&iter->schedule_order,
---				       &local->active_txqs[ac]);
---			continue;
---		}
---		sta = container_of(iter->txq.sta, struct sta_info, sta);
---		if (sta->airtime[ac].deficit < 0)
---			sta->airtime[ac].deficit += sta->airtime_weight;
---		list_move_tail(&iter->schedule_order, &local->active_txqs[ac]);
--+	/* Like in ieee80211_next_txq(), make sure the first station in the
--+	 * scheduling order is eligible for transmission to avoid starvation.
--+	 */
--+	node = rb_first_cached(&air_sched->active_txqs);
--+	if (node) {
--+		first_txqi = container_of(node, struct txq_info,
--+					  schedule_order);
--+		air_info = to_airtime_info(&first_txqi->txq);
--+
--+		if (air_sched->v_t < air_info->v_t)
--+			airtime_catchup_v_t(air_sched, air_info->v_t, now);
-- 	}
-- 
---	sta = container_of(txqi->txq.sta, struct sta_info, sta);
---	if (sta->airtime[ac].deficit >= 0)
---		goto out;
---
---	sta->airtime[ac].deficit += sta->airtime_weight;
---	list_move_tail(&txqi->schedule_order, &local->active_txqs[ac]);
---	spin_unlock_bh(&local->active_txq_lock[ac]);
--+	air_info = to_airtime_info(&txqi->txq);
--+	if (air_info->v_t <= air_sched->v_t) {
--+		air_sched->last_schedule_activity = now;
--+		ret = true;
--+	}
-- 
---	return false;
-- out:
---	if (!list_empty(&txqi->schedule_order))
---		list_del_init(&txqi->schedule_order);
---	spin_unlock_bh(&local->active_txq_lock[ac]);
---
---	return true;
--+	spin_unlock_bh(&air_sched->lock);
--+	return ret;
-- }
-- EXPORT_SYMBOL(ieee80211_txq_may_transmit);
-- 
-- void ieee80211_txq_schedule_start(struct ieee80211_hw *hw, u8 ac)
-- {
-- 	struct ieee80211_local *local = hw_to_local(hw);
--+	struct airtime_sched_info *air_sched = &local->airtime[ac];
-- 
---	spin_lock_bh(&local->active_txq_lock[ac]);
---	local->schedule_round[ac]++;
---	spin_unlock_bh(&local->active_txq_lock[ac]);
--+	spin_lock_bh(&air_sched->lock);
--+	air_sched->schedule_pos = NULL;
--+	spin_unlock_bh(&air_sched->lock);
-- }
-- EXPORT_SYMBOL(ieee80211_txq_schedule_start);
-- 
-diff --git a/package/kernel/mac80211/patches/subsys/384-nl80211-add-common-API-to-configure-SAR-power-limita.patch b/package/kernel/mac80211/patches/subsys/384-nl80211-add-common-API-to-configure-SAR-power-limita.patch
-deleted file mode 100644
-index a47e29794c..0000000000
---- a/package/kernel/mac80211/patches/subsys/384-nl80211-add-common-API-to-configure-SAR-power-limita.patch
-+++ /dev/null
-@@ -1,398 +0,0 @@
--From: Carl Huang <cjhuang@codeaurora.org>
--Date: Thu, 3 Dec 2020 05:37:26 -0500
--Subject: [PATCH] nl80211: add common API to configure SAR power limitations
--
--NL80211_CMD_SET_SAR_SPECS is added to configure SAR from
--user space. NL80211_ATTR_SAR_SPEC is used to pass the SAR
--power specification when used with NL80211_CMD_SET_SAR_SPECS.
--
--Wireless driver needs to register SAR type, supported frequency
--ranges to wiphy, so user space can query it. The index in
--frequency range is used to specify which sub band the power
--limitation applies to. The SAR type is for compatibility, so later
--other SAR mechanism can be implemented without breaking the user
--space SAR applications.
--
--Normal process is user space queries the SAR capability, and
--gets the index of supported frequency ranges and associates the
--power limitation with this index and sends to kernel.
--
--Here is an example of message send to kernel:
--8c 00 00 00 08 00 01 00 00 00 00 00 38 00 2b 81
--08 00 01 00 00 00 00 00 2c 00 02 80 14 00 00 80
--08 00 02 00 00 00 00 00 08 00 01 00 38 00 00 00
--14 00 01 80 08 00 02 00 01 00 00 00 08 00 01 00
--48 00 00 00
--
--NL80211_CMD_SET_SAR_SPECS:  0x8c
--NL80211_ATTR_WIPHY:     0x01(phy idx is 0)
--NL80211_ATTR_SAR_SPEC:  0x812b (NLA_NESTED)
--NL80211_SAR_ATTR_TYPE:  0x00 (NL80211_SAR_TYPE_POWER)
--NL80211_SAR_ATTR_SPECS: 0x8002 (NLA_NESTED)
--freq range 0 power: 0x38 in 0.25dbm unit (14dbm)
--freq range 1 power: 0x48 in 0.25dbm unit (18dbm)
--
--Signed-off-by: Carl Huang <cjhuang@codeaurora.org>
--Reviewed-by: Brian Norris <briannorris@chromium.org>
--Reviewed-by: Abhishek Kumar <kuabhs@chromium.org>
--Link: https://lore.kernel.org/r/20201203103728.3034-2-cjhuang@codeaurora.org
--[minor edits, NLA parse cleanups]
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/include/net/cfg80211.h
--+++ b/include/net/cfg80211.h
--@@ -1737,6 +1737,54 @@ struct station_info {
-- 	u8 connected_to_as;
-- };
-- 
--+/**
--+ * struct cfg80211_sar_sub_specs - sub specs limit
--+ * @power: power limitation in 0.25dbm
--+ * @freq_range_index: index the power limitation applies to
--+ */
--+struct cfg80211_sar_sub_specs {
--+	s32 power;
--+	u32 freq_range_index;
--+};
--+
--+/**
--+ * struct cfg80211_sar_specs - sar limit specs
--+ * @type: it's set with power in 0.25dbm or other types
--+ * @num_sub_specs: number of sar sub specs
--+ * @sub_specs: memory to hold the sar sub specs
--+ */
--+struct cfg80211_sar_specs {
--+	enum nl80211_sar_type type;
--+	u32 num_sub_specs;
--+	struct cfg80211_sar_sub_specs sub_specs[];
--+};
--+
--+
--+/**
--+ * @struct cfg80211_sar_chan_ranges - sar frequency ranges
--+ * @start_freq:  start range edge frequency
--+ * @end_freq:    end range edge frequency
--+ */
--+struct cfg80211_sar_freq_ranges {
--+	u32 start_freq;
--+	u32 end_freq;
--+};
--+
--+/**
--+ * struct cfg80211_sar_capa - sar limit capability
--+ * @type: it's set via power in 0.25dbm or other types
--+ * @num_freq_ranges: number of frequency ranges
--+ * @freq_ranges: memory to hold the freq ranges.
--+ *
--+ * Note: WLAN driver may append new ranges or split an existing
--+ * range to small ones and then append them.
--+ */
--+struct cfg80211_sar_capa {
--+	enum nl80211_sar_type type;
--+	u32 num_freq_ranges;
--+	const struct cfg80211_sar_freq_ranges *freq_ranges;
--+};
--+
-- #if IS_ENABLED(CPTCFG_CFG80211)
-- /**
--  * cfg80211_get_station - retrieve information about a given station
--@@ -4259,6 +4307,8 @@ struct cfg80211_ops {
-- 				  struct cfg80211_tid_config *tid_conf);
-- 	int	(*reset_tid_config)(struct wiphy *wiphy, struct net_device *dev,
-- 				    const u8 *peer, u8 tids);
--+	int	(*set_sar_specs)(struct wiphy *wiphy,
--+				 struct cfg80211_sar_specs *sar);
-- };
-- 
-- /*
--@@ -5030,6 +5080,8 @@ struct wiphy {
-- 
-- 	u8 max_data_retry_count;
-- 
--+	const struct cfg80211_sar_capa *sar_capa;
--+
-- 	char priv[] __aligned(NETDEV_ALIGN);
-- };
-- 
----- a/net/wireless/nl80211.c
--+++ b/net/wireless/nl80211.c
--@@ -405,6 +405,18 @@ nl80211_unsol_bcast_probe_resp_policy[NL
-- 						       .len = IEEE80211_MAX_DATA_LEN }
-- };
-- 
--+static const struct nla_policy
--+sar_specs_policy[NL80211_SAR_ATTR_SPECS_MAX + 1] = {
--+	[NL80211_SAR_ATTR_SPECS_POWER] = { .type = NLA_S32 },
--+	[NL80211_SAR_ATTR_SPECS_RANGE_INDEX] = {.type = NLA_U32 },
--+};
--+
--+static const struct nla_policy
--+sar_policy[NL80211_SAR_ATTR_MAX + 1] = {
--+	[NL80211_SAR_ATTR_TYPE] = NLA_POLICY_MAX(NLA_U32, NUM_NL80211_SAR_TYPE),
--+	[NL80211_SAR_ATTR_SPECS] = NLA_POLICY_NESTED_ARRAY(sar_specs_policy),
--+};
--+
-- static const struct nla_policy nl80211_policy[NUM_NL80211_ATTR] = {
-- 	[0] = { .strict_start_type = NL80211_ATTR_HE_OBSS_PD },
-- 	[NL80211_ATTR_WIPHY] = { .type = NLA_U32 },
--@@ -739,6 +751,7 @@ static const struct nla_policy nl80211_p
-- 	[NL80211_ATTR_SAE_PWE] =
-- 		NLA_POLICY_RANGE(NLA_U8, NL80211_SAE_PWE_HUNT_AND_PECK,
-- 				 NL80211_SAE_PWE_BOTH),
--+	[NL80211_ATTR_SAR_SPEC] = NLA_POLICY_NESTED(sar_policy),
-- 	[NL80211_ATTR_RECONNECT_REQUESTED] = { .type = NLA_REJECT },
-- };
-- 
--@@ -2117,6 +2130,56 @@ fail:
-- 	return -ENOBUFS;
-- }
-- 
--+static int
--+nl80211_put_sar_specs(struct cfg80211_registered_device *rdev,
--+		      struct sk_buff *msg)
--+{
--+	struct nlattr *sar_capa, *specs, *sub_freq_range;
--+	u8 num_freq_ranges;
--+	int i;
--+
--+	if (!rdev->wiphy.sar_capa)
--+		return 0;
--+
--+	num_freq_ranges = rdev->wiphy.sar_capa->num_freq_ranges;
--+
--+	sar_capa = nla_nest_start(msg, NL80211_ATTR_SAR_SPEC);
--+	if (!sar_capa)
--+		return -ENOSPC;
--+
--+	if (nla_put_u32(msg, NL80211_SAR_ATTR_TYPE, rdev->wiphy.sar_capa->type))
--+		goto fail;
--+
--+	specs = nla_nest_start(msg, NL80211_SAR_ATTR_SPECS);
--+	if (!specs)
--+		goto fail;
--+
--+	/* report supported freq_ranges */
--+	for (i = 0; i < num_freq_ranges; i++) {
--+		sub_freq_range = nla_nest_start(msg, i + 1);
--+		if (!sub_freq_range)
--+			goto fail;
--+
--+		if (nla_put_u32(msg, NL80211_SAR_ATTR_SPECS_START_FREQ,
--+				rdev->wiphy.sar_capa->freq_ranges[i].start_freq))
--+			goto fail;
--+
--+		if (nla_put_u32(msg, NL80211_SAR_ATTR_SPECS_END_FREQ,
--+				rdev->wiphy.sar_capa->freq_ranges[i].end_freq))
--+			goto fail;
--+
--+		nla_nest_end(msg, sub_freq_range);
--+	}
--+
--+	nla_nest_end(msg, specs);
--+	nla_nest_end(msg, sar_capa);
--+
--+	return 0;
--+fail:
--+	nla_nest_cancel(msg, sar_capa);
--+	return -ENOBUFS;
--+}
--+
-- struct nl80211_dump_wiphy_state {
-- 	s64 filter_wiphy;
-- 	long start;
--@@ -2366,6 +2429,8 @@ static int nl80211_send_wiphy(struct cfg
-- 			CMD(set_multicast_to_unicast, SET_MULTICAST_TO_UNICAST);
-- 			CMD(update_connect_params, UPDATE_CONNECT_PARAMS);
-- 			CMD(update_ft_ies, UPDATE_FT_IES);
--+			if (rdev->wiphy.sar_capa)
--+				CMD(set_sar_specs, SET_SAR_SPECS);
-- 		}
-- #undef CMD
-- 
--@@ -2691,6 +2756,11 @@ static int nl80211_send_wiphy(struct cfg
-- 
-- 		if (nl80211_put_tid_config_support(rdev, msg))
-- 			goto nla_put_failure;
--+		state->split_start++;
--+		break;
--+	case 16:
--+		if (nl80211_put_sar_specs(rdev, msg))
--+			goto nla_put_failure;
-- 
-- 		/* done */
-- 		state->split_start = 0;
--@@ -14712,6 +14782,111 @@ static void nl80211_post_doit(__genl_con
-- 	}
-- }
-- 
--+static int nl80211_set_sar_sub_specs(struct cfg80211_registered_device *rdev,
--+				     struct cfg80211_sar_specs *sar_specs,
--+				     struct nlattr *spec[], int index)
--+{
--+	u32 range_index, i;
--+
--+	if (!sar_specs || !spec)
--+		return -EINVAL;
--+
--+	if (!spec[NL80211_SAR_ATTR_SPECS_POWER] ||
--+	    !spec[NL80211_SAR_ATTR_SPECS_RANGE_INDEX])
--+		return -EINVAL;
--+
--+	range_index = nla_get_u32(spec[NL80211_SAR_ATTR_SPECS_RANGE_INDEX]);
--+
--+	/* check if range_index exceeds num_freq_ranges */
--+	if (range_index >= rdev->wiphy.sar_capa->num_freq_ranges)
--+		return -EINVAL;
--+
--+	/* check if range_index duplicates */
--+	for (i = 0; i < index; i++) {
--+		if (sar_specs->sub_specs[i].freq_range_index == range_index)
--+			return -EINVAL;
--+	}
--+
--+	sar_specs->sub_specs[index].power =
--+		nla_get_s32(spec[NL80211_SAR_ATTR_SPECS_POWER]);
--+
--+	sar_specs->sub_specs[index].freq_range_index = range_index;
--+
--+	return 0;
--+}
--+
--+static int nl80211_set_sar_specs(struct sk_buff *skb, struct genl_info *info)
--+{
--+	struct cfg80211_registered_device *rdev = info->user_ptr[0];
--+	struct nlattr *spec[NL80211_SAR_ATTR_SPECS_MAX + 1];
--+	struct nlattr *tb[NL80211_SAR_ATTR_MAX + 1];
--+	struct cfg80211_sar_specs *sar_spec;
--+	enum nl80211_sar_type type;
--+	struct nlattr *spec_list;
--+	u32 specs;
--+	int rem, err;
--+
--+	if (!rdev->wiphy.sar_capa || !rdev->ops->set_sar_specs)
--+		return -EOPNOTSUPP;
--+
--+	if (!info->attrs[NL80211_ATTR_SAR_SPEC])
--+		return -EINVAL;
--+
--+	nla_parse_nested(tb, NL80211_SAR_ATTR_MAX,
--+			 info->attrs[NL80211_ATTR_SAR_SPEC],
--+			 NULL, NULL);
--+
--+	if (!tb[NL80211_SAR_ATTR_TYPE] || !tb[NL80211_SAR_ATTR_SPECS])
--+		return -EINVAL;
--+
--+	type = nla_get_u32(tb[NL80211_SAR_ATTR_TYPE]);
--+	if (type != rdev->wiphy.sar_capa->type)
--+		return -EINVAL;
--+
--+	specs = 0;
--+	nla_for_each_nested(spec_list, tb[NL80211_SAR_ATTR_SPECS], rem)
--+		specs++;
--+
--+	if (specs > rdev->wiphy.sar_capa->num_freq_ranges)
--+		return -EINVAL;
--+
--+	sar_spec = kzalloc(sizeof(*sar_spec) +
--+			   specs * sizeof(struct cfg80211_sar_sub_specs),
--+			   GFP_KERNEL);
--+	if (!sar_spec)
--+		return -ENOMEM;
--+
--+	sar_spec->type = type;
--+	specs = 0;
--+	nla_for_each_nested(spec_list, tb[NL80211_SAR_ATTR_SPECS], rem) {
--+		nla_parse_nested(spec, NL80211_SAR_ATTR_SPECS_MAX,
--+				 spec_list, NULL, NULL);
--+
--+		switch (type) {
--+		case NL80211_SAR_TYPE_POWER:
--+			if (nl80211_set_sar_sub_specs(rdev, sar_spec,
--+						      spec, specs)) {
--+				err = -EINVAL;
--+				goto error;
--+			}
--+			break;
--+		default:
--+			err = -EINVAL;
--+			goto error;
--+		}
--+		specs++;
--+	}
--+
--+	sar_spec->num_sub_specs = specs;
--+
--+	rdev->cur_cmd_info = info;
--+	err = rdev_set_sar_specs(rdev, sar_spec);
--+	rdev->cur_cmd_info = NULL;
--+error:
--+	kfree(sar_spec);
--+	return err;
--+}
--+
-- static __genl_const struct genl_ops nl80211_ops[] = {
-- 	{
-- 		.cmd = NL80211_CMD_GET_WIPHY,
--@@ -15575,6 +15750,14 @@ static const struct genl_small_ops nl802
-- 		.internal_flags = NL80211_FLAG_NEED_NETDEV |
-- 				  NL80211_FLAG_NEED_RTNL,
-- 	},
--+	{
--+		.cmd = NL80211_CMD_SET_SAR_SPECS,
--+		.validate = GENL_DONT_VALIDATE_STRICT | GENL_DONT_VALIDATE_DUMP,
--+		.doit = nl80211_set_sar_specs,
--+		.flags = GENL_UNS_ADMIN_PERM,
--+		.internal_flags = NL80211_FLAG_NEED_WIPHY |
--+				  NL80211_FLAG_NEED_RTNL,
--+	},
-- };
-- 
-- static struct genl_family nl80211_fam __genl_ro_after_init = {
----- a/net/wireless/rdev-ops.h
--+++ b/net/wireless/rdev-ops.h
--@@ -1356,4 +1356,16 @@ static inline int rdev_reset_tid_config(
-- 	return ret;
-- }
-- 
--+static inline int rdev_set_sar_specs(struct cfg80211_registered_device *rdev,
--+				     struct cfg80211_sar_specs *sar)
--+{
--+	int ret;
--+
--+	trace_rdev_set_sar_specs(&rdev->wiphy, sar);
--+	ret = rdev->ops->set_sar_specs(&rdev->wiphy, sar);
--+	trace_rdev_return_int(&rdev->wiphy, ret);
--+
--+	return ret;
--+}
--+
-- #endif /* __CFG80211_RDEV_OPS */
----- a/net/wireless/trace.h
--+++ b/net/wireless/trace.h
--@@ -3551,6 +3551,25 @@ TRACE_EVENT(rdev_reset_tid_config,
-- 	TP_printk(WIPHY_PR_FMT ", " NETDEV_PR_FMT ", peer: " MAC_PR_FMT ", tids: 0x%x",
-- 		  WIPHY_PR_ARG, NETDEV_PR_ARG, MAC_PR_ARG(peer), __entry->tids)
-- );
--+
--+TRACE_EVENT(rdev_set_sar_specs,
--+	TP_PROTO(struct wiphy *wiphy, struct cfg80211_sar_specs *sar),
--+	TP_ARGS(wiphy, sar),
--+	TP_STRUCT__entry(
--+		WIPHY_ENTRY
--+		__field(u16, type)
--+		__field(u16, num)
--+	),
--+	TP_fast_assign(
--+		WIPHY_ASSIGN;
--+		__entry->type = sar->type;
--+		__entry->num = sar->num_sub_specs;
--+
--+	),
--+	TP_printk(WIPHY_PR_FMT ", Set type:%d, num_specs:%d",
--+		  WIPHY_PR_ARG, __entry->type, __entry->num)
--+);
--+
-- #endif /* !__RDEV_OPS_TRACE || TRACE_HEADER_MULTI_READ */
-- 
-- #undef TRACE_INCLUDE_PATH
-diff --git a/package/kernel/mac80211/patches/subsys/385-mac80211-add-ieee80211_set_sar_specs.patch b/package/kernel/mac80211/patches/subsys/385-mac80211-add-ieee80211_set_sar_specs.patch
-deleted file mode 100644
-index c351bc812a..0000000000
---- a/package/kernel/mac80211/patches/subsys/385-mac80211-add-ieee80211_set_sar_specs.patch
-+++ /dev/null
-@@ -1,51 +0,0 @@
--From: Carl Huang <cjhuang@codeaurora.org>
--Date: Thu, 3 Dec 2020 05:37:27 -0500
--Subject: [PATCH] mac80211: add ieee80211_set_sar_specs
--
--This change registers ieee80211_set_sar_specs to
--mac80211_config_ops, so cfg80211 can call it.
--
--Signed-off-by: Carl Huang <cjhuang@codeaurora.org>
--Reviewed-by: Brian Norris <briannorris@chromium.org>
--Reviewed-by: Abhishek Kumar <kuabhs@chromium.org>
--Link: https://lore.kernel.org/r/20201203103728.3034-3-cjhuang@codeaurora.org
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/include/net/mac80211.h
--+++ b/include/net/mac80211.h
--@@ -4207,6 +4207,8 @@ struct ieee80211_ops {
-- 				   struct ieee80211_vif *vif);
-- 	void (*sta_set_4addr)(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
-- 			      struct ieee80211_sta *sta, bool enabled);
--+	int (*set_sar_specs)(struct ieee80211_hw *hw,
--+			     const struct cfg80211_sar_specs *sar);
-- 	void (*sta_set_decap_offload)(struct ieee80211_hw *hw,
-- 				      struct ieee80211_vif *vif,
-- 				      struct ieee80211_sta *sta, bool enabled);
----- a/net/mac80211/cfg.c
--+++ b/net/mac80211/cfg.c
--@@ -4136,6 +4136,17 @@ static int ieee80211_reset_tid_config(st
-- 	return ret;
-- }
-- 
--+static int ieee80211_set_sar_specs(struct wiphy *wiphy,
--+				   struct cfg80211_sar_specs *sar)
--+{
--+	struct ieee80211_local *local = wiphy_priv(wiphy);
--+
--+	if (!local->ops->set_sar_specs)
--+		return -EOPNOTSUPP;
--+
--+	return local->ops->set_sar_specs(&local->hw, sar);
--+}
--+
-- const struct cfg80211_ops mac80211_config_ops = {
-- 	.add_virtual_intf = ieee80211_add_iface,
-- 	.del_virtual_intf = ieee80211_del_iface,
--@@ -4239,4 +4250,5 @@ const struct cfg80211_ops mac80211_confi
-- 	.probe_mesh_link = ieee80211_probe_mesh_link,
-- 	.set_tid_config = ieee80211_set_tid_config,
-- 	.reset_tid_config = ieee80211_reset_tid_config,
--+	.set_sar_specs = ieee80211_set_sar_specs,
-- };
-diff --git a/package/kernel/mac80211/patches/subsys/386-mac80211-check-per-vif-offload_flags-in-Tx-path.patch b/package/kernel/mac80211/patches/subsys/386-mac80211-check-per-vif-offload_flags-in-Tx-path.patch
-deleted file mode 100644
-index c2cc16cd48..0000000000
---- a/package/kernel/mac80211/patches/subsys/386-mac80211-check-per-vif-offload_flags-in-Tx-path.patch
-+++ /dev/null
-@@ -1,26 +0,0 @@
--From: Ryder Lee <ryder.lee@mediatek.com>
--Date: Fri, 18 Jun 2021 04:38:59 +0800
--Subject: [PATCH] mac80211: check per vif offload_flags in Tx path
--
--offload_flags has been introduced to indicate encap status of each interface.
--An interface can encap offload at runtime, or if it has some extra limitations
--it can simply override the flags, so it's more flexible to check offload_flags
--in Tx path.
--
--Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
--Link: https://lore.kernel.org/r/177785418cf407808bf3a44760302d0647076990.1623961575.git.ryder.lee@mediatek.com
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/net/mac80211/tx.c
--+++ b/net/mac80211/tx.c
--@@ -3331,6 +3331,9 @@ static bool ieee80211_amsdu_aggregate(st
-- 	if (!ieee80211_hw_check(&local->hw, TX_AMSDU))
-- 		return false;
-- 
--+	if (sdata->vif.offload_flags & IEEE80211_OFFLOAD_ENCAP_ENABLED)
--+		return false;
--+
-- 	if (skb_is_gso(skb))
-- 		return false;
-- 
-diff --git a/package/kernel/mac80211/patches/subsys/387-nl80211-add-support-for-BSS-coloring.patch b/package/kernel/mac80211/patches/subsys/387-nl80211-add-support-for-BSS-coloring.patch
-deleted file mode 100644
-index 36b705de12..0000000000
---- a/package/kernel/mac80211/patches/subsys/387-nl80211-add-support-for-BSS-coloring.patch
-+++ /dev/null
-@@ -1,485 +0,0 @@
--From: John Crispin <john@phrozen.org>
--Date: Fri, 2 Jul 2021 19:44:07 +0200
--Subject: [PATCH] nl80211: add support for BSS coloring
--
--This patch adds support for BSS color collisions to the wireless subsystem.
--Add the required functionality to nl80211 that will notify about color
--collisions, triggering the color change and notifying when it is completed.
--
--Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org>
--Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
--Signed-off-by: John Crispin <john@phrozen.org>
--Link: https://lore.kernel.org/r/500b3582aec8fe2c42ef46f3117b148cb7cbceb5.1625247619.git.lorenzo@kernel.org
--[remove unnecessary NULL initialisation]
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/include/net/cfg80211.h
--+++ b/include/net/cfg80211.h
--@@ -1252,6 +1252,27 @@ struct cfg80211_csa_settings {
-- #define CFG80211_MAX_NUM_DIFFERENT_CHANNELS 10
-- 
-- /**
--+ * struct cfg80211_color_change_settings - color change settings
--+ *
--+ * Used for bss color change
--+ *
--+ * @beacon_color_change: beacon data while performing the color countdown
--+ * @counter_offsets_beacon: offsets of the counters within the beacon (tail)
--+ * @counter_offsets_presp: offsets of the counters within the probe response
--+ * @beacon_next: beacon data to be used after the color change
--+ * @count: number of beacons until the color change
--+ * @color: the color used after the change
--+ */
--+struct cfg80211_color_change_settings {
--+	struct cfg80211_beacon_data beacon_color_change;
--+	u16 counter_offset_beacon;
--+	u16 counter_offset_presp;
--+	struct cfg80211_beacon_data beacon_next;
--+	u8 count;
--+	u8 color;
--+};
--+
--+/**
--  * struct iface_combination_params - input parameters for interface combinations
--  *
--  * Used to pass interface combination parameters
--@@ -3979,6 +4000,8 @@ struct mgmt_frame_regs {
--  *	This callback may sleep.
--  * @reset_tid_config: Reset TID specific configuration for the peer, for the
--  *	given TIDs. This callback may sleep.
--+ *
--+ * @color_change: Initiate a color change.
--  */
-- struct cfg80211_ops {
-- 	int	(*suspend)(struct wiphy *wiphy, struct cfg80211_wowlan *wow);
--@@ -4309,6 +4332,9 @@ struct cfg80211_ops {
-- 				    const u8 *peer, u8 tids);
-- 	int	(*set_sar_specs)(struct wiphy *wiphy,
-- 				 struct cfg80211_sar_specs *sar);
--+	int	(*color_change)(struct wiphy *wiphy,
--+				struct net_device *dev,
--+				struct cfg80211_color_change_settings *params);
-- };
-- 
-- /*
--@@ -8094,4 +8120,70 @@ void cfg80211_update_owe_info_event(stru
--  */
-- void cfg80211_bss_flush(struct wiphy *wiphy);
-- 
--+/**
--+ * cfg80211_bss_color_notify - notify about bss color event
--+ * @dev: network device
--+ * @gfp: allocation flags
--+ * @cmd: the actual event we want to notify
--+ * @count: the number of TBTTs until the color change happens
--+ * @color_bitmap: representations of the colors that the local BSS is aware of
--+ */
--+int cfg80211_bss_color_notify(struct net_device *dev, gfp_t gfp,
--+			      enum nl80211_commands cmd, u8 count,
--+			      u64 color_bitmap);
--+
--+/**
--+ * cfg80211_obss_color_collision_notify - notify about bss color collision
--+ * @dev: network device
--+ * @color_bitmap: representations of the colors that the local BSS is aware of
--+ */
--+static inline int cfg80211_obss_color_collision_notify(struct net_device *dev,
--+						       u64 color_bitmap)
--+{
--+	return cfg80211_bss_color_notify(dev, GFP_KERNEL,
--+					 NL80211_CMD_OBSS_COLOR_COLLISION,
--+					 0, color_bitmap);
--+}
--+
--+/**
--+ * cfg80211_color_change_started_notify - notify color change start
--+ * @dev: the device on which the color is switched
--+ * @count: the number of TBTTs until the color change happens
--+ *
--+ * Inform the userspace about the color change that has started.
--+ */
--+static inline int cfg80211_color_change_started_notify(struct net_device *dev,
--+						       u8 count)
--+{
--+	return cfg80211_bss_color_notify(dev, GFP_KERNEL,
--+					 NL80211_CMD_COLOR_CHANGE_STARTED,
--+					 count, 0);
--+}
--+
--+/**
--+ * cfg80211_color_change_aborted_notify - notify color change abort
--+ * @dev: the device on which the color is switched
--+ *
--+ * Inform the userspace about the color change that has aborted.
--+ */
--+static inline int cfg80211_color_change_aborted_notify(struct net_device *dev)
--+{
--+	return cfg80211_bss_color_notify(dev, GFP_KERNEL,
--+					 NL80211_CMD_COLOR_CHANGE_ABORTED,
--+					 0, 0);
--+}
--+
--+/**
--+ * cfg80211_color_change_notify - notify color change completion
--+ * @dev: the device on which the color was switched
--+ *
--+ * Inform the userspace about the color change that has completed.
--+ */
--+static inline int cfg80211_color_change_notify(struct net_device *dev)
--+{
--+	return cfg80211_bss_color_notify(dev, GFP_KERNEL,
--+					 NL80211_CMD_COLOR_CHANGE_COMPLETED,
--+					 0, 0);
--+}
--+
-- #endif /* __NET_CFG80211_H */
----- a/include/uapi/linux/nl80211.h
--+++ b/include/uapi/linux/nl80211.h
--@@ -1185,6 +1185,21 @@
--  *	passed using %NL80211_ATTR_SAR_SPEC. %NL80211_ATTR_WIPHY is used to
--  *	specify the wiphy index to be applied to.
--  *
--+ * @NL80211_CMD_OBSS_COLOR_COLLISION: This notification is sent out whenever
--+ *	mac80211/drv detects a bss color collision.
--+ *
--+ * @NL80211_CMD_COLOR_CHANGE_REQUEST: This command is used to indicate that
--+ *	userspace wants to change the BSS color.
--+ *
--+ * @NL80211_CMD_COLOR_CHANGE_STARTED: Notify userland, that a color change has
--+ *	started
--+ *
--+ * @NL80211_CMD_COLOR_CHANGE_ABORTED: Notify userland, that the color change has
--+ *	been aborted
--+ *
--+ * @NL80211_CMD_COLOR_CHANGE_COMPLETED: Notify userland that the color change
--+ *	has completed
--+ *
--  * @NL80211_CMD_MAX: highest used command number
--  * @__NL80211_CMD_AFTER_LAST: internal use
--  */
--@@ -1417,6 +1432,14 @@ enum nl80211_commands {
-- 
-- 	NL80211_CMD_SET_SAR_SPECS,
-- 
--+	NL80211_CMD_OBSS_COLOR_COLLISION,
--+
--+	NL80211_CMD_COLOR_CHANGE_REQUEST,
--+
--+	NL80211_CMD_COLOR_CHANGE_STARTED,
--+	NL80211_CMD_COLOR_CHANGE_ABORTED,
--+	NL80211_CMD_COLOR_CHANGE_COMPLETED,
--+
-- 	/* add new commands above here */
-- 
-- 	/* used to define NL80211_CMD_MAX below */
--@@ -2560,6 +2583,16 @@ enum nl80211_commands {
--  *	disassoc events to indicate that an immediate reconnect to the AP
--  *	is desired.
--  *
--+ * @NL80211_ATTR_OBSS_COLOR_BITMAP: bitmap of the u64 BSS colors for the
--+ *	%NL80211_CMD_OBSS_COLOR_COLLISION event.
--+ *
--+ * @NL80211_ATTR_COLOR_CHANGE_COUNT: u8 attribute specifying the number of TBTT's
--+ *	until the color switch event.
--+ * @NL80211_ATTR_COLOR_CHANGE_COLOR: u8 attribute specifying the color that we are
--+ *	switching to
--+ * @NL80211_ATTR_COLOR_CHANGE_ELEMS: Nested set of attributes containing the IE
--+ *	information for the time while performing a color switch.
--+ *
--  * @NUM_NL80211_ATTR: total number of nl80211_attrs available
--  * @NL80211_ATTR_MAX: highest attribute number currently defined
--  * @__NL80211_ATTR_AFTER_LAST: internal use
--@@ -3057,6 +3090,12 @@ enum nl80211_attrs {
-- 
-- 	NL80211_ATTR_DISABLE_HE,
-- 
--+	NL80211_ATTR_OBSS_COLOR_BITMAP,
--+
--+	NL80211_ATTR_COLOR_CHANGE_COUNT,
--+	NL80211_ATTR_COLOR_CHANGE_COLOR,
--+	NL80211_ATTR_COLOR_CHANGE_ELEMS,
--+
-- 	/* add attributes here, update the policy in nl80211.c */
-- 
-- 	__NL80211_ATTR_AFTER_LAST,
--@@ -5950,6 +5989,9 @@ enum nl80211_feature_flags {
--  *      frame protection for all management frames exchanged during the
--  *      negotiation and range measurement procedure.
--  *
--+ * @NL80211_EXT_FEATURE_BSS_COLOR: The driver supports BSS color collision
--+ *	detection and change announcemnts.
--+ *
--  * @NUM_NL80211_EXT_FEATURES: number of extended features.
--  * @MAX_NL80211_EXT_FEATURES: highest extended feature index.
--  */
--@@ -6014,6 +6056,7 @@ enum nl80211_ext_feature_index {
-- 	NL80211_EXT_FEATURE_SECURE_LTF,
-- 	NL80211_EXT_FEATURE_SECURE_RTT,
-- 	NL80211_EXT_FEATURE_PROT_RANGE_NEGO_AND_MEASURE,
--+	NL80211_EXT_FEATURE_BSS_COLOR,
-- 
-- 	/* add new features before the definition below */
-- 	NUM_NL80211_EXT_FEATURES,
----- a/net/wireless/nl80211.c
--+++ b/net/wireless/nl80211.c
--@@ -753,6 +753,10 @@ static const struct nla_policy nl80211_p
-- 				 NL80211_SAE_PWE_BOTH),
-- 	[NL80211_ATTR_SAR_SPEC] = NLA_POLICY_NESTED(sar_policy),
-- 	[NL80211_ATTR_RECONNECT_REQUESTED] = { .type = NLA_REJECT },
--+	[NL80211_ATTR_OBSS_COLOR_BITMAP] = { .type = NLA_U64 },
--+	[NL80211_ATTR_COLOR_CHANGE_COUNT] = { .type = NLA_U8 },
--+	[NL80211_ATTR_COLOR_CHANGE_COLOR] = { .type = NLA_U8 },
--+	[NL80211_ATTR_COLOR_CHANGE_ELEMS] = NLA_POLICY_NESTED(nl80211_policy),
-- };
-- 
-- /* policy for the key attributes */
--@@ -14677,6 +14681,106 @@ bad_tid_conf:
-- 	return ret;
-- }
-- 
--+static int nl80211_color_change(struct sk_buff *skb, struct genl_info *info)
--+{
--+	struct cfg80211_registered_device *rdev = info->user_ptr[0];
--+	struct cfg80211_color_change_settings params = {};
--+	struct net_device *dev = info->user_ptr[1];
--+	struct wireless_dev *wdev = dev->ieee80211_ptr;
--+	struct nlattr **tb;
--+	u16 offset;
--+	int err;
--+
--+	if (!rdev->ops->color_change)
--+		return -EOPNOTSUPP;
--+
--+	if (!wiphy_ext_feature_isset(&rdev->wiphy,
--+				     NL80211_EXT_FEATURE_BSS_COLOR))
--+		return -EOPNOTSUPP;
--+
--+	if (wdev->iftype != NL80211_IFTYPE_AP)
--+		return -EOPNOTSUPP;
--+
--+	if (!info->attrs[NL80211_ATTR_COLOR_CHANGE_COUNT] ||
--+	    !info->attrs[NL80211_ATTR_COLOR_CHANGE_COLOR] ||
--+	    !info->attrs[NL80211_ATTR_COLOR_CHANGE_ELEMS])
--+		return -EINVAL;
--+
--+	params.count = nla_get_u8(info->attrs[NL80211_ATTR_COLOR_CHANGE_COUNT]);
--+	params.color = nla_get_u8(info->attrs[NL80211_ATTR_COLOR_CHANGE_COLOR]);
--+
--+	err = nl80211_parse_beacon(rdev, info->attrs, &params.beacon_next);
--+	if (err)
--+		return err;
--+
--+	tb = kcalloc(NL80211_ATTR_MAX + 1, sizeof(*tb), GFP_KERNEL);
--+	if (!tb)
--+		return -ENOMEM;
--+
--+	err = nla_parse_nested(tb, NL80211_ATTR_MAX,
--+			       info->attrs[NL80211_ATTR_COLOR_CHANGE_ELEMS],
--+			       nl80211_policy, info->extack);
--+	if (err)
--+		goto out;
--+
--+	err = nl80211_parse_beacon(rdev, tb, &params.beacon_color_change);
--+	if (err)
--+		goto out;
--+
--+	if (!tb[NL80211_ATTR_CNTDWN_OFFS_BEACON]) {
--+		err = -EINVAL;
--+		goto out;
--+	}
--+
--+	if (nla_len(tb[NL80211_ATTR_CNTDWN_OFFS_BEACON]) != sizeof(u16)) {
--+		err = -EINVAL;
--+		goto out;
--+	}
--+
--+	offset = nla_get_u16(tb[NL80211_ATTR_CNTDWN_OFFS_BEACON]);
--+	if (offset >= params.beacon_color_change.tail_len) {
--+		err = -EINVAL;
--+		goto out;
--+	}
--+
--+	if (params.beacon_color_change.tail[offset] != params.count) {
--+		err = -EINVAL;
--+		goto out;
--+	}
--+
--+	params.counter_offset_beacon = offset;
--+
--+	if (tb[NL80211_ATTR_CNTDWN_OFFS_PRESP]) {
--+		if (nla_len(tb[NL80211_ATTR_CNTDWN_OFFS_PRESP]) !=
--+		    sizeof(u16)) {
--+			err = -EINVAL;
--+			goto out;
--+		}
--+
--+		offset = nla_get_u16(tb[NL80211_ATTR_CNTDWN_OFFS_PRESP]);
--+		if (offset >= params.beacon_color_change.probe_resp_len) {
--+			err = -EINVAL;
--+			goto out;
--+		}
--+
--+		if (params.beacon_color_change.probe_resp[offset] !=
--+		    params.count) {
--+			err = -EINVAL;
--+			goto out;
--+		}
--+
--+		params.counter_offset_presp = offset;
--+	}
--+
--+	wdev_lock(wdev);
--+	err = rdev_color_change(rdev, dev, &params);
--+	wdev_unlock(wdev);
--+
--+out:
--+	kfree(tb);
--+	return err;
--+}
--+
-- #define NL80211_FLAG_NEED_WIPHY		0x01
-- #define NL80211_FLAG_NEED_NETDEV	0x02
-- #define NL80211_FLAG_NEED_RTNL		0x04
--@@ -15758,6 +15862,14 @@ static const struct genl_small_ops nl802
-- 		.internal_flags = NL80211_FLAG_NEED_WIPHY |
-- 				  NL80211_FLAG_NEED_RTNL,
-- 	},
--+	{
--+		.cmd = NL80211_CMD_COLOR_CHANGE_REQUEST,
--+		.validate = GENL_DONT_VALIDATE_STRICT | GENL_DONT_VALIDATE_DUMP,
--+		.doit = nl80211_color_change,
--+		.flags = GENL_UNS_ADMIN_PERM,
--+		.internal_flags = NL80211_FLAG_NEED_NETDEV_UP |
--+				  NL80211_FLAG_NEED_RTNL,
--+	},
-- };
-- 
-- static struct genl_family nl80211_fam __genl_ro_after_init = {
--@@ -17384,6 +17496,51 @@ void cfg80211_ch_switch_started_notify(s
-- }
-- EXPORT_SYMBOL(cfg80211_ch_switch_started_notify);
-- 
--+int cfg80211_bss_color_notify(struct net_device *dev, gfp_t gfp,
--+			      enum nl80211_commands cmd, u8 count,
--+			      u64 color_bitmap)
--+{
--+	struct wireless_dev *wdev = dev->ieee80211_ptr;
--+	struct wiphy *wiphy = wdev->wiphy;
--+	struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy);
--+	struct sk_buff *msg;
--+	void *hdr;
--+
--+	ASSERT_WDEV_LOCK(wdev);
--+
--+	trace_cfg80211_bss_color_notify(dev, cmd, count, color_bitmap);
--+
--+	msg = nlmsg_new(NLMSG_DEFAULT_SIZE, gfp);
--+	if (!msg)
--+		return -ENOMEM;
--+
--+	hdr = nl80211hdr_put(msg, 0, 0, 0, cmd);
--+	if (!hdr)
--+		goto nla_put_failure;
--+
--+	if (nla_put_u32(msg, NL80211_ATTR_IFINDEX, dev->ifindex))
--+		goto nla_put_failure;
--+
--+	if (cmd == NL80211_CMD_COLOR_CHANGE_STARTED &&
--+	    nla_put_u32(msg, NL80211_ATTR_COLOR_CHANGE_COUNT, count))
--+		goto nla_put_failure;
--+
--+	if (cmd == NL80211_CMD_OBSS_COLOR_COLLISION &&
--+	    nla_put_u64_64bit(msg, NL80211_ATTR_OBSS_COLOR_BITMAP,
--+			      color_bitmap, NL80211_ATTR_PAD))
--+		goto nla_put_failure;
--+
--+	genlmsg_end(msg, hdr);
--+
--+	return genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy),
--+				       msg, 0, NL80211_MCGRP_MLME, gfp);
--+
--+nla_put_failure:
--+	nlmsg_free(msg);
--+	return -EINVAL;
--+}
--+EXPORT_SYMBOL(cfg80211_bss_color_notify);
--+
-- void
-- nl80211_radar_notify(struct cfg80211_registered_device *rdev,
-- 		     const struct cfg80211_chan_def *chandef,
----- a/net/wireless/rdev-ops.h
--+++ b/net/wireless/rdev-ops.h
--@@ -1368,4 +1368,17 @@ static inline int rdev_set_sar_specs(str
-- 	return ret;
-- }
-- 
--+static inline int rdev_color_change(struct cfg80211_registered_device *rdev,
--+				    struct net_device *dev,
--+				    struct cfg80211_color_change_settings *params)
--+{
--+	int ret;
--+
--+	trace_rdev_color_change(&rdev->wiphy, dev, params);
--+	ret = rdev->ops->color_change(&rdev->wiphy, dev, params);
--+	trace_rdev_return_int(&rdev->wiphy, ret);
--+
--+	return ret;
--+}
--+
-- #endif /* __CFG80211_RDEV_OPS */
----- a/net/wireless/trace.h
--+++ b/net/wireless/trace.h
--@@ -3570,6 +3570,52 @@ TRACE_EVENT(rdev_set_sar_specs,
-- 		  WIPHY_PR_ARG, __entry->type, __entry->num)
-- );
-- 
--+TRACE_EVENT(rdev_color_change,
--+	TP_PROTO(struct wiphy *wiphy, struct net_device *netdev,
--+		 struct cfg80211_color_change_settings *params),
--+	TP_ARGS(wiphy, netdev, params),
--+	TP_STRUCT__entry(
--+		WIPHY_ENTRY
--+		NETDEV_ENTRY
--+		__field(u8, count)
--+		__field(u16, bcn_ofs)
--+		__field(u16, pres_ofs)
--+	),
--+	TP_fast_assign(
--+		WIPHY_ASSIGN;
--+		NETDEV_ASSIGN;
--+		__entry->count = params->count;
--+		__entry->bcn_ofs = params->counter_offset_beacon;
--+		__entry->pres_ofs = params->counter_offset_presp;
--+	),
--+	TP_printk(WIPHY_PR_FMT ", " NETDEV_PR_FMT
--+		  ", count: %u",
--+		  WIPHY_PR_ARG, NETDEV_PR_ARG,
--+		  __entry->count)
--+);
--+
--+TRACE_EVENT(cfg80211_bss_color_notify,
--+	TP_PROTO(struct net_device *netdev,
--+		 enum nl80211_commands cmd,
--+		 u8 count, u64 color_bitmap),
--+	TP_ARGS(netdev, cmd, count, color_bitmap),
--+	TP_STRUCT__entry(
--+		NETDEV_ENTRY
--+		__field(enum nl80211_bss_scan_width, cmd)
--+		__field(u8, count)
--+		__field(u64, color_bitmap)
--+	),
--+	TP_fast_assign(
--+		NETDEV_ASSIGN;
--+		__entry->cmd = cmd;
--+		__entry->count = count;
--+		__entry->color_bitmap = color_bitmap;
--+	),
--+	TP_printk(NETDEV_PR_FMT ", cmd: %x, count: %u, bitmap: %llx",
--+		  NETDEV_PR_ARG, __entry->cmd, __entry->count,
--+		  __entry->color_bitmap)
--+);
--+
-- #endif /* !__RDEV_OPS_TRACE || TRACE_HEADER_MULTI_READ */
-- 
-- #undef TRACE_INCLUDE_PATH
-diff --git a/package/kernel/mac80211/patches/subsys/388-mac80211-add-support-for-BSS-color-change.patch b/package/kernel/mac80211/patches/subsys/388-mac80211-add-support-for-BSS-color-change.patch
-deleted file mode 100644
-index 0a3118545f..0000000000
---- a/package/kernel/mac80211/patches/subsys/388-mac80211-add-support-for-BSS-color-change.patch
-+++ /dev/null
-@@ -1,524 +0,0 @@
--From: John Crispin <john@phrozen.org>
--Date: Fri, 2 Jul 2021 19:44:08 +0200
--Subject: [PATCH] mac80211: add support for BSS color change
--
--The color change announcement is very similar to how CSA works where
--we have an IE that includes a counter. When the counter hits 0, the new
--color is applied via an updated beacon.
--
--This patch makes the CSA counter functionality reusable, rather than
--implementing it again. This also allows for future reuse incase support
--for other counter IEs gets added.
--
--Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org>
--Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
--Signed-off-by: John Crispin <john@phrozen.org>
--Link: https://lore.kernel.org/r/057c1e67b82bee561ea44ce6a45a8462d3da6995.1625247619.git.lorenzo@kernel.org
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/include/net/mac80211.h
--+++ b/include/net/mac80211.h
--@@ -1710,6 +1710,10 @@ enum ieee80211_offload_flags {
--  *	protected by fq->lock.
--  * @offload_flags: 802.3 -> 802.11 enapsulation offload flags, see
--  *	&enum ieee80211_offload_flags.
--+ * @color_change_active: marks whether a color change is ongoing. Internally it is
--+ *	write-protected by sdata_lock and local->mtx so holding either is fine
--+ *	for read access.
--+ * @color_change_color: the bss color that will be used after the change.
--  */
-- struct ieee80211_vif {
-- 	enum nl80211_iftype type;
--@@ -1738,6 +1742,9 @@ struct ieee80211_vif {
-- 
-- 	bool txqs_stopped[IEEE80211_NUM_ACS];
-- 
--+	bool color_change_active;
--+	u8 color_change_color;
--+
-- 	/* must be last */
-- 	u8 drv_priv[] __aligned(sizeof(void *));
-- };
--@@ -4982,6 +4989,16 @@ void ieee80211_csa_finish(struct ieee802
-- bool ieee80211_beacon_cntdwn_is_complete(struct ieee80211_vif *vif);
-- 
-- /**
--+ * ieee80211_color_change_finish - notify mac80211 about color change
--+ * @vif: &struct ieee80211_vif pointer from the add_interface callback.
--+ *
--+ * After a color change announcement was scheduled and the counter in this
--+ * announcement hits 1, this function must be called by the driver to
--+ * notify mac80211 that the color can be changed
--+ */
--+void ieee80211_color_change_finish(struct ieee80211_vif *vif);
--+
--+/**
--  * ieee80211_proberesp_get - retrieve a Probe Response template
--  * @hw: pointer obtained from ieee80211_alloc_hw().
--  * @vif: &struct ieee80211_vif pointer from the add_interface callback.
--@@ -6726,6 +6743,18 @@ ieee80211_get_unsol_bcast_probe_resp_tmp
-- 					  struct ieee80211_vif *vif);
-- 
-- /**
--+ * ieeee80211_obss_color_collision_notify - notify userland about a BSS color
--+ * collision.
--+ *
--+ * @vif: &struct ieee80211_vif pointer from the add_interface callback.
--+ * @color_bitmap: a 64 bit bitmap representing the colors that the local BSS is
--+ *	aware of.
--+ */
--+void
--+ieeee80211_obss_color_collision_notify(struct ieee80211_vif *vif,
--+				       u64 color_bitmap);
--+
--+/**
--  * ieee80211_is_tx_data - check if frame is a data frame
--  *
--  * The function is used to check if a frame is a data frame. Frames with
----- a/net/mac80211/cfg.c
--+++ b/net/mac80211/cfg.c
--@@ -827,9 +827,11 @@ static int ieee80211_set_monitor_channel
-- 	return ret;
-- }
-- 
---static int ieee80211_set_probe_resp(struct ieee80211_sub_if_data *sdata,
---				    const u8 *resp, size_t resp_len,
---				    const struct ieee80211_csa_settings *csa)
--+static int
--+ieee80211_set_probe_resp(struct ieee80211_sub_if_data *sdata,
--+			 const u8 *resp, size_t resp_len,
--+			 const struct ieee80211_csa_settings *csa,
--+			 const struct ieee80211_color_change_settings *cca)
-- {
-- 	struct probe_resp *new, *old;
-- 
--@@ -849,6 +851,8 @@ static int ieee80211_set_probe_resp(stru
-- 		memcpy(new->cntdwn_counter_offsets, csa->counter_offsets_presp,
-- 		       csa->n_counter_offsets_presp *
-- 		       sizeof(new->cntdwn_counter_offsets[0]));
--+	else if (cca)
--+		new->cntdwn_counter_offsets[0] = cca->counter_offset_presp;
-- 
-- 	rcu_assign_pointer(sdata->u.ap.probe_resp, new);
-- 	if (old)
--@@ -954,7 +958,8 @@ static int ieee80211_set_ftm_responder_p
-- 
-- static int ieee80211_assign_beacon(struct ieee80211_sub_if_data *sdata,
-- 				   struct cfg80211_beacon_data *params,
---				   const struct ieee80211_csa_settings *csa)
--+				   const struct ieee80211_csa_settings *csa,
--+				   const struct ieee80211_color_change_settings *cca)
-- {
-- 	struct beacon_data *new, *old;
-- 	int new_head_len, new_tail_len;
--@@ -1003,6 +1008,9 @@ static int ieee80211_assign_beacon(struc
-- 		memcpy(new->cntdwn_counter_offsets, csa->counter_offsets_beacon,
-- 		       csa->n_counter_offsets_beacon *
-- 		       sizeof(new->cntdwn_counter_offsets[0]));
--+	} else if (cca) {
--+		new->cntdwn_current_counter = cca->count;
--+		new->cntdwn_counter_offsets[0] = cca->counter_offset_beacon;
-- 	}
-- 
-- 	/* copy in head */
--@@ -1019,7 +1027,7 @@ static int ieee80211_assign_beacon(struc
-- 			memcpy(new->tail, old->tail, new_tail_len);
-- 
-- 	err = ieee80211_set_probe_resp(sdata, params->probe_resp,
---				       params->probe_resp_len, csa);
--+				       params->probe_resp_len, csa, cca);
-- 	if (err < 0) {
-- 		kfree(new);
-- 		return err;
--@@ -1176,7 +1184,7 @@ static int ieee80211_start_ap(struct wip
-- 	if (ieee80211_hw_check(&local->hw, HAS_RATE_CONTROL))
-- 		sdata->vif.bss_conf.beacon_tx_rate = params->beacon_rate;
-- 
---	err = ieee80211_assign_beacon(sdata, &params->beacon, NULL);
--+	err = ieee80211_assign_beacon(sdata, &params->beacon, NULL, NULL);
-- 	if (err < 0)
-- 		goto error;
-- 	changed |= err;
--@@ -1231,17 +1239,17 @@ static int ieee80211_change_beacon(struc
-- 	sdata = IEEE80211_DEV_TO_SUB_IF(dev);
-- 	sdata_assert_lock(sdata);
-- 
---	/* don't allow changing the beacon while CSA is in place - offset
--+	/* don't allow changing the beacon while a countdown is in place - offset
-- 	 * of channel switch counter may change
-- 	 */
---	if (sdata->vif.csa_active)
--+	if (sdata->vif.csa_active || sdata->vif.color_change_active)
-- 		return -EBUSY;
-- 
-- 	old = sdata_dereference(sdata->u.ap.beacon, sdata);
-- 	if (!old)
-- 		return -ENOENT;
-- 
---	err = ieee80211_assign_beacon(sdata, params, NULL);
--+	err = ieee80211_assign_beacon(sdata, params, NULL, NULL);
-- 	if (err < 0)
-- 		return err;
-- 	ieee80211_bss_info_change_notify(sdata, err);
--@@ -3174,7 +3182,7 @@ static int ieee80211_set_after_csa_beaco
-- 	switch (sdata->vif.type) {
-- 	case NL80211_IFTYPE_AP:
-- 		err = ieee80211_assign_beacon(sdata, sdata->u.ap.next_beacon,
---					      NULL);
--+					      NULL, NULL);
-- 		kfree(sdata->u.ap.next_beacon);
-- 		sdata->u.ap.next_beacon = NULL;
-- 
--@@ -3340,7 +3348,7 @@ static int ieee80211_set_csa_beacon(stru
-- 		csa.n_counter_offsets_presp = params->n_counter_offsets_presp;
-- 		csa.count = params->count;
-- 
---		err = ieee80211_assign_beacon(sdata, &params->beacon_csa, &csa);
--+		err = ieee80211_assign_beacon(sdata, &params->beacon_csa, &csa, NULL);
-- 		if (err < 0) {
-- 			kfree(sdata->u.ap.next_beacon);
-- 			return err;
--@@ -3428,6 +3436,15 @@ static int ieee80211_set_csa_beacon(stru
-- 	return 0;
-- }
-- 
--+static void ieee80211_color_change_abort(struct ieee80211_sub_if_data  *sdata)
--+{
--+	sdata->vif.color_change_active = false;
--+	kfree(sdata->u.ap.next_beacon);
--+	sdata->u.ap.next_beacon = NULL;
--+
--+	cfg80211_color_change_aborted_notify(sdata->dev);
--+}
--+
-- static int
-- __ieee80211_channel_switch(struct wiphy *wiphy, struct net_device *dev,
-- 			   struct cfg80211_csa_settings *params)
--@@ -3496,6 +3513,10 @@ __ieee80211_channel_switch(struct wiphy
-- 		goto out;
-- 	}
-- 
--+	/* if there is a color change in progress, abort it */
--+	if (sdata->vif.color_change_active)
--+		ieee80211_color_change_abort(sdata);
--+
-- 	err = ieee80211_set_csa_beacon(sdata, params, &changed);
-- 	if (err) {
-- 		ieee80211_vif_unreserve_chanctx(sdata);
--@@ -4147,6 +4168,196 @@ static int ieee80211_set_sar_specs(struc
-- 	return local->ops->set_sar_specs(&local->hw, sar);
-- }
-- 
--+static int
--+ieee80211_set_after_color_change_beacon(struct ieee80211_sub_if_data *sdata,
--+					u32 *changed)
--+{
--+	switch (sdata->vif.type) {
--+	case NL80211_IFTYPE_AP: {
--+		int ret;
--+
--+		ret = ieee80211_assign_beacon(sdata, sdata->u.ap.next_beacon,
--+					      NULL, NULL);
--+		kfree(sdata->u.ap.next_beacon);
--+		sdata->u.ap.next_beacon = NULL;
--+
--+		if (ret < 0)
--+			return ret;
--+
--+		*changed |= ret;
--+		break;
--+	}
--+	default:
--+		WARN_ON_ONCE(1);
--+		return -EINVAL;
--+	}
--+
--+	return 0;
--+}
--+
--+static int
--+ieee80211_set_color_change_beacon(struct ieee80211_sub_if_data *sdata,
--+				  struct cfg80211_color_change_settings *params,
--+				  u32 *changed)
--+{
--+	struct ieee80211_color_change_settings color_change = {};
--+	int err;
--+
--+	switch (sdata->vif.type) {
--+	case NL80211_IFTYPE_AP:
--+		sdata->u.ap.next_beacon =
--+			cfg80211_beacon_dup(&params->beacon_next);
--+		if (!sdata->u.ap.next_beacon)
--+			return -ENOMEM;
--+
--+		if (params->count <= 1)
--+			break;
--+
--+		color_change.counter_offset_beacon =
--+			params->counter_offset_beacon;
--+		color_change.counter_offset_presp =
--+			params->counter_offset_presp;
--+		color_change.count = params->count;
--+
--+		err = ieee80211_assign_beacon(sdata, &params->beacon_color_change,
--+					      NULL, &color_change);
--+		if (err < 0) {
--+			kfree(sdata->u.ap.next_beacon);
--+			return err;
--+		}
--+		*changed |= err;
--+		break;
--+	default:
--+		return -EOPNOTSUPP;
--+	}
--+
--+	return 0;
--+}
--+
--+static void
--+ieee80211_color_change_bss_config_notify(struct ieee80211_sub_if_data *sdata,
--+					 u8 color, int enable, u32 changed)
--+{
--+	sdata->vif.bss_conf.he_bss_color.color = color;
--+	sdata->vif.bss_conf.he_bss_color.enabled = enable;
--+	changed |= BSS_CHANGED_HE_BSS_COLOR;
--+
--+	ieee80211_bss_info_change_notify(sdata, changed);
--+}
--+
--+static int ieee80211_color_change_finalize(struct ieee80211_sub_if_data *sdata)
--+{
--+	struct ieee80211_local *local = sdata->local;
--+	u32 changed = 0;
--+	int err;
--+
--+	sdata_assert_lock(sdata);
--+	lockdep_assert_held(&local->mtx);
--+
--+	sdata->vif.color_change_active = false;
--+
--+	err = ieee80211_set_after_color_change_beacon(sdata, &changed);
--+	if (err) {
--+		cfg80211_color_change_aborted_notify(sdata->dev);
--+		return err;
--+	}
--+
--+	ieee80211_color_change_bss_config_notify(sdata,
--+						 sdata->vif.color_change_color,
--+						 1, changed);
--+	cfg80211_color_change_notify(sdata->dev);
--+
--+	return 0;
--+}
--+
--+void ieee80211_color_change_finalize_work(struct work_struct *work)
--+{
--+	struct ieee80211_sub_if_data *sdata =
--+		container_of(work, struct ieee80211_sub_if_data,
--+			     color_change_finalize_work);
--+	struct ieee80211_local *local = sdata->local;
--+
--+	sdata_lock(sdata);
--+	mutex_lock(&local->mtx);
--+
--+	/* AP might have been stopped while waiting for the lock. */
--+	if (!sdata->vif.color_change_active)
--+		goto unlock;
--+
--+	if (!ieee80211_sdata_running(sdata))
--+		goto unlock;
--+
--+	ieee80211_color_change_finalize(sdata);
--+
--+unlock:
--+	mutex_unlock(&local->mtx);
--+	sdata_unlock(sdata);
--+}
--+
--+void ieee80211_color_change_finish(struct ieee80211_vif *vif)
--+{
--+	struct ieee80211_sub_if_data *sdata = vif_to_sdata(vif);
--+
--+	ieee80211_queue_work(&sdata->local->hw,
--+			     &sdata->color_change_finalize_work);
--+}
--+EXPORT_SYMBOL_GPL(ieee80211_color_change_finish);
--+
--+void
--+ieeee80211_obss_color_collision_notify(struct ieee80211_vif *vif,
--+				       u64 color_bitmap)
--+{
--+	struct ieee80211_sub_if_data *sdata = vif_to_sdata(vif);
--+
--+	if (sdata->vif.color_change_active || sdata->vif.csa_active)
--+		return;
--+
--+	cfg80211_obss_color_collision_notify(sdata->dev, color_bitmap);
--+}
--+EXPORT_SYMBOL_GPL(ieeee80211_obss_color_collision_notify);
--+
--+static int
--+ieee80211_color_change(struct wiphy *wiphy, struct net_device *dev,
--+		       struct cfg80211_color_change_settings *params)
--+{
--+	struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
--+	struct ieee80211_local *local = sdata->local;
--+	u32 changed = 0;
--+	int err;
--+
--+	sdata_assert_lock(sdata);
--+
--+	mutex_lock(&local->mtx);
--+
--+	/* don't allow another color change if one is already active or if csa
--+	 * is active
--+	 */
--+	if (sdata->vif.color_change_active || sdata->vif.csa_active) {
--+		err = -EBUSY;
--+		goto out;
--+	}
--+
--+	err = ieee80211_set_color_change_beacon(sdata, params, &changed);
--+	if (err)
--+		goto out;
--+
--+	sdata->vif.color_change_active = true;
--+	sdata->vif.color_change_color = params->color;
--+
--+	cfg80211_color_change_started_notify(sdata->dev, params->count);
--+
--+	if (changed)
--+		ieee80211_color_change_bss_config_notify(sdata, 0, 0, changed);
--+	else
--+		/* if the beacon didn't change, we can finalize immediately */
--+		ieee80211_color_change_finalize(sdata);
--+
--+out:
--+	mutex_unlock(&local->mtx);
--+
--+	return err;
--+}
--+
-- const struct cfg80211_ops mac80211_config_ops = {
-- 	.add_virtual_intf = ieee80211_add_iface,
-- 	.del_virtual_intf = ieee80211_del_iface,
--@@ -4251,4 +4462,5 @@ const struct cfg80211_ops mac80211_confi
-- 	.set_tid_config = ieee80211_set_tid_config,
-- 	.reset_tid_config = ieee80211_reset_tid_config,
-- 	.set_sar_specs = ieee80211_set_sar_specs,
--+	.color_change = ieee80211_color_change,
-- };
----- a/net/mac80211/ieee80211_i.h
--+++ b/net/mac80211/ieee80211_i.h
--@@ -248,6 +248,12 @@ struct ieee80211_csa_settings {
-- 	u8 count;
-- };
-- 
--+struct ieee80211_color_change_settings {
--+	u16 counter_offset_beacon;
--+	u16 counter_offset_presp;
--+	u8 count;
--+};
--+
-- struct beacon_data {
-- 	u8 *head, *tail;
-- 	int head_len, tail_len;
--@@ -932,6 +938,8 @@ struct ieee80211_sub_if_data {
-- 	bool csa_block_tx; /* write-protected by sdata_lock and local->mtx */
-- 	struct cfg80211_chan_def csa_chandef;
-- 
--+	struct work_struct color_change_finalize_work;
--+
-- 	struct list_head assigned_chanctx_list; /* protected by chanctx_mtx */
-- 	struct list_head reserved_chanctx_list; /* protected by chanctx_mtx */
-- 
--@@ -1900,6 +1908,9 @@ void ieee80211_csa_finalize_work(struct
-- int ieee80211_channel_switch(struct wiphy *wiphy, struct net_device *dev,
-- 			     struct cfg80211_csa_settings *params);
-- 
--+/* color change handling */
--+void ieee80211_color_change_finalize_work(struct work_struct *work);
--+
-- /* interface handling */
-- #define MAC80211_SUPPORTED_FEATURES_TX	(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | \
-- 					 NETIF_F_HW_CSUM | NETIF_F_SG | \
----- a/net/mac80211/iface.c
--+++ b/net/mac80211/iface.c
--@@ -465,6 +465,7 @@ static void ieee80211_do_stop(struct iee
-- 	sdata_unlock(sdata);
-- 
-- 	cancel_work_sync(&sdata->csa_finalize_work);
--+	cancel_work_sync(&sdata->color_change_finalize_work);
-- 
-- 	cancel_delayed_work_sync(&sdata->dfs_cac_timer_work);
-- 
--@@ -1639,6 +1640,7 @@ static void ieee80211_setup_sdata(struct
-- 	INIT_WORK(&sdata->work, ieee80211_iface_work);
-- 	INIT_WORK(&sdata->recalc_smps, ieee80211_recalc_smps_work);
-- 	INIT_WORK(&sdata->csa_finalize_work, ieee80211_csa_finalize_work);
--+	INIT_WORK(&sdata->color_change_finalize_work, ieee80211_color_change_finalize_work);
-- 	INIT_LIST_HEAD(&sdata->assigned_chanctx_list);
-- 	INIT_LIST_HEAD(&sdata->reserved_chanctx_list);
-- 
----- a/net/mac80211/tx.c
--+++ b/net/mac80211/tx.c
--@@ -4790,11 +4790,11 @@ static int ieee80211_beacon_add_tim(stru
-- static void ieee80211_set_beacon_cntdwn(struct ieee80211_sub_if_data *sdata,
-- 					struct beacon_data *beacon)
-- {
--+	u8 *beacon_data, count, max_count = 1;
-- 	struct probe_resp *resp;
---	u8 *beacon_data;
-- 	size_t beacon_data_len;
--+	u16 *bcn_offsets;
-- 	int i;
---	u8 count = beacon->cntdwn_current_counter;
-- 
-- 	switch (sdata->vif.type) {
-- 	case NL80211_IFTYPE_AP:
--@@ -4814,21 +4814,27 @@ static void ieee80211_set_beacon_cntdwn(
-- 	}
-- 
-- 	rcu_read_lock();
---	for (i = 0; i < IEEE80211_MAX_CNTDWN_COUNTERS_NUM; ++i) {
---		resp = rcu_dereference(sdata->u.ap.probe_resp);
--+	resp = rcu_dereference(sdata->u.ap.probe_resp);
-- 
---		if (beacon->cntdwn_counter_offsets[i]) {
---			if (WARN_ON_ONCE(beacon->cntdwn_counter_offsets[i] >=
---					 beacon_data_len)) {
--+	bcn_offsets = beacon->cntdwn_counter_offsets;
--+	count = beacon->cntdwn_current_counter;
--+	if (sdata->vif.csa_active)
--+		max_count = IEEE80211_MAX_CNTDWN_COUNTERS_NUM;
--+
--+	for (i = 0; i < max_count; ++i) {
--+		if (bcn_offsets[i]) {
--+			if (WARN_ON_ONCE(bcn_offsets[i] >= beacon_data_len)) {
-- 				rcu_read_unlock();
-- 				return;
-- 			}
---
---			beacon_data[beacon->cntdwn_counter_offsets[i]] = count;
--+			beacon_data[bcn_offsets[i]] = count;
-- 		}
-- 
---		if (sdata->vif.type == NL80211_IFTYPE_AP && resp)
---			resp->data[resp->cntdwn_counter_offsets[i]] = count;
--+		if (sdata->vif.type == NL80211_IFTYPE_AP && resp) {
--+			u16 *resp_offsets = resp->cntdwn_counter_offsets;
--+
--+			resp->data[resp_offsets[i]] = count;
--+		}
-- 	}
-- 	rcu_read_unlock();
-- }
--@@ -5038,6 +5044,7 @@ __ieee80211_beacon_get(struct ieee80211_
-- 			if (offs) {
-- 				offs->tim_offset = beacon->head_len;
-- 				offs->tim_length = skb->len - beacon->head_len;
--+				offs->cntdwn_counter_offs[0] = beacon->cntdwn_counter_offsets[0];
-- 
-- 				/* for AP the csa offsets are from tail */
-- 				csa_off_base = skb->len;
-diff --git a/package/kernel/mac80211/patches/subsys/389-ieee80211-add-TWT-element-definitions.patch b/package/kernel/mac80211/patches/subsys/389-ieee80211-add-TWT-element-definitions.patch
-deleted file mode 100644
-index 369619938e..0000000000
---- a/package/kernel/mac80211/patches/subsys/389-ieee80211-add-TWT-element-definitions.patch
-+++ /dev/null
-@@ -1,112 +0,0 @@
--From: Lorenzo Bianconi <lorenzo@kernel.org>
--Date: Mon, 23 Aug 2021 20:02:38 +0200
--Subject: [PATCH] ieee80211: add TWT element definitions
--
--Introduce TWT definitions and TWT Information element structure
--in ieee80211.h
--
--Tested-by: Peter Chiu <chui-hao.chiu@mediatek.com>
--Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
--Link: https://lore.kernel.org/r/71d8b581fe4b5abc5b92f8d77ac2de3e2f7591b6.1629741512.git.lorenzo@kernel.org
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/include/linux/ieee80211.h
--+++ b/include/linux/ieee80211.h
--@@ -1088,6 +1088,48 @@ struct ieee80211_ext {
-- 	} u;
-- } __packed __aligned(2);
-- 
--+#define IEEE80211_TWT_CONTROL_NDP			BIT(0)
--+#define IEEE80211_TWT_CONTROL_RESP_MODE			BIT(1)
--+#define IEEE80211_TWT_CONTROL_NEG_TYPE_BROADCAST	BIT(3)
--+#define IEEE80211_TWT_CONTROL_RX_DISABLED		BIT(4)
--+#define IEEE80211_TWT_CONTROL_WAKE_DUR_UNIT		BIT(5)
--+
--+#define IEEE80211_TWT_REQTYPE_REQUEST			BIT(0)
--+#define IEEE80211_TWT_REQTYPE_SETUP_CMD			GENMASK(3, 1)
--+#define IEEE80211_TWT_REQTYPE_TRIGGER			BIT(4)
--+#define IEEE80211_TWT_REQTYPE_IMPLICIT			BIT(5)
--+#define IEEE80211_TWT_REQTYPE_FLOWTYPE			BIT(6)
--+#define IEEE80211_TWT_REQTYPE_FLOWID			GENMASK(9, 7)
--+#define IEEE80211_TWT_REQTYPE_WAKE_INT_EXP		GENMASK(14, 10)
--+#define IEEE80211_TWT_REQTYPE_PROTECTION		BIT(15)
--+
--+enum ieee80211_twt_setup_cmd {
--+	TWT_SETUP_CMD_REQUEST,
--+	TWT_SETUP_CMD_SUGGEST,
--+	TWT_SETUP_CMD_DEMAND,
--+	TWT_SETUP_CMD_GROUPING,
--+	TWT_SETUP_CMD_ACCEPT,
--+	TWT_SETUP_CMD_ALTERNATE,
--+	TWT_SETUP_CMD_DICTATE,
--+	TWT_SETUP_CMD_REJECT,
--+};
--+
--+struct ieee80211_twt_params {
--+	__le16 req_type;
--+	__le64 twt;
--+	u8 min_twt_dur;
--+	__le16 mantissa;
--+	u8 channel;
--+} __packed;
--+
--+struct ieee80211_twt_setup {
--+	u8 dialog_token;
--+	u8 element_id;
--+	u8 length;
--+	u8 control;
--+	u8 params[];
--+} __packed;
--+
-- struct ieee80211_mgmt {
-- 	__le16 frame_control;
-- 	__le16 duration;
--@@ -1252,6 +1294,10 @@ struct ieee80211_mgmt {
-- 					__le16 toa_error;
-- 					u8 variable[0];
-- 				} __packed ftm;
--+				struct {
--+					u8 action_code;
--+					u8 variable[];
--+				} __packed s1g;
-- 			} u;
-- 		} __packed action;
-- 	} u;
--@@ -2880,6 +2926,7 @@ enum ieee80211_eid {
-- 	WLAN_EID_AID_RESPONSE = 211,
-- 	WLAN_EID_S1G_BCN_COMPAT = 213,
-- 	WLAN_EID_S1G_SHORT_BCN_INTERVAL = 214,
--+	WLAN_EID_S1G_TWT = 216,
-- 	WLAN_EID_S1G_CAPABILITIES = 217,
-- 	WLAN_EID_VENDOR_SPECIFIC = 221,
-- 	WLAN_EID_QOS_PARAMETER = 222,
--@@ -2948,6 +2995,7 @@ enum ieee80211_category {
-- 	WLAN_CATEGORY_FST = 18,
-- 	WLAN_CATEGORY_UNPROT_DMG = 20,
-- 	WLAN_CATEGORY_VHT = 21,
--+	WLAN_CATEGORY_S1G = 22,
-- 	WLAN_CATEGORY_VENDOR_SPECIFIC_PROTECTED = 126,
-- 	WLAN_CATEGORY_VENDOR_SPECIFIC = 127,
-- };
--@@ -3021,6 +3069,20 @@ enum ieee80211_key_len {
-- 	WLAN_KEY_LEN_BIP_GMAC_256 = 32,
-- };
-- 
--+enum ieee80211_s1g_actioncode {
--+	WLAN_S1G_AID_SWITCH_REQUEST,
--+	WLAN_S1G_AID_SWITCH_RESPONSE,
--+	WLAN_S1G_SYNC_CONTROL,
--+	WLAN_S1G_STA_INFO_ANNOUNCE,
--+	WLAN_S1G_EDCA_PARAM_SET,
--+	WLAN_S1G_EL_OPERATION,
--+	WLAN_S1G_TWT_SETUP,
--+	WLAN_S1G_TWT_TEARDOWN,
--+	WLAN_S1G_SECT_GROUP_ID_LIST,
--+	WLAN_S1G_SECT_ID_FEEDBACK,
--+	WLAN_S1G_TWT_INFORMATION = 11,
--+};
--+
-- #define IEEE80211_WEP_IV_LEN		4
-- #define IEEE80211_WEP_ICV_LEN		4
-- #define IEEE80211_CCMP_HDR_LEN		8
-diff --git a/package/kernel/mac80211/patches/subsys/390-mac80211-introduce-individual-TWT-support-in-AP-mode.patch b/package/kernel/mac80211/patches/subsys/390-mac80211-introduce-individual-TWT-support-in-AP-mode.patch
-deleted file mode 100644
-index c32861a78f..0000000000
---- a/package/kernel/mac80211/patches/subsys/390-mac80211-introduce-individual-TWT-support-in-AP-mode.patch
-+++ /dev/null
-@@ -1,576 +0,0 @@
--From: Lorenzo Bianconi <lorenzo@kernel.org>
--Date: Mon, 23 Aug 2021 20:02:39 +0200
--Subject: [PATCH] mac80211: introduce individual TWT support in AP mode
--
--Introduce TWT action frames parsing support to mac80211.
--Currently just individual TWT agreement are support in AP mode.
--Whenever the AP receives a TWT action frame from an associated client,
--after performing sanity checks, it will notify the underlay driver with
--requested parameters in order to check if they are supported and if there
--is enough room for a new agreement. The driver is expected to set the
--agreement result and report it to mac80211.
--
--Drivers supporting this have two new callbacks:
-- - add_twt_setup (mandatory)
-- - twt_teardown_request (optional)
--
--mac80211 will send an action frame reply according to the result
--reported by the driver.
--
--Tested-by: Peter Chiu <chui-hao.chiu@mediatek.com>
--Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
--Link: https://lore.kernel.org/r/257512f2e22ba42b9f2624942a128dd8f141de4b.1629741512.git.lorenzo@kernel.org
--[use le16p_replace_bits(), minor cleanups, use (void *) casts,
-- fix to use ieee80211_get_he_iftype_cap() correctly]
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/include/net/mac80211.h
--+++ b/include/net/mac80211.h
--@@ -4219,6 +4219,11 @@ struct ieee80211_ops {
-- 	void (*sta_set_decap_offload)(struct ieee80211_hw *hw,
-- 				      struct ieee80211_vif *vif,
-- 				      struct ieee80211_sta *sta, bool enabled);
--+	void (*add_twt_setup)(struct ieee80211_hw *hw,
--+			      struct ieee80211_sta *sta,
--+			      struct ieee80211_twt_setup *twt);
--+	void (*twt_teardown_request)(struct ieee80211_hw *hw,
--+				     struct ieee80211_sta *sta, u8 flowid);
-- };
-- 
-- /**
----- a/net/mac80211/driver-ops.h
--+++ b/net/mac80211/driver-ops.h
--@@ -1429,4 +1429,40 @@ static inline void drv_sta_set_decap_off
-- 	trace_drv_return_void(local);
-- }
-- 
--+static inline void drv_add_twt_setup(struct ieee80211_local *local,
--+				     struct ieee80211_sub_if_data *sdata,
--+				     struct ieee80211_sta *sta,
--+				     struct ieee80211_twt_setup *twt)
--+{
--+	struct ieee80211_twt_params *twt_agrt;
--+
--+	might_sleep();
--+
--+	if (!check_sdata_in_driver(sdata))
--+		return;
--+
--+	twt_agrt = (void *)twt->params;
--+
--+	trace_drv_add_twt_setup(local, sta, twt, twt_agrt);
--+	local->ops->add_twt_setup(&local->hw, sta, twt);
--+	trace_drv_return_void(local);
--+}
--+
--+static inline void drv_twt_teardown_request(struct ieee80211_local *local,
--+					    struct ieee80211_sub_if_data *sdata,
--+					    struct ieee80211_sta *sta,
--+					    u8 flowid)
--+{
--+	might_sleep();
--+	if (!check_sdata_in_driver(sdata))
--+		return;
--+
--+	if (!local->ops->twt_teardown_request)
--+		return;
--+
--+	trace_drv_twt_teardown_request(local, sta, flowid);
--+	local->ops->twt_teardown_request(&local->hw, sta, flowid);
--+	trace_drv_return_void(local);
--+}
--+
-- #endif /* __MAC80211_DRIVER_OPS */
----- a/net/mac80211/ieee80211_i.h
--+++ b/net/mac80211/ieee80211_i.h
--@@ -954,6 +954,7 @@ struct ieee80211_sub_if_data {
-- 
-- 	struct work_struct work;
-- 	struct sk_buff_head skb_queue;
--+	struct sk_buff_head status_queue;
-- 
-- 	u8 needed_rx_chains;
-- 	enum ieee80211_smps_mode smps_mode;
--@@ -2093,6 +2094,11 @@ ieee80211_he_op_ie_to_bss_conf(struct ie
-- 
-- /* S1G */
-- void ieee80211_s1g_sta_rate_init(struct sta_info *sta);
--+bool ieee80211_s1g_is_twt_setup(struct sk_buff *skb);
--+void ieee80211_s1g_rx_twt_action(struct ieee80211_sub_if_data *sdata,
--+				 struct sk_buff *skb);
--+void ieee80211_s1g_status_twt_action(struct ieee80211_sub_if_data *sdata,
--+				     struct sk_buff *skb);
-- 
-- /* Spectrum management */
-- void ieee80211_process_measurement_req(struct ieee80211_sub_if_data *sdata,
----- a/net/mac80211/iface.c
--+++ b/net/mac80211/iface.c
--@@ -563,6 +563,7 @@ static void ieee80211_do_stop(struct iee
-- 		 */
-- 		ieee80211_free_keys(sdata, true);
-- 		skb_queue_purge(&sdata->skb_queue);
--+		skb_queue_purge(&sdata->status_queue);
-- 	}
-- 
-- 	spin_lock_irqsave(&local->queue_stop_reason_lock, flags);
--@@ -1070,6 +1071,7 @@ int ieee80211_add_virtual_monitor(struct
-- 	}
-- 
-- 	skb_queue_head_init(&sdata->skb_queue);
--+	skb_queue_head_init(&sdata->status_queue);
-- 	INIT_WORK(&sdata->work, ieee80211_iface_work);
-- 
-- 	return 0;
--@@ -1442,6 +1444,24 @@ static void ieee80211_if_setup_no_queue(
-- #endif
-- }
-- 
--+static void ieee80211_iface_process_status(struct ieee80211_sub_if_data *sdata,
--+					   struct sk_buff *skb)
--+{
--+	struct ieee80211_mgmt *mgmt = (void *)skb->data;
--+
--+	if (ieee80211_is_action(mgmt->frame_control) &&
--+	    mgmt->u.action.category == WLAN_CATEGORY_S1G) {
--+		switch (mgmt->u.action.u.s1g.action_code) {
--+		case WLAN_S1G_TWT_TEARDOWN:
--+		case WLAN_S1G_TWT_SETUP:
--+			ieee80211_s1g_status_twt_action(sdata, skb);
--+			break;
--+		default:
--+			break;
--+		}
--+	}
--+}
--+
-- static void ieee80211_iface_work(struct work_struct *work)
-- {
-- 	struct ieee80211_sub_if_data *sdata =
--@@ -1519,6 +1539,16 @@ static void ieee80211_iface_work(struct
-- 				WARN_ON(1);
-- 				break;
-- 			}
--+		} else if (ieee80211_is_action(mgmt->frame_control) &&
--+			   mgmt->u.action.category == WLAN_CATEGORY_S1G) {
--+			switch (mgmt->u.action.u.s1g.action_code) {
--+			case WLAN_S1G_TWT_TEARDOWN:
--+			case WLAN_S1G_TWT_SETUP:
--+				ieee80211_s1g_rx_twt_action(sdata, skb);
--+				break;
--+			default:
--+				break;
--+			}
-- 		} else if (ieee80211_is_ext(mgmt->frame_control)) {
-- 			if (sdata->vif.type == NL80211_IFTYPE_STATION)
-- 				ieee80211_sta_rx_queued_ext(sdata, skb);
--@@ -1574,6 +1604,12 @@ static void ieee80211_iface_work(struct
-- 		kfree_skb(skb);
-- 	}
-- 
--+	/* process status queue */
--+	while ((skb = skb_dequeue(&sdata->status_queue))) {
--+		ieee80211_iface_process_status(sdata, skb);
--+		kfree_skb(skb);
--+	}
--+
-- 	/* then other type-dependent work */
-- 	switch (sdata->vif.type) {
-- 	case NL80211_IFTYPE_STATION:
--@@ -1637,6 +1673,7 @@ static void ieee80211_setup_sdata(struct
-- 	}
-- 
-- 	skb_queue_head_init(&sdata->skb_queue);
--+	skb_queue_head_init(&sdata->status_queue);
-- 	INIT_WORK(&sdata->work, ieee80211_iface_work);
-- 	INIT_WORK(&sdata->recalc_smps, ieee80211_recalc_smps_work);
-- 	INIT_WORK(&sdata->csa_finalize_work, ieee80211_csa_finalize_work);
----- a/net/mac80211/rx.c
--+++ b/net/mac80211/rx.c
--@@ -3210,6 +3210,68 @@ ieee80211_rx_h_mgmt_check(struct ieee802
-- 	return RX_CONTINUE;
-- }
-- 
--+static bool
--+ieee80211_process_rx_twt_action(struct ieee80211_rx_data *rx)
--+{
--+	struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)rx->skb->data;
--+	struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(rx->skb);
--+	struct ieee80211_sub_if_data *sdata = rx->sdata;
--+	const struct ieee80211_sta_he_cap *hecap;
--+	struct ieee80211_supported_band *sband;
--+
--+	/* TWT actions are only supported in AP for the moment */
--+	if (sdata->vif.type != NL80211_IFTYPE_AP)
--+		return false;
--+
--+	if (!rx->local->ops->add_twt_setup)
--+		return false;
--+
--+	sband = rx->local->hw.wiphy->bands[status->band];
--+	hecap = ieee80211_get_he_iftype_cap(sband,
--+					    ieee80211_vif_type_p2p(&sdata->vif));
--+	if (!hecap)
--+		return false;
--+
--+	if (!(hecap->he_cap_elem.mac_cap_info[0] &
--+	      IEEE80211_HE_MAC_CAP0_TWT_RES))
--+		return false;
--+
--+	if (!rx->sta)
--+		return false;
--+
--+	switch (mgmt->u.action.u.s1g.action_code) {
--+	case WLAN_S1G_TWT_SETUP: {
--+		struct ieee80211_twt_setup *twt;
--+
--+		if (rx->skb->len < IEEE80211_MIN_ACTION_SIZE +
--+				   1 + /* action code */
--+				   sizeof(struct ieee80211_twt_setup) +
--+				   2 /* TWT req_type agrt */)
--+			break;
--+
--+		twt = (void *)mgmt->u.action.u.s1g.variable;
--+		if (twt->element_id != WLAN_EID_S1G_TWT)
--+			break;
--+
--+		if (rx->skb->len < IEEE80211_MIN_ACTION_SIZE +
--+				   4 + /* action code + token + tlv */
--+				   twt->length)
--+			break;
--+
--+		return true; /* queue the frame */
--+	}
--+	case WLAN_S1G_TWT_TEARDOWN:
--+		if (rx->skb->len < IEEE80211_MIN_ACTION_SIZE + 2)
--+			break;
--+
--+		return true; /* queue the frame */
--+	default:
--+		break;
--+	}
--+
--+	return false;
--+}
--+
-- static ieee80211_rx_result debug_noinline
-- ieee80211_rx_h_action(struct ieee80211_rx_data *rx)
-- {
--@@ -3489,6 +3551,17 @@ ieee80211_rx_h_action(struct ieee80211_r
-- 		    !mesh_path_sel_is_hwmp(sdata))
-- 			break;
-- 		goto queue;
--+	case WLAN_CATEGORY_S1G:
--+		switch (mgmt->u.action.u.s1g.action_code) {
--+		case WLAN_S1G_TWT_SETUP:
--+		case WLAN_S1G_TWT_TEARDOWN:
--+			if (ieee80211_process_rx_twt_action(rx))
--+				goto queue;
--+			break;
--+		default:
--+			break;
--+		}
--+		break;
-- 	}
-- 
-- 	return RX_CONTINUE;
----- a/net/mac80211/s1g.c
--+++ b/net/mac80211/s1g.c
--@@ -6,6 +6,7 @@
-- #include <linux/ieee80211.h>
-- #include <net/mac80211.h>
-- #include "ieee80211_i.h"
--+#include "driver-ops.h"
-- 
-- void ieee80211_s1g_sta_rate_init(struct sta_info *sta)
-- {
--@@ -14,3 +15,182 @@ void ieee80211_s1g_sta_rate_init(struct
-- 	sta->rx_stats.last_rate =
-- 			STA_STATS_FIELD(TYPE, STA_STATS_RATE_TYPE_S1G);
-- }
--+
--+bool ieee80211_s1g_is_twt_setup(struct sk_buff *skb)
--+{
--+	struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
--+
--+	if (likely(!ieee80211_is_action(mgmt->frame_control)))
--+		return false;
--+
--+	if (likely(mgmt->u.action.category != WLAN_CATEGORY_S1G))
--+		return false;
--+
--+	return mgmt->u.action.u.s1g.action_code == WLAN_S1G_TWT_SETUP;
--+}
--+
--+static void
--+ieee80211_s1g_send_twt_setup(struct ieee80211_sub_if_data *sdata, const u8 *da,
--+			     const u8 *bssid, struct ieee80211_twt_setup *twt)
--+{
--+	int len = IEEE80211_MIN_ACTION_SIZE + 4 + twt->length;
--+	struct ieee80211_local *local = sdata->local;
--+	struct ieee80211_mgmt *mgmt;
--+	struct sk_buff *skb;
--+
--+	skb = dev_alloc_skb(local->hw.extra_tx_headroom + len);
--+	if (!skb)
--+		return;
--+
--+	skb_reserve(skb, local->hw.extra_tx_headroom);
--+	mgmt = skb_put_zero(skb, len);
--+	mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
--+					  IEEE80211_STYPE_ACTION);
--+	memcpy(mgmt->da, da, ETH_ALEN);
--+	memcpy(mgmt->sa, sdata->vif.addr, ETH_ALEN);
--+	memcpy(mgmt->bssid, bssid, ETH_ALEN);
--+
--+	mgmt->u.action.category = WLAN_CATEGORY_S1G;
--+	mgmt->u.action.u.s1g.action_code = WLAN_S1G_TWT_SETUP;
--+	memcpy(mgmt->u.action.u.s1g.variable, twt, 3 + twt->length);
--+
--+	IEEE80211_SKB_CB(skb)->flags |= IEEE80211_TX_INTFL_DONT_ENCRYPT |
--+					IEEE80211_TX_INTFL_MLME_CONN_TX |
--+					IEEE80211_TX_CTL_REQ_TX_STATUS;
--+	ieee80211_tx_skb(sdata, skb);
--+}
--+
--+static void
--+ieee80211_s1g_send_twt_teardown(struct ieee80211_sub_if_data *sdata,
--+				const u8 *da, const u8 *bssid, u8 flowid)
--+{
--+	struct ieee80211_local *local = sdata->local;
--+	struct ieee80211_mgmt *mgmt;
--+	struct sk_buff *skb;
--+	u8 *id;
--+
--+	skb = dev_alloc_skb(local->hw.extra_tx_headroom +
--+			    IEEE80211_MIN_ACTION_SIZE + 2);
--+	if (!skb)
--+		return;
--+
--+	skb_reserve(skb, local->hw.extra_tx_headroom);
--+	mgmt = skb_put_zero(skb, IEEE80211_MIN_ACTION_SIZE + 2);
--+	mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
--+					  IEEE80211_STYPE_ACTION);
--+	memcpy(mgmt->da, da, ETH_ALEN);
--+	memcpy(mgmt->sa, sdata->vif.addr, ETH_ALEN);
--+	memcpy(mgmt->bssid, bssid, ETH_ALEN);
--+
--+	mgmt->u.action.category = WLAN_CATEGORY_S1G;
--+	mgmt->u.action.u.s1g.action_code = WLAN_S1G_TWT_TEARDOWN;
--+	id = (u8 *)mgmt->u.action.u.s1g.variable;
--+	*id = flowid;
--+
--+	IEEE80211_SKB_CB(skb)->flags |= IEEE80211_TX_INTFL_DONT_ENCRYPT |
--+					IEEE80211_TX_CTL_REQ_TX_STATUS;
--+	ieee80211_tx_skb(sdata, skb);
--+}
--+
--+static void
--+ieee80211_s1g_rx_twt_setup(struct ieee80211_sub_if_data *sdata,
--+			   struct sta_info *sta, struct sk_buff *skb)
--+{
--+	struct ieee80211_mgmt *mgmt = (void *)skb->data;
--+	struct ieee80211_twt_setup *twt = (void *)mgmt->u.action.u.s1g.variable;
--+	struct ieee80211_twt_params *twt_agrt = (void *)twt->params;
--+
--+	twt_agrt->req_type &= cpu_to_le16(~IEEE80211_TWT_REQTYPE_REQUEST);
--+
--+	/* broadcast TWT not supported yet */
--+	if (twt->control & IEEE80211_TWT_CONTROL_NEG_TYPE_BROADCAST) {
--+		le16p_replace_bits(&twt_agrt->req_type,
--+				   TWT_SETUP_CMD_REJECT,
--+				   IEEE80211_TWT_REQTYPE_SETUP_CMD);
--+		goto out;
--+	}
--+
--+	drv_add_twt_setup(sdata->local, sdata, &sta->sta, twt);
--+out:
--+	ieee80211_s1g_send_twt_setup(sdata, mgmt->sa, sdata->vif.addr, twt);
--+}
--+
--+static void
--+ieee80211_s1g_rx_twt_teardown(struct ieee80211_sub_if_data *sdata,
--+			      struct sta_info *sta, struct sk_buff *skb)
--+{
--+	struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
--+
--+	drv_twt_teardown_request(sdata->local, sdata, &sta->sta,
--+				 mgmt->u.action.u.s1g.variable[0]);
--+}
--+
--+static void
--+ieee80211_s1g_tx_twt_setup_fail(struct ieee80211_sub_if_data *sdata,
--+				struct sta_info *sta, struct sk_buff *skb)
--+{
--+	struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
--+	struct ieee80211_twt_setup *twt = (void *)mgmt->u.action.u.s1g.variable;
--+	struct ieee80211_twt_params *twt_agrt = (void *)twt->params;
--+	u8 flowid = le16_get_bits(twt_agrt->req_type,
--+				  IEEE80211_TWT_REQTYPE_FLOWID);
--+
--+	drv_twt_teardown_request(sdata->local, sdata, &sta->sta, flowid);
--+
--+	ieee80211_s1g_send_twt_teardown(sdata, mgmt->sa, sdata->vif.addr,
--+					flowid);
--+}
--+
--+void ieee80211_s1g_rx_twt_action(struct ieee80211_sub_if_data *sdata,
--+				 struct sk_buff *skb)
--+{
--+	struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
--+	struct ieee80211_local *local = sdata->local;
--+	struct sta_info *sta;
--+
--+	mutex_lock(&local->sta_mtx);
--+
--+	sta = sta_info_get_bss(sdata, mgmt->sa);
--+	if (!sta)
--+		goto out;
--+
--+	switch (mgmt->u.action.u.s1g.action_code) {
--+	case WLAN_S1G_TWT_SETUP:
--+		ieee80211_s1g_rx_twt_setup(sdata, sta, skb);
--+		break;
--+	case WLAN_S1G_TWT_TEARDOWN:
--+		ieee80211_s1g_rx_twt_teardown(sdata, sta, skb);
--+		break;
--+	default:
--+		break;
--+	}
--+
--+out:
--+	mutex_unlock(&local->sta_mtx);
--+}
--+
--+void ieee80211_s1g_status_twt_action(struct ieee80211_sub_if_data *sdata,
--+				     struct sk_buff *skb)
--+{
--+	struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
--+	struct ieee80211_local *local = sdata->local;
--+	struct sta_info *sta;
--+
--+	mutex_lock(&local->sta_mtx);
--+
--+	sta = sta_info_get_bss(sdata, mgmt->da);
--+	if (!sta)
--+		goto out;
--+
--+	switch (mgmt->u.action.u.s1g.action_code) {
--+	case WLAN_S1G_TWT_SETUP:
--+		/* process failed twt setup frames */
--+		ieee80211_s1g_tx_twt_setup_fail(sdata, sta, skb);
--+		break;
--+	default:
--+		break;
--+	}
--+
--+out:
--+	mutex_unlock(&local->sta_mtx);
--+}
----- a/net/mac80211/status.c
--+++ b/net/mac80211/status.c
--@@ -705,13 +705,26 @@ static void ieee80211_report_used_skb(st
-- 			/* Check to see if packet is a TDLS teardown packet */
-- 			if (ieee80211_is_data(hdr->frame_control) &&
-- 			    (ieee80211_get_tdls_action(skb, hdr_size) ==
---			     WLAN_TDLS_TEARDOWN))
--+			     WLAN_TDLS_TEARDOWN)) {
-- 				ieee80211_tdls_td_tx_handle(local, sdata, skb,
-- 							    info->flags);
---			else
--+			} else if (ieee80211_s1g_is_twt_setup(skb)) {
--+				if (!acked) {
--+					struct sk_buff *qskb;
--+
--+					qskb = skb_clone(skb, GFP_ATOMIC);
--+					if (qskb) {
--+						skb_queue_tail(&sdata->status_queue,
--+							       qskb);
--+						ieee80211_queue_work(&local->hw,
--+								     &sdata->work);
--+					}
--+				}
--+			} else {
-- 				ieee80211_mgd_conn_tx_status(sdata,
-- 							     hdr->frame_control,
-- 							     acked);
--+			}
-- 		}
-- 
-- 		rcu_read_unlock();
----- a/net/mac80211/trace.h
--+++ b/net/mac80211/trace.h
--@@ -2804,6 +2804,73 @@ DEFINE_EVENT(sta_flag_evt, drv_sta_set_d
-- 	TP_ARGS(local, sdata, sta, enabled)
-- );
-- 
--+TRACE_EVENT(drv_add_twt_setup,
--+	TP_PROTO(struct ieee80211_local *local,
--+		 struct ieee80211_sta *sta,
--+		 struct ieee80211_twt_setup *twt,
--+		 struct ieee80211_twt_params *twt_agrt),
--+
--+	TP_ARGS(local, sta, twt, twt_agrt),
--+
--+	TP_STRUCT__entry(
--+		LOCAL_ENTRY
--+		STA_ENTRY
--+		__field(u8, dialog_token)
--+		__field(u8, control)
--+		__field(__le16, req_type)
--+		__field(__le64, twt)
--+		__field(u8, duration)
--+		__field(__le16, mantissa)
--+		__field(u8, channel)
--+	),
--+
--+	TP_fast_assign(
--+		LOCAL_ASSIGN;
--+		STA_ASSIGN;
--+		__entry->dialog_token = twt->dialog_token;
--+		__entry->control = twt->control;
--+		__entry->req_type = twt_agrt->req_type;
--+		__entry->twt = twt_agrt->twt;
--+		__entry->duration = twt_agrt->min_twt_dur;
--+		__entry->mantissa = twt_agrt->mantissa;
--+		__entry->channel = twt_agrt->channel;
--+	),
--+
--+	TP_printk(
--+		LOCAL_PR_FMT STA_PR_FMT
--+		" token:%d control:0x%02x req_type:0x%04x"
--+		" twt:%llu duration:%d mantissa:%d channel:%d",
--+		LOCAL_PR_ARG, STA_PR_ARG, __entry->dialog_token,
--+		__entry->control, le16_to_cpu(__entry->req_type),
--+		le64_to_cpu(__entry->twt), __entry->duration,
--+		le16_to_cpu(__entry->mantissa), __entry->channel
--+	)
--+);
--+
--+TRACE_EVENT(drv_twt_teardown_request,
--+	TP_PROTO(struct ieee80211_local *local,
--+		 struct ieee80211_sta *sta, u8 flowid),
--+
--+	TP_ARGS(local, sta, flowid),
--+
--+	TP_STRUCT__entry(
--+		LOCAL_ENTRY
--+		STA_ENTRY
--+		__field(u8, flowid)
--+	),
--+
--+	TP_fast_assign(
--+		LOCAL_ASSIGN;
--+		STA_ASSIGN;
--+		__entry->flowid = flowid;
--+	),
--+
--+	TP_printk(
--+		LOCAL_PR_FMT STA_PR_FMT " flowid:%d",
--+		LOCAL_PR_ARG, STA_PR_ARG, __entry->flowid
--+	)
--+);
--+
-- #endif /* !__MAC80211_DRIVER_TRACE || TRACE_HEADER_MULTI_READ */
-- 
-- #undef TRACE_INCLUDE_PATH
-diff --git a/package/kernel/mac80211/patches/subsys/391-wireless-align-some-HE-capabilities-with-the-spec.patch b/package/kernel/mac80211/patches/subsys/391-wireless-align-some-HE-capabilities-with-the-spec.patch
-deleted file mode 100644
-index eb32c49890..0000000000
---- a/package/kernel/mac80211/patches/subsys/391-wireless-align-some-HE-capabilities-with-the-spec.patch
-+++ /dev/null
-@@ -1,196 +0,0 @@
--From: Johannes Berg <johannes.berg@intel.com>
--Date: Fri, 9 Apr 2021 12:40:17 +0300
--Subject: [PATCH] wireless: align some HE capabilities with the spec
--
--Some names were changed, align that with the spec as of
--802.11ax-D6.1.
--
--Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
--Link: https://lore.kernel.org/r/iwlwifi.20210409123755.b1e5fbab0d8c.I3eb6076cb0714ec6aec6b8f9dee613ce4a05d825@changeid
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/drivers/net/wireless/ath/ath11k/mac.c
--+++ b/drivers/net/wireless/ath/ath11k/mac.c
--@@ -3627,7 +3627,7 @@ ath11k_mac_filter_he_cap_mesh(struct iee
-- 	    IEEE80211_HE_MAC_CAP4_BQR;
-- 	he_cap_elem->mac_cap_info[4] &= ~m;
-- 
---	m = IEEE80211_HE_MAC_CAP5_SUBCHAN_SELECVITE_TRANSMISSION |
--+	m = IEEE80211_HE_MAC_CAP5_SUBCHAN_SELECTIVE_TRANSMISSION |
-- 	    IEEE80211_HE_MAC_CAP5_UL_2x996_TONE_RU |
-- 	    IEEE80211_HE_MAC_CAP5_PUNCTURED_SOUNDING |
-- 	    IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX;
--@@ -3637,7 +3637,7 @@ ath11k_mac_filter_he_cap_mesh(struct iee
-- 	    IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO;
-- 	he_cap_elem->phy_cap_info[2] &= ~m;
-- 
---	m = IEEE80211_HE_PHY_CAP3_RX_HE_MU_PPDU_FROM_NON_AP_STA |
--+	m = IEEE80211_HE_PHY_CAP3_RX_PARTIAL_BW_SU_IN_20MHZ_MU |
-- 	    IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_MASK |
-- 	    IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_MASK;
-- 	he_cap_elem->phy_cap_info[3] &= ~m;
--@@ -3649,13 +3649,13 @@ ath11k_mac_filter_he_cap_mesh(struct iee
-- 	he_cap_elem->phy_cap_info[5] &= ~m;
-- 
-- 	m = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU |
---	    IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMER_FB |
--+	    IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB |
-- 	    IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB |
-- 	    IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO;
-- 	he_cap_elem->phy_cap_info[6] &= ~m;
-- 
---	m = IEEE80211_HE_PHY_CAP7_SRP_BASED_SR |
---	    IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_AR |
--+	m = IEEE80211_HE_PHY_CAP7_PSR_BASED_SR |
--+	    IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
-- 	    IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ |
-- 	    IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ;
-- 	he_cap_elem->phy_cap_info[7] &= ~m;
----- a/drivers/net/wireless/mediatek/mt76/mt7915/init.c
--+++ b/drivers/net/wireless/mediatek/mt76/mt7915/init.c
--@@ -307,8 +307,8 @@ mt7915_set_stream_he_txbf_caps(struct ie
-- 	    IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK;
-- 	elem->phy_cap_info[5] &= ~c;
-- 
---	c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMER_FB |
---	    IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMER_FB;
--+	c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
--+	    IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
-- 	elem->phy_cap_info[6] &= ~c;
-- 
-- 	elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK;
--@@ -348,8 +348,8 @@ mt7915_set_stream_he_txbf_caps(struct ie
-- 	c = (nss - 1) | (max_t(int, mcs->tx_mcs_160, 1) << 3);
-- 	elem->phy_cap_info[5] |= c;
-- 
---	c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMER_FB |
---	    IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMER_FB;
--+	c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
--+	    IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
-- 	elem->phy_cap_info[6] |= c;
-- }
-- 
--@@ -484,7 +484,7 @@ mt7915_init_he_caps(struct mt7915_phy *p
-- 				IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
-- 				IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
-- 			he_cap_elem->phy_cap_info[7] |=
---				IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_AR |
--+				IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
-- 				IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI;
-- 			he_cap_elem->phy_cap_info[8] |=
-- 				IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G |
----- a/include/linux/ieee80211.h
--+++ b/include/linux/ieee80211.h
--@@ -2065,7 +2065,7 @@ int ieee80211_get_vht_max_nss(struct iee
-- #define IEEE80211_HE_MAC_CAP4_BSRP_BQRP_A_MPDU_AGG		0x01
-- #define IEEE80211_HE_MAC_CAP4_QTP				0x02
-- #define IEEE80211_HE_MAC_CAP4_BQR				0x04
---#define IEEE80211_HE_MAC_CAP4_SRP_RESP				0x08
--+#define IEEE80211_HE_MAC_CAP4_PSR_RESP				0x08
-- #define IEEE80211_HE_MAC_CAP4_NDP_FB_REP			0x10
-- #define IEEE80211_HE_MAC_CAP4_OPS				0x20
-- #define IEEE80211_HE_MAC_CAP4_AMDSU_IN_AMPDU			0x40
--@@ -2076,7 +2076,7 @@ int ieee80211_get_vht_max_nss(struct iee
-- 
-- #define IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B40		0x01
-- #define IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B41		0x02
---#define IEEE80211_HE_MAC_CAP5_SUBCHAN_SELECVITE_TRANSMISSION	0x04
--+#define IEEE80211_HE_MAC_CAP5_SUBCHAN_SELECTIVE_TRANSMISSION	0x04
-- #define IEEE80211_HE_MAC_CAP5_UL_2x996_TONE_RU			0x08
-- #define IEEE80211_HE_MAC_CAP5_OM_CTRL_UL_MU_DATA_DIS_RX		0x10
-- #define IEEE80211_HE_MAC_CAP5_HE_DYNAMIC_SM_PS			0x20
--@@ -2134,7 +2134,7 @@ int ieee80211_get_vht_max_nss(struct iee
-- #define IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_MASK			0x18
-- #define IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1				0x00
-- #define IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_2				0x20
---#define IEEE80211_HE_PHY_CAP3_RX_HE_MU_PPDU_FROM_NON_AP_STA		0x40
--+#define IEEE80211_HE_PHY_CAP3_RX_PARTIAL_BW_SU_IN_20MHZ_MU		0x40
-- #define IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER				0x80
-- 
-- #define IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE				0x01
--@@ -2181,15 +2181,15 @@ int ieee80211_get_vht_max_nss(struct iee
-- 
-- #define IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU			0x01
-- #define IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU			0x02
---#define IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMER_FB			0x04
---#define IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMER_FB			0x08
--+#define IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB			0x04
--+#define IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB		0x08
-- #define IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB				0x10
-- #define IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE			0x20
-- #define IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO		0x40
-- #define IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT			0x80
-- 
---#define IEEE80211_HE_PHY_CAP7_SRP_BASED_SR				0x01
---#define IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_AR			0x02
--+#define IEEE80211_HE_PHY_CAP7_PSR_BASED_SR				0x01
--+#define IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP			0x02
-- #define IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI		0x04
-- #define IEEE80211_HE_PHY_CAP7_MAX_NC_1					0x08
-- #define IEEE80211_HE_PHY_CAP7_MAX_NC_2					0x10
----- a/net/mac80211/debugfs_sta.c
--+++ b/net/mac80211/debugfs_sta.c
--@@ -732,15 +732,15 @@ static ssize_t sta_he_capa_read(struct f
-- 	PFLAG(MAC, 4, BSRP_BQRP_A_MPDU_AGG, "BSRP-BQRP-A-MPDU-AGG");
-- 	PFLAG(MAC, 4, QTP, "QTP");
-- 	PFLAG(MAC, 4, BQR, "BQR");
---	PFLAG(MAC, 4, SRP_RESP, "SRP-RESP");
--+	PFLAG(MAC, 4, PSR_RESP, "PSR-RESP");
-- 	PFLAG(MAC, 4, NDP_FB_REP, "NDP-FB-REP");
-- 	PFLAG(MAC, 4, OPS, "OPS");
-- 	PFLAG(MAC, 4, AMDSU_IN_AMPDU, "AMSDU-IN-AMPDU");
-- 
-- 	PRINT("MULTI-TID-AGG-TX-QOS-%d", ((cap[5] << 1) | (cap[4] >> 7)) & 0x7);
-- 
---	PFLAG(MAC, 5, SUBCHAN_SELECVITE_TRANSMISSION,
---	      "SUBCHAN-SELECVITE-TRANSMISSION");
--+	PFLAG(MAC, 5, SUBCHAN_SELECTIVE_TRANSMISSION,
--+	      "SUBCHAN-SELECTIVE-TRANSMISSION");
-- 	PFLAG(MAC, 5, UL_2x996_TONE_RU, "UL-2x996-TONE-RU");
-- 	PFLAG(MAC, 5, OM_CTRL_UL_MU_DATA_DIS_RX, "OM-CTRL-UL-MU-DATA-DIS-RX");
-- 	PFLAG(MAC, 5, HE_DYNAMIC_SM_PS, "HE-DYNAMIC-SM-PS");
--@@ -832,8 +832,8 @@ static ssize_t sta_he_capa_read(struct f
-- 
-- 	PFLAG(PHY, 3, DCM_MAX_RX_NSS_1, "DCM-MAX-RX-NSS-1");
-- 	PFLAG(PHY, 3, DCM_MAX_RX_NSS_2, "DCM-MAX-RX-NSS-2");
---	PFLAG(PHY, 3, RX_HE_MU_PPDU_FROM_NON_AP_STA,
---	      "RX-HE-MU-PPDU-FROM-NON-AP-STA");
--+	PFLAG(PHY, 3, RX_PARTIAL_BW_SU_IN_20MHZ_MU,
--+	      "RX-PARTIAL-BW-SU-IN-20MHZ-MU");
-- 	PFLAG(PHY, 3, SU_BEAMFORMER, "SU-BEAMFORMER");
-- 
-- 	PFLAG(PHY, 4, SU_BEAMFORMEE, "SU-BEAMFORMEE");
--@@ -853,16 +853,17 @@ static ssize_t sta_he_capa_read(struct f
-- 
-- 	PFLAG(PHY, 6, CODEBOOK_SIZE_42_SU, "CODEBOOK-SIZE-42-SU");
-- 	PFLAG(PHY, 6, CODEBOOK_SIZE_75_MU, "CODEBOOK-SIZE-75-MU");
---	PFLAG(PHY, 6, TRIG_SU_BEAMFORMER_FB, "TRIG-SU-BEAMFORMER-FB");
---	PFLAG(PHY, 6, TRIG_MU_BEAMFORMER_FB, "TRIG-MU-BEAMFORMER-FB");
--+	PFLAG(PHY, 6, TRIG_SU_BEAMFORMING_FB, "TRIG-SU-BEAMFORMING-FB");
--+	PFLAG(PHY, 6, TRIG_MU_BEAMFORMING_PARTIAL_BW_FB,
--+	      "MU-BEAMFORMING-PARTIAL-BW-FB");
-- 	PFLAG(PHY, 6, TRIG_CQI_FB, "TRIG-CQI-FB");
-- 	PFLAG(PHY, 6, PARTIAL_BW_EXT_RANGE, "PARTIAL-BW-EXT-RANGE");
-- 	PFLAG(PHY, 6, PARTIAL_BANDWIDTH_DL_MUMIMO,
-- 	      "PARTIAL-BANDWIDTH-DL-MUMIMO");
-- 	PFLAG(PHY, 6, PPE_THRESHOLD_PRESENT, "PPE-THRESHOLD-PRESENT");
-- 
---	PFLAG(PHY, 7, SRP_BASED_SR, "SRP-BASED-SR");
---	PFLAG(PHY, 7, POWER_BOOST_FACTOR_AR, "POWER-BOOST-FACTOR-AR");
--+	PFLAG(PHY, 7, PSR_BASED_SR, "PSR-BASED-SR");
--+	PFLAG(PHY, 7, POWER_BOOST_FACTOR_SUPP, "POWER-BOOST-FACTOR-SUPP");
-- 	PFLAG(PHY, 7, HE_SU_MU_PPDU_4XLTF_AND_08_US_GI,
-- 	      "HE-SU-MU-PPDU-4XLTF-AND-08-US-GI");
-- 	PFLAG_RANGE(PHY, 7, MAX_NC, 0, 1, 1, "MAX-NC-%d");
----- a/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c
--+++ b/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c
--@@ -631,7 +631,7 @@ static struct ieee80211_sband_iftype_dat
-- 				.phy_cap_info[6] =
-- 					IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT,
-- 				.phy_cap_info[7] =
---					IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_AR |
--+					IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
-- 					IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI |
-- 					IEEE80211_HE_PHY_CAP7_MAX_NC_1,
-- 				.phy_cap_info[8] =
-diff --git a/package/kernel/mac80211/patches/subsys/392-wireless-fix-spelling-of-A-MSDU-in-HE-capabilities.patch b/package/kernel/mac80211/patches/subsys/392-wireless-fix-spelling-of-A-MSDU-in-HE-capabilities.patch
-deleted file mode 100644
-index 0bd01126f7..0000000000
---- a/package/kernel/mac80211/patches/subsys/392-wireless-fix-spelling-of-A-MSDU-in-HE-capabilities.patch
-+++ /dev/null
-@@ -1,113 +0,0 @@
--From: Johannes Berg <johannes.berg@intel.com>
--Date: Fri, 9 Apr 2021 12:40:24 +0300
--Subject: [PATCH] wireless: fix spelling of A-MSDU in HE capabilities
--
--In the HE capabilities, spell A-MSDU correctly, not "A-MDSU".
--
--Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
--Link: https://lore.kernel.org/r/iwlwifi.20210409123755.9e6ff1af1181.If6868bc6902ccd9a95c74c78f716c4b41473ef14@changeid
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c
--+++ b/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c
--@@ -598,7 +598,7 @@ static struct ieee80211_sband_iftype_dat
-- 					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
-- 					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,
-- 				.mac_cap_info[4] =
---					IEEE80211_HE_MAC_CAP4_AMDSU_IN_AMPDU |
--+					IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU |
-- 					IEEE80211_HE_MAC_CAP4_MULTI_TID_AGG_TX_QOS_B39,
-- 				.mac_cap_info[5] =
-- 					IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B40 |
--@@ -682,7 +682,7 @@ static struct ieee80211_sband_iftype_dat
-- 					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
-- 					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,
-- 				.mac_cap_info[4] =
---					IEEE80211_HE_MAC_CAP4_AMDSU_IN_AMPDU,
--+					IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU,
-- 				.mac_cap_info[5] =
-- 					IEEE80211_HE_MAC_CAP5_UL_2x996_TONE_RU,
-- 				.phy_cap_info[0] =
----- a/drivers/net/wireless/mediatek/mt76/mt7915/init.c
--+++ b/drivers/net/wireless/mediatek/mt76/mt7915/init.c
--@@ -427,7 +427,7 @@ mt7915_init_he_caps(struct mt7915_phy *p
-- 			IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
-- 			IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_RESERVED;
-- 		he_cap_elem->mac_cap_info[4] =
---			IEEE80211_HE_MAC_CAP4_AMDSU_IN_AMPDU;
--+			IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU;
-- 
-- 		if (band == NL80211_BAND_2GHZ)
-- 			he_cap_elem->phy_cap_info[0] =
----- a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c
--+++ b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c
--@@ -1353,7 +1353,7 @@ mt7915_mcu_sta_he_tlv(struct sk_buff *sk
-- 	if (elem->mac_cap_info[3] & IEEE80211_HE_MAC_CAP3_OMI_CONTROL)
-- 		cap |= STA_REC_HE_CAP_OM;
-- 
---	if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_AMDSU_IN_AMPDU)
--+	if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU)
-- 		cap |= STA_REC_HE_CAP_AMSDU_IN_AMPDU;
-- 
-- 	if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_BQR)
----- a/include/linux/ieee80211.h
--+++ b/include/linux/ieee80211.h
--@@ -2068,7 +2068,7 @@ int ieee80211_get_vht_max_nss(struct iee
-- #define IEEE80211_HE_MAC_CAP4_PSR_RESP				0x08
-- #define IEEE80211_HE_MAC_CAP4_NDP_FB_REP			0x10
-- #define IEEE80211_HE_MAC_CAP4_OPS				0x20
---#define IEEE80211_HE_MAC_CAP4_AMDSU_IN_AMPDU			0x40
--+#define IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU			0x40
-- /* Multi TID agg TX is split between byte #4 and #5
--  * The value is a combination of B39,B40,B41
--  */
----- a/net/mac80211/debugfs_sta.c
--+++ b/net/mac80211/debugfs_sta.c
--@@ -735,7 +735,7 @@ static ssize_t sta_he_capa_read(struct f
-- 	PFLAG(MAC, 4, PSR_RESP, "PSR-RESP");
-- 	PFLAG(MAC, 4, NDP_FB_REP, "NDP-FB-REP");
-- 	PFLAG(MAC, 4, OPS, "OPS");
---	PFLAG(MAC, 4, AMDSU_IN_AMPDU, "AMSDU-IN-AMPDU");
--+	PFLAG(MAC, 4, AMSDU_IN_AMPDU, "AMSDU-IN-AMPDU");
-- 
-- 	PRINT("MULTI-TID-AGG-TX-QOS-%d", ((cap[5] << 1) | (cap[4] >> 7)) & 0x7);
-- 
----- a/drivers/net/wireless/mac80211_hwsim.c
--+++ b/drivers/net/wireless/mac80211_hwsim.c
--@@ -2748,7 +2748,7 @@ static const struct ieee80211_sband_ifty
-- 				.mac_cap_info[3] =
-- 					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
-- 					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,
---				.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMDSU_IN_AMPDU,
--+				.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU,
-- 				.phy_cap_info[1] =
-- 					IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK |
-- 					IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
--@@ -2792,7 +2792,7 @@ static const struct ieee80211_sband_ifty
-- 				.mac_cap_info[3] =
-- 					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
-- 					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,
---				.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMDSU_IN_AMPDU,
--+				.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU,
-- 				.phy_cap_info[1] =
-- 					IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK |
-- 					IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
--@@ -2838,7 +2838,7 @@ static const struct ieee80211_sband_ifty
-- 				.mac_cap_info[3] =
-- 					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
-- 					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,
---				.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMDSU_IN_AMPDU,
--+				.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU,
-- 				.phy_cap_info[0] =
-- 					IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
-- 					IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G |
--@@ -2886,7 +2886,7 @@ static const struct ieee80211_sband_ifty
-- 				.mac_cap_info[3] =
-- 					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
-- 					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,
---				.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMDSU_IN_AMPDU,
--+				.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU,
-- 				.phy_cap_info[0] =
-- 					IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
-- 					IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G |
-diff --git a/package/kernel/mac80211/patches/subsys/393-wireless-align-HE-capabilities-A-MPDU-Length-Exponen.patch b/package/kernel/mac80211/patches/subsys/393-wireless-align-HE-capabilities-A-MPDU-Length-Exponen.patch
-deleted file mode 100644
-index 42b71df9d1..0000000000
---- a/package/kernel/mac80211/patches/subsys/393-wireless-align-HE-capabilities-A-MPDU-Length-Exponen.patch
-+++ /dev/null
-@@ -1,148 +0,0 @@
--From: Johannes Berg <johannes.berg@intel.com>
--Date: Fri, 9 Apr 2021 12:40:20 +0300
--Subject: [PATCH] wireless: align HE capabilities A-MPDU Length Exponent
-- Extension
--
--The A-MPDU length exponent extension is defined differently in
--802.11ax D6.1, align with that.
--
--Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
--Link: https://lore.kernel.org/r/iwlwifi.20210409123755.c2a257d3e2df.I3455245d388c52c61dace7e7958dbed7e807cfb6@changeid
--Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-----
--
----- a/drivers/net/wireless/ath/ath11k/mac.c
--+++ b/drivers/net/wireless/ath/ath11k/mac.c
--@@ -1290,9 +1290,8 @@ static void ath11k_peer_assoc_h_he(struc
-- 	 * request, then use MAX_AMPDU_LEN_FACTOR as 16 to calculate max_ampdu
-- 	 * length.
-- 	 */
---	ampdu_factor = (he_cap->he_cap_elem.mac_cap_info[3] &
---			IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_MASK) >>
---			IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_SHIFT;
--+	ampdu_factor = u8_get_bits(he_cap->he_cap_elem.mac_cap_info[3],
--+				   IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_MASK);
-- 
-- 	if (ampdu_factor) {
-- 		if (sta->vht_cap.vht_supported)
----- a/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c
--+++ b/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c
--@@ -596,7 +596,7 @@ static struct ieee80211_sband_iftype_dat
-- 					IEEE80211_HE_MAC_CAP2_32BIT_BA_BITMAP,
-- 				.mac_cap_info[3] =
-- 					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
---					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,
--+					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2,
-- 				.mac_cap_info[4] =
-- 					IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU |
-- 					IEEE80211_HE_MAC_CAP4_MULTI_TID_AGG_TX_QOS_B39,
--@@ -680,7 +680,7 @@ static struct ieee80211_sband_iftype_dat
-- 					IEEE80211_HE_MAC_CAP2_BSR,
-- 				.mac_cap_info[3] =
-- 					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
---					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,
--+					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2,
-- 				.mac_cap_info[4] =
-- 					IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU,
-- 				.mac_cap_info[5] =
----- a/drivers/net/wireless/mac80211_hwsim.c
--+++ b/drivers/net/wireless/mac80211_hwsim.c
--@@ -2747,7 +2747,7 @@ static const struct ieee80211_sband_ifty
-- 					IEEE80211_HE_MAC_CAP2_ACK_EN,
-- 				.mac_cap_info[3] =
-- 					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
---					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,
--+					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3,
-- 				.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU,
-- 				.phy_cap_info[1] =
-- 					IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK |
--@@ -2791,7 +2791,7 @@ static const struct ieee80211_sband_ifty
-- 					IEEE80211_HE_MAC_CAP2_ACK_EN,
-- 				.mac_cap_info[3] =
-- 					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
---					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,
--+					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3,
-- 				.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU,
-- 				.phy_cap_info[1] =
-- 					IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK |
--@@ -2837,7 +2837,7 @@ static const struct ieee80211_sband_ifty
-- 					IEEE80211_HE_MAC_CAP2_ACK_EN,
-- 				.mac_cap_info[3] =
-- 					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
---					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,
--+					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3,
-- 				.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU,
-- 				.phy_cap_info[0] =
-- 					IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
--@@ -2885,7 +2885,7 @@ static const struct ieee80211_sband_ifty
-- 					IEEE80211_HE_MAC_CAP2_ACK_EN,
-- 				.mac_cap_info[3] =
-- 					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
---					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,
--+					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3,
-- 				.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU,
-- 				.phy_cap_info[0] =
-- 					IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
----- a/drivers/net/wireless/mediatek/mt76/mt7915/init.c
--+++ b/drivers/net/wireless/mediatek/mt76/mt7915/init.c
--@@ -425,7 +425,7 @@ mt7915_init_he_caps(struct mt7915_phy *p
-- 			IEEE80211_HE_MAC_CAP0_HTC_HE;
-- 		he_cap_elem->mac_cap_info[3] =
-- 			IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
---			IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_RESERVED;
--+			IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3;
-- 		he_cap_elem->mac_cap_info[4] =
-- 			IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU;
-- 
----- a/include/linux/ieee80211.h
--+++ b/include/linux/ieee80211.h
--@@ -2051,17 +2051,15 @@ int ieee80211_get_vht_max_nss(struct iee
--  * A-MDPU Length Exponent field in the HT capabilities, VHT capabilities and the
--  * same field in the HE capabilities.
--  */
---#define IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_USE_VHT	0x00
---#define IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_1		0x08
---#define IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2		0x10
---#define IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_RESERVED	0x18
--+#define IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_0		0x00
--+#define IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_1		0x08
--+#define IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2		0x10
--+#define IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3		0x18
-- #define IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_MASK		0x18
-- #define IEEE80211_HE_MAC_CAP3_AMSDU_FRAG			0x20
-- #define IEEE80211_HE_MAC_CAP3_FLEX_TWT_SCHED			0x40
-- #define IEEE80211_HE_MAC_CAP3_RX_CTRL_FRAME_TO_MULTIBSS		0x80
-- 
---#define IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_SHIFT		3
---
-- #define IEEE80211_HE_MAC_CAP4_BSRP_BQRP_A_MPDU_AGG		0x01
-- #define IEEE80211_HE_MAC_CAP4_QTP				0x02
-- #define IEEE80211_HE_MAC_CAP4_BQR				0x04
----- a/net/mac80211/debugfs_sta.c
--+++ b/net/mac80211/debugfs_sta.c
--@@ -711,17 +711,17 @@ static ssize_t sta_he_capa_read(struct f
-- 	PFLAG(MAC, 3, OFDMA_RA, "OFDMA-RA");
-- 
-- 	switch (cap[3] & IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_MASK) {
---	case IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_USE_VHT:
---		PRINT("MAX-AMPDU-LEN-EXP-USE-VHT");
--+	case IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_0:
--+		PRINT("MAX-AMPDU-LEN-EXP-USE-EXT-0");
-- 		break;
---	case IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_1:
---		PRINT("MAX-AMPDU-LEN-EXP-VHT-1");
--+	case IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_1:
--+		PRINT("MAX-AMPDU-LEN-EXP-VHT-EXT-1");
-- 		break;
---	case IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2:
---		PRINT("MAX-AMPDU-LEN-EXP-VHT-2");
--+	case IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2:
--+		PRINT("MAX-AMPDU-LEN-EXP-VHT-EXT-2");
-- 		break;
---	case IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_RESERVED:
---		PRINT("MAX-AMPDU-LEN-EXP-RESERVED");
--+	case IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3:
--+		PRINT("MAX-AMPDU-LEN-EXP-VHT-EXT-3");
-- 		break;
-- 	}
-- 
-diff --git a/package/kernel/mac80211/patches/subsys/400-allow-ibss-mixed.patch b/package/kernel/mac80211/patches/subsys/400-allow-ibss-mixed.patch
-index f9c4caa51c..3df4062ec5 100644
---- a/package/kernel/mac80211/patches/subsys/400-allow-ibss-mixed.patch
-+++ b/package/kernel/mac80211/patches/subsys/400-allow-ibss-mixed.patch
-@@ -5,7 +5,7 @@ and we should ignore this.
- 
- --- a/net/wireless/core.c
- +++ b/net/wireless/core.c
--@@ -614,21 +614,6 @@ static int wiphy_verify_combinations(str
-+@@ -630,21 +630,6 @@ static int wiphy_verify_combinations(str
-  				    c->limits[j].max > 1))
-  				return -EINVAL;
-  
-diff --git a/package/kernel/mac80211/patches/subsys/500-mac80211_configure_antenna_gain.patch b/package/kernel/mac80211/patches/subsys/500-mac80211_configure_antenna_gain.patch
-index 6f13f64208..e0a259cde5 100644
---- a/package/kernel/mac80211/patches/subsys/500-mac80211_configure_antenna_gain.patch
-+++ b/package/kernel/mac80211/patches/subsys/500-mac80211_configure_antenna_gain.patch
-@@ -1,24 +1,24 @@
- --- a/include/net/cfg80211.h
- +++ b/include/net/cfg80211.h
--@@ -3814,6 +3814,7 @@ struct mgmt_frame_regs {
-+@@ -3835,6 +3835,7 @@ struct mgmt_frame_regs {
-   *	(as advertised by the nl80211 feature flag.)
-   * @get_tx_power: store the current TX power into the dbm variable;
-   *	return 0 if successful
- + * @set_antenna_gain: set antenna gain to reduce maximum tx power if necessary
-   *
--  * @set_wds_peer: set the WDS peer for a WDS interface
--  *
--@@ -4138,6 +4139,7 @@ struct cfg80211_ops {
-+  * @rfkill_poll: polls the hw rfkill line, use cfg80211 reporting
-+  *	functions to adjust rfkill hw state
-+@@ -4159,6 +4160,7 @@ struct cfg80211_ops {
-  				enum nl80211_tx_power_setting type, int mbm);
-  	int	(*get_tx_power)(struct wiphy *wiphy, struct wireless_dev *wdev,
-  				int *dbm);
- +	int	(*set_antenna_gain)(struct wiphy *wiphy, int dbi);
-  
-- 	int	(*set_wds_peer)(struct wiphy *wiphy, struct net_device *dev,
-- 				const u8 *addr);
-+ 	void	(*rfkill_poll)(struct wiphy *wiphy);
-+ 
- --- a/include/net/mac80211.h
- +++ b/include/net/mac80211.h
--@@ -1561,6 +1561,7 @@ enum ieee80211_smps_mode {
-+@@ -1566,6 +1566,7 @@ enum ieee80211_smps_mode {
-   *
-   * @power_level: requested transmit power (in dBm), backward compatibility
-   *	value only that is set to the minimum of all interfaces
-@@ -26,7 +26,7 @@
-   *
-   * @chandef: the channel definition to tune to
-   * @radar_enabled: whether radar detection is enabled
--@@ -1581,6 +1582,7 @@ enum ieee80211_smps_mode {
-+@@ -1586,6 +1587,7 @@ enum ieee80211_smps_mode {
-  struct ieee80211_conf {
-  	u32 flags;
-  	int power_level, dynamic_ps_timeout;
-@@ -57,7 +57,7 @@
-  	__NL80211_ATTR_AFTER_LAST,
- --- a/net/mac80211/cfg.c
- +++ b/net/mac80211/cfg.c
--@@ -2769,6 +2769,19 @@ static int ieee80211_get_tx_power(struct
-+@@ -2764,6 +2764,19 @@ static int ieee80211_get_tx_power(struct
-  	return 0;
-  }
-  
-@@ -74,20 +74,20 @@
- +	return 0;
- +}
- +
-- static int ieee80211_set_wds_peer(struct wiphy *wiphy, struct net_device *dev,
-- 				  const u8 *addr)
-+ static void ieee80211_rfkill_poll(struct wiphy *wiphy)
-  {
--@@ -4413,6 +4426,7 @@ const struct cfg80211_ops mac80211_confi
-+ 	struct ieee80211_local *local = wiphy_priv(wiphy);
-+@@ -4399,6 +4412,7 @@ const struct cfg80211_ops mac80211_confi
-  	.set_wiphy_params = ieee80211_set_wiphy_params,
-  	.set_tx_power = ieee80211_set_tx_power,
-  	.get_tx_power = ieee80211_get_tx_power,
- +	.set_antenna_gain = ieee80211_set_antenna_gain,
-- 	.set_wds_peer = ieee80211_set_wds_peer,
-  	.rfkill_poll = ieee80211_rfkill_poll,
-  	CFG80211_TESTMODE_CMD(ieee80211_testmode_cmd)
-+ 	CFG80211_TESTMODE_DUMP(ieee80211_testmode_dump)
- --- a/net/mac80211/ieee80211_i.h
- +++ b/net/mac80211/ieee80211_i.h
--@@ -1435,6 +1435,7 @@ struct ieee80211_local {
-+@@ -1429,6 +1429,7 @@ struct ieee80211_local {
-  	int dynamic_ps_forced_timeout;
-  
-  	int user_power_level; /* in dBm, for all interfaces */
-@@ -119,7 +119,7 @@
-  	if (local->hw.conf.power_level != power) {
-  		changed |= IEEE80211_CONF_CHANGE_POWER;
-  		local->hw.conf.power_level = power;
--@@ -665,6 +671,7 @@ struct ieee80211_hw *ieee80211_alloc_hw_
-+@@ -679,6 +685,7 @@ struct ieee80211_hw *ieee80211_alloc_hw_
-  					 IEEE80211_RADIOTAP_MCS_HAVE_BW;
-  	local->hw.radiotap_vht_details = IEEE80211_RADIOTAP_VHT_KNOWN_GI |
-  					 IEEE80211_RADIOTAP_VHT_KNOWN_BANDWIDTH;
-@@ -129,7 +129,7 @@
-  	local->hw.max_mtu = IEEE80211_MAX_DATA_LEN;
- --- a/net/wireless/nl80211.c
- +++ b/net/wireless/nl80211.c
--@@ -757,6 +757,7 @@ static const struct nla_policy nl80211_p
-+@@ -780,6 +780,7 @@ static const struct nla_policy nl80211_p
-  	[NL80211_ATTR_COLOR_CHANGE_COUNT] = { .type = NLA_U8 },
-  	[NL80211_ATTR_COLOR_CHANGE_COLOR] = { .type = NLA_U8 },
-  	[NL80211_ATTR_COLOR_CHANGE_ELEMS] = NLA_POLICY_NESTED(nl80211_policy),
-@@ -137,24 +137,26 @@
-  };
-  
-  /* policy for the key attributes */
--@@ -3322,6 +3323,20 @@ static int nl80211_set_wiphy(struct sk_b
-+@@ -3328,6 +3329,22 @@ static int nl80211_set_wiphy(struct sk_b
-  		if (result)
-- 			return result;
-+ 			goto out;
-  	}
- +
- +	if (info->attrs[NL80211_ATTR_WIPHY_ANTENNA_GAIN]) {
- +		int idx, dbi = 0;
- +
--+		if (!rdev->ops->set_antenna_gain)
--+			return -EOPNOTSUPP;
-++		if (!rdev->ops->set_antenna_gain) {
-++			result = -EOPNOTSUPP;
-++			goto out;
-++		}
- +
- +		idx = NL80211_ATTR_WIPHY_ANTENNA_GAIN;
- +		dbi = nla_get_u32(info->attrs[idx]);
- +
- +		result = rdev->ops->set_antenna_gain(&rdev->wiphy, dbi);
- +		if (result)
--+			return result;
-++			goto out;
- +	}
-  
-- 	if (info->attrs[NL80211_ATTR_WIPHY_ANTENNA_TX] &&
-- 	    info->attrs[NL80211_ATTR_WIPHY_ANTENNA_RX]) {
-+ 	if (info->attrs[NL80211_ATTR_WIPHY_TX_POWER_SETTING]) {
-+ 		struct wireless_dev *txp_wdev = wdev;
-diff --git a/package/kernel/mac80211/patches/subsys/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch b/package/kernel/mac80211/patches/subsys/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch
-new file mode 100644
-index 0000000000..26af6a2fb9
---- /dev/null
-+++ b/package/kernel/mac80211/patches/subsys/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch
-@@ -0,0 +1,29 @@
-+--- a/backport-include/linux/of_net.h
-++++ /dev/null
-+@@ -1,26 +0,0 @@
-+-#ifndef _BP_OF_NET_H
-+-#define _BP_OF_NET_H
-+-#include_next <linux/of_net.h>
-+-#include <linux/version.h>
-+-#include <linux/etherdevice.h>
-+-
-+-/* The behavior of of_get_mac_address() changed in kernel 5.2, it now
-+- * returns an error code and not NULL in case of an error.
-+- */
-+-#if LINUX_VERSION_IS_LESS(5,13,0)
-+-static inline int backport_of_get_mac_address(struct device_node *np, u8 *mac_out)
-+-{
-+-	const void *mac = of_get_mac_address(np);
-+-
-+-	if (!mac)
-+-		return -ENODEV;
-+-	if (IS_ERR(mac))
-+-		return PTR_ERR(mac);
-+-	ether_addr_copy(mac_out, mac);
-+-	
-+-	return 0;
-+-}
-+-#define of_get_mac_address LINUX_BACKPORT(of_get_mac_address)
-+-#endif /* < 5.2 */
-+-
-+-#endif /* _BP_OF_NET_H */
--- 
-2.25.1
-
diff --git a/patches/wifi/0002-mac80211-pending-fixes.patch b/patches/wifi/0002-mac80211-pending-fixes.patch
deleted file mode 100644
index 3e0e36881..000000000
--- a/patches/wifi/0002-mac80211-pending-fixes.patch
+++ /dev/null
@@ -1,106 +0,0 @@
-From 1f1de369b842e8dbf3577d6e8380e57e7810007a Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Tue, 4 Jan 2022 06:22:59 +0100
-Subject: [PATCH 2/4] mac80211: pending fixes
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- .../files/lib/netifd/wireless/mac80211.sh     | 25 ++++++++++++++-----
- 1 file changed, 19 insertions(+), 6 deletions(-)
-
-diff --git a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh
-index 27eecf3a7f..823cb0180c 100644
---- a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh
-+++ b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh
-@@ -29,6 +29,7 @@ drv_mac80211_init_device_config() {
- 	config_add_string distance
- 	config_add_int beacon_int chanbw frag rts
- 	config_add_int rxantenna txantenna antenna_gain txpower
-+	config_add_int num_global_macaddr
- 	config_add_boolean noscan ht_coex acs_exclude_dfs
- 	config_add_array ht_capab
- 	config_add_array channels
-@@ -514,6 +515,7 @@ mac80211_get_addr() {
- 
- mac80211_generate_mac() {
- 	local phy="$1"
-+	local multiple_bssid="$2"
- 	local id="${macidx:-0}"
- 
- 	local ref="$(cat /sys/class/ieee80211/${phy}/macaddress)"
-@@ -537,9 +539,16 @@ mac80211_generate_mac() {
- 	local mask6=$6
- 
- 	local oIFS="$IFS"; IFS=":"; set -- $ref; IFS="$oIFS"
--
-+	[ "$multiple_bssid" -eq 1 ] && {
-+               printf "02:%s:%s:%s:%s:%02x" $b1 $2 $3 $4 $5 $macidx
-+               return
-+    }
- 	macidx=$(($id + 1))
--	[ "$((0x$mask1))" -gt 0 ] && {
-+
-+	local use_global=0
-+	[ "$id" -gt 0 -a "$macidx" -le "$num_global_macaddr" ] && use_global=1
-+
-+	[ "$((0x$mask1))" -gt 0 -a "$use_global" -lt 1 ] && {
- 		b1="0x$1"
- 		[ "$id" -gt 0 ] && \
- 			b1=$(($b1 ^ ((($id - !($b1 & 2)) << 2)) | 0x2))
-@@ -547,7 +556,7 @@ mac80211_generate_mac() {
- 		return
- 	}
- 
--	[ "$((0x$mask6))" -lt 255 ] && {
-+	[ "$((0x$mask6))" -lt 255 -a "$use_global" -gt 0 ] && {
- 		printf "%s:%s:%s:%s:%s:%02x" $1 $2 $3 $4 $5 $(( 0x$6 ^ $id ))
- 		return
- 	}
-@@ -646,6 +655,7 @@ mac80211_iw_interface_add() {
- }
- 
- mac80211_prepare_vif() {
-+	local multiple_bssid=$1
- 	json_select config
- 
- 	json_get_vars ifname mode ssid wds powersave macaddr enable wpa_psk_file vlan_file
-@@ -659,7 +669,7 @@ mac80211_prepare_vif() {
- 	json_select ..
- 
- 	[ -n "$macaddr" ] || {
--		macaddr="$(mac80211_generate_mac $phy)"
-+		macaddr="$(mac80211_generate_mac $phy $multiple_bssid)"
- 		macidx="$(($macidx + 1))"
- 	}
- 
-@@ -1028,7 +1038,9 @@ drv_mac80211_setup() {
- 		country chanbw distance \
- 		txpower antenna_gain \
- 		rxantenna txantenna \
--		frag rts beacon_int:100 htmode
-+		frag rts beacon_int:100 htmode \
-+		multiple_bssid:0 \
-+		num_global_macaddr
- 	json_get_values basic_rate_list basic_rate
- 	json_get_values scan_list scan_list
- 	json_select ..
-@@ -1090,6 +1102,7 @@ drv_mac80211_setup() {
- 	set_default txantenna 0xffffffff
- 	set_default distance 0
- 	set_default antenna_gain 0
-+	set_default num_global_macaddr 1
- 
- 	[ "$txantenna" = "all" ] && txantenna=0xffffffff
- 	[ "$rxantenna" = "all" ] && rxantenna=0xffffffff
-@@ -1121,7 +1134,7 @@ drv_mac80211_setup() {
- 	mac80211_prepare_iw_htmode
- 	for_each_interface "sta adhoc mesh monitor" mac80211_prepare_vif
- 	NEWAPLIST=
--	for_each_interface "ap" mac80211_prepare_vif
-+	for_each_interface "ap" mac80211_prepare_vif ${multiple_bssid}
- 	NEW_MD5=$(test -e "${hostapd_conf_file}" && md5sum ${hostapd_conf_file})
- 	OLD_MD5=$(uci -q -P /var/state get wireless._${phy}.md5)
- 	if [ "${NEWAPLIST}" != "${OLDAPLIST}" ]; then
--- 
-2.25.1
-
diff --git a/patches/wifi/0003-hostapd-drop-current-version.patch b/patches/wifi/0003-hostapd-drop-current-version.patch
deleted file mode 100644
index 3e7a4a32f..000000000
--- a/patches/wifi/0003-hostapd-drop-current-version.patch
+++ /dev/null
@@ -1,15299 +0,0 @@
-From 29352929a0b06d8bb9a6705520bad9dcc8b5f917 Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
-Date: Thu, 17 Aug 2023 20:04:07 +0200
-Subject: [PATCH 3/6] hostapd: drop current version
-
-Signed-off-by: John Crispin <john@phrozen.org>
----
- package/network/services/hostapd/Config.in    |   89 -
- package/network/services/hostapd/Makefile     |  710 --------
- .../hostapd/files/hostapd-basic.config        |  401 -----
- .../hostapd/files/hostapd-full.config         |  401 -----
- .../hostapd/files/hostapd-mini.config         |  401 -----
- .../network/services/hostapd/files/hostapd.sh | 1499 ----------------
- .../services/hostapd/files/multicall.c        |   28 -
- .../hostapd/files/wpa_supplicant-basic.config |  625 -------
- .../hostapd/files/wpa_supplicant-full.config  |  625 -------
- .../hostapd/files/wpa_supplicant-mini.config  |  625 -------
- .../hostapd/files/wpa_supplicant-p2p.config   |  625 -------
- .../network/services/hostapd/files/wpad.init  |   41 -
- .../network/services/hostapd/files/wpad.json  |   22 -
- .../services/hostapd/files/wpad_acl.json      |   10 -
- .../services/hostapd/files/wps-hotplug.sh     |   62 -
- ...-fix-frequency-setup-with-HE-enabled.patch |  196 ---
- ...-init-order-disable-pri-sec-channel-.patch |  126 --
- ...andle-HT40-and-mode-downgrade-in-AP-.patch |  102 --
- ...ix-frequency-config-for-non-p2p-vht-.patch |   63 -
- ...nable-vht-and-he-in-default-config-p.patch |   25 -
- ...er-debug-messages-for-some-error-cas.patch |   83 -
- ...lper-functions-for-vht-he-parameters.patch |   27 -
- ...ompletion-callback-to-complete-mesh-.patch |  108 --
- ...-frequency-as-pri-sec-channel-switch.patch |   26 -
- ...hannels-to-be-selected-if-dfs-is-ena.patch |   80 -
- ...offchanok-on-DFS-channels-in-non-ETS.patch |   53 -
- ...-fix-channel-switch-error-during-CAC.patch |   66 -
- ...rnel-driver-DFS-handler-in-userspace.patch |   48 -
- .../014-mesh-fixes-for-mesh-init-deinit.patch |  158 --
- .../015-mesh-fix-DFS-deinit-init.patch        |  262 ---
- ...sts-DFS-test-for-wpa_supplicant-mesh.patch |   94 -
- .../patches/017-mesh-fix-mesh_oom-test.patch  |   24 -
- ...ve-mesh-freq-setting-to-own-function.patch |   93 -
- ...erministic-channel-on-channel-switch.patch |   81 -
- ...020-ignore-4addr-mode-enabling-error.patch |   73 -
- ...-dl_list_del-before-freeing-ipv6-add.patch |   19 -
- ...ewrite-neigh-code-to-not-depend-on-l.patch |  275 ---
- ...ssing-authentication-frames-in-block.patch |   34 -
- ...50-mesh-make-forwarding-configurable.patch |  219 ---
- ...-case-in-peer-addition-based-on-PD-R.patch |   45 -
- .../hostapd/patches/100-daemonize_fix.patch   |   97 -
- .../patches/110-notify-mgmt-frames.patch      |  116 --
- .../patches/110-wolfssl-compile-fix.patch     |   10 -
- .../120-reconfigure-wps-credentials.patch     |  178 --
- .../hostapd/patches/200-multicall.patch       |  355 ----
- .../services/hostapd/patches/300-noscan.patch |   58 -
- .../hostapd/patches/301-mesh-noscan.patch     |   68 -
- .../patches/310-rescan_immediately.patch      |   11 -
- .../hostapd/patches/320-optional_rfkill.patch |   61 -
- .../patches/330-nl80211_fix_set_freq.patch    |   11 -
- .../patches/340-reload_freq_change.patch      |   75 -
- .../341-mesh-ctrl-iface-channel-switch.patch  |   39 -
- .../patches/350-nl80211_del_beacon_bss.patch  |   54 -
- .../patches/360-ctrl_iface_reload.patch       |  106 --
- .../hostapd/patches/370-ap_sta_support.patch  |  403 -----
- .../patches/380-disable_ctrl_iface_mib.patch  |  193 --
- .../381-hostapd_cli_UNKNOWN-COMMAND.patch     |   11 -
- .../patches/390-wpa_ie_cap_workaround.patch   |   56 -
- .../400-wps_single_auth_enc_type.patch        |   23 -
- .../patches/410-limit_debug_messages.patch    |  210 ---
- .../patches/420-indicate-features.patch       |   62 -
- .../patches/430-hostapd_cli_ifdef.patch       |   56 -
- .../hostapd/patches/431-wpa_cli_ifdef.patch   |   18 -
- .../hostapd/patches/432-missing-typedef.patch |   10 -
- .../hostapd/patches/450-scan_wait.patch       |   73 -
- ...dd-new-config-params-to-be-used-with.patch |  189 --
- ...-use-new-parameters-during-ibss-join.patch |   59 -
- .../patches/463-add-mcast_rate-to-11s.patch   |   68 -
- .../patches/464-fix-mesh-obss-check.patch     |   19 -
- .../patches/470-survey_data_fallback.patch    |   45 -
- .../patches/500-lto-jobserver-support.patch   |   50 -
- .../599-wpa_supplicant-fix-warnings.patch     |   19 -
- .../hostapd/patches/600-ubus_support.patch    |  426 -----
- .../hostapd/patches/700-wifi-reload.patch     |  219 ---
- .../hostapd/patches/710-vlan_no_bridge.patch  |   33 -
- .../patches/711-wds_bridge_force.patch        |   22 -
- .../hostapd/patches/730-ft_iface.patch        |   38 -
- .../hostapd/patches/740-snoop_iface.patch     |   66 -
- ...750-qos_map_set_without_interworking.patch |  112 --
- ...ate-if-no-available-channel-is-found.patch |   37 -
- ...of-secondary-device-types-for-P2P-gr.patch |   33 -
- .../802-wolfssl-init-RNG-with-ECC-key.patch   |   43 -
- .../services/hostapd/src/src/ap/ubus.c        | 1557 -----------------
- .../services/hostapd/src/src/ap/ubus.h        |  103 --
- .../hostapd/src/src/utils/build_features.h    |   59 -
- .../hostapd/src/wpa_supplicant/ubus.c         |  430 -----
- .../hostapd/src/wpa_supplicant/ubus.h         |   66 -
- 87 files changed, 14591 deletions(-)
- delete mode 100644 package/network/services/hostapd/Config.in
- delete mode 100644 package/network/services/hostapd/Makefile
- delete mode 100644 package/network/services/hostapd/files/hostapd-basic.config
- delete mode 100644 package/network/services/hostapd/files/hostapd-full.config
- delete mode 100644 package/network/services/hostapd/files/hostapd-mini.config
- delete mode 100644 package/network/services/hostapd/files/hostapd.sh
- delete mode 100644 package/network/services/hostapd/files/multicall.c
- delete mode 100644 package/network/services/hostapd/files/wpa_supplicant-basic.config
- delete mode 100644 package/network/services/hostapd/files/wpa_supplicant-full.config
- delete mode 100644 package/network/services/hostapd/files/wpa_supplicant-mini.config
- delete mode 100644 package/network/services/hostapd/files/wpa_supplicant-p2p.config
- delete mode 100644 package/network/services/hostapd/files/wpad.init
- delete mode 100644 package/network/services/hostapd/files/wpad.json
- delete mode 100644 package/network/services/hostapd/files/wpad_acl.json
- delete mode 100644 package/network/services/hostapd/files/wps-hotplug.sh
- delete mode 100644 package/network/services/hostapd/patches/001-HE-VHT-fix-frequency-setup-with-HE-enabled.patch
- delete mode 100644 package/network/services/hostapd/patches/002-mesh-fix-channel-init-order-disable-pri-sec-channel-.patch
- delete mode 100644 package/network/services/hostapd/patches/003-wpa_supplicant-handle-HT40-and-mode-downgrade-in-AP-.patch
- delete mode 100644 package/network/services/hostapd/patches/004-wpa_supplicant-fix-frequency-config-for-non-p2p-vht-.patch
- delete mode 100644 package/network/services/hostapd/patches/005-wpa_supplicant-enable-vht-and-he-in-default-config-p.patch
- delete mode 100644 package/network/services/hostapd/patches/006-hw_features-better-debug-messages-for-some-error-cas.patch
- delete mode 100644 package/network/services/hostapd/patches/007-dfs-use-helper-functions-for-vht-he-parameters.patch
- delete mode 100644 package/network/services/hostapd/patches/008-mesh-use-setup-completion-callback-to-complete-mesh-.patch
- delete mode 100644 package/network/services/hostapd/patches/009-mesh-update-ssid-frequency-as-pri-sec-channel-switch.patch
- delete mode 100644 package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch
- delete mode 100644 package/network/services/hostapd/patches/011-mesh-do-not-set-offchanok-on-DFS-channels-in-non-ETS.patch
- delete mode 100644 package/network/services/hostapd/patches/012-mesh-fix-channel-switch-error-during-CAC.patch
- delete mode 100644 package/network/services/hostapd/patches/013-mesh-inform-kernel-driver-DFS-handler-in-userspace.patch
- delete mode 100644 package/network/services/hostapd/patches/014-mesh-fixes-for-mesh-init-deinit.patch
- delete mode 100644 package/network/services/hostapd/patches/015-mesh-fix-DFS-deinit-init.patch
- delete mode 100644 package/network/services/hostapd/patches/016-tests-DFS-test-for-wpa_supplicant-mesh.patch
- delete mode 100644 package/network/services/hostapd/patches/017-mesh-fix-mesh_oom-test.patch
- delete mode 100644 package/network/services/hostapd/patches/018-mesh-move-mesh-freq-setting-to-own-function.patch
- delete mode 100644 package/network/services/hostapd/patches/019-mesh-use-deterministic-channel-on-channel-switch.patch
- delete mode 100644 package/network/services/hostapd/patches/020-ignore-4addr-mode-enabling-error.patch
- delete mode 100644 package/network/services/hostapd/patches/023-ndisc_snoop-call-dl_list_del-before-freeing-ipv6-add.patch
- delete mode 100644 package/network/services/hostapd/patches/030-driver_nl80211-rewrite-neigh-code-to-not-depend-on-l.patch
- delete mode 100644 package/network/services/hostapd/patches/040-mesh-allow-processing-authentication-frames-in-block.patch
- delete mode 100644 package/network/services/hostapd/patches/050-mesh-make-forwarding-configurable.patch
- delete mode 100644 package/network/services/hostapd/patches/060-P2P-Fix-a-corner-case-in-peer-addition-based-on-PD-R.patch
- delete mode 100644 package/network/services/hostapd/patches/100-daemonize_fix.patch
- delete mode 100644 package/network/services/hostapd/patches/110-notify-mgmt-frames.patch
- delete mode 100644 package/network/services/hostapd/patches/110-wolfssl-compile-fix.patch
- delete mode 100644 package/network/services/hostapd/patches/120-reconfigure-wps-credentials.patch
- delete mode 100644 package/network/services/hostapd/patches/200-multicall.patch
- delete mode 100644 package/network/services/hostapd/patches/300-noscan.patch
- delete mode 100644 package/network/services/hostapd/patches/301-mesh-noscan.patch
- delete mode 100644 package/network/services/hostapd/patches/310-rescan_immediately.patch
- delete mode 100644 package/network/services/hostapd/patches/320-optional_rfkill.patch
- delete mode 100644 package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch
- delete mode 100644 package/network/services/hostapd/patches/340-reload_freq_change.patch
- delete mode 100644 package/network/services/hostapd/patches/341-mesh-ctrl-iface-channel-switch.patch
- delete mode 100644 package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch
- delete mode 100644 package/network/services/hostapd/patches/360-ctrl_iface_reload.patch
- delete mode 100644 package/network/services/hostapd/patches/370-ap_sta_support.patch
- delete mode 100644 package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch
- delete mode 100644 package/network/services/hostapd/patches/381-hostapd_cli_UNKNOWN-COMMAND.patch
- delete mode 100644 package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch
- delete mode 100644 package/network/services/hostapd/patches/400-wps_single_auth_enc_type.patch
- delete mode 100644 package/network/services/hostapd/patches/410-limit_debug_messages.patch
- delete mode 100644 package/network/services/hostapd/patches/420-indicate-features.patch
- delete mode 100644 package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch
- delete mode 100644 package/network/services/hostapd/patches/431-wpa_cli_ifdef.patch
- delete mode 100644 package/network/services/hostapd/patches/432-missing-typedef.patch
- delete mode 100644 package/network/services/hostapd/patches/450-scan_wait.patch
- delete mode 100644 package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch
- delete mode 100644 package/network/services/hostapd/patches/461-driver_nl80211-use-new-parameters-during-ibss-join.patch
- delete mode 100644 package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch
- delete mode 100644 package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch
- delete mode 100644 package/network/services/hostapd/patches/470-survey_data_fallback.patch
- delete mode 100644 package/network/services/hostapd/patches/500-lto-jobserver-support.patch
- delete mode 100644 package/network/services/hostapd/patches/599-wpa_supplicant-fix-warnings.patch
- delete mode 100644 package/network/services/hostapd/patches/600-ubus_support.patch
- delete mode 100644 package/network/services/hostapd/patches/700-wifi-reload.patch
- delete mode 100644 package/network/services/hostapd/patches/710-vlan_no_bridge.patch
- delete mode 100644 package/network/services/hostapd/patches/711-wds_bridge_force.patch
- delete mode 100644 package/network/services/hostapd/patches/730-ft_iface.patch
- delete mode 100644 package/network/services/hostapd/patches/740-snoop_iface.patch
- delete mode 100644 package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch
- delete mode 100644 package/network/services/hostapd/patches/800-dfs-enter-DFS-state-if-no-available-channel-is-found.patch
- delete mode 100644 package/network/services/hostapd/patches/801-P2P-Fix-copying-of-secondary-device-types-for-P2P-gr.patch
- delete mode 100644 package/network/services/hostapd/patches/802-wolfssl-init-RNG-with-ECC-key.patch
- delete mode 100644 package/network/services/hostapd/src/src/ap/ubus.c
- delete mode 100644 package/network/services/hostapd/src/src/ap/ubus.h
- delete mode 100644 package/network/services/hostapd/src/src/utils/build_features.h
- delete mode 100644 package/network/services/hostapd/src/wpa_supplicant/ubus.c
- delete mode 100644 package/network/services/hostapd/src/wpa_supplicant/ubus.h
-
-diff --git a/package/network/services/hostapd/Config.in b/package/network/services/hostapd/Config.in
-deleted file mode 100644
-index 5c00f3e24e..0000000000
---- a/package/network/services/hostapd/Config.in
-+++ /dev/null
-@@ -1,89 +0,0 @@
--# wpa_supplicant config
--config WPA_RFKILL_SUPPORT
--	bool "Add rfkill support"
--	depends on PACKAGE_wpa-supplicant || \
--		   PACKAGE_wpa-supplicant-openssl || \
--		   PACKAGE_wpa-supplicant-wolfssl || \
--		   PACKAGE_wpa-supplicant-mesh-openssl || \
--		   PACKAGE_wpa-supplicant-mesh-wolfssl || \
--		   PACKAGE_wpa-supplicant-basic || \
--		   PACKAGE_wpa-supplicant-mini || \
--		   PACKAGE_wpa-supplicant-p2p || \
--		   PACKAGE_wpad || \
--		   PACKAGE_wpad-openssl || \
--		   PACKAGE_wpad-wolfssl || \
--		   PACKAGE_wpad-basic || \
--		   PACKAGE_wpad-basic-openssl || \
--		   PACKAGE_wpad-basic-wolfssl || \
--		   PACKAGE_wpad-mini || \
--		   PACKAGE_wpad-mesh-openssl || \
--		   PACKAGE_wpad-mesh-wolfssl
--	default n
--
--config WPA_MSG_MIN_PRIORITY
--	int "Minimum debug message priority"
--	depends on PACKAGE_wpa-supplicant || \
--		   PACKAGE_wpa-supplicant-openssl || \
--		   PACKAGE_wpa-supplicant-wolfssl || \
--		   PACKAGE_wpa-supplicant-mesh-openssl || \
--		   PACKAGE_wpa-supplicant-mesh-wolfssl || \
--		   PACKAGE_wpa-supplicant-basic || \
--		   PACKAGE_wpa-supplicant-mini || \
--		   PACKAGE_wpa-supplicant-p2p || \
--		   PACKAGE_wpad || \
--		   PACKAGE_wpad-openssl || \
--		   PACKAGE_wpad-wolfssl || \
--		   PACKAGE_wpad-basic || \
--		   PACKAGE_wpad-basic-openssl || \
--		   PACKAGE_wpad-basic-wolfssl || \
--		   PACKAGE_wpad-mini || \
--		   PACKAGE_wpad-mesh-openssl || \
--		   PACKAGE_wpad-mesh-wolfssl
--	default 3
--	help
--	  Useful values are:
--	    0 = all messages
--		1 = raw message dumps
--		2 = most debugging messages
--		3 = info messages
--		4 = warnings
--		5 = errors
--
--config WPA_WOLFSSL
--	bool
--	default PACKAGE_wpa-supplicant-wolfssl ||\
--	        PACKAGE_wpad-wolfssl ||\
--	        PACKAGE_wpad-basic-wolfssl || \
--	        PACKAGE_wpad-mesh-wolfssl ||\
--	        PACKAGE_eapol-test-wolfssl
--	select WOLFSSL_HAS_AES_CCM
--	select WOLFSSL_HAS_ARC4
--	select WOLFSSL_HAS_DH
--	select WOLFSSL_HAS_OCSP
--	select WOLFSSL_HAS_SESSION_TICKET
--	select WOLFSSL_HAS_WPAS
--
--config DRIVER_WEXT_SUPPORT
--	bool
--	default n
--
--config DRIVER_11N_SUPPORT
--	bool
--	default n
--
--config DRIVER_11AC_SUPPORT
--	bool
--	default n
--
--config DRIVER_11AX_SUPPORT
--	bool
--	default n
--
--config WPA_ENABLE_WEP
--	bool "Enable support for unsecure and obsolete WEP"
--	help
--	  Wired equivalent privacy (WEP) is an obsolete cryptographic data
--	  confidentiality algorithm that is not considered secure. It should not be used
--	  for anything anymore. The functionality needed to use WEP is available in the
--	  current hostapd release under this optional build parameter and completely
--	  removed in a future release.
-diff --git a/package/network/services/hostapd/Makefile b/package/network/services/hostapd/Makefile
-deleted file mode 100644
-index 783c10d587..0000000000
---- a/package/network/services/hostapd/Makefile
-+++ /dev/null
-@@ -1,710 +0,0 @@
--# Copyright (C) 2006-2014 OpenWrt.org
--#
--# This is free software, licensed under the GNU General Public License v2.
--# See /LICENSE for more information.
--#
--
--include $(TOPDIR)/rules.mk
--
--PKG_NAME:=hostapd
--PKG_RELEASE:=37
--
--PKG_SOURCE_URL:=http://w1.fi/hostap.git
--PKG_SOURCE_PROTO:=git
--PKG_SOURCE_DATE:=2020-06-08
--PKG_SOURCE_VERSION:=5a8b366233f5585e68a4ffbb604fbb4a848eb325
--PKG_MIRROR_HASH:=1b2a4947034142587a3f81eac2ea27dd64650e77f8943d973623b47533be2393
--
--PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
--PKG_LICENSE:=BSD-3-Clause
--PKG_CPE_ID:=cpe:/a:w1.fi:hostapd
--
--PKG_BUILD_PARALLEL:=1
--PKG_ASLR_PIE_REGULAR:=1
--
--PKG_CONFIG_DEPENDS:= \
--	CONFIG_PACKAGE_kmod-ath9k \
--	CONFIG_PACKAGE_kmod-cfg80211 \
--	CONFIG_PACKAGE_hostapd \
--	CONFIG_PACKAGE_hostapd-basic \
--	CONFIG_PACKAGE_hostapd-mini \
--	CONFIG_WPA_RFKILL_SUPPORT \
--	CONFIG_DRIVER_WEXT_SUPPORT \
--	CONFIG_DRIVER_11N_SUPPORT \
--	CONFIG_DRIVER_11AC_SUPPORT \
--	CONFIG_DRIVER_11AX_SUPPORT \
--	CONFIG_WPA_ENABLE_WEP
--
--EAPOL_TEST_PROVIDERS:=eapol-test eapol-test-openssl eapol-test-wolfssl
--
--SUPPLICANT_PROVIDERS:=
--HOSTAPD_PROVIDERS:=
--
--LOCAL_TYPE=$(strip \
--		$(if $(findstring wpad,$(BUILD_VARIANT)),wpad, \
--		$(if $(findstring supplicant,$(BUILD_VARIANT)),supplicant, \
--		hostapd \
--		)))
--
--LOCAL_AND_LIB_VARIANT=$(patsubst hostapd-%,%,\
--		      $(patsubst wpad-%,%,\
--		      $(patsubst supplicant-%,%,\
--		      $(BUILD_VARIANT)\
--		      )))
--
--LOCAL_VARIANT=$(patsubst %-internal,%,\
--	      $(patsubst %-openssl,%,\
--	      $(patsubst %-wolfssl,%,\
--	      $(LOCAL_AND_LIB_VARIANT)\
--	      )))
--
--SSL_VARIANT=$(strip \
--		$(if $(findstring openssl,$(LOCAL_AND_LIB_VARIANT)),openssl,\
--		$(if $(findstring wolfssl,$(LOCAL_AND_LIB_VARIANT)),wolfssl,\
--		internal\
--		)))
--
--CONFIG_VARIANT:=$(LOCAL_VARIANT)
--ifeq ($(LOCAL_VARIANT),mesh)
--  CONFIG_VARIANT:=full
--endif
--
--include $(INCLUDE_DIR)/package.mk
--
--STAMP_CONFIGURED:=$(STAMP_CONFIGURED)_$(CONFIG_WPA_MSG_MIN_PRIORITY)
--
--
--ifneq ($(CONFIG_DRIVER_11N_SUPPORT),)
--  HOSTAPD_IEEE80211N:=y
--endif
--
--ifneq ($(CONFIG_DRIVER_11AC_SUPPORT),)
--  HOSTAPD_IEEE80211AC:=y
--endif
--
--ifneq ($(CONFIG_DRIVER_11AX_SUPPORT),)
--  HOSTAPD_IEEE80211AX:=y
--endif
--
--DRIVER_MAKEOPTS= \
--	CONFIG_ACS=$(CONFIG_PACKAGE_kmod-cfg80211) \
--	CONFIG_DRIVER_NL80211=$(CONFIG_PACKAGE_kmod-cfg80211) \
--	CONFIG_IEEE80211N=$(HOSTAPD_IEEE80211N) \
--	CONFIG_IEEE80211AC=$(HOSTAPD_IEEE80211AC) \
--	CONFIG_IEEE80211AX=$(HOSTAPD_IEEE80211AX) \
--	CONFIG_DRIVER_WEXT=$(CONFIG_DRIVER_WEXT_SUPPORT) \
--
--ifeq ($(SSL_VARIANT),openssl)
--  DRIVER_MAKEOPTS += CONFIG_TLS=openssl CONFIG_SAE=y
--  TARGET_LDFLAGS += -lcrypto -lssl
--
--  ifeq ($(LOCAL_VARIANT),basic)
--    DRIVER_MAKEOPTS += CONFIG_OWE=y
--  endif
--  ifeq ($(LOCAL_VARIANT),mesh)
--    DRIVER_MAKEOPTS += CONFIG_AP=y CONFIG_MESH=y
--  endif
--  ifeq ($(LOCAL_VARIANT),full)
--    DRIVER_MAKEOPTS += CONFIG_OWE=y CONFIG_SUITEB192=y CONFIG_AP=y CONFIG_MESH=y
--  endif
--endif
--
--ifeq ($(SSL_VARIANT),wolfssl)
--  DRIVER_MAKEOPTS += CONFIG_TLS=wolfssl CONFIG_SAE=y
--  TARGET_LDFLAGS += -lwolfssl
--
--  ifeq ($(LOCAL_VARIANT),basic)
--    DRIVER_MAKEOPTS += CONFIG_OWE=y
--  endif
--  ifeq ($(LOCAL_VARIANT),mesh)
--    DRIVER_MAKEOPTS += CONFIG_AP=y CONFIG_MESH=y CONFIG_WPS_NFC=1
--  endif
--  ifeq ($(LOCAL_VARIANT),full)
--    DRIVER_MAKEOPTS += CONFIG_OWE=y CONFIG_SUITEB192=y CONFIG_AP=y CONFIG_MESH=y CONFIG_WPS_NFC=1
--  endif
--endif
--
--ifneq ($(LOCAL_TYPE),hostapd)
--  ifdef CONFIG_WPA_RFKILL_SUPPORT
--    DRIVER_MAKEOPTS += NEED_RFKILL=y
--  endif
--endif
--
--ifdef CONFIG_USE_GLIBC
--  TARGET_LDFLAGS += -lrt
--  TARGET_LDFLAGS_C += -lrt
--endif
--
--DRV_DEPENDS:=+PACKAGE_kmod-cfg80211:libnl-tiny
--
--
--define Package/hostapd/Default
--  SECTION:=net
--  CATEGORY:=Network
--  SUBMENU:=WirelessAPD
--  TITLE:=IEEE 802.1x Authenticator
--  URL:=http://hostap.epitest.fi/
--  DEPENDS:=$(DRV_DEPENDS) +hostapd-common +libubus
--  USERID:=network=101:network=101
--  PROVIDES:=hostapd
--  CONFLICTS:=$(HOSTAPD_PROVIDERS)
--  HOSTAPD_PROVIDERS+=$(1)
--endef
--
--define Package/hostapd
--$(call Package/hostapd/Default,$(1))
--  TITLE+= (built-in full)
--  VARIANT:=full-internal
--endef
--
--define Package/hostapd/description
-- This package contains a full featured IEEE 802.1x/WPA/EAP/RADIUS
-- Authenticator.
--endef
--
--define Package/hostapd-openssl
--$(call Package/hostapd/Default,$(1))
--  TITLE+= (OpenSSL full)
--  VARIANT:=full-openssl
--  DEPENDS+=+libopenssl
--endef
--
--Package/hostapd-openssl/description = $(Package/hostapd/description)
--
--define Package/hostapd-wolfssl
--$(call Package/hostapd/Default,$(1))
--  TITLE+= (wolfSSL full)
--  VARIANT:=full-wolfssl
--  DEPENDS+=+libwolfssl
--endef
--
--Package/hostapd-wolfssl/description = $(Package/hostapd/description)
--
--define Package/hostapd-basic
--$(call Package/hostapd/Default,$(1))
--  TITLE+= (WPA-PSK, 11r, 11w)
--  VARIANT:=basic
--endef
--
--define Package/hostapd-basic/description
-- This package contains a basic IEEE 802.1x/WPA Authenticator with WPA-PSK, 802.11r and 802.11w support.
--endef
--
--define Package/hostapd-basic-openssl
--$(call Package/hostapd/Default,$(1))
--  TITLE+= (WPA-PSK, 11r and 11w)
--  VARIANT:=basic-openssl
--  DEPENDS+=+libopenssl
--endef
--
--define Package/hostapd-basic-openssl/description
-- This package contains a basic IEEE 802.1x/WPA Authenticator with WPA-PSK, 802.11r and 802.11w support.
--endef
--
--define Package/hostapd-basic-wolfssl
--$(call Package/hostapd/Default,$(1))
--  TITLE+= (WPA-PSK, 11r and 11w)
--  VARIANT:=basic-wolfssl
--  DEPENDS+=+libwolfssl
--endef
--
--define Package/hostapd-basic-wolfssl/description
-- This package contains a basic IEEE 802.1x/WPA Authenticator with WPA-PSK, 802.11r and 802.11w support.
--endef
--
--define Package/hostapd-mini
--$(call Package/hostapd/Default,$(1))
--  TITLE+= (WPA-PSK only)
--  VARIANT:=mini
--endef
--
--define Package/hostapd-mini/description
-- This package contains a minimal IEEE 802.1x/WPA Authenticator (WPA-PSK only).
--endef
--
--
--define Package/wpad/Default
--  SECTION:=net
--  CATEGORY:=Network
--  SUBMENU:=WirelessAPD
--  TITLE:=IEEE 802.1x Auth/Supplicant
--  DEPENDS:=$(DRV_DEPENDS) +hostapd-common +libubus
--  USERID:=network=101:network=101
--  URL:=http://hostap.epitest.fi/
--  PROVIDES:=hostapd wpa-supplicant
--  CONFLICTS:=$(HOSTAPD_PROVIDERS) $(SUPPLICANT_PROVIDERS)
--  HOSTAPD_PROVIDERS+=$(1)
--  SUPPLICANT_PROVIDERS+=$(1)
--endef
--
--define Package/wpad
--$(call Package/wpad/Default,$(1))
--  TITLE+= (built-in full)
--  VARIANT:=wpad-full-internal
--endef
--
--define Package/wpad/description
-- This package contains a full featured IEEE 802.1x/WPA/EAP/RADIUS
-- Authenticator and Supplicant
--endef
--
--define Package/wpad-openssl
--$(call Package/wpad/Default,$(1))
--  TITLE+= (OpenSSL full)
--  VARIANT:=wpad-full-openssl
--  DEPENDS+=+libopenssl
--endef
--
--Package/wpad-openssl/description = $(Package/wpad/description)
--
--define Package/wpad-wolfssl
--$(call Package/wpad/Default,$(1))
--  TITLE+= (wolfSSL full)
--  VARIANT:=wpad-full-wolfssl
--  DEPENDS+=+libwolfssl
--endef
--
--Package/wpad-wolfssl/description = $(Package/wpad/description)
--
--define Package/wpad-basic
--$(call Package/wpad/Default,$(1))
--  TITLE+= (WPA-PSK, 11r, 11w)
--  VARIANT:=wpad-basic
--endef
--
--define Package/wpad-basic/description
-- This package contains a basic IEEE 802.1x/WPA Authenticator and Supplicant with WPA-PSK, 802.11r and 802.11w support.
--endef
--
--define Package/wpad-basic-openssl
--$(call Package/wpad/Default,$(1))
--  TITLE+= (OpenSSL, 11r, 11w)
--  VARIANT:=wpad-basic-openssl
--  DEPENDS+=+libopenssl
--endef
--
--define Package/wpad-basic-openssl/description
-- This package contains a basic IEEE 802.1x/WPA Authenticator and Supplicant with WPA-PSK, SAE (WPA3-Personal), 802.11r and 802.11w support.
--endef
--
--define Package/wpad-basic-wolfssl
--$(call Package/wpad/Default,$(1))
--  TITLE+= (wolfSSL, 11r, 11w)
--  VARIANT:=wpad-basic-wolfssl
--  DEPENDS+=+libwolfssl
--endef
--
--define Package/wpad-basic-wolfssl/description
-- This package contains a basic IEEE 802.1x/WPA Authenticator and Supplicant with WPA-PSK, SAE (WPA3-Personal), 802.11r and 802.11w support.
--endef
--
--define Package/wpad-mini
--$(call Package/wpad/Default,$(1))
--  TITLE+= (WPA-PSK only)
--  VARIANT:=wpad-mini
--endef
--
--define Package/wpad-mini/description
-- This package contains a minimal IEEE 802.1x/WPA Authenticator and Supplicant (WPA-PSK only).
--endef
--
--define Package/wpad-mesh
--$(call Package/wpad/Default,$(1))
--  DEPENDS+=@PACKAGE_kmod-cfg80211 @(!TARGET_uml||BROKEN)
--  PROVIDES+=wpa-supplicant-mesh wpad-mesh
--endef
--
--define Package/wpad-mesh/description
-- This package contains a minimal IEEE 802.1x/WPA Authenticator and Supplicant (with 802.11s mesh and SAE support).
--endef
--
--define Package/wpad-mesh-openssl
--$(call Package/wpad-mesh,$(1))
--  TITLE+= (OpenSSL, 11s, SAE)
--  DEPENDS+=+libopenssl
--  VARIANT:=wpad-mesh-openssl
--endef
--
--Package/wpad-mesh-openssl/description = $(Package/wpad-mesh/description)
--
--define Package/wpad-mesh-wolfssl
--$(call Package/wpad-mesh,$(1))
--  TITLE+= (wolfSSL, 11s, SAE)
--  DEPENDS+=+libwolfssl
--  VARIANT:=wpad-mesh-wolfssl
--endef
--
--Package/wpad-mesh-wolfssl/description = $(Package/wpad-mesh/description)
--
--
--define Package/wpa-supplicant/Default
--  SECTION:=net
--  CATEGORY:=Network
--  SUBMENU:=WirelessAPD
--  TITLE:=WPA Supplicant
--  URL:=http://hostap.epitest.fi/wpa_supplicant/
--  DEPENDS:=$(DRV_DEPENDS) +hostapd-common +libubus
--  USERID:=network=101:network=101
--  PROVIDES:=wpa-supplicant
--  CONFLICTS:=$(SUPPLICANT_PROVIDERS)
--  SUPPLICANT_PROVIDERS+=$(1)
--endef
--
--define Package/wpa-supplicant
--$(call Package/wpa-supplicant/Default,$(1))
--  TITLE+= (built-in full)
--  VARIANT:=supplicant-full-internal
--endef
--
--define Package/wpa-supplicant-openssl
--$(call Package/wpa-supplicant/Default,$(1))
--  TITLE+= (OpenSSL full)
--  VARIANT:=supplicant-full-openssl
--  DEPENDS+=+libopenssl
--endef
--
--define Package/wpa-supplicant-wolfssl
--$(call Package/wpa-supplicant/Default,$(1))
--  TITLE+= (wolfSSL full)
--  VARIANT:=supplicant-full-wolfssl
--  DEPENDS+=+libwolfssl
--endef
--
--define Package/wpa-supplicant/config
--	source "$(SOURCE)/Config.in"
--endef
--
--define Package/wpa-supplicant-p2p
--$(call Package/wpa-supplicant/Default,$(1))
--  TITLE+= (Wi-Fi P2P support)
--  DEPENDS+=@PACKAGE_kmod-cfg80211
--  VARIANT:=supplicant-p2p-internal
--endef
--
--define Package/wpa-supplicant-mesh/Default
--$(call Package/wpa-supplicant/Default,$(1))
--  DEPENDS+=@PACKAGE_kmod-cfg80211 @(!TARGET_uml||BROKEN)
--  PROVIDES+=wpa-supplicant-mesh
--endef
--
--define Package/wpa-supplicant-mesh-openssl
--$(call Package/wpa-supplicant-mesh/Default,$(1))
--  TITLE+= (OpenSSL, 11s, SAE)
--  VARIANT:=supplicant-mesh-openssl
--  DEPENDS+=+libopenssl
--endef
--
--define Package/wpa-supplicant-mesh-wolfssl
--$(call Package/wpa-supplicant-mesh/Default,$(1))
--  TITLE+= (wolfSSL, 11s, SAE)
--  VARIANT:=supplicant-mesh-wolfssl
--  DEPENDS+=+libwolfssl
--endef
--
--define Package/wpa-supplicant-basic
--$(call Package/wpa-supplicant/Default,$(1))
--  TITLE+= (11r, 11w)
--  VARIANT:=supplicant-basic
--endef
--
--define Package/wpa-supplicant-mini
--$(call Package/wpa-supplicant/Default,$(1))
--  TITLE+= (minimal)
--  VARIANT:=supplicant-mini
--endef
--
--
--define Package/hostapd-common
--  TITLE:=hostapd/wpa_supplicant common support files
--  SECTION:=net
--  CATEGORY:=Network
--  SUBMENU:=WirelessAPD
--endef
--
--define Package/hostapd-utils
--  SECTION:=net
--  CATEGORY:=Network
--  SUBMENU:=WirelessAPD
--  TITLE:=IEEE 802.1x Authenticator (utils)
--  URL:=http://hostap.epitest.fi/
--  DEPENDS:=@$(subst $(space),||,$(foreach pkg,$(HOSTAPD_PROVIDERS),PACKAGE_$(pkg)))
--endef
--
--define Package/hostapd-utils/description
-- This package contains a command line utility to control the
-- IEEE 802.1x/WPA/EAP/RADIUS Authenticator.
--endef
--
--define Package/wpa-cli
--  SECTION:=net
--  CATEGORY:=Network
--  SUBMENU:=WirelessAPD
--  DEPENDS:=@$(subst $(space),||,$(foreach pkg,$(SUPPLICANT_PROVIDERS),PACKAGE_$(pkg)))
--  TITLE:=WPA Supplicant command line control utility
--endef
--
--define Package/eapol-test/Default
--  TITLE:=802.1x auth test utility
--  SECTION:=net
--  SUBMENU:=WirelessAPD
--  CATEGORY:=Network
--  DEPENDS:=$(DRV_DEPENDS) +libubus
--endef
--
--define Package/eapol-test
--  $(call Package/eapol-test/Default,$(1))
--  TITLE+= (built-in full)
--  VARIANT:=supplicant-full-internal
--endef
--
--define Package/eapol-test-openssl
--  $(call Package/eapol-test/Default,$(1))
--  TITLE+= (OpenSSL full)
--  VARIANT:=supplicant-full-openssl
--  CONFLICTS:=$(filter-out eapol-test-openssl ,$(EAPOL_TEST_PROVIDERS))
--  DEPENDS+=+libopenssl
--  PROVIDES:=eapol-test
--endef
--
--define Package/eapol-test-wolfssl
--  $(call Package/eapol-test/Default,$(1))
--  TITLE+= (wolfSSL full)
--  VARIANT:=supplicant-full-wolfssl
--  CONFLICTS:=$(filter-out eapol-test-openssl ,$(filter-out eapol-test-wolfssl ,$(EAPOL_TEST_PROVIDERS)))
--  DEPENDS+=+libwolfssl
--  PROVIDES:=eapol-test
--endef
--
--
--ifneq ($(wildcard $(PKG_BUILD_DIR)/.config_*),$(subst .configured_,.config_,$(STAMP_CONFIGURED)))
--  define Build/Configure/rebuild
--	$(FIND) $(PKG_BUILD_DIR) -name \*.o -or -name \*.a | $(XARGS) rm -f
--	rm -f $(PKG_BUILD_DIR)/hostapd/hostapd
--	rm -f $(PKG_BUILD_DIR)/wpa_supplicant/wpa_supplicant
--	rm -f $(PKG_BUILD_DIR)/.config_*
--	touch $(subst .configured_,.config_,$(STAMP_CONFIGURED))
--  endef
--endif
--
--define Build/Configure
--	$(Build/Configure/rebuild)
--	$(if $(wildcard ./files/hostapd-$(CONFIG_VARIANT).config), \
--		$(CP) ./files/hostapd-$(CONFIG_VARIANT).config $(PKG_BUILD_DIR)/hostapd/.config \
--	)
--	$(if $(wildcard ./files/wpa_supplicant-$(CONFIG_VARIANT).config), \
--		$(CP) ./files/wpa_supplicant-$(CONFIG_VARIANT).config $(PKG_BUILD_DIR)/wpa_supplicant/.config
--	)
--endef
--
--TARGET_CPPFLAGS := \
--	-I$(STAGING_DIR)/usr/include/libnl-tiny \
--	-I$(PKG_BUILD_DIR)/src/crypto \
--	$(TARGET_CPPFLAGS) \
--	-DCONFIG_LIBNL20 \
--	-D_GNU_SOURCE \
--	$(if $(CONFIG_WPA_MSG_MIN_PRIORITY),-DCONFIG_MSG_MIN_PRIORITY=$(CONFIG_WPA_MSG_MIN_PRIORITY))
--
--TARGET_CFLAGS += -ffunction-sections -fdata-sections -flto
--TARGET_LDFLAGS += -Wl,--gc-sections -flto=jobserver -fuse-linker-plugin -lubox -lubus
--
--ifdef CONFIG_PACKAGE_kmod-cfg80211
--  TARGET_LDFLAGS += -lm -lnl-tiny
--endif
--
--ifdef CONFIG_WPA_ENABLE_WEP
--    DRIVER_MAKEOPTS += CONFIG_WEP=y
--endif
--
--define Build/RunMake
--	CFLAGS="$(TARGET_CPPFLAGS) $(TARGET_CFLAGS)" \
--	$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR)/$(1) \
--		$(TARGET_CONFIGURE_OPTS) \
--		$(DRIVER_MAKEOPTS) \
--		LIBS="$(TARGET_LDFLAGS)" \
--		LIBS_c="$(TARGET_LDFLAGS_C)" \
--		AR="$(TARGET_CROSS)gcc-ar" \
--		BCHECK= \
--		$(2)
--endef
--
--define Build/Compile/wpad
--	echo ` \
--		$(call Build/RunMake,hostapd,-s MULTICALL=1 dump_cflags); \
--		$(call Build/RunMake,wpa_supplicant,-s MULTICALL=1 dump_cflags) | \
--		sed -e 's,-n ,,g' -e 's^$(TARGET_CFLAGS)^^' \
--	` > $(PKG_BUILD_DIR)/.cflags
--	sed -i 's/"/\\"/g' $(PKG_BUILD_DIR)/.cflags
--	+$(call Build/RunMake,hostapd, \
--		CFLAGS="$$$$(cat $(PKG_BUILD_DIR)/.cflags)" \
--		MULTICALL=1 \
--		hostapd_cli hostapd_multi.a \
--	)
--	+$(call Build/RunMake,wpa_supplicant, \
--		CFLAGS="$$$$(cat $(PKG_BUILD_DIR)/.cflags)" \
--		MULTICALL=1 \
--		wpa_cli wpa_supplicant_multi.a \
--	)
--	+export MAKEFLAGS="$(MAKE_JOBSERVER)"; $(TARGET_CC) -o $(PKG_BUILD_DIR)/wpad \
--		$(TARGET_CFLAGS) \
--		./files/multicall.c \
--		$(PKG_BUILD_DIR)/hostapd/hostapd_multi.a \
--		$(PKG_BUILD_DIR)/wpa_supplicant/wpa_supplicant_multi.a \
--		$(TARGET_LDFLAGS)
--endef
--
--define Build/Compile/hostapd
--	+$(call Build/RunMake,hostapd, \
--		hostapd hostapd_cli \
--	)
--endef
--
--define Build/Compile/supplicant
--	+$(call Build/RunMake,wpa_supplicant, \
--		wpa_cli wpa_supplicant \
--	)
--endef
--
--define Build/Compile/supplicant-full-internal
--	+$(call Build/RunMake,wpa_supplicant, \
--		eapol_test \
--	)
--endef
--
--define Build/Compile/supplicant-full-openssl
--	+$(call Build/RunMake,wpa_supplicant, \
--		eapol_test \
--	)
--endef
--
--define Build/Compile/supplicant-full-wolfssl
--	+$(call Build/RunMake,wpa_supplicant, \
--		eapol_test \
--	)
--endef
--
--define Build/Compile
--	$(Build/Compile/$(LOCAL_TYPE))
--	$(Build/Compile/$(BUILD_VARIANT))
--endef
--
--define Install/hostapd
--	$(INSTALL_DIR) $(1)/usr/sbin
--endef
--
--define Install/supplicant
--	$(INSTALL_DIR) $(1)/usr/sbin
--endef
--
--define Package/hostapd-common/install
--	$(INSTALL_DIR) $(1)/etc/capabilities $(1)/etc/rc.button $(1)/etc/hotplug.d/ieee80211 $(1)/etc/init.d $(1)/lib/netifd  $(1)/usr/share/acl.d
--	$(INSTALL_DATA) ./files/hostapd.sh $(1)/lib/netifd/hostapd.sh
--	$(INSTALL_BIN) ./files/wpad.init $(1)/etc/init.d/wpad
--	$(INSTALL_BIN) ./files/wps-hotplug.sh $(1)/etc/rc.button/wps
--	$(INSTALL_DATA) ./files/wpad_acl.json $(1)/usr/share/acl.d
--	$(INSTALL_DATA) ./files/wpad.json $(1)/etc/capabilities
--endef
--
--define Package/hostapd/install
--	$(call Install/hostapd,$(1))
--	$(INSTALL_BIN) $(PKG_BUILD_DIR)/hostapd/hostapd $(1)/usr/sbin/
--endef
--Package/hostapd-basic/install = $(Package/hostapd/install)
--Package/hostapd-basic-openssl/install = $(Package/hostapd/install)
--Package/hostapd-basic-wolfssl/install = $(Package/hostapd/install)
--Package/hostapd-mini/install = $(Package/hostapd/install)
--Package/hostapd-openssl/install = $(Package/hostapd/install)
--Package/hostapd-wolfssl/install = $(Package/hostapd/install)
--
--ifneq ($(LOCAL_TYPE),supplicant)
--  define Package/hostapd-utils/install
--	$(INSTALL_DIR) $(1)/usr/sbin
--	$(INSTALL_BIN) $(PKG_BUILD_DIR)/hostapd/hostapd_cli $(1)/usr/sbin/
--  endef
--endif
--
--define Package/wpad/install
--	$(call Install/hostapd,$(1))
--	$(call Install/supplicant,$(1))
--	$(INSTALL_BIN) $(PKG_BUILD_DIR)/wpad $(1)/usr/sbin/
--	$(LN) wpad $(1)/usr/sbin/hostapd
--	$(LN) wpad $(1)/usr/sbin/wpa_supplicant
--endef
--Package/wpad-basic/install = $(Package/wpad/install)
--Package/wpad-basic-openssl/install = $(Package/wpad/install)
--Package/wpad-basic-wolfssl/install = $(Package/wpad/install)
--Package/wpad-mini/install = $(Package/wpad/install)
--Package/wpad-openssl/install = $(Package/wpad/install)
--Package/wpad-wolfssl/install = $(Package/wpad/install)
--Package/wpad-mesh-openssl/install = $(Package/wpad/install)
--Package/wpad-mesh-wolfssl/install = $(Package/wpad/install)
--
--define Package/wpa-supplicant/install
--	$(call Install/supplicant,$(1))
--	$(INSTALL_BIN) $(PKG_BUILD_DIR)/wpa_supplicant/wpa_supplicant $(1)/usr/sbin/
--endef
--Package/wpa-supplicant-basic/install = $(Package/wpa-supplicant/install)
--Package/wpa-supplicant-mini/install = $(Package/wpa-supplicant/install)
--Package/wpa-supplicant-p2p/install = $(Package/wpa-supplicant/install)
--Package/wpa-supplicant-openssl/install = $(Package/wpa-supplicant/install)
--Package/wpa-supplicant-wolfssl/install = $(Package/wpa-supplicant/install)
--Package/wpa-supplicant-mesh-openssl/install = $(Package/wpa-supplicant/install)
--Package/wpa-supplicant-mesh-wolfssl/install = $(Package/wpa-supplicant/install)
--
--ifneq ($(LOCAL_TYPE),hostapd)
--  define Package/wpa-cli/install
--	$(INSTALL_DIR) $(1)/usr/sbin
--	$(CP) $(PKG_BUILD_DIR)/wpa_supplicant/wpa_cli $(1)/usr/sbin/
--  endef
--endif
--
--ifeq ($(BUILD_VARIANT),supplicant-full-internal)
--  define Package/eapol-test/install
--	$(INSTALL_DIR) $(1)/usr/sbin
--	$(CP) $(PKG_BUILD_DIR)/wpa_supplicant/eapol_test $(1)/usr/sbin/
--  endef
--endif
--
--ifeq ($(BUILD_VARIANT),supplicant-full-openssl)
--  define Package/eapol-test-openssl/install
--	$(INSTALL_DIR) $(1)/usr/sbin
--	$(CP) $(PKG_BUILD_DIR)/wpa_supplicant/eapol_test $(1)/usr/sbin/
--  endef
--endif
--
--ifeq ($(BUILD_VARIANT),supplicant-full-wolfssl)
--  define Package/eapol-test-wolfssl/install
--	$(INSTALL_DIR) $(1)/usr/sbin
--	$(CP) $(PKG_BUILD_DIR)/wpa_supplicant/eapol_test $(1)/usr/sbin/
--  endef
--endif
--
--$(eval $(call BuildPackage,hostapd))
--$(eval $(call BuildPackage,hostapd-basic))
--$(eval $(call BuildPackage,hostapd-basic-openssl))
--$(eval $(call BuildPackage,hostapd-basic-wolfssl))
--$(eval $(call BuildPackage,hostapd-mini))
--$(eval $(call BuildPackage,hostapd-openssl))
--$(eval $(call BuildPackage,hostapd-wolfssl))
--$(eval $(call BuildPackage,wpad))
--$(eval $(call BuildPackage,wpad-mesh-openssl))
--$(eval $(call BuildPackage,wpad-mesh-wolfssl))
--$(eval $(call BuildPackage,wpad-basic))
--$(eval $(call BuildPackage,wpad-basic-openssl))
--$(eval $(call BuildPackage,wpad-basic-wolfssl))
--$(eval $(call BuildPackage,wpad-mini))
--$(eval $(call BuildPackage,wpad-openssl))
--$(eval $(call BuildPackage,wpad-wolfssl))
--$(eval $(call BuildPackage,wpa-supplicant))
--$(eval $(call BuildPackage,wpa-supplicant-mesh-openssl))
--$(eval $(call BuildPackage,wpa-supplicant-mesh-wolfssl))
--$(eval $(call BuildPackage,wpa-supplicant-basic))
--$(eval $(call BuildPackage,wpa-supplicant-mini))
--$(eval $(call BuildPackage,wpa-supplicant-p2p))
--$(eval $(call BuildPackage,wpa-supplicant-openssl))
--$(eval $(call BuildPackage,wpa-supplicant-wolfssl))
--$(eval $(call BuildPackage,wpa-cli))
--$(eval $(call BuildPackage,hostapd-utils))
--$(eval $(call BuildPackage,hostapd-common))
--$(eval $(call BuildPackage,eapol-test))
--$(eval $(call BuildPackage,eapol-test-openssl))
--$(eval $(call BuildPackage,eapol-test-wolfssl))
-diff --git a/package/network/services/hostapd/files/hostapd-basic.config b/package/network/services/hostapd/files/hostapd-basic.config
-deleted file mode 100644
-index 33c38192b1..0000000000
---- a/package/network/services/hostapd/files/hostapd-basic.config
-+++ /dev/null
-@@ -1,401 +0,0 @@
--# Example hostapd build time configuration
--#
--# This file lists the configuration options that are used when building the
--# hostapd binary. All lines starting with # are ignored. Configuration option
--# lines must be commented out complete, if they are not to be included, i.e.,
--# just setting VARIABLE=n is not disabling that variable.
--#
--# This file is included in Makefile, so variables like CFLAGS and LIBS can also
--# be modified from here. In most cass, these lines should use += in order not
--# to override previous values of the variables.
--
--# Driver interface for Host AP driver
--#CONFIG_DRIVER_HOSTAP=y
--
--# Driver interface for wired authenticator
--CONFIG_DRIVER_WIRED=y
--
--# Driver interface for drivers using the nl80211 kernel interface
--CONFIG_DRIVER_NL80211=y
--
--# QCA vendor extensions to nl80211
--#CONFIG_DRIVER_NL80211_QCA=y
--
--# driver_nl80211.c requires libnl. If you are compiling it yourself
--# you may need to point hostapd to your version of libnl.
--#
--#CFLAGS += -I$<path to libnl include files>
--#LIBS += -L$<path to libnl library files>
--
--# Use libnl v2.0 (or 3.0) libraries.
--#CONFIG_LIBNL20=y
--
--# Use libnl 3.2 libraries (if this is selected, CONFIG_LIBNL20 is ignored)
--#CONFIG_LIBNL32=y
--
--
--# Driver interface for FreeBSD net80211 layer (e.g., Atheros driver)
--#CONFIG_DRIVER_BSD=y
--#CFLAGS += -I/usr/local/include
--#LIBS += -L/usr/local/lib
--#LIBS_p += -L/usr/local/lib
--#LIBS_c += -L/usr/local/lib
--
--# Driver interface for no driver (e.g., RADIUS server only)
--#CONFIG_DRIVER_NONE=y
--
--# IEEE 802.11F/IAPP
--#CONFIG_IAPP=y
--
--# WPA2/IEEE 802.11i RSN pre-authentication
--CONFIG_RSN_PREAUTH=y
--
--# IEEE 802.11w (management frame protection)
--#CONFIG_IEEE80211W=y
--
--# Support Operating Channel Validation
--#CONFIG_OCV=y
--
--# Integrated EAP server
--#CONFIG_EAP=y
--
--# EAP Re-authentication Protocol (ERP) in integrated EAP server
--#CONFIG_ERP=y
--
--# EAP-MD5 for the integrated EAP server
--#CONFIG_EAP_MD5=y
--
--# EAP-TLS for the integrated EAP server
--#CONFIG_EAP_TLS=y
--
--# EAP-MSCHAPv2 for the integrated EAP server
--#CONFIG_EAP_MSCHAPV2=y
--
--# EAP-PEAP for the integrated EAP server
--#CONFIG_EAP_PEAP=y
--
--# EAP-GTC for the integrated EAP server
--#CONFIG_EAP_GTC=y
--
--# EAP-TTLS for the integrated EAP server
--#CONFIG_EAP_TTLS=y
--
--# EAP-SIM for the integrated EAP server
--#CONFIG_EAP_SIM=y
--
--# EAP-AKA for the integrated EAP server
--#CONFIG_EAP_AKA=y
--
--# EAP-AKA' for the integrated EAP server
--# This requires CONFIG_EAP_AKA to be enabled, too.
--#CONFIG_EAP_AKA_PRIME=y
--
--# EAP-PAX for the integrated EAP server
--#CONFIG_EAP_PAX=y
--
--# EAP-PSK for the integrated EAP server (this is _not_ needed for WPA-PSK)
--#CONFIG_EAP_PSK=y
--
--# EAP-pwd for the integrated EAP server (secure authentication with a password)
--#CONFIG_EAP_PWD=y
--
--# EAP-SAKE for the integrated EAP server
--#CONFIG_EAP_SAKE=y
--
--# EAP-GPSK for the integrated EAP server
--#CONFIG_EAP_GPSK=y
--# Include support for optional SHA256 cipher suite in EAP-GPSK
--#CONFIG_EAP_GPSK_SHA256=y
--
--# EAP-FAST for the integrated EAP server
--#CONFIG_EAP_FAST=y
--
--# EAP-TEAP for the integrated EAP server
--# Note: The current EAP-TEAP implementation is experimental and should not be
--# enabled for production use. The IETF RFC 7170 that defines EAP-TEAP has number
--# of conflicting statements and missing details and the implementation has
--# vendor specific workarounds for those and as such, may not interoperate with
--# any other implementation. This should not be used for anything else than
--# experimentation and interoperability testing until those issues has been
--# resolved.
--#CONFIG_EAP_TEAP=y
--
--# Wi-Fi Protected Setup (WPS)
--#CONFIG_WPS=y
--# Enable UPnP support for external WPS Registrars
--#CONFIG_WPS_UPNP=y
--# Enable WPS support with NFC config method
--#CONFIG_WPS_NFC=y
--
--# EAP-IKEv2
--#CONFIG_EAP_IKEV2=y
--
--# Trusted Network Connect (EAP-TNC)
--#CONFIG_EAP_TNC=y
--
--# EAP-EKE for the integrated EAP server
--#CONFIG_EAP_EKE=y
--
--# PKCS#12 (PFX) support (used to read private key and certificate file from
--# a file that usually has extension .p12 or .pfx)
--#CONFIG_PKCS12=y
--
--# RADIUS authentication server. This provides access to the integrated EAP
--# server from external hosts using RADIUS.
--#CONFIG_RADIUS_SERVER=y
--
--# Build IPv6 support for RADIUS operations
--#CONFIG_IPV6=y
--
--# IEEE Std 802.11r-2008 (Fast BSS Transition)
--CONFIG_IEEE80211R=y
--
--# Use the hostapd's IEEE 802.11 authentication (ACL), but without
--# the IEEE 802.11 Management capability (e.g., FreeBSD/net80211)
--#CONFIG_DRIVER_RADIUS_ACL=y
--
--# IEEE 802.11n (High Throughput) support
--CONFIG_IEEE80211N=y
--
--# Wireless Network Management (IEEE Std 802.11v-2011)
--# Note: This is experimental and not complete implementation.
--#CONFIG_WNM=y
--
--# IEEE 802.11ac (Very High Throughput) support
--CONFIG_IEEE80211AC=y
--
--# IEEE 802.11ax HE support
--# Note: This is experimental and work in progress. The definitions are still
--# subject to change and this should not be expected to interoperate with the
--# final IEEE 802.11ax version.
--#CONFIG_IEEE80211AX=y
--
--# Remove debugging code that is printing out debug messages to stdout.
--# This can be used to reduce the size of the hostapd considerably if debugging
--# code is not needed.
--#CONFIG_NO_STDOUT_DEBUG=y
--
--# Add support for writing debug log to a file: -f /tmp/hostapd.log
--# Disabled by default.
--#CONFIG_DEBUG_FILE=y
--
--# Send debug messages to syslog instead of stdout
--CONFIG_DEBUG_SYSLOG=y
--
--# Add support for sending all debug messages (regardless of debug verbosity)
--# to the Linux kernel tracing facility. This helps debug the entire stack by
--# making it easy to record everything happening from the driver up into the
--# same file, e.g., using trace-cmd.
--#CONFIG_DEBUG_LINUX_TRACING=y
--
--# Remove support for RADIUS accounting
--CONFIG_NO_ACCOUNTING=y
--
--# Remove support for RADIUS
--CONFIG_NO_RADIUS=y
--
--# Remove support for VLANs
--#CONFIG_NO_VLAN=y
--
--# Enable support for fully dynamic VLANs. This enables hostapd to
--# automatically create bridge and VLAN interfaces if necessary.
--#CONFIG_FULL_DYNAMIC_VLAN=y
--
--# Use netlink-based kernel API for VLAN operations instead of ioctl()
--# Note: This requires libnl 3.1 or newer.
--#CONFIG_VLAN_NETLINK=y
--
--# Remove support for dumping internal state through control interface commands
--# This can be used to reduce binary size at the cost of disabling a debugging
--# option.
--CONFIG_NO_DUMP_STATE=y
--
--# Enable tracing code for developer debugging
--# This tracks use of memory allocations and other registrations and reports
--# incorrect use with a backtrace of call (or allocation) location.
--#CONFIG_WPA_TRACE=y
--# For BSD, comment out these.
--#LIBS += -lexecinfo
--#LIBS_p += -lexecinfo
--#LIBS_c += -lexecinfo
--
--# Use libbfd to get more details for developer debugging
--# This enables use of libbfd to get more detailed symbols for the backtraces
--# generated by CONFIG_WPA_TRACE=y.
--#CONFIG_WPA_TRACE_BFD=y
--# For BSD, comment out these.
--#LIBS += -lbfd -liberty -lz
--#LIBS_p += -lbfd -liberty -lz
--#LIBS_c += -lbfd -liberty -lz
--
--# hostapd depends on strong random number generation being available from the
--# operating system. os_get_random() function is used to fetch random data when
--# needed, e.g., for key generation. On Linux and BSD systems, this works by
--# reading /dev/urandom. It should be noted that the OS entropy pool needs to be
--# properly initialized before hostapd is started. This is important especially
--# on embedded devices that do not have a hardware random number generator and
--# may by default start up with minimal entropy available for random number
--# generation.
--#
--# As a safety net, hostapd is by default trying to internally collect
--# additional entropy for generating random data to mix in with the data
--# fetched from the OS. This by itself is not considered to be very strong, but
--# it may help in cases where the system pool is not initialized properly.
--# However, it is very strongly recommended that the system pool is initialized
--# with enough entropy either by using hardware assisted random number
--# generator or by storing state over device reboots.
--#
--# hostapd can be configured to maintain its own entropy store over restarts to
--# enhance random number generation. This is not perfect, but it is much more
--# secure than using the same sequence of random numbers after every reboot.
--# This can be enabled with -e<entropy file> command line option. The specified
--# file needs to be readable and writable by hostapd.
--#
--# If the os_get_random() is known to provide strong random data (e.g., on
--# Linux/BSD, the board in question is known to have reliable source of random
--# data from /dev/urandom), the internal hostapd random pool can be disabled.
--# This will save some in binary size and CPU use. However, this should only be
--# considered for builds that are known to be used on devices that meet the
--# requirements described above.
--CONFIG_NO_RANDOM_POOL=y
--
--# Should we attempt to use the getrandom(2) call that provides more reliable
--# yet secure randomness source than /dev/random on Linux 3.17 and newer.
--# Requires glibc 2.25 to build, falls back to /dev/random if unavailable.
--CONFIG_GETRANDOM=y
--
--# Should we use poll instead of select? Select is used by default.
--#CONFIG_ELOOP_POLL=y
--
--# Should we use epoll instead of select? Select is used by default.
--CONFIG_ELOOP_EPOLL=y
--
--# Should we use kqueue instead of select? Select is used by default.
--#CONFIG_ELOOP_KQUEUE=y
--
--# Select TLS implementation
--# openssl = OpenSSL (default)
--# gnutls = GnuTLS
--# internal = Internal TLSv1 implementation (experimental)
--# linux = Linux kernel AF_ALG and internal TLSv1 implementation (experimental)
--# none = Empty template
--CONFIG_TLS=internal
--
--# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.1)
--# can be enabled to get a stronger construction of messages when block ciphers
--# are used.
--#CONFIG_TLSV11=y
--
--# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.2)
--# can be enabled to enable use of stronger crypto algorithms.
--#CONFIG_TLSV12=y
--
--# Select which ciphers to use by default with OpenSSL if the user does not
--# specify them.
--#CONFIG_TLS_DEFAULT_CIPHERS="DEFAULT:!EXP:!LOW"
--
--# If CONFIG_TLS=internal is used, additional library and include paths are
--# needed for LibTomMath. Alternatively, an integrated, minimal version of
--# LibTomMath can be used. See beginning of libtommath.c for details on benefits
--# and drawbacks of this option.
--#CONFIG_INTERNAL_LIBTOMMATH=y
--#ifndef CONFIG_INTERNAL_LIBTOMMATH
--#LTM_PATH=/usr/src/libtommath-0.39
--#CFLAGS += -I$(LTM_PATH)
--#LIBS += -L$(LTM_PATH)
--#LIBS_p += -L$(LTM_PATH)
--#endif
--# At the cost of about 4 kB of additional binary size, the internal LibTomMath
--# can be configured to include faster routines for exptmod, sqr, and div to
--# speed up DH and RSA calculation considerably
--#CONFIG_INTERNAL_LIBTOMMATH_FAST=y
--
--# Interworking (IEEE 802.11u)
--# This can be used to enable functionality to improve interworking with
--# external networks.
--#CONFIG_INTERWORKING=y
--
--# Hotspot 2.0
--#CONFIG_HS20=y
--
--# Enable SQLite database support in hlr_auc_gw, EAP-SIM DB, and eap_user_file
--#CONFIG_SQLITE=y
--
--# Enable Fast Session Transfer (FST)
--#CONFIG_FST=y
--
--# Enable CLI commands for FST testing
--#CONFIG_FST_TEST=y
--
--# Testing options
--# This can be used to enable some testing options (see also the example
--# configuration file) that are really useful only for testing clients that
--# connect to this hostapd. These options allow, for example, to drop a
--# certain percentage of probe requests or auth/(re)assoc frames.
--#
--#CONFIG_TESTING_OPTIONS=y
--
--# Automatic Channel Selection
--# This will allow hostapd to pick the channel automatically when channel is set
--# to "acs_survey" or "0". Eventually, other ACS algorithms can be added in
--# similar way.
--#
--# Automatic selection is currently only done through initialization, later on
--# we hope to do background checks to keep us moving to more ideal channels as
--# time goes by. ACS is currently only supported through the nl80211 driver and
--# your driver must have survey dump capability that is filled by the driver
--# during scanning.
--#
--# You can customize the ACS survey algorithm with the hostapd.conf variable
--# acs_num_scans.
--#
--# Supported ACS drivers:
--# * ath9k
--# * ath5k
--# * ath10k
--#
--# For more details refer to:
--# http://wireless.kernel.org/en/users/Documentation/acs
--#
--#CONFIG_ACS=y
--
--# Multiband Operation support
--# These extentions facilitate efficient use of multiple frequency bands
--# available to the AP and the devices that may associate with it.
--#CONFIG_MBO=y
--
--# Client Taxonomy
--# Has the AP retain the Probe Request and (Re)Association Request frames from
--# a client, from which a signature can be produced which can identify the model
--# of client device like "Nexus 6P" or "iPhone 5s".
--#CONFIG_TAXONOMY=y
--
--# Fast Initial Link Setup (FILS) (IEEE 802.11ai)
--#CONFIG_FILS=y
--# FILS shared key authentication with PFS
--#CONFIG_FILS_SK_PFS=y
--
--# Include internal line edit mode in hostapd_cli. This can be used to provide
--# limited command line editing and history support.
--#CONFIG_WPA_CLI_EDIT=y
--
--# Opportunistic Wireless Encryption (OWE)
--# Experimental implementation of draft-harkins-owe-07.txt
--#CONFIG_OWE=y
--
--# Airtime policy support
--CONFIG_AIRTIME_POLICY=y
--
--# Override default value for the wpa_disable_eapol_key_retries configuration
--# parameter. See that parameter in hostapd.conf for more details.
--#CFLAGS += -DDEFAULT_WPA_DISABLE_EAPOL_KEY_RETRIES=1
--
--# uBus IPC/RPC System
--# Services can connect to the bus and provide methods
--# that can be called by other services or clients.
--CONFIG_UBUS=y
--
--# OpenWrt patch 380-disable-ctrl-iface-mib.patch
--# leads to the MIB only being compiled in if
--# CONFIG_CTRL_IFACE_MIB is enabled.
--#CONFIG_CTRL_IFACE_MIB=y
-diff --git a/package/network/services/hostapd/files/hostapd-full.config b/package/network/services/hostapd/files/hostapd-full.config
-deleted file mode 100644
-index df272e443a..0000000000
---- a/package/network/services/hostapd/files/hostapd-full.config
-+++ /dev/null
-@@ -1,401 +0,0 @@
--# Example hostapd build time configuration
--#
--# This file lists the configuration options that are used when building the
--# hostapd binary. All lines starting with # are ignored. Configuration option
--# lines must be commented out complete, if they are not to be included, i.e.,
--# just setting VARIABLE=n is not disabling that variable.
--#
--# This file is included in Makefile, so variables like CFLAGS and LIBS can also
--# be modified from here. In most cass, these lines should use += in order not
--# to override previous values of the variables.
--
--# Driver interface for Host AP driver
--#CONFIG_DRIVER_HOSTAP=y
--
--# Driver interface for wired authenticator
--CONFIG_DRIVER_WIRED=y
--
--# Driver interface for drivers using the nl80211 kernel interface
--CONFIG_DRIVER_NL80211=y
--
--# QCA vendor extensions to nl80211
--#CONFIG_DRIVER_NL80211_QCA=y
--
--# driver_nl80211.c requires libnl. If you are compiling it yourself
--# you may need to point hostapd to your version of libnl.
--#
--#CFLAGS += -I$<path to libnl include files>
--#LIBS += -L$<path to libnl library files>
--
--# Use libnl v2.0 (or 3.0) libraries.
--#CONFIG_LIBNL20=y
--
--# Use libnl 3.2 libraries (if this is selected, CONFIG_LIBNL20 is ignored)
--#CONFIG_LIBNL32=y
--
--
--# Driver interface for FreeBSD net80211 layer (e.g., Atheros driver)
--#CONFIG_DRIVER_BSD=y
--#CFLAGS += -I/usr/local/include
--#LIBS += -L/usr/local/lib
--#LIBS_p += -L/usr/local/lib
--#LIBS_c += -L/usr/local/lib
--
--# Driver interface for no driver (e.g., RADIUS server only)
--#CONFIG_DRIVER_NONE=y
--
--# IEEE 802.11F/IAPP
--CONFIG_IAPP=y
--
--# WPA2/IEEE 802.11i RSN pre-authentication
--CONFIG_RSN_PREAUTH=y
--
--# IEEE 802.11w (management frame protection)
--#CONFIG_IEEE80211W=y
--
--# Support Operating Channel Validation
--#CONFIG_OCV=y
--
--# Integrated EAP server
--CONFIG_EAP=y
--
--# EAP Re-authentication Protocol (ERP) in integrated EAP server
--#CONFIG_ERP=y
--
--# EAP-MD5 for the integrated EAP server
--CONFIG_EAP_MD5=y
--
--# EAP-TLS for the integrated EAP server
--CONFIG_EAP_TLS=y
--
--# EAP-MSCHAPv2 for the integrated EAP server
--CONFIG_EAP_MSCHAPV2=y
--
--# EAP-PEAP for the integrated EAP server
--CONFIG_EAP_PEAP=y
--
--# EAP-GTC for the integrated EAP server
--CONFIG_EAP_GTC=y
--
--# EAP-TTLS for the integrated EAP server
--CONFIG_EAP_TTLS=y
--
--# EAP-SIM for the integrated EAP server
--#CONFIG_EAP_SIM=y
--
--# EAP-AKA for the integrated EAP server
--#CONFIG_EAP_AKA=y
--
--# EAP-AKA' for the integrated EAP server
--# This requires CONFIG_EAP_AKA to be enabled, too.
--#CONFIG_EAP_AKA_PRIME=y
--
--# EAP-PAX for the integrated EAP server
--#CONFIG_EAP_PAX=y
--
--# EAP-PSK for the integrated EAP server (this is _not_ needed for WPA-PSK)
--#CONFIG_EAP_PSK=y
--
--# EAP-pwd for the integrated EAP server (secure authentication with a password)
--#CONFIG_EAP_PWD=y
--
--# EAP-SAKE for the integrated EAP server
--#CONFIG_EAP_SAKE=y
--
--# EAP-GPSK for the integrated EAP server
--#CONFIG_EAP_GPSK=y
--# Include support for optional SHA256 cipher suite in EAP-GPSK
--#CONFIG_EAP_GPSK_SHA256=y
--
--# EAP-FAST for the integrated EAP server
--CONFIG_EAP_FAST=y
--
--# EAP-TEAP for the integrated EAP server
--# Note: The current EAP-TEAP implementation is experimental and should not be
--# enabled for production use. The IETF RFC 7170 that defines EAP-TEAP has number
--# of conflicting statements and missing details and the implementation has
--# vendor specific workarounds for those and as such, may not interoperate with
--# any other implementation. This should not be used for anything else than
--# experimentation and interoperability testing until those issues has been
--# resolved.
--#CONFIG_EAP_TEAP=y
--
--# Wi-Fi Protected Setup (WPS)
--CONFIG_WPS=y
--# Enable UPnP support for external WPS Registrars
--#CONFIG_WPS_UPNP=y
--# Enable WPS support with NFC config method
--#CONFIG_WPS_NFC=y
--
--# EAP-IKEv2
--#CONFIG_EAP_IKEV2=y
--
--# Trusted Network Connect (EAP-TNC)
--#CONFIG_EAP_TNC=y
--
--# EAP-EKE for the integrated EAP server
--#CONFIG_EAP_EKE=y
--
--# PKCS#12 (PFX) support (used to read private key and certificate file from
--# a file that usually has extension .p12 or .pfx)
--CONFIG_PKCS12=y
--
--# RADIUS authentication server. This provides access to the integrated EAP
--# server from external hosts using RADIUS.
--#CONFIG_RADIUS_SERVER=y
--
--# Build IPv6 support for RADIUS operations
--CONFIG_IPV6=y
--
--# IEEE Std 802.11r-2008 (Fast BSS Transition)
--CONFIG_IEEE80211R=y
--
--# Use the hostapd's IEEE 802.11 authentication (ACL), but without
--# the IEEE 802.11 Management capability (e.g., FreeBSD/net80211)
--#CONFIG_DRIVER_RADIUS_ACL=y
--
--# IEEE 802.11n (High Throughput) support
--CONFIG_IEEE80211N=y
--
--# Wireless Network Management (IEEE Std 802.11v-2011)
--# Note: This is experimental and not complete implementation.
--CONFIG_WNM=y
--
--# IEEE 802.11ac (Very High Throughput) support
--CONFIG_IEEE80211AC=y
--
--# IEEE 802.11ax HE support
--# Note: This is experimental and work in progress. The definitions are still
--# subject to change and this should not be expected to interoperate with the
--# final IEEE 802.11ax version.
--#CONFIG_IEEE80211AX=y
--
--# Remove debugging code that is printing out debug messages to stdout.
--# This can be used to reduce the size of the hostapd considerably if debugging
--# code is not needed.
--#CONFIG_NO_STDOUT_DEBUG=y
--
--# Add support for writing debug log to a file: -f /tmp/hostapd.log
--# Disabled by default.
--#CONFIG_DEBUG_FILE=y
--
--# Send debug messages to syslog instead of stdout
--CONFIG_DEBUG_SYSLOG=y
--
--# Add support for sending all debug messages (regardless of debug verbosity)
--# to the Linux kernel tracing facility. This helps debug the entire stack by
--# making it easy to record everything happening from the driver up into the
--# same file, e.g., using trace-cmd.
--#CONFIG_DEBUG_LINUX_TRACING=y
--
--# Remove support for RADIUS accounting
--#CONFIG_NO_ACCOUNTING=y
--
--# Remove support for RADIUS
--#CONFIG_NO_RADIUS=y
--
--# Remove support for VLANs
--#CONFIG_NO_VLAN=y
--
--# Enable support for fully dynamic VLANs. This enables hostapd to
--# automatically create bridge and VLAN interfaces if necessary.
--CONFIG_FULL_DYNAMIC_VLAN=y
--
--# Use netlink-based kernel API for VLAN operations instead of ioctl()
--# Note: This requires libnl 3.1 or newer.
--#CONFIG_VLAN_NETLINK=y
--
--# Remove support for dumping internal state through control interface commands
--# This can be used to reduce binary size at the cost of disabling a debugging
--# option.
--CONFIG_NO_DUMP_STATE=y
--
--# Enable tracing code for developer debugging
--# This tracks use of memory allocations and other registrations and reports
--# incorrect use with a backtrace of call (or allocation) location.
--#CONFIG_WPA_TRACE=y
--# For BSD, comment out these.
--#LIBS += -lexecinfo
--#LIBS_p += -lexecinfo
--#LIBS_c += -lexecinfo
--
--# Use libbfd to get more details for developer debugging
--# This enables use of libbfd to get more detailed symbols for the backtraces
--# generated by CONFIG_WPA_TRACE=y.
--#CONFIG_WPA_TRACE_BFD=y
--# For BSD, comment out these.
--#LIBS += -lbfd -liberty -lz
--#LIBS_p += -lbfd -liberty -lz
--#LIBS_c += -lbfd -liberty -lz
--
--# hostapd depends on strong random number generation being available from the
--# operating system. os_get_random() function is used to fetch random data when
--# needed, e.g., for key generation. On Linux and BSD systems, this works by
--# reading /dev/urandom. It should be noted that the OS entropy pool needs to be
--# properly initialized before hostapd is started. This is important especially
--# on embedded devices that do not have a hardware random number generator and
--# may by default start up with minimal entropy available for random number
--# generation.
--#
--# As a safety net, hostapd is by default trying to internally collect
--# additional entropy for generating random data to mix in with the data
--# fetched from the OS. This by itself is not considered to be very strong, but
--# it may help in cases where the system pool is not initialized properly.
--# However, it is very strongly recommended that the system pool is initialized
--# with enough entropy either by using hardware assisted random number
--# generator or by storing state over device reboots.
--#
--# hostapd can be configured to maintain its own entropy store over restarts to
--# enhance random number generation. This is not perfect, but it is much more
--# secure than using the same sequence of random numbers after every reboot.
--# This can be enabled with -e<entropy file> command line option. The specified
--# file needs to be readable and writable by hostapd.
--#
--# If the os_get_random() is known to provide strong random data (e.g., on
--# Linux/BSD, the board in question is known to have reliable source of random
--# data from /dev/urandom), the internal hostapd random pool can be disabled.
--# This will save some in binary size and CPU use. However, this should only be
--# considered for builds that are known to be used on devices that meet the
--# requirements described above.
--CONFIG_NO_RANDOM_POOL=y
--
--# Should we attempt to use the getrandom(2) call that provides more reliable
--# yet secure randomness source than /dev/random on Linux 3.17 and newer.
--# Requires glibc 2.25 to build, falls back to /dev/random if unavailable.
--CONFIG_GETRANDOM=y
--
--# Should we use poll instead of select? Select is used by default.
--#CONFIG_ELOOP_POLL=y
--
--# Should we use epoll instead of select? Select is used by default.
--CONFIG_ELOOP_EPOLL=y
--
--# Should we use kqueue instead of select? Select is used by default.
--#CONFIG_ELOOP_KQUEUE=y
--
--# Select TLS implementation
--# openssl = OpenSSL (default)
--# gnutls = GnuTLS
--# internal = Internal TLSv1 implementation (experimental)
--# linux = Linux kernel AF_ALG and internal TLSv1 implementation (experimental)
--# none = Empty template
--CONFIG_TLS=internal
--
--# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.1)
--# can be enabled to get a stronger construction of messages when block ciphers
--# are used.
--#CONFIG_TLSV11=y
--
--# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.2)
--# can be enabled to enable use of stronger crypto algorithms.
--#CONFIG_TLSV12=y
--
--# Select which ciphers to use by default with OpenSSL if the user does not
--# specify them.
--#CONFIG_TLS_DEFAULT_CIPHERS="DEFAULT:!EXP:!LOW"
--
--# If CONFIG_TLS=internal is used, additional library and include paths are
--# needed for LibTomMath. Alternatively, an integrated, minimal version of
--# LibTomMath can be used. See beginning of libtommath.c for details on benefits
--# and drawbacks of this option.
--CONFIG_INTERNAL_LIBTOMMATH=y
--#ifndef CONFIG_INTERNAL_LIBTOMMATH
--#LTM_PATH=/usr/src/libtommath-0.39
--#CFLAGS += -I$(LTM_PATH)
--#LIBS += -L$(LTM_PATH)
--#LIBS_p += -L$(LTM_PATH)
--#endif
--# At the cost of about 4 kB of additional binary size, the internal LibTomMath
--# can be configured to include faster routines for exptmod, sqr, and div to
--# speed up DH and RSA calculation considerably
--#CONFIG_INTERNAL_LIBTOMMATH_FAST=y
--
--# Interworking (IEEE 802.11u)
--# This can be used to enable functionality to improve interworking with
--# external networks.
--CONFIG_INTERWORKING=y
--
--# Hotspot 2.0
--#CONFIG_HS20=y
--
--# Enable SQLite database support in hlr_auc_gw, EAP-SIM DB, and eap_user_file
--#CONFIG_SQLITE=y
--
--# Enable Fast Session Transfer (FST)
--#CONFIG_FST=y
--
--# Enable CLI commands for FST testing
--#CONFIG_FST_TEST=y
--
--# Testing options
--# This can be used to enable some testing options (see also the example
--# configuration file) that are really useful only for testing clients that
--# connect to this hostapd. These options allow, for example, to drop a
--# certain percentage of probe requests or auth/(re)assoc frames.
--#
--#CONFIG_TESTING_OPTIONS=y
--
--# Automatic Channel Selection
--# This will allow hostapd to pick the channel automatically when channel is set
--# to "acs_survey" or "0". Eventually, other ACS algorithms can be added in
--# similar way.
--#
--# Automatic selection is currently only done through initialization, later on
--# we hope to do background checks to keep us moving to more ideal channels as
--# time goes by. ACS is currently only supported through the nl80211 driver and
--# your driver must have survey dump capability that is filled by the driver
--# during scanning.
--#
--# You can customize the ACS survey algorithm with the hostapd.conf variable
--# acs_num_scans.
--#
--# Supported ACS drivers:
--# * ath9k
--# * ath5k
--# * ath10k
--#
--# For more details refer to:
--# http://wireless.kernel.org/en/users/Documentation/acs
--#
--#CONFIG_ACS=y
--
--# Multiband Operation support
--# These extentions facilitate efficient use of multiple frequency bands
--# available to the AP and the devices that may associate with it.
--#CONFIG_MBO=y
--
--# Client Taxonomy
--# Has the AP retain the Probe Request and (Re)Association Request frames from
--# a client, from which a signature can be produced which can identify the model
--# of client device like "Nexus 6P" or "iPhone 5s".
--CONFIG_TAXONOMY=y
--
--# Fast Initial Link Setup (FILS) (IEEE 802.11ai)
--#CONFIG_FILS=y
--# FILS shared key authentication with PFS
--#CONFIG_FILS_SK_PFS=y
--
--# Include internal line edit mode in hostapd_cli. This can be used to provide
--# limited command line editing and history support.
--#CONFIG_WPA_CLI_EDIT=y
--
--# Opportunistic Wireless Encryption (OWE)
--# Experimental implementation of draft-harkins-owe-07.txt
--#CONFIG_OWE=y
--
--# Airtime policy support
--CONFIG_AIRTIME_POLICY=y
--
--# Override default value for the wpa_disable_eapol_key_retries configuration
--# parameter. See that parameter in hostapd.conf for more details.
--#CFLAGS += -DDEFAULT_WPA_DISABLE_EAPOL_KEY_RETRIES=1
--
--# uBus IPC/RPC System
--# Services can connect to the bus and provide methods
--# that can be called by other services or clients.
--CONFIG_UBUS=y
--
--# OpenWrt patch 380-disable-ctrl-iface-mib.patch
--# leads to the MIB only being compiled in if
--# CONFIG_CTRL_IFACE_MIB is enabled.
--CONFIG_CTRL_IFACE_MIB=y
-diff --git a/package/network/services/hostapd/files/hostapd-mini.config b/package/network/services/hostapd/files/hostapd-mini.config
-deleted file mode 100644
-index b3050f7bbc..0000000000
---- a/package/network/services/hostapd/files/hostapd-mini.config
-+++ /dev/null
-@@ -1,401 +0,0 @@
--# Example hostapd build time configuration
--#
--# This file lists the configuration options that are used when building the
--# hostapd binary. All lines starting with # are ignored. Configuration option
--# lines must be commented out complete, if they are not to be included, i.e.,
--# just setting VARIABLE=n is not disabling that variable.
--#
--# This file is included in Makefile, so variables like CFLAGS and LIBS can also
--# be modified from here. In most cass, these lines should use += in order not
--# to override previous values of the variables.
--
--# Driver interface for Host AP driver
--#CONFIG_DRIVER_HOSTAP=y
--
--# Driver interface for wired authenticator
--CONFIG_DRIVER_WIRED=y
--
--# Driver interface for drivers using the nl80211 kernel interface
--CONFIG_DRIVER_NL80211=y
--
--# QCA vendor extensions to nl80211
--#CONFIG_DRIVER_NL80211_QCA=y
--
--# driver_nl80211.c requires libnl. If you are compiling it yourself
--# you may need to point hostapd to your version of libnl.
--#
--#CFLAGS += -I$<path to libnl include files>
--#LIBS += -L$<path to libnl library files>
--
--# Use libnl v2.0 (or 3.0) libraries.
--#CONFIG_LIBNL20=y
--
--# Use libnl 3.2 libraries (if this is selected, CONFIG_LIBNL20 is ignored)
--#CONFIG_LIBNL32=y
--
--
--# Driver interface for FreeBSD net80211 layer (e.g., Atheros driver)
--#CONFIG_DRIVER_BSD=y
--#CFLAGS += -I/usr/local/include
--#LIBS += -L/usr/local/lib
--#LIBS_p += -L/usr/local/lib
--#LIBS_c += -L/usr/local/lib
--
--# Driver interface for no driver (e.g., RADIUS server only)
--#CONFIG_DRIVER_NONE=y
--
--# IEEE 802.11F/IAPP
--#CONFIG_IAPP=y
--
--# WPA2/IEEE 802.11i RSN pre-authentication
--CONFIG_RSN_PREAUTH=y
--
--# IEEE 802.11w (management frame protection)
--#CONFIG_IEEE80211W=y
--
--# Support Operating Channel Validation
--#CONFIG_OCV=y
--
--# Integrated EAP server
--#CONFIG_EAP=y
--
--# EAP Re-authentication Protocol (ERP) in integrated EAP server
--#CONFIG_ERP=y
--
--# EAP-MD5 for the integrated EAP server
--#CONFIG_EAP_MD5=y
--
--# EAP-TLS for the integrated EAP server
--#CONFIG_EAP_TLS=y
--
--# EAP-MSCHAPv2 for the integrated EAP server
--#CONFIG_EAP_MSCHAPV2=y
--
--# EAP-PEAP for the integrated EAP server
--#CONFIG_EAP_PEAP=y
--
--# EAP-GTC for the integrated EAP server
--#CONFIG_EAP_GTC=y
--
--# EAP-TTLS for the integrated EAP server
--#CONFIG_EAP_TTLS=y
--
--# EAP-SIM for the integrated EAP server
--#CONFIG_EAP_SIM=y
--
--# EAP-AKA for the integrated EAP server
--#CONFIG_EAP_AKA=y
--
--# EAP-AKA' for the integrated EAP server
--# This requires CONFIG_EAP_AKA to be enabled, too.
--#CONFIG_EAP_AKA_PRIME=y
--
--# EAP-PAX for the integrated EAP server
--#CONFIG_EAP_PAX=y
--
--# EAP-PSK for the integrated EAP server (this is _not_ needed for WPA-PSK)
--#CONFIG_EAP_PSK=y
--
--# EAP-pwd for the integrated EAP server (secure authentication with a password)
--#CONFIG_EAP_PWD=y
--
--# EAP-SAKE for the integrated EAP server
--#CONFIG_EAP_SAKE=y
--
--# EAP-GPSK for the integrated EAP server
--#CONFIG_EAP_GPSK=y
--# Include support for optional SHA256 cipher suite in EAP-GPSK
--#CONFIG_EAP_GPSK_SHA256=y
--
--# EAP-FAST for the integrated EAP server
--#CONFIG_EAP_FAST=y
--
--# EAP-TEAP for the integrated EAP server
--# Note: The current EAP-TEAP implementation is experimental and should not be
--# enabled for production use. The IETF RFC 7170 that defines EAP-TEAP has number
--# of conflicting statements and missing details and the implementation has
--# vendor specific workarounds for those and as such, may not interoperate with
--# any other implementation. This should not be used for anything else than
--# experimentation and interoperability testing until those issues has been
--# resolved.
--#CONFIG_EAP_TEAP=y
--
--# Wi-Fi Protected Setup (WPS)
--#CONFIG_WPS=y
--# Enable UPnP support for external WPS Registrars
--#CONFIG_WPS_UPNP=y
--# Enable WPS support with NFC config method
--#CONFIG_WPS_NFC=y
--
--# EAP-IKEv2
--#CONFIG_EAP_IKEV2=y
--
--# Trusted Network Connect (EAP-TNC)
--#CONFIG_EAP_TNC=y
--
--# EAP-EKE for the integrated EAP server
--#CONFIG_EAP_EKE=y
--
--# PKCS#12 (PFX) support (used to read private key and certificate file from
--# a file that usually has extension .p12 or .pfx)
--#CONFIG_PKCS12=y
--
--# RADIUS authentication server. This provides access to the integrated EAP
--# server from external hosts using RADIUS.
--#CONFIG_RADIUS_SERVER=y
--
--# Build IPv6 support for RADIUS operations
--#CONFIG_IPV6=y
--
--# IEEE Std 802.11r-2008 (Fast BSS Transition)
--#CONFIG_IEEE80211R=y
--
--# Use the hostapd's IEEE 802.11 authentication (ACL), but without
--# the IEEE 802.11 Management capability (e.g., FreeBSD/net80211)
--#CONFIG_DRIVER_RADIUS_ACL=y
--
--# IEEE 802.11n (High Throughput) support
--CONFIG_IEEE80211N=y
--
--# Wireless Network Management (IEEE Std 802.11v-2011)
--# Note: This is experimental and not complete implementation.
--#CONFIG_WNM=y
--
--# IEEE 802.11ac (Very High Throughput) support
--CONFIG_IEEE80211AC=y
--
--# IEEE 802.11ax HE support
--# Note: This is experimental and work in progress. The definitions are still
--# subject to change and this should not be expected to interoperate with the
--# final IEEE 802.11ax version.
--#CONFIG_IEEE80211AX=y
--
--# Remove debugging code that is printing out debug messages to stdout.
--# This can be used to reduce the size of the hostapd considerably if debugging
--# code is not needed.
--#CONFIG_NO_STDOUT_DEBUG=y
--
--# Add support for writing debug log to a file: -f /tmp/hostapd.log
--# Disabled by default.
--#CONFIG_DEBUG_FILE=y
--
--# Send debug messages to syslog instead of stdout
--CONFIG_DEBUG_SYSLOG=y
--
--# Add support for sending all debug messages (regardless of debug verbosity)
--# to the Linux kernel tracing facility. This helps debug the entire stack by
--# making it easy to record everything happening from the driver up into the
--# same file, e.g., using trace-cmd.
--#CONFIG_DEBUG_LINUX_TRACING=y
--
--# Remove support for RADIUS accounting
--CONFIG_NO_ACCOUNTING=y
--
--# Remove support for RADIUS
--CONFIG_NO_RADIUS=y
--
--# Remove support for VLANs
--#CONFIG_NO_VLAN=y
--
--# Enable support for fully dynamic VLANs. This enables hostapd to
--# automatically create bridge and VLAN interfaces if necessary.
--#CONFIG_FULL_DYNAMIC_VLAN=y
--
--# Use netlink-based kernel API for VLAN operations instead of ioctl()
--# Note: This requires libnl 3.1 or newer.
--#CONFIG_VLAN_NETLINK=y
--
--# Remove support for dumping internal state through control interface commands
--# This can be used to reduce binary size at the cost of disabling a debugging
--# option.
--CONFIG_NO_DUMP_STATE=y
--
--# Enable tracing code for developer debugging
--# This tracks use of memory allocations and other registrations and reports
--# incorrect use with a backtrace of call (or allocation) location.
--#CONFIG_WPA_TRACE=y
--# For BSD, comment out these.
--#LIBS += -lexecinfo
--#LIBS_p += -lexecinfo
--#LIBS_c += -lexecinfo
--
--# Use libbfd to get more details for developer debugging
--# This enables use of libbfd to get more detailed symbols for the backtraces
--# generated by CONFIG_WPA_TRACE=y.
--#CONFIG_WPA_TRACE_BFD=y
--# For BSD, comment out these.
--#LIBS += -lbfd -liberty -lz
--#LIBS_p += -lbfd -liberty -lz
--#LIBS_c += -lbfd -liberty -lz
--
--# hostapd depends on strong random number generation being available from the
--# operating system. os_get_random() function is used to fetch random data when
--# needed, e.g., for key generation. On Linux and BSD systems, this works by
--# reading /dev/urandom. It should be noted that the OS entropy pool needs to be
--# properly initialized before hostapd is started. This is important especially
--# on embedded devices that do not have a hardware random number generator and
--# may by default start up with minimal entropy available for random number
--# generation.
--#
--# As a safety net, hostapd is by default trying to internally collect
--# additional entropy for generating random data to mix in with the data
--# fetched from the OS. This by itself is not considered to be very strong, but
--# it may help in cases where the system pool is not initialized properly.
--# However, it is very strongly recommended that the system pool is initialized
--# with enough entropy either by using hardware assisted random number
--# generator or by storing state over device reboots.
--#
--# hostapd can be configured to maintain its own entropy store over restarts to
--# enhance random number generation. This is not perfect, but it is much more
--# secure than using the same sequence of random numbers after every reboot.
--# This can be enabled with -e<entropy file> command line option. The specified
--# file needs to be readable and writable by hostapd.
--#
--# If the os_get_random() is known to provide strong random data (e.g., on
--# Linux/BSD, the board in question is known to have reliable source of random
--# data from /dev/urandom), the internal hostapd random pool can be disabled.
--# This will save some in binary size and CPU use. However, this should only be
--# considered for builds that are known to be used on devices that meet the
--# requirements described above.
--CONFIG_NO_RANDOM_POOL=y
--
--# Should we attempt to use the getrandom(2) call that provides more reliable
--# yet secure randomness source than /dev/random on Linux 3.17 and newer.
--# Requires glibc 2.25 to build, falls back to /dev/random if unavailable.
--CONFIG_GETRANDOM=y
--
--# Should we use poll instead of select? Select is used by default.
--#CONFIG_ELOOP_POLL=y
--
--# Should we use epoll instead of select? Select is used by default.
--CONFIG_ELOOP_EPOLL=y
--
--# Should we use kqueue instead of select? Select is used by default.
--#CONFIG_ELOOP_KQUEUE=y
--
--# Select TLS implementation
--# openssl = OpenSSL (default)
--# gnutls = GnuTLS
--# internal = Internal TLSv1 implementation (experimental)
--# linux = Linux kernel AF_ALG and internal TLSv1 implementation (experimental)
--# none = Empty template
--CONFIG_TLS=internal
--
--# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.1)
--# can be enabled to get a stronger construction of messages when block ciphers
--# are used.
--#CONFIG_TLSV11=y
--
--# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.2)
--# can be enabled to enable use of stronger crypto algorithms.
--#CONFIG_TLSV12=y
--
--# Select which ciphers to use by default with OpenSSL if the user does not
--# specify them.
--#CONFIG_TLS_DEFAULT_CIPHERS="DEFAULT:!EXP:!LOW"
--
--# If CONFIG_TLS=internal is used, additional library and include paths are
--# needed for LibTomMath. Alternatively, an integrated, minimal version of
--# LibTomMath can be used. See beginning of libtommath.c for details on benefits
--# and drawbacks of this option.
--#CONFIG_INTERNAL_LIBTOMMATH=y
--#ifndef CONFIG_INTERNAL_LIBTOMMATH
--#LTM_PATH=/usr/src/libtommath-0.39
--#CFLAGS += -I$(LTM_PATH)
--#LIBS += -L$(LTM_PATH)
--#LIBS_p += -L$(LTM_PATH)
--#endif
--# At the cost of about 4 kB of additional binary size, the internal LibTomMath
--# can be configured to include faster routines for exptmod, sqr, and div to
--# speed up DH and RSA calculation considerably
--#CONFIG_INTERNAL_LIBTOMMATH_FAST=y
--
--# Interworking (IEEE 802.11u)
--# This can be used to enable functionality to improve interworking with
--# external networks.
--#CONFIG_INTERWORKING=y
--
--# Hotspot 2.0
--#CONFIG_HS20=y
--
--# Enable SQLite database support in hlr_auc_gw, EAP-SIM DB, and eap_user_file
--#CONFIG_SQLITE=y
--
--# Enable Fast Session Transfer (FST)
--#CONFIG_FST=y
--
--# Enable CLI commands for FST testing
--#CONFIG_FST_TEST=y
--
--# Testing options
--# This can be used to enable some testing options (see also the example
--# configuration file) that are really useful only for testing clients that
--# connect to this hostapd. These options allow, for example, to drop a
--# certain percentage of probe requests or auth/(re)assoc frames.
--#
--#CONFIG_TESTING_OPTIONS=y
--
--# Automatic Channel Selection
--# This will allow hostapd to pick the channel automatically when channel is set
--# to "acs_survey" or "0". Eventually, other ACS algorithms can be added in
--# similar way.
--#
--# Automatic selection is currently only done through initialization, later on
--# we hope to do background checks to keep us moving to more ideal channels as
--# time goes by. ACS is currently only supported through the nl80211 driver and
--# your driver must have survey dump capability that is filled by the driver
--# during scanning.
--#
--# You can customize the ACS survey algorithm with the hostapd.conf variable
--# acs_num_scans.
--#
--# Supported ACS drivers:
--# * ath9k
--# * ath5k
--# * ath10k
--#
--# For more details refer to:
--# http://wireless.kernel.org/en/users/Documentation/acs
--#
--#CONFIG_ACS=y
--
--# Multiband Operation support
--# These extentions facilitate efficient use of multiple frequency bands
--# available to the AP and the devices that may associate with it.
--#CONFIG_MBO=y
--
--# Client Taxonomy
--# Has the AP retain the Probe Request and (Re)Association Request frames from
--# a client, from which a signature can be produced which can identify the model
--# of client device like "Nexus 6P" or "iPhone 5s".
--#CONFIG_TAXONOMY=y
--
--# Fast Initial Link Setup (FILS) (IEEE 802.11ai)
--#CONFIG_FILS=y
--# FILS shared key authentication with PFS
--#CONFIG_FILS_SK_PFS=y
--
--# Include internal line edit mode in hostapd_cli. This can be used to provide
--# limited command line editing and history support.
--#CONFIG_WPA_CLI_EDIT=y
--
--# Opportunistic Wireless Encryption (OWE)
--# Experimental implementation of draft-harkins-owe-07.txt
--#CONFIG_OWE=y
--
--# Airtime policy support
--#CONFIG_AIRTIME_POLICY=y
--
--# Override default value for the wpa_disable_eapol_key_retries configuration
--# parameter. See that parameter in hostapd.conf for more details.
--#CFLAGS += -DDEFAULT_WPA_DISABLE_EAPOL_KEY_RETRIES=1
--
--# uBus IPC/RPC System
--# Services can connect to the bus and provide methods
--# that can be called by other services or clients.
--CONFIG_UBUS=y
--
--# OpenWrt patch 380-disable-ctrl-iface-mib.patch
--# leads to the MIB only being compiled in if
--# CONFIG_CTRL_IFACE_MIB is enabled.
--#CONFIG_CTRL_IFACE_MIB=y
-diff --git a/package/network/services/hostapd/files/hostapd.sh b/package/network/services/hostapd/files/hostapd.sh
-deleted file mode 100644
-index 216d9b14fa..0000000000
---- a/package/network/services/hostapd/files/hostapd.sh
-+++ /dev/null
-@@ -1,1499 +0,0 @@
--. /lib/functions/network.sh
--. /lib/functions.sh
--
--wpa_supplicant_add_rate() {
--	local var="$1"
--	local val="$(($2 / 1000))"
--	local sub="$((($2 / 100) % 10))"
--	append $var "$val" ","
--	[ $sub -gt 0 ] && append $var "."
--}
--
--hostapd_add_rate() {
--	local var="$1"
--	local val="$(($2 / 100))"
--	append $var "$val" " "
--}
--
--hostapd_append_wep_key() {
--	local var="$1"
--
--	wep_keyidx=0
--	set_default key 1
--	case "$key" in
--		[1234])
--			for idx in 1 2 3 4; do
--				local zidx
--				zidx=$(($idx - 1))
--				json_get_var ckey "key${idx}"
--				[ -n "$ckey" ] && \
--					append $var "wep_key${zidx}=$(prepare_key_wep "$ckey")" "$N$T"
--			done
--			wep_keyidx=$((key - 1))
--		;;
--		*)
--			append $var "wep_key0=$(prepare_key_wep "$key")" "$N$T"
--		;;
--	esac
--}
--
--hostapd_append_wpa_key_mgmt() {
--	local auth_type_l="$(echo $auth_type | tr 'a-z' 'A-Z')"
--
--	case "$auth_type" in
--		psk|eap)
--			append wpa_key_mgmt "WPA-$auth_type_l"
--			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-${auth_type_l}"
--			[ "${ieee80211w:-0}" -gt 0 ] && append wpa_key_mgmt "WPA-${auth_type_l}-SHA256"
--		;;
--		eap192)
--			append wpa_key_mgmt "WPA-EAP-SUITE-B-192"
--			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-EAP"
--		;;
--		eap-eap192)
--			append wpa_key_mgmt "WPA-EAP-SUITE-B-192"
--			append wpa_key_mgmt "WPA-EAP"
--			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-EAP"
--			[ "${ieee80211w:-0}" -gt 0 ] && append wpa_key_mgmt "WPA-EAP-SHA256"
--		;;
--		sae)
--			append wpa_key_mgmt "SAE"
--			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-SAE"
--		;;
--		psk-sae)
--			append wpa_key_mgmt "WPA-PSK"
--			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-PSK"
--			[ "${ieee80211w:-0}" -gt 0 ] && append wpa_key_mgmt "WPA-PSK-SHA256"
--			append wpa_key_mgmt "SAE"
--			[ "${ieee80211r:-0}" -gt 0 ] && append wpa_key_mgmt "FT-SAE"
--		;;
--		owe)
--			append wpa_key_mgmt "OWE"
--		;;
--	esac
--
--	[ "$auth_osen" = "1" ] && append wpa_key_mgmt "OSEN"
--}
--
--hostapd_add_log_config() {
--	config_add_boolean \
--		log_80211 \
--		log_8021x \
--		log_radius \
--		log_wpa \
--		log_driver \
--		log_iapp \
--		log_mlme
--
--	config_add_int log_level
--}
--
--hostapd_common_add_device_config() {
--	config_add_array basic_rate
--	config_add_array supported_rates
--	config_add_string beacon_rate
--
--	config_add_string country country3
--	config_add_boolean country_ie doth
--	config_add_boolean spectrum_mgmt_required
--	config_add_int local_pwr_constraint
--	config_add_string require_mode
--	config_add_boolean legacy_rates
--	config_add_int cell_density
--	config_add_int rts_threshold
--
--	config_add_string acs_chan_bias
--	config_add_array hostapd_options
--
--	config_add_int airtime_mode
--
--	hostapd_add_log_config
--}
--
--hostapd_prepare_device_config() {
--	local config="$1"
--	local driver="$2"
--
--	local base_cfg=
--
--	json_get_vars country country3 country_ie beacon_int:100 dtim_period:2 doth require_mode legacy_rates \
--		acs_chan_bias local_pwr_constraint spectrum_mgmt_required airtime_mode cell_density \
--		rts_threshold beacon_rate
--
--	hostapd_set_log_options base_cfg
--
--	set_default country_ie 1
--	set_default spectrum_mgmt_required 0
--	set_default doth 1
--	set_default legacy_rates 0
--	set_default airtime_mode 0
--	set_default cell_density 0
--
--	[ -n "$country" ] && {
--		append base_cfg "country_code=$country" "$N"
--		[ -n "$country3" ] && append base_cfg "country3=$country3" "$N"
--
--		[ "$country_ie" -gt 0 ] && {
--			append base_cfg "ieee80211d=1" "$N"
--			[ -n "$local_pwr_constraint" ] && append base_cfg "local_pwr_constraint=$local_pwr_constraint" "$N"
--			[ "$spectrum_mgmt_required" -gt 0 ] && append base_cfg "spectrum_mgmt_required=$spectrum_mgmt_required" "$N"
--		}
--		[ "$hwmode" = "a" -a "$doth" -gt 0 ] && append base_cfg "ieee80211h=1" "$N"
--	}
--
--	[ -n "$acs_chan_bias" ] && append base_cfg "acs_chan_bias=$acs_chan_bias" "$N"
--
--	local brlist= br
--	json_get_values basic_rate_list basic_rate
--	local rlist= r
--	json_get_values rate_list supported_rates
--
--	[ -n "$hwmode" ] && append base_cfg "hw_mode=$hwmode" "$N"
--	if [ "$hwmode" = "g" ] || [ "$hwmode" = "a" ]; then
--		[ -n "$require_mode" ] && legacy_rates=0
--		case "$require_mode" in
--			n) append base_cfg "require_ht=1" "$N";;
--			ac) append base_cfg "require_vht=1" "$N";;
--		esac
--	fi
--	case "$hwmode" in
--		b)
--			if [ "$cell_density" -eq 1 ]; then
--				set_default rate_list "5500 11000"
--				set_default basic_rate_list "5500 11000"
--			elif [ "$cell_density" -ge 2 ]; then
--				set_default rate_list "11000"
--				set_default basic_rate_list "11000"
--			fi
--		;;
--		g)
--			if [ "$cell_density" -eq 0 ] || [ "$cell_density" -eq 1 ]; then
--				if [ "$legacy_rates" -eq 0 ]; then
--					set_default rate_list "6000 9000 12000 18000 24000 36000 48000 54000"
--					set_default basic_rate_list "6000 12000 24000"
--				elif [ "$cell_density" -eq 1 ]; then
--					set_default rate_list "5500 6000 9000 11000 12000 18000 24000 36000 48000 54000"
--					set_default basic_rate_list "5500 11000"
--				fi
--			elif [ "$cell_density" -ge 3 ] && [ "$legacy_rates" -ne 0 ] || [ "$cell_density" -eq 2 ]; then
--				if [ "$legacy_rates" -eq 0 ]; then
--					set_default rate_list "12000 18000 24000 36000 48000 54000"
--					set_default basic_rate_list "12000 24000"
--				else
--					set_default rate_list "11000 12000 18000 24000 36000 48000 54000"
--					set_default basic_rate_list "11000"
--				fi
--			elif [ "$cell_density" -ge 3 ]; then
--				set_default rate_list "24000 36000 48000 54000"
--				set_default basic_rate_list "24000"
--			fi
--		;;
--		a)
--			if [ "$cell_density" -eq 1 ]; then
--				set_default rate_list "6000 9000 12000 18000 24000 36000 48000 54000"
--				set_default basic_rate_list "6000 12000 24000"
--			elif [ "$cell_density" -eq 2 ]; then
--				set_default rate_list "12000 18000 24000 36000 48000 54000"
--				set_default basic_rate_list "12000 24000"
--			elif [ "$cell_density" -ge 3 ]; then
--				set_default rate_list "24000 36000 48000 54000"
--				set_default basic_rate_list "24000"
--			fi
--		;;
--	esac
--
--	for r in $rate_list; do
--		hostapd_add_rate rlist "$r"
--	done
--
--	for br in $basic_rate_list; do
--		hostapd_add_rate brlist "$br"
--	done
--
--	[ -n "$beacon_rate" ] && append base_cfg "beacon_rate=$beacon_rate" "$N"
--	[ -n "$rlist" ] && append base_cfg "supported_rates=$rlist" "$N"
--	[ -n "$brlist" ] && append base_cfg "basic_rates=$brlist" "$N"
--	append base_cfg "beacon_int=$beacon_int" "$N"
--	[ -n "$rts_threshold" ] && append base_cfg "rts_threshold=$rts_threshold" "$N"
--	append base_cfg "dtim_period=$dtim_period" "$N"
--	[ "$airtime_mode" -gt 0 ] && append base_cfg "airtime_mode=$airtime_mode" "$N"
--
--	json_get_values opts hostapd_options
--	for val in $opts; do
--		append base_cfg "$val" "$N"
--	done
--
--	cat > "$config" <<EOF
--driver=$driver
--$base_cfg
--EOF
--}
--
--hostapd_common_add_bss_config() {
--	config_add_string 'bssid:macaddr' 'ssid:string'
--	config_add_boolean wds wmm uapsd hidden utf8_ssid
--
--	config_add_int maxassoc max_inactivity
--	config_add_boolean disassoc_low_ack isolate short_preamble skip_inactivity_poll
--
--	config_add_int \
--		wep_rekey eap_reauth_period \
--		wpa_group_rekey wpa_pair_rekey wpa_master_rekey
--	config_add_boolean wpa_strict_rekey
--	config_add_boolean wpa_disable_eapol_key_retries
--
--	config_add_boolean tdls_prohibit
--
--	config_add_boolean rsn_preauth auth_cache
--	config_add_int ieee80211w
--	config_add_int eapol_version
--
--	config_add_string 'auth_server:host' 'server:host'
--	config_add_string auth_secret key
--	config_add_int 'auth_port:port' 'port:port'
--
--	config_add_string acct_server
--	config_add_string acct_secret
--	config_add_int acct_port
--	config_add_int acct_interval
--
--	config_add_int bss_load_update_period chan_util_avg_period
--
--	config_add_string dae_client
--	config_add_string dae_secret
--	config_add_int dae_port
--
--	config_add_string nasid
--	config_add_string ownip
--	config_add_string radius_client_addr
--	config_add_string iapp_interface
--	config_add_string eap_type ca_cert client_cert identity anonymous_identity auth priv_key priv_key_pwd
--	config_add_boolean ca_cert_usesystem ca_cert2_usesystem
--	config_add_string subject_match subject_match2
--	config_add_array altsubject_match altsubject_match2
--	config_add_array domain_match domain_match2 domain_suffix_match domain_suffix_match2
--	config_add_string ieee80211w_mgmt_cipher
--
--	config_add_int dynamic_vlan vlan_naming vlan_no_bridge
--	config_add_string vlan_tagged_interface vlan_bridge
--	config_add_string vlan_file
--
--	config_add_string 'key1:wepkey' 'key2:wepkey' 'key3:wepkey' 'key4:wepkey' 'password:wpakey'
--
--	config_add_string wpa_psk_file
--
--	config_add_int multi_ap
--
--	config_add_boolean wps_pushbutton wps_label ext_registrar wps_pbc_in_m1
--	config_add_int wps_ap_setup_locked wps_independent
--	config_add_string wps_device_type wps_device_name wps_manufacturer wps_pin
--	config_add_string multi_ap_backhaul_ssid multi_ap_backhaul_key
--
--	config_add_boolean wnm_sleep_mode wnm_sleep_mode_no_keys bss_transition
--	config_add_int time_advertisement
--	config_add_string time_zone
--	config_add_string vendor_elements
--
--	config_add_boolean ieee80211k rrm_neighbor_report rrm_beacon_report
--
--	config_add_boolean ftm_responder stationary_ap
--	config_add_string lci civic
--
--	config_add_boolean ieee80211r pmk_r1_push ft_psk_generate_local ft_over_ds
--	config_add_int r0_key_lifetime reassociation_deadline
--	config_add_string mobility_domain r1_key_holder
--	config_add_array r0kh r1kh
--
--	config_add_int ieee80211w_max_timeout ieee80211w_retry_timeout
--
--	config_add_string macfilter 'macfile:file'
--	config_add_array 'maclist:list(macaddr)'
--
--	config_add_array bssid_blacklist
--	config_add_array bssid_whitelist
--
--	config_add_int mcast_rate
--	config_add_array basic_rate
--	config_add_array supported_rates
--
--	config_add_boolean sae_require_mfp
--
--	config_add_string 'owe_transition_bssid:macaddr' 'owe_transition_ssid:string'
--	config_add_string owe_transition_ifname
--
--	config_add_boolean iw_enabled iw_internet iw_asra iw_esr iw_uesa
--	config_add_int iw_access_network_type iw_venue_group iw_venue_type
--	config_add_int iw_ipaddr_type_availability iw_gas_address3
--	config_add_string iw_hessid iw_network_auth_type iw_qos_map_set
--	config_add_array iw_roaming_consortium iw_domain_name iw_anqp_3gpp_cell_net iw_nai_realm
--	config_add_array iw_anqp_elem iw_venue_name iw_venue_url
--
--	config_add_boolean hs20 disable_dgaf osen
--	config_add_int anqp_domain_id
--	config_add_int hs20_deauth_req_timeout
--	config_add_array hs20_oper_friendly_name
--	config_add_array osu_provider
--	config_add_array operator_icon
--	config_add_array hs20_conn_capab
--	config_add_string osu_ssid hs20_wan_metrics hs20_operating_class hs20_t_c_filename hs20_t_c_timestamp
--
--	config_add_string hs20_t_c_server_url
--
--	config_add_array airtime_sta_weight
--	config_add_int airtime_bss_weight airtime_bss_limit
--
--	config_add_boolean multicast_to_unicast per_sta_vif
--
--	config_add_array hostapd_bss_options
--
--	config_add_boolean request_cui
--	config_add_array radius_auth_req_attr
--	config_add_array radius_acct_req_attr
--
--	config_add_int eap_server
--	config_add_string eap_user_file ca_cert server_cert private_key private_key_passwd server_id
--}
--
--hostapd_set_vlan_file() {
--	local ifname="$1"
--	local vlan="$2"
--	json_get_vars name vid
--	echo "${vid} ${ifname}-${name}" >> /var/run/hostapd-${ifname}.vlan
--	wireless_add_vlan "${vlan}" "${ifname}-${name}"
--}
--
--hostapd_set_vlan() {
--	local ifname="$1"
--
--	rm -f /var/run/hostapd-${ifname}.vlan
--	for_each_vlan hostapd_set_vlan_file ${ifname}
--}
--
--hostapd_set_psk_file() {
--	local ifname="$1"
--	local vlan="$2"
--	local vlan_id=""
--
--	json_get_vars mac vid key
--	set_default mac "00:00:00:00:00:00"
--	[ -n "$vid" ] && vlan_id="vlanid=$vid "
--	echo "${vlan_id} ${mac} ${key}" >> /var/run/hostapd-${ifname}.psk
--}
--
--hostapd_set_psk() {
--	local ifname="$1"
--
--	rm -f /var/run/hostapd-${ifname}.psk
--	for_each_station hostapd_set_psk_file ${ifname}
--}
--
--append_iw_roaming_consortium() {
--	[ -n "$1" ] && append bss_conf "roaming_consortium=$1" "$N"
--}
--
--append_iw_domain_name() {
--	if [ -z "$iw_domain_name_conf" ]; then
--		iw_domain_name_conf="$1"
--	else
--		iw_domain_name_conf="$iw_domain_name_conf,$1"
--	fi
--}
--
--append_iw_anqp_3gpp_cell_net() {
--	if [ -z "$iw_anqp_3gpp_cell_net_conf" ]; then
--		iw_anqp_3gpp_cell_net_conf="$1"
--	else
--		iw_anqp_3gpp_cell_net_conf="$iw_anqp_3gpp_cell_net_conf:$1"
--	fi
--}
--
--append_iw_anqp_elem() {
--	[ -n "$1" ] && append bss_conf "anqp_elem=$1" "$N"
--}
--
--append_iw_nai_realm() {
--	[ -n "$1" ] && append bss_conf "nai_realm=$1" "$N"
--}
--
--append_iw_venue_name() {
--	append bss_conf "venue_name=$1" "$N"
--}
--
--append_iw_venue_url() {
--	append bss_conf "venue_url=$1" "$N"
--}
--
--append_hs20_oper_friendly_name() {
--	append bss_conf "hs20_oper_friendly_name=$1" "$N"
--}
--
--append_osu_provider_friendly_name() {
--	append bss_conf "osu_friendly_name=$1" "$N"
--}
--
--append_osu_provider_service_desc() {
--	append bss_conf "osu_service_desc=$1" "$N"
--}
--
--append_hs20_icon() {
--	local width height lang type path
--	config_get width "$1" width
--	config_get height "$1" height
--	config_get lang "$1" lang
--	config_get type "$1" type
--	config_get path "$1" path
--
--	append bss_conf "hs20_icon=$width:$height:$lang:$type:$1:$path" "$N"
--}
--
--append_hs20_icons() {
--	config_load wireless
--	config_foreach append_hs20_icon hs20-icon
--}
--
--append_operator_icon() {
--	append bss_conf "operator_icon=$1" "$N"
--}
--
--append_osu_icon() {
--	append bss_conf "osu_icon=$1" "$N"
--}
--
--append_osu_provider() {
--	local cfgtype osu_server_uri osu_friendly_name osu_nai osu_nai2 osu_method_list
--
--	config_load wireless
--	config_get cfgtype "$1" TYPE
--	[ "$cfgtype" != "osu-provider" ] && return
--
--	append bss_conf "# provider $1" "$N"
--	config_get osu_server_uri "$1" osu_server_uri
--	config_get osu_nai "$1" osu_nai
--	config_get osu_nai2 "$1" osu_nai2
--	config_get osu_method_list "$1" osu_method
--
--	append bss_conf "osu_server_uri=$osu_server_uri" "$N"
--	append bss_conf "osu_nai=$osu_nai" "$N"
--	append bss_conf "osu_nai2=$osu_nai2" "$N"
--	append bss_conf "osu_method_list=$osu_method_list" "$N"
--
--	config_list_foreach "$1" osu_service_desc append_osu_provider_service_desc
--	config_list_foreach "$1" osu_friendly_name append_osu_friendly_name
--	config_list_foreach "$1" osu_icon append_osu_icon
--
--	append bss_conf "$N"
--}
--
--append_hs20_conn_capab() {
--	[ -n "$1" ] && append bss_conf "hs20_conn_capab=$1" "$N"
--}
--
--append_radius_acct_req_attr() {
--	append bss_conf "radius_acct_req_attr=$1" "$N"
--}
--
--append_radius_auth_req_attr() {
--	append bss_conf "radius_auth_req_attr=$1" "$N"
--}
--
--append_airtime_sta_weight() {
--	[ -n "$1" ] && append bss_conf "airtime_sta_weight=$1" "$N"
--}
--
--hostapd_set_bss_options() {
--	local var="$1"
--	local phy="$2"
--	local vif="$3"
--
--	wireless_vif_parse_encryption
--
--	local bss_conf bss_md5sum
--	local wep_rekey wpa_group_rekey wpa_pair_rekey wpa_master_rekey wpa_key_mgmt
--
--	json_get_vars \
--		wep_rekey wpa_group_rekey wpa_pair_rekey wpa_master_rekey wpa_strict_rekey \
--		wpa_disable_eapol_key_retries tdls_prohibit \
--		maxassoc max_inactivity disassoc_low_ack isolate auth_cache \
--		wps_pushbutton wps_label ext_registrar wps_pbc_in_m1 wps_ap_setup_locked \
--		wps_independent wps_device_type wps_device_name wps_manufacturer wps_pin \
--		macfilter ssid utf8_ssid wmm uapsd hidden short_preamble rsn_preauth \
--		iapp_interface eapol_version dynamic_vlan ieee80211w nasid \
--		acct_server acct_secret acct_port acct_interval \
--		bss_load_update_period chan_util_avg_period sae_require_mfp \
--		multi_ap multi_ap_backhaul_ssid multi_ap_backhaul_key skip_inactivity_poll \
--		airtime_bss_weight airtime_bss_limit airtime_sta_weight \
--		multicast_to_unicast per_sta_vif \
--		eap_server eap_user_file ca_cert server_cert private_key private_key_passwd server_id \
--		vendor_elements
--
--	set_default isolate 0
--	set_default maxassoc 0
--	set_default max_inactivity 0
--	set_default short_preamble 1
--	set_default disassoc_low_ack 1
--	set_default skip_inactivity_poll 0
--	set_default hidden 0
--	set_default wmm 1
--	set_default uapsd 1
--	set_default wpa_disable_eapol_key_retries 0
--	set_default tdls_prohibit 0
--	set_default eapol_version $((wpa & 1))
--	set_default acct_port 1813
--	set_default bss_load_update_period 60
--	set_default chan_util_avg_period 600
--	set_default utf8_ssid 1
--	set_default multi_ap 0
--	set_default airtime_bss_weight 0
--	set_default airtime_bss_limit 0
--	set_default eap_server 0
--
--	append bss_conf "ctrl_interface=/var/run/hostapd"
--	if [ "$isolate" -gt 0 ]; then
--		append bss_conf "ap_isolate=$isolate" "$N"
--	fi
--	if [ "$maxassoc" -gt 0 ]; then
--		append bss_conf "max_num_sta=$maxassoc" "$N"
--	fi
--	if [ "$max_inactivity" -gt 0 ]; then
--		append bss_conf "ap_max_inactivity=$max_inactivity" "$N"
--	fi
--
--	[ "$airtime_bss_weight" -gt 0 ] && append bss_conf "airtime_bss_weight=$airtime_bss_weight" "$N"
--	[ "$airtime_bss_limit" -gt 0 ] && append bss_conf "airtime_bss_limit=$airtime_bss_limit" "$N"
--	json_for_each_item append_airtime_sta_weight airtime_sta_weight
--
--	append bss_conf "bss_load_update_period=$bss_load_update_period" "$N"
--	append bss_conf "chan_util_avg_period=$chan_util_avg_period" "$N"
--	append bss_conf "disassoc_low_ack=$disassoc_low_ack" "$N"
--	append bss_conf "skip_inactivity_poll=$skip_inactivity_poll" "$N"
--	append bss_conf "preamble=$short_preamble" "$N"
--	append bss_conf "wmm_enabled=$wmm" "$N"
--	append bss_conf "ignore_broadcast_ssid=$hidden" "$N"
--	append bss_conf "uapsd_advertisement_enabled=$uapsd" "$N"
--	append bss_conf "utf8_ssid=$utf8_ssid" "$N"
--	append bss_conf "multi_ap=$multi_ap" "$N"
--	[ -n "$vendor_elements" ] && append bss_conf "vendor_elements=$vendor_elements" "$N"
--
--	[ "$tdls_prohibit" -gt 0 ] && append bss_conf "tdls_prohibit=$tdls_prohibit" "$N"
--
--	[ "$wpa" -gt 0 ] && {
--		[ -n "$wpa_group_rekey"  ] && append bss_conf "wpa_group_rekey=$wpa_group_rekey" "$N"
--		[ -n "$wpa_pair_rekey"   ] && append bss_conf "wpa_ptk_rekey=$wpa_pair_rekey"    "$N"
--		[ -n "$wpa_master_rekey" ] && append bss_conf "wpa_gmk_rekey=$wpa_master_rekey"  "$N"
--		[ -n "$wpa_strict_rekey" ] && append bss_conf "wpa_strict_rekey=$wpa_strict_rekey" "$N"
--	}
--
--	[ -n "$nasid" ] && append bss_conf "nas_identifier=$nasid" "$N"
--	[ -n "$acct_server" ] && {
--		append bss_conf "acct_server_addr=$acct_server" "$N"
--		append bss_conf "acct_server_port=$acct_port" "$N"
--		[ -n "$acct_secret" ] && \
--			append bss_conf "acct_server_shared_secret=$acct_secret" "$N"
--		[ -n "$acct_interval" ] && \
--			append bss_conf "radius_acct_interim_interval=$acct_interval" "$N"
--		json_for_each_item append_radius_acct_req_attr radius_acct_req_attr
--	}
--
--	case "$auth_type" in
--		sae|owe|eap192|eap-eap192)
--			set_default ieee80211w 2
--			set_default sae_require_mfp 1
--		;;
--		psk-sae)
--			set_default ieee80211w 1
--			set_default sae_require_mfp 1
--		;;
--	esac
--	[ -n "$sae_require_mfp" ] && append bss_conf "sae_require_mfp=$sae_require_mfp" "$N"
--
--	local vlan_possible=""
--
--	case "$auth_type" in
--		none|owe)
--			json_get_vars owe_transition_bssid owe_transition_ssid owe_transition_ifname
--
--			[ -n "$owe_transition_ssid" ] && append bss_conf "owe_transition_ssid=\"$owe_transition_ssid\"" "$N"
--			[ -n "$owe_transition_bssid" ] && append bss_conf "owe_transition_bssid=$owe_transition_bssid" "$N"
--			[ -n "$owe_transition_ifname" ] && append bss_conf "owe_transition_ifname=$owe_transition_ifname" "$N"
--
--			wps_possible=1
--			# Here we make the assumption that if we're in open mode
--			# with WPS enabled, we got to be in unconfigured state.
--			wps_not_configured=1
--		;;
--		psk|sae|psk-sae)
--			json_get_vars key wpa_psk_file
--			if [ ${#key} -eq 64 ]; then
--				append bss_conf "wpa_psk=$key" "$N"
--			elif [ ${#key} -ge 8 ] && [ ${#key} -le 63 ]; then
--				append bss_conf "wpa_passphrase=$key" "$N"
--			elif [ -n "$key" ] || [ -z "$wpa_psk_file" ]; then
--				wireless_setup_vif_failed INVALID_WPA_PSK
--				return 1
--			fi
--			[ -z "$wpa_psk_file" ] && set_default wpa_psk_file /var/run/hostapd-$ifname.psk
--			[ -n "$wpa_psk_file" ] && {
--				[ -e "$wpa_psk_file" ] || touch "$wpa_psk_file"
--				append bss_conf "wpa_psk_file=$wpa_psk_file" "$N"
--			}
--			[ "$eapol_version" -ge "1" -a "$eapol_version" -le "2" ] && append bss_conf "eapol_version=$eapol_version" "$N"
--
--			set_default dynamic_vlan 0
--			vlan_possible=1
--			wps_possible=1
--		;;
--		eap|eap192|eap-eap192)
--			json_get_vars \
--				auth_server auth_secret auth_port \
--				dae_client dae_secret dae_port \
--				ownip radius_client_addr \
--				eap_reauth_period request_cui
--
--			# radius can provide VLAN ID for clients
--			vlan_possible=1
--
--			# legacy compatibility
--			[ -n "$auth_server" ] || json_get_var auth_server server
--			[ -n "$auth_port" ] || json_get_var auth_port port
--			[ -n "$auth_secret" ] || json_get_var auth_secret key
--
--			set_default auth_port 1812
--			set_default dae_port 3799
--			set_default request_cui 0
--
--			[ "$eap_server" -eq 0 ] && {
--				append bss_conf "auth_server_addr=$auth_server" "$N"
--				append bss_conf "auth_server_port=$auth_port" "$N"
--				append bss_conf "auth_server_shared_secret=$auth_secret" "$N"
--			}
--
--			[ "$request_cui" -gt 0 ] && append bss_conf "radius_request_cui=$request_cui" "$N"
--			[ -n "$eap_reauth_period" ] && append bss_conf "eap_reauth_period=$eap_reauth_period" "$N"
--
--			[ -n "$dae_client" -a -n "$dae_secret" ] && {
--				append bss_conf "radius_das_port=$dae_port" "$N"
--				append bss_conf "radius_das_client=$dae_client $dae_secret" "$N"
--			}
--			json_for_each_item append_radius_auth_req_attr radius_auth_req_attr
--
--			[ -n "$ownip" ] && append bss_conf "own_ip_addr=$ownip" "$N"
--			[ -n "$radius_client_addr" ] && append bss_conf "radius_client_addr=$radius_client_addr" "$N"
--			append bss_conf "eapol_key_index_workaround=1" "$N"
--			append bss_conf "ieee8021x=1" "$N"
--
--			[ "$eapol_version" -ge "1" -a "$eapol_version" -le "2" ] && append bss_conf "eapol_version=$eapol_version" "$N"
--		;;
--		wep)
--			local wep_keyidx=0
--			json_get_vars key
--			hostapd_append_wep_key bss_conf
--			append bss_conf "wep_default_key=$wep_keyidx" "$N"
--			[ -n "$wep_rekey" ] && append bss_conf "wep_rekey_period=$wep_rekey" "$N"
--		;;
--	esac
--
--	local auth_algs=$((($auth_mode_shared << 1) | $auth_mode_open))
--	append bss_conf "auth_algs=${auth_algs:-1}" "$N"
--	append bss_conf "wpa=$wpa" "$N"
--	[ -n "$wpa_pairwise" ] && append bss_conf "wpa_pairwise=$wpa_pairwise" "$N"
--
--	set_default wps_pushbutton 0
--	set_default wps_label 0
--	set_default wps_pbc_in_m1 0
--
--	config_methods=
--	[ "$wps_pushbutton" -gt 0 ] && append config_methods push_button
--	[ "$wps_label" -gt 0 ] && append config_methods label
--
--	# WPS not possible on Multi-AP backhaul-only SSID
--	[ "$multi_ap" = 1 ] && wps_possible=
--
--	[ -n "$wps_possible" -a -n "$config_methods" ] && {
--		set_default ext_registrar 0
--		set_default wps_device_type "6-0050F204-1"
--		set_default wps_device_name "OpenWrt AP"
--		set_default wps_manufacturer "www.openwrt.org"
--		set_default wps_independent 1
--
--		wps_state=2
--		[ -n "$wps_not_configured" ] && wps_state=1
--
--		[ "$ext_registrar" -gt 0 -a -n "$network_bridge" ] && append bss_conf "upnp_iface=$network_bridge" "$N"
--
--		append bss_conf "eap_server=1" "$N"
--		[ -n "$wps_pin" ] && append bss_conf "ap_pin=$wps_pin" "$N"
--		append bss_conf "wps_state=$wps_state" "$N"
--		append bss_conf "device_type=$wps_device_type" "$N"
--		append bss_conf "device_name=$wps_device_name" "$N"
--		append bss_conf "manufacturer=$wps_manufacturer" "$N"
--		append bss_conf "config_methods=$config_methods" "$N"
--		append bss_conf "wps_independent=$wps_independent" "$N"
--		[ -n "$wps_ap_setup_locked" ] && append bss_conf "ap_setup_locked=$wps_ap_setup_locked" "$N"
--		[ "$wps_pbc_in_m1" -gt 0 ] && append bss_conf "pbc_in_m1=$wps_pbc_in_m1" "$N"
--		[ "$multi_ap" -gt 0 ] && [ -n "$multi_ap_backhaul_ssid" ] && {
--			append bss_conf "multi_ap_backhaul_ssid=\"$multi_ap_backhaul_ssid\"" "$N"
--			if [ -z "$multi_ap_backhaul_key" ]; then
--				:
--			elif [ ${#multi_ap_backhaul_key} -lt 8 ]; then
--				wireless_setup_vif_failed INVALID_WPA_PSK
--				return 1
--			elif [ ${#multi_ap_backhaul_key} -eq 64 ]; then
--				append bss_conf "multi_ap_backhaul_wpa_psk=$multi_ap_backhaul_key" "$N"
--			else
--				append bss_conf "multi_ap_backhaul_wpa_passphrase=$multi_ap_backhaul_key" "$N"
--			fi
--		}
--	}
--
--	append bss_conf "ssid=$ssid" "$N"
--	[ -n "$network_bridge" ] && append bss_conf "bridge=$network_bridge${N}wds_bridge=" "$N"
--	[ -n "$network_ifname" ] && append bss_conf "snoop_iface=$network_ifname" "$N"
--	[ -n "$iapp_interface" ] && {
--		local ifname
--		network_get_device ifname "$iapp_interface" || ifname="$iapp_interface"
--		append bss_conf "iapp_interface=$ifname" "$N"
--	}
--
--	json_get_vars time_advertisement time_zone wnm_sleep_mode wnm_sleep_mode_no_keys bss_transition
--	set_default bss_transition 0
--	set_default wnm_sleep_mode 0
--	set_default wnm_sleep_mode_no_keys 0
--
--	[ -n "$time_advertisement" ] && append bss_conf "time_advertisement=$time_advertisement" "$N"
--	[ -n "$time_zone" ] && append bss_conf "time_zone=$time_zone" "$N"
--	if [ "$wnm_sleep_mode" -eq "1" ]; then
--		append bss_conf "wnm_sleep_mode=1" "$N"
--		[ "$wnm_sleep_mode_no_keys" -eq "1" ] && append bss_conf "wnm_sleep_mode_no_keys=1" "$N"
--	fi
--	[ "$bss_transition" -eq "1" ] && append bss_conf "bss_transition=1" "$N"
--
--	json_get_vars ieee80211k rrm_neighbor_report rrm_beacon_report
--	set_default ieee80211k 0
--	if [ "$ieee80211k" -eq "1" ]; then
--		set_default rrm_neighbor_report 1
--		set_default rrm_beacon_report 1
--	else
--		set_default rrm_neighbor_report 0
--		set_default rrm_beacon_report 0
--	fi
--
--	[ "$rrm_neighbor_report" -eq "1" ] && append bss_conf "rrm_neighbor_report=1" "$N"
--	[ "$rrm_beacon_report" -eq "1" ] && append bss_conf "rrm_beacon_report=1" "$N"
--
--	json_get_vars ftm_responder stationary_ap lci civic
--	set_default ftm_responder 0
--	if [ "$ftm_responder" -eq "1" ]; then
--		set_default stationary_ap 0
--		iw phy "$phy" info | grep -q "ENABLE_FTM_RESPONDER" && {
--			append bss_conf "ftm_responder=1" "$N"
--			[ "$stationary_ap" -eq "1" ] && append bss_conf "stationary_ap=1" "$N"
--			[ -n "$lci" ] && append bss_conf "lci=$lci" "$N"
--			[ -n "$civic" ] && append bss_conf "civic=$civic" "$N"
--		}
--	fi
--
--	if [ "$wpa" -ge "1" ]; then
--		json_get_vars ieee80211r
--		set_default ieee80211r 0
--
--		if [ "$ieee80211r" -gt "0" ]; then
--			json_get_vars mobility_domain ft_psk_generate_local ft_over_ds reassociation_deadline
--
--			set_default mobility_domain "$(echo "$ssid" | md5sum | head -c 4)"
--			set_default ft_over_ds 1
--			set_default reassociation_deadline 1000
--
--			case "$auth_type" in
--				psk|sae|psk-sae)
--					set_default ft_psk_generate_local 1
--				;;
--				*)
--					set_default ft_psk_generate_local 0
--				;;
--			esac
--
--			[ -n "$network_ifname" ] && append bss_conf "ft_iface=$network_ifname" "$N"
--			append bss_conf "mobility_domain=$mobility_domain" "$N"
--			append bss_conf "ft_psk_generate_local=$ft_psk_generate_local" "$N"
--			append bss_conf "ft_over_ds=$ft_over_ds" "$N"
--			append bss_conf "reassociation_deadline=$reassociation_deadline" "$N"
--			[ -n "$nasid" ] || append bss_conf "nas_identifier=${macaddr//\:}" "$N"
--
--			if [ "$ft_psk_generate_local" -eq "0" ]; then
--				json_get_vars r0_key_lifetime r1_key_holder pmk_r1_push
--				json_get_values r0kh r0kh
--				json_get_values r1kh r1kh
--
--				set_default r0_key_lifetime 10000
--				set_default pmk_r1_push 0
--
--				[ -n "$r0kh" -a -n "$r1kh" ] || {
--					key=`echo -n "$mobility_domain/$auth_secret" | md5sum | awk '{print $1}'`
--
--					set_default r0kh "ff:ff:ff:ff:ff:ff,*,$key"
--					set_default r1kh "00:00:00:00:00:00,00:00:00:00:00:00,$key"
--				}
--
--				[ -n "$r1_key_holder" ] && append bss_conf "r1_key_holder=$r1_key_holder" "$N"
--				append bss_conf "r0_key_lifetime=$r0_key_lifetime" "$N"
--				append bss_conf "pmk_r1_push=$pmk_r1_push" "$N"
--
--				for kh in $r0kh; do
--					append bss_conf "r0kh=${kh//,/ }" "$N"
--				done
--				for kh in $r1kh; do
--					append bss_conf "r1kh=${kh//,/ }" "$N"
--				done
--			fi
--		fi
--
--		append bss_conf "wpa_disable_eapol_key_retries=$wpa_disable_eapol_key_retries" "$N"
--
--		hostapd_append_wpa_key_mgmt
--		[ -n "$wpa_key_mgmt" ] && append bss_conf "wpa_key_mgmt=$wpa_key_mgmt" "$N"
--	fi
--
--	if [ "$wpa" -ge "2" ]; then
--		if [ -n "$network_bridge" -a "$rsn_preauth" = 1 ]; then
--			set_default auth_cache 1
--			append bss_conf "rsn_preauth=1" "$N"
--			append bss_conf "rsn_preauth_interfaces=$network_bridge" "$N"
--		else
--			case "$auth_type" in
--			sae|psk-sae|owe)
--				set_default auth_cache 1
--			;;
--			*)
--				set_default auth_cache 0
--			;;
--			esac
--		fi
--
--		append bss_conf "okc=$auth_cache" "$N"
--		[ "$auth_cache" = 0 ] && append bss_conf "disable_pmksa_caching=1" "$N"
--
--		# RSN -> allow management frame protection
--		case "$ieee80211w" in
--			[012])
--				json_get_vars ieee80211w_mgmt_cipher ieee80211w_max_timeout ieee80211w_retry_timeout
--				append bss_conf "ieee80211w=$ieee80211w" "$N"
--				[ "$ieee80211w" -gt "0" ] && {
--					append bss_conf "group_mgmt_cipher=${ieee80211w_mgmt_cipher:-AES-128-CMAC}" "$N"
--					[ -n "$ieee80211w_max_timeout" ] && \
--						append bss_conf "assoc_sa_query_max_timeout=$ieee80211w_max_timeout" "$N"
--					[ -n "$ieee80211w_retry_timeout" ] && \
--						append bss_conf "assoc_sa_query_retry_timeout=$ieee80211w_retry_timeout" "$N"
--				}
--			;;
--		esac
--	fi
--
--	_macfile="/var/run/hostapd-$ifname.maclist"
--	case "$macfilter" in
--		allow)
--			append bss_conf "macaddr_acl=1" "$N"
--			append bss_conf "accept_mac_file=$_macfile" "$N"
--			# accept_mac_file can be used to set MAC to VLAN ID mapping
--			vlan_possible=1
--		;;
--		deny)
--			append bss_conf "macaddr_acl=0" "$N"
--			append bss_conf "deny_mac_file=$_macfile" "$N"
--		;;
--		*)
--			_macfile=""
--		;;
--	esac
--
--	[ -n "$_macfile" ] && {
--		json_get_vars macfile
--		json_get_values maclist maclist
--
--		rm -f "$_macfile"
--		(
--			for mac in $maclist; do
--				echo "$mac"
--			done
--			[ -n "$macfile" -a -f "$macfile" ] && cat "$macfile"
--		) > "$_macfile"
--	}
--
--	[ -n "$vlan_possible" -a -n "$dynamic_vlan" ] && {
--		json_get_vars vlan_naming vlan_tagged_interface vlan_bridge vlan_file vlan_no_bridge
--		set_default vlan_naming 1
--		[ -z "$vlan_file" ] && set_default vlan_file /var/run/hostapd-$ifname.vlan
--		append bss_conf "dynamic_vlan=$dynamic_vlan" "$N"
--		append bss_conf "vlan_naming=$vlan_naming" "$N"
--		if [ -n "$vlan_bridge" ]; then
--			append bss_conf "vlan_bridge=$vlan_bridge" "$N"
--		else
--			set_default vlan_no_bridge 1
--		fi
--		append bss_conf "vlan_no_bridge=$vlan_no_bridge" "$N"
--		[ -n "$vlan_tagged_interface" ] && \
--			append bss_conf "vlan_tagged_interface=$vlan_tagged_interface" "$N"
--		[ -n "$vlan_file" ] && {
--			[ -e "$vlan_file" ] || touch "$vlan_file"
--			append bss_conf "vlan_file=$vlan_file" "$N"
--		}
--	}
--
--	json_get_vars iw_enabled iw_internet iw_asra iw_esr iw_uesa iw_access_network_type
--	json_get_vars iw_hessid iw_venue_group iw_venue_type iw_network_auth_type
--	json_get_vars iw_roaming_consortium iw_domain_name iw_anqp_3gpp_cell_net iw_nai_realm
--	json_get_vars iw_anqp_elem iw_qos_map_set iw_ipaddr_type_availability iw_gas_address3
--	json_get_vars iw_venue_name iw_venue_url
--
--	set_default iw_enabled 0
--	if [ "$iw_enabled" = "1" ]; then
--		append bss_conf "interworking=1" "$N"
--		set_default iw_internet 1
--		set_default iw_asra 0
--		set_default iw_esr 0
--		set_default iw_uesa 0
--
--		append bss_conf "internet=$iw_internet" "$N"
--		append bss_conf "asra=$iw_asra" "$N"
--		append bss_conf "esr=$iw_esr" "$N"
--		append bss_conf "uesa=$iw_uesa" "$N"
--
--		[ -n "$iw_access_network_type" ] && \
--			append bss_conf "access_network_type=$iw_access_network_type" "$N"
--		[ -n "$iw_hessid" ] && append bss_conf "hessid=$iw_hessid" "$N"
--		[ -n "$iw_venue_group" ] && \
--			append bss_conf "venue_group=$iw_venue_group" "$N"
--		[ -n "$iw_venue_type" ] && append bss_conf "venue_type=$iw_venue_type" "$N"
--		[ -n "$iw_network_auth_type" ] && \
--			append bss_conf "network_auth_type=$iw_network_auth_type" "$N"
--		[ -n "$iw_gas_address3" ] && append bss_conf "gas_address3=$iw_gas_address3" "$N"
--
--		json_for_each_item append_iw_roaming_consortium iw_roaming_consortium
--		json_for_each_item append_iw_anqp_elem iw_anqp_elem
--		json_for_each_item append_iw_nai_realm iw_nai_realm
--		json_for_each_item append_iw_venue_name iw_venue_name
--		json_for_each_item append_iw_venue_url iw_venue_url
--
--		iw_domain_name_conf=
--		json_for_each_item append_iw_domain_name iw_domain_name
--		[ -n "$iw_domain_name_conf" ] && \
--			append bss_conf "domain_name=$iw_domain_name_conf" "$N"
--
--		iw_anqp_3gpp_cell_net_conf=
--		json_for_each_item append_iw_anqp_3gpp_cell_net iw_anqp_3gpp_cell_net
--		[ -n "$iw_anqp_3gpp_cell_net_conf" ] && \
--			append bss_conf "anqp_3gpp_cell_net=$iw_anqp_3gpp_cell_net_conf" "$N"
--	fi
--
--	set_default iw_qos_map_set 0,0,2,16,1,1,255,255,18,22,24,38,40,40,44,46,48,56
--	case "$iw_qos_map_set" in
--		*,*);;
--		*) iw_qos_map_set="";;
--	esac
--	[ -n "$iw_qos_map_set" ] && append bss_conf "qos_map_set=$iw_qos_map_set" "$N"
--
--	local hs20 disable_dgaf osen anqp_domain_id hs20_deauth_req_timeout \
--		osu_ssid hs20_wan_metrics hs20_operating_class hs20_t_c_filename hs20_t_c_timestamp \
--		hs20_t_c_server_url
--	json_get_vars hs20 disable_dgaf osen anqp_domain_id hs20_deauth_req_timeout \
--		osu_ssid hs20_wan_metrics hs20_operating_class hs20_t_c_filename hs20_t_c_timestamp \
--		hs20_t_c_server_url
--
--	set_default hs20 0
--	set_default disable_dgaf $hs20
--	set_default osen 0
--	set_default anqp_domain_id 0
--	set_default hs20_deauth_req_timeout 60
--	if [ "$hs20" = "1" ]; then
--		append bss_conf "hs20=1" "$N"
--		append_hs20_icons
--		append bss_conf "disable_dgaf=$disable_dgaf" "$N"
--		append bss_conf "osen=$osen" "$N"
--		append bss_conf "anqp_domain_id=$anqp_domain_id" "$N"
--		append bss_conf "hs20_deauth_req_timeout=$hs20_deauth_req_timeout" "$N"
--		[ -n "$osu_ssid" ] && append bss_conf "osu_ssid=$osu_ssid" "$N"
--		[ -n "$hs20_wan_metrics" ] && append bss_conf "hs20_wan_metrics=$hs20_wan_metrics" "$N"
--		[ -n "$hs20_operating_class" ] && append bss_conf "hs20_operating_class=$hs20_operating_class" "$N"
--		[ -n "$hs20_t_c_filename" ] && append bss_conf "hs20_t_c_filename=$hs20_t_c_filename" "$N"
--		[ -n "$hs20_t_c_timestamp" ] && append bss_conf "hs20_t_c_timestamp=$hs20_t_c_timestamp" "$N"
--		[ -n "$hs20_t_c_server_url" ] && append bss_conf "hs20_t_c_server_url=$hs20_t_c_server_url" "$N"
--		json_for_each_item append_hs20_oper_friendly_name hs20_oper_friendly_name
--		json_for_each_item append_hs20_conn_capab hs20_conn_capab
--		json_for_each_item append_osu_provider osu_provider
--		json_for_each_item append_operator_icon operator_icon
--	fi
--
--	if [ "$eap_server" = "1" ]; then
--		append bss_conf "eap_server=1" "$N"
--		[ -n "$eap_user_file" ] && append bss_conf "eap_user_file=$eap_user_file" "$N"
--		[ -n "$ca_cert" ] && append bss_conf "ca_cert=$ca_cert" "$N"
--		[ -n "$server_cert" ] && append bss_conf "server_cert=$server_cert" "$N"
--		[ -n "$private_key" ] && append bss_conf "private_key=$private_key" "$N"
--		[ -n "$private_key_passwd" ] && append bss_conf "private_key_passwd=$private_key_passwd" "$N"
--		[ -n "$server_id" ] && append bss_conf "server_id=$server_id" "$N"
--	fi
--
--	set_default multicast_to_unicast 0
--	if [ "$multicast_to_unicast" -gt 0 ]; then
--		append bss_conf "multicast_to_unicast=$multicast_to_unicast" "$N"
--	fi
--
--	set_default per_sta_vif 0
--	if [ "$per_sta_vif" -gt 0 ]; then
--		append bss_conf "per_sta_vif=$per_sta_vif" "$N"
--	fi
--
--	json_get_values opts hostapd_bss_options
--	for val in $opts; do
--		append bss_conf "$val" "$N"
--	done
--
--	bss_md5sum=$(echo $bss_conf | md5sum | cut -d" " -f1)
--	append bss_conf "config_id=$bss_md5sum" "$N"
--
--	append "$var" "$bss_conf" "$N"
--	return 0
--}
--
--hostapd_set_log_options() {
--	local var="$1"
--
--	local log_level log_80211 log_8021x log_radius log_wpa log_driver log_iapp log_mlme
--	json_get_vars log_level log_80211 log_8021x log_radius log_wpa log_driver log_iapp log_mlme
--
--	set_default log_level 2
--	set_default log_80211  1
--	set_default log_8021x  1
--	set_default log_radius 1
--	set_default log_wpa    1
--	set_default log_driver 1
--	set_default log_iapp   1
--	set_default log_mlme   1
--
--	local log_mask=$(( \
--		($log_80211  << 0) | \
--		($log_8021x  << 1) | \
--		($log_radius << 2) | \
--		($log_wpa    << 3) | \
--		($log_driver << 4) | \
--		($log_iapp   << 5) | \
--		($log_mlme   << 6)   \
--	))
--
--	append "$var" "logger_syslog=$log_mask" "$N"
--	append "$var" "logger_syslog_level=$log_level" "$N"
--	append "$var" "logger_stdout=$log_mask" "$N"
--	append "$var" "logger_stdout_level=$log_level" "$N"
--
--	return 0
--}
--
--_wpa_supplicant_common() {
--	local ifname="$1"
--
--	_rpath="/var/run/wpa_supplicant"
--	_config="${_rpath}-$ifname.conf"
--}
--
--wpa_supplicant_teardown_interface() {
--	_wpa_supplicant_common "$1"
--	rm -rf "$_rpath/$1" "$_config"
--}
--
--wpa_supplicant_prepare_interface() {
--	local ifname="$1"
--	_w_driver="$2"
--
--	_wpa_supplicant_common "$1"
--
--	json_get_vars mode wds multi_ap
--
--	[ -n "$network_bridge" ] && {
--		fail=
--		case "$mode" in
--			adhoc)
--				fail=1
--			;;
--			sta)
--				[ "$wds" = 1 -o "$multi_ap" = 1 ] || fail=1
--			;;
--		esac
--
--		[ -n "$fail" ] && {
--			wireless_setup_vif_failed BRIDGE_NOT_ALLOWED
--			return 1
--		}
--	}
--
--	local ap_scan=
--
--	_w_mode="$mode"
--
--	[ "$mode" = adhoc ] && {
--		ap_scan="ap_scan=2"
--	}
--
--	local country_str=
--	[ -n "$country" ] && {
--		country_str="country=$country"
--	}
--
--	multiap_flag_file="${_config}.is_multiap"
--	if [ "$multi_ap" = "1" ]; then
--		touch "$multiap_flag_file"
--	else
--		[ -e "$multiap_flag_file" ] && rm "$multiap_flag_file"
--	fi
--	wpa_supplicant_teardown_interface "$ifname"
--	cat > "$_config" <<EOF
--${scan_list:+freq_list=$scan_list}
--$ap_scan
--$country_str
--EOF
--	return 0
--}
--
--wpa_supplicant_set_fixed_freq() {
--	local freq="$1"
--	local htmode="$2"
--
--	append network_data "fixed_freq=1" "$N$T"
--	append network_data "frequency=$freq" "$N$T"
--	case "$htmode" in
--		NOHT) append network_data "disable_ht=1" "$N$T";;
--		HE20|HT20|VHT20) append network_data "disable_ht40=1" "$N$T";;
--		HT40*|VHT40|VHT80|VHT160|HE40|HE80|HE160) append network_data "ht40=1" "$N$T";;
--	esac
--	case "$htmode" in
--		VHT*) append network_data "vht=1" "$N$T";;
--	esac
--	case "$htmode" in
--		HE80|VHT80) append network_data "max_oper_chwidth=1" "$N$T";;
--		HE160|VHT160) append network_data "max_oper_chwidth=2" "$N$T";;
--		HE20|HE40|VHT20|VHT40) append network_data "max_oper_chwidth=0" "$N$T";;
--		*) append network_data "disable_vht=1" "$N$T";;
--	esac
--}
--
--wpa_supplicant_add_network() {
--	local ifname="$1"
--	local freq="$2"
--	local htmode="$3"
--	local noscan="$4"
--
--	_wpa_supplicant_common "$1"
--	wireless_vif_parse_encryption
--
--	json_get_vars \
--		ssid bssid key \
--		basic_rate mcast_rate \
--		ieee80211w ieee80211r \
--		multi_ap
--
--	case "$auth_type" in
--		sae|owe|eap192|eap-eap192)
--			set_default ieee80211w 2
--		;;
--		psk-sae)
--			set_default ieee80211w 1
--		;;
--	esac
--
--	set_default ieee80211r 0
--	set_default multi_ap 0
--
--	local key_mgmt='NONE'
--	local network_data=
--	local T="	"
--
--	local scan_ssid="scan_ssid=1"
--	local freq wpa_key_mgmt
--
--	[ "$_w_mode" = "adhoc" ] && {
--		append network_data "mode=1" "$N$T"
--		[ -n "$freq" ] && wpa_supplicant_set_fixed_freq "$freq" "$htmode"
--		[ "$noscan" = "1" ] && append network_data "noscan=1" "$N$T"
--
--		scan_ssid="scan_ssid=0"
--
--		[ "$_w_driver" = "nl80211" ] ||	append wpa_key_mgmt "WPA-NONE"
--	}
--
--	[ "$_w_mode" = "mesh" ] && {
--		json_get_vars mesh_id mesh_fwding mesh_rssi_threshold
--		[ -n "$mesh_id" ] && ssid="${mesh_id}"
--
--		append network_data "mode=5" "$N$T"
--		[ -n "$mesh_fwding" ] && append network_data "mesh_fwding=${mesh_fwding}" "$N$T"
--		[ -n "$mesh_rssi_threshold" ] && append network_data "mesh_rssi_threshold=${mesh_rssi_threshold}" "$N$T"
--		[ -n "$freq" ] && wpa_supplicant_set_fixed_freq "$freq" "$htmode"
--		[ "$noscan" = "1" ] && append network_data "noscan=1" "$N$T"
--		append wpa_key_mgmt "SAE"
--		scan_ssid=""
--	}
--
--	[ "$multi_ap" = 1 -a "$_w_mode" = "sta" ] && append network_data "multi_ap_backhaul_sta=1" "$N$T"
--
--	case "$auth_type" in
--		none) ;;
--		owe)
--			hostapd_append_wpa_key_mgmt
--			key_mgmt="$wpa_key_mgmt"
--		;;
--		wep)
--			local wep_keyidx=0
--			hostapd_append_wep_key network_data
--			append network_data "wep_tx_keyidx=$wep_keyidx" "$N$T"
--		;;
--		wps)
--			key_mgmt='WPS'
--		;;
--		psk|sae|psk-sae)
--			local passphrase
--
--			if [ "$_w_mode" != "mesh" ]; then
--				hostapd_append_wpa_key_mgmt
--			fi
--
--			key_mgmt="$wpa_key_mgmt"
--
--			if [ ${#key} -eq 64 ]; then
--				passphrase="psk=${key}"
--			else
--				if [ "$_w_mode" = "mesh" ]; then
--					passphrase="sae_password=\"${key}\""
--				else
--					passphrase="psk=\"${key}\""
--				fi
--			fi
--			append network_data "$passphrase" "$N$T"
--		;;
--		eap|eap192|eap-eap192)
--			hostapd_append_wpa_key_mgmt
--			key_mgmt="$wpa_key_mgmt"
--
--			json_get_vars eap_type identity anonymous_identity ca_cert ca_cert_usesystem
--
--			if [ "$ca_cert_usesystem" -eq "1" -a -f "/etc/ssl/certs/ca-certificates.crt" ]; then
--				append network_data "ca_cert=\"/etc/ssl/certs/ca-certificates.crt\"" "$N$T"
--			else
--				[ -n "$ca_cert" ] && append network_data "ca_cert=\"$ca_cert\"" "$N$T"
--			fi
--			[ -n "$identity" ] && append network_data "identity=\"$identity\"" "$N$T"
--			[ -n "$anonymous_identity" ] && append network_data "anonymous_identity=\"$anonymous_identity\"" "$N$T"
--			case "$eap_type" in
--				tls)
--					json_get_vars client_cert priv_key priv_key_pwd
--					append network_data "client_cert=\"$client_cert\"" "$N$T"
--					append network_data "private_key=\"$priv_key\"" "$N$T"
--					append network_data "private_key_passwd=\"$priv_key_pwd\"" "$N$T"
--
--					json_get_vars subject_match
--					[ -n "$subject_match" ] && append network_data "subject_match=\"$subject_match\"" "$N$T"
--
--					json_get_values altsubject_match altsubject_match
--					if [ -n "$altsubject_match" ]; then
--						local list=
--						for x in $altsubject_match; do
--							append list "$x" ";"
--						done
--						append network_data "altsubject_match=\"$list\"" "$N$T"
--					fi
--
--					json_get_values domain_match domain_match
--					if [ -n "$domain_match" ]; then
--						local list=
--						for x in $domain_match; do
--							append list "$x" ";"
--						done
--						append network_data "domain_match=\"$list\"" "$N$T"
--					fi
--
--					json_get_values domain_suffix_match domain_suffix_match
--					if [ -n "$domain_suffix_match" ]; then
--						local list=
--						for x in $domain_suffix_match; do
--							append list "$x" ";"
--						done
--						append network_data "domain_suffix_match=\"$list\"" "$N$T"
--					fi
--				;;
--				fast|peap|ttls)
--					json_get_vars auth password ca_cert2 ca_cert2_usesystem client_cert2 priv_key2 priv_key2_pwd
--					set_default auth MSCHAPV2
--
--					if [ "$auth" = "EAP-TLS" ]; then
--						if [ "$ca_cert2_usesystem" -eq "1" -a -f "/etc/ssl/certs/ca-certificates.crt" ]; then
--							append network_data "ca_cert2=\"/etc/ssl/certs/ca-certificates.crt\"" "$N$T"
--						else
--							[ -n "$ca_cert2" ] && append network_data "ca_cert2=\"$ca_cert2\"" "$N$T"
--						fi
--						append network_data "client_cert2=\"$client_cert2\"" "$N$T"
--						append network_data "private_key2=\"$priv_key2\"" "$N$T"
--						append network_data "private_key2_passwd=\"$priv_key2_pwd\"" "$N$T"
--					else
--						append network_data "password=\"$password\"" "$N$T"
--					fi
--
--					json_get_vars subject_match
--					[ -n "$subject_match" ] && append network_data "subject_match=\"$subject_match\"" "$N$T"
--
--					json_get_values altsubject_match altsubject_match
--					if [ -n "$altsubject_match" ]; then
--						local list=
--						for x in $altsubject_match; do
--							append list "$x" ";"
--						done
--						append network_data "altsubject_match=\"$list\"" "$N$T"
--					fi
--
--					json_get_values domain_match domain_match
--					if [ -n "$domain_match" ]; then
--						local list=
--						for x in $domain_match; do
--							append list "$x" ";"
--						done
--						append network_data "domain_match=\"$list\"" "$N$T"
--					fi
--
--					json_get_values domain_suffix_match domain_suffix_match
--					if [ -n "$domain_suffix_match" ]; then
--						local list=
--						for x in $domain_suffix_match; do
--							append list "$x" ";"
--						done
--						append network_data "domain_suffix_match=\"$list\"" "$N$T"
--					fi
--
--					phase2proto="auth="
--					case "$auth" in
--						"auth"*)
--							phase2proto=""
--						;;
--						"EAP-"*)
--							auth="$(echo $auth | cut -b 5- )"
--							[ "$eap_type" = "ttls" ] &&
--								phase2proto="autheap="
--							json_get_vars subject_match2
--							[ -n "$subject_match2" ] && append network_data "subject_match2=\"$subject_match2\"" "$N$T"
--
--							json_get_values altsubject_match2 altsubject_match2
--							if [ -n "$altsubject_match2" ]; then
--								local list=
--								for x in $altsubject_match2; do
--									append list "$x" ";"
--								done
--								append network_data "altsubject_match2=\"$list\"" "$N$T"
--							fi
--
--							json_get_values domain_match2 domain_match2
--							if [ -n "$domain_match2" ]; then
--								local list=
--								for x in $domain_match2; do
--									append list "$x" ";"
--								done
--								append network_data "domain_match2=\"$list\"" "$N$T"
--							fi
--
--							json_get_values domain_suffix_match2 domain_suffix_match2
--							if [ -n "$domain_suffix_match2" ]; then
--								local list=
--								for x in $domain_suffix_match2; do
--									append list "$x" ";"
--								done
--								append network_data "domain_suffix_match2=\"$list\"" "$N$T"
--							fi
--						;;
--					esac
--					append network_data "phase2=\"$phase2proto$auth\"" "$N$T"
--				;;
--			esac
--			append network_data "eap=$(echo $eap_type | tr 'a-z' 'A-Z')" "$N$T"
--		;;
--	esac
--
--	[ "$wpa_cipher" = GCMP ] && {
--		append network_data "pairwise=GCMP" "$N$T"
--		append network_data "group=GCMP" "$N$T"
--	}
--
--	[ "$mode" = mesh ] || {
--		case "$wpa" in
--			1)
--				append network_data "proto=WPA" "$N$T"
--			;;
--			2)
--				append network_data "proto=RSN" "$N$T"
--			;;
--		esac
--
--		case "$ieee80211w" in
--			[012])
--				[ "$wpa" -ge 2 ] && append network_data "ieee80211w=$ieee80211w" "$N$T"
--			;;
--		esac
--	}
--	[ -n "$bssid" ] && append network_data "bssid=$bssid" "$N$T"
--	[ -n "$beacon_int" ] && append network_data "beacon_int=$beacon_int" "$N$T"
--
--	local bssid_blacklist bssid_whitelist
--	json_get_values bssid_blacklist bssid_blacklist
--	json_get_values bssid_whitelist bssid_whitelist
--
--	[ -n "$bssid_blacklist" ] && append network_data "bssid_blacklist=$bssid_blacklist" "$N$T"
--	[ -n "$bssid_whitelist" ] && append network_data "bssid_whitelist=$bssid_whitelist" "$N$T"
--
--	[ -n "$basic_rate" ] && {
--		local br rate_list=
--		for br in $basic_rate; do
--			wpa_supplicant_add_rate rate_list "$br"
--		done
--		[ -n "$rate_list" ] && append network_data "rates=$rate_list" "$N$T"
--	}
--
--	[ -n "$mcast_rate" ] && {
--		local mc_rate=
--		wpa_supplicant_add_rate mc_rate "$mcast_rate"
--		append network_data "mcast_rate=$mc_rate" "$N$T"
--	}
--
--	if [ "$key_mgmt" = "WPS" ]; then
--		echo "wps_cred_processing=1" >> "$_config"
--	else
--		cat >> "$_config" <<EOF
--network={
--	$scan_ssid
--	ssid="$ssid"
--	key_mgmt=$key_mgmt
--	$network_data
--}
--EOF
--	fi
--	return 0
--}
--
--wpa_supplicant_run() {
--	local ifname="$1"
--	local hostapd_ctrl="$2"
--
--	_wpa_supplicant_common "$ifname"
--
--	ubus wait_for wpa_supplicant
--	local supplicant_res="$(ubus call wpa_supplicant config_add "{ \
--		\"driver\": \"${_w_driver:-wext}\", \"ctrl\": \"$_rpath\", \
--		\"iface\": \"$ifname\", \"config\": \"$_config\" \
--		${network_bridge:+, \"bridge\": \"$network_bridge\"} \
--		${hostapd_ctrl:+, \"hostapd_ctrl\": \"$hostapd_ctrl\"} \
--		}")"
--
--	ret="$?"
--
--	[ "$ret" != 0 -o -z "$supplicant_res" ] && wireless_setup_vif_failed WPA_SUPPLICANT_FAILED
--
--	wireless_add_process "$(jsonfilter -s "$supplicant_res" -l 1 -e @.pid)" "/usr/sbin/wpa_supplicant" 1 1
--
--	return $ret
--}
--
--hostapd_common_cleanup() {
--	killall meshd-nl80211
--}
-diff --git a/package/network/services/hostapd/files/multicall.c b/package/network/services/hostapd/files/multicall.c
-deleted file mode 100644
-index c8e814bb5c..0000000000
---- a/package/network/services/hostapd/files/multicall.c
-+++ /dev/null
-@@ -1,28 +0,0 @@
--#include <stdio.h>
--#include <string.h>
--#include <stdbool.h>
--
--extern int hostapd_main(int argc, char **argv);
--extern int wpa_supplicant_main(int argc, char **argv);
--
--int main(int argc, char **argv)
--{
--	bool restart = false;
--	const char *prog = argv[0];
--
--restart:
--	if (strstr(argv[0], "hostapd"))
--		return hostapd_main(argc, argv);
--	else if (strstr(argv[0], "wpa_supplicant"))
--		return wpa_supplicant_main(argc, argv);
--
--	if (!restart && argc > 1) {
--		argv++;
--		argc--;
--		restart = true;
--		goto restart;
--	}
--
--	fprintf(stderr, "Invalid command.\nUsage: %s wpa_supplicant|hostapd [<arguments>]\n", prog);
--	return 255;
--}
-diff --git a/package/network/services/hostapd/files/wpa_supplicant-basic.config b/package/network/services/hostapd/files/wpa_supplicant-basic.config
-deleted file mode 100644
-index c550b37b21..0000000000
---- a/package/network/services/hostapd/files/wpa_supplicant-basic.config
-+++ /dev/null
-@@ -1,625 +0,0 @@
--# Example wpa_supplicant build time configuration
--#
--# This file lists the configuration options that are used when building the
--# wpa_supplicant binary. All lines starting with # are ignored. Configuration
--# option lines must be commented out complete, if they are not to be included,
--# i.e., just setting VARIABLE=n is not disabling that variable.
--#
--# This file is included in Makefile, so variables like CFLAGS and LIBS can also
--# be modified from here. In most cases, these lines should use += in order not
--# to override previous values of the variables.
--
--
--# Uncomment following two lines and fix the paths if you have installed OpenSSL
--# or GnuTLS in non-default location
--#CFLAGS += -I/usr/local/openssl/include
--#LIBS += -L/usr/local/openssl/lib
--
--# Some Red Hat versions seem to include kerberos header files from OpenSSL, but
--# the kerberos files are not in the default include path. Following line can be
--# used to fix build issues on such systems (krb5.h not found).
--#CFLAGS += -I/usr/include/kerberos
--
--# Driver interface for generic Linux wireless extensions
--# Note: WEXT is deprecated in the current Linux kernel version and no new
--# functionality is added to it. nl80211-based interface is the new
--# replacement for WEXT and its use allows wpa_supplicant to properly control
--# the driver to improve existing functionality like roaming and to support new
--# functionality.
--CONFIG_DRIVER_WEXT=y
--
--# Driver interface for Linux drivers using the nl80211 kernel interface
--CONFIG_DRIVER_NL80211=y
--
--# QCA vendor extensions to nl80211
--#CONFIG_DRIVER_NL80211_QCA=y
--
--# driver_nl80211.c requires libnl. If you are compiling it yourself
--# you may need to point hostapd to your version of libnl.
--#
--#CFLAGS += -I$<path to libnl include files>
--#LIBS += -L$<path to libnl library files>
--
--# Use libnl v2.0 (or 3.0) libraries.
--#CONFIG_LIBNL20=y
--
--# Use libnl 3.2 libraries (if this is selected, CONFIG_LIBNL20 is ignored)
--#CONFIG_LIBNL32=y
--
--
--# Driver interface for FreeBSD net80211 layer (e.g., Atheros driver)
--#CONFIG_DRIVER_BSD=y
--#CFLAGS += -I/usr/local/include
--#LIBS += -L/usr/local/lib
--#LIBS_p += -L/usr/local/lib
--#LIBS_c += -L/usr/local/lib
--
--# Driver interface for Windows NDIS
--#CONFIG_DRIVER_NDIS=y
--#CFLAGS += -I/usr/include/w32api/ddk
--#LIBS += -L/usr/local/lib
--# For native build using mingw
--#CONFIG_NATIVE_WINDOWS=y
--# Additional directories for cross-compilation on Linux host for mingw target
--#CFLAGS += -I/opt/mingw/mingw32/include/ddk
--#LIBS += -L/opt/mingw/mingw32/lib
--#CC=mingw32-gcc
--# By default, driver_ndis uses WinPcap for low-level operations. This can be
--# replaced with the following option which replaces WinPcap calls with NDISUIO.
--# However, this requires that WZC is disabled (net stop wzcsvc) before starting
--# wpa_supplicant.
--# CONFIG_USE_NDISUIO=y
--
--# Driver interface for wired Ethernet drivers
--CONFIG_DRIVER_WIRED=y
--
--# Driver interface for MACsec capable Qualcomm Atheros drivers
--#CONFIG_DRIVER_MACSEC_QCA=y
--
--# Driver interface for Linux MACsec drivers
--#CONFIG_DRIVER_MACSEC_LINUX=y
--
--# Driver interface for the Broadcom RoboSwitch family
--#CONFIG_DRIVER_ROBOSWITCH=y
--
--# Driver interface for no driver (e.g., WPS ER only)
--#CONFIG_DRIVER_NONE=y
--
--# Solaris libraries
--#LIBS += -lsocket -ldlpi -lnsl
--#LIBS_c += -lsocket
--
--# Enable IEEE 802.1X Supplicant (automatically included if any EAP method or
--# MACsec is included)
--#CONFIG_IEEE8021X_EAPOL=y
--
--# EAP-MD5
--#CONFIG_EAP_MD5=y
--
--# EAP-MSCHAPv2
--#CONFIG_EAP_MSCHAPV2=y
--
--# EAP-TLS
--#CONFIG_EAP_TLS=y
--
--# EAL-PEAP
--#CONFIG_EAP_PEAP=y
--
--# EAP-TTLS
--#CONFIG_EAP_TTLS=y
--
--# EAP-FAST
--#CONFIG_EAP_FAST=y
--
--# EAP-TEAP
--# Note: The current EAP-TEAP implementation is experimental and should not be
--# enabled for production use. The IETF RFC 7170 that defines EAP-TEAP has number
--# of conflicting statements and missing details and the implementation has
--# vendor specific workarounds for those and as such, may not interoperate with
--# any other implementation. This should not be used for anything else than
--# experimentation and interoperability testing until those issues has been
--# resolved.
--#CONFIG_EAP_TEAP=y
--
--# EAP-GTC
--#CONFIG_EAP_GTC=y
--
--# EAP-OTP
--#CONFIG_EAP_OTP=y
--
--# EAP-SIM (enable CONFIG_PCSC, if EAP-SIM is used)
--#CONFIG_EAP_SIM=y
--
--# Enable SIM simulator (Milenage) for EAP-SIM
--#CONFIG_SIM_SIMULATOR=y
--
--# EAP-PSK (experimental; this is _not_ needed for WPA-PSK)
--#CONFIG_EAP_PSK=y
--
--# EAP-pwd (secure authentication using only a password)
--#CONFIG_EAP_PWD=y
--
--# EAP-PAX
--#CONFIG_EAP_PAX=y
--
--# LEAP
--#CONFIG_EAP_LEAP=y
--
--# EAP-AKA (enable CONFIG_PCSC, if EAP-AKA is used)
--#CONFIG_EAP_AKA=y
--
--# EAP-AKA' (enable CONFIG_PCSC, if EAP-AKA' is used).
--# This requires CONFIG_EAP_AKA to be enabled, too.
--#CONFIG_EAP_AKA_PRIME=y
--
--# Enable USIM simulator (Milenage) for EAP-AKA
--#CONFIG_USIM_SIMULATOR=y
--
--# EAP-SAKE
--#CONFIG_EAP_SAKE=y
--
--# EAP-GPSK
--#CONFIG_EAP_GPSK=y
--# Include support for optional SHA256 cipher suite in EAP-GPSK
--#CONFIG_EAP_GPSK_SHA256=y
--
--# EAP-TNC and related Trusted Network Connect support (experimental)
--#CONFIG_EAP_TNC=y
--
--# Wi-Fi Protected Setup (WPS)
--#CONFIG_WPS=y
--# Enable WPS external registrar functionality
--#CONFIG_WPS_ER=y
--# Disable credentials for an open network by default when acting as a WPS
--# registrar.
--#CONFIG_WPS_REG_DISABLE_OPEN=y
--# Enable WPS support with NFC config method
--#CONFIG_WPS_NFC=y
--
--# EAP-IKEv2
--#CONFIG_EAP_IKEV2=y
--
--# EAP-EKE
--#CONFIG_EAP_EKE=y
--
--# MACsec
--#CONFIG_MACSEC=y
--
--# PKCS#12 (PFX) support (used to read private key and certificate file from
--# a file that usually has extension .p12 or .pfx)
--#CONFIG_PKCS12=y
--
--# Smartcard support (i.e., private key on a smartcard), e.g., with openssl
--# engine.
--#CONFIG_SMARTCARD=y
--
--# PC/SC interface for smartcards (USIM, GSM SIM)
--# Enable this if EAP-SIM or EAP-AKA is included
--#CONFIG_PCSC=y
--
--# Support HT overrides (disable HT/HT40, mask MCS rates, etc.)
--CONFIG_HT_OVERRIDES=y
--
--# Support VHT overrides (disable VHT, mask MCS rates, etc.)
--CONFIG_VHT_OVERRIDES=y
--
--# Development testing
--#CONFIG_EAPOL_TEST=y
--
--# Select control interface backend for external programs, e.g, wpa_cli:
--# unix = UNIX domain sockets (default for Linux/*BSD)
--# udp = UDP sockets using localhost (127.0.0.1)
--# udp6 = UDP IPv6 sockets using localhost (::1)
--# named_pipe = Windows Named Pipe (default for Windows)
--# udp-remote = UDP sockets with remote access (only for tests systems/purpose)
--# udp6-remote = UDP IPv6 sockets with remote access (only for tests purpose)
--# y = use default (backwards compatibility)
--# If this option is commented out, control interface is not included in the
--# build.
--CONFIG_CTRL_IFACE=y
--
--# Include support for GNU Readline and History Libraries in wpa_cli.
--# When building a wpa_cli binary for distribution, please note that these
--# libraries are licensed under GPL and as such, BSD license may not apply for
--# the resulting binary.
--#CONFIG_READLINE=y
--
--# Include internal line edit mode in wpa_cli. This can be used as a replacement
--# for GNU Readline to provide limited command line editing and history support.
--#CONFIG_WPA_CLI_EDIT=y
--
--# Remove debugging code that is printing out debug message to stdout.
--# This can be used to reduce the size of the wpa_supplicant considerably
--# if debugging code is not needed. The size reduction can be around 35%
--# (e.g., 90 kB).
--#CONFIG_NO_STDOUT_DEBUG=y
--
--# Remove WPA support, e.g., for wired-only IEEE 802.1X supplicant, to save
--# 35-50 kB in code size.
--#CONFIG_NO_WPA=y
--
--# Remove IEEE 802.11i/WPA-Personal ASCII passphrase support
--# This option can be used to reduce code size by removing support for
--# converting ASCII passphrases into PSK. If this functionality is removed, the
--# PSK can only be configured as the 64-octet hexstring (e.g., from
--# wpa_passphrase). This saves about 0.5 kB in code size.
--#CONFIG_NO_WPA_PASSPHRASE=y
--
--# Simultaneous Authentication of Equals (SAE), WPA3-Personal
--#CONFIG_SAE=y
--
--# Disable scan result processing (ap_mode=1) to save code size by about 1 kB.
--# This can be used if ap_scan=1 mode is never enabled.
--#CONFIG_NO_SCAN_PROCESSING=y
--
--# Select configuration backend:
--# file = text file (e.g., wpa_supplicant.conf; note: the configuration file
--#	path is given on command line, not here; this option is just used to
--#	select the backend that allows configuration files to be used)
--# winreg = Windows registry (see win_example.reg for an example)
--CONFIG_BACKEND=file
--
--# Remove configuration write functionality (i.e., to allow the configuration
--# file to be updated based on runtime configuration changes). The runtime
--# configuration can still be changed, the changes are just not going to be
--# persistent over restarts. This option can be used to reduce code size by
--# about 3.5 kB.
--CONFIG_NO_CONFIG_WRITE=y
--
--# Remove support for configuration blobs to reduce code size by about 1.5 kB.
--#CONFIG_NO_CONFIG_BLOBS=y
--
--# Select program entry point implementation:
--# main = UNIX/POSIX like main() function (default)
--# main_winsvc = Windows service (read parameters from registry)
--# main_none = Very basic example (development use only)
--#CONFIG_MAIN=main
--
--# Select wrapper for operating system and C library specific functions
--# unix = UNIX/POSIX like systems (default)
--# win32 = Windows systems
--# none = Empty template
--#CONFIG_OS=unix
--
--# Select event loop implementation
--# eloop = select() loop (default)
--# eloop_win = Windows events and WaitForMultipleObject() loop
--#CONFIG_ELOOP=eloop
--
--# Should we use poll instead of select? Select is used by default.
--#CONFIG_ELOOP_POLL=y
--
--# Should we use epoll instead of select? Select is used by default.
--CONFIG_ELOOP_EPOLL=y
--
--# Should we use kqueue instead of select? Select is used by default.
--#CONFIG_ELOOP_KQUEUE=y
--
--# Select layer 2 packet implementation
--# linux = Linux packet socket (default)
--# pcap = libpcap/libdnet/WinPcap
--# freebsd = FreeBSD libpcap
--# winpcap = WinPcap with receive thread
--# ndis = Windows NDISUIO (note: requires CONFIG_USE_NDISUIO=y)
--# none = Empty template
--#CONFIG_L2_PACKET=linux
--
--# Disable Linux packet socket workaround applicable for station interface
--# in a bridge for EAPOL frames. This should be uncommented only if the kernel
--# is known to not have the regression issue in packet socket behavior with
--# bridge interfaces (commit 'bridge: respect RFC2863 operational state')').
--CONFIG_NO_LINUX_PACKET_SOCKET_WAR=y
--
--# IEEE 802.11w (management frame protection), also known as PMF
--# Driver support is also needed for IEEE 802.11w.
--#CONFIG_IEEE80211W=y
--
--# Support Operating Channel Validation
--#CONFIG_OCV=y
--
--# Select TLS implementation
--# openssl = OpenSSL (default)
--# gnutls = GnuTLS
--# internal = Internal TLSv1 implementation (experimental)
--# linux = Linux kernel AF_ALG and internal TLSv1 implementation (experimental)
--# none = Empty template
--CONFIG_TLS=internal
--
--# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.1)
--# can be enabled to get a stronger construction of messages when block ciphers
--# are used. It should be noted that some existing TLS v1.0 -based
--# implementation may not be compatible with TLS v1.1 message (ClientHello is
--# sent prior to negotiating which version will be used)
--#CONFIG_TLSV11=y
--
--# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.2)
--# can be enabled to enable use of stronger crypto algorithms. It should be
--# noted that some existing TLS v1.0 -based implementation may not be compatible
--# with TLS v1.2 message (ClientHello is sent prior to negotiating which version
--# will be used)
--#CONFIG_TLSV12=y
--
--# Select which ciphers to use by default with OpenSSL if the user does not
--# specify them.
--#CONFIG_TLS_DEFAULT_CIPHERS="DEFAULT:!EXP:!LOW"
--
--# If CONFIG_TLS=internal is used, additional library and include paths are
--# needed for LibTomMath. Alternatively, an integrated, minimal version of
--# LibTomMath can be used. See beginning of libtommath.c for details on benefits
--# and drawbacks of this option.
--#CONFIG_INTERNAL_LIBTOMMATH=y
--#ifndef CONFIG_INTERNAL_LIBTOMMATH
--#LTM_PATH=/usr/src/libtommath-0.39
--#CFLAGS += -I$(LTM_PATH)
--#LIBS += -L$(LTM_PATH)
--#LIBS_p += -L$(LTM_PATH)
--#endif
--# At the cost of about 4 kB of additional binary size, the internal LibTomMath
--# can be configured to include faster routines for exptmod, sqr, and div to
--# speed up DH and RSA calculation considerably
--#CONFIG_INTERNAL_LIBTOMMATH_FAST=y
--
--# Include NDIS event processing through WMI into wpa_supplicant/wpasvc.
--# This is only for Windows builds and requires WMI-related header files and
--# WbemUuid.Lib from Platform SDK even when building with MinGW.
--#CONFIG_NDIS_EVENTS_INTEGRATED=y
--#PLATFORMSDKLIB="/opt/Program Files/Microsoft Platform SDK/Lib"
--
--# Add support for new DBus control interface
--# (fi.w1.hostap.wpa_supplicant1)
--#CONFIG_CTRL_IFACE_DBUS_NEW=y
--
--# Add introspection support for new DBus control interface
--#CONFIG_CTRL_IFACE_DBUS_INTRO=y
--
--# Add support for loading EAP methods dynamically as shared libraries.
--# When this option is enabled, each EAP method can be either included
--# statically (CONFIG_EAP_<method>=y) or dynamically (CONFIG_EAP_<method>=dyn).
--# Dynamic EAP methods are build as shared objects (eap_*.so) and they need to
--# be loaded in the beginning of the wpa_supplicant configuration file
--# (see load_dynamic_eap parameter in the example file) before being used in
--# the network blocks.
--#
--# Note that some shared parts of EAP methods are included in the main program
--# and in order to be able to use dynamic EAP methods using these parts, the
--# main program must have been build with the EAP method enabled (=y or =dyn).
--# This means that EAP-TLS/PEAP/TTLS/FAST cannot be added as dynamic libraries
--# unless at least one of them was included in the main build to force inclusion
--# of the shared code. Similarly, at least one of EAP-SIM/AKA must be included
--# in the main build to be able to load these methods dynamically.
--#
--# Please also note that using dynamic libraries will increase the total binary
--# size. Thus, it may not be the best option for targets that have limited
--# amount of memory/flash.
--#CONFIG_DYNAMIC_EAP_METHODS=y
--
--# IEEE Std 802.11r-2008 (Fast BSS Transition) for station mode
--CONFIG_IEEE80211R=y
--
--# Add support for writing debug log to a file (/tmp/wpa_supplicant-log-#.txt)
--#CONFIG_DEBUG_FILE=y
--
--# Send debug messages to syslog instead of stdout
--CONFIG_DEBUG_SYSLOG=y
--# Set syslog facility for debug messages
--CONFIG_DEBUG_SYSLOG_FACILITY=LOG_DAEMON
--
--# Add support for sending all debug messages (regardless of debug verbosity)
--# to the Linux kernel tracing facility. This helps debug the entire stack by
--# making it easy to record everything happening from the driver up into the
--# same file, e.g., using trace-cmd.
--#CONFIG_DEBUG_LINUX_TRACING=y
--
--# Add support for writing debug log to Android logcat instead of standard
--# output
--#CONFIG_ANDROID_LOG=y
--
--# Enable privilege separation (see README 'Privilege separation' for details)
--#CONFIG_PRIVSEP=y
--
--# Enable mitigation against certain attacks against TKIP by delaying Michael
--# MIC error reports by a random amount of time between 0 and 60 seconds
--#CONFIG_DELAYED_MIC_ERROR_REPORT=y
--
--# Enable tracing code for developer debugging
--# This tracks use of memory allocations and other registrations and reports
--# incorrect use with a backtrace of call (or allocation) location.
--#CONFIG_WPA_TRACE=y
--# For BSD, uncomment these.
--#LIBS += -lexecinfo
--#LIBS_p += -lexecinfo
--#LIBS_c += -lexecinfo
--
--# Use libbfd to get more details for developer debugging
--# This enables use of libbfd to get more detailed symbols for the backtraces
--# generated by CONFIG_WPA_TRACE=y.
--#CONFIG_WPA_TRACE_BFD=y
--# For BSD, uncomment these.
--#LIBS += -lbfd -liberty -lz
--#LIBS_p += -lbfd -liberty -lz
--#LIBS_c += -lbfd -liberty -lz
--
--# wpa_supplicant depends on strong random number generation being available
--# from the operating system. os_get_random() function is used to fetch random
--# data when needed, e.g., for key generation. On Linux and BSD systems, this
--# works by reading /dev/urandom. It should be noted that the OS entropy pool
--# needs to be properly initialized before wpa_supplicant is started. This is
--# important especially on embedded devices that do not have a hardware random
--# number generator and may by default start up with minimal entropy available
--# for random number generation.
--#
--# As a safety net, wpa_supplicant is by default trying to internally collect
--# additional entropy for generating random data to mix in with the data fetched
--# from the OS. This by itself is not considered to be very strong, but it may
--# help in cases where the system pool is not initialized properly. However, it
--# is very strongly recommended that the system pool is initialized with enough
--# entropy either by using hardware assisted random number generator or by
--# storing state over device reboots.
--#
--# wpa_supplicant can be configured to maintain its own entropy store over
--# restarts to enhance random number generation. This is not perfect, but it is
--# much more secure than using the same sequence of random numbers after every
--# reboot. This can be enabled with -e<entropy file> command line option. The
--# specified file needs to be readable and writable by wpa_supplicant.
--#
--# If the os_get_random() is known to provide strong random data (e.g., on
--# Linux/BSD, the board in question is known to have reliable source of random
--# data from /dev/urandom), the internal wpa_supplicant random pool can be
--# disabled. This will save some in binary size and CPU use. However, this
--# should only be considered for builds that are known to be used on devices
--# that meet the requirements described above.
--CONFIG_NO_RANDOM_POOL=y
--
--# Should we attempt to use the getrandom(2) call that provides more reliable
--# yet secure randomness source than /dev/random on Linux 3.17 and newer.
--# Requires glibc 2.25 to build, falls back to /dev/random if unavailable.
--CONFIG_GETRANDOM=y
--
--# IEEE 802.11n (High Throughput) support (mainly for AP mode)
--#CONFIG_IEEE80211N=y
--
--# IEEE 802.11ac (Very High Throughput) support (mainly for AP mode)
--# (depends on CONFIG_IEEE80211N)
--#CONFIG_IEEE80211AC=y
--
--# Wireless Network Management (IEEE Std 802.11v-2011)
--# Note: This is experimental and not complete implementation.
--#CONFIG_WNM=y
--
--# Interworking (IEEE 802.11u)
--# This can be used to enable functionality to improve interworking with
--# external networks (GAS/ANQP to learn more about the networks and network
--# selection based on available credentials).
--#CONFIG_INTERWORKING=y
--
--# Hotspot 2.0
--#CONFIG_HS20=y
--
--# Enable interface matching in wpa_supplicant
--#CONFIG_MATCH_IFACE=y
--
--# Disable roaming in wpa_supplicant
--#CONFIG_NO_ROAMING=y
--
--# AP mode operations with wpa_supplicant
--# This can be used for controlling AP mode operations with wpa_supplicant. It
--# should be noted that this is mainly aimed at simple cases like
--# WPA2-Personal while more complex configurations like WPA2-Enterprise with an
--# external RADIUS server can be supported with hostapd.
--#CONFIG_AP=y
--
--# P2P (Wi-Fi Direct)
--# This can be used to enable P2P support in wpa_supplicant. See README-P2P for
--# more information on P2P operations.
--#CONFIG_P2P=y
--
--# Enable TDLS support
--#CONFIG_TDLS=y
--
--# Wi-Fi Display
--# This can be used to enable Wi-Fi Display extensions for P2P using an external
--# program to control the additional information exchanges in the messages.
--#CONFIG_WIFI_DISPLAY=y
--
--# Autoscan
--# This can be used to enable automatic scan support in wpa_supplicant.
--# See wpa_supplicant.conf for more information on autoscan usage.
--#
--# Enabling directly a module will enable autoscan support.
--# For exponential module:
--#CONFIG_AUTOSCAN_EXPONENTIAL=y
--# For periodic module:
--#CONFIG_AUTOSCAN_PERIODIC=y
--
--# Password (and passphrase, etc.) backend for external storage
--# These optional mechanisms can be used to add support for storing passwords
--# and other secrets in external (to wpa_supplicant) location. This allows, for
--# example, operating system specific key storage to be used
--#
--# External password backend for testing purposes (developer use)
--#CONFIG_EXT_PASSWORD_TEST=y
--
--# Enable Fast Session Transfer (FST)
--#CONFIG_FST=y
--
--# Enable CLI commands for FST testing
--#CONFIG_FST_TEST=y
--
--# OS X builds. This is only for building eapol_test.
--#CONFIG_OSX=y
--
--# Automatic Channel Selection
--# This will allow wpa_supplicant to pick the channel automatically when channel
--# is set to "0".
--#
--# TODO: Extend parser to be able to parse "channel=acs_survey" as an alternative
--# to "channel=0". This would enable us to eventually add other ACS algorithms in
--# similar way.
--#
--# Automatic selection is currently only done through initialization, later on
--# we hope to do background checks to keep us moving to more ideal channels as
--# time goes by. ACS is currently only supported through the nl80211 driver and
--# your driver must have survey dump capability that is filled by the driver
--# during scanning.
--#
--# TODO: In analogy to hostapd be able to customize the ACS survey algorithm with
--# a newly to create wpa_supplicant.conf variable acs_num_scans.
--#
--# Supported ACS drivers:
--# * ath9k
--# * ath5k
--# * ath10k
--#
--# For more details refer to:
--# http://wireless.kernel.org/en/users/Documentation/acs
--#CONFIG_ACS=y
--
--# Support Multi Band Operation
--#CONFIG_MBO=y
--
--# Fast Initial Link Setup (FILS) (IEEE 802.11ai)
--#CONFIG_FILS=y
--# FILS shared key authentication with PFS
--#CONFIG_FILS_SK_PFS=y
--
--# Support RSN on IBSS networks
--# This is needed to be able to use mode=1 network profile with proto=RSN and
--# key_mgmt=WPA-PSK (i.e., full key management instead of WPA-None).
--#CONFIG_IBSS_RSN=y
--
--# External PMKSA cache control
--# This can be used to enable control interface commands that allow the current
--# PMKSA cache entries to be fetched and new entries to be added.
--#CONFIG_PMKSA_CACHE_EXTERNAL=y
--
--# Mesh Networking (IEEE 802.11s)
--#CONFIG_MESH=y
--
--# Background scanning modules
--# These can be used to request wpa_supplicant to perform background scanning
--# operations for roaming within an ESS (same SSID). See the bgscan parameter in
--# the wpa_supplicant.conf file for more details.
--# Periodic background scans based on signal strength
--#CONFIG_BGSCAN_SIMPLE=y
--# Learn channels used by the network and try to avoid bgscans on other
--# channels (experimental)
--#CONFIG_BGSCAN_LEARN=y
--
--# Opportunistic Wireless Encryption (OWE)
--# Experimental implementation of draft-harkins-owe-07.txt
--#CONFIG_OWE=y
--
--# Device Provisioning Protocol (DPP)
--# This requires CONFIG_IEEE80211W=y to be enabled, too. (see
--# wpa_supplicant/README-DPP for details)
--#CONFIG_DPP=y
--
--# uBus IPC/RPC System
--# Services can connect to the bus and provide methods
--# that can be called by other services or clients.
--CONFIG_UBUS=y
--
--# OpenWrt patch 380-disable-ctrl-iface-mib.patch
--# leads to the MIB only being compiled in if
--# CONFIG_CTRL_IFACE_MIB is enabled.
--#CONFIG_CTRL_IFACE_MIB=y
-diff --git a/package/network/services/hostapd/files/wpa_supplicant-full.config b/package/network/services/hostapd/files/wpa_supplicant-full.config
-deleted file mode 100644
-index b3e85d073d..0000000000
---- a/package/network/services/hostapd/files/wpa_supplicant-full.config
-+++ /dev/null
-@@ -1,625 +0,0 @@
--# Example wpa_supplicant build time configuration
--#
--# This file lists the configuration options that are used when building the
--# wpa_supplicant binary. All lines starting with # are ignored. Configuration
--# option lines must be commented out complete, if they are not to be included,
--# i.e., just setting VARIABLE=n is not disabling that variable.
--#
--# This file is included in Makefile, so variables like CFLAGS and LIBS can also
--# be modified from here. In most cases, these lines should use += in order not
--# to override previous values of the variables.
--
--
--# Uncomment following two lines and fix the paths if you have installed OpenSSL
--# or GnuTLS in non-default location
--#CFLAGS += -I/usr/local/openssl/include
--#LIBS += -L/usr/local/openssl/lib
--
--# Some Red Hat versions seem to include kerberos header files from OpenSSL, but
--# the kerberos files are not in the default include path. Following line can be
--# used to fix build issues on such systems (krb5.h not found).
--#CFLAGS += -I/usr/include/kerberos
--
--# Driver interface for generic Linux wireless extensions
--# Note: WEXT is deprecated in the current Linux kernel version and no new
--# functionality is added to it. nl80211-based interface is the new
--# replacement for WEXT and its use allows wpa_supplicant to properly control
--# the driver to improve existing functionality like roaming and to support new
--# functionality.
--CONFIG_DRIVER_WEXT=y
--
--# Driver interface for Linux drivers using the nl80211 kernel interface
--CONFIG_DRIVER_NL80211=y
--
--# QCA vendor extensions to nl80211
--#CONFIG_DRIVER_NL80211_QCA=y
--
--# driver_nl80211.c requires libnl. If you are compiling it yourself
--# you may need to point hostapd to your version of libnl.
--#
--#CFLAGS += -I$<path to libnl include files>
--#LIBS += -L$<path to libnl library files>
--
--# Use libnl v2.0 (or 3.0) libraries.
--#CONFIG_LIBNL20=y
--
--# Use libnl 3.2 libraries (if this is selected, CONFIG_LIBNL20 is ignored)
--#CONFIG_LIBNL32=y
--
--
--# Driver interface for FreeBSD net80211 layer (e.g., Atheros driver)
--#CONFIG_DRIVER_BSD=y
--#CFLAGS += -I/usr/local/include
--#LIBS += -L/usr/local/lib
--#LIBS_p += -L/usr/local/lib
--#LIBS_c += -L/usr/local/lib
--
--# Driver interface for Windows NDIS
--#CONFIG_DRIVER_NDIS=y
--#CFLAGS += -I/usr/include/w32api/ddk
--#LIBS += -L/usr/local/lib
--# For native build using mingw
--#CONFIG_NATIVE_WINDOWS=y
--# Additional directories for cross-compilation on Linux host for mingw target
--#CFLAGS += -I/opt/mingw/mingw32/include/ddk
--#LIBS += -L/opt/mingw/mingw32/lib
--#CC=mingw32-gcc
--# By default, driver_ndis uses WinPcap for low-level operations. This can be
--# replaced with the following option which replaces WinPcap calls with NDISUIO.
--# However, this requires that WZC is disabled (net stop wzcsvc) before starting
--# wpa_supplicant.
--# CONFIG_USE_NDISUIO=y
--
--# Driver interface for wired Ethernet drivers
--CONFIG_DRIVER_WIRED=y
--
--# Driver interface for MACsec capable Qualcomm Atheros drivers
--#CONFIG_DRIVER_MACSEC_QCA=y
--
--# Driver interface for Linux MACsec drivers
--#CONFIG_DRIVER_MACSEC_LINUX=y
--
--# Driver interface for the Broadcom RoboSwitch family
--#CONFIG_DRIVER_ROBOSWITCH=y
--
--# Driver interface for no driver (e.g., WPS ER only)
--#CONFIG_DRIVER_NONE=y
--
--# Solaris libraries
--#LIBS += -lsocket -ldlpi -lnsl
--#LIBS_c += -lsocket
--
--# Enable IEEE 802.1X Supplicant (automatically included if any EAP method or
--# MACsec is included)
--CONFIG_IEEE8021X_EAPOL=y
--
--# EAP-MD5
--CONFIG_EAP_MD5=y
--
--# EAP-MSCHAPv2
--CONFIG_EAP_MSCHAPV2=y
--
--# EAP-TLS
--CONFIG_EAP_TLS=y
--
--# EAL-PEAP
--CONFIG_EAP_PEAP=y
--
--# EAP-TTLS
--CONFIG_EAP_TTLS=y
--
--# EAP-FAST
--CONFIG_EAP_FAST=y
--
--# EAP-TEAP
--# Note: The current EAP-TEAP implementation is experimental and should not be
--# enabled for production use. The IETF RFC 7170 that defines EAP-TEAP has number
--# of conflicting statements and missing details and the implementation has
--# vendor specific workarounds for those and as such, may not interoperate with
--# any other implementation. This should not be used for anything else than
--# experimentation and interoperability testing until those issues has been
--# resolved.
--#CONFIG_EAP_TEAP=y
--
--# EAP-GTC
--CONFIG_EAP_GTC=y
--
--# EAP-OTP
--CONFIG_EAP_OTP=y
--
--# EAP-SIM (enable CONFIG_PCSC, if EAP-SIM is used)
--#CONFIG_EAP_SIM=y
--
--# Enable SIM simulator (Milenage) for EAP-SIM
--#CONFIG_SIM_SIMULATOR=y
--
--# EAP-PSK (experimental; this is _not_ needed for WPA-PSK)
--#CONFIG_EAP_PSK=y
--
--# EAP-pwd (secure authentication using only a password)
--#CONFIG_EAP_PWD=y
--
--# EAP-PAX
--#CONFIG_EAP_PAX=y
--
--# LEAP
--CONFIG_EAP_LEAP=y
--
--# EAP-AKA (enable CONFIG_PCSC, if EAP-AKA is used)
--#CONFIG_EAP_AKA=y
--
--# EAP-AKA' (enable CONFIG_PCSC, if EAP-AKA' is used).
--# This requires CONFIG_EAP_AKA to be enabled, too.
--#CONFIG_EAP_AKA_PRIME=y
--
--# Enable USIM simulator (Milenage) for EAP-AKA
--#CONFIG_USIM_SIMULATOR=y
--
--# EAP-SAKE
--#CONFIG_EAP_SAKE=y
--
--# EAP-GPSK
--#CONFIG_EAP_GPSK=y
--# Include support for optional SHA256 cipher suite in EAP-GPSK
--#CONFIG_EAP_GPSK_SHA256=y
--
--# EAP-TNC and related Trusted Network Connect support (experimental)
--#CONFIG_EAP_TNC=y
--
--# Wi-Fi Protected Setup (WPS)
--CONFIG_WPS=y
--# Enable WPS external registrar functionality
--#CONFIG_WPS_ER=y
--# Disable credentials for an open network by default when acting as a WPS
--# registrar.
--#CONFIG_WPS_REG_DISABLE_OPEN=y
--# Enable WPS support with NFC config method
--#CONFIG_WPS_NFC=y
--
--# EAP-IKEv2
--#CONFIG_EAP_IKEV2=y
--
--# EAP-EKE
--#CONFIG_EAP_EKE=y
--
--# MACsec
--#CONFIG_MACSEC=y
--
--# PKCS#12 (PFX) support (used to read private key and certificate file from
--# a file that usually has extension .p12 or .pfx)
--CONFIG_PKCS12=y
--
--# Smartcard support (i.e., private key on a smartcard), e.g., with openssl
--# engine.
--CONFIG_SMARTCARD=y
--
--# PC/SC interface for smartcards (USIM, GSM SIM)
--# Enable this if EAP-SIM or EAP-AKA is included
--#CONFIG_PCSC=y
--
--# Support HT overrides (disable HT/HT40, mask MCS rates, etc.)
--CONFIG_HT_OVERRIDES=y
--
--# Support VHT overrides (disable VHT, mask MCS rates, etc.)
--CONFIG_VHT_OVERRIDES=y
--
--# Development testing
--#CONFIG_EAPOL_TEST=y
--
--# Select control interface backend for external programs, e.g, wpa_cli:
--# unix = UNIX domain sockets (default for Linux/*BSD)
--# udp = UDP sockets using localhost (127.0.0.1)
--# udp6 = UDP IPv6 sockets using localhost (::1)
--# named_pipe = Windows Named Pipe (default for Windows)
--# udp-remote = UDP sockets with remote access (only for tests systems/purpose)
--# udp6-remote = UDP IPv6 sockets with remote access (only for tests purpose)
--# y = use default (backwards compatibility)
--# If this option is commented out, control interface is not included in the
--# build.
--CONFIG_CTRL_IFACE=y
--
--# Include support for GNU Readline and History Libraries in wpa_cli.
--# When building a wpa_cli binary for distribution, please note that these
--# libraries are licensed under GPL and as such, BSD license may not apply for
--# the resulting binary.
--#CONFIG_READLINE=y
--
--# Include internal line edit mode in wpa_cli. This can be used as a replacement
--# for GNU Readline to provide limited command line editing and history support.
--#CONFIG_WPA_CLI_EDIT=y
--
--# Remove debugging code that is printing out debug message to stdout.
--# This can be used to reduce the size of the wpa_supplicant considerably
--# if debugging code is not needed. The size reduction can be around 35%
--# (e.g., 90 kB).
--#CONFIG_NO_STDOUT_DEBUG=y
--
--# Remove WPA support, e.g., for wired-only IEEE 802.1X supplicant, to save
--# 35-50 kB in code size.
--#CONFIG_NO_WPA=y
--
--# Remove IEEE 802.11i/WPA-Personal ASCII passphrase support
--# This option can be used to reduce code size by removing support for
--# converting ASCII passphrases into PSK. If this functionality is removed, the
--# PSK can only be configured as the 64-octet hexstring (e.g., from
--# wpa_passphrase). This saves about 0.5 kB in code size.
--#CONFIG_NO_WPA_PASSPHRASE=y
--
--# Simultaneous Authentication of Equals (SAE), WPA3-Personal
--#CONFIG_SAE=y
--
--# Disable scan result processing (ap_mode=1) to save code size by about 1 kB.
--# This can be used if ap_scan=1 mode is never enabled.
--#CONFIG_NO_SCAN_PROCESSING=y
--
--# Select configuration backend:
--# file = text file (e.g., wpa_supplicant.conf; note: the configuration file
--#	path is given on command line, not here; this option is just used to
--#	select the backend that allows configuration files to be used)
--# winreg = Windows registry (see win_example.reg for an example)
--CONFIG_BACKEND=file
--
--# Remove configuration write functionality (i.e., to allow the configuration
--# file to be updated based on runtime configuration changes). The runtime
--# configuration can still be changed, the changes are just not going to be
--# persistent over restarts. This option can be used to reduce code size by
--# about 3.5 kB.
--#CONFIG_NO_CONFIG_WRITE=y
--
--# Remove support for configuration blobs to reduce code size by about 1.5 kB.
--#CONFIG_NO_CONFIG_BLOBS=y
--
--# Select program entry point implementation:
--# main = UNIX/POSIX like main() function (default)
--# main_winsvc = Windows service (read parameters from registry)
--# main_none = Very basic example (development use only)
--#CONFIG_MAIN=main
--
--# Select wrapper for operating system and C library specific functions
--# unix = UNIX/POSIX like systems (default)
--# win32 = Windows systems
--# none = Empty template
--#CONFIG_OS=unix
--
--# Select event loop implementation
--# eloop = select() loop (default)
--# eloop_win = Windows events and WaitForMultipleObject() loop
--#CONFIG_ELOOP=eloop
--
--# Should we use poll instead of select? Select is used by default.
--#CONFIG_ELOOP_POLL=y
--
--# Should we use epoll instead of select? Select is used by default.
--CONFIG_ELOOP_EPOLL=y
--
--# Should we use kqueue instead of select? Select is used by default.
--#CONFIG_ELOOP_KQUEUE=y
--
--# Select layer 2 packet implementation
--# linux = Linux packet socket (default)
--# pcap = libpcap/libdnet/WinPcap
--# freebsd = FreeBSD libpcap
--# winpcap = WinPcap with receive thread
--# ndis = Windows NDISUIO (note: requires CONFIG_USE_NDISUIO=y)
--# none = Empty template
--#CONFIG_L2_PACKET=linux
--
--# Disable Linux packet socket workaround applicable for station interface
--# in a bridge for EAPOL frames. This should be uncommented only if the kernel
--# is known to not have the regression issue in packet socket behavior with
--# bridge interfaces (commit 'bridge: respect RFC2863 operational state')').
--CONFIG_NO_LINUX_PACKET_SOCKET_WAR=y
--
--# IEEE 802.11w (management frame protection), also known as PMF
--# Driver support is also needed for IEEE 802.11w.
--#CONFIG_IEEE80211W=y
--
--# Support Operating Channel Validation
--#CONFIG_OCV=y
--
--# Select TLS implementation
--# openssl = OpenSSL (default)
--# gnutls = GnuTLS
--# internal = Internal TLSv1 implementation (experimental)
--# linux = Linux kernel AF_ALG and internal TLSv1 implementation (experimental)
--# none = Empty template
--CONFIG_TLS=internal
--
--# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.1)
--# can be enabled to get a stronger construction of messages when block ciphers
--# are used. It should be noted that some existing TLS v1.0 -based
--# implementation may not be compatible with TLS v1.1 message (ClientHello is
--# sent prior to negotiating which version will be used)
--#CONFIG_TLSV11=y
--
--# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.2)
--# can be enabled to enable use of stronger crypto algorithms. It should be
--# noted that some existing TLS v1.0 -based implementation may not be compatible
--# with TLS v1.2 message (ClientHello is sent prior to negotiating which version
--# will be used)
--#CONFIG_TLSV12=y
--
--# Select which ciphers to use by default with OpenSSL if the user does not
--# specify them.
--#CONFIG_TLS_DEFAULT_CIPHERS="DEFAULT:!EXP:!LOW"
--
--# If CONFIG_TLS=internal is used, additional library and include paths are
--# needed for LibTomMath. Alternatively, an integrated, minimal version of
--# LibTomMath can be used. See beginning of libtommath.c for details on benefits
--# and drawbacks of this option.
--CONFIG_INTERNAL_LIBTOMMATH=y
--#ifndef CONFIG_INTERNAL_LIBTOMMATH
--#LTM_PATH=/usr/src/libtommath-0.39
--#CFLAGS += -I$(LTM_PATH)
--#LIBS += -L$(LTM_PATH)
--#LIBS_p += -L$(LTM_PATH)
--#endif
--# At the cost of about 4 kB of additional binary size, the internal LibTomMath
--# can be configured to include faster routines for exptmod, sqr, and div to
--# speed up DH and RSA calculation considerably
--CONFIG_INTERNAL_LIBTOMMATH_FAST=y
--
--# Include NDIS event processing through WMI into wpa_supplicant/wpasvc.
--# This is only for Windows builds and requires WMI-related header files and
--# WbemUuid.Lib from Platform SDK even when building with MinGW.
--#CONFIG_NDIS_EVENTS_INTEGRATED=y
--#PLATFORMSDKLIB="/opt/Program Files/Microsoft Platform SDK/Lib"
--
--# Add support for new DBus control interface
--# (fi.w1.hostap.wpa_supplicant1)
--#CONFIG_CTRL_IFACE_DBUS_NEW=y
--
--# Add introspection support for new DBus control interface
--#CONFIG_CTRL_IFACE_DBUS_INTRO=y
--
--# Add support for loading EAP methods dynamically as shared libraries.
--# When this option is enabled, each EAP method can be either included
--# statically (CONFIG_EAP_<method>=y) or dynamically (CONFIG_EAP_<method>=dyn).
--# Dynamic EAP methods are build as shared objects (eap_*.so) and they need to
--# be loaded in the beginning of the wpa_supplicant configuration file
--# (see load_dynamic_eap parameter in the example file) before being used in
--# the network blocks.
--#
--# Note that some shared parts of EAP methods are included in the main program
--# and in order to be able to use dynamic EAP methods using these parts, the
--# main program must have been build with the EAP method enabled (=y or =dyn).
--# This means that EAP-TLS/PEAP/TTLS/FAST cannot be added as dynamic libraries
--# unless at least one of them was included in the main build to force inclusion
--# of the shared code. Similarly, at least one of EAP-SIM/AKA must be included
--# in the main build to be able to load these methods dynamically.
--#
--# Please also note that using dynamic libraries will increase the total binary
--# size. Thus, it may not be the best option for targets that have limited
--# amount of memory/flash.
--#CONFIG_DYNAMIC_EAP_METHODS=y
--
--# IEEE Std 802.11r-2008 (Fast BSS Transition) for station mode
--CONFIG_IEEE80211R=y
--
--# Add support for writing debug log to a file (/tmp/wpa_supplicant-log-#.txt)
--#CONFIG_DEBUG_FILE=y
--
--# Send debug messages to syslog instead of stdout
--CONFIG_DEBUG_SYSLOG=y
--# Set syslog facility for debug messages
--CONFIG_DEBUG_SYSLOG_FACILITY=LOG_DAEMON
--
--# Add support for sending all debug messages (regardless of debug verbosity)
--# to the Linux kernel tracing facility. This helps debug the entire stack by
--# making it easy to record everything happening from the driver up into the
--# same file, e.g., using trace-cmd.
--#CONFIG_DEBUG_LINUX_TRACING=y
--
--# Add support for writing debug log to Android logcat instead of standard
--# output
--#CONFIG_ANDROID_LOG=y
--
--# Enable privilege separation (see README 'Privilege separation' for details)
--#CONFIG_PRIVSEP=y
--
--# Enable mitigation against certain attacks against TKIP by delaying Michael
--# MIC error reports by a random amount of time between 0 and 60 seconds
--#CONFIG_DELAYED_MIC_ERROR_REPORT=y
--
--# Enable tracing code for developer debugging
--# This tracks use of memory allocations and other registrations and reports
--# incorrect use with a backtrace of call (or allocation) location.
--#CONFIG_WPA_TRACE=y
--# For BSD, uncomment these.
--#LIBS += -lexecinfo
--#LIBS_p += -lexecinfo
--#LIBS_c += -lexecinfo
--
--# Use libbfd to get more details for developer debugging
--# This enables use of libbfd to get more detailed symbols for the backtraces
--# generated by CONFIG_WPA_TRACE=y.
--#CONFIG_WPA_TRACE_BFD=y
--# For BSD, uncomment these.
--#LIBS += -lbfd -liberty -lz
--#LIBS_p += -lbfd -liberty -lz
--#LIBS_c += -lbfd -liberty -lz
--
--# wpa_supplicant depends on strong random number generation being available
--# from the operating system. os_get_random() function is used to fetch random
--# data when needed, e.g., for key generation. On Linux and BSD systems, this
--# works by reading /dev/urandom. It should be noted that the OS entropy pool
--# needs to be properly initialized before wpa_supplicant is started. This is
--# important especially on embedded devices that do not have a hardware random
--# number generator and may by default start up with minimal entropy available
--# for random number generation.
--#
--# As a safety net, wpa_supplicant is by default trying to internally collect
--# additional entropy for generating random data to mix in with the data fetched
--# from the OS. This by itself is not considered to be very strong, but it may
--# help in cases where the system pool is not initialized properly. However, it
--# is very strongly recommended that the system pool is initialized with enough
--# entropy either by using hardware assisted random number generator or by
--# storing state over device reboots.
--#
--# wpa_supplicant can be configured to maintain its own entropy store over
--# restarts to enhance random number generation. This is not perfect, but it is
--# much more secure than using the same sequence of random numbers after every
--# reboot. This can be enabled with -e<entropy file> command line option. The
--# specified file needs to be readable and writable by wpa_supplicant.
--#
--# If the os_get_random() is known to provide strong random data (e.g., on
--# Linux/BSD, the board in question is known to have reliable source of random
--# data from /dev/urandom), the internal wpa_supplicant random pool can be
--# disabled. This will save some in binary size and CPU use. However, this
--# should only be considered for builds that are known to be used on devices
--# that meet the requirements described above.
--CONFIG_NO_RANDOM_POOL=y
--
--# Should we attempt to use the getrandom(2) call that provides more reliable
--# yet secure randomness source than /dev/random on Linux 3.17 and newer.
--# Requires glibc 2.25 to build, falls back to /dev/random if unavailable.
--CONFIG_GETRANDOM=y
--
--# IEEE 802.11n (High Throughput) support (mainly for AP mode)
--#CONFIG_IEEE80211N=y
--
--# IEEE 802.11ac (Very High Throughput) support (mainly for AP mode)
--# (depends on CONFIG_IEEE80211N)
--#CONFIG_IEEE80211AC=y
--
--# Wireless Network Management (IEEE Std 802.11v-2011)
--# Note: This is experimental and not complete implementation.
--CONFIG_WNM=y
--
--# Interworking (IEEE 802.11u)
--# This can be used to enable functionality to improve interworking with
--# external networks (GAS/ANQP to learn more about the networks and network
--# selection based on available credentials).
--CONFIG_INTERWORKING=y
--
--# Hotspot 2.0
--CONFIG_HS20=y
--
--# Enable interface matching in wpa_supplicant
--#CONFIG_MATCH_IFACE=y
--
--# Disable roaming in wpa_supplicant
--#CONFIG_NO_ROAMING=y
--
--# AP mode operations with wpa_supplicant
--# This can be used for controlling AP mode operations with wpa_supplicant. It
--# should be noted that this is mainly aimed at simple cases like
--# WPA2-Personal while more complex configurations like WPA2-Enterprise with an
--# external RADIUS server can be supported with hostapd.
--#CONFIG_AP=y
--
--# P2P (Wi-Fi Direct)
--# This can be used to enable P2P support in wpa_supplicant. See README-P2P for
--# more information on P2P operations.
--#CONFIG_P2P=y
--
--# Enable TDLS support
--#CONFIG_TDLS=y
--
--# Wi-Fi Display
--# This can be used to enable Wi-Fi Display extensions for P2P using an external
--# program to control the additional information exchanges in the messages.
--#CONFIG_WIFI_DISPLAY=y
--
--# Autoscan
--# This can be used to enable automatic scan support in wpa_supplicant.
--# See wpa_supplicant.conf for more information on autoscan usage.
--#
--# Enabling directly a module will enable autoscan support.
--# For exponential module:
--#CONFIG_AUTOSCAN_EXPONENTIAL=y
--# For periodic module:
--#CONFIG_AUTOSCAN_PERIODIC=y
--
--# Password (and passphrase, etc.) backend for external storage
--# These optional mechanisms can be used to add support for storing passwords
--# and other secrets in external (to wpa_supplicant) location. This allows, for
--# example, operating system specific key storage to be used
--#
--# External password backend for testing purposes (developer use)
--#CONFIG_EXT_PASSWORD_TEST=y
--
--# Enable Fast Session Transfer (FST)
--#CONFIG_FST=y
--
--# Enable CLI commands for FST testing
--#CONFIG_FST_TEST=y
--
--# OS X builds. This is only for building eapol_test.
--#CONFIG_OSX=y
--
--# Automatic Channel Selection
--# This will allow wpa_supplicant to pick the channel automatically when channel
--# is set to "0".
--#
--# TODO: Extend parser to be able to parse "channel=acs_survey" as an alternative
--# to "channel=0". This would enable us to eventually add other ACS algorithms in
--# similar way.
--#
--# Automatic selection is currently only done through initialization, later on
--# we hope to do background checks to keep us moving to more ideal channels as
--# time goes by. ACS is currently only supported through the nl80211 driver and
--# your driver must have survey dump capability that is filled by the driver
--# during scanning.
--#
--# TODO: In analogy to hostapd be able to customize the ACS survey algorithm with
--# a newly to create wpa_supplicant.conf variable acs_num_scans.
--#
--# Supported ACS drivers:
--# * ath9k
--# * ath5k
--# * ath10k
--#
--# For more details refer to:
--# http://wireless.kernel.org/en/users/Documentation/acs
--#CONFIG_ACS=y
--
--# Support Multi Band Operation
--#CONFIG_MBO=y
--
--# Fast Initial Link Setup (FILS) (IEEE 802.11ai)
--#CONFIG_FILS=y
--# FILS shared key authentication with PFS
--#CONFIG_FILS_SK_PFS=y
--
--# Support RSN on IBSS networks
--# This is needed to be able to use mode=1 network profile with proto=RSN and
--# key_mgmt=WPA-PSK (i.e., full key management instead of WPA-None).
--CONFIG_IBSS_RSN=y
--
--# External PMKSA cache control
--# This can be used to enable control interface commands that allow the current
--# PMKSA cache entries to be fetched and new entries to be added.
--#CONFIG_PMKSA_CACHE_EXTERNAL=y
--
--# Mesh Networking (IEEE 802.11s)
--#CONFIG_MESH=y
--
--# Background scanning modules
--# These can be used to request wpa_supplicant to perform background scanning
--# operations for roaming within an ESS (same SSID). See the bgscan parameter in
--# the wpa_supplicant.conf file for more details.
--# Periodic background scans based on signal strength
--#CONFIG_BGSCAN_SIMPLE=y
--# Learn channels used by the network and try to avoid bgscans on other
--# channels (experimental)
--#CONFIG_BGSCAN_LEARN=y
--
--# Opportunistic Wireless Encryption (OWE)
--# Experimental implementation of draft-harkins-owe-07.txt
--#CONFIG_OWE=y
--
--# Device Provisioning Protocol (DPP)
--# This requires CONFIG_IEEE80211W=y to be enabled, too. (see
--# wpa_supplicant/README-DPP for details)
--#CONFIG_DPP=y
--
--# uBus IPC/RPC System
--# Services can connect to the bus and provide methods
--# that can be called by other services or clients.
--CONFIG_UBUS=y
--
--# OpenWrt patch 380-disable-ctrl-iface-mib.patch
--# leads to the MIB only being compiled in if
--# CONFIG_CTRL_IFACE_MIB is enabled.
--CONFIG_CTRL_IFACE_MIB=y
-diff --git a/package/network/services/hostapd/files/wpa_supplicant-mini.config b/package/network/services/hostapd/files/wpa_supplicant-mini.config
-deleted file mode 100644
-index 9eb1111e52..0000000000
---- a/package/network/services/hostapd/files/wpa_supplicant-mini.config
-+++ /dev/null
-@@ -1,625 +0,0 @@
--# Example wpa_supplicant build time configuration
--#
--# This file lists the configuration options that are used when building the
--# wpa_supplicant binary. All lines starting with # are ignored. Configuration
--# option lines must be commented out complete, if they are not to be included,
--# i.e., just setting VARIABLE=n is not disabling that variable.
--#
--# This file is included in Makefile, so variables like CFLAGS and LIBS can also
--# be modified from here. In most cases, these lines should use += in order not
--# to override previous values of the variables.
--
--
--# Uncomment following two lines and fix the paths if you have installed OpenSSL
--# or GnuTLS in non-default location
--#CFLAGS += -I/usr/local/openssl/include
--#LIBS += -L/usr/local/openssl/lib
--
--# Some Red Hat versions seem to include kerberos header files from OpenSSL, but
--# the kerberos files are not in the default include path. Following line can be
--# used to fix build issues on such systems (krb5.h not found).
--#CFLAGS += -I/usr/include/kerberos
--
--# Driver interface for generic Linux wireless extensions
--# Note: WEXT is deprecated in the current Linux kernel version and no new
--# functionality is added to it. nl80211-based interface is the new
--# replacement for WEXT and its use allows wpa_supplicant to properly control
--# the driver to improve existing functionality like roaming and to support new
--# functionality.
--CONFIG_DRIVER_WEXT=y
--
--# Driver interface for Linux drivers using the nl80211 kernel interface
--CONFIG_DRIVER_NL80211=y
--
--# QCA vendor extensions to nl80211
--#CONFIG_DRIVER_NL80211_QCA=y
--
--# driver_nl80211.c requires libnl. If you are compiling it yourself
--# you may need to point hostapd to your version of libnl.
--#
--#CFLAGS += -I$<path to libnl include files>
--#LIBS += -L$<path to libnl library files>
--
--# Use libnl v2.0 (or 3.0) libraries.
--#CONFIG_LIBNL20=y
--
--# Use libnl 3.2 libraries (if this is selected, CONFIG_LIBNL20 is ignored)
--#CONFIG_LIBNL32=y
--
--
--# Driver interface for FreeBSD net80211 layer (e.g., Atheros driver)
--#CONFIG_DRIVER_BSD=y
--#CFLAGS += -I/usr/local/include
--#LIBS += -L/usr/local/lib
--#LIBS_p += -L/usr/local/lib
--#LIBS_c += -L/usr/local/lib
--
--# Driver interface for Windows NDIS
--#CONFIG_DRIVER_NDIS=y
--#CFLAGS += -I/usr/include/w32api/ddk
--#LIBS += -L/usr/local/lib
--# For native build using mingw
--#CONFIG_NATIVE_WINDOWS=y
--# Additional directories for cross-compilation on Linux host for mingw target
--#CFLAGS += -I/opt/mingw/mingw32/include/ddk
--#LIBS += -L/opt/mingw/mingw32/lib
--#CC=mingw32-gcc
--# By default, driver_ndis uses WinPcap for low-level operations. This can be
--# replaced with the following option which replaces WinPcap calls with NDISUIO.
--# However, this requires that WZC is disabled (net stop wzcsvc) before starting
--# wpa_supplicant.
--# CONFIG_USE_NDISUIO=y
--
--# Driver interface for wired Ethernet drivers
--CONFIG_DRIVER_WIRED=y
--
--# Driver interface for MACsec capable Qualcomm Atheros drivers
--#CONFIG_DRIVER_MACSEC_QCA=y
--
--# Driver interface for Linux MACsec drivers
--#CONFIG_DRIVER_MACSEC_LINUX=y
--
--# Driver interface for the Broadcom RoboSwitch family
--#CONFIG_DRIVER_ROBOSWITCH=y
--
--# Driver interface for no driver (e.g., WPS ER only)
--#CONFIG_DRIVER_NONE=y
--
--# Solaris libraries
--#LIBS += -lsocket -ldlpi -lnsl
--#LIBS_c += -lsocket
--
--# Enable IEEE 802.1X Supplicant (automatically included if any EAP method or
--# MACsec is included)
--#CONFIG_IEEE8021X_EAPOL=y
--
--# EAP-MD5
--#CONFIG_EAP_MD5=y
--
--# EAP-MSCHAPv2
--#CONFIG_EAP_MSCHAPV2=y
--
--# EAP-TLS
--#CONFIG_EAP_TLS=y
--
--# EAL-PEAP
--#CONFIG_EAP_PEAP=y
--
--# EAP-TTLS
--#CONFIG_EAP_TTLS=y
--
--# EAP-FAST
--#CONFIG_EAP_FAST=y
--
--# EAP-TEAP
--# Note: The current EAP-TEAP implementation is experimental and should not be
--# enabled for production use. The IETF RFC 7170 that defines EAP-TEAP has number
--# of conflicting statements and missing details and the implementation has
--# vendor specific workarounds for those and as such, may not interoperate with
--# any other implementation. This should not be used for anything else than
--# experimentation and interoperability testing until those issues has been
--# resolved.
--#CONFIG_EAP_TEAP=y
--
--# EAP-GTC
--#CONFIG_EAP_GTC=y
--
--# EAP-OTP
--#CONFIG_EAP_OTP=y
--
--# EAP-SIM (enable CONFIG_PCSC, if EAP-SIM is used)
--#CONFIG_EAP_SIM=y
--
--# Enable SIM simulator (Milenage) for EAP-SIM
--#CONFIG_SIM_SIMULATOR=y
--
--# EAP-PSK (experimental; this is _not_ needed for WPA-PSK)
--#CONFIG_EAP_PSK=y
--
--# EAP-pwd (secure authentication using only a password)
--#CONFIG_EAP_PWD=y
--
--# EAP-PAX
--#CONFIG_EAP_PAX=y
--
--# LEAP
--#CONFIG_EAP_LEAP=y
--
--# EAP-AKA (enable CONFIG_PCSC, if EAP-AKA is used)
--#CONFIG_EAP_AKA=y
--
--# EAP-AKA' (enable CONFIG_PCSC, if EAP-AKA' is used).
--# This requires CONFIG_EAP_AKA to be enabled, too.
--#CONFIG_EAP_AKA_PRIME=y
--
--# Enable USIM simulator (Milenage) for EAP-AKA
--#CONFIG_USIM_SIMULATOR=y
--
--# EAP-SAKE
--#CONFIG_EAP_SAKE=y
--
--# EAP-GPSK
--#CONFIG_EAP_GPSK=y
--# Include support for optional SHA256 cipher suite in EAP-GPSK
--#CONFIG_EAP_GPSK_SHA256=y
--
--# EAP-TNC and related Trusted Network Connect support (experimental)
--#CONFIG_EAP_TNC=y
--
--# Wi-Fi Protected Setup (WPS)
--#CONFIG_WPS=y
--# Enable WPS external registrar functionality
--#CONFIG_WPS_ER=y
--# Disable credentials for an open network by default when acting as a WPS
--# registrar.
--#CONFIG_WPS_REG_DISABLE_OPEN=y
--# Enable WPS support with NFC config method
--#CONFIG_WPS_NFC=y
--
--# EAP-IKEv2
--#CONFIG_EAP_IKEV2=y
--
--# EAP-EKE
--#CONFIG_EAP_EKE=y
--
--# MACsec
--#CONFIG_MACSEC=y
--
--# PKCS#12 (PFX) support (used to read private key and certificate file from
--# a file that usually has extension .p12 or .pfx)
--#CONFIG_PKCS12=y
--
--# Smartcard support (i.e., private key on a smartcard), e.g., with openssl
--# engine.
--#CONFIG_SMARTCARD=y
--
--# PC/SC interface for smartcards (USIM, GSM SIM)
--# Enable this if EAP-SIM or EAP-AKA is included
--#CONFIG_PCSC=y
--
--# Support HT overrides (disable HT/HT40, mask MCS rates, etc.)
--CONFIG_HT_OVERRIDES=y
--
--# Support VHT overrides (disable VHT, mask MCS rates, etc.)
--CONFIG_VHT_OVERRIDES=y
--
--# Development testing
--#CONFIG_EAPOL_TEST=y
--
--# Select control interface backend for external programs, e.g, wpa_cli:
--# unix = UNIX domain sockets (default for Linux/*BSD)
--# udp = UDP sockets using localhost (127.0.0.1)
--# udp6 = UDP IPv6 sockets using localhost (::1)
--# named_pipe = Windows Named Pipe (default for Windows)
--# udp-remote = UDP sockets with remote access (only for tests systems/purpose)
--# udp6-remote = UDP IPv6 sockets with remote access (only for tests purpose)
--# y = use default (backwards compatibility)
--# If this option is commented out, control interface is not included in the
--# build.
--CONFIG_CTRL_IFACE=y
--
--# Include support for GNU Readline and History Libraries in wpa_cli.
--# When building a wpa_cli binary for distribution, please note that these
--# libraries are licensed under GPL and as such, BSD license may not apply for
--# the resulting binary.
--#CONFIG_READLINE=y
--
--# Include internal line edit mode in wpa_cli. This can be used as a replacement
--# for GNU Readline to provide limited command line editing and history support.
--#CONFIG_WPA_CLI_EDIT=y
--
--# Remove debugging code that is printing out debug message to stdout.
--# This can be used to reduce the size of the wpa_supplicant considerably
--# if debugging code is not needed. The size reduction can be around 35%
--# (e.g., 90 kB).
--#CONFIG_NO_STDOUT_DEBUG=y
--
--# Remove WPA support, e.g., for wired-only IEEE 802.1X supplicant, to save
--# 35-50 kB in code size.
--#CONFIG_NO_WPA=y
--
--# Remove IEEE 802.11i/WPA-Personal ASCII passphrase support
--# This option can be used to reduce code size by removing support for
--# converting ASCII passphrases into PSK. If this functionality is removed, the
--# PSK can only be configured as the 64-octet hexstring (e.g., from
--# wpa_passphrase). This saves about 0.5 kB in code size.
--#CONFIG_NO_WPA_PASSPHRASE=y
--
--# Simultaneous Authentication of Equals (SAE), WPA3-Personal
--#CONFIG_SAE=y
--
--# Disable scan result processing (ap_mode=1) to save code size by about 1 kB.
--# This can be used if ap_scan=1 mode is never enabled.
--#CONFIG_NO_SCAN_PROCESSING=y
--
--# Select configuration backend:
--# file = text file (e.g., wpa_supplicant.conf; note: the configuration file
--#	path is given on command line, not here; this option is just used to
--#	select the backend that allows configuration files to be used)
--# winreg = Windows registry (see win_example.reg for an example)
--CONFIG_BACKEND=file
--
--# Remove configuration write functionality (i.e., to allow the configuration
--# file to be updated based on runtime configuration changes). The runtime
--# configuration can still be changed, the changes are just not going to be
--# persistent over restarts. This option can be used to reduce code size by
--# about 3.5 kB.
--CONFIG_NO_CONFIG_WRITE=y
--
--# Remove support for configuration blobs to reduce code size by about 1.5 kB.
--#CONFIG_NO_CONFIG_BLOBS=y
--
--# Select program entry point implementation:
--# main = UNIX/POSIX like main() function (default)
--# main_winsvc = Windows service (read parameters from registry)
--# main_none = Very basic example (development use only)
--#CONFIG_MAIN=main
--
--# Select wrapper for operating system and C library specific functions
--# unix = UNIX/POSIX like systems (default)
--# win32 = Windows systems
--# none = Empty template
--#CONFIG_OS=unix
--
--# Select event loop implementation
--# eloop = select() loop (default)
--# eloop_win = Windows events and WaitForMultipleObject() loop
--#CONFIG_ELOOP=eloop
--
--# Should we use poll instead of select? Select is used by default.
--#CONFIG_ELOOP_POLL=y
--
--# Should we use epoll instead of select? Select is used by default.
--CONFIG_ELOOP_EPOLL=y
--
--# Should we use kqueue instead of select? Select is used by default.
--#CONFIG_ELOOP_KQUEUE=y
--
--# Select layer 2 packet implementation
--# linux = Linux packet socket (default)
--# pcap = libpcap/libdnet/WinPcap
--# freebsd = FreeBSD libpcap
--# winpcap = WinPcap with receive thread
--# ndis = Windows NDISUIO (note: requires CONFIG_USE_NDISUIO=y)
--# none = Empty template
--#CONFIG_L2_PACKET=linux
--
--# Disable Linux packet socket workaround applicable for station interface
--# in a bridge for EAPOL frames. This should be uncommented only if the kernel
--# is known to not have the regression issue in packet socket behavior with
--# bridge interfaces (commit 'bridge: respect RFC2863 operational state')').
--CONFIG_NO_LINUX_PACKET_SOCKET_WAR=y
--
--# IEEE 802.11w (management frame protection), also known as PMF
--# Driver support is also needed for IEEE 802.11w.
--#CONFIG_IEEE80211W=y
--
--# Support Operating Channel Validation
--#CONFIG_OCV=y
--
--# Select TLS implementation
--# openssl = OpenSSL (default)
--# gnutls = GnuTLS
--# internal = Internal TLSv1 implementation (experimental)
--# linux = Linux kernel AF_ALG and internal TLSv1 implementation (experimental)
--# none = Empty template
--CONFIG_TLS=internal
--
--# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.1)
--# can be enabled to get a stronger construction of messages when block ciphers
--# are used. It should be noted that some existing TLS v1.0 -based
--# implementation may not be compatible with TLS v1.1 message (ClientHello is
--# sent prior to negotiating which version will be used)
--#CONFIG_TLSV11=y
--
--# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.2)
--# can be enabled to enable use of stronger crypto algorithms. It should be
--# noted that some existing TLS v1.0 -based implementation may not be compatible
--# with TLS v1.2 message (ClientHello is sent prior to negotiating which version
--# will be used)
--#CONFIG_TLSV12=y
--
--# Select which ciphers to use by default with OpenSSL if the user does not
--# specify them.
--#CONFIG_TLS_DEFAULT_CIPHERS="DEFAULT:!EXP:!LOW"
--
--# If CONFIG_TLS=internal is used, additional library and include paths are
--# needed for LibTomMath. Alternatively, an integrated, minimal version of
--# LibTomMath can be used. See beginning of libtommath.c for details on benefits
--# and drawbacks of this option.
--#CONFIG_INTERNAL_LIBTOMMATH=y
--#ifndef CONFIG_INTERNAL_LIBTOMMATH
--#LTM_PATH=/usr/src/libtommath-0.39
--#CFLAGS += -I$(LTM_PATH)
--#LIBS += -L$(LTM_PATH)
--#LIBS_p += -L$(LTM_PATH)
--#endif
--# At the cost of about 4 kB of additional binary size, the internal LibTomMath
--# can be configured to include faster routines for exptmod, sqr, and div to
--# speed up DH and RSA calculation considerably
--#CONFIG_INTERNAL_LIBTOMMATH_FAST=y
--
--# Include NDIS event processing through WMI into wpa_supplicant/wpasvc.
--# This is only for Windows builds and requires WMI-related header files and
--# WbemUuid.Lib from Platform SDK even when building with MinGW.
--#CONFIG_NDIS_EVENTS_INTEGRATED=y
--#PLATFORMSDKLIB="/opt/Program Files/Microsoft Platform SDK/Lib"
--
--# Add support for new DBus control interface
--# (fi.w1.hostap.wpa_supplicant1)
--#CONFIG_CTRL_IFACE_DBUS_NEW=y
--
--# Add introspection support for new DBus control interface
--#CONFIG_CTRL_IFACE_DBUS_INTRO=y
--
--# Add support for loading EAP methods dynamically as shared libraries.
--# When this option is enabled, each EAP method can be either included
--# statically (CONFIG_EAP_<method>=y) or dynamically (CONFIG_EAP_<method>=dyn).
--# Dynamic EAP methods are build as shared objects (eap_*.so) and they need to
--# be loaded in the beginning of the wpa_supplicant configuration file
--# (see load_dynamic_eap parameter in the example file) before being used in
--# the network blocks.
--#
--# Note that some shared parts of EAP methods are included in the main program
--# and in order to be able to use dynamic EAP methods using these parts, the
--# main program must have been build with the EAP method enabled (=y or =dyn).
--# This means that EAP-TLS/PEAP/TTLS/FAST cannot be added as dynamic libraries
--# unless at least one of them was included in the main build to force inclusion
--# of the shared code. Similarly, at least one of EAP-SIM/AKA must be included
--# in the main build to be able to load these methods dynamically.
--#
--# Please also note that using dynamic libraries will increase the total binary
--# size. Thus, it may not be the best option for targets that have limited
--# amount of memory/flash.
--#CONFIG_DYNAMIC_EAP_METHODS=y
--
--# IEEE Std 802.11r-2008 (Fast BSS Transition) for station mode
--#CONFIG_IEEE80211R=y
--
--# Add support for writing debug log to a file (/tmp/wpa_supplicant-log-#.txt)
--#CONFIG_DEBUG_FILE=y
--
--# Send debug messages to syslog instead of stdout
--CONFIG_DEBUG_SYSLOG=y
--# Set syslog facility for debug messages
--CONFIG_DEBUG_SYSLOG_FACILITY=LOG_DAEMON
--
--# Add support for sending all debug messages (regardless of debug verbosity)
--# to the Linux kernel tracing facility. This helps debug the entire stack by
--# making it easy to record everything happening from the driver up into the
--# same file, e.g., using trace-cmd.
--#CONFIG_DEBUG_LINUX_TRACING=y
--
--# Add support for writing debug log to Android logcat instead of standard
--# output
--#CONFIG_ANDROID_LOG=y
--
--# Enable privilege separation (see README 'Privilege separation' for details)
--#CONFIG_PRIVSEP=y
--
--# Enable mitigation against certain attacks against TKIP by delaying Michael
--# MIC error reports by a random amount of time between 0 and 60 seconds
--#CONFIG_DELAYED_MIC_ERROR_REPORT=y
--
--# Enable tracing code for developer debugging
--# This tracks use of memory allocations and other registrations and reports
--# incorrect use with a backtrace of call (or allocation) location.
--#CONFIG_WPA_TRACE=y
--# For BSD, uncomment these.
--#LIBS += -lexecinfo
--#LIBS_p += -lexecinfo
--#LIBS_c += -lexecinfo
--
--# Use libbfd to get more details for developer debugging
--# This enables use of libbfd to get more detailed symbols for the backtraces
--# generated by CONFIG_WPA_TRACE=y.
--#CONFIG_WPA_TRACE_BFD=y
--# For BSD, uncomment these.
--#LIBS += -lbfd -liberty -lz
--#LIBS_p += -lbfd -liberty -lz
--#LIBS_c += -lbfd -liberty -lz
--
--# wpa_supplicant depends on strong random number generation being available
--# from the operating system. os_get_random() function is used to fetch random
--# data when needed, e.g., for key generation. On Linux and BSD systems, this
--# works by reading /dev/urandom. It should be noted that the OS entropy pool
--# needs to be properly initialized before wpa_supplicant is started. This is
--# important especially on embedded devices that do not have a hardware random
--# number generator and may by default start up with minimal entropy available
--# for random number generation.
--#
--# As a safety net, wpa_supplicant is by default trying to internally collect
--# additional entropy for generating random data to mix in with the data fetched
--# from the OS. This by itself is not considered to be very strong, but it may
--# help in cases where the system pool is not initialized properly. However, it
--# is very strongly recommended that the system pool is initialized with enough
--# entropy either by using hardware assisted random number generator or by
--# storing state over device reboots.
--#
--# wpa_supplicant can be configured to maintain its own entropy store over
--# restarts to enhance random number generation. This is not perfect, but it is
--# much more secure than using the same sequence of random numbers after every
--# reboot. This can be enabled with -e<entropy file> command line option. The
--# specified file needs to be readable and writable by wpa_supplicant.
--#
--# If the os_get_random() is known to provide strong random data (e.g., on
--# Linux/BSD, the board in question is known to have reliable source of random
--# data from /dev/urandom), the internal wpa_supplicant random pool can be
--# disabled. This will save some in binary size and CPU use. However, this
--# should only be considered for builds that are known to be used on devices
--# that meet the requirements described above.
--CONFIG_NO_RANDOM_POOL=y
--
--# Should we attempt to use the getrandom(2) call that provides more reliable
--# yet secure randomness source than /dev/random on Linux 3.17 and newer.
--# Requires glibc 2.25 to build, falls back to /dev/random if unavailable.
--CONFIG_GETRANDOM=y
--
--# IEEE 802.11n (High Throughput) support (mainly for AP mode)
--#CONFIG_IEEE80211N=y
--
--# IEEE 802.11ac (Very High Throughput) support (mainly for AP mode)
--# (depends on CONFIG_IEEE80211N)
--#CONFIG_IEEE80211AC=y
--
--# Wireless Network Management (IEEE Std 802.11v-2011)
--# Note: This is experimental and not complete implementation.
--#CONFIG_WNM=y
--
--# Interworking (IEEE 802.11u)
--# This can be used to enable functionality to improve interworking with
--# external networks (GAS/ANQP to learn more about the networks and network
--# selection based on available credentials).
--#CONFIG_INTERWORKING=y
--
--# Hotspot 2.0
--#CONFIG_HS20=y
--
--# Enable interface matching in wpa_supplicant
--#CONFIG_MATCH_IFACE=y
--
--# Disable roaming in wpa_supplicant
--#CONFIG_NO_ROAMING=y
--
--# AP mode operations with wpa_supplicant
--# This can be used for controlling AP mode operations with wpa_supplicant. It
--# should be noted that this is mainly aimed at simple cases like
--# WPA2-Personal while more complex configurations like WPA2-Enterprise with an
--# external RADIUS server can be supported with hostapd.
--#CONFIG_AP=y
--
--# P2P (Wi-Fi Direct)
--# This can be used to enable P2P support in wpa_supplicant. See README-P2P for
--# more information on P2P operations.
--#CONFIG_P2P=y
--
--# Enable TDLS support
--#CONFIG_TDLS=y
--
--# Wi-Fi Display
--# This can be used to enable Wi-Fi Display extensions for P2P using an external
--# program to control the additional information exchanges in the messages.
--#CONFIG_WIFI_DISPLAY=y
--
--# Autoscan
--# This can be used to enable automatic scan support in wpa_supplicant.
--# See wpa_supplicant.conf for more information on autoscan usage.
--#
--# Enabling directly a module will enable autoscan support.
--# For exponential module:
--#CONFIG_AUTOSCAN_EXPONENTIAL=y
--# For periodic module:
--#CONFIG_AUTOSCAN_PERIODIC=y
--
--# Password (and passphrase, etc.) backend for external storage
--# These optional mechanisms can be used to add support for storing passwords
--# and other secrets in external (to wpa_supplicant) location. This allows, for
--# example, operating system specific key storage to be used
--#
--# External password backend for testing purposes (developer use)
--#CONFIG_EXT_PASSWORD_TEST=y
--
--# Enable Fast Session Transfer (FST)
--#CONFIG_FST=y
--
--# Enable CLI commands for FST testing
--#CONFIG_FST_TEST=y
--
--# OS X builds. This is only for building eapol_test.
--#CONFIG_OSX=y
--
--# Automatic Channel Selection
--# This will allow wpa_supplicant to pick the channel automatically when channel
--# is set to "0".
--#
--# TODO: Extend parser to be able to parse "channel=acs_survey" as an alternative
--# to "channel=0". This would enable us to eventually add other ACS algorithms in
--# similar way.
--#
--# Automatic selection is currently only done through initialization, later on
--# we hope to do background checks to keep us moving to more ideal channels as
--# time goes by. ACS is currently only supported through the nl80211 driver and
--# your driver must have survey dump capability that is filled by the driver
--# during scanning.
--#
--# TODO: In analogy to hostapd be able to customize the ACS survey algorithm with
--# a newly to create wpa_supplicant.conf variable acs_num_scans.
--#
--# Supported ACS drivers:
--# * ath9k
--# * ath5k
--# * ath10k
--#
--# For more details refer to:
--# http://wireless.kernel.org/en/users/Documentation/acs
--#CONFIG_ACS=y
--
--# Support Multi Band Operation
--#CONFIG_MBO=y
--
--# Fast Initial Link Setup (FILS) (IEEE 802.11ai)
--#CONFIG_FILS=y
--# FILS shared key authentication with PFS
--#CONFIG_FILS_SK_PFS=y
--
--# Support RSN on IBSS networks
--# This is needed to be able to use mode=1 network profile with proto=RSN and
--# key_mgmt=WPA-PSK (i.e., full key management instead of WPA-None).
--#CONFIG_IBSS_RSN=y
--
--# External PMKSA cache control
--# This can be used to enable control interface commands that allow the current
--# PMKSA cache entries to be fetched and new entries to be added.
--#CONFIG_PMKSA_CACHE_EXTERNAL=y
--
--# Mesh Networking (IEEE 802.11s)
--#CONFIG_MESH=y
--
--# Background scanning modules
--# These can be used to request wpa_supplicant to perform background scanning
--# operations for roaming within an ESS (same SSID). See the bgscan parameter in
--# the wpa_supplicant.conf file for more details.
--# Periodic background scans based on signal strength
--#CONFIG_BGSCAN_SIMPLE=y
--# Learn channels used by the network and try to avoid bgscans on other
--# channels (experimental)
--#CONFIG_BGSCAN_LEARN=y
--
--# Opportunistic Wireless Encryption (OWE)
--# Experimental implementation of draft-harkins-owe-07.txt
--#CONFIG_OWE=y
--
--# Device Provisioning Protocol (DPP)
--# This requires CONFIG_IEEE80211W=y to be enabled, too. (see
--# wpa_supplicant/README-DPP for details)
--#CONFIG_DPP=y
--
--# uBus IPC/RPC System
--# Services can connect to the bus and provide methods
--# that can be called by other services or clients.
--CONFIG_UBUS=y
--
--# OpenWrt patch 380-disable-ctrl-iface-mib.patch
--# leads to the MIB only being compiled in if
--# CONFIG_CTRL_IFACE_MIB is enabled.
--#CONFIG_CTRL_IFACE_MIB=y
-diff --git a/package/network/services/hostapd/files/wpa_supplicant-p2p.config b/package/network/services/hostapd/files/wpa_supplicant-p2p.config
-deleted file mode 100644
-index b00847a256..0000000000
---- a/package/network/services/hostapd/files/wpa_supplicant-p2p.config
-+++ /dev/null
-@@ -1,625 +0,0 @@
--# Example wpa_supplicant build time configuration
--#
--# This file lists the configuration options that are used when building the
--# wpa_supplicant binary. All lines starting with # are ignored. Configuration
--# option lines must be commented out complete, if they are not to be included,
--# i.e., just setting VARIABLE=n is not disabling that variable.
--#
--# This file is included in Makefile, so variables like CFLAGS and LIBS can also
--# be modified from here. In most cases, these lines should use += in order not
--# to override previous values of the variables.
--
--
--# Uncomment following two lines and fix the paths if you have installed OpenSSL
--# or GnuTLS in non-default location
--#CFLAGS += -I/usr/local/openssl/include
--#LIBS += -L/usr/local/openssl/lib
--
--# Some Red Hat versions seem to include kerberos header files from OpenSSL, but
--# the kerberos files are not in the default include path. Following line can be
--# used to fix build issues on such systems (krb5.h not found).
--#CFLAGS += -I/usr/include/kerberos
--
--# Driver interface for generic Linux wireless extensions
--# Note: WEXT is deprecated in the current Linux kernel version and no new
--# functionality is added to it. nl80211-based interface is the new
--# replacement for WEXT and its use allows wpa_supplicant to properly control
--# the driver to improve existing functionality like roaming and to support new
--# functionality.
--CONFIG_DRIVER_WEXT=y
--
--# Driver interface for Linux drivers using the nl80211 kernel interface
--CONFIG_DRIVER_NL80211=y
--
--# QCA vendor extensions to nl80211
--#CONFIG_DRIVER_NL80211_QCA=y
--
--# driver_nl80211.c requires libnl. If you are compiling it yourself
--# you may need to point hostapd to your version of libnl.
--#
--#CFLAGS += -I$<path to libnl include files>
--#LIBS += -L$<path to libnl library files>
--
--# Use libnl v2.0 (or 3.0) libraries.
--#CONFIG_LIBNL20=y
--
--# Use libnl 3.2 libraries (if this is selected, CONFIG_LIBNL20 is ignored)
--#CONFIG_LIBNL32=y
--
--
--# Driver interface for FreeBSD net80211 layer (e.g., Atheros driver)
--#CONFIG_DRIVER_BSD=y
--#CFLAGS += -I/usr/local/include
--#LIBS += -L/usr/local/lib
--#LIBS_p += -L/usr/local/lib
--#LIBS_c += -L/usr/local/lib
--
--# Driver interface for Windows NDIS
--#CONFIG_DRIVER_NDIS=y
--#CFLAGS += -I/usr/include/w32api/ddk
--#LIBS += -L/usr/local/lib
--# For native build using mingw
--#CONFIG_NATIVE_WINDOWS=y
--# Additional directories for cross-compilation on Linux host for mingw target
--#CFLAGS += -I/opt/mingw/mingw32/include/ddk
--#LIBS += -L/opt/mingw/mingw32/lib
--#CC=mingw32-gcc
--# By default, driver_ndis uses WinPcap for low-level operations. This can be
--# replaced with the following option which replaces WinPcap calls with NDISUIO.
--# However, this requires that WZC is disabled (net stop wzcsvc) before starting
--# wpa_supplicant.
--# CONFIG_USE_NDISUIO=y
--
--# Driver interface for wired Ethernet drivers
--CONFIG_DRIVER_WIRED=y
--
--# Driver interface for MACsec capable Qualcomm Atheros drivers
--#CONFIG_DRIVER_MACSEC_QCA=y
--
--# Driver interface for Linux MACsec drivers
--#CONFIG_DRIVER_MACSEC_LINUX=y
--
--# Driver interface for the Broadcom RoboSwitch family
--#CONFIG_DRIVER_ROBOSWITCH=y
--
--# Driver interface for no driver (e.g., WPS ER only)
--#CONFIG_DRIVER_NONE=y
--
--# Solaris libraries
--#LIBS += -lsocket -ldlpi -lnsl
--#LIBS_c += -lsocket
--
--# Enable IEEE 802.1X Supplicant (automatically included if any EAP method or
--# MACsec is included)
--CONFIG_IEEE8021X_EAPOL=y
--
--# EAP-MD5
--CONFIG_EAP_MD5=y
--
--# EAP-MSCHAPv2
--CONFIG_EAP_MSCHAPV2=y
--
--# EAP-TLS
--CONFIG_EAP_TLS=y
--
--# EAL-PEAP
--CONFIG_EAP_PEAP=y
--
--# EAP-TTLS
--CONFIG_EAP_TTLS=y
--
--# EAP-FAST
--CONFIG_EAP_FAST=y
--
--# EAP-TEAP
--# Note: The current EAP-TEAP implementation is experimental and should not be
--# enabled for production use. The IETF RFC 7170 that defines EAP-TEAP has number
--# of conflicting statements and missing details and the implementation has
--# vendor specific workarounds for those and as such, may not interoperate with
--# any other implementation. This should not be used for anything else than
--# experimentation and interoperability testing until those issues has been
--# resolved.
--#CONFIG_EAP_TEAP=y
--
--# EAP-GTC
--CONFIG_EAP_GTC=y
--
--# EAP-OTP
--CONFIG_EAP_OTP=y
--
--# EAP-SIM (enable CONFIG_PCSC, if EAP-SIM is used)
--#CONFIG_EAP_SIM=y
--
--# Enable SIM simulator (Milenage) for EAP-SIM
--#CONFIG_SIM_SIMULATOR=y
--
--# EAP-PSK (experimental; this is _not_ needed for WPA-PSK)
--#CONFIG_EAP_PSK=y
--
--# EAP-pwd (secure authentication using only a password)
--#CONFIG_EAP_PWD=y
--
--# EAP-PAX
--#CONFIG_EAP_PAX=y
--
--# LEAP
--CONFIG_EAP_LEAP=y
--
--# EAP-AKA (enable CONFIG_PCSC, if EAP-AKA is used)
--#CONFIG_EAP_AKA=y
--
--# EAP-AKA' (enable CONFIG_PCSC, if EAP-AKA' is used).
--# This requires CONFIG_EAP_AKA to be enabled, too.
--#CONFIG_EAP_AKA_PRIME=y
--
--# Enable USIM simulator (Milenage) for EAP-AKA
--#CONFIG_USIM_SIMULATOR=y
--
--# EAP-SAKE
--#CONFIG_EAP_SAKE=y
--
--# EAP-GPSK
--#CONFIG_EAP_GPSK=y
--# Include support for optional SHA256 cipher suite in EAP-GPSK
--#CONFIG_EAP_GPSK_SHA256=y
--
--# EAP-TNC and related Trusted Network Connect support (experimental)
--#CONFIG_EAP_TNC=y
--
--# Wi-Fi Protected Setup (WPS)
--CONFIG_WPS=y
--# Enable WPS external registrar functionality
--#CONFIG_WPS_ER=y
--# Disable credentials for an open network by default when acting as a WPS
--# registrar.
--#CONFIG_WPS_REG_DISABLE_OPEN=y
--# Enable WPS support with NFC config method
--#CONFIG_WPS_NFC=y
--
--# EAP-IKEv2
--#CONFIG_EAP_IKEV2=y
--
--# EAP-EKE
--#CONFIG_EAP_EKE=y
--
--# MACsec
--#CONFIG_MACSEC=y
--
--# PKCS#12 (PFX) support (used to read private key and certificate file from
--# a file that usually has extension .p12 or .pfx)
--CONFIG_PKCS12=y
--
--# Smartcard support (i.e., private key on a smartcard), e.g., with openssl
--# engine.
--CONFIG_SMARTCARD=y
--
--# PC/SC interface for smartcards (USIM, GSM SIM)
--# Enable this if EAP-SIM or EAP-AKA is included
--#CONFIG_PCSC=y
--
--# Support HT overrides (disable HT/HT40, mask MCS rates, etc.)
--CONFIG_HT_OVERRIDES=y
--
--# Support VHT overrides (disable VHT, mask MCS rates, etc.)
--CONFIG_VHT_OVERRIDES=y
--
--# Development testing
--#CONFIG_EAPOL_TEST=y
--
--# Select control interface backend for external programs, e.g, wpa_cli:
--# unix = UNIX domain sockets (default for Linux/*BSD)
--# udp = UDP sockets using localhost (127.0.0.1)
--# udp6 = UDP IPv6 sockets using localhost (::1)
--# named_pipe = Windows Named Pipe (default for Windows)
--# udp-remote = UDP sockets with remote access (only for tests systems/purpose)
--# udp6-remote = UDP IPv6 sockets with remote access (only for tests purpose)
--# y = use default (backwards compatibility)
--# If this option is commented out, control interface is not included in the
--# build.
--CONFIG_CTRL_IFACE=y
--
--# Include support for GNU Readline and History Libraries in wpa_cli.
--# When building a wpa_cli binary for distribution, please note that these
--# libraries are licensed under GPL and as such, BSD license may not apply for
--# the resulting binary.
--#CONFIG_READLINE=y
--
--# Include internal line edit mode in wpa_cli. This can be used as a replacement
--# for GNU Readline to provide limited command line editing and history support.
--#CONFIG_WPA_CLI_EDIT=y
--
--# Remove debugging code that is printing out debug message to stdout.
--# This can be used to reduce the size of the wpa_supplicant considerably
--# if debugging code is not needed. The size reduction can be around 35%
--# (e.g., 90 kB).
--#CONFIG_NO_STDOUT_DEBUG=y
--
--# Remove WPA support, e.g., for wired-only IEEE 802.1X supplicant, to save
--# 35-50 kB in code size.
--#CONFIG_NO_WPA=y
--
--# Remove IEEE 802.11i/WPA-Personal ASCII passphrase support
--# This option can be used to reduce code size by removing support for
--# converting ASCII passphrases into PSK. If this functionality is removed, the
--# PSK can only be configured as the 64-octet hexstring (e.g., from
--# wpa_passphrase). This saves about 0.5 kB in code size.
--#CONFIG_NO_WPA_PASSPHRASE=y
--
--# Simultaneous Authentication of Equals (SAE), WPA3-Personal
--#CONFIG_SAE=y
--
--# Disable scan result processing (ap_mode=1) to save code size by about 1 kB.
--# This can be used if ap_scan=1 mode is never enabled.
--#CONFIG_NO_SCAN_PROCESSING=y
--
--# Select configuration backend:
--# file = text file (e.g., wpa_supplicant.conf; note: the configuration file
--#	path is given on command line, not here; this option is just used to
--#	select the backend that allows configuration files to be used)
--# winreg = Windows registry (see win_example.reg for an example)
--CONFIG_BACKEND=file
--
--# Remove configuration write functionality (i.e., to allow the configuration
--# file to be updated based on runtime configuration changes). The runtime
--# configuration can still be changed, the changes are just not going to be
--# persistent over restarts. This option can be used to reduce code size by
--# about 3.5 kB.
--#CONFIG_NO_CONFIG_WRITE=y
--
--# Remove support for configuration blobs to reduce code size by about 1.5 kB.
--#CONFIG_NO_CONFIG_BLOBS=y
--
--# Select program entry point implementation:
--# main = UNIX/POSIX like main() function (default)
--# main_winsvc = Windows service (read parameters from registry)
--# main_none = Very basic example (development use only)
--#CONFIG_MAIN=main
--
--# Select wrapper for operating system and C library specific functions
--# unix = UNIX/POSIX like systems (default)
--# win32 = Windows systems
--# none = Empty template
--#CONFIG_OS=unix
--
--# Select event loop implementation
--# eloop = select() loop (default)
--# eloop_win = Windows events and WaitForMultipleObject() loop
--#CONFIG_ELOOP=eloop
--
--# Should we use poll instead of select? Select is used by default.
--#CONFIG_ELOOP_POLL=y
--
--# Should we use epoll instead of select? Select is used by default.
--CONFIG_ELOOP_EPOLL=y
--
--# Should we use kqueue instead of select? Select is used by default.
--#CONFIG_ELOOP_KQUEUE=y
--
--# Select layer 2 packet implementation
--# linux = Linux packet socket (default)
--# pcap = libpcap/libdnet/WinPcap
--# freebsd = FreeBSD libpcap
--# winpcap = WinPcap with receive thread
--# ndis = Windows NDISUIO (note: requires CONFIG_USE_NDISUIO=y)
--# none = Empty template
--#CONFIG_L2_PACKET=linux
--
--# Disable Linux packet socket workaround applicable for station interface
--# in a bridge for EAPOL frames. This should be uncommented only if the kernel
--# is known to not have the regression issue in packet socket behavior with
--# bridge interfaces (commit 'bridge: respect RFC2863 operational state')').
--CONFIG_NO_LINUX_PACKET_SOCKET_WAR=y
--
--# IEEE 802.11w (management frame protection), also known as PMF
--# Driver support is also needed for IEEE 802.11w.
--CONFIG_IEEE80211W=y
--
--# Support Operating Channel Validation
--#CONFIG_OCV=y
--
--# Select TLS implementation
--# openssl = OpenSSL (default)
--# gnutls = GnuTLS
--# internal = Internal TLSv1 implementation (experimental)
--# linux = Linux kernel AF_ALG and internal TLSv1 implementation (experimental)
--# none = Empty template
--CONFIG_TLS=internal
--
--# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.1)
--# can be enabled to get a stronger construction of messages when block ciphers
--# are used. It should be noted that some existing TLS v1.0 -based
--# implementation may not be compatible with TLS v1.1 message (ClientHello is
--# sent prior to negotiating which version will be used)
--#CONFIG_TLSV11=y
--
--# TLS-based EAP methods require at least TLS v1.0. Newer version of TLS (v1.2)
--# can be enabled to enable use of stronger crypto algorithms. It should be
--# noted that some existing TLS v1.0 -based implementation may not be compatible
--# with TLS v1.2 message (ClientHello is sent prior to negotiating which version
--# will be used)
--#CONFIG_TLSV12=y
--
--# Select which ciphers to use by default with OpenSSL if the user does not
--# specify them.
--#CONFIG_TLS_DEFAULT_CIPHERS="DEFAULT:!EXP:!LOW"
--
--# If CONFIG_TLS=internal is used, additional library and include paths are
--# needed for LibTomMath. Alternatively, an integrated, minimal version of
--# LibTomMath can be used. See beginning of libtommath.c for details on benefits
--# and drawbacks of this option.
--CONFIG_INTERNAL_LIBTOMMATH=y
--#ifndef CONFIG_INTERNAL_LIBTOMMATH
--#LTM_PATH=/usr/src/libtommath-0.39
--#CFLAGS += -I$(LTM_PATH)
--#LIBS += -L$(LTM_PATH)
--#LIBS_p += -L$(LTM_PATH)
--#endif
--# At the cost of about 4 kB of additional binary size, the internal LibTomMath
--# can be configured to include faster routines for exptmod, sqr, and div to
--# speed up DH and RSA calculation considerably
--CONFIG_INTERNAL_LIBTOMMATH_FAST=y
--
--# Include NDIS event processing through WMI into wpa_supplicant/wpasvc.
--# This is only for Windows builds and requires WMI-related header files and
--# WbemUuid.Lib from Platform SDK even when building with MinGW.
--#CONFIG_NDIS_EVENTS_INTEGRATED=y
--#PLATFORMSDKLIB="/opt/Program Files/Microsoft Platform SDK/Lib"
--
--# Add support for new DBus control interface
--# (fi.w1.hostap.wpa_supplicant1)
--#CONFIG_CTRL_IFACE_DBUS_NEW=y
--
--# Add introspection support for new DBus control interface
--#CONFIG_CTRL_IFACE_DBUS_INTRO=y
--
--# Add support for loading EAP methods dynamically as shared libraries.
--# When this option is enabled, each EAP method can be either included
--# statically (CONFIG_EAP_<method>=y) or dynamically (CONFIG_EAP_<method>=dyn).
--# Dynamic EAP methods are build as shared objects (eap_*.so) and they need to
--# be loaded in the beginning of the wpa_supplicant configuration file
--# (see load_dynamic_eap parameter in the example file) before being used in
--# the network blocks.
--#
--# Note that some shared parts of EAP methods are included in the main program
--# and in order to be able to use dynamic EAP methods using these parts, the
--# main program must have been build with the EAP method enabled (=y or =dyn).
--# This means that EAP-TLS/PEAP/TTLS/FAST cannot be added as dynamic libraries
--# unless at least one of them was included in the main build to force inclusion
--# of the shared code. Similarly, at least one of EAP-SIM/AKA must be included
--# in the main build to be able to load these methods dynamically.
--#
--# Please also note that using dynamic libraries will increase the total binary
--# size. Thus, it may not be the best option for targets that have limited
--# amount of memory/flash.
--#CONFIG_DYNAMIC_EAP_METHODS=y
--
--# IEEE Std 802.11r-2008 (Fast BSS Transition) for station mode
--#CONFIG_IEEE80211R=y
--
--# Add support for writing debug log to a file (/tmp/wpa_supplicant-log-#.txt)
--#CONFIG_DEBUG_FILE=y
--
--# Send debug messages to syslog instead of stdout
--CONFIG_DEBUG_SYSLOG=y
--# Set syslog facility for debug messages
--CONFIG_DEBUG_SYSLOG_FACILITY=LOG_DAEMON
--
--# Add support for sending all debug messages (regardless of debug verbosity)
--# to the Linux kernel tracing facility. This helps debug the entire stack by
--# making it easy to record everything happening from the driver up into the
--# same file, e.g., using trace-cmd.
--#CONFIG_DEBUG_LINUX_TRACING=y
--
--# Add support for writing debug log to Android logcat instead of standard
--# output
--#CONFIG_ANDROID_LOG=y
--
--# Enable privilege separation (see README 'Privilege separation' for details)
--#CONFIG_PRIVSEP=y
--
--# Enable mitigation against certain attacks against TKIP by delaying Michael
--# MIC error reports by a random amount of time between 0 and 60 seconds
--#CONFIG_DELAYED_MIC_ERROR_REPORT=y
--
--# Enable tracing code for developer debugging
--# This tracks use of memory allocations and other registrations and reports
--# incorrect use with a backtrace of call (or allocation) location.
--#CONFIG_WPA_TRACE=y
--# For BSD, uncomment these.
--#LIBS += -lexecinfo
--#LIBS_p += -lexecinfo
--#LIBS_c += -lexecinfo
--
--# Use libbfd to get more details for developer debugging
--# This enables use of libbfd to get more detailed symbols for the backtraces
--# generated by CONFIG_WPA_TRACE=y.
--#CONFIG_WPA_TRACE_BFD=y
--# For BSD, uncomment these.
--#LIBS += -lbfd -liberty -lz
--#LIBS_p += -lbfd -liberty -lz
--#LIBS_c += -lbfd -liberty -lz
--
--# wpa_supplicant depends on strong random number generation being available
--# from the operating system. os_get_random() function is used to fetch random
--# data when needed, e.g., for key generation. On Linux and BSD systems, this
--# works by reading /dev/urandom. It should be noted that the OS entropy pool
--# needs to be properly initialized before wpa_supplicant is started. This is
--# important especially on embedded devices that do not have a hardware random
--# number generator and may by default start up with minimal entropy available
--# for random number generation.
--#
--# As a safety net, wpa_supplicant is by default trying to internally collect
--# additional entropy for generating random data to mix in with the data fetched
--# from the OS. This by itself is not considered to be very strong, but it may
--# help in cases where the system pool is not initialized properly. However, it
--# is very strongly recommended that the system pool is initialized with enough
--# entropy either by using hardware assisted random number generator or by
--# storing state over device reboots.
--#
--# wpa_supplicant can be configured to maintain its own entropy store over
--# restarts to enhance random number generation. This is not perfect, but it is
--# much more secure than using the same sequence of random numbers after every
--# reboot. This can be enabled with -e<entropy file> command line option. The
--# specified file needs to be readable and writable by wpa_supplicant.
--#
--# If the os_get_random() is known to provide strong random data (e.g., on
--# Linux/BSD, the board in question is known to have reliable source of random
--# data from /dev/urandom), the internal wpa_supplicant random pool can be
--# disabled. This will save some in binary size and CPU use. However, this
--# should only be considered for builds that are known to be used on devices
--# that meet the requirements described above.
--CONFIG_NO_RANDOM_POOL=y
--
--# Should we attempt to use the getrandom(2) call that provides more reliable
--# yet secure randomness source than /dev/random on Linux 3.17 and newer.
--# Requires glibc 2.25 to build, falls back to /dev/random if unavailable.
--CONFIG_GETRANDOM=y
--
--# IEEE 802.11n (High Throughput) support (mainly for AP mode)
--#CONFIG_IEEE80211N=y
--
--# IEEE 802.11ac (Very High Throughput) support (mainly for AP mode)
--# (depends on CONFIG_IEEE80211N)
--#CONFIG_IEEE80211AC=y
--
--# Wireless Network Management (IEEE Std 802.11v-2011)
--# Note: This is experimental and not complete implementation.
--#CONFIG_WNM=y
--
--# Interworking (IEEE 802.11u)
--# This can be used to enable functionality to improve interworking with
--# external networks (GAS/ANQP to learn more about the networks and network
--# selection based on available credentials).
--#CONFIG_INTERWORKING=y
--
--# Hotspot 2.0
--#CONFIG_HS20=y
--
--# Enable interface matching in wpa_supplicant
--#CONFIG_MATCH_IFACE=y
--
--# Disable roaming in wpa_supplicant
--#CONFIG_NO_ROAMING=y
--
--# AP mode operations with wpa_supplicant
--# This can be used for controlling AP mode operations with wpa_supplicant. It
--# should be noted that this is mainly aimed at simple cases like
--# WPA2-Personal while more complex configurations like WPA2-Enterprise with an
--# external RADIUS server can be supported with hostapd.
--CONFIG_AP=y
--
--# P2P (Wi-Fi Direct)
--# This can be used to enable P2P support in wpa_supplicant. See README-P2P for
--# more information on P2P operations.
--CONFIG_P2P=y
--
--# Enable TDLS support
--#CONFIG_TDLS=y
--
--# Wi-Fi Display
--# This can be used to enable Wi-Fi Display extensions for P2P using an external
--# program to control the additional information exchanges in the messages.
--#CONFIG_WIFI_DISPLAY=y
--
--# Autoscan
--# This can be used to enable automatic scan support in wpa_supplicant.
--# See wpa_supplicant.conf for more information on autoscan usage.
--#
--# Enabling directly a module will enable autoscan support.
--# For exponential module:
--#CONFIG_AUTOSCAN_EXPONENTIAL=y
--# For periodic module:
--#CONFIG_AUTOSCAN_PERIODIC=y
--
--# Password (and passphrase, etc.) backend for external storage
--# These optional mechanisms can be used to add support for storing passwords
--# and other secrets in external (to wpa_supplicant) location. This allows, for
--# example, operating system specific key storage to be used
--#
--# External password backend for testing purposes (developer use)
--#CONFIG_EXT_PASSWORD_TEST=y
--
--# Enable Fast Session Transfer (FST)
--#CONFIG_FST=y
--
--# Enable CLI commands for FST testing
--#CONFIG_FST_TEST=y
--
--# OS X builds. This is only for building eapol_test.
--#CONFIG_OSX=y
--
--# Automatic Channel Selection
--# This will allow wpa_supplicant to pick the channel automatically when channel
--# is set to "0".
--#
--# TODO: Extend parser to be able to parse "channel=acs_survey" as an alternative
--# to "channel=0". This would enable us to eventually add other ACS algorithms in
--# similar way.
--#
--# Automatic selection is currently only done through initialization, later on
--# we hope to do background checks to keep us moving to more ideal channels as
--# time goes by. ACS is currently only supported through the nl80211 driver and
--# your driver must have survey dump capability that is filled by the driver
--# during scanning.
--#
--# TODO: In analogy to hostapd be able to customize the ACS survey algorithm with
--# a newly to create wpa_supplicant.conf variable acs_num_scans.
--#
--# Supported ACS drivers:
--# * ath9k
--# * ath5k
--# * ath10k
--#
--# For more details refer to:
--# http://wireless.kernel.org/en/users/Documentation/acs
--#CONFIG_ACS=y
--
--# Support Multi Band Operation
--#CONFIG_MBO=y
--
--# Fast Initial Link Setup (FILS) (IEEE 802.11ai)
--#CONFIG_FILS=y
--# FILS shared key authentication with PFS
--#CONFIG_FILS_SK_PFS=y
--
--# Support RSN on IBSS networks
--# This is needed to be able to use mode=1 network profile with proto=RSN and
--# key_mgmt=WPA-PSK (i.e., full key management instead of WPA-None).
--CONFIG_IBSS_RSN=y
--
--# External PMKSA cache control
--# This can be used to enable control interface commands that allow the current
--# PMKSA cache entries to be fetched and new entries to be added.
--#CONFIG_PMKSA_CACHE_EXTERNAL=y
--
--# Mesh Networking (IEEE 802.11s)
--#CONFIG_MESH=y
--
--# Background scanning modules
--# These can be used to request wpa_supplicant to perform background scanning
--# operations for roaming within an ESS (same SSID). See the bgscan parameter in
--# the wpa_supplicant.conf file for more details.
--# Periodic background scans based on signal strength
--#CONFIG_BGSCAN_SIMPLE=y
--# Learn channels used by the network and try to avoid bgscans on other
--# channels (experimental)
--#CONFIG_BGSCAN_LEARN=y
--
--# Opportunistic Wireless Encryption (OWE)
--# Experimental implementation of draft-harkins-owe-07.txt
--#CONFIG_OWE=y
--
--# Device Provisioning Protocol (DPP)
--# This requires CONFIG_IEEE80211W=y to be enabled, too. (see
--# wpa_supplicant/README-DPP for details)
--#CONFIG_DPP=y
--
--# uBus IPC/RPC System
--# Services can connect to the bus and provide methods
--# that can be called by other services or clients.
--CONFIG_UBUS=y
--
--# OpenWrt patch 380-disable-ctrl-iface-mib.patch
--# leads to the MIB only being compiled in if
--# CONFIG_CTRL_IFACE_MIB is enabled.
--#CONFIG_CTRL_IFACE_MIB=y
-diff --git a/package/network/services/hostapd/files/wpad.init b/package/network/services/hostapd/files/wpad.init
-deleted file mode 100644
-index 79c5bf1075..0000000000
---- a/package/network/services/hostapd/files/wpad.init
-+++ /dev/null
-@@ -1,41 +0,0 @@
--#!/bin/sh /etc/rc.common
--
--START=19
--STOP=21
--
--USE_PROCD=1
--NAME=wpad
--
--start_service() {
--	if [ -x "/usr/sbin/hostapd" ]; then
--		mkdir -p /var/run/hostapd
--		chown network:network /var/run/hostapd
--		procd_open_instance hostapd
--		procd_set_param command /usr/sbin/hostapd -s -g /var/run/hostapd/global
--		procd_set_param respawn 3600 1 0
--		[ -x /sbin/ujail -a -e /etc/capabilities/wpad.json ] && {
--			procd_add_jail hostapd
--			procd_set_param capabilities /etc/capabilities/wpad.json
--			procd_set_param user network
--			procd_set_param group network
--			procd_set_param no_new_privs 1
--		}
--		procd_close_instance
--	fi
--
--	if [ -x "/usr/sbin/wpa_supplicant" ]; then
--		mkdir -p /var/run/wpa_supplicant
--		chown network:network /var/run/wpa_supplicant
--		procd_open_instance supplicant
--		procd_set_param command /usr/sbin/wpa_supplicant -n -s -g /var/run/wpa_supplicant/global
--		procd_set_param respawn 3600 1 0
--		[ -x /sbin/ujail -a -e /etc/capabilities/wpad.json ] && {
--			procd_add_jail wpa_supplicant
--			procd_set_param capabilities /etc/capabilities/wpad.json
--			procd_set_param user network
--			procd_set_param group network
--			procd_set_param no_new_privs 1
--		}
--		procd_close_instance
--	fi
--}
-diff --git a/package/network/services/hostapd/files/wpad.json b/package/network/services/hostapd/files/wpad.json
-deleted file mode 100644
-index c73f3d98bd..0000000000
---- a/package/network/services/hostapd/files/wpad.json
-+++ /dev/null
-@@ -1,22 +0,0 @@
--{
--	"bounding": [
--		"CAP_NET_ADMIN",
--		"CAP_NET_RAW"
--	],
--	"effective": [
--		"CAP_NET_ADMIN",
--		"CAP_NET_RAW"
--	],
--	"ambient": [
--		"CAP_NET_ADMIN",
--		"CAP_NET_RAW"
--	],
--	"permitted": [
--		"CAP_NET_ADMIN",
--		"CAP_NET_RAW"
--	],
--	"inheritable": [
--		"CAP_NET_ADMIN",
--		"CAP_NET_RAW"
--	]
--}
-diff --git a/package/network/services/hostapd/files/wpad_acl.json b/package/network/services/hostapd/files/wpad_acl.json
-deleted file mode 100644
-index c77ccd8ea0..0000000000
---- a/package/network/services/hostapd/files/wpad_acl.json
-+++ /dev/null
-@@ -1,10 +0,0 @@
--{
--	"user": "network",
--	"access": {
--		"service": {
--			"methods": [ "event" ]
--		}
--	},
--	"publish": [ "hostapd", "hostapd.*", "wpa_supplicant", "wpa_supplicant.*" ],
--	"send": [ "bss.*", "wps_credentials" ]
--}
-diff --git a/package/network/services/hostapd/files/wps-hotplug.sh b/package/network/services/hostapd/files/wps-hotplug.sh
-deleted file mode 100644
-index d00939d769..0000000000
---- a/package/network/services/hostapd/files/wps-hotplug.sh
-+++ /dev/null
-@@ -1,62 +0,0 @@
--#!/bin/sh
--
--wps_catch_credentials() {
--	local iface ifaces ifc ifname ssid encryption key radio radios
--	local found=0
--
--	. /usr/share/libubox/jshn.sh
--	ubus -S -t 30 listen wps_credentials | while read creds; do
--		json_init
--		json_load "$creds"
--		json_select wps_credentials || continue
--		json_get_vars ifname ssid key encryption
--		local ifcname="$ifname"
--		json_init
--		json_load "$(ubus -S call network.wireless status)"
--		json_get_keys radios
--		for radio in $radios; do
--			json_select $radio
--			json_select interfaces
--			json_get_keys ifaces
--			for ifc in $ifaces; do
--				json_select $ifc
--				json_get_vars ifname
--				[ "$ifname" = "$ifcname" ] && {
--					ubus -S call uci set "{\"config\":\"wireless\", \"type\":\"wifi-iface\",		\
--								\"match\": { \"device\": \"$radio\", \"encryption\": \"wps\" },	\
--								\"values\": { \"encryption\": \"$encryption\", 			\
--										\"ssid\": \"$ssid\", 				\
--										\"key\": \"$key\" } }"
--					ubus -S call uci commit '{"config": "wireless"}'
--					ubus -S call uci apply
--				}
--				json_select ..
--			done
--			json_select ..
--			json_select ..
--		done
--	done
--}
--
--if [ "$ACTION" = "pressed" -a "$BUTTON" = "wps" ]; then
--	wps_done=0
--	ubusobjs="$( ubus -S list hostapd.* )"
--	for ubusobj in $ubusobjs; do
--		ubus -S call $ubusobj wps_start && wps_done=1
--	done
--	[ $wps_done = 0 ] || return 0
--	wps_done=0
--	ubusobjs="$( ubus -S list wpa_supplicant.* )"
--	for ubusobj in $ubusobjs; do
--		ifname="$(echo $ubusobj | cut -d'.' -f2 )"
--		multi_ap=""
--		if [ -e "/var/run/wpa_supplicant-${ifname}.conf.is_multiap" ]; then
--			ubus -S call $ubusobj wps_start '{ "multi_ap": true }' && wps_done=1
--		else
--			ubus -S call $ubusobj wps_start && wps_done=1
--		fi
--	done
--	[ $wps_done = 0 ] || wps_catch_credentials &
--fi
--
--return 0
-diff --git a/package/network/services/hostapd/patches/001-HE-VHT-fix-frequency-setup-with-HE-enabled.patch b/package/network/services/hostapd/patches/001-HE-VHT-fix-frequency-setup-with-HE-enabled.patch
-deleted file mode 100644
-index 37c17c50af..0000000000
---- a/package/network/services/hostapd/patches/001-HE-VHT-fix-frequency-setup-with-HE-enabled.patch
-+++ /dev/null
-@@ -1,196 +0,0 @@
--From 91976250359b263a44861aebe553b20627fe487e Mon Sep 17 00:00:00 2001
--From: Markus Theil <markus.theil@tu-ilmenau.de>
--Date: Tue, 30 Jun 2020 13:53:17 +0200
--Subject: [PATCH 01/19] HE/VHT: fix frequency setup with HE enabled
--
--Some places in the code base were not using the
--wrappers like hostapd_set_oper_centr_freq_seg0_idx
--and friends. This could lead to errors, for example when
--joining 80 MHz mesh networks. Fix this, by enforcing
--usage of these wrappers.
--
--wpa_supplicant_conf_ap_ht now checks for HE capability
--before dealing with VHT in order for these wrappers to work,
--as they first check HE support in the config.
--
--While doing these changes, I've noticed that the extra
--channel setup code for mesh networks in wpa_supplicant/mesh.c
--should not be necessary anymore and dropped it.
--wpa_supplicant_conf_ap_ht should handle this setup already.
--
--Acked-by: John Crispin <john@phrozen.org>
--Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
-----
-- src/ap/dfs.c          |  8 ++++----
-- wpa_supplicant/ap.c   | 40 +++++++++++++++++++++++-----------------
-- wpa_supplicant/mesh.c | 24 ------------------------
-- 3 files changed, 27 insertions(+), 45 deletions(-)
--
----- a/src/ap/dfs.c
--+++ b/src/ap/dfs.c
--@@ -1028,7 +1028,7 @@ static int hostapd_dfs_start_channel_swi
-- 	unsigned int i;
-- 	int err = 1;
-- 	struct hostapd_hw_modes *cmode = iface->current_mode;
---	u8 current_vht_oper_chwidth = iface->conf->vht_oper_chwidth;
--+	u8 current_vht_oper_chwidth = hostapd_get_oper_chwidth(iface->conf);
-- 
-- 	wpa_printf(MSG_DEBUG, "%s called (CAC active: %s, CSA active: %s)",
-- 		   __func__, iface->cac_started ? "yes" : "no",
--@@ -1089,8 +1089,8 @@ static int hostapd_dfs_start_channel_swi
-- 		"freq=%d chan=%d sec_chan=%d", channel->freq,
-- 		channel->chan, secondary_channel);
-- 
---	new_vht_oper_chwidth = iface->conf->vht_oper_chwidth;
---	iface->conf->vht_oper_chwidth = current_vht_oper_chwidth;
--+	new_vht_oper_chwidth = hostapd_get_oper_chwidth(iface->conf);
--+	hostapd_set_oper_chwidth(iface->conf, current_vht_oper_chwidth);
-- 
-- 	/* Setup CSA request */
-- 	os_memset(&csa_settings, 0, sizeof(csa_settings));
--@@ -1130,7 +1130,7 @@ static int hostapd_dfs_start_channel_swi
-- 		iface->freq = channel->freq;
-- 		iface->conf->channel = channel->chan;
-- 		iface->conf->secondary_channel = secondary_channel;
---		iface->conf->vht_oper_chwidth = new_vht_oper_chwidth;
--+		hostapd_set_oper_chwidth(iface->conf, new_vht_oper_chwidth);
-- 		hostapd_set_oper_centr_freq_seg0_idx(iface->conf,
-- 						     oper_centr_freq_seg0_idx);
-- 		hostapd_set_oper_centr_freq_seg1_idx(iface->conf,
----- a/wpa_supplicant/ap.c
--+++ b/wpa_supplicant/ap.c
--@@ -52,6 +52,7 @@ static void wpas_conf_ap_vht(struct wpa_
-- #ifdef CONFIG_P2P
-- 	u8 center_chan = 0;
-- 	u8 channel = conf->channel;
--+	u8 freq_seg_idx;
-- #endif /* CONFIG_P2P */
-- 
-- 	if (!conf->secondary_channel)
--@@ -59,19 +60,21 @@ static void wpas_conf_ap_vht(struct wpa_
-- 
-- 	/* Use the maximum oper channel width if it's given. */
-- 	if (ssid->max_oper_chwidth)
---		conf->vht_oper_chwidth = ssid->max_oper_chwidth;
--+		hostapd_set_oper_chwidth(conf, ssid->max_oper_chwidth);
-- 
-- 	ieee80211_freq_to_chan(ssid->vht_center_freq2,
---			       &conf->vht_oper_centr_freq_seg1_idx);
--+			       &freq_seg_idx);
--+	hostapd_set_oper_centr_freq_seg1_idx(conf, freq_seg_idx);
-- 
-- 	if (!ssid->p2p_group) {
-- 		if (!ssid->vht_center_freq1 ||
---		    conf->vht_oper_chwidth == CHANWIDTH_USE_HT)
--+		    hostapd_get_oper_chwidth(conf) == CHANWIDTH_USE_HT)
-- 			goto no_vht;
-- 		ieee80211_freq_to_chan(ssid->vht_center_freq1,
---				       &conf->vht_oper_centr_freq_seg0_idx);
--+				       &freq_seg_idx);
--+		hostapd_set_oper_centr_freq_seg0_idx(conf, freq_seg_idx);
-- 		wpa_printf(MSG_DEBUG, "VHT seg0 index %d for AP",
---			   conf->vht_oper_centr_freq_seg0_idx);
--+			   hostapd_get_oper_centr_freq_seg0_idx(conf));
-- 		return;
-- 	}
-- 
--@@ -96,14 +99,14 @@ static void wpas_conf_ap_vht(struct wpa_
-- 		 * try oper_cwidth 160 MHz first then VHT 80 MHz, if 160 MHz is
-- 		 * not supported.
-- 		 */
---		conf->vht_oper_chwidth = CHANWIDTH_160MHZ;
--+		hostapd_set_oper_chwidth(conf, CHANWIDTH_160MHZ);
-- 		center_chan = wpas_p2p_get_vht160_center(wpa_s, mode, channel);
-- 		if (center_chan) {
-- 			wpa_printf(MSG_DEBUG,
-- 				   "VHT center channel %u for auto-selected 160 MHz bandwidth",
-- 				   center_chan);
-- 		} else {
---			conf->vht_oper_chwidth = CHANWIDTH_80MHZ;
--+			hostapd_set_oper_chwidth(conf, CHANWIDTH_80MHZ);
-- 			center_chan = wpas_p2p_get_vht80_center(wpa_s, mode,
-- 								channel);
-- 			wpa_printf(MSG_DEBUG,
--@@ -115,9 +118,9 @@ static void wpas_conf_ap_vht(struct wpa_
-- 	if (!center_chan)
-- 		goto no_vht;
-- 
---	conf->vht_oper_centr_freq_seg0_idx = center_chan;
--+	hostapd_set_oper_centr_freq_seg0_idx(conf, center_chan);
-- 	wpa_printf(MSG_DEBUG, "VHT seg0 index %d for P2P GO",
---		   conf->vht_oper_centr_freq_seg0_idx);
--+		   hostapd_get_oper_centr_freq_seg0_idx(conf));
-- 	return;
-- #endif /* CONFIG_P2P */
-- 
--@@ -125,9 +128,9 @@ no_vht:
-- 	wpa_printf(MSG_DEBUG,
-- 		   "No VHT higher bandwidth support for the selected channel %d",
-- 		   conf->channel);
---	conf->vht_oper_centr_freq_seg0_idx =
---		conf->channel + conf->secondary_channel * 2;
---	conf->vht_oper_chwidth = CHANWIDTH_USE_HT;
--+	hostapd_set_oper_centr_freq_seg0_idx(conf,
--+					     conf->channel + conf->secondary_channel * 2);
--+	hostapd_set_oper_chwidth(conf, CHANWIDTH_USE_HT);
-- }
-- 
-- 
--@@ -231,16 +234,19 @@ int wpa_supplicant_conf_ap_ht(struct wpa
-- 				 HT_CAP_INFO_TX_STBC |
-- 				 HT_CAP_INFO_MAX_AMSDU_SIZE);
-- 
--+			/* check this before VHT, because setting oper chan
--+			 * width and friends is the same call for HE and VHT
--+			 * and checks if conf->ieee8021ax == 1 */
--+			if (mode->he_capab[wpas_mode_to_ieee80211_mode(
--+					    ssid->mode)].he_supported &&
--+			    ssid->he)
--+				conf->ieee80211ax = 1;
--+
-- 			if (mode->vht_capab && ssid->vht) {
-- 				conf->ieee80211ac = 1;
-- 				conf->vht_capab |= mode->vht_capab;
-- 				wpas_conf_ap_vht(wpa_s, ssid, conf, mode);
-- 			}
---
---			if (mode->he_capab[wpas_mode_to_ieee80211_mode(
---					    ssid->mode)].he_supported &&
---			    ssid->he)
---				conf->ieee80211ax = 1;
-- 		}
-- 	}
-- 
----- a/wpa_supplicant/mesh.c
--+++ b/wpa_supplicant/mesh.c
--@@ -333,30 +333,6 @@ static int wpa_supplicant_mesh_init(stru
-- 			   frequency);
-- 		goto out_free;
-- 	}
---	if (ssid->ht40)
---		conf->secondary_channel = ssid->ht40;
---	if (conf->hw_mode == HOSTAPD_MODE_IEEE80211A && ssid->vht) {
---		if (ssid->max_oper_chwidth != DEFAULT_MAX_OPER_CHWIDTH)
---			conf->vht_oper_chwidth = ssid->max_oper_chwidth;
---		switch (conf->vht_oper_chwidth) {
---		case CHANWIDTH_80MHZ:
---		case CHANWIDTH_80P80MHZ:
---			ieee80211_freq_to_chan(
---				frequency,
---				&conf->vht_oper_centr_freq_seg0_idx);
---			conf->vht_oper_centr_freq_seg0_idx += ssid->ht40 * 2;
---			break;
---		case CHANWIDTH_160MHZ:
---			ieee80211_freq_to_chan(
---				frequency,
---				&conf->vht_oper_centr_freq_seg0_idx);
---			conf->vht_oper_centr_freq_seg0_idx += ssid->ht40 * 2;
---			conf->vht_oper_centr_freq_seg0_idx += 40 / 5;
---			break;
---		}
---		ieee80211_freq_to_chan(ssid->vht_center_freq2,
---				       &conf->vht_oper_centr_freq_seg1_idx);
---	}
-- 
-- 	if (ssid->mesh_basic_rates == NULL) {
-- 		/*
-diff --git a/package/network/services/hostapd/patches/002-mesh-fix-channel-init-order-disable-pri-sec-channel-.patch b/package/network/services/hostapd/patches/002-mesh-fix-channel-init-order-disable-pri-sec-channel-.patch
-deleted file mode 100644
-index c7101b1dbc..0000000000
---- a/package/network/services/hostapd/patches/002-mesh-fix-channel-init-order-disable-pri-sec-channel-.patch
-+++ /dev/null
-@@ -1,126 +0,0 @@
--From d869c753b79a1423c2bd9b0afdfa0d89d55a930c Mon Sep 17 00:00:00 2001
--From: Markus Theil <markus.theil@tu-ilmenau.de>
--Date: Tue, 30 Jun 2020 13:53:18 +0200
--Subject: [PATCH 02/19] mesh: fix channel init order, disable pri/sec channel
-- switch
--
--wpa_supplicant_conf_ap_ht has to happen before hostapd_setup_interface
--in order for its configuration settings to have effect on interface
--configuration.
--
--Disable primary and secondary channel switch because of missing tie
--breaking rule/frames in mesh networks. A rather long comment about
--this issue is placed in mesh.c in the corresponding place.
--
--In consequence, remove mesh coex test, which contradicts this change.
--
--I was not able to reproduce the memory corruption during
--mesh_secure_ocv_mix_legacy, which lead to a revert of a similar patch
--in the past.
--
--Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
-----
-- tests/hwsim/test_wpas_mesh.py | 50 -----------------------------------
-- wpa_supplicant/mesh.c         | 25 ++++++++++++++++--
-- 2 files changed, 23 insertions(+), 52 deletions(-)
--
----- a/tests/hwsim/test_wpas_mesh.py
--+++ b/tests/hwsim/test_wpas_mesh.py
--@@ -933,56 +933,6 @@ def _test_wpas_mesh_open_5ghz(dev, apdev
--     dev[0].dump_monitor()
--     dev[1].dump_monitor()
-- 
---def test_wpas_mesh_open_5ghz_coex(dev, apdev):
---    """Mesh network on 5 GHz band and 20/40 coex change"""
---    try:
---        _test_wpas_mesh_open_5ghz_coex(dev, apdev)
---    finally:
---        dev[0].request("MESH_GROUP_REMOVE " + dev[0].ifname)
---        dev[1].request("MESH_GROUP_REMOVE " + dev[1].ifname)
---        set_world_reg(apdev0=apdev[0], dev0=dev[0])
---        dev[0].flush_scan_cache()
---        dev[1].flush_scan_cache()
---
---def _test_wpas_mesh_open_5ghz_coex(dev, apdev):
---    check_mesh_support(dev[0])
---    subprocess.call(['iw', 'reg', 'set', 'US'])
---
---    # Start a 20 MHz BSS on channel 40 that would be the secondary channel of
---    # HT40+ mesh on channel 36.
---    params = {"ssid": "test-ht40",
---              "hw_mode": "a",
---              "channel": "40",
---              "country_code": "US"}
---    hapd = hostapd.add_ap(apdev[0], params)
---    bssid = hapd.own_addr()
---
---    for i in range(2):
---        for j in range(5):
---            ev = dev[i].wait_event(["CTRL-EVENT-REGDOM-CHANGE"], timeout=5)
---            if ev is None:
---                raise Exception("No regdom change event")
---            if "alpha2=US" in ev:
---                break
---        dev[i].scan_for_bss(bssid, freq=5200)
---        add_open_mesh_network(dev[i], freq="5180")
---
---    check_mesh_joined_connected(dev)
---
---    freq = dev[0].get_status_field("freq")
---    if freq != "5200":
---        raise Exception("Unexpected STATUS freq=" + freq)
---    sig = dev[0].request("SIGNAL_POLL").splitlines()
---    if "FREQUENCY=5200" not in sig:
---        raise Exception("Unexpected SIGNAL_POLL output: " + str(sig))
---
---    hapd.disable()
---    dev[0].mesh_group_remove()
---    dev[1].mesh_group_remove()
---    check_mesh_group_removed(dev[0])
---    check_mesh_group_removed(dev[1])
---    dev[0].dump_monitor()
---    dev[1].dump_monitor()
-- 
-- def test_wpas_mesh_open_ht40(dev, apdev):
--     """Mesh and HT40 support difference"""
----- a/wpa_supplicant/mesh.c
--+++ b/wpa_supplicant/mesh.c
--@@ -363,6 +363,29 @@ static int wpa_supplicant_mesh_init(stru
-- 		conf->basic_rates[rate_len] = -1;
-- 	}
-- 
--+	/* While it can enhance performance to switch the primary channel, which
--+	 * is also the secondary channel of another network at the same time),
--+	 * to the other primary channel, problems exist with this in mesh networks.
--+	 *
--+	 * Example with problems:
--+	 *     - 3 mesh nodes M1-M3, freq (5200, 5180)
--+	 *     - other node O1, e.g. AP mode, freq (5180, 5200),
--+	 * Locations: O1 M1      M2      M3
--+	 *
--+	 * M3 can only send frames to M1 over M2, no direct connection is possible
--+	 * Start O1, M1 and M3 first, M1 or O1 will switch channels to align with
--+	 * each other. M3 does not swap, because M1 or O1 cannot be reached.
--+	 * M2 is started afterwards and can either connect to M3 or M1 because of
--+	 * this primary secondary channel switch.
--+	 *
--+	 * Solutions: (1) central coordination -> not always possible
--+	 *            (2) disable pri/sec channel switch in mesh networks
--+	 *
--+	 * In AP mode, when all nodes can work independently, this poses of course
--+	 * no problem, therefore disable it only in mesh mode.`*/
--+	conf->no_pri_sec_switch = 1;
--+	wpa_supplicant_conf_ap_ht(wpa_s, ssid, conf);
--+
-- 	if (wpa_drv_init_mesh(wpa_s)) {
-- 		wpa_msg(wpa_s, MSG_ERROR, "Failed to init mesh in driver");
-- 		return -1;
--@@ -374,8 +397,6 @@ static int wpa_supplicant_mesh_init(stru
-- 		return -1;
-- 	}
-- 
---	wpa_supplicant_conf_ap_ht(wpa_s, ssid, conf);
---
-- 	return 0;
-- out_free:
-- 	wpa_supplicant_mesh_deinit(wpa_s);
-diff --git a/package/network/services/hostapd/patches/003-wpa_supplicant-handle-HT40-and-mode-downgrade-in-AP-.patch b/package/network/services/hostapd/patches/003-wpa_supplicant-handle-HT40-and-mode-downgrade-in-AP-.patch
-deleted file mode 100644
-index f42620042d..0000000000
---- a/package/network/services/hostapd/patches/003-wpa_supplicant-handle-HT40-and-mode-downgrade-in-AP-.patch
-+++ /dev/null
-@@ -1,102 +0,0 @@
--From 978a59514ccde994b5c06e1cbb49cc8cebe6381c Mon Sep 17 00:00:00 2001
--From: Markus Theil <markus.theil@tu-ilmenau.de>
--Date: Tue, 30 Jun 2020 13:53:19 +0200
--Subject: [PATCH 03/19] wpa_supplicant: handle HT40 and mode downgrade in AP
-- mode
--
--This patch adds some missing pieces to the interface configuration
--of AP/mesh mode in wpa_supplicant.
-- - check for secondary channel and HT40 capability
-- - try to downgrade to 11b if 11g is not available
--Especially with the HT40 check, this code now performs all settings,
--which the deleted/duplicated mesh code did.
--
--Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
-----
-- wpa_supplicant/ap.c | 49 ++++++++++++++++++++++++++++++++++++---------
-- 1 file changed, 40 insertions(+), 9 deletions(-)
--
----- a/wpa_supplicant/ap.c
--+++ b/wpa_supplicant/ap.c
--@@ -134,6 +134,23 @@ no_vht:
-- }
-- 
-- 
--+static struct hostapd_hw_modes *wpa_supplicant_find_hw_mode(struct wpa_supplicant *wpa_s,
--+							    enum hostapd_hw_mode hw_mode)
--+{
--+	struct hostapd_hw_modes *mode = NULL;
--+	int i;
--+
--+	for (i = 0; i < wpa_s->hw.num_modes; i++) {
--+		if (wpa_s->hw.modes[i].mode == hw_mode) {
--+			mode = &wpa_s->hw.modes[i];
--+			break;
--+		}
--+	}
--+
--+	return mode;
--+}
--+
--+
-- int wpa_supplicant_conf_ap_ht(struct wpa_supplicant *wpa_s,
-- 			      struct wpa_ssid *ssid,
-- 			      struct hostapd_config *conf)
--@@ -147,9 +164,6 @@ int wpa_supplicant_conf_ap_ht(struct wpa
-- 		return -1;
-- 	}
-- 
---	/* TODO: enable HT40 if driver supports it;
---	 * drop to 11b if driver does not support 11g */
---
-- 	/*
-- 	 * Enable HT20 if the driver supports it, by setting conf->ieee80211n
-- 	 * and a mask of allowed capabilities within conf->ht_capab.
--@@ -158,17 +172,27 @@ int wpa_supplicant_conf_ap_ht(struct wpa
-- 	 */
-- 	if (wpa_s->hw.modes) {
-- 		struct hostapd_hw_modes *mode = NULL;
---		int i, no_ht = 0;
--+		int no_ht = 0;
-- 
-- 		wpa_printf(MSG_DEBUG,
-- 			   "Determining HT/VHT options based on driver capabilities (freq=%u chan=%u)",
-- 			   ssid->frequency, conf->channel);
-- 
---		for (i = 0; i < wpa_s->hw.num_modes; i++) {
---			if (wpa_s->hw.modes[i].mode == conf->hw_mode) {
---				mode = &wpa_s->hw.modes[i];
---				break;
---			}
--+		mode = wpa_supplicant_find_hw_mode(wpa_s, conf->hw_mode);
--+
--+		/* may drop drop to 11b if driver does not support 11g */
--+		if (!mode && conf->hw_mode == HOSTAPD_MODE_IEEE80211G) {
--+			conf->hw_mode = HOSTAPD_MODE_IEEE80211B;
--+			wpa_printf(MSG_INFO,
--+			   "Try downgrade to IEEE 802.11b as 802.11g is not "
--+			   "supported by the current hardware");
--+			mode = wpa_supplicant_find_hw_mode(wpa_s, conf->hw_mode);
--+		}
--+
--+		if (!mode) {
--+			wpa_printf(MSG_ERROR,
--+			   "No match between requested and supported hw modes found");
--+			return -1;
-- 		}
-- 
-- #ifdef CONFIG_HT_OVERRIDES
--@@ -193,6 +217,13 @@ int wpa_supplicant_conf_ap_ht(struct wpa
-- 				      HT_CAP_INFO_SUPP_CHANNEL_WIDTH_SET),
-- 				   ssid->ht40);
-- 			conf->ieee80211n = 1;
--+
--+			if (ssid->ht40 &&
--+			    mode->ht_capab & HT_CAP_INFO_SUPP_CHANNEL_WIDTH_SET)
--+				conf->secondary_channel = ssid->ht40;
--+			else
--+				conf->secondary_channel = 0;
--+
-- #ifdef CONFIG_P2P
-- 			if (ssid->p2p_group &&
-- 			    conf->hw_mode == HOSTAPD_MODE_IEEE80211A &&
-diff --git a/package/network/services/hostapd/patches/004-wpa_supplicant-fix-frequency-config-for-non-p2p-vht-.patch b/package/network/services/hostapd/patches/004-wpa_supplicant-fix-frequency-config-for-non-p2p-vht-.patch
-deleted file mode 100644
-index e8682af644..0000000000
---- a/package/network/services/hostapd/patches/004-wpa_supplicant-fix-frequency-config-for-non-p2p-vht-.patch
-+++ /dev/null
-@@ -1,63 +0,0 @@
--From 7f7325dae1d03a3964d4e91940d8369f3fed7b43 Mon Sep 17 00:00:00 2001
--From: Markus Theil <markus.theil@tu-ilmenau.de>
--Date: Tue, 30 Jun 2020 13:53:20 +0200
--Subject: [PATCH 04/19] wpa_supplicant: fix frequency config for non p2p vht/he
-- cases
--
--Fix compile without CONFIG_P2P and only set secondary channel seg idx
--if we use a mode supporting a sec channel for vht/he.
--
--Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
-----
-- wpa_supplicant/ap.c | 23 +++++++++++++----------
-- 1 file changed, 13 insertions(+), 10 deletions(-)
--
----- a/wpa_supplicant/ap.c
--+++ b/wpa_supplicant/ap.c
--@@ -52,8 +52,8 @@ static void wpas_conf_ap_vht(struct wpa_
-- #ifdef CONFIG_P2P
-- 	u8 center_chan = 0;
-- 	u8 channel = conf->channel;
---	u8 freq_seg_idx;
-- #endif /* CONFIG_P2P */
--+	u8 freq_seg_idx;
-- 
-- 	if (!conf->secondary_channel)
-- 		goto no_vht;
--@@ -62,24 +62,27 @@ static void wpas_conf_ap_vht(struct wpa_
-- 	if (ssid->max_oper_chwidth)
-- 		hostapd_set_oper_chwidth(conf, ssid->max_oper_chwidth);
-- 
---	ieee80211_freq_to_chan(ssid->vht_center_freq2,
---			       &freq_seg_idx);
---	hostapd_set_oper_centr_freq_seg1_idx(conf, freq_seg_idx);
---
-- 	if (!ssid->p2p_group) {
---		if (!ssid->vht_center_freq1 ||
---		    hostapd_get_oper_chwidth(conf) == CHANWIDTH_USE_HT)
--+		if (!ssid->vht_center_freq1)
-- 			goto no_vht;
-- 		ieee80211_freq_to_chan(ssid->vht_center_freq1,
-- 				       &freq_seg_idx);
-- 		hostapd_set_oper_centr_freq_seg0_idx(conf, freq_seg_idx);
---		wpa_printf(MSG_DEBUG, "VHT seg0 index %d for AP",
---			   hostapd_get_oper_centr_freq_seg0_idx(conf));
--+
--+		if (hostapd_get_oper_chwidth(conf) == CHANWIDTH_80P80MHZ) {
--+			ieee80211_freq_to_chan(ssid->vht_center_freq2,
--+					       &freq_seg_idx);
--+			hostapd_set_oper_centr_freq_seg1_idx(conf, freq_seg_idx);
--+		}
--+
--+		wpa_printf(MSG_DEBUG, "VHT seg0 index %d and seg1 index %d for AP",
--+			   hostapd_get_oper_centr_freq_seg0_idx(conf),
--+			   hostapd_get_oper_centr_freq_seg1_idx(conf));
-- 		return;
-- 	}
-- 
-- #ifdef CONFIG_P2P
---	switch (conf->vht_oper_chwidth) {
--+	switch (hostapd_get_oper_chwidth(conf)) {
-- 	case CHANWIDTH_80MHZ:
-- 	case CHANWIDTH_80P80MHZ:
-- 		center_chan = wpas_p2p_get_vht80_center(wpa_s, mode, channel);
-diff --git a/package/network/services/hostapd/patches/005-wpa_supplicant-enable-vht-and-he-in-default-config-p.patch b/package/network/services/hostapd/patches/005-wpa_supplicant-enable-vht-and-he-in-default-config-p.patch
-deleted file mode 100644
-index 25d74252cd..0000000000
---- a/package/network/services/hostapd/patches/005-wpa_supplicant-enable-vht-and-he-in-default-config-p.patch
-+++ /dev/null
-@@ -1,25 +0,0 @@
--From ff7fb3fa0831c8521327d777c5607a3b7d8736b8 Mon Sep 17 00:00:00 2001
--From: Markus Theil <markus.theil@tu-ilmenau.de>
--Date: Tue, 30 Jun 2020 13:53:21 +0200
--Subject: [PATCH 05/19] wpa_supplicant: enable vht and he in default config
-- parameters
--
--Enable VHT and HE as default config parameters in order for
--wpa_supplicant AP mode to use it, if hw support is given.
--
--Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
-----
-- wpa_supplicant/config.c | 2 ++
-- 1 file changed, 2 insertions(+)
--
----- a/wpa_supplicant/config.c
--+++ b/wpa_supplicant/config.c
--@@ -3036,6 +3036,8 @@ void wpa_config_set_network_defaults(str
-- 	ssid->wpa_deny_ptk0_rekey = PTK0_REKEY_ALLOW_ALWAYS;
-- 	ssid->bg_scan_period = DEFAULT_BG_SCAN_PERIOD;
-- 	ssid->ht = 1;
--+	ssid->vht = 1;
--+	ssid->he = 1;
-- #ifdef IEEE8021X_EAPOL
-- 	ssid->eapol_flags = DEFAULT_EAPOL_FLAGS;
-- 	ssid->eap_workaround = DEFAULT_EAP_WORKAROUND;
-diff --git a/package/network/services/hostapd/patches/006-hw_features-better-debug-messages-for-some-error-cas.patch b/package/network/services/hostapd/patches/006-hw_features-better-debug-messages-for-some-error-cas.patch
-deleted file mode 100644
-index 31b1ac0d38..0000000000
---- a/package/network/services/hostapd/patches/006-hw_features-better-debug-messages-for-some-error-cas.patch
-+++ /dev/null
-@@ -1,83 +0,0 @@
--From 6522dcbbcf71abcb80cce84b93b4a9a5cfcd4fca Mon Sep 17 00:00:00 2001
--From: Markus Theil <markus.theil@tu-ilmenau.de>
--Date: Tue, 30 Jun 2020 13:53:22 +0200
--Subject: [PATCH 06/19] hw_features: better debug messages for some error cases
--
--Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
-----
-- src/common/hw_features_common.c | 29 ++++++++++++++++++++++-------
-- 1 file changed, 22 insertions(+), 7 deletions(-)
--
----- a/src/common/hw_features_common.c
--+++ b/src/common/hw_features_common.c
--@@ -540,13 +540,18 @@ int hostapd_set_freq_params(struct hosta
-- 		if (center_segment1 ||
-- 		    (center_segment0 != 0 &&
-- 		     5000 + center_segment0 * 5 != data->center_freq1 &&
---		     2407 + center_segment0 * 5 != data->center_freq1))
--+		     2407 + center_segment0 * 5 != data->center_freq1)) {
--+			wpa_printf(MSG_ERROR, "20/40 MHz: center segment 0 (=%i) and center freq 1 (=%i) not in sync",
--+				   center_segment0, data->center_freq1);
-- 			return -1;
--+		}
-- 		break;
-- 	case CHANWIDTH_80P80MHZ:
-- 		if (center_segment1 == center_segment0 + 4 ||
---		    center_segment1 == center_segment0 - 4)
--+		    center_segment1 == center_segment0 - 4) {
--+			wpa_printf(MSG_ERROR, "80+80 MHz: center segment 1 only 20 MHz apart");
-- 			return -1;
--+		}
-- 		data->center_freq2 = 5000 + center_segment1 * 5;
-- 		/* fall through */
-- 	case CHANWIDTH_80MHZ:
--@@ -555,8 +560,10 @@ int hostapd_set_freq_params(struct hosta
-- 		     center_segment1) ||
-- 		    (oper_chwidth == CHANWIDTH_80P80MHZ &&
-- 		     !center_segment1) ||
---		    !sec_channel_offset)
--+		    !sec_channel_offset) {
--+			wpa_printf(MSG_ERROR, "80/80+80 MHz: center segment 1 wrong or no second channel offset");
-- 			return -1;
--+		}
-- 		if (!center_segment0) {
-- 			if (channel <= 48)
-- 				center_segment0 = 42;
--@@ -582,16 +589,22 @@ int hostapd_set_freq_params(struct hosta
-- 			    center_segment0 == channel - 2 ||
-- 			    center_segment0 == channel - 6)
-- 				data->center_freq1 = 5000 + center_segment0 * 5;
---			else
--+			else {
--+				wpa_printf(MSG_ERROR, "Wrong coupling between HT and VHT/HE channel setting");
-- 				return -1;
--+			}
-- 		}
-- 		break;
-- 	case CHANWIDTH_160MHZ:
-- 		data->bandwidth = 160;
---		if (center_segment1)
--+		if (center_segment1) {
--+			wpa_printf(MSG_ERROR, "160 MHz: center segment 1 should not be set");
-- 			return -1;
---		if (!sec_channel_offset)
--+		}
--+		if (!sec_channel_offset) {
--+			wpa_printf(MSG_ERROR, "160 MHz: second channel offset not set");
-- 			return -1;
--+		}
-- 		/*
-- 		 * Note: HT/VHT config and params are coupled. Check if
-- 		 * HT40 channel band is in VHT160 channel band configuration.
--@@ -605,8 +618,10 @@ int hostapd_set_freq_params(struct hosta
-- 		    center_segment0 == channel - 10 ||
-- 		    center_segment0 == channel - 14)
-- 			data->center_freq1 = 5000 + center_segment0 * 5;
---		else
--+		else {
--+			wpa_printf(MSG_ERROR, "160 MHz: HT40 channel band is not in 160 MHz band");
-- 			return -1;
--+		}
-- 		break;
-- 	}
-- 
-diff --git a/package/network/services/hostapd/patches/007-dfs-use-helper-functions-for-vht-he-parameters.patch b/package/network/services/hostapd/patches/007-dfs-use-helper-functions-for-vht-he-parameters.patch
-deleted file mode 100644
-index 3481c52eef..0000000000
---- a/package/network/services/hostapd/patches/007-dfs-use-helper-functions-for-vht-he-parameters.patch
-+++ /dev/null
-@@ -1,27 +0,0 @@
--From 6eacc14904b6f09a1490e697c01adf5dc56c4905 Mon Sep 17 00:00:00 2001
--From: Markus Theil <markus.theil@tu-ilmenau.de>
--Date: Tue, 30 Jun 2020 13:53:23 +0200
--Subject: [PATCH 07/19] dfs: use helper functions for vht/he parameters
--
--Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
-----
-- src/ap/dfs.c | 6 ++++--
-- 1 file changed, 4 insertions(+), 2 deletions(-)
--
----- a/src/ap/dfs.c
--+++ b/src/ap/dfs.c
--@@ -955,10 +955,12 @@ dfs_downgrade_bandwidth(struct hostapd_i
-- 		if (*skip_radar) {
-- 			*skip_radar = 0;
-- 		} else {
---			if (iface->conf->vht_oper_chwidth == CHANWIDTH_USE_HT)
--+			int oper_chwidth = hostapd_get_oper_chwidth(iface->conf);
--+
--+			if (oper_chwidth == CHANWIDTH_USE_HT)
-- 				break;
-- 			*skip_radar = 1;
---			iface->conf->vht_oper_chwidth--;
--+			hostapd_set_oper_chwidth(iface->conf, oper_chwidth - 1);
-- 		}
-- 	}
-- 
-diff --git a/package/network/services/hostapd/patches/008-mesh-use-setup-completion-callback-to-complete-mesh-.patch b/package/network/services/hostapd/patches/008-mesh-use-setup-completion-callback-to-complete-mesh-.patch
-deleted file mode 100644
-index 28c283d035..0000000000
---- a/package/network/services/hostapd/patches/008-mesh-use-setup-completion-callback-to-complete-mesh-.patch
-+++ /dev/null
-@@ -1,108 +0,0 @@
--From 11e5bbe58eebdb10793eec374b6c8ccc7daf7ec8 Mon Sep 17 00:00:00 2001
--From: Peter Oh <peter.oh@bowerswilkins.com>
--Date: Tue, 30 Jun 2020 14:18:56 +0200
--Subject: [PATCH 08/19] mesh: use setup completion callback to complete mesh
-- join
--
--mesh join function is the last function to be called during
--mesh join process, but it's been called a bit earlier than
--it's supposed to be, so that some mesh parameter values
--such as VHT capabilities not applied correct when mesh join
--is in process.
--Moreover current design of mesh join that is called directly
--after mesh initialization isn't suitable for DFS channels to use,
--since mesh join process should be paused until DFS CAC is
--done and resumed after it's done.
--The callback will be called by hostapd_setup_interface_complete_sync.
--There is possiblity that completing mesh init fails, so add error
--handle codes.
--
--Signed-off-by: Peter Oh <peter.oh@bowerswilkins.com>
-----
-- src/ap/hostapd.c      | 11 ++++++++++-
-- wpa_supplicant/mesh.c | 12 ++++++++++--
-- 2 files changed, 20 insertions(+), 3 deletions(-)
--
----- a/src/ap/hostapd.c
--+++ b/src/ap/hostapd.c
--@@ -434,6 +434,8 @@ static void hostapd_free_hapd_data(struc
-- #ifdef CONFIG_MESH
-- 	wpabuf_free(hapd->mesh_pending_auth);
-- 	hapd->mesh_pending_auth = NULL;
--+	/* handling setup failure is already done */
--+	hapd->setup_complete_cb = NULL;
-- #endif /* CONFIG_MESH */
-- 
-- 	hostapd_clean_rrm(hapd);
--@@ -2156,6 +2158,13 @@ dfs_offload:
-- 	if (hapd->setup_complete_cb)
-- 		hapd->setup_complete_cb(hapd->setup_complete_cb_ctx);
-- 
--+#ifdef CONFIG_MESH
--+	if (delay_apply_cfg && iface->mconf == NULL) {
--+		wpa_printf(MSG_ERROR, "Error while completing mesh init");
--+		goto fail;
--+	}
--+#endif /* CONFIG_MESH */
--+
-- 	wpa_printf(MSG_DEBUG, "%s: Setup of interface done.",
-- 		   iface->bss[0]->conf->iface);
-- 	if (iface->interfaces && iface->interfaces->terminate_on_error > 0)
--@@ -2299,7 +2308,7 @@ int hostapd_setup_interface(struct hosta
-- 	ret = setup_interface(iface);
-- 	if (ret) {
-- 		wpa_printf(MSG_ERROR, "%s: Unable to setup interface.",
---			   iface->bss[0]->conf->iface);
--+			iface->conf ? iface->conf->bss[0]->iface : "N/A");
-- 		return -1;
-- 	}
-- 
----- a/wpa_supplicant/mesh.c
--+++ b/wpa_supplicant/mesh.c
--@@ -193,7 +193,6 @@ static int wpas_mesh_init_rsn(struct wpa
-- 	return !wpa_s->mesh_rsn ? -1 : 0;
-- }
-- 
---
-- static int wpas_mesh_complete(struct wpa_supplicant *wpa_s)
-- {
-- 	struct hostapd_iface *ifmsh = wpa_s->ifmsh;
--@@ -244,6 +243,13 @@ static int wpas_mesh_complete(struct wpa
-- }
-- 
-- 
--+static void wpas_mesh_complete_cb(void *arg)
--+{
--+	struct wpa_supplicant *wpa_s = arg;
--+	wpas_mesh_complete(wpa_s);
--+}
--+
--+
-- static int wpa_supplicant_mesh_init(struct wpa_supplicant *wpa_s,
-- 				    struct wpa_ssid *ssid,
-- 				    struct hostapd_freq_params *freq)
--@@ -267,6 +273,7 @@ static int wpa_supplicant_mesh_init(stru
-- 	if (!ifmsh)
-- 		return -ENOMEM;
-- 
--+	ifmsh->owner = wpa_s;
-- 	ifmsh->drv_flags = wpa_s->drv_flags;
-- 	ifmsh->drv_flags2 = wpa_s->drv_flags2;
-- 	ifmsh->num_bss = 1;
--@@ -285,6 +292,8 @@ static int wpa_supplicant_mesh_init(stru
-- 	bss->drv_priv = wpa_s->drv_priv;
-- 	bss->iface = ifmsh;
-- 	bss->mesh_sta_free_cb = mesh_mpm_free_sta;
--+	bss->setup_complete_cb = wpas_mesh_complete_cb;
--+	bss->setup_complete_cb_ctx = wpa_s;
-- 	frequency = ssid->frequency;
-- 	if (frequency != freq->freq &&
-- 	    frequency == freq->freq + freq->sec_channel_offset * 20) {
--@@ -523,7 +532,6 @@ int wpa_supplicant_join_mesh(struct wpa_
-- 		goto out;
-- 	}
-- 
---	ret = wpas_mesh_complete(wpa_s);
-- out:
-- 	return ret;
-- }
-diff --git a/package/network/services/hostapd/patches/009-mesh-update-ssid-frequency-as-pri-sec-channel-switch.patch b/package/network/services/hostapd/patches/009-mesh-update-ssid-frequency-as-pri-sec-channel-switch.patch
-deleted file mode 100644
-index b48de67636..0000000000
---- a/package/network/services/hostapd/patches/009-mesh-update-ssid-frequency-as-pri-sec-channel-switch.patch
-+++ /dev/null
-@@ -1,26 +0,0 @@
--From 87c5e8883898e7eb8e9637e212350c1925a22654 Mon Sep 17 00:00:00 2001
--From: Peter Oh <peter.oh@bowerswilkins.com>
--Date: Tue, 30 Jun 2020 14:18:57 +0200
--Subject: [PATCH 09/19] mesh: update ssid->frequency as pri/sec channel switch
--
--ssid->frequency is one of variables used to gets channel
--number from given frequency. Leave it as unchanged when
--pri/sec channel switched will cause picking up wrong
--channel number after applying secondary channel offset
--for HT40 and leads failing interface bring-up.
--
--Signed-off-by: Peter Oh <peter.oh@bowerswilkins.com>
-----
-- wpa_supplicant/mesh.c | 1 +
-- 1 file changed, 1 insertion(+)
--
----- a/wpa_supplicant/mesh.c
--+++ b/wpa_supplicant/mesh.c
--@@ -299,6 +299,7 @@ static int wpa_supplicant_mesh_init(stru
-- 	    frequency == freq->freq + freq->sec_channel_offset * 20) {
-- 		wpa_printf(MSG_DEBUG, "mesh: pri/sec channels switched");
-- 		frequency = freq->freq;
--+		ssid->frequency = frequency;
-- 	}
-- 	wpa_s->assoc_freq = frequency;
-- 	wpa_s->current_ssid = ssid;
-diff --git a/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch b/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch
-deleted file mode 100644
-index 8afeba93ed..0000000000
---- a/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch
-+++ /dev/null
-@@ -1,80 +0,0 @@
--From 8de8cd8380af0c43d4fde67a668d79ef73b26b26 Mon Sep 17 00:00:00 2001
--From: Peter Oh <peter.oh@bowerswilkins.com>
--Date: Tue, 30 Jun 2020 14:18:58 +0200
--Subject: [PATCH 10/19] mesh: Allow DFS channels to be selected if dfs is
-- enabled
--
--Note: DFS is assumed to be usable if a country code has been set
--
--Signed-off-by: Benjamin Berg <benjamin@sipsolutions.net>
--Signed-off-by: Peter Oh <peter.oh@bowerswilkins.com>
-----
-- wpa_supplicant/wpa_supplicant.c | 25 +++++++++++++++++++------
-- 1 file changed, 19 insertions(+), 6 deletions(-)
--
----- a/wpa_supplicant/wpa_supplicant.c
--+++ b/wpa_supplicant/wpa_supplicant.c
--@@ -2349,6 +2349,8 @@ void ibss_mesh_setup_freq(struct wpa_sup
-- 	int chwidth, seg0, seg1;
-- 	u32 vht_caps = 0;
-- 	int is_24ghz;
--+	int dfs_enabled = wpa_s->conf->country[0] &&
--+			 (wpa_s->drv_flags & WPA_DRIVER_FLAGS_RADAR);
-- 
-- 	freq->freq = ssid->frequency;
-- 
--@@ -2436,8 +2438,11 @@ void ibss_mesh_setup_freq(struct wpa_sup
-- 		return;
-- 
-- 	/* Check primary channel flags */
---	if (pri_chan->flag & (HOSTAPD_CHAN_DISABLED | HOSTAPD_CHAN_NO_IR))
--+	if (pri_chan->flag & HOSTAPD_CHAN_DISABLED)
-- 		return;
--+	if (pri_chan->flag & (HOSTAPD_CHAN_RADAR | HOSTAPD_CHAN_NO_IR))
--+		if (!dfs_enabled)
--+			return;
-- 
-- 	freq->channel = pri_chan->chan;
-- 
--@@ -2470,8 +2475,11 @@ void ibss_mesh_setup_freq(struct wpa_sup
-- 		return;
-- 
-- 	/* Check secondary channel flags */
---	if (sec_chan->flag & (HOSTAPD_CHAN_DISABLED | HOSTAPD_CHAN_NO_IR))
--+	if (sec_chan->flag & HOSTAPD_CHAN_DISABLED)
-- 		return;
--+	if (sec_chan->flag & (HOSTAPD_CHAN_RADAR | HOSTAPD_CHAN_NO_IR))
--+		if (!dfs_enabled)
--+			return;
-- 
-- 	if (ht40 == -1) {
-- 		if (!(pri_chan->flag & HOSTAPD_CHAN_HT40MINUS))
--@@ -2564,8 +2572,11 @@ skip_ht40:
-- 			return;
-- 
-- 		/* Back to HT configuration if channel not usable */
---		if (chan->flag & (HOSTAPD_CHAN_DISABLED | HOSTAPD_CHAN_NO_IR))
--+		if (chan->flag & HOSTAPD_CHAN_DISABLED)
-- 			return;
--+		if (chan->flag & (HOSTAPD_CHAN_RADAR | HOSTAPD_CHAN_NO_IR))
--+			if (!dfs_enabled)
--+				return;
-- 	}
-- 
-- 	chwidth = CHANWIDTH_80MHZ;
--@@ -2585,10 +2596,12 @@ skip_ht40:
-- 				if (!chan)
-- 					continue;
-- 
---				if (chan->flag & (HOSTAPD_CHAN_DISABLED |
---						  HOSTAPD_CHAN_NO_IR |
---						  HOSTAPD_CHAN_RADAR))
--+				if (chan->flag & HOSTAPD_CHAN_DISABLED)
-- 					continue;
--+				if (chan->flag & (HOSTAPD_CHAN_RADAR |
--+						  HOSTAPD_CHAN_NO_IR))
--+					if (!dfs_enabled)
--+						continue;
-- 
-- 				/* Found a suitable second segment for 80+80 */
-- 				chwidth = CHANWIDTH_80P80MHZ;
-diff --git a/package/network/services/hostapd/patches/011-mesh-do-not-set-offchanok-on-DFS-channels-in-non-ETS.patch b/package/network/services/hostapd/patches/011-mesh-do-not-set-offchanok-on-DFS-channels-in-non-ETS.patch
-deleted file mode 100644
-index d491f7c4bc..0000000000
---- a/package/network/services/hostapd/patches/011-mesh-do-not-set-offchanok-on-DFS-channels-in-non-ETS.patch
-+++ /dev/null
-@@ -1,53 +0,0 @@
--From af8dcbc87466ed6472850a4f1cfe252652cb3d26 Mon Sep 17 00:00:00 2001
--From: Peter Oh <peter.oh@bowerswilkins.com>
--Date: Tue, 30 Jun 2020 14:18:59 +0200
--Subject: [PATCH 11/19] mesh: do not set offchanok on DFS channels in non-ETSI
--
--mac80211 does not allow mgmt tx to use off channel on
--DFS channels in non-ETSI domain, because it will invalidate
--CAC result on current operating channel.
--(mac80211 commit: 34373d12f3cbb74960a73431138ef619d857996f)
--Hence don't set offchanok for mgmt tx in case of DFS channels
--in non-ETSI.
--
--Signed-off-by: Peter Oh <peter.oh@bowerswilkins.com>
-----
-- src/drivers/driver_nl80211.c | 19 +++++++++++++++++++
-- 1 file changed, 19 insertions(+)
--
----- a/src/drivers/driver_nl80211.c
--+++ b/src/drivers/driver_nl80211.c
--@@ -7788,7 +7788,11 @@ static int wpa_driver_nl80211_send_actio
-- 	int ret = -1;
-- 	u8 *buf;
-- 	struct ieee80211_hdr *hdr;
--+	struct hostapd_hw_modes *modes;
-- 	int offchanok = 1;
--+	u16 num_modes, flags;
--+	u8 dfs_domain;
--+	int i;
-- 
-- 	if (is_ap_interface(drv->nlmode) && (int) freq == bss->freq &&
-- 	    bss->beacon_set)
--@@ -7817,6 +7821,21 @@ static int wpa_driver_nl80211_send_actio
-- 		os_memset(bss->rand_addr, 0, ETH_ALEN);
-- 	}
-- 
--+	if (is_mesh_interface(drv->nlmode)) {
--+		modes = nl80211_get_hw_feature_data(bss, &num_modes,
--+						    &flags, &dfs_domain);
--+		if (dfs_domain != HOSTAPD_DFS_REGION_ETSI &&
--+		    ieee80211_is_dfs(bss->freq, modes, num_modes))
--+			offchanok = 0;
--+		if (modes) {
--+			for (i = 0; i < num_modes; i++) {
--+				os_free(modes[i].channels);
--+				os_free(modes[i].rates);
--+			}
--+			os_free(modes);
--+		}
--+	}
--+
-- 	if (is_ap_interface(drv->nlmode) &&
-- 	    (!(drv->capa.flags & WPA_DRIVER_FLAGS_OFFCHANNEL_TX) ||
-- 	     (int) freq == bss->freq || drv->device_ap_sme ||
-diff --git a/package/network/services/hostapd/patches/012-mesh-fix-channel-switch-error-during-CAC.patch b/package/network/services/hostapd/patches/012-mesh-fix-channel-switch-error-during-CAC.patch
-deleted file mode 100644
-index f324d81ae3..0000000000
---- a/package/network/services/hostapd/patches/012-mesh-fix-channel-switch-error-during-CAC.patch
-+++ /dev/null
-@@ -1,66 +0,0 @@
--From ab6995f15aae17af93507dd2344615f91672a31a Mon Sep 17 00:00:00 2001
--From: Peter Oh <peter.oh@bowerswilkins.com>
--Date: Tue, 30 Jun 2020 14:19:00 +0200
--Subject: [PATCH 12/19] mesh: fix channel switch error during CAC
--
--Mesh interface has used its channel parameters that configured
--during its initialization even after channel switched due to
--DFS radar detection during CAC which caused channel switch error.
--This change fixes the error by updating its channel parameters
--when channel's been changed from initial one.
--
--Signed-off-by: Peter Oh <peter.oh@bowerswilkins.com>
-----
-- wpa_supplicant/mesh.c | 34 ++++++++++++++++++++++++++++++++++
-- 1 file changed, 34 insertions(+)
--
----- a/wpa_supplicant/mesh.c
--+++ b/wpa_supplicant/mesh.c
--@@ -13,6 +13,7 @@
-- #include "utils/uuid.h"
-- #include "common/ieee802_11_defs.h"
-- #include "common/wpa_ctrl.h"
--+#include "common/hw_features_common.h"
-- #include "ap/sta_info.h"
-- #include "ap/hostapd.h"
-- #include "ap/ieee802_11.h"
--@@ -206,6 +207,39 @@ static int wpas_mesh_complete(struct wpa
-- 		return -1;
-- 	}
-- 
--+	/*
--+	 * inspect if channel's been changed since initialized.
--+	 * i.e. DFS radar detection
--+	 */
--+	if (ifmsh->freq != params->freq.freq) {
--+		wpa_s->assoc_freq = ifmsh->freq;
--+		ssid->frequency = ifmsh->freq;
--+		struct he_capabilities *he_capab = NULL;
--+
--+		if (ifmsh->current_mode)
--+			he_capab = &ifmsh->current_mode->he_capab[IEEE80211_MODE_MESH];
--+
--+		if (hostapd_set_freq_params(&params->freq,
--+				ifmsh->conf->hw_mode,
--+				ifmsh->freq,
--+				ifmsh->conf->channel,
--+				ifmsh->conf->enable_edmg,
--+				ifmsh->conf->edmg_channel,
--+				ifmsh->conf->ieee80211n,
--+				ifmsh->conf->ieee80211ac,
--+				ifmsh->conf->ieee80211ax,
--+				ifmsh->conf->secondary_channel,
--+				hostapd_get_oper_chwidth(ifmsh->conf),
--+				hostapd_get_oper_centr_freq_seg0_idx(ifmsh->conf),
--+				hostapd_get_oper_centr_freq_seg1_idx(ifmsh->conf),
--+				ifmsh->conf->vht_capab,
--+				he_capab)) {
--+			wpa_printf(MSG_ERROR, "Error updating mesh frequency params.");
--+			wpa_supplicant_mesh_deinit(wpa_s);
--+			return -1;
--+		}
--+	}
--+
-- 	if (ifmsh->mconf->security != MESH_CONF_SEC_NONE &&
-- 	    wpas_mesh_init_rsn(wpa_s)) {
-- 		wpa_printf(MSG_ERROR,
-diff --git a/package/network/services/hostapd/patches/013-mesh-inform-kernel-driver-DFS-handler-in-userspace.patch b/package/network/services/hostapd/patches/013-mesh-inform-kernel-driver-DFS-handler-in-userspace.patch
-deleted file mode 100644
-index fb4e68636e..0000000000
---- a/package/network/services/hostapd/patches/013-mesh-inform-kernel-driver-DFS-handler-in-userspace.patch
-+++ /dev/null
-@@ -1,48 +0,0 @@
--From f1118eca5b1a63a4acb2a11ceea15dc4bc259c77 Mon Sep 17 00:00:00 2001
--From: Peter Oh <peter.oh@bowerswilkins.com>
--Date: Tue, 30 Jun 2020 14:19:01 +0200
--Subject: [PATCH 13/19] mesh: inform kernel driver DFS handler in userspace
--
--NL80211_ATTR_HANDLE_DFS is required by kerenel space
--to enable DFS channels that indicates DFS handler
--resides in userspace.
--
--Signed-off-by: Peter Oh <peter.oh@bowerswilkins.com>
-----
-- src/drivers/driver.h         | 1 +
-- src/drivers/driver_nl80211.c | 3 +++
-- wpa_supplicant/mesh.c        | 1 +
-- 3 files changed, 5 insertions(+)
--
----- a/src/drivers/driver.h
--+++ b/src/drivers/driver.h
--@@ -1542,6 +1542,7 @@ struct wpa_driver_mesh_join_params {
-- #define WPA_DRIVER_MESH_FLAG_SAE_AUTH	0x00000004
-- #define WPA_DRIVER_MESH_FLAG_AMPE	0x00000008
-- 	unsigned int flags;
--+	u8 handle_dfs;
-- };
-- 
-- struct wpa_driver_set_key_params {
----- a/src/drivers/driver_nl80211.c
--+++ b/src/drivers/driver_nl80211.c
--@@ -10070,6 +10070,9 @@ static int nl80211_join_mesh(struct i802
-- 
-- 	wpa_printf(MSG_DEBUG, "  * flags=%08X", params->flags);
-- 
--+	if (params->handle_dfs)
--+		if (nla_put_flag(msg, NL80211_ATTR_HANDLE_DFS))
--+			goto fail;
-- 	container = nla_nest_start(msg, NL80211_ATTR_MESH_SETUP);
-- 	if (!container)
-- 		goto fail;
----- a/wpa_supplicant/mesh.c
--+++ b/wpa_supplicant/mesh.c
--@@ -355,6 +355,7 @@ static int wpa_supplicant_mesh_init(stru
-- 		conf->country[0] = wpa_s->conf->country[0];
-- 		conf->country[1] = wpa_s->conf->country[1];
-- 		conf->country[2] = ' ';
--+		wpa_s->mesh_params->handle_dfs = 1;
-- 	}
-- 
-- 	bss->iconf = conf;
-diff --git a/package/network/services/hostapd/patches/014-mesh-fixes-for-mesh-init-deinit.patch b/package/network/services/hostapd/patches/014-mesh-fixes-for-mesh-init-deinit.patch
-deleted file mode 100644
-index fe12d401e4..0000000000
---- a/package/network/services/hostapd/patches/014-mesh-fixes-for-mesh-init-deinit.patch
-+++ /dev/null
-@@ -1,158 +0,0 @@
--From 30bdefd7559d57eae8c3c7e6f721ecf7be929bf2 Mon Sep 17 00:00:00 2001
--From: Markus Theil <markus.theil@tu-ilmenau.de>
--Date: Tue, 30 Jun 2020 14:19:02 +0200
--Subject: [PATCH 14/19] mesh: fixes for mesh init/deinit
--
--Send mesh group started notification after join completion
--callback is called.
--
--Implement outstanding TODO, to leave the mesh network on deinit.
--
--Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
-----
-- wpa_supplicant/mesh.c           | 32 ++++++++++++++++++++------------
-- wpa_supplicant/mesh.h           |  6 ++++--
-- wpa_supplicant/wpa_supplicant.c |  8 ++------
-- 3 files changed, 26 insertions(+), 20 deletions(-)
--
----- a/wpa_supplicant/mesh.c
--+++ b/wpa_supplicant/mesh.c
--@@ -30,20 +30,20 @@
-- 
-- static void wpa_supplicant_mesh_deinit(struct wpa_supplicant *wpa_s)
-- {
---	wpa_supplicant_mesh_iface_deinit(wpa_s, wpa_s->ifmsh);
--+	wpa_supplicant_mesh_iface_deinit(wpa_s, wpa_s->ifmsh, true);
-- 	wpa_s->ifmsh = NULL;
-- 	wpa_s->current_ssid = NULL;
-- 	os_free(wpa_s->mesh_rsn);
-- 	wpa_s->mesh_rsn = NULL;
-- 	os_free(wpa_s->mesh_params);
-- 	wpa_s->mesh_params = NULL;
---	/* TODO: leave mesh (stop beacon). This will happen on link down
---	 * anyway, so it's not urgent */
--+	wpa_supplicant_leave_mesh(wpa_s, false);
-- }
-- 
-- 
-- void wpa_supplicant_mesh_iface_deinit(struct wpa_supplicant *wpa_s,
---				      struct hostapd_iface *ifmsh)
--+				      struct hostapd_iface *ifmsh,
--+				      bool also_clear_hostapd)
-- {
-- 	if (!ifmsh)
-- 		return;
--@@ -64,8 +64,10 @@ void wpa_supplicant_mesh_iface_deinit(st
-- 	}
-- 
-- 	/* take care of shared data */
---	hostapd_interface_deinit(ifmsh);
---	hostapd_interface_free(ifmsh);
--+	if (also_clear_hostapd) {
--+		hostapd_interface_deinit(ifmsh);
--+		hostapd_interface_free(ifmsh);
--+	}
-- }
-- 
-- 
--@@ -244,8 +246,7 @@ static int wpas_mesh_complete(struct wpa
-- 	    wpas_mesh_init_rsn(wpa_s)) {
-- 		wpa_printf(MSG_ERROR,
-- 			   "mesh: RSN initialization failed - deinit mesh");
---		wpa_supplicant_mesh_deinit(wpa_s);
---		wpa_drv_leave_mesh(wpa_s);
--+		wpa_supplicant_mesh_iface_deinit(wpa_s, wpa_s->ifmsh, false);
-- 		return -1;
-- 	}
-- 
--@@ -270,9 +271,15 @@ static int wpas_mesh_complete(struct wpa
-- 	/* hostapd sets the interface down until we associate */
-- 	wpa_drv_set_operstate(wpa_s, 1);
-- 
---	if (!ret)
--+	if (!ret) {
-- 		wpa_supplicant_set_state(wpa_s, WPA_COMPLETED);
-- 
--+		wpa_msg(wpa_s, MSG_INFO, MESH_GROUP_STARTED "ssid=\"%s\" id=%d",
--+			wpa_ssid_txt(ssid->ssid, ssid->ssid_len),
--+			ssid->id);
--+		wpas_notify_mesh_group_started(wpa_s, ssid);
--+	}
--+
-- 	return ret;
-- }
-- 
--@@ -563,7 +570,7 @@ int wpa_supplicant_join_mesh(struct wpa_
-- 	wpa_s->mesh_params = params;
-- 	if (wpa_supplicant_mesh_init(wpa_s, ssid, &params->freq)) {
-- 		wpa_msg(wpa_s, MSG_ERROR, "Failed to init mesh");
---		wpa_drv_leave_mesh(wpa_s);
--+		wpa_supplicant_leave_mesh(wpa_s, true);
-- 		ret = -1;
-- 		goto out;
-- 	}
--@@ -573,14 +580,15 @@ out:
-- }
-- 
-- 
---int wpa_supplicant_leave_mesh(struct wpa_supplicant *wpa_s)
--+int wpa_supplicant_leave_mesh(struct wpa_supplicant *wpa_s, bool need_deinit)
-- {
-- 	int ret = 0;
-- 
-- 	wpa_msg(wpa_s, MSG_INFO, "leaving mesh");
-- 
-- 	/* Need to send peering close messages first */
---	wpa_supplicant_mesh_deinit(wpa_s);
--+	if (need_deinit)
--+		wpa_supplicant_mesh_deinit(wpa_s);
-- 
-- 	ret = wpa_drv_leave_mesh(wpa_s);
-- 	if (ret)
----- a/wpa_supplicant/mesh.h
--+++ b/wpa_supplicant/mesh.h
--@@ -11,9 +11,11 @@
-- 
-- int wpa_supplicant_join_mesh(struct wpa_supplicant *wpa_s,
-- 			     struct wpa_ssid *ssid);
---int wpa_supplicant_leave_mesh(struct wpa_supplicant *wpa_s);
--+int wpa_supplicant_leave_mesh(struct wpa_supplicant *wpa_s,
--+			      bool need_deinit);
-- void wpa_supplicant_mesh_iface_deinit(struct wpa_supplicant *wpa_s,
---				      struct hostapd_iface *ifmsh);
--+				      struct hostapd_iface *ifmsh,
--+				      bool also_clear_hostapd);
-- int wpas_mesh_scan_result_text(const u8 *ies, size_t ies_len, char *buf,
-- 			       char *end);
-- int wpas_mesh_add_interface(struct wpa_supplicant *wpa_s, char *ifname,
----- a/wpa_supplicant/wpa_supplicant.c
--+++ b/wpa_supplicant/wpa_supplicant.c
--@@ -2225,10 +2225,6 @@ void wpa_supplicant_associate(struct wpa
-- 			return;
-- 		}
-- 		wpa_s->current_bss = bss;
---		wpa_msg(wpa_s, MSG_INFO, MESH_GROUP_STARTED "ssid=\"%s\" id=%d",
---			wpa_ssid_txt(ssid->ssid, ssid->ssid_len),
---			ssid->id);
---		wpas_notify_mesh_group_started(wpa_s, ssid);
-- #else /* CONFIG_MESH */
-- 		wpa_msg(wpa_s, MSG_ERROR,
-- 			"mesh mode support not included in the build");
--@@ -3938,7 +3934,7 @@ void wpa_supplicant_deauthenticate(struc
-- 			wpa_s->ifname);
-- 		wpas_notify_mesh_group_removed(wpa_s, mconf->meshid,
-- 					       mconf->meshid_len, reason_code);
---		wpa_supplicant_leave_mesh(wpa_s);
--+		wpa_supplicant_leave_mesh(wpa_s, true);
-- 	}
-- #endif /* CONFIG_MESH */
-- 
--@@ -6551,7 +6547,7 @@ static void wpa_supplicant_deinit_iface(
-- 
-- #ifdef CONFIG_MESH
-- 	if (wpa_s->ifmsh) {
---		wpa_supplicant_mesh_iface_deinit(wpa_s, wpa_s->ifmsh);
--+		wpa_supplicant_mesh_iface_deinit(wpa_s, wpa_s->ifmsh, true);
-- 		wpa_s->ifmsh = NULL;
-- 	}
-- #endif /* CONFIG_MESH */
-diff --git a/package/network/services/hostapd/patches/015-mesh-fix-DFS-deinit-init.patch b/package/network/services/hostapd/patches/015-mesh-fix-DFS-deinit-init.patch
-deleted file mode 100644
-index c540dd6786..0000000000
---- a/package/network/services/hostapd/patches/015-mesh-fix-DFS-deinit-init.patch
-+++ /dev/null
-@@ -1,262 +0,0 @@
--From d017f5d98a143c46c3c3fcb0e6507ca0b2bebdb0 Mon Sep 17 00:00:00 2001
--From: Markus Theil <markus.theil@tu-ilmenau.de>
--Date: Tue, 30 Jun 2020 14:19:03 +0200
--Subject: [PATCH 15/19] mesh: fix DFS deinit/init
--
--The hostapd DFS code deinitializes and initializes the
--AP interface, if a clean channel switch is not possible.
--In this case the AP code paths would deinit the driver, for
--example nl80211, without wpa_supplicant code paths getting
--notice of this.
--
--Therefore add callbacks for wpa_supplicant mesh methods,
--which are called on init/deinit of the AP bss. These
--callbacks are then used to handle the reset in the mesh
--code.
--
--Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
-----
-- src/ap/dfs.c          |  2 +-
-- src/ap/hostapd.c      | 17 ++++++--
-- src/ap/hostapd.h      |  6 +++
-- wpa_supplicant/mesh.c | 90 +++++++++++++++++++++++++++++++++++++------
-- 4 files changed, 100 insertions(+), 15 deletions(-)
--
----- a/src/ap/dfs.c
--+++ b/src/ap/dfs.c
--@@ -1112,7 +1112,7 @@ static int hostapd_dfs_start_channel_swi
-- 				      oper_centr_freq_seg0_idx,
-- 				      oper_centr_freq_seg1_idx,
-- 				      cmode->vht_capab,
---				      &cmode->he_capab[IEEE80211_MODE_AP]);
--+				      &cmode->he_capab[iface->conf->hw_mode]);
-- 
-- 	if (err) {
-- 		wpa_printf(MSG_ERROR, "DFS failed to calculate CSA freq params");
----- a/src/ap/hostapd.c
--+++ b/src/ap/hostapd.c
--@@ -354,7 +354,7 @@ static int hostapd_broadcast_wep_set(str
-- #endif /* CONFIG_WEP */
-- 
-- 
---static void hostapd_free_hapd_data(struct hostapd_data *hapd)
--+void hostapd_free_hapd_data(struct hostapd_data *hapd)
-- {
-- 	os_free(hapd->probereq_cb);
-- 	hapd->probereq_cb = NULL;
--@@ -498,7 +498,7 @@ static void sta_track_deinit(struct host
-- }
-- 
-- 
---static void hostapd_cleanup_iface_partial(struct hostapd_iface *iface)
--+void hostapd_cleanup_iface_partial(struct hostapd_iface *iface)
-- {
-- 	wpa_printf(MSG_DEBUG, "%s(%p)", __func__, iface);
-- #ifdef NEED_AP_MLME
--@@ -626,7 +626,7 @@ static int hostapd_flush_old_stations(st
-- }
-- 
-- 
---static void hostapd_bss_deinit_no_free(struct hostapd_data *hapd)
--+void hostapd_bss_deinit_no_free(struct hostapd_data *hapd)
-- {
-- 	hostapd_free_stas(hapd);
-- 	hostapd_flush_old_stations(hapd, WLAN_REASON_DEAUTH_LEAVING);
--@@ -2690,6 +2690,13 @@ int hostapd_enable_iface(struct hostapd_
-- {
-- 	size_t j;
-- 
--+	if (hapd_iface == NULL)
--+		return -1;
--+
--+	if (hapd_iface->enable_iface_cb != NULL) {
--+		return hapd_iface->enable_iface_cb(hapd_iface);
--+	}
--+
-- 	if (hapd_iface->bss[0]->drv_priv != NULL) {
-- 		wpa_printf(MSG_ERROR, "Interface %s already enabled",
-- 			   hapd_iface->conf->bss[0]->iface);
--@@ -2751,6 +2758,10 @@ int hostapd_disable_iface(struct hostapd
-- 	if (hapd_iface == NULL)
-- 		return -1;
-- 
--+	if (hapd_iface->disable_iface_cb != NULL) {
--+		return hapd_iface->disable_iface_cb(hapd_iface);
--+	}
--+
-- 	if (hapd_iface->bss[0]->drv_priv == NULL) {
-- 		wpa_printf(MSG_INFO, "Interface %s already disabled",
-- 			   hapd_iface->conf->bss[0]->iface);
----- a/src/ap/hostapd.h
--+++ b/src/ap/hostapd.h
--@@ -589,6 +589,9 @@ struct hostapd_iface {
-- 
-- 	/* Previous WMM element information */
-- 	struct hostapd_wmm_ac_params prev_wmm[WMM_AC_NUM];
--+
--+	int (*enable_iface_cb)(struct hostapd_iface *iface);
--+	int (*disable_iface_cb)(struct hostapd_iface *iface);
-- };
-- 
-- /* hostapd.c */
--@@ -617,6 +620,9 @@ void hostapd_interface_deinit_free(struc
-- int hostapd_enable_iface(struct hostapd_iface *hapd_iface);
-- int hostapd_reload_iface(struct hostapd_iface *hapd_iface);
-- int hostapd_disable_iface(struct hostapd_iface *hapd_iface);
--+void hostapd_bss_deinit_no_free(struct hostapd_data *hapd);
--+void hostapd_free_hapd_data(struct hostapd_data *hapd);
--+void hostapd_cleanup_iface_partial(struct hostapd_iface *iface);
-- int hostapd_add_iface(struct hapd_interfaces *ifaces, char *buf);
-- int hostapd_remove_iface(struct hapd_interfaces *ifaces, char *buf);
-- void hostapd_channel_list_updated(struct hostapd_iface *iface, int initiator);
----- a/wpa_supplicant/mesh.c
--+++ b/wpa_supplicant/mesh.c
--@@ -28,15 +28,20 @@
-- #include "mesh.h"
-- 
-- 
---static void wpa_supplicant_mesh_deinit(struct wpa_supplicant *wpa_s)
--+static void wpa_supplicant_mesh_deinit(struct wpa_supplicant *wpa_s, bool also_clear_hostapd)
-- {
---	wpa_supplicant_mesh_iface_deinit(wpa_s, wpa_s->ifmsh, true);
---	wpa_s->ifmsh = NULL;
---	wpa_s->current_ssid = NULL;
--+	wpa_supplicant_mesh_iface_deinit(wpa_s, wpa_s->ifmsh, also_clear_hostapd);
--+
--+	if (also_clear_hostapd) {
--+		wpa_s->ifmsh = NULL;
--+		wpa_s->current_ssid = NULL;
--+		os_free(wpa_s->mesh_params);
--+		wpa_s->mesh_params = NULL;
--+	}
--+
-- 	os_free(wpa_s->mesh_rsn);
-- 	wpa_s->mesh_rsn = NULL;
---	os_free(wpa_s->mesh_params);
---	wpa_s->mesh_params = NULL;
--+
-- 	wpa_supplicant_leave_mesh(wpa_s, false);
-- }
-- 
--@@ -237,7 +242,7 @@ static int wpas_mesh_complete(struct wpa
-- 				ifmsh->conf->vht_capab,
-- 				he_capab)) {
-- 			wpa_printf(MSG_ERROR, "Error updating mesh frequency params.");
---			wpa_supplicant_mesh_deinit(wpa_s);
--+			wpa_supplicant_mesh_deinit(wpa_s, true);
-- 			return -1;
-- 		}
-- 	}
--@@ -246,7 +251,7 @@ static int wpas_mesh_complete(struct wpa
-- 	    wpas_mesh_init_rsn(wpa_s)) {
-- 		wpa_printf(MSG_ERROR,
-- 			   "mesh: RSN initialization failed - deinit mesh");
---		wpa_supplicant_mesh_iface_deinit(wpa_s, wpa_s->ifmsh, false);
--+		wpa_supplicant_mesh_deinit(wpa_s, false);
-- 		return -1;
-- 	}
-- 
--@@ -291,6 +296,67 @@ static void wpas_mesh_complete_cb(void *
-- }
-- 
-- 
--+static int wpa_supplicant_mesh_enable_iface_cb(struct hostapd_iface *ifmsh)
--+{
--+	struct wpa_supplicant *wpa_s = ifmsh->owner;
--+	struct hostapd_data *bss;
--+
--+	ifmsh->mconf = mesh_config_create(wpa_s, wpa_s->current_ssid);
--+
--+	bss = ifmsh->bss[0];
--+	bss->msg_ctx = wpa_s;
--+	os_memcpy(bss->own_addr, wpa_s->own_addr, ETH_ALEN);
--+	bss->driver = wpa_s->driver;
--+	bss->drv_priv = wpa_s->drv_priv;
--+	bss->iface = ifmsh;
--+	bss->mesh_sta_free_cb = mesh_mpm_free_sta;
--+	bss->setup_complete_cb = wpas_mesh_complete_cb;
--+	bss->setup_complete_cb_ctx = wpa_s;
--+
--+	bss->conf->start_disabled = 1;
--+	bss->conf->mesh = MESH_ENABLED;
--+	bss->conf->ap_max_inactivity = wpa_s->conf->mesh_max_inactivity;
--+
--+	if (wpa_drv_init_mesh(wpa_s)) {
--+		wpa_msg(wpa_s, MSG_ERROR, "Failed to init mesh in driver");
--+		return -1;
--+	}
--+
--+	if (hostapd_setup_interface(ifmsh)) {
--+		wpa_printf(MSG_ERROR,
--+			   "Failed to initialize hostapd interface for mesh");
--+		return -1;
--+	}
--+
--+	return 0;
--+}
--+
--+
--+static int wpa_supplicant_mesh_disable_iface_cb(struct hostapd_iface *ifmsh)
--+{
--+	struct wpa_supplicant *wpa_s = ifmsh->owner;
--+	int j;
--+
--+	wpa_supplicant_mesh_deinit(wpa_s, false);
--+
--+#ifdef NEED_AP_MLME
--+	for (j = 0; j < ifmsh->num_bss; j++)
--+		hostapd_cleanup_cs_params(ifmsh->bss[j]);
--+#endif /* NEED_AP_MLME */
--+
--+	/* same as hostapd_interface_deinit without deinitializing ctrl-iface */
--+	for (j = 0; j < ifmsh->num_bss; j++) {
--+		struct hostapd_data *hapd = ifmsh->bss[j];
--+		hostapd_bss_deinit_no_free(hapd);
--+		hostapd_free_hapd_data(hapd);
--+	}
--+
--+	hostapd_cleanup_iface_partial(ifmsh);
--+
--+	return 0;
--+}
--+
--+
-- static int wpa_supplicant_mesh_init(struct wpa_supplicant *wpa_s,
-- 				    struct wpa_ssid *ssid,
-- 				    struct hostapd_freq_params *freq)
--@@ -318,6 +384,8 @@ static int wpa_supplicant_mesh_init(stru
-- 	ifmsh->drv_flags = wpa_s->drv_flags;
-- 	ifmsh->drv_flags2 = wpa_s->drv_flags2;
-- 	ifmsh->num_bss = 1;
--+	ifmsh->enable_iface_cb = wpa_supplicant_mesh_enable_iface_cb;
--+	ifmsh->disable_iface_cb = wpa_supplicant_mesh_disable_iface_cb;
-- 	ifmsh->bss = os_calloc(wpa_s->ifmsh->num_bss,
-- 			       sizeof(struct hostapd_data *));
-- 	if (!ifmsh->bss)
--@@ -451,7 +519,7 @@ static int wpa_supplicant_mesh_init(stru
-- 
-- 	return 0;
-- out_free:
---	wpa_supplicant_mesh_deinit(wpa_s);
--+	wpa_supplicant_mesh_deinit(wpa_s, true);
-- 	return -ENOMEM;
-- }
-- 
--@@ -499,7 +567,7 @@ int wpa_supplicant_join_mesh(struct wpa_
-- 		goto out;
-- 	}
-- 
---	wpa_supplicant_mesh_deinit(wpa_s);
--+	wpa_supplicant_mesh_deinit(wpa_s, true);
-- 
-- 	wpa_s->pairwise_cipher = WPA_CIPHER_NONE;
-- 	wpa_s->group_cipher = WPA_CIPHER_NONE;
--@@ -588,7 +656,7 @@ int wpa_supplicant_leave_mesh(struct wpa
-- 
-- 	/* Need to send peering close messages first */
-- 	if (need_deinit)
---		wpa_supplicant_mesh_deinit(wpa_s);
--+		wpa_supplicant_mesh_deinit(wpa_s, true);
-- 
-- 	ret = wpa_drv_leave_mesh(wpa_s);
-- 	if (ret)
-diff --git a/package/network/services/hostapd/patches/016-tests-DFS-test-for-wpa_supplicant-mesh.patch b/package/network/services/hostapd/patches/016-tests-DFS-test-for-wpa_supplicant-mesh.patch
-deleted file mode 100644
-index b6a51b2f35..0000000000
---- a/package/network/services/hostapd/patches/016-tests-DFS-test-for-wpa_supplicant-mesh.patch
-+++ /dev/null
-@@ -1,94 +0,0 @@
--From 6ee4e70d469b8ce05013ed524eea32ea303e6563 Mon Sep 17 00:00:00 2001
--From: Markus Theil <markus.theil@tu-ilmenau.de>
--Date: Tue, 30 Jun 2020 14:19:04 +0200
--Subject: [PATCH 16/19] tests: DFS test for wpa_supplicant mesh
--
--Add a test with uses a DFS channel, waits for CAC
--afterwards successfull mesh join and then triggers
--a radar event and check if the mesh comes up again
--on the same device.
--
--Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
-----
-- tests/hwsim/test_wpas_mesh.py | 56 +++++++++++++++++++++++++++++++++--
-- 1 file changed, 54 insertions(+), 2 deletions(-)
--
----- a/tests/hwsim/test_wpas_mesh.py
--+++ b/tests/hwsim/test_wpas_mesh.py
--@@ -80,8 +80,23 @@ def check_mesh_scan(dev, params, other_s
--     if '[MESH]' not in bss['flags']:
--         raise Exception("BSS output did not include MESH flag")
-- 
---def check_mesh_group_added(dev):
---    ev = dev.wait_event(["MESH-GROUP-STARTED"])
--+def check_dfs_started(dev, timeout=10):
--+    ev = dev.wait_event(["DFS-CAC-START"], timeout=timeout)
--+    if ev is None:
--+        raise Exception("Test exception: CAC did not start")
--+
--+def check_dfs_finished(dev, timeout=70):
--+    ev = dev.wait_event(["DFS-CAC-COMPLETED"], timeout=timeout)
--+    if ev is None:
--+        raise Exception("Test exception: CAC did not finish")
--+
--+def check_mesh_radar_handling_finished(dev, timeout=75):
--+    ev = dev.wait_event(["CTRL-EVENT-CHANNEL-SWITCH", "MESH-GROUP-STARTED"], timeout=timeout)
--+    if ev is None:
--+        raise Exception("Test exception: Couldn't join mesh")
--+
--+def check_mesh_group_added(dev, timeout=10):
--+    ev = dev.wait_event(["MESH-GROUP-STARTED"], timeout=timeout)
--     if ev is None:
--         raise Exception("Test exception: Couldn't join mesh")
-- 
--@@ -91,6 +106,10 @@ def check_mesh_group_removed(dev):
--     if ev is None:
--         raise Exception("Test exception: Couldn't leave mesh")
-- 
--+def check_regdom_change(dev, timeout=10):
--+    ev = dev.wait_event(["CTRL-EVENT-REGDOM-CHANGE"], timeout=timeout)
--+    if ev is None:
--+        raise Exception("Test exception: No regdom change happened.")
-- 
-- def check_mesh_peer_connected(dev, timeout=10):
--     ev = dev.wait_event(["MESH-PEER-CONNECTED"], timeout=timeout)
--@@ -167,6 +186,39 @@ def test_wpas_mesh_group_remove(dev):
--     check_mesh_group_removed(dev[0])
--     dev[0].mesh_group_remove()
-- 
--+def dfs_simulate_radar(dev):
--+    logger.info("Trigger a simulated radar event")
--+    phyname = dev.get_driver_status_field("phyname")
--+    radar_file = '/sys/kernel/debug/ieee80211/' + phyname + '/hwsim/dfs_simulate_radar'
--+    with open(radar_file, 'w') as f:
--+        f.write('1')
--+
--+@long_duration_test
--+def test_wpas_mesh_peer_connected_dfs(dev):
--+    """wpa_supplicant MESH peer connected"""
--+    dev[0].set("country", "DE")
--+    dev[1].set("country", "DE")
--+
--+    check_regdom_change(dev[0])
--+    check_regdom_change(dev[1])
--+
--+    check_mesh_support(dev[0])
--+    add_open_mesh_network(dev[0], freq="5500", beacon_int=160)
--+    add_open_mesh_network(dev[1], freq="5500", beacon_int=160)
--+    check_dfs_started(dev[0])
--+    check_dfs_finished(dev[0])
--+    check_mesh_joined_connected(dev, timeout0=10)
--+
--+    dfs_simulate_radar(dev[0])
--+
--+    check_mesh_radar_handling_finished(dev[0], timeout=75)
--+
--+    dev[0].set("country", "00")
--+    dev[1].set("country", "00")
--+
--+    check_regdom_change(dev[0])
--+    check_regdom_change(dev[1])
--+
-- def test_wpas_mesh_peer_connected(dev):
--     """wpa_supplicant MESH peer connected"""
--     check_mesh_support(dev[0])
-diff --git a/package/network/services/hostapd/patches/017-mesh-fix-mesh_oom-test.patch b/package/network/services/hostapd/patches/017-mesh-fix-mesh_oom-test.patch
-deleted file mode 100644
-index cc566c7de2..0000000000
---- a/package/network/services/hostapd/patches/017-mesh-fix-mesh_oom-test.patch
-+++ /dev/null
-@@ -1,24 +0,0 @@
--From 928da9a270deaf4409aee4d87a33a6f61b56c136 Mon Sep 17 00:00:00 2001
--From: Markus Theil <markus.theil@tu-ilmenau.de>
--Date: Tue, 30 Jun 2020 14:19:05 +0200
--Subject: [PATCH 17/19] mesh: fix mesh_oom test
--
--Only change freq params, if ifmsh->freq is set initially, which only
--happens if hostapd_get_hw_features in setup_interface2 succeeds.
--
--Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
-----
-- wpa_supplicant/mesh.c | 2 +-
-- 1 file changed, 1 insertion(+), 1 deletion(-)
--
----- a/wpa_supplicant/mesh.c
--+++ b/wpa_supplicant/mesh.c
--@@ -218,7 +218,7 @@ static int wpas_mesh_complete(struct wpa
-- 	 * inspect if channel's been changed since initialized.
-- 	 * i.e. DFS radar detection
-- 	 */
---	if (ifmsh->freq != params->freq.freq) {
--+	if (ifmsh->freq > 0 && ifmsh->freq != params->freq.freq) {
-- 		wpa_s->assoc_freq = ifmsh->freq;
-- 		ssid->frequency = ifmsh->freq;
-- 		struct he_capabilities *he_capab = NULL;
-diff --git a/package/network/services/hostapd/patches/018-mesh-move-mesh-freq-setting-to-own-function.patch b/package/network/services/hostapd/patches/018-mesh-move-mesh-freq-setting-to-own-function.patch
-deleted file mode 100644
-index 1dd7d37411..0000000000
---- a/package/network/services/hostapd/patches/018-mesh-move-mesh-freq-setting-to-own-function.patch
-+++ /dev/null
-@@ -1,93 +0,0 @@
--From 1eab0e62920f443f8814bad846f6439843223b69 Mon Sep 17 00:00:00 2001
--From: Markus Theil <markus.theil@tu-ilmenau.de>
--Date: Tue, 30 Jun 2020 14:19:06 +0200
--Subject: [PATCH 18/19] mesh: move mesh freq setting to own function
--
--Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
-----
-- wpa_supplicant/mesh.c | 59 ++++++++++++++++++++++++++-----------------
-- 1 file changed, 36 insertions(+), 23 deletions(-)
--
----- a/wpa_supplicant/mesh.c
--+++ b/wpa_supplicant/mesh.c
--@@ -201,6 +201,40 @@ static int wpas_mesh_init_rsn(struct wpa
-- 	return !wpa_s->mesh_rsn ? -1 : 0;
-- }
-- 
--+
--+static int wpas_mesh_update_freq_params(struct wpa_supplicant *wpa_s)
--+{
--+	struct wpa_driver_mesh_join_params *params = wpa_s->mesh_params;
--+	struct hostapd_iface *ifmsh = wpa_s->ifmsh;
--+	struct he_capabilities *he_capab = NULL;
--+
--+	if (ifmsh->current_mode)
--+		he_capab = &ifmsh->current_mode->he_capab[IEEE80211_MODE_MESH];
--+
--+	if (hostapd_set_freq_params(&params->freq,
--+			ifmsh->conf->hw_mode,
--+			ifmsh->freq,
--+			ifmsh->conf->channel,
--+			ifmsh->conf->enable_edmg,
--+			ifmsh->conf->edmg_channel,
--+			ifmsh->conf->ieee80211n,
--+			ifmsh->conf->ieee80211ac,
--+			ifmsh->conf->ieee80211ax,
--+			ifmsh->conf->secondary_channel,
--+			hostapd_get_oper_chwidth(ifmsh->conf),
--+			hostapd_get_oper_centr_freq_seg0_idx(ifmsh->conf),
--+			hostapd_get_oper_centr_freq_seg1_idx(ifmsh->conf),
--+			ifmsh->conf->vht_capab,
--+			he_capab)) {
--+		wpa_printf(MSG_ERROR, "Error updating mesh frequency params.");
--+		wpa_supplicant_mesh_deinit(wpa_s, true);
--+		return -1;
--+	}
--+
--+	return 0;
--+}
--+
--+
-- static int wpas_mesh_complete(struct wpa_supplicant *wpa_s)
-- {
-- 	struct hostapd_iface *ifmsh = wpa_s->ifmsh;
--@@ -221,30 +255,8 @@ static int wpas_mesh_complete(struct wpa
-- 	if (ifmsh->freq > 0 && ifmsh->freq != params->freq.freq) {
-- 		wpa_s->assoc_freq = ifmsh->freq;
-- 		ssid->frequency = ifmsh->freq;
---		struct he_capabilities *he_capab = NULL;
---
---		if (ifmsh->current_mode)
---			he_capab = &ifmsh->current_mode->he_capab[IEEE80211_MODE_MESH];
---
---		if (hostapd_set_freq_params(&params->freq,
---				ifmsh->conf->hw_mode,
---				ifmsh->freq,
---				ifmsh->conf->channel,
---				ifmsh->conf->enable_edmg,
---				ifmsh->conf->edmg_channel,
---				ifmsh->conf->ieee80211n,
---				ifmsh->conf->ieee80211ac,
---				ifmsh->conf->ieee80211ax,
---				ifmsh->conf->secondary_channel,
---				hostapd_get_oper_chwidth(ifmsh->conf),
---				hostapd_get_oper_centr_freq_seg0_idx(ifmsh->conf),
---				hostapd_get_oper_centr_freq_seg1_idx(ifmsh->conf),
---				ifmsh->conf->vht_capab,
---				he_capab)) {
---			wpa_printf(MSG_ERROR, "Error updating mesh frequency params.");
---			wpa_supplicant_mesh_deinit(wpa_s, true);
--+		if (wpas_mesh_update_freq_params(wpa_s) != 0)
-- 			return -1;
---		}
-- 	}
-- 
-- 	if (ifmsh->mconf->security != MESH_CONF_SEC_NONE &&
--@@ -518,6 +530,7 @@ static int wpa_supplicant_mesh_init(stru
-- 	}
-- 
-- 	return 0;
--+
-- out_free:
-- 	wpa_supplicant_mesh_deinit(wpa_s, true);
-- 	return -ENOMEM;
-diff --git a/package/network/services/hostapd/patches/019-mesh-use-deterministic-channel-on-channel-switch.patch b/package/network/services/hostapd/patches/019-mesh-use-deterministic-channel-on-channel-switch.patch
-deleted file mode 100644
-index 8e38a8e53c..0000000000
---- a/package/network/services/hostapd/patches/019-mesh-use-deterministic-channel-on-channel-switch.patch
-+++ /dev/null
-@@ -1,81 +0,0 @@
--From fc8ea40f6130ac18d9c66797de2cf1d5af55d496 Mon Sep 17 00:00:00 2001
--From: Markus Theil <markus.theil@tu-ilmenau.de>
--Date: Tue, 30 Jun 2020 14:19:07 +0200
--Subject: [PATCH 19/19] mesh: use deterministic channel on channel switch
--
--This patch uses a deterministic channel on DFS channel switch
--in mesh networks. Otherwise, when switching to a usable but not
--available channel, no CSA can be sent and a random channel is choosen
--without notification of other nodes. It is then quite likely, that
--the mesh network gets disconnected.
--
--Fix this by using a deterministic number, based on the sha256 hash
--of the mesh ID, in order to use at least a different number in each
--mesh network.
--
--Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
-----
-- src/ap/dfs.c                 | 20 +++++++++++++++++++-
-- src/drivers/driver_nl80211.c |  4 ++++
-- 2 files changed, 23 insertions(+), 1 deletion(-)
--
----- a/src/ap/dfs.c
--+++ b/src/ap/dfs.c
--@@ -17,6 +17,7 @@
-- #include "ap_drv_ops.h"
-- #include "drivers/driver.h"
-- #include "dfs.h"
--+#include "crypto/crypto.h"
-- 
-- 
-- static int dfs_get_used_n_chans(struct hostapd_iface *iface, int *seg1)
--@@ -480,9 +481,14 @@ dfs_get_valid_channel(struct hostapd_ifa
-- 	int num_available_chandefs;
-- 	int chan_idx, chan_idx2;
-- 	int sec_chan_idx_80p80 = -1;
--+	bool is_mesh = false;
-- 	int i;
-- 	u32 _rand;
-- 
--+#ifdef CONFIG_MESH
--+	is_mesh = iface->mconf;
--+#endif
--+
-- 	wpa_printf(MSG_DEBUG, "DFS: Selecting random channel");
-- 	*secondary_channel = 0;
-- 	*oper_centr_freq_seg0_idx = 0;
--@@ -502,8 +508,20 @@ dfs_get_valid_channel(struct hostapd_ifa
-- 	if (num_available_chandefs == 0)
-- 		return NULL;
-- 
---	if (os_get_random((u8 *) &_rand, sizeof(_rand)) < 0)
--+	/* try to use deterministic channel in mesh, so that both sides
--+	 * have a chance to switch to the same channel */
--+	if (is_mesh) {
--+#ifdef CONFIG_MESH
--+		u64 hash[4];
--+		const u8 *meshid[1] = { &iface->mconf->meshid[0] };
--+		const size_t meshid_len = iface->mconf->meshid_len;
--+
--+		sha256_vector(1, meshid, &meshid_len, (u8 *)&hash[0]);
--+		_rand = hash[0] + hash[1] + hash[2] + hash[3];
--+#endif
--+	} else if (os_get_random((u8 *) &_rand, sizeof(_rand)) < 0)
-- 		return NULL;
--+
-- 	chan_idx = _rand % num_available_chandefs;
-- 	dfs_find_channel(iface, &chan, chan_idx, skip_radar);
-- 	if (!chan) {
----- a/src/drivers/driver_nl80211.c
--+++ b/src/drivers/driver_nl80211.c
--@@ -9473,6 +9473,10 @@ static int nl80211_switch_channel(void *
-- 	if (ret)
-- 		goto error;
-- 
--+	if (drv->nlmode == NL80211_IFTYPE_MESH_POINT) {
--+		nla_put_flag(msg, NL80211_ATTR_HANDLE_DFS);
--+	}
--+
-- 	/* beacon_csa params */
-- 	beacon_csa = nla_nest_start(msg, NL80211_ATTR_CSA_IES);
-- 	if (!beacon_csa)
-diff --git a/package/network/services/hostapd/patches/020-ignore-4addr-mode-enabling-error.patch b/package/network/services/hostapd/patches/020-ignore-4addr-mode-enabling-error.patch
-deleted file mode 100644
-index f6751829a5..0000000000
---- a/package/network/services/hostapd/patches/020-ignore-4addr-mode-enabling-error.patch
-+++ /dev/null
-@@ -1,73 +0,0 @@
--From c7cca9b08f3e1e49c4a4a59ec66c47d91448e6ae Mon Sep 17 00:00:00 2001
--From: Jouni Malinen <j@w1.fi>
--Date: Sat, 13 Feb 2021 23:59:28 +0200
--Subject: [PATCH] nl80211: Ignore 4addr mode enabling error if it was already
-- enabled
--
--nl80211_set_4addr_mode() could fail when trying to enable 4addr mode on
--an interface that is in a bridge and has 4addr mode already enabled.
--This operation would not have been necessary in the first place and this
--failure results in disconnecting, e.g., when roaming from one backhaul
--BSS to another BSS with Multi AP.
--
--Avoid this issue by ignoring the nl80211 command failure in the case
--where 4addr mode is being enabled while it has already been enabled.
--
--Signed-off-by: Jouni Malinen <j@w1.fi>
-----
-- src/drivers/driver_nl80211.c | 23 +++++++++++++++++++++++
-- 1 file changed, 23 insertions(+)
--
----- a/src/drivers/driver_nl80211.c
--+++ b/src/drivers/driver_nl80211.c
--@@ -617,6 +617,7 @@ struct wiphy_idx_data {
-- 	int wiphy_idx;
-- 	enum nl80211_iftype nlmode;
-- 	u8 *macaddr;
--+	u8 use_4addr;
-- };
-- 
-- 
--@@ -639,6 +640,9 @@ static int netdev_info_handler(struct nl
-- 		os_memcpy(info->macaddr, nla_data(tb[NL80211_ATTR_MAC]),
-- 			  ETH_ALEN);
-- 
--+	if (tb[NL80211_ATTR_4ADDR])
--+		info->use_4addr = nla_get_u8(tb[NL80211_ATTR_4ADDR]);
--+
-- 	return NL_SKIP;
-- }
-- 
--@@ -691,6 +695,20 @@ static int nl80211_get_macaddr(struct i8
-- }
-- 
-- 
--+static int nl80211_get_4addr(struct i802_bss *bss)
--+{
--+	struct nl_msg *msg;
--+	struct wiphy_idx_data data = {
--+		.use_4addr = 0,
--+	};
--+
--+	if (!(msg = nl80211_cmd_msg(bss, 0, NL80211_CMD_GET_INTERFACE)) ||
--+	    send_and_recv_msgs(bss->drv, msg, netdev_info_handler, &data))
--+		return -1;
--+	return data.use_4addr;
--+}
--+
--+
-- static int nl80211_register_beacons(struct wpa_driver_nl80211_data *drv,
-- 				    struct nl80211_wiphy_data *w)
-- {
--@@ -11508,6 +11526,11 @@ static int nl80211_set_4addr_mode(void *
-- 
-- 	ret = send_and_recv_msgs(drv, msg, NULL, NULL);
-- 	msg = NULL;
--+	if (ret && val && nl80211_get_4addr(bss) == 1) {
--+		wpa_printf(MSG_DEBUG,
--+			   "nl80211: 4addr mode was already enabled");
--+		ret = 0;
--+	}
-- 	if (!ret) {
-- 		if (bridge_ifname[0] && val &&
-- 		    i802_check_bridge(drv, bss, bridge_ifname, bss->ifname) < 0)
-diff --git a/package/network/services/hostapd/patches/023-ndisc_snoop-call-dl_list_del-before-freeing-ipv6-add.patch b/package/network/services/hostapd/patches/023-ndisc_snoop-call-dl_list_del-before-freeing-ipv6-add.patch
-deleted file mode 100644
-index 9ff9b2398d..0000000000
---- a/package/network/services/hostapd/patches/023-ndisc_snoop-call-dl_list_del-before-freeing-ipv6-add.patch
-+++ /dev/null
-@@ -1,19 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Wed, 28 Jul 2021 05:43:29 +0200
--Subject: [PATCH] ndisc_snoop: call dl_list_del before freeing ipv6 addresses
--
--Fixes a segmentation fault on sta disconnect
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/src/ap/ndisc_snoop.c
--+++ b/src/ap/ndisc_snoop.c
--@@ -61,6 +61,7 @@ void sta_ip6addr_del(struct hostapd_data
-- 	dl_list_for_each_safe(ip6addr, prev, &sta->ip6addr, struct ip6addr,
-- 			      list) {
-- 		hostapd_drv_br_delete_ip_neigh(hapd, 6, (u8 *) &ip6addr->addr);
--+		dl_list_del(&ip6addr->list);
-- 		os_free(ip6addr);
-- 	}
-- }
-diff --git a/package/network/services/hostapd/patches/030-driver_nl80211-rewrite-neigh-code-to-not-depend-on-l.patch b/package/network/services/hostapd/patches/030-driver_nl80211-rewrite-neigh-code-to-not-depend-on-l.patch
-deleted file mode 100644
-index f65362fe96..0000000000
---- a/package/network/services/hostapd/patches/030-driver_nl80211-rewrite-neigh-code-to-not-depend-on-l.patch
-+++ /dev/null
-@@ -1,275 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Wed, 28 Jul 2021 05:49:46 +0200
--Subject: [PATCH] driver_nl80211: rewrite neigh code to not depend on
-- libnl3-route
--
--Removes an unnecessary dependency and also makes the code smaller
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/src/drivers/driver_nl80211.c
--+++ b/src/drivers/driver_nl80211.c
--@@ -16,9 +16,6 @@
-- #include <net/if.h>
-- #include <netlink/genl/genl.h>
-- #include <netlink/genl/ctrl.h>
---#ifdef CONFIG_LIBNL3_ROUTE
---#include <netlink/route/neighbour.h>
---#endif /* CONFIG_LIBNL3_ROUTE */
-- #include <linux/rtnetlink.h>
-- #include <netpacket/packet.h>
-- #include <linux/errqueue.h>
--@@ -4965,26 +4962,29 @@ fail:
-- 
-- static void rtnl_neigh_delete_fdb_entry(struct i802_bss *bss, const u8 *addr)
-- {
---#ifdef CONFIG_LIBNL3_ROUTE
-- 	struct wpa_driver_nl80211_data *drv = bss->drv;
---	struct rtnl_neigh *rn;
---	struct nl_addr *nl_addr;
--+	struct ndmsg nhdr = {
--+		.ndm_state = NUD_PERMANENT,
--+		.ndm_ifindex = bss->ifindex,
--+		.ndm_family = AF_BRIDGE,
--+	};
--+	struct nl_msg *msg;
-- 	int err;
-- 
---	rn = rtnl_neigh_alloc();
---	if (!rn)
--+	msg = nlmsg_alloc_simple(RTM_DELNEIGH, NLM_F_CREATE);
--+	if (!msg)
-- 		return;
-- 
---	rtnl_neigh_set_family(rn, AF_BRIDGE);
---	rtnl_neigh_set_ifindex(rn, bss->ifindex);
---	nl_addr = nl_addr_build(AF_BRIDGE, (void *) addr, ETH_ALEN);
---	if (!nl_addr) {
---		rtnl_neigh_put(rn);
---		return;
---	}
---	rtnl_neigh_set_lladdr(rn, nl_addr);
--+	if (nlmsg_append(msg, &nhdr, sizeof(nhdr), NLMSG_ALIGNTO) < 0)
--+		goto errout;
--+
--+	if (nla_put(msg, NDA_LLADDR, ETH_ALEN, (void *)addr))
--+		goto errout;
--+
--+	if (nl_send_auto_complete(drv->rtnl_sk, msg) < 0)
--+		goto errout;
-- 
---	err = rtnl_neigh_delete(drv->rtnl_sk, rn, 0);
--+	err = nl_wait_for_ack(drv->rtnl_sk);
-- 	if (err < 0) {
-- 		wpa_printf(MSG_DEBUG, "nl80211: bridge FDB entry delete for "
-- 			   MACSTR " ifindex=%d failed: %s", MAC2STR(addr),
--@@ -4994,9 +4994,8 @@ static void rtnl_neigh_delete_fdb_entry(
-- 			   MACSTR, MAC2STR(addr));
-- 	}
-- 
---	nl_addr_put(nl_addr);
---	rtnl_neigh_put(rn);
---#endif /* CONFIG_LIBNL3_ROUTE */
--+errout:
--+	nlmsg_free(msg);
-- }
-- 
-- 
--@@ -7337,7 +7336,6 @@ static void *i802_init(struct hostapd_da
-- 	    (params->num_bridge == 0 || !params->bridge[0]))
-- 		add_ifidx(drv, br_ifindex, drv->ifindex);
-- 
---#ifdef CONFIG_LIBNL3_ROUTE
-- 	if (bss->added_if_into_bridge || bss->already_in_bridge) {
-- 		int err;
-- 
--@@ -7354,7 +7352,6 @@ static void *i802_init(struct hostapd_da
-- 			goto failed;
-- 		}
-- 	}
---#endif /* CONFIG_LIBNL3_ROUTE */
-- 
-- 	if (drv->capa.flags2 & WPA_DRIVER_FLAGS2_CONTROL_PORT_RX) {
-- 		wpa_printf(MSG_DEBUG,
--@@ -10238,13 +10235,14 @@ static int wpa_driver_br_add_ip_neigh(vo
-- 				      const u8 *ipaddr, int prefixlen,
-- 				      const u8 *addr)
-- {
---#ifdef CONFIG_LIBNL3_ROUTE
-- 	struct i802_bss *bss = priv;
-- 	struct wpa_driver_nl80211_data *drv = bss->drv;
---	struct rtnl_neigh *rn;
---	struct nl_addr *nl_ipaddr = NULL;
---	struct nl_addr *nl_lladdr = NULL;
---	int family, addrsize;
--+	struct ndmsg nhdr = {
--+		.ndm_state = NUD_PERMANENT,
--+		.ndm_ifindex = bss->br_ifindex,
--+	};
--+	struct nl_msg *msg;
--+	int addrsize;
-- 	int res;
-- 
-- 	if (!ipaddr || prefixlen == 0 || !addr)
--@@ -10263,85 +10261,66 @@ static int wpa_driver_br_add_ip_neigh(vo
-- 	}
-- 
-- 	if (version == 4) {
---		family = AF_INET;
--+		nhdr.ndm_family = AF_INET;
-- 		addrsize = 4;
-- 	} else if (version == 6) {
---		family = AF_INET6;
--+		nhdr.ndm_family = AF_INET6;
-- 		addrsize = 16;
-- 	} else {
-- 		return -EINVAL;
-- 	}
-- 
---	rn = rtnl_neigh_alloc();
---	if (rn == NULL)
--+	msg = nlmsg_alloc_simple(RTM_NEWNEIGH, NLM_F_CREATE);
--+	if (!msg)
-- 		return -ENOMEM;
-- 
---	/* set the destination ip address for neigh */
---	nl_ipaddr = nl_addr_build(family, (void *) ipaddr, addrsize);
---	if (nl_ipaddr == NULL) {
---		wpa_printf(MSG_DEBUG, "nl80211: nl_ipaddr build failed");
---		res = -ENOMEM;
--+	res = -ENOMEM;
--+	if (nlmsg_append(msg, &nhdr, sizeof(nhdr), NLMSG_ALIGNTO) < 0)
-- 		goto errout;
---	}
---	nl_addr_set_prefixlen(nl_ipaddr, prefixlen);
---	res = rtnl_neigh_set_dst(rn, nl_ipaddr);
---	if (res) {
---		wpa_printf(MSG_DEBUG,
---			   "nl80211: neigh set destination addr failed");
--+
--+	if (nla_put(msg, NDA_DST, addrsize, (void *)ipaddr))
-- 		goto errout;
---	}
-- 
---	/* set the corresponding lladdr for neigh */
---	nl_lladdr = nl_addr_build(AF_BRIDGE, (u8 *) addr, ETH_ALEN);
---	if (nl_lladdr == NULL) {
---		wpa_printf(MSG_DEBUG, "nl80211: neigh set lladdr failed");
---		res = -ENOMEM;
--+	if (nla_put(msg, NDA_LLADDR, ETH_ALEN, (void *)addr))
-- 		goto errout;
---	}
---	rtnl_neigh_set_lladdr(rn, nl_lladdr);
-- 
---	rtnl_neigh_set_ifindex(rn, bss->br_ifindex);
---	rtnl_neigh_set_state(rn, NUD_PERMANENT);
--+	res = nl_send_auto_complete(drv->rtnl_sk, msg);
--+	if (res < 0)
--+		goto errout;
-- 
---	res = rtnl_neigh_add(drv->rtnl_sk, rn, NLM_F_CREATE);
--+	res = nl_wait_for_ack(drv->rtnl_sk);
-- 	if (res) {
-- 		wpa_printf(MSG_DEBUG,
-- 			   "nl80211: Adding bridge ip neigh failed: %s",
-- 			   nl_geterror(res));
-- 	}
-- errout:
---	if (nl_lladdr)
---		nl_addr_put(nl_lladdr);
---	if (nl_ipaddr)
---		nl_addr_put(nl_ipaddr);
---	if (rn)
---		rtnl_neigh_put(rn);
--+	nlmsg_free(msg);
-- 	return res;
---#else /* CONFIG_LIBNL3_ROUTE */
---	return -1;
---#endif /* CONFIG_LIBNL3_ROUTE */
-- }
-- 
-- 
-- static int wpa_driver_br_delete_ip_neigh(void *priv, u8 version,
-- 					 const u8 *ipaddr)
-- {
---#ifdef CONFIG_LIBNL3_ROUTE
-- 	struct i802_bss *bss = priv;
-- 	struct wpa_driver_nl80211_data *drv = bss->drv;
---	struct rtnl_neigh *rn;
---	struct nl_addr *nl_ipaddr;
---	int family, addrsize;
--+	struct ndmsg nhdr = {
--+		.ndm_state = NUD_PERMANENT,
--+		.ndm_ifindex = bss->br_ifindex,
--+	};
--+	struct nl_msg *msg;
--+	int addrsize;
-- 	int res;
-- 
-- 	if (!ipaddr)
-- 		return -EINVAL;
-- 
-- 	if (version == 4) {
---		family = AF_INET;
--+		nhdr.ndm_family = AF_INET;
-- 		addrsize = 4;
-- 	} else if (version == 6) {
---		family = AF_INET6;
--+		nhdr.ndm_family = AF_INET6;
-- 		addrsize = 16;
-- 	} else {
-- 		return -EINVAL;
--@@ -10359,41 +10338,30 @@ static int wpa_driver_br_delete_ip_neigh
-- 		return -1;
-- 	}
-- 
---	rn = rtnl_neigh_alloc();
---	if (rn == NULL)
--+	msg = nlmsg_alloc_simple(RTM_DELNEIGH, NLM_F_CREATE);
--+	if (!msg)
-- 		return -ENOMEM;
-- 
---	/* set the destination ip address for neigh */
---	nl_ipaddr = nl_addr_build(family, (void *) ipaddr, addrsize);
---	if (nl_ipaddr == NULL) {
---		wpa_printf(MSG_DEBUG, "nl80211: nl_ipaddr build failed");
---		res = -ENOMEM;
--+	res = -ENOMEM;
--+	if (nlmsg_append(msg, &nhdr, sizeof(nhdr), NLMSG_ALIGNTO) < 0)
-- 		goto errout;
---	}
---	res = rtnl_neigh_set_dst(rn, nl_ipaddr);
---	if (res) {
---		wpa_printf(MSG_DEBUG,
---			   "nl80211: neigh set destination addr failed");
--+
--+	if (nla_put(msg, NDA_DST, addrsize, (void *)ipaddr))
-- 		goto errout;
---	}
-- 
---	rtnl_neigh_set_ifindex(rn, bss->br_ifindex);
--+	res = nl_send_auto_complete(drv->rtnl_sk, msg);
--+	if (res < 0)
--+		goto errout;
-- 
---	res = rtnl_neigh_delete(drv->rtnl_sk, rn, 0);
--+	res = nl_wait_for_ack(drv->rtnl_sk);
-- 	if (res) {
-- 		wpa_printf(MSG_DEBUG,
-- 			   "nl80211: Deleting bridge ip neigh failed: %s",
-- 			   nl_geterror(res));
-- 	}
-- errout:
---	if (nl_ipaddr)
---		nl_addr_put(nl_ipaddr);
---	if (rn)
---		rtnl_neigh_put(rn);
--+	nlmsg_free(msg);
-- 	return res;
---#else /* CONFIG_LIBNL3_ROUTE */
---	return -1;
---#endif /* CONFIG_LIBNL3_ROUTE */
-- }
-- 
-- 
-diff --git a/package/network/services/hostapd/patches/040-mesh-allow-processing-authentication-frames-in-block.patch b/package/network/services/hostapd/patches/040-mesh-allow-processing-authentication-frames-in-block.patch
-deleted file mode 100644
-index 55dd980cd7..0000000000
---- a/package/network/services/hostapd/patches/040-mesh-allow-processing-authentication-frames-in-block.patch
-+++ /dev/null
-@@ -1,34 +0,0 @@
--From: Felix Fietkau <nbd@nbd.name>
--Date: Mon, 18 Feb 2019 12:57:11 +0100
--Subject: [PATCH] mesh: allow processing authentication frames in blocked state
--
--If authentication fails repeatedly e.g. because of a weak signal, the link
--can end up in blocked state. If one of the nodes tries to establish a link
--again before it is unblocked on the other side, it will block the link to
--that other side. The same happens on the other side when it unblocks the
--link. In that scenario, the link never recovers on its own.
--
--To fix this, allow restarting authentication even if the link is in blocked
--state, but don't initiate the attempt until the blocked period is over.
--
--Signed-off-by: Felix Fietkau <nbd@nbd.name>
-----
--
----- a/src/ap/ieee802_11.c
--+++ b/src/ap/ieee802_11.c
--@@ -2527,15 +2527,6 @@ static void handle_auth(struct hostapd_d
-- 				       seq_ctrl);
-- 			return;
-- 		}
---#ifdef CONFIG_MESH
---		if ((hapd->conf->mesh & MESH_ENABLED) &&
---		    sta->plink_state == PLINK_BLOCKED) {
---			wpa_printf(MSG_DEBUG, "Mesh peer " MACSTR
---				   " is blocked - drop Authentication frame",
---				   MAC2STR(mgmt->sa));
---			return;
---		}
---#endif /* CONFIG_MESH */
-- 	} else {
-- #ifdef CONFIG_MESH
-- 		if (hapd->conf->mesh & MESH_ENABLED) {
-diff --git a/package/network/services/hostapd/patches/050-mesh-make-forwarding-configurable.patch b/package/network/services/hostapd/patches/050-mesh-make-forwarding-configurable.patch
-deleted file mode 100644
-index 4d64ec8287..0000000000
---- a/package/network/services/hostapd/patches/050-mesh-make-forwarding-configurable.patch
-+++ /dev/null
-@@ -1,219 +0,0 @@
--From 90fe6429624fc48bc0e5d2d7eeecb7498708b5e3 Mon Sep 17 00:00:00 2001
--From: Daniel Golle <daniel@makrotopia.org>
--Date: Wed, 18 Apr 2018 19:24:31 +0200
--Subject: [PATCH 18/18] mesh: make forwarding configurable
--
--Allow mesh_fwding to be specified in a mesh bss config, pass that
--to the driver (only nl80211 implemented for now) and announce
--forwarding capability accordingly.
--
--Signed-off-by: Daniel Golle <daniel@makrotopia.org>
-----
-- src/ap/ap_config.h                 | 2 ++
-- src/drivers/driver.h               | 2 ++
-- src/drivers/driver_nl80211.c       | 3 +++
-- wpa_supplicant/config.c            | 4 ++++
-- wpa_supplicant/config.h            | 9 +++++++++
-- wpa_supplicant/config_file.c       | 4 ++++
-- wpa_supplicant/config_ssid.h       | 5 +++++
-- wpa_supplicant/mesh.c              | 6 ++++++
-- wpa_supplicant/mesh_mpm.c          | 4 ++--
-- wpa_supplicant/wpa_supplicant.conf | 3 +++
-- 10 files changed, 40 insertions(+), 2 deletions(-)
--
----- a/src/ap/ap_config.h
--+++ b/src/ap/ap_config.h
--@@ -51,6 +51,7 @@ struct mesh_conf {
-- 	int dot11MeshRetryTimeout; /* msec */
-- 	int dot11MeshConfirmTimeout; /* msec */
-- 	int dot11MeshHoldingTimeout; /* msec */
--+	int mesh_fwding;
-- };
-- 
-- #define MAX_STA_COUNT 2007
--@@ -701,6 +702,7 @@ struct hostapd_bss_config {
-- 
-- #define MESH_ENABLED BIT(0)
-- 	int mesh;
--+	int mesh_fwding;
-- 
-- 	u8 radio_measurements[RRM_CAPABILITIES_IE_LEN];
-- 
----- a/src/drivers/driver.h
--+++ b/src/drivers/driver.h
--@@ -1515,6 +1515,7 @@ struct wpa_driver_mesh_bss_params {
-- #define WPA_DRIVER_MESH_CONF_FLAG_MAX_PEER_LINKS	0x00000004
-- #define WPA_DRIVER_MESH_CONF_FLAG_HT_OP_MODE		0x00000008
-- #define WPA_DRIVER_MESH_CONF_FLAG_RSSI_THRESHOLD	0x00000010
--+#define WPA_DRIVER_MESH_CONF_FLAG_FORWARDING		0x00000020
-- 	/*
-- 	 * TODO: Other mesh configuration parameters would go here.
-- 	 * See NL80211_MESHCONF_* for all the mesh config parameters.
--@@ -1524,6 +1525,7 @@ struct wpa_driver_mesh_bss_params {
-- 	int peer_link_timeout;
-- 	int max_peer_links;
-- 	int rssi_threshold;
--+	int forwarding;
-- 	u16 ht_opmode;
-- };
-- 
----- a/src/drivers/driver_nl80211.c
--+++ b/src/drivers/driver_nl80211.c
--@@ -10038,6 +10038,9 @@ static int nl80211_put_mesh_config(struc
-- 	if (((params->flags & WPA_DRIVER_MESH_CONF_FLAG_AUTO_PLINKS) &&
-- 	     nla_put_u8(msg, NL80211_MESHCONF_AUTO_OPEN_PLINKS,
-- 			params->auto_plinks)) ||
--+	    ((params->flags & WPA_DRIVER_MESH_CONF_FLAG_FORWARDING) &&
--+	     nla_put_u8(msg, NL80211_MESHCONF_FORWARDING,
--+			params->forwarding)) ||
-- 	    ((params->flags & WPA_DRIVER_MESH_CONF_FLAG_MAX_PEER_LINKS) &&
-- 	     nla_put_u16(msg, NL80211_MESHCONF_MAX_PEER_LINKS,
-- 			 params->max_peer_links)) ||
----- a/wpa_supplicant/config.c
--+++ b/wpa_supplicant/config.c
--@@ -2473,6 +2473,7 @@ static const struct parse_data ssid_fiel
-- #ifdef CONFIG_MESH
-- 	{ INT_RANGE(mode, 0, 5) },
-- 	{ INT_RANGE(no_auto_peer, 0, 1) },
--+	{ INT_RANGE(mesh_fwding, 0, 1) },
-- 	{ INT_RANGE(mesh_rssi_threshold, -255, 1) },
-- #else /* CONFIG_MESH */
-- 	{ INT_RANGE(mode, 0, 4) },
--@@ -3049,6 +3050,7 @@ void wpa_config_set_network_defaults(str
-- 	ssid->dot11MeshRetryTimeout = DEFAULT_MESH_RETRY_TIMEOUT;
-- 	ssid->dot11MeshConfirmTimeout = DEFAULT_MESH_CONFIRM_TIMEOUT;
-- 	ssid->dot11MeshHoldingTimeout = DEFAULT_MESH_HOLDING_TIMEOUT;
--+	ssid->mesh_fwding = DEFAULT_MESH_FWDING;
-- 	ssid->mesh_rssi_threshold = DEFAULT_MESH_RSSI_THRESHOLD;
-- #endif /* CONFIG_MESH */
-- #ifdef CONFIG_HT_OVERRIDES
--@@ -4276,6 +4278,7 @@ struct wpa_config * wpa_config_alloc_emp
-- 	config->user_mpm = DEFAULT_USER_MPM;
-- 	config->max_peer_links = DEFAULT_MAX_PEER_LINKS;
-- 	config->mesh_max_inactivity = DEFAULT_MESH_MAX_INACTIVITY;
--+	config->mesh_fwding = DEFAULT_MESH_FWDING;
-- 	config->dot11RSNASAERetransPeriod =
-- 		DEFAULT_DOT11_RSNA_SAE_RETRANS_PERIOD;
-- 	config->fast_reauth = DEFAULT_FAST_REAUTH;
--@@ -4914,6 +4917,7 @@ static const struct global_parse_data gl
-- 	{ INT(user_mpm), 0 },
-- 	{ INT_RANGE(max_peer_links, 0, 255), 0 },
-- 	{ INT(mesh_max_inactivity), 0 },
--+	{ INT_RANGE(mesh_fwding, 0, 1), 0 },
-- 	{ INT(dot11RSNASAERetransPeriod), 0 },
-- #endif /* CONFIG_MESH */
-- 	{ INT(disable_scan_offload), 0 },
----- a/wpa_supplicant/config.h
--+++ b/wpa_supplicant/config.h
--@@ -18,6 +18,7 @@
-- #define DEFAULT_USER_MPM 1
-- #define DEFAULT_MAX_PEER_LINKS 99
-- #define DEFAULT_MESH_MAX_INACTIVITY 300
--+#define DEFAULT_MESH_FWDING 1
-- /*
--  * The default dot11RSNASAERetransPeriod is defined as 40 ms in the standard,
--  * but use 1000 ms in practice to avoid issues on low power CPUs.
--@@ -1351,6 +1352,14 @@ struct wpa_config {
-- 	int mesh_max_inactivity;
-- 
-- 	/**
--+	 * mesh_fwding - Mesh network layer-2 forwarding
--+	 *
--+	 * This controls whether to enable layer-2 forwarding.
--+	 * By default: 1: enabled
--+	 */
--+	int mesh_fwding;
--+
--+	/**
-- 	 * dot11RSNASAERetransPeriod - Timeout to retransmit SAE Auth frame
-- 	 *
-- 	 * This timeout value is used in mesh STA to retransmit
----- a/wpa_supplicant/config_file.c
--+++ b/wpa_supplicant/config_file.c
--@@ -866,6 +866,7 @@ static void wpa_config_write_network(FIL
-- #endif /* IEEE8021X_EAPOL */
-- 	INT(mode);
-- 	INT(no_auto_peer);
--+	INT(mesh_fwding);
-- 	INT(frequency);
-- 	INT(enable_edmg);
-- 	INT(edmg_channel);
--@@ -1527,6 +1528,9 @@ static void wpa_config_write_global(FILE
-- 		fprintf(f, "mesh_max_inactivity=%d\n",
-- 			config->mesh_max_inactivity);
-- 
--+	if (config->mesh_fwding != DEFAULT_MESH_FWDING)
--+		fprintf(f, "mesh_fwding=%d\n", config->mesh_fwding);
--+
-- 	if (config->dot11RSNASAERetransPeriod !=
-- 	    DEFAULT_DOT11_RSNA_SAE_RETRANS_PERIOD)
-- 		fprintf(f, "dot11RSNASAERetransPeriod=%d\n",
----- a/wpa_supplicant/config_ssid.h
--+++ b/wpa_supplicant/config_ssid.h
--@@ -546,6 +546,11 @@ struct wpa_ssid {
-- 	int dot11MeshConfirmTimeout; /* msec */
-- 	int dot11MeshHoldingTimeout; /* msec */
-- 
--+	/**
--+	 * Mesh network layer-2 forwarding
--+	 */
--+	int mesh_fwding;
--+
-- 	int ht;
-- 	int ht40;
-- 
----- a/wpa_supplicant/mesh.c
--+++ b/wpa_supplicant/mesh.c
--@@ -137,6 +137,7 @@ static struct mesh_conf * mesh_config_cr
-- 	conf->mesh_cc_id = 0;
-- 	conf->mesh_sp_id = MESH_SYNC_METHOD_NEIGHBOR_OFFSET;
-- 	conf->mesh_auth_id = (conf->security & MESH_CONF_SEC_AUTH) ? 1 : 0;
--+	conf->mesh_fwding = ssid->mesh_fwding;
-- 	conf->dot11MeshMaxRetries = ssid->dot11MeshMaxRetries;
-- 	conf->dot11MeshRetryTimeout = ssid->dot11MeshRetryTimeout;
-- 	conf->dot11MeshConfirmTimeout = ssid->dot11MeshConfirmTimeout;
--@@ -434,6 +435,7 @@ static int wpa_supplicant_mesh_init(stru
-- 	bss->conf->start_disabled = 1;
-- 	bss->conf->mesh = MESH_ENABLED;
-- 	bss->conf->ap_max_inactivity = wpa_s->conf->mesh_max_inactivity;
--+	bss->conf->mesh_fwding = wpa_s->conf->mesh_fwding;
-- 
-- 	if (ieee80211_is_dfs(ssid->frequency, wpa_s->hw.modes,
-- 			     wpa_s->hw.num_modes) && wpa_s->conf->country[0]) {
--@@ -647,6 +649,10 @@ int wpa_supplicant_join_mesh(struct wpa_
-- 	}
-- 	params->conf.peer_link_timeout = wpa_s->conf->mesh_max_inactivity;
-- 
--+	/* always explicitely set forwarding to on or off for now */
--+	params->conf.flags |= WPA_DRIVER_MESH_CONF_FLAG_FORWARDING;
--+	params->conf.forwarding = ssid->mesh_fwding;
--+
-- 	os_free(wpa_s->mesh_params);
-- 	wpa_s->mesh_params = params;
-- 	if (wpa_supplicant_mesh_init(wpa_s, ssid, &params->freq)) {
----- a/wpa_supplicant/mesh_mpm.c
--+++ b/wpa_supplicant/mesh_mpm.c
--@@ -303,9 +303,9 @@ static void mesh_mpm_send_plink_action(s
-- 		info = (bss->num_plinks > 63 ? 63 : bss->num_plinks) << 1;
-- 		/* TODO: Add Connected to Mesh Gate/AS subfields */
-- 		wpabuf_put_u8(buf, info);
---		/* always forwarding & accepting plinks for now */
--+		/* set forwarding & always accepting plinks for now */
-- 		wpabuf_put_u8(buf, MESH_CAP_ACCEPT_ADDITIONAL_PEER |
---			      MESH_CAP_FORWARDING);
--+			      (conf->mesh_fwding ? MESH_CAP_FORWARDING : 0));
-- 	} else {	/* Peer closing frame */
-- 		/* IE: Mesh ID */
-- 		wpabuf_put_u8(buf, WLAN_EID_MESH_ID);
----- a/wpa_supplicant/wpa_supplicant.conf
--+++ b/wpa_supplicant/wpa_supplicant.conf
--@@ -150,6 +150,9 @@ ap_scan=1
-- # This timeout value is used in mesh STA to clean up inactive stations.
-- #mesh_max_inactivity=300
-- 
--+# Enable 802.11s layer-2 routing and forwarding
--+#mesh_fwding=1
--+
-- # cert_in_cb - Whether to include a peer certificate dump in events
-- # This controls whether peer certificates for authentication server and
-- # its certificate chain are included in EAP peer certificate events. This is
-diff --git a/package/network/services/hostapd/patches/060-P2P-Fix-a-corner-case-in-peer-addition-based-on-PD-R.patch b/package/network/services/hostapd/patches/060-P2P-Fix-a-corner-case-in-peer-addition-based-on-PD-R.patch
-deleted file mode 100644
-index 1202ff3725..0000000000
---- a/package/network/services/hostapd/patches/060-P2P-Fix-a-corner-case-in-peer-addition-based-on-PD-R.patch
-+++ /dev/null
-@@ -1,45 +0,0 @@
--From 8460e3230988ef2ec13ce6b69b687e941f6cdb32 Mon Sep 17 00:00:00 2001
--From: Jouni Malinen <jouni@codeaurora.org>
--Date: Tue, 8 Dec 2020 23:52:50 +0200
--Subject: [PATCH] P2P: Fix a corner case in peer addition based on PD Request
--
--p2p_add_device() may remove the oldest entry if there is no room in the
--peer table for a new peer. This would result in any pointer to that
--removed entry becoming stale. A corner case with an invalid PD Request
--frame could result in such a case ending up using (read+write) freed
--memory. This could only by triggered when the peer table has reached its
--maximum size and the PD Request frame is received from the P2P Device
--Address of the oldest remaining entry and the frame has incorrect P2P
--Device Address in the payload.
--
--Fix this by fetching the dev pointer again after having called
--p2p_add_device() so that the stale pointer cannot be used.
--
--Fixes: 17bef1e97a50 ("P2P: Add peer entry based on Provision Discovery Request")
--Signed-off-by: Jouni Malinen <jouni@codeaurora.org>
-----
-- src/p2p/p2p_pd.c | 12 +++++-------
-- 1 file changed, 5 insertions(+), 7 deletions(-)
--
----- a/src/p2p/p2p_pd.c
--+++ b/src/p2p/p2p_pd.c
--@@ -595,14 +595,12 @@ void p2p_process_prov_disc_req(struct p2
-- 			goto out;
-- 		}
-- 
--+		dev = p2p_get_device(p2p, sa);
-- 		if (!dev) {
---			dev = p2p_get_device(p2p, sa);
---			if (!dev) {
---				p2p_dbg(p2p,
---					"Provision Discovery device not found "
---					MACSTR, MAC2STR(sa));
---				goto out;
---			}
--+			p2p_dbg(p2p,
--+				"Provision Discovery device not found "
--+				MACSTR, MAC2STR(sa));
--+			goto out;
-- 		}
-- 	} else if (msg.wfd_subelems) {
-- 		wpabuf_free(dev->info.wfd_subelems);
-diff --git a/package/network/services/hostapd/patches/100-daemonize_fix.patch b/package/network/services/hostapd/patches/100-daemonize_fix.patch
-deleted file mode 100644
-index 687bd4082d..0000000000
---- a/package/network/services/hostapd/patches/100-daemonize_fix.patch
-+++ /dev/null
-@@ -1,97 +0,0 @@
----- a/src/utils/os_unix.c
--+++ b/src/utils/os_unix.c
--@@ -10,6 +10,7 @@
-- 
-- #include <time.h>
-- #include <sys/wait.h>
--+#include <fcntl.h>
-- 
-- #ifdef ANDROID
-- #include <sys/capability.h>
--@@ -188,59 +189,46 @@ int os_gmtime(os_time_t t, struct os_tm
-- 	return 0;
-- }
-- 
---
---#ifdef __APPLE__
---#include <fcntl.h>
---static int os_daemon(int nochdir, int noclose)
--+int os_daemonize(const char *pid_file)
-- {
---	int devnull;
--+	int pid = 0, i, devnull;
-- 
---	if (chdir("/") < 0)
---		return -1;
--+#if defined(__uClinux__) || defined(__sun__)
--+	return -1;
--+#else /* defined(__uClinux__) || defined(__sun__) */
-- 
---	devnull = open("/dev/null", O_RDWR);
---	if (devnull < 0)
--+#ifndef __APPLE__
--+	pid = fork();
--+	if (pid < 0)
-- 		return -1;
--+#endif
-- 
---	if (dup2(devnull, STDIN_FILENO) < 0) {
---		close(devnull);
---		return -1;
--+	if (pid > 0) {
--+		if (pid_file) {
--+			FILE *f = fopen(pid_file, "w");
--+			if (f) {
--+				fprintf(f, "%u\n", pid);
--+				fclose(f);
--+			}
--+		}
--+		_exit(0);
-- 	}
-- 
---	if (dup2(devnull, STDOUT_FILENO) < 0) {
---		close(devnull);
--+	if (setsid() < 0)
-- 		return -1;
---	}
-- 
---	if (dup2(devnull, STDERR_FILENO) < 0) {
---		close(devnull);
--+	if (chdir("/") < 0)
-- 		return -1;
---	}
---
---	return 0;
---}
---#else /* __APPLE__ */
---#define os_daemon daemon
---#endif /* __APPLE__ */
-- 
---
---int os_daemonize(const char *pid_file)
---{
---#if defined(__uClinux__) || defined(__sun__)
---	return -1;
---#else /* defined(__uClinux__) || defined(__sun__) */
---	if (os_daemon(0, 0)) {
---		perror("daemon");
--+	devnull = open("/dev/null", O_RDWR);
--+	if (devnull < 0)
-- 		return -1;
---	}
-- 
---	if (pid_file) {
---		FILE *f = fopen(pid_file, "w");
---		if (f) {
---			fprintf(f, "%u\n", getpid());
---			fclose(f);
---		}
---	}
--+	for (i = 0; i <= STDERR_FILENO; i++)
--+		dup2(devnull, i);
--+
--+	if (devnull > 2)
--+		close(devnull);
-- 
-- 	return -0;
-- #endif /* defined(__uClinux__) || defined(__sun__) */
-diff --git a/package/network/services/hostapd/patches/110-notify-mgmt-frames.patch b/package/network/services/hostapd/patches/110-notify-mgmt-frames.patch
-deleted file mode 100644
-index c3a66a7115..0000000000
---- a/package/network/services/hostapd/patches/110-notify-mgmt-frames.patch
-+++ /dev/null
-@@ -1,116 +0,0 @@
--From 53f8fdb534d5222a0e852e38afde3f49832ace06 Mon Sep 17 00:00:00 2001
--From: =?UTF-8?q?Rapha=C3=ABl=20M=C3=A9lotte?= <raphael.melotte@mind.be>
--Date: Thu, 26 Nov 2020 09:27:40 +0100
--Subject: [PATCH] hostapd: Add an option to notify management frames on
-- ctrl_iface
--MIME-Version: 1.0
--Content-Type: text/plain; charset=UTF-8
--Content-Transfer-Encoding: 8bit
--
--In some contexts (e.g. Multi-AP) it can be useful to have access to
--some of the management frames in upper layers (e.g. to be able to
--process the content of association requests externally).
--
--Add 'notify_mgmt_frames'. When enabled, it will notify the ctrl_iface
--when a management frame arrives using 'AP_MGMT_FRAME_RECEIVED'.
--
--Note that to avoid completely flooding the ctrl_iface, not all
--management frames are included (e.g. beacons are excluded).
--
--Signed-off-by: Raphaël Mélotte <raphael.melotte@mind.be>
-----
-- hostapd/config_file.c |  2 ++
-- hostapd/hostapd.conf  |  4 ++++
-- src/ap/ap_config.h    |  2 ++
-- src/ap/ieee802_11.c   | 25 +++++++++++++++++++++++++
-- src/common/wpa_ctrl.h |  3 +++
-- 5 files changed, 36 insertions(+)
--
----- a/hostapd/config_file.c
--+++ b/hostapd/config_file.c
--@@ -4456,6 +4456,8 @@ static int hostapd_config_fill(struct ho
-- 		bss->multicast_to_unicast = atoi(pos);
-- 	} else if (os_strcmp(buf, "broadcast_deauth") == 0) {
-- 		bss->broadcast_deauth = atoi(pos);
--+	} else if (os_strcmp(buf, "notify_mgmt_frames") == 0) {
--+		conf->notify_mgmt_frames = atoi(pos);
-- #ifdef CONFIG_DPP
-- 	} else if (os_strcmp(buf, "dpp_name") == 0) {
-- 		os_free(bss->dpp_name);
----- a/hostapd/hostapd.conf
--+++ b/hostapd/hostapd.conf
--@@ -571,6 +571,10 @@ wmm_ac_vo_acm=0
-- # Default: 1 (enabled)
-- #broadcast_deauth=1
-- 
--+# Get notifications for management frames:
--+# Default: 0 (disabled)
--+#notify_mgmt_frames=0
--+
-- ##### IEEE 802.11n related configuration ######################################
-- 
-- # ieee80211n: Whether IEEE 802.11n (HT) is enabled
----- a/src/ap/ap_config.h
--+++ b/src/ap/ap_config.h
--@@ -1060,6 +1060,8 @@ struct hostapd_config {
-- 	unsigned int airtime_update_interval;
-- #define AIRTIME_MODE_MAX (__AIRTIME_MODE_MAX - 1)
-- #endif /* CONFIG_AIRTIME_POLICY */
--+
--+	u8 notify_mgmt_frames;
-- };
-- 
-- 
----- a/src/ap/ieee802_11.c
--+++ b/src/ap/ieee802_11.c
--@@ -4869,6 +4869,28 @@ static int handle_action(struct hostapd_
-- 	return 1;
-- }
-- 
--+/**
--+ * notify_mgmt_frame - notify of management frames on the control interface.
--+ * @hapd: hostapd BSS data structure (the BSS to which the management frame was
--+ * sent to)
--+ * @buf: management frame data (starting from IEEE 802.11 header)
--+ * @len: length of frame data in octets
--+ *
--+ * Notify the control interface of any management frame.
--+ */
--+static void notify_mgmt_frame(struct hostapd_data *hapd, const u8 *buf,
--+			      size_t len)
--+{
--+
--+	int hex_len = len * 2 + 1;
--+	char *hex = os_malloc(hex_len);
--+
--+	if (hex) {
--+		wpa_snprintf_hex(hex, hex_len, buf, len);
--+		wpa_msg_ctrl(hapd->msg_ctx, MSG_INFO, AP_MGMT_FRAME_RECEIVED "buf=%s", hex);
--+		os_free(hex);
--+	}
--+}
-- 
-- /**
--  * ieee802_11_mgmt - process incoming IEEE 802.11 management frames
--@@ -4960,6 +4982,9 @@ int ieee802_11_mgmt(struct hostapd_data
-- 	if (hapd->iconf->track_sta_max_num)
-- 		sta_track_add(hapd->iface, mgmt->sa, ssi_signal);
-- 
--+	if (hapd->iconf->notify_mgmt_frames)
--+		notify_mgmt_frame(hapd, buf, len);
--+
-- 	switch (stype) {
-- 	case WLAN_FC_STYPE_AUTH:
-- 		wpa_printf(MSG_DEBUG, "mgmt::auth");
----- a/src/common/wpa_ctrl.h
--+++ b/src/common/wpa_ctrl.h
--@@ -396,6 +396,9 @@ extern "C" {
-- #define BIT(x) (1U << (x))
-- #endif
-- 
--+/* Event triggered for received management frame */
--+#define AP_MGMT_FRAME_RECEIVED "AP-MGMT-FRAME-RECEIVED "
--+
-- /* BSS command information masks */
-- 
-- #define WPA_BSS_MASK_ALL		0xFFFDFFFF
-diff --git a/package/network/services/hostapd/patches/110-wolfssl-compile-fix.patch b/package/network/services/hostapd/patches/110-wolfssl-compile-fix.patch
-deleted file mode 100644
-index a7b5409602..0000000000
---- a/package/network/services/hostapd/patches/110-wolfssl-compile-fix.patch
-+++ /dev/null
-@@ -1,10 +0,0 @@
----- a/src/crypto/tls_wolfssl.c
--+++ b/src/crypto/tls_wolfssl.c
--@@ -19,6 +19,7 @@
-- #include <wolfssl/ssl.h>
-- #include <wolfssl/error-ssl.h>
-- #include <wolfssl/wolfcrypt/asn.h>
--+#include <wolfssl/openssl/x509v3.h>
-- 
-- #if defined(EAP_FAST) || defined(EAP_FAST_DYNAMIC) || defined(EAP_SERVER_FAST)
-- #define HAVE_AESGCM
-diff --git a/package/network/services/hostapd/patches/120-reconfigure-wps-credentials.patch b/package/network/services/hostapd/patches/120-reconfigure-wps-credentials.patch
-deleted file mode 100644
-index 1826b6685b..0000000000
---- a/package/network/services/hostapd/patches/120-reconfigure-wps-credentials.patch
-+++ /dev/null
-@@ -1,178 +0,0 @@
--From b389a77a0f6dccf495dbce5be9476000f6ec06a2 Mon Sep 17 00:00:00 2001
--From: =?UTF-8?q?Rapha=C3=ABl=20M=C3=A9lotte?= <raphael.melotte@mind.be>
--Date: Wed, 9 Dec 2020 19:55:53 +0100
--Subject: [PATCH] wps: reconfigure credentials on reload
--MIME-Version: 1.0
--Content-Type: text/plain; charset=UTF-8
--Content-Transfer-Encoding: 8bit
--
--When new credentials are configured and hostapd is reconfigured using
--SIGHUP (or reload on the ctrl_iface), also update the wps credentials.
--
--Before these changes, when WPS is triggered the registar always serves
--the credentials that were configured when hostapd started.
--
--Signed-off-by: Raphaël Mélotte <raphael.melotte@mind.be>
-----
-- src/ap/wps_hostapd.c    | 86 +++++++++++++++++++++++++++++++++++++++--
-- src/wps/wps.h           |  6 +++
-- src/wps/wps_registrar.c | 29 ++++++++++++++
-- 3 files changed, 118 insertions(+), 3 deletions(-)
--
----- a/src/ap/wps_hostapd.c
--+++ b/src/ap/wps_hostapd.c
--@@ -1375,6 +1375,43 @@ static void hostapd_wps_nfc_clear(struct
-- #endif /* CONFIG_WPS_NFC */
-- }
-- 
--+int hostapd_wps_update_multi_ap(struct hostapd_data *hapd,
--+				struct wps_registrar *reg) {
--+	struct hostapd_bss_config *conf = hapd->conf;
--+	u8 *multi_ap_backhaul_network_key = NULL;
--+	size_t multi_ap_backhaul_network_key_len = 0;
--+	int ret = -1;
--+
--+	if ((conf->multi_ap & FRONTHAUL_BSS) &&
--+	    conf->multi_ap_backhaul_ssid.ssid_len) {
--+		if (conf->multi_ap_backhaul_ssid.wpa_passphrase) {
--+			multi_ap_backhaul_network_key =
--+				(u8 *) os_strdup(conf->multi_ap_backhaul_ssid.wpa_passphrase);
--+			if (multi_ap_backhaul_network_key == NULL)
--+				return -1;
--+			multi_ap_backhaul_network_key_len =
--+				os_strlen(conf->multi_ap_backhaul_ssid.wpa_passphrase);
--+		} else if (conf->multi_ap_backhaul_ssid.wpa_psk) {
--+			multi_ap_backhaul_network_key = os_malloc(2 * PMK_LEN + 1);
--+			if (multi_ap_backhaul_network_key == NULL)
--+				return -1;
--+			wpa_snprintf_hex((char *) multi_ap_backhaul_network_key,
--+					 2 * PMK_LEN + 1,
--+					 conf->multi_ap_backhaul_ssid.wpa_psk->psk,
--+					 PMK_LEN);
--+			multi_ap_backhaul_network_key_len = 2 * PMK_LEN;
--+		}
--+		ret = wps_registrar_update_multi_ap(reg,
--+						    conf->multi_ap_backhaul_ssid.ssid,
--+						    conf->multi_ap_backhaul_ssid.ssid_len,
--+						    multi_ap_backhaul_network_key,
--+						    multi_ap_backhaul_network_key_len);
--+		os_free(multi_ap_backhaul_network_key);
--+	}
--+	return ret;
--+}
--+
--+
-- 
-- void hostapd_deinit_wps(struct hostapd_data *hapd)
-- {
--@@ -1409,11 +1446,54 @@ void hostapd_update_wps(struct hostapd_d
-- 	hapd->wps->upc = hapd->conf->upc;
-- #endif /* CONFIG_WPS_UPNP */
-- 
---	hostapd_wps_set_vendor_ext(hapd, hapd->wps);
---	hostapd_wps_set_application_ext(hapd, hapd->wps);
--+	struct wps_context *wps = hapd->wps;
--+	struct hostapd_bss_config *conf = hapd->conf;
--+
--+	os_memcpy(wps->ssid, conf->ssid.ssid, conf->ssid.ssid_len);
--+	wps->ssid_len = conf->ssid.ssid_len;
--+
--+	/* Clear wps settings, then fill them again */
--+	os_free(wps->network_key);
--+	wps->network_key = NULL;
--+	wps->network_key_len = 0;
--+	wps->psk_set = 0;
--+	if (conf->ssid.wpa_psk_file) {
--+		/* Use per-device PSKs */
--+	} else if (conf->ssid.wpa_passphrase) {
--+		wps->network_key = (u8 *) os_strdup(conf->ssid.wpa_passphrase);
--+		if (wps->network_key == NULL)
--+			return;
--+		wps->network_key_len = os_strlen(conf->ssid.wpa_passphrase);
--+	} else if (conf->ssid.wpa_psk) {
--+		wps->network_key = os_malloc(2 * PMK_LEN + 1);
--+		if (wps->network_key == NULL)
--+			return;
--+		wpa_snprintf_hex((char *) wps->network_key, 2 * PMK_LEN + 1,
--+				 conf->ssid.wpa_psk->psk, PMK_LEN);
--+		wps->network_key_len = 2 * PMK_LEN;
--+#ifdef CONFIG_WEP
--+	} else if (conf->ssid.wep.keys_set && conf->ssid.wep.key[0]) {
--+		wps->network_key = os_malloc(conf->ssid.wep.len[0]);
--+		if (wps->network_key == NULL)
--+			return;
--+		os_memcpy(wps->network_key, conf->ssid.wep.key[0],
--+			  conf->ssid.wep.len[0]);
--+		wps->network_key_len = conf->ssid.wep.len[0];
--+#endif /* CONFIG_WEP */
--+	}
--+
--+	if (conf->ssid.wpa_psk) {
--+		os_memcpy(wps->psk, conf->ssid.wpa_psk->psk, PMK_LEN);
--+		wps->psk_set = 1;
--+	}
--+
--+	hostapd_wps_update_multi_ap(hapd, wps->registrar);
--+
--+	hostapd_wps_set_vendor_ext(hapd, wps);
--+	hostapd_wps_set_application_ext(hapd, wps);
-- 
-- 	if (hapd->conf->wps_state)
---		wps_registrar_update_ie(hapd->wps->registrar);
--+		wps_registrar_update_ie(wps->registrar);
-- 	else
-- 		hostapd_deinit_wps(hapd);
-- }
----- a/src/wps/wps.h
--+++ b/src/wps/wps.h
--@@ -938,6 +938,12 @@ struct wpabuf * wps_build_nfc_handover_s
-- 					       struct wpabuf *nfc_dh_pubkey,
-- 					       struct wpabuf *nfc_dev_pw);
-- 
--+int wps_registrar_update_multi_ap(struct wps_registrar *reg,
--+				  const u8 *multi_ap_backhaul_ssid,
--+				  size_t multi_ap_backhaul_ssid_len,
--+				  const u8 *multi_ap_backhaul_network_key,
--+				  size_t multi_ap_backhaul_network_key_len);
--+
-- /* ndef.c */
-- struct wpabuf * ndef_parse_wifi(const struct wpabuf *buf);
-- struct wpabuf * ndef_build_wifi(const struct wpabuf *buf);
----- a/src/wps/wps_registrar.c
--+++ b/src/wps/wps_registrar.c
--@@ -3669,6 +3669,35 @@ int wps_registrar_config_ap(struct wps_r
-- }
-- 
-- 
--+int wps_registrar_update_multi_ap(struct wps_registrar *reg,
--+				  const u8 *multi_ap_backhaul_ssid,
--+				  size_t multi_ap_backhaul_ssid_len,
--+				  const u8 *multi_ap_backhaul_network_key,
--+				  size_t multi_ap_backhaul_network_key_len)
--+{
--+	if (multi_ap_backhaul_ssid != NULL) {
--+		os_memcpy(reg->multi_ap_backhaul_ssid,
--+			  multi_ap_backhaul_ssid,
--+			  multi_ap_backhaul_ssid_len);
--+		reg->multi_ap_backhaul_ssid_len =
--+			multi_ap_backhaul_ssid_len;
--+	}
--+	os_free(reg->multi_ap_backhaul_network_key);
--+	reg->multi_ap_backhaul_network_key = NULL;
--+	reg->multi_ap_backhaul_network_key_len = 0;
--+
--+	if (multi_ap_backhaul_network_key != NULL) {
--+		reg->multi_ap_backhaul_network_key =
--+			os_memdup(multi_ap_backhaul_network_key,
--+				  multi_ap_backhaul_network_key_len);
--+		if (reg->multi_ap_backhaul_network_key == NULL)
--+			return -1;
--+		reg->multi_ap_backhaul_network_key_len =
--+			multi_ap_backhaul_network_key_len;
--+	}
--+	return 0;
--+}
--+
-- #ifdef CONFIG_WPS_NFC
-- 
-- int wps_registrar_add_nfc_pw_token(struct wps_registrar *reg,
-diff --git a/package/network/services/hostapd/patches/200-multicall.patch b/package/network/services/hostapd/patches/200-multicall.patch
-deleted file mode 100644
-index 9119a24c55..0000000000
---- a/package/network/services/hostapd/patches/200-multicall.patch
-+++ /dev/null
-@@ -1,355 +0,0 @@
----- a/hostapd/Makefile
--+++ b/hostapd/Makefile
--@@ -31,6 +31,7 @@ CFLAGS += -I$(abspath ../src/utils)
-- export BINDIR ?= /usr/local/bin/
-- 
-- -include .config
--+-include $(if $(MULTICALL), ../wpa_supplicant/.config)
-- 
-- ifndef CONFIG_NO_GITVER
-- # Add VERSION_STR postfix for builds from a git repository
--@@ -204,7 +205,8 @@ endif
-- 
-- ifdef CONFIG_NO_VLAN
-- CFLAGS += -DCONFIG_NO_VLAN
---else
--+endif
--+ifneq ($(findstring CONFIG_NO_VLAN,$(CFLAGS)), CONFIG_NO_VLAN)
-- OBJS += ../src/ap/vlan_init.o
-- OBJS += ../src/ap/vlan_ifconfig.o
-- OBJS += ../src/ap/vlan.o
--@@ -354,10 +356,14 @@ CFLAGS += -DCONFIG_MBO
-- OBJS += ../src/ap/mbo_ap.o
-- endif
-- 
--+ifndef MULTICALL
--+CFLAGS += -DNO_SUPPLICANT
--+endif
--+
-- include ../src/drivers/drivers.mak
---OBJS += $(DRV_AP_OBJS)
---CFLAGS += $(DRV_AP_CFLAGS)
---LDFLAGS += $(DRV_AP_LDFLAGS)
--+OBJS += $(sort $(DRV_AP_OBJS) $(if $(MULTICALL),$(DRV_WPA_OBJS)))
--+CFLAGS += $(DRV_AP_CFLAGS) $(if $(MULTICALL),$(DRV_WPA_CFLAGS))
--+LDFLAGS += $(DRV_AP_LDFLAGS) $(if $(MULTICALL),$(DRV_WPA_LDFLAGS))
-- LIBS += $(DRV_AP_LIBS)
-- 
-- ifdef CONFIG_L2_PACKET
--@@ -1311,6 +1317,12 @@ install: $(addprefix $(DESTDIR)$(BINDIR)
-- 
-- BCHECK=../src/drivers/build.hostapd
-- 
--+hostapd_multi.a: $(BCHECK) $(OBJS)
--+	$(Q)$(CC) -c -o hostapd_multi.o -Dmain=hostapd_main $(CFLAGS) main.c
--+	@$(E) "  CC " $<
--+	@rm -f $@
--+	@$(AR) cr $@ hostapd_multi.o $(OBJS)
--+
-- hostapd: $(BCHECK) $(OBJS)
-- 	$(Q)$(CC) $(LDFLAGS) -o hostapd $(OBJS) $(LIBS)
-- 	@$(E) "  LD " $@
--@@ -1374,6 +1386,12 @@ SOBJS += ../src/crypto/sha256-kdf.o
-- SOBJS += ../src/crypto/sha384-kdf.o
-- SOBJS += ../src/crypto/sha512-kdf.o
-- 
--+dump_cflags:
--+	@printf "%s " "$(CFLAGS)"
--+
--+dump_ldflags:
--+	@printf "%s " "$(LDFLAGS) $(LIBS) $(EXTRALIBS)"
--+
-- nt_password_hash: $(NOBJS)
-- 	$(Q)$(CC) $(LDFLAGS) -o nt_password_hash $(NOBJS) $(LIBS_n)
-- 	@$(E) "  LD " $@
----- a/wpa_supplicant/Makefile
--+++ b/wpa_supplicant/Makefile
--@@ -27,6 +27,7 @@ CFLAGS += -I$(abspath ../src)
-- CFLAGS += -I$(abspath ../src/utils)
-- 
-- -include .config
--+-include $(if $(MULTICALL),../hostapd/.config)
-- 
-- ifndef CONFIG_NO_GITVER
-- # Add VERSION_STR postfix for builds from a git repository
--@@ -369,7 +370,9 @@ endif
-- ifdef CONFIG_IBSS_RSN
-- NEED_RSN_AUTHENTICATOR=y
-- CFLAGS += -DCONFIG_IBSS_RSN
--+ifndef MULTICALL
-- CFLAGS += -DCONFIG_NO_VLAN
--+endif
-- OBJS += ibss_rsn.o
-- endif
-- 
--@@ -890,6 +893,10 @@ ifdef CONFIG_DYNAMIC_EAP_METHODS
-- CFLAGS += -DCONFIG_DYNAMIC_EAP_METHODS
-- LIBS += -ldl -rdynamic
-- endif
--+else
--+  ifdef MULTICALL
--+    OBJS += ../src/eap_common/eap_common.o
--+  endif
-- endif
-- 
-- ifdef CONFIG_AP
--@@ -897,9 +904,11 @@ NEED_EAP_COMMON=y
-- NEED_RSN_AUTHENTICATOR=y
-- CFLAGS += -DCONFIG_AP
-- OBJS += ap.o
--+ifndef MULTICALL
-- CFLAGS += -DCONFIG_NO_RADIUS
-- CFLAGS += -DCONFIG_NO_ACCOUNTING
-- CFLAGS += -DCONFIG_NO_VLAN
--+endif
-- OBJS += ../src/ap/hostapd.o
-- OBJS += ../src/ap/wpa_auth_glue.o
-- OBJS += ../src/ap/utils.o
--@@ -979,6 +988,12 @@ endif
-- ifdef CONFIG_HS20
-- OBJS += ../src/ap/hs20.o
-- endif
--+else
--+  ifdef MULTICALL
--+    OBJS += ../src/eap_server/eap_server.o
--+    OBJS += ../src/eap_server/eap_server_identity.o
--+    OBJS += ../src/eap_server/eap_server_methods.o
--+  endif
-- endif
-- 
-- ifdef CONFIG_MBO
--@@ -987,7 +1002,9 @@ CFLAGS += -DCONFIG_MBO
-- endif
-- 
-- ifdef NEED_RSN_AUTHENTICATOR
--+ifndef MULTICALL
-- CFLAGS += -DCONFIG_NO_RADIUS
--+endif
-- NEED_AES_WRAP=y
-- OBJS += ../src/ap/wpa_auth.o
-- OBJS += ../src/ap/wpa_auth_ie.o
--@@ -1897,6 +1914,12 @@ wpa_priv: $(BCHECK) $(OBJS_priv)
-- 
-- $(OBJS_c) $(OBJS_t) $(OBJS_t2) $(OBJS) $(BCHECK) $(EXTRA_progs): .config
-- 
--+wpa_supplicant_multi.a: .config $(BCHECK) $(OBJS) $(EXTRA_progs)
--+	$(Q)$(CC) -c -o wpa_supplicant_multi.o -Dmain=wpa_supplicant_main $(CFLAGS) main.c
--+	@$(E) "  CC " $<
--+	@rm -f $@
--+	@$(AR) cr $@ wpa_supplicant_multi.o $(OBJS)
--+
-- wpa_supplicant: $(BCHECK) $(OBJS) $(EXTRA_progs)
-- 	$(Q)$(LDO) $(LDFLAGS) -o wpa_supplicant $(OBJS) $(LIBS) $(EXTRALIBS)
-- 	@$(E) "  LD " $@
--@@ -1997,6 +2020,12 @@ endif
-- 	$(Q)sed -e 's|\@BINDIR\@|$(BINDIR)|g' $< >$@
-- 	@$(E) "  sed" $<
-- 
--+dump_cflags:
--+	@printf "%s " "$(CFLAGS)"
--+
--+dump_ldflags:
--+	@printf "%s " "$(LDFLAGS) $(LIBS) $(EXTRALIBS)"
--+
-- wpa_supplicant.exe: wpa_supplicant
-- 	mv -f $< $@
-- wpa_cli.exe: wpa_cli
----- a/src/drivers/driver.h
--+++ b/src/drivers/driver.h
--@@ -5886,8 +5886,8 @@ union wpa_event_data {
--  * Driver wrapper code should call this function whenever an event is received
--  * from the driver.
--  */
---void wpa_supplicant_event(void *ctx, enum wpa_event_type event,
---			  union wpa_event_data *data);
--+extern void (*wpa_supplicant_event)(void *ctx, enum wpa_event_type event,
--+				    union wpa_event_data *data);
-- 
-- /**
--  * wpa_supplicant_event_global - Report a driver event for wpa_supplicant
--@@ -5899,7 +5899,7 @@ void wpa_supplicant_event(void *ctx, enu
--  * Same as wpa_supplicant_event(), but we search for the interface in
--  * wpa_global.
--  */
---void wpa_supplicant_event_global(void *ctx, enum wpa_event_type event,
--+extern void (*wpa_supplicant_event_global)(void *ctx, enum wpa_event_type event,
-- 				 union wpa_event_data *data);
-- 
-- /*
----- a/src/ap/drv_callbacks.c
--+++ b/src/ap/drv_callbacks.c
--@@ -1789,8 +1789,8 @@ err:
-- #endif /* CONFIG_OWE */
-- 
-- 
---void wpa_supplicant_event(void *ctx, enum wpa_event_type event,
---			  union wpa_event_data *data)
--+void hostapd_wpa_event(void *ctx, enum wpa_event_type event,
--+		       union wpa_event_data *data)
-- {
-- 	struct hostapd_data *hapd = ctx;
-- #ifndef CONFIG_NO_STDOUT_DEBUG
--@@ -2035,7 +2035,7 @@ void wpa_supplicant_event(void *ctx, enu
-- }
-- 
-- 
---void wpa_supplicant_event_global(void *ctx, enum wpa_event_type event,
--+void hostapd_wpa_event_global(void *ctx, enum wpa_event_type event,
-- 				 union wpa_event_data *data)
-- {
-- 	struct hapd_interfaces *interfaces = ctx;
----- a/wpa_supplicant/wpa_priv.c
--+++ b/wpa_supplicant/wpa_priv.c
--@@ -1038,8 +1038,8 @@ static void wpa_priv_send_ft_response(st
-- }
-- 
-- 
---void wpa_supplicant_event(void *ctx, enum wpa_event_type event,
---			  union wpa_event_data *data)
--+static void supplicant_event(void *ctx, enum wpa_event_type event,
--+			     union wpa_event_data *data)
-- {
-- 	struct wpa_priv_interface *iface = ctx;
-- 
--@@ -1102,7 +1102,7 @@ void wpa_supplicant_event(void *ctx, enu
-- }
-- 
-- 
---void wpa_supplicant_event_global(void *ctx, enum wpa_event_type event,
--+void supplicant_event_global(void *ctx, enum wpa_event_type event,
-- 				 union wpa_event_data *data)
-- {
-- 	struct wpa_priv_global *global = ctx;
--@@ -1215,6 +1215,8 @@ int main(int argc, char *argv[])
-- 	if (os_program_init())
-- 		return -1;
-- 
--+	wpa_supplicant_event = supplicant_event;
--+	wpa_supplicant_event_global = supplicant_event_global;
-- 	wpa_priv_fd_workaround();
-- 
-- 	os_memset(&global, 0, sizeof(global));
----- a/wpa_supplicant/events.c
--+++ b/wpa_supplicant/events.c
--@@ -4579,8 +4579,8 @@ static void wpas_event_unprot_beacon(str
-- }
-- 
-- 
---void wpa_supplicant_event(void *ctx, enum wpa_event_type event,
---			  union wpa_event_data *data)
--+void supplicant_event(void *ctx, enum wpa_event_type event,
--+		      union wpa_event_data *data)
-- {
-- 	struct wpa_supplicant *wpa_s = ctx;
-- 	int resched;
--@@ -5398,7 +5398,7 @@ void wpa_supplicant_event(void *ctx, enu
-- }
-- 
-- 
---void wpa_supplicant_event_global(void *ctx, enum wpa_event_type event,
--+void supplicant_event_global(void *ctx, enum wpa_event_type event,
-- 				 union wpa_event_data *data)
-- {
-- 	struct wpa_supplicant *wpa_s;
----- a/wpa_supplicant/wpa_supplicant.c
--+++ b/wpa_supplicant/wpa_supplicant.c
--@@ -6594,7 +6594,6 @@ struct wpa_interface * wpa_supplicant_ma
-- 	return NULL;
-- }
-- 
---
-- /**
--  * wpa_supplicant_match_existing - Match existing interfaces
--  * @global: Pointer to global data from wpa_supplicant_init()
--@@ -6631,6 +6630,11 @@ static int wpa_supplicant_match_existing
-- 
-- #endif /* CONFIG_MATCH_IFACE */
-- 
--+extern void supplicant_event(void *ctx, enum wpa_event_type event,
--+			     union wpa_event_data *data);
--+
--+extern void supplicant_event_global(void *ctx, enum wpa_event_type event,
--+ 				 union wpa_event_data *data);
-- 
-- /**
--  * wpa_supplicant_add_iface - Add a new network interface
--@@ -6887,6 +6891,8 @@ struct wpa_global * wpa_supplicant_init(
-- #ifndef CONFIG_NO_WPA_MSG
-- 	wpa_msg_register_ifname_cb(wpa_supplicant_msg_ifname_cb);
-- #endif /* CONFIG_NO_WPA_MSG */
--+	wpa_supplicant_event = supplicant_event;
--+	wpa_supplicant_event_global = supplicant_event_global;
-- 
-- 	if (params->wpa_debug_file_path)
-- 		wpa_debug_open_file(params->wpa_debug_file_path);
----- a/hostapd/main.c
--+++ b/hostapd/main.c
--@@ -590,6 +590,11 @@ fail:
-- 	return -1;
-- }
-- 
--+void hostapd_wpa_event(void *ctx, enum wpa_event_type event,
--+                       union wpa_event_data *data);
--+
--+void hostapd_wpa_event_global(void *ctx, enum wpa_event_type event,
--+ 				 union wpa_event_data *data);
-- 
-- #ifdef CONFIG_WPS
-- static int gen_uuid(const char *txt_addr)
--@@ -684,6 +689,8 @@ int main(int argc, char *argv[])
-- 		return -1;
-- #endif /* CONFIG_DPP */
-- 
--+	wpa_supplicant_event = hostapd_wpa_event;
--+	wpa_supplicant_event_global = hostapd_wpa_event_global;
-- 	for (;;) {
-- 		c = getopt(argc, argv, "b:Bde:f:hi:KP:sSTtu:vg:G:");
-- 		if (c < 0)
----- a/src/drivers/drivers.c
--+++ b/src/drivers/drivers.c
--@@ -10,6 +10,10 @@
-- #include "utils/common.h"
-- #include "driver.h"
-- 
--+void (*wpa_supplicant_event)(void *ctx, enum wpa_event_type event,
--+			     union wpa_event_data *data);
--+void (*wpa_supplicant_event_global)(void *ctx, enum wpa_event_type event,
--+			     union wpa_event_data *data);
-- 
-- const struct wpa_driver_ops *const wpa_drivers[] =
-- {
----- a/wpa_supplicant/eapol_test.c
--+++ b/wpa_supplicant/eapol_test.c
--@@ -30,7 +30,12 @@
-- #include "ctrl_iface.h"
-- #include "pcsc_funcs.h"
-- #include "wpas_glue.h"
--+#include "drivers/driver.h"
-- 
--+void (*wpa_supplicant_event)(void *ctx, enum wpa_event_type event,
--+			     union wpa_event_data *data);
--+void (*wpa_supplicant_event_global)(void *ctx, enum wpa_event_type event,
--+			     union wpa_event_data *data);
-- 
-- const struct wpa_driver_ops *const wpa_drivers[] = { NULL };
-- 
--@@ -1292,6 +1297,10 @@ static void usage(void)
-- 	       "option several times.\n");
-- }
-- 
--+extern void supplicant_event(void *ctx, enum wpa_event_type event,
--+			     union wpa_event_data *data);
--+extern void supplicant_event_global(void *ctx, enum wpa_event_type event,
--+			     union wpa_event_data *data);
-- 
-- int main(int argc, char *argv[])
-- {
--@@ -1312,6 +1321,8 @@ int main(int argc, char *argv[])
-- 	if (os_program_init())
-- 		return -1;
-- 
--+	wpa_supplicant_event = supplicant_event;
--+	wpa_supplicant_event_global = supplicant_event_global;
-- 	hostapd_logger_register_cb(hostapd_logger_cb);
-- 
-- 	os_memset(&eapol_test, 0, sizeof(eapol_test));
-diff --git a/package/network/services/hostapd/patches/300-noscan.patch b/package/network/services/hostapd/patches/300-noscan.patch
-deleted file mode 100644
-index 638b76f84e..0000000000
---- a/package/network/services/hostapd/patches/300-noscan.patch
-+++ /dev/null
-@@ -1,58 +0,0 @@
----- a/hostapd/config_file.c
--+++ b/hostapd/config_file.c
--@@ -3493,6 +3493,10 @@ static int hostapd_config_fill(struct ho
-- 		if (bss->ocv && !bss->ieee80211w)
-- 			bss->ieee80211w = 1;
-- #endif /* CONFIG_OCV */
--+	} else if (os_strcmp(buf, "noscan") == 0) {
--+		conf->noscan = atoi(pos);
--+	} else if (os_strcmp(buf, "ht_coex") == 0) {
--+		conf->no_ht_coex = !atoi(pos);
-- 	} else if (os_strcmp(buf, "ieee80211n") == 0) {
-- 		conf->ieee80211n = atoi(pos);
-- 	} else if (os_strcmp(buf, "ht_capab") == 0) {
----- a/src/ap/ap_config.h
--+++ b/src/ap/ap_config.h
--@@ -984,6 +984,8 @@ struct hostapd_config {
-- 
-- 	int ht_op_mode_fixed;
-- 	u16 ht_capab;
--+	int noscan;
--+	int no_ht_coex;
-- 	int ieee80211n;
-- 	int secondary_channel;
-- 	int no_pri_sec_switch;
----- a/src/ap/hw_features.c
--+++ b/src/ap/hw_features.c
--@@ -500,7 +500,8 @@ static int ieee80211n_check_40mhz(struct
-- 	int ret;
-- 
-- 	/* Check that HT40 is used and PRI / SEC switch is allowed */
---	if (!iface->conf->secondary_channel || iface->conf->no_pri_sec_switch)
--+	if (!iface->conf->secondary_channel || iface->conf->no_pri_sec_switch ||
--+		iface->conf->noscan)
-- 		return 0;
-- 
-- 	hostapd_set_state(iface, HAPD_IFACE_HT_SCAN);
----- a/src/ap/ieee802_11_ht.c
--+++ b/src/ap/ieee802_11_ht.c
--@@ -230,6 +230,9 @@ void hostapd_2040_coex_action(struct hos
-- 		return;
-- 	}
-- 
--+	if (iface->conf->noscan || iface->conf->no_ht_coex)
--+		return;
--+
-- 	if (len < IEEE80211_HDRLEN + 2 + sizeof(*bc_ie)) {
-- 		wpa_printf(MSG_DEBUG,
-- 			   "Ignore too short 20/40 BSS Coexistence Management frame");
--@@ -390,6 +393,9 @@ void ht40_intolerant_add(struct hostapd_
-- 	if (iface->current_mode->mode != HOSTAPD_MODE_IEEE80211G)
-- 		return;
-- 
--+	if (iface->conf->noscan || iface->conf->no_ht_coex)
--+		return;
--+
-- 	wpa_printf(MSG_INFO, "HT: Forty MHz Intolerant is set by STA " MACSTR
-- 		   " in Association Request", MAC2STR(sta->addr));
-- 
-diff --git a/package/network/services/hostapd/patches/301-mesh-noscan.patch b/package/network/services/hostapd/patches/301-mesh-noscan.patch
-deleted file mode 100644
-index f85b72453e..0000000000
---- a/package/network/services/hostapd/patches/301-mesh-noscan.patch
-+++ /dev/null
-@@ -1,68 +0,0 @@
----- a/wpa_supplicant/config.c
--+++ b/wpa_supplicant/config.c
--@@ -2478,6 +2478,7 @@ static const struct parse_data ssid_fiel
-- #else /* CONFIG_MESH */
-- 	{ INT_RANGE(mode, 0, 4) },
-- #endif /* CONFIG_MESH */
--+	{ INT_RANGE(noscan, 0, 1) },
-- 	{ INT_RANGE(proactive_key_caching, 0, 1) },
-- 	{ INT_RANGE(disabled, 0, 2) },
-- 	{ STR(id_str) },
----- a/wpa_supplicant/config_file.c
--+++ b/wpa_supplicant/config_file.c
--@@ -866,6 +866,7 @@ static void wpa_config_write_network(FIL
-- #endif /* IEEE8021X_EAPOL */
-- 	INT(mode);
-- 	INT(no_auto_peer);
--+	INT(noscan);
-- 	INT(mesh_fwding);
-- 	INT(frequency);
-- 	INT(enable_edmg);
----- a/wpa_supplicant/mesh.c
--+++ b/wpa_supplicant/mesh.c
--@@ -467,6 +467,8 @@ static int wpa_supplicant_mesh_init(stru
-- 			   frequency);
-- 		goto out_free;
-- 	}
--+	if (ssid->noscan)
--+		conf->noscan = 1;
-- 
-- 	if (ssid->mesh_basic_rates == NULL) {
-- 		/*
----- a/wpa_supplicant/wpa_supplicant.c
--+++ b/wpa_supplicant/wpa_supplicant.c
--@@ -2334,12 +2334,12 @@ void ibss_mesh_setup_freq(struct wpa_sup
-- 	int ieee80211_mode = wpas_mode_to_ieee80211_mode(ssid->mode);
-- 	enum hostapd_hw_mode hw_mode;
-- 	struct hostapd_hw_modes *mode = NULL;
---	int ht40plus[] = { 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157,
--+	int ht40plus[] = { 1, 2, 3, 4, 5, 6, 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157,
-- 			   184, 192 };
-- 	int vht80[] = { 36, 52, 100, 116, 132, 149 };
-- 	struct hostapd_channel_data *pri_chan = NULL, *sec_chan = NULL;
-- 	u8 channel;
---	int i, chan_idx, ht40 = -1, res, obss_scan = 1;
--+	int i, chan_idx, ht40 = -1, res, obss_scan = !(ssid->noscan);
-- 	unsigned int j, k;
-- 	struct hostapd_freq_params vht_freq;
-- 	int chwidth, seg0, seg1;
--@@ -2421,7 +2421,7 @@ void ibss_mesh_setup_freq(struct wpa_sup
-- #endif /* CONFIG_HE_OVERRIDES */
-- 
-- 	/* Setup higher BW only for 5 GHz */
---	if (mode->mode != HOSTAPD_MODE_IEEE80211A)
--+	if (mode->mode != HOSTAPD_MODE_IEEE80211A && !(ssid->noscan))
-- 		return;
-- 
-- 	for (chan_idx = 0; chan_idx < mode->num_channels; chan_idx++) {
----- a/wpa_supplicant/config_ssid.h
--+++ b/wpa_supplicant/config_ssid.h
--@@ -971,6 +971,8 @@ struct wpa_ssid {
-- 	 */
-- 	int no_auto_peer;
-- 
--+	int noscan;
--+
-- 	/**
-- 	 * mesh_rssi_threshold - Set mesh parameter mesh_rssi_threshold (dBm)
-- 	 *
-diff --git a/package/network/services/hostapd/patches/310-rescan_immediately.patch b/package/network/services/hostapd/patches/310-rescan_immediately.patch
-deleted file mode 100644
-index 0040b61c6b..0000000000
---- a/package/network/services/hostapd/patches/310-rescan_immediately.patch
-+++ /dev/null
-@@ -1,11 +0,0 @@
----- a/wpa_supplicant/wpa_supplicant.c
--+++ b/wpa_supplicant/wpa_supplicant.c
--@@ -4949,7 +4949,7 @@ wpa_supplicant_alloc(struct wpa_supplica
-- 	if (wpa_s == NULL)
-- 		return NULL;
-- 	wpa_s->scan_req = INITIAL_SCAN_REQ;
---	wpa_s->scan_interval = 5;
--+	wpa_s->scan_interval = 1;
-- 	wpa_s->new_connection = 1;
-- 	wpa_s->parent = parent ? parent : wpa_s;
-- 	wpa_s->p2pdev = wpa_s->parent;
-diff --git a/package/network/services/hostapd/patches/320-optional_rfkill.patch b/package/network/services/hostapd/patches/320-optional_rfkill.patch
-deleted file mode 100644
-index a703c7e132..0000000000
---- a/package/network/services/hostapd/patches/320-optional_rfkill.patch
-+++ /dev/null
-@@ -1,61 +0,0 @@
----- a/src/drivers/drivers.mak
--+++ b/src/drivers/drivers.mak
--@@ -50,7 +50,6 @@ NEED_SME=y
-- NEED_AP_MLME=y
-- NEED_NETLINK=y
-- NEED_LINUX_IOCTL=y
---NEED_RFKILL=y
-- NEED_RADIOTAP=y
-- NEED_LIBNL=y
-- endif
--@@ -107,7 +106,6 @@ DRV_WPA_CFLAGS += -DCONFIG_DRIVER_WEXT
-- CONFIG_WIRELESS_EXTENSION=y
-- NEED_NETLINK=y
-- NEED_LINUX_IOCTL=y
---NEED_RFKILL=y
-- endif
-- 
-- ifdef CONFIG_DRIVER_NDIS
--@@ -133,7 +131,6 @@ endif
-- ifdef CONFIG_WIRELESS_EXTENSION
-- DRV_WPA_CFLAGS += -DCONFIG_WIRELESS_EXTENSION
-- DRV_WPA_OBJS += ../src/drivers/driver_wext.o
---NEED_RFKILL=y
-- endif
-- 
-- ifdef NEED_NETLINK
--@@ -142,6 +139,7 @@ endif
-- 
-- ifdef NEED_RFKILL
-- DRV_OBJS += ../src/drivers/rfkill.o
--+DRV_WPA_CFLAGS += -DCONFIG_RFKILL
-- endif
-- 
-- ifdef NEED_RADIOTAP
----- a/src/drivers/rfkill.h
--+++ b/src/drivers/rfkill.h
--@@ -18,8 +18,24 @@ struct rfkill_config {
-- 	void (*unblocked_cb)(void *ctx);
-- };
-- 
--+#ifdef CONFIG_RFKILL
-- struct rfkill_data * rfkill_init(struct rfkill_config *cfg);
-- void rfkill_deinit(struct rfkill_data *rfkill);
-- int rfkill_is_blocked(struct rfkill_data *rfkill);
--+#else
--+static inline struct rfkill_data * rfkill_init(struct rfkill_config *cfg)
--+{
--+	return (void *) 1;
--+}
--+
--+static inline void rfkill_deinit(struct rfkill_data *rfkill)
--+{
--+}
--+
--+static inline int rfkill_is_blocked(struct rfkill_data *rfkill)
--+{
--+	return 0;
--+}
--+#endif
-- 
-- #endif /* RFKILL_H */
-diff --git a/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch b/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch
-deleted file mode 100644
-index ccd8589728..0000000000
---- a/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch
-+++ /dev/null
-@@ -1,11 +0,0 @@
----- a/src/drivers/driver_nl80211.c
--+++ b/src/drivers/driver_nl80211.c
--@@ -4661,7 +4661,7 @@ static int nl80211_set_channel(struct i8
-- 		   freq->freq, freq->ht_enabled, freq->vht_enabled, freq->he_enabled,
-- 		   freq->bandwidth, freq->center_freq1, freq->center_freq2);
-- 
---	msg = nl80211_drv_msg(drv, 0, set_chan ? NL80211_CMD_SET_CHANNEL :
--+	msg = nl80211_bss_msg(bss, 0, set_chan ? NL80211_CMD_SET_CHANNEL :
-- 			      NL80211_CMD_SET_WIPHY);
-- 	if (!msg || nl80211_put_freq_params(msg, freq) < 0) {
-- 		nlmsg_free(msg);
-diff --git a/package/network/services/hostapd/patches/340-reload_freq_change.patch b/package/network/services/hostapd/patches/340-reload_freq_change.patch
-deleted file mode 100644
-index e0e62c2a11..0000000000
---- a/package/network/services/hostapd/patches/340-reload_freq_change.patch
-+++ /dev/null
-@@ -1,75 +0,0 @@
----- a/src/ap/hostapd.c
--+++ b/src/ap/hostapd.c
--@@ -114,6 +114,28 @@ static void hostapd_reload_bss(struct ho
-- #endif /* CONFIG_NO_RADIUS */
-- 
-- 	ssid = &hapd->conf->ssid;
--+
--+	hostapd_set_freq(hapd, hapd->iconf->hw_mode, hapd->iface->freq,
--+			 hapd->iconf->channel,
--+			 hapd->iconf->enable_edmg,
--+			 hapd->iconf->edmg_channel,
--+			 hapd->iconf->ieee80211n,
--+			 hapd->iconf->ieee80211ac,
--+			 hapd->iconf->ieee80211ax,
--+			 hapd->iconf->secondary_channel,
--+			 hostapd_get_oper_chwidth(hapd->iconf),
--+			 hostapd_get_oper_centr_freq_seg0_idx(hapd->iconf),
--+			 hostapd_get_oper_centr_freq_seg1_idx(hapd->iconf));
--+
--+	if (hapd->iface->current_mode) {
--+		if (hostapd_prepare_rates(hapd->iface, hapd->iface->current_mode)) {
--+			wpa_printf(MSG_ERROR, "Failed to prepare rates table.");
--+			hostapd_logger(hapd, NULL, HOSTAPD_MODULE_IEEE80211,
--+				       HOSTAPD_LEVEL_WARNING,
--+				       "Failed to prepare rates table.");
--+		}
--+	}
--+
-- 	if (!ssid->wpa_psk_set && ssid->wpa_psk && !ssid->wpa_psk->next &&
-- 	    ssid->wpa_passphrase_set && ssid->wpa_passphrase) {
-- 		/*
--@@ -215,6 +237,7 @@ int hostapd_reload_config(struct hostapd
-- 	struct hostapd_data *hapd = iface->bss[0];
-- 	struct hostapd_config *newconf, *oldconf;
-- 	size_t j;
--+	int i;
-- 
-- 	if (iface->config_fname == NULL) {
-- 		/* Only in-memory config in use - assume it has been updated */
--@@ -265,24 +288,20 @@ int hostapd_reload_config(struct hostapd
-- 	}
-- 	iface->conf = newconf;
-- 
--+	for (i = 0; i < iface->num_hw_features; i++) {
--+		struct hostapd_hw_modes *mode = &iface->hw_features[i];
--+		if (mode->mode == iface->conf->hw_mode) {
--+			iface->current_mode = mode;
--+			break;
--+		}
--+	}
--+
--+	if (iface->conf->channel)
--+		iface->freq = hostapd_hw_get_freq(hapd, iface->conf->channel);
--+
-- 	for (j = 0; j < iface->num_bss; j++) {
-- 		hapd = iface->bss[j];
-- 		hapd->iconf = newconf;
---		hapd->iconf->channel = oldconf->channel;
---		hapd->iconf->acs = oldconf->acs;
---		hapd->iconf->secondary_channel = oldconf->secondary_channel;
---		hapd->iconf->ieee80211n = oldconf->ieee80211n;
---		hapd->iconf->ieee80211ac = oldconf->ieee80211ac;
---		hapd->iconf->ht_capab = oldconf->ht_capab;
---		hapd->iconf->vht_capab = oldconf->vht_capab;
---		hostapd_set_oper_chwidth(hapd->iconf,
---					 hostapd_get_oper_chwidth(oldconf));
---		hostapd_set_oper_centr_freq_seg0_idx(
---			hapd->iconf,
---			hostapd_get_oper_centr_freq_seg0_idx(oldconf));
---		hostapd_set_oper_centr_freq_seg1_idx(
---			hapd->iconf,
---			hostapd_get_oper_centr_freq_seg1_idx(oldconf));
-- 		hapd->conf = newconf->bss[j];
-- 		hostapd_reload_bss(hapd);
-- 	}
-diff --git a/package/network/services/hostapd/patches/341-mesh-ctrl-iface-channel-switch.patch b/package/network/services/hostapd/patches/341-mesh-ctrl-iface-channel-switch.patch
-deleted file mode 100644
-index 90fa5eff5d..0000000000
---- a/package/network/services/hostapd/patches/341-mesh-ctrl-iface-channel-switch.patch
-+++ /dev/null
-@@ -1,39 +0,0 @@
----- a/wpa_supplicant/ap.c
--+++ b/wpa_supplicant/ap.c
--@@ -1466,15 +1466,35 @@ int ap_switch_channel(struct wpa_supplic
-- 
-- 
-- #ifdef CONFIG_CTRL_IFACE
--+
--+static int __ap_ctrl_iface_chanswitch(struct hostapd_iface *iface,
--+				      struct csa_settings *settings)
--+{
--+#ifdef NEED_AP_MLME
--+	if (!iface || !iface->bss[0])
--+		return 0;
--+
--+	return hostapd_switch_channel(iface->bss[0], settings);
--+#else
--+	return -1;
--+#endif
--+}
--+
--+
-- int ap_ctrl_iface_chanswitch(struct wpa_supplicant *wpa_s, const char *pos)
-- {
-- 	struct csa_settings settings;
-- 	int ret = hostapd_parse_csa_settings(pos, &settings);
-- 
--+	if (!(wpa_s->ap_iface && wpa_s->ap_iface->bss[0]) &&
--+	    !(wpa_s->ifmsh && wpa_s->ifmsh->bss[0]))
--+		return -1;
--+
--+	ret = __ap_ctrl_iface_chanswitch(wpa_s->ap_iface, &settings);
-- 	if (ret)
-- 		return ret;
-- 
---	return ap_switch_channel(wpa_s, &settings);
--+	return __ap_ctrl_iface_chanswitch(wpa_s->ifmsh, &settings);
-- }
-- #endif /* CONFIG_CTRL_IFACE */
-- 
-diff --git a/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch b/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch
-deleted file mode 100644
-index 076950fe35..0000000000
---- a/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch
-+++ /dev/null
-@@ -1,54 +0,0 @@
----- a/src/drivers/driver_nl80211.c
--+++ b/src/drivers/driver_nl80211.c
--@@ -2803,10 +2803,15 @@ static int wpa_driver_nl80211_del_beacon
-- 	struct nl_msg *msg;
-- 	struct wpa_driver_nl80211_data *drv = bss->drv;
-- 
--+	if (!bss->beacon_set)
--+		return 0;
--+
--+	bss->beacon_set = 0;
--+
-- 	wpa_printf(MSG_DEBUG, "nl80211: Remove beacon (ifindex=%d)",
---		   drv->ifindex);
--+		   bss->ifindex);
-- 	nl80211_put_wiphy_data_ap(bss);
---	msg = nl80211_drv_msg(drv, 0, NL80211_CMD_DEL_BEACON);
--+	msg = nl80211_bss_msg(bss, 0, NL80211_CMD_DEL_BEACON);
-- 	return send_and_recv_msgs(drv, msg, NULL, NULL);
-- }
-- 
--@@ -5278,7 +5283,7 @@ static void nl80211_teardown_ap(struct i
-- 		nl80211_mgmt_unsubscribe(bss, "AP teardown");
-- 
-- 	nl80211_put_wiphy_data_ap(bss);
---	bss->beacon_set = 0;
--+	wpa_driver_nl80211_del_beacon(bss);
-- }
-- 
-- 
--@@ -7694,8 +7699,6 @@ static int wpa_driver_nl80211_if_remove(
-- 	} else {
-- 		wpa_printf(MSG_DEBUG, "nl80211: First BSS - reassign context");
-- 		nl80211_teardown_ap(bss);
---		if (!bss->added_if && !drv->first_bss->next)
---			wpa_driver_nl80211_del_beacon(bss);
-- 		nl80211_destroy_bss(bss);
-- 		if (!bss->added_if)
-- 			i802_set_iface_flags(bss, 0);
--@@ -8089,7 +8092,6 @@ static int wpa_driver_nl80211_deinit_ap(
-- 	if (!is_ap_interface(drv->nlmode))
-- 		return -1;
-- 	wpa_driver_nl80211_del_beacon(bss);
---	bss->beacon_set = 0;
-- 
-- 	/*
-- 	 * If the P2P GO interface was dynamically added, then it is
--@@ -8109,7 +8111,6 @@ static int wpa_driver_nl80211_stop_ap(vo
-- 	if (!is_ap_interface(drv->nlmode))
-- 		return -1;
-- 	wpa_driver_nl80211_del_beacon(bss);
---	bss->beacon_set = 0;
-- 	return 0;
-- }
-- 
-diff --git a/package/network/services/hostapd/patches/360-ctrl_iface_reload.patch b/package/network/services/hostapd/patches/360-ctrl_iface_reload.patch
-deleted file mode 100644
-index 31c5102cb1..0000000000
---- a/package/network/services/hostapd/patches/360-ctrl_iface_reload.patch
-+++ /dev/null
-@@ -1,106 +0,0 @@
----- a/hostapd/ctrl_iface.c
--+++ b/hostapd/ctrl_iface.c
--@@ -65,6 +65,7 @@
-- #include "fst/fst_ctrl_iface.h"
-- #include "config_file.h"
-- #include "ctrl_iface.h"
--+#include "config_file.h"
-- 
-- 
-- #define HOSTAPD_CLI_DUP_VALUE_MAX_LEN 256
--@@ -80,6 +81,7 @@ static void hostapd_ctrl_iface_send(stru
-- 				    enum wpa_msg_type type,
-- 				    const char *buf, size_t len);
-- 
--+static char *reload_opts = NULL;
-- 
-- static int hostapd_ctrl_iface_attach(struct hostapd_data *hapd,
-- 				     struct sockaddr_storage *from,
--@@ -131,6 +133,61 @@ static int hostapd_ctrl_iface_new_sta(st
-- 	return 0;
-- }
-- 
--+static char *get_option(char *opt, char *str)
--+{
--+	int len = strlen(str);
--+
--+	if (!strncmp(opt, str, len))
--+		return opt + len;
--+	else
--+		return NULL;
--+}
--+
--+static struct hostapd_config *hostapd_ctrl_iface_config_read(const char *fname)
--+{
--+	struct hostapd_config *conf;
--+	char *opt, *val;
--+
--+	conf = hostapd_config_read(fname);
--+	if (!conf)
--+		return NULL;
--+
--+	for (opt = strtok(reload_opts, " ");
--+	     opt;
--+		 opt = strtok(NULL, " ")) {
--+
--+		if ((val = get_option(opt, "channel=")))
--+			conf->channel = atoi(val);
--+		else if ((val = get_option(opt, "ht_capab=")))
--+			conf->ht_capab = atoi(val);
--+		else if ((val = get_option(opt, "ht_capab_mask=")))
--+			conf->ht_capab &= atoi(val);
--+		else if ((val = get_option(opt, "sec_chan=")))
--+			conf->secondary_channel = atoi(val);
--+		else if ((val = get_option(opt, "hw_mode=")))
--+			conf->hw_mode = atoi(val);
--+		else if ((val = get_option(opt, "ieee80211n=")))
--+			conf->ieee80211n = atoi(val);
--+		else
--+			break;
--+	}
--+
--+	return conf;
--+}
--+
--+static int hostapd_ctrl_iface_update(struct hostapd_data *hapd, char *txt)
--+{
--+	struct hostapd_config * (*config_read_cb)(const char *config_fname);
--+	struct hostapd_iface *iface = hapd->iface;
--+
--+	config_read_cb = iface->interfaces->config_read_cb;
--+	iface->interfaces->config_read_cb = hostapd_ctrl_iface_config_read;
--+	reload_opts = txt;
--+
--+	hostapd_reload_config(iface);
--+
--+	iface->interfaces->config_read_cb = config_read_cb;
--+}
-- 
-- #ifdef NEED_AP_MLME
-- static int hostapd_ctrl_iface_sa_query(struct hostapd_data *hapd,
--@@ -3546,6 +3603,8 @@ static int hostapd_ctrl_iface_receive_pr
-- 	} else if (os_strncmp(buf, "VENDOR ", 7) == 0) {
-- 		reply_len = hostapd_ctrl_iface_vendor(hapd, buf + 7, reply,
-- 						      reply_size);
--+	} else if (os_strncmp(buf, "UPDATE ", 7) == 0) {
--+		hostapd_ctrl_iface_update(hapd, buf + 7);
-- 	} else if (os_strcmp(buf, "ERP_FLUSH") == 0) {
-- 		ieee802_1x_erp_flush(hapd);
-- #ifdef RADIUS_SERVER
----- a/src/ap/ctrl_iface_ap.c
--+++ b/src/ap/ctrl_iface_ap.c
--@@ -917,7 +917,13 @@ int hostapd_parse_csa_settings(const cha
-- 
-- int hostapd_ctrl_iface_stop_ap(struct hostapd_data *hapd)
-- {
---	return hostapd_drv_stop_ap(hapd);
--+	struct hostapd_iface *iface = hapd->iface;
--+	int i;
--+
--+	for (i = 0; i < iface->num_bss; i++)
--+		hostapd_drv_stop_ap(iface->bss[i]);
--+
--+	return 0;
-- }
-- 
-- 
-diff --git a/package/network/services/hostapd/patches/370-ap_sta_support.patch b/package/network/services/hostapd/patches/370-ap_sta_support.patch
-deleted file mode 100644
-index 1c5f72ddc0..0000000000
---- a/package/network/services/hostapd/patches/370-ap_sta_support.patch
-+++ /dev/null
-@@ -1,403 +0,0 @@
----- a/wpa_supplicant/Makefile
--+++ b/wpa_supplicant/Makefile
--@@ -26,6 +26,10 @@ CFLAGS += $(EXTRA_CFLAGS)
-- CFLAGS += -I$(abspath ../src)
-- CFLAGS += -I$(abspath ../src/utils)
-- 
--+ifdef MULTICALL
--+CFLAGS += -DMULTICALL
--+endif
--+
-- -include .config
-- -include $(if $(MULTICALL),../hostapd/.config)
-- 
--@@ -118,6 +122,8 @@ OBJS_c += ../src/utils/common.o
-- OBJS_c += ../src/common/cli.o
-- OBJS += wmm_ac.o
-- 
--+OBJS += ../src/common/wpa_ctrl.o
--+
-- ifndef CONFIG_OS
-- ifdef CONFIG_NATIVE_WINDOWS
-- CONFIG_OS=win32
----- a/wpa_supplicant/bss.c
--+++ b/wpa_supplicant/bss.c
--@@ -11,6 +11,7 @@
-- #include "utils/common.h"
-- #include "utils/eloop.h"
-- #include "common/ieee802_11_defs.h"
--+#include "common/ieee802_11_common.h"
-- #include "drivers/driver.h"
-- #include "eap_peer/eap.h"
-- #include "wpa_supplicant_i.h"
--@@ -294,6 +295,10 @@ void calculate_update_time(const struct
-- static void wpa_bss_copy_res(struct wpa_bss *dst, struct wpa_scan_res *src,
-- 			     struct os_reltime *fetch_time)
-- {
--+	struct ieee80211_ht_capabilities *capab;
--+	struct ieee80211_ht_operation *oper;
--+	struct ieee802_11_elems elems;
--+
-- 	dst->flags = src->flags;
-- 	os_memcpy(dst->bssid, src->bssid, ETH_ALEN);
-- 	dst->freq = src->freq;
--@@ -306,6 +311,15 @@ static void wpa_bss_copy_res(struct wpa_
-- 	dst->est_throughput = src->est_throughput;
-- 	dst->snr = src->snr;
-- 
--+	memset(&elems, 0, sizeof(elems));
--+	ieee802_11_parse_elems((u8 *) (src + 1), src->ie_len, &elems, 0);
--+	capab = (struct ieee80211_ht_capabilities *) elems.ht_capabilities;
--+	oper = (struct ieee80211_ht_operation *) elems.ht_operation;
--+	if (capab)
--+		dst->ht_capab = le_to_host16(capab->ht_capabilities_info);
--+	if (oper)
--+		dst->ht_param = oper->ht_param;
--+
-- 	calculate_update_time(fetch_time, src->age, &dst->last_update);
-- }
-- 
----- a/wpa_supplicant/bss.h
--+++ b/wpa_supplicant/bss.h
--@@ -83,6 +83,10 @@ struct wpa_bss {
-- 	u8 ssid[SSID_MAX_LEN];
-- 	/** Length of SSID */
-- 	size_t ssid_len;
--+	/** HT capabilities */
--+	u16 ht_capab;
--+	/* Five octets of HT Operation Information */
--+	u8 ht_param;
-- 	/** Frequency of the channel in MHz (e.g., 2412 = channel 1) */
-- 	int freq;
-- 	/** Beacon interval in TUs (host byte order) */
----- a/wpa_supplicant/main.c
--+++ b/wpa_supplicant/main.c
--@@ -34,7 +34,7 @@ static void usage(void)
-- 	       "vW] [-P<pid file>] "
-- 	       "[-g<global ctrl>] \\\n"
-- 	       "        [-G<group>] \\\n"
---	       "        -i<ifname> -c<config file> [-C<ctrl>] [-D<driver>] "
--+	       "        -i<ifname> -c<config file> [-C<ctrl>] [-D<driver>] [-H<hostapd path>] "
-- 	       "[-p<driver_param>] \\\n"
-- 	       "        [-b<br_ifname>] [-e<entropy file>]"
-- #ifdef CONFIG_DEBUG_FILE
--@@ -74,6 +74,7 @@ static void usage(void)
-- 	       "  -g = global ctrl_interface\n"
-- 	       "  -G = global ctrl_interface group\n"
-- 	       "  -h = show this help text\n"
--+	       "  -H = connect to a hostapd instance to manage state changes\n"
-- 	       "  -i = interface name\n"
-- 	       "  -I = additional configuration file\n"
-- 	       "  -K = include keys (passwords, etc.) in debug output\n"
--@@ -201,7 +202,7 @@ int main(int argc, char *argv[])
-- 
-- 	for (;;) {
-- 		c = getopt(argc, argv,
---			   "b:Bc:C:D:de:f:g:G:hi:I:KLMm:No:O:p:P:qsTtuvW");
--+			   "b:Bc:C:D:de:f:g:G:hH:i:I:KLMm:No:O:p:P:qsTtuvW");
-- 		if (c < 0)
-- 			break;
-- 		switch (c) {
--@@ -248,6 +249,9 @@ int main(int argc, char *argv[])
-- 			usage();
-- 			exitcode = 0;
-- 			goto out;
--+		case 'H':
--+			iface->hostapd_ctrl = optarg;
--+			break;
-- 		case 'i':
-- 			iface->ifname = optarg;
-- 			break;
----- a/wpa_supplicant/wpa_supplicant.c
--+++ b/wpa_supplicant/wpa_supplicant.c
--@@ -129,6 +129,54 @@ static void wpas_update_fils_connect_par
-- static void wpas_update_owe_connect_params(struct wpa_supplicant *wpa_s);
-- #endif /* CONFIG_OWE */
-- 
--+static int hostapd_stop(struct wpa_supplicant *wpa_s)
--+{
--+	const char *cmd = "STOP_AP";
--+	char buf[256];
--+	size_t len = sizeof(buf);
--+
--+	if (wpa_ctrl_request(wpa_s->hostapd, cmd, os_strlen(cmd), buf, &len, NULL) < 0) {
--+		wpa_printf(MSG_ERROR, "\nFailed to stop hostapd AP interfaces\n");
--+		return -1;
--+	}
--+	return 0;
--+}
--+
--+static int hostapd_reload(struct wpa_supplicant *wpa_s, struct wpa_bss *bss)
--+{
--+	char *cmd = NULL;
--+	char buf[256];
--+	size_t len = sizeof(buf);
--+	enum hostapd_hw_mode hw_mode;
--+	u8 channel;
--+	int sec_chan = 0;
--+	int ret;
--+
--+	if (!bss)
--+		return -1;
--+
--+	if (bss->ht_param & HT_INFO_HT_PARAM_STA_CHNL_WIDTH) {
--+		int sec = bss->ht_param & HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK;
--+		if (sec == HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE)
--+			sec_chan = 1;
--+		else if (sec ==  HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW)
--+			sec_chan = -1;
--+	}
--+
--+	hw_mode = ieee80211_freq_to_chan(bss->freq, &channel);
--+	if (asprintf(&cmd, "UPDATE channel=%d sec_chan=%d hw_mode=%d",
--+		     channel, sec_chan, hw_mode) < 0)
--+		return -1;
--+
--+	ret = wpa_ctrl_request(wpa_s->hostapd, cmd, os_strlen(cmd), buf, &len, NULL);
--+	free(cmd);
--+
--+	if (ret < 0) {
--+		wpa_printf(MSG_ERROR, "\nFailed to reload hostapd AP interfaces\n");
--+		return -1;
--+	}
--+	return 0;
--+}
-- 
-- #ifdef CONFIG_WEP
-- /* Configure default/group WEP keys for static WEP */
--@@ -991,6 +1039,8 @@ void wpa_supplicant_set_state(struct wpa
-- 
-- 		sme_sched_obss_scan(wpa_s, 1);
-- 
--+		if (wpa_s->hostapd)
--+			hostapd_reload(wpa_s, wpa_s->current_bss);
-- #if defined(CONFIG_FILS) && defined(IEEE8021X_EAPOL)
-- 		if (!fils_hlp_sent && ssid && ssid->eap.erp)
-- 			update_fils_connect_params = true;
--@@ -1001,6 +1051,8 @@ void wpa_supplicant_set_state(struct wpa
-- #endif /* CONFIG_OWE */
-- 	} else if (state == WPA_DISCONNECTED || state == WPA_ASSOCIATING ||
-- 		   state == WPA_ASSOCIATED) {
--+		if (wpa_s->hostapd)
--+			hostapd_stop(wpa_s);
-- 		wpa_s->new_connection = 1;
-- 		wpa_drv_set_operstate(wpa_s, 0);
-- #ifndef IEEE8021X_EAPOL
--@@ -2225,6 +2277,8 @@ void wpa_supplicant_associate(struct wpa
-- 			return;
-- 		}
-- 		wpa_s->current_bss = bss;
--+		if (wpa_s->hostapd)
--+			hostapd_reload(wpa_s, wpa_s->current_bss);
-- #else /* CONFIG_MESH */
-- 		wpa_msg(wpa_s, MSG_ERROR,
-- 			"mesh mode support not included in the build");
--@@ -6207,6 +6261,16 @@ static int wpa_supplicant_init_iface(str
-- 			   sizeof(wpa_s->bridge_ifname));
-- 	}
-- 
--+	if (iface->hostapd_ctrl) {
--+		wpa_s->hostapd = wpa_ctrl_open(iface->hostapd_ctrl);
--+		if (!wpa_s->hostapd) {
--+			wpa_printf(MSG_ERROR, "\nFailed to connect to hostapd\n");
--+			return -1;
--+		}
--+		if (hostapd_stop(wpa_s) < 0)
--+			return -1;
--+	}
--+
-- 	/* RSNA Supplicant Key Management - INITIALIZE */
-- 	eapol_sm_notify_portEnabled(wpa_s->eapol, false);
-- 	eapol_sm_notify_portValid(wpa_s->eapol, false);
--@@ -6540,6 +6604,11 @@ static void wpa_supplicant_deinit_iface(
-- 	if (terminate)
-- 		wpa_msg(wpa_s, MSG_INFO, WPA_EVENT_TERMINATING);
-- 
--+	if (wpa_s->hostapd) {
--+		wpa_ctrl_close(wpa_s->hostapd);
--+		wpa_s->hostapd = NULL;
--+	}
--+
-- 	if (wpa_s->ctrl_iface) {
-- 		wpa_supplicant_ctrl_iface_deinit(wpa_s->ctrl_iface);
-- 		wpa_s->ctrl_iface = NULL;
----- a/wpa_supplicant/wpa_supplicant_i.h
--+++ b/wpa_supplicant/wpa_supplicant_i.h
--@@ -104,6 +104,11 @@ struct wpa_interface {
-- 	const char *ifname;
-- 
-- 	/**
--+	 * hostapd_ctrl - path to hostapd control socket for notification
--+	 */
--+	const char *hostapd_ctrl;
--+
--+	/**
-- 	 * bridge_ifname - Optional bridge interface name
-- 	 *
-- 	 * If the driver interface (ifname) is included in a Linux bridge
--@@ -530,6 +535,8 @@ struct wpa_supplicant {
-- #endif /* CONFIG_CTRL_IFACE_BINDER */
-- 	char bridge_ifname[16];
-- 
--+	struct wpa_ctrl *hostapd;
--+
-- 	char *confname;
-- 	char *confanother;
-- 
----- a/hostapd/ctrl_iface.c
--+++ b/hostapd/ctrl_iface.c
--@@ -2712,6 +2712,11 @@ static int hostapd_ctrl_iface_chan_switc
-- 		return 0;
-- 	}
-- 
--+	if (os_strstr(pos, " auto-ht")) {
--+		settings.freq_params.ht_enabled = iface->conf->ieee80211n;
--+		settings.freq_params.vht_enabled = iface->conf->ieee80211ac;
--+	}
--+
-- 	for (i = 0; i < iface->num_bss; i++) {
-- 
-- 		/* Save CHAN_SWITCH VHT config */
----- a/src/ap/beacon.c
--+++ b/src/ap/beacon.c
--@@ -1468,11 +1468,6 @@ int ieee802_11_set_beacon(struct hostapd
-- 	struct wpabuf *beacon, *proberesp, *assocresp;
-- 	int res, ret = -1;
-- 
---	if (hapd->csa_in_progress) {
---		wpa_printf(MSG_ERROR, "Cannot set beacons during CSA period");
---		return -1;
---	}
---
-- 	hapd->beacon_set_done = 1;
-- 
-- 	if (ieee802_11_build_ap_params(hapd, &params) < 0)
----- a/wpa_supplicant/events.c
--+++ b/wpa_supplicant/events.c
--@@ -4579,6 +4579,60 @@ static void wpas_event_unprot_beacon(str
-- }
-- 
-- 
--+static void
--+supplicant_ch_switch_started(struct wpa_supplicant *wpa_s,
--+			    union wpa_event_data *data)
--+{
--+	char buf[256];
--+	size_t len = sizeof(buf);
--+	char *cmd = NULL;
--+	int width = 20;
--+	int ret;
--+
--+	if (!wpa_s->hostapd)
--+		return;
--+
--+	wpa_msg(wpa_s, MSG_INFO, WPA_EVENT_CHANNEL_SWITCH
--+		"count=%d freq=%d ht_enabled=%d ch_offset=%d ch_width=%s cf1=%d cf2=%d",
--+		data->ch_switch.count,
--+		data->ch_switch.freq,
--+		data->ch_switch.ht_enabled,
--+		data->ch_switch.ch_offset,
--+		channel_width_to_string(data->ch_switch.ch_width),
--+		data->ch_switch.cf1,
--+		data->ch_switch.cf2);
--+
--+	switch (data->ch_switch.ch_width) {
--+	case CHAN_WIDTH_20_NOHT:
--+	case CHAN_WIDTH_20:
--+		width = 20;
--+		break;
--+	case CHAN_WIDTH_40:
--+		width = 40;
--+		break;
--+	case CHAN_WIDTH_80:
--+		width = 80;
--+		break;
--+	case CHAN_WIDTH_160:
--+	case CHAN_WIDTH_80P80:
--+		width = 160;
--+		break;
--+	}
--+
--+	asprintf(&cmd, "CHAN_SWITCH %d %d sec_channel_offset=%d center_freq1=%d center_freq2=%d, bandwidth=%d auto-ht\n",
--+		data->ch_switch.count - 1,
--+		data->ch_switch.freq,
--+		data->ch_switch.ch_offset,
--+		data->ch_switch.cf1,
--+		data->ch_switch.cf2,
--+		width);
--+	ret = wpa_ctrl_request(wpa_s->hostapd, cmd, os_strlen(cmd), buf, &len, NULL);
--+	free(cmd);
--+
--+	if (ret < 0)
--+		wpa_printf(MSG_ERROR, "\nFailed to reload hostapd AP interfaces\n");
--+}
--+
-- void supplicant_event(void *ctx, enum wpa_event_type event,
-- 		      union wpa_event_data *data)
-- {
--@@ -4881,8 +4935,10 @@ void supplicant_event(void *ctx, enum wp
-- 			channel_width_to_string(data->ch_switch.ch_width),
-- 			data->ch_switch.cf1,
-- 			data->ch_switch.cf2);
---		if (event == EVENT_CH_SWITCH_STARTED)
--+		if (event == EVENT_CH_SWITCH_STARTED) {
--+			supplicant_ch_switch_started(wpa_s, data);
-- 			break;
--+		}
-- 
-- 		wpa_s->assoc_freq = data->ch_switch.freq;
-- 		wpa_s->current_ssid->frequency = data->ch_switch.freq;
----- a/src/drivers/driver.h
--+++ b/src/drivers/driver.h
--@@ -5690,6 +5690,7 @@ union wpa_event_data {
-- 
-- 	/**
-- 	 * struct ch_switch
--+	 * @count: Count until channel switch activates
-- 	 * @freq: Frequency of new channel in MHz
-- 	 * @ht_enabled: Whether this is an HT channel
-- 	 * @ch_offset: Secondary channel offset
--@@ -5698,6 +5699,7 @@ union wpa_event_data {
-- 	 * @cf2: Center frequency 2
-- 	 */
-- 	struct ch_switch {
--+		int count;
-- 		int freq;
-- 		int ht_enabled;
-- 		int ch_offset;
----- a/src/drivers/driver_nl80211_event.c
--+++ b/src/drivers/driver_nl80211_event.c
--@@ -541,7 +541,7 @@ static void mlme_event_ch_switch(struct
-- 				 struct nlattr *ifindex, struct nlattr *freq,
-- 				 struct nlattr *type, struct nlattr *bw,
-- 				 struct nlattr *cf1, struct nlattr *cf2,
---				 int finished)
--+				 struct nlattr *count, int finished)
-- {
-- 	struct i802_bss *bss;
-- 	union wpa_event_data data;
--@@ -600,6 +600,8 @@ static void mlme_event_ch_switch(struct
-- 		data.ch_switch.cf1 = nla_get_u32(cf1);
-- 	if (cf2)
-- 		data.ch_switch.cf2 = nla_get_u32(cf2);
--+	if (count)
--+		data.ch_switch.count = nla_get_u32(count);
-- 
-- 	if (finished)
-- 		bss->freq = data.ch_switch.freq;
--@@ -2686,6 +2688,7 @@ static void do_process_drv_event(struct
-- 				     tb[NL80211_ATTR_CHANNEL_WIDTH],
-- 				     tb[NL80211_ATTR_CENTER_FREQ1],
-- 				     tb[NL80211_ATTR_CENTER_FREQ2],
--+				     tb[NL80211_ATTR_CH_SWITCH_COUNT],
-- 				     0);
-- 		break;
-- 	case NL80211_CMD_CH_SWITCH_NOTIFY:
--@@ -2696,6 +2699,7 @@ static void do_process_drv_event(struct
-- 				     tb[NL80211_ATTR_CHANNEL_WIDTH],
-- 				     tb[NL80211_ATTR_CENTER_FREQ1],
-- 				     tb[NL80211_ATTR_CENTER_FREQ2],
--+				     NULL,
-- 				     1);
-- 		break;
-- 	case NL80211_CMD_DISCONNECT:
-diff --git a/package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch b/package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch
-deleted file mode 100644
-index b98b2d0cba..0000000000
---- a/package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch
-+++ /dev/null
-@@ -1,193 +0,0 @@
----- a/hostapd/Makefile
--+++ b/hostapd/Makefile
--@@ -226,6 +226,9 @@ endif
-- ifdef CONFIG_NO_CTRL_IFACE
-- CFLAGS += -DCONFIG_NO_CTRL_IFACE
-- else
--+ifdef CONFIG_CTRL_IFACE_MIB
--+CFLAGS += -DCONFIG_CTRL_IFACE_MIB
--+endif
-- ifeq ($(CONFIG_CTRL_IFACE), udp)
-- CFLAGS += -DCONFIG_CTRL_IFACE_UDP
-- else
----- a/hostapd/ctrl_iface.c
--+++ b/hostapd/ctrl_iface.c
--@@ -3370,6 +3370,7 @@ static int hostapd_ctrl_iface_receive_pr
-- 						      reply_size);
-- 	} else if (os_strcmp(buf, "STATUS-DRIVER") == 0) {
-- 		reply_len = hostapd_drv_status(hapd, reply, reply_size);
--+#ifdef CONFIG_CTRL_IFACE_MIB
-- 	} else if (os_strcmp(buf, "MIB") == 0) {
-- 		reply_len = ieee802_11_get_mib(hapd, reply, reply_size);
-- 		if (reply_len >= 0) {
--@@ -3411,6 +3412,7 @@ static int hostapd_ctrl_iface_receive_pr
-- 	} else if (os_strncmp(buf, "STA-NEXT ", 9) == 0) {
-- 		reply_len = hostapd_ctrl_iface_sta_next(hapd, buf + 9, reply,
-- 							reply_size);
--+#endif
-- 	} else if (os_strcmp(buf, "ATTACH") == 0) {
-- 		if (hostapd_ctrl_iface_attach(hapd, from, fromlen, NULL))
-- 			reply_len = -1;
----- a/wpa_supplicant/Makefile
--+++ b/wpa_supplicant/Makefile
--@@ -952,6 +952,9 @@ ifdef CONFIG_FILS
-- OBJS += ../src/ap/fils_hlp.o
-- endif
-- ifdef CONFIG_CTRL_IFACE
--+ifdef CONFIG_CTRL_IFACE_MIB
--+CFLAGS += -DCONFIG_CTRL_IFACE_MIB
--+endif
-- OBJS += ../src/ap/ctrl_iface_ap.o
-- endif
-- 
----- a/wpa_supplicant/ctrl_iface.c
--+++ b/wpa_supplicant/ctrl_iface.c
--@@ -2267,7 +2267,7 @@ static int wpa_supplicant_ctrl_iface_sta
-- 			pos += ret;
-- 		}
-- 
---#ifdef CONFIG_AP
--+#if defined(CONFIG_AP) && defined(CONFIG_CTRL_IFACE_MIB)
-- 		if (wpa_s->ap_iface) {
-- 			pos += ap_ctrl_iface_wpa_get_status(wpa_s, pos,
-- 							    end - pos,
--@@ -10366,6 +10366,7 @@ char * wpa_supplicant_ctrl_iface_process
-- 			reply_len = -1;
-- 	} else if (os_strncmp(buf, "NOTE ", 5) == 0) {
-- 		wpa_printf(MSG_INFO, "NOTE: %s", buf + 5);
--+#ifdef CONFIG_CTRL_IFACE_MIB
-- 	} else if (os_strcmp(buf, "MIB") == 0) {
-- 		reply_len = wpa_sm_get_mib(wpa_s->wpa, reply, reply_size);
-- 		if (reply_len >= 0) {
--@@ -10378,6 +10379,7 @@ char * wpa_supplicant_ctrl_iface_process
-- 				reply_size - reply_len);
-- #endif /* CONFIG_MACSEC */
-- 		}
--+#endif
-- 	} else if (os_strncmp(buf, "STATUS", 6) == 0) {
-- 		reply_len = wpa_supplicant_ctrl_iface_status(
-- 			wpa_s, buf + 6, reply, reply_size);
--@@ -10862,6 +10864,7 @@ char * wpa_supplicant_ctrl_iface_process
-- 		reply_len = wpa_supplicant_ctrl_iface_bss(
-- 			wpa_s, buf + 4, reply, reply_size);
-- #ifdef CONFIG_AP
--+#ifdef CONFIG_CTRL_IFACE_MIB
-- 	} else if (os_strcmp(buf, "STA-FIRST") == 0) {
-- 		reply_len = ap_ctrl_iface_sta_first(wpa_s, reply, reply_size);
-- 	} else if (os_strncmp(buf, "STA ", 4) == 0) {
--@@ -10870,12 +10873,15 @@ char * wpa_supplicant_ctrl_iface_process
-- 	} else if (os_strncmp(buf, "STA-NEXT ", 9) == 0) {
-- 		reply_len = ap_ctrl_iface_sta_next(wpa_s, buf + 9, reply,
-- 						   reply_size);
--+#endif
--+#ifdef CONFIG_CTRL_IFACE_MIB
-- 	} else if (os_strncmp(buf, "DEAUTHENTICATE ", 15) == 0) {
-- 		if (ap_ctrl_iface_sta_deauthenticate(wpa_s, buf + 15))
-- 			reply_len = -1;
-- 	} else if (os_strncmp(buf, "DISASSOCIATE ", 13) == 0) {
-- 		if (ap_ctrl_iface_sta_disassociate(wpa_s, buf + 13))
-- 			reply_len = -1;
--+#endif
-- 	} else if (os_strncmp(buf, "CHAN_SWITCH ", 12) == 0) {
-- 		if (ap_ctrl_iface_chanswitch(wpa_s, buf + 12))
-- 			reply_len = -1;
----- a/src/ap/ctrl_iface_ap.c
--+++ b/src/ap/ctrl_iface_ap.c
--@@ -25,6 +25,7 @@
-- #include "mbo_ap.h"
-- #include "taxonomy.h"
-- 
--+#ifdef CONFIG_CTRL_IFACE_MIB
-- 
-- static size_t hostapd_write_ht_mcs_bitmask(char *buf, size_t buflen,
-- 					   size_t curr_len, const u8 *mcs_set)
--@@ -451,6 +452,7 @@ int hostapd_ctrl_iface_sta_next(struct h
-- 	return hostapd_ctrl_iface_sta_mib(hapd, sta->next, buf, buflen);
-- }
-- 
--+#endif
-- 
-- #ifdef CONFIG_P2P_MANAGER
-- static int p2p_manager_disconnect(struct hostapd_data *hapd, u16 stype,
--@@ -806,12 +808,12 @@ int hostapd_ctrl_iface_status(struct hos
-- 			return len;
-- 		len += ret;
-- 	}
---
--+#ifdef CONFIG_CTRL_IFACE_MIB
-- 	if (iface->conf->ieee80211n && !hapd->conf->disable_11n && mode) {
-- 		len = hostapd_write_ht_mcs_bitmask(buf, buflen, len,
-- 						   mode->mcs_set);
-- 	}
---
--+#endif /* CONFIG_CTRL_IFACE_MIB */
-- 	if (iface->current_rates && iface->num_rates) {
-- 		ret = os_snprintf(buf + len, buflen - len, "supported_rates=");
-- 		if (os_snprintf_error(buflen - len, ret))
----- a/src/ap/ieee802_1x.c
--+++ b/src/ap/ieee802_1x.c
--@@ -2711,6 +2711,7 @@ static const char * bool_txt(bool val)
-- 	return val ? "TRUE" : "FALSE";
-- }
-- 
--+#ifdef CONFIG_CTRL_IFACE_MIB
-- 
-- int ieee802_1x_get_mib(struct hostapd_data *hapd, char *buf, size_t buflen)
-- {
--@@ -2897,6 +2898,7 @@ int ieee802_1x_get_mib_sta(struct hostap
-- 	return len;
-- }
-- 
--+#endif
-- 
-- #ifdef CONFIG_HS20
-- static void ieee802_1x_wnm_notif_send(void *eloop_ctx, void *timeout_ctx)
----- a/src/ap/wpa_auth.c
--+++ b/src/ap/wpa_auth.c
--@@ -4451,6 +4451,7 @@ static const char * wpa_bool_txt(int val
-- 	return val ? "TRUE" : "FALSE";
-- }
-- 
--+#ifdef CONFIG_CTRL_IFACE_MIB
-- 
-- #define RSN_SUITE "%02x-%02x-%02x-%d"
-- #define RSN_SUITE_ARG(s) \
--@@ -4601,7 +4602,7 @@ int wpa_get_mib_sta(struct wpa_state_mac
-- 
-- 	return len;
-- }
---
--+#endif
-- 
-- void wpa_auth_countermeasures_start(struct wpa_authenticator *wpa_auth)
-- {
----- a/src/rsn_supp/wpa.c
--+++ b/src/rsn_supp/wpa.c
--@@ -2728,6 +2728,8 @@ static u32 wpa_key_mgmt_suite(struct wpa
-- }
-- 
-- 
--+#ifdef CONFIG_CTRL_IFACE_MIB
--+
-- #define RSN_SUITE "%02x-%02x-%02x-%d"
-- #define RSN_SUITE_ARG(s) \
-- ((s) >> 24) & 0xff, ((s) >> 16) & 0xff, ((s) >> 8) & 0xff, (s) & 0xff
--@@ -2809,6 +2811,7 @@ int wpa_sm_get_mib(struct wpa_sm *sm, ch
-- 
-- 	return (int) len;
-- }
--+#endif
-- #endif /* CONFIG_CTRL_IFACE */
-- 
-- 
----- a/wpa_supplicant/ap.c
--+++ b/wpa_supplicant/ap.c
--@@ -1324,7 +1324,7 @@ int wpas_ap_wps_nfc_report_handover(stru
-- #endif /* CONFIG_WPS */
-- 
-- 
---#ifdef CONFIG_CTRL_IFACE
--+#if defined(CONFIG_CTRL_IFACE) && defined(CONFIG_CTRL_IFACE_MIB)
-- 
-- int ap_ctrl_iface_sta_first(struct wpa_supplicant *wpa_s,
-- 			    char *buf, size_t buflen)
-diff --git a/package/network/services/hostapd/patches/381-hostapd_cli_UNKNOWN-COMMAND.patch b/package/network/services/hostapd/patches/381-hostapd_cli_UNKNOWN-COMMAND.patch
-deleted file mode 100644
-index d2414faf01..0000000000
---- a/package/network/services/hostapd/patches/381-hostapd_cli_UNKNOWN-COMMAND.patch
-+++ /dev/null
-@@ -1,11 +0,0 @@
----- a/hostapd/hostapd_cli.c
--+++ b/hostapd/hostapd_cli.c
--@@ -744,7 +744,7 @@ static int wpa_ctrl_command_sta(struct w
-- 	}
-- 
-- 	buf[len] = '\0';
---	if (memcmp(buf, "FAIL", 4) == 0)
--+	if (memcmp(buf, "FAIL", 4) == 0 || memcmp(buf, "UNKNOWN COMMAND", 15) == 0)
-- 		return -1;
-- 	if (print)
-- 		printf("%s", buf);
-diff --git a/package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch b/package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch
-deleted file mode 100644
-index 9dee2d738e..0000000000
---- a/package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch
-+++ /dev/null
-@@ -1,56 +0,0 @@
----- a/src/common/wpa_common.c
--+++ b/src/common/wpa_common.c
--@@ -2121,6 +2121,31 @@ u32 wpa_akm_to_suite(int akm)
-- }
-- 
-- 
--+static void wpa_fixup_wpa_ie_rsn(u8 *assoc_ie, const u8 *wpa_msg_ie,
--+				 size_t rsn_ie_len)
--+{
--+	int pos, count;
--+
--+	pos = sizeof(struct rsn_ie_hdr) + RSN_SELECTOR_LEN;
--+	if (rsn_ie_len < pos + 2)
--+		return;
--+
--+	count = WPA_GET_LE16(wpa_msg_ie + pos);
--+	pos += 2 + count * RSN_SELECTOR_LEN;
--+	if (rsn_ie_len < pos + 2)
--+		return;
--+
--+	count = WPA_GET_LE16(wpa_msg_ie + pos);
--+	pos += 2 + count * RSN_SELECTOR_LEN;
--+	if (rsn_ie_len < pos + 2)
--+		return;
--+
--+	if (!assoc_ie[pos] && !assoc_ie[pos + 1] &&
--+	    (wpa_msg_ie[pos] || wpa_msg_ie[pos + 1]))
--+		memcpy(&assoc_ie[pos], &wpa_msg_ie[pos], 2);
--+}
--+
--+
-- int wpa_compare_rsn_ie(int ft_initial_assoc,
-- 		       const u8 *ie1, size_t ie1len,
-- 		       const u8 *ie2, size_t ie2len)
--@@ -2128,8 +2153,19 @@ int wpa_compare_rsn_ie(int ft_initial_as
-- 	if (ie1 == NULL || ie2 == NULL)
-- 		return -1;
-- 
---	if (ie1len == ie2len && os_memcmp(ie1, ie2, ie1len) == 0)
---		return 0; /* identical IEs */
--+	if (ie1len == ie2len) {
--+		u8 *ie_tmp;
--+
--+		if (os_memcmp(ie1, ie2, ie1len) == 0)
--+			return 0; /* identical IEs */
--+
--+		ie_tmp = alloca(ie1len);
--+		memcpy(ie_tmp, ie1, ie1len);
--+		wpa_fixup_wpa_ie_rsn(ie_tmp, ie2, ie1len);
--+
--+		if (os_memcmp(ie_tmp, ie2, ie1len) == 0)
--+			return 0; /* only mismatch in RSN capabilties */
--+	}
-- 
-- #ifdef CONFIG_IEEE80211R
-- 	if (ft_initial_assoc) {
-diff --git a/package/network/services/hostapd/patches/400-wps_single_auth_enc_type.patch b/package/network/services/hostapd/patches/400-wps_single_auth_enc_type.patch
-deleted file mode 100644
-index 73a8c7694d..0000000000
---- a/package/network/services/hostapd/patches/400-wps_single_auth_enc_type.patch
-+++ /dev/null
-@@ -1,23 +0,0 @@
----- a/src/ap/wps_hostapd.c
--+++ b/src/ap/wps_hostapd.c
--@@ -394,9 +394,8 @@ static int hapd_wps_reconfig_in_memory(s
-- 				bss->wpa_pairwise |= WPA_CIPHER_GCMP;
-- 			else
-- 				bss->wpa_pairwise |= WPA_CIPHER_CCMP;
---		}
-- #ifndef CONFIG_NO_TKIP
---		if (cred->encr_type & WPS_ENCR_TKIP)
--+		} else if (cred->encr_type & WPS_ENCR_TKIP)
-- 			bss->wpa_pairwise |= WPA_CIPHER_TKIP;
-- #endif /* CONFIG_NO_TKIP */
-- 		bss->rsn_pairwise = bss->wpa_pairwise;
--@@ -1178,8 +1177,7 @@ int hostapd_init_wps(struct hostapd_data
-- 					  WPA_CIPHER_GCMP_256)) {
-- 			wps->encr_types |= WPS_ENCR_AES;
-- 			wps->encr_types_rsn |= WPS_ENCR_AES;
---		}
---		if (conf->rsn_pairwise & WPA_CIPHER_TKIP) {
--+		} else if (conf->rsn_pairwise & WPA_CIPHER_TKIP) {
-- #ifdef CONFIG_NO_TKIP
-- 			wpa_printf(MSG_INFO, "WPS: TKIP not supported");
-- 			goto fail;
-diff --git a/package/network/services/hostapd/patches/410-limit_debug_messages.patch b/package/network/services/hostapd/patches/410-limit_debug_messages.patch
-deleted file mode 100644
-index d2713fc29b..0000000000
---- a/package/network/services/hostapd/patches/410-limit_debug_messages.patch
-+++ /dev/null
-@@ -1,210 +0,0 @@
----- a/src/utils/wpa_debug.c
--+++ b/src/utils/wpa_debug.c
--@@ -206,7 +206,7 @@ void wpa_debug_close_linux_tracing(void)
--  *
--  * Note: New line '\n' is added to the end of the text when printing to stdout.
--  */
---void wpa_printf(int level, const char *fmt, ...)
--+void _wpa_printf(int level, const char *fmt, ...)
-- {
-- 	va_list ap;
-- 
--@@ -255,7 +255,7 @@ void wpa_printf(int level, const char *f
-- }
-- 
-- 
---static void _wpa_hexdump(int level, const char *title, const u8 *buf,
--+void _wpa_hexdump(int level, const char *title, const u8 *buf,
-- 			 size_t len, int show, int only_syslog)
-- {
-- 	size_t i;
--@@ -382,19 +382,7 @@ static void _wpa_hexdump(int level, cons
-- #endif /* CONFIG_ANDROID_LOG */
-- }
-- 
---void wpa_hexdump(int level, const char *title, const void *buf, size_t len)
---{
---	_wpa_hexdump(level, title, buf, len, 1, 0);
---}
---
---
---void wpa_hexdump_key(int level, const char *title, const void *buf, size_t len)
---{
---	_wpa_hexdump(level, title, buf, len, wpa_debug_show_keys, 0);
---}
---
---
---static void _wpa_hexdump_ascii(int level, const char *title, const void *buf,
--+void _wpa_hexdump_ascii(int level, const char *title, const void *buf,
-- 			       size_t len, int show)
-- {
-- 	size_t i, llen;
--@@ -507,20 +495,6 @@ file_done:
-- }
-- 
-- 
---void wpa_hexdump_ascii(int level, const char *title, const void *buf,
---		       size_t len)
---{
---	_wpa_hexdump_ascii(level, title, buf, len, 1);
---}
---
---
---void wpa_hexdump_ascii_key(int level, const char *title, const void *buf,
---			   size_t len)
---{
---	_wpa_hexdump_ascii(level, title, buf, len, wpa_debug_show_keys);
---}
---
---
-- #ifdef CONFIG_DEBUG_FILE
-- static char *last_path = NULL;
-- #endif /* CONFIG_DEBUG_FILE */
--@@ -636,7 +610,7 @@ void wpa_msg_register_ifname_cb(wpa_msg_
-- }
-- 
-- 
---void wpa_msg(void *ctx, int level, const char *fmt, ...)
--+void _wpa_msg(void *ctx, int level, const char *fmt, ...)
-- {
-- 	va_list ap;
-- 	char *buf;
--@@ -674,7 +648,7 @@ void wpa_msg(void *ctx, int level, const
-- }
-- 
-- 
---void wpa_msg_ctrl(void *ctx, int level, const char *fmt, ...)
--+void _wpa_msg_ctrl(void *ctx, int level, const char *fmt, ...)
-- {
-- 	va_list ap;
-- 	char *buf;
----- a/src/utils/wpa_debug.h
--+++ b/src/utils/wpa_debug.h
--@@ -50,6 +50,17 @@ int wpa_debug_reopen_file(void);
-- void wpa_debug_close_file(void);
-- void wpa_debug_setup_stdout(void);
-- 
--+/* internal */
--+void _wpa_hexdump(int level, const char *title, const u8 *buf,
--+		  size_t len, int show, int only_syslog);
--+void _wpa_hexdump_ascii(int level, const char *title, const void *buf,
--+			size_t len, int show);
--+extern int wpa_debug_show_keys;
--+
--+#ifndef CONFIG_MSG_MIN_PRIORITY
--+#define CONFIG_MSG_MIN_PRIORITY 0
--+#endif
--+
-- /**
--  * wpa_debug_printf_timestamp - Print timestamp for debug output
--  *
--@@ -70,9 +81,15 @@ void wpa_debug_print_timestamp(void);
--  *
--  * Note: New line '\n' is added to the end of the text when printing to stdout.
--  */
---void wpa_printf(int level, const char *fmt, ...)
--+void _wpa_printf(int level, const char *fmt, ...)
-- PRINTF_FORMAT(2, 3);
-- 
--+#define wpa_printf(level, ...)						\
--+	do {								\
--+		if (level >= CONFIG_MSG_MIN_PRIORITY)			\
--+			_wpa_printf(level, __VA_ARGS__);		\
--+	} while(0)
--+
-- /**
--  * wpa_hexdump - conditional hex dump
--  * @level: priority level (MSG_*) of the message
--@@ -84,7 +101,13 @@ PRINTF_FORMAT(2, 3);
--  * output may be directed to stdout, stderr, and/or syslog based on
--  * configuration. The contents of buf is printed out has hex dump.
--  */
---void wpa_hexdump(int level, const char *title, const void *buf, size_t len);
--+static inline void wpa_hexdump(int level, const char *title, const void *buf, size_t len)
--+{
--+	if (level < CONFIG_MSG_MIN_PRIORITY)
--+		return;
--+
--+	_wpa_hexdump(level, title, buf, len, 1, 1);
--+}
-- 
-- static inline void wpa_hexdump_buf(int level, const char *title,
-- 				   const struct wpabuf *buf)
--@@ -106,7 +129,13 @@ static inline void wpa_hexdump_buf(int l
--  * like wpa_hexdump(), but by default, does not include secret keys (passwords,
--  * etc.) in debug output.
--  */
---void wpa_hexdump_key(int level, const char *title, const void *buf, size_t len);
--+static inline void wpa_hexdump_key(int level, const char *title, const u8 *buf, size_t len)
--+{
--+	if (level < CONFIG_MSG_MIN_PRIORITY)
--+		return;
--+
--+	_wpa_hexdump(level, title, buf, len, wpa_debug_show_keys, 1);
--+}
-- 
-- static inline void wpa_hexdump_buf_key(int level, const char *title,
-- 				       const struct wpabuf *buf)
--@@ -128,8 +157,14 @@ static inline void wpa_hexdump_buf_key(i
--  * the hex numbers and ASCII characters (for printable range) are shown. 16
--  * bytes per line will be shown.
--  */
---void wpa_hexdump_ascii(int level, const char *title, const void *buf,
---		       size_t len);
--+static inline void wpa_hexdump_ascii(int level, const char *title,
--+				     const u8 *buf, size_t len)
--+{
--+	if (level < CONFIG_MSG_MIN_PRIORITY)
--+		return;
--+
--+	_wpa_hexdump_ascii(level, title, buf, len, 1);
--+}
-- 
-- /**
--  * wpa_hexdump_ascii_key - conditional hex dump, hide keys
--@@ -145,8 +180,14 @@ void wpa_hexdump_ascii(int level, const
--  * bytes per line will be shown. This works like wpa_hexdump_ascii(), but by
--  * default, does not include secret keys (passwords, etc.) in debug output.
--  */
---void wpa_hexdump_ascii_key(int level, const char *title, const void *buf,
---			   size_t len);
--+static inline void wpa_hexdump_ascii_key(int level, const char *title,
--+					 const u8 *buf, size_t len)
--+{
--+	if (level < CONFIG_MSG_MIN_PRIORITY)
--+		return;
--+
--+	_wpa_hexdump_ascii(level, title, buf, len, wpa_debug_show_keys);
--+}
-- 
-- /*
--  * wpa_dbg() behaves like wpa_msg(), but it can be removed from build to reduce
--@@ -183,7 +224,12 @@ void wpa_hexdump_ascii_key(int level, co
--  *
--  * Note: New line '\n' is added to the end of the text when printing to stdout.
--  */
---void wpa_msg(void *ctx, int level, const char *fmt, ...) PRINTF_FORMAT(3, 4);
--+void _wpa_msg(void *ctx, int level, const char *fmt, ...) PRINTF_FORMAT(3, 4);
--+#define wpa_msg(ctx, level, ...)					\
--+	do {								\
--+		if (level >= CONFIG_MSG_MIN_PRIORITY)			\
--+			_wpa_msg(ctx, level, __VA_ARGS__);		\
--+	} while(0)
-- 
-- /**
--  * wpa_msg_ctrl - Conditional printf for ctrl_iface monitors
--@@ -197,8 +243,13 @@ void wpa_msg(void *ctx, int level, const
--  * attached ctrl_iface monitors. In other words, it can be used for frequent
--  * events that do not need to be sent to syslog.
--  */
---void wpa_msg_ctrl(void *ctx, int level, const char *fmt, ...)
--+void _wpa_msg_ctrl(void *ctx, int level, const char *fmt, ...)
-- PRINTF_FORMAT(3, 4);
--+#define wpa_msg_ctrl(ctx, level, ...)					\
--+	do {								\
--+		if (level >= CONFIG_MSG_MIN_PRIORITY)			\
--+			_wpa_msg_ctrl(ctx, level, __VA_ARGS__);		\
--+	} while(0)
-- 
-- /**
--  * wpa_msg_global - Global printf for ctrl_iface monitors
-diff --git a/package/network/services/hostapd/patches/420-indicate-features.patch b/package/network/services/hostapd/patches/420-indicate-features.patch
-deleted file mode 100644
-index 9f216347f4..0000000000
---- a/package/network/services/hostapd/patches/420-indicate-features.patch
-+++ /dev/null
-@@ -1,62 +0,0 @@
----- a/hostapd/main.c
--+++ b/hostapd/main.c
--@@ -15,6 +15,7 @@
-- #include "utils/common.h"
-- #include "utils/eloop.h"
-- #include "utils/uuid.h"
--+#include "utils/build_features.h"
-- #include "crypto/random.h"
-- #include "crypto/tls.h"
-- #include "common/version.h"
--@@ -692,7 +693,7 @@ int main(int argc, char *argv[])
-- 	wpa_supplicant_event = hostapd_wpa_event;
-- 	wpa_supplicant_event_global = hostapd_wpa_event_global;
-- 	for (;;) {
---		c = getopt(argc, argv, "b:Bde:f:hi:KP:sSTtu:vg:G:");
--+		c = getopt(argc, argv, "b:Bde:f:hi:KP:sSTtu:g:G:v::");
-- 		if (c < 0)
-- 			break;
-- 		switch (c) {
--@@ -729,6 +730,8 @@ int main(int argc, char *argv[])
-- 			break;
-- #endif /* CONFIG_DEBUG_LINUX_TRACING */
-- 		case 'v':
--+			if (optarg)
--+				exit(!has_feature(optarg));
-- 			show_version();
-- 			exit(1);
-- 			break;
----- a/wpa_supplicant/main.c
--+++ b/wpa_supplicant/main.c
--@@ -12,6 +12,7 @@
-- #endif /* __linux__ */
-- 
-- #include "common.h"
--+#include "build_features.h"
-- #include "fst/fst.h"
-- #include "wpa_supplicant_i.h"
-- #include "driver_i.h"
--@@ -202,7 +203,7 @@ int main(int argc, char *argv[])
-- 
-- 	for (;;) {
-- 		c = getopt(argc, argv,
---			   "b:Bc:C:D:de:f:g:G:hH:i:I:KLMm:No:O:p:P:qsTtuvW");
--+			   "b:Bc:C:D:de:f:g:G:hH:i:I:KLMm:No:O:p:P:qsTtuv::W");
-- 		if (c < 0)
-- 			break;
-- 		switch (c) {
--@@ -305,8 +306,12 @@ int main(int argc, char *argv[])
-- 			break;
-- #endif /* CONFIG_CTRL_IFACE_DBUS_NEW */
-- 		case 'v':
---			printf("%s\n", wpa_supplicant_version);
---			exitcode = 0;
--+			if (optarg) {
--+				exitcode = !has_feature(optarg);
--+			} else {
--+				printf("%s\n", wpa_supplicant_version);
--+				exitcode = 0;
--+			}
-- 			goto out;
-- 		case 'W':
-- 			params.wait_for_monitor++;
-diff --git a/package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch b/package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch
-deleted file mode 100644
-index 3744464c89..0000000000
---- a/package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch
-+++ /dev/null
-@@ -1,56 +0,0 @@
----- a/hostapd/hostapd_cli.c
--+++ b/hostapd/hostapd_cli.c
--@@ -388,7 +388,6 @@ static int hostapd_cli_cmd_disassociate(
-- }
-- 
-- 
---#ifdef CONFIG_TAXONOMY
-- static int hostapd_cli_cmd_signature(struct wpa_ctrl *ctrl, int argc,
-- 				     char *argv[])
-- {
--@@ -401,7 +400,6 @@ static int hostapd_cli_cmd_signature(str
-- 	os_snprintf(buf, sizeof(buf), "SIGNATURE %s", argv[0]);
-- 	return wpa_ctrl_command(ctrl, buf);
-- }
---#endif /* CONFIG_TAXONOMY */
-- 
-- 
-- static int hostapd_cli_cmd_sa_query(struct wpa_ctrl *ctrl, int argc,
--@@ -418,7 +416,6 @@ static int hostapd_cli_cmd_sa_query(stru
-- }
-- 
-- 
---#ifdef CONFIG_WPS
-- static int hostapd_cli_cmd_wps_pin(struct wpa_ctrl *ctrl, int argc,
-- 				   char *argv[])
-- {
--@@ -644,7 +641,6 @@ static int hostapd_cli_cmd_wps_config(st
-- 			 ssid_hex, argv[1]);
-- 	return wpa_ctrl_command(ctrl, buf);
-- }
---#endif /* CONFIG_WPS */
-- 
-- 
-- static int hostapd_cli_cmd_disassoc_imminent(struct wpa_ctrl *ctrl, int argc,
--@@ -1532,13 +1528,10 @@ static const struct hostapd_cli_cmd host
-- 	{ "disassociate", hostapd_cli_cmd_disassociate,
-- 	  hostapd_complete_stations,
-- 	  "<addr> = disassociate a station" },
---#ifdef CONFIG_TAXONOMY
-- 	{ "signature", hostapd_cli_cmd_signature, hostapd_complete_stations,
-- 	  "<addr> = get taxonomy signature for a station" },
---#endif /* CONFIG_TAXONOMY */
-- 	{ "sa_query", hostapd_cli_cmd_sa_query, hostapd_complete_stations,
-- 	  "<addr> = send SA Query to a station" },
---#ifdef CONFIG_WPS
-- 	{ "wps_pin", hostapd_cli_cmd_wps_pin, NULL,
-- 	  "<uuid> <pin> [timeout] [addr] = add WPS Enrollee PIN" },
-- 	{ "wps_check_pin", hostapd_cli_cmd_wps_check_pin, NULL,
--@@ -1563,7 +1556,6 @@ static const struct hostapd_cli_cmd host
-- 	  "<SSID> <auth> <encr> <key> = configure AP" },
-- 	{ "wps_get_status", hostapd_cli_cmd_wps_get_status, NULL,
-- 	  "= show current WPS status" },
---#endif /* CONFIG_WPS */
-- 	{ "disassoc_imminent", hostapd_cli_cmd_disassoc_imminent, NULL,
-- 	  "= send Disassociation Imminent notification" },
-- 	{ "ess_disassoc", hostapd_cli_cmd_ess_disassoc, NULL,
-diff --git a/package/network/services/hostapd/patches/431-wpa_cli_ifdef.patch b/package/network/services/hostapd/patches/431-wpa_cli_ifdef.patch
-deleted file mode 100644
-index 65c31c567f..0000000000
---- a/package/network/services/hostapd/patches/431-wpa_cli_ifdef.patch
-+++ /dev/null
-@@ -1,18 +0,0 @@
----- a/wpa_supplicant/wpa_cli.c
--+++ b/wpa_supplicant/wpa_cli.c
--@@ -26,6 +26,15 @@
-- #include <cutils/properties.h>
-- #endif /* ANDROID */
-- 
--+#ifndef CONFIG_P2P
--+#define CONFIG_P2P
--+#endif
--+#ifndef CONFIG_AP
--+#define CONFIG_AP
--+#endif
--+#ifndef CONFIG_MESH
--+#define CONFIG_MESH
--+#endif
-- 
-- static const char *const wpa_cli_version =
-- "wpa_cli v" VERSION_STR "\n"
-diff --git a/package/network/services/hostapd/patches/432-missing-typedef.patch b/package/network/services/hostapd/patches/432-missing-typedef.patch
-deleted file mode 100644
-index 7a100f1a0d..0000000000
---- a/package/network/services/hostapd/patches/432-missing-typedef.patch
-+++ /dev/null
-@@ -1,10 +0,0 @@
----- a/src/drivers/linux_wext.h
--+++ b/src/drivers/linux_wext.h
--@@ -26,6 +26,7 @@ typedef int32_t __s32;
-- typedef uint16_t __u16;
-- typedef int16_t __s16;
-- typedef uint8_t __u8;
--+typedef int8_t __s8;
-- #ifndef __user
-- #define __user
-- #endif /* __user */
-diff --git a/package/network/services/hostapd/patches/450-scan_wait.patch b/package/network/services/hostapd/patches/450-scan_wait.patch
-deleted file mode 100644
-index ac874ad66a..0000000000
---- a/package/network/services/hostapd/patches/450-scan_wait.patch
-+++ /dev/null
-@@ -1,73 +0,0 @@
----- a/hostapd/main.c
--+++ b/hostapd/main.c
--@@ -39,6 +39,8 @@ struct hapd_global {
-- };
-- 
-- static struct hapd_global global;
--+static int daemonize = 0;
--+static char *pid_file = NULL;
-- 
-- 
-- #ifndef CONFIG_NO_HOSTAPD_LOGGER
--@@ -146,6 +148,14 @@ static void hostapd_logger_cb(void *ctx,
-- }
-- #endif /* CONFIG_NO_HOSTAPD_LOGGER */
-- 
--+static void hostapd_setup_complete_cb(void *ctx)
--+{
--+	if (daemonize && os_daemonize(pid_file)) {
--+		perror("daemon");
--+		return;
--+	}
--+	daemonize = 0;
--+}
-- 
-- /**
--  * hostapd_driver_init - Preparate driver interface
--@@ -164,6 +174,8 @@ static int hostapd_driver_init(struct ho
-- 		return -1;
-- 	}
-- 
--+	hapd->setup_complete_cb = hostapd_setup_complete_cb;
--+
-- 	/* Initialize the driver interface */
-- 	if (!(b[0] | b[1] | b[2] | b[3] | b[4] | b[5]))
-- 		b = NULL;
--@@ -404,8 +416,6 @@ static void hostapd_global_deinit(const
-- #endif /* CONFIG_NATIVE_WINDOWS */
-- 
-- 	eap_server_unregister_methods();
---
---	os_daemonize_terminate(pid_file);
-- }
-- 
-- 
--@@ -431,18 +441,6 @@ static int hostapd_global_run(struct hap
-- 	}
-- #endif /* EAP_SERVER_TNC */
-- 
---	if (daemonize) {
---		if (os_daemonize(pid_file)) {
---			wpa_printf(MSG_ERROR, "daemon: %s", strerror(errno));
---			return -1;
---		}
---		if (eloop_sock_requeue()) {
---			wpa_printf(MSG_ERROR, "eloop_sock_requeue: %s",
---				   strerror(errno));
---			return -1;
---		}
---	}
---
-- 	eloop_run();
-- 
-- 	return 0;
--@@ -645,8 +643,7 @@ int main(int argc, char *argv[])
-- 	struct hapd_interfaces interfaces;
-- 	int ret = 1;
-- 	size_t i, j;
---	int c, debug = 0, daemonize = 0;
---	char *pid_file = NULL;
--+	int c, debug = 0;
-- 	const char *log_file = NULL;
-- 	const char *entropy_file = NULL;
-- 	char **bss_config = NULL, **tmp_bss;
-diff --git a/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch b/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch
-deleted file mode 100644
-index 99c552821b..0000000000
---- a/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch
-+++ /dev/null
-@@ -1,189 +0,0 @@
--From 4bb69d15477e0f2b00e166845341dc933de47c58 Mon Sep 17 00:00:00 2001
--From: Antonio Quartulli <ordex@autistici.org>
--Date: Sun, 3 Jun 2012 18:22:56 +0200
--Subject: [PATCHv2 601/602] wpa_supplicant: add new config params to be used
-- with the ibss join command
--
--Signed-hostap: Antonio Quartulli <ordex@autistici.org>
-----
-- src/drivers/driver.h            |    6 +++
-- wpa_supplicant/config.c         |   96 +++++++++++++++++++++++++++++++++++++++
-- wpa_supplicant/config_ssid.h    |    6 +++
-- wpa_supplicant/wpa_supplicant.c |   23 +++++++---
-- 4 files changed, 124 insertions(+), 7 deletions(-)
--
----- a/src/drivers/driver.h
--+++ b/src/drivers/driver.h
--@@ -19,6 +19,7 @@
-- 
-- #define WPA_SUPPLICANT_DRIVER_VERSION 4
-- 
--+#include "ap/sta_info.h"
-- #include "common/defs.h"
-- #include "common/ieee802_11_defs.h"
-- #include "common/wpa_common.h"
--@@ -850,6 +851,9 @@ struct wpa_driver_associate_params {
-- 	 * responsible for selecting with which BSS to associate. */
-- 	const u8 *bssid;
-- 
--+	unsigned char rates[WLAN_SUPP_RATES_MAX];
--+	int mcast_rate;
--+
-- 	/**
-- 	 * bssid_hint - BSSID of a proposed AP
-- 	 *
----- a/wpa_supplicant/config.c
--+++ b/wpa_supplicant/config.c
--@@ -18,6 +18,7 @@
-- #include "eap_peer/eap.h"
-- #include "p2p/p2p.h"
-- #include "fst/fst.h"
--+#include "ap/sta_info.h"
-- #include "config.h"
-- 
-- 
--@@ -2269,6 +2270,97 @@ static char * wpa_config_write_peerkey(c
-- #endif /* NO_CONFIG_WRITE */
-- 
-- 
--+static int wpa_config_parse_mcast_rate(const struct parse_data *data,
--+				       struct wpa_ssid *ssid, int line,
--+				       const char *value)
--+{
--+	ssid->mcast_rate = (int)(strtod(value, NULL) * 10);
--+
--+	return 0;
--+}
--+
--+#ifndef NO_CONFIG_WRITE
--+static char * wpa_config_write_mcast_rate(const struct parse_data *data,
--+					  struct wpa_ssid *ssid)
--+{
--+	char *value;
--+	int res;
--+
--+	if (!ssid->mcast_rate == 0)
--+		return NULL;
--+
--+	value = os_malloc(6); /* longest: 300.0 */
--+	if (value == NULL)
--+		return NULL;
--+	res = os_snprintf(value, 5, "%.1f", (double)ssid->mcast_rate / 10);
--+	if (res < 0) {
--+		os_free(value);
--+		return NULL;
--+	}
--+	return value;
--+}
--+#endif /* NO_CONFIG_WRITE */
--+
--+static int wpa_config_parse_rates(const struct parse_data *data,
--+				  struct wpa_ssid *ssid, int line,
--+				  const char *value)
--+{
--+	int i;
--+	char *pos, *r, *sptr, *end;
--+	double rate;
--+
--+	pos = (char *)value;
--+	r = strtok_r(pos, ",", &sptr);
--+	i = 0;
--+	while (pos && i < WLAN_SUPP_RATES_MAX) {
--+		rate = 0.0;
--+		if (r)
--+			rate = strtod(r, &end);
--+		ssid->rates[i] = rate * 2;
--+		if (*end != '\0' || rate * 2 != ssid->rates[i])
--+			return 1;
--+
--+		i++;
--+		r = strtok_r(NULL, ",", &sptr);
--+	}
--+
--+	return 0;
--+}
--+
--+#ifndef NO_CONFIG_WRITE
--+static char * wpa_config_write_rates(const struct parse_data *data,
--+				     struct wpa_ssid *ssid)
--+{
--+	char *value, *pos;
--+	int res, i;
--+
--+	if (ssid->rates[0] <= 0)
--+		return NULL;
--+
--+	value = os_malloc(6 * WLAN_SUPP_RATES_MAX + 1);
--+	if (value == NULL)
--+		return NULL;
--+	pos = value;
--+	for (i = 0; i < WLAN_SUPP_RATES_MAX - 1; i++) {
--+		res = os_snprintf(pos, 6, "%.1f,", (double)ssid->rates[i] / 2);
--+		if (res < 0) {
--+			os_free(value);
--+			return NULL;
--+		}
--+		pos += res;
--+	}
--+	res = os_snprintf(pos, 6, "%.1f",
--+			  (double)ssid->rates[WLAN_SUPP_RATES_MAX - 1] / 2);
--+	if (res < 0) {
--+		os_free(value);
--+		return NULL;
--+	}
--+
--+	value[6 * WLAN_SUPP_RATES_MAX] = '\0';
--+	return value;
--+}
--+#endif /* NO_CONFIG_WRITE */
--+
-- /* Helper macros for network block parser */
-- 
-- #ifdef OFFSET
--@@ -2552,6 +2644,8 @@ static const struct parse_data ssid_fiel
-- 	{ INT(ap_max_inactivity) },
-- 	{ INT(dtim_period) },
-- 	{ INT(beacon_int) },
--+	{ FUNC(rates) },
--+	{ FUNC(mcast_rate) },
-- #ifdef CONFIG_MACSEC
-- 	{ INT_RANGE(macsec_policy, 0, 1) },
-- 	{ INT_RANGE(macsec_integ_only, 0, 1) },
----- a/wpa_supplicant/config_ssid.h
--+++ b/wpa_supplicant/config_ssid.h
--@@ -10,8 +10,10 @@
-- #define CONFIG_SSID_H
-- 
-- #include "common/defs.h"
--+#include "ap/sta_info.h"
-- #include "utils/list.h"
-- #include "eap_peer/eap_config.h"
--+#include "drivers/nl80211_copy.h"
-- 
-- 
-- #define DEFAULT_EAP_WORKAROUND ((unsigned int) -1)
--@@ -843,6 +845,9 @@ struct wpa_ssid {
-- 	 */
-- 	void *parent_cred;
-- 
--+	unsigned char rates[WLAN_SUPP_RATES_MAX];
--+	double mcast_rate;
--+
-- #ifdef CONFIG_MACSEC
-- 	/**
-- 	 * macsec_policy - Determines the policy for MACsec secure session
----- a/wpa_supplicant/wpa_supplicant.c
--+++ b/wpa_supplicant/wpa_supplicant.c
--@@ -3638,6 +3638,12 @@ static void wpas_start_assoc_cb(struct w
-- 			params.beacon_int = ssid->beacon_int;
-- 		else
-- 			params.beacon_int = wpa_s->conf->beacon_int;
--+		int i = 0;
--+		while (i < WLAN_SUPP_RATES_MAX) {
--+			params.rates[i] = ssid->rates[i];
--+			i++;
--+		}
--+		params.mcast_rate = ssid->mcast_rate;
-- 	}
-- 
-- 	if (bss && ssid->enable_edmg)
-diff --git a/package/network/services/hostapd/patches/461-driver_nl80211-use-new-parameters-during-ibss-join.patch b/package/network/services/hostapd/patches/461-driver_nl80211-use-new-parameters-during-ibss-join.patch
-deleted file mode 100644
-index b5dec991d0..0000000000
---- a/package/network/services/hostapd/patches/461-driver_nl80211-use-new-parameters-during-ibss-join.patch
-+++ /dev/null
-@@ -1,59 +0,0 @@
--From ffc4445958a3ed4064f2e1bf73fa478a61c5cf7b Mon Sep 17 00:00:00 2001
--From: Antonio Quartulli <ordex@autistici.org>
--Date: Sun, 3 Jun 2012 18:42:25 +0200
--Subject: [PATCHv2 602/602] driver_nl80211: use new parameters during ibss join
--
--Signed-hostap: Antonio Quartulli <ordex@autistici.org>
-----
-- src/drivers/driver_nl80211.c |   33 ++++++++++++++++++++++++++++++++-
-- 1 file changed, 32 insertions(+), 1 deletion(-)
--
----- a/src/drivers/driver_nl80211.c
--+++ b/src/drivers/driver_nl80211.c
--@@ -5601,7 +5601,7 @@ static int wpa_driver_nl80211_ibss(struc
-- 				   struct wpa_driver_associate_params *params)
-- {
-- 	struct nl_msg *msg;
---	int ret = -1;
--+	int ret = -1, i;
-- 	int count = 0;
-- 
-- 	wpa_printf(MSG_DEBUG, "nl80211: Join IBSS (ifindex=%d)", drv->ifindex);
--@@ -5628,6 +5628,37 @@ retry:
-- 	    nl80211_put_beacon_int(msg, params->beacon_int))
-- 		goto fail;
-- 
--+	if (params->fixed_freq) {
--+		wpa_printf(MSG_DEBUG, "  * fixed_freq");
--+		nla_put_flag(msg, NL80211_ATTR_FREQ_FIXED);
--+	}
--+
--+	if (params->beacon_int > 0) {
--+		wpa_printf(MSG_DEBUG, "  * beacon_int=%d",
--+			   params->beacon_int);
--+		nla_put_u32(msg, NL80211_ATTR_BEACON_INTERVAL,
--+			    params->beacon_int);
--+	}
--+
--+	if (params->rates[0] > 0) {
--+		wpa_printf(MSG_DEBUG, "  * basic_rates:");
--+		i = 0;
--+		while (i < NL80211_MAX_SUPP_RATES &&
--+		       params->rates[i] > 0) {
--+			wpa_printf(MSG_DEBUG, "    %.1f",
--+				   (double)params->rates[i] / 2);
--+			i++;
--+		}
--+		nla_put(msg, NL80211_ATTR_BSS_BASIC_RATES, i,
--+			params->rates);
--+	}
--+
--+	if (params->mcast_rate > 0) {
--+		wpa_printf(MSG_DEBUG, "  * mcast_rate=%.1f",
--+			   (double)params->mcast_rate / 10);
--+		nla_put_u32(msg, NL80211_ATTR_MCAST_RATE, params->mcast_rate);
--+	}
--+
-- 	ret = nl80211_set_conn_keys(params, msg);
-- 	if (ret)
-- 		goto fail;
-diff --git a/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch b/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch
-deleted file mode 100644
-index 7e21da263d..0000000000
---- a/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch
-+++ /dev/null
-@@ -1,68 +0,0 @@
--From: Sven Eckelmann <sven.eckelmann@openmesh.com>
--Date: Thu, 11 May 2017 08:21:45 +0200
--Subject: [PATCH] set mcast_rate in mesh mode
--
--The wpa_supplicant code for IBSS allows to set the mcast rate. It is
--recommended to increase this value from 1 or 6 Mbit/s to something higher
--when using a mesh protocol on top which uses the multicast packet loss as
--indicator for the link quality.
--
--This setting was unfortunately not applied for mesh mode. But it would be
--beneficial when wpa_supplicant would behave similar to IBSS mode and set
--this argument during mesh join like authsae already does. At least it is
--helpful for companies/projects which are currently switching to 802.11s
--(without mesh_fwding and with mesh_ttl set to 1) as replacement for IBSS
--because newer drivers seem to support 802.11s but not IBSS anymore.
--
--Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
--Tested-by: Simon Wunderlich <simon.wunderlich@openmesh.com>
--
----- a/src/drivers/driver.h
--+++ b/src/drivers/driver.h
--@@ -1549,6 +1549,7 @@ struct wpa_driver_mesh_join_params {
-- #define WPA_DRIVER_MESH_FLAG_AMPE	0x00000008
-- 	unsigned int flags;
-- 	u8 handle_dfs;
--+	int mcast_rate;
-- };
-- 
-- struct wpa_driver_set_key_params {
----- a/src/drivers/driver_nl80211.c
--+++ b/src/drivers/driver_nl80211.c
--@@ -10058,6 +10058,18 @@ static int nl80211_put_mesh_id(struct nl
-- }
-- 
-- 
--+static int nl80211_put_mcast_rate(struct nl_msg *msg, int mcast_rate)
--+{
--+	if (mcast_rate > 0) {
--+		wpa_printf(MSG_DEBUG, "  * mcast_rate=%.1f",
--+			   (double)mcast_rate / 10);
--+		return nla_put_u32(msg, NL80211_ATTR_MCAST_RATE, mcast_rate);
--+	}
--+
--+	return 0;
--+}
--+
--+
-- static int nl80211_put_mesh_config(struct nl_msg *msg,
-- 				   struct wpa_driver_mesh_bss_params *params)
-- {
--@@ -10119,6 +10131,7 @@ static int nl80211_join_mesh(struct i802
-- 	    nl80211_put_basic_rates(msg, params->basic_rates) ||
-- 	    nl80211_put_mesh_id(msg, params->meshid, params->meshid_len) ||
-- 	    nl80211_put_beacon_int(msg, params->beacon_int) ||
--+	    nl80211_put_mcast_rate(msg, params->mcast_rate) ||
-- 	    nl80211_put_dtim_period(msg, params->dtim_period))
-- 		goto fail;
-- 
----- a/wpa_supplicant/mesh.c
--+++ b/wpa_supplicant/mesh.c
--@@ -592,6 +592,7 @@ int wpa_supplicant_join_mesh(struct wpa_
-- 
-- 	params->meshid = ssid->ssid;
-- 	params->meshid_len = ssid->ssid_len;
--+	params->mcast_rate = ssid->mcast_rate;
-- 	ibss_mesh_setup_freq(wpa_s, ssid, &params->freq);
-- 	wpa_s->mesh_ht_enabled = !!params->freq.ht_enabled;
-- 	wpa_s->mesh_vht_enabled = !!params->freq.vht_enabled;
-diff --git a/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch b/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch
-deleted file mode 100644
-index 6d48175163..0000000000
---- a/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch
-+++ /dev/null
-@@ -1,19 +0,0 @@
----- a/wpa_supplicant/wpa_supplicant.c
--+++ b/wpa_supplicant/wpa_supplicant.c
--@@ -2407,11 +2407,13 @@ void ibss_mesh_setup_freq(struct wpa_sup
-- 	for (j = 0; j < wpa_s->last_scan_res_used; j++) {
-- 		struct wpa_bss *bss = wpa_s->last_scan_res[j];
-- 
---		if (ssid->mode != WPAS_MODE_IBSS)
--+		/* Don't adjust control freq in case of fixed_freq */
--+		if (ssid->fixed_freq) {
--+			obss_scan = 0;
-- 			break;
--+		}
-- 
---		/* Don't adjust control freq in case of fixed_freq */
---		if (ssid->fixed_freq)
--+		if (ssid->mode != WPAS_MODE_IBSS)
-- 			break;
-- 
-- 		if (!bss_is_ibss(bss))
-diff --git a/package/network/services/hostapd/patches/470-survey_data_fallback.patch b/package/network/services/hostapd/patches/470-survey_data_fallback.patch
-deleted file mode 100644
-index 57a78ee865..0000000000
---- a/package/network/services/hostapd/patches/470-survey_data_fallback.patch
-+++ /dev/null
-@@ -1,45 +0,0 @@
----- a/src/ap/acs.c
--+++ b/src/ap/acs.c
--@@ -302,18 +302,12 @@ static void acs_fail(struct hostapd_ifac
-- static long double
-- acs_survey_interference_factor(struct freq_survey *survey, s8 min_nf)
-- {
---	long double factor, busy, total;
--+	long double factor, busy = 0, total;
-- 
-- 	if (survey->filled & SURVEY_HAS_CHAN_TIME_BUSY)
-- 		busy = survey->channel_time_busy;
-- 	else if (survey->filled & SURVEY_HAS_CHAN_TIME_RX)
-- 		busy = survey->channel_time_rx;
---	else {
---		/* This shouldn't really happen as survey data is checked in
---		 * acs_sanity_check() */
---		wpa_printf(MSG_ERROR, "ACS: Survey data missing");
---		return 0;
---	}
-- 
-- 	total = survey->channel_time;
-- 
--@@ -415,20 +409,19 @@ static int acs_usable_vht160_chan(const
-- static int acs_survey_is_sufficient(struct freq_survey *survey)
-- {
-- 	if (!(survey->filled & SURVEY_HAS_NF)) {
--+		survey->nf = -95;
-- 		wpa_printf(MSG_INFO, "ACS: Survey is missing noise floor");
---		return 0;
-- 	}
-- 
-- 	if (!(survey->filled & SURVEY_HAS_CHAN_TIME)) {
--+		survey->channel_time = 0;
-- 		wpa_printf(MSG_INFO, "ACS: Survey is missing channel time");
---		return 0;
-- 	}
-- 
-- 	if (!(survey->filled & SURVEY_HAS_CHAN_TIME_BUSY) &&
-- 	    !(survey->filled & SURVEY_HAS_CHAN_TIME_RX)) {
-- 		wpa_printf(MSG_INFO,
-- 			   "ACS: Survey is missing RX and busy time (at least one is required)");
---		return 0;
-- 	}
-- 
-- 	return 1;
-diff --git a/package/network/services/hostapd/patches/500-lto-jobserver-support.patch b/package/network/services/hostapd/patches/500-lto-jobserver-support.patch
-deleted file mode 100644
-index 46030859de..0000000000
---- a/package/network/services/hostapd/patches/500-lto-jobserver-support.patch
-+++ /dev/null
-@@ -1,50 +0,0 @@
----- a/hostapd/Makefile
--+++ b/hostapd/Makefile
--@@ -1327,14 +1327,14 @@ hostapd_multi.a: $(BCHECK) $(OBJS)
-- 	@$(AR) cr $@ hostapd_multi.o $(OBJS)
-- 
-- hostapd: $(BCHECK) $(OBJS)
---	$(Q)$(CC) $(LDFLAGS) -o hostapd $(OBJS) $(LIBS)
--+	+$(Q)$(CC) $(LDFLAGS) -o hostapd $(OBJS) $(LIBS)
-- 	@$(E) "  LD " $@
-- 
-- ifdef CONFIG_WPA_TRACE
-- OBJS_c += ../src/utils/trace.o
-- endif
-- hostapd_cli: $(OBJS_c)
---	$(Q)$(CC) $(LDFLAGS) -o hostapd_cli $(OBJS_c) $(LIBS_c)
--+	+$(Q)$(CC) $(LDFLAGS) -o hostapd_cli $(OBJS_c) $(LIBS_c)
-- 	@$(E) "  LD " $@
-- 
-- NOBJS = nt_password_hash.o ../src/crypto/ms_funcs.o $(SHA1OBJS)
----- a/wpa_supplicant/Makefile
--+++ b/wpa_supplicant/Makefile
--@@ -1930,23 +1930,23 @@ wpa_supplicant_multi.a: .config $(BCHECK
-- 	@$(AR) cr $@ wpa_supplicant_multi.o $(OBJS)
-- 
-- wpa_supplicant: $(BCHECK) $(OBJS) $(EXTRA_progs)
---	$(Q)$(LDO) $(LDFLAGS) -o wpa_supplicant $(OBJS) $(LIBS) $(EXTRALIBS)
--+	+$(Q)$(LDO) $(LDFLAGS) -o wpa_supplicant $(OBJS) $(LIBS) $(EXTRALIBS)
-- 	@$(E) "  LD " $@
-- 
-- eapol_test: $(OBJS_t)
---	$(Q)$(LDO) $(LDFLAGS) -o eapol_test $(OBJS_t) $(LIBS)
--+	+$(Q)$(LDO) $(LDFLAGS) -o eapol_test $(OBJS_t) $(LIBS)
-- 	@$(E) "  LD " $@
-- 
-- preauth_test: $(OBJS_t2)
---	$(Q)$(LDO) $(LDFLAGS) -o preauth_test $(OBJS_t2) $(LIBS)
--+	+$(Q)$(LDO) $(LDFLAGS) -o preauth_test $(OBJS_t2) $(LIBS)
-- 	@$(E) "  LD " $@
-- 
-- wpa_passphrase: $(OBJS_p)
---	$(Q)$(LDO) $(LDFLAGS) -o wpa_passphrase $(OBJS_p) $(LIBS_p) $(LIBS)
--+	+$(Q)$(LDO) $(LDFLAGS) -o wpa_passphrase $(OBJS_p) $(LIBS_p) $(LIBS)
-- 	@$(E) "  LD " $@
-- 
-- wpa_cli: $(OBJS_c)
---	$(Q)$(LDO) $(LDFLAGS) -o wpa_cli $(OBJS_c) $(LIBS_c)
--+	+$(Q)$(LDO) $(LDFLAGS) -o wpa_cli $(OBJS_c) $(LIBS_c)
-- 	@$(E) "  LD " $@
-- 
-- LIBCTRL += ../src/common/wpa_ctrl.o
-diff --git a/package/network/services/hostapd/patches/599-wpa_supplicant-fix-warnings.patch b/package/network/services/hostapd/patches/599-wpa_supplicant-fix-warnings.patch
-deleted file mode 100644
-index e70dc61419..0000000000
---- a/package/network/services/hostapd/patches/599-wpa_supplicant-fix-warnings.patch
-+++ /dev/null
-@@ -1,19 +0,0 @@
----- a/wpa_supplicant/wps_supplicant.h
--+++ b/wpa_supplicant/wps_supplicant.h
--@@ -9,6 +9,7 @@
-- #ifndef WPS_SUPPLICANT_H
-- #define WPS_SUPPLICANT_H
-- 
--+struct wpa_bss;
-- struct wpa_scan_results;
-- 
-- #ifdef CONFIG_WPS
--@@ -16,8 +17,6 @@ struct wpa_scan_results;
-- #include "wps/wps.h"
-- #include "wps/wps_defs.h"
-- 
---struct wpa_bss;
---
-- struct wps_new_ap_settings {
-- 	const char *ssid_hex;
-- 	const char *auth;
-diff --git a/package/network/services/hostapd/patches/600-ubus_support.patch b/package/network/services/hostapd/patches/600-ubus_support.patch
-deleted file mode 100644
-index 53f521e649..0000000000
---- a/package/network/services/hostapd/patches/600-ubus_support.patch
-+++ /dev/null
-@@ -1,426 +0,0 @@
----- a/hostapd/Makefile
--+++ b/hostapd/Makefile
--@@ -171,6 +171,11 @@ OBJS += ../src/common/hw_features_common
-- 
-- OBJS += ../src/eapol_auth/eapol_auth_sm.o
-- 
--+ifdef CONFIG_UBUS
--+CFLAGS += -DUBUS_SUPPORT
--+OBJS += ../src/ap/ubus.o
--+LIBS += -lubox -lubus
--+endif
-- 
-- ifdef CONFIG_CODE_COVERAGE
-- CFLAGS += -O0 -fprofile-arcs -ftest-coverage
----- a/src/ap/hostapd.h
--+++ b/src/ap/hostapd.h
--@@ -17,6 +17,7 @@
-- #include "utils/list.h"
-- #include "ap_config.h"
-- #include "drivers/driver.h"
--+#include "ubus.h"
-- 
-- #define OCE_STA_CFON_ENABLED(hapd) \
-- 	((hapd->conf->oce & OCE_STA_CFON) && \
--@@ -80,7 +81,7 @@ struct hapd_interfaces {
-- #ifdef CONFIG_CTRL_IFACE_UDP
--        unsigned char ctrl_iface_cookie[CTRL_IFACE_COOKIE_LEN];
-- #endif /* CONFIG_CTRL_IFACE_UDP */
---
--+	struct ubus_object ubus;
-- };
-- 
-- enum hostapd_chan_status {
--@@ -154,6 +155,7 @@ struct hostapd_data {
-- 	struct hostapd_iface *iface;
-- 	struct hostapd_config *iconf;
-- 	struct hostapd_bss_config *conf;
--+	struct hostapd_ubus_bss ubus;
-- 	int interface_added; /* virtual interface added for this BSS */
-- 	unsigned int started:1;
-- 	unsigned int disabled:1;
--@@ -606,6 +608,7 @@ hostapd_alloc_bss_data(struct hostapd_if
-- 		       struct hostapd_bss_config *bss);
-- int hostapd_setup_interface(struct hostapd_iface *iface);
-- int hostapd_setup_interface_complete(struct hostapd_iface *iface, int err);
--+void hostapd_set_own_neighbor_report(struct hostapd_data *hapd);
-- void hostapd_interface_deinit(struct hostapd_iface *iface);
-- void hostapd_interface_free(struct hostapd_iface *iface);
-- struct hostapd_iface * hostapd_alloc_iface(void);
----- a/src/ap/hostapd.c
--+++ b/src/ap/hostapd.c
--@@ -395,6 +395,7 @@ void hostapd_free_hapd_data(struct hosta
-- 	hapd->beacon_set_done = 0;
-- 
-- 	wpa_printf(MSG_DEBUG, "%s(%s)", __func__, hapd->conf->iface);
--+	hostapd_ubus_free_bss(hapd);
-- 	accounting_deinit(hapd);
-- 	hostapd_deinit_wpa(hapd);
-- 	vlan_deinit(hapd);
--@@ -1417,6 +1418,8 @@ static int hostapd_setup_bss(struct host
-- 	if (hapd->driver && hapd->driver->set_operstate)
-- 		hapd->driver->set_operstate(hapd->drv_priv, 1);
-- 
--+	hostapd_ubus_add_bss(hapd);
--+
-- 	return 0;
-- }
-- 
--@@ -1999,6 +2002,7 @@ static int hostapd_setup_interface_compl
-- 	if (err)
-- 		goto fail;
-- 
--+	hostapd_ubus_add_iface(iface);
-- 	wpa_printf(MSG_DEBUG, "Completing interface initialization");
-- 	if (iface->freq) {
-- #ifdef NEED_AP_MLME
--@@ -2196,6 +2200,7 @@ dfs_offload:
-- 
-- fail:
-- 	wpa_printf(MSG_ERROR, "Interface initialization failed");
--+	hostapd_ubus_free_iface(iface);
-- 	hostapd_set_state(iface, HAPD_IFACE_DISABLED);
-- 	wpa_msg(hapd->msg_ctx, MSG_INFO, AP_EVENT_DISABLED);
-- #ifdef CONFIG_FST
--@@ -2669,6 +2674,7 @@ void hostapd_interface_deinit_free(struc
-- 		   (unsigned int) iface->conf->num_bss);
-- 	driver = iface->bss[0]->driver;
-- 	drv_priv = iface->bss[0]->drv_priv;
--+	hostapd_ubus_free_iface(iface);
-- 	hostapd_interface_deinit(iface);
-- 	wpa_printf(MSG_DEBUG, "%s: driver=%p drv_priv=%p -> hapd_deinit",
-- 		   __func__, driver, drv_priv);
----- a/src/ap/ieee802_11.c
--+++ b/src/ap/ieee802_11.c
--@@ -2327,13 +2327,18 @@ static void handle_auth(struct hostapd_d
-- 	u16 auth_alg, auth_transaction, status_code;
-- 	u16 resp = WLAN_STATUS_SUCCESS;
-- 	struct sta_info *sta = NULL;
---	int res, reply_res;
--+	int res, reply_res, ubus_resp;
-- 	u16 fc;
-- 	const u8 *challenge = NULL;
-- 	u8 resp_ies[2 + WLAN_AUTH_CHALLENGE_LEN];
-- 	size_t resp_ies_len = 0;
-- 	u16 seq_ctrl;
-- 	struct radius_sta rad_info;
--+	struct hostapd_ubus_request req = {
--+		.type = HOSTAPD_UBUS_AUTH_REQ,
--+		.mgmt_frame = mgmt,
--+		.ssi_signal = rssi,
--+	};
-- 
-- 	if (len < IEEE80211_HDRLEN + sizeof(mgmt->u.auth)) {
-- 		wpa_printf(MSG_INFO, "handle_auth - too short payload (len=%lu)",
--@@ -2493,6 +2498,13 @@ static void handle_auth(struct hostapd_d
-- 		resp = WLAN_STATUS_UNSPECIFIED_FAILURE;
-- 		goto fail;
-- 	}
--+	ubus_resp = hostapd_ubus_handle_event(hapd, &req);
--+	if (ubus_resp) {
--+		wpa_printf(MSG_DEBUG, "Station " MACSTR " rejected by ubus handler.\n",
--+			MAC2STR(mgmt->sa));
--+		resp = ubus_resp > 0 ? (u16) ubus_resp : WLAN_STATUS_UNSPECIFIED_FAILURE;
--+		goto fail;
--+	}
-- 	if (res == HOSTAPD_ACL_PENDING)
-- 		return;
-- 
--@@ -4157,7 +4169,7 @@ static void handle_assoc(struct hostapd_
-- 	int resp = WLAN_STATUS_SUCCESS;
-- 	u16 reply_res;
-- 	const u8 *pos;
---	int left, i;
--+	int left, i, ubus_resp;
-- 	struct sta_info *sta;
-- 	u8 *tmp = NULL;
-- #ifdef CONFIG_FILS
--@@ -4370,6 +4382,11 @@ static void handle_assoc(struct hostapd_
-- 		left = res;
-- 	}
-- #endif /* CONFIG_FILS */
--+	struct hostapd_ubus_request req = {
--+		.type = HOSTAPD_UBUS_ASSOC_REQ,
--+		.mgmt_frame = mgmt,
--+		.ssi_signal = rssi,
--+	};
-- 
-- 	/* followed by SSID and Supported rates; and HT capabilities if 802.11n
-- 	 * is used */
--@@ -4468,6 +4485,14 @@ static void handle_assoc(struct hostapd_
-- 	}
-- #endif /* CONFIG_FILS */
-- 
--+	ubus_resp = hostapd_ubus_handle_event(hapd, &req);
--+	if (ubus_resp) {
--+		wpa_printf(MSG_DEBUG, "Station " MACSTR " assoc rejected by ubus handler.\n",
--+		       MAC2STR(mgmt->sa));
--+		resp = ubus_resp > 0 ? (u16) ubus_resp : WLAN_STATUS_UNSPECIFIED_FAILURE;
--+		goto fail;
--+	}
--+
--  fail:
-- 
-- 	/*
--@@ -4561,6 +4586,7 @@ static void handle_disassoc(struct hosta
-- 	wpa_printf(MSG_DEBUG, "disassocation: STA=" MACSTR " reason_code=%d",
-- 		   MAC2STR(mgmt->sa),
-- 		   le_to_host16(mgmt->u.disassoc.reason_code));
--+	hostapd_ubus_notify(hapd, "disassoc", mgmt->sa);
-- 
-- 	sta = ap_get_sta(hapd, mgmt->sa);
-- 	if (sta == NULL) {
--@@ -4627,6 +4653,8 @@ static void handle_deauth(struct hostapd
-- 		" reason_code=%d",
-- 		MAC2STR(mgmt->sa), le_to_host16(mgmt->u.deauth.reason_code));
-- 
--+	hostapd_ubus_notify(hapd, "deauth", mgmt->sa);
--+
-- 	sta = ap_get_sta(hapd, mgmt->sa);
-- 	if (sta == NULL) {
-- 		wpa_msg(hapd->msg_ctx, MSG_DEBUG, "Station " MACSTR " trying "
----- a/src/ap/beacon.c
--+++ b/src/ap/beacon.c
--@@ -814,6 +814,12 @@ void handle_probe_req(struct hostapd_dat
-- 	u16 csa_offs[2];
-- 	size_t csa_offs_len;
-- 	struct radius_sta rad_info;
--+	struct hostapd_ubus_request req = {
--+		.type = HOSTAPD_UBUS_PROBE_REQ,
--+		.mgmt_frame = mgmt,
--+		.ssi_signal = ssi_signal,
--+		.elems = &elems,
--+	};
-- 
-- 	if (len < IEEE80211_HDRLEN)
-- 		return;
--@@ -996,6 +1002,12 @@ void handle_probe_req(struct hostapd_dat
-- 	}
-- #endif /* CONFIG_P2P */
-- 
--+	if (hostapd_ubus_handle_event(hapd, &req)) {
--+		wpa_printf(MSG_DEBUG, "Probe request for " MACSTR " rejected by ubus handler.\n",
--+		       MAC2STR(mgmt->sa));
--+		return;
--+	}
--+
-- 	/* TODO: verify that supp_rates contains at least one matching rate
-- 	 * with AP configuration */
-- 
----- a/src/ap/drv_callbacks.c
--+++ b/src/ap/drv_callbacks.c
--@@ -119,6 +119,10 @@ int hostapd_notif_assoc(struct hostapd_d
-- 	u16 reason = WLAN_REASON_UNSPECIFIED;
-- 	int status = WLAN_STATUS_SUCCESS;
-- 	const u8 *p2p_dev_addr = NULL;
--+	struct hostapd_ubus_request req = {
--+		.type = HOSTAPD_UBUS_ASSOC_REQ,
--+		.addr = addr,
--+	};
-- 
-- 	if (addr == NULL) {
-- 		/*
--@@ -211,6 +215,12 @@ int hostapd_notif_assoc(struct hostapd_d
-- 		goto fail;
-- 	}
-- 
--+	if (hostapd_ubus_handle_event(hapd, &req)) {
--+		wpa_printf(MSG_DEBUG, "Station " MACSTR " assoc rejected by ubus handler.\n",
--+			   MAC2STR(req.addr));
--+		goto fail;
--+	}
--+
-- #ifdef CONFIG_P2P
-- 	if (elems.p2p) {
-- 		wpabuf_free(sta->p2p_ie);
----- a/src/ap/sta_info.c
--+++ b/src/ap/sta_info.c
--@@ -423,6 +423,7 @@ void ap_handle_timer(void *eloop_ctx, vo
-- 		hostapd_logger(hapd, sta->addr, HOSTAPD_MODULE_IEEE80211,
-- 			       HOSTAPD_LEVEL_INFO, "deauthenticated due to "
-- 			       "local deauth request");
--+		hostapd_ubus_notify(hapd, "local-deauth", sta->addr);
-- 		ap_free_sta(hapd, sta);
-- 		return;
-- 	}
--@@ -578,6 +579,7 @@ skip_poll:
-- 		mlme_deauthenticate_indication(
-- 			hapd, sta,
-- 			WLAN_REASON_PREV_AUTH_NOT_VALID);
--+		hostapd_ubus_notify(hapd, "inactive-deauth", sta->addr);
-- 		ap_free_sta(hapd, sta);
-- 		break;
-- 	}
--@@ -1294,6 +1296,7 @@ void ap_sta_set_authorized(struct hostap
-- 					  buf, ip_addr, keyid_buf);
-- 	} else {
-- 		wpa_msg(hapd->msg_ctx, MSG_INFO, AP_STA_DISCONNECTED "%s", buf);
--+		hostapd_ubus_notify(hapd, "disassoc", sta->addr);
-- 
-- 		if (hapd->msg_ctx_parent &&
-- 		    hapd->msg_ctx_parent != hapd->msg_ctx)
----- a/src/ap/wpa_auth_glue.c
--+++ b/src/ap/wpa_auth_glue.c
--@@ -259,6 +259,7 @@ static void hostapd_wpa_auth_psk_failure
-- 	struct hostapd_data *hapd = ctx;
-- 	wpa_msg(hapd->msg_ctx, MSG_INFO, AP_STA_POSSIBLE_PSK_MISMATCH MACSTR,
-- 		MAC2STR(addr));
--+	hostapd_ubus_notify(hapd, "key-mismatch", addr);
-- }
-- 
-- 
----- a/wpa_supplicant/Makefile
--+++ b/wpa_supplicant/Makefile
--@@ -190,6 +190,12 @@ ifdef CONFIG_EAPOL_TEST
-- CFLAGS += -Werror -DEAPOL_TEST
-- endif
-- 
--+ifdef CONFIG_UBUS
--+CFLAGS += -DUBUS_SUPPORT
--+OBJS += ubus.o
--+LIBS += -lubox -lubus
--+endif
--+
-- ifdef CONFIG_CODE_COVERAGE
-- CFLAGS += -O0 -fprofile-arcs -ftest-coverage
-- LIBS += -lgcov
--@@ -956,6 +962,9 @@ ifdef CONFIG_CTRL_IFACE_MIB
-- CFLAGS += -DCONFIG_CTRL_IFACE_MIB
-- endif
-- OBJS += ../src/ap/ctrl_iface_ap.o
--+ifdef CONFIG_UBUS
--+OBJS += ../src/ap/ubus.o
--+endif
-- endif
-- 
-- CFLAGS += -DEAP_SERVER -DEAP_SERVER_IDENTITY
----- a/wpa_supplicant/wpa_supplicant.c
--+++ b/wpa_supplicant/wpa_supplicant.c
--@@ -6794,6 +6794,8 @@ struct wpa_supplicant * wpa_supplicant_a
-- 	}
-- #endif /* CONFIG_P2P */
-- 
--+	wpas_ubus_add_bss(wpa_s);
--+
-- 	return wpa_s;
-- }
-- 
--@@ -6820,6 +6822,8 @@ int wpa_supplicant_remove_iface(struct w
-- 	struct wpa_supplicant *parent = wpa_s->parent;
-- #endif /* CONFIG_MESH */
-- 
--+	wpas_ubus_free_bss(wpa_s);
--+
-- 	/* Remove interface from the global list of interfaces */
-- 	prev = global->ifaces;
-- 	if (prev == wpa_s) {
--@@ -7123,8 +7127,12 @@ int wpa_supplicant_run(struct wpa_global
-- 	eloop_register_signal_terminate(wpa_supplicant_terminate, global);
-- 	eloop_register_signal_reconfig(wpa_supplicant_reconfig, global);
-- 
--+	wpas_ubus_add(global);
--+
-- 	eloop_run();
-- 
--+	wpas_ubus_free(global);
--+
-- 	return 0;
-- }
-- 
----- a/wpa_supplicant/wpa_supplicant_i.h
--+++ b/wpa_supplicant/wpa_supplicant_i.h
--@@ -17,6 +17,7 @@
-- #include "wps/wps_defs.h"
-- #include "config_ssid.h"
-- #include "wmm_ac.h"
--+#include "ubus.h"
-- 
-- extern const char *const wpa_supplicant_version;
-- extern const char *const wpa_supplicant_license;
--@@ -310,6 +311,8 @@ struct wpa_global {
-- #endif /* CONFIG_WIFI_DISPLAY */
-- 
-- 	struct psk_list_entry *add_psk; /* From group formation */
--+
--+	struct ubus_object ubus_global;
-- };
-- 
-- 
--@@ -520,6 +523,7 @@ struct wpa_supplicant {
-- 	unsigned char own_addr[ETH_ALEN];
-- 	unsigned char perm_addr[ETH_ALEN];
-- 	char ifname[100];
--+	struct wpas_ubus_bss ubus;
-- #ifdef CONFIG_MATCH_IFACE
-- 	int matched;
-- #endif /* CONFIG_MATCH_IFACE */
----- a/wpa_supplicant/wps_supplicant.c
--+++ b/wpa_supplicant/wps_supplicant.c
--@@ -33,6 +33,7 @@
-- #include "p2p/p2p.h"
-- #include "p2p_supplicant.h"
-- #include "wps_supplicant.h"
--+#include "ubus.h"
-- 
-- 
-- #ifndef WPS_PIN_SCAN_IGNORE_SEL_REG
--@@ -392,6 +393,8 @@ static int wpa_supplicant_wps_cred(void
-- 	wpa_hexdump_key(MSG_DEBUG, "WPS: Received Credential attribute",
-- 			cred->cred_attr, cred->cred_attr_len);
-- 
--+	wpas_ubus_notify(wpa_s, cred);
--+
-- 	if (wpa_s->conf->wps_cred_processing == 1)
-- 		return 0;
-- 
----- a/hostapd/main.c
--+++ b/hostapd/main.c
--@@ -896,6 +896,7 @@ int main(int argc, char *argv[])
-- 	}
-- 
-- 	hostapd_global_ctrl_iface_init(&interfaces);
--+	hostapd_ubus_add(&interfaces);
-- 
-- 	if (hostapd_global_run(&interfaces, daemonize, pid_file)) {
-- 		wpa_printf(MSG_ERROR, "Failed to start eloop");
--@@ -905,6 +906,7 @@ int main(int argc, char *argv[])
-- 	ret = 0;
-- 
--  out:
--+	hostapd_ubus_free(&interfaces);
-- 	hostapd_global_ctrl_iface_deinit(&interfaces);
-- 	/* Deinitialize all interfaces */
-- 	for (i = 0; i < interfaces.count; i++) {
----- a/wpa_supplicant/main.c
--+++ b/wpa_supplicant/main.c
--@@ -203,7 +203,7 @@ int main(int argc, char *argv[])
-- 
-- 	for (;;) {
-- 		c = getopt(argc, argv,
---			   "b:Bc:C:D:de:f:g:G:hH:i:I:KLMm:No:O:p:P:qsTtuv::W");
--+			   "b:Bc:C:D:de:f:g:G:hH:i:I:KLMm:nNo:O:p:P:qsTtuv::W");
-- 		if (c < 0)
-- 			break;
-- 		switch (c) {
--@@ -271,6 +271,9 @@ int main(int argc, char *argv[])
-- 			params.conf_p2p_dev = optarg;
-- 			break;
-- #endif /* CONFIG_P2P */
--+		case 'n':
--+			iface_count = 0;
--+			break;
-- 		case 'o':
-- 			params.override_driver = optarg;
-- 			break;
----- a/src/ap/rrm.c
--+++ b/src/ap/rrm.c
--@@ -89,6 +89,9 @@ static void hostapd_handle_beacon_report
-- 		return;
-- 	wpa_msg(hapd->msg_ctx, MSG_INFO, BEACON_RESP_RX MACSTR " %u %02x %s",
-- 		MAC2STR(addr), token, rep_mode, report);
--+	if (len < sizeof(struct rrm_measurement_beacon_report))
--+		return;
--+	hostapd_ubus_notify_beacon_report(hapd, addr, token, rep_mode, (struct rrm_measurement_beacon_report*) pos, len);
-- }
-- 
-- 
-diff --git a/package/network/services/hostapd/patches/700-wifi-reload.patch b/package/network/services/hostapd/patches/700-wifi-reload.patch
-deleted file mode 100644
-index ceb92265dd..0000000000
---- a/package/network/services/hostapd/patches/700-wifi-reload.patch
-+++ /dev/null
-@@ -1,219 +0,0 @@
----- a/hostapd/config_file.c
--+++ b/hostapd/config_file.c
--@@ -2501,6 +2501,8 @@ static int hostapd_config_fill(struct ho
-- 		bss->isolate = atoi(pos);
-- 	} else if (os_strcmp(buf, "ap_max_inactivity") == 0) {
-- 		bss->ap_max_inactivity = atoi(pos);
--+	} else if (os_strcmp(buf, "config_id") == 0) {
--+		bss->config_id = os_strdup(pos);
-- 	} else if (os_strcmp(buf, "skip_inactivity_poll") == 0) {
-- 		bss->skip_inactivity_poll = atoi(pos);
-- 	} else if (os_strcmp(buf, "country_code") == 0) {
--@@ -3197,6 +3199,8 @@ static int hostapd_config_fill(struct ho
-- 		}
-- 	} else if (os_strcmp(buf, "acs_exclude_dfs") == 0) {
-- 		conf->acs_exclude_dfs = atoi(pos);
--+	} else if (os_strcmp(buf, "radio_config_id") == 0) {
--+			conf->config_id = os_strdup(pos);
-- 	} else if (os_strcmp(buf, "op_class") == 0) {
-- 		conf->op_class = atoi(pos);
-- 	} else if (os_strcmp(buf, "channel") == 0) {
----- a/src/ap/ap_config.c
--+++ b/src/ap/ap_config.c
--@@ -780,6 +780,7 @@ void hostapd_config_free_bss(struct host
-- 	os_free(conf->radius_req_attr_sqlite);
-- 	os_free(conf->rsn_preauth_interfaces);
-- 	os_free(conf->ctrl_interface);
--+	os_free(conf->config_id);
-- 	os_free(conf->ca_cert);
-- 	os_free(conf->server_cert);
-- 	os_free(conf->server_cert2);
--@@ -972,6 +973,7 @@ void hostapd_config_free(struct hostapd_
-- 
-- 	for (i = 0; i < conf->num_bss; i++)
-- 		hostapd_config_free_bss(conf->bss[i]);
--+	os_free(conf->config_id);
-- 	os_free(conf->bss);
-- 	os_free(conf->supported_rates);
-- 	os_free(conf->basic_rates);
----- a/src/ap/ap_config.h
--+++ b/src/ap/ap_config.h
--@@ -871,6 +871,7 @@ struct hostapd_bss_config {
-- 	 */
-- 	u8 mka_psk_set;
-- #endif /* CONFIG_MACSEC */
--+	char *config_id;
-- };
-- 
-- /**
--@@ -1062,6 +1063,7 @@ struct hostapd_config {
-- 	unsigned int airtime_update_interval;
-- #define AIRTIME_MODE_MAX (__AIRTIME_MODE_MAX - 1)
-- #endif /* CONFIG_AIRTIME_POLICY */
--+	char *config_id;
-- 
-- 	u8 notify_mgmt_frames;
-- };
----- a/src/ap/hostapd.c
--+++ b/src/ap/hostapd.c
--@@ -218,6 +218,10 @@ static int hostapd_iface_conf_changed(st
-- {
-- 	size_t i;
-- 
--+	if (newconf->config_id != oldconf->config_id)
--+		if (strcmp(newconf->config_id, oldconf->config_id))
--+			return 1;
--+
-- 	if (newconf->num_bss != oldconf->num_bss)
-- 		return 1;
-- 
--@@ -231,7 +235,7 @@ static int hostapd_iface_conf_changed(st
-- }
-- 
-- 
---int hostapd_reload_config(struct hostapd_iface *iface)
--+int hostapd_reload_config(struct hostapd_iface *iface, int reconf)
-- {
-- 	struct hapd_interfaces *interfaces = iface->interfaces;
-- 	struct hostapd_data *hapd = iface->bss[0];
--@@ -254,13 +258,16 @@ int hostapd_reload_config(struct hostapd
-- 	if (newconf == NULL)
-- 		return -1;
-- 
---	hostapd_clear_old(iface);
---
-- 	oldconf = hapd->iconf;
-- 	if (hostapd_iface_conf_changed(newconf, oldconf)) {
-- 		char *fname;
-- 		int res;
-- 
--+		if (reconf)
--+			return -1;
--+
--+		hostapd_clear_old(iface);
--+
-- 		wpa_printf(MSG_DEBUG,
-- 			   "Configuration changes include interface/BSS modification - force full disable+enable sequence");
-- 		fname = os_strdup(iface->config_fname);
--@@ -285,6 +292,24 @@ int hostapd_reload_config(struct hostapd
-- 			wpa_printf(MSG_ERROR,
-- 				   "Failed to enable interface on config reload");
-- 		return res;
--+	} else {
--+		for (j = 0; j < iface->num_bss; j++) {
--+			hapd = iface->bss[j];
--+			if (!hapd->config_id || strcmp(hapd->config_id, newconf->bss[j]->config_id)) {
--+				hostapd_flush_old_stations(iface->bss[j],
--+							   WLAN_REASON_PREV_AUTH_NOT_VALID);
--+#ifdef CONFIG_WEP
--+				hostapd_broadcast_wep_clear(iface->bss[j]);
--+#endif
--+
--+#ifndef CONFIG_NO_RADIUS
--+				/* TODO: update dynamic data based on changed configuration
--+				 * items (e.g., open/close sockets, etc.) */
--+				radius_client_flush(iface->bss[j]->radius, 0);
--+#endif /* CONFIG_NO_RADIUS */
--+				wpa_printf(MSG_INFO, "bss %zu changed", j);
--+			}
--+		}
-- 	}
-- 	iface->conf = newconf;
-- 
--@@ -301,6 +326,12 @@ int hostapd_reload_config(struct hostapd
-- 
-- 	for (j = 0; j < iface->num_bss; j++) {
-- 		hapd = iface->bss[j];
--+		if (hapd->config_id) {
--+			os_free(hapd->config_id);
--+			hapd->config_id = NULL;
--+		}
--+		if (newconf->bss[j]->config_id)
--+			hapd->config_id = strdup(newconf->bss[j]->config_id);
-- 		hapd->iconf = newconf;
-- 		hapd->conf = newconf->bss[j];
-- 		hostapd_reload_bss(hapd);
--@@ -2366,6 +2397,10 @@ hostapd_alloc_bss_data(struct hostapd_if
-- 	hapd->iconf = conf;
-- 	hapd->conf = bss;
-- 	hapd->iface = hapd_iface;
--+	if (bss && bss->config_id)
--+		hapd->config_id = strdup(bss->config_id);
--+	else
--+		hapd->config_id = NULL;
-- 	if (conf)
-- 		hapd->driver = conf->driver;
-- 	hapd->ctrl_sock = -1;
----- a/src/ap/hostapd.h
--+++ b/src/ap/hostapd.h
--@@ -46,7 +46,7 @@ struct mesh_conf;
-- struct hostapd_iface;
-- 
-- struct hapd_interfaces {
---	int (*reload_config)(struct hostapd_iface *iface);
--+	int (*reload_config)(struct hostapd_iface *iface, int reconf);
-- 	struct hostapd_config * (*config_read_cb)(const char *config_fname);
-- 	int (*ctrl_iface_init)(struct hostapd_data *hapd);
-- 	void (*ctrl_iface_deinit)(struct hostapd_data *hapd);
--@@ -156,6 +156,7 @@ struct hostapd_data {
-- 	struct hostapd_config *iconf;
-- 	struct hostapd_bss_config *conf;
-- 	struct hostapd_ubus_bss ubus;
--+	char *config_id;
-- 	int interface_added; /* virtual interface added for this BSS */
-- 	unsigned int started:1;
-- 	unsigned int disabled:1;
--@@ -600,7 +601,7 @@ struct hostapd_iface {
-- int hostapd_for_each_interface(struct hapd_interfaces *interfaces,
-- 			       int (*cb)(struct hostapd_iface *iface,
-- 					 void *ctx), void *ctx);
---int hostapd_reload_config(struct hostapd_iface *iface);
--+int hostapd_reload_config(struct hostapd_iface *iface, int reconf);
-- void hostapd_reconfig_encryption(struct hostapd_data *hapd);
-- struct hostapd_data *
-- hostapd_alloc_bss_data(struct hostapd_iface *hapd_iface,
----- a/src/drivers/driver_nl80211.c
--+++ b/src/drivers/driver_nl80211.c
--@@ -4508,6 +4508,9 @@ static int wpa_driver_nl80211_set_ap(voi
-- 	if (ret) {
-- 		wpa_printf(MSG_DEBUG, "nl80211: Beacon set failed: %d (%s)",
-- 			   ret, strerror(-ret));
--+		if (!bss->beacon_set)
--+			ret = 0;
--+		bss->beacon_set = 0;
-- 	} else {
-- 		bss->beacon_set = 1;
-- 		nl80211_set_bss(bss, params->cts_protect, params->preamble,
----- a/hostapd/ctrl_iface.c
--+++ b/hostapd/ctrl_iface.c
--@@ -184,7 +184,7 @@ static int hostapd_ctrl_iface_update(str
-- 	iface->interfaces->config_read_cb = hostapd_ctrl_iface_config_read;
-- 	reload_opts = txt;
-- 
---	hostapd_reload_config(iface);
--+	hostapd_reload_config(iface, 0);
-- 
-- 	iface->interfaces->config_read_cb = config_read_cb;
-- }
----- a/hostapd/main.c
--+++ b/hostapd/main.c
--@@ -317,7 +317,7 @@ static void handle_term(int sig, void *s
-- 
-- static int handle_reload_iface(struct hostapd_iface *iface, void *ctx)
-- {
---	if (hostapd_reload_config(iface) < 0) {
--+	if (hostapd_reload_config(iface, 0) < 0) {
-- 		wpa_printf(MSG_WARNING, "Failed to read new configuration "
-- 			   "file - continuing with old.");
-- 	}
----- a/src/ap/wps_hostapd.c
--+++ b/src/ap/wps_hostapd.c
--@@ -315,7 +315,7 @@ static void wps_reload_config(void *eloo
-- 
-- 	wpa_printf(MSG_DEBUG, "WPS: Reload configuration data");
-- 	if (iface->interfaces == NULL ||
---	    iface->interfaces->reload_config(iface) < 0) {
--+	    iface->interfaces->reload_config(iface, 1) < 0) {
-- 		wpa_printf(MSG_WARNING, "WPS: Failed to reload the updated "
-- 			   "configuration");
-- 	}
-diff --git a/package/network/services/hostapd/patches/710-vlan_no_bridge.patch b/package/network/services/hostapd/patches/710-vlan_no_bridge.patch
-deleted file mode 100644
-index 7de4e2c1d4..0000000000
---- a/package/network/services/hostapd/patches/710-vlan_no_bridge.patch
-+++ /dev/null
-@@ -1,33 +0,0 @@
----- a/src/ap/ap_config.h
--+++ b/src/ap/ap_config.h
--@@ -115,6 +115,7 @@ struct hostapd_ssid {
-- #define DYNAMIC_VLAN_OPTIONAL 1
-- #define DYNAMIC_VLAN_REQUIRED 2
-- 	int dynamic_vlan;
--+	int vlan_no_bridge;
-- #define DYNAMIC_VLAN_NAMING_WITHOUT_DEVICE 0
-- #define DYNAMIC_VLAN_NAMING_WITH_DEVICE 1
-- #define DYNAMIC_VLAN_NAMING_END 2
----- a/src/ap/vlan_full.c
--+++ b/src/ap/vlan_full.c
--@@ -466,6 +466,9 @@ void vlan_newlink(const char *ifname, st
-- 
-- 	wpa_printf(MSG_DEBUG, "VLAN: vlan_newlink(%s)", ifname);
-- 
--+	if (hapd->conf->ssid.vlan_no_bridge)
--+		return;
--+
-- 	for (vlan = hapd->conf->vlan; vlan; vlan = vlan->next) {
-- 		if (vlan->configured ||
-- 		    os_strcmp(ifname, vlan->ifname) != 0)
----- a/hostapd/config_file.c
--+++ b/hostapd/config_file.c
--@@ -3400,6 +3400,8 @@ static int hostapd_config_fill(struct ho
-- #ifndef CONFIG_NO_VLAN
-- 	} else if (os_strcmp(buf, "dynamic_vlan") == 0) {
-- 		bss->ssid.dynamic_vlan = atoi(pos);
--+	} else if (os_strcmp(buf, "vlan_no_bridge") == 0) {
--+		bss->ssid.vlan_no_bridge = atoi(pos);
-- 	} else if (os_strcmp(buf, "per_sta_vif") == 0) {
-- 		bss->ssid.per_sta_vif = atoi(pos);
-- 	} else if (os_strcmp(buf, "vlan_file") == 0) {
-diff --git a/package/network/services/hostapd/patches/711-wds_bridge_force.patch b/package/network/services/hostapd/patches/711-wds_bridge_force.patch
-deleted file mode 100644
-index 01507b6d36..0000000000
---- a/package/network/services/hostapd/patches/711-wds_bridge_force.patch
-+++ /dev/null
-@@ -1,22 +0,0 @@
----- a/hostapd/config_file.c
--+++ b/hostapd/config_file.c
--@@ -2405,6 +2405,8 @@ static int hostapd_config_fill(struct ho
-- 			   sizeof(conf->bss[0]->iface));
-- 	} else if (os_strcmp(buf, "bridge") == 0) {
-- 		os_strlcpy(bss->bridge, pos, sizeof(bss->bridge));
--+		if (!bss->wds_bridge[0])
--+			os_strlcpy(bss->wds_bridge, pos, sizeof(bss->wds_bridge));
-- 	} else if (os_strcmp(buf, "vlan_bridge") == 0) {
-- 		os_strlcpy(bss->vlan_bridge, pos, sizeof(bss->vlan_bridge));
-- 	} else if (os_strcmp(buf, "wds_bridge") == 0) {
----- a/src/ap/ap_drv_ops.c
--+++ b/src/ap/ap_drv_ops.c
--@@ -340,8 +340,6 @@ int hostapd_set_wds_sta(struct hostapd_d
-- 		return -1;
-- 	if (hapd->conf->wds_bridge[0])
-- 		bridge = hapd->conf->wds_bridge;
---	else if (hapd->conf->bridge[0])
---		bridge = hapd->conf->bridge;
-- 	return hapd->driver->set_wds_sta(hapd->drv_priv, addr, aid, val,
-- 					 bridge, ifname_wds);
-- }
-diff --git a/package/network/services/hostapd/patches/730-ft_iface.patch b/package/network/services/hostapd/patches/730-ft_iface.patch
-deleted file mode 100644
-index c1adf1ffcf..0000000000
---- a/package/network/services/hostapd/patches/730-ft_iface.patch
-+++ /dev/null
-@@ -1,38 +0,0 @@
----- a/hostapd/config_file.c
--+++ b/hostapd/config_file.c
--@@ -3069,6 +3069,8 @@ static int hostapd_config_fill(struct ho
-- 		wpa_printf(MSG_INFO,
-- 			   "Line %d: Obsolete peerkey parameter ignored", line);
-- #ifdef CONFIG_IEEE80211R_AP
--+	} else if (os_strcmp(buf, "ft_iface") == 0) {
--+		os_strlcpy(bss->ft_iface, pos, sizeof(bss->ft_iface));
-- 	} else if (os_strcmp(buf, "mobility_domain") == 0) {
-- 		if (os_strlen(pos) != 2 * MOBILITY_DOMAIN_ID_LEN ||
-- 		    hexstr2bin(pos, bss->mobility_domain,
----- a/src/ap/ap_config.h
--+++ b/src/ap/ap_config.h
--@@ -284,6 +284,7 @@ struct airtime_sta_weight {
-- struct hostapd_bss_config {
-- 	char iface[IFNAMSIZ + 1];
-- 	char bridge[IFNAMSIZ + 1];
--+	char ft_iface[IFNAMSIZ + 1];
-- 	char vlan_bridge[IFNAMSIZ + 1];
-- 	char wds_bridge[IFNAMSIZ + 1];
-- 
----- a/src/ap/wpa_auth_glue.c
--+++ b/src/ap/wpa_auth_glue.c
--@@ -1511,8 +1511,12 @@ int hostapd_setup_wpa(struct hostapd_dat
-- 	    wpa_key_mgmt_ft(hapd->conf->wpa_key_mgmt)) {
-- 		const char *ft_iface;
-- 
---		ft_iface = hapd->conf->bridge[0] ? hapd->conf->bridge :
---			   hapd->conf->iface;
--+		if (hapd->conf->ft_iface[0])
--+			ft_iface = hapd->conf->ft_iface;
--+		else if (hapd->conf->bridge[0])
--+			ft_iface = hapd->conf->bridge;
--+		else
--+			ft_iface = hapd->conf->iface;
-- 		hapd->l2 = l2_packet_init(ft_iface, NULL, ETH_P_RRB,
-- 					  hostapd_rrb_receive, hapd, 1);
-- 		if (!hapd->l2) {
-diff --git a/package/network/services/hostapd/patches/740-snoop_iface.patch b/package/network/services/hostapd/patches/740-snoop_iface.patch
-deleted file mode 100644
-index 15aaf4b8e4..0000000000
---- a/package/network/services/hostapd/patches/740-snoop_iface.patch
-+++ /dev/null
-@@ -1,66 +0,0 @@
----- a/src/ap/ap_config.h
--+++ b/src/ap/ap_config.h
--@@ -285,6 +285,7 @@ struct hostapd_bss_config {
-- 	char iface[IFNAMSIZ + 1];
-- 	char bridge[IFNAMSIZ + 1];
-- 	char ft_iface[IFNAMSIZ + 1];
--+	char snoop_iface[IFNAMSIZ + 1];
-- 	char vlan_bridge[IFNAMSIZ + 1];
-- 	char wds_bridge[IFNAMSIZ + 1];
-- 
----- a/src/ap/x_snoop.c
--+++ b/src/ap/x_snoop.c
--@@ -31,14 +31,16 @@ int x_snoop_init(struct hostapd_data *ha
-- 		return -1;
-- 	}
-- 
---	if (hostapd_drv_br_port_set_attr(hapd, DRV_BR_PORT_ATTR_HAIRPIN_MODE,
--+	if (!conf->snoop_iface[0] &&
--+	    hostapd_drv_br_port_set_attr(hapd, DRV_BR_PORT_ATTR_HAIRPIN_MODE,
-- 					 1)) {
-- 		wpa_printf(MSG_DEBUG,
-- 			   "x_snoop: Failed to enable hairpin_mode on the bridge port");
-- 		return -1;
-- 	}
-- 
---	if (hostapd_drv_br_port_set_attr(hapd, DRV_BR_PORT_ATTR_PROXYARP, 1)) {
--+	if (!conf->snoop_iface[0] &&
--+	    hostapd_drv_br_port_set_attr(hapd, DRV_BR_PORT_ATTR_PROXYARP, 1)) {
-- 		wpa_printf(MSG_DEBUG,
-- 			   "x_snoop: Failed to enable proxyarp on the bridge port");
-- 		return -1;
--@@ -52,7 +54,8 @@ int x_snoop_init(struct hostapd_data *ha
-- 	}
-- 
-- #ifdef CONFIG_IPV6
---	if (hostapd_drv_br_set_net_param(hapd, DRV_BR_MULTICAST_SNOOPING, 1)) {
--+	if (!conf->snoop_iface[0] &&
--+	    hostapd_drv_br_set_net_param(hapd, DRV_BR_MULTICAST_SNOOPING, 1)) {
-- 		wpa_printf(MSG_DEBUG,
-- 			   "x_snoop: Failed to enable multicast snooping on the bridge");
-- 		return -1;
--@@ -71,8 +74,12 @@ x_snoop_get_l2_packet(struct hostapd_dat
-- {
-- 	struct hostapd_bss_config *conf = hapd->conf;
-- 	struct l2_packet_data *l2;
--+	const char *ifname = conf->bridge;
-- 
---	l2 = l2_packet_init(conf->bridge, NULL, ETH_P_ALL, handler, hapd, 1);
--+	if (conf->snoop_iface[0])
--+		ifname = conf->snoop_iface;
--+
--+	l2 = l2_packet_init(ifname, NULL, ETH_P_ALL, handler, hapd, 1);
-- 	if (l2 == NULL) {
-- 		wpa_printf(MSG_DEBUG,
-- 			   "x_snoop: Failed to initialize L2 packet processing %s",
----- a/hostapd/config_file.c
--+++ b/hostapd/config_file.c
--@@ -2407,6 +2407,8 @@ static int hostapd_config_fill(struct ho
-- 		os_strlcpy(bss->bridge, pos, sizeof(bss->bridge));
-- 		if (!bss->wds_bridge[0])
-- 			os_strlcpy(bss->wds_bridge, pos, sizeof(bss->wds_bridge));
--+	} else if (os_strcmp(buf, "snoop_iface") == 0) {
--+		os_strlcpy(bss->snoop_iface, pos, sizeof(bss->snoop_iface));
-- 	} else if (os_strcmp(buf, "vlan_bridge") == 0) {
-- 		os_strlcpy(bss->vlan_bridge, pos, sizeof(bss->vlan_bridge));
-- 	} else if (os_strcmp(buf, "wds_bridge") == 0) {
-diff --git a/package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch b/package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch
-deleted file mode 100644
-index 94f4a2b297..0000000000
---- a/package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch
-+++ /dev/null
-@@ -1,112 +0,0 @@
----- a/hostapd/config_file.c
--+++ b/hostapd/config_file.c
--@@ -1711,6 +1711,8 @@ static int parse_anqp_elem(struct hostap
-- 	return 0;
-- }
-- 
--+#endif /* CONFIG_INTERWORKING */
--+
-- 
-- static int parse_qos_map_set(struct hostapd_bss_config *bss,
-- 			     char *buf, int line)
--@@ -1752,8 +1754,6 @@ static int parse_qos_map_set(struct host
-- 	return 0;
-- }
-- 
---#endif /* CONFIG_INTERWORKING */
---
-- 
-- #ifdef CONFIG_HS20
-- static int hs20_parse_conn_capab(struct hostapd_bss_config *bss, char *buf,
--@@ -4050,10 +4050,10 @@ static int hostapd_config_fill(struct ho
-- 		bss->gas_frag_limit = val;
-- 	} else if (os_strcmp(buf, "gas_comeback_delay") == 0) {
-- 		bss->gas_comeback_delay = atoi(pos);
--+#endif /* CONFIG_INTERWORKING */
-- 	} else if (os_strcmp(buf, "qos_map_set") == 0) {
-- 		if (parse_qos_map_set(bss, pos, line) < 0)
-- 			return 1;
---#endif /* CONFIG_INTERWORKING */
-- #ifdef CONFIG_RADIUS_TEST
-- 	} else if (os_strcmp(buf, "dump_msk_file") == 0) {
-- 		os_free(bss->dump_msk_file);
----- a/src/ap/hostapd.c
--+++ b/src/ap/hostapd.c
--@@ -1386,6 +1386,7 @@ static int hostapd_setup_bss(struct host
-- 		wpa_printf(MSG_ERROR, "GAS server initialization failed");
-- 		return -1;
-- 	}
--+#endif /* CONFIG_INTERWORKING */
-- 
-- 	if (conf->qos_map_set_len &&
-- 	    hostapd_drv_set_qos_map(hapd, conf->qos_map_set,
--@@ -1393,7 +1394,6 @@ static int hostapd_setup_bss(struct host
-- 		wpa_printf(MSG_ERROR, "Failed to initialize QoS Map");
-- 		return -1;
-- 	}
---#endif /* CONFIG_INTERWORKING */
-- 
-- 	if (conf->bss_load_update_period && bss_load_update_init(hapd)) {
-- 		wpa_printf(MSG_ERROR, "BSS Load initialization failed");
----- a/src/ap/drv_callbacks.c
--+++ b/src/ap/drv_callbacks.c
--@@ -245,12 +245,10 @@ int hostapd_notif_assoc(struct hostapd_d
-- 	}
-- #endif /* NEED_AP_MLME */
-- 
---#ifdef CONFIG_INTERWORKING
-- 	if (elems.ext_capab && elems.ext_capab_len > 4) {
-- 		if (elems.ext_capab[4] & 0x01)
-- 			sta->qos_map_enabled = 1;
-- 	}
---#endif /* CONFIG_INTERWORKING */
-- 
-- #ifdef CONFIG_HS20
-- 	wpabuf_free(sta->hs20_ie);
----- a/src/ap/ieee802_11.c
--+++ b/src/ap/ieee802_11.c
--@@ -2875,13 +2875,11 @@ static u16 copy_supp_rates(struct hostap
-- static u16 check_ext_capab(struct hostapd_data *hapd, struct sta_info *sta,
-- 			   const u8 *ext_capab_ie, size_t ext_capab_ie_len)
-- {
---#ifdef CONFIG_INTERWORKING
-- 	/* check for QoS Map support */
-- 	if (ext_capab_ie_len >= 5) {
-- 		if (ext_capab_ie[4] & 0x01)
-- 			sta->qos_map_enabled = 1;
-- 	}
---#endif /* CONFIG_INTERWORKING */
-- 
-- 	if (ext_capab_ie_len > 0) {
-- 		sta->ecsa_supported = !!(ext_capab_ie[0] & BIT(2));
----- a/wpa_supplicant/events.c
--+++ b/wpa_supplicant/events.c
--@@ -2500,8 +2500,6 @@ void wnm_bss_keep_alive_deinit(struct wp
-- }
-- 
-- 
---#ifdef CONFIG_INTERWORKING
---
-- static int wpas_qos_map_set(struct wpa_supplicant *wpa_s, const u8 *qos_map,
-- 			    size_t len)
-- {
--@@ -2534,8 +2532,6 @@ static void interworking_process_assoc_r
-- 	}
-- }
-- 
---#endif /* CONFIG_INTERWORKING */
---
-- 
-- static void multi_ap_process_assoc_resp(struct wpa_supplicant *wpa_s,
-- 					const u8 *ies, size_t ies_len)
--@@ -2669,10 +2665,8 @@ static int wpa_supplicant_event_associnf
-- 		wnm_process_assoc_resp(wpa_s, data->assoc_info.resp_ies,
-- 				       data->assoc_info.resp_ies_len);
-- #endif /* CONFIG_WNM */
---#ifdef CONFIG_INTERWORKING
-- 		interworking_process_assoc_resp(wpa_s, data->assoc_info.resp_ies,
-- 						data->assoc_info.resp_ies_len);
---#endif /* CONFIG_INTERWORKING */
-- 		if (wpa_s->hw_capab == CAPAB_VHT &&
-- 		    get_ie(data->assoc_info.resp_ies,
-- 			   data->assoc_info.resp_ies_len, WLAN_EID_VHT_CAP))
-diff --git a/package/network/services/hostapd/patches/800-dfs-enter-DFS-state-if-no-available-channel-is-found.patch b/package/network/services/hostapd/patches/800-dfs-enter-DFS-state-if-no-available-channel-is-found.patch
-deleted file mode 100644
-index 3e4638d7ff..0000000000
---- a/package/network/services/hostapd/patches/800-dfs-enter-DFS-state-if-no-available-channel-is-found.patch
-+++ /dev/null
-@@ -1,37 +0,0 @@
--From cefc52e6b93731c713f1bba1cb5e7e92105b758b Mon Sep 17 00:00:00 2001
--From: David Bauer <mail@david-bauer.net>
--Date: Fri, 3 Jul 2020 23:00:34 +0200
--Subject: [PATCH] dfs: enter DFS state if no available channel is found
--
--Previously hostapd would not stop transmitting when a DFS event was
--detected and no available channel to switch to was available.
--
--Disable and re-enable the interface to enter DFS state. This way, TX
--does not happen until the kernel notifies hostapd about the NOP
--expiring.
--
--Signed-off-by: David Bauer <mail@david-bauer.net>
-----
-- src/ap/dfs.c | 11 +++++++++--
-- 1 file changed, 9 insertions(+), 2 deletions(-)
--
----- a/src/ap/dfs.c
--+++ b/src/ap/dfs.c
--@@ -1086,8 +1086,15 @@ static int hostapd_dfs_start_channel_swi
-- 						  &oper_centr_freq_seg0_idx,
-- 						  &oper_centr_freq_seg1_idx,
-- 						  &skip_radar);
---		if (!channel)
---			return err;
--+		if (!channel) {
--+			/*
--+			 * Toggle interface state to enter DFS state
--+			 * until NOP is finished.
--+			 */
--+			hostapd_disable_iface(iface);
--+			hostapd_enable_iface(iface);
--+			return 0;
--+		}
-- 		if (!skip_radar) {
-- 			iface->freq = channel->freq;
-- 			iface->conf->channel = channel->chan;
-diff --git a/package/network/services/hostapd/patches/801-P2P-Fix-copying-of-secondary-device-types-for-P2P-gr.patch b/package/network/services/hostapd/patches/801-P2P-Fix-copying-of-secondary-device-types-for-P2P-gr.patch
-deleted file mode 100644
-index 944f7d71c9..0000000000
---- a/package/network/services/hostapd/patches/801-P2P-Fix-copying-of-secondary-device-types-for-P2P-gr.patch
-+++ /dev/null
-@@ -1,33 +0,0 @@
--From 947272febe24a8f0ea828b5b2f35f13c3821901e Mon Sep 17 00:00:00 2001
--From: Jouni Malinen <jouni@codeaurora.org>
--Date: Mon, 9 Nov 2020 11:43:12 +0200
--Subject: [PATCH] P2P: Fix copying of secondary device types for P2P group
-- client
--
--Parsing and copying of WPS secondary device types list was verifying
--that the contents is not too long for the internal maximum in the case
--of WPS messages, but similar validation was missing from the case of P2P
--group information which encodes this information in a different
--attribute. This could result in writing beyond the memory area assigned
--for these entries and corrupting memory within an instance of struct
--p2p_device. This could result in invalid operations and unexpected
--behavior when trying to free pointers from that corrupted memory.
--
--Credit to OSS-Fuzz: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=27269
--Fixes: e57ae6e19edf ("P2P: Keep track of secondary device types for peers")
--Signed-off-by: Jouni Malinen <jouni@codeaurora.org>
-----
-- src/p2p/p2p.c | 2 ++
-- 1 file changed, 2 insertions(+)
--
----- a/src/p2p/p2p.c
--+++ b/src/p2p/p2p.c
--@@ -453,6 +453,8 @@ static void p2p_copy_client_info(struct
-- 	dev->info.config_methods = cli->config_methods;
-- 	os_memcpy(dev->info.pri_dev_type, cli->pri_dev_type, 8);
-- 	dev->info.wps_sec_dev_type_list_len = 8 * cli->num_sec_dev_types;
--+	if (dev->info.wps_sec_dev_type_list_len > WPS_SEC_DEV_TYPE_MAX_LEN)
--+		dev->info.wps_sec_dev_type_list_len = WPS_SEC_DEV_TYPE_MAX_LEN;
-- 	os_memcpy(dev->info.wps_sec_dev_type_list, cli->sec_dev_types,
-- 		  dev->info.wps_sec_dev_type_list_len);
-- }
-diff --git a/package/network/services/hostapd/patches/802-wolfssl-init-RNG-with-ECC-key.patch b/package/network/services/hostapd/patches/802-wolfssl-init-RNG-with-ECC-key.patch
-deleted file mode 100644
-index 84fc1c9351..0000000000
---- a/package/network/services/hostapd/patches/802-wolfssl-init-RNG-with-ECC-key.patch
-+++ /dev/null
-@@ -1,43 +0,0 @@
--From 21ce83b4ae2b9563175fdb4fc4312096cc399cf8 Mon Sep 17 00:00:00 2001
--From: David Bauer <mail@david-bauer.net>
--Date: Wed, 5 May 2021 00:44:34 +0200
--Subject: [PATCH] wolfssl: add RNG to EC key
--
--Since upstream commit 6467de5a8840 ("Randomize z ordinates in
--scalar mult when timing resistant") WolfSSL requires a RNG for
--the EC key when built hardened which is the default.
--
--Set the RNG for the EC key to fix connections for OWE clients.
--
--Signed-off-by: David Bauer <mail@david-bauer.net>
-----
-- src/crypto/crypto_wolfssl.c | 4 ++++
-- 1 file changed, 4 insertions(+)
--
----- a/src/crypto/crypto_wolfssl.c
--+++ b/src/crypto/crypto_wolfssl.c
--@@ -1303,6 +1303,7 @@ int ecc_projective_add_point(ecc_point *
-- 
-- struct crypto_ec {
-- 	ecc_key key;
--+	WC_RNG rng;
-- 	mp_int a;
-- 	mp_int prime;
-- 	mp_int order;
--@@ -1357,6 +1358,8 @@ struct crypto_ec * crypto_ec_init(int gr
-- 		return NULL;
-- 
-- 	if (wc_ecc_init(&e->key) != 0 ||
--+	    wc_InitRng(&e->rng) != 0 ||
--+	    wc_ecc_set_rng(&e->key, &e->rng) != 0 ||
-- 	    wc_ecc_set_curve(&e->key, 0, curve_id) != 0 ||
-- 	    mp_init(&e->a) != MP_OKAY ||
-- 	    mp_init(&e->prime) != MP_OKAY ||
--@@ -1388,6 +1391,7 @@ void crypto_ec_deinit(struct crypto_ec*
-- 	mp_clear(&e->order);
-- 	mp_clear(&e->prime);
-- 	mp_clear(&e->a);
--+	wc_FreeRng(&e->rng);
-- 	wc_ecc_free(&e->key);
-- 	os_free(e);
-- }
-diff --git a/package/network/services/hostapd/src/src/ap/ubus.c b/package/network/services/hostapd/src/src/ap/ubus.c
-deleted file mode 100644
-index 0575fe2572..0000000000
---- a/package/network/services/hostapd/src/src/ap/ubus.c
-+++ /dev/null
-@@ -1,1557 +0,0 @@
--/*
-- * hostapd / ubus support
-- * Copyright (c) 2013, Felix Fietkau <nbd@nbd.name>
-- *
-- * This software may be distributed under the terms of the BSD license.
-- * See README for more details.
-- */
--
--#include "utils/includes.h"
--#include "utils/common.h"
--#include "utils/eloop.h"
--#include "utils/wpabuf.h"
--#include "common/ieee802_11_defs.h"
--#include "hostapd.h"
--#include "neighbor_db.h"
--#include "wps_hostapd.h"
--#include "sta_info.h"
--#include "ubus.h"
--#include "ap_drv_ops.h"
--#include "beacon.h"
--#include "rrm.h"
--#include "wnm_ap.h"
--#include "taxonomy.h"
--
--static struct ubus_context *ctx;
--static struct blob_buf b;
--static int ctx_ref;
--
--static inline struct hapd_interfaces *get_hapd_interfaces_from_object(struct ubus_object *obj)
--{
--	return container_of(obj, struct hapd_interfaces, ubus);
--}
--
--static inline struct hostapd_data *get_hapd_from_object(struct ubus_object *obj)
--{
--	return container_of(obj, struct hostapd_data, ubus.obj);
--}
--
--struct ubus_banned_client {
--	struct avl_node avl;
--	u8 addr[ETH_ALEN];
--};
--
--static void ubus_receive(int sock, void *eloop_ctx, void *sock_ctx)
--{
--	struct ubus_context *ctx = eloop_ctx;
--	ubus_handle_event(ctx);
--}
--
--static void ubus_reconnect_timeout(void *eloop_data, void *user_ctx)
--{
--	if (ubus_reconnect(ctx, NULL)) {
--		eloop_register_timeout(1, 0, ubus_reconnect_timeout, ctx, NULL);
--		return;
--	}
--
--	eloop_register_read_sock(ctx->sock.fd, ubus_receive, ctx, NULL);
--}
--
--static void hostapd_ubus_connection_lost(struct ubus_context *ctx)
--{
--	eloop_unregister_read_sock(ctx->sock.fd);
--	eloop_register_timeout(1, 0, ubus_reconnect_timeout, ctx, NULL);
--}
--
--static bool hostapd_ubus_init(void)
--{
--	if (ctx)
--		return true;
--
--	ctx = ubus_connect(NULL);
--	if (!ctx)
--		return false;
--
--	ctx->connection_lost = hostapd_ubus_connection_lost;
--	eloop_register_read_sock(ctx->sock.fd, ubus_receive, ctx, NULL);
--	return true;
--}
--
--static void hostapd_ubus_ref_inc(void)
--{
--	ctx_ref++;
--}
--
--static void hostapd_ubus_ref_dec(void)
--{
--	ctx_ref--;
--	if (!ctx)
--		return;
--
--	if (ctx_ref)
--		return;
--
--	eloop_unregister_read_sock(ctx->sock.fd);
--	ubus_free(ctx);
--	ctx = NULL;
--}
--
--void hostapd_ubus_add_iface(struct hostapd_iface *iface)
--{
--	if (!hostapd_ubus_init())
--		return;
--}
--
--void hostapd_ubus_free_iface(struct hostapd_iface *iface)
--{
--	if (!ctx)
--		return;
--}
--
--static void hostapd_notify_ubus(struct ubus_object *obj, char *bssname, char *event)
--{
--	char *event_type;
--
--	if (!ctx || !obj)
--		return;
--
--	if (asprintf(&event_type, "bss.%s", event) < 0)
--		return;
--
--	blob_buf_init(&b, 0);
--	blobmsg_add_string(&b, "name", bssname);
--	ubus_notify(ctx, obj, event_type, b.head, -1);
--	free(event_type);
--}
--
--static void hostapd_send_procd_event(char *bssname, char *event)
--{
--	char *name, *s;
--	uint32_t id;
--	void *v;
--
--	if (!ctx || ubus_lookup_id(ctx, "service", &id))
--		return;
--
--	if (asprintf(&name, "hostapd.%s.%s", bssname, event) < 0)
--		return;
--
--	blob_buf_init(&b, 0);
--
--	s = blobmsg_alloc_string_buffer(&b, "type", strlen(name) + 1);
--	sprintf(s, "%s", name);
--	blobmsg_add_string_buffer(&b);
--
--	v = blobmsg_open_table(&b, "data");
--	blobmsg_close_table(&b, v);
--
--	ubus_invoke(ctx, id, "event", b.head, NULL, NULL, 1000);
--
--	free(name);
--}
--
--static void hostapd_send_shared_event(struct ubus_object *obj, char *bssname, char *event)
--{
--	hostapd_send_procd_event(bssname, event);
--	hostapd_notify_ubus(obj, bssname, event);
--}
--
--static void
--hostapd_bss_del_ban(void *eloop_data, void *user_ctx)
--{
--	struct ubus_banned_client *ban = eloop_data;
--	struct hostapd_data *hapd = user_ctx;
--
--	avl_delete(&hapd->ubus.banned, &ban->avl);
--	free(ban);
--}
--
--static void
--hostapd_bss_ban_client(struct hostapd_data *hapd, u8 *addr, int time)
--{
--	struct ubus_banned_client *ban;
--
--	if (time < 0)
--		time = 0;
--
--	ban = avl_find_element(&hapd->ubus.banned, addr, ban, avl);
--	if (!ban) {
--		if (!time)
--			return;
--
--		ban = os_zalloc(sizeof(*ban));
--		memcpy(ban->addr, addr, sizeof(ban->addr));
--		ban->avl.key = ban->addr;
--		avl_insert(&hapd->ubus.banned, &ban->avl);
--	} else {
--		eloop_cancel_timeout(hostapd_bss_del_ban, ban, hapd);
--		if (!time) {
--			hostapd_bss_del_ban(ban, hapd);
--			return;
--		}
--	}
--
--	eloop_register_timeout(0, time * 1000, hostapd_bss_del_ban, ban, hapd);
--}
--
--static int
--hostapd_bss_reload(struct ubus_context *ctx, struct ubus_object *obj,
--		   struct ubus_request_data *req, const char *method,
--		   struct blob_attr *msg)
--{
--	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
--	int ret = hostapd_reload_config(hapd->iface, 1);
--
--	hostapd_send_shared_event(&hapd->iface->interfaces->ubus, hapd->conf->iface, "reload");
--	return ret;
--}
--
--
--static void
--hostapd_parse_vht_map_blobmsg(uint16_t map)
--{
--	char label[4];
--	int16_t val;
--	int i;
--
--	for (i = 0; i < 8; i++) {
--		snprintf(label, 4, "%dss", i + 1);
--
--		val = (map & (BIT(1) | BIT(0))) + 7;
--		blobmsg_add_u16(&b, label, val == 10 ? -1 : val);
--		map = map >> 2;
--	}
--}
--
--static void
--hostapd_parse_vht_capab_blobmsg(struct ieee80211_vht_capabilities *vhtc)
--{
--	void *supported_mcs;
--	void *map;
--	int i;
--
--	static const struct {
--		const char *name;
--		uint32_t flag;
--	} vht_capas[] = {
--		{ "su_beamformee", VHT_CAP_SU_BEAMFORMEE_CAPABLE },
--		{ "mu_beamformee", VHT_CAP_MU_BEAMFORMEE_CAPABLE },
--	};
--
--	for (i = 0; i < ARRAY_SIZE(vht_capas); i++)
--		blobmsg_add_u8(&b, vht_capas[i].name,
--				!!(vhtc->vht_capabilities_info & vht_capas[i].flag));
--
--	supported_mcs = blobmsg_open_table(&b, "mcs_map");
--
--	/* RX map */
--	map = blobmsg_open_table(&b, "rx");
--	hostapd_parse_vht_map_blobmsg(le_to_host16(vhtc->vht_supported_mcs_set.rx_map));
--	blobmsg_close_table(&b, map);
--
--	/* TX map */
--	map = blobmsg_open_table(&b, "tx");
--	hostapd_parse_vht_map_blobmsg(le_to_host16(vhtc->vht_supported_mcs_set.tx_map));
--	blobmsg_close_table(&b, map);
--
--	blobmsg_close_table(&b, supported_mcs);
--}
--
--static void
--hostapd_parse_capab_blobmsg(struct sta_info *sta)
--{
--	void *r, *v;
--
--	v = blobmsg_open_table(&b, "capabilities");
--
--	if (sta->vht_capabilities) {
--		r = blobmsg_open_table(&b, "vht");
--		hostapd_parse_vht_capab_blobmsg(sta->vht_capabilities);
--		blobmsg_close_table(&b, r);
--	}
--
--	/* ToDo: Add HT / HE capability parsing */
--
--	blobmsg_close_table(&b, v);
--}
--
--static int
--hostapd_bss_get_clients(struct ubus_context *ctx, struct ubus_object *obj,
--			struct ubus_request_data *req, const char *method,
--			struct blob_attr *msg)
--{
--	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
--	struct hostap_sta_driver_data sta_driver_data;
--	struct sta_info *sta;
--	void *list, *c;
--	char mac_buf[20];
--	static const struct {
--		const char *name;
--		uint32_t flag;
--	} sta_flags[] = {
--		{ "auth", WLAN_STA_AUTH },
--		{ "assoc", WLAN_STA_ASSOC },
--		{ "authorized", WLAN_STA_AUTHORIZED },
--		{ "preauth", WLAN_STA_PREAUTH },
--		{ "wds", WLAN_STA_WDS },
--		{ "wmm", WLAN_STA_WMM },
--		{ "ht", WLAN_STA_HT },
--		{ "vht", WLAN_STA_VHT },
--		{ "wps", WLAN_STA_WPS },
--		{ "mfp", WLAN_STA_MFP },
--	};
--
--	blob_buf_init(&b, 0);
--	blobmsg_add_u32(&b, "freq", hapd->iface->freq);
--	list = blobmsg_open_table(&b, "clients");
--	for (sta = hapd->sta_list; sta; sta = sta->next) {
--		void *r;
--		int i;
--
--		sprintf(mac_buf, MACSTR, MAC2STR(sta->addr));
--		c = blobmsg_open_table(&b, mac_buf);
--		for (i = 0; i < ARRAY_SIZE(sta_flags); i++)
--			blobmsg_add_u8(&b, sta_flags[i].name,
--				       !!(sta->flags & sta_flags[i].flag));
--
--		r = blobmsg_open_array(&b, "rrm");
--		for (i = 0; i < ARRAY_SIZE(sta->rrm_enabled_capa); i++)
--			blobmsg_add_u32(&b, "", sta->rrm_enabled_capa[i]);
--		blobmsg_close_array(&b, r);
--		blobmsg_add_u32(&b, "aid", sta->aid);
--#ifdef CONFIG_TAXONOMY
--		r = blobmsg_alloc_string_buffer(&b, "signature", 1024);
--		if (retrieve_sta_taxonomy(hapd, sta, r, 1024) > 0)
--			blobmsg_add_string_buffer(&b);
--#endif
--
--		/* Driver information */
--		if (hostapd_drv_read_sta_data(hapd, &sta_driver_data, sta->addr) >= 0) {
--			r = blobmsg_open_table(&b, "bytes");
--			blobmsg_add_u64(&b, "rx", sta_driver_data.rx_bytes);
--			blobmsg_add_u64(&b, "tx", sta_driver_data.tx_bytes);
--			blobmsg_close_table(&b, r);
--			r = blobmsg_open_table(&b, "airtime");
--			blobmsg_add_u64(&b, "rx", sta_driver_data.rx_airtime);
--			blobmsg_add_u64(&b, "tx", sta_driver_data.tx_airtime);
--			blobmsg_close_table(&b, r);
--			r = blobmsg_open_table(&b, "packets");
--			blobmsg_add_u32(&b, "rx", sta_driver_data.rx_packets);
--			blobmsg_add_u32(&b, "tx", sta_driver_data.tx_packets);
--			blobmsg_close_table(&b, r);
--			r = blobmsg_open_table(&b, "rate");
--			/* Rate in kbits */
--			blobmsg_add_u32(&b, "rx", sta_driver_data.current_rx_rate * 100);
--			blobmsg_add_u32(&b, "tx", sta_driver_data.current_tx_rate * 100);
--			blobmsg_close_table(&b, r);
--			blobmsg_add_u32(&b, "signal", sta_driver_data.signal);
--		}
--
--		hostapd_parse_capab_blobmsg(sta);
--
--		blobmsg_close_table(&b, c);
--	}
--	blobmsg_close_array(&b, list);
--	ubus_send_reply(ctx, req, b.head);
--
--	return 0;
--}
--
--static int
--hostapd_bss_get_features(struct ubus_context *ctx, struct ubus_object *obj,
--			struct ubus_request_data *req, const char *method,
--			struct blob_attr *msg)
--{
--	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
--
--	blob_buf_init(&b, 0);
--	blobmsg_add_u8(&b, "ht_supported", ht_supported(hapd->iface->hw_features));
--	blobmsg_add_u8(&b, "vht_supported", vht_supported(hapd->iface->hw_features));
--	ubus_send_reply(ctx, req, b.head);
--
--	return 0;
--}
--
--static int
--hostapd_bss_get_status(struct ubus_context *ctx, struct ubus_object *obj,
--		       struct ubus_request_data *req, const char *method,
--		       struct blob_attr *msg)
--{
--	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
--	void *airtime_table, *dfs_table;
--	struct os_reltime now;
--	char phy_name[17];
--	char mac_buf[20];
--
--	blob_buf_init(&b, 0);
--	blobmsg_add_string(&b, "status", hostapd_state_text(hapd->iface->state));
--	blobmsg_add_u32(&b, "freq", hapd->iface->freq);
--
--	snprintf(phy_name, 17, "%s", hapd->iface->phy);
--	blobmsg_add_string(&b, "phy", phy_name);
--
--	/* Airtime */
--	airtime_table = blobmsg_open_table(&b, "airtime");
--	blobmsg_add_u64(&b, "time", hapd->iface->last_channel_time);
--	blobmsg_add_u64(&b, "time_busy", hapd->iface->last_channel_time_busy);
--	blobmsg_add_u16(&b, "utilization", hapd->iface->channel_utilization);
--	blobmsg_close_table(&b, airtime_table);
--
--	/* DFS */
--	dfs_table = blobmsg_open_table(&b, "dfs");
--	blobmsg_add_u32(&b, "cac_seconds", hapd->iface->dfs_cac_ms / 1000);
--	blobmsg_add_u8(&b, "cac_active", !!(hapd->iface->cac_started));
--	os_reltime_age(&hapd->iface->dfs_cac_start, &now);
--	blobmsg_add_u32(&b, "cac_seconds_left",
--			hapd->iface->cac_started ? hapd->iface->dfs_cac_ms / 1000 - now.sec : 0);
--	blobmsg_close_table(&b, dfs_table);
--
--	ubus_send_reply(ctx, req, b.head);
--
--	return 0;
--}
--
--enum {
--	NOTIFY_RESPONSE,
--	__NOTIFY_MAX
--};
--
--static const struct blobmsg_policy notify_policy[__NOTIFY_MAX] = {
--	[NOTIFY_RESPONSE] = { "notify_response", BLOBMSG_TYPE_INT32 },
--};
--
--static int
--hostapd_notify_response(struct ubus_context *ctx, struct ubus_object *obj,
--			struct ubus_request_data *req, const char *method,
--			struct blob_attr *msg)
--{
--	struct blob_attr *tb[__NOTIFY_MAX];
--	struct hostapd_data *hapd = get_hapd_from_object(obj);
--	struct wpabuf *elems;
--	const char *pos;
--	size_t len;
--
--	blobmsg_parse(notify_policy, __NOTIFY_MAX, tb,
--		      blob_data(msg), blob_len(msg));
--
--	if (!tb[NOTIFY_RESPONSE])
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	hapd->ubus.notify_response = blobmsg_get_u32(tb[NOTIFY_RESPONSE]);
--
--	return UBUS_STATUS_OK;
--}
--
--enum {
--	DEL_CLIENT_ADDR,
--	DEL_CLIENT_REASON,
--	DEL_CLIENT_DEAUTH,
--	DEL_CLIENT_BAN_TIME,
--	__DEL_CLIENT_MAX
--};
--
--static const struct blobmsg_policy del_policy[__DEL_CLIENT_MAX] = {
--	[DEL_CLIENT_ADDR] = { "addr", BLOBMSG_TYPE_STRING },
--	[DEL_CLIENT_REASON] = { "reason", BLOBMSG_TYPE_INT32 },
--	[DEL_CLIENT_DEAUTH] = { "deauth", BLOBMSG_TYPE_INT8 },
--	[DEL_CLIENT_BAN_TIME] = { "ban_time", BLOBMSG_TYPE_INT32 },
--};
--
--static int
--hostapd_bss_del_client(struct ubus_context *ctx, struct ubus_object *obj,
--			struct ubus_request_data *req, const char *method,
--			struct blob_attr *msg)
--{
--	struct blob_attr *tb[__DEL_CLIENT_MAX];
--	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
--	struct sta_info *sta;
--	bool deauth = false;
--	int reason;
--	u8 addr[ETH_ALEN];
--
--	blobmsg_parse(del_policy, __DEL_CLIENT_MAX, tb, blob_data(msg), blob_len(msg));
--
--	if (!tb[DEL_CLIENT_ADDR])
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	if (hwaddr_aton(blobmsg_data(tb[DEL_CLIENT_ADDR]), addr))
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	if (tb[DEL_CLIENT_REASON])
--		reason = blobmsg_get_u32(tb[DEL_CLIENT_REASON]);
--
--	if (tb[DEL_CLIENT_DEAUTH])
--		deauth = blobmsg_get_bool(tb[DEL_CLIENT_DEAUTH]);
--
--	sta = ap_get_sta(hapd, addr);
--	if (sta) {
--		if (deauth) {
--			hostapd_drv_sta_deauth(hapd, addr, reason);
--			ap_sta_deauthenticate(hapd, sta, reason);
--		} else {
--			hostapd_drv_sta_disassoc(hapd, addr, reason);
--			ap_sta_disassociate(hapd, sta, reason);
--		}
--	}
--
--	if (tb[DEL_CLIENT_BAN_TIME])
--		hostapd_bss_ban_client(hapd, addr, blobmsg_get_u32(tb[DEL_CLIENT_BAN_TIME]));
--
--	return 0;
--}
--
--static void
--blobmsg_add_macaddr(struct blob_buf *buf, const char *name, const u8 *addr)
--{
--	char *s;
--
--	s = blobmsg_alloc_string_buffer(buf, name, 20);
--	sprintf(s, MACSTR, MAC2STR(addr));
--	blobmsg_add_string_buffer(buf);
--}
--
--static int
--hostapd_bss_list_bans(struct ubus_context *ctx, struct ubus_object *obj,
--		      struct ubus_request_data *req, const char *method,
--		      struct blob_attr *msg)
--{
--	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
--	struct ubus_banned_client *ban;
--	void *c;
--
--	blob_buf_init(&b, 0);
--	c = blobmsg_open_array(&b, "clients");
--	avl_for_each_element(&hapd->ubus.banned, ban, avl)
--		blobmsg_add_macaddr(&b, NULL, ban->addr);
--	blobmsg_close_array(&b, c);
--	ubus_send_reply(ctx, req, b.head);
--
--	return 0;
--}
--
--#ifdef CONFIG_WPS
--static int
--hostapd_bss_wps_start(struct ubus_context *ctx, struct ubus_object *obj,
--			struct ubus_request_data *req, const char *method,
--			struct blob_attr *msg)
--{
--	int rc;
--	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
--
--	rc = hostapd_wps_button_pushed(hapd, NULL);
--
--	if (rc != 0)
--		return UBUS_STATUS_NOT_SUPPORTED;
--
--	return 0;
--}
--
--
--static const char * pbc_status_enum_str(enum pbc_status status)
--{
--	switch (status) {
--	case WPS_PBC_STATUS_DISABLE:
--		return "Disabled";
--	case WPS_PBC_STATUS_ACTIVE:
--		return "Active";
--	case WPS_PBC_STATUS_TIMEOUT:
--		return "Timed-out";
--	case WPS_PBC_STATUS_OVERLAP:
--		return "Overlap";
--	default:
--		return "Unknown";
--	}
--}
--
--static int
--hostapd_bss_wps_status(struct ubus_context *ctx, struct ubus_object *obj,
--			struct ubus_request_data *req, const char *method,
--			struct blob_attr *msg)
--{
--	int rc;
--	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
--
--	blob_buf_init(&b, 0);
--
--	blobmsg_add_string(&b, "pbc_status", pbc_status_enum_str(hapd->wps_stats.pbc_status));
--	blobmsg_add_string(&b, "last_wps_result",
--			   (hapd->wps_stats.status == WPS_STATUS_SUCCESS ?
--			    "Success":
--			    (hapd->wps_stats.status == WPS_STATUS_FAILURE ?
--			     "Failed" : "None")));
--
--	/* If status == Failure - Add possible Reasons */
--	if(hapd->wps_stats.status == WPS_STATUS_FAILURE &&
--	   hapd->wps_stats.failure_reason > 0)
--		blobmsg_add_string(&b, "reason", wps_ei_str(hapd->wps_stats.failure_reason));
--
--	if (hapd->wps_stats.status)
--		blobmsg_printf(&b, "peer_address", MACSTR, MAC2STR(hapd->wps_stats.peer_addr));
--
--	ubus_send_reply(ctx, req, b.head);
--
--	return 0;
--}
--
--static int
--hostapd_bss_wps_cancel(struct ubus_context *ctx, struct ubus_object *obj,
--			struct ubus_request_data *req, const char *method,
--			struct blob_attr *msg)
--{
--	int rc;
--	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
--
--	rc = hostapd_wps_cancel(hapd);
--
--	if (rc != 0)
--		return UBUS_STATUS_NOT_SUPPORTED;
--
--	return 0;
--}
--#endif /* CONFIG_WPS */
--
--static int
--hostapd_bss_update_beacon(struct ubus_context *ctx, struct ubus_object *obj,
--			struct ubus_request_data *req, const char *method,
--			struct blob_attr *msg)
--{
--	int rc;
--	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
--
--	rc = ieee802_11_set_beacon(hapd);
--
--	if (rc != 0)
--		return UBUS_STATUS_NOT_SUPPORTED;
--
--	return 0;
--}
--
--enum {
--	CONFIG_IFACE,
--	CONFIG_FILE,
--	__CONFIG_MAX
--};
--
--static const struct blobmsg_policy config_add_policy[__CONFIG_MAX] = {
--	[CONFIG_IFACE] = { "iface", BLOBMSG_TYPE_STRING },
--	[CONFIG_FILE] = { "config", BLOBMSG_TYPE_STRING },
--};
--
--static int
--hostapd_config_add(struct ubus_context *ctx, struct ubus_object *obj,
--		   struct ubus_request_data *req, const char *method,
--		   struct blob_attr *msg)
--{
--	struct blob_attr *tb[__CONFIG_MAX];
--	struct hapd_interfaces *interfaces = get_hapd_interfaces_from_object(obj);
--	char buf[128];
--
--	blobmsg_parse(config_add_policy, __CONFIG_MAX, tb, blob_data(msg), blob_len(msg));
--
--	if (!tb[CONFIG_FILE] || !tb[CONFIG_IFACE])
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	snprintf(buf, sizeof(buf), "bss_config=%s:%s",
--		blobmsg_get_string(tb[CONFIG_IFACE]),
--		blobmsg_get_string(tb[CONFIG_FILE]));
--
--	if (hostapd_add_iface(interfaces, buf))
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	blob_buf_init(&b, 0);
--	blobmsg_add_u32(&b, "pid", getpid());
--	ubus_send_reply(ctx, req, b.head);
--
--	return UBUS_STATUS_OK;
--}
--
--enum {
--	CONFIG_REM_IFACE,
--	__CONFIG_REM_MAX
--};
--
--static const struct blobmsg_policy config_remove_policy[__CONFIG_REM_MAX] = {
--	[CONFIG_REM_IFACE] = { "iface", BLOBMSG_TYPE_STRING },
--};
--
--static int
--hostapd_config_remove(struct ubus_context *ctx, struct ubus_object *obj,
--		      struct ubus_request_data *req, const char *method,
--		      struct blob_attr *msg)
--{
--	struct blob_attr *tb[__CONFIG_REM_MAX];
--	struct hapd_interfaces *interfaces = get_hapd_interfaces_from_object(obj);
--	char buf[128];
--
--	blobmsg_parse(config_remove_policy, __CONFIG_REM_MAX, tb, blob_data(msg), blob_len(msg));
--
--	if (!tb[CONFIG_REM_IFACE])
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	if (hostapd_remove_iface(interfaces, blobmsg_get_string(tb[CONFIG_REM_IFACE])))
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	return UBUS_STATUS_OK;
--}
--
--enum {
--	CSA_FREQ,
--	CSA_BCN_COUNT,
--	CSA_CENTER_FREQ1,
--	CSA_CENTER_FREQ2,
--	CSA_BANDWIDTH,
--	CSA_SEC_CHANNEL_OFFSET,
--	CSA_HT,
--	CSA_VHT,
--	CSA_BLOCK_TX,
--	__CSA_MAX
--};
--
--static const struct blobmsg_policy csa_policy[__CSA_MAX] = {
--	[CSA_FREQ] = { "freq", BLOBMSG_TYPE_INT32 },
--	[CSA_BCN_COUNT] = { "bcn_count", BLOBMSG_TYPE_INT32 },
--	[CSA_CENTER_FREQ1] = { "center_freq1", BLOBMSG_TYPE_INT32 },
--	[CSA_CENTER_FREQ2] = { "center_freq2", BLOBMSG_TYPE_INT32 },
--	[CSA_BANDWIDTH] = { "bandwidth", BLOBMSG_TYPE_INT32 },
--	[CSA_SEC_CHANNEL_OFFSET] = { "sec_channel_offset", BLOBMSG_TYPE_INT32 },
--	[CSA_HT] = { "ht", BLOBMSG_TYPE_BOOL },
--	[CSA_VHT] = { "vht", BLOBMSG_TYPE_BOOL },
--	[CSA_BLOCK_TX] = { "block_tx", BLOBMSG_TYPE_BOOL },
--};
--
--#ifdef NEED_AP_MLME
--static int
--hostapd_switch_chan(struct ubus_context *ctx, struct ubus_object *obj,
--		    struct ubus_request_data *req, const char *method,
--		    struct blob_attr *msg)
--{
--	struct blob_attr *tb[__CSA_MAX];
--	struct hostapd_data *hapd = get_hapd_from_object(obj);
--	struct csa_settings css;
--
--	blobmsg_parse(csa_policy, __CSA_MAX, tb, blob_data(msg), blob_len(msg));
--
--	if (!tb[CSA_FREQ])
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	memset(&css, 0, sizeof(css));
--	css.freq_params.freq = blobmsg_get_u32(tb[CSA_FREQ]);
--
--#define SET_CSA_SETTING(name, field, type) \
--	do { \
--		if (tb[name]) \
--			css.field = blobmsg_get_ ## type(tb[name]); \
--	} while(0)
--
--	SET_CSA_SETTING(CSA_BCN_COUNT, cs_count, u32);
--	SET_CSA_SETTING(CSA_CENTER_FREQ1, freq_params.center_freq1, u32);
--	SET_CSA_SETTING(CSA_CENTER_FREQ2, freq_params.center_freq2, u32);
--	SET_CSA_SETTING(CSA_BANDWIDTH, freq_params.bandwidth, u32);
--	SET_CSA_SETTING(CSA_SEC_CHANNEL_OFFSET, freq_params.sec_channel_offset, u32);
--	SET_CSA_SETTING(CSA_HT, freq_params.ht_enabled, bool);
--	SET_CSA_SETTING(CSA_VHT, freq_params.vht_enabled, bool);
--	SET_CSA_SETTING(CSA_BLOCK_TX, block_tx, bool);
--
--
--	if (hostapd_switch_channel(hapd, &css) != 0)
--		return UBUS_STATUS_NOT_SUPPORTED;
--	return UBUS_STATUS_OK;
--#undef SET_CSA_SETTING
--}
--#endif
--
--enum {
--	VENDOR_ELEMENTS,
--	__VENDOR_ELEMENTS_MAX
--};
--
--static const struct blobmsg_policy ve_policy[__VENDOR_ELEMENTS_MAX] = {
--	/* vendor elements are provided as hex-string */
--	[VENDOR_ELEMENTS] = { "vendor_elements", BLOBMSG_TYPE_STRING },
--};
--
--static int
--hostapd_vendor_elements(struct ubus_context *ctx, struct ubus_object *obj,
--			struct ubus_request_data *req, const char *method,
--			struct blob_attr *msg)
--{
--	struct blob_attr *tb[__VENDOR_ELEMENTS_MAX];
--	struct hostapd_data *hapd = get_hapd_from_object(obj);
--	struct hostapd_bss_config *bss = hapd->conf;
--	struct wpabuf *elems;
--	const char *pos;
--	size_t len;
--
--	blobmsg_parse(ve_policy, __VENDOR_ELEMENTS_MAX, tb,
--		      blob_data(msg), blob_len(msg));
--
--	if (!tb[VENDOR_ELEMENTS])
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	pos = blobmsg_data(tb[VENDOR_ELEMENTS]);
--	len = os_strlen(pos);
--	if (len & 0x01)
--			return UBUS_STATUS_INVALID_ARGUMENT;
--
--	len /= 2;
--	if (len == 0) {
--		wpabuf_free(bss->vendor_elements);
--		bss->vendor_elements = NULL;
--		return 0;
--	}
--
--	elems = wpabuf_alloc(len);
--	if (elems == NULL)
--		return 1;
--
--	if (hexstr2bin(pos, wpabuf_put(elems, len), len)) {
--		wpabuf_free(elems);
--		return UBUS_STATUS_INVALID_ARGUMENT;
--	}
--
--	wpabuf_free(bss->vendor_elements);
--	bss->vendor_elements = elems;
--
--	/* update beacons if vendor elements were set successfully */
--	if (ieee802_11_update_beacons(hapd->iface) != 0)
--		return UBUS_STATUS_NOT_SUPPORTED;
--	return UBUS_STATUS_OK;
--}
--
--static void
--hostapd_rrm_print_nr(struct hostapd_neighbor_entry *nr)
--{
--	const u8 *data;
--	char *str;
--	int len;
--
--	blobmsg_printf(&b, "", MACSTR, MAC2STR(nr->bssid));
--
--	str = blobmsg_alloc_string_buffer(&b, "", nr->ssid.ssid_len + 1);
--	memcpy(str, nr->ssid.ssid, nr->ssid.ssid_len);
--	str[nr->ssid.ssid_len] = 0;
--	blobmsg_add_string_buffer(&b);
--
--	len = wpabuf_len(nr->nr);
--	str = blobmsg_alloc_string_buffer(&b, "", 2 * len + 1);
--	wpa_snprintf_hex(str, 2 * len + 1, wpabuf_head_u8(nr->nr), len);
--	blobmsg_add_string_buffer(&b);
--}
--
--enum {
--	BSS_MGMT_EN_NEIGHBOR,
--	BSS_MGMT_EN_BEACON,
--#ifdef CONFIG_WNM_AP
--	BSS_MGMT_EN_BSS_TRANSITION,
--#endif
--	__BSS_MGMT_EN_MAX
--};
--
--static bool
--__hostapd_bss_mgmt_enable_f(struct hostapd_data *hapd, int flag)
--{
--	struct hostapd_bss_config *bss = hapd->conf;
--	uint32_t flags;
--
--	switch (flag) {
--	case BSS_MGMT_EN_NEIGHBOR:
--		if (bss->radio_measurements[0] &
--		    WLAN_RRM_CAPS_NEIGHBOR_REPORT)
--			return false;
--
--		bss->radio_measurements[0] |=
--			WLAN_RRM_CAPS_NEIGHBOR_REPORT;
--		hostapd_neighbor_set_own_report(hapd);
--		return true;
--	case BSS_MGMT_EN_BEACON:
--		flags = WLAN_RRM_CAPS_BEACON_REPORT_PASSIVE |
--			WLAN_RRM_CAPS_BEACON_REPORT_ACTIVE |
--			WLAN_RRM_CAPS_BEACON_REPORT_TABLE;
--
--		if (bss->radio_measurements[0] & flags == flags)
--			return false;
--
--		bss->radio_measurements[0] |= (u8) flags;
--		return true;
--#ifdef CONFIG_WNM_AP
--	case BSS_MGMT_EN_BSS_TRANSITION:
--		if (bss->bss_transition)
--			return false;
--
--		bss->bss_transition = 1;
--		return true;
--#endif
--	}
--}
--
--static void
--__hostapd_bss_mgmt_enable(struct hostapd_data *hapd, uint32_t flags)
--{
--	bool update = false;
--	int i;
--
--	for (i = 0; i < __BSS_MGMT_EN_MAX; i++) {
--		if (!(flags & (1 << i)))
--			continue;
--
--		update |= __hostapd_bss_mgmt_enable_f(hapd, i);
--	}
--
--	if (update)
--		ieee802_11_update_beacons(hapd->iface);
--}
--
--
--static const struct blobmsg_policy bss_mgmt_enable_policy[__BSS_MGMT_EN_MAX] = {
--	[BSS_MGMT_EN_NEIGHBOR] = { "neighbor_report", BLOBMSG_TYPE_BOOL },
--	[BSS_MGMT_EN_BEACON] = { "beacon_report", BLOBMSG_TYPE_BOOL },
--#ifdef CONFIG_WNM_AP
--	[BSS_MGMT_EN_BSS_TRANSITION] = { "bss_transition", BLOBMSG_TYPE_BOOL },
--#endif
--};
--
--static int
--hostapd_bss_mgmt_enable(struct ubus_context *ctx, struct ubus_object *obj,
--		   struct ubus_request_data *req, const char *method,
--		   struct blob_attr *msg)
--
--{
--	struct hostapd_data *hapd = get_hapd_from_object(obj);
--	struct blob_attr *tb[__BSS_MGMT_EN_MAX];
--	struct blob_attr *cur;
--	uint32_t flags = 0;
--	int i;
--	bool neigh = false, beacon = false;
--
--	blobmsg_parse(bss_mgmt_enable_policy, __BSS_MGMT_EN_MAX, tb, blob_data(msg), blob_len(msg));
--
--	for (i = 0; i < ARRAY_SIZE(tb); i++) {
--		if (!tb[i] || !blobmsg_get_bool(tb[i]))
--			continue;
--
--		flags |= (1 << i);
--	}
--
--	__hostapd_bss_mgmt_enable(hapd, flags);
--}
--
--
--static void
--hostapd_rrm_nr_enable(struct hostapd_data *hapd)
--{
--	__hostapd_bss_mgmt_enable(hapd, 1 << BSS_MGMT_EN_NEIGHBOR);
--}
--
--static int
--hostapd_rrm_nr_get_own(struct ubus_context *ctx, struct ubus_object *obj,
--		       struct ubus_request_data *req, const char *method,
--		       struct blob_attr *msg)
--{
--	struct hostapd_data *hapd = get_hapd_from_object(obj);
--	struct hostapd_neighbor_entry *nr;
--	void *c;
--
--	hostapd_rrm_nr_enable(hapd);
--
--	nr = hostapd_neighbor_get(hapd, hapd->own_addr, NULL);
--	if (!nr)
--		return UBUS_STATUS_NOT_FOUND;
--
--	blob_buf_init(&b, 0);
--
--	c = blobmsg_open_array(&b, "value");
--	hostapd_rrm_print_nr(nr);
--	blobmsg_close_array(&b, c);
--
--	ubus_send_reply(ctx, req, b.head);
--
--	return 0;
--}
--
--static int
--hostapd_rrm_nr_list(struct ubus_context *ctx, struct ubus_object *obj,
--		    struct ubus_request_data *req, const char *method,
--		    struct blob_attr *msg)
--{
--	struct hostapd_data *hapd = get_hapd_from_object(obj);
--	struct hostapd_neighbor_entry *nr;
--	void *c;
--
--	hostapd_rrm_nr_enable(hapd);
--	blob_buf_init(&b, 0);
--
--	c = blobmsg_open_array(&b, "list");
--	dl_list_for_each(nr, &hapd->nr_db, struct hostapd_neighbor_entry, list) {
--		void *cur;
--
--		if (!memcmp(nr->bssid, hapd->own_addr, ETH_ALEN))
--			continue;
--
--		cur = blobmsg_open_array(&b, NULL);
--		hostapd_rrm_print_nr(nr);
--		blobmsg_close_array(&b, cur);
--	}
--	blobmsg_close_array(&b, c);
--
--	ubus_send_reply(ctx, req, b.head);
--
--	return 0;
--}
--
--enum {
--	NR_SET_LIST,
--	__NR_SET_LIST_MAX
--};
--
--static const struct blobmsg_policy nr_set_policy[__NR_SET_LIST_MAX] = {
--	[NR_SET_LIST] = { "list", BLOBMSG_TYPE_ARRAY },
--};
--
--
--static void
--hostapd_rrm_nr_clear(struct hostapd_data *hapd)
--{
--	struct hostapd_neighbor_entry *nr;
--
--restart:
--	dl_list_for_each(nr, &hapd->nr_db, struct hostapd_neighbor_entry, list) {
--		if (!memcmp(nr->bssid, hapd->own_addr, ETH_ALEN))
--			continue;
--
--		hostapd_neighbor_remove(hapd, nr->bssid, &nr->ssid);
--		goto restart;
--	}
--}
--
--static int
--hostapd_rrm_nr_set(struct ubus_context *ctx, struct ubus_object *obj,
--		   struct ubus_request_data *req, const char *method,
--		   struct blob_attr *msg)
--{
--	static const struct blobmsg_policy nr_e_policy[] = {
--		{ .type = BLOBMSG_TYPE_STRING },
--		{ .type = BLOBMSG_TYPE_STRING },
--		{ .type = BLOBMSG_TYPE_STRING },
--	};
--	struct hostapd_data *hapd = get_hapd_from_object(obj);
--	struct blob_attr *tb_l[__NR_SET_LIST_MAX];
--	struct blob_attr *tb[ARRAY_SIZE(nr_e_policy)];
--	struct blob_attr *cur;
--	int rem;
--
--	hostapd_rrm_nr_enable(hapd);
--
--	blobmsg_parse(nr_set_policy, __NR_SET_LIST_MAX, tb_l, blob_data(msg), blob_len(msg));
--	if (!tb_l[NR_SET_LIST])
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	hostapd_rrm_nr_clear(hapd);
--	blobmsg_for_each_attr(cur, tb_l[NR_SET_LIST], rem) {
--		struct wpa_ssid_value ssid;
--		struct wpabuf *data;
--		u8 bssid[ETH_ALEN];
--		char *s, *nr_s;
--
--		blobmsg_parse_array(nr_e_policy, ARRAY_SIZE(nr_e_policy), tb, blobmsg_data(cur), blobmsg_data_len(cur));
--		if (!tb[0] || !tb[1] || !tb[2])
--			goto invalid;
--
--		/* Neighbor Report binary */
--		nr_s = blobmsg_get_string(tb[2]);
--		data = wpabuf_parse_bin(nr_s);
--		if (!data)
--			goto invalid;
--
--		/* BSSID */
--		s = blobmsg_get_string(tb[0]);
--		if (strlen(s) == 0) {
--			/* Copy BSSID from neighbor report */
--			if (hwaddr_compact_aton(nr_s, bssid))
--				goto invalid;
--		} else if (hwaddr_aton(s, bssid)) {
--			goto invalid;
--		}
--
--		/* SSID */
--		s = blobmsg_get_string(tb[1]);
--		if (strlen(s) == 0) {
--			/* Copy SSID from hostapd BSS conf */
--			memcpy(&ssid, &hapd->conf->ssid, sizeof(ssid));
--		} else {
--			ssid.ssid_len = strlen(s);
--			if (ssid.ssid_len > sizeof(ssid.ssid))
--				goto invalid;
--
--			memcpy(&ssid, s, ssid.ssid_len);
--		}
--
--		hostapd_neighbor_set(hapd, bssid, &ssid, data, NULL, NULL, 0);
--		wpabuf_free(data);
--		continue;
--
--invalid:
--		return UBUS_STATUS_INVALID_ARGUMENT;
--	}
--
--	return 0;
--}
--
--enum {
--	BEACON_REQ_ADDR,
--	BEACON_REQ_MODE,
--	BEACON_REQ_OP_CLASS,
--	BEACON_REQ_CHANNEL,
--	BEACON_REQ_DURATION,
--	BEACON_REQ_BSSID,
--	BEACON_REQ_SSID,
--	__BEACON_REQ_MAX,
--};
--
--static const struct blobmsg_policy beacon_req_policy[__BEACON_REQ_MAX] = {
--	[BEACON_REQ_ADDR] = { "addr", BLOBMSG_TYPE_STRING },
--	[BEACON_REQ_OP_CLASS] { "op_class", BLOBMSG_TYPE_INT32 },
--	[BEACON_REQ_CHANNEL] { "channel", BLOBMSG_TYPE_INT32 },
--	[BEACON_REQ_DURATION] { "duration", BLOBMSG_TYPE_INT32 },
--	[BEACON_REQ_MODE] { "mode", BLOBMSG_TYPE_INT32 },
--	[BEACON_REQ_BSSID] { "bssid", BLOBMSG_TYPE_STRING },
--	[BEACON_REQ_SSID] { "ssid", BLOBMSG_TYPE_STRING },
--};
--
--static int
--hostapd_rrm_beacon_req(struct ubus_context *ctx, struct ubus_object *obj,
--		       struct ubus_request_data *ureq, const char *method,
--		       struct blob_attr *msg)
--{
--	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
--	struct blob_attr *tb[__BEACON_REQ_MAX];
--	struct blob_attr *cur;
--	struct wpabuf *req;
--	u8 bssid[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
--	u8 addr[ETH_ALEN];
--	int mode, rem, ret;
--	int buf_len = 13;
--
--	blobmsg_parse(beacon_req_policy, __BEACON_REQ_MAX, tb, blob_data(msg), blob_len(msg));
--
--	if (!tb[BEACON_REQ_ADDR] || !tb[BEACON_REQ_MODE] || !tb[BEACON_REQ_DURATION] ||
--	    !tb[BEACON_REQ_OP_CLASS] || !tb[BEACON_REQ_CHANNEL])
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	if (tb[BEACON_REQ_SSID])
--		buf_len += blobmsg_data_len(tb[BEACON_REQ_SSID]) + 2 - 1;
--
--	mode = blobmsg_get_u32(tb[BEACON_REQ_MODE]);
--	if (hwaddr_aton(blobmsg_data(tb[BEACON_REQ_ADDR]), addr))
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	if (tb[BEACON_REQ_BSSID] &&
--	    hwaddr_aton(blobmsg_data(tb[BEACON_REQ_BSSID]), bssid))
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	req = wpabuf_alloc(buf_len);
--	if (!req)
--		return UBUS_STATUS_UNKNOWN_ERROR;
--
--	/* 1: regulatory class */
--	wpabuf_put_u8(req, blobmsg_get_u32(tb[BEACON_REQ_OP_CLASS]));
--
--	/* 2: channel number */
--	wpabuf_put_u8(req, blobmsg_get_u32(tb[BEACON_REQ_CHANNEL]));
--
--	/* 3-4: randomization interval */
--	wpabuf_put_le16(req, 0);
--
--	/* 5-6: duration */
--	wpabuf_put_le16(req, blobmsg_get_u32(tb[BEACON_REQ_DURATION]));
--
--	/* 7: mode */
--	wpabuf_put_u8(req, blobmsg_get_u32(tb[BEACON_REQ_MODE]));
--
--	/* 8-13: BSSID */
--	wpabuf_put_data(req, bssid, ETH_ALEN);
--
--	if ((cur = tb[BEACON_REQ_SSID]) != NULL) {
--		wpabuf_put_u8(req, WLAN_EID_SSID);
--		wpabuf_put_u8(req, blobmsg_data_len(cur) - 1);
--		wpabuf_put_data(req, blobmsg_data(cur), blobmsg_data_len(cur) - 1);
--	}
--
--	ret = hostapd_send_beacon_req(hapd, addr, 0, req);
--	if (ret < 0)
--		return -ret;
--
--	return 0;
--}
--
--
--#ifdef CONFIG_WNM_AP
--enum {
--	WNM_DISASSOC_ADDR,
--	WNM_DISASSOC_DURATION,
--	WNM_DISASSOC_NEIGHBORS,
--	WNM_DISASSOC_ABRIDGED,
--	__WNM_DISASSOC_MAX,
--};
--
--static const struct blobmsg_policy wnm_disassoc_policy[__WNM_DISASSOC_MAX] = {
--	[WNM_DISASSOC_ADDR] = { "addr", BLOBMSG_TYPE_STRING },
--	[WNM_DISASSOC_DURATION] { "duration", BLOBMSG_TYPE_INT32 },
--	[WNM_DISASSOC_NEIGHBORS] { "neighbors", BLOBMSG_TYPE_ARRAY },
--	[WNM_DISASSOC_ABRIDGED] { "abridged", BLOBMSG_TYPE_BOOL },
--};
--
--static int
--hostapd_wnm_disassoc_imminent(struct ubus_context *ctx, struct ubus_object *obj,
--			      struct ubus_request_data *ureq, const char *method,
--			      struct blob_attr *msg)
--{
--	struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj);
--	struct blob_attr *tb[__WNM_DISASSOC_MAX];
--	struct blob_attr *cur;
--	struct sta_info *sta;
--	int duration = 10;
--	int rem;
--	int nr_len = 0;
--	u8 *nr = NULL;
--	u8 req_mode = WNM_BSS_TM_REQ_DISASSOC_IMMINENT;
--	u8 addr[ETH_ALEN];
--
--	blobmsg_parse(wnm_disassoc_policy, __WNM_DISASSOC_MAX, tb, blob_data(msg), blob_len(msg));
--
--	if (!tb[WNM_DISASSOC_ADDR])
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	if (hwaddr_aton(blobmsg_data(tb[WNM_DISASSOC_ADDR]), addr))
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	if ((cur = tb[WNM_DISASSOC_DURATION]) != NULL)
--		duration = blobmsg_get_u32(cur);
--
--	sta = ap_get_sta(hapd, addr);
--	if (!sta)
--		return UBUS_STATUS_NOT_FOUND;
--
--	if (tb[WNM_DISASSOC_NEIGHBORS]) {
--		u8 *nr_cur;
--
--		if (blobmsg_check_array(tb[WNM_DISASSOC_NEIGHBORS],
--					BLOBMSG_TYPE_STRING) < 0)
--			return UBUS_STATUS_INVALID_ARGUMENT;
--
--		blobmsg_for_each_attr(cur, tb[WNM_DISASSOC_NEIGHBORS], rem) {
--			int len = strlen(blobmsg_get_string(cur));
--
--			if (len % 2)
--				return UBUS_STATUS_INVALID_ARGUMENT;
--
--			nr_len += (len / 2) + 2;
--		}
--
--		if (nr_len) {
--			nr = os_zalloc(nr_len);
--			if (!nr)
--				return UBUS_STATUS_UNKNOWN_ERROR;
--		}
--
--		nr_cur = nr;
--		blobmsg_for_each_attr(cur, tb[WNM_DISASSOC_NEIGHBORS], rem) {
--			int len = strlen(blobmsg_get_string(cur)) / 2;
--
--			*nr_cur++ = WLAN_EID_NEIGHBOR_REPORT;
--			*nr_cur++ = (u8) len;
--			if (hexstr2bin(blobmsg_data(cur), nr_cur, len)) {
--				free(nr);
--				return UBUS_STATUS_INVALID_ARGUMENT;
--			}
--
--			nr_cur += len;
--		}
--	}
--
--	if (nr)
--		req_mode |= WNM_BSS_TM_REQ_PREF_CAND_LIST_INCLUDED;
--
--	if (tb[WNM_DISASSOC_ABRIDGED] && blobmsg_get_bool(tb[WNM_DISASSOC_ABRIDGED]))
--		req_mode |= WNM_BSS_TM_REQ_ABRIDGED;
--
--	if (wnm_send_bss_tm_req(hapd, sta, req_mode, duration, duration, NULL,
--				NULL, nr, nr_len, NULL, 0))
--		return UBUS_STATUS_UNKNOWN_ERROR;
--
--	return 0;
--}
--#endif
--
--static const struct ubus_method bss_methods[] = {
--	UBUS_METHOD_NOARG("reload", hostapd_bss_reload),
--	UBUS_METHOD_NOARG("get_clients", hostapd_bss_get_clients),
--	UBUS_METHOD_NOARG("get_status", hostapd_bss_get_status),
--	UBUS_METHOD("del_client", hostapd_bss_del_client, del_policy),
--	UBUS_METHOD_NOARG("list_bans", hostapd_bss_list_bans),
--#ifdef CONFIG_WPS
--	UBUS_METHOD_NOARG("wps_start", hostapd_bss_wps_start),
--	UBUS_METHOD_NOARG("wps_status", hostapd_bss_wps_status),
--	UBUS_METHOD_NOARG("wps_cancel", hostapd_bss_wps_cancel),
--#endif
--	UBUS_METHOD_NOARG("update_beacon", hostapd_bss_update_beacon),
--	UBUS_METHOD_NOARG("get_features", hostapd_bss_get_features),
--#ifdef NEED_AP_MLME
--	UBUS_METHOD("switch_chan", hostapd_switch_chan, csa_policy),
--#endif
--	UBUS_METHOD("set_vendor_elements", hostapd_vendor_elements, ve_policy),
--	UBUS_METHOD("notify_response", hostapd_notify_response, notify_policy),
--	UBUS_METHOD("bss_mgmt_enable", hostapd_bss_mgmt_enable, bss_mgmt_enable_policy),
--	UBUS_METHOD_NOARG("rrm_nr_get_own", hostapd_rrm_nr_get_own),
--	UBUS_METHOD_NOARG("rrm_nr_list", hostapd_rrm_nr_list),
--	UBUS_METHOD("rrm_nr_set", hostapd_rrm_nr_set, nr_set_policy),
--	UBUS_METHOD("rrm_beacon_req", hostapd_rrm_beacon_req, beacon_req_policy),
--#ifdef CONFIG_WNM_AP
--	UBUS_METHOD("wnm_disassoc_imminent", hostapd_wnm_disassoc_imminent, wnm_disassoc_policy),
--#endif
--};
--
--static struct ubus_object_type bss_object_type =
--	UBUS_OBJECT_TYPE("hostapd_bss", bss_methods);
--
--static int avl_compare_macaddr(const void *k1, const void *k2, void *ptr)
--{
--	return memcmp(k1, k2, ETH_ALEN);
--}
--
--void hostapd_ubus_add_bss(struct hostapd_data *hapd)
--{
--	struct ubus_object *obj = &hapd->ubus.obj;
--	char *name;
--	int ret;
--
--#ifdef CONFIG_MESH
--	if (hapd->conf->mesh & MESH_ENABLED)
--		return;
--#endif
--
--	if (!hostapd_ubus_init())
--		return;
--
--	if (asprintf(&name, "hostapd.%s", hapd->conf->iface) < 0)
--		return;
--
--	avl_init(&hapd->ubus.banned, avl_compare_macaddr, false, NULL);
--	obj->name = name;
--	obj->type = &bss_object_type;
--	obj->methods = bss_object_type.methods;
--	obj->n_methods = bss_object_type.n_methods;
--	ret = ubus_add_object(ctx, obj);
--	hostapd_ubus_ref_inc();
--
--	hostapd_send_shared_event(&hapd->iface->interfaces->ubus, hapd->conf->iface, "add");
--}
--
--void hostapd_ubus_free_bss(struct hostapd_data *hapd)
--{
--	struct ubus_object *obj = &hapd->ubus.obj;
--	char *name = (char *) obj->name;
--
--#ifdef CONFIG_MESH
--	if (hapd->conf->mesh & MESH_ENABLED)
--		return;
--#endif
--
--	if (!ctx)
--		return;
--
--	hostapd_send_shared_event(&hapd->iface->interfaces->ubus, hapd->conf->iface, "remove");
--
--	if (obj->id) {
--		ubus_remove_object(ctx, obj);
--		hostapd_ubus_ref_dec();
--	}
--
--	free(name);
--}
--
--static const struct ubus_method daemon_methods[] = {
--	UBUS_METHOD("config_add", hostapd_config_add, config_add_policy),
--	UBUS_METHOD("config_remove", hostapd_config_remove, config_remove_policy),
--};
--
--static struct ubus_object_type daemon_object_type =
--	UBUS_OBJECT_TYPE("hostapd", daemon_methods);
--
--void hostapd_ubus_add(struct hapd_interfaces *interfaces)
--{
--	struct ubus_object *obj = &interfaces->ubus;
--	int ret;
--
--	if (!hostapd_ubus_init())
--		return;
--
--	obj->name = strdup("hostapd");
--
--	obj->type = &daemon_object_type;
--	obj->methods = daemon_object_type.methods;
--	obj->n_methods = daemon_object_type.n_methods;
--	ret = ubus_add_object(ctx, obj);
--	hostapd_ubus_ref_inc();
--}
--
--void hostapd_ubus_free(struct hapd_interfaces *interfaces)
--{
--	struct ubus_object *obj = &interfaces->ubus;
--	char *name = (char *) obj->name;
--
--	if (!ctx)
--		return;
--
--	if (obj->id) {
--		ubus_remove_object(ctx, obj);
--		hostapd_ubus_ref_dec();
--	}
--
--	free(name);
--}
--
--struct ubus_event_req {
--	struct ubus_notify_request nreq;
--	int resp;
--};
--
--static void
--ubus_event_cb(struct ubus_notify_request *req, int idx, int ret)
--{
--	struct ubus_event_req *ureq = container_of(req, struct ubus_event_req, nreq);
--
--	ureq->resp = ret;
--}
--
--int hostapd_ubus_handle_event(struct hostapd_data *hapd, struct hostapd_ubus_request *req)
--{
--	struct ubus_banned_client *ban;
--	const char *types[HOSTAPD_UBUS_TYPE_MAX] = {
--		[HOSTAPD_UBUS_PROBE_REQ] = "probe",
--		[HOSTAPD_UBUS_AUTH_REQ] = "auth",
--		[HOSTAPD_UBUS_ASSOC_REQ] = "assoc",
--	};
--	const char *type = "mgmt";
--	struct ubus_event_req ureq = {};
--	const u8 *addr;
--
--	if (req->mgmt_frame)
--		addr = req->mgmt_frame->sa;
--	else
--		addr = req->addr;
--
--	ban = avl_find_element(&hapd->ubus.banned, addr, ban, avl);
--	if (ban)
--		return WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA;
--
--	if (!hapd->ubus.obj.has_subscribers)
--		return WLAN_STATUS_SUCCESS;
--
--	if (req->type < ARRAY_SIZE(types))
--		type = types[req->type];
--
--	blob_buf_init(&b, 0);
--	blobmsg_add_macaddr(&b, "address", addr);
--	if (req->mgmt_frame)
--		blobmsg_add_macaddr(&b, "target", req->mgmt_frame->da);
--	if (req->ssi_signal)
--		blobmsg_add_u32(&b, "signal", req->ssi_signal);
--	blobmsg_add_u32(&b, "freq", hapd->iface->freq);
--
--	if (req->elems) {
--		if(req->elems->ht_capabilities)
--		{
--			struct ieee80211_ht_capabilities *ht_capabilities;
--			void *ht_cap, *ht_cap_mcs_set, *mcs_set;
--
--
--			ht_capabilities = (struct ieee80211_ht_capabilities*) req->elems->ht_capabilities;
--			ht_cap = blobmsg_open_table(&b, "ht_capabilities");
--			blobmsg_add_u16(&b, "ht_capabilities_info", ht_capabilities->ht_capabilities_info);
--			ht_cap_mcs_set = blobmsg_open_table(&b, "supported_mcs_set");
--			blobmsg_add_u16(&b, "a_mpdu_params", ht_capabilities->a_mpdu_params);
--			blobmsg_add_u16(&b, "ht_extended_capabilities", ht_capabilities->ht_extended_capabilities);
--			blobmsg_add_u32(&b, "tx_bf_capability_info", ht_capabilities->tx_bf_capability_info);
--			blobmsg_add_u16(&b, "asel_capabilities", ht_capabilities->asel_capabilities);
--			mcs_set = blobmsg_open_array(&b, "supported_mcs_set");
--			for (int i = 0; i < 16; i++) {
--				blobmsg_add_u16(&b, NULL, (u16) ht_capabilities->supported_mcs_set[i]);
--			}
--			blobmsg_close_array(&b, mcs_set);
--			blobmsg_close_table(&b, ht_cap_mcs_set);
--			blobmsg_close_table(&b, ht_cap);
--		}
--		if(req->elems->vht_capabilities)
--		{
--			struct ieee80211_vht_capabilities *vht_capabilities;
--			void *vht_cap, *vht_cap_mcs_set;
--
--			vht_capabilities = (struct ieee80211_vht_capabilities*) req->elems->vht_capabilities;
--			vht_cap = blobmsg_open_table(&b, "vht_capabilities");
--			blobmsg_add_u32(&b, "vht_capabilities_info", vht_capabilities->vht_capabilities_info);
--			vht_cap_mcs_set = blobmsg_open_table(&b, "vht_supported_mcs_set");
--			blobmsg_add_u16(&b, "rx_map", vht_capabilities->vht_supported_mcs_set.rx_map);
--			blobmsg_add_u16(&b, "rx_highest", vht_capabilities->vht_supported_mcs_set.rx_highest);
--			blobmsg_add_u16(&b, "tx_map", vht_capabilities->vht_supported_mcs_set.tx_map);
--			blobmsg_add_u16(&b, "tx_highest", vht_capabilities->vht_supported_mcs_set.tx_highest);
--			blobmsg_close_table(&b, vht_cap_mcs_set);
--			blobmsg_close_table(&b, vht_cap);
--		}
--	}
--
--	if (!hapd->ubus.notify_response) {
--		ubus_notify(ctx, &hapd->ubus.obj, type, b.head, -1);
--		return WLAN_STATUS_SUCCESS;
--	}
--
--	if (ubus_notify_async(ctx, &hapd->ubus.obj, type, b.head, &ureq.nreq))
--		return WLAN_STATUS_SUCCESS;
--
--	ureq.nreq.status_cb = ubus_event_cb;
--	ubus_complete_request(ctx, &ureq.nreq.req, 100);
--
--	if (ureq.resp)
--		return ureq.resp;
--
--	return WLAN_STATUS_SUCCESS;
--}
--
--void hostapd_ubus_notify(struct hostapd_data *hapd, const char *type, const u8 *addr)
--{
--	if (!hapd->ubus.obj.has_subscribers)
--		return;
--
--	if (!addr)
--		return;
--
--	blob_buf_init(&b, 0);
--	blobmsg_add_macaddr(&b, "address", addr);
--
--	ubus_notify(ctx, &hapd->ubus.obj, type, b.head, -1);
--}
--
--void hostapd_ubus_notify_beacon_report(
--	struct hostapd_data *hapd, const u8 *addr, u8 token, u8 rep_mode,
--	struct rrm_measurement_beacon_report *rep, size_t len)
--{
--	if (!hapd->ubus.obj.has_subscribers)
--		return;
--
--	if (!addr || !rep)
--		return;
--
--	blob_buf_init(&b, 0);
--	blobmsg_add_macaddr(&b, "address", addr);
--	blobmsg_add_u16(&b, "op-class", rep->op_class);
--	blobmsg_add_u16(&b, "channel", rep->channel);
--	blobmsg_add_u64(&b, "start-time", rep->start_time);
--	blobmsg_add_u16(&b, "duration", rep->duration);
--	blobmsg_add_u16(&b, "report-info", rep->report_info);
--	blobmsg_add_u16(&b, "rcpi", rep->rcpi);
--	blobmsg_add_u16(&b, "rsni", rep->rsni);
--	blobmsg_add_macaddr(&b, "bssid", rep->bssid);
--	blobmsg_add_u16(&b, "antenna-id", rep->antenna_id);
--	blobmsg_add_u16(&b, "parent-tsf", rep->parent_tsf);
--
--	ubus_notify(ctx, &hapd->ubus.obj, "beacon-report", b.head, -1);
--}
-diff --git a/package/network/services/hostapd/src/src/ap/ubus.h b/package/network/services/hostapd/src/src/ap/ubus.h
-deleted file mode 100644
-index e16017394f..0000000000
---- a/package/network/services/hostapd/src/src/ap/ubus.h
-+++ /dev/null
-@@ -1,103 +0,0 @@
--/*
-- * hostapd / ubus support
-- * Copyright (c) 2013, Felix Fietkau <nbd@nbd.name>
-- *
-- * This software may be distributed under the terms of the BSD license.
-- * See README for more details.
-- */
--#ifndef __HOSTAPD_UBUS_H
--#define __HOSTAPD_UBUS_H
--
--enum hostapd_ubus_event_type {
--	HOSTAPD_UBUS_PROBE_REQ,
--	HOSTAPD_UBUS_AUTH_REQ,
--	HOSTAPD_UBUS_ASSOC_REQ,
--	HOSTAPD_UBUS_TYPE_MAX
--};
--
--struct hostapd_ubus_request {
--	enum hostapd_ubus_event_type type;
--	const struct ieee80211_mgmt *mgmt_frame;
--	const struct ieee802_11_elems *elems;
--	int ssi_signal; /* dBm */
--	const u8 *addr;
--};
--
--struct hostapd_iface;
--struct hostapd_data;
--struct hapd_interfaces;
--struct rrm_measurement_beacon_report;
--
--#ifdef UBUS_SUPPORT
--
--#include <libubox/avl.h>
--#include <libubus.h>
--
--struct hostapd_ubus_bss {
--	struct ubus_object obj;
--	struct avl_tree banned;
--	int notify_response;
--};
--
--void hostapd_ubus_add_iface(struct hostapd_iface *iface);
--void hostapd_ubus_free_iface(struct hostapd_iface *iface);
--void hostapd_ubus_add_bss(struct hostapd_data *hapd);
--void hostapd_ubus_free_bss(struct hostapd_data *hapd);
--
--int hostapd_ubus_handle_event(struct hostapd_data *hapd, struct hostapd_ubus_request *req);
--void hostapd_ubus_notify(struct hostapd_data *hapd, const char *type, const u8 *mac);
--void hostapd_ubus_notify_beacon_report(struct hostapd_data *hapd,
--				       const u8 *addr, u8 token, u8 rep_mode,
--				       struct rrm_measurement_beacon_report *rep,
--				       size_t len);
--
--void hostapd_ubus_add(struct hapd_interfaces *interfaces);
--void hostapd_ubus_free(struct hapd_interfaces *interfaces);
--
--#else
--
--struct hostapd_ubus_bss {};
--
--static inline void hostapd_ubus_add_iface(struct hostapd_iface *iface)
--{
--}
--
--static inline void hostapd_ubus_free_iface(struct hostapd_iface *iface)
--{
--}
--
--static inline void hostapd_ubus_add_bss(struct hostapd_data *hapd)
--{
--}
--
--static inline void hostapd_ubus_free_bss(struct hostapd_data *hapd)
--{
--}
--
--static inline int hostapd_ubus_handle_event(struct hostapd_data *hapd, struct hostapd_ubus_request *req)
--{
--	return 0;
--}
--
--static inline void hostapd_ubus_notify(struct hostapd_data *hapd, const char *type, const u8 *mac)
--{
--}
--
--static inline void hostapd_ubus_notify_beacon_report(struct hostapd_data *hapd,
--						     const u8 *addr, u8 token,
--						     u8 rep_mode,
--						     struct rrm_measurement_beacon_report *rep,
--						     size_t len)
--{
--}
--
--static inline void hostapd_ubus_add(struct hapd_interfaces *interfaces)
--{
--}
--
--static inline void hostapd_ubus_free(struct hapd_interfaces *interfaces)
--{
--}
--#endif
--
--#endif
-diff --git a/package/network/services/hostapd/src/src/utils/build_features.h b/package/network/services/hostapd/src/src/utils/build_features.h
-deleted file mode 100644
-index c7fccad413..0000000000
---- a/package/network/services/hostapd/src/src/utils/build_features.h
-+++ /dev/null
-@@ -1,59 +0,0 @@
--#ifndef BUILD_FEATURES_H
--#define BUILD_FEATURES_H
--
--static inline int has_feature(const char *feat)
--{
--#if defined(IEEE8021X_EAPOL) || (defined(HOSTAPD) && !defined(CONFIG_NO_RADIUS))
--	if (!strcmp(feat, "eap"))
--		return 1;
--#endif
--#ifdef CONFIG_IEEE80211N
--	if (!strcmp(feat, "11n"))
--		return 1;
--#endif
--#ifdef CONFIG_IEEE80211AC
--	if (!strcmp(feat, "11ac"))
--		return 1;
--#endif
--#ifdef CONFIG_IEEE80211AX
--	if (!strcmp(feat, "11ax"))
--		return 1;
--#endif
--#ifdef CONFIG_IEEE80211R
--	if (!strcmp(feat, "11r"))
--		return 1;
--#endif
--	if (!strcmp(feat, "11w"))
--		return 1;
--#ifdef CONFIG_ACS
--	if (!strcmp(feat, "acs"))
--		return 1;
--#endif
--#ifdef CONFIG_SAE
--	if (!strcmp(feat, "sae"))
--		return 1;
--#endif
--#ifdef CONFIG_OWE
--	if (!strcmp(feat, "owe"))
--		return 1;
--#endif
--#ifdef CONFIG_SUITEB192
--	if (!strcmp(feat, "suiteb192"))
--		return 1;
--#endif
--#ifdef CONFIG_WEP
--	if (!strcmp(feat, "wep"))
--		return 1;
--#endif
--#ifdef CONFIG_HS20
--	if (!strcmp(feat, "hs20"))
--		return 1;
--#endif
--#ifdef CONFIG_WPS
--	if (!strcmp(feat, "wps"))
--		return 1;
--#endif
--	return 0;
--}
--
--#endif /* BUILD_FEATURES_H */
-diff --git a/package/network/services/hostapd/src/wpa_supplicant/ubus.c b/package/network/services/hostapd/src/wpa_supplicant/ubus.c
-deleted file mode 100644
-index 16a68c5073..0000000000
---- a/package/network/services/hostapd/src/wpa_supplicant/ubus.c
-+++ /dev/null
-@@ -1,430 +0,0 @@
--/*
-- * wpa_supplicant / ubus support
-- * Copyright (c) 2018, Daniel Golle <daniel@makrotopia.org>
-- * Copyright (c) 2013, Felix Fietkau <nbd@nbd.name>
-- *
-- * This software may be distributed under the terms of the BSD license.
-- * See README for more details.
-- */
--
--#include "utils/includes.h"
--#include "utils/common.h"
--#include "utils/eloop.h"
--#include "utils/wpabuf.h"
--#include "common/ieee802_11_defs.h"
--#include "wpa_supplicant_i.h"
--#include "wps_supplicant.h"
--#include "ubus.h"
--
--static struct ubus_context *ctx;
--static struct blob_buf b;
--static int ctx_ref;
--
--static inline struct wpa_global *get_wpa_global_from_object(struct ubus_object *obj)
--{
--	return container_of(obj, struct wpa_global, ubus_global);
--}
--
--static inline struct wpa_supplicant *get_wpas_from_object(struct ubus_object *obj)
--{
--	return container_of(obj, struct wpa_supplicant, ubus.obj);
--}
--
--static void ubus_receive(int sock, void *eloop_ctx, void *sock_ctx)
--{
--	struct ubus_context *ctx = eloop_ctx;
--	ubus_handle_event(ctx);
--}
--
--static void ubus_reconnect_timeout(void *eloop_data, void *user_ctx)
--{
--	if (ubus_reconnect(ctx, NULL)) {
--		eloop_register_timeout(1, 0, ubus_reconnect_timeout, ctx, NULL);
--		return;
--	}
--
--	eloop_register_read_sock(ctx->sock.fd, ubus_receive, ctx, NULL);
--}
--
--static void wpas_ubus_connection_lost(struct ubus_context *ctx)
--{
--	eloop_unregister_read_sock(ctx->sock.fd);
--	eloop_register_timeout(1, 0, ubus_reconnect_timeout, ctx, NULL);
--}
--
--static bool wpas_ubus_init(void)
--{
--	if (ctx)
--		return true;
--
--	ctx = ubus_connect(NULL);
--	if (!ctx)
--		return false;
--
--	ctx->connection_lost = wpas_ubus_connection_lost;
--	eloop_register_read_sock(ctx->sock.fd, ubus_receive, ctx, NULL);
--	return true;
--}
--
--static void wpas_ubus_ref_inc(void)
--{
--	ctx_ref++;
--}
--
--static void wpas_ubus_ref_dec(void)
--{
--	ctx_ref--;
--	if (!ctx)
--		return;
--
--	if (ctx_ref)
--		return;
--
--	eloop_unregister_read_sock(ctx->sock.fd);
--	ubus_free(ctx);
--	ctx = NULL;
--}
--
--static int
--wpas_bss_get_features(struct ubus_context *ctx, struct ubus_object *obj,
--			struct ubus_request_data *req, const char *method,
--			struct blob_attr *msg)
--{
--	struct wpa_supplicant *wpa_s = get_wpas_from_object(obj);
--
--	blob_buf_init(&b, 0);
--	blobmsg_add_u8(&b, "ht_supported", ht_supported(wpa_s->hw.modes));
--	blobmsg_add_u8(&b, "vht_supported", vht_supported(wpa_s->hw.modes));
--	ubus_send_reply(ctx, req, b.head);
--
--	return 0;
--}
--
--static int
--wpas_bss_reload(struct ubus_context *ctx, struct ubus_object *obj,
--		struct ubus_request_data *req, const char *method,
--		struct blob_attr *msg)
--{
--	struct wpa_supplicant *wpa_s = get_wpas_from_object(obj);
--
--	if (wpa_supplicant_reload_configuration(wpa_s))
--		return UBUS_STATUS_UNKNOWN_ERROR;
--	else
--		return 0;
--}
--
--#ifdef CONFIG_WPS
--enum {
--	WPS_START_MULTI_AP,
--	__WPS_START_MAX
--};
--
--static const struct blobmsg_policy wps_start_policy[] = {
--	[WPS_START_MULTI_AP] = { "multi_ap", BLOBMSG_TYPE_BOOL },
--};
--
--static int
--wpas_bss_wps_start(struct ubus_context *ctx, struct ubus_object *obj,
--			struct ubus_request_data *req, const char *method,
--			struct blob_attr *msg)
--{
--	int rc;
--	struct wpa_supplicant *wpa_s = get_wpas_from_object(obj);
--	struct blob_attr *tb[__WPS_START_MAX], *cur;
--	int multi_ap = 0;
--
--	blobmsg_parse(wps_start_policy, __WPS_START_MAX, tb, blobmsg_data(msg), blobmsg_data_len(msg));
--
--	if (tb[WPS_START_MULTI_AP])
--		multi_ap = blobmsg_get_bool(tb[WPS_START_MULTI_AP]);
--
--	rc = wpas_wps_start_pbc(wpa_s, NULL, 0, multi_ap);
--
--	if (rc != 0)
--		return UBUS_STATUS_NOT_SUPPORTED;
--
--	return 0;
--}
--
--static int
--wpas_bss_wps_cancel(struct ubus_context *ctx, struct ubus_object *obj,
--			struct ubus_request_data *req, const char *method,
--			struct blob_attr *msg)
--{
--	int rc;
--	struct wpa_supplicant *wpa_s = get_wpas_from_object(obj);
--
--	rc = wpas_wps_cancel(wpa_s);
--
--	if (rc != 0)
--		return UBUS_STATUS_NOT_SUPPORTED;
--
--	return 0;
--}
--#endif
--
--static const struct ubus_method bss_methods[] = {
--	UBUS_METHOD_NOARG("reload", wpas_bss_reload),
--	UBUS_METHOD_NOARG("get_features", wpas_bss_get_features),
--#ifdef CONFIG_WPS
--	UBUS_METHOD_NOARG("wps_start", wpas_bss_wps_start),
--	UBUS_METHOD_NOARG("wps_cancel", wpas_bss_wps_cancel),
--#endif
--};
--
--static struct ubus_object_type bss_object_type =
--	UBUS_OBJECT_TYPE("wpas_bss", bss_methods);
--
--void wpas_ubus_add_bss(struct wpa_supplicant *wpa_s)
--{
--	struct ubus_object *obj = &wpa_s->ubus.obj;
--	char *name;
--	int ret;
--
--	if (!wpas_ubus_init())
--		return;
--
--	if (asprintf(&name, "wpa_supplicant.%s", wpa_s->ifname) < 0)
--		return;
--
--	obj->name = name;
--	obj->type = &bss_object_type;
--	obj->methods = bss_object_type.methods;
--	obj->n_methods = bss_object_type.n_methods;
--	ret = ubus_add_object(ctx, obj);
--	wpas_ubus_ref_inc();
--}
--
--void wpas_ubus_free_bss(struct wpa_supplicant *wpa_s)
--{
--	struct ubus_object *obj = &wpa_s->ubus.obj;
--	char *name = (char *) obj->name;
--
--	if (!ctx)
--		return;
--
--	if (obj->id) {
--		ubus_remove_object(ctx, obj);
--		wpas_ubus_ref_dec();
--	}
--
--	free(name);
--}
--
--enum {
--	WPAS_CONFIG_DRIVER,
--	WPAS_CONFIG_IFACE,
--	WPAS_CONFIG_BRIDGE,
--	WPAS_CONFIG_HOSTAPD_CTRL,
--	WPAS_CONFIG_CTRL,
--	WPAS_CONFIG_FILE,
--	__WPAS_CONFIG_MAX
--};
--
--static const struct blobmsg_policy wpas_config_add_policy[__WPAS_CONFIG_MAX] = {
--	[WPAS_CONFIG_DRIVER] = { "driver", BLOBMSG_TYPE_STRING },
--	[WPAS_CONFIG_IFACE] = { "iface", BLOBMSG_TYPE_STRING },
--	[WPAS_CONFIG_BRIDGE] = { "bridge", BLOBMSG_TYPE_STRING },
--	[WPAS_CONFIG_HOSTAPD_CTRL] = { "hostapd_ctrl", BLOBMSG_TYPE_STRING },
--	[WPAS_CONFIG_CTRL] = { "ctrl", BLOBMSG_TYPE_STRING },
--	[WPAS_CONFIG_FILE] = { "config", BLOBMSG_TYPE_STRING },
--};
--
--static int
--wpas_config_add(struct ubus_context *ctx, struct ubus_object *obj,
--		struct ubus_request_data *req, const char *method,
--		struct blob_attr *msg)
--{
--	struct blob_attr *tb[__WPAS_CONFIG_MAX];
--	struct wpa_global *global = get_wpa_global_from_object(obj);
--	struct wpa_interface *iface;
--
--	blobmsg_parse(wpas_config_add_policy, __WPAS_CONFIG_MAX, tb, blob_data(msg), blob_len(msg));
--
--	if (!tb[WPAS_CONFIG_FILE] || !tb[WPAS_CONFIG_IFACE] || !tb[WPAS_CONFIG_DRIVER])
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	iface = os_zalloc(sizeof(struct wpa_interface));
--	if (iface == NULL)
--		return UBUS_STATUS_UNKNOWN_ERROR;
--
--	iface->driver = blobmsg_get_string(tb[WPAS_CONFIG_DRIVER]);
--	iface->ifname = blobmsg_get_string(tb[WPAS_CONFIG_IFACE]);
--	iface->confname = blobmsg_get_string(tb[WPAS_CONFIG_FILE]);
--
--	if (tb[WPAS_CONFIG_BRIDGE])
--		iface->bridge_ifname = blobmsg_get_string(tb[WPAS_CONFIG_BRIDGE]);
--
--	if (tb[WPAS_CONFIG_CTRL])
--		iface->ctrl_interface = blobmsg_get_string(tb[WPAS_CONFIG_CTRL]);
--
--	if (tb[WPAS_CONFIG_HOSTAPD_CTRL])
--		iface->hostapd_ctrl = blobmsg_get_string(tb[WPAS_CONFIG_HOSTAPD_CTRL]);
--
--	if (!wpa_supplicant_add_iface(global, iface, NULL))
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	blob_buf_init(&b, 0);
--	blobmsg_add_u32(&b, "pid", getpid());
--	ubus_send_reply(ctx, req, b.head);
--
--	return UBUS_STATUS_OK;
--}
--
--enum {
--	WPAS_CONFIG_REM_IFACE,
--	__WPAS_CONFIG_REM_MAX
--};
--
--static const struct blobmsg_policy wpas_config_remove_policy[__WPAS_CONFIG_REM_MAX] = {
--	[WPAS_CONFIG_REM_IFACE] = { "iface", BLOBMSG_TYPE_STRING },
--};
--
--static int
--wpas_config_remove(struct ubus_context *ctx, struct ubus_object *obj,
--		   struct ubus_request_data *req, const char *method,
--		   struct blob_attr *msg)
--{
--	struct blob_attr *tb[__WPAS_CONFIG_REM_MAX];
--	struct wpa_global *global = get_wpa_global_from_object(obj);
--	struct wpa_supplicant *wpa_s = NULL;
--	unsigned int found = 0;
--
--	blobmsg_parse(wpas_config_remove_policy, __WPAS_CONFIG_REM_MAX, tb, blob_data(msg), blob_len(msg));
--
--	if (!tb[WPAS_CONFIG_REM_IFACE])
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	/* find wpa_s object for to-be-removed interface */
--	for (wpa_s = global->ifaces; wpa_s; wpa_s = wpa_s->next) {
--		if (!strncmp(wpa_s->ifname,
--			     blobmsg_get_string(tb[WPAS_CONFIG_REM_IFACE]),
--			     sizeof(wpa_s->ifname)))
--		{
--			found = 1;
--			break;
--		}
--	}
--
--	if (!found)
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	if (wpa_supplicant_remove_iface(global, wpa_s, 0))
--		return UBUS_STATUS_INVALID_ARGUMENT;
--
--	return UBUS_STATUS_OK;
--}
--
--static const struct ubus_method wpas_daemon_methods[] = {
--	UBUS_METHOD("config_add", wpas_config_add, wpas_config_add_policy),
--	UBUS_METHOD("config_remove", wpas_config_remove, wpas_config_remove_policy),
--};
--
--static struct ubus_object_type wpas_daemon_object_type =
--	UBUS_OBJECT_TYPE("wpa_supplicant", wpas_daemon_methods);
--
--void wpas_ubus_add(struct wpa_global *global)
--{
--	struct ubus_object *obj = &global->ubus_global;
--	int ret;
--
--	if (!wpas_ubus_init())
--		return;
--
--	obj->name = strdup("wpa_supplicant");
--
--	obj->type = &wpas_daemon_object_type;
--	obj->methods = wpas_daemon_object_type.methods;
--	obj->n_methods = wpas_daemon_object_type.n_methods;
--	ret = ubus_add_object(ctx, obj);
--	wpas_ubus_ref_inc();
--}
--
--void wpas_ubus_free(struct wpa_global *global)
--{
--	struct ubus_object *obj = &global->ubus_global;
--	char *name = (char *) obj->name;
--
--	if (!ctx)
--		return;
--
--	if (obj->id) {
--		ubus_remove_object(ctx, obj);
--		wpas_ubus_ref_dec();
--	}
--
--	free(name);
--}
--
--
--#ifdef CONFIG_WPS
--void wpas_ubus_notify(struct wpa_supplicant *wpa_s, const struct wps_credential *cred)
--{
--	u16 auth_type;
--	char *ifname, *encryption, *ssid, *key;
--	size_t ifname_len;
--
--	if (!cred)
--		return;
--
--	auth_type = cred->auth_type;
--
--	if (auth_type == (WPS_AUTH_WPAPSK | WPS_AUTH_WPA2PSK))
--		auth_type = WPS_AUTH_WPA2PSK;
--
--	if (auth_type != WPS_AUTH_OPEN &&
--	    auth_type != WPS_AUTH_WPAPSK &&
--	    auth_type != WPS_AUTH_WPA2PSK) {
--		wpa_printf(MSG_DEBUG, "WPS: Ignored credentials for "
--			   "unsupported authentication type 0x%x",
--			   auth_type);
--		return;
--	}
--
--	if (auth_type == WPS_AUTH_WPAPSK || auth_type == WPS_AUTH_WPA2PSK) {
--		if (cred->key_len < 8 || cred->key_len > 2 * PMK_LEN) {
--			wpa_printf(MSG_ERROR, "WPS: Reject PSK credential with "
--				   "invalid Network Key length %lu",
--				   (unsigned long) cred->key_len);
--			return;
--		}
--	}
--
--	blob_buf_init(&b, 0);
--
--	ifname_len = strlen(wpa_s->ifname);
--	ifname = blobmsg_alloc_string_buffer(&b, "ifname", ifname_len + 1);
--	memcpy(ifname, wpa_s->ifname, ifname_len + 1);
--	ifname[ifname_len] = '\0';
--	blobmsg_add_string_buffer(&b);
--
--	switch (auth_type) {
--		case WPS_AUTH_WPA2PSK:
--			encryption = "psk2";
--			break;
--		case WPS_AUTH_WPAPSK:
--			encryption = "psk";
--			break;
--		default:
--			encryption = "none";
--			break;
--	}
--
--	blobmsg_add_string(&b, "encryption", encryption);
--
--	ssid = blobmsg_alloc_string_buffer(&b, "ssid", cred->ssid_len + 1);
--	memcpy(ssid, cred->ssid, cred->ssid_len);
--	ssid[cred->ssid_len] = '\0';
--	blobmsg_add_string_buffer(&b);
--
--	if (cred->key_len > 0) {
--		key = blobmsg_alloc_string_buffer(&b, "key", cred->key_len + 1);
--		memcpy(key, cred->key, cred->key_len);
--		key[cred->key_len] = '\0';
--		blobmsg_add_string_buffer(&b);
--	}
--
--//	ubus_notify(ctx, &wpa_s->ubus.obj, "wps_credentials", b.head, -1);
--	ubus_send_event(ctx, "wps_credentials", b.head);
--}
--#endif /* CONFIG_WPS */
-diff --git a/package/network/services/hostapd/src/wpa_supplicant/ubus.h b/package/network/services/hostapd/src/wpa_supplicant/ubus.h
-deleted file mode 100644
-index bf92b98c01..0000000000
---- a/package/network/services/hostapd/src/wpa_supplicant/ubus.h
-+++ /dev/null
-@@ -1,66 +0,0 @@
--/*
-- * wpa_supplicant / ubus support
-- * Copyright (c) 2018, Daniel Golle <daniel@makrotopia.org>
-- * Copyright (c) 2013, Felix Fietkau <nbd@nbd.name>
-- *
-- * This software may be distributed under the terms of the BSD license.
-- * See README for more details.
-- */
--#ifndef __WPAS_UBUS_H
--#define __WPAS_UBUS_H
--
--struct wpa_supplicant;
--struct wpa_global;
--
--#include "wps_supplicant.h"
--
--#ifdef UBUS_SUPPORT
--#include <libubus.h>
--
--struct wpas_ubus_bss {
--	struct ubus_object obj;
--};
--
--void wpas_ubus_add_bss(struct wpa_supplicant *wpa_s);
--void wpas_ubus_free_bss(struct wpa_supplicant *wpa_s);
--
--void wpas_ubus_add(struct wpa_global *global);
--void wpas_ubus_free(struct wpa_global *global);
--
--#ifdef CONFIG_WPS
--void wpas_ubus_notify(struct wpa_supplicant *wpa_s, const struct wps_credential *cred);
--#endif
--
--#else
--struct wpas_ubus_bss {};
--
--static inline void wpas_ubus_add_iface(struct wpa_supplicant *wpa_s)
--{
--}
--
--static inline void wpas_ubus_free_iface(struct wpa_supplicant *wpa_s)
--{
--}
--
--static inline void wpas_ubus_add_bss(struct wpa_supplicant *wpa_s)
--{
--}
--
--static inline void wpas_ubus_free_bss(struct wpa_supplicant *wpa_s)
--{
--}
--
--static inline void wpas_ubus_notify(struct wpa_supplicant *wpa_s, struct wps_credential *cred)
--{
--}
--
--static inline void wpas_ubus_add(struct wpa_global *global)
--{
--}
--
--static inline void wpas_ubus_free(struct wpa_global *global)
--{
--}
--#endif
--
--#endif
--- 
-2.34.1
-
diff --git a/patches/wifi/0013-netifd-add-psk-radius.patch b/patches/wifi/0013-netifd-add-psk-radius.patch
deleted file mode 100644
index 93ce74e41..000000000
--- a/patches/wifi/0013-netifd-add-psk-radius.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 43a6bc51c3e71201a32ab0f03606eb078eff19ee Mon Sep 17 00:00:00 2001
-From: Arif Alam <arif.alam@netexperience.com>
-Date: Tue, 26 Apr 2022 17:37:58 -0400
-Subject: [PATCH] netifd: add psk radius
-
-Signed-off-by: Arif Alam <arif.alam@netexperience.com>
----
- .../config/netifd/patches/200-psk-radius.patch       | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
- create mode 100644 package/network/config/netifd/patches/200-psk-radius.patch
-
-diff --git a/package/network/config/netifd/patches/200-psk-radius.patch b/package/network/config/netifd/patches/200-psk-radius.patch
-new file mode 100644
-index 0000000000..b6f6cdfda0
---- /dev/null
-+++ b/package/network/config/netifd/patches/200-psk-radius.patch
-@@ -0,0 +1,12 @@
-+--- a/scripts/netifd-wireless.sh
-++++ b/scripts/netifd-wireless.sh
-+@@ -260,6 +260,9 @@ wireless_vif_parse_encryption() {
-+ 		wpa3*)
-+ 			auth_type=eap256
-+ 		;;
-++		psk2-radius*)
-++			auth_type=psk2-radius
-++		;;
-+ 		psk3-mixed*|sae-mixed*)
-+ 			auth_type=psk-sae
-+ 		;;
--- 
-2.25.1
-